xunge/DecIR huggingface dataset:
void vecfoo(double *a) {
  for (int i = 0; i < 256; i++)
    a[i] = __builtin_pow(a[i], 1.25);
}


x86 assembly (clang, -O0):
<vecfoo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x100,-0xc(%rbp)
jge    1165 <vecfoo+0x55>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
movsd  0xebb(%rip),%xmm1
call   1030 <pow@plt>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsd  %xmm0,(%rax,%rcx,8)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <vecfoo+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vecfoo>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %ebx,%ebx
nopl   0x0(%rax)
movsd  (%r14,%rbx,8),%xmm0
movsd  0xed2(%rip),%xmm1
call   1030 <pow@plt>
movsd  %xmm0,(%r14,%rbx,8)
movsd  0x8(%r14,%rbx,8),%xmm0
movsd  0xeb8(%rip),%xmm1
call   1030 <pow@plt>
movsd  %xmm0,0x8(%r14,%rbx,8)
movsd  0x10(%r14,%rbx,8),%xmm0
movsd  0xe9d(%rip),%xmm1
call   1030 <pow@plt>
movsd  %xmm0,0x10(%r14,%rbx,8)
movsd  0x18(%r14,%rbx,8),%xmm0
movsd  0xe82(%rip),%xmm1
call   1030 <pow@plt>
movsd  %xmm0,0x18(%r14,%rbx,8)
add    $0x4,%rbx
cmp    $0x100,%rbx
jne    1120 <vecfoo+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @vecfoo(double* %0) {
%2 = alloca double*
%3 = alloca i32
store double* %0, double** %2
store i32 0, i32* %3
br label %4
4: ; preds = %18, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 256
br i1 %6, label %7, label %21
7: ; preds = %4
%8 = load double*, double** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds double, double* %8, i64 %10
%12 = load double, double* %11
%13 = call double @pow(double %12, double 1.250000e+00)
%14 = load double*, double** %2
%15 = load i32, i32* %3
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds double, double* %14, i64 %16
store double %13, double* %17
br label %18
18: ; preds = %7
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %4
21: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @vecfoo(double* nocapture %0) {
br label %3
2: ; preds = %3
ret void
3: ; preds = %3, %1
%4 = phi i64 [ 0, %1 ], [ %20, %3 ]
%5 = getelementptr inbounds double, double* %0, i64 %4
%6 = load double, double* %5
%7 = tail call double @pow(double %6, double 1.250000e+00)
store double %7, double* %5
%8 = or i64 %4, 1
%9 = getelementptr inbounds double, double* %0, i64 %8
%10 = load double, double* %9
%11 = tail call double @pow(double %10, double 1.250000e+00)
store double %11, double* %9
%12 = or i64 %4, 2
%13 = getelementptr inbounds double, double* %0, i64 %12
%14 = load double, double* %13
%15 = tail call double @pow(double %14, double 1.250000e+00)
store double %15, double* %13
%16 = or i64 %4, 3
%17 = getelementptr inbounds double, double* %0, i64 %16
%18 = load double, double* %17
%19 = tail call double @pow(double %18, double 1.250000e+00)
store double %19, double* %17
%20 = add nuw nsw i64 %4, 4
%21 = icmp eq i64 %20, 256
br i1 %21, label %2, label %3
}
/* Variables and functions */
int /*<<< orphan*/ close_stdout();
int main() { close_stdout(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <close_stdout@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <close_stdout@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @close_stdout()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @close_stdout()
ret i32 0
}
void Interp9(unsigned char *pc, int c1, int c2, int c3) {
  c1 &= 0xf8f8f8;
  c2 &= 0xf8f8f8;
  c3 &= 0xf8f8f8;
  *((int *)pc) = (c1 * 2 + (c2 + c3) * 3) >> 3;
}


x86 assembly (clang, -O0):
<Interp9>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0xc(%rbp),%eax
and    $0xf8f8f8,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
and    $0xf8f8f8,%eax
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
and    $0xf8f8f8,%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%ecx
shl    $0x1,%ecx
mov    -0x10(%rbp),%eax
add    -0x14(%rbp),%eax
imul   $0x3,%eax,%eax
add    %eax,%ecx
sar    $0x3,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Interp9>:
and    $0xf8f8f8,%edx
and    $0xf8f8f8,%ecx
add    %edx,%ecx
and    $0xf8f8f8,%esi
lea    (%rcx,%rcx,2),%eax
lea    (%rax,%rsi,2),%eax
shr    $0x3,%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @Interp9(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %6
%10 = and i32 %9, 16316664
store i32 %10, i32* %6
%11 = load i32, i32* %7
%12 = and i32 %11, 16316664
store i32 %12, i32* %7
%13 = load i32, i32* %8
%14 = and i32 %13, 16316664
store i32 %14, i32* %8
%15 = load i32, i32* %6
%16 = mul nsw i32 %15, 2
%17 = load i32, i32* %7
%18 = load i32, i32* %8
%19 = add nsw i32 %17, %18
%20 = mul nsw i32 %19, 3
%21 = add nsw i32 %16, %20
%22 = ashr i32 %21, 3
%23 = load i8*, i8** %5
%24 = bitcast i8* %23 to i32*
store i32 %22, i32* %24
ret void
}

LLVM IR (-O2):
define void @Interp9(i8* nocapture writeonly %0, i32 %1, i32 %2, i32 %3) {
%5 = and i32 %2, 16316664
%6 = and i32 %3, 16316664
%7 = shl i32 %1, 1
%8 = and i32 %7, 32633328
%9 = add nuw nsw i32 %6, %5
%10 = mul nuw nsw i32 %9, 3
%11 = add nuw nsw i32 %10, %8
%12 = lshr exact i32 %11, 3
%13 = bitcast i8* %0 to i32*
store i32 %12, i32* %13
ret void
}
int Help() { return 0; }


x86 assembly (clang, -O0):
<Help>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Help>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Help() {
ret i32 0
}

LLVM IR (-O2):
define i32 @Help() {
ret i32 0
}
void HalfFloatRow_Any_SSE2() {}


x86 assembly (clang, -O0):
<HalfFloatRow_Any_SSE2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HalfFloatRow_Any_SSE2>:
ret

LLVM IR (-O0):
define void @HalfFloatRow_Any_SSE2() {
ret void
}

LLVM IR (-O2):
define void @HalfFloatRow_Any_SSE2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ f(int);
int main() { f(12); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc,%edi
call   1030 <f@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xc,%edi
call   1030 <f@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @f(i32 12)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @f(i32 12)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_nondet_String();
int cstrlen(int /*<<< orphan*/);
int main() { return cstrlen(__VERIFIER_nondet_String()); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_String@plt>
mov    %eax,%edi
call   1040 <cstrlen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_String@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <cstrlen@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @__VERIFIER_nondet_String()
%3 = call i32 @cstrlen(i32 %2)
ret i32 %3
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_String()
%2 = tail call i32 @cstrlen(i32 %1)
ret i32 %2
}
/* Variables and functions */
void *memcpy(void *, void const *, size_t);
void *__wrap_memcpy(void *dest, const void *src, size_t n) {
  return memcpy(dest, src, n);
}


x86 assembly (clang, -O0):
<__wrap_memcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    %rdi,-0x20(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__wrap_memcpy>:
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define i8* @__wrap_memcpy(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
ret i8* %7
}

LLVM IR (-O2):
define i8* @__wrap_memcpy(i8* returned writeonly %0, i8* nocapture %1, i64 %2) {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 %2, i1 false)
ret i8* %0
}
/* Variables and functions */
int sqrt(double);
double sem_svf_shape_gain(double x) { return 1 / sqrt(1.0 + 0.66 * x + x * x); }


x86 assembly (clang, -O0):
<sem_svf_shape_gain>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  0xed6(%rip),%xmm0
mulsd  %xmm0,%xmm1
movsd  0xed2(%rip),%xmm0
addsd  %xmm0,%xmm1
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
mov    %eax,%ecx
mov    $0x1,%eax
cltd
idiv   %ecx
cvtsi2sd %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sem_svf_shape_gain>:
push   %rax
movsd  0xee7(%rip),%xmm1
mulsd  %xmm0,%xmm1
addsd  0xee3(%rip),%xmm1
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
lea    0x1(%rax),%ecx
xor    %edx,%edx
cmp    $0x3,%ecx
cmovb  %eax,%edx
xorps  %xmm0,%xmm0
cvtsi2sd %edx,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @sem_svf_shape_gain(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @llvm.fmuladd.f64(double 6.600000e-01, double %3, double 1.000000e+00)
%5 = load double, double* %2
%6 = load double, double* %2
%7 = call double @llvm.fmuladd.f64(double %5, double %6, double %4)
%8 = call i32 @sqrt(double %7)
%9 = sdiv i32 1, %8
%10 = sitofp i32 %9 to double
ret double %10
}

LLVM IR (-O2):
define double @sem_svf_shape_gain(double %0) {
%2 = tail call double @llvm.fmuladd.f64(double %0, double 6.600000e-01, double 1.000000e+00)
%3 = tail call double @llvm.fmuladd.f64(double %0, double %0, double %2)
%4 = tail call i32 @sqrt(double %3)
%5 = add i32 %4, 1
%6 = icmp ult i32 %5, 3
%7 = select i1 %6, i32 %4, i32 0
%8 = sitofp i32 %7 to double
ret double %8
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int y;
};
typedef TYPE_1__ XGravityEvent;

/* Variables and functions */
void set_XGravityEvent_y(void *_p, int _v) {
  ((XGravityEvent *)_p)->y = (int)_v;
}


x86 assembly (clang, -O0):
<set_XGravityEvent_y>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XGravityEvent_y>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XGravityEvent_y(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XGravityEvent_y(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
void *bump_down(void *mtemp, int i_size) {
  unsigned char *bmptr;
  bmptr = (unsigned char *)mtemp;
  bmptr -= i_size;
  return ((void *)bmptr);
}


x86 assembly (clang, -O0):
<bump_down>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rdx
xor    %ecx,%ecx
sub    %rdx,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bump_down>:
mov    %rdi,%rax
movslq %esi,%rcx
sub    %rcx,%rax
ret

LLVM IR (-O0):
define i8* @bump_down(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = sext i32 %7 to i64
%10 = sub i64 0, %9
%11 = getelementptr inbounds i8, i8* %8, i64 %10
store i8* %11, i8** %5
%12 = load i8*, i8** %5
ret i8* %12
}

LLVM IR (-O2):
define i8* @bump_down(i8* readnone %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = sub nsw i64 0, %3
%5 = getelementptr inbounds i8, i8* %0, i64 %4
ret i8* %5
}
/* Type definitions */
struct parser {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ next(struct parser *);
int peek(struct parser *);
int can_readch(struct parser *p, int ch) {
  if (peek(p) != ch)
    return 0;
  next(p);
  return 1;
}


x86 assembly (clang, -O0):
<can_readch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <peek@plt>
cmp    -0x14(%rbp),%eax
je     114d <can_readch+0x2d>
movl   $0x0,-0x4(%rbp)
jmp    115d <can_readch+0x3d>
mov    -0x10(%rbp),%rdi
call   1040 <next@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<can_readch>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <peek@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    %ebp,%ecx
jne    1142 <can_readch+0x22>
mov    %rbx,%rdi
call   1040 <next@plt>
mov    $0x1,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.parser = type { i32 }
define i32 @can_readch(%struct.parser* %0, i32 %1) {
%3 = alloca i32
%4 = alloca %struct.parser*
%5 = alloca i32
store %struct.parser* %0, %struct.parser** %4
store i32 %1, i32* %5
%6 = load %struct.parser*, %struct.parser** %4
%7 = call i32 @peek(%struct.parser* %6)
%8 = load i32, i32* %5
%9 = icmp ne i32 %7, %8
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 0, i32* %3
br label %14
11: ; preds = %2
%12 = load %struct.parser*, %struct.parser** %4
%13 = call i32 @next(%struct.parser* %12)
store i32 1, i32* %3
br label %14
14: ; preds = %11, %10
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
%struct.parser = type { i32 }
define i32 @can_readch(%struct.parser* %0, i32 %1) {
%3 = tail call i32 @peek(%struct.parser* %0)
%4 = icmp eq i32 %3, %1
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @next(%struct.parser* %0)
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ 1, %5 ], [ 0, %2 ]
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int get_dst_len(int /*<<< orphan*/ *);
int get_src_len(int /*<<< orphan*/ *);
int padded_addr_len(uint8_t *buf) {
  int addr_len = 2 * 4 + get_dst_len(buf) + get_src_len(buf);
  return (addr_len + 8 - 1) & ~(8 - 1);
}


x86 assembly (clang, -O0):
<padded_addr_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <get_dst_len@plt>
add    $0x8,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <get_src_len@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x8,%eax
sub    $0x1,%eax
and    $0xfffffff8,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<padded_addr_len>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <get_dst_len@plt>
mov    %eax,%r14d
mov    %rbx,%rdi
call   1040 <get_src_len@plt>
add    %r14d,%eax
add    $0xf,%eax
and    $0xfffffff8,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @padded_addr_len(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @get_dst_len(i32* %4)
%6 = add nsw i32 8, %5
%7 = load i32*, i32** %2
%8 = call i32 @get_src_len(i32* %7)
%9 = add nsw i32 %6, %8
store i32 %9, i32* %3
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 8
%12 = sub nsw i32 %11, 1
%13 = and i32 %12, -8
ret i32 %13
}

LLVM IR (-O2):
define i32 @padded_addr_len(i32* %0) {
%2 = tail call i32 @get_dst_len(i32* %0)
%3 = tail call i32 @get_src_len(i32* %0)
%4 = add i32 %2, 15
%5 = add i32 %4, %3
%6 = and i32 %5, -8
ret i32 %6
}
void gcall_or_jmp(int is_jmp) {}


x86 assembly (clang, -O0):
<gcall_or_jmp>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcall_or_jmp>:
ret

LLVM IR (-O0):
define void @gcall_or_jmp(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @gcall_or_jmp(i32 %0) {
ret void
}
__attribute__((no, noclone)) long int f2(long int k) {
  return 2L | ((k - 1L) >> ((int)sizeof(long int) * 8 - 1));
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
sub    $0x1,%rax
sar    $0x3f,%rax
or     $0x2,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
lea    -0x1(%rdi),%rax
sar    $0x3f,%rax
or     $0x2,%rax
ret

LLVM IR (-O0):
define i64 @f2(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sub nsw i64 %3, 1
%5 = ashr i64 %4, 63
%6 = or i64 2, %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @f2(i64 %0) {
%2 = add nsw i64 %0, -1
%3 = ashr i64 %2, 63
%4 = or i64 %3, 2
ret i64 %4
}
void foo798() {}


x86 assembly (clang, -O0):
<foo798>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo798>:
ret

LLVM IR (-O0):
define void @foo798() {
ret void
}

LLVM IR (-O2):
define void @foo798() {
ret void
}
int i9(int *base) { return base[01000000]; }


x86 assembly (clang, -O0):
<i9>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x100000(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<i9>:
mov    0x100000(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @i9(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 262144
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @i9(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 262144
%3 = load i32, i32* %2
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void printhelp(FILE *file) {
  fputs("usage: adnslogres [<options>] [<logfile>]\n"
        "       adnslogres --version|--help\n"
        "options: -c <concurrency>  set max number of outstanding queries\n"
        "         -p                use poll(2) instead of select(2)\n"
        "         -d                turn on debugging\n"
        "         -C <config>       use instead of contents of resolv.conf\n",
        stdout);
}


x86 assembly (clang, -O0):
<printhelp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%esi
lea    0xed4(%rip),%rdi
call   1030 <fputs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printhelp>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
lea    0xee0(%rip),%rdi
jmp    1030 <fputs@plt>

LLVM IR (-O0):
@.str = [314 x i8] c"usage: adnslogres [<options>] [<logfile>]\0A adnslogres --version|--help\0Aoptions: -c <concurrency> set max number of outstanding queries\0A -p use poll(2) instead of select(2)\0A -d turn on debugging\0A -C <config> use instead of contents of resolv.conf\0A\00"
@stdout = global i32 0
define void @printhelp(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32, i32* @stdout
%4 = call i32 @fputs(i8* getelementptr inbounds ([314 x i8], [314 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [314 x i8] c"usage: adnslogres [<options>] [<logfile>]\0A adnslogres --version|--help\0Aoptions: -c <concurrency> set max number of outstanding queries\0A -p use poll(2) instead of select(2)\0A -d turn on debugging\0A -C <config> use instead of contents of resolv.conf\0A\00"
@stdout = global i32 0
define void @printhelp(i32* nocapture readnone %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @fputs(i8* getelementptr inbounds ([314 x i8], [314 x i8]* @.str, i64 0, i64 0), i32 %2)
ret void
}
long use(long (*func)(long, long), long a, long b) { return func(b, a); }


x86 assembly (clang, -O0):
<use>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<use>:
mov    %rdi,%rax
mov    %rdx,%rdi
jmp    *%rax

LLVM IR (-O0):
define i64 @use(i64 (i64, i64)* %0, i64 %1, i64 %2) {
%4 = alloca i64 (i64, i64)*
%5 = alloca i64
%6 = alloca i64
store i64 (i64, i64)* %0, i64 (i64, i64)** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64 (i64, i64)*, i64 (i64, i64)** %4
%8 = load i64, i64* %6
%9 = load i64, i64* %5
%10 = call i64 %7(i64 %8, i64 %9)
ret i64 %10
}

LLVM IR (-O2):
define i64 @use(i64 (i64, i64)* nocapture %0, i64 %1, i64 %2) {
%4 = tail call i64 %0(i64 %2, i64 %1)
ret i64 %4
}
/* Variables and functions */
int GET32(int);
unsigned int uart_recv(void) {
  while (1) {
    if (GET32((0x3F000000 + 0x00215054)) & 0x01)
      break;
  }
  return (GET32((0x3F000000 + 0x00215040)) & 0xFF);
}


x86 assembly (clang, -O0):
<uart_recv>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <uart_recv+0x9>
mov    $0x3f215054,%edi
call   1030 <GET32@plt>
and    $0x1,%eax
cmp    $0x0,%eax
je     1134 <uart_recv+0x24>
jmp    1139 <uart_recv+0x29>
jmp    1119 <uart_recv+0x9>
mov    $0x3f215040,%edi
call   1030 <GET32@plt>
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_recv>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x3f215054,%edi
call   1030 <GET32@plt>
test   $0x1,%al
je     1120 <uart_recv+0x10>
mov    $0x3f215040,%edi
call   1030 <GET32@plt>
movzbl %al,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @uart_recv() {
br label %1
1: ; preds = %0, %6
%2 = call i32 @GET32(i32 1059147860)
%3 = and i32 %2, 1
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %7
6: ; preds = %1
br label %1
7: ; preds = %5
%8 = call i32 @GET32(i32 1059147840)
%9 = and i32 %8, 255
ret i32 %9
}

LLVM IR (-O2):
define i32 @uart_recv() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @GET32(i32 1059147860)
%3 = and i32 %2, 1
%4 = icmp eq i32 %3, 0
br i1 %4, label %1, label %5
5: ; preds = %1
%6 = tail call i32 @GET32(i32 1059147840)
%7 = and i32 %6, 255
ret i32 %7
}
/* Variables and functions */
int serial_getc();
int getc(void) { return serial_getc(); }


x86 assembly (clang, -O0):
<getc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <serial_getc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getc>:
xor    %eax,%eax
jmp    1030 <serial_getc@plt>

LLVM IR (-O0):
define i32 @getc() {
%1 = call i32 (...) @serial_getc()
ret i32 %1
}

LLVM IR (-O2):
define i32 @getc() {
%1 = tail call i32 (...) @serial_getc()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ DAY_5;
char *nl_langinfo(int /*<<< orphan*/);
char *langinfo_day_5() { return nl_langinfo(DAY_5); }


x86 assembly (clang, -O0):
<langinfo_day_5>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%edi
call   1030 <nl_langinfo@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<langinfo_day_5>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <nl_langinfo@plt>

LLVM IR (-O0):
@DAY_5 = global i32 0
define i8* @langinfo_day_5() {
%1 = load i32, i32* @DAY_5
%2 = call i8* @nl_langinfo(i32 %1)
ret i8* %2
}

LLVM IR (-O2):
@DAY_5 = global i32 0
define i8* @langinfo_day_5() {
%1 = load i32, i32* @DAY_5
%2 = tail call i8* @nl_langinfo(i32 %1)
ret i8* %2
}
int edge_reason_is_retriable(int reason) {
  return reason == 9 || reason == 11 || reason == 4 || reason == 2 ||
         reason == 1 || reason == 8;
}


x86 assembly (clang, -O0):
<edge_reason_is_retriable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x9,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115c <edge_reason_is_retriable+0x5c>
mov    $0x1,%al
cmpl   $0xb,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115c <edge_reason_is_retriable+0x5c>
mov    $0x1,%al
cmpl   $0x4,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115c <edge_reason_is_retriable+0x5c>
mov    $0x1,%al
cmpl   $0x2,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115c <edge_reason_is_retriable+0x5c>
mov    $0x1,%al
cmpl   $0x1,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115c <edge_reason_is_retriable+0x5c>
cmpl   $0x8,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<edge_reason_is_retriable>:
lea    -0x1(%rdi),%ecx
cmp    $0xb,%ecx
jae    1117 <edge_reason_is_retriable+0x17>
mov    $0x1,%eax
mov    $0x50b,%edx
bt     %ecx,%edx
jb     111f <edge_reason_is_retriable+0x1f>
xor    %eax,%eax
cmp    $0x8,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @edge_reason_is_retriable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 9
br i1 %4, label %20, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 11
br i1 %7, label %20, label %8
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 4
br i1 %10, label %20, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 2
br i1 %13, label %20, label %14
14: ; preds = %11
%15 = load i32, i32* %2
%16 = icmp eq i32 %15, 1
br i1 %16, label %20, label %17
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp eq i32 %18, 8
br label %20
20: ; preds = %17, %14, %11, %8, %5, %1
%21 = phi i1 [ true, %14 ], [ true, %11 ], [ true, %8 ], [ true, %5 ], [ true, %1 ], [ %19, %17 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @edge_reason_is_retriable(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 11
br i1 %3, label %7, label %4
4: ; preds = %7, %1
%5 = icmp eq i32 %0, 8
%6 = zext i1 %5 to i32
br label %12
7: ; preds = %1
%8 = trunc i32 %2 to i16
%9 = lshr i16 1291, %8
%10 = and i16 %9, 1
%11 = icmp eq i16 %10, 0
br i1 %11, label %4, label %12
12: ; preds = %7, %4
%13 = phi i32 [ %6, %4 ], [ 1, %7 ]
ret i32 %13
}
int get_features(void) {
  int features = 0;
  return features;
}


x86 assembly (clang, -O0):
<get_features>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_features>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_features() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @get_features() {
ret i32 0
}
/* Variables and functions */
double IEC_Scale(double);
double IEC_ScaleMax(double dB, double max) {
  return IEC_Scale(dB) / IEC_Scale(max);
}


x86 assembly (clang, -O0):
<IEC_ScaleMax>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <IEC_Scale@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <IEC_Scale@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IEC_ScaleMax>:
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
call   1030 <IEC_Scale@plt>
movsd  %xmm0,0x8(%rsp)
movsd  0x10(%rsp),%xmm0
call   1030 <IEC_Scale@plt>
movsd  0x8(%rsp),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @IEC_ScaleMax(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = call double @IEC_Scale(double %5)
%7 = load double, double* %4
%8 = call double @IEC_Scale(double %7)
%9 = fdiv double %6, %8
ret double %9
}

LLVM IR (-O2):
define double @IEC_ScaleMax(double %0, double %1) {
%3 = tail call double @IEC_Scale(double %0)
%4 = tail call double @IEC_Scale(double %1)
%5 = fdiv double %3, %4
ret double %5
}
signed int f5(signed int v_foo) {
  signed int v_shr = ((unsigned int)v_foo) >> 2;
  signed int v_and = v_shr & -8;
  return v_and;
}


x86 assembly (clang, -O0):
<f5>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x2,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfffffff8,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f5>:
mov    %edi,%eax
shr    $0x2,%eax
and    $0xfffffff8,%eax
ret

LLVM IR (-O0):
define i32 @f5(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = lshr i32 %5, 2
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = and i32 %7, -8
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @f5(i32 %0) {
%2 = lshr i32 %0, 2
%3 = and i32 %2, 1073741816
ret i32 %3
}
/* Variables and functions */
scalar_t__ rand_mod(int);
char rand_chr(void) { return (char)rand_mod(1 << (sizeof(char) << 3)); }


x86 assembly (clang, -O0):
<rand_chr>:
push   %rbp
mov    %rsp,%rbp
mov    $0x100,%edi
call   1030 <rand_mod@plt>
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_chr>:
push   %rax
mov    $0x100,%edi
call   1030 <rand_mod@plt>
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @rand_chr() {
%1 = call i64 @rand_mod(i32 256)
%2 = trunc i64 %1 to i8
ret i8 %2
}

LLVM IR (-O2):
define signext i8 @rand_chr() {
%1 = tail call i64 @rand_mod(i32 256)
%2 = trunc i64 %1 to i8
ret i8 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, int, int, int, int,
                           int, int, int);
void Write_Blob_Entry(FILE *Report, int Xcom, int Ycom, int Xmin, int Ymin,
                      int Xmax, int Ymax, int Area) {
  fprintf(Report, "   BE: %3d, %3d, %3d, %3d, %3d, %3d, %5d\n", Xcom, Ycom,
          Xmin, Ymin, Xmax, Ymax, Area);
}


x86 assembly (clang, -O0):
<Write_Blob_Entry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    %r9d,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    -0x18(%rbp),%r9d
mov    -0x1c(%rbp),%r11d
mov    0x10(%rbp),%r10d
mov    0x18(%rbp),%eax
lea    0xea9(%rip),%rsi
mov    %r11d,(%rsp)
mov    %r10d,0x8(%rsp)
mov    %eax,0x10(%rsp)
call   1030 <fprintf@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Write_Blob_Entry>:
push   %rax
mov    %r9d,%eax
mov    %r8d,%r9d
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    0x10(%rsp),%r10d
mov    0x18(%rsp),%r11d
sub    $0x8,%rsp
lea    0xecd(%rip),%rsi
push   %r11
push   %r10
push   %rax
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rax
ret

LLVM IR (-O0):
@.str = [42 x i8] c" BE: %3d, %3d, %3d, %3d, %3d, %3d, %5d\0A\00"
define void @Write_Blob_Entry(i32* %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) {
%9 = alloca i32*
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
store i32* %0, i32** %9
store i32 %1, i32* %10
store i32 %2, i32* %11
store i32 %3, i32* %12
store i32 %4, i32* %13
store i32 %5, i32* %14
store i32 %6, i32* %15
store i32 %7, i32* %16
%17 = load i32*, i32** %9
%18 = load i32, i32* %10
%19 = load i32, i32* %11
%20 = load i32, i32* %12
%21 = load i32, i32* %13
%22 = load i32, i32* %14
%23 = load i32, i32* %15
%24 = load i32, i32* %16
%25 = call i32 @fprintf(i32* %17, i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0), i32 %18, i32 %19, i32 %20, i32 %21, i32 %22, i32 %23, i32 %24)
ret void
}

LLVM IR (-O2):
@.str = [42 x i8] c" BE: %3d, %3d, %3d, %3d, %3d, %3d, %5d\0A\00"
define void @Write_Blob_Entry(i32* nocapture %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) {
%9 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0), i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ awful(int **);
int /*<<< orphan*/ printf(char *, int);
main() {
  int *p;
  awful(&p);
  printf("%d\n", *p);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
call   1040 <awful@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
lea    0xec2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    %rsp,%rdi
call   1040 <awful@plt>
mov    (%rsp),%rax
mov    (%rax),%esi
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32*
%2 = call i32 @awful(i32** %1)
%3 = load i32*, i32** %1
%4 = load i32, i32* %3
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32*
%2 = bitcast i32** %1 to i8*
%3 = call i32 @awful(i32** %1)
%4 = load i32*, i32** %1
%5 = load i32, i32* %4
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ e_absy();
int /*<<< orphan*/ e_and();
void e_and_absy() {
  e_absy();
  e_and();
}


x86 assembly (clang, -O0):
<e_and_absy>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <e_absy@plt>
mov    $0x0,%al
call   1030 <e_and@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_and_absy>:
push   %rax
xor    %eax,%eax
call   1040 <e_absy@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <e_and@plt>

LLVM IR (-O0):
define void @e_and_absy() {
%1 = call i32 (...) @e_absy()
%2 = call i32 (...) @e_and()
ret void
}

LLVM IR (-O2):
define void @e_and_absy() {
%1 = tail call i32 (...) @e_absy()
%2 = tail call i32 (...) @e_and()
ret void
}
void init(s, n) int s, n;
{
  int discctr;
  makenull(s);
  for (discctr = n; discctr >= 1; discctr--)
    push(discctr, s);
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1030 <makenull@plt>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jl     1163 <init+0x43>
mov    -0xc(%rbp),%edi
mov    -0x4(%rbp),%esi
mov    $0x0,%al
call   1040 <push@plt>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    113e <init+0x1e>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <makenull@plt>
test   %ebx,%ebx
jle    1155 <init+0x35>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %ebx,%edi
mov    %ebp,%esi
xor    %eax,%eax
call   1040 <push@plt>
lea    -0x1(%rbx),%eax
cmp    $0x1,%ebx
mov    %eax,%ebx
ja     1140 <init+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @init(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = call i32 (i32, ...) bitcast (i32 (...)* @makenull to i32 (i32, ...)*)(i32 %6)
%8 = load i32, i32* %4
store i32 %8, i32* %5
br label %9
9: ; preds = %16, %2
%10 = load i32, i32* %5
%11 = icmp sge i32 %10, 1
br i1 %11, label %12, label %19
12: ; preds = %9
%13 = load i32, i32* %5
%14 = load i32, i32* %3
%15 = call i32 (i32, i32, ...) bitcast (i32 (...)* @push to i32 (i32, i32, ...)*)(i32 %13, i32 %14)
br label %16
16: ; preds = %12
%17 = load i32, i32* %5
%18 = add nsw i32 %17, -1
store i32 %18, i32* %5
br label %9
19: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @init(i32 %0, i32 %1) {
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @makenull to i32 (i32, ...)*)(i32 %0)
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %10
5: ; preds = %2, %5
%6 = phi i32 [ %8, %5 ], [ %1, %2 ]
%7 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @push to i32 (i32, i32, ...)*)(i32 %6, i32 %0)
%8 = add nsw i32 %6, -1
%9 = icmp ugt i32 %6, 1
br i1 %9, label %5, label %10
10: ; preds = %5, %2
ret void
}
/* Variables and functions */
int identity(char);
void void_txor0(char x) { char y = (identity(x) ^ 0) ? 42 : 43; }


x86 assembly (clang, -O0):
<void_txor0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <identity@plt>
mov    %eax,%edx
xor    $0x0,%edx
mov    $0x2b,%eax
mov    $0x2a,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %al,-0x2(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<void_txor0>:
jmp    1030 <identity@plt>

LLVM IR (-O0):
define void @void_txor0(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = call i32 @identity(i8 signext %4)
%6 = xor i32 %5, 0
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 42, i32 43
%10 = trunc i32 %9 to i8
store i8 %10, i8* %3
ret void
}

LLVM IR (-O2):
define void @void_txor0(i8 signext %0) {
%2 = tail call i32 @identity(i8 signext %0)
ret void
}
int ChkDesDataLen(unsigned long len) { return (len & 0x7) != 0 ? (0) : (1); }


x86 assembly (clang, -O0):
<ChkDesDataLen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x7,%rdx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ChkDesDataLen>:
xor    %eax,%eax
test   $0x7,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @ChkDesDataLen(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 7
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 0, i32 1
ret i32 %7
}

LLVM IR (-O2):
define i32 @ChkDesDataLen(i64 %0) {
%2 = and i64 %0, 7
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
int reversa(long long int k) {
  long long int mod = 0;
  while (k > 0) {
    mod = mod * 10 + k % 10;
    k = k / 10;
  }
  return mod;
}


x86 assembly (clang, -O0):
<reversa>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
jle    1154 <reversa+0x54>
imul   $0xa,-0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    $0xa,%ecx
cqto
idiv   %rcx
mov    -0x18(%rbp),%rax
add    %rdx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    $0xa,%ecx
cqto
idiv   %rcx
mov    %rax,-0x8(%rbp)
jmp    1110 <reversa+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reversa>:
test   %rdi,%rdi
jle    114a <reversa+0x4a>
mov    %rdi,%rcx
xor    %eax,%eax
movabs $0xcccccccccccccccd,%r8
cc cc cc
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    (%rax,%rax,4),%rsi
mov    %rcx,%rax
mul    %r8
shr    $0x3,%rdx
lea    (%rdx,%rdx,1),%rax
lea    (%rax,%rax,4),%rax
mov    %rcx,%rdi
sub    %rax,%rdi
lea    (%rdi,%rsi,2),%rax
cmp    $0x9,%rcx
mov    %rdx,%rcx
ja     1120 <reversa+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @reversa(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
store i64 0, i64* %3
br label %4
4: ; preds = %7, %1
%5 = load i64, i64* %2
%6 = icmp sgt i64 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i64, i64* %3
%9 = mul nsw i64 %8, 10
%10 = load i64, i64* %2
%11 = srem i64 %10, 10
%12 = add nsw i64 %9, %11
store i64 %12, i64* %3
%13 = load i64, i64* %2
%14 = sdiv i64 %13, 10
store i64 %14, i64* %2
br label %4
15: ; preds = %4
%16 = load i64, i64* %3
%17 = trunc i64 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
define i32 @reversa(i64 %0) {
%2 = icmp sgt i64 %0, 0
br i1 %2, label %3, label %13
3: ; preds = %1, %3
%4 = phi i64 [ %8, %3 ], [ 0, %1 ]
%5 = phi i64 [ %9, %3 ], [ %0, %1 ]
%6 = mul nsw i64 %4, 10
%7 = urem i64 %5, 10
%8 = add nsw i64 %6, %7
%9 = udiv i64 %5, 10
%10 = icmp ult i64 %5, 10
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = trunc i64 %8 to i32
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 0, %1 ], [ %12, %11 ]
ret i32 %14
}
int test_imm_CCint16_mem(short *val) {
  return ((*val) & (-0xCC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CCint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffff34,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CCint16_mem>:
movzwl (%rdi),%eax
test   $0xff34,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CCint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -204
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_CCint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -204
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ bar(int);
int main(void) {
  bar(5);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x5,%edi
call   1030 <bar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
call   1030 <bar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @bar(i32 5)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @bar(i32 5)
ret i32 0
}
/* Type definitions */
struct timeval {
  unsigned int tv_usec;
  int /*<<< orphan*/ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ select(int /*<<< orphan*/, int /*<<< orphan*/ *,
                          int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                          struct timeval *);
unsigned millisleep(unsigned milliseconds) {
  struct timeval t = {.tv_sec = 0, .tv_usec = milliseconds * 1e3};
  select(0, NULL, NULL, NULL, &t);
  return milliseconds;
}


x86 assembly (clang, -O0):
<millisleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
cvtsi2sd %rax,%xmm0
movsd  0xed5(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rax
mov    %eax,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
xor    %edi,%edi
xor    %eax,%eax
mov    %eax,%ecx
lea    -0x10(%rbp),%r8
mov    %rcx,%rsi
mov    %rcx,%rdx
call   1030 <select@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<millisleep>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
imul   $0x3e8,%edi,%eax
mov    %eax,0x8(%rsp)
movl   $0x0,0xc(%rsp)
lea    0x8(%rsp),%r8
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
call   1030 <select@plt>
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define i32 @millisleep(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.timeval
store i32 %0, i32* %2
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i32 0, i32 0
%5 = load i32, i32* %2
%6 = uitofp i32 %5 to double
%7 = fmul double %6, 1.000000e+03
%8 = fptoui double %7 to i32
store i32 %8, i32* %4
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i32 0, i32 1
store i32 0, i32* %9
%10 = call i32 @select(i32 0, i32* null, i32* null, i32* null, %struct.timeval* %3)
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define i32 @millisleep(i32 returned %0) {
%2 = alloca %struct.timeval
%3 = bitcast %struct.timeval* %2 to i8*
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i64 0, i32 0
%5 = mul i32 %0, 1000
store i32 %5, i32* %4
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i64 0, i32 1
store i32 0, i32* %6
%7 = call i32 @select(i32 0, i32* null, i32* null, i32* null, %struct.timeval* %2)
ret i32 %0
}
/* Type definitions */
typedef int /*<<< orphan*/ GLint;
typedef int /*<<< orphan*/ GLenum;

/* Variables and functions */
int /*<<< orphan*/ __glMap1d_size(int /*<<< orphan*/);
__attribute__((visibility("internal"))) __attribute__((pure)) GLint
__glMap1f_size(GLenum e) {
  return __glMap1d_size(e);
}


x86 assembly (clang, -O0):
<__glMap1f_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <__glMap1d_size@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__glMap1f_size>:
jmp    1030 <__glMap1d_size@plt>

LLVM IR (-O0):
define hidden i32 @__glMap1f_size(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__glMap1d_size(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define hidden i32 @__glMap1f_size(i32 %0) {
%2 = tail call i32 @__glMap1d_size(i32 %0)
ret i32 %2
}
int test_imm_ADint64_midword_mem(long long *val) {
  return ((*val >> 16) & (0xAD << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_ADint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0xad,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_ADint64_midword_mem>:
testb  $0xad,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_ADint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 173
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_ADint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 11337728
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ HplAtm128GeneralIOPinP__1__IO__toggle();
void LedsP__Led1__toggle(void) { HplAtm128GeneralIOPinP__1__IO__toggle(); }


x86 assembly (clang, -O0):
<LedsP__Led1__toggle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplAtm128GeneralIOPinP__1__IO__toggle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LedsP__Led1__toggle>:
xor    %eax,%eax
jmp    1030 <HplAtm128GeneralIOPinP__1__IO__toggle@plt>

LLVM IR (-O0):
define void @LedsP__Led1__toggle() {
%1 = call i32 (...) @HplAtm128GeneralIOPinP__1__IO__toggle()
ret void
}

LLVM IR (-O2):
define void @LedsP__Led1__toggle() {
%1 = tail call i32 (...) @HplAtm128GeneralIOPinP__1__IO__toggle()
ret void
}