xunge/DecIR huggingface dataset:
int is_digit(char c) {
  if ((c >= '0' && c <= '9') || c == '.' || c == '+' || c == '-')
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<is_digit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1124 <is_digit+0x24>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jle    114b <is_digit+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x2e,%eax
je     114b <is_digit+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x2b,%eax
je     114b <is_digit+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x2d,%eax
jne    1157 <is_digit+0x57>
movl   $0x1,-0x4(%rbp)
jmp    115e <is_digit+0x5e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_digit>:
lea    -0x30(%rdi),%ecx
mov    $0x1,%eax
cmp    $0xa,%cl
jb     1127 <is_digit+0x27>
add    $0xd5,%dil
xor    %eax,%eax
cmp    $0x3,%dil
ja     1127 <is_digit+0x27>
movsbq %dil,%rax
lea    0xedc(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @is_digit(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %23, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 46
br i1 %14, label %23, label %15
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 43
br i1 %18, label %23, label %19
19: ; preds = %15
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %21, 45
br i1 %22, label %23, label %24
23: ; preds = %19, %15, %11, %7
store i32 1, i32* %2
br label %25
24: ; preds = %19
store i32 0, i32* %2
br label %25
25: ; preds = %24, %23
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
@switch.table.is_digit = [4 x i32] [i32 1, i32 0, i32 1, i32 1]
define i32 @is_digit(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = add i8 %0, -43
%6 = icmp ult i8 %5, 4
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = sext i8 %5 to i64
%9 = getelementptr inbounds [4 x i32], [4 x i32]* @switch.table.is_digit, i64 0, i64 %8
%10 = load i32, i32* %9
br label %11
11: ; preds = %4, %7, %1
%12 = phi i32 [ 1, %1 ], [ %10, %7 ], [ 0, %4 ]
ret i32 %12
}
void __atomic_spin() { asm volatile("pause" : : : "memory"); }


x86 assembly (clang, -O0):
<__atomic_spin>:
push   %rbp
mov    %rsp,%rbp
pause
pop    %rbp
ret

x86 assembly (clang, -O2):
<__atomic_spin>:
pause
ret

LLVM IR (-O0):
define void @__atomic_spin() {
ret void
}

LLVM IR (-O2):
define void @__atomic_spin() {
tail call void asm sideeffect "pause", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
void f7(void) {
  int i;
  typedef int *ptr;
  ptr arr[3];
  arr[0] = &i;
  (void)arr[0];
}


x86 assembly (clang, -O0):
<f7>:
push   %rbp
mov    %rsp,%rbp
lea    -0x4(%rbp),%rax
mov    %rax,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f7>:
ret

LLVM IR (-O0):
define void @f7() {
%1 = alloca i32
%2 = alloca [3 x i32*]
%3 = getelementptr inbounds [3 x i32*], [3 x i32*]* %2, i64 0, i64 0
store i32* %1, i32** %3
%4 = getelementptr inbounds [3 x i32*], [3 x i32*]* %2, i64 0, i64 0
%5 = load i32*, i32** %4
ret void
}

LLVM IR (-O2):
define void @f7() {
ret void
}
int host_is_bigendian(void) {
  static const union {
    unsigned int d;
    unsigned char endian[sizeof(unsigned int)];
  } x = {1};
  return x.endian[0] == 0;
}


x86 assembly (clang, -O0):
<host_is_bigendian>:
push   %rbp
mov    %rsp,%rbp
movzbl 0xef5(%rip),%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<host_is_bigendian>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%union.anon = type { i32 }
@host_is_bigendian.x = internal constant %union.anon { i32 1 }
define i32 @host_is_bigendian() {
%1 = load i8, i8* getelementptr inbounds ([4 x i8], [4 x i8]* bitcast (%union.anon* @host_is_bigendian.x to [4 x i8]*), i64 0, i64 0)
%2 = zext i8 %1 to i32
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @host_is_bigendian() {
ret i32 0
}
double linearHeaviside(double eps, double phi) {
  double H;
  if (phi > eps)
    H = 1.0;
  else if (phi < -eps)
    H = 0.0;
  else
    H = 0.5 * ((phi + eps) / eps);
  return H;
}


x86 assembly (clang, -O0):
<linearHeaviside>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    1130 <linearHeaviside+0x30>
movsd  0xee2(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    118d <linearHeaviside+0x8d>
movsd  -0x10(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
ucomisd %xmm1,%xmm0
jbe    1168 <linearHeaviside+0x68>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1188 <linearHeaviside+0x88>
movsd  -0x10(%rbp),%xmm1
addsd  -0x8(%rbp),%xmm1
divsd  -0x8(%rbp),%xmm1
movsd  0xe81(%rip),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    118d <linearHeaviside+0x8d>
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<linearHeaviside>:
ucomisd %xmm0,%xmm1
jbe    110f <linearHeaviside+0xf>
movsd  0xef2(%rip),%xmm0
ret
movapd 0xef9(%rip),%xmm3
xorpd  %xmm0,%xmm3
xorpd  %xmm2,%xmm2
ucomisd %xmm1,%xmm3
ja     1139 <linearHeaviside+0x39>
addsd  %xmm0,%xmm1
divsd  %xmm0,%xmm1
mulsd  0xed3(%rip),%xmm1
movapd %xmm1,%xmm2
movapd %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @linearHeaviside(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %4
%7 = load double, double* %3
%8 = fcmp ogt double %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store double 1.000000e+00, double* %5
br label %24
10: ; preds = %2
%11 = load double, double* %4
%12 = load double, double* %3
%13 = fneg double %12
%14 = fcmp olt double %11, %13
br i1 %14, label %15, label %16
15: ; preds = %10
store double 0.000000e+00, double* %5
br label %23
16: ; preds = %10
%17 = load double, double* %4
%18 = load double, double* %3
%19 = fadd double %17, %18
%20 = load double, double* %3
%21 = fdiv double %19, %20
%22 = fmul double 5.000000e-01, %21
store double %22, double* %5
br label %23
23: ; preds = %16, %15
br label %24
24: ; preds = %23, %9
%25 = load double, double* %5
ret double %25
}

LLVM IR (-O2):
define double @linearHeaviside(double %0, double %1) {
%3 = fcmp ogt double %1, %0
br i1 %3, label %11, label %4
4: ; preds = %2
%5 = fneg double %0
%6 = fcmp ogt double %5, %1
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = fadd double %0, %1
%9 = fdiv double %8, %0
%10 = fmul double %9, 5.000000e-01
br label %11
11: ; preds = %4, %2, %7
%12 = phi double [ %10, %7 ], [ 1.000000e+00, %2 ], [ 0.000000e+00, %4 ]
ret double %12
}
/* Type definitions */
typedef int /*<<< orphan*/ regex_t;

/* Variables and functions */
int /*<<< orphan*/ regfree(int /*<<< orphan*/ *);
void Regfree(void *re) { regfree((regex_t *)re); }


x86 assembly (clang, -O0):
<Regfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <regfree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Regfree>:
jmp    1030 <regfree@plt>

LLVM IR (-O0):
define void @Regfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = call i32 @regfree(i32* %4)
ret void
}

LLVM IR (-O2):
define void @Regfree(i8* %0) {
%2 = bitcast i8* %0 to i32*
%3 = tail call i32 @regfree(i32* %2)
ret void
}
__attribute__((visibility("default"))) const float xfminf(float x, float y) {
  return y != y ? x : (x < y ? x : y);
}


x86 assembly (clang, -O0):
<xfminf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
jne    1128 <xfminf+0x28>
jp     1128 <xfminf+0x28>
jmp    1137 <xfminf+0x37>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    116d <xfminf+0x6d>
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1159 <xfminf+0x59>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
jmp    1163 <xfminf+0x63>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfminf>:
movaps %xmm1,%xmm2
cmpunordss %xmm1,%xmm2
movaps %xmm2,%xmm3
andps  %xmm0,%xmm3
minss  %xmm1,%xmm0
andnps %xmm0,%xmm2
orps   %xmm3,%xmm2
movaps %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @xfminf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %4
%6 = load float, float* %4
%7 = fcmp une float %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load float, float* %3
br label %20
10: ; preds = %2
%11 = load float, float* %3
%12 = load float, float* %4
%13 = fcmp olt float %11, %12
br i1 %13, label %14, label %16
14: ; preds = %10
%15 = load float, float* %3
br label %18
16: ; preds = %10
%17 = load float, float* %4
br label %18
18: ; preds = %16, %14
%19 = phi float [ %15, %14 ], [ %17, %16 ]
br label %20
20: ; preds = %18, %8
%21 = phi float [ %9, %8 ], [ %19, %18 ]
ret float %21
}

LLVM IR (-O2):
define float @xfminf(float %0, float %1) {
%3 = fcmp uno float %1, 0.000000e+00
%4 = fcmp olt float %0, %1
%5 = or i1 %3, %4
%6 = select i1 %5, float %0, float %1
ret float %6
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int64_t sum_consec_squares(int64_t n) {
  return (n * (n + 1) * (2 * n + 1)) / 6;
}


x86 assembly (clang, -O0):
<sum_consec_squares>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
add    $0x1,%ecx
imul   %ecx,%eax
mov    -0x4(%rbp),%ecx
shl    $0x1,%ecx
add    $0x1,%ecx
imul   %ecx,%eax
mov    $0x6,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum_consec_squares>:
lea    0x1(%rdi),%eax
imul   %edi,%eax
lea    (%rdi,%rdi,1),%ecx
add    $0x1,%ecx
imul   %eax,%ecx
movslq %ecx,%rax
imul   $0x2aaaaaab,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
shr    $0x20,%rax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @sum_consec_squares(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
%6 = mul nsw i32 %3, %5
%7 = load i32, i32* %2
%8 = mul nsw i32 2, %7
%9 = add nsw i32 %8, 1
%10 = mul nsw i32 %6, %9
%11 = sdiv i32 %10, 6
ret i32 %11
}

LLVM IR (-O2):
define i32 @sum_consec_squares(i32 %0) {
%2 = add nsw i32 %0, 1
%3 = mul nsw i32 %2, %0
%4 = shl nsw i32 %0, 1
%5 = or i32 %4, 1
%6 = mul nsw i32 %3, %5
%7 = sdiv i32 %6, 6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0x8a() {
  Assert_real((isalnum(138) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              695, ("isalnum should be 0 for 0x8a"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x8a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8a,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2b7,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x8a>:
push   %rax
mov    $0x8a,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2b7,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x8a\00"
define void @t_isalnum_0x8a() {
%1 = call i64 @isalnum(i32 138)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 695, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x8a\00"
define void @t_isalnum_0x8a() {
%1 = tail call i64 @isalnum(i32 138)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 695, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ svcExitThread();
void pthread_exit(void *retval) {
  (void)retval;
  svcExitThread();
}


x86 assembly (clang, -O0):
<pthread_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <svcExitThread@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_exit>:
xor    %eax,%eax
jmp    1030 <svcExitThread@plt>

LLVM IR (-O0):
define void @pthread_exit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (...) @svcExitThread()
ret void
}

LLVM IR (-O2):
define void @pthread_exit(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @svcExitThread()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ T(int *);
long fff(int *);
long F2(int *node) {
  long call_result = 0;
  if (call_result = fff(node))
    goto error_free_node;
  T(node);
  return 0;
error_free_node:
  T(node);
  return call_result;
}


x86 assembly (clang, -O0):
<F2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <fff@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
je     1150 <F2+0x30>
jmp    1166 <F2+0x46>
mov    -0x10(%rbp),%rdi
call   1030 <T@plt>
movq   $0x0,-0x8(%rbp)
jmp    1177 <F2+0x57>
mov    -0x10(%rbp),%rdi
call   1030 <T@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<F2>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <fff@plt>
mov    %rax,%r14
mov    %rbx,%rdi
call   1030 <T@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @F2(i32* %0) {
%2 = alloca i64
%3 = alloca i32*
%4 = alloca i64
store i32* %0, i32** %3
store i64 0, i64* %4
%5 = load i32*, i32** %3
%6 = call i64 @fff(i32* %5)
store i64 %6, i64* %4
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
br label %12
9: ; preds = %1
%10 = load i32*, i32** %3
%11 = call i32 @T(i32* %10)
store i64 0, i64* %2
br label %16
12: ; preds = %8
%13 = load i32*, i32** %3
%14 = call i32 @T(i32* %13)
%15 = load i64, i64* %4
store i64 %15, i64* %2
br label %16
16: ; preds = %12, %9
%17 = load i64, i64* %2
ret i64 %17
}

LLVM IR (-O2):
define i64 @F2(i32* %0) {
%2 = tail call i64 @fff(i32* %0)
%3 = tail call i32 @T(i32* %0)
ret i64 %2
}
float p0(float f) { return 2 * f; }


x86 assembly (clang, -O0):
<p0>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<p0>:
addss  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @p0(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float 2.000000e+00, %3
ret float %4
}

LLVM IR (-O2):
define float @p0(float %0) {
%2 = fmul float %0, 2.000000e+00
ret float %2
}
void WatchdogLock(unsigned long ulBase) {
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000C00))) = 0x00000001;
}


x86 assembly (clang, -O0):
<WatchdogLock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movq   $0x1,0xc00(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<WatchdogLock>:
movq   $0x1,0xc00(%rdi)
ret

LLVM IR (-O0):
define void @WatchdogLock(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 3072
%5 = inttoptr i64 %4 to i64*
store volatile i64 1, i64* %5
ret void
}

LLVM IR (-O2):
define void @WatchdogLock(i64 %0) {
%2 = add i64 %0, 3072
%3 = inttoptr i64 %2 to i64*
store volatile i64 1, i64* %3
ret void
}
double B2(double t) {
  double tmp = 1.0 - t;
  return 3 * t * t * tmp;
}


x86 assembly (clang, -O0):
<B2>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm0
subsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xedd(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<B2>:
movsd  0xef8(%rip),%xmm1
subsd  %xmm0,%xmm1
movsd  0xef4(%rip),%xmm2
mulsd  %xmm0,%xmm2
mulsd  %xmm2,%xmm0
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @B2(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fsub double 1.000000e+00, %4
store double %5, double* %3
%6 = load double, double* %2
%7 = fmul double 3.000000e+00, %6
%8 = load double, double* %2
%9 = fmul double %7, %8
%10 = load double, double* %3
%11 = fmul double %9, %10
ret double %11
}

LLVM IR (-O2):
define double @B2(double %0) {
%2 = fsub double 1.000000e+00, %0
%3 = fmul double %0, 3.000000e+00
%4 = fmul double %3, %0
%5 = fmul double %2, %4
ret double %5
}
const char *mim_version_string(void) {
  return "0"
         "."
         "0"
         "."
         "0"
         "-"
         "dev";
}


x86 assembly (clang, -O0):
<mim_version_string>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mim_version_string>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [10 x i8] c"0.0.0-dev\00"
define i8* @mim_version_string() {
ret i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [10 x i8] c"0.0.0-dev\00"
define i8* @mim_version_string() {
ret i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct timeval {
  int dummy;
};

/* Variables and functions */
int periodic_timer_expired(struct timeval *, int /*<<< orphan*/);
int timer_expired(struct timeval *t_timeout) {
  return periodic_timer_expired(t_timeout, 0);
}


x86 assembly (clang, -O0):
<timer_expired>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <periodic_timer_expired@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timer_expired>:
xor    %esi,%esi
jmp    1030 <periodic_timer_expired@plt>

LLVM IR (-O0):
%struct.timeval = type { i32 }
define i32 @timer_expired(%struct.timeval* %0) {
%2 = alloca %struct.timeval*
store %struct.timeval* %0, %struct.timeval** %2
%3 = load %struct.timeval*, %struct.timeval** %2
%4 = call i32 @periodic_timer_expired(%struct.timeval* %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
define i32 @timer_expired(%struct.timeval* %0) {
%2 = tail call i32 @periodic_timer_expired(%struct.timeval* %0, i32 0)
ret i32 %2
}
void ff_hevc_put_hevc_epel_v24_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_epel_v24_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_epel_v24_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_epel_v24_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_epel_v24_10_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bah();
int /*<<< orphan*/ bar();
int /*<<< orphan*/ baz();
int /*<<< orphan*/ foo();
int main(void) {
  foo();
  bar();
  baz();
  bah();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1060 <foo@plt>
mov    $0x0,%al
call   1050 <bar@plt>
mov    $0x0,%al
call   1030 <baz@plt>
mov    $0x0,%al
call   1040 <bah@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <foo@plt>
xor    %eax,%eax
call   1050 <bar@plt>
xor    %eax,%eax
call   1030 <baz@plt>
xor    %eax,%eax
call   1040 <bah@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @foo()
%3 = call i32 (...) @bar()
%4 = call i32 (...) @baz()
%5 = call i32 (...) @bah()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @foo()
%2 = tail call i32 (...) @bar()
%3 = tail call i32 (...) @baz()
%4 = tail call i32 (...) @bah()
ret i32 0
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t get_word(uint8_t *loc, uint32_t image_addr) {
  uint16_t b0 = loc[image_addr + 0] << 8;
  uint8_t b1 = loc[image_addr + 1];
  return 0x0000 | b0 | b1;
}


x86 assembly (clang, -O0):
<get_word>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
add    $0x0,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
shl    $0x8,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
or     $0x0,%eax
or     -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_word>:
movslq %esi,%rcx
mov    (%rdi,%rcx,4),%eax
shl    $0x8,%eax
or     0x4(%rdi,%rcx,4),%eax
ret

LLVM IR (-O0):
define i32 @get_word(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%7 = load i32*, i32** %3
%8 = load i32, i32* %4
%9 = add nsw i32 %8, 0
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %7, i64 %10
%12 = load i32, i32* %11
%13 = shl i32 %12, 8
store i32 %13, i32* %5
%14 = load i32*, i32** %3
%15 = load i32, i32* %4
%16 = add nsw i32 %15, 1
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %14, i64 %17
%19 = load i32, i32* %18
store i32 %19, i32* %6
%20 = load i32, i32* %5
%21 = or i32 0, %20
%22 = load i32, i32* %6
%23 = or i32 %21, %22
ret i32 %23
}

LLVM IR (-O2):
define i32 @get_word(i32* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i32, i32* %0, i64 %3
%5 = load i32, i32* %4
%6 = shl i32 %5, 8
%7 = add nsw i32 %1, 1
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = or i32 %6, %10
ret i32 %11
}
/* Type definitions */
typedef int uint32_t;
typedef int original;

/* Variables and functions */
uint32_t byte_swap4(uint32_t original) {
  uint32_t swapped;
  swapped = (((original)&0xff00ff00) >> 8) | (((original)&0x00ff00ff) << 8);
  swapped = ((swapped & 0xffff0000) >> 16) | ((swapped & 0x0000ffff) << 16);
  return swapped;
}


x86 assembly (clang, -O0):
<byte_swap4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00ff00,%eax
shr    $0x8,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00ff,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xffff0000,%eax
shr    $0x10,%eax
mov    -0x8(%rbp),%ecx
and    $0xffff,%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<byte_swap4>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @byte_swap4(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = and i32 %4, -16711936
%6 = lshr i32 %5, 8
%7 = load i32, i32* %2
%8 = and i32 %7, 16711935
%9 = shl i32 %8, 8
%10 = or i32 %6, %9
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = and i32 %11, -65536
%13 = lshr i32 %12, 16
%14 = load i32, i32* %3
%15 = and i32 %14, 65535
%16 = shl i32 %15, 16
%17 = or i32 %13, %16
store i32 %17, i32* %3
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @byte_swap4(i32 %0) {
%2 = tail call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
void exchange(unsigned int *a, unsigned int *b) {
  unsigned int tmp;
  tmp = *a;
  *a = *b;
  *b = tmp;
}


x86 assembly (clang, -O0):
<exchange>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<exchange>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @exchange(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @exchange(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
/* Variables and functions */
scalar_t__ halt3();
scalar_t__ unknown_nohalt();
int test18() { (void)(unknown_nohalt() && halt3()); }


x86 assembly (clang, -O0):
<test18>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <unknown_nohalt@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
je     1152 <test18+0x32>
mov    $0x0,%al
call   1030 <halt3@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test18>:
push   %rax
xor    %eax,%eax
call   1040 <unknown_nohalt@plt>
test   %rax,%rax
je     1134 <test18+0x14>
xor    %eax,%eax
call   1030 <halt3@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @test18() {
%1 = alloca i32
%2 = call i64 (...) @unknown_nohalt()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %7
4: ; preds = %0
%5 = call i64 (...) @halt3()
%6 = icmp ne i64 %5, 0
br label %7
7: ; preds = %4, %0
%8 = phi i1 [ false, %0 ], [ %6, %4 ]
%9 = zext i1 %8 to i32
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
define i32 @test18() {
%1 = tail call i64 (...) @unknown_nohalt()
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i64 (...) @halt3()
br label %5
5: ; preds = %3, %0
ret i32 undef
}
struct rfkill_data *rfkill_init(struct rfkill_config *cfg) {
  return (void *)1;
}


x86 assembly (clang, -O0):
<rfkill_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rfkill_init>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.rfkill_data = type opaque
%struct.rfkill_config = type opaque
define %struct.rfkill_data* @rfkill_init(%struct.rfkill_config* %0) {
%2 = alloca %struct.rfkill_config*
store %struct.rfkill_config* %0, %struct.rfkill_config** %2
ret %struct.rfkill_data* inttoptr (i64 1 to %struct.rfkill_data*)
}

LLVM IR (-O2):
%struct.rfkill_data = type opaque
%struct.rfkill_config = type opaque
define %struct.rfkill_data* @rfkill_init(%struct.rfkill_config* nocapture readnone %0) {
ret %struct.rfkill_data* inttoptr (i64 1 to %struct.rfkill_data*)
}
int ctype_digit(int c) { return c >= '0' && c <= '9'; }


x86 assembly (clang, -O0):
<ctype_digit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x30,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <ctype_digit+0x20>
cmpl   $0x39,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctype_digit>:
add    $0xffffffd0,%edi
xor    %eax,%eax
cmp    $0xa,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @ctype_digit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 48
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 57
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @ctype_digit(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
char getchar() { return 0; }


x86 assembly (clang, -O0):
<getchar>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getchar>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define signext i8 @getchar() {
ret i8 0
}

LLVM IR (-O2):
define signext i8 @getchar() {
ret i8 0
}
double log(double n) { return (4.5); }


x86 assembly (clang, -O0):
<log>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<log>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @log(double %0) {
%2 = alloca double
store double %0, double* %2
ret double 4.500000e+00
}

LLVM IR (-O2):
define double @log(double %0) {
ret double 4.500000e+00
}
/* Variables and functions */
int leaf();
int marker(int val) {
  leaf();
  return leaf() * val;
}


x86 assembly (clang, -O0):
<marker>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <leaf@plt>
mov    $0x0,%al
call   1030 <leaf@plt>
imul   -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<marker>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <leaf@plt>
xor    %eax,%eax
call   1030 <leaf@plt>
imul   %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @marker(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @leaf()
%4 = call i32 (...) @leaf()
%5 = load i32, i32* %2
%6 = mul nsw i32 %4, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @marker(i32 %0) {
%2 = tail call i32 (...) @leaf()
%3 = tail call i32 (...) @leaf()
%4 = mul nsw i32 %3, %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ check_vect();
int foo();
int main(void) {
  check_vect();
  return foo();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <check_vect@plt>
mov    $0x0,%al
call   1040 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <check_vect@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <foo@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @check_vect()
%3 = call i32 (...) @foo()
ret i32 %3
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @check_vect()
%2 = tail call i32 (...) @foo()
ret i32 %2
}
/* Variables and functions */
int PnameDef();
PpropertyNameDef() {
  int b = -1;
  ;
  b = PnameDef();
  return (b);
}


x86 assembly (clang, -O0):
<PpropertyNameDef>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xffffffff,-0x4(%rbp)
mov    $0x0,%al
call   1030 <PnameDef@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PpropertyNameDef>:
xor    %eax,%eax
jmp    1030 <PnameDef@plt>

LLVM IR (-O0):
define i32 @PpropertyNameDef() {
%1 = alloca i32
store i32 -1, i32* %1
%2 = call i32 (...) @PnameDef()
store i32 %2, i32* %1
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @PpropertyNameDef() {
%1 = tail call i32 (...) @PnameDef()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void usage(const char *a0) {
  fprintf(stderr, "Usage: %s private_key_file public_key_file\n", a0);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [44 x i8] c"Usage: %s private_key_file public_key_file\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [44 x i8] c"Usage: %s private_key_file public_key_file\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
const char *match_char(const char *p, char c) {
  if (!p)
    return 0;
  return *p == c ? ++p : 0;
}


x86 assembly (clang, -O0):
<match_char>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1126 <match_char+0x26>
movq   $0x0,-0x8(%rbp)
jmp    1161 <match_char+0x61>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x11(%rbp),%ecx
cmp    %ecx,%eax
jne    114e <match_char+0x4e>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    %rax,-0x20(%rbp)
jmp    1159 <match_char+0x59>
xor    %eax,%eax
mov    %rax,-0x20(%rbp)
jmp    1159 <match_char+0x59>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<match_char>:
test   %rdi,%rdi
je     1113 <match_char+0x13>
lea    0x1(%rdi),%rcx
xor    %eax,%eax
cmp    %sil,(%rdi)
cmove  %rcx,%rax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @match_char(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %9, label %8
8: ; preds = %2
store i8* null, i8** %3
br label %22
9: ; preds = %2
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = load i8, i8* %5
%14 = sext i8 %13 to i32
%15 = icmp eq i32 %12, %14
br i1 %15, label %16, label %19
16: ; preds = %9
%17 = load i8*, i8** %4
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %4
br label %20
19: ; preds = %9
br label %20
20: ; preds = %19, %16
%21 = phi i8* [ %18, %16 ], [ null, %19 ]
store i8* %21, i8** %3
br label %22
22: ; preds = %20, %8
%23 = load i8*, i8** %3
ret i8* %23
}

LLVM IR (-O2):
define i8* @match_char(i8* %0, i8 signext %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = load i8, i8* %0
%6 = icmp eq i8 %5, %1
%7 = getelementptr inbounds i8, i8* %0, i64 1
%8 = select i1 %6, i8* %7, i8* null
br label %9
9: ; preds = %2, %4
%10 = phi i8* [ %8, %4 ], [ null, %2 ]
ret i8* %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int main() {
  char string[] = "abc";
  printf("Here's your string: '%s'\n", string);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xedb(%rip),%eax
mov    %eax,-0x8(%rbp)
lea    -0x8(%rbp),%rsi
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x636261,0x4(%rsp)
lea    0xee0(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.main.string = [4 x i8] c"abc\00"
@.str = [26 x i8] c"Here's your string: '%s'\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [4 x i8]
store i32 0, i32* %1
%3 = bitcast [4 x i8]* %2 to i8*
%4 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%5 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i8* %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [26 x i8] c"Here's your string: '%s'\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 6513249, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i8* %2)
ret i32 0
}
int getTotalXorOfSubarrayXors(int array[], int n) {
  int res = 0;
  for (int i = 0; i < n; ++i)
    for (int j = i; i < n; j++)
      res = res ^ array[j];
  return res;
}


x86 assembly (clang, -O0):
<getTotalXorOfSubarrayXors>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1169 <getTotalXorOfSubarrayXors+0x69>
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1156 <getTotalXorOfSubarrayXors+0x56>
mov    -0x10(%rbp),%eax
mov    -0x8(%rbp),%rcx
movslq -0x18(%rbp),%rdx
xor    (%rcx,%rdx,4),%eax
mov    %eax,-0x10(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    112b <getTotalXorOfSubarrayXors+0x2b>
jmp    115b <getTotalXorOfSubarrayXors+0x5b>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1119 <getTotalXorOfSubarrayXors+0x19>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getTotalXorOfSubarrayXors>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @getTotalXorOfSubarrayXors(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %6
br label %8
8: ; preds = %30, %2
%9 = load i32, i32* %6
%10 = load i32, i32* %4
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %33
12: ; preds = %8
%13 = load i32, i32* %6
store i32 %13, i32* %7
br label %14
14: ; preds = %26, %12
%15 = load i32, i32* %6
%16 = load i32, i32* %4
%17 = icmp slt i32 %15, %16
br i1 %17, label %18, label %29
18: ; preds = %14
%19 = load i32, i32* %5
%20 = load i32*, i32** %3
%21 = load i32, i32* %7
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i32, i32* %20, i64 %22
%24 = load i32, i32* %23
%25 = xor i32 %19, %24
store i32 %25, i32* %5
br label %26
26: ; preds = %18
%27 = load i32, i32* %7
%28 = add nsw i32 %27, 1
store i32 %28, i32* %7
br label %14
29: ; preds = %14
br label %30
30: ; preds = %29
%31 = load i32, i32* %6
%32 = add nsw i32 %31, 1
store i32 %32, i32* %6
br label %8
33: ; preds = %8
%34 = load i32, i32* %5
ret i32 %34
}

LLVM IR (-O2):
define i32 @getTotalXorOfSubarrayXors(i32* nocapture readnone %0, i32 %1) {
%3 = icmp slt i32 %1, 1
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ btree_keyval(int, int /*<<< orphan*/, char *);
int /*<<< orphan*/ btree_nextkey(int, int /*<<< orphan*/);
int g_next_fileobject(int file_id, char *label) {
  if (!btree_nextkey(file_id, 0))
    return -1;
  btree_keyval(file_id, 0, label);
  label[32] = '\0';
  return 0;
}


x86 assembly (clang, -O0):
<g_next_fileobject>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
xor    %esi,%esi
call   1030 <btree_nextkey@plt>
cmp    $0x0,%eax
jne    114e <g_next_fileobject+0x2e>
movl   $0xffffffff,-0x4(%rbp)
jmp    116b <g_next_fileobject+0x4b>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rdx
xor    %esi,%esi
call   1040 <btree_keyval@plt>
mov    -0x10(%rbp),%rax
movb   $0x0,0x20(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_next_fileobject>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %edi,%ebp
xor    %r14d,%r14d
xor    %esi,%esi
call   1030 <btree_nextkey@plt>
test   %eax,%eax
je     1149 <g_next_fileobject+0x29>
mov    %ebp,%edi
xor    %esi,%esi
mov    %rbx,%rdx
call   1040 <btree_keyval@plt>
movb   $0x0,0x20(%rbx)
jmp    114f <g_next_fileobject+0x2f>
mov    $0xffffffff,%r14d
mov    %r14d,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @g_next_fileobject(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
%6 = load i32, i32* %4
%7 = call i32 @btree_nextkey(i32 %6, i32 0)
%8 = icmp ne i32 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %2
store i32 -1, i32* %3
br label %16
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i8*, i8** %5
%13 = call i32 @btree_keyval(i32 %11, i32 0, i8* %12)
%14 = load i8*, i8** %5
%15 = getelementptr inbounds i8, i8* %14, i64 32
store i8 0, i8* %15
store i32 0, i32* %3
br label %16
16: ; preds = %10, %9
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @g_next_fileobject(i32 %0, i8* %1) {
%3 = tail call i32 @btree_nextkey(i32 %0, i32 0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @btree_keyval(i32 %0, i32 0, i8* %1)
%7 = getelementptr inbounds i8, i8* %1, i64 32
store i8 0, i8* %7
br label %8
8: ; preds = %2, %5
%9 = phi i32 [ 0, %5 ], [ -1, %2 ]
ret i32 %9
}
void _print_na(char a, int b) {
  while (b > 0) {
    b = b - 1;
    printf(a);
  }
}


x86 assembly (clang, -O0):
<_print_na>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1145 <_print_na+0x35>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
movsbq -0x1(%rbp),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
jmp    1121 <_print_na+0x11>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_print_na>:
push   %r14
push   %rbx
push   %rax
test   %esi,%esi
jle    1142 <_print_na+0x32>
mov    %esi,%ebx
movsbq %dil,%r14
add    $0x1,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %r14,%rdi
xor    %eax,%eax
call   1030 <printf@plt>
add    $0xffffffff,%ebx
cmp    $0x1,%ebx
ja     1130 <_print_na+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @_print_na(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
br label %5
5: ; preds = %8, %2
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %5
%9 = load i32, i32* %4
%10 = sub nsw i32 %9, 1
store i32 %10, i32* %4
%11 = load i8, i8* %3
%12 = sext i8 %11 to i64
%13 = inttoptr i64 %12 to i8*
%14 = call i32 (i8*, ...) @printf(i8* %13)
br label %5
15: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @_print_na(i8 signext %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %12
4: ; preds = %2
%5 = sext i8 %0 to i64
%6 = inttoptr i64 %5 to i8*
br label %7
7: ; preds = %4, %7
%8 = phi i32 [ %1, %4 ], [ %9, %7 ]
%9 = add nsw i32 %8, -1
%10 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) %6)
%11 = icmp ugt i32 %8, 1
br i1 %11, label %7, label %12
12: ; preds = %7, %2
ret void
}
/* Type definitions */
typedef scalar_t__ volatile uint8_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
void GPIOADCTriggerEnable(uint32_t ui32Port, uint8_t ui8Pins) {
  ;
  (*((volatile uint32_t *)(ui32Port + 0x00000530))) |= ui8Pins;
}


x86 assembly (clang, -O0):
<GPIOADCTriggerEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x530(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x530(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOADCTriggerEnable>:
mov    %rsi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
or     %rax,0x530(%rdi)
ret

LLVM IR (-O0):
define void @GPIOADCTriggerEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = load i64, i64* %3
%7 = add nsw i64 %6, 1328
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = or i64 %9, %5
store volatile i64 %10, i64* %8
ret void
}

LLVM IR (-O2):
define void @GPIOADCTriggerEnable(i64 %0, i64 %1) {
%3 = alloca i64
store volatile i64 %1, i64* %3
%4 = load volatile i64, i64* %3
%5 = add nsw i64 %0, 1328
%6 = inttoptr i64 %5 to i64*
%7 = load volatile i64, i64* %6
%8 = or i64 %7, %4
store volatile i64 %8, i64* %6
ret void
}
unsigned int get_flit_payload(unsigned int flit) {
  return (flit & 0b00011111111111111111111111111110) >> 1;
}


x86 assembly (clang, -O0):
<get_flit_payload>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1ffffffe,%eax
shr    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_flit_payload>:
mov    %edi,%eax
shr    %eax
and    $0xfffffff,%eax
ret

LLVM IR (-O0):
define i32 @get_flit_payload(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 536870910
%5 = lshr i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @get_flit_payload(i32 %0) {
%2 = lshr i32 %0, 1
%3 = and i32 %2, 268435455
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ end();
int /*<<< orphan*/ start();
int main() {
  start();
  end();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <start@plt>
mov    $0x0,%al
call   1030 <end@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <start@plt>
xor    %eax,%eax
call   1030 <end@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @start()
%3 = call i32 (...) @end()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @start()
%2 = tail call i32 (...) @end()
ret i32 0
}
int test_imm_45int8_mem(signed char *val) {
  return ((*val) & (0x45 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_45int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0x45,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_45int8_mem>:
testb  $0x45,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_45int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 69
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_45int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 69
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ _PROCEDURE_LINKAGE_TABLE_();
void vfork() {
  _PROCEDURE_LINKAGE_TABLE_();
  return;
}


x86 assembly (clang, -O0):
<vfork>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_PROCEDURE_LINKAGE_TABLE_@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vfork>:
xor    %eax,%eax
jmp    1030 <_PROCEDURE_LINKAGE_TABLE_@plt>

LLVM IR (-O0):
define void @vfork() {
%1 = call i32 (...) @_PROCEDURE_LINKAGE_TABLE_()
ret void
}

LLVM IR (-O2):
define void @vfork() {
%1 = tail call i32 (...) @_PROCEDURE_LINKAGE_TABLE_()
ret void
}
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ epoll61(struct __test_metadata *);
void wrapper_epoll61(struct __test_metadata *_metadata,
                     struct __fixture_variant_metadata *variant) {
  epoll61(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_epoll61>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <epoll61@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_epoll61>:
jmp    1030 <epoll61@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll61(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @epoll61(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll61(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @epoll61(%struct.__test_metadata* %0)
ret void
}