xunge/DecIR huggingface dataset:
int find_pininfo_num(struct gpio_control *control, const char *info) {
  return 0;
}


x86 assembly (clang, -O0):
<find_pininfo_num>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_pininfo_num>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.gpio_control = type opaque
define i32 @find_pininfo_num(%struct.gpio_control* %0, i8* %1) {
%3 = alloca %struct.gpio_control*
%4 = alloca i8*
store %struct.gpio_control* %0, %struct.gpio_control** %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
%struct.gpio_control = type opaque
define i32 @find_pininfo_num(%struct.gpio_control* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ VIM_SIF_I2cWriteByte(unsigned char, unsigned char);
void SensorSetReg_SP80818(unsigned char uAddr, unsigned short uVal) {
  VIM_SIF_I2cWriteByte((unsigned char)uAddr, (unsigned char)uVal);
}


x86 assembly (clang, -O0):
<SensorSetReg_SP80818>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x1(%rbp),%cl
mov    -0x4(%rbp),%ax
movzbl %cl,%edi
movzbl %al,%esi
call   1030 <VIM_SIF_I2cWriteByte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SensorSetReg_SP80818>:
movzbl %sil,%esi
jmp    1030 <VIM_SIF_I2cWriteByte@plt>

LLVM IR (-O0):
define void @SensorSetReg_SP80818(i8 zeroext %0, i16 zeroext %1) {
%3 = alloca i8
%4 = alloca i16
store i8 %0, i8* %3
store i16 %1, i16* %4
%5 = load i8, i8* %3
%6 = load i16, i16* %4
%7 = trunc i16 %6 to i8
%8 = call i32 @VIM_SIF_I2cWriteByte(i8 zeroext %5, i8 zeroext %7)
ret void
}

LLVM IR (-O2):
define void @SensorSetReg_SP80818(i8 zeroext %0, i16 zeroext %1) {
%3 = trunc i16 %1 to i8
%4 = tail call i32 @VIM_SIF_I2cWriteByte(i8 zeroext %0, i8 zeroext %3)
ret void
}
double Abs(double Nbr) {
  if (Nbr >= 0)
    return Nbr;
  else
    return -Nbr;
}


x86 assembly (clang, -O0):
<Abs>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     112a <Abs+0x2a>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    114b <Abs+0x4b>
movsd  -0x10(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Abs>:
movapd 0xef8(%rip),%xmm2
xorpd  %xmm0,%xmm2
xorpd  %xmm1,%xmm1
cmpnlesd %xmm0,%xmm1
andpd  %xmm1,%xmm2
andnpd %xmm0,%xmm1
orpd   %xmm2,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @Abs(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp oge double %4, 0.000000e+00
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load double, double* %3
store double %7, double* %2
br label %11
8: ; preds = %1
%9 = load double, double* %3
%10 = fneg double %9
store double %10, double* %2
br label %11
11: ; preds = %8, %6
%12 = load double, double* %2
ret double %12
}

LLVM IR (-O2):
define double @Abs(double %0) {
%2 = fcmp ult double %0, 0.000000e+00
%3 = fneg double %0
%4 = select i1 %2, double %3, double %0
ret double %4
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ android_memory_barrier();
extern void android_atomic_acquire_store(int32_t value, volatile int32_t *ptr) {
  *ptr = value;
  android_memory_barrier();
}


x86 assembly (clang, -O0):
<android_atomic_acquire_store>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    $0x0,%al
call   1030 <android_memory_barrier@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<android_atomic_acquire_store>:
mov    %edi,(%rsi)
xor    %eax,%eax
jmp    1030 <android_memory_barrier@plt>

LLVM IR (-O0):
define void @android_atomic_acquire_store(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
store volatile i32 %5, i32* %6
%7 = call i32 (...) @android_memory_barrier()
ret void
}

LLVM IR (-O2):
define void @android_atomic_acquire_store(i32 %0, i32* %1) {
store volatile i32 %0, i32* %1
%3 = tail call i32 (...) @android_memory_barrier()
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;
typedef scalar_t__ int32_t;

/* Variables and functions */
int after(uint32_t seq1, uint32_t seq2) { return (int32_t)(seq2 - seq1) < 0; }


x86 assembly (clang, -O0):
<after>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
sub    -0x8(%rbp),%rax
cmp    $0x0,%rax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<after>:
xor    %eax,%eax
cmp    %rdi,%rsi
setl   %al
ret

LLVM IR (-O0):
define i32 @after(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = sub nsw i64 %5, %6
%8 = icmp slt i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @after(i64 %0, i64 %1) {
%3 = icmp slt i64 %1, %0
%4 = zext i1 %3 to i32
ret i32 %4
}
int iapp_reconfig(struct hostapd_data *hapd, struct hostapd_config *oldconf,
                  struct hostapd_bss_config *oldbss) {
  return 0;
}


x86 assembly (clang, -O0):
<iapp_reconfig>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iapp_reconfig>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.hostapd_data = type opaque
%struct.hostapd_config = type opaque
%struct.hostapd_bss_config = type opaque
define i32 @iapp_reconfig(%struct.hostapd_data* %0, %struct.hostapd_config* %1, %struct.hostapd_bss_config* %2) {
%4 = alloca %struct.hostapd_data*
%5 = alloca %struct.hostapd_config*
%6 = alloca %struct.hostapd_bss_config*
store %struct.hostapd_data* %0, %struct.hostapd_data** %4
store %struct.hostapd_config* %1, %struct.hostapd_config** %5
store %struct.hostapd_bss_config* %2, %struct.hostapd_bss_config** %6
ret i32 0
}

LLVM IR (-O2):
%struct.hostapd_data = type opaque
%struct.hostapd_config = type opaque
%struct.hostapd_bss_config = type opaque
define i32 @iapp_reconfig(%struct.hostapd_data* nocapture readnone %0, %struct.hostapd_config* nocapture readnone %1, %struct.hostapd_bss_config* nocapture readnone %2) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void end_graphmode(FILE *fd) { fprintf(fd, "\f\033@"); }


x86 assembly (clang, -O0):
<end_graphmode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<end_graphmode>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
mov    $0x3,%esi
mov    $0x1,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"\0C\1B@\00"
define void @end_graphmode(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"\0C\1B@\00"
define void @end_graphmode(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 3, i64 1, i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cpu_hog(int);
int /*<<< orphan*/ memory_hog(int, int, int, int);
int main() {
  while (1) {
    memory_hog(20, 1, 4, 1);
    cpu_hog(6);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x14,%edi
mov    $0x1,%ecx
mov    $0x4,%edx
mov    %ecx,%esi
call   1030 <memory_hog@plt>
mov    $0x6,%edi
call   1040 <cpu_hog@plt>
jmp    112f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x14,%edi
mov    $0x1,%esi
mov    $0x4,%edx
mov    $0x1,%ecx
call   1030 <memory_hog@plt>
mov    $0x6,%edi
call   1040 <cpu_hog@plt>
jmp    1130 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0, %2
%3 = call i32 @memory_hog(i32 20, i32 1, i32 4, i32 1)
%4 = call i32 @cpu_hog(i32 6)
br label %2
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 @memory_hog(i32 20, i32 1, i32 4, i32 1)
%3 = tail call i32 @cpu_hog(i32 6)
br label %1
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t popcount64(uint64_t x) {
  uint64_t m1 = 0x5555555555555555ll;
  uint64_t m2 = 0x3333333333333333ll;
  uint64_t m4 = 0x0F0F0F0F0F0F0F0Fll;
  uint64_t h01 = 0x0101010101010101ll;
  x -= (x >> 1) & m1;
  x = (x & m2) + ((x >> 2) & m2);
  x = (x + (x >> 4)) & m4;
  return (x * h01) >> 56;
}


x86 assembly (clang, -O0):
<popcount64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x55555555,-0x8(%rbp)
movl   $0x33333333,-0xc(%rbp)
movl   $0xf0f0f0f,-0x10(%rbp)
movl   $0x1010101,-0x14(%rbp)
mov    -0x4(%rbp),%ecx
sar    $0x1,%ecx
and    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x2,%ecx
and    -0xc(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x4,%ecx
add    %ecx,%eax
and    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x14(%rbp),%eax
mov    $0x38,%ecx
sar    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<popcount64>:
ret

LLVM IR (-O0):
define i32 @popcount64(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %2
store i32 1431655765, i32* %3
store i32 858993459, i32* %4
store i32 252645135, i32* %5
store i32 16843009, i32* %6
%7 = load i32, i32* %2
%8 = ashr i32 %7, 1
%9 = load i32, i32* %3
%10 = and i32 %8, %9
%11 = load i32, i32* %2
%12 = sub nsw i32 %11, %10
store i32 %12, i32* %2
%13 = load i32, i32* %2
%14 = load i32, i32* %4
%15 = and i32 %13, %14
%16 = load i32, i32* %2
%17 = ashr i32 %16, 2
%18 = load i32, i32* %4
%19 = and i32 %17, %18
%20 = add nsw i32 %15, %19
store i32 %20, i32* %2
%21 = load i32, i32* %2
%22 = load i32, i32* %2
%23 = ashr i32 %22, 4
%24 = add nsw i32 %21, %23
%25 = load i32, i32* %5
%26 = and i32 %24, %25
store i32 %26, i32* %2
%27 = load i32, i32* %2
%28 = load i32, i32* %6
%29 = mul nsw i32 %27, %28
%30 = ashr i32 %29, 56
ret i32 %30
}

LLVM IR (-O2):
define i32 @popcount64(i32 %0) {
ret i32 poison
}
/* Variables and functions */
double cbrt(double);
double radius_from_volume(double radius_equat_minor, double radius_equat_major,
                          double radius_polar) {
  return cbrt(radius_equat_minor * radius_equat_major * radius_polar);
}


x86 assembly (clang, -O0):
<radius_from_volume>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
call   1030 <cbrt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<radius_from_volume>:
mulsd  %xmm1,%xmm0
mulsd  %xmm2,%xmm0
jmp    1030 <cbrt@plt>

LLVM IR (-O0):
define double @radius_from_volume(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = fmul double %7, %8
%10 = load double, double* %6
%11 = fmul double %9, %10
%12 = call double @cbrt(double %11)
ret double %12
}

LLVM IR (-O2):
define double @radius_from_volume(double %0, double %1, double %2) {
%4 = fmul double %0, %1
%5 = fmul double %4, %2
%6 = tail call double @cbrt(double %5)
ret double %6
}
void null_destroy(struct codec *c) {}


x86 assembly (clang, -O0):
<null_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_destroy>:
ret

LLVM IR (-O0):
%struct.codec = type opaque
define void @null_destroy(%struct.codec* %0) {
%2 = alloca %struct.codec*
store %struct.codec* %0, %struct.codec** %2
ret void
}

LLVM IR (-O2):
%struct.codec = type opaque
define void @null_destroy(%struct.codec* nocapture %0) {
ret void
}
int test_imm_9Fuint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0x9F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Fuint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x9f,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Fuint64_lowword_mem>:
testb  $0x9f,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Fuint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 159
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_9Fuint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 159
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
unsigned char f8(unsigned char x, unsigned long int y) {
  return (x << y) | (x >> (8 - y));
}


x86 assembly (clang, -O0):
<f8>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movzbl -0x1(%rbp),%eax
mov    -0x10(%rbp),%rcx
shl    %cl,%eax
movzbl -0x1(%rbp),%edx
mov    $0x8,%ecx
sub    -0x10(%rbp),%rcx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f8>:
mov    %rsi,%rcx
mov    %edi,%eax
rol    %cl,%al
ret

LLVM IR (-O0):
define zeroext i8 @f8(i8 zeroext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
store i8 %0, i8* %3
store i64 %1, i64* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i64, i64* %4
%8 = trunc i64 %7 to i32
%9 = shl i32 %6, %8
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = load i64, i64* %4
%13 = sub i64 8, %12
%14 = trunc i64 %13 to i32
%15 = ashr i32 %11, %14
%16 = or i32 %9, %15
%17 = trunc i32 %16 to i8
ret i8 %17
}

LLVM IR (-O2):
define zeroext i8 @f8(i8 zeroext %0, i64 %1) {
%3 = trunc i64 %1 to i8
%4 = tail call i8 @llvm.fshl.i8(i8 %0, i8 %0, i8 %3)
ret i8 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
void SHAREMIND_MAP_KEY_FREE_uint16_t(uint16_t *const dest) { (void)dest; }


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_FREE_uint16_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_FREE_uint16_t>:
ret

LLVM IR (-O0):
define void @SHAREMIND_MAP_KEY_FREE_uint16_t(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
ret void
}

LLVM IR (-O2):
define void @SHAREMIND_MAP_KEY_FREE_uint16_t(i32* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_unpackhi_pi16(int /*<<< orphan*/, int /*<<< orphan*/);
__m64 test_mm_unpackhi_pi16(__m64 a, __m64 b) {
  return _mm_unpackhi_pi16(a, b);
}


x86 assembly (clang, -O0):
<test_mm_unpackhi_pi16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_unpackhi_pi16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_unpackhi_pi16>:
jmp    1030 <_mm_unpackhi_pi16@plt>

LLVM IR (-O0):
define i32 @test_mm_unpackhi_pi16(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_unpackhi_pi16(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_unpackhi_pi16(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_unpackhi_pi16(i32 %0, i32 %1)
ret i32 %3
}
long long int gcdllint(long long int x, long long int y) {
  if (y == 0)
    return x;
  else
    gcdllint(y, x % y);
}


x86 assembly (clang, -O0):
<gcdllint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1138 <gcdllint+0x28>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    114e <gcdllint+0x3e>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rax
cqto
idivq  -0x18(%rbp)
mov    %rdx,%rsi
call   1030 <gcdllint@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcdllint>:
test   %rsi,%rsi
je     1132 <gcdllint+0x32>
mov    %rsi,%rdx
mov    %rdi,%rax
jmp    111d <gcdllint+0x1d>
nopl   (%rax)
cqto
idiv   %rcx
mov    %rcx,%rax
test   %rdx,%rdx
je     1132 <gcdllint+0x32>
mov    %rdx,%rcx
mov    %rax,%rdx
or     %rcx,%rdx
shr    $0x20,%rdx
jne    1110 <gcdllint+0x10>
xor    %edx,%edx
div    %ecx
jmp    1115 <gcdllint+0x15>
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @gcdllint(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %4
store i64 %9, i64* %3
br label %16
10: ; preds = %2
%11 = load i64, i64* %5
%12 = load i64, i64* %4
%13 = load i64, i64* %5
%14 = srem i64 %12, %13
%15 = call i64 @gcdllint(i64 %11, i64 %14)
br label %16
16: ; preds = %8, %10
%17 = load i64, i64* %3
ret i64 %17
}

LLVM IR (-O2):
define i64 @gcdllint(i64 returned %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %7, %4 ], [ %1, %2 ]
%6 = phi i64 [ %5, %4 ], [ %0, %2 ]
%7 = srem i64 %6, %5
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
ret i64 %0
}
/* Variables and functions */
int /*<<< orphan*/ Com_Printf(char *, int /*<<< orphan*/);
int /*<<< orphan*/ FS_LoadedPakNames();
void CL_OpenedPK3List_f(void) {
  Com_Printf("Opened PK3 Names: %s\n", FS_LoadedPakNames());
}


x86 assembly (clang, -O0):
<CL_OpenedPK3List_f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <FS_LoadedPakNames@plt>
mov    %eax,%esi
lea    0xecc(%rip),%rdi
call   1030 <Com_Printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CL_OpenedPK3List_f>:
push   %rax
xor    %eax,%eax
call   1040 <FS_LoadedPakNames@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1030 <Com_Printf@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"Opened PK3 Names: %s\0A\00"
define void @CL_OpenedPK3List_f() {
%1 = call i32 (...) @FS_LoadedPakNames()
%2 = call i32 @Com_Printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"Opened PK3 Names: %s\0A\00"
define void @CL_OpenedPK3List_f() {
%1 = tail call i32 (...) @FS_LoadedPakNames()
%2 = tail call i32 @Com_Printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
int snd_info_card_create(struct snd_card *card) { return 0; }


x86 assembly (clang, -O0):
<snd_info_card_create>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<snd_info_card_create>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.snd_card = type opaque
define i32 @snd_info_card_create(%struct.snd_card* %0) {
%2 = alloca %struct.snd_card*
store %struct.snd_card* %0, %struct.snd_card** %2
ret i32 0
}

LLVM IR (-O2):
%struct.snd_card = type opaque
define i32 @snd_info_card_create(%struct.snd_card* nocapture readnone %0) {
ret i32 0
}
void TC3_IRQHandler(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<TC3_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <TC3_IRQHandler+0x9>
jmp    1109 <TC3_IRQHandler+0x9>

x86 assembly (clang, -O2):
<TC3_IRQHandler>:
jmp    1100 <TC3_IRQHandler>

LLVM IR (-O0):
define void @TC3_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @TC3_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}
int test_imm_1Buint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x1B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Buint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0x1b,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Buint64_midword_mem>:
testb  $0x1b,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Buint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 27
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_1Buint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 1769472
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int isvowel(char *symbol) {
  if ((symbol[0] > '0' && symbol[0] < '9') ||
      ((symbol[0] == 'c') && (symbol[1] > '0' && symbol[1] < '9'))) {
    return (1);
  } else
    return (0);
}


x86 assembly (clang, -O0):
<isvowel>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x30,%eax
jle    1128 <isvowel+0x28>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x39,%eax
jl     115a <isvowel+0x5a>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x63,%eax
jne    1166 <isvowel+0x66>
mov    -0x10(%rbp),%rax
movsbl 0x1(%rax),%eax
cmp    $0x30,%eax
jle    1166 <isvowel+0x66>
mov    -0x10(%rbp),%rax
movsbl 0x1(%rax),%eax
cmp    $0x39,%eax
jge    1166 <isvowel+0x66>
movl   $0x1,-0x4(%rbp)
jmp    116d <isvowel+0x6d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isvowel>:
mov    (%rdi),%cl
lea    -0x31(%rcx),%edx
mov    $0x1,%eax
cmp    $0x8,%dl
jb     1121 <isvowel+0x21>
cmp    $0x63,%cl
jne    111f <isvowel+0x1f>
mov    0x1(%rdi),%cl
add    $0xcf,%cl
cmp    $0x8,%cl
jb     1121 <isvowel+0x21>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isvowel(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp sgt i32 %7, 48
br i1 %8, label %9, label %15
9: ; preds = %1
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 0
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp slt i32 %13, 57
br i1 %14, label %33, label %15
15: ; preds = %9, %1
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i64 0
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 99
br i1 %20, label %21, label %34
21: ; preds = %15
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i64 1
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
%26 = icmp sgt i32 %25, 48
br i1 %26, label %27, label %34
27: ; preds = %21
%28 = load i8*, i8** %3
%29 = getelementptr inbounds i8, i8* %28, i64 1
%30 = load i8, i8* %29
%31 = sext i8 %30 to i32
%32 = icmp slt i32 %31, 57
br i1 %32, label %33, label %34
33: ; preds = %27, %9
store i32 1, i32* %2
br label %35
34: ; preds = %27, %21, %15
store i32 0, i32* %2
br label %35
35: ; preds = %34, %33
%36 = load i32, i32* %2
ret i32 %36
}

LLVM IR (-O2):
define i32 @isvowel(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = add i8 %2, -49
%4 = icmp ult i8 %3, 8
br i1 %4, label %13, label %5
5: ; preds = %1
%6 = icmp eq i8 %2, 99
br i1 %6, label %7, label %12
7: ; preds = %5
%8 = getelementptr inbounds i8, i8* %0, i64 1
%9 = load i8, i8* %8
%10 = add i8 %9, -49
%11 = icmp ult i8 %10, 8
br i1 %11, label %13, label %12
12: ; preds = %7, %5
br label %13
13: ; preds = %1, %7, %12
%14 = phi i32 [ 0, %12 ], [ 1, %7 ], [ 1, %1 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ applyIeeePatch();
void rf_patch_cpe_ieee(void) { applyIeeePatch(); }


x86 assembly (clang, -O0):
<rf_patch_cpe_ieee>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <applyIeeePatch@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rf_patch_cpe_ieee>:
xor    %eax,%eax
jmp    1030 <applyIeeePatch@plt>

LLVM IR (-O0):
define void @rf_patch_cpe_ieee() {
%1 = call i32 (...) @applyIeeePatch()
ret void
}

LLVM IR (-O2):
define void @rf_patch_cpe_ieee() {
%1 = tail call i32 (...) @applyIeeePatch()
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t rol64(uint64_t x, int r) { return (x << (r & 63)) | (x >> (-r & 63)); }


x86 assembly (clang, -O0):
<rol64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
and    $0x3f,%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
and    $0x3f,%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rol64>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
neg    %cl
sar    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rol64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = and i32 %6, 63
%8 = shl i32 %5, %7
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = sub nsw i32 0, %10
%12 = and i32 %11, 63
%13 = ashr i32 %9, %12
%14 = or i32 %8, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @rol64(i32 %0, i32 %1) {
%3 = and i32 %1, 63
%4 = shl i32 %0, %3
%5 = sub nsw i32 0, %1
%6 = and i32 %5, 63
%7 = ashr i32 %0, %6
%8 = or i32 %4, %7
ret i32 %8
}
long double test_fmodl(long double x, long double y) {
  return __builtin_fmodl(x, y);
}


x86 assembly (clang, -O0):
<test_fmodl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
call   1030 <fmodl@plt>
fld    %st(0)
fstp   %st(0)
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_fmodl>:
jmp    1030 <fmodl@plt>

LLVM IR (-O0):
define x86_fp80 @test_fmodl(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %4
%7 = call x86_fp80 @fmodl(x86_fp80 %5, x86_fp80 %6)
ret x86_fp80 %7
}

LLVM IR (-O2):
define x86_fp80 @test_fmodl(x86_fp80 %0, x86_fp80 %1) {
%3 = tail call x86_fp80 @fmodl(x86_fp80 %0, x86_fp80 %1)
ret x86_fp80 %3
}
/* Variables and functions */
int EXIT_SUCCESS;
int main() { return EXIT_SUCCESS; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    0x2ece(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @EXIT_SUCCESS
ret i32 %2
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = load i32, i32* @EXIT_SUCCESS
ret i32 %1
}
/* Variables and functions */
scalar_t__ FP_ZERO;
scalar_t__ fpclassify(double);
bool lwan_tpl_double_is_empty(void *ptr) {
  return fpclassify(*(double *)ptr) == FP_ZERO;
}


x86 assembly (clang, -O0):
<lwan_tpl_double_is_empty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
call   1030 <fpclassify@plt>
mov    0x2eb8(%rip),%rcx
cmp    (%rcx),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lwan_tpl_double_is_empty>:
push   %rax
movsd  (%rdi),%xmm0
call   1030 <fpclassify@plt>
mov    0x2ec7(%rip),%rdx
xor    %ecx,%ecx
cmp    (%rdx),%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@FP_ZERO = global i64 0
define i32 @lwan_tpl_double_is_empty(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to double*
%5 = load double, double* %4
%6 = call i64 @fpclassify(double %5)
%7 = load i64, i64* @FP_ZERO
%8 = icmp eq i64 %6, %7
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
@FP_ZERO = global i64 0
define i32 @lwan_tpl_double_is_empty(i8* nocapture %0) {
%2 = bitcast i8* %0 to double*
%3 = load double, double* %2
%4 = tail call i64 @fpclassify(double %3)
%5 = load i64, i64* @FP_ZERO
%6 = icmp eq i64 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ write(int, char const *, size_t);
__attribute__((no, noreturn)) void unhandled_size(const char *error_string,
                                                  size_t size) {
  write(2, error_string, size);
  abort();
}


x86 assembly (clang, -O0):
<unhandled_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0x2,%edi
call   1040 <write@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<unhandled_size>:
push   %rax
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x2,%edi
call   1040 <write@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @unhandled_size(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @write(i32 2, i8* %5, i64 %6)
%8 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define void @unhandled_size(i8* nocapture %0, i64 %1) {
%3 = tail call i32 @write(i32 2, i8* %0, i64 %1)
%4 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
void *malloc(unsigned int);
int /*<<< orphan*/ stderr;
void *xmalloc(unsigned n) {
  void *p;
  p = malloc(n);
  if (p)
    return p;
  fprintf(stderr, "insufficient memory\n");
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     115c <xmalloc+0x2c>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret
mov    0x2e7d(%rip),%rax
mov    (%rax),%edi
lea    0xe94(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e60(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<xmalloc>:
push   %rax
call   1040 <malloc@plt>
test   %rax,%rax
je     113d <xmalloc+0xd>
pop    %rcx
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e7f(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [21 x i8] c"insufficient memory\0A\00"
@EXIT_FAILURE = global i32 0
define i8* @xmalloc(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8* @malloc(i32 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i8*, i8** %3
ret i8* %9
10: ; preds = %1
%11 = load i32, i32* @stderr
%12 = call i32 @fprintf(i32 %11, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%13 = load i32, i32* @EXIT_FAILURE
%14 = call i32 @exit(i32 %13)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [21 x i8] c"insufficient memory\0A\00"
@EXIT_FAILURE = global i32 0
define noalias i8* @xmalloc(i32 %0) {
%2 = tail call i8* @malloc(i32 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %5, label %4
4: ; preds = %1
ret i8* %2
5: ; preds = %1
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* @EXIT_FAILURE
%9 = tail call i32 @exit(i32 %8)
unreachable
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
void MPURegionGet(uint32_t ui32Region, uint32_t *pui32Addr,
                  uint32_t *pui32Flags) {
  ;
  ;
  ;
  (*((volatile unsigned long *)(0xE000ED98))) = ui32Region;
  *pui32Addr = (*((volatile unsigned long *)(0xE000ED9C))) & 0xFFFFFFE0;
  *pui32Flags = (*((volatile unsigned long *)(0xE000EDA0)));
}


x86 assembly (clang, -O0):
<MPURegionGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0xe000ed98,%eax
mov    %rcx,(%rax)
mov    $0xe000ed9c,%eax
mov    (%rax),%rcx
movabs $0xffffffe0,%rax
and    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    $0xe000eda0,%eax
mov    (%rax),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<MPURegionGet>:
mov    %rdi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
mov    $0xe000ed98,%ecx
mov    %rax,(%rcx)
mov    0x4(%rcx),%rax
and    $0xffffffe0,%eax
mov    %rax,(%rsi)
mov    0x8(%rcx),%rax
mov    %rax,(%rdx)
ret

LLVM IR (-O0):
define void @MPURegionGet(i64 %0, i64* %1, i64* %2) {
%4 = alloca i64
%5 = alloca i64*
%6 = alloca i64*
store volatile i64 %0, i64* %4
store i64* %1, i64** %5
store i64* %2, i64** %6
%7 = load volatile i64, i64* %4
store volatile i64 %7, i64* inttoptr (i64 3758157208 to i64*)
%8 = load volatile i64, i64* inttoptr (i64 3758157212 to i64*)
%9 = and i64 %8, 4294967264
%10 = load i64*, i64** %5
store volatile i64 %9, i64* %10
%11 = load volatile i64, i64* inttoptr (i64 3758157216 to i64*)
%12 = load i64*, i64** %6
store volatile i64 %11, i64* %12
ret void
}

LLVM IR (-O2):
define void @MPURegionGet(i64 %0, i64* %1, i64* %2) {
%4 = alloca i64
store volatile i64 %0, i64* %4
%5 = load volatile i64, i64* %4
store volatile i64 %5, i64* inttoptr (i64 3758157208 to i64*)
%6 = load volatile i64, i64* inttoptr (i64 3758157212 to i64*)
%7 = and i64 %6, 4294967264
store volatile i64 %7, i64* %1
%8 = load volatile i64, i64* inttoptr (i64 3758157216 to i64*)
store volatile i64 %8, i64* %2
ret void
}
/* Variables and functions */
scalar_t__ ft_isalpha(int);
scalar_t__ ft_isdigit(int);
int ft_isalnum(int c) {
  if (ft_isalpha(c) || ft_isdigit(c))
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<ft_isalnum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <ft_isalpha@plt>
cmp    $0x0,%rax
jne    114f <ft_isalnum+0x2f>
mov    -0x8(%rbp),%edi
call   1030 <ft_isdigit@plt>
cmp    $0x0,%rax
je     115b <ft_isalnum+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    1162 <ft_isalnum+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isalnum>:
push   %rbx
mov    %edi,%ebx
call   1040 <ft_isalpha@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <ft_isalnum+0x17>
pop    %rbx
ret
mov    %ebx,%edi
call   1030 <ft_isdigit@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ft_isalnum(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @ft_isalpha(i32 %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load i32, i32* %3
%9 = call i64 @ft_isdigit(i32 %8)
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7, %1
store i32 1, i32* %2
br label %13
12: ; preds = %7
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @ft_isalnum(i32 %0) {
%2 = tail call i64 @ft_isalpha(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @ft_isdigit(i32 %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ nullf(char *, int);
int /*<<< orphan*/ output_byte(int);
void emit_fsub(int r) {
  nullf("fsub st%d\n", r);
  output_byte(0xd8);
  output_byte(0xe0 + r);
}


x86 assembly (clang, -O0):
<emit_fsub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xecb(%rip),%rdi
call   1030 <nullf@plt>
mov    $0xd8,%edi
call   1040 <output_byte@plt>
mov    -0x4(%rbp),%edi
add    $0xe0,%edi
call   1040 <output_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_fsub>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
mov    %ebx,%esi
call   1030 <nullf@plt>
mov    $0xd8,%edi
call   1040 <output_byte@plt>
add    $0xe0,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1040 <output_byte@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"fsub st%d\0A\00"
define void @emit_fsub(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @nullf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = call i32 @output_byte(i32 216)
%6 = load i32, i32* %2
%7 = add nsw i32 224, %6
%8 = call i32 @output_byte(i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"fsub st%d\0A\00"
define void @emit_fsub(i32 %0) {
%2 = tail call i32 @nullf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = tail call i32 @output_byte(i32 216)
%4 = add nsw i32 %0, 224
%5 = tail call i32 @output_byte(i32 %4)
ret void
}
/* Variables and functions */
int __P(char);
int test(void) {
  int x = __P('a');
  return x;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x61,%edi
call   1030 <__P@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
mov    $0x61,%edi
jmp    1030 <__P@plt>

LLVM IR (-O0):
define i32 @test() {
%1 = alloca i32
%2 = call i32 @__P(i8 signext 97)
store i32 %2, i32* %1
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @test() {
%1 = tail call i32 @__P(i8 signext 97)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ Error(int, char *, int /*<<< orphan*/);
void Error2(int e, char *s) { Error(e, s, 0); }


x86 assembly (clang, -O0):
<Error2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <Error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Error2>:
xor    %edx,%edx
jmp    1030 <Error@plt>

LLVM IR (-O0):
define void @Error2(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i32 @Error(i32 %5, i8* %6, i32 0)
ret void
}

LLVM IR (-O2):
define void @Error2(i32 %0, i8* %1) {
%3 = tail call i32 @Error(i32 %0, i8* %1, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
main() { printf("hello pankaj"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"hello pankaj\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"hello pankaj\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void crt_fatal_error(const char *msg) { exit(1); }


x86 assembly (clang, -O0):
<crt_fatal_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<crt_fatal_error>:
push   %rax
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @crt_fatal_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @crt_fatal_error(i8* nocapture readnone %0) {
%2 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ LPUART8_DriverIRQHandler();
__attribute__((weak)) void LPUART8_IRQHandler(void) {
  LPUART8_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<LPUART8_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <LPUART8_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LPUART8_IRQHandler>:
xor    %eax,%eax
jmp    1030 <LPUART8_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @LPUART8_IRQHandler() {
%1 = call i32 (...) @LPUART8_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @LPUART8_IRQHandler() {
%1 = tail call i32 (...) @LPUART8_DriverIRQHandler()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ht_get_processed();
char *u642str(int /*<<< orphan*/, int /*<<< orphan*/);
char *get_str_processed_reqs(void) { return u642str(ht_get_processed(), 0); }


x86 assembly (clang, -O0):
<get_str_processed_reqs>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <ht_get_processed@plt>
mov    %eax,%edi
xor    %esi,%esi
call   1030 <u642str@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_str_processed_reqs>:
push   %rax
xor    %eax,%eax
call   1040 <ht_get_processed@plt>
mov    %eax,%edi
xor    %esi,%esi
pop    %rax
jmp    1030 <u642str@plt>

LLVM IR (-O0):
define i8* @get_str_processed_reqs() {
%1 = call i32 (...) @ht_get_processed()
%2 = call i8* @u642str(i32 %1, i32 0)
ret i8* %2
}

LLVM IR (-O2):
define i8* @get_str_processed_reqs() {
%1 = tail call i32 (...) @ht_get_processed()
%2 = tail call i8* @u642str(i32 %1, i32 0)
ret i8* %2
}
int char_to_digit(char c) { return c - '0'; }


x86 assembly (clang, -O0):
<char_to_digit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
sub    $0x30,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<char_to_digit>:
lea    -0x30(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @char_to_digit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = sub nsw i32 %4, 48
ret i32 %5
}

LLVM IR (-O2):
define i32 @char_to_digit(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add nsw i32 %2, -48
ret i32 %3
}
int omap_mux_get_by_name(const char *muxname,
                         struct omap_mux_partition **found_partition,
                         struct omap_mux **found_mux) {
  return 0;
}


x86 assembly (clang, -O0):
<omap_mux_get_by_name>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<omap_mux_get_by_name>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.omap_mux_partition = type opaque
%struct.omap_mux = type opaque
define i32 @omap_mux_get_by_name(i8* %0, %struct.omap_mux_partition** %1, %struct.omap_mux** %2) {
%4 = alloca i8*
%5 = alloca %struct.omap_mux_partition**
%6 = alloca %struct.omap_mux**
store i8* %0, i8** %4
store %struct.omap_mux_partition** %1, %struct.omap_mux_partition*** %5
store %struct.omap_mux** %2, %struct.omap_mux*** %6
ret i32 0
}

LLVM IR (-O2):
%struct.omap_mux_partition = type opaque
%struct.omap_mux = type opaque
define i32 @omap_mux_get_by_name(i8* nocapture readnone %0, %struct.omap_mux_partition** nocapture readnone %1, %struct.omap_mux** nocapture readnone %2) {
ret i32 0
}
/* Variables and functions */
scalar_t__ COND_NE();
int /*<<< orphan*/ EA_AY_AI_8();
int /*<<< orphan*/ m68ki_write_8(int /*<<< orphan*/, int);
void m68k_op_sne_8_ai(void) {
  m68ki_write_8(EA_AY_AI_8(), COND_NE() ? 0xff : 0);
}


x86 assembly (clang, -O0):
<m68k_op_sne_8_ai>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <EA_AY_AI_8@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <COND_NE@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rcx
xor    %esi,%esi
mov    $0xff,%eax
cmp    $0x0,%rcx
cmovne %eax,%esi
call   1050 <m68ki_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_sne_8_ai>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %eax,%eax
call   1040 <EA_AY_AI_8@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <COND_NE@plt>
test   %rax,%rax
mov    $0xff,%esi
cmove  %ebp,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <m68ki_write_8@plt>

LLVM IR (-O0):
define void @m68k_op_sne_8_ai() {
%1 = call i32 (...) @EA_AY_AI_8()
%2 = call i64 (...) @COND_NE()
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 255, i32 0
%6 = call i32 @m68ki_write_8(i32 %1, i32 %5)
ret void
}

LLVM IR (-O2):
define void @m68k_op_sne_8_ai() {
%1 = tail call i32 (...) @EA_AY_AI_8()
%2 = tail call i64 (...) @COND_NE()
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 0, i32 255
%5 = tail call i32 @m68ki_write_8(i32 %1, i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TRUE;
int /*<<< orphan*/ cbreak();
int /*<<< orphan*/ keypad(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ nodelay(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ noecho();
int /*<<< orphan*/ stdscr;
void set_input_mode() {
  cbreak();
  noecho();
  keypad(stdscr, TRUE);
  nodelay(stdscr, TRUE);
}


x86 assembly (clang, -O0):
<set_input_mode>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <cbreak@plt>
mov    $0x0,%al
call   1060 <noecho@plt>
mov    0x2e8f(%rip),%rax
mov    (%rax),%edi
mov    0x2e7e(%rip),%rax
mov    (%rax),%esi
call   1040 <keypad@plt>
mov    0x2e78(%rip),%rax
mov    (%rax),%edi
mov    0x2e67(%rip),%rax
mov    (%rax),%esi
call   1050 <nodelay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_input_mode>:
push   %r14
push   %rbx
push   %rax
xor    %eax,%eax
call   1030 <cbreak@plt>
xor    %eax,%eax
call   1060 <noecho@plt>
mov    0x2e8f(%rip),%r14
mov    (%r14),%edi
mov    0x2e7d(%rip),%rbx
mov    (%rbx),%esi
call   1040 <keypad@plt>
mov    (%r14),%edi
mov    (%rbx),%esi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1050 <nodelay@plt>

LLVM IR (-O0):
@stdscr = global i32 0
@TRUE = global i32 0
define void @set_input_mode() {
%1 = call i32 (...) @cbreak()
%2 = call i32 (...) @noecho()
%3 = load i32, i32* @stdscr
%4 = load i32, i32* @TRUE
%5 = call i32 @keypad(i32 %3, i32 %4)
%6 = load i32, i32* @stdscr
%7 = load i32, i32* @TRUE
%8 = call i32 @nodelay(i32 %6, i32 %7)
ret void
}

LLVM IR (-O2):
@stdscr = global i32 0
@TRUE = global i32 0
define void @set_input_mode() {
%1 = tail call i32 (...) @cbreak()
%2 = tail call i32 (...) @noecho()
%3 = load i32, i32* @stdscr
%4 = load i32, i32* @TRUE
%5 = tail call i32 @keypad(i32 %3, i32 %4)
%6 = load i32, i32* @stdscr
%7 = load i32, i32* @TRUE
%8 = tail call i32 @nodelay(i32 %6, i32 %7)
ret void
}