xunge/DecIR huggingface dataset:
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
uint32_t ring_wrap(uint32_t size, uint32_t idx) {
  return idx >= size ? idx - size : idx;
}


x86 assembly (clang, -O0):
<ring_wrap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x8(%rbp),%rax
jl     112b <ring_wrap+0x2b>
mov    -0x10(%rbp),%rax
sub    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    1133 <ring_wrap+0x33>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ring_wrap>:
mov    %rsi,%rax
xor    %ecx,%ecx
cmp    %rdi,%rsi
cmovge %rdi,%rcx
sub    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @ring_wrap(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = icmp sge i64 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i64, i64* %4
%10 = load i64, i64* %3
%11 = sub nsw i64 %9, %10
br label %14
12: ; preds = %2
%13 = load i64, i64* %4
br label %14
14: ; preds = %12, %8
%15 = phi i64 [ %11, %8 ], [ %13, %12 ]
ret i64 %15
}

LLVM IR (-O2):
define i64 @ring_wrap(i64 %0, i64 %1) {
%3 = icmp slt i64 %1, %0
%4 = select i1 %3, i64 0, i64 %0
%5 = sub nsw i64 %1, %4
ret i64 %5
}
/* Variables and functions */
int mhvtl_fifo_count(int);
int inc_fifo_count(void) { return mhvtl_fifo_count(1); }


x86 assembly (clang, -O0):
<inc_fifo_count>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <mhvtl_fifo_count@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<inc_fifo_count>:
mov    $0x1,%edi
jmp    1030 <mhvtl_fifo_count@plt>

LLVM IR (-O0):
define i32 @inc_fifo_count() {
%1 = call i32 @mhvtl_fifo_count(i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @inc_fifo_count() {
%1 = tail call i32 @mhvtl_fifo_count(i32 1)
ret i32 %1
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void LCDDMAConfigSet(uint32_t ui32Base, uint32_t ui32Config) {
  ASSERT(ui32Base == 0x44050000);
  ASSERT(!(ui32Config &
           ~(0x00000700 | 0x00000070 | 0x00000008 | 0x00000002 | 0x00000001)));
  (*((volatile uint32_t *)(ui32Base + 0x00000040))) = ui32Config;
}


x86 assembly (clang, -O0):
<LCDDMAConfigSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x44050000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%eax
and    $0xfffff884,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x40,%eax
cltq
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCDDMAConfigSet>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
cmp    $0x44050000,%ebp
sete   %dil
call   1030 <ASSERT@plt>
xor    %edi,%edi
test   $0xfffff884,%ebx
sete   %dil
call   1030 <ASSERT@plt>
movslq %ebp,%rax
mov    %ebx,0x40(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @LCDDMAConfigSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1141178368
%7 = zext i1 %6 to i32
%8 = call i32 @ASSERT(i32 %7)
%9 = load i32, i32* %4
%10 = and i32 %9, -1916
%11 = icmp ne i32 %10, 0
%12 = xor i1 %11, true
%13 = zext i1 %12 to i32
%14 = call i32 @ASSERT(i32 %13)
%15 = load i32, i32* %4
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 64
%18 = sext i32 %17 to i64
%19 = inttoptr i64 %18 to i32*
store volatile i32 %15, i32* %19
ret void
}

LLVM IR (-O2):
define void @LCDDMAConfigSet(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 1141178368
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = and i32 %1, -1916
%7 = icmp eq i32 %6, 0
%8 = zext i1 %7 to i32
%9 = tail call i32 @ASSERT(i32 %8)
%10 = add nsw i32 %0, 64
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
store volatile i32 %1, i32* %12
ret void
}
void of_gpio_dev_init(struct gpio_chip *gc, struct gpio_device *gdev) {}


x86 assembly (clang, -O0):
<of_gpio_dev_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<of_gpio_dev_init>:
ret

LLVM IR (-O0):
%struct.gpio_chip = type opaque
%struct.gpio_device = type opaque
define void @of_gpio_dev_init(%struct.gpio_chip* %0, %struct.gpio_device* %1) {
%3 = alloca %struct.gpio_chip*
%4 = alloca %struct.gpio_device*
store %struct.gpio_chip* %0, %struct.gpio_chip** %3
store %struct.gpio_device* %1, %struct.gpio_device** %4
ret void
}

LLVM IR (-O2):
%struct.gpio_chip = type opaque
%struct.gpio_device = type opaque
define void @of_gpio_dev_init(%struct.gpio_chip* nocapture %0, %struct.gpio_device* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Wreg(int);
int /*<<< orphan*/ Ws(char *);
int /*<<< orphan*/ Wx(int, int);
int Winst5(int i, int code) {
  Ws("subi  ");
  Wreg(((code >> 4) & 0xF) + 16);
  Ws(", $");
  Wx(((code >> 4) & 0xF0) | (code & 0x0F), 1);
  return 0;
}


x86 assembly (clang, -O0):
<Winst5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    0xebb(%rip),%rdi
call   1030 <Ws@plt>
mov    -0x8(%rbp),%edi
sar    $0x4,%edi
and    $0xf,%edi
add    $0x10,%edi
call   1050 <Wreg@plt>
lea    0xea5(%rip),%rdi
call   1030 <Ws@plt>
mov    -0x8(%rbp),%edi
sar    $0x4,%edi
and    $0xf0,%edi
mov    -0x8(%rbp),%eax
and    $0xf,%eax
or     %eax,%edi
mov    $0x1,%esi
call   1040 <Wx@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Winst5>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
lea    0xec4(%rip),%rdi
call   1030 <Ws@plt>
mov    %ebx,%ebp
sar    $0x4,%ebp
mov    %ebp,%edi
and    $0xf,%edi
or     $0x10,%edi
call   1050 <Wreg@plt>
lea    0xead(%rip),%rdi
call   1030 <Ws@plt>
and    $0xf0,%ebp
and    $0xf,%ebx
or     %ebp,%ebx
mov    %ebx,%edi
mov    $0x1,%esi
call   1040 <Wx@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [7 x i8] c"subi \00"
@.str.1 = [4 x i8] c", $\00"
define i32 @Winst5(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @Ws(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* %4
%7 = ashr i32 %6, 4
%8 = and i32 %7, 15
%9 = add nsw i32 %8, 16
%10 = call i32 @Wreg(i32 %9)
%11 = call i32 @Ws(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%12 = load i32, i32* %4
%13 = ashr i32 %12, 4
%14 = and i32 %13, 240
%15 = load i32, i32* %4
%16 = and i32 %15, 15
%17 = or i32 %14, %16
%18 = call i32 @Wx(i32 %17, i32 1)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"subi \00"
@.str.1 = [4 x i8] c", $\00"
define i32 @Winst5(i32 %0, i32 %1) {
%3 = tail call i32 @Ws(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%4 = ashr i32 %1, 4
%5 = and i32 %4, 15
%6 = or i32 %5, 16
%7 = tail call i32 @Wreg(i32 %6)
%8 = tail call i32 @Ws(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%9 = and i32 %4, 240
%10 = and i32 %1, 15
%11 = or i32 %9, %10
%12 = tail call i32 @Wx(i32 %11, i32 1)
ret i32 0
}
void plugin_log() {}


x86 assembly (clang, -O0):
<plugin_log>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<plugin_log>:
ret

LLVM IR (-O0):
define void @plugin_log() {
ret void
}

LLVM IR (-O2):
define void @plugin_log() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ recursion(int);
void main(void) { recursion(1); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <recursion@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%edi
jmp    1030 <recursion@plt>

LLVM IR (-O0):
define void @main() {
%1 = call i32 @recursion(i32 1)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @recursion(i32 1)
ret void
}
void j(int x, int y) {}


x86 assembly (clang, -O0):
<j>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<j>:
ret

LLVM IR (-O0):
define void @j(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @j(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *HxAlloc(size_t size) { return malloc(size); }


x86 assembly (clang, -O0):
<HxAlloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HxAlloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @HxAlloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @HxAlloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
/* Variables and functions */
int getpagesize();
int my_getpagesize(void) { return getpagesize(); }


x86 assembly (clang, -O0):
<my_getpagesize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getpagesize@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_getpagesize>:
xor    %eax,%eax
jmp    1030 <getpagesize@plt>

LLVM IR (-O0):
define i32 @my_getpagesize() {
%1 = call i32 (...) @getpagesize()
ret i32 %1
}

LLVM IR (-O2):
define i32 @my_getpagesize() {
%1 = tail call i32 (...) @getpagesize()
ret i32 %1
}
/* Type definitions */
struct kmod_module_info {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct kmod_module_info *);
void kmod_module_info_free(struct kmod_module_info *info) { free(info); }


x86 assembly (clang, -O0):
<kmod_module_info_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kmod_module_info_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.kmod_module_info = type { i32 }
define void @kmod_module_info_free(%struct.kmod_module_info* %0) {
%2 = alloca %struct.kmod_module_info*
store %struct.kmod_module_info* %0, %struct.kmod_module_info** %2
%3 = load %struct.kmod_module_info*, %struct.kmod_module_info** %2
%4 = call i32 @free(%struct.kmod_module_info* %3)
ret void
}

LLVM IR (-O2):
%struct.kmod_module_info = type { i32 }
define void @kmod_module_info_free(%struct.kmod_module_info* nocapture %0) {
%2 = tail call i32 @free(%struct.kmod_module_info* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ say(char *, int);
void talk(void) { say("This must be the woman's bed.  Looks dirty.", 1); }


x86 assembly (clang, -O0):
<talk>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x1,%esi
call   1030 <say@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<talk>:
lea    0xee9(%rip),%rdi
mov    $0x1,%esi
jmp    1030 <say@plt>

LLVM IR (-O0):
@.str = [44 x i8] c"This must be the woman's bed. Looks dirty.\00"
define void @talk() {
%1 = call i32 @say(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [44 x i8] c"This must be the woman's bed. Looks dirty.\00"
define void @talk() {
%1 = tail call i32 @say(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}
int test_imm_02uint8_reg(unsigned char val) {
  return ((val) & (-0x02 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_02uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xfffffffe,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_02uint8_reg>:
cmp    $0x2,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_02uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -2
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_02uint8_reg(i8 zeroext %0) {
%2 = icmp ult i8 %0, 2
%3 = select i1 %2, i32 -40, i32 -20
ret i32 %3
}
int ft_isdigit(int c) { return (c > 47 && c < 58); }


x86 assembly (clang, -O0):
<ft_isdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x2f,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1120 <ft_isdigit+0x20>
cmpl   $0x3a,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isdigit>:
add    $0xffffffd0,%edi
xor    %eax,%eax
cmp    $0xa,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @ft_isdigit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 47
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 58
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @ft_isdigit(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *rom_fopen(int /*<<< orphan*/ *, char *);
int rom_present(wchar_t *fn) {
  FILE *f;
  f = rom_fopen(fn, L"rb");
  if (f != NULL) {
    (void)fclose(f);
    return (1);
  }
  return (0);
}


x86 assembly (clang, -O0):
<rom_present>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xec9(%rip),%rsi
call   1040 <rom_fopen@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1160 <rom_present+0x40>
mov    -0x18(%rbp),%rdi
call   1030 <fclose@plt>
movl   $0x1,-0x4(%rbp)
jmp    1167 <rom_present+0x47>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rom_present>:
push   %rax
lea    0xed8(%rip),%rsi
call   1040 <rom_fopen@plt>
test   %rax,%rax
je     1141 <rom_present+0x21>
mov    %rax,%rdi
call   1030 <fclose@plt>
mov    $0x1,%eax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i32] [i32 114, i32 98, i32 0]
define i32 @rom_present(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
%5 = load i32*, i32** %3
%6 = call i32* @rom_fopen(i32* %5, i8* bitcast ([3 x i32]* @.str to i8*))
store i32* %6, i32** %4
%7 = load i32*, i32** %4
%8 = icmp ne i32* %7, null
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i32*, i32** %4
%11 = call i32 @fclose(i32* %10)
store i32 1, i32* %2
br label %13
12: ; preds = %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %9
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
@.str = [3 x i32] [i32 114, i32 98, i32 0]
define i32 @rom_present(i32* %0) {
%2 = tail call i32* @rom_fopen(i32* %0, i8* bitcast ([3 x i32]* @.str to i8*))
%3 = icmp eq i32* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @fclose(i32* %2)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 1, %4 ], [ 0, %1 ]
ret i32 %7
}
double f4_sum_long_post_double(long v, double v0) { return v0 + ((double)(v)); }


x86 assembly (clang, -O0):
<f4_sum_long_post_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
cvtsi2sdq -0x8(%rbp),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4_sum_long_post_double>:
cvtsi2sd %rdi,%xmm1
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @f4_sum_long_post_double(i64 %0, double %1) {
%3 = alloca i64
%4 = alloca double
store i64 %0, i64* %3
store double %1, double* %4
%5 = load double, double* %4
%6 = load i64, i64* %3
%7 = sitofp i64 %6 to double
%8 = fadd double %5, %7
ret double %8
}

LLVM IR (-O2):
define double @f4_sum_long_post_double(i64 %0, double %1) {
%3 = sitofp i64 %0 to double
%4 = fadd double %3, %1
ret double %4
}
void gtk_binding_set_new() {}


x86 assembly (clang, -O0):
<gtk_binding_set_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_binding_set_new>:
ret

LLVM IR (-O0):
define void @gtk_binding_set_new() {
ret void
}

LLVM IR (-O2):
define void @gtk_binding_set_new() {
ret void
}
void UsageFaultISR(void) {
  for (;;) {
  }
}


x86 assembly (clang, -O0):
<UsageFaultISR>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <UsageFaultISR+0x9>
jmp    1109 <UsageFaultISR+0x9>

x86 assembly (clang, -O2):
<UsageFaultISR>:
jmp    1100 <UsageFaultISR>

LLVM IR (-O0):
define void @UsageFaultISR() {
br label %1
1: ; preds = %1, %0
br label %1
}

LLVM IR (-O2):
define void @UsageFaultISR() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
unsigned short app_usb_file_delete(char *, unsigned short);
unsigned short Usb_delete(char *filename, unsigned short index) {
  return app_usb_file_delete(filename, index);
}


x86 assembly (clang, -O0):
<Usb_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
movzwl -0xa(%rbp),%esi
call   1030 <app_usb_file_delete@plt>
movzwl %ax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Usb_delete>:
jmp    1030 <app_usb_file_delete@plt>

LLVM IR (-O0):
define zeroext i16 @Usb_delete(i8* %0, i16 zeroext %1) {
%3 = alloca i8*
%4 = alloca i16
store i8* %0, i8** %3
store i16 %1, i16* %4
%5 = load i8*, i8** %3
%6 = load i16, i16* %4
%7 = call zeroext i16 @app_usb_file_delete(i8* %5, i16 zeroext %6)
ret i16 %7
}

LLVM IR (-O2):
define zeroext i16 @Usb_delete(i8* %0, i16 zeroext %1) {
%3 = tail call zeroext i16 @app_usb_file_delete(i8* %0, i16 zeroext %1)
ret i16 %3
}
void DAC_escribeCommandRAM() {
  *((volatile unsigned short *)(0x10000000 + 0x00B0)) = 0x20;
  *((volatile unsigned short *)(0x10000000 + 0x00B4)) = 0x4D00;
}


x86 assembly (clang, -O0):
<DAC_escribeCommandRAM>:
push   %rbp
mov    %rsp,%rbp
mov    $0x100000b0,%eax
movw   $0x20,(%rax)
mov    $0x100000b4,%eax
movw   $0x4d00,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<DAC_escribeCommandRAM>:
movw   $0x20,0x100000b0
movw   $0x4d00,0x100000b4
ret

LLVM IR (-O0):
define void @DAC_escribeCommandRAM() {
store volatile i16 32, i16* inttoptr (i64 268435632 to i16*)
store volatile i16 19712, i16* inttoptr (i64 268435636 to i16*)
ret void
}

LLVM IR (-O2):
define void @DAC_escribeCommandRAM() {
store volatile i16 32, i16* inttoptr (i64 268435632 to i16*)
store volatile i16 19712, i16* inttoptr (i64 268435636 to i16*)
ret void
}
void rip(buf) char *buf;
{
  buf += strcspn(buf, "\r\n");
  if (*buf)
    *buf = 0;
}


x86 assembly (clang, -O0):
<rip>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcspn@plt>
add    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1148 <rip+0x38>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rip>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <strcspn@plt>
cmpb   $0x0,(%rbx,%rax,1)
je     112a <rip+0x1a>
movb   $0x0,(%rbx,%rax,1)
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"\0D\0A\00"
define void @rip(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @strcspn(i8* %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i64 %4
store i8* %6, i8** %2
%7 = load i8*, i8** %2
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %1
%11 = load i8*, i8** %2
store i8 0, i8* %11
br label %12
12: ; preds = %10, %1
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"\0D\0A\00"
define void @rip(i8* nocapture %0) {
%2 = tail call i64 @strcspn(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%3 = getelementptr inbounds i8, i8* %0, i64 %2
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %1
store i8 0, i8* %3
br label %7
7: ; preds = %6, %1
ret void
}
/* Type definitions */
struct svc_req {
  int dummy;
};

/* Variables and functions */
int mi_close_1_svc(int, void *, struct svc_req *);
int _mi_close_1(int *argp, void *result, struct svc_req *rqstp) {
  return (mi_close_1_svc(*argp, result, rqstp));
}


x86 assembly (clang, -O0):
<_mi_close_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <mi_close_1_svc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mi_close_1>:
mov    (%rdi),%edi
jmp    1030 <mi_close_1_svc@plt>

LLVM IR (-O0):
%struct.svc_req = type { i32 }
define i32 @_mi_close_1(i32* %0, i8* %1, %struct.svc_req* %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca %struct.svc_req*
store i32* %0, i32** %4
store i8* %1, i8** %5
store %struct.svc_req* %2, %struct.svc_req** %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = load i8*, i8** %5
%10 = load %struct.svc_req*, %struct.svc_req** %6
%11 = call i32 @mi_close_1_svc(i32 %8, i8* %9, %struct.svc_req* %10)
ret i32 %11
}

LLVM IR (-O2):
%struct.svc_req = type { i32 }
define i32 @_mi_close_1(i32* nocapture %0, i8* %1, %struct.svc_req* %2) {
%4 = load i32, i32* %0
%5 = tail call i32 @mi_close_1_svc(i32 %4, i8* %1, %struct.svc_req* %2)
ret i32 %5
}
int _mpylshu(int src1, unsigned int src2) {
  return (short)src1 * (unsigned short)(src2 >> 16);
}


x86 assembly (clang, -O0):
<_mpylshu>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cwtl
mov    -0x8(%rbp),%ecx
shr    $0x10,%ecx
movzwl %cx,%ecx
imul   %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mpylshu>:
movswl %di,%eax
shr    $0x10,%esi
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @_mpylshu(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = trunc i32 %5 to i16
%7 = sext i16 %6 to i32
%8 = load i32, i32* %4
%9 = lshr i32 %8, 16
%10 = trunc i32 %9 to i16
%11 = zext i16 %10 to i32
%12 = mul nsw i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @_mpylshu(i32 %0, i32 %1) {
%3 = shl i32 %0, 16
%4 = ashr exact i32 %3, 16
%5 = lshr i32 %1, 16
%6 = mul nsw i32 %4, %5
ret i32 %6
}
void foo416(int p) {}


x86 assembly (clang, -O0):
<foo416>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo416>:
ret

LLVM IR (-O0):
define void @foo416(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo416(i32 %0) {
ret void
}
char *xgetgoarm(void) { return "6"; }


x86 assembly (clang, -O0):
<xgetgoarm>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xgetgoarm>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [2 x i8] c"6\00"
define i8* @xgetgoarm() {
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [2 x i8] c"6\00"
define i8* @xgetgoarm() {
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
double foo(double);
double f2(void) { return foo(0.0); }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
xorps  %xmm0,%xmm0
call   1030 <foo@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
xorps  %xmm0,%xmm0
jmp    1030 <foo@plt>

LLVM IR (-O0):
define double @f2() {
%1 = call double @foo(double 0.000000e+00)
ret double %1
}

LLVM IR (-O2):
define double @f2() {
%1 = tail call double @foo(double 0.000000e+00)
ret double %1
}
/* Type definitions */
struct timeval {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
void timer_start(struct timeval *tv) { gettimeofday(tv, NULL); }


x86 assembly (clang, -O0):
<timer_start>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timer_start>:
xor    %esi,%esi
jmp    1030 <gettimeofday@plt>

LLVM IR (-O0):
%struct.timeval = type { i32 }
define void @timer_start(%struct.timeval* %0) {
%2 = alloca %struct.timeval*
store %struct.timeval* %0, %struct.timeval** %2
%3 = load %struct.timeval*, %struct.timeval** %2
%4 = call i32 @gettimeofday(%struct.timeval* %3, i32* null)
ret void
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
define void @timer_start(%struct.timeval* nocapture %0) {
%2 = tail call i32 @gettimeofday(%struct.timeval* %0, i32* null)
ret void
}
/* Variables and functions */
int get_attribute(char *, char *, int *);
int num_subcores(void) {
  int rc, subcores;
  rc = get_attribute("/sys/devices/system/cpu/subcores_per_core", "%d",
                     &subcores);
  if (rc)
    return -1;
  return subcores;
}


x86 assembly (clang, -O0):
<num_subcores>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
lea    0xf04(%rip),%rsi
lea    -0xc(%rbp),%rdx
call   1030 <get_attribute@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1148 <num_subcores+0x38>
movl   $0xffffffff,-0x4(%rbp)
jmp    114e <num_subcores+0x3e>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<num_subcores>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xf0b(%rip),%rsi
lea    0x4(%rsp),%rdx
call   1030 <get_attribute@plt>
neg    %eax
sbb    %eax,%eax
or     0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [42 x i8] c"/sys/devices/system/cpu/subcores_per_core\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @num_subcores() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = call i32 @get_attribute(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %3)
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %0
store i32 -1, i32* %1
br label %10
8: ; preds = %0
%9 = load i32, i32* %3
store i32 %9, i32* %1
br label %10
10: ; preds = %8, %7
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
@.str = [42 x i8] c"/sys/devices/system/cpu/subcores_per_core\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @num_subcores() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @get_attribute(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%4 = icmp eq i32 %3, 0
%5 = load i32, i32* %1
%6 = select i1 %4, i32 %5, i32 -1
ret i32 %6
}
/* Variables and functions */
char *strsep(char **, char *);
char *nexttoksep(char **strp, char *sep) {
  char *p = strsep(strp, sep);
  return (p == 0) ? "" : p;
}


x86 assembly (clang, -O0):
<nexttoksep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strsep@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    114c <nexttoksep+0x3c>
lea    0xebd(%rip),%rax
mov    %rax,-0x20(%rbp)
jmp    1154 <nexttoksep+0x44>
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nexttoksep>:
push   %rax
call   1030 <strsep@plt>
test   %rax,%rax
lea    0xee0(%rip),%rcx
cmove  %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @nexttoksep(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
%5 = alloca i8*
store i8** %0, i8*** %3
store i8* %1, i8** %4
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %4
%8 = call i8* @strsep(i8** %6, i8* %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %12
11: ; preds = %2
br label %14
12: ; preds = %2
%13 = load i8*, i8** %5
br label %14
14: ; preds = %12, %11
%15 = phi i8* [ getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), %11 ], [ %13, %12 ]
ret i8* %15
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @nexttoksep(i8** %0, i8* %1) {
%3 = tail call i8* @strsep(i8** %0, i8* %1)
%4 = icmp eq i8* %3, null
%5 = select i1 %4, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* %3
ret i8* %5
}
/* Variables and functions */
int close(int);
int /*<<< orphan*/ perr_exit(char *);
int Close(int fd) {
  int n;
  if ((n = close(fd)) == -1)
    perr_exit("close error");
  return n;
}


x86 assembly (clang, -O0):
<Close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
mov    %eax,-0x8(%rbp)
cmp    $0xffffffff,%eax
jne    114b <Close+0x2b>
lea    0xeba(%rip),%rdi
call   1040 <perr_exit@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Close>:
push   %rbx
call   1030 <close@plt>
mov    %eax,%ebx
cmp    $0xffffffff,%eax
jne    1139 <Close+0x19>
lea    0xecc(%rip),%rdi
call   1040 <perr_exit@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"close error\00"
define i32 @Close(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @close(i32 %4)
store i32 %5, i32* %3
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @perr_exit(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %1
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
@.str = [12 x i8] c"close error\00"
define i32 @Close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @perr_exit(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int tm_mon;
};

/* Variables and functions */
struct tm *localtime(int /*<<< orphan*/ *);
int /*<<< orphan*/ time(void *);
int date_get_month(void) {
  time_t t;
  struct tm *lt;
  t = time((void *)0);
  lt = localtime(&t);
  return lt->tm_mon + 1;
}


x86 assembly (clang, -O0):
<date_get_month>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,-0x4(%rbp)
lea    -0x4(%rbp),%rdi
call   1030 <localtime@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<date_get_month>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1030 <localtime@plt>
mov    (%rax),%eax
add    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define i32 @date_get_month() {
%1 = alloca i32
%2 = alloca %struct.tm*
%3 = call i32 @time(i8* null)
store i32 %3, i32* %1
%4 = call %struct.tm* @localtime(i32* %1)
store %struct.tm* %4, %struct.tm** %2
%5 = load %struct.tm*, %struct.tm** %2
%6 = getelementptr inbounds %struct.tm, %struct.tm* %5, i32 0, i32 0
%7 = load i32, i32* %6
%8 = add nsw i32 %7, 1
ret i32 %8
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define i32 @date_get_month() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @time(i8* null)
store i32 %3, i32* %1
%4 = call %struct.tm* @localtime(i32* %1)
%5 = getelementptr inbounds %struct.tm, %struct.tm* %4, i64 0, i32 0
%6 = load i32, i32* %5
%7 = add nsw i32 %6, 1
ret i32 %7
}
/* Type definitions */
struct heap {
  int dummy;
};

/* Variables and functions */
scalar_t__ hsize(struct heap const *);
bool hempty(const struct heap *hp) { return (0 == hsize(hp)); }


x86 assembly (clang, -O0):
<hempty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <hsize@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hempty>:
push   %rax
call   1030 <hsize@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.heap = type { i32 }
define i32 @hempty(%struct.heap* %0) {
%2 = alloca %struct.heap*
store %struct.heap* %0, %struct.heap** %2
%3 = load %struct.heap*, %struct.heap** %2
%4 = call i64 @hsize(%struct.heap* %3)
%5 = icmp eq i64 0, %4
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
%struct.heap = type { i32 }
define i32 @hempty(%struct.heap* %0) {
%2 = tail call i64 @hsize(%struct.heap* %0)
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
unsigned int f26(unsigned int x, long int y) {
  return (x >> ((-y) & (8 * sizeof(unsigned int) - 1))) ^ (x << y);
}


x86 assembly (clang, -O0):
<f26>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
xor    %ecx,%ecx
sub    -0x10(%rbp),%rcx
and    $0x1f,%rcx
shr    %cl,%eax
mov    -0x4(%rbp),%edx
mov    -0x10(%rbp),%rcx
shl    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f26>:
mov    %esi,%ecx
neg    %cl
mov    %edi,%eax
shr    %cl,%eax
mov    %esi,%ecx
shl    %cl,%edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f26(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = load i32, i32* %3
%6 = load i64, i64* %4
%7 = sub nsw i64 0, %6
%8 = and i64 %7, 31
%9 = trunc i64 %8 to i32
%10 = lshr i32 %5, %9
%11 = load i32, i32* %3
%12 = load i64, i64* %4
%13 = trunc i64 %12 to i32
%14 = shl i32 %11, %13
%15 = xor i32 %10, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @f26(i32 %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = sub i32 0, %3
%5 = and i32 %4, 31
%6 = lshr i32 %0, %5
%7 = shl i32 %0, %3
%8 = xor i32 %6, %7
ret i32 %8
}
/* Variables and functions */
double ceil(double);
double floor(double);
void b_fix(double *x) {
  if (*x < 0.0) {
    *x = ceil(*x);
  } else {
    *x = floor(*x);
  }
}


x86 assembly (clang, -O0):
<b_fix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
ucomisd (%rax),%xmm0
jbe    1157 <b_fix+0x37>
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
call   1030 <ceil@plt>
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
jmp    116c <b_fix+0x4c>
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
call   1040 <floor@plt>
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_fix>:
push   %rbx
mov    %rdi,%rbx
movsd  (%rdi),%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm0,%xmm1
jbe    1139 <b_fix+0x19>
call   1030 <ceil@plt>
jmp    113e <b_fix+0x1e>
call   1040 <floor@plt>
movsd  %xmm0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @b_fix(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = load double, double* %3
%5 = fcmp olt double %4, 0.000000e+00
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load double*, double** %2
%8 = load double, double* %7
%9 = call double @llvm.ceil.f64(double %8)
%10 = load double*, double** %2
store double %9, double* %10
br label %16
11: ; preds = %1
%12 = load double*, double** %2
%13 = load double, double* %12
%14 = call double @llvm.floor.f64(double %13)
%15 = load double*, double** %2
store double %14, double* %15
br label %16
16: ; preds = %11, %6
ret void
}

LLVM IR (-O2):
define void @b_fix(double* nocapture %0) {
%2 = load double, double* %0
%3 = fcmp olt double %2, 0.000000e+00
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call double @llvm.ceil.f64(double %2)
br label %8
6: ; preds = %1
%7 = tail call double @llvm.floor.f64(double %2)
br label %8
8: ; preds = %6, %4
%9 = phi double [ %7, %6 ], [ %5, %4 ]
store double %9, double* %0
ret void
}
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
int /*<<< orphan*/ quit(char *);
int write(int, void const *, size_t);
ssize_t _write(int fd, const void *buf, size_t count) {
  ssize_t s;
  if ((s = write(fd, buf, count)) == -1)
    quit("write() failed");
  return s;
}


x86 assembly (clang, -O0):
<_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <write@plt>
mov    %eax,-0x1c(%rbp)
cmp    $0xffffffff,%eax
jne    115b <_write+0x3b>
lea    0xeaa(%rip),%rdi
call   1040 <quit@plt>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_write>:
push   %rbx
call   1030 <write@plt>
mov    %eax,%ebx
cmp    $0xffffffff,%eax
jne    1139 <_write+0x19>
lea    0xecc(%rip),%rdi
call   1040 <quit@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"write() failed\00"
define i32 @_write(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = call i32 @write(i32 %8, i8* %9, i64 %10)
store i32 %11, i32* %7
%12 = icmp eq i32 %11, -1
br i1 %12, label %13, label %15
13: ; preds = %3
%14 = call i32 @quit(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
br label %15
15: ; preds = %13, %3
%16 = load i32, i32* %7
ret i32 %16
}

LLVM IR (-O2):
@.str = [15 x i8] c"write() failed\00"
define i32 @_write(i32 %0, i8* nocapture %1, i64 %2) {
%4 = tail call i32 @write(i32 %0, i8* %1, i64 %2)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @quit(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %3
ret i32 %4
}
int dummy_main() { return 0; }


x86 assembly (clang, -O0):
<dummy_main>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy_main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dummy_main() {
ret i32 0
}

LLVM IR (-O2):
define i32 @dummy_main() {
ret i32 0
}
/* Variables and functions */
int rand_limit(int);
int rand_range(int min, int max) { return min + rand_limit(max - min + 1); }


x86 assembly (clang, -O0):
<rand_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    -0x4(%rbp),%edi
add    $0x1,%edi
call   1030 <rand_limit@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_range>:
push   %rbx
mov    %edi,%ebx
sub    %edi,%esi
lea    0x1(%rsi),%edi
call   1030 <rand_limit@plt>
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @rand_range(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = add nsw i32 %8, 1
%10 = call i32 @rand_limit(i32 %9)
%11 = add nsw i32 %5, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @rand_range(i32 %0, i32 %1) {
%3 = sub i32 1, %0
%4 = add i32 %3, %1
%5 = tail call i32 @rand_limit(i32 %4)
%6 = add nsw i32 %5, %0
ret i32 %6
}
/* Type definitions */
typedef scalar_t__ uint16_t;
typedef scalar_t__ int16_t;

/* Variables and functions */
bool InsSequenceGe(uint16_t a, uint16_t b) { return (int16_t)(a - b) >= 0; }


x86 assembly (clang, -O0):
<InsSequenceGe>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sub    -0x10(%rbp),%rax
cmp    $0x0,%rax
setge  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<InsSequenceGe>:
xor    %eax,%eax
cmp    %rsi,%rdi
setge  %al
ret

LLVM IR (-O0):
define i32 @InsSequenceGe(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = sub nsw i64 %5, %6
%8 = icmp sge i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @InsSequenceGe(i64 %0, i64 %1) {
%3 = icmp sge i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
double cos(double x) {
  return ({
    extern __typeof__(cos) module_libc_cos;
    &module_libc_cos;
  })(x);
}


x86 assembly (clang, -O0):
<cos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    0x2ecc(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsd  -0x8(%rbp),%xmm0
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cos>:
jmp    1030 <module_libc_cos@plt>

LLVM IR (-O0):
define double @cos(double %0) {
%2 = alloca double
%3 = alloca double (double)*
store double %0, double* %2
store double (double)* @module_libc_cos, double (double)** %3
%4 = load double (double)*, double (double)** %3
%5 = load double, double* %2
%6 = call double %4(double %5)
ret double %6
}

LLVM IR (-O2):
define double @cos(double %0) {
%2 = tail call double @module_libc_cos(double %0)
ret double %2
}
long C_u_i_exactp(long x) {
  if (x & 0x00000001)
    return ((long)(0x00000006 | 0x00000010));
  return ((long)(0x00000006 | 0x00000000));
}


x86 assembly (clang, -O0):
<C_u_i_exactp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
je     1127 <C_u_i_exactp+0x27>
movq   $0x16,-0x8(%rbp)
jmp    112f <C_u_i_exactp+0x2f>
movq   $0x6,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<C_u_i_exactp>:
and    $0x1,%edi
shl    $0x4,%rdi
lea    0x6(%rdi),%rax
ret

LLVM IR (-O0):
define i64 @C_u_i_exactp(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = and i64 %4, 1
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i64 22, i64* %2
br label %9
8: ; preds = %1
store i64 6, i64* %2
br label %9
9: ; preds = %8, %7
%10 = load i64, i64* %2
ret i64 %10
}

LLVM IR (-O2):
define i64 @C_u_i_exactp(i64 %0) {
%2 = and i64 %0, 1
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i64 6, i64 22
ret i64 %4
}
/* Type definitions */
struct timespec {
  long long tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_MONOTONIC;
int /*<<< orphan*/ assert(int);
int clock_gettime(int /*<<< orphan*/, struct timespec *);
long long GetNanoTimei(void) {
  struct timespec ts;
  int h = clock_gettime(CLOCK_MONOTONIC, &ts);
  assert(!h);
  assert(!h);
  return (long long)ts.tv_sec * 1000000000 + ts.tv_nsec;
}


x86 assembly (clang, -O0):
<GetNanoTimei>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
lea    -0x10(%rbp),%rsi
call   1030 <clock_gettime@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
cmpl   $0x0,-0x14(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
imul   $0x3b9aca00,-0x8(%rbp),%rax
3b
add    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetNanoTimei>:
push   %rbx
sub    $0x10,%rsp
mov    0x2ebc(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
call   1030 <clock_gettime@plt>
xor    %ebx,%ebx
test   %eax,%eax
sete   %bl
mov    %ebx,%edi
call   1040 <assert@plt>
mov    %ebx,%edi
call   1040 <assert@plt>
imul   $0x3b9aca00,0x8(%rsp),%rax
9a 3b
add    (%rsp),%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
@CLOCK_MONOTONIC = global i32 0
define i64 @GetNanoTimei() {
%1 = alloca %struct.timespec
%2 = alloca i32
%3 = load i32, i32* @CLOCK_MONOTONIC
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %1)
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
%10 = load i32, i32* %2
%11 = icmp ne i32 %10, 0
%12 = xor i1 %11, true
%13 = zext i1 %12 to i32
%14 = call i32 @assert(i32 %13)
%15 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 1
%16 = load i64, i64* %15
%17 = mul nsw i64 %16, 1000000000
%18 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 0
%19 = load i64, i64* %18
%20 = add nsw i64 %17, %19
ret i64 %20
}

LLVM IR (-O2):
%struct.timespec = type { i64, i64 }
@CLOCK_MONOTONIC = global i32 0
define i64 @GetNanoTimei() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = load i32, i32* @CLOCK_MONOTONIC
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %1)
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
%8 = call i32 @assert(i32 %6)
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%10 = load i64, i64* %9
%11 = mul nsw i64 %10, 1000000000
%12 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%13 = load i64, i64* %12
%14 = add nsw i64 %11, %13
ret i64 %14
}
void GlobalInterruptEnable(void) {
  ;
  ;
}


x86 assembly (clang, -O0):
<GlobalInterruptEnable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GlobalInterruptEnable>:
ret

LLVM IR (-O0):
define void @GlobalInterruptEnable() {
ret void
}

LLVM IR (-O2):
define void @GlobalInterruptEnable() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int drv_LT_list(void) {
  printf("LCDTerm serial-to-HD44780 adapter board");
  return 0;
}


x86 assembly (clang, -O0):
<drv_LT_list>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<drv_LT_list>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [40 x i8] c"LCDTerm serial-to-HD44780 adapter board\00"
define i32 @drv_LT_list() {
%1 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [40 x i8] c"LCDTerm serial-to-HD44780 adapter board\00"
define i32 @drv_LT_list() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void twopole_note_free(void *data) { free(data); }


x86 assembly (clang, -O0):
<twopole_note_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<twopole_note_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @twopole_note_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @twopole_note_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
unsigned long proc_get_freq_hardware(unsigned int);
unsigned long sysfs_get_freq_hardware(unsigned int);
unsigned long cpufreq_get_freq_hardware(unsigned int cpu) {
  unsigned long ret = sysfs_get_freq_hardware(cpu);
  if (!ret)
    ret = proc_get_freq_hardware(cpu);
  return (ret);
}


x86 assembly (clang, -O0):
<cpufreq_get_freq_hardware>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <sysfs_get_freq_hardware@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114e <cpufreq_get_freq_hardware+0x2e>
mov    -0x4(%rbp),%edi
call   1030 <proc_get_freq_hardware@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpufreq_get_freq_hardware>:
push   %rbx
mov    %edi,%ebx
call   1040 <sysfs_get_freq_hardware@plt>
test   %rax,%rax
je     112f <cpufreq_get_freq_hardware+0xf>
pop    %rbx
ret
mov    %ebx,%edi
pop    %rbx
jmp    1030 <proc_get_freq_hardware@plt>

LLVM IR (-O0):
define i64 @cpufreq_get_freq_hardware(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i64 @sysfs_get_freq_hardware(i32 %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = icmp ne i64 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %1
%9 = load i32, i32* %2
%10 = call i64 @proc_get_freq_hardware(i32 %9)
store i64 %10, i64* %3
br label %11
11: ; preds = %8, %1
%12 = load i64, i64* %3
ret i64 %12
}

LLVM IR (-O2):
define i64 @cpufreq_get_freq_hardware(i32 %0) {
%2 = tail call i64 @sysfs_get_freq_hardware(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i64 @proc_get_freq_hardware(i32 %0)
br label %6
6: ; preds = %4, %1
%7 = phi i64 [ %2, %1 ], [ %5, %4 ]
ret i64 %7
}