xunge/DecIR huggingface dataset:
/* Variables and functions */
uintptr_t gcd_addr(uintptr_t x, uintptr_t y) {
  uintptr_t tmp;
  if (x > y) {
    tmp = x;
    x = y;
    y = tmp;
  }
  while (0 != x) {
    tmp = y % x;
    y = x;
    x = tmp;
  }
  return y;
}


x86 assembly (clang, -O0):
<gcd_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jbe    1132 <gcd_addr+0x32>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1137 <gcd_addr+0x37>
xor    %eax,%eax
cmp    -0x8(%rbp),%rax
je     1168 <gcd_addr+0x68>
mov    -0x10(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x8(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1137 <gcd_addr+0x37>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd_addr>:
mov    %rsi,%rax
cmp    %rsi,%rdi
mov    %rdi,%rdx
cmova  %rsi,%rdx
cmova  %rdi,%rax
test   %rdx,%rdx
jne    112d <gcd_addr+0x2d>
ret
nopw   0x0(%rax,%rax,1)
xor    %edx,%edx
div    %rcx
mov    %rcx,%rax
test   %rdx,%rdx
je     1142 <gcd_addr+0x42>
mov    %rdx,%rcx
mov    %rax,%rdx
or     %rcx,%rdx
shr    $0x20,%rdx
jne    1120 <gcd_addr+0x20>
xor    %edx,%edx
div    %ecx
jmp    1125 <gcd_addr+0x25>
mov    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @gcd_addr(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = icmp ugt i64 %6, %7
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i64, i64* %3
store i64 %10, i64* %5
%11 = load i64, i64* %4
store i64 %11, i64* %3
%12 = load i64, i64* %5
store i64 %12, i64* %4
br label %13
13: ; preds = %9, %2
br label %14
14: ; preds = %17, %13
%15 = load i64, i64* %3
%16 = icmp ne i64 0, %15
br i1 %16, label %17, label %23
17: ; preds = %14
%18 = load i64, i64* %4
%19 = load i64, i64* %3
%20 = urem i64 %18, %19
store i64 %20, i64* %5
%21 = load i64, i64* %3
store i64 %21, i64* %4
%22 = load i64, i64* %5
store i64 %22, i64* %3
br label %14
23: ; preds = %14
%24 = load i64, i64* %4
ret i64 %24
}

LLVM IR (-O2):
define i64 @gcd_addr(i64 %0, i64 %1) {
%3 = icmp ugt i64 %0, %1
%4 = select i1 %3, i64 %1, i64 %0
%5 = select i1 %3, i64 %0, i64 %1
%6 = icmp eq i64 %4, 0
br i1 %6, label %12, label %7
7: ; preds = %2, %7
%8 = phi i64 [ %9, %7 ], [ %5, %2 ]
%9 = phi i64 [ %10, %7 ], [ %4, %2 ]
%10 = urem i64 %8, %9
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %7
12: ; preds = %7, %2
%13 = phi i64 [ %5, %2 ], [ %9, %7 ]
ret i64 %13
}
int test_imm_2Buint16_reg(unsigned short val) {
  return ((val) & (0x2B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_2Buint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x2b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Buint16_reg>:
test   $0x2b,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Buint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 43
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_2Buint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 43
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void fun_dtor() {
  printf("fun_dtor"
         "\n");
}


x86 assembly (clang, -O0):
<fun_dtor>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_dtor>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"fun_dtor\0A\00"
define void @fun_dtor() {
%1 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [9 x i8] c"fun_dtor\00"
define void @fun_dtor() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
void *QSDK_alloc_memory_region();
int /*<<< orphan*/ qsdk_set_mr(void *, void *);
void *generic_ram_init(void *dev, void *init_data) {
  void *ram_dev = QSDK_alloc_memory_region();
  qsdk_set_mr(dev, ram_dev);
  return ram_dev;
}


x86 assembly (clang, -O0):
<generic_ram_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <QSDK_alloc_memory_region@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <qsdk_set_mr@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generic_ram_init>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %eax,%eax
call   1040 <QSDK_alloc_memory_region@plt>
mov    %rax,%rbx
mov    %r14,%rdi
mov    %rax,%rsi
call   1030 <qsdk_set_mr@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @generic_ram_init(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = call i8* (...) @QSDK_alloc_memory_region()
store i8* %6, i8** %5
%7 = load i8*, i8** %3
%8 = load i8*, i8** %5
%9 = call i32 @qsdk_set_mr(i8* %7, i8* %8)
%10 = load i8*, i8** %5
ret i8* %10
}

LLVM IR (-O2):
define i8* @generic_ram_init(i8* %0, i8* nocapture readnone %1) {
%3 = tail call i8* (...) @QSDK_alloc_memory_region()
%4 = tail call i32 @qsdk_set_mr(i8* %0, i8* %3)
ret i8* %3
}
/* Type definitions */
struct clad_test {
  int dummy;
};

/* Variables and functions */
struct clad_test *clad_test_assert(struct clad_test *, int, char *, int,
                                   char const *);
struct clad_test *clad_test_true(struct clad_test *test, int boole,
                                 const char *explain) {
  return clad_test_assert(test, boole, "Boolean should be TRUE: %d; %s ", boole,
                          explain);
}


x86 assembly (clang, -O0):
<clad_test_true>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%r8
lea    0xec8(%rip),%rdx
call   1030 <clad_test_assert@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clad_test_true>:
mov    %rdx,%r8
lea    0xee6(%rip),%rdx
mov    %esi,%ecx
jmp    1030 <clad_test_assert@plt>

LLVM IR (-O0):
%struct.clad_test = type { i32 }
@.str = [32 x i8] c"Boolean should be TRUE: %d; %s \00"
define %struct.clad_test* @clad_test_true(%struct.clad_test* %0, i32 %1, i8* %2) {
%4 = alloca %struct.clad_test*
%5 = alloca i32
%6 = alloca i8*
store %struct.clad_test* %0, %struct.clad_test** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load %struct.clad_test*, %struct.clad_test** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = call %struct.clad_test* @clad_test_assert(%struct.clad_test* %7, i32 %8, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i32 %9, i8* %10)
ret %struct.clad_test* %11
}

LLVM IR (-O2):
%struct.clad_test = type { i32 }
@.str = [32 x i8] c"Boolean should be TRUE: %d; %s \00"
define %struct.clad_test* @clad_test_true(%struct.clad_test* %0, i32 %1, i8* %2) {
%4 = tail call %struct.clad_test* @clad_test_assert(%struct.clad_test* %0, i32 %1, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i32 %1, i8* %2)
ret %struct.clad_test* %4
}
/* Variables and functions */
int /*<<< orphan*/ vrna_message_constraint_options(unsigned int);
void vrna_message_constraint_options_all(void) {
  vrna_message_constraint_options(65536U | 131072U | 262144U | 524288U |
                                  1048576U);
}


x86 assembly (clang, -O0):
<vrna_message_constraint_options_all>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1f0000,%edi
call   1030 <vrna_message_constraint_options@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vrna_message_constraint_options_all>:
mov    $0x1f0000,%edi
jmp    1030 <vrna_message_constraint_options@plt>

LLVM IR (-O0):
define void @vrna_message_constraint_options_all() {
%1 = call i32 @vrna_message_constraint_options(i32 2031616)
ret void
}

LLVM IR (-O2):
define void @vrna_message_constraint_options_all() {
%1 = tail call i32 @vrna_message_constraint_options(i32 2031616)
ret void
}
/* Variables and functions */
double getmaximum_double(int, double *);
double getmaximum(int n, double *data) { return getmaximum_double(n, data); }


x86 assembly (clang, -O0):
<getmaximum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <getmaximum_double@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getmaximum>:
jmp    1030 <getmaximum_double@plt>

LLVM IR (-O0):
define double @getmaximum(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca double*
store i32 %0, i32* %3
store double* %1, double** %4
%5 = load i32, i32* %3
%6 = load double*, double** %4
%7 = call double @getmaximum_double(i32 %5, double* %6)
ret double %7
}

LLVM IR (-O2):
define double @getmaximum(i32 %0, double* %1) {
%3 = tail call double @getmaximum_double(i32 %0, double* %1)
ret double %3
}
increment(int x) {
  x = x + 1;
  return x;
}


x86 assembly (clang, -O0):
<increment>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<increment>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @increment(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
store i32 %4, i32* %2
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
define i32 @increment(i32 %0) {
%2 = add nsw i32 %0, 1
ret i32 %2
}
/* Variables and functions */
double sqrt(double);
double dbr_len3(double a, double b, double c) {
  return sqrt(a * a + b * b + c * c);
}


x86 assembly (clang, -O0):
<dbr_len3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm2
movsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbr_len3>:
mulsd  %xmm1,%xmm1
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
mulsd  %xmm2,%xmm2
addsd  %xmm0,%xmm2
xorpd  %xmm0,%xmm0
ucomisd %xmm0,%xmm2
jb     1136 <dbr_len3+0x26>
xorps  %xmm0,%xmm0
sqrtsd %xmm2,%xmm0
ret
movapd %xmm2,%xmm0
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @dbr_len3(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %4
%9 = load double, double* %5
%10 = load double, double* %5
%11 = fmul double %9, %10
%12 = call double @llvm.fmuladd.f64(double %7, double %8, double %11)
%13 = load double, double* %6
%14 = load double, double* %6
%15 = call double @llvm.fmuladd.f64(double %13, double %14, double %12)
%16 = call double @sqrt(double %15)
ret double %16
}

LLVM IR (-O2):
define double @dbr_len3(double %0, double %1, double %2) {
%4 = fmul double %1, %1
%5 = tail call double @llvm.fmuladd.f64(double %0, double %0, double %4)
%6 = tail call double @llvm.fmuladd.f64(double %2, double %2, double %5)
%7 = tail call double @sqrt(double %6)
ret double %7
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void *acc_create(unsigned char *, int const);
int /*<<< orphan*/ acc_delete(int /*<<< orphan*/, int const);
int /*<<< orphan*/ free(unsigned char *);
scalar_t__ malloc(int const);
int main(int argc, char **argv) {
  const int N = 256;
  unsigned char *h;
  void *d;
  h = (unsigned char *)malloc(N);
  d = acc_create(h, N);
  if (!d)
    abort();
  acc_delete(0, N);
  free(h);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x100,-0x14(%rbp)
mov    $0x100,%edi
call   1060 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    $0x100,%esi
call   1050 <acc_create@plt>
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
jne    119f <main+0x4f>
mov    $0x0,%al
call   1040 <abort@plt>
xor    %edi,%edi
mov    $0x100,%esi
call   1070 <acc_delete@plt>
mov    -0x20(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x100,%edi
call   1060 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    $0x100,%esi
call   1050 <acc_create@plt>
test   %rax,%rax
je     1188 <main+0x38>
xor    %edi,%edi
mov    $0x100,%esi
call   1070 <acc_delete@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret
xor    %eax,%eax
call   1040 <abort@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 256, i32* %6
%9 = call i64 @malloc(i32 256)
%10 = inttoptr i64 %9 to i8*
store i8* %10, i8** %7
%11 = load i8*, i8** %7
%12 = call i8* @acc_create(i8* %11, i32 256)
store i8* %12, i8** %8
%13 = load i8*, i8** %8
%14 = icmp ne i8* %13, null
br i1 %14, label %17, label %15
15: ; preds = %2
%16 = call i32 (...) @abort()
unreachable
17: ; preds = %2
%18 = call i32 @acc_delete(i32 0, i32 256)
%19 = load i8*, i8** %7
%20 = call i32 @free(i8* %19)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 @malloc(i32 256)
%4 = inttoptr i64 %3 to i8*
%5 = tail call i8* @acc_create(i8* %4, i32 256)
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = tail call i32 (...) @abort()
unreachable
9: ; preds = %2
%10 = tail call i32 @acc_delete(i32 0, i32 256)
%11 = tail call i32 @free(i8* %4)
ret i32 0
}
double decide_color_range(double max_inclination, double COLOR_SHIFT,
                          double COLOR_MAX) {
  int i;
  i = max_inclination + 0.99;
  return ((COLOR_MAX - COLOR_SHIFT) / i);
}


x86 assembly (clang, -O0):
<decide_color_range>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  0xee5(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x1c(%rbp)
movsd  -0x18(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
cvtsi2sdl -0x1c(%rbp),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<decide_color_range>:
addsd  0xef8(%rip),%xmm0
cvttpd2dq %xmm0,%xmm0
subsd  %xmm1,%xmm2
cvtdq2pd %xmm0,%xmm0
divsd  %xmm0,%xmm2
movapd %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @decide_color_range(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca i32
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%8 = load double, double* %4
%9 = fadd double %8, 0x3FEFAE147AE147AE
%10 = fptosi double %9 to i32
store i32 %10, i32* %7
%11 = load double, double* %6
%12 = load double, double* %5
%13 = fsub double %11, %12
%14 = load i32, i32* %7
%15 = sitofp i32 %14 to double
%16 = fdiv double %13, %15
ret double %16
}

LLVM IR (-O2):
define double @decide_color_range(double %0, double %1, double %2) {
%4 = fadd double %0, 0x3FEFAE147AE147AE
%5 = fptosi double %4 to i32
%6 = fsub double %2, %1
%7 = sitofp i32 %5 to double
%8 = fdiv double %6, %7
ret double %8
}
/* Type definitions */
struct snd_kcontrol {
  int dummy;
};
struct snd_ctl_elem_info {
  int dummy;
};

/* Variables and functions */
int snd_ctl_enum_info(struct snd_ctl_elem_info *, int, int,
                      char const *const *);
int snd_ac97_vt1618_aux_info(struct snd_kcontrol *kcontrol,
                             struct snd_ctl_elem_info *uinfo) {
  static const char *const txt_aux[] = {"Aux In", "Back Surr Out"};
  return snd_ctl_enum_info(uinfo, 1, 2, txt_aux);
}


x86 assembly (clang, -O0):
<snd_ac97_vt1618_aux_info>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x1,%esi
mov    $0x2,%edx
lea    0x2cdb(%rip),%rcx
call   1030 <snd_ctl_enum_info@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<snd_ac97_vt1618_aux_info>:
mov    %rsi,%rdi
lea    0x2cf6(%rip),%rcx
mov    $0x1,%esi
mov    $0x2,%edx
jmp    1030 <snd_ctl_enum_info@plt>

LLVM IR (-O0):
%struct.snd_kcontrol = type { i32 }
%struct.snd_ctl_elem_info = type { i32 }
@snd_ac97_vt1618_aux_info.txt_aux = internal constant [2 x i8*] [i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i32 0, i32 0)]
@.str = [7 x i8] c"Aux In\00"
@.str.1 = [14 x i8] c"Back Surr Out\00"
define i32 @snd_ac97_vt1618_aux_info(%struct.snd_kcontrol* %0, %struct.snd_ctl_elem_info* %1) {
%3 = alloca %struct.snd_kcontrol*
%4 = alloca %struct.snd_ctl_elem_info*
store %struct.snd_kcontrol* %0, %struct.snd_kcontrol** %3
store %struct.snd_ctl_elem_info* %1, %struct.snd_ctl_elem_info** %4
%5 = load %struct.snd_ctl_elem_info*, %struct.snd_ctl_elem_info** %4
%6 = call i32 @snd_ctl_enum_info(%struct.snd_ctl_elem_info* %5, i32 1, i32 2, i8** getelementptr inbounds ([2 x i8*], [2 x i8*]* @snd_ac97_vt1618_aux_info.txt_aux, i64 0, i64 0))
ret i32 %6
}

LLVM IR (-O2):
%struct.snd_kcontrol = type { i32 }
%struct.snd_ctl_elem_info = type { i32 }
@snd_ac97_vt1618_aux_info.txt_aux = internal constant [2 x i8*] [i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i32 0, i32 0)]
@.str = [7 x i8] c"Aux In\00"
@.str.1 = [14 x i8] c"Back Surr Out\00"
define i32 @snd_ac97_vt1618_aux_info(%struct.snd_kcontrol* nocapture readnone %0, %struct.snd_ctl_elem_info* %1) {
%3 = tail call i32 @snd_ctl_enum_info(%struct.snd_ctl_elem_info* %1, i32 1, i32 2, i8** getelementptr inbounds ([2 x i8*], [2 x i8*]* @snd_ac97_vt1618_aux_info.txt_aux, i64 0, i64 0))
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ check(int /*<<< orphan*/, char const *);
void *malloc(size_t const);
void *float_new_array(const size_t N, const char *error_msg) {
  void *ptr;
  ptr = malloc(N * sizeof(float));
  check(ptr != NULL, error_msg);
  return ptr;
}


x86 assembly (clang, -O0):
<float_new_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
shl    $0x2,%rdi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
mov    -0x10(%rbp),%rsi
call   1040 <check@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<float_new_array>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
shl    $0x2,%rdi
call   1030 <malloc@plt>
mov    %rax,%rbx
xor    %edi,%edi
test   %rax,%rax
setne  %dil
mov    %r14,%rsi
call   1040 <check@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @float_new_array(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
%6 = load i64, i64* %3
%7 = mul i64 %6, 4
%8 = call i8* @malloc(i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
%11 = zext i1 %10 to i32
%12 = load i8*, i8** %4
%13 = call i32 @check(i32 %11, i8* %12)
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
define noalias i8* @float_new_array(i64 %0, i8* %1) {
%3 = shl i64 %0, 2
%4 = tail call i8* @malloc(i64 %3)
%5 = icmp ne i8* %4, null
%6 = zext i1 %5 to i32
%7 = tail call i32 @check(i32 %6, i8* %1)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ LOG_CRIT;
int /*<<< orphan*/ abort();
int /*<<< orphan*/ logx(int /*<<< orphan*/, char *, char const *, char const *,
                        unsigned int);
void __dm_assert_fail(const char *assertion, unsigned int line,
                      const char *function) {
  logx(LOG_CRIT, "assertion '%s' failed at %s:%d", assertion, function, line);
  abort();
}


x86 assembly (clang, -O0):
<__dm_assert_fail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0xc(%rbp),%r8d
lea    0xeb1(%rip),%rsi
call   1040 <logx@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<__dm_assert_fail>:
push   %rax
mov    %rdx,%rcx
mov    %esi,%r8d
mov    %rdi,%rdx
mov    0x2eb7(%rip),%rax
mov    (%rax),%edi
lea    0xec6(%rip),%rsi
call   1040 <logx@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@LOG_CRIT = global i32 0
@.str = [31 x i8] c"assertion '%s' failed at %s:%d\00"
define void @__dm_assert_fail(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* @LOG_CRIT
%8 = load i8*, i8** %4
%9 = load i8*, i8** %6
%10 = load i32, i32* %5
%11 = call i32 @logx(i32 %7, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %8, i8* %9, i32 %10)
%12 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@LOG_CRIT = global i32 0
@.str = [31 x i8] c"assertion '%s' failed at %s:%d\00"
define void @__dm_assert_fail(i8* %0, i32 %1, i8* %2) {
%4 = load i32, i32* @LOG_CRIT
%5 = tail call i32 @logx(i32 %4, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %2, i32 %1)
%6 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int AF_UNIX;
int idrnet_af_unix() { return AF_UNIX; }


x86 assembly (clang, -O0):
<idrnet_af_unix>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<idrnet_af_unix>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@AF_UNIX = global i32 0
define i32 @idrnet_af_unix() {
%1 = load i32, i32* @AF_UNIX
ret i32 %1
}

LLVM IR (-O2):
@AF_UNIX = global i32 0
define i32 @idrnet_af_unix() {
%1 = load i32, i32* @AF_UNIX
ret i32 %1
}
void sprd_turnon_watchdog(unsigned int ms) {}


x86 assembly (clang, -O0):
<sprd_turnon_watchdog>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sprd_turnon_watchdog>:
ret

LLVM IR (-O0):
define void @sprd_turnon_watchdog(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @sprd_turnon_watchdog(i32 %0) {
ret void
}
/* Variables and functions */
double cos(double);
double exp(double);
double sin(double);
double transd(double x) { return exp(x) * (cos(x) - sin(x)); }


x86 assembly (clang, -O0):
<transd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <exp@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1050 <cos@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <sin@plt>
movsd  -0x18(%rbp),%xmm1
movaps %xmm0,%xmm2
movsd  -0x10(%rbp),%xmm0
subsd  %xmm2,%xmm1
mulsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<transd>:
sub    $0x18,%rsp
movsd  %xmm0,(%rsp)
call   1040 <exp@plt>
movsd  %xmm0,0x10(%rsp)
movsd  (%rsp),%xmm0
call   1050 <cos@plt>
movsd  %xmm0,0x8(%rsp)
movsd  (%rsp),%xmm0
call   1030 <sin@plt>
movsd  0x8(%rsp),%xmm1
subsd  %xmm0,%xmm1
mulsd  0x10(%rsp),%xmm1
movapd %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @transd(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @exp(double %3)
%5 = load double, double* %2
%6 = call double @cos(double %5)
%7 = load double, double* %2
%8 = call double @sin(double %7)
%9 = fsub double %6, %8
%10 = fmul double %4, %9
ret double %10
}

LLVM IR (-O2):
define double @transd(double %0) {
%2 = tail call double @exp(double %0)
%3 = tail call double @cos(double %0)
%4 = tail call double @sin(double %0)
%5 = fsub double %3, %4
%6 = fmul double %2, %5
ret double %6
}
/* Type definitions */
struct pplex {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ deallocate(struct pplex *);
void freepplex(struct pplex *cl) { deallocate(cl); }


x86 assembly (clang, -O0):
<freepplex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <deallocate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freepplex>:
jmp    1030 <deallocate@plt>

LLVM IR (-O0):
%struct.pplex = type { i32 }
define void @freepplex(%struct.pplex* %0) {
%2 = alloca %struct.pplex*
store %struct.pplex* %0, %struct.pplex** %2
%3 = load %struct.pplex*, %struct.pplex** %2
%4 = call i32 @deallocate(%struct.pplex* %3)
ret void
}

LLVM IR (-O2):
%struct.pplex = type { i32 }
define void @freepplex(%struct.pplex* %0) {
%2 = tail call i32 @deallocate(%struct.pplex* %0)
ret void
}
/* Variables and functions */
scalar_t__ isalpha(int);
int toupper(int c) {
  if (isalpha(c)) {
    return c & ~0x20;
  }
  return c;
}


x86 assembly (clang, -O0):
<toupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
je     113b <toupper+0x2b>
mov    -0x8(%rbp),%eax
and    $0xffffffdf,%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <toupper+0x31>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toupper>:
push   %rbx
mov    %edi,%ebx
call   1030 <isalpha@plt>
mov    %ebx,%ecx
and    $0xffffffdf,%ecx
test   %rax,%rax
cmove  %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @toupper(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @isalpha(i32 %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = and i32 %8, -33
store i32 %9, i32* %2
br label %12
10: ; preds = %1
%11 = load i32, i32* %3
store i32 %11, i32* %2
br label %12
12: ; preds = %10, %7
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @toupper(i32 %0) {
%2 = tail call i64 @isalpha(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = and i32 %0, -33
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void sleeping_fn(int us) { usleep(us); }


x86 assembly (clang, -O0):
<sleeping_fn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleeping_fn>:
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @sleeping_fn(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @usleep(i32 %3)
ret void
}

LLVM IR (-O2):
define void @sleeping_fn(i32 %0) {
%2 = tail call i32 @usleep(i32 %0)
ret void
}
int multiplier(void) { return 1; }


x86 assembly (clang, -O0):
<multiplier>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<multiplier>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @multiplier() {
ret i32 1
}

LLVM IR (-O2):
define i32 @multiplier() {
ret i32 1
}
/* Variables and functions */
void *malloc(int);
int main(void) {
  void *x = malloc(10);
  int *x4;
  short *x2;
  char *x1;
  int y4;
  short y2;
  char y1;
  x4 = x - 4;
  x2 = x - 4;
  x1 = x - 1;
  y4 = *x4;
  *x4 = y4;
  y2 = *x2;
  *x2 = y2;
  y1 = *x1;
  *x1 = y1;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xa,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0xfffffffffffffffc,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
add    $0xfffffffffffffffc,%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x20(%rbp),%rax
mov    (%rax),%ax
mov    %ax,-0x2e(%rbp)
mov    -0x2e(%rbp),%cx
mov    -0x20(%rbp),%rax
mov    %cx,(%rax)
mov    -0x28(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x2f(%rbp)
mov    -0x2f(%rbp),%cl
mov    -0x28(%rbp),%rax
mov    %cl,(%rax)
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i32*
%4 = alloca i16*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i16
%8 = alloca i8
store i32 0, i32* %1
%9 = call i8* @malloc(i32 10)
store i8* %9, i8** %2
%10 = load i8*, i8** %2
%11 = getelementptr i8, i8* %10, i64 -4
%12 = bitcast i8* %11 to i32*
store i32* %12, i32** %3
%13 = load i8*, i8** %2
%14 = getelementptr i8, i8* %13, i64 -4
%15 = bitcast i8* %14 to i16*
store i16* %15, i16** %4
%16 = load i8*, i8** %2
%17 = getelementptr i8, i8* %16, i64 -1
store i8* %17, i8** %5
%18 = load i32*, i32** %3
%19 = load i32, i32* %18
store i32 %19, i32* %6
%20 = load i32, i32* %6
%21 = load i32*, i32** %3
store i32 %20, i32* %21
%22 = load i16*, i16** %4
%23 = load i16, i16* %22
store i16 %23, i16* %7
%24 = load i16, i16* %7
%25 = load i16*, i16** %4
store i16 %24, i16* %25
%26 = load i8*, i8** %5
%27 = load i8, i8* %26
store i8 %27, i8* %8
%28 = load i8, i8* %8
%29 = load i8*, i8** %5
store i8 %28, i8* %29
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ WINDOW;

/* Variables and functions */
int /*<<< orphan*/ mvwprintw(int /*<<< orphan*/ *, int, int, char *);
int /*<<< orphan*/ wrefresh(int /*<<< orphan*/ *);
void delchprintarr(WINDOW *win, int x, int y) {
  mvwprintw(win, x + 1, (y * 3) + 3, "[ ]");
  wrefresh(win);
}


x86 assembly (clang, -O0):
<delchprintarr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
add    $0x1,%esi
imul   $0x3,-0x10(%rbp),%edx
add    $0x3,%edx
lea    0xeb6(%rip),%rcx
call   1040 <mvwprintw@plt>
mov    -0x8(%rbp),%rdi
call   1030 <wrefresh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delchprintarr>:
push   %rbx
mov    %rdi,%rbx
add    $0x1,%esi
lea    (%rdx,%rdx,2),%edx
add    $0x3,%edx
lea    0xecc(%rip),%rcx
call   1040 <mvwprintw@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <wrefresh@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"[ ]\00"
define void @delchprintarr(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = add nsw i32 %8, 1
%10 = load i32, i32* %6
%11 = mul nsw i32 %10, 3
%12 = add nsw i32 %11, 3
%13 = call i32 @mvwprintw(i32* %7, i32 %9, i32 %12, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%14 = load i32*, i32** %4
%15 = call i32 @wrefresh(i32* %14)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"[ ]\00"
define void @delchprintarr(i32* %0, i32 %1, i32 %2) {
%4 = add nsw i32 %1, 1
%5 = mul nsw i32 %2, 3
%6 = add nsw i32 %5, 3
%7 = tail call i32 @mvwprintw(i32* %0, i32 %4, i32 %6, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%8 = tail call i32 @wrefresh(i32* %0)
ret void
}
void X509_NAME_ENTRY_free(void) {}


x86 assembly (clang, -O0):
<X509_NAME_ENTRY_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_NAME_ENTRY_free>:
ret

LLVM IR (-O0):
define void @X509_NAME_ENTRY_free() {
ret void
}

LLVM IR (-O2):
define void @X509_NAME_ENTRY_free() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sleep_us(int);
void sleep_ms(unsigned int msecs) { sleep_us(1000 * msecs); }


x86 assembly (clang, -O0):
<sleep_ms>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%edi
call   1030 <sleep_us@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleep_ms>:
imul   $0x3e8,%edi,%edi
jmp    1030 <sleep_us@plt>

LLVM IR (-O0):
define void @sleep_ms(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul i32 1000, %3
%5 = call i32 @sleep_us(i32 %4)
ret void
}

LLVM IR (-O2):
define void @sleep_ms(i32 %0) {
%2 = mul i32 %0, 1000
%3 = tail call i32 @sleep_us(i32 %2)
ret void
}
void plls_on() {
  *(volatile unsigned long *)((void *)0xfffffc00 + 0x2c) =
      ((((64 - 1) & 0x7ff) << 16) | ((8) & 0xff) | (((0x1f) & 0x3f) << 8));
  do {
  } while (!(*(volatile unsigned long *)((void *)0xfffffc00 + 0x68) & 0x04));
}


x86 assembly (clang, -O0):
<plls_on>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffffc00,%eax
movq   $0x3f1f08,0x2c(%rax)
jmp    1116 <plls_on+0x16>
mov    $0xfffffc00,%eax
mov    0x68(%rax),%rax
and    $0x4,%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1111 <plls_on+0x11>
pop    %rbp
ret

x86 assembly (clang, -O2):
<plls_on>:
mov    $0xfffffc2c,%eax
movq   $0x3f1f08,(%rax)
nopl   0x0(%rax)
testq  $0x4,0x3c(%rax)
je     1110 <plls_on+0x10>
ret

LLVM IR (-O0):
define void @plls_on() {
store volatile i64 4136712, i64* bitcast (i8* getelementptr (i8, i8* inttoptr (i64 4294966272 to i8*), i64 44) to i64*)
br label %1
1: ; preds = %2, %0
br label %2
2: ; preds = %1
%3 = load volatile i64, i64* bitcast (i8* getelementptr (i8, i8* inttoptr (i64 4294966272 to i8*), i64 104) to i64*)
%4 = and i64 %3, 4
%5 = icmp ne i64 %4, 0
%6 = xor i1 %5, true
br i1 %6, label %1, label %7
7: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @plls_on() {
store volatile i64 4136712, i64* inttoptr (i64 4294966316 to i64*)
br label %1
1: ; preds = %1, %0
%2 = load volatile i64, i64* inttoptr (i64 4294966376 to i64*)
%3 = and i64 %2, 4
%4 = icmp eq i64 %3, 0
br i1 %4, label %1, label %5
5: ; preds = %1
ret void
}
int Sgn(double x) {
  if (x < 0)
    return -1;
  return 1;
}


x86 assembly (clang, -O0):
<Sgn>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1123 <Sgn+0x23>
movl   $0xffffffff,-0x4(%rbp)
jmp    112a <Sgn+0x2a>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sgn>:
xorpd  %xmm1,%xmm1
xor    %eax,%eax
ucomisd %xmm0,%xmm1
setbe  %al
add    %eax,%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @Sgn(double %0) {
%2 = alloca i32
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp olt double %4, 0.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 -1, i32* %2
br label %8
7: ; preds = %1
store i32 1, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @Sgn(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
%3 = select i1 %2, i32 -1, i32 1
ret i32 %3
}
/* Variables and functions */
int testaMult3e7(int);
int somaMultiplos3e7(int inicio, int fim) {
  int i, soma = 0;
  for (i = inicio; i <= fim; i++) {
    if (testaMult3e7(i) == 1) {
      soma += i;
    }
  }
  return soma;
}


x86 assembly (clang, -O0):
<somaMultiplos3e7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1164 <somaMultiplos3e7+0x54>
mov    -0xc(%rbp),%edi
call   1030 <testaMult3e7@plt>
cmp    $0x1,%eax
jne    1151 <somaMultiplos3e7+0x41>
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1156 <somaMultiplos3e7+0x46>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112b <somaMultiplos3e7+0x1b>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<somaMultiplos3e7>:
push   %rbp
push   %r14
push   %rbx
xor    %ebx,%ebx
cmp    %esi,%edi
jle    1121 <somaMultiplos3e7+0x11>
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret
mov    %esi,%r14d
mov    %edi,%ebp
add    $0x1,%r14d
xor    %ebx,%ebx
jmp    113a <somaMultiplos3e7+0x2a>
xchg   %ax,%ax
add    %ecx,%ebx
add    $0x1,%ebp
cmp    %ebp,%r14d
je     111a <somaMultiplos3e7+0xa>
mov    %ebp,%edi
call   1030 <testaMult3e7@plt>
mov    %ebp,%ecx
cmp    $0x1,%eax
je     1130 <somaMultiplos3e7+0x20>
xor    %ecx,%ecx
jmp    1130 <somaMultiplos3e7+0x20>

LLVM IR (-O0):
define i32 @somaMultiplos3e7(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %6
%7 = load i32, i32* %3
store i32 %7, i32* %5
br label %8
8: ; preds = %21, %2
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = icmp sle i32 %9, %10
br i1 %11, label %12, label %24
12: ; preds = %8
%13 = load i32, i32* %5
%14 = call i32 @testaMult3e7(i32 %13)
%15 = icmp eq i32 %14, 1
br i1 %15, label %16, label %20
16: ; preds = %12
%17 = load i32, i32* %5
%18 = load i32, i32* %6
%19 = add nsw i32 %18, %17
store i32 %19, i32* %6
br label %20
20: ; preds = %16, %12
br label %21
21: ; preds = %20
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %8
24: ; preds = %8
%25 = load i32, i32* %6
ret i32 %25
}

LLVM IR (-O2):
define i32 @somaMultiplos3e7(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
br i1 %3, label %13, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %10, %4 ], [ 0, %2 ]
%6 = phi i32 [ %11, %4 ], [ %0, %2 ]
%7 = tail call i32 @testaMult3e7(i32 %6)
%8 = icmp eq i32 %7, 1
%9 = select i1 %8, i32 %6, i32 0
%10 = add nsw i32 %9, %5
%11 = add i32 %6, 1
%12 = icmp eq i32 %6, %1
br i1 %12, label %13, label %4
13: ; preds = %4, %2
%14 = phi i32 [ 0, %2 ], [ %10, %4 ]
ret i32 %14
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ CLOCK_SYS_GetBusClockFreq();
uint32_t CLOCK_SYS_GetFtmSystemClockFreq(uint32_t instance) {
  (void)instance;
  return CLOCK_SYS_GetBusClockFreq();
}


x86 assembly (clang, -O0):
<CLOCK_SYS_GetFtmSystemClockFreq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <CLOCK_SYS_GetBusClockFreq@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CLOCK_SYS_GetFtmSystemClockFreq>:
xor    %eax,%eax
jmp    1030 <CLOCK_SYS_GetBusClockFreq@plt>

LLVM IR (-O0):
define i32 @CLOCK_SYS_GetFtmSystemClockFreq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (...) @CLOCK_SYS_GetBusClockFreq()
ret i32 %4
}

LLVM IR (-O2):
define i32 @CLOCK_SYS_GetFtmSystemClockFreq(i32 %0) {
%2 = tail call i32 (...) @CLOCK_SYS_GetBusClockFreq()
ret i32 %2
}
/* Variables and functions */
int rmdir(char const *);
int sysRmdir(const char *pszPath) { return rmdir(pszPath); }


x86 assembly (clang, -O0):
<sysRmdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <rmdir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sysRmdir>:
jmp    1030 <rmdir@plt>

LLVM IR (-O0):
define i32 @sysRmdir(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @rmdir(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @sysRmdir(i8* nocapture %0) {
%2 = tail call i32 @rmdir(i8* %0)
ret i32 %2
}
/* Variables and functions */
scalar_t__ malloc(int);
char *strmalloc() {
  char *t_str;
  t_str = (char *)malloc(1);
  *t_str = 0;
  return t_str;
}


x86 assembly (clang, -O0):
<strmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strmalloc>:
push   %rax
mov    $0x1,%edi
call   1030 <malloc@plt>
movb   $0x0,(%rax)
pop    %rcx
ret

LLVM IR (-O0):
define i8* @strmalloc() {
%1 = alloca i8*
%2 = call i64 @malloc(i32 1)
%3 = inttoptr i64 %2 to i8*
store i8* %3, i8** %1
%4 = load i8*, i8** %1
store i8 0, i8* %4
%5 = load i8*, i8** %1
ret i8* %5
}

LLVM IR (-O2):
define i8* @strmalloc() {
%1 = tail call i64 @malloc(i32 1)
%2 = inttoptr i64 %1 to i8*
store i8 0, i8* %2
ret i8* %2
}
int input_map_other(char c) { return 0; }


x86 assembly (clang, -O0):
<input_map_other>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<input_map_other>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @input_map_other(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @input_map_other(i8 signext %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ _cat_ptr_data_copy(void *, unsigned char *, int);
void _cat_rewrite_func(void *ptr, void *dst) {
  unsigned char jumpf[16] = {
      0x48, 0xb8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0xc3,
  };
  unsigned char *addr = jumpf + 2;
  (*(void **)(addr)) = dst;
  _cat_ptr_data_copy(ptr, jumpf, 5 + sizeof(void *));
}


x86 assembly (clang, -O0):
<_cat_rewrite_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0xed9(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xed6(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    -0x20(%rbp),%rax
add    $0x2,%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x28(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rdi
lea    -0x20(%rbp),%rsi
mov    $0xd,%edx
call   1030 <_cat_ptr_data_copy@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_cat_rewrite_func>:
sub    $0x18,%rsp
movaps 0xee5(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsi,0x2(%rsp)
mov    %rsp,%rsi
mov    $0xd,%edx
call   1030 <_cat_ptr_data_copy@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const._cat_rewrite_func.jumpf = [16 x i8] c"H\B8\00\00\00\00\00\00\00\00P\C3\00\00\00\00"
define void @_cat_rewrite_func(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca [16 x i8]
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = bitcast [16 x i8]* %5 to i8*
%8 = getelementptr inbounds [16 x i8], [16 x i8]* %5, i64 0, i64 0
%9 = getelementptr inbounds i8, i8* %8, i64 2
store i8* %9, i8** %6
%10 = load i8*, i8** %4
%11 = load i8*, i8** %6
%12 = bitcast i8* %11 to i8**
store i8* %10, i8** %12
%13 = load i8*, i8** %3
%14 = getelementptr inbounds [16 x i8], [16 x i8]* %5, i64 0, i64 0
%15 = call i32 @_cat_ptr_data_copy(i8* %13, i8* %14, i32 13)
ret void
}

LLVM IR (-O2):
@__const._cat_rewrite_func.jumpf = [16 x i8] c"H\B8\00\00\00\00\00\00\00\00P\C3\00\00\00\00"
define void @_cat_rewrite_func(i8* %0, i8* %1) {
%3 = alloca [16 x i8]
%4 = getelementptr inbounds [16 x i8], [16 x i8]* %3, i64 0, i64 0
%5 = getelementptr inbounds [16 x i8], [16 x i8]* %3, i64 0, i64 2
%6 = bitcast i8* %5 to i8**
store i8* %1, i8** %6
%7 = call i32 @_cat_ptr_data_copy(i8* %0, i8* %4, i32 13)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CMGR_simple_invalidate();
void hcache_invalidate_simple(void) {
  CMGR_simple_invalidate();
  return;
}


x86 assembly (clang, -O0):
<hcache_invalidate_simple>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <CMGR_simple_invalidate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hcache_invalidate_simple>:
xor    %eax,%eax
jmp    1030 <CMGR_simple_invalidate@plt>

LLVM IR (-O0):
define void @hcache_invalidate_simple() {
%1 = call i32 (...) @CMGR_simple_invalidate()
ret void
}

LLVM IR (-O2):
define void @hcache_invalidate_simple() {
%1 = tail call i32 (...) @CMGR_simple_invalidate()
ret void
}
int codegen_timing_pentium_jump_cycles() { return 0; }


x86 assembly (clang, -O0):
<codegen_timing_pentium_jump_cycles>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<codegen_timing_pentium_jump_cycles>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @codegen_timing_pentium_jump_cycles() {
ret i32 0
}

LLVM IR (-O2):
define i32 @codegen_timing_pentium_jump_cycles() {
ret i32 0
}
extern void TakeACallback(void (*cb)(void)) { cb(); }


x86 assembly (clang, -O0):
<TakeACallback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
call   *-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TakeACallback>:
jmp    *%rdi

LLVM IR (-O0):
define void @TakeACallback(void ()* %0) {
%2 = alloca void ()*
store void ()* %0, void ()** %2
%3 = load void ()*, void ()** %2
ret void
}

LLVM IR (-O2):
define void @TakeACallback(void ()* nocapture %0) {
tail call void %0()
ret void
}
/* Variables and functions */
double fabs(float);
float make_non_zero(float v) {
  if (fabs(v) < 0.00001) {
    if (v < 0)
      return -0.00001;
    return 0.00001;
  }
  return v;
}


x86 assembly (clang, -O0):
<make_non_zero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
call   1030 <fabs@plt>
movaps %xmm0,%xmm1
movsd  0xece(%rip),%xmm0
ucomisd %xmm1,%xmm0
jbe    116d <make_non_zero+0x5d>
xorps  %xmm0,%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    115b <make_non_zero+0x4b>
movss  0xebb(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1177 <make_non_zero+0x67>
movss  0xea5(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1177 <make_non_zero+0x67>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_non_zero>:
push   %rbp
push   %rbx
push   %rax
xorps  %xmm1,%xmm1
xor    %ebx,%ebx
ucomiss %xmm0,%xmm1
seta   %bpl
movss  %xmm0,0x4(%rsp)
call   1030 <fabs@plt>
movsd  0xece(%rip),%xmm1
ucomisd %xmm0,%xmm1
ja     1140 <make_non_zero+0x30>
movss  0x4(%rsp),%xmm0
jmp    114f <make_non_zero+0x3f>
mov    %bpl,%bl
lea    0xebe(%rip),%rax
movss  (%rax,%rbx,4),%xmm0
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define float @make_non_zero(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = call double @fabs(float %4)
%6 = fcmp olt double %5, 1.000000e-05
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load float, float* %3
%9 = fcmp olt float %8, 0.000000e+00
br i1 %9, label %10, label %11
10: ; preds = %7
store float 0xBEE4F8B580000000, float* %2
br label %14
11: ; preds = %7
store float 0x3EE4F8B580000000, float* %2
br label %14
12: ; preds = %1
%13 = load float, float* %3
store float %13, float* %2
br label %14
14: ; preds = %12, %11, %10
%15 = load float, float* %2
ret float %15
}

LLVM IR (-O2):
define float @make_non_zero(float %0) {
%2 = tail call double @fabs(float %0)
%3 = fcmp olt double %2, 1.000000e-05
%4 = fcmp olt float %0, 0.000000e+00
%5 = select i1 %4, float 0xBEE4F8B580000000, float 0x3EE4F8B580000000
%6 = select i1 %3, float %5, float %0
ret float %6
}
int func(int foo[]) { return foo[1]; }


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
mov    0x4(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @func(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 1
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @func(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 1
%3 = load i32, i32* %2
ret i32 %3
}
void av_image_check_sar() {}


x86 assembly (clang, -O0):
<av_image_check_sar>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_image_check_sar>:
ret

LLVM IR (-O0):
define void @av_image_check_sar() {
ret void
}

LLVM IR (-O2):
define void @av_image_check_sar() {
ret void
}
void AtomicAssertOnCompileInt(void) {
  enum {
    AssertOnCompileMisused =
        8 * sizeof(int) == 32 && 8 * sizeof(int) == 32 && 8 * sizeof(int) == 32
            ? 1
            : -1
  };
  typedef char AssertOnCompileFailed[AssertOnCompileMisused];
}


x86 assembly (clang, -O0):
<AtomicAssertOnCompileInt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AtomicAssertOnCompileInt>:
ret

LLVM IR (-O0):
define void @AtomicAssertOnCompileInt() {
ret void
}

LLVM IR (-O2):
define void @AtomicAssertOnCompileInt() {
ret void
}