xunge/DecIR huggingface dataset:
/* Variables and functions */
int O_CREAT;
int O_WRONLY;
int /*<<< orphan*/ exit(int);
int open(char *, int);
int /*<<< orphan*/ setgid(int);
int /*<<< orphan*/ setuid(int);
void group_test_3() {
  int fd;
  do {
    setgid((100) + 1);
    setuid(101);
  } while (0);
  fd = open("DIR_046/writetest", O_WRONLY | O_CREAT);
  exit(fd != -1);
}


x86 assembly (clang, -O0):
<group_test_3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x65,%edi
call   1030 <setgid@plt>
mov    $0x65,%edi
call   1060 <setuid@plt>
mov    0x2e6d(%rip),%rax
mov    (%rax),%esi
mov    0x2e8c(%rip),%rax
or     (%rax),%esi
lea    0xe8b(%rip),%rdi
call   1040 <open@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<group_test_3>:
push   %rax
mov    $0x65,%edi
call   1030 <setgid@plt>
mov    $0x65,%edi
call   1060 <setuid@plt>
mov    0x2e74(%rip),%rax
mov    0x2e95(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
lea    0xe92(%rip),%rdi
call   1040 <open@plt>
xor    %edi,%edi
cmp    $0xffffffff,%eax
setne  %dil
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"DIR_046/writetest\00"
@O_WRONLY = global i32 0
@O_CREAT = global i32 0
define void @group_test_3() {
%1 = alloca i32
br label %2
2: ; preds = %0
%3 = call i32 @setgid(i32 101)
%4 = call i32 @setuid(i32 101)
br label %5
5: ; preds = %2
%6 = load i32, i32* @O_WRONLY
%7 = load i32, i32* @O_CREAT
%8 = or i32 %6, %7
%9 = call i32 @open(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %8)
store i32 %9, i32* %1
%10 = load i32, i32* %1
%11 = icmp ne i32 %10, -1
%12 = zext i1 %11 to i32
%13 = call i32 @exit(i32 %12)
unreachable
}

LLVM IR (-O2):
@.str = [18 x i8] c"DIR_046/writetest\00"
@O_WRONLY = global i32 0
@O_CREAT = global i32 0
define void @group_test_3() {
%1 = tail call i32 @setgid(i32 101)
%2 = tail call i32 @setuid(i32 101)
%3 = load i32, i32* @O_WRONLY
%4 = load i32, i32* @O_CREAT
%5 = or i32 %4, %3
%6 = tail call i32 @open(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = icmp ne i32 %6, -1
%8 = zext i1 %7 to i32
%9 = tail call i32 @exit(i32 %8)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ error(char *, char *);
void no_memory(char *where) { error(where, "malloc failed"); }


x86 assembly (clang, -O0):
<no_memory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<no_memory>:
lea    0xee9(%rip),%rsi
jmp    1030 <error@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"malloc failed\00"
define void @no_memory(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @error(i8* %3, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"malloc failed\00"
define void @no_memory(i8* %0) {
%2 = tail call i32 @error(i8* %0, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t clear_bits_uint64(uint64_t data, int bit0, int bit1) {
  uint64_t mask = ~(((uint64_t)1 << (bit1 + 1)) - 1);
  mask |= ((uint64_t)1 << bit0) - 1;
  return data & mask;
}


x86 assembly (clang, -O0):
<clear_bits_uint64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
add    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
sub    $0x1,%eax
xor    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
sub    $0x1,%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_bits_uint64>:
lea    0x1(%rdx),%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
mov    $0xffffffff,%eax
mov    %esi,%ecx
shl    %cl,%eax
not    %eax
or     %edx,%eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @clear_bits_uint64(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
%9 = add nsw i32 %8, 1
%10 = shl i32 1, %9
%11 = sub nsw i32 %10, 1
%12 = xor i32 %11, -1
store i32 %12, i32* %7
%13 = load i32, i32* %5
%14 = shl i32 1, %13
%15 = sub nsw i32 %14, 1
%16 = load i32, i32* %7
%17 = or i32 %16, %15
store i32 %17, i32* %7
%18 = load i32, i32* %4
%19 = load i32, i32* %7
%20 = and i32 %18, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @clear_bits_uint64(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %2, 1
%5 = shl nsw i32 -1, %4
%6 = shl nsw i32 -1, %1
%7 = xor i32 %6, -1
%8 = or i32 %5, %7
%9 = and i32 %8, %0
ret i32 %9
}
/* Variables and functions */
int __ctype_isalnum(int);
int isalnum(int c) { return __ctype_isalnum(c); }


x86 assembly (clang, -O0):
<isalnum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <__ctype_isalnum@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isalnum>:
jmp    1030 <__ctype_isalnum@plt>

LLVM IR (-O0):
define i32 @isalnum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__ctype_isalnum(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @isalnum(i32 %0) {
%2 = tail call i32 @__ctype_isalnum(i32 %0)
ret i32 %2
}
/* Variables and functions */
char *ft_strchr(char const *s, int c) {
  while (*s) {
    if (*s == c)
      return ((char *)s);
    s++;
  }
  if (c == '\0')
    return ((char *)s);
  return (NULL);
}


x86 assembly (clang, -O0):
<ft_strchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1146 <ft_strchr+0x46>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    -0x14(%rbp),%eax
jne    1135 <ft_strchr+0x35>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1165 <ft_strchr+0x65>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110b <ft_strchr+0xb>
cmpl   $0x0,-0x14(%rbp)
jne    115d <ft_strchr+0x5d>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1165 <ft_strchr+0x65>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strchr>:
mov    %rdi,%rax
mov    (%rdi),%cl
test   %cl,%cl
je     1123 <ft_strchr+0x23>
nopl   0x0(%rax)
movsbl %cl,%ecx
cmp    %esi,%ecx
je     112b <ft_strchr+0x2b>
movzbl 0x1(%rax),%ecx
add    $0x1,%rax
test   %cl,%cl
jne    1110 <ft_strchr+0x10>
xor    %ecx,%ecx
test   %esi,%esi
cmovne %rcx,%rax
ret

LLVM IR (-O0):
define i8* @ft_strchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = load i32, i32* %5
%15 = icmp eq i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %10
%17 = load i8*, i8** %4
store i8* %17, i8** %3
br label %27
18: ; preds = %10
%19 = load i8*, i8** %4
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %4
br label %6
21: ; preds = %6
%22 = load i32, i32* %5
%23 = icmp eq i32 %22, 0
br i1 %23, label %24, label %26
24: ; preds = %21
%25 = load i8*, i8** %4
store i8* %25, i8** %3
br label %27
26: ; preds = %21
store i8* null, i8** %3
br label %27
27: ; preds = %26, %24, %16
%28 = load i8*, i8** %3
ret i8* %28
}

LLVM IR (-O2):
define i8* @ft_strchr(i8* %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %14, label %5
5: ; preds = %2, %10
%6 = phi i8 [ %12, %10 ], [ %3, %2 ]
%7 = phi i8* [ %11, %10 ], [ %0, %2 ]
%8 = sext i8 %6 to i32
%9 = icmp eq i32 %8, %1
br i1 %9, label %18, label %10
10: ; preds = %5
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %5
14: ; preds = %10, %2
%15 = phi i8* [ %0, %2 ], [ %11, %10 ]
%16 = icmp eq i32 %1, 0
%17 = select i1 %16, i8* %15, i8* null
br label %18
18: ; preds = %5, %14
%19 = phi i8* [ %17, %14 ], [ %7, %5 ]
ret i8* %19
}
int compare_int(int *x, int *y) {
  if (*x == *y)
    return 0;
  else if (*x < *y)
    return -1;
  else
    return 1;
}


x86 assembly (clang, -O0):
<compare_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
jne    112a <compare_int+0x2a>
movl   $0x0,-0x4(%rbp)
jmp    114f <compare_int+0x4f>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
jge    1148 <compare_int+0x48>
movl   $0xffffffff,-0x4(%rbp)
jmp    114f <compare_int+0x4f>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_int>:
mov    (%rdi),%eax
xor    %ecx,%ecx
xor    %edx,%edx
cmp    (%rsi),%eax
setge  %dl
lea    -0x1(%rdx,%rdx,1),%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @compare_int(i32* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
%6 = load i32*, i32** %4
%7 = load i32, i32* %6
%8 = load i32*, i32** %5
%9 = load i32, i32* %8
%10 = icmp eq i32 %7, %9
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 0, i32* %3
br label %20
12: ; preds = %2
%13 = load i32*, i32** %4
%14 = load i32, i32* %13
%15 = load i32*, i32** %5
%16 = load i32, i32* %15
%17 = icmp slt i32 %14, %16
br i1 %17, label %18, label %19
18: ; preds = %12
store i32 -1, i32* %3
br label %20
19: ; preds = %12
store i32 1, i32* %3
br label %20
20: ; preds = %19, %18, %11
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @compare_int(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = icmp eq i32 %3, %4
%6 = icmp slt i32 %3, %4
%7 = select i1 %6, i32 -1, i32 1
%8 = select i1 %5, i32 0, i32 %7
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ SIGABRT;
int /*<<< orphan*/ kill(int /*<<< orphan*/, int /*<<< orphan*/);
void sys_abort(void) { kill(0, SIGABRT); }


x86 assembly (clang, -O0):
<sys_abort>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
xor    %edi,%edi
call   1030 <kill@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_abort>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
xor    %edi,%edi
jmp    1030 <kill@plt>

LLVM IR (-O0):
@SIGABRT = global i32 0
define void @sys_abort() {
%1 = load i32, i32* @SIGABRT
%2 = call i32 @kill(i32 0, i32 %1)
ret void
}

LLVM IR (-O2):
@SIGABRT = global i32 0
define void @sys_abort() {
%1 = load i32, i32* @SIGABRT
%2 = tail call i32 @kill(i32 0, i32 %1)
ret void
}
int *initpivot(int arr[], int size, int p) {
  int t = arr[p];
  arr[p] = arr[size - 1];
  arr[size - 1] = t;
  return arr;
}


x86 assembly (clang, -O0):
<initpivot>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<initpivot>:
mov    %rdi,%rax
movslq %edx,%rcx
mov    (%rdi,%rcx,4),%edx
movslq %esi,%rsi
mov    -0x4(%rdi,%rsi,4),%edi
mov    %edi,(%rax,%rcx,4)
mov    %edx,-0x4(%rax,%rsi,4)
ret

LLVM IR (-O0):
define i32* @initpivot(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %6
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
store i32 %12, i32* %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %5
%15 = sub nsw i32 %14, 1
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %13, i64 %16
%18 = load i32, i32* %17
%19 = load i32*, i32** %4
%20 = load i32, i32* %6
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i32, i32* %19, i64 %21
store i32 %18, i32* %22
%23 = load i32, i32* %7
%24 = load i32*, i32** %4
%25 = load i32, i32* %5
%26 = sub nsw i32 %25, 1
%27 = sext i32 %26 to i64
%28 = getelementptr inbounds i32, i32* %24, i64 %27
store i32 %23, i32* %28
%29 = load i32*, i32** %4
ret i32* %29
}

LLVM IR (-O2):
define i32* @initpivot(i32* returned %0, i32 %1, i32 %2) {
%4 = sext i32 %2 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = add nsw i32 %1, -1
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
store i32 %10, i32* %5
store i32 %6, i32* %9
ret i32* %0
}
/* Variables and functions */
char *my_alloc2(int);
int test2(int len) {
  int i;
  char *p = my_alloc2(len);
  return (((long int)p) & 31) != 4;
}


x86 assembly (clang, -O0):
<test2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <my_alloc2@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x1f,%rax
cmp    $0x4,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test2>:
push   %rax
call   1030 <my_alloc2@plt>
and    $0x1f,%eax
xor    %ecx,%ecx
cmp    $0x4,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @test2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call i8* @my_alloc2(i32 %5)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = ptrtoint i8* %7 to i64
%9 = and i64 %8, 31
%10 = icmp ne i64 %9, 4
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @test2(i32 %0) {
%2 = tail call i8* @my_alloc2(i32 %0)
%3 = ptrtoint i8* %2 to i64
%4 = and i64 %3, 31
%5 = icmp ne i64 %4, 4
%6 = zext i1 %5 to i32
ret i32 %6
}
int weed_seed_is_ptr(int seed) {
  return (seed != 3 && seed != 1 && seed != 2 && seed != 4 && seed != 5) ? 1
                                                                         : 0;
}


x86 assembly (clang, -O0):
<weed_seed_is_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x3,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     114d <weed_seed_is_ptr+0x4d>
xor    %eax,%eax
cmpl   $0x1,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     114d <weed_seed_is_ptr+0x4d>
xor    %eax,%eax
cmpl   $0x2,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     114d <weed_seed_is_ptr+0x4d>
xor    %eax,%eax
cmpl   $0x4,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     114d <weed_seed_is_ptr+0x4d>
cmpl   $0x5,-0x4(%rbp)
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%dl
xor    %eax,%eax
mov    $0x1,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<weed_seed_is_ptr>:
add    $0xfffffffa,%edi
xor    %eax,%eax
cmp    $0xfffffffb,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @weed_seed_is_ptr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 3
br i1 %4, label %5, label %17
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp ne i32 %6, 1
br i1 %7, label %8, label %17
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp ne i32 %9, 2
br i1 %10, label %11, label %17
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp ne i32 %12, 4
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i32, i32* %2
%16 = icmp ne i32 %15, 5
br label %17
17: ; preds = %14, %11, %8, %5, %1
%18 = phi i1 [ false, %11 ], [ false, %8 ], [ false, %5 ], [ false, %1 ], [ %16, %14 ]
%19 = zext i1 %18 to i64
%20 = select i1 %18, i32 1, i32 0
ret i32 %20
}

LLVM IR (-O2):
define i32 @weed_seed_is_ptr(i32 %0) {
%2 = add i32 %0, -6
%3 = icmp ult i32 %2, -5
%4 = zext i1 %3 to i32
ret i32 %4
}
int aic_patch0_func(struct ahd_softc *ahd) { return (0); }


x86 assembly (clang, -O0):
<aic_patch0_func>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aic_patch0_func>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ahd_softc = type opaque
define i32 @aic_patch0_func(%struct.ahd_softc* %0) {
%2 = alloca %struct.ahd_softc*
store %struct.ahd_softc* %0, %struct.ahd_softc** %2
ret i32 0
}

LLVM IR (-O2):
%struct.ahd_softc = type opaque
define i32 @aic_patch0_func(%struct.ahd_softc* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ derefI(int *);
void checkForCallee(int *arg1) {
  if (arg1 != NULL) {
    derefI(arg1);
  }
}


x86 assembly (clang, -O0):
<checkForCallee>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <checkForCallee+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <derefI@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkForCallee>:
test   %rdi,%rdi
je     111a <checkForCallee+0xa>
jmp    1030 <derefI@plt>
ret

LLVM IR (-O0):
define void @checkForCallee(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = icmp ne i32* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32*, i32** %2
%7 = call i32 @derefI(i32* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @checkForCallee(i32* %0) {
%2 = icmp eq i32* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @derefI(i32* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
char *dvm_wcstombs_alloc(int /*<<< orphan*/ *);
int fprintf(int /*<<< orphan*/ *, char *, char *);
int /*<<< orphan*/ free(char *);
int dvm_print_wcs(FILE *fp, wchar_t *wcs) {
  char *mbs = dvm_wcstombs_alloc(wcs);
  int result = fprintf(fp, "%s", mbs);
  free(mbs);
  return result;
}


x86 assembly (clang, -O0):
<dvm_print_wcs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <dvm_wcstombs_alloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rdx
lea    0xea4(%rip),%rsi
call   1040 <fprintf@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dvm_print_wcs>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1050 <dvm_wcstombs_alloc@plt>
mov    %rax,%rbx
lea    0xeb7(%rip),%rsi
mov    %r14,%rdi
mov    %rax,%rdx
call   1040 <fprintf@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i32 @dvm_print_wcs(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%7 = load i32*, i32** %4
%8 = call i8* @dvm_wcstombs_alloc(i32* %7)
store i8* %8, i8** %5
%9 = load i32*, i32** %3
%10 = load i8*, i8** %5
%11 = call i32 @fprintf(i32* %9, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %10)
store i32 %11, i32* %6
%12 = load i8*, i8** %5
%13 = call i32 @free(i8* %12)
%14 = load i32, i32* %6
ret i32 %14
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i32 @dvm_print_wcs(i32* nocapture %0, i32* %1) {
%3 = tail call i8* @dvm_wcstombs_alloc(i32* %1)
%4 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = tail call i32 @free(i8* %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ return_struct_s4();
int /*<<< orphan*/ take_struct_s4(int /*<<< orphan*/);
void test_struct_s4() { take_struct_s4(return_struct_s4()); }


x86 assembly (clang, -O0):
<test_struct_s4>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <return_struct_s4@plt>
mov    %eax,%edi
call   1030 <take_struct_s4@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_struct_s4>:
push   %rax
xor    %eax,%eax
call   1040 <return_struct_s4@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <take_struct_s4@plt>

LLVM IR (-O0):
define void @test_struct_s4() {
%1 = call i32 (...) @return_struct_s4()
%2 = call i32 @take_struct_s4(i32 %1)
ret void
}

LLVM IR (-O2):
define void @test_struct_s4() {
%1 = tail call i32 (...) @return_struct_s4()
%2 = tail call i32 @take_struct_s4(i32 %1)
ret void
}
/* Variables and functions */
scalar_t__ rand();
void random_vector_long(long *a, const unsigned int n) {
  for (unsigned int i = 0; i < n; i++) {
    a[i] = (long)rand();
  }
}


x86 assembly (clang, -O0):
<random_vector_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jae    1155 <random_vector_long+0x45>
mov    $0x0,%al
call   1030 <rand@plt>
mov    %rax,%rdx
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%ecx
mov    %rdx,(%rax,%rcx,8)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <random_vector_long+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_vector_long>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
je     1144 <random_vector_long+0x34>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <rand@plt>
mov    %rax,(%r14,%rbx,8)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <random_vector_long+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @random_vector_long(i64* %0, i32 %1) {
%3 = alloca i64*
%4 = alloca i32
%5 = alloca i32
store i64* %0, i64** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %16, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp ult i32 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = call i64 (...) @rand()
%12 = load i64*, i64** %3
%13 = load i32, i32* %5
%14 = zext i32 %13 to i64
%15 = getelementptr inbounds i64, i64* %12, i64 %14
store i64 %11, i64* %15
br label %16
16: ; preds = %10
%17 = load i32, i32* %5
%18 = add i32 %17, 1
store i32 %18, i32* %5
br label %6
19: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @random_vector_long(i64* nocapture writeonly %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %7
6: ; preds = %7, %2
ret void
7: ; preds = %4, %7
%8 = phi i64 [ 0, %4 ], [ %11, %7 ]
%9 = tail call i64 (...) @rand()
%10 = getelementptr inbounds i64, i64* %0, i64 %8
store i64 %9, i64* %10
%11 = add nuw nsw i64 %8, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %6, label %7
}
char *incremental_cmd_verify(char **end, struct command_arg *arg) { return 0; }


x86 assembly (clang, -O0):
<incremental_cmd_verify>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<incremental_cmd_verify>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.command_arg = type opaque
define i8* @incremental_cmd_verify(i8** %0, %struct.command_arg* %1) {
%3 = alloca i8**
%4 = alloca %struct.command_arg*
store i8** %0, i8*** %3
store %struct.command_arg* %1, %struct.command_arg** %4
ret i8* null
}

LLVM IR (-O2):
%struct.command_arg = type opaque
define noalias i8* @incremental_cmd_verify(i8** nocapture readnone %0, %struct.command_arg* nocapture readnone %1) {
ret i8* null
}
/* Type definitions */
typedef int /*<<< orphan*/ v;

/* Variables and functions */
int /*<<< orphan*/ show(int);
void test1(unsigned long c) {
  int v[c][2 * c];
  show((sizeof(v) / sizeof(v[0])));
}


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    %rcx,%rcx
mov    %rsp,%rdx
mov    %rdx,-0x10(%rbp)
mov    %rax,%rdx
imul   %rcx,%rdx
lea    0xf(,%rdx,4),%rsi
and    $0xfffffffffffffff0,%rsi
mov    %rsp,%rdx
sub    %rsi,%rdx
mov    %rdx,%rsp
mov    %rax,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
imul   %rcx,%rax
shl    $0x2,%rax
shl    $0x2,%rcx
xor    %edx,%edx
div    %rcx
mov    %eax,%edi
call   1030 <show@plt>
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
mov    %rdi,%rax
lea    0x0(,%rdi,8),%rcx
imul   %rcx,%rax
mov    %rax,%rdx
or     %rcx,%rdx
shr    $0x20,%rdx
je     1137 <test1+0x27>
xor    %edx,%edx
div    %rcx
mov    %eax,%edi
jmp    1030 <show@plt>
xor    %edx,%edx
div    %ecx
mov    %eax,%edi
jmp    1030 <show@plt>

LLVM IR (-O0):
define void @test1(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %2
%6 = load i64, i64* %2
%7 = load i64, i64* %2
%8 = mul i64 2, %7
%9 = call i8* @llvm.stacksave()
store i8* %9, i8** %3
%10 = mul nuw i64 %6, %8
%11 = alloca i32, i64 %10
store i64 %6, i64* %4
store i64 %8, i64* %5
%12 = mul nuw i64 %6, %8
%13 = mul nuw i64 4, %12
%14 = mul nsw i64 0, %8
%15 = getelementptr inbounds i32, i32* %11, i64 %14
%16 = mul nuw i64 4, %8
%17 = udiv i64 %13, %16
%18 = trunc i64 %17 to i32
%19 = call i32 @show(i32 %18)
%20 = load i8*, i8** %3
ret void
}

LLVM IR (-O2):
define void @test1(i64 %0) {
%2 = shl i64 %0, 3
%3 = mul i64 %2, %0
%4 = udiv i64 %3, %2
%5 = trunc i64 %4 to i32
%6 = tail call i32 @show(i32 %5)
ret void
}
double geom_J2_cart_xyz(double x[], int dir) { return 1.0; }


x86 assembly (clang, -O0):
<geom_J2_cart_xyz>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movsd  0xeed(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<geom_J2_cart_xyz>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @geom_J2_cart_xyz(double* %0, i32 %1) {
%3 = alloca double*
%4 = alloca i32
store double* %0, double** %3
store i32 %1, i32* %4
ret double 1.000000e+00
}

LLVM IR (-O2):
define double @geom_J2_cart_xyz(double* nocapture readnone %0, i32 %1) {
ret double 1.000000e+00
}
/* Type definitions */
typedef int uint8_t;
typedef int uint64_t;

/* Variables and functions */
uint64_t vbuencode(uint8_t *buffer, uint64_t value) {
  const uint8_t *buffer0 = buffer;
  do {
    *buffer++ = (uint8_t)(0x80 | (value & 0x7f));
    value >>= 7;
  } while (value > 0);
  *(buffer - 1) ^= 0x80;
  return buffer - buffer0;
}


x86 assembly (clang, -O0):
<vbuencode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
and    $0x7f,%ecx
or     $0x80,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
sar    $0x7,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jg     1113 <vbuencode+0x13>
mov    -0x8(%rbp),%rax
mov    -0x4(%rax),%ecx
xor    $0x80,%ecx
mov    %ecx,-0x4(%rax)
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
sub    %rcx,%rax
sar    $0x2,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vbuencode>:
xor    %eax,%eax
mov    %esi,%r8d
cs nopw 0x0(%rax,%rax,1)
nop
mov    %esi,%edx
and    $0x7f,%edx
lea    0x80(%rdx),%ecx
mov    %ecx,(%rdi,%rax,1)
sar    $0x7,%r8d
add    $0x4,%rax
cmp    $0x7f,%esi
mov    %r8d,%esi
jg     1110 <vbuencode+0x10>
mov    %edx,-0x4(%rdi,%rax,1)
shr    $0x2,%rax
ret

LLVM IR (-O0):
define i32 @vbuencode(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32*
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32*, i32** %3
store i32* %6, i32** %5
br label %7
7: ; preds = %15, %2
%8 = load i32, i32* %4
%9 = and i32 %8, 127
%10 = or i32 128, %9
%11 = load i32*, i32** %3
%12 = getelementptr inbounds i32, i32* %11, i32 1
store i32* %12, i32** %3
store i32 %10, i32* %11
%13 = load i32, i32* %4
%14 = ashr i32 %13, 7
store i32 %14, i32* %4
br label %15
15: ; preds = %7
%16 = load i32, i32* %4
%17 = icmp sgt i32 %16, 0
br i1 %17, label %7, label %18
18: ; preds = %15
%19 = load i32*, i32** %3
%20 = getelementptr inbounds i32, i32* %19, i64 -1
%21 = load i32, i32* %20
%22 = xor i32 %21, 128
store i32 %22, i32* %20
%23 = load i32*, i32** %3
%24 = load i32*, i32** %5
%25 = ptrtoint i32* %23 to i64
%26 = ptrtoint i32* %24 to i64
%27 = sub i64 %25, %26
%28 = sdiv exact i64 %27, 4
%29 = trunc i64 %28 to i32
ret i32 %29
}

LLVM IR (-O2):
define i32 @vbuencode(i32* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ %1, %2 ], [ %9, %3 ]
%5 = phi i32* [ %0, %2 ], [ %8, %3 ]
%6 = and i32 %4, 127
%7 = or i32 %6, 128
%8 = getelementptr inbounds i32, i32* %5, i64 1
store i32 %7, i32* %5
%9 = ashr i32 %4, 7
%10 = icmp sgt i32 %4, 127
br i1 %10, label %3, label %11
11: ; preds = %3
store i32 %6, i32* %5
%12 = ptrtoint i32* %8 to i64
%13 = ptrtoint i32* %0 to i64
%14 = sub i64 %12, %13
%15 = lshr exact i64 %14, 2
%16 = trunc i64 %15 to i32
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ use_array(int *);
void *thread(void *dummy) {
  int a[10000];
  use_array(a);
  return 0;
}


x86 assembly (clang, -O0):
<thread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x9c50,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x9c50(%rbp),%rdi
call   1030 <use_array@plt>
xor    %eax,%eax
add    $0x9c50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread>:
sub    $0x9c48,%rsp
mov    %rsp,%rdi
call   1030 <use_array@plt>
xor    %eax,%eax
add    $0x9c48,%rsp
ret

LLVM IR (-O0):
define i8* @thread(i8* %0) {
%2 = alloca i8*
%3 = alloca [10000 x i32]
store i8* %0, i8** %2
%4 = getelementptr inbounds [10000 x i32], [10000 x i32]* %3, i64 0, i64 0
%5 = call i32 @use_array(i32* %4)
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @thread(i8* nocapture readnone %0) {
%2 = alloca [10000 x i32]
%3 = bitcast [10000 x i32]* %2 to i8*
%4 = getelementptr inbounds [10000 x i32], [10000 x i32]* %2, i64 0, i64 0
%5 = call i32 @use_array(i32* %4)
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int, int);
int /*<<< orphan*/ stderr;
void div_by_zero(int x, int y) {
  fprintf(stderr, "Division by zero: %d / %d\n", x, y);
}


x86 assembly (clang, -O0):
<div_by_zero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    0x2ebb(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<div_by_zero>:
mov    %esi,%ecx
mov    %edi,%edx
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [27 x i8] c"Division by zero: %d / %d\0A\00"
define void @div_by_zero(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %6, i32 %7)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [27 x i8] c"Division by zero: %d / %d\0A\00"
define void @div_by_zero(i32 %0, i32 %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1)
ret void
}
/* Variables and functions */
scalar_t__ ft_itoa(int);
int /*<<< orphan*/ ft_putstr(char *);
void ft_putnbr(int n) { ft_putstr((char *)ft_itoa(n)); }


x86 assembly (clang, -O0):
<ft_putnbr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ft_itoa@plt>
mov    %rax,%rdi
call   1040 <ft_putstr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putnbr>:
push   %rax
call   1030 <ft_itoa@plt>
mov    %rax,%rdi
pop    %rax
jmp    1040 <ft_putstr@plt>

LLVM IR (-O0):
define void @ft_putnbr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @ft_itoa(i32 %3)
%5 = inttoptr i64 %4 to i8*
%6 = call i32 @ft_putstr(i8* %5)
ret void
}

LLVM IR (-O2):
define void @ft_putnbr(i32 %0) {
%2 = tail call i64 @ft_itoa(i32 %0)
%3 = inttoptr i64 %2 to i8*
%4 = tail call i32 @ft_putstr(i8* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dombind(void *, size_t, int, int /*<<< orphan*/ *);
void numa_setlocal_memory(void *mem, size_t size) {
  dombind(mem, size, 1, NULL);
}


x86 assembly (clang, -O0):
<numa_setlocal_memory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
xor    %eax,%eax
mov    %eax,%ecx
call   1030 <dombind@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<numa_setlocal_memory>:
mov    $0x1,%edx
xor    %ecx,%ecx
jmp    1030 <dombind@plt>

LLVM IR (-O0):
define void @numa_setlocal_memory(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @dombind(i8* %5, i64 %6, i32 1, i32* null)
ret void
}

LLVM IR (-O2):
define void @numa_setlocal_memory(i8* %0, i64 %1) {
%3 = tail call i32 @dombind(i8* %0, i64 %1, i32 1, i32* null)
ret void
}
void re_encode(font) char *font;
{ printf("/%s /%s ISO ReEncode\n", font, font); }


x86 assembly (clang, -O0):
<re_encode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x8(%rbp),%rdx
lea    0xed5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<re_encode>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
mov    %rdx,%rsi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"/%s /%s ISO ReEncode\0A\00"
define void @re_encode(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %3, i8* %4)
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"/%s /%s ISO ReEncode\0A\00"
define void @re_encode(i8* %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print_arguments(int, char **);
int main(int argc, char *argv[]) { print_arguments(argc, argv); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <print_arguments@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <print_arguments@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i8**, i8*** %4
%7 = call i32 @print_arguments(i32 %5, i8** %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @print_arguments(i32 %0, i8** %1)
ret i32 0
}
int RECOIL_GetG6R5B5Color(int c) {
  c = (c & 992) << 14 | (c & 64512) | (c & 31) << 3;
  return c | (c >> 5 & 458759) | (c >> 6 & 768);
}


x86 assembly (clang, -O0):
<RECOIL_GetG6R5B5Color>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x3e0,%eax
shl    $0xe,%eax
mov    -0x4(%rbp),%ecx
and    $0xfc00,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0x1f,%ecx
shl    $0x3,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x5,%ecx
and    $0x70007,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
sar    $0x6,%ecx
and    $0x300,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RECOIL_GetG6R5B5Color>:
mov    %edi,%ecx
shl    $0xe,%ecx
and    $0xf80000,%ecx
mov    %edi,%eax
and    $0xfc00,%eax
or     %eax,%ecx
and    $0x1f,%edi
lea    (%rcx,%rdi,8),%ecx
shr    $0x6,%eax
and    $0x300,%eax
or     %ecx,%eax
shr    $0x5,%ecx
and    $0x70007,%ecx
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @RECOIL_GetG6R5B5Color(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 992
%5 = shl i32 %4, 14
%6 = load i32, i32* %2
%7 = and i32 %6, 64512
%8 = or i32 %5, %7
%9 = load i32, i32* %2
%10 = and i32 %9, 31
%11 = shl i32 %10, 3
%12 = or i32 %8, %11
store i32 %12, i32* %2
%13 = load i32, i32* %2
%14 = load i32, i32* %2
%15 = ashr i32 %14, 5
%16 = and i32 %15, 458759
%17 = or i32 %13, %16
%18 = load i32, i32* %2
%19 = ashr i32 %18, 6
%20 = and i32 %19, 768
%21 = or i32 %17, %20
ret i32 %21
}

LLVM IR (-O2):
define i32 @RECOIL_GetG6R5B5Color(i32 %0) {
%2 = shl i32 %0, 14
%3 = and i32 %2, 16252928
%4 = and i32 %0, 64512
%5 = or i32 %3, %4
%6 = shl i32 %0, 3
%7 = and i32 %6, 248
%8 = or i32 %5, %7
%9 = lshr i32 %8, 5
%10 = and i32 %9, 458759
%11 = lshr exact i32 %4, 6
%12 = and i32 %11, 768
%13 = or i32 %8, %12
%14 = or i32 %13, %10
ret i32 %14
}
/* Variables and functions */
int log(int);
double aTanh(double x) { return (log(1 + x) - log(1 - x)) / 2; }


x86 assembly (clang, -O0):
<aTanh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xedb(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
cvttsd2si %xmm0,%edi
call   1030 <log@plt>
mov    %eax,-0xc(%rbp)
movsd  0xec2(%rip),%xmm0
subsd  -0x8(%rbp),%xmm0
cvttsd2si %xmm0,%edi
call   1030 <log@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
sub    %ecx,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cvtsi2sd %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aTanh>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm0,0x8(%rsp)
movapd %xmm0,%xmm1
addsd  0xed9(%rip),%xmm1
cvttsd2si %xmm1,%edi
call   1030 <log@plt>
mov    %eax,%ebx
movsd  0xec6(%rip),%xmm0
subsd  0x8(%rsp),%xmm0
cvttsd2si %xmm0,%edi
call   1030 <log@plt>
sub    %eax,%ebx
mov    %ebx,%eax
shr    $0x1f,%eax
add    %ebx,%eax
sar    %eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define double @aTanh(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double 1.000000e+00, %3
%5 = fptosi double %4 to i32
%6 = call i32 @log(i32 %5)
%7 = load double, double* %2
%8 = fsub double 1.000000e+00, %7
%9 = fptosi double %8 to i32
%10 = call i32 @log(i32 %9)
%11 = sub nsw i32 %6, %10
%12 = sdiv i32 %11, 2
%13 = sitofp i32 %12 to double
ret double %13
}

LLVM IR (-O2):
define double @aTanh(double %0) {
%2 = fadd double %0, 1.000000e+00
%3 = fptosi double %2 to i32
%4 = tail call i32 @log(i32 %3)
%5 = fsub double 1.000000e+00, %0
%6 = fptosi double %5 to i32
%7 = tail call i32 @log(i32 %6)
%8 = sub nsw i32 %4, %7
%9 = sdiv i32 %8, 2
%10 = sitofp i32 %9 to double
ret double %10
}
void foo(int i) {
  int j;
  switch (i) {
#pragma omp parallel
    { case 0:; }
  }
  switch (i) {
#pragma omp for
    for (j = 0; j < 10; ++j) {
    case 1:;
    }
  }
  switch (i) {
#pragma omp critical
    { case 2:; }
  }
  switch (i) {
#pragma omp master
    { case 3:; }
  }
  switch (i) {
#pragma omp sections
    {
    case 4:;
#pragma omp section
      { case 5:; }
    }
  }
  switch (i) {
#pragma omp ordered
    { default:; }
  }
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
test   %eax,%eax
jne    111c <foo+0x1c>
jmp    1117 <foo+0x17>
jmp    111c <foo+0x1c>
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
je     113c <foo+0x3c>
jmp    1154 <foo+0x54>
cmpl   $0xa,-0x8(%rbp)
jge    114f <foo+0x4f>
jmp    113c <foo+0x3c>
jmp    1141 <foo+0x41>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    112d <foo+0x2d>
jmp    1154 <foo+0x54>
mov    -0x4(%rbp),%eax
sub    $0x2,%eax
jne    116a <foo+0x6a>
jmp    1165 <foo+0x65>
jmp    116a <foo+0x6a>
mov    -0x4(%rbp),%eax
sub    $0x3,%eax
jne    1180 <foo+0x80>
jmp    117b <foo+0x7b>
jmp    1180 <foo+0x80>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x4,%eax
je     11a5 <foo+0xa5>
jmp    1194 <foo+0x94>
mov    -0xc(%rbp),%eax
sub    $0x5,%eax
je     11aa <foo+0xaa>
jmp    11af <foo+0xaf>
jmp    11aa <foo+0xaa>
jmp    11af <foo+0xaf>
jmp    11b4 <foo+0xb4>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
switch i32 %4, label %6 [
i32 0, label %5
]
5: ; preds = %1
br label %6
6: ; preds = %5, %1
%7 = load i32, i32* %2
switch i32 %7, label %18 [
i32 1, label %13
]
8: ; No predecessors!
store i32 0, i32* %3
br label %9
9: ; preds = %14, %8
%10 = load i32, i32* %3
%11 = icmp slt i32 %10, 10
br i1 %11, label %12, label %17
12: ; preds = %9
br label %13
13: ; preds = %6, %12
br label %14
14: ; preds = %13
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %9
17: ; preds = %9
br label %18
18: ; preds = %17, %6
%19 = load i32, i32* %2
switch i32 %19, label %21 [
i32 2, label %20
]
20: ; preds = %18
br label %21
21: ; preds = %20, %18
%22 = load i32, i32* %2
switch i32 %22, label %24 [
i32 3, label %23
]
23: ; preds = %21
br label %24
24: ; preds = %23, %21
%25 = load i32, i32* %2
switch i32 %25, label %28 [
i32 4, label %26
i32 5, label %27
]
26: ; preds = %24
br label %27
27: ; preds = %24, %26
br label %28
28: ; preds = %27, %24
%29 = load i32, i32* %2
switch i32 %29, label %30 [
]
30: ; preds = %28
br label %31
31: ; preds = %30
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int __signal_call_marshal(char *obj, int (*func)(void *), va_list vp,
                          int size) {
  return func(obj);
}


x86 assembly (clang, -O0):
<__signal_call_marshal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdi
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__signal_call_marshal>:
jmp    *%rsi

LLVM IR (-O0):
define i32 @__signal_call_marshal(i8* %0, i32 (i8*)* %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32 (i8*)*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32 (i8*)* %1, i32 (i8*)** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32 (i8*)*, i32 (i8*)** %6
%10 = load i8*, i8** %5
%11 = call i32 %9(i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @__signal_call_marshal(i8* %0, i32 (i8*)* nocapture %1, i32 %2, i32 %3) {
%5 = tail call i32 %1(i8* %0)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_hashmap_last() {
  printf("NOT IMPLEMENTED:"
         "pa_hashmap_last"
         "\n");
}


x86 assembly (clang, -O0):
<pa_hashmap_last>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_hashmap_last>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"NOT IMPLEMENTED:pa_hashmap_last\0A\00"
define i32 @pa_hashmap_last() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [32 x i8] c"NOT IMPLEMENTED:pa_hashmap_last\00"
define i32 @pa_hashmap_last() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ SIGFPE;
scalar_t__ raise(int /*<<< orphan*/);
int sigfpe(void) { return raise(SIGFPE) == 0; }


x86 assembly (clang, -O0):
<sigfpe>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <raise@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigfpe>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <raise@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@SIGFPE = global i32 0
define i32 @sigfpe() {
%1 = load i32, i32* @SIGFPE
%2 = call i64 @raise(i32 %1)
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
@SIGFPE = global i32 0
define i32 @sigfpe() {
%1 = load i32, i32* @SIGFPE
%2 = tail call i64 @raise(i32 %1)
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
int IPR1() { return 0; }


x86 assembly (clang, -O0):
<IPR1>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IPR1>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @IPR1() {
ret i32 0
}

LLVM IR (-O2):
define i32 @IPR1() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ test35_Timer0MatchA_enable__E();
void test35_ATmega328_start__I() { test35_Timer0MatchA_enable__E(); }


x86 assembly (clang, -O0):
<test35_ATmega328_start__I>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <test35_Timer0MatchA_enable__E@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test35_ATmega328_start__I>:
xor    %eax,%eax
jmp    1030 <test35_Timer0MatchA_enable__E@plt>

LLVM IR (-O0):
define void @test35_ATmega328_start__I() {
%1 = call i32 (...) @test35_Timer0MatchA_enable__E()
ret void
}

LLVM IR (-O2):
define void @test35_ATmega328_start__I() {
%1 = tail call i32 (...) @test35_Timer0MatchA_enable__E()
ret void
}
/* Variables and functions */
char *malloc(int);
char *grid_ref(int x, int y) {
  char *ret = malloc(sizeof(char) * 3);
  ret[0] = (char)x + 65;
  ret[1] = (char)y + 1 + 48;
  ret[2] = '\0';
  return ret;
}


x86 assembly (clang, -O0):
<grid_ref>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x3,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
movsbl %al,%eax
add    $0x41,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%eax
movsbl %al,%eax
add    $0x1,%eax
add    $0x30,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x10(%rbp),%rax
movb   $0x0,0x2(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<grid_ref>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x3,%edi
call   1030 <malloc@plt>
add    $0x41,%bpl
mov    %bpl,(%rax)
add    $0x31,%bl
mov    %bl,0x1(%rax)
movb   $0x0,0x2(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @grid_ref(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = call i8* @malloc(i32 3)
store i8* %6, i8** %5
%7 = load i32, i32* %3
%8 = trunc i32 %7 to i8
%9 = sext i8 %8 to i32
%10 = add nsw i32 %9, 65
%11 = trunc i32 %10 to i8
%12 = load i8*, i8** %5
%13 = getelementptr inbounds i8, i8* %12, i64 0
store i8 %11, i8* %13
%14 = load i32, i32* %4
%15 = trunc i32 %14 to i8
%16 = sext i8 %15 to i32
%17 = add nsw i32 %16, 1
%18 = add nsw i32 %17, 48
%19 = trunc i32 %18 to i8
%20 = load i8*, i8** %5
%21 = getelementptr inbounds i8, i8* %20, i64 1
store i8 %19, i8* %21
%22 = load i8*, i8** %5
%23 = getelementptr inbounds i8, i8* %22, i64 2
store i8 0, i8* %23
%24 = load i8*, i8** %5
ret i8* %24
}

LLVM IR (-O2):
define noalias i8* @grid_ref(i32 %0, i32 %1) {
%3 = tail call dereferenceable_or_null(3) i8* @malloc(i32 3)
%4 = trunc i32 %0 to i8
%5 = add i8 %4, 65
store i8 %5, i8* %3
%6 = trunc i32 %1 to i8
%7 = add i8 %6, 49
%8 = getelementptr inbounds i8, i8* %3, i64 1
store i8 %7, i8* %8
%9 = getelementptr inbounds i8, i8* %3, i64 2
store i8 0, i8* %9
ret i8* %3
}