xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fwrite_check(unsigned int *, int, int, int /*<<< orphan*/ *,
                                char const *);
void serialize_uint(FILE *out, unsigned n, long long *fpos, const char *fname) {
  fwrite_check(&n, sizeof(unsigned), 1, out, fname);
  *fpos += sizeof(unsigned);
}


x86 assembly (clang, -O0):
<serialize_uint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x20(%rbp),%r8
lea    -0xc(%rbp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fwrite_check@plt>
mov    -0x18(%rbp),%rax
mov    (%rax),%rcx
add    $0x4,%rcx
mov    %rcx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serialize_uint>:
push   %rbx
sub    $0x10,%rsp
mov    %rcx,%r8
mov    %rdx,%rbx
mov    %rdi,%rcx
mov    %esi,0xc(%rsp)
lea    0xc(%rsp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fwrite_check@plt>
addq   $0x4,(%rbx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @serialize_uint(i32* %0, i32 %1, i64* %2, i8* %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i64*
%8 = alloca i8*
store i32* %0, i32** %5
store i32 %1, i32* %6
store i64* %2, i64** %7
store i8* %3, i8** %8
%9 = load i32*, i32** %5
%10 = load i8*, i8** %8
%11 = call i32 @fwrite_check(i32* %6, i32 4, i32 1, i32* %9, i8* %10)
%12 = load i64*, i64** %7
%13 = load i64, i64* %12
%14 = add i64 %13, 4
store i64 %14, i64* %12
ret void
}

LLVM IR (-O2):
define void @serialize_uint(i32* %0, i32 %1, i64* nocapture %2, i8* %3) {
%5 = alloca i32
store i32 %1, i32* %5
%6 = call i32 @fwrite_check(i32* %5, i32 4, i32 1, i32* %0, i8* %3)
%7 = load i64, i64* %2
%8 = add i64 %7, 4
store i64 %8, i64* %2
ret void
}
getcpy(str) {
  register char *cp;
  cp = alloc(length(str) + 1);
  copy(str, cp);
  return (cp);
}


x86 assembly (clang, -O0):
<getcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1030 <length@plt>
mov    %eax,%edi
add    $0x1,%edi
mov    $0x0,%al
call   1050 <alloc@plt>
cltq
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1040 <copy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getcpy>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <length@plt>
lea    0x1(%rax),%edi
xor    %eax,%eax
call   1050 <alloc@plt>
movslq %eax,%rbx
mov    %ebp,%edi
mov    %rbx,%rsi
xor    %eax,%eax
call   1040 <copy@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @getcpy(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 (i32, ...) bitcast (i32 (...)* @length to i32 (i32, ...)*)(i32 %4)
%6 = add nsw i32 %5, 1
%7 = call i32 (i32, ...) bitcast (i32 (...)* @alloc to i32 (i32, ...)*)(i32 %6)
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %3
%10 = load i32, i32* %2
%11 = load i8*, i8** %3
%12 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @copy to i32 (i32, i8*, ...)*)(i32 %10, i8* %11)
%13 = load i8*, i8** %3
%14 = ptrtoint i8* %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @getcpy(i32 %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @length to i32 (i32, ...)*)(i32 %0)
%3 = add nsw i32 %2, 1
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @alloc to i32 (i32, ...)*)(i32 %3)
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i8*
%7 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @copy to i32 (i32, i8*, ...)*)(i32 %0, i8* %6)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ fibonacci(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int main() {
  int n = 94;
  unsigned long c = 0;
  while (c < n)
    printf("%lu\n", fibonacci(c++));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x5e,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x8(%rbp),%rcx
cmp    %rcx,%rax
jae    1178 <main+0x58>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    %eax,%edi
call   1040 <fibonacci@plt>
mov    %eax,%esi
lea    0xe92(%rip),%rdi
call   1030 <printf@plt>
jmp    113e <main+0x1e>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %edi,%edi
lea    0xed3(%rip),%r14
nopl   (%rax)
lea    0x1(%rdi),%rbx
call   1040 <fibonacci@plt>
mov    %r14,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
cmp    $0x5e,%rbx
jne    1130 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%lu\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i64
store i32 0, i32* %1
store i32 94, i32* %2
store i64 0, i64* %3
br label %4
4: ; preds = %9, %0
%5 = load i64, i64* %3
%6 = load i32, i32* %2
%7 = sext i32 %6 to i64
%8 = icmp ult i64 %5, %7
br i1 %8, label %9, label %15
9: ; preds = %4
%10 = load i64, i64* %3
%11 = add i64 %10, 1
store i64 %11, i64* %3
%12 = trunc i64 %10 to i32
%13 = call i32 @fibonacci(i32 %12)
%14 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %13)
br label %4
15: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"%lu\0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i64 [ 0, %0 ], [ %3, %1 ]
%3 = add nuw nsw i64 %2, 1
%4 = trunc i64 %2 to i32
%5 = tail call i32 @fibonacci(i32 %4)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = icmp eq i64 %3, 94
br i1 %7, label %8, label %1
8: ; preds = %1
ret i32 0
}
void PORT4_IRQHandler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<PORT4_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <PORT4_IRQHandler+0x9>
jmp    1109 <PORT4_IRQHandler+0x9>

x86 assembly (clang, -O2):
<PORT4_IRQHandler>:
jmp    1100 <PORT4_IRQHandler>

LLVM IR (-O0):
define void @PORT4_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @PORT4_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ gl_putc(char);
void gl_beep(void) { gl_putc('\007'); }


x86 assembly (clang, -O0):
<gl_beep>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7,%edi
call   1030 <gl_putc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gl_beep>:
mov    $0x7,%edi
jmp    1030 <gl_putc@plt>

LLVM IR (-O0):
define void @gl_beep() {
%1 = call i32 @gl_putc(i8 signext 7)
ret void
}

LLVM IR (-O2):
define void @gl_beep() {
%1 = tail call i32 @gl_putc(i8 signext 7)
ret void
}
/* Type definitions */
struct sockaddr {
  int dummy;
};
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
int accept(int, struct sockaddr *, int /*<<< orphan*/ *);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
extern int Accept(int s, struct sockaddr *restrict addr,
                  socklen_t *restrict addrlen) {
  int accepted_socket;
  if ((accepted_socket = accept(s, addr, addrlen)) < 0) {
    perror("accept error");
    exit(2);
  }
  return accepted_socket;
}


x86 assembly (clang, -O0):
<Accept>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <accept@plt>
mov    %eax,-0x1c(%rbp)
cmp    $0x0,%eax
jge    1175 <Accept+0x45>
lea    0xe9a(%rip),%rdi
call   1030 <perror@plt>
mov    $0x2,%edi
call   1050 <exit@plt>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Accept>:
push   %rax
call   1040 <accept@plt>
test   %eax,%eax
js     113c <Accept+0xc>
pop    %rcx
ret
lea    0xebd(%rip),%rdi
call   1030 <perror@plt>
mov    $0x2,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
@.str = [13 x i8] c"accept error\00"
define i32 @Accept(i32 %0, %struct.sockaddr* noalias %1, i32* noalias %2) {
%4 = alloca i32
%5 = alloca %struct.sockaddr*
%6 = alloca i32*
%7 = alloca i32
store i32 %0, i32* %4
store %struct.sockaddr* %1, %struct.sockaddr** %5
store i32* %2, i32** %6
%8 = load i32, i32* %4
%9 = load %struct.sockaddr*, %struct.sockaddr** %5
%10 = load i32*, i32** %6
%11 = call i32 @accept(i32 %8, %struct.sockaddr* %9, i32* %10)
store i32 %11, i32* %7
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %3
%14 = call i32 @perror(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%15 = call i32 @exit(i32 2)
unreachable
16: ; preds = %3
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
@.str = [13 x i8] c"accept error\00"
define i32 @Accept(i32 %0, %struct.sockaddr* noalias %1, i32* noalias %2) {
%4 = tail call i32 @accept(i32 %0, %struct.sockaddr* %1, i32* %2)
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = tail call i32 @perror(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%8 = tail call i32 @exit(i32 2)
unreachable
9: ; preds = %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0x17() {
  Assert_real((isdigit(23) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              120, ("isdigit should be 0 for 0x17"));
}


x86 assembly (clang, -O0):
<t_isdigit_0x17>:
push   %rbp
mov    %rsp,%rbp
mov    $0x17,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x78,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0x17>:
push   %rax
mov    $0x17,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x78,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0x17\00"
define void @t_isdigit_0x17() {
%1 = call i64 @isdigit(i32 23)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 120, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0x17\00"
define void @t_isdigit_0x17() {
%1 = tail call i64 @isdigit(i32 23)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 120, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void EVP_PKEY_free(void) {}


x86 assembly (clang, -O0):
<EVP_PKEY_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EVP_PKEY_free>:
ret

LLVM IR (-O0):
define void @EVP_PKEY_free() {
ret void
}

LLVM IR (-O2):
define void @EVP_PKEY_free() {
ret void
}
/* Variables and functions */
const char *strbool(bool value) { return value ? "true" : "false"; }


x86 assembly (clang, -O0):
<strbool>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xef4(%rip),%rax
lea    0xee8(%rip),%rcx
cmp    $0x0,%edx
cmovne %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strbool>:
test   %edi,%edi
lea    0xefc(%rip),%rcx
lea    0xef0(%rip),%rax
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"true\00"
@.str.1 = [6 x i8] c"false\00"
define i8* @strbool(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i64
%6 = select i1 %4, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0)
ret i8* %6
}

LLVM IR (-O2):
@.str = [5 x i8] c"true\00"
@.str.1 = [6 x i8] c"false\00"
define i8* @strbool(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
ret i8* %3
}
/* Variables and functions */
double F_up(double);
int /*<<< orphan*/ o_sinc(double);
double pow(int /*<<< orphan*/, int);
double F_fup(double t, int n) { return pow(o_sinc(t / 2.), n) * F_up(t); }


x86 assembly (clang, -O0):
<F_fup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeb3(%rip),%xmm1
divsd  %xmm1,%xmm0
call   1050 <o_sinc@plt>
mov    %eax,%edi
mov    -0xc(%rbp),%esi
call   1040 <pow@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <F_up@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
mulsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<F_fup>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
movapd %xmm0,%xmm1
movsd  %xmm0,0x8(%rsp)
movsd  0xeb7(%rip),%xmm0
mulsd  %xmm1,%xmm0
call   1050 <o_sinc@plt>
mov    %eax,%edi
mov    %ebx,%esi
call   1040 <pow@plt>
movsd  %xmm0,(%rsp)
movsd  0x8(%rsp),%xmm0
call   1030 <F_up@plt>
mulsd  (%rsp),%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define double @F_fup(double %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
store double %0, double* %3
store i32 %1, i32* %4
%5 = load double, double* %3
%6 = fdiv double %5, 2.000000e+00
%7 = call i32 @o_sinc(double %6)
%8 = load i32, i32* %4
%9 = call double @pow(i32 %7, i32 %8)
%10 = load double, double* %3
%11 = call double @F_up(double %10)
%12 = fmul double %9, %11
ret double %12
}

LLVM IR (-O2):
define double @F_fup(double %0, i32 %1) {
%3 = fmul double %0, 5.000000e-01
%4 = tail call i32 @o_sinc(double %3)
%5 = tail call double @pow(i32 %4, i32 %1)
%6 = tail call double @F_up(double %0)
%7 = fmul double %5, %6
ret double %7
}
void USBHostPwrFaultEnable(unsigned long ulBase) {
  ;
  (*((volatile unsigned short *)(ulBase + 0x00000400))) |= 0x00000010;
}


x86 assembly (clang, -O0):
<USBHostPwrFaultEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x400(%rax),%cx
movzwl %cx,%ecx
or     $0x10,%ecx
mov    %cx,0x400(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBHostPwrFaultEnable>:
orw    $0x10,0x400(%rdi)
10
ret

LLVM IR (-O0):
define void @USBHostPwrFaultEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 1024
%5 = inttoptr i64 %4 to i16*
%6 = load volatile i16, i16* %5
%7 = zext i16 %6 to i32
%8 = or i32 %7, 16
%9 = trunc i32 %8 to i16
store volatile i16 %9, i16* %5
ret void
}

LLVM IR (-O2):
define void @USBHostPwrFaultEnable(i64 %0) {
%2 = add i64 %0, 1024
%3 = inttoptr i64 %2 to i16*
%4 = load volatile i16, i16* %3
%5 = or i16 %4, 16
store volatile i16 %5, i16* %3
ret void
}
/* Type definitions */
struct ibv_cq {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ibv_ack_cq_events(struct ibv_cq *, unsigned int);
void mlx4_glue_ack_cq_events(struct ibv_cq *cq, unsigned int nevents) {
  ibv_ack_cq_events(cq, nevents);
}


x86 assembly (clang, -O0):
<mlx4_glue_ack_cq_events>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <ibv_ack_cq_events@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mlx4_glue_ack_cq_events>:
jmp    1030 <ibv_ack_cq_events@plt>

LLVM IR (-O0):
%struct.ibv_cq = type { i32 }
define void @mlx4_glue_ack_cq_events(%struct.ibv_cq* %0, i32 %1) {
%3 = alloca %struct.ibv_cq*
%4 = alloca i32
store %struct.ibv_cq* %0, %struct.ibv_cq** %3
store i32 %1, i32* %4
%5 = load %struct.ibv_cq*, %struct.ibv_cq** %3
%6 = load i32, i32* %4
%7 = call i32 @ibv_ack_cq_events(%struct.ibv_cq* %5, i32 %6)
ret void
}

LLVM IR (-O2):
%struct.ibv_cq = type { i32 }
define void @mlx4_glue_ack_cq_events(%struct.ibv_cq* %0, i32 %1) {
%3 = tail call i32 @ibv_ack_cq_events(%struct.ibv_cq* %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DMA_Copy_Async(int, void *, void *, unsigned int,
                                  unsigned int);
int /*<<< orphan*/ DMA_Wait(int /*<<< orphan*/);
void DMA_Copy(int Channel, void *SourceAddr, void *DestAddr, unsigned int Size,
              unsigned int TI) {
  DMA_Copy_Async(Channel, SourceAddr, DestAddr, Size, TI);
  DMA_Wait(0);
}


x86 assembly (clang, -O0):
<DMA_Copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    -0x20(%rbp),%r8d
call   1040 <DMA_Copy_Async@plt>
xor    %edi,%edi
call   1030 <DMA_Wait@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMA_Copy>:
push   %rax
call   1040 <DMA_Copy_Async@plt>
xor    %edi,%edi
pop    %rax
jmp    1030 <DMA_Wait@plt>

LLVM IR (-O0):
define void @DMA_Copy(i32 %0, i8* %1, i8* %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i8*, i8** %7
%13 = load i8*, i8** %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i32 @DMA_Copy_Async(i32 %11, i8* %12, i8* %13, i32 %14, i32 %15)
%17 = call i32 @DMA_Wait(i32 0)
ret void
}

LLVM IR (-O2):
define void @DMA_Copy(i32 %0, i8* %1, i8* %2, i32 %3, i32 %4) {
%6 = tail call i32 @DMA_Copy_Async(i32 %0, i8* %1, i8* %2, i32 %3, i32 %4)
%7 = tail call i32 @DMA_Wait(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char const *);
int /*<<< orphan*/ stderr;
int _mount_error(char const *message, int ret) {
  fputs("mount"
        ": ",
        stderr);
  perror(message);
  return ret;
}


x86 assembly (clang, -O0):
<_mount_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%esi
lea    0xec1(%rip),%rdi
call   1030 <fputs@plt>
mov    -0x8(%rbp),%rdi
call   1040 <perror@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mount_error>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
lea    0xec8(%rip),%rdi
call   1030 <fputs@plt>
mov    %rbx,%rdi
call   1040 <perror@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [8 x i8] c"mount: \00"
@stderr = global i32 0
define i32 @_mount_error(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = call i32 @fputs(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i8*, i8** %3
%8 = call i32 @perror(i8* %7)
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
@.str = [8 x i8] c"mount: \00"
@stderr = global i32 0
define i32 @_mount_error(i8* nocapture %0, i32 returned %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fputs(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = tail call i32 @perror(i8* %0)
ret i32 %1
}
void mtarch_init(void) {}


x86 assembly (clang, -O0):
<mtarch_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mtarch_init>:
ret

LLVM IR (-O0):
define void @mtarch_init() {
ret void
}

LLVM IR (-O2):
define void @mtarch_init() {
ret void
}
/* Variables and functions */
double sqrt(double);
double v_betrag(double *a) {
  return sqrt(a[0] * a[0] + a[1] * a[1] + a[2] * a[2]);
}


x86 assembly (clang, -O0):
<v_betrag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
mulsd  0x8(%rax),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<v_betrag>:
movsd  (%rdi),%xmm1
movsd  0x8(%rdi),%xmm0
mulsd  %xmm0,%xmm0
mulsd  %xmm1,%xmm1
addsd  %xmm0,%xmm1
movsd  0x10(%rdi),%xmm0
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1141 <v_betrag+0x31>
sqrtsd %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @v_betrag(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = load double*, double** %2
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = load double*, double** %2
%10 = getelementptr inbounds double, double* %9, i64 1
%11 = load double, double* %10
%12 = load double*, double** %2
%13 = getelementptr inbounds double, double* %12, i64 1
%14 = load double, double* %13
%15 = fmul double %11, %14
%16 = call double @llvm.fmuladd.f64(double %5, double %8, double %15)
%17 = load double*, double** %2
%18 = getelementptr inbounds double, double* %17, i64 2
%19 = load double, double* %18
%20 = load double*, double** %2
%21 = getelementptr inbounds double, double* %20, i64 2
%22 = load double, double* %21
%23 = call double @llvm.fmuladd.f64(double %19, double %22, double %16)
%24 = call double @sqrt(double %23)
ret double %24
}

LLVM IR (-O2):
define double @v_betrag(double* nocapture %0) {
%2 = load double, double* %0
%3 = getelementptr inbounds double, double* %0, i64 1
%4 = load double, double* %3
%5 = fmul double %4, %4
%6 = tail call double @llvm.fmuladd.f64(double %2, double %2, double %5)
%7 = getelementptr inbounds double, double* %0, i64 2
%8 = load double, double* %7
%9 = tail call double @llvm.fmuladd.f64(double %8, double %8, double %6)
%10 = tail call double @sqrt(double %9)
ret double %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void main() {
  printf("0 && 0 = %d\n", 0 && 0);
  printf("0 && 1 = %d\n", 0 && 1);
  printf("1 && 0 = %d\n", 1 && 0);
  printf("1 && 1 = %d\n", 1 && 1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
lea    0xee4(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
lea    0xee3(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
lea    0xee2(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
lea    0xee7(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
lea    0xee6(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
lea    0xee5(%rip),%rdi
mov    $0x1,%esi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"0 && 0 = %d\0A\00"
@.str.1 = [13 x i8] c"0 && 1 = %d\0A\00"
@.str.2 = [13 x i8] c"1 && 0 = %d\0A\00"
@.str.3 = [13 x i8] c"1 && 1 = %d\0A\00"
define void @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 0)
%2 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0), i32 0)
%3 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.2, i64 0, i64 0), i32 0)
%4 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.3, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"0 && 0 = %d\0A\00"
@.str.1 = [13 x i8] c"0 && 1 = %d\0A\00"
@.str.2 = [13 x i8] c"1 && 0 = %d\0A\00"
@.str.3 = [13 x i8] c"1 && 1 = %d\0A\00"
define void @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 0)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0), i32 0)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.2, i64 0, i64 0), i32 0)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.3, i64 0, i64 0), i32 1)
ret void
}
/* Variables and functions */
int fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
int b_blue() { return fputs("[44m", stdout); }


x86 assembly (clang, -O0):
<b_blue>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <fputs@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_blue>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
lea    0xee0(%rip),%rdi
jmp    1030 <fputs@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"\1B[44m\00"
@stdout = global i32 0
define i32 @b_blue() {
%1 = load i32, i32* @stdout
%2 = call i32 @fputs(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 %2
}

LLVM IR (-O2):
@.str = [6 x i8] c"\1B[44m\00"
@stdout = global i32 0
define i32 @b_blue() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 %2
}
void *thread3(void *arg) {
  (void)arg;
  return 0;
}


x86 assembly (clang, -O0):
<thread3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread3>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @thread3(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @thread3(i8* nocapture readnone %0) {
ret i8* null
}
void s3c64xx_spi_setname(char *name) {}


x86 assembly (clang, -O0):
<s3c64xx_spi_setname>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<s3c64xx_spi_setname>:
ret

LLVM IR (-O0):
define void @s3c64xx_spi_setname(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @s3c64xx_spi_setname(i8* nocapture %0) {
ret void
}
/* Type definitions */
struct hostent {
  int dummy;
};
typedef enum nss_status { ____Placeholder_nss_status } nss_status;

/* Variables and functions */
int internal_gethostent_r(struct hostent *, char *, size_t, int *, int *);
int /*<<< orphan*/ sss_nss_lock();
int /*<<< orphan*/ sss_nss_unlock();
enum nss_status _nss_sss_gethostent_r(struct hostent *result, char *buffer,
                                      size_t buflen, int *errnop,
                                      int *h_errnop) {
  enum nss_status nret;
  sss_nss_lock();
  nret = internal_gethostent_r(result, buffer, buflen, errnop, h_errnop);
  sss_nss_unlock();
  return nret;
}


x86 assembly (clang, -O0):
<_nss_sss_gethostent_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    $0x0,%al
call   1030 <sss_nss_lock@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
call   1040 <internal_gethostent_r@plt>
mov    %eax,-0x2c(%rbp)
mov    $0x0,%al
call   1050 <sss_nss_unlock@plt>
mov    -0x2c(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_nss_sss_gethostent_r>:
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
mov    %r8,%r14
mov    %rcx,%r15
mov    %rdx,%r12
mov    %rsi,%r13
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <sss_nss_lock@plt>
mov    %rbx,%rdi
mov    %r13,%rsi
mov    %r12,%rdx
mov    %r15,%rcx
mov    %r14,%r8
call   1040 <internal_gethostent_r@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <sss_nss_unlock@plt>
mov    %ebx,%eax
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.hostent = type { i32 }
define i32 @_nss_sss_gethostent_r(%struct.hostent* %0, i8* %1, i64 %2, i32* %3, i32* %4) {
%6 = alloca %struct.hostent*
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i32*
%10 = alloca i32*
%11 = alloca i32
store %struct.hostent* %0, %struct.hostent** %6
store i8* %1, i8** %7
store i64 %2, i64* %8
store i32* %3, i32** %9
store i32* %4, i32** %10
%12 = call i32 (...) @sss_nss_lock()
%13 = load %struct.hostent*, %struct.hostent** %6
%14 = load i8*, i8** %7
%15 = load i64, i64* %8
%16 = load i32*, i32** %9
%17 = load i32*, i32** %10
%18 = call i32 @internal_gethostent_r(%struct.hostent* %13, i8* %14, i64 %15, i32* %16, i32* %17)
store i32 %18, i32* %11
%19 = call i32 (...) @sss_nss_unlock()
%20 = load i32, i32* %11
ret i32 %20
}

LLVM IR (-O2):
%struct.hostent = type { i32 }
define i32 @_nss_sss_gethostent_r(%struct.hostent* %0, i8* %1, i64 %2, i32* %3, i32* %4) {
%6 = tail call i32 (...) @sss_nss_lock()
%7 = tail call i32 @internal_gethostent_r(%struct.hostent* %0, i8* %1, i64 %2, i32* %3, i32* %4)
%8 = tail call i32 (...) @sss_nss_unlock()
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
const void *dmc_unrar_unicode_advance_uint16(const void *opaque) {
  return (const void *)(((const uint16_t *)opaque) + 1);
}


x86 assembly (clang, -O0):
<dmc_unrar_unicode_advance_uint16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x4,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dmc_unrar_unicode_advance_uint16>:
lea    0x4(%rdi),%rax
ret

LLVM IR (-O0):
define i8* @dmc_unrar_unicode_advance_uint16(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = getelementptr inbounds i32, i32* %4, i64 1
%6 = bitcast i32* %5 to i8*
ret i8* %6
}

LLVM IR (-O2):
define i8* @dmc_unrar_unicode_advance_uint16(i8* readnone %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 4
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ s(int **);
void f(int n) {
  if (1)
    s((int(*)[n])0);
  else
    s((int(*)[n])0);
  while (1)
    s((int(*)[n])0);
  for (;;)
    s((int(*)[n])0);
  switch (0)
    s((int(*)[n])0);
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1030 <s@plt>
xor    %eax,%eax
mov    %eax,%edi
call   1030 <s@plt>
jmp    1124 <f+0x14>

x86 assembly (clang, -O2):
<f>:
push   %rax
xor    %edi,%edi
call   1030 <s@plt>
nopl   0x0(%rax,%rax,1)
xor    %edi,%edi
call   1030 <s@plt>
jmp    1120 <f+0x10>

LLVM IR (-O0):
define void @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = call i32 @s(i32** null)
br label %6
6: ; preds = %1, %6
%7 = load i32, i32* %2
%8 = zext i32 %7 to i64
%9 = call i32 @s(i32** null)
br label %6
}

LLVM IR (-O2):
define void @f(i32 %0) {
%2 = tail call i32 @s(i32** null)
br label %3
3: ; preds = %1, %3
%4 = tail call i32 @s(i32** null)
br label %3
}
double _not(const int numInputs, const double *inputs,
            const double *connectionWeights) {
  double out;
  if (inputs[0] == 0) {
    out = 1;
  } else {
    out = 0;
  }
  return out;
}


x86 assembly (clang, -O0):
<_not>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    113c <_not+0x3c>
jp     113c <_not+0x3c>
movsd  0xece(%rip),%xmm0
movsd  %xmm0,-0x20(%rbp)
jmp    1144 <_not+0x44>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_not>:
xorpd  %xmm1,%xmm1
cmpeqsd (%rsi),%xmm1
movsd  0xeef(%rip),%xmm0
andpd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @_not(i32 %0, double* %1, double* %2) {
%4 = alloca i32
%5 = alloca double*
%6 = alloca double*
%7 = alloca double
store i32 %0, i32* %4
store double* %1, double** %5
store double* %2, double** %6
%8 = load double*, double** %5
%9 = getelementptr inbounds double, double* %8, i64 0
%10 = load double, double* %9
%11 = fcmp oeq double %10, 0.000000e+00
br i1 %11, label %12, label %13
12: ; preds = %3
store double 1.000000e+00, double* %7
br label %14
13: ; preds = %3
store double 0.000000e+00, double* %7
br label %14
14: ; preds = %13, %12
%15 = load double, double* %7
ret double %15
}

LLVM IR (-O2):
define double @_not(i32 %0, double* nocapture %1, double* nocapture readnone %2) {
%4 = load double, double* %1
%5 = fcmp oeq double %4, 0.000000e+00
%6 = select i1 %5, double 1.000000e+00, double 0.000000e+00
ret double %6
}
int cmp2(void *a, void *b) {
  double a_, b_;
  a_ = *(double *)a;
  b_ = *(double *)b;
  if (a_ == b_)
    return 0;
  if (a_ > b_)
    return 1;
  if (a_ < b_)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<cmp2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x20(%rbp)
mov    -0x18(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x20(%rbp),%xmm0
ucomisd -0x28(%rbp),%xmm0
jne    1148 <cmp2+0x48>
jp     1148 <cmp2+0x48>
movl   $0x0,-0x4(%rbp)
jmp    118b <cmp2+0x8b>
movsd  -0x20(%rbp),%xmm0
ucomisd -0x28(%rbp),%xmm0
jbe    1164 <cmp2+0x64>
movl   $0x1,-0x4(%rbp)
jmp    118b <cmp2+0x8b>
movsd  -0x20(%rbp),%xmm1
movsd  -0x28(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1184 <cmp2+0x84>
movl   $0xffffffff,-0x4(%rbp)
jmp    118b <cmp2+0x8b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp2>:
movsd  (%rdi),%xmm0
movsd  (%rsi),%xmm1
xor    %eax,%eax
ucomisd %xmm1,%xmm0
jne    1113 <cmp2+0x13>
jp     1113 <cmp2+0x13>
ret
mov    $0x1,%eax
ja     1112 <cmp2+0x12>
xor    %eax,%eax
ucomisd %xmm0,%xmm1
seta   %al
neg    %eax
ret

LLVM IR (-O0):
define i32 @cmp2(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca double
%7 = alloca double
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to double*
%10 = load double, double* %9
store double %10, double* %6
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to double*
%13 = load double, double* %12
store double %13, double* %7
%14 = load double, double* %6
%15 = load double, double* %7
%16 = fcmp oeq double %14, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 0, i32* %3
br label %29
18: ; preds = %2
%19 = load double, double* %6
%20 = load double, double* %7
%21 = fcmp ogt double %19, %20
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 1, i32* %3
br label %29
23: ; preds = %18
%24 = load double, double* %6
%25 = load double, double* %7
%26 = fcmp olt double %24, %25
br i1 %26, label %27, label %28
27: ; preds = %23
store i32 -1, i32* %3
br label %29
28: ; preds = %23
store i32 0, i32* %3
br label %29
29: ; preds = %28, %27, %22, %17
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @cmp2(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to double*
%4 = load double, double* %3
%5 = bitcast i8* %1 to double*
%6 = load double, double* %5
%7 = fcmp oeq double %4, %6
br i1 %7, label %13, label %8
8: ; preds = %2
%9 = fcmp ogt double %4, %6
br i1 %9, label %13, label %10
10: ; preds = %8
%11 = fcmp olt double %4, %6
%12 = sext i1 %11 to i32
br label %13
13: ; preds = %10, %8, %2
%14 = phi i32 [ 0, %2 ], [ 1, %8 ], [ %12, %10 ]
ret i32 %14
}
rl_vi_yank_arg(count) int count;
{ rl_yank_nth_arg(count, 0); }


x86 assembly (clang, -O0):
<rl_vi_yank_arg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
xor    %esi,%esi
mov    $0x0,%al
call   1030 <rl_yank_nth_arg@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rl_vi_yank_arg>:
xor    %esi,%esi
xor    %eax,%eax
jmp    1030 <rl_yank_nth_arg@plt>

LLVM IR (-O0):
define i32 @rl_vi_yank_arg(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 (i32, i32, ...) bitcast (i32 (...)* @rl_yank_nth_arg to i32 (i32, i32, ...)*)(i32 %4, i32 0)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @rl_vi_yank_arg(i32 %0) {
%2 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @rl_yank_nth_arg to i32 (i32, i32, ...)*)(i32 %0, i32 0)
ret i32 undef
}
/* Variables and functions */
char *BTSHASP_ParseTokenBasic(char *, char *);
char *btshas_rstrdup(char *);
char *BTSHASP_ParseToken(char *cs, char **rstr) {
  char tb[256];
  cs = BTSHASP_ParseTokenBasic(cs, tb);
  *rstr = btshas_rstrdup(tb);
  return (cs);
}


x86 assembly (clang, -O0):
<BTSHASP_ParseToken>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x110(%rbp),%rsi
call   1040 <BTSHASP_ParseTokenBasic@plt>
mov    %rax,-0x8(%rbp)
lea    -0x110(%rbp),%rdi
call   1030 <btshas_rstrdup@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BTSHASP_ParseToken>:
push   %r15
push   %r14
push   %rbx
sub    $0x100,%rsp
mov    %rsi,%r15
mov    %rsp,%r14
mov    %r14,%rsi
call   1040 <BTSHASP_ParseTokenBasic@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1030 <btshas_rstrdup@plt>
mov    %rax,(%r15)
mov    %rbx,%rax
add    $0x100,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @BTSHASP_ParseToken(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
%5 = alloca [256 x i8]
store i8* %0, i8** %3
store i8** %1, i8*** %4
%6 = load i8*, i8** %3
%7 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%8 = call i8* @BTSHASP_ParseTokenBasic(i8* %6, i8* %7)
store i8* %8, i8** %3
%9 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%10 = call i8* @btshas_rstrdup(i8* %9)
%11 = load i8**, i8*** %4
store i8* %10, i8** %11
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define i8* @BTSHASP_ParseToken(i8* %0, i8** nocapture writeonly %1) {
%3 = alloca [256 x i8]
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%5 = call i8* @BTSHASP_ParseTokenBasic(i8* %0, i8* %4)
%6 = call i8* @btshas_rstrdup(i8* %4)
store i8* %6, i8** %1
ret i8* %5
}
void gdk_drag_protocol_get_type() {}


x86 assembly (clang, -O0):
<gdk_drag_protocol_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_drag_protocol_get_type>:
ret

LLVM IR (-O0):
define void @gdk_drag_protocol_get_type() {
ret void
}

LLVM IR (-O2):
define void @gdk_drag_protocol_get_type() {
ret void
}
/* Variables and functions */
scalar_t__ cw_character_is_valid(char);
int cw_check_character(char c) { return (int)cw_character_is_valid(c); }


x86 assembly (clang, -O0):
<cw_check_character>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <cw_character_is_valid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cw_check_character>:
jmp    1030 <cw_character_is_valid@plt>

LLVM IR (-O0):
define i32 @cw_check_character(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @cw_character_is_valid(i8 signext %3)
%5 = trunc i64 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @cw_check_character(i8 signext %0) {
%2 = tail call i64 @cw_character_is_valid(i8 signext %0)
%3 = trunc i64 %2 to i32
ret i32 %3
}
int makepow2(int val) {
  int power = 0;
  if (!val)
    return 0;
  while (val >>= 1)
    power++;
  return (1 << power);
}


x86 assembly (clang, -O0):
<makepow2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1124 <makepow2+0x24>
movl   $0x0,-0x4(%rbp)
jmp    1156 <makepow2+0x56>
jmp    1129 <makepow2+0x29>
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
je     1149 <makepow2+0x49>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1129 <makepow2+0x29>
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<makepow2>:
mov    %edi,%eax
test   %edi,%edi
je     1133 <makepow2+0x33>
xor    %ecx,%ecx
cmp    $0x1,%eax
je     112c <makepow2+0x2c>
xor    %ecx,%ecx
mov    %eax,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
sar    %edx
add    $0x1,%ecx
cmp    $0x3,%eax
mov    %edx,%eax
ja     1120 <makepow2+0x20>
mov    $0x1,%eax
shl    %cl,%eax
ret

LLVM IR (-O0):
define i32 @makepow2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 0, i32* %2
br label %19
8: ; preds = %1
br label %9
9: ; preds = %13, %8
%10 = load i32, i32* %3
%11 = ashr i32 %10, 1
store i32 %11, i32* %3
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = load i32, i32* %4
%15 = add nsw i32 %14, 1
store i32 %15, i32* %4
br label %9
16: ; preds = %9
%17 = load i32, i32* %4
%18 = shl i32 1, %17
store i32 %18, i32* %2
br label %19
19: ; preds = %16, %7
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @makepow2(i32 %0) {
switch i32 %0, label %2 [
i32 0, label %11
i32 1, label %8
]
2: ; preds = %1, %2
%3 = phi i32 [ %6, %2 ], [ 0, %1 ]
%4 = phi i32 [ %5, %2 ], [ %0, %1 ]
%5 = ashr i32 %4, 1
%6 = add nuw nsw i32 %3, 1
%7 = icmp ult i32 %4, 4
br i1 %7, label %8, label %2
8: ; preds = %2, %1
%9 = phi i32 [ 0, %1 ], [ %6, %2 ]
%10 = shl nuw i32 1, %9
br label %11
11: ; preds = %1, %8
%12 = phi i32 [ %10, %8 ], [ %0, %1 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ _change_process();
void executeSchedule() { _change_process(); }


x86 assembly (clang, -O0):
<executeSchedule>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_change_process@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<executeSchedule>:
xor    %eax,%eax
jmp    1030 <_change_process@plt>

LLVM IR (-O0):
define void @executeSchedule() {
%1 = call i32 (...) @_change_process()
ret void
}

LLVM IR (-O2):
define void @executeSchedule() {
%1 = tail call i32 (...) @_change_process()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ vboxCConv();
int /*<<< orphan*/ vboxCKeyDst();
void main(void) {
  vboxCKeyDst();
  vboxCConv();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <vboxCKeyDst@plt>
mov    $0x0,%al
call   1040 <vboxCConv@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <vboxCKeyDst@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <vboxCConv@plt>

LLVM IR (-O0):
define void @main() {
%1 = call i32 (...) @vboxCKeyDst()
%2 = call i32 (...) @vboxCConv()
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 (...) @vboxCKeyDst()
%2 = tail call i32 (...) @vboxCConv()
ret void
}
/* Variables and functions */
int strncmp(char *, char *, int);
void strncmp_diff_length_6() {
  char *x = "234";
  char *y = "12345";
  if (strncmp(x, y, 3) != 1)
    (void)*(char *)0;
}


x86 assembly (clang, -O0):
<strncmp_diff_length_6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xeda(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x3,%edx
call   1030 <strncmp@plt>
cmp    $0x1,%eax
je     1149 <strncmp_diff_length_6+0x39>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncmp_diff_length_6>:
lea    0xee9(%rip),%rdi
lea    0xee6(%rip),%rsi
mov    $0x3,%edx
jmp    1030 <strncmp@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"234\00"
@.str.1 = [6 x i8] c"12345\00"
define void @strncmp_diff_length_6() {
%1 = alloca i8*
%2 = alloca i8*
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %1
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %1
%4 = load i8*, i8** %2
%5 = call i32 @strncmp(i8* %3, i8* %4, i32 3)
%6 = icmp ne i32 %5, 1
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = load i8, i8* null
br label %9
9: ; preds = %7, %0
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"234\00"
@.str.1 = [6 x i8] c"12345\00"
define void @strncmp_diff_length_6() {
%1 = tail call i32 @strncmp(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ PWM2_FAULT_DriverIRQHandler();
__attribute__((weak)) void PWM2_FAULT_IRQHandler(void) {
  PWM2_FAULT_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<PWM2_FAULT_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <PWM2_FAULT_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWM2_FAULT_IRQHandler>:
xor    %eax,%eax
jmp    1030 <PWM2_FAULT_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @PWM2_FAULT_IRQHandler() {
%1 = call i32 (...) @PWM2_FAULT_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @PWM2_FAULT_IRQHandler() {
%1 = tail call i32 (...) @PWM2_FAULT_DriverIRQHandler()
ret void
}
/* Variables and functions */
size_t size_class_num_tiny(void) { return 256 / 16; }


x86 assembly (clang, -O0):
<size_class_num_tiny>:
push   %rbp
mov    %rsp,%rbp
mov    $0x10,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<size_class_num_tiny>:
mov    $0x10,%eax
ret

LLVM IR (-O0):
define i64 @size_class_num_tiny() {
ret i64 16
}

LLVM IR (-O2):
define i64 @size_class_num_tiny() {
ret i64 16
}
/* Variables and functions */
int /*<<< orphan*/ gen_op_store_601_rtcl();
void spr_write_601_rtcl(void *opaque, int sprn) { gen_op_store_601_rtcl(); }


x86 assembly (clang, -O0):
<spr_write_601_rtcl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <gen_op_store_601_rtcl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spr_write_601_rtcl>:
xor    %eax,%eax
jmp    1030 <gen_op_store_601_rtcl@plt>

LLVM IR (-O0):
define void @spr_write_601_rtcl(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = call i32 (...) @gen_op_store_601_rtcl()
ret void
}

LLVM IR (-O2):
define void @spr_write_601_rtcl(i8* nocapture readnone %0, i32 %1) {
%3 = tail call i32 (...) @gen_op_store_601_rtcl()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ s5l_uart_send_char(int);
int putchar(int c) {
  s5l_uart_send_char(c);
  return c;
}


x86 assembly (clang, -O0):
<putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <s5l_uart_send_char@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putchar>:
push   %rbx
mov    %edi,%ebx
call   1030 <s5l_uart_send_char@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @putchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @s5l_uart_send_char(i32 %3)
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
define i32 @putchar(i32 returned %0) {
%2 = tail call i32 @s5l_uart_send_char(i32 %0)
ret i32 %0
}
int test_imm_AAint64_lowword_reg(long long val) {
  return ((val) & (0xAA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_AAint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xaa,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_AAint64_lowword_reg>:
test   $0xaa,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_AAint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 170
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_AAint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 170
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}