#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int sio_read_reg(int, unsigned long *);
int sio_write_reg(int, unsigned long);
int FS460_set_blender_bypass(int bypass) {
  int err;
  unsigned long mux1, mux2, cr;
  err = sio_read_reg(0x3C, &mux1);
  if (err)
    return err;
  err = sio_read_reg(0x3E, &mux2);
  if (err)
    return err;
  err = sio_read_reg(0x0C, &cr);
  if (err)
    return err;
  if (bypass) {
    mux1 |= (1 << 9);
    mux2 &= ~(1 << 9);
    mux2 &= ~(1 << 7);
    cr |= 0x0200;
  } else {
    mux1 &= ~(1 << 9);
    mux2 |= (1 << 9);
    mux2 |= (1 << 7);
    cr &= ~0x0200;
  }
  err = sio_write_reg(0x3C, mux1);
  if (err)
    return err;
  err = sio_write_reg(0x3E, mux2);
  if (err)
    return err;
  err = sio_write_reg(0x0C, cr);
  if (err)
    return err;
  return 0;
}


x86 assembly (clang, -O0):
<FS460_set_blender_bypass>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x3c,%edi
lea    -0x18(%rbp),%rsi
call   1040 <sio_read_reg@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1151 <FS460_set_blender_bypass+0x31>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1295 <FS460_set_blender_bypass+0x175>
mov    $0x3e,%edi
lea    -0x20(%rbp),%rsi
call   1040 <sio_read_reg@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1177 <FS460_set_blender_bypass+0x57>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1295 <FS460_set_blender_bypass+0x175>
mov    $0xc,%edi
lea    -0x28(%rbp),%rsi
call   1040 <sio_read_reg@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     119d <FS460_set_blender_bypass+0x7d>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1295 <FS460_set_blender_bypass+0x175>
cmpl   $0x0,-0x8(%rbp)
je     11e4 <FS460_set_blender_bypass+0xc4>
mov    -0x18(%rbp),%rax
or     $0x200,%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rax
and    $0xfffffffffffffdff,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
and    $0xffffffffffffff7f,%rax
mov    %rax,-0x20(%rbp)
mov    -0x28(%rbp),%rax
or     $0x200,%rax
mov    %rax,-0x28(%rbp)
jmp    121c <FS460_set_blender_bypass+0xfc>
mov    -0x18(%rbp),%rax
and    $0xfffffffffffffdff,%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rax
or     $0x200,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
or     $0x80,%rax
mov    %rax,-0x20(%rbp)
mov    -0x28(%rbp),%rax
and    $0xfffffffffffffdff,%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rsi
mov    $0x3c,%edi
call   1030 <sio_write_reg@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1242 <FS460_set_blender_bypass+0x122>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1295 <FS460_set_blender_bypass+0x175>
mov    -0x20(%rbp),%rsi
mov    $0x3e,%edi
call   1030 <sio_write_reg@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1268 <FS460_set_blender_bypass+0x148>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1295 <FS460_set_blender_bypass+0x175>
mov    -0x28(%rbp),%rsi
mov    $0xc,%edi
call   1030 <sio_write_reg@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     128e <FS460_set_blender_bypass+0x16e>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1295 <FS460_set_blender_bypass+0x175>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FS460_set_blender_bypass>:
push   %rbx
sub    $0x20,%rsp
mov    %edi,%ebx
lea    0x18(%rsp),%rsi
mov    $0x3c,%edi
call   1040 <sio_read_reg@plt>
test   %eax,%eax
jne    11ec <FS460_set_blender_bypass+0xcc>
lea    0x10(%rsp),%rsi
mov    $0x3e,%edi
call   1040 <sio_read_reg@plt>
test   %eax,%eax
jne    11ec <FS460_set_blender_bypass+0xcc>
lea    0x8(%rsp),%rsi
mov    $0xc,%edi
call   1040 <sio_read_reg@plt>
test   %eax,%eax
jne    11ec <FS460_set_blender_bypass+0xcc>
mov    0x18(%rsp),%rsi
test   %ebx,%ebx
je     1196 <FS460_set_blender_bypass+0x76>
or     $0x200,%rsi
andq   $0xfffffffffffffd7f,0x10(%rsp)
ff ff
mov    %rsi,0x18(%rsp)
mov    $0x200,%eax
or     0x8(%rsp),%rax
jmp    11b7 <FS460_set_blender_bypass+0x97>
and    $0xfffffffffffffdff,%rsi
orq    $0x280,0x10(%rsp)
mov    %rsi,0x18(%rsp)
mov    $0xfffffffffffffdff,%rax
and    0x8(%rsp),%rax
mov    %rax,0x8(%rsp)
mov    $0x3c,%edi
call   1030 <sio_write_reg@plt>
test   %eax,%eax
jne    11ec <FS460_set_blender_bypass+0xcc>
mov    0x10(%rsp),%rsi
mov    $0x3e,%edi
call   1030 <sio_write_reg@plt>
test   %eax,%eax
jne    11ec <FS460_set_blender_bypass+0xcc>
mov    0x8(%rsp),%rsi
mov    $0xc,%edi
call   1030 <sio_write_reg@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @FS460_set_blender_bypass(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i32 %0, i32* %3
%8 = call i32 @sio_read_reg(i32 60, i64* %5)
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %1
%12 = load i32, i32* %4
store i32 %12, i32* %2
br label %68
13: ; preds = %1
%14 = call i32 @sio_read_reg(i32 62, i64* %6)
store i32 %14, i32* %4
%15 = load i32, i32* %4
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = load i32, i32* %4
store i32 %18, i32* %2
br label %68
19: ; preds = %13
%20 = call i32 @sio_read_reg(i32 12, i64* %7)
store i32 %20, i32* %4
%21 = load i32, i32* %4
%22 = icmp ne i32 %21, 0
br i1 %22, label %23, label %25
23: ; preds = %19
%24 = load i32, i32* %4
store i32 %24, i32* %2
br label %68
25: ; preds = %19
%26 = load i32, i32* %3
%27 = icmp ne i32 %26, 0
br i1 %27, label %28, label %37
28: ; preds = %25
%29 = load i64, i64* %5
%30 = or i64 %29, 512
store i64 %30, i64* %5
%31 = load i64, i64* %6
%32 = and i64 %31, -513
store i64 %32, i64* %6
%33 = load i64, i64* %6
%34 = and i64 %33, -129
store i64 %34, i64* %6
%35 = load i64, i64* %7
%36 = or i64 %35, 512
store i64 %36, i64* %7
br label %46
37: ; preds = %25
%38 = load i64, i64* %5
%39 = and i64 %38, -513
store i64 %39, i64* %5
%40 = load i64, i64* %6
%41 = or i64 %40, 512
store i64 %41, i64* %6
%42 = load i64, i64* %6
%43 = or i64 %42, 128
store i64 %43, i64* %6
%44 = load i64, i64* %7
%45 = and i64 %44, -513
store i64 %45, i64* %7
br label %46
46: ; preds = %37, %28
%47 = load i64, i64* %5
%48 = call i32 @sio_write_reg(i32 60, i64 %47)
store i32 %48, i32* %4
%49 = load i32, i32* %4
%50 = icmp ne i32 %49, 0
br i1 %50, label %51, label %53
51: ; preds = %46
%52 = load i32, i32* %4
store i32 %52, i32* %2
br label %68
53: ; preds = %46
%54 = load i64, i64* %6
%55 = call i32 @sio_write_reg(i32 62, i64 %54)
store i32 %55, i32* %4
%56 = load i32, i32* %4
%57 = icmp ne i32 %56, 0
br i1 %57, label %58, label %60
58: ; preds = %53
%59 = load i32, i32* %4
store i32 %59, i32* %2
br label %68
60: ; preds = %53
%61 = load i64, i64* %7
%62 = call i32 @sio_write_reg(i32 12, i64 %61)
store i32 %62, i32* %4
%63 = load i32, i32* %4
%64 = icmp ne i32 %63, 0
br i1 %64, label %65, label %67
65: ; preds = %60
%66 = load i32, i32* %4
store i32 %66, i32* %2
br label %68
67: ; preds = %60
store i32 0, i32* %2
br label %68
68: ; preds = %67, %65, %58, %51, %23, %17, %11
%69 = load i32, i32* %2
ret i32 %69
}

LLVM IR (-O2):
define i32 @FS460_set_blender_bypass(i32 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = bitcast i64* %2 to i8*
%6 = bitcast i64* %3 to i8*
%7 = bitcast i64* %4 to i8*
%8 = call i32 @sio_read_reg(i32 60, i64* %2)
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %43
10: ; preds = %1
%11 = call i32 @sio_read_reg(i32 62, i64* %3)
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %43
13: ; preds = %10
%14 = call i32 @sio_read_reg(i32 12, i64* %4)
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %43
16: ; preds = %13
%17 = icmp eq i32 %0, 0
%18 = load i64, i64* %2
br i1 %17, label %25, label %19
19: ; preds = %16
%20 = or i64 %18, 512
store i64 %20, i64* %2
%21 = load i64, i64* %3
%22 = and i64 %21, -641
store i64 %22, i64* %3
%23 = load i64, i64* %4
%24 = or i64 %23, 512
br label %31
25: ; preds = %16
%26 = and i64 %18, -513
store i64 %26, i64* %2
%27 = load i64, i64* %3
%28 = or i64 %27, 640
store i64 %28, i64* %3
%29 = load i64, i64* %4
%30 = and i64 %29, -513
br label %31
31: ; preds = %25, %19
%32 = phi i64 [ %26, %25 ], [ %20, %19 ]
%33 = phi i64 [ %30, %25 ], [ %24, %19 ]
store i64 %33, i64* %4
%34 = call i32 @sio_write_reg(i32 60, i64 %32)
%35 = icmp eq i32 %34, 0
br i1 %35, label %36, label %43
36: ; preds = %31
%37 = load i64, i64* %3
%38 = call i32 @sio_write_reg(i32 62, i64 %37)
%39 = icmp eq i32 %38, 0
br i1 %39, label %40, label %43
40: ; preds = %36
%41 = load i64, i64* %4
%42 = call i32 @sio_write_reg(i32 12, i64 %41)
br label %43
43: ; preds = %40, %36, %31, %13, %10, %1
%44 = phi i32 [ %8, %1 ], [ %11, %10 ], [ %14, %13 ], [ %34, %31 ], [ %38, %36 ], [ %42, %40 ]
ret i32 %44
}