#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int INT_MIN;
bool sequential_scheduling(int *start_iteration, int *end_iteration, int n,
                           int p, int iam) {
  bool first_time = (*start_iteration == INT_MIN);
  if (first_time && (iam == 0)) {
    *start_iteration = 0;
    *end_iteration = n - 1;
    return true;
  } else
    return false;
}


x86 assembly (clang, -O0):
<sequential_scheduling>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    %ecx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    0x2ec5(%rip),%rcx
cmp    (%rcx),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x28(%rbp)
cmpl   $0x0,-0x28(%rbp)
je     1166 <sequential_scheduling+0x66>
cmpl   $0x0,-0x24(%rbp)
jne    1166 <sequential_scheduling+0x66>
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x1c(%rbp),%ecx
sub    $0x1,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
movl   $0x1,-0x4(%rbp)
jmp    116d <sequential_scheduling+0x6d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sequential_scheduling>:
xor    %eax,%eax
test   %r8d,%r8d
jne    1124 <sequential_scheduling+0x24>
mov    0x2eda(%rip),%rcx
mov    (%rcx),%ecx
cmp    %ecx,(%rdi)
jne    1124 <sequential_scheduling+0x24>
movl   $0x0,(%rdi)
add    $0xffffffff,%edx
mov    %edx,(%rsi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
@INT_MIN = global i32 0
define i32 @sequential_scheduling(i32* %0, i32* %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32* %0, i32** %7
store i32* %1, i32** %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
%13 = load i32*, i32** %7
%14 = load i32, i32* %13
%15 = load i32, i32* @INT_MIN
%16 = icmp eq i32 %14, %15
%17 = zext i1 %16 to i32
store i32 %17, i32* %12
%18 = load i32, i32* %12
%19 = icmp ne i32 %18, 0
br i1 %19, label %20, label %28
20: ; preds = %5
%21 = load i32, i32* %11
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %28
23: ; preds = %20
%24 = load i32*, i32** %7
store i32 0, i32* %24
%25 = load i32, i32* %9
%26 = sub nsw i32 %25, 1
%27 = load i32*, i32** %8
store i32 %26, i32* %27
store i32 1, i32* %6
br label %29
28: ; preds = %20, %5
store i32 0, i32* %6
br label %29
29: ; preds = %28, %23
%30 = load i32, i32* %6
ret i32 %30
}

LLVM IR (-O2):
@INT_MIN = global i32 0
define i32 @sequential_scheduling(i32* nocapture %0, i32* nocapture writeonly %1, i32 %2, i32 %3, i32 %4) {
%6 = load i32, i32* %0
%7 = load i32, i32* @INT_MIN
%8 = icmp eq i32 %6, %7
%9 = icmp eq i32 %4, 0
%10 = and i1 %9, %8
br i1 %10, label %11, label %13
11: ; preds = %5
store i32 0, i32* %0
%12 = add nsw i32 %2, -1
store i32 %12, i32* %1
br label %13
13: ; preds = %5, %11
%14 = phi i32 [ 1, %11 ], [ 0, %5 ]
ret i32 %14
}