xunge/DecIR huggingface dataset:
void foo752() {}


x86 assembly (clang, -O0):
<foo752>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo752>:
ret

LLVM IR (-O0):
define void @foo752() {
ret void
}

LLVM IR (-O2):
define void @foo752() {
ret void
}
double to_double(__float128 a) { return (double)a; }


x86 assembly (clang, -O0):
<to_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movaps %xmm0,-0x10(%rbp)
movaps -0x10(%rbp),%xmm0
call   1120 <__trunctfdf2>
add    $0x10,%rsp
pop    %rbp
ret
nopl   0x0(%rax,%rax,1)

x86 assembly (clang, -O2):
<to_double>:
push   %rax
call   1110 <__trunctfdf2>
pop    %rax
ret
nopl   0x0(%rax,%rax,1)

LLVM IR (-O0):
define double @to_double(fp128 %0) {
%2 = alloca fp128
store fp128 %0, fp128* %2
%3 = load fp128, fp128* %2
%4 = fptrunc fp128 %3 to double
ret double %4
}

LLVM IR (-O2):
define double @to_double(fp128 %0) {
%2 = fptrunc fp128 %0 to double
ret double %2
}
/* Variables and functions */
scalar_t__ malloc(int);
int main() {
  int **pa;
  pa = (int **)malloc(5 * 8);
  int *paa;
  int a = 5;
  paa = &a;
  pa[3] = paa;
  return *(*(pa + 3));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x28,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
movl   $0x5,-0x1c(%rbp)
lea    -0x1c(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,0x18(%rax)
mov    -0x10(%rbp),%rax
mov    0x18(%rax),%rax
mov    (%rax),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x28,%edi
call   1030 <malloc@plt>
lea    0x4(%rsp),%rcx
mov    %rcx,0x18(%rax)
mov    $0x5,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32**
%3 = alloca i32*
%4 = alloca i32
store i32 0, i32* %1
%5 = call i64 @malloc(i32 40)
%6 = inttoptr i64 %5 to i32**
store i32** %6, i32*** %2
store i32 5, i32* %4
store i32* %4, i32** %3
%7 = load i32*, i32** %3
%8 = load i32**, i32*** %2
%9 = getelementptr inbounds i32*, i32** %8, i64 3
store i32* %7, i32** %9
%10 = load i32**, i32*** %2
%11 = getelementptr inbounds i32*, i32** %10, i64 3
%12 = load i32*, i32** %11
%13 = load i32, i32* %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = tail call i64 @malloc(i32 40)
%3 = inttoptr i64 %2 to i32**
%4 = bitcast i32* %1 to i8*
%5 = getelementptr inbounds i32*, i32** %3, i64 3
store i32* %1, i32** %5
ret i32 5
}
int test_imm_C9int8_reg(signed char val) {
  return ((val) & (0xC9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C9int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xc9,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C9int8_reg>:
test   $0xc9,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C9int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 201
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C9int8_reg(i8 signext %0) {
%2 = and i8 %0, -55
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
char SubStrings_ASCII_UpperC(const char C) {
  if (C >= 'a' && C <= 'z')
    return C - ('a' - 'A');
  else
    return C;
}


x86 assembly (clang, -O0):
<SubStrings_ASCII_UpperC>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
cmp    $0x61,%eax
jl     1133 <SubStrings_ASCII_UpperC+0x33>
movsbl -0x2(%rbp),%eax
cmp    $0x7a,%eax
jg     1133 <SubStrings_ASCII_UpperC+0x33>
movsbl -0x2(%rbp),%eax
sub    $0x20,%eax
mov    %al,-0x1(%rbp)
jmp    1139 <SubStrings_ASCII_UpperC+0x39>
mov    -0x2(%rbp),%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SubStrings_ASCII_UpperC>:
lea    -0x61(%rdi),%eax
lea    -0x20(%rdi),%ecx
cmp    $0x1a,%al
movzbl %cl,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @SubStrings_ASCII_UpperC(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 97
br i1 %6, label %7, label %16
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 122
br i1 %10, label %11, label %16
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %13, 32
%15 = trunc i32 %14 to i8
store i8 %15, i8* %2
br label %18
16: ; preds = %7, %1
%17 = load i8, i8* %3
store i8 %17, i8* %2
br label %18
18: ; preds = %16, %11
%19 = load i8, i8* %2
ret i8 %19
}

LLVM IR (-O2):
define signext i8 @SubStrings_ASCII_UpperC(i8 signext %0) {
%2 = add i8 %0, -97
%3 = icmp ult i8 %2, 26
%4 = add i8 %0, -32
%5 = select i1 %3, i8 %4, i8 %0
ret i8 %5
}
/* Variables and functions */
int fio_ct_true(uintptr_t);
__attribute__((unused)) uintptr_t fio_ct_false(uintptr_t cond) {
  return fio_ct_true(cond) ^ 1;
}


x86 assembly (clang, -O0):
<fio_ct_false>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fio_ct_true@plt>
xor    $0x1,%eax
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fio_ct_false>:
push   %rax
call   1030 <fio_ct_true@plt>
xor    $0x1,%eax
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i64 @fio_ct_false(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @fio_ct_true(i64 %3)
%5 = xor i32 %4, 1
%6 = sext i32 %5 to i64
ret i64 %6
}

LLVM IR (-O2):
define i64 @fio_ct_false(i64 %0) {
%2 = tail call i32 @fio_ct_true(i64 %0)
%3 = xor i32 %2, 1
%4 = sext i32 %3 to i64
ret i64 %4
}
/* Type definitions */
typedef scalar_t__ volatile uint32_t;

/* Variables and functions */
void SSIDMAEnable(uint32_t ui32Base, uint32_t ui32DMAFlags) {
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000024))) |= ui32DMAFlags;
}


x86 assembly (clang, -O0):
<SSIDMAEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x24(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x24(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSIDMAEnable>:
mov    %rdi,-0x8(%rsp)
mov    %rsi,-0x10(%rsp)
mov    -0x10(%rsp),%rax
mov    -0x8(%rsp),%rcx
or     %rax,0x24(%rcx)
ret

LLVM IR (-O0):
define void @SSIDMAEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = load volatile i64, i64* %3
%7 = add nsw i64 %6, 36
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = or i64 %9, %5
store volatile i64 %10, i64* %8
ret void
}

LLVM IR (-O2):
define void @SSIDMAEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = load volatile i64, i64* %3
%7 = add nsw i64 %6, 36
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = or i64 %9, %5
store volatile i64 %10, i64* %8
ret void
}
/* Variables and functions */
double log(double);
double libm_log(double x) { return log(x); }


x86 assembly (clang, -O0):
<libm_log>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <log@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libm_log>:
jmp    1030 <log@plt>

LLVM IR (-O0):
define double @libm_log(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @log(double %3)
ret double %4
}

LLVM IR (-O2):
define double @libm_log(double %0) {
%2 = tail call double @log(double %0)
ret double %2
}
int Convert(unsigned int x) {
  return (x >> 24) | ((x >> 8) & 0xff00) | ((x << 8) & 0xff0000) | (x << 24);
}


x86 assembly (clang, -O0):
<Convert>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x18,%eax
mov    -0x4(%rbp),%ecx
shr    $0x8,%ecx
and    $0xff00,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
shl    $0x8,%ecx
and    $0xff0000,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
shl    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Convert>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @Convert(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 24
%5 = load i32, i32* %2
%6 = lshr i32 %5, 8
%7 = and i32 %6, 65280
%8 = or i32 %4, %7
%9 = load i32, i32* %2
%10 = shl i32 %9, 8
%11 = and i32 %10, 16711680
%12 = or i32 %8, %11
%13 = load i32, i32* %2
%14 = shl i32 %13, 24
%15 = or i32 %12, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @Convert(i32 %0) {
%2 = tail call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void b6b_hash_finish(uint32_t *hash) {
  *hash += (*hash << 3);
  *hash ^= (*hash >> 11);
  *hash += (*hash << 15);
}


x86 assembly (clang, -O0):
<b6b_hash_finish>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
shl    $0x3,%ecx
mov    -0x8(%rbp),%rax
add    (%rax),%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
sar    $0xb,%ecx
mov    -0x8(%rbp),%rax
xor    (%rax),%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
shl    $0xf,%ecx
mov    -0x8(%rbp),%rax
add    (%rax),%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<b6b_hash_finish>:
mov    (%rdi),%eax
lea    (%rax,%rax,8),%eax
mov    %eax,%ecx
sar    $0xb,%ecx
xor    %eax,%ecx
mov    %ecx,%eax
shl    $0xf,%eax
add    %ecx,%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @b6b_hash_finish(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = shl i32 %4, 3
%6 = load i32*, i32** %2
%7 = load i32, i32* %6
%8 = add nsw i32 %7, %5
store i32 %8, i32* %6
%9 = load i32*, i32** %2
%10 = load i32, i32* %9
%11 = ashr i32 %10, 11
%12 = load i32*, i32** %2
%13 = load i32, i32* %12
%14 = xor i32 %13, %11
store i32 %14, i32* %12
%15 = load i32*, i32** %2
%16 = load i32, i32* %15
%17 = shl i32 %16, 15
%18 = load i32*, i32** %2
%19 = load i32, i32* %18
%20 = add nsw i32 %19, %17
store i32 %20, i32* %18
ret void
}

LLVM IR (-O2):
define void @b6b_hash_finish(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = mul i32 %2, 9
%4 = ashr i32 %3, 11
%5 = xor i32 %4, %3
%6 = mul i32 %5, 32769
store i32 %6, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned char);
void fopRRx(unsigned char *p) { printf("@R%x", *p & 1); }


x86 assembly (clang, -O0):
<fopRRx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
and    $0x1,%eax
lea    0xed3(%rip),%rdi
movzbl %al,%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fopRRx>:
movzbl (%rdi),%esi
and    $0x1,%esi
lea    0xee3(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"@R%x\00"
define void @fopRRx(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 1
%7 = trunc i32 %6 to i8
%8 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8 zeroext %7)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"@R%x\00"
define void @fopRRx(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 1
%4 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8 zeroext %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
int system(const char *string) {
  fprintf(stderr, "\nAccess to dangerous function %s() denied.\n", "system");
  assert(0);
  ;
}


x86 assembly (clang, -O0):
<system>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
lea    0xec4(%rip),%rsi
lea    0xee9(%rip),%rdx
call   1040 <fprintf@plt>
xor    %edi,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<system>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
lea    0xef4(%rip),%rdx
call   1040 <fprintf@plt>
xor    %edi,%edi
pop    %rax
jmp    1030 <assert@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [44 x i8] c"\0AAccess to dangerous function %s() denied.\0A\00"
@.str.1 = [7 x i8] c"system\00"
define i32 @system(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i32, i32* @stderr
%5 = call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%6 = call i32 @assert(i32 0)
%7 = load i32, i32* %2
ret i32 %7
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [44 x i8] c"\0AAccess to dangerous function %s() denied.\0A\00"
@.str.1 = [7 x i8] c"system\00"
define i32 @system(i8* nocapture readnone %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i32 @assert(i32 0)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int minDeletionSize(char **, int);
int main(int argc, char **argv) {
  int ASize = 2;
  char *A[] = {"cba", "daf", "ghi"};
  assert(minDeletionSize(A, ASize) == 1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x2,-0x14(%rbp)
mov    0x2cbc(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0x2cb9(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0x2cb6(%rip),%rax
mov    %rax,-0x20(%rbp)
lea    -0x30(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <minDeletionSize@plt>
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
mov    0x2ce5(%rip),%rax
mov    %rax,0x10(%rsp)
movaps 0x2cc9(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x2,%esi
call   1030 <minDeletionSize@plt>
xor    %edi,%edi
cmp    $0x1,%eax
sete   %dil
call   1040 <assert@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [4 x i8] c"cba\00"
@.str.1 = [4 x i8] c"daf\00"
@.str.2 = [4 x i8] c"ghi\00"
@__const.main.A = [3 x i8*] [i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i32 0, i32 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i32 0, i32 0)]
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca [3 x i8*]
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 2, i32* %6
%8 = bitcast [3 x i8*]* %7 to i8*
%9 = getelementptr inbounds [3 x i8*], [3 x i8*]* %7, i64 0, i64 0
%10 = load i32, i32* %6
%11 = call i32 @minDeletionSize(i8** %9, i32 %10)
%12 = icmp eq i32 %11, 1
%13 = zext i1 %12 to i32
%14 = call i32 @assert(i32 %13)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"cba\00"
@.str.1 = [4 x i8] c"daf\00"
@.str.2 = [4 x i8] c"ghi\00"
@__const.main.A = [3 x i8*] [i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i32 0, i32 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i32 0, i32 0)]
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [3 x i8*]
%4 = bitcast [3 x i8*]* %3 to i8*
%5 = getelementptr inbounds [3 x i8*], [3 x i8*]* %3, i64 0, i64 0
%6 = call i32 @minDeletionSize(i8** %5, i32 2)
%7 = icmp eq i32 %6, 1
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
ret i32 0
}
int bit_weighted_count(const unsigned long long v) {
  register unsigned long long b;
  b = v - ((v >> 1) & 0x1555555555555515ULL) + (v & 0x0100000000000001ULL);
  b = ((b >> 2) & 0x3333333333333333ULL) + (b & 0x3333333333333333ULL);
  b = ((b >> 4) + b) & 0x0f0f0f0f0f0f0f0fULL;
  b *= 0x0101010101010101ULL;
  return (int)(b >> 56);
}


x86 assembly (clang, -O0):
<bit_weighted_count>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
shr    $0x1,%rcx
movabs $0x1555555555555515,%rdx
55 55 15
and    %rdx,%rcx
sub    %rcx,%rax
movabs $0x100000000000001,%rcx
and    -0x8(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x2,%rax
movabs $0x3333333333333333,%rcx
33 33 33
and    %rcx,%rax
movabs $0x3333333333333333,%rcx
33 33 33
and    -0x10(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x4,%rax
add    -0x10(%rbp),%rax
movabs $0xf0f0f0f0f0f0f0f,%rcx
0f 0f 0f
and    %rcx,%rax
mov    %rax,-0x10(%rbp)
movabs $0x101010101010101,%rax
01 01 01
imul   -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x38,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit_weighted_count>:
mov    %rdi,%rax
movabs $0x100000000000001,%rcx
and    %rdi,%rcx
shr    %rdi
movabs $0x1555555555555515,%rdx
55 55 15
and    %rdi,%rdx
sub    %rdx,%rax
add    %rax,%rcx
mov    %rcx,%rax
shr    $0x2,%rax
movabs $0x3333333333333333,%rdx
33 33 33
and    %rdx,%rax
and    %rdx,%rcx
add    %rax,%rcx
mov    %rcx,%rax
shr    $0x4,%rax
add    %rcx,%rax
movabs $0xf0f0f0f0f0f0f0f,%rcx
0f 0f 0f
and    %rax,%rcx
movabs $0x101010101010101,%rax
01 01 01
imul   %rcx,%rax
shr    $0x38,%rax
ret

LLVM IR (-O0):
define i32 @bit_weighted_count(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = load i64, i64* %2
%6 = lshr i64 %5, 1
%7 = and i64 %6, 1537228672809129237
%8 = sub i64 %4, %7
%9 = load i64, i64* %2
%10 = and i64 %9, 72057594037927937
%11 = add i64 %8, %10
store i64 %11, i64* %3
%12 = load i64, i64* %3
%13 = lshr i64 %12, 2
%14 = and i64 %13, 3689348814741910323
%15 = load i64, i64* %3
%16 = and i64 %15, 3689348814741910323
%17 = add i64 %14, %16
store i64 %17, i64* %3
%18 = load i64, i64* %3
%19 = lshr i64 %18, 4
%20 = load i64, i64* %3
%21 = add i64 %19, %20
%22 = and i64 %21, 1085102592571150095
store i64 %22, i64* %3
%23 = load i64, i64* %3
%24 = mul i64 %23, 72340172838076673
store i64 %24, i64* %3
%25 = load i64, i64* %3
%26 = lshr i64 %25, 56
%27 = trunc i64 %26 to i32
ret i32 %27
}

LLVM IR (-O2):
define i32 @bit_weighted_count(i64 %0) {
%2 = lshr i64 %0, 1
%3 = and i64 %2, 1537228672809129237
%4 = sub i64 %0, %3
%5 = and i64 %0, 72057594037927937
%6 = add i64 %4, %5
%7 = lshr i64 %6, 2
%8 = and i64 %7, 3689348814741910323
%9 = and i64 %6, 3689348814741910323
%10 = add nuw nsw i64 %8, %9
%11 = lshr i64 %10, 4
%12 = add nuw nsw i64 %11, %10
%13 = and i64 %12, 1085102592571150095
%14 = mul i64 %13, 72340172838076673
%15 = lshr i64 %14, 56
%16 = trunc i64 %15 to i32
ret i32 %16
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ width;
};
struct TYPE_4__ {
  TYPE_1__ xconfigure;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
int get_XEvent_xconfigure_width(void *_p) {
  return (int)((XEvent *)_p)->xconfigure.width;
}


x86 assembly (clang, -O0):
<get_XEvent_xconfigure_width>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xconfigure_width>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i32 @get_XEvent_xconfigure_width(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_XEvent_xconfigure_width(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0xbb() {
  Assert_real((isupper(187) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              940, ("isupper should be 0 for 0xbb"));
}


x86 assembly (clang, -O0):
<t_isupper_0xbb>:
push   %rbp
mov    %rsp,%rbp
mov    $0xbb,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3ac,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0xbb>:
push   %rax
mov    $0xbb,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3ac,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0xbb\00"
define void @t_isupper_0xbb() {
%1 = call i64 @isupper(i32 187)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 940, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0xbb\00"
define void @t_isupper_0xbb() {
%1 = tail call i64 @isupper(i32 187)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 940, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int MPI_Init_thread(int *, char ***, int, int *);
int /*<<< orphan*/ PyMPI_SCMPI_dlopen_libslurm();
int PyMPI_SCMPI_MPI_Init_thread(int *argc, char ***argv, int required,
                                int *provided) {
  PyMPI_SCMPI_dlopen_libslurm();
  return MPI_Init_thread(argc, argv, required, provided);
}


x86 assembly (clang, -O0):
<PyMPI_SCMPI_MPI_Init_thread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    $0x0,%al
call   1040 <PyMPI_SCMPI_dlopen_libslurm@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x20(%rbp),%rcx
call   1030 <MPI_Init_thread@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PyMPI_SCMPI_MPI_Init_thread>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rcx,%r14
mov    %edx,%r15d
mov    %rsi,%rbx
mov    %rdi,%rbp
xor    %eax,%eax
call   1040 <PyMPI_SCMPI_dlopen_libslurm@plt>
mov    %rbp,%rdi
mov    %rbx,%rsi
mov    %r15d,%edx
mov    %r14,%rcx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <MPI_Init_thread@plt>

LLVM IR (-O0):
define i32 @PyMPI_SCMPI_MPI_Init_thread(i32* %0, i8*** %1, i32 %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i8***
%7 = alloca i32
%8 = alloca i32*
store i32* %0, i32** %5
store i8*** %1, i8**** %6
store i32 %2, i32* %7
store i32* %3, i32** %8
%9 = call i32 (...) @PyMPI_SCMPI_dlopen_libslurm()
%10 = load i32*, i32** %5
%11 = load i8***, i8**** %6
%12 = load i32, i32* %7
%13 = load i32*, i32** %8
%14 = call i32 @MPI_Init_thread(i32* %10, i8*** %11, i32 %12, i32* %13)
ret i32 %14
}

LLVM IR (-O2):
define i32 @PyMPI_SCMPI_MPI_Init_thread(i32* %0, i8*** %1, i32 %2, i32* %3) {
%5 = tail call i32 (...) @PyMPI_SCMPI_dlopen_libslurm()
%6 = tail call i32 @MPI_Init_thread(i32* %0, i8*** %1, i32 %2, i32* %3)
ret i32 %6
}
void gtk_tree_store_move_after() {}


x86 assembly (clang, -O0):
<gtk_tree_store_move_after>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_store_move_after>:
ret

LLVM IR (-O0):
define void @gtk_tree_store_move_after() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_store_move_after() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
char *__psh_history_path();
int /*<<< orphan*/ *fopen(char *, char *);
FILE *psh_open_readable_history() {
  char *path = __psh_history_path();
  FILE *file;
  if (!path) {
    return NULL;
  }
  file = fopen(path, "r");
  return file;
}


x86 assembly (clang, -O0):
<psh_open_readable_history>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x0,%al
call   1030 <__psh_history_path@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114b <psh_open_readable_history+0x2b>
movq   $0x0,-0x8(%rbp)
jmp    1167 <psh_open_readable_history+0x47>
mov    -0x10(%rbp),%rdi
lea    0xeaa(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psh_open_readable_history>:
push   %rax
xor    %eax,%eax
call   1030 <__psh_history_path@plt>
test   %rax,%rax
je     113d <psh_open_readable_history+0x1d>
lea    0xecc(%rip),%rsi
mov    %rax,%rdi
pop    %rax
jmp    1040 <fopen@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"r\00"
define i32* @psh_open_readable_history() {
%1 = alloca i32*
%2 = alloca i8*
%3 = alloca i32*
%4 = call i8* (...) @__psh_history_path()
store i8* %4, i8** %2
%5 = load i8*, i8** %2
%6 = icmp ne i8* %5, null
br i1 %6, label %8, label %7
7: ; preds = %0
store i32* null, i32** %1
br label %12
8: ; preds = %0
%9 = load i8*, i8** %2
%10 = call i32* @fopen(i8* %9, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %10, i32** %3
%11 = load i32*, i32** %3
store i32* %11, i32** %1
br label %12
12: ; preds = %8, %7
%13 = load i32*, i32** %1
ret i32* %13
}

LLVM IR (-O2):
@.str = [2 x i8] c"r\00"
define noalias i32* @psh_open_readable_history() {
%1 = tail call i8* (...) @__psh_history_path()
%2 = icmp eq i8* %1, null
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32* @fopen(i8* %1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %0, %3
%6 = phi i32* [ %4, %3 ], [ null, %0 ]
ret i32* %6
}
/* Type definitions */
typedef int uint64_t;
struct timeval {
  int dummy;
};
typedef int int64_t;

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
int rdtsc();
float clock_time_of_day() {
  struct timeval begin;
  uint64_t start = rdtsc();
  gettimeofday(&begin, NULL);
  uint64_t stop = rdtsc();
  unsigned int lo = start & (((uint64_t)2 << 32) - 1);
  unsigned int lo2 = stop & (((int64_t)2 << 32) - 1);
  int cycles = lo2 - lo;
  float t = ((float)(cycles));
  float factor = 3591338000.0 * .000001;
  t = t / factor;
  return t;
}


x86 assembly (clang, -O0):
<clock_time_of_day>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    $0x0,%al
call   1040 <rdtsc@plt>
mov    %eax,-0xc(%rbp)
lea    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
mov    $0x0,%al
call   1040 <rdtsc@plt>
mov    %eax,-0x10(%rbp)
and    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
and    -0x10(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
sub    -0x14(%rbp),%eax
mov    %eax,-0x1c(%rbp)
cvtsi2ssl -0x1c(%rbp),%xmm0
movss  %xmm0,-0x20(%rbp)
movss  0xe90(%rip),%xmm0
movss  %xmm0,-0x24(%rbp)
movss  -0x20(%rbp),%xmm0
divss  -0x24(%rbp),%xmm0
movss  %xmm0,-0x20(%rbp)
movss  -0x20(%rbp),%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clock_time_of_day>:
push   %rax
xor    %eax,%eax
call   1040 <rdtsc@plt>
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <rdtsc@plt>

LLVM IR (-O0):
%struct.timeval = type { i32 }
define float @clock_time_of_day() {
%1 = alloca %struct.timeval
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca float
%8 = alloca float
%9 = call i32 (...) @rdtsc()
store i32 %9, i32* %2
%10 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%11 = call i32 (...) @rdtsc()
store i32 %11, i32* %3
%12 = load i32, i32* %2
%13 = and i32 %12, poison
store i32 %13, i32* %4
%14 = load i32, i32* %3
%15 = and i32 %14, poison
store i32 %15, i32* %5
%16 = load i32, i32* %5
%17 = load i32, i32* %4
%18 = sub i32 %16, %17
store i32 %18, i32* %6
%19 = load i32, i32* %6
%20 = sitofp i32 %19 to float
store float %20, float* %7
store float 0x40AC0EAD00000000, float* %8
%21 = load float, float* %7
%22 = load float, float* %8
%23 = fdiv float %21, %22
store float %23, float* %7
%24 = load float, float* %7
ret float %24
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
define float @clock_time_of_day() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = tail call i32 (...) @rdtsc()
%4 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%5 = tail call i32 (...) @rdtsc()
ret float poison
}
/* Type definitions */
struct timeval {
  int tv_sec;
  int tv_usec;
};

/* Variables and functions */
double timeval_to_double(struct timeval *tv) {
  double d;
  d = tv->tv_sec + tv->tv_usec / 1000000;
  return d;
}


x86 assembly (clang, -O0):
<timeval_to_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
mov    $0xf4240,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
add    %ecx,%eax
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<timeval_to_double>:
movslq 0x4(%rdi),%rax
imul   $0x431bde83,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x32,%rax
add    %ecx,%eax
add    (%rdi),%eax
cvtsi2sd %eax,%xmm0
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define double @timeval_to_double(%struct.timeval* %0) {
%2 = alloca %struct.timeval*
%3 = alloca double
store %struct.timeval* %0, %struct.timeval** %2
%4 = load %struct.timeval*, %struct.timeval** %2
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %4, i32 0, i32 0
%6 = load i32, i32* %5
%7 = load %struct.timeval*, %struct.timeval** %2
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %7, i32 0, i32 1
%9 = load i32, i32* %8
%10 = sdiv i32 %9, 1000000
%11 = add nsw i32 %6, %10
%12 = sitofp i32 %11 to double
store double %12, double* %3
%13 = load double, double* %3
ret double %13
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define double @timeval_to_double(%struct.timeval* nocapture %0) {
%2 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
%3 = load i32, i32* %2
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
%5 = load i32, i32* %4
%6 = sdiv i32 %5, 1000000
%7 = add nsw i32 %6, %3
%8 = sitofp i32 %7 to double
ret double %8
}
int test_imm_3Cint8_reg(signed char val) {
  return ((val) & (-0x3C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Cint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffffc4,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Cint8_reg>:
test   $0xc4,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Cint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -60
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_3Cint8_reg(i8 signext %0) {
%2 = and i8 %0, -60
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
char *strdup(const char *str) { return 0; }


x86 assembly (clang, -O0):
<strdup>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdup>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @strdup(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @strdup(i8* nocapture readnone %0) {
ret i8* null
}
void c_filelist() { ; }


x86 assembly (clang, -O0):
<c_filelist>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_filelist>:
ret

LLVM IR (-O0):
define void @c_filelist() {
ret void
}

LLVM IR (-O2):
define void @c_filelist() {
ret void
}
void w10(void *x, double y) { *(double *)(x + 32758) = y; }


x86 assembly (clang, -O0):
<w10>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,0x7ff6(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<w10>:
movsd  %xmm0,0x7ff6(%rdi)
ret

LLVM IR (-O0):
define void @w10(i8* %0, double %1) {
%3 = alloca i8*
%4 = alloca double
store i8* %0, i8** %3
store double %1, double* %4
%5 = load double, double* %4
%6 = load i8*, i8** %3
%7 = getelementptr i8, i8* %6, i64 32758
%8 = bitcast i8* %7 to double*
store double %5, double* %8
ret void
}

LLVM IR (-O2):
define void @w10(i8* nocapture writeonly %0, double %1) {
%3 = getelementptr i8, i8* %0, i64 32758
%4 = bitcast i8* %3 to double*
store double %1, double* %4
ret void
}
int ab_foo(char *foo_char) {}


x86 assembly (clang, -O0):
<ab_foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ab_foo>:
ret

LLVM IR (-O0):
define i32 @ab_foo(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @ab_foo(i8* nocapture readnone %0) {
ret i32 undef
}
/* Type definitions */
struct ps_summary {
  int dummy;
};
struct ps_bus_event {
  int dummy;
};
struct obus_bus_event {
  int dummy;
};

/* Variables and functions */
int obus_bus_event_register_object(struct obus_bus_event *, int /*<<< orphan*/);
int /*<<< orphan*/ ps_summary_object(struct ps_summary *);
int ps_bus_event_register_summary(struct ps_bus_event *bus_event,
                                  struct ps_summary *object) {
  return obus_bus_event_register_object((struct obus_bus_event *)bus_event,
                                        ps_summary_object(object));
}


x86 assembly (clang, -O0):
<ps_bus_event_register_summary>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <ps_summary_object@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
call   1040 <obus_bus_event_register_object@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps_bus_event_register_summary>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <ps_summary_object@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <obus_bus_event_register_object@plt>

LLVM IR (-O0):
%struct.ps_bus_event = type { i32 }
%struct.ps_summary = type { i32 }
%struct.obus_bus_event = type { i32 }
define i32 @ps_bus_event_register_summary(%struct.ps_bus_event* %0, %struct.ps_summary* %1) {
%3 = alloca %struct.ps_bus_event*
%4 = alloca %struct.ps_summary*
store %struct.ps_bus_event* %0, %struct.ps_bus_event** %3
store %struct.ps_summary* %1, %struct.ps_summary** %4
%5 = load %struct.ps_bus_event*, %struct.ps_bus_event** %3
%6 = bitcast %struct.ps_bus_event* %5 to %struct.obus_bus_event*
%7 = load %struct.ps_summary*, %struct.ps_summary** %4
%8 = call i32 @ps_summary_object(%struct.ps_summary* %7)
%9 = call i32 @obus_bus_event_register_object(%struct.obus_bus_event* %6, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
%struct.ps_bus_event = type { i32 }
%struct.ps_summary = type { i32 }
%struct.obus_bus_event = type { i32 }
define i32 @ps_bus_event_register_summary(%struct.ps_bus_event* %0, %struct.ps_summary* %1) {
%3 = bitcast %struct.ps_bus_event* %0 to %struct.obus_bus_event*
%4 = tail call i32 @ps_summary_object(%struct.ps_summary* %1)
%5 = tail call i32 @obus_bus_event_register_object(%struct.obus_bus_event* %3, i32 %4)
ret i32 %5
}
int ipv4_key_cmp(const void *a, const void *b) {
  if (a == b)
    return 0;
  else if (a < b)
    return -1;
  else
    return 1;
}


x86 assembly (clang, -O0):
<ipv4_key_cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jne    1126 <ipv4_key_cmp+0x26>
movl   $0x0,-0x4(%rbp)
jmp    1147 <ipv4_key_cmp+0x47>
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1140 <ipv4_key_cmp+0x40>
movl   $0xffffffff,-0x4(%rbp)
jmp    1147 <ipv4_key_cmp+0x47>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipv4_key_cmp>:
xor    %ecx,%ecx
xor    %eax,%eax
cmp    %rsi,%rdi
setae  %al
lea    -0x1(%rax,%rax,1),%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ipv4_key_cmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = load i8*, i8** %5
%8 = icmp eq i8* %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 0, i32* %3
br label %16
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = load i8*, i8** %5
%13 = icmp ult i8* %11, %12
br i1 %13, label %14, label %15
14: ; preds = %10
store i32 -1, i32* %3
br label %16
15: ; preds = %10
store i32 1, i32* %3
br label %16
16: ; preds = %15, %14, %9
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @ipv4_key_cmp(i8* readnone %0, i8* readnone %1) {
%3 = icmp eq i8* %0, %1
%4 = icmp ult i8* %0, %1
%5 = select i1 %4, i32 -1, i32 1
%6 = select i1 %3, i32 0, i32 %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0x77() {
  Assert_real((isdigit(119) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              600, ("isdigit should be 0 for w"));
}


x86 assembly (clang, -O0):
<t_isdigit_0x77>:
push   %rbp
mov    %rsp,%rbp
mov    $0x77,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x258,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0x77>:
push   %rax
mov    $0x77,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x258,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [26 x i8] c"isdigit should be 0 for w\00"
define void @t_isdigit_0x77() {
%1 = call i64 @isdigit(i32 119)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 600, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [26 x i8] c"isdigit should be 0 for w\00"
define void @t_isdigit_0x77() {
%1 = tail call i64 @isdigit(i32 119)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 600, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ i2cSendRegister(int /*<<< orphan*/, int);
void si5351aOutputOff(uint8_t clk) { i2cSendRegister(clk, 0x80); }


x86 assembly (clang, -O0):
<si5351aOutputOff>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x80,%esi
call   1030 <i2cSendRegister@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<si5351aOutputOff>:
mov    $0x80,%esi
jmp    1030 <i2cSendRegister@plt>

LLVM IR (-O0):
define void @si5351aOutputOff(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @i2cSendRegister(i32 %3, i32 128)
ret void
}

LLVM IR (-O2):
define void @si5351aOutputOff(i32 %0) {
%2 = tail call i32 @i2cSendRegister(i32 %0, i32 128)
ret void
}
void *test_anti_range_63(short n) {
  extern void *alloc_anti_range_63(short) __attribute__((alloc_size(1)));
  if (0 <= n && n <= 0)
    n = 0 - 1;
  return alloc_anti_range_63(n);
}


x86 assembly (clang, -O0):
<test_anti_range_63>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%ecx
xor    %eax,%eax
cmp    %ecx,%eax
jg     1140 <test_anti_range_63+0x30>
movswl -0x2(%rbp),%eax
cmp    $0x0,%eax
jg     1140 <test_anti_range_63+0x30>
movw   $0xffff,-0x2(%rbp)
movswl -0x2(%rbp),%edi
call   1030 <alloc_anti_range_63@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_anti_range_63>:
cmp    $0x1,%di
sbb    %eax,%eax
or     %eax,%edi
jmp    1030 <alloc_anti_range_63@plt>

LLVM IR (-O0):
define i8* @test_anti_range_63(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = icmp sle i32 0, %4
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i16, i16* %2
%8 = sext i16 %7 to i32
%9 = icmp sle i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %6
store i16 -1, i16* %2
br label %11
11: ; preds = %10, %6, %1
%12 = load i16, i16* %2
%13 = call i8* @alloc_anti_range_63(i16 signext %12)
ret i8* %13
}

LLVM IR (-O2):
define i8* @test_anti_range_63(i16 signext %0) {
%2 = icmp eq i16 %0, 0
%3 = select i1 %2, i16 -1, i16 %0
%4 = tail call i8* @alloc_anti_range_63(i16 signext %3)
ret i8* %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
scalar_t__ EOF;
scalar_t__ fputc(char, int /*<<< orphan*/ *);
int /*<<< orphan*/ perrordie(char *);
void safe_fputc(char m, FILE *f) {
  if (fputc(m, f) == EOF)
    perrordie("fputc");
}


x86 assembly (clang, -O0):
<safe_fputc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x1(%rbp),%al
mov    -0x10(%rbp),%rsi
movsbl %al,%edi
call   1030 <fputc@plt>
mov    0x2ea0(%rip),%rcx
cmp    (%rcx),%rax
jne    115d <safe_fputc+0x3d>
lea    0xea8(%rip),%rdi
call   1040 <perrordie@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_fputc>:
push   %rax
call   1030 <fputc@plt>
mov    0x2ebb(%rip),%rcx
cmp    (%rcx),%rax
jne    113f <safe_fputc+0x1f>
lea    0xec7(%rip),%rdi
pop    %rax
jmp    1040 <perrordie@plt>
pop    %rax
ret

LLVM IR (-O0):
@EOF = global i64 0
@.str = [6 x i8] c"fputc\00"
define void @safe_fputc(i8 signext %0, i32* %1) {
%3 = alloca i8
%4 = alloca i32*
store i8 %0, i8* %3
store i32* %1, i32** %4
%5 = load i8, i8* %3
%6 = load i32*, i32** %4
%7 = call i64 @fputc(i8 signext %5, i32* %6)
%8 = load i64, i64* @EOF
%9 = icmp eq i64 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = call i32 @perrordie(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %10, %2
ret void
}

LLVM IR (-O2):
@EOF = global i64 0
@.str = [6 x i8] c"fputc\00"
define void @safe_fputc(i8 signext %0, i32* nocapture %1) {
%3 = tail call i64 @fputc(i8 signext %0, i32* %1)
%4 = load i64, i64* @EOF
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @perrordie(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ src;

/* Variables and functions */
int /*<<< orphan*/ isPrime(unsigned int);
unsigned int bdd_prime_lte(unsigned int src) {
  if ((!((src)&0x1)))
    --src;
  while (!isPrime(src))
    src -= 2;
  return src;
}


x86 assembly (clang, -O0):
<bdd_prime_lte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
jne    1133 <bdd_prime_lte+0x23>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    1138 <bdd_prime_lte+0x28>
mov    -0x4(%rbp),%edi
call   1030 <isPrime@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1155 <bdd_prime_lte+0x45>
jmp    1163 <bdd_prime_lte+0x53>
mov    -0x4(%rbp),%eax
sub    $0x2,%eax
mov    %eax,-0x4(%rbp)
jmp    1138 <bdd_prime_lte+0x28>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bdd_prime_lte>:
push   %rbx
mov    %edi,%eax
and    $0x1,%eax
lea    (%rdi,%rax,1),%ebx
add    $0x1,%ebx
nopl   0x0(%rax)
add    $0xfffffffe,%ebx
mov    %ebx,%edi
call   1030 <isPrime@plt>
test   %eax,%eax
je     1120 <bdd_prime_lte+0x10>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @bdd_prime_lte(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 1
%5 = icmp ne i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = add i32 %7, -1
store i32 %8, i32* %2
br label %9
9: ; preds = %6, %1
br label %10
10: ; preds = %15, %9
%11 = load i32, i32* %2
%12 = call i32 @isPrime(i32 %11)
%13 = icmp ne i32 %12, 0
%14 = xor i1 %13, true
br i1 %14, label %15, label %18
15: ; preds = %10
%16 = load i32, i32* %2
%17 = sub i32 %16, 2
store i32 %17, i32* %2
br label %10
18: ; preds = %10
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @bdd_prime_lte(i32 %0) {
%2 = and i32 %0, 1
%3 = add i32 %0, -1
%4 = add i32 %3, %2
br label %5
5: ; preds = %5, %1
%6 = phi i32 [ %4, %1 ], [ %9, %5 ]
%7 = tail call i32 @isPrime(i32 %6)
%8 = icmp eq i32 %7, 0
%9 = add i32 %6, -2
br i1 %8, label %5, label %10
10: ; preds = %5
ret i32 %6
}
void divide_l(int a, int b, int *quotient_p, int *remainder_p) {
  *quotient_p = a / b;
  *remainder_p = a % b;
}


x86 assembly (clang, -O0):
<divide_l>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    -0x18(%rbp),%rax
mov    %edx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<divide_l>:
mov    %rdx,%r8
mov    %edi,%eax
cltd
idiv   %esi
mov    %eax,(%r8)
mov    %edx,(%rcx)
ret

LLVM IR (-O0):
define void @divide_l(i32 %0, i32 %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = sdiv i32 %9, %10
%12 = load i32*, i32** %7
store i32 %11, i32* %12
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = srem i32 %13, %14
%16 = load i32*, i32** %8
store i32 %15, i32* %16
ret void
}

LLVM IR (-O2):
define void @divide_l(i32 %0, i32 %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3) {
%5 = sdiv i32 %0, %1
store i32 %5, i32* %2
%6 = srem i32 %0, %1
store i32 %6, i32* %3
ret void
}
const char *bar1() { return "abcdefghijklmnopqrstuvwxyz0123456789"; }


x86 assembly (clang, -O0):
<bar1>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar1>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [37 x i8] c"abcdefghijklmnopqrstuvwxyz0123456789\00"
define i8* @bar1() {
ret i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [37 x i8] c"abcdefghijklmnopqrstuvwxyz0123456789\00"
define i8* @bar1() {
ret i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0)
}