xunge/DecIR huggingface dataset:
void setservent(int stayopen) {
  anvil_syslog(0, "%s unimplemented\n", __FUNCTION__);
  while (1)
    ;
}


x86 assembly (clang, -O0):
<setservent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
lea    0xedc(%rip),%rsi
lea    0xee7(%rip),%rdx
mov    $0x0,%al
call   1030 <anvil_syslog@plt>
jmp    1132 <setservent+0x22>

x86 assembly (clang, -O2):
<setservent>:
push   %rax
lea    0xee8(%rip),%rsi
lea    0xef3(%rip),%rdx
xor    %edi,%edi
xor    %eax,%eax
call   1030 <anvil_syslog@plt>
nopl   0x0(%rax,%rax,1)
jmp    1130 <setservent+0x20>

LLVM IR (-O0):
@.str = [18 x i8] c"%s unimplemented\0A\00"
@__FUNCTION__.setservent = [11 x i8] c"setservent\00"
define void @setservent(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @__FUNCTION__.setservent, i64 0, i64 0))
br label %4
4: ; preds = %1, %4
br label %4
}

LLVM IR (-O2):
@.str = [18 x i8] c"%s unimplemented\0A\00"
@__FUNCTION__.setservent = [11 x i8] c"setservent\00"
define void @setservent(i32 %0) {
%2 = tail call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @__FUNCTION__.setservent, i64 0, i64 0))
br label %3
3: ; preds = %1, %3
br label %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void copyright() {
  printf("\n\tSimpleTask v.%1.1f (%s)\n", 1.4, "Mar 15 2022");
  printf("\t(c) 2011 by Stephan Laukien\n\n");
}


x86 assembly (clang, -O0):
<copyright>:
push   %rbp
mov    %rsp,%rbp
lea    0xeed(%rip),%rdi
movsd  0xedd(%rip),%xmm0
lea    0xef9(%rip),%rsi
mov    $0x1,%al
call   1030 <printf@plt>
lea    0xef7(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<copyright>:
push   %rax
lea    0xee0(%rip),%rdi
lea    0xef4(%rip),%rsi
movsd  0xec9(%rip),%xmm0
mov    $0x1,%al
call   1040 <printf@plt>
lea    0xeea(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"\0A\09SimpleTask v.%1.1f (%s)\0A\00"
@.str.1 = [12 x i8] c"Mar 15 2022\00"
@.str.2 = [31 x i8] c"\09(c) 2011 by Stephan Laukien\0A\0A\00"
define void @copyright() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), double 1.400000e+00, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"\0A\09SimpleTask v.%1.1f (%s)\0A\00"
@.str.1 = [12 x i8] c"Mar 15 2022\00"
@str = [30 x i8] c"\09(c) 2011 by Stephan Laukien\0A\00"
define void @copyright() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), double 1.400000e+00, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
size_t strlen(char const *);
scalar_t__ strncmp(char const *, char const *, size_t);
unsigned char startsWith(const char *prefix, const char *str) {
  size_t lenpre = strlen(prefix), lenstr = strlen(str);
  return lenstr < lenpre ? 0 : (strncmp(prefix, str, lenpre) == 0);
}


x86 assembly (clang, -O0):
<startsWith>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1162 <startsWith+0x42>
xor    %eax,%eax
mov    %eax,-0x24(%rbp)
jmp    1182 <startsWith+0x62>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
movzbl %al,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<startsWith>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1040 <strlen@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1040 <strlen@plt>
cmp    %rbx,%rax
jae    1144 <startsWith+0x24>
xor    %eax,%eax
jmp    1158 <startsWith+0x38>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
call   1030 <strncmp@plt>
test   %rax,%rax
sete   %al
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define zeroext i8 @startsWith(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = call i64 @strlen(i8* %7)
store i64 %8, i64* %5
%9 = load i8*, i8** %4
%10 = call i64 @strlen(i8* %9)
store i64 %10, i64* %6
%11 = load i64, i64* %6
%12 = load i64, i64* %5
%13 = icmp ult i64 %11, %12
br i1 %13, label %14, label %15
14: ; preds = %2
br label %22
15: ; preds = %2
%16 = load i8*, i8** %3
%17 = load i8*, i8** %4
%18 = load i64, i64* %5
%19 = call i64 @strncmp(i8* %16, i8* %17, i64 %18)
%20 = icmp eq i64 %19, 0
%21 = zext i1 %20 to i32
br label %22
22: ; preds = %15, %14
%23 = phi i32 [ 0, %14 ], [ %21, %15 ]
%24 = trunc i32 %23 to i8
ret i8 %24
}

LLVM IR (-O2):
define zeroext i8 @startsWith(i8* %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%5 = icmp ult i64 %4, %3
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = tail call i64 @strncmp(i8* %0, i8* %1, i64 %3)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i8
br label %10
10: ; preds = %2, %6
%11 = phi i8 [ %9, %6 ], [ 0, %2 ]
ret i8 %11
}
int count_spaces(const char *line) {
  int count = 0;
  char c;
  while ((c = *line++) != 0)
    count += c == ' ' || c == '\n';
  return count;
}


x86 assembly (clang, -O0):
<count_spaces>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
mov    (%rax),%al
mov    %al,-0xd(%rbp)
movsbl %al,%eax
cmp    $0x0,%eax
je     1161 <count_spaces+0x61>
movsbl -0xd(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0xe(%rbp)
je     114e <count_spaces+0x4e>
movsbl -0xd(%rbp),%eax
cmp    $0xa,%eax
sete   %al
mov    %al,-0xe(%rbp)
mov    -0xe(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    110f <count_spaces+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_spaces>:
mov    (%rdi),%cl
test   %cl,%cl
je     112f <count_spaces+0x2f>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
cmp    $0x20,%cl
sete   %dl
cmp    $0xa,%cl
sete   %cl
or     %dl,%cl
movzbl %cl,%ecx
add    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <count_spaces+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @count_spaces(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8
store i8* %0, i8** %2
store i32 0, i32* %3
br label %5
5: ; preds = %19, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
store i8 %8, i8* %4
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %24
11: ; preds = %5
%12 = load i8, i8* %4
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 32
br i1 %14, label %19, label %15
15: ; preds = %11
%16 = load i8, i8* %4
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 10
br label %19
19: ; preds = %15, %11
%20 = phi i1 [ true, %11 ], [ %18, %15 ]
%21 = zext i1 %20 to i32
%22 = load i32, i32* %3
%23 = add nsw i32 %22, %21
store i32 %23, i32* %3
br label %5
24: ; preds = %5
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @count_spaces(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %14, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = phi i32 [ %13, %4 ], [ 0, %1 ]
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = icmp eq i8 %5, 32
%10 = icmp eq i8 %5, 10
%11 = or i1 %9, %10
%12 = zext i1 %11 to i32
%13 = add nuw nsw i32 %7, %12
%14 = load i8, i8* %8
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %4
16: ; preds = %4, %1
%17 = phi i32 [ 0, %1 ], [ %13, %4 ]
ret i32 %17
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_greetings(void) { printf("Hello. This is an UNPATCHED version\n"); }


x86 assembly (clang, -O0):
<print_greetings>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_greetings>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"Hello. This is an UNPATCHED version\0A\00"
define void @print_greetings() {
%1 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [36 x i8] c"Hello. This is an UNPATCHED version\00"
define void @print_greetings() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ recv(int, void *, size_t, int);
ssize_t sys_recv(int fd, void *buffer, size_t length, int flags) {
  return recv(fd, buffer, length, flags);
}


x86 assembly (clang, -O0):
<sys_recv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <recv@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_recv>:
jmp    1030 <recv@plt>

LLVM IR (-O0):
define i32 @sys_recv(i32 %0, i8* %1, i64 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %7
%12 = load i32, i32* %8
%13 = call i32 @recv(i32 %9, i8* %10, i64 %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @sys_recv(i32 %0, i8* %1, i64 %2, i32 %3) {
%5 = tail call i32 @recv(i32 %0, i8* %1, i64 %2, i32 %3)
ret i32 %5
}
/* Type definitions */
typedef int SIGCHLD;

/* Variables and functions */
int /*<<< orphan*/ block_remote_children();
int /*<<< orphan*/ sigblock(int);
void block_children() {
  (void)sigblock((1 << ((SIGCHLD)-1)));
  block_remote_children();
}


x86 assembly (clang, -O0):
<block_children>:
push   %rbp
mov    %rsp,%rbp
call   1030 <sigblock@plt>
mov    $0x0,%al
call   1040 <block_remote_children@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<block_children>:
push   %rax
call   1030 <sigblock@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <block_remote_children@plt>

LLVM IR (-O0):
define void @block_children() {
%1 = call i32 @sigblock(i32 poison)
%2 = call i32 (...) @block_remote_children()
ret void
}

LLVM IR (-O2):
define void @block_children() {
%1 = tail call i32 @sigblock(i32 poison)
%2 = tail call i32 (...) @block_remote_children()
ret void
}
OP(dd, b1) { op_b1(); }


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <op_b1@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
xor    %eax,%eax
jmp    1030 <op_b1@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @op_b1()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @op_b1()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ HplMsp430GeneralIOP__20__IO__selectIOFunc();
void HplMsp430Usart0P__UTXD__selectIOFunc(void) {
  HplMsp430GeneralIOP__20__IO__selectIOFunc();
}


x86 assembly (clang, -O0):
<HplMsp430Usart0P__UTXD__selectIOFunc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMsp430GeneralIOP__20__IO__selectIOFunc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HplMsp430Usart0P__UTXD__selectIOFunc>:
xor    %eax,%eax
jmp    1030 <HplMsp430GeneralIOP__20__IO__selectIOFunc@plt>

LLVM IR (-O0):
define void @HplMsp430Usart0P__UTXD__selectIOFunc() {
%1 = call i32 (...) @HplMsp430GeneralIOP__20__IO__selectIOFunc()
ret void
}

LLVM IR (-O2):
define void @HplMsp430Usart0P__UTXD__selectIOFunc() {
%1 = tail call i32 (...) @HplMsp430GeneralIOP__20__IO__selectIOFunc()
ret void
}
void wait_for_debug(void) { __asm__ __volatile__("pause"); }


x86 assembly (clang, -O0):
<wait_for_debug>:
push   %rbp
mov    %rsp,%rbp
pause
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait_for_debug>:
pause
ret

LLVM IR (-O0):
define void @wait_for_debug() {
ret void
}

LLVM IR (-O2):
define void @wait_for_debug() {
tail call void asm sideeffect "pause", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int strlen(char *str) {
  char *s = str;
  if (!s)
    return -1;
  while (*s++)
    ;
  return (int)(s - str - 1);
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1127 <strlen+0x27>
movl   $0xffffffff,-0x4(%rbp)
jmp    115b <strlen+0x5b>
jmp    112c <strlen+0x2c>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
cmpb   $0x0,(%rax)
je     1149 <strlen+0x49>
jmp    112c <strlen+0x2c>
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
sub    $0x1,%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
mov    $0xffffffff,%eax
test   %rdi,%rdi
je     111c <strlen+0x1c>
nopw   0x0(%rax,%rax,1)
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <strlen+0x10>
ret

LLVM IR (-O0):
define i32 @strlen(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
store i8* %5, i8** %4
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %9, label %8
8: ; preds = %1
store i32 -1, i32* %2
br label %24
9: ; preds = %1
br label %10
10: ; preds = %15, %9
%11 = load i8*, i8** %4
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %4
%13 = load i8, i8* %11
%14 = icmp ne i8 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %10
br label %10
16: ; preds = %10
%17 = load i8*, i8** %4
%18 = load i8*, i8** %3
%19 = ptrtoint i8* %17 to i64
%20 = ptrtoint i8* %18 to i64
%21 = sub i64 %19, %20
%22 = sub nsw i64 %21, 1
%23 = trunc i64 %22 to i32
store i32 %23, i32* %2
br label %24
24: ; preds = %16, %8
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @strlen(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %14, label %3
3: ; preds = %1, %3
%4 = phi i8* [ %5, %3 ], [ %0, %1 ]
%5 = getelementptr inbounds i8, i8* %4, i64 1
%6 = load i8, i8* %4
%7 = icmp eq i8 %6, 0
br i1 %7, label %8, label %3
8: ; preds = %3
%9 = ptrtoint i8* %5 to i64
%10 = ptrtoint i8* %0 to i64
%11 = xor i64 %10, -1
%12 = add i64 %9, %11
%13 = trunc i64 %12 to i32
br label %14
14: ; preds = %1, %8
%15 = phi i32 [ %13, %8 ], [ -1, %1 ]
ret i32 %15
}
void w_crt_exit(int error_code) {
  asm("movl $1, %%eax\n\t"
      "movl %0, %%ebx\n\t"
      "int $0x80\n\t"
      "hlt\n\t" ::"m"(error_code));
}


x86 assembly (clang, -O0):
<w_crt_exit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
mov    -0x4(%rbp),%ebx
int    $0x80
hlt
pop    %rbp
ret

x86 assembly (clang, -O2):
<w_crt_exit>:
mov    %edi,-0x4(%rsp)
mov    $0x1,%eax
mov    -0x4(%rsp),%ebx
int    $0x80
hlt
ret

LLVM IR (-O0):
define void @w_crt_exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @w_crt_exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}
/* Variables and functions */
scalar_t__ RAND_MAX;
scalar_t__ rand();
double randomFloat() { return (double)rand() / (double)RAND_MAX; }


x86 assembly (clang, -O0):
<randomFloat>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ec1(%rip),%rax
cvtsi2sdq (%rax),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<randomFloat>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ec4(%rip),%rax
cvtsi2sdq (%rax),%xmm1
divsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define double @randomFloat() {
%1 = call i64 (...) @rand()
%2 = sitofp i64 %1 to double
%3 = load i64, i64* @RAND_MAX
%4 = sitofp i64 %3 to double
%5 = fdiv double %2, %4
ret double %5
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define double @randomFloat() {
%1 = tail call i64 (...) @rand()
%2 = sitofp i64 %1 to double
%3 = load i64, i64* @RAND_MAX
%4 = sitofp i64 %3 to double
%5 = fdiv double %2, %4
ret double %5
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int getc(int /*<<< orphan*/ *);
scalar_t__ isspace(int);
int getc_nospace(FILE *f) {
  int c;
  while (isspace(c = getc(f)))
    ;
  return c;
}


x86 assembly (clang, -O0):
<getc_nospace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <getc@plt>
mov    %eax,%edi
mov    %edi,-0xc(%rbp)
call   1030 <isspace@plt>
cmp    $0x0,%rax
je     114e <getc_nospace+0x2e>
jmp    112c <getc_nospace+0xc>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getc_nospace>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1040 <getc@plt>
mov    %eax,%ebp
mov    %eax,%edi
call   1030 <isspace@plt>
test   %rax,%rax
jne    1130 <getc_nospace+0x10>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @getc_nospace(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
br label %4
4: ; preds = %9, %1
%5 = load i32*, i32** %2
%6 = call i32 @getc(i32* %5)
store i32 %6, i32* %3
%7 = call i64 @isspace(i32 %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %4
br label %4
10: ; preds = %4
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @getc_nospace(i32* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 @getc(i32* %0)
%4 = tail call i64 @isspace(i32 %3)
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %2
6: ; preds = %2
ret i32 %3
}
int isupper(int c) { return ((c >= 'A') && (c <= 'Z')) ? 1 : 0; }


x86 assembly (clang, -O0):
<isupper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x41,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <isupper+0x20>
cmpl   $0x5a,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%dl
xor    %eax,%eax
mov    $0x1,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isupper>:
add    $0xffffffbf,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 65
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 90
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i64
%11 = select i1 %9, i32 1, i32 0
ret i32 %11
}

LLVM IR (-O2):
define i32 @isupper(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
int add(int i, int j) {
  int p = i + j;
  return p;
}


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @add(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = add nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @add(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_VALUE;
typedef int /*<<< orphan*/ ASN1_ITEM;

/* Variables and functions */
scalar_t__ ASN1_item_ex_new(int /*<<< orphan*/ **, int /*<<< orphan*/ const *);
ASN1_VALUE *ASN1_item_new(const ASN1_ITEM *it) {
  ASN1_VALUE *ret = NULL;
  if (ASN1_item_ex_new(&ret, it) > 0)
    return ret;
  return NULL;
}


x86 assembly (clang, -O0):
<ASN1_item_new>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdi
call   1030 <ASN1_item_ex_new@plt>
cmp    $0x0,%rax
jle    1148 <ASN1_item_new+0x38>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1150 <ASN1_item_new+0x40>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_item_new>:
push   %rax
mov    %rdi,%rsi
movq   $0x0,(%rsp)
mov    %rsp,%rdi
call   1030 <ASN1_item_ex_new@plt>
test   %rax,%rax
jle    112f <ASN1_item_new+0x1f>
mov    (%rsp),%rax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32* @ASN1_item_new(i32* %0) {
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* null, i32** %4
%5 = load i32*, i32** %3
%6 = call i64 @ASN1_item_ex_new(i32** %4, i32* %5)
%7 = icmp sgt i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i32*, i32** %4
store i32* %9, i32** %2
br label %11
10: ; preds = %1
store i32* null, i32** %2
br label %11
11: ; preds = %10, %8
%12 = load i32*, i32** %2
ret i32* %12
}

LLVM IR (-O2):
define i32* @ASN1_item_new(i32* %0) {
%2 = alloca i32*
%3 = bitcast i32** %2 to i8*
store i32* null, i32** %2
%4 = call i64 @ASN1_item_ex_new(i32** %2, i32* %0)
%5 = icmp sgt i64 %4, 0
%6 = load i32*, i32** %2
%7 = select i1 %5, i32* %6, i32* null
ret i32* %7
}
/* Variables and functions */
scalar_t__ strchr(char *, char);
int isdelim(char c) {
  if (strchr(" !;,+-<>'/*%^=()", c) || c == 9 || c == '\r' || c == 0)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isdelim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
lea    0xedb(%rip),%rdi
movsbl -0x5(%rbp),%esi
call   1030 <strchr@plt>
cmp    $0x0,%rax
jne    115f <isdelim+0x4f>
movsbl -0x5(%rbp),%eax
cmp    $0x9,%eax
je     115f <isdelim+0x4f>
movsbl -0x5(%rbp),%eax
cmp    $0xd,%eax
je     115f <isdelim+0x4f>
movsbl -0x5(%rbp),%eax
cmp    $0x0,%eax
jne    116b <isdelim+0x5b>
movl   $0x1,-0x4(%rbp)
jmp    1172 <isdelim+0x62>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isdelim>:
push   %rbx
mov    %edi,%ebx
lea    0xee6(%rip),%rdi
mov    %ebx,%esi
call   1030 <strchr@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1130 <isdelim+0x20>
pop    %rbx
ret
cmp    $0xd,%bl
ja     1143 <isdelim+0x33>
movzbl %bl,%ecx
mov    $0x2201,%edx
bt     %rcx,%rdx
jb     112e <isdelim+0x1e>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [17 x i8] c" !;,+-<>'/*%^=()\00"
define i32 @isdelim(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = call i64 @strchr(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8 signext %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %19, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 9
br i1 %10, label %19, label %11
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 13
br i1 %14, label %19, label %15
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %15, %11, %7, %1
store i32 1, i32* %2
br label %21
20: ; preds = %15
store i32 0, i32* %2
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
@.str = [17 x i8] c" !;,+-<>'/*%^=()\00"
define i32 @isdelim(i8 signext %0) {
%2 = tail call i64 @strchr(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8 signext %0)
%3 = freeze i64 %2
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
switch i8 %0, label %6 [
i8 13, label %7
i8 9, label %7
i8 0, label %7
]
6: ; preds = %5
br label %7
7: ; preds = %1, %5, %5, %5, %6
%8 = phi i32 [ 0, %6 ], [ 1, %5 ], [ 1, %5 ], [ 1, %5 ], [ 1, %1 ]
ret i32 %8
}
/* Type definitions */
struct katcp_dispatch {
  int dummy;
};
struct katcp_acquire {
  int dummy;
};

/* Variables and functions */
int run_acquire_katcp(struct katcp_dispatch *, struct katcp_acquire *,
                      int /*<<< orphan*/);
int run_timer_acquire_katcp(struct katcp_dispatch *d, void *data) {
  struct katcp_acquire *a;
  a = data;
  if (a == NULL) {
    return -1;
  }
  return run_acquire_katcp(d, a, 0);
}


x86 assembly (clang, -O0):
<run_timer_acquire_katcp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    113f <run_timer_acquire_katcp+0x2f>
movl   $0xffffffff,-0x4(%rbp)
jmp    1151 <run_timer_acquire_katcp+0x41>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
xor    %edx,%edx
call   1030 <run_acquire_katcp@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<run_timer_acquire_katcp>:
test   %rsi,%rsi
je     111c <run_timer_acquire_katcp+0xc>
xor    %edx,%edx
jmp    1030 <run_acquire_katcp@plt>
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.katcp_dispatch = type { i32 }
%struct.katcp_acquire = type { i32 }
define i32 @run_timer_acquire_katcp(%struct.katcp_dispatch* %0, i8* %1) {
%3 = alloca i32
%4 = alloca %struct.katcp_dispatch*
%5 = alloca i8*
%6 = alloca %struct.katcp_acquire*
store %struct.katcp_dispatch* %0, %struct.katcp_dispatch** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %5
%8 = bitcast i8* %7 to %struct.katcp_acquire*
store %struct.katcp_acquire* %8, %struct.katcp_acquire** %6
%9 = load %struct.katcp_acquire*, %struct.katcp_acquire** %6
%10 = icmp eq %struct.katcp_acquire* %9, null
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 -1, i32* %3
br label %16
12: ; preds = %2
%13 = load %struct.katcp_dispatch*, %struct.katcp_dispatch** %4
%14 = load %struct.katcp_acquire*, %struct.katcp_acquire** %6
%15 = call i32 @run_acquire_katcp(%struct.katcp_dispatch* %13, %struct.katcp_acquire* %14, i32 0)
store i32 %15, i32* %3
br label %16
16: ; preds = %12, %11
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
%struct.katcp_dispatch = type { i32 }
%struct.katcp_acquire = type { i32 }
define i32 @run_timer_acquire_katcp(%struct.katcp_dispatch* %0, i8* %1) {
%3 = icmp eq i8* %1, null
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = bitcast i8* %1 to %struct.katcp_acquire*
%6 = tail call i32 @run_acquire_katcp(%struct.katcp_dispatch* %0, %struct.katcp_acquire* %5, i32 0)
br label %7
7: ; preds = %2, %4
%8 = phi i32 [ %6, %4 ], [ -1, %2 ]
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ little_endian_read_16(int /*<<< orphan*/ const *, int);
uint16_t l2cap_event_channel_opened_get_remote_mtu(const uint8_t *event) {
  return little_endian_read_16(event, 19);
}


x86 assembly (clang, -O0):
<l2cap_event_channel_opened_get_remote_mtu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x13,%esi
call   1030 <little_endian_read_16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<l2cap_event_channel_opened_get_remote_mtu>:
mov    $0x13,%esi
jmp    1030 <little_endian_read_16@plt>

LLVM IR (-O0):
define i32 @l2cap_event_channel_opened_get_remote_mtu(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @little_endian_read_16(i32* %3, i32 19)
ret i32 %4
}

LLVM IR (-O2):
define i32 @l2cap_event_channel_opened_get_remote_mtu(i32* %0) {
%2 = tail call i32 @little_endian_read_16(i32* %0, i32 19)
ret i32 %2
}
void test18_Atmega328p_targetInit__I() {}


x86 assembly (clang, -O0):
<test18_Atmega328p_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test18_Atmega328p_targetInit__I>:
ret

LLVM IR (-O0):
define void @test18_Atmega328p_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test18_Atmega328p_targetInit__I() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GL_ALPHA_TEST;
int /*<<< orphan*/ GL_BLEND;
int /*<<< orphan*/ GL_TEXTURE_2D;
int /*<<< orphan*/ glColor3f(double, double, double);
int /*<<< orphan*/ glDisable(int /*<<< orphan*/);
int /*<<< orphan*/ glRectf(double, double, double, double);
void cubeSide(void) {
  glDisable(GL_TEXTURE_2D);
  glDisable(GL_BLEND);
  glDisable(GL_ALPHA_TEST);
  glColor3f(0.3, 0.7, 0.3);
  glRectf(-1.0, -1.0, 1.0, 1.0);
}


x86 assembly (clang, -O0):
<cubeSide>:
push   %rbp
mov    %rsp,%rbp
mov    0x2e95(%rip),%rax
mov    (%rax),%edi
call   1050 <glDisable@plt>
mov    0x2e9f(%rip),%rax
mov    (%rax),%edi
call   1050 <glDisable@plt>
mov    0x2e89(%rip),%rax
mov    (%rax),%edi
call   1050 <glDisable@plt>
movsd  0xeaa(%rip),%xmm2
movsd  0xeaa(%rip),%xmm1
movaps %xmm2,%xmm0
call   1040 <glColor3f@plt>
movsd  0xe82(%rip),%xmm1
movsd  0xe82(%rip),%xmm3
movaps %xmm1,%xmm0
movaps %xmm3,%xmm2
call   1030 <glRectf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cubeSide>:
push   %rax
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1050 <glDisable@plt>
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
call   1050 <glDisable@plt>
mov    0x2e8c(%rip),%rax
mov    (%rax),%edi
call   1050 <glDisable@plt>
movsd  0xe9d(%rip),%xmm1
movsd  0xe9d(%rip),%xmm0
movaps %xmm0,%xmm2
call   1040 <glColor3f@plt>
movsd  0xe95(%rip),%xmm0
movsd  0xe95(%rip),%xmm2
movaps %xmm0,%xmm1
movaps %xmm2,%xmm3
pop    %rax
jmp    1030 <glRectf@plt>

LLVM IR (-O0):
@GL_TEXTURE_2D = global i32 0
@GL_BLEND = global i32 0
@GL_ALPHA_TEST = global i32 0
define void @cubeSide() {
%1 = load i32, i32* @GL_TEXTURE_2D
%2 = call i32 @glDisable(i32 %1)
%3 = load i32, i32* @GL_BLEND
%4 = call i32 @glDisable(i32 %3)
%5 = load i32, i32* @GL_ALPHA_TEST
%6 = call i32 @glDisable(i32 %5)
%7 = call i32 @glColor3f(double 3.000000e-01, double 0x3FE6666666666666, double 3.000000e-01)
%8 = call i32 @glRectf(double -1.000000e+00, double -1.000000e+00, double 1.000000e+00, double 1.000000e+00)
ret void
}

LLVM IR (-O2):
@GL_TEXTURE_2D = global i32 0
@GL_BLEND = global i32 0
@GL_ALPHA_TEST = global i32 0
define void @cubeSide() {
%1 = load i32, i32* @GL_TEXTURE_2D
%2 = tail call i32 @glDisable(i32 %1)
%3 = load i32, i32* @GL_BLEND
%4 = tail call i32 @glDisable(i32 %3)
%5 = load i32, i32* @GL_ALPHA_TEST
%6 = tail call i32 @glDisable(i32 %5)
%7 = tail call i32 @glColor3f(double 3.000000e-01, double 0x3FE6666666666666, double 3.000000e-01)
%8 = tail call i32 @glRectf(double -1.000000e+00, double -1.000000e+00, double 1.000000e+00, double 1.000000e+00)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ counting_sort_test();
int main() {
  counting_sort_test();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <counting_sort_test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <counting_sort_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @counting_sort_test()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @counting_sort_test()
ret i32 0
}
/* Variables and functions */
scalar_t__ toupper(char);
char gs_cucase(char c) { return (char)toupper(c); }


x86 assembly (clang, -O0):
<gs_cucase>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <toupper@plt>
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gs_cucase>:
push   %rax
call   1030 <toupper@plt>
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @gs_cucase(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @toupper(i8 signext %3)
%5 = trunc i64 %4 to i8
ret i8 %5
}

LLVM IR (-O2):
define signext i8 @gs_cucase(i8 signext %0) {
%2 = tail call i64 @toupper(i8 signext %0)
%3 = trunc i64 %2 to i8
ret i8 %3
}
void foo807() {}


x86 assembly (clang, -O0):
<foo807>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo807>:
ret

LLVM IR (-O0):
define void @foo807() {
ret void
}

LLVM IR (-O2):
define void @foo807() {
ret void
}
char *f2(int a, int b, char c) { return (0); }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @f2(i32 %0, i32 %1, i8 signext %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8 %2, i8* %6
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @f2(i32 %0, i32 %1, i8 signext %2) {
ret i8* null
}
int getopt(int argc, char *const argv[], const char *optstring) {
  char s = *optstring;
  s = argv[0][0];
  return s;
}


x86 assembly (clang, -O0):
<getopt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x19(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%al
mov    %al,-0x19(%rbp)
movsbl -0x19(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getopt>:
mov    (%rsi),%rax
movsbl (%rax),%eax
ret

LLVM IR (-O0):
define i32 @getopt(i32 %0, i8** %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
%7 = alloca i8
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* %2, i8** %6
%8 = load i8*, i8** %6
%9 = load i8, i8* %8
store i8 %9, i8* %7
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 0
%12 = load i8*, i8** %11
%13 = getelementptr inbounds i8, i8* %12, i64 0
%14 = load i8, i8* %13
store i8 %14, i8* %7
%15 = load i8, i8* %7
%16 = sext i8 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @getopt(i32 %0, i8** nocapture %1, i8* nocapture readnone %2) {
%4 = load i8*, i8** %1
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
ret i32 %6
}
regx0adr1(r0, r1, x0, x1, p0, p1) double r0, r1;
double *p0, *p1;
{
  if ((p0[x0]) <= (*((double *)11111111)))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<regx0adr1>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
mov    %edi,-0x1c(%rbp)
mov    %esi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
mov    -0x28(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm1
mov    $0xa98ac7,%eax
movsd  (%rax),%xmm0
ucomisd %xmm1,%xmm0
jb     1148 <regx0adr1+0x48>
movl   $0x1,-0x4(%rbp)
jmp    114f <regx0adr1+0x4f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<regx0adr1>:
movslq %edi,%rcx
movsd  0xa98ac7,%xmm0
xor    %eax,%eax
ucomisd (%rdx,%rcx,8),%xmm0
setae  %al
ret

LLVM IR (-O0):
define i32 @regx0adr1(double %0, double %1, i32 %2, i32 %3, double* %4, double* %5) {
%7 = alloca i32
%8 = alloca double
%9 = alloca double
%10 = alloca i32
%11 = alloca i32
%12 = alloca double*
%13 = alloca double*
store double %0, double* %8
store double %1, double* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store double* %4, double** %12
store double* %5, double** %13
%14 = load double*, double** %12
%15 = load i32, i32* %10
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds double, double* %14, i64 %16
%18 = load double, double* %17
%19 = load double, double* inttoptr (i64 11111111 to double*)
%20 = fcmp ole double %18, %19
br i1 %20, label %21, label %22
21: ; preds = %6
store i32 1, i32* %7
br label %23
22: ; preds = %6
store i32 0, i32* %7
br label %23
23: ; preds = %22, %21
%24 = load i32, i32* %7
ret i32 %24
}

LLVM IR (-O2):
define i32 @regx0adr1(double %0, double %1, i32 %2, i32 %3, double* nocapture %4, double* nocapture readnone %5) {
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds double, double* %4, i64 %7
%9 = load double, double* %8
%10 = load double, double* inttoptr (i64 11111111 to double*)
%11 = fcmp ole double %9, %10
%12 = zext i1 %11 to i32
ret i32 %12
}
void flip_replace(void) {}


x86 assembly (clang, -O0):
<flip_replace>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flip_replace>:
ret

LLVM IR (-O0):
define void @flip_replace() {
ret void
}

LLVM IR (-O2):
define void @flip_replace() {
ret void
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int celcon_append_lifted_point(int n, int i, double *point) {
  int fail;
  fail = _ada_use_c2phc(92, &i, &n, point);
  return fail;
}


x86 assembly (clang, -O0):
<celcon_append_lifted_point>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    $0x5c,%edi
lea    -0x8(%rbp),%rsi
lea    -0x4(%rbp),%rdx
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<celcon_append_lifted_point>:
push   %rax
mov    %rdx,%rcx
mov    %edi,0x4(%rsp)
mov    %esi,(%rsp)
mov    %rsp,%rsi
lea    0x4(%rsp),%rdx
mov    $0x5c,%edi
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @celcon_append_lifted_point(i32 %0, i32 %1, double* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca double*
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store double* %2, double** %6
%8 = load double*, double** %6
%9 = call i32 @_ada_use_c2phc(i32 92, i32* %5, i32* %4, double* %8)
store i32 %9, i32* %7
%10 = load i32, i32* %7
ret i32 %10
}

LLVM IR (-O2):
define i32 @celcon_append_lifted_point(i32 %0, i32 %1, double* %2) {
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 @_ada_use_c2phc(i32 92, i32* %5, i32* %4, double* %2)
ret i32 %6
}
int f(int x) { return 12; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xc,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0xc,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 12
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
ret i32 12
}
/* Type definitions */
typedef int /*<<< orphan*/ RSA;

/* Variables and functions */
int /*<<< orphan*/ *ASN1_item_dup(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ RSAPrivateKey_it;
RSA *RSAPrivateKey_dup(RSA *rsa) {
  return ASN1_item_dup(&RSAPrivateKey_it, rsa);
}


x86 assembly (clang, -O0):
<RSAPrivateKey_dup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    0x2eb9(%rip),%rdi
call   1030 <ASN1_item_dup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RSAPrivateKey_dup>:
mov    %rdi,%rsi
mov    0x2ec6(%rip),%rdi
jmp    1030 <ASN1_item_dup@plt>

LLVM IR (-O0):
@RSAPrivateKey_it = global i32 0
define i32* @RSAPrivateKey_dup(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32* @ASN1_item_dup(i32* @RSAPrivateKey_it, i32* %3)
ret i32* %4
}

LLVM IR (-O2):
@RSAPrivateKey_it = global i32 0
define i32* @RSAPrivateKey_dup(i32* %0) {
%2 = tail call i32* @ASN1_item_dup(i32* @RSAPrivateKey_it, i32* %0)
ret i32* %2
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void MPUEnable(uint32_t ui32MPUConfig) {

  ;
  (*((volatile uint32_t *)(0xE000ED94))) = ui32MPUConfig | 0x00000001;
}


x86 assembly (clang, -O0):
<MPUEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
or     $0x1,%ecx
mov    $0xe000ed94,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<MPUEnable>:
or     $0x1,%edi
mov    $0xe000ed94,%eax
mov    %edi,(%rax)
ret

LLVM IR (-O0):
define void @MPUEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = or i32 %3, 1
store volatile i32 %4, i32* inttoptr (i64 3758157204 to i32*)
ret void
}

LLVM IR (-O2):
define void @MPUEnable(i32 %0) {
%2 = or i32 %0, 1
store volatile i32 %2, i32* inttoptr (i64 3758157204 to i32*)
ret void
}
int g_is_lower_f_2(float s, float d) { return (s < d); }


x86 assembly (clang, -O0):
<g_is_lower_f_2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_is_lower_f_2>:
xor    %eax,%eax
ucomiss %xmm0,%xmm1
seta   %al
ret

LLVM IR (-O0):
define i32 @g_is_lower_f_2(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp olt float %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @g_is_lower_f_2(float %0, float %1) {
%3 = fcmp olt float %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
isassign(sym) {
  return (sym == 259 || sym == 301 || sym == 346 || sym == 328 || sym == 311 ||
          sym == 326 || sym == 335);
}


x86 assembly (clang, -O0):
<isassign>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x103,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1180 <isassign+0x80>
mov    $0x1,%al
cmpl   $0x12d,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1180 <isassign+0x80>
mov    $0x1,%al
cmpl   $0x15a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1180 <isassign+0x80>
mov    $0x1,%al
cmpl   $0x148,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1180 <isassign+0x80>
mov    $0x1,%al
cmpl   $0x137,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1180 <isassign+0x80>
mov    $0x1,%al
cmpl   $0x146,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1180 <isassign+0x80>
cmpl   $0x14f,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isassign>:
mov    $0x1,%eax
lea    -0x12d(%rdi),%ecx
cmp    $0x2d,%ecx
ja     1121 <isassign+0x21>
movabs $0x20000a000401,%rdx
bt     %rcx,%rdx
jae    1121 <isassign+0x21>
ret
cmp    $0x103,%edi
je     1120 <isassign+0x20>
xor    %eax,%eax
cmp    $0x14f,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @isassign(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 259
br i1 %4, label %23, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 301
br i1 %7, label %23, label %8
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 346
br i1 %10, label %23, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 328
br i1 %13, label %23, label %14
14: ; preds = %11
%15 = load i32, i32* %2
%16 = icmp eq i32 %15, 311
br i1 %16, label %23, label %17
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp eq i32 %18, 326
br i1 %19, label %23, label %20
20: ; preds = %17
%21 = load i32, i32* %2
%22 = icmp eq i32 %21, 335
br label %23
23: ; preds = %20, %17, %14, %11, %8, %5, %1
%24 = phi i1 [ true, %17 ], [ true, %14 ], [ true, %11 ], [ true, %8 ], [ true, %5 ], [ true, %1 ], [ %22, %20 ]
%25 = zext i1 %24 to i32
ret i32 %25
}

LLVM IR (-O2):
define i32 @isassign(i32 %0) {
switch i32 %0, label %2 [
i32 346, label %5
i32 328, label %5
i32 326, label %5
i32 311, label %5
i32 301, label %5
i32 259, label %5
]
2: ; preds = %1
%3 = icmp eq i32 %0, 335
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
int fb_ConsoleViewEx(int, int, int);
int fb_ConsoleView(int toprow, int botrow) {
  return fb_ConsoleViewEx(toprow, botrow, 1);
}


x86 assembly (clang, -O0):
<fb_ConsoleView>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x1,%edx
call   1030 <fb_ConsoleViewEx@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb_ConsoleView>:
mov    $0x1,%edx
jmp    1030 <fb_ConsoleViewEx@plt>

LLVM IR (-O0):
define i32 @fb_ConsoleView(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @fb_ConsoleViewEx(i32 %5, i32 %6, i32 1)
ret i32 %7
}

LLVM IR (-O2):
define i32 @fb_ConsoleView(i32 %0, i32 %1) {
%3 = tail call i32 @fb_ConsoleViewEx(i32 %0, i32 %1, i32 1)
ret i32 %3
}
/* Type definitions */
struct BitMatrix {
  int dummy;
};

/* Variables and functions */
struct BitMatrix *BitMatrixMulMatrix(struct BitMatrix *, struct BitMatrix *);
int /*<<< orphan*/ BitMatrixSet(struct BitMatrix *, int, int /*<<< orphan*/,
                                int);
struct BitMatrix *newBitMatrixIdentity(int);
int main(void) {
  struct BitMatrix *mat1 = newBitMatrixIdentity(2);
  struct BitMatrix *eye = newBitMatrixIdentity(2);
  BitMatrixSet(mat1, 1, 0, 1);
  struct BitMatrix *out = BitMatrixMulMatrix(mat1, eye);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x2,%edi
call   1050 <newBitMatrixIdentity@plt>
mov    %rax,-0x10(%rbp)
mov    $0x2,%edi
call   1050 <newBitMatrixIdentity@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x1,%ecx
xor    %edx,%edx
mov    %ecx,%esi
call   1030 <BitMatrixSet@plt>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <BitMatrixMulMatrix@plt>
mov    %rax,-0x20(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    $0x2,%edi
call   1050 <newBitMatrixIdentity@plt>
mov    %rax,%rbx
mov    $0x2,%edi
call   1050 <newBitMatrixIdentity@plt>
mov    %rax,%r14
mov    %rbx,%rdi
mov    $0x1,%esi
xor    %edx,%edx
mov    $0x1,%ecx
call   1030 <BitMatrixSet@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <BitMatrixMulMatrix@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.BitMatrix = type { i32 }
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.BitMatrix*
%3 = alloca %struct.BitMatrix*
%4 = alloca %struct.BitMatrix*
store i32 0, i32* %1
%5 = call %struct.BitMatrix* @newBitMatrixIdentity(i32 2)
store %struct.BitMatrix* %5, %struct.BitMatrix** %2
%6 = call %struct.BitMatrix* @newBitMatrixIdentity(i32 2)
store %struct.BitMatrix* %6, %struct.BitMatrix** %3
%7 = load %struct.BitMatrix*, %struct.BitMatrix** %2
%8 = call i32 @BitMatrixSet(%struct.BitMatrix* %7, i32 1, i32 0, i32 1)
%9 = load %struct.BitMatrix*, %struct.BitMatrix** %2
%10 = load %struct.BitMatrix*, %struct.BitMatrix** %3
%11 = call %struct.BitMatrix* @BitMatrixMulMatrix(%struct.BitMatrix* %9, %struct.BitMatrix* %10)
store %struct.BitMatrix* %11, %struct.BitMatrix** %4
ret i32 0
}

LLVM IR (-O2):
%struct.BitMatrix = type { i32 }
define i32 @main() {
%1 = tail call %struct.BitMatrix* @newBitMatrixIdentity(i32 2)
%2 = tail call %struct.BitMatrix* @newBitMatrixIdentity(i32 2)
%3 = tail call i32 @BitMatrixSet(%struct.BitMatrix* %1, i32 1, i32 0, i32 1)
%4 = tail call %struct.BitMatrix* @BitMatrixMulMatrix(%struct.BitMatrix* %1, %struct.BitMatrix* %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_client_conf_from_x11() {
  printf("NOT IMPLEMENTED:"
         "pa_client_conf_from_x11"
         "\n");
}


x86 assembly (clang, -O0):
<pa_client_conf_from_x11>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_client_conf_from_x11>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [41 x i8] c"NOT IMPLEMENTED:pa_client_conf_from_x11\0A\00"
define i32 @pa_client_conf_from_x11() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [40 x i8] c"NOT IMPLEMENTED:pa_client_conf_from_x11\00"
define i32 @pa_client_conf_from_x11() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([40 x i8], [40 x i8]* @str, i64 0, i64 0))
ret i32 undef
}