xunge/DecIR huggingface dataset:
void SPI_LEDS_TX_ISR(void) {}


x86 assembly (clang, -O0):
<SPI_LEDS_TX_ISR>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPI_LEDS_TX_ISR>:
ret

LLVM IR (-O0):
define void @SPI_LEDS_TX_ISR() {
ret void
}

LLVM IR (-O2):
define void @SPI_LEDS_TX_ISR() {
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void USBHostSuspend(uint32_t ui32Base) {
  ;
  (*((volatile unsigned char *)(ui32Base + 0x00000001))) |= 0x00000002;
}


x86 assembly (clang, -O0):
<USBHostSuspend>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x1(%rax),%cl
movzbl %cl,%ecx
or     $0x2,%ecx
mov    %cl,0x1(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBHostSuspend>:
orb    $0x2,0x1(%rdi)
ret

LLVM IR (-O0):
define void @USBHostSuspend(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 1
%5 = inttoptr i64 %4 to i8*
%6 = load volatile i8, i8* %5
%7 = zext i8 %6 to i32
%8 = or i32 %7, 2
%9 = trunc i32 %8 to i8
store volatile i8 %9, i8* %5
ret void
}

LLVM IR (-O2):
define void @USBHostSuspend(i64 %0) {
%2 = add nsw i64 %0, 1
%3 = inttoptr i64 %2 to i8*
%4 = load volatile i8, i8* %3
%5 = or i8 %4, 2
store volatile i8 %5, i8* %3
ret void
}
int do_097() { return 97; }


x86 assembly (clang, -O0):
<do_097>:
push   %rbp
mov    %rsp,%rbp
mov    $0x61,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_097>:
mov    $0x61,%eax
ret

LLVM IR (-O0):
define i32 @do_097() {
ret i32 97
}

LLVM IR (-O2):
define i32 @do_097() {
ret i32 97
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
uint16_t brev16(uint16_t in) {
  uint16_t res = 0;
  for (int i = 0x8000, j = 0x0001; i != 0; i >>= 1, j <<= 1)
    if (i & in)
      res |= j;
  return res;
}


x86 assembly (clang, -O0):
<brev16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x8000,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     115a <brev16+0x5a>
mov    -0xc(%rbp),%eax
and    -0x4(%rbp),%eax
cmp    $0x0,%eax
je     113e <brev16+0x3e>
mov    -0x10(%rbp),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1143 <brev16+0x43>
mov    -0xc(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    111c <brev16+0x1c>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<brev16>:
rol    $0x8,%di
mov    %edi,%eax
and    $0xf0f,%eax
shl    $0x4,%eax
shr    $0x4,%edi
and    $0xf0f,%edi
or     %eax,%edi
mov    %edi,%eax
and    $0x3333,%eax
shr    $0x2,%edi
and    $0x3333,%edi
lea    (%rdi,%rax,4),%eax
mov    %eax,%ecx
and    $0x5555,%ecx
shr    %eax
and    $0x5555,%eax
lea    (%rax,%rcx,2),%eax
ret

LLVM IR (-O0):
define i32 @brev16(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 32768, i32* %4
store i32 1, i32* %5
br label %6
6: ; preds = %19, %1
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %24
9: ; preds = %6
%10 = load i32, i32* %4
%11 = load i32, i32* %2
%12 = and i32 %10, %11
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %9
%15 = load i32, i32* %5
%16 = load i32, i32* %3
%17 = or i32 %16, %15
store i32 %17, i32* %3
br label %18
18: ; preds = %14, %9
br label %19
19: ; preds = %18
%20 = load i32, i32* %4
%21 = ashr i32 %20, 1
store i32 %21, i32* %4
%22 = load i32, i32* %5
%23 = shl i32 %22, 1
store i32 %23, i32* %5
br label %6
24: ; preds = %6
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @brev16(i32 %0) {
%2 = trunc i32 %0 to i16
%3 = call i16 @llvm.bitreverse.i16(i16 %2)
%4 = zext i16 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
int main() {
  char myRandomChar = 'x';
  printf("%c\n", myRandomChar);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movb   $0x78,-0x5(%rbp)
lea    0xed6(%rip),%rdi
movsbl -0x5(%rbp),%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x78,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%c\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
store i8 120, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 signext %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%c\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 signext 120)
ret i32 0
}
int test_imm_D3uint16_reg(unsigned short val) {
  return ((val) & (-0xD3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D3uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff2d,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D3uint16_reg>:
test   $0xff2d,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D3uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -211
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D3uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -211
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ delay_10us(int);
void delay_sec(int mydelay) {
  int index1;
  for (index1 = 0; index1 < mydelay; index1++) {
    delay_10us(99999);
  }
}


x86 assembly (clang, -O0):
<delay_sec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1146 <delay_sec+0x36>
mov    $0x1869f,%edi
call   1030 <delay_10us@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <delay_sec+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay_sec>:
push   %rbx
test   %edi,%edi
jle    112f <delay_sec+0x1f>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0x1869f,%edi
call   1030 <delay_10us@plt>
add    $0xffffffff,%ebx
jne    1120 <delay_sec+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @delay_sec(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = call i32 @delay_10us(i32 99999)
br label %10
10: ; preds = %8
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @delay_sec(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = tail call i32 @delay_10us(i32 99999)
%6 = add nuw nsw i32 %4, 1
%7 = icmp eq i32 %6, %0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _I8080_LHLD();
void do0x2A() { _I8080_LHLD(); }


x86 assembly (clang, -O0):
<do0x2A>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_I8080_LHLD@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<do0x2A>:
xor    %eax,%eax
jmp    1030 <_I8080_LHLD@plt>

LLVM IR (-O0):
define void @do0x2A() {
%1 = call i32 (...) @_I8080_LHLD()
ret void
}

LLVM IR (-O2):
define void @do0x2A() {
%1 = tail call i32 (...) @_I8080_LHLD()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void opencl_error(const char *errinfo, const void *private_info, size_t cb,
                  void *user_data) {
  fprintf(stderr, "OpenCL Error: %s\n", errinfo);
}


x86 assembly (clang, -O0):
<opencl_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec4(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<opencl_error>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [18 x i8] c"OpenCL Error: %s\0A\00"
define void @opencl_error(i8* %0, i8* %1, i64 %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i8* %3, i8** %8
%9 = load i32, i32* @stderr
%10 = load i8*, i8** %5
%11 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %10)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [18 x i8] c"OpenCL Error: %s\0A\00"
define void @opencl_error(i8* %0, i8* nocapture readnone %1, i64 %2, i8* nocapture readnone %3) {
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t z80_cb_f0_set_6(uint8_t value) { return value | 0x40; }


x86 assembly (clang, -O0):
<z80_cb_f0_set_6>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
or     $0x40,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<z80_cb_f0_set_6>:
mov    %edi,%eax
or     $0x40,%eax
ret

LLVM IR (-O0):
define i32 @z80_cb_f0_set_6(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = or i32 %3, 64
ret i32 %4
}

LLVM IR (-O2):
define i32 @z80_cb_f0_set_6(i32 %0) {
%2 = or i32 %0, 64
ret i32 %2
}
const double resonanceToQ(const double resonance) {
  return 1.0 / (2.0 * (1.0 - resonance));
}


x86 assembly (clang, -O0):
<resonanceToQ>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
subsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
mulsd  %xmm0,%xmm1
movsd  0xed6(%rip),%xmm0
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<resonanceToQ>:
movsd  0xef8(%rip),%xmm1
movapd %xmm1,%xmm2
subsd  %xmm0,%xmm2
addsd  %xmm2,%xmm2
divsd  %xmm2,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @resonanceToQ(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fsub double 1.000000e+00, %3
%5 = fmul double 2.000000e+00, %4
%6 = fdiv double 1.000000e+00, %5
ret double %6
}

LLVM IR (-O2):
define double @resonanceToQ(double %0) {
%2 = fsub double 1.000000e+00, %0
%3 = fmul double %2, 2.000000e+00
%4 = fdiv double 1.000000e+00, %3
ret double %4
}
int bld_dbl_op(int op, int bytemod, int as, int src, int ad, int dst) {
  int r;
  r = op | (bytemod << 6) | (as << 4) | (src << 8) | (as << 7) | dst;
  return r;
}


x86 assembly (clang, -O0):
<bld_dbl_op>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    $0x6,%ecx
or     %ecx,%eax
mov    -0xc(%rbp),%ecx
shl    $0x4,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0xc(%rbp),%ecx
shl    $0x7,%ecx
or     %ecx,%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bld_dbl_op>:
shl    $0x6,%esi
or     %edi,%esi
mov    %edx,%eax
shl    $0x4,%eax
shl    $0x8,%ecx
shl    $0x7,%edx
or     %edx,%eax
or     %esi,%eax
or     %r9d,%ecx
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @bld_dbl_op(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%14 = load i32, i32* %7
%15 = load i32, i32* %8
%16 = shl i32 %15, 6
%17 = or i32 %14, %16
%18 = load i32, i32* %9
%19 = shl i32 %18, 4
%20 = or i32 %17, %19
%21 = load i32, i32* %10
%22 = shl i32 %21, 8
%23 = or i32 %20, %22
%24 = load i32, i32* %9
%25 = shl i32 %24, 7
%26 = or i32 %23, %25
%27 = load i32, i32* %12
%28 = or i32 %26, %27
store i32 %28, i32* %13
%29 = load i32, i32* %13
ret i32 %29
}

LLVM IR (-O2):
define i32 @bld_dbl_op(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = shl i32 %1, 6
%8 = or i32 %7, %0
%9 = shl i32 %2, 4
%10 = or i32 %8, %9
%11 = shl i32 %3, 8
%12 = shl i32 %2, 7
%13 = or i32 %10, %12
%14 = or i32 %13, %11
%15 = or i32 %14, %5
ret i32 %15
}
/* Variables and functions */
#define EACCES 135
#define EDQUOT 134
#define EEXIST 133
#define EINVAL 132
#define ENOENT 131
#define ENOTDIR 130
#define ENOTEMPTY 129
#define EPERM 128
int parseErrno(int errorNumber) {
  switch (errorNumber) {
  case ENOENT:
  case ENOTDIR:
  case EINVAL:
    return 400;
  case EEXIST:
    return 405;
  case ENOTEMPTY:
    return 402;
  case EACCES:
  case EPERM:
  case EDQUOT:
    return 401;
  default:
    return 410;
  }
}


x86 assembly (clang, -O0):
<parseErrno>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffff80,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x7,%eax
ja     1160 <parseErrno+0x60>
mov    -0x10(%rbp),%rax
lea    0xed9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x190,-0x4(%rbp)
jmp    1167 <parseErrno+0x67>
movl   $0x195,-0x4(%rbp)
jmp    1167 <parseErrno+0x67>
movl   $0x192,-0x4(%rbp)
jmp    1167 <parseErrno+0x67>
movl   $0x191,-0x4(%rbp)
jmp    1167 <parseErrno+0x67>
movl   $0x19a,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parseErrno>:
add    $0xffffff80,%edi
mov    $0x19a,%eax
cmp    $0x7,%edi
ja     111a <parseErrno+0x1a>
movslq %edi,%rax
lea    0xee9(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @parseErrno(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 131, label %5
i32 130, label %5
i32 132, label %5
i32 133, label %6
i32 129, label %7
i32 135, label %8
i32 128, label %8
i32 134, label %8
]
5: ; preds = %1, %1, %1
store i32 400, i32* %2
br label %10
6: ; preds = %1
store i32 405, i32* %2
br label %10
7: ; preds = %1
store i32 402, i32* %2
br label %10
8: ; preds = %1, %1, %1
store i32 401, i32* %2
br label %10
9: ; preds = %1
store i32 410, i32* %2
br label %10
10: ; preds = %9, %8, %7, %6, %5
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@switch.table.parseErrno = [8 x i32] [i32 401, i32 402, i32 400, i32 400, i32 400, i32 405, i32 401, i32 401]
define i32 @parseErrno(i32 %0) {
%2 = add i32 %0, -128
%3 = icmp ult i32 %2, 8
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [8 x i32], [8 x i32]* @switch.table.parseErrno, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 410, %1 ]
ret i32 %9
}
void ffoo(long double *ldb1, float *db1) { *ldb1 = *db1; }


x86 assembly (clang, -O0):
<ffoo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
flds   (%rax)
mov    -0x8(%rbp),%rax
fstpt  (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffoo>:
flds   (%rsi)
fstpt  (%rdi)
ret

LLVM IR (-O0):
define void @ffoo(x86_fp80* %0, float* %1) {
%3 = alloca x86_fp80*
%4 = alloca float*
store x86_fp80* %0, x86_fp80** %3
store float* %1, float** %4
%5 = load float*, float** %4
%6 = load float, float* %5
%7 = fpext float %6 to x86_fp80
%8 = load x86_fp80*, x86_fp80** %3
store x86_fp80 %7, x86_fp80* %8
ret void
}

LLVM IR (-O2):
define void @ffoo(x86_fp80* nocapture writeonly %0, float* nocapture %1) {
%3 = load float, float* %1
%4 = fpext float %3 to x86_fp80
store x86_fp80 %4, x86_fp80* %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ nasm_write(int /*<<< orphan*/ *, int, int /*<<< orphan*/ *);
void fwriteint64_t(uint64_t data, FILE *fp) { nasm_write(&data, 8, fp); }


x86 assembly (clang, -O0):
<fwriteint64_t>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
lea    -0x4(%rbp),%rdi
mov    $0x8,%esi
call   1030 <nasm_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fwriteint64_t>:
push   %rax
mov    %rsi,%rdx
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rdi
mov    $0x8,%esi
call   1030 <nasm_write@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @fwriteint64_t(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = call i32 @nasm_write(i32* %3, i32 8, i32* %5)
ret void
}

LLVM IR (-O2):
define void @fwriteint64_t(i32 %0, i32* %1) {
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 @nasm_write(i32* %3, i32 8, i32* %1)
ret void
}
int ifthenelse(int t) {
  if (t) {
    return 1;
  } else {
    return 2;
  }
}


x86 assembly (clang, -O0):
<ifthenelse>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     111d <ifthenelse+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    1124 <ifthenelse+0x24>
movl   $0x2,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ifthenelse>:
cmp    $0x1,%edi
mov    $0x1,%eax
adc    $0x0,%eax
ret

LLVM IR (-O0):
define i32 @ifthenelse(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %8
7: ; preds = %1
store i32 2, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @ifthenelse(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i32 2, i32 1
ret i32 %3
}
int is_https_server_hello(const char *payload) {
  if (payload[0] == 0x16) {
    if (payload[1] == 0x03) {
      if (payload[5] == 0x02) {
        if (payload[9] == 0x03) {
          return 1;
        }
      }
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<is_https_server_hello>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x16,%eax
jne    1166 <is_https_server_hello+0x66>
mov    -0x10(%rbp),%rax
movsbl 0x1(%rax),%eax
cmp    $0x3,%eax
jne    1161 <is_https_server_hello+0x61>
mov    -0x10(%rbp),%rax
movsbl 0x5(%rax),%eax
cmp    $0x2,%eax
jne    115c <is_https_server_hello+0x5c>
mov    -0x10(%rbp),%rax
movsbl 0x9(%rax),%eax
cmp    $0x3,%eax
jne    1157 <is_https_server_hello+0x57>
movl   $0x1,-0x4(%rbp)
jmp    116d <is_https_server_hello+0x6d>
jmp    115c <is_https_server_hello+0x5c>
jmp    1161 <is_https_server_hello+0x61>
jmp    1166 <is_https_server_hello+0x66>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_https_server_hello>:
cmpb   $0x16,(%rdi)
jne    111c <is_https_server_hello+0x1c>
cmpb   $0x3,0x1(%rdi)
jne    111c <is_https_server_hello+0x1c>
cmpb   $0x2,0x5(%rdi)
jne    111c <is_https_server_hello+0x1c>
mov    $0x1,%eax
cmpb   $0x3,0x9(%rdi)
je     111e <is_https_server_hello+0x1e>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_https_server_hello(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 22
br i1 %8, label %9, label %31
9: ; preds = %1
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 3
br i1 %14, label %15, label %30
15: ; preds = %9
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i64 5
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 2
br i1 %20, label %21, label %29
21: ; preds = %15
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i64 9
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
%26 = icmp eq i32 %25, 3
br i1 %26, label %27, label %28
27: ; preds = %21
store i32 1, i32* %2
br label %32
28: ; preds = %21
br label %29
29: ; preds = %28, %15
br label %30
30: ; preds = %29, %9
br label %31
31: ; preds = %30, %1
store i32 0, i32* %2
br label %32
32: ; preds = %31, %27
%33 = load i32, i32* %2
ret i32 %33
}

LLVM IR (-O2):
define i32 @is_https_server_hello(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 22
br i1 %3, label %4, label %16
4: ; preds = %1
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 3
br i1 %7, label %8, label %16
8: ; preds = %4
%9 = getelementptr inbounds i8, i8* %0, i64 5
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 2
br i1 %11, label %12, label %16
12: ; preds = %8
%13 = getelementptr inbounds i8, i8* %0, i64 9
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 3
br i1 %15, label %17, label %16
16: ; preds = %4, %12, %8, %1
br label %17
17: ; preds = %12, %16
%18 = phi i32 [ 0, %16 ], [ 1, %12 ]
ret i32 %18
}
void call1e(unsigned char uc1, unsigned long ul, unsigned char uc2,
            unsigned int ui, unsigned char uc3, unsigned short us,
            unsigned char uc4, unsigned char uc5) {
  uc1 = 5;
  ul = 7;
  uc2 = 8;
  ui = 9;
  uc3 = 10;
  us = 11;
  uc4 = 12;
  uc5 = 55;
}


x86 assembly (clang, -O0):
<call1e>:
push   %rbp
mov    %rsp,%rbp
mov    %r8d,-0x34(%rbp)
mov    %ecx,%eax
mov    -0x34(%rbp),%ecx
mov    %eax,-0x30(%rbp)
mov    %edx,%eax
mov    -0x30(%rbp),%edx
mov    %eax,-0x2c(%rbp)
mov    %rsi,%rax
mov    -0x2c(%rbp),%esi
mov    %rax,-0x28(%rbp)
mov    %edi,%r8d
mov    -0x28(%rbp),%rdi
mov    %r9w,%ax
mov    0x18(%rbp),%r9b
mov    0x10(%rbp),%r9b
mov    %r8b,-0x1(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %sil,-0x11(%rbp)
mov    %edx,-0x18(%rbp)
mov    %cl,-0x19(%rbp)
mov    %ax,-0x1c(%rbp)
movb   $0x5,-0x1(%rbp)
movq   $0x7,-0x10(%rbp)
movb   $0x8,-0x11(%rbp)
movl   $0x9,-0x18(%rbp)
movb   $0xa,-0x19(%rbp)
movw   $0xb,-0x1c(%rbp)
movb   $0xc,0x10(%rbp)
movb   $0x37,0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<call1e>:
ret

LLVM IR (-O0):
define void @call1e(i8 zeroext %0, i64 %1, i8 zeroext %2, i32 %3, i8 zeroext %4, i16 zeroext %5, i8 zeroext %6, i8 zeroext %7) {
%9 = alloca i8
%10 = alloca i64
%11 = alloca i8
%12 = alloca i32
%13 = alloca i8
%14 = alloca i16
%15 = alloca i8
%16 = alloca i8
store i8 %0, i8* %9
store i64 %1, i64* %10
store i8 %2, i8* %11
store i32 %3, i32* %12
store i8 %4, i8* %13
store i16 %5, i16* %14
store i8 %6, i8* %15
store i8 %7, i8* %16
store i8 5, i8* %9
store i64 7, i64* %10
store i8 8, i8* %11
store i32 9, i32* %12
store i8 10, i8* %13
store i16 11, i16* %14
store i8 12, i8* %15
store i8 55, i8* %16
ret void
}

LLVM IR (-O2):
define void @call1e(i8 zeroext %0, i64 %1, i8 zeroext %2, i32 %3, i8 zeroext %4, i16 zeroext %5, i8 zeroext %6, i8 zeroext %7) {
ret void
}
/* Variables and functions */
int REG_NOMATCH;
bool hasNotMatched(int reti) { return reti || (reti == REG_NOMATCH); }


x86 assembly (clang, -O0):
<hasNotMatched>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jne    1128 <hasNotMatched+0x28>
mov    -0x4(%rbp),%eax
mov    0x2ec8(%rip),%rcx
cmp    (%rcx),%eax
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hasNotMatched>:
test   %edi,%edi
setne  %al
mov    0x2edc(%rip),%rcx
cmpl   $0x0,(%rcx)
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
@REG_NOMATCH = global i32 0
define i32 @hasNotMatched(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = load i32, i32* @REG_NOMATCH
%8 = icmp eq i32 %6, %7
br label %9
9: ; preds = %5, %1
%10 = phi i1 [ true, %1 ], [ %8, %5 ]
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
@REG_NOMATCH = global i32 0
define i32 @hasNotMatched(i32 %0) {
%2 = icmp ne i32 %0, 0
%3 = load i32, i32* @REG_NOMATCH
%4 = icmp eq i32 %3, 0
%5 = select i1 %2, i1 true, i1 %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void logit(char *line) { printf("\n%s", line); }


x86 assembly (clang, -O0):
<logit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<logit>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"\0A%s\00"
define void @logit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"\0A%s\00"
define void @logit(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int ndb_getDebugLevel();
int /*<<< orphan*/ stdout;
int /*<<< orphan*/ usleep(long);
void ndb_unix_sleep(int millis) {
  if (ndb_getDebugLevel() >= 5)
    fprintf(stdout, "sleep: now waiting for %d milliseconds\n", millis);
  fflush(stdout);
  usleep(1000L * millis);
}


x86 assembly (clang, -O0):
<ndb_unix_sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <ndb_getDebugLevel@plt>
cmp    $0x5,%eax
jl     1173 <ndb_unix_sleep+0x33>
mov    0x2e7e(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%edx
lea    0xe92(%rip),%rsi
call   1040 <fprintf@plt>
mov    0x2e66(%rip),%rax
mov    (%rax),%edi
call   1050 <fflush@plt>
movslq -0x4(%rbp),%rax
imul   $0x3e8,%rax,%rdi
call   1060 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ndb_unix_sleep>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <ndb_getDebugLevel@plt>
cmp    $0x5,%eax
jl     1166 <ndb_unix_sleep+0x26>
mov    0x2e8a(%rip),%rax
mov    (%rax),%edi
lea    0xea1(%rip),%rsi
mov    %ebx,%edx
call   1040 <fprintf@plt>
mov    0x2e73(%rip),%rax
mov    (%rax),%edi
call   1050 <fflush@plt>
movslq %ebx,%rax
imul   $0x3e8,%rax,%rdi
pop    %rbx
jmp    1060 <usleep@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [40 x i8] c"sleep: now waiting for %d milliseconds\0A\00"
define void @ndb_unix_sleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @ndb_getDebugLevel()
%4 = icmp sge i32 %3, 5
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* @stdout
%7 = load i32, i32* %2
%8 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i32 %7)
br label %9
9: ; preds = %5, %1
%10 = load i32, i32* @stdout
%11 = call i32 @fflush(i32 %10)
%12 = load i32, i32* %2
%13 = sext i32 %12 to i64
%14 = mul nsw i64 1000, %13
%15 = call i32 @usleep(i64 %14)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [40 x i8] c"sleep: now waiting for %d milliseconds\0A\00"
define void @ndb_unix_sleep(i32 %0) {
%2 = tail call i32 (...) @ndb_getDebugLevel()
%3 = icmp sgt i32 %2, 4
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = load i32, i32* @stdout
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i32 %0)
br label %7
7: ; preds = %4, %1
%8 = load i32, i32* @stdout
%9 = tail call i32 @fflush(i32 %8)
%10 = sext i32 %0 to i64
%11 = mul nsw i64 %10, 1000
%12 = tail call i32 @usleep(i64 %11)
ret void
}
void gtk_icon_view_set_selection_mode() {}


x86 assembly (clang, -O0):
<gtk_icon_view_set_selection_mode>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_icon_view_set_selection_mode>:
ret

LLVM IR (-O0):
define void @gtk_icon_view_set_selection_mode() {
ret void
}

LLVM IR (-O2):
define void @gtk_icon_view_set_selection_mode() {
ret void
}
unsigned char decode_6bit(unsigned char encoded) {
  if (encoded & 0x40)
    return (encoded & 0x1F) + 'A' - 1;
  else
    return (encoded & 0x0F) + '0';
}


x86 assembly (clang, -O0):
<decode_6bit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
and    $0x40,%eax
cmp    $0x0,%eax
je     112f <decode_6bit+0x2f>
movzbl -0x2(%rbp),%eax
and    $0x1f,%eax
add    $0x41,%eax
sub    $0x1,%eax
mov    %al,-0x1(%rbp)
jmp    113c <decode_6bit+0x3c>
movzbl -0x2(%rbp),%eax
and    $0xf,%eax
add    $0x30,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode_6bit>:
mov    %edi,%eax
and    $0x1f,%al
or     $0x40,%al
mov    %edi,%ecx
and    $0xf,%cl
or     $0x30,%cl
test   $0x40,%dil
movzbl %cl,%ecx
movzbl %al,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define zeroext i8 @decode_6bit(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 64
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %1
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = and i32 %10, 31
%12 = add nsw i32 %11, 65
%13 = sub nsw i32 %12, 1
%14 = trunc i32 %13 to i8
store i8 %14, i8* %2
br label %21
15: ; preds = %1
%16 = load i8, i8* %3
%17 = zext i8 %16 to i32
%18 = and i32 %17, 15
%19 = add nsw i32 %18, 48
%20 = trunc i32 %19 to i8
store i8 %20, i8* %2
br label %21
21: ; preds = %15, %8
%22 = load i8, i8* %2
ret i8 %22
}

LLVM IR (-O2):
define zeroext i8 @decode_6bit(i8 zeroext %0) {
%2 = and i8 %0, 64
%3 = icmp eq i8 %2, 0
%4 = and i8 %0, 31
%5 = or i8 %4, 64
%6 = and i8 %0, 15
%7 = or i8 %6, 48
%8 = select i1 %3, i8 %7, i8 %5
ret i8 %8
}
/* Variables and functions */
int /*<<< orphan*/ basic_tests();
void all_tests(void) { basic_tests(); }


x86 assembly (clang, -O0):
<all_tests>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <basic_tests@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<all_tests>:
xor    %eax,%eax
jmp    1030 <basic_tests@plt>

LLVM IR (-O0):
define void @all_tests() {
%1 = call i32 (...) @basic_tests()
ret void
}

LLVM IR (-O2):
define void @all_tests() {
%1 = tail call i32 (...) @basic_tests()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "Usage: alisp [-L] [-bgi] [-n nodes] [image]\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [45 x i8] c"Usage: alisp [-L] [-bgi] [-n nodes] [image]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [45 x i8] c"Usage: alisp [-L] [-bgi] [-n nodes] [image]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ merge_possible(int const, int const);
int merge_result(const int v1, const int v2) {
  int max = v1 > v2 ? v1 : v2;
  return merge_possible(v1, v2) ? max + 1 : -1;
}


x86 assembly (clang, -O0):
<merge_result>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1135 <merge_result+0x25>
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    113b <merge_result+0x2b>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <merge_possible@plt>
cmp    $0x0,%rax
je     1164 <merge_result+0x54>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1171 <merge_result+0x61>
mov    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
jmp    1171 <merge_result+0x61>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<merge_result>:
push   %rbx
cmp    %esi,%edi
mov    %esi,%ebx
cmovg  %edi,%ebx
call   1030 <merge_possible@plt>
add    $0x1,%ebx
cmp    $0x1,%rax
sbb    %eax,%eax
or     %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @merge_result(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %4
br label %13
13: ; preds = %11, %9
%14 = phi i32 [ %10, %9 ], [ %12, %11 ]
store i32 %14, i32* %5
%15 = load i32, i32* %3
%16 = load i32, i32* %4
%17 = call i64 @merge_possible(i32 %15, i32 %16)
%18 = icmp ne i64 %17, 0
br i1 %18, label %19, label %22
19: ; preds = %13
%20 = load i32, i32* %5
%21 = add nsw i32 %20, 1
br label %23
22: ; preds = %13
br label %23
23: ; preds = %22, %19
%24 = phi i32 [ %21, %19 ], [ -1, %22 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @merge_result(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
%5 = tail call i64 @merge_possible(i32 %0, i32 %1)
%6 = icmp eq i64 %5, 0
%7 = add nsw i32 %4, 1
%8 = select i1 %6, i32 -1, i32 %7
ret i32 %8
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_1__;

/* Type definitions */
struct TYPE_4__ {
  int (*xCurrentTimeInt64)(TYPE_1__ *, int /*<<< orphan*/ *);
  scalar_t__ pAppData;
};
typedef TYPE_1__ sqlite3_vfs;
typedef int /*<<< orphan*/ sqlite3_int64;

/* Variables and functions */
int stub1(TYPE_1__ *, int /*<<< orphan*/ *);
int memCurrentTimeInt64(sqlite3_vfs *pVfs, sqlite3_int64 *p) {
  return ((sqlite3_vfs *)((pVfs)->pAppData))
      ->xCurrentTimeInt64(((sqlite3_vfs *)((pVfs)->pAppData)), p);
}


x86 assembly (clang, -O0):
<memCurrentTimeInt64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
mov    (%rax),%rax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%rdi
mov    -0x10(%rbp),%rsi
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memCurrentTimeInt64>:
mov    0x8(%rdi),%rdi
mov    (%rdi),%rax
jmp    *%rax

LLVM IR (-O0):
%struct.TYPE_4__ = type { {}*, i64 }
define i32 @memCurrentTimeInt64(%struct.TYPE_4__* %0, i32* %1) {
%3 = alloca %struct.TYPE_4__*
%4 = alloca i32*
store %struct.TYPE_4__* %0, %struct.TYPE_4__** %3
store i32* %1, i32** %4
%5 = load %struct.TYPE_4__*, %struct.TYPE_4__** %3
%6 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %5, i32 0, i32 1
%7 = load i64, i64* %6
%8 = inttoptr i64 %7 to %struct.TYPE_4__*
%9 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %8, i32 0, i32 0
%10 = bitcast {}** %9 to i32 (%struct.TYPE_4__*, i32*)**
%11 = load i32 (%struct.TYPE_4__*, i32*)*, i32 (%struct.TYPE_4__*, i32*)** %10
%12 = load %struct.TYPE_4__*, %struct.TYPE_4__** %3
%13 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %12, i32 0, i32 1
%14 = load i64, i64* %13
%15 = inttoptr i64 %14 to %struct.TYPE_4__*
%16 = load i32*, i32** %4
%17 = call i32 %11(%struct.TYPE_4__* %15, i32* %16)
ret i32 %17
}

LLVM IR (-O2):
%struct.TYPE_4__ = type { {}*, i64 }
define i32 @memCurrentTimeInt64(%struct.TYPE_4__* nocapture %0, i32* %1) {
%3 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %0, i64 0, i32 1
%4 = load i64, i64* %3
%5 = inttoptr i64 %4 to %struct.TYPE_4__*
%6 = inttoptr i64 %4 to i32 (%struct.TYPE_4__*, i32*)**
%7 = load i32 (%struct.TYPE_4__*, i32*)*, i32 (%struct.TYPE_4__*, i32*)** %6
%8 = tail call i32 %7(%struct.TYPE_4__* %5, i32* %1)
ret i32 %8
}
/* Variables and functions */
int parseCodenum(void *);
int parseSe(void *pvBuf) {
  int iRet = 0;
  int u32CodeNum;
  u32CodeNum = parseCodenum(pvBuf);
  iRet = (u32CodeNum + 1) >> 1;
  iRet = (u32CodeNum & 0x01) ? iRet : -iRet;
  return iRet;
}


x86 assembly (clang, -O0):
<parseSe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <parseCodenum@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
sar    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1155 <parseSe+0x45>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    115d <parseSe+0x4d>
xor    %eax,%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parseSe>:
push   %rax
call   1030 <parseCodenum@plt>
lea    0x1(%rax),%edx
sar    %edx
mov    %edx,%ecx
neg    %ecx
test   $0x1,%al
cmovne %edx,%ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @parseSe(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%5 = load i8*, i8** %2
%6 = call i32 @parseCodenum(i8* %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = add nsw i32 %7, 1
%9 = ashr i32 %8, 1
store i32 %9, i32* %3
%10 = load i32, i32* %4
%11 = and i32 %10, 1
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %1
%14 = load i32, i32* %3
br label %18
15: ; preds = %1
%16 = load i32, i32* %3
%17 = sub nsw i32 0, %16
br label %18
18: ; preds = %15, %13
%19 = phi i32 [ %14, %13 ], [ %17, %15 ]
store i32 %19, i32* %3
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @parseSe(i8* %0) {
%2 = tail call i32 @parseCodenum(i8* %0)
%3 = add nsw i32 %2, 1
%4 = ashr i32 %3, 1
%5 = and i32 %2, 1
%6 = icmp eq i32 %5, 0
%7 = sub nsw i32 0, %4
%8 = select i1 %6, i32 %7, i32 %4
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isascii(int);
void t_isascii_0x88() {
  Assert_real((isascii(136) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              685, ("isascii should be 0 for 0x88"));
}


x86 assembly (clang, -O0):
<t_isascii_0x88>:
push   %rbp
mov    %rsp,%rbp
mov    $0x88,%edi
call   1030 <isascii@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2ad,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0x88>:
push   %rax
mov    $0x88,%edi
call   1030 <isascii@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2ad,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0x88\00"
define void @t_isascii_0x88() {
%1 = call i64 @isascii(i32 136)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 685, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0x88\00"
define void @t_isascii_0x88() {
%1 = tail call i64 @isascii(i32 136)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 685, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char const *);
scalar_t__ strncmp(char const *, char const *, int /*<<< orphan*/);
char mxstr_startsWith(const char *s, const char *prefix) {
  if (strncmp(s, prefix, strlen(prefix)) == 0)
    return '\1';
  return '\0';
}


x86 assembly (clang, -O0):
<mxstr_startsWith>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x28(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    %eax,%edx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
jne    116b <mxstr_startsWith+0x4b>
movb   $0x1,-0x1(%rbp)
jmp    116f <mxstr_startsWith+0x4f>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mxstr_startsWith>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <strncmp@plt>
test   %rax,%rax
sete   %al
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define signext i8 @mxstr_startsWith(i8* %0, i8* %1) {
%3 = alloca i8
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = load i8*, i8** %5
%8 = load i8*, i8** %5
%9 = call i32 @strlen(i8* %8)
%10 = call i64 @strncmp(i8* %6, i8* %7, i32 %9)
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %2
store i8 1, i8* %3
br label %14
13: ; preds = %2
store i8 0, i8* %3
br label %14
14: ; preds = %13, %12
%15 = load i8, i8* %3
ret i8 %15
}

LLVM IR (-O2):
define signext i8 @mxstr_startsWith(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i64 @strncmp(i8* %0, i8* %1, i32 %3)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i8
ret i8 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ syscall(int);
pid_t getpid(void) { return syscall(20); }


x86 assembly (clang, -O0):
<getpid>:
push   %rbp
mov    %rsp,%rbp
mov    $0x14,%edi
call   1030 <syscall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getpid>:
mov    $0x14,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @getpid() {
%1 = call i32 @syscall(i32 20)
ret i32 %1
}

LLVM IR (-O2):
define i32 @getpid() {
%1 = tail call i32 @syscall(i32 20)
ret i32 %1
}
int pft_file_close(struct file *filp) { return 0; }


x86 assembly (clang, -O0):
<pft_file_close>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pft_file_close>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.file = type opaque
define i32 @pft_file_close(%struct.file* %0) {
%2 = alloca %struct.file*
store %struct.file* %0, %struct.file** %2
ret i32 0
}

LLVM IR (-O2):
%struct.file = type opaque
define i32 @pft_file_close(%struct.file* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ CLIENT;

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
char *clnt_sperror(int /*<<< orphan*/ *, char const *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void clnt_perror(CLIENT *rpch, const char *s) {
  assert(rpch != NULL);
  assert(s != NULL);
  (void)fprintf(stderr, "%s\n", clnt_sperror(rpch, s));
}


x86 assembly (clang, -O0):
<clnt_perror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    0x2e75(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <clnt_sperror@plt>
mov    -0x14(%rbp),%edi
mov    %rax,%rdx
lea    0xe76(%rip),%rsi
call   1040 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clnt_perror>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1030 <assert@plt>
xor    %edi,%edi
test   %r14,%r14
setne  %dil
call   1030 <assert@plt>
mov    0x2e83(%rip),%rax
mov    (%rax),%ebp
mov    %rbx,%rdi
mov    %r14,%rsi
call   1050 <clnt_sperror@plt>
lea    0xe8f(%rip),%rsi
mov    %ebp,%edi
mov    %rax,%rdx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @clnt_perror(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = icmp ne i32* %5, null
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i8*, i8** %4
%10 = icmp ne i8* %9, null
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i32, i32* @stderr
%14 = load i32*, i32** %3
%15 = load i8*, i8** %4
%16 = call i8* @clnt_sperror(i32* %14, i8* %15)
%17 = call i32 @fprintf(i32 %13, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %16)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @clnt_perror(i32* %0, i8* %1) {
%3 = icmp ne i32* %0, null
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = icmp ne i8* %1, null
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
%9 = load i32, i32* @stderr
%10 = tail call i8* @clnt_sperror(i32* %0, i8* %1)
%11 = tail call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %10)
ret void
}
const char *Len_Description(void) {
  return "The `Len` class can be implemented by any type that has a length "
         "associated with it. It is typically implemented by collections "
         "and is often used in conjunction with `Iter` or `Get`.";
}


x86 assembly (clang, -O0):
<Len_Description>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Len_Description>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [183 x i8] c"The `Len` class can be implemented by any type that has a length associated with it. It is typically implemented by collections and is often used in conjunction with `Iter` or `Get`.\00"
define i8* @Len_Description() {
ret i8* getelementptr inbounds ([183 x i8], [183 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [183 x i8] c"The `Len` class can be implemented by any type that has a length associated with it. It is typically implemented by collections and is often used in conjunction with `Iter` or `Get`.\00"
define i8* @Len_Description() {
ret i8* getelementptr inbounds ([183 x i8], [183 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ insert(int);
int /*<<< orphan*/ printNum();
int main() {
  insert(1);
  insert(2);
  insert(3);
  insert(4);
  insert(5);
  printNum();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1040 <insert@plt>
mov    $0x2,%edi
call   1040 <insert@plt>
mov    $0x3,%edi
call   1040 <insert@plt>
mov    $0x4,%edi
call   1040 <insert@plt>
mov    $0x5,%edi
call   1040 <insert@plt>
mov    $0x0,%al
call   1030 <printNum@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1040 <insert@plt>
mov    $0x2,%edi
call   1040 <insert@plt>
mov    $0x3,%edi
call   1040 <insert@plt>
mov    $0x4,%edi
call   1040 <insert@plt>
mov    $0x5,%edi
call   1040 <insert@plt>
xor    %eax,%eax
call   1030 <printNum@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @insert(i32 1)
%2 = call i32 @insert(i32 2)
%3 = call i32 @insert(i32 3)
%4 = call i32 @insert(i32 4)
%5 = call i32 @insert(i32 5)
%6 = call i32 (...) @printNum()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @insert(i32 1)
%2 = tail call i32 @insert(i32 2)
%3 = tail call i32 @insert(i32 3)
%4 = tail call i32 @insert(i32 4)
%5 = tail call i32 @insert(i32 5)
%6 = tail call i32 (...) @printNum()
ret i32 0
}