xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ pic24_standby();
int /*<<< orphan*/ pic24_write_config();
int /*<<< orphan*/ pic_write_panel(int, int, int);
void pic24_program_end(int config) {
  pic_write_panel((3), (0xFFFF), (0xFFFF));
  pic24_standby();
  if (config)
    pic24_write_config();
}


x86 assembly (clang, -O0):
<pic24_program_end>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x3,%edi
mov    $0xffff,%edx
mov    %edx,%esi
call   1040 <pic_write_panel@plt>
mov    $0x0,%al
call   1030 <pic24_standby@plt>
cmpl   $0x0,-0x4(%rbp)
je     1164 <pic24_program_end+0x34>
mov    $0x0,%al
call   1050 <pic24_write_config@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pic24_program_end>:
push   %rbx
mov    %edi,%ebx
mov    $0x3,%edi
mov    $0xffff,%esi
mov    $0xffff,%edx
call   1040 <pic_write_panel@plt>
xor    %eax,%eax
call   1030 <pic24_standby@plt>
test   %ebx,%ebx
je     115a <pic24_program_end+0x2a>
xor    %eax,%eax
pop    %rbx
jmp    1050 <pic24_write_config@plt>
pop    %rbx
ret

LLVM IR (-O0):
define void @pic24_program_end(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @pic_write_panel(i32 3, i32 65535, i32 65535)
%4 = call i32 (...) @pic24_standby()
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 (...) @pic24_write_config()
br label %9
9: ; preds = %7, %1
ret void
}

LLVM IR (-O2):
define void @pic24_program_end(i32 %0) {
%2 = tail call i32 @pic_write_panel(i32 3, i32 65535, i32 65535)
%3 = tail call i32 (...) @pic24_standby()
%4 = icmp eq i32 %0, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @pic24_write_config()
br label %7
7: ; preds = %5, %1
ret void
}
void convlong(unsigned char *result, unsigned long int data) {
  result[0] = data & 0xff;
  result[1] = (data >> 8) & 0xff;
  result[2] = (data >> 16) & 0xff;
  result[3] = (data >> 24) & 0xff;
}


x86 assembly (clang, -O0):
<convlong>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
shr    $0x8,%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x10(%rbp),%rax
shr    $0x10,%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0x10(%rbp),%rax
shr    $0x18,%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<convlong>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @convlong(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = and i64 %5, 255
%7 = trunc i64 %6 to i8
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 0
store i8 %7, i8* %9
%10 = load i64, i64* %4
%11 = lshr i64 %10, 8
%12 = and i64 %11, 255
%13 = trunc i64 %12 to i8
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i64 1
store i8 %13, i8* %15
%16 = load i64, i64* %4
%17 = lshr i64 %16, 16
%18 = and i64 %17, 255
%19 = trunc i64 %18 to i8
%20 = load i8*, i8** %3
%21 = getelementptr inbounds i8, i8* %20, i64 2
store i8 %19, i8* %21
%22 = load i64, i64* %4
%23 = lshr i64 %22, 24
%24 = and i64 %23, 255
%25 = trunc i64 %24 to i8
%26 = load i8*, i8** %3
%27 = getelementptr inbounds i8, i8* %26, i64 3
store i8 %25, i8* %27
ret void
}

LLVM IR (-O2):
define void @convlong(i8* nocapture writeonly %0, i64 %1) {
%3 = trunc i64 %1 to i8
store i8 %3, i8* %0
%4 = lshr i64 %1, 8
%5 = trunc i64 %4 to i8
%6 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %5, i8* %6
%7 = lshr i64 %1, 16
%8 = trunc i64 %7 to i8
%9 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %8, i8* %9
%10 = lshr i64 %1, 24
%11 = trunc i64 %10 to i8
%12 = getelementptr inbounds i8, i8* %0, i64 3
store i8 %11, i8* %12
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ parse(char *);
int /*<<< orphan*/ stderr;
int main(int argc, char **argv) {
  if (argc != 2) {
    fprintf(stderr, "usage: a.out filename\n");
    exit(1);
  }
  parse(argv[1]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
je     116f <main+0x3f>
mov    0x2e89(%rip),%rax
mov    (%rax),%edi
lea    0xea0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <parse@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x2,%edi
jne    1143 <main+0x13>
mov    0x8(%rsi),%rdi
call   1040 <parse@plt>
xor    %eax,%eax
pop    %rcx
ret
mov    0x2e96(%rip),%rax
mov    (%rax),%edi
lea    0xead(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [23 x i8] c"usage: a.out filename\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 2
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%11 = call i32 @exit(i32 1)
unreachable
12: ; preds = %2
%13 = load i8**, i8*** %5
%14 = getelementptr inbounds i8*, i8** %13, i64 1
%15 = load i8*, i8** %14
%16 = call i32 @parse(i8* %15)
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [23 x i8] c"usage: a.out filename\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 2
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 @exit(i32 1)
unreachable
8: ; preds = %2
%9 = getelementptr inbounds i8*, i8** %1, i64 1
%10 = load i8*, i8** %9
%11 = tail call i32 @parse(i8* %10)
ret i32 0
}
/* Variables and functions */
void *malloc(unsigned long);
void *OS_malloc(unsigned long size) { return malloc(size); }


x86 assembly (clang, -O0):
<OS_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OS_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @OS_malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @OS_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
/* Variables and functions */
bool nrf91_errata_8(void) { return false; }


x86 assembly (clang, -O0):
<nrf91_errata_8>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf91_errata_8>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf91_errata_8() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf91_errata_8() {
ret i32 0
}
int abs(int a) { return a < 0 ? -a : a; }


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    111e <abs+0x1e>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1124 <abs+0x24>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = sub nsw i32 0, %6
br label %10
8: ; preds = %1
%9 = load i32, i32* %2
br label %10
10: ; preds = %8, %5
%11 = phi i32 [ %7, %5 ], [ %9, %8 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
/* Variables and functions */
int bar();
int baz() { return bar(); }


x86 assembly (clang, -O0):
<baz>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <bar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz>:
xor    %eax,%eax
jmp    1030 <bar@plt>

LLVM IR (-O0):
define i32 @baz() {
%1 = call i32 (...) @bar()
ret i32 %1
}

LLVM IR (-O2):
define i32 @baz() {
%1 = tail call i32 (...) @bar()
ret i32 %1
}
/* Variables and functions */
void init_factorial(unsigned int *fact, size_t size) {
  unsigned int i;
  fact[0] = 1;
  for (i = 1; i < size; i++)
    fact[i] = fact[i - 1] * i;
}


x86 assembly (clang, -O0):
<init_factorial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%rax
jae    1155 <init_factorial+0x55>
mov    -0x8(%rbp),%rax
mov    -0x14(%rbp),%ecx
sub    $0x1,%ecx
mov    %ecx,%ecx
mov    (%rax,%rcx,4),%edx
imul   -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    -0x14(%rbp),%ecx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    111d <init_factorial+0x1d>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_factorial>:
movl   $0x1,(%rdi)
cmp    $0x2,%rsi
jb     1134 <init_factorial+0x34>
mov    $0x1,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
lea    -0x1(%rax),%ecx
mov    (%rdi,%rcx,4),%ecx
imul   %eax,%ecx
mov    %ecx,(%rdi,%rax,4)
add    $0x1,%eax
cmp    %rsi,%rax
jb     1120 <init_factorial+0x20>
ret

LLVM IR (-O0):
define void @init_factorial(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = alloca i32
store i32* %0, i32** %3
store i64 %1, i64* %4
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 0
store i32 1, i32* %7
store i32 1, i32* %5
br label %8
8: ; preds = %26, %2
%9 = load i32, i32* %5
%10 = zext i32 %9 to i64
%11 = load i64, i64* %4
%12 = icmp ult i64 %10, %11
br i1 %12, label %13, label %29
13: ; preds = %8
%14 = load i32*, i32** %3
%15 = load i32, i32* %5
%16 = sub i32 %15, 1
%17 = zext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %14, i64 %17
%19 = load i32, i32* %18
%20 = load i32, i32* %5
%21 = mul i32 %19, %20
%22 = load i32*, i32** %3
%23 = load i32, i32* %5
%24 = zext i32 %23 to i64
%25 = getelementptr inbounds i32, i32* %22, i64 %24
store i32 %21, i32* %25
br label %26
26: ; preds = %13
%27 = load i32, i32* %5
%28 = add i32 %27, 1
store i32 %28, i32* %5
br label %8
29: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @init_factorial(i32* nocapture %0, i64 %1) {
store i32 1, i32* %0
%3 = icmp ugt i64 %1, 1
br i1 %3, label %4, label %16
4: ; preds = %2, %4
%5 = phi i64 [ %14, %4 ], [ 1, %2 ]
%6 = trunc i64 %5 to i32
%7 = add nuw nsw i64 %5, 4294967295
%8 = and i64 %7, 4294967295
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = mul i32 %10, %6
%12 = getelementptr inbounds i32, i32* %0, i64 %5
store i32 %11, i32* %12
%13 = add nuw nsw i64 %5, 1
%14 = and i64 %13, 4294967295
%15 = icmp ult i64 %14, %1
br i1 %15, label %4, label %16
16: ; preds = %4, %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ a_and(int *, int /*<<< orphan*/);
void a_and_64(volatile uint64_t *p, uint64_t v) {
  union {
    uint64_t v;
    uint32_t r[2];
  } u = {v};
  a_and((int *)p, u.r[0]);
  a_and((int *)p + 1, u.r[1]);
}


x86 assembly (clang, -O0):
<a_and_64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%esi
call   1030 <a_and@plt>
mov    -0x8(%rbp),%rdi
add    $0x4,%rdi
mov    -0x14(%rbp),%esi
call   1030 <a_and@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_and_64>:
push   %rbx
mov    %rdi,%rbx
call   1030 <a_and@plt>
add    $0x4,%rbx
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <a_and@plt>

LLVM IR (-O0):
%union.anon = type { [2 x i32] }
define void @a_and_64(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca %union.anon
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = bitcast %union.anon* %5 to i32*
%7 = load i32, i32* %4
store i32 %7, i32* %6
%8 = load i32*, i32** %3
%9 = bitcast %union.anon* %5 to [2 x i32]*
%10 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 0
%11 = load i32, i32* %10
%12 = call i32 @a_and(i32* %8, i32 %11)
%13 = load i32*, i32** %3
%14 = getelementptr inbounds i32, i32* %13, i64 1
%15 = bitcast %union.anon* %5 to [2 x i32]*
%16 = getelementptr inbounds [2 x i32], [2 x i32]* %15, i64 0, i64 1
%17 = load i32, i32* %16
%18 = call i32 @a_and(i32* %14, i32 %17)
ret void
}

LLVM IR (-O2):
define void @a_and_64(i32* %0, i32 %1) {
%3 = tail call i32 @a_and(i32* %0, i32 %1)
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = tail call i32 @a_and(i32* %4, i32 undef)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ add_range_checking_in_show();
__attribute__((constructor)) void init(void) { add_range_checking_in_show(); }


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <add_range_checking_in_show@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
xor    %eax,%eax
jmp    1030 <add_range_checking_in_show@plt>

LLVM IR (-O0):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @init, i8* null }]
define void @init() {
%1 = call i32 (...) @add_range_checking_in_show()
ret void
}

LLVM IR (-O2):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @init, i8* null }]
define void @init() {
%1 = tail call i32 (...) @add_range_checking_in_show()
ret void
}
/* Variables and functions */
char *int2str(int, char *, int);
int /*<<< orphan*/ printf(char *, char *);
int main() {
  char buf_int2str[34] = "";
  char c = -1;
  printf("%s\n", int2str(c, buf_int2str, 2));
  printf("%s\n", int2str(-1, buf_int2str, 2));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x30(%rbp),%rdi
xor    %esi,%esi
mov    $0x22,%edx
call   1050 <memset@plt>
movb   $0xff,-0x31(%rbp)
movsbl -0x31(%rbp),%edi
lea    -0x30(%rbp),%rsi
mov    $0x2,%edx
call   1030 <int2str@plt>
mov    %rax,%rsi
lea    0xe91(%rip),%rdi
call   1040 <printf@plt>
lea    -0x30(%rbp),%rsi
mov    $0xffffffff,%edi
mov    $0x2,%edx
call   1030 <int2str@plt>
mov    %rax,%rsi
lea    0xe6f(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
sub    $0x28,%rsp
xorps  %xmm0,%xmm0
movaps %xmm0,0x10(%rsp)
movaps %xmm0,(%rsp)
movw   $0x0,0x20(%rsp)
mov    %rsp,%r14
mov    $0xffffffff,%edi
mov    %r14,%rsi
mov    $0x2,%edx
call   1030 <int2str@plt>
lea    0xeaa(%rip),%rbx
mov    %rbx,%rdi
mov    %rax,%rsi
call   1040 <printf@plt>
mov    $0xffffffff,%edi
mov    %r14,%rsi
mov    $0x2,%edx
call   1030 <int2str@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x28,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [34 x i8]
%3 = alloca i8
store i32 0, i32* %1
%4 = bitcast [34 x i8]* %2 to i8*
store i8 -1, i8* %3
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
%7 = getelementptr inbounds [34 x i8], [34 x i8]* %2, i64 0, i64 0
%8 = call i8* @int2str(i32 %6, i8* %7, i32 2)
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %8)
%10 = getelementptr inbounds [34 x i8], [34 x i8]* %2, i64 0, i64 0
%11 = call i8* @int2str(i32 -1, i8* %10, i32 2)
%12 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca [34 x i8]
%2 = getelementptr inbounds [34 x i8], [34 x i8]* %1, i64 0, i64 0
%3 = call i8* @int2str(i32 -1, i8* %2, i32 2)
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i8* @int2str(i32 -1, i8* %2, i32 2)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %5)
ret i32 0
}
/* Variables and functions */
int strcasecmp(char const *, char const *);
int os_strcasecmp(const char *s1, const char *s2) { return strcasecmp(s1, s2); }


x86 assembly (clang, -O0):
<os_strcasecmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcasecmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_strcasecmp>:
jmp    1030 <strcasecmp@plt>

LLVM IR (-O0):
define i32 @os_strcasecmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcasecmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @os_strcasecmp(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcasecmp(i8* %0, i8* %1)
ret i32 %3
}
/* Type definitions */
struct feed_page_history {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ feed_page_reset(struct feed_page_history *const);
void feed_page_cleanup(struct feed_page_history *const p_page) {
  feed_page_reset(p_page);
}


x86 assembly (clang, -O0):
<feed_page_cleanup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <feed_page_reset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<feed_page_cleanup>:
jmp    1030 <feed_page_reset@plt>

LLVM IR (-O0):
%struct.feed_page_history = type { i32 }
define void @feed_page_cleanup(%struct.feed_page_history* %0) {
%2 = alloca %struct.feed_page_history*
store %struct.feed_page_history* %0, %struct.feed_page_history** %2
%3 = load %struct.feed_page_history*, %struct.feed_page_history** %2
%4 = call i32 @feed_page_reset(%struct.feed_page_history* %3)
ret void
}

LLVM IR (-O2):
%struct.feed_page_history = type { i32 }
define void @feed_page_cleanup(%struct.feed_page_history* %0) {
%2 = tail call i32 @feed_page_reset(%struct.feed_page_history* %0)
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *wrapped_malloc(size_t size) { return malloc(size); }


x86 assembly (clang, -O0):
<wrapped_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapped_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @wrapped_malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @wrapped_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ GLint;

/* Variables and functions */
int /*<<< orphan*/ glVertex4iv(int /*<<< orphan*/ *);
void Vertex4iv(GLint v[4]) { glVertex4iv(v); }


x86 assembly (clang, -O0):
<Vertex4iv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <glVertex4iv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Vertex4iv>:
jmp    1030 <glVertex4iv@plt>

LLVM IR (-O0):
define void @Vertex4iv(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @glVertex4iv(i32* %3)
ret void
}

LLVM IR (-O2):
define void @Vertex4iv(i32* %0) {
%2 = tail call i32 @glVertex4iv(i32* %0)
ret void
}
int tgaCheckSize(int x) {
  if (x == 2 || x == 4 || x == 8 || x == 16 || x == 32 || x == 64 || x == 128 ||
      x == 256 || x == 512)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<tgaCheckSize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
je     116a <tgaCheckSize+0x6a>
cmpl   $0x4,-0x8(%rbp)
je     116a <tgaCheckSize+0x6a>
cmpl   $0x8,-0x8(%rbp)
je     116a <tgaCheckSize+0x6a>
cmpl   $0x10,-0x8(%rbp)
je     116a <tgaCheckSize+0x6a>
cmpl   $0x20,-0x8(%rbp)
je     116a <tgaCheckSize+0x6a>
cmpl   $0x40,-0x8(%rbp)
je     116a <tgaCheckSize+0x6a>
cmpl   $0x80,-0x8(%rbp)
je     116a <tgaCheckSize+0x6a>
cmpl   $0x100,-0x8(%rbp)
je     116a <tgaCheckSize+0x6a>
cmpl   $0x200,-0x8(%rbp)
jne    1176 <tgaCheckSize+0x76>
movl   $0x1,-0x4(%rbp)
jmp    117d <tgaCheckSize+0x7d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tgaCheckSize>:
mov    $0x1,%eax
cmp    $0x7f,%edi
jg     1123 <tgaCheckSize+0x23>
add    $0xfffffffe,%edi
cmp    $0x3e,%edi
ja     113b <tgaCheckSize+0x3b>
movabs $0x4000000040004045,%rcx
bt     %rdi,%rcx
jae    113b <tgaCheckSize+0x3b>
ret
cmp    $0x80,%edi
je     1122 <tgaCheckSize+0x22>
cmp    $0x100,%edi
je     1122 <tgaCheckSize+0x22>
cmp    $0x200,%edi
je     1122 <tgaCheckSize+0x22>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @tgaCheckSize(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 2
br i1 %5, label %30, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 4
br i1 %8, label %30, label %9
9: ; preds = %6
%10 = load i32, i32* %3
%11 = icmp eq i32 %10, 8
br i1 %11, label %30, label %12
12: ; preds = %9
%13 = load i32, i32* %3
%14 = icmp eq i32 %13, 16
br i1 %14, label %30, label %15
15: ; preds = %12
%16 = load i32, i32* %3
%17 = icmp eq i32 %16, 32
br i1 %17, label %30, label %18
18: ; preds = %15
%19 = load i32, i32* %3
%20 = icmp eq i32 %19, 64
br i1 %20, label %30, label %21
21: ; preds = %18
%22 = load i32, i32* %3
%23 = icmp eq i32 %22, 128
br i1 %23, label %30, label %24
24: ; preds = %21
%25 = load i32, i32* %3
%26 = icmp eq i32 %25, 256
br i1 %26, label %30, label %27
27: ; preds = %24
%28 = load i32, i32* %3
%29 = icmp eq i32 %28, 512
br i1 %29, label %30, label %31
30: ; preds = %27, %24, %21, %18, %15, %12, %9, %6, %1
store i32 1, i32* %2
br label %32
31: ; preds = %27
store i32 0, i32* %2
br label %32
32: ; preds = %31, %30
%33 = load i32, i32* %2
ret i32 %33
}

LLVM IR (-O2):
define i32 @tgaCheckSize(i32 %0) {
switch i32 %0, label %2 [
i32 512, label %3
i32 256, label %3
i32 128, label %3
i32 64, label %3
i32 32, label %3
i32 16, label %3
i32 8, label %3
i32 4, label %3
i32 2, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %2
%4 = phi i32 [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}
int jac_chain_nm7_init(int *n_in, int *n_out, int *n_int, int *n_real) {
  if (n_in)
    *n_in = 2;
  if (n_out)
    *n_out = 2;
  if (n_int)
    *n_int = 0;
  if (n_real)
    *n_real = 0;
  return 0;
}


x86 assembly (clang, -O0):
<jac_chain_nm7_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1129 <jac_chain_nm7_init+0x29>
mov    -0x8(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x10(%rbp)
je     113e <jac_chain_nm7_init+0x3e>
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x18(%rbp)
je     1153 <jac_chain_nm7_init+0x53>
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
cmpq   $0x0,-0x20(%rbp)
je     1168 <jac_chain_nm7_init+0x68>
mov    -0x20(%rbp),%rax
movl   $0x0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<jac_chain_nm7_init>:
test   %rdi,%rdi
je     110b <jac_chain_nm7_init+0xb>
movl   $0x2,(%rdi)
test   %rsi,%rsi
je     1116 <jac_chain_nm7_init+0x16>
movl   $0x2,(%rsi)
test   %rdx,%rdx
je     1121 <jac_chain_nm7_init+0x21>
movl   $0x0,(%rdx)
test   %rcx,%rcx
je     112c <jac_chain_nm7_init+0x2c>
movl   $0x0,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @jac_chain_nm7_init(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %11, label %13
11: ; preds = %4
%12 = load i32*, i32** %5
store i32 2, i32* %12
br label %13
13: ; preds = %11, %4
%14 = load i32*, i32** %6
%15 = icmp ne i32* %14, null
br i1 %15, label %16, label %18
16: ; preds = %13
%17 = load i32*, i32** %6
store i32 2, i32* %17
br label %18
18: ; preds = %16, %13
%19 = load i32*, i32** %7
%20 = icmp ne i32* %19, null
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = load i32*, i32** %7
store i32 0, i32* %22
br label %23
23: ; preds = %21, %18
%24 = load i32*, i32** %8
%25 = icmp ne i32* %24, null
br i1 %25, label %26, label %28
26: ; preds = %23
%27 = load i32*, i32** %8
store i32 0, i32* %27
br label %28
28: ; preds = %26, %23
ret i32 0
}

LLVM IR (-O2):
define i32 @jac_chain_nm7_init(i32* writeonly %0, i32* writeonly %1, i32* writeonly %2, i32* writeonly %3) {
%5 = icmp eq i32* %0, null
br i1 %5, label %7, label %6
6: ; preds = %4
store i32 2, i32* %0
br label %7
7: ; preds = %6, %4
%8 = icmp eq i32* %1, null
br i1 %8, label %10, label %9
9: ; preds = %7
store i32 2, i32* %1
br label %10
10: ; preds = %9, %7
%11 = icmp eq i32* %2, null
br i1 %11, label %13, label %12
12: ; preds = %10
store i32 0, i32* %2
br label %13
13: ; preds = %12, %10
%14 = icmp eq i32* %3, null
br i1 %14, label %16, label %15
15: ; preds = %13
store i32 0, i32* %3
br label %16
16: ; preds = %15, %13
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ register_capc_function_list();
void capc_init() { register_capc_function_list(); }


x86 assembly (clang, -O0):
<capc_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <register_capc_function_list@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<capc_init>:
xor    %eax,%eax
jmp    1030 <register_capc_function_list@plt>

LLVM IR (-O0):
define void @capc_init() {
%1 = call i32 (...) @register_capc_function_list()
ret void
}

LLVM IR (-O2):
define void @capc_init() {
%1 = tail call i32 (...) @register_capc_function_list()
ret void
}
int __attribute__((target("sse4.2"))) foo(int i, ...) { return 0; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, ...) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @foo(i32 %0, ...) {
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long time;
};
typedef TYPE_1__ XTimeCoord;

/* Variables and functions */
void set_XTimeCoord_time(void *_p, unsigned long _v) {
  ((XTimeCoord *)_p)->time = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XTimeCoord_time>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XTimeCoord_time>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define void @set_XTimeCoord_time(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @set_XTimeCoord_time(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;
typedef scalar_t__ msb;
typedef int lsb;

/* Variables and functions */
int us_bits_get_octet(void const *, int);
uint8_t us_bits_get_octet_bitfield(const void *base, uint16_t offset,
                                   uint16_t msb, uint16_t lsb) {
  uint8_t v = us_bits_get_octet(base, offset);
  uint8_t r =
      ((((v)) & (((0xff) >> (8 - ((lsb) - (msb) + 1))) << (7 - ((lsb))))) >>
       (7 - ((lsb))));
  return r;
}


x86 assembly (clang, -O0):
<us_bits_get_octet_bitfield>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <us_bits_get_octet@plt>
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    -0x14(%rbp),%edx
sub    -0x10(%rbp),%edx
add    $0x1,%edx
mov    $0x8,%ecx
sub    %edx,%ecx
mov    $0xff,%edx
sar    %cl,%edx
mov    $0x7,%ecx
sub    -0x14(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
mov    $0x7,%ecx
sub    -0x14(%rbp),%ecx
sar    %cl,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<us_bits_get_octet_bitfield>:
push   %rbp
push   %rbx
push   %rax
mov    %ecx,%ebx
mov    %edx,%ebp
call   1030 <us_bits_get_octet@plt>
sub    %ebx,%ebp
add    $0x7,%bpl
mov    $0xff,%edx
mov    %ebp,%ecx
shr    %cl,%edx
mov    $0x7,%cl
sub    %bl,%cl
shl    %cl,%edx
and    %edx,%eax
sar    %cl,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @us_bits_get_octet_bitfield(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%11 = load i8*, i8** %5
%12 = load i32, i32* %6
%13 = call i32 @us_bits_get_octet(i8* %11, i32 %12)
store i32 %13, i32* %9
%14 = load i32, i32* %9
%15 = load i32, i32* %8
%16 = load i32, i32* %7
%17 = sub nsw i32 %15, %16
%18 = add nsw i32 %17, 1
%19 = sub nsw i32 8, %18
%20 = ashr i32 255, %19
%21 = load i32, i32* %8
%22 = sub nsw i32 7, %21
%23 = shl i32 %20, %22
%24 = and i32 %14, %23
%25 = load i32, i32* %8
%26 = sub nsw i32 7, %25
%27 = ashr i32 %24, %26
store i32 %27, i32* %10
%28 = load i32, i32* %10
ret i32 %28
}

LLVM IR (-O2):
define i32 @us_bits_get_octet_bitfield(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @us_bits_get_octet(i8* %0, i32 %1)
%6 = add i32 %2, 7
%7 = sub i32 %6, %3
%8 = lshr i32 255, %7
%9 = sub nsw i32 7, %3
%10 = shl i32 %8, %9
%11 = and i32 %5, %10
%12 = ashr i32 %11, %9
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ strltrim(char *);
int /*<<< orphan*/ strrtrim(char *);
char *strtrim(char *s) {
  strltrim(s);
  strrtrim(s);
  return s;
}


x86 assembly (clang, -O0):
<strtrim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strltrim@plt>
mov    -0x8(%rbp),%rdi
call   1030 <strrtrim@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtrim>:
push   %rbx
mov    %rdi,%rbx
call   1040 <strltrim@plt>
mov    %rbx,%rdi
call   1030 <strrtrim@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @strtrim(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strltrim(i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @strrtrim(i8* %5)
%7 = load i8*, i8** %2
ret i8* %7
}

LLVM IR (-O2):
define i8* @strtrim(i8* returned %0) {
%2 = tail call i32 @strltrim(i8* %0)
%3 = tail call i32 @strrtrim(i8* %0)
ret i8* %0
}
short movsi(void) { return (short)0x7070; }


x86 assembly (clang, -O0):
<movsi>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7070,%ax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<movsi>:
mov    $0x7070,%ax
ret

LLVM IR (-O0):
define signext i16 @movsi() {
ret i16 28784
}

LLVM IR (-O2):
define signext i16 @movsi() {
ret i16 28784
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void AT91F_SpuriousHandler() {
  puts("ISI");
  while (1)
    ;
}


x86 assembly (clang, -O0):
<AT91F_SpuriousHandler>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
jmp    1120 <AT91F_SpuriousHandler+0x10>

x86 assembly (clang, -O2):
<AT91F_SpuriousHandler>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
nopl   (%rax)
jmp    1120 <AT91F_SpuriousHandler+0x10>

LLVM IR (-O0):
@.str = [4 x i8] c"ISI\00"
define void @AT91F_SpuriousHandler() {
%1 = call i32 @puts(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
@.str = [4 x i8] c"ISI\00"
define void @AT91F_SpuriousHandler() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
br label %2
2: ; preds = %0, %2
br label %2
}
int C_Utils_compare_ushort(const unsigned short item1,
                           const unsigned short item2) {
  if (item1 == item2)
    return 0;
  return item1 < item2 ? -1 : 1;
}


x86 assembly (clang, -O0):
<C_Utils_compare_ushort>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
movzwl -0x6(%rbp),%eax
movzwl -0x8(%rbp),%ecx
cmp    %ecx,%eax
jne    112e <C_Utils_compare_ushort+0x2e>
movl   $0x0,-0x4(%rbp)
jmp    1148 <C_Utils_compare_ushort+0x48>
movzwl -0x6(%rbp),%edx
movzwl -0x8(%rbp),%esi
mov    $0x1,%eax
mov    $0xffffffff,%ecx
cmp    %esi,%edx
cmovl  %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<C_Utils_compare_ushort>:
xor    %ecx,%ecx
xor    %eax,%eax
cmp    %si,%di
setae  %al
lea    -0x1(%rax,%rax,1),%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @C_Utils_compare_ushort(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i32
%4 = alloca i16
%5 = alloca i16
store i16 %0, i16* %4
store i16 %1, i16* %5
%6 = load i16, i16* %4
%7 = zext i16 %6 to i32
%8 = load i16, i16* %5
%9 = zext i16 %8 to i32
%10 = icmp eq i32 %7, %9
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 0, i32* %3
br label %20
12: ; preds = %2
%13 = load i16, i16* %4
%14 = zext i16 %13 to i32
%15 = load i16, i16* %5
%16 = zext i16 %15 to i32
%17 = icmp slt i32 %14, %16
%18 = zext i1 %17 to i64
%19 = select i1 %17, i32 -1, i32 1
store i32 %19, i32* %3
br label %20
20: ; preds = %12, %11
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @C_Utils_compare_ushort(i16 zeroext %0, i16 zeroext %1) {
%3 = icmp eq i16 %0, %1
%4 = icmp ult i16 %0, %1
%5 = select i1 %4, i32 -1, i32 1
%6 = select i1 %3, i32 0, i32 %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ prinfo(char *);
void print_banner(void) {
  prinfo("Catalyst PCIBX32 PCI Extender control utility version "
         "VERSION_"
         "\n"
         "\n"
         "Copyright 2006-2009 Michael Buesch <mb@bu3sch.de>\n"
         "Licensed under the GNU General Public License v2+\n"
         "\n");
}


x86 assembly (clang, -O0):
<print_banner>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <prinfo@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_banner>:
lea    0xee9(%rip),%rdi
jmp    1030 <prinfo@plt>

LLVM IR (-O0):
@.str = [166 x i8] c"Catalyst PCIBX32 PCI Extender control utility version VERSION_\0A\0ACopyright 2006-2009 Michael Buesch <mb@bu3sch.de>\0ALicensed under the GNU General Public License v2+\0A\0A\00"
define void @print_banner() {
%1 = call i32 @prinfo(i8* getelementptr inbounds ([166 x i8], [166 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [166 x i8] c"Catalyst PCIBX32 PCI Extender control utility version VERSION_\0A\0ACopyright 2006-2009 Michael Buesch <mb@bu3sch.de>\0ALicensed under the GNU General Public License v2+\0A\0A\00"
define void @print_banner() {
%1 = tail call i32 @prinfo(i8* getelementptr inbounds ([166 x i8], [166 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int /*<<< orphan*/);
int /*<<< orphan*/ hier();
main() {
  hier();
  _exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <hier@plt>
xor    %edi,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <hier@plt>
xor    %edi,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @hier()
%3 = call i32 @_exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @hier()
%2 = tail call i32 @_exit(i32 0)
unreachable
}
/* Variables and functions */
int keep_alive();
int /*<<< orphan*/ wd_action(int, char *, char *);
void do_check(int res, char *rbinary, char *name) {
  wd_action(res, rbinary, name);
  wd_action(keep_alive(), rbinary, NULL);
}


x86 assembly (clang, -O0):
<do_check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <wd_action@plt>
mov    $0x0,%al
call   1030 <keep_alive@plt>
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1040 <wd_action@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_check>:
push   %rbx
mov    %rsi,%rbx
call   1040 <wd_action@plt>
xor    %eax,%eax
call   1030 <keep_alive@plt>
mov    %eax,%edi
mov    %rbx,%rsi
xor    %edx,%edx
pop    %rbx
jmp    1040 <wd_action@plt>

LLVM IR (-O0):
define void @do_check(i32 %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = call i32 @wd_action(i32 %7, i8* %8, i8* %9)
%11 = call i32 (...) @keep_alive()
%12 = load i8*, i8** %5
%13 = call i32 @wd_action(i32 %11, i8* %12, i8* null)
ret void
}

LLVM IR (-O2):
define void @do_check(i32 %0, i8* %1, i8* %2) {
%4 = tail call i32 @wd_action(i32 %0, i8* %1, i8* %2)
%5 = tail call i32 (...) @keep_alive()
%6 = tail call i32 @wd_action(i32 %5, i8* %1, i8* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int gnt_net_encode(char *a_pszDst, int *a_piDst, const char *a_pszSrc,
                   int a_iSrc) {
  assert(a_pszDst && a_piDst && a_pszSrc && a_iSrc);
  return 0;
}


x86 assembly (clang, -O0):
<gnt_net_encode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x1d(%rbp)
je     1161 <gnt_net_encode+0x51>
xor    %eax,%eax
cmpq   $0x0,-0x10(%rbp)
mov    %al,-0x1d(%rbp)
je     1161 <gnt_net_encode+0x51>
xor    %eax,%eax
cmpq   $0x0,-0x18(%rbp)
mov    %al,-0x1d(%rbp)
je     1161 <gnt_net_encode+0x51>
cmpl   $0x0,-0x1c(%rbp)
setne  %al
mov    %al,-0x1d(%rbp)
mov    -0x1d(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gnt_net_encode>:
push   %rax
test   %rdi,%rdi
setne  %dil
test   %rsi,%rsi
setne  %al
and    %dil,%al
test   %rdx,%rdx
setne  %dl
test   %ecx,%ecx
setne  %cl
and    %dl,%cl
and    %al,%cl
movzbl %cl,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gnt_net_encode(i8* %0, i32* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i32* %1, i32** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %20
11: ; preds = %4
%12 = load i32*, i32** %6
%13 = icmp ne i32* %12, null
br i1 %13, label %14, label %20
14: ; preds = %11
%15 = load i8*, i8** %7
%16 = icmp ne i8* %15, null
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, i32* %8
%19 = icmp ne i32 %18, 0
br label %20
20: ; preds = %17, %14, %11, %4
%21 = phi i1 [ false, %14 ], [ false, %11 ], [ false, %4 ], [ %19, %17 ]
%22 = zext i1 %21 to i32
%23 = call i32 @assert(i32 %22)
ret i32 0
}

LLVM IR (-O2):
define i32 @gnt_net_encode(i8* readnone %0, i32* readnone %1, i8* readnone %2, i32 %3) {
%5 = icmp ne i8* %0, null
%6 = icmp ne i32* %1, null
%7 = and i1 %5, %6
%8 = icmp ne i8* %2, null
%9 = and i1 %7, %8
%10 = icmp ne i32 %3, 0
%11 = and i1 %9, %10
%12 = zext i1 %11 to i32
%13 = tail call i32 @assert(i32 %12)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int vsnprintf(char *, size_t, char const *, int /*<<< orphan*/);
int acl_secure_vsnprintf(char *buf, size_t size, const char *fmt, va_list ap) {
  int ret;
  ret = vsnprintf(buf, size, fmt, ap);
  return (ret);
}


x86 assembly (clang, -O0):
<acl_secure_vsnprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <vsnprintf@plt>
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acl_secure_vsnprintf>:
jmp    1030 <vsnprintf@plt>

LLVM IR (-O0):
define i32 @acl_secure_vsnprintf(i8* %0, i64 %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%10 = load i8*, i8** %5
%11 = load i64, i64* %6
%12 = load i8*, i8** %7
%13 = load i32, i32* %8
%14 = call i32 @vsnprintf(i8* %10, i64 %11, i8* %12, i32 %13)
store i32 %14, i32* %9
%15 = load i32, i32* %9
ret i32 %15
}

LLVM IR (-O2):
define i32 @acl_secure_vsnprintf(i8* nocapture %0, i64 %1, i8* nocapture %2, i32 %3) {
%5 = tail call i32 @vsnprintf(i8* %0, i64 %1, i8* %2, i32 %3)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ steer(int);
void steer_left() { steer(2048); }


x86 assembly (clang, -O0):
<steer_left>:
push   %rbp
mov    %rsp,%rbp
mov    $0x800,%edi
call   1030 <steer@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<steer_left>:
mov    $0x800,%edi
jmp    1030 <steer@plt>

LLVM IR (-O0):
define void @steer_left() {
%1 = call i32 @steer(i32 2048)
ret void
}

LLVM IR (-O2):
define void @steer_left() {
%1 = tail call i32 @steer(i32 2048)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *);
scalar_t__ strlen(char *);
void cmdline_parser_print_version(void) {
  printf("%s %s\n", (strlen("petri") ? "petri" : "petri"), "4.02");
}


x86 assembly (clang, -O0):
<cmdline_parser_print_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xedc(%rip),%rdi
call   1030 <strlen@plt>
lea    0xed0(%rip),%rsi
cmp    $0x0,%rax
cmovne %rsi,%rsi
lea    0xeba(%rip),%rdi
lea    0xec0(%rip),%rdx
call   1040 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmdline_parser_print_version>:
lea    0xee9(%rip),%rdi
lea    0xee9(%rip),%rsi
lea    0xee8(%rip),%rdx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"%s %s\0A\00"
@.str.1 = [6 x i8] c"petri\00"
@.str.2 = [5 x i8] c"4.02\00"
define void @cmdline_parser_print_version() {
%1 = call i64 @strlen(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%2 = icmp ne i64 %1, 0
%3 = zext i1 %2 to i64
%4 = select i1 %2, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0)
%5 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %4, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"%s %s\0A\00"
@.str.1 = [6 x i8] c"petri\00"
@.str.2 = [5 x i8] c"4.02\00"
define void @cmdline_parser_print_version() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printBoard();
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, char *);
int continueOrNot() {
  char c[2];
  printBoard();
  printf("\npress ';' to continue or any other key to abort ");
  scanf("%1s", c);
  if (c[0] == ';') {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<continueOrNot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <printBoard@plt>
lea    0xeba(%rip),%rdi
call   1040 <printf@plt>
lea    -0x6(%rbp),%rsi
lea    0xedc(%rip),%rdi
call   1050 <scanf@plt>
movsbl -0x6(%rbp),%eax
cmp    $0x3b,%eax
jne    1174 <continueOrNot+0x44>
movl   $0x1,-0x4(%rbp)
jmp    117b <continueOrNot+0x4b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<continueOrNot>:
push   %rax
xor    %eax,%eax
call   1030 <printBoard@plt>
lea    0xec1(%rip),%rdi
call   1040 <printf@plt>
lea    0xee7(%rip),%rdi
lea    0x6(%rsp),%rsi
call   1050 <scanf@plt>
xor    %eax,%eax
cmpb   $0x3b,0x6(%rsp)
sete   %al
pop    %rcx
ret

LLVM IR (-O0):
@.str = [50 x i8] c"\0Apress ';' to continue or any other key to abort \00"
@.str.1 = [4 x i8] c"%1s\00"
define i32 @continueOrNot() {
%1 = alloca i32
%2 = alloca [2 x i8]
%3 = call i32 (...) @printBoard()
%4 = call i32 @printf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
%5 = getelementptr inbounds [2 x i8], [2 x i8]* %2, i64 0, i64 0
%6 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %5)
%7 = getelementptr inbounds [2 x i8], [2 x i8]* %2, i64 0, i64 0
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 59
br i1 %10, label %11, label %12
11: ; preds = %0
store i32 1, i32* %1
br label %13
12: ; preds = %0
store i32 0, i32* %1
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %1
ret i32 %14
}

LLVM IR (-O2):
@.str = [50 x i8] c"\0Apress ';' to continue or any other key to abort \00"
@.str.1 = [4 x i8] c"%1s\00"
define i32 @continueOrNot() {
%1 = alloca [2 x i8]
%2 = getelementptr inbounds [2 x i8], [2 x i8]* %1, i64 0, i64 0
%3 = tail call i32 (...) @printBoard()
%4 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %2)
%6 = load i8, i8* %2
%7 = icmp eq i8 %6, 59
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ c_nngeti(char *, int *);
void nngeti_(char *pnam, int *ival) { c_nngeti(pnam, ival); }


x86 assembly (clang, -O0):
<nngeti_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <c_nngeti@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nngeti_>:
jmp    1030 <c_nngeti@plt>

LLVM IR (-O0):
define void @nngeti_(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i32*, i32** %4
%7 = call i32 @c_nngeti(i8* %5, i32* %6)
ret void
}

LLVM IR (-O2):
define void @nngeti_(i8* %0, i32* %1) {
%3 = tail call i32 @c_nngeti(i8* %0, i32* %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef scalar_t__ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ *g_utf8_to_ucs4_fast(char const *, long, long *);
uint32_t *stringprep_utf8_to_ucs4(const char *str, ssize_t len,
                                  size_t *items_written) {
  return g_utf8_to_ucs4_fast(str, (long)len, (long *)items_written);
}


x86 assembly (clang, -O0):
<stringprep_utf8_to_ucs4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <g_utf8_to_ucs4_fast@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stringprep_utf8_to_ucs4>:
jmp    1030 <g_utf8_to_ucs4_fast@plt>

LLVM IR (-O0):
define i32* @stringprep_utf8_to_ucs4(i8* %0, i64 %1, i64* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64* %2, i64** %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load i64*, i64** %6
%10 = call i32* @g_utf8_to_ucs4_fast(i8* %7, i64 %8, i64* %9)
ret i32* %10
}

LLVM IR (-O2):
define i32* @stringprep_utf8_to_ucs4(i8* %0, i64 %1, i64* %2) {
%4 = tail call i32* @g_utf8_to_ucs4_fast(i8* %0, i64 %1, i64* %2)
ret i32* %4
}