xunge/DecIR huggingface dataset:
int cut(int length) {
  if (length % 2 == 0)
    return length / 2;
  else
    return length / 2 + 1;
}


x86 assembly (clang, -O0):
<cut>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    112e <cut+0x2e>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    113f <cut+0x3f>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cut>:
mov    %edi,%eax
shr    $0x1f,%eax
add    %edi,%eax
and    $0x1,%edi
sar    %eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @cut(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = srem i32 %4, 2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sdiv i32 %8, 2
store i32 %9, i32* %2
br label %14
10: ; preds = %1
%11 = load i32, i32* %3
%12 = sdiv i32 %11, 2
%13 = add nsw i32 %12, 1
store i32 %13, i32* %2
br label %14
14: ; preds = %10, %7
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @cut(i32 %0) {
%2 = and i32 %0, 1
%3 = sdiv i32 %0, 2
%4 = add nsw i32 %3, %2
ret i32 %4
}
void long_function_name() { func("%s: the function name", __func__); }


x86 assembly (clang, -O0):
<long_function_name>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xef4(%rip),%rsi
mov    $0x0,%al
call   1030 <func@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<long_function_name>:
lea    0xee9(%rip),%rdi
lea    0xef8(%rip),%rsi
xor    %eax,%eax
jmp    1030 <func@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"%s: the function name\00"
@__func__.long_function_name = [19 x i8] c"long_function_name\00"
define void @long_function_name() {
%1 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @func to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([19 x i8], [19 x i8]* @__func__.long_function_name, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"%s: the function name\00"
@__func__.long_function_name = [19 x i8] c"long_function_name\00"
define void @long_function_name() {
%1 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @func to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([19 x i8], [19 x i8]* @__func__.long_function_name, i64 0, i64 0))
ret void
}
int fn7(int x, int y) {
  int tem1 = ~(y & x);
  int tem2 = x | y;
  return tem1 & tem2;
}


x86 assembly (clang, -O0):
<fn7>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
and    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn7>:
mov    %edi,%eax
xor    %esi,%eax
ret

LLVM IR (-O0):
define i32 @fn7(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = load i32, i32* %3
%9 = and i32 %7, %8
%10 = xor i32 %9, -1
store i32 %10, i32* %5
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = or i32 %11, %12
store i32 %13, i32* %6
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = and i32 %14, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @fn7(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ gid_t;

/* Variables and functions */
int /*<<< orphan*/ getegid();
int getgroups(int gidsetsize, gid_t grouplist[]) {
  if (gidsetsize) {
    grouplist[0] = getegid();
  }
  return 1;
}


x86 assembly (clang, -O0):
<getgroups>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1138 <getgroups+0x28>
mov    $0x0,%al
call   1030 <getegid@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getgroups>:
test   %edi,%edi
je     1122 <getgroups+0x12>
push   %rbx
mov    %rsi,%rbx
xor    %eax,%eax
call   1030 <getegid@plt>
mov    %eax,(%rbx)
pop    %rbx
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @getgroups(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = call i32 (...) @getegid()
%9 = load i32*, i32** %4
%10 = getelementptr inbounds i32, i32* %9, i64 0
store i32 %8, i32* %10
br label %11
11: ; preds = %7, %2
ret i32 1
}

LLVM IR (-O2):
define i32 @getgroups(i32 %0, i32* nocapture writeonly %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 (...) @getegid()
store i32 %5, i32* %1
br label %6
6: ; preds = %4, %2
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ uart0_putc(char);
void uart0_puts(const char *s) {
  while (*s) {
    if (*s == '\n')
      uart0_putc('\r');
    uart0_putc(*s++);
  }
}


x86 assembly (clang, -O0):
<uart0_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     115f <uart0_puts+0x4f>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xa,%eax
jne    1143 <uart0_puts+0x33>
mov    $0xd,%edi
call   1030 <uart0_putc@plt>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <uart0_putc@plt>
jmp    111c <uart0_puts+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart0_puts>:
push   %rbx
mov    %rdi,%rbx
jmp    1139 <uart0_puts+0x29>
cs nopw 0x0(%rax,%rax,1)
mov    $0xd,%edi
call   1030 <uart0_putc@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
movsbl %al,%edi
call   1030 <uart0_putc@plt>
movzbl (%rbx),%eax
cmp    $0xa,%al
je     1120 <uart0_puts+0x10>
test   %al,%al
jne    112d <uart0_puts+0x1d>
pop    %rbx
ret

LLVM IR (-O0):
define void @uart0_puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %14, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %19
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 10
br i1 %11, label %12, label %14
12: ; preds = %7
%13 = call i32 @uart0_putc(i8 signext 13)
br label %14
14: ; preds = %12, %7
%15 = load i8*, i8** %2
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %2
%17 = load i8, i8* %15
%18 = call i32 @uart0_putc(i8 signext %17)
br label %3
19: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @uart0_puts(i8* nocapture %0) {
br label %2
2: ; preds = %8, %1
%3 = phi i8* [ %0, %1 ], [ %10, %8 ]
%4 = load i8, i8* %3
switch i8 %4, label %8 [
i8 0, label %12
i8 10, label %5
]
5: ; preds = %2
%6 = tail call i32 @uart0_putc(i8 signext 13)
%7 = load i8, i8* %3
br label %8
8: ; preds = %2, %5
%9 = phi i8 [ %4, %2 ], [ %7, %5 ]
%10 = getelementptr inbounds i8, i8* %3, i64 1
%11 = tail call i32 @uart0_putc(i8 signext %9)
br label %2
12: ; preds = %2
ret void
}
/* Variables and functions */
unsigned int strlen(char *);
long hash(char word[]) {
  long result = 42;
  for (unsigned int i = 0; i < strlen(word); i++) {
    result = result + (word[i] * (i + 1));
  }
  return result;
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x2a,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
cmp    %ecx,%eax
jae    1176 <hash+0x66>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
mov    -0x14(%rbp),%edx
movsbl (%rcx,%rdx,1),%ecx
mov    -0x14(%rbp),%edx
add    $0x1,%edx
imul   %edx,%ecx
mov    %ecx,%ecx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112b <hash+0x1b>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
mov    $0x2a,%r15d
test   %eax,%eax
je     114e <hash+0x3e>
xor    %ebx,%ebx
nopl   0x0(%rax)
movsbl (%r14,%rbx,1),%eax
add    $0x1,%rbx
imul   %ebx,%eax
add    %rax,%r15
mov    %r14,%rdi
call   1030 <strlen@plt>
mov    %eax,%eax
cmp    %rax,%rbx
jb     1130 <hash+0x20>
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
store i64 42, i64* %3
store i32 0, i32* %4
br label %5
5: ; preds = %23, %1
%6 = load i32, i32* %4
%7 = load i8*, i8** %2
%8 = call i32 @strlen(i8* %7)
%9 = icmp ult i32 %6, %8
br i1 %9, label %10, label %26
10: ; preds = %5
%11 = load i64, i64* %3
%12 = load i8*, i8** %2
%13 = load i32, i32* %4
%14 = zext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = load i32, i32* %4
%19 = add i32 %18, 1
%20 = mul i32 %17, %19
%21 = zext i32 %20 to i64
%22 = add nsw i64 %11, %21
store i64 %22, i64* %3
br label %23
23: ; preds = %10
%24 = load i32, i32* %4
%25 = add i32 %24, 1
store i32 %25, i32* %4
br label %5
26: ; preds = %5
%27 = load i64, i64* %3
ret i64 %27
}

LLVM IR (-O2):
define i64 @hash(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %6, %1
%5 = phi i64 [ 42, %1 ], [ %15, %6 ]
ret i64 %5
6: ; preds = %1, %6
%7 = phi i64 [ %12, %6 ], [ 0, %1 ]
%8 = phi i64 [ %15, %6 ], [ 42, %1 ]
%9 = getelementptr inbounds i8, i8* %0, i64 %7
%10 = load i8, i8* %9
%11 = sext i8 %10 to i64
%12 = add nuw nsw i64 %7, 1
%13 = mul i64 %12, %11
%14 = and i64 %13, 4294967295
%15 = add nuw nsw i64 %8, %14
%16 = tail call i32 @strlen(i8* %0)
%17 = zext i32 %16 to i64
%18 = icmp ult i64 %12, %17
br i1 %18, label %6, label %4
}
/* Variables and functions */
int symlink(char const *, char const *);
int fb_lfs_symlink(const char *existing, const char *new) {
  return (symlink(existing, new));
}


x86 assembly (clang, -O0):
<fb_lfs_symlink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <symlink@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb_lfs_symlink>:
jmp    1030 <symlink@plt>

LLVM IR (-O0):
define i32 @fb_lfs_symlink(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @symlink(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @fb_lfs_symlink(i8* %0, i8* %1) {
%3 = tail call i32 @symlink(i8* %0, i8* %1)
ret i32 %3
}
void SiiOsMhlTxInterruptEnable(void) {}


x86 assembly (clang, -O0):
<SiiOsMhlTxInterruptEnable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SiiOsMhlTxInterruptEnable>:
ret

LLVM IR (-O0):
define void @SiiOsMhlTxInterruptEnable() {
ret void
}

LLVM IR (-O2):
define void @SiiOsMhlTxInterruptEnable() {
ret void
}
double core___core__Int___Numeric__to_f(long self) {
  double var;
  double var1;
  var1 = (double)self;
  var = var1;
  goto RET_LABEL;
RET_LABEL:;
  return var;
}


x86 assembly (clang, -O0):
<core___core__Int___Numeric__to_f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cvtsi2sdq -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<core___core__Int___Numeric__to_f>:
cvtsi2sd %rdi,%xmm0
ret

LLVM IR (-O0):
define double @core___core__Int___Numeric__to_f(i64 %0) {
%2 = alloca i64
%3 = alloca double
%4 = alloca double
store i64 %0, i64* %2
%5 = load i64, i64* %2
%6 = sitofp i64 %5 to double
store double %6, double* %4
%7 = load double, double* %4
store double %7, double* %3
br label %8
8: ; preds = %1
%9 = load double, double* %3
ret double %9
}

LLVM IR (-O2):
define double @core___core__Int___Numeric__to_f(i64 %0) {
%2 = sitofp i64 %0 to double
ret double %2
}
void WatchdogIntClear(void) {
  (*((volatile unsigned long *)(0x40080000 + 0x0000000C))) = 0x00000001;
}


x86 assembly (clang, -O0):
<WatchdogIntClear>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4008000c,%eax
movq   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<WatchdogIntClear>:
movq   $0x1,0x4008000c
ret

LLVM IR (-O0):
define void @WatchdogIntClear() {
store volatile i64 1, i64* inttoptr (i64 1074266124 to i64*)
ret void
}

LLVM IR (-O2):
define void @WatchdogIntClear() {
store volatile i64 1, i64* inttoptr (i64 1074266124 to i64*)
ret void
}
void gui_ggz_embed_ensure_server(void) {}


x86 assembly (clang, -O0):
<gui_ggz_embed_ensure_server>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gui_ggz_embed_ensure_server>:
ret

LLVM IR (-O0):
define void @gui_ggz_embed_ensure_server() {
ret void
}

LLVM IR (-O2):
define void @gui_ggz_embed_ensure_server() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ variable_array;
typedef int /*<<< orphan*/ variable;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main(void) {
  int variable = 0;
  int variable_array[10] = {0};
  printf("Sizeof variable: %d\nSizeof array: %d\n", (int)sizeof(variable),
         (int)sizeof(variable_array));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x30(%rbp),%rdi
xor    %esi,%esi
mov    $0x28,%edx
call   1040 <memset@plt>
lea    0xeba(%rip),%rdi
mov    $0x4,%esi
mov    $0x28,%edx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x4,%esi
mov    $0x28,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [38 x i8] c"Sizeof variable: %d\0ASizeof array: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [10 x i32]
store i32 0, i32* %1
%3 = bitcast [10 x i32]* %2 to i8*
%4 = call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i32 4, i32 40)
ret i32 0
}

LLVM IR (-O2):
@.str = [38 x i8] c"Sizeof variable: %d\0ASizeof array: %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i32 4, i32 40)
ret i32 0
}
char prch(char ch) {
  if ((unsigned char)ch >= ' ')
    return ch;
  return '.';
}


x86 assembly (clang, -O0):
<prch>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
cmp    $0x20,%eax
jl     1122 <prch+0x22>
mov    -0x2(%rbp),%al
mov    %al,-0x1(%rbp)
jmp    1126 <prch+0x26>
movb   $0x2e,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<prch>:
cmp    $0x20,%dil
mov    $0x2e,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @prch(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = icmp sge i32 %5, 32
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i8, i8* %3
store i8 %8, i8* %2
br label %10
9: ; preds = %1
store i8 46, i8* %2
br label %10
10: ; preds = %9, %7
%11 = load i8, i8* %2
ret i8 %11
}

LLVM IR (-O2):
define signext i8 @prch(i8 signext %0) {
%2 = icmp ugt i8 %0, 31
%3 = select i1 %2, i8 %0, i8 46
ret i8 %3
}
/* Variables and functions */
int /*<<< orphan*/ freopen(char *, char *, int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
void init() { freopen("qc.in", "r", stdin); }


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edx
lea    0xedc(%rip),%rdi
lea    0xedb(%rip),%rsi
call   1030 <freopen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edx
lea    0xee0(%rip),%rdi
lea    0xedf(%rip),%rsi
jmp    1030 <freopen@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"qc.in\00"
@.str.1 = [2 x i8] c"r\00"
@stdin = global i32 0
define void @init() {
%1 = load i32, i32* @stdin
%2 = call i32 @freopen(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"qc.in\00"
@.str.1 = [2 x i8] c"r\00"
@stdin = global i32 0
define void @init() {
%1 = load i32, i32* @stdin
%2 = tail call i32 @freopen(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32 %1)
ret void
}
void wx11ci() {}


x86 assembly (clang, -O0):
<wx11ci>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wx11ci>:
ret

LLVM IR (-O0):
define void @wx11ci() {
ret void
}

LLVM IR (-O2):
define void @wx11ci() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ getch();
scalar_t__ isPrime(int);
int main() {
  int counter, numToFind = 10001, i;
  counter = 0;
  for (i = 2; counter < numToFind; i++) {
    if (isPrime(i)) {
      counter++;
    }
  }
  getch();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x2711,-0xc(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x2,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    117e <main+0x5e>
mov    -0x10(%rbp),%edi
call   1030 <isPrime@plt>
cmp    $0x0,%rax
je     116b <main+0x4b>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1170 <main+0x50>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1144 <main+0x24>
mov    $0x0,%al
call   1040 <getch@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
mov    $0x2,%ebx
nopw   0x0(%rax,%rax,1)
mov    %ebx,%edi
call   1030 <isPrime@plt>
add    $0x1,%ebx
cmp    $0x1,%rax
sbb    $0xffffffff,%ebp
cmp    $0x2711,%ebp
jb     1130 <main+0x10>
xor    %eax,%eax
call   1040 <getch@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 10001, i32* %3
store i32 0, i32* %2
store i32 2, i32* %4
br label %5
5: ; preds = %17, %0
%6 = load i32, i32* %2
%7 = load i32, i32* %3
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %20
9: ; preds = %5
%10 = load i32, i32* %4
%11 = call i64 @isPrime(i32 %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = load i32, i32* %2
%15 = add nsw i32 %14, 1
store i32 %15, i32* %2
br label %16
16: ; preds = %13, %9
br label %17
17: ; preds = %16
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %5
20: ; preds = %5
%21 = call i32 (...) @getch()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 2, %0 ], [ %6, %1 ]
%3 = phi i32 [ 0, %0 ], [ %8, %1 ]
%4 = tail call i64 @isPrime(i32 %2)
%5 = icmp ne i64 %4, 0
%6 = add nuw nsw i32 %2, 1
%7 = zext i1 %5 to i32
%8 = add nuw nsw i32 %3, %7
%9 = icmp ult i32 %8, 10001
br i1 %9, label %1, label %10
10: ; preds = %1
%11 = tail call i32 (...) @getch()
ret i32 0
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMRAD_set(void) { return U_WMRCORENONE_set("U_WMRAD"); }


x86 assembly (clang, -O0):
<U_WMRAD_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRAD_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMRAD\00"
define i8* @U_WMRAD_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMRAD\00"
define i8* @U_WMRAD_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Type definitions */
struct hdr_histogram {
  int dummy;
};
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
scalar_t__ hdr_count_at_index(struct hdr_histogram *, int /*<<< orphan*/);
int /*<<< orphan*/ non_zero_min(struct hdr_histogram *);
int64_t hdr_min(struct hdr_histogram *h) {
  if (0 < hdr_count_at_index(h, 0)) {
    return 0;
  }
  return non_zero_min(h);
}


x86 assembly (clang, -O0):
<hdr_min>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
call   1040 <hdr_count_at_index@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
jge    1151 <hdr_min+0x31>
movl   $0x0,-0x4(%rbp)
jmp    115d <hdr_min+0x3d>
mov    -0x10(%rbp),%rdi
call   1030 <non_zero_min@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdr_min>:
push   %rbx
mov    %rdi,%rbx
xor    %esi,%esi
call   1040 <hdr_count_at_index@plt>
test   %rax,%rax
jle    1134 <hdr_min+0x14>
xor    %eax,%eax
pop    %rbx
ret
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <non_zero_min@plt>

LLVM IR (-O0):
%struct.hdr_histogram = type { i32 }
define i32 @hdr_min(%struct.hdr_histogram* %0) {
%2 = alloca i32
%3 = alloca %struct.hdr_histogram*
store %struct.hdr_histogram* %0, %struct.hdr_histogram** %3
%4 = load %struct.hdr_histogram*, %struct.hdr_histogram** %3
%5 = call i64 @hdr_count_at_index(%struct.hdr_histogram* %4, i32 0)
%6 = icmp slt i64 0, %5
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %11
8: ; preds = %1
%9 = load %struct.hdr_histogram*, %struct.hdr_histogram** %3
%10 = call i32 @non_zero_min(%struct.hdr_histogram* %9)
store i32 %10, i32* %2
br label %11
11: ; preds = %8, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
%struct.hdr_histogram = type { i32 }
define i32 @hdr_min(%struct.hdr_histogram* %0) {
%2 = tail call i64 @hdr_count_at_index(%struct.hdr_histogram* %0, i32 0)
%3 = icmp sgt i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @non_zero_min(%struct.hdr_histogram* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ %5, %4 ], [ 0, %1 ]
ret i32 %7
}
void I420ToUYVY() {}


x86 assembly (clang, -O0):
<I420ToUYVY>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I420ToUYVY>:
ret

LLVM IR (-O0):
define void @I420ToUYVY() {
ret void
}

LLVM IR (-O2):
define void @I420ToUYVY() {
ret void
}
int isprint(int c) {}


x86 assembly (clang, -O0):
<isprint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isprint>:
ret

LLVM IR (-O0):
define i32 @isprint(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @isprint(i32 %0) {
ret i32 undef
}
int is_palindrome_help(const char *str, const int len) {
  if (len <= 1)
    return 1;
  return str[0] == str[len - 1] && is_palindrome_help(str + 1, len - 2);
}


x86 assembly (clang, -O0):
<is_palindrome_help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x1,-0x14(%rbp)
jg     1135 <is_palindrome_help+0x25>
movl   $0x1,-0x4(%rbp)
jmp    1181 <is_palindrome_help+0x71>
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
movslq %edx,%rdx
movsbl (%rax,%rdx,1),%edx
xor    %eax,%eax
cmp    %edx,%ecx
mov    %al,-0x15(%rbp)
jne    1176 <is_palindrome_help+0x66>
mov    -0x10(%rbp),%rdi
add    $0x1,%rdi
mov    -0x14(%rbp),%esi
sub    $0x2,%esi
call   1030 <is_palindrome_help@plt>
cmp    $0x0,%eax
setne  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_palindrome_help>:
push   %rax
mov    $0x1,%eax
cmp    $0x2,%esi
jl     113c <is_palindrome_help+0x2c>
mov    (%rdi),%cl
lea    -0x1(%rsi),%edx
xor    %eax,%eax
cmp    (%rdi,%rdx,1),%cl
jne    113c <is_palindrome_help+0x2c>
add    $0x1,%rdi
add    $0xfffffffe,%esi
call   1030 <is_palindrome_help@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
setne  %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @is_palindrome_help(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp sle i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 1, i32* %3
br label %32
9: ; preds = %2
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i64 0
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = load i8*, i8** %4
%15 = load i32, i32* %5
%16 = sub nsw i32 %15, 1
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %14, i64 %17
%19 = load i8, i8* %18
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %13, %20
br i1 %21, label %22, label %29
22: ; preds = %9
%23 = load i8*, i8** %4
%24 = getelementptr inbounds i8, i8* %23, i64 1
%25 = load i32, i32* %5
%26 = sub nsw i32 %25, 2
%27 = call i32 @is_palindrome_help(i8* %24, i32 %26)
%28 = icmp ne i32 %27, 0
br label %29
29: ; preds = %22, %9
%30 = phi i1 [ false, %9 ], [ %28, %22 ]
%31 = zext i1 %30 to i32
store i32 %31, i32* %3
br label %32
32: ; preds = %29, %8
%33 = load i32, i32* %3
ret i32 %33
}

LLVM IR (-O2):
define i32 @is_palindrome_help(i8* nocapture %0, i32 %1) {
%3 = icmp slt i32 %1, 2
br i1 %3, label %11, label %4
4: ; preds = %2
%5 = load i8, i8* %0
%6 = add nsw i32 %1, -1
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
%10 = icmp eq i8 %5, %9
br i1 %10, label %13, label %11
11: ; preds = %2, %4, %13
%12 = phi i32 [ %18, %13 ], [ 1, %2 ], [ 0, %4 ]
ret i32 %12
13: ; preds = %4
%14 = getelementptr inbounds i8, i8* %0, i64 1
%15 = add nsw i32 %1, -2
%16 = tail call i32 @is_palindrome_help(i8* %14, i32 %15)
%17 = icmp ne i32 %16, 0
%18 = zext i1 %17 to i32
br label %11
}
int structInProto(struct DataType {
  int a;
  int b;
} * d) {
  return 0;
}


x86 assembly (clang, -O0):
<structInProto>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<structInProto>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.DataType = type { i32, i32 }
define i32 @structInProto(%struct.DataType* %0) {
%2 = alloca %struct.DataType*
store %struct.DataType* %0, %struct.DataType** %2
ret i32 0
}

LLVM IR (-O2):
%struct.DataType = type { i32, i32 }
define i32 @structInProto(%struct.DataType* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stdout;
void usage(char *argv[]) {
  fprintf(stdout, "Usage: %s path_to_unix_pipe\n\n", argv[0]);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
lea    0xecd(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%eax
mov    (%rdi),%rdx
lea    0xedd(%rip),%rsi
mov    %eax,%edi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [30 x i8] c"Usage: %s path_to_unix_pipe\0A\0A\00"
define void @usage(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i32, i32* @stdout
%4 = load i8**, i8*** %2
%5 = getelementptr inbounds i8*, i8** %4, i64 0
%6 = load i8*, i8** %5
%7 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* %6)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [30 x i8] c"Usage: %s path_to_unix_pipe\0A\0A\00"
define void @usage(i8** nocapture %0) {
%2 = load i32, i32* @stdout
%3 = load i8*, i8** %0
%4 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M144_f(char *s) {
  debug("M144_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M144_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M144_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M144_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M144_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M144_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M144_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
void l4(int a, int b, int c, int d) {}


x86 assembly (clang, -O0):
<l4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<l4>:
ret

LLVM IR (-O0):
define void @l4(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret void
}

LLVM IR (-O2):
define void @l4(i32 %0, i32 %1, i32 %2, i32 %3) {
ret void
}
OP(fd, e2) { op_e2(); }


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <op_e2@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
xor    %eax,%eax
jmp    1030 <op_e2@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @op_e2()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @op_e2()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ PIN_INT0_DriverIRQHandler();
__attribute__((weak)) void PIN_INT0_IRQHandler(void) {
  PIN_INT0_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<PIN_INT0_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <PIN_INT0_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PIN_INT0_IRQHandler>:
xor    %eax,%eax
jmp    1030 <PIN_INT0_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @PIN_INT0_IRQHandler() {
%1 = call i32 (...) @PIN_INT0_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @PIN_INT0_IRQHandler() {
%1 = tail call i32 (...) @PIN_INT0_DriverIRQHandler()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ strcat(char *, char *);
int main(void) {
  char str[80] = "hello worl";
  char d = 'd';
  strcat(str, &d);
  puts(str);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x60(%rbp),%rdi
lea    0xeb6(%rip),%rsi
mov    $0x50,%edx
call   1040 <memcpy@plt>
movb   $0x64,-0x61(%rbp)
lea    -0x60(%rbp),%rdi
lea    -0x61(%rbp),%rsi
call   1050 <strcat@plt>
lea    -0x60(%rbp),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x60,%rsp
movaps 0xf14(%rip),%xmm0
movaps %xmm0,0x50(%rsp)
movaps 0xef8(%rip),%xmm0
movaps %xmm0,0x40(%rsp)
movaps 0xedc(%rip),%xmm0
movaps %xmm0,0x30(%rsp)
movaps 0xec0(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xea4(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movb   $0x64,0xf(%rsp)
lea    0x10(%rsp),%rbx
lea    0xf(%rsp),%rsi
mov    %rbx,%rdi
call   1040 <strcat@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x60,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.str = [80 x i8] c"hello worl\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [80 x i8]
%3 = alloca i8
store i32 0, i32* %1
%4 = bitcast [80 x i8]* %2 to i8*
store i8 100, i8* %3
%5 = getelementptr inbounds [80 x i8], [80 x i8]* %2, i64 0, i64 0
%6 = call i32 @strcat(i8* %5, i8* %3)
%7 = getelementptr inbounds [80 x i8], [80 x i8]* %2, i64 0, i64 0
%8 = call i32 @puts(i8* %7)
ret i32 0
}

LLVM IR (-O2):
@__const.main.str = [80 x i8] c"hello worl\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00"
define i32 @main() {
%1 = alloca [80 x i8]
%2 = alloca i8
%3 = getelementptr inbounds [80 x i8], [80 x i8]* %1, i64 0, i64 0
store i8 100, i8* %2
%4 = call i32 @strcat(i8* %3, i8* %2)
%5 = call i32 @puts(i8* %3)
ret i32 0
}
/* Type definitions */
typedef int atomic_int;

/* Variables and functions */
int ATOMIC_VAR_INIT(int);
int /*<<< orphan*/ abort();
void test_xor(void) {
  atomic_int i = ATOMIC_VAR_INIT(5);
  i ^= 2;
  if (i != 7)
    abort();
  if ((i ^= 4) != 3)
    abort();
}


x86 assembly (clang, -O0):
<test_xor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x5,%edi
call   1040 <ATOMIC_VAR_INIT@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    $0x2,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x7,-0x4(%rbp)
je     114f <test_xor+0x2f>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x4(%rbp),%eax
xor    $0x4,%eax
mov    %eax,-0x4(%rbp)
cmp    $0x3,%eax
je     1168 <test_xor+0x48>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_xor>:
push   %rax
mov    $0x5,%edi
call   1040 <ATOMIC_VAR_INIT@plt>
cmp    $0x5,%eax
jne    1132 <test_xor+0x12>
pop    %rax
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @test_xor() {
%1 = alloca i32
%2 = call i32 @ATOMIC_VAR_INIT(i32 5)
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = xor i32 %3, 2
store i32 %4, i32* %1
%5 = load i32, i32* %1
%6 = icmp ne i32 %5, 7
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i32 (...) @abort()
unreachable
9: ; preds = %0
%10 = load i32, i32* %1
%11 = xor i32 %10, 4
store i32 %11, i32* %1
%12 = icmp ne i32 %11, 3
br i1 %12, label %13, label %15
13: ; preds = %9
%14 = call i32 (...) @abort()
unreachable
15: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @test_xor() {
%1 = tail call i32 @ATOMIC_VAR_INIT(i32 5)
%2 = icmp eq i32 %1, 5
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
ret void
}
int mywcs_lenn(const short *ucs2, const int maxlen) {
  int i;
  for (i = 0; ucs2[i] != 0 && i < maxlen; i++)
    ;
  return i;
}


x86 assembly (clang, -O0):
<mywcs_lenn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movswl (%rax,%rcx,2),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x11(%rbp)
je     1138 <mywcs_lenn+0x38>
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
setl   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    1148 <mywcs_lenn+0x48>
jmp    115b <mywcs_lenn+0x5b>
jmp    114d <mywcs_lenn+0x4d>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1112 <mywcs_lenn+0x12>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mywcs_lenn>:
movslq %esi,%rcx
xor    %edx,%edx
cs nopw 0x0(%rax,%rax,1)
nop
lea    0x1(%rdx),%rax
cmpw   $0x0,(%rdi,%rdx,2)
je     1123 <mywcs_lenn+0x23>
cmp    %rcx,%rdx
mov    %rax,%rdx
jl     1110 <mywcs_lenn+0x10>
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @mywcs_lenn(i16* %0, i32 %1) {
%3 = alloca i16*
%4 = alloca i32
%5 = alloca i32
store i16* %0, i16** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %21, %2
%7 = load i16*, i16** %3
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i16, i16* %7, i64 %9
%11 = load i16, i16* %10
%12 = sext i16 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %6
%15 = load i32, i32* %5
%16 = load i32, i32* %4
%17 = icmp slt i32 %15, %16
br label %18
18: ; preds = %14, %6
%19 = phi i1 [ false, %6 ], [ %17, %14 ]
br i1 %19, label %20, label %24
20: ; preds = %18
br label %21
21: ; preds = %20
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %6
24: ; preds = %18
%25 = load i32, i32* %5
ret i32 %25
}

LLVM IR (-O2):
define i32 @mywcs_lenn(i16* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
br label %4
4: ; preds = %4, %2
%5 = phi i64 [ %11, %4 ], [ 0, %2 ]
%6 = getelementptr inbounds i16, i16* %0, i64 %5
%7 = load i16, i16* %6
%8 = icmp ne i16 %7, 0
%9 = icmp slt i64 %5, %3
%10 = select i1 %8, i1 %9, i1 false
%11 = add nuw nsw i64 %5, 1
br i1 %10, label %4, label %12
12: ; preds = %4
%13 = trunc i64 %5 to i32
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ Swi_MLoad(int, int /*<<< orphan*/, int /*<<< orphan*/,
                             int /*<<< orphan*/);
void Swi_LedOn(void) { Swi_MLoad(128, 0, 0, 0); }


x86 assembly (clang, -O0):
<Swi_LedOn>:
push   %rbp
mov    %rsp,%rbp
mov    $0x80,%edi
xor    %ecx,%ecx
mov    %ecx,%esi
mov    %ecx,%edx
call   1030 <Swi_MLoad@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Swi_LedOn>:
mov    $0x80,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <Swi_MLoad@plt>

LLVM IR (-O0):
define void @Swi_LedOn() {
%1 = call i32 @Swi_MLoad(i32 128, i32 0, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @Swi_LedOn() {
%1 = tail call i32 @Swi_MLoad(i32 128, i32 0, i32 0, i32 0)
ret void
}
/* Type definitions */
typedef scalar_t__ pid_t;

/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
scalar_t__ fork();
int /*<<< orphan*/ printf(char *);
void main() {
  pid_t pid_01;
  pid_01 = fork();
  if (pid_01 > 0) {
    printf("father \n");
    exit(0);
  } else {
    printf("child \n");
    exit(0);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <fork@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jle    1161 <main+0x31>
lea    0xeab(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>
lea    0xea1(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <fork@plt>
test   %rax,%rax
jle    1146 <main+0x16>
lea    0xec3(%rip),%rdi
jmp    114d <main+0x1d>
lea    0xeb3(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"father \0A\00"
@.str.1 = [8 x i8] c"child \0A\00"
define void @main() {
%1 = alloca i64
%2 = call i64 (...) @fork()
store i64 %2, i64* %1
%3 = load i64, i64* %1
%4 = icmp sgt i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %0
%6 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @exit(i32 0)
unreachable
8: ; preds = %0
%9 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
%10 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [7 x i8] c"child \00"
@str.2 = [8 x i8] c"father \00"
define void @main() {
%1 = tail call i64 (...) @fork()
%2 = icmp sgt i64 %1, 0
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str.2, i64 0, i64 0))
%5 = tail call i32 @exit(i32 0)
unreachable
6: ; preds = %0
%7 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
%8 = tail call i32 @exit(i32 0)
unreachable
}
void INT_Excep_MTU10_TGIC10(void) {}


x86 assembly (clang, -O0):
<INT_Excep_MTU10_TGIC10>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_MTU10_TGIC10>:
ret

LLVM IR (-O0):
define void @INT_Excep_MTU10_TGIC10() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_MTU10_TGIC10() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int main() {
  int x = 0;
#pragma omp parallel
#pragma omp single
  {
#pragma omp task shared(x) depend(out : x)
    x = 1;
#pragma omp task shared(x) depend(out : x)
    x = 2;
#pragma omp taskwait
    if (x != 1 && x != 2)
      abort();
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x2,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
je     114f <main+0x3f>
cmpl   $0x2,-0x8(%rbp)
je     114f <main+0x3f>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 1, i32* %2
store i32 2, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 1
br i1 %4, label %5, label %10
5: ; preds = %0
%6 = load i32, i32* %2
%7 = icmp ne i32 %6, 2
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = call i32 (...) @abort()
unreachable
10: ; preds = %5, %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int lw_sock_peek_ex(int *, int);
int lw_sock_peek(int *sock, int len) {
  int result = 0;
  if (*sock >= 0) {
    result = lw_sock_peek_ex(sock, len);
  }
  return result;
}


x86 assembly (clang, -O0):
<lw_sock_peek>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0x0,(%rax)
jl     1142 <lw_sock_peek+0x32>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <lw_sock_peek_ex@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lw_sock_peek>:
cmpl   $0x0,(%rdi)
js     111a <lw_sock_peek+0xa>
jmp    1030 <lw_sock_peek_ex@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @lw_sock_peek(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
%8 = icmp sge i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i32*, i32** %3
%11 = load i32, i32* %4
%12 = call i32 @lw_sock_peek_ex(i32* %10, i32 %11)
store i32 %12, i32* %5
br label %13
13: ; preds = %9, %2
%14 = load i32, i32* %5
ret i32 %14
}

LLVM IR (-O2):
define i32 @lw_sock_peek(i32* %0, i32 %1) {
%3 = load i32, i32* %0
%4 = icmp sgt i32 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @lw_sock_peek_ex(i32* %0, i32 %1)
br label %7
7: ; preds = %5, %2
%8 = phi i32 [ %6, %5 ], [ 0, %2 ]
ret i32 %8
}
void get_string(char *dest, char **msg) {
  while (1) {
    *dest = **msg;
    (*msg)++;
    if (!(*dest))
      break;
    dest++;
  }
}


x86 assembly (clang, -O0):
<get_string>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
jne    113b <get_string+0x3b>
jmp    114c <get_string+0x4c>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110c <get_string+0xc>
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_string>:
mov    (%rsi),%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movzbl (%rax),%eax
mov    %al,(%rdi)
mov    (%rsi),%rax
add    $0x1,%rax
mov    %rax,(%rsi)
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <get_string+0x10>
ret

LLVM IR (-O0):
define void @get_string(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
br label %5
5: ; preds = %2, %17
%6 = load i8**, i8*** %4
%7 = load i8*, i8** %6
%8 = load i8, i8* %7
%9 = load i8*, i8** %3
store i8 %8, i8* %9
%10 = load i8**, i8*** %4
%11 = load i8*, i8** %10
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %10
%13 = load i8*, i8** %3
%14 = load i8, i8* %13
%15 = icmp ne i8 %14, 0
br i1 %15, label %17, label %16
16: ; preds = %5
br label %20
17: ; preds = %5
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
br label %5
20: ; preds = %16
ret void
}

LLVM IR (-O2):
define void @get_string(i8* nocapture %0, i8** nocapture %1) {
%3 = load i8*, i8** %1
br label %4
4: ; preds = %4, %2
%5 = phi i8* [ %3, %2 ], [ %9, %4 ]
%6 = phi i8* [ %0, %2 ], [ %12, %4 ]
%7 = load i8, i8* %5
store i8 %7, i8* %6
%8 = load i8*, i8** %1
%9 = getelementptr inbounds i8, i8* %8, i64 1
store i8* %9, i8** %1
%10 = load i8, i8* %6
%11 = icmp eq i8 %10, 0
%12 = getelementptr inbounds i8, i8* %6, i64 1
br i1 %11, label %13, label %4
13: ; preds = %4
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ om_html_entities_abbr(int /*<<< orphan*/ *, char *, int);
void om_html_entities(FILE *fp, char *s) { om_html_entities_abbr(fp, s, 100); }


x86 assembly (clang, -O0):
<om_html_entities>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x64,%edx
call   1030 <om_html_entities_abbr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<om_html_entities>:
mov    $0x64,%edx
jmp    1030 <om_html_entities_abbr@plt>

LLVM IR (-O0):
define void @om_html_entities(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = call i32 @om_html_entities_abbr(i32* %5, i8* %6, i32 100)
ret void
}

LLVM IR (-O2):
define void @om_html_entities(i32* %0, i8* %1) {
%3 = tail call i32 @om_html_entities_abbr(i32* %0, i8* %1, i32 100)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void terminaHijo(int sennal) { exit(0); }


x86 assembly (clang, -O0):
<terminaHijo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<terminaHijo>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @terminaHijo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @terminaHijo(i32 %0) {
%2 = tail call i32 @exit(i32 0)
unreachable
}
void test122_DynMemImpl_targetInit__I() {}


x86 assembly (clang, -O0):
<test122_DynMemImpl_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test122_DynMemImpl_targetInit__I>:
ret

LLVM IR (-O0):
define void @test122_DynMemImpl_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test122_DynMemImpl_targetInit__I() {
ret void
}