xunge/DecIR huggingface dataset:
/* Variables and functions */
long long floorf(float);
void floor_l_s(float *source, long long *dest) { *dest = floorf(*source); }


x86 assembly (clang, -O0):
<floor_l_s>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
call   1030 <floorf@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<floor_l_s>:
push   %rbx
mov    %rsi,%rbx
movss  (%rdi),%xmm0
call   1030 <floorf@plt>
mov    %rax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @floor_l_s(float* %0, i64* %1) {
%3 = alloca float*
%4 = alloca i64*
store float* %0, float** %3
store i64* %1, i64** %4
%5 = load float*, float** %3
%6 = load float, float* %5
%7 = call i64 @floorf(float %6)
%8 = load i64*, i64** %4
store i64 %7, i64* %8
ret void
}

LLVM IR (-O2):
define void @floor_l_s(float* nocapture %0, i64* nocapture writeonly %1) {
%3 = load float, float* %0
%4 = tail call i64 @floorf(float %3)
store i64 %4, i64* %1
ret void
}
void outn(n) { wrn(n); }


x86 assembly (clang, -O0):
<outn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1030 <wrn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outn>:
xor    %eax,%eax
jmp    1030 <wrn@plt>

LLVM IR (-O0):
define void @outn(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (i32, ...) bitcast (i32 (...)* @wrn to i32 (i32, ...)*)(i32 %3)
ret void
}

LLVM IR (-O2):
define void @outn(i32 %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @wrn to i32 (i32, ...)*)(i32 %0)
ret void
}
/* Type definitions */
struct t_hashtable {
  int dummy;
};
struct t_gui_window {
  int dummy;
};
struct t_gui_buffer {
  int dummy;
};
struct t_gui_bar_item {
  int dummy;
};

/* Variables and functions */
char *irc_bar_item_buffer_name_content(struct t_gui_buffer *,
                                       int /*<<< orphan*/);
char *irc_bar_item_buffer_name(void *data, struct t_gui_bar_item *item,
                               struct t_gui_window *window,
                               struct t_gui_buffer *buffer,
                               struct t_hashtable *extra_info) {
  (void)data;
  (void)item;
  (void)window;
  (void)extra_info;
  return irc_bar_item_buffer_name_content(buffer, 0);
}


x86 assembly (clang, -O0):
<irc_bar_item_buffer_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x20(%rbp),%rdi
xor    %esi,%esi
call   1030 <irc_bar_item_buffer_name_content@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irc_bar_item_buffer_name>:
mov    %rcx,%rdi
xor    %esi,%esi
jmp    1030 <irc_bar_item_buffer_name_content@plt>

LLVM IR (-O0):
%struct.t_gui_bar_item = type { i32 }
%struct.t_gui_window = type { i32 }
%struct.t_gui_buffer = type { i32 }
%struct.t_hashtable = type { i32 }
define i8* @irc_bar_item_buffer_name(i8* %0, %struct.t_gui_bar_item* %1, %struct.t_gui_window* %2, %struct.t_gui_buffer* %3, %struct.t_hashtable* %4) {
%6 = alloca i8*
%7 = alloca %struct.t_gui_bar_item*
%8 = alloca %struct.t_gui_window*
%9 = alloca %struct.t_gui_buffer*
%10 = alloca %struct.t_hashtable*
store i8* %0, i8** %6
store %struct.t_gui_bar_item* %1, %struct.t_gui_bar_item** %7
store %struct.t_gui_window* %2, %struct.t_gui_window** %8
store %struct.t_gui_buffer* %3, %struct.t_gui_buffer** %9
store %struct.t_hashtable* %4, %struct.t_hashtable** %10
%11 = load i8*, i8** %6
%12 = load %struct.t_gui_bar_item*, %struct.t_gui_bar_item** %7
%13 = load %struct.t_gui_window*, %struct.t_gui_window** %8
%14 = load %struct.t_hashtable*, %struct.t_hashtable** %10
%15 = load %struct.t_gui_buffer*, %struct.t_gui_buffer** %9
%16 = call i8* @irc_bar_item_buffer_name_content(%struct.t_gui_buffer* %15, i32 0)
ret i8* %16
}

LLVM IR (-O2):
%struct.t_gui_bar_item = type { i32 }
%struct.t_gui_window = type { i32 }
%struct.t_gui_buffer = type { i32 }
%struct.t_hashtable = type { i32 }
define i8* @irc_bar_item_buffer_name(i8* nocapture readnone %0, %struct.t_gui_bar_item* nocapture readnone %1, %struct.t_gui_window* nocapture readnone %2, %struct.t_gui_buffer* %3, %struct.t_hashtable* nocapture readnone %4) {
%6 = tail call i8* @irc_bar_item_buffer_name_content(%struct.t_gui_buffer* %3, i32 0)
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ merge_sort(int *, int);
char *test_merge_sort() {
  int arr[4] = {3, 2, 1, 0};
  merge_sort(arr, 4);
  int arr1[8] = {1, 5, 1, 52, 123, 321, 0, 99};
  merge_sort(arr1, 8);
  return 0;
}


x86 assembly (clang, -O0):
<test_merge_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0xee1(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xede(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    -0x10(%rbp),%rdi
mov    $0x4,%esi
call   1030 <merge_sort@plt>
mov    0xecd(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xec4(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    -0x30(%rbp),%rdi
mov    $0x8,%esi
call   1030 <merge_sort@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_merge_sort>:
sub    $0x38,%rsp
movaps 0xee5(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x4,%esi
call   1030 <merge_sort@plt>
movaps 0xeed(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xed1(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
lea    0x10(%rsp),%rdi
mov    $0x8,%esi
call   1030 <merge_sort@plt>
xor    %eax,%eax
add    $0x38,%rsp
ret

LLVM IR (-O0):
@__const.test_merge_sort.arr = [4 x i32] [i32 3, i32 2, i32 1, i32 0]
@__const.test_merge_sort.arr1 = [8 x i32] [i32 1, i32 5, i32 1, i32 52, i32 123, i32 321, i32 0, i32 99]
define i8* @test_merge_sort() {
%1 = alloca [4 x i32]
%2 = alloca [8 x i32]
%3 = bitcast [4 x i32]* %1 to i8*
%4 = getelementptr inbounds [4 x i32], [4 x i32]* %1, i64 0, i64 0
%5 = call i32 @merge_sort(i32* %4, i32 4)
%6 = bitcast [8 x i32]* %2 to i8*
%7 = getelementptr inbounds [8 x i32], [8 x i32]* %2, i64 0, i64 0
%8 = call i32 @merge_sort(i32* %7, i32 8)
ret i8* null
}

LLVM IR (-O2):
@__const.test_merge_sort.arr = [4 x i32] [i32 3, i32 2, i32 1, i32 0]
@__const.test_merge_sort.arr1 = [8 x i32] [i32 1, i32 5, i32 1, i32 52, i32 123, i32 321, i32 0, i32 99]
define noalias i8* @test_merge_sort() {
%1 = alloca [4 x i32]
%2 = alloca [8 x i32]
%3 = bitcast [4 x i32]* %1 to i8*
%4 = getelementptr inbounds [4 x i32], [4 x i32]* %1, i64 0, i64 0
%5 = call i32 @merge_sort(i32* %4, i32 4)
%6 = bitcast [8 x i32]* %2 to i8*
%7 = getelementptr inbounds [8 x i32], [8 x i32]* %2, i64 0, i64 0
%8 = call i32 @merge_sort(i32* %7, i32 8)
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ __cpuid(unsigned int, unsigned int, unsigned int,
                           unsigned int, unsigned int);
unsigned int cpuid_edx(unsigned int op) {
  unsigned int eax, ebx, ecx, edx;
  __cpuid(op, eax, ebx, ecx, edx);
  return edx;
}


x86 assembly (clang, -O0):
<cpuid_edx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
call   1030 <__cpuid@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuid_edx>:
jmp    1030 <__cpuid@plt>

LLVM IR (-O0):
define i32 @cpuid_edx(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %2
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = call i32 @__cpuid(i32 %7, i32 %8, i32 %9, i32 %10, i32 %11)
%13 = load i32, i32* %6
ret i32 %13
}

LLVM IR (-O2):
define i32 @cpuid_edx(i32 %0) {
%2 = tail call i32 @__cpuid(i32 %0, i32 undef, i32 undef, i32 undef, i32 undef)
ret i32 undef
}
/* Variables and functions */
scalar_t__ ft_check_argv(char **, int, int);
int ft_print_error();
int ft_error(int argc, char **argv) {
  if (argc != 10)
    return (ft_print_error());
  else if (ft_check_argv(argv, argc - 1, argc - 1) == 0)
    return (ft_print_error());
  return (1);
}


x86 assembly (clang, -O0):
<ft_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0xa,-0x8(%rbp)
je     1148 <ft_error+0x28>
mov    $0x0,%al
call   1040 <ft_print_error@plt>
mov    %eax,-0x4(%rbp)
jmp    1182 <ft_error+0x62>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%esi
sub    $0x1,%esi
mov    -0x8(%rbp),%edx
sub    $0x1,%edx
call   1030 <ft_check_argv@plt>
cmp    $0x0,%rax
jne    1176 <ft_error+0x56>
mov    $0x0,%al
call   1040 <ft_print_error@plt>
mov    %eax,-0x4(%rbp)
jmp    1182 <ft_error+0x62>
jmp    117b <ft_error+0x5b>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_error>:
cmp    $0xa,%edi
jne    1148 <ft_error+0x28>
push   %rax
mov    %rsi,%rdi
mov    $0x9,%esi
mov    $0x9,%edx
call   1030 <ft_check_argv@plt>
test   %rax,%rax
lea    0x8(%rsp),%rsp
je     1148 <ft_error+0x28>
mov    $0x1,%eax
ret
xor    %eax,%eax
jmp    1040 <ft_print_error@plt>

LLVM IR (-O0):
define i32 @ft_error(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 10
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 (...) @ft_print_error()
store i32 %9, i32* %3
br label %22
10: ; preds = %2
%11 = load i8**, i8*** %5
%12 = load i32, i32* %4
%13 = sub nsw i32 %12, 1
%14 = load i32, i32* %4
%15 = sub nsw i32 %14, 1
%16 = call i64 @ft_check_argv(i8** %11, i32 %13, i32 %15)
%17 = icmp eq i64 %16, 0
br i1 %17, label %18, label %20
18: ; preds = %10
%19 = call i32 (...) @ft_print_error()
store i32 %19, i32* %3
br label %22
20: ; preds = %10
br label %21
21: ; preds = %20
store i32 1, i32* %3
br label %22
22: ; preds = %21, %18, %8
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @ft_error(i32 %0, i8** %1) {
%3 = icmp eq i32 %0, 10
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = tail call i64 @ft_check_argv(i8** %1, i32 9, i32 9)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %4, %2
%8 = tail call i32 (...) @ft_print_error()
br label %9
9: ; preds = %7, %4
%10 = phi i32 [ 1, %4 ], [ %8, %7 ]
ret i32 %10
}
void test_creal(_Complex double d) {
  if (creal(d) != creal(d))
    link_failure_creal();
}


x86 assembly (clang, -O0):
<test_creal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x8(%rbp)
movsd  -0x10(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
jne    113d <test_creal+0x2d>
jp     113d <test_creal+0x2d>
jmp    1144 <test_creal+0x34>
mov    $0x0,%al
call   1030 <link_failure_creal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_creal>:
ucomisd %xmm0,%xmm0
jp     1117 <test_creal+0x7>
ret
xor    %eax,%eax
jmp    1030 <link_failure_creal@plt>

LLVM IR (-O0):
define void @test_creal(double %0, double %1) {
%3 = alloca { double, double }
%4 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 0
store double %0, double* %4
%5 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 1
store double %1, double* %5
%6 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 0
%7 = load double, double* %6
%8 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 1
%9 = load double, double* %8
%10 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 0
%11 = load double, double* %10
%12 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 1
%13 = load double, double* %12
%14 = fcmp une double %7, %11
br i1 %14, label %15, label %17
15: ; preds = %2
%16 = call i32 (...) @link_failure_creal()
br label %17
17: ; preds = %15, %2
ret void
}

LLVM IR (-O2):
define void @test_creal(double %0, double %1) {
%3 = fcmp uno double %0, 0.000000e+00
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 (...) @link_failure_creal()
br label %6
6: ; preds = %4, %2
ret void
}
/* Variables and functions */
int *malloc(int);
void PR6123() { int *x = malloc(11); }


x86 assembly (clang, -O0):
<PR6123>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xb,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PR6123>:
mov    $0xb,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define void @PR6123() {
%1 = alloca i32*
%2 = call i32* @malloc(i32 11)
store i32* %2, i32** %1
ret void
}

LLVM IR (-O2):
define void @PR6123() {
%1 = tail call i32* @malloc(i32 11)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ value;

/* Variables and functions */
int lgetxattr(char *, char *, char *, int);
int main(void) {
  char value[] = "valuestring";
  return lgetxattr("/some/path/to/somewhere", "name", value, sizeof(value));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xed8(%rip),%eax
mov    %eax,-0x8(%rbp)
lea    -0x10(%rbp),%rdx
lea    0xece(%rip),%rdi
lea    0xedf(%rip),%rsi
mov    $0xc,%ecx
call   1030 <lgetxattr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movabs $0x72747365756c6176,%rax
73 74 72
mov    %rax,0x8(%rsp)
movl   $0x676e69,0x10(%rsp)
lea    0xeda(%rip),%rdi
lea    0xeeb(%rip),%rsi
lea    0x8(%rsp),%rdx
mov    $0xc,%ecx
call   1030 <lgetxattr@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.value = [12 x i8] c"valuestring\00"
@.str = [24 x i8] c"/some/path/to/somewhere\00"
@.str.1 = [5 x i8] c"name\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [12 x i8]
store i32 0, i32* %1
%3 = bitcast [12 x i8]* %2 to i8*
%4 = getelementptr inbounds [12 x i8], [12 x i8]* %2, i64 0, i64 0
%5 = call i32 @lgetxattr(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* %4, i32 12)
ret i32 %5
}

LLVM IR (-O2):
@__const.main.value = [12 x i8] c"valuestring\00"
@.str = [24 x i8] c"/some/path/to/somewhere\00"
@.str.1 = [5 x i8] c"name\00"
define i32 @main() {
%1 = alloca [12 x i8]
%2 = getelementptr inbounds [12 x i8], [12 x i8]* %1, i64 0, i64 0
%3 = call i32 @lgetxattr(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* %2, i32 12)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ int8_t;

/* Variables and functions */
int /*<<< orphan*/ nrf_802154_pib_tx_power_set(int /*<<< orphan*/);
void nrf_802154_tx_power_set(int8_t power) {
  nrf_802154_pib_tx_power_set(power);
}


x86 assembly (clang, -O0):
<nrf_802154_tx_power_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <nrf_802154_pib_tx_power_set@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf_802154_tx_power_set>:
jmp    1030 <nrf_802154_pib_tx_power_set@plt>

LLVM IR (-O0):
define void @nrf_802154_tx_power_set(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @nrf_802154_pib_tx_power_set(i32 %3)
ret void
}

LLVM IR (-O2):
define void @nrf_802154_tx_power_set(i32 %0) {
%2 = tail call i32 @nrf_802154_pib_tx_power_set(i32 %0)
ret void
}
int my_open(int a) { return a; }


x86 assembly (clang, -O0):
<my_open>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_open>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @my_open(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @my_open(i32 returned %0) {
ret i32 %0
}
/* Type definitions */
typedef int /*<<< orphan*/ enemyStrength;

/* Variables and functions */
int minimalFatigue(int *, int *, int *);
void main() {
  int mgStrength[] = {2, 3, 5};
  int enemyStrength[] = {1, 3, 4};
  int enemyCount[] = {2, 9, 4};
  int len = sizeof(enemyStrength) / sizeof(enemyStrength[0]);
  int res = minimalFatigue(mgStrength, enemyStrength, enemyCount);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0xee1(%rip),%rax
mov    %rax,-0xc(%rbp)
mov    0xedf(%rip),%eax
mov    %eax,-0x4(%rbp)
mov    0xed9(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xed7(%rip),%eax
mov    %eax,-0x10(%rbp)
mov    0xed1(%rip),%rax
mov    %rax,-0x24(%rbp)
mov    0xecf(%rip),%eax
mov    %eax,-0x1c(%rbp)
movl   $0x3,-0x28(%rbp)
lea    -0xc(%rbp),%rdi
lea    -0x18(%rbp),%rsi
lea    -0x24(%rbp),%rdx
call   1030 <minimalFatigue@plt>
mov    %eax,-0x2c(%rbp)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x38,%rsp
mov    0xeee(%rip),%eax
mov    %eax,0x30(%rsp)
mov    0xedb(%rip),%rax
mov    %rax,0x28(%rsp)
mov    0xee4(%rip),%eax
mov    %eax,0x20(%rsp)
mov    0xed1(%rip),%rax
mov    %rax,0x18(%rsp)
mov    0xeda(%rip),%eax
mov    %eax,0x10(%rsp)
mov    0xec7(%rip),%rax
mov    %rax,0x8(%rsp)
lea    0x28(%rsp),%rdi
lea    0x18(%rsp),%rsi
lea    0x8(%rsp),%rdx
call   1030 <minimalFatigue@plt>
add    $0x38,%rsp
ret

LLVM IR (-O0):
@__const.main.mgStrength = [3 x i32] [i32 2, i32 3, i32 5]
@__const.main.enemyStrength = [3 x i32] [i32 1, i32 3, i32 4]
@__const.main.enemyCount = [3 x i32] [i32 2, i32 9, i32 4]
define void @main() {
%1 = alloca [3 x i32]
%2 = alloca [3 x i32]
%3 = alloca [3 x i32]
%4 = alloca i32
%5 = alloca i32
%6 = bitcast [3 x i32]* %1 to i8*
%7 = bitcast [3 x i32]* %2 to i8*
%8 = bitcast [3 x i32]* %3 to i8*
store i32 3, i32* %4
%9 = getelementptr inbounds [3 x i32], [3 x i32]* %1, i64 0, i64 0
%10 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 0
%11 = getelementptr inbounds [3 x i32], [3 x i32]* %3, i64 0, i64 0
%12 = call i32 @minimalFatigue(i32* %9, i32* %10, i32* %11)
store i32 %12, i32* %5
ret void
}

LLVM IR (-O2):
@__const.main.mgStrength = [3 x i32] [i32 2, i32 3, i32 5]
@__const.main.enemyStrength = [3 x i32] [i32 1, i32 3, i32 4]
@__const.main.enemyCount = [3 x i32] [i32 2, i32 9, i32 4]
define void @main() {
%1 = alloca [3 x i32]
%2 = alloca [3 x i32]
%3 = alloca [3 x i32]
%4 = bitcast [3 x i32]* %1 to i8*
%5 = bitcast [3 x i32]* %2 to i8*
%6 = bitcast [3 x i32]* %3 to i8*
%7 = getelementptr inbounds [3 x i32], [3 x i32]* %1, i64 0, i64 0
%8 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 0
%9 = getelementptr inbounds [3 x i32], [3 x i32]* %3, i64 0, i64 0
%10 = call i32 @minimalFatigue(i32* %7, i32* %8, i32* %9)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ io_delay();
int /*<<< orphan*/ outb(int /*<<< orphan*/, int);
void reset_coprocessor(void) {
  outb(0, 0xf0);
  io_delay();
  outb(0, 0xf1);
  io_delay();
}


x86 assembly (clang, -O0):
<reset_coprocessor>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0xf0,%esi
call   1040 <outb@plt>
mov    $0x0,%al
call   1030 <io_delay@plt>
xor    %edi,%edi
mov    $0xf1,%esi
call   1040 <outb@plt>
mov    $0x0,%al
call   1030 <io_delay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<reset_coprocessor>:
push   %rax
xor    %edi,%edi
mov    $0xf0,%esi
call   1040 <outb@plt>
xor    %eax,%eax
call   1030 <io_delay@plt>
xor    %edi,%edi
mov    $0xf1,%esi
call   1040 <outb@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <io_delay@plt>

LLVM IR (-O0):
define void @reset_coprocessor() {
%1 = call i32 @outb(i32 0, i32 240)
%2 = call i32 (...) @io_delay()
%3 = call i32 @outb(i32 0, i32 241)
%4 = call i32 (...) @io_delay()
ret void
}

LLVM IR (-O2):
define void @reset_coprocessor() {
%1 = tail call i32 @outb(i32 0, i32 240)
%2 = tail call i32 (...) @io_delay()
%3 = tail call i32 @outb(i32 0, i32 241)
%4 = tail call i32 (...) @io_delay()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_version() { printf("NPL Disassembler\n"); }


x86 assembly (clang, -O0):
<print_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_version>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"NPL Disassembler\0A\00"
define void @print_version() {
%1 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [17 x i8] c"NPL Disassembler\00"
define void @print_version() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
ret void
}
int isValidMem(unsigned long mem) {
  if (mem < (0xFEDE0000) || mem > (0xFEE08000 - 1))
    return 0;
  if (mem & 0x3)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<isValidMem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    $0xfede0000,%eax
cmp    %rax,-0x10(%rbp)
jb     1126 <isValidMem+0x26>
mov    $0xfee07fff,%eax
cmp    %rax,-0x10(%rbp)
jbe    1132 <isValidMem+0x32>
movl   $0x0,-0x4(%rbp)
jmp    1157 <isValidMem+0x57>
mov    -0x10(%rbp),%rax
and    $0x3,%rax
cmp    $0x0,%rax
je     1150 <isValidMem+0x50>
movl   $0x0,-0x4(%rbp)
jmp    1157 <isValidMem+0x57>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isValidMem>:
movabs $0xffffffff01220000,%rax
ff ff ff
add    %rdi,%rax
cmp    $0x28000,%rax
setb   %al
test   $0x3,%dil
sete   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @isValidMem(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp ult i64 %4, 4275961856
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i64, i64* %3
%8 = icmp ugt i64 %7, 4276125695
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 0, i32* %2
br label %16
10: ; preds = %6
%11 = load i64, i64* %3
%12 = and i64 %11, 3
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %10
store i32 0, i32* %2
br label %16
15: ; preds = %10
store i32 1, i32* %2
br label %16
16: ; preds = %15, %14, %9
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @isValidMem(i64 %0) {
%2 = add i64 %0, -4275961856
%3 = icmp ult i64 %2, 163840
%4 = and i64 %0, 3
%5 = icmp eq i64 %4, 0
%6 = and i1 %3, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int nondet();
void main() {
  int i, z, n;
  n = nondet();
  z = 0;
  for (i = 0; i < n; i++) {
    z -= i;
  }
  assert(z >= 0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <nondet@plt>
mov    %eax,-0xc(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1165 <main+0x45>
mov    -0x4(%rbp),%ecx
mov    -0x8(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1140 <main+0x20>
cmpl   $0x0,-0x8(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <nondet@plt>
test   %eax,%eax
jle    1148 <main+0x28>
lea    -0x1(%rax),%ecx
lea    -0x2(%rax),%edx
imul   %rcx,%rdx
shr    %rdx
lea    (%rax,%rdx,1),%edi
add    $0xfffffffe,%edi
shr    $0x1f,%edi
pop    %rax
jmp    1040 <assert@plt>
mov    $0x1,%edi
pop    %rax
jmp    1040 <assert@plt>

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = call i32 (...) @nondet()
store i32 %4, i32* %3
store i32 0, i32* %2
store i32 0, i32* %1
br label %5
5: ; preds = %13, %0
%6 = load i32, i32* %1
%7 = load i32, i32* %3
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %16
9: ; preds = %5
%10 = load i32, i32* %1
%11 = load i32, i32* %2
%12 = sub nsw i32 %11, %10
store i32 %12, i32* %2
br label %13
13: ; preds = %9
%14 = load i32, i32* %1
%15 = add nsw i32 %14, 1
store i32 %15, i32* %1
br label %5
16: ; preds = %5
%17 = load i32, i32* %2
%18 = icmp sge i32 %17, 0
%19 = zext i1 %18 to i32
%20 = call i32 @assert(i32 %19)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 (...) @nondet()
%2 = icmp sgt i32 %1, 0
br i1 %2, label %3, label %14
3: ; preds = %0
%4 = add nsw i32 %1, -1
%5 = zext i32 %4 to i33
%6 = add nsw i32 %1, -2
%7 = zext i32 %6 to i33
%8 = mul i33 %5, %7
%9 = lshr i33 %8, 1
%10 = trunc i33 %9 to i32
%11 = add nsw i32 %1, -2
%12 = add i32 %11, %10
%13 = lshr i32 %12, 31
br label %14
14: ; preds = %3, %0
%15 = phi i32 [ 1, %0 ], [ %13, %3 ]
%16 = tail call i32 @assert(i32 %15)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ CLOCK_SYS_GetBusClockFreq();
uint32_t CLOCK_SYS_GetPdbFreq(uint32_t instance) {
  (void)instance;
  return CLOCK_SYS_GetBusClockFreq();
}


x86 assembly (clang, -O0):
<CLOCK_SYS_GetPdbFreq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <CLOCK_SYS_GetBusClockFreq@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CLOCK_SYS_GetPdbFreq>:
xor    %eax,%eax
jmp    1030 <CLOCK_SYS_GetBusClockFreq@plt>

LLVM IR (-O0):
define i32 @CLOCK_SYS_GetPdbFreq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (...) @CLOCK_SYS_GetBusClockFreq()
ret i32 %4
}

LLVM IR (-O2):
define i32 @CLOCK_SYS_GetPdbFreq(i32 %0) {
%2 = tail call i32 (...) @CLOCK_SYS_GetBusClockFreq()
ret i32 %2
}
int main() {
  asm("main_label: .globl main_label");
  func01();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)

x86 assembly (clang, -O2):
<main>:
push   %rax

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @func01()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
tail call void asm sideeffect "main_label: .globl main_label", "~{dirflag},~{fpsr},~{flags}"()
%1 = tail call i32 (...) @func01()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ gen_call(char *);
void gen_twos_complement(void) { gen_call("__neg"); }


x86 assembly (clang, -O0):
<gen_twos_complement>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <gen_call@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_twos_complement>:
lea    0xee9(%rip),%rdi
jmp    1030 <gen_call@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"__neg\00"
define void @gen_twos_complement() {
%1 = call i32 @gen_call(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"__neg\00"
define void @gen_twos_complement() {
%1 = tail call i32 @gen_call(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct timeval {
  int tv_sec;
  long tv_usec;
};

/* Variables and functions */
long GetTimeval(struct timeval *tv) {
  return tv->tv_sec * 1000000 + tv->tv_usec;
}


x86 assembly (clang, -O0):
<GetTimeval>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
imul   $0xf4240,(%rax),%eax
cltq
mov    -0x8(%rbp),%rcx
add    0x8(%rcx),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetTimeval>:
movslq (%rdi),%rax
imul   $0xf4240,%rax,%rax
add    0x8(%rdi),%rax
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i64 }
define i64 @GetTimeval(%struct.timeval* %0) {
%2 = alloca %struct.timeval*
store %struct.timeval* %0, %struct.timeval** %2
%3 = load %struct.timeval*, %struct.timeval** %2
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i32 0, i32 0
%5 = load i32, i32* %4
%6 = mul nsw i32 %5, 1000000
%7 = sext i32 %6 to i64
%8 = load %struct.timeval*, %struct.timeval** %2
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %8, i32 0, i32 1
%10 = load i64, i64* %9
%11 = add nsw i64 %7, %10
ret i64 %11
}

LLVM IR (-O2):
%struct.timeval = type { i32, i64 }
define i64 @GetTimeval(%struct.timeval* nocapture %0) {
%2 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 1000000
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
%7 = load i64, i64* %6
%8 = add nsw i64 %7, %5
ret i64 %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n, repeticao, soma;
  scanf("%d", &n);
  for (repeticao = 1; repeticao <= n; repeticao++) {
    soma += repeticao;
  }
  printf("%d\n", soma);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1169 <main+0x49>
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1146 <main+0x26>
mov    -0x10(%rbp),%esi
lea    0xe90(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
store i32 1, i32* %3
br label %6
6: ; preds = %14, %0
%7 = load i32, i32* %3
%8 = load i32, i32* %2
%9 = icmp sle i32 %7, %8
br i1 %9, label %10, label %17
10: ; preds = %6
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = add nsw i32 %12, %11
store i32 %13, i32* %4
br label %14
14: ; preds = %10
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %6
17: ; preds = %6
%18 = load i32, i32* %4
%19 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %18)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = icmp sgt i32 %4, 0
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 undef)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint8_t;

/* Variables and functions */
uint8_t hci_event_inquiry_result_with_rssi_get_page_scan_repetition_mode(
    const uint8_t *event) {
  return event[9];
}


x86 assembly (clang, -O0):
<hci_event_inquiry_result_with_rssi_get_page_scan_repetition_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x24(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hci_event_inquiry_result_with_rssi_get_page_scan_repetition_mode>:
mov    0x24(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @hci_event_inquiry_result_with_rssi_get_page_scan_repetition_mode(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 9
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @hci_event_inquiry_result_with_rssi_get_page_scan_repetition_mode(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 9
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int Mqtt_HasIllegalCharacter(const char *str, size_t len) { return 0; }


x86 assembly (clang, -O0):
<Mqtt_HasIllegalCharacter>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Mqtt_HasIllegalCharacter>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Mqtt_HasIllegalCharacter(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @Mqtt_HasIllegalCharacter(i8* nocapture readnone %0, i64 %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ die(char *);
__attribute__((noreturn)) void usage(void) {
  die("Usage: build [-b] bootsect setup system [rootdev] [> image]");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <die@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <die@plt>

LLVM IR (-O0):
@.str = [60 x i8] c"Usage: build [-b] bootsect setup system [rootdev] [> image]\00"
define void @usage() {
%1 = call i32 @die(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str, i64 0, i64 0))
unreachable
}

LLVM IR (-O2):
@.str = [60 x i8] c"Usage: build [-b] bootsect setup system [rootdev] [> image]\00"
define void @usage() {
%1 = tail call i32 @die(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str, i64 0, i64 0))
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ DelayClk3(int);
void delay_us(int us) { DelayClk3(us * 500 / 8); }


x86 assembly (clang, -O0):
<delay_us>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x1f4,-0x4(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1030 <DelayClk3@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay_us>:
imul   $0x1f4,%edi,%eax
lea    0x7(%rax),%edi
test   %eax,%eax
cmovns %eax,%edi
sar    $0x3,%edi
jmp    1030 <DelayClk3@plt>

LLVM IR (-O0):
define void @delay_us(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 500
%5 = sdiv i32 %4, 8
%6 = call i32 @DelayClk3(i32 %5)
ret void
}

LLVM IR (-O2):
define void @delay_us(i32 %0) {
%2 = mul nsw i32 %0, 500
%3 = sdiv i32 %2, 8
%4 = tail call i32 @DelayClk3(i32 %3)
ret void
}
void rgbViewClean(struct LSD_SceneNodeInst const *inst, void *instData) {}


x86 assembly (clang, -O0):
<rgbViewClean>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgbViewClean>:
ret

LLVM IR (-O0):
%struct.LSD_SceneNodeInst = type opaque
define void @rgbViewClean(%struct.LSD_SceneNodeInst* %0, i8* %1) {
%3 = alloca %struct.LSD_SceneNodeInst*
%4 = alloca i8*
store %struct.LSD_SceneNodeInst* %0, %struct.LSD_SceneNodeInst** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
%struct.LSD_SceneNodeInst = type opaque
define void @rgbViewClean(%struct.LSD_SceneNodeInst* nocapture %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ft_putstr(char *);
int /*<<< orphan*/ write(int, char *, int);
void ft_putendl(char *str) {
  ft_putstr(str);
  write(1, "\n", 1);
}


x86 assembly (clang, -O0):
<ft_putendl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <ft_putstr@plt>
mov    $0x1,%edx
lea    0xebf(%rip),%rsi
mov    %edx,%edi
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putendl>:
push   %rax
call   1040 <ft_putstr@plt>
lea    0xed3(%rip),%rsi
mov    $0x1,%edi
mov    $0x1,%edx
pop    %rax
jmp    1030 <write@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @ft_putendl(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @ft_putstr(i8* %3)
%5 = call i32 @write(i32 1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"\0A\00"
define void @ft_putendl(i8* %0) {
%2 = tail call i32 @ft_putstr(i8* %0)
%3 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}
void __attribute__((constructor)) init() {
  printf("%s [%s]\n", __func__, "constructor");
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee7(%rip),%rsi
lea    0xee5(%rip),%rdx
mov    $0x0,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
lea    0xee9(%rip),%rdi
lea    0xeeb(%rip),%rsi
lea    0xee9(%rip),%rdx
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"%s [%s]\0A\00"
@__func__.init = [5 x i8] c"init\00"
@.str.1 = [12 x i8] c"constructor\00"
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @init, i8* null }]
define void @init() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @__func__.init, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"%s [%s]\0A\00"
@__func__.init = [5 x i8] c"init\00"
@.str.1 = [12 x i8] c"constructor\00"
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @init, i8* null }]
define void @init() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @__func__.init, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ getpid();
int /*<<< orphan*/ memset(char *, char, int);
int /*<<< orphan*/ sprintf(char *, char *, char *, int /*<<< orphan*/);
void createSocketName(char *user, char *dest) {
  memset(dest, '\0', 25 + 6);
  sprintf(dest, "./tmp/%s%d", user, getpid());
}


x86 assembly (clang, -O0):
<createSocketName>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
mov    $0x1f,%edx
call   1040 <memset@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    %eax,%ecx
lea    0xe88(%rip),%rsi
call   1050 <sprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<createSocketName>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
xor    %esi,%esi
mov    $0x1f,%edx
call   1040 <memset@plt>
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xea9(%rip),%rsi
mov    %rbx,%rdi
mov    %r14,%rdx
mov    %eax,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1050 <sprintf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"./tmp/%s%d\00"
define void @createSocketName(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @memset(i8* %5, i8 signext 0, i32 31)
%7 = load i8*, i8** %4
%8 = load i8*, i8** %3
%9 = call i32 (...) @getpid()
%10 = call i32 @sprintf(i8* %7, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %8, i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"./tmp/%s%d\00"
define void @createSocketName(i8* %0, i8* %1) {
%3 = tail call i32 @memset(i8* %1, i8 signext 0, i32 31)
%4 = tail call i32 (...) @getpid()
%5 = tail call i32 @sprintf(i8* dereferenceable(1) %1, i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %4)
ret void
}
/* Variables and functions */
float pi();
float deg(float rad) { return rad / pi() * 180.0; }


x86 assembly (clang, -O0):
<deg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <pi@plt>
movaps %xmm0,%xmm1
movss  -0x8(%rbp),%xmm0
divss  %xmm1,%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xeba(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<deg>:
push   %rax
movss  %xmm0,0x4(%rsp)
xor    %eax,%eax
call   1030 <pi@plt>
movss  0x4(%rsp),%xmm1
divss  %xmm0,%xmm1
mulss  0xed0(%rip),%xmm1
movaps %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @deg(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float (...) @pi()
%5 = fdiv float %3, %4
%6 = fpext float %5 to double
%7 = fmul double %6, 1.800000e+02
%8 = fptrunc double %7 to float
ret float %8
}

LLVM IR (-O2):
define float @deg(float %0) {
%2 = tail call float (...) @pi()
%3 = fdiv float %0, %2
%4 = fmul float %3, 1.800000e+02
ret float %4
}
int asal_sayi_bul(int kontrol_edilen_sayi) {
  int bolen_sayi;
  int sayinin_yarisi;
  sayinin_yarisi = kontrol_edilen_sayi / 2;
  for (bolen_sayi = 2; bolen_sayi <= sayinin_yarisi; bolen_sayi++) {
    if ((kontrol_edilen_sayi % bolen_sayi) == 0) {
      return 0;
    }
  }
  return 1;
}


x86 assembly (clang, -O0):
<asal_sayi_bul>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jg     1157 <asal_sayi_bul+0x57>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1144 <asal_sayi_bul+0x44>
movl   $0x0,-0x4(%rbp)
jmp    115e <asal_sayi_bul+0x5e>
jmp    1149 <asal_sayi_bul+0x49>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    111c <asal_sayi_bul+0x1c>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<asal_sayi_bul>:
mov    $0x1,%r8d
cmp    $0x4,%edi
jl     1137 <asal_sayi_bul+0x37>
mov    %edi,%esi
shr    %esi
neg    %esi
mov    $0x2,%ecx
cs nopw 0x0(%rax,%rax,1)
mov    %edi,%eax
cltd
idiv   %ecx
test   %edx,%edx
je     113b <asal_sayi_bul+0x3b>
lea    (%rsi,%rcx,1),%eax
add    $0x1,%eax
add    $0x1,%ecx
cmp    $0x1,%eax
jne    1120 <asal_sayi_bul+0x20>
mov    %r8d,%eax
ret
xor    %r8d,%r8d
mov    %r8d,%eax
ret

LLVM IR (-O0):
define i32 @asal_sayi_bul(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
%6 = load i32, i32* %3
%7 = sdiv i32 %6, 2
store i32 %7, i32* %5
store i32 2, i32* %4
br label %8
8: ; preds = %19, %1
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = icmp sle i32 %9, %10
br i1 %11, label %12, label %22
12: ; preds = %8
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = srem i32 %13, %14
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %12
store i32 0, i32* %2
br label %23
18: ; preds = %12
br label %19
19: ; preds = %18
%20 = load i32, i32* %4
%21 = add nsw i32 %20, 1
store i32 %21, i32* %4
br label %8
22: ; preds = %8
store i32 1, i32* %2
br label %23
23: ; preds = %22, %17
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @asal_sayi_bul(i32 %0) {
%2 = icmp slt i32 %0, 4
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = lshr i32 %0, 1
br label %8
5: ; preds = %8
%6 = add nuw nsw i32 %9, 1
%7 = icmp eq i32 %9, %4
br i1 %7, label %12, label %8
8: ; preds = %3, %5
%9 = phi i32 [ %6, %5 ], [ 2, %3 ]
%10 = srem i32 %0, %9
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %5
12: ; preds = %8, %5, %1
%13 = phi i32 [ 1, %1 ], [ 1, %5 ], [ 0, %8 ]
ret i32 %13
}
unsigned short axt_to_uint16(unsigned short axt_uint16) {
  unsigned char *buf = (unsigned char *)&axt_uint16;
  return (((unsigned int)buf[0]) << 8) + (((unsigned int)buf[1]));
}


x86 assembly (clang, -O0):
<axt_to_uint16>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
lea    -0x2(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
shl    $0x8,%eax
mov    -0x10(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
add    %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<axt_to_uint16>:
mov    %edi,%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define zeroext i16 @axt_to_uint16(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i8*
store i16 %0, i16* %2
%4 = bitcast i16* %2 to i8*
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 0
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = shl i32 %8, 8
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = add i32 %9, %13
%15 = trunc i32 %14 to i16
ret i16 %15
}

LLVM IR (-O2):
define zeroext i16 @axt_to_uint16(i16 zeroext %0) {
%2 = tail call i16 @llvm.bswap.i16(i16 %0)
ret i16 %2
}
int Int_bit_MINUS_shift_MINUS_right(int x, int y) { return x >> y; }


x86 assembly (clang, -O0):
<Int_bit_MINUS_shift_MINUS_right>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Int_bit_MINUS_shift_MINUS_right>:
mov    %esi,%ecx
mov    %edi,%eax
sar    %cl,%eax
ret

LLVM IR (-O0):
define i32 @Int_bit_MINUS_shift_MINUS_right(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = ashr i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @Int_bit_MINUS_shift_MINUS_right(i32 %0, i32 %1) {
%3 = ashr i32 %0, %1
ret i32 %3
}
int is_marked_ref(long i) { return (int)(i & 0x1L); }


x86 assembly (clang, -O0):
<is_marked_ref>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_marked_ref>:
mov    %rdi,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_marked_ref(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 1
%5 = trunc i64 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @is_marked_ref(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = and i32 %2, 1
ret i32 %3
}
void foo090() {}


x86 assembly (clang, -O0):
<foo090>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo090>:
ret

LLVM IR (-O0):
define void @foo090() {
ret void
}

LLVM IR (-O2):
define void @foo090() {
ret void
}
void emac_mdio_loopback_state(void) { return; }


x86 assembly (clang, -O0):
<emac_mdio_loopback_state>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emac_mdio_loopback_state>:
ret

LLVM IR (-O0):
define void @emac_mdio_loopback_state() {
ret void
}

LLVM IR (-O2):
define void @emac_mdio_loopback_state() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exynos_5410_gpio_write_mask(unsigned int, unsigned int,
                                               unsigned int);
void odroid_xu_gpio_write_27(unsigned int data) {
  unsigned int bank_offset = 0x0C60;
  unsigned int bit_index = 1;
  exynos_5410_gpio_write_mask(bank_offset, ((data & 1U) << bit_index),
                              (1U << bit_index));
}


x86 assembly (clang, -O0):
<odroid_xu_gpio_write_27>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0xc60,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x4(%rbp),%esi
and    $0x1,%esi
mov    -0xc(%rbp),%ecx
shl    %cl,%esi
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
call   1030 <exynos_5410_gpio_write_mask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<odroid_xu_gpio_write_27>:
lea    (%rdi,%rdi,1),%esi
and    $0x2,%esi
mov    $0xc60,%edi
mov    $0x2,%edx
jmp    1030 <exynos_5410_gpio_write_mask@plt>

LLVM IR (-O0):
define void @odroid_xu_gpio_write_27(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 3168, i32* %3
store i32 1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = and i32 %6, 1
%8 = load i32, i32* %4
%9 = shl i32 %7, %8
%10 = load i32, i32* %4
%11 = shl i32 1, %10
%12 = call i32 @exynos_5410_gpio_write_mask(i32 %5, i32 %9, i32 %11)
ret void
}

LLVM IR (-O2):
define void @odroid_xu_gpio_write_27(i32 %0) {
%2 = shl i32 %0, 1
%3 = and i32 %2, 2
%4 = tail call i32 @exynos_5410_gpio_write_mask(i32 3168, i32 %3, i32 2)
ret void
}