xunge/DecIR huggingface dataset:
int rchild(int n) { return (2 * n) + 2; }


x86 assembly (clang, -O0):
<rchild>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
add    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rchild>:
lea    (%rdi,%rdi,1),%eax
add    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @rchild(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 2, %3
%5 = add nsw i32 %4, 2
ret i32 %5
}

LLVM IR (-O2):
define i32 @rchild(i32 %0) {
%2 = shl nsw i32 %0, 1
%3 = add nsw i32 %2, 2
ret i32 %3
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
uint16_t byteorder_bebuftohs(const uint8_t *buf) {
  return (uint16_t)((buf[0] << 8) | buf[1]);
}


x86 assembly (clang, -O0):
<byteorder_bebuftohs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
or     0x4(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<byteorder_bebuftohs>:
mov    (%rdi),%eax
shl    $0x8,%eax
or     0x4(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @byteorder_bebuftohs(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = shl i32 %5, 8
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = or i32 %6, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @byteorder_bebuftohs(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 8
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = or i32 %3, %5
ret i32 %6
}
/* Type definitions */
struct ast_bridge {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __ao2_lock(struct ast_bridge *, char const *, char const *,
                              int, char const *);
void _ast_bridge_lock(struct ast_bridge *bridge, const char *file,
                      const char *function, int line, const char *var) {
  __ao2_lock(bridge, file, function, line, var);
}


x86 assembly (clang, -O0):
<_ast_bridge_lock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    -0x28(%rbp),%r8
call   1030 <__ao2_lock@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ast_bridge_lock>:
jmp    1030 <__ao2_lock@plt>

LLVM IR (-O0):
%struct.ast_bridge = type { i32 }
define void @_ast_bridge_lock(%struct.ast_bridge* %0, i8* %1, i8* %2, i32 %3, i8* %4) {
%6 = alloca %struct.ast_bridge*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i8*
store %struct.ast_bridge* %0, %struct.ast_bridge** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i8* %4, i8** %10
%11 = load %struct.ast_bridge*, %struct.ast_bridge** %6
%12 = load i8*, i8** %7
%13 = load i8*, i8** %8
%14 = load i32, i32* %9
%15 = load i8*, i8** %10
%16 = call i32 @__ao2_lock(%struct.ast_bridge* %11, i8* %12, i8* %13, i32 %14, i8* %15)
ret void
}

LLVM IR (-O2):
%struct.ast_bridge = type { i32 }
define void @_ast_bridge_lock(%struct.ast_bridge* %0, i8* %1, i8* %2, i32 %3, i8* %4) {
%6 = tail call i32 @__ao2_lock(%struct.ast_bridge* %0, i8* %1, i8* %2, i32 %3, i8* %4)
ret void
}
long unsigned int fibonacci(int num) {
  if (num == 0)
    return 0;
  else if (num == 1)
    return 1;
  else
    return (fibonacci(num - 1) + fibonacci(num - 2));
}


x86 assembly (clang, -O0):
<fibonacci>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1132 <fibonacci+0x22>
movq   $0x0,-0x8(%rbp)
jmp    1171 <fibonacci+0x61>
cmpl   $0x1,-0xc(%rbp)
jne    1149 <fibonacci+0x39>
movq   $0x1,-0x8(%rbp)
jmp    1171 <fibonacci+0x61>
mov    -0xc(%rbp),%edi
sub    $0x1,%edi
call   1030 <fibonacci@plt>
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%edi
sub    $0x2,%edi
call   1030 <fibonacci@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibonacci>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %r14d,%r14d
test   %ebx,%ebx
je     1137 <fibonacci+0x27>
nopl   (%rax)
cmp    $0x1,%ebx
je     113b <fibonacci+0x2b>
lea    -0x1(%rbx),%edi
call   1030 <fibonacci@plt>
add    %rax,%r14
add    $0xfffffffe,%ebx
test   %ebx,%ebx
jne    1120 <fibonacci+0x10>
xor    %eax,%eax
jmp    1140 <fibonacci+0x30>
mov    $0x1,%eax
add    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @fibonacci(i32 %0) {
%2 = alloca i64
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 0, i64* %2
br label %19
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %7
store i64 1, i64* %2
br label %19
11: ; preds = %7
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 1
%14 = call i64 @fibonacci(i32 %13)
%15 = load i32, i32* %3
%16 = sub nsw i32 %15, 2
%17 = call i64 @fibonacci(i32 %16)
%18 = add i64 %14, %17
store i64 %18, i64* %2
br label %19
19: ; preds = %11, %10, %6
%20 = load i64, i64* %2
ret i64 %20
}

LLVM IR (-O2):
define i64 @fibonacci(i32 %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i64 [ 0, %1 ], [ %9, %5 ]
%4 = phi i32 [ %0, %1 ], [ %8, %5 ]
switch i32 %4, label %5 [
i32 0, label %10
i32 1, label %11
]
5: ; preds = %2
%6 = add nsw i32 %4, -1
%7 = tail call i64 @fibonacci(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add i64 %7, %3
br label %2
10: ; preds = %2
br label %11
11: ; preds = %2, %10
%12 = phi i64 [ 0, %10 ], [ 1, %2 ]
%13 = add i64 %12, %3
ret i64 %13
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;
struct TYPE_3__ {
  int /*<<< orphan*/ __sd;
};
typedef TYPE_1__ posix_spawnattr_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ *, int);
int posix_spawnattr_getsigdefault(const posix_spawnattr_t *attr,
                                  sigset_t *sigdefault) {
  memcpy(sigdefault, &attr->__sd, sizeof(sigset_t));
  return 0;
}


x86 assembly (clang, -O0):
<posix_spawnattr_getsigdefault>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<posix_spawnattr_getsigdefault>:
push   %rax
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.TYPE_3__ = type { i32 }
define i32 @posix_spawnattr_getsigdefault(%struct.TYPE_3__* %0, i32* %1) {
%3 = alloca %struct.TYPE_3__*
%4 = alloca i32*
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = load %struct.TYPE_3__*, %struct.TYPE_3__** %3
%7 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %6, i32 0, i32 0
%8 = call i32 @memcpy(i32* %5, i32* %7, i32 4)
ret i32 0
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i32 }
define i32 @posix_spawnattr_getsigdefault(%struct.TYPE_3__* %0, i32* %1) {
%3 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i64 0, i32 0
%4 = tail call i32 @memcpy(i32* %1, i32* %3, i32 4)
ret i32 0
}
unsigned int getCurrentPid() { return 0; }


x86 assembly (clang, -O0):
<getCurrentPid>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getCurrentPid>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @getCurrentPid() {
ret i32 0
}

LLVM IR (-O2):
define i32 @getCurrentPid() {
ret i32 0
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int /*<<< orphan*/ _time_counter();
int rand();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int32_t random_num_range(int minval) {
  srand(_time_counter());
  if (minval < 0)
    return (rand() % 30) + 30;
  return (rand() % minval) + minval;
}


x86 assembly (clang, -O0):
<random_num_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <_time_counter@plt>
mov    %eax,%edi
call   1040 <srand@plt>
cmpl   $0x0,-0x8(%rbp)
jge    116d <random_num_range+0x3d>
mov    $0x0,%al
call   1050 <rand@plt>
mov    $0x1e,%ecx
cltd
idiv   %ecx
add    $0x1e,%edx
mov    %edx,-0x4(%rbp)
jmp    117e <random_num_range+0x4e>
mov    $0x0,%al
call   1050 <rand@plt>
cltd
idivl  -0x8(%rbp)
add    -0x8(%rbp),%edx
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_num_range>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <_time_counter@plt>
mov    %eax,%edi
call   1040 <srand@plt>
xor    %eax,%eax
call   1050 <rand@plt>
test   %ebx,%ebx
mov    $0x1e,%ecx
cmovns %ebx,%ecx
cltd
idiv   %ecx
add    %edx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @random_num_range(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 (...) @_time_counter()
%5 = call i32 @srand(i32 %4)
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = call i32 (...) @rand()
%10 = srem i32 %9, 30
%11 = add nsw i32 %10, 30
store i32 %11, i32* %2
br label %18
12: ; preds = %1
%13 = call i32 (...) @rand()
%14 = load i32, i32* %3
%15 = srem i32 %13, %14
%16 = load i32, i32* %3
%17 = add nsw i32 %15, %16
store i32 %17, i32* %2
br label %18
18: ; preds = %12, %8
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @random_num_range(i32 %0) {
%2 = tail call i32 (...) @_time_counter()
%3 = tail call i32 @srand(i32 %2)
%4 = icmp slt i32 %0, 0
%5 = tail call i32 (...) @rand()
%6 = select i1 %4, i32 30, i32 %0
%7 = srem i32 %5, %6
%8 = add nsw i32 %7, %6
ret i32 %8
}
void delKeysInSlot(void) {
  _serverPanic("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/"
               "heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c",
               62, "Function '%s' is disabled.", __func__);
}


x86 assembly (clang, -O0):
<delKeysInSlot>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x3e,%esi
lea    0xf79(%rip),%rdx
lea    0xf8d(%rip),%rcx
mov    $0x0,%al
call   1030 <_serverPanic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<delKeysInSlot>:
lea    0xee9(%rip),%rdi
lea    0xf82(%rip),%rdx
lea    0xf96(%rip),%rcx
mov    $0x3e,%esi
xor    %eax,%eax
jmp    1030 <_serverPanic@plt>

LLVM IR (-O0):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.delKeysInSlot = [14 x i8] c"delKeysInSlot\00"
define void @delKeysInSlot() {
%1 = call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 62, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @__func__.delKeysInSlot, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.delKeysInSlot = [14 x i8] c"delKeysInSlot\00"
define void @delKeysInSlot() {
%1 = tail call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 62, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @__func__.delKeysInSlot, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sequential(int, int);
void ompss(int h, int j) {
#pragma analysis_check assert assert defined(square[h][j]) upper_exposed(      \
    square[h][j], square[h - 1][j], square[h][j], square[h][j - 1], h, j)
  sequential(h, j);
}


x86 assembly (clang, -O0):
<ompss>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <sequential@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ompss>:
jmp    1030 <sequential@plt>

LLVM IR (-O0):
define void @ompss(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @sequential(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @ompss(i32 %0, i32 %1) {
%3 = tail call i32 @sequential(i32 %0, i32 %1)
ret void
}
long scale_no(string, flag)
char *string[];
long *flag;
{
  *flag = 0L;
  return (1);
}


x86 assembly (clang, -O0):
<scale_no>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movq   $0x0,(%rax)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scale_no>:
movq   $0x0,(%rsi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i64 @scale_no(i8** %0, i64* %1) {
%3 = alloca i8**
%4 = alloca i64*
store i8** %0, i8*** %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
store i64 0, i64* %5
ret i64 1
}

LLVM IR (-O2):
define i64 @scale_no(i8** nocapture readnone %0, i64* nocapture writeonly %1) {
store i64 0, i64* %1
ret i64 1
}
int edid_checksum(unsigned char *edid) {
  unsigned char csum = 0;
  int i, ok = 0;
  for (i = 0; i < 128; i++)
    csum += edid[i];
  ("checksum = 0x%02x\n", csum);
  if (csum == 0x00)
    ok = 1;
  return ok;
}


x86 assembly (clang, -O0):
<edid_checksum>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movb   $0x0,-0x9(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x80,-0x10(%rbp)
jge    114a <edid_checksum+0x4a>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movzbl (%rax,%rcx,1),%ecx
movzbl -0x9(%rbp),%eax
add    %ecx,%eax
mov    %al,-0x9(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    111a <edid_checksum+0x1a>
movzbl -0x9(%rbp),%eax
cmp    $0x0,%eax
jne    115e <edid_checksum+0x5e>
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<edid_checksum>:
xor    %eax,%eax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movzbl (%rdi,%rax,1),%edx
add    %ecx,%edx
movzbl 0x1(%rdi,%rax,1),%ecx
add    %edx,%ecx
movzbl 0x2(%rdi,%rax,1),%edx
add    %ecx,%edx
movzbl 0x3(%rdi,%rax,1),%ecx
add    %edx,%ecx
add    $0x4,%rax
movzbl %cl,%ecx
cmp    $0x80,%rax
jne    1110 <edid_checksum+0x10>
xor    %eax,%eax
test   %ecx,%ecx
sete   %al
ret

LLVM IR (-O0):
@.str = [19 x i8] c"checksum = 0x%02x\0A\00"
define i32 @edid_checksum(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %2
store i8 0, i8* %3
store i32 0, i32* %5
store i32 0, i32* %4
br label %6
6: ; preds = %20, %1
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 128
br i1 %8, label %9, label %23
9: ; preds = %6
%10 = load i8*, i8** %2
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i8, i8* %13
%15 = zext i8 %14 to i32
%16 = load i8, i8* %3
%17 = zext i8 %16 to i32
%18 = add nsw i32 %17, %15
%19 = trunc i32 %18 to i8
store i8 %19, i8* %3
br label %20
20: ; preds = %9
%21 = load i32, i32* %4
%22 = add nsw i32 %21, 1
store i32 %22, i32* %4
br label %6
23: ; preds = %6
%24 = load i8, i8* %3
%25 = load i8, i8* %3
%26 = zext i8 %25 to i32
%27 = icmp eq i32 %26, 0
br i1 %27, label %28, label %29
28: ; preds = %23
store i32 1, i32* %5
br label %29
29: ; preds = %28, %23
%30 = load i32, i32* %5
ret i32 %30
}

LLVM IR (-O2):
define i32 @edid_checksum(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 0, %1 ], [ %24, %2 ]
%4 = phi i32 [ 0, %1 ], [ %25, %2 ]
%5 = getelementptr inbounds i8, i8* %0, i64 %3
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = add nuw nsw i32 %4, %7
%9 = or i64 %3, 1
%10 = getelementptr inbounds i8, i8* %0, i64 %9
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = add nuw nsw i32 %8, %12
%14 = or i64 %3, 2
%15 = getelementptr inbounds i8, i8* %0, i64 %14
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = add nuw nsw i32 %13, %17
%19 = or i64 %3, 3
%20 = getelementptr inbounds i8, i8* %0, i64 %19
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = add nuw nsw i32 %18, %22
%24 = add nuw nsw i64 %3, 4
%25 = and i32 %23, 255
%26 = icmp eq i64 %24, 128
br i1 %26, label %27, label %2
27: ; preds = %2
%28 = icmp eq i32 %25, 0
%29 = zext i1 %28 to i32
ret i32 %29
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
unsigned int population(uint32_t x) {
  x = x - ((x >> 1) & 0x55555555);
  x = (x & 0x33333333) + ((x >> 2) & 0x33333333);
  x = (x + (x >> 4)) & 0x0f0f0f0f;
  x = x + (x >> 8);
  x = x + (x >> 16);
  return x & 0x0000003f;
}


x86 assembly (clang, -O0):
<population>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x1,%ecx
and    $0x55555555,%ecx
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x33333333,%eax
mov    -0x4(%rbp),%ecx
sar    $0x2,%ecx
and    $0x33333333,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x4,%ecx
add    %ecx,%eax
and    $0xf0f0f0f,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x10,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x3f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<population>:
mov    %edi,%eax
shr    %eax
and    $0x55555555,%eax
sub    %eax,%edi
mov    %edi,%eax
and    $0x33333333,%eax
shr    $0x2,%edi
and    $0x33333333,%edi
add    %eax,%edi
mov    %edi,%eax
shr    $0x4,%eax
add    %edi,%eax
and    $0xf0f0f0f,%eax
mov    %eax,%ecx
shr    $0x8,%ecx
add    %eax,%ecx
mov    %ecx,%eax
shr    $0x10,%eax
add    %ecx,%eax
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @population(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = ashr i32 %4, 1
%6 = and i32 %5, 1431655765
%7 = sub nsw i32 %3, %6
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = and i32 %8, 858993459
%10 = load i32, i32* %2
%11 = ashr i32 %10, 2
%12 = and i32 %11, 858993459
%13 = add nsw i32 %9, %12
store i32 %13, i32* %2
%14 = load i32, i32* %2
%15 = load i32, i32* %2
%16 = ashr i32 %15, 4
%17 = add nsw i32 %14, %16
%18 = and i32 %17, 252645135
store i32 %18, i32* %2
%19 = load i32, i32* %2
%20 = load i32, i32* %2
%21 = ashr i32 %20, 8
%22 = add nsw i32 %19, %21
store i32 %22, i32* %2
%23 = load i32, i32* %2
%24 = load i32, i32* %2
%25 = ashr i32 %24, 16
%26 = add nsw i32 %23, %25
store i32 %26, i32* %2
%27 = load i32, i32* %2
%28 = and i32 %27, 63
ret i32 %28
}

LLVM IR (-O2):
define i32 @population(i32 %0) {
%2 = lshr i32 %0, 1
%3 = and i32 %2, 1431655765
%4 = sub nsw i32 %0, %3
%5 = and i32 %4, 858993459
%6 = lshr i32 %4, 2
%7 = and i32 %6, 858993459
%8 = add nuw nsw i32 %7, %5
%9 = lshr i32 %8, 4
%10 = add nuw nsw i32 %9, %8
%11 = and i32 %10, 252645135
%12 = lshr i32 %11, 8
%13 = add nuw nsw i32 %12, %11
%14 = lshr i32 %13, 16
%15 = add nuw nsw i32 %14, %13
%16 = and i32 %15, 63
ret i32 %16
}
void hw_sound_play(int which) {}


x86 assembly (clang, -O0):
<hw_sound_play>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<hw_sound_play>:
ret

LLVM IR (-O0):
define void @hw_sound_play(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @hw_sound_play(i32 %0) {
ret void
}
double log(double x) {
  return ({
    extern __typeof__(log) module_libc_log;
    &module_libc_log;
  })(x);
}


x86 assembly (clang, -O0):
<log>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    0x2ee4(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsd  -0x8(%rbp),%xmm0
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log>:
jmp    1030 <module_libc_log@plt>

LLVM IR (-O0):
define double @log(double %0) {
%2 = alloca double
%3 = alloca double (double)*
store double %0, double* %2
store double (double)* @module_libc_log, double (double)** %3
%4 = load double (double)*, double (double)** %3
%5 = load double, double* %2
%6 = call double %4(double %5)
ret double %6
}

LLVM IR (-O2):
define double @log(double %0) {
%2 = tail call double @module_libc_log(double %0)
ret double %2
}
extern int main(int argc) { return 0; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %2
store i32 %0, i32* %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0) {
ret i32 0
}
int fons__mini(int a, int b) { return a < b ? a : b; }


x86 assembly (clang, -O0):
<fons__mini>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <fons__mini+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <fons__mini+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fons__mini>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @fons__mini(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @fons__mini(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Type definitions */
union i2c_smbus_data {
  int /*<<< orphan*/ word;
};
typedef int /*<<< orphan*/ __u8;
typedef int /*<<< orphan*/ __u16;
typedef int /*<<< orphan*/ __s32;

/* Variables and functions */
int /*<<< orphan*/ i2c_smbus_access(int, int /*<<< orphan*/, int /*<<< orphan*/,
                                    int, union i2c_smbus_data *);
__s32 i2c_smbus_write_word_data(int file, __u8 command, __u16 value) {
  union i2c_smbus_data data;
  data.word = value;
  return i2c_smbus_access(file, 0, command, 3, &data);
}


x86 assembly (clang, -O0):
<i2c_smbus_write_word_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
xor    %esi,%esi
mov    $0x3,%ecx
lea    -0x10(%rbp),%r8
call   1030 <i2c_smbus_access@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_smbus_write_word_data>:
push   %rax
mov    %esi,%eax
mov    %edx,(%rsp)
mov    %rsp,%r8
xor    %esi,%esi
mov    %eax,%edx
mov    $0x3,%ecx
call   1030 <i2c_smbus_access@plt>
pop    %rcx
ret

LLVM IR (-O0):
%union.i2c_smbus_data = type { i32 }
define i32 @i2c_smbus_write_word_data(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca %union.i2c_smbus_data
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
%9 = bitcast %union.i2c_smbus_data* %7 to i32*
store i32 %8, i32* %9
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = call i32 @i2c_smbus_access(i32 %10, i32 0, i32 %11, i32 3, %union.i2c_smbus_data* %7)
ret i32 %12
}

LLVM IR (-O2):
%union.i2c_smbus_data = type { i32 }
define i32 @i2c_smbus_write_word_data(i32 %0, i32 %1, i32 %2) {
%4 = alloca %union.i2c_smbus_data
%5 = bitcast %union.i2c_smbus_data* %4 to i8*
%6 = getelementptr inbounds %union.i2c_smbus_data, %union.i2c_smbus_data* %4, i64 0, i32 0
store i32 %2, i32* %6
%7 = call i32 @i2c_smbus_access(i32 %0, i32 0, i32 %1, i32 3, %union.i2c_smbus_data* %4)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0xbc() {
  Assert_real((isdigit(188) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              945, ("isdigit should be 0 for 0xbc"));
}


x86 assembly (clang, -O0):
<t_isdigit_0xbc>:
push   %rbp
mov    %rsp,%rbp
mov    $0xbc,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3b1,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0xbc>:
push   %rax
mov    $0xbc,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3b1,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0xbc\00"
define void @t_isdigit_0xbc() {
%1 = call i64 @isdigit(i32 188)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 945, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0xbc\00"
define void @t_isdigit_0xbc() {
%1 = tail call i64 @isdigit(i32 188)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 945, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
size_t strlen(const char *buf) {
  int len = 0;
  while (buf[len])
    len++;
  return len;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     112f <strlen+0x2f>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <strlen+0xf>
movslq -0xc(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
mov    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <strlen+0x10>
mov    %eax,%eax
ret

LLVM IR (-O0):
define i64 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %4
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
%16 = sext i32 %15 to i64
ret i64 %16
}

LLVM IR (-O2):
define i64 @strlen(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = and i64 %3, 4294967295
ret i64 %9
}
void lfence(void) { __asm __volatile("lfence"); }


x86 assembly (clang, -O0):
<lfence>:
push   %rbp
mov    %rsp,%rbp
lfence
pop    %rbp
ret

x86 assembly (clang, -O2):
<lfence>:
lfence
ret

LLVM IR (-O0):
define void @lfence() {
ret void
}

LLVM IR (-O2):
define void @lfence() {
tail call void asm sideeffect "lfence", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ SHA_CTX;

/* Variables and functions */
int /*<<< orphan*/ OPENSSL_assert(int);
int /*<<< orphan*/ SHA1_Update(int /*<<< orphan*/ *, unsigned char *, int);
void hashlength(SHA_CTX *sha, size_t l) {
  unsigned char b[2];
  OPENSSL_assert(l <= 0xffff);
  b[0] = l >> 8;
  b[1] = l & 0xff;
  SHA1_Update(sha, b, 2);
}


x86 assembly (clang, -O0):
<hashlength>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0xffff,-0x10(%rbp)
setbe  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <OPENSSL_assert@plt>
mov    -0x10(%rbp),%rax
shr    $0x8,%rax
mov    %al,-0x12(%rbp)
mov    -0x10(%rbp),%rax
and    $0xff,%rax
mov    %al,-0x11(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x12(%rbp),%rsi
mov    $0x2,%edx
call   1040 <SHA1_Update@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashlength>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
xor    %edi,%edi
cmp    $0x10000,%rsi
setb   %dil
call   1030 <OPENSSL_assert@plt>
rol    $0x8,%bx
mov    %bx,0x6(%rsp)
lea    0x6(%rsp),%rsi
mov    %r14,%rdi
mov    $0x2,%edx
call   1040 <SHA1_Update@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @hashlength(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = alloca [2 x i8]
store i32* %0, i32** %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = icmp ule i64 %6, 65535
%8 = zext i1 %7 to i32
%9 = call i32 @OPENSSL_assert(i32 %8)
%10 = load i64, i64* %4
%11 = lshr i64 %10, 8
%12 = trunc i64 %11 to i8
%13 = getelementptr inbounds [2 x i8], [2 x i8]* %5, i64 0, i64 0
store i8 %12, i8* %13
%14 = load i64, i64* %4
%15 = and i64 %14, 255
%16 = trunc i64 %15 to i8
%17 = getelementptr inbounds [2 x i8], [2 x i8]* %5, i64 0, i64 1
store i8 %16, i8* %17
%18 = load i32*, i32** %3
%19 = getelementptr inbounds [2 x i8], [2 x i8]* %5, i64 0, i64 0
%20 = call i32 @SHA1_Update(i32* %18, i8* %19, i32 2)
ret void
}

LLVM IR (-O2):
define void @hashlength(i32* %0, i64 %1) {
%3 = alloca [2 x i8]
%4 = getelementptr inbounds [2 x i8], [2 x i8]* %3, i64 0, i64 0
%5 = icmp ult i64 %1, 65536
%6 = zext i1 %5 to i32
%7 = tail call i32 @OPENSSL_assert(i32 %6)
%8 = lshr i64 %1, 8
%9 = trunc i64 %8 to i8
store i8 %9, i8* %4
%10 = trunc i64 %1 to i8
%11 = getelementptr inbounds [2 x i8], [2 x i8]* %3, i64 0, i64 1
store i8 %10, i8* %11
%12 = call i32 @SHA1_Update(i32* %0, i8* %4, i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char *);
int main(int argc, char *argv[]) {
  int i;
  for (i = 0; i < argc; i++) {
    printf("arg %d: `%s'\n", i, argv[i]);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1162 <main+0x52>
mov    -0x14(%rbp),%esi
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rdx
lea    0xeb1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112d <main+0x1d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %edi,%edi
jle    1147 <main+0x37>
mov    %rsi,%r14
mov    %edi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r15
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdx
mov    %r15,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [14 x i8] c"arg %d: `%s'\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
br label %7
7: ; preds = %19, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %22
11: ; preds = %7
%12 = load i32, i32* %6
%13 = load i8**, i8*** %5
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8*, i8** %13, i64 %15
%17 = load i8*, i8** %16
%18 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %12, i8* %17)
br label %19
19: ; preds = %11
%20 = load i32, i32* %6
%21 = add nsw i32 %20, 1
store i32 %21, i32* %6
br label %7
22: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"arg %d: `%s'\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %14
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %12, %6 ]
%8 = getelementptr inbounds i8*, i8** %1, i64 %7
%9 = load i8*, i8** %8
%10 = trunc i64 %7 to i32
%11 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %10, i8* %9)
%12 = add nuw nsw i64 %7, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %14, label %6
14: ; preds = %6, %2
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ putint(int);
void foo(int v1, int v2, int v3, int v4, int v5) {
  putint(v1);
  putint(v2);
  putint(v3);
  putint(v4);
  putint(v5);
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <putint@plt>
mov    -0x8(%rbp),%edi
call   1030 <putint@plt>
mov    -0xc(%rbp),%edi
call   1030 <putint@plt>
mov    -0x10(%rbp),%edi
call   1030 <putint@plt>
mov    -0x14(%rbp),%edi
call   1030 <putint@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %r8d,%r14d
mov    %ecx,%r15d
mov    %edx,%ebx
mov    %esi,%ebp
call   1030 <putint@plt>
mov    %ebp,%edi
call   1030 <putint@plt>
mov    %ebx,%edi
call   1030 <putint@plt>
mov    %r15d,%edi
call   1030 <putint@plt>
mov    %r14d,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <putint@plt>

LLVM IR (-O0):
define void @foo(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = call i32 @putint(i32 %11)
%13 = load i32, i32* %7
%14 = call i32 @putint(i32 %13)
%15 = load i32, i32* %8
%16 = call i32 @putint(i32 %15)
%17 = load i32, i32* %9
%18 = call i32 @putint(i32 %17)
%19 = load i32, i32* %10
%20 = call i32 @putint(i32 %19)
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @putint(i32 %0)
%7 = tail call i32 @putint(i32 %1)
%8 = tail call i32 @putint(i32 %2)
%9 = tail call i32 @putint(i32 %3)
%10 = tail call i32 @putint(i32 %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ hole;

/* Variables and functions */
int /*<<< orphan*/ task2();
void task2_tramp(void) {
  int hole[600];
  for (int i = 0; i < sizeof(hole) / sizeof(hole[0]); ++i) {
    hole[i] = i;
  }
  task2();
}


x86 assembly (clang, -O0):
<task2_tramp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x970,%rsp
movl   $0x0,-0x964(%rbp)
movslq -0x964(%rbp),%rax
cmp    $0x258,%rax
jae    1160 <task2_tramp+0x50>
mov    -0x964(%rbp),%ecx
movslq -0x964(%rbp),%rax
mov    %ecx,-0x960(%rbp,%rax,4)
mov    -0x964(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x964(%rbp)
jmp    1125 <task2_tramp+0x15>
mov    $0x0,%al
call   1030 <task2@plt>
add    $0x970,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<task2_tramp>:
xor    %eax,%eax
jmp    1030 <task2@plt>

LLVM IR (-O0):
define void @task2_tramp() {
%1 = alloca [600 x i32]
%2 = alloca i32
store i32 0, i32* %2
br label %3
3: ; preds = %12, %0
%4 = load i32, i32* %2
%5 = sext i32 %4 to i64
%6 = icmp ult i64 %5, 600
br i1 %6, label %7, label %15
7: ; preds = %3
%8 = load i32, i32* %2
%9 = load i32, i32* %2
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds [600 x i32], [600 x i32]* %1, i64 0, i64 %10
store i32 %8, i32* %11
br label %12
12: ; preds = %7
%13 = load i32, i32* %2
%14 = add nsw i32 %13, 1
store i32 %14, i32* %2
br label %3
15: ; preds = %3
%16 = call i32 (...) @task2()
ret void
}

LLVM IR (-O2):
define void @task2_tramp() {
%1 = tail call i32 (...) @task2()
ret void
}
int srl(unsigned x, int k) {
  unsigned xsra = (int)x >> k;
  int w = sizeof(int) * 8;
  unsigned mask = (1 << (w - k)) - 1;
  unsigned result = xsra & mask;
  return result;
}


x86 assembly (clang, -O0):
<srl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
mov    %eax,-0xc(%rbp)
movl   $0x20,-0x10(%rbp)
mov    -0x10(%rbp),%ecx
sub    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
sub    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
and    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<srl>:
mov    %esi,%ecx
sar    %cl,%edi
neg    %cl
mov    $0xffffffff,%eax
shl    %cl,%eax
not    %eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @srl(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = ashr i32 %9, %10
store i32 %11, i32* %5
store i32 32, i32* %6
%12 = load i32, i32* %6
%13 = load i32, i32* %4
%14 = sub nsw i32 %12, %13
%15 = shl i32 1, %14
%16 = sub nsw i32 %15, 1
store i32 %16, i32* %7
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = and i32 %17, %18
store i32 %19, i32* %8
%20 = load i32, i32* %8
ret i32 %20
}

LLVM IR (-O2):
define i32 @srl(i32 %0, i32 %1) {
%3 = ashr i32 %0, %1
%4 = sub nsw i32 32, %1
%5 = shl nsw i32 -1, %4
%6 = xor i32 %5, -1
%7 = and i32 %3, %6
ret i32 %7
}
void m68k_op_nop(void) { ; }


x86 assembly (clang, -O0):
<m68k_op_nop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_nop>:
ret

LLVM IR (-O0):
define void @m68k_op_nop() {
ret void
}

LLVM IR (-O2):
define void @m68k_op_nop() {
ret void
}
void NCONF_get_string(void) {}


x86 assembly (clang, -O0):
<NCONF_get_string>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NCONF_get_string>:
ret

LLVM IR (-O0):
define void @NCONF_get_string() {
ret void
}

LLVM IR (-O2):
define void @NCONF_get_string() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ solve(int *, int);
int main(void) {
  int len = 6;
  int mtx[] = {4, 10, 3, 12, 20, 7};
  solve(mtx, len);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x6,-0x8(%rbp)
mov    0xed3(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xed0(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xecd(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%esi
call   1030 <solve@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
mov    0xef5(%rip),%rax
mov    %rax,0x10(%rsp)
movaps 0xed9(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x6,%esi
call   1030 <solve@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.mtx = [6 x i32] [i32 4, i32 10, i32 3, i32 12, i32 20, i32 7]
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [6 x i32]
store i32 0, i32* %1
store i32 6, i32* %2
%4 = bitcast [6 x i32]* %3 to i8*
%5 = getelementptr inbounds [6 x i32], [6 x i32]* %3, i64 0, i64 0
%6 = load i32, i32* %2
%7 = call i32 @solve(i32* %5, i32 %6)
ret i32 0
}

LLVM IR (-O2):
@__const.main.mtx = [6 x i32] [i32 4, i32 10, i32 3, i32 12, i32 20, i32 7]
define i32 @main() {
%1 = alloca [6 x i32]
%2 = bitcast [6 x i32]* %1 to i8*
%3 = getelementptr inbounds [6 x i32], [6 x i32]* %1, i64 0, i64 0
%4 = call i32 @solve(i32* %3, i32 6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ itoa(char *, int);
scalar_t__ malloc(int);
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ scanf(char *, int *);
int main(void) {
  int num;
  scanf("%d", &num);
  char *buf = (char *)malloc(sizeof(char));
  itoa(buf, num);
  puts(buf);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeaa(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%esi
call   1060 <itoa@plt>
mov    -0x10(%rbp),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xeb4(%rip),%rdi
lea    0xc(%rsp),%rsi
call   1050 <scanf@plt>
mov    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    0xc(%rsp),%esi
mov    %rax,%rdi
call   1060 <itoa@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8*
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = call i64 @malloc(i32 1)
%6 = inttoptr i64 %5 to i8*
store i8* %6, i8** %3
%7 = load i8*, i8** %3
%8 = load i32, i32* %2
%9 = call i32 @itoa(i8* %7, i32 %8)
%10 = load i8*, i8** %3
%11 = call i32 @puts(i8* %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = call i64 @malloc(i32 1)
%5 = inttoptr i64 %4 to i8*
%6 = load i32, i32* %1
%7 = call i32 @itoa(i8* %5, i32 %6)
%8 = call i32 @puts(i8* dereferenceable(1) %5)
ret i32 0
}
/* Type definitions */
struct ts_eit {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ts_eit_add_short_event_descriptor(struct ts_eit *, int, int,
                                                     int, int, char *, char *);
void ts_eit_test2(struct ts_eit *eit) {
  ts_eit_add_short_event_descriptor(
      eit, 4, 1, 1234567890, 3600,
      "xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx"
      "xxxxxxxxxxxxxxxxxxxxxxx",
      "yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy**");
}


x86 assembly (clang, -O0):
<ts_eit_test2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
mov    $0x499602d2,%ecx
mov    $0xe10,%r8d
lea    0xec4(%rip),%r9
lea    0xf1d(%rip),%rax
mov    %rax,(%rsp)
call   1030 <ts_eit_add_short_event_descriptor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ts_eit_test2>:
push   %rax
lea    0xf48(%rip),%rax
mov    %rax,(%rsp)
lea    0xedd(%rip),%r9
mov    $0x4,%esi
mov    $0x1,%edx
mov    $0x499602d2,%ecx
mov    $0xe10,%r8d
call   1030 <ts_eit_add_short_event_descriptor@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.ts_eit = type { i32 }
@.str = [96 x i8] c"xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx\00"
@.str.1 = [54 x i8] c"yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy**\00"
define void @ts_eit_test2(%struct.ts_eit* %0) {
%2 = alloca %struct.ts_eit*
store %struct.ts_eit* %0, %struct.ts_eit** %2
%3 = load %struct.ts_eit*, %struct.ts_eit** %2
%4 = call i32 @ts_eit_add_short_event_descriptor(%struct.ts_eit* %3, i32 4, i32 1, i32 1234567890, i32 3600, i8* getelementptr inbounds ([96 x i8], [96 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.ts_eit = type { i32 }
@.str = [96 x i8] c"xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx\00"
@.str.1 = [54 x i8] c"yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy**\00"
define void @ts_eit_test2(%struct.ts_eit* %0) {
%2 = tail call i32 @ts_eit_add_short_event_descriptor(%struct.ts_eit* %0, i32 4, i32 1, i32 1234567890, i32 3600, i8* getelementptr inbounds ([96 x i8], [96 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ IntArg(int, int);
int /*<<< orphan*/ SetListBytes(int /*<<< orphan*/);
void DoListBytes(void) { SetListBytes(IntArg(4, 255)); }


x86 assembly (clang, -O0):
<DoListBytes>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
mov    $0xff,%esi
call   1030 <IntArg@plt>
mov    %eax,%edi
call   1040 <SetListBytes@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoListBytes>:
push   %rax
mov    $0x4,%edi
mov    $0xff,%esi
call   1030 <IntArg@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <SetListBytes@plt>

LLVM IR (-O0):
define void @DoListBytes() {
%1 = call i32 @IntArg(i32 4, i32 255)
%2 = call i32 @SetListBytes(i32 %1)
ret void
}

LLVM IR (-O2):
define void @DoListBytes() {
%1 = tail call i32 @IntArg(i32 4, i32 255)
%2 = tail call i32 @SetListBytes(i32 %1)
ret void
}
int test_imm_0Eint64_midword_reg(long long val) {
  return ((val >> 16) & (0x0E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Eint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0xe,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Eint64_midword_reg>:
test   $0xe0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Eint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 14
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_0Eint64_midword_reg(i64 %0) {
%2 = and i64 %0, 917504
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void WF_EintInit() {
  *(volatile unsigned *)(0xBF800000 + (0x100c4 + ((0) << 4))) = (1 << 4);
  if (1)
    *(volatile unsigned *)(0xBF800000 + (0x60028)) = 1 << 15;
  else
    *(volatile unsigned *)(0xBF800000 + (0x60024)) = 1 << 15;
  if (1)
    *(volatile unsigned *)(0xBF800000 + (0x60018)) = 1 << 15;
  else
    *(volatile unsigned *)(0xBF800000 + (0x60014)) = 1 << 15;
  if (0)
    *(volatile unsigned *)(0xBF800000 + (0x10008)) = 1 << 4;
  else
    *(volatile unsigned *)(0xBF800000 + (0x10004)) = 1 << 4;
  *(volatile unsigned *)(0xBF800000 + (0x10044 + ((0) << 4))) = (1 << 4);
  *(volatile unsigned *)(0xBF800000 + (0x100c8 + ((0) << 4))) = (1 << 4);
}


x86 assembly (clang, -O0):
<WF_EintInit>:
push   %rbp
mov    %rsp,%rbp
mov    $0xbf8100c4,%eax
movl   $0x10,(%rax)
mov    $0xbf860028,%eax
movl   $0x8000,(%rax)
mov    $0xbf860018,%eax
movl   $0x8000,(%rax)
mov    $0xbf810004,%eax
movl   $0x10,(%rax)
mov    $0xbf810044,%eax
movl   $0x10,(%rax)
mov    $0xbf8100c8,%eax
movl   $0x10,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<WF_EintInit>:
mov    $0xbf810004,%eax
movl   $0x10,0xc0(%rax)
movl   $0x8000,0x50024(%rax)
movl   $0x8000,0x50014(%rax)
movl   $0x10,(%rax)
movl   $0x10,0x40(%rax)
movl   $0x10,0xc4(%rax)
ret

LLVM IR (-O0):
define void @WF_EintInit() {
store volatile i32 16, i32* inttoptr (i64 3212902596 to i32*)
store volatile i32 32768, i32* inttoptr (i64 3213230120 to i32*)
store volatile i32 32768, i32* inttoptr (i64 3213230104 to i32*)
store volatile i32 16, i32* inttoptr (i64 3212902404 to i32*)
store volatile i32 16, i32* inttoptr (i64 3212902468 to i32*)
store volatile i32 16, i32* inttoptr (i64 3212902600 to i32*)
ret void
}

LLVM IR (-O2):
define void @WF_EintInit() {
store volatile i32 16, i32* inttoptr (i64 3212902596 to i32*)
store volatile i32 32768, i32* inttoptr (i64 3213230120 to i32*)
store volatile i32 32768, i32* inttoptr (i64 3213230104 to i32*)
store volatile i32 16, i32* inttoptr (i64 3212902404 to i32*)
store volatile i32 16, i32* inttoptr (i64 3212902468 to i32*)
store volatile i32 16, i32* inttoptr (i64 3212902600 to i32*)
ret void
}