xunge/DecIR huggingface dataset:
unsigned xrop3_68_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned stk1;
  unsigned stk2;
  stk2 = ~D;
  stk1 = S & stk2;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_68_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
and    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_68_0_0>:
mov    %edi,%eax
shl    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_68_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
store i32 %14, i32* %6
%15 = load i32, i32* %5
%16 = xor i32 %15, -1
store i32 %16, i32* %8
%17 = load i32, i32* %6
%18 = load i32, i32* %8
%19 = and i32 %17, %18
store i32 %19, i32* %7
%20 = load i32, i32* %7
ret i32 %20
}

LLVM IR (-O2):
define i32 @xrop3_68_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ geteuid();
int /*<<< orphan*/ print_num(int /*<<< orphan*/);
int main(int argc, const char *argv[]) {
  print_num(geteuid());
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <geteuid@plt>
mov    %eax,%edi
call   1040 <print_num@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <geteuid@plt>
mov    %eax,%edi
call   1040 <print_num@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @geteuid()
%7 = call i32 @print_num(i32 %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @geteuid()
%4 = tail call i32 @print_num(i32 %3)
ret i32 0
}
void ARGB1555ToARGBRow_Any_NEON() {}


x86 assembly (clang, -O0):
<ARGB1555ToARGBRow_Any_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGB1555ToARGBRow_Any_NEON>:
ret

LLVM IR (-O0):
define void @ARGB1555ToARGBRow_Any_NEON() {
ret void
}

LLVM IR (-O2):
define void @ARGB1555ToARGBRow_Any_NEON() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ comprintf(char *, char const *, char const *);
void gen_writeword(const char *address, const char *source) {
  comprintf("\twriteword(%s,%s,scratchie);\n", address, source);
}


x86 assembly (clang, -O0):
<gen_writeword>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rdi
call   1030 <comprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_writeword>:
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee3(%rip),%rdi
jmp    1030 <comprintf@plt>

LLVM IR (-O0):
@.str = [30 x i8] c"\09writeword(%s,%s,scratchie);\0A\00"
define void @gen_writeword(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @comprintf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* %5, i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [30 x i8] c"\09writeword(%s,%s,scratchie);\0A\00"
define void @gen_writeword(i8* %0, i8* %1) {
%3 = tail call i32 @comprintf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
ret void
}
unsigned char inb(int port) {
  unsigned char ret;
  asm volatile("inb %w1, %0" : "=a"(ret) : "d"(port));
  return ret;
}


x86 assembly (clang, -O0):
<inb>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
in     (%dx),%al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inb>:
mov    %edi,%edx
in     (%dx),%al
ret

LLVM IR (-O0):
define zeroext i8 @inb(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8 asm sideeffect "inb ${1:w}, $0", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i32 %4)
store i8 %5, i8* %3
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @inb(i32 %0) {
%2 = tail call i8 asm sideeffect "inb ${1:w}, $0", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i32 %0)
ret i8 %2
}
/* Type definitions */
struct _stor_fclose_req {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct _stor_fclose_req *);
void stor_fclose_req_free(struct _stor_fclose_req *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<stor_fclose_req_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stor_fclose_req_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct._stor_fclose_req = type { i32 }
define void @stor_fclose_req_free(%struct._stor_fclose_req* %0) {
%2 = alloca %struct._stor_fclose_req*
store %struct._stor_fclose_req* %0, %struct._stor_fclose_req** %2
%3 = load %struct._stor_fclose_req*, %struct._stor_fclose_req** %2
%4 = call i32 @free(%struct._stor_fclose_req* %3)
ret void
}

LLVM IR (-O2):
%struct._stor_fclose_req = type { i32 }
define void @stor_fclose_req_free(%struct._stor_fclose_req* nocapture %0) {
%2 = tail call i32 @free(%struct._stor_fclose_req* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ stdout;
void prompt() {
  printf("sish$ ");
  (void)fflush(stdout);
}


x86 assembly (clang, -O0):
<prompt>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<prompt>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"sish$ \00"
@stdout = global i32 0
define void @prompt() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @stdout
%3 = call i32 @fflush(i32 %2)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"sish$ \00"
@stdout = global i32 0
define void @prompt() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @stdout
%3 = tail call i32 @fflush(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dev_puts_func(char *);
int raspberry_serial_printf(char *format, ...) {
  dev_puts_func(format);
  return 0;
}


x86 assembly (clang, -O0):
<raspberry_serial_printf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dev_puts_func@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<raspberry_serial_printf>:
push   %rax
call   1030 <dev_puts_func@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @raspberry_serial_printf(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @dev_puts_func(i8* %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @raspberry_serial_printf(i8* %0, ...) {
%2 = tail call i32 @dev_puts_func(i8* %0)
ret i32 0
}
int main() {
  int x = 3, y = 2;
  int a = x + y;
  int b = x + y;
  a = 17;
  int c = x + y;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
movl   $0x11,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 0, i32* %1
store i32 3, i32* %2
store i32 2, i32* %3
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = add nsw i32 %7, %8
store i32 %9, i32* %4
%10 = load i32, i32* %2
%11 = load i32, i32* %3
%12 = add nsw i32 %10, %11
store i32 %12, i32* %5
store i32 17, i32* %4
%13 = load i32, i32* %2
%14 = load i32, i32* %3
%15 = add nsw i32 %13, %14
store i32 %15, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int read(int /*<<< orphan*/, unsigned char *, int);
int mp_hal_stdin_rx_chr(void) {
  unsigned char c = 0;
  int r = read(0, &c, 1);
  (void)r;
  return c;
}


x86 assembly (clang, -O0):
<mp_hal_stdin_rx_chr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x0,-0x1(%rbp)
xor    %edi,%edi
lea    -0x1(%rbp),%rsi
mov    $0x1,%edx
call   1030 <read@plt>
mov    %eax,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp_hal_stdin_rx_chr>:
push   %rax
movb   $0x0,0x7(%rsp)
lea    0x7(%rsp),%rsi
xor    %edi,%edi
mov    $0x1,%edx
call   1030 <read@plt>
movzbl 0x7(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @mp_hal_stdin_rx_chr() {
%1 = alloca i8
%2 = alloca i32
store i8 0, i8* %1
%3 = call i32 @read(i32 0, i8* %1, i32 1)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = load i8, i8* %1
%6 = zext i8 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @mp_hal_stdin_rx_chr() {
%1 = alloca i8
store i8 0, i8* %1
%2 = call i32 @read(i32 0, i8* %1, i32 1)
%3 = load i8, i8* %1
%4 = zext i8 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ printf(char *, unsigned int);
int main() {
  unsigned int i;
  unsigned int r = i * 1073741824u;
  if (i * 1073741824u == 3221225472u) {
    printf("%u\n", i);
    assert(i == 3);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1e,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1e,%eax
cmp    $0xc0000000,%eax
jne    1169 <main+0x49>
mov    -0x8(%rbp),%esi
lea    0xead(%rip),%rdi
call   1030 <printf@plt>
cmpl   $0x3,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%u\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = load i32, i32* %2
%5 = mul i32 %4, 1073741824
store i32 %5, i32* %3
%6 = load i32, i32* %2
%7 = mul i32 %6, 1073741824
%8 = icmp eq i32 %7, -1073741824
br i1 %8, label %9, label %16
9: ; preds = %0
%10 = load i32, i32* %2
%11 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %10)
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 3
%14 = zext i1 %13 to i32
%15 = call i32 @assert(i32 %14)
br label %16
16: ; preds = %9, %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
scalar_t__ shim_enosys(int /*<<< orphan*/, int, int, int);
int shim_membarrier(int cmd, int flags, int cpu_id) {
  return (int)shim_enosys(0, cmd, flags, cpu_id);
}


x86 assembly (clang, -O0):
<shim_membarrier>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
xor    %edi,%edi
call   1030 <shim_enosys@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shim_membarrier>:
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
xor    %edi,%edi
jmp    1030 <shim_enosys@plt>

LLVM IR (-O0):
define i32 @shim_membarrier(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i64 @shim_enosys(i32 0, i32 %7, i32 %8, i32 %9)
%11 = trunc i64 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @shim_membarrier(i32 %0, i32 %1, i32 %2) {
%4 = tail call i64 @shim_enosys(i32 0, i32 %0, i32 %1, i32 %2)
%5 = trunc i64 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ timer_reset();
void clock_reset(void) { timer_reset(); }


x86 assembly (clang, -O0):
<clock_reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <timer_reset@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clock_reset>:
xor    %eax,%eax
jmp    1030 <timer_reset@plt>

LLVM IR (-O0):
define void @clock_reset() {
%1 = call i32 (...) @timer_reset()
ret void
}

LLVM IR (-O2):
define void @clock_reset() {
%1 = tail call i32 (...) @timer_reset()
ret void
}
/* Variables and functions */
int pow(float, int);
float cauchy(float x) {
  float pi = 3.141592;
  return 1.0 / (pi * (1 + pow(x, 2)));
}


x86 assembly (clang, -O0):
<cauchy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  0xee3(%rip),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
mov    $0x2,%edi
call   1030 <pow@plt>
movss  -0xc(%rbp),%xmm0
add    $0x1,%eax
cvtsi2ss %eax,%xmm1
mulss  %xmm1,%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xea1(%rip),%xmm0
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cauchy>:
push   %rax
mov    $0x2,%edi
call   1030 <pow@plt>
add    $0x1,%eax
cvtsi2ss %eax,%xmm1
mulss  0xed6(%rip),%xmm1
movss  0xed2(%rip),%xmm0
divss  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @cauchy(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
store float 0x400921FB00000000, float* %3
%4 = load float, float* %3
%5 = load float, float* %2
%6 = call i32 @pow(float %5, i32 2)
%7 = add nsw i32 1, %6
%8 = sitofp i32 %7 to float
%9 = fmul float %4, %8
%10 = fpext float %9 to double
%11 = fdiv double 1.000000e+00, %10
%12 = fptrunc double %11 to float
ret float %12
}

LLVM IR (-O2):
define float @cauchy(float %0) {
%2 = tail call i32 @pow(float %0, i32 2)
%3 = add nsw i32 %2, 1
%4 = sitofp i32 %3 to float
%5 = fmul float %4, 0x400921FB00000000
%6 = fdiv float 1.000000e+00, %5
ret float %6
}
int jac_chain_nm10_free(void *mem) {
  (void)mem;
  return 0;
}


x86 assembly (clang, -O0):
<jac_chain_nm10_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<jac_chain_nm10_free>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @jac_chain_nm10_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @jac_chain_nm10_free(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
scalar_t__ getegid();
scalar_t__ geteuid();
scalar_t__ getgid();
scalar_t__ getuid();
void drop_privs(void) {
  if (getuid() != geteuid() || getgid() != getegid())
    exit(255);
}


x86 assembly (clang, -O0):
<drop_privs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getuid@plt>
mov    %rax,-0x8(%rbp)
mov    $0x0,%al
call   1040 <geteuid@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
cmp    %rcx,%rax
jne    119c <drop_privs+0x4c>
mov    $0x0,%al
call   1050 <getgid@plt>
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1060 <getegid@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
je     11a6 <drop_privs+0x56>
mov    $0xff,%edi
call   1070 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drop_privs>:
push   %rbx
xor    %eax,%eax
call   1030 <getuid@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1040 <geteuid@plt>
cmp    %rax,%rbx
jne    117f <drop_privs+0x2f>
xor    %eax,%eax
call   1050 <getgid@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1060 <getegid@plt>
cmp    %rax,%rbx
jne    117f <drop_privs+0x2f>
pop    %rbx
ret
mov    $0xff,%edi
call   1070 <exit@plt>

LLVM IR (-O0):
define void @drop_privs() {
%1 = call i64 (...) @getuid()
%2 = call i64 (...) @geteuid()
%3 = icmp ne i64 %1, %2
br i1 %3, label %8, label %4
4: ; preds = %0
%5 = call i64 (...) @getgid()
%6 = call i64 (...) @getegid()
%7 = icmp ne i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %4, %0
%9 = call i32 @exit(i32 255)
unreachable
10: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @drop_privs() {
%1 = tail call i64 (...) @getuid()
%2 = tail call i64 (...) @geteuid()
%3 = icmp eq i64 %1, %2
br i1 %3, label %4, label %8
4: ; preds = %0
%5 = tail call i64 (...) @getgid()
%6 = tail call i64 (...) @getegid()
%7 = icmp eq i64 %5, %6
br i1 %7, label %10, label %8
8: ; preds = %4, %0
%9 = tail call i32 @exit(i32 255)
unreachable
10: ; preds = %4
ret void
}
/* Type definitions */
struct rng_state {
  int dummy;
};

/* Variables and functions */
double rng_u32(struct rng_state *);
double rng_uniform(struct rng_state *st) {
  return rng_u32(st) * 2.3283064365386963e-10;
}


x86 assembly (clang, -O0):
<rng_uniform>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <rng_u32@plt>
movsd  0xed3(%rip),%xmm1
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rng_uniform>:
push   %rax
call   1030 <rng_u32@plt>
mulsd  0xee2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
%struct.rng_state = type { i32 }
define double @rng_uniform(%struct.rng_state* %0) {
%2 = alloca %struct.rng_state*
store %struct.rng_state* %0, %struct.rng_state** %2
%3 = load %struct.rng_state*, %struct.rng_state** %2
%4 = call double @rng_u32(%struct.rng_state* %3)
%5 = fmul double %4, 0x3DF0000000000000
ret double %5
}

LLVM IR (-O2):
%struct.rng_state = type { i32 }
define double @rng_uniform(%struct.rng_state* %0) {
%2 = tail call double @rng_u32(%struct.rng_state* %0)
%3 = fmul double %2, 0x3DF0000000000000
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ TRACE();
void downcase_char(char *c) {
  TRACE();
  if (*c >= 'A' && *c <= 'Z')
    *c += 32;
}


x86 assembly (clang, -O0):
<downcase_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <TRACE@plt>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x41,%eax
jl     114f <downcase_char+0x3f>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x5a,%eax
jg     114f <downcase_char+0x3f>
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
add    $0x20,%ecx
mov    %cl,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<downcase_char>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <TRACE@plt>
mov    (%rbx),%al
lea    -0x41(%rax),%ecx
cmp    $0x19,%cl
ja     1129 <downcase_char+0x19>
add    $0x20,%al
mov    %al,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @downcase_char(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @TRACE()
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp sge i32 %6, 65
br i1 %7, label %8, label %19
8: ; preds = %1
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp sle i32 %11, 90
br i1 %12, label %13, label %19
13: ; preds = %8
%14 = load i8*, i8** %2
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = add nsw i32 %16, 32
%18 = trunc i32 %17 to i8
store i8 %18, i8* %14
br label %19
19: ; preds = %13, %8, %1
ret void
}

LLVM IR (-O2):
define void @downcase_char(i8* nocapture %0) {
%2 = tail call i32 (...) @TRACE()
%3 = load i8, i8* %0
%4 = add i8 %3, -65
%5 = icmp ult i8 %4, 26
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = add nuw nsw i8 %3, 32
store i8 %7, i8* %0
br label %8
8: ; preds = %6, %1
ret void
}
/* Variables and functions */
char *strrchr(char const *, int);
char *rindex(const char *p, int ch) { return strrchr(p, ch); }


x86 assembly (clang, -O0):
<rindex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <strrchr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rindex>:
jmp    1030 <strrchr@plt>

LLVM IR (-O0):
define i8* @rindex(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i8* @strrchr(i8* %5, i32 %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @rindex(i8* %0, i32 %1) {
%3 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i32 %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ write_port(int, int);
void kb_initialize(void) { write_port(0x21, 0xFD); }


x86 assembly (clang, -O0):
<kb_initialize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x21,%edi
mov    $0xfd,%esi
call   1030 <write_port@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<kb_initialize>:
mov    $0x21,%edi
mov    $0xfd,%esi
jmp    1030 <write_port@plt>

LLVM IR (-O0):
define void @kb_initialize() {
%1 = call i32 @write_port(i32 33, i32 253)
ret void
}

LLVM IR (-O2):
define void @kb_initialize() {
%1 = tail call i32 @write_port(i32 33, i32 253)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ gdb_close();
void catch_sigint(int sig_num) {
  gdb_close();
  exit(0);
}


x86 assembly (clang, -O0):
<catch_sigint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <gdb_close@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<catch_sigint>:
push   %rax
xor    %eax,%eax
call   1030 <gdb_close@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @catch_sigint(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @gdb_close()
%4 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @catch_sigint(i32 %0) {
%2 = tail call i32 (...) @gdb_close()
%3 = tail call i32 @exit(i32 0)
unreachable
}
unsigned height(unsigned n) { return 8 * sizeof(unsigned) - __builtin_clz(n); }


x86 assembly (clang, -O0):
<height>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
bsr    %eax,%eax
xor    $0x1f,%eax
movslq %eax,%rcx
mov    $0x20,%eax
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<height>:
bsr    %edi,%eax
xor    $0xffffffe0,%eax
add    $0x21,%eax
ret

LLVM IR (-O0):
define i32 @height(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @llvm.ctlz.i32(i32 %3, i1 true)
%5 = sext i32 %4 to i64
%6 = sub i64 32, %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @height(i32 %0) {
%2 = tail call i32 @llvm.ctlz.i32(i32 %0, i1 true)
%3 = sub nuw nsw i32 32, %2
ret i32 %3
}
int f6(int a, int b) { return a + b; }


x86 assembly (clang, -O0):
<f6>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f6>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @f6(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @f6(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
int CV_FOURCC(char c1, char c2, char c3, char c4) {
  return (c1 & 255) + ((c2 & 255) << 8) + ((c3 & 255) << 16) +
         ((c4 & 255) << 24);
}


x86 assembly (clang, -O0):
<CV_FOURCC>:
push   %rbp
mov    %rsp,%rbp
mov    %cl,%al
mov    %dl,%cl
mov    %sil,%dl
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %dl,-0x2(%rbp)
mov    %cl,-0x3(%rbp)
mov    %al,-0x4(%rbp)
movsbl -0x1(%rbp),%eax
and    $0xff,%eax
movsbl -0x2(%rbp),%ecx
and    $0xff,%ecx
shl    $0x8,%ecx
add    %ecx,%eax
movsbl -0x3(%rbp),%ecx
and    $0xff,%ecx
shl    $0x10,%ecx
add    %ecx,%eax
movsbl -0x4(%rbp),%ecx
and    $0xff,%ecx
shl    $0x18,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CV_FOURCC>:
movzbl %dil,%eax
movzbl %sil,%esi
shl    $0x8,%esi
or     %eax,%esi
movzbl %dl,%eax
shl    $0x10,%eax
or     %esi,%eax
shl    $0x18,%ecx
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @CV_FOURCC(i8 signext %0, i8 signext %1, i8 signext %2, i8 signext %3) {
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8 %0, i8* %5
store i8 %1, i8* %6
store i8 %2, i8* %7
store i8 %3, i8* %8
%9 = load i8, i8* %5
%10 = sext i8 %9 to i32
%11 = and i32 %10, 255
%12 = load i8, i8* %6
%13 = sext i8 %12 to i32
%14 = and i32 %13, 255
%15 = shl i32 %14, 8
%16 = add nsw i32 %11, %15
%17 = load i8, i8* %7
%18 = sext i8 %17 to i32
%19 = and i32 %18, 255
%20 = shl i32 %19, 16
%21 = add nsw i32 %16, %20
%22 = load i8, i8* %8
%23 = sext i8 %22 to i32
%24 = and i32 %23, 255
%25 = shl i32 %24, 24
%26 = add nsw i32 %21, %25
ret i32 %26
}

LLVM IR (-O2):
define i32 @CV_FOURCC(i8 signext %0, i8 signext %1, i8 signext %2, i8 signext %3) {
%5 = zext i8 %0 to i32
%6 = zext i8 %1 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = or i32 %7, %5
%9 = zext i8 %2 to i32
%10 = shl nuw nsw i32 %9, 16
%11 = or i32 %8, %10
%12 = zext i8 %3 to i32
%13 = shl nuw i32 %12, 24
%14 = or i32 %11, %13
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ interrupt_restart();
int /*<<< orphan*/ start_story();
void zrestart(void) {
  start_story();
  interrupt_restart();
}


x86 assembly (clang, -O0):
<zrestart>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <start_story@plt>
mov    $0x0,%al
call   1040 <interrupt_restart@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<zrestart>:
push   %rax
xor    %eax,%eax
call   1030 <start_story@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <interrupt_restart@plt>

LLVM IR (-O0):
define void @zrestart() {
%1 = call i32 (...) @start_story()
%2 = call i32 (...) @interrupt_restart()
ret void
}

LLVM IR (-O2):
define void @zrestart() {
%1 = tail call i32 (...) @start_story()
%2 = tail call i32 (...) @interrupt_restart()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char const *, size_t);
int strlen(char const *);
char *xmalloc(size_t);
char *xstrdup(const char *s) {
  size_t len = strlen(s) + 1;
  char *ret = xmalloc(len);
  memcpy(ret, s, len);
  return ret;
}


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <xmalloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1050 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
add    $0x1,%eax
movslq %eax,%r15
mov    %r15,%rdi
call   1040 <xmalloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1050 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = add nsw i32 %6, 1
%8 = sext i32 %7 to i64
store i64 %8, i64* %3
%9 = load i64, i64* %3
%10 = call i8* @xmalloc(i64 %9)
store i8* %10, i8** %4
%11 = load i8*, i8** %4
%12 = load i8*, i8** %2
%13 = load i64, i64* %3
%14 = call i32 @memcpy(i8* %11, i8* %12, i64 %13)
%15 = load i8*, i8** %4
ret i8* %15
}

LLVM IR (-O2):
define i8* @xstrdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = sext i32 %3 to i64
%5 = tail call i8* @xmalloc(i64 %4)
%6 = tail call i32 @memcpy(i8* %5, i8* %0, i64 %4)
ret i8* %5
}
void ff_hevc_put_hevc_qpel_v16_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_qpel_v16_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_qpel_v16_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_qpel_v16_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_qpel_v16_8_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_eval(int);
int strcmp(char *, char *);
void strcmp_1() {
  char *x = "234";
  char *y = "123";
  clang_analyzer_eval(strcmp(x, y) == 1);
}


x86 assembly (clang, -O0):
<strcmp_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <clang_analyzer_eval@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp_1>:
mov    $0x1,%edi
jmp    1030 <clang_analyzer_eval@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"234\00"
@.str.1 = [4 x i8] c"123\00"
define void @strcmp_1() {
%1 = alloca i8*
%2 = alloca i8*
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %1
%4 = load i8*, i8** %2
%5 = call i32 @strcmp(i8* %3, i8* %4)
%6 = icmp eq i32 %5, 1
%7 = zext i1 %6 to i32
%8 = call i32 @clang_analyzer_eval(i32 %7)
ret void
}

LLVM IR (-O2):
define void @strcmp_1() {
%1 = tail call i32 @clang_analyzer_eval(i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isgraph(int);
void t_isgraph_0x5f() {
  Assert_real((isgraph(95)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              480, ("isgraph should be 1 for _"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x5f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5f,%edi
call   1040 <isgraph@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x1e0,%edx
lea    0xf65(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x5f>:
push   %rax
mov    $0x5f,%edi
call   1040 <isgraph@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x1e0,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for _\00"
define void @t_isgraph_0x5f() {
%1 = call i32 @isgraph(i32 95)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 480, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for _\00"
define void @t_isgraph_0x5f() {
%1 = tail call i32 @isgraph(i32 95)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 480, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void ___sl_plot_trace_once(const char *plot_name, const char *node_name) {
  (void)plot_name;
  (void)node_name;
}


x86 assembly (clang, -O0):
<___sl_plot_trace_once>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<___sl_plot_trace_once>:
ret

LLVM IR (-O0):
define void @___sl_plot_trace_once(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
ret void
}

LLVM IR (-O2):
define void @___sl_plot_trace_once(i8* nocapture %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ krypt(char *, int);
void dekrypt(char *str, int n) { krypt(str, 26 - (n % 26)); }


x86 assembly (clang, -O0):
<dekrypt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%eax
mov    $0x1a,%ecx
cltd
idiv   %ecx
mov    $0x1a,%esi
sub    %edx,%esi
call   1030 <krypt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dekrypt>:
movslq %esi,%rax
imul   $0x4ec4ec4f,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,4),%edx
lea    (%rdx,%rdx,4),%esi
add    %ecx,%esi
sub    %eax,%esi
add    $0x1a,%esi
jmp    1030 <krypt@plt>

LLVM IR (-O0):
define void @dekrypt(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = srem i32 %6, 26
%8 = sub nsw i32 26, %7
%9 = call i32 @krypt(i8* %5, i32 %8)
ret void
}

LLVM IR (-O2):
define void @dekrypt(i8* %0, i32 %1) {
%3 = srem i32 %1, 26
%4 = sub nsw i32 26, %3
%5 = tail call i32 @krypt(i8* %0, i32 %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int /*<<< orphan*/ dlock_unlock(int /*<<< orphan*/ *, int);
int o_pthread_mutex_unlock(int /*<<< orphan*/ *);
scalar_t__ pthread_self();
int ___pthread_mutex_unlock(pthread_mutex_t *mutex, char *lname, char *fn,
                            int ln) {
  ;
  dlock_unlock(mutex, (int)pthread_self());
  return o_pthread_mutex_unlock(mutex);
}


x86 assembly (clang, -O0):
<___pthread_mutex_unlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    $0x0,%al
call   1040 <pthread_self@plt>
mov    -0x28(%rbp),%rdi
mov    %eax,%esi
call   1050 <dlock_unlock@plt>
mov    -0x8(%rbp),%rdi
call   1030 <o_pthread_mutex_unlock@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<___pthread_mutex_unlock>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <pthread_self@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1050 <dlock_unlock@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <o_pthread_mutex_unlock@plt>

LLVM IR (-O0):
define i32 @___pthread_mutex_unlock(i32* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store i32* %0, i32** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i32*, i32** %5
%10 = call i64 (...) @pthread_self()
%11 = trunc i64 %10 to i32
%12 = call i32 @dlock_unlock(i32* %9, i32 %11)
%13 = load i32*, i32** %5
%14 = call i32 @o_pthread_mutex_unlock(i32* %13)
ret i32 %14
}

LLVM IR (-O2):
define i32 @___pthread_mutex_unlock(i32* %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i32 %3) {
%5 = tail call i64 (...) @pthread_self()
%6 = trunc i64 %5 to i32
%7 = tail call i32 @dlock_unlock(i32* %0, i32 %6)
%8 = tail call i32 @o_pthread_mutex_unlock(i32* %0)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char **argv) {
  printf("TEST_C not defined.\n");
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"TEST_C not defined.\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@str = [20 x i8] c"TEST_C not defined.\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ VirtualizeTimerC__0__Timer__stop(unsigned int);
void Msp430RefVoltGeneratorP__SwitchOnTimer__stop(void) {
  VirtualizeTimerC__0__Timer__stop(6U);
}


x86 assembly (clang, -O0):
<Msp430RefVoltGeneratorP__SwitchOnTimer__stop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
call   1030 <VirtualizeTimerC__0__Timer__stop@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430RefVoltGeneratorP__SwitchOnTimer__stop>:
mov    $0x6,%edi
jmp    1030 <VirtualizeTimerC__0__Timer__stop@plt>

LLVM IR (-O0):
define void @Msp430RefVoltGeneratorP__SwitchOnTimer__stop() {
%1 = call i32 @VirtualizeTimerC__0__Timer__stop(i32 6)
ret void
}

LLVM IR (-O2):
define void @Msp430RefVoltGeneratorP__SwitchOnTimer__stop() {
%1 = tail call i32 @VirtualizeTimerC__0__Timer__stop(i32 6)
ret void
}
/* Type definitions */
struct rand {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ dbg_tmr_get();
int /*<<< orphan*/ rand_init(struct rand *, int /*<<< orphan*/);
void rand_init_time(struct rand *r) { rand_init(r, dbg_tmr_get()); }


x86 assembly (clang, -O0):
<rand_init_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1040 <dbg_tmr_get@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1030 <rand_init@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_init_time>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <dbg_tmr_get@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1030 <rand_init@plt>

LLVM IR (-O0):
%struct.rand = type { i32 }
define void @rand_init_time(%struct.rand* %0) {
%2 = alloca %struct.rand*
store %struct.rand* %0, %struct.rand** %2
%3 = load %struct.rand*, %struct.rand** %2
%4 = call i32 (...) @dbg_tmr_get()
%5 = call i32 @rand_init(%struct.rand* %3, i32 %4)
ret void
}

LLVM IR (-O2):
%struct.rand = type { i32 }
define void @rand_init_time(%struct.rand* %0) {
%2 = tail call i32 (...) @dbg_tmr_get()
%3 = tail call i32 @rand_init(%struct.rand* %0, i32 %2)
ret void
}
/* Type definitions */
struct iovec {
  size_t iov_len;
  void *iov_base;
};

/* Variables and functions */
void _append_iov(size_t *iovlen, struct iovec *iov, size_t size, void *buffer) {
  iov[*iovlen].iov_len = size;
  iov[*iovlen].iov_base = buffer;
  *iovlen += 1;
}


x86 assembly (clang, -O0):
<_append_iov>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
mov    (%rdx),%rdx
shl    $0x4,%rdx
add    %rdx,%rax
mov    %rcx,(%rax)
mov    -0x20(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
mov    (%rdx),%rdx
shl    $0x4,%rdx
add    %rdx,%rax
mov    %rcx,0x8(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_append_iov>:
mov    (%rdi),%rax
shl    $0x4,%rax
mov    %rdx,(%rsi,%rax,1)
mov    (%rdi),%rax
mov    %rax,%rdx
shl    $0x4,%rdx
mov    %rcx,0x8(%rsi,%rdx,1)
add    $0x1,%rax
mov    %rax,(%rdi)
ret

LLVM IR (-O0):
%struct.iovec = type { i64, i8* }
define void @_append_iov(i64* %0, %struct.iovec* %1, i64 %2, i8* %3) {
%5 = alloca i64*
%6 = alloca %struct.iovec*
%7 = alloca i64
%8 = alloca i8*
store i64* %0, i64** %5
store %struct.iovec* %1, %struct.iovec** %6
store i64 %2, i64* %7
store i8* %3, i8** %8
%9 = load i64, i64* %7
%10 = load %struct.iovec*, %struct.iovec** %6
%11 = load i64*, i64** %5
%12 = load i64, i64* %11
%13 = getelementptr inbounds %struct.iovec, %struct.iovec* %10, i64 %12
%14 = getelementptr inbounds %struct.iovec, %struct.iovec* %13, i32 0, i32 0
store i64 %9, i64* %14
%15 = load i8*, i8** %8
%16 = load %struct.iovec*, %struct.iovec** %6
%17 = load i64*, i64** %5
%18 = load i64, i64* %17
%19 = getelementptr inbounds %struct.iovec, %struct.iovec* %16, i64 %18
%20 = getelementptr inbounds %struct.iovec, %struct.iovec* %19, i32 0, i32 1
store i8* %15, i8** %20
%21 = load i64*, i64** %5
%22 = load i64, i64* %21
%23 = add i64 %22, 1
store i64 %23, i64* %21
ret void
}

LLVM IR (-O2):
%struct.iovec = type { i64, i8* }
define void @_append_iov(i64* nocapture %0, %struct.iovec* nocapture writeonly %1, i64 %2, i8* %3) {
%5 = load i64, i64* %0
%6 = getelementptr inbounds %struct.iovec, %struct.iovec* %1, i64 %5, i32 0
store i64 %2, i64* %6
%7 = load i64, i64* %0
%8 = getelementptr inbounds %struct.iovec, %struct.iovec* %1, i64 %7, i32 1
store i8* %3, i8** %8
%9 = add i64 %7, 1
store i64 %9, i64* %0
ret void
}
void drawMap() {}


x86 assembly (clang, -O0):
<drawMap>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawMap>:
ret

LLVM IR (-O0):
define void @drawMap() {
ret void
}

LLVM IR (-O2):
define void @drawMap() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, int);
void testPrint(int line, char *func) {
  printf("Function %s is on line %d.\n", func, line);
}


x86 assembly (clang, -O0):
<testPrint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x4(%rbp),%edx
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testPrint>:
mov    %edi,%edx
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"Function %s is on line %d.\0A\00"
define void @testPrint(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i32, i32* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c"Function %s is on line %d.\0A\00"
define void @testPrint(i32 %0, i8* %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %1, i32 %0)
ret void
}
/* Variables and functions */
int strlen(char *);
int f() { return strlen("abc"); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <strlen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    0xee9(%rip),%rdi
jmp    1030 <strlen@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"abc\00"
define i32 @f() {
%1 = call i32 @strlen(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [4 x i8] c"abc\00"
define i32 @f() {
%1 = tail call i32 @strlen(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
int MTableHash(char *key) {
  char *p;
  int res;
  res = 0;
  for (p = key; *p != L'\0'; p++)
    res = (res << 1) + *p;
  if (res < 0)
    res = -res;
  return res;
}


x86 assembly (clang, -O0):
<MTableHash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     114a <MTableHash+0x4a>
mov    -0x14(%rbp),%eax
shl    $0x1,%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
add    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1117 <MTableHash+0x17>
cmpl   $0x0,-0x14(%rbp)
jge    115c <MTableHash+0x5c>
xor    %eax,%eax
sub    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<MTableHash>:
mov    (%rdi),%al
test   %al,%al
je     1123 <MTableHash+0x23>
add    $0x1,%rdi
xor    %ecx,%ecx
nopl   0x0(%rax)
movsbl %al,%eax
lea    (%rax,%rcx,2),%ecx
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
jne    1110 <MTableHash+0x10>
jmp    1125 <MTableHash+0x25>
xor    %ecx,%ecx
mov    %ecx,%eax
neg    %eax
cmovs  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @MTableHash(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %4
%5 = load i8*, i8** %2
store i8* %5, i8** %3
br label %6
6: ; preds = %18, %1
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %21
11: ; preds = %6
%12 = load i32, i32* %4
%13 = shl i32 %12, 1
%14 = load i8*, i8** %3
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = add nsw i32 %13, %16
store i32 %17, i32* %4
br label %18
18: ; preds = %11
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %3
br label %6
21: ; preds = %6
%22 = load i32, i32* %4
%23 = icmp slt i32 %22, 0
br i1 %23, label %24, label %27
24: ; preds = %21
%25 = load i32, i32* %4
%26 = sub nsw i32 0, %25
store i32 %26, i32* %4
br label %27
27: ; preds = %24, %21
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @MTableHash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %10, %4 ], [ 0, %1 ]
%7 = phi i8* [ %11, %4 ], [ %0, %1 ]
%8 = sext i8 %5 to i32
%9 = shl i32 %6, 1
%10 = add nsw i32 %9, %8
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i32 [ 0, %1 ], [ %10, %4 ]
%16 = tail call i32 @llvm.abs.i32(i32 %15, i1 true)
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ BLNK_AddSym(char *, void *);
void BLNK_AddSymArray(char **name, void **ptr, int cnt) {
  int i;
  for (i = 0; i < cnt; i++)
    BLNK_AddSym(name[i], ptr[i]);
}


x86 assembly (clang, -O0):
<BLNK_AddSymArray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1161 <BLNK_AddSymArray+0x51>
mov    -0x8(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,8),%rsi
call   1030 <BLNK_AddSym@plt>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    112a <BLNK_AddSymArray+0x1a>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BLNK_AddSymArray>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %edx,%edx
jle    1146 <BLNK_AddSymArray+0x36>
mov    %rsi,%r14
mov    %rdi,%r15
mov    %edx,%r12d
xor    %ebx,%ebx
nopw   0x0(%rax,%rax,1)
mov    (%r15,%rbx,8),%rdi
mov    (%r14,%rbx,8),%rsi
call   1030 <BLNK_AddSym@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <BLNK_AddSymArray+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @BLNK_AddSymArray(i8** %0, i8** %1, i32 %2) {
%4 = alloca i8**
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i8** %0, i8*** %4
store i8** %1, i8*** %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %24, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %27
12: ; preds = %8
%13 = load i8**, i8*** %4
%14 = load i32, i32* %7
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8*, i8** %13, i64 %15
%17 = load i8*, i8** %16
%18 = load i8**, i8*** %5
%19 = load i32, i32* %7
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8*, i8** %18, i64 %20
%22 = load i8*, i8** %21
%23 = call i32 @BLNK_AddSym(i8* %17, i8* %22)
br label %24
24: ; preds = %12
%25 = load i32, i32* %7
%26 = add nsw i32 %25, 1
store i32 %26, i32* %7
br label %8
27: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @BLNK_AddSymArray(i8** nocapture %0, i8** nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %16
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %7
7: ; preds = %5, %7
%8 = phi i64 [ 0, %5 ], [ %14, %7 ]
%9 = getelementptr inbounds i8*, i8** %0, i64 %8
%10 = load i8*, i8** %9
%11 = getelementptr inbounds i8*, i8** %1, i64 %8
%12 = load i8*, i8** %11
%13 = tail call i32 @BLNK_AddSym(i8* %10, i8* %12)
%14 = add nuw nsw i64 %8, 1
%15 = icmp eq i64 %14, %6
br i1 %15, label %16, label %7
16: ; preds = %7, %3
ret void
}
void X509_NAME_ENTRY_get_data(void) {}


x86 assembly (clang, -O0):
<X509_NAME_ENTRY_get_data>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_NAME_ENTRY_get_data>:
ret

LLVM IR (-O0):
define void @X509_NAME_ENTRY_get_data() {
ret void
}

LLVM IR (-O2):
define void @X509_NAME_ENTRY_get_data() {
ret void
}