xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ echo_chr(unsigned char);
void echo_buf(unsigned char *buf, int buf_size) {
  int ptr = 0;
  for (ptr = 0; ptr < buf_size; ptr++) {
    echo_chr(buf[ptr]);
  }
}


x86 assembly (clang, -O0):
<echo_buf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1158 <echo_buf+0x48>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movzbl (%rax,%rcx,1),%edi
call   1030 <echo_chr@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    112d <echo_buf+0x1d>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<echo_buf>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1143 <echo_buf+0x33>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movzbl (%r14,%rbx,1),%edi
call   1030 <echo_chr@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <echo_buf+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @echo_buf(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i8, i8* %14
%16 = call i32 @echo_chr(i8 zeroext %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @echo_buf(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
%10 = tail call i32 @echo_chr(i8 zeroext %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
/* Variables and functions */
scalar_t__ strncmp(char *, char *, int);
void strncmp_embedded_null() {
  if (strncmp("ab\0zz", "ab\0yy", 4) != 0)
    (void)*(char *)0;
}


x86 assembly (clang, -O0):
<strncmp_embedded_null>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee4(%rip),%rsi
mov    $0x4,%edx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
je     1136 <strncmp_embedded_null+0x26>
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncmp_embedded_null>:
lea    0xee9(%rip),%rdi
lea    0xee8(%rip),%rsi
mov    $0x4,%edx
jmp    1030 <strncmp@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"ab\00zz\00"
@.str.1 = [6 x i8] c"ab\00yy\00"
define void @strncmp_embedded_null() {
%1 = call i64 @strncmp(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 4)
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = load i8, i8* null
br label %5
5: ; preds = %3, %0
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"ab\00zz\00"
@.str.1 = [6 x i8] c"ab\00yy\00"
define void @strncmp_embedded_null() {
%1 = tail call i64 @strncmp(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ rev();
int main() {
  rev();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rev@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <rev@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @rev()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @rev()
ret i32 0
}
/* Variables and functions */
double exp(int /*<<< orphan*/);
int /*<<< orphan*/ lfact(int);
double fact(int x) { return exp(lfact(x)); }


x86 assembly (clang, -O0):
<fact>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <lfact@plt>
mov    %eax,%edi
call   1040 <exp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fact>:
push   %rax
call   1030 <lfact@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <exp@plt>

LLVM IR (-O0):
define double @fact(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @lfact(i32 %3)
%5 = call double @exp(i32 %4)
ret double %5
}

LLVM IR (-O2):
define double @fact(i32 %0) {
%2 = tail call i32 @lfact(i32 %0)
%3 = tail call double @exp(i32 %2)
ret double %3
}
int check(long pos) {
  long value = 1;
  int i;
  for (i = 1; i <= pos; i++) {
    value += (i - 1);
    if (value == pos)
      return 1;
    if (value > pos)
      return -1;
  }
  return -1;
}


x86 assembly (clang, -O0):
<check>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movq   $0x1,-0x18(%rbp)
movl   $0x1,-0x1c(%rbp)
movslq -0x1c(%rbp),%rax
cmp    -0x10(%rbp),%rax
jg     117c <check+0x7c>
mov    -0x1c(%rbp),%eax
sub    $0x1,%eax
cltq
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jne    114f <check+0x4f>
movl   $0x1,-0x4(%rbp)
jmp    1183 <check+0x83>
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jle    1169 <check+0x69>
movl   $0xffffffff,-0x4(%rbp)
jmp    1183 <check+0x83>
jmp    116e <check+0x6e>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1117 <check+0x17>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check>:
mov    $0xffffffff,%eax
test   %rdi,%rdi
jle    1136 <check+0x36>
mov    $0x1,%ecx
xor    %edx,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
add    %rdx,%rcx
cmp    %rdi,%rcx
je     1137 <check+0x37>
jg     1136 <check+0x36>
lea    0x2(%rdx),%esi
add    $0x1,%rdx
cmp    %rdi,%rsi
jle    1120 <check+0x20>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @check(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i64
%5 = alloca i32
store i64 %0, i64* %3
store i64 1, i64* %4
store i32 1, i32* %5
br label %6
6: ; preds = %27, %1
%7 = load i32, i32* %5
%8 = sext i32 %7 to i64
%9 = load i64, i64* %3
%10 = icmp sle i64 %8, %9
br i1 %10, label %11, label %30
11: ; preds = %6
%12 = load i32, i32* %5
%13 = sub nsw i32 %12, 1
%14 = sext i32 %13 to i64
%15 = load i64, i64* %4
%16 = add nsw i64 %15, %14
store i64 %16, i64* %4
%17 = load i64, i64* %4
%18 = load i64, i64* %3
%19 = icmp eq i64 %17, %18
br i1 %19, label %20, label %21
20: ; preds = %11
store i32 1, i32* %2
br label %31
21: ; preds = %11
%22 = load i64, i64* %4
%23 = load i64, i64* %3
%24 = icmp sgt i64 %22, %23
br i1 %24, label %25, label %26
25: ; preds = %21
store i32 -1, i32* %2
br label %31
26: ; preds = %21
br label %27
27: ; preds = %26
%28 = load i32, i32* %5
%29 = add nsw i32 %28, 1
store i32 %29, i32* %5
br label %6
30: ; preds = %6
store i32 -1, i32* %2
br label %31
31: ; preds = %30, %25, %20
%32 = load i32, i32* %2
ret i32 %32
}

LLVM IR (-O2):
define i32 @check(i64 %0) {
%2 = icmp slt i64 %0, 1
br i1 %2, label %15, label %3
3: ; preds = %1, %9
%4 = phi i64 [ %11, %9 ], [ 1, %1 ]
%5 = phi i64 [ %7, %9 ], [ 1, %1 ]
%6 = add nsw i64 %4, -1
%7 = add nsw i64 %5, %6
%8 = icmp eq i64 %7, %0
br i1 %8, label %15, label %9
9: ; preds = %3
%10 = icmp sgt i64 %7, %0
%11 = add nuw i64 %4, 1
%12 = and i64 %11, 4294967295
%13 = icmp sgt i64 %12, %0
%14 = select i1 %10, i1 true, i1 %13
br i1 %14, label %15, label %3
15: ; preds = %3, %9, %1
%16 = phi i32 [ -1, %1 ], [ -1, %9 ], [ 1, %3 ]
ret i32 %16
}
int HelpItem131(void) { return 0; }


x86 assembly (clang, -O0):
<HelpItem131>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelpItem131>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HelpItem131() {
ret i32 0
}

LLVM IR (-O2):
define i32 @HelpItem131() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int main(int argc, char *argv[]) {
  char a1 = 0;
  char a2 = 0;
  char a3 = 0;
#pragma omp parallel sections shared(a1, a2, a3)
  {
#pragma omp section
    { a1 = 1; }
#pragma omp section
    { a2 = 1; }
#pragma omp section
    { a3 = 1; }
  }
  if (!a1 || !a2 || !a3)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movb   $0x0,-0x11(%rbp)
movb   $0x0,-0x12(%rbp)
movb   $0x0,-0x13(%rbp)
movb   $0x1,-0x11(%rbp)
movb   $0x1,-0x12(%rbp)
movb   $0x1,-0x13(%rbp)
cmpb   $0x0,-0x11(%rbp)
je     115c <main+0x4c>
cmpb   $0x0,-0x12(%rbp)
je     115c <main+0x4c>
cmpb   $0x0,-0x13(%rbp)
jne    1163 <main+0x53>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8 0, i8* %6
store i8 0, i8* %7
store i8 0, i8* %8
store i8 1, i8* %6
store i8 1, i8* %7
store i8 1, i8* %8
%9 = load i8, i8* %6
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %2
%12 = load i8, i8* %7
%13 = icmp ne i8 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i8, i8* %8
%16 = icmp ne i8 %15, 0
br i1 %16, label %19, label %17
17: ; preds = %14, %11, %2
%18 = call i32 (...) @abort()
unreachable
19: ; preds = %14
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ u_long;

/* Variables and functions */
int /*<<< orphan*/ strtoinaddr(char *, int /*<<< orphan*/);
u_long inet_addr(char *str) { return strtoinaddr(str, 0); }


x86 assembly (clang, -O0):
<inet_addr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <strtoinaddr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inet_addr>:
xor    %esi,%esi
jmp    1030 <strtoinaddr@plt>

LLVM IR (-O0):
define i32 @inet_addr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strtoinaddr(i8* %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @inet_addr(i8* %0) {
%2 = tail call i32 @strtoinaddr(i8* %0, i32 0)
ret i32 %2
}
/* Variables and functions */
int partition(int *, int, int);
void quick_sort(int array[], int p, int r) {
  int q;
  if (p < r) {
    q = partition(array, p, r);
    quick_sort(array, p, q - 1);
    quick_sort(array, q + 1, r);
  }
}


x86 assembly (clang, -O0):
<quick_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <quick_sort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quick_sort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quick_sort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quick_sort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quick_sort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quick_sort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quick_sort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quick_sort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partition(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @quick_sort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quick_sort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
void gtk_paint_check() {}


x86 assembly (clang, -O0):
<gtk_paint_check>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_paint_check>:
ret

LLVM IR (-O0):
define void @gtk_paint_check() {
ret void
}

LLVM IR (-O2):
define void @gtk_paint_check() {
ret void
}
int test_imm_D5int8_reg(signed char val) {
  return ((val) & (-0xD5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D5int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff2b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D5int8_reg>:
test   $0xffffff2b,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D5int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -213
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D5int8_reg(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = and i32 %2, -213
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ put8(int);
void xor_reg32_reg32(unsigned long reg1, unsigned long reg2) {
  put8(0x31);
  put8(0xC0 | (reg2 << 3) | reg1);
}


x86 assembly (clang, -O0):
<xor_reg32_reg32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x31,%edi
call   1030 <put8@plt>
mov    -0x10(%rbp),%rax
shl    $0x3,%rax
or     $0xc0,%rax
or     -0x8(%rbp),%rax
mov    %eax,%edi
call   1030 <put8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xor_reg32_reg32>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    $0x31,%edi
call   1030 <put8@plt>
shl    $0x3,%r14d
or     %r14d,%ebx
or     $0xc0,%ebx
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @xor_reg32_reg32(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = call i32 @put8(i32 49)
%6 = load i64, i64* %4
%7 = shl i64 %6, 3
%8 = or i64 192, %7
%9 = load i64, i64* %3
%10 = or i64 %8, %9
%11 = trunc i64 %10 to i32
%12 = call i32 @put8(i32 %11)
ret void
}

LLVM IR (-O2):
define void @xor_reg32_reg32(i64 %0, i64 %1) {
%3 = tail call i32 @put8(i32 49)
%4 = shl i64 %1, 3
%5 = or i64 %4, %0
%6 = trunc i64 %5 to i32
%7 = or i32 %6, 192
%8 = tail call i32 @put8(i32 %7)
ret void
}
void cellgen_dma_prep_start() {}


x86 assembly (clang, -O0):
<cellgen_dma_prep_start>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cellgen_dma_prep_start>:
ret

LLVM IR (-O0):
define void @cellgen_dma_prep_start() {
ret void
}

LLVM IR (-O2):
define void @cellgen_dma_prep_start() {
ret void
}
int unix_fcntl_o_evtonly() { return -1; }


x86 assembly (clang, -O0):
<unix_fcntl_o_evtonly>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unix_fcntl_o_evtonly>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @unix_fcntl_o_evtonly() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @unix_fcntl_o_evtonly() {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
int err(char *m) {
  fprintf(stderr, "error: %s\n", m);
  return 1;
}


x86 assembly (clang, -O0):
<err>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<err>:
push   %rax
mov    %rdi,%rdx
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [11 x i8] c"error: %s\0A\00"
define i32 @err(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [11 x i8] c"error: %s\0A\00"
define i32 @err(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char **);
int main(int argc, char **argv) {
  printf(
      "This is just a dummy program to satisfy premake. argc: %d, argv: %p\n",
      argc, argv);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    %rsi,%rdx
mov    %edi,%esi
lea    0xee3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [69 x i8] c"This is just a dummy program to satisfy premake. argc: %d, argv: %p\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @printf(i8* getelementptr inbounds ([69 x i8], [69 x i8]* @.str, i64 0, i64 0), i32 %6, i8** %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [69 x i8] c"This is just a dummy program to satisfy premake. argc: %d, argv: %p\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([69 x i8], [69 x i8]* @.str, i64 0, i64 0), i32 %0, i8** %1)
ret i32 0
}
/* Type definitions */
typedef long uint32_t;

/* Variables and functions */
void write32(unsigned long BASE, unsigned long reg1, signed long val) {
  unsigned long val_to_write, val32, temp;
  unsigned long bitmask[1] = {0x00000000};
  int byte;
  *((uint32_t *)(BASE + reg1)) = val;
}


x86 assembly (clang, -O0):
<write32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    -0x38(%rbp),%rdi
xor    %esi,%esi
mov    $0x8,%edx
call   1030 <memset@plt>
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rcx,(%rax)
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write32>:
mov    %rdx,(%rsi,%rdi,1)
ret

LLVM IR (-O0):
define void @write32(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
%10 = alloca [1 x i64]
%11 = alloca i32
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%12 = bitcast [1 x i64]* %10 to i8*
%13 = load i64, i64* %6
%14 = load i64, i64* %4
%15 = load i64, i64* %5
%16 = add i64 %14, %15
%17 = inttoptr i64 %16 to i64*
store i64 %13, i64* %17
ret void
}

LLVM IR (-O2):
define void @write32(i64 %0, i64 %1, i64 %2) {
%4 = add i64 %1, %0
%5 = inttoptr i64 %4 to i64*
store i64 %2, i64* %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ errx(int, char *, char *);
void badconv(char *ch) { errx(1, "%%%s: bad conversion character", ch); }


x86 assembly (clang, -O0):
<badconv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
mov    $0x1,%edi
lea    0xed4(%rip),%rsi
call   1030 <errx@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<badconv>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rsi
mov    $0x1,%edi
jmp    1030 <errx@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"%%%s: bad conversion character\00"
define void @badconv(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @errx(i32 1, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"%%%s: bad conversion character\00"
define void @badconv(i8* %0) {
%2 = tail call i32 @errx(i32 1, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void Debug(const char *str, ...) {}


x86 assembly (clang, -O0):
<Debug>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Debug>:
ret

LLVM IR (-O0):
define void @Debug(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @Debug(i8* nocapture %0, ...) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mp_hal_delay_ms(int);
int mp_hal_rs232_getChar();
int /*<<< orphan*/ mp_hal_rs232_resetRxPacket();
int /*<<< orphan*/ mp_hal_rs232_setConfig(int, int, int /*<<< orphan*/);
void testUartSetup(void) {
  mp_hal_rs232_setConfig(9600, 1, 0);
  while (mp_hal_rs232_getChar() != -1)
    mp_hal_delay_ms(1);
  mp_hal_rs232_resetRxPacket();
}


x86 assembly (clang, -O0):
<testUartSetup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2580,%edi
mov    $0x1,%esi
xor    %edx,%edx
call   1050 <mp_hal_rs232_setConfig@plt>
mov    $0x0,%al
call   1060 <mp_hal_rs232_getChar@plt>
cmp    $0xffffffff,%eax
je     1174 <testUartSetup+0x34>
mov    $0x1,%edi
call   1040 <mp_hal_delay_ms@plt>
jmp    1155 <testUartSetup+0x15>
mov    $0x0,%al
call   1030 <mp_hal_rs232_resetRxPacket@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<testUartSetup>:
push   %rax
mov    $0x2580,%edi
mov    $0x1,%esi
xor    %edx,%edx
call   1050 <mp_hal_rs232_setConfig@plt>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
xor    %eax,%eax
call   1060 <mp_hal_rs232_getChar@plt>
cmp    $0xffffffff,%eax
je     1178 <testUartSetup+0x38>
mov    $0x1,%edi
call   1040 <mp_hal_delay_ms@plt>
jmp    1160 <testUartSetup+0x20>
xor    %eax,%eax
pop    %rcx
jmp    1030 <mp_hal_rs232_resetRxPacket@plt>

LLVM IR (-O0):
define void @testUartSetup() {
%1 = call i32 @mp_hal_rs232_setConfig(i32 9600, i32 1, i32 0)
br label %2
2: ; preds = %5, %0
%3 = call i32 (...) @mp_hal_rs232_getChar()
%4 = icmp ne i32 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = call i32 @mp_hal_delay_ms(i32 1)
br label %2
7: ; preds = %2
%8 = call i32 (...) @mp_hal_rs232_resetRxPacket()
ret void
}

LLVM IR (-O2):
define void @testUartSetup() {
%1 = tail call i32 @mp_hal_rs232_setConfig(i32 9600, i32 1, i32 0)
%2 = tail call i32 (...) @mp_hal_rs232_getChar()
%3 = icmp eq i32 %2, -1
br i1 %3, label %8, label %4
4: ; preds = %0, %4
%5 = tail call i32 @mp_hal_delay_ms(i32 1)
%6 = tail call i32 (...) @mp_hal_rs232_getChar()
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %4
8: ; preds = %4, %0
%9 = tail call i32 (...) @mp_hal_rs232_resetRxPacket()
ret void
}
void pcp_def_net_sock6_metrics(void) {}


x86 assembly (clang, -O0):
<pcp_def_net_sock6_metrics>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcp_def_net_sock6_metrics>:
ret

LLVM IR (-O0):
define void @pcp_def_net_sock6_metrics() {
ret void
}

LLVM IR (-O2):
define void @pcp_def_net_sock6_metrics() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t safe(uint32_t addr) { return addr & 0x10000000 - 1; }


x86 assembly (clang, -O0):
<safe>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xfffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe>:
mov    %edi,%eax
and    $0xfffffff,%eax
ret

LLVM IR (-O0):
define i32 @safe(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 268435455
ret i32 %4
}

LLVM IR (-O2):
define i32 @safe(i32 %0) {
%2 = and i32 %0, 268435455
ret i32 %2
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMR80_get(void) { return U_WMRCORENONE_get("U_WMR80"); }


x86 assembly (clang, -O0):
<U_WMR80_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR80_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR80\00"
define i32 @U_WMR80_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR80\00"
define i32 @U_WMR80_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ bound_error(char *);
void bound_alloc_error(void) {
  bound_error("not enough memory for bound checking code");
}


x86 assembly (clang, -O0):
<bound_alloc_error>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <bound_error@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bound_alloc_error>:
lea    0xee9(%rip),%rdi
jmp    1030 <bound_error@plt>

LLVM IR (-O0):
@.str = [42 x i8] c"not enough memory for bound checking code\00"
define void @bound_alloc_error() {
%1 = call i32 @bound_error(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [42 x i8] c"not enough memory for bound checking code\00"
define void @bound_alloc_error() {
%1 = tail call i32 @bound_error(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ zsim_roi_end();
void zsim_roi_end_() { zsim_roi_end(); }


x86 assembly (clang, -O0):
<zsim_roi_end_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <zsim_roi_end@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<zsim_roi_end_>:
xor    %eax,%eax
jmp    1030 <zsim_roi_end@plt>

LLVM IR (-O0):
define void @zsim_roi_end_() {
%1 = call i32 (...) @zsim_roi_end()
ret void
}

LLVM IR (-O2):
define void @zsim_roi_end_() {
%1 = tail call i32 (...) @zsim_roi_end()
ret void
}
int utf8_is_ascii(char *s) {
  int i;
  for (i = 0; s[i] != '\0'; i++)
    if (s[i] & 0x80)
      return (0);
  return (1);
}


x86 assembly (clang, -O0):
<utf8_is_ascii>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     115d <utf8_is_ascii+0x5d>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     114a <utf8_is_ascii+0x4a>
movl   $0x0,-0x4(%rbp)
jmp    1164 <utf8_is_ascii+0x64>
jmp    114f <utf8_is_ascii+0x4f>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    110f <utf8_is_ascii+0xf>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utf8_is_ascii>:
mov    (%rdi),%cl
mov    $0x1,%eax
test   %cl,%cl
je     111f <utf8_is_ascii+0x1f>
add    $0x1,%rdi
nop
test   %cl,%cl
js     1120 <utf8_is_ascii+0x20>
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <utf8_is_ascii+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @utf8_is_ascii(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
br label %5
5: ; preds = %24, %1
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %27
13: ; preds = %5
%14 = load i8*, i8** %3
%15 = load i32, i32* %4
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = and i32 %19, 128
%21 = icmp ne i32 %20, 0
br i1 %21, label %22, label %23
22: ; preds = %13
store i32 0, i32* %2
br label %28
23: ; preds = %13
br label %24
24: ; preds = %23
%25 = load i32, i32* %4
%26 = add nsw i32 %25, 1
store i32 %26, i32* %4
br label %5
27: ; preds = %5
store i32 1, i32* %2
br label %28
28: ; preds = %27, %22
%29 = load i32, i32* %2
ret i32 %29
}

LLVM IR (-O2):
define i32 @utf8_is_ascii(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %8
4: ; preds = %8
%5 = getelementptr inbounds i8, i8* %0, i64 %12
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
br i1 %7, label %13, label %8
8: ; preds = %1, %4
%9 = phi i64 [ %12, %4 ], [ 0, %1 ]
%10 = phi i8 [ %6, %4 ], [ %2, %1 ]
%11 = icmp sgt i8 %10, -1
%12 = add nuw i64 %9, 1
br i1 %11, label %4, label %13
13: ; preds = %8, %4, %1
%14 = phi i32 [ 1, %1 ], [ 1, %4 ], [ 0, %8 ]
ret i32 %14
}
void skipWhitespace(char **token) {
  char c;
  while ((c = **token) == ' ' || c == '\n' || c == '\r' || c == '\t')
    ++*token;
}


x86 assembly (clang, -O0):
<skipWhitespace>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%al
mov    %al,-0x9(%rbp)
movsbl %al,%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0xa(%rbp)
je     1156 <skipWhitespace+0x56>
movsbl -0x9(%rbp),%ecx
mov    $0x1,%al
cmp    $0xa,%ecx
mov    %al,-0xa(%rbp)
je     1156 <skipWhitespace+0x56>
movsbl -0x9(%rbp),%ecx
mov    $0x1,%al
cmp    $0xd,%ecx
mov    %al,-0xa(%rbp)
je     1156 <skipWhitespace+0x56>
movsbl -0x9(%rbp),%eax
cmp    $0x9,%eax
sete   %al
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%al
test   $0x1,%al
jne    1166 <skipWhitespace+0x66>
jmp    1179 <skipWhitespace+0x79>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
jmp    1108 <skipWhitespace+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<skipWhitespace>:
mov    (%rdi),%rax
add    $0x1,%rax
movabs $0x100002600,%rcx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movzbl -0x1(%rax),%edx
cmp    $0x20,%rdx
ja     1139 <skipWhitespace+0x39>
bt     %rdx,%rcx
jae    1139 <skipWhitespace+0x39>
mov    %rax,(%rdi)
add    $0x1,%rax
jmp    1120 <skipWhitespace+0x20>
ret

LLVM IR (-O0):
define void @skipWhitespace(i8** %0) {
%2 = alloca i8**
%3 = alloca i8
store i8** %0, i8*** %2
br label %4
4: ; preds = %24, %1
%5 = load i8**, i8*** %2
%6 = load i8*, i8** %5
%7 = load i8, i8* %6
store i8 %7, i8* %3
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 32
br i1 %9, label %22, label %10
10: ; preds = %4
%11 = load i8, i8* %3
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 10
br i1 %13, label %22, label %14
14: ; preds = %10
%15 = load i8, i8* %3
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 13
br i1 %17, label %22, label %18
18: ; preds = %14
%19 = load i8, i8* %3
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 9
br label %22
22: ; preds = %18, %14, %10, %4
%23 = phi i1 [ true, %14 ], [ true, %10 ], [ true, %4 ], [ %21, %18 ]
br i1 %23, label %24, label %28
24: ; preds = %22
%25 = load i8**, i8*** %2
%26 = load i8*, i8** %25
%27 = getelementptr inbounds i8, i8* %26, i32 1
store i8* %27, i8** %25
br label %4
28: ; preds = %22
ret void
}

LLVM IR (-O2):
define void @skipWhitespace(i8** nocapture %0) {
%2 = load i8*, i8** %0
br label %3
3: ; preds = %6, %1
%4 = phi i8* [ %7, %6 ], [ %2, %1 ]
%5 = load i8, i8* %4
switch i8 %5, label %8 [
i8 32, label %6
i8 13, label %6
i8 10, label %6
i8 9, label %6
]
6: ; preds = %3, %3, %3, %3
%7 = getelementptr inbounds i8, i8* %4, i64 1
store i8* %7, i8** %0
br label %3
8: ; preds = %3
ret void
}
int ucs2_score(int val) {
  if (val >= 0x2e80 && val <= 0x2fff)
    return (1);
  else if (val >= 0x1000000)
    return (2);
  else if (val >= 0xf000 && val <= 0xffff)
    return (3);
  else if (val >= 0x3400 && val <= 0x4dff)
    return (4);
  else
    return (5);
}


x86 assembly (clang, -O0):
<ucs2_score>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x2e80,-0x8(%rbp)
jl     112d <ucs2_score+0x2d>
cmpl   $0x2fff,-0x8(%rbp)
jg     112d <ucs2_score+0x2d>
movl   $0x1,-0x4(%rbp)
jmp    1199 <ucs2_score+0x99>
cmpl   $0x1000000,-0x8(%rbp)
jl     1146 <ucs2_score+0x46>
movl   $0x2,-0x4(%rbp)
jmp    1199 <ucs2_score+0x99>
cmpl   $0xf000,-0x8(%rbp)
jl     116c <ucs2_score+0x6c>
cmpl   $0xffff,-0x8(%rbp)
jg     116c <ucs2_score+0x6c>
movl   $0x3,-0x4(%rbp)
jmp    1199 <ucs2_score+0x99>
cmpl   $0x3400,-0x8(%rbp)
jl     1192 <ucs2_score+0x92>
cmpl   $0x4dff,-0x8(%rbp)
jg     1192 <ucs2_score+0x92>
movl   $0x4,-0x4(%rbp)
jmp    1199 <ucs2_score+0x99>
movl   $0x5,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ucs2_score>:
lea    -0x2e80(%rdi),%ecx
mov    $0x1,%eax
cmp    $0x180,%ecx
jb     1149 <ucs2_score+0x49>
mov    $0x2,%eax
cmp    $0xffffff,%edi
jg     1149 <ucs2_score+0x49>
mov    %edi,%ecx
and    $0xfffff000,%ecx
mov    $0x3,%eax
cmp    $0xf000,%ecx
je     1149 <ucs2_score+0x49>
add    $0xffffcc00,%edi
cmp    $0x1a00,%edi
mov    $0x5,%eax
sbb    $0x0,%eax
ret

LLVM IR (-O0):
define i32 @ucs2_score(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 11904
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 12287
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %2
br label %29
10: ; preds = %6, %1
%11 = load i32, i32* %3
%12 = icmp sge i32 %11, 16777216
br i1 %12, label %13, label %14
13: ; preds = %10
store i32 2, i32* %2
br label %29
14: ; preds = %10
%15 = load i32, i32* %3
%16 = icmp sge i32 %15, 61440
br i1 %16, label %17, label %21
17: ; preds = %14
%18 = load i32, i32* %3
%19 = icmp sle i32 %18, 65535
br i1 %19, label %20, label %21
20: ; preds = %17
store i32 3, i32* %2
br label %29
21: ; preds = %17, %14
%22 = load i32, i32* %3
%23 = icmp sge i32 %22, 13312
br i1 %23, label %24, label %28
24: ; preds = %21
%25 = load i32, i32* %3
%26 = icmp sle i32 %25, 19967
br i1 %26, label %27, label %28
27: ; preds = %24
store i32 4, i32* %2
br label %29
28: ; preds = %24, %21
store i32 5, i32* %2
br label %29
29: ; preds = %28, %27, %20, %13, %9
%30 = load i32, i32* %2
ret i32 %30
}

LLVM IR (-O2):
define i32 @ucs2_score(i32 %0) {
%2 = add i32 %0, -11904
%3 = icmp ult i32 %2, 384
br i1 %3, label %13, label %4
4: ; preds = %1
%5 = icmp sgt i32 %0, 16777215
br i1 %5, label %13, label %6
6: ; preds = %4
%7 = and i32 %0, -4096
%8 = icmp eq i32 %7, 61440
br i1 %8, label %13, label %9
9: ; preds = %6
%10 = add i32 %0, -13312
%11 = icmp ult i32 %10, 6656
%12 = select i1 %11, i32 4, i32 5
br label %13
13: ; preds = %9, %6, %4, %1
%14 = phi i32 [ 1, %1 ], [ 2, %4 ], [ 3, %6 ], [ %12, %9 ]
ret i32 %14
}
/* Variables and functions */
int func();
int func2();
int main(int argc, char **argv) { return func() + func2(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <func@plt>
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1030 <func2@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
add    %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <func@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <func2@plt>
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @func()
%7 = call i32 (...) @func2()
%8 = add nsw i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @func()
%4 = tail call i32 (...) @func2()
%5 = add nsw i32 %4, %3
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char const *, size_t);
int strlen(char const *);
char *tu_malloc(size_t);
char *tu_strdup(const char *s) {
  if (s) {
    size_t l = strlen(s) + 1;
    char *sd = tu_malloc(l);
    memcpy(sd, s, l);
    return sd;
  }
  return NULL;
}


x86 assembly (clang, -O0):
<tu_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1184 <tu_strdup+0x54>
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1050 <tu_malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    118c <tu_strdup+0x5c>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tu_strdup>:
push   %r15
push   %r14
push   %rbx
test   %rdi,%rdi
je     1163 <tu_strdup+0x33>
mov    %rdi,%rbx
call   1030 <strlen@plt>
add    $0x1,%eax
movslq %eax,%r15
mov    %r15,%rdi
call   1050 <tu_malloc@plt>
mov    %rax,%r14
mov    %rax,%rdi
mov    %rbx,%rsi
mov    %r15,%rdx
call   1040 <memcpy@plt>
jmp    1166 <tu_strdup+0x36>
xor    %r14d,%r14d
mov    %r14,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @tu_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %20
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i32 @strlen(i8* %9)
%11 = add nsw i32 %10, 1
%12 = sext i32 %11 to i64
store i64 %12, i64* %4
%13 = load i64, i64* %4
%14 = call i8* @tu_malloc(i64 %13)
store i8* %14, i8** %5
%15 = load i8*, i8** %5
%16 = load i8*, i8** %3
%17 = load i64, i64* %4
%18 = call i32 @memcpy(i8* %15, i8* %16, i64 %17)
%19 = load i8*, i8** %5
store i8* %19, i8** %2
br label %21
20: ; preds = %1
store i8* null, i8** %2
br label %21
21: ; preds = %20, %8
%22 = load i8*, i8** %2
ret i8* %22
}

LLVM IR (-O2):
define i8* @tu_strdup(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = tail call i32 @strlen(i8* %0)
%5 = add nsw i32 %4, 1
%6 = sext i32 %5 to i64
%7 = tail call i8* @tu_malloc(i64 %6)
%8 = tail call i32 @memcpy(i8* %7, i8* %0, i64 %6)
br label %9
9: ; preds = %1, %3
%10 = phi i8* [ %7, %3 ], [ null, %1 ]
ret i8* %10
}
int test_imm_A3int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0xA3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A3int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0xa3,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A3int64_midword_mem>:
testb  $0xa3,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A3int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 163
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_A3int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 10682368
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int uint8_t;
typedef int volatile uint32_t;

/* Variables and functions */
uint32_t USBModeGet(uint32_t ui32Base) {
  ;
  return ((*((volatile uint8_t *)(ui32Base + 0x00000060))) &
          (0x00000080 | 0x00000004 | 0x00000001 | 0x00000018));
}


x86 assembly (clang, -O0):
<USBModeGet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x60,%eax
cltq
mov    (%rax),%eax
and    $0x9d,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBModeGet>:
mov    %edi,-0x4(%rsp)
movslq -0x4(%rsp),%rcx
mov    $0x9d,%eax
and    0x60(%rcx),%eax
ret

LLVM IR (-O0):
define i32 @USBModeGet(i32 %0) {
%2 = alloca i32
store volatile i32 %0, i32* %2
%3 = load volatile i32, i32* %2
%4 = add nsw i32 %3, 96
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, 157
ret i32 %8
}

LLVM IR (-O2):
define i32 @USBModeGet(i32 %0) {
%2 = alloca i32
store volatile i32 %0, i32* %2
%3 = load volatile i32, i32* %2
%4 = add nsw i32 %3, 96
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, 157
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ hal_cc25xx_set_register(int, int);
void hal_cc25xx_set_gdo_mode(void) {
  hal_cc25xx_set_register(0x02, 0x01);
  ;
  hal_cc25xx_set_register(0x00, 0x01);
  ;
}


x86 assembly (clang, -O0):
<hal_cc25xx_set_gdo_mode>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
mov    $0x1,%esi
call   1030 <hal_cc25xx_set_register@plt>
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <hal_cc25xx_set_register@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hal_cc25xx_set_gdo_mode>:
push   %rax
mov    $0x2,%edi
mov    $0x1,%esi
call   1030 <hal_cc25xx_set_register@plt>
xor    %edi,%edi
mov    $0x1,%esi
pop    %rax
jmp    1030 <hal_cc25xx_set_register@plt>

LLVM IR (-O0):
define void @hal_cc25xx_set_gdo_mode() {
%1 = call i32 @hal_cc25xx_set_register(i32 2, i32 1)
%2 = call i32 @hal_cc25xx_set_register(i32 0, i32 1)
ret void
}

LLVM IR (-O2):
define void @hal_cc25xx_set_gdo_mode() {
%1 = tail call i32 @hal_cc25xx_set_register(i32 2, i32 1)
%2 = tail call i32 @hal_cc25xx_set_register(i32 0, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TOSH_CLR_ADC5_PIN();
int /*<<< orphan*/ TOSH_MAKE_ADC5_INPUT();
int /*<<< orphan*/ TOSH_MAKE_ADC5_OUTPUT();
int TOSH_READ_ADC5_PIN();
int /*<<< orphan*/ TOSH_uwait(int);
int ds2751_readBit() {
  int result;
  TOSH_MAKE_ADC5_OUTPUT();
  TOSH_CLR_ADC5_PIN();
  TOSH_uwait(1);
  TOSH_MAKE_ADC5_INPUT();
  TOSH_uwait(7);
  result = TOSH_READ_ADC5_PIN();
  TOSH_uwait(50);
  return result;
}


x86 assembly (clang, -O0):
<ds2751_readBit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <TOSH_MAKE_ADC5_OUTPUT@plt>
mov    $0x0,%al
call   1060 <TOSH_CLR_ADC5_PIN@plt>
mov    $0x1,%edi
call   1070 <TOSH_uwait@plt>
mov    $0x0,%al
call   1030 <TOSH_MAKE_ADC5_INPUT@plt>
mov    $0x7,%edi
call   1070 <TOSH_uwait@plt>
mov    $0x0,%al
call   1050 <TOSH_READ_ADC5_PIN@plt>
mov    %eax,-0x4(%rbp)
mov    $0x32,%edi
call   1070 <TOSH_uwait@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ds2751_readBit>:
push   %rbx
xor    %eax,%eax
call   1040 <TOSH_MAKE_ADC5_OUTPUT@plt>
xor    %eax,%eax
call   1060 <TOSH_CLR_ADC5_PIN@plt>
mov    $0x1,%edi
call   1070 <TOSH_uwait@plt>
xor    %eax,%eax
call   1030 <TOSH_MAKE_ADC5_INPUT@plt>
mov    $0x7,%edi
call   1070 <TOSH_uwait@plt>
xor    %eax,%eax
call   1050 <TOSH_READ_ADC5_PIN@plt>
mov    %eax,%ebx
mov    $0x32,%edi
call   1070 <TOSH_uwait@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ds2751_readBit() {
%1 = alloca i32
%2 = call i32 (...) @TOSH_MAKE_ADC5_OUTPUT()
%3 = call i32 (...) @TOSH_CLR_ADC5_PIN()
%4 = call i32 @TOSH_uwait(i32 1)
%5 = call i32 (...) @TOSH_MAKE_ADC5_INPUT()
%6 = call i32 @TOSH_uwait(i32 7)
%7 = call i32 (...) @TOSH_READ_ADC5_PIN()
store i32 %7, i32* %1
%8 = call i32 @TOSH_uwait(i32 50)
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
define i32 @ds2751_readBit() {
%1 = tail call i32 (...) @TOSH_MAKE_ADC5_OUTPUT()
%2 = tail call i32 (...) @TOSH_CLR_ADC5_PIN()
%3 = tail call i32 @TOSH_uwait(i32 1)
%4 = tail call i32 (...) @TOSH_MAKE_ADC5_INPUT()
%5 = tail call i32 @TOSH_uwait(i32 7)
%6 = tail call i32 (...) @TOSH_READ_ADC5_PIN()
%7 = tail call i32 @TOSH_uwait(i32 50)
ret i32 %6
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ display_volume();
int /*<<< orphan*/ init();
int /*<<< orphan*/ load_mbr();
int /*<<< orphan*/ puts(char *);
int main(int argc, char **argv) {
  puts("\n--- Programme \"dvol\"  ---");
  init();
  load_mbr();
  display_volume();
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xea3(%rip),%rdi
call   1030 <puts@plt>
mov    $0x0,%al
call   1040 <init@plt>
mov    $0x0,%al
call   1060 <load_mbr@plt>
mov    $0x0,%al
call   1050 <display_volume@plt>
mov    0x2e62(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeb8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <init@plt>
xor    %eax,%eax
call   1060 <load_mbr@plt>
xor    %eax,%eax
call   1050 <display_volume@plt>
mov    0x2e77(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"\0A--- Programme \22dvol\22 ---\00"
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @puts(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%7 = call i32 (...) @init()
%8 = call i32 (...) @load_mbr()
%9 = call i32 (...) @display_volume()
%10 = load i32, i32* @EXIT_SUCCESS
ret i32 %10
}

LLVM IR (-O2):
@.str = [27 x i8] c"\0A--- Programme \22dvol\22 ---\00"
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 (...) @init()
%5 = tail call i32 (...) @load_mbr()
%6 = tail call i32 (...) @display_volume()
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}
/* Variables and functions */
int strcmp(char *, char *);
int item_customer_compare(void *key_a, void *key_b) {
  char *a = (char *)key_a;
  char *b = (char *)key_b;
  return strcmp(a, b);
}


x86 assembly (clang, -O0):
<item_customer_compare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<item_customer_compare>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @item_customer_compare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
%8 = load i8*, i8** %4
store i8* %8, i8** %6
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = call i32 @strcmp(i8* %9, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @item_customer_compare(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
void mmx_601(unsigned long y, unsigned long *output) {
  asm(" movd (%0), %%mm0;   /* Load y   0x00000000000000yy */        psllw $6, "
      "%%mm0;    /* Shift y coeffs 0x0000yyy0yyy0yyy0 */        movd %%mm0, "
      "(%1);   /* Store output */"
      :
      : "r"(&y), "r"(output));
}


x86 assembly (clang, -O0):
<mmx_601>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
lea    -0x8(%rbp),%rax
movd   (%rax),%mm0
psllw  $0x6,%mm0
movd   %mm0,(%rcx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmx_601>:
mov    %rdi,-0x8(%rsp)
lea    -0x8(%rsp),%rax
movd   (%rax),%mm0
psllw  $0x6,%mm0
movd   %mm0,(%rsi)
ret

LLVM IR (-O0):
define void @mmx_601(i64 %0, i64* %1) {
%3 = alloca i64
%4 = alloca i64*
store i64 %0, i64* %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
ret void
}

LLVM IR (-O2):
define void @mmx_601(i64 %0, i64* %1) {
%3 = alloca i64
store i64 %0, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ func_l();
void func_k() { func_l(); }


x86 assembly (clang, -O0):
<func_k>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <func_l@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_k>:
xor    %eax,%eax
jmp    1030 <func_l@plt>

LLVM IR (-O0):
define void @func_k() {
%1 = call i32 (...) @func_l()
ret void
}

LLVM IR (-O2):
define void @func_k() {
%1 = tail call i32 (...) @func_l()
ret void
}