xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void do_DrUL(uint8_t *p, uint8_t *max, int is_up) {
  if (4 != (max - p))
    return;
  printf("RDPDR: User Logged On\n");
}


x86 assembly (clang, -O0):
<do_DrUL>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
sub    %rax,%rcx
sar    $0x2,%rcx
mov    $0x4,%eax
cmp    %rcx,%rax
je     1145 <do_DrUL+0x35>
jmp    1151 <do_DrUL+0x41>
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_DrUL>:
sub    %rdi,%rsi
cmp    $0x10,%rsi
jne    1125 <do_DrUL+0x15>
lea    0xee0(%rip),%rdi
jmp    1030 <puts@plt>
ret

LLVM IR (-O0):
@.str = [23 x i8] c"RDPDR: User Logged On\0A\00"
define void @do_DrUL(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %5
%8 = load i32*, i32** %4
%9 = ptrtoint i32* %7 to i64
%10 = ptrtoint i32* %8 to i64
%11 = sub i64 %9, %10
%12 = sdiv exact i64 %11, 4
%13 = icmp ne i64 4, %12
br i1 %13, label %14, label %15
14: ; preds = %3
br label %17
15: ; preds = %3
%16 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
br label %17
17: ; preds = %15, %14
ret void
}

LLVM IR (-O2):
@str = [22 x i8] c"RDPDR: User Logged On\00"
define void @do_DrUL(i32* %0, i32* %1, i32 %2) {
%4 = ptrtoint i32* %1 to i64
%5 = ptrtoint i32* %0 to i64
%6 = sub i64 %4, %5
%7 = icmp eq i64 %6, 16
br i1 %7, label %8, label %10
8: ; preds = %3
%9 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
br label %10
10: ; preds = %3, %8
ret void
}
int test_imm_92uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x92 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_92uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x92,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_92uint64_midword_reg>:
test   $0x920000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_92uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 146
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_92uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 9568256
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ strncpy(char *, char *, int);
char *strndup(char *str, int n) {
  char *t = (char *)malloc(n + 1);
  strncpy(t, str, n);
  t[n] = '\0';
  return (t);
}


x86 assembly (clang, -O0):
<strndup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
add    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <strncpy@plt>
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strndup>:
push   %r15
push   %r14
push   %rbx
mov    %esi,%r15d
mov    %rdi,%r14
lea    0x1(%r15),%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15d,%edx
call   1030 <strncpy@plt>
movslq %r15d,%rax
movb   $0x0,(%rbx,%rax,1)
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @strndup(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 1
%8 = call i64 @malloc(i32 %7)
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = load i8*, i8** %3
%12 = load i32, i32* %4
%13 = call i32 @strncpy(i8* %10, i8* %11, i32 %12)
%14 = load i8*, i8** %5
%15 = load i32, i32* %4
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
store i8 0, i8* %17
%18 = load i8*, i8** %5
ret i8* %18
}

LLVM IR (-O2):
define i8* @strndup(i8* %0, i32 %1) {
%3 = add nsw i32 %1, 1
%4 = tail call i64 @malloc(i32 %3)
%5 = inttoptr i64 %4 to i8*
%6 = tail call i32 @strncpy(i8* %5, i8* %0, i32 %1)
%7 = sext i32 %1 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
store i8 0, i8* %8
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ swapcase(int /*<<< orphan*/);
void swcaseall(const char *pw, char *ret) {
  while (*pw) {
    *ret++ = swapcase(*pw++);
  }
}


x86 assembly (clang, -O0):
<swcaseall>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     115c <swcaseall+0x4c>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <swapcase@plt>
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
mov    %cl,(%rax)
jmp    1120 <swcaseall+0x10>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swcaseall>:
push   %r15
push   %r14
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     114a <swcaseall+0x3a>
mov    %rsi,%r14
mov    %rdi,%r15
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movsbl %al,%edi
call   1030 <swapcase@plt>
mov    %al,(%r14,%rbx,1)
movzbl 0x1(%r15,%rbx,1),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <swcaseall+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @swcaseall(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %9, %2
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %18
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %3
%12 = load i8, i8* %10
%13 = sext i8 %12 to i32
%14 = call i32 @swapcase(i32 %13)
%15 = trunc i32 %14 to i8
%16 = load i8*, i8** %4
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %4
store i8 %15, i8* %16
br label %5
18: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @swcaseall(i8* nocapture %0, i8* nocapture writeonly %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %16, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %14, %5 ], [ %3, %2 ]
%7 = phi i8* [ %13, %5 ], [ %1, %2 ]
%8 = phi i8* [ %9, %5 ], [ %0, %2 ]
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = sext i8 %6 to i32
%11 = tail call i32 @swapcase(i32 %10)
%12 = trunc i32 %11 to i8
%13 = getelementptr inbounds i8, i8* %7, i64 1
store i8 %12, i8* %7
%14 = load i8, i8* %9
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %5
16: ; preds = %5, %2
ret void
}
int test_imm_CDint8_mem(signed char *val) {
  return ((*val) & (-0xCD << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CDint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xffffff33,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CDint8_mem>:
movsbl (%rdi),%eax
test   $0xffffff33,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CDint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, -205
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_CDint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
%4 = and i32 %3, -205
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i32 -40, i32 -20
ret i32 %6
}
void d2i_OCSP_SINGLERESP(void) {}


x86 assembly (clang, -O0):
<d2i_OCSP_SINGLERESP>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_OCSP_SINGLERESP>:
ret

LLVM IR (-O0):
define void @d2i_OCSP_SINGLERESP() {
ret void
}

LLVM IR (-O2):
define void @d2i_OCSP_SINGLERESP() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ bool_t;

/* Variables and functions */
int /*<<< orphan*/ FALSE;
bool_t authnone_refresh() { return (FALSE); }


x86 assembly (clang, -O0):
<authnone_refresh>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<authnone_refresh>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@FALSE = global i32 0
define i32 @authnone_refresh() {
%1 = load i32, i32* @FALSE
ret i32 %1
}

LLVM IR (-O2):
@FALSE = global i32 0
define i32 @authnone_refresh() {
%1 = load i32, i32* @FALSE
ret i32 %1
}
void gf8mul_00010000(void) {
  __asm__ __volatile__("\tpxor    %xmm7, %xmm2\n"
                       "\tpxor    %xmm7, %xmm1\n"
                       "\tpxor    %xmm6, %xmm1\n"
                       "\tpxor    %xmm6, %xmm0\n"
                       "\tpxor    %xmm5, %xmm7\n"
                       "\tpxor    %xmm5, %xmm3\n"
                       "\tpxor    %xmm5, %xmm0\n"
                       "\tpxor    %xmm4, %xmm7\n"
                       "\tpxor    %xmm4, %xmm6\n"
                       "\tpxor    %xmm4, %xmm3\n"
                       "\tpxor    %xmm4, %xmm2\n"
                       "\tpxor    %xmm3, %xmm7\n"
                       "\tpxor    %xmm7, %xmm3\n"
                       "\tpxor    %xmm2, %xmm6\n"
                       "\tpxor    %xmm6, %xmm2\n"
                       "\tpxor    %xmm1, %xmm5\n"
                       "\tpxor    %xmm5, %xmm1\n"
                       "\tpxor    %xmm0, %xmm4\n"
                       "\tpxor    %xmm4, %xmm0\n");
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pxor   %xmm7,%xmm2
pxor   %xmm7,%xmm1
pxor   %xmm6,%xmm1
pxor   %xmm6,%xmm0
pxor   %xmm5,%xmm7
pxor   %xmm5,%xmm3
pxor   %xmm5,%xmm0
pxor   %xmm4,%xmm7
pxor   %xmm4,%xmm6
pxor   %xmm4,%xmm3
pxor   %xmm4,%xmm2
pxor   %xmm3,%xmm7
pxor   %xmm7,%xmm3
pxor   %xmm2,%xmm6
pxor   %xmm6,%xmm2
pxor   %xmm1,%xmm5
pxor   %xmm5,%xmm1
pxor   %xmm0,%xmm4
pxor   %xmm4,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
pxor   %xmm7,%xmm2
pxor   %xmm7,%xmm1
pxor   %xmm6,%xmm1
pxor   %xmm6,%xmm0
pxor   %xmm5,%xmm7
pxor   %xmm5,%xmm3
pxor   %xmm5,%xmm0
pxor   %xmm4,%xmm7
pxor   %xmm4,%xmm6
pxor   %xmm4,%xmm3
pxor   %xmm4,%xmm2
pxor   %xmm3,%xmm7
pxor   %xmm7,%xmm3
pxor   %xmm2,%xmm6
pxor   %xmm6,%xmm2
pxor   %xmm1,%xmm5
pxor   %xmm5,%xmm1
pxor   %xmm0,%xmm4
pxor   %xmm4,%xmm0
ret

LLVM IR (-O0):
define void @gf8mul_00010000() {
ret void
}

LLVM IR (-O2):
define void @gf8mul_00010000() {
tail call void asm sideeffect "\09pxor %xmm7, %xmm2\0A\09pxor %xmm7, %xmm1\0A\09pxor %xmm6, %xmm1\0A\09pxor %xmm6, %xmm0\0A\09pxor %xmm5, %xmm7\0A\09pxor %xmm5, %xmm3\0A\09pxor %xmm5, %xmm0\0A\09pxor %xmm4, %xmm7\0A\09pxor %xmm4, %xmm6\0A\09pxor %xmm4, %xmm3\0A\09pxor %xmm4, %xmm2\0A\09pxor %xmm3, %xmm7\0A\09pxor %xmm7, %xmm3\0A\09pxor %xmm2, %xmm6\0A\09pxor %xmm6, %xmm2\0A\09pxor %xmm1, %xmm5\0A\09pxor %xmm5, %xmm1\0A\09pxor %xmm0, %xmm4\0A\09pxor %xmm4, %xmm0\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int skiplist_test();
int main(void) { return skiplist_test(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <skiplist_test@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <skiplist_test@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @skiplist_test()
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @skiplist_test()
ret i32 %1
}
/* Variables and functions */
int number_bits(int);
int calculate_attrib_modifier(int bonus) {
  int mod;
  mod = number_bits(4) - 6 + bonus;
  if (mod == 0)
    mod = 1;
  return mod;
}


x86 assembly (clang, -O0):
<calculate_attrib_modifier>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x4,%edi
call   1030 <number_bits@plt>
sub    $0x6,%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    113f <calculate_attrib_modifier+0x2f>
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculate_attrib_modifier>:
push   %rbx
mov    %edi,%ebx
mov    $0x4,%edi
call   1030 <number_bits@plt>
lea    (%rbx,%rax,1),%ecx
add    $0xfffffffa,%ecx
test   %ecx,%ecx
mov    $0x1,%eax
cmovne %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @calculate_attrib_modifier(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 @number_bits(i32 4)
%5 = sub nsw i32 %4, 6
%6 = load i32, i32* %2
%7 = add nsw i32 %5, %6
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 1, i32* %3
br label %11
11: ; preds = %10, %1
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @calculate_attrib_modifier(i32 %0) {
%2 = tail call i32 @number_bits(i32 4)
%3 = add i32 %0, -6
%4 = add i32 %3, %2
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i32 1, i32 %4
ret i32 %6
}
int fcmpgt(float a, float b) { return a > b; }


x86 assembly (clang, -O0):
<fcmpgt>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fcmpgt>:
xor    %eax,%eax
ucomiss %xmm1,%xmm0
seta   %al
ret

LLVM IR (-O0):
define i32 @fcmpgt(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp ogt float %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @fcmpgt(float %0, float %1) {
%3 = fcmp ogt float %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
int func6(void) { return 6; }


x86 assembly (clang, -O0):
<func6>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func6>:
mov    $0x6,%eax
ret

LLVM IR (-O0):
define i32 @func6() {
ret i32 6
}

LLVM IR (-O2):
define i32 @func6() {
ret i32 6
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
uint8_t chpl_bitops_rotl_8(uint8_t x, uint8_t n) {
  assert(n < 8);
  return (x << n) | (x >> (-n & (8 - 1)));
}


x86 assembly (clang, -O0):
<chpl_bitops_rotl_8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x8,-0x8(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
and    $0x7,%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chpl_bitops_rotl_8>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
cmp    $0x8,%esi
setl   %dil
call   1030 <assert@plt>
mov    %ebp,%eax
mov    %ebx,%ecx
shl    %cl,%eax
neg    %bl
and    $0x7,%bl
mov    %ebx,%ecx
sar    %cl,%ebp
or     %eax,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @chpl_bitops_rotl_8(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp slt i32 %5, 8
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = shl i32 %9, %10
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = sub nsw i32 0, %13
%15 = and i32 %14, 7
%16 = ashr i32 %12, %15
%17 = or i32 %11, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @chpl_bitops_rotl_8(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, 8
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = shl i32 %0, %1
%7 = sub nsw i32 0, %1
%8 = and i32 %7, 7
%9 = ashr i32 %0, %8
%10 = or i32 %9, %6
ret i32 %10
}
int test_imm_9Aint64_midword_mem(long long *val) {
  return ((*val >> 16) & (0x9A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Aint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0x9a,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Aint64_midword_mem>:
testb  $0x9a,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Aint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 154
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_9Aint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 10092544
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int almostequal(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ fabsf(float);
bool almostequalabs(float a, float b) {
  return almostequal(fabsf(a), fabsf(b));
}


x86 assembly (clang, -O0):
<almostequalabs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <fabsf@plt>
mov    %eax,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
call   1030 <fabsf@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%esi
call   1040 <almostequal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<almostequalabs>:
push   %rbx
sub    $0x10,%rsp
movss  %xmm1,0xc(%rsp)
call   1030 <fabsf@plt>
mov    %eax,%ebx
movss  0xc(%rsp),%xmm0
call   1030 <fabsf@plt>
mov    %ebx,%edi
mov    %eax,%esi
add    $0x10,%rsp
pop    %rbx
jmp    1040 <almostequal@plt>

LLVM IR (-O0):
define i32 @almostequalabs(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = call i32 @fabsf(float %5)
%7 = load float, float* %4
%8 = call i32 @fabsf(float %7)
%9 = call i32 @almostequal(i32 %6, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @almostequalabs(float %0, float %1) {
%3 = tail call i32 @fabsf(float %0)
%4 = tail call i32 @fabsf(float %1)
%5 = tail call i32 @almostequal(i32 %3, i32 %4)
ret i32 %5
}
long double test_fmaxl(long double x, long double y) {
  return __builtin_fmaxl(x, y);
}


x86 assembly (clang, -O0):
<test_fmaxl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
call   1030 <fmaxl@plt>
fld    %st(0)
fstp   %st(0)
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_fmaxl>:
sub    $0x28,%rsp
fldt   0x30(%rsp)
fldt   0x40(%rsp)
fstpt  0x10(%rsp)
fstpt  (%rsp)
call   1030 <fmaxl@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @test_fmaxl(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %4
%7 = call x86_fp80 @llvm.maxnum.f80(x86_fp80 %5, x86_fp80 %6)
ret x86_fp80 %7
}

LLVM IR (-O2):
define x86_fp80 @test_fmaxl(x86_fp80 %0, x86_fp80 %1) {
%3 = tail call x86_fp80 @llvm.maxnum.f80(x86_fp80 %0, x86_fp80 %1)
ret x86_fp80 %3
}
int octagonal(int n) { return n * (3 * n - 2); }


x86 assembly (clang, -O0):
<octagonal>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   $0x3,-0x4(%rbp),%ecx
sub    $0x2,%ecx
imul   %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<octagonal>:
lea    (%rdi,%rdi,2),%eax
add    $0xfffffffe,%eax
imul   %edi,%eax
ret

LLVM IR (-O0):
define i32 @octagonal(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 3, %4
%6 = sub nsw i32 %5, 2
%7 = mul nsw i32 %3, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @octagonal(i32 %0) {
%2 = mul nsw i32 %0, 3
%3 = add nsw i32 %2, -2
%4 = mul nsw i32 %3, %0
ret i32 %4
}
void ASN1_VISIBLESTRING_free(void) {}


x86 assembly (clang, -O0):
<ASN1_VISIBLESTRING_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_VISIBLESTRING_free>:
ret

LLVM IR (-O0):
define void @ASN1_VISIBLESTRING_free() {
ret void
}

LLVM IR (-O2):
define void @ASN1_VISIBLESTRING_free() {
ret void
}
/* Variables and functions */
void *calloc(int, size_t);
void *x_zalloc(size_t size) { return calloc(1, size); }


x86 assembly (clang, -O0):
<x_zalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x1,%edi
call   1030 <calloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x_zalloc>:
mov    %rdi,%rsi
mov    $0x1,%edi
jmp    1030 <calloc@plt>

LLVM IR (-O0):
define i8* @x_zalloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @calloc(i32 1, i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @x_zalloc(i64 %0) {
%2 = tail call i8* @calloc(i32 1, i64 %0)
ret i8* %2
}
unsigned long _testfunc_L_HIL(unsigned short h, unsigned int i,
                              unsigned long l) {
  return (unsigned long)(h + i + l);
}


x86 assembly (clang, -O0):
<_testfunc_L_HIL>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
movzwl -0x2(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,%eax
add    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_testfunc_L_HIL>:
lea    (%rdi,%rsi,1),%eax
add    %rdx,%rax
ret

LLVM IR (-O0):
define i64 @_testfunc_L_HIL(i16 zeroext %0, i32 %1, i64 %2) {
%4 = alloca i16
%5 = alloca i32
%6 = alloca i64
store i16 %0, i16* %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%7 = load i16, i16* %4
%8 = zext i16 %7 to i32
%9 = load i32, i32* %5
%10 = add i32 %8, %9
%11 = zext i32 %10 to i64
%12 = load i64, i64* %6
%13 = add i64 %11, %12
ret i64 %13
}

LLVM IR (-O2):
define i64 @_testfunc_L_HIL(i16 zeroext %0, i32 %1, i64 %2) {
%4 = zext i16 %0 to i32
%5 = add i32 %4, %1
%6 = zext i32 %5 to i64
%7 = add i64 %6, %2
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void *realloc(void *, size_t);
void *xrealloc(void *p, size_t newsize) {
  void *x = realloc(p, newsize);
  if (!x)
    abort();
  return x;
}


x86 assembly (clang, -O0):
<xrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1153 <xrealloc+0x33>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrealloc>:
push   %rax
call   1040 <realloc@plt>
test   %rax,%rax
je     112d <xrealloc+0xd>
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %13, label %11
11: ; preds = %2
%12 = call i32 (...) @abort()
unreachable
13: ; preds = %2
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
define noalias i8* @xrealloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 (...) @abort()
unreachable
7: ; preds = %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ StabilizationSettingsBank2Handle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void StabilizationSettingsBank2Updated() {
  UAVObjUpdated(StabilizationSettingsBank2Handle());
}


x86 assembly (clang, -O0):
<StabilizationSettingsBank2Updated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <StabilizationSettingsBank2Handle@plt>
mov    %eax,%edi
call   1040 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<StabilizationSettingsBank2Updated>:
push   %rax
xor    %eax,%eax
call   1030 <StabilizationSettingsBank2Handle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @StabilizationSettingsBank2Updated() {
%1 = call i32 (...) @StabilizationSettingsBank2Handle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @StabilizationSettingsBank2Updated() {
%1 = tail call i32 (...) @StabilizationSettingsBank2Handle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
/* Variables and functions */
int rand();
int generate_key() { return rand(); }


x86 assembly (clang, -O0):
<generate_key>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_key>:
xor    %eax,%eax
jmp    1030 <rand@plt>

LLVM IR (-O0):
define i32 @generate_key() {
%1 = call i32 (...) @rand()
ret i32 %1
}

LLVM IR (-O2):
define i32 @generate_key() {
%1 = tail call i32 (...) @rand()
ret i32 %1
}
unsigned char inbyte() {
  while ((*((volatile unsigned char *)(0xf0000000 + (0x3f8 + 5))) & 0x01) ==
         0x0)
    ;
  return (*((volatile unsigned char *)(0xf0000000 + (0x3f8 + 0))));
}


x86 assembly (clang, -O0):
<inbyte>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <inbyte+0x9>
mov    $0xf00003fd,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0x1,%eax
cmp    $0x0,%eax
jne    1124 <inbyte+0x24>
jmp    1109 <inbyte+0x9>
mov    $0xf00003f8,%eax
mov    (%rax),%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inbyte>:
mov    $0xf00003f8,%eax
cs nopw 0x0(%rax,%rax,1)
nop
testb  $0x1,0x5(%rax)
je     1110 <inbyte+0x10>
mov    (%rax),%al
ret

LLVM IR (-O0):
define zeroext i8 @inbyte() {
br label %1
1: ; preds = %6, %0
%2 = load volatile i8, i8* inttoptr (i64 4026532861 to i8*)
%3 = zext i8 %2 to i32
%4 = and i32 %3, 1
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
br label %1
7: ; preds = %1
%8 = load volatile i8, i8* inttoptr (i64 4026532856 to i8*)
ret i8 %8
}

LLVM IR (-O2):
define zeroext i8 @inbyte() {
br label %1
1: ; preds = %1, %0
%2 = load volatile i8, i8* inttoptr (i64 4026532861 to i8*)
%3 = and i8 %2, 1
%4 = icmp eq i8 %3, 0
br i1 %4, label %1, label %5
5: ; preds = %1
%6 = load volatile i8, i8* inttoptr (i64 4026532856 to i8*)
ret i8 %6
}
/* Variables and functions */
int /*<<< orphan*/ BannerMsg(char *, int);
int /*<<< orphan*/ ms_sleep(int);
int main() {
  int i;
  int j;
  j = 0;
  i = 0;
  BannerMsg("balle", 10);
  ms_sleep(1000);
  BannerMsg("Hi This is Only a test", 10);
  ms_sleep(1000);
  BannerMsg("elepahnant fballe", 10);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x8(%rbp)
lea    0xedf(%rip),%rdi
mov    $0xa,%esi
call   1040 <BannerMsg@plt>
mov    $0x3e8,%edi
call   1030 <ms_sleep@plt>
lea    0xea1(%rip),%rdi
mov    $0xa,%esi
call   1040 <BannerMsg@plt>
mov    $0x3e8,%edi
call   1030 <ms_sleep@plt>
lea    0xe9d(%rip),%rdi
mov    $0xa,%esi
call   1040 <BannerMsg@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xefb(%rip),%rdi
mov    $0xa,%esi
call   1040 <BannerMsg@plt>
mov    $0x3e8,%edi
call   1030 <ms_sleep@plt>
lea    0xebd(%rip),%rdi
mov    $0xa,%esi
call   1040 <BannerMsg@plt>
mov    $0x3e8,%edi
call   1030 <ms_sleep@plt>
lea    0xeb9(%rip),%rdi
mov    $0xa,%esi
call   1040 <BannerMsg@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"balle\00"
@.str.1 = [23 x i8] c"Hi This is Only a test\00"
@.str.2 = [18 x i8] c"elepahnant fballe\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %3
store i32 0, i32* %2
%4 = call i32 @BannerMsg(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 10)
%5 = call i32 @ms_sleep(i32 1000)
%6 = call i32 @BannerMsg(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i32 10)
%7 = call i32 @ms_sleep(i32 1000)
%8 = call i32 @BannerMsg(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.2, i64 0, i64 0), i32 10)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"balle\00"
@.str.1 = [23 x i8] c"Hi This is Only a test\00"
@.str.2 = [18 x i8] c"elepahnant fballe\00"
define i32 @main() {
%1 = tail call i32 @BannerMsg(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 10)
%2 = tail call i32 @ms_sleep(i32 1000)
%3 = tail call i32 @BannerMsg(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i32 10)
%4 = tail call i32 @ms_sleep(i32 1000)
%5 = tail call i32 @BannerMsg(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.2, i64 0, i64 0), i32 10)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_error();
void errorFn(void) {
  {
  ERROR:
    __VERIFIER_error();
    return;
  }
}


x86 assembly (clang, -O0):
<errorFn>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <errorFn+0x9>
mov    $0x0,%al
call   1030 <__VERIFIER_error@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<errorFn>:
xor    %eax,%eax
jmp    1030 <__VERIFIER_error@plt>

LLVM IR (-O0):
define void @errorFn() {
br label %1
1: ; preds = %0
%2 = call i32 (...) @__VERIFIER_error()
ret void
}

LLVM IR (-O2):
define void @errorFn() {
%1 = tail call i32 (...) @__VERIFIER_error()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ printf(char *);
int rmdir(char *);
int main(void) {
  if (rmdir("./test-dir") == -1) {
    perror("fail to rmkdir");
    exit(1);
  }
  printf("successfully remove a dir\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeaa(%rip),%rdi
call   1030 <rmdir@plt>
cmp    $0xffffffff,%eax
jne    117a <main+0x3a>
lea    0xea0(%rip),%rdi
call   1050 <perror@plt>
mov    $0x1,%edi
call   1060 <exit@plt>
lea    0xe99(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeb8(%rip),%rdi
call   1040 <rmdir@plt>
cmp    $0xffffffff,%eax
je     1162 <main+0x22>
lea    0xec1(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret
lea    0xea2(%rip),%rdi
call   1050 <perror@plt>
mov    $0x1,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"./test-dir\00"
@.str.1 = [15 x i8] c"fail to rmkdir\00"
@.str.2 = [27 x i8] c"successfully remove a dir\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @rmdir(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %7
4: ; preds = %0
%5 = call i32 @perror(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
%6 = call i32 @exit(i32 1)
unreachable
7: ; preds = %0
%8 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"./test-dir\00"
@.str.1 = [15 x i8] c"fail to rmkdir\00"
@str = [26 x i8] c"successfully remove a dir\00"
define i32 @main() {
%1 = tail call i32 @rmdir(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i32 %1, -1
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = tail call i32 @perror(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 @exit(i32 1)
unreachable
6: ; preds = %0
%7 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct l_class_OC_small {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _ZN5small14PrivateMember5Ev(struct l_class_OC_small *);
void _ZN5small5EntryEv(struct l_class_OC_small *llvm_cbe_this) {
  struct l_class_OC_small *llvm_cbe_this_2e_addr;
  struct l_class_OC_small *llvm_cbe_this1;
  *(&llvm_cbe_this_2e_addr) = llvm_cbe_this;
  llvm_cbe_this1 = *(&llvm_cbe_this_2e_addr);
  _ZN5small14PrivateMember5Ev(llvm_cbe_this1);
  return;
}


x86 assembly (clang, -O0):
<_ZN5small5EntryEv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <_ZN5small14PrivateMember5Ev@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ZN5small5EntryEv>:
jmp    1030 <_ZN5small14PrivateMember5Ev@plt>

LLVM IR (-O0):
%struct.l_class_OC_small = type { i32 }
define void @_ZN5small5EntryEv(%struct.l_class_OC_small* %0) {
%2 = alloca %struct.l_class_OC_small*
%3 = alloca %struct.l_class_OC_small*
%4 = alloca %struct.l_class_OC_small*
store %struct.l_class_OC_small* %0, %struct.l_class_OC_small** %2
%5 = load %struct.l_class_OC_small*, %struct.l_class_OC_small** %2
store %struct.l_class_OC_small* %5, %struct.l_class_OC_small** %3
%6 = load %struct.l_class_OC_small*, %struct.l_class_OC_small** %3
store %struct.l_class_OC_small* %6, %struct.l_class_OC_small** %4
%7 = load %struct.l_class_OC_small*, %struct.l_class_OC_small** %4
%8 = call i32 @_ZN5small14PrivateMember5Ev(%struct.l_class_OC_small* %7)
ret void
}

LLVM IR (-O2):
%struct.l_class_OC_small = type { i32 }
define void @_ZN5small5EntryEv(%struct.l_class_OC_small* %0) {
%2 = tail call i32 @_ZN5small14PrivateMember5Ev(%struct.l_class_OC_small* %0)
ret void
}
/* Variables and functions */
void *mem_shrink(void *buf, const size_t block, size_t *count) {
  if (*count == 0)
    *count = 1;
  else
    --(*count);
  return buf;
}


x86 assembly (clang, -O0):
<mem_shrink>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpq   $0x0,(%rax)
jne    112e <mem_shrink+0x2e>
mov    -0x18(%rbp),%rax
movq   $0x1,(%rax)
jmp    113c <mem_shrink+0x3c>
mov    -0x18(%rbp),%rax
mov    (%rax),%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_shrink>:
mov    %rdi,%rax
mov    (%rdx),%rcx
sub    $0x1,%rcx
mov    $0x1,%esi
cmovae %rcx,%rsi
mov    %rsi,(%rdx)
ret

LLVM IR (-O0):
define i8* @mem_shrink(i8* %0, i64 %1, i64* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64* %2, i64** %6
%7 = load i64*, i64** %6
%8 = load i64, i64* %7
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load i64*, i64** %6
store i64 1, i64* %11
br label %16
12: ; preds = %3
%13 = load i64*, i64** %6
%14 = load i64, i64* %13
%15 = add i64 %14, -1
store i64 %15, i64* %13
br label %16
16: ; preds = %12, %10
%17 = load i8*, i8** %4
ret i8* %17
}

LLVM IR (-O2):
define i8* @mem_shrink(i8* readnone returned %0, i64 %1, i64* nocapture %2) {
%4 = load i64, i64* %2
%5 = icmp eq i64 %4, 0
%6 = add i64 %4, -1
%7 = select i1 %5, i64 1, i64 %6
store i64 %7, i64* %2
ret i8* %0
}
/* Variables and functions */
double delta_AT(double);
double delta_TT(double utc) {
  double dt;
  dt = delta_AT(utc) + 32.184;
  return (dt);
}


x86 assembly (clang, -O0):
<delta_TT>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <delta_AT@plt>
movsd  0xed1(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delta_TT>:
push   %rax
call   1030 <delta_AT@plt>
addsd  0xee2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @delta_TT(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = call double @delta_AT(double %4)
%6 = fadd double %5, 3.218400e+01
store double %6, double* %3
%7 = load double, double* %3
ret double %7
}

LLVM IR (-O2):
define double @delta_TT(double %0) {
%2 = tail call double @delta_AT(double %0)
%3 = fadd double %2, 3.218400e+01
ret double %3
}
/* Variables and functions */
int simplerng_poisson_large(double);
int simplerng_poisson_small(double);
int simplerng_getpoisson(double lambda) {
  if (lambda < 0)
    lambda = 0;
  return ((lambda < 15.0) ? simplerng_poisson_small(lambda)
                          : simplerng_poisson_large(lambda));
}


x86 assembly (clang, -O0):
<simplerng_getpoisson>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    1143 <simplerng_getpoisson+0x23>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  0xeb5(%rip),%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    1168 <simplerng_getpoisson+0x48>
movsd  -0x8(%rbp),%xmm0
call   1030 <simplerng_poisson_small@plt>
mov    %eax,-0xc(%rbp)
jmp    1175 <simplerng_getpoisson+0x55>
movsd  -0x8(%rbp),%xmm0
call   1040 <simplerng_poisson_large@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<simplerng_getpoisson>:
movapd %xmm0,%xmm1
xorpd  %xmm0,%xmm0
maxsd  %xmm1,%xmm0
movsd  0xecc(%rip),%xmm1
ucomisd %xmm0,%xmm1
jbe    113f <simplerng_getpoisson+0x1f>
jmp    1030 <simplerng_poisson_small@plt>
jmp    1040 <simplerng_poisson_large@plt>

LLVM IR (-O0):
define i32 @simplerng_getpoisson(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp olt double %3, 0.000000e+00
br i1 %4, label %5, label %6
5: ; preds = %1
store double 0.000000e+00, double* %2
br label %6
6: ; preds = %5, %1
%7 = load double, double* %2
%8 = fcmp olt double %7, 1.500000e+01
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load double, double* %2
%11 = call i32 @simplerng_poisson_small(double %10)
br label %15
12: ; preds = %6
%13 = load double, double* %2
%14 = call i32 @simplerng_poisson_large(double %13)
br label %15
15: ; preds = %12, %9
%16 = phi i32 [ %11, %9 ], [ %14, %12 ]
ret i32 %16
}

LLVM IR (-O2):
define i32 @simplerng_getpoisson(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
%3 = select i1 %2, double 0.000000e+00, double %0
%4 = fcmp olt double %3, 1.500000e+01
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @simplerng_poisson_small(double %3)
br label %9
7: ; preds = %1
%8 = tail call i32 @simplerng_poisson_large(double %3)
br label %9
9: ; preds = %7, %5
%10 = phi i32 [ %6, %5 ], [ %8, %7 ]
ret i32 %10
}
int pinmux_request_gpio(struct pinctrl_dev *pctldev,
                        struct pinctrl_gpio_range *range, unsigned pin,
                        unsigned gpio) {
  return 0;
}


x86 assembly (clang, -O0):
<pinmux_request_gpio>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pinmux_request_gpio>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.pinctrl_dev = type opaque
%struct.pinctrl_gpio_range = type opaque
define i32 @pinmux_request_gpio(%struct.pinctrl_dev* %0, %struct.pinctrl_gpio_range* %1, i32 %2, i32 %3) {
%5 = alloca %struct.pinctrl_dev*
%6 = alloca %struct.pinctrl_gpio_range*
%7 = alloca i32
%8 = alloca i32
store %struct.pinctrl_dev* %0, %struct.pinctrl_dev** %5
store %struct.pinctrl_gpio_range* %1, %struct.pinctrl_gpio_range** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret i32 0
}

LLVM IR (-O2):
%struct.pinctrl_dev = type opaque
%struct.pinctrl_gpio_range = type opaque
define i32 @pinmux_request_gpio(%struct.pinctrl_dev* nocapture readnone %0, %struct.pinctrl_gpio_range* nocapture readnone %1, i32 %2, i32 %3) {
ret i32 0
}
int Bank_GetUserAuth(const char *Salt, const char *Username,
                     const char *Password) {
  Salt = Password = Username;
  Password = Salt;
  return -1;
}


x86 assembly (clang, -O0):
<Bank_GetUserAuth>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Bank_GetUserAuth>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @Bank_GetUserAuth(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %5
store i8* %7, i8** %6
store i8* %7, i8** %4
%8 = load i8*, i8** %4
store i8* %8, i8** %6
ret i32 -1
}

LLVM IR (-O2):
define i32 @Bank_GetUserAuth(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ get_pid();
int /*<<< orphan*/ grtestmod_write(int, int);
report_start() {
  if (!get_pid())
    grtestmod_write(4, 1);
  return (0);
}


x86 assembly (clang, -O0):
<report_start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <get_pid@plt>
cmp    $0x0,%eax
jne    1143 <report_start+0x23>
mov    $0x4,%edi
mov    $0x1,%esi
call   1030 <grtestmod_write@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<report_start>:
push   %rax
xor    %eax,%eax
call   1040 <get_pid@plt>
test   %eax,%eax
jne    113b <report_start+0x1b>
mov    $0x4,%edi
mov    $0x1,%esi
call   1030 <grtestmod_write@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @report_start() {
%1 = call i32 (...) @get_pid()
%2 = icmp ne i32 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = call i32 @grtestmod_write(i32 4, i32 1)
br label %5
5: ; preds = %3, %0
ret i32 0
}

LLVM IR (-O2):
define i32 @report_start() {
%1 = tail call i32 (...) @get_pid()
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @grtestmod_write(i32 4, i32 1)
br label %5
5: ; preds = %3, %0
ret i32 0
}
void switch_eg(long x, long n, long *dest) {
  long val = x;
  switch (n) {
  case 100:
    val *= 13;
    break;
  case 102:
    val += 10;
  case 103:
    val += 11;
    break;
  case 104:
  case 106:
    val *= val;
    break;
  default:
    val = 0;
    break;
  }
  *dest = val;
}


x86 assembly (clang, -O0):
<switch_eg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
add    $0xffffffffffffff9c,%rax
mov    %rax,-0x28(%rbp)
sub    $0x6,%rax
ja     117f <switch_eg+0x7f>
mov    -0x28(%rbp),%rax
lea    0xec7(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
imul   $0xd,-0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
jmp    1187 <switch_eg+0x87>
mov    -0x20(%rbp),%rax
add    $0xa,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0xb,%rax
mov    %rax,-0x20(%rbp)
jmp    1187 <switch_eg+0x87>
mov    -0x20(%rbp),%rax
imul   -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
jmp    1187 <switch_eg+0x87>
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<switch_eg>:
xor    %eax,%eax
add    $0xffffffffffffff9c,%rsi
cmp    $0x6,%rsi
ja     1139 <switch_eg+0x39>
lea    0xeed(%rip),%rcx
movslq (%rcx,%rsi,4),%rsi
add    %rcx,%rsi
jmp    *%rsi
imul   %rdi,%rdi
jmp    1136 <switch_eg+0x36>
lea    (%rdi,%rdi,2),%rax
lea    (%rdi,%rax,4),%rax
mov    %rax,(%rdx)
ret
add    $0xa,%rdi
add    $0xb,%rdi
mov    %rdi,%rax
mov    %rax,(%rdx)
ret

LLVM IR (-O0):
define void @switch_eg(i64 %0, i64 %1, i64* %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64*
%7 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64* %2, i64** %6
%8 = load i64, i64* %4
store i64 %8, i64* %7
%9 = load i64, i64* %5
switch i64 %9, label %23 [
i64 100, label %10
i64 102, label %13
i64 103, label %16
i64 104, label %19
i64 106, label %19
]
10: ; preds = %3
%11 = load i64, i64* %7
%12 = mul nsw i64 %11, 13
store i64 %12, i64* %7
br label %24
13: ; preds = %3
%14 = load i64, i64* %7
%15 = add nsw i64 %14, 10
store i64 %15, i64* %7
br label %16
16: ; preds = %3, %13
%17 = load i64, i64* %7
%18 = add nsw i64 %17, 11
store i64 %18, i64* %7
br label %24
19: ; preds = %3, %3
%20 = load i64, i64* %7
%21 = load i64, i64* %7
%22 = mul nsw i64 %21, %20
store i64 %22, i64* %7
br label %24
23: ; preds = %3
store i64 0, i64* %7
br label %24
24: ; preds = %23, %19, %16, %10
%25 = load i64, i64* %7
%26 = load i64*, i64** %6
store i64 %25, i64* %26
ret void
}

LLVM IR (-O2):
define void @switch_eg(i64 %0, i64 %1, i64* nocapture writeonly %2) {
switch i64 %1, label %13 [
i64 100, label %4
i64 102, label %6
i64 103, label %8
i64 104, label %11
i64 106, label %11
]
4: ; preds = %3
%5 = mul nsw i64 %0, 13
br label %13
6: ; preds = %3
%7 = add nsw i64 %0, 10
br label %8
8: ; preds = %3, %6
%9 = phi i64 [ %0, %3 ], [ %7, %6 ]
%10 = add nsw i64 %9, 11
br label %13
11: ; preds = %3, %3
%12 = mul nsw i64 %0, %0
br label %13
13: ; preds = %3, %11, %8, %4
%14 = phi i64 [ %12, %11 ], [ %10, %8 ], [ %5, %4 ], [ 0, %3 ]
store i64 %14, i64* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int socketpair(int domain, int type, int protocol, int fds[2]) {
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<socketpair>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    0x2ebc(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<socketpair>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @socketpair(i32 %0, i32 %1, i32 %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32* %3, i32** %8
%9 = load i32, i32* @ENOSYS
%10 = call i32 @__set_errno(i32 %9)
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @socketpair(i32 %0, i32 %1, i32 %2, i32* nocapture readnone %3) {
%5 = load i32, i32* @ENOSYS
%6 = tail call i32 @__set_errno(i32 %5)
ret i32 -1
}
__attribute__((no)) int bar(int a, int b) {
  int c;
  c = a % b;
  return c;
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
mov    %edi,%eax
cltd
idiv   %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @bar(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = srem i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @bar(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ emit_generic_instruction(int /*<<< orphan*/,
                                            int /*<<< orphan*/, int);
void mov_r64_r64(uint8_t dest, uint8_t source) {
  emit_generic_instruction(dest, source, 0x8B);
}


x86 assembly (clang, -O0):
<mov_r64_r64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x8b,%edx
call   1030 <emit_generic_instruction@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mov_r64_r64>:
mov    $0x8b,%edx
jmp    1030 <emit_generic_instruction@plt>

LLVM IR (-O0):
define void @mov_r64_r64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @emit_generic_instruction(i32 %5, i32 %6, i32 139)
ret void
}

LLVM IR (-O2):
define void @mov_r64_r64(i32 %0, i32 %1) {
%3 = tail call i32 @emit_generic_instruction(i32 %0, i32 %1, i32 139)
ret void
}
void EFSPushFree() {}


x86 assembly (clang, -O0):
<EFSPushFree>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EFSPushFree>:
ret

LLVM IR (-O0):
define void @EFSPushFree() {
ret void
}

LLVM IR (-O2):
define void @EFSPushFree() {
ret void
}