void mxc_serial_init(void) {
  (*((volatile unsigned int *)(0x53FBC000 + 0x80))) &= ~(1 << 0);
  (*((volatile unsigned int *)(0x53FBC000 + 0x80))) = 0x0;
  (*((volatile unsigned int *)(0x53FBC000 + 0x84))) = 0x0;
  while (!((*((volatile unsigned int *)(0x53FBC000 + 0x84))) & (1 << 0)))
    ;
  (*((volatile unsigned int *)(0x53FBC000 + 0x80))) = (1 << 0);
  (*((volatile unsigned int *)(0x53FBC000 + 0x84))) &= ~(1 << 8);
  (*((volatile unsigned int *)(0x53FBC000 + 0x84))) |= (1 << 5);
  (*((volatile unsigned int *)(0x53FBC000 + 0x84))) &= ~(1 << 6);
  (*((volatile unsigned int *)(0x53FBC000 + 0x84))) |= (1 << 14);
  (*((volatile unsigned int *)(0x53FBC000 + 0x84))) |=
      (1 << 2) | (1 << 1) | (1 << 0);
  (*((volatile unsigned int *)(0x53FBC000 + 0x88))) = 0x0704;
  (*((volatile unsigned int *)(0x53FBC000 + 0x8c))) = 0x8000;
  (*((volatile unsigned int *)(0x53FBC000 + 0x9c))) = 0x002b;
  (*((volatile unsigned int *)(0x53FBC000 + 0xa0))) = 0x0;
  (*((volatile unsigned int *)(0x53FBC000 + 0xb4))) = 0x0060;
  const unsigned int clk = 33300000;
  (*((volatile unsigned int *)(0x53FBC000 + 0x90))) = 0x0A1E;
  (*((volatile unsigned int *)(0x53FBC000 + 0xb0))) = clk / 2 / 1000;
  (*((volatile unsigned int *)(0x53FBC000 + 0xa4))) = 0xf;
  (*((volatile unsigned int *)(0x53FBC000 + 0xa8))) = 0x121;
  (*((volatile unsigned int *)(0x53FBC000 + 0x98))) |=
      (1 << 15) | (1 << 12) | (1 << 8) | (1 << 7) | (1 << 4);
  (*((volatile unsigned int *)(0x53FBC000 + 0x98))) |=
      (1 << 2) | (1 << 1) | (1 << 0);
  (*((volatile unsigned int *)(0x53FBC000 + 0x80))) = (1 << 0);
  return;
}


x86 assembly (clang, -O0):
<mxc_serial_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x53fbc080,%eax
mov    (%rax),%ecx
and    $0xfffffffe,%ecx
mov    $0x53fbc080,%eax
mov    %ecx,(%rax)
mov    $0x53fbc080,%eax
movl   $0x0,(%rax)
mov    $0x53fbc084,%eax
movl   $0x0,(%rax)
mov    $0x53fbc084,%eax
mov    (%rax),%eax
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    114a <mxc_serial_init+0x4a>
jmp    114f <mxc_serial_init+0x4f>
jmp    112b <mxc_serial_init+0x2b>
mov    $0x53fbc080,%eax
movl   $0x1,(%rax)
mov    $0x53fbc084,%eax
mov    (%rax),%ecx
and    $0xfffffeff,%ecx
mov    $0x53fbc084,%eax
mov    %ecx,(%rax)
mov    $0x53fbc084,%eax
mov    (%rax),%ecx
or     $0x20,%ecx
mov    $0x53fbc084,%eax
mov    %ecx,(%rax)
mov    $0x53fbc084,%eax
mov    (%rax),%ecx
and    $0xffffffbf,%ecx
mov    $0x53fbc084,%eax
mov    %ecx,(%rax)
mov    $0x53fbc084,%eax
mov    (%rax),%ecx
or     $0x4000,%ecx
mov    $0x53fbc084,%eax
mov    %ecx,(%rax)
mov    $0x53fbc084,%eax
mov    (%rax),%ecx
or     $0x7,%ecx
mov    $0x53fbc084,%eax
mov    %ecx,(%rax)
mov    $0x53fbc088,%eax
movl   $0x704,(%rax)
mov    $0x53fbc08c,%eax
movl   $0x8000,(%rax)
mov    $0x53fbc09c,%eax
movl   $0x2b,(%rax)
mov    $0x53fbc0a0,%eax
movl   $0x0,(%rax)
mov    $0x53fbc0b4,%eax
movl   $0x60,(%rax)
movl   $0x1fc1e20,-0x4(%rbp)
mov    $0x53fbc090,%eax
movl   $0xa1e,(%rax)
mov    $0x53fbc0b0,%eax
movl   $0x410a,(%rax)
mov    $0x53fbc0a4,%eax
movl   $0xf,(%rax)
mov    $0x53fbc0a8,%eax
movl   $0x121,(%rax)
mov    $0x53fbc098,%eax
mov    (%rax),%ecx
or     $0x9190,%ecx
mov    $0x53fbc098,%eax
mov    %ecx,(%rax)
mov    $0x53fbc098,%eax
mov    (%rax),%ecx
or     $0x7,%ecx
mov    $0x53fbc098,%eax
mov    %ecx,(%rax)
mov    $0x53fbc080,%eax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mxc_serial_init>:
andl   $0xfffffffe,0x53fbc080
fe
movl   $0x0,0x53fbc080
movl   $0x0,0x53fbc084
xchg   %ax,%ax
testl  $0x1,0x53fbc084
je     1120 <mxc_serial_init+0x20>
movl   $0x1,0x53fbc080
andl   $0xfffffeff,0x53fbc084
ff fe ff ff
orl    $0x20,0x53fbc084
20
andl   $0xffffffbf,0x53fbc084
bf
orl    $0x4000,0x53fbc084
orl    $0x7,0x53fbc084
07
movl   $0x704,0x53fbc088
movl   $0x8000,0x53fbc08c
movl   $0x2b,0x53fbc09c
movl   $0x0,0x53fbc0a0
movl   $0x60,0x53fbc0b4
movl   $0xa1e,0x53fbc090
movl   $0x410a,0x53fbc0b0
movl   $0xf,0x53fbc0a4
movl   $0x121,0x53fbc0a8
orl    $0x9190,0x53fbc098
orl    $0x7,0x53fbc098
07
movl   $0x1,0x53fbc080
ret

LLVM IR (-O0):
define void @mxc_serial_init() {
%1 = alloca i32
%2 = load volatile i32, i32* inttoptr (i64 1409007744 to i32*)
%3 = and i32 %2, -2
store volatile i32 %3, i32* inttoptr (i64 1409007744 to i32*)
store volatile i32 0, i32* inttoptr (i64 1409007744 to i32*)
store volatile i32 0, i32* inttoptr (i64 1409007748 to i32*)
br label %4
4: ; preds = %9, %0
%5 = load volatile i32, i32* inttoptr (i64 1409007748 to i32*)
%6 = and i32 %5, 1
%7 = icmp ne i32 %6, 0
%8 = xor i1 %7, true
br i1 %8, label %9, label %10
9: ; preds = %4
br label %4
10: ; preds = %4
store volatile i32 1, i32* inttoptr (i64 1409007744 to i32*)
%11 = load volatile i32, i32* inttoptr (i64 1409007748 to i32*)
%12 = and i32 %11, -257
store volatile i32 %12, i32* inttoptr (i64 1409007748 to i32*)
%13 = load volatile i32, i32* inttoptr (i64 1409007748 to i32*)
%14 = or i32 %13, 32
store volatile i32 %14, i32* inttoptr (i64 1409007748 to i32*)
%15 = load volatile i32, i32* inttoptr (i64 1409007748 to i32*)
%16 = and i32 %15, -65
store volatile i32 %16, i32* inttoptr (i64 1409007748 to i32*)
%17 = load volatile i32, i32* inttoptr (i64 1409007748 to i32*)
%18 = or i32 %17, 16384
store volatile i32 %18, i32* inttoptr (i64 1409007748 to i32*)
%19 = load volatile i32, i32* inttoptr (i64 1409007748 to i32*)
%20 = or i32 %19, 7
store volatile i32 %20, i32* inttoptr (i64 1409007748 to i32*)
store volatile i32 1796, i32* inttoptr (i64 1409007752 to i32*)
store volatile i32 32768, i32* inttoptr (i64 1409007756 to i32*)
store volatile i32 43, i32* inttoptr (i64 1409007772 to i32*)
store volatile i32 0, i32* inttoptr (i64 1409007776 to i32*)
store volatile i32 96, i32* inttoptr (i64 1409007796 to i32*)
store i32 33300000, i32* %1
store volatile i32 2590, i32* inttoptr (i64 1409007760 to i32*)
store volatile i32 16650, i32* inttoptr (i64 1409007792 to i32*)
store volatile i32 15, i32* inttoptr (i64 1409007780 to i32*)
store volatile i32 289, i32* inttoptr (i64 1409007784 to i32*)
%21 = load volatile i32, i32* inttoptr (i64 1409007768 to i32*)
%22 = or i32 %21, 37264
store volatile i32 %22, i32* inttoptr (i64 1409007768 to i32*)
%23 = load volatile i32, i32* inttoptr (i64 1409007768 to i32*)
%24 = or i32 %23, 7
store volatile i32 %24, i32* inttoptr (i64 1409007768 to i32*)
store volatile i32 1, i32* inttoptr (i64 1409007744 to i32*)
ret void
}

LLVM IR (-O2):
define void @mxc_serial_init() {
%1 = load volatile i32, i32* inttoptr (i64 1409007744 to i32*)
%2 = and i32 %1, -2
store volatile i32 %2, i32* inttoptr (i64 1409007744 to i32*)
store volatile i32 0, i32* inttoptr (i64 1409007744 to i32*)
store volatile i32 0, i32* inttoptr (i64 1409007748 to i32*)
br label %3
3: ; preds = %3, %0
%4 = load volatile i32, i32* inttoptr (i64 1409007748 to i32*)
%5 = and i32 %4, 1
%6 = icmp eq i32 %5, 0
br i1 %6, label %3, label %7
7: ; preds = %3
store volatile i32 1, i32* inttoptr (i64 1409007744 to i32*)
%8 = load volatile i32, i32* inttoptr (i64 1409007748 to i32*)
%9 = and i32 %8, -257
store volatile i32 %9, i32* inttoptr (i64 1409007748 to i32*)
%10 = load volatile i32, i32* inttoptr (i64 1409007748 to i32*)
%11 = or i32 %10, 32
store volatile i32 %11, i32* inttoptr (i64 1409007748 to i32*)
%12 = load volatile i32, i32* inttoptr (i64 1409007748 to i32*)
%13 = and i32 %12, -65
store volatile i32 %13, i32* inttoptr (i64 1409007748 to i32*)
%14 = load volatile i32, i32* inttoptr (i64 1409007748 to i32*)
%15 = or i32 %14, 16384
store volatile i32 %15, i32* inttoptr (i64 1409007748 to i32*)
%16 = load volatile i32, i32* inttoptr (i64 1409007748 to i32*)
%17 = or i32 %16, 7
store volatile i32 %17, i32* inttoptr (i64 1409007748 to i32*)
store volatile i32 1796, i32* inttoptr (i64 1409007752 to i32*)
store volatile i32 32768, i32* inttoptr (i64 1409007756 to i32*)
store volatile i32 43, i32* inttoptr (i64 1409007772 to i32*)
store volatile i32 0, i32* inttoptr (i64 1409007776 to i32*)
store volatile i32 96, i32* inttoptr (i64 1409007796 to i32*)
store volatile i32 2590, i32* inttoptr (i64 1409007760 to i32*)
store volatile i32 16650, i32* inttoptr (i64 1409007792 to i32*)
store volatile i32 15, i32* inttoptr (i64 1409007780 to i32*)
store volatile i32 289, i32* inttoptr (i64 1409007784 to i32*)
%18 = load volatile i32, i32* inttoptr (i64 1409007768 to i32*)
%19 = or i32 %18, 37264
store volatile i32 %19, i32* inttoptr (i64 1409007768 to i32*)
%20 = load volatile i32, i32* inttoptr (i64 1409007768 to i32*)
%21 = or i32 %20, 7
store volatile i32 %21, i32* inttoptr (i64 1409007768 to i32*)
store volatile i32 1, i32* inttoptr (i64 1409007744 to i32*)
ret void
}