xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char *argv[]) {
  int x = 3;
  int y = 4;
  int z;
  if (x < y) {
    z = x;
  } else {
    z = y;
  }
  printf("%d\n", z);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x3,-0x14(%rbp)
movl   $0x4,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    114b <main+0x3b>
mov    -0x14(%rbp),%eax
mov    %eax,-0x1c(%rbp)
jmp    1151 <main+0x41>
mov    -0x18(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%esi
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x3,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 3, i32* %6
store i32 4, i32* %7
%9 = load i32, i32* %6
%10 = load i32, i32* %7
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = load i32, i32* %6
store i32 %13, i32* %8
br label %16
14: ; preds = %2
%15 = load i32, i32* %7
store i32 %15, i32* %8
br label %16
16: ; preds = %14, %12
%17 = load i32, i32* %8
%18 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %17)
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 3)
ret i32 0
}
/* Type definitions */
struct buffer_head {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __lock_buffer(struct buffer_head *);
int /*<<< orphan*/ trylock_buffer(struct buffer_head *);
__attribute__((always_)) void lock_buffer(struct buffer_head *bh) {
  do {
    do {
    } while (0);
  } while (0);
  if (!trylock_buffer(bh))
    __lock_buffer(bh);
}


x86 assembly (clang, -O0):
<lock_buffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
jmp    1131 <lock_buffer+0x11>
jmp    1136 <lock_buffer+0x16>
jmp    113b <lock_buffer+0x1b>
mov    -0x8(%rbp),%rdi
call   1040 <trylock_buffer@plt>
cmp    $0x0,%eax
jne    1156 <lock_buffer+0x36>
mov    -0x8(%rbp),%rdi
call   1030 <__lock_buffer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lock_buffer>:
push   %rbx
mov    %rdi,%rbx
call   1040 <trylock_buffer@plt>
test   %eax,%eax
je     112f <lock_buffer+0xf>
pop    %rbx
ret
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <__lock_buffer@plt>

LLVM IR (-O0):
%struct.buffer_head = type { i32 }
define void @lock_buffer(%struct.buffer_head* %0) {
%2 = alloca %struct.buffer_head*
store %struct.buffer_head* %0, %struct.buffer_head** %2
br label %3
3: ; preds = %1
br label %4
4: ; preds = %3
br label %5
5: ; preds = %4
br label %6
6: ; preds = %5
%7 = load %struct.buffer_head*, %struct.buffer_head** %2
%8 = call i32 @trylock_buffer(%struct.buffer_head* %7)
%9 = icmp ne i32 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %6
%11 = load %struct.buffer_head*, %struct.buffer_head** %2
%12 = call i32 @__lock_buffer(%struct.buffer_head* %11)
br label %13
13: ; preds = %10, %6
ret void
}

LLVM IR (-O2):
%struct.buffer_head = type { i32 }
define void @lock_buffer(%struct.buffer_head* %0) {
%2 = tail call i32 @trylock_buffer(%struct.buffer_head* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @__lock_buffer(%struct.buffer_head* %0)
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_idxset_string_hash_func() {
  printf("NOT IMPLEMENTED:"
         "pa_idxset_string_hash_func"
         "\n");
}


x86 assembly (clang, -O0):
<pa_idxset_string_hash_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_idxset_string_hash_func>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [44 x i8] c"NOT IMPLEMENTED:pa_idxset_string_hash_func\0A\00"
define i32 @pa_idxset_string_hash_func() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [43 x i8] c"NOT IMPLEMENTED:pa_idxset_string_hash_func\00"
define i32 @pa_idxset_string_hash_func() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([43 x i8], [43 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
void rop3_145_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  unsigned char stk4;
  stk4 = ~S;
  stk3 = T | stk4;
  stk2 = *D & stk3;
  stk1 = S ^ stk2;
  stk1 = ~stk1;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_145_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0x9(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xe(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xe(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_145_0_0>:
mov    %esi,%eax
not    %al
or     %dl,%al
and    (%rdi),%al
xor    %sil,%al
not    %al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_145_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%11 = load i8, i8* %5
%12 = zext i8 %11 to i32
%13 = xor i32 %12, -1
%14 = trunc i32 %13 to i8
store i8 %14, i8* %10
%15 = load i8, i8* %6
%16 = zext i8 %15 to i32
%17 = load i8, i8* %10
%18 = zext i8 %17 to i32
%19 = or i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %9
%21 = load i8*, i8** %4
%22 = load i8, i8* %21
%23 = zext i8 %22 to i32
%24 = load i8, i8* %9
%25 = zext i8 %24 to i32
%26 = and i32 %23, %25
%27 = trunc i32 %26 to i8
store i8 %27, i8* %8
%28 = load i8, i8* %5
%29 = zext i8 %28 to i32
%30 = load i8, i8* %8
%31 = zext i8 %30 to i32
%32 = xor i32 %29, %31
%33 = trunc i32 %32 to i8
store i8 %33, i8* %7
%34 = load i8, i8* %7
%35 = zext i8 %34 to i32
%36 = xor i32 %35, -1
%37 = trunc i32 %36 to i8
store i8 %37, i8* %7
%38 = load i8, i8* %7
%39 = load i8*, i8** %4
store i8 %38, i8* %39
ret void
}

LLVM IR (-O2):
define void @rop3_145_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = xor i8 %1, -1
%5 = or i8 %4, %2
%6 = load i8, i8* %0
%7 = and i8 %6, %5
%8 = xor i8 %7, %1
%9 = xor i8 %8, -1
store i8 %9, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isgraph(int);
void t_isgraph_0xfb() {
  Assert_real((isgraph(251) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              1260, ("isgraph should be 0 for 0xfb"));
}


x86 assembly (clang, -O0):
<t_isgraph_0xfb>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfb,%edi
call   1040 <isgraph@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4ec,%edx
lea    0xf5b(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0xfb>:
push   %rax
mov    $0xfb,%edi
call   1040 <isgraph@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4ec,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0xfb\00"
define void @t_isgraph_0xfb() {
%1 = call i64 @isgraph(i32 251)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1260, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0xfb\00"
define void @t_isgraph_0xfb() {
%1 = tail call i64 @isgraph(i32 251)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1260, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
to_binary(int num) {
  int remind, i = 1, binary = 0;
  while (num != 0) {
    remind = num % 2;
    num /= 2;
    binary += remind * i;
    i *= 10;
  }
  return binary;
}


x86 assembly (clang, -O0):
<to_binary>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1154 <to_binary+0x54>
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
imul   -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
imul   $0xa,-0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1115 <to_binary+0x15>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<to_binary>:
test   %edi,%edi
je     113a <to_binary+0x3a>
mov    $0x1,%ecx
xor    %eax,%eax
nopl   0x0(%rax,%rax,1)
mov    %edi,%edx
shr    $0x1f,%edx
add    %edi,%edx
mov    %edx,%r8d
sar    %r8d
and    $0xfffffffe,%edx
mov    %edi,%esi
sub    %edx,%esi
imul   %ecx,%esi
add    %esi,%eax
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
add    $0x1,%edi
cmp    $0x2,%edi
mov    %r8d,%edi
ja     1110 <to_binary+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @to_binary(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %9, %1
%7 = load i32, i32* %2
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %21
9: ; preds = %6
%10 = load i32, i32* %2
%11 = srem i32 %10, 2
store i32 %11, i32* %3
%12 = load i32, i32* %2
%13 = sdiv i32 %12, 2
store i32 %13, i32* %2
%14 = load i32, i32* %3
%15 = load i32, i32* %4
%16 = mul nsw i32 %14, %15
%17 = load i32, i32* %5
%18 = add nsw i32 %17, %16
store i32 %18, i32* %5
%19 = load i32, i32* %4
%20 = mul nsw i32 %19, 10
store i32 %20, i32* %4
br label %6
21: ; preds = %6
%22 = load i32, i32* %5
ret i32 %22
}

LLVM IR (-O2):
define i32 @to_binary(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %14, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %10, %3 ], [ 0, %1 ]
%5 = phi i32 [ %11, %3 ], [ 1, %1 ]
%6 = phi i32 [ %8, %3 ], [ %0, %1 ]
%7 = srem i32 %6, 2
%8 = sdiv i32 %6, 2
%9 = mul nsw i32 %7, %5
%10 = add nsw i32 %4, %9
%11 = mul nsw i32 %5, 10
%12 = add i32 %6, 1
%13 = icmp ult i32 %12, 3
br i1 %13, label %14, label %3
14: ; preds = %3, %1
%15 = phi i32 [ 0, %1 ], [ %10, %3 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ logUnsupportedFeature(char *);
int installService(const char *name, const char *description) {
  logUnsupportedFeature("service installation");
  return 0;
}


x86 assembly (clang, -O0):
<installService>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed9(%rip),%rdi
call   1030 <logUnsupportedFeature@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<installService>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <logUnsupportedFeature@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"service installation\00"
define i32 @installService(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = call i32 @logUnsupportedFeature(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [21 x i8] c"service installation\00"
define i32 @installService(i8* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = tail call i32 @logUnsupportedFeature(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ int16_t;

/* Variables and functions */
int16_t new_int16_t(void) { return 0; }


x86 assembly (clang, -O0):
<new_int16_t>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<new_int16_t>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @new_int16_t() {
ret i32 0
}

LLVM IR (-O2):
define i32 @new_int16_t() {
ret i32 0
}
/* Variables and functions */
void memoryInit(char **values, unsigned int index) {
  for (unsigned int i = index; i < index + 10; i++) {
    values[i] = NULL;
  }
}


x86 assembly (clang, -O0):
<memoryInit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    -0xc(%rbp),%ecx
add    $0xa,%ecx
cmp    %ecx,%eax
jae    113f <memoryInit+0x3f>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%ecx
movq   $0x0,(%rax,%rcx,8)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1111 <memoryInit+0x11>
pop    %rbp
ret

x86 assembly (clang, -O2):
<memoryInit>:
cmp    $0xfffffff5,%esi
ja     1122 <memoryInit+0x22>
mov    %esi,%eax
xorps  %xmm0,%xmm0
movups %xmm0,0x40(%rdi,%rax,8)
movups %xmm0,0x30(%rdi,%rax,8)
movups %xmm0,0x20(%rdi,%rax,8)
movups %xmm0,0x10(%rdi,%rax,8)
movups %xmm0,(%rdi,%rax,8)
ret

LLVM IR (-O0):
define void @memoryInit(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
%5 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
store i32 %6, i32* %5
br label %7
7: ; preds = %17, %2
%8 = load i32, i32* %5
%9 = load i32, i32* %4
%10 = add i32 %9, 10
%11 = icmp ult i32 %8, %10
br i1 %11, label %12, label %20
12: ; preds = %7
%13 = load i8**, i8*** %3
%14 = load i32, i32* %5
%15 = zext i32 %14 to i64
%16 = getelementptr inbounds i8*, i8** %13, i64 %15
store i8* null, i8** %16
br label %17
17: ; preds = %12
%18 = load i32, i32* %5
%19 = add i32 %18, 1
store i32 %19, i32* %5
br label %7
20: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @memoryInit(i8** nocapture writeonly %0, i32 %1) {
%3 = icmp ult i32 %1, -10
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = zext i32 %1 to i64
%6 = getelementptr i8*, i8** %0, i64 %5
%7 = bitcast i8** %6 to i8*
br label %8
8: ; preds = %4, %2
ret void
}
int check_config() { return 0; }


x86 assembly (clang, -O0):
<check_config>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_config>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @check_config() {
ret i32 0
}

LLVM IR (-O2):
define i32 @check_config() {
ret i32 0
}
void glDeleteTransformFeedbacks(void) { return; }


x86 assembly (clang, -O0):
<glDeleteTransformFeedbacks>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glDeleteTransformFeedbacks>:
ret

LLVM IR (-O0):
define void @glDeleteTransformFeedbacks() {
ret void
}

LLVM IR (-O2):
define void @glDeleteTransformFeedbacks() {
ret void
}
/* Variables and functions */
float pow(int, double);
float grib_ibm_local(unsigned long ibm_float) {
  long a, b;
  float local_float;
  a = (ibm_float >> 24) & 0x0000007f;
  b = ibm_float & 0x00ffffff;
  local_float = (float)b * pow(16., (double)(a - 70));
  if (ibm_float >> 31)
    local_float = -local_float;
  return local_float;
}


x86 assembly (clang, -O0):
<grib_ibm_local>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x18,%rax
and    $0x7f,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
and    $0xffffff,%rax
mov    %rax,-0x18(%rbp)
cvtsi2ssq -0x18(%rbp),%xmm0
movss  %xmm0,-0x20(%rbp)
mov    -0x10(%rbp),%rax
sub    $0x46,%rax
cvtsi2sd %rax,%xmm0
mov    $0x10,%edi
call   1030 <pow@plt>
movaps %xmm0,%xmm1
movss  -0x20(%rbp),%xmm0
mulss  %xmm1,%xmm0
movss  %xmm0,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x1f,%rax
cmp    $0x0,%rax
je     1196 <grib_ibm_local+0x86>
movss  -0x1c(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  -0x1c(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<grib_ibm_local>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %ebx,%eax
shr    $0x18,%eax
mov    %ebx,%ecx
and    $0xffffff,%ecx
cvtsi2ss %ecx,%xmm0
movss  %xmm0,0xc(%rsp)
and    $0x7f,%eax
add    $0xffffffba,%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
mov    $0x10,%edi
call   1030 <pow@plt>
mulss  0xc(%rsp),%xmm0
test   $0xffffffff80000000,%rbx
je     115c <grib_ibm_local+0x4c>
xorps  0xea4(%rip),%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define float @grib_ibm_local(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca float
store i64 %0, i64* %2
%6 = load i64, i64* %2
%7 = lshr i64 %6, 24
%8 = and i64 %7, 127
store i64 %8, i64* %3
%9 = load i64, i64* %2
%10 = and i64 %9, 16777215
store i64 %10, i64* %4
%11 = load i64, i64* %4
%12 = sitofp i64 %11 to float
%13 = load i64, i64* %3
%14 = sub nsw i64 %13, 70
%15 = sitofp i64 %14 to double
%16 = call float @pow(i32 16, double %15)
%17 = fmul float %12, %16
store float %17, float* %5
%18 = load i64, i64* %2
%19 = lshr i64 %18, 31
%20 = icmp ne i64 %19, 0
br i1 %20, label %21, label %24
21: ; preds = %1
%22 = load float, float* %5
%23 = fneg float %22
store float %23, float* %5
br label %24
24: ; preds = %21, %1
%25 = load float, float* %5
ret float %25
}

LLVM IR (-O2):
define float @grib_ibm_local(i64 %0) {
%2 = lshr i64 %0, 24
%3 = and i64 %2, 127
%4 = and i64 %0, 16777215
%5 = sitofp i64 %4 to float
%6 = add nsw i64 %3, -70
%7 = sitofp i64 %6 to double
%8 = tail call float @pow(i32 16, double %7)
%9 = fmul float %8, %5
%10 = icmp ult i64 %0, 2147483648
%11 = fneg float %9
%12 = select i1 %10, float %9, float %11
ret float %12
}
int c069(void) { return 0; }


x86 assembly (clang, -O0):
<c069>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c069>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @c069() {
ret i32 0
}

LLVM IR (-O2):
define i32 @c069() {
ret i32 0
}
int gcd(int x, int y) {
  return y == 0 ? (x == 0 ? 1 : x) : (x % y == 0 ? y : gcd(y, x % y));
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1150 <gcd+0x40>
cmpl   $0x0,-0x4(%rbp)
jne    113f <gcd+0x2f>
mov    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1145 <gcd+0x35>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1185 <gcd+0x75>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
cmp    $0x0,%edx
jne    116b <gcd+0x5b>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    117f <gcd+0x6f>
mov    -0x8(%rbp),%edi
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%esi
call   1030 <gcd@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %esi,%edx
mov    %edi,%eax
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
test   %edx,%edx
je     1122 <gcd+0x22>
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %ecx,%eax
ret
test   %eax,%eax
mov    $0x1,%ecx
cmovne %eax,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %7
br label %13
11: ; preds = %7
%12 = load i32, i32* %3
br label %13
13: ; preds = %11, %10
%14 = phi i32 [ 1, %10 ], [ %12, %11 ]
br label %30
15: ; preds = %2
%16 = load i32, i32* %3
%17 = load i32, i32* %4
%18 = srem i32 %16, %17
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %22
20: ; preds = %15
%21 = load i32, i32* %4
br label %28
22: ; preds = %15
%23 = load i32, i32* %4
%24 = load i32, i32* %3
%25 = load i32, i32* %4
%26 = srem i32 %24, %25
%27 = call i32 @gcd(i32 %23, i32 %26)
br label %28
28: ; preds = %22, %20
%29 = phi i32 [ %21, %20 ], [ %27, %22 ]
br label %30
30: ; preds = %28, %13
%31 = phi i32 [ %14, %13 ], [ %29, %28 ]
ret i32 %31
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
br label %3
3: ; preds = %10, %2
%4 = phi i32 [ %0, %2 ], [ %5, %10 ]
%5 = phi i32 [ %1, %2 ], [ %11, %10 ]
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = icmp eq i32 %4, 0
%9 = select i1 %8, i32 1, i32 %4
br label %13
10: ; preds = %3
%11 = srem i32 %4, %5
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %3
13: ; preds = %10, %7
%14 = phi i32 [ %9, %7 ], [ %5, %10 ]
ret i32 %14
}
int switch1(unsigned a) {
  switch (a) {
  case 1 ... 11:
    return 11;
  case 12 ... 13:
    return 22;
  default:
    return 44;
  }
}


x86 assembly (clang, -O0):
<switch1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
add    $0xffffffff,%eax
sub    $0xb,%eax
jb     1132 <switch1+0x32>
jmp    111e <switch1+0x1e>
mov    -0xc(%rbp),%eax
add    $0xfffffff4,%eax
sub    $0x2,%eax
jb     113e <switch1+0x3e>
jmp    114a <switch1+0x4a>
movl   $0xb,-0x4(%rbp)
jmp    1151 <switch1+0x51>
movl   $0x16,-0x4(%rbp)
jmp    1151 <switch1+0x51>
movl   $0x2c,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<switch1>:
add    $0xffffffff,%edi
mov    $0x2c,%eax
cmp    $0xc,%edi
ja     111a <switch1+0x1a>
movslq %edi,%rax
lea    0xee9(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @switch1(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %7 [
i32 1, label %5
i32 2, label %5
i32 3, label %5
i32 4, label %5
i32 5, label %5
i32 6, label %5
i32 7, label %5
i32 8, label %5
i32 9, label %5
i32 10, label %5
i32 11, label %5
i32 12, label %6
i32 13, label %6
]
5: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
store i32 11, i32* %2
br label %8
6: ; preds = %1, %1
store i32 22, i32* %2
br label %8
7: ; preds = %1
store i32 44, i32* %2
br label %8
8: ; preds = %7, %6, %5
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
@switch.table.switch1 = [13 x i32] [i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 22, i32 22]
define i32 @switch1(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 13
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [13 x i32], [13 x i32]* @switch.table.switch1, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 44, %1 ]
ret i32 %9
}
int afp_meta_open(const char *path, struct fuse_file_info *fi) {}


x86 assembly (clang, -O0):
<afp_meta_open>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<afp_meta_open>:
ret

LLVM IR (-O0):
%struct.fuse_file_info = type opaque
define i32 @afp_meta_open(i8* %0, %struct.fuse_file_info* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca %struct.fuse_file_info*
store i8* %0, i8** %4
store %struct.fuse_file_info* %1, %struct.fuse_file_info** %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
%struct.fuse_file_info = type opaque
define i32 @afp_meta_open(i8* nocapture readnone %0, %struct.fuse_file_info* nocapture readnone %1) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ is_prime(int);
int get_next_prime(int current_prime) {
  int next_prime = current_prime + 1;
  while (!is_prime(next_prime)) {
    next_prime += 1;
  }
  return next_prime;
}


x86 assembly (clang, -O0):
<get_next_prime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <is_prime@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1141 <get_next_prime+0x31>
jmp    114f <get_next_prime+0x3f>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1124 <get_next_prime+0x14>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_next_prime>:
push   %rbx
mov    %edi,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
add    $0x1,%ebx
mov    %ebx,%edi
call   1030 <is_prime@plt>
test   %eax,%eax
je     1120 <get_next_prime+0x10>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @get_next_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
store i32 %5, i32* %3
br label %6
6: ; preds = %11, %1
%7 = load i32, i32* %3
%8 = call i32 @is_prime(i32 %7)
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
br i1 %10, label %11, label %14
11: ; preds = %6
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %6
14: ; preds = %6
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @get_next_prime(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ %0, %1 ], [ %4, %2 ]
%4 = add nsw i32 %3, 1
%5 = tail call i32 @is_prime(i32 %4)
%6 = icmp eq i32 %5, 0
br i1 %6, label %2, label %7
7: ; preds = %2
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ emit_string(char *);
void event_rep1() { emit_string(" [1"); }


x86 assembly (clang, -O0):
<event_rep1>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <emit_string@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_rep1>:
lea    0xee9(%rip),%rdi
jmp    1030 <emit_string@plt>

LLVM IR (-O0):
@.str = [4 x i8] c" [1\00"
define void @event_rep1() {
%1 = call i32 @emit_string(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c" [1\00"
define void @event_rep1() {
%1 = tail call i32 @emit_string(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void usage(const char *info) {
  fprintf(stderr,
          "Uage: %s"
          "<file_src> <file_dest>",
          info);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [31 x i8] c"Uage: %s<file_src> <file_dest>\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [31 x i8] c"Uage: %s<file_src> <file_dest>\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void show_program_version() {
  printf("gl"
         " v"
         "1.3.1"
         "\n"
         "Written by Maximilian Eul <maximilian@eul.cc>, November 2019.\n"
         "License GPLv3+: GNU GPL version 3 or later "
         "<http://gnu.org/licenses/gpl.html>\n"
         "\n");
}


x86 assembly (clang, -O0):
<show_program_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_program_version>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [152 x i8] c"gl v1.3.1\0AWritten by Maximilian Eul <maximilian@eul.cc>, November 2019.\0ALicense GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>\0A\0A\00"
define void @show_program_version() {
%1 = call i32 @printf(i8* getelementptr inbounds ([152 x i8], [152 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [151 x i8] c"gl v1.3.1\0AWritten by Maximilian Eul <maximilian@eul.cc>, November 2019.\0ALicense GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>\0A\00"
define void @show_program_version() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([151 x i8], [151 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int inp_emulate(int);
char TOSH_READ_INT2_PIN() { return 0x01 & (inp_emulate(0x44) >> 2); }


x86 assembly (clang, -O0):
<TOSH_READ_INT2_PIN>:
push   %rbp
mov    %rsp,%rbp
mov    $0x44,%edi
call   1030 <inp_emulate@plt>
sar    $0x2,%eax
and    $0x1,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_READ_INT2_PIN>:
push   %rax
mov    $0x44,%edi
call   1030 <inp_emulate@plt>
shr    $0x2,%al
and    $0x1,%al
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @TOSH_READ_INT2_PIN() {
%1 = call i32 @inp_emulate(i32 68)
%2 = ashr i32 %1, 2
%3 = and i32 1, %2
%4 = trunc i32 %3 to i8
ret i8 %4
}

LLVM IR (-O2):
define signext i8 @TOSH_READ_INT2_PIN() {
%1 = tail call i32 @inp_emulate(i32 68)
%2 = trunc i32 %1 to i8
%3 = lshr i8 %2, 2
%4 = and i8 %3, 1
ret i8 %4
}
void myInit() {}


x86 assembly (clang, -O0):
<myInit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<myInit>:
ret

LLVM IR (-O0):
define void @myInit() {
ret void
}

LLVM IR (-O2):
define void @myInit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ read_option_args(int, char **);
int /*<<< orphan*/ set_default_static_files();
void parse_cmd_line(int argc, char **argv) {
  read_option_args(argc, argv);
  set_default_static_files();
}


x86 assembly (clang, -O0):
<parse_cmd_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <read_option_args@plt>
mov    $0x0,%al
call   1040 <set_default_static_files@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_cmd_line>:
push   %rax
call   1030 <read_option_args@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <set_default_static_files@plt>

LLVM IR (-O0):
define void @parse_cmd_line(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i8**, i8*** %4
%7 = call i32 @read_option_args(i32 %5, i8** %6)
%8 = call i32 (...) @set_default_static_files()
ret void
}

LLVM IR (-O2):
define void @parse_cmd_line(i32 %0, i8** %1) {
%3 = tail call i32 @read_option_args(i32 %0, i8** %1)
%4 = tail call i32 (...) @set_default_static_files()
ret void
}
/* Type definitions */
struct tag_async_net {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ connmgr_kill_connection(int);
int /*<<< orphan*/ default_child_sock_err_handler(struct tag_async_net *, int,
                                                  void *);
void child_sock_err_handler(struct tag_async_net *asnet, int fd, void *info) {
  default_child_sock_err_handler(asnet, fd, info);
  connmgr_kill_connection(fd);
}


x86 assembly (clang, -O0):
<child_sock_err_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1030 <default_child_sock_err_handler@plt>
mov    -0xc(%rbp),%edi
call   1040 <connmgr_kill_connection@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<child_sock_err_handler>:
push   %rbx
mov    %esi,%ebx
call   1030 <default_child_sock_err_handler@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <connmgr_kill_connection@plt>

LLVM IR (-O0):
%struct.tag_async_net = type { i32 }
define void @child_sock_err_handler(%struct.tag_async_net* %0, i32 %1, i8* %2) {
%4 = alloca %struct.tag_async_net*
%5 = alloca i32
%6 = alloca i8*
store %struct.tag_async_net* %0, %struct.tag_async_net** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load %struct.tag_async_net*, %struct.tag_async_net** %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = call i32 @default_child_sock_err_handler(%struct.tag_async_net* %7, i32 %8, i8* %9)
%11 = load i32, i32* %5
%12 = call i32 @connmgr_kill_connection(i32 %11)
ret void
}

LLVM IR (-O2):
%struct.tag_async_net = type { i32 }
define void @child_sock_err_handler(%struct.tag_async_net* %0, i32 %1, i8* %2) {
%4 = tail call i32 @default_child_sock_err_handler(%struct.tag_async_net* %0, i32 %1, i8* %2)
%5 = tail call i32 @connmgr_kill_connection(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned int volatile);
int main() {
  volatile unsigned a = 150, b = -1;
  printf("%d\n", a | b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x96,-0x8(%rbp)
movl   $0xffffffff,-0xc(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%eax
or     %eax,%esi
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x96,0x4(%rsp)
movl   $0xffffffff,(%rsp)
mov    0x4(%rsp),%esi
or     (%rsp),%esi
lea    0xed2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store volatile i32 150, i32* %2
store volatile i32 -1, i32* %3
%4 = load volatile i32, i32* %2
%5 = load volatile i32, i32* %3
%6 = or i32 %4, %5
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
store volatile i32 150, i32* %1
%4 = bitcast i32* %2 to i8*
store volatile i32 -1, i32* %2
%5 = load volatile i32, i32* %1
%6 = load volatile i32, i32* %2
%7 = or i32 %6, %5
%8 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ pthread_key_delete(int);
void PyThread_delete_key(int key) { pthread_key_delete(key); }


x86 assembly (clang, -O0):
<PyThread_delete_key>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <pthread_key_delete@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PyThread_delete_key>:
jmp    1030 <pthread_key_delete@plt>

LLVM IR (-O0):
define void @PyThread_delete_key(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @pthread_key_delete(i32 %3)
ret void
}

LLVM IR (-O2):
define void @PyThread_delete_key(i32 %0) {
%2 = tail call i32 @pthread_key_delete(i32 %0)
ret void
}
/* Variables and functions */
scalar_t__ strncasecmp(char *, char *, int);
int bl_conf_bool(char *arg) {
  if (strncasecmp(arg, "true", 4) == 0)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<bl_conf_bool>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
mov    $0x4,%edx
call   1030 <strncasecmp@plt>
cmp    $0x0,%rax
jne    1147 <bl_conf_bool+0x37>
movl   $0x1,-0x4(%rbp)
jmp    114e <bl_conf_bool+0x3e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bl_conf_bool>:
push   %rax
lea    0xee8(%rip),%rsi
mov    $0x4,%edx
call   1030 <strncasecmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"true\00"
define i32 @bl_conf_bool(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @strncasecmp(i8* %4, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 4)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
@.str = [5 x i8] c"true\00"
define i32 @bl_conf_bool(i8* nocapture %0) {
%2 = tail call i64 @strncasecmp(i8* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 4)
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ execve(char *, char **, int /*<<< orphan*/ *);
void main(void) {
  char *pargv[4];
  pargv[0] = "/app/os/sys/bin/ash";
  pargv[1] = "-c";
  pargv[2] = "'/app/os/sys/bin/ps w'";
  pargv[3] = NULL;
  execve(pargv[0], pargv, NULL);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x20(%rbp)
lea    0xeea(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    0xee2(%rip),%rax
mov    %rax,-0x10(%rbp)
movq   $0x0,-0x8(%rbp)
mov    -0x20(%rbp),%rdi
lea    -0x20(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <execve@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
lea    0xee5(%rip),%rdi
mov    %rdi,(%rsp)
lea    0xeee(%rip),%rax
mov    %rax,0x8(%rsp)
lea    0xee5(%rip),%rax
mov    %rax,0x10(%rsp)
movq   $0x0,0x18(%rsp)
mov    %rsp,%rsi
xor    %edx,%edx
call   1030 <execve@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
@.str = [20 x i8] c"/app/os/sys/bin/ash\00"
@.str.1 = [3 x i8] c"-c\00"
@.str.2 = [23 x i8] c"'/app/os/sys/bin/ps w'\00"
define void @main() {
%1 = alloca [4 x i8*]
%2 = getelementptr inbounds [4 x i8*], [4 x i8*]* %1, i64 0, i64 0
store i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8** %2
%3 = getelementptr inbounds [4 x i8*], [4 x i8*]* %1, i64 0, i64 1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8** %3
%4 = getelementptr inbounds [4 x i8*], [4 x i8*]* %1, i64 0, i64 2
store i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.2, i64 0, i64 0), i8** %4
%5 = getelementptr inbounds [4 x i8*], [4 x i8*]* %1, i64 0, i64 3
store i8* null, i8** %5
%6 = getelementptr inbounds [4 x i8*], [4 x i8*]* %1, i64 0, i64 0
%7 = load i8*, i8** %6
%8 = getelementptr inbounds [4 x i8*], [4 x i8*]* %1, i64 0, i64 0
%9 = call i32 @execve(i8* %7, i8** %8, i32* null)
ret void
}

LLVM IR (-O2):
@.str = [20 x i8] c"/app/os/sys/bin/ash\00"
@.str.1 = [3 x i8] c"-c\00"
@.str.2 = [23 x i8] c"'/app/os/sys/bin/ps w'\00"
define void @main() {
%1 = alloca [4 x i8*]
%2 = bitcast [4 x i8*]* %1 to i8*
%3 = getelementptr inbounds [4 x i8*], [4 x i8*]* %1, i64 0, i64 0
store i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8** %3
%4 = getelementptr inbounds [4 x i8*], [4 x i8*]* %1, i64 0, i64 1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8** %4
%5 = getelementptr inbounds [4 x i8*], [4 x i8*]* %1, i64 0, i64 2
store i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.2, i64 0, i64 0), i8** %5
%6 = getelementptr inbounds [4 x i8*], [4 x i8*]* %1, i64 0, i64 3
store i8* null, i8** %6
%7 = call i32 @execve(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8** %3, i32* null)
ret void
}
int mystrlen(char *s) {
  char *start;
  start = s;
  while (*s != 0) {
    ++s;
  }
  return s - start;
}


x86 assembly (clang, -O0):
<mystrlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1131 <mystrlen+0x31>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1110 <mystrlen+0x10>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mystrlen>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <mystrlen+0x10>
ret

LLVM IR (-O0):
define i32 @mystrlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %10, %1
%6 = load i8*, i8** %2
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %5
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
br label %5
13: ; preds = %5
%14 = load i8*, i8** %2
%15 = load i8*, i8** %3
%16 = ptrtoint i8* %14 to i64
%17 = ptrtoint i8* %15 to i64
%18 = sub i64 %16, %17
%19 = trunc i64 %18 to i32
ret i32 %19
}

LLVM IR (-O2):
define i32 @mystrlen(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %6, %2 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 0
%6 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %5, label %7, label %2
7: ; preds = %2
%8 = ptrtoint i8* %3 to i64
%9 = ptrtoint i8* %0 to i64
%10 = sub i64 %8, %9
%11 = trunc i64 %10 to i32
ret i32 %11
}
/* Variables and functions */
int uwsgi_init(int, char **, char **);
int main(int argc, char *argv[], char **environ) {
  return uwsgi_init(argc, argv, environ);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <uwsgi_init@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
jmp    1030 <uwsgi_init@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1, i8** %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8**
%7 = alloca i8**
store i32 0, i32* %4
store i32 %0, i32* %5
store i8** %1, i8*** %6
store i8** %2, i8*** %7
%8 = load i32, i32* %5
%9 = load i8**, i8*** %6
%10 = load i8**, i8*** %7
%11 = call i32 @uwsgi_init(i32 %8, i8** %9, i8** %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1, i8** %2) {
%4 = tail call i32 @uwsgi_init(i32 %0, i8** %1, i8** %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ errno;
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
void *malloc(unsigned long);
int /*<<< orphan*/ stderr;
char *strerror(int /*<<< orphan*/);
void *xmalloc(unsigned long size) {
  void *mem;
  mem = malloc(size);
  if (!mem) {
    fprintf(stderr, "xmalloc: %s\n", strerror(errno));
    exit(1);
  }
  return mem;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    119a <xmalloc+0x5a>
mov    0x2e75(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    0x2e61(%rip),%rax
mov    (%rax),%edi
call   1060 <strerror@plt>
mov    -0x14(%rbp),%edi
mov    %rax,%rdx
lea    0xe75(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rbx
call   1040 <malloc@plt>
test   %rax,%rax
je     114d <xmalloc+0xd>
pop    %rbx
ret
mov    0x2e8c(%rip),%rax
mov    (%rax),%ebx
mov    0x2e7b(%rip),%rax
mov    (%rax),%edi
call   1060 <strerror@plt>
lea    0xe95(%rip),%rsi
mov    %ebx,%edi
mov    %rax,%rdx
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [13 x i8] c"xmalloc: %s\0A\00"
@errno = global i32 0
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %14, label %8
8: ; preds = %1
%9 = load i32, i32* @stderr
%10 = load i32, i32* @errno
%11 = call i8* @strerror(i32 %10)
%12 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %11)
%13 = call i32 @exit(i32 1)
unreachable
14: ; preds = %1
%15 = load i8*, i8** %3
ret i8* %15
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [13 x i8] c"xmalloc: %s\0A\00"
@errno = global i32 0
define noalias i8* @xmalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %10
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = load i32, i32* @errno
%7 = tail call i8* @strerror(i32 %6)
%8 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %7)
%9 = tail call i32 @exit(i32 1)
unreachable
10: ; preds = %1
ret i8* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int ftell(int /*<<< orphan*/ *);
int /*<<< orphan*/ fwrite(char *, int, int, int /*<<< orphan*/ *);
void pad4byte(char byte, FILE *handle) {
  int padding = 4 - ftell(handle) % 4;
  if (padding != 4) {
    while (padding-- > 0) {
      fwrite(&byte, 1, 1, handle);
    }
  }
}


x86 assembly (clang, -O0):
<pad4byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <ftell@plt>
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    $0x4,%eax
sub    %edx,%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x4,-0x14(%rbp)
je     118e <pad4byte+0x6e>
jmp    115c <pad4byte+0x3c>
mov    -0x14(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x14(%rbp)
cmp    $0x0,%eax
jle    1189 <pad4byte+0x69>
mov    -0x10(%rbp),%rcx
lea    -0x1(%rbp),%rdi
mov    $0x1,%edx
mov    %edx,%esi
call   1040 <fwrite@plt>
jmp    115c <pad4byte+0x3c>
jmp    118e <pad4byte+0x6e>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pad4byte>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %edi,%ebp
mov    %rsi,%rdi
call   1040 <ftell@plt>
lea    0x3(%rax),%ecx
test   %eax,%eax
cmovns %eax,%ecx
and    $0xfffffffc,%ecx
sub    %ecx,%eax
je     1162 <pad4byte+0x42>
movsbl %bpl,%ebp
mov    $0x5,%ebx
sub    %eax,%ebx
nopl   0x0(%rax,%rax,1)
mov    %ebp,%edi
mov    %r14,%rsi
call   1030 <fputc@plt>
add    $0xffffffff,%ebx
cmp    $0x1,%ebx
ja     1150 <pad4byte+0x30>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @pad4byte(i8 signext %0, i32* %1) {
%3 = alloca i8
%4 = alloca i32*
%5 = alloca i32
store i8 %0, i8* %3
store i32* %1, i32** %4
%6 = load i32*, i32** %4
%7 = call i32 @ftell(i32* %6)
%8 = srem i32 %7, 4
%9 = sub nsw i32 4, %8
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = icmp ne i32 %10, 4
br i1 %11, label %12, label %21
12: ; preds = %2
br label %13
13: ; preds = %17, %12
%14 = load i32, i32* %5
%15 = add nsw i32 %14, -1
store i32 %15, i32* %5
%16 = icmp sgt i32 %14, 0
br i1 %16, label %17, label %20
17: ; preds = %13
%18 = load i32*, i32** %4
%19 = call i32 @fwrite(i8* %3, i32 1, i32 1, i32* %18)
br label %13
20: ; preds = %13
br label %21
21: ; preds = %20, %2
ret void
}

LLVM IR (-O2):
define void @pad4byte(i8 signext %0, i32* nocapture %1) {
%3 = tail call i32 @ftell(i32* %1)
%4 = srem i32 %3, 4
%5 = icmp eq i32 %4, 0
br i1 %5, label %14, label %6
6: ; preds = %2
%7 = sub nsw i32 4, %4
%8 = sext i8 %0 to i32
br label %9
9: ; preds = %6, %9
%10 = phi i32 [ %7, %6 ], [ %11, %9 ]
%11 = add nsw i32 %10, -1
%12 = tail call i32 @fputc(i32 %8, i32* %1)
%13 = icmp ugt i32 %10, 1
br i1 %13, label %9, label %14
14: ; preds = %9, %2
ret void
}