xunge/DecIR huggingface dataset:
int mapToPolarity(int gene, int num_genes) {
  if (gene > num_genes)
    gene -= (2 * num_genes + 1);
  return (gene);
}


x86 assembly (clang, -O0):
<mapToPolarity>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1127 <mapToPolarity+0x27>
mov    -0x8(%rbp),%ecx
shl    $0x1,%ecx
add    $0x1,%ecx
mov    -0x4(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mapToPolarity>:
lea    (%rsi,%rsi,1),%eax
xor    %ecx,%ecx
cmp    %esi,%edi
not    %eax
cmovle %ecx,%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @mapToPolarity(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i32, i32* %4
%10 = mul nsw i32 2, %9
%11 = add nsw i32 %10, 1
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, %11
store i32 %13, i32* %3
br label %14
14: ; preds = %8, %2
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @mapToPolarity(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = shl nsw i32 %1, 1
%5 = xor i32 %4, -1
%6 = select i1 %3, i32 %5, i32 0
%7 = add i32 %6, %0
ret i32 %7
}
/* Variables and functions */
int facb(int);
int faca(int z) {
  int r;
  if (z <= 0) {
    r = 1;
  } else {
    r = facb(z - 1);
    r = z * r;
  }
  return r;
}


x86 assembly (clang, -O0):
<faca>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jg     1131 <faca+0x21>
movl   $0x1,-0x8(%rbp)
jmp    1149 <faca+0x39>
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1030 <facb@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<faca>:
test   %edi,%edi
jle    1124 <faca+0x14>
push   %rbx
mov    %edi,%ebx
lea    -0x1(%rbx),%edi
call   1030 <facb@plt>
imul   %ebx,%eax
pop    %rbx
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @faca(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp sle i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %3
br label %14
7: ; preds = %1
%8 = load i32, i32* %2
%9 = sub nsw i32 %8, 1
%10 = call i32 @facb(i32 %9)
store i32 %10, i32* %3
%11 = load i32, i32* %2
%12 = load i32, i32* %3
%13 = mul nsw i32 %11, %12
store i32 %13, i32* %3
br label %14
14: ; preds = %7, %6
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @faca(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = add nsw i32 %0, -1
%5 = tail call i32 @facb(i32 %4)
%6 = mul nsw i32 %5, %0
br label %7
7: ; preds = %1, %3
%8 = phi i32 [ %6, %3 ], [ 1, %1 ]
ret i32 %8
}
void xmkdirall(char *p) {
  char *q;
  if (isdir(p))
    return;
  q = strrchr(p, '/');
  if (q != ((void *)0)) {
    *q = '\0';
    xmkdirall(p);
    *q = '/';
  }
  xmkdir(p);
}


x86 assembly (clang, -O0):
<xmkdirall>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1050 <isdir@plt>
cmp    $0x0,%eax
je     1165 <xmkdirall+0x25>
jmp    11a4 <xmkdirall+0x64>
mov    -0x8(%rbp),%rdi
mov    $0x2f,%esi
call   1040 <strrchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1199 <xmkdirall+0x59>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rdi
call   1030 <xmkdirall@plt>
mov    -0x10(%rbp),%rax
movb   $0x2f,(%rax)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1060 <xmkdir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmkdirall>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %eax,%eax
call   1050 <isdir@plt>
test   %eax,%eax
je     115a <xmkdirall+0x1a>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
mov    %rbx,%rdi
mov    $0x2f,%esi
call   1040 <strrchr@plt>
test   %rax,%rax
je     117e <xmkdirall+0x3e>
mov    %rax,%r14
movb   $0x0,(%rax)
mov    %rbx,%rdi
call   1030 <xmkdirall@plt>
movb   $0x2f,(%r14)
mov    %rbx,%rdi
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1060 <xmkdir@plt>

LLVM IR (-O0):
define void @xmkdirall(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) bitcast (i32 (...)* @isdir to i32 (i8*, ...)*)(i8* %4)
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
br label %20
8: ; preds = %1
%9 = load i8*, i8** %2
%10 = call i8* @strrchr(i8* %9, i32 47)
store i8* %10, i8** %3
%11 = load i8*, i8** %3
%12 = icmp ne i8* %11, null
br i1 %12, label %13, label %17
13: ; preds = %8
%14 = load i8*, i8** %3
store i8 0, i8* %14
%15 = load i8*, i8** %2
%16 = load i8*, i8** %3
store i8 47, i8* %16
br label %17
17: ; preds = %13, %8
%18 = load i8*, i8** %2
%19 = call i32 (i8*, ...) bitcast (i32 (...)* @xmkdir to i32 (i8*, ...)*)(i8* %18)
br label %20
20: ; preds = %17, %7
ret void
}

LLVM IR (-O2):
define void @xmkdirall(i8* %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @isdir to i32 (i8*, ...)*)(i8* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %10
4: ; preds = %1
%5 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i32 47)
%6 = icmp eq i8* %5, null
br i1 %6, label %8, label %7
7: ; preds = %4
store i8 0, i8* %5
tail call void @xmkdirall(i8* %0)
store i8 47, i8* %5
br label %8
8: ; preds = %7, %4
%9 = tail call i32 (i8*, ...) bitcast (i32 (...)* @xmkdir to i32 (i8*, ...)*)(i8* %0)
br label %10
10: ; preds = %1, %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ errno;
char *strerror(int /*<<< orphan*/);
int /*<<< orphan*/ tell(char *);
void report(char *label) {
  char *err = strerror(errno);
  tell("rmdir: ");
  tell(label);
  tell(": ");
  tell(err);
  tell("\n");
}


x86 assembly (clang, -O0):
<report>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
call   1040 <strerror@plt>
mov    %rax,-0x10(%rbp)
lea    0xebb(%rip),%rdi
call   1030 <tell@plt>
mov    -0x8(%rbp),%rdi
call   1030 <tell@plt>
lea    0xeab(%rip),%rdi
call   1030 <tell@plt>
mov    -0x10(%rbp),%rdi
call   1030 <tell@plt>
lea    0xe99(%rip),%rdi
call   1030 <tell@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<report>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2eb2(%rip),%rax
mov    (%rax),%edi
call   1040 <strerror@plt>
mov    %rax,%r14
lea    0xec1(%rip),%rdi
call   1030 <tell@plt>
mov    %rbx,%rdi
call   1030 <tell@plt>
lea    0xeb2(%rip),%rdi
call   1030 <tell@plt>
mov    %r14,%rdi
call   1030 <tell@plt>
lea    0xea1(%rip),%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <tell@plt>

LLVM IR (-O0):
@errno = global i32 0
@.str = [8 x i8] c"rmdir: \00"
@.str.1 = [3 x i8] c": \00"
@.str.2 = [2 x i8] c"\0A\00"
define void @report(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i32, i32* @errno
%5 = call i8* @strerror(i32 %4)
store i8* %5, i8** %3
%6 = call i32 @tell(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%7 = load i8*, i8** %2
%8 = call i32 @tell(i8* %7)
%9 = call i32 @tell(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%10 = load i8*, i8** %3
%11 = call i32 @tell(i8* %10)
%12 = call i32 @tell(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@errno = global i32 0
@.str = [8 x i8] c"rmdir: \00"
@.str.1 = [3 x i8] c": \00"
@.str.2 = [2 x i8] c"\0A\00"
define void @report(i8* %0) {
%2 = load i32, i32* @errno
%3 = tail call i8* @strerror(i32 %2)
%4 = tail call i32 @tell(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 @tell(i8* %0)
%6 = tail call i32 @tell(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%7 = tail call i32 @tell(i8* %3)
%8 = tail call i32 @tell(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("root users\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"root users\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [11 x i8] c"root users\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int f(int x, int y) { return 3; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 3
}

LLVM IR (-O2):
define i32 @f(i32 %0, i32 %1) {
ret i32 3
}
/* Variables and functions */
int bma250_read_reg_byte(int);
int /*<<< orphan*/ bma250_write_reg_byte(int, int);
int bma250_power_down(void) {
  bma250_write_reg_byte(0x17,
                        ((bma250_read_reg_byte(0x17) & ~0x10) | ((0) << 4)));
  bma250_write_reg_byte(0x11,
                        ((bma250_read_reg_byte(0x11) & ~0xc0) | ((2) << 6)));
  return (0);
}


x86 assembly (clang, -O0):
<bma250_power_down>:
push   %rbp
mov    %rsp,%rbp
mov    $0x17,%edi
call   1040 <bma250_read_reg_byte@plt>
mov    %eax,%esi
and    $0xffffffef,%esi
or     $0x0,%esi
mov    $0x17,%edi
call   1030 <bma250_write_reg_byte@plt>
mov    $0x11,%edi
call   1040 <bma250_read_reg_byte@plt>
mov    %eax,%esi
and    $0xffffff3f,%esi
or     $0x80,%esi
mov    $0x11,%edi
call   1030 <bma250_write_reg_byte@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bma250_power_down>:
push   %rax
mov    $0x17,%edi
call   1040 <bma250_read_reg_byte@plt>
and    $0xffffffef,%eax
mov    $0x17,%edi
mov    %eax,%esi
call   1030 <bma250_write_reg_byte@plt>
mov    $0x11,%edi
call   1040 <bma250_read_reg_byte@plt>
and    $0xffffff3f,%eax
lea    0x80(%rax),%esi
mov    $0x11,%edi
call   1030 <bma250_write_reg_byte@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @bma250_power_down() {
%1 = call i32 @bma250_read_reg_byte(i32 23)
%2 = and i32 %1, -17
%3 = or i32 %2, 0
%4 = call i32 @bma250_write_reg_byte(i32 23, i32 %3)
%5 = call i32 @bma250_read_reg_byte(i32 17)
%6 = and i32 %5, -193
%7 = or i32 %6, 128
%8 = call i32 @bma250_write_reg_byte(i32 17, i32 %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @bma250_power_down() {
%1 = tail call i32 @bma250_read_reg_byte(i32 23)
%2 = and i32 %1, -17
%3 = tail call i32 @bma250_write_reg_byte(i32 23, i32 %2)
%4 = tail call i32 @bma250_read_reg_byte(i32 17)
%5 = and i32 %4, -193
%6 = or i32 %5, 128
%7 = tail call i32 @bma250_write_reg_byte(i32 17, i32 %6)
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int x;
};
typedef TYPE_1__ XReparentEvent;

/* Variables and functions */
void set_XReparentEvent_x(void *_p, int _v) {
  ((XReparentEvent *)_p)->x = (int)_v;
}


x86 assembly (clang, -O0):
<set_XReparentEvent_x>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XReparentEvent_x>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XReparentEvent_x(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XReparentEvent_x(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
int right(int i) { return 2 * i + 2; }


x86 assembly (clang, -O0):
<right>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
add    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<right>:
lea    (%rdi,%rdi,1),%eax
add    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @right(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 2, %3
%5 = add nsw i32 %4, 2
ret i32 %5
}

LLVM IR (-O2):
define i32 @right(i32 %0) {
%2 = shl nsw i32 %0, 1
%3 = add nsw i32 %2, 2
ret i32 %3
}
void DestroyBrowseLock() {}


x86 assembly (clang, -O0):
<DestroyBrowseLock>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DestroyBrowseLock>:
ret

LLVM IR (-O0):
define void @DestroyBrowseLock() {
ret void
}

LLVM IR (-O2):
define void @DestroyBrowseLock() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ExtAccumulator(int);
void AND(void) { ExtAccumulator(4); }


x86 assembly (clang, -O0):
<AND>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
call   1030 <ExtAccumulator@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AND>:
mov    $0x4,%edi
jmp    1030 <ExtAccumulator@plt>

LLVM IR (-O0):
define void @AND() {
%1 = call i32 @ExtAccumulator(i32 4)
ret void
}

LLVM IR (-O2):
define void @AND() {
%1 = tail call i32 @ExtAccumulator(i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void function1(void) { printf("libtest1: I am weak function1!\n"); }


x86 assembly (clang, -O0):
<function1>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<function1>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"libtest1: I am weak function1!\0A\00"
define void @function1() {
%1 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [31 x i8] c"libtest1: I am weak function1!\00"
define void @function1() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int send_messages();
int main() { return send_messages(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <send_messages@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <send_messages@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @send_messages()
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @send_messages()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void butterlpf_note_free(void *data) { free(data); }


x86 assembly (clang, -O0):
<butterlpf_note_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<butterlpf_note_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @butterlpf_note_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @butterlpf_note_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ callee();
int main() {
  int w, x, y, z;
  int a[10], b[10];
  w = 0;
  x = 1;
  y = 2;
  z = 3;
  w = w + 2;
  x = x + 3;
  y = y + 4;
  z = z + 5;
  callee();
  callee();
  a[5] = a[3] - a[4];
  callee();
  callee();
  y = w + z;
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
movl   $0x2,-0x10(%rbp)
movl   $0x3,-0x14(%rbp)
mov    -0x8(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x3,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x4,%eax
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x5,%eax
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1030 <callee@plt>
mov    $0x0,%al
call   1030 <callee@plt>
mov    -0x34(%rbp),%eax
sub    -0x30(%rbp),%eax
mov    %eax,-0x2c(%rbp)
mov    $0x0,%al
call   1030 <callee@plt>
mov    $0x0,%al
call   1030 <callee@plt>
mov    -0x8(%rbp),%eax
add    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <callee@plt>
xor    %eax,%eax
call   1030 <callee@plt>
xor    %eax,%eax
call   1030 <callee@plt>
xor    %eax,%eax
call   1030 <callee@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca [10 x i32]
%7 = alloca [10 x i32]
store i32 0, i32* %1
store i32 0, i32* %2
store i32 1, i32* %3
store i32 2, i32* %4
store i32 3, i32* %5
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 2
store i32 %9, i32* %2
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 3
store i32 %11, i32* %3
%12 = load i32, i32* %4
%13 = add nsw i32 %12, 4
store i32 %13, i32* %4
%14 = load i32, i32* %5
%15 = add nsw i32 %14, 5
store i32 %15, i32* %5
%16 = call i32 (...) @callee()
%17 = call i32 (...) @callee()
%18 = getelementptr inbounds [10 x i32], [10 x i32]* %6, i64 0, i64 3
%19 = load i32, i32* %18
%20 = getelementptr inbounds [10 x i32], [10 x i32]* %6, i64 0, i64 4
%21 = load i32, i32* %20
%22 = sub nsw i32 %19, %21
%23 = getelementptr inbounds [10 x i32], [10 x i32]* %6, i64 0, i64 5
store i32 %22, i32* %23
%24 = call i32 (...) @callee()
%25 = call i32 (...) @callee()
%26 = load i32, i32* %2
%27 = load i32, i32* %5
%28 = add nsw i32 %26, %27
store i32 %28, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @callee()
%2 = tail call i32 (...) @callee()
%3 = tail call i32 (...) @callee()
%4 = tail call i32 (...) @callee()
ret i32 0
}
/* Type definitions */
struct device {
  int dummy;
};

/* Variables and functions */
unsigned char read_reg8(struct device *, int);
int wait_drq(struct device *dev) {
  unsigned char st;
  do {
    st = read_reg8(dev, 518);
  } while (!(st & ((1 << 3) | (1 << 0))));
  return st & (1 << 0) ? -1 : 0;
}


x86 assembly (clang, -O0):
<wait_drq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x206,%esi
call   1030 <read_reg8@plt>
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
and    $0x9,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    111c <wait_drq+0xc>
movzbl -0x9(%rbp),%edx
and    $0x1,%edx
xor    %eax,%eax
mov    $0xffffffff,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait_drq>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rbx,%rdi
mov    $0x206,%esi
call   1030 <read_reg8@plt>
test   $0x9,%al
je     1120 <wait_drq+0x10>
movzbl %al,%eax
and    $0x1,%eax
neg    %eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.device = type { i32 }
define i32 @wait_drq(%struct.device* %0) {
%2 = alloca %struct.device*
%3 = alloca i8
store %struct.device* %0, %struct.device** %2
br label %4
4: ; preds = %7, %1
%5 = load %struct.device*, %struct.device** %2
%6 = call zeroext i8 @read_reg8(%struct.device* %5, i32 518)
store i8 %6, i8* %3
br label %7
7: ; preds = %4
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = and i32 %9, 9
%11 = icmp ne i32 %10, 0
%12 = xor i1 %11, true
br i1 %12, label %4, label %13
13: ; preds = %7
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = and i32 %15, 1
%17 = icmp ne i32 %16, 0
%18 = zext i1 %17 to i64
%19 = select i1 %17, i32 -1, i32 0
ret i32 %19
}

LLVM IR (-O2):
%struct.device = type { i32 }
define i32 @wait_drq(%struct.device* %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call zeroext i8 @read_reg8(%struct.device* %0, i32 518)
%4 = zext i8 %3 to i32
%5 = and i32 %4, 9
%6 = icmp eq i32 %5, 0
br i1 %6, label %2, label %7
7: ; preds = %2
%8 = and i32 %4, 1
%9 = sub nsw i32 0, %8
ret i32 %9
}
/* Type definitions */
struct section_list_link {
  int dummy;
};
struct section {
  int dummy;
};
struct genlist_link {
  int dummy;
};

/* Variables and functions */
scalar_t__ genlist_link_data(struct genlist_link const *);
struct section *section_list_link_data(const struct section_list_link *plink) {
  return (
      (struct section *)genlist_link_data((const struct genlist_link *)plink));
}


x86 assembly (clang, -O0):
<section_list_link_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <genlist_link_data@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<section_list_link_data>:
jmp    1030 <genlist_link_data@plt>

LLVM IR (-O0):
%struct.section = type { i32 }
%struct.section_list_link = type { i32 }
%struct.genlist_link = type { i32 }
define %struct.section* @section_list_link_data(%struct.section_list_link* %0) {
%2 = alloca %struct.section_list_link*
store %struct.section_list_link* %0, %struct.section_list_link** %2
%3 = load %struct.section_list_link*, %struct.section_list_link** %2
%4 = bitcast %struct.section_list_link* %3 to %struct.genlist_link*
%5 = call i64 @genlist_link_data(%struct.genlist_link* %4)
%6 = inttoptr i64 %5 to %struct.section*
ret %struct.section* %6
}

LLVM IR (-O2):
%struct.section = type { i32 }
%struct.section_list_link = type { i32 }
%struct.genlist_link = type { i32 }
define %struct.section* @section_list_link_data(%struct.section_list_link* %0) {
%2 = bitcast %struct.section_list_link* %0 to %struct.genlist_link*
%3 = tail call i64 @genlist_link_data(%struct.genlist_link* %2)
%4 = inttoptr i64 %3 to %struct.section*
ret %struct.section* %4
}
/* Variables and functions */
int /*<<< orphan*/ print(char *);
int /*<<< orphan*/ printid(int);
int main() {
  int c;
  float mm[2] = {1, 2};
  c = mm[1] < mm[0];
  print("c 0");
  printid(c);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
movss  -0xc(%rbp),%xmm1
movss  -0x10(%rbp),%xmm0
ucomiss %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
lea    0xeaf(%rip),%rdi
call   1030 <print@plt>
mov    -0x8(%rbp),%edi
call   1040 <printid@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <print@plt>
xor    %edi,%edi
call   1040 <printid@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.main.mm = [2 x float] [float 1.000000e+00, float 2.000000e+00]
@.str = [4 x i8] c"c 0\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [2 x float]
store i32 0, i32* %1
%4 = bitcast [2 x float]* %3 to i8*
%5 = getelementptr inbounds [2 x float], [2 x float]* %3, i64 0, i64 1
%6 = load float, float* %5
%7 = getelementptr inbounds [2 x float], [2 x float]* %3, i64 0, i64 0
%8 = load float, float* %7
%9 = fcmp olt float %6, %8
%10 = zext i1 %9 to i32
store i32 %10, i32* %2
%11 = call i32 @print(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%12 = load i32, i32* %2
%13 = call i32 @printid(i32 %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"c 0\00"
define i32 @main() {
%1 = tail call i32 @print(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printid(i32 0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ _clear_error_stack();
int /*<<< orphan*/ _set_dbg_level(unsigned int);
void set_dbg_level(unsigned int level) {
  { _clear_error_stack(); };
  _set_dbg_level(level);
}


x86 assembly (clang, -O0):
<set_dbg_level>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <_clear_error_stack@plt>
mov    -0x4(%rbp),%edi
call   1040 <_set_dbg_level@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_dbg_level>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <_clear_error_stack@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <_set_dbg_level@plt>

LLVM IR (-O0):
define void @set_dbg_level(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @_clear_error_stack()
%4 = load i32, i32* %2
%5 = call i32 @_set_dbg_level(i32 %4)
ret void
}

LLVM IR (-O2):
define void @set_dbg_level(i32 %0) {
%2 = tail call i32 (...) @_clear_error_stack()
%3 = tail call i32 @_set_dbg_level(i32 %0)
ret void
}
void glFrustumx(void) { return; }


x86 assembly (clang, -O0):
<glFrustumx>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glFrustumx>:
ret

LLVM IR (-O0):
define void @glFrustumx() {
ret void
}

LLVM IR (-O2):
define void @glFrustumx() {
ret void
}
/* Type definitions */
struct sk_buff_head {
  int dummy;
};
struct sk_buff {
  int dummy;
};

/* Variables and functions */
struct sk_buff *__skb_dequeue(struct sk_buff_head *);
int /*<<< orphan*/ kfree_skb(struct sk_buff *);
void __skb_queue_purge(struct sk_buff_head *list) {
  struct sk_buff *skb;
  while ((skb = __skb_dequeue(list)) != NULL)
    kfree_skb(skb);
}


x86 assembly (clang, -O0):
<__skb_queue_purge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <__skb_dequeue@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
je     1151 <__skb_queue_purge+0x31>
mov    -0x10(%rbp),%rdi
call   1030 <kfree_skb@plt>
jmp    112c <__skb_queue_purge+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__skb_queue_purge>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
call   1040 <__skb_dequeue@plt>
test   %rax,%rax
je     1147 <__skb_queue_purge+0x27>
mov    %rax,%rdi
call   1030 <kfree_skb@plt>
mov    %rbx,%rdi
jmp    1130 <__skb_queue_purge+0x10>
pop    %rbx
ret

LLVM IR (-O0):
%struct.sk_buff_head = type { i32 }
%struct.sk_buff = type { i32 }
define void @__skb_queue_purge(%struct.sk_buff_head* %0) {
%2 = alloca %struct.sk_buff_head*
%3 = alloca %struct.sk_buff*
store %struct.sk_buff_head* %0, %struct.sk_buff_head** %2
br label %4
4: ; preds = %8, %1
%5 = load %struct.sk_buff_head*, %struct.sk_buff_head** %2
%6 = call %struct.sk_buff* @__skb_dequeue(%struct.sk_buff_head* %5)
store %struct.sk_buff* %6, %struct.sk_buff** %3
%7 = icmp ne %struct.sk_buff* %6, null
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load %struct.sk_buff*, %struct.sk_buff** %3
%10 = call i32 @kfree_skb(%struct.sk_buff* %9)
br label %4
11: ; preds = %4
ret void
}

LLVM IR (-O2):
%struct.sk_buff_head = type { i32 }
%struct.sk_buff = type { i32 }
define void @__skb_queue_purge(%struct.sk_buff_head* %0) {
%2 = tail call %struct.sk_buff* @__skb_dequeue(%struct.sk_buff_head* %0)
%3 = icmp eq %struct.sk_buff* %2, null
br i1 %3, label %9, label %4
4: ; preds = %1, %4
%5 = phi %struct.sk_buff* [ %7, %4 ], [ %2, %1 ]
%6 = tail call i32 @kfree_skb(%struct.sk_buff* %5)
%7 = tail call %struct.sk_buff* @__skb_dequeue(%struct.sk_buff_head* %0)
%8 = icmp eq %struct.sk_buff* %7, null
br i1 %8, label %9, label %4
9: ; preds = %4, %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ internal_fiat_p384_mul(uintptr_t, uintptr_t, uintptr_t);
void fiat_p384_mul(uint64_t out1[6], const uint64_t arg1[6],
                   const uint64_t arg2[6]) {
  internal_fiat_p384_mul((uintptr_t)out1, (uintptr_t)arg1, (uintptr_t)arg2);
}


x86 assembly (clang, -O0):
<fiat_p384_mul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <internal_fiat_p384_mul@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiat_p384_mul>:
jmp    1030 <internal_fiat_p384_mul@plt>

LLVM IR (-O0):
define void @fiat_p384_mul(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = ptrtoint i32* %7 to i64
%9 = load i32*, i32** %5
%10 = ptrtoint i32* %9 to i64
%11 = load i32*, i32** %6
%12 = ptrtoint i32* %11 to i64
%13 = call i32 @internal_fiat_p384_mul(i64 %8, i64 %10, i64 %12)
ret void
}

LLVM IR (-O2):
define void @fiat_p384_mul(i32* %0, i32* %1, i32* %2) {
%4 = ptrtoint i32* %0 to i64
%5 = ptrtoint i32* %1 to i64
%6 = ptrtoint i32* %2 to i64
%7 = tail call i32 @internal_fiat_p384_mul(i64 %4, i64 %5, i64 %6)
ret void
}
void doTests() {}


x86 assembly (clang, -O0):
<doTests>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<doTests>:
ret

LLVM IR (-O0):
define void @doTests() {
ret void
}

LLVM IR (-O2):
define void @doTests() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ emit(char *);
void emit_char(char c) {
  char buf[2] = {0};
  buf[0] = c;
  emit(buf);
}


x86 assembly (clang, -O0):
<emit_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
lea    -0x3(%rbp),%rdi
xor    %esi,%esi
mov    $0x2,%edx
call   1030 <memset@plt>
mov    -0x1(%rbp),%al
mov    %al,-0x3(%rbp)
lea    -0x3(%rbp),%rdi
call   1040 <emit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_char>:
push   %rax
movw   $0x0,0x6(%rsp)
mov    %dil,0x6(%rsp)
lea    0x6(%rsp),%rdi
call   1030 <emit@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @emit_char(i8 signext %0) {
%2 = alloca i8
%3 = alloca [2 x i8]
store i8 %0, i8* %2
%4 = bitcast [2 x i8]* %3 to i8*
%5 = load i8, i8* %2
%6 = getelementptr inbounds [2 x i8], [2 x i8]* %3, i64 0, i64 0
store i8 %5, i8* %6
%7 = getelementptr inbounds [2 x i8], [2 x i8]* %3, i64 0, i64 0
%8 = call i32 @emit(i8* %7)
ret void
}

LLVM IR (-O2):
define void @emit_char(i8 signext %0) {
%2 = alloca i16
%3 = bitcast i16* %2 to i8*
store i16 0, i16* %2
store i8 %0, i8* %3
%4 = call i32 @emit(i8* %3)
ret void
}
/* Variables and functions */
float atanhf(float);
void __hv_atanh_f(float bIn, float *bOut) { *bOut = atanhf(bIn); }


x86 assembly (clang, -O0):
<__hv_atanh_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <atanhf@plt>
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__hv_atanh_f>:
push   %rbx
mov    %rdi,%rbx
call   1030 <atanhf@plt>
movss  %xmm0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @__hv_atanh_f(float %0, float* %1) {
%3 = alloca float
%4 = alloca float*
store float %0, float* %3
store float* %1, float** %4
%5 = load float, float* %3
%6 = call float @atanhf(float %5)
%7 = load float*, float** %4
store float %6, float* %7
ret void
}

LLVM IR (-O2):
define void @__hv_atanh_f(float %0, float* nocapture writeonly %1) {
%3 = tail call float @atanhf(float %0)
store float %3, float* %1
ret void
}
int main() {
  char ***a;
  char **b;
  char c = 'c';
  a = &c;
  b = a;
  printf("%c\n", *b);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movb   $0x63,-0x11(%rbp)
lea    -0x11(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xec6(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movb   $0x63,(%rsp)
mov    (%rsp),%rsi
lea    0xee0(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%c\0A\00"
define i32 @main() {
%1 = alloca i8***
%2 = alloca i8**
%3 = alloca i8
store i8 99, i8* %3
%4 = bitcast i8* %3 to i8***
store i8*** %4, i8**** %1
%5 = load i8***, i8**** %1
%6 = bitcast i8*** %5 to i8**
store i8** %6, i8*** %2
%7 = load i8**, i8*** %2
%8 = load i8*, i8** %7
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%c\0A\00"
define i32 @main() {
%1 = alloca i8
store i8 99, i8* %1
%2 = bitcast i8* %1 to i8**
%3 = load i8*, i8** %2
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 0
}
/* Type definitions */
struct timeval {
  int tv_sec;
  int tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ select(int /*<<< orphan*/, int /*<<< orphan*/ *,
                          int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                          struct timeval *);
int main() {
  struct timeval tv;
  tv.tv_sec = 1;
  tv.tv_usec = 100000;
  select(0, NULL, NULL, NULL, &tv);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x10(%rbp)
movl   $0x186a0,-0xc(%rbp)
xor    %edi,%edi
xor    %eax,%eax
mov    %eax,%ecx
lea    -0x10(%rbp),%r8
mov    %rcx,%rsi
mov    %rcx,%rdx
call   1030 <select@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movabs $0x186a000000001,%rax
mov    %rax,(%rsp)
mov    %rsp,%r8
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
call   1030 <select@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.timeval
store i32 0, i32* %1
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i32 0, i32 0
store i32 1, i32* %3
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i32 0, i32 1
store i32 100000, i32* %4
%5 = call i32 @select(i32 0, i32* null, i32* null, i32* null, %struct.timeval* %2)
ret i32 0
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define i32 @main() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
store i32 1, i32* %3
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
store i32 100000, i32* %4
%5 = call i32 @select(i32 0, i32* null, i32* null, i32* null, %struct.timeval* %1)
ret i32 0
}
/* Variables and functions */
int rand();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int /*<<< orphan*/ usleep(int);
void my_sleep() {
  srand(time(NULL));
  int random = (500 + (rand() % 2000)) * 1000;
  usleep(random);
}


x86 assembly (clang, -O0):
<my_sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
mov    $0x0,%al
call   1050 <rand@plt>
mov    $0x7d0,%ecx
cltd
idiv   %ecx
add    $0x1f4,%edx
imul   $0x3e8,%edx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1060 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_sleep>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
xor    %eax,%eax
call   1050 <rand@plt>
cltq
imul   $0x10624dd3,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x27,%rcx
add    %edx,%ecx
imul   $0x7d0,%ecx,%ecx
sub    %ecx,%eax
imul   $0x3e8,%eax,%edi
add    $0x7a120,%edi
pop    %rax
jmp    1060 <usleep@plt>

LLVM IR (-O0):
define void @my_sleep() {
%1 = alloca i32
%2 = call i32 @time(i32* null)
%3 = call i32 @srand(i32 %2)
%4 = call i32 (...) @rand()
%5 = srem i32 %4, 2000
%6 = add nsw i32 500, %5
%7 = mul nsw i32 %6, 1000
store i32 %7, i32* %1
%8 = load i32, i32* %1
%9 = call i32 @usleep(i32 %8)
ret void
}

LLVM IR (-O2):
define void @my_sleep() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 @srand(i32 %1)
%3 = tail call i32 (...) @rand()
%4 = srem i32 %3, 2000
%5 = mul nsw i32 %4, 1000
%6 = add nsw i32 %5, 500000
%7 = tail call i32 @usleep(i32 %6)
ret void
}
unsigned int _check_times(unsigned x, unsigned y) {
  unsigned long long whole_ans =
      ((unsigned long long)x) * ((unsigned long long)y);
  unsigned word_ans = (unsigned)whole_ans;
  if (word_ans < whole_ans || word_ans > (1 << 28))
    (_throw_badalloc_fn("/scratch/repos/new/home/jordi_armengol_estape/"
                        "c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/"
                        "cyclone/refs/heads/master/bin/genfiles/arg.c",
                        284));
  return word_ans;
}


x86 assembly (clang, -O0):
<_check_times>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%rax
jb     114d <_check_times+0x3d>
cmpl   $0x10000000,-0x14(%rbp)
jbe    1160 <_check_times+0x50>
lea    0xeac(%rip),%rdi
mov    $0x11c,%esi
mov    $0x0,%al
call   1030 <_throw_badalloc_fn@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_check_times>:
push   %rbx
mov    %edi,%eax
mul    %esi
mov    %eax,%ebx
jo     1121 <_check_times+0x11>
cmp    $0x10000001,%ebx
jb     1134 <_check_times+0x24>
lea    0xed8(%rip),%rdi
mov    $0x11c,%esi
xor    %eax,%eax
call   1030 <_throw_badalloc_fn@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [144 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/arg.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = zext i32 %7 to i64
%9 = load i32, i32* %4
%10 = zext i32 %9 to i64
%11 = mul i64 %8, %10
store i64 %11, i64* %5
%12 = load i64, i64* %5
%13 = trunc i64 %12 to i32
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = zext i32 %14 to i64
%16 = load i64, i64* %5
%17 = icmp ult i64 %15, %16
br i1 %17, label %21, label %18
18: ; preds = %2
%19 = load i32, i32* %6
%20 = icmp ugt i32 %19, 268435456
br i1 %20, label %21, label %23
21: ; preds = %18, %2
%22 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([144 x i8], [144 x i8]* @.str, i64 0, i64 0), i32 284)
br label %23
23: ; preds = %21, %18
%24 = load i32, i32* %6
ret i32 %24
}

LLVM IR (-O2):
@.str = [144 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/arg.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %0, i32 %1)
%4 = extractvalue { i32, i1 } %3, 0
%5 = extractvalue { i32, i1 } %3, 1
%6 = icmp ugt i32 %4, 268435456
%7 = or i1 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([144 x i8], [144 x i8]* @.str, i64 0, i64 0), i32 284)
br label %10
10: ; preds = %2, %8
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("     sdf      ");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c" sdf \00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c" sdf \00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
void deBayerV(uint8_t *in, uint8_t *out) {}


x86 assembly (clang, -O0):
<deBayerV>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<deBayerV>:
ret

LLVM IR (-O0):
define void @deBayerV(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
ret void
}

LLVM IR (-O2):
define void @deBayerV(i32* nocapture %0, i32* nocapture %1) {
ret void
}
void PSS_IRQHandler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<PSS_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <PSS_IRQHandler+0x9>
jmp    1109 <PSS_IRQHandler+0x9>

x86 assembly (clang, -O2):
<PSS_IRQHandler>:
jmp    1100 <PSS_IRQHandler>

LLVM IR (-O0):
define void @PSS_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @PSS_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}
void ktsan_irq_disable(void) {}


x86 assembly (clang, -O0):
<ktsan_irq_disable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ktsan_irq_disable>:
ret

LLVM IR (-O0):
define void @ktsan_irq_disable() {
ret void
}

LLVM IR (-O2):
define void @ktsan_irq_disable() {
ret void
}
void gtk_text_view_set_left_margin() {}


x86 assembly (clang, -O0):
<gtk_text_view_set_left_margin>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_view_set_left_margin>:
ret

LLVM IR (-O0):
define void @gtk_text_view_set_left_margin() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_view_set_left_margin() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
size_t maxColumnWidth(FILE *fp) {
  size_t maxcols = ((size_t)79);
  return maxcols;
}


x86 assembly (clang, -O0):
<maxColumnWidth>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x4f,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<maxColumnWidth>:
mov    $0x4f,%eax
ret

LLVM IR (-O0):
define i64 @maxColumnWidth(i32* %0) {
%2 = alloca i32*
%3 = alloca i64
store i32* %0, i32** %2
store i64 79, i64* %3
%4 = load i64, i64* %3
ret i64 %4
}

LLVM IR (-O2):
define i64 @maxColumnWidth(i32* nocapture readnone %0) {
ret i64 79
}
/* Type definitions */
struct memorycontainer {
  int dummy;
};

/* Variables and functions */
struct memorycontainer *createExpression(int, struct memorycontainer *,
                                         struct memorycontainer *);
struct memorycontainer *
createDivExpression(struct memorycontainer *expression1,
                    struct memorycontainer *expression2) {
  return createExpression(0x000E, expression1, expression2);
}


x86 assembly (clang, -O0):
<createDivExpression>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0xe,%edi
call   1030 <createExpression@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<createDivExpression>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0xe,%edi
jmp    1030 <createExpression@plt>

LLVM IR (-O0):
%struct.memorycontainer = type { i32 }
define %struct.memorycontainer* @createDivExpression(%struct.memorycontainer* %0, %struct.memorycontainer* %1) {
%3 = alloca %struct.memorycontainer*
%4 = alloca %struct.memorycontainer*
store %struct.memorycontainer* %0, %struct.memorycontainer** %3
store %struct.memorycontainer* %1, %struct.memorycontainer** %4
%5 = load %struct.memorycontainer*, %struct.memorycontainer** %3
%6 = load %struct.memorycontainer*, %struct.memorycontainer** %4
%7 = call %struct.memorycontainer* @createExpression(i32 14, %struct.memorycontainer* %5, %struct.memorycontainer* %6)
ret %struct.memorycontainer* %7
}

LLVM IR (-O2):
%struct.memorycontainer = type { i32 }
define %struct.memorycontainer* @createDivExpression(%struct.memorycontainer* %0, %struct.memorycontainer* %1) {
%3 = tail call %struct.memorycontainer* @createExpression(i32 14, %struct.memorycontainer* %0, %struct.memorycontainer* %1)
ret %struct.memorycontainer* %3
}
/* Variables and functions */
int is_aligned(unsigned long, unsigned int);
int ptr_is_aligned(const void *ptr, unsigned powof2) {
  unsigned long addr = (unsigned long)ptr;
  return is_aligned(addr, powof2);
}


x86 assembly (clang, -O0):
<ptr_is_aligned>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <is_aligned@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptr_is_aligned>:
jmp    1030 <is_aligned@plt>

LLVM IR (-O0):
define i32 @ptr_is_aligned(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i64
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = ptrtoint i8* %6 to i64
store i64 %7, i64* %5
%8 = load i64, i64* %5
%9 = load i32, i32* %4
%10 = call i32 @is_aligned(i64 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @ptr_is_aligned(i8* %0, i32 %1) {
%3 = ptrtoint i8* %0 to i64
%4 = tail call i32 @is_aligned(i64 %3, i32 %1)
ret i32 %4
}
/* Type definitions */
struct perf_event_attr {
  int size;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ __NR_perf_event_open;
scalar_t__ syscall(int /*<<< orphan*/, struct perf_event_attr *,
                   int /*<<< orphan*/, int, int, unsigned long);
int sys_perf_event_open(struct perf_event_attr *attr, pid_t pid, int cpu,
                        int group_fd, unsigned long flags) {
  attr->size = sizeof(*attr);
  return (int)syscall(__NR_perf_event_open, attr, pid, cpu, group_fd, flags);
}


x86 assembly (clang, -O0):
<sys_perf_event_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x4,(%rax)
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    -0x20(%rbp),%r9
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_perf_event_open>:
mov    %r8,%r9
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %rdi,%rsi
movl   $0x4,(%rdi)
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.perf_event_attr = type { i32 }
@__NR_perf_event_open = global i32 0
define i32 @sys_perf_event_open(%struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4) {
%6 = alloca %struct.perf_event_attr*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i64
store %struct.perf_event_attr* %0, %struct.perf_event_attr** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i64 %4, i64* %10
%11 = load %struct.perf_event_attr*, %struct.perf_event_attr** %6
%12 = getelementptr inbounds %struct.perf_event_attr, %struct.perf_event_attr* %11, i32 0, i32 0
store i32 4, i32* %12
%13 = load i32, i32* @__NR_perf_event_open
%14 = load %struct.perf_event_attr*, %struct.perf_event_attr** %6
%15 = load i32, i32* %7
%16 = load i32, i32* %8
%17 = load i32, i32* %9
%18 = load i64, i64* %10
%19 = call i64 @syscall(i32 %13, %struct.perf_event_attr* %14, i32 %15, i32 %16, i32 %17, i64 %18)
%20 = trunc i64 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
%struct.perf_event_attr = type { i32 }
@__NR_perf_event_open = global i32 0
define i32 @sys_perf_event_open(%struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4) {
%6 = getelementptr inbounds %struct.perf_event_attr, %struct.perf_event_attr* %0, i64 0, i32 0
store i32 4, i32* %6
%7 = load i32, i32* @__NR_perf_event_open
%8 = tail call i64 @syscall(i32 %7, %struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4)
%9 = trunc i64 %8 to i32
ret i32 %9
}