xunge/DecIR huggingface dataset:
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ assert(int);
int is_one_bit(int);
int main(int argc, char **argv, char **envp) {
  assert(is_one_bit(4) == true);
  assert(is_one_bit(5) == false);
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x4,%edi
call   1040 <is_one_bit@plt>
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    $0x5,%edi
call   1040 <is_one_bit@plt>
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    0x2e6b(%rip),%rax
mov    (%rax),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
call   1040 <is_one_bit@plt>
xor    %edi,%edi
cmp    $0x1,%eax
sete   %dil
call   1030 <assert@plt>
mov    $0x5,%edi
call   1040 <is_one_bit@plt>
xor    %edi,%edi
test   %eax,%eax
sete   %dil
call   1030 <assert@plt>
mov    0x2e89(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1, i8** %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8**
%7 = alloca i8**
store i32 0, i32* %4
store i32 %0, i32* %5
store i8** %1, i8*** %6
store i8** %2, i8*** %7
%8 = call i32 @is_one_bit(i32 4)
%9 = icmp eq i32 %8, 1
%10 = zext i1 %9 to i32
%11 = call i32 @assert(i32 %10)
%12 = call i32 @is_one_bit(i32 5)
%13 = icmp eq i32 %12, 0
%14 = zext i1 %13 to i32
%15 = call i32 @assert(i32 %14)
%16 = load i32, i32* @EXIT_SUCCESS
ret i32 %16
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1, i8** nocapture readnone %2) {
%4 = tail call i32 @is_one_bit(i32 4)
%5 = icmp eq i32 %4, 1
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
%8 = tail call i32 @is_one_bit(i32 5)
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
%11 = tail call i32 @assert(i32 %10)
%12 = load i32, i32* @EXIT_SUCCESS
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint64_t;
struct pdp_t {
  int dummy;
};
struct gsn_t {
  int dummy;
};

/* Variables and functions */
int pdp_newpdp(struct pdp_t **, int /*<<< orphan*/, int /*<<< orphan*/,
               int /*<<< orphan*/ *);
int gtp_newpdp(struct gsn_t *gsn, struct pdp_t **pdp, uint64_t imsi,
               uint8_t nsapi) {
  return pdp_newpdp(pdp, imsi, nsapi, NULL);
}


x86 assembly (clang, -O0):
<gtp_newpdp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x18(%rbp),%edx
xor    %eax,%eax
mov    %eax,%ecx
call   1030 <pdp_newpdp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtp_newpdp>:
mov    %rsi,%rdi
mov    %edx,%esi
mov    %ecx,%edx
xor    %ecx,%ecx
jmp    1030 <pdp_newpdp@plt>

LLVM IR (-O0):
%struct.gsn_t = type { i32 }
%struct.pdp_t = type { i32 }
define i32 @gtp_newpdp(%struct.gsn_t* %0, %struct.pdp_t** %1, i32 %2, i32 %3) {
%5 = alloca %struct.gsn_t*
%6 = alloca %struct.pdp_t**
%7 = alloca i32
%8 = alloca i32
store %struct.gsn_t* %0, %struct.gsn_t** %5
store %struct.pdp_t** %1, %struct.pdp_t*** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load %struct.pdp_t**, %struct.pdp_t*** %6
%10 = load i32, i32* %7
%11 = load i32, i32* %8
%12 = call i32 @pdp_newpdp(%struct.pdp_t** %9, i32 %10, i32 %11, i32* null)
ret i32 %12
}

LLVM IR (-O2):
%struct.gsn_t = type { i32 }
%struct.pdp_t = type { i32 }
define i32 @gtp_newpdp(%struct.gsn_t* nocapture readnone %0, %struct.pdp_t** %1, i32 %2, i32 %3) {
%5 = tail call i32 @pdp_newpdp(%struct.pdp_t** %1, i32 %2, i32 %3, i32* null)
ret i32 %5
}
/* Variables and functions */
int rename(char const *, char const *);
int move_file(const char *path, const char *newpath) {
  return rename(path, newpath);
}


x86 assembly (clang, -O0):
<move_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <rename@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<move_file>:
jmp    1030 <rename@plt>

LLVM IR (-O0):
define i32 @move_file(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @rename(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @move_file(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @rename(i8* %0, i8* %1)
ret i32 %3
}
void wifi_rsp_sme_connect_bssid(
    const struct wifi_msg_sme_connect_bssid_rsp_t *msg) {}


x86 assembly (clang, -O0):
<wifi_rsp_sme_connect_bssid>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifi_rsp_sme_connect_bssid>:
ret

LLVM IR (-O0):
%struct.wifi_msg_sme_connect_bssid_rsp_t = type opaque
define void @wifi_rsp_sme_connect_bssid(%struct.wifi_msg_sme_connect_bssid_rsp_t* %0) {
%2 = alloca %struct.wifi_msg_sme_connect_bssid_rsp_t*
store %struct.wifi_msg_sme_connect_bssid_rsp_t* %0, %struct.wifi_msg_sme_connect_bssid_rsp_t** %2
ret void
}

LLVM IR (-O2):
%struct.wifi_msg_sme_connect_bssid_rsp_t = type opaque
define void @wifi_rsp_sme_connect_bssid(%struct.wifi_msg_sme_connect_bssid_rsp_t* nocapture %0) {
ret void
}
int Next_Power_Of_2(int m) {
  int n;
  n = 2;
  while (n < m)
    n <<= 1;
  return (n);
}


x86 assembly (clang, -O0):
<Next_Power_Of_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1128 <Next_Power_Of_2+0x28>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <Next_Power_Of_2+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Next_Power_Of_2>:
mov    $0x2,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
mov    %ecx,%eax
lea    (%rax,%rax,1),%ecx
cmp    %edi,%eax
jl     1110 <Next_Power_Of_2+0x10>
ret

LLVM IR (-O0):
define i32 @Next_Power_Of_2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 2, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32, i32* %3
%10 = shl i32 %9, 1
store i32 %10, i32* %3
br label %4
11: ; preds = %4
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @Next_Power_Of_2(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 2, %1 ], [ %5, %2 ]
%4 = icmp slt i32 %3, %0
%5 = shl i32 %3, 1
br i1 %4, label %2, label %6
6: ; preds = %2
ret i32 %3
}
/* Type definitions */
struct em8051 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *);
int disasm_rrc_a(struct em8051 *aCPU, int aPosition, char *aBuffer) {
  sprintf(aBuffer, "RRC   A");
  return 1;
}


x86 assembly (clang, -O0):
<disasm_rrc_a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
lea    0xed2(%rip),%rsi
call   1030 <sprintf@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disasm_rrc_a>:
movabs $0x41202020435252,%rax
mov    %rax,(%rdx)
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.em8051 = type { i32 }
@.str = [8 x i8] c"RRC A\00"
define i32 @disasm_rrc_a(%struct.em8051* %0, i32 %1, i8* %2) {
%4 = alloca %struct.em8051*
%5 = alloca i32
%6 = alloca i8*
store %struct.em8051* %0, %struct.em8051** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = call i32 @sprintf(i8* %7, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
%struct.em8051 = type { i32 }
define i32 @disasm_rrc_a(%struct.em8051* nocapture readnone %0, i32 %1, i8* nocapture writeonly %2) {
%4 = bitcast i8* %2 to i64*
store i64 18331195838517842, i64* %4
ret i32 1
}
/* Variables and functions */
bool is_property_private_use(unsigned int ch) {
  return (ch >= 0xE000 && ch <= 0xF8FF) || (ch >= 0xF0000 && ch <= 0xFFFFD) ||
         (ch >= 0x100000 && ch <= 0x10FFFD);
}


x86 assembly (clang, -O0):
<is_property_private_use>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0xe000,-0x4(%rbp)
jb     1126 <is_property_private_use+0x26>
mov    $0x1,%al
cmpl   $0xf8ff,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jbe    116a <is_property_private_use+0x6a>
cmpl   $0xf0000,-0x4(%rbp)
jb     1145 <is_property_private_use+0x45>
mov    $0x1,%al
cmpl   $0xffffd,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jbe    116a <is_property_private_use+0x6a>
xor    %eax,%eax
cmpl   $0x100000,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jb     1164 <is_property_private_use+0x64>
cmpl   $0x10fffd,-0x4(%rbp)
setbe  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_property_private_use>:
lea    -0xe000(%rdi),%eax
cmp    $0x1900,%eax
setb   %al
lea    -0xf0000(%rdi),%ecx
cmp    $0xfffe,%ecx
setb   %cl
or     %al,%cl
add    $0xfff00000,%edi
cmp    $0xfffe,%edi
setb   %al
or     %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @is_property_private_use(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp uge i32 %3, 57344
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp ule i32 %6, 63743
br i1 %7, label %22, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp uge i32 %9, 983040
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp ule i32 %12, 1048573
br i1 %13, label %22, label %14
14: ; preds = %11, %8
%15 = load i32, i32* %2
%16 = icmp uge i32 %15, 1048576
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp ule i32 %18, 1114109
br label %20
20: ; preds = %17, %14
%21 = phi i1 [ false, %14 ], [ %19, %17 ]
br label %22
22: ; preds = %20, %11, %5
%23 = phi i1 [ true, %11 ], [ true, %5 ], [ %21, %20 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @is_property_private_use(i32 %0) {
%2 = add i32 %0, -57344
%3 = icmp ult i32 %2, 6400
%4 = add i32 %0, -983040
%5 = icmp ult i32 %4, 65534
%6 = or i1 %3, %5
%7 = add i32 %0, -1048576
%8 = icmp ult i32 %7, 65534
%9 = or i1 %8, %6
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ memchr(char *, int /*<<< orphan*/, int);
int /*<<< orphan*/ memcpy(int /*<<< orphan*/, char *, scalar_t__);
scalar_t__ strlen(char *);
char *strcat(char *d, char *s) {
  memcpy(memchr(d, 0, -1), s, strlen(s) + 1);
  return d;
}


x86 assembly (clang, -O0):
<strcat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0xffffffff,%edx
call   1040 <memchr@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    %rax,%rdx
add    $0x1,%rdx
call   1050 <memcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcat>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%r14
xor    %esi,%esi
mov    $0xffffffff,%edx
call   1040 <memchr@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <strlen@plt>
lea    0x1(%rax),%rdx
mov    %ebp,%edi
mov    %rbx,%rsi
call   1050 <memcpy@plt>
mov    %r14,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @strcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 @memchr(i8* %5, i32 0, i32 -1)
%7 = load i8*, i8** %4
%8 = load i8*, i8** %4
%9 = call i64 @strlen(i8* %8)
%10 = add nsw i64 %9, 1
%11 = call i32 @memcpy(i32 %6, i8* %7, i64 %10)
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define i8* @strcat(i8* returned %0, i8* %1) {
%3 = tail call i32 @memchr(i8* %0, i32 0, i32 -1)
%4 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%5 = add nsw i64 %4, 1
%6 = tail call i32 @memcpy(i32 %3, i8* %1, i64 %5)
ret i8* %0
}
int _strlen(char *s) {
  int n, m = 0;
  while (*(s + m) != '\0') {
    ++n;
    m++;
  }
  return (n);
}


x86 assembly (clang, -O0):
<_strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     113b <_strlen+0x3b>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    110f <_strlen+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_strlen>:
cmpb   $0x0,(%rdi)
je     111d <_strlen+0x1d>
add    $0x1,%rdi
nopl   0x0(%rax)
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <_strlen+0x10>
ret
ret

LLVM IR (-O0):
define i32 @_strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %4
br label %5
5: ; preds = %13, %1
%6 = load i8*, i8** %2
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %18
13: ; preds = %5
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
%16 = load i32, i32* %4
%17 = add nsw i32 %16, 1
store i32 %17, i32* %4
br label %5
18: ; preds = %5
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @_strlen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %8, %4 ], [ 0, %1 ]
%6 = phi i32 [ %7, %4 ], [ undef, %1 ]
%7 = add nsw i32 %6, 1
%8 = add nuw nsw i64 %5, 1
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
%13 = phi i32 [ undef, %1 ], [ %7, %4 ]
ret i32 %13
}
void cl_frameStep() {}


x86 assembly (clang, -O0):
<cl_frameStep>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cl_frameStep>:
ret

LLVM IR (-O0):
define void @cl_frameStep() {
ret void
}

LLVM IR (-O2):
define void @cl_frameStep() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EOVERFLOW;
int /*<<< orphan*/ errno;
int nat_mult(unsigned long *result, unsigned long long arg) {
  unsigned long long tmp = arg * (*result);
  if (tmp > (unsigned long)-1) {
    errno = EOVERFLOW;
    return 1;
  }
  *result = ((unsigned long)-1) & tmp;
  return 0;
}


x86 assembly (clang, -O0):
<nat_mult>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
imul   (%rcx),%rax
mov    %rax,-0x20(%rbp)
cmpq   $0xffffffffffffffff,-0x20(%rbp)
jbe    1145 <nat_mult+0x45>
mov    0x2ec2(%rip),%rax
mov    (%rax),%ecx
mov    0x2ea1(%rip),%rax
mov    %ecx,(%rax)
movl   $0x1,-0x4(%rbp)
jmp    115b <nat_mult+0x5b>
mov    -0x20(%rbp),%rcx
and    $0xffffffffffffffff,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nat_mult>:
imul   (%rdi),%rsi
mov    %rsi,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
@EOVERFLOW = global i32 0
@errno = global i32 0
define i32 @nat_mult(i64* %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
%7 = load i64, i64* %5
%8 = load i64*, i64** %4
%9 = load i64, i64* %8
%10 = mul i64 %7, %9
store i64 %10, i64* %6
%11 = load i64, i64* %6
%12 = icmp ugt i64 %11, -1
br i1 %12, label %13, label %15
13: ; preds = %2
%14 = load i32, i32* @EOVERFLOW
store i32 %14, i32* @errno
store i32 1, i32* %3
br label %19
15: ; preds = %2
%16 = load i64, i64* %6
%17 = and i64 -1, %16
%18 = load i64*, i64** %4
store i64 %17, i64* %18
store i32 0, i32* %3
br label %19
19: ; preds = %15, %13
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
@EOVERFLOW = global i32 0
@errno = global i32 0
define i32 @nat_mult(i64* nocapture %0, i64 %1) {
%3 = load i64, i64* %0
%4 = mul i64 %3, %1
store i64 %4, i64* %0
ret i32 0
}
/* Variables and functions */
int *malloc(int);
void g() { int *c = malloc(sizeof(char) * 512); }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x200,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    $0x200,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define void @g() {
%1 = alloca i32*
%2 = call i32* @malloc(i32 512)
store i32* %2, i32** %1
ret void
}

LLVM IR (-O2):
define void @g() {
%1 = tail call i32* @malloc(i32 512)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int rdrand_check_support();
int main() {
  if (rdrand_check_support() == 1) {
    printf("RDRAND SUPPORTED\n");
    return (0);
  } else {
    printf("RDRAND NOT SUPPORTED\n");
    return (-1);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rdrand_check_support@plt>
cmp    $0x1,%eax
jne    1157 <main+0x37>
lea    0xeba(%rip),%rdi
call   1040 <printf@plt>
movl   $0x0,-0x4(%rbp)
jmp    116a <main+0x4a>
lea    0xeb4(%rip),%rdi
call   1040 <printf@plt>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <rdrand_check_support@plt>
xor    %ebx,%ebx
cmp    $0x1,%eax
setne  %bl
lea    0xede(%rip),%rax
lea    0xec2(%rip),%rdi
cmove  %rax,%rdi
neg    %ebx
call   1030 <puts@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"RDRAND SUPPORTED\0A\00"
@.str.1 = [22 x i8] c"RDRAND NOT SUPPORTED\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @rdrand_check_support()
%3 = icmp eq i32 %2, 1
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
store i32 0, i32* %1
br label %8
6: ; preds = %0
%7 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0))
store i32 -1, i32* %1
br label %8
8: ; preds = %6, %4
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
@str = [21 x i8] c"RDRAND NOT SUPPORTED\00"
@str.2 = [17 x i8] c"RDRAND SUPPORTED\00"
define i32 @main() {
%1 = tail call i32 (...) @rdrand_check_support()
%2 = icmp eq i32 %1, 1
%3 = select i1 %2, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @str.2, i64 0, i64 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0)
%4 = xor i1 %2, true
%5 = sext i1 %4 to i32
%6 = tail call i32 @puts(i8* dereferenceable(1) %3)
ret i32 %5
}
int lib_mul(const int a, const int b) { return a * b; }


x86 assembly (clang, -O0):
<lib_mul>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lib_mul>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @lib_mul(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @lib_mul(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
ret i32 %3
}
/* Type definitions */
struct sk_buff {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ deallocate(struct sk_buff *);
int /*<<< orphan*/ skb_release_data(struct sk_buff *);
void kfree_skbmem(struct sk_buff *skb) {
  skb_release_data(skb);
  deallocate(skb);
}


x86 assembly (clang, -O0):
<kfree_skbmem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <skb_release_data@plt>
mov    -0x8(%rbp),%rdi
call   1030 <deallocate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kfree_skbmem>:
push   %rbx
mov    %rdi,%rbx
call   1040 <skb_release_data@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <deallocate@plt>

LLVM IR (-O0):
%struct.sk_buff = type { i32 }
define void @kfree_skbmem(%struct.sk_buff* %0) {
%2 = alloca %struct.sk_buff*
store %struct.sk_buff* %0, %struct.sk_buff** %2
%3 = load %struct.sk_buff*, %struct.sk_buff** %2
%4 = call i32 @skb_release_data(%struct.sk_buff* %3)
%5 = load %struct.sk_buff*, %struct.sk_buff** %2
%6 = call i32 @deallocate(%struct.sk_buff* %5)
ret void
}

LLVM IR (-O2):
%struct.sk_buff = type { i32 }
define void @kfree_skbmem(%struct.sk_buff* %0) {
%2 = tail call i32 @skb_release_data(%struct.sk_buff* %0)
%3 = tail call i32 @deallocate(%struct.sk_buff* %0)
ret void
}
int xfs_attr_leaf_entsize_local_max(int bsize) {
  return (((bsize) >> 1) + ((bsize) >> 2));
}


x86 assembly (clang, -O0):
<xfs_attr_leaf_entsize_local_max>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    -0x4(%rbp),%ecx
sar    $0x2,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfs_attr_leaf_entsize_local_max>:
mov    %edi,%eax
sar    %eax
sar    $0x2,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @xfs_attr_leaf_entsize_local_max(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 1
%5 = load i32, i32* %2
%6 = ashr i32 %5, 2
%7 = add nsw i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @xfs_attr_leaf_entsize_local_max(i32 %0) {
%2 = ashr i32 %0, 1
%3 = ashr i32 %0, 2
%4 = add nsw i32 %2, %3
ret i32 %4
}
double max(double a, double b) { return (b > a) ? b : a; }


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    112d <max+0x2d>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1137 <max+0x37>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
maxsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @max(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %4
%6 = load double, double* %3
%7 = fcmp ogt double %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load double, double* %4
br label %12
10: ; preds = %2
%11 = load double, double* %3
br label %12
12: ; preds = %10, %8
%13 = phi double [ %9, %8 ], [ %11, %10 ]
ret double %13
}

LLVM IR (-O2):
define double @max(double %0, double %1) {
%3 = fcmp ogt double %1, %0
%4 = select i1 %3, double %1, double %0
ret double %4
}
/* Variables and functions */
int ioCanGetFileTypeOfSize(char *, int);
int secCanGetFileTypeOfSize(char *fileName, int fileNameSize) {
  return ioCanGetFileTypeOfSize(fileName, fileNameSize);
}


x86 assembly (clang, -O0):
<secCanGetFileTypeOfSize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <ioCanGetFileTypeOfSize@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<secCanGetFileTypeOfSize>:
jmp    1030 <ioCanGetFileTypeOfSize@plt>

LLVM IR (-O0):
define i32 @secCanGetFileTypeOfSize(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @ioCanGetFileTypeOfSize(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @secCanGetFileTypeOfSize(i8* %0, i32 %1) {
%3 = tail call i32 @ioCanGetFileTypeOfSize(i8* %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int SIGHUP;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void die(int signo) {
  if (signo != SIGHUP)
    printf("Goodbye.\n");
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ebb(%rip),%rcx
cmp    (%rcx),%eax
je     1149 <die+0x29>
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e88(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<die>:
push   %rax
mov    0x2ec8(%rip),%rax
cmp    %edi,(%rax)
je     1138 <die+0x18>
lea    0xecd(%rip),%rdi
call   1030 <puts@plt>
mov    0x2e99(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@SIGHUP = global i32 0
@.str = [10 x i8] c"Goodbye.\0A\00"
@EXIT_SUCCESS = global i32 0
define void @die(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIGHUP
%5 = icmp ne i32 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
%9 = load i32, i32* @EXIT_SUCCESS
%10 = call i32 @exit(i32 %9)
unreachable
}

LLVM IR (-O2):
@SIGHUP = global i32 0
@EXIT_SUCCESS = global i32 0
@str = [9 x i8] c"Goodbye.\00"
define void @die(i32 %0) {
%2 = load i32, i32* @SIGHUP
%3 = icmp eq i32 %2, %0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
%7 = load i32, i32* @EXIT_SUCCESS
%8 = tail call i32 @exit(i32 %7)
unreachable
}
/* Variables and functions */
void *page_start(size_t id) {
  size_t offset = id * (1 << 10);
  return (void *)((unsigned char *)(void *)0x2130051300000000UL + offset);
}


x86 assembly (clang, -O0):
<page_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0xa,%rax
mov    %rax,-0x10(%rbp)
movabs $0x2130051300000000,%rax
05 30 21
add    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<page_start>:
shl    $0xa,%rdi
movabs $0x2130051300000000,%rax
05 30 21
add    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @page_start(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = mul i64 %4, 1024
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = getelementptr inbounds i8, i8* inttoptr (i64 2391416981296250880 to i8*), i64 %6
ret i8* %7
}

LLVM IR (-O2):
define i8* @page_start(i64 %0) {
%2 = shl i64 %0, 10
%3 = getelementptr inbounds i8, i8* inttoptr (i64 2391416981296250880 to i8*), i64 %2
ret i8* %3
}
/* Type definitions */
typedef int /*<<< orphan*/ msg;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/ *);
int /*<<< orphan*/ fwrite(char const *, int, int /*<<< orphan*/,
                          int /*<<< orphan*/ *);
int /*<<< orphan*/ strlen(char const *);
void pamtester_compat_put_message(const char *msg, FILE *fp) {
  fwrite(msg, sizeof(msg[0]), strlen(msg), fp);
  fflush(fp);
}


x86 assembly (clang, -O0):
<pamtester_compat_put_message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%edx
mov    -0x10(%rbp),%rcx
mov    $0x1,%esi
call   1050 <fwrite@plt>
mov    -0x10(%rbp),%rdi
call   1040 <fflush@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pamtester_compat_put_message>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
mov    %eax,%edx
mov    %r14,%rcx
call   1050 <fwrite@plt>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <fflush@plt>

LLVM IR (-O0):
define void @pamtester_compat_put_message(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @strlen(i8* %6)
%8 = load i32*, i32** %4
%9 = call i32 @fwrite(i8* %5, i32 1, i32 %7, i32* %8)
%10 = load i32*, i32** %4
%11 = call i32 @fflush(i32* %10)
ret void
}

LLVM IR (-O2):
define void @pamtester_compat_put_message(i8* %0, i32* nocapture %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = tail call i32 @fwrite(i8* %0, i32 1, i32 %3, i32* %1)
%5 = tail call i32 @fflush(i32* %1)
ret void
}
/* Variables and functions */
int __nvvm_read_ptx_sreg_nctaid_w();
int __nvvm_read_ptx_sreg_nctaid_x();
int __nvvm_read_ptx_sreg_nctaid_y();
int __nvvm_read_ptx_sreg_nctaid_z();
__attribute__((device)) int read_nctaid() {
  int x = __nvvm_read_ptx_sreg_nctaid_x();
  int y = __nvvm_read_ptx_sreg_nctaid_y();
  int z = __nvvm_read_ptx_sreg_nctaid_z();
  int w = __nvvm_read_ptx_sreg_nctaid_w();
  return x + y + z + w;
}


x86 assembly (clang, -O0):
<read_nctaid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <__nvvm_read_ptx_sreg_nctaid_x@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1060 <__nvvm_read_ptx_sreg_nctaid_y@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1040 <__nvvm_read_ptx_sreg_nctaid_z@plt>
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1050 <__nvvm_read_ptx_sreg_nctaid_w@plt>
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_nctaid>:
push   %rbp
push   %r14
push   %rbx
xor    %eax,%eax
call   1030 <__nvvm_read_ptx_sreg_nctaid_x@plt>
mov    %eax,%r14d
xor    %eax,%eax
call   1060 <__nvvm_read_ptx_sreg_nctaid_y@plt>
mov    %eax,%ebp
xor    %eax,%eax
call   1040 <__nvvm_read_ptx_sreg_nctaid_z@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <__nvvm_read_ptx_sreg_nctaid_w@plt>
add    %r14d,%ebp
add    %ebx,%ebp
add    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @read_nctaid() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = call i32 (...) @__nvvm_read_ptx_sreg_nctaid_x()
store i32 %5, i32* %1
%6 = call i32 (...) @__nvvm_read_ptx_sreg_nctaid_y()
store i32 %6, i32* %2
%7 = call i32 (...) @__nvvm_read_ptx_sreg_nctaid_z()
store i32 %7, i32* %3
%8 = call i32 (...) @__nvvm_read_ptx_sreg_nctaid_w()
store i32 %8, i32* %4
%9 = load i32, i32* %1
%10 = load i32, i32* %2
%11 = add nsw i32 %9, %10
%12 = load i32, i32* %3
%13 = add nsw i32 %11, %12
%14 = load i32, i32* %4
%15 = add nsw i32 %13, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @read_nctaid() {
%1 = tail call i32 (...) @__nvvm_read_ptx_sreg_nctaid_x()
%2 = tail call i32 (...) @__nvvm_read_ptx_sreg_nctaid_y()
%3 = tail call i32 (...) @__nvvm_read_ptx_sreg_nctaid_z()
%4 = tail call i32 (...) @__nvvm_read_ptx_sreg_nctaid_w()
%5 = add nsw i32 %2, %1
%6 = add nsw i32 %5, %3
%7 = add nsw i32 %6, %4
ret i32 %7
}
/* Type definitions */
typedef scalar_t__ n;

/* Variables and functions */
long C_flonum(long **, double);
long C_unsigned_long_to_num(long **ptr, unsigned long n) {
  if ((((n) & (0x8000000000000000L | (0x8000000000000000L >> 1))) == 0))
    return (((long)(n) << 1) | 0x00000001);
  else
    return C_flonum(ptr, (double)n);
}


x86 assembly (clang, -O0):
<C_unsigned_long_to_num>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movabs $0xc000000000000000,%rax
and    -0x18(%rbp),%rax
cmp    $0x0,%rax
jne    114d <C_unsigned_long_to_num+0x3d>
mov    -0x18(%rbp),%rax
shl    $0x1,%rax
or     $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1181 <C_unsigned_long_to_num+0x71>
mov    -0x10(%rbp),%rdi
movaps 0xea8(%rip),%xmm1
movq   -0x18(%rbp),%xmm0
punpckldq %xmm1,%xmm0
movapd 0xea7(%rip),%xmm1
subpd  %xmm1,%xmm0
movaps %xmm0,%xmm1
unpckhpd %xmm0,%xmm0
addsd  %xmm1,%xmm0
call   1030 <C_flonum@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<C_unsigned_long_to_num>:
mov    %rsi,%rax
shr    $0x3e,%rax
jne    1122 <C_unsigned_long_to_num+0x12>
lea    (%rsi,%rsi,1),%rax
add    $0x1,%rax
ret
movq   %rsi,%xmm1
punpckldq 0xed1(%rip),%xmm1
subpd  0xed9(%rip),%xmm1
movapd %xmm1,%xmm0
unpckhpd %xmm1,%xmm0
addsd  %xmm1,%xmm0
jmp    1030 <C_flonum@plt>

LLVM IR (-O0):
define i64 @C_unsigned_long_to_num(i64** %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64**
%5 = alloca i64
store i64** %0, i64*** %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = and i64 %6, -4611686018427387904
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i64, i64* %5
%11 = shl i64 %10, 1
%12 = or i64 %11, 1
store i64 %12, i64* %3
br label %18
13: ; preds = %2
%14 = load i64**, i64*** %4
%15 = load i64, i64* %5
%16 = uitofp i64 %15 to double
%17 = call i64 @C_flonum(i64** %14, double %16)
store i64 %17, i64* %3
br label %18
18: ; preds = %13, %9
%19 = load i64, i64* %3
ret i64 %19
}

LLVM IR (-O2):
define i64 @C_unsigned_long_to_num(i64** %0, i64 %1) {
%3 = icmp ult i64 %1, 4611686018427387904
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = shl nuw nsw i64 %1, 1
%6 = or i64 %5, 1
br label %10
7: ; preds = %2
%8 = uitofp i64 %1 to double
%9 = tail call i64 @C_flonum(i64** %0, double %8)
br label %10
10: ; preds = %7, %4
%11 = phi i64 [ %6, %4 ], [ %9, %7 ]
ret i64 %11
}
/* Variables and functions */
int gettid();
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ pthread_exit();
void function() {
  printf("[%d] THREAD EXIT\n", gettid());
  pthread_exit();
}


x86 assembly (clang, -O0):
<function>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <gettid@plt>
mov    %eax,%esi
lea    0xebc(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <pthread_exit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<function>:
push   %rax
xor    %eax,%eax
call   1030 <gettid@plt>
lea    0xec1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <pthread_exit@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"[%d] THREAD EXIT\0A\00"
define void @function() {
%1 = call i32 (...) @gettid()
%2 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = call i32 (...) @pthread_exit()
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"[%d] THREAD EXIT\0A\00"
define void @function() {
%1 = tail call i32 (...) @gettid()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 (...) @pthread_exit()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ GLfloat;

/* Variables and functions */
int /*<<< orphan*/ glRasterPos2f(int /*<<< orphan*/, int /*<<< orphan*/);
void RasterPos2f(GLfloat x, GLfloat y) { glRasterPos2f(x, y); }


x86 assembly (clang, -O0):
<RasterPos2f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <glRasterPos2f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RasterPos2f>:
jmp    1030 <glRasterPos2f@plt>

LLVM IR (-O0):
define void @RasterPos2f(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @glRasterPos2f(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @RasterPos2f(i32 %0, i32 %1) {
%3 = tail call i32 @glRasterPos2f(i32 %0, i32 %1)
ret void
}
double dqwgtc(double x, double c, double p2, double p3, double p4, int kp) {
  return 1.0 / (x - c);
}


x86 assembly (clang, -O0):
<dqwgtc>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  %xmm4,-0x28(%rbp)
mov    %edi,-0x2c(%rbp)
movsd  -0x8(%rbp),%xmm1
subsd  -0x10(%rbp),%xmm1
movsd  0xece(%rip),%xmm0
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dqwgtc>:
subsd  %xmm1,%xmm0
movsd  0xef4(%rip),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @dqwgtc(double %0, double %1, double %2, double %3, double %4, i32 %5) {
%7 = alloca double
%8 = alloca double
%9 = alloca double
%10 = alloca double
%11 = alloca double
%12 = alloca i32
store double %0, double* %7
store double %1, double* %8
store double %2, double* %9
store double %3, double* %10
store double %4, double* %11
store i32 %5, i32* %12
%13 = load double, double* %7
%14 = load double, double* %8
%15 = fsub double %13, %14
%16 = fdiv double 1.000000e+00, %15
ret double %16
}

LLVM IR (-O2):
define double @dqwgtc(double %0, double %1, double %2, double %3, double %4, i32 %5) {
%7 = fsub double %0, %1
%8 = fdiv double 1.000000e+00, %7
ret double %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_sw_cvolume_divide_scalar() {
  printf("NOT IMPLEMENTED:"
         "pa_sw_cvolume_divide_scalar"
         "\n");
}


x86 assembly (clang, -O0):
<pa_sw_cvolume_divide_scalar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_sw_cvolume_divide_scalar>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [45 x i8] c"NOT IMPLEMENTED:pa_sw_cvolume_divide_scalar\0A\00"
define i32 @pa_sw_cvolume_divide_scalar() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [44 x i8] c"NOT IMPLEMENTED:pa_sw_cvolume_divide_scalar\00"
define i32 @pa_sw_cvolume_divide_scalar() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
unsigned __ticks_per_usec(void) {
  extern unsigned int processor_id;
  if (processor_id & 0x00000030)
    return 266;
  else if (processor_id & 0x00000010)
    return 400;
  else
    return 533;
}


x86 assembly (clang, -O0):
<__ticks_per_usec>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%eax
and    $0x30,%eax
cmp    $0x0,%eax
je     1125 <__ticks_per_usec+0x25>
movl   $0x10a,-0x4(%rbp)
jmp    114d <__ticks_per_usec+0x4d>
mov    0x2eb4(%rip),%rax
mov    (%rax),%eax
and    $0x10,%eax
cmp    $0x0,%eax
je     1146 <__ticks_per_usec+0x46>
movl   $0x190,-0x4(%rbp)
jmp    114d <__ticks_per_usec+0x4d>
movl   $0x215,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ticks_per_usec>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
test   $0x10,%al
mov    $0x215,%ecx
mov    $0x190,%edx
cmove  %ecx,%edx
test   $0x30,%al
mov    $0x10a,%eax
cmove  %edx,%eax
ret

LLVM IR (-O0):
@processor_id = external global i32
define i32 @__ticks_per_usec() {
%1 = alloca i32
%2 = load i32, i32* @processor_id
%3 = and i32 %2, 48
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %0
store i32 266, i32* %1
br label %12
6: ; preds = %0
%7 = load i32, i32* @processor_id
%8 = and i32 %7, 16
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %6
store i32 400, i32* %1
br label %12
11: ; preds = %6
store i32 533, i32* %1
br label %12
12: ; preds = %11, %10, %5
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
@processor_id = external global i32
define i32 @__ticks_per_usec() {
%1 = load i32, i32* @processor_id
%2 = and i32 %1, 48
%3 = icmp eq i32 %2, 0
%4 = and i32 %1, 16
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i32 533, i32 400
%7 = select i1 %3, i32 %6, i32 266
ret i32 %7
}
int test_imm_C0int16_reg(short val) {
  return ((val) & (0xC0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C0int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xc0,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C0int16_reg>:
test   $0xc0,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C0int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 192
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C0int16_reg(i16 signext %0) {
%2 = and i16 %0, 192
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ sqlite3_value;
typedef int /*<<< orphan*/ sqlite3_context;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void onTrigger(sqlite3_context *context, int argc, sqlite3_value **argv) {
  printf("onTrigger argc = %d\n", argc);
}


x86 assembly (clang, -O0):
<onTrigger>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0xc(%rbp),%esi
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<onTrigger>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"onTrigger argc = %d\0A\00"
define void @onTrigger(i32* %0, i32 %1, i32** %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32**
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32** %2, i32*** %6
%7 = load i32, i32* %5
%8 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"onTrigger argc = %d\0A\00"
define void @onTrigger(i32* nocapture readnone %0, i32 %1, i32** nocapture readnone %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
/* Type definitions */
struct pbst_table {
  int dummy;
};

/* Variables and functions */
void **pbst_probe(struct pbst_table *, void *);
void *pbst_replace(struct pbst_table *table, void *item) {
  void **p = pbst_probe(table, item);
  if (p == NULL || *p == item)
    return NULL;
  else {
    void *r = *p;
    *p = item;
    return r;
  }
}


x86 assembly (clang, -O0):
<pbst_replace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <pbst_probe@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     114d <pbst_replace+0x3d>
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
cmp    -0x18(%rbp),%rax
jne    115a <pbst_replace+0x4a>
movq   $0x0,-0x8(%rbp)
jmp    1178 <pbst_replace+0x68>
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x28(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pbst_replace>:
push   %rbx
mov    %rsi,%rbx
call   1030 <pbst_probe@plt>
test   %rax,%rax
je     112e <pbst_replace+0x1e>
mov    %rax,%rcx
mov    (%rax),%rax
cmp    %rbx,%rax
je     112e <pbst_replace+0x1e>
mov    %rbx,(%rcx)
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.pbst_table = type { i32 }
define i8* @pbst_replace(%struct.pbst_table* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca %struct.pbst_table*
%5 = alloca i8*
%6 = alloca i8**
%7 = alloca i8*
store %struct.pbst_table* %0, %struct.pbst_table** %4
store i8* %1, i8** %5
%8 = load %struct.pbst_table*, %struct.pbst_table** %4
%9 = load i8*, i8** %5
%10 = call i8** @pbst_probe(%struct.pbst_table* %8, i8* %9)
store i8** %10, i8*** %6
%11 = load i8**, i8*** %6
%12 = icmp eq i8** %11, null
br i1 %12, label %18, label %13
13: ; preds = %2
%14 = load i8**, i8*** %6
%15 = load i8*, i8** %14
%16 = load i8*, i8** %5
%17 = icmp eq i8* %15, %16
br i1 %17, label %18, label %19
18: ; preds = %13, %2
store i8* null, i8** %3
br label %25
19: ; preds = %13
%20 = load i8**, i8*** %6
%21 = load i8*, i8** %20
store i8* %21, i8** %7
%22 = load i8*, i8** %5
%23 = load i8**, i8*** %6
store i8* %22, i8** %23
%24 = load i8*, i8** %7
store i8* %24, i8** %3
br label %25
25: ; preds = %19, %18
%26 = load i8*, i8** %3
ret i8* %26
}

LLVM IR (-O2):
%struct.pbst_table = type { i32 }
define i8* @pbst_replace(%struct.pbst_table* %0, i8* %1) {
%3 = tail call i8** @pbst_probe(%struct.pbst_table* %0, i8* %1)
%4 = icmp eq i8** %3, null
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, %1
br i1 %7, label %9, label %8
8: ; preds = %5
store i8* %1, i8** %3
br label %9
9: ; preds = %2, %5, %8
%10 = phi i8* [ %6, %8 ], [ null, %5 ], [ null, %2 ]
ret i8* %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void usage(char *name) { printf("usage: %s IpAddr\n", name); }


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"usage: %s IpAddr\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"usage: %s IpAddr\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ flockfile(int /*<<< orphan*/ *);
size_t fsend_unlocked(int /*<<< orphan*/ *, int /*<<< orphan*/ *, size_t);
int /*<<< orphan*/ funlockfile(int /*<<< orphan*/ *);
size_t fsend(FILE *in, FILE *out, size_t size) {
  flockfile(in);
  flockfile(out);
  size_t ret = fsend_unlocked(in, out, size);
  funlockfile(in);
  funlockfile(out);
  return ret;
}


x86 assembly (clang, -O0):
<fsend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <flockfile@plt>
mov    -0x10(%rbp),%rdi
call   1040 <flockfile@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1050 <fsend_unlocked@plt>
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <funlockfile@plt>
mov    -0x10(%rbp),%rdi
call   1030 <funlockfile@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsend>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
call   1040 <flockfile@plt>
mov    %r15,%rdi
call   1040 <flockfile@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
call   1050 <fsend_unlocked@plt>
mov    %rax,%r14
mov    %rbx,%rdi
call   1030 <funlockfile@plt>
mov    %r15,%rdi
call   1030 <funlockfile@plt>
mov    %r14,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @fsend(i32* %0, i32* %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i64
%7 = alloca i64
store i32* %0, i32** %4
store i32* %1, i32** %5
store i64 %2, i64* %6
%8 = load i32*, i32** %4
%9 = call i32 @flockfile(i32* %8)
%10 = load i32*, i32** %5
%11 = call i32 @flockfile(i32* %10)
%12 = load i32*, i32** %4
%13 = load i32*, i32** %5
%14 = load i64, i64* %6
%15 = call i64 @fsend_unlocked(i32* %12, i32* %13, i64 %14)
store i64 %15, i64* %7
%16 = load i32*, i32** %4
%17 = call i32 @funlockfile(i32* %16)
%18 = load i32*, i32** %5
%19 = call i32 @funlockfile(i32* %18)
%20 = load i64, i64* %7
ret i64 %20
}

LLVM IR (-O2):
define i64 @fsend(i32* %0, i32* %1, i64 %2) {
%4 = tail call i32 @flockfile(i32* %0)
%5 = tail call i32 @flockfile(i32* %1)
%6 = tail call i64 @fsend_unlocked(i32* %0, i32* %1, i64 %2)
%7 = tail call i32 @funlockfile(i32* %0)
%8 = tail call i32 @funlockfile(i32* %1)
ret i64 %6
}