xunge/DecIR huggingface dataset:
int code(char color) {
  if (color == 'R')
    return 0;
  if (color == 'G')
    return 1;
  if (color == 'B')
    return 2;
  if (color == 'Y')
    return 3;
  return -1;
}


x86 assembly (clang, -O0):
<code>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x52,%eax
jne    1123 <code+0x23>
movl   $0x0,-0x4(%rbp)
jmp    1175 <code+0x75>
movsbl -0x5(%rbp),%eax
cmp    $0x47,%eax
jne    113c <code+0x3c>
movl   $0x1,-0x4(%rbp)
jmp    1175 <code+0x75>
movsbl -0x5(%rbp),%eax
cmp    $0x42,%eax
jne    1155 <code+0x55>
movl   $0x2,-0x4(%rbp)
jmp    1175 <code+0x75>
movsbl -0x5(%rbp),%eax
cmp    $0x59,%eax
jne    116e <code+0x6e>
movl   $0x3,-0x4(%rbp)
jmp    1175 <code+0x75>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<code>:
add    $0xbe,%dil
cmp    $0x17,%dil
ja     1126 <code+0x26>
xor    %eax,%eax
movzbl %dil,%ecx
lea    0xee9(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
mov    $0x2,%eax
ret
mov    $0xffffffff,%eax
ret
mov    $0x1,%eax
ret
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @code(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 82
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %24
8: ; preds = %1
%9 = load i8, i8* %3
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 71
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 1, i32* %2
br label %24
13: ; preds = %8
%14 = load i8, i8* %3
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 66
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 2, i32* %2
br label %24
18: ; preds = %13
%19 = load i8, i8* %3
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 89
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 3, i32* %2
br label %24
23: ; preds = %18
store i32 -1, i32* %2
br label %24
24: ; preds = %23, %22, %17, %12, %7
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @code(i8 signext %0) {
switch i8 %0, label %5 [
i8 82, label %6
i8 71, label %2
i8 66, label %3
i8 89, label %4
]
2: ; preds = %1
br label %6
3: ; preds = %1
br label %6
4: ; preds = %1
br label %6
5: ; preds = %1
br label %6
6: ; preds = %1, %5, %4, %3, %2
%7 = phi i32 [ 1, %2 ], [ 2, %3 ], [ 3, %4 ], [ -1, %5 ], [ 0, %1 ]
ret i32 %7
}
int SQUARE_FORWARD(int sq, int sd) { return sq - 16 + (sd << 5); }


x86 assembly (clang, -O0):
<SQUARE_FORWARD>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x10,%eax
mov    -0x8(%rbp),%ecx
shl    $0x5,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SQUARE_FORWARD>:
shl    $0x5,%esi
lea    (%rdi,%rsi,1),%eax
add    $0xfffffff0,%eax
ret

LLVM IR (-O0):
define i32 @SQUARE_FORWARD(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = sub nsw i32 %5, 16
%7 = load i32, i32* %4
%8 = shl i32 %7, 5
%9 = add nsw i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @SQUARE_FORWARD(i32 %0, i32 %1) {
%3 = add nsw i32 %0, -16
%4 = shl i32 %1, 5
%5 = add nsw i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void psihead(int osvers, int osrel, int ossub) {
  printf("cpusome    memsome  memfull    iosome  iofull");
}


x86 assembly (clang, -O0):
<psihead>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psihead>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [46 x i8] c"cpusome memsome memfull iosome iofull\00"
define void @psihead(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [46 x i8] c"cpusome memsome memfull iosome iofull\00"
define void @psihead(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
void set_tree_addr(uint32_t addr[8], uint64_t tree) {
  addr[1] = (uint32_t)(tree >> 32);
  addr[2] = (uint32_t)tree;
}


x86 assembly (clang, -O0):
<set_tree_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x20,%ecx
sar    %cl,%eax
movslq %eax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x8(%rax)
movslq -0xc(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_tree_addr>:
movslq %esi,%rax
mov    %rax,0x10(%rdi)
ret

LLVM IR (-O0):
define void @set_tree_addr(i64* %0, i32 %1) {
%3 = alloca i64*
%4 = alloca i32
store i64* %0, i64** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 32
%7 = sext i32 %6 to i64
%8 = load i64*, i64** %3
%9 = getelementptr inbounds i64, i64* %8, i64 1
store i64 %7, i64* %9
%10 = load i32, i32* %4
%11 = sext i32 %10 to i64
%12 = load i64*, i64** %3
%13 = getelementptr inbounds i64, i64* %12, i64 2
store i64 %11, i64* %13
ret void
}

LLVM IR (-O2):
define void @set_tree_addr(i64* nocapture writeonly %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i64, i64* %0, i64 2
store i64 %3, i64* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ errx(int, char *);
void *smalloc(int, int);
int tag_new();
void *kmalloc(int sz) {
  static int _tag = -1;
  void *x;
  if (_tag == -1)
    _tag = tag_new();
  x = smalloc(_tag, sz);
  if (!x)
    errx(1, "kmalloc()");
  return x;
}


x86 assembly (clang, -O0):
<kmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xffffffff,0x2ef6(%rip)
jne    1155 <kmalloc+0x25>
mov    $0x0,%al
call   1050 <tag_new@plt>
mov    %eax,0x2ee3(%rip)
mov    0x2edd(%rip),%edi
mov    -0x4(%rbp),%esi
call   1040 <smalloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1183 <kmalloc+0x53>
mov    $0x1,%edi
lea    0xe82(%rip),%rsi
call   1030 <errx@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kmalloc>:
push   %rbx
mov    %edi,%ebx
mov    0x2eff(%rip),%edi
cmp    $0xffffffff,%edi
jne    114d <kmalloc+0x1d>
xor    %eax,%eax
call   1050 <tag_new@plt>
mov    %eax,%edi
mov    %eax,0x2eeb(%rip)
mov    %ebx,%esi
call   1040 <smalloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    116d <kmalloc+0x3d>
lea    0xe9d(%rip),%rsi
mov    $0x1,%edi
call   1030 <errx@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@kmalloc._tag = internal global i32 -1
@.str = [10 x i8] c"kmalloc()\00"
define i8* @kmalloc(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* @kmalloc._tag
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 (...) @tag_new()
store i32 %7, i32* @kmalloc._tag
br label %8
8: ; preds = %6, %1
%9 = load i32, i32* @kmalloc._tag
%10 = load i32, i32* %2
%11 = call i8* @smalloc(i32 %9, i32 %10)
store i8* %11, i8** %3
%12 = load i8*, i8** %3
%13 = icmp ne i8* %12, null
br i1 %13, label %16, label %14
14: ; preds = %8
%15 = call i32 @errx(i32 1, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
br label %16
16: ; preds = %14, %8
%17 = load i8*, i8** %3
ret i8* %17
}

LLVM IR (-O2):
@kmalloc._tag = internal unnamed_addr global i32 -1
@.str = [10 x i8] c"kmalloc()\00"
define i8* @kmalloc(i32 %0) {
%2 = load i32, i32* @kmalloc._tag
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 (...) @tag_new()
store i32 %5, i32* @kmalloc._tag
br label %6
6: ; preds = %4, %1
%7 = phi i32 [ %5, %4 ], [ %2, %1 ]
%8 = tail call i8* @smalloc(i32 %7, i32 %0)
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %12
10: ; preds = %6
%11 = tail call i32 @errx(i32 1, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %10, %6
ret i8* %8
}
unsigned xrop3_247_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D & S;
  stk2 = ~stk2;
  stk1 = T | stk2;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_247_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_247_0_0>:
mov    %edi,%eax
not    %eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_247_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %6
%24 = and i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %9
%26 = xor i32 %25, -1
store i32 %26, i32* %9
%27 = load i32, i32* %7
%28 = load i32, i32* %9
%29 = or i32 %27, %28
store i32 %29, i32* %8
%30 = load i32, i32* %8
ret i32 %30
}

LLVM IR (-O2):
define i32 @xrop3_247_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = zext i8 %1 to i32
%5 = xor i32 %3, -1
%6 = or i32 %4, %5
ret i32 %6
}
/* Variables and functions */
void *malloc(int);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, int);
void *pdgl_avi_malloc(int sz) {
  void *p;
  p = malloc(sz);
  memset(p, 0, sz);
  return (p);
}


x86 assembly (clang, -O0):
<pdgl_avi_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%edx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pdgl_avi_malloc>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %esi,%esi
mov    %ebp,%edx
call   1030 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @pdgl_avi_malloc(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8* @malloc(i32 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = load i32, i32* %2
%8 = call i32 @memset(i8* %6, i32 0, i32 %7)
%9 = load i8*, i8** %3
ret i8* %9
}

LLVM IR (-O2):
define i8* @pdgl_avi_malloc(i32 %0) {
%2 = tail call i8* @malloc(i32 %0)
%3 = tail call i32 @memset(i8* %2, i32 0, i32 %0)
ret i8* %2
}
/* Variables and functions */
int any_decrqss(char const *, char *);
int rpt_DECTME(const char *the_title) { return any_decrqss(the_title, " ~"); }


x86 assembly (clang, -O0):
<rpt_DECTME>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <any_decrqss@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpt_DECTME>:
lea    0xee9(%rip),%rsi
jmp    1030 <any_decrqss@plt>

LLVM IR (-O0):
@.str = [3 x i8] c" ~\00"
define i32 @rpt_DECTME(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @any_decrqss(i8* %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [3 x i8] c" ~\00"
define i32 @rpt_DECTME(i8* %0) {
%2 = tail call i32 @any_decrqss(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ test_c();
int /*<<< orphan*/ test_d();
int main(void) {
  test_c();
  test_d();
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_c@plt>
mov    $0x0,%al
call   1040 <test_d@plt>
mov    0x2e9c(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_c@plt>
xor    %eax,%eax
call   1040 <test_d@plt>
mov    0x2eaa(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_c()
%3 = call i32 (...) @test_d()
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 (...) @test_c()
%2 = tail call i32 (...) @test_d()
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}
void mystrcpy(char *s1, char *s2) {
  while (s2[0]) {
    s1[0] = s2[0];
    s1 = s1 + 1;
    s2 = s2 + 1;
  }
  s1[0] = 0;
}


x86 assembly (clang, -O0):
<mystrcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1142 <mystrcpy+0x42>
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110c <mystrcpy+0xc>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mystrcpy>:
mov    (%rsi),%al
test   %al,%al
je     1121 <mystrcpy+0x21>
add    $0x1,%rsi
nopw   0x0(%rax,%rax,1)
mov    %al,(%rdi)
add    $0x1,%rdi
movzbl (%rsi),%eax
add    $0x1,%rsi
test   %al,%al
jne    1110 <mystrcpy+0x10>
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @mystrcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %10, %2
%6 = load i8*, i8** %4
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %20
10: ; preds = %5
%11 = load i8*, i8** %4
%12 = getelementptr inbounds i8, i8* %11, i64 0
%13 = load i8, i8* %12
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i64 0
store i8 %13, i8* %15
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i64 1
store i8* %17, i8** %3
%18 = load i8*, i8** %4
%19 = getelementptr inbounds i8, i8* %18, i64 1
store i8* %19, i8** %4
br label %5
20: ; preds = %5
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i64 0
store i8 0, i8* %22
ret void
}

LLVM IR (-O2):
define void @mystrcpy(i8* nocapture writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %11, %5 ], [ %3, %2 ]
%7 = phi i8* [ %10, %5 ], [ %1, %2 ]
%8 = phi i8* [ %9, %5 ], [ %0, %2 ]
store i8 %6, i8* %8
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = getelementptr inbounds i8, i8* %7, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
%14 = phi i8* [ %0, %2 ], [ %9, %5 ]
store i8 0, i8* %14
ret void
}
int ldnear(long double x, long double y) {
  long double t = x - y;
  return t == 0 || x / t > 100000000000000000000000000000000.0;
}


x86 assembly (clang, -O0):
<ldnear>:
push   %rbp
mov    %rsp,%rbp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
fsubrp %st,%st(1)
fstpt  -0x30(%rbp)
fldt   -0x30(%rbp)
mov    $0x1,%al
fldz
fxch   %st(1)
fucomip %st(1),%st
fstp   %st(0)
mov    %al,-0x31(%rbp)
jne    113c <ldnear+0x3c>
jp     113c <ldnear+0x3c>
jmp    1156 <ldnear+0x56>
fldt   -0x10(%rbp)
fldt   -0x30(%rbp)
fdivrp %st,%st(1)
fldl   0xeb6(%rip)
fxch   %st(1)
fucomip %st(1),%st
fstp   %st(0)
seta   %al
mov    %al,-0x31(%rbp)
mov    -0x31(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ldnear>:
fldt   0x8(%rsp)
fldt   0x18(%rsp)
fsubr  %st(1),%st
mov    $0x1,%eax
fldz
fxch   %st(1)
fucomi %st(1),%st
fstp   %st(1)
jne    111b <ldnear+0x1b>
jnp    1132 <ldnear+0x32>
fdivrp %st,%st(1)
fldl   0xedd(%rip)
xor    %eax,%eax
fxch   %st(1)
fucomip %st(1),%st
fstp   %st(0)
seta   %al
fldz
fldz
fstp   %st(1)
fstp   %st(0)
ret

LLVM IR (-O0):
define i32 @ldnear(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
%5 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%6 = load x86_fp80, x86_fp80* %3
%7 = load x86_fp80, x86_fp80* %4
%8 = fsub x86_fp80 %6, %7
store x86_fp80 %8, x86_fp80* %5
%9 = load x86_fp80, x86_fp80* %5
%10 = fcmp oeq x86_fp80 %9, 0xK00000000000000000000
br i1 %10, label %16, label %11
11: ; preds = %2
%12 = load x86_fp80, x86_fp80* %3
%13 = load x86_fp80, x86_fp80* %5
%14 = fdiv x86_fp80 %12, %13
%15 = fcmp ogt x86_fp80 %14, 0xK40699DC5ADA82B70B800
br label %16
16: ; preds = %11, %2
%17 = phi i1 [ true, %2 ], [ %15, %11 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @ldnear(x86_fp80 %0, x86_fp80 %1) {
%3 = fsub x86_fp80 %0, %1
%4 = fcmp oeq x86_fp80 %3, 0xK00000000000000000000
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = fdiv x86_fp80 %0, %3
%7 = fcmp ogt x86_fp80 %6, 0xK40699DC5ADA82B70B800
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %5, %2
%10 = phi i32 [ 1, %2 ], [ %8, %5 ]
ret i32 %10
}
int ands_si_test2(int a, int b, int c) {
  int d = a & 0xff;
  if (d == 0)
    return a + c;
  else
    return d;
}


x86 assembly (clang, -O0):
<ands_si_test2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    1130 <ands_si_test2+0x30>
mov    -0x8(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1136 <ands_si_test2+0x36>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ands_si_test2>:
movzbl %dil,%ecx
lea    (%rdx,%rdi,1),%eax
test   %ecx,%ecx
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ands_si_test2(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i32, i32* %5
%10 = and i32 %9, 255
store i32 %10, i32* %8
%11 = load i32, i32* %8
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %3
%14 = load i32, i32* %5
%15 = load i32, i32* %7
%16 = add nsw i32 %14, %15
store i32 %16, i32* %4
br label %19
17: ; preds = %3
%18 = load i32, i32* %8
store i32 %18, i32* %4
br label %19
19: ; preds = %17, %13
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @ands_si_test2(i32 %0, i32 %1, i32 %2) {
%4 = and i32 %0, 255
%5 = icmp eq i32 %4, 0
%6 = add nsw i32 %2, %0
%7 = select i1 %5, i32 %6, i32 %4
ret i32 %7
}
void fz_lock_default(void *user, int lock) {}


x86 assembly (clang, -O0):
<fz_lock_default>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fz_lock_default>:
ret

LLVM IR (-O0):
define void @fz_lock_default(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @fz_lock_default(i8* nocapture %0, i32 %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ putc(char, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ vfprintf(int /*<<< orphan*/, char const *,
                            int /*<<< orphan*/);
void vwarnx(const char *fmt, va_list ap) {
  if (fmt)
    vfprintf(stderr, fmt, ap);
  putc('\n', stderr);
}


x86 assembly (clang, -O0):
<vwarnx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     114f <vwarnx+0x2f>
mov    0x2e9f(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1040 <vfprintf@plt>
mov    0x2e8a(%rip),%rax
mov    (%rax),%esi
mov    $0xa,%edi
call   1030 <putc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vwarnx>:
push   %rax
test   %rdi,%rdi
je     1139 <vwarnx+0x19>
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
call   1040 <vfprintf@plt>
mov    0x2ea0(%rip),%rax
mov    (%rax),%esi
mov    $0xa,%edi
pop    %rax
jmp    1030 <putc@plt>

LLVM IR (-O0):
@stderr = global i32 0
define void @vwarnx(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %12
7: ; preds = %2
%8 = load i32, i32* @stderr
%9 = load i8*, i8** %3
%10 = load i32, i32* %4
%11 = call i32 @vfprintf(i32 %8, i8* %9, i32 %10)
br label %12
12: ; preds = %7, %2
%13 = load i32, i32* @stderr
%14 = call i32 @putc(i8 signext 10, i32 %13)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
define void @vwarnx(i8* %0, i32 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = load i32, i32* @stderr
%6 = tail call i32 @vfprintf(i32 %5, i8* %0, i32 %1)
br label %7
7: ; preds = %4, %2
%8 = load i32, i32* @stderr
%9 = tail call i32 @putc(i8 signext 10, i32 %8)
ret void
}
/* Variables and functions */
void *malloc(int);
void *ffi_alloc_(int size) { return malloc(size); }


x86 assembly (clang, -O0):
<ffi_alloc_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffi_alloc_>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @ffi_alloc_(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @malloc(i32 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @ffi_alloc_(i32 %0) {
%2 = tail call i8* @malloc(i32 %0)
ret i8* %2
}
/* Variables and functions */
int sensors_read_one_sysfs_chip(char const *, char const *, char const *);
int sensors_add_hwmon_device_compat(const char *path, const char *dev_name) {
  int err;
  err = sensors_read_one_sysfs_chip(path, dev_name, path);
  if (err < 0)
    return err;
  return 0;
}


x86 assembly (clang, -O0):
<sensors_add_hwmon_device_compat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <sensors_read_one_sysfs_chip@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jge    1149 <sensors_add_hwmon_device_compat+0x39>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1150 <sensors_add_hwmon_device_compat+0x40>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sensors_add_hwmon_device_compat>:
push   %rax
mov    %rdi,%rdx
call   1030 <sensors_read_one_sysfs_chip@plt>
mov    %eax,%ecx
sar    $0x1f,%ecx
and    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @sensors_add_hwmon_device_compat(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %4
%10 = call i32 @sensors_read_one_sysfs_chip(i8* %7, i8* %8, i8* %9)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %2
%14 = load i32, i32* %6
store i32 %14, i32* %3
br label %16
15: ; preds = %2
store i32 0, i32* %3
br label %16
16: ; preds = %15, %13
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @sensors_add_hwmon_device_compat(i8* %0, i8* %1) {
%3 = tail call i32 @sensors_read_one_sysfs_chip(i8* %0, i8* %1, i8* %0)
%4 = icmp slt i32 %3, 0
%5 = select i1 %4, i32 %3, i32 0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void mailimf_phrase_free(char *phrase) { free(phrase); }


x86 assembly (clang, -O0):
<mailimf_phrase_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mailimf_phrase_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @mailimf_phrase_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @mailimf_phrase_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
void *__memcpy_forward(void *, void const *, size_t);
void *memcpy(void *__restrict s, const void *__restrict ct, size_t n) {
  return __memcpy_forward(s, ct, n);
}


x86 assembly (clang, -O0):
<memcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <__memcpy_forward@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcpy>:
jmp    1030 <__memcpy_forward@plt>

LLVM IR (-O0):
define i8* @memcpy(i8* noalias %0, i8* noalias %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i8* @__memcpy_forward(i8* %7, i8* %8, i64 %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @memcpy(i8* noalias %0, i8* noalias %1, i64 %2) {
%4 = tail call i8* @__memcpy_forward(i8* %0, i8* %1, i64 %2)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ test_fd_bad_desc();
int /*<<< orphan*/ test_fd_copy();
int /*<<< orphan*/ test_fd_devnull();
int /*<<< orphan*/ test_fd_dup();
int /*<<< orphan*/ test_fd_multidesc();
int /*<<< orphan*/ test_fd_open_path();
int /*<<< orphan*/ test_fd_read();
int /*<<< orphan*/ test_fd_readwrite();
int test_fd_all() {
  test_fd_read();
  test_fd_devnull();
  test_fd_multidesc();
  test_fd_readwrite();
  test_fd_copy();
  test_fd_bad_desc();
  test_fd_open_path();
  test_fd_dup();
  return 0;
}


x86 assembly (clang, -O0):
<test_fd_all>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <test_fd_read@plt>
mov    $0x0,%al
call   1050 <test_fd_devnull@plt>
mov    $0x0,%al
call   1080 <test_fd_multidesc@plt>
mov    $0x0,%al
call   1070 <test_fd_readwrite@plt>
mov    $0x0,%al
call   1040 <test_fd_copy@plt>
mov    $0x0,%al
call   1090 <test_fd_bad_desc@plt>
mov    $0x0,%al
call   10a0 <test_fd_open_path@plt>
mov    $0x0,%al
call   1060 <test_fd_dup@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_fd_all>:
push   %rax
xor    %eax,%eax
call   1030 <test_fd_read@plt>
xor    %eax,%eax
call   1050 <test_fd_devnull@plt>
xor    %eax,%eax
call   1080 <test_fd_multidesc@plt>
xor    %eax,%eax
call   1070 <test_fd_readwrite@plt>
xor    %eax,%eax
call   1040 <test_fd_copy@plt>
xor    %eax,%eax
call   1090 <test_fd_bad_desc@plt>
xor    %eax,%eax
call   10a0 <test_fd_open_path@plt>
xor    %eax,%eax
call   1060 <test_fd_dup@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @test_fd_all() {
%1 = call i32 (...) @test_fd_read()
%2 = call i32 (...) @test_fd_devnull()
%3 = call i32 (...) @test_fd_multidesc()
%4 = call i32 (...) @test_fd_readwrite()
%5 = call i32 (...) @test_fd_copy()
%6 = call i32 (...) @test_fd_bad_desc()
%7 = call i32 (...) @test_fd_open_path()
%8 = call i32 (...) @test_fd_dup()
ret i32 0
}

LLVM IR (-O2):
define i32 @test_fd_all() {
%1 = tail call i32 (...) @test_fd_read()
%2 = tail call i32 (...) @test_fd_devnull()
%3 = tail call i32 (...) @test_fd_multidesc()
%4 = tail call i32 (...) @test_fd_readwrite()
%5 = tail call i32 (...) @test_fd_copy()
%6 = tail call i32 (...) @test_fd_bad_desc()
%7 = tail call i32 (...) @test_fd_open_path()
%8 = tail call i32 (...) @test_fd_dup()
ret i32 0
}
/* Variables and functions */
size_t MPFR_PREC_MIN;
size_t getLogFileIndexFromCurrentPrecision(long int precision) {
  return precision - MPFR_PREC_MIN;
}


x86 assembly (clang, -O0):
<getLogFileIndexFromCurrentPrecision>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2ec5(%rip),%rcx
sub    (%rcx),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getLogFileIndexFromCurrentPrecision>:
mov    %rdi,%rax
mov    0x2ece(%rip),%rcx
sub    (%rcx),%rax
ret

LLVM IR (-O0):
@MPFR_PREC_MIN = global i64 0
define i64 @getLogFileIndexFromCurrentPrecision(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = load i64, i64* @MPFR_PREC_MIN
%5 = sub i64 %3, %4
ret i64 %5
}

LLVM IR (-O2):
@MPFR_PREC_MIN = global i64 0
define i64 @getLogFileIndexFromCurrentPrecision(i64 %0) {
%2 = load i64, i64* @MPFR_PREC_MIN
%3 = sub i64 %0, %2
ret i64 %3
}
/* Variables and functions */
scalar_t__ pollen_parts_Led2_isOn__E();
int /*<<< orphan*/ pollen_parts_Led2_off__E();
int /*<<< orphan*/ pollen_parts_Led2_on__E();
void pollen_parts_Led2_toggle__E() {
  if (pollen_parts_Led2_isOn__E()) {
    pollen_parts_Led2_off__E();
  } else {
    pollen_parts_Led2_on__E();
  }
}


x86 assembly (clang, -O0):
<pollen_parts_Led2_toggle__E>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <pollen_parts_Led2_isOn__E@plt>
cmp    $0x0,%rax
je     1151 <pollen_parts_Led2_toggle__E+0x21>
mov    $0x0,%al
call   1030 <pollen_parts_Led2_off__E@plt>
jmp    1158 <pollen_parts_Led2_toggle__E+0x28>
mov    $0x0,%al
call   1040 <pollen_parts_Led2_on__E@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pollen_parts_Led2_toggle__E>:
push   %rax
xor    %eax,%eax
call   1050 <pollen_parts_Led2_isOn__E@plt>
test   %rax,%rax
je     1145 <pollen_parts_Led2_toggle__E+0x15>
xor    %eax,%eax
pop    %rcx
jmp    1030 <pollen_parts_Led2_off__E@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <pollen_parts_Led2_on__E@plt>

LLVM IR (-O0):
define void @pollen_parts_Led2_toggle__E() {
%1 = call i64 (...) @pollen_parts_Led2_isOn__E()
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = call i32 (...) @pollen_parts_Led2_off__E()
br label %7
5: ; preds = %0
%6 = call i32 (...) @pollen_parts_Led2_on__E()
br label %7
7: ; preds = %5, %3
ret void
}

LLVM IR (-O2):
define void @pollen_parts_Led2_toggle__E() {
%1 = tail call i64 (...) @pollen_parts_Led2_isOn__E()
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @pollen_parts_Led2_off__E()
br label %7
5: ; preds = %0
%6 = tail call i32 (...) @pollen_parts_Led2_on__E()
br label %7
7: ; preds = %5, %3
ret void
}
unsigned int get_bitsize(unsigned long long max_value) {
  unsigned int size = 1;
  max_value = max_value >> 1;
  while (max_value) {
    size += 1;
    max_value = max_value >> 1;
  }
  return size;
}


x86 assembly (clang, -O0):
<get_bitsize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1140 <get_bitsize+0x40>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111b <get_bitsize+0x1b>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_bitsize>:
mov    $0x1,%eax
cmp    $0x2,%rdi
jb     112f <get_bitsize+0x2f>
mov    $0x1,%eax
mov    %rdi,%rcx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
shr    %rcx
add    $0x1,%eax
cmp    $0x3,%rdi
mov    %rcx,%rdi
ja     1120 <get_bitsize+0x20>
ret

LLVM IR (-O0):
define i32 @get_bitsize(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
store i32 1, i32* %3
%4 = load i64, i64* %2
%5 = lshr i64 %4, 1
store i64 %5, i64* %2
br label %6
6: ; preds = %9, %1
%7 = load i64, i64* %2
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %6
%10 = load i32, i32* %3
%11 = add i32 %10, 1
store i32 %11, i32* %3
%12 = load i64, i64* %2
%13 = lshr i64 %12, 1
store i64 %13, i64* %2
br label %6
14: ; preds = %6
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @get_bitsize(i64 %0) {
%2 = icmp ult i64 %0, 2
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 1, %1 ]
%5 = phi i64 [ %6, %3 ], [ %0, %1 ]
%6 = lshr i64 %5, 1
%7 = add nuw nsw i32 %4, 1
%8 = icmp ult i64 %5, 4
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ 1, %1 ], [ %7, %3 ]
ret i32 %10
}
void SplitUVRow_C() {}


x86 assembly (clang, -O0):
<SplitUVRow_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SplitUVRow_C>:
ret

LLVM IR (-O0):
define void @SplitUVRow_C() {
ret void
}

LLVM IR (-O2):
define void @SplitUVRow_C() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_eval(int);
int strlen(char const *);
void strlen_constant1() {
  const char *a = "123";
  clang_analyzer_eval(strlen(a) == 3);
}


x86 assembly (clang, -O0):
<strlen_constant1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
cmp    $0x3,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <clang_analyzer_eval@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen_constant1>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <strlen@plt>
xor    %edi,%edi
cmp    $0x3,%eax
sete   %dil
pop    %rax
jmp    1040 <clang_analyzer_eval@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"123\00"
define void @strlen_constant1() {
%1 = alloca i8*
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = call i32 @strlen(i8* %2)
%4 = icmp eq i32 %3, 3
%5 = zext i1 %4 to i32
%6 = call i32 @clang_analyzer_eval(i32 %5)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"123\00"
define void @strlen_constant1() {
%1 = tail call i32 @strlen(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i32 %1, 3
%3 = zext i1 %2 to i32
%4 = tail call i32 @clang_analyzer_eval(i32 %3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int Read(int, int *, int);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void wait_on(int pype) {
  int retval, buf = 0;
  retval = Read(pype, &buf, sizeof(buf));
  if (retval == 0) {
    fprintf(stderr, "\nread returned 0\n");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<wait_on>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x4(%rbp),%edi
lea    -0xc(%rbp),%rsi
mov    $0x4,%edx
call   1030 <Read@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    117f <wait_on+0x4f>
mov    0x2e79(%rip),%rax
mov    (%rax),%edi
lea    0xe90(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait_on>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
call   1030 <Read@plt>
test   %eax,%eax
je     114e <wait_on+0x1e>
pop    %rax
ret
mov    0x2e8b(%rip),%rax
mov    (%rax),%edi
lea    0xea2(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [18 x i8] c"\0Aread returned 0\0A\00"
define void @wait_on(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
%5 = load i32, i32* %2
%6 = call i32 @Read(i32 %5, i32* %4, i32 4)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %1
%10 = load i32, i32* @stderr
%11 = call i32 @fprintf(i32 %10, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%12 = call i32 @exit(i32 1)
unreachable
13: ; preds = %1
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [18 x i8] c"\0Aread returned 0\0A\00"
define void @wait_on(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%4 = call i32 @Read(i32 %0, i32* %2, i32 4)
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* @stderr
%8 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%9 = call i32 @exit(i32 1)
unreachable
10: ; preds = %1
ret void
}
int test_imm_DFuint8_reg(unsigned char val) {
  return ((val) & (0xDF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DFuint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xdf,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DFuint8_reg>:
test   $0xdf,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DFuint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 223
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_DFuint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -33
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int get_fips_error_state() { return 0; }


x86 assembly (clang, -O0):
<get_fips_error_state>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_fips_error_state>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_fips_error_state() {
ret i32 0
}

LLVM IR (-O2):
define i32 @get_fips_error_state() {
ret i32 0
}
putchar(c) {
  if (c == '\n')
    bdos(2, '\r');
  bdos(2, c);
  return c & 255;
}


x86 assembly (clang, -O0):
<putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jne    1136 <putchar+0x26>
mov    $0x2,%edi
mov    $0xd,%esi
mov    $0x0,%al
call   1030 <bdos@plt>
mov    -0x4(%rbp),%esi
mov    $0x2,%edi
mov    $0x0,%al
call   1030 <bdos@plt>
mov    -0x4(%rbp),%eax
and    $0xff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putchar>:
push   %rbx
mov    %edi,%ebx
cmp    $0xa,%edi
jne    1129 <putchar+0x19>
mov    $0x2,%edi
mov    $0xd,%esi
xor    %eax,%eax
call   1030 <bdos@plt>
mov    $0x2,%edi
mov    %ebx,%esi
xor    %eax,%eax
call   1030 <bdos@plt>
movzbl %bl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @putchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 10
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (i32, i32, ...) bitcast (i32 (...)* @bdos to i32 (i32, i32, ...)*)(i32 2, i32 13)
br label %7
7: ; preds = %5, %1
%8 = load i32, i32* %2
%9 = call i32 (i32, i32, ...) bitcast (i32 (...)* @bdos to i32 (i32, i32, ...)*)(i32 2, i32 %8)
%10 = load i32, i32* %2
%11 = and i32 %10, 255
ret i32 %11
}

LLVM IR (-O2):
define i32 @putchar(i32 %0) {
%2 = icmp eq i32 %0, 10
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @bdos to i32 (i32, i32, ...)*)(i32 2, i32 13)
br label %5
5: ; preds = %3, %1
%6 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @bdos to i32 (i32, i32, ...)*)(i32 2, i32 %0)
%7 = and i32 %0, 255
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ errno;
int /*<<< orphan*/ error(int, int /*<<< orphan*/, char *, char const *);
void exit_errno(const char *message) { error(1, errno, "error: %s", message); }


x86 assembly (clang, -O0):
<exit_errno>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%esi
mov    -0x8(%rbp),%rcx
mov    $0x1,%edi
lea    0xecb(%rip),%rdx
call   1030 <error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exit_errno>:
mov    %rdi,%rcx
mov    0x2ec6(%rip),%rax
mov    (%rax),%esi
lea    0xedd(%rip),%rdx
mov    $0x1,%edi
jmp    1030 <error@plt>

LLVM IR (-O0):
@errno = global i32 0
@.str = [10 x i8] c"error: %s\00"
define void @exit_errno(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @errno
%4 = load i8*, i8** %2
%5 = call i32 @error(i32 1, i32 %3, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@errno = global i32 0
@.str = [10 x i8] c"error: %s\00"
define void @exit_errno(i8* %0) {
%2 = load i32, i32* @errno
%3 = tail call i32 @error(i32 1, i32 %2, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void swap(int *p, int *q) {
  *p = *p + *q;
  *q = *p - *q;
  *p = *p - *q;
  printf("\n swaped %d %d", *p, *q);
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
add    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
sub    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
sub    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rax
mov    (%rax),%edx
lea    0xe97(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rsi),%ecx
add    (%rdi),%ecx
mov    %ecx,(%rdi)
sub    (%rsi),%ecx
mov    %ecx,(%rsi)
mov    (%rdi),%eax
sub    %ecx,%eax
mov    %eax,(%rdi)
mov    (%rsi),%edx
lea    0xed7(%rip),%rdi
mov    %eax,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"\0A swaped %d %d\00"
define void @swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = add nsw i32 %6, %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32*, i32** %3
%12 = load i32, i32* %11
%13 = load i32*, i32** %4
%14 = load i32, i32* %13
%15 = sub nsw i32 %12, %14
%16 = load i32*, i32** %4
store i32 %15, i32* %16
%17 = load i32*, i32** %3
%18 = load i32, i32* %17
%19 = load i32*, i32** %4
%20 = load i32, i32* %19
%21 = sub nsw i32 %18, %20
%22 = load i32*, i32** %3
store i32 %21, i32* %22
%23 = load i32*, i32** %3
%24 = load i32, i32* %23
%25 = load i32*, i32** %4
%26 = load i32, i32* %25
%27 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %24, i32 %26)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"\0A swaped %d %d\00"
define void @swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = add nsw i32 %4, %3
store i32 %5, i32* %0
%6 = load i32, i32* %1
%7 = sub nsw i32 %5, %6
store i32 %7, i32* %1
%8 = load i32, i32* %0
%9 = sub nsw i32 %8, %7
store i32 %9, i32* %0
%10 = load i32, i32* %1
%11 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %9, i32 %10)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_t;

/* Variables and functions */
int /*<<< orphan*/ ENOTSUP;
int /*<<< orphan*/ errno;
int pthread_cancel(pthread_t thread) {
  errno = ENOTSUP;
  return -1;
}


x86 assembly (clang, -O0):
<pthread_cancel>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    0x2eda(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec1(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_cancel>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOTSUP = global i32 0
@errno = global i32 0
define i32 @pthread_cancel(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @ENOTSUP
store i32 %3, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOTSUP = global i32 0
@errno = global i32 0
define i32 @pthread_cancel(i32 %0) {
%2 = load i32, i32* @ENOTSUP
store i32 %2, i32* @errno
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ _write(int, char *, int);
int main() {
  _write(1, "Hello World\n", 12);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
lea    0xed5(%rip),%rsi
mov    $0xc,%edx
call   1030 <_write@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rsi
mov    $0x1,%edi
mov    $0xc,%edx
call   1030 <_write@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello World\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @_write(i32 1, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 12)
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hello World\0A\00"
define i32 @main() {
%1 = tail call i32 @_write(i32 1, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 12)
ret i32 0
}
void PackAuxiliaryData(struct bit_stream *bs) {}


x86 assembly (clang, -O0):
<PackAuxiliaryData>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PackAuxiliaryData>:
ret

LLVM IR (-O0):
%struct.bit_stream = type opaque
define void @PackAuxiliaryData(%struct.bit_stream* %0) {
%2 = alloca %struct.bit_stream*
store %struct.bit_stream* %0, %struct.bit_stream** %2
ret void
}

LLVM IR (-O2):
%struct.bit_stream = type opaque
define void @PackAuxiliaryData(%struct.bit_stream* nocapture %0) {
ret void
}
short test_59_2(short *mem) { return __atomic_fetch_xor(mem + 0, 1, 4); }


x86 assembly (clang, -O0):
<test_59_2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movw   $0x1,-0xa(%rbp)
mov    -0xa(%rbp),%cx
mov    %cx,-0x10(%rbp)
mov    (%rax),%ax
mov    %ax,-0xe(%rbp)
mov    -0xe(%rbp),%ax
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%dx
mov    %dx,%si
mov    %ax,%dx
mov    %edx,-0x24(%rbp)
xor    %esi,%edx
mov    %edx,-0x20(%rbp)
lock cmpxchg %dx,(%rcx)
sete   %cl
mov    %ax,-0x1a(%rbp)
test   $0x1,%cl
mov    %ax,-0xe(%rbp)
jne    115d <test_59_2+0x5d>
jmp    1125 <test_59_2+0x25>
mov    -0x1a(%rbp),%ax
mov    %ax,-0xc(%rbp)
movswl -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_59_2>:
movzwl (%rdi),%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %eax,%ecx
xor    $0x1,%ecx
lock cmpxchg %cx,(%rdi)
jne    1110 <test_59_2+0x10>
ret

LLVM IR (-O0):
define signext i16 @test_59_2(i16* %0) {
%2 = alloca i16*
%3 = alloca i16
%4 = alloca i16
store i16* %0, i16** %2
%5 = load i16*, i16** %2
%6 = getelementptr inbounds i16, i16* %5, i64 0
store i16 1, i16* %3
%7 = load i16, i16* %3
%8 = atomicrmw xor i16* %6, i16 %7 acq_rel
store i16 %8, i16* %4
%9 = load i16, i16* %4
ret i16 %9
}

LLVM IR (-O2):
define signext i16 @test_59_2(i16* nocapture %0) {
%2 = atomicrmw xor i16* %0, i16 1 acq_rel
ret i16 %2
}
int bitlen(unsigned d) {
  int len = 0;
  for (; d; d >>= 1) {
    len++;
  }
  return len;
}


x86 assembly (clang, -O0):
<bitlen>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     112f <bitlen+0x2f>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <bitlen+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitlen>:
xor    %eax,%eax
test   %edi,%edi
je     111c <bitlen+0x1c>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
add    $0x1,%eax
shr    %ecx
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <bitlen+0x10>
ret

LLVM IR (-O0):
define i32 @bitlen(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
br label %10
10: ; preds = %7
%11 = load i32, i32* %2
%12 = lshr i32 %11, 1
store i32 %12, i32* %2
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @bitlen(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = phi i32 [ %7, %3 ], [ %0, %1 ]
%6 = add nuw nsw i32 %4, 1
%7 = lshr i32 %5, 1
%8 = icmp ult i32 %5, 2
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %10
}