xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
size_t list_meter_uint16_t(const void *el) {
  if (el) {
  }
  return sizeof(uint16_t);
}


x86 assembly (clang, -O0):
<list_meter_uint16_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1118 <list_meter_uint16_t+0x18>
jmp    1118 <list_meter_uint16_t+0x18>
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_meter_uint16_t>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i64 @list_meter_uint16_t(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %6
5: ; preds = %1
br label %6
6: ; preds = %5, %1
ret i64 4
}

LLVM IR (-O2):
define i64 @list_meter_uint16_t(i8* nocapture readnone %0) {
ret i64 4
}
/* Type definitions */
typedef int key_t;

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ newtrace(char *);
int /*<<< orphan*/ sprintf(char *, char *, int);
void shm_err(key_t key) {
  char buf[64];
  sprintf(buf, "SHM Error! key = 0x%X.", key & 0xffff);
  newtrace(buf);
  exit(1);
}


x86 assembly (clang, -O0):
<shm_err>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x50(%rbp),%rdi
mov    -0x4(%rbp),%edx
and    $0xffff,%edx
lea    0xeb1(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x50(%rbp),%rdi
call   1030 <newtrace@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<shm_err>:
push   %rbx
sub    $0x40,%rsp
movzwl %di,%edx
lea    0xec1(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <newtrace@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"SHM Error! key = 0x%X.\00"
define void @shm_err(i32 %0) {
%2 = alloca i32
%3 = alloca [64 x i8]
store i32 %0, i32* %2
%4 = getelementptr inbounds [64 x i8], [64 x i8]* %3, i64 0, i64 0
%5 = load i32, i32* %2
%6 = and i32 %5, 65535
%7 = call i32 @sprintf(i8* %4, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = getelementptr inbounds [64 x i8], [64 x i8]* %3, i64 0, i64 0
%9 = call i32 @newtrace(i8* %8)
%10 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [23 x i8] c"SHM Error! key = 0x%X.\00"
define void @shm_err(i32 %0) {
%2 = alloca [64 x i8]
%3 = getelementptr inbounds [64 x i8], [64 x i8]* %2, i64 0, i64 0
%4 = and i32 %0, 65535
%5 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = call i32 @newtrace(i8* %3)
%7 = call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void *f(void *arg) {
  printf("running f(%d)\n", (int)arg);
  return 10;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%esi
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
mov    $0xa,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
mov    $0xa,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"running f(%d)\0A\00"
define i8* @f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i32
%5 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i8* inttoptr (i64 10 to i8*)
}

LLVM IR (-O2):
@.str = [15 x i8] c"running f(%d)\0A\00"
define i8* @f(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i32
%4 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i8* inttoptr (i64 10 to i8*)
}
int f7b(int *p) {
  p = (0);
  return 1;
}


x86 assembly (clang, -O0):
<f7b>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f7b>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @f7b(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
store i32* null, i32** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @f7b(i32* nocapture readnone %0) {
ret i32 1
}
void UYVYToYRow_Any_NEON() {}


x86 assembly (clang, -O0):
<UYVYToYRow_Any_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UYVYToYRow_Any_NEON>:
ret

LLVM IR (-O0):
define void @UYVYToYRow_Any_NEON() {
ret void
}

LLVM IR (-O2):
define void @UYVYToYRow_Any_NEON() {
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int uint16_t;

/* Variables and functions */
void USBHostPwrConfig(uint32_t ui32Base, uint32_t ui32Flags) {
  ;

  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000430))) = ui32Flags >> 16;
  (*((volatile uint16_t *)(ui32Base + 0x00000400))) =
      (ui32Flags | ((*((volatile uint16_t *)(ui32Base + 0x00000400))) &
                    ~(0x00000300 | 0x00000040 | 0x00000020 | 0x00000003)));
}


x86 assembly (clang, -O0):
<USBHostPwrConfig>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
sar    $0x10,%ecx
mov    -0x4(%rbp),%eax
add    $0x430,%eax
cltq
mov    %ecx,(%rax)
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x400,%eax
cltq
mov    (%rax),%eax
and    $0xfffffc9c,%eax
or     %eax,%ecx
mov    -0x4(%rbp),%eax
add    $0x400,%eax
cltq
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBHostPwrConfig>:
mov    %esi,%eax
sar    $0x10,%eax
movslq %edi,%rcx
mov    %eax,0x430(%rcx)
mov    $0xfffffc9c,%eax
and    0x400(%rcx),%eax
or     %esi,%eax
mov    %eax,0x400(%rcx)
ret

LLVM IR (-O0):
define void @USBHostPwrConfig(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 16
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 1072
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
store volatile i32 %6, i32* %10
%11 = load i32, i32* %4
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1024
%14 = sext i32 %13 to i64
%15 = inttoptr i64 %14 to i32*
%16 = load volatile i32, i32* %15
%17 = and i32 %16, -868
%18 = or i32 %11, %17
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1024
%21 = sext i32 %20 to i64
%22 = inttoptr i64 %21 to i32*
store volatile i32 %18, i32* %22
ret void
}

LLVM IR (-O2):
define void @USBHostPwrConfig(i32 %0, i32 %1) {
%3 = ashr i32 %1, 16
%4 = add nsw i32 %0, 1072
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
store volatile i32 %3, i32* %6
%7 = add nsw i32 %0, 1024
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
%10 = load volatile i32, i32* %9
%11 = and i32 %10, -868
%12 = or i32 %11, %1
store volatile i32 %12, i32* %9
ret void
}
/* Type definitions */
struct cnfnode {
  int dummy;
};

/* Variables and functions */
struct cnfnode *parse_pair_line_sep(char const **, int);
struct cnfnode *parse_pair_line(const char **pp) {
  return parse_pair_line_sep(pp, -1);
}


x86 assembly (clang, -O0):
<parse_pair_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xffffffff,%esi
call   1030 <parse_pair_line_sep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_pair_line>:
mov    $0xffffffff,%esi
jmp    1030 <parse_pair_line_sep@plt>

LLVM IR (-O0):
%struct.cnfnode = type { i32 }
define %struct.cnfnode* @parse_pair_line(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = call %struct.cnfnode* @parse_pair_line_sep(i8** %3, i32 -1)
ret %struct.cnfnode* %4
}

LLVM IR (-O2):
%struct.cnfnode = type { i32 }
define %struct.cnfnode* @parse_pair_line(i8** %0) {
%2 = tail call %struct.cnfnode* @parse_pair_line_sep(i8** %0, i32 -1)
ret %struct.cnfnode* %2
}
int emac1_etherstatsoctets_set(unsigned int dev_id,
                               union emac1_etherstatsoctets_u *value) {
  return 1;
}


x86 assembly (clang, -O0):
<emac1_etherstatsoctets_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<emac1_etherstatsoctets_set>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%union.emac1_etherstatsoctets_u = type opaque
define i32 @emac1_etherstatsoctets_set(i32 %0, %union.emac1_etherstatsoctets_u* %1) {
%3 = alloca i32
%4 = alloca %union.emac1_etherstatsoctets_u*
store i32 %0, i32* %3
store %union.emac1_etherstatsoctets_u* %1, %union.emac1_etherstatsoctets_u** %4
ret i32 1
}

LLVM IR (-O2):
%union.emac1_etherstatsoctets_u = type opaque
define i32 @emac1_etherstatsoctets_set(i32 %0, %union.emac1_etherstatsoctets_u* nocapture readnone %1) {
ret i32 1
}
/* Variables and functions */
int EPOLLERR;
int EPOLLET;
int EPOLLRDHUP;
int _err_event() { return EPOLLRDHUP | EPOLLERR | EPOLLET; }


x86 assembly (clang, -O0):
<_err_event>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%eax
mov    0x2ecc(%rip),%rcx
or     (%rcx),%eax
mov    0x2eb3(%rip),%rcx
or     (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_err_event>:
mov    0x2ed1(%rip),%rcx
mov    0x2ed2(%rip),%rax
mov    (%rax),%eax
or     (%rcx),%eax
mov    0x2eb7(%rip),%rcx
or     (%rcx),%eax
ret

LLVM IR (-O0):
@EPOLLRDHUP = global i32 0
@EPOLLERR = global i32 0
@EPOLLET = global i32 0
define i32 @_err_event() {
%1 = load i32, i32* @EPOLLRDHUP
%2 = load i32, i32* @EPOLLERR
%3 = or i32 %1, %2
%4 = load i32, i32* @EPOLLET
%5 = or i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
@EPOLLRDHUP = global i32 0
@EPOLLERR = global i32 0
@EPOLLET = global i32 0
define i32 @_err_event() {
%1 = load i32, i32* @EPOLLRDHUP
%2 = load i32, i32* @EPOLLERR
%3 = or i32 %2, %1
%4 = load i32, i32* @EPOLLET
%5 = or i32 %3, %4
ret i32 %5
}
int mod(int a, int b) {
  int c;
  while (a >= b) {
    c = b;
    do {
      c <<= 1;
    } while (c <= a && c < 8192);
    c >>= 1;
    a -= c;
  }
  return a;
}


x86 assembly (clang, -O0):
<mod>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jl     1167 <mod+0x67>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
xor    %eax,%eax
cmp    -0x4(%rbp),%ecx
mov    %al,-0xd(%rbp)
jg     1143 <mod+0x43>
cmpl   $0x2000,-0xc(%rbp)
setl   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    111c <mod+0x1c>
mov    -0xc(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    110a <mod+0xa>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod>:
mov    %edi,%eax
cmp    %esi,%edi
jge    1118 <mod+0x18>
ret
nopw   0x0(%rax,%rax,1)
sar    %ecx
sub    %ecx,%eax
cmp    %esi,%eax
jl     1106 <mod+0x6>
mov    %esi,%ecx
nopw   0x0(%rax,%rax,1)
add    %ecx,%ecx
cmp    %eax,%ecx
jg     1110 <mod+0x10>
cmp    $0x2000,%ecx
jl     1120 <mod+0x20>
jmp    1110 <mod+0x10>

LLVM IR (-O0):
define i32 @mod(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %6
6: ; preds = %24, %2
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = icmp sge i32 %7, %8
br i1 %9, label %10, label %30
10: ; preds = %6
%11 = load i32, i32* %4
store i32 %11, i32* %5
br label %12
12: ; preds = %22, %10
%13 = load i32, i32* %5
%14 = shl i32 %13, 1
store i32 %14, i32* %5
br label %15
15: ; preds = %12
%16 = load i32, i32* %5
%17 = load i32, i32* %3
%18 = icmp sle i32 %16, %17
br i1 %18, label %19, label %22
19: ; preds = %15
%20 = load i32, i32* %5
%21 = icmp slt i32 %20, 8192
br label %22
22: ; preds = %19, %15
%23 = phi i1 [ false, %15 ], [ %21, %19 ]
br i1 %23, label %12, label %24
24: ; preds = %22
%25 = load i32, i32* %5
%26 = ashr i32 %25, 1
store i32 %26, i32* %5
%27 = load i32, i32* %5
%28 = load i32, i32* %3
%29 = sub nsw i32 %28, %27
store i32 %29, i32* %3
br label %6
30: ; preds = %6
%31 = load i32, i32* %3
ret i32 %31
}

LLVM IR (-O2):
define i32 @mod(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
br i1 %3, label %16, label %4
4: ; preds = %2, %12
%5 = phi i32 [ %14, %12 ], [ %0, %2 ]
br label %6
6: ; preds = %4, %6
%7 = phi i32 [ %8, %6 ], [ %1, %4 ]
%8 = shl i32 %7, 1
%9 = icmp sle i32 %8, %5
%10 = icmp slt i32 %8, 8192
%11 = and i1 %9, %10
br i1 %11, label %6, label %12
12: ; preds = %6
%13 = ashr exact i32 %8, 1
%14 = sub nsw i32 %5, %13
%15 = icmp slt i32 %14, %1
br i1 %15, label %16, label %4
16: ; preds = %12, %2
%17 = phi i32 [ %0, %2 ], [ %14, %12 ]
ret i32 %17
}
void netprog_reboot() {}


x86 assembly (clang, -O0):
<netprog_reboot>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<netprog_reboot>:
ret

LLVM IR (-O0):
define void @netprog_reboot() {
ret void
}

LLVM IR (-O2):
define void @netprog_reboot() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ GLshort;

/* Variables and functions */
int /*<<< orphan*/ glRectsv(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
void Rectsv(GLshort v1[2], GLshort v2[2]) { glRectsv(v1, v2); }


x86 assembly (clang, -O0):
<Rectsv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <glRectsv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Rectsv>:
jmp    1030 <glRectsv@plt>

LLVM IR (-O0):
define void @Rectsv(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @glRectsv(i32* %5, i32* %6)
ret void
}

LLVM IR (-O2):
define void @Rectsv(i32* %0, i32* %1) {
%3 = tail call i32 @glRectsv(i32* %0, i32* %1)
ret void
}
int do_964() { return 964; }


x86 assembly (clang, -O0):
<do_964>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3c4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_964>:
mov    $0x3c4,%eax
ret

LLVM IR (-O0):
define i32 @do_964() {
ret i32 964
}

LLVM IR (-O2):
define i32 @do_964() {
ret i32 964
}
int feenableexcept(int excepts) { return -1; }


x86 assembly (clang, -O0):
<feenableexcept>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<feenableexcept>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @feenableexcept(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @feenableexcept(i32 %0) {
ret i32 -1
}
unsigned long edf_maxfiles(void) { return (20); }


x86 assembly (clang, -O0):
<edf_maxfiles>:
push   %rbp
mov    %rsp,%rbp
mov    $0x14,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<edf_maxfiles>:
mov    $0x14,%eax
ret

LLVM IR (-O0):
define i64 @edf_maxfiles() {
ret i64 20
}

LLVM IR (-O2):
define i64 @edf_maxfiles() {
ret i64 20
}
int test_imm_44uint16_reg(unsigned short val) {
  return ((val) & (0x44 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_44uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x44,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_44uint16_reg>:
test   $0x44,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_44uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 68
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_44uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 68
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void catomic_synchronize() { __sync_synchronize(); }


x86 assembly (clang, -O0):
<catomic_synchronize>:
push   %rbp
mov    %rsp,%rbp
mfence
pop    %rbp
ret

x86 assembly (clang, -O2):
<catomic_synchronize>:
mfence
ret

LLVM IR (-O0):
define void @catomic_synchronize() {
fence seq_cst
ret void
}

LLVM IR (-O2):
define void @catomic_synchronize() {
fence seq_cst
ret void
}
/* Variables and functions */
double log_factorial(int);
int /*<<< orphan*/ printf(char *, double);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n;
  scanf("%d", &n);
  printf("%f", log_factorial(n));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1030 <log_factorial@plt>
lea    0xea5(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
call   1030 <log_factorial@plt>
lea    0xeb1(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [3 x i8] c"%f\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = call double @log_factorial(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), double %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [3 x i8] c"%f\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call double @log_factorial(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), double %5)
ret i32 0
}
int func() { return 3; }


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @func() {
ret i32 3
}

LLVM IR (-O2):
define i32 @func() {
ret i32 3
}
int do_478() { return 478; }


x86 assembly (clang, -O0):
<do_478>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1de,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_478>:
mov    $0x1de,%eax
ret

LLVM IR (-O0):
define i32 @do_478() {
ret i32 478
}

LLVM IR (-O2):
define i32 @do_478() {
ret i32 478
}
/* Type definitions */
struct tm {
  char const *tm_zone;
};

/* Variables and functions */
const char *tm_gettimezone(struct tm date) { return date.tm_zone; }


x86 assembly (clang, -O0):
<tm_gettimezone>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tm_gettimezone>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
%struct.tm = type { i8* }
define i8* @tm_gettimezone(i8* %0) {
%2 = alloca %struct.tm
%3 = getelementptr inbounds %struct.tm, %struct.tm* %2, i32 0, i32 0
store i8* %0, i8** %3
%4 = getelementptr inbounds %struct.tm, %struct.tm* %2, i32 0, i32 0
%5 = load i8*, i8** %4
ret i8* %5
}

LLVM IR (-O2):
define i8* @tm_gettimezone(i8* readnone returned %0) {
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_queue_isempty() {
  printf("NOT IMPLEMENTED:"
         "pa_queue_isempty"
         "\n");
}


x86 assembly (clang, -O0):
<pa_queue_isempty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_queue_isempty>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"NOT IMPLEMENTED:pa_queue_isempty\0A\00"
define i32 @pa_queue_isempty() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [33 x i8] c"NOT IMPLEMENTED:pa_queue_isempty\00"
define i32 @pa_queue_isempty() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main() {
  int c = 0;
  for (c = 0; c < 256; c++) {
    printf("%c %d", c, c);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x100,-0x8(%rbp)
jge    115a <main+0x4a>
mov    -0x8(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    112d <main+0x1d>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xee3(%rip),%r14
nopl   (%rax)
mov    %r14,%rdi
mov    %ebx,%esi
mov    %ebx,%edx
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x100,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%c %d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 0, i32* %2
br label %3
3: ; preds = %10, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 256
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = load i32, i32* %2
%8 = load i32, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8)
br label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %3
13: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%c %d\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %2)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 256
br i1 %5, label %6, label %1
6: ; preds = %1
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned int);
void add(unsigned int t1, unsigned int t2) {
  static int sum, car;
  while (t2 != 0) {
    car = t1 & t2;
    t1 = t1 ^ t2;
    t2 = car << 1;
  }
  printf("\n%d", t1);
}


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     114e <add+0x3e>
mov    -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
mov    %eax,0x2efc(%rip)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    0x2eed(%rip),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    111e <add+0xe>
mov    -0x4(%rbp),%esi
lea    0xea8(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
mov    %edi,%eax
test   %esi,%esi
je     112a <add+0x1a>
mov    %esi,%ecx
nopl   0x0(%rax,%rax,1)
and    %eax,%ecx
xor    %esi,%eax
add    %ecx,%ecx
mov    %ecx,%esi
jne    1120 <add+0x10>
lea    0xecf(%rip),%rdi
mov    %eax,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@add.sum = internal global i32 0
@add.car = internal global i32 0
@.str = [4 x i8] c"\0A%d\00"
define void @add(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %5
5: ; preds = %8, %2
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %5
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = and i32 %9, %10
store i32 %11, i32* @add.car
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = xor i32 %12, %13
store i32 %14, i32* %3
%15 = load i32, i32* @add.car
%16 = shl i32 %15, 1
store i32 %16, i32* %4
br label %5
17: ; preds = %5
%18 = load i32, i32* %3
%19 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %18)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"\0A%d\00"
define void @add(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %11, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %9, %4 ], [ %1, %2 ]
%6 = phi i32 [ %8, %4 ], [ %0, %2 ]
%7 = and i32 %5, %6
%8 = xor i32 %5, %6
%9 = shl i32 %7, 1
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %2
%12 = phi i32 [ %0, %2 ], [ %8, %4 ]
%13 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %12)
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint32_t;
typedef scalar_t__ int32_t;

/* Variables and functions */
int /*<<< orphan*/ __wbeu32(int *, int /*<<< orphan*/);
int i2c_transact(int, int, int *, int, int /*<<< orphan*/);
int i2c_write_beint32(int fd, int chip_addr, int reg, int32_t value) {
  uint8_t data[1 + sizeof(uint32_t)];
  data[0] = reg;
  __wbeu32(&data[1], (uint32_t)value);
  return i2c_transact(fd, chip_addr, data, 1 + sizeof(uint32_t), 0);
}


x86 assembly (clang, -O0):
<i2c_write_beint32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x30(%rbp)
lea    -0x30(%rbp),%rdi
add    $0x4,%rdi
mov    -0x18(%rbp),%rax
mov    %eax,%esi
call   1040 <__wbeu32@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
lea    -0x30(%rbp),%rdx
mov    $0x5,%ecx
xor    %r8d,%r8d
call   1030 <i2c_transact@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_write_beint32>:
push   %rbp
push   %rbx
sub    $0x18,%rsp
mov    %esi,%ebx
mov    %edi,%ebp
mov    %edx,(%rsp)
lea    0x4(%rsp),%rdi
mov    %ecx,%esi
call   1040 <__wbeu32@plt>
mov    %rsp,%rdx
mov    %ebp,%edi
mov    %ebx,%esi
mov    $0x5,%ecx
xor    %r8d,%r8d
call   1030 <i2c_transact@plt>
add    $0x18,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @i2c_write_beint32(i32 %0, i32 %1, i32 %2, i64 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i64
%9 = alloca [5 x i32]
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i64 %3, i64* %8
%10 = load i32, i32* %7
%11 = getelementptr inbounds [5 x i32], [5 x i32]* %9, i64 0, i64 0
store i32 %10, i32* %11
%12 = getelementptr inbounds [5 x i32], [5 x i32]* %9, i64 0, i64 1
%13 = load i64, i64* %8
%14 = trunc i64 %13 to i32
%15 = call i32 @__wbeu32(i32* %12, i32 %14)
%16 = load i32, i32* %5
%17 = load i32, i32* %6
%18 = getelementptr inbounds [5 x i32], [5 x i32]* %9, i64 0, i64 0
%19 = call i32 @i2c_transact(i32 %16, i32 %17, i32* %18, i32 5, i32 0)
ret i32 %19
}

LLVM IR (-O2):
define i32 @i2c_write_beint32(i32 %0, i32 %1, i32 %2, i64 %3) {
%5 = alloca [5 x i32]
%6 = bitcast [5 x i32]* %5 to i8*
%7 = getelementptr inbounds [5 x i32], [5 x i32]* %5, i64 0, i64 0
store i32 %2, i32* %7
%8 = getelementptr inbounds [5 x i32], [5 x i32]* %5, i64 0, i64 1
%9 = trunc i64 %3 to i32
%10 = call i32 @__wbeu32(i32* %8, i32 %9)
%11 = call i32 @i2c_transact(i32 %0, i32 %1, i32* %7, i32 5, i32 0)
ret i32 %11
}
/* Type definitions */
typedef unsigned char int16_t;

/* Variables and functions */
int extract_int16(unsigned char *p, int halfwordid) {
  int16_t r;
  unsigned char *b = p;
  b += (halfwordid - 1) * 2;
  r = (b[0] << 8) + b[1];
  return ((int)r);
}


x86 assembly (clang, -O0):
<extract_int16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
shl    $0x1,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movzbl (%rax),%eax
shl    $0x8,%eax
mov    -0x18(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
add    %ecx,%eax
mov    %al,-0xd(%rbp)
movzbl -0xd(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<extract_int16>:
lea    (%rsi,%rsi,1),%eax
add    $0xfffffffe,%eax
cltq
movzbl 0x1(%rdi,%rax,1),%eax
ret

LLVM IR (-O0):
define i32 @extract_int16(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8
%6 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i8*, i8** %3
store i8* %7, i8** %6
%8 = load i32, i32* %4
%9 = sub nsw i32 %8, 1
%10 = mul nsw i32 %9, 2
%11 = load i8*, i8** %6
%12 = sext i32 %10 to i64
%13 = getelementptr inbounds i8, i8* %11, i64 %12
store i8* %13, i8** %6
%14 = load i8*, i8** %6
%15 = getelementptr inbounds i8, i8* %14, i64 0
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8*, i8** %6
%20 = getelementptr inbounds i8, i8* %19, i64 1
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = add nsw i32 %18, %22
%24 = trunc i32 %23 to i8
store i8 %24, i8* %5
%25 = load i8, i8* %5
%26 = zext i8 %25 to i32
ret i32 %26
}

LLVM IR (-O2):
define i32 @extract_int16(i8* nocapture %0, i32 %1) {
%3 = shl i32 %1, 1
%4 = add i32 %3, -2
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
ret i32 %9
}
/* Variables and functions */
void *calloc(int, size_t);
void *q_malloc(size_t size) { return calloc(1, size); }


x86 assembly (clang, -O0):
<q_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x1,%edi
call   1030 <calloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<q_malloc>:
mov    %rdi,%rsi
mov    $0x1,%edi
jmp    1030 <calloc@plt>

LLVM IR (-O0):
define i8* @q_malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @calloc(i32 1, i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @q_malloc(i64 %0) {
%2 = tail call i8* @calloc(i32 1, i64 %0)
ret i8* %2
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int y;
};
struct TYPE_4__ {
  TYPE_1__ max_aspect;
};
typedef TYPE_2__ XSizeHints;

/* Variables and functions */
void set_XSizeHints_max_aspect_y(void *_p, int _v) {
  ((XSizeHints *)_p)->max_aspect.y = (int)_v;
}


x86 assembly (clang, -O0):
<set_XSizeHints_max_aspect_y>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XSizeHints_max_aspect_y>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XSizeHints_max_aspect_y(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XSizeHints_max_aspect_y(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ StrUtil_rmLeadSpace(char *);
int StrUtil_rmTrailSpace(char *);
int StrUtil_rmEndSpaces(char *str) {
  StrUtil_rmLeadSpace(str);
  return StrUtil_rmTrailSpace(str);
}


x86 assembly (clang, -O0):
<StrUtil_rmEndSpaces>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <StrUtil_rmLeadSpace@plt>
mov    -0x8(%rbp),%rdi
call   1030 <StrUtil_rmTrailSpace@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<StrUtil_rmEndSpaces>:
push   %rbx
mov    %rdi,%rbx
call   1040 <StrUtil_rmLeadSpace@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <StrUtil_rmTrailSpace@plt>

LLVM IR (-O0):
define i32 @StrUtil_rmEndSpaces(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @StrUtil_rmLeadSpace(i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @StrUtil_rmTrailSpace(i8* %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @StrUtil_rmEndSpaces(i8* %0) {
%2 = tail call i32 @StrUtil_rmLeadSpace(i8* %0)
%3 = tail call i32 @StrUtil_rmTrailSpace(i8* %0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ func();
int /*<<< orphan*/ func2();
int /*<<< orphan*/ func3();
int /*<<< orphan*/ getchar();
int main() {
  func();
  func2();
  func3();
  getchar();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1060 <func@plt>
mov    $0x0,%al
call   1050 <func2@plt>
mov    $0x0,%al
call   1030 <func3@plt>
mov    $0x0,%al
call   1040 <getchar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <func@plt>
xor    %eax,%eax
call   1050 <func2@plt>
xor    %eax,%eax
call   1030 <func3@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @func()
%3 = call i32 (...) @func2()
%4 = call i32 (...) @func3()
%5 = call i32 (...) @getchar()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @func()
%2 = tail call i32 (...) @func2()
%3 = tail call i32 (...) @func3()
%4 = tail call i32 (...) @getchar()
ret i32 0
}
int exists(int *input, int ncols, int n) {
  int j;
  for (j = 0; j < ncols; ++j) {
    if (input[j] == n) {
      return 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<exists>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1154 <exists+0x54>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x18(%rbp),%eax
jne    1141 <exists+0x41>
movl   $0x1,-0x4(%rbp)
jmp    115b <exists+0x5b>
jmp    1146 <exists+0x46>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1115 <exists+0x15>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<exists>:
test   %esi,%esi
jle    111e <exists+0x1e>
mov    %esi,%eax
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
cmp    %edx,(%rdi,%rcx,4)
je     1121 <exists+0x21>
add    $0x1,%rcx
cmp    %rcx,%rax
jne    1110 <exists+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @exists(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %23, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %26
13: ; preds = %9
%14 = load i32*, i32** %5
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %7
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %22
21: ; preds = %13
store i32 1, i32* %4
br label %27
22: ; preds = %13
br label %23
23: ; preds = %22
%24 = load i32, i32* %8
%25 = add nsw i32 %24, 1
store i32 %25, i32* %8
br label %9
26: ; preds = %9
store i32 0, i32* %4
br label %27
27: ; preds = %26, %21
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @exists(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %15
5: ; preds = %3
%6 = zext i32 %1 to i64
br label %9
7: ; preds = %9
%8 = icmp eq i64 %14, %6
br i1 %8, label %15, label %9
9: ; preds = %5, %7
%10 = phi i64 [ 0, %5 ], [ %14, %7 ]
%11 = getelementptr inbounds i32, i32* %0, i64 %10
%12 = load i32, i32* %11
%13 = icmp eq i32 %12, %2
%14 = add nuw nsw i64 %10, 1
br i1 %13, label %15, label %7
15: ; preds = %9, %7, %3
%16 = phi i32 [ 0, %3 ], [ 0, %7 ], [ 1, %9 ]
ret i32 %16
}
void __attribute__((visibility("internal"))) main_internal(void) {}


x86 assembly (clang, -O0):
<main_internal>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main_internal>:
ret

LLVM IR (-O0):
define hidden void @main_internal() {
ret void
}

LLVM IR (-O2):
define hidden void @main_internal() {
ret void
}
/* Variables and functions */
int randomized_partition(int *, int, int);
void randomized_quicksort(int *A, int p, int r) {
  int q;
  if (p < r) {
    q = randomized_partition(A, p, r);
    randomized_quicksort(A, p, q - 1);
    randomized_quicksort(A, q + 1, r);
  }
}


x86 assembly (clang, -O0):
<randomized_quicksort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <randomized_quicksort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1040 <randomized_partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1030 <randomized_quicksort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1030 <randomized_quicksort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randomized_quicksort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <randomized_quicksort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1040 <randomized_partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1030 <randomized_quicksort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <randomized_quicksort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @randomized_quicksort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @randomized_partition(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @randomized_quicksort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @randomized_partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @randomized_quicksort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
int test1(int a) { return 2 - a == a; }


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x2,%eax
sub    -0x4(%rbp),%eax
cmp    -0x4(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
add    %edi,%edi
xor    %eax,%eax
cmp    $0x2,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @test1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 2, %3
%5 = load i32, i32* %2
%6 = icmp eq i32 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @test1(i32 %0) {
%2 = sub nsw i32 2, %0
%3 = icmp eq i32 %2, %0
%4 = zext i1 %3 to i32
ret i32 %4
}
int foo(unsigned a) {
  switch (a) {
  case 1 ... 5:
    return 1;
  case 9 ... 11:
    return a + 3;
  case 12 ... 13:
    return a + 3;
  default:
    return 44;
  }
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
add    $0xffffffff,%eax
sub    $0x5,%eax
jb     1146 <foo+0x46>
jmp    111e <foo+0x1e>
mov    -0xc(%rbp),%eax
add    $0xfffffff7,%eax
sub    $0x3,%eax
jb     1152 <foo+0x52>
jmp    1132 <foo+0x32>
mov    -0xc(%rbp),%eax
add    $0xfffffff4,%eax
sub    $0x2,%eax
jb     1160 <foo+0x60>
jmp    116e <foo+0x6e>
movl   $0x1,-0x4(%rbp)
jmp    1175 <foo+0x75>
mov    -0x8(%rbp),%eax
add    $0x3,%eax
mov    %eax,-0x4(%rbp)
jmp    1175 <foo+0x75>
mov    -0x8(%rbp),%eax
add    $0x3,%eax
mov    %eax,-0x4(%rbp)
jmp    1175 <foo+0x75>
movl   $0x2c,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
add    $0xffffffff,%edi
mov    $0x2c,%eax
cmp    $0xc,%edi
ja     111a <foo+0x1a>
movslq %edi,%rax
lea    0xee9(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %12 [
i32 1, label %5
i32 2, label %5
i32 3, label %5
i32 4, label %5
i32 5, label %5
i32 9, label %6
i32 10, label %6
i32 11, label %6
i32 12, label %9
i32 13, label %9
]
5: ; preds = %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %13
6: ; preds = %1, %1, %1
%7 = load i32, i32* %3
%8 = add i32 %7, 3
store i32 %8, i32* %2
br label %13
9: ; preds = %1, %1
%10 = load i32, i32* %3
%11 = add i32 %10, 3
store i32 %11, i32* %2
br label %13
12: ; preds = %1
store i32 44, i32* %2
br label %13
13: ; preds = %12, %9, %6, %5
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
@switch.table.foo = [13 x i32] [i32 1, i32 1, i32 1, i32 1, i32 1, i32 44, i32 44, i32 44, i32 12, i32 13, i32 14, i32 15, i32 16]
define i32 @foo(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 13
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [13 x i32], [13 x i32]* @switch.table.foo, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 44, %1 ]
ret i32 %9
}
/* Variables and functions */
int bpf_detach_probe(char const *, char *);
int bpf_detach_uprobe(const char *event_desc) {
  return bpf_detach_probe(event_desc, "uprobe");
}


x86 assembly (clang, -O0):
<bpf_detach_uprobe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <bpf_detach_probe@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bpf_detach_uprobe>:
lea    0xee9(%rip),%rsi
jmp    1030 <bpf_detach_probe@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"uprobe\00"
define i32 @bpf_detach_uprobe(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @bpf_detach_probe(i8* %3, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [7 x i8] c"uprobe\00"
define i32 @bpf_detach_uprobe(i8* %0) {
%2 = tail call i32 @bpf_detach_probe(i8* %0, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ memcpy(char *, char const *, int);
int /*<<< orphan*/ memset(char *, int /*<<< orphan*/, int);
char *bus_copy_substr(const char *p_src, int n_len) {
  char *p_dst = (char *)malloc(n_len + 1);
  memset(p_dst, 0, n_len + 1);
  memcpy(p_dst, p_src, n_len);
  return p_dst;
}


x86 assembly (clang, -O0):
<bus_copy_substr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
add    $0x1,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0xc(%rbp),%edx
add    $0x1,%edx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1040 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bus_copy_substr>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %esi,%r15d
mov    %rdi,%r14
lea    0x1(%r15),%ebp
mov    %ebp,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %esi,%esi
mov    %ebp,%edx
call   1030 <memset@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15d,%edx
call   1040 <memcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i8* @bus_copy_substr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 1
%8 = call i64 @malloc(i32 %7)
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = load i32, i32* %4
%12 = add nsw i32 %11, 1
%13 = call i32 @memset(i8* %10, i32 0, i32 %12)
%14 = load i8*, i8** %5
%15 = load i8*, i8** %3
%16 = load i32, i32* %4
%17 = call i32 @memcpy(i8* %14, i8* %15, i32 %16)
%18 = load i8*, i8** %5
ret i8* %18
}

LLVM IR (-O2):
define i8* @bus_copy_substr(i8* %0, i32 %1) {
%3 = add nsw i32 %1, 1
%4 = tail call i64 @malloc(i32 %3)
%5 = inttoptr i64 %4 to i8*
%6 = tail call i32 @memset(i8* %5, i32 0, i32 %3)
%7 = tail call i32 @memcpy(i8* %5, i8* %0, i32 %1)
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ PRIO_PROCESS;
scalar_t__ getpriority(int /*<<< orphan*/, int /*<<< orphan*/);
int setpriority(int /*<<< orphan*/, int /*<<< orphan*/, scalar_t__);
int nice(int i) {
  return setpriority(PRIO_PROCESS, 0, getpriority(PRIO_PROCESS, 0) + i);
}


x86 assembly (clang, -O0):
<nice>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2eae(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
xor    %esi,%esi
call   1030 <getpriority@plt>
mov    -0x8(%rbp),%edi
mov    %rax,%rdx
movslq -0x4(%rbp),%rax
add    %rax,%rdx
xor    %esi,%esi
call   1040 <setpriority@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nice>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    0x2eb4(%rip),%rax
mov    (%rax),%ebp
mov    %ebp,%edi
xor    %esi,%esi
call   1030 <getpriority@plt>
movslq %ebx,%rdx
add    %rax,%rdx
mov    %ebp,%edi
xor    %esi,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <setpriority@plt>

LLVM IR (-O0):
@PRIO_PROCESS = global i32 0
define i32 @nice(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @PRIO_PROCESS
%4 = load i32, i32* @PRIO_PROCESS
%5 = call i64 @getpriority(i32 %4, i32 0)
%6 = load i32, i32* %2
%7 = sext i32 %6 to i64
%8 = add nsw i64 %5, %7
%9 = call i32 @setpriority(i32 %3, i32 0, i64 %8)
ret i32 %9
}

LLVM IR (-O2):
@PRIO_PROCESS = global i32 0
define i32 @nice(i32 %0) {
%2 = load i32, i32* @PRIO_PROCESS
%3 = tail call i64 @getpriority(i32 %2, i32 0)
%4 = sext i32 %0 to i64
%5 = add nsw i64 %3, %4
%6 = tail call i32 @setpriority(i32 %2, i32 0, i64 %5)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ handle_56(int /*<<< orphan*/);
int gen_56(void) {
  handle_56(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_56>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_56@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_56>:
push   %rax
xor    %edi,%edi
call   1030 <handle_56@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_56() {
%1 = call i32 @handle_56(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_56() {
%1 = tail call i32 @handle_56(i32 0)
ret i32 0
}
extern unsigned short __inw(unsigned short port) {
  unsigned short _v;
  __asm__ __volatile__("in"
                       "w"
                       " %"
                       "w"
                       "1,%"
                       ""
                       "0"
                       : "=a"(_v)
                       : "d"(port));
  return _v;
}


x86 assembly (clang, -O0):
<__inw>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%ax
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__inw>:
mov    %edi,%edx
in     (%dx),%ax
ret

LLVM IR (-O0):
define zeroext i16 @__inw(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i16 asm sideeffect "inw ${1:w},$0", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i16 %5, i16* %3
%6 = load i16, i16* %3
ret i16 %6
}

LLVM IR (-O2):
define zeroext i16 @__inw(i16 zeroext %0) {
%2 = tail call i16 asm sideeffect "inw ${1:w},$0", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i16 %2
}
void gtk_tree_view_set_search_column() {}


x86 assembly (clang, -O0):
<gtk_tree_view_set_search_column>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_view_set_search_column>:
ret

LLVM IR (-O0):
define void @gtk_tree_view_set_search_column() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_view_set_search_column() {
ret void
}