xunge/DecIR huggingface dataset:
/* Type definitions */
struct timer {
  int dummy;
};

/* Variables and functions */
char *timer_str(struct timer *slf, const char *id) { return NULL; }


x86 assembly (clang, -O0):
<timer_str>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<timer_str>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.timer = type { i32 }
define i8* @timer_str(%struct.timer* %0, i8* %1) {
%3 = alloca %struct.timer*
%4 = alloca i8*
store %struct.timer* %0, %struct.timer** %3
store i8* %1, i8** %4
ret i8* null
}

LLVM IR (-O2):
%struct.timer = type { i32 }
define noalias i8* @timer_str(%struct.timer* nocapture readnone %0, i8* nocapture readnone %1) {
ret i8* null
}
const char *get_description(void) {
  return "The vloopback2 playback plugin makes LiVES appear as a video device "
         "in /dev.\nIt requires the vloopback2 kernel module which can be "
         "downloaded from\nhttps://github.com/umlaeute/v4l2loopback\n";
}


x86 assembly (clang, -O0):
<get_description>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_description>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [189 x i8] c"The vloopback2 playback plugin makes LiVES appear as a video device in /dev.\0AIt requires the vloopback2 kernel module which can be downloaded from\0Ahttps://github.com/umlaeute/v4l2loopback\0A\00"
define i8* @get_description() {
ret i8* getelementptr inbounds ([189 x i8], [189 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [189 x i8] c"The vloopback2 playback plugin makes LiVES appear as a video device in /dev.\0AIt requires the vloopback2 kernel module which can be downloaded from\0Ahttps://github.com/umlaeute/v4l2loopback\0A\00"
define i8* @get_description() {
ret i8* getelementptr inbounds ([189 x i8], [189 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void ExitProg(void) {
  exit(0);
  return;
}


x86 assembly (clang, -O0):
<ExitProg>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<ExitProg>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @ExitProg() {
%1 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @ExitProg() {
%1 = tail call i32 @exit(i32 0)
unreachable
}
char *bottle_s(int number) {
  if (number == 1)
    return "bottle";
  else
    return "bottles";
}


x86 assembly (clang, -O0):
<bottle_s>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jne    1121 <bottle_s+0x21>
lea    0xee8(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    112c <bottle_s+0x2c>
lea    0xedf(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bottle_s>:
cmp    $0x1,%edi
lea    0xef6(%rip),%rcx
lea    0xef6(%rip),%rax
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [7 x i8] c"bottle\00"
@.str.1 = [8 x i8] c"bottles\00"
define i8* @bottle_s(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8** %2
br label %8
7: ; preds = %1
store i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %8
8: ; preds = %7, %6
%9 = load i8*, i8** %2
ret i8* %9
}

LLVM IR (-O2):
@.str = [7 x i8] c"bottle\00"
@.str.1 = [8 x i8] c"bottles\00"
define i8* @bottle_s(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = select i1 %2, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0)
ret i8* %3
}
void clapt_init() {}


x86 assembly (clang, -O0):
<clapt_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clapt_init>:
ret

LLVM IR (-O0):
define void @clapt_init() {
ret void
}

LLVM IR (-O2):
define void @clapt_init() {
ret void
}
void swap(int *values, int i, int j) {
  int aux = values[i];
  values[i] = values[j];
  values[j] = aux;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
store i32 %12, i32* %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
store i32 %17, i32* %21
%22 = load i32, i32* %7
%23 = load i32*, i32** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
store i32 %9, i32* %5
store i32 %6, i32* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ edsf_merge(int *, int, int, int /*<<< orphan*/);
void dsf_merge(int *dsf, int v1, int v2) { edsf_merge(dsf, v1, v2, 0); }


x86 assembly (clang, -O0):
<dsf_merge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
xor    %ecx,%ecx
call   1030 <edsf_merge@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dsf_merge>:
xor    %ecx,%ecx
jmp    1030 <edsf_merge@plt>

LLVM IR (-O0):
define void @dsf_merge(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @edsf_merge(i32* %7, i32 %8, i32 %9, i32 0)
ret void
}

LLVM IR (-O2):
define void @dsf_merge(i32* %0, i32 %1, i32 %2) {
%4 = tail call i32 @edsf_merge(i32* %0, i32 %1, i32 %2, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ haptic_hal_write8(int, int);
void set_input_to_analog() { haptic_hal_write8(0x1D, 0x02); }


x86 assembly (clang, -O0):
<set_input_to_analog>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1d,%edi
mov    $0x2,%esi
call   1030 <haptic_hal_write8@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_input_to_analog>:
mov    $0x1d,%edi
mov    $0x2,%esi
jmp    1030 <haptic_hal_write8@plt>

LLVM IR (-O0):
define void @set_input_to_analog() {
%1 = call i32 @haptic_hal_write8(i32 29, i32 2)
ret void
}

LLVM IR (-O2):
define void @set_input_to_analog() {
%1 = tail call i32 @haptic_hal_write8(i32 29, i32 2)
ret void
}
int hawkc_my_digittoint(char ch) {
  int d = ch - '0';
  if ((unsigned)d < 10) {
    return d;
  }
  d = ch - 'a';
  if ((unsigned)d < 6) {
    return d + 10;
  }
  d = ch - 'A';
  if ((unsigned)d < 6) {
    return d + 10;
  }
  return -1;
}


x86 assembly (clang, -O0):
<hawkc_my_digittoint>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0xa,-0xc(%rbp)
jae    1129 <hawkc_my_digittoint+0x29>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1174 <hawkc_my_digittoint+0x74>
movsbl -0x5(%rbp),%eax
sub    $0x61,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x6,-0xc(%rbp)
jae    114b <hawkc_my_digittoint+0x4b>
mov    -0xc(%rbp),%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    1174 <hawkc_my_digittoint+0x74>
movsbl -0x5(%rbp),%eax
sub    $0x41,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x6,-0xc(%rbp)
jae    116d <hawkc_my_digittoint+0x6d>
mov    -0xc(%rbp),%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    1174 <hawkc_my_digittoint+0x74>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hawkc_my_digittoint>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%eax
jb     1127 <hawkc_my_digittoint+0x27>
lea    -0x61(%rdi),%eax
cmp    $0x5,%eax
ja     1116 <hawkc_my_digittoint+0x16>
add    $0xffffffa9,%edi
mov    %edi,%eax
ret
lea    -0x41(%rdi),%eax
add    $0xffffffc9,%edi
cmp    $0x6,%eax
mov    $0xffffffff,%eax
cmovb  %edi,%eax
ret

LLVM IR (-O0):
define i32 @hawkc_my_digittoint(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
%7 = sub nsw i32 %6, 48
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = icmp ult i32 %8, 10
br i1 %9, label %10, label %12
10: ; preds = %1
%11 = load i32, i32* %4
store i32 %11, i32* %2
br label %31
12: ; preds = %1
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = sub nsw i32 %14, 97
store i32 %15, i32* %4
%16 = load i32, i32* %4
%17 = icmp ult i32 %16, 6
br i1 %17, label %18, label %21
18: ; preds = %12
%19 = load i32, i32* %4
%20 = add nsw i32 %19, 10
store i32 %20, i32* %2
br label %31
21: ; preds = %12
%22 = load i8, i8* %3
%23 = sext i8 %22 to i32
%24 = sub nsw i32 %23, 65
store i32 %24, i32* %4
%25 = load i32, i32* %4
%26 = icmp ult i32 %25, 6
br i1 %26, label %27, label %30
27: ; preds = %21
%28 = load i32, i32* %4
%29 = add nsw i32 %28, 10
store i32 %29, i32* %2
br label %31
30: ; preds = %21
store i32 -1, i32* %2
br label %31
31: ; preds = %30, %27, %18, %10
%32 = load i32, i32* %2
ret i32 %32
}

LLVM IR (-O2):
define i32 @hawkc_my_digittoint(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add nsw i32 %2, -48
%4 = icmp ult i32 %3, 10
br i1 %4, label %15, label %5
5: ; preds = %1
%6 = add nsw i32 %2, -97
%7 = icmp ult i32 %6, 6
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = add nsw i32 %2, -87
br label %15
10: ; preds = %5
%11 = add nsw i32 %2, -65
%12 = icmp ult i32 %11, 6
%13 = add nsw i32 %2, -55
%14 = select i1 %12, i32 %13, i32 -1
br label %15
15: ; preds = %10, %1, %8
%16 = phi i32 [ %9, %8 ], [ %3, %1 ], [ %14, %10 ]
ret i32 %16
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ chr1setBank1(int);
void m32setParamsBXX1(uint16_t addr, uint8_t val) {
  (void)addr;
  chr1setBank1(val << 10);
}


x86 assembly (clang, -O0):
<m32setParamsBXX1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
shl    $0xa,%edi
call   1030 <chr1setBank1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m32setParamsBXX1>:
mov    %esi,%edi
shl    $0xa,%edi
jmp    1030 <chr1setBank1@plt>

LLVM IR (-O0):
define void @m32setParamsBXX1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %6, 10
%8 = call i32 @chr1setBank1(i32 %7)
ret void
}

LLVM IR (-O2):
define void @m32setParamsBXX1(i32 %0, i32 %1) {
%3 = shl i32 %1, 10
%4 = tail call i32 @chr1setBank1(i32 %3)
ret void
}
void fill(int A[4]) {
  A[0] = 4;
  A[1] = 5;
  A[2] = 6;
  A[3] = 7;
}


x86 assembly (clang, -O0):
<fill>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x4,(%rax)
mov    -0x8(%rbp),%rax
movl   $0x5,0x4(%rax)
mov    -0x8(%rbp),%rax
movl   $0x6,0x8(%rax)
mov    -0x8(%rbp),%rax
movl   $0x7,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fill>:
movaps 0xef9(%rip),%xmm0
movups %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @fill(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
store i32 4, i32* %4
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 1
store i32 5, i32* %6
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 2
store i32 6, i32* %8
%9 = load i32*, i32** %2
%10 = getelementptr inbounds i32, i32* %9, i64 3
store i32 7, i32* %10
ret void
}

LLVM IR (-O2):
define void @fill(i32* nocapture writeonly %0) {
%2 = bitcast i32* %0 to <4 x i32>*
store <4 x i32> <i32 4, i32 5, i32 6, i32 7>, <4 x i32>* %2
ret void
}
void to_sign_long_store(__float128 a, long *p) { *p = (long)a; }


x86 assembly (clang, -O0):
<to_sign_long_store>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movaps %xmm0,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
movaps -0x10(%rbp),%xmm0
call   1130 <__fixtfdi>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret
nopl   0x0(%rax)

x86 assembly (clang, -O2):
<to_sign_long_store>:
push   %rbx
mov    %rdi,%rbx
call   1110 <__fixtfdi>
mov    %rax,(%rbx)
pop    %rbx
ret
xchg   %ax,%ax

LLVM IR (-O0):
define void @to_sign_long_store(fp128 %0, i64* %1) {
%3 = alloca fp128
%4 = alloca i64*
store fp128 %0, fp128* %3
store i64* %1, i64** %4
%5 = load fp128, fp128* %3
%6 = fptosi fp128 %5 to i64
%7 = load i64*, i64** %4
store i64 %6, i64* %7
ret void
}

LLVM IR (-O2):
define void @to_sign_long_store(fp128 %0, i64* nocapture writeonly %1) {
%3 = fptosi fp128 %0 to i64
store i64 %3, i64* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ local_func();
__attribute__((weak)) void wfunc() { local_func(); }


x86 assembly (clang, -O0):
<wfunc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <local_func@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wfunc>:
xor    %eax,%eax
jmp    1030 <local_func@plt>

LLVM IR (-O0):
define weak void @wfunc() {
%1 = call i32 (...) @local_func()
ret void
}

LLVM IR (-O2):
define weak void @wfunc() {
%1 = tail call i32 (...) @local_func()
ret void
}
long _fact(long EV_n) {
  long EV_t;
  if (((EV_n == 1) || (EV_n == 0))) {
    return 1;
  }
  if ((EV_n <= 1)) {
    return _fact(((-1) * EV_n));
  }
  EV_t = (EV_n * _fact((EV_n - 1)));
  return EV_t;
}


x86 assembly (clang, -O0):
<_fact>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x1,-0x10(%rbp)
je     1132 <_fact+0x22>
cmpq   $0x0,-0x10(%rbp)
jne    113f <_fact+0x2f>
movq   $0x1,-0x8(%rbp)
jmp    1189 <_fact+0x79>
cmpq   $0x1,-0x10(%rbp)
jg     115d <_fact+0x4d>
imul   $0xffffffffffffffff,-0x10(%rbp),%rdi
call   1030 <_fact@plt>
mov    %rax,-0x8(%rbp)
jmp    1189 <_fact+0x79>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
sub    $0x1,%rdi
call   1030 <_fact@plt>
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
imul   %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fact>:
mov    $0x1,%eax
cmp    $0x2,%rdi
jae    110c <_fact+0xc>
ret
mov    $0x1,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
cmp    $0x1,%rdi
jg     1131 <_fact+0x31>
neg    %rdi
cmp    $0x2,%rdi
jae    1120 <_fact+0x20>
jmp    110b <_fact+0xb>
imul   %rdi,%rax
lea    -0x1(%rdi),%rcx
mov    %rcx,%rdi
cmp    $0x1,%rcx
ja     1120 <_fact+0x20>
jmp    110b <_fact+0xb>

LLVM IR (-O0):
define i64 @_fact(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 1
br i1 %6, label %10, label %7
7: ; preds = %1
%8 = load i64, i64* %3
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %7, %1
store i64 1, i64* %2
br label %25
11: ; preds = %7
%12 = load i64, i64* %3
%13 = icmp sle i64 %12, 1
br i1 %13, label %14, label %18
14: ; preds = %11
%15 = load i64, i64* %3
%16 = mul nsw i64 -1, %15
%17 = call i64 @_fact(i64 %16)
store i64 %17, i64* %2
br label %25
18: ; preds = %11
%19 = load i64, i64* %3
%20 = load i64, i64* %3
%21 = sub nsw i64 %20, 1
%22 = call i64 @_fact(i64 %21)
%23 = mul nsw i64 %19, %22
store i64 %23, i64* %4
%24 = load i64, i64* %4
store i64 %24, i64* %2
br label %25
25: ; preds = %18, %14, %10
%26 = load i64, i64* %2
ret i64 %26
}

LLVM IR (-O2):
define i64 @_fact(i64 %0) {
%2 = icmp ult i64 %0, 2
br i1 %2, label %16, label %3
3: ; preds = %1, %12
%4 = phi i64 [ %13, %12 ], [ %0, %1 ]
%5 = phi i64 [ %14, %12 ], [ 1, %1 ]
br label %6
6: ; preds = %3, %9
%7 = phi i64 [ %4, %3 ], [ %10, %9 ]
%8 = icmp slt i64 %7, 2
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = sub nsw i64 0, %7
%11 = icmp ult i64 %10, 2
br i1 %11, label %16, label %6
12: ; preds = %6
%13 = add nsw i64 %7, -1
%14 = mul nsw i64 %7, %5
%15 = icmp ult i64 %13, 2
br i1 %15, label %16, label %3
16: ; preds = %12, %9, %1
%17 = phi i64 [ 1, %1 ], [ %5, %9 ], [ %14, %12 ]
ret i64 %17
}
/* Variables and functions */
int /*<<< orphan*/ ndsctl_action(char *, char *, char *);
void ndsctl_unallow(void) {
  ndsctl_action("unallow", "MAC %s unallowed.\n",
                "Failed to unallow MAC %s.\n");
}


x86 assembly (clang, -O0):
<ndsctl_unallow>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee6(%rip),%rsi
lea    0xef2(%rip),%rdx
call   1030 <ndsctl_action@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ndsctl_unallow>:
lea    0xee9(%rip),%rdi
lea    0xeea(%rip),%rsi
lea    0xef6(%rip),%rdx
jmp    1030 <ndsctl_action@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"unallow\00"
@.str.1 = [19 x i8] c"MAC %s unallowed.\0A\00"
@.str.2 = [27 x i8] c"Failed to unallow MAC %s.\0A\00"
define void @ndsctl_unallow() {
%1 = call i32 @ndsctl_action(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"unallow\00"
@.str.1 = [19 x i8] c"MAC %s unallowed.\0A\00"
@.str.2 = [27 x i8] c"Failed to unallow MAC %s.\0A\00"
define void @ndsctl_unallow() {
%1 = tail call i32 @ndsctl_action(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.2, i64 0, i64 0))
ret void
}
void quatscale(float *qout, const float *qin, float s) {
  qout[0] = qin[0] * s;
  qout[1] = qin[1] * s;
  qout[2] = qin[2] * s;
  qout[3] = qin[3] * s;
}


x86 assembly (clang, -O0):
<quatscale>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mulss  -0x14(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
movss  0x4(%rax),%xmm0
mulss  -0x14(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
mov    -0x10(%rbp),%rax
movss  0x8(%rax),%xmm0
mulss  -0x14(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x8(%rax)
mov    -0x10(%rbp),%rax
movss  0xc(%rax),%xmm0
mulss  -0x14(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<quatscale>:
movss  (%rsi),%xmm1
mulss  %xmm0,%xmm1
movss  %xmm1,(%rdi)
movss  0x4(%rsi),%xmm1
mulss  %xmm0,%xmm1
movss  %xmm1,0x4(%rdi)
movss  0x8(%rsi),%xmm1
mulss  %xmm0,%xmm1
movss  %xmm1,0x8(%rdi)
mulss  0xc(%rsi),%xmm0
movss  %xmm0,0xc(%rdi)
ret

LLVM IR (-O0):
define void @quatscale(float* %0, float* %1, float %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float
store float* %0, float** %4
store float* %1, float** %5
store float %2, float* %6
%7 = load float*, float** %5
%8 = getelementptr inbounds float, float* %7, i64 0
%9 = load float, float* %8
%10 = load float, float* %6
%11 = fmul float %9, %10
%12 = load float*, float** %4
%13 = getelementptr inbounds float, float* %12, i64 0
store float %11, float* %13
%14 = load float*, float** %5
%15 = getelementptr inbounds float, float* %14, i64 1
%16 = load float, float* %15
%17 = load float, float* %6
%18 = fmul float %16, %17
%19 = load float*, float** %4
%20 = getelementptr inbounds float, float* %19, i64 1
store float %18, float* %20
%21 = load float*, float** %5
%22 = getelementptr inbounds float, float* %21, i64 2
%23 = load float, float* %22
%24 = load float, float* %6
%25 = fmul float %23, %24
%26 = load float*, float** %4
%27 = getelementptr inbounds float, float* %26, i64 2
store float %25, float* %27
%28 = load float*, float** %5
%29 = getelementptr inbounds float, float* %28, i64 3
%30 = load float, float* %29
%31 = load float, float* %6
%32 = fmul float %30, %31
%33 = load float*, float** %4
%34 = getelementptr inbounds float, float* %33, i64 3
store float %32, float* %34
ret void
}

LLVM IR (-O2):
define void @quatscale(float* nocapture writeonly %0, float* nocapture %1, float %2) {
%4 = load float, float* %1
%5 = fmul float %4, %2
store float %5, float* %0
%6 = getelementptr inbounds float, float* %1, i64 1
%7 = load float, float* %6
%8 = fmul float %7, %2
%9 = getelementptr inbounds float, float* %0, i64 1
store float %8, float* %9
%10 = getelementptr inbounds float, float* %1, i64 2
%11 = load float, float* %10
%12 = fmul float %11, %2
%13 = getelementptr inbounds float, float* %0, i64 2
store float %12, float* %13
%14 = getelementptr inbounds float, float* %1, i64 3
%15 = load float, float* %14
%16 = fmul float %15, %2
%17 = getelementptr inbounds float, float* %0, i64 3
store float %16, float* %17
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void ShareFreeM1i(int *s) {
  if (s)
    free((void *)s);
  return;
}


x86 assembly (clang, -O0):
<ShareFreeM1i>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <ShareFreeM1i+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ShareFreeM1i>:
test   %rdi,%rdi
je     111a <ShareFreeM1i+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @ShareFreeM1i(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = icmp ne i32* %3, null
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32*, i32** %2
%7 = bitcast i32* %6 to i8*
%8 = call i32 @free(i8* %7)
br label %9
9: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @ShareFreeM1i(i32* %0) {
%2 = icmp eq i32* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = bitcast i32* %0 to i8*
%5 = tail call i32 @free(i8* %4)
br label %6
6: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LCDCLR();
int /*<<< orphan*/ LCDSTR(char *, int, int, int);
void pirmotion() {
  LCDCLR();
  LCDSTR("THIRUDAN", 2, 1, 1);
  LCDSTR("VIVEK!!!", 2, 2, 1);
  LCDSTR("DETECTED", 2, 3, 1);
}


x86 assembly (clang, -O0):
<pirmotion>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <LCDCLR@plt>
lea    0xece(%rip),%rdi
mov    $0x2,%esi
mov    $0x1,%ecx
mov    %ecx,%edx
call   1040 <LCDSTR@plt>
lea    0xebf(%rip),%rdi
mov    $0x2,%edx
mov    $0x1,%ecx
mov    %edx,%esi
call   1040 <LCDSTR@plt>
lea    0xeb0(%rip),%rdi
mov    $0x2,%esi
mov    $0x3,%edx
mov    $0x1,%ecx
call   1040 <LCDSTR@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pirmotion>:
push   %rax
xor    %eax,%eax
call   1030 <LCDCLR@plt>
lea    0xed1(%rip),%rdi
mov    $0x2,%esi
mov    $0x1,%edx
mov    $0x1,%ecx
call   1040 <LCDSTR@plt>
lea    0xebf(%rip),%rdi
mov    $0x2,%esi
mov    $0x2,%edx
mov    $0x1,%ecx
call   1040 <LCDSTR@plt>
lea    0xead(%rip),%rdi
mov    $0x2,%esi
mov    $0x3,%edx
mov    $0x1,%ecx
pop    %rax
jmp    1040 <LCDSTR@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"THIRUDAN\00"
@.str.1 = [9 x i8] c"VIVEK!!!\00"
@.str.2 = [9 x i8] c"DETECTED\00"
define void @pirmotion() {
%1 = call i32 (...) @LCDCLR()
%2 = call i32 @LCDSTR(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 2, i32 1, i32 1)
%3 = call i32 @LCDSTR(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32 2, i32 2, i32 1)
%4 = call i32 @LCDSTR(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i64 0, i64 0), i32 2, i32 3, i32 1)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"THIRUDAN\00"
@.str.1 = [9 x i8] c"VIVEK!!!\00"
@.str.2 = [9 x i8] c"DETECTED\00"
define void @pirmotion() {
%1 = tail call i32 (...) @LCDCLR()
%2 = tail call i32 @LCDSTR(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 2, i32 1, i32 1)
%3 = tail call i32 @LCDSTR(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32 2, i32 2, i32 1)
%4 = tail call i32 @LCDSTR(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i64 0, i64 0), i32 2, i32 3, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
unsigned long LPCIRQGet(unsigned long ulBase) {
  DEBUG_ASSERT(ulBase == 0x40080000);
  return ((*((volatile unsigned long *)(ulBase + 0x0000000C))));
}


x86 assembly (clang, -O0):
<LPCIRQGet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x40080000,-0x8(%rbp)
40
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LPCIRQGet>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
cmp    $0x40080000,%rbx
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
mov    0xc(%rbx),%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @LPCIRQGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp eq i64 %3, 1074266112
%5 = zext i1 %4 to i32
%6 = call i32 @DEBUG_ASSERT(i32 %5)
%7 = load i64, i64* %2
%8 = add i64 %7, 12
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
ret i64 %10
}

LLVM IR (-O2):
define i64 @LPCIRQGet(i64 %0) {
%2 = icmp eq i64 %0, 1074266112
%3 = zext i1 %2 to i32
%4 = tail call i32 @DEBUG_ASSERT(i32 %3)
%5 = add i64 %0, 12
%6 = inttoptr i64 %5 to i64*
%7 = load volatile i64, i64* %6
ret i64 %7
}
int IncrementaIndice(int n) {
  n++;
  if (n == 100) {
    n = 0;
  }
  return n;
}


x86 assembly (clang, -O0):
<IncrementaIndice>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x64,-0x4(%rbp)
jne    1121 <IncrementaIndice+0x21>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IncrementaIndice>:
lea    0x1(%rdi),%ecx
xor    %eax,%eax
cmp    $0x64,%ecx
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @IncrementaIndice(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp eq i32 %5, 100
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %1
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @IncrementaIndice(i32 %0) {
%2 = add nsw i32 %0, 1
%3 = icmp eq i32 %2, 100
%4 = select i1 %3, i32 0, i32 %2
ret i32 %4
}
/* Variables and functions */
int NSIG;
int octave_num_signals(void) { return NSIG; }


x86 assembly (clang, -O0):
<octave_num_signals>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<octave_num_signals>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@NSIG = global i32 0
define i32 @octave_num_signals() {
%1 = load i32, i32* @NSIG
ret i32 %1
}

LLVM IR (-O2):
@NSIG = global i32 0
define i32 @octave_num_signals() {
%1 = load i32, i32* @NSIG
ret i32 %1
}
int clad_mini(int one, int two) { return (one < two) ? one : two; }


x86 assembly (clang, -O0):
<clad_mini>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <clad_mini+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <clad_mini+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clad_mini>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @clad_mini(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @clad_mini(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
scalar_t__ crAlloc(unsigned int);
int /*<<< orphan*/ crMemcpy(char *, char const *, unsigned int);
char *crStrndup(const char *str, unsigned int len) {
  char *ret = (char *)crAlloc(len + 1);
  crMemcpy(ret, str, len);
  ret[len] = '\0';
  return ret;
}


x86 assembly (clang, -O0):
<crStrndup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
add    $0x1,%edi
call   1030 <crAlloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1040 <crMemcpy@plt>
mov    -0x18(%rbp),%rax
mov    -0xc(%rbp),%ecx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crStrndup>:
push   %r15
push   %r14
push   %rbx
mov    %esi,%r15d
mov    %rdi,%r14
lea    0x1(%r15),%edi
call   1030 <crAlloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15d,%edx
call   1040 <crMemcpy@plt>
mov    %r15d,%eax
movb   $0x0,(%rbx,%rax,1)
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @crStrndup(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = add i32 %6, 1
%8 = call i64 @crAlloc(i32 %7)
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = load i8*, i8** %3
%12 = load i32, i32* %4
%13 = call i32 @crMemcpy(i8* %10, i8* %11, i32 %12)
%14 = load i8*, i8** %5
%15 = load i32, i32* %4
%16 = zext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
store i8 0, i8* %17
%18 = load i8*, i8** %5
ret i8* %18
}

LLVM IR (-O2):
define i8* @crStrndup(i8* %0, i32 %1) {
%3 = add i32 %1, 1
%4 = tail call i64 @crAlloc(i32 %3)
%5 = inttoptr i64 %4 to i8*
%6 = tail call i32 @crMemcpy(i8* %5, i8* %0, i32 %1)
%7 = zext i32 %1 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
store i8 0, i8* %8
ret i8* %5
}
/* Type definitions */
struct dirent {
  int /*<<< orphan*/ d_name;
};

/* Variables and functions */
int strverscmp(int /*<<< orphan*/, int /*<<< orphan*/);
int versionsort(const struct dirent **a, const struct dirent **b) {
  return strverscmp((*a)->d_name, (*b)->d_name);
}


x86 assembly (clang, -O0):
<versionsort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%esi
call   1030 <strverscmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<versionsort>:
mov    (%rdi),%rax
mov    (%rax),%edi
mov    (%rsi),%rax
mov    (%rax),%esi
jmp    1030 <strverscmp@plt>

LLVM IR (-O0):
%struct.dirent = type { i32 }
define i32 @versionsort(%struct.dirent** %0, %struct.dirent** %1) {
%3 = alloca %struct.dirent**
%4 = alloca %struct.dirent**
store %struct.dirent** %0, %struct.dirent*** %3
store %struct.dirent** %1, %struct.dirent*** %4
%5 = load %struct.dirent**, %struct.dirent*** %3
%6 = load %struct.dirent*, %struct.dirent** %5
%7 = getelementptr inbounds %struct.dirent, %struct.dirent* %6, i32 0, i32 0
%8 = load i32, i32* %7
%9 = load %struct.dirent**, %struct.dirent*** %4
%10 = load %struct.dirent*, %struct.dirent** %9
%11 = getelementptr inbounds %struct.dirent, %struct.dirent* %10, i32 0, i32 0
%12 = load i32, i32* %11
%13 = call i32 @strverscmp(i32 %8, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
%struct.dirent = type { i32 }
define i32 @versionsort(%struct.dirent** nocapture %0, %struct.dirent** nocapture %1) {
%3 = load %struct.dirent*, %struct.dirent** %0
%4 = getelementptr inbounds %struct.dirent, %struct.dirent* %3, i64 0, i32 0
%5 = load i32, i32* %4
%6 = load %struct.dirent*, %struct.dirent** %1
%7 = getelementptr inbounds %struct.dirent, %struct.dirent* %6, i64 0, i32 0
%8 = load i32, i32* %7
%9 = tail call i32 @strverscmp(i32 %5, i32 %8)
ret i32 %9
}
double acos(double x) { return 0; }


x86 assembly (clang, -O0):
<acos>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<acos>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @acos(double %0) {
%2 = alloca double
store double %0, double* %2
ret double 0.000000e+00
}

LLVM IR (-O2):
define double @acos(double %0) {
ret double 0.000000e+00
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char const *);
int /*<<< orphan*/ stderr;
int _df_error(char const *message, int ret) {
  fputs("df"
        ": ",
        stderr);
  perror(message);
  return ret;
}


x86 assembly (clang, -O0):
<_df_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%esi
lea    0xec1(%rip),%rdi
call   1030 <fputs@plt>
mov    -0x8(%rbp),%rdi
call   1040 <perror@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_df_error>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
lea    0xec8(%rip),%rdi
call   1030 <fputs@plt>
mov    %rbx,%rdi
call   1040 <perror@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [5 x i8] c"df: \00"
@stderr = global i32 0
define i32 @_df_error(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = call i32 @fputs(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i8*, i8** %3
%8 = call i32 @perror(i8* %7)
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
@.str = [5 x i8] c"df: \00"
@stderr = global i32 0
define i32 @_df_error(i8* nocapture %0, i32 returned %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fputs(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = tail call i32 @perror(i8* %0)
ret i32 %1
}
/* Type definitions */
struct _Locale_monetary {
  int dummy;
};

/* Variables and functions */
int CHAR_MAX;
int _Locale_n_sign_posn(struct _Locale_monetary *lmon) { return CHAR_MAX; }


x86 assembly (clang, -O0):
<_Locale_n_sign_posn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Locale_n_sign_posn>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
%struct._Locale_monetary = type { i32 }
@CHAR_MAX = global i32 0
define i32 @_Locale_n_sign_posn(%struct._Locale_monetary* %0) {
%2 = alloca %struct._Locale_monetary*
store %struct._Locale_monetary* %0, %struct._Locale_monetary** %2
%3 = load i32, i32* @CHAR_MAX
ret i32 %3
}

LLVM IR (-O2):
%struct._Locale_monetary = type { i32 }
@CHAR_MAX = global i32 0
define i32 @_Locale_n_sign_posn(%struct._Locale_monetary* nocapture readnone %0) {
%2 = load i32, i32* @CHAR_MAX
ret i32 %2
}
/* Variables and functions */
char **reallocate(char **, int, int);
char **matrix_append(char **matrix, int len, char *str) {
  char **res;
  res = reallocate(matrix, len, len + 1);
  res[len] = str;
  return res;
}


x86 assembly (clang, -O0):
<matrix_append>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0xc(%rbp),%edx
add    $0x1,%edx
call   1030 <reallocate@plt>
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %rdx,(%rax,%rcx,8)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<matrix_append>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %esi,%ebx
lea    0x1(%rbx),%edx
call   1030 <reallocate@plt>
movslq %ebx,%rcx
mov    %r14,(%rax,%rcx,8)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8** @matrix_append(i8** %0, i32 %1, i8* %2) {
%4 = alloca i8**
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8**
store i8** %0, i8*** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%8 = load i8**, i8*** %4
%9 = load i32, i32* %5
%10 = load i32, i32* %5
%11 = add nsw i32 %10, 1
%12 = call i8** @reallocate(i8** %8, i32 %9, i32 %11)
store i8** %12, i8*** %7
%13 = load i8*, i8** %6
%14 = load i8**, i8*** %7
%15 = load i32, i32* %5
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8*, i8** %14, i64 %16
store i8* %13, i8** %17
%18 = load i8**, i8*** %7
ret i8** %18
}

LLVM IR (-O2):
define i8** @matrix_append(i8** %0, i32 %1, i8* %2) {
%4 = add nsw i32 %1, 1
%5 = tail call i8** @reallocate(i8** %0, i32 %1, i32 %4)
%6 = sext i32 %1 to i64
%7 = getelementptr inbounds i8*, i8** %5, i64 %6
store i8* %2, i8** %7
ret i8** %5
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fgetc(int /*<<< orphan*/ *);
short read16i(FILE *f) {
  int n;
  n = fgetc(f);
  n += fgetc(f) << 8;
  return n;
}


x86 assembly (clang, -O0):
<read16i>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
shl    $0x8,%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cwtl
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read16i>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <fgetc@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <fgetc@plt>
shl    $0x8,%eax
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define signext i16 @read16i(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @fgetc(i32* %4)
store i32 %5, i32* %3
%6 = load i32*, i32** %2
%7 = call i32 @fgetc(i32* %6)
%8 = shl i32 %7, 8
%9 = load i32, i32* %3
%10 = add nsw i32 %9, %8
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = trunc i32 %11 to i16
ret i16 %12
}

LLVM IR (-O2):
define signext i16 @read16i(i32* nocapture %0) {
%2 = tail call i32 @fgetc(i32* %0)
%3 = tail call i32 @fgetc(i32* %0)
%4 = shl i32 %3, 8
%5 = add nsw i32 %4, %2
%6 = trunc i32 %5 to i16
ret i16 %6
}
void RTMemEfFree(void) {}


x86 assembly (clang, -O0):
<RTMemEfFree>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTMemEfFree>:
ret

LLVM IR (-O0):
define void @RTMemEfFree() {
ret void
}

LLVM IR (-O2):
define void @RTMemEfFree() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sched_yield();
void nop(void) { sched_yield(); }


x86 assembly (clang, -O0):
<nop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sched_yield@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nop>:
xor    %eax,%eax
jmp    1030 <sched_yield@plt>

LLVM IR (-O0):
define void @nop() {
%1 = call i32 (...) @sched_yield()
ret void
}

LLVM IR (-O2):
define void @nop() {
%1 = tail call i32 (...) @sched_yield()
ret void
}
/* Variables and functions */
int getrandom();
int /*<<< orphan*/ printf(char *);
void getarr(int arr[], int n) {
  while (n--)
    arr[n] = getrandom();
  printf("\n");
}


x86 assembly (clang, -O0):
<getarr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
je     115c <getarr+0x3c>
mov    $0x0,%al
call   1040 <getrandom@plt>
mov    %eax,%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
jmp    112f <getarr+0xf>
lea    0xe9d(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getarr>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
je     1154 <getarr+0x34>
mov    %esi,%r15d
movslq %esi,%rax
lea    (%rdi,%rax,4),%r14
add    $0xfffffffffffffffc,%r14
neg    %r15d
xor    %ebx,%ebx
nopl   0x0(%rax)
xor    %eax,%eax
call   1040 <getrandom@plt>
mov    %eax,(%r14,%rbx,4)
add    $0xffffffffffffffff,%rbx
cmp    %ebx,%r15d
jne    1140 <getarr+0x20>
mov    $0xa,%edi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @getarr(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %9, %2
%6 = load i32, i32* %4
%7 = add nsw i32 %6, -1
store i32 %7, i32* %4
%8 = icmp ne i32 %6, 0
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = call i32 (...) @getrandom()
%11 = load i32*, i32** %3
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
store i32 %10, i32* %14
br label %5
15: ; preds = %5
%16 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
define void @getarr(i32* nocapture writeonly %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %13, label %4
4: ; preds = %2
%5 = sext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ %5, %4 ], [ %8, %6 ]
%8 = add nsw i64 %7, -1
%9 = tail call i32 (...) @getrandom()
%10 = getelementptr inbounds i32, i32* %0, i64 %8
store i32 %9, i32* %10
%11 = trunc i64 %8 to i32
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = tail call i32 @putchar(i32 10)
ret void
}
int compare_degs(const void *a, const void *b) {
  const unsigned short *aa, *bb;
  aa = a;
  bb = b;
  return (int)(*aa) - (int)(*bb);
}


x86 assembly (clang, -O0):
<compare_degs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
movzwl (%rax),%eax
mov    -0x20(%rbp),%rcx
movzwl (%rcx),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_degs>:
movzwl (%rdi),%eax
movzwl (%rsi),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @compare_degs(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i16*
%6 = alloca i16*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i16*
store i16* %8, i16** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i16*
store i16* %10, i16** %6
%11 = load i16*, i16** %5
%12 = load i16, i16* %11
%13 = zext i16 %12 to i32
%14 = load i16*, i16** %6
%15 = load i16, i16* %14
%16 = zext i16 %15 to i32
%17 = sub nsw i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @compare_degs(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i16*
%4 = bitcast i8* %1 to i16*
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = load i16, i16* %4
%8 = zext i16 %7 to i32
%9 = sub nsw i32 %6, %8
ret i32 %9
}
int ft_strcmp(const char *s1, const char *s2) {
  while (*s1 && *s1 == *s2) {
    s1++;
    s2++;
  }
  return ((unsigned char)*s1 - (unsigned char)*s2);
}


x86 assembly (clang, -O0):
<ft_strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x11(%rbp)
je     1137 <ft_strcmp+0x37>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    1147 <ft_strcmp+0x47>
jmp    1164 <ft_strcmp+0x64>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110c <ft_strcmp+0xc>
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movzbl (%rcx),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strcmp>:
mov    (%rdi),%al
test   %al,%al
je     1123 <ft_strcmp+0x23>
add    $0x1,%rdi
nopw   0x0(%rax,%rax,1)
cmp    (%rsi),%al
jne    1125 <ft_strcmp+0x25>
add    $0x1,%rsi
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
jne    1110 <ft_strcmp+0x10>
xor    %eax,%eax
movzbl %al,%eax
movzbl (%rsi),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ft_strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %20, %2
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = load i8*, i8** %4
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %13, %16
br label %18
18: ; preds = %10, %5
%19 = phi i1 [ false, %5 ], [ %17, %10 ]
br i1 %19, label %20, label %25
20: ; preds = %18
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %3
%23 = load i8*, i8** %4
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %4
br label %5
25: ; preds = %18
%26 = load i8*, i8** %3
%27 = load i8, i8* %26
%28 = zext i8 %27 to i32
%29 = load i8*, i8** %4
%30 = load i8, i8* %29
%31 = zext i8 %30 to i32
%32 = sub nsw i32 %28, %31
ret i32 %32
}

LLVM IR (-O2):
define i32 @ft_strcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %16, label %5
5: ; preds = %2, %11
%6 = phi i8 [ %14, %11 ], [ %3, %2 ]
%7 = phi i8* [ %13, %11 ], [ %1, %2 ]
%8 = phi i8* [ %12, %11 ], [ %0, %2 ]
%9 = load i8, i8* %7
%10 = icmp eq i8 %6, %9
br i1 %10, label %11, label %16
11: ; preds = %5
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = getelementptr inbounds i8, i8* %7, i64 1
%14 = load i8, i8* %12
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %5
16: ; preds = %5, %11, %2
%17 = phi i8* [ %1, %2 ], [ %13, %11 ], [ %7, %5 ]
%18 = phi i8 [ 0, %2 ], [ 0, %11 ], [ %6, %5 ]
%19 = zext i8 %18 to i32
%20 = load i8, i8* %17
%21 = zext i8 %20 to i32
%22 = sub nsw i32 %19, %21
ret i32 %22
}
/* Variables and functions */
int /*<<< orphan*/ gmvwrite_surfflag_header();
void fgmvwrite_surfflag_header_() { gmvwrite_surfflag_header(); }


x86 assembly (clang, -O0):
<fgmvwrite_surfflag_header_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <gmvwrite_surfflag_header@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgmvwrite_surfflag_header_>:
xor    %eax,%eax
jmp    1030 <gmvwrite_surfflag_header@plt>

LLVM IR (-O0):
define void @fgmvwrite_surfflag_header_() {
%1 = call i32 (...) @gmvwrite_surfflag_header()
ret void
}

LLVM IR (-O2):
define void @fgmvwrite_surfflag_header_() {
%1 = tail call i32 (...) @gmvwrite_surfflag_header()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sem_t;

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
scalar_t__ sem_init(int /*<<< orphan*/ *, int, int);
void semaphore_init(sem_t *sem, int def) {
  if (sem_init(sem, 1, def) != 0) {
    perror("sem_init");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<semaphore_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    $0x1,%esi
call   1030 <sem_init@plt>
cmp    $0x0,%rax
je     1170 <semaphore_init+0x40>
lea    0xe9f(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<semaphore_init>:
push   %rax
mov    %esi,%edx
mov    $0x1,%esi
call   1030 <sem_init@plt>
test   %rax,%rax
jne    1144 <semaphore_init+0x14>
pop    %rax
ret
lea    0xeb5(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"sem_init\00"
define void @semaphore_init(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i64 @sem_init(i32* %5, i32 1, i32 %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = call i32 @perror(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%11 = call i32 @exit(i32 1)
unreachable
12: ; preds = %2
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"sem_init\00"
define void @semaphore_init(i32* %0, i32 %1) {
%3 = tail call i64 @sem_init(i32* %0, i32 1, i32 %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @perror(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 @exit(i32 1)
unreachable
8: ; preds = %2
ret void
}