xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int ispythag(uint32_t a, uint32_t b, uint32_t c) {
  return ((a * a) + (b * b) == (c * c));
}


x86 assembly (clang, -O0):
<ispythag>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   -0x8(%rbp),%ecx
add    %ecx,%eax
mov    -0xc(%rbp),%ecx
imul   -0xc(%rbp),%ecx
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ispythag>:
imul   %edi,%edi
imul   %esi,%esi
add    %edi,%esi
imul   %edx,%edx
xor    %eax,%eax
cmp    %edx,%esi
sete   %al
ret

LLVM IR (-O0):
define i32 @ispythag(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %4
%9 = mul nsw i32 %7, %8
%10 = load i32, i32* %5
%11 = load i32, i32* %5
%12 = mul nsw i32 %10, %11
%13 = add nsw i32 %9, %12
%14 = load i32, i32* %6
%15 = load i32, i32* %6
%16 = mul nsw i32 %14, %15
%17 = icmp eq i32 %13, %16
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @ispythag(i32 %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %0, %0
%5 = mul nsw i32 %1, %1
%6 = add nuw nsw i32 %5, %4
%7 = mul nsw i32 %2, %2
%8 = icmp eq i32 %6, %7
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Variables and functions */
double gsw_rho(double, double, int);
double gsw_sigma2(double sa, double ct) {
  return (gsw_rho(sa, ct, 2000e0) - 1000e0);
}


x86 assembly (clang, -O0):
<gsw_sigma2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mov    $0x7d0,%edi
call   1030 <gsw_rho@plt>
movsd  0xec2(%rip),%xmm1
subsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gsw_sigma2>:
push   %rax
mov    $0x7d0,%edi
call   1030 <gsw_rho@plt>
addsd  0xedd(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @gsw_sigma2(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @gsw_rho(double %5, double %6, i32 2000)
%8 = fsub double %7, 1.000000e+03
ret double %8
}

LLVM IR (-O2):
define double @gsw_sigma2(double %0, double %1) {
%3 = tail call double @gsw_rho(double %0, double %1, i32 2000)
%4 = fadd double %3, -1.000000e+03
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ out_char(char);
void outs(char *s) {
  while (*s) {
    out_char(*s);
    ++s;
  }
}


x86 assembly (clang, -O0):
<outs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1146 <outs+0x36>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <out_char@plt>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <outs+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outs>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <outs+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <out_char@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <outs+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @outs(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = call i32 @out_char(i8 signext %9)
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @outs(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = tail call i32 @out_char(i8 signext %5)
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
int tls13_client_key_update_send(struct tls13_ctx *ctx) { return 1; }


x86 assembly (clang, -O0):
<tls13_client_key_update_send>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tls13_client_key_update_send>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.tls13_ctx = type opaque
define i32 @tls13_client_key_update_send(%struct.tls13_ctx* %0) {
%2 = alloca %struct.tls13_ctx*
store %struct.tls13_ctx* %0, %struct.tls13_ctx** %2
ret i32 1
}

LLVM IR (-O2):
%struct.tls13_ctx = type opaque
define i32 @tls13_client_key_update_send(%struct.tls13_ctx* nocapture readnone %0) {
ret i32 1
}
/* Variables and functions */
double cos(double);
double sin(double);
void sincos(double x, double *p_sin, double *p_cos) {
  *p_sin = sin(x);
  *p_cos = cos(x);
}


x86 assembly (clang, -O0):
<sincos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <sin@plt>
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
movsd  -0x8(%rbp),%xmm0
call   1040 <cos@plt>
mov    -0x18(%rbp),%rax
movsd  %xmm0,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sincos>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
movsd  %xmm0,(%rsp)
call   1030 <sin@plt>
movsd  %xmm0,(%rbx)
movsd  (%rsp),%xmm0
call   1040 <cos@plt>
movsd  %xmm0,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @sincos(double %0, double* %1, double* %2) {
%4 = alloca double
%5 = alloca double*
%6 = alloca double*
store double %0, double* %4
store double* %1, double** %5
store double* %2, double** %6
%7 = load double, double* %4
%8 = call double @sin(double %7)
%9 = load double*, double** %5
store double %8, double* %9
%10 = load double, double* %4
%11 = call double @cos(double %10)
%12 = load double*, double** %6
store double %11, double* %12
ret void
}

LLVM IR (-O2):
define void @sincos(double %0, double* nocapture writeonly %1, double* nocapture writeonly %2) {
%4 = tail call double @sin(double %0)
store double %4, double* %1
%5 = tail call double @cos(double %0)
store double %5, double* %2
ret void
}
int test_imm_AEint8_reg(signed char val) {
  return ((val) & (-0xAE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_AEint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff52,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_AEint8_reg>:
test   $0xffffff52,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_AEint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -174
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_AEint8_reg(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = and i32 %2, -174
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
unsigned long gfx_get_display_video_offset();
unsigned long sc1200_get_video_offset(void) {
  return (gfx_get_display_video_offset());
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <gfx_get_display_video_offset@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
xor    %eax,%eax
jmp    1030 <gfx_get_display_video_offset@plt>

LLVM IR (-O0):
define i64 @sc1200_get_video_offset() {
%1 = call i64 (...) @gfx_get_display_video_offset()
ret i64 %1
}

LLVM IR (-O2):
define i64 @sc1200_get_video_offset() {
%1 = tail call i64 (...) @gfx_get_display_video_offset()
ret i64 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int main() {
  char *prt = "Hello";
  *prt = 'T';
  printf("prt: %s\n", prt);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x54,(%rax)
mov    -0x8(%rbp),%rsi
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeee(%rip),%rdi
lea    0xee1(%rip),%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"Hello\00"
@.str.1 = [9 x i8] c"prt: %s\0A\00"
define i32 @main() {
%1 = alloca i8*
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
store i8 84, i8* %2
%3 = load i8*, i8** %1
%4 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"Hello\00"
@.str.1 = [9 x i8] c"prt: %s\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ g(int *, int *, int);
void f(int x, int y, int *z) {
  if (x > 0) {
    f(x - 2, y, z);
    g(&y, z, x);
  } else
    *z = y;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1163 <f+0x43>
mov    -0x4(%rbp),%edi
sub    $0x2,%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1030 <f@plt>
mov    -0x10(%rbp),%rsi
mov    -0x4(%rbp),%edx
lea    -0x8(%rbp),%rdi
call   1040 <g@plt>
jmp    116c <f+0x4c>
mov    -0x8(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %esi,0x4(%rsp)
test   %edi,%edi
jle    114d <f+0x2d>
mov    %edi,%ebx
lea    -0x2(%rbx),%edi
mov    %r14,%rdx
call   1030 <f@plt>
lea    0x4(%rsp),%rdi
mov    %r14,%rsi
mov    %ebx,%edx
call   1040 <g@plt>
jmp    1150 <f+0x30>
mov    %esi,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @f(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %3
%10 = load i32, i32* %4
%11 = sub nsw i32 %10, 2
%12 = load i32, i32* %5
%13 = load i32*, i32** %6
%14 = load i32*, i32** %6
%15 = load i32, i32* %4
%16 = call i32 @g(i32* %5, i32* %14, i32 %15)
br label %20
17: ; preds = %3
%18 = load i32, i32* %5
%19 = load i32*, i32** %6
store i32 %18, i32* %19
br label %20
20: ; preds = %17, %9
ret void
}

LLVM IR (-O2):
define void @f(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
store i32 %1, i32* %4
%5 = icmp sgt i32 %0, 0
br i1 %5, label %7, label %10
6: ; preds = %10, %7
ret void
7: ; preds = %3
%8 = add nsw i32 %0, -2
tail call void @f(i32 %8, i32 %1, i32* %2)
%9 = call i32 @g(i32* %4, i32* %2, i32 %0)
br label %6
10: ; preds = %3
store i32 %1, i32* %2
br label %6
}
/* Variables and functions */
bool dbg_ports() { return false; }


x86 assembly (clang, -O0):
<dbg_ports>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbg_ports>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dbg_ports() {
ret i32 0
}

LLVM IR (-O2):
define i32 @dbg_ports() {
ret i32 0
}
void NV12ToRGB565Row_Any_NEON() {}


x86 assembly (clang, -O0):
<NV12ToRGB565Row_Any_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NV12ToRGB565Row_Any_NEON>:
ret

LLVM IR (-O0):
define void @NV12ToRGB565Row_Any_NEON() {
ret void
}

LLVM IR (-O2):
define void @NV12ToRGB565Row_Any_NEON() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage() {
  fprintf(stderr, "usage: gln_index [-hVvpcs] [-d DB_DIR] [-r INDEX_ROOT] \n"
                  "                 [-f FILTER_CONFIG_FILE] [-w WORKER_CT]\n"
                  "    See gln_filter(1) for more information.\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [157 x i8] c"usage: gln_index [-hVvpcs] [-d DB_DIR] [-r INDEX_ROOT] \0A [-f FILTER_CONFIG_FILE] [-w WORKER_CT]\0A See gln_filter(1) for more information.\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([157 x i8], [157 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [157 x i8] c"usage: gln_index [-hVvpcs] [-d DB_DIR] [-r INDEX_ROOT] \0A [-f FILTER_CONFIG_FILE] [-w WORKER_CT]\0A See gln_filter(1) for more information.\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([157 x i8], [157 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
int mul(int a, int b) {
  int c;
  c = a * b;
  return c;
}


x86 assembly (clang, -O0):
<mul>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mul>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @mul(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = mul nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @mul(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
ret i32 %3
}
void foo_2_1_1_1_2_1_1_1_1() {}


x86 assembly (clang, -O0):
<foo_2_1_1_1_2_1_1_1_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_1_1_1_2_1_1_1_1>:
ret

LLVM IR (-O0):
define void @foo_2_1_1_1_2_1_1_1_1() {
ret void
}

LLVM IR (-O2):
define void @foo_2_1_1_1_2_1_1_1_1() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int db_repair() { printf("Nothing here!"); }


x86 assembly (clang, -O0):
<db_repair>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<db_repair>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"Nothing here!\00"
define i32 @db_repair() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [14 x i8] c"Nothing here!\00"
define i32 @db_repair() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
void *memset(void *, int /*<<< orphan*/, unsigned int);
void *ia_css_cpu_mem_set_zero(void *dst, unsigned int size) {
  return memset(dst, 0, size);
}


x86 assembly (clang, -O0):
<ia_css_cpu_mem_set_zero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ia_css_cpu_mem_set_zero>:
mov    %esi,%edx
xor    %esi,%esi
jmp    1030 <memset@plt>

LLVM IR (-O0):
define i8* @ia_css_cpu_mem_set_zero(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i8* @memset(i8* %5, i32 0, i32 %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @ia_css_cpu_mem_set_zero(i8* %0, i32 %1) {
%3 = tail call i8* @memset(i8* %0, i32 0, i32 %1)
ret i8* %3
}
void FillStack() {}


x86 assembly (clang, -O0):
<FillStack>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FillStack>:
ret

LLVM IR (-O0):
define void @FillStack() {
ret void
}

LLVM IR (-O2):
define void @FillStack() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t round_up_to_power_of_2(uint32_t i) {
  i--;
  i |= i >> 1;
  i |= i >> 2;
  i |= i >> 4;
  i |= i >> 8;
  i |= i >> 16;
  i++;
  return i;
}


x86 assembly (clang, -O0):
<round_up_to_power_of_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x2,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_up_to_power_of_2>:
lea    -0x1(%rdi),%eax
mov    %eax,%ecx
sar    %ecx
or     %eax,%ecx
mov    %ecx,%eax
sar    $0x2,%eax
or     %ecx,%eax
mov    %eax,%ecx
sar    $0x4,%ecx
or     %eax,%ecx
mov    %ecx,%edx
sar    $0x8,%edx
or     %ecx,%edx
mov    %edx,%eax
sar    $0x10,%eax
or     %edx,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @round_up_to_power_of_2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, -1
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = ashr i32 %5, 1
%7 = load i32, i32* %2
%8 = or i32 %7, %6
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = ashr i32 %9, 2
%11 = load i32, i32* %2
%12 = or i32 %11, %10
store i32 %12, i32* %2
%13 = load i32, i32* %2
%14 = ashr i32 %13, 4
%15 = load i32, i32* %2
%16 = or i32 %15, %14
store i32 %16, i32* %2
%17 = load i32, i32* %2
%18 = ashr i32 %17, 8
%19 = load i32, i32* %2
%20 = or i32 %19, %18
store i32 %20, i32* %2
%21 = load i32, i32* %2
%22 = ashr i32 %21, 16
%23 = load i32, i32* %2
%24 = or i32 %23, %22
store i32 %24, i32* %2
%25 = load i32, i32* %2
%26 = add nsw i32 %25, 1
store i32 %26, i32* %2
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @round_up_to_power_of_2(i32 %0) {
%2 = add nsw i32 %0, -1
%3 = ashr i32 %2, 1
%4 = or i32 %3, %2
%5 = ashr i32 %4, 2
%6 = or i32 %5, %4
%7 = ashr i32 %6, 4
%8 = or i32 %7, %6
%9 = ashr i32 %8, 8
%10 = or i32 %9, %8
%11 = ashr i32 %10, 16
%12 = or i32 %11, %10
%13 = add nsw i32 %12, 1
ret i32 %13
}
int test_imm_4Buint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x4B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_4Buint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x4b,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_4Buint64_midword_reg>:
test   $0x4b0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_4Buint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 75
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_4Buint64_midword_reg(i64 %0) {
%2 = and i64 %0, 4915200
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void history_unmark(void *addr) {}


x86 assembly (clang, -O0):
<history_unmark>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<history_unmark>:
ret

LLVM IR (-O0):
define void @history_unmark(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @history_unmark(i8* nocapture %0) {
ret void
}
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_MONOTONIC;
int clock_gettime(int /*<<< orphan*/, struct timespec *);
int timespec_now_monotonic(struct timespec *ts) {
  return clock_gettime(CLOCK_MONOTONIC, ts);
}


x86 assembly (clang, -O0):
<timespec_now_monotonic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <clock_gettime@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timespec_now_monotonic>:
mov    %rdi,%rsi
mov    0x2ece(%rip),%rax
mov    (%rax),%edi
jmp    1030 <clock_gettime@plt>

LLVM IR (-O0):
%struct.timespec = type { i32 }
@CLOCK_MONOTONIC = global i32 0
define i32 @timespec_now_monotonic(%struct.timespec* %0) {
%2 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %2
%3 = load i32, i32* @CLOCK_MONOTONIC
%4 = load %struct.timespec*, %struct.timespec** %2
%5 = call i32 @clock_gettime(i32 %3, %struct.timespec* %4)
ret i32 %5
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@CLOCK_MONOTONIC = global i32 0
define i32 @timespec_now_monotonic(%struct.timespec* %0) {
%2 = load i32, i32* @CLOCK_MONOTONIC
%3 = tail call i32 @clock_gettime(i32 %2, %struct.timespec* %0)
ret i32 %3
}
/* Variables and functions */
scalar_t__ getheight();
int getheight_() { return ((int)getheight()); }


x86 assembly (clang, -O0):
<getheight_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getheight@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getheight_>:
xor    %eax,%eax
jmp    1030 <getheight@plt>

LLVM IR (-O0):
define i32 @getheight_() {
%1 = call i64 (...) @getheight()
%2 = trunc i64 %1 to i32
ret i32 %2
}

LLVM IR (-O2):
define i32 @getheight_() {
%1 = tail call i64 (...) @getheight()
%2 = trunc i64 %1 to i32
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ fgets(char *, int, int /*<<< orphan*/);
int find(char *, char);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, char *);
int /*<<< orphan*/ stdin;
int main() {
  char needle;
  char haystack[400];
  fgets(haystack, 400, stdin);
  scanf("%c", &needle);
  printf("%d\n", find(haystack, needle));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x1a0,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x1a0(%rbp),%rdi
mov    0x2e88(%rip),%rax
mov    (%rax),%edx
mov    $0x190,%esi
call   1040 <fgets@plt>
lea    0xe8d(%rip),%rdi
lea    -0x5(%rbp),%rsi
call   1060 <scanf@plt>
lea    -0x1a0(%rbp),%rdi
movsbl -0x5(%rbp),%esi
call   1050 <find@plt>
mov    %eax,%esi
lea    0xe6e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x1a0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x1a0,%rsp
mov    0x2e99(%rip),%rax
mov    (%rax),%edx
lea    0x10(%rsp),%rbx
mov    %rbx,%rdi
mov    $0x190,%esi
call   1040 <fgets@plt>
lea    0xe96(%rip),%rdi
lea    0xf(%rsp),%rsi
call   1060 <scanf@plt>
movsbl 0xf(%rsp),%esi
mov    %rbx,%rdi
call   1050 <find@plt>
lea    0xe7b(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x1a0,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@stdin = global i32 0
@.str = [3 x i8] c"%c\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca [400 x i8]
store i32 0, i32* %1
%4 = getelementptr inbounds [400 x i8], [400 x i8]* %3, i64 0, i64 0
%5 = load i32, i32* @stdin
%6 = call i32 @fgets(i8* %4, i32 400, i32 %5)
%7 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %2)
%8 = getelementptr inbounds [400 x i8], [400 x i8]* %3, i64 0, i64 0
%9 = load i8, i8* %2
%10 = call i32 @find(i8* %8, i8 signext %9)
%11 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %10)
ret i32 0
}

LLVM IR (-O2):
@stdin = global i32 0
@.str = [3 x i8] c"%c\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i8
%2 = alloca [400 x i8]
%3 = getelementptr inbounds [400 x i8], [400 x i8]* %2, i64 0, i64 0
%4 = load i32, i32* @stdin
%5 = call i32 @fgets(i8* %3, i32 400, i32 %4)
%6 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %1)
%7 = load i8, i8* %1
%8 = call i32 @find(i8* %3, i8 signext %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void print_prompt(int count) { printf("db %3d> ", count); }


x86 assembly (clang, -O0):
<print_prompt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_prompt>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"db %3d> \00"
define void @print_prompt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"db %3d> \00"
define void @print_prompt(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
__attribute__((__always___)) int __sigbits(int __signo) {
  return __signo > 32 ? 0 : (1 << (__signo - 1));
}


x86 assembly (clang, -O0):
<__sigbits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x20,-0x4(%rbp)
jle    111b <__sigbits+0x1b>
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    112b <__sigbits+0x2b>
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sigbits>:
lea    -0x1(%rdi),%ecx
mov    $0x1,%edx
shl    %cl,%edx
xor    %eax,%eax
cmp    $0x21,%edi
cmovl  %edx,%eax
ret

LLVM IR (-O0):
define i32 @__sigbits(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 32
br i1 %4, label %5, label %6
5: ; preds = %1
br label %10
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 1
%9 = shl i32 1, %8
br label %10
10: ; preds = %6, %5
%11 = phi i32 [ 0, %5 ], [ %9, %6 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @__sigbits(i32 %0) {
%2 = icmp sgt i32 %0, 32
%3 = add nsw i32 %0, -1
%4 = shl nuw i32 1, %3
%5 = select i1 %2, i32 0, i32 %4
ret i32 %5
}
char *efc_filecontents_return(char *buff, long *qttbytes, int error_code) {
  if (error_code)
    *qttbytes = (long)error_code;
  return buff;
}


x86 assembly (clang, -O0):
<efc_filecontents_return>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1124 <efc_filecontents_return+0x24>
movslq -0x14(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<efc_filecontents_return>:
mov    %rdi,%rax
test   %edx,%edx
je     110d <efc_filecontents_return+0xd>
movslq %edx,%rcx
mov    %rcx,(%rsi)
ret

LLVM IR (-O0):
define i8* @efc_filecontents_return(i8* %0, i64* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i64*
%6 = alloca i32
store i8* %0, i8** %4
store i64* %1, i64** %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = load i32, i32* %6
%11 = sext i32 %10 to i64
%12 = load i64*, i64** %5
store i64 %11, i64* %12
br label %13
13: ; preds = %9, %3
%14 = load i8*, i8** %4
ret i8* %14
}

LLVM IR (-O2):
define i8* @efc_filecontents_return(i8* readnone returned %0, i64* nocapture writeonly %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = sext i32 %2 to i64
store i64 %6, i64* %1
br label %7
7: ; preds = %5, %3
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0xf4() {
  Assert_real((isalpha(244) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              1225, ("isalpha should be 0 for 0xf4"));
}


x86 assembly (clang, -O0):
<t_isalpha_0xf4>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf4,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4c9,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0xf4>:
push   %rax
mov    $0xf4,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4c9,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xf4\00"
define void @t_isalpha_0xf4() {
%1 = call i64 @isalpha(i32 244)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1225, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xf4\00"
define void @t_isalpha_0xf4() {
%1 = tail call i64 @isalpha(i32 244)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1225, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int idl4_strlen1(const char *str) {
  int len = 1;
  while (*str++)
    len++;
  return len;
}


x86 assembly (clang, -O0):
<idl4_strlen1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,(%rax)
je     1135 <idl4_strlen1+0x35>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <idl4_strlen1+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<idl4_strlen1>:
cmpb   $0x0,(%rdi)
je     111b <idl4_strlen1+0x1b>
mov    $0x1,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <idl4_strlen1+0x10>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @idl4_strlen1(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 1, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @idl4_strlen1(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %8, %4 ], [ 1, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add nuw nsw i32 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 1, %1 ], [ %8, %4 ]
ret i32 %12
}
/* Variables and functions */
int intel_ich_gpio_set(int, int);
int board_kontron_986lcd_m(void) {
  int ret;
  ret = intel_ich_gpio_set(34, 1);
  if (!ret)
    ret = intel_ich_gpio_set(35, 1);
  return ret;
}


x86 assembly (clang, -O0):
<board_kontron_986lcd_m>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x22,%edi
mov    $0x1,%esi
call   1030 <intel_ich_gpio_set@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1146 <board_kontron_986lcd_m+0x36>
mov    $0x23,%edi
mov    $0x1,%esi
call   1030 <intel_ich_gpio_set@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<board_kontron_986lcd_m>:
push   %rax
mov    $0x22,%edi
mov    $0x1,%esi
call   1030 <intel_ich_gpio_set@plt>
test   %eax,%eax
je     1126 <board_kontron_986lcd_m+0x16>
pop    %rcx
ret
mov    $0x23,%edi
mov    $0x1,%esi
pop    %rax
jmp    1030 <intel_ich_gpio_set@plt>

LLVM IR (-O0):
define i32 @board_kontron_986lcd_m() {
%1 = alloca i32
%2 = call i32 @intel_ich_gpio_set(i32 34, i32 1)
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp ne i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %0
%6 = call i32 @intel_ich_gpio_set(i32 35, i32 1)
store i32 %6, i32* %1
br label %7
7: ; preds = %5, %0
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
define i32 @board_kontron_986lcd_m() {
%1 = tail call i32 @intel_ich_gpio_set(i32 34, i32 1)
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @intel_ich_gpio_set(i32 35, i32 1)
br label %5
5: ; preds = %3, %0
%6 = phi i32 [ %1, %0 ], [ %4, %3 ]
ret i32 %6
}
int test_imm_DDint32_reg(int val) { return ((val) & (0xDD << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_DDint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xdd,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DDint32_reg>:
test   $0xdd,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DDint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 221
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_DDint32_reg(i32 %0) {
%2 = and i32 %0, 221
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ MagnetometerHandle();
int /*<<< orphan*/ UAVObjRequestUpdate(int /*<<< orphan*/);
void MagnetometerRequestUpdate() { UAVObjRequestUpdate(MagnetometerHandle()); }


x86 assembly (clang, -O0):
<MagnetometerRequestUpdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <MagnetometerHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjRequestUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MagnetometerRequestUpdate>:
push   %rax
xor    %eax,%eax
call   1030 <MagnetometerHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjRequestUpdate@plt>

LLVM IR (-O0):
define void @MagnetometerRequestUpdate() {
%1 = call i32 (...) @MagnetometerHandle()
%2 = call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}

LLVM IR (-O2):
define void @MagnetometerRequestUpdate() {
%1 = tail call i32 (...) @MagnetometerHandle()
%2 = tail call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}
void clear_RnB() { (*(volatile unsigned char *)0x70200028) |= (1 << 4); }


x86 assembly (clang, -O0):
<clear_RnB>:
push   %rbp
mov    %rsp,%rbp
mov    $0x70200028,%eax
mov    (%rax),%al
movzbl %al,%eax
or     $0x10,%eax
mov    %al,%cl
mov    $0x70200028,%eax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_RnB>:
orb    $0x10,0x70200028
10
ret

LLVM IR (-O0):
define void @clear_RnB() {
%1 = load volatile i8, i8* inttoptr (i64 1881145384 to i8*)
%2 = zext i8 %1 to i32
%3 = or i32 %2, 16
%4 = trunc i32 %3 to i8
store volatile i8 %4, i8* inttoptr (i64 1881145384 to i8*)
ret void
}

LLVM IR (-O2):
define void @clear_RnB() {
%1 = load volatile i8, i8* inttoptr (i64 1881145384 to i8*)
%2 = or i8 %1, 16
store volatile i8 %2, i8* inttoptr (i64 1881145384 to i8*)
ret void
}
/* Variables and functions */
scalar_t__ RAND_MAX;
double rand();
double percent(double n) { return (n / 100.0 * rand()) / (double)RAND_MAX; }


x86 assembly (clang, -O0):
<percent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xed6(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
mulsd  %xmm1,%xmm0
mov    0x2e9b(%rip),%rax
cvtsi2sdq (%rax),%xmm1
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<percent>:
push   %rax
divsd  0xee7(%rip),%xmm0
movsd  %xmm0,(%rsp)
xor    %eax,%eax
call   1030 <rand@plt>
mulsd  (%rsp),%xmm0
mov    0x2eb7(%rip),%rax
cvtsi2sdq (%rax),%xmm1
divsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define double @percent(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 1.000000e+02
%5 = call double (...) @rand()
%6 = fmul double %4, %5
%7 = load i64, i64* @RAND_MAX
%8 = sitofp i64 %7 to double
%9 = fdiv double %6, %8
ret double %9
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define double @percent(double %0) {
%2 = fdiv double %0, 1.000000e+02
%3 = tail call double (...) @rand()
%4 = fmul double %2, %3
%5 = load i64, i64* @RAND_MAX
%6 = sitofp i64 %5 to double
%7 = fdiv double %4, %6
ret double %7
}
void _writer_buffer(const void *wdest, char c) {
  char **dest = (char **)wdest;
  **dest = c;
  dest[0][1] = 0;
  (*dest)++;
}


x86 assembly (clang, -O0):
<_writer_buffer>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x9(%rbp),%cl
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
movb   $0x0,0x1(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_writer_buffer>:
mov    (%rdi),%rax
mov    %sil,(%rax)
mov    (%rdi),%rax
movb   $0x0,0x1(%rax)
addq   $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @_writer_buffer(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i8**
store i8* %0, i8** %3
store i8 %1, i8* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i8**
store i8** %7, i8*** %5
%8 = load i8, i8* %4
%9 = load i8**, i8*** %5
%10 = load i8*, i8** %9
store i8 %8, i8* %10
%11 = load i8**, i8*** %5
%12 = getelementptr inbounds i8*, i8** %11, i64 0
%13 = load i8*, i8** %12
%14 = getelementptr inbounds i8, i8* %13, i64 1
store i8 0, i8* %14
%15 = load i8**, i8*** %5
%16 = load i8*, i8** %15
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %15
ret void
}

LLVM IR (-O2):
define void @_writer_buffer(i8* nocapture %0, i8 signext %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
store i8 %1, i8* %4
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 1
store i8 0, i8* %6
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i64 1
store i8* %8, i8** %3
ret void
}
float *Vector3AddToSelf(float v1[3], const float v2[3]) {
  v1[0] += v2[0];
  v1[1] += v2[1];
  v1[2] += v2[2];
  return v1;
}


x86 assembly (clang, -O0):
<Vector3AddToSelf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
addss  (%rax),%xmm0
movss  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    -0x8(%rbp),%rax
addss  0x4(%rax),%xmm0
movss  %xmm0,0x4(%rax)
mov    -0x10(%rbp),%rax
movss  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
addss  0x8(%rax),%xmm0
movss  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Vector3AddToSelf>:
mov    %rdi,%rax
movss  (%rsi),%xmm0
addss  (%rdi),%xmm0
movss  %xmm0,(%rdi)
movss  0x4(%rsi),%xmm0
addss  0x4(%rdi),%xmm0
movss  %xmm0,0x4(%rdi)
movss  0x8(%rsi),%xmm0
addss  0x8(%rdi),%xmm0
movss  %xmm0,0x8(%rdi)
ret

LLVM IR (-O0):
define float* @Vector3AddToSelf(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %4
%6 = getelementptr inbounds float, float* %5, i64 0
%7 = load float, float* %6
%8 = load float*, float** %3
%9 = getelementptr inbounds float, float* %8, i64 0
%10 = load float, float* %9
%11 = fadd float %10, %7
store float %11, float* %9
%12 = load float*, float** %4
%13 = getelementptr inbounds float, float* %12, i64 1
%14 = load float, float* %13
%15 = load float*, float** %3
%16 = getelementptr inbounds float, float* %15, i64 1
%17 = load float, float* %16
%18 = fadd float %17, %14
store float %18, float* %16
%19 = load float*, float** %4
%20 = getelementptr inbounds float, float* %19, i64 2
%21 = load float, float* %20
%22 = load float*, float** %3
%23 = getelementptr inbounds float, float* %22, i64 2
%24 = load float, float* %23
%25 = fadd float %24, %21
store float %25, float* %23
%26 = load float*, float** %3
ret float* %26
}

LLVM IR (-O2):
define float* @Vector3AddToSelf(float* returned %0, float* nocapture %1) {
%3 = load float, float* %1
%4 = load float, float* %0
%5 = fadd float %3, %4
store float %5, float* %0
%6 = getelementptr inbounds float, float* %1, i64 1
%7 = load float, float* %6
%8 = getelementptr inbounds float, float* %0, i64 1
%9 = load float, float* %8
%10 = fadd float %7, %9
store float %10, float* %8
%11 = getelementptr inbounds float, float* %1, i64 2
%12 = load float, float* %11
%13 = getelementptr inbounds float, float* %0, i64 2
%14 = load float, float* %13
%15 = fadd float %12, %14
store float %15, float* %13
ret float* %0
}
void avpriv_request_sample() {}


x86 assembly (clang, -O0):
<avpriv_request_sample>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avpriv_request_sample>:
ret

LLVM IR (-O0):
define void @avpriv_request_sample() {
ret void
}

LLVM IR (-O2):
define void @avpriv_request_sample() {
ret void
}
long v1(int m, int n) {
  long erg = 1;
  int a;
  for (a = 0; n <= m; a++) {
    erg *= n;
  }
  return erg;
}


x86 assembly (clang, -O0):
<v1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movq   $0x1,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     1140 <v1+0x40>
movslq -0x8(%rbp),%rax
imul   -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1119 <v1+0x19>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<v1>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i64 @v1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i64 1, i64* %5
store i32 0, i32* %6
br label %7
7: ; preds = %16, %2
%8 = load i32, i32* %4
%9 = load i32, i32* %3
%10 = icmp sle i32 %8, %9
br i1 %10, label %11, label %19
11: ; preds = %7
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = load i64, i64* %5
%15 = mul nsw i64 %14, %13
store i64 %15, i64* %5
br label %16
16: ; preds = %11
%17 = load i32, i32* %6
%18 = add nsw i32 %17, 1
store i32 %18, i32* %6
br label %7
19: ; preds = %7
%20 = load i64, i64* %5
ret i64 %20
}

LLVM IR (-O2):
define i64 @v1(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, %0
ret i64 1
}
void gtk_box_pack_end() {}


x86 assembly (clang, -O0):
<gtk_box_pack_end>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_box_pack_end>:
ret

LLVM IR (-O0):
define void @gtk_box_pack_end() {
ret void
}

LLVM IR (-O2):
define void @gtk_box_pack_end() {
ret void
}
int test_imm_2Euint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x2E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_2Euint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x2e,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Euint64_midword_reg>:
test   $0x2e0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Euint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 46
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_2Euint64_midword_reg(i64 %0) {
%2 = and i64 %0, 3014656
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ SyncCHR();
int /*<<< orphan*/ SyncMIR();
int /*<<< orphan*/ SyncPRG();
void Sync(void) {
  SyncPRG();
  SyncCHR();
  SyncMIR();
}


x86 assembly (clang, -O0):
<Sync>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <SyncPRG@plt>
mov    $0x0,%al
call   1050 <SyncCHR@plt>
mov    $0x0,%al
call   1030 <SyncMIR@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sync>:
push   %rax
xor    %eax,%eax
call   1040 <SyncPRG@plt>
xor    %eax,%eax
call   1050 <SyncCHR@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <SyncMIR@plt>

LLVM IR (-O0):
define void @Sync() {
%1 = call i32 (...) @SyncPRG()
%2 = call i32 (...) @SyncCHR()
%3 = call i32 (...) @SyncMIR()
ret void
}

LLVM IR (-O2):
define void @Sync() {
%1 = tail call i32 (...) @SyncPRG()
%2 = tail call i32 (...) @SyncCHR()
%3 = tail call i32 (...) @SyncMIR()
ret void
}
void sub() {
  asm volatile("popq %%rax\n\t"
               "subq %%rax, (%%rsp)\n\t" ::
                   :);
}


x86 assembly (clang, -O0):
<sub>:
push   %rbp
mov    %rsp,%rbp
pop    %rax
sub    %rax,(%rsp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub>:
pop    %rax
sub    %rax,(%rsp)
ret

LLVM IR (-O0):
define void @sub() {
ret void
}

LLVM IR (-O2):
define void @sub() {
tail call void asm sideeffect "popq %rax\0A\09subq %rax, (%rsp)\0A\09", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void colorCyn() { printf("%s", "\x1B[36m"); }


x86 assembly (clang, -O0):
<colorCyn>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee1(%rip),%rsi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<colorCyn>:
lea    0xee9(%rip),%rdi
lea    0xee5(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [6 x i8] c"\1B[36m\00"
define void @colorCyn() {
%1 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@.str.1 = [6 x i8] c"\1B[36m\00"
define void @colorCyn() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_assert(int);
unsigned int __VERIFIER_nondet_uint();
int main(void) {
  unsigned int x = __VERIFIER_nondet_uint();
  unsigned int y = x;
  while (x < 1024) {
    x++;
    y++;
  }
  __VERIFIER_assert(x < y);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <__VERIFIER_nondet_uint@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x400,-0x8(%rbp)
jae    1163 <main+0x43>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    113f <main+0x1f>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
setb   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__VERIFIER_assert@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <__VERIFIER_nondet_uint@plt>
xor    %edi,%edi
call   1030 <__VERIFIER_assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_uint()
store i32 %4, i32* %2
%5 = load i32, i32* %2
store i32 %5, i32* %3
br label %6
6: ; preds = %9, %0
%7 = load i32, i32* %2
%8 = icmp ult i32 %7, 1024
br i1 %8, label %9, label %14
9: ; preds = %6
%10 = load i32, i32* %2
%11 = add i32 %10, 1
store i32 %11, i32* %2
%12 = load i32, i32* %3
%13 = add i32 %12, 1
store i32 %13, i32* %3
br label %6
14: ; preds = %6
%15 = load i32, i32* %2
%16 = load i32, i32* %3
%17 = icmp ult i32 %15, %16
%18 = zext i1 %17 to i32
%19 = call i32 @__VERIFIER_assert(i32 %18)
%20 = load i32, i32* %1
ret i32 %20
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_uint()
%2 = tail call i32 @__VERIFIER_assert(i32 0)
ret i32 0
}