void pattern_whiteSquares(float *p) {
  float up_res = 8.0;
  int up_res_pattern_block_size = up_res * 32.0;
  int up_res_pattern_block_size_2 = up_res_pattern_block_size / 2;
  p[0] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 9;
  p[1] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 7;
  p[2] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 9;
  p[3] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 4;
  p[4] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 9;
  p[5] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 1;
  p[6] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 7;
  p[7] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 0;
  p[8] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 4;
  p[9] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 0;
  p[10] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 1;
  p[11] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 0;
  p[12] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 0;
  p[13] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 1;
  p[14] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 0;
  p[15] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 4;
  p[16] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 0;
  p[17] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 7;
  p[18] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 1;
  p[19] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 9;
  p[20] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 4;
  p[21] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 9;
  p[22] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 7;
  p[23] = up_res_pattern_block_size_2 - 0.5 + up_res_pattern_block_size * 9;
  return;
}


x86 assembly (clang, -O0):
<pattern_whiteSquares>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  0xf00(%rip),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xee2(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xeb4(%rip),%xmm1
subsd  %xmm1,%xmm0
imul   $0x9,-0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xe8b(%rip),%xmm1
subsd  %xmm1,%xmm0
imul   $0x7,-0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xe61(%rip),%xmm1
subsd  %xmm1,%xmm0
imul   $0x9,-0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x8(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xe37(%rip),%xmm1
subsd  %xmm1,%xmm0
mov    -0x10(%rbp),%eax
shl    $0x2,%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0xc(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xe0b(%rip),%xmm1
subsd  %xmm1,%xmm0
imul   $0x9,-0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x10(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xde1(%rip),%xmm1
subsd  %xmm1,%xmm0
mov    -0x10(%rbp),%eax
shl    $0x0,%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x14(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xdb5(%rip),%xmm1
subsd  %xmm1,%xmm0
imul   $0x7,-0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x18(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xd8b(%rip),%xmm1
subsd  %xmm1,%xmm0
imul   $0x0,-0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x1c(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xd61(%rip),%xmm1
subsd  %xmm1,%xmm0
mov    -0x10(%rbp),%eax
shl    $0x2,%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x20(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xd35(%rip),%xmm1
subsd  %xmm1,%xmm0
imul   $0x0,-0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x24(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xd0b(%rip),%xmm1
subsd  %xmm1,%xmm0
mov    -0x10(%rbp),%eax
shl    $0x0,%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x28(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xcdf(%rip),%xmm1
subsd  %xmm1,%xmm0
imul   $0x0,-0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x2c(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xcb5(%rip),%xmm1
subsd  %xmm1,%xmm0
imul   $0x0,-0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x30(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xc8b(%rip),%xmm1
subsd  %xmm1,%xmm0
mov    -0x10(%rbp),%eax
shl    $0x0,%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x34(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xc5f(%rip),%xmm1
subsd  %xmm1,%xmm0
imul   $0x0,-0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x38(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xc35(%rip),%xmm1
subsd  %xmm1,%xmm0
mov    -0x10(%rbp),%eax
shl    $0x2,%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x3c(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xc09(%rip),%xmm1
subsd  %xmm1,%xmm0
imul   $0x0,-0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x40(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xbdf(%rip),%xmm1
subsd  %xmm1,%xmm0
imul   $0x7,-0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x44(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xbb5(%rip),%xmm1
subsd  %xmm1,%xmm0
mov    -0x10(%rbp),%eax
shl    $0x0,%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x48(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xb89(%rip),%xmm1
subsd  %xmm1,%xmm0
imul   $0x9,-0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4c(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xb5f(%rip),%xmm1
subsd  %xmm1,%xmm0
mov    -0x10(%rbp),%eax
shl    $0x2,%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x50(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xb33(%rip),%xmm1
subsd  %xmm1,%xmm0
imul   $0x9,-0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x54(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xb09(%rip),%xmm1
subsd  %xmm1,%xmm0
imul   $0x7,-0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x58(%rax)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  0xadf(%rip),%xmm1
subsd  %xmm1,%xmm0
imul   $0x9,-0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x5c(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pattern_whiteSquares>:
movaps 0xef9(%rip),%xmm0
movups %xmm0,(%rdi)
movaps 0xeff(%rip),%xmm0
movups %xmm0,0x10(%rdi)
movaps 0xf04(%rip),%xmm0
movups %xmm0,0x20(%rdi)
movaps 0xf09(%rip),%xmm0
movups %xmm0,0x30(%rdi)
movaps 0xf0e(%rip),%xmm0
movups %xmm0,0x40(%rdi)
movaps 0xf13(%rip),%xmm0
movups %xmm0,0x50(%rdi)
ret

LLVM IR (-O0):
define void @pattern_whiteSquares(float* %0) {
%2 = alloca float*
%3 = alloca float
%4 = alloca i32
%5 = alloca i32
store float* %0, float** %2
store float 8.000000e+00, float* %3
%6 = load float, float* %3
%7 = fpext float %6 to double
%8 = fmul double %7, 3.200000e+01
%9 = fptosi double %8 to i32
store i32 %9, i32* %4
%10 = load i32, i32* %4
%11 = sdiv i32 %10, 2
store i32 %11, i32* %5
%12 = load i32, i32* %5
%13 = sitofp i32 %12 to double
%14 = fsub double %13, 5.000000e-01
%15 = load i32, i32* %4
%16 = mul nsw i32 %15, 9
%17 = sitofp i32 %16 to double
%18 = fadd double %14, %17
%19 = fptrunc double %18 to float
%20 = load float*, float** %2
%21 = getelementptr inbounds float, float* %20, i64 0
store float %19, float* %21
%22 = load i32, i32* %5
%23 = sitofp i32 %22 to double
%24 = fsub double %23, 5.000000e-01
%25 = load i32, i32* %4
%26 = mul nsw i32 %25, 7
%27 = sitofp i32 %26 to double
%28 = fadd double %24, %27
%29 = fptrunc double %28 to float
%30 = load float*, float** %2
%31 = getelementptr inbounds float, float* %30, i64 1
store float %29, float* %31
%32 = load i32, i32* %5
%33 = sitofp i32 %32 to double
%34 = fsub double %33, 5.000000e-01
%35 = load i32, i32* %4
%36 = mul nsw i32 %35, 9
%37 = sitofp i32 %36 to double
%38 = fadd double %34, %37
%39 = fptrunc double %38 to float
%40 = load float*, float** %2
%41 = getelementptr inbounds float, float* %40, i64 2
store float %39, float* %41
%42 = load i32, i32* %5
%43 = sitofp i32 %42 to double
%44 = fsub double %43, 5.000000e-01
%45 = load i32, i32* %4
%46 = mul nsw i32 %45, 4
%47 = sitofp i32 %46 to double
%48 = fadd double %44, %47
%49 = fptrunc double %48 to float
%50 = load float*, float** %2
%51 = getelementptr inbounds float, float* %50, i64 3
store float %49, float* %51
%52 = load i32, i32* %5
%53 = sitofp i32 %52 to double
%54 = fsub double %53, 5.000000e-01
%55 = load i32, i32* %4
%56 = mul nsw i32 %55, 9
%57 = sitofp i32 %56 to double
%58 = fadd double %54, %57
%59 = fptrunc double %58 to float
%60 = load float*, float** %2
%61 = getelementptr inbounds float, float* %60, i64 4
store float %59, float* %61
%62 = load i32, i32* %5
%63 = sitofp i32 %62 to double
%64 = fsub double %63, 5.000000e-01
%65 = load i32, i32* %4
%66 = mul nsw i32 %65, 1
%67 = sitofp i32 %66 to double
%68 = fadd double %64, %67
%69 = fptrunc double %68 to float
%70 = load float*, float** %2
%71 = getelementptr inbounds float, float* %70, i64 5
store float %69, float* %71
%72 = load i32, i32* %5
%73 = sitofp i32 %72 to double
%74 = fsub double %73, 5.000000e-01
%75 = load i32, i32* %4
%76 = mul nsw i32 %75, 7
%77 = sitofp i32 %76 to double
%78 = fadd double %74, %77
%79 = fptrunc double %78 to float
%80 = load float*, float** %2
%81 = getelementptr inbounds float, float* %80, i64 6
store float %79, float* %81
%82 = load i32, i32* %5
%83 = sitofp i32 %82 to double
%84 = fsub double %83, 5.000000e-01
%85 = load i32, i32* %4
%86 = mul nsw i32 %85, 0
%87 = sitofp i32 %86 to double
%88 = fadd double %84, %87
%89 = fptrunc double %88 to float
%90 = load float*, float** %2
%91 = getelementptr inbounds float, float* %90, i64 7
store float %89, float* %91
%92 = load i32, i32* %5
%93 = sitofp i32 %92 to double
%94 = fsub double %93, 5.000000e-01
%95 = load i32, i32* %4
%96 = mul nsw i32 %95, 4
%97 = sitofp i32 %96 to double
%98 = fadd double %94, %97
%99 = fptrunc double %98 to float
%100 = load float*, float** %2
%101 = getelementptr inbounds float, float* %100, i64 8
store float %99, float* %101
%102 = load i32, i32* %5
%103 = sitofp i32 %102 to double
%104 = fsub double %103, 5.000000e-01
%105 = load i32, i32* %4
%106 = mul nsw i32 %105, 0
%107 = sitofp i32 %106 to double
%108 = fadd double %104, %107
%109 = fptrunc double %108 to float
%110 = load float*, float** %2
%111 = getelementptr inbounds float, float* %110, i64 9
store float %109, float* %111
%112 = load i32, i32* %5
%113 = sitofp i32 %112 to double
%114 = fsub double %113, 5.000000e-01
%115 = load i32, i32* %4
%116 = mul nsw i32 %115, 1
%117 = sitofp i32 %116 to double
%118 = fadd double %114, %117
%119 = fptrunc double %118 to float
%120 = load float*, float** %2
%121 = getelementptr inbounds float, float* %120, i64 10
store float %119, float* %121
%122 = load i32, i32* %5
%123 = sitofp i32 %122 to double
%124 = fsub double %123, 5.000000e-01
%125 = load i32, i32* %4
%126 = mul nsw i32 %125, 0
%127 = sitofp i32 %126 to double
%128 = fadd double %124, %127
%129 = fptrunc double %128 to float
%130 = load float*, float** %2
%131 = getelementptr inbounds float, float* %130, i64 11
store float %129, float* %131
%132 = load i32, i32* %5
%133 = sitofp i32 %132 to double
%134 = fsub double %133, 5.000000e-01
%135 = load i32, i32* %4
%136 = mul nsw i32 %135, 0
%137 = sitofp i32 %136 to double
%138 = fadd double %134, %137
%139 = fptrunc double %138 to float
%140 = load float*, float** %2
%141 = getelementptr inbounds float, float* %140, i64 12
store float %139, float* %141
%142 = load i32, i32* %5
%143 = sitofp i32 %142 to double
%144 = fsub double %143, 5.000000e-01
%145 = load i32, i32* %4
%146 = mul nsw i32 %145, 1
%147 = sitofp i32 %146 to double
%148 = fadd double %144, %147
%149 = fptrunc double %148 to float
%150 = load float*, float** %2
%151 = getelementptr inbounds float, float* %150, i64 13
store float %149, float* %151
%152 = load i32, i32* %5
%153 = sitofp i32 %152 to double
%154 = fsub double %153, 5.000000e-01
%155 = load i32, i32* %4
%156 = mul nsw i32 %155, 0
%157 = sitofp i32 %156 to double
%158 = fadd double %154, %157
%159 = fptrunc double %158 to float
%160 = load float*, float** %2
%161 = getelementptr inbounds float, float* %160, i64 14
store float %159, float* %161
%162 = load i32, i32* %5
%163 = sitofp i32 %162 to double
%164 = fsub double %163, 5.000000e-01
%165 = load i32, i32* %4
%166 = mul nsw i32 %165, 4
%167 = sitofp i32 %166 to double
%168 = fadd double %164, %167
%169 = fptrunc double %168 to float
%170 = load float*, float** %2
%171 = getelementptr inbounds float, float* %170, i64 15
store float %169, float* %171
%172 = load i32, i32* %5
%173 = sitofp i32 %172 to double
%174 = fsub double %173, 5.000000e-01
%175 = load i32, i32* %4
%176 = mul nsw i32 %175, 0
%177 = sitofp i32 %176 to double
%178 = fadd double %174, %177
%179 = fptrunc double %178 to float
%180 = load float*, float** %2
%181 = getelementptr inbounds float, float* %180, i64 16
store float %179, float* %181
%182 = load i32, i32* %5
%183 = sitofp i32 %182 to double
%184 = fsub double %183, 5.000000e-01
%185 = load i32, i32* %4
%186 = mul nsw i32 %185, 7
%187 = sitofp i32 %186 to double
%188 = fadd double %184, %187
%189 = fptrunc double %188 to float
%190 = load float*, float** %2
%191 = getelementptr inbounds float, float* %190, i64 17
store float %189, float* %191
%192 = load i32, i32* %5
%193 = sitofp i32 %192 to double
%194 = fsub double %193, 5.000000e-01
%195 = load i32, i32* %4
%196 = mul nsw i32 %195, 1
%197 = sitofp i32 %196 to double
%198 = fadd double %194, %197
%199 = fptrunc double %198 to float
%200 = load float*, float** %2
%201 = getelementptr inbounds float, float* %200, i64 18
store float %199, float* %201
%202 = load i32, i32* %5
%203 = sitofp i32 %202 to double
%204 = fsub double %203, 5.000000e-01
%205 = load i32, i32* %4
%206 = mul nsw i32 %205, 9
%207 = sitofp i32 %206 to double
%208 = fadd double %204, %207
%209 = fptrunc double %208 to float
%210 = load float*, float** %2
%211 = getelementptr inbounds float, float* %210, i64 19
store float %209, float* %211
%212 = load i32, i32* %5
%213 = sitofp i32 %212 to double
%214 = fsub double %213, 5.000000e-01
%215 = load i32, i32* %4
%216 = mul nsw i32 %215, 4
%217 = sitofp i32 %216 to double
%218 = fadd double %214, %217
%219 = fptrunc double %218 to float
%220 = load float*, float** %2
%221 = getelementptr inbounds float, float* %220, i64 20
store float %219, float* %221
%222 = load i32, i32* %5
%223 = sitofp i32 %222 to double
%224 = fsub double %223, 5.000000e-01
%225 = load i32, i32* %4
%226 = mul nsw i32 %225, 9
%227 = sitofp i32 %226 to double
%228 = fadd double %224, %227
%229 = fptrunc double %228 to float
%230 = load float*, float** %2
%231 = getelementptr inbounds float, float* %230, i64 21
store float %229, float* %231
%232 = load i32, i32* %5
%233 = sitofp i32 %232 to double
%234 = fsub double %233, 5.000000e-01
%235 = load i32, i32* %4
%236 = mul nsw i32 %235, 7
%237 = sitofp i32 %236 to double
%238 = fadd double %234, %237
%239 = fptrunc double %238 to float
%240 = load float*, float** %2
%241 = getelementptr inbounds float, float* %240, i64 22
store float %239, float* %241
%242 = load i32, i32* %5
%243 = sitofp i32 %242 to double
%244 = fsub double %243, 5.000000e-01
%245 = load i32, i32* %4
%246 = mul nsw i32 %245, 9
%247 = sitofp i32 %246 to double
%248 = fadd double %244, %247
%249 = fptrunc double %248 to float
%250 = load float*, float** %2
%251 = getelementptr inbounds float, float* %250, i64 23
store float %249, float* %251
ret void
}

LLVM IR (-O2):
define void @pattern_whiteSquares(float* writeonly %0) {
%2 = bitcast float* %0 to <4 x float>*
store <4 x float> <float 2.431500e+03, float 1.919500e+03, float 2.431500e+03, float 1.151500e+03>, <4 x float>* %2
%3 = getelementptr inbounds float, float* %0, i64 4
%4 = bitcast float* %3 to <4 x float>*
store <4 x float> <float 2.431500e+03, float 3.835000e+02, float 1.919500e+03, float 1.275000e+02>, <4 x float>* %4
%5 = getelementptr inbounds float, float* %0, i64 8
%6 = bitcast float* %5 to <4 x float>*
store <4 x float> <float 1.151500e+03, float 1.275000e+02, float 3.835000e+02, float 1.275000e+02>, <4 x float>* %6
%7 = getelementptr inbounds float, float* %0, i64 12
%8 = bitcast float* %7 to <4 x float>*
store <4 x float> <float 1.275000e+02, float 3.835000e+02, float 1.275000e+02, float 1.151500e+03>, <4 x float>* %8
%9 = getelementptr inbounds float, float* %0, i64 16
%10 = bitcast float* %9 to <4 x float>*
store <4 x float> <float 1.275000e+02, float 1.919500e+03, float 3.835000e+02, float 2.431500e+03>, <4 x float>* %10
%11 = getelementptr inbounds float, float* %0, i64 20
%12 = bitcast float* %11 to <4 x float>*
store <4 x float> <float 1.151500e+03, float 2.431500e+03, float 1.919500e+03, float 2.431500e+03>, <4 x float>* %12
ret void
}