xunge/DecIR huggingface dataset:
/* Type definitions */
struct sockaddr {
  int dummy;
};
typedef int /*<<< orphan*/ ssize_t;
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
int /*<<< orphan*/ socketcall_cp(int /*<<< orphan*/ (*)(int, void const *,
                                                        size_t, int,
                                                        struct sockaddr const *,
                                                        int /*<<< orphan*/),
                                 int, void const *, size_t, int,
                                 struct sockaddr const *, int /*<<< orphan*/);
ssize_t sendto(int fd, const void *buf, size_t len, int flags,
               const struct sockaddr *addr, socklen_t alen) {
  return socketcall_cp(sendto, fd, buf, len, flags, addr, alen);
}


x86 assembly (clang, -O0):
<sendto>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9d,-0x2c(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x1c(%rbp),%r8d
mov    -0x28(%rbp),%r9
mov    -0x2c(%rbp),%eax
mov    0x2e9d(%rip),%rdi
mov    %eax,(%rsp)
call   1030 <socketcall_cp@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sendto>:
push   %rax
mov    %r8,%rax
mov    %ecx,%r8d
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %edi,%esi
mov    %r9d,(%rsp)
mov    0x2ebe(%rip),%rdi
mov    %rax,%r9
call   1030 <socketcall_cp@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
define i32 @sendto(i32 %0, i8* %1, i64 %2, i32 %3, %struct.sockaddr* %4, i32 %5) {
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i64
%10 = alloca i32
%11 = alloca %struct.sockaddr*
%12 = alloca i32
store i32 %0, i32* %7
store i8* %1, i8** %8
store i64 %2, i64* %9
store i32 %3, i32* %10
store %struct.sockaddr* %4, %struct.sockaddr** %11
store i32 %5, i32* %12
%13 = load i32, i32* %7
%14 = load i8*, i8** %8
%15 = load i64, i64* %9
%16 = load i32, i32* %10
%17 = load %struct.sockaddr*, %struct.sockaddr** %11
%18 = load i32, i32* %12
%19 = call i32 @socketcall_cp(i32 (i32, i8*, i64, i32, %struct.sockaddr*, i32)* @sendto, i32 %13, i8* %14, i64 %15, i32 %16, %struct.sockaddr* %17, i32 %18)
ret i32 %19
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
define i32 @sendto(i32 %0, i8* %1, i64 %2, i32 %3, %struct.sockaddr* %4, i32 %5) {
%7 = tail call i32 @socketcall_cp(i32 (i32, i8*, i64, i32, %struct.sockaddr*, i32)* @sendto, i32 %0, i8* %1, i64 %2, i32 %3, %struct.sockaddr* %4, i32 %5)
ret i32 %7
}
int do_026() { return 26; }


x86 assembly (clang, -O0):
<do_026>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_026>:
mov    $0x1a,%eax
ret

LLVM IR (-O0):
define i32 @do_026() {
ret i32 26
}

LLVM IR (-O2):
define i32 @do_026() {
ret i32 26
}
/* Variables and functions */
int /*<<< orphan*/ outb(unsigned short, int);
void serial_configure_modem(unsigned short com) { outb((com + 4), 0x03); }


x86 assembly (clang, -O0):
<serial_configure_modem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
add    $0x4,%eax
mov    $0x3,%esi
movzwl %ax,%edi
call   1030 <outb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_configure_modem>:
add    $0x4,%edi
movzwl %di,%edi
mov    $0x3,%esi
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @serial_configure_modem(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = add nsw i32 %4, 4
%6 = trunc i32 %5 to i16
%7 = call i32 @outb(i16 zeroext %6, i32 3)
ret void
}

LLVM IR (-O2):
define void @serial_configure_modem(i16 zeroext %0) {
%2 = add i16 %0, 4
%3 = tail call i32 @outb(i16 zeroext %2, i32 3)
ret void
}
int min_fnc(int a, int b) { return (a < b ? a : b); }


x86 assembly (clang, -O0):
<min_fnc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <min_fnc+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <min_fnc+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min_fnc>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @min_fnc(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @min_fnc(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void print1(int tab[], int N) {
  int i;
  for (i = 0; i < N; i++)
    printf("%d ", tab[i]);
}


x86 assembly (clang, -O0):
<print1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1157 <print1+0x47>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <print1+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print1>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1145 <print1+0x35>
mov    %rdi,%r15
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r14
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <print1+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d \00"
define void @print1(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d \00"
define void @print1(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ AbsoluteIndexedXX0(int);
int /*<<< orphan*/ INC16(int /*<<< orphan*/, int);
void OpFEM0X0(void) { INC16(AbsoluteIndexedXX0(3), 0xFFFFFF); }


x86 assembly (clang, -O0):
<OpFEM0X0>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <AbsoluteIndexedXX0@plt>
mov    %eax,%edi
mov    $0xffffff,%esi
call   1040 <INC16@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<OpFEM0X0>:
push   %rax
mov    $0x3,%edi
call   1030 <AbsoluteIndexedXX0@plt>
mov    %eax,%edi
mov    $0xffffff,%esi
pop    %rax
jmp    1040 <INC16@plt>

LLVM IR (-O0):
define void @OpFEM0X0() {
%1 = call i32 @AbsoluteIndexedXX0(i32 3)
%2 = call i32 @INC16(i32 %1, i32 16777215)
ret void
}

LLVM IR (-O2):
define void @OpFEM0X0() {
%1 = tail call i32 @AbsoluteIndexedXX0(i32 3)
%2 = tail call i32 @INC16(i32 %1, i32 16777215)
ret void
}
void ptm_power_idle_resume(int cpu) {}


x86 assembly (clang, -O0):
<ptm_power_idle_resume>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptm_power_idle_resume>:
ret

LLVM IR (-O0):
define void @ptm_power_idle_resume(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @ptm_power_idle_resume(i32 %0) {
ret void
}
const struct node *definition_const(const struct typ *t) {
  return definition(__builtin_choose_expr(
      __builtin_types_compatible_p(__typeof__(t), const struct node *),
      (struct node *)(t),
      __builtin_choose_expr(
          __builtin_types_compatible_p(__typeof__(t), const struct module *),
          (struct module *)(t),
          __builtin_choose_expr(
              __builtin_types_compatible_p(__typeof__(t), const struct typ *),
              (struct typ *)(t),
              __builtin_choose_expr(
                  __builtin_types_compatible_p(__typeof__(t),
                                               const struct toplevel *),
                  (struct toplevel *)(t),
                  __builtin_choose_expr(
                      __builtin_types_compatible_p(__typeof__(t),
                                                   const struct scope *),
                      (struct scope *)(t),
                      __builtin_choose_expr(
                          __builtin_types_compatible_p(__typeof__(t),
                                                       const struct typset *),
                          (struct typset *)(t),
                          __builtin_choose_expr(
                              __builtin_types_compatible_p(
                                  __typeof__(t), const struct constraint *),
                              (struct constraint *)(t),
                              __builtin_choose_expr(
                                  __builtin_types_compatible_p(
                                      __typeof__(t),
                                      const struct vecancestor *),
                                  (struct vecancestor *)(t), (t))))))))));
}


x86 assembly (clang, -O0):
<definition_const>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <definition@plt>
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<definition_const>:
push   %rax
xor    %eax,%eax
call   1030 <definition@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
%struct.node = type opaque
%struct.typ = type opaque
define %struct.node* @definition_const(%struct.typ* %0) {
%2 = alloca %struct.typ*
store %struct.typ* %0, %struct.typ** %2
%3 = load %struct.typ*, %struct.typ** %2
%4 = call i32 (%struct.typ*, ...) bitcast (i32 (...)* @definition to i32 (%struct.typ*, ...)*)(%struct.typ* %3)
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to %struct.node*
ret %struct.node* %6
}

LLVM IR (-O2):
%struct.node = type opaque
%struct.typ = type opaque
define %struct.node* @definition_const(%struct.typ* %0) {
%2 = tail call i32 (%struct.typ*, ...) bitcast (i32 (...)* @definition to i32 (%struct.typ*, ...)*)(%struct.typ* %0)
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to %struct.node*
ret %struct.node* %4
}
/* Variables and functions */
int add(int, int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int x = 10;
  int y = 20;
  int c = add(x, y);
  printf("%d\n", c);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xa,-0x4(%rbp)
movl   $0x14,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <add@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xeb2(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
mov    $0x14,%esi
call   1030 <add@plt>
lea    0xec9(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 10, i32* %1
store i32 20, i32* %2
%4 = load i32, i32* %1
%5 = load i32, i32* %2
%6 = call i32 @add(i32 %4, i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @add(i32 10, i32 20)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Type definitions */
struct struct_automata {
  int dummy;
};

/* Variables and functions */
size_t _func_card_stat(struct struct_automata *, int /*<<< orphan*/);
size_t func_card_stat(struct struct_automata *p) {
  return _func_card_stat(p, 0);
}


x86 assembly (clang, -O0):
<func_card_stat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <_func_card_stat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_card_stat>:
xor    %esi,%esi
jmp    1030 <_func_card_stat@plt>

LLVM IR (-O0):
%struct.struct_automata = type { i32 }
define i64 @func_card_stat(%struct.struct_automata* %0) {
%2 = alloca %struct.struct_automata*
store %struct.struct_automata* %0, %struct.struct_automata** %2
%3 = load %struct.struct_automata*, %struct.struct_automata** %2
%4 = call i64 @_func_card_stat(%struct.struct_automata* %3, i32 0)
ret i64 %4
}

LLVM IR (-O2):
%struct.struct_automata = type { i32 }
define i64 @func_card_stat(%struct.struct_automata* %0) {
%2 = tail call i64 @_func_card_stat(%struct.struct_automata* %0, i32 0)
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ fp_indata(int /*<<< orphan*/);
void fp_inbuffer(unsigned char *bufferp, int blen) {
  while (blen-- > 0)
    fp_indata(*bufferp++);
}


x86 assembly (clang, -O0):
<fp_inbuffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
jle    114f <fp_inbuffer+0x3f>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%edi
call   1030 <fp_indata@plt>
jmp    111f <fp_inbuffer+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fp_inbuffer>:
push   %rbp
push   %rbx
push   %rax
test   %esi,%esi
jle    1134 <fp_inbuffer+0x24>
mov    %esi,%ebp
mov    %rdi,%rbx
add    $0x1,%ebp
nop
movzbl (%rbx),%edi
add    $0x1,%rbx
call   1030 <fp_indata@plt>
add    $0xffffffff,%ebp
cmp    $0x1,%ebp
ja     1120 <fp_inbuffer+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @fp_inbuffer(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %9, %2
%6 = load i32, i32* %4
%7 = add nsw i32 %6, -1
store i32 %7, i32* %4
%8 = icmp sgt i32 %6, 0
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %3
%12 = load i8, i8* %10
%13 = zext i8 %12 to i32
%14 = call i32 @fp_indata(i32 %13)
br label %5
15: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @fp_inbuffer(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = phi i8* [ %8, %4 ], [ %0, %2 ]
%7 = add nsw i32 %5, -1
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %6
%10 = zext i8 %9 to i32
%11 = tail call i32 @fp_indata(i32 %10)
%12 = icmp ugt i32 %5, 1
br i1 %12, label %4, label %13
13: ; preds = %4, %2
ret void
}
int Calculator_mul(int a, int b) { return a * b; }


x86 assembly (clang, -O0):
<Calculator_mul>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Calculator_mul>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @Calculator_mul(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @Calculator_mul(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *, int /*<<< orphan*/);
int copy_multprec_start_solutions_to_container(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc(287, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<copy_multprec_start_solutions_to_container>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x11f,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_multprec_start_solutions_to_container>:
mov    $0x11f,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @copy_multprec_start_solutions_to_container() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 287, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @copy_multprec_start_solutions_to_container() {
%1 = tail call i32 @_ada_use_c2phc(i32 287, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ utest_control();
void utest_adts_cycles(void) {
  utest_control();
  return;
}


x86 assembly (clang, -O0):
<utest_adts_cycles>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <utest_control@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<utest_adts_cycles>:
xor    %eax,%eax
jmp    1030 <utest_control@plt>

LLVM IR (-O0):
define void @utest_adts_cycles() {
%1 = call i32 (...) @utest_control()
ret void
}

LLVM IR (-O2):
define void @utest_adts_cycles() {
%1 = tail call i32 (...) @utest_control()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, int);
int /*<<< orphan*/ stderr;
void bad_padding(char *msg, int diff) {
  fprintf(stderr, "kallsyms: %s padding too short: %d missing\n", msg, diff);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<bad_padding>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
lea    0xeba(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e86(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<bad_padding>:
push   %rax
mov    %esi,%ecx
mov    %rdi,%rdx
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
lea    0xeca(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e96(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [44 x i8] c"kallsyms: %s padding too short: %d missing\0A\00"
@EXIT_FAILURE = global i32 0
define void @bad_padding(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8* %6, i32 %7)
%9 = load i32, i32* @EXIT_FAILURE
%10 = call i32 @exit(i32 %9)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [44 x i8] c"kallsyms: %s padding too short: %d missing\0A\00"
@EXIT_FAILURE = global i32 0
define void @bad_padding(i8* %0, i32 %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
%5 = load i32, i32* @EXIT_FAILURE
%6 = tail call i32 @exit(i32 %5)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ console_putc(char);
int console_puts(char const *);
int puts(const char *s) {
  int i = console_puts(s);
  console_putc('\n');
  return i;
}


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <console_puts@plt>
mov    %eax,-0xc(%rbp)
mov    $0xa,%edi
call   1040 <console_putc@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
push   %rbx
call   1030 <console_puts@plt>
mov    %eax,%ebx
mov    $0xa,%edi
call   1040 <console_putc@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @puts(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @console_puts(i8* %4)
store i32 %5, i32* %3
%6 = call i32 @console_putc(i8 signext 10)
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @puts(i8* %0) {
%2 = tail call i32 @console_puts(i8* %0)
%3 = tail call i32 @console_putc(i8 signext 10)
ret i32 %2
}
int get_col(int offset) {
  offset /= 2;
  return offset % 80;
}


x86 assembly (clang, -O0):
<get_col>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x50,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_col>:
mov    %edi,%eax
shr    $0x1f,%eax
add    %edi,%eax
sar    %eax
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x25,%rcx
add    %edx,%ecx
shl    $0x4,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @get_col(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, 2
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = srem i32 %5, 80
ret i32 %6
}

LLVM IR (-O2):
define i32 @get_col(i32 %0) {
%2 = sdiv i32 %0, 2
%3 = srem i32 %2, 80
ret i32 %3
}
void isr_nmi(void) {
  while (1) {
    asm("nop");
  }
}


x86 assembly (clang, -O0):
<isr_nmi>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <isr_nmi+0x9>
nop
jmp    1109 <isr_nmi+0x9>

x86 assembly (clang, -O2):
<isr_nmi>:
nop
jmp    1100 <isr_nmi>

LLVM IR (-O0):
define void @isr_nmi() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @isr_nmi() {
br label %1
1: ; preds = %0, %1
tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"()
br label %1
}
void ff_hevc_put_hevc_qpel_h16_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_qpel_h16_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_qpel_h16_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_qpel_h16_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_qpel_h16_12_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, size_t, size_t, size_t,
                           char *);
int /*<<< orphan*/ stderr;
void fatal(char *msg, size_t lineno, size_t offsetno, size_t src_lineno) {
  fprintf(stderr, "ERROR: line: %zu: offset: %zu: source: %zu: %s\n", lineno,
          offsetno, src_lineno, msg);
  exit(1);
}


x86 assembly (clang, -O0):
<fatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    0x2ea1(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
mov    -0x8(%rbp),%r9
lea    0xea8(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<fatal>:
push   %rax
mov    %rcx,%r8
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %rdi,%r9
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
lea    0xec3(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [48 x i8] c"ERROR: line: %zu: offset: %zu: source: %zu: %s\0A\00"
define void @fatal(i8* %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i32, i32* @stderr
%10 = load i64, i64* %6
%11 = load i64, i64* %7
%12 = load i64, i64* %8
%13 = load i8*, i8** %5
%14 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), i64 %10, i64 %11, i64 %12, i8* %13)
%15 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [48 x i8] c"ERROR: line: %zu: offset: %zu: source: %zu: %s\0A\00"
define void @fatal(i8* %0, i64 %1, i64 %2, i64 %3) {
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), i64 %1, i64 %2, i64 %3, i8* %0)
%7 = tail call i32 @exit(i32 1)
unreachable
}
int IROUND(float f) { return (int)((f >= 0.0F) ? (f + 0.5F) : (f - 0.5F)); }


x86 assembly (clang, -O0):
<IROUND>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     1131 <IROUND+0x31>
movss  0xede(%rip),%xmm0
addss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
jmp    1147 <IROUND+0x47>
movss  -0x4(%rbp),%xmm0
movss  0xec2(%rip),%xmm1
subss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
cvttss2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IROUND>:
xorps  %xmm1,%xmm1
xor    %eax,%eax
ucomiss %xmm1,%xmm0
setae  %al
lea    0xeee(%rip),%rcx
addss  (%rcx,%rax,4),%xmm0
cvttss2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @IROUND(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp oge float %3, 0.000000e+00
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load float, float* %2
%7 = fadd float %6, 5.000000e-01
br label %11
8: ; preds = %1
%9 = load float, float* %2
%10 = fsub float %9, 5.000000e-01
br label %11
11: ; preds = %8, %5
%12 = phi float [ %7, %5 ], [ %10, %8 ]
%13 = fptosi float %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @IROUND(float %0) {
%2 = fcmp oge float %0, 0.000000e+00
%3 = select i1 %2, float 5.000000e-01, float -5.000000e-01
%4 = fadd float %3, %0
%5 = fptosi float %4 to i32
ret i32 %5
}
int get_int_arg(void **params) {
  int ret = **((int **)params);
  *params += sizeof(int);
  return ret;
}


x86 assembly (clang, -O0):
<get_int_arg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x4,%rcx
mov    %rcx,(%rax)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_int_arg>:
mov    (%rdi),%rcx
mov    (%rcx),%eax
add    $0x4,%rcx
mov    %rcx,(%rdi)
ret

LLVM IR (-O0):
define i32 @get_int_arg(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = bitcast i8** %4 to i32**
%6 = load i32*, i32** %5
%7 = load i32, i32* %6
store i32 %7, i32* %3
%8 = load i8**, i8*** %2
%9 = load i8*, i8** %8
%10 = getelementptr i8, i8* %9, i64 4
store i8* %10, i8** %8
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @get_int_arg(i8** nocapture %0) {
%2 = bitcast i8** %0 to i32**
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = getelementptr i32, i32* %3, i64 1
store i32* %5, i32** %2
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ hz_check_alloc(void *);
int /*<<< orphan*/ hz_check_size(size_t, size_t);
void *malloc(size_t);
void *hz_malloc(size_t num, size_t size) {
  hz_check_size(num, size);
  if (num == 0) {
    return NULL;
  }
  void *ptr = malloc(num * size);
  hz_check_alloc(ptr);
  return ptr;
}


x86 assembly (clang, -O0):
<hz_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <hz_check_size@plt>
cmpq   $0x0,-0x10(%rbp)
jne    1165 <hz_malloc+0x35>
movq   $0x0,-0x8(%rbp)
jmp    1188 <hz_malloc+0x58>
mov    -0x10(%rbp),%rdi
imul   -0x18(%rbp),%rdi
call   1050 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
call   1040 <hz_check_alloc@plt>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hz_malloc>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <hz_check_size@plt>
test   %rbx,%rbx
je     115d <hz_malloc+0x2d>
imul   %rbx,%r14
mov    %r14,%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <hz_check_alloc@plt>
jmp    115f <hz_malloc+0x2f>
xor    %ebx,%ebx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @hz_malloc(i64 %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
%6 = alloca i8*
store i64 %0, i64* %4
store i64 %1, i64* %5
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = call i32 @hz_check_size(i64 %7, i64 %8)
%10 = load i64, i64* %4
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %2
store i8* null, i8** %3
br label %21
13: ; preds = %2
%14 = load i64, i64* %4
%15 = load i64, i64* %5
%16 = mul i64 %14, %15
%17 = call i8* @malloc(i64 %16)
store i8* %17, i8** %6
%18 = load i8*, i8** %6
%19 = call i32 @hz_check_alloc(i8* %18)
%20 = load i8*, i8** %6
store i8* %20, i8** %3
br label %21
21: ; preds = %13, %12
%22 = load i8*, i8** %3
ret i8* %22
}

LLVM IR (-O2):
define i8* @hz_malloc(i64 %0, i64 %1) {
%3 = tail call i32 @hz_check_size(i64 %0, i64 %1)
%4 = icmp eq i64 %0, 0
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = mul i64 %1, %0
%7 = tail call i8* @malloc(i64 %6)
%8 = tail call i32 @hz_check_alloc(i8* %7)
br label %9
9: ; preds = %2, %5
%10 = phi i8* [ %7, %5 ], [ null, %2 ]
ret i8* %10
}
int Int2Mime(long Value) {
  Value &= 0x1F;
  if ((Value >= 0) && (Value <= 9))
    return Value + '0';
  else if ((Value >= 10) && (Value <= 35))
    return Value + 'a' - 10;
  else if ((Value >= 36) && (Value <= 62))
    return Value + 'A' - 36;
  else
    return '(';
}


x86 assembly (clang, -O0):
<Int2Mime>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x1f,%rax
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jl     113a <Int2Mime+0x3a>
cmpq   $0x9,-0x10(%rbp)
jg     113a <Int2Mime+0x3a>
mov    -0x10(%rbp),%rax
add    $0x30,%rax
mov    %eax,-0x4(%rbp)
jmp    1195 <Int2Mime+0x95>
cmpq   $0xa,-0x10(%rbp)
jl     1164 <Int2Mime+0x64>
cmpq   $0x23,-0x10(%rbp)
jg     1164 <Int2Mime+0x64>
mov    -0x10(%rbp),%rax
add    $0x61,%rax
sub    $0xa,%rax
mov    %eax,-0x4(%rbp)
jmp    1195 <Int2Mime+0x95>
cmpq   $0x24,-0x10(%rbp)
jl     118e <Int2Mime+0x8e>
cmpq   $0x3e,-0x10(%rbp)
jg     118e <Int2Mime+0x8e>
mov    -0x10(%rbp),%rax
add    $0x41,%rax
sub    $0x24,%rax
mov    %eax,-0x4(%rbp)
jmp    1195 <Int2Mime+0x95>
movl   $0x28,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Int2Mime>:
and    $0x1f,%edi
lea    0x57(%rdi),%ecx
lea    0x30(%rdi),%eax
cmp    $0xa,%rdi
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define i32 @Int2Mime(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = and i64 %4, 31
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = icmp sge i64 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %1
%9 = load i64, i64* %3
%10 = icmp sle i64 %9, 9
br i1 %10, label %11, label %15
11: ; preds = %8
%12 = load i64, i64* %3
%13 = add nsw i64 %12, 48
%14 = trunc i64 %13 to i32
store i32 %14, i32* %2
br label %38
15: ; preds = %8, %1
%16 = load i64, i64* %3
%17 = icmp sge i64 %16, 10
br i1 %17, label %18, label %26
18: ; preds = %15
%19 = load i64, i64* %3
%20 = icmp sle i64 %19, 35
br i1 %20, label %21, label %26
21: ; preds = %18
%22 = load i64, i64* %3
%23 = add nsw i64 %22, 97
%24 = sub nsw i64 %23, 10
%25 = trunc i64 %24 to i32
store i32 %25, i32* %2
br label %38
26: ; preds = %18, %15
%27 = load i64, i64* %3
%28 = icmp sge i64 %27, 36
br i1 %28, label %29, label %37
29: ; preds = %26
%30 = load i64, i64* %3
%31 = icmp sle i64 %30, 62
br i1 %31, label %32, label %37
32: ; preds = %29
%33 = load i64, i64* %3
%34 = add nsw i64 %33, 65
%35 = sub nsw i64 %34, 36
%36 = trunc i64 %35 to i32
store i32 %36, i32* %2
br label %38
37: ; preds = %29, %26
store i32 40, i32* %2
br label %38
38: ; preds = %37, %32, %21, %11
%39 = load i32, i32* %2
ret i32 %39
}

LLVM IR (-O2):
define i32 @Int2Mime(i64 %0) {
%2 = and i64 %0, 31
%3 = icmp ult i64 %2, 10
%4 = trunc i64 %2 to i32
%5 = select i1 %3, i32 48, i32 87
%6 = add nuw nsw i32 %5, %4
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ VIM_HIF_SetReg16(int, unsigned short);
void VIM_IPP_SetWindowPos(unsigned short wStart_X, unsigned short wStart_Y) {
  VIM_HIF_SetReg16((0x1c00 + 0x00A), wStart_X);
  VIM_HIF_SetReg16((0x1c00 + 0x00C), wStart_Y);
}


x86 assembly (clang, -O0):
<VIM_IPP_SetWindowPos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
mov    $0x1c0a,%edi
movzwl -0x2(%rbp),%esi
call   1030 <VIM_HIF_SetReg16@plt>
mov    $0x1c0c,%edi
movzwl -0x4(%rbp),%esi
call   1030 <VIM_HIF_SetReg16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VIM_IPP_SetWindowPos>:
push   %rbx
mov    %esi,%ebx
mov    %edi,%esi
mov    $0x1c0a,%edi
call   1030 <VIM_HIF_SetReg16@plt>
mov    $0x1c0c,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <VIM_HIF_SetReg16@plt>

LLVM IR (-O0):
define void @VIM_IPP_SetWindowPos(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = call i32 @VIM_HIF_SetReg16(i32 7178, i16 zeroext %5)
%7 = load i16, i16* %4
%8 = call i32 @VIM_HIF_SetReg16(i32 7180, i16 zeroext %7)
ret void
}

LLVM IR (-O2):
define void @VIM_IPP_SetWindowPos(i16 zeroext %0, i16 zeroext %1) {
%3 = tail call i32 @VIM_HIF_SetReg16(i32 7178, i16 zeroext %0)
%4 = tail call i32 @VIM_HIF_SetReg16(i32 7180, i16 zeroext %1)
ret void
}
/* Variables and functions */
unsigned short int px_get_short_le(const char *cp) {
  unsigned short int ret;
  unsigned char *source = (unsigned char *)cp;
  if (NULL == cp)
    return 0;
  ret = *source++;
  ret += ((*source++) << 8);
  return ret;
}


x86 assembly (clang, -O0):
<px_get_short_le>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
xor    %eax,%eax
cmp    -0x10(%rbp),%rax
jne    1127 <px_get_short_le+0x27>
movw   $0x0,-0x2(%rbp)
jmp    1164 <px_get_short_le+0x64>
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x20(%rbp)
movzbl (%rax),%eax
mov    %ax,-0x12(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x20(%rbp)
movzbl (%rax),%ecx
shl    $0x8,%ecx
movzwl -0x12(%rbp),%eax
add    %ecx,%eax
mov    %ax,-0x12(%rbp)
mov    -0x12(%rbp),%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<px_get_short_le>:
test   %rdi,%rdi
je     1109 <px_get_short_le+0x9>
movzwl (%rdi),%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i16 @px_get_short_le(i8* %0) {
%2 = alloca i16
%3 = alloca i8*
%4 = alloca i16
%5 = alloca i8*
store i8* %0, i8** %3
%6 = load i8*, i8** %3
store i8* %6, i8** %5
%7 = load i8*, i8** %3
%8 = icmp eq i8* null, %7
br i1 %8, label %9, label %10
9: ; preds = %1
store i16 0, i16* %2
br label %25
10: ; preds = %1
%11 = load i8*, i8** %5
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %5
%13 = load i8, i8* %11
%14 = zext i8 %13 to i16
store i16 %14, i16* %4
%15 = load i8*, i8** %5
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %5
%17 = load i8, i8* %15
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i16, i16* %4
%21 = zext i16 %20 to i32
%22 = add nsw i32 %21, %19
%23 = trunc i32 %22 to i16
store i16 %23, i16* %4
%24 = load i16, i16* %4
store i16 %24, i16* %2
br label %25
25: ; preds = %10, %9
%26 = load i16, i16* %2
ret i16 %26
}

LLVM IR (-O2):
define zeroext i16 @px_get_short_le(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %11, label %3
3: ; preds = %1
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %0
%6 = load i8, i8* %4
%7 = zext i8 %6 to i16
%8 = shl nuw i16 %7, 8
%9 = zext i8 %5 to i16
%10 = or i16 %8, %9
br label %11
11: ; preds = %1, %3
%12 = phi i16 [ %10, %3 ], [ 0, %1 ]
ret i16 %12
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void ft_memdel(void **ap) {
  free(*ap);
  *ap = 0;
}


x86 assembly (clang, -O0):
<ft_memdel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_memdel>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <free@plt>
movq   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @ft_memdel(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
%5 = call i32 @free(i8* %4)
%6 = load i8**, i8*** %2
store i8* null, i8** %6
ret void
}

LLVM IR (-O2):
define void @ft_memdel(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = tail call i32 @free(i8* %2)
store i8* null, i8** %0
ret void
}
/* Variables and functions */
bool cc3_button_get_and_reset_trigger(void) { return 1; }


x86 assembly (clang, -O0):
<cc3_button_get_and_reset_trigger>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cc3_button_get_and_reset_trigger>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @cc3_button_get_and_reset_trigger() {
ret i32 1
}

LLVM IR (-O2):
define i32 @cc3_button_get_and_reset_trigger() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar_fd(char, int);
int /*<<< orphan*/ ft_putstr_fd(char const *, int);
void ft_putendl_fd(char const *s, int fd) {
  ft_putstr_fd(s, fd);
  ft_putchar_fd('\n', fd);
}


x86 assembly (clang, -O0):
<ft_putendl_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <ft_putstr_fd@plt>
mov    -0xc(%rbp),%esi
mov    $0xa,%edi
call   1040 <ft_putchar_fd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putendl_fd>:
push   %rbx
mov    %esi,%ebx
call   1030 <ft_putstr_fd@plt>
mov    $0xa,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1040 <ft_putchar_fd@plt>

LLVM IR (-O0):
define void @ft_putendl_fd(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @ft_putstr_fd(i8* %5, i32 %6)
%8 = load i32, i32* %4
%9 = call i32 @ft_putchar_fd(i8 signext 10, i32 %8)
ret void
}

LLVM IR (-O2):
define void @ft_putendl_fd(i8* %0, i32 %1) {
%3 = tail call i32 @ft_putstr_fd(i8* %0, i32 %1)
%4 = tail call i32 @ft_putchar_fd(i8 signext 10, i32 %1)
ret void
}
/* Variables and functions */
long long __builtin_wasm_trunc_saturate_s_i64_f64(double);
long long trunc_saturate_s_i64_f64(double f) {
  return __builtin_wasm_trunc_saturate_s_i64_f64(f);
}


x86 assembly (clang, -O0):
<trunc_saturate_s_i64_f64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__builtin_wasm_trunc_saturate_s_i64_f64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trunc_saturate_s_i64_f64>:
jmp    1030 <__builtin_wasm_trunc_saturate_s_i64_f64@plt>

LLVM IR (-O0):
define i64 @trunc_saturate_s_i64_f64(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i64 @__builtin_wasm_trunc_saturate_s_i64_f64(double %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @trunc_saturate_s_i64_f64(double %0) {
%2 = tail call i64 @__builtin_wasm_trunc_saturate_s_i64_f64(double %0)
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ func1();
int main(int argc, char *argv[]) {
  int i = 0;
  for (i = 0; i < 5; i++) {
    func1();
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x5,-0x14(%rbp)
jge    1153 <main+0x43>
mov    $0x0,%al
call   1030 <func1@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1134 <main+0x24>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <func1@plt>
xor    %eax,%eax
call   1030 <func1@plt>
xor    %eax,%eax
call   1030 <func1@plt>
xor    %eax,%eax
call   1030 <func1@plt>
xor    %eax,%eax
call   1030 <func1@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
store i32 0, i32* %6
br label %7
7: ; preds = %12, %2
%8 = load i32, i32* %6
%9 = icmp slt i32 %8, 5
br i1 %9, label %10, label %15
10: ; preds = %7
%11 = call i32 (...) @func1()
br label %12
12: ; preds = %10
%13 = load i32, i32* %6
%14 = add nsw i32 %13, 1
store i32 %14, i32* %6
br label %7
15: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @func1()
%4 = tail call i32 (...) @func1()
%5 = tail call i32 (...) @func1()
%6 = tail call i32 (...) @func1()
%7 = tail call i32 (...) @func1()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void usage(const char *prog) {
  fprintf(stderr,
          "Usage: %s [options] [input]\n"
          "Options:\n"
          "  -o file -- output to file (default is standard output)\n"
          "  -h      -- print this message\n",
          prog);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [127 x i8] c"Usage: %s [options] [input]\0AOptions:\0A -o file -- output to file (default is standard output)\0A -h -- print this message\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([127 x i8], [127 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [127 x i8] c"Usage: %s [options] [input]\0AOptions:\0A -o file -- output to file (default is standard output)\0A -h -- print this message\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([127 x i8], [127 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
int johab_from_3(int cho, int jung, int jong) {
  return 0x8000 | (cho << 10) | (jung << 5) | jong;
}


x86 assembly (clang, -O0):
<johab_from_3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
shl    $0xa,%eax
or     $0x8000,%eax
mov    -0x8(%rbp),%ecx
shl    $0x5,%ecx
or     %ecx,%eax
or     -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<johab_from_3>:
mov    %esi,%eax
shl    $0xa,%edi
shl    $0x5,%eax
or     %edi,%eax
or     %edx,%eax
or     $0x8000,%eax
ret

LLVM IR (-O0):
define i32 @johab_from_3(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = shl i32 %7, 10
%9 = or i32 32768, %8
%10 = load i32, i32* %5
%11 = shl i32 %10, 5
%12 = or i32 %9, %11
%13 = load i32, i32* %6
%14 = or i32 %12, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @johab_from_3(i32 %0, i32 %1, i32 %2) {
%4 = shl i32 %0, 10
%5 = shl i32 %1, 5
%6 = or i32 %4, %5
%7 = or i32 %6, %2
%8 = or i32 %7, 32768
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ roadmap_trip_remove_point(char *);
void on_show_routes_dlg_closed(int exit_code, void *context) {
  roadmap_trip_remove_point("Destination");
  roadmap_trip_remove_point("Departure");
}


x86 assembly (clang, -O0):
<on_show_routes_dlg_closed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <roadmap_trip_remove_point@plt>
lea    0xeda(%rip),%rdi
call   1030 <roadmap_trip_remove_point@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<on_show_routes_dlg_closed>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <roadmap_trip_remove_point@plt>
lea    0xee8(%rip),%rdi
pop    %rax
jmp    1030 <roadmap_trip_remove_point@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"Destination\00"
@.str.1 = [10 x i8] c"Departure\00"
define void @on_show_routes_dlg_closed(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = call i32 @roadmap_trip_remove_point(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @roadmap_trip_remove_point(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"Destination\00"
@.str.1 = [10 x i8] c"Departure\00"
define void @on_show_routes_dlg_closed(i32 %0, i8* nocapture readnone %1) {
%3 = tail call i32 @roadmap_trip_remove_point(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @roadmap_trip_remove_point(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
void AESDMAEnable(uint32_t ui32Base, uint32_t ui32Flags) {
  ;

  ;
  (*((volatile unsigned long *)(ui32Base + 0x00000084))) |= ui32Flags;
}


x86 assembly (clang, -O0):
<AESDMAEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x84(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x84(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<AESDMAEnable>:
mov    %rdi,-0x8(%rsp)
mov    %rsi,-0x10(%rsp)
mov    -0x10(%rsp),%rax
mov    -0x8(%rsp),%rcx
or     %rax,0x84(%rcx)
ret

LLVM IR (-O0):
define void @AESDMAEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = load volatile i64, i64* %3
%7 = add i64 %6, 132
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = or i64 %9, %5
store volatile i64 %10, i64* %8
ret void
}

LLVM IR (-O2):
define void @AESDMAEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = load volatile i64, i64* %3
%7 = add i64 %6, 132
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = or i64 %9, %5
store volatile i64 %10, i64* %8
ret void
}
/* Type definitions */
struct darr {
  int dummy;
};

/* Variables and functions */
void *darr_element(struct darr *, int /*<<< orphan*/);
void *darr_first(struct darr *d) { return darr_element(d, 0); }


x86 assembly (clang, -O0):
<darr_first>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <darr_element@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<darr_first>:
xor    %esi,%esi
jmp    1030 <darr_element@plt>

LLVM IR (-O0):
%struct.darr = type { i32 }
define i8* @darr_first(%struct.darr* %0) {
%2 = alloca %struct.darr*
store %struct.darr* %0, %struct.darr** %2
%3 = load %struct.darr*, %struct.darr** %2
%4 = call i8* @darr_element(%struct.darr* %3, i32 0)
ret i8* %4
}

LLVM IR (-O2):
%struct.darr = type { i32 }
define i8* @darr_first(%struct.darr* %0) {
%2 = tail call i8* @darr_element(%struct.darr* %0, i32 0)
ret i8* %2
}