#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ mips_ejtag_pracc(int);
void mips_ejtag_setcp0reg(int cp0_regnum, int val) {
  if (cp0_regnum < 0 || (cp0_regnum >= 25 && cp0_regnum <= 30) ||
      cp0_regnum > 31)
    return;
  mips_ejtag_pracc(((0x408 << 20) | ((2) << 16) | ((31) << 11)));
  mips_ejtag_pracc(0x00000000);
  mips_ejtag_pracc(((0x0F << 26) | ((2) << 16) | ((val >> 16) & 0xFFFF)));
  mips_ejtag_pracc(((0x0D << 26) | ((2) << 21) | ((2) << 16) | (val & 0xFFFF)));
  mips_ejtag_pracc(((0x408 << 20) | ((2) << 16) | ((cp0_regnum) << 11)));
  mips_ejtag_pracc(0x00000000);
  mips_ejtag_pracc(((0x400 << 20) | ((2) << 16) | ((31) << 11)));
  mips_ejtag_pracc(0x00000000);
}


x86 assembly (clang, -O0):
<mips_ejtag_setcp0reg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     1146 <mips_ejtag_setcp0reg+0x36>
cmpl   $0x19,-0x4(%rbp)
jl     113c <mips_ejtag_setcp0reg+0x2c>
cmpl   $0x1e,-0x4(%rbp)
jle    1146 <mips_ejtag_setcp0reg+0x36>
cmpl   $0x1f,-0x4(%rbp)
jle    114b <mips_ejtag_setcp0reg+0x3b>
jmp    11b0 <mips_ejtag_setcp0reg+0xa0>
mov    $0x4082f800,%edi
call   1030 <mips_ejtag_pracc@plt>
xor    %edi,%edi
call   1030 <mips_ejtag_pracc@plt>
mov    -0x8(%rbp),%edi
sar    $0x10,%edi
and    $0xffff,%edi
or     $0x3c020000,%edi
call   1030 <mips_ejtag_pracc@plt>
mov    -0x8(%rbp),%edi
and    $0xffff,%edi
or     $0x34420000,%edi
call   1030 <mips_ejtag_pracc@plt>
mov    -0x4(%rbp),%edi
shl    $0xb,%edi
or     $0x40820000,%edi
call   1030 <mips_ejtag_pracc@plt>
xor    %edi,%edi
call   1030 <mips_ejtag_pracc@plt>
mov    $0x4002f800,%edi
call   1030 <mips_ejtag_pracc@plt>
xor    %edi,%edi
call   1030 <mips_ejtag_pracc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mips_ejtag_setcp0reg>:
push   %rbp
push   %rbx
push   %rax
test   %edi,%edi
js     1185 <mips_ejtag_setcp0reg+0x75>
mov    %edi,%ebx
cmp    $0x1f,%edi
ja     1185 <mips_ejtag_setcp0reg+0x75>
lea    -0x19(%rbx),%eax
cmp    $0x6,%eax
jb     1185 <mips_ejtag_setcp0reg+0x75>
mov    %esi,%ebp
mov    $0x4082f800,%edi
call   1030 <mips_ejtag_pracc@plt>
xor    %edi,%edi
call   1030 <mips_ejtag_pracc@plt>
mov    %ebp,%edi
shr    $0x10,%edi
or     $0x3c020000,%edi
call   1030 <mips_ejtag_pracc@plt>
movzwl %bp,%edi
or     $0x34420000,%edi
call   1030 <mips_ejtag_pracc@plt>
shl    $0xb,%ebx
or     $0x40820000,%ebx
mov    %ebx,%edi
call   1030 <mips_ejtag_pracc@plt>
xor    %edi,%edi
call   1030 <mips_ejtag_pracc@plt>
mov    $0x4002f800,%edi
call   1030 <mips_ejtag_pracc@plt>
xor    %edi,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <mips_ejtag_pracc@plt>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @mips_ejtag_setcp0reg(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 0
br i1 %6, label %16, label %7
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp sge i32 %8, 25
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = load i32, i32* %3
%12 = icmp sle i32 %11, 30
br i1 %12, label %16, label %13
13: ; preds = %10, %7
%14 = load i32, i32* %3
%15 = icmp sgt i32 %14, 31
br i1 %15, label %16, label %17
16: ; preds = %13, %10, %2
br label %36
17: ; preds = %13
%18 = call i32 @mips_ejtag_pracc(i32 1082324992)
%19 = call i32 @mips_ejtag_pracc(i32 0)
%20 = load i32, i32* %4
%21 = ashr i32 %20, 16
%22 = and i32 %21, 65535
%23 = or i32 1006764032, %22
%24 = call i32 @mips_ejtag_pracc(i32 %23)
%25 = load i32, i32* %4
%26 = and i32 %25, 65535
%27 = or i32 876740608, %26
%28 = call i32 @mips_ejtag_pracc(i32 %27)
%29 = load i32, i32* %3
%30 = shl i32 %29, 11
%31 = or i32 1082261504, %30
%32 = call i32 @mips_ejtag_pracc(i32 %31)
%33 = call i32 @mips_ejtag_pracc(i32 0)
%34 = call i32 @mips_ejtag_pracc(i32 1073936384)
%35 = call i32 @mips_ejtag_pracc(i32 0)
br label %36
36: ; preds = %17, %16
ret void
}

LLVM IR (-O2):
define void @mips_ejtag_setcp0reg(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, 0
br i1 %3, label %24, label %4
4: ; preds = %2
%5 = add nsw i32 %0, -25
%6 = icmp ult i32 %5, 6
%7 = icmp ugt i32 %0, 31
%8 = or i1 %7, %6
br i1 %8, label %24, label %9
9: ; preds = %4
%10 = tail call i32 @mips_ejtag_pracc(i32 1082324992)
%11 = tail call i32 @mips_ejtag_pracc(i32 0)
%12 = lshr i32 %1, 16
%13 = or i32 %12, 1006764032
%14 = tail call i32 @mips_ejtag_pracc(i32 %13)
%15 = and i32 %1, 65535
%16 = or i32 %15, 876740608
%17 = tail call i32 @mips_ejtag_pracc(i32 %16)
%18 = shl nuw nsw i32 %0, 11
%19 = or i32 %18, 1082261504
%20 = tail call i32 @mips_ejtag_pracc(i32 %19)
%21 = tail call i32 @mips_ejtag_pracc(i32 0)
%22 = tail call i32 @mips_ejtag_pracc(i32 1073936384)
%23 = tail call i32 @mips_ejtag_pracc(i32 0)
br label %24
24: ; preds = %2, %4, %9
ret void
}