#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void AESIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags) {
  ASSERT(ui32Base == 0x44036000);
  ASSERT((ui32IntFlags == 0x00000001) || (ui32IntFlags == 0x00000008) ||
         (ui32IntFlags == 0x00000002) || (ui32IntFlags == 0x00000004) ||
         (ui32IntFlags == 0x00010000) || (ui32IntFlags == 0x00080000) ||
         (ui32IntFlags == 0x00020000) || (ui32IntFlags == 0x00040000));
  (*((volatile uint32_t *)(ui32Base + 0xFFFFA020))) &=
      ~(((ui32IntFlags & 0x00010000) >> 16) |
        ((ui32IntFlags & 0x00060000) >> 15) |
        ((ui32IntFlags & 0x00080000) >> 18));
  (*((volatile uint32_t *)(ui32Base + 0x00000090))) &=
      ~(ui32IntFlags & 0x0000ffff);
}


x86 assembly (clang, -O0):
<AESIntDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x44036000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    $0x1,%al
cmpl   $0x1,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     11b1 <AESIntDisable+0xa1>
mov    $0x1,%al
cmpl   $0x8,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     11b1 <AESIntDisable+0xa1>
mov    $0x1,%al
cmpl   $0x2,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     11b1 <AESIntDisable+0xa1>
mov    $0x1,%al
cmpl   $0x4,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     11b1 <AESIntDisable+0xa1>
mov    $0x1,%al
cmpl   $0x10000,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     11b1 <AESIntDisable+0xa1>
mov    $0x1,%al
cmpl   $0x80000,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     11b1 <AESIntDisable+0xa1>
mov    $0x1,%al
cmpl   $0x20000,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     11b1 <AESIntDisable+0xa1>
cmpl   $0x40000,-0x8(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%edx
and    $0x10000,%edx
sar    $0x10,%edx
mov    -0x8(%rbp),%eax
and    $0x60000,%eax
sar    $0xf,%eax
or     %eax,%edx
mov    -0x8(%rbp),%eax
and    $0x80000,%eax
sar    $0x12,%eax
or     %eax,%edx
xor    $0xffffffff,%edx
mov    -0x4(%rbp),%eax
add    $0xffffa020,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    %edx,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%edx
and    $0xffff,%edx
xor    $0xffffffff,%edx
mov    -0x4(%rbp),%eax
add    $0x90,%eax
cltq
mov    (%rax),%ecx
and    %edx,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AESIntDisable>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %edi,%ebx
xor    %edi,%edi
cmp    $0x44036000,%ebx
sete   %dil
call   1030 <ASSERT@plt>
mov    $0x1,%edi
cmp    $0xffff,%ebp
jg     1146 <AESIntDisable+0x36>
cmp    $0x8,%ebp
ja     115e <AESIntDisable+0x4e>
mov    $0x116,%eax
bt     %ebp,%eax
jb     116a <AESIntDisable+0x5a>
jmp    115e <AESIntDisable+0x4e>
cmp    $0x10000,%ebp
je     116a <AESIntDisable+0x5a>
cmp    $0x20000,%ebp
je     116a <AESIntDisable+0x5a>
cmp    $0x80000,%ebp
je     116a <AESIntDisable+0x5a>
xor    %edi,%edi
cmp    $0x40000,%ebp
sete   %dil
call   1030 <ASSERT@plt>
mov    %ebp,%eax
not    %eax
mov    %ebp,%ecx
shr    $0x10,%ecx
and    $0x1,%ecx
mov    %ebp,%edx
shr    $0xf,%edx
and    $0xc,%edx
or     %ecx,%edx
shr    $0x12,%ebp
and    $0x2,%ebp
or     %edx,%ebp
not    %ebp
lea    -0x5fe0(%rbx),%ecx
and    %ebp,(%rcx)
or     $0xffff0000,%eax
movslq %ebx,%rcx
and    %eax,0x90(%rcx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @AESIntDisable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1141071872
%7 = zext i1 %6 to i32
%8 = call i32 @ASSERT(i32 %7)
%9 = load i32, i32* %4
%10 = icmp eq i32 %9, 1
br i1 %10, label %32, label %11
11: ; preds = %2
%12 = load i32, i32* %4
%13 = icmp eq i32 %12, 8
br i1 %13, label %32, label %14
14: ; preds = %11
%15 = load i32, i32* %4
%16 = icmp eq i32 %15, 2
br i1 %16, label %32, label %17
17: ; preds = %14
%18 = load i32, i32* %4
%19 = icmp eq i32 %18, 4
br i1 %19, label %32, label %20
20: ; preds = %17
%21 = load i32, i32* %4
%22 = icmp eq i32 %21, 65536
br i1 %22, label %32, label %23
23: ; preds = %20
%24 = load i32, i32* %4
%25 = icmp eq i32 %24, 524288
br i1 %25, label %32, label %26
26: ; preds = %23
%27 = load i32, i32* %4
%28 = icmp eq i32 %27, 131072
br i1 %28, label %32, label %29
29: ; preds = %26
%30 = load i32, i32* %4
%31 = icmp eq i32 %30, 262144
br label %32
32: ; preds = %29, %26, %23, %20, %17, %14, %11, %2
%33 = phi i1 [ true, %26 ], [ true, %23 ], [ true, %20 ], [ true, %17 ], [ true, %14 ], [ true, %11 ], [ true, %2 ], [ %31, %29 ]
%34 = zext i1 %33 to i32
%35 = call i32 @ASSERT(i32 %34)
%36 = load i32, i32* %4
%37 = and i32 %36, 65536
%38 = ashr i32 %37, 16
%39 = load i32, i32* %4
%40 = and i32 %39, 393216
%41 = ashr i32 %40, 15
%42 = or i32 %38, %41
%43 = load i32, i32* %4
%44 = and i32 %43, 524288
%45 = ashr i32 %44, 18
%46 = or i32 %42, %45
%47 = xor i32 %46, -1
%48 = load i32, i32* %3
%49 = add i32 %48, -24544
%50 = zext i32 %49 to i64
%51 = inttoptr i64 %50 to i32*
%52 = load volatile i32, i32* %51
%53 = and i32 %52, %47
store volatile i32 %53, i32* %51
%54 = load i32, i32* %4
%55 = and i32 %54, 65535
%56 = xor i32 %55, -1
%57 = load i32, i32* %3
%58 = add nsw i32 %57, 144
%59 = sext i32 %58 to i64
%60 = inttoptr i64 %59 to i32*
%61 = load volatile i32, i32* %60
%62 = and i32 %61, %56
store volatile i32 %62, i32* %60
ret void
}

LLVM IR (-O2):
define void @AESIntDisable(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 1141071872
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
switch i32 %1, label %6 [
i32 524288, label %9
i32 131072, label %9
i32 65536, label %9
i32 8, label %9
i32 4, label %9
i32 2, label %9
i32 1, label %9
]
6: ; preds = %2
%7 = icmp eq i32 %1, 262144
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %2, %2, %2, %2, %2, %2, %2, %6
%10 = phi i32 [ 1, %2 ], [ %8, %6 ], [ 1, %2 ], [ 1, %2 ], [ 1, %2 ], [ 1, %2 ], [ 1, %2 ], [ 1, %2 ]
%11 = tail call i32 @ASSERT(i32 %10)
%12 = lshr i32 %1, 16
%13 = and i32 %12, 1
%14 = lshr i32 %1, 15
%15 = and i32 %14, 12
%16 = or i32 %13, %15
%17 = lshr i32 %1, 18
%18 = and i32 %17, 2
%19 = or i32 %16, %18
%20 = xor i32 %19, -1
%21 = add i32 %0, -24544
%22 = zext i32 %21 to i64
%23 = inttoptr i64 %22 to i32*
%24 = load volatile i32, i32* %23
%25 = and i32 %24, %20
store volatile i32 %25, i32* %23
%26 = and i32 %1, 65535
%27 = xor i32 %26, -1
%28 = add nsw i32 %0, 144
%29 = sext i32 %28 to i64
%30 = inttoptr i64 %29 to i32*
%31 = load volatile i32, i32* %30
%32 = and i32 %31, %27
store volatile i32 %32, i32* %30
ret void
}