xunge/DecIR huggingface dataset:
void mvVecSub2(float *r, const float *a, const float *b) {
  r[0] = a[0] + b[0];
  r[1] = a[1] + b[1];
}


x86 assembly (clang, -O0):
<mvVecSub2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x18(%rbp),%rax
addss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    -0x18(%rbp),%rax
addss  0x4(%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mvVecSub2>:
movss  (%rsi),%xmm0
addss  (%rdx),%xmm0
movss  %xmm0,(%rdi)
movss  0x4(%rsi),%xmm0
addss  0x4(%rdx),%xmm0
movss  %xmm0,0x4(%rdi)
ret

LLVM IR (-O0):
define void @mvVecSub2(float* %0, float* %1, float* %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float*
store float* %0, float** %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float*, float** %5
%8 = getelementptr inbounds float, float* %7, i64 0
%9 = load float, float* %8
%10 = load float*, float** %6
%11 = getelementptr inbounds float, float* %10, i64 0
%12 = load float, float* %11
%13 = fadd float %9, %12
%14 = load float*, float** %4
%15 = getelementptr inbounds float, float* %14, i64 0
store float %13, float* %15
%16 = load float*, float** %5
%17 = getelementptr inbounds float, float* %16, i64 1
%18 = load float, float* %17
%19 = load float*, float** %6
%20 = getelementptr inbounds float, float* %19, i64 1
%21 = load float, float* %20
%22 = fadd float %18, %21
%23 = load float*, float** %4
%24 = getelementptr inbounds float, float* %23, i64 1
store float %22, float* %24
ret void
}

LLVM IR (-O2):
define void @mvVecSub2(float* nocapture writeonly %0, float* nocapture %1, float* nocapture %2) {
%4 = load float, float* %1
%5 = load float, float* %2
%6 = fadd float %4, %5
store float %6, float* %0
%7 = getelementptr inbounds float, float* %1, i64 1
%8 = load float, float* %7
%9 = getelementptr inbounds float, float* %2, i64 1
%10 = load float, float* %9
%11 = fadd float %8, %10
%12 = getelementptr inbounds float, float* %0, i64 1
store float %11, float* %12
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_version(void) {
  printf("spi-hdlc-adapter "
         "0.07"
         " ("
         "20:37:31"
         " "
         "Mar 16 2022"
         ")\n");
  printf("Copyright (c) 2017 The OpenThread Authors, All Rights Reserved\n");
}


x86 assembly (clang, -O0):
<print_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf07(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_version>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf09(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [46 x i8] c"spi-hdlc-adapter 0.07 (20:37:31 Mar 16 2022)\0A\00"
@.str.1 = [64 x i8] c"Copyright (c) 2017 The OpenThread Authors, All Rights Reserved\0A\00"
define void @print_version() {
%1 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([64 x i8], [64 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [45 x i8] c"spi-hdlc-adapter 0.07 (20:37:31 Mar 16 2022)\00"
@str.2 = [63 x i8] c"Copyright (c) 2017 The OpenThread Authors, All Rights Reserved\00"
define void @print_version() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([45 x i8], [45 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([63 x i8], [63 x i8]* @str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ xlnkFlushCache(unsigned int, int);
void cma_flush_cache(void *buf, unsigned int phys_addr, int size) {
  xlnkFlushCache(phys_addr, size);
}


x86 assembly (clang, -O0):
<cma_flush_cache>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1030 <xlnkFlushCache@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cma_flush_cache>:
mov    %esi,%edi
mov    %edx,%esi
jmp    1030 <xlnkFlushCache@plt>

LLVM IR (-O0):
define void @cma_flush_cache(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = load i32, i32* %6
%9 = call i32 @xlnkFlushCache(i32 %7, i32 %8)
ret void
}

LLVM IR (-O2):
define void @cma_flush_cache(i8* nocapture readnone %0, i32 %1, i32 %2) {
%4 = tail call i32 @xlnkFlushCache(i32 %1, i32 %2)
ret void
}
unsigned int ar_mslot_get(int my_cid) {}


x86 assembly (clang, -O0):
<ar_mslot_get>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ar_mslot_get>:
ret

LLVM IR (-O0):
define i32 @ar_mslot_get(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @ar_mslot_get(i32 %0) {
ret i32 undef
}
void tau_neutrino(void) {}


x86 assembly (clang, -O0):
<tau_neutrino>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tau_neutrino>:
ret

LLVM IR (-O0):
define void @tau_neutrino() {
ret void
}

LLVM IR (-O2):
define void @tau_neutrino() {
ret void
}
void printsubseg(m, b, s) struct mesh *m;
struct behavior *b;
struct osub *s;
{
  printf("printsubseg is not supported");
}


x86 assembly (clang, -O0):
<printsubseg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    0xed5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printsubseg>:
lea    0xee9(%rip),%rdi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
%struct.mesh = type opaque
%struct.behavior = type opaque
%struct.osub = type opaque
@.str = [29 x i8] c"printsubseg is not supported\00"
define void @printsubseg(%struct.mesh* %0, %struct.behavior* %1, %struct.osub* %2) {
%4 = alloca %struct.mesh*
%5 = alloca %struct.behavior*
%6 = alloca %struct.osub*
store %struct.mesh* %0, %struct.mesh** %4
store %struct.behavior* %1, %struct.behavior** %5
store %struct.osub* %2, %struct.osub** %6
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.mesh = type opaque
%struct.behavior = type opaque
%struct.osub = type opaque
@.str = [29 x i8] c"printsubseg is not supported\00"
define void @printsubseg(%struct.mesh* nocapture readnone %0, %struct.behavior* nocapture readnone %1, %struct.osub* nocapture readnone %2) {
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
long long PAPI_get_real_usec();
void papif_get_real_usec_(long long *time) { *time = PAPI_get_real_usec(); }


x86 assembly (clang, -O0):
<papif_get_real_usec_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <PAPI_get_real_usec@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<papif_get_real_usec_>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <PAPI_get_real_usec@plt>
mov    %rax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @papif_get_real_usec_(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = call i64 (...) @PAPI_get_real_usec()
%4 = load i64*, i64** %2
store i64 %3, i64* %4
ret void
}

LLVM IR (-O2):
define void @papif_get_real_usec_(i64* nocapture writeonly %0) {
%2 = tail call i64 (...) @PAPI_get_real_usec()
store i64 %2, i64* %0
ret void
}
void setup_opendir(void) {}


x86 assembly (clang, -O0):
<setup_opendir>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup_opendir>:
ret

LLVM IR (-O0):
define void @setup_opendir() {
ret void
}

LLVM IR (-O2):
define void @setup_opendir() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
void write64le(uint64_t *p, const uint64_t w) { *p = w; }


x86 assembly (clang, -O0):
<write64le>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<write64le>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @write64le(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
store i32 %5, i32* %6
ret void
}

LLVM IR (-O2):
define void @write64le(i32* nocapture writeonly %0, i32 %1) {
store i32 %1, i32* %0
ret void
}
/* Variables and functions */
size_t hash(const char *word) {
  size_t x;
  for (x = 0; *word; ++word) {
    x = x * 5 ^ *word;
  }
  return x;
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1142 <hash+0x42>
imul   $0x5,-0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
movsbq (%rcx),%rcx
xor    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1110 <hash+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1127 <hash+0x27>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
lea    (%rax,%rax,4),%rdx
movsbq %cl,%rax
xor    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %15, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %18
8: ; preds = %4
%9 = load i64, i64* %3
%10 = mul i64 %9, 5
%11 = load i8*, i8** %2
%12 = load i8, i8* %11
%13 = sext i8 %12 to i64
%14 = xor i64 %10, %13
store i64 %14, i64* %3
br label %15
15: ; preds = %8
%16 = load i8*, i8** %2
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %2
br label %4
18: ; preds = %4
%19 = load i64, i64* %3
ret i64 %19
}

LLVM IR (-O2):
define i64 @hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i64 [ %10, %4 ], [ 0, %1 ]
%7 = phi i8* [ %11, %4 ], [ %0, %1 ]
%8 = mul i64 %6, 5
%9 = sext i8 %5 to i64
%10 = xor i64 %8, %9
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ 0, %1 ], [ %10, %4 ]
ret i64 %15
}
void av_opt_get_video_rate() {}


x86 assembly (clang, -O0):
<av_opt_get_video_rate>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_opt_get_video_rate>:
ret

LLVM IR (-O0):
define void @av_opt_get_video_rate() {
ret void
}

LLVM IR (-O2):
define void @av_opt_get_video_rate() {
ret void
}
const char *_cdio_bool_str(_Bool b) { return b ? "yes" : "no"; }


x86 assembly (clang, -O0):
<_cdio_bool_str>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
and    $0x1,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%dl
lea    0xeee(%rip),%rax
lea    0xee3(%rip),%rcx
test   $0x1,%dl
cmovne %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_cdio_bool_str>:
lea    0xef9(%rip),%rcx
lea    0xef6(%rip),%rax
test   %edi,%edi
cmovne %rcx,%rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"yes\00"
@.str.1 = [3 x i8] c"no\00"
define i8* @_cdio_bool_str(i1 zeroext %0) {
%2 = alloca i8
%3 = zext i1 %0 to i8
store i8 %3, i8* %2
%4 = load i8, i8* %2
%5 = trunc i8 %4 to i1
%6 = zext i1 %5 to i64
%7 = select i1 %5, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0)
ret i8* %7
}

LLVM IR (-O2):
@.str = [4 x i8] c"yes\00"
@.str.1 = [3 x i8] c"no\00"
define i8* @_cdio_bool_str(i1 zeroext %0) {
%2 = select i1 %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ gpio_write_bit(int, char);
void scmd(char value) { gpio_write_bit(5, value); }


x86 assembly (clang, -O0):
<scmd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x5,%edi
movsbl -0x1(%rbp),%esi
call   1030 <gpio_write_bit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scmd>:
mov    %edi,%esi
mov    $0x5,%edi
jmp    1030 <gpio_write_bit@plt>

LLVM IR (-O0):
define void @scmd(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @gpio_write_bit(i32 5, i8 signext %3)
ret void
}

LLVM IR (-O2):
define void @scmd(i8 signext %0) {
%2 = tail call i32 @gpio_write_bit(i32 5, i8 signext %0)
ret void
}
float __complex__ f_ret_floatcomplex() { return 1.0; }


x86 assembly (clang, -O0):
<f_ret_floatcomplex>:
push   %rbp
mov    %rsp,%rbp
movl   $0x3f800000,-0x8(%rbp)
movl   $0x0,-0x4(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_ret_floatcomplex>:
movss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define <2 x float> @f_ret_floatcomplex() {
%1 = alloca { float, float }
%2 = getelementptr inbounds { float, float }, { float, float }* %1, i32 0, i32 0
%3 = getelementptr inbounds { float, float }, { float, float }* %1, i32 0, i32 1
store float 1.000000e+00, float* %2
store float 0.000000e+00, float* %3
%4 = bitcast { float, float }* %1 to <2 x float>*
%5 = load <2 x float>, <2 x float>* %4
ret <2 x float> %5
}

LLVM IR (-O2):
define <2 x float> @f_ret_floatcomplex() {
ret <2 x float> <float 1.000000e+00, float 0.000000e+00>
}
BOOST_AUTO_TEST_CASE(csc) {}


x86 assembly (clang, -O0):
<BOOST_AUTO_TEST_CASE>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BOOST_AUTO_TEST_CASE>:
ret

LLVM IR (-O0):
define i32 @BOOST_AUTO_TEST_CASE(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @BOOST_AUTO_TEST_CASE(i32 %0) {
ret i32 undef
}
/* Variables and functions */
scalar_t__ can_alloc();
char *strdup(char const *);
char *memory_strdup(const char *s) {
  char *res = NULL;
  if (can_alloc()) {
    res = strdup(s);
  }
  return res;
}


x86 assembly (clang, -O0):
<memory_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    $0x0,%al
call   1030 <can_alloc@plt>
cmp    $0x0,%rax
je     1152 <memory_strdup+0x32>
mov    -0x8(%rbp),%rdi
call   1040 <strdup@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memory_strdup>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <can_alloc@plt>
test   %rax,%rax
je     1139 <memory_strdup+0x19>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <strdup@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @memory_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
store i8* null, i8** %3
%4 = call i64 (...) @can_alloc()
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i8* @strdup(i8* %7)
store i8* %8, i8** %3
br label %9
9: ; preds = %6, %1
%10 = load i8*, i8** %3
ret i8* %10
}

LLVM IR (-O2):
define noalias i8* @memory_strdup(i8* nocapture %0) {
%2 = tail call i64 (...) @can_alloc()
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i8* @strdup(i8* %0)
br label %6
6: ; preds = %4, %1
%7 = phi i8* [ %5, %4 ], [ null, %1 ]
ret i8* %7
}
void wx1101() {}


x86 assembly (clang, -O0):
<wx1101>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wx1101>:
ret

LLVM IR (-O0):
define void @wx1101() {
ret void
}

LLVM IR (-O2):
define void @wx1101() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void reuse_out_of_mem(void) {
  fputs("Failed to allocate more memory!\n", stderr);
  abort();
}


x86 assembly (clang, -O0):
<reuse_out_of_mem>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%esi
lea    0xecc(%rip),%rdi
call   1040 <fputs@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<reuse_out_of_mem>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
lea    0xecf(%rip),%rdi
call   1040 <fputs@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"Failed to allocate more memory!\0A\00"
@stderr = global i32 0
define void @reuse_out_of_mem() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@.str = [33 x i8] c"Failed to allocate more memory!\0A\00"
@stderr = global i32 0
define void @reuse_out_of_mem() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 (...) @abort()
unreachable
}
int power(int a, int b) {
  int i, p = 1;
  if (b == 0) {
    return 1;
  }
  int p2 = power(a, b / 2);
  if (b % 2 == 0) {
    return p2 * p2;
  }
  if (b % 2 == 1) {
    return p2 * p2 * a;
  }
}


x86 assembly (clang, -O0):
<power>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x1,-0x14(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    113b <power+0x2b>
movl   $0x1,-0x4(%rbp)
jmp    1198 <power+0x88>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%esi
call   1030 <power@plt>
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1176 <power+0x66>
mov    -0x18(%rbp),%eax
imul   -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1198 <power+0x88>
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x1,%edx
jne    1198 <power+0x88>
mov    -0x18(%rbp),%eax
imul   -0x18(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<power>:
push   %rbp
push   %r14
push   %rbx
test   %esi,%esi
je     1140 <power+0x30>
mov    %esi,%ebx
mov    %edi,%r14d
mov    %esi,%ebp
shr    $0x1f,%ebp
add    %esi,%ebp
mov    %ebp,%esi
sar    %esi
call   1030 <power@plt>
and    $0xfffffffe,%ebp
sub    %ebp,%ebx
cmp    $0x1,%ebx
je     1147 <power+0x37>
test   %ebx,%ebx
jne    114e <power+0x3e>
imul   %eax,%eax
jmp    114e <power+0x3e>
mov    $0x1,%eax
jmp    114e <power+0x3e>
imul   %eax,%eax
imul   %r14d,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @power(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 1, i32* %7
%9 = load i32, i32* %5
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 1, i32* %3
br label %34
12: ; preds = %2
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = sdiv i32 %14, 2
%16 = call i32 @power(i32 %13, i32 %15)
store i32 %16, i32* %8
%17 = load i32, i32* %5
%18 = srem i32 %17, 2
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %24
20: ; preds = %12
%21 = load i32, i32* %8
%22 = load i32, i32* %8
%23 = mul nsw i32 %21, %22
store i32 %23, i32* %3
br label %34
24: ; preds = %12
%25 = load i32, i32* %5
%26 = srem i32 %25, 2
%27 = icmp eq i32 %26, 1
br i1 %27, label %28, label %34
28: ; preds = %24
%29 = load i32, i32* %8
%30 = load i32, i32* %8
%31 = mul nsw i32 %29, %30
%32 = load i32, i32* %4
%33 = mul nsw i32 %31, %32
store i32 %33, i32* %3
br label %34
34: ; preds = %11, %20, %28, %24
%35 = load i32, i32* %3
ret i32 %35
}

LLVM IR (-O2):
define i32 @power(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %13, label %4
4: ; preds = %2
%5 = sdiv i32 %1, 2
%6 = tail call i32 @power(i32 %0, i32 %5)
%7 = srem i32 %1, 2
switch i32 %7, label %13 [
i32 0, label %8
i32 1, label %10
]
8: ; preds = %4
%9 = mul nsw i32 %6, %6
br label %13
10: ; preds = %4
%11 = mul nsw i32 %6, %6
%12 = mul nsw i32 %11, %0
br label %13
13: ; preds = %8, %10, %4, %2
%14 = phi i32 [ 1, %2 ], [ %9, %8 ], [ %12, %10 ], [ undef, %4 ]
ret i32 %14
}
int foo28() { return 28; }


x86 assembly (clang, -O0):
<foo28>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1c,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo28>:
mov    $0x1c,%eax
ret

LLVM IR (-O0):
define i32 @foo28() {
ret i32 28
}

LLVM IR (-O2):
define i32 @foo28() {
ret i32 28
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char const *, char *);
void classification_rule_error(const char *msg, char *rule) {
  printf("Classification Rule Error: %s \"%s\"\n", msg, rule);
  exit(0);
}


x86 assembly (clang, -O0):
<classification_rule_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<classification_rule_error>:
push   %rax
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xed2(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"Classification Rule Error: %s \22%s\22\0A\00"
define void @classification_rule_error(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i8* %5, i8* %6)
%8 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [36 x i8] c"Classification Rule Error: %s \22%s\22\0A\00"
define void @classification_rule_error(i8* %0, i8* %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%4 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ ENOMEM;
int /*<<< orphan*/ errno;
void *realloc(void *, size_t);
void *reallocarray(void *ptr, size_t nmemb, size_t size) {
  size_t res;
  res = nmemb * size;
  if (res < nmemb || res < size) {
    errno = ENOMEM;
    return NULL;
  }
  return realloc(ptr, res);
}


x86 assembly (clang, -O0):
<reallocarray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x18(%rbp),%rax
imul   -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
cmp    -0x18(%rbp),%rax
jb     114d <reallocarray+0x3d>
mov    -0x28(%rbp),%rax
cmp    -0x20(%rbp),%rax
jae    116c <reallocarray+0x5c>
mov    0x2e8c(%rip),%rax
mov    (%rax),%ecx
mov    0x2e7b(%rip),%rax
mov    %ecx,(%rax)
movq   $0x0,-0x8(%rbp)
jmp    117d <reallocarray+0x6d>
mov    -0x10(%rbp),%rdi
mov    -0x28(%rbp),%rsi
call   1030 <realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reallocarray>:
mov    %rsi,%rax
mov    %rdx,%rsi
imul   %rax,%rsi
cmp    %rax,%rsi
jb     1129 <reallocarray+0x19>
cmp    %rdx,%rsi
jb     1129 <reallocarray+0x19>
jmp    1030 <realloc@plt>
mov    0x2eb0(%rip),%rax
mov    (%rax),%eax
mov    0x2e9f(%rip),%rcx
mov    %eax,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
@ENOMEM = global i32 0
@errno = global i32 0
define i8* @reallocarray(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%9 = load i64, i64* %6
%10 = load i64, i64* %7
%11 = mul i64 %9, %10
store i64 %11, i64* %8
%12 = load i64, i64* %8
%13 = load i64, i64* %6
%14 = icmp ult i64 %12, %13
br i1 %14, label %19, label %15
15: ; preds = %3
%16 = load i64, i64* %8
%17 = load i64, i64* %7
%18 = icmp ult i64 %16, %17
br i1 %18, label %19, label %21
19: ; preds = %15, %3
%20 = load i32, i32* @ENOMEM
store i32 %20, i32* @errno
store i8* null, i8** %4
br label %25
21: ; preds = %15
%22 = load i8*, i8** %5
%23 = load i64, i64* %8
%24 = call i8* @realloc(i8* %22, i64 %23)
store i8* %24, i8** %4
br label %25
25: ; preds = %21, %19
%26 = load i8*, i8** %4
ret i8* %26
}

LLVM IR (-O2):
@ENOMEM = global i32 0
@errno = global i32 0
define noalias i8* @reallocarray(i8* nocapture %0, i64 %1, i64 %2) {
%4 = mul i64 %2, %1
%5 = icmp ult i64 %4, %1
%6 = icmp ult i64 %4, %2
%7 = or i1 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %3
%9 = load i32, i32* @ENOMEM
store i32 %9, i32* @errno
br label %12
10: ; preds = %3
%11 = tail call i8* @realloc(i8* %0, i64 %4)
br label %12
12: ; preds = %10, %8
%13 = phi i8* [ null, %8 ], [ %11, %10 ]
ret i8* %13
}
void RGBAToYRow_Any_NEON() {}


x86 assembly (clang, -O0):
<RGBAToYRow_Any_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RGBAToYRow_Any_NEON>:
ret

LLVM IR (-O0):
define void @RGBAToYRow_Any_NEON() {
ret void
}

LLVM IR (-O2):
define void @RGBAToYRow_Any_NEON() {
ret void
}
void kvmppc_emulate_tabort(struct kvm_vcpu *vcpu, int ra_val) {}


x86 assembly (clang, -O0):
<kvmppc_emulate_tabort>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<kvmppc_emulate_tabort>:
ret

LLVM IR (-O0):
%struct.kvm_vcpu = type opaque
define void @kvmppc_emulate_tabort(%struct.kvm_vcpu* %0, i32 %1) {
%3 = alloca %struct.kvm_vcpu*
%4 = alloca i32
store %struct.kvm_vcpu* %0, %struct.kvm_vcpu** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.kvm_vcpu = type opaque
define void @kvmppc_emulate_tabort(%struct.kvm_vcpu* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int /*<<< orphan*/);
void drop() { _exit(0); }


x86 assembly (clang, -O0):
<drop>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<drop>:
push   %rax
xor    %edi,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
define void @drop() {
%1 = call i32 @_exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @drop() {
%1 = tail call i32 @_exit(i32 0)
unreachable
}
/* Variables and functions */
size_t countChars(const char *str, char c) {
  size_t ret = 0;
  for (; *str; str++)
    if (*str == c)
      ret++;
  return ret;
}


x86 assembly (clang, -O0):
<countChars>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1158 <countChars+0x58>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jne    1142 <countChars+0x42>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1147 <countChars+0x47>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1116 <countChars+0x16>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<countChars>:
mov    (%rdi),%cl
test   %cl,%cl
je     1127 <countChars+0x27>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
xor    %edx,%edx
cmp    %sil,%cl
sete   %dl
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <countChars+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @countChars(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i64
store i8* %0, i8** %3
store i8 %1, i8* %4
store i64 0, i64* %5
br label %6
6: ; preds = %21, %2
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %24
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = load i8, i8* %4
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %13, %15
br i1 %16, label %17, label %20
17: ; preds = %10
%18 = load i64, i64* %5
%19 = add i64 %18, 1
store i64 %19, i64* %5
br label %20
20: ; preds = %17, %10
br label %21
21: ; preds = %20
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %3
br label %6
24: ; preds = %6
%25 = load i64, i64* %5
ret i64 %25
}

LLVM IR (-O2):
define i64 @countChars(i8* nocapture %0, i8 signext %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %13, %5 ], [ %3, %2 ]
%7 = phi i64 [ %11, %5 ], [ 0, %2 ]
%8 = phi i8* [ %12, %5 ], [ %0, %2 ]
%9 = icmp eq i8 %6, %1
%10 = zext i1 %9 to i64
%11 = add i64 %7, %10
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %2
%16 = phi i64 [ 0, %2 ], [ %11, %5 ]
ret i64 %16
}
void NDB_PREFETCH_WRITE(void *addr) { __builtin_prefetch(addr, 1, 3); }


x86 assembly (clang, -O0):
<NDB_PREFETCH_WRITE>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
prefetcht0 (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<NDB_PREFETCH_WRITE>:
prefetcht0 (%rdi)
ret

LLVM IR (-O0):
define void @NDB_PREFETCH_WRITE(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @NDB_PREFETCH_WRITE(i8* nocapture %0) {
tail call void @llvm.prefetch.p0i8(i8* %0, i32 1, i32 3, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void skip_test() {
  printf("Skip\n");
  exit(0);
}


x86 assembly (clang, -O0):
<skip_test>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<skip_test>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"Skip\0A\00"
define void @skip_test() {
%1 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [5 x i8] c"Skip\00"
define void @skip_test() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 0)
unreachable
}
int transform(char *key) {
  int number = 0;
  while (*key)
    number += *key++;
  return number;
}


x86 assembly (clang, -O0):
<transform>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1139 <transform+0x39>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    110f <transform+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<transform>:
mov    (%rdi),%cl
test   %cl,%cl
je     1121 <transform+0x21>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
movsbl %cl,%ecx
add    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <transform+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @transform(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %4
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
%11 = load i8, i8* %9
%12 = sext i8 %11 to i32
%13 = load i32, i32* %3
%14 = add nsw i32 %13, %12
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @transform(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %11, %4 ], [ %2, %1 ]
%6 = phi i32 [ %10, %4 ], [ 0, %1 ]
%7 = phi i8* [ %8, %4 ], [ %0, %1 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = sext i8 %5 to i32
%10 = add nsw i32 %6, %9
%11 = load i8, i8* %8
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %1
%14 = phi i32 [ 0, %1 ], [ %10, %4 ]
ret i32 %14
}
long p2(int max) {
  int a = 1, b = 1, c;
  long sum = 0;
  while (b <= max) {
    c = a;
    a = a + b;
    b = c;
    if (a % 2 == 0)
      sum += a;
  }
  return sum;
}


x86 assembly (clang, -O0):
<p2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     1163 <p2+0x63>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    115e <p2+0x5e>
movslq -0x8(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    111d <p2+0x1d>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<p2>:
xor    %eax,%eax
test   %edi,%edi
jle    112d <p2+0x2d>
mov    $0x1,%edx
mov    $0x1,%ecx
mov    %edx,%esi
add    %edx,%ecx
test   $0x1,%cl
mov    $0x0,%edx
cmove  %ecx,%edx
movslq %edx,%rdx
add    %rdx,%rax
mov    %ecx,%edx
mov    %esi,%ecx
cmp    %edi,%esi
jle    1110 <p2+0x10>
ret

LLVM IR (-O0):
define i64 @p2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i64
store i32 %0, i32* %2
store i32 1, i32* %3
store i32 1, i32* %4
store i64 0, i64* %6
br label %7
7: ; preds = %25, %1
%8 = load i32, i32* %4
%9 = load i32, i32* %2
%10 = icmp sle i32 %8, %9
br i1 %10, label %11, label %26
11: ; preds = %7
%12 = load i32, i32* %3
store i32 %12, i32* %5
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = add nsw i32 %13, %14
store i32 %15, i32* %3
%16 = load i32, i32* %5
store i32 %16, i32* %4
%17 = load i32, i32* %3
%18 = srem i32 %17, 2
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %25
20: ; preds = %11
%21 = load i32, i32* %3
%22 = sext i32 %21 to i64
%23 = load i64, i64* %6
%24 = add nsw i64 %23, %22
store i64 %24, i64* %6
br label %25
25: ; preds = %20, %11
br label %7
26: ; preds = %7
%27 = load i64, i64* %6
ret i64 %27
}

LLVM IR (-O2):
define i64 @p2(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %14, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %12, %3 ], [ 0, %1 ]
%5 = phi i32 [ %7, %3 ], [ 1, %1 ]
%6 = phi i32 [ %5, %3 ], [ 1, %1 ]
%7 = add nsw i32 %5, %6
%8 = and i32 %7, 1
%9 = icmp eq i32 %8, 0
%10 = select i1 %9, i32 %7, i32 0
%11 = sext i32 %10 to i64
%12 = add nsw i64 %4, %11
%13 = icmp sgt i32 %5, %0
br i1 %13, label %14, label %3
14: ; preds = %3, %1
%15 = phi i64 [ 0, %1 ], [ %12, %3 ]
ret i64 %15
}
/* Type definitions */
typedef int /*<<< orphan*/ ACCESS_DESCRIPTION;

/* Variables and functions */
int /*<<< orphan*/ ACCESS_DESCRIPTION_it;
scalar_t__ ASN1_item_new(int /*<<< orphan*/ *);
ACCESS_DESCRIPTION *ACCESS_DESCRIPTION_new(void) {
  return (ACCESS_DESCRIPTION *)ASN1_item_new(&ACCESS_DESCRIPTION_it);
}


x86 assembly (clang, -O0):
<ACCESS_DESCRIPTION_new>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rdi
call   1030 <ASN1_item_new@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ACCESS_DESCRIPTION_new>:
mov    0x2ec9(%rip),%rdi
jmp    1030 <ASN1_item_new@plt>

LLVM IR (-O0):
@ACCESS_DESCRIPTION_it = global i32 0
define i32* @ACCESS_DESCRIPTION_new() {
%1 = call i64 @ASN1_item_new(i32* @ACCESS_DESCRIPTION_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}

LLVM IR (-O2):
@ACCESS_DESCRIPTION_it = global i32 0
define i32* @ACCESS_DESCRIPTION_new() {
%1 = tail call i64 @ASN1_item_new(i32* @ACCESS_DESCRIPTION_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
int rayer_shutdown(void *spi_data) {
  free(spi_data);
  return 0;
}


x86 assembly (clang, -O0):
<rayer_shutdown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rayer_shutdown>:
push   %rax
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @rayer_shutdown(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @rayer_shutdown(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret i32 0
}
create_code_window() { return (1); }


x86 assembly (clang, -O0):
<create_code_window>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_code_window>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @create_code_window() {
ret i32 1
}

LLVM IR (-O2):
define i32 @create_code_window() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void kb_wait_2_2(void) {
  unsigned long timeout = 2;
  do {
    (1 ? printf("timeout=%ld\n", timeout) : ({
      label:
        printf("error\n");
        goto label;
    }));
    timeout--;
  } while (timeout);
}


x86 assembly (clang, -O0):
<kb_wait_2_2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x2,-0x8(%rbp)
mov    $0x1,%al
test   $0x1,%al
jne    112f <kb_wait_2_2+0x1f>
jmp    1146 <kb_wait_2_2+0x36>
mov    -0x8(%rbp),%rsi
lea    0xec6(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
jmp    115e <kb_wait_2_2+0x4e>
jmp    114b <kb_wait_2_2+0x3b>
lea    0xebb(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
jmp    114b <kb_wait_2_2+0x3b>
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1120 <kb_wait_2_2+0x10>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kb_wait_2_2>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    $0x2,%esi
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <printf@plt>
mov    $0x1,%esi
mov    %rbx,%rdi
xor    %eax,%eax
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"timeout=%ld\0A\00"
@.str.1 = [7 x i8] c"error\0A\00"
define void @kb_wait_2_2() {
%1 = alloca i64
store i64 2, i64* %1
br label %2
2: ; preds = %13, %0
br i1 true, label %3, label %6
3: ; preds = %2
%4 = load i64, i64* %1
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i64 %4)
br label %10
6: ; preds = %2
br label %7
7: ; preds = %7, %6
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
br label %7
9: ; No predecessors!
br label %10
10: ; preds = %9, %3
%11 = load i64, i64* %1
%12 = add i64 %11, -1
store i64 %12, i64* %1
br label %13
13: ; preds = %10
%14 = load i64, i64* %1
%15 = icmp ne i64 %14, 0
br i1 %15, label %2, label %16
16: ; preds = %13
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"timeout=%ld\0A\00"
define void @kb_wait_2_2() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i64 2)
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i64 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EX_USAGE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void usage(char const *progname) {
  fprintf(stderr,
          "Usage: %s [-hfv] [files...]\n"
          "Options:\n"
          "  -f		faster allocation (don't trace)\n"
          "  -h		print this message\n"
          "  -t		time command execution\n"
          "  -v		more verbose logging (v ... vvv)\n",
          progname);
  exit(EX_USAGE);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [169 x i8] c"Usage: %s [-hfv] [files...]\0AOptions:\0A -f\09\09faster allocation (don't trace)\0A -h\09\09print this message\0A -t\09\09time command execution\0A -v\09\09more verbose logging (v ... vvv)\0A\00"
@EX_USAGE = global i32 0
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @EX_USAGE
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [169 x i8] c"Usage: %s [-hfv] [files...]\0AOptions:\0A -f\09\09faster allocation (don't trace)\0A -h\09\09print this message\0A -t\09\09time command execution\0A -v\09\09more verbose logging (v ... vvv)\0A\00"
@EX_USAGE = global i32 0
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @EX_USAGE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
void dma_start(void) { (*(volatile unsigned long *)0x4B000020) |= (1 << 1); }


x86 assembly (clang, -O0):
<dma_start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4b000020,%eax
mov    (%rax),%rcx
or     $0x2,%rcx
mov    $0x4b000020,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dma_start>:
orq    $0x2,0x4b000020
4b 02
ret

LLVM IR (-O0):
define void @dma_start() {
%1 = load volatile i64, i64* inttoptr (i64 1258291232 to i64*)
%2 = or i64 %1, 2
store volatile i64 %2, i64* inttoptr (i64 1258291232 to i64*)
ret void
}

LLVM IR (-O2):
define void @dma_start() {
%1 = load volatile i64, i64* inttoptr (i64 1258291232 to i64*)
%2 = or i64 %1, 2
store volatile i64 %2, i64* inttoptr (i64 1258291232 to i64*)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ expand_overloaded_flags(int /*<<< orphan*/);
int /*<<< orphan*/ well_known_flags(int /*<<< orphan*/);
uint64_t kpageflags_flags(uint64_t flags) {
  flags = expand_overloaded_flags(flags);
  flags = well_known_flags(flags);
  return flags;
}


x86 assembly (clang, -O0):
<kpageflags_flags>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <expand_overloaded_flags@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <well_known_flags@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kpageflags_flags>:
push   %rax
call   1030 <expand_overloaded_flags@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <well_known_flags@plt>

LLVM IR (-O0):
define i32 @kpageflags_flags(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @expand_overloaded_flags(i32 %3)
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @well_known_flags(i32 %5)
store i32 %6, i32* %2
%7 = load i32, i32* %2
ret i32 %7
}

LLVM IR (-O2):
define i32 @kpageflags_flags(i32 %0) {
%2 = tail call i32 @expand_overloaded_flags(i32 %0)
%3 = tail call i32 @well_known_flags(i32 %2)
ret i32 %3
}
int test_imm_97int8_reg(signed char val) {
  return ((val) & (0x97 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_97int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0x97,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_97int8_reg>:
test   $0x97,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_97int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 151
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_97int8_reg(i8 signext %0) {
%2 = and i8 %0, -105
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
scalar_t__ isNumericOk(char *, int, int);
int /*<<< orphan*/ setConfigTextValue(char *, char *);
int updateRssItems(char *value) {
  if (isNumericOk(value, 1, 20)) {
    setConfigTextValue("web.rss.items", value);
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<updateRssItems>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x1,%esi
mov    $0x14,%edx
call   1040 <isNumericOk@plt>
cmp    $0x0,%rax
je     1165 <updateRssItems+0x45>
mov    -0x10(%rbp),%rsi
lea    0xeac(%rip),%rdi
call   1030 <setConfigTextValue@plt>
movl   $0x1,-0x4(%rbp)
jmp    116c <updateRssItems+0x4c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<updateRssItems>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    $0x1,%ebp
mov    $0x1,%esi
mov    $0x14,%edx
call   1040 <isNumericOk@plt>
test   %rax,%rax
je     1150 <updateRssItems+0x30>
lea    0xeba(%rip),%rdi
mov    %rbx,%rsi
call   1030 <setConfigTextValue@plt>
jmp    1152 <updateRssItems+0x32>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [14 x i8] c"web.rss.items\00"
define i32 @updateRssItems(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @isNumericOk(i8* %4, i32 1, i32 20)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = call i32 @setConfigTextValue(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %8)
store i32 1, i32* %2
br label %11
10: ; preds = %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
@.str = [14 x i8] c"web.rss.items\00"
define i32 @updateRssItems(i8* %0) {
%2 = tail call i64 @isNumericOk(i8* %0, i32 1, i32 20)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @setConfigTextValue(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 1, %4 ], [ 0, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
void *realloc(void *, size_t);
int /*<<< orphan*/ stderr;
void *erealloc(void *p, size_t s) {
  void *result = realloc(p, s);
  if (NULL == result) {
    fprintf(stderr, "Can't allocate memory\n");
    exit(EXIT_FAILURE);
  }
  return result;
}


x86 assembly (clang, -O0):
<erealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x18(%rbp)
xor    %eax,%eax
cmp    -0x18(%rbp),%rax
jne    1180 <erealloc+0x50>
mov    0x2e7c(%rip),%rax
mov    (%rax),%edi
lea    0xe93(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e5f(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<erealloc>:
push   %rax
call   1040 <realloc@plt>
test   %rax,%rax
je     113d <erealloc+0xd>
pop    %rcx
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e7f(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [23 x i8] c"Can't allocate memory\0A\00"
@EXIT_FAILURE = global i32 0
define i8* @erealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* null, %9
br i1 %10, label %11, label %16
11: ; preds = %2
%12 = load i32, i32* @stderr
%13 = call i32 @fprintf(i32 %12, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%14 = load i32, i32* @EXIT_FAILURE
%15 = call i32 @exit(i32 %14)
unreachable
16: ; preds = %2
%17 = load i8*, i8** %5
ret i8* %17
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [23 x i8] c"Can't allocate memory\0A\00"
@EXIT_FAILURE = global i32 0
define noalias i8* @erealloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %10
5: ; preds = %2
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* @EXIT_FAILURE
%9 = tail call i32 @exit(i32 %8)
unreachable
10: ; preds = %2
ret i8* %3
}