xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ ft_print_numbers();
int main(void) {
  ft_print_numbers();
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <ft_print_numbers@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <ft_print_numbers@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @ft_print_numbers()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @ft_print_numbers()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ sleep(int);
void sig_second_stop_handle(int signal) {
  sleep(15);
  printf("second process quit!\n");
}


x86 assembly (clang, -O0):
<sig_second_stop_handle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0xf,%edi
call   1040 <sleep@plt>
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_second_stop_handle>:
push   %rax
mov    $0xf,%edi
call   1040 <sleep@plt>
lea    0xece(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"second process quit!\0A\00"
define void @sig_second_stop_handle(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @sleep(i32 15)
%4 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [21 x i8] c"second process quit!\00"
define void @sig_second_stop_handle(i32 %0) {
%2 = tail call i32 @sleep(i32 15)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
ret void
}
int fun134() { return 134; }


x86 assembly (clang, -O0):
<fun134>:
push   %rbp
mov    %rsp,%rbp
mov    $0x86,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun134>:
mov    $0x86,%eax
ret

LLVM IR (-O0):
define i32 @fun134() {
ret i32 134
}

LLVM IR (-O2):
define i32 @fun134() {
ret i32 134
}
/* Type definitions */
struct timespec {
  scalar_t__ tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
double pn_timespec_to_double(struct timespec *t) {
  return (double)t->tv_sec + (double)t->tv_nsec / 1000000000;
}


x86 assembly (clang, -O0):
<pn_timespec_to_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cvtsi2sdq 0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
cvtsi2sdq (%rax),%xmm1
movsd  0xedd(%rip),%xmm2
divsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<pn_timespec_to_double>:
cvtsi2sdq 0x8(%rdi),%xmm1
cvtsi2sdq (%rdi),%xmm0
divsd  0xeed(%rip),%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
define double @pn_timespec_to_double(%struct.timespec* %0) {
%2 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %2
%3 = load %struct.timespec*, %struct.timespec** %2
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
%5 = load i64, i64* %4
%6 = sitofp i64 %5 to double
%7 = load %struct.timespec*, %struct.timespec** %2
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %7, i32 0, i32 0
%9 = load i64, i64* %8
%10 = sitofp i64 %9 to double
%11 = fdiv double %10, 1.000000e+09
%12 = fadd double %6, %11
ret double %12
}

LLVM IR (-O2):
%struct.timespec = type { i64, i64 }
define double @pn_timespec_to_double(%struct.timespec* nocapture %0) {
%2 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 1
%3 = load i64, i64* %2
%4 = sitofp i64 %3 to double
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 0
%6 = load i64, i64* %5
%7 = sitofp i64 %6 to double
%8 = fdiv double %7, 1.000000e+09
%9 = fadd double %8, %4
ret double %9
}
/* Variables and functions */
scalar_t__ realloc_array(void **, int, int, int, int, int);
double **realloc_double(double **array, int first, int second, int ext1,
                        int ext2) {
  return (double **)realloc_array((void **)array, sizeof(double), first, second,
                                  ext1, ext2);
}


x86 assembly (clang, -O0):
<realloc_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    -0x18(%rbp),%r9d
mov    $0x8,%esi
call   1030 <realloc_array@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<realloc_double>:
mov    %r8d,%r9d
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    $0x8,%esi
jmp    1030 <realloc_array@plt>

LLVM IR (-O0):
define double** @realloc_double(double** %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca double**
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store double** %0, double*** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load double**, double*** %6
%12 = bitcast double** %11 to i8**
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = load i32, i32* %10
%17 = call i64 @realloc_array(i8** %12, i32 8, i32 %13, i32 %14, i32 %15, i32 %16)
%18 = inttoptr i64 %17 to double**
ret double** %18
}

LLVM IR (-O2):
define double** @realloc_double(double** %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = bitcast double** %0 to i8**
%7 = tail call i64 @realloc_array(i8** %6, i32 8, i32 %1, i32 %2, i32 %3, i32 %4)
%8 = inttoptr i64 %7 to double**
ret double** %8
}
/* Variables and functions */
int inb(int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ ps2_command_write(int, int);
int /*<<< orphan*/ ps2_controller_read_ready();
int mouse_request_packet() {
  ps2_command_write(0xEB, 0x64);
  ps2_controller_read_ready();
  int ack = inb(0x60);
  if (ack != 0xFA) {
    printf("mouse: bad ack: %x\n", ack);
  }
  ps2_controller_read_ready();
  return inb(0x60);
}


x86 assembly (clang, -O0):
<mouse_request_packet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xeb,%edi
mov    $0x64,%esi
call   1050 <ps2_command_write@plt>
mov    $0x0,%al
call   1060 <ps2_controller_read_ready@plt>
mov    $0x60,%edi
call   1040 <inb@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0xfa,-0x4(%rbp)
je     1187 <mouse_request_packet+0x47>
mov    -0x4(%rbp),%esi
lea    0xe7e(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1060 <ps2_controller_read_ready@plt>
mov    $0x60,%edi
call   1040 <inb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mouse_request_packet>:
push   %rax
mov    $0xeb,%edi
mov    $0x64,%esi
call   1050 <ps2_command_write@plt>
xor    %eax,%eax
call   1060 <ps2_controller_read_ready@plt>
mov    $0x60,%edi
call   1040 <inb@plt>
cmp    $0xfa,%eax
je     1176 <mouse_request_packet+0x36>
lea    0xe91(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
call   1060 <ps2_controller_read_ready@plt>
mov    $0x60,%edi
pop    %rax
jmp    1040 <inb@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"mouse: bad ack: %x\0A\00"
define i32 @mouse_request_packet() {
%1 = alloca i32
%2 = call i32 @ps2_command_write(i32 235, i32 100)
%3 = call i32 (...) @ps2_controller_read_ready()
%4 = call i32 @inb(i32 96)
store i32 %4, i32* %1
%5 = load i32, i32* %1
%6 = icmp ne i32 %5, 250
br i1 %6, label %7, label %10
7: ; preds = %0
%8 = load i32, i32* %1
%9 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %8)
br label %10
10: ; preds = %7, %0
%11 = call i32 (...) @ps2_controller_read_ready()
%12 = call i32 @inb(i32 96)
ret i32 %12
}

LLVM IR (-O2):
@.str = [20 x i8] c"mouse: bad ack: %x\0A\00"
define i32 @mouse_request_packet() {
%1 = tail call i32 @ps2_command_write(i32 235, i32 100)
%2 = tail call i32 (...) @ps2_controller_read_ready()
%3 = tail call i32 @inb(i32 96)
%4 = icmp eq i32 %3, 250
br i1 %4, label %7, label %5
5: ; preds = %0
%6 = tail call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %3)
br label %7
7: ; preds = %5, %0
%8 = tail call i32 (...) @ps2_controller_read_ready()
%9 = tail call i32 @inb(i32 96)
ret i32 %9
}
int test_imm_19uint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0x19 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_19uint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0x19,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_19uint64_highword_reg>:
movabs $0x1900000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_19uint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 25
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_19uint64_highword_reg(i64 %0) {
%2 = and i64 %0, 107374182400
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ copy_memory(char *, char const *, size_t);
int mu_strlen(char const *);
scalar_t__ safe_malloc(size_t, int /*<<< orphan*/);
char *mu_strdup(const char *src) {
  if (!src)
    return NULL;
  register size_t len = mu_strlen(src) + 1;
  char *dest = (char *)safe_malloc(len, 0);
  copy_memory(dest, src, len);
  return dest;
}


x86 assembly (clang, -O0):
<mu_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1154 <mu_strdup+0x24>
movq   $0x0,-0x8(%rbp)
jmp    118e <mu_strdup+0x5e>
mov    -0x10(%rbp),%rdi
call   1050 <mu_strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
xor    %esi,%esi
call   1030 <safe_malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <copy_memory@plt>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mu_strdup>:
push   %r15
push   %r14
push   %rbx
test   %rdi,%rdi
je     1165 <mu_strdup+0x35>
mov    %rdi,%rbx
call   1050 <mu_strlen@plt>
add    $0x1,%eax
movslq %eax,%r15
mov    %r15,%rdi
xor    %esi,%esi
call   1030 <safe_malloc@plt>
mov    %rax,%r14
mov    %rax,%rdi
mov    %rbx,%rsi
mov    %r15,%rdx
call   1040 <copy_memory@plt>
jmp    1168 <mu_strdup+0x38>
xor    %r14d,%r14d
mov    %r14,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @mu_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %9, label %8
8: ; preds = %1
store i8* null, i8** %2
br label %22
9: ; preds = %1
%10 = load i8*, i8** %3
%11 = call i32 @mu_strlen(i8* %10)
%12 = add nsw i32 %11, 1
%13 = sext i32 %12 to i64
store i64 %13, i64* %4
%14 = load i64, i64* %4
%15 = call i64 @safe_malloc(i64 %14, i32 0)
%16 = inttoptr i64 %15 to i8*
store i8* %16, i8** %5
%17 = load i8*, i8** %5
%18 = load i8*, i8** %3
%19 = load i64, i64* %4
%20 = call i32 @copy_memory(i8* %17, i8* %18, i64 %19)
%21 = load i8*, i8** %5
store i8* %21, i8** %2
br label %22
22: ; preds = %9, %8
%23 = load i8*, i8** %2
ret i8* %23
}

LLVM IR (-O2):
define i8* @mu_strdup(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = tail call i32 @mu_strlen(i8* %0)
%5 = add nsw i32 %4, 1
%6 = sext i32 %5 to i64
%7 = tail call i64 @safe_malloc(i64 %6, i32 0)
%8 = inttoptr i64 %7 to i8*
%9 = tail call i32 @copy_memory(i8* %8, i8* %0, i64 %6)
br label %10
10: ; preds = %1, %3
%11 = phi i8* [ %8, %3 ], [ null, %1 ]
ret i8* %11
}
unsigned int _check_times(unsigned x, unsigned y) {
  unsigned long long whole_ans =
      ((unsigned long long)x) * ((unsigned long long)y);
  unsigned word_ans = (unsigned)whole_ans;
  if (word_ans < whole_ans || word_ans > (1 << 28))
    (_throw_badalloc_fn("/scratch/repos/new/home/jordi_armengol_estape/"
                        "c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/"
                        "cyclone/refs/heads/master/bin/genfiles/xarray.c",
                        284));
  return word_ans;
}


x86 assembly (clang, -O0):
<_check_times>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%rax
jb     114d <_check_times+0x3d>
cmpl   $0x10000000,-0x14(%rbp)
jbe    1160 <_check_times+0x50>
lea    0xeac(%rip),%rdi
mov    $0x11c,%esi
mov    $0x0,%al
call   1030 <_throw_badalloc_fn@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_check_times>:
push   %rbx
mov    %edi,%eax
mul    %esi
mov    %eax,%ebx
jo     1121 <_check_times+0x11>
cmp    $0x10000001,%ebx
jb     1134 <_check_times+0x24>
lea    0xed8(%rip),%rdi
mov    $0x11c,%esi
xor    %eax,%eax
call   1030 <_throw_badalloc_fn@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [147 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/xarray.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = zext i32 %7 to i64
%9 = load i32, i32* %4
%10 = zext i32 %9 to i64
%11 = mul i64 %8, %10
store i64 %11, i64* %5
%12 = load i64, i64* %5
%13 = trunc i64 %12 to i32
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = zext i32 %14 to i64
%16 = load i64, i64* %5
%17 = icmp ult i64 %15, %16
br i1 %17, label %21, label %18
18: ; preds = %2
%19 = load i32, i32* %6
%20 = icmp ugt i32 %19, 268435456
br i1 %20, label %21, label %23
21: ; preds = %18, %2
%22 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([147 x i8], [147 x i8]* @.str, i64 0, i64 0), i32 284)
br label %23
23: ; preds = %21, %18
%24 = load i32, i32* %6
ret i32 %24
}

LLVM IR (-O2):
@.str = [147 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/xarray.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %0, i32 %1)
%4 = extractvalue { i32, i1 } %3, 0
%5 = extractvalue { i32, i1 } %3, 1
%6 = icmp ugt i32 %4, 268435456
%7 = or i1 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([147 x i8], [147 x i8]* @.str, i64 0, i64 0), i32 284)
br label %10
10: ; preds = %2, %8
ret i32 %4
}
int test_imm_02uint32_reg(unsigned int val) {
  return ((val) & (0x02 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_02uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x2,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_02uint32_reg>:
test   $0x2,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_02uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 2
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_02uint32_reg(i32 %0) {
%2 = and i32 %0, 2
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
char *doasprintf(char *, char const *, char const *);
int /*<<< orphan*/ warn(char *);
char *json_fmt_header_rsa(const char *exp, const char *mod) {
  char *p;
  p = doasprintf("{"
                 "\"alg\": \"RS256\", "
                 "\"jwk\": "
                 "{\"e\": \"%s\", \"kty\": \"RSA\", \"n\": \"%s\"}"
                 "}",
                 exp, mod);
  if (NULL == p)
    warn("asprintf");
  return (p);
}


x86 assembly (clang, -O0):
<json_fmt_header_rsa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xec1(%rip),%rdi
call   1040 <doasprintf@plt>
mov    %rax,-0x18(%rbp)
xor    %eax,%eax
cmp    -0x18(%rbp),%rax
jne    1160 <json_fmt_header_rsa+0x40>
lea    0xee3(%rip),%rdi
call   1030 <warn@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<json_fmt_header_rsa>:
push   %rbx
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xed2(%rip),%rdi
call   1040 <doasprintf@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1147 <json_fmt_header_rsa+0x27>
lea    0xefc(%rip),%rdi
call   1030 <warn@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [62 x i8] c"{\22alg\22: \22RS256\22, \22jwk\22: {\22e\22: \22%s\22, \22kty\22: \22RSA\22, \22n\22: \22%s\22}}\00"
@.str.1 = [9 x i8] c"asprintf\00"
define i8* @json_fmt_header_rsa(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i8* @doasprintf(i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0), i8* %6, i8* %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* null, %9
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = call i32 @warn(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
br label %13
13: ; preds = %11, %2
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
@.str = [62 x i8] c"{\22alg\22: \22RS256\22, \22jwk\22: {\22e\22: \22%s\22, \22kty\22: \22RSA\22, \22n\22: \22%s\22}}\00"
@.str.1 = [9 x i8] c"asprintf\00"
define i8* @json_fmt_header_rsa(i8* %0, i8* %1) {
%3 = tail call i8* @doasprintf(i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @warn(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret i8* %3
}
double SquareDouble(double Value) { return Value * Value; }


x86 assembly (clang, -O0):
<SquareDouble>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<SquareDouble>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @SquareDouble(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @SquareDouble(double %0) {
%2 = fmul double %0, %0
ret double %2
}
void _ReduceString(char *path, int count) {
  char *pStr1 = path;
  char *pStr2 = path + count;
  while (*pStr2)
    *pStr1++ = *pStr2++;
  *pStr1 = '\0';
}


x86 assembly (clang, -O0):
<_ReduceString>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmpb   $0x0,(%rax)
je     1156 <_ReduceString+0x56>
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x20(%rbp)
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %cl,(%rax)
jmp    1122 <_ReduceString+0x22>
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ReduceString>:
movslq %esi,%rax
mov    (%rdi,%rax,1),%cl
test   %cl,%cl
je     1126 <_ReduceString+0x26>
nopw   0x0(%rax,%rax,1)
lea    0x1(%rdi),%rdx
mov    %cl,(%rdi)
movzbl 0x1(%rdi,%rax,1),%ecx
mov    %rdx,%rdi
test   %cl,%cl
jne    1110 <_ReduceString+0x10>
movb   $0x0,(%rdx)
ret
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @_ReduceString(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
store i8* %11, i8** %6
br label %12
12: ; preds = %16, %2
%13 = load i8*, i8** %6
%14 = load i8, i8* %13
%15 = icmp ne i8 %14, 0
br i1 %15, label %16, label %22
16: ; preds = %12
%17 = load i8*, i8** %6
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %6
%19 = load i8, i8* %17
%20 = load i8*, i8** %5
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %5
store i8 %19, i8* %20
br label %12
22: ; preds = %12
%23 = load i8*, i8** %5
store i8 0, i8* %23
ret void
}

LLVM IR (-O2):
define void @_ReduceString(i8* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
br i1 %6, label %15, label %7
7: ; preds = %2, %7
%8 = phi i8 [ %13, %7 ], [ %5, %2 ]
%9 = phi i8* [ %11, %7 ], [ %4, %2 ]
%10 = phi i8* [ %12, %7 ], [ %0, %2 ]
%11 = getelementptr inbounds i8, i8* %9, i64 1
%12 = getelementptr inbounds i8, i8* %10, i64 1
store i8 %8, i8* %10
%13 = load i8, i8* %11
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %7
15: ; preds = %7, %2
%16 = phi i8* [ %0, %2 ], [ %12, %7 ]
store i8 0, i8* %16
ret void
}
int resolve(char *dns, char *srv, struct sockaddr_in *addr) { return 1; }


x86 assembly (clang, -O0):
<resolve>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<resolve>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.sockaddr_in = type opaque
define i32 @resolve(i8* %0, i8* %1, %struct.sockaddr_in* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca %struct.sockaddr_in*
store i8* %0, i8** %4
store i8* %1, i8** %5
store %struct.sockaddr_in* %2, %struct.sockaddr_in** %6
ret i32 1
}

LLVM IR (-O2):
%struct.sockaddr_in = type opaque
define i32 @resolve(i8* nocapture readnone %0, i8* nocapture readnone %1, %struct.sockaddr_in* nocapture readnone %2) {
ret i32 1
}
/* Variables and functions */
char *av_make_error_string(char *, int, int);
char *av_err2str(int errnum) {
  char str[64] = {0};
  return av_make_error_string(str, 64, errnum);
}


x86 assembly (clang, -O0):
<av_err2str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x50(%rbp),%rdi
xor    %esi,%esi
mov    $0x40,%edx
call   1030 <memset@plt>
lea    -0x50(%rbp),%rdi
mov    -0x4(%rbp),%edx
mov    $0x40,%esi
call   1040 <av_make_error_string@plt>
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_err2str>:
sub    $0x48,%rsp
mov    %edi,%edx
xorps  %xmm0,%xmm0
movaps %xmm0,0x30(%rsp)
movaps %xmm0,0x20(%rsp)
movaps %xmm0,0x10(%rsp)
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x40,%esi
call   1030 <av_make_error_string@plt>
add    $0x48,%rsp
ret

LLVM IR (-O0):
define i8* @av_err2str(i32 %0) {
%2 = alloca i32
%3 = alloca [64 x i8]
store i32 %0, i32* %2
%4 = bitcast [64 x i8]* %3 to i8*
%5 = getelementptr inbounds [64 x i8], [64 x i8]* %3, i64 0, i64 0
%6 = load i32, i32* %2
%7 = call i8* @av_make_error_string(i8* %5, i32 64, i32 %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @av_err2str(i32 %0) {
%2 = alloca [64 x i8]
%3 = getelementptr inbounds [64 x i8], [64 x i8]* %2, i64 0, i64 0
%4 = call i8* @av_make_error_string(i8* %3, i32 64, i32 %0)
ret i8* %4
}
void av_picture_crop() {}


x86 assembly (clang, -O0):
<av_picture_crop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_picture_crop>:
ret

LLVM IR (-O0):
define void @av_picture_crop() {
ret void
}

LLVM IR (-O2):
define void @av_picture_crop() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ mmio_readw(void const *);
uint16_t mmio_le_readw(const void *addr) { return (mmio_readw(addr)); }


x86 assembly (clang, -O0):
<mmio_le_readw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mmio_readw@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmio_le_readw>:
jmp    1030 <mmio_readw@plt>

LLVM IR (-O0):
define i32 @mmio_le_readw(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @mmio_readw(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @mmio_le_readw(i8* %0) {
%2 = tail call i32 @mmio_readw(i8* %0)
ret i32 %2
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void UARTBreakCtl(uint32_t ui32Base, bool bBreakState) {
  ;
  (*((volatile unsigned long *)(ui32Base + 0x0000002C))) =
      (bBreakState ? ((*((volatile unsigned long *)(ui32Base + 0x0000002C))) |
                      0x00000001)
                   : ((*((volatile unsigned long *)(ui32Base + 0x0000002C))) &
                      ~(0x00000001)));
}


x86 assembly (clang, -O0):
<UARTBreakCtl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     112a <UARTBreakCtl+0x2a>
mov    -0x8(%rbp),%rax
mov    0x2c(%rax),%rax
or     $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    113a <UARTBreakCtl+0x3a>
mov    -0x8(%rbp),%rax
mov    0x2c(%rax),%rax
and    $0xfffffffffffffffe,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x2c(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTBreakCtl>:
xor    %eax,%eax
test   %esi,%esi
setne  %al
mov    0x2c(%rdi),%rcx
and    $0xfffffffffffffffe,%rcx
or     %rcx,%rax
mov    %rax,0x2c(%rdi)
ret

LLVM IR (-O0):
define void @UARTBreakCtl(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %2
%8 = load i64, i64* %3
%9 = add nsw i64 %8, 44
%10 = inttoptr i64 %9 to i64*
%11 = load volatile i64, i64* %10
%12 = or i64 %11, 1
br label %19
13: ; preds = %2
%14 = load i64, i64* %3
%15 = add nsw i64 %14, 44
%16 = inttoptr i64 %15 to i64*
%17 = load volatile i64, i64* %16
%18 = and i64 %17, -2
br label %19
19: ; preds = %13, %7
%20 = phi i64 [ %12, %7 ], [ %18, %13 ]
%21 = load i64, i64* %3
%22 = add nsw i64 %21, 44
%23 = inttoptr i64 %22 to i64*
store volatile i64 %20, i64* %23
ret void
}

LLVM IR (-O2):
define void @UARTBreakCtl(i64 %0, i32 %1) {
%3 = icmp ne i32 %1, 0
%4 = add nsw i64 %0, 44
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, -2
%8 = zext i1 %3 to i64
%9 = or i64 %7, %8
store volatile i64 %9, i64* %5
ret void
}
/* Variables and functions */
char *strchr(char *, char);
bool should_contain_number_lines(char *arg, bool orig) {
  if (orig == true)
    return true;
  char *pos = strchr(arg, 'n');
  if (pos != NULL)
    return true;
  return false;
}


x86 assembly (clang, -O0):
<should_contain_number_lines>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x1,-0x14(%rbp)
jne    1135 <should_contain_number_lines+0x25>
movl   $0x1,-0x4(%rbp)
jmp    1165 <should_contain_number_lines+0x55>
mov    -0x10(%rbp),%rdi
mov    $0x6e,%esi
call   1030 <strchr@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     115e <should_contain_number_lines+0x4e>
movl   $0x1,-0x4(%rbp)
jmp    1165 <should_contain_number_lines+0x55>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<should_contain_number_lines>:
mov    $0x1,%eax
cmp    $0x1,%esi
je     1134 <should_contain_number_lines+0x24>
push   %rax
mov    $0x6e,%esi
call   1030 <strchr@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @should_contain_number_lines(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i32, i32* %5
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, i32* %3
br label %17
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = call i8* @strchr(i8* %11, i8 signext 110)
store i8* %12, i8** %6
%13 = load i8*, i8** %6
%14 = icmp ne i8* %13, null
br i1 %14, label %15, label %16
15: ; preds = %10
store i32 1, i32* %3
br label %17
16: ; preds = %10
store i32 0, i32* %3
br label %17
17: ; preds = %16, %15, %9
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @should_contain_number_lines(i8* %0, i32 %1) {
%3 = icmp eq i32 %1, 1
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = tail call i8* @strchr(i8* dereferenceable(1) %0, i8 signext 110)
%6 = icmp ne i8* %5, null
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %2, %4
%9 = phi i32 [ %7, %4 ], [ 1, %2 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_usage(void) {
  printf("Usage: popx -h <host> -u <username> [-p <port>]\n");
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [49 x i8] c"Usage: popx -h <host> -u <username> [-p <port>]\0A\00"
define void @print_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [48 x i8] c"Usage: popx -h <host> -u <username> [-p <port>]\00"
define void @print_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([48 x i8], [48 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
double log(scalar_t__);
scalar_t__ sqrt(double);
double math_asinh(double x) { return log(x + sqrt(x * x + 1)); }


x86 assembly (clang, -O0):
<math_asinh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeb3(%rip),%xmm1
addsd  %xmm1,%xmm0
call   1040 <sqrt@plt>
movsd  -0x10(%rbp),%xmm0
cvtsi2sd %rax,%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rdi
call   1030 <log@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<math_asinh>:
push   %rax
movsd  %xmm0,(%rsp)
mulsd  %xmm0,%xmm0
addsd  0xece(%rip),%xmm0
call   1040 <sqrt@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
addsd  (%rsp),%xmm0
cvttsd2si %xmm0,%rdi
pop    %rax
jmp    1030 <log@plt>

LLVM IR (-O0):
define double @math_asinh(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = load double, double* %2
%6 = call double @llvm.fmuladd.f64(double %4, double %5, double 1.000000e+00)
%7 = call i64 @sqrt(double %6)
%8 = sitofp i64 %7 to double
%9 = fadd double %3, %8
%10 = fptosi double %9 to i64
%11 = call double @log(i64 %10)
ret double %11
}

LLVM IR (-O2):
define double @math_asinh(double %0) {
%2 = tail call double @llvm.fmuladd.f64(double %0, double %0, double 1.000000e+00)
%3 = tail call i64 @sqrt(double %2)
%4 = sitofp i64 %3 to double
%5 = fadd double %4, %0
%6 = fptosi double %5 to i64
%7 = tail call double @log(i64 %6)
ret double %7
}
/* Variables and functions */
int bdos(int, int);
int getchi() { return bdos(6, 0xff); }


x86 assembly (clang, -O0):
<getchi>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
mov    $0xff,%esi
call   1030 <bdos@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getchi>:
mov    $0x6,%edi
mov    $0xff,%esi
jmp    1030 <bdos@plt>

LLVM IR (-O0):
define i32 @getchi() {
%1 = call i32 @bdos(i32 6, i32 255)
ret i32 %1
}

LLVM IR (-O2):
define i32 @getchi() {
%1 = tail call i32 @bdos(i32 6, i32 255)
ret i32 %1
}
/* Type definitions */
struct gpio_bank {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _set_gpio_direction(struct gpio_bank *, int /*<<< orphan*/,
                                       int);
scalar_t__ check_gpio(int);
struct gpio_bank *get_gpio_bank(int);
int /*<<< orphan*/ get_gpio_index(int);
void omap_set_gpio_direction(int gpio, int is_input) {
  struct gpio_bank *bank;
  if (check_gpio(gpio) < 0)
    return;
  bank = get_gpio_bank(gpio);
  _set_gpio_direction(bank, get_gpio_index(gpio), is_input);
}


x86 assembly (clang, -O0):
<omap_set_gpio_direction>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <check_gpio@plt>
cmp    $0x0,%rax
jge    1165 <omap_set_gpio_direction+0x25>
jmp    118f <omap_set_gpio_direction+0x4f>
mov    -0x4(%rbp),%edi
call   1040 <get_gpio_bank@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <get_gpio_index@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
mov    -0x8(%rbp),%edx
call   1060 <_set_gpio_direction@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<omap_set_gpio_direction>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %edi,%ebp
call   1030 <check_gpio@plt>
test   %rax,%rax
js     1175 <omap_set_gpio_direction+0x35>
mov    %ebp,%edi
call   1040 <get_gpio_bank@plt>
mov    %rax,%rbx
mov    %ebp,%edi
call   1050 <get_gpio_index@plt>
mov    %rbx,%rdi
mov    %eax,%esi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1060 <_set_gpio_direction@plt>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
%struct.gpio_bank = type { i32 }
define void @omap_set_gpio_direction(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca %struct.gpio_bank*
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = call i64 @check_gpio(i32 %6)
%8 = icmp slt i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %2
br label %18
10: ; preds = %2
%11 = load i32, i32* %3
%12 = call %struct.gpio_bank* @get_gpio_bank(i32 %11)
store %struct.gpio_bank* %12, %struct.gpio_bank** %5
%13 = load %struct.gpio_bank*, %struct.gpio_bank** %5
%14 = load i32, i32* %3
%15 = call i32 @get_gpio_index(i32 %14)
%16 = load i32, i32* %4
%17 = call i32 @_set_gpio_direction(%struct.gpio_bank* %13, i32 %15, i32 %16)
br label %18
18: ; preds = %10, %9
ret void
}

LLVM IR (-O2):
%struct.gpio_bank = type { i32 }
define void @omap_set_gpio_direction(i32 %0, i32 %1) {
%3 = tail call i64 @check_gpio(i32 %0)
%4 = icmp slt i64 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call %struct.gpio_bank* @get_gpio_bank(i32 %0)
%7 = tail call i32 @get_gpio_index(i32 %0)
%8 = tail call i32 @_set_gpio_direction(%struct.gpio_bank* %6, i32 %7, i32 %1)
br label %9
9: ; preds = %2, %5
ret void
}
/* Variables and functions */
scalar_t__ EOF;
scalar_t__ getchar();
int /*<<< orphan*/ printf(char *, long);
int main() {
  long count;
  count = 0;
  while (getchar() != EOF) {
    count++;
  }
  printf("%ld \n", count);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    0x2ea3(%rip),%rcx
cmp    (%rcx),%rax
je     115f <main+0x3f>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1137 <main+0x17>
mov    -0x10(%rbp),%rsi
lea    0xe96(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    $0xffffffffffffffff,%rbx
mov    0x2eb6(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
xor    %eax,%eax
call   1040 <getchar@plt>
add    $0x1,%rbx
cmp    (%r14),%rax
jne    1140 <main+0x20>
lea    0xea9(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@EOF = global i64 0
@.str = [6 x i8] c"%ld \0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
store i32 0, i32* %1
store i64 0, i64* %2
br label %3
3: ; preds = %7, %0
%4 = call i64 (...) @getchar()
%5 = load i64, i64* @EOF
%6 = icmp ne i64 %4, %5
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i64, i64* %2
%9 = add nsw i64 %8, 1
store i64 %9, i64* %2
br label %3
10: ; preds = %3
%11 = load i64, i64* %2
%12 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i64 %11)
ret i32 0
}

LLVM IR (-O2):
@EOF = global i64 0
@.str = [6 x i8] c"%ld \0A\00"
define i32 @main() {
br label %1
1: ; preds = %1, %0
%2 = phi i64 [ 0, %0 ], [ %6, %1 ]
%3 = tail call i64 (...) @getchar()
%4 = load i64, i64* @EOF
%5 = icmp eq i64 %3, %4
%6 = add nuw nsw i64 %2, 1
br i1 %5, label %7, label %1
7: ; preds = %1
%8 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i64 %2)
ret i32 0
}
/* Type definitions */
typedef char *uint64_t;

/* Variables and functions */
uint64_t cpu_read_cr1() {
  uint64_t ret = 0;
  __asm__ __volatile__("movq %%"
                       "cr1"
                       ", %0"
                       : "=r"(ret));
  return (ret);
}


x86 assembly (clang, -O0):
<cpu_read_cr1>:
push   %rbp
mov    %rsp,%rbp
movq   $0x0,-0x8(%rbp)
mov    %cr1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_read_cr1>:
mov    %cr1,%rax
ret

LLVM IR (-O0):
define i8* @cpu_read_cr1() {
%1 = alloca i8*
store i8* null, i8** %1
%2 = call i8* asm sideeffect "movq %cr1, $0", "=r,~{dirflag},~{fpsr},~{flags}"()
store i8* %2, i8** %1
%3 = load i8*, i8** %1
ret i8* %3
}

LLVM IR (-O2):
define i8* @cpu_read_cr1() {
%1 = tail call i8* asm sideeffect "movq %cr1, $0", "=r,~{dirflag},~{fpsr},~{flags}"()
ret i8* %1
}
double SepPenalty(int ival, int itarget) {
  double fval;
  if (!itarget)
    return (0);
  fval = (double)ival / (double)itarget;
  if (!ival)
    fval = 1.0 / (double)itarget;
  return (1 / (7 * fval + 0.2) - (1 / 7.2));
}


x86 assembly (clang, -O0):
<SepPenalty>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    1121 <SepPenalty+0x21>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    118e <SepPenalty+0x8e>
cvtsi2sdl -0xc(%rbp),%xmm0
cvtsi2sdl -0x10(%rbp),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1154 <SepPenalty+0x54>
cvtsi2sdl -0x10(%rbp),%xmm1
movsd  0xeb5(%rip),%xmm0
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm1
movsd  0xeaf(%rip),%xmm0
mulsd  %xmm0,%xmm1
movsd  0xeab(%rip),%xmm0
addsd  %xmm0,%xmm1
movsd  0xe87(%rip),%xmm0
divsd  %xmm1,%xmm0
movsd  0xe83(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<SepPenalty>:
test   %esi,%esi
je     1140 <SepPenalty+0x40>
cvtsi2sd %esi,%xmm2
movsd  0xef0(%rip),%xmm0
movapd %xmm0,%xmm1
test   %edi,%edi
je     111f <SepPenalty+0x1f>
xorps  %xmm1,%xmm1
cvtsi2sd %edi,%xmm1
divsd  %xmm2,%xmm1
mulsd  0xedd(%rip),%xmm1
addsd  0xedd(%rip),%xmm1
divsd  %xmm1,%xmm0
addsd  0xed9(%rip),%xmm0
ret
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @SepPenalty(i32 %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
%5 = alloca i32
%6 = alloca double
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %5
%8 = icmp ne i32 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %2
store double 0.000000e+00, double* %3
br label %27
10: ; preds = %2
%11 = load i32, i32* %4
%12 = sitofp i32 %11 to double
%13 = load i32, i32* %5
%14 = sitofp i32 %13 to double
%15 = fdiv double %12, %14
store double %15, double* %6
%16 = load i32, i32* %4
%17 = icmp ne i32 %16, 0
br i1 %17, label %22, label %18
18: ; preds = %10
%19 = load i32, i32* %5
%20 = sitofp i32 %19 to double
%21 = fdiv double 1.000000e+00, %20
store double %21, double* %6
br label %22
22: ; preds = %18, %10
%23 = load double, double* %6
%24 = call double @llvm.fmuladd.f64(double 7.000000e+00, double %23, double 2.000000e-01)
%25 = fdiv double 1.000000e+00, %24
%26 = fsub double %25, 0x3FC1C71C71C71C72
store double %26, double* %3
br label %27
27: ; preds = %22, %9
%28 = load double, double* %3
ret double %28
}

LLVM IR (-O2):
define double @SepPenalty(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %13, label %4
4: ; preds = %2
%5 = sitofp i32 %0 to double
%6 = sitofp i32 %1 to double
%7 = icmp eq i32 %0, 0
%8 = select i1 %7, double 1.000000e+00, double %5
%9 = fdiv double %8, %6
%10 = tail call double @llvm.fmuladd.f64(double %9, double 7.000000e+00, double 2.000000e-01)
%11 = fdiv double 1.000000e+00, %10
%12 = fadd double %11, 0xBFC1C71C71C71C72
br label %13
13: ; preds = %2, %4
%14 = phi double [ %12, %4 ], [ 0.000000e+00, %2 ]
ret double %14
}
/* Variables and functions */
int /*<<< orphan*/ srand(unsigned int);
scalar_t__ time(int /*<<< orphan*/ *);
void initialize_number_generator(void) { srand((unsigned)time(NULL)); }


x86 assembly (clang, -O0):
<initialize_number_generator>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_number_generator>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @initialize_number_generator() {
%1 = call i64 @time(i32* null)
%2 = trunc i64 %1 to i32
%3 = call i32 @srand(i32 %2)
ret void
}

LLVM IR (-O2):
define void @initialize_number_generator() {
%1 = tail call i64 @time(i32* null)
%2 = trunc i64 %1 to i32
%3 = tail call i32 @srand(i32 %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ pifacedigital_read_bit(int /*<<< orphan*/, int,
                                          int /*<<< orphan*/);
uint8_t pifacedigital_digital_read(uint8_t pin_num) {
  return pifacedigital_read_bit(pin_num, 0x13, 0);
}


x86 assembly (clang, -O0):
<pifacedigital_digital_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x13,%esi
xor    %edx,%edx
call   1030 <pifacedigital_read_bit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pifacedigital_digital_read>:
mov    $0x13,%esi
xor    %edx,%edx
jmp    1030 <pifacedigital_read_bit@plt>

LLVM IR (-O0):
define i32 @pifacedigital_digital_read(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @pifacedigital_read_bit(i32 %3, i32 19, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @pifacedigital_digital_read(i32 %0) {
%2 = tail call i32 @pifacedigital_read_bit(i32 %0, i32 19, i32 0)
ret i32 %2
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void SET_COMM_ALIGN(uint16_t *n_desc, uint8_t align) {
  *n_desc = ((*n_desc & 0xf0ffu) | ((align & 0x0fu) << 8u));
}


x86 assembly (clang, -O0):
<SET_COMM_ALIGN>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
and    $0xf0ff,%ecx
mov    -0xc(%rbp),%eax
and    $0xf,%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SET_COMM_ALIGN>:
mov    $0xf0ff,%eax
and    (%rdi),%eax
and    $0xf,%esi
shl    $0x8,%esi
or     %eax,%esi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @SET_COMM_ALIGN(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = and i32 %6, 61695
%8 = load i32, i32* %4
%9 = and i32 %8, 15
%10 = shl i32 %9, 8
%11 = or i32 %7, %10
%12 = load i32*, i32** %3
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @SET_COMM_ALIGN(i32* nocapture %0, i32 %1) {
%3 = load i32, i32* %0
%4 = and i32 %3, 61695
%5 = shl i32 %1, 8
%6 = and i32 %5, 3840
%7 = or i32 %4, %6
store i32 %7, i32* %0
ret void
}
/* Variables and functions */
double sin(double);
double EDcos(double x) { return (-sin(x)); }


x86 assembly (clang, -O0):
<EDcos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <sin@plt>
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EDcos>:
push   %rax
call   1030 <sin@plt>
xorps  0xee3(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @EDcos(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @sin(double %3)
%5 = fneg double %4
ret double %5
}

LLVM IR (-O2):
define double @EDcos(double %0) {
%2 = tail call double @sin(double %0)
%3 = fneg double %2
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ foo();
int main(int argc, char **argv) {
  int a;
#pragma omp target data
  {}
L1:
  foo();
#pragma omp target data map(a) allocate(a)
  {
    foo();
    goto L1;
  }
  goto L2;
#pragma omp target data map(a)
L2:
  foo();
#pragma omp target data map(a)(i)
  { foo(); }
#pragma omp target unknown
  { foo(); }
#pragma omp target data map(delete : a)
  { foo(); }
#pragma omp target data map(release : a)
  { foo(); }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
jmp    1126 <main+0x16>

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
call   1030 <foo@plt>
jmp    1120 <main+0x10>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
br label %7
7: ; preds = %7, %2
%8 = call i32 (...) @foo()
%9 = call i32 (...) @foo()
br label %7
10: ; No predecessors!
%11 = call i32 (...) @foo()
%12 = call i32 (...) @foo()
%13 = call i32 (...) @foo()
%14 = call i32 (...) @foo()
%15 = call i32 (...) @foo()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
br label %3
3: ; preds = %3, %2
%4 = tail call i32 (...) @foo()
%5 = tail call i32 (...) @foo()
br label %3
}
/* Variables and functions */
int ceil(float);
int get_neg_interval(float z, float dz) {
  int interval = ceil(z / dz);
  return interval;
}


x86 assembly (clang, -O0):
<get_neg_interval>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
divss  -0x8(%rbp),%xmm0
call   1030 <ceil@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_neg_interval>:
divss  %xmm1,%xmm0
jmp    1030 <ceil@plt>

LLVM IR (-O0):
define i32 @get_neg_interval(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca i32
store float %0, float* %3
store float %1, float* %4
%6 = load float, float* %3
%7 = load float, float* %4
%8 = fdiv float %6, %7
%9 = call i32 @ceil(float %8)
store i32 %9, i32* %5
%10 = load i32, i32* %5
ret i32 %10
}

LLVM IR (-O2):
define i32 @get_neg_interval(float %0, float %1) {
%3 = fdiv float %0, %1
%4 = tail call i32 @ceil(float %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ outbyte(char);
void outextended() { outbyte('>'); }


x86 assembly (clang, -O0):
<outextended>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3e,%edi
call   1030 <outbyte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<outextended>:
mov    $0x3e,%edi
jmp    1030 <outbyte@plt>

LLVM IR (-O0):
define void @outextended() {
%1 = call i32 @outbyte(i8 signext 62)
ret void
}

LLVM IR (-O2):
define void @outextended() {
%1 = tail call i32 @outbyte(i8 signext 62)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ rotr(int *, int *, int *);
int main() {
  int *z = 0;
  int *x = 0;
  int *y = 0;
  rotr(z, x, y);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <rotr@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
call   1030 <rotr@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca i32*
store i32 0, i32* %1
store i32* null, i32** %2
store i32* null, i32** %3
store i32* null, i32** %4
%5 = load i32*, i32** %2
%6 = load i32*, i32** %3
%7 = load i32*, i32** %4
%8 = call i32 @rotr(i32* %5, i32* %6, i32* %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @rotr(i32* null, i32* null, i32* null)
ret i32 0
}