xunge/DecIR huggingface dataset:
void kernel(unsigned int ebx) {
  init();
  initMemPage();
  asm volatile("int $31");
}


x86 assembly (clang, -O0):
<kernel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <init@plt>
mov    $0x0,%al
call   1040 <initMemPage@plt>
int    $0x1f
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kernel>:
push   %rax
xor    %eax,%eax
call   1030 <init@plt>
xor    %eax,%eax
call   1040 <initMemPage@plt>
int    $0x1f
pop    %rax
ret

LLVM IR (-O0):
define void @kernel(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @init()
%4 = call i32 (...) @initMemPage()
ret void
}

LLVM IR (-O2):
define void @kernel(i32 %0) {
%2 = tail call i32 (...) @init()
%3 = tail call i32 (...) @initMemPage()
tail call void asm sideeffect "int $$31", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
char *version();
main() { printf("\nEXTCALL version info: %s\n", version()); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <version@plt>
mov    %rax,%rsi
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <version@plt>
lea    0xed1(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"\0AEXTCALL version info: %s\0A\00"
define i32 @main() {
%1 = call i8* (...) @version()
%2 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %1)
ret i32 0
}

LLVM IR (-O2):
@.str = [27 x i8] c"\0AEXTCALL version info: %s\0A\00"
define i32 @main() {
%1 = tail call i8* (...) @version()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %1)
ret i32 0
}
float flat(float x) { return 1.0; }


x86 assembly (clang, -O0):
<flat>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<flat>:
movss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @flat(float %0) {
%2 = alloca float
store float %0, float* %2
ret float 1.000000e+00
}

LLVM IR (-O2):
define float @flat(float %0) {
ret float 1.000000e+00
}
/* Type definitions */
struct _stor_fcreate_rsp {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ osapi_free(struct _stor_fcreate_rsp *);
void stor_fcreate_rsp_free(struct _stor_fcreate_rsp *ptr) { osapi_free(ptr); }


x86 assembly (clang, -O0):
<stor_fcreate_rsp_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <osapi_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stor_fcreate_rsp_free>:
jmp    1030 <osapi_free@plt>

LLVM IR (-O0):
%struct._stor_fcreate_rsp = type { i32 }
define void @stor_fcreate_rsp_free(%struct._stor_fcreate_rsp* %0) {
%2 = alloca %struct._stor_fcreate_rsp*
store %struct._stor_fcreate_rsp* %0, %struct._stor_fcreate_rsp** %2
%3 = load %struct._stor_fcreate_rsp*, %struct._stor_fcreate_rsp** %2
%4 = call i32 @osapi_free(%struct._stor_fcreate_rsp* %3)
ret void
}

LLVM IR (-O2):
%struct._stor_fcreate_rsp = type { i32 }
define void @stor_fcreate_rsp_free(%struct._stor_fcreate_rsp* %0) {
%2 = tail call i32 @osapi_free(%struct._stor_fcreate_rsp* %0)
ret void
}
int l4x_cpu_cpu_get(void) { return 0; }


x86 assembly (clang, -O0):
<l4x_cpu_cpu_get>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<l4x_cpu_cpu_get>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @l4x_cpu_cpu_get() {
ret i32 0
}

LLVM IR (-O2):
define i32 @l4x_cpu_cpu_get() {
ret i32 0
}
/* Variables and functions */
bool space(char c) { return (c == ' ') || (c == '\t') || (c == '\n'); }


x86 assembly (clang, -O0):
<space>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x2(%rbp)
je     113b <space+0x3b>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x9,%ecx
mov    %al,-0x2(%rbp)
je     113b <space+0x3b>
movsbl -0x1(%rbp),%eax
cmp    $0xa,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<space>:
mov    $0x1,%eax
cmp    $0x9,%dil
je     1111 <space+0x11>
cmp    $0x20,%dil
jne    1112 <space+0x12>
ret
xor    %eax,%eax
cmp    $0xa,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @space(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 32
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 9
br i1 %9, label %14, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 10
br label %14
14: ; preds = %10, %6, %1
%15 = phi i1 [ true, %6 ], [ true, %1 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @space(i8 signext %0) {
switch i8 %0, label %2 [
i8 32, label %5
i8 9, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 10
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ]
ret i32 %6
}
void SysCtlADCSpeedSet(unsigned long ulSpeed) {

  ;
  ;
  (*((volatile unsigned long *)(0x400FE100))) =
      (((*((volatile unsigned long *)(0x400FE100))) & ~(0x00000F00)) | ulSpeed);
  (*((volatile unsigned long *)(0x400FE110))) =
      (((*((volatile unsigned long *)(0x400FE110))) & ~(0x00000F00)) | ulSpeed);
}


x86 assembly (clang, -O0):
<SysCtlADCSpeedSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x400fe100,%eax
mov    (%rax),%rcx
and    $0xfffffffffffff0ff,%rcx
or     -0x8(%rbp),%rcx
mov    $0x400fe100,%eax
mov    %rcx,(%rax)
mov    $0x400fe110,%eax
mov    (%rax),%rcx
and    $0xfffffffffffff0ff,%rcx
or     -0x8(%rbp),%rcx
mov    $0x400fe110,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlADCSpeedSet>:
mov    $0xfffffffffffff0ff,%rax
mov    0x400fe100,%rcx
40
and    %rax,%rcx
or     %rdi,%rcx
mov    %rcx,0x400fe100
40
and    0x400fe110,%rax
40
or     %rdi,%rax
mov    %rax,0x400fe110
40
ret

LLVM IR (-O0):
define void @SysCtlADCSpeedSet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load volatile i64, i64* inttoptr (i64 1074782464 to i64*)
%4 = and i64 %3, -3841
%5 = load i64, i64* %2
%6 = or i64 %4, %5
store volatile i64 %6, i64* inttoptr (i64 1074782464 to i64*)
%7 = load volatile i64, i64* inttoptr (i64 1074782480 to i64*)
%8 = and i64 %7, -3841
%9 = load i64, i64* %2
%10 = or i64 %8, %9
store volatile i64 %10, i64* inttoptr (i64 1074782480 to i64*)
ret void
}

LLVM IR (-O2):
define void @SysCtlADCSpeedSet(i64 %0) {
%2 = load volatile i64, i64* inttoptr (i64 1074782464 to i64*)
%3 = and i64 %2, -3841
%4 = or i64 %3, %0
store volatile i64 %4, i64* inttoptr (i64 1074782464 to i64*)
%5 = load volatile i64, i64* inttoptr (i64 1074782480 to i64*)
%6 = and i64 %5, -3841
%7 = or i64 %6, %0
store volatile i64 %7, i64* inttoptr (i64 1074782480 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
scalar_t__ decode(int, int, int);
scalar_t__ decode2(int, int, int);
int main(int argc, char *argv[]) {
  assert(decode(1, 2, 3) == decode2(1, 2, 3));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
call   1050 <decode@plt>
mov    %rax,-0x18(%rbp)
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
call   1040 <decode2@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
call   1050 <decode@plt>
mov    %rax,%rbx
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
call   1040 <decode2@plt>
xor    %edi,%edi
cmp    %rax,%rbx
sete   %dil
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i64 @decode(i32 1, i32 2, i32 3)
%7 = call i64 @decode2(i32 1, i32 2, i32 3)
%8 = icmp eq i64 %6, %7
%9 = zext i1 %8 to i32
%10 = call i32 @assert(i32 %9)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 @decode(i32 1, i32 2, i32 3)
%4 = tail call i64 @decode2(i32 1, i32 2, i32 3)
%5 = icmp eq i64 %3, %4
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
ret i32 0
}
short _EndianSwapSignedShort(short s) {
  unsigned char b1, b2;
  b1 = s & 255;
  b2 = (s >> 8) & 255;
  return (b1 << 8) + b2;
}


x86 assembly (clang, -O0):
<_EndianSwapSignedShort>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
and    $0xff,%eax
mov    %al,-0x3(%rbp)
movswl -0x2(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    %al,-0x4(%rbp)
movzbl -0x3(%rbp),%eax
shl    $0x8,%eax
movzbl -0x4(%rbp),%ecx
add    %ecx,%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<_EndianSwapSignedShort>:
mov    %edi,%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define signext i16 @_EndianSwapSignedShort(i16 signext %0) {
%2 = alloca i16
%3 = alloca i8
%4 = alloca i8
store i16 %0, i16* %2
%5 = load i16, i16* %2
%6 = sext i16 %5 to i32
%7 = and i32 %6, 255
%8 = trunc i32 %7 to i8
store i8 %8, i8* %3
%9 = load i16, i16* %2
%10 = sext i16 %9 to i32
%11 = ashr i32 %10, 8
%12 = and i32 %11, 255
%13 = trunc i32 %12 to i8
store i8 %13, i8* %4
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = shl i32 %15, 8
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = add nsw i32 %16, %18
%20 = trunc i32 %19 to i16
ret i16 %20
}

LLVM IR (-O2):
define signext i16 @_EndianSwapSignedShort(i16 signext %0) {
%2 = tail call i16 @llvm.bswap.i16(i16 %0)
ret i16 %2
}
void dWidOnOff(on_off) int on_off;
{
  p1('\033');
  p1('W');
  p1(!!on_off);
}


x86 assembly (clang, -O0):
<dWidOnOff>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1b,%edi
mov    $0x0,%al
call   1030 <p1@plt>
mov    $0x57,%edi
mov    $0x0,%al
call   1030 <p1@plt>
cmpl   $0x0,-0x4(%rbp)
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
mov    $0x0,%al
call   1030 <p1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dWidOnOff>:
push   %rbx
mov    %edi,%ebx
mov    $0x1b,%edi
xor    %eax,%eax
call   1030 <p1@plt>
mov    $0x57,%edi
xor    %eax,%eax
call   1030 <p1@plt>
xor    %edi,%edi
test   %ebx,%ebx
setne  %dil
xor    %eax,%eax
pop    %rbx
jmp    1030 <p1@plt>

LLVM IR (-O0):
define void @dWidOnOff(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (i32, ...) bitcast (i32 (...)* @p1 to i32 (i32, ...)*)(i32 27)
%4 = call i32 (i32, ...) bitcast (i32 (...)* @p1 to i32 (i32, ...)*)(i32 87)
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
%8 = xor i1 %7, true
%9 = zext i1 %8 to i32
%10 = call i32 (i32, ...) bitcast (i32 (...)* @p1 to i32 (i32, ...)*)(i32 %9)
ret void
}

LLVM IR (-O2):
define void @dWidOnOff(i32 %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @p1 to i32 (i32, ...)*)(i32 27)
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @p1 to i32 (i32, ...)*)(i32 87)
%4 = icmp ne i32 %0, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 (i32, ...) bitcast (i32 (...)* @p1 to i32 (i32, ...)*)(i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sgn(long const);
long lmodPos(long int const n, long int const b) {
  return (sgn(n % b) != -sgn(b)) ? n % b : n % b + b;
}


x86 assembly (clang, -O0):
<lmodPos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cqto
idivq  -0x10(%rbp)
mov    %rdx,%rdi
call   1030 <sgn@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <sgn@plt>
mov    %eax,%edx
mov    -0x14(%rbp),%eax
xor    %ecx,%ecx
sub    %edx,%ecx
cmp    %ecx,%eax
je     1162 <lmodPos+0x52>
mov    -0x8(%rbp),%rax
cqto
idivq  -0x10(%rbp)
mov    %rdx,-0x20(%rbp)
jmp    1177 <lmodPos+0x67>
mov    -0x8(%rbp),%rax
cqto
idivq  -0x10(%rbp)
mov    %rdx,%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lmodPos>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%rax
mov    %rdi,%rcx
or     %rsi,%rcx
shr    $0x20,%rcx
je     1130 <lmodPos+0x20>
cqto
idiv   %rbx
mov    %rdx,%r14
jmp    1137 <lmodPos+0x27>
xor    %edx,%edx
div    %ebx
mov    %edx,%r14d
mov    %r14,%rdi
call   1030 <sgn@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <sgn@plt>
xor    %ecx,%ecx
add    %ebp,%eax
cmove  %rbx,%rcx
add    %r14,%rcx
mov    %rcx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i64 @lmodPos(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = srem i64 %5, %6
%8 = call i32 @sgn(i64 %7)
%9 = load i64, i64* %4
%10 = call i32 @sgn(i64 %9)
%11 = sub nsw i32 0, %10
%12 = icmp ne i32 %8, %11
br i1 %12, label %13, label %17
13: ; preds = %2
%14 = load i64, i64* %3
%15 = load i64, i64* %4
%16 = srem i64 %14, %15
br label %23
17: ; preds = %2
%18 = load i64, i64* %3
%19 = load i64, i64* %4
%20 = srem i64 %18, %19
%21 = load i64, i64* %4
%22 = add nsw i64 %20, %21
br label %23
23: ; preds = %17, %13
%24 = phi i64 [ %16, %13 ], [ %22, %17 ]
ret i64 %24
}

LLVM IR (-O2):
define i64 @lmodPos(i64 %0, i64 %1) {
%3 = srem i64 %0, %1
%4 = tail call i32 @sgn(i64 %3)
%5 = tail call i32 @sgn(i64 %1)
%6 = sub nsw i32 0, %5
%7 = icmp eq i32 %4, %6
%8 = select i1 %7, i64 %1, i64 0
%9 = add nsw i64 %8, %3
ret i64 %9
}
int test9(int x) { return x / 10 > 2; }


x86 assembly (clang, -O0):
<test9>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
cmp    $0x2,%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test9>:
xor    %eax,%eax
cmp    $0x1e,%edi
setge  %al
ret

LLVM IR (-O0):
define i32 @test9(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, 10
%5 = icmp sgt i32 %4, 2
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @test9(i32 %0) {
%2 = icmp sgt i32 %0, 29
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int strToInt(char string[]);
  printf("%i\n", strToInt("-245"));
  printf("%i\n", strToInt("100") + 25);
  printf("%i\n", strToInt("13x5"));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1030 <strToInt@plt>
mov    %eax,%esi
lea    0xebc(%rip),%rdi
call   1040 <printf@plt>
lea    0xeb9(%rip),%rdi
call   1030 <strToInt@plt>
mov    %eax,%esi
add    $0x19,%esi
lea    0xe9f(%rip),%rdi
call   1040 <printf@plt>
lea    0xea0(%rip),%rdi
call   1030 <strToInt@plt>
mov    %eax,%esi
lea    0xe85(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xedc(%rip),%rdi
call   1030 <strToInt@plt>
lea    0xecc(%rip),%rbx
mov    %rbx,%rdi
mov    %eax,%esi
call   1040 <printf@plt>
lea    0xec4(%rip),%rdi
call   1030 <strToInt@plt>
lea    0x19(%rax),%esi
mov    %rbx,%rdi
call   1040 <printf@plt>
lea    0xeb1(%rip),%rdi
call   1030 <strToInt@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%i\0A\00"
@.str.1 = [5 x i8] c"-245\00"
@.str.2 = [4 x i8] c"100\00"
@.str.3 = [5 x i8] c"13x5\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @strToInt(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = call i32 @strToInt(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0))
%5 = add nsw i32 %4, 25
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = call i32 @strToInt(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.3, i64 0, i64 0))
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%i\0A\00"
@.str.1 = [5 x i8] c"-245\00"
@.str.2 = [4 x i8] c"100\00"
@.str.3 = [5 x i8] c"13x5\00"
define i32 @main() {
%1 = tail call i32 @strToInt(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @strToInt(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0))
%4 = add nsw i32 %3, 25
%5 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = tail call i32 @strToInt(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.3, i64 0, i64 0))
%7 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}
char *skip_nonspaces(char *s) {
  while (*s && !(*s == ' ' || *s == '\t'))
    s++;
  return s;
}


x86 assembly (clang, -O0):
<skip_nonspaces>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
je     114a <skip_nonspaces+0x4a>
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0xa(%rbp)
je     1142 <skip_nonspaces+0x42>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x9,%eax
sete   %al
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%al
xor    $0xff,%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    115a <skip_nonspaces+0x5a>
jmp    116b <skip_nonspaces+0x6b>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <skip_nonspaces+0x8>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_nonspaces>:
mov    %rdi,%rax
movabs $0x100000201,%rcx
jmp    1114 <skip_nonspaces+0x14>
nop
add    $0x1,%rax
movzbl (%rax),%edx
cmp    $0x20,%rdx
ja     1110 <skip_nonspaces+0x10>
bt     %rdx,%rcx
jae    1110 <skip_nonspaces+0x10>
ret

LLVM IR (-O0):
define i8* @skip_nonspaces(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %23, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %21
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 32
br i1 %12, label %18, label %13
13: ; preds = %8
%14 = load i8*, i8** %2
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 9
br label %18
18: ; preds = %13, %8
%19 = phi i1 [ true, %8 ], [ %17, %13 ]
%20 = xor i1 %19, true
br label %21
21: ; preds = %18, %3
%22 = phi i1 [ false, %3 ], [ %20, %18 ]
br i1 %22, label %23, label %26
23: ; preds = %21
%24 = load i8*, i8** %2
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %2
br label %3
26: ; preds = %21
%27 = load i8*, i8** %2
ret i8* %27
}

LLVM IR (-O2):
define i8* @skip_nonspaces(i8* %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i8* [ %0, %1 ], [ %6, %5 ]
%4 = load i8, i8* %3
switch i8 %4, label %5 [
i8 0, label %7
i8 32, label %7
i8 9, label %7
]
5: ; preds = %2
%6 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
7: ; preds = %2, %2, %2
ret i8* %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ SSL;

/* Variables and functions */
int SSL_read(int /*<<< orphan*/ *, int /*<<< orphan*/ *, int);
int handle_ssl_error(int /*<<< orphan*/ *, int);
int safe_ssl_read(SSL *ssl, uint8_t *buf, int bufsize) {
  int ret;
  ret = SSL_read(ssl, buf, bufsize);
  if (ret > 0)
    return ret;
  return handle_ssl_error(ssl, ret);
}


x86 assembly (clang, -O0):
<safe_ssl_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1040 <SSL_read@plt>
mov    %eax,-0x20(%rbp)
cmpl   $0x0,-0x20(%rbp)
jle    115b <safe_ssl_read+0x3b>
mov    -0x20(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    116a <safe_ssl_read+0x4a>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%esi
call   1030 <handle_ssl_error@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_ssl_read>:
push   %rbx
mov    %rdi,%rbx
call   1040 <SSL_read@plt>
test   %eax,%eax
jle    112f <safe_ssl_read+0xf>
pop    %rbx
ret
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1030 <handle_ssl_error@plt>

LLVM IR (-O0):
define i32 @safe_ssl_read(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
%9 = load i32*, i32** %5
%10 = load i32*, i32** %6
%11 = load i32, i32* %7
%12 = call i32 @SSL_read(i32* %9, i32* %10, i32 %11)
store i32 %12, i32* %8
%13 = load i32, i32* %8
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %3
%16 = load i32, i32* %8
store i32 %16, i32* %4
br label %21
17: ; preds = %3
%18 = load i32*, i32** %5
%19 = load i32, i32* %8
%20 = call i32 @handle_ssl_error(i32* %18, i32 %19)
store i32 %20, i32* %4
br label %21
21: ; preds = %17, %15
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @safe_ssl_read(i32* %0, i32* %1, i32 %2) {
%4 = tail call i32 @SSL_read(i32* %0, i32* %1, i32 %2)
%5 = icmp sgt i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @handle_ssl_error(i32* %0, i32 %4)
br label %8
8: ; preds = %3, %6
%9 = phi i32 [ %7, %6 ], [ %4, %3 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ cSnake();
int main(int argc, char **argv) {
  cSnake();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <cSnake@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <cSnake@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @cSnake()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @cSnake()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_ioline_puts() {
  printf("NOT IMPLEMENTED:"
         "pa_ioline_puts"
         "\n");
}


x86 assembly (clang, -O0):
<pa_ioline_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_ioline_puts>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"NOT IMPLEMENTED:pa_ioline_puts\0A\00"
define i32 @pa_ioline_puts() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [31 x i8] c"NOT IMPLEMENTED:pa_ioline_puts\00"
define i32 @pa_ioline_puts() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
void *warn_malloc_3_5(const char *s, unsigned n) {
  if (n < 3 || 5 < n)
    n = 3;
  char *p = (char *)malloc(n);
  strncpy(p + 1, s, 5);
  return p;
}


x86 assembly (clang, -O0):
<warn_malloc_3_5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x3,-0xc(%rbp)
jb     1147 <warn_malloc_3_5+0x27>
mov    $0x5,%eax
cmp    -0xc(%rbp),%eax
jae    114e <warn_malloc_3_5+0x2e>
movl   $0x3,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
add    $0x1,%rdi
mov    -0x8(%rbp),%rsi
mov    $0x5,%edx
call   1030 <strncpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<warn_malloc_3_5>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
lea    -0x6(%rsi),%eax
cmp    $0xfffffffd,%eax
mov    $0x3,%edi
cmovae %esi,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
lea    0x1(%rax),%rdi
mov    $0x5,%edx
mov    %r14,%rsi
call   1030 <strncpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @warn_malloc_3_5(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp ult i32 %6, 3
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i32, i32* %4
%10 = icmp ult i32 5, %9
br i1 %10, label %11, label %12
11: ; preds = %8, %2
store i32 3, i32* %4
br label %12
12: ; preds = %11, %8
%13 = load i32, i32* %4
%14 = zext i32 %13 to i64
%15 = call i8* @malloc(i64 %14)
store i8* %15, i8** %5
%16 = load i8*, i8** %5
%17 = getelementptr inbounds i8, i8* %16, i64 1
%18 = load i8*, i8** %3
%19 = call i8* @strncpy(i8* %17, i8* %18, i64 5)
%20 = load i8*, i8** %5
ret i8* %20
}

LLVM IR (-O2):
define i8* @warn_malloc_3_5(i8* nocapture %0, i32 %1) {
%3 = add i32 %1, -6
%4 = icmp ult i32 %3, -3
%5 = select i1 %4, i32 3, i32 %1
%6 = zext i32 %5 to i64
%7 = tail call i8* @malloc(i64 %6)
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = tail call i8* @strncpy(i8* %8, i8* dereferenceable(1) %0, i64 5)
ret i8* %7
}
int test_imm_C3int8_mem(signed char *val) {
  return ((*val) & (0xC3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C3int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xc3,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C3int8_mem>:
testb  $0xc3,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C3int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 195
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C3int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -61
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ getoptions();
int /*<<< orphan*/ inputnumbers();
int /*<<< orphan*/ transition();
void doinit() {
  inputnumbers();
  getoptions();
  transition();
}


x86 assembly (clang, -O0):
<doinit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <inputnumbers@plt>
mov    $0x0,%al
call   1030 <getoptions@plt>
mov    $0x0,%al
call   1040 <transition@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<doinit>:
push   %rax
xor    %eax,%eax
call   1050 <inputnumbers@plt>
xor    %eax,%eax
call   1030 <getoptions@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <transition@plt>

LLVM IR (-O0):
define void @doinit() {
%1 = call i32 (...) @inputnumbers()
%2 = call i32 (...) @getoptions()
%3 = call i32 (...) @transition()
ret void
}

LLVM IR (-O2):
define void @doinit() {
%1 = tail call i32 (...) @inputnumbers()
%2 = tail call i32 (...) @getoptions()
%3 = tail call i32 (...) @transition()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, char *, char const *);
void printVersion() {
  const char *messageVersion = "\nGenRandom v. ";
  const char *messageAuthorLisc =
      "Copyright 2013, Jonathan Hyry\nLicensed under GNU General Public "
      "License (GPL) v. 3\n\n";
  printf("%s%s\n%s", messageVersion, "0.0.8", messageAuthorLisc);
}


x86 assembly (clang, -O0):
<printVersion>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xee5(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rcx
lea    0xf27(%rip),%rdi
lea    0xf28(%rip),%rdx
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printVersion>:
lea    0xf4d(%rip),%rdi
lea    0xee2(%rip),%rsi
lea    0xf47(%rip),%rdx
lea    0xee3(%rip),%rcx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"\0AGenRandom v. \00"
@.str.1 = [85 x i8] c"Copyright 2013, Jonathan Hyry\0ALicensed under GNU General Public License (GPL) v. 3\0A\0A\00"
@.str.2 = [8 x i8] c"%s%s\0A%s\00"
@.str.3 = [6 x i8] c"0.0.8\00"
define void @printVersion() {
%1 = alloca i8*
%2 = alloca i8*
store i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8** %1
store i8* getelementptr inbounds ([85 x i8], [85 x i8]* @.str.1, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %1
%4 = load i8*, i8** %2
%5 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), i8* %3, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.3, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"\0AGenRandom v. \00"
@.str.1 = [85 x i8] c"Copyright 2013, Jonathan Hyry\0ALicensed under GNU General Public License (GPL) v. 3\0A\0A\00"
@.str.2 = [8 x i8] c"%s%s\0A%s\00"
@.str.3 = [6 x i8] c"0.0.8\00"
define void @printVersion() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.3, i64 0, i64 0), i8* getelementptr inbounds ([85 x i8], [85 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ndsctl_action(char *, char *, char *);
void ndsctl_username(void) {
  ndsctl_action("username", "Username set to %s.\n",
                "Failed to set username to %s.\n");
}


x86 assembly (clang, -O0):
<ndsctl_username>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee7(%rip),%rsi
lea    0xef5(%rip),%rdx
call   1030 <ndsctl_action@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ndsctl_username>:
lea    0xee9(%rip),%rdi
lea    0xeeb(%rip),%rsi
lea    0xef9(%rip),%rdx
jmp    1030 <ndsctl_action@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"username\00"
@.str.1 = [21 x i8] c"Username set to %s.\0A\00"
@.str.2 = [31 x i8] c"Failed to set username to %s.\0A\00"
define void @ndsctl_username() {
%1 = call i32 @ndsctl_action(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"username\00"
@.str.1 = [21 x i8] c"Username set to %s.\0A\00"
@.str.2 = [31 x i8] c"Failed to set username to %s.\0A\00"
define void @ndsctl_username() {
%1 = tail call i32 @ndsctl_action(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ puts(char *);
void menu(void) {
  puts("1. Cargar");
  puts("2. Punto 1.1");
  puts("3. Punto 1.2");
  puts("4. Punto 1.3");
  printf("5. Salir\n\nOpcion: ");
}


x86 assembly (clang, -O0):
<menu>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <puts@plt>
lea    0xed3(%rip),%rdi
call   1030 <puts@plt>
lea    0xed4(%rip),%rdi
call   1030 <puts@plt>
lea    0xed5(%rip),%rdi
call   1030 <puts@plt>
lea    0xed6(%rip),%rdi
call   1040 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<menu>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
lea    0xed6(%rip),%rdi
call   1030 <puts@plt>
lea    0xed7(%rip),%rdi
call   1030 <puts@plt>
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
lea    0xed9(%rip),%rdi
pop    %rax
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"1. Cargar\00"
@.str.1 = [13 x i8] c"2. Punto 1.1\00"
@.str.2 = [13 x i8] c"3. Punto 1.2\00"
@.str.3 = [13 x i8] c"4. Punto 1.3\00"
@.str.4 = [19 x i8] c"5. Salir\0A\0AOpcion: \00"
define void @menu() {
%1 = call i32 @puts(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @puts(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @puts(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @puts(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.3, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.4, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"1. Cargar\00"
@.str.1 = [13 x i8] c"2. Punto 1.1\00"
@.str.2 = [13 x i8] c"3. Punto 1.2\00"
@.str.3 = [13 x i8] c"4. Punto 1.3\00"
@.str.4 = [19 x i8] c"5. Salir\0A\0AOpcion: \00"
define void @menu() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str.3, i64 0, i64 0))
%5 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @.str.4, i64 0, i64 0))
ret void
}
int deltaFromtonSteps(int x1, int x2, int n) {
  if (x2 > x1) {
    return (((x2 - x1) + 16384) / (n + 1)) + 1;
  } else {
    if (x2 == x1) {
      return 0;
    }
    return 0 - ((((x1 - x2) + 16384) / (n + 1)) + 1);
  }
}


x86 assembly (clang, -O0):
<deltaFromtonSteps>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1138 <deltaFromtonSteps+0x38>
mov    -0xc(%rbp),%eax
sub    -0x8(%rbp),%eax
add    $0x4000,%eax
mov    -0x10(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1170 <deltaFromtonSteps+0x70>
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jne    1150 <deltaFromtonSteps+0x50>
movl   $0x0,-0x4(%rbp)
jmp    1170 <deltaFromtonSteps+0x70>
mov    -0x8(%rbp),%eax
sub    -0xc(%rbp),%eax
add    $0x4000,%eax
mov    -0x10(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
add    $0x1,%ecx
xor    %eax,%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<deltaFromtonSteps>:
mov    %edx,%ecx
mov    %esi,%eax
sub    %edi,%eax
jle    1117 <deltaFromtonSteps+0x17>
add    $0x4000,%eax
add    $0x1,%ecx
cltd
idiv   %ecx
add    $0x1,%eax
ret
xor    %eax,%eax
cmp    %edi,%esi
je     112f <deltaFromtonSteps+0x2f>
sub    %esi,%edi
add    $0x4000,%edi
add    $0x1,%ecx
mov    %edi,%eax
cltd
idiv   %ecx
not    %eax
ret

LLVM IR (-O0):
define i32 @deltaFromtonSteps(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = icmp sgt i32 %8, %9
br i1 %10, label %11, label %20
11: ; preds = %3
%12 = load i32, i32* %6
%13 = load i32, i32* %5
%14 = sub nsw i32 %12, %13
%15 = add nsw i32 %14, 16384
%16 = load i32, i32* %7
%17 = add nsw i32 %16, 1
%18 = sdiv i32 %15, %17
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %35
20: ; preds = %3
%21 = load i32, i32* %6
%22 = load i32, i32* %5
%23 = icmp eq i32 %21, %22
br i1 %23, label %24, label %25
24: ; preds = %20
store i32 0, i32* %4
br label %35
25: ; preds = %20
%26 = load i32, i32* %5
%27 = load i32, i32* %6
%28 = sub nsw i32 %26, %27
%29 = add nsw i32 %28, 16384
%30 = load i32, i32* %7
%31 = add nsw i32 %30, 1
%32 = sdiv i32 %29, %31
%33 = add nsw i32 %32, 1
%34 = sub nsw i32 0, %33
store i32 %34, i32* %4
br label %35
35: ; preds = %25, %24, %11
%36 = load i32, i32* %4
ret i32 %36
}

LLVM IR (-O2):
define i32 @deltaFromtonSteps(i32 %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %1, %0
br i1 %4, label %5, label %11
5: ; preds = %3
%6 = sub i32 16384, %0
%7 = add i32 %6, %1
%8 = add nsw i32 %2, 1
%9 = sdiv i32 %7, %8
%10 = add nsw i32 %9, 1
br label %19
11: ; preds = %3
%12 = icmp eq i32 %1, %0
br i1 %12, label %19, label %13
13: ; preds = %11
%14 = add i32 %0, 16384
%15 = sub i32 %14, %1
%16 = add nsw i32 %2, 1
%17 = sdiv i32 %15, %16
%18 = xor i32 %17, -1
br label %19
19: ; preds = %11, %13, %5
%20 = phi i32 [ %10, %5 ], [ %18, %13 ], [ 0, %11 ]
ret i32 %20
}
/* Type definitions */
struct lm {
  int dummy;
};
struct jsonElement {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ getStringLm(char *, int *, struct lm *);
struct jsonElement *newJsonStringLm(int /*<<< orphan*/, struct lm *);
struct jsonElement *jsonParseStringLm(char *str, int *posPtr, struct lm *lm) {
  return newJsonStringLm(getStringLm(str, posPtr, lm), lm);
}


x86 assembly (clang, -O0):
<jsonParseStringLm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <getStringLm@plt>
mov    %eax,%edi
mov    -0x18(%rbp),%rsi
call   1040 <newJsonStringLm@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jsonParseStringLm>:
push   %rbx
mov    %rdx,%rbx
call   1030 <getStringLm@plt>
mov    %eax,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <newJsonStringLm@plt>

LLVM IR (-O0):
%struct.jsonElement = type { i32 }
%struct.lm = type { i32 }
define %struct.jsonElement* @jsonParseStringLm(i8* %0, i32* %1, %struct.lm* %2) {
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca %struct.lm*
store i8* %0, i8** %4
store i32* %1, i32** %5
store %struct.lm* %2, %struct.lm** %6
%7 = load i8*, i8** %4
%8 = load i32*, i32** %5
%9 = load %struct.lm*, %struct.lm** %6
%10 = call i32 @getStringLm(i8* %7, i32* %8, %struct.lm* %9)
%11 = load %struct.lm*, %struct.lm** %6
%12 = call %struct.jsonElement* @newJsonStringLm(i32 %10, %struct.lm* %11)
ret %struct.jsonElement* %12
}

LLVM IR (-O2):
%struct.jsonElement = type { i32 }
%struct.lm = type { i32 }
define %struct.jsonElement* @jsonParseStringLm(i8* %0, i32* %1, %struct.lm* %2) {
%4 = tail call i32 @getStringLm(i8* %0, i32* %1, %struct.lm* %2)
%5 = tail call %struct.jsonElement* @newJsonStringLm(i32 %4, %struct.lm* %2)
ret %struct.jsonElement* %5
}
void cpuID(unsigned i, unsigned regs[4]) {
  asm volatile("cpuid"
               : "=a"(regs[0]), "=b"(regs[1]), "=c"(regs[2]), "=d"(regs[3])
               : "a"(i), "c"(0));
}


x86 assembly (clang, -O0):
<cpuID>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%r8
mov    -0x18(%rbp),%rdi
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0xc(%rbp),%eax
xor    %ecx,%ecx
cpuid
mov    %eax,%r9d
mov    -0x28(%rbp),%rax
mov    %ecx,%esi
mov    -0x20(%rbp),%rcx
mov    %r9d,(%r8)
mov    %ebx,0x4(%rdi)
mov    %esi,0x8(%rcx)
mov    %edx,0xc(%rax)
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuID>:
push   %rbx
mov    %edi,%eax
xor    %ecx,%ecx
cpuid
mov    %eax,(%rsi)
mov    %ebx,0x4(%rsi)
mov    %ecx,0x8(%rsi)
mov    %edx,0xc(%rsi)
pop    %rbx
ret

LLVM IR (-O0):
define void @cpuID(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = getelementptr inbounds i32, i32* %5, i64 0
%7 = load i32*, i32** %4
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32*, i32** %4
%10 = getelementptr inbounds i32, i32* %9, i64 2
%11 = load i32*, i32** %4
%12 = getelementptr inbounds i32, i32* %11, i64 3
%13 = load i32, i32* %3
%14 = call { i32, i32, i32, i32 } asm sideeffect "cpuid", "={ax},={bx},={cx},={dx},{ax},{cx},~{dirflag},~{fpsr},~{flags}"(i32 %13, i32 0)
%15 = extractvalue { i32, i32, i32, i32 } %14, 0
%16 = extractvalue { i32, i32, i32, i32 } %14, 1
%17 = extractvalue { i32, i32, i32, i32 } %14, 2
%18 = extractvalue { i32, i32, i32, i32 } %14, 3
store i32 %15, i32* %6
store i32 %16, i32* %8
store i32 %17, i32* %10
store i32 %18, i32* %12
ret void
}

LLVM IR (-O2):
define void @cpuID(i32 %0, i32* nocapture writeonly %1) {
%3 = getelementptr inbounds i32, i32* %1, i64 1
%4 = getelementptr inbounds i32, i32* %1, i64 2
%5 = getelementptr inbounds i32, i32* %1, i64 3
%6 = tail call { i32, i32, i32, i32 } asm sideeffect "cpuid", "={ax},={bx},={cx},={dx},{ax},{cx},~{dirflag},~{fpsr},~{flags}"(i32 %0, i32 0)
%7 = extractvalue { i32, i32, i32, i32 } %6, 0
%8 = extractvalue { i32, i32, i32, i32 } %6, 1
%9 = extractvalue { i32, i32, i32, i32 } %6, 2
%10 = extractvalue { i32, i32, i32, i32 } %6, 3
store i32 %7, i32* %1
store i32 %8, i32* %3
store i32 %9, i32* %4
store i32 %10, i32* %5
ret void
}
/* Variables and functions */
void __bsd_iconv_set_relocation_prefix(char const *, char const *);
void iconv_set_relocation_prefix_compat(const char *a, const char *b) {
  return __bsd_iconv_set_relocation_prefix(a, b);
}


x86 assembly (clang, -O0):
<iconv_set_relocation_prefix_compat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <__bsd_iconv_set_relocation_prefix@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iconv_set_relocation_prefix_compat>:
jmp    1030 <__bsd_iconv_set_relocation_prefix@plt>

LLVM IR (-O0):
define void @iconv_set_relocation_prefix_compat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
ret void
}

LLVM IR (-O2):
define void @iconv_set_relocation_prefix_compat(i8* %0, i8* %1) {
tail call void @__bsd_iconv_set_relocation_prefix(i8* %0, i8* %1)
ret void
}
/* Variables and functions */
const char *ffm_error(const char *e) {
  static const char *error = NULL;
  if (e)
    error = e;
  return error;
}


x86 assembly (clang, -O0):
<ffm_error>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     111e <ffm_error+0x1e>
mov    -0x8(%rbp),%rax
mov    %rax,0x2f0a(%rip)
mov    0x2f03(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffm_error>:
test   %rdi,%rdi
je     1110 <ffm_error+0x10>
mov    %rdi,%rax
mov    %rdi,0x2f19(%rip)
ret
mov    0x2f11(%rip),%rax
ret

LLVM IR (-O0):
@ffm_error.error = internal global i8* null
define i8* @ffm_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i8*, i8** %2
store i8* %6, i8** @ffm_error.error
br label %7
7: ; preds = %5, %1
%8 = load i8*, i8** @ffm_error.error
ret i8* %8
}

LLVM IR (-O2):
@ffm_error.error = internal unnamed_addr global i8* null
define i8* @ffm_error(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = load i8*, i8** @ffm_error.error
br label %6
5: ; preds = %1
store i8* %0, i8** @ffm_error.error
br label %6
6: ; preds = %3, %5
%7 = phi i8* [ %4, %3 ], [ %0, %5 ]
ret i8* %7
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void w32be(uint8_t *buf, uint32_t v) {
  buf[0] = v >> 24;
  buf[1] = v >> 16;
  buf[2] = v >> 8;
  buf[3] = v;
}


x86 assembly (clang, -O0):
<w32be>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
sar    $0x18,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x10,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<w32be>:
mov    %esi,%eax
sar    $0x18,%eax
mov    %eax,(%rdi)
mov    %esi,%eax
sar    $0x10,%eax
mov    %eax,0x4(%rdi)
mov    %esi,%eax
sar    $0x8,%eax
mov    %eax,0x8(%rdi)
mov    %esi,0xc(%rdi)
ret

LLVM IR (-O0):
define void @w32be(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 24
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 0
store i32 %6, i32* %8
%9 = load i32, i32* %4
%10 = ashr i32 %9, 16
%11 = load i32*, i32** %3
%12 = getelementptr inbounds i32, i32* %11, i64 1
store i32 %10, i32* %12
%13 = load i32, i32* %4
%14 = ashr i32 %13, 8
%15 = load i32*, i32** %3
%16 = getelementptr inbounds i32, i32* %15, i64 2
store i32 %14, i32* %16
%17 = load i32, i32* %4
%18 = load i32*, i32** %3
%19 = getelementptr inbounds i32, i32* %18, i64 3
store i32 %17, i32* %19
ret void
}

LLVM IR (-O2):
define void @w32be(i32* nocapture writeonly %0, i32 %1) {
%3 = ashr i32 %1, 24
store i32 %3, i32* %0
%4 = ashr i32 %1, 16
%5 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %4, i32* %5
%6 = ashr i32 %1, 8
%7 = getelementptr inbounds i32, i32* %0, i64 2
store i32 %6, i32* %7
%8 = getelementptr inbounds i32, i32* %0, i64 3
store i32 %1, i32* %8
ret void
}
/* Type definitions */
typedef scalar_t__ ssize_t;

/* Variables and functions */
scalar_t__ write(int, void const *, size_t);
void write_assert(int fd, const void *buf, size_t count) {
  ssize_t a = write(fd, buf, count);
  if (a < 0) {
  }
}


x86 assembly (clang, -O0):
<write_assert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <write@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jge    1147 <write_assert+0x37>
jmp    1147 <write_assert+0x37>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_assert>:
jmp    1030 <write@plt>

LLVM IR (-O0):
define void @write_assert(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = call i64 @write(i32 %8, i8* %9, i64 %10)
store i64 %11, i64* %7
%12 = load i64, i64* %7
%13 = icmp slt i64 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %3
br label %15
15: ; preds = %14, %3
ret void
}

LLVM IR (-O2):
define void @write_assert(i32 %0, i8* nocapture %1, i64 %2) {
%4 = tail call i64 @write(i32 %0, i8* %1, i64 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ NF_Erase(int);
int /*<<< orphan*/ button_init();
int /*<<< orphan*/ irq_init();
int /*<<< orphan*/ led_init();
int /*<<< orphan*/ led_off();
int /*<<< orphan*/ led_on();
int gboot_main() {
  unsigned char buff[10];
  led_init();
  button_init();
  irq_init();
  led_on();
  NF_Erase(64 * 5);
  led_off();
  while (1)
    ;
  return 0;
}


x86 assembly (clang, -O0):
<gboot_main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <led_init@plt>
mov    $0x0,%al
call   1040 <button_init@plt>
mov    $0x0,%al
call   1070 <irq_init@plt>
mov    $0x0,%al
call   1060 <led_on@plt>
mov    $0x140,%edi
call   1080 <NF_Erase@plt>
mov    $0x0,%al
call   1030 <led_off@plt>
jmp    1195 <gboot_main+0x35>

x86 assembly (clang, -O2):
<gboot_main>:
push   %rax
xor    %eax,%eax
call   1050 <led_init@plt>
xor    %eax,%eax
call   1040 <button_init@plt>
xor    %eax,%eax
call   1070 <irq_init@plt>
xor    %eax,%eax
call   1060 <led_on@plt>
mov    $0x140,%edi
call   1080 <NF_Erase@plt>
xor    %eax,%eax
call   1030 <led_off@plt>
xchg   %ax,%ax
jmp    1190 <gboot_main+0x30>

LLVM IR (-O0):
define i32 @gboot_main() {
%1 = alloca [10 x i8]
%2 = call i32 (...) @led_init()
%3 = call i32 (...) @button_init()
%4 = call i32 (...) @irq_init()
%5 = call i32 (...) @led_on()
%6 = call i32 @NF_Erase(i32 320)
%7 = call i32 (...) @led_off()
br label %8
8: ; preds = %0, %8
br label %8
}

LLVM IR (-O2):
define i32 @gboot_main() {
%1 = tail call i32 (...) @led_init()
%2 = tail call i32 (...) @button_init()
%3 = tail call i32 (...) @irq_init()
%4 = tail call i32 (...) @led_on()
%5 = tail call i32 @NF_Erase(i32 320)
%6 = tail call i32 (...) @led_off()
br label %7
7: ; preds = %7, %0
br label %7
}