xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, int);
int f_2(char *name, int n) {
  for (int y = 0; y < 2; y++) {
    printf("%s f_2: y=%d\n", name, y);
  }
  return n * 2;
}


x86 assembly (clang, -O0):
<f_2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x2,-0x10(%rbp)
jge    1151 <f_2+0x41>
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%edx
lea    0xec2(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <f_2+0x16>
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_2>:
push   %r15
push   %r14
push   %rbx
mov    %esi,%ebx
mov    %rdi,%r14
lea    0xedf(%rip),%r15
mov    %r15,%rdi
mov    %r14,%rsi
xor    %edx,%edx
call   1030 <printf@plt>
mov    %r15,%rdi
mov    %r14,%rsi
mov    $0x1,%edx
call   1030 <printf@plt>
add    %ebx,%ebx
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [14 x i8] c"%s f_2: y=%d\0A\00"
define i32 @f_2(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %13, %2
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 2
br i1 %8, label %9, label %16
9: ; preds = %6
%10 = load i8*, i8** %3
%11 = load i32, i32* %5
%12 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %10, i32 %11)
br label %13
13: ; preds = %9
%14 = load i32, i32* %5
%15 = add nsw i32 %14, 1
store i32 %15, i32* %5
br label %6
16: ; preds = %6
%17 = load i32, i32* %4
%18 = mul nsw i32 %17, 2
ret i32 %18
}

LLVM IR (-O2):
@.str = [14 x i8] c"%s f_2: y=%d\0A\00"
define i32 @f_2(i8* %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %0, i32 0)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %0, i32 1)
%5 = shl nsw i32 %1, 1
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ MFRC522_ClearBitMask(int, int);
void MFRC522_AntennaOff(void) { MFRC522_ClearBitMask(0x14, 0x03); }


x86 assembly (clang, -O0):
<MFRC522_AntennaOff>:
push   %rbp
mov    %rsp,%rbp
mov    $0x14,%edi
mov    $0x3,%esi
call   1030 <MFRC522_ClearBitMask@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MFRC522_AntennaOff>:
mov    $0x14,%edi
mov    $0x3,%esi
jmp    1030 <MFRC522_ClearBitMask@plt>

LLVM IR (-O0):
define void @MFRC522_AntennaOff() {
%1 = call i32 @MFRC522_ClearBitMask(i32 20, i32 3)
ret void
}

LLVM IR (-O2):
define void @MFRC522_AntennaOff() {
%1 = tail call i32 @MFRC522_ClearBitMask(i32 20, i32 3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int var2;
void funcion_1() {
  int var1 = 15;
  static var2 = 5;
  var2 += 5;
  printf("%d  %d\n", var1, var2);
}


x86 assembly (clang, -O0):
<funcion_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xf,-0x4(%rbp)
mov    0x2f03(%rip),%eax
add    $0x5,%eax
mov    %eax,0x2efa(%rip)
mov    -0x4(%rbp),%esi
mov    0x2ef1(%rip),%edx
lea    0xec2(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<funcion_1>:
mov    0x2f12(%rip),%edx
add    $0x5,%edx
mov    %edx,0x2f09(%rip)
lea    0xeda(%rip),%rdi
mov    $0xf,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@funcion_1.var2 = internal global i32 5
@.str = [8 x i8] c"%d %d\0A\00"
@var2 = global i32 0
define void @funcion_1() {
%1 = alloca i32
store i32 15, i32* %1
%2 = load i32, i32* @funcion_1.var2
%3 = add nsw i32 %2, 5
store i32 %3, i32* @funcion_1.var2
%4 = load i32, i32* %1
%5 = load i32, i32* @funcion_1.var2
%6 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %5)
ret void
}

LLVM IR (-O2):
@funcion_1.var2 = internal unnamed_addr global i32 5
@.str = [8 x i8] c"%d %d\0A\00"
@var2 = global i32 0
define void @funcion_1() {
%1 = load i32, i32* @funcion_1.var2
%2 = add nsw i32 %1, 5
store i32 %2, i32* @funcion_1.var2
%3 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 15, i32 %2)
ret void
}
int fme_emif_init(struct ifpga_feature *feature) {
  (void)(feature);
  return 0;
}


x86 assembly (clang, -O0):
<fme_emif_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fme_emif_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ifpga_feature = type opaque
define i32 @fme_emif_init(%struct.ifpga_feature* %0) {
%2 = alloca %struct.ifpga_feature*
store %struct.ifpga_feature* %0, %struct.ifpga_feature** %2
%3 = load %struct.ifpga_feature*, %struct.ifpga_feature** %2
ret i32 0
}

LLVM IR (-O2):
%struct.ifpga_feature = type opaque
define i32 @fme_emif_init(%struct.ifpga_feature* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "usage: asa [file ...]\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [23 x i8] c"usage: asa [file ...]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [23 x i8] c"usage: asa [file ...]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
void blkfree(av0) char **av0;
{
  register char **av = av0;
  while (*av)
    free(*av++);
}


x86 assembly (clang, -O0):
<blkfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
je     114e <blkfree+0x3e>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x8,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%rdi
call   1030 <free@plt>
jmp    1124 <blkfree+0x14>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<blkfree>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1131 <blkfree+0x21>
add    $0x8,%rbx
call   1030 <free@plt>
mov    (%rbx),%rdi
add    $0x8,%rbx
test   %rdi,%rdi
jne    1120 <blkfree+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @blkfree(i8** %0) {
%2 = alloca i8**
%3 = alloca i8**
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
store i8** %4, i8*** %3
br label %5
5: ; preds = %9, %1
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %6
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %13
9: ; preds = %5
%10 = load i8**, i8*** %3
%11 = getelementptr inbounds i8*, i8** %10, i32 1
store i8** %11, i8*** %3
%12 = load i8*, i8** %10
br label %5
13: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @blkfree(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = icmp eq i8* %2, null
br i1 %3, label %10, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %8, %4 ], [ %2, %1 ]
%6 = phi i8** [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8*, i8** %6, i64 1
tail call void @free(i8* %5)
%8 = load i8*, i8** %7
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %4
10: ; preds = %4, %1
ret void
}
void INT_Excep_POE_OEI1(void) {}


x86 assembly (clang, -O0):
<INT_Excep_POE_OEI1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_POE_OEI1>:
ret

LLVM IR (-O0):
define void @INT_Excep_POE_OEI1() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_POE_OEI1() {
ret void
}
void UART8_IRQHandler() {}


x86 assembly (clang, -O0):
<UART8_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UART8_IRQHandler>:
ret

LLVM IR (-O0):
define void @UART8_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @UART8_IRQHandler() {
ret void
}
void SVC_Handler() {}


x86 assembly (clang, -O0):
<SVC_Handler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SVC_Handler>:
ret

LLVM IR (-O0):
define void @SVC_Handler() {
ret void
}

LLVM IR (-O2):
define void @SVC_Handler() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_eval(int);
char *strsep(char **, char *);
void strsep_return_original_pointer(char *s) {
  char *original = s;
  char *result = strsep(&s, "");
  clang_analyzer_eval(original == result);
}


x86 assembly (clang, -O0):
<strsep_return_original_pointer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
lea    -0x8(%rbp),%rdi
lea    0xec1(%rip),%rsi
call   1030 <strsep@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <clang_analyzer_eval@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strsep_return_original_pointer>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %rdi,0x8(%rsp)
lea    0xecc(%rip),%rsi
lea    0x8(%rsp),%rdi
call   1030 <strsep@plt>
xor    %edi,%edi
cmp    %rbx,%rax
sete   %dil
call   1040 <clang_analyzer_eval@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define void @strsep_return_original_pointer(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8* %5, i8** %3
%6 = call i8* @strsep(i8** %2, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
store i8* %6, i8** %4
%7 = load i8*, i8** %3
%8 = load i8*, i8** %4
%9 = icmp eq i8* %7, %8
%10 = zext i1 %9 to i32
%11 = call i32 @clang_analyzer_eval(i32 %10)
ret void
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define void @strsep_return_original_pointer(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i8* @strsep(i8** %2, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i8* %3, %0
%5 = zext i1 %4 to i32
%6 = call i32 @clang_analyzer_eval(i32 %5)
ret void
}
const char *run_pdf_get_description(void) {
  return "Create a file named run_pdf_test_file_pid, "
         "where pid is the process id.  The file is created "
         "in the current directory, "
         "if the current directory is NOT on the test "
         "file system, otherwise no action is taken. "
         "If a repeat count is specified, then the task repeats "
         "that number of times. "
         "The repeat count is given by the -n or --repeat option, "
         "otherwise it defaults to 1. "
         "A repeat count of zero repeats forever. "
         "The size is given by the -z or --size option, "
         "otherwise it defaults to 1000000. "
         "The size is adjusted so that it is not more than "
         "half the size of total memory.";
}


x86 assembly (clang, -O0):
<run_pdf_get_description>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<run_pdf_get_description>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [566 x i8] c"Create a file named run_pdf_test_file_pid, where pid is the process id. The file is created in the current directory, if the current directory is NOT on the test file system, otherwise no action is taken. If a repeat count is specified, then the task repeats that number of times. The repeat count is given by the -n or --repeat option, otherwise it defaults to 1. A repeat count of zero repeats forever. The size is given by the -z or --size option, otherwise it defaults to 1000000. The size is adjusted so that it is not more than half the size of total memory.\00"
define i8* @run_pdf_get_description() {
ret i8* getelementptr inbounds ([566 x i8], [566 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [566 x i8] c"Create a file named run_pdf_test_file_pid, where pid is the process id. The file is created in the current directory, if the current directory is NOT on the test file system, otherwise no action is taken. If a repeat count is specified, then the task repeats that number of times. The repeat count is given by the -n or --repeat option, otherwise it defaults to 1. A repeat count of zero repeats forever. The size is given by the -z or --size option, otherwise it defaults to 1000000. The size is adjusted so that it is not more than half the size of total memory.\00"
define i8* @run_pdf_get_description() {
ret i8* getelementptr inbounds ([566 x i8], [566 x i8]* @.str, i64 0, i64 0)
}
void foo69() {}


x86 assembly (clang, -O0):
<foo69>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo69>:
ret

LLVM IR (-O0):
define void @foo69() {
ret void
}

LLVM IR (-O2):
define void @foo69() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fsemu_savestate_load(int);
void fsemu_control_load_state(int slot) { fsemu_savestate_load(slot); }


x86 assembly (clang, -O0):
<fsemu_control_load_state>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <fsemu_savestate_load@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsemu_control_load_state>:
jmp    1030 <fsemu_savestate_load@plt>

LLVM IR (-O0):
define void @fsemu_control_load_state(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @fsemu_savestate_load(i32 %3)
ret void
}

LLVM IR (-O2):
define void @fsemu_control_load_state(i32 %0) {
%2 = tail call i32 @fsemu_savestate_load(i32 %0)
ret void
}
/* Variables and functions */
float truncf(float);
float __ocl_trunc_float(float src) { return truncf(src); }


x86 assembly (clang, -O0):
<__ocl_trunc_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <truncf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ocl_trunc_float>:
jmp    1030 <truncf@plt>

LLVM IR (-O0):
define float @__ocl_trunc_float(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @llvm.trunc.f32(float %3)
ret float %4
}

LLVM IR (-O2):
define float @__ocl_trunc_float(float %0) {
%2 = tail call float @llvm.trunc.f32(float %0)
ret float %2
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ LCDClockReset(scalar_t__, int);
void LCDRasterEnable(uint32_t ui32Base) {
  ;
  LCDClockReset(ui32Base, 0x00000008);
  (*((volatile unsigned long *)(ui32Base + 0x00000028))) |= 0x00000001;
}


x86 assembly (clang, -O0):
<LCDRasterEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x8,%esi
call   1030 <LCDClockReset@plt>
mov    -0x8(%rbp),%rax
mov    0x28(%rax),%rcx
or     $0x1,%rcx
mov    %rcx,0x28(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCDRasterEnable>:
push   %rbx
mov    %rdi,%rbx
mov    $0x8,%esi
call   1030 <LCDClockReset@plt>
orq    $0x1,0x28(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @LCDRasterEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @LCDClockReset(i64 %3, i32 8)
%5 = load i64, i64* %2
%6 = add nsw i64 %5, 40
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = or i64 %8, 1
store volatile i64 %9, i64* %7
ret void
}

LLVM IR (-O2):
define void @LCDRasterEnable(i64 %0) {
%2 = tail call i32 @LCDClockReset(i64 %0, i32 8)
%3 = add nsw i64 %0, 40
%4 = inttoptr i64 %3 to i64*
%5 = load volatile i64, i64* %4
%6 = or i64 %5, 1
store volatile i64 %6, i64* %4
ret void
}
long main() { long f; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define i64 @main() {
%1 = alloca i64
%2 = alloca i64
%3 = load i64, i64* %1
ret i64 %3
}

LLVM IR (-O2):
define i64 @main() {
ret i64 undef
}
int main(void) {
  if (99.5 > 99.6 || 99) {
    return 40 + (1 < 2 || 1 < 2) + (99 || 99);
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 42
}

LLVM IR (-O2):
define i32 @main() {
ret i32 42
}
/* Variables and functions */
int /*<<< orphan*/ ngen2(char *, char *, int, int);
void cgdecpl(int a, int v) { ngen2("%s\t$%d,%d(%%ebp)", "subl", v, a); }


x86 assembly (clang, -O0):
<cgdecpl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edx
mov    -0x4(%rbp),%ecx
lea    0xed5(%rip),%rdi
lea    0xedf(%rip),%rsi
call   1030 <ngen2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgdecpl>:
mov    %esi,%edx
mov    %edi,%ecx
lea    0xee5(%rip),%rdi
lea    0xeef(%rip),%rsi
jmp    1030 <ngen2@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"%s\09$%d,%d(%%ebp)\00"
@.str.1 = [5 x i8] c"subl\00"
define void @cgdecpl(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = call i32 @ngen2(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"%s\09$%d,%d(%%ebp)\00"
@.str.1 = [5 x i8] c"subl\00"
define void @cgdecpl(i32 %0, i32 %1) {
%3 = tail call i32 @ngen2(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %1, i32 %0)
ret void
}
void sata_phy_iomux_config() {}


x86 assembly (clang, -O0):
<sata_phy_iomux_config>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sata_phy_iomux_config>:
ret

LLVM IR (-O0):
define void @sata_phy_iomux_config() {
ret void
}

LLVM IR (-O2):
define void @sata_phy_iomux_config() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ die(char *);
void *malloc(unsigned int);
void __attribute__((weak)) * malloc_or_die(unsigned int size) {
  void *data;
  data = malloc(size);
  if (!data)
    die("malloc");
  return data;
}


x86 assembly (clang, -O0):
<malloc_or_die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114e <malloc_or_die+0x2e>
lea    0xeb7(%rip),%rdi
call   1040 <die@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<malloc_or_die>:
push   %rbx
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <malloc_or_die+0x1a>
lea    0xecb(%rip),%rdi
call   1040 <die@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"malloc\00"
define weak i8* @malloc_or_die(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8* @malloc(i32 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = call i32 @die(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [7 x i8] c"malloc\00"
define weak i8* @malloc_or_die(i32 %0) {
%2 = tail call i8* @malloc(i32 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @die(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
float media(float *notas) {
  int i;
  int soma;
  for (i = 0; i < 5; i++) {
    soma += notas[i];
  }
  return (float)soma / i;
}


x86 assembly (clang, -O0):
<media>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x5,-0xc(%rbp)
jge    1144 <media+0x44>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm1
cvtsi2ssl -0x10(%rbp),%xmm0
addss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <media+0xf>
cvtsi2ssl -0x10(%rbp),%xmm0
cvtsi2ssl -0xc(%rbp),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<media>:
xorps  %xmm0,%xmm0
addss  (%rdi),%xmm0
cvttps2dq %xmm0,%xmm0
cvtdq2ps %xmm0,%xmm0
addss  0x4(%rdi),%xmm0
cvttps2dq %xmm0,%xmm0
cvtdq2ps %xmm0,%xmm0
addss  0x8(%rdi),%xmm0
cvttps2dq %xmm0,%xmm0
cvtdq2ps %xmm0,%xmm0
addss  0xc(%rdi),%xmm0
cvttps2dq %xmm0,%xmm0
cvtdq2ps %xmm0,%xmm0
addss  0x10(%rdi),%xmm0
cvttps2dq %xmm0,%xmm0
cvtdq2ps %xmm0,%xmm0
divss  0xeba(%rip),%xmm0
ret

LLVM IR (-O0):
define float @media(float* %0) {
%2 = alloca float*
%3 = alloca i32
%4 = alloca i32
store float* %0, float** %2
store i32 0, i32* %3
br label %5
5: ; preds = %18, %1
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 5
br i1 %7, label %8, label %21
8: ; preds = %5
%9 = load float*, float** %2
%10 = load i32, i32* %3
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds float, float* %9, i64 %11
%13 = load float, float* %12
%14 = load i32, i32* %4
%15 = sitofp i32 %14 to float
%16 = fadd float %15, %13
%17 = fptosi float %16 to i32
store i32 %17, i32* %4
br label %18
18: ; preds = %8
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %5
21: ; preds = %5
%22 = load i32, i32* %4
%23 = sitofp i32 %22 to float
%24 = load i32, i32* %3
%25 = sitofp i32 %24 to float
%26 = fdiv float %23, %25
ret float %26
}

LLVM IR (-O2):
define float @media(float* nocapture %0) {
%2 = load float, float* %0
%3 = fadd float %2, 0.000000e+00
%4 = fptosi float %3 to i32
%5 = sitofp i32 %4 to float
%6 = getelementptr inbounds float, float* %0, i64 1
%7 = load float, float* %6
%8 = fadd float %7, %5
%9 = fptosi float %8 to i32
%10 = sitofp i32 %9 to float
%11 = getelementptr inbounds float, float* %0, i64 2
%12 = load float, float* %11
%13 = fadd float %12, %10
%14 = fptosi float %13 to i32
%15 = sitofp i32 %14 to float
%16 = getelementptr inbounds float, float* %0, i64 3
%17 = load float, float* %16
%18 = fadd float %17, %15
%19 = fptosi float %18 to i32
%20 = sitofp i32 %19 to float
%21 = getelementptr inbounds float, float* %0, i64 4
%22 = load float, float* %21
%23 = fadd float %22, %20
%24 = fptosi float %23 to i32
%25 = sitofp i32 %24 to float
%26 = fdiv float %25, 5.000000e+00
ret float %26
}
void DBGFR3CoreWrite(void) {}


x86 assembly (clang, -O0):
<DBGFR3CoreWrite>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DBGFR3CoreWrite>:
ret

LLVM IR (-O0):
define void @DBGFR3CoreWrite() {
ret void
}

LLVM IR (-O2):
define void @DBGFR3CoreWrite() {
ret void
}
int main(void) {
  int x = 1, y = 1, z = 1;
  ++x;
  ++y;
  ++z;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
store i32 1, i32* %3
store i32 1, i32* %4
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 1
store i32 %6, i32* %2
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 1
store i32 %8, i32* %3
%9 = load i32, i32* %4
%10 = add nsw i32 %9, 1
store i32 %10, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ routing(char *);
int main(int argc, char const *argv[]) {
  routing("dest-platform");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <routing@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <routing@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"dest-platform\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @routing(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"dest-platform\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @routing(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() { printf("\n Olá Mundo! \n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"\0A Ol\C3\A1 Mundo! \0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [15 x i8] c"\0A Ol\C3\A1 Mundo! \00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str, i64 0, i64 0))
ret i32 0
}
char *pasa_txuri(char *s) {
  while (*s == ' ')
    s++;
  return (s);
}


x86 assembly (clang, -O0):
<pasa_txuri>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
jne    1129 <pasa_txuri+0x29>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <pasa_txuri+0x8>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pasa_txuri>:
mov    %rdi,%rax
add    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x20,0x1(%rax)
lea    0x1(%rax),%rax
je     1110 <pasa_txuri+0x10>
ret

LLVM IR (-O0):
define i8* @pasa_txuri(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, 32
br i1 %7, label %8, label %11
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
br label %3
11: ; preds = %3
%12 = load i8*, i8** %2
ret i8* %12
}

LLVM IR (-O2):
define i8* @pasa_txuri(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %6, %2 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 32
%6 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %5, label %2, label %7
7: ; preds = %2
ret i8* %3
}
int strange_order(int a, int b) {
  if ((a == 0) || (b == 0)) {
    return 0;
  } else {
    return a % b;
  }
}


x86 assembly (clang, -O0):
<strange_order>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     111e <strange_order+0x1e>
cmpl   $0x0,-0xc(%rbp)
jne    112a <strange_order+0x2a>
movl   $0x0,-0x4(%rbp)
jmp    1134 <strange_order+0x34>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strange_order>:
xor    %eax,%eax
test   %edi,%edi
je     1111 <strange_order+0x11>
test   %esi,%esi
je     1111 <strange_order+0x11>
mov    %edi,%eax
cltd
idiv   %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @strange_order(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i32, i32* %5
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %8, %2
store i32 0, i32* %3
br label %16
12: ; preds = %8
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = srem i32 %13, %14
store i32 %15, i32* %3
br label %16
16: ; preds = %12, %11
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @strange_order(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
%4 = icmp eq i32 %1, 0
%5 = or i1 %3, %4
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = srem i32 %0, %1
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ %7, %6 ], [ 0, %2 ]
ret i32 %9
}
unsigned long ffz(unsigned long word) {
  __asm__("bsfq %1,%0" : "=r"(word) : "r"(~word));
  return word;
}


x86 assembly (clang, -O0):
<ffz>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xor    $0xffffffffffffffff,%rax
bsf    %rax,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffz>:
not    %rdi
bsf    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @ffz(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = xor i64 %3, -1
%5 = call i64 asm "bsfq $1,$0", "=r,r,~{dirflag},~{fpsr},~{flags}"(i64 %4)
store i64 %5, i64* %2
%6 = load i64, i64* %2
ret i64 %6
}

LLVM IR (-O2):
define i64 @ffz(i64 %0) {
%2 = xor i64 %0, -1
%3 = tail call i64 asm "bsfq $1,$0", "=r,r,~{dirflag},~{fpsr},~{flags}"(i64 %2)
ret i64 %3
}
/* Variables and functions */
int *calloc(int, int);
int /*<<< orphan*/ free(int *);
int *malloc(int);
int *realloc(int *, int);
int main(void) {
  int *p1 = malloc(10 * sizeof *p1);
  free(p1);
  int *p2 = calloc(10, sizeof *p2);
  int *p3 = realloc(p2, 100 * sizeof *p2);
  if (p3) {
    free(p3);
  } else {
    free(p2);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x28,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    $0xa,%edi
mov    $0x4,%esi
call   1040 <calloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    $0x190,%esi
call   1060 <realloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     11a4 <main+0x64>
mov    -0x20(%rbp),%rdi
call   1030 <free@plt>
jmp    11ad <main+0x6d>
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x28,%edi
call   1050 <malloc@plt>
mov    %rax,%rdi
call   1030 <free@plt>
mov    $0xa,%edi
mov    $0x4,%esi
call   1040 <calloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    $0x190,%esi
call   1060 <realloc@plt>
test   %rax,%rax
je     117c <main+0x3c>
mov    %rax,%rdi
jmp    117f <main+0x3f>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca i32*
store i32 0, i32* %1
%5 = call i32* @malloc(i32 40)
store i32* %5, i32** %2
%6 = load i32*, i32** %2
%7 = call i32 @free(i32* %6)
%8 = call i32* @calloc(i32 10, i32 4)
store i32* %8, i32** %3
%9 = load i32*, i32** %3
%10 = call i32* @realloc(i32* %9, i32 400)
store i32* %10, i32** %4
%11 = load i32*, i32** %4
%12 = icmp ne i32* %11, null
br i1 %12, label %13, label %16
13: ; preds = %0
%14 = load i32*, i32** %4
%15 = call i32 @free(i32* %14)
br label %19
16: ; preds = %0
%17 = load i32*, i32** %3
%18 = call i32 @free(i32* %17)
br label %19
19: ; preds = %16, %13
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32* @malloc(i32 40)
%2 = tail call i32 @free(i32* %1)
%3 = tail call i32* @calloc(i32 10, i32 4)
%4 = tail call i32* @realloc(i32* %3, i32 400)
%5 = icmp eq i32* %4, null
br i1 %5, label %8, label %6
6: ; preds = %0
%7 = tail call i32 @free(i32* %4)
br label %10
8: ; preds = %0
%9 = tail call i32 @free(i32* %3)
br label %10
10: ; preds = %8, %6
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0xe6() {
  Assert_real((isalnum(230) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              1155, ("isalnum should be 0 for 0xe6"));
}


x86 assembly (clang, -O0):
<t_isalnum_0xe6>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe6,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x483,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0xe6>:
push   %rax
mov    $0xe6,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x483,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xe6\00"
define void @t_isalnum_0xe6() {
%1 = call i64 @isalnum(i32 230)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1155, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xe6\00"
define void @t_isalnum_0xe6() {
%1 = tail call i64 @isalnum(i32 230)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1155, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void core_delay(int n) {
  volatile long x = 250 * n;
  while (x-- > 0)
    ;
}


x86 assembly (clang, -O0):
<core_delay>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0xfa,-0x4(%rbp),%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x10(%rbp)
cmp    $0x0,%rax
jle    1132 <core_delay+0x32>
jmp    1114 <core_delay+0x14>
pop    %rbp
ret

x86 assembly (clang, -O2):
<core_delay>:
imul   $0xfa,%edi,%eax
cltq
mov    %rax,-0x8(%rsp)
nopl   (%rax)
mov    -0x8(%rsp),%rax
lea    -0x1(%rax),%rcx
mov    %rcx,-0x8(%rsp)
test   %rax,%rax
jg     1110 <core_delay+0x10>
ret

LLVM IR (-O0):
define void @core_delay(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 250, %4
%6 = sext i32 %5 to i64
store volatile i64 %6, i64* %3
br label %7
7: ; preds = %11, %1
%8 = load volatile i64, i64* %3
%9 = add nsw i64 %8, -1
store volatile i64 %9, i64* %3
%10 = icmp sgt i64 %8, 0
br i1 %10, label %11, label %12
11: ; preds = %7
br label %7
12: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @core_delay(i32 %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = mul nsw i32 %0, 250
%5 = sext i32 %4 to i64
store volatile i64 %5, i64* %2
br label %6
6: ; preds = %6, %1
%7 = load volatile i64, i64* %2
%8 = add nsw i64 %7, -1
store volatile i64 %8, i64* %2
%9 = icmp sgt i64 %7, 0
br i1 %9, label %6, label %10
10: ; preds = %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FreshFPS33();
void freshfps() { FreshFPS33(); }


x86 assembly (clang, -O0):
<freshfps>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <FreshFPS33@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<freshfps>:
xor    %eax,%eax
jmp    1030 <FreshFPS33@plt>

LLVM IR (-O0):
define void @freshfps() {
%1 = call i32 (...) @FreshFPS33()
ret void
}

LLVM IR (-O2):
define void @freshfps() {
%1 = tail call i32 (...) @FreshFPS33()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ m68ki_exception_1010();
void m68k_op_1010(void) { m68ki_exception_1010(); }


x86 assembly (clang, -O0):
<m68k_op_1010>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <m68ki_exception_1010@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_1010>:
xor    %eax,%eax
jmp    1030 <m68ki_exception_1010@plt>

LLVM IR (-O0):
define void @m68k_op_1010() {
%1 = call i32 (...) @m68ki_exception_1010()
ret void
}

LLVM IR (-O2):
define void @m68k_op_1010() {
%1 = tail call i32 (...) @m68ki_exception_1010()
ret void
}
const char *LOCO_STAT(int s) {
  return ((s & (0x20 | 0x10)) == (0x20 | 0x10))
             ? "in use"
             : (((s & (0x20 | 0x10)) == 0x20)
                    ? "idle"
                    : (((s & (0x20 | 0x10)) == 0x10) ? "common" : "free"));
}


x86 assembly (clang, -O0):
<LOCO_STAT>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x30,%eax
cmp    $0x30,%eax
jne    1126 <LOCO_STAT+0x26>
lea    0xee3(%rip),%rax
mov    %rax,-0x10(%rbp)
jmp    116c <LOCO_STAT+0x6c>
mov    -0x4(%rbp),%eax
and    $0x30,%eax
cmp    $0x20,%eax
jne    1145 <LOCO_STAT+0x45>
lea    0xecb(%rip),%rax
mov    %rax,-0x18(%rbp)
jmp    1164 <LOCO_STAT+0x64>
mov    -0x4(%rbp),%edx
and    $0x30,%edx
lea    0xec1(%rip),%rax
lea    0xeb3(%rip),%rcx
cmp    $0x10,%edx
cmove  %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LOCO_STAT>:
and    $0x30,%edi
cmp    $0x20,%edi
je     1115 <LOCO_STAT+0x15>
cmp    $0x30,%edi
jne    111d <LOCO_STAT+0x1d>
lea    0xeec(%rip),%rax
ret
lea    0xeeb(%rip),%rax
ret
cmp    $0x10,%edi
lea    0xee5(%rip),%rcx
lea    0xee5(%rip),%rax
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [7 x i8] c"in use\00"
@.str.1 = [5 x i8] c"idle\00"
@.str.2 = [7 x i8] c"common\00"
@.str.3 = [5 x i8] c"free\00"
define i8* @LOCO_STAT(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 48
%5 = icmp eq i32 %4, 48
br i1 %5, label %6, label %7
6: ; preds = %1
br label %20
7: ; preds = %1
%8 = load i32, i32* %2
%9 = and i32 %8, 48
%10 = icmp eq i32 %9, 32
br i1 %10, label %11, label %12
11: ; preds = %7
br label %18
12: ; preds = %7
%13 = load i32, i32* %2
%14 = and i32 %13, 48
%15 = icmp eq i32 %14, 16
%16 = zext i1 %15 to i64
%17 = select i1 %15, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.3, i64 0, i64 0)
br label %18
18: ; preds = %12, %11
%19 = phi i8* [ getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), %11 ], [ %17, %12 ]
br label %20
20: ; preds = %18, %6
%21 = phi i8* [ getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), %6 ], [ %19, %18 ]
ret i8* %21
}

LLVM IR (-O2):
@.str = [7 x i8] c"in use\00"
@.str.1 = [5 x i8] c"idle\00"
@.str.2 = [7 x i8] c"common\00"
@.str.3 = [5 x i8] c"free\00"
define i8* @LOCO_STAT(i32 %0) {
%2 = and i32 %0, 48
switch i32 %2, label %3 [
i32 48, label %7
i32 32, label %6
]
3: ; preds = %1
%4 = icmp eq i32 %2, 16
%5 = select i1 %4, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.3, i64 0, i64 0)
br label %7
6: ; preds = %1
br label %7
7: ; preds = %1, %6, %3
%8 = phi i8* [ getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), %1 ], [ %5, %3 ], [ getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), %6 ]
ret i8* %8
}
/* Variables and functions */
float sin(float x) { return (float)sin((double)x); }


x86 assembly (clang, -O0):
<sin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
cvtsd2ss %xmm0,%xmm0
call   1030 <sin@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sin>:
ucomiss 0xef9(%rip),%xmm0
jae    1120 <sin+0x20>
movss  0xef3(%rip),%xmm1
ucomiss %xmm0,%xmm1
jae    1120 <sin+0x20>
ret
nopw   0x0(%rax,%rax,1)
jmp    1120 <sin+0x20>

LLVM IR (-O0):
define float @sin(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fptrunc double %4 to float
%6 = call float @sin(float %5)
ret float %6
}

LLVM IR (-O2):
define float @sin(float %0) {
%2 = fcmp oeq float %0, 0xFFF0000000000000
%3 = fcmp oeq float %0, 0x7FF0000000000000
%4 = or i1 %3, %2
br i1 %4, label %5, label %6
5: ; preds = %1, %5
br label %5
6: ; preds = %1
ret float undef
}
/* Variables and functions */
int /*<<< orphan*/ W_OK;
scalar_t__ access(char *, int /*<<< orphan*/);
int errno;
int write_permission_p(char *filename) {
  if (access(filename, W_OK) == 0)
    return (0);
  return (errno);
}


x86 assembly (clang, -O0):
<write_permission_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    0x2ec1(%rip),%rax
mov    (%rax),%esi
call   1030 <access@plt>
cmp    $0x0,%rax
jne    1144 <write_permission_p+0x34>
movl   $0x0,-0x4(%rbp)
jmp    1150 <write_permission_p+0x40>
mov    0x2e8d(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_permission_p>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%esi
call   1030 <access@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
je     1132 <write_permission_p+0x22>
mov    0x2ea8(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@W_OK = global i32 0
@errno = global i32 0
define i32 @write_permission_p(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = load i32, i32* @W_OK
%6 = call i64 @access(i8* %4, i32 %5)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %11
9: ; preds = %1
%10 = load i32, i32* @errno
store i32 %10, i32* %2
br label %11
11: ; preds = %9, %8
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
@W_OK = global i32 0
@errno = global i32 0
define i32 @write_permission_p(i8* nocapture %0) {
%2 = load i32, i32* @W_OK
%3 = tail call i64 @access(i8* %0, i32 %2)
%4 = icmp eq i64 %3, 0
%5 = load i32, i32* @errno
%6 = select i1 %4, i32 0, i32 %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void dav1d_free_aligned(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<dav1d_free_aligned>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dav1d_free_aligned>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @dav1d_free_aligned(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @dav1d_free_aligned(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
void *gfx_imagecreate(int, int, unsigned int, int, int, int /*<<< orphan*/);
void *fb_GfxImageCreateQB(int width, int height, unsigned int color, int depth,
                          int flags) {
  return gfx_imagecreate(width, height, color, depth, flags, 0);
}


x86 assembly (clang, -O0):
<fb_GfxImageCreateQB>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
xor    %r9d,%r9d
call   1030 <gfx_imagecreate@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb_GfxImageCreateQB>:
xor    %r9d,%r9d
jmp    1030 <gfx_imagecreate@plt>

LLVM IR (-O0):
define i8* @fb_GfxImageCreateQB(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i8* @gfx_imagecreate(i32 %11, i32 %12, i32 %13, i32 %14, i32 %15, i32 0)
ret i8* %16
}

LLVM IR (-O2):
define i8* @fb_GfxImageCreateQB(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i8* @gfx_imagecreate(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 0)
ret i8* %6
}
/* Type definitions */
struct v4l_fd {
  int dummy;
};
struct v4l2_format {
  unsigned int type;
};

/* Variables and functions */
int /*<<< orphan*/ VIDIOC_G_FMT;
int v4l_ioctl(struct v4l_fd *, int /*<<< orphan*/, struct v4l2_format *);
int v4l_g_fmt(struct v4l_fd *f, struct v4l2_format *fmt, unsigned type) {
  fmt->type = type;
  return v4l_ioctl(f, VIDIOC_G_FMT, fmt);
}


x86 assembly (clang, -O0):
<v4l_g_fmt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rdi
mov    0x2ea9(%rip),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rdx
call   1030 <v4l_ioctl@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<v4l_g_fmt>:
mov    %rsi,%rax
mov    %edx,(%rsi)
mov    0x2ec4(%rip),%rcx
mov    (%rcx),%esi
mov    %rax,%rdx
jmp    1030 <v4l_ioctl@plt>

LLVM IR (-O0):
%struct.v4l_fd = type { i32 }
%struct.v4l2_format = type { i32 }
@VIDIOC_G_FMT = global i32 0
define i32 @v4l_g_fmt(%struct.v4l_fd* %0, %struct.v4l2_format* %1, i32 %2) {
%4 = alloca %struct.v4l_fd*
%5 = alloca %struct.v4l2_format*
%6 = alloca i32
store %struct.v4l_fd* %0, %struct.v4l_fd** %4
store %struct.v4l2_format* %1, %struct.v4l2_format** %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load %struct.v4l2_format*, %struct.v4l2_format** %5
%9 = getelementptr inbounds %struct.v4l2_format, %struct.v4l2_format* %8, i32 0, i32 0
store i32 %7, i32* %9
%10 = load %struct.v4l_fd*, %struct.v4l_fd** %4
%11 = load i32, i32* @VIDIOC_G_FMT
%12 = load %struct.v4l2_format*, %struct.v4l2_format** %5
%13 = call i32 @v4l_ioctl(%struct.v4l_fd* %10, i32 %11, %struct.v4l2_format* %12)
ret i32 %13
}

LLVM IR (-O2):
%struct.v4l_fd = type { i32 }
%struct.v4l2_format = type { i32 }
@VIDIOC_G_FMT = global i32 0
define i32 @v4l_g_fmt(%struct.v4l_fd* %0, %struct.v4l2_format* %1, i32 %2) {
%4 = getelementptr inbounds %struct.v4l2_format, %struct.v4l2_format* %1, i64 0, i32 0
store i32 %2, i32* %4
%5 = load i32, i32* @VIDIOC_G_FMT
%6 = tail call i32 @v4l_ioctl(%struct.v4l_fd* %0, i32 %5, %struct.v4l2_format* %1)
ret i32 %6
}
int test_imm_00int64_lowword_reg(long long val) {
  return ((val) & (0x00 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x0,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    $0xffffffd8,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_00int64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 0
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_00int64_lowword_reg(i64 %0) {
ret i32 -40
}