xunge/DecIR huggingface dataset:
float addf(const float in_A, const float in_B) { return in_A + in_B; }


x86 assembly (clang, -O0):
<addf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
addss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<addf>:
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @addf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fadd float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @addf(float %0, float %1) {
%3 = fadd float %0, %1
ret float %3
}
/* Variables and functions */
int getbc(int);
int getnum_l1a();
int getnum_l1b() {
  int i = getnum_l1a();
  if (i < 0)
    return i;
  if (i == 1) {
    i = getbc(1);
    if (i < 0)
      return i;
  }
  return i + 1;
}


x86 assembly (clang, -O0):
<getnum_l1b>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getnum_l1a@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1147 <getnum_l1b+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1181 <getnum_l1b+0x61>
cmpl   $0x1,-0x8(%rbp)
jne    1178 <getnum_l1b+0x58>
mov    $0x1,%edi
call   1040 <getbc@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1173 <getnum_l1b+0x53>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1181 <getnum_l1b+0x61>
jmp    1178 <getnum_l1b+0x58>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getnum_l1b>:
push   %rax
xor    %eax,%eax
call   1030 <getnum_l1a@plt>
test   %eax,%eax
js     1142 <getnum_l1b+0x22>
cmp    $0x1,%eax
jne    113f <getnum_l1b+0x1f>
mov    $0x1,%edi
call   1040 <getbc@plt>
test   %eax,%eax
js     1142 <getnum_l1b+0x22>
add    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @getnum_l1b() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @getnum_l1a()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = load i32, i32* %2
store i32 %7, i32* %1
br label %21
8: ; preds = %0
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 1
br i1 %10, label %11, label %18
11: ; preds = %8
%12 = call i32 @getbc(i32 1)
store i32 %12, i32* %2
%13 = load i32, i32* %2
%14 = icmp slt i32 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = load i32, i32* %2
store i32 %16, i32* %1
br label %21
17: ; preds = %11
br label %18
18: ; preds = %17, %8
%19 = load i32, i32* %2
%20 = add nsw i32 %19, 1
store i32 %20, i32* %1
br label %21
21: ; preds = %18, %15, %6
%22 = load i32, i32* %1
ret i32 %22
}

LLVM IR (-O2):
define i32 @getnum_l1b() {
%1 = tail call i32 (...) @getnum_l1a()
%2 = icmp slt i32 %1, 0
br i1 %2, label %11, label %3
3: ; preds = %0
%4 = icmp eq i32 %1, 1
br i1 %4, label %5, label %8
5: ; preds = %3
%6 = tail call i32 @getbc(i32 1)
%7 = icmp slt i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %5, %3
%9 = phi i32 [ %6, %5 ], [ %1, %3 ]
%10 = add nuw nsw i32 %9, 1
br label %11
11: ; preds = %5, %0, %8
%12 = phi i32 [ %10, %8 ], [ %1, %0 ], [ %6, %5 ]
ret i32 %12
}
int test_imm_D3int16_reg(short val) {
  return ((val) & (0xD3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D3int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xd3,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D3int16_reg>:
test   $0xd3,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D3int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 211
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D3int16_reg(i16 signext %0) {
%2 = and i16 %0, 211
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void Profiler_FrameStart() {}


x86 assembly (clang, -O0):
<Profiler_FrameStart>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Profiler_FrameStart>:
ret

LLVM IR (-O0):
define void @Profiler_FrameStart() {
ret void
}

LLVM IR (-O2):
define void @Profiler_FrameStart() {
ret void
}
void BN_div(void) {}


x86 assembly (clang, -O0):
<BN_div>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_div>:
ret

LLVM IR (-O0):
define void @BN_div() {
ret void
}

LLVM IR (-O2):
define void @BN_div() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ OS_EVENT_DriverIRQHandler();
__attribute__((weak)) void OS_EVENT_IRQHandler(void) {
  OS_EVENT_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<OS_EVENT_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <OS_EVENT_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<OS_EVENT_IRQHandler>:
xor    %eax,%eax
jmp    1030 <OS_EVENT_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @OS_EVENT_IRQHandler() {
%1 = call i32 (...) @OS_EVENT_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @OS_EVENT_IRQHandler() {
%1 = tail call i32 (...) @OS_EVENT_DriverIRQHandler()
ret void
}
void cmd_null(void) {}


x86 assembly (clang, -O0):
<cmd_null>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_null>:
ret

LLVM IR (-O0):
define void @cmd_null() {
ret void
}

LLVM IR (-O2):
define void @cmd_null() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ feof(int /*<<< orphan*/ *);
void uninit_feof(void) {
  FILE *fp;
  feof(fp);
}


x86 assembly (clang, -O0):
<uninit_feof>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x8(%rbp),%rdi
call   1030 <feof@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninit_feof>:
jmp    1030 <feof@plt>

LLVM IR (-O0):
define void @uninit_feof() {
%1 = alloca i32*
%2 = load i32*, i32** %1
%3 = call i32 @feof(i32* %2)
ret void
}

LLVM IR (-O2):
define void @uninit_feof() {
%1 = tail call i32 @feof(i32* undef)
ret void
}
unsigned int _packlh2(unsigned int src1, unsigned int src2) {
  unsigned v0 = src1 << 16;
  unsigned v1 = (src2 >> 16) & 0xffff;
  unsigned v = v0 | v1;
  return v;
}


x86 assembly (clang, -O0):
<_packlh2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x10,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x10,%eax
and    $0xffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_packlh2>:
mov    %edi,%eax
shld   $0x10,%esi,%eax
ret

LLVM IR (-O0):
define i32 @_packlh2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = load i32, i32* %3
%9 = shl i32 %8, 16
store i32 %9, i32* %5
%10 = load i32, i32* %4
%11 = lshr i32 %10, 16
%12 = and i32 %11, 65535
store i32 %12, i32* %6
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = or i32 %13, %14
store i32 %15, i32* %7
%16 = load i32, i32* %7
ret i32 %16
}

LLVM IR (-O2):
define i32 @_packlh2(i32 %0, i32 %1) {
%3 = tail call i32 @llvm.fshl.i32(i32 %0, i32 %1, i32 16)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ putc(char, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void writeCharacter(char character) { putc(character, stdout); }


x86 assembly (clang, -O0):
<writeCharacter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
mov    0x2eb8(%rip),%rcx
mov    (%rcx),%esi
movsbl %al,%edi
call   1030 <putc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<writeCharacter>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <putc@plt>

LLVM IR (-O0):
@stdout = global i32 0
define void @writeCharacter(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = load i32, i32* @stdout
%5 = call i32 @putc(i8 signext %3, i32 %4)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @writeCharacter(i8 signext %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @putc(i8 signext %0, i32 %2)
ret void
}
int fn6(int x) { return (unsigned)~x | x; }


x86 assembly (clang, -O0):
<fn6>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
or     -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn6>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @fn6(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = xor i32 %3, -1
%5 = load i32, i32* %2
%6 = or i32 %4, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @fn6(i32 %0) {
ret i32 -1
}
/* Type definitions */
struct ccnl_relay_s {
  int dummy;
};

/* Variables and functions */
unsigned long ccnl_run_events();
unsigned long ccnl_rfduino_run_events(struct ccnl_relay_s *relay) {
  unsigned long timeout = ccnl_run_events();
  if (timeout)
    return timeout / 1000;
  else
    return 10;
}


x86 assembly (clang, -O0):
<ccnl_rfduino_run_events>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <ccnl_run_events@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1149 <ccnl_rfduino_run_events+0x39>
mov    -0x18(%rbp),%rax
mov    $0x3e8,%ecx
xor    %edx,%edx
div    %rcx
mov    %rax,-0x8(%rbp)
jmp    1151 <ccnl_rfduino_run_events+0x41>
movq   $0xa,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccnl_rfduino_run_events>:
push   %rax
xor    %eax,%eax
call   1030 <ccnl_run_events@plt>
test   %rax,%rax
je     1137 <ccnl_rfduino_run_events+0x27>
shr    $0x3,%rax
movabs $0x20c49ba5e353f7cf,%rcx
9b c4 20
mul    %rcx
mov    %rdx,%rax
shr    $0x4,%rax
pop    %rcx
ret
mov    $0xa,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.ccnl_relay_s = type { i32 }
define i64 @ccnl_rfduino_run_events(%struct.ccnl_relay_s* %0) {
%2 = alloca i64
%3 = alloca %struct.ccnl_relay_s*
%4 = alloca i64
store %struct.ccnl_relay_s* %0, %struct.ccnl_relay_s** %3
%5 = call i64 (...) @ccnl_run_events()
store i64 %5, i64* %4
%6 = load i64, i64* %4
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i64, i64* %4
%10 = udiv i64 %9, 1000
store i64 %10, i64* %2
br label %12
11: ; preds = %1
store i64 10, i64* %2
br label %12
12: ; preds = %11, %8
%13 = load i64, i64* %2
ret i64 %13
}

LLVM IR (-O2):
%struct.ccnl_relay_s = type { i32 }
define i64 @ccnl_rfduino_run_events(%struct.ccnl_relay_s* nocapture readnone %0) {
%2 = tail call i64 (...) @ccnl_run_events()
%3 = icmp eq i64 %2, 0
%4 = udiv i64 %2, 1000
%5 = select i1 %3, i64 10, i64 %4
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ UPnPResponse_RenderingControl_SetGreenVideoGain(void *);
int /*<<< orphan*/ printf(char *, unsigned int, unsigned short);
void UPnPRenderingControl_SetGreenVideoGain(
    void *upnptoken, unsigned int InstanceID,
    unsigned short DesiredGreenVideoGain) {
  printf("Invoke: UPnPRenderingControl_SetGreenVideoGain(%u,%u);\r\n",
         InstanceID, DesiredGreenVideoGain);
  UPnPResponse_RenderingControl_SetGreenVideoGain(upnptoken);
}


x86 assembly (clang, -O0):
<UPnPRenderingControl_SetGreenVideoGain>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dx,%ax
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %ax,-0xe(%rbp)
mov    -0xc(%rbp),%esi
lea    0xec0(%rip),%rdi
movzwl -0xe(%rbp),%edx
call   1030 <printf@plt>
mov    -0x8(%rbp),%rdi
call   1040 <UPnPResponse_RenderingControl_SetGreenVideoGain@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UPnPRenderingControl_SetGreenVideoGain>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <UPnPResponse_RenderingControl_SetGreenVideoGain@plt>

LLVM IR (-O0):
@.str = [57 x i8] c"Invoke: UPnPRenderingControl_SetGreenVideoGain(%u,%u);\0D\0A\00"
define void @UPnPRenderingControl_SetGreenVideoGain(i8* %0, i32 %1, i16 zeroext %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i16
store i8* %0, i8** %4
store i32 %1, i32* %5
store i16 %2, i16* %6
%7 = load i32, i32* %5
%8 = load i16, i16* %6
%9 = call i32 @printf(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0), i32 %7, i16 zeroext %8)
%10 = load i8*, i8** %4
%11 = call i32 @UPnPResponse_RenderingControl_SetGreenVideoGain(i8* %10)
ret void
}

LLVM IR (-O2):
@.str = [57 x i8] c"Invoke: UPnPRenderingControl_SetGreenVideoGain(%u,%u);\0D\0A\00"
define void @UPnPRenderingControl_SetGreenVideoGain(i8* %0, i32 %1, i16 zeroext %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0), i32 %1, i16 zeroext %2)
%5 = tail call i32 @UPnPResponse_RenderingControl_SetGreenVideoGain(i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int dll_feof(int /*<<< orphan*/ *);
int __wrap_feof(FILE *stream) { return dll_feof(stream); }


x86 assembly (clang, -O0):
<__wrap_feof>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dll_feof@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__wrap_feof>:
jmp    1030 <dll_feof@plt>

LLVM IR (-O0):
define i32 @__wrap_feof(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @dll_feof(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @__wrap_feof(i32* %0) {
%2 = tail call i32 @dll_feof(i32* %0)
ret i32 %2
}
int function(void) { return 23; }


x86 assembly (clang, -O0):
<function>:
push   %rbp
mov    %rsp,%rbp
mov    $0x17,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<function>:
mov    $0x17,%eax
ret

LLVM IR (-O0):
define i32 @function() {
ret i32 23
}

LLVM IR (-O2):
define i32 @function() {
ret i32 23
}
/* Variables and functions */
int GL_COLOR_BUFFER_BIT;
int GL_DEPTH_BUFFER_BIT;
int GL_STENCIL_BUFFER_BIT;
int /*<<< orphan*/ SetCamera();
int /*<<< orphan*/ do_display();
int /*<<< orphan*/ glClear(int);
int /*<<< orphan*/ glLoadIdentity();
int /*<<< orphan*/ glutSwapBuffers();
void display(void) {
  glLoadIdentity();
  SetCamera();
  glClear(GL_COLOR_BUFFER_BIT | GL_DEPTH_BUFFER_BIT | GL_STENCIL_BUFFER_BIT);
  do_display();
  glutSwapBuffers();
}


x86 assembly (clang, -O0):
<display>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1060 <glLoadIdentity@plt>
mov    $0x0,%al
call   1070 <SetCamera@plt>
mov    0x2e67(%rip),%rax
mov    (%rax),%edi
mov    0x2e76(%rip),%rax
or     (%rax),%edi
mov    0x2e5d(%rip),%rax
or     (%rax),%edi
call   1030 <glClear@plt>
mov    $0x0,%al
call   1040 <do_display@plt>
mov    $0x0,%al
call   1050 <glutSwapBuffers@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display>:
push   %rax
xor    %eax,%eax
call   1060 <glLoadIdentity@plt>
xor    %eax,%eax
call   1070 <SetCamera@plt>
mov    0x2e6a(%rip),%rax
mov    0x2e7b(%rip),%rcx
mov    (%rcx),%edi
or     (%rax),%edi
mov    0x2e60(%rip),%rax
or     (%rax),%edi
call   1030 <glClear@plt>
xor    %eax,%eax
call   1040 <do_display@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <glutSwapBuffers@plt>

LLVM IR (-O0):
@GL_COLOR_BUFFER_BIT = global i32 0
@GL_DEPTH_BUFFER_BIT = global i32 0
@GL_STENCIL_BUFFER_BIT = global i32 0
define void @display() {
%1 = call i32 (...) @glLoadIdentity()
%2 = call i32 (...) @SetCamera()
%3 = load i32, i32* @GL_COLOR_BUFFER_BIT
%4 = load i32, i32* @GL_DEPTH_BUFFER_BIT
%5 = or i32 %3, %4
%6 = load i32, i32* @GL_STENCIL_BUFFER_BIT
%7 = or i32 %5, %6
%8 = call i32 @glClear(i32 %7)
%9 = call i32 (...) @do_display()
%10 = call i32 (...) @glutSwapBuffers()
ret void
}

LLVM IR (-O2):
@GL_COLOR_BUFFER_BIT = global i32 0
@GL_DEPTH_BUFFER_BIT = global i32 0
@GL_STENCIL_BUFFER_BIT = global i32 0
define void @display() {
%1 = tail call i32 (...) @glLoadIdentity()
%2 = tail call i32 (...) @SetCamera()
%3 = load i32, i32* @GL_COLOR_BUFFER_BIT
%4 = load i32, i32* @GL_DEPTH_BUFFER_BIT
%5 = or i32 %4, %3
%6 = load i32, i32* @GL_STENCIL_BUFFER_BIT
%7 = or i32 %5, %6
%8 = tail call i32 @glClear(i32 %7)
%9 = tail call i32 (...) @do_display()
%10 = tail call i32 (...) @glutSwapBuffers()
ret void
}
void dummy_function_empty_body_to_force_call(void) {}


x86 assembly (clang, -O0):
<dummy_function_empty_body_to_force_call>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy_function_empty_body_to_force_call>:
ret

LLVM IR (-O0):
define void @dummy_function_empty_body_to_force_call() {
ret void
}

LLVM IR (-O2):
define void @dummy_function_empty_body_to_force_call() {
ret void
}
void gtk_action_group_add_actions_full() {}


x86 assembly (clang, -O0):
<gtk_action_group_add_actions_full>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_action_group_add_actions_full>:
ret

LLVM IR (-O0):
define void @gtk_action_group_add_actions_full() {
ret void
}

LLVM IR (-O2):
define void @gtk_action_group_add_actions_full() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ scrputs(char *);
void scrclrlnl(void) { scrputs("\033[0K"); }


x86 assembly (clang, -O0):
<scrclrlnl>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <scrputs@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<scrclrlnl>:
lea    0xee9(%rip),%rdi
jmp    1030 <scrputs@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"\1B[0K\00"
define void @scrclrlnl() {
%1 = call i32 @scrputs(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"\1B[0K\00"
define void @scrclrlnl() {
%1 = tail call i32 @scrputs(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ myisalpha(char);
char mytolower(char ch) {
  if (myisalpha(ch)) {
    if (ch >= 'A' && ch <= 'Z') {
      ch += 'a' - 'A';
    }
  }
  return ch;
}


x86 assembly (clang, -O0):
<mytolower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <myisalpha@plt>
cmp    $0x0,%rax
je     115a <mytolower+0x4a>
movsbl -0x1(%rbp),%eax
cmp    $0x41,%eax
jl     1155 <mytolower+0x45>
movsbl -0x1(%rbp),%eax
cmp    $0x5a,%eax
jg     1155 <mytolower+0x45>
movsbl -0x1(%rbp),%eax
add    $0x20,%eax
mov    %al,-0x1(%rbp)
jmp    115a <mytolower+0x4a>
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mytolower>:
push   %rbx
mov    %edi,%ebx
call   1030 <myisalpha@plt>
lea    0x20(%rbx),%ecx
test   %rax,%rax
movzbl %cl,%eax
cmove  %ebx,%eax
lea    -0x41(%rbx),%ecx
cmp    $0x1a,%cl
cmovae %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define signext i8 @mytolower(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @myisalpha(i8 signext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %20
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sge i32 %8, 65
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp sle i32 %12, 90
br i1 %13, label %14, label %19
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = add nsw i32 %16, 32
%18 = trunc i32 %17 to i8
store i8 %18, i8* %2
br label %19
19: ; preds = %14, %10, %6
br label %20
20: ; preds = %19, %1
%21 = load i8, i8* %2
ret i8 %21
}

LLVM IR (-O2):
define signext i8 @mytolower(i8 signext %0) {
%2 = tail call i64 @myisalpha(i8 signext %0)
%3 = icmp ne i64 %2, 0
%4 = add i8 %0, -65
%5 = icmp ult i8 %4, 26
%6 = and i1 %5, %3
%7 = add i8 %0, 32
%8 = select i1 %6, i8 %7, i8 %0
ret i8 %8
}
/* Variables and functions */
int /*<<< orphan*/ PrintN(int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int N;
  scanf("%d", &N);
  PrintN(N);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1030 <PrintN@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%edi
call   1030 <PrintN@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = call i32 @PrintN(i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @PrintN(i32 %4)
ret i32 0
}
/* Variables and functions */
int FRGL_AVI_GetMonoSamplesRate(void *, short *, int, int);
int avi_getsamples(short *samples, int cnt, void *data) {
  return (FRGL_AVI_GetMonoSamplesRate(data, samples, cnt, 44100));
}


x86 assembly (clang, -O0):
<avi_getsamples>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    $0xac44,%ecx
call   1030 <FRGL_AVI_GetMonoSamplesRate@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avi_getsamples>:
mov    %rdx,%rax
mov    %esi,%edx
mov    %rdi,%rsi
mov    %rax,%rdi
mov    $0xac44,%ecx
jmp    1030 <FRGL_AVI_GetMonoSamplesRate@plt>

LLVM IR (-O0):
define i32 @avi_getsamples(i16* %0, i32 %1, i8* %2) {
%4 = alloca i16*
%5 = alloca i32
%6 = alloca i8*
store i16* %0, i16** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = load i16*, i16** %4
%9 = load i32, i32* %5
%10 = call i32 @FRGL_AVI_GetMonoSamplesRate(i8* %7, i16* %8, i32 %9, i32 44100)
ret i32 %10
}

LLVM IR (-O2):
define i32 @avi_getsamples(i16* %0, i32 %1, i8* %2) {
%4 = tail call i32 @FRGL_AVI_GetMonoSamplesRate(i8* %2, i16* %0, i32 %1, i32 44100)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ FlightStatsHandle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void FlightStatsUpdated() { UAVObjUpdated(FlightStatsHandle()); }


x86 assembly (clang, -O0):
<FlightStatsUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <FlightStatsHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FlightStatsUpdated>:
push   %rax
xor    %eax,%eax
call   1030 <FlightStatsHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @FlightStatsUpdated() {
%1 = call i32 (...) @FlightStatsHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @FlightStatsUpdated() {
%1 = tail call i32 (...) @FlightStatsHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int n = 42;
  printf("The value of n is %d.\n", n);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x2a,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x2a,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"The value of n is %d.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 42, i32* %1
%2 = load i32, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [23 x i8] c"The value of n is %d.\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 42)
ret i32 0
}
/* Variables and functions */
int rand();
int getRandomNum(int max) {
  int res = 1 + rand() % max;
  return res;
}


x86 assembly (clang, -O0):
<getRandomNum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cltd
idivl  -0x4(%rbp)
add    $0x1,%edx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getRandomNum>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %ebx
lea    0x1(%rdx),%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @getRandomNum(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 (...) @rand()
%5 = load i32, i32* %2
%6 = srem i32 %4, %5
%7 = add nsw i32 1, %6
store i32 %7, i32* %3
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @getRandomNum(i32 %0) {
%2 = tail call i32 (...) @rand()
%3 = srem i32 %2, %0
%4 = add nsw i32 %3, 1
ret i32 %4
}
double StraightUp(double x, double min, double max) {
  if (max == min) {
    return (0.0);
  }
  if (x < min) {
    return (0.0);
  }
  if (x > max) {
    return (1.0);
  }
  return ((x - min) / (max - min));
}


x86 assembly (clang, -O0):
<StraightUp>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  %xmm2,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
ucomisd -0x18(%rbp),%xmm0
jne    1136 <StraightUp+0x36>
jp     1136 <StraightUp+0x36>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1196 <StraightUp+0x96>
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1157 <StraightUp+0x57>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1196 <StraightUp+0x96>
movsd  -0x10(%rbp),%xmm0
ucomisd -0x20(%rbp),%xmm0
jbe    1179 <StraightUp+0x79>
movsd  0xe91(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1196 <StraightUp+0x96>
movsd  -0x10(%rbp),%xmm0
subsd  -0x18(%rbp),%xmm0
movsd  -0x20(%rbp),%xmm1
subsd  -0x18(%rbp),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<StraightUp>:
ucomisd %xmm0,%xmm1
xorpd  %xmm3,%xmm3
ja     1131 <StraightUp+0x31>
ucomisd %xmm1,%xmm2
jne    1112 <StraightUp+0x12>
jnp    1131 <StraightUp+0x31>
ucomisd %xmm2,%xmm0
jbe    1121 <StraightUp+0x21>
movsd  0xee0(%rip),%xmm0
ret
subsd  %xmm1,%xmm0
subsd  %xmm1,%xmm2
divsd  %xmm2,%xmm0
movapd %xmm0,%xmm3
movapd %xmm3,%xmm0
ret

LLVM IR (-O0):
define double @StraightUp(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
%8 = load double, double* %7
%9 = load double, double* %6
%10 = fcmp oeq double %8, %9
br i1 %10, label %11, label %12
11: ; preds = %3
store double 0.000000e+00, double* %4
br label %30
12: ; preds = %3
%13 = load double, double* %5
%14 = load double, double* %6
%15 = fcmp olt double %13, %14
br i1 %15, label %16, label %17
16: ; preds = %12
store double 0.000000e+00, double* %4
br label %30
17: ; preds = %12
%18 = load double, double* %5
%19 = load double, double* %7
%20 = fcmp ogt double %18, %19
br i1 %20, label %21, label %22
21: ; preds = %17
store double 1.000000e+00, double* %4
br label %30
22: ; preds = %17
%23 = load double, double* %5
%24 = load double, double* %6
%25 = fsub double %23, %24
%26 = load double, double* %7
%27 = load double, double* %6
%28 = fsub double %26, %27
%29 = fdiv double %25, %28
store double %29, double* %4
br label %30
30: ; preds = %22, %21, %16, %11
%31 = load double, double* %4
ret double %31
}

LLVM IR (-O2):
define double @StraightUp(double %0, double %1, double %2) {
%4 = fcmp oeq double %2, %1
%5 = fcmp olt double %0, %1
%6 = or i1 %5, %4
br i1 %6, label %13, label %7
7: ; preds = %3
%8 = fcmp ogt double %0, %2
br i1 %8, label %13, label %9
9: ; preds = %7
%10 = fsub double %0, %1
%11 = fsub double %2, %1
%12 = fdiv double %10, %11
br label %13
13: ; preds = %7, %3, %9
%14 = phi double [ %12, %9 ], [ 0.000000e+00, %3 ], [ 1.000000e+00, %7 ]
ret double %14
}
/* Type definitions */
struct termios {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int tcgetattr(int filedes, struct termios *termios_p) {
  (void)filedes;
  (void)termios_p;
  puts("tcgetattr: not implemented");
  return -1;
}


x86 assembly (clang, -O0):
<tcgetattr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcgetattr>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.termios = type { i32 }
@.str = [27 x i8] c"tcgetattr: not implemented\00"
define i32 @tcgetattr(i32 %0, %struct.termios* %1) {
%3 = alloca i32
%4 = alloca %struct.termios*
store i32 %0, i32* %3
store %struct.termios* %1, %struct.termios** %4
%5 = load i32, i32* %3
%6 = load %struct.termios*, %struct.termios** %4
%7 = call i32 @puts(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
%struct.termios = type { i32 }
@.str = [27 x i8] c"tcgetattr: not implemented\00"
define i32 @tcgetattr(i32 %0, %struct.termios* nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}
int soma(int n, int m) { return n + m; }


x86 assembly (clang, -O0):
<soma>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<soma>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @soma(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @soma(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
int test_imm_CFint32_mem(int *val) {
  return ((*val) & (0xCF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CFint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xcf,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CFint32_mem>:
testb  $0xcf,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CFint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 207
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_CFint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 207
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct event {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct event *);
void event_free(struct event *evt) { free(evt); }


x86 assembly (clang, -O0):
<event_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.event = type { i32 }
define void @event_free(%struct.event* %0) {
%2 = alloca %struct.event*
store %struct.event* %0, %struct.event** %2
%3 = load %struct.event*, %struct.event** %2
%4 = call i32 @free(%struct.event* %3)
ret void
}

LLVM IR (-O2):
%struct.event = type { i32 }
define void @event_free(%struct.event* nocapture %0) {
%2 = tail call i32 @free(%struct.event* %0)
ret void
}
void ff_hevc_put_hevc_uni_w_epel_v8_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_epel_v8_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_epel_v8_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_epel_v8_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_epel_v8_10_sse4() {
ret void
}
/* Variables and functions */
scalar_t__ isprint(unsigned char);
int /*<<< orphan*/ printf(char *, unsigned char);
int /*<<< orphan*/ putchar(unsigned char);
void quotechar(unsigned char c) {
  if (isprint(c))
    putchar(c);
  else
    printf("\\x%02x", c);
}


x86 assembly (clang, -O0):
<quotechar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1050 <isprint@plt>
cmp    $0x0,%rax
je     115f <quotechar+0x2f>
movzbl -0x1(%rbp),%edi
call   1030 <putchar@plt>
jmp    116f <quotechar+0x3f>
lea    0xe9a(%rip),%rdi
movzbl -0x1(%rbp),%esi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quotechar>:
push   %rbx
mov    %edi,%ebx
call   1050 <isprint@plt>
test   %rax,%rax
je     1146 <quotechar+0x16>
movzbl %bl,%edi
pop    %rbx
jmp    1030 <putchar@plt>
movzbl %bl,%esi
lea    0xeb0(%rip),%rdi
pop    %rbx
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"\\x%02x\00"
define void @quotechar(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @isprint(i8 zeroext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i8, i8* %2
%8 = call i32 @putchar(i8 zeroext %7)
br label %12
9: ; preds = %1
%10 = load i8, i8* %2
%11 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8 zeroext %10)
br label %12
12: ; preds = %9, %6
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"\\x%02x\00"
define void @quotechar(i8 zeroext %0) {
%2 = tail call i64 @isprint(i8 zeroext %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @putchar(i8 zeroext %0)
br label %8
6: ; preds = %1
%7 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8 zeroext %0)
br label %8
8: ; preds = %6, %4
ret void
}
int test_imm_C0int8_mem(signed char *val) {
  return ((*val) & (0xC0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C0int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xc0,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C0int8_mem>:
cmpb   $0x40,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C0int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 192
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C0int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp ult i8 %2, 64
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ int64_t;

/* Variables and functions */
int64_t bmax_int64(int64_t a, int64_t b) { return (a > b ? a : b); }


x86 assembly (clang, -O0):
<bmax_int64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jle    1127 <bmax_int64+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <bmax_int64+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bmax_int64>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovg  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @bmax_int64(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sgt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @bmax_int64(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0x53() {
  Assert_real((isdigit(83) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              420, ("isdigit should be 0 for S"));
}


x86 assembly (clang, -O0):
<t_isdigit_0x53>:
push   %rbp
mov    %rsp,%rbp
mov    $0x53,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x1a4,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0x53>:
push   %rax
mov    $0x53,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x1a4,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [26 x i8] c"isdigit should be 0 for S\00"
define void @t_isdigit_0x53() {
%1 = call i64 @isdigit(i32 83)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 420, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [26 x i8] c"isdigit should be 0 for S\00"
define void @t_isdigit_0x53() {
%1 = tail call i64 @isdigit(i32 83)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 420, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void single_i() {
  register int out0 = 0;
  asm("foo %1,%0" : "=r"(out0) : "i"(1));
}


x86 assembly (clang, -O0):
x86 assembly (clang, -O2):
<single_i>:
ret

LLVM IR (-O0):
LLVM IR (-O2):
define void @single_i() {
%1 = tail call i32 asm "foo $1,$0", "=r,i,~{dirflag},~{fpsr},~{flags}"(i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ f(int, int);
int main() {
  f(12, 120);
  f(27, 270);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc,%edi
mov    $0x78,%esi
call   1030 <f@plt>
mov    $0x1b,%edi
mov    $0x10e,%esi
call   1030 <f@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xc,%edi
mov    $0x78,%esi
call   1030 <f@plt>
mov    $0x1b,%edi
mov    $0x10e,%esi
call   1030 <f@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @f(i32 12, i32 120)
%2 = call i32 @f(i32 27, i32 270)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @f(i32 12, i32 120)
%2 = tail call i32 @f(i32 27, i32 270)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fatal(char *);
void *malloc(unsigned int const);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, unsigned int const);
void *smalloc(const unsigned int size) {
  void *ptr;
  ptr = malloc(size);
  if (!ptr)
    fatal("on memory allocation");
  memset(ptr, 0, size);
  return ptr;
}


x86 assembly (clang, -O0):
<smalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    115e <smalloc+0x2e>
lea    0xea7(%rip),%rdi
call   1050 <fatal@plt>
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%edx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smalloc>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    114e <smalloc+0x1e>
lea    0xeb7(%rip),%rdi
call   1050 <fatal@plt>
mov    %rbx,%rdi
xor    %esi,%esi
mov    %ebp,%edx
call   1030 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [21 x i8] c"on memory allocation\00"
define i8* @smalloc(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8* @malloc(i32 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = call i32 @fatal(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
%12 = load i32, i32* %2
%13 = call i32 @memset(i8* %11, i32 0, i32 %12)
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
@.str = [21 x i8] c"on memory allocation\00"
define i8* @smalloc(i32 %0) {
%2 = tail call i8* @malloc(i32 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @fatal(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
%7 = tail call i32 @memset(i8* %2, i32 0, i32 %0)
ret i8* %2
}
void stopIfLetter(char c, int *nb, int *dec) {
  if (c != '-' && c != '+' && c < 48 || c > 57) {
    *nb = 0;
    *dec = 1;
  }
}


x86 assembly (clang, -O0):
<stopIfLetter>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x2d,%eax
je     1139 <stopIfLetter+0x39>
movsbl -0x1(%rbp),%eax
cmp    $0x2b,%eax
je     1139 <stopIfLetter+0x39>
movsbl -0x1(%rbp),%eax
cmp    $0x30,%eax
jl     1146 <stopIfLetter+0x46>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
jle    115a <stopIfLetter+0x5a>
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x18(%rbp),%rax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<stopIfLetter>:
lea    -0x2b(%rdi),%eax
test   $0xfd,%al
setne  %al
cmp    $0x30,%dil
setl   %cl
cmp    $0x39,%dil
jg     111a <stopIfLetter+0x1a>
and    %al,%cl
jne    111a <stopIfLetter+0x1a>
ret
movl   $0x0,(%rsi)
movl   $0x1,(%rdx)
ret

LLVM IR (-O0):
define void @stopIfLetter(i8 signext %0, i32* %1, i32* %2) {
%4 = alloca i8
%5 = alloca i32*
%6 = alloca i32*
store i8 %0, i8* %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i8, i8* %4
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 45
br i1 %9, label %10, label %18
10: ; preds = %3
%11 = load i8, i8* %4
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 43
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load i8, i8* %4
%16 = sext i8 %15 to i32
%17 = icmp slt i32 %16, 48
br i1 %17, label %22, label %18
18: ; preds = %14, %10, %3
%19 = load i8, i8* %4
%20 = sext i8 %19 to i32
%21 = icmp sgt i32 %20, 57
br i1 %21, label %22, label %25
22: ; preds = %18, %14
%23 = load i32*, i32** %5
store i32 0, i32* %23
%24 = load i32*, i32** %6
store i32 1, i32* %24
br label %25
25: ; preds = %22, %18
ret void
}

LLVM IR (-O2):
define void @stopIfLetter(i8 signext %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2) {
%4 = icmp ne i8 %0, 45
%5 = icmp ne i8 %0, 43
%6 = and i1 %4, %5
%7 = icmp slt i8 %0, 48
%8 = and i1 %7, %6
%9 = icmp sgt i8 %0, 57
%10 = or i1 %9, %8
br i1 %10, label %11, label %12
11: ; preds = %3
store i32 0, i32* %1
store i32 1, i32* %2
br label %12
12: ; preds = %3, %11
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int sigisemptyset(sigset_t *set) {
  unsigned long *local_set = (unsigned long *)set;
  return *local_set == 0;
}


x86 assembly (clang, -O0):
<sigisemptyset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigisemptyset>:
xor    %eax,%eax
cmpq   $0x0,(%rdi)
sete   %al
ret

LLVM IR (-O0):
define i32 @sigisemptyset(i32* %0) {
%2 = alloca i32*
%3 = alloca i64*
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = bitcast i32* %4 to i64*
store i64* %5, i64** %3
%6 = load i64*, i64** %3
%7 = load i64, i64* %6
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @sigisemptyset(i32* nocapture %0) {
%2 = bitcast i32* %0 to i64*
%3 = load i64, i64* %2
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
void test_max_with_negative_numbers(void) {
  do {
    seatest_assert_int_equal(-1211, ({
      typeof(-23423) _a = (-23423);
      typeof(-1211) _b = (-1211);
      (_a > _b) ? _a : _b;
    }),
                             __FUNCTION__, 40);
  } while (0);
}


x86 assembly (clang, -O0):
<test_max_with_negative_numbers>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xffffa481,-0x4(%rbp)
movl   $0xfffffb45,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    113d <test_max_with_negative_numbers+0x2d>
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1143 <test_max_with_negative_numbers+0x33>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
mov    $0xfffffb45,%edi
lea    0xea8(%rip),%rdx
mov    $0x28,%ecx
mov    $0x0,%al
call   1030 <seatest_assert_int_equal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_max_with_negative_numbers>:
lea    0xee9(%rip),%rdx
mov    $0xfffffb45,%edi
mov    $0xfffffb45,%esi
mov    $0x28,%ecx
xor    %eax,%eax
jmp    1030 <seatest_assert_int_equal@plt>

LLVM IR (-O0):
@__FUNCTION__.test_max_with_negative_numbers = [31 x i8] c"test_max_with_negative_numbers\00"
define void @test_max_with_negative_numbers() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
br label %4
4: ; preds = %0
store i32 -23423, i32* %1
store i32 -1211, i32* %2
%5 = load i32, i32* %1
%6 = load i32, i32* %2
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %4
%9 = load i32, i32* %1
br label %12
10: ; preds = %4
%11 = load i32, i32* %2
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
store i32 %13, i32* %3
%14 = load i32, i32* %3
%15 = call i32 (i32, i32, i8*, i32, ...) bitcast (i32 (...)* @seatest_assert_int_equal to i32 (i32, i32, i8*, i32, ...)*)(i32 -1211, i32 %14, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @__FUNCTION__.test_max_with_negative_numbers, i64 0, i64 0), i32 40)
br label %16
16: ; preds = %12
ret void
}

LLVM IR (-O2):
@__FUNCTION__.test_max_with_negative_numbers = [31 x i8] c"test_max_with_negative_numbers\00"
define void @test_max_with_negative_numbers() {
%1 = tail call i32 (i32, i32, i8*, i32, ...) bitcast (i32 (...)* @seatest_assert_int_equal to i32 (i32, i32, i8*, i32, ...)*)(i32 -1211, i32 -1211, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @__FUNCTION__.test_max_with_negative_numbers, i64 0, i64 0), i32 40)
ret void
}
/* Variables and functions */
double __dtand(double);
double d_tand(double *x) { return __dtand(*x); }


x86 assembly (clang, -O0):
<d_tand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
call   1030 <__dtand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d_tand>:
movsd  (%rdi),%xmm0
jmp    1030 <__dtand@plt>

LLVM IR (-O0):
define double @d_tand(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = load double, double* %3
%5 = call double @__dtand(double %4)
ret double %5
}

LLVM IR (-O2):
define double @d_tand(double* nocapture %0) {
%2 = load double, double* %0
%3 = tail call double @__dtand(double %2)
ret double %3
}
void RasterIntRawStatusSet(unsigned int baseAddr, unsigned int flag) {
  (*((volatile unsigned int *)(baseAddr + (0x58)))) |= flag;
}


x86 assembly (clang, -O0):
<RasterIntRawStatusSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edx
mov    -0x4(%rbp),%eax
add    $0x58,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RasterIntRawStatusSet>:
add    $0x58,%edi
or     %esi,(%rdi)
ret

LLVM IR (-O0):
define void @RasterIntRawStatusSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = add i32 %6, 88
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
%10 = load volatile i32, i32* %9
%11 = or i32 %10, %5
store volatile i32 %11, i32* %9
ret void
}

LLVM IR (-O2):
define void @RasterIntRawStatusSet(i32 %0, i32 %1) {
%3 = add i32 %0, 88
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = or i32 %6, %1
store volatile i32 %7, i32* %5
ret void
}