xunge/DecIR huggingface dataset:
void ldouble_test_call(void) {}


x86 assembly (clang, -O0):
<ldouble_test_call>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ldouble_test_call>:
ret

LLVM IR (-O0):
define void @ldouble_test_call() {
ret void
}

LLVM IR (-O2):
define void @ldouble_test_call() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ rsp_run_async();
__attribute__((deprecated("use rsp_run_async instead"))) void run_ucode(void) {
  rsp_run_async();
}


x86 assembly (clang, -O0):
<run_ucode>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rsp_run_async@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<run_ucode>:
xor    %eax,%eax
jmp    1030 <rsp_run_async@plt>

LLVM IR (-O0):
define void @run_ucode() {
%1 = call i32 (...) @rsp_run_async()
ret void
}

LLVM IR (-O2):
define void @run_ucode() {
%1 = tail call i32 (...) @rsp_run_async()
ret void
}
int numberOf1InBinary(int n) {
  int c = 0;
  if (n < 0) {
    c++;
    n = -n;
  }
  while (n > 0) {
    c += 1 & n;
    n >>= 1;
  }
  return c;
}


x86 assembly (clang, -O0):
<numberOf1InBinary>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1129 <numberOf1InBinary+0x29>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    112e <numberOf1InBinary+0x2e>
cmpl   $0x0,-0x4(%rbp)
jle    1152 <numberOf1InBinary+0x52>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    112e <numberOf1InBinary+0x2e>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<numberOf1InBinary>:
test   %edi,%edi
je     1131 <numberOf1InBinary+0x31>
mov    %edi,%eax
shr    $0x1f,%eax
mov    %edi,%ecx
neg    %ecx
cmovs  %edi,%ecx
mov    %ecx,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %ecx,%esi
and    $0x1,%esi
add    %esi,%eax
shr    %edx
cmp    $0x1,%ecx
mov    %edx,%ecx
ja     1120 <numberOf1InBinary+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @numberOf1InBinary(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 1
store i32 %8, i32* %3
%9 = load i32, i32* %2
%10 = sub nsw i32 0, %9
store i32 %10, i32* %2
br label %11
11: ; preds = %6, %1
br label %12
12: ; preds = %15, %11
%13 = load i32, i32* %2
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %22
15: ; preds = %12
%16 = load i32, i32* %2
%17 = and i32 1, %16
%18 = load i32, i32* %3
%19 = add nsw i32 %18, %17
store i32 %19, i32* %3
%20 = load i32, i32* %2
%21 = ashr i32 %20, 1
store i32 %21, i32* %2
br label %12
22: ; preds = %12
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @numberOf1InBinary(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %13, label %3
3: ; preds = %1
%4 = lshr i32 %0, 31
%5 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
br label %6
6: ; preds = %3, %6
%7 = phi i32 [ %10, %6 ], [ %4, %3 ]
%8 = phi i32 [ %11, %6 ], [ %5, %3 ]
%9 = and i32 %8, 1
%10 = add nuw nsw i32 %7, %9
%11 = lshr i32 %8, 1
%12 = icmp ult i32 %8, 2
br i1 %12, label %13, label %6
13: ; preds = %6, %1
%14 = phi i32 [ 0, %1 ], [ %10, %6 ]
ret i32 %14
}
char *asctime(timeptr) __const struct tm *timeptr;
{
  static char timebuf[26];
  if (timeptr == 0)
    return 0;
  __asctime(timebuf, timeptr);
  return timebuf;
}


x86 assembly (clang, -O0):
<asctime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1134 <asctime+0x24>
movq   $0x0,-0x8(%rbp)
jmp    1151 <asctime+0x41>
mov    -0x10(%rbp),%rsi
lea    0x2f01(%rip),%rdi
mov    $0x0,%al
call   1030 <__asctime@plt>
lea    0x2ef3(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<asctime>:
push   %rbx
test   %rdi,%rdi
je     112c <asctime+0x1c>
mov    %rdi,%rsi
lea    0x2f20(%rip),%rbx
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <__asctime@plt>
jmp    112e <asctime+0x1e>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.tm = type opaque
@asctime.timebuf = internal global [26 x i8] zeroinitializer
define i8* @asctime(%struct.tm* %0) {
%2 = alloca i8*
%3 = alloca %struct.tm*
store %struct.tm* %0, %struct.tm** %3
%4 = load %struct.tm*, %struct.tm** %3
%5 = icmp eq %struct.tm* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
store i8* null, i8** %2
br label %10
7: ; preds = %1
%8 = load %struct.tm*, %struct.tm** %3
%9 = call i32 (i8*, %struct.tm*, ...) bitcast (i32 (...)* @__asctime to i32 (i8*, %struct.tm*, ...)*)(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @asctime.timebuf, i64 0, i64 0), %struct.tm* %8)
store i8* getelementptr inbounds ([26 x i8], [26 x i8]* @asctime.timebuf, i64 0, i64 0), i8** %2
br label %10
10: ; preds = %7, %6
%11 = load i8*, i8** %2
ret i8* %11
}

LLVM IR (-O2):
%struct.tm = type opaque
@asctime.timebuf = internal global [26 x i8] zeroinitializer
define i8* @asctime(%struct.tm* %0) {
%2 = icmp eq %struct.tm* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 (i8*, %struct.tm*, ...) bitcast (i32 (...)* @__asctime to i32 (i8*, %struct.tm*, ...)*)(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @asctime.timebuf, i64 0, i64 0), %struct.tm* %0)
br label %5
5: ; preds = %1, %3
%6 = phi i8* [ getelementptr inbounds ([26 x i8], [26 x i8]* @asctime.timebuf, i64 0, i64 0), %3 ], [ null, %1 ]
ret i8* %6
}
/* Variables and functions */
int fd_compare(const void *fd1, const size_t l1, const void *fd2,
               const size_t l2) {
  return fd1 == fd2;
}


x86 assembly (clang, -O0):
<fd_compare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x18(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fd_compare>:
xor    %eax,%eax
cmp    %rdx,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @fd_compare(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %7
%11 = icmp eq i8* %9, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @fd_compare(i8* readnone %0, i64 %1, i8* readnone %2, i64 %3) {
%5 = icmp eq i8* %0, %2
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int check_arg_count(int, int /*<<< orphan*/);
int /*<<< orphan*/ delch();
int /*<<< orphan*/ report_count(int);
int /*<<< orphan*/ report_return(int /*<<< orphan*/);
void cmd_delch(int nargs, char **args) {
  if (check_arg_count(nargs, 0) == 1)
    return;
  report_count(1);
  report_return(delch());
}


x86 assembly (clang, -O0):
<cmd_delch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1040 <check_arg_count@plt>
cmp    $0x1,%eax
jne    1167 <cmd_delch+0x27>
jmp    117f <cmd_delch+0x3f>
mov    $0x1,%edi
call   1050 <report_count@plt>
mov    $0x0,%al
call   1060 <delch@plt>
mov    %eax,%edi
call   1030 <report_return@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_delch>:
push   %rax
xor    %esi,%esi
call   1040 <check_arg_count@plt>
cmp    $0x1,%eax
jne    114f <cmd_delch+0xf>
pop    %rax
ret
mov    $0x1,%edi
call   1050 <report_count@plt>
xor    %eax,%eax
call   1060 <delch@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <report_return@plt>

LLVM IR (-O0):
define void @cmd_delch(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = call i32 @check_arg_count(i32 %5, i32 0)
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %2
br label %13
9: ; preds = %2
%10 = call i32 @report_count(i32 1)
%11 = call i32 (...) @delch()
%12 = call i32 @report_return(i32 %11)
br label %13
13: ; preds = %9, %8
ret void
}

LLVM IR (-O2):
define void @cmd_delch(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @check_arg_count(i32 %0, i32 0)
%4 = icmp eq i32 %3, 1
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i32 @report_count(i32 1)
%7 = tail call i32 (...) @delch()
%8 = tail call i32 @report_return(i32 %7)
br label %9
9: ; preds = %2, %5
ret void
}
/* Type definitions */
struct st_queue {
  int dummy;
};

/* Variables and functions */
int queue_push(struct st_queue *qu) {
  if (NULL == qu) {
    return -1;
  }
}


x86 assembly (clang, -O0):
<queue_push>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
xor    %eax,%eax
cmp    -0x10(%rbp),%rax
jne    111b <queue_push+0x1b>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<queue_push>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.st_queue = type { i32 }
define i32 @queue_push(%struct.st_queue* %0) {
%2 = alloca i32
%3 = alloca %struct.st_queue*
store %struct.st_queue* %0, %struct.st_queue** %3
%4 = load %struct.st_queue*, %struct.st_queue** %3
%5 = icmp eq %struct.st_queue* null, %4
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 -1, i32* %2
br label %7
7: ; preds = %6, %1
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
%struct.st_queue = type { i32 }
define i32 @queue_push(%struct.st_queue* readnone %0) {
ret i32 -1
}
/* Variables and functions */
int kvm_uread(void *kd, void *p, unsigned long uva, void *buf, size_t len) {
  return (0);
}


x86 assembly (clang, -O0):
<kvm_uread>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kvm_uread>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @kvm_uread(i8* %0, i8* %1, i64 %2, i8* %3, i64 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i8*
%10 = alloca i64
store i8* %0, i8** %6
store i8* %1, i8** %7
store i64 %2, i64* %8
store i8* %3, i8** %9
store i64 %4, i64* %10
ret i32 0
}

LLVM IR (-O2):
define i32 @kvm_uread(i8* nocapture readnone %0, i8* nocapture readnone %1, i64 %2, i8* nocapture readnone %3, i64 %4) {
ret i32 0
}
void RAND_event(void) {}


x86 assembly (clang, -O0):
<RAND_event>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RAND_event>:
ret

LLVM IR (-O0):
define void @RAND_event() {
ret void
}

LLVM IR (-O2):
define void @RAND_event() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int /*<<< orphan*/ __pmp_scheduler_init(int, int, int /*<<< orphan*/,
                                        int /*<<< orphan*/, int /*<<< orphan*/,
                                        int /*<<< orphan*/);
void __ompc_scheduler_init_8(int global_id, int sched, int64_t lower,
                             int64_t upper, int64_t inc, int64_t chunk) {
  ;
  __pmp_scheduler_init(global_id, sched, lower, upper, inc, chunk);
}


x86 assembly (clang, -O0):
<__ompc_scheduler_init_8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    -0x18(%rbp),%r9d
call   1030 <__pmp_scheduler_init@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ompc_scheduler_init_8>:
jmp    1030 <__pmp_scheduler_init@plt>

LLVM IR (-O0):
define void @__ompc_scheduler_init_8(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = load i32, i32* %10
%17 = load i32, i32* %11
%18 = load i32, i32* %12
%19 = call i32 @__pmp_scheduler_init(i32 %13, i32 %14, i32 %15, i32 %16, i32 %17, i32 %18)
ret void
}

LLVM IR (-O2):
define void @__ompc_scheduler_init_8(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = tail call i32 @__pmp_scheduler_init(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5)
ret void
}
/* Variables and functions */
double log(int);
int log2(int N) { return (int)(log(N) * 1.44269504088896340736); }


x86 assembly (clang, -O0):
<log2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <log@plt>
movsd  0xed5(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log2>:
push   %rax
call   1030 <log@plt>
mulsd  0xee2(%rip),%xmm0
cvttsd2si %xmm0,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @log2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call double @log(i32 %3)
%5 = fmul double %4, 0x3FF71547652B82FE
%6 = fptosi double %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @log2(i32 %0) {
%2 = tail call double @log(i32 %0)
%3 = fmul double %2, 0x3FF71547652B82FE
%4 = fptosi double %3 to i32
ret i32 %4
}
int ceil_log2_int32(unsigned num) {
  int res = 31 - __builtin_clz(num);
  res += (num & (num - 1)) ? 1 : 0;
  return res;
}


x86 assembly (clang, -O0):
<ceil_log2_int32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
bsr    %eax,%ecx
xor    $0x1f,%ecx
mov    $0x1f,%eax
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
and    %eax,%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceil_log2_int32>:
bsr    %edi,%eax
lea    -0x1(%rdi),%ecx
and    %edi,%ecx
cmp    $0x1,%ecx
sbb    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @ceil_log2_int32(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @llvm.ctlz.i32(i32 %4, i1 true)
%6 = sub nsw i32 31, %5
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = load i32, i32* %2
%9 = sub i32 %8, 1
%10 = and i32 %7, %9
%11 = icmp ne i32 %10, 0
%12 = zext i1 %11 to i64
%13 = select i1 %11, i32 1, i32 0
%14 = load i32, i32* %3
%15 = add nsw i32 %14, %13
store i32 %15, i32* %3
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @ceil_log2_int32(i32 %0) {
%2 = tail call i32 @llvm.ctlz.i32(i32 %0, i1 true)
%3 = xor i32 %2, 31
%4 = tail call i32 @llvm.ctpop.i32(i32 %0)
%5 = icmp ugt i32 %4, 1
%6 = zext i1 %5 to i32
%7 = add nuw nsw i32 %3, %6
ret i32 %7
}
void *PhysToVirtSO(unsigned short seg, unsigned short off) {
  return (void *)((seg << 4) | off);
}


x86 assembly (clang, -O0):
<PhysToVirtSO>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movzwl -0x2(%rbp),%eax
shl    $0x4,%eax
movzwl -0x4(%rbp),%ecx
or     %ecx,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<PhysToVirtSO>:
mov    %edi,%ecx
shl    $0x4,%rcx
mov    %esi,%eax
or     %rcx,%rax
ret

LLVM IR (-O0):
define i8* @PhysToVirtSO(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = shl i32 %6, 4
%8 = load i16, i16* %4
%9 = zext i16 %8 to i32
%10 = or i32 %7, %9
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i8*
ret i8* %12
}

LLVM IR (-O2):
define i8* @PhysToVirtSO(i16 zeroext %0, i16 zeroext %1) {
%3 = zext i16 %0 to i64
%4 = shl nuw nsw i64 %3, 4
%5 = zext i16 %1 to i64
%6 = or i64 %4, %5
%7 = inttoptr i64 %6 to i8*
ret i8* %7
}
/* Type definitions */
typedef int /*<<< orphan*/ value;

/* Variables and functions */
int setsockopt(int, int, int, int *, int);
int setsockopt_int(int socket, int level, int option, int value) {
  return setsockopt(socket, level, option, &value, sizeof(value));
}


x86 assembly (clang, -O0):
<setsockopt_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    -0x10(%rbp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setsockopt_int>:
push   %rax
mov    %ecx,0x4(%rsp)
lea    0x4(%rsp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @setsockopt_int(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = call i32 @setsockopt(i32 %9, i32 %10, i32 %11, i32* %8, i32 4)
ret i32 %12
}

LLVM IR (-O2):
define i32 @setsockopt_int(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
store i32 %3, i32* %5
%6 = call i32 @setsockopt(i32 %0, i32 %1, i32 %2, i32* %5, i32 4)
ret i32 %6
}
void zzTraceOut(char *rule) {}


x86 assembly (clang, -O0):
<zzTraceOut>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<zzTraceOut>:
ret

LLVM IR (-O0):
define void @zzTraceOut(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @zzTraceOut(i8* nocapture %0) {
ret void
}
/* Type definitions */
struct parameter {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ pcn_out(int, int, int);
int com_choice(int p0, struct parameter *param) {
  (void)(param);
  pcn_out(p0, 9, 249);
  return 0;
}


x86 assembly (clang, -O0):
<com_choice>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x9,%esi
mov    $0xf9,%edx
call   1030 <pcn_out@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<com_choice>:
push   %rax
mov    $0x9,%esi
mov    $0xf9,%edx
call   1030 <pcn_out@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.parameter = type { i32 }
define i32 @com_choice(i32 %0, %struct.parameter* %1) {
%3 = alloca i32
%4 = alloca %struct.parameter*
store i32 %0, i32* %3
store %struct.parameter* %1, %struct.parameter** %4
%5 = load %struct.parameter*, %struct.parameter** %4
%6 = load i32, i32* %3
%7 = call i32 @pcn_out(i32 %6, i32 9, i32 249)
ret i32 0
}

LLVM IR (-O2):
%struct.parameter = type { i32 }
define i32 @com_choice(i32 %0, %struct.parameter* nocapture readnone %1) {
%3 = tail call i32 @pcn_out(i32 %0, i32 9, i32 249)
ret i32 0
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int orig_stat(char const *, struct stat *);
int rpl_stat(char const *name, struct stat *st) {
  int result = orig_stat(name, st);
  return result;
}


x86 assembly (clang, -O0):
<rpl_stat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <orig_stat@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpl_stat>:
jmp    1030 <orig_stat@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @rpl_stat(i8* %0, %struct.stat* %1) {
%3 = alloca i8*
%4 = alloca %struct.stat*
%5 = alloca i32
store i8* %0, i8** %3
store %struct.stat* %1, %struct.stat** %4
%6 = load i8*, i8** %3
%7 = load %struct.stat*, %struct.stat** %4
%8 = call i32 @orig_stat(i8* %6, %struct.stat* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @rpl_stat(i8* %0, %struct.stat* %1) {
%3 = tail call i32 @orig_stat(i8* %0, %struct.stat* %1)
ret i32 %3
}
const char *SteamAPI_ISteamApps_GetLaunchQueryParam(void *self,
                                                    const char *pchKey) {
  xlogf("%s(self = %p, pchKey = %s)\n", __func__, self, pchKey);
  return "";
}


x86 assembly (clang, -O0):
<SteamAPI_ISteamApps_GetLaunchQueryParam>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xed1(%rip),%rdi
lea    0xee6(%rip),%rsi
mov    $0x0,%al
call   1030 <xlogf@plt>
lea    0xed7(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SteamAPI_ISteamApps_GetLaunchQueryParam>:
push   %rax
mov    %rsi,%rcx
mov    %rdi,%rdx
lea    0xee2(%rip),%rdi
lea    0xef7(%rip),%rsi
xor    %eax,%eax
call   1030 <xlogf@plt>
lea    0xee8(%rip),%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"%s(self = %p, pchKey = %s)\0A\00"
@__func__.SteamAPI_ISteamApps_GetLaunchQueryParam = [40 x i8] c"SteamAPI_ISteamApps_GetLaunchQueryParam\00"
@.str.1 = [1 x i8] zeroinitializer
define i8* @SteamAPI_ISteamApps_GetLaunchQueryParam(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 (i8*, i8*, i8*, i8*, ...) bitcast (i32 (...)* @xlogf to i32 (i8*, i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([40 x i8], [40 x i8]* @__func__.SteamAPI_ISteamApps_GetLaunchQueryParam, i64 0, i64 0), i8* %5, i8* %6)
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [28 x i8] c"%s(self = %p, pchKey = %s)\0A\00"
@__func__.SteamAPI_ISteamApps_GetLaunchQueryParam = [40 x i8] c"SteamAPI_ISteamApps_GetLaunchQueryParam\00"
@.str.1 = [1 x i8] zeroinitializer
define i8* @SteamAPI_ISteamApps_GetLaunchQueryParam(i8* %0, i8* %1) {
%3 = tail call i32 (i8*, i8*, i8*, i8*, ...) bitcast (i32 (...)* @xlogf to i32 (i8*, i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([40 x i8], [40 x i8]* @__func__.SteamAPI_ISteamApps_GetLaunchQueryParam, i64 0, i64 0), i8* %0, i8* %1)
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ nmm_get_cpu(int *, int *);
void nmm_get_cpu__(int *c, int *i) { nmm_get_cpu(c, i); }


x86 assembly (clang, -O0):
<nmm_get_cpu__>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <nmm_get_cpu@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nmm_get_cpu__>:
jmp    1030 <nmm_get_cpu@plt>

LLVM IR (-O0):
define void @nmm_get_cpu__(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @nmm_get_cpu(i32* %5, i32* %6)
ret void
}

LLVM IR (-O2):
define void @nmm_get_cpu__(i32* %0, i32* %1) {
%3 = tail call i32 @nmm_get_cpu(i32* %0, i32* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ F_OK;
int access(char *, int /*<<< orphan*/);
int exists(char *filename) { return access(filename, F_OK) != -1; }


x86 assembly (clang, -O0):
<exists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
call   1030 <access@plt>
cmp    $0xffffffff,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exists>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
call   1030 <access@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@F_OK = global i32 0
define i32 @exists(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @F_OK
%5 = call i32 @access(i8* %3, i32 %4)
%6 = icmp ne i32 %5, -1
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
@F_OK = global i32 0
define i32 @exists(i8* nocapture %0) {
%2 = load i32, i32* @F_OK
%3 = tail call i32 @access(i8* %0, i32 %2)
%4 = icmp ne i32 %3, -1
%5 = zext i1 %4 to i32
ret i32 %5
}
void ffi_closure_SYSV_inner(void) {}


x86 assembly (clang, -O0):
<ffi_closure_SYSV_inner>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffi_closure_SYSV_inner>:
ret

LLVM IR (-O0):
define void @ffi_closure_SYSV_inner() {
ret void
}

LLVM IR (-O2):
define void @ffi_closure_SYSV_inner() {
ret void
}
void MemClr(unsigned char *NcTgtPtr, unsigned short UsClrSiz) {
  unsigned short UsClrIdx;
  for (UsClrIdx = 0; UsClrIdx < UsClrSiz; UsClrIdx++) {
    *NcTgtPtr = 0;
    NcTgtPtr++;
  }
}


x86 assembly (clang, -O0):
<MemClr>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
movw   $0x0,-0xc(%rbp)
movzwl -0xc(%rbp),%eax
movzwl -0xa(%rbp),%ecx
cmp    %ecx,%eax
jge    1149 <MemClr+0x49>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0xc(%rbp)
jmp    1115 <MemClr+0x15>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MemClr>:
test   %esi,%esi
je     1123 <MemClr+0x13>
push   %rax
movzwl %si,%edx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @MemClr(i8* %0, i16 zeroext %1) {
%3 = alloca i8*
%4 = alloca i16
%5 = alloca i16
store i8* %0, i8** %3
store i16 %1, i16* %4
store i16 0, i16* %5
br label %6
6: ; preds = %16, %2
%7 = load i16, i16* %5
%8 = zext i16 %7 to i32
%9 = load i16, i16* %4
%10 = zext i16 %9 to i32
%11 = icmp slt i32 %8, %10
br i1 %11, label %12, label %19
12: ; preds = %6
%13 = load i8*, i8** %3
store i8 0, i8* %13
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %3
br label %16
16: ; preds = %12
%17 = load i16, i16* %5
%18 = add i16 %17, 1
store i16 %18, i16* %5
br label %6
19: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @MemClr(i8* nocapture writeonly %0, i16 zeroext %1) {
%3 = icmp eq i16 %1, 0
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = zext i16 %1 to i64
br label %6
6: ; preds = %4, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memset(int **, int /*<<< orphan*/, int);
int main(int argc, char **argv) {
  int x[4] = {7, 42, 4, 5};
  memset(&x, 0, sizeof(int) * 4);
  return x[0] + x[1] + x[2] + x[3];
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0xed3(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xed0(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    -0x20(%rbp),%rdi
xor    %esi,%esi
mov    $0x10,%edx
call   1030 <memset@plt>
mov    -0x20(%rbp),%eax
add    -0x1c(%rbp),%eax
add    -0x18(%rbp),%eax
add    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movaps 0xee5(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
xor    %esi,%esi
mov    $0x10,%edx
call   1030 <memset@plt>
movdqa (%rsp),%xmm0
pshufd $0xee,%xmm0,%xmm1
paddd  %xmm0,%xmm1
pshufd $0x55,%xmm1,%xmm0
paddd  %xmm1,%xmm0
movd   %xmm0,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.x = [4 x i32] [i32 7, i32 42, i32 4, i32 5]
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [4 x i32]
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = bitcast [4 x i32]* %6 to i8*
%8 = bitcast [4 x i32]* %6 to i32**
%9 = call i32 @memset(i32** %8, i32 0, i32 16)
%10 = getelementptr inbounds [4 x i32], [4 x i32]* %6, i64 0, i64 0
%11 = load i32, i32* %10
%12 = getelementptr inbounds [4 x i32], [4 x i32]* %6, i64 0, i64 1
%13 = load i32, i32* %12
%14 = add nsw i32 %11, %13
%15 = getelementptr inbounds [4 x i32], [4 x i32]* %6, i64 0, i64 2
%16 = load i32, i32* %15
%17 = add nsw i32 %14, %16
%18 = getelementptr inbounds [4 x i32], [4 x i32]* %6, i64 0, i64 3
%19 = load i32, i32* %18
%20 = add nsw i32 %17, %19
ret i32 %20
}

LLVM IR (-O2):
@__const.main.x = [4 x i32] [i32 7, i32 42, i32 4, i32 5]
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca <4 x i32>
%4 = bitcast <4 x i32>* %3 to i8*
%5 = bitcast <4 x i32>* %3 to i32**
%6 = call i32 @memset(i32** %5, i32 0, i32 16)
%7 = load <4 x i32>, <4 x i32>* %3
%8 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %7)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ jgfs2_clean_up();
void jgfs2_done(void) { jgfs2_clean_up(); }


x86 assembly (clang, -O0):
<jgfs2_done>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <jgfs2_clean_up@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<jgfs2_done>:
xor    %eax,%eax
jmp    1030 <jgfs2_clean_up@plt>

LLVM IR (-O0):
define void @jgfs2_done() {
%1 = call i32 (...) @jgfs2_clean_up()
ret void
}

LLVM IR (-O2):
define void @jgfs2_done() {
%1 = tail call i32 (...) @jgfs2_clean_up()
ret void
}
unsigned int get_oregon_scientific_humidity(unsigned char *message,
                                            unsigned int sensor_id) {
  int humidity = 0;
  { humidity = ((message[6] & 0x0f) * 10) + (message[6] >> 4); }
  return humidity;
}


x86 assembly (clang, -O0):
<get_oregon_scientific_humidity>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x6(%rax),%eax
and    $0xf,%eax
imul   $0xa,%eax,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x6(%rcx),%ecx
sar    $0x4,%ecx
add    %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_oregon_scientific_humidity>:
movzbl 0x6(%rdi),%eax
mov    %eax,%ecx
and    $0xf,%ecx
lea    (%rcx,%rcx,4),%ecx
shr    $0x4,%eax
lea    (%rax,%rcx,2),%eax
ret

LLVM IR (-O0):
define i32 @get_oregon_scientific_humidity(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i64 6
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
%10 = and i32 %9, 15
%11 = mul nsw i32 %10, 10
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i64 6
%14 = load i8, i8* %13
%15 = zext i8 %14 to i32
%16 = ashr i32 %15, 4
%17 = add nsw i32 %11, %16
store i32 %17, i32* %5
%18 = load i32, i32* %5
ret i32 %18
}

LLVM IR (-O2):
define i32 @get_oregon_scientific_humidity(i8* nocapture %0, i32 %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 6
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 15
%7 = mul nuw nsw i32 %6, 10
%8 = lshr i32 %5, 4
%9 = add nuw nsw i32 %7, %8
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ notimplemented(char *);
void __svgalib_driver8p_copybox(int x1, int y1, int w, int h, int x2, int y2) {
  {
    notimplemented("8-bit paged copybox (bitblt)");
    return;
  };
}


x86 assembly (clang, -O0):
<__svgalib_driver8p_copybox>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
lea    0xecd(%rip),%rdi
call   1030 <notimplemented@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__svgalib_driver8p_copybox>:
lea    0xee9(%rip),%rdi
jmp    1030 <notimplemented@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"8-bit paged copybox (bitblt)\00"
define void @__svgalib_driver8p_copybox(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = call i32 @notimplemented(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"8-bit paged copybox (bitblt)\00"
define void @__svgalib_driver8p_copybox(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = tail call i32 @notimplemented(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
struct TYPE_3__ {
  int /*<<< orphan*/ r_info;
};
typedef TYPE_1__ Elf64_Rel;

/* Variables and functions */
int /*<<< orphan*/ ELF64_R_SYM(int /*<<< orphan*/);
int /*<<< orphan*/ w8(int /*<<< orphan*/);
uint64_t fn_ELF64_R_SYM(Elf64_Rel const *rp) {
  return ELF64_R_SYM(w8(rp->r_info));
}


x86 assembly (clang, -O0):
<fn_ELF64_R_SYM>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1040 <w8@plt>
mov    %eax,%edi
call   1030 <ELF64_R_SYM@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_ELF64_R_SYM>:
push   %rax
mov    (%rdi),%edi
call   1040 <w8@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <ELF64_R_SYM@plt>

LLVM IR (-O0):
%struct.TYPE_3__ = type { i32 }
define i32 @fn_ELF64_R_SYM(%struct.TYPE_3__* %0) {
%2 = alloca %struct.TYPE_3__*
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %2
%3 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2
%4 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %3, i32 0, i32 0
%5 = load i32, i32* %4
%6 = call i32 @w8(i32 %5)
%7 = call i32 @ELF64_R_SYM(i32 %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i32 }
define i32 @fn_ELF64_R_SYM(%struct.TYPE_3__* nocapture %0) {
%2 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i64 0, i32 0
%3 = load i32, i32* %2
%4 = tail call i32 @w8(i32 %3)
%5 = tail call i32 @ELF64_R_SYM(i32 %4)
ret i32 %5
}
int contains(int *route, int dest, int len, int cur) {
  while (len - 1 > cur)
    if (route[--len] == dest)
      return 1;
  return 0;
}


x86 assembly (clang, -O0):
<contains>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
sub    $0x1,%eax
cmp    -0x1c(%rbp),%eax
jle    114d <contains+0x4d>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x18(%rbp)
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x14(%rbp),%eax
jne    1148 <contains+0x48>
movl   $0x1,-0x4(%rbp)
jmp    1154 <contains+0x54>
jmp    1111 <contains+0x11>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<contains>:
movslq %edx,%rdx
movslq %ecx,%rax
add    $0xffffffffffffffff,%rdx
nopw   0x0(%rax,%rax,1)
cmp    %rax,%rdx
jle    1127 <contains+0x27>
lea    -0x1(%rdx),%rcx
cmp    %esi,(%rdi,%rdx,4)
mov    %rcx,%rdx
jne    1110 <contains+0x10>
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @contains(i32* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32* %0, i32** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
br label %10
10: ; preds = %25, %4
%11 = load i32, i32* %8
%12 = sub nsw i32 %11, 1
%13 = load i32, i32* %9
%14 = icmp sgt i32 %12, %13
br i1 %14, label %15, label %26
15: ; preds = %10
%16 = load i32*, i32** %6
%17 = load i32, i32* %8
%18 = add nsw i32 %17, -1
store i32 %18, i32* %8
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, i32* %16, i64 %19
%21 = load i32, i32* %20
%22 = load i32, i32* %7
%23 = icmp eq i32 %21, %22
br i1 %23, label %24, label %25
24: ; preds = %15
store i32 1, i32* %5
br label %27
25: ; preds = %15
br label %10
26: ; preds = %10
store i32 0, i32* %5
br label %27
27: ; preds = %26, %24
%28 = load i32, i32* %5
ret i32 %28
}

LLVM IR (-O2):
define i32 @contains(i32* nocapture %0, i32 %1, i32 %2, i32 %3) {
%5 = sext i32 %2 to i64
%6 = sext i32 %3 to i64
br label %7
7: ; preds = %11, %4
%8 = phi i64 [ %9, %11 ], [ %5, %4 ]
%9 = add nsw i64 %8, -1
%10 = icmp sgt i64 %9, %6
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = getelementptr inbounds i32, i32* %0, i64 %9
%13 = load i32, i32* %12
%14 = icmp eq i32 %13, %1
br i1 %14, label %15, label %7
15: ; preds = %7, %11
%16 = phi i32 [ 1, %11 ], [ 0, %7 ]
ret i32 %16
}
long IS_ERR(const void *ptr) {
  return (((unsigned long)ptr) >= (unsigned long)-4095);
}


x86 assembly (clang, -O0):
<IS_ERR>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmp    $0xfffffffffffff001,%rax
setae  %al
and    $0x1,%al
movzbl %al,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<IS_ERR>:
xor    %eax,%eax
cmp    $0xfffffffffffff001,%rdi
setae  %al
ret

LLVM IR (-O0):
define i64 @IS_ERR(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
%5 = icmp uge i64 %4, -4095
%6 = zext i1 %5 to i32
%7 = sext i32 %6 to i64
ret i64 %7
}

LLVM IR (-O2):
define i64 @IS_ERR(i8* readnone %0) {
%2 = icmp ugt i8* %0, inttoptr (i64 -4096 to i8*)
%3 = zext i1 %2 to i64
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ SchedulerBasicP__Scheduler__taskLoop();
void RealMainP__Scheduler__taskLoop(void) {
  SchedulerBasicP__Scheduler__taskLoop();
}


x86 assembly (clang, -O0):
<RealMainP__Scheduler__taskLoop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <SchedulerBasicP__Scheduler__taskLoop@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RealMainP__Scheduler__taskLoop>:
xor    %eax,%eax
jmp    1030 <SchedulerBasicP__Scheduler__taskLoop@plt>

LLVM IR (-O0):
define void @RealMainP__Scheduler__taskLoop() {
%1 = call i32 (...) @SchedulerBasicP__Scheduler__taskLoop()
ret void
}

LLVM IR (-O2):
define void @RealMainP__Scheduler__taskLoop() {
%1 = tail call i32 (...) @SchedulerBasicP__Scheduler__taskLoop()
ret void
}
/* Variables and functions */
int ENOENT;
int read_distro_hostname(char **hn) { return -ENOENT; }


x86 assembly (clang, -O0):
<read_distro_hostname>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    0x2ec7(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_distro_hostname>:
mov    0x2ed1(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@ENOENT = global i32 0
define i32 @read_distro_hostname(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i32, i32* @ENOENT
%4 = sub nsw i32 0, %3
ret i32 %4
}

LLVM IR (-O2):
@ENOENT = global i32 0
define i32 @read_distro_hostname(i8** nocapture readnone %0) {
%2 = load i32, i32* @ENOENT
%3 = sub nsw i32 0, %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ playSudoku();
int main() {
  playSudoku();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <playSudoku@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <playSudoku@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @playSudoku()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @playSudoku()
ret i32 0
}
/* Variables and functions */
char *sysfsparser_cpufreq_get_governor(unsigned int);
char *cpufreq_get_governor(unsigned int cpu) {
  return sysfsparser_cpufreq_get_governor(cpu);
}


x86 assembly (clang, -O0):
<cpufreq_get_governor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sysfsparser_cpufreq_get_governor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpufreq_get_governor>:
jmp    1030 <sysfsparser_cpufreq_get_governor@plt>

LLVM IR (-O0):
define i8* @cpufreq_get_governor(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @sysfsparser_cpufreq_get_governor(i32 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @cpufreq_get_governor(i32 %0) {
%2 = tail call i8* @sysfsparser_cpufreq_get_governor(i32 %0)
ret i8* %2
}
void gtk_image_set_pixel_size() {}


x86 assembly (clang, -O0):
<gtk_image_set_pixel_size>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_image_set_pixel_size>:
ret

LLVM IR (-O0):
define void @gtk_image_set_pixel_size() {
ret void
}

LLVM IR (-O2):
define void @gtk_image_set_pixel_size() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dbg_break();
void raise(void) { dbg_break(); }


x86 assembly (clang, -O0):
<raise>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <dbg_break@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<raise>:
xor    %eax,%eax
jmp    1030 <dbg_break@plt>

LLVM IR (-O0):
define void @raise() {
%1 = call i32 (...) @dbg_break()
ret void
}

LLVM IR (-O2):
define void @raise() {
%1 = tail call i32 (...) @dbg_break()
ret void
}
void RTFileAioReqPrepareWrite(void) {}


x86 assembly (clang, -O0):
<RTFileAioReqPrepareWrite>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTFileAioReqPrepareWrite>:
ret

LLVM IR (-O0):
define void @RTFileAioReqPrepareWrite() {
ret void
}

LLVM IR (-O2):
define void @RTFileAioReqPrepareWrite() {
ret void
}
long return_long_negative_one() { return -1; }


x86 assembly (clang, -O0):
<return_long_negative_one>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffffffffffff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<return_long_negative_one>:
mov    $0xffffffffffffffff,%rax
ret

LLVM IR (-O0):
define i64 @return_long_negative_one() {
ret i64 -1
}

LLVM IR (-O2):
define i64 @return_long_negative_one() {
ret i64 -1
}
void indent_puts(str) char str[];
{
  do_indent();
  puts(str);
}


x86 assembly (clang, -O0):
<indent_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <do_indent@plt>
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <puts@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<indent_puts>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <do_indent@plt>
mov    %rbx,%rdi
xor    %eax,%eax
pop    %rbx
jmp    1030 <puts@plt>

LLVM IR (-O0):
define void @indent_puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @do_indent()
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) bitcast (i32 (...)* @puts to i32 (i8*, ...)*)(i8* %4)
ret void
}

LLVM IR (-O2):
define void @indent_puts(i8* %0) {
%2 = tail call i32 (...) @do_indent()
%3 = tail call i32 (i8*, ...) bitcast (i32 (...)* @puts to i32 (i8*, ...)*)(i8* %0)
ret void
}
/* Type definitions */
struct tms {
  double tms_utime;
  scalar_t__ tms_stime;
};

/* Variables and functions */
int /*<<< orphan*/ times(struct tms *);
double SuperLU_timer_() {
  struct tms use;
  double tmp;
  times(&use);
  tmp = use.tms_utime;
  tmp += use.tms_stime;
  return (double)(tmp) / 60;
}


x86 assembly (clang, -O0):
<SuperLU_timer_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x10(%rbp),%rdi
call   1030 <times@plt>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
cvtsi2sdq -0x8(%rbp),%xmm0
addsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  0xeb8(%rip),%xmm1
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SuperLU_timer_>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
call   1030 <times@plt>
cvtsi2sdq 0x10(%rsp),%xmm0
addsd  0x8(%rsp),%xmm0
divsd  0xecd(%rip),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.tms = type { double, i64 }
define double @SuperLU_timer_() {
%1 = alloca %struct.tms
%2 = alloca double
%3 = call i32 @times(%struct.tms* %1)
%4 = getelementptr inbounds %struct.tms, %struct.tms* %1, i32 0, i32 0
%5 = load double, double* %4
store double %5, double* %2
%6 = getelementptr inbounds %struct.tms, %struct.tms* %1, i32 0, i32 1
%7 = load i64, i64* %6
%8 = sitofp i64 %7 to double
%9 = load double, double* %2
%10 = fadd double %9, %8
store double %10, double* %2
%11 = load double, double* %2
%12 = fdiv double %11, 6.000000e+01
ret double %12
}

LLVM IR (-O2):
%struct.tms = type { double, i64 }
define double @SuperLU_timer_() {
%1 = alloca %struct.tms
%2 = bitcast %struct.tms* %1 to i8*
%3 = call i32 @times(%struct.tms* %1)
%4 = getelementptr inbounds %struct.tms, %struct.tms* %1, i64 0, i32 0
%5 = load double, double* %4
%6 = getelementptr inbounds %struct.tms, %struct.tms* %1, i64 0, i32 1
%7 = load i64, i64* %6
%8 = sitofp i64 %7 to double
%9 = fadd double %5, %8
%10 = fdiv double %9, 6.000000e+01
ret double %10
}
char *Malloc(size)
unsigned size;
{
  char *data;
  if (!(data = malloc(size)))
    Fatal_Error("Out of memory!");
  return (data);
}


x86 assembly (clang, -O0):
<Malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    1151 <Malloc+0x31>
lea    0xeb6(%rip),%rdi
mov    $0x0,%al
call   1030 <Fatal_Error@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Malloc>:
push   %rbx
mov    %edi,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113e <Malloc+0x1e>
lea    0xec9(%rip),%rdi
xor    %eax,%eax
call   1030 <Fatal_Error@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Out of memory!\00"
define i8* @Malloc(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = zext i32 %4 to i64
%6 = call i8* @malloc(i64 %5)
store i8* %6, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = call i32 (i8*, ...) bitcast (i32 (...)* @Fatal_Error to i32 (i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [15 x i8] c"Out of memory!\00"
define i8* @Malloc(i32 %0) {
%2 = zext i32 %0 to i64
%3 = tail call i8* @malloc(i64 %2)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 (i8*, ...) bitcast (i32 (...)* @Fatal_Error to i32 (i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %1
ret i8* %3
}
/* Variables and functions */
int omap_rev();
int is_omap24xx(void) { return ((omap_rev() & 0xff) == (0x24)) ? 1 : 0; }


x86 assembly (clang, -O0):
<is_omap24xx>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <omap_rev@plt>
mov    %eax,%edx
and    $0xff,%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x24,%edx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_omap24xx>:
push   %rax
xor    %eax,%eax
call   1030 <omap_rev@plt>
xor    %ecx,%ecx
cmp    $0x24,%al
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @is_omap24xx() {
%1 = call i32 (...) @omap_rev()
%2 = and i32 %1, 255
%3 = icmp eq i32 %2, 36
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 1, i32 0
ret i32 %5
}

LLVM IR (-O2):
define i32 @is_omap24xx() {
%1 = tail call i32 (...) @omap_rev()
%2 = and i32 %1, 255
%3 = icmp eq i32 %2, 36
%4 = zext i1 %3 to i32
ret i32 %4
}