float __mac_c(const float *a, const float *b, unsigned int size) {
  float f;
  switch (size) {
  case 8:
    asm volatile("flds (%1);\n\t"
                 "fmuls (%2);\n\t"
                 "flds 4(%1);\n\t"
                 "fmuls 4(%2);\n\t"
                 "flds 8(%1);\n\t"
                 "fmuls 8(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 12(%1);\n\t"
                 "fmuls 12(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 16(%1);\n\t"
                 "fmuls 16(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 20(%1);\n\t"
                 "fmuls 20(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 24(%1);\n\t"
                 "fmuls 24(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 28(%1);\n\t"
                 "fmuls 28(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "faddp;\n\t"
                 : "=t"(f)
                 : "r"(a), "r"(b)
                 : "memory");
    return f;
  case 9:
    asm volatile("flds (%1);\n\t"
                 "fmuls (%2);\n\t"
                 "flds 4(%1);\n\t"
                 "fmuls 4(%2);\n\t"
                 "flds 8(%1);\n\t"
                 "fmuls 8(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 12(%1);\n\t"
                 "fmuls 12(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 16(%1);\n\t"
                 "fmuls 16(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 20(%1);\n\t"
                 "fmuls 20(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 24(%1);\n\t"
                 "fmuls 24(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 28(%1);\n\t"
                 "fmuls 28(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 32(%1);\n\t"
                 "fmuls 32(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "faddp;\n\t"
                 : "=t"(f)
                 : "r"(a), "r"(b)
                 : "memory");
    return f;
  case 18:
    asm volatile("flds (%1);\n\t"
                 "fmuls (%2);\n\t"
                 "flds 4(%1);\n\t"
                 "fmuls 4(%2);\n\t"
                 "flds 8(%1);\n\t"
                 "fmuls 8(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 12(%1);\n\t"
                 "fmuls 12(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 16(%1);\n\t"
                 "fmuls 16(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 20(%1);\n\t"
                 "fmuls 20(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 24(%1);\n\t"
                 "fmuls 24(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 28(%1);\n\t"
                 "fmuls 28(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 32(%1);\n\t"
                 "fmuls 32(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 36(%1);\n\t"
                 "fmuls 36(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 40(%1);\n\t"
                 "fmuls 40(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 44(%1);\n\t"
                 "fmuls 44(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 48(%1);\n\t"
                 "fmuls 48(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 52(%1);\n\t"
                 "fmuls 52(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 56(%1);\n\t"
                 "fmuls 56(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 60(%1);\n\t"
                 "fmuls 60(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 64(%1);\n\t"
                 "fmuls 64(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 68(%1);\n\t"
                 "fmuls 68(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "faddp;\n\t"
                 : "=t"(f)
                 : "r"(a), "r"(b)
                 : "memory");
    return f;
  case 24:
    asm volatile("flds (%1);\n\t"
                 "fmuls (%2);\n\t"
                 "flds 4(%1);\n\t"
                 "fmuls 4(%2);\n\t"
                 "flds 8(%1);\n\t"
                 "fmuls 8(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 12(%1);\n\t"
                 "fmuls 12(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 16(%1);\n\t"
                 "fmuls 16(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 20(%1);\n\t"
                 "fmuls 20(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 24(%1);\n\t"
                 "fmuls 24(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 28(%1);\n\t"
                 "fmuls 28(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 32(%1);\n\t"
                 "fmuls 32(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 36(%1);\n\t"
                 "fmuls 36(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 40(%1);\n\t"
                 "fmuls 40(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 44(%1);\n\t"
                 "fmuls 44(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 48(%1);\n\t"
                 "fmuls 48(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 52(%1);\n\t"
                 "fmuls 52(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 56(%1);\n\t"
                 "fmuls 56(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 60(%1);\n\t"
                 "fmuls 60(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 64(%1);\n\t"
                 "fmuls 64(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 68(%1);\n\t"
                 "fmuls 68(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 72(%1);\n\t"
                 "fmuls 72(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 76(%1);\n\t"
                 "fmuls 76(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 80(%1);\n\t"
                 "fmuls 80(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 84(%1);\n\t"
                 "fmuls 84(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 88(%1);\n\t"
                 "fmuls 88(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 92(%1);\n\t"
                 "fmuls 92(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "faddp;\n\t"
                 : "=t"(f)
                 : "r"(a), "r"(b)
                 : "memory");
    return f;
  case 36:
    asm volatile("flds (%1);\n\t"
                 "fmuls (%2);\n\t"
                 "flds 4(%1);\n\t"
                 "fmuls 4(%2);\n\t"
                 "flds 8(%1);\n\t"
                 "fmuls 8(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 12(%1);\n\t"
                 "fmuls 12(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 16(%1);\n\t"
                 "fmuls 16(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 20(%1);\n\t"
                 "fmuls 20(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 24(%1);\n\t"
                 "fmuls 24(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 28(%1);\n\t"
                 "fmuls 28(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 32(%1);\n\t"
                 "fmuls 32(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 36(%1);\n\t"
                 "fmuls 36(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 40(%1);\n\t"
                 "fmuls 40(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 44(%1);\n\t"
                 "fmuls 44(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 48(%1);\n\t"
                 "fmuls 48(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 52(%1);\n\t"
                 "fmuls 52(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 56(%1);\n\t"
                 "fmuls 56(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 60(%1);\n\t"
                 "fmuls 60(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 64(%1);\n\t"
                 "fmuls 64(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 68(%1);\n\t"
                 "fmuls 68(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 72(%1);\n\t"
                 "fmuls 72(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 76(%1);\n\t"
                 "fmuls 76(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 80(%1);\n\t"
                 "fmuls 80(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 84(%1);\n\t"
                 "fmuls 84(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 88(%1);\n\t"
                 "fmuls 88(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 92(%1);\n\t"
                 "fmuls 92(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 96(%1);\n\t"
                 "fmuls 96(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 100(%1);\n\t"
                 "fmuls 100(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 104(%1);\n\t"
                 "fmuls 104(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 108(%1);\n\t"
                 "fmuls 108(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 112(%1);\n\t"
                 "fmuls 112(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 116(%1);\n\t"
                 "fmuls 116(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 120(%1);\n\t"
                 "fmuls 120(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 124(%1);\n\t"
                 "fmuls 124(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 128(%1);\n\t"
                 "fmuls 128(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 132(%1);\n\t"
                 "fmuls 132(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 136(%1);\n\t"
                 "fmuls 136(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "flds 140(%1);\n\t"
                 "fmuls 140(%2);\n\t"
                 "fxch %%st(2);\n\t"
                 "faddp;\n\t"
                 "faddp;\n\t"
                 : "=t"(f)
                 : "r"(a), "r"(b)
                 : "memory");
    return f;
  default:
    printf("Warning: optimize __mac_c(..., ..., %d)\n", size);
    return __mac_g(a, b, size);
  }
}


x86 assembly (clang, -O0):
<__mac_c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0xfffffff8,%eax
mov    %eax,%ecx
mov    %rcx,-0x40(%rbp)
sub    $0x1c,%eax
ja     15b6 <__mac_c+0x496>
mov    -0x40(%rbp),%rax
lea    0xead(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
flds   (%rax)
fmuls  (%rcx)
flds   0x4(%rax)
fmuls  0x4(%rcx)
flds   0x8(%rax)
fmuls  0x8(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0xc(%rax)
fmuls  0xc(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x10(%rax)
fmuls  0x10(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x14(%rax)
fmuls  0x14(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x18(%rax)
fmuls  0x18(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x1c(%rax)
fmuls  0x1c(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
faddp  %st,%st(1)
fstps  -0x34(%rbp)
movss  -0x34(%rbp),%xmm0
movss  %xmm0,-0x20(%rbp)
movss  -0x20(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    15e2 <__mac_c+0x4c2>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
flds   (%rax)
fmuls  (%rcx)
flds   0x4(%rax)
fmuls  0x4(%rcx)
flds   0x8(%rax)
fmuls  0x8(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0xc(%rax)
fmuls  0xc(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x10(%rax)
fmuls  0x10(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x14(%rax)
fmuls  0x14(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x18(%rax)
fmuls  0x18(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x1c(%rax)
fmuls  0x1c(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x20(%rax)
fmuls  0x20(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
faddp  %st,%st(1)
fstps  -0x30(%rbp)
movss  -0x30(%rbp),%xmm0
movss  %xmm0,-0x20(%rbp)
movss  -0x20(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    15e2 <__mac_c+0x4c2>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
flds   (%rax)
fmuls  (%rcx)
flds   0x4(%rax)
fmuls  0x4(%rcx)
flds   0x8(%rax)
fmuls  0x8(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0xc(%rax)
fmuls  0xc(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x10(%rax)
fmuls  0x10(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x14(%rax)
fmuls  0x14(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x18(%rax)
fmuls  0x18(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x1c(%rax)
fmuls  0x1c(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x20(%rax)
fmuls  0x20(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x24(%rax)
fmuls  0x24(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x28(%rax)
fmuls  0x28(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x2c(%rax)
fmuls  0x2c(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x30(%rax)
fmuls  0x30(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x34(%rax)
fmuls  0x34(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x38(%rax)
fmuls  0x38(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x3c(%rax)
fmuls  0x3c(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x40(%rax)
fmuls  0x40(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x44(%rax)
fmuls  0x44(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
faddp  %st,%st(1)
fstps  -0x2c(%rbp)
movss  -0x2c(%rbp),%xmm0
movss  %xmm0,-0x20(%rbp)
movss  -0x20(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    15e2 <__mac_c+0x4c2>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
flds   (%rax)
fmuls  (%rcx)
flds   0x4(%rax)
fmuls  0x4(%rcx)
flds   0x8(%rax)
fmuls  0x8(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0xc(%rax)
fmuls  0xc(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x10(%rax)
fmuls  0x10(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x14(%rax)
fmuls  0x14(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x18(%rax)
fmuls  0x18(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x1c(%rax)
fmuls  0x1c(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x20(%rax)
fmuls  0x20(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x24(%rax)
fmuls  0x24(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x28(%rax)
fmuls  0x28(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x2c(%rax)
fmuls  0x2c(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x30(%rax)
fmuls  0x30(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x34(%rax)
fmuls  0x34(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x38(%rax)
fmuls  0x38(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x3c(%rax)
fmuls  0x3c(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x40(%rax)
fmuls  0x40(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x44(%rax)
fmuls  0x44(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x48(%rax)
fmuls  0x48(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x4c(%rax)
fmuls  0x4c(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x50(%rax)
fmuls  0x50(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x54(%rax)
fmuls  0x54(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x58(%rax)
fmuls  0x58(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x5c(%rax)
fmuls  0x5c(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
faddp  %st,%st(1)
fstps  -0x28(%rbp)
movss  -0x28(%rbp),%xmm0
movss  %xmm0,-0x20(%rbp)
movss  -0x20(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    15e2 <__mac_c+0x4c2>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
flds   (%rax)
fmuls  (%rcx)
flds   0x4(%rax)
fmuls  0x4(%rcx)
flds   0x8(%rax)
fmuls  0x8(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0xc(%rax)
fmuls  0xc(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x10(%rax)
fmuls  0x10(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x14(%rax)
fmuls  0x14(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x18(%rax)
fmuls  0x18(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x1c(%rax)
fmuls  0x1c(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x20(%rax)
fmuls  0x20(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x24(%rax)
fmuls  0x24(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x28(%rax)
fmuls  0x28(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x2c(%rax)
fmuls  0x2c(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x30(%rax)
fmuls  0x30(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x34(%rax)
fmuls  0x34(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x38(%rax)
fmuls  0x38(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x3c(%rax)
fmuls  0x3c(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x40(%rax)
fmuls  0x40(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x44(%rax)
fmuls  0x44(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x48(%rax)
fmuls  0x48(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x4c(%rax)
fmuls  0x4c(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x50(%rax)
fmuls  0x50(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x54(%rax)
fmuls  0x54(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x58(%rax)
fmuls  0x58(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x5c(%rax)
fmuls  0x5c(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x60(%rax)
fmuls  0x60(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x64(%rax)
fmuls  0x64(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x68(%rax)
fmuls  0x68(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x6c(%rax)
fmuls  0x6c(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x70(%rax)
fmuls  0x70(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x74(%rax)
fmuls  0x74(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x78(%rax)
fmuls  0x78(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x7c(%rax)
fmuls  0x7c(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x80(%rax)
fmuls  0x80(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x84(%rax)
fmuls  0x84(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x88(%rax)
fmuls  0x88(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x8c(%rax)
fmuls  0x8c(%rcx)
fxch   %st(2)
faddp  %st,%st(1)
faddp  %st,%st(1)
fstps  -0x24(%rbp)
movss  -0x24(%rbp),%xmm0
movss  %xmm0,-0x20(%rbp)
movss  -0x20(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    15e2 <__mac_c+0x4c2>
mov    -0x1c(%rbp),%esi
lea    0xab4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
mov    $0x0,%al
call   1040 <__mac_g@plt>
cvtsi2ss %eax,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__mac_c>:
push   %r15
push   %r14
push   %rbx
sub    $0x20,%rsp
mov    %edx,%ebx
mov    %rsi,%r14
mov    %rdi,%r15
lea    -0x8(%rbx),%eax
cmp    $0x1c,%eax
ja     1227 <__mac_c+0x107>
lea    0xebc(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
flds   (%r15)
fmuls  (%r14)
flds   0x4(%r15)
fmuls  0x4(%r14)
flds   0x8(%r15)
fmuls  0x8(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0xc(%r15)
fmuls  0xc(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x10(%r15)
fmuls  0x10(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x14(%r15)
fmuls  0x14(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x18(%r15)
fmuls  0x18(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x1c(%r15)
fmuls  0x1c(%r14)
fxch   %st(2)
faddp  %st,%st(1)
faddp  %st,%st(1)
fstps  0xc(%rsp)
movss  0xc(%rsp),%xmm0
jmp    161f <__mac_c+0x4ff>
flds   (%r15)
fmuls  (%r14)
flds   0x4(%r15)
fmuls  0x4(%r14)
flds   0x8(%r15)
fmuls  0x8(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0xc(%r15)
fmuls  0xc(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x10(%r15)
fmuls  0x10(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x14(%r15)
fmuls  0x14(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x18(%r15)
fmuls  0x18(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x1c(%r15)
fmuls  0x1c(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x20(%r15)
fmuls  0x20(%r14)
fxch   %st(2)
faddp  %st,%st(1)
faddp  %st,%st(1)
fstps  0x10(%rsp)
movss  0x10(%rsp),%xmm0
jmp    161f <__mac_c+0x4ff>
lea    0xe46(%rip),%rdi
mov    %ebx,%esi
xor    %eax,%eax
call   1030 <printf@plt>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %ebx,%edx
xor    %eax,%eax
call   1040 <__mac_g@plt>
cvtsi2ss %eax,%xmm0
jmp    161f <__mac_c+0x4ff>
flds   (%r15)
fmuls  (%r14)
flds   0x4(%r15)
fmuls  0x4(%r14)
flds   0x8(%r15)
fmuls  0x8(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0xc(%r15)
fmuls  0xc(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x10(%r15)
fmuls  0x10(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x14(%r15)
fmuls  0x14(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x18(%r15)
fmuls  0x18(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x1c(%r15)
fmuls  0x1c(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x20(%r15)
fmuls  0x20(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x24(%r15)
fmuls  0x24(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x28(%r15)
fmuls  0x28(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x2c(%r15)
fmuls  0x2c(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x30(%r15)
fmuls  0x30(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x34(%r15)
fmuls  0x34(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x38(%r15)
fmuls  0x38(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x3c(%r15)
fmuls  0x3c(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x40(%r15)
fmuls  0x40(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x44(%r15)
fmuls  0x44(%r14)
fxch   %st(2)
faddp  %st,%st(1)
faddp  %st,%st(1)
fstps  0x14(%rsp)
movss  0x14(%rsp),%xmm0
jmp    161f <__mac_c+0x4ff>
flds   (%r15)
fmuls  (%r14)
flds   0x4(%r15)
fmuls  0x4(%r14)
flds   0x8(%r15)
fmuls  0x8(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0xc(%r15)
fmuls  0xc(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x10(%r15)
fmuls  0x10(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x14(%r15)
fmuls  0x14(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x18(%r15)
fmuls  0x18(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x1c(%r15)
fmuls  0x1c(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x20(%r15)
fmuls  0x20(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x24(%r15)
fmuls  0x24(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x28(%r15)
fmuls  0x28(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x2c(%r15)
fmuls  0x2c(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x30(%r15)
fmuls  0x30(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x34(%r15)
fmuls  0x34(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x38(%r15)
fmuls  0x38(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x3c(%r15)
fmuls  0x3c(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x40(%r15)
fmuls  0x40(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x44(%r15)
fmuls  0x44(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x48(%r15)
fmuls  0x48(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x4c(%r15)
fmuls  0x4c(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x50(%r15)
fmuls  0x50(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x54(%r15)
fmuls  0x54(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x58(%r15)
fmuls  0x58(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x5c(%r15)
fmuls  0x5c(%r14)
fxch   %st(2)
faddp  %st,%st(1)
faddp  %st,%st(1)
fstps  0x18(%rsp)
movss  0x18(%rsp),%xmm0
jmp    161f <__mac_c+0x4ff>
flds   (%r15)
fmuls  (%r14)
flds   0x4(%r15)
fmuls  0x4(%r14)
flds   0x8(%r15)
fmuls  0x8(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0xc(%r15)
fmuls  0xc(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x10(%r15)
fmuls  0x10(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x14(%r15)
fmuls  0x14(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x18(%r15)
fmuls  0x18(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x1c(%r15)
fmuls  0x1c(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x20(%r15)
fmuls  0x20(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x24(%r15)
fmuls  0x24(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x28(%r15)
fmuls  0x28(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x2c(%r15)
fmuls  0x2c(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x30(%r15)
fmuls  0x30(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x34(%r15)
fmuls  0x34(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x38(%r15)
fmuls  0x38(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x3c(%r15)
fmuls  0x3c(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x40(%r15)
fmuls  0x40(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x44(%r15)
fmuls  0x44(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x48(%r15)
fmuls  0x48(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x4c(%r15)
fmuls  0x4c(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x50(%r15)
fmuls  0x50(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x54(%r15)
fmuls  0x54(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x58(%r15)
fmuls  0x58(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x5c(%r15)
fmuls  0x5c(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x60(%r15)
fmuls  0x60(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x64(%r15)
fmuls  0x64(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x68(%r15)
fmuls  0x68(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x6c(%r15)
fmuls  0x6c(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x70(%r15)
fmuls  0x70(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x74(%r15)
fmuls  0x74(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x78(%r15)
fmuls  0x78(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x7c(%r15)
fmuls  0x7c(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x80(%r15)
fmuls  0x80(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x84(%r15)
fmuls  0x84(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x88(%r15)
fmuls  0x88(%r14)
fxch   %st(2)
faddp  %st,%st(1)
flds   0x8c(%r15)
fmuls  0x8c(%r14)
fxch   %st(2)
faddp  %st,%st(1)
faddp  %st,%st(1)
fstps  0x1c(%rsp)
movss  0x1c(%rsp),%xmm0
add    $0x20,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [41 x i8] c"Warning: optimize __mac_c(..., ..., %d)\0A\00"
define float @__mac_c(float* %0, float* %1, i32 %2) {
%4 = alloca float
%5 = alloca float*
%6 = alloca float*
%7 = alloca i32
%8 = alloca float
store float* %0, float** %5
store float* %1, float** %6
store i32 %2, i32* %7
%9 = load i32, i32* %7
switch i32 %9, label %35 [
i32 8, label %10
i32 9, label %15
i32 18, label %20
i32 24, label %25
i32 36, label %30
]
10: ; preds = %3
%11 = load float*, float** %5
%12 = load float*, float** %6
%13 = call float asm sideeffect "flds ($1);\0A\09fmuls ($2);\0A\09flds 4($1);\0A\09fmuls 4($2);\0A\09flds 8($1);\0A\09fmuls 8($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 12($1);\0A\09fmuls 12($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 16($1);\0A\09fmuls 16($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 20($1);\0A\09fmuls 20($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 24($1);\0A\09fmuls 24($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 28($1);\0A\09fmuls 28($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09faddp;\0A\09", "={st},r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(float* %11, float* %12)
store float %13, float* %8
%14 = load float, float* %8
store float %14, float* %4
br label %43
15: ; preds = %3
%16 = load float*, float** %5
%17 = load float*, float** %6
%18 = call float asm sideeffect "flds ($1);\0A\09fmuls ($2);\0A\09flds 4($1);\0A\09fmuls 4($2);\0A\09flds 8($1);\0A\09fmuls 8($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 12($1);\0A\09fmuls 12($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 16($1);\0A\09fmuls 16($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 20($1);\0A\09fmuls 20($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 24($1);\0A\09fmuls 24($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 28($1);\0A\09fmuls 28($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 32($1);\0A\09fmuls 32($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09faddp;\0A\09", "={st},r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(float* %16, float* %17)
store float %18, float* %8
%19 = load float, float* %8
store float %19, float* %4
br label %43
20: ; preds = %3
%21 = load float*, float** %5
%22 = load float*, float** %6
%23 = call float asm sideeffect "flds ($1);\0A\09fmuls ($2);\0A\09flds 4($1);\0A\09fmuls 4($2);\0A\09flds 8($1);\0A\09fmuls 8($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 12($1);\0A\09fmuls 12($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 16($1);\0A\09fmuls 16($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 20($1);\0A\09fmuls 20($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 24($1);\0A\09fmuls 24($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 28($1);\0A\09fmuls 28($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 32($1);\0A\09fmuls 32($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 36($1);\0A\09fmuls 36($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 40($1);\0A\09fmuls 40($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 44($1);\0A\09fmuls 44($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 48($1);\0A\09fmuls 48($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 52($1);\0A\09fmuls 52($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 56($1);\0A\09fmuls 56($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 60($1);\0A\09fmuls 60($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 64($1);\0A\09fmuls 64($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 68($1);\0A\09fmuls 68($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09faddp;\0A\09", "={st},r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(float* %21, float* %22)
store float %23, float* %8
%24 = load float, float* %8
store float %24, float* %4
br label %43
25: ; preds = %3
%26 = load float*, float** %5
%27 = load float*, float** %6
%28 = call float asm sideeffect "flds ($1);\0A\09fmuls ($2);\0A\09flds 4($1);\0A\09fmuls 4($2);\0A\09flds 8($1);\0A\09fmuls 8($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 12($1);\0A\09fmuls 12($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 16($1);\0A\09fmuls 16($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 20($1);\0A\09fmuls 20($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 24($1);\0A\09fmuls 24($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 28($1);\0A\09fmuls 28($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 32($1);\0A\09fmuls 32($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 36($1);\0A\09fmuls 36($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 40($1);\0A\09fmuls 40($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 44($1);\0A\09fmuls 44($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 48($1);\0A\09fmuls 48($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 52($1);\0A\09fmuls 52($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 56($1);\0A\09fmuls 56($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 60($1);\0A\09fmuls 60($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 64($1);\0A\09fmuls 64($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 68($1);\0A\09fmuls 68($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 72($1);\0A\09fmuls 72($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 76($1);\0A\09fmuls 76($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 80($1);\0A\09fmuls 80($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 84($1);\0A\09fmuls 84($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 88($1);\0A\09fmuls 88($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 92($1);\0A\09fmuls 92($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09faddp;\0A\09", "={st},r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(float* %26, float* %27)
store float %28, float* %8
%29 = load float, float* %8
store float %29, float* %4
br label %43
30: ; preds = %3
%31 = load float*, float** %5
%32 = load float*, float** %6
%33 = call float asm sideeffect "flds ($1);\0A\09fmuls ($2);\0A\09flds 4($1);\0A\09fmuls 4($2);\0A\09flds 8($1);\0A\09fmuls 8($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 12($1);\0A\09fmuls 12($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 16($1);\0A\09fmuls 16($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 20($1);\0A\09fmuls 20($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 24($1);\0A\09fmuls 24($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 28($1);\0A\09fmuls 28($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 32($1);\0A\09fmuls 32($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 36($1);\0A\09fmuls 36($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 40($1);\0A\09fmuls 40($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 44($1);\0A\09fmuls 44($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 48($1);\0A\09fmuls 48($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 52($1);\0A\09fmuls 52($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 56($1);\0A\09fmuls 56($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 60($1);\0A\09fmuls 60($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 64($1);\0A\09fmuls 64($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 68($1);\0A\09fmuls 68($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 72($1);\0A\09fmuls 72($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 76($1);\0A\09fmuls 76($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 80($1);\0A\09fmuls 80($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 84($1);\0A\09fmuls 84($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 88($1);\0A\09fmuls 88($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 92($1);\0A\09fmuls 92($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 96($1);\0A\09fmuls 96($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 100($1);\0A\09fmuls 100($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 104($1);\0A\09fmuls 104($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 108($1);\0A\09fmuls 108($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 112($1);\0A\09fmuls 112($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 116($1);\0A\09fmuls 116($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 120($1);\0A\09fmuls 120($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 124($1);\0A\09fmuls 124($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 128($1);\0A\09fmuls 128($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 132($1);\0A\09fmuls 132($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 136($1);\0A\09fmuls 136($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 140($1);\0A\09fmuls 140($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09faddp;\0A\09", "={st},r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(float* %31, float* %32)
store float %33, float* %8
%34 = load float, float* %8
store float %34, float* %4
br label %43
35: ; preds = %3
%36 = load i32, i32* %7
%37 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 %36)
%38 = load float*, float** %5
%39 = load float*, float** %6
%40 = load i32, i32* %7
%41 = call i32 (float*, float*, i32, ...) bitcast (i32 (...)* @__mac_g to i32 (float*, float*, i32, ...)*)(float* %38, float* %39, i32 %40)
%42 = sitofp i32 %41 to float
store float %42, float* %4
br label %43
43: ; preds = %35, %30, %25, %20, %15, %10
%44 = load float, float* %4
ret float %44
}

LLVM IR (-O2):
@.str = [41 x i8] c"Warning: optimize __mac_c(..., ..., %d)\0A\00"
define float @__mac_c(float* %0, float* %1, i32 %2) {
switch i32 %2, label %14 [
i32 8, label %4
i32 9, label %6
i32 18, label %8
i32 24, label %10
i32 36, label %12
]
4: ; preds = %3
%5 = tail call float asm sideeffect "flds ($1);\0A\09fmuls ($2);\0A\09flds 4($1);\0A\09fmuls 4($2);\0A\09flds 8($1);\0A\09fmuls 8($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 12($1);\0A\09fmuls 12($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 16($1);\0A\09fmuls 16($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 20($1);\0A\09fmuls 20($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 24($1);\0A\09fmuls 24($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 28($1);\0A\09fmuls 28($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09faddp;\0A\09", "={st},r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(float* %0, float* %1)
br label %18
6: ; preds = %3
%7 = tail call float asm sideeffect "flds ($1);\0A\09fmuls ($2);\0A\09flds 4($1);\0A\09fmuls 4($2);\0A\09flds 8($1);\0A\09fmuls 8($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 12($1);\0A\09fmuls 12($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 16($1);\0A\09fmuls 16($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 20($1);\0A\09fmuls 20($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 24($1);\0A\09fmuls 24($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 28($1);\0A\09fmuls 28($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 32($1);\0A\09fmuls 32($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09faddp;\0A\09", "={st},r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(float* %0, float* %1)
br label %18
8: ; preds = %3
%9 = tail call float asm sideeffect "flds ($1);\0A\09fmuls ($2);\0A\09flds 4($1);\0A\09fmuls 4($2);\0A\09flds 8($1);\0A\09fmuls 8($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 12($1);\0A\09fmuls 12($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 16($1);\0A\09fmuls 16($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 20($1);\0A\09fmuls 20($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 24($1);\0A\09fmuls 24($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 28($1);\0A\09fmuls 28($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 32($1);\0A\09fmuls 32($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 36($1);\0A\09fmuls 36($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 40($1);\0A\09fmuls 40($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 44($1);\0A\09fmuls 44($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 48($1);\0A\09fmuls 48($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 52($1);\0A\09fmuls 52($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 56($1);\0A\09fmuls 56($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 60($1);\0A\09fmuls 60($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 64($1);\0A\09fmuls 64($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 68($1);\0A\09fmuls 68($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09faddp;\0A\09", "={st},r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(float* %0, float* %1)
br label %18
10: ; preds = %3
%11 = tail call float asm sideeffect "flds ($1);\0A\09fmuls ($2);\0A\09flds 4($1);\0A\09fmuls 4($2);\0A\09flds 8($1);\0A\09fmuls 8($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 12($1);\0A\09fmuls 12($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 16($1);\0A\09fmuls 16($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 20($1);\0A\09fmuls 20($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 24($1);\0A\09fmuls 24($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 28($1);\0A\09fmuls 28($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 32($1);\0A\09fmuls 32($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 36($1);\0A\09fmuls 36($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 40($1);\0A\09fmuls 40($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 44($1);\0A\09fmuls 44($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 48($1);\0A\09fmuls 48($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 52($1);\0A\09fmuls 52($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 56($1);\0A\09fmuls 56($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 60($1);\0A\09fmuls 60($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 64($1);\0A\09fmuls 64($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 68($1);\0A\09fmuls 68($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 72($1);\0A\09fmuls 72($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 76($1);\0A\09fmuls 76($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 80($1);\0A\09fmuls 80($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 84($1);\0A\09fmuls 84($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 88($1);\0A\09fmuls 88($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 92($1);\0A\09fmuls 92($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09faddp;\0A\09", "={st},r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(float* %0, float* %1)
br label %18
12: ; preds = %3
%13 = tail call float asm sideeffect "flds ($1);\0A\09fmuls ($2);\0A\09flds 4($1);\0A\09fmuls 4($2);\0A\09flds 8($1);\0A\09fmuls 8($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 12($1);\0A\09fmuls 12($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 16($1);\0A\09fmuls 16($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 20($1);\0A\09fmuls 20($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 24($1);\0A\09fmuls 24($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 28($1);\0A\09fmuls 28($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 32($1);\0A\09fmuls 32($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 36($1);\0A\09fmuls 36($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 40($1);\0A\09fmuls 40($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 44($1);\0A\09fmuls 44($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 48($1);\0A\09fmuls 48($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 52($1);\0A\09fmuls 52($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 56($1);\0A\09fmuls 56($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 60($1);\0A\09fmuls 60($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 64($1);\0A\09fmuls 64($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 68($1);\0A\09fmuls 68($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 72($1);\0A\09fmuls 72($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 76($1);\0A\09fmuls 76($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 80($1);\0A\09fmuls 80($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 84($1);\0A\09fmuls 84($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 88($1);\0A\09fmuls 88($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 92($1);\0A\09fmuls 92($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 96($1);\0A\09fmuls 96($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 100($1);\0A\09fmuls 100($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 104($1);\0A\09fmuls 104($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 108($1);\0A\09fmuls 108($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 112($1);\0A\09fmuls 112($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 116($1);\0A\09fmuls 116($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 120($1);\0A\09fmuls 120($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 124($1);\0A\09fmuls 124($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 128($1);\0A\09fmuls 128($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 132($1);\0A\09fmuls 132($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 136($1);\0A\09fmuls 136($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09flds 140($1);\0A\09fmuls 140($2);\0A\09fxch %st(2);\0A\09faddp;\0A\09faddp;\0A\09", "={st},r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(float* %0, float* %1)
br label %18
14: ; preds = %3
%15 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 %2)
%16 = tail call i32 (float*, float*, i32, ...) bitcast (i32 (...)* @__mac_g to i32 (float*, float*, i32, ...)*)(float* %0, float* %1, i32 %2)
%17 = sitofp i32 %16 to float
br label %18
18: ; preds = %14, %12, %10, %8, %6, %4
%19 = phi float [ %17, %14 ], [ %13, %12 ], [ %11, %10 ], [ %9, %8 ], [ %7, %6 ], [ %5, %4 ]
ret float %19
}