xunge/DecIR huggingface dataset:
/* Variables and functions */
int is_sorted(int *, int);
int /*<<< orphan*/ shuffle(int *, int);
void bogo_sort(int data[], int size) {
  while (is_sorted(data, size) == false) {
    shuffle(data, size);
  }
}


x86 assembly (clang, -O0):
<bogo_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <is_sorted@plt>
cmp    $0x0,%eax
jne    1155 <bogo_sort+0x35>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <shuffle@plt>
jmp    112f <bogo_sort+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bogo_sort>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
nopl   0x0(%rax,%rax,1)
call   1040 <is_sorted@plt>
test   %eax,%eax
jne    114a <bogo_sort+0x2a>
mov    %rbx,%rdi
mov    %ebp,%esi
call   1030 <shuffle@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
jmp    1130 <bogo_sort+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @bogo_sort(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %10, %2
%6 = load i32*, i32** %3
%7 = load i32, i32* %4
%8 = call i32 @is_sorted(i32* %6, i32 %7)
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %5
%11 = load i32*, i32** %3
%12 = load i32, i32* %4
%13 = call i32 @shuffle(i32* %11, i32 %12)
br label %5
14: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @bogo_sort(i32* %0, i32 %1) {
%3 = tail call i32 @is_sorted(i32* %0, i32 %1)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2, %5
%6 = tail call i32 @shuffle(i32* %0, i32 %1)
%7 = tail call i32 @is_sorted(i32* %0, i32 %1)
%8 = icmp eq i32 %7, 0
br i1 %8, label %5, label %9
9: ; preds = %5, %2
ret void
}
/* Variables and functions */
double atof(char *);
int /*<<< orphan*/ printf(char *, double);
int main(void) {
  printf("[%f]\n", atof("hello"));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xed0(%rip),%rdi
call   1030 <atof@plt>
lea    0xebe(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xede(%rip),%rdi
call   1030 <atof@plt>
lea    0xecc(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"[%f]\0A\00"
@.str.1 = [6 x i8] c"hello\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call double @atof(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), double %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"[%f]\0A\00"
@.str.1 = [6 x i8] c"hello\00"
define i32 @main() {
%1 = tail call double @atof(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), double %1)
ret i32 0
}
unsigned FormatBitCountToWordCount(unsigned bitCount) {
  return (bitCount + (sizeof(unsigned) * 8) - 1) / (sizeof(unsigned) * 8);
}


x86 assembly (clang, -O0):
<FormatBitCountToWordCount>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rax
sub    $0x1,%rax
shr    $0x5,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FormatBitCountToWordCount>:
mov    %edi,%eax
add    $0x1f,%rax
shr    $0x5,%rax
ret

LLVM IR (-O0):
define i32 @FormatBitCountToWordCount(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = add i64 %4, 32
%6 = sub i64 %5, 1
%7 = udiv i64 %6, 32
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @FormatBitCountToWordCount(i32 %0) {
%2 = zext i32 %0 to i64
%3 = add nuw nsw i64 %2, 31
%4 = lshr i64 %3, 5
%5 = trunc i64 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ test(int, int, int, char);
int main() {
  printf("====RUNNING S-DES TESTS====\n\n");
  test(150, 140, 486, 'e');
  test(211, 16, 300, 'e');
  test(140, 150, 486, 'd');
  test(16, 211, 300, 'd');
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
mov    $0x96,%edi
mov    $0x8c,%esi
mov    $0x1e6,%edx
mov    $0x65,%ecx
call   1040 <test@plt>
mov    $0xd3,%edi
mov    $0x10,%esi
mov    $0x12c,%edx
mov    $0x65,%ecx
call   1040 <test@plt>
mov    $0x8c,%edi
mov    $0x96,%esi
mov    $0x1e6,%edx
mov    $0x64,%ecx
call   1040 <test@plt>
mov    $0x10,%edi
mov    $0xd3,%esi
mov    $0x12c,%edx
mov    $0x64,%ecx
call   1040 <test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x96,%edi
mov    $0x8c,%esi
mov    $0x1e6,%edx
mov    $0x65,%ecx
call   1040 <test@plt>
mov    $0xd3,%edi
mov    $0x10,%esi
mov    $0x12c,%edx
mov    $0x65,%ecx
call   1040 <test@plt>
mov    $0x8c,%edi
mov    $0x96,%esi
mov    $0x1e6,%edx
mov    $0x64,%ecx
call   1040 <test@plt>
mov    $0x10,%edi
mov    $0xd3,%esi
mov    $0x12c,%edx
mov    $0x64,%ecx
call   1040 <test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [30 x i8] c"====RUNNING S-DES TESTS====\0A\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @test(i32 150, i32 140, i32 486, i8 signext 101)
%4 = call i32 @test(i32 211, i32 16, i32 300, i8 signext 101)
%5 = call i32 @test(i32 140, i32 150, i32 486, i8 signext 100)
%6 = call i32 @test(i32 16, i32 211, i32 300, i8 signext 100)
ret i32 0
}

LLVM IR (-O2):
@str = [29 x i8] c"====RUNNING S-DES TESTS====\0A\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @test(i32 150, i32 140, i32 486, i8 signext 101)
%3 = tail call i32 @test(i32 211, i32 16, i32 300, i8 signext 101)
%4 = tail call i32 @test(i32 140, i32 150, i32 486, i8 signext 100)
%5 = tail call i32 @test(i32 16, i32 211, i32 300, i8 signext 100)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void printNull() { printf("Null: null\n"); }


x86 assembly (clang, -O0):
<printNull>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<printNull>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"Null: null\0A\00"
define void @printNull() {
%1 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [11 x i8] c"Null: null\00"
define void @printNull() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
ret void
}
int xor5(int i, int j) { return ((i * j) % 2 + (i * j) % 3) ? 0 : 1; }


x86 assembly (clang, -O0):
<xor5>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
mov    -0xc(%rbp),%edx
add    %eax,%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xor5>:
imul   %esi,%edi
mov    %edi,%eax
shr    $0x1f,%eax
add    %edi,%eax
and    $0xfffffffe,%eax
movslq %edi,%rcx
sub    %eax,%edi
imul   $0x55555556,%rcx,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rax
add    %edx,%eax
lea    (%rax,%rax,2),%edx
sub    %ecx,%edx
xor    %eax,%eax
cmp    %edx,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @xor5(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %5, %6
%8 = srem i32 %7, 2
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = mul nsw i32 %9, %10
%12 = srem i32 %11, 3
%13 = add nsw i32 %8, %12
%14 = icmp ne i32 %13, 0
%15 = zext i1 %14 to i64
%16 = select i1 %14, i32 0, i32 1
ret i32 %16
}

LLVM IR (-O2):
define i32 @xor5(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
%4 = srem i32 %3, 2
%5 = srem i32 %3, 3
%6 = sub nsw i32 0, %5
%7 = icmp eq i32 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ y;
};
typedef TYPE_1__ XSizeHints;

/* Variables and functions */
int get_XSizeHints_y(void *_p) { return (int)((XSizeHints *)_p)->y; }


x86 assembly (clang, -O0):
<get_XSizeHints_y>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XSizeHints_y>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XSizeHints_y(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XSizeHints_y(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
const char *read_logo(void) {
  static char logo[] = {
      0x2B, 0x2C, 0x2D, 0x2E, 0x2F, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35,
      0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F, 0x4B,
      0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56,
      0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F, 0x6B, 0x6C,
      0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
      0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F, 0};
  return logo;
}


x86 assembly (clang, -O0):
<read_logo>:
push   %rbp
mov    %rsp,%rbp
lea    0x2f25(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_logo>:
lea    0x2f29(%rip),%rax
ret

LLVM IR (-O0):
@read_logo.logo = internal global [64 x i8] c"+,-./0123456789:;<=>?KLMNOPQRSTUVWXYZ[\\]^_klmnopqrstuvwxyz{|}~\7F\00"
define i8* @read_logo() {
ret i8* getelementptr inbounds ([64 x i8], [64 x i8]* @read_logo.logo, i64 0, i64 0)
}

LLVM IR (-O2):
@read_logo.logo = internal global [64 x i8] c"+,-./0123456789:;<=>?KLMNOPQRSTUVWXYZ[\\]^_klmnopqrstuvwxyz{|}~\7F\00"
define i8* @read_logo() {
ret i8* getelementptr inbounds ([64 x i8], [64 x i8]* @read_logo.logo, i64 0, i64 0)
}
int TKMM_FxiToSize(int ix) {
  int ex, fr;
  int sz;
  if (ix < 8)
    return (ix);
  fr = (ix & 7) | 8;
  ex = ix >> 3;
  sz = fr << ex;
  return (sz);
}


x86 assembly (clang, -O0):
<TKMM_FxiToSize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x8,-0x8(%rbp)
jge    111c <TKMM_FxiToSize+0x1c>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1142 <TKMM_FxiToSize+0x42>
mov    -0x8(%rbp),%eax
and    $0x7,%eax
or     $0x8,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x3,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TKMM_FxiToSize>:
mov    %edi,%eax
and    $0x7,%eax
or     $0x8,%eax
mov    %edi,%ecx
shr    $0x3,%ecx
shl    %cl,%eax
cmp    $0x8,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @TKMM_FxiToSize(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
%7 = load i32, i32* %3
%8 = icmp slt i32 %7, 8
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i32, i32* %3
store i32 %10, i32* %2
br label %21
11: ; preds = %1
%12 = load i32, i32* %3
%13 = and i32 %12, 7
%14 = or i32 %13, 8
store i32 %14, i32* %5
%15 = load i32, i32* %3
%16 = ashr i32 %15, 3
store i32 %16, i32* %4
%17 = load i32, i32* %5
%18 = load i32, i32* %4
%19 = shl i32 %17, %18
store i32 %19, i32* %6
%20 = load i32, i32* %6
store i32 %20, i32* %2
br label %21
21: ; preds = %11, %9
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @TKMM_FxiToSize(i32 %0) {
%2 = icmp slt i32 %0, 8
%3 = and i32 %0, 7
%4 = or i32 %3, 8
%5 = ashr i32 %0, 3
%6 = shl i32 %4, %5
%7 = select i1 %2, i32 %0, i32 %6
ret i32 %7
}
unsigned spin_a_while(int amt, unsigned a, unsigned b) {
  int i;
  for (i = 0; i < amt; i++) {
    a = a + 1;
    b = b + a;
  }
  return a;
}


x86 assembly (clang, -O0):
<spin_a_while>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1140 <spin_a_while+0x40>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1114 <spin_a_while+0x14>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spin_a_while>:
xor    %eax,%eax
test   %edi,%edi
cmovns %edi,%eax
add    %esi,%eax
ret

LLVM IR (-O0):
define i32 @spin_a_while(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %18, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %4
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %21
12: ; preds = %8
%13 = load i32, i32* %5
%14 = add i32 %13, 1
store i32 %14, i32* %5
%15 = load i32, i32* %6
%16 = load i32, i32* %5
%17 = add i32 %15, %16
store i32 %17, i32* %6
br label %18
18: ; preds = %12
%19 = load i32, i32* %7
%20 = add nsw i32 %19, 1
store i32 %20, i32* %7
br label %8
21: ; preds = %8
%22 = load i32, i32* %5
ret i32 %22
}

LLVM IR (-O2):
define i32 @spin_a_while(i32 %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %0, 0
%5 = select i1 %4, i32 %0, i32 0
%6 = add i32 %5, %1
ret i32 %6
}
void div_s(float *source1, float *source2, float *target) {
  *target = (*source1) / (*source2);
}


x86 assembly (clang, -O0):
<div_s>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
divss  (%rax),%xmm0
mov    -0x18(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<div_s>:
movss  (%rdi),%xmm0
divss  (%rsi),%xmm0
movss  %xmm0,(%rdx)
ret

LLVM IR (-O0):
define void @div_s(float* %0, float* %1, float* %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float*
store float* %0, float** %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float*, float** %4
%8 = load float, float* %7
%9 = load float*, float** %5
%10 = load float, float* %9
%11 = fdiv float %8, %10
%12 = load float*, float** %6
store float %11, float* %12
ret void
}

LLVM IR (-O2):
define void @div_s(float* nocapture %0, float* nocapture %1, float* nocapture writeonly %2) {
%4 = load float, float* %0
%5 = load float, float* %1
%6 = fdiv float %4, %5
store float %6, float* %2
ret void
}
int GetTransformBits(int method, int histo_bits) {
  const int max_transform_bits = (method < 4) ? 6 : (method > 4) ? 4 : 5;
  return (histo_bits > max_transform_bits) ? max_transform_bits : histo_bits;
}


x86 assembly (clang, -O0):
<GetTransformBits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x4,-0x4(%rbp)
jge    1121 <GetTransformBits+0x21>
mov    $0x6,%eax
mov    %eax,-0x10(%rbp)
jmp    1137 <GetTransformBits+0x37>
mov    -0x4(%rbp),%edx
mov    $0x5,%eax
mov    $0x4,%ecx
cmp    $0x4,%edx
cmovg  %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1154 <GetTransformBits+0x54>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    115a <GetTransformBits+0x5a>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetTransformBits>:
xor    %ecx,%ecx
cmp    $0x4,%edi
sete   %cl
or     $0x4,%ecx
cmp    $0x4,%edi
mov    $0x6,%eax
cmovge %ecx,%eax
cmp    %esi,%eax
cmovge %esi,%eax
ret

LLVM IR (-O0):
define i32 @GetTransformBits(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 4
br i1 %7, label %8, label %9
8: ; preds = %2
br label %14
9: ; preds = %2
%10 = load i32, i32* %3
%11 = icmp sgt i32 %10, 4
%12 = zext i1 %11 to i64
%13 = select i1 %11, i32 4, i32 5
br label %14
14: ; preds = %9, %8
%15 = phi i32 [ 6, %8 ], [ %13, %9 ]
store i32 %15, i32* %5
%16 = load i32, i32* %4
%17 = load i32, i32* %5
%18 = icmp sgt i32 %16, %17
br i1 %18, label %19, label %21
19: ; preds = %14
%20 = load i32, i32* %5
br label %23
21: ; preds = %14
%22 = load i32, i32* %4
br label %23
23: ; preds = %21, %19
%24 = phi i32 [ %20, %19 ], [ %22, %21 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @GetTransformBits(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, 4
%4 = icmp eq i32 %0, 4
%5 = select i1 %4, i32 5, i32 4
%6 = select i1 %3, i32 6, i32 %5
%7 = icmp slt i32 %6, %1
%8 = select i1 %7, i32 %6, i32 %1
ret i32 %8
}
/* Type definitions */
struct image_object {
  int dummy;
};

/* Variables and functions */
int _singularity_image_mount(struct image_object *, char *);
int singularity_image_mount(struct image_object *image, char *mount_point) {
  return (_singularity_image_mount(image, mount_point));
}


x86 assembly (clang, -O0):
<singularity_image_mount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <_singularity_image_mount@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<singularity_image_mount>:
jmp    1030 <_singularity_image_mount@plt>

LLVM IR (-O0):
%struct.image_object = type { i32 }
define i32 @singularity_image_mount(%struct.image_object* %0, i8* %1) {
%3 = alloca %struct.image_object*
%4 = alloca i8*
store %struct.image_object* %0, %struct.image_object** %3
store i8* %1, i8** %4
%5 = load %struct.image_object*, %struct.image_object** %3
%6 = load i8*, i8** %4
%7 = call i32 @_singularity_image_mount(%struct.image_object* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.image_object = type { i32 }
define i32 @singularity_image_mount(%struct.image_object* %0, i8* %1) {
%3 = tail call i32 @_singularity_image_mount(%struct.image_object* %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
int libc_execvp(char const *, char *const *);
int /*<<< orphan*/ watch_log(char *, char const *);
int execvp(const char *file, char *const *argv) {
  watch_log("exec %s\n", file);
  return libc_execvp(file, argv);
}


x86 assembly (clang, -O0):
<execvp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec5(%rip),%rdi
call   1030 <watch_log@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <libc_execvp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<execvp>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0xecf(%rip),%rdi
mov    %rbx,%rsi
call   1030 <watch_log@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <libc_execvp@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"exec %s\0A\00"
define i32 @execvp(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
%5 = load i8*, i8** %3
%6 = call i32 @watch_log(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = load i8*, i8** %3
%8 = load i8**, i8*** %4
%9 = call i32 @libc_execvp(i8* %7, i8** %8)
ret i32 %9
}

LLVM IR (-O2):
@.str = [9 x i8] c"exec %s\0A\00"
define i32 @execvp(i8* %0, i8** %1) {
%3 = tail call i32 @watch_log(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @libc_execvp(i8* %0, i8** %1)
ret i32 %4
}
int test_imm_A1uint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0xA1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A1uint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0xa1,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A1uint64_highword_reg>:
movabs $0xa100000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A1uint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 161
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A1uint64_highword_reg(i64 %0) {
%2 = and i64 %0, 691489734656
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ find(char *);
void find_noindex_small_test() {
  find("benchmarks"
       ".single.small");
}


x86 assembly (clang, -O0):
<find_noindex_small_test>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <find@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_noindex_small_test>:
lea    0xee9(%rip),%rdi
jmp    1030 <find@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"benchmarks.single.small\00"
define void @find_noindex_small_test() {
%1 = call i32 @find(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"benchmarks.single.small\00"
define void @find_noindex_small_test() {
%1 = tail call i32 @find(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret void
}
int test_imm_31uint8_reg(unsigned char val) {
  return ((val) & (0x31 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_31uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0x31,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_31uint8_reg>:
test   $0x31,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_31uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 49
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_31uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 49
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int test_imm_ECuint8_mem(unsigned char *val) {
  return ((*val) & (-0xEC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_ECuint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffff14,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_ECuint8_mem>:
testb  $0x14,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_ECuint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -236
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_ECuint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 20
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int compare_cycles(void const *, void const *);
int rs_rainflow_compare_ascending(void const *left, void const *right) {
  return compare_cycles(left, right);
}


x86 assembly (clang, -O0):
<rs_rainflow_compare_ascending>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <compare_cycles@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rs_rainflow_compare_ascending>:
jmp    1030 <compare_cycles@plt>

LLVM IR (-O0):
define i32 @rs_rainflow_compare_ascending(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @compare_cycles(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @rs_rainflow_compare_ascending(i8* %0, i8* %1) {
%3 = tail call i32 @compare_cycles(i8* %0, i8* %1)
ret i32 %3
}
int __strnlen(int ch) {
  int b;
  return ((b = 64 ^ ch & 223) && b < 27 ? ch & 96 | (b + 12) % 26 + 1 : ch);
}


x86 assembly (clang, -O0):
<__strnlen>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xdf,%eax
xor    $0x40,%eax
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
je     114f <__strnlen+0x4f>
cmpl   $0x1b,-0x8(%rbp)
jge    114f <__strnlen+0x4f>
mov    -0x4(%rbp),%eax
and    $0x60,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0xc,%eax
mov    $0x1a,%ecx
cltd
idiv   %ecx
mov    -0x10(%rbp),%eax
add    $0x1,%edx
or     %edx,%eax
mov    %eax,-0xc(%rbp)
jmp    1155 <__strnlen+0x55>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__strnlen>:
mov    %edi,%eax
mov    %edi,%ecx
and    $0xdf,%ecx
xor    $0x40,%ecx
lea    -0x1(%rcx),%edx
cmp    $0x19,%edx
ja     1137 <__strnlen+0x37>
and    $0x60,%eax
add    $0xc,%cl
movzbl %cl,%ecx
imul   $0x4f,%ecx,%edx
shr    $0xb,%edx
lea    (%rdx,%rdx,4),%esi
lea    (%rsi,%rsi,4),%esi
add    %edx,%esi
sub    %sil,%cl
add    $0x1,%cl
movzbl %cl,%ecx
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @__strnlen(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = and i32 %4, 223
%6 = xor i32 64, %5
store i32 %6, i32* %3
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %19
8: ; preds = %1
%9 = load i32, i32* %3
%10 = icmp slt i32 %9, 27
br i1 %10, label %11, label %19
11: ; preds = %8
%12 = load i32, i32* %2
%13 = and i32 %12, 96
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 12
%16 = srem i32 %15, 26
%17 = add nsw i32 %16, 1
%18 = or i32 %13, %17
br label %21
19: ; preds = %8, %1
%20 = load i32, i32* %2
br label %21
21: ; preds = %19, %11
%22 = phi i32 [ %18, %11 ], [ %20, %19 ]
ret i32 %22
}

LLVM IR (-O2):
define i32 @__strnlen(i32 %0) {
%2 = and i32 %0, 223
%3 = xor i32 %2, 64
%4 = add nsw i32 %3, -1
%5 = icmp ult i32 %4, 26
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = and i32 %0, 96
%8 = trunc i32 %3 to i8
%9 = add nuw nsw i8 %8, 12
%10 = urem i8 %9, 26
%11 = add nuw nsw i8 %10, 1
%12 = zext i8 %11 to i32
%13 = or i32 %7, %12
br label %14
14: ; preds = %1, %6
%15 = phi i32 [ %13, %6 ], [ %0, %1 ]
ret i32 %15
}
int compare_counts(const void *m, const void *n) {
  const int element_m = *(const int *)m;
  const int element_n = *(const int *)n;
  if (element_m > element_n)
    return -1;
  if (element_m < element_n)
    return +1;
  return 0;
}


x86 assembly (clang, -O0):
<compare_counts>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x20(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x20(%rbp),%eax
jle    1136 <compare_counts+0x36>
movl   $0xffffffff,-0x4(%rbp)
jmp    1155 <compare_counts+0x55>
mov    -0x1c(%rbp),%eax
cmp    -0x20(%rbp),%eax
jge    114e <compare_counts+0x4e>
movl   $0x1,-0x4(%rbp)
jmp    1155 <compare_counts+0x55>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_counts>:
mov    (%rdi),%eax
xor    %ecx,%ecx
cmp    (%rsi),%eax
setl   %cl
mov    $0xffffffff,%eax
cmovle %ecx,%eax
ret

LLVM IR (-O0):
define i32 @compare_counts(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
store i32 %10, i32* %6
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to i32*
%13 = load i32, i32* %12
store i32 %13, i32* %7
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = icmp sgt i32 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 -1, i32* %3
br label %24
18: ; preds = %2
%19 = load i32, i32* %6
%20 = load i32, i32* %7
%21 = icmp slt i32 %19, %20
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 1, i32* %3
br label %24
23: ; preds = %18
store i32 0, i32* %3
br label %24
24: ; preds = %23, %22, %17
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @compare_counts(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp sgt i32 %4, %6
%8 = icmp slt i32 %4, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
int add5(int arg1) { return arg1 + 5; }


x86 assembly (clang, -O0):
<add5>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add5>:
lea    0x5(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @add5(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 5
ret i32 %4
}

LLVM IR (-O2):
define i32 @add5(i32 %0) {
%2 = add nsw i32 %0, 5
ret i32 %2
}
void __ctest_suite_test_run() {}


x86 assembly (clang, -O0):
<__ctest_suite_test_run>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ctest_suite_test_run>:
ret

LLVM IR (-O0):
define void @__ctest_suite_test_run() {
ret void
}

LLVM IR (-O2):
define void @__ctest_suite_test_run() {
ret void
}
void SHA256_Update(void) {}


x86 assembly (clang, -O0):
<SHA256_Update>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHA256_Update>:
ret

LLVM IR (-O0):
define void @SHA256_Update() {
ret void
}

LLVM IR (-O2):
define void @SHA256_Update() {
ret void
}
/* Variables and functions */
scalar_t__ strpbrk(char *, char *);
int irc_channel_is_channel(const char *string) {
  char first_char[2];
  if (!string)
    return 0;
  first_char[0] = string[0];
  first_char[1] = '\0';
  return (strpbrk(first_char, "#&+!")) ? 1 : 0;
}


x86 assembly (clang, -O0):
<irc_channel_is_channel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1133 <irc_channel_is_channel+0x23>
movl   $0x0,-0x4(%rbp)
jmp    1164 <irc_channel_is_channel+0x54>
mov    -0x10(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x12(%rbp)
movb   $0x0,-0x11(%rbp)
lea    -0x12(%rbp),%rdi
lea    0xeb5(%rip),%rsi
call   1030 <strpbrk@plt>
mov    %rax,%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irc_channel_is_channel>:
test   %rdi,%rdi
je     1142 <irc_channel_is_channel+0x32>
push   %rax
mov    (%rdi),%al
mov    %al,0x6(%rsp)
movb   $0x0,0x7(%rsp)
lea    0xed8(%rip),%rsi
lea    0x6(%rsp),%rdi
call   1030 <strpbrk@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
add    $0x8,%rsp
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"#&+!\00"
define i32 @irc_channel_is_channel(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca [2 x i8]
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 0, i32* %2
br label %19
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 0
%11 = load i8, i8* %10
%12 = getelementptr inbounds [2 x i8], [2 x i8]* %4, i64 0, i64 0
store i8 %11, i8* %12
%13 = getelementptr inbounds [2 x i8], [2 x i8]* %4, i64 0, i64 1
store i8 0, i8* %13
%14 = getelementptr inbounds [2 x i8], [2 x i8]* %4, i64 0, i64 0
%15 = call i64 @strpbrk(i8* %14, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%16 = icmp ne i64 %15, 0
%17 = zext i1 %16 to i64
%18 = select i1 %16, i32 1, i32 0
store i32 %18, i32* %2
br label %19
19: ; preds = %8, %7
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
@.str = [5 x i8] c"#&+!\00"
define i32 @irc_channel_is_channel(i8* %0) {
%2 = alloca [2 x i8]
%3 = getelementptr inbounds [2 x i8], [2 x i8]* %2, i64 0, i64 0
%4 = icmp eq i8* %0, null
br i1 %4, label %11, label %5
5: ; preds = %1
%6 = load i8, i8* %0
store i8 %6, i8* %3
%7 = getelementptr inbounds [2 x i8], [2 x i8]* %2, i64 0, i64 1
store i8 0, i8* %7
%8 = call i64 @strpbrk(i8* %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%9 = icmp ne i64 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %1, %5
%12 = phi i32 [ %10, %5 ], [ 0, %1 ]
ret i32 %12
}
unsigned int spi_transfer32(volatile unsigned int *base, unsigned int val) {
  *(base + (12 + 1)) = val;
  return *(base + (12 + 1));
}


x86 assembly (clang, -O0):
<spi_transfer32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x34(%rax)
mov    -0x8(%rbp),%rax
mov    0x34(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_transfer32>:
mov    %esi,0x34(%rdi)
mov    0x34(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @spi_transfer32(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 13
store volatile i32 %5, i32* %7
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 13
%10 = load volatile i32, i32* %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @spi_transfer32(i32* %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 13
store volatile i32 %1, i32* %3
%4 = load volatile i32, i32* %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void sd_array_free(void **mem) {
  free(*mem);
  *mem = NULL;
}


x86 assembly (clang, -O0):
<sd_array_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_array_free>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <free@plt>
movq   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @sd_array_free(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
%5 = call i32 @free(i8* %4)
%6 = load i8**, i8*** %2
store i8* null, i8** %6
ret void
}

LLVM IR (-O2):
define void @sd_array_free(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = tail call i32 @free(i8* %2)
store i8* null, i8** %0
ret void
}
/* Variables and functions */
int putchar(int);
int cmputc(int c) { return putchar(c & 0x7f); }


x86 assembly (clang, -O0):
<cmputc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
and    $0x7f,%edi
call   1030 <putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmputc>:
and    $0x7f,%edi
jmp    1030 <putchar@plt>

LLVM IR (-O0):
define i32 @cmputc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 127
%5 = call i32 @putchar(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @cmputc(i32 %0) {
%2 = and i32 %0, 127
%3 = tail call i32 @putchar(i32 %2)
ret i32 %3
}
/* Variables and functions */
int snoopy_genericregistry_getCount(char **);
int snoopy_genericregistry_doesIdExist(char *regArray[], int itemId) {
  if ((0 <= itemId) && (itemId < snoopy_genericregistry_getCount(regArray))) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<snoopy_genericregistry_doesIdExist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
xor    %eax,%eax
cmp    -0x14(%rbp),%eax
jg     1152 <snoopy_genericregistry_doesIdExist+0x42>
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <snoopy_genericregistry_getCount@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
cmp    %ecx,%eax
jge    1152 <snoopy_genericregistry_doesIdExist+0x42>
movl   $0x1,-0x4(%rbp)
jmp    1159 <snoopy_genericregistry_doesIdExist+0x49>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<snoopy_genericregistry_doesIdExist>:
test   %esi,%esi
js     1128 <snoopy_genericregistry_doesIdExist+0x18>
push   %rbx
mov    %esi,%ebx
call   1030 <snoopy_genericregistry_getCount@plt>
mov    %eax,%ecx
mov    $0x1,%eax
cmp    %ebx,%ecx
pop    %rbx
jg     112a <snoopy_genericregistry_doesIdExist+0x1a>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @snoopy_genericregistry_doesIdExist(i8** %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
store i8** %0, i8*** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp sle i32 0, %6
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i32, i32* %5
%10 = load i8**, i8*** %4
%11 = call i32 @snoopy_genericregistry_getCount(i8** %10)
%12 = icmp slt i32 %9, %11
br i1 %12, label %13, label %14
13: ; preds = %8
store i32 1, i32* %3
br label %15
14: ; preds = %8, %2
store i32 0, i32* %3
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @snoopy_genericregistry_doesIdExist(i8** %0, i32 %1) {
%3 = icmp sgt i32 %1, -1
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = tail call i32 @snoopy_genericregistry_getCount(i8** %0)
%6 = icmp sgt i32 %5, %1
br i1 %6, label %8, label %7
7: ; preds = %4, %2
br label %8
8: ; preds = %4, %7
%9 = phi i32 [ 0, %7 ], [ 1, %4 ]
ret i32 %9
}
/* Type definitions */
struct tm {
  int dummy;
};

/* Variables and functions */
char *asctime_r(struct tm *, char *);
int test(void) {
  char *buffer_pointer;
  struct tm timestruct;
  char buffer[80];
  buffer_pointer = asctime_r(&timestruct, buffer);
  return (buffer_pointer != NULL);
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
lea    -0x60(%rbp),%rsi
lea    -0x10(%rbp),%rdi
call   1030 <asctime_r@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
sub    $0x68,%rsp
lea    0x8(%rsp),%rdi
lea    0x10(%rsp),%rsi
call   1030 <asctime_r@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
add    $0x68,%rsp
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define i32 @test() {
%1 = alloca i8*
%2 = alloca %struct.tm
%3 = alloca [80 x i8]
%4 = getelementptr inbounds [80 x i8], [80 x i8]* %3, i64 0, i64 0
%5 = call i8* @asctime_r(%struct.tm* %2, i8* %4)
store i8* %5, i8** %1
%6 = load i8*, i8** %1
%7 = icmp ne i8* %6, null
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define i32 @test() {
%1 = alloca %struct.tm
%2 = alloca [80 x i8]
%3 = bitcast %struct.tm* %1 to i8*
%4 = getelementptr inbounds [80 x i8], [80 x i8]* %2, i64 0, i64 0
%5 = call i8* @asctime_r(%struct.tm* %1, i8* %4)
%6 = icmp ne i8* %5, null
%7 = zext i1 %6 to i32
ret i32 %7
}
void *test_anti_range_141(long n) {
  extern void *alloc_anti_range_141(long) __attribute__((alloc_size(1)));
  if (-1 <= n && n <= 2)
    n = -1 - 1;
  return alloc_anti_range_141(n);
}


x86 assembly (clang, -O0):
<test_anti_range_141>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffffffffffff,%rax
cmp    -0x8(%rbp),%rax
jg     1140 <test_anti_range_141+0x30>
cmpq   $0x2,-0x8(%rbp)
jg     1140 <test_anti_range_141+0x30>
movq   $0xfffffffffffffffe,-0x8(%rbp)
ff
mov    -0x8(%rbp),%rdi
call   1030 <alloc_anti_range_141@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_anti_range_141>:
lea    0x1(%rdi),%rax
cmp    $0x4,%rax
mov    $0xfffffffffffffffe,%rax
cmovb  %rax,%rdi
jmp    1030 <alloc_anti_range_141@plt>

LLVM IR (-O0):
define i8* @test_anti_range_141(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp sle i64 -1, %3
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i64, i64* %2
%7 = icmp sle i64 %6, 2
br i1 %7, label %8, label %9
8: ; preds = %5
store i64 -2, i64* %2
br label %9
9: ; preds = %8, %5, %1
%10 = load i64, i64* %2
%11 = call i8* @alloc_anti_range_141(i64 %10)
ret i8* %11
}

LLVM IR (-O2):
define i8* @test_anti_range_141(i64 %0) {
%2 = add i64 %0, 1
%3 = icmp ult i64 %2, 4
%4 = select i1 %3, i64 -2, i64 %0
%5 = tail call i8* @alloc_anti_range_141(i64 %4)
ret i8* %5
}
/* Type definitions */
struct ofpbuf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ofpbuf_resize_tailroom__(struct ofpbuf *, size_t);
size_t ofpbuf_tailroom(struct ofpbuf *);
void ofpbuf_prealloc_tailroom(struct ofpbuf *b, size_t size) {
  if (size > ofpbuf_tailroom(b)) {
    ofpbuf_resize_tailroom__(b, ((size) > (64) ? (size) : (64)));
  }
}


x86 assembly (clang, -O0):
<ofpbuf_prealloc_tailroom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <ofpbuf_tailroom@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
jbe    118c <ofpbuf_prealloc_tailroom+0x6c>
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
cmpq   $0x40,-0x10(%rbp)
jbe    1171 <ofpbuf_prealloc_tailroom+0x51>
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
jmp    117f <ofpbuf_prealloc_tailroom+0x5f>
mov    $0x40,%eax
mov    %rax,-0x28(%rbp)
jmp    117f <ofpbuf_prealloc_tailroom+0x5f>
mov    -0x20(%rbp),%rdi
mov    -0x28(%rbp),%rsi
call   1030 <ofpbuf_resize_tailroom__@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ofpbuf_prealloc_tailroom>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
call   1040 <ofpbuf_tailroom@plt>
cmp    %rbx,%rax
jae    1150 <ofpbuf_prealloc_tailroom+0x30>
cmp    $0x41,%rbx
mov    $0x40,%esi
cmovae %rbx,%rsi
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <ofpbuf_resize_tailroom__@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.ofpbuf = type { i32 }
define void @ofpbuf_prealloc_tailroom(%struct.ofpbuf* %0, i64 %1) {
%3 = alloca %struct.ofpbuf*
%4 = alloca i64
store %struct.ofpbuf* %0, %struct.ofpbuf** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load %struct.ofpbuf*, %struct.ofpbuf** %3
%7 = call i64 @ofpbuf_tailroom(%struct.ofpbuf* %6)
%8 = icmp ugt i64 %5, %7
br i1 %8, label %9, label %19
9: ; preds = %2
%10 = load %struct.ofpbuf*, %struct.ofpbuf** %3
%11 = load i64, i64* %4
%12 = icmp ugt i64 %11, 64
br i1 %12, label %13, label %15
13: ; preds = %9
%14 = load i64, i64* %4
br label %16
15: ; preds = %9
br label %16
16: ; preds = %15, %13
%17 = phi i64 [ %14, %13 ], [ 64, %15 ]
%18 = call i32 @ofpbuf_resize_tailroom__(%struct.ofpbuf* %10, i64 %17)
br label %19
19: ; preds = %16, %2
ret void
}

LLVM IR (-O2):
%struct.ofpbuf = type { i32 }
define void @ofpbuf_prealloc_tailroom(%struct.ofpbuf* %0, i64 %1) {
%3 = tail call i64 @ofpbuf_tailroom(%struct.ofpbuf* %0)
%4 = icmp ult i64 %3, %1
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = icmp ugt i64 %1, 64
%7 = select i1 %6, i64 %1, i64 64
%8 = tail call i32 @ofpbuf_resize_tailroom__(%struct.ofpbuf* %0, i64 %7)
br label %9
9: ; preds = %5, %2
ret void
}
/* Variables and functions */
scalar_t__ get_next_input_from_fuzzer();
short map2check_non_det_short() { return (short)get_next_input_from_fuzzer(); }


x86 assembly (clang, -O0):
<map2check_non_det_short>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <get_next_input_from_fuzzer@plt>
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<map2check_non_det_short>:
push   %rax
xor    %eax,%eax
call   1030 <get_next_input_from_fuzzer@plt>
pop    %rcx
ret

LLVM IR (-O0):
define signext i16 @map2check_non_det_short() {
%1 = call i64 (...) @get_next_input_from_fuzzer()
%2 = trunc i64 %1 to i16
ret i16 %2
}

LLVM IR (-O2):
define signext i16 @map2check_non_det_short() {
%1 = tail call i64 (...) @get_next_input_from_fuzzer()
%2 = trunc i64 %1 to i16
ret i16 %2
}
/* Variables and functions */
int /*<<< orphan*/ fail(char *);
int scanf(char *, char *);
int write(int, void const *, int);
void to_fd(int fd) {
  char byte;
  if (scanf("%hhx", &byte) != 1)
    fail("scanf");
  if (write(fd, (const void *)&byte, 1) != 1)
    fail("write");
}


x86 assembly (clang, -O0):
<to_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xebe(%rip),%rdi
lea    -0x5(%rbp),%rsi
call   1050 <scanf@plt>
cmp    $0x1,%eax
je     1160 <to_fd+0x30>
lea    0xeaa(%rip),%rdi
call   1040 <fail@plt>
mov    -0x4(%rbp),%edi
lea    -0x5(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
cmp    $0x1,%eax
je     1186 <to_fd+0x56>
lea    0xe8a(%rip),%rdi
call   1040 <fail@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<to_fd>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
lea    0xec2(%rip),%rdi
lea    0xf(%rsp),%rsi
call   1050 <scanf@plt>
cmp    $0x1,%eax
je     1159 <to_fd+0x29>
lea    0xeb1(%rip),%rdi
call   1040 <fail@plt>
lea    0xf(%rsp),%rsi
mov    %ebx,%edi
mov    $0x1,%edx
call   1030 <write@plt>
cmp    $0x1,%eax
je     117b <to_fd+0x4b>
lea    0xe95(%rip),%rdi
call   1040 <fail@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%hhx\00"
@.str.1 = [6 x i8] c"scanf\00"
@.str.2 = [6 x i8] c"write\00"
define void @to_fd(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = icmp ne i32 %4, 1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @fail(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
%9 = load i32, i32* %2
%10 = call i32 @write(i32 %9, i8* %3, i32 1)
%11 = icmp ne i32 %10, 1
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = call i32 @fail(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0))
br label %14
14: ; preds = %12, %8
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%hhx\00"
@.str.1 = [6 x i8] c"scanf\00"
@.str.2 = [6 x i8] c"write\00"
define void @to_fd(i32 %0) {
%2 = alloca i8
%3 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = icmp eq i32 %3, 1
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = call i32 @fail(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
br label %7
7: ; preds = %5, %1
%8 = call i32 @write(i32 %0, i8* %2, i32 1)
%9 = icmp eq i32 %8, 1
br i1 %9, label %12, label %10
10: ; preds = %7
%11 = call i32 @fail(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0))
br label %12
12: ; preds = %10, %7
ret void
}