xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
void swap_4byte_to_8byte(int32_t *e) {
  int32_t a;
  a = e[0];
  e[0] = e[1];
  e[1] = a;
  ;
}


x86 assembly (clang, -O0):
<swap_4byte_to_8byte>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_4byte_to_8byte>:
rolq   $0x20,(%rdi)
ret

LLVM IR (-O0):
define void @swap_4byte_to_8byte(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = getelementptr inbounds i32, i32* %4, i64 0
%6 = load i32, i32* %5
store i32 %6, i32* %3
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = load i32*, i32** %2
%11 = getelementptr inbounds i32, i32* %10, i64 0
store i32 %9, i32* %11
%12 = load i32, i32* %3
%13 = load i32*, i32** %2
%14 = getelementptr inbounds i32, i32* %13, i64 1
store i32 %12, i32* %14
ret void
}

LLVM IR (-O2):
define void @swap_4byte_to_8byte(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = load i32, i32* %3
store i32 %4, i32* %0
store i32 %2, i32* %3
ret void
}
void release_thin(struct mosaic *m) {}


x86 assembly (clang, -O0):
<release_thin>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<release_thin>:
ret

LLVM IR (-O0):
%struct.mosaic = type opaque
define void @release_thin(%struct.mosaic* %0) {
%2 = alloca %struct.mosaic*
store %struct.mosaic* %0, %struct.mosaic** %2
ret void
}

LLVM IR (-O2):
%struct.mosaic = type opaque
define void @release_thin(%struct.mosaic* nocapture %0) {
ret void
}
/* Type definitions */
struct sembuf {
  unsigned short sem_num;
  short sem_op;
  short sem_flg;
};

/* Variables and functions */
struct sembuf semop_entry(unsigned short sem_num, short sem_op, short sem_flg) {
  struct sembuf sembuf = {
      .sem_num = sem_num, .sem_op = sem_op, .sem_flg = sem_flg};
  return sembuf;
}


x86 assembly (clang, -O0):
<semop_entry>:
push   %rbp
mov    %rsp,%rbp
mov    %dx,%ax
mov    %si,%cx
mov    %di,%dx
mov    %dx,-0xa(%rbp)
mov    %cx,-0xc(%rbp)
mov    %ax,-0xe(%rbp)
mov    -0xa(%rbp),%ax
mov    %ax,-0x8(%rbp)
mov    -0xc(%rbp),%ax
mov    %ax,-0x6(%rbp)
mov    -0xe(%rbp),%ax
mov    %ax,-0x4(%rbp)
mov    -0x4(%rbp),%ax
mov    %ax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    -0x14(%rbp),%ecx
shl    $0x20,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<semop_entry>:
shl    $0x20,%rdx
movzwl %si,%ecx
shl    $0x10,%rcx
or     %rdx,%rcx
mov    %edi,%eax
or     %rcx,%rax
ret

LLVM IR (-O0):
%struct.sembuf = type { i16, i16, i16 }
define i48 @semop_entry(i16 zeroext %0, i16 signext %1, i16 signext %2) {
%4 = alloca %struct.sembuf
%5 = alloca i16
%6 = alloca i16
%7 = alloca i16
%8 = alloca i48
store i16 %0, i16* %5
store i16 %1, i16* %6
store i16 %2, i16* %7
%9 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %4, i32 0, i32 0
%10 = load i16, i16* %5
store i16 %10, i16* %9
%11 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %4, i32 0, i32 1
%12 = load i16, i16* %6
store i16 %12, i16* %11
%13 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %4, i32 0, i32 2
%14 = load i16, i16* %7
store i16 %14, i16* %13
%15 = bitcast i48* %8 to i8*
%16 = bitcast %struct.sembuf* %4 to i8*
%17 = load i48, i48* %8
ret i48 %17
}

LLVM IR (-O2):
define i48 @semop_entry(i16 zeroext %0, i16 signext %1, i16 signext %2) {
%4 = zext i16 %2 to i48
%5 = shl nuw i48 %4, 32
%6 = zext i16 %1 to i48
%7 = shl nuw nsw i48 %6, 16
%8 = or i48 %5, %7
%9 = zext i16 %0 to i48
%10 = or i48 %8, %9
ret i48 %10
}
void bn_sqr_words(void) {}


x86 assembly (clang, -O0):
<bn_sqr_words>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bn_sqr_words>:
ret

LLVM IR (-O0):
define void @bn_sqr_words() {
ret void
}

LLVM IR (-O2):
define void @bn_sqr_words() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int x = -25;
  int delta = 5;
  int result = 0;
  result = (((x + delta) < 0) ? -(x + delta) : (x + delta));
  printf("ABSOLUTE_VALUE(x(-25) + delta(5)) = %i\n", result);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xffffffe7,-0x8(%rbp)
movl   $0x5,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
cmp    $0x0,%eax
jge    1155 <main+0x45>
mov    -0x8(%rbp),%ecx
add    -0xc(%rbp),%ecx
xor    %eax,%eax
sub    %ecx,%eax
mov    %eax,-0x14(%rbp)
jmp    115e <main+0x4e>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%esi
lea    0xe92(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x14,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [40 x i8] c"ABSOLUTE_VALUE(x(-25) + delta(5)) = %i\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 -25, i32* %2
store i32 5, i32* %3
store i32 0, i32* %4
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = add nsw i32 %5, %6
%8 = icmp slt i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %0
%10 = load i32, i32* %2
%11 = load i32, i32* %3
%12 = add nsw i32 %10, %11
%13 = sub nsw i32 0, %12
br label %18
14: ; preds = %0
%15 = load i32, i32* %2
%16 = load i32, i32* %3
%17 = add nsw i32 %15, %16
br label %18
18: ; preds = %14, %9
%19 = phi i32 [ %13, %9 ], [ %17, %14 ]
store i32 %19, i32* %4
%20 = load i32, i32* %4
%21 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i32 %20)
ret i32 0
}

LLVM IR (-O2):
@.str = [40 x i8] c"ABSOLUTE_VALUE(x(-25) + delta(5)) = %i\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i32 20)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ PushMarkArgumentSyntaxMapping(int, long);
void PushInOutMarkArgumentSyntaxMapping(long p_index) {
  PushMarkArgumentSyntaxMapping(2, p_index);
}


x86 assembly (clang, -O0):
<PushInOutMarkArgumentSyntaxMapping>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x2,%edi
call   1030 <PushMarkArgumentSyntaxMapping@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PushInOutMarkArgumentSyntaxMapping>:
mov    %rdi,%rsi
mov    $0x2,%edi
jmp    1030 <PushMarkArgumentSyntaxMapping@plt>

LLVM IR (-O0):
define void @PushInOutMarkArgumentSyntaxMapping(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @PushMarkArgumentSyntaxMapping(i32 2, i64 %3)
ret void
}

LLVM IR (-O2):
define void @PushInOutMarkArgumentSyntaxMapping(i64 %0) {
%2 = tail call i32 @PushMarkArgumentSyntaxMapping(i32 2, i64 %0)
ret void
}
int is_in_bound(int *arr, int size, int *ptr) {
  for (int i = 0; i < size; i++) {
    if (ptr == &arr[i])
      return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<is_in_bound>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
movl   $0x0,-0x24(%rbp)
mov    -0x24(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    115d <is_in_bound+0x5d>
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%rcx
movslq -0x24(%rbp),%rdx
shl    $0x2,%rdx
add    %rdx,%rcx
cmp    %rcx,%rax
jne    114a <is_in_bound+0x4a>
movl   $0x1,-0x4(%rbp)
jmp    1164 <is_in_bound+0x64>
jmp    114f <is_in_bound+0x4f>
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    1116 <is_in_bound+0x16>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_in_bound>:
movslq %esi,%r8
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nop
mov    %rax,%rsi
cmp    %r8,%rax
jge    1128 <is_in_bound+0x28>
lea    0x1(%rsi),%rax
lea    0x4(%rdi),%rcx
cmp    %rdx,%rdi
mov    %rcx,%rdi
jne    1110 <is_in_bound+0x10>
xor    %eax,%eax
cmp    %r8,%rsi
setl   %al
ret

LLVM IR (-O0):
define i32 @is_in_bound(i32* %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32 0, i32* %8
br label %9
9: ; preds = %22, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %25
13: ; preds = %9
%14 = load i32*, i32** %7
%15 = load i32*, i32** %5
%16 = load i32, i32* %8
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %15, i64 %17
%19 = icmp eq i32* %14, %18
br i1 %19, label %20, label %21
20: ; preds = %13
store i32 1, i32* %4
br label %26
21: ; preds = %13
br label %22
22: ; preds = %21
%23 = load i32, i32* %8
%24 = add nsw i32 %23, 1
store i32 %24, i32* %8
br label %9
25: ; preds = %9
store i32 0, i32* %4
br label %26
26: ; preds = %25, %20
%27 = load i32, i32* %4
ret i32 %27
}

LLVM IR (-O2):
define i32 @is_in_bound(i32* readnone %0, i32 %1, i32* readnone %2) {
%4 = sext i32 %1 to i64
br label %5
5: ; preds = %5, %3
%6 = phi i64 [ %12, %5 ], [ 0, %3 ]
%7 = icmp slt i64 %6, %4
%8 = xor i1 %7, true
%9 = getelementptr inbounds i32, i32* %0, i64 %6
%10 = icmp eq i32* %9, %2
%11 = select i1 %8, i1 true, i1 %10
%12 = add nuw i64 %6, 1
br i1 %11, label %13, label %5
13: ; preds = %5
%14 = zext i1 %7 to i32
ret i32 %14
}
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ epoll51(struct __test_metadata *);
void wrapper_epoll51(struct __test_metadata *_metadata,
                     struct __fixture_variant_metadata *variant) {
  epoll51(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_epoll51>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <epoll51@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_epoll51>:
jmp    1030 <epoll51@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll51(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @epoll51(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll51(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @epoll51(%struct.__test_metadata* %0)
ret void
}
char *strswap(char *in, char from, char to) {
  char *p = in;
  while (*p) {
    if (*p == from)
      *p = to;
    p++;
  }
  return in;
}


x86 assembly (clang, -O0):
<strswap>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     1155 <strswap+0x55>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jne    1144 <strswap+0x44>
mov    -0xa(%rbp),%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    111b <strswap+0x1b>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strswap>:
mov    %rdi,%rax
mov    (%rdi),%cl
test   %cl,%cl
je     1125 <strswap+0x25>
lea    0x1(%rax),%rdi
jmp    111b <strswap+0x1b>
nop
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
je     1125 <strswap+0x25>
cmp    %sil,%cl
jne    1110 <strswap+0x10>
mov    %dl,-0x1(%rdi)
jmp    1110 <strswap+0x10>
ret

LLVM IR (-O0):
define i8* @strswap(i8* %0, i8 signext %1, i8 signext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8*
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%8 = load i8*, i8** %4
store i8* %8, i8** %7
br label %9
9: ; preds = %23, %3
%10 = load i8*, i8** %7
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %26
13: ; preds = %9
%14 = load i8*, i8** %7
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = load i8, i8* %5
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %16, %18
br i1 %19, label %20, label %23
20: ; preds = %13
%21 = load i8, i8* %6
%22 = load i8*, i8** %7
store i8 %21, i8* %22
br label %23
23: ; preds = %20, %13
%24 = load i8*, i8** %7
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %7
br label %9
26: ; preds = %9
%27 = load i8*, i8** %4
ret i8* %27
}

LLVM IR (-O2):
define i8* @strswap(i8* returned %0, i8 signext %1, i8 signext %2) {
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %15, label %6
6: ; preds = %3, %11
%7 = phi i8 [ %13, %11 ], [ %4, %3 ]
%8 = phi i8* [ %12, %11 ], [ %0, %3 ]
%9 = icmp eq i8 %7, %1
br i1 %9, label %10, label %11
10: ; preds = %6
store i8 %2, i8* %8
br label %11
11: ; preds = %10, %6
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %6
15: ; preds = %11, %3
ret i8* %0
}
/* Type definitions */
struct usd_device {
  int dummy;
};

/* Variables and functions */
int EINVAL;
int usd_ib_cmd_create_comp_channel(struct usd_device *, int *);
int usd_get_completion_fd(struct usd_device *dev, int *comp_fd_o) {
  if (dev == NULL || comp_fd_o == NULL)
    return -EINVAL;
  return usd_ib_cmd_create_comp_channel(dev, comp_fd_o);
}


x86 assembly (clang, -O0):
<usd_get_completion_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1136 <usd_get_completion_fd+0x26>
cmpq   $0x0,-0x18(%rbp)
jne    1149 <usd_get_completion_fd+0x39>
xor    %eax,%eax
mov    0x2ea1(%rip),%rcx
sub    (%rcx),%eax
mov    %eax,-0x4(%rbp)
jmp    1159 <usd_get_completion_fd+0x49>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <usd_ib_cmd_create_comp_channel@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usd_get_completion_fd>:
test   %rdi,%rdi
je     111f <usd_get_completion_fd+0xf>
test   %rsi,%rsi
je     111f <usd_get_completion_fd+0xf>
jmp    1030 <usd_ib_cmd_create_comp_channel@plt>
mov    0x2eba(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
%struct.usd_device = type { i32 }
@EINVAL = global i32 0
define i32 @usd_get_completion_fd(%struct.usd_device* %0, i32* %1) {
%3 = alloca i32
%4 = alloca %struct.usd_device*
%5 = alloca i32*
store %struct.usd_device* %0, %struct.usd_device** %4
store i32* %1, i32** %5
%6 = load %struct.usd_device*, %struct.usd_device** %4
%7 = icmp eq %struct.usd_device* %6, null
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i32*, i32** %5
%10 = icmp eq i32* %9, null
br i1 %10, label %11, label %14
11: ; preds = %8, %2
%12 = load i32, i32* @EINVAL
%13 = sub nsw i32 0, %12
store i32 %13, i32* %3
br label %18
14: ; preds = %8
%15 = load %struct.usd_device*, %struct.usd_device** %4
%16 = load i32*, i32** %5
%17 = call i32 @usd_ib_cmd_create_comp_channel(%struct.usd_device* %15, i32* %16)
store i32 %17, i32* %3
br label %18
18: ; preds = %14, %11
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
%struct.usd_device = type { i32 }
@EINVAL = global i32 0
define i32 @usd_get_completion_fd(%struct.usd_device* %0, i32* %1) {
%3 = icmp eq %struct.usd_device* %0, null
%4 = icmp eq i32* %1, null
%5 = or i1 %3, %4
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = load i32, i32* @EINVAL
%8 = sub nsw i32 0, %7
br label %11
9: ; preds = %2
%10 = tail call i32 @usd_ib_cmd_create_comp_channel(%struct.usd_device* %0, i32* %1)
br label %11
11: ; preds = %9, %6
%12 = phi i32 [ %8, %6 ], [ %10, %9 ]
ret i32 %12
}
int y2doy(int y) {
  int doy;
  if ((y % 400) == 0) {
    doy = 366;
  } else if ((y % 100) == 0) {
    doy = 365;
  } else if ((y % 4) == 0) {
    doy = 366;
  } else {
    doy = 365;
  }
  return (doy);
}


x86 assembly (clang, -O0):
<y2doy>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1127 <y2doy+0x27>
movl   $0x16e,-0x8(%rbp)
jmp    1178 <y2doy+0x78>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1147 <y2doy+0x47>
movl   $0x16d,-0x8(%rbp)
jmp    1173 <y2doy+0x73>
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1167 <y2doy+0x67>
movl   $0x16e,-0x8(%rbp)
jmp    116e <y2doy+0x6e>
movl   $0x16d,-0x8(%rbp)
jmp    1173 <y2doy+0x73>
jmp    1178 <y2doy+0x78>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<y2doy>:
imul   $0xc28f5c29,%edi,%eax
add    $0x51eb850,%eax
mov    %eax,%ecx
ror    $0x4,%ecx
cmp    $0xa3d70b,%ecx
jb     1131 <y2doy+0x31>
ror    $0x2,%eax
cmp    $0x28f5c29,%eax
jb     1137 <y2doy+0x37>
and    $0x3,%edi
cmp    $0x1,%edi
mov    $0x16d,%eax
adc    $0x0,%eax
ret
mov    $0x16e,%eax
ret
mov    $0x16d,%eax
ret

LLVM IR (-O0):
define i32 @y2doy(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = srem i32 %4, 400
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 366, i32* %3
br label %21
8: ; preds = %1
%9 = load i32, i32* %2
%10 = srem i32 %9, 100
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 365, i32* %3
br label %20
13: ; preds = %8
%14 = load i32, i32* %2
%15 = srem i32 %14, 4
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 366, i32* %3
br label %19
18: ; preds = %13
store i32 365, i32* %3
br label %19
19: ; preds = %18, %17
br label %20
20: ; preds = %19, %12
br label %21
21: ; preds = %20, %7
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @y2doy(i32 %0) {
%2 = srem i32 %0, 400
%3 = icmp eq i32 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = srem i32 %0, 100
%6 = icmp eq i32 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = and i32 %0, 3
%9 = icmp eq i32 %8, 0
%10 = select i1 %9, i32 366, i32 365
br label %11
11: ; preds = %7, %4, %1
%12 = phi i32 [ 366, %1 ], [ 365, %4 ], [ %10, %7 ]
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
void le64_to_cpus(uint64_t *p) {}


x86 assembly (clang, -O0):
<le64_to_cpus>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<le64_to_cpus>:
ret

LLVM IR (-O0):
define void @le64_to_cpus(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @le64_to_cpus(i32* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ invalid_phase(char *);
void phase_5(char *input) { invalid_phase("5c"); }


x86 assembly (clang, -O0):
<phase_5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <invalid_phase@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<phase_5>:
lea    0xee9(%rip),%rdi
jmp    1030 <invalid_phase@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"5c\00"
define void @phase_5(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @invalid_phase(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"5c\00"
define void @phase_5(i8* nocapture readnone %0) {
%2 = tail call i32 @invalid_phase(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int fgetc(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char const *);
int /*<<< orphan*/ stdin;
int prompt_yn(const char *message) {
  if (message != NULL) {
    printf(message);
  }
  int answer = fgetc(stdin);
  if (answer < 0) {
    return -1;
  }
  if (answer == 'y' || answer == 'Y')
    return 0;
  else
    return 1;
}


x86 assembly (clang, -O0):
<prompt_yn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1140 <prompt_yn+0x20>
mov    -0x10(%rbp),%rdi
call   1030 <printf@plt>
mov    0x2ea1(%rip),%rax
mov    (%rax),%edi
call   1040 <fgetc@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jge    1167 <prompt_yn+0x47>
movl   $0xffffffff,-0x4(%rbp)
jmp    118e <prompt_yn+0x6e>
cmpl   $0x79,-0x14(%rbp)
je     117b <prompt_yn+0x5b>
cmpl   $0x59,-0x14(%rbp)
jne    1187 <prompt_yn+0x67>
movl   $0x0,-0x4(%rbp)
jmp    118e <prompt_yn+0x6e>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prompt_yn>:
push   %rax
test   %rdi,%rdi
je     112b <prompt_yn+0xb>
call   1030 <printf@plt>
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
call   1040 <fgetc@plt>
mov    %eax,%ecx
and    $0xffffffdf,%ecx
xor    %edx,%edx
cmp    $0x59,%ecx
setne  %dl
test   %eax,%eax
mov    $0xffffffff,%eax
cmovns %edx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stdin = global i32 0
define i32 @prompt_yn(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = call i32 @printf(i8* %8)
br label %10
10: ; preds = %7, %1
%11 = load i32, i32* @stdin
%12 = call i32 @fgetc(i32 %11)
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = icmp slt i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %10
store i32 -1, i32* %2
br label %24
16: ; preds = %10
%17 = load i32, i32* %4
%18 = icmp eq i32 %17, 121
br i1 %18, label %22, label %19
19: ; preds = %16
%20 = load i32, i32* %4
%21 = icmp eq i32 %20, 89
br i1 %21, label %22, label %23
22: ; preds = %19, %16
store i32 0, i32* %2
br label %24
23: ; preds = %19
store i32 1, i32* %2
br label %24
24: ; preds = %23, %22, %15
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
@stdin = global i32 0
define i32 @prompt_yn(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @printf(i8* %0)
br label %5
5: ; preds = %3, %1
%6 = load i32, i32* @stdin
%7 = tail call i32 @fgetc(i32 %6)
%8 = and i32 %7, -33
%9 = icmp ne i32 %8, 89
%10 = zext i1 %9 to i32
%11 = icmp sgt i32 %7, -1
%12 = select i1 %11, i32 %10, i32 -1
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ tpi_read();
int /*<<< orphan*/ tpi_write(int);
uint8_t tpi_sld_postinc(void) {
  tpi_write((0x24));
  return tpi_read();
}


x86 assembly (clang, -O0):
<tpi_sld_postinc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x24,%edi
call   1040 <tpi_write@plt>
mov    $0x0,%al
call   1030 <tpi_read@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tpi_sld_postinc>:
push   %rax
mov    $0x24,%edi
call   1040 <tpi_write@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <tpi_read@plt>

LLVM IR (-O0):
define i32 @tpi_sld_postinc() {
%1 = call i32 @tpi_write(i32 36)
%2 = call i32 (...) @tpi_read()
ret i32 %2
}

LLVM IR (-O2):
define i32 @tpi_sld_postinc() {
%1 = tail call i32 @tpi_write(i32 36)
%2 = tail call i32 (...) @tpi_read()
ret i32 %2
}
void f(int i) {}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
ret

LLVM IR (-O0):
define void @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @f(i32 %0) {
ret void
}
void convolution(double *fld1, double *fld2, double *res, double fac, int jres,
                 int ncols) {
  return;
}


x86 assembly (clang, -O0):
<convolution>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movsd  %xmm0,-0x20(%rbp)
mov    %ecx,-0x24(%rbp)
mov    %r8d,-0x28(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<convolution>:
ret

LLVM IR (-O0):
define void @convolution(double* %0, double* %1, double* %2, double %3, i32 %4, i32 %5) {
%7 = alloca double*
%8 = alloca double*
%9 = alloca double*
%10 = alloca double
%11 = alloca i32
%12 = alloca i32
store double* %0, double** %7
store double* %1, double** %8
store double* %2, double** %9
store double %3, double* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
ret void
}

LLVM IR (-O2):
define void @convolution(double* nocapture %0, double* nocapture %1, double* nocapture %2, double %3, i32 %4, i32 %5) {
ret void
}
int f4(int a, unsigned b) {
  long long c;
  return __builtin_mul_overflow(a, b, &c);
}


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x8(%rbp),%eax
movslq %ecx,%rcx
mov    %eax,%eax
imul   %rax,%rcx
seto   %al
mov    %rcx,-0x10(%rbp)
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @f4(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = sext i32 %6 to i64
%9 = zext i32 %7 to i64
%10 = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 %8, i64 %9)
%11 = extractvalue { i64, i1 } %10, 1
%12 = extractvalue { i64, i1 } %10, 0
store i64 %12, i64* %5
%13 = zext i1 %11 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @f4(i32 %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int tst_bt_entry(int, char **);
int main(int argc, char **argv) { return tst_bt_entry(argc, argv); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <tst_bt_entry@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
jmp    1030 <tst_bt_entry@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @tst_bt_entry(i32 %6, i8** %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @tst_bt_entry(i32 %0, i8** %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ SIGHUP;
int kill(int, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
int main(void) {
  int ret;
  ret = kill(5261, 0);
  if (ret) {
    perror("kill");
  } else {
    ret = kill(5261, SIGHUP);
    if (ret) {
      perror("kill");
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x148d,%edi
xor    %esi,%esi
call   1030 <kill@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1159 <main+0x39>
lea    0xeb1(%rip),%rdi
call   1040 <perror@plt>
jmp    118a <main+0x6a>
mov    0x2e90(%rip),%rax
mov    (%rax),%esi
mov    $0x148d,%edi
call   1030 <kill@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1185 <main+0x65>
lea    0xe80(%rip),%rdi
call   1040 <perror@plt>
jmp    118a <main+0x6a>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x148d,%edi
xor    %esi,%esi
call   1030 <kill@plt>
test   %eax,%eax
jne    114c <main+0x2c>
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
mov    $0x148d,%edi
call   1030 <kill@plt>
test   %eax,%eax
jne    114c <main+0x2c>
xor    %eax,%eax
pop    %rcx
ret
lea    0xead(%rip),%rdi
call   1040 <perror@plt>
jmp    1148 <main+0x28>

LLVM IR (-O0):
@.str = [5 x i8] c"kill\00"
@SIGHUP = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @kill(i32 5261, i32 0)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @perror(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %16
8: ; preds = %0
%9 = load i32, i32* @SIGHUP
%10 = call i32 @kill(i32 5261, i32 %9)
store i32 %10, i32* %2
%11 = load i32, i32* %2
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %8
%14 = call i32 @perror(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %15
15: ; preds = %13, %8
br label %16
16: ; preds = %15, %6
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"kill\00"
@SIGHUP = global i32 0
define i32 @main() {
%1 = tail call i32 @kill(i32 5261, i32 0)
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %7
3: ; preds = %0
%4 = load i32, i32* @SIGHUP
%5 = tail call i32 @kill(i32 5261, i32 %4)
%6 = icmp eq i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %3, %0
%8 = tail call i32 @perror(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %3
ret i32 0
}
void poll_nothing(void) { return; }


x86 assembly (clang, -O0):
<poll_nothing>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<poll_nothing>:
ret

LLVM IR (-O0):
define void @poll_nothing() {
ret void
}

LLVM IR (-O2):
define void @poll_nothing() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cb(void const *);
void walk(const void *node, const int depth) { cb(node); }


x86 assembly (clang, -O0):
<walk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <cb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<walk>:
jmp    1030 <cb@plt>

LLVM IR (-O0):
define void @walk(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @cb(i8* %5)
ret void
}

LLVM IR (-O2):
define void @walk(i8* %0, i32 %1) {
%3 = tail call i32 @cb(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ rdwr(int);
write() { rdwr(02); }


x86 assembly (clang, -O0):
<write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x2,%edi
call   1030 <rdwr@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write>:
mov    $0x2,%edi
jmp    1030 <rdwr@plt>

LLVM IR (-O0):
define i32 @write() {
%1 = alloca i32
%2 = call i32 @rdwr(i32 2)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @write() {
%1 = tail call i32 @rdwr(i32 2)
ret i32 undef
}
double cuft_to_l(double cuft) { return cuft * 28.3168466; }


x86 assembly (clang, -O0):
<cuft_to_l>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<cuft_to_l>:
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @cuft_to_l(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 0x403C511CDBD8D94B
ret double %4
}

LLVM IR (-O2):
define double @cuft_to_l(double %0) {
%2 = fmul double %0, 0x403C511CDBD8D94B
ret double %2
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int begin_game(int);
int count_onece_bits(int);
int /*<<< orphan*/ printf(char *, int, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  uint32_t inputNumber;
  scanf("%u%*c", &inputNumber);
  uint32_t resultNumber;
  resultNumber = begin_game(inputNumber);
  int onceCount = count_onece_bits(resultNumber);
  printf("%u -> %d", resultNumber, onceCount);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeaa(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1060 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1050 <begin_game@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <count_onece_bits@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
lea    0xe84(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xeb4(%rip),%rdi
lea    0xc(%rsp),%rsi
call   1060 <scanf@plt>
mov    0xc(%rsp),%edi
call   1050 <begin_game@plt>
mov    %eax,%ebx
mov    %eax,%edi
call   1040 <count_onece_bits@plt>
lea    0xe97(%rip),%rdi
mov    %ebx,%esi
mov    %eax,%edx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%u%*c\00"
@.str.1 = [9 x i8] c"%u -> %d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %2)
%6 = load i32, i32* %2
%7 = call i32 @begin_game(i32 %6)
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = call i32 @count_onece_bits(i32 %8)
store i32 %9, i32* %4
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32 %10, i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%u%*c\00"
@.str.1 = [9 x i8] c"%u -> %d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @begin_game(i32 %4)
%6 = call i32 @count_onece_bits(i32 %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32 %5, i32 %6)
ret i32 0
}
double compute_y_intercept(double slope, double x_mid, double y_mid) {
  double y_intercept = 0.0;
  y_intercept = y_mid - (slope * x_mid);
  return y_intercept;
}


x86 assembly (clang, -O0):
<compute_y_intercept>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<compute_y_intercept>:
mulsd  %xmm1,%xmm0
subsd  %xmm0,%xmm2
movapd %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @compute_y_intercept(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
store double 0.000000e+00, double* %7
%8 = load double, double* %6
%9 = load double, double* %4
%10 = load double, double* %5
%11 = fneg double %9
%12 = call double @llvm.fmuladd.f64(double %11, double %10, double %8)
store double %12, double* %7
%13 = load double, double* %7
ret double %13
}

LLVM IR (-O2):
define double @compute_y_intercept(double %0, double %1, double %2) {
%4 = fneg double %0
%5 = tail call double @llvm.fmuladd.f64(double %4, double %1, double %2)
ret double %5
}
unsigned char stamp_type_to_radar(unsigned int t) {
  switch (t) {
  case 96:
    return 0xC5;
  case 112:
  case 144:
    return 0xC6;
  case 128:
    return 0xC7;
  case 257:
    return 0xff;
  }
}


x86 assembly (clang, -O0):
<stamp_type_to_radar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x60,%eax
je     1165 <stamp_type_to_radar+0x65>
jmp    111b <stamp_type_to_radar+0x1b>
mov    -0xc(%rbp),%eax
sub    $0x70,%eax
je     116e <stamp_type_to_radar+0x6e>
jmp    112c <stamp_type_to_radar+0x2c>
mov    -0xc(%rbp),%eax
sub    $0x80,%eax
je     1177 <stamp_type_to_radar+0x77>
jmp    113f <stamp_type_to_radar+0x3f>
mov    -0xc(%rbp),%eax
sub    $0x90,%eax
je     116e <stamp_type_to_radar+0x6e>
jmp    1152 <stamp_type_to_radar+0x52>
mov    -0xc(%rbp),%eax
sub    $0x101,%eax
je     1180 <stamp_type_to_radar+0x80>
jmp    1184 <stamp_type_to_radar+0x84>
movb   $0xc5,-0x1(%rbp)
jmp    1184 <stamp_type_to_radar+0x84>
movb   $0xc6,-0x1(%rbp)
jmp    1184 <stamp_type_to_radar+0x84>
movb   $0xc7,-0x1(%rbp)
jmp    1184 <stamp_type_to_radar+0x84>
movb   $0xff,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stamp_type_to_radar>:
mov    $0xc5,%al
cmp    $0x8f,%edi
jg     111a <stamp_type_to_radar+0x1a>
cmp    $0x70,%edi
je     112a <stamp_type_to_radar+0x2a>
cmp    $0x80,%edi
jne    112f <stamp_type_to_radar+0x2f>
mov    $0xc7,%al
ret
cmp    $0x101,%edi
je     112d <stamp_type_to_radar+0x2d>
cmp    $0x90,%edi
jne    112f <stamp_type_to_radar+0x2f>
mov    $0xc6,%al
ret
mov    $0xff,%al
ret

LLVM IR (-O0):
define zeroext i8 @stamp_type_to_radar(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 96, label %5
i32 112, label %6
i32 144, label %6
i32 128, label %7
i32 257, label %8
]
5: ; preds = %1
store i8 -59, i8* %2
br label %9
6: ; preds = %1, %1
store i8 -58, i8* %2
br label %9
7: ; preds = %1
store i8 -57, i8* %2
br label %9
8: ; preds = %1
store i8 -1, i8* %2
br label %9
9: ; preds = %5, %6, %7, %8, %1
%10 = load i8, i8* %2
ret i8 %10
}

LLVM IR (-O2):
define zeroext i8 @stamp_type_to_radar(i32 %0) {
switch i32 %0, label %5 [
i32 257, label %4
i32 112, label %2
i32 144, label %2
i32 128, label %3
]
2: ; preds = %1, %1
br label %5
3: ; preds = %1
br label %5
4: ; preds = %1
br label %5
5: ; preds = %2, %3, %4, %1
%6 = phi i8 [ -1, %4 ], [ -57, %3 ], [ -58, %2 ], [ -59, %1 ]
ret i8 %6
}
char __ocl_clamp_char_char(char src, char minval, char maxval) {
  if (src < minval) {
    return minval;
  }
  if (src > maxval) {
    return maxval;
  }
  return src;
}


x86 assembly (clang, -O0):
<__ocl_clamp_char_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %dil,%dl
mov    %dl,-0x2(%rbp)
mov    %cl,-0x3(%rbp)
mov    %al,-0x4(%rbp)
movsbl -0x2(%rbp),%eax
movsbl -0x3(%rbp),%ecx
cmp    %ecx,%eax
jge    1130 <__ocl_clamp_char_char+0x30>
mov    -0x3(%rbp),%al
mov    %al,-0x1(%rbp)
jmp    1151 <__ocl_clamp_char_char+0x51>
movsbl -0x2(%rbp),%eax
movsbl -0x4(%rbp),%ecx
cmp    %ecx,%eax
jle    114b <__ocl_clamp_char_char+0x4b>
mov    -0x4(%rbp),%al
mov    %al,-0x1(%rbp)
jmp    1151 <__ocl_clamp_char_char+0x51>
mov    -0x2(%rbp),%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ocl_clamp_char_char>:
cmp    %dl,%dil
mov    %edi,%eax
cmovg  %edx,%eax
cmp    %sil,%dil
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define signext i8 @__ocl_clamp_char_char(i8 signext %0, i8 signext %1, i8 signext %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
store i8 %0, i8* %5
store i8 %1, i8* %6
store i8 %2, i8* %7
%8 = load i8, i8* %5
%9 = sext i8 %8 to i32
%10 = load i8, i8* %6
%11 = sext i8 %10 to i32
%12 = icmp slt i32 %9, %11
br i1 %12, label %13, label %15
13: ; preds = %3
%14 = load i8, i8* %6
store i8 %14, i8* %4
br label %25
15: ; preds = %3
%16 = load i8, i8* %5
%17 = sext i8 %16 to i32
%18 = load i8, i8* %7
%19 = sext i8 %18 to i32
%20 = icmp sgt i32 %17, %19
br i1 %20, label %21, label %23
21: ; preds = %15
%22 = load i8, i8* %7
store i8 %22, i8* %4
br label %25
23: ; preds = %15
%24 = load i8, i8* %5
store i8 %24, i8* %4
br label %25
25: ; preds = %23, %21, %13
%26 = load i8, i8* %4
ret i8 %26
}

LLVM IR (-O2):
define signext i8 @__ocl_clamp_char_char(i8 signext %0, i8 signext %1, i8 signext %2) {
%4 = icmp slt i8 %0, %1
%5 = icmp sgt i8 %0, %2
%6 = select i1 %5, i8 %2, i8 %0
%7 = select i1 %4, i8 %1, i8 %6
ret i8 %7
}
unsigned int I(unsigned int X, unsigned int Y, unsigned int Z) {
  return Y ^ (X | ~Z);
}


x86 assembly (clang, -O0):
<I>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
or     %edx,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<I>:
mov    %edx,%eax
not    %eax
or     %edi,%eax
xor    %esi,%eax
ret

LLVM IR (-O0):
define i32 @I(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = load i32, i32* %6
%10 = xor i32 %9, -1
%11 = or i32 %8, %10
%12 = xor i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @I(i32 %0, i32 %1, i32 %2) {
%4 = xor i32 %2, -1
%5 = or i32 %4, %0
%6 = xor i32 %5, %1
ret i32 %6
}
int cs_is_nrc(x)
int x;
{
  if ((cs_size(x) == 94))
    return (1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<cs_is_nrc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
mov    $0x0,%al
call   1030 <cs_size@plt>
cmp    $0x5e,%eax
jne    113a <cs_is_nrc+0x2a>
movl   $0x1,-0x4(%rbp)
jmp    1141 <cs_is_nrc+0x31>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cs_is_nrc>:
push   %rax
xor    %eax,%eax
call   1030 <cs_size@plt>
xor    %ecx,%ecx
cmp    $0x5e,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @cs_is_nrc(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 (i32, ...) bitcast (i32 (...)* @cs_size to i32 (i32, ...)*)(i32 %4)
%6 = icmp eq i32 %5, 94
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @cs_is_nrc(i32 %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @cs_size to i32 (i32, ...)*)(i32 %0)
%3 = icmp eq i32 %2, 94
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("MBEDTLS_ENTROPY_C and/or "
         "MBEDTLS_SSL_TLS_C and/or MBEDTLS_SSL_SRV_C and/or "
         "MBEDTLS_NET_C and/or MBEDTLS_CTR_DRBG_C and/or not defined.\n");
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [136 x i8] c"MBEDTLS_ENTROPY_C and/or MBEDTLS_SSL_TLS_C and/or MBEDTLS_SSL_SRV_C and/or MBEDTLS_NET_C and/or MBEDTLS_CTR_DRBG_C and/or not defined.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([136 x i8], [136 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [135 x i8] c"MBEDTLS_ENTROPY_C and/or MBEDTLS_SSL_TLS_C and/or MBEDTLS_SSL_SRV_C and/or MBEDTLS_NET_C and/or MBEDTLS_CTR_DRBG_C and/or not defined.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([135 x i8], [135 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t av_bswap32(uint32_t x) {
  return ((((x) << 8 & 0xff00) | ((x) >> 8 & 0x00ff)) << 16 |
          ((((x) >> 16) << 8 & 0xff00) | (((x) >> 16) >> 8 & 0x00ff)));
}


x86 assembly (clang, -O0):
<av_bswap32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x8,%eax
and    $0xff00,%eax
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff,%ecx
or     %ecx,%eax
shl    $0x10,%eax
mov    -0x4(%rbp),%ecx
sar    $0x10,%ecx
shl    $0x8,%ecx
and    $0xff00,%ecx
mov    -0x4(%rbp),%edx
sar    $0x10,%edx
sar    $0x8,%edx
and    $0xff,%edx
or     %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_bswap32>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @av_bswap32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 8
%5 = and i32 %4, 65280
%6 = load i32, i32* %2
%7 = ashr i32 %6, 8
%8 = and i32 %7, 255
%9 = or i32 %5, %8
%10 = shl i32 %9, 16
%11 = load i32, i32* %2
%12 = ashr i32 %11, 16
%13 = shl i32 %12, 8
%14 = and i32 %13, 65280
%15 = load i32, i32* %2
%16 = ashr i32 %15, 16
%17 = ashr i32 %16, 8
%18 = and i32 %17, 255
%19 = or i32 %14, %18
%20 = or i32 %10, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @av_bswap32(i32 %0) {
%2 = tail call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ constdata(int);
void pblkw(void) { constdata(2); }


x86 assembly (clang, -O0):
<pblkw>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <constdata@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pblkw>:
mov    $0x2,%edi
jmp    1030 <constdata@plt>

LLVM IR (-O0):
define void @pblkw() {
%1 = call i32 @constdata(i32 2)
ret void
}

LLVM IR (-O2):
define void @pblkw() {
%1 = tail call i32 @constdata(i32 2)
ret void
}
/* Variables and functions */
int ts72xx_model();
int board_is_ts7200(void) { return ts72xx_model() == 0x00; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ts72xx_model@plt>
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
xor    %eax,%eax
call   1030 <ts72xx_model@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @board_is_ts7200() {
%1 = call i32 (...) @ts72xx_model()
%2 = icmp eq i32 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @board_is_ts7200() {
%1 = tail call i32 (...) @ts72xx_model()
%2 = icmp eq i32 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int my_count_strintab(char **tab) {
  int i;
  if (tab == NULL)
    return (-1);
  i = -1;
  while (tab[++i] != NULL)
    ;
  return (i);
}


x86 assembly (clang, -O0):
<my_count_strintab>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    111f <my_count_strintab+0x1f>
movl   $0xffffffff,-0x4(%rbp)
jmp    114c <my_count_strintab+0x4c>
movl   $0xffffffff,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
add    $0x1,%ecx
mov    %ecx,-0x14(%rbp)
movslq %ecx,%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     1146 <my_count_strintab+0x46>
jmp    1126 <my_count_strintab+0x26>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_count_strintab>:
mov    $0xffffffff,%eax
test   %rdi,%rdi
je     111d <my_count_strintab+0x1d>
nopw   0x0(%rax,%rax,1)
add    $0x1,%eax
cmpq   $0x0,(%rdi)
lea    0x8(%rdi),%rdi
jne    1110 <my_count_strintab+0x10>
ret

LLVM IR (-O0):
define i32 @my_count_strintab(i8** %0) {
%2 = alloca i32
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
%5 = load i8**, i8*** %3
%6 = icmp eq i8** %5, null
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 -1, i32* %2
br label %20
8: ; preds = %1
store i32 -1, i32* %4
br label %9
9: ; preds = %17, %8
%10 = load i8**, i8*** %3
%11 = load i32, i32* %4
%12 = add nsw i32 %11, 1
store i32 %12, i32* %4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8*, i8** %10, i64 %13
%15 = load i8*, i8** %14
%16 = icmp ne i8* %15, null
br i1 %16, label %17, label %18
17: ; preds = %9
br label %9
18: ; preds = %9
%19 = load i32, i32* %4
store i32 %19, i32* %2
br label %20
20: ; preds = %18, %7
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @my_count_strintab(i8** %0) {
%2 = icmp eq i8** %0, null
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %5, %3 ], [ -1, %1 ]
%5 = add nsw i64 %4, 1
%6 = getelementptr inbounds i8*, i8** %0, i64 %5
%7 = load i8*, i8** %6
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %3
9: ; preds = %3
%10 = trunc i64 %5 to i32
br label %11
11: ; preds = %9, %1
%12 = phi i32 [ -1, %1 ], [ %10, %9 ]
ret i32 %12
}
void wifi_evt_sme_ap_client_joined(
    const struct wifi_msg_sme_ap_client_joined_evt_t *msg) {}


x86 assembly (clang, -O0):
<wifi_evt_sme_ap_client_joined>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifi_evt_sme_ap_client_joined>:
ret

LLVM IR (-O0):
%struct.wifi_msg_sme_ap_client_joined_evt_t = type opaque
define void @wifi_evt_sme_ap_client_joined(%struct.wifi_msg_sme_ap_client_joined_evt_t* %0) {
%2 = alloca %struct.wifi_msg_sme_ap_client_joined_evt_t*
store %struct.wifi_msg_sme_ap_client_joined_evt_t* %0, %struct.wifi_msg_sme_ap_client_joined_evt_t** %2
ret void
}

LLVM IR (-O2):
%struct.wifi_msg_sme_ap_client_joined_evt_t = type opaque
define void @wifi_evt_sme_ap_client_joined(%struct.wifi_msg_sme_ap_client_joined_evt_t* nocapture %0) {
ret void
}