xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
extern float shmem_float_swap(float *target, float value, int pe) {
  printf("\nOpenSHMEM Analyzer\n");
}


x86 assembly (clang, -O0):
<shmem_float_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
mov    %esi,-0x18(%rbp)
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
movss  -0x4(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmem_float_swap>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"\0AOpenSHMEM Analyzer\0A\00"
define float @shmem_float_swap(float* %0, float %1, i32 %2) {
%4 = alloca float
%5 = alloca float*
%6 = alloca float
%7 = alloca i32
store float* %0, float** %5
store float %1, float* %6
store i32 %2, i32* %7
%8 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%9 = load float, float* %4
ret float %9
}

LLVM IR (-O2):
@str = [20 x i8] c"\0AOpenSHMEM Analyzer\00"
define float @shmem_float_swap(float* nocapture readnone %0, float %1, i32 %2) {
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret float undef
}
/* Variables and functions */
int /*<<< orphan*/ feenable_test(char const *, int);
int /*<<< orphan*/ feenv_mask_test(char const *, int);
int /*<<< orphan*/ feenv_nomask_test(char const *, int);
void fe_single_test(const char *flag_name, int fe_exc) {
  feenv_nomask_test(flag_name, fe_exc);
  feenv_mask_test(flag_name, fe_exc);
  feenable_test(flag_name, fe_exc);
}


x86 assembly (clang, -O0):
<fe_single_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1050 <feenv_nomask_test@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <feenv_mask_test@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <feenable_test@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fe_single_test>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1050 <feenv_nomask_test@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
call   1040 <feenv_mask_test@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <feenable_test@plt>

LLVM IR (-O0):
define void @fe_single_test(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @feenv_nomask_test(i8* %5, i32 %6)
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = call i32 @feenv_mask_test(i8* %8, i32 %9)
%11 = load i8*, i8** %3
%12 = load i32, i32* %4
%13 = call i32 @feenable_test(i8* %11, i32 %12)
ret void
}

LLVM IR (-O2):
define void @fe_single_test(i8* %0, i32 %1) {
%3 = tail call i32 @feenv_nomask_test(i8* %0, i32 %1)
%4 = tail call i32 @feenv_mask_test(i8* %0, i32 %1)
%5 = tail call i32 @feenable_test(i8* %0, i32 %1)
ret void
}
/* Variables and functions */
scalar_t__ inc_addr(void *, int);
int shim_getcpu(unsigned int *, unsigned int *, void *);
int bad_getcpu(void *addr) {
  return shim_getcpu((unsigned *)addr, (unsigned *)inc_addr(addr, 2),
                     (void *)inc_addr(addr, 2));
}


x86 assembly (clang, -O0):
<bad_getcpu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2,%esi
call   1030 <inc_addr@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2,%esi
call   1030 <inc_addr@plt>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    %rax,%rdx
call   1040 <shim_getcpu@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bad_getcpu>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    $0x2,%esi
call   1030 <inc_addr@plt>
mov    %rax,%r14
mov    %rbx,%rdi
mov    $0x2,%esi
call   1030 <inc_addr@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %rax,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <shim_getcpu@plt>

LLVM IR (-O0):
define i32 @bad_getcpu(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i8*, i8** %2
%6 = call i64 @inc_addr(i8* %5, i32 2)
%7 = inttoptr i64 %6 to i32*
%8 = load i8*, i8** %2
%9 = call i64 @inc_addr(i8* %8, i32 2)
%10 = inttoptr i64 %9 to i8*
%11 = call i32 @shim_getcpu(i32* %4, i32* %7, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @bad_getcpu(i8* %0) {
%2 = bitcast i8* %0 to i32*
%3 = tail call i64 @inc_addr(i8* %0, i32 2)
%4 = inttoptr i64 %3 to i32*
%5 = tail call i64 @inc_addr(i8* %0, i32 2)
%6 = inttoptr i64 %5 to i8*
%7 = tail call i32 @shim_getcpu(i32* %2, i32* %4, i8* %6)
ret i32 %7
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ LCDClockReset(int, int);
void LCDRasterEnable(uint32_t ui32Base) {
  ;
  LCDClockReset(ui32Base, 0x00000008);
  (*((volatile uint32_t *)(ui32Base + 0x00000028))) |= 0x00000001;
}


x86 assembly (clang, -O0):
<LCDRasterEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x8,%esi
call   1030 <LCDClockReset@plt>
mov    -0x4(%rbp),%eax
add    $0x28,%eax
cltq
mov    (%rax),%ecx
or     $0x1,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCDRasterEnable>:
push   %rbx
mov    %edi,%ebx
mov    $0x8,%esi
call   1030 <LCDClockReset@plt>
movslq %ebx,%rax
orl    $0x1,0x28(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @LCDRasterEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @LCDClockReset(i32 %3, i32 8)
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 40
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = or i32 %9, 1
store volatile i32 %10, i32* %8
ret void
}

LLVM IR (-O2):
define void @LCDRasterEnable(i32 %0) {
%2 = tail call i32 @LCDClockReset(i32 %0, i32 8)
%3 = add nsw i32 %0, 40
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = or i32 %6, 1
store volatile i32 %7, i32* %5
ret void
}
void _ResetToken() {}


x86 assembly (clang, -O0):
<_ResetToken>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ResetToken>:
ret

LLVM IR (-O0):
define void @_ResetToken() {
ret void
}

LLVM IR (-O2):
define void @_ResetToken() {
ret void
}
/* Variables and functions */
float uf10_to_f32(unsigned int);
float uf11_to_f32(unsigned int);
void r11g11b10f_to_float3(unsigned rgb, float retval[3]) {
  retval[0] = uf11_to_f32(rgb & 0x7ff);
  retval[1] = uf11_to_f32((rgb >> 11) & 0x7ff);
  retval[2] = uf10_to_f32((rgb >> 22) & 0x3ff);
}


x86 assembly (clang, -O0):
<r11g11b10f_to_float3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
and    $0x7ff,%edi
call   1030 <uf11_to_f32@plt>
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x4(%rbp),%edi
shr    $0xb,%edi
and    $0x7ff,%edi
call   1030 <uf11_to_f32@plt>
mov    -0x10(%rbp),%rax
movss  %xmm0,0x4(%rax)
mov    -0x4(%rbp),%edi
shr    $0x16,%edi
and    $0x3ff,%edi
call   1040 <uf10_to_f32@plt>
mov    -0x10(%rbp),%rax
movss  %xmm0,0x8(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<r11g11b10f_to_float3>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
and    $0x7ff,%edi
call   1030 <uf11_to_f32@plt>
movss  %xmm0,(%rbx)
mov    %ebp,%edi
shr    $0xb,%edi
and    $0x7ff,%edi
call   1030 <uf11_to_f32@plt>
movss  %xmm0,0x4(%rbx)
shr    $0x16,%ebp
mov    %ebp,%edi
call   1040 <uf10_to_f32@plt>
movss  %xmm0,0x8(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @r11g11b10f_to_float3(i32 %0, float* %1) {
%3 = alloca i32
%4 = alloca float*
store i32 %0, i32* %3
store float* %1, float** %4
%5 = load i32, i32* %3
%6 = and i32 %5, 2047
%7 = call float @uf11_to_f32(i32 %6)
%8 = load float*, float** %4
%9 = getelementptr inbounds float, float* %8, i64 0
store float %7, float* %9
%10 = load i32, i32* %3
%11 = lshr i32 %10, 11
%12 = and i32 %11, 2047
%13 = call float @uf11_to_f32(i32 %12)
%14 = load float*, float** %4
%15 = getelementptr inbounds float, float* %14, i64 1
store float %13, float* %15
%16 = load i32, i32* %3
%17 = lshr i32 %16, 22
%18 = and i32 %17, 1023
%19 = call float @uf10_to_f32(i32 %18)
%20 = load float*, float** %4
%21 = getelementptr inbounds float, float* %20, i64 2
store float %19, float* %21
ret void
}

LLVM IR (-O2):
define void @r11g11b10f_to_float3(i32 %0, float* nocapture writeonly %1) {
%3 = and i32 %0, 2047
%4 = tail call float @uf11_to_f32(i32 %3)
store float %4, float* %1
%5 = lshr i32 %0, 11
%6 = and i32 %5, 2047
%7 = tail call float @uf11_to_f32(i32 %6)
%8 = getelementptr inbounds float, float* %1, i64 1
store float %7, float* %8
%9 = lshr i32 %0, 22
%10 = tail call float @uf10_to_f32(i32 %9)
%11 = getelementptr inbounds float, float* %1, i64 2
store float %10, float* %11
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write(char *, char *, int /*<<< orphan*/ *);
void pre_user() { write("msproject.xml", "<Resource>\n", NULL); }


x86 assembly (clang, -O0):
<pre_user>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xeec(%rip),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pre_user>:
lea    0xee9(%rip),%rdi
lea    0xef0(%rip),%rsi
xor    %edx,%edx
jmp    1030 <write@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"msproject.xml\00"
@.str.1 = [12 x i8] c"<Resource>\0A\00"
define void @pre_user() {
%1 = call i32 @write(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32* null)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"msproject.xml\00"
@.str.1 = [12 x i8] c"<Resource>\0A\00"
define void @pre_user() {
%1 = tail call i32 @write(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ insort(double *, int);
int /*<<< orphan*/ partial_quickersort(double *, int /*<<< orphan*/, int);
void sedgesort(double *a, int len) {
  partial_quickersort(a, 0, len - 1);
  insort(a, len);
}


x86 assembly (clang, -O0):
<sedgesort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
sub    $0x1,%edx
xor    %esi,%esi
call   1040 <partial_quickersort@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <insort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sedgesort>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%r14d
mov    %rdi,%rbx
lea    -0x1(%r14),%edx
xor    %esi,%esi
call   1040 <partial_quickersort@plt>
mov    %rbx,%rdi
mov    %r14d,%esi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <insort@plt>

LLVM IR (-O0):
define void @sedgesort(double* %0, i32 %1) {
%3 = alloca double*
%4 = alloca i32
store double* %0, double** %3
store i32 %1, i32* %4
%5 = load double*, double** %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = call i32 @partial_quickersort(double* %5, i32 0, i32 %7)
%9 = load double*, double** %3
%10 = load i32, i32* %4
%11 = call i32 @insort(double* %9, i32 %10)
ret void
}

LLVM IR (-O2):
define void @sedgesort(double* %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = tail call i32 @partial_quickersort(double* %0, i32 0, i32 %3)
%5 = tail call i32 @insort(double* %0, i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __u32;

/* Variables and functions */
int ceph_frag_bits(int /*<<< orphan*/);
int /*<<< orphan*/ ceph_frag_make(int, scalar_t__);
scalar_t__ ceph_frag_value(int /*<<< orphan*/);
__u32 ceph_frag_next(__u32 f) {
  return ceph_frag_make(ceph_frag_bits(f),
                        ceph_frag_value(f) + (0x1000000 >> ceph_frag_bits(f)));
}


x86 assembly (clang, -O0):
<ceph_frag_next>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ceph_frag_bits@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <ceph_frag_value@plt>
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ceph_frag_bits@plt>
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%edi
mov    %eax,%ecx
mov    $0x1000000,%eax
sar    %cl,%eax
cltq
add    %rax,%rsi
call   1040 <ceph_frag_make@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceph_frag_next>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%ebx
call   1030 <ceph_frag_bits@plt>
mov    %eax,%r14d
mov    %ebx,%edi
call   1050 <ceph_frag_value@plt>
mov    %rax,%rbp
mov    %ebx,%edi
call   1030 <ceph_frag_bits@plt>
mov    $0x1000000,%esi
mov    %eax,%ecx
shr    %cl,%esi
add    %rbp,%rsi
mov    %r14d,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <ceph_frag_make@plt>

LLVM IR (-O0):
define i32 @ceph_frag_next(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ceph_frag_bits(i32 %3)
%5 = load i32, i32* %2
%6 = call i64 @ceph_frag_value(i32 %5)
%7 = load i32, i32* %2
%8 = call i32 @ceph_frag_bits(i32 %7)
%9 = ashr i32 16777216, %8
%10 = sext i32 %9 to i64
%11 = add nsw i64 %6, %10
%12 = call i32 @ceph_frag_make(i32 %4, i64 %11)
ret i32 %12
}

LLVM IR (-O2):
define i32 @ceph_frag_next(i32 %0) {
%2 = tail call i32 @ceph_frag_bits(i32 %0)
%3 = tail call i64 @ceph_frag_value(i32 %0)
%4 = tail call i32 @ceph_frag_bits(i32 %0)
%5 = lshr i32 16777216, %4
%6 = zext i32 %5 to i64
%7 = add nsw i64 %3, %6
%8 = tail call i32 @ceph_frag_make(i32 %2, i64 %7)
ret i32 %8
}
void foo739(int p) {}


x86 assembly (clang, -O0):
<foo739>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo739>:
ret

LLVM IR (-O0):
define void @foo739(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo739(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char const *);
scalar_t__ strncmp(char const *, char const *, int /*<<< orphan*/);
int strstarts(const char *str, const char *prefix) {
  return strncmp(str, prefix, strlen(prefix)) == 0;
}


x86 assembly (clang, -O0):
<strstarts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strstarts>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <strncmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @strstarts(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i64 @strncmp(i8* %5, i8* %6, i32 %8)
%10 = icmp eq i64 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @strstarts(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i64 @strncmp(i8* %0, i8* %1, i32 %3)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ test(int);
int main() {
  if (test(2) != 0)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x2,%edi
call   1040 <test@plt>
cmp    $0x0,%rax
je     114a <main+0x2a>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2,%edi
call   1040 <test@plt>
test   %rax,%rax
jne    1134 <main+0x14>
xor    %eax,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 @test(i32 2)
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @abort()
unreachable
6: ; preds = %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @test(i32 2)
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
ret i32 0
}
float to_radians(float degrees) { return degrees * 3.1415926536f / 180.0f; }


x86 assembly (clang, -O0):
<to_radians>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xef3(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  0xee2(%rip),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<to_radians>:
mulss  0xef8(%rip),%xmm0
divss  0xef4(%rip),%xmm0
ret

LLVM IR (-O0):
define float @to_radians(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float %3, 0x400921FB60000000
%5 = fdiv float %4, 1.800000e+02
ret float %5
}

LLVM IR (-O2):
define float @to_radians(float %0) {
%2 = fmul float %0, 0x400921FB60000000
%3 = fdiv float %2, 1.800000e+02
ret float %3
}
R0RX1(r0, r1, x0, x1, p0, p1) double r0, r1;
double *p0, *p1;
{
  if (r0 <= (p1[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<R0RX1>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
mov    %edi,-0x1c(%rbp)
mov    %esi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
movsd  -0x10(%rbp),%xmm1
mov    -0x30(%rbp),%rax
movslq -0x20(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
ucomisd %xmm1,%xmm0
jb     1144 <R0RX1+0x44>
movl   $0x1,-0x4(%rbp)
jmp    114b <R0RX1+0x4b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<R0RX1>:
movslq %esi,%rax
movsd  (%rcx,%rax,8),%xmm1
xor    %eax,%eax
ucomisd %xmm0,%xmm1
setae  %al
ret

LLVM IR (-O0):
define i32 @R0RX1(double %0, double %1, i32 %2, i32 %3, double* %4, double* %5) {
%7 = alloca i32
%8 = alloca double
%9 = alloca double
%10 = alloca i32
%11 = alloca i32
%12 = alloca double*
%13 = alloca double*
store double %0, double* %8
store double %1, double* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store double* %4, double** %12
store double* %5, double** %13
%14 = load double, double* %8
%15 = load double*, double** %13
%16 = load i32, i32* %11
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds double, double* %15, i64 %17
%19 = load double, double* %18
%20 = fcmp ole double %14, %19
br i1 %20, label %21, label %22
21: ; preds = %6
store i32 1, i32* %7
br label %23
22: ; preds = %6
store i32 0, i32* %7
br label %23
23: ; preds = %22, %21
%24 = load i32, i32* %7
ret i32 %24
}

LLVM IR (-O2):
define i32 @R0RX1(double %0, double %1, i32 %2, i32 %3, double* nocapture readnone %4, double* nocapture %5) {
%7 = sext i32 %3 to i64
%8 = getelementptr inbounds double, double* %5, i64 %7
%9 = load double, double* %8
%10 = fcmp oge double %9, %0
%11 = zext i1 %10 to i32
ret i32 %11
}
/* Type definitions */
typedef scalar_t__ int16_t;

/* Variables and functions */
int16_t bmin_int16(int16_t a, int16_t b) { return (a < b ? a : b); }


x86 assembly (clang, -O0):
<bmin_int16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1127 <bmin_int16+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <bmin_int16+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bmin_int16>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovl  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @bmin_int16(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @bmin_int16(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
int ti_var_start(double const *options) { return (int)options[0] - 1; }


x86 assembly (clang, -O0):
<ti_var_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cvttsd2si (%rax),%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ti_var_start>:
cvttsd2si (%rdi),%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @ti_var_start(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = fptosi double %5 to i32
%7 = sub nsw i32 %6, 1
ret i32 %7
}

LLVM IR (-O2):
define i32 @ti_var_start(double* nocapture %0) {
%2 = load double, double* %0
%3 = fptosi double %2 to i32
%4 = add nsw i32 %3, -1
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ volatile uint32_t;

/* Variables and functions */
void PWMIntEnable(uint32_t ui32Base, uint32_t ui32GenFault) {
  ;

  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000014))) |= ui32GenFault;
}


x86 assembly (clang, -O0):
<PWMIntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x14(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMIntEnable>:
mov    %rdi,-0x8(%rsp)
mov    %rsi,-0x10(%rsp)
mov    -0x10(%rsp),%rax
mov    -0x8(%rsp),%rcx
or     %rax,0x14(%rcx)
ret

LLVM IR (-O0):
define void @PWMIntEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = load volatile i64, i64* %3
%7 = add nsw i64 %6, 20
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = or i64 %9, %5
store volatile i64 %10, i64* %8
ret void
}

LLVM IR (-O2):
define void @PWMIntEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = load volatile i64, i64* %3
%7 = add nsw i64 %6, 20
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = or i64 %9, %5
store volatile i64 %10, i64* %8
ret void
}
int path_029_expected_2(int y) {
  int x;
  while (++x < y)
    ;
  return x;
}


x86 assembly (clang, -O0):
<path_029_expected_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmp    -0x4(%rbp),%eax
jge    111e <path_029_expected_2+0x1e>
jmp    1107 <path_029_expected_2+0x7>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<path_029_expected_2>:
mov    $0x7fffffff,%eax
ret

LLVM IR (-O0):
define i32 @path_029_expected_2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
br label %4
4: ; preds = %9, %1
%5 = load i32, i32* %3
%6 = add nsw i32 %5, 1
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %10
9: ; preds = %4
br label %4
10: ; preds = %4
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @path_029_expected_2(i32 %0) {
ret i32 2147483647
}
void error(s1, s2) char *s1, *s2;
{
  string_print(((char *)0), "%s %s\n", s1, s2 ? s2 : "");
  print(((char *)0));
  exit(1);
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1160 <error+0x30>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
jmp    1170 <error+0x40>
lea    0xe9f(%rip),%rax
mov    %rax,-0x20(%rbp)
jmp    1170 <error+0x40>
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
xor    %eax,%eax
mov    %eax,%edi
lea    0xe7d(%rip),%rsi
mov    $0x0,%al
call   1040 <string_print@plt>
xor    %eax,%eax
mov    %eax,%edi
mov    $0x0,%al
call   1030 <print@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<error>:
push   %rax
mov    %rdi,%rdx
test   %rsi,%rsi
lea    0xec8(%rip),%rcx
cmovne %rsi,%rcx
lea    0xeb7(%rip),%rsi
xor    %edi,%edi
xor    %eax,%eax
call   1040 <string_print@plt>
xor    %edi,%edi
xor    %eax,%eax
call   1030 <print@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"%s %s\0A\00"
@.str.1 = [1 x i8] zeroinitializer
define void @error(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i8*, i8** %4
br label %11
10: ; preds = %2
br label %11
11: ; preds = %10, %8
%12 = phi i8* [ %9, %8 ], [ getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), %10 ]
%13 = call i32 (i8*, i8*, i8*, i8*, ...) bitcast (i32 (...)* @string_print to i32 (i8*, i8*, i8*, i8*, ...)*)(i8* null, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %5, i8* %12)
%14 = call i32 (i8*, ...) bitcast (i32 (...)* @print to i32 (i8*, ...)*)(i8* null)
unreachable
}

LLVM IR (-O2):
@.str = [7 x i8] c"%s %s\0A\00"
@.str.1 = [1 x i8] zeroinitializer
define void @error(i8* %0, i8* %1) {
%3 = icmp eq i8* %1, null
%4 = select i1 %3, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), i8* %1
%5 = tail call i32 (i8*, i8*, i8*, i8*, ...) bitcast (i32 (...)* @string_print to i32 (i8*, i8*, i8*, i8*, ...)*)(i8* null, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %4)
%6 = tail call i32 (i8*, ...) bitcast (i32 (...)* @print to i32 (i8*, ...)*)(i8* null)
tail call void @exit(i32 1)
unreachable
}
/* Variables and functions */
char *readextpar(char *, char *, char *, int);
char *readpar(char *stem, char *par, int len) {
  return readextpar(stem, ".par", par, len);
}


x86 assembly (clang, -O0):
<readpar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
lea    0xecb(%rip),%rsi
call   1030 <readextpar@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readpar>:
mov    %edx,%ecx
mov    %rsi,%rdx
lea    0xee4(%rip),%rsi
jmp    1030 <readextpar@plt>

LLVM IR (-O0):
@.str = [5 x i8] c".par\00"
define i8* @readpar(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i8* @readextpar(i8* %7, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %8, i32 %9)
ret i8* %10
}

LLVM IR (-O2):
@.str = [5 x i8] c".par\00"
define i8* @readpar(i8* %0, i8* %1, i32 %2) {
%4 = tail call i8* @readextpar(i8* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %1, i32 %2)
ret i8* %4
}
void foo406(int p) {}


x86 assembly (clang, -O0):
<foo406>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo406>:
ret

LLVM IR (-O0):
define void @foo406(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo406(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ error(char *);
void *malloc(size_t);
void *Malloc(size_t size) {
  void *p = malloc(size);
  if (!p)
    error("out of memory");
  return (p);
}


x86 assembly (clang, -O0):
<Malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <Malloc+0x30>
lea    0xeb5(%rip),%rdi
call   1040 <error@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Malloc>:
push   %rbx
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <Malloc+0x1a>
lea    0xecb(%rip),%rdi
call   1040 <error@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"out of memory\00"
define i8* @Malloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = call i32 @error(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [14 x i8] c"out of memory\00"
define noalias i8* @Malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @error(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char *argv[]) {
  printf("%s: sorry, fuse support was not built in\n", argv[0]);
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    (%rsi),%rsi
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [42 x i8] c"%s: sorry, fuse support was not built in\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %5
%7 = getelementptr inbounds i8*, i8** %6, i64 0
%8 = load i8*, i8** %7
%9 = call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0), i8* %8)
ret i32 1
}

LLVM IR (-O2):
@.str = [42 x i8] c"%s: sorry, fuse support was not built in\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = load i8*, i8** %1
%4 = tail call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 1
}
/* Variables and functions */
int exact_square(int);
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int b;
  int n;
  printf("Enter a number:\n");
  scanf("%d", &n);
  b = exact_square(n);
  printf("%d\n", b);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xec4(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1040 <exact_square@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xea9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xebf(%rip),%rdi
call   1030 <puts@plt>
lea    0xeac(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1060 <scanf@plt>
mov    0x4(%rsp),%edi
call   1050 <exact_square@plt>
lea    0xe95(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Enter a number:\0A\00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = call i32 @exact_square(i32 %5)
store i32 %6, i32* %1
%7 = load i32, i32* %1
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [4 x i8] c"%d\0A\00"
@str = [16 x i8] c"Enter a number:\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @exact_square(i32 %5)
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %6)
ret i32 0
}
/* Variables and functions */
int round(int);
int knots2mps(int knots) {
  if (knots < 0)
    return knots;
  return round(knots * 463 / 900.0);
}


x86 assembly (clang, -O0):
<knots2mps>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1130 <knots2mps+0x20>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1153 <knots2mps+0x43>
imul   $0x1cf,-0x8(%rbp),%eax
cvtsi2sd %eax,%xmm0
movsd  0xebd(%rip),%xmm1
divsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <round@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<knots2mps>:
test   %edi,%edi
js     112f <knots2mps+0x1f>
imul   $0x1cf,%edi,%eax
cvtsi2sd %eax,%xmm0
divsd  0xeda(%rip),%xmm0
cvttsd2si %xmm0,%edi
jmp    1030 <round@plt>
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @knots2mps(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %15
8: ; preds = %1
%9 = load i32, i32* %3
%10 = mul nsw i32 %9, 463
%11 = sitofp i32 %10 to double
%12 = fdiv double %11, 9.000000e+02
%13 = fptosi double %12 to i32
%14 = call i32 @round(i32 %13)
store i32 %14, i32* %2
br label %15
15: ; preds = %8, %6
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @knots2mps(i32 %0) {
%2 = icmp slt i32 %0, 0
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = mul nsw i32 %0, 463
%5 = sitofp i32 %4 to double
%6 = fdiv double %5, 9.000000e+02
%7 = fptosi double %6 to i32
%8 = tail call i32 @round(i32 %7)
br label %9
9: ; preds = %1, %3
%10 = phi i32 [ %8, %3 ], [ %0, %1 ]
ret i32 %10
}
/* Variables and functions */
int __dns_decodename(unsigned char const *, int, unsigned char *, int,
                     unsigned char const *);
int diet_dn_expand(const unsigned char *msg, const unsigned char *eomorig,
                   const unsigned char *comp_dn, unsigned char *exp_dn,
                   int length) {
  return __dns_decodename(msg, comp_dn - msg, exp_dn, length, eomorig) -
         (comp_dn - msg);
}


x86 assembly (clang, -O0):
<diet_dn_expand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
mov    %eax,%esi
mov    -0x20(%rbp),%rdx
mov    -0x24(%rbp),%ecx
mov    -0x10(%rbp),%r8
call   1030 <__dns_decodename@plt>
cltq
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rdx
sub    %rdx,%rcx
sub    %rcx,%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<diet_dn_expand>:
push   %rbx
mov    %rdx,%rbx
mov    %rsi,%rax
sub    %edi,%ebx
mov    %ebx,%esi
mov    %rcx,%rdx
mov    %r8d,%ecx
mov    %rax,%r8
call   1030 <__dns_decodename@plt>
sub    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @diet_dn_expand(i8* %0, i8* %1, i8* %2, i8* %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%11 = load i8*, i8** %6
%12 = load i8*, i8** %8
%13 = load i8*, i8** %6
%14 = ptrtoint i8* %12 to i64
%15 = ptrtoint i8* %13 to i64
%16 = sub i64 %14, %15
%17 = trunc i64 %16 to i32
%18 = load i8*, i8** %9
%19 = load i32, i32* %10
%20 = load i8*, i8** %7
%21 = call i32 @__dns_decodename(i8* %11, i32 %17, i8* %18, i32 %19, i8* %20)
%22 = sext i32 %21 to i64
%23 = load i8*, i8** %8
%24 = load i8*, i8** %6
%25 = ptrtoint i8* %23 to i64
%26 = ptrtoint i8* %24 to i64
%27 = sub i64 %25, %26
%28 = sub nsw i64 %22, %27
%29 = trunc i64 %28 to i32
ret i32 %29
}

LLVM IR (-O2):
define i32 @diet_dn_expand(i8* %0, i8* %1, i8* %2, i8* %3, i32 %4) {
%6 = ptrtoint i8* %2 to i64
%7 = ptrtoint i8* %0 to i64
%8 = sub i64 %6, %7
%9 = trunc i64 %8 to i32
%10 = tail call i32 @__dns_decodename(i8* %0, i32 %9, i8* %3, i32 %4, i8* %1)
%11 = sub i32 %10, %9
ret i32 %11
}
void kol_wnd_move(unsigned x, unsigned y) {
  asm("nop" ::"a"(67), "b"(x), "c"(y));
  asm("movl $-1, %edx \n movl $-1, %esi \n int $0x40");
}


x86 assembly (clang, -O0):
<kol_wnd_move>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    -0xc(%rbp),%ebx
mov    -0x10(%rbp),%ecx
mov    $0x43,%eax
nop
mov    $0xffffffff,%edx
mov    $0xffffffff,%esi
int    $0x40
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<kol_wnd_move>:
push   %rbx
mov    %esi,%ecx
mov    %edi,%ebx
mov    $0x43,%eax
nop
mov    $0xffffffff,%edx
mov    $0xffffffff,%esi
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define void @kol_wnd_move(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
define void @kol_wnd_move(i32 %0, i32 %1) {
tail call void asm sideeffect "nop", "{ax},{bx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 67, i32 %0, i32 %1)
tail call void asm sideeffect "movl $$-1, %edx \0A movl $$-1, %esi \0A int $$0x40", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
void srl_int32_to_bytes(int32_t i, char *buf) {
  buf[0] = (i >> 24) & 0xFF;
  buf[1] = (i >> 16) & 0xFF;
  buf[2] = (i >> 8) & 0xFF;
  buf[3] = i & 0xFF;
}


x86 assembly (clang, -O0):
<srl_int32_to_bytes>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x18,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<srl_int32_to_bytes>:
bswap  %edi
mov    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @srl_int32_to_bytes(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = ashr i32 %5, 24
%7 = and i32 %6, 255
%8 = trunc i32 %7 to i8
%9 = load i8*, i8** %4
%10 = getelementptr inbounds i8, i8* %9, i64 0
store i8 %8, i8* %10
%11 = load i32, i32* %3
%12 = ashr i32 %11, 16
%13 = and i32 %12, 255
%14 = trunc i32 %13 to i8
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i64 1
store i8 %14, i8* %16
%17 = load i32, i32* %3
%18 = ashr i32 %17, 8
%19 = and i32 %18, 255
%20 = trunc i32 %19 to i8
%21 = load i8*, i8** %4
%22 = getelementptr inbounds i8, i8* %21, i64 2
store i8 %20, i8* %22
%23 = load i32, i32* %3
%24 = and i32 %23, 255
%25 = trunc i32 %24 to i8
%26 = load i8*, i8** %4
%27 = getelementptr inbounds i8, i8* %26, i64 3
store i8 %25, i8* %27
ret void
}

LLVM IR (-O2):
define void @srl_int32_to_bytes(i32 %0, i8* nocapture writeonly %1) {
%3 = lshr i32 %0, 24
%4 = trunc i32 %3 to i8
store i8 %4, i8* %1
%5 = lshr i32 %0, 16
%6 = trunc i32 %5 to i8
%7 = getelementptr inbounds i8, i8* %1, i64 1
store i8 %6, i8* %7
%8 = lshr i32 %0, 8
%9 = trunc i32 %8 to i8
%10 = getelementptr inbounds i8, i8* %1, i64 2
store i8 %9, i8* %10
%11 = trunc i32 %0 to i8
%12 = getelementptr inbounds i8, i8* %1, i64 3
store i8 %11, i8* %12
ret void
}
int simcons_register(void) { return 1; }


x86 assembly (clang, -O0):
<simcons_register>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<simcons_register>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @simcons_register() {
ret i32 1
}

LLVM IR (-O2):
define i32 @simcons_register() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, int);
int main() {
  (printf("%s = [%d]\n", "4 + 5", (4 + 5)));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
lea    0xede(%rip),%rsi
mov    $0x9,%edx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xeec(%rip),%rsi
mov    $0x9,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"%s = [%d]\0A\00"
@.str.1 = [6 x i8] c"4 + 5\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 9)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"%s = [%d]\0A\00"
@.str.1 = [6 x i8] c"4 + 5\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 9)
ret i32 0
}
/* Variables and functions */
char *malloc(int);
int sprintf(char *, char const *, float, float, unsigned int);
char *msg_app_flt3(const char *msg1, float n1, float n2, unsigned n3) {
  char *p = malloc(200);
  int b = sprintf(p, msg1, n1, n2, n3);
  return p;
}


x86 assembly (clang, -O0):
<msg_app_flt3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  %xmm1,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    $0xc8,%edi
call   1030 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%rsi
movss  -0xc(%rbp),%xmm0
movss  -0x10(%rbp),%xmm1
mov    -0x14(%rbp),%edx
call   1040 <sprintf@plt>
mov    %eax,-0x24(%rbp)
mov    -0x20(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msg_app_flt3>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %esi,%r14d
movss  %xmm1,0xc(%rsp)
movss  %xmm0,0x8(%rsp)
mov    %rdi,%rbx
mov    $0xc8,%edi
call   1030 <malloc@plt>
mov    %rax,%rbp
mov    %rax,%rdi
mov    %rbx,%rsi
movss  0x8(%rsp),%xmm0
movss  0xc(%rsp),%xmm1
mov    %r14d,%edx
call   1040 <sprintf@plt>
mov    %rbp,%rax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @msg_app_flt3(i8* %0, float %1, float %2, i32 %3) {
%5 = alloca i8*
%6 = alloca float
%7 = alloca float
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i32
store i8* %0, i8** %5
store float %1, float* %6
store float %2, float* %7
store i32 %3, i32* %8
%11 = call i8* @malloc(i32 200)
store i8* %11, i8** %9
%12 = load i8*, i8** %9
%13 = load i8*, i8** %5
%14 = load float, float* %6
%15 = load float, float* %7
%16 = load i32, i32* %8
%17 = call i32 @sprintf(i8* %12, i8* %13, float %14, float %15, i32 %16)
store i32 %17, i32* %10
%18 = load i8*, i8** %9
ret i8* %18
}

LLVM IR (-O2):
define noalias i8* @msg_app_flt3(i8* nocapture %0, float %1, float %2, i32 %3) {
%5 = tail call dereferenceable_or_null(200) i8* @malloc(i32 200)
%6 = tail call i32 @sprintf(i8* dereferenceable(1) %5, i8* dereferenceable(1) %0, float %1, float %2, i32 %3)
ret i8* %5
}
void foo68() {}


x86 assembly (clang, -O0):
<foo68>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo68>:
ret

LLVM IR (-O0):
define void @foo68() {
ret void
}

LLVM IR (-O2):
define void @foo68() {
ret void
}
/* Variables and functions */
int clear_lsb(int, int);
int test_clear_lsb() { return 0b111000 == clear_lsb(0b111111, 3); }


x86 assembly (clang, -O0):
<test_clear_lsb>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3f,%edi
mov    $0x3,%esi
call   1030 <clear_lsb@plt>
mov    %eax,%ecx
mov    $0x38,%eax
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_clear_lsb>:
push   %rax
mov    $0x3f,%edi
mov    $0x3,%esi
call   1030 <clear_lsb@plt>
xor    %ecx,%ecx
cmp    $0x38,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @test_clear_lsb() {
%1 = call i32 @clear_lsb(i32 63, i32 3)
%2 = icmp eq i32 56, %1
%3 = zext i1 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @test_clear_lsb() {
%1 = tail call i32 @clear_lsb(i32 63, i32 3)
%2 = icmp eq i32 %1, 56
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int close(int);
int /*<<< orphan*/ perror(char *);
int close_socket(int socket_id) {
  if (close(socket_id) == -1) {
    perror("Close failed\n");
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<close_socket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <close@plt>
cmp    $0xffffffff,%eax
jne    1154 <close_socket+0x34>
lea    0xebd(%rip),%rdi
call   1040 <perror@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    115b <close_socket+0x3b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_socket>:
push   %rax
call   1030 <close@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0xffffffff,%ecx
je     1131 <close_socket+0x11>
pop    %rcx
ret
lea    0xec8(%rip),%rdi
call   1040 <perror@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Close failed\0A\00"
define i32 @close_socket(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 @close(i32 %4)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @perror(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %7
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@.str = [14 x i8] c"Close failed\0A\00"
define i32 @close_socket(i32 %0) {
%2 = tail call i32 @close(i32 %0)
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @perror(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ -1, %4 ], [ 0, %1 ]
ret i32 %7
}
/* Type definitions */
typedef int uint64_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int hash64_partial_unicode(int /*<<< orphan*/ const *, size_t);
uint64_t hash64_partial_unicode_prefix(const uint32_t *p, size_t len,
                                       size_t prefix_len, size_t min_stem) {
  if (min_stem + prefix_len > len)
    return 0xc1a7bd3b4e853fc9ULL;
  return hash64_partial_unicode(p, prefix_len);
}


x86 assembly (clang, -O0):
<hash64_partial_unicode_prefix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x28(%rbp),%rax
add    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jbe    1146 <hash64_partial_unicode_prefix+0x36>
movl   $0x4e853fc9,-0x4(%rbp)
jmp    1156 <hash64_partial_unicode_prefix+0x46>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <hash64_partial_unicode@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash64_partial_unicode_prefix>:
add    %rdx,%rcx
cmp    %rsi,%rcx
jbe    111e <hash64_partial_unicode_prefix+0xe>
mov    $0x4e853fc9,%eax
ret
mov    %rdx,%rsi
jmp    1030 <hash64_partial_unicode@plt>

LLVM IR (-O0):
define i32 @hash64_partial_unicode_prefix(i32* %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
store i32* %0, i32** %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i64 %3, i64* %9
%10 = load i64, i64* %9
%11 = load i64, i64* %8
%12 = add i64 %10, %11
%13 = load i64, i64* %7
%14 = icmp ugt i64 %12, %13
br i1 %14, label %15, label %16
15: ; preds = %4
store i32 1317355465, i32* %5
br label %20
16: ; preds = %4
%17 = load i32*, i32** %6
%18 = load i64, i64* %8
%19 = call i32 @hash64_partial_unicode(i32* %17, i64 %18)
store i32 %19, i32* %5
br label %20
20: ; preds = %16, %15
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
define i32 @hash64_partial_unicode_prefix(i32* %0, i64 %1, i64 %2, i64 %3) {
%5 = add i64 %3, %2
%6 = icmp ugt i64 %5, %1
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = tail call i32 @hash64_partial_unicode(i32* %0, i64 %2)
br label %9
9: ; preds = %4, %7
%10 = phi i32 [ %8, %7 ], [ 1317355465, %4 ]
ret i32 %10
}