xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned int, int, int);
scalar_t__ pthread_self();
int rand();
int /*<<< orphan*/ sleep(int);
void *foo(void *arg) {
  int i = (int)arg;
  int time = rand() % 3 + 1;
  printf("====== #%u: print i = %d  sleep time: %d s\n",
         (unsigned int)pthread_self(), i, time);
  sleep(time);
  return NULL;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1060 <rand@plt>
mov    $0x3,%ecx
cltd
idiv   %ecx
add    $0x1,%edx
mov    %edx,-0x10(%rbp)
mov    $0x0,%al
call   1040 <pthread_self@plt>
mov    %eax,%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
lea    0xe82(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%edi
call   1050 <sleep@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %eax,%eax
call   1060 <rand@plt>
cltq
imul   $0x55555556,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,2),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%ebp
add    $0x1,%ebp
xor    %eax,%eax
call   1040 <pthread_self@plt>
lea    0xe84(%rip),%rdi
mov    %eax,%esi
mov    %ebx,%edx
mov    %ebp,%ecx
call   1030 <printf@plt>
mov    %ebp,%edi
call   1050 <sleep@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [44 x i8] c"====== #%u: print i = %d sleep time: %d s\0A\00"
define i8* @foo(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = ptrtoint i8* %5 to i32
store i32 %6, i32* %3
%7 = call i32 (...) @rand()
%8 = srem i32 %7, 3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %4
%10 = call i64 (...) @pthread_self()
%11 = trunc i64 %10 to i32
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i32 %11, i32 %12, i32 %13)
%15 = load i32, i32* %4
%16 = call i32 @sleep(i32 %15)
ret i8* null
}

LLVM IR (-O2):
@.str = [44 x i8] c"====== #%u: print i = %d sleep time: %d s\0A\00"
define noalias i8* @foo(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i32
%4 = tail call i32 (...) @rand()
%5 = srem i32 %4, 3
%6 = add nsw i32 %5, 1
%7 = tail call i64 (...) @pthread_self()
%8 = trunc i64 %7 to i32
%9 = tail call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i32 %8, i32 %3, i32 %6)
%10 = tail call i32 @sleep(i32 %6)
ret i8* null
}
/* Variables and functions */
char *strrchr(char *, int);
char *xstrrchr(char *p, int c) { return strrchr(p, c); }


x86 assembly (clang, -O0):
<xstrrchr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <strrchr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrrchr>:
jmp    1030 <strrchr@plt>

LLVM IR (-O0):
define i8* @xstrrchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i8* @strrchr(i8* %5, i32 %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @xstrrchr(i8* %0, i32 %1) {
%3 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i32 %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ pl011_uart_putc(int /*<<< orphan*/);
void pl011_uart_puts(char *str) {
  if (str) {
    while (*str) {
      pl011_uart_putc(*str++);
    }
  }
}


x86 assembly (clang, -O0):
<pl011_uart_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     115a <pl011_uart_puts+0x4a>
jmp    112c <pl011_uart_puts+0x1c>
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1155 <pl011_uart_puts+0x45>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <pl011_uart_putc@plt>
jmp    112c <pl011_uart_puts+0x1c>
jmp    115a <pl011_uart_puts+0x4a>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pl011_uart_puts>:
push   %rbx
test   %rdi,%rdi
je     1143 <pl011_uart_puts+0x33>
mov    %rdi,%rbx
mov    (%rdi),%al
test   %al,%al
je     1143 <pl011_uart_puts+0x33>
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movsbl %al,%edi
call   1030 <pl011_uart_putc@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <pl011_uart_puts+0x20>
pop    %rbx
ret

LLVM IR (-O0):
define void @pl011_uart_puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %17
5: ; preds = %1
br label %6
6: ; preds = %10, %5
%7 = load i8*, i8** %2
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
%13 = load i8, i8* %11
%14 = sext i8 %13 to i32
%15 = call i32 @pl011_uart_putc(i32 %14)
br label %6
16: ; preds = %6
br label %17
17: ; preds = %16, %1
ret void
}

LLVM IR (-O2):
define void @pl011_uart_puts(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %14, label %3
3: ; preds = %1
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %14, label %6
6: ; preds = %3, %6
%7 = phi i8 [ %12, %6 ], [ %4, %3 ]
%8 = phi i8* [ %9, %6 ], [ %0, %3 ]
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = sext i8 %7 to i32
%11 = tail call i32 @pl011_uart_putc(i32 %10)
%12 = load i8, i8* %9
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %6
14: ; preds = %6, %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void h6(char *header) { printf("<h6>%s</h6>\n", header); }


x86 assembly (clang, -O0):
<h6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h6>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"<h6>%s</h6>\0A\00"
define void @h6(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"<h6>%s</h6>\0A\00"
define void @h6(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ atomic_full_barrier();
void membar_exit(void) { atomic_full_barrier(); }


x86 assembly (clang, -O0):
<membar_exit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <atomic_full_barrier@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<membar_exit>:
xor    %eax,%eax
jmp    1030 <atomic_full_barrier@plt>

LLVM IR (-O0):
define void @membar_exit() {
%1 = call i32 (...) @atomic_full_barrier()
ret void
}

LLVM IR (-O2):
define void @membar_exit() {
%1 = tail call i32 (...) @atomic_full_barrier()
ret void
}
void GPIOADCTriggerDisable(unsigned long ulPort, unsigned char ucPins) {
  ;
  (*((volatile unsigned long *)(ulPort + 0x00000530))) &= (~ucPins);
}


x86 assembly (clang, -O0):
<GPIOADCTriggerDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
xor    $0xffffffff,%eax
movslq %eax,%rdx
mov    -0x8(%rbp),%rax
mov    0x530(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x530(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOADCTriggerDisable>:
mov    %esi,%eax
not    %rax
and    %rax,0x530(%rdi)
ret

LLVM IR (-O0):
define void @GPIOADCTriggerDisable(i64 %0, i8 zeroext %1) {
%3 = alloca i64
%4 = alloca i8
store i64 %0, i64* %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = xor i32 %6, -1
%8 = sext i32 %7 to i64
%9 = load i64, i64* %3
%10 = add i64 %9, 1328
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = and i64 %12, %8
store volatile i64 %13, i64* %11
ret void
}

LLVM IR (-O2):
define void @GPIOADCTriggerDisable(i64 %0, i8 zeroext %1) {
%3 = zext i8 %1 to i64
%4 = xor i64 %3, -1
%5 = add i64 %0, 1328
%6 = inttoptr i64 %5 to i64*
%7 = load volatile i64, i64* %6
%8 = and i64 %7, %4
store volatile i64 %8, i64* %6
ret void
}
void RTDbgAsModuleLink(void) {}


x86 assembly (clang, -O0):
<RTDbgAsModuleLink>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTDbgAsModuleLink>:
ret

LLVM IR (-O0):
define void @RTDbgAsModuleLink() {
ret void
}

LLVM IR (-O2):
define void @RTDbgAsModuleLink() {
ret void
}
void PUT_UAA32BE(void *p, unsigned int v, unsigned int i) {
  unsigned char *_p = (unsigned char *)&((unsigned int *)p)[i];
  _p[0] = (unsigned char)(v >> 24);
  _p[1] = (unsigned char)(v >> 16);
  _p[2] = (unsigned char)(v >> 8);
  _p[3] = (unsigned char)(v);
}


x86 assembly (clang, -O0):
<PUT_UAA32BE>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%ecx
shl    $0x2,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
shr    $0x18,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0xc(%rbp),%eax
shr    $0x10,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0xc(%rbp),%eax
shr    $0x8,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PUT_UAA32BE>:
mov    %edx,%eax
bswap  %esi
mov    %esi,(%rdi,%rax,4)
ret

LLVM IR (-O0):
define void @PUT_UAA32BE(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %6
%11 = zext i32 %10 to i64
%12 = getelementptr inbounds i32, i32* %9, i64 %11
%13 = bitcast i32* %12 to i8*
store i8* %13, i8** %7
%14 = load i32, i32* %5
%15 = lshr i32 %14, 24
%16 = trunc i32 %15 to i8
%17 = load i8*, i8** %7
%18 = getelementptr inbounds i8, i8* %17, i64 0
store i8 %16, i8* %18
%19 = load i32, i32* %5
%20 = lshr i32 %19, 16
%21 = trunc i32 %20 to i8
%22 = load i8*, i8** %7
%23 = getelementptr inbounds i8, i8* %22, i64 1
store i8 %21, i8* %23
%24 = load i32, i32* %5
%25 = lshr i32 %24, 8
%26 = trunc i32 %25 to i8
%27 = load i8*, i8** %7
%28 = getelementptr inbounds i8, i8* %27, i64 2
store i8 %26, i8* %28
%29 = load i32, i32* %5
%30 = trunc i32 %29 to i8
%31 = load i8*, i8** %7
%32 = getelementptr inbounds i8, i8* %31, i64 3
store i8 %30, i8* %32
ret void
}

LLVM IR (-O2):
define void @PUT_UAA32BE(i8* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = bitcast i8* %0 to i32*
%5 = zext i32 %2 to i64
%6 = getelementptr inbounds i32, i32* %4, i64 %5
%7 = bitcast i32* %6 to i8*
%8 = lshr i32 %1, 24
%9 = trunc i32 %8 to i8
store i8 %9, i8* %7
%10 = lshr i32 %1, 16
%11 = trunc i32 %10 to i8
%12 = getelementptr inbounds i8, i8* %7, i64 1
store i8 %11, i8* %12
%13 = lshr i32 %1, 8
%14 = trunc i32 %13 to i8
%15 = getelementptr inbounds i8, i8* %7, i64 2
store i8 %14, i8* %15
%16 = trunc i32 %1 to i8
%17 = getelementptr inbounds i8, i8* %7, i64 3
store i8 %16, i8* %17
ret void
}
unsigned int aligned_value(unsigned int addr, unsigned int pwr_of_2) {
  unsigned int modulo = (1 << pwr_of_2);
  unsigned int max_value_modulo = modulo - 1;
  return (addr + max_value_modulo) & ~max_value_modulo;
}


x86 assembly (clang, -O0):
<aligned_value>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
add    -0x10(%rbp),%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aligned_value>:
mov    %esi,%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
mov    %edx,%eax
not    %eax
add    %edi,%eax
and    %edx,%eax
ret

LLVM IR (-O0):
define i32 @aligned_value(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = shl i32 1, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = sub i32 %9, 1
store i32 %10, i32* %6
%11 = load i32, i32* %3
%12 = load i32, i32* %6
%13 = add i32 %11, %12
%14 = load i32, i32* %6
%15 = xor i32 %14, -1
%16 = and i32 %13, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @aligned_value(i32 %0, i32 %1) {
%3 = shl nsw i32 -1, %1
%4 = xor i32 %3, -1
%5 = add i32 %4, %0
%6 = and i32 %5, %3
ret i32 %6
}
/* Variables and functions */
long double sqrt(long double);
long double sqrtl(long double a1) { return sqrt(a1); }


x86 assembly (clang, -O0):
<sqrtl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <sqrt@plt>
fld    %st(0)
fstp   %st(0)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqrtl>:
sub    $0x18,%rsp
fldt   0x20(%rsp)
fld    %st(0)
fsqrt
fldz
fxch   %st(2)
fucomi %st(2),%st
fstp   %st(2)
jb     112d <sqrtl+0x1d>
fstp   %st(1)
add    $0x18,%rsp
ret
fstp   %st(0)
fstpt  (%rsp)
call   1030 <sqrt@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @sqrtl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call x86_fp80 @sqrt(x86_fp80 %3)
ret x86_fp80 %4
}

LLVM IR (-O2):
define x86_fp80 @sqrtl(x86_fp80 %0) {
%2 = tail call x86_fp80 @sqrt(x86_fp80 %0)
ret x86_fp80 %2
}
/* Variables and functions */
int read(int fd, void *buf, size_t count) { return 0; }


x86 assembly (clang, -O0):
<read>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @read(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @read(i32 %0, i8* nocapture readnone %1, i64 %2) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ test();
int main(void) {
  int i;
  for (i = 0; i < 100; i++)
    test();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x64,-0x8(%rbp)
jge    1145 <main+0x35>
mov    $0x0,%al
call   1030 <test@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x64,%ebx
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <test@plt>
add    $0xffffffff,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %8, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 100
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = call i32 (...) @test()
br label %8
8: ; preds = %6
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 1
store i32 %10, i32* %2
br label %3
11: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 (...) @test()
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 100
br i1 %5, label %6, label %1
6: ; preds = %1
ret i32 0
}
/* Variables and functions */
void strcpy(char *src, char *dest) {
  if (!src || !dest)
    return;
  while (*src != '\0') {
    *(dest++) = *(src++);
  }
  *dest = '\0';
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1122 <strcpy+0x22>
cmpq   $0x0,-0x10(%rbp)
jne    1127 <strcpy+0x27>
jmp    116a <strcpy+0x6a>
jmp    112c <strcpy+0x2c>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1163 <strcpy+0x63>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
mov    (%rax),%cl
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
mov    %cl,(%rax)
jmp    112c <strcpy+0x2c>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
test   %rdi,%rdi
je     1134 <strcpy+0x34>
test   %rsi,%rsi
je     1134 <strcpy+0x34>
mov    (%rdi),%al
test   %al,%al
je     1131 <strcpy+0x31>
add    $0x1,%rdi
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %al,(%rsi)
add    $0x1,%rsi
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
jne    1120 <strcpy+0x20>
movb   $0x0,(%rsi)
ret

LLVM IR (-O0):
define void @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i8*, i8** %4
%9 = icmp ne i8* %8, null
br i1 %9, label %11, label %10
10: ; preds = %7, %2
br label %25
11: ; preds = %7
br label %12
12: ; preds = %17, %11
%13 = load i8*, i8** %3
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %23
17: ; preds = %12
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
%20 = load i8, i8* %18
%21 = load i8*, i8** %4
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %4
store i8 %20, i8* %21
br label %12
23: ; preds = %12
%24 = load i8*, i8** %4
store i8 0, i8* %24
br label %25
25: ; preds = %23, %10
ret void
}

LLVM IR (-O2):
define void @strcpy(i8* %0, i8* writeonly %1) {
%3 = icmp ne i8* %0, null
%4 = icmp ne i8* %1, null
%5 = and i1 %3, %4
br i1 %5, label %6, label %19
6: ; preds = %2
%7 = load i8, i8* %0
%8 = icmp eq i8 %7, 0
br i1 %8, label %17, label %9
9: ; preds = %6, %9
%10 = phi i8 [ %15, %9 ], [ %7, %6 ]
%11 = phi i8* [ %14, %9 ], [ %1, %6 ]
%12 = phi i8* [ %13, %9 ], [ %0, %6 ]
%13 = getelementptr inbounds i8, i8* %12, i64 1
%14 = getelementptr inbounds i8, i8* %11, i64 1
store i8 %10, i8* %11
%15 = load i8, i8* %13
%16 = icmp eq i8 %15, 0
br i1 %16, label %17, label %9
17: ; preds = %9, %6
%18 = phi i8* [ %1, %6 ], [ %14, %9 ]
store i8 0, i8* %18
br label %19
19: ; preds = %2, %17
ret void
}
/* Variables and functions */
int UT_LINESIZE;
int max_len_tty_name() { return UT_LINESIZE; }


x86 assembly (clang, -O0):
<max_len_tty_name>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max_len_tty_name>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@UT_LINESIZE = global i32 0
define i32 @max_len_tty_name() {
%1 = load i32, i32* @UT_LINESIZE
ret i32 %1
}

LLVM IR (-O2):
@UT_LINESIZE = global i32 0
define i32 @max_len_tty_name() {
%1 = load i32, i32* @UT_LINESIZE
ret i32 %1
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t f3m_calc_freq(int32_t freq) {
  freq = (freq << 10) / (44100 >> 6);
  return freq;
}


x86 assembly (clang, -O0):
<f3m_calc_freq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0xa,%eax
mov    $0x2b1,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3m_calc_freq>:
shl    $0xa,%edi
movslq %edi,%rax
imul   $0x2f8f0c43,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x27,%rax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @f3m_calc_freq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 10
%5 = sdiv i32 %4, 689
store i32 %5, i32* %2
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @f3m_calc_freq(i32 %0) {
%2 = shl i32 %0, 10
%3 = sdiv i32 %2, 689
ret i32 %3
}
void Tiger_heap_init(int heapSize) { return; }


x86 assembly (clang, -O0):
<Tiger_heap_init>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Tiger_heap_init>:
ret

LLVM IR (-O0):
define void @Tiger_heap_init(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @Tiger_heap_init(i32 %0) {
ret void
}
R0R1(r0, r1, x0, x1, p0, p1) int r0, r1;
int *p0, *p1;
{
  if (r0 <= r1)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<R0R1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     1130 <R0R1+0x30>
movl   $0x1,-0x4(%rbp)
jmp    1137 <R0R1+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<R0R1>:
xor    %eax,%eax
cmp    %esi,%edi
setle  %al
ret

LLVM IR (-O0):
define i32 @R0R1(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = icmp sle i32 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %6
store i32 1, i32* %7
br label %19
18: ; preds = %6
store i32 0, i32* %7
br label %19
19: ; preds = %18, %17
%20 = load i32, i32* %7
ret i32 %20
}

LLVM IR (-O2):
define i32 @R0R1(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture readnone %4, i32* nocapture readnone %5) {
%7 = icmp sle i32 %0, %1
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ uxmi_color_fg(int);
void uxmi_cfg_disp(char *conlog) {
  uxmi_color_fg(10);
  printf("%s", conlog);
  return;
}


x86 assembly (clang, -O0):
<uxmi_cfg_disp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xa,%edi
call   1040 <uxmi_color_fg@plt>
mov    -0x8(%rbp),%rsi
lea    0xebf(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uxmi_cfg_disp>:
push   %rbx
mov    %rdi,%rbx
mov    $0xa,%edi
call   1040 <uxmi_color_fg@plt>
lea    0xecb(%rip),%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @uxmi_cfg_disp(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @uxmi_color_fg(i32 10)
%4 = load i8*, i8** %2
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @uxmi_cfg_disp(i8* %0) {
%2 = tail call i32 @uxmi_color_fg(i32 10)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void callback(int value) {
  printf("C callback invoked with value: %d\n", value);
}


x86 assembly (clang, -O0):
<callback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<callback>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"C callback invoked with value: %d\0A\00"
define void @callback(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [35 x i8] c"C callback invoked with value: %d\0A\00"
define void @callback(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
scalar_t__ fun1(int);
int fun(int n) {
  int i, sum = 0;
  for (i = 1; i <= 100; i++)
    if (fun1(i))
      sum += i;
  return sum;
}


x86 assembly (clang, -O0):
<fun>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x64,-0x8(%rbp)
jg     1161 <fun+0x51>
mov    -0x8(%rbp),%edi
call   1030 <fun1@plt>
cmp    $0x0,%rax
je     114e <fun+0x3e>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1153 <fun+0x43>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1129 <fun+0x19>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
xor    %ebx,%ebx
jmp    112a <fun+0x1a>
nopl   0x0(%rax)
add    %ecx,%ebx
add    $0x1,%ebp
cmp    $0x65,%ebp
je     113f <fun+0x2f>
mov    %ebp,%edi
call   1030 <fun1@plt>
mov    $0x0,%ecx
test   %rax,%rax
je     1120 <fun+0x10>
mov    %ebp,%ecx
jmp    1120 <fun+0x10>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fun(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
store i32 1, i32* %3
br label %5
5: ; preds = %17, %1
%6 = load i32, i32* %3
%7 = icmp sle i32 %6, 100
br i1 %7, label %8, label %20
8: ; preds = %5
%9 = load i32, i32* %3
%10 = call i64 @fun1(i32 %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %8
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = add nsw i32 %14, %13
store i32 %15, i32* %4
br label %16
16: ; preds = %12, %8
br label %17
17: ; preds = %16
%18 = load i32, i32* %3
%19 = add nsw i32 %18, 1
store i32 %19, i32* %3
br label %5
20: ; preds = %5
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @fun(i32 %0) {
br label %2
2: ; preds = %1, %2
%3 = phi i32 [ 0, %1 ], [ %8, %2 ]
%4 = phi i32 [ 1, %1 ], [ %9, %2 ]
%5 = tail call i64 @fun1(i32 %4)
%6 = icmp eq i64 %5, 0
%7 = select i1 %6, i32 0, i32 %4
%8 = add nuw nsw i32 %7, %3
%9 = add nuw nsw i32 %4, 1
%10 = icmp eq i32 %9, 101
br i1 %10, label %11, label %2
11: ; preds = %2
ret i32 %8
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMRA1_set(void) { return U_WMRCORENONE_set("U_WMRA1"); }


x86 assembly (clang, -O0):
<U_WMRA1_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRA1_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMRA1\00"
define i8* @U_WMRA1_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMRA1\00"
define i8* @U_WMRA1_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Variables and functions */
int sync_wake(int, int);
int sync_wake_child(int fd[2], int seq) { return sync_wake(fd[1], seq); }


x86 assembly (clang, -O0):
<sync_wake_child>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%edi
mov    -0xc(%rbp),%esi
call   1030 <sync_wake@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sync_wake_child>:
mov    0x4(%rdi),%edi
jmp    1030 <sync_wake@plt>

LLVM IR (-O0):
define i32 @sync_wake_child(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 1
%7 = load i32, i32* %6
%8 = load i32, i32* %4
%9 = call i32 @sync_wake(i32 %7, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @sync_wake_child(i32* nocapture %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = load i32, i32* %3
%5 = tail call i32 @sync_wake(i32 %4, i32 %1)
ret i32 %5
}
/* Variables and functions */
void *dlopen(char const *, int);
int /*<<< orphan*/ printf(char *, char const *);
void *my_dlopen(const char *file, int mode) {
  printf("CALLWATCH: "
         "LibOpen %s \n",
         file);
  return dlopen(file, mode);
}


x86 assembly (clang, -O0):
<my_dlopen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <dlopen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_dlopen>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
lea    0xed1(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <dlopen@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"CALLWATCH: LibOpen %s \0A\00"
define i8* @my_dlopen(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = load i8*, i8** %3
%8 = load i32, i32* %4
%9 = call i8* @dlopen(i8* %7, i32 %8)
ret i8* %9
}

LLVM IR (-O2):
@.str = [24 x i8] c"CALLWATCH: LibOpen %s \0A\00"
define i8* @my_dlopen(i8* %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i8* @dlopen(i8* %0, i32 %1)
ret i8* %4
}
/* Variables and functions */
int strspn(char *, char *);
int LineIsBlank(char *s) {
  register char *t;
  t = s + strspn(s, " \f\n\r\t\v");
  return (*t == '\0');
}


x86 assembly (clang, -O0):
<LineIsBlank>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed1(%rip),%rsi
call   1030 <strspn@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LineIsBlank>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <strspn@plt>
movslq %eax,%rcx
xor    %eax,%eax
cmpb   $0x0,(%rbx,%rcx,1)
sete   %al
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c" \0C\0A\0D\09\0B\00"
define i32 @LineIsBlank(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strspn(i8* %5, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %4, i64 %7
store i8* %8, i8** %3
%9 = load i8*, i8** %3
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 0
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
@.str = [7 x i8] c" \0C\0A\0D\09\0B\00"
define i32 @LineIsBlank(i8* nocapture %0) {
%2 = tail call i32 @strspn(i8* %0, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%3 = sext i32 %2 to i64
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
OP(dd, f5) {
  illegal_1();
  op_f5();
}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <illegal_1@plt>
mov    $0x0,%al
call   1040 <op_f5@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
push   %rax
xor    %eax,%eax
call   1030 <illegal_1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <op_f5@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @illegal_1()
%7 = call i32 (...) @op_f5()
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @illegal_1()
%4 = tail call i32 (...) @op_f5()
ret i32 undef
}
void rop3_20_0_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = T ^ S;
  stk2 = ~stk2;
  stk1 = *D | stk2;
  stk1 = ~stk1;
  *D = (stk1 & S) | (stk1 & (~T)) | (T & (~S) & *D);
}


x86 assembly (clang, -O0):
<rop3_20_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
movzbl -0xb(%rbp),%ecx
movzbl -0xa(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
movzbl -0xa(%rbp),%ecx
movzbl -0x9(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
mov    -0x8(%rbp),%rdx
movzbl (%rdx),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_20_0_1>:
mov    (%rdi),%al
mov    %eax,%ecx
or     %dl,%cl
not    %cl
and    %sil,%cl
not    %sil
and    %dl,%sil
and    %al,%sil
or     %cl,%sil
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_20_0_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8, i8* %6
%10 = zext i8 %9 to i32
%11 = load i8, i8* %5
%12 = zext i8 %11 to i32
%13 = xor i32 %10, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %8
%15 = load i8, i8* %8
%16 = zext i8 %15 to i32
%17 = xor i32 %16, -1
%18 = trunc i32 %17 to i8
store i8 %18, i8* %8
%19 = load i8*, i8** %4
%20 = load i8, i8* %19
%21 = zext i8 %20 to i32
%22 = load i8, i8* %8
%23 = zext i8 %22 to i32
%24 = or i32 %21, %23
%25 = trunc i32 %24 to i8
store i8 %25, i8* %7
%26 = load i8, i8* %7
%27 = zext i8 %26 to i32
%28 = xor i32 %27, -1
%29 = trunc i32 %28 to i8
store i8 %29, i8* %7
%30 = load i8, i8* %7
%31 = zext i8 %30 to i32
%32 = load i8, i8* %5
%33 = zext i8 %32 to i32
%34 = and i32 %31, %33
%35 = load i8, i8* %7
%36 = zext i8 %35 to i32
%37 = load i8, i8* %6
%38 = zext i8 %37 to i32
%39 = xor i32 %38, -1
%40 = and i32 %36, %39
%41 = or i32 %34, %40
%42 = load i8, i8* %6
%43 = zext i8 %42 to i32
%44 = load i8, i8* %5
%45 = zext i8 %44 to i32
%46 = xor i32 %45, -1
%47 = and i32 %43, %46
%48 = load i8*, i8** %4
%49 = load i8, i8* %48
%50 = zext i8 %49 to i32
%51 = and i32 %47, %50
%52 = or i32 %41, %51
%53 = trunc i32 %52 to i8
%54 = load i8*, i8** %4
store i8 %53, i8* %54
ret void
}

LLVM IR (-O2):
define void @rop3_20_0_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %4, %2
%6 = xor i8 %5, -1
%7 = and i8 %6, %1
%8 = xor i8 %1, -1
%9 = and i8 %8, %2
%10 = and i8 %9, %4
%11 = or i8 %7, %10
store i8 %11, i8* %0
ret void
}
/* Type definitions */
struct label_struct {
  int dummy;
};
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int errno;
int syscall(int, char const *, int /*<<< orphan*/, struct label_struct *);
int create_labeled(const char *pathname, mode_t mode,
                   struct label_struct *label) {
  int rv = syscall(332, pathname, mode, label);
  return rv ? -errno : 0;
}


x86 assembly (clang, -O0):
<create_labeled>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    $0x14c,%edi
call   1030 <syscall@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
je     1158 <create_labeled+0x48>
xor    %eax,%eax
mov    0x2e92(%rip),%rcx
sub    (%rcx),%eax
mov    %eax,-0x20(%rbp)
jmp    1162 <create_labeled+0x52>
xor    %eax,%eax
mov    %eax,-0x20(%rbp)
jmp    1162 <create_labeled+0x52>
mov    -0x20(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_labeled>:
push   %rax
mov    %rdx,%rcx
mov    %esi,%edx
mov    %rdi,%rsi
mov    $0x14c,%edi
call   1030 <syscall@plt>
mov    0x2eb6(%rip),%rcx
xor    %edx,%edx
sub    (%rcx),%edx
test   %eax,%eax
cmovne %edx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.label_struct = type { i32 }
@errno = global i32 0
define i32 @create_labeled(i8* %0, i32 %1, %struct.label_struct* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca %struct.label_struct*
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store %struct.label_struct* %2, %struct.label_struct** %6
%8 = load i8*, i8** %4
%9 = load i32, i32* %5
%10 = load %struct.label_struct*, %struct.label_struct** %6
%11 = call i32 @syscall(i32 332, i8* %8, i32 %9, %struct.label_struct* %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %3
%15 = load i32, i32* @errno
%16 = sub nsw i32 0, %15
br label %18
17: ; preds = %3
br label %18
18: ; preds = %17, %14
%19 = phi i32 [ %16, %14 ], [ 0, %17 ]
ret i32 %19
}

LLVM IR (-O2):
%struct.label_struct = type { i32 }
@errno = global i32 0
define i32 @create_labeled(i8* %0, i32 %1, %struct.label_struct* %2) {
%4 = tail call i32 @syscall(i32 332, i8* %0, i32 %1, %struct.label_struct* %2)
%5 = icmp eq i32 %4, 0
%6 = load i32, i32* @errno
%7 = sub nsw i32 0, %6
%8 = select i1 %5, i32 0, i32 %7
ret i32 %8
}
/* Variables and functions */
int fib(int);
int /*<<< orphan*/ init();
int /*<<< orphan*/ printf(char *, int);
int main() {
  init();
  printf("Fib of 10 : %d \n", fib(5));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <init@plt>
mov    $0x5,%edi
call   1050 <fib@plt>
mov    %eax,%esi
lea    0xea7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <init@plt>
mov    $0x5,%edi
call   1050 <fib@plt>
lea    0xeb7(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Fib of 10 : %d \0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @init()
%3 = call i32 @fib(i32 5)
%4 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [17 x i8] c"Fib of 10 : %d \0A\00"
define i32 @main() {
%1 = tail call i32 (...) @init()
%2 = tail call i32 @fib(i32 5)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}
int f(int n) {
  int *p;
  {
    int yyy = n;
    p = &yyy;
  }
  return *p;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
lea    -0x14(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
store i32 %5, i32* %4
store i32* %4, i32** %3
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @f(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int /*<<< orphan*/);
main() { _exit(0); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @_exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @_exit(i32 0)
unreachable
}
void TraceNothing(char *format, ...) {}


x86 assembly (clang, -O0):
<TraceNothing>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TraceNothing>:
ret

LLVM IR (-O0):
define void @TraceNothing(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @TraceNothing(i8* nocapture %0, ...) {
ret void
}
void ASN1_TYPE_set(void) {}


x86 assembly (clang, -O0):
<ASN1_TYPE_set>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_TYPE_set>:
ret

LLVM IR (-O0):
define void @ASN1_TYPE_set() {
ret void
}

LLVM IR (-O2):
define void @ASN1_TYPE_set() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ allocator_default();
int /*<<< orphan*/ pool_init(int /*<<< orphan*/, int, int, int /*<<< orphan*/);
void _ensure_pool_init_gracefully_handles_null_pool(void) {
  pool_init(0, 4, 16, allocator_default());
}


x86 assembly (clang, -O0):
<_ensure_pool_init_gracefully_handles_null_pool>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <allocator_default@plt>
mov    %eax,%ecx
xor    %edi,%edi
mov    $0x4,%esi
mov    $0x10,%edx
call   1030 <pool_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ensure_pool_init_gracefully_handles_null_pool>:
push   %rax
xor    %eax,%eax
call   1040 <allocator_default@plt>
xor    %edi,%edi
mov    $0x4,%esi
mov    $0x10,%edx
mov    %eax,%ecx
pop    %rax
jmp    1030 <pool_init@plt>

LLVM IR (-O0):
define void @_ensure_pool_init_gracefully_handles_null_pool() {
%1 = call i32 (...) @allocator_default()
%2 = call i32 @pool_init(i32 0, i32 4, i32 16, i32 %1)
ret void
}

LLVM IR (-O2):
define void @_ensure_pool_init_gracefully_handles_null_pool() {
%1 = tail call i32 (...) @allocator_default()
%2 = tail call i32 @pool_init(i32 0, i32 4, i32 16, i32 %1)
ret void
}
void ble_rsp_hardware_io_port_write(
    const struct ble_msg_hardware_io_port_write_rsp_t *msg) {}


x86 assembly (clang, -O0):
<ble_rsp_hardware_io_port_write>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ble_rsp_hardware_io_port_write>:
ret

LLVM IR (-O0):
%struct.ble_msg_hardware_io_port_write_rsp_t = type opaque
define void @ble_rsp_hardware_io_port_write(%struct.ble_msg_hardware_io_port_write_rsp_t* %0) {
%2 = alloca %struct.ble_msg_hardware_io_port_write_rsp_t*
store %struct.ble_msg_hardware_io_port_write_rsp_t* %0, %struct.ble_msg_hardware_io_port_write_rsp_t** %2
ret void
}

LLVM IR (-O2):
%struct.ble_msg_hardware_io_port_write_rsp_t = type opaque
define void @ble_rsp_hardware_io_port_write(%struct.ble_msg_hardware_io_port_write_rsp_t* nocapture %0) {
ret void
}
/* Variables and functions */
double sinh(double);
double c_sinh(double arg0) { return sinh(arg0); }


x86 assembly (clang, -O0):
<c_sinh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <sinh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_sinh>:
jmp    1030 <sinh@plt>

LLVM IR (-O0):
define double @c_sinh(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @sinh(double %3)
ret double %4
}

LLVM IR (-O2):
define double @c_sinh(double %0) {
%2 = tail call double @sinh(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void print(int r) { printf("%d is prime \n", r); }


x86 assembly (clang, -O0):
<print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"%d is prime \0A\00"
define void @print(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"%d is prime \0A\00"
define void @print(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
int helptext(char *pname) {
  fprintf(stderr, "Usage: %s -f <input file> -o <output file>\n", pname);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<helptext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e8c(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<helptext>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [44 x i8] c"Usage: %s -f <input file> -o <output file>\0A\00"
@EXIT_FAILURE = global i32 0
define i32 @helptext(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @EXIT_FAILURE
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [44 x i8] c"Usage: %s -f <input file> -o <output file>\0A\00"
@EXIT_FAILURE = global i32 0
define i32 @helptext(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @EXIT_FAILURE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
int file_load_from_directory(const char *directory, const char *filename) {
  return 1;
}


x86 assembly (clang, -O0):
<file_load_from_directory>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_load_from_directory>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @file_load_from_directory(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 1
}

LLVM IR (-O2):
define i32 @file_load_from_directory(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 1
}
/* Variables and functions */
char *null_array_DOUBLE(double *arr) {
  if (arr == NULL) {
    return "null";
  } else {
    return "non_null";
  }
}


x86 assembly (clang, -O0):
<null_array_DOUBLE>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1123 <null_array_DOUBLE+0x23>
lea    0xeea(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    112e <null_array_DOUBLE+0x2e>
lea    0xed6(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_array_DOUBLE>:
test   %rdi,%rdi
lea    0xefa(%rip),%rcx
lea    0xeef(%rip),%rax
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"null\00"
@.str.1 = [9 x i8] c"non_null\00"
define i8* @null_array_DOUBLE(double* %0) {
%2 = alloca i8*
%3 = alloca double*
store double* %0, double** %3
%4 = load double*, double** %3
%5 = icmp eq double* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %2
br label %8
7: ; preds = %1
store i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %8
8: ; preds = %7, %6
%9 = load i8*, i8** %2
ret i8* %9
}

LLVM IR (-O2):
@.str = [5 x i8] c"null\00"
@.str.1 = [9 x i8] c"non_null\00"
define i8* @null_array_DOUBLE(double* readnone %0) {
%2 = icmp eq double* %0, null
%3 = select i1 %2, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0)
ret i8* %3
}