xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ put8(int);
void mov_preg64preg64_reg16(int reg1, int reg2, int reg16) {
  put8(0x66);
  put8(0x89);
  put8(0x04 | (reg16 << 3));
  put8((reg1 << 3) | reg2);
}


x86 assembly (clang, -O0):
<mov_preg64preg64_reg16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    $0x66,%edi
call   1030 <put8@plt>
mov    $0x89,%edi
call   1030 <put8@plt>
mov    -0xc(%rbp),%edi
shl    $0x3,%edi
or     $0x4,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     -0x8(%rbp),%edi
call   1030 <put8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mov_preg64preg64_reg16>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%ebx
mov    %esi,%r14d
mov    %edi,%ebp
mov    $0x66,%edi
call   1030 <put8@plt>
mov    $0x89,%edi
call   1030 <put8@plt>
lea    0x4(,%rbx,8),%edi
call   1030 <put8@plt>
shl    $0x3,%ebp
or     %r14d,%ebp
mov    %ebp,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @mov_preg64preg64_reg16(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = call i32 @put8(i32 102)
%8 = call i32 @put8(i32 137)
%9 = load i32, i32* %6
%10 = shl i32 %9, 3
%11 = or i32 4, %10
%12 = call i32 @put8(i32 %11)
%13 = load i32, i32* %4
%14 = shl i32 %13, 3
%15 = load i32, i32* %5
%16 = or i32 %14, %15
%17 = call i32 @put8(i32 %16)
ret void
}

LLVM IR (-O2):
define void @mov_preg64preg64_reg16(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @put8(i32 102)
%5 = tail call i32 @put8(i32 137)
%6 = shl i32 %2, 3
%7 = or i32 %6, 4
%8 = tail call i32 @put8(i32 %7)
%9 = shl i32 %0, 3
%10 = or i32 %9, %1
%11 = tail call i32 @put8(i32 %10)
ret void
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
uint16_t endian_swap(uint16_t word) {
  uint16_t temp;
  temp = word & 0xff;
  temp <<= 8;
  temp |= (word >> 8);
  return temp;
}


x86 assembly (clang, -O0):
<endian_swap>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<endian_swap>:
mov    %edi,%eax
shl    $0x8,%eax
movzwl %ax,%eax
sar    $0x8,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @endian_swap(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = and i32 %4, 255
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = shl i32 %6, 8
store i32 %7, i32* %3
%8 = load i32, i32* %2
%9 = ashr i32 %8, 8
%10 = load i32, i32* %3
%11 = or i32 %10, %9
store i32 %11, i32* %3
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @endian_swap(i32 %0) {
%2 = shl i32 %0, 8
%3 = and i32 %2, 65280
%4 = ashr i32 %0, 8
%5 = or i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ print_str(int, int, int, char *, char *);
main() {
  print_str(1, 2, 3, "hi\n", "yo\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
lea    0xecb(%rip),%rcx
lea    0xec8(%rip),%r8
call   1030 <print_str@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rcx
lea    0xee5(%rip),%r8
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
call   1030 <print_str@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"hi\0A\00"
@.str.1 = [4 x i8] c"yo\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @print_str(i32 1, i32 2, i32 3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"hi\0A\00"
@.str.1 = [4 x i8] c"yo\0A\00"
define i32 @main() {
%1 = tail call i32 @print_str(i32 1, i32 2, i32 3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct shmid_ds {
  int shm_nattch;
};

/* Variables and functions */
int /*<<< orphan*/ IPC_STAT;
scalar_t__ shmctl(int, int /*<<< orphan*/, struct shmid_ds *);
int get_shmem_attach(int shmid) {
  struct shmid_ds smem_ds;
  smem_ds.shm_nattch = 0;
  if (shmctl(shmid, IPC_STAT, &smem_ds) == 0)
    return smem_ds.shm_nattch - 1;
  return -1;
}


x86 assembly (clang, -O0):
<get_shmem_attach>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    0x2eb4(%rip),%rax
mov    (%rax),%esi
lea    -0x10(%rbp),%rdx
call   1030 <shmctl@plt>
cmp    $0x0,%rax
jne    114f <get_shmem_attach+0x3f>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1156 <get_shmem_attach+0x46>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_shmem_attach>:
push   %rax
movl   $0x0,(%rsp)
mov    0x2ec1(%rip),%rax
mov    (%rax),%esi
mov    %rsp,%rdx
call   1030 <shmctl@plt>
mov    (%rsp),%ecx
add    $0xffffffff,%ecx
neg    %rax
sbb    %eax,%eax
or     %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.shmid_ds = type { i32 }
@IPC_STAT = global i32 0
define i32 @get_shmem_attach(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca %struct.shmid_ds
store i32 %0, i32* %3
%5 = getelementptr inbounds %struct.shmid_ds, %struct.shmid_ds* %4, i32 0, i32 0
store i32 0, i32* %5
%6 = load i32, i32* %3
%7 = load i32, i32* @IPC_STAT
%8 = call i64 @shmctl(i32 %6, i32 %7, %struct.shmid_ds* %4)
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %1
%11 = getelementptr inbounds %struct.shmid_ds, %struct.shmid_ds* %4, i32 0, i32 0
%12 = load i32, i32* %11
%13 = sub nsw i32 %12, 1
store i32 %13, i32* %2
br label %15
14: ; preds = %1
store i32 -1, i32* %2
br label %15
15: ; preds = %14, %10
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
%struct.shmid_ds = type { i32 }
@IPC_STAT = global i32 0
define i32 @get_shmem_attach(i32 %0) {
%2 = alloca %struct.shmid_ds
%3 = bitcast %struct.shmid_ds* %2 to i8*
%4 = getelementptr inbounds %struct.shmid_ds, %struct.shmid_ds* %2, i64 0, i32 0
store i32 0, i32* %4
%5 = load i32, i32* @IPC_STAT
%6 = call i64 @shmctl(i32 %0, i32 %5, %struct.shmid_ds* %2)
%7 = icmp eq i64 %6, 0
%8 = load i32, i32* %4
%9 = add nsw i32 %8, -1
%10 = select i1 %7, i32 %9, i32 -1
ret i32 %10
}
int logicalShift(int x, int n) {
  int num = ~n + 1;
  int offset = (32 + num);
  int mask = ~0 << (offset + (~1 + 1));
  mask = mask << 1;
  mask = ~mask;
  x = x >> n;
  x = x & mask;
  return x;
}


x86 assembly (clang, -O0):
<logicalShift>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%ecx
add    $0xffffffff,%ecx
mov    $0xffffffff,%eax
shl    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<logicalShift>:
mov    $0x1f,%cl
sub    %sil,%cl
mov    $0xfffffffe,%eax
shl    %cl,%eax
not    %eax
mov    %esi,%ecx
sar    %cl,%edi
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @logicalShift(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = load i32, i32* %4
%9 = xor i32 %8, -1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = add nsw i32 32, %11
store i32 %12, i32* %6
%13 = load i32, i32* %6
%14 = add nsw i32 %13, -1
%15 = shl i32 -1, %14
store i32 %15, i32* %7
%16 = load i32, i32* %7
%17 = shl i32 %16, 1
store i32 %17, i32* %7
%18 = load i32, i32* %7
%19 = xor i32 %18, -1
store i32 %19, i32* %7
%20 = load i32, i32* %3
%21 = load i32, i32* %4
%22 = ashr i32 %20, %21
store i32 %22, i32* %3
%23 = load i32, i32* %3
%24 = load i32, i32* %7
%25 = and i32 %23, %24
store i32 %25, i32* %3
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @logicalShift(i32 %0, i32 %1) {
%3 = sub i32 31, %1
%4 = shl i32 -2, %3
%5 = xor i32 %4, -1
%6 = ashr i32 %0, %1
%7 = and i32 %6, %5
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void func_1(int a[2][3][5]) { printf("%d\n", a[1][2][3]); }


x86 assembly (clang, -O0):
<func_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x70(%rax),%esi
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_1>:
mov    0x70(%rdi),%esi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @func_1([3 x [5 x i32]]* %0) {
%2 = alloca [3 x [5 x i32]]*
store [3 x [5 x i32]]* %0, [3 x [5 x i32]]** %2
%3 = load [3 x [5 x i32]]*, [3 x [5 x i32]]** %2
%4 = getelementptr inbounds [3 x [5 x i32]], [3 x [5 x i32]]* %3, i64 1
%5 = getelementptr inbounds [3 x [5 x i32]], [3 x [5 x i32]]* %4, i64 0, i64 2
%6 = getelementptr inbounds [5 x i32], [5 x i32]* %5, i64 0, i64 3
%7 = load i32, i32* %6
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @func_1([3 x [5 x i32]]* nocapture %0) {
%2 = getelementptr inbounds [3 x [5 x i32]], [3 x [5 x i32]]* %0, i64 1, i64 2, i64 3
%3 = load i32, i32* %2
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ glutPostRedisplay();
void cb_idle(void) { glutPostRedisplay(); }


x86 assembly (clang, -O0):
<cb_idle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <glutPostRedisplay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cb_idle>:
xor    %eax,%eax
jmp    1030 <glutPostRedisplay@plt>

LLVM IR (-O0):
define void @cb_idle() {
%1 = call i32 (...) @glutPostRedisplay()
ret void
}

LLVM IR (-O2):
define void @cb_idle() {
%1 = tail call i32 (...) @glutPostRedisplay()
ret void
}
void g_async_queue_timed_pop_unlocked() {}


x86 assembly (clang, -O0):
<g_async_queue_timed_pop_unlocked>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_async_queue_timed_pop_unlocked>:
ret

LLVM IR (-O0):
define void @g_async_queue_timed_pop_unlocked() {
ret void
}

LLVM IR (-O2):
define void @g_async_queue_timed_pop_unlocked() {
ret void
}
/* Variables and functions */
void *memmove(void *, void *, int);
void *speex_move(void *dest, void *src, int n) { return memmove(dest, src, n); }


x86 assembly (clang, -O0):
<speex_move>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <memmove@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<speex_move>:
jmp    1030 <memmove@plt>

LLVM IR (-O0):
define i8* @speex_move(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i8* @memmove(i8* %7, i8* %8, i32 %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @speex_move(i8* %0, i8* %1, i32 %2) {
%4 = tail call i8* @memmove(i8* %0, i8* %1, i32 %2)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ dsl_powerup();
int /*<<< orphan*/ wait_ppe_sync_state(int);
void ifx_dsl_dfe_setup(void) {
  int i = 0;
  dsl_powerup();
  for (i = 0; i < 10000; i++)
    ;
  wait_ppe_sync_state(0);
  for (i = 0; i < 10000; i++)
    ;
  wait_ppe_sync_state(1);
}


x86 assembly (clang, -O0):
<ifx_dsl_dfe_setup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <dsl_powerup@plt>
movl   $0x0,-0x4(%rbp)
cmpl   $0x2710,-0x4(%rbp)
jge    115d <ifx_dsl_dfe_setup+0x3d>
jmp    114f <ifx_dsl_dfe_setup+0x2f>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    113d <ifx_dsl_dfe_setup+0x1d>
xor    %edi,%edi
call   1040 <wait_ppe_sync_state@plt>
movl   $0x0,-0x4(%rbp)
cmpl   $0x2710,-0x4(%rbp)
jge    118b <ifx_dsl_dfe_setup+0x6b>
jmp    117d <ifx_dsl_dfe_setup+0x5d>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    116b <ifx_dsl_dfe_setup+0x4b>
mov    $0x1,%edi
call   1040 <wait_ppe_sync_state@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ifx_dsl_dfe_setup>:
push   %rax
xor    %eax,%eax
call   1030 <dsl_powerup@plt>
xor    %edi,%edi
call   1040 <wait_ppe_sync_state@plt>
mov    $0x1,%edi
pop    %rax
jmp    1040 <wait_ppe_sync_state@plt>

LLVM IR (-O0):
define void @ifx_dsl_dfe_setup() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @dsl_powerup()
store i32 0, i32* %1
br label %3
3: ; preds = %7, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 10000
br i1 %5, label %6, label %10
6: ; preds = %3
br label %7
7: ; preds = %6
%8 = load i32, i32* %1
%9 = add nsw i32 %8, 1
store i32 %9, i32* %1
br label %3
10: ; preds = %3
%11 = call i32 @wait_ppe_sync_state(i32 0)
store i32 0, i32* %1
br label %12
12: ; preds = %16, %10
%13 = load i32, i32* %1
%14 = icmp slt i32 %13, 10000
br i1 %14, label %15, label %19
15: ; preds = %12
br label %16
16: ; preds = %15
%17 = load i32, i32* %1
%18 = add nsw i32 %17, 1
store i32 %18, i32* %1
br label %12
19: ; preds = %12
%20 = call i32 @wait_ppe_sync_state(i32 1)
ret void
}

LLVM IR (-O2):
define void @ifx_dsl_dfe_setup() {
%1 = tail call i32 (...) @dsl_powerup()
%2 = tail call i32 @wait_ppe_sync_state(i32 0)
%3 = tail call i32 @wait_ppe_sync_state(i32 1)
ret void
}
void os_cleargraphics(void) {}


x86 assembly (clang, -O0):
<os_cleargraphics>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_cleargraphics>:
ret

LLVM IR (-O0):
define void @os_cleargraphics() {
ret void
}

LLVM IR (-O2):
define void @os_cleargraphics() {
ret void
}
void av_packet_free() {}


x86 assembly (clang, -O0):
<av_packet_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_packet_free>:
ret

LLVM IR (-O0):
define void @av_packet_free() {
ret void
}

LLVM IR (-O2):
define void @av_packet_free() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lf();
int /*<<< orphan*/ printS(char const *, char *);
void printSN(const char *s, char *t) {
  printS(s, t);
  lf();
}


x86 assembly (clang, -O0):
<printSN>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <printS@plt>
mov    $0x0,%al
call   1040 <lf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printSN>:
push   %rax
call   1030 <printS@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <lf@plt>

LLVM IR (-O0):
define void @printSN(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @printS(i8* %5, i8* %6)
%8 = call i32 (...) @lf()
ret void
}

LLVM IR (-O2):
define void @printSN(i8* %0, i8* %1) {
%3 = tail call i32 @printS(i8* %0, i8* %1)
%4 = tail call i32 (...) @lf()
ret void
}
/* Variables and functions */
int foo(int);
__attribute__((no)) int bar(int x) { return foo(x) + 1; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <foo@plt>
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
push   %rax
call   1030 <foo@plt>
add    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @bar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @foo(i32 %3)
%5 = add nsw i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @bar(i32 %0) {
%2 = tail call i32 @foo(i32 %0)
%3 = add nsw i32 %2, 1
ret i32 %3
}
/* Variables and functions */
int sv_get_song_bpm(int);
int vox_get_song_bpm(int slot) { return sv_get_song_bpm(slot); }


x86 assembly (clang, -O0):
<vox_get_song_bpm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sv_get_song_bpm@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vox_get_song_bpm>:
jmp    1030 <sv_get_song_bpm@plt>

LLVM IR (-O0):
define i32 @vox_get_song_bpm(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @sv_get_song_bpm(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @vox_get_song_bpm(i32 %0) {
%2 = tail call i32 @sv_get_song_bpm(i32 %0)
ret i32 %2
}
__attribute__((weak)) int _unlink(char *name) { return -1; }


x86 assembly (clang, -O0):
<_unlink>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_unlink>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define weak i32 @_unlink(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 -1
}

LLVM IR (-O2):
define weak i32 @_unlink(i8* %0) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void show_usage() {
  printf(
      "\nhttpd -d homedir [ -i interface ] [ -b addr ] [ -p port ] [ -h ]\n\n");
}


x86 assembly (clang, -O0):
<show_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [68 x i8] c"\0Ahttpd -d homedir [ -i interface ] [ -b addr ] [ -p port ] [ -h ]\0A\0A\00"
define void @show_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([68 x i8], [68 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [67 x i8] c"\0Ahttpd -d homedir [ -i interface ] [ -b addr ] [ -p port ] [ -h ]\0A\00"
define void @show_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([67 x i8], [67 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void print_array(uint32_t str[], size_t size) {
  int i;
  for (i = 0; i < size; i++) {
    printf("%u\n", str[i]);
  }
}


x86 assembly (clang, -O0):
<print_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movslq -0x14(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    115a <print_array+0x4a>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1127 <print_array+0x17>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_array>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %rsi,%rsi
je     1145 <print_array+0x35>
mov    %rsi,%r12
mov    %rdi,%r14
xor    %ebx,%ebx
lea    0xed4(%rip),%r15
nopl   0x0(%rax)
mov    (%r14,%rbx,4),%esi
mov    %r15,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <print_array+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%u\0A\00"
define void @print_array(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = alloca i32
store i32* %0, i32** %3
store i64 %1, i64* %4
store i32 0, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i32, i32* %5
%8 = sext i32 %7 to i64
%9 = load i64, i64* %4
%10 = icmp ult i64 %8, %9
br i1 %10, label %11, label %21
11: ; preds = %6
%12 = load i32*, i32** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
%16 = load i32, i32* %15
%17 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %16)
br label %18
18: ; preds = %11
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %6
21: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%u\0A\00"
define void @print_array(i32* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %11, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %9, %4 ], [ 0, %2 ]
%6 = getelementptr inbounds i32, i32* %0, i64 %5
%7 = load i32, i32* %6
%8 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = add nuw i64 %5, 1
%10 = icmp eq i64 %9, %1
br i1 %10, label %11, label %4
11: ; preds = %4, %2
ret void
}
/* Type definitions */
struct _file_stream {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ fs_write_int(struct _file_stream *, int);
void fs_write_long(struct _file_stream *s, long long i) {
  fs_write_int(s, (int)(i >> 32));
  fs_write_int(s, (int)i);
}


x86 assembly (clang, -O0):
<fs_write_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
sar    $0x20,%rax
mov    %eax,%esi
call   1030 <fs_write_int@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    %eax,%esi
call   1030 <fs_write_int@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fs_write_long>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
shr    $0x20,%rsi
call   1030 <fs_write_int@plt>
mov    %rbx,%rdi
mov    %r14d,%esi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fs_write_int@plt>

LLVM IR (-O0):
%struct._file_stream = type { i32 }
define void @fs_write_long(%struct._file_stream* %0, i64 %1) {
%3 = alloca %struct._file_stream*
%4 = alloca i64
store %struct._file_stream* %0, %struct._file_stream** %3
store i64 %1, i64* %4
%5 = load %struct._file_stream*, %struct._file_stream** %3
%6 = load i64, i64* %4
%7 = ashr i64 %6, 32
%8 = trunc i64 %7 to i32
%9 = call i32 @fs_write_int(%struct._file_stream* %5, i32 %8)
%10 = load %struct._file_stream*, %struct._file_stream** %3
%11 = load i64, i64* %4
%12 = trunc i64 %11 to i32
%13 = call i32 @fs_write_int(%struct._file_stream* %10, i32 %12)
ret void
}

LLVM IR (-O2):
%struct._file_stream = type { i32 }
define void @fs_write_long(%struct._file_stream* %0, i64 %1) {
%3 = lshr i64 %1, 32
%4 = trunc i64 %3 to i32
%5 = tail call i32 @fs_write_int(%struct._file_stream* %0, i32 %4)
%6 = trunc i64 %1 to i32
%7 = tail call i32 @fs_write_int(%struct._file_stream* %0, i32 %6)
ret void
}
void ASN1_digest(void) {}


x86 assembly (clang, -O0):
<ASN1_digest>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_digest>:
ret

LLVM IR (-O0):
define void @ASN1_digest() {
ret void
}

LLVM IR (-O2):
define void @ASN1_digest() {
ret void
}
void dmabuf_sync_profile_collect_single(struct dma_buf *dmabuf,
                                        unsigned int type, unsigned int owner) {
}


x86 assembly (clang, -O0):
<dmabuf_sync_profile_collect_single>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dmabuf_sync_profile_collect_single>:
ret

LLVM IR (-O0):
%struct.dma_buf = type opaque
define void @dmabuf_sync_profile_collect_single(%struct.dma_buf* %0, i32 %1, i32 %2) {
%4 = alloca %struct.dma_buf*
%5 = alloca i32
%6 = alloca i32
store %struct.dma_buf* %0, %struct.dma_buf** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
%struct.dma_buf = type opaque
define void @dmabuf_sync_profile_collect_single(%struct.dma_buf* nocapture %0, i32 %1, i32 %2) {
ret void
}
/* Variables and functions */
int register_generic_scalers();
int vp8_scale_machine_specific_config() { return register_generic_scalers(); }


x86 assembly (clang, -O0):
<vp8_scale_machine_specific_config>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <register_generic_scalers@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vp8_scale_machine_specific_config>:
xor    %eax,%eax
jmp    1030 <register_generic_scalers@plt>

LLVM IR (-O0):
define i32 @vp8_scale_machine_specific_config() {
%1 = call i32 (...) @register_generic_scalers()
ret i32 %1
}

LLVM IR (-O2):
define i32 @vp8_scale_machine_specific_config() {
%1 = tail call i32 (...) @register_generic_scalers()
ret i32 %1
}
/* Variables and functions */
char *getenv(char *);
int /*<<< orphan*/ strncpy(char *, char *, int);
void ipm_get_job_user(char *user, int len) {
  char *s = 0;
  s = getenv("USER");
  if (s) {
    strncpy(user, s, len);
  } else {
    strncpy(user, "unknown", len);
  }
}


x86 assembly (clang, -O0):
<ipm_get_job_user>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movq   $0x0,-0x18(%rbp)
lea    0xec2(%rip),%rdi
call   1030 <getenv@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1167 <ipm_get_job_user+0x47>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1040 <strncpy@plt>
jmp    117a <ipm_get_job_user+0x5a>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
lea    0xe90(%rip),%rsi
call   1040 <strncpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipm_get_job_user>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
lea    0xed1(%rip),%rdi
call   1030 <getenv@plt>
test   %rax,%rax
je     1141 <ipm_get_job_user+0x21>
mov    %rbx,%rdi
mov    %rax,%rsi
jmp    114b <ipm_get_job_user+0x2b>
lea    0xebd(%rip),%rsi
mov    %rbx,%rdi
mov    %ebp,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <strncpy@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"USER\00"
@.str.1 = [8 x i8] c"unknown\00"
define void @ipm_get_job_user(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
store i8* null, i8** %5
%6 = call i8* @getenv(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
store i8* %6, i8** %5
%7 = load i8*, i8** %5
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %14
9: ; preds = %2
%10 = load i8*, i8** %3
%11 = load i8*, i8** %5
%12 = load i32, i32* %4
%13 = call i32 @strncpy(i8* %10, i8* %11, i32 %12)
br label %18
14: ; preds = %2
%15 = load i8*, i8** %3
%16 = load i32, i32* %4
%17 = call i32 @strncpy(i8* %15, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32 %16)
br label %18
18: ; preds = %14, %9
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"USER\00"
@.str.1 = [8 x i8] c"unknown\00"
define void @ipm_get_job_user(i8* %0, i32 %1) {
%3 = tail call i8* @getenv(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @strncpy(i8* %0, i8* %3, i32 %1)
br label %9
7: ; preds = %2
%8 = tail call i32 @strncpy(i8* %0, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32 %1)
br label %9
9: ; preds = %7, %5
ret void
}
int Px_GetNumMixers(void *pa_stream) { return 0; }


x86 assembly (clang, -O0):
<Px_GetNumMixers>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Px_GetNumMixers>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Px_GetNumMixers(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @Px_GetNumMixers(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ calc_nbody_accel();
int /*<<< orphan*/ check_close_bodies_all();
void universe_process(void) {
  calc_nbody_accel();
  check_close_bodies_all();
}


x86 assembly (clang, -O0):
<universe_process>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <calc_nbody_accel@plt>
mov    $0x0,%al
call   1030 <check_close_bodies_all@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<universe_process>:
push   %rax
xor    %eax,%eax
call   1040 <calc_nbody_accel@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <check_close_bodies_all@plt>

LLVM IR (-O0):
define void @universe_process() {
%1 = call i32 (...) @calc_nbody_accel()
%2 = call i32 (...) @check_close_bodies_all()
ret void
}

LLVM IR (-O2):
define void @universe_process() {
%1 = tail call i32 (...) @calc_nbody_accel()
%2 = tail call i32 (...) @check_close_bodies_all()
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int int64_t;

/* Variables and functions */
int64_t __hsail_bitextract_s64(int64_t src0, uint32_t src1, uint32_t src2) {
  uint32_t offset = src1 & (sizeof(int64_t) * 8 - 1);
  uint32_t width = src2 & (sizeof(int64_t) * 8 - 1);
  if (width == 0)
    return 0;
  else
    return (src0 << (sizeof(int64_t) * 8 - width - offset)) >>
           (sizeof(int64_t) * 8 - width);
}


x86 assembly (clang, -O0):
<__hsail_bitextract_s64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movslq -0xc(%rbp),%rax
and    $0x1f,%rax
mov    %eax,-0x14(%rbp)
movslq -0x10(%rbp),%rax
and    $0x1f,%rax
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jne    1139 <__hsail_bitextract_s64+0x39>
movl   $0x0,-0x4(%rbp)
jmp    1162 <__hsail_bitextract_s64+0x62>
mov    -0x8(%rbp),%eax
movslq -0x18(%rbp),%rdx
mov    $0x20,%ecx
sub    %rdx,%rcx
movslq -0x14(%rbp),%rdx
sub    %rdx,%rcx
shl    %cl,%eax
movslq -0x18(%rbp),%rdx
mov    $0x20,%ecx
sub    %rdx,%rcx
sar    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__hsail_bitextract_s64>:
and    $0x1f,%edx
je     111c <__hsail_bitextract_s64+0x1c>
mov    %edi,%eax
and    $0x1f,%esi
mov    $0x20,%ecx
sub    %edx,%ecx
sub    %esi,%ecx
shl    %cl,%eax
neg    %edx
mov    %edx,%ecx
sar    %cl,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__hsail_bitextract_s64(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%10 = load i32, i32* %6
%11 = sext i32 %10 to i64
%12 = and i64 %11, 31
%13 = trunc i64 %12 to i32
store i32 %13, i32* %8
%14 = load i32, i32* %7
%15 = sext i32 %14 to i64
%16 = and i64 %15, 31
%17 = trunc i64 %16 to i32
store i32 %17, i32* %9
%18 = load i32, i32* %9
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %3
store i32 0, i32* %4
br label %36
21: ; preds = %3
%22 = load i32, i32* %5
%23 = load i32, i32* %9
%24 = sext i32 %23 to i64
%25 = sub i64 32, %24
%26 = load i32, i32* %8
%27 = sext i32 %26 to i64
%28 = sub i64 %25, %27
%29 = trunc i64 %28 to i32
%30 = shl i32 %22, %29
%31 = load i32, i32* %9
%32 = sext i32 %31 to i64
%33 = sub i64 32, %32
%34 = trunc i64 %33 to i32
%35 = ashr i32 %30, %34
store i32 %35, i32* %4
br label %36
36: ; preds = %21, %20
%37 = load i32, i32* %4
ret i32 %37
}

LLVM IR (-O2):
define i32 @__hsail_bitextract_s64(i32 %0, i32 %1, i32 %2) {
%4 = and i32 %2, 31
%5 = icmp eq i32 %4, 0
br i1 %5, label %12, label %6
6: ; preds = %3
%7 = and i32 %1, 31
%8 = sub nuw nsw i32 32, %4
%9 = sub nsw i32 %8, %7
%10 = shl i32 %0, %9
%11 = ashr i32 %10, %8
br label %12
12: ; preds = %3, %6
%13 = phi i32 [ %11, %6 ], [ 0, %3 ]
ret i32 %13
}
double dot3(const double v0[3], const double v1[3]) {
  return v0[0] * v1[0] + v0[1] * v1[1] + v0[2] * v1[2];
}


x86 assembly (clang, -O0):
<dot3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x10(%rbp),%rax
mulsd  0x8(%rax),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x10(%rbp),%rax
movsd  0x10(%rax),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dot3>:
movsd  0x8(%rdi),%xmm0
mulsd  0x8(%rsi),%xmm0
movsd  (%rdi),%xmm1
mulsd  (%rsi),%xmm1
addsd  %xmm0,%xmm1
movsd  0x10(%rdi),%xmm0
mulsd  0x10(%rsi),%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @dot3(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = getelementptr inbounds double, double* %5, i64 0
%7 = load double, double* %6
%8 = load double*, double** %4
%9 = getelementptr inbounds double, double* %8, i64 0
%10 = load double, double* %9
%11 = load double*, double** %3
%12 = getelementptr inbounds double, double* %11, i64 1
%13 = load double, double* %12
%14 = load double*, double** %4
%15 = getelementptr inbounds double, double* %14, i64 1
%16 = load double, double* %15
%17 = fmul double %13, %16
%18 = call double @llvm.fmuladd.f64(double %7, double %10, double %17)
%19 = load double*, double** %3
%20 = getelementptr inbounds double, double* %19, i64 2
%21 = load double, double* %20
%22 = load double*, double** %4
%23 = getelementptr inbounds double, double* %22, i64 2
%24 = load double, double* %23
%25 = call double @llvm.fmuladd.f64(double %21, double %24, double %18)
ret double %25
}

LLVM IR (-O2):
define double @dot3(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %0
%4 = load double, double* %1
%5 = getelementptr inbounds double, double* %0, i64 1
%6 = load double, double* %5
%7 = getelementptr inbounds double, double* %1, i64 1
%8 = load double, double* %7
%9 = fmul double %6, %8
%10 = tail call double @llvm.fmuladd.f64(double %3, double %4, double %9)
%11 = getelementptr inbounds double, double* %0, i64 2
%12 = load double, double* %11
%13 = getelementptr inbounds double, double* %1, i64 2
%14 = load double, double* %13
%15 = tail call double @llvm.fmuladd.f64(double %12, double %14, double %10)
ret double %15
}
/* Type definitions */
typedef int /*<<< orphan*/ regex_t;

/* Variables and functions */
int regcomp(int /*<<< orphan*/ *, char const *, int);
char *string_regex_flags(char const *, int, int *);
int string_regcomp(void *preg, const char *regex, int default_flags) {
  const char *ptr_regex;
  int flags;
  if (!regex)
    return -1;
  ptr_regex = string_regex_flags(regex, default_flags, &flags);
  return regcomp((regex_t *)preg, ptr_regex, flags);
}


x86 assembly (clang, -O0):
<string_regcomp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    114a <string_regcomp+0x2a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1171 <string_regcomp+0x51>
mov    -0x18(%rbp),%rdi
mov    -0x1c(%rbp),%esi
lea    -0x2c(%rbp),%rdx
call   1040 <string_regex_flags@plt>
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    -0x2c(%rbp),%edx
call   1030 <regcomp@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_regcomp>:
test   %rsi,%rsi
je     1154 <string_regcomp+0x34>
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0xc(%rsp),%rax
mov    %rsi,%rdi
mov    %edx,%esi
mov    %rax,%rdx
call   1040 <string_regex_flags@plt>
mov    0xc(%rsp),%edx
mov    %rbx,%rdi
mov    %rax,%rsi
call   1030 <regcomp@plt>
add    $0x10,%rsp
pop    %rbx
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @string_regcomp(i8* %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%10 = load i8*, i8** %6
%11 = icmp ne i8* %10, null
br i1 %11, label %13, label %12
12: ; preds = %3
store i32 -1, i32* %4
br label %22
13: ; preds = %3
%14 = load i8*, i8** %6
%15 = load i32, i32* %7
%16 = call i8* @string_regex_flags(i8* %14, i32 %15, i32* %9)
store i8* %16, i8** %8
%17 = load i8*, i8** %5
%18 = bitcast i8* %17 to i32*
%19 = load i8*, i8** %8
%20 = load i32, i32* %9
%21 = call i32 @regcomp(i32* %18, i8* %19, i32 %20)
store i32 %21, i32* %4
br label %22
22: ; preds = %13, %12
%23 = load i32, i32* %4
ret i32 %23
}

LLVM IR (-O2):
define i32 @string_regcomp(i8* %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = bitcast i32* %4 to i8*
%6 = icmp eq i8* %1, null
br i1 %6, label %12, label %7
7: ; preds = %3
%8 = call i8* @string_regex_flags(i8* %1, i32 %2, i32* %4)
%9 = bitcast i8* %0 to i32*
%10 = load i32, i32* %4
%11 = call i32 @regcomp(i32* %9, i8* %8, i32 %10)
br label %12
12: ; preds = %3, %7
%13 = phi i32 [ %11, %7 ], [ -1, %3 ]
ret i32 %13
}
/* Variables and functions */
double abs(scalar_t__);
scalar_t__ simulate(int);
int test_simulate() { return abs(simulate(1000) - 1.0) < 0.001; }


x86 assembly (clang, -O0):
<test_simulate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3e8,%edi
call   1040 <simulate@plt>
cvtsi2sd %rax,%xmm0
movsd  0xecd(%rip),%xmm1
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rdi
call   1030 <abs@plt>
movaps %xmm0,%xmm1
movsd  0xeac(%rip),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_simulate>:
push   %rax
mov    $0x3e8,%edi
call   1040 <simulate@plt>
cvtsi2sd %rax,%xmm0
addsd  0xec8(%rip),%xmm0
cvttsd2si %xmm0,%rdi
call   1030 <abs@plt>
movsd  0xebe(%rip),%xmm1
xor    %eax,%eax
ucomisd %xmm0,%xmm1
seta   %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @test_simulate() {
%1 = call i64 @simulate(i32 1000)
%2 = sitofp i64 %1 to double
%3 = fsub double %2, 1.000000e+00
%4 = fptosi double %3 to i64
%5 = call double @abs(i64 %4)
%6 = fcmp olt double %5, 1.000000e-03
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_simulate() {
%1 = tail call i64 @simulate(i32 1000)
%2 = sitofp i64 %1 to double
%3 = fadd double %2, -1.000000e+00
%4 = fptosi double %3 to i64
%5 = tail call double @abs(i64 %4)
%6 = fcmp olt double %5, 1.000000e-03
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int SerialAPI_request(unsigned char *, int);
int ZW_EnableSUC(unsigned char state, unsigned char cap) {
  unsigned char buf[255];
  buf[0] = 0x00;
  buf[1] = 0x52;
  buf[2] = state;
  buf[3] = cap;
  return SerialAPI_request(buf, 4);
}


x86 assembly (clang, -O0):
<ZW_EnableSUC>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movb   $0x0,-0x110(%rbp)
movb   $0x52,-0x10f(%rbp)
mov    -0x1(%rbp),%al
mov    %al,-0x10e(%rbp)
mov    -0x2(%rbp),%al
mov    %al,-0x10d(%rbp)
lea    -0x110(%rbp),%rdi
mov    $0x4,%esi
call   1030 <SerialAPI_request@plt>
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZW_EnableSUC>:
sub    $0x108,%rsp
movw   $0x5200,(%rsp)
mov    %dil,0x2(%rsp)
mov    %sil,0x3(%rsp)
mov    %rsp,%rdi
mov    $0x4,%esi
call   1030 <SerialAPI_request@plt>
add    $0x108,%rsp
ret

LLVM IR (-O0):
define i32 @ZW_EnableSUC(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca [255 x i8]
store i8 %0, i8* %3
store i8 %1, i8* %4
%6 = getelementptr inbounds [255 x i8], [255 x i8]* %5, i64 0, i64 0
store i8 0, i8* %6
%7 = getelementptr inbounds [255 x i8], [255 x i8]* %5, i64 0, i64 1
store i8 82, i8* %7
%8 = load i8, i8* %3
%9 = getelementptr inbounds [255 x i8], [255 x i8]* %5, i64 0, i64 2
store i8 %8, i8* %9
%10 = load i8, i8* %4
%11 = getelementptr inbounds [255 x i8], [255 x i8]* %5, i64 0, i64 3
store i8 %10, i8* %11
%12 = getelementptr inbounds [255 x i8], [255 x i8]* %5, i64 0, i64 0
%13 = call i32 @SerialAPI_request(i8* %12, i32 4)
ret i32 %13
}

LLVM IR (-O2):
define i32 @ZW_EnableSUC(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca [255 x i8]
%4 = getelementptr inbounds [255 x i8], [255 x i8]* %3, i64 0, i64 0
store i8 0, i8* %4
%5 = getelementptr inbounds [255 x i8], [255 x i8]* %3, i64 0, i64 1
store i8 82, i8* %5
%6 = getelementptr inbounds [255 x i8], [255 x i8]* %3, i64 0, i64 2
store i8 %0, i8* %6
%7 = getelementptr inbounds [255 x i8], [255 x i8]* %3, i64 0, i64 3
store i8 %1, i8* %7
%8 = call i32 @SerialAPI_request(i8* %4, i32 4)
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ begin_game(int /*<<< orphan*/);
int /*<<< orphan*/ scanf(char *, int /*<<< orphan*/ *);
int main() {
  uint32_t boardSize;
  scanf("%u%*c", &boardSize);
  begin_game(boardSize);
  return (EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1030 <begin_game@plt>
mov    0x2e92(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%edi
call   1030 <begin_game@plt>
mov    0x2e9e(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%u%*c\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = call i32 @begin_game(i32 %4)
%6 = load i32, i32* @EXIT_SUCCESS
ret i32 %6
}

LLVM IR (-O2):
@.str = [6 x i8] c"%u%*c\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @begin_game(i32 %4)
%6 = load i32, i32* @EXIT_SUCCESS
ret i32 %6
}
void RobotRunFast(struct Context *context) { ; }


x86 assembly (clang, -O0):
<RobotRunFast>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RobotRunFast>:
ret

LLVM IR (-O0):
%struct.Context = type opaque
define void @RobotRunFast(%struct.Context* %0) {
%2 = alloca %struct.Context*
store %struct.Context* %0, %struct.Context** %2
ret void
}

LLVM IR (-O2):
%struct.Context = type opaque
define void @RobotRunFast(%struct.Context* nocapture %0) {
ret void
}
/* Type definitions */
struct dirent {
  int dummy;
};
struct DIR {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
struct dirent *readdir(struct DIR *dirp) {
  errno = ENOSYS;
  return NULL;
}


x86 assembly (clang, -O0):
<readdir>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ed9(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec0(%rip),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readdir>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.dirent = type { i32 }
%struct.DIR = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define %struct.dirent* @readdir(%struct.DIR* %0) {
%2 = alloca %struct.DIR*
store %struct.DIR* %0, %struct.DIR** %2
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret %struct.dirent* null
}

LLVM IR (-O2):
%struct.dirent = type { i32 }
%struct.DIR = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define noalias %struct.dirent* @readdir(%struct.DIR* nocapture readnone %0) {
%2 = load i32, i32* @ENOSYS
store i32 %2, i32* @errno
ret %struct.dirent* null
}
/* Variables and functions */
int /*<<< orphan*/ def_section(char *, int);
void def_data(int attr) { def_section("DATA", attr); }


x86 assembly (clang, -O0):
<def_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <def_section@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<def_data>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <def_section@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"DATA\00"
define void @def_data(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @def_section(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"DATA\00"
define void @def_data(i32 %0) {
%2 = tail call i32 @def_section(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
void ShellCommand(command) char *command;
{ ExecShellCommand(command, 1); }


x86 assembly (clang, -O0):
<ShellCommand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
mov    $0x0,%al
call   1030 <ExecShellCommand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ShellCommand>:
mov    $0x1,%esi
xor    %eax,%eax
jmp    1030 <ExecShellCommand@plt>

LLVM IR (-O0):
define void @ShellCommand(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @ExecShellCommand to i32 (i8*, i32, ...)*)(i8* %3, i32 1)
ret void
}

LLVM IR (-O2):
define void @ShellCommand(i8* %0) {
%2 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @ExecShellCommand to i32 (i8*, i32, ...)*)(i8* %0, i32 1)
ret void
}
/* Variables and functions */
int f();
int f6() {
  int a = 42;
  int b = 35;
  a = f();
  b = f();
  if (a < 0)
    return a;
  return 1;
}


x86 assembly (clang, -O0):
<f6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x2a,-0x8(%rbp)
movl   $0x23,-0xc(%rbp)
mov    $0x0,%al
call   1030 <f@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <f@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    114f <f6+0x3f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1156 <f6+0x46>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f6>:
push   %rbx
xor    %eax,%eax
call   1030 <f@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <f@plt>
test   %ebx,%ebx
mov    $0x1,%eax
cmovs  %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @f6() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 42, i32* %2
store i32 35, i32* %3
%4 = call i32 (...) @f()
store i32 %4, i32* %2
%5 = call i32 (...) @f()
store i32 %5, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %0
%9 = load i32, i32* %2
store i32 %9, i32* %1
br label %11
10: ; preds = %0
store i32 1, i32* %1
br label %11
11: ; preds = %10, %8
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
define i32 @f6() {
%1 = tail call i32 (...) @f()
%2 = tail call i32 (...) @f()
%3 = icmp slt i32 %1, 0
%4 = select i1 %3, i32 %1, i32 1
ret i32 %4
}
/* Variables and functions */
void *malloc(unsigned int);
void *zalloc(void *x, unsigned items, unsigned size) {
  void *p;
  size *= items;
  size = (size + 16 - 1) & ~(16 - 1);
  p = malloc(size);
  return (p);
}


x86 assembly (clang, -O0):
<zalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
imul   -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%eax
sub    $0x1,%eax
and    $0xfffffff0,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%edi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zalloc>:
imul   %edx,%esi
lea    0xf(%rsi),%edi
and    $0xfffffff0,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @zalloc(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = mul i32 %9, %8
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = add i32 %11, 16
%13 = sub i32 %12, 1
%14 = and i32 %13, -16
store i32 %14, i32* %6
%15 = load i32, i32* %6
%16 = call i8* @malloc(i32 %15)
store i8* %16, i8** %7
%17 = load i8*, i8** %7
ret i8* %17
}

LLVM IR (-O2):
define noalias i8* @zalloc(i8* nocapture readnone %0, i32 %1, i32 %2) {
%4 = mul i32 %2, %1
%5 = add i32 %4, 15
%6 = and i32 %5, -16
%7 = tail call i8* @malloc(i32 %6)
ret i8* %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void handleConnectRequest() { printf("Function unimplemented!\n"); }


x86 assembly (clang, -O0):
<handleConnectRequest>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<handleConnectRequest>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"Function unimplemented!\0A\00"
define void @handleConnectRequest() {
%1 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [24 x i8] c"Function unimplemented!\00"
define void @handleConnectRequest() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str, i64 0, i64 0))
ret void
}