xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ ngen(char *, char *, int);
void cgdefc(int c) { ngen("%s\t'%c'", "db", c); }


x86 assembly (clang, -O0):
<cgdefc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xedb(%rip),%rdi
lea    0xedc(%rip),%rsi
call   1030 <ngen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgdefc>:
mov    %edi,%edx
lea    0xee7(%rip),%rdi
lea    0xee8(%rip),%rsi
jmp    1030 <ngen@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"%s\09'%c'\00"
@.str.1 = [3 x i8] c"db\00"
define void @cgdefc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ngen(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"%s\09'%c'\00"
@.str.1 = [3 x i8] c"db\00"
define void @cgdefc(i32 %0) {
%2 = tail call i32 @ngen(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void hello_word() { printf("Hello World!"); }


x86 assembly (clang, -O0):
<hello_word>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hello_word>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"Hello World!\00"
define void @hello_word() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hello World!\00"
define void @hello_word() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}
void foo_2_1_1_1_1_1_2_1_1() {}


x86 assembly (clang, -O0):
<foo_2_1_1_1_1_1_2_1_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_1_1_1_1_1_2_1_1>:
ret

LLVM IR (-O0):
define void @foo_2_1_1_1_1_1_2_1_1() {
ret void
}

LLVM IR (-O2):
define void @foo_2_1_1_1_1_1_2_1_1() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ panic(char *, int /*<<< orphan*/ *);
int putchar(int);
int /*<<< orphan*/ *stderr;
int /*<<< orphan*/ *stdout;
int putc(int ch, FILE *stream) {
  if (stream != stderr && stream != stdout) {
    panic("putc stream = %p", stream);
  } else {
    return putchar(ch);
  }
  return -1;
}


x86 assembly (clang, -O0):
<putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x2ea6(%rip),%rcx
cmp    (%rcx),%rax
je     116c <putc+0x4c>
mov    -0x10(%rbp),%rax
mov    0x2e8a(%rip),%rcx
cmp    (%rcx),%rax
je     116c <putc+0x4c>
mov    -0x10(%rbp),%rsi
lea    0xe9e(%rip),%rdi
call   1040 <panic@plt>
jmp    117c <putc+0x5c>
mov    -0x8(%rbp),%edi
call   1030 <putchar@plt>
mov    %eax,-0x4(%rbp)
jmp    1183 <putc+0x63>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putc>:
push   %rax
mov    0x2eb8(%rip),%rax
cmp    %rsi,(%rax)
je     114c <putc+0x2c>
mov    0x2ea4(%rip),%rax
cmp    %rsi,(%rax)
je     114c <putc+0x2c>
lea    0xec0(%rip),%rdi
call   1040 <panic@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret
pop    %rax
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@stderr = global i32* null
@stdout = global i32* null
@.str = [17 x i8] c"putc stream = %p\00"
define i32 @putc(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
%6 = load i32*, i32** %5
%7 = load i32*, i32** @stderr
%8 = icmp ne i32* %6, %7
br i1 %8, label %9, label %16
9: ; preds = %2
%10 = load i32*, i32** %5
%11 = load i32*, i32** @stdout
%12 = icmp ne i32* %10, %11
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = load i32*, i32** %5
%15 = call i32 @panic(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32* %14)
br label %19
16: ; preds = %9, %2
%17 = load i32, i32* %4
%18 = call i32 @putchar(i32 %17)
store i32 %18, i32* %3
br label %20
19: ; preds = %13
store i32 -1, i32* %3
br label %20
20: ; preds = %19, %16
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
@stderr = global i32* null
@stdout = global i32* null
@.str = [17 x i8] c"putc stream = %p\00"
define i32 @putc(i32 %0, i32* %1) {
%3 = load i32*, i32** @stderr
%4 = icmp eq i32* %3, %1
%5 = load i32*, i32** @stdout
%6 = icmp eq i32* %5, %1
%7 = select i1 %4, i1 true, i1 %6
br i1 %7, label %10, label %8
8: ; preds = %2
%9 = tail call i32 @panic(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32* %1)
br label %12
10: ; preds = %2
%11 = tail call i32 @putchar(i32 %0)
br label %12
12: ; preds = %8, %10
%13 = phi i32 [ -1, %8 ], [ %11, %10 ]
ret i32 %13
}
int test_imm_71uint8_mem(unsigned char *val) {
  return ((*val) & (0x71 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_71uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0x71,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_71uint8_mem>:
testb  $0x71,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_71uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 113
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_71uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 113
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void gf8mul_00000010(void) {
  __asm__ __volatile__("\tpxor    %xmm7, %xmm6\n"
                       "\tpxor    %xmm7, %xmm5\n"
                       "\tpxor    %xmm7, %xmm4\n"
                       "\tpxor    %xmm7, %xmm0\n"
                       "\tpxor    %xmm6, %xmm7\n"
                       "\tpxor    %xmm7, %xmm6\n"
                       "\tpxor    %xmm5, %xmm6\n"
                       "\tpxor    %xmm6, %xmm5\n"
                       "\tpxor    %xmm4, %xmm5\n"
                       "\tpxor    %xmm5, %xmm4\n"
                       "\tpxor    %xmm3, %xmm4\n"
                       "\tpxor    %xmm4, %xmm3\n"
                       "\tpxor    %xmm2, %xmm3\n"
                       "\tpxor    %xmm3, %xmm2\n"
                       "\tpxor    %xmm1, %xmm2\n"
                       "\tpxor    %xmm2, %xmm1\n"
                       "\tpxor    %xmm0, %xmm1\n"
                       "\tpxor    %xmm1, %xmm0\n");
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pxor   %xmm7,%xmm6
pxor   %xmm7,%xmm5
pxor   %xmm7,%xmm4
pxor   %xmm7,%xmm0
pxor   %xmm6,%xmm7
pxor   %xmm7,%xmm6
pxor   %xmm5,%xmm6
pxor   %xmm6,%xmm5
pxor   %xmm4,%xmm5
pxor   %xmm5,%xmm4
pxor   %xmm3,%xmm4
pxor   %xmm4,%xmm3
pxor   %xmm2,%xmm3
pxor   %xmm3,%xmm2
pxor   %xmm1,%xmm2
pxor   %xmm2,%xmm1
pxor   %xmm0,%xmm1
pxor   %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
pxor   %xmm7,%xmm6
pxor   %xmm7,%xmm5
pxor   %xmm7,%xmm4
pxor   %xmm7,%xmm0
pxor   %xmm6,%xmm7
pxor   %xmm7,%xmm6
pxor   %xmm5,%xmm6
pxor   %xmm6,%xmm5
pxor   %xmm4,%xmm5
pxor   %xmm5,%xmm4
pxor   %xmm3,%xmm4
pxor   %xmm4,%xmm3
pxor   %xmm2,%xmm3
pxor   %xmm3,%xmm2
pxor   %xmm1,%xmm2
pxor   %xmm2,%xmm1
pxor   %xmm0,%xmm1
pxor   %xmm1,%xmm0
ret

LLVM IR (-O0):
define void @gf8mul_00000010() {
ret void
}

LLVM IR (-O2):
define void @gf8mul_00000010() {
tail call void asm sideeffect "\09pxor %xmm7, %xmm6\0A\09pxor %xmm7, %xmm5\0A\09pxor %xmm7, %xmm4\0A\09pxor %xmm7, %xmm0\0A\09pxor %xmm6, %xmm7\0A\09pxor %xmm7, %xmm6\0A\09pxor %xmm5, %xmm6\0A\09pxor %xmm6, %xmm5\0A\09pxor %xmm4, %xmm5\0A\09pxor %xmm5, %xmm4\0A\09pxor %xmm3, %xmm4\0A\09pxor %xmm4, %xmm3\0A\09pxor %xmm2, %xmm3\0A\09pxor %xmm3, %xmm2\0A\09pxor %xmm1, %xmm2\0A\09pxor %xmm2, %xmm1\0A\09pxor %xmm0, %xmm1\0A\09pxor %xmm1, %xmm0\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fmt_02u(unsigned int);
void fmt_04u(unsigned n) {
  fmt_02u(n / 100);
  fmt_02u(n % 100);
}


x86 assembly (clang, -O0):
<fmt_04u>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,%edi
call   1030 <fmt_02u@plt>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%edi
call   1030 <fmt_02u@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmt_04u>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
mov    %edi,%eax
imul   $0x51eb851f,%rax,%rbx
shr    $0x25,%rbx
mov    %ebx,%edi
call   1030 <fmt_02u@plt>
imul   $0x64,%ebx,%eax
sub    %eax,%ebp
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <fmt_02u@plt>

LLVM IR (-O0):
define void @fmt_04u(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = udiv i32 %3, 100
%5 = call i32 @fmt_02u(i32 %4)
%6 = load i32, i32* %2
%7 = urem i32 %6, 100
%8 = call i32 @fmt_02u(i32 %7)
ret void
}

LLVM IR (-O2):
define void @fmt_04u(i32 %0) {
%2 = udiv i32 %0, 100
%3 = tail call i32 @fmt_02u(i32 %2)
%4 = urem i32 %0, 100
%5 = tail call i32 @fmt_02u(i32 %4)
ret void
}
void __DELETE_java_util_Properties(void *me, void *client_data) {}


x86 assembly (clang, -O0):
<__DELETE_java_util_Properties>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__DELETE_java_util_Properties>:
ret

LLVM IR (-O0):
define void @__DELETE_java_util_Properties(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @__DELETE_java_util_Properties(i8* nocapture %0, i8* nocapture %1) {
ret void
}
int adis16201_probe_trigger(struct iio_dev *indio_dev) { return 0; }


x86 assembly (clang, -O0):
<adis16201_probe_trigger>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adis16201_probe_trigger>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.iio_dev = type opaque
define i32 @adis16201_probe_trigger(%struct.iio_dev* %0) {
%2 = alloca %struct.iio_dev*
store %struct.iio_dev* %0, %struct.iio_dev** %2
ret i32 0
}

LLVM IR (-O2):
%struct.iio_dev = type opaque
define i32 @adis16201_probe_trigger(%struct.iio_dev* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ check_overflow_size_t(size_t, size_t);
void *sr_malloc(size_t);
void *sr_malloc_array(size_t elems, size_t elem_size) {
  check_overflow_size_t(elems, elem_size);
  return sr_malloc(elems * elem_size);
}


x86 assembly (clang, -O0):
<sr_malloc_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <check_overflow_size_t@plt>
mov    -0x8(%rbp),%rdi
imul   -0x10(%rbp),%rdi
call   1030 <sr_malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sr_malloc_array>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
call   1040 <check_overflow_size_t@plt>
imul   %r14,%rbx
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <sr_malloc@plt>

LLVM IR (-O0):
define i8* @sr_malloc_array(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i32 @check_overflow_size_t(i64 %5, i64 %6)
%8 = load i64, i64* %3
%9 = load i64, i64* %4
%10 = mul i64 %8, %9
%11 = call i8* @sr_malloc(i64 %10)
ret i8* %11
}

LLVM IR (-O2):
define i8* @sr_malloc_array(i64 %0, i64 %1) {
%3 = tail call i32 @check_overflow_size_t(i64 %0, i64 %1)
%4 = mul i64 %1, %0
%5 = tail call i8* @sr_malloc(i64 %4)
ret i8* %5
}
/* Variables and functions */
int sas_rle_is_insert_run(unsigned char last_byte, size_t insert_run) {
  if (last_byte == '@' || last_byte == ' ' || last_byte == '\0')
    return (insert_run > 1);
  return (insert_run > 2);
}


x86 assembly (clang, -O0):
<sas_rle_is_insert_run>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    %rsi,-0x10(%rbp)
movzbl -0x5(%rbp),%eax
cmp    $0x40,%eax
je     1135 <sas_rle_is_insert_run+0x35>
movzbl -0x5(%rbp),%eax
cmp    $0x20,%eax
je     1135 <sas_rle_is_insert_run+0x35>
movzbl -0x5(%rbp),%eax
cmp    $0x0,%eax
jne    114a <sas_rle_is_insert_run+0x4a>
cmpq   $0x1,-0x10(%rbp)
seta   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    115a <sas_rle_is_insert_run+0x5a>
cmpq   $0x2,-0x10(%rbp)
seta   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sas_rle_is_insert_run>:
mov    $0x1,%ecx
test   %edi,%edi
je     111a <sas_rle_is_insert_run+0x1a>
cmp    $0x20,%dil
je     111a <sas_rle_is_insert_run+0x1a>
cmp    $0x40,%dil
je     111a <sas_rle_is_insert_run+0x1a>
mov    $0x2,%ecx
xor    %eax,%eax
cmp    %rsi,%rcx
setb   %al
ret

LLVM IR (-O0):
define i32 @sas_rle_is_insert_run(i8 zeroext %0, i64 %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i64
store i8 %0, i8* %4
store i64 %1, i64* %5
%6 = load i8, i8* %4
%7 = zext i8 %6 to i32
%8 = icmp eq i32 %7, 64
br i1 %8, label %17, label %9
9: ; preds = %2
%10 = load i8, i8* %4
%11 = zext i8 %10 to i32
%12 = icmp eq i32 %11, 32
br i1 %12, label %17, label %13
13: ; preds = %9
%14 = load i8, i8* %4
%15 = zext i8 %14 to i32
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %21
17: ; preds = %13, %9, %2
%18 = load i64, i64* %5
%19 = icmp ugt i64 %18, 1
%20 = zext i1 %19 to i32
store i32 %20, i32* %3
br label %25
21: ; preds = %13
%22 = load i64, i64* %5
%23 = icmp ugt i64 %22, 2
%24 = zext i1 %23 to i32
store i32 %24, i32* %3
br label %25
25: ; preds = %21, %17
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @sas_rle_is_insert_run(i8 zeroext %0, i64 %1) {
switch i8 %0, label %3 [
i8 64, label %4
i8 32, label %4
i8 0, label %4
]
3: ; preds = %2
br label %4
4: ; preds = %2, %2, %2, %3
%5 = phi i64 [ 2, %3 ], [ 1, %2 ], [ 1, %2 ], [ 1, %2 ]
%6 = icmp ult i64 %5, %1
%7 = zext i1 %6 to i32
ret i32 %7
}
void testStaticList() {}


x86 assembly (clang, -O0):
<testStaticList>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testStaticList>:
ret

LLVM IR (-O0):
define void @testStaticList() {
ret void
}

LLVM IR (-O2):
define void @testStaticList() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  printf("Hello world of git !!!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [24 x i8] c"Hello world of git !!!\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [23 x i8] c"Hello world of git !!!\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
ret i32 0
}
void *_gk_ga_clone(void *dna) {
  unsigned int *clone = (unsigned int *)malloc(sizeof(unsigned int));
  *clone = *((unsigned int *)dna);
  return clone;
}


x86 assembly (clang, -O0):
<_gk_ga_clone>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_gk_ga_clone>:
push   %rbx
mov    %rdi,%rbx
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    (%rbx),%ecx
mov    %ecx,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define i8* @_gk_ga_clone(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = call i8* @malloc(i64 4)
%5 = bitcast i8* %4 to i32*
store i32* %5, i32** %3
%6 = load i8*, i8** %2
%7 = bitcast i8* %6 to i32*
%8 = load i32, i32* %7
%9 = load i32*, i32** %3
store i32 %8, i32* %9
%10 = load i32*, i32** %3
%11 = bitcast i32* %10 to i8*
ret i8* %11
}

LLVM IR (-O2):
define noalias i8* @_gk_ga_clone(i8* nocapture %0) {
%2 = tail call dereferenceable_or_null(4) i8* @malloc(i64 4)
%3 = bitcast i8* %2 to i32*
%4 = bitcast i8* %0 to i32*
%5 = load i32, i32* %4
store i32 %5, i32* %3
ret i8* %2
}
void value_node_free(void *valp) {}


x86 assembly (clang, -O0):
<value_node_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<value_node_free>:
ret

LLVM IR (-O0):
define void @value_node_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @value_node_free(i8* nocapture %0) {
ret void
}
/* Variables and functions */
char tolower(char);
void lower(char *str) {
  char *c;
  for (c = str; *c; c++)
    *c = tolower(*c);
}


x86 assembly (clang, -O0):
<lower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1156 <lower+0x46>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <tolower@plt>
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1124 <lower+0x14>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lower>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1136 <lower+0x26>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <tolower@plt>
mov    %al,-0x1(%rbx)
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <lower+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @lower(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %14, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = call signext i8 @tolower(i8 signext %11)
%13 = load i8*, i8** %3
store i8 %12, i8* %13
br label %14
14: ; preds = %9
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
br label %5
17: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @lower(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = tail call signext i8 @tolower(i8 signext %5)
store i8 %7, i8* %6
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
void foo811(int p) {}


x86 assembly (clang, -O0):
<foo811>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo811>:
ret

LLVM IR (-O0):
define void @foo811(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo811(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ addbyte(int);
void LOAD_EA() {
  addbyte(0x8b);
  addbyte(0x44);
  addbyte(0x24);
  addbyte(12);
}


x86 assembly (clang, -O0):
<LOAD_EA>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8b,%edi
call   1030 <addbyte@plt>
mov    $0x44,%edi
call   1030 <addbyte@plt>
mov    $0x24,%edi
call   1030 <addbyte@plt>
mov    $0xc,%edi
call   1030 <addbyte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LOAD_EA>:
push   %rax
mov    $0x8b,%edi
call   1030 <addbyte@plt>
mov    $0x44,%edi
call   1030 <addbyte@plt>
mov    $0x24,%edi
call   1030 <addbyte@plt>
mov    $0xc,%edi
pop    %rax
jmp    1030 <addbyte@plt>

LLVM IR (-O0):
define void @LOAD_EA() {
%1 = call i32 @addbyte(i32 139)
%2 = call i32 @addbyte(i32 68)
%3 = call i32 @addbyte(i32 36)
%4 = call i32 @addbyte(i32 12)
ret void
}

LLVM IR (-O2):
define void @LOAD_EA() {
%1 = tail call i32 @addbyte(i32 139)
%2 = tail call i32 @addbyte(i32 68)
%3 = tail call i32 @addbyte(i32 36)
%4 = tail call i32 @addbyte(i32 12)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo(int, int);
int main(void) {
  foo(1, 1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%esi
mov    %esi,%edi
call   1030 <foo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
mov    $0x1,%esi
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @foo(i32 1, i32 1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @foo(i32 1, i32 1)
ret i32 0
}
int translateElementDirection(int elementDirection) {
  int newDirection;
  if ((elementDirection == 0) || (elementDirection == 2))
    newDirection = 0;
  else
    newDirection = 1;
  return newDirection;
}


x86 assembly (clang, -O0):
<translateElementDirection>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     111b <translateElementDirection+0x1b>
cmpl   $0x2,-0x4(%rbp)
jne    1127 <translateElementDirection+0x27>
movl   $0x0,-0x8(%rbp)
jmp    112e <translateElementDirection+0x2e>
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<translateElementDirection>:
xor    %eax,%eax
test   $0xfffffffd,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @translateElementDirection(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp eq i32 %7, 2
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 0, i32* %3
br label %11
10: ; preds = %6
store i32 1, i32* %3
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @translateElementDirection(i32 %0) {
%2 = and i32 %0, -3
%3 = icmp ne i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t WORD(uint8_t lo, uint8_t hi) {
  return ((hi & 0xFF) << 8) | ((lo & 0xFF) << 0);
}


x86 assembly (clang, -O0):
<WORD>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xff,%eax
shl    $0x8,%eax
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
shl    $0x0,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<WORD>:
shl    $0x8,%esi
movzwl %si,%ecx
movzbl %dil,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @WORD(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 255
%7 = shl i32 %6, 8
%8 = load i32, i32* %3
%9 = and i32 %8, 255
%10 = shl i32 %9, 0
%11 = or i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @WORD(i32 %0, i32 %1) {
%3 = shl i32 %1, 8
%4 = and i32 %3, 65280
%5 = and i32 %0, 255
%6 = or i32 %4, %5
ret i32 %6
}
/* Variables and functions */
int utmpname(char const *);
int utmpxname(const char *new_ut_name) { return utmpname(new_ut_name); }


x86 assembly (clang, -O0):
<utmpxname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <utmpname@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<utmpxname>:
jmp    1030 <utmpname@plt>

LLVM IR (-O0):
define i32 @utmpxname(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @utmpname(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @utmpxname(i8* %0) {
%2 = tail call i32 @utmpname(i8* %0)
ret i32 %2
}
void XcmsSetWhitePoint() {}


x86 assembly (clang, -O0):
<XcmsSetWhitePoint>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XcmsSetWhitePoint>:
ret

LLVM IR (-O0):
define void @XcmsSetWhitePoint() {
ret void
}

LLVM IR (-O2):
define void @XcmsSetWhitePoint() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void *malloc(unsigned long);
void *realloc(void *, int);
void f3(int i) {
  unsigned long j = 10;
  void *ptr = malloc(j);
  if (i < 0)
    ptr = realloc(ptr, i);
  free(ptr);
}


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movq   $0xa,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    116a <f3+0x3a>
mov    -0x18(%rbp),%rdi
mov    -0x4(%rbp),%esi
call   1050 <realloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
push   %rbx
mov    %edi,%ebx
mov    $0xa,%edi
call   1040 <malloc@plt>
test   %ebx,%ebx
jns    114b <f3+0x1b>
mov    %rax,%rdi
mov    %ebx,%esi
call   1050 <realloc@plt>
mov    %rax,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @f3(i32 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i8*
store i32 %0, i32* %2
store i64 10, i64* %3
%5 = load i64, i64* %3
%6 = call i8* @malloc(i64 %5)
store i8* %6, i8** %4
%7 = load i32, i32* %2
%8 = icmp slt i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %1
%10 = load i8*, i8** %4
%11 = load i32, i32* %2
%12 = call i8* @realloc(i8* %10, i32 %11)
store i8* %12, i8** %4
br label %13
13: ; preds = %9, %1
%14 = load i8*, i8** %4
%15 = call i32 @free(i8* %14)
ret void
}

LLVM IR (-O2):
define void @f3(i32 %0) {
%2 = tail call dereferenceable_or_null(10) i8* @malloc(i64 10)
%3 = icmp slt i32 %0, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i8* @realloc(i8* %2, i32 %0)
br label %6
6: ; preds = %4, %1
%7 = phi i8* [ %5, %4 ], [ %2, %1 ]
%8 = tail call i32 @free(i8* %7)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
bool ia_bit32(uint32_t word, int i) { return (word & (1 << i)) != 0; }


x86 assembly (clang, -O0):
<ia_bit32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ia_bit32>:
mov    %esi,%ecx
mov    %edi,%eax
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ia_bit32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 1, %6
%8 = and i32 %5, %7
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @ia_bit32(i32 %0, i32 %1) {
%3 = lshr i32 %0, %1
%4 = and i32 %3, 1
ret i32 %4
}
__attribute__((unused)) void elock_release(volatile int *lock) {
  asm volatile("xor %%eax, %%eax\n\t"
               "XRELEASE movl %%eax, %0\n\t"
               :
               : "m"(*lock)
               : "%eax", "memory");
}


x86 assembly (clang, -O0):
<elock_release>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
xor    %eax,%eax
xrelease mov %eax,(%rcx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<elock_release>:
xor    %eax,%eax
xrelease mov %eax,(%rdi)
ret

LLVM IR (-O0):
define void @elock_release(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
ret void
}

LLVM IR (-O2):
define void @elock_release(i32* %0) {
tail call void asm sideeffect "xor %eax, %eax\0A\09XRELEASE movl %eax, $0\0A\09", "*m,~{eax},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %0)
ret void
}
int test_imm_9Duint16_mem(unsigned short *val) {
  return ((*val) & (0x9D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Duint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0x9d,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Duint16_mem>:
testb  $0x9d,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Duint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 157
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_9Duint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 157
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint32_t;

/* Variables and functions */
void spi_set_polarity(uint8_t polarity) {
  uint32_t reg = *(volatile uint32_t *)(0x01E12000 + 0x50);
  if (polarity)
    reg |= 1 << 17;
  else
    reg &= ~(1 << 17);
  *(volatile uint32_t *)(0x01E12000 + 0x50) = reg;
  return;
}


x86 assembly (clang, -O0):
<spi_set_polarity>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1e12050,%eax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     112d <spi_set_polarity+0x2d>
mov    -0xc(%rbp),%eax
or     $0x20000,%eax
mov    %eax,-0xc(%rbp)
jmp    1138 <spi_set_polarity+0x38>
mov    -0xc(%rbp),%eax
and    $0xfffdffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x1e12050,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_set_polarity>:
xor    %eax,%eax
test   %rdi,%rdi
setne  %al
mov    $0xfffdffff,%ecx
and    0x1e12050,%ecx
shl    $0x11,%eax
or     %ecx,%eax
mov    %eax,0x1e12050
ret

LLVM IR (-O0):
define void @spi_set_polarity(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
%4 = load volatile i32, i32* inttoptr (i64 31531088 to i32*)
store i32 %4, i32* %3
%5 = load i64, i64* %2
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = or i32 %8, 131072
store i32 %9, i32* %3
br label %13
10: ; preds = %1
%11 = load i32, i32* %3
%12 = and i32 %11, -131073
store i32 %12, i32* %3
br label %13
13: ; preds = %10, %7
%14 = load i32, i32* %3
store volatile i32 %14, i32* inttoptr (i64 31531088 to i32*)
ret void
}

LLVM IR (-O2):
define void @spi_set_polarity(i64 %0) {
%2 = load volatile i32, i32* inttoptr (i64 31531088 to i32*)
%3 = icmp eq i64 %0, 0
%4 = and i32 %2, -131073
%5 = select i1 %3, i32 0, i32 131072
%6 = or i32 %4, %5
store volatile i32 %6, i32* inttoptr (i64 31531088 to i32*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(char *prog) {
  fprintf(stderr, "usage: %s <-i file>\n", prog);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [21 x i8] c"usage: %s <-i file>\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [21 x i8] c"usage: %s <-i file>\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
char isValidOffset(int row, int col) {
  return row < 47 && col < 128 && row >= 0 && col >= 0;
}


x86 assembly (clang, -O0):
<isValidOffset>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
cmpl   $0x2f,-0x4(%rbp)
mov    %al,-0x9(%rbp)
jge    1144 <isValidOffset+0x44>
xor    %eax,%eax
cmpl   $0x80,-0x8(%rbp)
mov    %al,-0x9(%rbp)
jge    1144 <isValidOffset+0x44>
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x9(%rbp)
jl     1144 <isValidOffset+0x44>
cmpl   $0x0,-0x8(%rbp)
setge  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isValidOffset>:
xor    %eax,%eax
test   %esi,%esi
setns  %al
xor    %ecx,%ecx
cmp    $0x80,%esi
cmovge %ecx,%eax
cmp    $0x2f,%edi
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @isValidOffset(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 47
br i1 %6, label %7, label %16
7: ; preds = %2
%8 = load i32, i32* %4
%9 = icmp slt i32 %8, 128
br i1 %9, label %10, label %16
10: ; preds = %7
%11 = load i32, i32* %3
%12 = icmp sge i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %4
%15 = icmp sge i32 %14, 0
br label %16
16: ; preds = %13, %10, %7, %2
%17 = phi i1 [ false, %10 ], [ false, %7 ], [ false, %2 ], [ %15, %13 ]
%18 = zext i1 %17 to i32
%19 = trunc i32 %18 to i8
ret i8 %19
}

LLVM IR (-O2):
define signext i8 @isValidOffset(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, 128
%4 = icmp ult i32 %0, 47
%5 = and i1 %4, %3
%6 = lshr i32 %1, 31
%7 = trunc i32 %6 to i8
%8 = xor i8 %7, 1
%9 = select i1 %5, i8 %8, i8 0
ret i8 %9
}
void ff_hevc_put_hevc_bi_w_pel_pixels64_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_pel_pixels64_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_pel_pixels64_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_pel_pixels64_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_pel_pixels64_12_sse4() {
ret void
}
void dputc(int c) {
  while ((((volatile unsigned int *)(0x49020014))[0] & 0x20) == 0)
    ;
  ((volatile unsigned char *)(0x49020000))[0] = c;
}


x86 assembly (clang, -O0):
<dputc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x49020014,%eax
mov    (%rax),%eax
and    $0x20,%eax
cmp    $0x0,%eax
jne    111f <dputc+0x1f>
jmp    1107 <dputc+0x7>
mov    -0x4(%rbp),%eax
mov    %al,%cl
mov    $0x49020000,%eax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dputc>:
testl  $0x20,0x49020014
je     1100 <dputc>
mov    %dil,0x49020000
49
ret

LLVM IR (-O0):
define void @dputc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load volatile i32, i32* inttoptr (i64 1224867860 to i32*)
%5 = and i32 %4, 32
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
%9 = load i32, i32* %2
%10 = trunc i32 %9 to i8
store volatile i8 %10, i8* inttoptr (i64 1224867840 to i8*)
ret void
}

LLVM IR (-O2):
define void @dputc(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = load volatile i32, i32* inttoptr (i64 1224867860 to i32*)
%4 = and i32 %3, 32
%5 = icmp eq i32 %4, 0
br i1 %5, label %2, label %6
6: ; preds = %2
%7 = trunc i32 %0 to i8
store volatile i8 %7, i8* inttoptr (i64 1224867840 to i8*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mock_push(int /*<<< orphan*/);
int /*<<< orphan*/ pack_glPopMatrix(int /*<<< orphan*/ *);
void gles_glPopMatrix() {
  { mock_push(pack_glPopMatrix(NULL)); };
}


x86 assembly (clang, -O0):
<gles_glPopMatrix>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <pack_glPopMatrix@plt>
mov    %eax,%edi
call   1030 <mock_push@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gles_glPopMatrix>:
push   %rax
xor    %edi,%edi
call   1040 <pack_glPopMatrix@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <mock_push@plt>

LLVM IR (-O0):
define void @gles_glPopMatrix() {
%1 = call i32 @pack_glPopMatrix(i32* null)
%2 = call i32 @mock_push(i32 %1)
ret void
}

LLVM IR (-O2):
define void @gles_glPopMatrix() {
%1 = tail call i32 @pack_glPopMatrix(i32* null)
%2 = tail call i32 @mock_push(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ runalltests_behaviour_bpp_tree();
int main(void) {
  runalltests_behaviour_bpp_tree();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <runalltests_behaviour_bpp_tree@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <runalltests_behaviour_bpp_tree@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @runalltests_behaviour_bpp_tree()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @runalltests_behaviour_bpp_tree()
ret i32 0
}
/* Type definitions */
union bpf_attr {
  int map_type;
  int key_size;
  int value_size;
  int max_entries;
};
typedef enum bpf_map_type { ____Placeholder_bpf_map_type } bpf_map_type;
typedef int /*<<< orphan*/ attr;

/* Variables and functions */
int /*<<< orphan*/ BPF_MAP_CREATE;
int /*<<< orphan*/ __NR_bpf;
int syscall(int /*<<< orphan*/, int /*<<< orphan*/, union bpf_attr *, int);
int bpf_create_map(enum bpf_map_type map_type, int key_size, int value_size,
                   int max_entries) {
  union bpf_attr attr = {.map_type = map_type,
                         .key_size = key_size,
                         .value_size = value_size,
                         .max_entries = max_entries};
  return syscall(__NR_bpf, BPF_MAP_CREATE, &attr, sizeof(attr));
}


x86 assembly (clang, -O0):
<bpf_create_map>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    0x2ea7(%rip),%rax
mov    (%rax),%edi
mov    0x2eae(%rip),%rax
mov    (%rax),%esi
lea    -0x18(%rbp),%rdx
mov    $0x4,%ecx
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bpf_create_map>:
push   %rax
mov    %ecx,(%rsp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    0x2ec4(%rip),%rax
mov    (%rax),%esi
mov    %rsp,%rdx
mov    $0x4,%ecx
call   1030 <syscall@plt>
pop    %rcx
ret

LLVM IR (-O0):
%union.bpf_attr = type { i32 }
@__NR_bpf = global i32 0
@BPF_MAP_CREATE = global i32 0
define i32 @bpf_create_map(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca %union.bpf_attr
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = bitcast %union.bpf_attr* %9 to i32*
%11 = load i32, i32* %8
store i32 %11, i32* %10
%12 = load i32, i32* @__NR_bpf
%13 = load i32, i32* @BPF_MAP_CREATE
%14 = call i32 @syscall(i32 %12, i32 %13, %union.bpf_attr* %9, i32 4)
ret i32 %14
}

LLVM IR (-O2):
%union.bpf_attr = type { i32 }
@__NR_bpf = global i32 0
@BPF_MAP_CREATE = global i32 0
define i32 @bpf_create_map(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca %union.bpf_attr
%6 = bitcast %union.bpf_attr* %5 to i8*
%7 = getelementptr inbounds %union.bpf_attr, %union.bpf_attr* %5, i64 0, i32 0
store i32 %3, i32* %7
%8 = load i32, i32* @__NR_bpf
%9 = load i32, i32* @BPF_MAP_CREATE
%10 = call i32 @syscall(i32 %8, i32 %9, %union.bpf_attr* %5, i32 4)
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ SIGCHLD;
int /*<<< orphan*/ sig_default(int /*<<< orphan*/);
extern void sig_child_default(void) { sig_default(SIGCHLD); }


x86 assembly (clang, -O0):
<sig_child_default>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <sig_default@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_child_default>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <sig_default@plt>

LLVM IR (-O0):
@SIGCHLD = global i32 0
define void @sig_child_default() {
%1 = load i32, i32* @SIGCHLD
%2 = call i32 @sig_default(i32 %1)
ret void
}

LLVM IR (-O2):
@SIGCHLD = global i32 0
define void @sig_child_default() {
%1 = load i32, i32* @SIGCHLD
%2 = tail call i32 @sig_default(i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int pthread_mutex_unlock(int /*<<< orphan*/ *);
int sys_mutex_unlock(pthread_mutex_t *mtx) { return pthread_mutex_unlock(mtx); }


x86 assembly (clang, -O0):
<sys_mutex_unlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pthread_mutex_unlock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_mutex_unlock>:
jmp    1030 <pthread_mutex_unlock@plt>

LLVM IR (-O0):
define i32 @sys_mutex_unlock(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @pthread_mutex_unlock(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @sys_mutex_unlock(i32* %0) {
%2 = tail call i32 @pthread_mutex_unlock(i32* %0)
ret i32 %2
}
int test_imm_8Fint16_mem(short *val) {
  return ((*val) & (0x8F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Fint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0x8f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Fint16_mem>:
testb  $0x8f,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Fint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 143
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_8Fint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 143
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
unsigned int getRealId(unsigned int *const, unsigned int);
unsigned int getRealParent(unsigned int *const prob_parent,
                           unsigned int *const comp_same,
                           unsigned int const id) {
  return getRealId(comp_same, *(prob_parent + id));
}


x86 assembly (clang, -O0):
<getRealParent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rax
mov    -0x14(%rbp),%ecx
mov    (%rax,%rcx,4),%esi
call   1030 <getRealId@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getRealParent>:
mov    %rsi,%rax
mov    %edx,%ecx
mov    (%rdi,%rcx,4),%esi
mov    %rax,%rdi
jmp    1030 <getRealId@plt>

LLVM IR (-O0):
define i32 @getRealParent(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %6
%10 = zext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
%13 = call i32 @getRealId(i32* %7, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @getRealParent(i32* nocapture %0, i32* %1, i32 %2) {
%4 = zext i32 %2 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = tail call i32 @getRealId(i32* %1, i32 %6)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isprint(int);
void t_isprint_0xcc() {
  Assert_real((isprint(204) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              1025, ("isprint should be 0 for 0xcc"));
}


x86 assembly (clang, -O0):
<t_isprint_0xcc>:
push   %rbp
mov    %rsp,%rbp
mov    $0xcc,%edi
call   1030 <isprint@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x401,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0xcc>:
push   %rax
mov    $0xcc,%edi
call   1030 <isprint@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x401,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xcc\00"
define void @t_isprint_0xcc() {
%1 = call i64 @isprint(i32 204)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1025, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xcc\00"
define void @t_isprint_0xcc() {
%1 = tail call i64 @isprint(i32 204)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1025, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fork();
int main() {
  for (;;)
    fork();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <fork@plt>
jmp    111f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <fork@plt>
jmp    1120 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %2, %0
%3 = call i32 (...) @fork()
br label %2
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @fork()
br label %1
}
void ShowSidetoMove(void) {}


x86 assembly (clang, -O0):
<ShowSidetoMove>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ShowSidetoMove>:
ret

LLVM IR (-O0):
define void @ShowSidetoMove() {
ret void
}

LLVM IR (-O2):
define void @ShowSidetoMove() {
ret void
}
/* Variables and functions */
int rand();
int randint(int a, int b) { return a + (rand() % (b - a + 1)); }


x86 assembly (clang, -O0):
<randint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
mov    -0xc(%rbp),%eax
add    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randint>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
sub    %ebp,%ebx
add    $0x1,%ebx
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @randint(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 (...) @rand()
%7 = load i32, i32* %4
%8 = load i32, i32* %3
%9 = sub nsw i32 %7, %8
%10 = add nsw i32 %9, 1
%11 = srem i32 %6, %10
%12 = add nsw i32 %5, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @randint(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = sub i32 1, %0
%5 = add i32 %4, %1
%6 = srem i32 %3, %5
%7 = add nsw i32 %6, %0
ret i32 %7
}