xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int fatalError(char *errorMsg) {
  printf("ERROR: %s\n", errorMsg);
  printf("\n");
  return 127;
}


x86 assembly (clang, -O0):
<fatalError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xed4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0x7f,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fatalError>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0x7f,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"ERROR: %s\0A\00"
@.str.1 = [2 x i8] c"\0A\00"
define i32 @fatalError(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret i32 127
}

LLVM IR (-O2):
@.str = [11 x i8] c"ERROR: %s\0A\00"
define i32 @fatalError(i8* %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @putchar(i32 10)
ret i32 127
}
/* Variables and functions */
int /*<<< orphan*/ _Warning(long, char *);
void Warning_EmptyUnicodeEscape(long p_position) {
  _Warning(p_position, "Unicode escape sequence specified with no nibbles");
}


x86 assembly (clang, -O0):
<Warning_EmptyUnicodeEscape>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <_Warning@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Warning_EmptyUnicodeEscape>:
lea    0xee9(%rip),%rsi
jmp    1030 <_Warning@plt>

LLVM IR (-O0):
@.str = [50 x i8] c"Unicode escape sequence specified with no nibbles\00"
define void @Warning_EmptyUnicodeEscape(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @_Warning(i64 %3, i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [50 x i8] c"Unicode escape sequence specified with no nibbles\00"
define void @Warning_EmptyUnicodeEscape(i64 %0) {
%2 = tail call i32 @_Warning(i64 %0, i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct comp {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ CloseBreezeSimulation(int);
int /*<<< orphan*/ printf(char *);
void BrzBinaryFuncPush_requp(struct comp *comp, int port) {
  printf("BrzBinaryFuncPush_ackup: This code should never be reached\n");
  CloseBreezeSimulation(2);
}


x86 assembly (clang, -O0):
<BrzBinaryFuncPush_requp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
mov    $0x2,%edi
call   1040 <CloseBreezeSimulation@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BrzBinaryFuncPush_requp>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x2,%edi
pop    %rax
jmp    1040 <CloseBreezeSimulation@plt>

LLVM IR (-O0):
%struct.comp = type { i32 }
@.str = [60 x i8] c"BrzBinaryFuncPush_ackup: This code should never be reached\0A\00"
define void @BrzBinaryFuncPush_requp(%struct.comp* %0, i32 %1) {
%3 = alloca %struct.comp*
%4 = alloca i32
store %struct.comp* %0, %struct.comp** %3
store i32 %1, i32* %4
%5 = call i32 @printf(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @CloseBreezeSimulation(i32 2)
ret void
}

LLVM IR (-O2):
%struct.comp = type { i32 }
@str = [59 x i8] c"BrzBinaryFuncPush_ackup: This code should never be reached\00"
define void @BrzBinaryFuncPush_requp(%struct.comp* nocapture readnone %0, i32 %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([59 x i8], [59 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 @CloseBreezeSimulation(i32 2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ key_t;

/* Variables and functions */
int /*<<< orphan*/ __NR_semget;
int syscall(int /*<<< orphan*/, int /*<<< orphan*/, int, int);
int semget(key_t key, int nsems, int semflg) {
  return syscall(__NR_semget, key, nsems, semflg);
}


x86 assembly (clang, -O0):
<semget>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<semget>:
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
mov    0x2ec3(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@__NR_semget = global i32 0
define i32 @semget(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* @__NR_semget
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @syscall(i32 %7, i32 %8, i32 %9, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
@__NR_semget = global i32 0
define i32 @semget(i32 %0, i32 %1, i32 %2) {
%4 = load i32, i32* @__NR_semget
%5 = tail call i32 @syscall(i32 %4, i32 %0, i32 %1, i32 %2)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ uart_write(unsigned char);
void uart_write_str(const char *data) {
  for (unsigned int i = 0; data[i] != 0; i++)
    uart_write((unsigned char)data[i]);
}


x86 assembly (clang, -O0):
<uart_write_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1155 <uart_write_str+0x45>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
movzbl (%rax,%rcx,1),%edi
call   1030 <uart_write@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <uart_write_str+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_write_str>:
push   %rbp
push   %rbx
push   %rax
mov    (%rdi),%al
test   %al,%al
je     1145 <uart_write_str+0x35>
mov    %rdi,%rbx
mov    $0x1,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movzbl %al,%edi
call   1030 <uart_write@plt>
mov    %ebp,%eax
movzbl (%rbx,%rax,1),%eax
add    $0x1,%ebp
test   %al,%al
jne    1130 <uart_write_str+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @uart_write_str(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %19, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %22
12: ; preds = %4
%13 = load i8*, i8** %2
%14 = load i32, i32* %3
%15 = zext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = call i32 @uart_write(i8 zeroext %17)
br label %19
19: ; preds = %12
%20 = load i32, i32* %3
%21 = add i32 %20, 1
store i32 %21, i32* %3
br label %4
22: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @uart_write_str(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %5, %1
ret void
5: ; preds = %1, %5
%6 = phi i8 [ %12, %5 ], [ %2, %1 ]
%7 = phi i32 [ %9, %5 ], [ 0, %1 ]
%8 = tail call i32 @uart_write(i8 zeroext %6)
%9 = add i32 %7, 1
%10 = zext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %0, i64 %10
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %4, label %5
}
/* Variables and functions */
scalar_t__ pow(float, int);
float sqrt(scalar_t__);
float h(float x) { return (sqrt(4.0 - pow(x, 2))); }


x86 assembly (clang, -O0):
<h>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mov    $0x2,%edi
call   1030 <pow@plt>
cvtsi2sd %rax,%xmm1
movsd  0xeb7(%rip),%xmm0
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rdi
call   1040 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h>:
push   %rax
mov    $0x2,%edi
call   1030 <pow@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
movsd  0xec5(%rip),%xmm1
subsd  %xmm0,%xmm1
cvttsd2si %xmm1,%rdi
pop    %rax
jmp    1040 <sqrt@plt>

LLVM IR (-O0):
define float @h(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i64 @pow(float %3, i32 2)
%5 = sitofp i64 %4 to double
%6 = fsub double 4.000000e+00, %5
%7 = fptosi double %6 to i64
%8 = call float @sqrt(i64 %7)
ret float %8
}

LLVM IR (-O2):
define float @h(float %0) {
%2 = tail call i64 @pow(float %0, i32 2)
%3 = sitofp i64 %2 to double
%4 = fsub double 4.000000e+00, %3
%5 = fptosi double %4 to i64
%6 = tail call float @sqrt(i64 %5)
ret float %6
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
scalar_t__ ESRCH;
int /*<<< orphan*/ SIGKILL;
scalar_t__ errno;
int /*<<< orphan*/ error(int /*<<< orphan*/ *);
int kill(int, int /*<<< orphan*/);
void terminate(pid_t pid) {
  int v;
  v = kill(-1, SIGKILL);
  if (v < 0)
    if (errno != ESRCH)
      error(NULL);
}


x86 assembly (clang, -O0):
<terminate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ea6(%rip),%rax
mov    (%rax),%esi
mov    $0xffffffff,%edi
call   1030 <kill@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1173 <terminate+0x53>
mov    0x2e8e(%rip),%rax
mov    (%rax),%rax
mov    0x2e6c(%rip),%rcx
cmp    (%rcx),%rax
je     116e <terminate+0x4e>
xor    %eax,%eax
mov    %eax,%edi
call   1040 <error@plt>
jmp    1173 <terminate+0x53>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<terminate>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%esi
mov    $0xffffffff,%edi
call   1030 <kill@plt>
test   %eax,%eax
jns    114e <terminate+0x2e>
mov    0x2ea1(%rip),%rax
mov    (%rax),%rax
mov    0x2e7f(%rip),%rcx
cmp    (%rcx),%rax
jne    1150 <terminate+0x30>
pop    %rax
ret
xor    %edi,%edi
pop    %rax
jmp    1040 <error@plt>

LLVM IR (-O0):
@SIGKILL = global i32 0
@errno = global i64 0
@ESRCH = global i64 0
define void @terminate(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* @SIGKILL
%5 = call i32 @kill(i32 -1, i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %1
%9 = load i64, i64* @errno
%10 = load i64, i64* @ESRCH
%11 = icmp ne i64 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = call i32 @error(i32* null)
br label %14
14: ; preds = %12, %8
br label %15
15: ; preds = %14, %1
ret void
}

LLVM IR (-O2):
@SIGKILL = global i32 0
@errno = global i64 0
@ESRCH = global i64 0
define void @terminate(i32 %0) {
%2 = load i32, i32* @SIGKILL
%3 = tail call i32 @kill(i32 -1, i32 %2)
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %11
5: ; preds = %1
%6 = load i64, i64* @errno
%7 = load i64, i64* @ESRCH
%8 = icmp eq i64 %6, %7
br i1 %8, label %11, label %9
9: ; preds = %5
%10 = tail call i32 @error(i32* null)
br label %11
11: ; preds = %5, %9, %1
ret void
}
void ata_wait_for_bsy(void) {
  while ((*((volatile unsigned char *)0x06200206)) & 0x80)
    ;
}


x86 assembly (clang, -O0):
<ata_wait_for_bsy>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <ata_wait_for_bsy+0x9>
mov    $0x6200206,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     1126 <ata_wait_for_bsy+0x26>
jmp    1109 <ata_wait_for_bsy+0x9>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ata_wait_for_bsy>:
cmpb   $0x0,0x6200206
js     1100 <ata_wait_for_bsy>
ret

LLVM IR (-O0):
define void @ata_wait_for_bsy() {
br label %1
1: ; preds = %6, %0
%2 = load volatile i8, i8* inttoptr (i64 102760966 to i8*)
%3 = zext i8 %2 to i32
%4 = and i32 %3, 128
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
br label %1
7: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @ata_wait_for_bsy() {
br label %1
1: ; preds = %1, %0
%2 = load volatile i8, i8* inttoptr (i64 102760966 to i8*)
%3 = icmp sgt i8 %2, -1
br i1 %3, label %4, label %1
4: ; preds = %1
ret void
}
/* Variables and functions */
double M_E;
double pol_taylor(double x) {
  return M_E + ((x - 1) * 2 * M_E) + ((x - 1) * (x - 1) * 3 * M_E);
}


x86 assembly (clang, -O0):
<pol_taylor>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    0x2ed0(%rip),%rax
movsd  (%rax),%xmm0
movsd  -0x8(%rbp),%xmm1
movsd  0xee7(%rip),%xmm2
subsd  %xmm2,%xmm1
movsd  0xee3(%rip),%xmm2
mulsd  %xmm2,%xmm1
mov    0x2ea8(%rip),%rax
movsd  (%rax),%xmm2
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
movsd  -0x8(%rbp),%xmm0
movsd  0xeb7(%rip),%xmm2
subsd  %xmm2,%xmm0
movsd  -0x8(%rbp),%xmm2
movsd  0xea6(%rip),%xmm3
subsd  %xmm3,%xmm2
mulsd  %xmm2,%xmm0
movsd  0xe8e(%rip),%xmm2
mulsd  %xmm2,%xmm0
mov    0x2e63(%rip),%rax
movsd  (%rax),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<pol_taylor>:
mov    0x2ed9(%rip),%rax
movsd  (%rax),%xmm1
addsd  0xeed(%rip),%xmm0
movapd %xmm0,%xmm2
addsd  %xmm0,%xmm2
mulsd  %xmm1,%xmm2
addsd  %xmm1,%xmm2
mulsd  %xmm0,%xmm0
mulsd  0xed9(%rip),%xmm0
mulsd  %xmm1,%xmm0
addsd  %xmm2,%xmm0
ret

LLVM IR (-O0):
@M_E = global double 0.000000e+00
define double @pol_taylor(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* @M_E
%4 = load double, double* %2
%5 = fsub double %4, 1.000000e+00
%6 = fmul double %5, 2.000000e+00
%7 = load double, double* @M_E
%8 = call double @llvm.fmuladd.f64(double %6, double %7, double %3)
%9 = load double, double* %2
%10 = fsub double %9, 1.000000e+00
%11 = load double, double* %2
%12 = fsub double %11, 1.000000e+00
%13 = fmul double %10, %12
%14 = fmul double %13, 3.000000e+00
%15 = load double, double* @M_E
%16 = call double @llvm.fmuladd.f64(double %14, double %15, double %8)
ret double %16
}

LLVM IR (-O2):
@M_E = global double 0.000000e+00
define double @pol_taylor(double %0) {
%2 = load double, double* @M_E
%3 = fadd double %0, -1.000000e+00
%4 = fmul double %3, 2.000000e+00
%5 = tail call double @llvm.fmuladd.f64(double %4, double %2, double %2)
%6 = fmul double %3, %3
%7 = fmul double %6, 3.000000e+00
%8 = tail call double @llvm.fmuladd.f64(double %7, double %2, double %5)
ret double %8
}
int Get_status_from_OF(struct job *job, char *title, int of_pid, int of_error,
                       char *msg, int msgmax, int timeout, int suspend,
                       int max_wait, char *status_file) {}


x86 assembly (clang, -O0):
<Get_status_from_OF>:
push   %rbp
mov    %rsp,%rbp
mov    0x28(%rbp),%rax
mov    0x20(%rbp),%eax
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    %ecx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9d,-0x2c(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Get_status_from_OF>:
ret

LLVM IR (-O0):
%struct.job = type opaque
define i32 @Get_status_from_OF(%struct.job* %0, i8* %1, i32 %2, i32 %3, i8* %4, i32 %5, i32 %6, i32 %7, i32 %8, i8* %9) {
%11 = alloca i32
%12 = alloca %struct.job*
%13 = alloca i8*
%14 = alloca i32
%15 = alloca i32
%16 = alloca i8*
%17 = alloca i32
%18 = alloca i32
%19 = alloca i32
%20 = alloca i32
%21 = alloca i8*
store %struct.job* %0, %struct.job** %12
store i8* %1, i8** %13
store i32 %2, i32* %14
store i32 %3, i32* %15
store i8* %4, i8** %16
store i32 %5, i32* %17
store i32 %6, i32* %18
store i32 %7, i32* %19
store i32 %8, i32* %20
store i8* %9, i8** %21
%22 = load i32, i32* %11
ret i32 %22
}

LLVM IR (-O2):
%struct.job = type opaque
define i32 @Get_status_from_OF(%struct.job* nocapture readnone %0, i8* nocapture readnone %1, i32 %2, i32 %3, i8* nocapture readnone %4, i32 %5, i32 %6, i32 %7, i32 %8, i8* nocapture readnone %9) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/
__softboundmpx_propagate_metadata_shadow_stack_from(int, int /*<<< orphan*/);
char *strcat(char *, char const *);
__attribute__((__weak__, __always___)) char *
softboundmpx_strcat(char *dest, const char *src) {
  char *ret_ptr = strcat(dest, src);
  __softboundmpx_propagate_metadata_shadow_stack_from(1, 0);
  return ret_ptr;
}


x86 assembly (clang, -O0):
<softboundmpx_strcat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <strcat@plt>
mov    %rax,-0x18(%rbp)
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <__softboundmpx_propagate_metadata_shadow_stack_from@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_strcat>:
push   %rbx
mov    %rdi,%rbx
call   1040 <strcat@plt>
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <__softboundmpx_propagate_metadata_shadow_stack_from@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define weak i8* @softboundmpx_strcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i8* @strcat(i8* %6, i8* %7)
store i8* %8, i8** %5
%9 = call i32 @__softboundmpx_propagate_metadata_shadow_stack_from(i32 1, i32 0)
%10 = load i8*, i8** %5
ret i8* %10
}

LLVM IR (-O2):
define weak i8* @softboundmpx_strcat(i8* %0, i8* %1) {
%3 = tail call i8* @strcat(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
%4 = tail call i32 @__softboundmpx_propagate_metadata_shadow_stack_from(i32 1, i32 0)
ret i8* %0
}
/* Type definitions */
struct hda_codec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ alc_exec_unsol_event(struct hda_codec *, unsigned int);
void alc880_unsol_event(struct hda_codec *codec, unsigned int res) {
  alc_exec_unsol_event(codec, res >> 28);
}


x86 assembly (clang, -O0):
<alc880_unsol_event>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
shr    $0x1c,%esi
call   1030 <alc_exec_unsol_event@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alc880_unsol_event>:
shr    $0x1c,%esi
jmp    1030 <alc_exec_unsol_event@plt>

LLVM IR (-O0):
%struct.hda_codec = type { i32 }
define void @alc880_unsol_event(%struct.hda_codec* %0, i32 %1) {
%3 = alloca %struct.hda_codec*
%4 = alloca i32
store %struct.hda_codec* %0, %struct.hda_codec** %3
store i32 %1, i32* %4
%5 = load %struct.hda_codec*, %struct.hda_codec** %3
%6 = load i32, i32* %4
%7 = lshr i32 %6, 28
%8 = call i32 @alc_exec_unsol_event(%struct.hda_codec* %5, i32 %7)
ret void
}

LLVM IR (-O2):
%struct.hda_codec = type { i32 }
define void @alc880_unsol_event(%struct.hda_codec* %0, i32 %1) {
%3 = lshr i32 %1, 28
%4 = tail call i32 @alc_exec_unsol_event(%struct.hda_codec* %0, i32 %3)
ret void
}
int module(int val) {
  if (val < 0)
    return -val;
  return val;
}


x86 assembly (clang, -O0):
<module>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    111e <module+0x1e>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1124 <module+0x24>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<module>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @module(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sub nsw i32 0, %7
store i32 %8, i32* %2
br label %11
9: ; preds = %1
%10 = load i32, i32* %3
store i32 %10, i32* %2
br label %11
11: ; preds = %9, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @module(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ badfmt(char *);
int /*<<< orphan*/ strncmp(char *, char *, int);
void CheckModes(char *name) {
  if (!strncmp(name, "no", 2))
    badfmt("illegal mode-name");
}


x86 assembly (clang, -O0):
<CheckModes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec9(%rip),%rsi
mov    $0x2,%edx
call   1030 <strncmp@plt>
cmp    $0x0,%eax
jne    1156 <CheckModes+0x36>
lea    0xeb2(%rip),%rdi
call   1040 <badfmt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CheckModes>:
push   %rax
lea    0xed8(%rip),%rsi
mov    $0x2,%edx
call   1030 <strncmp@plt>
test   %eax,%eax
je     1138 <CheckModes+0x18>
pop    %rax
ret
lea    0xec4(%rip),%rdi
pop    %rax
jmp    1040 <badfmt@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"no\00"
@.str.1 = [18 x i8] c"illegal mode-name\00"
define void @CheckModes(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strncmp(i8* %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 2)
%5 = icmp ne i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = call i32 @badfmt(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"no\00"
@.str.1 = [18 x i8] c"illegal mode-name\00"
define void @CheckModes(i8* %0) {
%2 = tail call i32 @strncmp(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 2)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @badfmt(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
unsigned long long rdtsc();
unsigned long long pp_time() {
  unsigned long long cycles = rdtsc();
  return cycles;
}


x86 assembly (clang, -O0):
<pp_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <rdtsc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pp_time>:
xor    %eax,%eax
jmp    1030 <rdtsc@plt>

LLVM IR (-O0):
define i64 @pp_time() {
%1 = alloca i64
%2 = call i64 (...) @rdtsc()
store i64 %2, i64* %1
%3 = load i64, i64* %1
ret i64 %3
}

LLVM IR (-O2):
define i64 @pp_time() {
%1 = tail call i64 (...) @rdtsc()
ret i64 %1
}
int undefined(unsigned int k) {
  while (k > 0) {
    k++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<undefined>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jbe    111f <undefined+0x1f>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1107 <undefined+0x7>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<undefined>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @undefined(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %6, %1
%4 = load i32, i32* %2
%5 = icmp ugt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add i32 %7, 1
store i32 %8, i32* %2
br label %3
9: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @undefined(i32 %0) {
ret i32 0
}
/* Type definitions */
typedef int uint32_t;
struct rng {
  int dummy;
};

/* Variables and functions */
int rng_uint32(struct rng *);
float rng_float(struct rng *rng) {
  union {
    uint32_t i;
    float f;
  } magick;
  uint32_t r = rng_uint32(rng);
  magick.i = (r & 0x007fffff) | (127 << 23);
  return magick.f - 1;
}


x86 assembly (clang, -O0):
<rng_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <rng_uint32@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    $0x7fffff,%eax
or     $0x3f800000,%eax
mov    %eax,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
movss  0xebb(%rip),%xmm1
subss  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rng_float>:
push   %rax
call   1030 <rng_uint32@plt>
and    $0x7fffff,%eax
or     $0x3f800000,%eax
movd   %eax,%xmm0
addss  0xed4(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
%struct.rng = type { i32 }
%union.anon = type { i32 }
define float @rng_float(%struct.rng* %0) {
%2 = alloca %struct.rng*
%3 = alloca %union.anon
%4 = alloca i32
store %struct.rng* %0, %struct.rng** %2
%5 = load %struct.rng*, %struct.rng** %2
%6 = call i32 @rng_uint32(%struct.rng* %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = and i32 %7, 8388607
%9 = or i32 %8, 1065353216
%10 = bitcast %union.anon* %3 to i32*
store i32 %9, i32* %10
%11 = bitcast %union.anon* %3 to float*
%12 = load float, float* %11
%13 = fsub float %12, 1.000000e+00
ret float %13
}

LLVM IR (-O2):
%struct.rng = type { i32 }
define float @rng_float(%struct.rng* %0) {
%2 = tail call i32 @rng_uint32(%struct.rng* %0)
%3 = and i32 %2, 8388607
%4 = or i32 %3, 1065353216
%5 = bitcast i32 %4 to float
%6 = fadd float %5, -1.000000e+00
ret float %6
}
/* Variables and functions */
char const *mem_intern(char const *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char const *);
const char *str_intern(const char *str) { return mem_intern(str, strlen(str)); }


x86 assembly (clang, -O0):
<str_intern>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1040 <mem_intern@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_intern>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <mem_intern@plt>

LLVM IR (-O0):
define i8* @str_intern(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = call i8* @mem_intern(i8* %3, i32 %5)
ret i8* %6
}

LLVM IR (-O2):
define i8* @str_intern(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i8* @mem_intern(i8* %0, i32 %2)
ret i8* %3
}
/* Type definitions */
typedef int /*<<< orphan*/ __u32;

/* Variables and functions */
int /*<<< orphan*/ BPF_BTF_GET_NEXT_ID;
int bpf_obj_get_next_id(int /*<<< orphan*/, int /*<<< orphan*/ *,
                        int /*<<< orphan*/);
int bpf_btf_get_next_id(__u32 start_id, __u32 *next_id) {
  return bpf_obj_get_next_id(start_id, next_id, BPF_BTF_GET_NEXT_ID);
}


x86 assembly (clang, -O0):
<bpf_btf_get_next_id>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    0x2eb3(%rip),%rax
mov    (%rax),%edx
call   1030 <bpf_obj_get_next_id@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bpf_btf_get_next_id>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edx
jmp    1030 <bpf_obj_get_next_id@plt>

LLVM IR (-O0):
@BPF_BTF_GET_NEXT_ID = global i32 0
define i32 @bpf_btf_get_next_id(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = load i32, i32* @BPF_BTF_GET_NEXT_ID
%8 = call i32 @bpf_obj_get_next_id(i32 %5, i32* %6, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
@BPF_BTF_GET_NEXT_ID = global i32 0
define i32 @bpf_btf_get_next_id(i32 %0, i32* %1) {
%3 = load i32, i32* @BPF_BTF_GET_NEXT_ID
%4 = tail call i32 @bpf_obj_get_next_id(i32 %0, i32* %1, i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int test5(int);
int main() {
  printf("%d\n", test5(2));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x2,%edi
call   1030 <test5@plt>
mov    %eax,%esi
lea    0xebe(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2,%edi
call   1030 <test5@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @test5(i32 2)
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @test5(i32 2)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
unsigned u_sublim(unsigned minuend, unsigned subtrahend, unsigned limit) {
  unsigned x;
  if (minuend < limit)
    return limit;
  if (subtrahend > minuend)
    return limit;
  x = minuend - subtrahend;
  if (x > limit)
    return x;
  else
    return limit;
}


x86 assembly (clang, -O0):
<u_sublim>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
jae    1124 <u_sublim+0x24>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1161 <u_sublim+0x61>
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jbe    113b <u_sublim+0x3b>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1161 <u_sublim+0x61>
mov    -0x8(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jbe    115b <u_sublim+0x5b>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1161 <u_sublim+0x61>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<u_sublim>:
mov    %edi,%eax
sub    %esi,%eax
cmp    %edx,%eax
cmovbe %edx,%eax
cmp    %edx,%edi
cmovb  %edx,%eax
cmp    %esi,%edi
cmovb  %edx,%eax
ret

LLVM IR (-O0):
define i32 @u_sublim(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i32, i32* %5
%10 = load i32, i32* %7
%11 = icmp ult i32 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %3
%13 = load i32, i32* %7
store i32 %13, i32* %4
br label %31
14: ; preds = %3
%15 = load i32, i32* %6
%16 = load i32, i32* %5
%17 = icmp ugt i32 %15, %16
br i1 %17, label %18, label %20
18: ; preds = %14
%19 = load i32, i32* %7
store i32 %19, i32* %4
br label %31
20: ; preds = %14
%21 = load i32, i32* %5
%22 = load i32, i32* %6
%23 = sub i32 %21, %22
store i32 %23, i32* %8
%24 = load i32, i32* %8
%25 = load i32, i32* %7
%26 = icmp ugt i32 %24, %25
br i1 %26, label %27, label %29
27: ; preds = %20
%28 = load i32, i32* %8
store i32 %28, i32* %4
br label %31
29: ; preds = %20
%30 = load i32, i32* %7
store i32 %30, i32* %4
br label %31
31: ; preds = %29, %27, %18, %12
%32 = load i32, i32* %4
ret i32 %32
}

LLVM IR (-O2):
define i32 @u_sublim(i32 %0, i32 %1, i32 %2) {
%4 = icmp ult i32 %0, %2
%5 = icmp ult i32 %0, %1
%6 = or i1 %5, %4
%7 = sub i32 %0, %1
%8 = icmp ugt i32 %7, %2
%9 = select i1 %8, i32 %7, i32 %2
%10 = select i1 %6, i32 %2, i32 %9
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void rgph_u32x4_murmur32v_data32(float const *, size_t, uintptr_t,
                                 int /*<<< orphan*/ *);
void rgph_u32x4_murmur32v_f32a(const float *key, size_t len, uintptr_t seed,
                               uint32_t *h) {
  return rgph_u32x4_murmur32v_data32(key, len, seed, h);
}


x86 assembly (clang, -O0):
<rgph_u32x4_murmur32v_f32a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <rgph_u32x4_murmur32v_data32@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgph_u32x4_murmur32v_f32a>:
jmp    1030 <rgph_u32x4_murmur32v_data32@plt>

LLVM IR (-O0):
define void @rgph_u32x4_murmur32v_f32a(float* %0, i64 %1, i64 %2, i32* %3) {
%5 = alloca float*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i32*
store float* %0, float** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i32* %3, i32** %8
%9 = load float*, float** %5
%10 = load i64, i64* %6
%11 = load i64, i64* %7
%12 = load i32*, i32** %8
ret void
}

LLVM IR (-O2):
define void @rgph_u32x4_murmur32v_f32a(float* %0, i64 %1, i64 %2, i32* %3) {
tail call void @rgph_u32x4_murmur32v_data32(float* %0, i64 %1, i64 %2, i32* %3)
ret void
}
void gtk_accel_group_query() {}


x86 assembly (clang, -O0):
<gtk_accel_group_query>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_accel_group_query>:
ret

LLVM IR (-O0):
define void @gtk_accel_group_query() {
ret void
}

LLVM IR (-O2):
define void @gtk_accel_group_query() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ svga_read_common(int /*<<< orphan*/, int /*<<< orphan*/,
                                    void *);
uint8_t svga_read(uint32_t addr, void *p) {
  return svga_read_common(addr, 0, p);
}


x86 assembly (clang, -O0):
<svga_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <svga_read_common@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<svga_read>:
mov    %rsi,%rdx
xor    %esi,%esi
jmp    1030 <svga_read_common@plt>

LLVM IR (-O0):
define i32 @svga_read(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i32 @svga_read_common(i32 %5, i32 0, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @svga_read(i32 %0, i8* %1) {
%3 = tail call i32 @svga_read_common(i32 %0, i32 0, i8* %1)
ret i32 %3
}
/* Variables and functions */
unsigned int get_revision_code();
int get_processor_id(void) {
  unsigned int revision_num = get_revision_code();
  if (revision_num & 0x800000) {
    return (revision_num & 0xf000) >> 12;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<get_processor_id>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <get_revision_code@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x800000,%eax
cmp    $0x0,%eax
je     1146 <get_processor_id+0x36>
mov    -0x8(%rbp),%eax
and    $0xf000,%eax
shr    $0xc,%eax
mov    %eax,-0x4(%rbp)
jmp    114d <get_processor_id+0x3d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_processor_id>:
push   %rax
xor    %eax,%eax
call   1030 <get_revision_code@plt>
mov    %eax,%ecx
shl    $0x8,%ecx
sar    $0x1f,%ecx
shr    $0xc,%eax
and    %ecx,%eax
and    $0xf,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @get_processor_id() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @get_revision_code()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = and i32 %4, 8388608
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %0
%8 = load i32, i32* %2
%9 = and i32 %8, 61440
%10 = lshr i32 %9, 12
store i32 %10, i32* %1
br label %12
11: ; preds = %0
store i32 0, i32* %1
br label %12
12: ; preds = %11, %7
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @get_processor_id() {
%1 = tail call i32 (...) @get_revision_code()
%2 = and i32 %1, 8388608
%3 = icmp eq i32 %2, 0
%4 = lshr i32 %1, 12
%5 = and i32 %4, 15
%6 = select i1 %3, i32 0, i32 %5
ret i32 %6
}
/* Variables and functions */
unsigned int fls(unsigned int);
unsigned int roundup_pow_of_two(unsigned int n) { return 1U << fls(n - 1); }


x86 assembly (clang, -O0):
<roundup_pow_of_two>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1030 <fls@plt>
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<roundup_pow_of_two>:
push   %rax
add    $0xffffffff,%edi
call   1030 <fls@plt>
mov    $0x1,%edx
mov    %eax,%ecx
shl    %cl,%edx
mov    %edx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @roundup_pow_of_two(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub i32 %3, 1
%5 = call i32 @fls(i32 %4)
%6 = shl i32 1, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @roundup_pow_of_two(i32 %0) {
%2 = add i32 %0, -1
%3 = tail call i32 @fls(i32 %2)
%4 = shl nuw i32 1, %3
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
uint32_t min_uint32(uint32_t a, uint32_t b) {
  if (a < b)
    return a;
  else
    return b;
}


x86 assembly (clang, -O0):
<min_uint32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jge    1127 <min_uint32+0x27>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    112f <min_uint32+0x2f>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min_uint32>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovl  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @min_uint32(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %4
%7 = load i64, i64* %5
%8 = icmp slt i64 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i64, i64* %4
store i64 %10, i64* %3
br label %13
11: ; preds = %2
%12 = load i64, i64* %5
store i64 %12, i64* %3
br label %13
13: ; preds = %11, %9
%14 = load i64, i64* %3
ret i64 %14
}

LLVM IR (-O2):
define i64 @min_uint32(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
int telosparse();
main() { return (telosparse()); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <telosparse@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <telosparse@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @telosparse()
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @telosparse()
ret i32 %1
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ atca_delay_us(int);
void atca_delay_10us(uint32_t delay) { atca_delay_us(delay * 10); }


x86 assembly (clang, -O0):
<atca_delay_10us>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0xa,-0x4(%rbp),%edi
call   1030 <atca_delay_us@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atca_delay_10us>:
add    %edi,%edi
lea    (%rdi,%rdi,4),%edi
jmp    1030 <atca_delay_us@plt>

LLVM IR (-O0):
define void @atca_delay_10us(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 10
%5 = call i32 @atca_delay_us(i32 %4)
ret void
}

LLVM IR (-O2):
define void @atca_delay_10us(i32 %0) {
%2 = mul nsw i32 %0, 10
%3 = tail call i32 @atca_delay_us(i32 %2)
ret void
}
int ob_strlen(const char *str) {
  int i = 0;
  const char *c = str;
  while (*c++ != 0) {
    i++;
  }
  return i;
}


x86 assembly (clang, -O0):
<ob_strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1140 <ob_strlen+0x40>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1117 <ob_strlen+0x17>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ob_strlen>:
cmpb   $0x0,(%rdi)
je     111c <ob_strlen+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <ob_strlen+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ob_strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i8* %0, i8** %2
store i32 0, i32* %3
%5 = load i8*, i8** %2
store i8* %5, i8** %4
br label %6
6: ; preds = %12, %1
%7 = load i8*, i8** %4
%8 = getelementptr inbounds i8, i8* %7, i32 1
store i8* %8, i8** %4
%9 = load i8, i8* %7
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %6
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %6
15: ; preds = %6
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @ob_strlen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %7, %4 ], [ %0, %1 ]
%6 = phi i32 [ %8, %4 ], [ 0, %1 ]
%7 = getelementptr inbounds i8, i8* %5, i64 1
%8 = add nuw nsw i32 %6, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %12
}
void aget() {
  asm volatile("movq $0x0123456789abcdef, %%rax\n\t"
               "subq %%rax, %%rbx\n\t"
               "pushq %%rbx\n\t" ::
                   :);
}


x86 assembly (clang, -O0):
<aget>:
push   %rbp
mov    %rsp,%rbp
movabs $0x123456789abcdef,%rax
45 23 01
sub    %rax,%rbx
push   %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<aget>:
movabs $0x123456789abcdef,%rax
45 23 01
sub    %rax,%rbx
push   %rbx
ret

LLVM IR (-O0):
define void @aget() {
ret void
}

LLVM IR (-O2):
define void @aget() {
tail call void asm sideeffect "movq $$0x0123456789abcdef, %rax\0A\09subq %rax, %rbx\0A\09pushq %rbx\0A\09", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main(void) {
  int min, max, temp2, temp1, mul;
  if (min > max) {
    temp1 = max;
    max = min;
    min = temp1;
  }
  mul = min * max;
  while (0 != min) {
    temp2 = max % min;
    max = min;
    min = temp2;
  }
  printf("%d,%d", max, mul / max);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    113d <main+0x2d>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
xor    %eax,%eax
cmp    -0x8(%rbp),%eax
je     116d <main+0x5d>
mov    -0xc(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1147 <main+0x37>
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %eax,%edx
lea    0xe80(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
@.str = [6 x i8] c"%d,%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 0, i32* %1
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = icmp sgt i32 %7, %8
br i1 %9, label %10, label %14
10: ; preds = %0
%11 = load i32, i32* %3
store i32 %11, i32* %5
%12 = load i32, i32* %2
store i32 %12, i32* %3
%13 = load i32, i32* %5
store i32 %13, i32* %2
br label %14
14: ; preds = %10, %0
%15 = load i32, i32* %2
%16 = load i32, i32* %3
%17 = mul nsw i32 %15, %16
store i32 %17, i32* %6
br label %18
18: ; preds = %21, %14
%19 = load i32, i32* %2
%20 = icmp ne i32 0, %19
br i1 %20, label %21, label %27
21: ; preds = %18
%22 = load i32, i32* %3
%23 = load i32, i32* %2
%24 = srem i32 %22, %23
store i32 %24, i32* %4
%25 = load i32, i32* %2
store i32 %25, i32* %3
%26 = load i32, i32* %4
store i32 %26, i32* %2
br label %18
27: ; preds = %18
%28 = load i32, i32* %3
%29 = load i32, i32* %6
%30 = load i32, i32* %3
%31 = sdiv i32 %29, %30
%32 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %28, i32 %31)
ret i32 0
}

LLVM IR (-O2):
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned int, unsigned int);
int main() {
  do {
    long l;
    long *p = &l;
    *p = 0x0000000070000000L;
    p += 2;
    {
      unsigned int *addr = (unsigned int *)0x70000000;
      printf("%d, %d\n", addr[1], addr[0]);
    }
  } while (1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movq   $0x70000000,(%rax)
mov    -0x18(%rbp),%rax
add    $0x10,%rax
mov    %rax,-0x18(%rbp)
mov    $0x70000000,%eax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    0x4(%rax),%esi
mov    -0x20(%rbp),%rax
mov    (%rax),%edx
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%al
test   $0x1,%al
jne    111f <main+0xf>
jmp    116f <main+0x5f>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    0x70000000,%edx
mov    0x70000004,%esi
mov    %rbx,%rdi
call   1030 <printf@plt>
jmp    1120 <main+0x10>

LLVM IR (-O0):
@.str = [8 x i8] c"%d, %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64*
%4 = alloca i32*
store i32 0, i32* %1
br label %5
5: ; preds = %16, %0
store i64* %2, i64** %3
%6 = load i64*, i64** %3
store i64 1879048192, i64* %6
%7 = load i64*, i64** %3
%8 = getelementptr inbounds i64, i64* %7, i64 2
store i64* %8, i64** %3
store i32* inttoptr (i64 1879048192 to i32*), i32** %4
%9 = load i32*, i32** %4
%10 = getelementptr inbounds i32, i32* %9, i64 1
%11 = load i32, i32* %10
%12 = load i32*, i32** %4
%13 = getelementptr inbounds i32, i32* %12, i64 0
%14 = load i32, i32* %13
%15 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %11, i32 %14)
br label %16
16: ; preds = %5
br i1 true, label %5, label %17
17: ; preds = %16
%18 = load i32, i32* %1
ret i32 %18
}

LLVM IR (-O2):
@.str = [8 x i8] c"%d, %d\0A\00"
define i32 @main() {
br label %1
1: ; preds = %1, %0
%2 = load i32, i32* inttoptr (i64 1879048196 to i32*)
%3 = load i32, i32* inttoptr (i64 1879048192 to i32*)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %3)
br label %1
}
int main() {
  void input(int *number);
  void output(int *number);
  void max_min_value(int *number);
  int number[10];
  input(number);
  max_min_value(number);
  output(number);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x30(%rbp),%rdi
call   1030 <input@plt>
lea    -0x30(%rbp),%rdi
call   1040 <max_min_value@plt>
lea    -0x30(%rbp),%rdi
call   1050 <output@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x30,%rsp
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1030 <input@plt>
mov    %rbx,%rdi
call   1040 <max_min_value@plt>
mov    %rbx,%rdi
call   1050 <output@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [10 x i32]
store i32 0, i32* %1
%3 = getelementptr inbounds [10 x i32], [10 x i32]* %2, i64 0, i64 0
%4 = getelementptr inbounds [10 x i32], [10 x i32]* %2, i64 0, i64 0
%5 = getelementptr inbounds [10 x i32], [10 x i32]* %2, i64 0, i64 0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [10 x i32]
%2 = bitcast [10 x i32]* %1 to i8*
%3 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
ret i32 0
}
int strlength(char *str) {
  int length = 0;
  while ((*str++) != '\0') {
    length++;
  }
  return length;
}


x86 assembly (clang, -O0):
<strlength>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1138 <strlength+0x38>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <strlength+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlength>:
cmpb   $0x0,(%rdi)
je     111c <strlength+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <strlength+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @strlength(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %4
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @strlength(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add nuw nsw i32 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %12
}