xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ OAL_OBTAIN_SEMAPHORE();
int /*<<< orphan*/ OAL_RELEASE_SEMAPHORE();
int spi_bulkwrite(void *, unsigned short, unsigned char, unsigned char *, int);
int fc8150_spib_longwrite(void *hDevice, unsigned short addr,
                          unsigned int data) {
  int res;
  unsigned char command = 0x00 | 0x80;
  OAL_OBTAIN_SEMAPHORE();
  res = spi_bulkwrite(hDevice, addr, command, (unsigned char *)&data, 4);
  OAL_RELEASE_SEMAPHORE();
  return res;
}


x86 assembly (clang, -O0):
<fc8150_spib_longwrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    %edx,-0x10(%rbp)
movb   $0x80,-0x15(%rbp)
mov    $0x0,%al
call   1050 <OAL_OBTAIN_SEMAPHORE@plt>
mov    -0x8(%rbp),%rdi
mov    -0xa(%rbp),%dx
mov    -0x15(%rbp),%al
lea    -0x10(%rbp),%rcx
mov    $0x4,%r8d
movzwl %dx,%esi
movzbl %al,%edx
call   1040 <spi_bulkwrite@plt>
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1030 <OAL_RELEASE_SEMAPHORE@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc8150_spib_longwrite>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    %edx,0x4(%rsp)
xor    %eax,%eax
call   1050 <OAL_OBTAIN_SEMAPHORE@plt>
lea    0x4(%rsp),%rcx
mov    %rbx,%rdi
mov    %ebp,%esi
mov    $0x80,%edx
mov    $0x4,%r8d
call   1040 <spi_bulkwrite@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <OAL_RELEASE_SEMAPHORE@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fc8150_spib_longwrite(i8* %0, i16 zeroext %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i16
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8
store i8* %0, i8** %4
store i16 %1, i16* %5
store i32 %2, i32* %6
store i8 -128, i8* %8
%9 = call i32 (...) @OAL_OBTAIN_SEMAPHORE()
%10 = load i8*, i8** %4
%11 = load i16, i16* %5
%12 = load i8, i8* %8
%13 = bitcast i32* %6 to i8*
%14 = call i32 @spi_bulkwrite(i8* %10, i16 zeroext %11, i8 zeroext %12, i8* %13, i32 4)
store i32 %14, i32* %7
%15 = call i32 (...) @OAL_RELEASE_SEMAPHORE()
%16 = load i32, i32* %7
ret i32 %16
}

LLVM IR (-O2):
define i32 @fc8150_spib_longwrite(i8* %0, i16 zeroext %1, i32 %2) {
%4 = alloca i32
store i32 %2, i32* %4
%5 = tail call i32 (...) @OAL_OBTAIN_SEMAPHORE()
%6 = bitcast i32* %4 to i8*
%7 = call i32 @spi_bulkwrite(i8* %0, i16 zeroext %1, i8 zeroext -128, i8* %6, i32 4)
%8 = call i32 (...) @OAL_RELEASE_SEMAPHORE()
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int munlock(void *, unsigned long);
int /*<<< orphan*/ perror(char *);
void unlock_mem(void *mmap_pointer, unsigned long memory) {
  int unlock;
  unlock = munlock(mmap_pointer, memory);
  if (unlock != 0) {
    perror("munlock");
    exit(-1);
  }
}


x86 assembly (clang, -O0):
<unlock_mem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <munlock@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1170 <unlock_mem+0x40>
lea    0xe9f(%rip),%rdi
call   1040 <perror@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unlock_mem>:
push   %rax
call   1030 <munlock@plt>
test   %eax,%eax
jne    113c <unlock_mem+0xc>
pop    %rax
ret
lea    0xebd(%rip),%rdi
call   1040 <perror@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"munlock\00"
define void @unlock_mem(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i32
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i32 @munlock(i8* %6, i64 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = call i32 @perror(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%13 = call i32 @exit(i32 -1)
unreachable
14: ; preds = %2
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"munlock\00"
define void @unlock_mem(i8* %0, i64 %1) {
%3 = tail call i32 @munlock(i8* %0, i64 %1)
%4 = icmp eq i32 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @perror(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 @exit(i32 -1)
unreachable
8: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
void printstring(char *c) {
  int i = 0;
  while (c[i] != 0) {
    putchar(c[i++]);
  }
}


x86 assembly (clang, -O0):
<printstring>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1158 <printstring+0x48>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0xc(%rbp)
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <putchar@plt>
jmp    1123 <printstring+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printstring>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <printstring+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <putchar@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <printstring+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @printstring(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %20
12: ; preds = %4
%13 = load i8*, i8** %2
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
%16 = sext i32 %14 to i64
%17 = getelementptr inbounds i8, i8* %13, i64 %16
%18 = load i8, i8* %17
%19 = call i32 @putchar(i8 signext %18)
br label %4
20: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @printstring(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %7, %4 ], [ 0, %1 ]
%6 = phi i8 [ %10, %4 ], [ %2, %1 ]
%7 = add nuw i64 %5, 1
%8 = tail call i32 @putchar(i8 signext %6)
%9 = getelementptr inbounds i8, i8* %0, i64 %7
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
/* Variables and functions */
int helper(int, int);
int lastRemaining(int n) { return helper(n, 1); }


x86 assembly (clang, -O0):
<lastRemaining>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <helper@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lastRemaining>:
mov    $0x1,%esi
jmp    1030 <helper@plt>

LLVM IR (-O0):
define i32 @lastRemaining(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @helper(i32 %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @lastRemaining(i32 %0) {
%2 = tail call i32 @helper(i32 %0, i32 1)
ret i32 %2
}
/* Variables and functions */
scalar_t__ fabs(double);
int equals(double expected, double actual, double eps) {
  return (int)fabs(expected - actual) < eps;
}


x86 assembly (clang, -O0):
<equals>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
call   1030 <fabs@plt>
cvtsi2sd %eax,%xmm1
movsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<equals>:
push   %rax
movsd  %xmm2,(%rsp)
subsd  %xmm1,%xmm0
call   1030 <fabs@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
xor    %eax,%eax
movsd  (%rsp),%xmm1
ucomisd %xmm0,%xmm1
seta   %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @equals(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = fsub double %7, %8
%10 = call i64 @fabs(double %9)
%11 = trunc i64 %10 to i32
%12 = sitofp i32 %11 to double
%13 = load double, double* %6
%14 = fcmp olt double %12, %13
%15 = zext i1 %14 to i32
ret i32 %15
}

LLVM IR (-O2):
define i32 @equals(double %0, double %1, double %2) {
%4 = fsub double %0, %1
%5 = tail call i64 @fabs(double %4)
%6 = trunc i64 %5 to i32
%7 = sitofp i32 %6 to double
%8 = fcmp olt double %7, %2
%9 = zext i1 %8 to i32
ret i32 %9
}
int _rbegin(int board_size) { return board_size - 1; }


x86 assembly (clang, -O0):
<_rbegin>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_rbegin>:
lea    -0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @_rbegin(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 %3, 1
ret i32 %4
}

LLVM IR (-O2):
define i32 @_rbegin(i32 %0) {
%2 = add nsw i32 %0, -1
ret i32 %2
}
/* Variables and functions */
scalar_t__ calloc(scalar_t__, int);
int /*<<< orphan*/ sprintf(char *, char *, char *, char *);
scalar_t__ strlen(char *);
char *make_noop_string(char *str) {
  char *newp;
  newp = (char *)calloc(strlen(str) + strlen("noop") + 2, sizeof(char));
  sprintf(newp, "%s_%s", "noop", str);
  return newp;
}


x86 assembly (clang, -O0):
<make_noop_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x18(%rbp)
lea    0xeb0(%rip),%rdi
call   1030 <strlen@plt>
mov    -0x18(%rbp),%rdi
add    %rax,%rdi
add    $0x2,%rdi
mov    $0x1,%esi
call   1040 <calloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rcx
lea    0xe88(%rip),%rsi
lea    0xe7c(%rip),%rdx
call   1050 <sprintf@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_noop_string>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <strlen@plt>
lea    0x6(%rax),%rdi
mov    $0x1,%esi
call   1040 <calloc@plt>
mov    %rax,%rbx
lea    0xeb1(%rip),%rsi
lea    0xea5(%rip),%rdx
mov    %rax,%rdi
mov    %r14,%rcx
call   1050 <sprintf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [5 x i8] c"noop\00"
@.str.1 = [6 x i8] c"%s_%s\00"
define i8* @make_noop_string(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = call i64 @strlen(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%7 = add nsw i64 %5, %6
%8 = add nsw i64 %7, 2
%9 = call i64 @calloc(i64 %8, i32 1)
%10 = inttoptr i64 %9 to i8*
store i8* %10, i8** %3
%11 = load i8*, i8** %3
%12 = load i8*, i8** %2
%13 = call i32 @sprintf(i8* %11, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %12)
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
@.str = [5 x i8] c"noop\00"
@.str.1 = [6 x i8] c"%s_%s\00"
define i8* @make_noop_string(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 6
%4 = tail call i64 @calloc(i64 %3, i32 1)
%5 = inttoptr i64 %4 to i8*
%6 = tail call i32 @sprintf(i8* dereferenceable(1) %5, i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ glp_assert_(char *, char *, int);
void _glp_dlclose(void *h) {
  ((void)((h != h) ||
          (glp_assert_(
               "h != h",
               "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/MarhesLab/NeeleyThesisCode/"
               "refs/heads/master/lib/glpk-4.55/src/env/dlsup.c",
               161),
           1)));
  return;
}


x86 assembly (clang, -O0):
<_glp_dlclose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x1,%al
cmp    -0x8(%rbp),%rcx
mov    %al,-0x9(%rbp)
jne    114c <_glp_dlclose+0x3c>
lea    0xeca(%rip),%rdi
lea    0xeca(%rip),%rsi
mov    $0xa1,%edx
call   1030 <glp_assert_@plt>
mov    $0x1,%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_glp_dlclose>:
lea    0xee9(%rip),%rdi
lea    0xee9(%rip),%rsi
mov    $0xa1,%edx
jmp    1030 <glp_assert_@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"h != h\00"
@.str.1 = [165 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/MarhesLab/NeeleyThesisCode/refs/heads/master/lib/glpk-4.55/src/env/dlsup.c\00"
define void @_glp_dlclose(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = icmp ne i8* %3, %4
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = call i32 @glp_assert_(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([165 x i8], [165 x i8]* @.str.1, i64 0, i64 0), i32 161)
br label %8
8: ; preds = %6, %1
%9 = phi i1 [ true, %1 ], [ true, %6 ]
%10 = zext i1 %9 to i32
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"h != h\00"
@.str.1 = [165 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/MarhesLab/NeeleyThesisCode/refs/heads/master/lib/glpk-4.55/src/env/dlsup.c\00"
define void @_glp_dlclose(i8* nocapture readnone %0) {
%2 = tail call i32 @glp_assert_(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([165 x i8], [165 x i8]* @.str.1, i64 0, i64 0), i32 161)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GPUmakeSnapshot();
void ZN_GPUmakeSnapshot(void) { GPUmakeSnapshot(); }


x86 assembly (clang, -O0):
<ZN_GPUmakeSnapshot>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GPUmakeSnapshot@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZN_GPUmakeSnapshot>:
xor    %eax,%eax
jmp    1030 <GPUmakeSnapshot@plt>

LLVM IR (-O0):
define void @ZN_GPUmakeSnapshot() {
%1 = call i32 (...) @GPUmakeSnapshot()
ret void
}

LLVM IR (-O2):
define void @ZN_GPUmakeSnapshot() {
%1 = tail call i32 (...) @GPUmakeSnapshot()
ret void
}
/* Type definitions */
typedef char *gid_t;

/* Variables and functions */
gid_t getgid(void) {
  long __res;
  __asm__ volatile("int $0x80" : "=a"(__res) : "0"(47));
  do {
    return (gid_t)(__res);
  } while (0);
}


x86 assembly (clang, -O0):
<getgid>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2f,%eax
int    $0x80
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getgid>:
mov    $0x2f,%eax
int    $0x80
ret

LLVM IR (-O0):
define i8* @getgid() {
%1 = alloca i64
%2 = call i64 asm sideeffect "int $$0x80", "={ax},0,~{dirflag},~{fpsr},~{flags}"(i64 47)
store i64 %2, i64* %1
br label %3
3: ; preds = %0
%4 = load i64, i64* %1
%5 = inttoptr i64 %4 to i8*
br label %6
6: ; preds = %3
ret i8* %5
}

LLVM IR (-O2):
define i8* @getgid() {
%1 = tail call i64 asm sideeffect "int $$0x80", "={ax},0,~{dirflag},~{fpsr},~{flags}"(i64 47)
%2 = inttoptr i64 %1 to i8*
ret i8* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ GLint;

/* Variables and functions */
int /*<<< orphan*/ glTexCoord1iv(int /*<<< orphan*/ *);
void TexCoord1iv(GLint v[1]) { glTexCoord1iv(v); }


x86 assembly (clang, -O0):
<TexCoord1iv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <glTexCoord1iv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TexCoord1iv>:
jmp    1030 <glTexCoord1iv@plt>

LLVM IR (-O0):
define void @TexCoord1iv(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @glTexCoord1iv(i32* %3)
ret void
}

LLVM IR (-O2):
define void @TexCoord1iv(i32* %0) {
%2 = tail call i32 @glTexCoord1iv(i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ get();
int /*<<< orphan*/ getchar();
int /*<<< orphan*/ mincost(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ put();
void main() {
  get();
  printf("\n\nThe Path is:\n\n");
  mincost(0);
  put();
  getchar();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1060 <get@plt>
lea    0xe9e(%rip),%rdi
call   1040 <printf@plt>
xor    %edi,%edi
call   1070 <mincost@plt>
mov    $0x0,%al
call   1030 <put@plt>
mov    $0x0,%al
call   1050 <getchar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <get@plt>
lea    0xea1(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1070 <mincost@plt>
xor    %eax,%eax
call   1040 <put@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <getchar@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"\0A\0AThe Path is:\0A\0A\00"
define void @main() {
%1 = call i32 (...) @get()
%2 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @mincost(i32 0)
%4 = call i32 (...) @put()
%5 = call i32 (...) @getchar()
ret void
}

LLVM IR (-O2):
@str = [16 x i8] c"\0A\0AThe Path is:\0A\00"
define void @main() {
%1 = tail call i32 (...) @get()
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @mincost(i32 0)
%4 = tail call i32 (...) @put()
%5 = tail call i32 (...) @getchar()
ret void
}
int pcibus_to_node(struct pci_bus *bus) { return -1; }


x86 assembly (clang, -O0):
<pcibus_to_node>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcibus_to_node>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.pci_bus = type opaque
define i32 @pcibus_to_node(%struct.pci_bus* %0) {
%2 = alloca %struct.pci_bus*
store %struct.pci_bus* %0, %struct.pci_bus** %2
ret i32 -1
}

LLVM IR (-O2):
%struct.pci_bus = type opaque
define i32 @pcibus_to_node(%struct.pci_bus* nocapture readnone %0) {
ret i32 -1
}
int is_delim(char c, const char *delims) {
  while (*delims != '\0')
    if (c == *delims)
      return 1;
    else
      delims++;
  return 0;
}


x86 assembly (clang, -O0):
<is_delim>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     114e <is_delim+0x4e>
movsbl -0x5(%rbp),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jne    113d <is_delim+0x3d>
movl   $0x1,-0x4(%rbp)
jmp    1155 <is_delim+0x55>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110e <is_delim+0xe>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_delim>:
mov    (%rsi),%cl
xor    %eax,%eax
test   %cl,%cl
je     1120 <is_delim+0x20>
add    $0x1,%rsi
nopl   0x0(%rax)
cmp    %dil,%cl
je     1121 <is_delim+0x21>
movzbl (%rsi),%ecx
add    $0x1,%rsi
test   %cl,%cl
jne    1110 <is_delim+0x10>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_delim(i8 signext %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i8*
store i8 %0, i8* %4
store i8* %1, i8** %5
br label %6
6: ; preds = %22, %2
%7 = load i8*, i8** %5
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %23
11: ; preds = %6
%12 = load i8, i8* %4
%13 = sext i8 %12 to i32
%14 = load i8*, i8** %5
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %13, %16
br i1 %17, label %18, label %19
18: ; preds = %11
store i32 1, i32* %3
br label %24
19: ; preds = %11
%20 = load i8*, i8** %5
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %5
br label %22
22: ; preds = %19
br label %6
23: ; preds = %6
store i32 0, i32* %3
br label %24
24: ; preds = %23, %18
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @is_delim(i8 signext %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %8
5: ; preds = %8
%6 = load i8, i8* %12
%7 = icmp eq i8 %6, 0
br i1 %7, label %13, label %8
8: ; preds = %2, %5
%9 = phi i8 [ %6, %5 ], [ %3, %2 ]
%10 = phi i8* [ %12, %5 ], [ %1, %2 ]
%11 = icmp eq i8 %9, %0
%12 = getelementptr inbounds i8, i8* %10, i64 1
br i1 %11, label %13, label %5
13: ; preds = %8, %5, %2
%14 = phi i32 [ 0, %2 ], [ 0, %5 ], [ 1, %8 ]
ret i32 %14
}
/* Variables and functions */
int omp_get_num_procs();
int /*<<< orphan*/ omp_set_num_threads(int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int nthreads;
#pragma omp
  {
    nthreads = omp_get_num_procs();
    omp_set_num_threads(nthreads);
  }
  printf("The number of core is %d\n", nthreads);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <omp_get_num_procs@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1050 <omp_set_num_threads@plt>
mov    -0x8(%rbp),%esi
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <omp_get_num_procs@plt>
mov    %eax,%ebx
mov    %eax,%edi
call   1050 <omp_set_num_threads@plt>
lea    0xeb8(%rip),%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"The number of core is %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @omp_get_num_procs()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @omp_set_num_threads(i32 %4)
%6 = load i32, i32* %2
%7 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [26 x i8] c"The number of core is %d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @omp_get_num_procs()
%2 = tail call i32 @omp_set_num_threads(i32 %1)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Type definitions */
struct menu {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ conf_save();
void handle_f6(int *key, struct menu *current_item) {
  conf_save();
  return;
}


x86 assembly (clang, -O0):
<handle_f6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <conf_save@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_f6>:
xor    %eax,%eax
jmp    1030 <conf_save@plt>

LLVM IR (-O0):
%struct.menu = type { i32 }
define void @handle_f6(i32* %0, %struct.menu* %1) {
%3 = alloca i32*
%4 = alloca %struct.menu*
store i32* %0, i32** %3
store %struct.menu* %1, %struct.menu** %4
%5 = call i32 (...) @conf_save()
ret void
}

LLVM IR (-O2):
%struct.menu = type { i32 }
define void @handle_f6(i32* nocapture readnone %0, %struct.menu* nocapture readnone %1) {
%3 = tail call i32 (...) @conf_save()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void ui_version() { fprintf(stderr, "SMLGR Inverter Daemon\n"); }


x86 assembly (clang, -O0):
<ui_version>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ui_version>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [23 x i8] c"SMLGR Inverter Daemon\0A\00"
define void @ui_version() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [23 x i8] c"SMLGR Inverter Daemon\0A\00"
define void @ui_version() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret void
}
int grn_expr_parserFallback(int iToken) {
  (void)iToken;
  return 0;
}


x86 assembly (clang, -O0):
<grn_expr_parserFallback>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<grn_expr_parserFallback>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @grn_expr_parserFallback(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @grn_expr_parserFallback(i32 %0) {
ret i32 0
}
int dbg_printf(const char *format, ...) { return 0; }


x86 assembly (clang, -O0):
<dbg_printf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbg_printf>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dbg_printf(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @dbg_printf(i8* nocapture readnone %0, ...) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ LazyFreeLinkReleaseObject(void *);
void LazyFreeLinkFree(void *value) { LazyFreeLinkReleaseObject(value); }


x86 assembly (clang, -O0):
<LazyFreeLinkFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <LazyFreeLinkReleaseObject@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LazyFreeLinkFree>:
jmp    1030 <LazyFreeLinkReleaseObject@plt>

LLVM IR (-O0):
define void @LazyFreeLinkFree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @LazyFreeLinkReleaseObject(i8* %3)
ret void
}

LLVM IR (-O2):
define void @LazyFreeLinkFree(i8* %0) {
%2 = tail call i32 @LazyFreeLinkReleaseObject(i8* %0)
ret void
}
/* Type definitions */
struct env_node {
  int dummy;
};

/* Variables and functions */
struct env_node *env_empty() {
  return NULL;
}


x86 assembly (clang, -O0):
<env_empty>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<env_empty>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.env_node = type { i32 }
define %struct.env_node* @env_empty() {
ret %struct.env_node* null
}

LLVM IR (-O2):
%struct.env_node = type { i32 }
define noalias %struct.env_node* @env_empty() {
ret %struct.env_node* null
}
int ft_is_numeric(char c) {
  if (c >= 48 && c <= 57)
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<ft_is_numeric>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1130 <ft_is_numeric+0x30>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jg     1130 <ft_is_numeric+0x30>
movl   $0x1,-0x4(%rbp)
jmp    1137 <ft_is_numeric+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_is_numeric>:
add    $0xd0,%dil
xor    %eax,%eax
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @ft_is_numeric(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %13
12: ; preds = %7, %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @ft_is_numeric(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
int impl(int a, int b, int c, int *overflow) {
  __asm__ __volatile__("imul %0, %1\t\n"
                       "sub %2, %1\t\n"
                       "mov %1, %%eax" ::"r"(a),
                       "r"(b), "r"(c)
                       : "%eax");
}


x86 assembly (clang, -O0):
<impl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%esi
imul   %ecx,%edx
sub    %esi,%edx
mov    %edx,%eax
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<impl>:
imul   %edi,%esi
sub    %edx,%esi
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @impl(i32 %0, i32 %1, i32 %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32*
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32* %3, i32** %9
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = load i32, i32* %5
ret i32 %13
}

LLVM IR (-O2):
define i32 @impl(i32 %0, i32 %1, i32 %2, i32* nocapture readnone %3) {
tail call void asm sideeffect "imul $0, $1\09\0Asub $2, $1\09\0Amov $1, %eax", "r,r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 %0, i32 %1, i32 %2)
ret i32 undef
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ prg8setBank1(int);
void m33setParams8XX1(uint16_t addr, uint8_t val) {
  (void)addr;
  prg8setBank1((val & 0x3F) << 13);
}


x86 assembly (clang, -O0):
<m33setParams8XX1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
and    $0x3f,%edi
shl    $0xd,%edi
call   1030 <prg8setBank1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m33setParams8XX1>:
mov    %esi,%edi
and    $0x3f,%edi
shl    $0xd,%edi
jmp    1030 <prg8setBank1@plt>

LLVM IR (-O0):
define void @m33setParams8XX1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = and i32 %6, 63
%8 = shl i32 %7, 13
%9 = call i32 @prg8setBank1(i32 %8)
ret void
}

LLVM IR (-O2):
define void @m33setParams8XX1(i32 %0, i32 %1) {
%3 = shl i32 %1, 13
%4 = and i32 %3, 516096
%5 = tail call i32 @prg8setBank1(i32 %4)
ret void
}
int isHexadecimal(int c) {
  switch (c) {
  case 'a':
  case 'b':
  case 'c':
  case 'd':
  case 'e':
  case 'f':
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<isHexadecimal>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffff9f,%eax
sub    $0x5,%eax
ja     1127 <isHexadecimal+0x27>
jmp    111b <isHexadecimal+0x1b>
movl   $0x1,-0x4(%rbp)
jmp    112e <isHexadecimal+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isHexadecimal>:
add    $0xffffff9f,%edi
xor    %eax,%eax
cmp    $0x6,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isHexadecimal(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 97, label %5
i32 98, label %5
i32 99, label %5
i32 100, label %5
i32 101, label %5
i32 102, label %5
]
5: ; preds = %1, %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @isHexadecimal(i32 %0) {
%2 = add i32 %0, -97
%3 = icmp ult i32 %2, 6
%4 = zext i1 %3 to i32
ret i32 %4
}
void rop3_39_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = T ^ S;
  stk3 = ~stk3;
  stk2 = *D | stk3;
  stk1 = S ^ stk2;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_39_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xd(%rbp)
movzbl -0xd(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_39_0_0>:
xor    %esi,%edx
not    %dl
or     (%rdi),%dl
xor    %sil,%dl
mov    %dl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_39_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %6
%11 = zext i8 %10 to i32
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = xor i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %9
%16 = load i8, i8* %9
%17 = zext i8 %16 to i32
%18 = xor i32 %17, -1
%19 = trunc i32 %18 to i8
store i8 %19, i8* %9
%20 = load i8*, i8** %4
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = load i8, i8* %9
%24 = zext i8 %23 to i32
%25 = or i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %8
%27 = load i8, i8* %5
%28 = zext i8 %27 to i32
%29 = load i8, i8* %8
%30 = zext i8 %29 to i32
%31 = xor i32 %28, %30
%32 = trunc i32 %31 to i8
store i8 %32, i8* %7
%33 = load i8, i8* %7
%34 = load i8*, i8** %4
store i8 %33, i8* %34
ret void
}

LLVM IR (-O2):
define void @rop3_39_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = xor i8 %1, %2
%5 = xor i8 %4, -1
%6 = load i8, i8* %0
%7 = or i8 %6, %5
%8 = xor i8 %7, %1
store i8 %8, i8* %0
ret void
}
/* Type definitions */
struct pt_regs {
  int dummy;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ PTRACE_SETREGS;
int /*<<< orphan*/ perror(char *);
scalar_t__ ptrace(int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/ *,
                  struct pt_regs *);
int ptrace_setregs(pid_t pid, struct pt_regs *regs) {
  if (ptrace(PTRACE_SETREGS, pid, NULL, regs) < 0) {
    perror("ptrace_setregs: Can not set register values");
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<ptrace_setregs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb2(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rcx
xor    %eax,%eax
mov    %eax,%edx
call   1030 <ptrace@plt>
cmp    $0x0,%rax
jge    116a <ptrace_setregs+0x4a>
lea    0xea7(%rip),%rdi
call   1040 <perror@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1171 <ptrace_setregs+0x51>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptrace_setregs>:
push   %rbx
mov    %rsi,%rcx
mov    %edi,%esi
mov    0x2ebb(%rip),%rax
mov    (%rax),%edi
xor    %ebx,%ebx
xor    %edx,%edx
call   1030 <ptrace@plt>
test   %rax,%rax
js     1141 <ptrace_setregs+0x21>
mov    %ebx,%eax
pop    %rbx
ret
lea    0xeb8(%rip),%rdi
call   1040 <perror@plt>
mov    $0xffffffff,%ebx
jmp    113d <ptrace_setregs+0x1d>

LLVM IR (-O0):
%struct.pt_regs = type { i32 }
@PTRACE_SETREGS = global i32 0
@.str = [44 x i8] c"ptrace_setregs: Can not set register values\00"
define i32 @ptrace_setregs(i32 %0, %struct.pt_regs* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca %struct.pt_regs*
store i32 %0, i32* %4
store %struct.pt_regs* %1, %struct.pt_regs** %5
%6 = load i32, i32* @PTRACE_SETREGS
%7 = load i32, i32* %4
%8 = load %struct.pt_regs*, %struct.pt_regs** %5
%9 = call i64 @ptrace(i32 %6, i32 %7, i32* null, %struct.pt_regs* %8)
%10 = icmp slt i64 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = call i32 @perror(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %3
br label %14
13: ; preds = %2
store i32 0, i32* %3
br label %14
14: ; preds = %13, %11
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
%struct.pt_regs = type { i32 }
@PTRACE_SETREGS = global i32 0
@.str = [44 x i8] c"ptrace_setregs: Can not set register values\00"
define i32 @ptrace_setregs(i32 %0, %struct.pt_regs* %1) {
%3 = load i32, i32* @PTRACE_SETREGS
%4 = tail call i64 @ptrace(i32 %3, i32 %0, i32* null, %struct.pt_regs* %1)
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @perror(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ -1, %6 ], [ 0, %2 ]
ret i32 %9
}
/* Type definitions */
struct strbuf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ strbuf_addchars(struct strbuf *, char, int);
int /*<<< orphan*/ strbuf_init(struct strbuf *, int);
void make_buffer(struct strbuf *buffer) {
  strbuf_init(buffer, 11102809);
  strbuf_addchars(buffer, 'a', 111028439);
}


x86 assembly (clang, -O0):
<make_buffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xa96a59,%esi
call   1030 <strbuf_init@plt>
mov    -0x8(%rbp),%rdi
mov    $0x61,%esi
mov    $0x69e28d7,%edx
call   1040 <strbuf_addchars@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_buffer>:
push   %rbx
mov    %rdi,%rbx
mov    $0xa96a59,%esi
call   1030 <strbuf_init@plt>
mov    %rbx,%rdi
mov    $0x61,%esi
mov    $0x69e28d7,%edx
pop    %rbx
jmp    1040 <strbuf_addchars@plt>

LLVM IR (-O0):
%struct.strbuf = type { i32 }
define void @make_buffer(%struct.strbuf* %0) {
%2 = alloca %struct.strbuf*
store %struct.strbuf* %0, %struct.strbuf** %2
%3 = load %struct.strbuf*, %struct.strbuf** %2
%4 = call i32 @strbuf_init(%struct.strbuf* %3, i32 11102809)
%5 = load %struct.strbuf*, %struct.strbuf** %2
%6 = call i32 @strbuf_addchars(%struct.strbuf* %5, i8 signext 97, i32 111028439)
ret void
}

LLVM IR (-O2):
%struct.strbuf = type { i32 }
define void @make_buffer(%struct.strbuf* %0) {
%2 = tail call i32 @strbuf_init(%struct.strbuf* %0, i32 11102809)
%3 = tail call i32 @strbuf_addchars(%struct.strbuf* %0, i8 signext 97, i32 111028439)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int run_repl() {
  printf("REPL isn't implemented yet, sorry! :(\n");
  return 0;
}


x86 assembly (clang, -O0):
<run_repl>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<run_repl>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [39 x i8] c"REPL isn't implemented yet, sorry! :(\0A\00"
define i32 @run_repl() {
%1 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [38 x i8] c"REPL isn't implemented yet, sorry! :(\00"
define i32 @run_repl() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Lcd_On();
char lcdOn(void *parameters) {
  Lcd_On();
  return 0;
}


x86 assembly (clang, -O0):
<lcdOn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <Lcd_On@plt>
xor    %eax,%eax
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcdOn>:
push   %rax
xor    %eax,%eax
call   1030 <Lcd_On@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @lcdOn(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @Lcd_On()
ret i8 0
}

LLVM IR (-O2):
define signext i8 @lcdOn(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @Lcd_On()
ret i8 0
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t uint16_big_decode(const uint8_t *p_encoded_data) {
  return ((((uint16_t)((uint8_t *)p_encoded_data)[0]) << 8) |
          (((uint16_t)((uint8_t *)p_encoded_data)[1])));
}


x86 assembly (clang, -O0):
<uint16_big_decode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%rcx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uint16_big_decode>:
mov    (%rdi),%eax
shl    $0x8,%eax
or     0x8(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @uint16_big_decode(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = getelementptr inbounds i64, i64* %3, i64 0
%5 = load i64, i64* %4
%6 = trunc i64 %5 to i32
%7 = shl i32 %6, 8
%8 = load i64*, i64** %2
%9 = getelementptr inbounds i64, i64* %8, i64 1
%10 = load i64, i64* %9
%11 = trunc i64 %10 to i32
%12 = or i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @uint16_big_decode(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = trunc i64 %2 to i32
%4 = shl i32 %3, 8
%5 = getelementptr inbounds i64, i64* %0, i64 1
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
%8 = or i32 %4, %7
ret i32 %8
}
void XSendEvent() {}


x86 assembly (clang, -O0):
<XSendEvent>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XSendEvent>:
ret

LLVM IR (-O0):
define void @XSendEvent() {
ret void
}

LLVM IR (-O2):
define void @XSendEvent() {
ret void
}
/* Type definitions */
struct spectrum_buffer {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ put_spectrum_free_buffer(struct spectrum_buffer *);
void free_spectrum_buffer(struct spectrum_buffer *buffer) {
  put_spectrum_free_buffer(buffer);
}


x86 assembly (clang, -O0):
<free_spectrum_buffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <put_spectrum_free_buffer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_spectrum_buffer>:
jmp    1030 <put_spectrum_free_buffer@plt>

LLVM IR (-O0):
%struct.spectrum_buffer = type { i32 }
define void @free_spectrum_buffer(%struct.spectrum_buffer* %0) {
%2 = alloca %struct.spectrum_buffer*
store %struct.spectrum_buffer* %0, %struct.spectrum_buffer** %2
%3 = load %struct.spectrum_buffer*, %struct.spectrum_buffer** %2
%4 = call i32 @put_spectrum_free_buffer(%struct.spectrum_buffer* %3)
ret void
}

LLVM IR (-O2):
%struct.spectrum_buffer = type { i32 }
define void @free_spectrum_buffer(%struct.spectrum_buffer* %0) {
%2 = tail call i32 @put_spectrum_free_buffer(%struct.spectrum_buffer* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ error_fatal(char *);
void *realloc(void *, size_t);
void *xmalloc(size_t);
void *xrealloc(void *ptr, size_t num) {
  void *ptr_new;
  if (!ptr)
    return xmalloc(num);
  ptr_new = realloc(ptr, num);
  if (!ptr_new)
    error_fatal("unable to allocate memory");
  return ptr_new;
}


x86 assembly (clang, -O0):
<xrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    115d <xrealloc+0x2d>
mov    -0x18(%rbp),%rdi
call   1030 <xmalloc@plt>
mov    %rax,-0x8(%rbp)
jmp    118d <xrealloc+0x5d>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1185 <xrealloc+0x55>
lea    0xe80(%rip),%rdi
call   1050 <error_fatal@plt>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrealloc>:
test   %rdi,%rdi
je     1142 <xrealloc+0x12>
push   %rax
call   1040 <realloc@plt>
test   %rax,%rax
je     114a <xrealloc+0x1a>
pop    %rcx
ret
mov    %rsi,%rdi
jmp    1030 <xmalloc@plt>
lea    0xeaf(%rip),%rdi
call   1050 <error_fatal@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"unable to allocate memory\00"
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %12, label %9
9: ; preds = %2
%10 = load i64, i64* %5
%11 = call i8* @xmalloc(i64 %10)
store i8* %11, i8** %3
br label %22
12: ; preds = %2
%13 = load i8*, i8** %4
%14 = load i64, i64* %5
%15 = call i8* @realloc(i8* %13, i64 %14)
store i8* %15, i8** %6
%16 = load i8*, i8** %6
%17 = icmp ne i8* %16, null
br i1 %17, label %20, label %18
18: ; preds = %12
%19 = call i32 @error_fatal(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
br label %20
20: ; preds = %18, %12
%21 = load i8*, i8** %6
store i8* %21, i8** %3
br label %22
22: ; preds = %20, %9
%23 = load i8*, i8** %3
ret i8* %23
}

LLVM IR (-O2):
@.str = [26 x i8] c"unable to allocate memory\00"
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i8* @xmalloc(i64 %1)
br label %11
6: ; preds = %2
%7 = tail call i8* @realloc(i8* %0, i64 %1)
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = tail call i32 @error_fatal(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %6, %9, %4
%12 = phi i8* [ %5, %4 ], [ null, %9 ], [ %7, %6 ]
ret i8* %12
}
/* Variables and functions */
int /*<<< orphan*/ PPMin(char *);
int main(int argc, char *argv[]) {
  while (--argc) {
    PPMin(argv[argc]);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
je     114e <main+0x3e>
mov    -0x10(%rbp),%rax
movslq -0x8(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <PPMin@plt>
jmp    1126 <main+0x16>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
mov    %edi,%eax
add    $0xffffffff,%eax
je     1142 <main+0x32>
cltq
lea    (%rsi,%rax,8),%r14
mov    $0x1,%r15d
sub    %edi,%r15d
xor    %ebx,%ebx
nopl   (%rax)
mov    (%r14,%rbx,8),%rdi
call   1030 <PPMin@plt>
add    $0xffffffffffffffff,%rbx
cmp    %ebx,%r15d
jne    1130 <main+0x20>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
br label %6
6: ; preds = %10, %2
%7 = load i32, i32* %4
%8 = add nsw i32 %7, -1
store i32 %8, i32* %4
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %6
%11 = load i8**, i8*** %5
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8*, i8** %11, i64 %13
%15 = load i8*, i8** %14
%16 = call i32 @PPMin(i8* %15)
br label %6
17: ; preds = %6
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = add i32 %0, -1
%4 = icmp eq i32 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2
%6 = sext i32 %3 to i64
br label %7
7: ; preds = %5, %7
%8 = phi i64 [ %6, %5 ], [ %12, %7 ]
%9 = getelementptr inbounds i8*, i8** %1, i64 %8
%10 = load i8*, i8** %9
%11 = tail call i32 @PPMin(i8* %10)
%12 = add nsw i64 %8, -1
%13 = trunc i64 %12 to i32
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %7
15: ; preds = %7, %2
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int math;
  int physics;
  int check;
  math = 5;
  physics = 5;
  check = !(math == 6);
  printf("%d", check);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
movl   $0x5,-0xc(%rbp)
cmpl   $0x6,-0x8(%rbp)
sete   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%esi
lea    0xeb8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 5, i32* %2
store i32 5, i32* %3
%5 = load i32, i32* %2
%6 = icmp eq i32 %5, 6
%7 = xor i1 %6, true
%8 = zext i1 %7 to i32
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 1)
ret i32 0
}