xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ IN_ClearKeysDown();
int /*<<< orphan*/ IN_UserInput(int, int);
int /*<<< orphan*/ US_CenterWindow(int, int);
int /*<<< orphan*/ US_PrintCentered(char *);
int /*<<< orphan*/ VL_Present();
void CK_GameOver() {
  US_CenterWindow(16, 3);
  US_PrintCentered("Game Over!");
  VL_Present();
  IN_ClearKeysDown();
  IN_UserInput(4 * 70, false);
}


x86 assembly (clang, -O0):
<CK_GameOver>:
push   %rbp
mov    %rsp,%rbp
mov    $0x10,%edi
mov    $0x3,%esi
call   1050 <US_CenterWindow@plt>
lea    0xe96(%rip),%rdi
call   1030 <US_PrintCentered@plt>
mov    $0x0,%al
call   1040 <VL_Present@plt>
mov    $0x0,%al
call   1070 <IN_ClearKeysDown@plt>
mov    $0x118,%edi
xor    %esi,%esi
call   1060 <IN_UserInput@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CK_GameOver>:
push   %rax
mov    $0x10,%edi
mov    $0x3,%esi
call   1050 <US_CenterWindow@plt>
lea    0xe99(%rip),%rdi
call   1030 <US_PrintCentered@plt>
xor    %eax,%eax
call   1040 <VL_Present@plt>
xor    %eax,%eax
call   1070 <IN_ClearKeysDown@plt>
mov    $0x118,%edi
xor    %esi,%esi
pop    %rax
jmp    1060 <IN_UserInput@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"Game Over!\00"
define void @CK_GameOver() {
%1 = call i32 @US_CenterWindow(i32 16, i32 3)
%2 = call i32 @US_PrintCentered(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @VL_Present()
%4 = call i32 (...) @IN_ClearKeysDown()
%5 = call i32 @IN_UserInput(i32 280, i32 0)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"Game Over!\00"
define void @CK_GameOver() {
%1 = tail call i32 @US_CenterWindow(i32 16, i32 3)
%2 = tail call i32 @US_PrintCentered(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @VL_Present()
%4 = tail call i32 (...) @IN_ClearKeysDown()
%5 = tail call i32 @IN_UserInput(i32 280, i32 0)
ret void
}
int demo_test() { return 0; }


x86 assembly (clang, -O0):
<demo_test>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<demo_test>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @demo_test() {
ret i32 0
}

LLVM IR (-O2):
define i32 @demo_test() {
ret i32 0
}
void freeaddrinfo(void *res) {}


x86 assembly (clang, -O0):
<freeaddrinfo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeaddrinfo>:
ret

LLVM IR (-O0):
define void @freeaddrinfo(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @freeaddrinfo(i8* nocapture %0) {
ret void
}
long double foo(long double x) { return x * x; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fmul   %st,%st(0)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
fldt   0x8(%rsp)
fmul   %st,%st(0)
ret

LLVM IR (-O0):
define x86_fp80 @foo(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = load x86_fp80, x86_fp80* %2
%5 = fmul x86_fp80 %3, %4
ret x86_fp80 %5
}

LLVM IR (-O2):
define x86_fp80 @foo(x86_fp80 %0) {
%2 = fmul x86_fp80 %0, %0
ret x86_fp80 %2
}
/* Variables and functions */
int /*<<< orphan*/ gsl_test_rel(double const, double const, double const,
                                char *, char const *, char const *);
void penalty2_checksol(const double x[], const double sumsq,
                       const double epsrel, const char *sname,
                       const char *pname) {
  const double sumsq_exact = 9.37629300735544219e-06;
  gsl_test_rel(sumsq, sumsq_exact, epsrel, "%s/%s sumsq", sname, pname);
  (void)x;
}


x86 assembly (clang, -O0):
<penalty2_checksol>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
mov    %rsi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
movsd  0xeca(%rip),%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm2
mov    -0x20(%rbp),%rsi
mov    -0x28(%rbp),%rdx
movsd  0xeab(%rip),%xmm1
lea    0xeac(%rip),%rdi
call   1030 <gsl_test_rel@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<penalty2_checksol>:
movaps %xmm1,%xmm2
lea    0xeee(%rip),%rdi
movsd  0xede(%rip),%xmm1
jmp    1030 <gsl_test_rel@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"%s/%s sumsq\00"
define void @penalty2_checksol(double* %0, double %1, double %2, i8* %3, i8* %4) {
%6 = alloca double*
%7 = alloca double
%8 = alloca double
%9 = alloca i8*
%10 = alloca i8*
%11 = alloca double
store double* %0, double** %6
store double %1, double* %7
store double %2, double* %8
store i8* %3, i8** %9
store i8* %4, i8** %10
store double 0x3EE3A9DBE5FC15CA, double* %11
%12 = load double, double* %7
%13 = load double, double* %8
%14 = load i8*, i8** %9
%15 = load i8*, i8** %10
%16 = call i32 @gsl_test_rel(double %12, double 0x3EE3A9DBE5FC15CA, double %13, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %14, i8* %15)
%17 = load double*, double** %6
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"%s/%s sumsq\00"
define void @penalty2_checksol(double* nocapture readnone %0, double %1, double %2, i8* %3, i8* %4) {
%6 = tail call i32 @gsl_test_rel(double %1, double 0x3EE3A9DBE5FC15CA, double %2, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %3, i8* %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ byteswap8(int /*<<< orphan*/);
double byteswap_double(double num) {
  uint64_t answer = byteswap8(*(uint64_t *)&num);
  return *(double *)&answer;
}


x86 assembly (clang, -O0):
<byteswap_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <byteswap8@plt>
mov    %eax,-0xc(%rbp)
movsd  -0xc(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<byteswap_double>:
push   %rax
movq   %xmm0,%rdi
call   1030 <byteswap8@plt>
mov    %eax,(%rsp)
movsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @byteswap_double(double %0) {
%2 = alloca double
%3 = alloca i32
store double %0, double* %2
%4 = bitcast double* %2 to i32*
%5 = load i32, i32* %4
%6 = call i32 @byteswap8(i32 %5)
store i32 %6, i32* %3
%7 = bitcast i32* %3 to double*
%8 = load double, double* %7
ret double %8
}

LLVM IR (-O2):
define double @byteswap_double(double %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = bitcast double %0 to i64
%5 = trunc i64 %4 to i32
%6 = tail call i32 @byteswap8(i32 %5)
store i32 %6, i32* %2
%7 = bitcast i32* %2 to double*
%8 = load double, double* %7
ret double %8
}
/* Variables and functions */
int /*<<< orphan*/ assignment_expr();
int /*<<< orphan*/ variable();
int yyselect();
var_dcl_cnt() {
  switch (yyselect()) {
  case 33: {
    assignment_expr();
  } break;
  case 34: {
    variable();
  } break;
  }
}


x86 assembly (clang, -O0):
<var_dcl_cnt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
call   1040 <yyselect@plt>
mov    %eax,%ecx
mov    %ecx,-0x8(%rbp)
sub    $0x21,%eax
je     1163 <var_dcl_cnt+0x33>
jmp    1152 <var_dcl_cnt+0x22>
mov    -0x8(%rbp),%eax
sub    $0x22,%eax
je     116f <var_dcl_cnt+0x3f>
jmp    1176 <var_dcl_cnt+0x46>
mov    $0x0,%al
call   1030 <assignment_expr@plt>
jmp    1176 <var_dcl_cnt+0x46>
mov    $0x0,%al
call   1050 <variable@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<var_dcl_cnt>:
push   %rax
xor    %eax,%eax
call   1040 <yyselect@plt>
cmp    $0x22,%eax
je     114b <var_dcl_cnt+0x1b>
cmp    $0x21,%eax
jne    1152 <var_dcl_cnt+0x22>
xor    %eax,%eax
call   1030 <assignment_expr@plt>
pop    %rcx
ret
xor    %eax,%eax
call   1050 <variable@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @var_dcl_cnt() {
%1 = alloca i32
%2 = call i32 (...) @yyselect()
switch i32 %2, label %7 [
i32 33, label %3
i32 34, label %5
]
3: ; preds = %0
%4 = call i32 (...) @assignment_expr()
br label %7
5: ; preds = %0
%6 = call i32 (...) @variable()
br label %7
7: ; preds = %0, %5, %3
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
define i32 @var_dcl_cnt() {
%1 = tail call i32 (...) @yyselect()
switch i32 %1, label %6 [
i32 33, label %2
i32 34, label %4
]
2: ; preds = %0
%3 = tail call i32 (...) @assignment_expr()
br label %6
4: ; preds = %0
%5 = tail call i32 (...) @variable()
br label %6
6: ; preds = %0, %4, %2
ret i32 undef
}
BeginOfProgram() {}


x86 assembly (clang, -O0):
<BeginOfProgram>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BeginOfProgram>:
ret

LLVM IR (-O0):
define i32 @BeginOfProgram() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @BeginOfProgram() {
ret i32 undef
}
int Operand_br_decode(unsigned int *valp __attribute__((__unused__))) {
  return 0;
}


x86 assembly (clang, -O0):
<Operand_br_decode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Operand_br_decode>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Operand_br_decode(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @Operand_br_decode(i32* nocapture readnone %0) {
ret i32 0
}
void sp_close_all() {}


x86 assembly (clang, -O0):
<sp_close_all>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sp_close_all>:
ret

LLVM IR (-O0):
define void @sp_close_all() {
ret void
}

LLVM IR (-O2):
define void @sp_close_all() {
ret void
}
unsigned int get_TM_min_frequency() { return 250000000; }


x86 assembly (clang, -O0):
<get_TM_min_frequency>:
push   %rbp
mov    %rsp,%rbp
mov    $0xee6b280,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_TM_min_frequency>:
mov    $0xee6b280,%eax
ret

LLVM IR (-O0):
define i32 @get_TM_min_frequency() {
ret i32 250000000
}

LLVM IR (-O2):
define i32 @get_TM_min_frequency() {
ret i32 250000000
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t evpd_ascii_len(uint8_t *evpd_body) {
  return (evpd_body[0] << 8) | evpd_body[1];
}


x86 assembly (clang, -O0):
<evpd_ascii_len>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
or     0x4(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<evpd_ascii_len>:
mov    (%rdi),%eax
shl    $0x8,%eax
or     0x4(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @evpd_ascii_len(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = shl i32 %5, 8
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = or i32 %6, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @evpd_ascii_len(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 8
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = or i32 %3, %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_format_info_set_prop_string() {
  printf("NOT IMPLEMENTED:"
         "pa_format_info_set_prop_string"
         "\n");
}


x86 assembly (clang, -O0):
<pa_format_info_set_prop_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_format_info_set_prop_string>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [48 x i8] c"NOT IMPLEMENTED:pa_format_info_set_prop_string\0A\00"
define i32 @pa_format_info_set_prop_string() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [47 x i8] c"NOT IMPLEMENTED:pa_format_info_set_prop_string\00"
define i32 @pa_format_info_set_prop_string() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([47 x i8], [47 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isprint(int);
void t_isprint_0xe3() {
  Assert_real((isprint(227) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              1140, ("isprint should be 0 for 0xe3"));
}


x86 assembly (clang, -O0):
<t_isprint_0xe3>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe3,%edi
call   1030 <isprint@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x474,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0xe3>:
push   %rax
mov    $0xe3,%edi
call   1030 <isprint@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x474,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xe3\00"
define void @t_isprint_0xe3() {
%1 = call i64 @isprint(i32 227)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1140, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xe3\00"
define void @t_isprint_0xe3() {
%1 = tail call i64 @isprint(i32 227)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1140, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int STDIN_FILENO;
int octave_stdin_fileno(void) { return STDIN_FILENO; }


x86 assembly (clang, -O0):
<octave_stdin_fileno>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<octave_stdin_fileno>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@STDIN_FILENO = global i32 0
define i32 @octave_stdin_fileno() {
%1 = load i32, i32* @STDIN_FILENO
ret i32 %1
}

LLVM IR (-O2):
@STDIN_FILENO = global i32 0
define i32 @octave_stdin_fileno() {
%1 = load i32, i32* @STDIN_FILENO
ret i32 %1
}
__attribute__((always_)) int func5b(int x) { return x < 12 ? 1 : 2; }


x86 assembly (clang, -O0):
<func5b>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0x2,%eax
mov    $0x1,%ecx
cmp    $0xc,%edx
cmovl  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func5b>:
xor    %ecx,%ecx
cmp    $0xc,%edi
setl   %cl
mov    $0x2,%eax
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @func5b(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 12
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 1, i32 2
ret i32 %6
}

LLVM IR (-O2):
define i32 @func5b(i32 %0) {
%2 = icmp slt i32 %0, 12
%3 = select i1 %2, i32 1, i32 2
ret i32 %3
}
unsigned char CheckId_Test(void) { return 0; }


x86 assembly (clang, -O0):
<CheckId_Test>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CheckId_Test>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i8 @CheckId_Test() {
ret i8 0
}

LLVM IR (-O2):
define zeroext i8 @CheckId_Test() {
ret i8 0
}
/* Variables and functions */
char toupper(unsigned char);
char *strupp(char *string) {
  char *convert;
  convert = string;
  do {
    *convert = toupper((unsigned char)*convert);
  } while (*convert++);
  return string;
}


x86 assembly (clang, -O0):
<strupp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movzbl (%rax),%edi
call   1030 <toupper@plt>
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
cmpb   $0x0,(%rax)
jne    1124 <strupp+0x14>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strupp>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    %rdi,%rbx
nopw   0x0(%rax,%rax,1)
movzbl (%rbx),%edi
call   1030 <toupper@plt>
mov    %al,(%rbx)
add    $0x1,%rbx
test   %al,%al
jne    1120 <strupp+0x10>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strupp(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %10, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = call signext i8 @toupper(i8 zeroext %7)
%9 = load i8*, i8** %3
store i8 %8, i8* %9
br label %10
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %3
%13 = load i8, i8* %11
%14 = icmp ne i8 %13, 0
br i1 %14, label %5, label %15
15: ; preds = %10
%16 = load i8*, i8** %2
ret i8* %16
}

LLVM IR (-O2):
define i8* @strupp(i8* returned %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %6, %2 ]
%4 = load i8, i8* %3
%5 = tail call signext i8 @toupper(i8 zeroext %4)
store i8 %5, i8* %3
%6 = getelementptr inbounds i8, i8* %3, i64 1
%7 = icmp eq i8 %5, 0
br i1 %7, label %8, label %2
8: ; preds = %2
ret i8* %0
}
int fun1196() { return 1196; }


x86 assembly (clang, -O0):
<fun1196>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4ac,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1196>:
mov    $0x4ac,%eax
ret

LLVM IR (-O0):
define i32 @fun1196() {
ret i32 1196
}

LLVM IR (-O2):
define i32 @fun1196() {
ret i32 1196
}
int buscaSequencial(int vetor[], int size, int buscado) {
  for (int i = 0; i < size; i++) {
    if (vetor[i] == buscado) {
      return i;
    }
  }
  return -1;
}


x86 assembly (clang, -O0):
<buscaSequencial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1153 <buscaSequencial+0x53>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x18(%rbp),%eax
jne    1140 <buscaSequencial+0x40>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115a <buscaSequencial+0x5a>
jmp    1145 <buscaSequencial+0x45>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1115 <buscaSequencial+0x15>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<buscaSequencial>:
mov    $0xffffffff,%eax
test   %esi,%esi
jle    111e <buscaSequencial+0x1e>
mov    %esi,%esi
xor    %ecx,%ecx
nopl   (%rax)
cmp    %edx,(%rdi,%rcx,4)
je     111f <buscaSequencial+0x1f>
add    $0x1,%rcx
cmp    %rcx,%rsi
jne    1110 <buscaSequencial+0x10>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @buscaSequencial(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %24, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %27
13: ; preds = %9
%14 = load i32*, i32** %5
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %7
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %23
21: ; preds = %13
%22 = load i32, i32* %8
store i32 %22, i32* %4
br label %28
23: ; preds = %13
br label %24
24: ; preds = %23
%25 = load i32, i32* %8
%26 = add nsw i32 %25, 1
store i32 %26, i32* %8
br label %9
27: ; preds = %9
store i32 -1, i32* %4
br label %28
28: ; preds = %27, %21
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @buscaSequencial(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = zext i32 %1 to i64
br label %7
7: ; preds = %5, %12
%8 = phi i64 [ 0, %5 ], [ %13, %12 ]
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = icmp eq i32 %10, %2
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %6
br i1 %14, label %17, label %7
15: ; preds = %7
%16 = trunc i64 %8 to i32
br label %17
17: ; preds = %12, %15, %3
%18 = phi i32 [ -1, %3 ], [ %16, %15 ], [ -1, %12 ]
ret i32 %18
}
/* Variables and functions */
unsigned long long _mm_crc32_u64(unsigned long long, unsigned long long);
unsigned long long test_mm_crc32_u64(unsigned long long CRC,
                                     unsigned long long V) {
  return _mm_crc32_u64(CRC, V);
}


x86 assembly (clang, -O0):
<test_mm_crc32_u64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <_mm_crc32_u64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_crc32_u64>:
jmp    1030 <_mm_crc32_u64@plt>

LLVM IR (-O0):
define i64 @test_mm_crc32_u64(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i64 @_mm_crc32_u64(i64 %5, i64 %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @test_mm_crc32_u64(i64 %0, i64 %1) {
%3 = tail call i64 @_mm_crc32_u64(i64 %0, i64 %1)
ret i64 %3
}
/* Variables and functions */
int strcmp(char const *, char const *);
int chans_sort(const void *a, const void *b) {
  return strcmp(*(const char **)a, *(const char **)b);
}


x86 assembly (clang, -O0):
<chans_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chans_sort>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @chans_sort(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i8**
%7 = load i8*, i8** %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i8**
%10 = load i8*, i8** %9
%11 = call i32 @strcmp(i8* %7, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @chans_sort(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %4, i8* dereferenceable(1) %6)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stdout;
__attribute__((noreturn)) void syntax(void) {
  fprintf(stdout, "Usage: msgmerge [OPTION] def.po ref.pot\n");
  exit(1);
}


x86 assembly (clang, -O0):
<syntax>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<syntax>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [41 x i8] c"Usage: msgmerge [OPTION] def.po ref.pot\0A\00"
define void @syntax() {
%1 = load i32, i32* @stdout
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [41 x i8] c"Usage: msgmerge [OPTION] def.po ref.pot\0A\00"
define void @syntax() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int bar();
int foo(int /*<<< orphan*/, int);
int main(int argc, char *argv[]) {
  int ch;
  if ((ch = bar()))
    return 1;
  return foo(0, bar());
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <bar@plt>
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     1155 <main+0x35>
movl   $0x1,-0x4(%rbp)
jmp    1168 <main+0x48>
mov    $0x0,%al
call   1030 <bar@plt>
mov    %eax,%esi
xor    %edi,%edi
call   1040 <foo@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <bar@plt>
test   %eax,%eax
je     1133 <main+0x13>
mov    $0x1,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <bar@plt>
xor    %edi,%edi
mov    %eax,%esi
pop    %rax
jmp    1040 <foo@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 (...) @bar()
store i32 %7, i32* %6
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, i32* %3
br label %13
10: ; preds = %2
%11 = call i32 (...) @bar()
%12 = call i32 @foo(i32 0, i32 %11)
store i32 %12, i32* %3
br label %13
13: ; preds = %10, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @bar()
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = tail call i32 (...) @bar()
%7 = tail call i32 @foo(i32 0, i32 %6)
br label %8
8: ; preds = %2, %5
%9 = phi i32 [ %7, %5 ], [ 1, %2 ]
ret i32 %9
}
int ls_costN_nm4_work(int *sz_arg, int *sz_res, int *sz_iw, int *sz_w) {
  if (sz_arg)
    *sz_arg = 1;
  if (sz_res)
    *sz_res = 2;
  if (sz_iw)
    *sz_iw = 0;
  if (sz_w)
    *sz_w = 1;
  return 0;
}


x86 assembly (clang, -O0):
<ls_costN_nm4_work>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1129 <ls_costN_nm4_work+0x29>
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
cmpq   $0x0,-0x10(%rbp)
je     113e <ls_costN_nm4_work+0x3e>
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x18(%rbp)
je     1153 <ls_costN_nm4_work+0x53>
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
cmpq   $0x0,-0x20(%rbp)
je     1168 <ls_costN_nm4_work+0x68>
mov    -0x20(%rbp),%rax
movl   $0x1,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_costN_nm4_work>:
test   %rdi,%rdi
je     110b <ls_costN_nm4_work+0xb>
movl   $0x1,(%rdi)
test   %rsi,%rsi
je     1116 <ls_costN_nm4_work+0x16>
movl   $0x2,(%rsi)
test   %rdx,%rdx
je     1121 <ls_costN_nm4_work+0x21>
movl   $0x0,(%rdx)
test   %rcx,%rcx
je     112c <ls_costN_nm4_work+0x2c>
movl   $0x1,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ls_costN_nm4_work(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %11, label %13
11: ; preds = %4
%12 = load i32*, i32** %5
store i32 1, i32* %12
br label %13
13: ; preds = %11, %4
%14 = load i32*, i32** %6
%15 = icmp ne i32* %14, null
br i1 %15, label %16, label %18
16: ; preds = %13
%17 = load i32*, i32** %6
store i32 2, i32* %17
br label %18
18: ; preds = %16, %13
%19 = load i32*, i32** %7
%20 = icmp ne i32* %19, null
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = load i32*, i32** %7
store i32 0, i32* %22
br label %23
23: ; preds = %21, %18
%24 = load i32*, i32** %8
%25 = icmp ne i32* %24, null
br i1 %25, label %26, label %28
26: ; preds = %23
%27 = load i32*, i32** %8
store i32 1, i32* %27
br label %28
28: ; preds = %26, %23
ret i32 0
}

LLVM IR (-O2):
define i32 @ls_costN_nm4_work(i32* writeonly %0, i32* writeonly %1, i32* writeonly %2, i32* writeonly %3) {
%5 = icmp eq i32* %0, null
br i1 %5, label %7, label %6
6: ; preds = %4
store i32 1, i32* %0
br label %7
7: ; preds = %6, %4
%8 = icmp eq i32* %1, null
br i1 %8, label %10, label %9
9: ; preds = %7
store i32 2, i32* %1
br label %10
10: ; preds = %9, %7
%11 = icmp eq i32* %2, null
br i1 %11, label %13, label %12
12: ; preds = %10
store i32 0, i32* %2
br label %13
13: ; preds = %12, %10
%14 = icmp eq i32* %3, null
br i1 %14, label %16, label %15
15: ; preds = %13
store i32 1, i32* %3
br label %16
16: ; preds = %15, %13
ret i32 0
}
/* Variables and functions */
int f(int *p) {
  if (NULL == p) {
    return -1;
  }
  return 2;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
xor    %eax,%eax
cmp    -0x10(%rbp),%rax
jne    1120 <f+0x20>
movl   $0xffffffff,-0x4(%rbp)
jmp    1127 <f+0x27>
movl   $0x2,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
cmp    $0x1,%rdi
sbb    %eax,%eax
or     $0x2,%eax
ret

LLVM IR (-O0):
define i32 @f(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = icmp eq i32* null, %4
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 -1, i32* %2
br label %8
7: ; preds = %1
store i32 2, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @f(i32* readnone %0) {
%2 = icmp eq i32* %0, null
%3 = select i1 %2, i32 -1, i32 2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ islower(int);
void t_islower_0x36() {
  Assert_real((islower(54) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              275, ("islower should be 0 for 6"));
}


x86 assembly (clang, -O0):
<t_islower_0x36>:
push   %rbp
mov    %rsp,%rbp
mov    $0x36,%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x113,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0x36>:
push   %rax
mov    $0x36,%edi
call   1030 <islower@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x113,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [26 x i8] c"islower should be 0 for 6\00"
define void @t_islower_0x36() {
%1 = call i64 @islower(i32 54)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 275, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [26 x i8] c"islower should be 0 for 6\00"
define void @t_islower_0x36() {
%1 = tail call i64 @islower(i32 54)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 275, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int O_CREAT;
int O_EXCL;
int O_RDWR;
int tempFileOpenFlags(void) {
  int retval;
  retval = 0 | O_CREAT | O_RDWR | O_EXCL;
  return retval;
}


x86 assembly (clang, -O0):
<tempFileOpenFlags>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eed(%rip),%rax
mov    (%rax),%eax
or     $0x0,%eax
mov    0x2ec9(%rip),%rcx
or     (%rcx),%eax
mov    0x2eb0(%rip),%rcx
or     (%rcx),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tempFileOpenFlags>:
mov    0x2ef1(%rip),%rcx
mov    0x2ed2(%rip),%rax
mov    (%rax),%eax
or     (%rcx),%eax
mov    0x2eb7(%rip),%rcx
or     (%rcx),%eax
ret

LLVM IR (-O0):
@O_CREAT = global i32 0
@O_RDWR = global i32 0
@O_EXCL = global i32 0
define i32 @tempFileOpenFlags() {
%1 = alloca i32
%2 = load i32, i32* @O_CREAT
%3 = or i32 0, %2
%4 = load i32, i32* @O_RDWR
%5 = or i32 %3, %4
%6 = load i32, i32* @O_EXCL
%7 = or i32 %5, %6
store i32 %7, i32* %1
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
@O_CREAT = global i32 0
@O_RDWR = global i32 0
@O_EXCL = global i32 0
define i32 @tempFileOpenFlags() {
%1 = load i32, i32* @O_CREAT
%2 = load i32, i32* @O_RDWR
%3 = or i32 %2, %1
%4 = load i32, i32* @O_EXCL
%5 = or i32 %3, %4
ret i32 %5
}
void _ufault_default_handler() {
  while (1)
    ;
  return;
}


x86 assembly (clang, -O0):
<_ufault_default_handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <_ufault_default_handler+0x9>
jmp    1109 <_ufault_default_handler+0x9>

x86 assembly (clang, -O2):
<_ufault_default_handler>:
jmp    1100 <_ufault_default_handler>

LLVM IR (-O0):
define void @_ufault_default_handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @_ufault_default_handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
double gsl_ran_poisson_pdf(long, double);
double pdf_Poisson(double m, long x) { return gsl_ran_poisson_pdf(x, m); }


x86 assembly (clang, -O0):
<pdf_Poisson>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
movsd  -0x8(%rbp),%xmm0
call   1030 <gsl_ran_poisson_pdf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pdf_Poisson>:
jmp    1030 <gsl_ran_poisson_pdf@plt>

LLVM IR (-O0):
define double @pdf_Poisson(double %0, i64 %1) {
%3 = alloca double
%4 = alloca i64
store double %0, double* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load double, double* %3
%7 = call double @gsl_ran_poisson_pdf(i64 %5, double %6)
ret double %7
}

LLVM IR (-O2):
define double @pdf_Poisson(double %0, i64 %1) {
%3 = tail call double @gsl_ran_poisson_pdf(i64 %1, double %0)
ret double %3
}
/* Variables and functions */
int tracepoint_probe_register(char *, void *);
__attribute__((always_)) int register_trace_mm_page_alloc_zone_locked(
    void (*probe)(struct page *page, unsigned int order, int migratetype)) {
  return tracepoint_probe_register("mm_page_alloc_zone_locked", (void *)probe);
}


x86 assembly (clang, -O0):
<register_trace_mm_page_alloc_zone_locked>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <tracepoint_probe_register@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<register_trace_mm_page_alloc_zone_locked>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <tracepoint_probe_register@plt>

LLVM IR (-O0):
%struct.page = type opaque
@.str = [26 x i8] c"mm_page_alloc_zone_locked\00"
define i32 @register_trace_mm_page_alloc_zone_locked(void (%struct.page*, i32, i32)* %0) {
%2 = alloca void (%struct.page*, i32, i32)*
store void (%struct.page*, i32, i32)* %0, void (%struct.page*, i32, i32)** %2
%3 = load void (%struct.page*, i32, i32)*, void (%struct.page*, i32, i32)** %2
%4 = bitcast void (%struct.page*, i32, i32)* %3 to i8*
%5 = call i32 @tracepoint_probe_register(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i8* %4)
ret i32 %5
}

LLVM IR (-O2):
%struct.page = type opaque
@.str = [26 x i8] c"mm_page_alloc_zone_locked\00"
define i32 @register_trace_mm_page_alloc_zone_locked(void (%struct.page*, i32, i32)* %0) {
%2 = bitcast void (%struct.page*, i32, i32)* %0 to i8*
%3 = tail call i32 @tracepoint_probe_register(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i8* %2)
ret i32 %3
}
unsigned long x86_read_cr4() {
  unsigned long val;
  __asm__ __volatile__("mov %%cr4, %0" : "=r"(val));
  return val;
}


x86 assembly (clang, -O0):
<x86_read_cr4>:
push   %rbp
mov    %rsp,%rbp
mov    %cr4,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<x86_read_cr4>:
mov    %cr4,%rax
ret

LLVM IR (-O0):
define i64 @x86_read_cr4() {
%1 = alloca i64
%2 = call i64 asm sideeffect "mov %cr4, $0", "=r,~{dirflag},~{fpsr},~{flags}"()
store i64 %2, i64* %1
%3 = load i64, i64* %1
ret i64 %3
}

LLVM IR (-O2):
define i64 @x86_read_cr4() {
%1 = tail call i64 asm sideeffect "mov %cr4, $0", "=r,~{dirflag},~{fpsr},~{flags}"()
ret i64 %1
}
int fib(int n) {
  if (n == 1)
    return 0;
  if (n == 2)
    return 1;
  return (fib(n - 2) + fib(n - 1));
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1131 <fib+0x21>
movl   $0x0,-0x4(%rbp)
jmp    116a <fib+0x5a>
cmpl   $0x2,-0x8(%rbp)
jne    1147 <fib+0x37>
movl   $0x1,-0x4(%rbp)
jmp    116a <fib+0x5a>
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x1,%ebx
je     1137 <fib+0x27>
nopl   0x0(%rax)
cmp    $0x2,%ebx
je     113b <fib+0x2b>
lea    -0x2(%rbx),%edi
call   1030 <fib@plt>
add    %eax,%ebp
add    $0xffffffff,%ebx
cmp    $0x1,%ebx
jne    1120 <fib+0x10>
xor    %eax,%eax
jmp    1140 <fib+0x30>
mov    $0x1,%eax
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %19
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 2
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 1, i32* %2
br label %19
11: ; preds = %7
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 2
%14 = call i32 @fib(i32 %13)
%15 = load i32, i32* %3
%16 = sub nsw i32 %15, 1
%17 = call i32 @fib(i32 %16)
%18 = add nsw i32 %14, %17
store i32 %18, i32* %2
br label %19
19: ; preds = %11, %10, %6
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i32 [ 0, %1 ], [ %9, %5 ]
%4 = phi i32 [ %0, %1 ], [ %8, %5 ]
switch i32 %4, label %5 [
i32 1, label %10
i32 2, label %11
]
5: ; preds = %2
%6 = add nsw i32 %4, -2
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -1
%9 = add nsw i32 %7, %3
br label %2
10: ; preds = %2
br label %11
11: ; preds = %2, %10
%12 = phi i32 [ 0, %10 ], [ 1, %2 ]
%13 = add nsw i32 %12, %3
ret i32 %13
}
void g_hook_next_valid() {}


x86 assembly (clang, -O0):
<g_hook_next_valid>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_hook_next_valid>:
ret

LLVM IR (-O0):
define void @g_hook_next_valid() {
ret void
}

LLVM IR (-O2):
define void @g_hook_next_valid() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int func() {
  printf("dead-loop\n");
  return func();
}


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
call   1040 <func@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
push   %rbx
lea    0xee8(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <puts@plt>
jmp    1120 <func+0x10>

LLVM IR (-O0):
@.str = [11 x i8] c"dead-loop\0A\00"
define i32 @func() {
%1 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @func()
ret i32 %2
}

LLVM IR (-O2):
@str = [10 x i8] c"dead-loop\00"
define i32 @func() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0))
br label %1
}
int field_len(const char *s) {
  int i = 0;
  while (s[i] != '\0') {
    if (s[i] == '\t') {
      return i;
    }
    i++;
  }
  return i;
}


x86 assembly (clang, -O0):
<field_len>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1152 <field_len+0x52>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x9,%eax
jne    1144 <field_len+0x44>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1158 <field_len+0x58>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    110f <field_len+0xf>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<field_len>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%rdi,%rax,1),%ecx
test   %cl,%cl
je     1123 <field_len+0x23>
cmp    $0x9,%cl
je     1123 <field_len+0x23>
add    $0x1,%rax
jmp    1110 <field_len+0x10>
ret

LLVM IR (-O0):
define i32 @field_len(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
br label %5
5: ; preds = %23, %1
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %26
13: ; preds = %5
%14 = load i8*, i8** %3
%15 = load i32, i32* %4
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 9
br i1 %20, label %21, label %23
21: ; preds = %13
%22 = load i32, i32* %4
store i32 %22, i32* %2
br label %28
23: ; preds = %13
%24 = load i32, i32* %4
%25 = add nsw i32 %24, 1
store i32 %25, i32* %4
br label %5
26: ; preds = %5
%27 = load i32, i32* %4
store i32 %27, i32* %2
br label %28
28: ; preds = %26, %21
%29 = load i32, i32* %2
ret i32 %29
}

LLVM IR (-O2):
define i32 @field_len(i8* nocapture %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i64 [ %7, %6 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
switch i8 %5, label %6 [
i8 0, label %8
i8 9, label %8
]
6: ; preds = %2
%7 = add nuw i64 %3, 1
br label %2
8: ; preds = %2, %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
void test(int **p) {}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
ret

LLVM IR (-O0):
define void @test(i32** %0) {
%2 = alloca i32**
store i32** %0, i32*** %2
ret void
}

LLVM IR (-O2):
define void @test(i32** nocapture %0) {
ret void
}
long __syscall0(long __n) {
  unsigned long __ret;
  __asm__ __volatile__("int $128" : "=a"(__ret) : "a"(__n) : "memory");
  return __ret;
}


x86 assembly (clang, -O0):
<__syscall0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
int    $0x80
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__syscall0>:
mov    %rdi,%rax
int    $0x80
ret

LLVM IR (-O0):
define i64 @__syscall0(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i64 asm sideeffect "int $$128", "={ax},{ax},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
define i64 @__syscall0(i64 %0) {
%2 = tail call i64 asm sideeffect "int $$128", "={ax},{ax},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %0)
ret i64 %2
}
int f(int x, int y) {
  int flag = 1;
  int c = 0;
  while (flag) {
    flag = (x++ < y);
    c = c + 1;
  }
  return c;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1149 <f+0x49>
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,-0x4(%rbp)
cmp    -0x8(%rbp),%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1118 <f+0x18>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
cmp    %edi,%esi
cmovle %edi,%esi
sub    %edi,%esi
lea    0x1(%rsi),%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 1, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %10, %2
%8 = load i32, i32* %5
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %7
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
%13 = load i32, i32* %4
%14 = icmp slt i32 %11, %13
%15 = zext i1 %14 to i32
store i32 %15, i32* %5
%16 = load i32, i32* %6
%17 = add nsw i32 %16, 1
store i32 %17, i32* %6
br label %7
18: ; preds = %7
%19 = load i32, i32* %6
ret i32 %19
}

LLVM IR (-O2):
define i32 @f(i32 %0, i32 %1) {
%3 = call i32 @llvm.smax.i32(i32 %1, i32 %0)
%4 = add i32 %3, 1
%5 = sub i32 %4, %0
ret i32 %5
}
int test_imm_45uint16_reg(unsigned short val) {
  return ((val) & (0x45 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_45uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x45,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_45uint16_reg>:
test   $0x45,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_45uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 69
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_45uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 69
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int inb(int);
int is_transmit_empty() { return inb(0x3f8 + 5) & 0x20; }


x86 assembly (clang, -O0):
<is_transmit_empty>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3fd,%edi
call   1030 <inb@plt>
and    $0x20,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_transmit_empty>:
push   %rax
mov    $0x3fd,%edi
call   1030 <inb@plt>
and    $0x20,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @is_transmit_empty() {
%1 = call i32 @inb(i32 1021)
%2 = and i32 %1, 32
ret i32 %2
}

LLVM IR (-O2):
define i32 @is_transmit_empty() {
%1 = tail call i32 @inb(i32 1021)
%2 = and i32 %1, 32
ret i32 %2
}