xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
long ADCSequenceUnderflow(unsigned long ulBase, unsigned long ulSequenceNum) {
  DEBUG_ASSERT((ulBase == 0x40038000) || (ulBase == 0x40039000));
  DEBUG_ASSERT(ulSequenceNum < 4);
  return ((*((volatile unsigned long *)(ulBase + 0x00000018))) &
          (1 << ulSequenceNum));
}


x86 assembly (clang, -O0):
<ADCSequenceUnderflow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%al
cmpq   $0x40038000,-0x8(%rbp)
40
mov    %al,-0x11(%rbp)
je     1141 <ADCSequenceUnderflow+0x31>
cmpq   $0x40039000,-0x8(%rbp)
40
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
cmpq   $0x4,-0x10(%rbp)
setb   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
mov    0x18(%rax),%rax
mov    -0x10(%rbp),%rcx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
movslq %ecx,%rcx
and    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCSequenceUnderflow>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rdi,%rax
and    $0xffffffffffffefff,%rax
xor    %edi,%edi
cmp    $0x40038000,%rax
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
xor    %edi,%edi
cmp    $0x4,%rbx
setb   %dil
call   1030 <DEBUG_ASSERT@plt>
mov    $0x1,%eax
mov    %ebx,%ecx
shl    %cl,%eax
cltq
and    0x18(%r14),%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @ADCSequenceUnderflow(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 1073971200
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i64, i64* %3
%9 = icmp eq i64 %8, 1073975296
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ true, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
%13 = call i32 @DEBUG_ASSERT(i32 %12)
%14 = load i64, i64* %4
%15 = icmp ult i64 %14, 4
%16 = zext i1 %15 to i32
%17 = call i32 @DEBUG_ASSERT(i32 %16)
%18 = load i64, i64* %3
%19 = add i64 %18, 24
%20 = inttoptr i64 %19 to i64*
%21 = load volatile i64, i64* %20
%22 = load i64, i64* %4
%23 = trunc i64 %22 to i32
%24 = shl i32 1, %23
%25 = sext i32 %24 to i64
%26 = and i64 %21, %25
ret i64 %26
}

LLVM IR (-O2):
define i64 @ADCSequenceUnderflow(i64 %0, i64 %1) {
%3 = and i64 %0, -4097
%4 = icmp eq i64 %3, 1073971200
%5 = zext i1 %4 to i32
%6 = tail call i32 @DEBUG_ASSERT(i32 %5)
%7 = icmp ult i64 %1, 4
%8 = zext i1 %7 to i32
%9 = tail call i32 @DEBUG_ASSERT(i32 %8)
%10 = add i64 %0, 24
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = trunc i64 %1 to i32
%14 = shl nuw i32 1, %13
%15 = sext i32 %14 to i64
%16 = and i64 %12, %15
ret i64 %16
}
/* Type definitions */
typedef scalar_t__ const uint8_t;

/* Variables and functions */
int /*<<< orphan*/ assert(scalar_t__ const *);
bool crack_test_decrypted_header(const uint8_t *dh, uint8_t vbyte) {
  assert(dh);
  return (dh[12 - 1] == vbyte);
}


x86 assembly (clang, -O0):
<crack_test_decrypted_header>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
mov    0x58(%rax),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crack_test_decrypted_header>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <assert@plt>
xor    %eax,%eax
cmp    %r14,0x58(%rbx)
sete   %al
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @crack_test_decrypted_header(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64
store i64* %0, i64** %3
store i64 %1, i64* %4
%5 = load i64*, i64** %3
%6 = call i32 @assert(i64* %5)
%7 = load i64*, i64** %3
%8 = getelementptr inbounds i64, i64* %7, i64 11
%9 = load i64, i64* %8
%10 = load i64, i64* %4
%11 = icmp eq i64 %9, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @crack_test_decrypted_header(i64* %0, i64 %1) {
%3 = tail call i32 @assert(i64* %0)
%4 = getelementptr inbounds i64, i64* %0, i64 11
%5 = load i64, i64* %4
%6 = icmp eq i64 %5, %1
%7 = zext i1 %6 to i32
ret i32 %7
}
int is_alpha(char character) {
  int temp_ascii = (int)character;
  if (((temp_ascii >= 65) && (temp_ascii <= 90)) ||
      ((temp_ascii >= 97) && (temp_ascii <= 122))) {
    return 4;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<is_alpha>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x41,-0xc(%rbp)
jl     1125 <is_alpha+0x25>
cmpl   $0x5a,-0xc(%rbp)
jle    1139 <is_alpha+0x39>
cmpl   $0x61,-0xc(%rbp)
jl     1145 <is_alpha+0x45>
cmpl   $0x7a,-0xc(%rbp)
jg     1145 <is_alpha+0x45>
movl   $0x4,-0x4(%rbp)
jmp    114c <is_alpha+0x4c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_alpha>:
and    $0xdf,%dil
add    $0xbf,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
shl    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @is_alpha(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp sge i32 %7, 65
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i32, i32* %4
%11 = icmp sle i32 %10, 90
br i1 %11, label %18, label %12
12: ; preds = %9, %1
%13 = load i32, i32* %4
%14 = icmp sge i32 %13, 97
br i1 %14, label %15, label %19
15: ; preds = %12
%16 = load i32, i32* %4
%17 = icmp sle i32 %16, 122
br i1 %17, label %18, label %19
18: ; preds = %15, %9
store i32 4, i32* %2
br label %20
19: ; preds = %15, %12
store i32 0, i32* %2
br label %20
20: ; preds = %19, %18
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @is_alpha(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = select i1 %4, i32 4, i32 0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ sha256(unsigned char *, int, unsigned char *,
                          int /*<<< orphan*/);
void sha256_checksum_block(char *buf, int len, unsigned char *digest) {
  sha256((unsigned char *)buf, len, digest, 0);
}


x86 assembly (clang, -O0):
<sha256_checksum_block>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
call   1030 <sha256@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sha256_checksum_block>:
xor    %ecx,%ecx
jmp    1030 <sha256@plt>

LLVM IR (-O0):
define void @sha256_checksum_block(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = call i32 @sha256(i8* %7, i32 %8, i8* %9, i32 0)
ret void
}

LLVM IR (-O2):
define void @sha256_checksum_block(i8* %0, i32 %1, i8* %2) {
%4 = tail call i32 @sha256(i8* %0, i32 %1, i8* %2, i32 0)
ret void
}
int Reminder(void) { return 0; }


x86 assembly (clang, -O0):
<Reminder>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Reminder>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Reminder() {
ret i32 0
}

LLVM IR (-O2):
define i32 @Reminder() {
ret i32 0
}
void preprocess_data() { int i, j; }


x86 assembly (clang, -O0):
<preprocess_data>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<preprocess_data>:
ret

LLVM IR (-O0):
define void @preprocess_data() {
%1 = alloca i32
%2 = alloca i32
ret void
}

LLVM IR (-O2):
define void @preprocess_data() {
ret void
}
void RandomFunc(unsigned char input[1], unsigned char output[1]) {
  unsigned char state[1];
  unsigned char local1;
  {
    state[0UL] = input[0UL] ^ (unsigned char)219;
    local1 = 0UL;
    while (local1 < 1UL) {
      state[local1] =
          state[0UL] << (((state[0UL] >> (unsigned char)1) & (unsigned char)7) |
                         1UL);
      local1 += 2UL;
    }
    output[0UL] = (state[0UL] | 214125455UL) | (unsigned char)221;
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
xor    $0xdb,%eax
mov    %al,-0x11(%rbp)
movb   $0x0,-0x12(%rbp)
movzbl -0x12(%rbp),%eax
cmp    $0x1,%rax
jae    115e <RandomFunc+0x5e>
movzbl -0x11(%rbp),%eax
movzbl -0x11(%rbp),%ecx
sar    $0x1,%ecx
and    $0x7,%ecx
movslq %ecx,%rcx
or     $0x1,%rcx
shl    %cl,%eax
mov    %al,%cl
movzbl -0x12(%rbp),%eax
mov    %cl,-0x11(%rbp,%rax,1)
movzbl -0x12(%rbp),%eax
add    $0x2,%rax
mov    %al,-0x12(%rbp)
jmp    111f <RandomFunc+0x1f>
movzbl -0x11(%rbp),%eax
or     $0xcc34b8f,%rax
or     $0xdd,%rax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
mov    (%rdi),%al
xor    $0xdb,%al
mov    %eax,%ecx
shr    %cl
and    $0x6,%cl
or     $0x1,%cl
shl    %cl,%al
or     $0xdf,%al
mov    %al,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca [1 x i8]
%6 = alloca i8
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i64 0
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = xor i32 %10, 219
%12 = trunc i32 %11 to i8
%13 = getelementptr inbounds [1 x i8], [1 x i8]* %5, i64 0, i64 0
store i8 %12, i8* %13
store i8 0, i8* %6
br label %14
14: ; preds = %18, %2
%15 = load i8, i8* %6
%16 = zext i8 %15 to i64
%17 = icmp ult i64 %16, 1
br i1 %17, label %18, label %39
18: ; preds = %14
%19 = getelementptr inbounds [1 x i8], [1 x i8]* %5, i64 0, i64 0
%20 = load i8, i8* %19
%21 = zext i8 %20 to i32
%22 = getelementptr inbounds [1 x i8], [1 x i8]* %5, i64 0, i64 0
%23 = load i8, i8* %22
%24 = zext i8 %23 to i32
%25 = ashr i32 %24, 1
%26 = and i32 %25, 7
%27 = sext i32 %26 to i64
%28 = or i64 %27, 1
%29 = trunc i64 %28 to i32
%30 = shl i32 %21, %29
%31 = trunc i32 %30 to i8
%32 = load i8, i8* %6
%33 = zext i8 %32 to i64
%34 = getelementptr inbounds [1 x i8], [1 x i8]* %5, i64 0, i64 %33
store i8 %31, i8* %34
%35 = load i8, i8* %6
%36 = zext i8 %35 to i64
%37 = add i64 %36, 2
%38 = trunc i64 %37 to i8
store i8 %38, i8* %6
br label %14
39: ; preds = %14
%40 = getelementptr inbounds [1 x i8], [1 x i8]* %5, i64 0, i64 0
%41 = load i8, i8* %40
%42 = zext i8 %41 to i64
%43 = or i64 %42, 214125455
%44 = or i64 %43, 221
%45 = trunc i64 %44 to i8
%46 = load i8*, i8** %4
%47 = getelementptr inbounds i8, i8* %46, i64 0
store i8 %45, i8* %47
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i8* nocapture %0, i8* nocapture writeonly %1) {
%3 = load i8, i8* %0
%4 = xor i8 %3, -37
%5 = lshr i8 %4, 1
%6 = and i8 %5, 6
%7 = or i8 %6, 1
%8 = shl i8 %4, %7
%9 = or i8 %8, -33
store i8 %9, i8* %1
ret void
}
int ipow(int a, int b) {
  int ret = 1;
  while (b > 0) {
    if (b & 1)
      ret *= a;
    a *= a;
    b >>= 1;
  }
  return ret;
}


x86 assembly (clang, -O0):
<ipow>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    114c <ipow+0x4c>
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1134 <ipow+0x34>
mov    -0x4(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1111 <ipow+0x11>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipow>:
test   %esi,%esi
jle    113a <ipow+0x3a>
mov    $0x1,%r8d
mov    $0x1,%eax
mov    %esi,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
test   $0x1,%sil
mov    %edi,%ecx
cmove  %r8d,%ecx
imul   %ecx,%eax
imul   %edi,%edi
shr    %edx
cmp    $0x1,%esi
mov    %edx,%esi
ja     1120 <ipow+0x20>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ipow(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 1, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %4
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %23
9: ; preds = %6
%10 = load i32, i32* %4
%11 = and i32 %10, 1
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %9
%14 = load i32, i32* %3
%15 = load i32, i32* %5
%16 = mul nsw i32 %15, %14
store i32 %16, i32* %5
br label %17
17: ; preds = %13, %9
%18 = load i32, i32* %3
%19 = load i32, i32* %3
%20 = mul nsw i32 %19, %18
store i32 %20, i32* %3
%21 = load i32, i32* %4
%22 = ashr i32 %21, 1
store i32 %22, i32* %4
br label %6
23: ; preds = %6
%24 = load i32, i32* %5
ret i32 %24
}

LLVM IR (-O2):
define i32 @ipow(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %15
4: ; preds = %2, %4
%5 = phi i32 [ %11, %4 ], [ 1, %2 ]
%6 = phi i32 [ %13, %4 ], [ %1, %2 ]
%7 = phi i32 [ %12, %4 ], [ %0, %2 ]
%8 = and i32 %6, 1
%9 = icmp eq i32 %8, 0
%10 = select i1 %9, i32 1, i32 %7
%11 = mul nsw i32 %10, %5
%12 = mul nsw i32 %7, %7
%13 = lshr i32 %6, 1
%14 = icmp ult i32 %6, 2
br i1 %14, label %15, label %4
15: ; preds = %4, %2
%16 = phi i32 [ 1, %2 ], [ %11, %4 ]
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
int /*<<< orphan*/ scanf(char *, double *);
int main(void) {
  double distancia;
  scanf("%lf", &distancia);
  printf("%.0f minutos\n", distancia * 2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xed2(%rip),%rdi
lea    -0x10(%rbp),%rsi
call   1040 <scanf@plt>
movsd  0xeb9(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
mov    %rsp,%rsi
call   1040 <scanf@plt>
movsd  (%rsp),%xmm0
addsd  %xmm0,%xmm0
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%lf\00"
@.str.1 = [14 x i8] c"%.0f minutos\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %2)
%4 = load double, double* %2
%5 = fmul double %4, 2.000000e+00
%6 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), double %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%lf\00"
@.str.1 = [14 x i8] c"%.0f minutos\0A\00"
define i32 @main() {
%1 = alloca double
%2 = bitcast double* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %1)
%4 = load double, double* %1
%5 = fmul double %4, 2.000000e+00
%6 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), double %5)
ret i32 0
}
int RCCE_global_color(int rank, void *nothing) { return (1); }


x86 assembly (clang, -O0):
<RCCE_global_color>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RCCE_global_color>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @RCCE_global_color(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret i32 1
}

LLVM IR (-O2):
define i32 @RCCE_global_color(i32 %0, i8* nocapture readnone %1) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
void space(int indent) {
  int i;
  for (i = 0; i < indent; ++i)
    putchar(' ');
}


x86 assembly (clang, -O0):
<space>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1146 <space+0x36>
mov    $0x20,%edi
call   1030 <putchar@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <space+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<space>:
push   %rbx
test   %edi,%edi
jle    112f <space+0x1f>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0x20,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebx
jne    1120 <space+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @space(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = call i32 @putchar(i8 signext 32)
br label %10
10: ; preds = %8
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @space(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = tail call i32 @putchar(i8 signext 32)
%6 = add nuw nsw i32 %4, 1
%7 = icmp eq i32 %6, %0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void crc_accumulate(uint8_t data, uint16_t *crcAccum) {
  uint8_t tmp;
  tmp = data ^ (uint8_t)(*crcAccum & 0xff);
  tmp ^= (tmp << 4);
  *crcAccum = (*crcAccum >> 8) ^ (tmp << 8) ^ (tmp << 3) ^ (tmp >> 4);
}


x86 assembly (clang, -O0):
<crc_accumulate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x10(%rbp),%rcx
mov    (%rcx),%ecx
and    $0xff,%ecx
xor    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
shl    $0x4,%eax
xor    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
sar    $0x8,%ecx
mov    -0x14(%rbp),%eax
shl    $0x8,%eax
xor    %eax,%ecx
mov    -0x14(%rbp),%eax
shl    $0x3,%eax
xor    %eax,%ecx
mov    -0x14(%rbp),%eax
sar    $0x4,%eax
xor    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<crc_accumulate>:
mov    (%rsi),%eax
movzbl %al,%ecx
xor    %edi,%ecx
mov    %ecx,%edx
shl    $0x4,%edx
xor    %ecx,%edx
sar    $0x8,%eax
mov    %edx,%ecx
shl    $0x8,%ecx
xor    %eax,%ecx
lea    0x0(,%rdx,8),%eax
sar    $0x4,%edx
xor    %eax,%edx
xor    %ecx,%edx
mov    %edx,(%rsi)
ret

LLVM IR (-O0):
define void @crc_accumulate(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
%6 = load i32, i32* %3
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = and i32 %8, 255
%10 = xor i32 %6, %9
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = shl i32 %11, 4
%13 = load i32, i32* %5
%14 = xor i32 %13, %12
store i32 %14, i32* %5
%15 = load i32*, i32** %4
%16 = load i32, i32* %15
%17 = ashr i32 %16, 8
%18 = load i32, i32* %5
%19 = shl i32 %18, 8
%20 = xor i32 %17, %19
%21 = load i32, i32* %5
%22 = shl i32 %21, 3
%23 = xor i32 %20, %22
%24 = load i32, i32* %5
%25 = ashr i32 %24, 4
%26 = xor i32 %23, %25
%27 = load i32*, i32** %4
store i32 %26, i32* %27
ret void
}

LLVM IR (-O2):
define void @crc_accumulate(i32 %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = and i32 %3, 255
%5 = xor i32 %4, %0
%6 = shl i32 %5, 4
%7 = xor i32 %6, %5
%8 = ashr i32 %3, 8
%9 = shl i32 %7, 8
%10 = xor i32 %9, %8
%11 = shl i32 %7, 3
%12 = xor i32 %10, %11
%13 = ashr i32 %7, 4
%14 = xor i32 %12, %13
store i32 %14, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char *);
int write(int, char *, int /*<<< orphan*/);
int writes(int fd, char *str) { return write(fd, str, strlen(str)); }


x86 assembly (clang, -O0):
<writes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<writes>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <write@plt>

LLVM IR (-O0):
define i32 @writes(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i32 @write(i32 %5, i8* %6, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @writes(i32 %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @write(i32 %0, i8* %1, i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ delay(int);
int /*<<< orphan*/ mbus_remote_register_write(int, int, int);
void pmu_adc_enable() {
  mbus_remote_register_write(0x8, 0x3B,
                             ((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) |
                              (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7) |
                              (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) |
                              (0 << 12) | (1 << 13) | (1 << 14) | (1 << 15) |
                              (1 << 16) | (1 << 17) | (1 << 18) | (1 << 19)));
  delay(200);
}


x86 assembly (clang, -O0):
<pmu_adc_enable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8,%edi
mov    $0x3b,%esi
mov    $0xfefff,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0xc8,%edi
call   1030 <delay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmu_adc_enable>:
push   %rax
mov    $0x8,%edi
mov    $0x3b,%esi
mov    $0xfefff,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0xc8,%edi
pop    %rax
jmp    1030 <delay@plt>

LLVM IR (-O0):
define void @pmu_adc_enable() {
%1 = call i32 @mbus_remote_register_write(i32 8, i32 59, i32 1044479)
%2 = call i32 @delay(i32 200)
ret void
}

LLVM IR (-O2):
define void @pmu_adc_enable() {
%1 = tail call i32 @mbus_remote_register_write(i32 8, i32 59, i32 1044479)
%2 = tail call i32 @delay(i32 200)
ret void
}
/* Variables and functions */
int stb_log2_ceil(unsigned int);
int stb_highbit8(unsigned int n) { return stb_log2_ceil(n & 255); }


x86 assembly (clang, -O0):
<stb_highbit8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
and    $0xff,%edi
call   1030 <stb_log2_ceil@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stb_highbit8>:
movzbl %dil,%edi
jmp    1030 <stb_log2_ceil@plt>

LLVM IR (-O0):
define i32 @stb_highbit8(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
%5 = call i32 @stb_log2_ceil(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @stb_highbit8(i32 %0) {
%2 = and i32 %0, 255
%3 = tail call i32 @stb_log2_ceil(i32 %2)
ret i32 %3
}
unsigned xrop3_80_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = ~D;
  stk1 = T & stk2;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_80_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
and    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_80_0_0>:
mov    %esi,%eax
shl    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_80_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%9 = load i8, i8* %4
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = load i8, i8* %4
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
store i32 %14, i32* %6
%15 = load i32, i32* %5
%16 = xor i32 %15, -1
store i32 %16, i32* %8
%17 = load i32, i32* %6
%18 = load i32, i32* %8
%19 = and i32 %17, %18
store i32 %19, i32* %7
%20 = load i32, i32* %7
ret i32 %20
}

LLVM IR (-O2):
define i32 @xrop3_80_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %1 to i32
%4 = shl nuw nsw i32 %3, 8
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, long long);
int /*<<< orphan*/ scanf(char *, long long *);
int main() {
  long long fact = 1, number = 0;
  scanf("%lld", &number);
  while (number > 1) {
    fact *= number--;
  }
  printf("Factorial: %lld", fact);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x1,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
lea    0xec5(%rip),%rdi
lea    -0x18(%rbp),%rsi
call   1040 <scanf@plt>
cmpq   $0x1,-0x18(%rbp)
jle    1177 <main+0x57>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x18(%rbp)
imul   -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    114f <main+0x2f>
mov    -0x10(%rbp),%rsi
lea    0xe7e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movq   $0x0,(%rsp)
lea    0xedb(%rip),%rdi
mov    %rsp,%rsi
call   1040 <scanf@plt>
mov    (%rsp),%rax
mov    $0x1,%esi
cmp    $0x2,%rax
jl     1169 <main+0x49>
mov    $0x1,%esi
nopl   0x0(%rax)
imul   %rax,%rsi
lea    -0x1(%rax),%rcx
cmp    $0x2,%rax
mov    %rcx,%rax
ja     1150 <main+0x30>
movq   $0x1,(%rsp)
lea    0xe90(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%lld\00"
@.str.1 = [16 x i8] c"Factorial: %lld\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64
store i32 0, i32* %1
store i64 1, i64* %2
store i64 0, i64* %3
%4 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64* %3)
br label %5
5: ; preds = %8, %0
%6 = load i64, i64* %3
%7 = icmp sgt i64 %6, 1
br i1 %7, label %8, label %13
8: ; preds = %5
%9 = load i64, i64* %3
%10 = add nsw i64 %9, -1
store i64 %10, i64* %3
%11 = load i64, i64* %2
%12 = mul nsw i64 %11, %9
store i64 %12, i64* %2
br label %5
13: ; preds = %5
%14 = load i64, i64* %2
%15 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i64 %14)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"%lld\00"
@.str.1 = [16 x i8] c"Factorial: %lld\00"
define i32 @main() {
%1 = alloca i64
%2 = bitcast i64* %1 to i8*
store i64 0, i64* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64* %1)
%4 = load i64, i64* %1
%5 = icmp sgt i64 %4, 1
br i1 %5, label %6, label %13
6: ; preds = %0, %6
%7 = phi i64 [ %10, %6 ], [ 1, %0 ]
%8 = phi i64 [ %9, %6 ], [ %4, %0 ]
%9 = add nsw i64 %8, -1
%10 = mul nsw i64 %7, %8
%11 = icmp ugt i64 %8, 2
br i1 %11, label %6, label %12
12: ; preds = %6
store i64 1, i64* %1
br label %13
13: ; preds = %12, %0
%14 = phi i64 [ %10, %12 ], [ 1, %0 ]
%15 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i64 %14)
ret i32 0
}
int ft_between(int a, int b, int c) { return (a >= b && a <= c); }


x86 assembly (clang, -O0):
<ft_between>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%ecx
xor    %eax,%eax
cmp    -0x8(%rbp),%ecx
mov    %al,-0xd(%rbp)
jl     112a <ft_between+0x2a>
mov    -0x4(%rbp),%eax
cmp    -0xc(%rbp),%eax
setle  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_between>:
cmp    %esi,%edi
setge  %al
cmp    %edx,%edi
setle  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @ft_between(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = icmp sge i32 %7, %8
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i32, i32* %4
%12 = load i32, i32* %6
%13 = icmp sle i32 %11, %12
br label %14
14: ; preds = %10, %3
%15 = phi i1 [ false, %3 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @ft_between(i32 %0, i32 %1, i32 %2) {
%4 = icmp sge i32 %0, %1
%5 = icmp sle i32 %0, %2
%6 = and i1 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
uint32_t I2CSlaveDataGet(uint32_t ui32Base) {
  ;
  return ((*((volatile unsigned long *)(0x40002000 + 0x00000008))));
}


x86 assembly (clang, -O0):
<I2CSlaveDataGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x40002008,%eax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CSlaveDataGet>:
mov    %rdi,-0x8(%rsp)
mov    0x40002008,%rax
40
ret

LLVM IR (-O0):
define i64 @I2CSlaveDataGet(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* inttoptr (i64 1073750024 to i64*)
ret i64 %3
}

LLVM IR (-O2):
define i64 @I2CSlaveDataGet(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* inttoptr (i64 1073750024 to i64*)
ret i64 %3
}
/* Variables and functions */
scalar_t__ islower(int);
scalar_t__ isupper(int);
int isalpha(int ch) { return (islower(ch) || isupper(ch)); }


x86 assembly (clang, -O0):
<isalpha>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <islower@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1157 <isalpha+0x37>
mov    -0x4(%rbp),%edi
call   1040 <isupper@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isalpha>:
push   %rbx
mov    %edi,%ebx
call   1030 <islower@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <isalpha+0x17>
pop    %rbx
ret
mov    %ebx,%edi
call   1040 <isupper@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isalpha(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @islower(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i64 @isupper(i32 %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @isalpha(i32 %0) {
%2 = tail call i64 @islower(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @isupper(i32 %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
void RTVfsObjFromFsStream(void) {}


x86 assembly (clang, -O0):
<RTVfsObjFromFsStream>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTVfsObjFromFsStream>:
ret

LLVM IR (-O0):
define void @RTVfsObjFromFsStream() {
ret void
}

LLVM IR (-O2):
define void @RTVfsObjFromFsStream() {
ret void
}
int omap2_mux_register(struct omap_mux_cfg *a) { return 0; }


x86 assembly (clang, -O0):
<omap2_mux_register>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<omap2_mux_register>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.omap_mux_cfg = type opaque
define i32 @omap2_mux_register(%struct.omap_mux_cfg* %0) {
%2 = alloca %struct.omap_mux_cfg*
store %struct.omap_mux_cfg* %0, %struct.omap_mux_cfg** %2
ret i32 0
}

LLVM IR (-O2):
%struct.omap_mux_cfg = type opaque
define i32 @omap2_mux_register(%struct.omap_mux_cfg* nocapture readnone %0) {
ret i32 0
}
void conditionals() {
  for (int i = 0; i < 100; ++i) {
    if (i % 2) {
      if (i) {
      }
    } else if (i % 3) {
      if (i) {
      }
    } else {
      if (i) {
      }
    }
    if (1 && i) {
    }
    if (0 || i) {
    }
  }
}


x86 assembly (clang, -O0):
<conditionals>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0x64,-0x4(%rbp)
jge    11af <conditionals+0xaf>
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     113d <conditionals+0x3d>
cmpl   $0x0,-0x4(%rbp)
je     1138 <conditionals+0x38>
jmp    1138 <conditionals+0x38>
jmp    117e <conditionals+0x7e>
mov    -0x4(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     1165 <conditionals+0x65>
cmpl   $0x0,-0x4(%rbp)
je     1160 <conditionals+0x60>
jmp    1160 <conditionals+0x60>
jmp    1179 <conditionals+0x79>
cmpl   $0x0,-0x4(%rbp)
je     1174 <conditionals+0x74>
jmp    1174 <conditionals+0x74>
jmp    1179 <conditionals+0x79>
jmp    117e <conditionals+0x7e>
cmpl   $0x0,-0x4(%rbp)
je     118d <conditionals+0x8d>
jmp    118d <conditionals+0x8d>
cmpl   $0x0,-0x4(%rbp)
je     119c <conditionals+0x9c>
jmp    119c <conditionals+0x9c>
jmp    11a1 <conditionals+0xa1>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <conditionals+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<conditionals>:
ret

LLVM IR (-O0):
define void @conditionals() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %38, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 100
br i1 %4, label %5, label %41
5: ; preds = %2
%6 = load i32, i32* %1
%7 = srem i32 %6, 2
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %5
%10 = load i32, i32* %1
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %9
br label %13
13: ; preds = %12, %9
br label %29
14: ; preds = %5
%15 = load i32, i32* %1
%16 = srem i32 %15, 3
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %23
18: ; preds = %14
%19 = load i32, i32* %1
%20 = icmp ne i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %18
br label %22
22: ; preds = %21, %18
br label %28
23: ; preds = %14
%24 = load i32, i32* %1
%25 = icmp ne i32 %24, 0
br i1 %25, label %26, label %27
26: ; preds = %23
br label %27
27: ; preds = %26, %23
br label %28
28: ; preds = %27, %22
br label %29
29: ; preds = %28, %13
%30 = load i32, i32* %1
%31 = icmp ne i32 %30, 0
br i1 %31, label %32, label %33
32: ; preds = %29
br label %33
33: ; preds = %32, %29
%34 = load i32, i32* %1
%35 = icmp ne i32 %34, 0
br i1 %35, label %36, label %37
36: ; preds = %33
br label %37
37: ; preds = %36, %33
br label %38
38: ; preds = %37
%39 = load i32, i32* %1
%40 = add nsw i32 %39, 1
store i32 %40, i32* %1
br label %2
41: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @conditionals() {
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
const char *sas_enclosure_dev_status_change_reason_to_text(uint8_t reason) {
  switch (reason) {
  case (0x01):
    return "ADDED";
  case (0x02):
    return "NOT_RESPONDING";
  }
  return "UNKNOWN";
}


x86 assembly (clang, -O0):
<sas_enclosure_dev_status_change_reason_to_text>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
sub    $0x1,%eax
je     112c <sas_enclosure_dev_status_change_reason_to_text+0x2c>
jmp    111b <sas_enclosure_dev_status_change_reason_to_text+0x1b>
mov    -0x10(%rbp),%eax
sub    $0x2,%eax
je     113c <sas_enclosure_dev_status_change_reason_to_text+0x3c>
jmp    114c <sas_enclosure_dev_status_change_reason_to_text+0x4c>
lea    0xecd(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1157 <sas_enclosure_dev_status_change_reason_to_text+0x57>
lea    0xec3(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1157 <sas_enclosure_dev_status_change_reason_to_text+0x57>
lea    0xec2(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sas_enclosure_dev_status_change_reason_to_text>:
cmp    $0x2,%edi
lea    0xefc(%rip),%rax
lea    0xf04(%rip),%rcx
cmove  %rax,%rcx
cmp    $0x1,%edi
lea    0xee1(%rip),%rax
cmovne %rcx,%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"ADDED\00"
@.str.1 = [15 x i8] c"NOT_RESPONDING\00"
@.str.2 = [8 x i8] c"UNKNOWN\00"
define i8* @sas_enclosure_dev_status_change_reason_to_text(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %7 [
i32 1, label %5
i32 2, label %6
]
5: ; preds = %1
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %2
br label %8
6: ; preds = %1
store i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %8
7: ; preds = %1
store i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), i8** %2
br label %8
8: ; preds = %7, %6, %5
%9 = load i8*, i8** %2
ret i8* %9
}

LLVM IR (-O2):
@.str = [6 x i8] c"ADDED\00"
@.str.1 = [15 x i8] c"NOT_RESPONDING\00"
@.str.2 = [8 x i8] c"UNKNOWN\00"
define i8* @sas_enclosure_dev_status_change_reason_to_text(i32 %0) {
%2 = icmp eq i32 %0, 2
%3 = select i1 %2, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0)
%4 = icmp eq i32 %0, 1
%5 = select i1 %4, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %3
ret i8* %5
}
/* Type definitions */
struct tui_gen_win_info {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ make_visible(struct tui_gen_win_info *, int /*<<< orphan*/);
void tui_make_invisible(struct tui_gen_win_info *win_info) {
  make_visible(win_info, 0);
}


x86 assembly (clang, -O0):
<tui_make_invisible>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <make_visible@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tui_make_invisible>:
xor    %esi,%esi
jmp    1030 <make_visible@plt>

LLVM IR (-O0):
%struct.tui_gen_win_info = type { i32 }
define void @tui_make_invisible(%struct.tui_gen_win_info* %0) {
%2 = alloca %struct.tui_gen_win_info*
store %struct.tui_gen_win_info* %0, %struct.tui_gen_win_info** %2
%3 = load %struct.tui_gen_win_info*, %struct.tui_gen_win_info** %2
%4 = call i32 @make_visible(%struct.tui_gen_win_info* %3, i32 0)
ret void
}

LLVM IR (-O2):
%struct.tui_gen_win_info = type { i32 }
define void @tui_make_invisible(%struct.tui_gen_win_info* %0) {
%2 = tail call i32 @make_visible(%struct.tui_gen_win_info* %0, i32 0)
ret void
}
const char *of_get_model(void) { return ((void *)0); }


x86 assembly (clang, -O0):
<of_get_model>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<of_get_model>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @of_get_model() {
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @of_get_model() {
ret i8* null
}
/* Variables and functions */
void ui_end_update(void) {}


x86 assembly (clang, -O0):
<ui_end_update>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ui_end_update>:
ret

LLVM IR (-O0):
define void @ui_end_update() {
ret void
}

LLVM IR (-O2):
define void @ui_end_update() {
ret void
}
void exit_scribe(struct task_struct *tsk) {}


x86 assembly (clang, -O0):
<exit_scribe>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<exit_scribe>:
ret

LLVM IR (-O0):
%struct.task_struct = type opaque
define void @exit_scribe(%struct.task_struct* %0) {
%2 = alloca %struct.task_struct*
store %struct.task_struct* %0, %struct.task_struct** %2
ret void
}

LLVM IR (-O2):
%struct.task_struct = type opaque
define void @exit_scribe(%struct.task_struct* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dcl_ac(int);
int /*<<< orphan*/ dcl_ai(int);
int /*<<< orphan*/ dcl_all(int);
int /*<<< orphan*/ dcl_as(int);
void test_1(void) {
  dcl_ac(1);
  dcl_as(2);
  dcl_ai(3);
  dcl_all(4);
}


x86 assembly (clang, -O0):
<test_1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1050 <dcl_ac@plt>
mov    $0x2,%edi
call   1040 <dcl_as@plt>
mov    $0x3,%edi
call   1060 <dcl_ai@plt>
mov    $0x4,%edi
call   1030 <dcl_all@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_1>:
push   %rax
mov    $0x1,%edi
call   1050 <dcl_ac@plt>
mov    $0x2,%edi
call   1040 <dcl_as@plt>
mov    $0x3,%edi
call   1060 <dcl_ai@plt>
mov    $0x4,%edi
pop    %rax
jmp    1030 <dcl_all@plt>

LLVM IR (-O0):
define void @test_1() {
%1 = call i32 @dcl_ac(i32 1)
%2 = call i32 @dcl_as(i32 2)
%3 = call i32 @dcl_ai(i32 3)
%4 = call i32 @dcl_all(i32 4)
ret void
}

LLVM IR (-O2):
define void @test_1() {
%1 = tail call i32 @dcl_ac(i32 1)
%2 = tail call i32 @dcl_as(i32 2)
%3 = tail call i32 @dcl_ai(i32 3)
%4 = tail call i32 @dcl_all(i32 4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;

/* Variables and functions */
int logmsg_t(char *, char *, int /*<<< orphan*/ *, unsigned int, int);
int eslib_logmsg_t(char *name, char *msg, time_t *timer, unsigned int seconds) {
  return logmsg_t(name, msg, timer, seconds, 1);
}


x86 assembly (clang, -O0):
<eslib_logmsg_t>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    $0x1,%r8d
call   1030 <logmsg_t@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eslib_logmsg_t>:
mov    $0x1,%r8d
jmp    1030 <logmsg_t@plt>

LLVM IR (-O0):
define i32 @eslib_logmsg_t(i8* %0, i8* %1, i32* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32*
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32* %2, i32** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i32*, i32** %7
%12 = load i32, i32* %8
%13 = call i32 @logmsg_t(i8* %9, i8* %10, i32* %11, i32 %12, i32 1)
ret i32 %13
}

LLVM IR (-O2):
define i32 @eslib_logmsg_t(i8* %0, i8* %1, i32* %2, i32 %3) {
%5 = tail call i32 @logmsg_t(i8* %0, i8* %1, i32* %2, i32 %3, i32 1)
ret i32 %5
}
/* Type definitions */
typedef int time_t;

/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
int time(int *);
time_t gt_xtime(time_t *tloc) {
  time_t t;
  if ((t = time(tloc)) == -1) {
    perror("cannot determine time");
    exit(EXIT_FAILURE);
  }
  return t;
}


x86 assembly (clang, -O0):
<gt_xtime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <time@plt>
mov    %eax,-0xc(%rbp)
cmp    $0xffffffff,%eax
jne    116b <gt_xtime+0x3b>
lea    0xea8(%rip),%rdi
call   1040 <perror@plt>
mov    0x2e7c(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gt_xtime>:
push   %rax
call   1030 <time@plt>
cmp    $0xffffffff,%eax
je     113d <gt_xtime+0xd>
pop    %rcx
ret
lea    0xebc(%rip),%rdi
call   1040 <perror@plt>
mov    0x2e90(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"cannot determine time\00"
@EXIT_FAILURE = global i32 0
define i32 @gt_xtime(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @time(i32* %4)
store i32 %5, i32* %3
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = call i32 @perror(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%9 = load i32, i32* @EXIT_FAILURE
%10 = call i32 @exit(i32 %9)
unreachable
11: ; preds = %1
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
@.str = [22 x i8] c"cannot determine time\00"
@EXIT_FAILURE = global i32 0
define i32 @gt_xtime(i32* %0) {
%2 = tail call i32 @time(i32* %0)
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i32 @perror(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* @EXIT_FAILURE
%7 = tail call i32 @exit(i32 %6)
unreachable
8: ; preds = %1
ret i32 %2
}
int test_imm_09uint8_mem(unsigned char *val) {
  return ((*val) & (0x09 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_09uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0x9,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_09uint8_mem>:
testb  $0x9,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_09uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 9
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_09uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 9
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ sem_unlink(void *);
void remove_sem(int status, void *arg) { sem_unlink(arg); }


x86 assembly (clang, -O0):
<remove_sem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <sem_unlink@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_sem>:
mov    %rsi,%rdi
jmp    1030 <sem_unlink@plt>

LLVM IR (-O0):
define void @remove_sem(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @sem_unlink(i8* %5)
ret void
}

LLVM IR (-O2):
define void @remove_sem(i32 %0, i8* %1) {
%3 = tail call i32 @sem_unlink(i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DeinitFields();
void SwitchFrom_MCORE(void) { DeinitFields(); }


x86 assembly (clang, -O0):
<SwitchFrom_MCORE>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DeinitFields@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SwitchFrom_MCORE>:
xor    %eax,%eax
jmp    1030 <DeinitFields@plt>

LLVM IR (-O0):
define void @SwitchFrom_MCORE() {
%1 = call i32 (...) @DeinitFields()
ret void
}

LLVM IR (-O2):
define void @SwitchFrom_MCORE() {
%1 = tail call i32 (...) @DeinitFields()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void usage(char *appname) {
  printf("Usage: %s [-d DEV] [-i] [-p] [-h]\n    -d  Framebuffer device "
         "(default /dev/fb0)\n    -i  Show fixed and variable screen info\n    "
         "-p  Perform the panning of the display\n    -h  Show this help\n",
         appname);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [191 x i8] c"Usage: %s [-d DEV] [-i] [-p] [-h]\0A -d Framebuffer device (default /dev/fb0)\0A -i Show fixed and variable screen info\0A -p Perform the panning of the display\0A -h Show this help\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([191 x i8], [191 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [191 x i8] c"Usage: %s [-d DEV] [-i] [-p] [-h]\0A -d Framebuffer device (default /dev/fb0)\0A -i Show fixed and variable screen info\0A -p Perform the panning of the display\0A -h Show this help\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([191 x i8], [191 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
long signum_fun_long(long a) { return (a != 0) | (a >> 39); }


x86 assembly (clang, -O0):
<signum_fun_long>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%eax
cltq
mov    -0x8(%rbp),%rcx
sar    $0x27,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signum_fun_long>:
xor    %eax,%eax
test   %rdi,%rdi
setne  %al
sar    $0x27,%rdi
or     %rdi,%rax
ret

LLVM IR (-O0):
define i64 @signum_fun_long(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp ne i64 %3, 0
%5 = zext i1 %4 to i32
%6 = sext i32 %5 to i64
%7 = load i64, i64* %2
%8 = ashr i64 %7, 39
%9 = or i64 %6, %8
ret i64 %9
}

LLVM IR (-O2):
define i64 @signum_fun_long(i64 %0) {
%2 = icmp ne i64 %0, 0
%3 = zext i1 %2 to i64
%4 = ashr i64 %0, 39
%5 = or i64 %4, %3
ret i64 %5
}