xunge/DecIR huggingface dataset:
/* Variables and functions */
void *malloc(size_t);
void *miniz_def_alloc_func(void *opaque, size_t items, size_t size) {
  (void)opaque, (void)items, (void)size;
  return malloc(items * size);
}


x86 assembly (clang, -O0):
<miniz_def_alloc_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
imul   -0x18(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<miniz_def_alloc_func>:
mov    %rsi,%rdi
imul   %rdx,%rdi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @miniz_def_alloc_func(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = load i64, i64* %5
%11 = load i64, i64* %6
%12 = mul i64 %10, %11
%13 = call i8* @malloc(i64 %12)
ret i8* %13
}

LLVM IR (-O2):
define noalias i8* @miniz_def_alloc_func(i8* nocapture readnone %0, i64 %1, i64 %2) {
%4 = mul i64 %2, %1
%5 = tail call i8* @malloc(i64 %4)
ret i8* %5
}
int wClassSafeOnStack(int classIndex) { return 1; }


x86 assembly (clang, -O0):
<wClassSafeOnStack>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wClassSafeOnStack>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @wClassSafeOnStack(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @wClassSafeOnStack(i32 %0) {
ret i32 1
}
/* Variables and functions */
scalar_t__ malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char *);
scalar_t__ strlen(char *);
char *strdup_KR(char *s) {
  char *p;
  p = (char *)malloc(strlen(s) + 1);
  if (p != NULL)
    strcpy(p, s);
  return p;
}


x86 assembly (clang, -O0):
<strdup_KR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     116d <strdup_KR+0x3d>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdup_KR>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1158 <strdup_KR+0x28>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strdup_KR(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i64 @malloc(i64 %6)
%8 = inttoptr i64 %7 to i8*
store i8* %8, i8** %3
%9 = load i8*, i8** %3
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = load i8*, i8** %2
%14 = call i32 @strcpy(i8* %12, i8* %13)
br label %15
15: ; preds = %11, %1
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
define i8* @strdup_KR(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i64 @malloc(i64 %3)
%5 = inttoptr i64 %4 to i8*
%6 = icmp eq i64 %4, 0
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @strcpy(i8* %5, i8* %0)
br label %9
9: ; preds = %7, %1
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void pbf_help(void) {
  printf("base-freq:\tEnables users to increase guaranteed base "
         "frequency\n		on certain cores (high priority cores) in "
         "exchange for lower\n		base frequency on remaining cores (low "
         "priority cores).\n");
  printf("\tcommand : info\n");
  printf("\tcommand : enable\n");
  printf("\tcommand : disable\n");
}


x86 assembly (clang, -O0):
<pbf_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf92(%rip),%rdi
call   1030 <printf@plt>
lea    0xf97(%rip),%rdi
call   1030 <printf@plt>
lea    0xf9e(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pbf_help>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf94(%rip),%rdi
call   1030 <puts@plt>
lea    0xf98(%rip),%rdi
call   1030 <puts@plt>
lea    0xf9e(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [185 x i8] c"base-freq:\09Enables users to increase guaranteed base frequency\0A\09\09on certain cores (high priority cores) in exchange for lower\0A\09\09base frequency on remaining cores (low priority cores).\0A\00"
@.str.1 = [17 x i8] c"\09command : info\0A\00"
@.str.2 = [19 x i8] c"\09command : enable\0A\00"
@.str.3 = [20 x i8] c"\09command : disable\0A\00"
define void @pbf_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([185 x i8], [185 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [184 x i8] c"base-freq:\09Enables users to increase guaranteed base frequency\0A\09\09on certain cores (high priority cores) in exchange for lower\0A\09\09base frequency on remaining cores (low priority cores).\00"
@str.4 = [16 x i8] c"\09command : info\00"
@str.5 = [18 x i8] c"\09command : enable\00"
@str.6 = [19 x i8] c"\09command : disable\00"
define void @pbf_help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([184 x i8], [184 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str.4, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str.5, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str.6, i64 0, i64 0))
ret void
}
/* Variables and functions */
void *vpx_memalign(int, size_t);
void *vpx_malloc(size_t size) {
  return vpx_memalign((2 * sizeof(void *)), size);
}


x86 assembly (clang, -O0):
<vpx_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x10,%edi
call   1030 <vpx_memalign@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vpx_malloc>:
mov    %rdi,%rsi
mov    $0x10,%edi
jmp    1030 <vpx_memalign@plt>

LLVM IR (-O0):
define i8* @vpx_malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @vpx_memalign(i32 16, i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @vpx_malloc(i64 %0) {
%2 = tail call i8* @vpx_memalign(i32 16, i64 %0)
ret i8* %2
}
int power(int x, int n) {
  if (n == 0)
    return 1;
  int res = power(x, n / 2);
  if (n % 2 != 0)
    return res * res * x;
  else
    return res * res;
}


x86 assembly (clang, -O0):
<power>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1134 <power+0x24>
movl   $0x1,-0x4(%rbp)
jmp    117d <power+0x6d>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%esi
call   1030 <power@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     1173 <power+0x63>
mov    -0x10(%rbp),%eax
imul   -0x10(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    117d <power+0x6d>
mov    -0x10(%rbp),%eax
imul   -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<power>:
test   %esi,%esi
je     1142 <power+0x32>
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %edi,%ebx
shr    $0x1f,%esi
add    %ebp,%esi
sar    %esi
call   1030 <power@plt>
mov    %eax,%ecx
test   $0x1,%bpl
mov    $0x1,%eax
cmovne %ebx,%eax
imul   %ecx,%eax
imul   %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @power(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, i32* %3
br label %28
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = sdiv i32 %12, 2
%14 = call i32 @power(i32 %11, i32 %13)
store i32 %14, i32* %6
%15 = load i32, i32* %5
%16 = srem i32 %15, 2
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %24
18: ; preds = %10
%19 = load i32, i32* %6
%20 = load i32, i32* %6
%21 = mul nsw i32 %19, %20
%22 = load i32, i32* %4
%23 = mul nsw i32 %21, %22
store i32 %23, i32* %3
br label %28
24: ; preds = %10
%25 = load i32, i32* %6
%26 = load i32, i32* %6
%27 = mul nsw i32 %25, %26
store i32 %27, i32* %3
br label %28
28: ; preds = %24, %18, %9
%29 = load i32, i32* %3
ret i32 %29
}

LLVM IR (-O2):
define i32 @power(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2, %6
%5 = phi i32 [ %13, %6 ], [ 1, %2 ]
ret i32 %5
6: ; preds = %2
%7 = sdiv i32 %1, 2
%8 = tail call i32 @power(i32 %0, i32 %7)
%9 = and i32 %1, 1
%10 = icmp eq i32 %9, 0
%11 = select i1 %10, i32 1, i32 %0
%12 = mul i32 %8, %11
%13 = mul i32 %12, %8
br label %4
}
/* Type definitions */
typedef scalar_t__ pid_t;

/* Variables and functions */
scalar_t__ getpid();
int /*<<< orphan*/ printf(char *, long, int);
int /*<<< orphan*/ sleep(int);
void child(void) {
  pid_t pid = getpid();
  for (;;) {
    printf("I am child %ld, sleeping for %d sec...\n", (long)pid, 1);
    sleep(1);
  }
}


x86 assembly (clang, -O0):
<child>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xeb2(%rip),%rdi
mov    $0x1,%edx
call   1040 <printf@plt>
mov    $0x1,%edi
call   1050 <sleep@plt>
jmp    1143 <child+0x13>

x86 assembly (clang, -O2):
<child>:
push   %r14
push   %rbx
push   %rax
xor    %eax,%eax
call   1030 <getpid@plt>
mov    %rax,%rbx
lea    0xebb(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nop
mov    %r14,%rdi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1040 <printf@plt>
mov    $0x1,%edi
call   1050 <sleep@plt>
jmp    1150 <child+0x20>

LLVM IR (-O0):
@.str = [40 x i8] c"I am child %ld, sleeping for %d sec...\0A\00"
define void @child() {
%1 = alloca i64
%2 = call i64 (...) @getpid()
store i64 %2, i64* %1
br label %3
3: ; preds = %3, %0
%4 = load i64, i64* %1
%5 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i64 %4, i32 1)
%6 = call i32 @sleep(i32 1)
br label %3
}

LLVM IR (-O2):
@.str = [40 x i8] c"I am child %ld, sleeping for %d sec...\0A\00"
define void @child() {
%1 = tail call i64 (...) @getpid()
br label %2
2: ; preds = %2, %0
%3 = tail call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i64 %1, i32 1)
%4 = tail call i32 @sleep(i32 1)
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void f(int i) {
  if (i != 1000)
    abort();
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x3e8,-0x4(%rbp)
je     112f <f+0x1f>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
cmp    $0x3e8,%edi
jne    1119 <f+0x9>
ret
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 1000
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @abort()
unreachable
7: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @f(i32 %0) {
%2 = icmp eq i32 %0, 1000
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %1
ret void
}
/* Variables and functions */
int create_pollinux_load(char *, char *);
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char *argv[]) {
  int ret = 1;
  if (argc == 3) {
    ret = create_pollinux_load(argv[1], argv[2]);
  } else {
    printf("Usage: %s <input> <output>\n", argv[0]);
  }
  return ret;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
cmpl   $0x3,-0x8(%rbp)
jne    1164 <main+0x44>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
mov    -0x10(%rbp),%rax
mov    0x10(%rax),%rsi
call   1040 <create_pollinux_load@plt>
mov    %eax,-0x14(%rbp)
jmp    1177 <main+0x57>
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xe8e(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x3,%edi
jne    1134 <main+0x14>
mov    0x8(%rsi),%rdi
mov    0x10(%rsi),%rsi
pop    %rax
jmp    1040 <create_pollinux_load@plt>
mov    (%rsi),%rsi
lea    0xec2(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"Usage: %s <input> <output>\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %6
%7 = load i32, i32* %4
%8 = icmp eq i32 %7, 3
br i1 %8, label %9, label %17
9: ; preds = %2
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 1
%12 = load i8*, i8** %11
%13 = load i8**, i8*** %5
%14 = getelementptr inbounds i8*, i8** %13, i64 2
%15 = load i8*, i8** %14
%16 = call i32 @create_pollinux_load(i8* %12, i8* %15)
store i32 %16, i32* %6
br label %22
17: ; preds = %2
%18 = load i8**, i8*** %5
%19 = getelementptr inbounds i8*, i8** %18, i64 0
%20 = load i8*, i8** %19
%21 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %20)
br label %22
22: ; preds = %17, %9
%23 = load i32, i32* %6
ret i32 %23
}

LLVM IR (-O2):
@.str = [28 x i8] c"Usage: %s <input> <output>\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 3
br i1 %3, label %4, label %10
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = getelementptr inbounds i8*, i8** %1, i64 2
%8 = load i8*, i8** %7
%9 = tail call i32 @create_pollinux_load(i8* %6, i8* %8)
br label %13
10: ; preds = %2
%11 = load i8*, i8** %1
%12 = tail call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %11)
br label %13
13: ; preds = %10, %4
%14 = phi i32 [ %9, %4 ], [ 1, %10 ]
ret i32 %14
}
/* Variables and functions */
scalar_t__ malloc(int);
int rand();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int getRandom() {
  int *num = NULL;
  srand(time(NULL));
  num = (int *)malloc(sizeof(int));
  *num = rand() % 8;
  return (*num + 1);
}


x86 assembly (clang, -O0):
<getRandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
mov    $0x4,%edi
call   1050 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    $0x0,%al
call   1060 <rand@plt>
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    -0x8(%rbp),%rax
mov    %edx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getRandom>:
push   %rbx
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
mov    $0x4,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1060 <rand@plt>
lea    0x7(%rax),%ecx
test   %eax,%eax
cmovns %eax,%ecx
and    $0xfffffff8,%ecx
mov    %eax,%edx
sub    %ecx,%edx
mov    %edx,(%rbx)
neg    %ecx
add    %ecx,%eax
add    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @getRandom() {
%1 = alloca i32*
store i32* null, i32** %1
%2 = call i32 @time(i32* null)
%3 = call i32 @srand(i32 %2)
%4 = call i64 @malloc(i32 4)
%5 = inttoptr i64 %4 to i32*
store i32* %5, i32** %1
%6 = call i32 (...) @rand()
%7 = srem i32 %6, 8
%8 = load i32*, i32** %1
store i32 %7, i32* %8
%9 = load i32*, i32** %1
%10 = load i32, i32* %9
%11 = add nsw i32 %10, 1
ret i32 %11
}

LLVM IR (-O2):
define i32 @getRandom() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 @srand(i32 %1)
%3 = tail call i64 @malloc(i32 4)
%4 = inttoptr i64 %3 to i32*
%5 = tail call i32 (...) @rand()
%6 = srem i32 %5, 8
store i32 %6, i32* %4
%7 = add nsw i32 %6, 1
ret i32 %7
}
void GB_ISEQ_f_FP32(float *z, const float *x, const float *y) {
  (*z) = ((*x) == (*y));
}


x86 assembly (clang, -O0):
<GB_ISEQ_f_FP32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x18(%rbp),%rax
ucomiss (%rax),%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%eax
cvtsi2ss %eax,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GB_ISEQ_f_FP32>:
movss  (%rdx),%xmm0
cmpeqss (%rsi),%xmm0
movss  0xeef(%rip),%xmm1
andps  %xmm0,%xmm1
movss  %xmm1,(%rdi)
ret

LLVM IR (-O0):
define void @GB_ISEQ_f_FP32(float* %0, float* %1, float* %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float*
store float* %0, float** %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float*, float** %5
%8 = load float, float* %7
%9 = load float*, float** %6
%10 = load float, float* %9
%11 = fcmp oeq float %8, %10
%12 = zext i1 %11 to i32
%13 = sitofp i32 %12 to float
%14 = load float*, float** %4
store float %13, float* %14
ret void
}

LLVM IR (-O2):
define void @GB_ISEQ_f_FP32(float* nocapture writeonly %0, float* nocapture %1, float* nocapture %2) {
%4 = load float, float* %1
%5 = load float, float* %2
%6 = fcmp oeq float %4, %5
%7 = uitofp i1 %6 to float
store float %7, float* %0
ret void
}
int test(int i, int j, int k, int l) { return i | j | k & l; }


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
or     -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
mov    %edx,%eax
or     %esi,%edi
and    %ecx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @test(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = or i32 %9, %10
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = and i32 %12, %13
%15 = or i32 %11, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @test(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = or i32 %1, %0
%6 = and i32 %3, %2
%7 = or i32 %5, %6
ret i32 %7
}
int test_imm_E0int64_highword_reg(long long val) {
  return ((val >> 32) & (0xE0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E0int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xe0,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E0int64_highword_reg>:
movabs $0xe000000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E0int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 224
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E0int64_highword_reg(i64 %0) {
%2 = and i64 %0, 962072674304
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ r1(int /*<<< orphan*/);
int /*<<< orphan*/ r2(int /*<<< orphan*/);
int /*<<< orphan*/ r3(int /*<<< orphan*/);
int /*<<< orphan*/ w1(int /*<<< orphan*/);
int /*<<< orphan*/ w2(int /*<<< orphan*/);
int /*<<< orphan*/ w3(int /*<<< orphan*/);
int main() {
__CPROVER_ASYNC_0:
  w1(0);
__CPROVER_ASYNC_1:
  w2(0);
__CPROVER_ASYNC_2:
  w3(0);
__CPROVER_ASYNC_3:
  r1(0);
__CPROVER_ASYNC_4:
  r2(0);
__CPROVER_ASYNC_5:
  r3(0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1040 <w1@plt>
xor    %edi,%edi
call   1070 <w2@plt>
xor    %edi,%edi
call   1050 <w3@plt>
xor    %edi,%edi
call   1080 <r1@plt>
xor    %edi,%edi
call   1060 <r2@plt>
xor    %edi,%edi
call   1030 <r3@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <w1@plt>
xor    %edi,%edi
call   1070 <w2@plt>
xor    %edi,%edi
call   1050 <w3@plt>
xor    %edi,%edi
call   1080 <r1@plt>
xor    %edi,%edi
call   1060 <r2@plt>
xor    %edi,%edi
call   1030 <r3@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0
%3 = call i32 @w1(i32 0)
br label %4
4: ; preds = %2
%5 = call i32 @w2(i32 0)
br label %6
6: ; preds = %4
%7 = call i32 @w3(i32 0)
br label %8
8: ; preds = %6
%9 = call i32 @r1(i32 0)
br label %10
10: ; preds = %8
%11 = call i32 @r2(i32 0)
br label %12
12: ; preds = %10
%13 = call i32 @r3(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @w1(i32 0)
%2 = tail call i32 @w2(i32 0)
%3 = tail call i32 @w3(i32 0)
%4 = tail call i32 @r1(i32 0)
%5 = tail call i32 @r2(i32 0)
%6 = tail call i32 @r3(i32 0)
ret i32 0
}
/* Type definitions */
struct timeval {
  int tv_sec;
  long long tv_usec;
};

/* Variables and functions */
long long int timeval_to_int(struct timeval *tval) {
  return (1000000 * tval->tv_sec + tval->tv_usec);
}


x86 assembly (clang, -O0):
<timeval_to_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
imul   $0xf4240,(%rax),%eax
cltq
mov    -0x8(%rbp),%rcx
add    0x8(%rcx),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<timeval_to_int>:
movslq (%rdi),%rax
imul   $0xf4240,%rax,%rax
add    0x8(%rdi),%rax
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i64 }
define i64 @timeval_to_int(%struct.timeval* %0) {
%2 = alloca %struct.timeval*
store %struct.timeval* %0, %struct.timeval** %2
%3 = load %struct.timeval*, %struct.timeval** %2
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i32 0, i32 0
%5 = load i32, i32* %4
%6 = mul nsw i32 1000000, %5
%7 = sext i32 %6 to i64
%8 = load %struct.timeval*, %struct.timeval** %2
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %8, i32 0, i32 1
%10 = load i64, i64* %9
%11 = add nsw i64 %7, %10
ret i64 %11
}

LLVM IR (-O2):
%struct.timeval = type { i32, i64 }
define i64 @timeval_to_int(%struct.timeval* nocapture %0) {
%2 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 1000000
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
%7 = load i64, i64* %6
%8 = add nsw i64 %7, %5
ret i64 %8
}
double geom_dA_cart_xyz(double xm[], double xp[], int dir) {
  double dA;
  if (dir == 0)
    dA = xp[1] - xm[1];
  else if (dir == 1)
    dA = xp[0] - xm[0];
  else
    dA = 0.0;
  return dA;
}


x86 assembly (clang, -O0):
<geom_dA_cart_xyz>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    1135 <geom_dA_cart_xyz+0x35>
mov    -0x10(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
subsd  0x8(%rax),%xmm0
movsd  %xmm0,-0x20(%rbp)
jmp    1166 <geom_dA_cart_xyz+0x66>
cmpl   $0x1,-0x14(%rbp)
jne    1159 <geom_dA_cart_xyz+0x59>
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x8(%rbp),%rax
subsd  (%rax),%xmm0
movsd  %xmm0,-0x20(%rbp)
jmp    1161 <geom_dA_cart_xyz+0x61>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x20(%rbp)
jmp    1166 <geom_dA_cart_xyz+0x66>
movsd  -0x20(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<geom_dA_cart_xyz>:
cmp    $0x1,%edx
je     1115 <geom_dA_cart_xyz+0x15>
xorpd  %xmm0,%xmm0
test   %edx,%edx
jne    111d <geom_dA_cart_xyz+0x1d>
add    $0x8,%rsi
add    $0x8,%rdi
movsd  (%rsi),%xmm0
subsd  (%rdi),%xmm0
ret

LLVM IR (-O0):
define double @geom_dA_cart_xyz(double* %0, double* %1, i32 %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca i32
%7 = alloca double
store double* %0, double** %4
store double* %1, double** %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %3
%11 = load double*, double** %5
%12 = getelementptr inbounds double, double* %11, i64 1
%13 = load double, double* %12
%14 = load double*, double** %4
%15 = getelementptr inbounds double, double* %14, i64 1
%16 = load double, double* %15
%17 = fsub double %13, %16
store double %17, double* %7
br label %31
18: ; preds = %3
%19 = load i32, i32* %6
%20 = icmp eq i32 %19, 1
br i1 %20, label %21, label %29
21: ; preds = %18
%22 = load double*, double** %5
%23 = getelementptr inbounds double, double* %22, i64 0
%24 = load double, double* %23
%25 = load double*, double** %4
%26 = getelementptr inbounds double, double* %25, i64 0
%27 = load double, double* %26
%28 = fsub double %24, %27
store double %28, double* %7
br label %30
29: ; preds = %18
store double 0.000000e+00, double* %7
br label %30
30: ; preds = %29, %21
br label %31
31: ; preds = %30, %10
%32 = load double, double* %7
ret double %32
}

LLVM IR (-O2):
define double @geom_dA_cart_xyz(double* nocapture %0, double* nocapture %1, i32 %2) {
switch i32 %2, label %13 [
i32 0, label %4
i32 1, label %7
]
4: ; preds = %3
%5 = getelementptr inbounds double, double* %1, i64 1
%6 = getelementptr inbounds double, double* %0, i64 1
br label %7
7: ; preds = %3, %4
%8 = phi double* [ %6, %4 ], [ %0, %3 ]
%9 = phi double* [ %5, %4 ], [ %1, %3 ]
%10 = load double, double* %9
%11 = load double, double* %8
%12 = fsub double %10, %11
br label %13
13: ; preds = %7, %3
%14 = phi double [ 0.000000e+00, %3 ], [ %12, %7 ]
ret double %14
}
void restore_ttymodes(void) {
  ;
  ;
}


x86 assembly (clang, -O0):
<restore_ttymodes>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<restore_ttymodes>:
ret

LLVM IR (-O0):
define void @restore_ttymodes() {
ret void
}

LLVM IR (-O2):
define void @restore_ttymodes() {
ret void
}
/* Variables and functions */
int strlen(const char *s) {
  int len;
  for (len = 0; *s != '\0'; s++) {
    len++;
  }
  return len;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1139 <strlen+0x39>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <strlen+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
cmpb   $0x0,(%rdi)
je     111c <strlen+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <strlen+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %4
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %12
12: ; preds = %9
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %2
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @strlen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = add nuw nsw i32 %5, 1
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ pause_draw();
void pause_enter(void) { pause_draw(); }


x86 assembly (clang, -O0):
<pause_enter>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <pause_draw@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pause_enter>:
xor    %eax,%eax
jmp    1030 <pause_draw@plt>

LLVM IR (-O0):
define void @pause_enter() {
%1 = call i32 (...) @pause_draw()
ret void
}

LLVM IR (-O2):
define void @pause_enter() {
%1 = tail call i32 (...) @pause_draw()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ boolTerm();
int /*<<< orphan*/ match(char);
int /*<<< orphan*/ popXor();
void boolXor() {
  match('~');
  boolTerm();
  popXor();
}


x86 assembly (clang, -O0):
<boolXor>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7e,%edi
call   1040 <match@plt>
mov    $0x0,%al
call   1050 <boolTerm@plt>
mov    $0x0,%al
call   1030 <popXor@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<boolXor>:
push   %rax
mov    $0x7e,%edi
call   1040 <match@plt>
xor    %eax,%eax
call   1050 <boolTerm@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <popXor@plt>

LLVM IR (-O0):
define void @boolXor() {
%1 = call i32 @match(i8 signext 126)
%2 = call i32 (...) @boolTerm()
%3 = call i32 (...) @popXor()
ret void
}

LLVM IR (-O2):
define void @boolXor() {
%1 = tail call i32 @match(i8 signext 126)
%2 = tail call i32 (...) @boolTerm()
%3 = tail call i32 (...) @popXor()
ret void
}
unsigned hash(char *s) {
  unsigned hashvalue;
  for (hashvalue = 0; *s != '\0'; s++)
    hashvalue = *s + 31 * hashvalue;
  return hashvalue % 101;
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1140 <hash+0x40>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
imul   $0x1f,-0xc(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <hash+0xf>
mov    -0xc(%rbp),%eax
mov    $0x65,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1147 <hash+0x47>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
movsbl %cl,%ecx
mov    %eax,%edx
shl    $0x5,%edx
sub    %eax,%edx
mov    %edx,%eax
add    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash+0x10>
mov    %eax,%ecx
imul   $0x446f8657,%rcx,%rcx
shr    $0x20,%rcx
mov    %eax,%edx
sub    %ecx,%edx
shr    %edx
add    %ecx,%edx
shr    $0x6,%edx
imul   $0x65,%edx,%ecx
sub    %ecx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %16, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %19
9: ; preds = %4
%10 = load i8*, i8** %2
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = load i32, i32* %3
%14 = mul i32 31, %13
%15 = add i32 %12, %14
store i32 %15, i32* %3
br label %16
16: ; preds = %9
%17 = load i8*, i8** %2
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %2
br label %4
19: ; preds = %4
%20 = load i32, i32* %3
%21 = urem i32 %20, 101
ret i32 %21
}

LLVM IR (-O2):
define i32 @hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %10, %4 ], [ 0, %1 ]
%7 = phi i8* [ %11, %4 ], [ %0, %1 ]
%8 = sext i8 %5 to i32
%9 = mul i32 %6, 31
%10 = add i32 %9, %8
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4
%15 = urem i32 %10, 101
br label %16
16: ; preds = %14, %1
%17 = phi i32 [ 0, %1 ], [ %15, %14 ]
ret i32 %17
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
char *lstrcpynA(char *out, const char *in, int n) { exit(1); }


x86 assembly (clang, -O0):
<lstrcpynA>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0x1,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<lstrcpynA>:
push   %rax
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i8* @lstrcpynA(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define noalias i8* @lstrcpynA(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
%4 = tail call i32 @exit(i32 1)
unreachable
}
void cli(void) { __asm__("cli"); }


x86 assembly (clang, -O0):
<cli>:
push   %rbp
mov    %rsp,%rbp
cli
pop    %rbp
ret

x86 assembly (clang, -O2):
<cli>:
cli
ret

LLVM IR (-O0):
define void @cli() {
ret void
}

LLVM IR (-O2):
define void @cli() {
tail call void asm sideeffect "cli", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DymosimMessage(char *);
int /*<<< orphan*/ sprintf(char *, char *, char *, double, double);
double log_variable(char *xname, double t, double x) {
  char buf[500];
  sprintf(buf, "%.400s(%g) = %.16g", xname, t, x);
  DymosimMessage(buf);
  return x;
}


x86 assembly (clang, -O0):
<log_variable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x210,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
lea    -0x210(%rbp),%rdi
mov    -0x8(%rbp),%rdx
movsd  -0x10(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
lea    0xeab(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x210(%rbp),%rdi
call   1030 <DymosimMessage@plt>
movsd  -0x18(%rbp),%xmm0
add    $0x210,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_variable>:
push   %rbx
sub    $0x210,%rsp
movsd  %xmm1,0x8(%rsp)
mov    %rdi,%rdx
lea    0xec8(%rip),%rsi
lea    0x10(%rsp),%rbx
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <DymosimMessage@plt>
movsd  0x8(%rsp),%xmm0
add    $0x210,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"%.400s(%g) = %.16g\00"
define double @log_variable(i8* %0, double %1, double %2) {
%4 = alloca i8*
%5 = alloca double
%6 = alloca double
%7 = alloca [500 x i8]
store i8* %0, i8** %4
store double %1, double* %5
store double %2, double* %6
%8 = getelementptr inbounds [500 x i8], [500 x i8]* %7, i64 0, i64 0
%9 = load i8*, i8** %4
%10 = load double, double* %5
%11 = load double, double* %6
%12 = call i32 @sprintf(i8* %8, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %9, double %10, double %11)
%13 = getelementptr inbounds [500 x i8], [500 x i8]* %7, i64 0, i64 0
%14 = call i32 @DymosimMessage(i8* %13)
%15 = load double, double* %6
ret double %15
}

LLVM IR (-O2):
@.str = [19 x i8] c"%.400s(%g) = %.16g\00"
define double @log_variable(i8* %0, double %1, double returned %2) {
%4 = alloca [500 x i8]
%5 = getelementptr inbounds [500 x i8], [500 x i8]* %4, i64 0, i64 0
%6 = call i32 @sprintf(i8* %5, i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %0, double %1, double %2)
%7 = call i32 @DymosimMessage(i8* %5)
ret double %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
void init_driver(FILE *chardev) {}


x86 assembly (clang, -O0):
<init_driver>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_driver>:
ret

LLVM IR (-O0):
define void @init_driver(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @init_driver(i32* nocapture %0) {
ret void
}
struct object *prim_list(struct object *args) {
  return (args);
}


x86 assembly (clang, -O0):
<prim_list>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<prim_list>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
%struct.object = type opaque
define %struct.object* @prim_list(%struct.object* %0) {
%2 = alloca %struct.object*
store %struct.object* %0, %struct.object** %2
%3 = load %struct.object*, %struct.object** %2
ret %struct.object* %3
}

LLVM IR (-O2):
%struct.object = type opaque
define %struct.object* @prim_list(%struct.object* readnone returned %0) {
ret %struct.object* %0
}
/* Type definitions */
typedef int /*<<< orphan*/ magic;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fwrite(char *, int, int, int /*<<< orphan*/ *);
int xdf_write_magic(FILE *out) {
  char magic[] = {'X', 'D', 'F', ':'};
  if (fwrite(magic, sizeof(magic), 1, out) != 1)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<xdf_write_magic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    0xede(%rip),%eax
mov    %eax,-0x14(%rbp)
lea    -0x14(%rbp),%rdi
mov    -0x10(%rbp),%rcx
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fwrite@plt>
cmp    $0x1,%eax
je     1151 <xdf_write_magic+0x41>
movl   $0x1,-0x4(%rbp)
jmp    1158 <xdf_write_magic+0x48>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xdf_write_magic>:
push   %rax
mov    %rdi,%rcx
movl   $0x3a464458,0x4(%rsp)
3a
lea    0x4(%rsp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fwrite@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.xdf_write_magic.magic = [4 x i8] c"XDF:"
define i32 @xdf_write_magic(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca [4 x i8]
store i32* %0, i32** %3
%5 = bitcast [4 x i8]* %4 to i8*
%6 = getelementptr inbounds [4 x i8], [4 x i8]* %4, i64 0, i64 0
%7 = load i32*, i32** %3
%8 = call i32 @fwrite(i8* %6, i32 4, i32 1, i32* %7)
%9 = icmp ne i32 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 1, i32* %2
br label %12
11: ; preds = %1
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @xdf_write_magic(i32* nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 977683544, i32* %2
%4 = call i32 @fwrite(i8* %3, i32 4, i32 1, i32* %0)
%5 = icmp ne i32 %4, 1
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int strcmp(char *, char *);
int t10(void) { return strcmp("foo", "bar"); }


x86 assembly (clang, -O0):
<t10>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee2(%rip),%rsi
call   1030 <strcmp@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t10>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"foo\00"
@.str.1 = [4 x i8] c"bar\00"
define i32 @t10() {
%1 = call i32 @strcmp(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
define i32 @t10() {
ret i32 1
}
/* Variables and functions */
scalar_t__ SIG_ERR;
int /*<<< orphan*/ err_sys(char *, int);
int /*<<< orphan*/ pr_procmask(char *);
int /*<<< orphan*/ printf(char *, int);
scalar_t__ signal(int, void (*)(int));
void sig_eater(int signo) {
  printf("caught %d\n", signo);
  pr_procmask("in sig_eater");
  if (signal(signo, sig_eater) == SIG_ERR)
    err_sys("can't reset %d", signo);
}


x86 assembly (clang, -O0):
<sig_eater>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xeab(%rip),%rdi
call   1040 <printf@plt>
lea    0xeaa(%rip),%rdi
call   1060 <pr_procmask@plt>
mov    -0x4(%rbp),%edi
mov    0x2e78(%rip),%rsi
call   1050 <signal@plt>
mov    0x2e5c(%rip),%rcx
cmp    (%rcx),%rax
jne    1194 <sig_eater+0x54>
mov    -0x4(%rbp),%esi
lea    0xe89(%rip),%rdi
call   1030 <err_sys@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_eater>:
push   %rbx
mov    %edi,%ebx
lea    0xeb6(%rip),%rdi
mov    %ebx,%esi
call   1040 <printf@plt>
lea    0xeb3(%rip),%rdi
call   1060 <pr_procmask@plt>
mov    0x2e84(%rip),%rsi
mov    %ebx,%edi
call   1050 <signal@plt>
mov    0x2e66(%rip),%rcx
cmp    (%rcx),%rax
jne    1186 <sig_eater+0x46>
lea    0xe9a(%rip),%rdi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <err_sys@plt>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"caught %d\0A\00"
@.str.1 = [13 x i8] c"in sig_eater\00"
@SIG_ERR = global i64 0
@.str.2 = [15 x i8] c"can't reset %d\00"
define void @sig_eater(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = call i32 @pr_procmask(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
%6 = load i32, i32* %2
%7 = call i64 @signal(i32 %6, void (i32)* @sig_eater)
%8 = load i64, i64* @SIG_ERR
%9 = icmp eq i64 %7, %8
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load i32, i32* %2
%12 = call i32 @err_sys(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.2, i64 0, i64 0), i32 %11)
br label %13
13: ; preds = %10, %1
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"caught %d\0A\00"
@.str.1 = [13 x i8] c"in sig_eater\00"
@SIG_ERR = global i64 0
@.str.2 = [15 x i8] c"can't reset %d\00"
define void @sig_eater(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = tail call i32 @pr_procmask(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i64 @signal(i32 %0, void (i32)* @sig_eater)
%5 = load i64, i64* @SIG_ERR
%6 = icmp eq i64 %4, %5
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = tail call i32 @err_sys(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.2, i64 0, i64 0), i32 %0)
br label %9
9: ; preds = %7, %1
ret void
}
void __attribute__((weak, no))
AnnotateCondVarSignal(const char *file, int line, const volatile void *cv) {
  asm("");
}


x86 assembly (clang, -O0):
<AnnotateCondVarSignal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<AnnotateCondVarSignal>:
ret

LLVM IR (-O0):
define weak void @AnnotateCondVarSignal(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
ret void
}

LLVM IR (-O2):
define weak void @AnnotateCondVarSignal(i8* %0, i32 %1, i8* %2) {
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
int fun1127() { return 1127; }


x86 assembly (clang, -O0):
<fun1127>:
push   %rbp
mov    %rsp,%rbp
mov    $0x467,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1127>:
mov    $0x467,%eax
ret

LLVM IR (-O0):
define i32 @fun1127() {
ret i32 1127
}

LLVM IR (-O2):
define i32 @fun1127() {
ret i32 1127
}
char which_clm(int i, int x) {
  if (i == 0)
    return ('f');
  else if (i == x - 1)
    return ('l');
  else
    return ('m');
}


x86 assembly (clang, -O0):
<which_clm>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    111d <which_clm+0x1d>
movb   $0x66,-0x1(%rbp)
jmp    113b <which_clm+0x3b>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
cmp    %ecx,%eax
jne    1137 <which_clm+0x37>
movb   $0x6c,-0x1(%rbp)
jmp    113b <which_clm+0x3b>
movb   $0x6d,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<which_clm>:
add    $0xffffffff,%esi
cmp    %edi,%esi
sete   %al
xor    $0x6d,%al
test   %edi,%edi
movzbl %al,%ecx
mov    $0x66,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @which_clm(i32 %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i8 102, i8* %3
br label %16
9: ; preds = %2
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = sub nsw i32 %11, 1
%13 = icmp eq i32 %10, %12
br i1 %13, label %14, label %15
14: ; preds = %9
store i8 108, i8* %3
br label %16
15: ; preds = %9
store i8 109, i8* %3
br label %16
16: ; preds = %15, %14, %8
%17 = load i8, i8* %3
ret i8 %17
}

LLVM IR (-O2):
define signext i8 @which_clm(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
%4 = add nsw i32 %1, -1
%5 = icmp eq i32 %4, %0
%6 = select i1 %5, i8 108, i8 109
%7 = select i1 %3, i8 102, i8 %6
ret i8 %7
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t binary_rgb565(uint32_t r, uint32_t g, uint32_t b) {
  return (((r & 0xf8ul) >> 3) << 11) | (((g & 0xfcul) >> 2) << 5) |
         ((b & 0xf8ul) >> 3);
}


x86 assembly (clang, -O0):
<binary_rgb565>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movslq -0x4(%rbp),%rax
and    $0xf8,%rax
shr    $0x3,%rax
shl    $0xb,%rax
movslq -0x8(%rbp),%rcx
and    $0xfc,%rcx
shr    $0x2,%rcx
shl    $0x5,%rcx
or     %rcx,%rax
movslq -0xc(%rbp),%rcx
and    $0xf8,%rcx
shr    $0x3,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<binary_rgb565>:
shl    $0x8,%edi
and    $0xf800,%edi
and    $0xfc,%esi
lea    (%rdi,%rsi,8),%eax
shr    $0x3,%edx
and    $0x1f,%edx
or     %edx,%eax
ret

LLVM IR (-O0):
define i32 @binary_rgb565(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = and i64 %8, 248
%10 = lshr i64 %9, 3
%11 = shl i64 %10, 11
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = and i64 %13, 252
%15 = lshr i64 %14, 2
%16 = shl i64 %15, 5
%17 = or i64 %11, %16
%18 = load i32, i32* %6
%19 = sext i32 %18 to i64
%20 = and i64 %19, 248
%21 = lshr i64 %20, 3
%22 = or i64 %17, %21
%23 = trunc i64 %22 to i32
ret i32 %23
}

LLVM IR (-O2):
define i32 @binary_rgb565(i32 %0, i32 %1, i32 %2) {
%4 = shl i32 %0, 8
%5 = and i32 %4, 63488
%6 = shl i32 %1, 3
%7 = and i32 %6, 2016
%8 = or i32 %7, %5
%9 = lshr i32 %2, 3
%10 = and i32 %9, 31
%11 = or i32 %8, %10
ret i32 %11
}
int filhoDireita(int i) { return 2 * i + 1; }


x86 assembly (clang, -O0):
<filhoDireita>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<filhoDireita>:
lea    (%rdi,%rdi,1),%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @filhoDireita(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 2, %3
%5 = add nsw i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @filhoDireita(i32 %0) {
%2 = shl nsw i32 %0, 1
%3 = or i32 %2, 1
ret i32 %3
}
int map(int x, int fromLow, int fromHigh, int toLow, int toHigh) {
  int y;
  y = (float)(x - fromLow) / (fromHigh - fromLow) * (toHigh - toLow) + toLow;
  return (y);
}


x86 assembly (clang, -O0):
<map>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
cvtsi2ss %eax,%xmm0
mov    -0xc(%rbp),%eax
sub    -0x8(%rbp),%eax
cvtsi2ss %eax,%xmm1
divss  %xmm1,%xmm0
mov    -0x14(%rbp),%eax
sub    -0x10(%rbp),%eax
cvtsi2ss %eax,%xmm2
cvtsi2ssl -0x10(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<map>:
sub    %esi,%edi
cvtsi2ss %edi,%xmm0
sub    %esi,%edx
cvtsi2ss %edx,%xmm1
sub    %ecx,%r8d
cvtsi2ss %r8d,%xmm2
divss  %xmm1,%xmm0
xorps  %xmm1,%xmm1
cvtsi2ss %ecx,%xmm1
mulss  %xmm0,%xmm2
addss  %xmm2,%xmm1
cvttss2si %xmm1,%eax
ret

LLVM IR (-O0):
define i32 @map(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%12 = load i32, i32* %6
%13 = load i32, i32* %7
%14 = sub nsw i32 %12, %13
%15 = sitofp i32 %14 to float
%16 = load i32, i32* %8
%17 = load i32, i32* %7
%18 = sub nsw i32 %16, %17
%19 = sitofp i32 %18 to float
%20 = fdiv float %15, %19
%21 = load i32, i32* %10
%22 = load i32, i32* %9
%23 = sub nsw i32 %21, %22
%24 = sitofp i32 %23 to float
%25 = load i32, i32* %9
%26 = sitofp i32 %25 to float
%27 = call float @llvm.fmuladd.f32(float %20, float %24, float %26)
%28 = fptosi float %27 to i32
store i32 %28, i32* %11
%29 = load i32, i32* %11
ret i32 %29
}

LLVM IR (-O2):
define i32 @map(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = sub nsw i32 %0, %1
%7 = sitofp i32 %6 to float
%8 = sub nsw i32 %2, %1
%9 = sitofp i32 %8 to float
%10 = fdiv float %7, %9
%11 = sub nsw i32 %4, %3
%12 = sitofp i32 %11 to float
%13 = sitofp i32 %3 to float
%14 = tail call float @llvm.fmuladd.f32(float %10, float %12, float %13)
%15 = fptosi float %14 to i32
ret i32 %15
}