xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ SE(int *, int, int, int *);
double MSE(int *f, int w, int h, int *g) {
  return (((double)SE(f, w, h, g)) / w / h);
}


x86 assembly (clang, -O0):
<MSE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x18(%rbp),%rcx
call   1030 <SE@plt>
cvtsi2sd %rax,%xmm0
cvtsi2sdl -0xc(%rbp),%xmm1
divsd  %xmm1,%xmm0
cvtsi2sdl -0x10(%rbp),%xmm1
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MSE>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebx
mov    %esi,%ebp
call   1030 <SE@plt>
cvtsi2sd %rax,%xmm0
cvtsi2sd %ebp,%xmm1
divsd  %xmm1,%xmm0
xorps  %xmm1,%xmm1
cvtsi2sd %ebx,%xmm1
divsd  %xmm1,%xmm0
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define double @MSE(i32* %0, i32 %1, i32 %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32*
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i32*, i32** %8
%13 = call i64 @SE(i32* %9, i32 %10, i32 %11, i32* %12)
%14 = sitofp i64 %13 to double
%15 = load i32, i32* %6
%16 = sitofp i32 %15 to double
%17 = fdiv double %14, %16
%18 = load i32, i32* %7
%19 = sitofp i32 %18 to double
%20 = fdiv double %17, %19
ret double %20
}

LLVM IR (-O2):
define double @MSE(i32* %0, i32 %1, i32 %2, i32* %3) {
%5 = tail call i64 @SE(i32* %0, i32 %1, i32 %2, i32* %3)
%6 = sitofp i64 %5 to double
%7 = sitofp i32 %1 to double
%8 = fdiv double %6, %7
%9 = sitofp i32 %2 to double
%10 = fdiv double %8, %9
ret double %10
}
/* Variables and functions */
int syscall(int, int, char const *, unsigned int);
int sys_open_tree(int dfd, const char *filename, unsigned int flags) {
  return syscall(428, dfd, filename, flags);
}


x86 assembly (clang, -O0):
<sys_open_tree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0x1ac,%edi
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_open_tree>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0x1ac,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @sys_open_tree(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @syscall(i32 428, i32 %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @sys_open_tree(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @syscall(i32 428, i32 %0, i8* %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int x, y, z;
  x = __VERIFIER_nondet_int();
  y = __VERIFIER_nondet_int();
  z = __VERIFIER_nondet_int();
  while (x - y > 0) {
    x = -x + y;
    y = z;
    z = z;
    z = z + 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
sub    -0xc(%rbp),%eax
cmp    $0x0,%eax
jle    1171 <main+0x61>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    113d <main+0x2d>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %5, i32* %2
%6 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %6, i32* %3
%7 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %7, i32* %4
br label %8
8: ; preds = %13, %0
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = sub nsw i32 %9, %10
%12 = icmp sgt i32 %11, 0
br i1 %12, label %13, label %22
13: ; preds = %8
%14 = load i32, i32* %2
%15 = sub nsw i32 0, %14
%16 = load i32, i32* %3
%17 = add nsw i32 %15, %16
store i32 %17, i32* %2
%18 = load i32, i32* %4
store i32 %18, i32* %3
%19 = load i32, i32* %4
store i32 %19, i32* %4
%20 = load i32, i32* %4
%21 = add nsw i32 %20, 1
store i32 %21, i32* %4
br label %8
22: ; preds = %8
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 (...) @__VERIFIER_nondet_int()
%3 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}
/* Type definitions */
struct Cyc_AP_T {
  int dummy;
};

/* Variables and functions */
struct Cyc_AP_T *Cyc_mk(int);
struct Cyc_AP_T *Cyc_set(struct Cyc_AP_T *, long);
struct Cyc_AP_T *Cyc_AP_fromint(long x) {
  unsigned _T0;
  int _T1;
  struct Cyc_AP_T *_T2;
  _T0 = sizeof(unsigned long) / sizeof(unsigned char);
  _T1 = (int)_T0;
  {
    struct Cyc_AP_T *t = Cyc_mk(_T1);
    _T2 = Cyc_set(t, x);
    return _T2;
  }
}


x86 assembly (clang, -O0):
<Cyc_AP_fromint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x8,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%edi
call   1040 <Cyc_mk@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <Cyc_set@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_AP_fromint>:
push   %rbx
mov    %rdi,%rbx
mov    $0x8,%edi
call   1040 <Cyc_mk@plt>
mov    %rax,%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <Cyc_set@plt>

LLVM IR (-O0):
%struct.Cyc_AP_T = type { i32 }
define %struct.Cyc_AP_T* @Cyc_AP_fromint(i64 %0) {
%2 = alloca i64
%3 = alloca i32
%4 = alloca i32
%5 = alloca %struct.Cyc_AP_T*
%6 = alloca %struct.Cyc_AP_T*
store i64 %0, i64* %2
store i32 8, i32* %3
%7 = load i32, i32* %3
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = call %struct.Cyc_AP_T* @Cyc_mk(i32 %8)
store %struct.Cyc_AP_T* %9, %struct.Cyc_AP_T** %6
%10 = load %struct.Cyc_AP_T*, %struct.Cyc_AP_T** %6
%11 = load i64, i64* %2
%12 = call %struct.Cyc_AP_T* @Cyc_set(%struct.Cyc_AP_T* %10, i64 %11)
store %struct.Cyc_AP_T* %12, %struct.Cyc_AP_T** %5
%13 = load %struct.Cyc_AP_T*, %struct.Cyc_AP_T** %5
ret %struct.Cyc_AP_T* %13
}

LLVM IR (-O2):
%struct.Cyc_AP_T = type { i32 }
define %struct.Cyc_AP_T* @Cyc_AP_fromint(i64 %0) {
%2 = tail call %struct.Cyc_AP_T* @Cyc_mk(i32 8)
%3 = tail call %struct.Cyc_AP_T* @Cyc_set(%struct.Cyc_AP_T* %2, i64 %0)
ret %struct.Cyc_AP_T* %3
}
unsigned char value_to_b64(int v) {
  static unsigned char table[] =
      "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/";
  if (v >= sizeof(table) || v < 0)
    return -1;
  return table[v];
}


x86 assembly (clang, -O0):
<value_to_b64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movslq -0x8(%rbp),%rax
cmp    $0x41,%rax
jae    111f <value_to_b64+0x1f>
cmpl   $0x0,-0x8(%rbp)
jge    1128 <value_to_b64+0x28>
movb   $0xff,-0x1(%rbp)
jmp    1139 <value_to_b64+0x39>
movslq -0x8(%rbp),%rcx
lea    0x2efd(%rip),%rax
mov    (%rax,%rcx,1),%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<value_to_b64>:
mov    $0xff,%al
cmp    $0x40,%edi
ja     1113 <value_to_b64+0x13>
mov    %edi,%eax
lea    0xef0(%rip),%rcx
mov    (%rax,%rcx,1),%al
ret

LLVM IR (-O0):
@value_to_b64.table = internal global [65 x i8] c"ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/\00"
define zeroext i8 @value_to_b64(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = sext i32 %4 to i64
%6 = icmp uge i64 %5, 65
br i1 %6, label %10, label %7
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %7, %1
store i8 -1, i8* %2
br label %16
11: ; preds = %7
%12 = load i32, i32* %3
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds [65 x i8], [65 x i8]* @value_to_b64.table, i64 0, i64 %13
%15 = load i8, i8* %14
store i8 %15, i8* %2
br label %16
16: ; preds = %11, %10
%17 = load i8, i8* %2
ret i8 %17
}

LLVM IR (-O2):
@value_to_b64.table = internal unnamed_addr constant [65 x i8] c"ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/\00"
define zeroext i8 @value_to_b64(i32 %0) {
%2 = icmp ugt i32 %0, 64
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = zext i32 %0 to i64
%5 = getelementptr inbounds [65 x i8], [65 x i8]* @value_to_b64.table, i64 0, i64 %4
%6 = load i8, i8* %5
br label %7
7: ; preds = %1, %3
%8 = phi i8 [ %6, %3 ], [ -1, %1 ]
ret i8 %8
}
/* Variables and functions */
char const *osal_get_user_cachepath();
__attribute__((visibility("default"))) const char *
ConfigGetUserCachePath(void) {
  return osal_get_user_cachepath();
}


x86 assembly (clang, -O0):
<ConfigGetUserCachePath>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <osal_get_user_cachepath@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ConfigGetUserCachePath>:
xor    %eax,%eax
jmp    1030 <osal_get_user_cachepath@plt>

LLVM IR (-O0):
define i8* @ConfigGetUserCachePath() {
%1 = call i8* (...) @osal_get_user_cachepath()
ret i8* %1
}

LLVM IR (-O2):
define i8* @ConfigGetUserCachePath() {
%1 = tail call i8* (...) @osal_get_user_cachepath()
ret i8* %1
}
/* Variables and functions */
scalar_t__ strstr(char *, char *);
int IncorrecToken(char *Line) {
  if (strstr(Line, ">>>"))
    return (-100);
  if (strstr(Line, "<<"))
    return (-101);
  return (0);
}


x86 assembly (clang, -O0):
<IncorrecToken>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strstr@plt>
cmp    $0x0,%rax
je     1142 <IncorrecToken+0x32>
movl   $0xffffff9c,-0x4(%rbp)
jmp    116f <IncorrecToken+0x5f>
mov    -0x10(%rbp),%rdi
lea    0xeb7(%rip),%rsi
call   1030 <strstr@plt>
cmp    $0x0,%rax
je     1168 <IncorrecToken+0x58>
movl   $0xffffff9b,-0x4(%rbp)
jmp    116f <IncorrecToken+0x5f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IncorrecToken>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <strstr@plt>
mov    %rax,%rcx
mov    $0xffffff9c,%eax
test   %rcx,%rcx
je     112f <IncorrecToken+0x1f>
pop    %rbx
ret
lea    0xece(%rip),%rsi
mov    %rbx,%rdi
call   1030 <strstr@plt>
xor    %ecx,%ecx
test   %rax,%rax
mov    $0xffffff9b,%eax
cmove  %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c">>>\00"
@.str.1 = [3 x i8] c"<<\00"
define i32 @IncorrecToken(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @strstr(i8* %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 -100, i32* %2
br label %14
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i64 @strstr(i8* %9, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 -101, i32* %2
br label %14
13: ; preds = %8
store i32 0, i32* %2
br label %14
14: ; preds = %13, %12, %7
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
@.str = [4 x i8] c">>>\00"
@.str.1 = [3 x i8] c"<<\00"
define i32 @IncorrecToken(i8* %0) {
%2 = tail call i64 @strstr(i8* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @strstr(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%6 = icmp eq i64 %5, 0
%7 = select i1 %6, i32 0, i32 -101
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ -100, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
unsigned int EOF;
unsigned int fputc(unsigned int, int /*<<< orphan*/ *);
unsigned int fput2l(unsigned int value, FILE *stream) {
  unsigned int result;
  result = fputc(value & 0xff, stream);
  if (result != EOF) {
    result = fputc((value >> 8) & 0xff, stream);
  }
  return result;
}


x86 assembly (clang, -O0):
<fput2l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
and    $0xff,%edi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    0x2eaa(%rip),%rcx
cmp    (%rcx),%eax
je     115e <fput2l+0x4e>
mov    -0x4(%rbp),%edi
shr    $0x8,%edi
and    $0xff,%edi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fput2l>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %edi,%ebx
movzbl %bl,%edi
call   1030 <fputc@plt>
mov    0x2ec0(%rip),%rcx
cmp    (%rcx),%eax
jne    1134 <fput2l+0x24>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
movzbl %bh,%edi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fputc@plt>

LLVM IR (-O0):
@EOF = global i32 0
define i32 @fput2l(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
%6 = load i32, i32* %3
%7 = and i32 %6, 255
%8 = load i32*, i32** %4
%9 = call i32 @fputc(i32 %7, i32* %8)
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = load i32, i32* @EOF
%12 = icmp ne i32 %10, %11
br i1 %12, label %13, label %19
13: ; preds = %2
%14 = load i32, i32* %3
%15 = lshr i32 %14, 8
%16 = and i32 %15, 255
%17 = load i32*, i32** %4
%18 = call i32 @fputc(i32 %16, i32* %17)
store i32 %18, i32* %5
br label %19
19: ; preds = %13, %2
%20 = load i32, i32* %5
ret i32 %20
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @fput2l(i32 %0, i32* nocapture %1) {
%3 = and i32 %0, 255
%4 = tail call i32 @fputc(i32 %3, i32* %1)
%5 = load i32, i32* @EOF
%6 = icmp eq i32 %4, %5
br i1 %6, label %11, label %7
7: ; preds = %2
%8 = lshr i32 %0, 8
%9 = and i32 %8, 255
%10 = tail call i32 @fputc(i32 %9, i32* %1)
br label %11
11: ; preds = %7, %2
%12 = phi i32 [ %10, %7 ], [ %4, %2 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ extract_grey(unsigned char *, int);
int /*<<< orphan*/ set_bw(unsigned char *, int, int /*<<< orphan*/);
void naive_dither(unsigned char *grey, unsigned char *bw, int num_pixels) {
  for (int i = 0; i < num_pixels; i++) {
    set_bw(bw, i, extract_grey(grey, i));
  }
}


x86 assembly (clang, -O0):
<naive_dither>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    117c <naive_dither+0x5c>
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%esi
call   1030 <extract_grey@plt>
mov    -0x28(%rbp),%rdi
mov    -0x1c(%rbp),%esi
mov    %eax,%edx
call   1040 <set_bw@plt>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    113a <naive_dither+0x1a>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<naive_dither>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
test   %edx,%edx
jle    115d <naive_dither+0x3d>
mov    %edx,%ebx
mov    %rsi,%r14
mov    %rdi,%r15
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nop
mov    %r15,%rdi
mov    %ebp,%esi
call   1030 <extract_grey@plt>
mov    %r14,%rdi
mov    %ebp,%esi
mov    %eax,%edx
call   1040 <set_bw@plt>
add    $0x1,%ebp
cmp    %ebp,%ebx
jne    1140 <naive_dither+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @naive_dither(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %19, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %22
12: ; preds = %8
%13 = load i8*, i8** %5
%14 = load i32, i32* %7
%15 = load i8*, i8** %4
%16 = load i32, i32* %7
%17 = call i32 @extract_grey(i8* %15, i32 %16)
%18 = call i32 @set_bw(i8* %13, i32 %14, i32 %17)
br label %19
19: ; preds = %12
%20 = load i32, i32* %7
%21 = add nsw i32 %20, 1
store i32 %21, i32* %7
br label %8
22: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @naive_dither(i8* %0, i8* %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %6, label %5
5: ; preds = %6, %3
ret void
6: ; preds = %3, %6
%7 = phi i32 [ %10, %6 ], [ 0, %3 ]
%8 = tail call i32 @extract_grey(i8* %0, i32 %7)
%9 = tail call i32 @set_bw(i8* %1, i32 %7, i32 %8)
%10 = add nuw nsw i32 %7, 1
%11 = icmp eq i32 %10, %2
br i1 %11, label %5, label %6
}
/* Variables and functions */
int close(int);
int mcp3008_spidev_close(int spi_fd) { return close(spi_fd); }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
jmp    1030 <close@plt>

LLVM IR (-O0):
define i32 @mcp3008_spidev_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @mcp3008_spidev_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret i32 %2
}
char *next(char *ip) {
  int balance = 0;
  do {
    if (*ip == '[')
      ++balance;
    else if (*ip == ']')
      --balance;
    ++ip;
  } while (balance);
  return ip - 1;
}


x86 assembly (clang, -O0):
<next>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x5b,%eax
jne    112d <next+0x2d>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    114b <next+0x4b>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x5d,%eax
jne    1146 <next+0x46>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    114b <next+0x4b>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    110f <next+0xf>
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<next>:
mov    %rdi,%rax
add    $0xffffffffffffffff,%rax
xor    %ecx,%ecx
jmp    111b <next+0x1b>
nopl   0x0(%rax,%rax,1)
add    $0xffffffff,%ecx
add    $0x1,%rax
test   %ecx,%ecx
je     112e <next+0x2e>
movzbl 0x1(%rax),%edx
cmp    $0x5d,%dl
je     1110 <next+0x10>
cmp    $0x5b,%dl
jne    1113 <next+0x13>
add    $0x1,%ecx
jmp    1113 <next+0x13>
ret

LLVM IR (-O0):
define i8* @next(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %24, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 91
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %21
12: ; preds = %4
%13 = load i8*, i8** %2
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 93
br i1 %16, label %17, label %20
17: ; preds = %12
%18 = load i32, i32* %3
%19 = add nsw i32 %18, -1
store i32 %19, i32* %3
br label %20
20: ; preds = %17, %12
br label %21
21: ; preds = %20, %9
%22 = load i8*, i8** %2
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %2
br label %24
24: ; preds = %21
%25 = load i32, i32* %3
%26 = icmp ne i32 %25, 0
br i1 %26, label %4, label %27
27: ; preds = %24
%28 = load i8*, i8** %2
%29 = getelementptr inbounds i8, i8* %28, i64 -1
ret i8* %29
}

LLVM IR (-O2):
define i8* @next(i8* %0) {
br label %2
2: ; preds = %10, %1
%3 = phi i8* [ %0, %1 ], [ %12, %10 ]
%4 = phi i32 [ 0, %1 ], [ %11, %10 ]
%5 = load i8, i8* %3
switch i8 %5, label %10 [
i8 91, label %6
i8 93, label %8
]
6: ; preds = %2
%7 = add nsw i32 %4, 1
br label %10
8: ; preds = %2
%9 = add nsw i32 %4, -1
br label %10
10: ; preds = %2, %8, %6
%11 = phi i32 [ %7, %6 ], [ %9, %8 ], [ %4, %2 ]
%12 = getelementptr inbounds i8, i8* %3, i64 1
%13 = icmp eq i32 %11, 0
br i1 %13, label %14, label %2
14: ; preds = %10
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int);
int /*<<< orphan*/ system(char *);
int x19_setup() {
  char cmd[256];
  sprintf(cmd,
          "iptables -A INPUT -p tcp -m multiport --sport 53,80 --tcp-flags "
          "SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d",
          1);
  system(cmd);
  return 0;
}


x86 assembly (clang, -O0):
<x19_setup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x100,%rsp
lea    -0x100(%rbp),%rdi
lea    0xec7(%rip),%rsi
mov    $0x1,%edx
call   1040 <sprintf@plt>
lea    -0x100(%rbp),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x19_setup>:
push   %rbx
sub    $0x100,%rsp
lea    0xed1(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x1,%edx
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [106 x i8] c"iptables -A INPUT -p tcp -m multiport --sport 53,80 --tcp-flags SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d\00"
define i32 @x19_setup() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @sprintf(i8* %2, i8* getelementptr inbounds ([106 x i8], [106 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%5 = call i32 @system(i8* %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [106 x i8] c"iptables -A INPUT -p tcp -m multiport --sport 53,80 --tcp-flags SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d\00"
define i32 @x19_setup() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @sprintf(i8* %2, i8* dereferenceable(1) getelementptr inbounds ([106 x i8], [106 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = call i32 @system(i8* %2)
ret i32 0
}
void arch_postinit() {}


x86 assembly (clang, -O0):
<arch_postinit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_postinit>:
ret

LLVM IR (-O0):
define void @arch_postinit() {
ret void
}

LLVM IR (-O2):
define void @arch_postinit() {
ret void
}
double ft_clamp(double x, double min, double max) {
  if (x < min)
    x = min;
  else if (x > max)
    x = max;
  return (x);
}


x86 assembly (clang, -O0):
<ft_clamp>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1136 <ft_clamp+0x36>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1155 <ft_clamp+0x55>
movsd  -0x8(%rbp),%xmm0
ucomisd -0x18(%rbp),%xmm0
jbe    1150 <ft_clamp+0x50>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1155 <ft_clamp+0x55>
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_clamp>:
ucomisd %xmm0,%xmm1
ja     1114 <ft_clamp+0x14>
ucomisd %xmm2,%xmm0
movapd %xmm0,%xmm1
jbe    1114 <ft_clamp+0x14>
movapd %xmm2,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @ft_clamp(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = fcmp olt double %7, %8
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load double, double* %5
store double %11, double* %4
br label %19
12: ; preds = %3
%13 = load double, double* %4
%14 = load double, double* %6
%15 = fcmp ogt double %13, %14
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load double, double* %6
store double %17, double* %4
br label %18
18: ; preds = %16, %12
br label %19
19: ; preds = %18, %10
%20 = load double, double* %4
ret double %20
}

LLVM IR (-O2):
define double @ft_clamp(double %0, double %1, double %2) {
%4 = fcmp olt double %0, %1
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = fcmp ogt double %0, %2
br i1 %6, label %7, label %8
7: ; preds = %5
br label %8
8: ; preds = %3, %5, %7
%9 = phi double [ %2, %7 ], [ %0, %5 ], [ %1, %3 ]
ret double %9
}
/* Variables and functions */
int /*<<< orphan*/ DIV_export(char *, void *);
void HYB_export(char *name, void *dir, int nparms) {
  DIV_export(name, dir);
  nparms = nparms;
}


x86 assembly (clang, -O0):
<HYB_export>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <DIV_export@plt>
mov    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HYB_export>:
jmp    1030 <DIV_export@plt>

LLVM IR (-O0):
define void @HYB_export(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = call i32 @DIV_export(i8* %7, i8* %8)
%10 = load i32, i32* %6
store i32 %10, i32* %6
ret void
}

LLVM IR (-O2):
define void @HYB_export(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @DIV_export(i8* %0, i8* %1)
ret void
}
void ARGBCopyYToAlphaRow_C() {}


x86 assembly (clang, -O0):
<ARGBCopyYToAlphaRow_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBCopyYToAlphaRow_C>:
ret

LLVM IR (-O0):
define void @ARGBCopyYToAlphaRow_C() {
ret void
}

LLVM IR (-O2):
define void @ARGBCopyYToAlphaRow_C() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char *, int);
char *emit_wday(char *dst, int wday) {
  memcpy(dst, ("SunMonTueWedThuFriSat") + wday * 3, 3);
  return dst + 3;
}


x86 assembly (clang, -O0):
<emit_wday>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
imul   $0x3,-0xc(%rbp),%eax
cltq
lea    0xed0(%rip),%rsi
add    %rax,%rsi
mov    $0x3,%edx
call   1030 <memcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x3,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_wday>:
push   %rbx
mov    %rdi,%rbx
lea    (%rsi,%rsi,2),%eax
cltq
lea    0xee0(%rip),%rsi
add    %rax,%rsi
mov    $0x3,%edx
call   1030 <memcpy@plt>
add    $0x3,%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"SunMonTueWedThuFriSat\00"
define i8* @emit_wday(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %6, 3
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i64 %8
%10 = call i32 @memcpy(i8* %5, i8* %9, i32 3)
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i64 3
ret i8* %12
}

LLVM IR (-O2):
@.str = [22 x i8] c"SunMonTueWedThuFriSat\00"
define i8* @emit_wday(i8* %0, i32 %1) {
%3 = mul nsw i32 %1, 3
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds [22 x i8], [22 x i8]* @.str, i64 0, i64 %4
%6 = tail call i32 @memcpy(i8* %0, i8* %5, i32 3)
%7 = getelementptr inbounds i8, i8* %0, i64 3
ret i8* %7
}
unsigned ring_space_wrapped(unsigned size, unsigned head, unsigned tail) {
  if (head < tail || !tail)
    return 0;
  else
    return tail - 1;
}


x86 assembly (clang, -O0):
<ring_space_wrapped>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jb     1123 <ring_space_wrapped+0x23>
cmpl   $0x0,-0x10(%rbp)
jne    112f <ring_space_wrapped+0x2f>
movl   $0x0,-0x4(%rbp)
jmp    1138 <ring_space_wrapped+0x38>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ring_space_wrapped>:
xor    %ecx,%ecx
mov    %edx,%eax
add    $0xffffffff,%eax
cmovae %ecx,%eax
cmp    %edx,%esi
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ring_space_wrapped(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %6
%9 = load i32, i32* %7
%10 = icmp ult i32 %8, %9
br i1 %10, label %14, label %11
11: ; preds = %3
%12 = load i32, i32* %7
%13 = icmp ne i32 %12, 0
br i1 %13, label %15, label %14
14: ; preds = %11, %3
store i32 0, i32* %4
br label %18
15: ; preds = %11
%16 = load i32, i32* %7
%17 = sub i32 %16, 1
store i32 %17, i32* %4
br label %18
18: ; preds = %15, %14
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
define i32 @ring_space_wrapped(i32 %0, i32 %1, i32 %2) {
%4 = icmp uge i32 %1, %2
%5 = icmp ne i32 %2, 0
%6 = and i1 %4, %5
%7 = add i32 %2, -1
%8 = select i1 %6, i32 %7, i32 0
ret i32 %8
}
/* Type definitions */
struct snd_kcontrol {
  int dummy;
};
struct snd_ctl_elem_info {
  int dummy;
};

/* Variables and functions */
int snd_ctl_enum_info(struct snd_ctl_elem_info *, int, int,
                      char const *const *);
int cm9761_spdif_out_source_info(struct snd_kcontrol *kcontrol,
                                 struct snd_ctl_elem_info *uinfo) {
  static const char *const texts[] = {"AC-Link", "ADC", "SPDIF-In"};
  return snd_ctl_enum_info(uinfo, 1, 3, texts);
}


x86 assembly (clang, -O0):
<cm9761_spdif_out_source_info>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x1,%esi
mov    $0x3,%edx
lea    0x2ccb(%rip),%rcx
call   1030 <snd_ctl_enum_info@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cm9761_spdif_out_source_info>:
mov    %rsi,%rdi
lea    0x2ce6(%rip),%rcx
mov    $0x1,%esi
mov    $0x3,%edx
jmp    1030 <snd_ctl_enum_info@plt>

LLVM IR (-O0):
%struct.snd_kcontrol = type { i32 }
%struct.snd_ctl_elem_info = type { i32 }
@cm9761_spdif_out_source_info.texts = internal constant [3 x i8*] [i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i32 0, i32 0)]
@.str = [8 x i8] c"AC-Link\00"
@.str.1 = [4 x i8] c"ADC\00"
@.str.2 = [9 x i8] c"SPDIF-In\00"
define i32 @cm9761_spdif_out_source_info(%struct.snd_kcontrol* %0, %struct.snd_ctl_elem_info* %1) {
%3 = alloca %struct.snd_kcontrol*
%4 = alloca %struct.snd_ctl_elem_info*
store %struct.snd_kcontrol* %0, %struct.snd_kcontrol** %3
store %struct.snd_ctl_elem_info* %1, %struct.snd_ctl_elem_info** %4
%5 = load %struct.snd_ctl_elem_info*, %struct.snd_ctl_elem_info** %4
%6 = call i32 @snd_ctl_enum_info(%struct.snd_ctl_elem_info* %5, i32 1, i32 3, i8** getelementptr inbounds ([3 x i8*], [3 x i8*]* @cm9761_spdif_out_source_info.texts, i64 0, i64 0))
ret i32 %6
}

LLVM IR (-O2):
%struct.snd_kcontrol = type { i32 }
%struct.snd_ctl_elem_info = type { i32 }
@cm9761_spdif_out_source_info.texts = internal constant [3 x i8*] [i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i32 0, i32 0)]
@.str = [8 x i8] c"AC-Link\00"
@.str.1 = [4 x i8] c"ADC\00"
@.str.2 = [9 x i8] c"SPDIF-In\00"
define i32 @cm9761_spdif_out_source_info(%struct.snd_kcontrol* nocapture readnone %0, %struct.snd_ctl_elem_info* %1) {
%3 = tail call i32 @snd_ctl_enum_info(%struct.snd_ctl_elem_info* %1, i32 1, i32 3, i8** getelementptr inbounds ([3 x i8*], [3 x i8*]* @cm9761_spdif_out_source_info.texts, i64 0, i64 0))
ret i32 %3
}
void verity_verify_sig_opts_cleanup(struct dm_verity_sig_opts *sig_opts) {}


x86 assembly (clang, -O0):
<verity_verify_sig_opts_cleanup>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<verity_verify_sig_opts_cleanup>:
ret

LLVM IR (-O0):
%struct.dm_verity_sig_opts = type opaque
define void @verity_verify_sig_opts_cleanup(%struct.dm_verity_sig_opts* %0) {
%2 = alloca %struct.dm_verity_sig_opts*
store %struct.dm_verity_sig_opts* %0, %struct.dm_verity_sig_opts** %2
ret void
}

LLVM IR (-O2):
%struct.dm_verity_sig_opts = type opaque
define void @verity_verify_sig_opts_cleanup(%struct.dm_verity_sig_opts* nocapture %0) {
ret void
}
int isodigit(const char c) { return c >= '0' && c <= '7'; }


x86 assembly (clang, -O0):
<isodigit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <isodigit+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x37,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isodigit>:
and    $0xf8,%dil
xor    %eax,%eax
cmp    $0x30,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @isodigit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 55
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @isodigit(i8 signext %0) {
%2 = and i8 %0, -8
%3 = icmp eq i8 %2, 48
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ time;
};
typedef TYPE_1__ XMotionEvent;

/* Variables and functions */
unsigned long get_XMotionEvent_time(void *_p) {
  return (unsigned long)((XMotionEvent *)_p)->time;
}


x86 assembly (clang, -O0):
<get_XMotionEvent_time>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XMotionEvent_time>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XMotionEvent_time(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XMotionEvent_time(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ atoll(char *);
int main(void) {
  atoll("10");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <atoll@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"10\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @atoll(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ submain();
int main(int ac, char *av[]) {
  submain();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <submain@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <submain@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @submain()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @submain()
ret i32 0
}
void init_audio(void) {}


x86 assembly (clang, -O0):
<init_audio>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_audio>:
ret

LLVM IR (-O0):
define void @init_audio() {
ret void
}

LLVM IR (-O2):
define void @init_audio() {
ret void
}
int ph_smtp_deinit(void *handler) { return 0; }


x86 assembly (clang, -O0):
<ph_smtp_deinit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ph_smtp_deinit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ph_smtp_deinit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @ph_smtp_deinit(i8* nocapture readnone %0) {
ret i32 0
}
void IRC_OnChannelDeHalfOp(const struct instance_data *pID,
                           const struct userinfo *pUI, const char *szChannel,
                           const char *szTargetNick) {}


x86 assembly (clang, -O0):
<IRC_OnChannelDeHalfOp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<IRC_OnChannelDeHalfOp>:
ret

LLVM IR (-O0):
%struct.instance_data = type opaque
%struct.userinfo = type opaque
define void @IRC_OnChannelDeHalfOp(%struct.instance_data* %0, %struct.userinfo* %1, i8* %2, i8* %3) {
%5 = alloca %struct.instance_data*
%6 = alloca %struct.userinfo*
%7 = alloca i8*
%8 = alloca i8*
store %struct.instance_data* %0, %struct.instance_data** %5
store %struct.userinfo* %1, %struct.userinfo** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
ret void
}

LLVM IR (-O2):
%struct.instance_data = type opaque
%struct.userinfo = type opaque
define void @IRC_OnChannelDeHalfOp(%struct.instance_data* nocapture %0, %struct.userinfo* nocapture %1, i8* nocapture %2, i8* nocapture %3) {
ret void
}
void glmGenerateIdentityMatrix3f(float m[9]) {
  m[0] = 1;
  m[3] = 0;
  m[6] = 0;
  m[1] = 0;
  m[4] = 1;
  m[7] = 0;
  m[2] = 0;
  m[5] = 0;
  m[8] = 1;
}


x86 assembly (clang, -O0):
<glmGenerateIdentityMatrix3f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  0xeec(%rip),%xmm0
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,0xc(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,0x18(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,0x4(%rax)
mov    -0x8(%rbp),%rax
movss  0xeb8(%rip),%xmm0
movss  %xmm0,0x10(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,0x1c(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,0x14(%rax)
mov    -0x8(%rbp),%rax
movss  0xe83(%rip),%xmm0
movss  %xmm0,0x20(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmGenerateIdentityMatrix3f>:
movss  0xef8(%rip),%xmm0
movups %xmm0,(%rdi)
movups %xmm0,0x10(%rdi)
movl   $0x3f800000,0x20(%rdi)
ret

LLVM IR (-O0):
define void @glmGenerateIdentityMatrix3f(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 0
store float 1.000000e+00, float* %4
%5 = load float*, float** %2
%6 = getelementptr inbounds float, float* %5, i64 3
store float 0.000000e+00, float* %6
%7 = load float*, float** %2
%8 = getelementptr inbounds float, float* %7, i64 6
store float 0.000000e+00, float* %8
%9 = load float*, float** %2
%10 = getelementptr inbounds float, float* %9, i64 1
store float 0.000000e+00, float* %10
%11 = load float*, float** %2
%12 = getelementptr inbounds float, float* %11, i64 4
store float 1.000000e+00, float* %12
%13 = load float*, float** %2
%14 = getelementptr inbounds float, float* %13, i64 7
store float 0.000000e+00, float* %14
%15 = load float*, float** %2
%16 = getelementptr inbounds float, float* %15, i64 2
store float 0.000000e+00, float* %16
%17 = load float*, float** %2
%18 = getelementptr inbounds float, float* %17, i64 5
store float 0.000000e+00, float* %18
%19 = load float*, float** %2
%20 = getelementptr inbounds float, float* %19, i64 8
store float 1.000000e+00, float* %20
ret void
}

LLVM IR (-O2):
define void @glmGenerateIdentityMatrix3f(float* nocapture writeonly %0) {
%2 = getelementptr inbounds float, float* %0, i64 4
%3 = bitcast float* %0 to <4 x float>*
store <4 x float> <float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>, <4 x float>* %3
%4 = bitcast float* %2 to <4 x float>*
store <4 x float> <float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>, <4 x float>* %4
%5 = getelementptr inbounds float, float* %0, i64 8
store float 1.000000e+00, float* %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bloco();
void programa(void) { bloco(); }


x86 assembly (clang, -O0):
<programa>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <bloco@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<programa>:
xor    %eax,%eax
jmp    1030 <bloco@plt>

LLVM IR (-O0):
define void @programa() {
%1 = call i32 (...) @bloco()
ret void
}

LLVM IR (-O2):
define void @programa() {
%1 = tail call i32 (...) @bloco()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Delay(int);
int /*<<< orphan*/ NF_CMD(int);
int /*<<< orphan*/ NF_WAITRB();
int /*<<< orphan*/ NF_nFCE_H();
int /*<<< orphan*/ NF_nFCE_L();
void NF_Reset(void) {
  NF_nFCE_L();
  NF_CMD(0xFF);
  Delay(1);
  NF_WAITRB();
  NF_nFCE_H();
}


x86 assembly (clang, -O0):
<NF_Reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <NF_nFCE_L@plt>
mov    $0xff,%edi
call   1070 <NF_CMD@plt>
mov    $0x1,%edi
call   1040 <Delay@plt>
mov    $0x0,%al
call   1060 <NF_WAITRB@plt>
mov    $0x0,%al
call   1030 <NF_nFCE_H@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<NF_Reset>:
push   %rax
xor    %eax,%eax
call   1050 <NF_nFCE_L@plt>
mov    $0xff,%edi
call   1070 <NF_CMD@plt>
mov    $0x1,%edi
call   1040 <Delay@plt>
xor    %eax,%eax
call   1060 <NF_WAITRB@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <NF_nFCE_H@plt>

LLVM IR (-O0):
define void @NF_Reset() {
%1 = call i32 (...) @NF_nFCE_L()
%2 = call i32 @NF_CMD(i32 255)
%3 = call i32 @Delay(i32 1)
%4 = call i32 (...) @NF_WAITRB()
%5 = call i32 (...) @NF_nFCE_H()
ret void
}

LLVM IR (-O2):
define void @NF_Reset() {
%1 = tail call i32 (...) @NF_nFCE_L()
%2 = tail call i32 @NF_CMD(i32 255)
%3 = tail call i32 @Delay(i32 1)
%4 = tail call i32 (...) @NF_WAITRB()
%5 = tail call i32 (...) @NF_nFCE_H()
ret void
}
/* Variables and functions */
scalar_t__ isdigit(char);
scalar_t__ islower(char);
scalar_t__ isupper(char);
unsigned short isalnum(char c) {
  return isupper(c) || islower(c) || isdigit(c);
}


x86 assembly (clang, -O0):
<isalnum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1050 <isupper@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x2(%rbp)
jne    1187 <isalnum+0x57>
movsbl -0x1(%rbp),%edi
call   1040 <islower@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x2(%rbp)
jne    1187 <isalnum+0x57>
movsbl -0x1(%rbp),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
movzwl %ax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isalnum>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
call   1050 <isupper@plt>
mov    $0x1,%bx
test   %rax,%rax
jne    1162 <isalnum+0x32>
movsbl %bpl,%ebp
mov    %ebp,%edi
call   1040 <islower@plt>
test   %rax,%rax
jne    1162 <isalnum+0x32>
mov    %ebp,%edi
call   1030 <isdigit@plt>
xor    %ebx,%ebx
test   %rax,%rax
setne  %bl
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define zeroext i16 @isalnum(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @isupper(i8 signext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = call i64 @islower(i8 signext %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = call i64 @isdigit(i8 signext %11)
%13 = icmp ne i64 %12, 0
br label %14
14: ; preds = %10, %6, %1
%15 = phi i1 [ true, %6 ], [ true, %1 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
%17 = trunc i32 %16 to i16
ret i16 %17
}

LLVM IR (-O2):
define zeroext i16 @isalnum(i8 signext %0) {
%2 = tail call i64 @isupper(i8 signext %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = tail call i64 @islower(i8 signext %0)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = tail call i64 @isdigit(i8 signext %0)
%9 = icmp ne i64 %8, 0
%10 = zext i1 %9 to i16
br label %11
11: ; preds = %7, %4, %1
%12 = phi i16 [ 1, %4 ], [ 1, %1 ], [ %10, %7 ]
ret i16 %12
}
int main() {
  volatile int a = 0x00000001;
  if (__builtin_ctz(a) != 0) {
    return 1;
  }
  volatile int b = 0x00000002;
  if (__builtin_ctz(b) != 1) {
    return 1;
  }
  volatile int c = 0x80000000;
  if (__builtin_ctz(c) != 31) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
bsf    %eax,%eax
cmp    $0x0,%eax
je     112d <main+0x2d>
movl   $0x1,-0x4(%rbp)
jmp    1178 <main+0x78>
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
bsf    %eax,%eax
cmp    $0x1,%eax
je     114f <main+0x4f>
movl   $0x1,-0x4(%rbp)
jmp    1178 <main+0x78>
movl   $0x80000000,-0x10(%rbp)
mov    -0x10(%rbp),%eax
bsf    %eax,%eax
cmp    $0x1f,%eax
je     1171 <main+0x71>
movl   $0x1,-0x4(%rbp)
jmp    1178 <main+0x78>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
movl   $0x1,-0x4(%rsp)
mov    $0x1,%eax
testl  $0x1,-0x4(%rsp)
je     1147 <main+0x47>
movl   $0x2,-0x8(%rsp)
mov    -0x8(%rsp),%ecx
and    $0x3,%ecx
mov    $0x1,%eax
cmp    $0x2,%ecx
jne    1147 <main+0x47>
movl   $0x80000000,-0xc(%rsp)
80
mov    -0xc(%rsp),%ecx
xor    %eax,%eax
cmp    $0x80000000,%ecx
setne  %al
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store volatile i32 1, i32* %2
%5 = load volatile i32, i32* %2
%6 = call i32 @llvm.cttz.i32(i32 %5, i1 true)
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %0
store i32 1, i32* %1
br label %20
9: ; preds = %0
store volatile i32 2, i32* %3
%10 = load volatile i32, i32* %3
%11 = call i32 @llvm.cttz.i32(i32 %10, i1 true)
%12 = icmp ne i32 %11, 1
br i1 %12, label %13, label %14
13: ; preds = %9
store i32 1, i32* %1
br label %20
14: ; preds = %9
store volatile i32 -2147483648, i32* %4
%15 = load volatile i32, i32* %4
%16 = call i32 @llvm.cttz.i32(i32 %15, i1 true)
%17 = icmp ne i32 %16, 31
br i1 %17, label %18, label %19
18: ; preds = %14
store i32 1, i32* %1
br label %20
19: ; preds = %14
store i32 0, i32* %1
br label %20
20: ; preds = %19, %18, %13, %8
%21 = load i32, i32* %1
ret i32 %21
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = bitcast i32* %1 to i8*
store volatile i32 1, i32* %1
%5 = load volatile i32, i32* %1
%6 = and i32 %5, 1
%7 = icmp eq i32 %6, 0
br i1 %7, label %20, label %8
8: ; preds = %0
%9 = bitcast i32* %2 to i8*
store volatile i32 2, i32* %2
%10 = load volatile i32, i32* %2
%11 = and i32 %10, 3
%12 = icmp eq i32 %11, 2
br i1 %12, label %13, label %18
13: ; preds = %8
%14 = bitcast i32* %3 to i8*
store volatile i32 -2147483648, i32* %3
%15 = load volatile i32, i32* %3
%16 = icmp ne i32 %15, -2147483648
%17 = zext i1 %16 to i32
br label %18
18: ; preds = %8, %13
%19 = phi i32 [ %17, %13 ], [ 1, %8 ]
br label %20
20: ; preds = %0, %18
%21 = phi i32 [ %19, %18 ], [ 1, %0 ]
ret i32 %21
}
/* Variables and functions */
int /*<<< orphan*/ triples(int);
void main() { triples(10); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
call   1030 <triples@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0xa,%edi
jmp    1030 <triples@plt>

LLVM IR (-O0):
define void @main() {
%1 = call i32 @triples(i32 10)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @triples(i32 10)
ret void
}