xunge/DecIR huggingface dataset:
int shortGT(const void *a, const void *b) {
  short da = *(short *)a;
  short db = *(short *)b;
  if (da == db)
    return 0;
  return (da > db) ? 1 : -1;
}


x86 assembly (clang, -O0):
<shortGT>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ax
mov    %ax,-0x1a(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%ax
mov    %ax,-0x1c(%rbp)
movswl -0x1a(%rbp),%eax
movswl -0x1c(%rbp),%ecx
cmp    %ecx,%eax
jne    113e <shortGT+0x3e>
movl   $0x0,-0x4(%rbp)
jmp    1158 <shortGT+0x58>
movswl -0x1a(%rbp),%edx
movswl -0x1c(%rbp),%esi
mov    $0xffffffff,%eax
mov    $0x1,%ecx
cmp    %esi,%edx
cmovg  %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shortGT>:
movzwl (%rdi),%eax
xor    %ecx,%ecx
xor    %edx,%edx
cmp    (%rsi),%ax
setg   %dl
lea    -0x1(%rdx,%rdx,1),%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @shortGT(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i16
%7 = alloca i16
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i16*
%10 = load i16, i16* %9
store i16 %10, i16* %6
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to i16*
%13 = load i16, i16* %12
store i16 %13, i16* %7
%14 = load i16, i16* %6
%15 = sext i16 %14 to i32
%16 = load i16, i16* %7
%17 = sext i16 %16 to i32
%18 = icmp eq i32 %15, %17
br i1 %18, label %19, label %20
19: ; preds = %2
store i32 0, i32* %3
br label %28
20: ; preds = %2
%21 = load i16, i16* %6
%22 = sext i16 %21 to i32
%23 = load i16, i16* %7
%24 = sext i16 %23 to i32
%25 = icmp sgt i32 %22, %24
%26 = zext i1 %25 to i64
%27 = select i1 %25, i32 1, i32 -1
store i32 %27, i32* %3
br label %28
28: ; preds = %20, %19
%29 = load i32, i32* %3
ret i32 %29
}

LLVM IR (-O2):
define i32 @shortGT(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i16*
%4 = load i16, i16* %3
%5 = bitcast i8* %1 to i16*
%6 = load i16, i16* %5
%7 = icmp eq i16 %4, %6
%8 = icmp sgt i16 %4, %6
%9 = select i1 %8, i32 1, i32 -1
%10 = select i1 %7, i32 0, i32 %9
ret i32 %10
}
void gerepilemanysp() {}


x86 assembly (clang, -O0):
<gerepilemanysp>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gerepilemanysp>:
ret

LLVM IR (-O0):
define void @gerepilemanysp() {
ret void
}

LLVM IR (-O2):
define void @gerepilemanysp() {
ret void
}
/* Variables and functions */
int _ada_hello(int, char const *, char const *);
void call_hello(int id, const char *action, const char *message) {
  int result = _ada_hello(id, action, message);
}


x86 assembly (clang, -O0):
<call_hello>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <_ada_hello@plt>
mov    %eax,-0x1c(%rbp)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_hello>:
jmp    1030 <_ada_hello@plt>

LLVM IR (-O0):
define void @call_hello(i32 %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = call i32 @_ada_hello(i32 %8, i8* %9, i8* %10)
store i32 %11, i32* %7
ret void
}

LLVM IR (-O2):
define void @call_hello(i32 %0, i8* %1, i8* %2) {
%4 = tail call i32 @_ada_hello(i32 %0, i8* %1, i8* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fabs(double);
double sqrt(int /*<<< orphan*/);
double freezing_point(double salinity, double pressure) {
  return (-0.0575 + 1.710523e-3 * sqrt(fabs(salinity)) -
          2.154996e-4 * salinity) *
             salinity -
         7.53e-4 * pressure;
}


x86 assembly (clang, -O0):
<freezing_point>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <fabs@plt>
mov    %eax,%edi
call   1040 <sqrt@plt>
movaps %xmm0,%xmm1
movsd  0xec2(%rip),%xmm0
mulsd  %xmm0,%xmm1
movsd  0xebe(%rip),%xmm0
addsd  %xmm0,%xmm1
movsd  -0x8(%rbp),%xmm0
movsd  0xe9d(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  -0x8(%rbp),%xmm2
movsd  0xe80(%rip),%xmm1
mulsd  -0x10(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freezing_point>:
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
movsd  %xmm0,0x8(%rsp)
call   1030 <fabs@plt>
mov    %eax,%edi
call   1040 <sqrt@plt>
mulsd  0xebc(%rip),%xmm0
addsd  0xebc(%rip),%xmm0
movsd  0xebc(%rip),%xmm1
movsd  0x8(%rsp),%xmm2
mulsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
movsd  0x10(%rsp),%xmm1
mulsd  0xea8(%rip),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @freezing_point(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = call i32 @fabs(double %5)
%7 = call double @sqrt(i32 %6)
%8 = call double @llvm.fmuladd.f64(double 0x3F5C0674160502A7, double %7, double -5.750000e-02)
%9 = load double, double* %3
%10 = call double @llvm.fmuladd.f64(double 0xBF2C3EF777F64FB6, double %9, double %8)
%11 = load double, double* %3
%12 = load double, double* %4
%13 = fmul double 7.530000e-04, %12
%14 = fneg double %13
%15 = call double @llvm.fmuladd.f64(double %10, double %11, double %14)
ret double %15
}

LLVM IR (-O2):
define double @freezing_point(double %0, double %1) {
%3 = tail call i32 @fabs(double %0)
%4 = tail call double @sqrt(i32 %3)
%5 = tail call double @llvm.fmuladd.f64(double %4, double 0x3F5C0674160502A7, double -5.750000e-02)
%6 = tail call double @llvm.fmuladd.f64(double %0, double 0xBF2C3EF777F64FB6, double %5)
%7 = fmul double %1, -7.530000e-04
%8 = tail call double @llvm.fmuladd.f64(double %6, double %0, double %7)
ret double %8
}
int pre_defined(int n) {
  return n == 1 ? 1 : n == 2 ? 2 : n == 6 ? 3 : n == 24 ? 4 : n == 120 ? 5 : 6;
}


x86 assembly (clang, -O0):
<pre_defined>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jne    111e <pre_defined+0x1e>
mov    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    118b <pre_defined+0x8b>
cmpl   $0x2,-0x4(%rbp)
jne    1135 <pre_defined+0x35>
mov    $0x2,%eax
mov    %eax,-0xc(%rbp)
jmp    1185 <pre_defined+0x85>
cmpl   $0x6,-0x4(%rbp)
jne    114c <pre_defined+0x4c>
mov    $0x3,%eax
mov    %eax,-0x10(%rbp)
jmp    117f <pre_defined+0x7f>
cmpl   $0x18,-0x4(%rbp)
jne    1163 <pre_defined+0x63>
mov    $0x4,%eax
mov    %eax,-0x14(%rbp)
jmp    1179 <pre_defined+0x79>
mov    -0x4(%rbp),%edx
mov    $0x6,%eax
mov    $0x5,%ecx
cmp    $0x78,%edx
cmove  %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pre_defined>:
mov    %edi,%eax
lea    -0x1(%rax),%ecx
cmp    $0x17,%ecx
ja     1120 <pre_defined+0x20>
lea    0xeef(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
mov    $0x2,%eax
ret
xor    %ecx,%ecx
cmp    $0x78,%eax
sete   %cl
mov    $0x6,%eax
sub    %ecx,%eax
ret
mov    $0x3,%eax
ret
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @pre_defined(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1
br i1 %4, label %5, label %6
5: ; preds = %1
br label %29
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp eq i32 %7, 2
br i1 %8, label %9, label %10
9: ; preds = %6
br label %27
10: ; preds = %6
%11 = load i32, i32* %2
%12 = icmp eq i32 %11, 6
br i1 %12, label %13, label %14
13: ; preds = %10
br label %25
14: ; preds = %10
%15 = load i32, i32* %2
%16 = icmp eq i32 %15, 24
br i1 %16, label %17, label %18
17: ; preds = %14
br label %23
18: ; preds = %14
%19 = load i32, i32* %2
%20 = icmp eq i32 %19, 120
%21 = zext i1 %20 to i64
%22 = select i1 %20, i32 5, i32 6
br label %23
23: ; preds = %18, %17
%24 = phi i32 [ 4, %17 ], [ %22, %18 ]
br label %25
25: ; preds = %23, %13
%26 = phi i32 [ 3, %13 ], [ %24, %23 ]
br label %27
27: ; preds = %25, %9
%28 = phi i32 [ 2, %9 ], [ %26, %25 ]
br label %29
29: ; preds = %27, %5
%30 = phi i32 [ 1, %5 ], [ %28, %27 ]
ret i32 %30
}

LLVM IR (-O2):
define i32 @pre_defined(i32 %0) {
switch i32 %0, label %2 [
i32 1, label %8
i32 2, label %5
i32 6, label %6
i32 24, label %7
]
2: ; preds = %1
%3 = icmp eq i32 %0, 120
%4 = select i1 %3, i32 5, i32 6
br label %8
5: ; preds = %1
br label %8
6: ; preds = %1
br label %8
7: ; preds = %1
br label %8
8: ; preds = %1, %7, %6, %5, %2
%9 = phi i32 [ %0, %1 ], [ %4, %2 ], [ 2, %5 ], [ 3, %6 ], [ 4, %7 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ test_dta_dates();
int main(int argc, char *argv[]) {
  test_dta_dates();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <test_dta_dates@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_dta_dates@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @test_dta_dates()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @test_dta_dates()
ret i32 0
}
int test_imm_2Fuint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x2F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_2Fuint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x2f,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Fuint64_highword_mem>:
testb  $0x2f,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Fuint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 47
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_2Fuint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 201863462912
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int nvisuals;
};
typedef TYPE_1__ Depth;

/* Variables and functions */
void set_Depth_nvisuals(void *_p, int _v) { ((Depth *)_p)->nvisuals = (int)_v; }


x86 assembly (clang, -O0):
<set_Depth_nvisuals>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_Depth_nvisuals>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_Depth_nvisuals(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_Depth_nvisuals(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
short error_get_module_id(const int error) { return ((error) >> (4)); }


x86 assembly (clang, -O0):
<error_get_module_id>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<error_get_module_id>:
mov    %edi,%eax
shr    $0x4,%eax
ret

LLVM IR (-O0):
define signext i16 @error_get_module_id(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 4
%5 = trunc i32 %4 to i16
ret i16 %5
}

LLVM IR (-O2):
define signext i16 @error_get_module_id(i32 %0) {
%2 = lshr i32 %0, 4
%3 = trunc i32 %2 to i16
ret i16 %3
}
/* Variables and functions */
int /*<<< orphan*/ movern(int, int, int, int);
int main(void) { movern(3, 1, 3, 2); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edx
mov    $0x1,%esi
mov    $0x2,%ecx
mov    %edx,%edi
call   1030 <movern@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x3,%edi
mov    $0x1,%esi
mov    $0x3,%edx
mov    $0x2,%ecx
call   1030 <movern@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @movern(i32 3, i32 1, i32 3, i32 2)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @movern(i32 3, i32 1, i32 3, i32 2)
ret i32 0
}
int rshift_rnd(int x, int a) {
  return (a > 0) ? ((x + (1 << (a - 1))) >> a) : (x << (-a));
}


x86 assembly (clang, -O0):
<rshift_rnd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1135 <rshift_rnd+0x35>
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
mov    %eax,-0xc(%rbp)
jmp    1142 <rshift_rnd+0x42>
mov    -0x4(%rbp),%eax
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rshift_rnd>:
test   %esi,%esi
jle    1115 <rshift_rnd+0x15>
lea    -0x1(%rsi),%ecx
mov    $0x1,%eax
shl    %cl,%eax
add    %edi,%eax
mov    %esi,%ecx
sar    %cl,%eax
ret
neg    %sil
mov    %esi,%ecx
shl    %cl,%edi
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @rshift_rnd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %2
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sub nsw i32 %9, 1
%11 = shl i32 1, %10
%12 = add nsw i32 %8, %11
%13 = load i32, i32* %4
%14 = ashr i32 %12, %13
br label %20
15: ; preds = %2
%16 = load i32, i32* %3
%17 = load i32, i32* %4
%18 = sub nsw i32 0, %17
%19 = shl i32 %16, %18
br label %20
20: ; preds = %15, %7
%21 = phi i32 [ %14, %7 ], [ %19, %15 ]
ret i32 %21
}

LLVM IR (-O2):
define i32 @rshift_rnd(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %9
4: ; preds = %2
%5 = add nsw i32 %1, -1
%6 = shl nuw i32 1, %5
%7 = add nsw i32 %6, %0
%8 = ashr i32 %7, %1
br label %12
9: ; preds = %2
%10 = sub nsw i32 0, %1
%11 = shl i32 %0, %10
br label %12
12: ; preds = %9, %4
%13 = phi i32 [ %8, %4 ], [ %11, %9 ]
ret i32 %13
}
void main(void) {
  int i = 0;
  int j = i;
  i++;
  j = i;
  int x = (int)j - 1;
  int z = x + 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = load i32, i32* %1
store i32 %5, i32* %2
%6 = load i32, i32* %1
%7 = add nsw i32 %6, 1
store i32 %7, i32* %1
%8 = load i32, i32* %1
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = sub nsw i32 %9, 1
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %4
ret void
}

LLVM IR (-O2):
define void @main() {
ret void
}
/* Variables and functions */
double pow(double, double);
double sumex(double ex) {
  return (1.0 + (1.0 - pow(ex, 19.0)) / (1.0 - ex) * pow(ex, 0.5));
}


x86 assembly (clang, -O0):
<sumex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xee6(%rip),%xmm1
call   1030 <pow@plt>
movaps %xmm0,%xmm1
movsd  0xec6(%rip),%xmm0
subsd  %xmm1,%xmm0
movsd  0xeba(%rip),%xmm1
subsd  -0x8(%rbp),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xea7(%rip),%xmm1
call   1030 <pow@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  0xe86(%rip),%xmm1
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sumex>:
sub    $0x18,%rsp
movsd  %xmm0,0x8(%rsp)
movsd  0xede(%rip),%xmm1
call   1030 <pow@plt>
movsd  0xed9(%rip),%xmm3
movapd %xmm3,%xmm1
subsd  %xmm0,%xmm1
movsd  0x8(%rsp),%xmm0
subsd  %xmm0,%xmm3
divsd  %xmm3,%xmm1
movsd  %xmm1,0x10(%rsp)
movsd  0xebd(%rip),%xmm1
call   1030 <pow@plt>
mulsd  0x10(%rsp),%xmm0
addsd  0xea2(%rip),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @sumex(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @pow(double %3, double 1.900000e+01)
%5 = fsub double 1.000000e+00, %4
%6 = load double, double* %2
%7 = fsub double 1.000000e+00, %6
%8 = fdiv double %5, %7
%9 = load double, double* %2
%10 = call double @pow(double %9, double 5.000000e-01)
%11 = call double @llvm.fmuladd.f64(double %8, double %10, double 1.000000e+00)
ret double %11
}

LLVM IR (-O2):
define double @sumex(double %0) {
%2 = tail call double @pow(double %0, double 1.900000e+01)
%3 = fsub double 1.000000e+00, %2
%4 = fsub double 1.000000e+00, %0
%5 = fdiv double %3, %4
%6 = tail call double @pow(double %0, double 5.000000e-01)
%7 = tail call double @llvm.fmuladd.f64(double %5, double %6, double 1.000000e+00)
ret double %7
}
/* Variables and functions */
scalar_t__ getegid();
scalar_t__ geteuid();
scalar_t__ getgid();
scalar_t__ getuid();
int evutil_issetugid(void) {
  if (getuid() != geteuid())
    return 1;
  if (getgid() != getegid())
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<evutil_issetugid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x0,%al
call   1030 <getuid@plt>
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1040 <geteuid@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
je     1176 <evutil_issetugid+0x36>
movl   $0x1,-0x4(%rbp)
jmp    11ab <evutil_issetugid+0x6b>
mov    $0x0,%al
call   1050 <getgid@plt>
mov    %rax,-0x18(%rbp)
mov    $0x0,%al
call   1060 <getegid@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
je     11a4 <evutil_issetugid+0x64>
movl   $0x1,-0x4(%rbp)
jmp    11ab <evutil_issetugid+0x6b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<evutil_issetugid>:
push   %rbx
xor    %eax,%eax
call   1030 <getuid@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1040 <geteuid@plt>
mov    %rax,%rcx
mov    $0x1,%eax
cmp    %rcx,%rbx
jne    117b <evutil_issetugid+0x3b>
xor    %eax,%eax
call   1050 <getgid@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1060 <getegid@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rbx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @evutil_issetugid() {
%1 = alloca i32
%2 = call i64 (...) @getuid()
%3 = call i64 (...) @geteuid()
%4 = icmp ne i64 %2, %3
br i1 %4, label %5, label %6
5: ; preds = %0
store i32 1, i32* %1
br label %12
6: ; preds = %0
%7 = call i64 (...) @getgid()
%8 = call i64 (...) @getegid()
%9 = icmp ne i64 %7, %8
br i1 %9, label %10, label %11
10: ; preds = %6
store i32 1, i32* %1
br label %12
11: ; preds = %6
store i32 0, i32* %1
br label %12
12: ; preds = %11, %10, %5
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @evutil_issetugid() {
%1 = tail call i64 (...) @getuid()
%2 = tail call i64 (...) @geteuid()
%3 = icmp eq i64 %1, %2
br i1 %3, label %4, label %9
4: ; preds = %0
%5 = tail call i64 (...) @getgid()
%6 = tail call i64 (...) @getegid()
%7 = icmp ne i64 %5, %6
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %4, %0
%10 = phi i32 [ 1, %0 ], [ %8, %4 ]
ret i32 %10
}
void SpiInit(void) {}


x86 assembly (clang, -O0):
<SpiInit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SpiInit>:
ret

LLVM IR (-O0):
define void @SpiInit() {
ret void
}

LLVM IR (-O2):
define void @SpiInit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FUTEX_WAKE;
int errno;
scalar_t__ futex(int *, int /*<<< orphan*/, int, int /*<<< orphan*/ *,
                 int /*<<< orphan*/ *, int /*<<< orphan*/);
int futex_wake(int *address, int count) {
  return futex(address, FUTEX_WAKE, count, NULL, NULL, 0) ? errno : 0;
}


x86 assembly (clang, -O0):
<futex_wake>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ea6(%rip),%rax
mov    (%rax),%esi
mov    -0xc(%rbp),%edx
xor    %eax,%eax
mov    %eax,%r8d
xor    %r9d,%r9d
mov    %r8,%rcx
call   1030 <futex@plt>
cmp    $0x0,%rax
je     115a <futex_wake+0x4a>
mov    0x2e90(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
jmp    1164 <futex_wake+0x54>
xor    %eax,%eax
mov    %eax,-0x10(%rbp)
jmp    1164 <futex_wake+0x54>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<futex_wake>:
push   %rbx
mov    %esi,%edx
mov    0x2eb6(%rip),%rax
mov    (%rax),%esi
xor    %ebx,%ebx
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
call   1030 <futex@plt>
test   %rax,%rax
je     1139 <futex_wake+0x29>
mov    0x2ea9(%rip),%rax
mov    (%rax),%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@FUTEX_WAKE = global i32 0
@errno = global i32 0
define i32 @futex_wake(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* @FUTEX_WAKE
%7 = load i32, i32* %4
%8 = call i64 @futex(i32* %5, i32 %6, i32 %7, i32* null, i32* null, i32 0)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = load i32, i32* @errno
br label %13
12: ; preds = %2
br label %13
13: ; preds = %12, %10
%14 = phi i32 [ %11, %10 ], [ 0, %12 ]
ret i32 %14
}

LLVM IR (-O2):
@FUTEX_WAKE = global i32 0
@errno = global i32 0
define i32 @futex_wake(i32* %0, i32 %1) {
%3 = load i32, i32* @FUTEX_WAKE
%4 = tail call i64 @futex(i32* %0, i32 %3, i32 %1, i32* null, i32* null, i32 0)
%5 = icmp eq i64 %4, 0
%6 = load i32, i32* @errno
%7 = select i1 %5, i32 0, i32 %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ acc_create(int *, int);
int main(int argc, char *argv[]) {
  int i;
#pragma acc enter data create(i)
  acc_create(&i, sizeof i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x14(%rbp),%rdi
mov    $0x4,%esi
call   1030 <acc_create@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0x4(%rsp),%rdi
mov    $0x4,%esi
call   1030 <acc_create@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 @acc_create(i32* %6, i32 4)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @acc_create(i32* %3, i32 4)
ret i32 0
}
int do_301() { return 301; }


x86 assembly (clang, -O0):
<do_301>:
push   %rbp
mov    %rsp,%rbp
mov    $0x12d,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_301>:
mov    $0x12d,%eax
ret

LLVM IR (-O0):
define i32 @do_301() {
ret i32 301
}

LLVM IR (-O2):
define i32 @do_301() {
ret i32 301
}
/* Variables and functions */
int netbas_system_call(int, char *, int /*<<< orphan*/, int /*<<< orphan*/,
                       int /*<<< orphan*/, int /*<<< orphan*/);
int delete_vm_region(char *name) {
  int ret = 0;
  ret = netbas_system_call(103, name, 0, 0, 0, 0);
  return ret;
}


x86 assembly (clang, -O0):
<delete_vm_region>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x67,%edi
xor    %r9d,%r9d
mov    %r9d,%edx
mov    %r9d,%ecx
mov    %r9d,%r8d
call   1030 <netbas_system_call@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delete_vm_region>:
mov    %rdi,%rsi
mov    $0x67,%edi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <netbas_system_call@plt>

LLVM IR (-O0):
define i32 @delete_vm_region(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%4 = load i8*, i8** %2
%5 = call i32 @netbas_system_call(i32 103, i8* %4, i32 0, i32 0, i32 0, i32 0)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @delete_vm_region(i8* %0) {
%2 = tail call i32 @netbas_system_call(i32 103, i8* %0, i32 0, i32 0, i32 0, i32 0)
ret i32 %2
}
int decode(int ch) { return ((ch + 30) & 0xFF); }


x86 assembly (clang, -O0):
<decode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1e,%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode>:
add    $0x1e,%edi
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @decode(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 30
%5 = and i32 %4, 255
ret i32 %5
}

LLVM IR (-O2):
define i32 @decode(i32 %0) {
%2 = add nsw i32 %0, 30
%3 = and i32 %2, 255
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
scalar_t__ fork();
int /*<<< orphan*/ sleep(int);
int main(int argc, char **argv, char **envp) {
  if (fork() == 0)
    exit(0);
  sleep(600);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x0,%al
call   1050 <fork@plt>
cmp    $0x0,%rax
jne    115b <main+0x2b>
xor    %edi,%edi
call   1030 <exit@plt>
mov    $0x258,%edi
call   1040 <sleep@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <fork@plt>
test   %rax,%rax
je     114b <main+0x1b>
mov    $0x258,%edi
call   1040 <sleep@plt>
xor    %eax,%eax
pop    %rcx
ret
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1, i8** %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8**
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8** %2, i8*** %6
%7 = call i64 (...) @fork()
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %3
%10 = call i32 @exit(i32 0)
unreachable
11: ; preds = %3
%12 = call i32 @sleep(i32 600)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1, i8** nocapture readnone %2) {
%4 = tail call i64 (...) @fork()
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @exit(i32 0)
unreachable
8: ; preds = %3
%9 = tail call i32 @sleep(i32 600)
ret i32 0
}
/* Type definitions */
struct libavl_allocator {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assert(int);
void *malloc(size_t);
void *avl_malloc(struct libavl_allocator *allocator, size_t size) {
  assert(allocator != NULL && size > 0);
  return malloc(size);
}


x86 assembly (clang, -O0):
<avl_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x11(%rbp)
je     114b <avl_malloc+0x2b>
cmpq   $0x0,-0x10(%rbp)
seta   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x10(%rbp),%rdi
call   1040 <malloc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avl_malloc>:
push   %rbx
mov    %rsi,%rbx
test   %rdi,%rdi
setne  %al
test   %rsi,%rsi
setne  %cl
and    %al,%cl
movzbl %cl,%edi
call   1030 <assert@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <malloc@plt>

LLVM IR (-O0):
%struct.libavl_allocator = type { i32 }
define i8* @avl_malloc(%struct.libavl_allocator* %0, i64 %1) {
%3 = alloca %struct.libavl_allocator*
%4 = alloca i64
store %struct.libavl_allocator* %0, %struct.libavl_allocator** %3
store i64 %1, i64* %4
%5 = load %struct.libavl_allocator*, %struct.libavl_allocator** %3
%6 = icmp ne %struct.libavl_allocator* %5, null
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i64, i64* %4
%9 = icmp ugt i64 %8, 0
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ false, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
%13 = call i32 @assert(i32 %12)
%14 = load i64, i64* %4
%15 = call i8* @malloc(i64 %14)
ret i8* %15
}

LLVM IR (-O2):
%struct.libavl_allocator = type { i32 }
define noalias i8* @avl_malloc(%struct.libavl_allocator* readnone %0, i64 %1) {
%3 = icmp ne %struct.libavl_allocator* %0, null
%4 = icmp ne i64 %1, 0
%5 = and i1 %3, %4
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
%8 = tail call i8* @malloc(i64 %1)
ret i8* %8
}
/* Variables and functions */
int /*<<< orphan*/ driver(int, int);
int main() {
  driver(10, -2);
  driver(146, -3);
  driver(15, -10);
  driver(12, -62);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xa,%edi
mov    $0xfffffffe,%esi
call   1030 <driver@plt>
mov    $0x92,%edi
mov    $0xfffffffd,%esi
call   1030 <driver@plt>
mov    $0xf,%edi
mov    $0xfffffff6,%esi
call   1030 <driver@plt>
mov    $0xc,%edi
mov    $0xffffffc2,%esi
call   1030 <driver@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
mov    $0xfffffffe,%esi
call   1030 <driver@plt>
mov    $0x92,%edi
mov    $0xfffffffd,%esi
call   1030 <driver@plt>
mov    $0xf,%edi
mov    $0xfffffff6,%esi
call   1030 <driver@plt>
mov    $0xc,%edi
mov    $0xffffffc2,%esi
call   1030 <driver@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @driver(i32 10, i32 -2)
%3 = call i32 @driver(i32 146, i32 -3)
%4 = call i32 @driver(i32 15, i32 -10)
%5 = call i32 @driver(i32 12, i32 -62)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @driver(i32 10, i32 -2)
%2 = tail call i32 @driver(i32 146, i32 -3)
%3 = tail call i32 @driver(i32 15, i32 -10)
%4 = tail call i32 @driver(i32 12, i32 -62)
ret i32 0
}
/* Variables and functions */
void *__builtin_arm_rsrp(char *);
void *rsrp() { return __builtin_arm_rsrp("sysreg"); }


x86 assembly (clang, -O0):
<rsrp>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <__builtin_arm_rsrp@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rsrp>:
lea    0xee9(%rip),%rdi
jmp    1030 <__builtin_arm_rsrp@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"sysreg\00"
define i8* @rsrp() {
%1 = call i8* @__builtin_arm_rsrp(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [7 x i8] c"sysreg\00"
define i8* @rsrp() {
%1 = tail call i8* @__builtin_arm_rsrp(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void DFGPrintTailer(FILE *Stream) {
  fprintf(Stream, "end_problem.\n");
  fprintf(Stream, "%%----------------------------------------------------------"
                  "--------------------\n");
}


x86 assembly (clang, -O0):
<DFGPrintTailer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x8(%rbp),%rdi
lea    0xed7(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DFGPrintTailer>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
mov    $0xd,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1040 <fwrite@plt>
lea    0xeca(%rip),%rsi
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"end_problem.\0A\00"
@.str.1 = [82 x i8] c"%%------------------------------------------------------------------------------\0A\00"
define void @DFGPrintTailer(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%5 = load i32*, i32** %2
%6 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([82 x i8], [82 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"end_problem.\0A\00"
@.str.1 = [82 x i8] c"%%------------------------------------------------------------------------------\0A\00"
define void @DFGPrintTailer(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i64 13, i64 1, i32* %0)
%3 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([82 x i8], [82 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int of_get_child_count(const struct device_node *parent) { return -38; }


x86 assembly (clang, -O0):
<of_get_child_count>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffda,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<of_get_child_count>:
mov    $0xffffffda,%eax
ret

LLVM IR (-O0):
%struct.device_node = type opaque
define i32 @of_get_child_count(%struct.device_node* %0) {
%2 = alloca %struct.device_node*
store %struct.device_node* %0, %struct.device_node** %2
ret i32 -38
}

LLVM IR (-O2):
%struct.device_node = type opaque
define i32 @of_get_child_count(%struct.device_node* nocapture readnone %0) {
ret i32 -38
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_178() {
  Assert_real((isqrt(178) == 13),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              895, ("Integer square root of 178 should be 13"));
}


x86 assembly (clang, -O0):
<t_sqrt_178>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb2,%edi
call   1030 <isqrt@plt>
cmp    $0xd,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0x37f,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_178>:
push   %rax
mov    $0xb2,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0xd,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0x37f,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [40 x i8] c"Integer square root of 178 should be 13\00"
define void @t_sqrt_178() {
%1 = call i32 @isqrt(i32 178)
%2 = icmp eq i32 %1, 13
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 895, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [40 x i8] c"Integer square root of 178 should be 13\00"
define void @t_sqrt_178() {
%1 = tail call i32 @isqrt(i32 178)
%2 = icmp eq i32 %1, 13
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 895, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DealWithDeclarator();
int /*<<< orphan*/ readToFirstIdentifier();
int main(int argc, char *argv[]) {
  readToFirstIdentifier();
  DealWithDeclarator();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <readToFirstIdentifier@plt>
mov    $0x0,%al
call   1030 <DealWithDeclarator@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <readToFirstIdentifier@plt>
xor    %eax,%eax
call   1030 <DealWithDeclarator@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @readToFirstIdentifier()
%7 = call i32 (...) @DealWithDeclarator()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @readToFirstIdentifier()
%4 = tail call i32 (...) @DealWithDeclarator()
ret i32 0
}
/* Variables and functions */
int rand();
int rand_born(int min, int max) {
  if (max - min != 0)
    return (rand() % (max - min) + min);
  return 0;
}


x86 assembly (clang, -O0):
<rand_born>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    -0x8(%rbp),%eax
cmp    $0x0,%eax
je     1148 <rand_born+0x38>
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0xc(%rbp),%ecx
sub    -0x8(%rbp),%ecx
cltd
idiv   %ecx
add    -0x8(%rbp),%edx
mov    %edx,-0x4(%rbp)
jmp    114f <rand_born+0x3f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_born>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
sub    %edi,%ebp
je     112b <rand_born+0x1b>
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %ebp
mov    %edx,%eax
add    %ebx,%eax
jmp    112d <rand_born+0x1d>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @rand_born(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = load i32, i32* %4
%8 = sub nsw i32 %6, %7
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %2
%11 = call i32 (...) @rand()
%12 = load i32, i32* %5
%13 = load i32, i32* %4
%14 = sub nsw i32 %12, %13
%15 = srem i32 %11, %14
%16 = load i32, i32* %4
%17 = add nsw i32 %15, %16
store i32 %17, i32* %3
br label %19
18: ; preds = %2
store i32 0, i32* %3
br label %19
19: ; preds = %18, %10
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @rand_born(i32 %0, i32 %1) {
%3 = sub nsw i32 %1, %0
%4 = icmp eq i32 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i32 (...) @rand()
%7 = srem i32 %6, %3
%8 = add nsw i32 %7, %0
br label %9
9: ; preds = %2, %5
%10 = phi i32 [ %8, %5 ], [ 0, %2 ]
ret i32 %10
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMR7C_get(void) { return U_WMRCORENONE_get("U_WMR7C"); }


x86 assembly (clang, -O0):
<U_WMR7C_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR7C_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR7C\00"
define i32 @U_WMR7C_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR7C\00"
define i32 @U_WMR7C_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
void func_if_else_2(int c) {
  int a = 0;
  if (c) {
    if (c) {
      a = 1;
    } else {
      a = 1;
    }
  } else {
    if (c) {
      a = 1;
    } else {
      a = 1;
    }
  }
}


x86 assembly (clang, -O0):
<func_if_else_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     113a <func_if_else_2+0x3a>
cmpl   $0x0,-0x4(%rbp)
je     112e <func_if_else_2+0x2e>
movl   $0x1,-0x8(%rbp)
jmp    1135 <func_if_else_2+0x35>
movl   $0x1,-0x8(%rbp)
jmp    115c <func_if_else_2+0x5c>
cmpl   $0x0,-0x4(%rbp)
je     1150 <func_if_else_2+0x50>
movl   $0x1,-0x8(%rbp)
jmp    1157 <func_if_else_2+0x57>
movl   $0x1,-0x8(%rbp)
jmp    115c <func_if_else_2+0x5c>
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_if_else_2>:
ret

LLVM IR (-O0):
define void @func_if_else_2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %3
br label %11
10: ; preds = %6
store i32 1, i32* %3
br label %11
11: ; preds = %10, %9
br label %18
12: ; preds = %1
%13 = load i32, i32* %2
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %12
store i32 1, i32* %3
br label %17
16: ; preds = %12
store i32 1, i32* %3
br label %17
17: ; preds = %16, %15
br label %18
18: ; preds = %17, %11
ret void
}

LLVM IR (-O2):
define void @func_if_else_2(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ config_cmd(unsigned char, unsigned int, unsigned int);
unsigned int inl(int);
int /*<<< orphan*/ outl(int /*<<< orphan*/, int);
unsigned int pcibios_read_config_dword(unsigned char bus, unsigned devfn,
                                       unsigned where) {
  outl(config_cmd(bus, devfn, where), 0xCF8);
  return inl(0xCFC);
}


x86 assembly (clang, -O0):
<pcibios_read_config_dword>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x1(%rbp),%al
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
movzbl %al,%edi
call   1040 <config_cmd@plt>
mov    %eax,%edi
mov    $0xcf8,%esi
call   1030 <outl@plt>
mov    $0xcfc,%edi
call   1050 <inl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcibios_read_config_dword>:
push   %rax
call   1040 <config_cmd@plt>
mov    %eax,%edi
mov    $0xcf8,%esi
call   1030 <outl@plt>
mov    $0xcfc,%edi
pop    %rax
jmp    1050 <inl@plt>

LLVM IR (-O0):
define i32 @pcibios_read_config_dword(i8 zeroext %0, i32 %1, i32 %2) {
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
store i8 %0, i8* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8, i8* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @config_cmd(i8 zeroext %7, i32 %8, i32 %9)
%11 = call i32 @outl(i32 %10, i32 3320)
%12 = call i32 @inl(i32 3324)
ret i32 %12
}

LLVM IR (-O2):
define i32 @pcibios_read_config_dword(i8 zeroext %0, i32 %1, i32 %2) {
%4 = tail call i32 @config_cmd(i8 zeroext %0, i32 %1, i32 %2)
%5 = tail call i32 @outl(i32 %4, i32 3320)
%6 = tail call i32 @inl(i32 3324)
ret i32 %6
}
int mag_open_hwoffset(struct ssp_data *data) { return 0; }


x86 assembly (clang, -O0):
<mag_open_hwoffset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mag_open_hwoffset>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ssp_data = type opaque
define i32 @mag_open_hwoffset(%struct.ssp_data* %0) {
%2 = alloca %struct.ssp_data*
store %struct.ssp_data* %0, %struct.ssp_data** %2
ret i32 0
}

LLVM IR (-O2):
%struct.ssp_data = type opaque
define i32 @mag_open_hwoffset(%struct.ssp_data* nocapture readnone %0) {
ret i32 0
}
unsigned long int __strspn_c1(const char *__s, signed int __accept) {
  unsigned long int __result = (unsigned long int)0;
  while ((signed int)__s[(signed long int)__result] == __accept) {
    __result = __result + 1ul;
    __result;
  }
  return __result;
}


x86 assembly (clang, -O0):
<__strspn_c1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    -0xc(%rbp),%eax
jne    1139 <__strspn_c1+0x39>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1113 <__strspn_c1+0x13>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__strspn_c1>:
mov    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
movsbl 0x1(%rdi,%rax,1),%ecx
add    $0x1,%rax
cmp    %esi,%ecx
je     1110 <__strspn_c1+0x10>
ret

LLVM IR (-O0):
define i64 @__strspn_c1(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i64
store i8* %0, i8** %3
store i32 %1, i32* %4
store i64 0, i64* %5
br label %6
6: ; preds = %14, %2
%7 = load i8*, i8** %3
%8 = load i64, i64* %5
%9 = getelementptr inbounds i8, i8* %7, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = load i32, i32* %4
%13 = icmp eq i32 %11, %12
br i1 %13, label %14, label %18
14: ; preds = %6
%15 = load i64, i64* %5
%16 = add i64 %15, 1
store i64 %16, i64* %5
%17 = load i64, i64* %5
br label %6
18: ; preds = %6
%19 = load i64, i64* %5
ret i64 %19
}

LLVM IR (-O2):
define i64 @__strspn_c1(i8* nocapture %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i64 [ 0, %2 ], [ %9, %3 ]
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, %1
%9 = add i64 %4, 1
br i1 %8, label %3, label %10
10: ; preds = %3
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ put8(int);
void sub_reg32_reg32(int reg1, int reg2) {
  put8(0x29);
  put8((reg2 << 3) | reg1 | 0xC0);
}


x86 assembly (clang, -O0):
<sub_reg32_reg32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x29,%edi
call   1030 <put8@plt>
mov    -0x8(%rbp),%edi
shl    $0x3,%edi
or     -0x4(%rbp),%edi
or     $0xc0,%edi
call   1030 <put8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub_reg32_reg32>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x29,%edi
call   1030 <put8@plt>
shl    $0x3,%ebx
or     %ebp,%ebx
or     $0xc0,%ebx
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @sub_reg32_reg32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @put8(i32 41)
%6 = load i32, i32* %4
%7 = shl i32 %6, 3
%8 = load i32, i32* %3
%9 = or i32 %7, %8
%10 = or i32 %9, 192
%11 = call i32 @put8(i32 %10)
ret void
}

LLVM IR (-O2):
define void @sub_reg32_reg32(i32 %0, i32 %1) {
%3 = tail call i32 @put8(i32 41)
%4 = shl i32 %1, 3
%5 = or i32 %4, %0
%6 = or i32 %5, 192
%7 = tail call i32 @put8(i32 %6)
ret void
}