xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ CRC16_Update4Bits(unsigned char *, unsigned char *,
                                     unsigned char);
void CRC16_Update(unsigned char *CRC16_High, unsigned char *CRC16_Low,
                  unsigned char val) {
  CRC16_Update4Bits(CRC16_High, CRC16_Low, (unsigned char)(val >> 4));
  CRC16_Update4Bits(CRC16_High, CRC16_Low, (unsigned char)(val & 0x0F));
}


x86 assembly (clang, -O0):
<CRC16_Update>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dl,%al
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movzbl -0x11(%rbp),%eax
sar    $0x4,%eax
movzbl %al,%edx
call   1030 <CRC16_Update4Bits@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movzbl -0x11(%rbp),%eax
and    $0xf,%eax
movzbl %al,%edx
call   1030 <CRC16_Update4Bits@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CRC16_Update>:
push   %r15
push   %r14
push   %rbx
mov    %edx,%ebx
mov    %rsi,%r14
mov    %rdi,%r15
mov    %ebx,%eax
shr    $0x4,%al
movzbl %al,%edx
call   1030 <CRC16_Update4Bits@plt>
and    $0xf,%ebx
mov    %r15,%rdi
mov    %r14,%rsi
mov    %ebx,%edx
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <CRC16_Update4Bits@plt>

LLVM IR (-O0):
define void @CRC16_Update(i8* %0, i8* %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8 %2, i8* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i8, i8* %6
%10 = zext i8 %9 to i32
%11 = ashr i32 %10, 4
%12 = trunc i32 %11 to i8
%13 = call i32 @CRC16_Update4Bits(i8* %7, i8* %8, i8 zeroext %12)
%14 = load i8*, i8** %4
%15 = load i8*, i8** %5
%16 = load i8, i8* %6
%17 = zext i8 %16 to i32
%18 = and i32 %17, 15
%19 = trunc i32 %18 to i8
%20 = call i32 @CRC16_Update4Bits(i8* %14, i8* %15, i8 zeroext %19)
ret void
}

LLVM IR (-O2):
define void @CRC16_Update(i8* %0, i8* %1, i8 zeroext %2) {
%4 = lshr i8 %2, 4
%5 = tail call i32 @CRC16_Update4Bits(i8* %0, i8* %1, i8 zeroext %4)
%6 = and i8 %2, 15
%7 = tail call i32 @CRC16_Update4Bits(i8* %0, i8* %1, i8 zeroext %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, char *);
int main(void) {
  char nome[6];
  printf("Ola! Insira seu nome, por fovor: \n");
  scanf("%s", nome);
  printf("Seja bem vindo, %s\n", nome);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    -0x6(%rbp),%rsi
lea    0xee2(%rip),%rdi
call   1040 <scanf@plt>
lea    -0x6(%rbp),%rsi
lea    0xed5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xedb(%rip),%rdi
call   1030 <puts@plt>
lea    0xeb8(%rip),%rdi
lea    0xa(%rsp),%rbx
mov    %rbx,%rsi
call   1050 <scanf@plt>
lea    0xea7(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [35 x i8] c"Ola! Insira seu nome, por fovor: \0A\00"
@.str.1 = [3 x i8] c"%s\00"
@.str.2 = [20 x i8] c"Seja bem vindo, %s\0A\00"
define i32 @main() {
%1 = alloca [6 x i8]
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%3 = getelementptr inbounds [6 x i8], [6 x i8]* %1, i64 0, i64 0
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %3)
%5 = getelementptr inbounds [6 x i8], [6 x i8]* %1, i64 0, i64 0
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.2, i64 0, i64 0), i8* %5)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"%s\00"
@.str.2 = [20 x i8] c"Seja bem vindo, %s\0A\00"
@str = [34 x i8] c"Ola! Insira seu nome, por fovor: \00"
define i32 @main() {
%1 = alloca [6 x i8]
%2 = getelementptr inbounds [6 x i8], [6 x i8]* %1, i64 0, i64 0
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %2)
%5 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str.2, i64 0, i64 0), i8* %2)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ NOROM_DDI16BitWrite(int, int, int, int /*<<< orphan*/);
void OSCXHfPowerModeSet(uint32_t ui32Mode) {

  ;
  NOROM_DDI16BitWrite(0x400CA000, 0x00000000, 0x00000800, ui32Mode);
}


x86 assembly (clang, -O0):
<OSCXHfPowerModeSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x400ca000,%edi
xor    %esi,%esi
mov    $0x800,%edx
call   1030 <NOROM_DDI16BitWrite@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OSCXHfPowerModeSet>:
mov    %edi,%ecx
mov    $0x400ca000,%edi
xor    %esi,%esi
mov    $0x800,%edx
jmp    1030 <NOROM_DDI16BitWrite@plt>

LLVM IR (-O0):
define void @OSCXHfPowerModeSet(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @NOROM_DDI16BitWrite(i32 1074569216, i32 0, i32 2048, i32 %3)
ret void
}

LLVM IR (-O2):
define void @OSCXHfPowerModeSet(i32 %0) {
%2 = tail call i32 @NOROM_DDI16BitWrite(i32 1074569216, i32 0, i32 2048, i32 %0)
ret void
}
void swap_int_arr(int *arr, int a, int b) {
  int t = arr[a];
  arr[a] = arr[b];
  arr[b] = t;
}


x86 assembly (clang, -O0):
<swap_int_arr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_int_arr>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @swap_int_arr(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
store i32 %12, i32* %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
store i32 %17, i32* %21
%22 = load i32, i32* %7
%23 = load i32*, i32** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
ret void
}

LLVM IR (-O2):
define void @swap_int_arr(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
store i32 %9, i32* %5
store i32 %6, i32* %8
ret void
}
float gain_and_clip_sample(float sample, float gain, float clip_threshold) {
  sample *= gain;
  if (clip_threshold < 1.0f) {
    if (sample > clip_threshold)
      sample = clip_threshold;
    else if (sample < -clip_threshold)
      sample = -clip_threshold;
  }
  return sample;
}


x86 assembly (clang, -O0):
<gain_and_clip_sample>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  0xed6(%rip),%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    1193 <gain_and_clip_sample+0x93>
movss  -0x4(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    1152 <gain_and_clip_sample+0x52>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    118e <gain_and_clip_sample+0x8e>
movss  -0x4(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
ucomiss %xmm1,%xmm0
jbe    1189 <gain_and_clip_sample+0x89>
movss  -0xc(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    118e <gain_and_clip_sample+0x8e>
jmp    1193 <gain_and_clip_sample+0x93>
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<gain_and_clip_sample>:
mulss  %xmm1,%xmm0
movss  0xef4(%rip),%xmm1
ucomiss %xmm2,%xmm1
jbe    1125 <gain_and_clip_sample+0x25>
ucomiss %xmm2,%xmm0
ja     1122 <gain_and_clip_sample+0x22>
xorps  0xef3(%rip),%xmm2
ucomiss %xmm0,%xmm2
jbe    1125 <gain_and_clip_sample+0x25>
movaps %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @gain_and_clip_sample(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %5
%8 = load float, float* %4
%9 = fmul float %8, %7
store float %9, float* %4
%10 = load float, float* %6
%11 = fcmp olt float %10, 1.000000e+00
br i1 %11, label %12, label %28
12: ; preds = %3
%13 = load float, float* %4
%14 = load float, float* %6
%15 = fcmp ogt float %13, %14
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load float, float* %6
store float %17, float* %4
br label %27
18: ; preds = %12
%19 = load float, float* %4
%20 = load float, float* %6
%21 = fneg float %20
%22 = fcmp olt float %19, %21
br i1 %22, label %23, label %26
23: ; preds = %18
%24 = load float, float* %6
%25 = fneg float %24
store float %25, float* %4
br label %26
26: ; preds = %23, %18
br label %27
27: ; preds = %26, %16
br label %28
28: ; preds = %27, %3
%29 = load float, float* %4
ret float %29
}

LLVM IR (-O2):
define float @gain_and_clip_sample(float %0, float %1, float %2) {
%4 = fmul float %0, %1
%5 = fcmp olt float %2, 1.000000e+00
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = fcmp ogt float %4, %2
br i1 %7, label %12, label %8
8: ; preds = %6
%9 = fneg float %2
%10 = fcmp olt float %4, %9
br i1 %10, label %11, label %12
11: ; preds = %8
br label %12
12: ; preds = %6, %11, %8, %3
%13 = phi float [ %9, %11 ], [ %4, %8 ], [ %4, %3 ], [ %2, %6 ]
ret float %13
}
/* Type definitions */
typedef int half;
typedef int Elf32_Half;

/* Variables and functions */
Elf32_Half read_elf_half(Elf32_Half half, bool swap) {
  return swap ? ((((half)&0x00ff) << 8) | (((half)&0xff00) >> 8)) : half;
}


x86 assembly (clang, -O0):
<read_elf_half>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1135 <read_elf_half+0x35>
mov    -0x4(%rbp),%eax
and    $0xff,%eax
shl    $0x8,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
jmp    113b <read_elf_half+0x3b>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_elf_half>:
mov    %edi,%eax
rol    $0x8,%ax
test   %esi,%esi
movzwl %ax,%eax
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @read_elf_half(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %2
%8 = load i32, i32* %3
%9 = and i32 %8, 255
%10 = shl i32 %9, 8
%11 = load i32, i32* %3
%12 = and i32 %11, 65280
%13 = ashr i32 %12, 8
%14 = or i32 %10, %13
br label %17
15: ; preds = %2
%16 = load i32, i32* %3
br label %17
17: ; preds = %15, %7
%18 = phi i32 [ %14, %7 ], [ %16, %15 ]
ret i32 %18
}

LLVM IR (-O2):
define i32 @read_elf_half(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = trunc i32 %0 to i16
%5 = tail call i16 @llvm.bswap.i16(i16 %4)
%6 = zext i16 %5 to i32
%7 = select i1 %3, i32 %0, i32 %6
ret i32 %7
}
void gtk_text_view_set_overwrite() {}


x86 assembly (clang, -O0):
<gtk_text_view_set_overwrite>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_view_set_overwrite>:
ret

LLVM IR (-O0):
define void @gtk_text_view_set_overwrite() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_view_set_overwrite() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() { printf("hello sundy\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"hello sundy\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [12 x i8] c"hello sundy\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret i32 0
}
double floating_point2() {
  int a = 1 << 24;
  long long b = 1LL << 53;
  float f = a;
  double d = b;
  return d - f;
}


x86 assembly (clang, -O0):
<floating_point2>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1000000,-0x4(%rbp)
movabs $0x20000000000000,%rax
mov    %rax,-0x10(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
cvtsi2sdq -0x10(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
movss  -0x14(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
subsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<floating_point2>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @floating_point2() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca float
%4 = alloca double
store i32 16777216, i32* %1
store i64 9007199254740992, i64* %2
%5 = load i32, i32* %1
%6 = sitofp i32 %5 to float
store float %6, float* %3
%7 = load i64, i64* %2
%8 = sitofp i64 %7 to double
store double %8, double* %4
%9 = load double, double* %4
%10 = load float, float* %3
%11 = fpext float %10 to double
%12 = fsub double %9, %11
ret double %12
}

LLVM IR (-O2):
define double @floating_point2() {
ret double 0x433FFFFFFF000000
}
long long my_pow(int m, unsigned int n) {
  long long ans = 1;
  long long x = m;
  while (n > 0) {
    if (n & 1)
      ans *= x;
    x *= x;
    n >>= 1;
  }
  return ans;
}


x86 assembly (clang, -O0):
<my_pow>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movq   $0x1,-0x10(%rbp)
movslq -0x4(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpl   $0x0,-0x8(%rbp)
jbe    115b <my_pow+0x5b>
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1140 <my_pow+0x40>
mov    -0x18(%rbp),%rax
imul   -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
imul   -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    111a <my_pow+0x1a>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_pow>:
test   %esi,%esi
je     113d <my_pow+0x3d>
movslq %edi,%rdx
mov    $0x1,%r8d
mov    $0x1,%eax
mov    %esi,%edi
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
test   $0x1,%sil
mov    %rdx,%rcx
cmove  %r8,%rcx
imul   %rcx,%rax
imul   %rdx,%rdx
shr    %edi
cmp    $0x1,%esi
mov    %edi,%esi
ja     1120 <my_pow+0x20>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i64 @my_pow(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
store i32 %0, i32* %3
store i32 %1, i32* %4
store i64 1, i64* %5
%7 = load i32, i32* %3
%8 = sext i32 %7 to i64
store i64 %8, i64* %6
br label %9
9: ; preds = %20, %2
%10 = load i32, i32* %4
%11 = icmp ugt i32 %10, 0
br i1 %11, label %12, label %26
12: ; preds = %9
%13 = load i32, i32* %4
%14 = and i32 %13, 1
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %20
16: ; preds = %12
%17 = load i64, i64* %6
%18 = load i64, i64* %5
%19 = mul nsw i64 %18, %17
store i64 %19, i64* %5
br label %20
20: ; preds = %16, %12
%21 = load i64, i64* %6
%22 = load i64, i64* %6
%23 = mul nsw i64 %22, %21
store i64 %23, i64* %6
%24 = load i32, i32* %4
%25 = lshr i32 %24, 1
store i32 %25, i32* %4
br label %9
26: ; preds = %9
%27 = load i64, i64* %5
ret i64 %27
}

LLVM IR (-O2):
define i64 @my_pow(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %17, label %4
4: ; preds = %2
%5 = sext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ %14, %6 ], [ %5, %4 ]
%8 = phi i64 [ %13, %6 ], [ 1, %4 ]
%9 = phi i32 [ %15, %6 ], [ %1, %4 ]
%10 = and i32 %9, 1
%11 = icmp eq i32 %10, 0
%12 = select i1 %11, i64 1, i64 %7
%13 = mul nsw i64 %12, %8
%14 = mul nsw i64 %7, %7
%15 = lshr i32 %9, 1
%16 = icmp ult i32 %9, 2
br i1 %16, label %17, label %6
17: ; preds = %6, %2
%18 = phi i64 [ 1, %2 ], [ %13, %6 ]
ret i64 %18
}
/* Variables and functions */
int /*<<< orphan*/ closeFreqSetterFiles();
int /*<<< orphan*/ freeCoreRelations();
int /*<<< orphan*/ freeFreqInfo();
int /*<<< orphan*/ setCPUGovernor(char *);
void cleanup() {
  setCPUGovernor("ondemand");
  closeFreqSetterFiles();
  freeCoreRelations();
  freeFreqInfo();
}


x86 assembly (clang, -O0):
<cleanup>:
push   %rbp
mov    %rsp,%rbp
lea    0xeb5(%rip),%rdi
call   1040 <setCPUGovernor@plt>
mov    $0x0,%al
call   1060 <closeFreqSetterFiles@plt>
mov    $0x0,%al
call   1030 <freeCoreRelations@plt>
mov    $0x0,%al
call   1050 <freeFreqInfo@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cleanup>:
push   %rax
lea    0xeb8(%rip),%rdi
call   1040 <setCPUGovernor@plt>
xor    %eax,%eax
call   1060 <closeFreqSetterFiles@plt>
xor    %eax,%eax
call   1030 <freeCoreRelations@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <freeFreqInfo@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"ondemand\00"
define void @cleanup() {
%1 = call i32 @setCPUGovernor(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @closeFreqSetterFiles()
%3 = call i32 (...) @freeCoreRelations()
%4 = call i32 (...) @freeFreqInfo()
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"ondemand\00"
define void @cleanup() {
%1 = tail call i32 @setCPUGovernor(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @closeFreqSetterFiles()
%3 = tail call i32 (...) @freeCoreRelations()
%4 = tail call i32 (...) @freeFreqInfo()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _s2_priv_qtxtab(float *, float *, float *, float *, float,
                                   float, float, int /*<<< orphan*/, int, int,
                                   int, char *, float);
void s2qtxtxy(float *x1, float *x2, float *y1, float *y2, float ix, float iy,
              float iz, char *itext, float ipad) {
  _s2_priv_qtxtab(x1, x2, y1, y2, ix, iy, iz, 0, 1, 1., 1., itext, ipad);
}


x86 assembly (clang, -O0):
<s2qtxtxy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
movss  %xmm0,-0x24(%rbp)
movss  %xmm1,-0x28(%rbp)
movss  %xmm2,-0x2c(%rbp)
mov    %r8,-0x38(%rbp)
movss  %xmm3,-0x3c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
movss  -0x24(%rbp),%xmm0
movss  -0x28(%rbp),%xmm1
movss  -0x2c(%rbp),%xmm2
mov    -0x38(%rbp),%rax
movss  -0x3c(%rbp),%xmm3
xor    %r8d,%r8d
mov    $0x1,%r9d
movl   $0x1,(%rsp)
movl   $0x1,0x8(%rsp)
mov    %rax,0x10(%rsp)
call   1030 <_s2_priv_qtxtab@plt>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s2qtxtxy>:
push   %rax
mov    %r8,%rax
sub    $0x8,%rsp
xor    %r8d,%r8d
mov    $0x1,%r9d
push   %rax
push   $0x1
push   $0x1
call   1030 <_s2_priv_qtxtab@plt>
add    $0x20,%rsp
pop    %rax
ret

LLVM IR (-O0):
define void @s2qtxtxy(float* %0, float* %1, float* %2, float* %3, float %4, float %5, float %6, i8* %7, float %8) {
%10 = alloca float*
%11 = alloca float*
%12 = alloca float*
%13 = alloca float*
%14 = alloca float
%15 = alloca float
%16 = alloca float
%17 = alloca i8*
%18 = alloca float
store float* %0, float** %10
store float* %1, float** %11
store float* %2, float** %12
store float* %3, float** %13
store float %4, float* %14
store float %5, float* %15
store float %6, float* %16
store i8* %7, i8** %17
store float %8, float* %18
%19 = load float*, float** %10
%20 = load float*, float** %11
%21 = load float*, float** %12
%22 = load float*, float** %13
%23 = load float, float* %14
%24 = load float, float* %15
%25 = load float, float* %16
%26 = load i8*, i8** %17
%27 = load float, float* %18
%28 = call i32 @_s2_priv_qtxtab(float* %19, float* %20, float* %21, float* %22, float %23, float %24, float %25, i32 0, i32 1, i32 1, i32 1, i8* %26, float %27)
ret void
}

LLVM IR (-O2):
define void @s2qtxtxy(float* %0, float* %1, float* %2, float* %3, float %4, float %5, float %6, i8* %7, float %8) {
%10 = tail call i32 @_s2_priv_qtxtab(float* %0, float* %1, float* %2, float* %3, float %4, float %5, float %6, i32 0, i32 1, i32 1, i32 1, i8* %7, float %8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Z3_get_version(unsigned int *, unsigned int *,
                                  unsigned int *, unsigned int *);
int /*<<< orphan*/ printf(char *, unsigned int, unsigned int, unsigned int,
                          unsigned int);
void display_version() {
  unsigned major, minor, build, revision;
  Z3_get_version(&major, &minor, &build, &revision);
  printf("Z3 %d.%d.%d.%d\n", major, minor, build, revision);
}


x86 assembly (clang, -O0):
<display_version>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x10(%rbp),%rcx
call   1040 <Z3_get_version@plt>
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    -0x10(%rbp),%r8d
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_version>:
sub    $0x18,%rsp
lea    0x14(%rsp),%rdi
lea    0x10(%rsp),%rsi
lea    0xc(%rsp),%rdx
lea    0x8(%rsp),%rcx
call   1040 <Z3_get_version@plt>
mov    0x14(%rsp),%esi
mov    0x10(%rsp),%edx
mov    0xc(%rsp),%ecx
mov    0x8(%rsp),%r8d
lea    0xeab(%rip),%rdi
call   1030 <printf@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [16 x i8] c"Z3 %d.%d.%d.%d\0A\00"
define void @display_version() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = call i32 @Z3_get_version(i32* %1, i32* %2, i32* %3, i32* %4)
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %6, i32 %7, i32 %8, i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"Z3 %d.%d.%d.%d\0A\00"
define void @display_version() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %1 to i8*
%6 = bitcast i32* %2 to i8*
%7 = bitcast i32* %3 to i8*
%8 = bitcast i32* %4 to i8*
%9 = call i32 @Z3_get_version(i32* %1, i32* %2, i32* %3, i32* %4)
%10 = load i32, i32* %1
%11 = load i32, i32* %2
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %10, i32 %11, i32 %12, i32 %13)
ret void
}
double fsqr(double input) { return input * input; }


x86 assembly (clang, -O0):
<fsqr>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsqr>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @fsqr(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @fsqr(double %0) {
%2 = fmul double %0, %0
ret double %2
}
/* Variables and functions */
int langs0__2do();
int main() {
  if (langs0__2do() == 5003)
    return 0;
  else
    return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <langs0__2do@plt>
cmp    $0x138b,%eax
jne    113d <main+0x2d>
movl   $0x0,-0x4(%rbp)
jmp    1144 <main+0x34>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <langs0__2do@plt>
xor    %ecx,%ecx
cmp    $0x138b,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @langs0__2do()
%3 = icmp eq i32 %2, 5003
br i1 %3, label %4, label %5
4: ; preds = %0
store i32 0, i32* %1
br label %6
5: ; preds = %0
store i32 1, i32* %1
br label %6
6: ; preds = %5, %4
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @langs0__2do()
%2 = icmp ne i32 %1, 5003
%3 = zext i1 %2 to i32
ret i32 %3
}
void av_codec_get_codec_properties() {}


x86 assembly (clang, -O0):
<av_codec_get_codec_properties>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_codec_get_codec_properties>:
ret

LLVM IR (-O0):
define void @av_codec_get_codec_properties() {
ret void
}

LLVM IR (-O2):
define void @av_codec_get_codec_properties() {
ret void
}
void ikrandp_(double *ikchk, double *ikran) {
  unsigned long *likchk;
  unsigned long long *llikchk;
  if (sizeof(long long) > sizeof(double)) {
    likchk = (unsigned long *)ikchk;
    *likchk += *(unsigned long *)ikran;
  } else {
    llikchk = (unsigned long long *)ikchk;
    *llikchk += *(unsigned long long *)ikran;
  }
}


x86 assembly (clang, -O0):
<ikrandp_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
mov    -0x20(%rbp),%rax
add    (%rax),%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ikrandp_>:
mov    (%rsi),%rax
add    %rax,(%rdi)
ret

LLVM IR (-O0):
define void @ikrandp_(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
%5 = alloca i64*
%6 = alloca i64*
store double* %0, double** %3
store double* %1, double** %4
%7 = load double*, double** %3
%8 = bitcast double* %7 to i64*
store i64* %8, i64** %6
%9 = load double*, double** %4
%10 = bitcast double* %9 to i64*
%11 = load i64, i64* %10
%12 = load i64*, i64** %6
%13 = load i64, i64* %12
%14 = add i64 %13, %11
store i64 %14, i64* %12
ret void
}

LLVM IR (-O2):
define void @ikrandp_(double* nocapture %0, double* nocapture %1) {
%3 = bitcast double* %0 to i64*
%4 = bitcast double* %1 to i64*
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add i64 %6, %5
store i64 %7, i64* %3
ret void
}
int e(int x) { return 0 == (x > 0 ? x : -x); }


x86 assembly (clang, -O0):
<e>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    111c <e+0x1c>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1124 <e+0x24>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
xor    %eax,%eax
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<e>:
xor    %eax,%eax
test   %edi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @e(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i32, i32* %2
br label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = sub nsw i32 0, %8
br label %10
10: ; preds = %7, %5
%11 = phi i32 [ %6, %5 ], [ %9, %7 ]
%12 = icmp eq i32 0, %11
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @e(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
typedef int uint64_t;
typedef int /*<<< orphan*/ out;

/* Variables and functions */
uint64_t TO_BE64(uint64_t in) {
  uint64_t out = 0;
  unsigned char *pout = (unsigned char *)&out;
  int i;
  for (i = sizeof(out) - 1; i >= 0; --i, in >>= 8)
    pout[i] = in & 0xff;
  return out;
}


x86 assembly (clang, -O0):
<TO_BE64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
movl   $0x3,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jl     1153 <TO_BE64+0x53>
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    %al,%dl
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
mov    %eax,-0x4(%rbp)
jmp    111d <TO_BE64+0x1d>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TO_BE64>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @TO_BE64(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%6 = bitcast i32* %3 to i8*
store i8* %6, i8** %4
store i32 3, i32* %5
br label %7
7: ; preds = %18, %1
%8 = load i32, i32* %5
%9 = icmp sge i32 %8, 0
br i1 %9, label %10, label %23
10: ; preds = %7
%11 = load i32, i32* %2
%12 = and i32 %11, 255
%13 = trunc i32 %12 to i8
%14 = load i8*, i8** %4
%15 = load i32, i32* %5
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
store i8 %13, i8* %17
br label %18
18: ; preds = %10
%19 = load i32, i32* %5
%20 = add nsw i32 %19, -1
store i32 %20, i32* %5
%21 = load i32, i32* %2
%22 = ashr i32 %21, 8
store i32 %22, i32* %2
br label %7
23: ; preds = %7
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @TO_BE64(i32 %0) {
%2 = call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
xfree(cp) char *cp;
{
  extern char end[];
  if (cp >= end && cp < (char *)&cp)
    free(cp);
}


x86 assembly (clang, -O0):
<xfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    0x2ebd(%rip),%rax
cmp    %rax,-0x10(%rbp)
jb     1147 <xfree+0x37>
mov    -0x10(%rbp),%rax
lea    -0x10(%rbp),%rcx
cmp    %rcx,%rax
jae    1147 <xfree+0x37>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfree>:
push   %rax
mov    %rdi,(%rsp)
cmp    0x2ec4(%rip),%rdi
jb     112b <xfree+0x1b>
mov    %rsp,%rax
cmp    %rdi,%rax
jbe    112b <xfree+0x1b>
call   1030 <free@plt>
pop    %rcx
ret

LLVM IR (-O0):
@end = external global [0 x i8]
define i32 @xfree(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp uge i8* %4, getelementptr inbounds ([0 x i8], [0 x i8]* @end, i64 0, i64 0)
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i8*, i8** %3
%8 = bitcast i8** %3 to i8*
%9 = icmp ult i8* %7, %8
br i1 %9, label %10, label %12
10: ; preds = %6
%11 = load i8*, i8** %3
br label %12
12: ; preds = %10, %6, %1
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@end = external global [0 x i8]
define i32 @xfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = icmp uge i8* %0, getelementptr inbounds ([0 x i8], [0 x i8]* @end, i64 0, i64 0)
%4 = bitcast i8** %2 to i8*
%5 = icmp ugt i8* %4, %0
%6 = and i1 %3, %5
br i1 %6, label %7, label %8
7: ; preds = %1
br label %8
8: ; preds = %7, %1
ret i32 undef
}
void outd(unsigned short _port, unsigned int _data) {
  __asm__ __volatile__("outl %%eax, %%dx" : : "d"(_port), "a"(_data));
}


x86 assembly (clang, -O0):
<outd>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x2(%rbp),%dx
mov    -0x8(%rbp),%eax
out    %eax,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outd>:
mov    %esi,%eax
mov    %edi,%edx
out    %eax,(%dx)
ret

LLVM IR (-O0):
define void @outd(i16 zeroext %0, i32 %1) {
%3 = alloca i16
%4 = alloca i32
store i16 %0, i16* %3
store i32 %1, i32* %4
%5 = load i16, i16* %3
%6 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
define void @outd(i16 zeroext %0, i32 %1) {
tail call void asm sideeffect "outl %eax, %dx", "{dx},{ax},~{dirflag},~{fpsr},~{flags}"(i16 %0, i32 %1)
ret void
}
int char_index(char c) { return (int)(c - 'a'); }


x86 assembly (clang, -O0):
<char_index>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
sub    $0x61,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<char_index>:
lea    -0x61(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @char_index(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = sub nsw i32 %4, 97
ret i32 %5
}

LLVM IR (-O2):
define i32 @char_index(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add nsw i32 %2, -97
ret i32 %3
}
/* Type definitions */
struct msm_thermal_data {
  int dummy;
};

/* Variables and functions */
int ENOSYS;
int msm_thermal_init(struct msm_thermal_data *pdata) { return -ENOSYS; }


x86 assembly (clang, -O0):
<msm_thermal_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    0x2ed7(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<msm_thermal_init>:
mov    0x2ee1(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
%struct.msm_thermal_data = type { i32 }
@ENOSYS = global i32 0
define i32 @msm_thermal_init(%struct.msm_thermal_data* %0) {
%2 = alloca %struct.msm_thermal_data*
store %struct.msm_thermal_data* %0, %struct.msm_thermal_data** %2
%3 = load i32, i32* @ENOSYS
%4 = sub nsw i32 0, %3
ret i32 %4
}

LLVM IR (-O2):
%struct.msm_thermal_data = type { i32 }
@ENOSYS = global i32 0
define i32 @msm_thermal_init(%struct.msm_thermal_data* nocapture readnone %0) {
%2 = load i32, i32* @ENOSYS
%3 = sub nsw i32 0, %2
ret i32 %3
}
/* Variables and functions */
int STC31xx_Read(int, unsigned char, unsigned char *);
int STC31xx_CheckI2cDeviceId(void) {
  unsigned char RegAddress;
  unsigned char data8;
  int status;
  RegAddress = 0x18;
  status = STC31xx_Read(1, RegAddress, &data8);
  if (status >= 0) {
    if (data8 == 0x16) {
      status = 0;
    } else {
      status = -2;
    }
  } else {
    status = -1;
  }
  return (status);
}


x86 assembly (clang, -O0):
<STC31xx_CheckI2cDeviceId>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x18,-0x1(%rbp)
mov    $0x1,%edi
lea    -0x2(%rbp),%rdx
movzbl -0x1(%rbp),%esi
call   1030 <STC31xx_Read@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     1160 <STC31xx_CheckI2cDeviceId+0x50>
movzbl -0x2(%rbp),%eax
cmp    $0x16,%eax
jne    1154 <STC31xx_CheckI2cDeviceId+0x44>
movl   $0x0,-0x8(%rbp)
jmp    115b <STC31xx_CheckI2cDeviceId+0x4b>
movl   $0xfffffffe,-0x8(%rbp)
jmp    1167 <STC31xx_CheckI2cDeviceId+0x57>
movl   $0xffffffff,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<STC31xx_CheckI2cDeviceId>:
push   %rax
lea    0x7(%rsp),%rdx
mov    $0x1,%edi
mov    $0x18,%esi
call   1030 <STC31xx_Read@plt>
xor    %ecx,%ecx
cmpb   $0x16,0x7(%rsp)
sete   %cl
test   %eax,%eax
lea    -0x2(%rcx,%rcx,1),%ecx
mov    $0xffffffff,%eax
cmovns %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @STC31xx_CheckI2cDeviceId() {
%1 = alloca i8
%2 = alloca i8
%3 = alloca i32
store i8 24, i8* %1
%4 = load i8, i8* %1
%5 = call i32 @STC31xx_Read(i32 1, i8 zeroext %4, i8* %2)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp sge i32 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %0
%9 = load i8, i8* %2
%10 = zext i8 %9 to i32
%11 = icmp eq i32 %10, 22
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 0, i32* %3
br label %14
13: ; preds = %8
store i32 -2, i32* %3
br label %14
14: ; preds = %13, %12
br label %16
15: ; preds = %0
store i32 -1, i32* %3
br label %16
16: ; preds = %15, %14
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @STC31xx_CheckI2cDeviceId() {
%1 = alloca i8
%2 = call i32 @STC31xx_Read(i32 1, i8 zeroext 24, i8* %1)
%3 = icmp sgt i32 %2, -1
%4 = load i8, i8* %1
%5 = icmp eq i8 %4, 22
%6 = select i1 %5, i32 0, i32 -2
%7 = select i1 %3, i32 %6, i32 -1
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ asn1_ps_func;
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int /*<<< orphan*/ BIO_C_SET_PREFIX;
int asn1_bio_set_ex(int /*<<< orphan*/ *, int /*<<< orphan*/,
                    int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int BIO_asn1_set_prefix(BIO *b, asn1_ps_func *prefix,
                        asn1_ps_func *prefix_free) {
  return asn1_bio_set_ex(b, BIO_C_SET_PREFIX, prefix, prefix_free);
}


x86 assembly (clang, -O0):
<BIO_asn1_set_prefix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
call   1030 <asn1_bio_set_ex@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BIO_asn1_set_prefix>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    0x2ecb(%rip),%rax
mov    (%rax),%esi
jmp    1030 <asn1_bio_set_ex@plt>

LLVM IR (-O0):
@BIO_C_SET_PREFIX = global i32 0
define i32 @BIO_asn1_set_prefix(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = load i32, i32* @BIO_C_SET_PREFIX
%9 = load i32*, i32** %5
%10 = load i32*, i32** %6
%11 = call i32 @asn1_bio_set_ex(i32* %7, i32 %8, i32* %9, i32* %10)
ret i32 %11
}

LLVM IR (-O2):
@BIO_C_SET_PREFIX = global i32 0
define i32 @BIO_asn1_set_prefix(i32* %0, i32* %1, i32* %2) {
%4 = load i32, i32* @BIO_C_SET_PREFIX
%5 = tail call i32 @asn1_bio_set_ex(i32* %0, i32 %4, i32* %1, i32* %2)
ret i32 %5
}
void bpf_flush_icache(void *start, void *end) {}


x86 assembly (clang, -O0):
<bpf_flush_icache>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bpf_flush_icache>:
ret

LLVM IR (-O0):
define void @bpf_flush_icache(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @bpf_flush_icache(i8* nocapture %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, unsigned char);
void sprint_subb_atRi(char *str, unsigned char i) {
  sprintf(str, "SUBB  A, @R%X                    ", i);
}


x86 assembly (clang, -O0):
<sprint_subb_atRi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed3(%rip),%rsi
movzbl -0x9(%rbp),%edx
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sprint_subb_atRi>:
mov    %esi,%edx
lea    0xee7(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"SUBB A, @R%X \00"
define void @sprint_subb_atRi(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %4
%7 = call i32 @sprintf(i8* %5, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8 zeroext %6)
ret void
}

LLVM IR (-O2):
@.str = [34 x i8] c"SUBB A, @R%X \00"
define void @sprint_subb_atRi(i8* nocapture writeonly %0, i8 zeroext %1) {
%3 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8 zeroext %1)
ret void
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
struct stat *malloc(int);
struct stat *ws_make_stat() {
  return malloc(sizeof(struct stat));
}


x86 assembly (clang, -O0):
<ws_make_stat>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
call   1030 <malloc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ws_make_stat>:
mov    $0x4,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define %struct.stat* @ws_make_stat() {
%1 = call %struct.stat* @malloc(i32 4)
ret %struct.stat* %1
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define noalias %struct.stat* @ws_make_stat() {
%1 = tail call %struct.stat* @malloc(i32 4)
ret %struct.stat* %1
}
/* Variables and functions */
unsigned long gf2_matrix_times(unsigned long *, unsigned long);
void gf2_matrix_square(unsigned long *square, unsigned long *mat) {
  int n;
  n = 0;
  while (n < 32) {
    *(square + n) = gf2_matrix_times(mat, *(mat + n));
    n++;
  }
  return;
}


x86 assembly (clang, -O0):
<gf2_matrix_square>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x20,-0x14(%rbp)
jge    1163 <gf2_matrix_square+0x53>
mov    -0x10(%rbp),%rdi
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rsi
call   1030 <gf2_matrix_times@plt>
mov    %rax,%rdx
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %rdx,(%rax,%rcx,8)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1127 <gf2_matrix_square+0x17>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gf2_matrix_square>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
xor    %ebx,%ebx
nopl   (%rax)
mov    (%r15,%rbx,8),%rsi
mov    %r15,%rdi
call   1030 <gf2_matrix_times@plt>
mov    %rax,(%r14,%rbx,8)
add    $0x1,%rbx
cmp    $0x20,%rbx
jne    1120 <gf2_matrix_square+0x10>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @gf2_matrix_square(i64* %0, i64* %1) {
%3 = alloca i64*
%4 = alloca i64*
%5 = alloca i32
store i64* %0, i64** %3
store i64* %1, i64** %4
store i32 0, i32* %5
br label %6
6: ; preds = %9, %2
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 32
br i1 %8, label %9, label %23
9: ; preds = %6
%10 = load i64*, i64** %4
%11 = load i64*, i64** %4
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i64, i64* %11, i64 %13
%15 = load i64, i64* %14
%16 = call i64 @gf2_matrix_times(i64* %10, i64 %15)
%17 = load i64*, i64** %3
%18 = load i32, i32* %5
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i64, i64* %17, i64 %19
store i64 %16, i64* %20
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
store i32 %22, i32* %5
br label %6
23: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @gf2_matrix_square(i64* nocapture writeonly %0, i64* %1) {
br label %3
3: ; preds = %2, %3
%4 = phi i64 [ 0, %2 ], [ %9, %3 ]
%5 = getelementptr inbounds i64, i64* %1, i64 %4
%6 = load i64, i64* %5
%7 = tail call i64 @gf2_matrix_times(i64* %1, i64 %6)
%8 = getelementptr inbounds i64, i64* %0, i64 %4
store i64 %7, i64* %8
%9 = add nuw nsw i64 %4, 1
%10 = icmp eq i64 %9, 32
br i1 %10, label %11, label %3
11: ; preds = %3
ret void
}
/* Variables and functions */
int strcasecmp(void const *, void const *);
int name_cmpfunc(const void *a, const void *b) { return strcasecmp(a, b); }


x86 assembly (clang, -O0):
<name_cmpfunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcasecmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<name_cmpfunc>:
jmp    1030 <strcasecmp@plt>

LLVM IR (-O0):
define i32 @name_cmpfunc(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcasecmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @name_cmpfunc(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcasecmp(i8* %0, i8* %1)
ret i32 %3
}
void av_fast_mallocz() {}


x86 assembly (clang, -O0):
<av_fast_mallocz>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_fast_mallocz>:
ret

LLVM IR (-O0):
define void @av_fast_mallocz() {
ret void
}

LLVM IR (-O2):
define void @av_fast_mallocz() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
void SWAP1(char str1[], char str2[]) {
  char tmp[10];
  strcpy(tmp, str1);
  strcpy(str1, str2);
  strcpy(str2, tmp);
}


x86 assembly (clang, -O0):
<SWAP1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x1a(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rdi
lea    -0x1a(%rbp),%rsi
call   1030 <strcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SWAP1>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0x6(%rsp),%r15
mov    %r15,%rdi
mov    %rbx,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %r14,%rdi
mov    %r15,%rsi
call   1030 <strcpy@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @SWAP1(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca [10 x i8]
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = getelementptr inbounds [10 x i8], [10 x i8]* %5, i64 0, i64 0
%7 = load i8*, i8** %3
%8 = call i32 @strcpy(i8* %6, i8* %7)
%9 = load i8*, i8** %3
%10 = load i8*, i8** %4
%11 = call i32 @strcpy(i8* %9, i8* %10)
%12 = load i8*, i8** %4
%13 = getelementptr inbounds [10 x i8], [10 x i8]* %5, i64 0, i64 0
%14 = call i32 @strcpy(i8* %12, i8* %13)
ret void
}

LLVM IR (-O2):
define void @SWAP1(i8* %0, i8* %1) {
%3 = alloca [10 x i8]
%4 = getelementptr inbounds [10 x i8], [10 x i8]* %3, i64 0, i64 0
%5 = call i32 @strcpy(i8* %4, i8* %0)
%6 = call i32 @strcpy(i8* %0, i8* %1)
%7 = call i32 @strcpy(i8* %1, i8* %4)
ret void
}
int sum_n_iter(int n) {
  int i;
  int sum = 0;
  for (i = 0; i <= n; i++) {
    sum += i;
  }
  return sum;
}


x86 assembly (clang, -O0):
<sum_n_iter>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     1138 <sum_n_iter+0x38>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1115 <sum_n_iter+0x15>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum_n_iter>:
mov    %edi,%eax
lea    -0x1(%rdi),%ecx
imul   %rax,%rcx
shr    %rcx
add    %edi,%ecx
xor    %eax,%eax
test   %edi,%edi
cmovns %ecx,%eax
ret

LLVM IR (-O0):
define i32 @sum_n_iter(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %13, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp sle i32 %6, %7
br i1 %8, label %9, label %16
9: ; preds = %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = add nsw i32 %11, %10
store i32 %12, i32* %4
br label %13
13: ; preds = %9
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %5
16: ; preds = %5
%17 = load i32, i32* %4
ret i32 %17
}

LLVM IR (-O2):
define i32 @sum_n_iter(i32 %0) {
%2 = icmp slt i32 %0, 0
%3 = zext i32 %0 to i33
%4 = add nsw i32 %0, -1
%5 = zext i32 %4 to i33
%6 = mul i33 %3, %5
%7 = lshr i33 %6, 1
%8 = trunc i33 %7 to i32
%9 = add i32 %8, %0
%10 = select i1 %2, i32 0, i32 %9
ret i32 %10
}
_Bool Int__DIV__EQ_(int x, int y) { return x != y; }


x86 assembly (clang, -O0):
<Int__DIV__EQ_>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Int__DIV__EQ_>:
cmp    %esi,%edi
setne  %al
ret

LLVM IR (-O0):
define zeroext i1 @Int__DIV__EQ_(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ne i32 %5, %6
ret i1 %7
}

LLVM IR (-O2):
define zeroext i1 @Int__DIV__EQ_(i32 %0, i32 %1) {
%3 = icmp ne i32 %0, %1
ret i1 %3
}
/* Variables and functions */
int /*<<< orphan*/ test_sync_ex(char, int /*<<< orphan*/ *, int /*<<< orphan*/,
                                int /*<<< orphan*/ *, int /*<<< orphan*/);
void test_sync(char loc_id) { test_sync_ex(loc_id, NULL, 0, NULL, 0); }


x86 assembly (clang, -O0):
<test_sync>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
xor    %eax,%eax
mov    %eax,%ecx
xor    %r8d,%r8d
movsbl -0x1(%rbp),%edi
mov    %rcx,%rsi
mov    %r8d,%edx
call   1030 <test_sync_ex@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_sync>:
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <test_sync_ex@plt>

LLVM IR (-O0):
define void @test_sync(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @test_sync_ex(i8 signext %3, i32* null, i32 0, i32* null, i32 0)
ret void
}

LLVM IR (-O2):
define void @test_sync(i8 signext %0) {
%2 = tail call i32 @test_sync_ex(i8 signext %0, i32* null, i32 0, i32* null, i32 0)
ret void
}