xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ sync_primitive();
void mmio_writeb(uint8_t val, void *addr) {
  *(volatile uint8_t *)addr = val;
  sync_primitive();
}


x86 assembly (clang, -O0):
<mmio_writeb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    $0x0,%al
call   1030 <sync_primitive@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmio_writeb>:
mov    %edi,(%rsi)
xor    %eax,%eax
jmp    1030 <sync_primitive@plt>

LLVM IR (-O0):
define void @mmio_writeb(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i32*
store volatile i32 %5, i32* %7
%8 = call i32 (...) @sync_primitive()
ret void
}

LLVM IR (-O2):
define void @mmio_writeb(i32 %0, i8* %1) {
%3 = bitcast i8* %1 to i32*
store volatile i32 %0, i32* %3
%4 = tail call i32 (...) @sync_primitive()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ g5_calculate_force_on_xMC0(int /*<<< orphan*/, double **,
                                              double **, double *, int,
                                              double *);
void g5_calculate_force_on_x0(double (*x)[3], double (*a)[3], double *p, int ni,
                              double *eps2) {
  g5_calculate_force_on_xMC0(0, x, a, p, ni, eps2);
}


x86 assembly (clang, -O0):
<g5_calculate_force_on_x0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x1c(%rbp),%r8d
mov    -0x28(%rbp),%r9
xor    %edi,%edi
call   1030 <g5_calculate_force_on_xMC0@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g5_calculate_force_on_x0>:
mov    %r8,%r9
mov    %ecx,%r8d
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <g5_calculate_force_on_xMC0@plt>

LLVM IR (-O0):
define void @g5_calculate_force_on_x0([3 x double]* %0, [3 x double]* %1, double* %2, i32 %3, double* %4) {
%6 = alloca [3 x double]*
%7 = alloca [3 x double]*
%8 = alloca double*
%9 = alloca i32
%10 = alloca double*
store [3 x double]* %0, [3 x double]** %6
store [3 x double]* %1, [3 x double]** %7
store double* %2, double** %8
store i32 %3, i32* %9
store double* %4, double** %10
%11 = load [3 x double]*, [3 x double]** %6
%12 = bitcast [3 x double]* %11 to double**
%13 = load [3 x double]*, [3 x double]** %7
%14 = bitcast [3 x double]* %13 to double**
%15 = load double*, double** %8
%16 = load i32, i32* %9
%17 = load double*, double** %10
%18 = call i32 @g5_calculate_force_on_xMC0(i32 0, double** %12, double** %14, double* %15, i32 %16, double* %17)
ret void
}

LLVM IR (-O2):
define void @g5_calculate_force_on_x0([3 x double]* %0, [3 x double]* %1, double* %2, i32 %3, double* %4) {
%6 = bitcast [3 x double]* %0 to double**
%7 = bitcast [3 x double]* %1 to double**
%8 = tail call i32 @g5_calculate_force_on_xMC0(i32 0, double** %6, double** %7, double* %2, i32 %3, double* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cgcmp(char *);
void cgle() { cgcmp("jg"); }


x86 assembly (clang, -O0):
<cgle>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <cgcmp@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgle>:
lea    0xee9(%rip),%rdi
jmp    1030 <cgcmp@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"jg\00"
define void @cgle() {
%1 = call i32 @cgcmp(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"jg\00"
define void @cgle() {
%1 = tail call i32 @cgcmp(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}
int tileSouth(int tileIndex) {
  int canCheckS = tileIndex < 12;
  return canCheckS ? tileIndex + 4 : -1;
}


x86 assembly (clang, -O0):
<tileSouth>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0xc,-0x4(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112e <tileSouth+0x2e>
mov    -0x4(%rbp),%eax
add    $0x4,%eax
mov    %eax,-0xc(%rbp)
jmp    113b <tileSouth+0x3b>
mov    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    113b <tileSouth+0x3b>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tileSouth>:
lea    0x4(%rdi),%ecx
cmp    $0xc,%edi
mov    $0xffffffff,%eax
cmovl  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @tileSouth(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 12
%6 = zext i1 %5 to i32
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 4
br label %13
12: ; preds = %1
br label %13
13: ; preds = %12, %9
%14 = phi i32 [ %11, %9 ], [ -1, %12 ]
ret i32 %14
}

LLVM IR (-O2):
define i32 @tileSouth(i32 %0) {
%2 = icmp slt i32 %0, 12
%3 = add nsw i32 %0, 4
%4 = select i1 %2, i32 %3, i32 -1
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int __tlb_get_index(int /*<<< orphan*/, int /*<<< orphan*/);
int tlb_get_index(uint64_t ea) { return __tlb_get_index(ea, 0); }


x86 assembly (clang, -O0):
<tlb_get_index>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1030 <__tlb_get_index@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tlb_get_index>:
xor    %esi,%esi
jmp    1030 <__tlb_get_index@plt>

LLVM IR (-O0):
define i32 @tlb_get_index(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__tlb_get_index(i32 %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @tlb_get_index(i32 %0) {
%2 = tail call i32 @__tlb_get_index(i32 %0, i32 0)
ret i32 %2
}
void abe_irq_check_for_sequences(void) {}


x86 assembly (clang, -O0):
<abe_irq_check_for_sequences>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<abe_irq_check_for_sequences>:
ret

LLVM IR (-O0):
define void @abe_irq_check_for_sequences() {
ret void
}

LLVM IR (-O2):
define void @abe_irq_check_for_sequences() {
ret void
}
int num_bits(int value) {
  value = ((value & 0xaaaa) >> 1) + (value & 0x5555);
  value = ((value & 0xcccc) >> 2) + (value & 0x3333);
  value = ((value & 0xf0f0) >> 4) + (value & 0x0f0f);
  value = ((value & 0xff00) >> 8) + (value & 0x00ff);
  return value;
}


x86 assembly (clang, -O0):
<num_bits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xaaaa,%eax
sar    $0x1,%eax
mov    -0x4(%rbp),%ecx
and    $0x5555,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xcccc,%eax
sar    $0x2,%eax
mov    -0x4(%rbp),%ecx
and    $0x3333,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf0f0,%eax
sar    $0x4,%eax
mov    -0x4(%rbp),%ecx
and    $0xf0f,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
sar    $0x8,%eax
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<num_bits>:
mov    %edi,%eax
shr    %eax
and    $0x5555,%eax
and    $0x5555,%edi
add    %eax,%edi
mov    %edi,%eax
shr    $0x2,%eax
and    $0x3333,%eax
and    $0x3333,%edi
add    %eax,%edi
mov    %edi,%eax
shr    $0x4,%eax
and    $0x707,%eax
and    $0x707,%edi
add    %eax,%edi
movzbl %dil,%eax
shr    $0x8,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @num_bits(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 43690
%5 = ashr i32 %4, 1
%6 = load i32, i32* %2
%7 = and i32 %6, 21845
%8 = add nsw i32 %5, %7
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = and i32 %9, 52428
%11 = ashr i32 %10, 2
%12 = load i32, i32* %2
%13 = and i32 %12, 13107
%14 = add nsw i32 %11, %13
store i32 %14, i32* %2
%15 = load i32, i32* %2
%16 = and i32 %15, 61680
%17 = ashr i32 %16, 4
%18 = load i32, i32* %2
%19 = and i32 %18, 3855
%20 = add nsw i32 %17, %19
store i32 %20, i32* %2
%21 = load i32, i32* %2
%22 = and i32 %21, 65280
%23 = ashr i32 %22, 8
%24 = load i32, i32* %2
%25 = and i32 %24, 255
%26 = add nsw i32 %23, %25
store i32 %26, i32* %2
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @num_bits(i32 %0) {
%2 = lshr i32 %0, 1
%3 = and i32 %2, 21845
%4 = and i32 %0, 21845
%5 = add nuw nsw i32 %3, %4
%6 = lshr i32 %5, 2
%7 = and i32 %6, 13107
%8 = and i32 %5, 13107
%9 = add nuw nsw i32 %7, %8
%10 = lshr i32 %9, 4
%11 = and i32 %10, 1799
%12 = and i32 %9, 1799
%13 = add nuw nsw i32 %11, %12
%14 = lshr i32 %13, 8
%15 = and i32 %13, 15
%16 = add nuw nsw i32 %14, %15
ret i32 %16
}
int s5p_uart_divslot(void) { return 0; }


x86 assembly (clang, -O0):
<s5p_uart_divslot>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<s5p_uart_divslot>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @s5p_uart_divslot() {
ret i32 0
}

LLVM IR (-O2):
define i32 @s5p_uart_divslot() {
ret i32 0
}
void gensw() {}


x86 assembly (clang, -O0):
<gensw>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gensw>:
ret

LLVM IR (-O0):
define void @gensw() {
ret void
}

LLVM IR (-O2):
define void @gensw() {
ret void
}
/* Variables and functions */
int close(int);
int internal_random_close(void *data) {
  int fd = (int)data;
  return close(fd);
}


x86 assembly (clang, -O0):
<internal_random_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<internal_random_close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define i32 @internal_random_close(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = ptrtoint i8* %4 to i32
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @close(i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @internal_random_close(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i32
%4 = tail call i32 @close(i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ charrep(char, int);
int /*<<< orphan*/ printf(char *);
void default_wakeup_table_footer(__attribute__((unused)) void *report_data) {
  charrep('-', 55);
  printf("\n\n");
}


x86 assembly (clang, -O0):
<default_wakeup_table_footer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x2d,%edi
mov    $0x37,%esi
call   1040 <charrep@plt>
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_wakeup_table_footer>:
push   %rax
mov    $0x2d,%edi
mov    $0x37,%esi
call   1040 <charrep@plt>
lea    0xec9(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"\0A\0A\00"
define void @default_wakeup_table_footer(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @charrep(i8 signext 45, i32 55)
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [2 x i8] c"\0A\00"
define void @default_wakeup_table_footer(i8* nocapture readnone %0) {
%2 = tail call i32 @charrep(i8 signext 45, i32 55)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str, i64 0, i64 0))
ret void
}
void from_double(void *data, double d) { *((double *)data) = d; }


x86 assembly (clang, -O0):
<from_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<from_double>:
movsd  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @from_double(i8* %0, double %1) {
%3 = alloca i8*
%4 = alloca double
store i8* %0, i8** %3
store double %1, double* %4
%5 = load double, double* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to double*
store double %5, double* %7
ret void
}

LLVM IR (-O2):
define void @from_double(i8* nocapture writeonly %0, double %1) {
%3 = bitcast i8* %0 to double*
store double %1, double* %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t co_read32(void const *ptr32) { return *((uint32_t *)ptr32); }


x86 assembly (clang, -O0):
<co_read32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<co_read32>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @co_read32(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @co_read32(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void javacall_memory_heap_deallocate(void *heap) { free(heap); }


x86 assembly (clang, -O0):
<javacall_memory_heap_deallocate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<javacall_memory_heap_deallocate>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @javacall_memory_heap_deallocate(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @javacall_memory_heap_deallocate(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
int Abc_TtHexDigitNum(int nVars) { return nVars <= 2 ? 1 : 1 << (nVars - 2); }


x86 assembly (clang, -O0):
<Abc_TtHexDigitNum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x2,-0x4(%rbp)
jg     111e <Abc_TtHexDigitNum+0x1e>
mov    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    112e <Abc_TtHexDigitNum+0x2e>
mov    -0x4(%rbp),%ecx
sub    $0x2,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Abc_TtHexDigitNum>:
lea    -0x2(%rdi),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    $0x1,%ecx
cmp    $0x3,%edi
cmovl  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @Abc_TtHexDigitNum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 %3, 2
br i1 %4, label %5, label %6
5: ; preds = %1
br label %10
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 2
%9 = shl i32 1, %8
br label %10
10: ; preds = %6, %5
%11 = phi i32 [ 1, %5 ], [ %9, %6 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @Abc_TtHexDigitNum(i32 %0) {
%2 = icmp slt i32 %0, 3
%3 = add nsw i32 %0, -2
%4 = shl nuw i32 1, %3
%5 = select i1 %2, i32 1, i32 %4
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int readConfFile(FILE *fp) { return 0; }


x86 assembly (clang, -O0):
<readConfFile>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readConfFile>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @readConfFile(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @readConfFile(i32* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int __syscall2(int, unsigned long, unsigned long);
int _syscall2(int nr, unsigned long a, unsigned long b) {
  return __syscall2(nr, a, b);
}


x86 assembly (clang, -O0):
<_syscall2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <__syscall2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_syscall2>:
jmp    1030 <__syscall2@plt>

LLVM IR (-O0):
define i32 @_syscall2(i32 %0, i64 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
store i32 %0, i32* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = call i32 @__syscall2(i32 %7, i64 %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @_syscall2(i32 %0, i64 %1, i64 %2) {
%4 = tail call i32 @__syscall2(i32 %0, i64 %1, i64 %2)
ret i32 %4
}
/* Variables and functions */
double kbessel(int, double);
double K1(double x) { return kbessel(1, x); }


x86 assembly (clang, -O0):
<K1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    $0x1,%edi
call   1030 <kbessel@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<K1>:
mov    $0x1,%edi
jmp    1030 <kbessel@plt>

LLVM IR (-O0):
define double @K1(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @kbessel(i32 1, double %3)
ret double %4
}

LLVM IR (-O2):
define double @K1(double %0) {
%2 = tail call double @kbessel(i32 1, double %0)
ret double %2
}
void kmsg_init(void) {}


x86 assembly (clang, -O0):
<kmsg_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kmsg_init>:
ret

LLVM IR (-O0):
define void @kmsg_init() {
ret void
}

LLVM IR (-O2):
define void @kmsg_init() {
ret void
}
/* Variables and functions */
scalar_t__ genrand_int32();
unsigned long random_unsigned_long(const unsigned long mod_value) {
  return ((unsigned long)genrand_int32() % mod_value);
}


x86 assembly (clang, -O0):
<random_unsigned_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <genrand_int32@plt>
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x8(%rbp)
mov    %rdx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_unsigned_long>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <genrand_int32@plt>
mov    %rax,%rcx
or     %rbx,%rcx
shr    $0x20,%rcx
je     1131 <random_unsigned_long+0x21>
xor    %edx,%edx
div    %rbx
mov    %rdx,%rax
pop    %rbx
ret
xor    %edx,%edx
div    %ebx
mov    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @random_unsigned_long(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = call i64 (...) @genrand_int32()
%4 = load i64, i64* %2
%5 = urem i64 %3, %4
ret i64 %5
}

LLVM IR (-O2):
define i64 @random_unsigned_long(i64 %0) {
%2 = tail call i64 (...) @genrand_int32()
%3 = urem i64 %2, %0
ret i64 %3
}
int fun1090() { return 1090; }


x86 assembly (clang, -O0):
<fun1090>:
push   %rbp
mov    %rsp,%rbp
mov    $0x442,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1090>:
mov    $0x442,%eax
ret

LLVM IR (-O0):
define i32 @fun1090() {
ret i32 1090
}

LLVM IR (-O2):
define i32 @fun1090() {
ret i32 1090
}
/* Type definitions */
typedef int /*<<< orphan*/ OCSP_SERVICELOC;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
scalar_t__ ASN1_item_d2i(int /*<<< orphan*/ **, unsigned char const **, long,
                         int /*<<< orphan*/ *);
int /*<<< orphan*/ OCSP_SERVICELOC_it;
OCSP_SERVICELOC *d2i_OCSP_SERVICELOC(OCSP_SERVICELOC **a,
                                     const unsigned char **in, long len) {
  return (OCSP_SERVICELOC *)ASN1_item_d2i((ASN1_VALUE **)a, in, len,
                                          &OCSP_SERVICELOC_it);
}


x86 assembly (clang, -O0):
<d2i_OCSP_SERVICELOC>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    0x2ea9(%rip),%rcx
call   1030 <ASN1_item_d2i@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_OCSP_SERVICELOC>:
mov    0x2ec9(%rip),%rcx
jmp    1030 <ASN1_item_d2i@plt>

LLVM IR (-O0):
@OCSP_SERVICELOC_it = global i32 0
define i32* @d2i_OCSP_SERVICELOC(i32** %0, i8** %1, i64 %2) {
%4 = alloca i32**
%5 = alloca i8**
%6 = alloca i64
store i32** %0, i32*** %4
store i8** %1, i8*** %5
store i64 %2, i64* %6
%7 = load i32**, i32*** %4
%8 = load i8**, i8*** %5
%9 = load i64, i64* %6
%10 = call i64 @ASN1_item_d2i(i32** %7, i8** %8, i64 %9, i32* @OCSP_SERVICELOC_it)
%11 = inttoptr i64 %10 to i32*
ret i32* %11
}

LLVM IR (-O2):
@OCSP_SERVICELOC_it = global i32 0
define i32* @d2i_OCSP_SERVICELOC(i32** %0, i8** %1, i64 %2) {
%4 = tail call i64 @ASN1_item_d2i(i32** %0, i8** %1, i64 %2, i32* @OCSP_SERVICELOC_it)
%5 = inttoptr i64 %4 to i32*
ret i32* %5
}
/* Variables and functions */
int /*<<< orphan*/ test5(char *, int /*<<< orphan*/);
int main() {
  test5("/Users/jon/work/testLC", 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
xor    %esi,%esi
call   1030 <test5@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %esi,%esi
call   1030 <test5@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"/Users/jon/work/testLC\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @test5(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 0)
ret i32 0
}

LLVM IR (-O2):
@.str = [23 x i8] c"/Users/jon/work/testLC\00"
define i32 @main() {
%1 = tail call i32 @test5(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int count = 2000000;
  for (int i = 0; i <= count; ++i) {
    printf("%d\n", i);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1e8480,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1156 <main+0x46>
mov    -0xc(%rbp),%esi
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112d <main+0x1d>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xee3(%rip),%r14
nopl   (%rax)
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x1e8481,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 2000000, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %0
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp sle i32 %5, %6
br i1 %7, label %8, label %14
8: ; preds = %4
%9 = load i32, i32* %3
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
br label %11
11: ; preds = %8
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
br label %2
1: ; preds = %2
ret i32 0
2: ; preds = %0, %2
%3 = phi i32 [ 0, %0 ], [ %5, %2 ]
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = add nuw nsw i32 %3, 1
%6 = icmp eq i32 %5, 2000001
br i1 %6, label %1, label %2
}
/* Variables and functions */
float RAND_MAX;
float rand();
float GenerateFloatRandom(float minValue, float maxValue) {
  return minValue + ((maxValue - minValue) * rand()) / RAND_MAX;
}


x86 assembly (clang, -O0):
<GenerateFloatRandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
subss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
movss  -0x10(%rbp),%xmm1
movaps %xmm0,%xmm2
movss  -0xc(%rbp),%xmm0
mulss  %xmm2,%xmm1
mov    0x2e8e(%rip),%rax
divss  (%rax),%xmm1
addss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GenerateFloatRandom>:
push   %rax
movss  %xmm0,0x4(%rsp)
subss  %xmm0,%xmm1
movss  %xmm1,(%rsp)
xor    %eax,%eax
call   1030 <rand@plt>
mulss  (%rsp),%xmm0
mov    0x2eb5(%rip),%rax
divss  (%rax),%xmm0
addss  0x4(%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global float 0.000000e+00
define float @GenerateFloatRandom(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = load float, float* %3
%8 = fsub float %6, %7
%9 = call float (...) @rand()
%10 = fmul float %8, %9
%11 = load float, float* @RAND_MAX
%12 = fdiv float %10, %11
%13 = fadd float %5, %12
ret float %13
}

LLVM IR (-O2):
@RAND_MAX = global float 0.000000e+00
define float @GenerateFloatRandom(float %0, float %1) {
%3 = fsub float %1, %0
%4 = tail call float (...) @rand()
%5 = fmul float %3, %4
%6 = load float, float* @RAND_MAX
%7 = fdiv float %5, %6
%8 = fadd float %7, %0
ret float %8
}
/* Variables and functions */
unsigned int exynos_5410_gpio_read(unsigned int);
unsigned int odroid_xu_gpio_read_19() {
  unsigned int bank_offset = 0x0C40;
  unsigned int bit_index = 6;
  return (exynos_5410_gpio_read(bank_offset) >> bit_index) & 0x1;
}


x86 assembly (clang, -O0):
<odroid_xu_gpio_read_19>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xc40,-0x4(%rbp)
movl   $0x6,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <exynos_5410_gpio_read@plt>
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
and    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<odroid_xu_gpio_read_19>:
push   %rax
mov    $0xc40,%edi
call   1030 <exynos_5410_gpio_read@plt>
shr    $0x6,%eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @odroid_xu_gpio_read_19() {
%1 = alloca i32
%2 = alloca i32
store i32 3136, i32* %1
store i32 6, i32* %2
%3 = load i32, i32* %1
%4 = call i32 @exynos_5410_gpio_read(i32 %3)
%5 = load i32, i32* %2
%6 = lshr i32 %4, %5
%7 = and i32 %6, 1
ret i32 %7
}

LLVM IR (-O2):
define i32 @odroid_xu_gpio_read_19() {
%1 = tail call i32 @exynos_5410_gpio_read(i32 3136)
%2 = lshr i32 %1, 6
%3 = and i32 %2, 1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ do_cmd_redraw();
int /*<<< orphan*/ do_cmd_wiz_change_aux();
void do_cmd_wiz_change(void) {
  do_cmd_wiz_change_aux();
  do_cmd_redraw();
}


x86 assembly (clang, -O0):
<do_cmd_wiz_change>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <do_cmd_wiz_change_aux@plt>
mov    $0x0,%al
call   1030 <do_cmd_redraw@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_cmd_wiz_change>:
push   %rax
xor    %eax,%eax
call   1040 <do_cmd_wiz_change_aux@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <do_cmd_redraw@plt>

LLVM IR (-O0):
define void @do_cmd_wiz_change() {
%1 = call i32 (...) @do_cmd_wiz_change_aux()
%2 = call i32 (...) @do_cmd_redraw()
ret void
}

LLVM IR (-O2):
define void @do_cmd_wiz_change() {
%1 = tail call i32 (...) @do_cmd_wiz_change_aux()
%2 = tail call i32 (...) @do_cmd_redraw()
ret void
}
int int_equal(void *i1, void *i2) { return (((int)(long)i1) == (int)(long)i2); }


x86 assembly (clang, -O0):
<int_equal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_equal>:
xor    %eax,%eax
cmp    %esi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @int_equal(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = ptrtoint i8* %5 to i64
%7 = trunc i64 %6 to i32
%8 = load i8*, i8** %4
%9 = ptrtoint i8* %8 to i64
%10 = trunc i64 %9 to i32
%11 = icmp eq i32 %7, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @int_equal(i8* %0, i8* %1) {
%3 = ptrtoint i8* %0 to i64
%4 = trunc i64 %3 to i32
%5 = ptrtoint i8* %1 to i64
%6 = trunc i64 %5 to i32
%7 = icmp eq i32 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
double _ntl_GetTime() { return -1.0; }


x86 assembly (clang, -O0):
<_ntl_GetTime>:
push   %rbp
mov    %rsp,%rbp
movsd  0xef4(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ntl_GetTime>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @_ntl_GetTime() {
ret double -1.000000e+00
}

LLVM IR (-O2):
define double @_ntl_GetTime() {
ret double -1.000000e+00
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void my_function() {
  printf("Welcome to my function. Feel at home.\n");
  return;
}


x86 assembly (clang, -O0):
<my_function>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_function>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [39 x i8] c"Welcome to my function. Feel at home.\0A\00"
define void @my_function() {
%1 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [38 x i8] c"Welcome to my function. Feel at home.\00"
define void @my_function() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @str, i64 0, i64 0))
ret void
}
int calc_fout(int freq, int od, int ext_div) {
  int f, div;
  f = freq;
  if (od == 0)
    div = 1;
  else
    div = od * 2;
  f = f / div;
  if (ext_div == 0)
    return f;
  else {
    f = f / 2;
    return f / (ext_div + 1);
  }
}


x86 assembly (clang, -O0):
<calc_fout>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1129 <calc_fout+0x29>
movl   $0x1,-0x18(%rbp)
jmp    1132 <calc_fout+0x32>
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cltd
idivl  -0x18(%rbp)
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    1151 <calc_fout+0x51>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    116e <calc_fout+0x6e>
mov    -0x14(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x10(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc_fout>:
lea    (%rsi,%rsi,1),%eax
test   %esi,%esi
mov    $0x1,%esi
cmovne %eax,%esi
mov    %edx,%ecx
mov    %edi,%eax
cltd
idiv   %esi
test   %ecx,%ecx
je     1129 <calc_fout+0x29>
mov    %eax,%edx
shr    $0x1f,%edx
add    %eax,%edx
sar    %edx
add    $0x1,%ecx
mov    %edx,%eax
cltd
idiv   %ecx
ret

LLVM IR (-O0):
define i32 @calc_fout(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%10 = load i32, i32* %5
store i32 %10, i32* %8
%11 = load i32, i32* %6
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %3
store i32 1, i32* %9
br label %17
14: ; preds = %3
%15 = load i32, i32* %6
%16 = mul nsw i32 %15, 2
store i32 %16, i32* %9
br label %17
17: ; preds = %14, %13
%18 = load i32, i32* %8
%19 = load i32, i32* %9
%20 = sdiv i32 %18, %19
store i32 %20, i32* %8
%21 = load i32, i32* %7
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %25
23: ; preds = %17
%24 = load i32, i32* %8
store i32 %24, i32* %4
br label %32
25: ; preds = %17
%26 = load i32, i32* %8
%27 = sdiv i32 %26, 2
store i32 %27, i32* %8
%28 = load i32, i32* %8
%29 = load i32, i32* %7
%30 = add nsw i32 %29, 1
%31 = sdiv i32 %28, %30
store i32 %31, i32* %4
br label %32
32: ; preds = %25, %23
%33 = load i32, i32* %4
ret i32 %33
}

LLVM IR (-O2):
define i32 @calc_fout(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %1, 0
%5 = shl nsw i32 %1, 1
%6 = select i1 %4, i32 1, i32 %5
%7 = sdiv i32 %0, %6
%8 = icmp eq i32 %2, 0
br i1 %8, label %13, label %9
9: ; preds = %3
%10 = sdiv i32 %7, 2
%11 = add nsw i32 %2, 1
%12 = sdiv i32 %10, %11
br label %13
13: ; preds = %3, %9
%14 = phi i32 [ %12, %9 ], [ %7, %3 ]
ret i32 %14
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
double stdlib_strided_dnanmeanpn(int /*<<< orphan*/ const, double const *,
                                 int /*<<< orphan*/ const);
double stdlib_strided_dnanmean(const int64_t N, const double *X,
                               const int64_t stride) {
  return stdlib_strided_dnanmeanpn(N, X, stride);
}


x86 assembly (clang, -O0):
<stdlib_strided_dnanmean>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <stdlib_strided_dnanmeanpn@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stdlib_strided_dnanmean>:
jmp    1030 <stdlib_strided_dnanmeanpn@plt>

LLVM IR (-O0):
define double @stdlib_strided_dnanmean(i32 %0, double* %1, i32 %2) {
%4 = alloca i32
%5 = alloca double*
%6 = alloca i32
store i32 %0, i32* %4
store double* %1, double** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load double*, double** %5
%9 = load i32, i32* %6
%10 = call double @stdlib_strided_dnanmeanpn(i32 %7, double* %8, i32 %9)
ret double %10
}

LLVM IR (-O2):
define double @stdlib_strided_dnanmean(i32 %0, double* %1, i32 %2) {
%4 = tail call double @stdlib_strided_dnanmeanpn(i32 %0, double* %1, i32 %2)
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ assert_ptr_not_equal_(char *, int, int *, int *);
void test_ptr_not_equal_fail() {
  int x = 1;
  int *p1 = &x, *p2 = &x;
  assert_ptr_not_equal_("/scratch/repos/new/home/jordi_armengol_estape/"
                        "c-scraper/outputs/2022-01-22/02-19-57/repos/hughbien/"
                        "assertive/refs/heads/master/test/fail_test.c",
                        54, (p1), (p2));
}


x86 assembly (clang, -O0):
<test_ptr_not_equal_fail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x1,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
lea    0xec2(%rip),%rdi
mov    $0x36,%esi
call   1030 <assert_ptr_not_equal_@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_ptr_not_equal_fail>:
push   %rax
movl   $0x1,0x4(%rsp)
lea    0xee0(%rip),%rdi
lea    0x4(%rsp),%rcx
mov    $0x36,%esi
mov    %rcx,%rdx
call   1030 <assert_ptr_not_equal_@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [144 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/hughbien/assertive/refs/heads/master/test/fail_test.c\00"
define void @test_ptr_not_equal_fail() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32*
store i32 1, i32* %1
store i32* %1, i32** %2
store i32* %1, i32** %3
%4 = load i32*, i32** %2
%5 = load i32*, i32** %3
%6 = call i32 @assert_ptr_not_equal_(i8* getelementptr inbounds ([144 x i8], [144 x i8]* @.str, i64 0, i64 0), i32 54, i32* %4, i32* %5)
ret void
}

LLVM IR (-O2):
@.str = [144 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/hughbien/assertive/refs/heads/master/test/fail_test.c\00"
define void @test_ptr_not_equal_fail() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 1, i32* %1
%3 = call i32 @assert_ptr_not_equal_(i8* getelementptr inbounds ([144 x i8], [144 x i8]* @.str, i64 0, i64 0), i32 54, i32* %1, i32* %1)
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int solcon_read_multprec_solutions(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(450, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_read_multprec_solutions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x1c2,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_read_multprec_solutions>:
mov    $0x1c2,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @solcon_read_multprec_solutions() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 450, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @solcon_read_multprec_solutions() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 450, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
int hum_word_size(int word_size) {
  int m = 0;
  while ((1 << m) - m - 1 < word_size) {
    m++;
  }
  return (1 << m) - 1;
}


x86 assembly (clang, -O0):
<hum_word_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
sub    -0x8(%rbp),%eax
sub    $0x1,%eax
cmp    -0x4(%rbp),%eax
jge    1135 <hum_word_size+0x35>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <hum_word_size+0xe>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hum_word_size>:
xor    %edx,%edx
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    $0x1,%eax
shl    %cl,%eax
add    $0x1,%ecx
lea    (%rax,%rdx,1),%esi
add    $0xffffffff,%esi
add    $0xffffffff,%edx
cmp    %edi,%esi
jl     1110 <hum_word_size+0x10>
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @hum_word_size(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %3
%6 = shl i32 1, %5
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = sub nsw i32 %8, 1
%10 = load i32, i32* %2
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %15
12: ; preds = %4
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
%17 = shl i32 1, %16
%18 = sub nsw i32 %17, 1
ret i32 %18
}

LLVM IR (-O2):
define i32 @hum_word_size(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %8, %2 ]
%4 = shl nuw i32 1, %3
%5 = xor i32 %3, -1
%6 = add i32 %4, %5
%7 = icmp slt i32 %6, %0
%8 = add nuw nsw i32 %3, 1
br i1 %7, label %2, label %9
9: ; preds = %2
%10 = add nsw i32 %4, -1
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
char *malloc(scalar_t__);
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ strcpy(char *, char *);
scalar_t__ strlen(char *);
char *dupstr(char *s) {
  char *ret = malloc(1 + strlen(s));
  if (!ret) {
    perror("malloc");
    exit(1);
  }
  strcpy(ret, s);
  return ret;
}


x86 assembly (clang, -O0):
<dupstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1196 <dupstr+0x46>
lea    0xe79(%rip),%rdi
call   1060 <perror@plt>
mov    $0x1,%edi
call   1070 <exit@plt>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dupstr>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
test   %rax,%rax
je     1183 <dupstr+0x33>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
lea    0xe76(%rip),%rdi
call   1060 <perror@plt>
mov    $0x1,%edi
call   1070 <exit@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"malloc\00"
define i8* @dupstr(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 1, %5
%7 = call i8* @malloc(i64 %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = icmp ne i8* %8, null
br i1 %9, label %13, label %10
10: ; preds = %1
%11 = call i32 @perror(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%12 = call i32 @exit(i32 1)
unreachable
13: ; preds = %1
%14 = load i8*, i8** %3
%15 = load i8*, i8** %2
%16 = call i32 @strcpy(i8* %14, i8* %15)
%17 = load i8*, i8** %3
ret i8* %17
}

LLVM IR (-O2):
@.str = [7 x i8] c"malloc\00"
define i8* @dupstr(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i8* @malloc(i64 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = tail call i32 @perror(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%8 = tail call i32 @exit(i32 1)
unreachable
9: ; preds = %1
%10 = tail call i32 @strcpy(i8* %4, i8* %0)
ret i8* %4
}
void pollen_math_Random16_targetInit__I() {}


x86 assembly (clang, -O0):
<pollen_math_Random16_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pollen_math_Random16_targetInit__I>:
ret

LLVM IR (-O0):
define void @pollen_math_Random16_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @pollen_math_Random16_targetInit__I() {
ret void
}
void amsynth_lash_set_alsa_client_id(unsigned char id) {}


x86 assembly (clang, -O0):
<amsynth_lash_set_alsa_client_id>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<amsynth_lash_set_alsa_client_id>:
ret

LLVM IR (-O0):
define void @amsynth_lash_set_alsa_client_id(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
ret void
}

LLVM IR (-O2):
define void @amsynth_lash_set_alsa_client_id(i8 zeroext %0) {
ret void
}
/* Variables and functions */
void *_soxr_simd_aligned_malloc(size_t);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
void *_soxr_simd_aligned_calloc(size_t nmemb, size_t size) {
  void *p = _soxr_simd_aligned_malloc(nmemb * size);
  if (p)
    memset(p, 0, nmemb * size);
  return p;
}


x86 assembly (clang, -O0):
<_soxr_simd_aligned_calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
imul   -0x10(%rbp),%rdi
call   1040 <_soxr_simd_aligned_malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1161 <_soxr_simd_aligned_calloc+0x41>
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rdx
imul   -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_soxr_simd_aligned_calloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
imul   %rsi,%rbx
mov    %rbx,%rdi
call   1040 <_soxr_simd_aligned_malloc@plt>
mov    %rax,%r14
test   %rax,%rax
je     1148 <_soxr_simd_aligned_calloc+0x28>
mov    %r14,%rdi
xor    %esi,%esi
mov    %rbx,%rdx
call   1030 <memset@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @_soxr_simd_aligned_calloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = mul i64 %6, %7
%9 = call i8* @_soxr_simd_aligned_malloc(i64 %8)
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %18
12: ; preds = %2
%13 = load i8*, i8** %5
%14 = load i64, i64* %3
%15 = load i64, i64* %4
%16 = mul i64 %14, %15
%17 = call i32 @memset(i8* %13, i32 0, i64 %16)
br label %18
18: ; preds = %12, %2
%19 = load i8*, i8** %5
ret i8* %19
}

LLVM IR (-O2):
define i8* @_soxr_simd_aligned_calloc(i64 %0, i64 %1) {
%3 = mul i64 %1, %0
%4 = tail call i8* @_soxr_simd_aligned_malloc(i64 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 @memset(i8* %4, i32 0, i64 %3)
br label %8
8: ; preds = %6, %2
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ pong_main();
int main() { pong_main(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <pong_main@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <pong_main@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @pong_main()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @pong_main()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ drawTimebar(int, int /*<<< orphan*/);
int /*<<< orphan*/ fromRGB(int /*<<< orphan*/, int /*<<< orphan*/,
                           int /*<<< orphan*/);
void drawFullTimebar(void) { drawTimebar(97, fromRGB(0, 0, 0)); }


x86 assembly (clang, -O0):
<drawFullTimebar>:
push   %rbp
mov    %rsp,%rbp
xor    %edx,%edx
mov    %edx,%edi
mov    %edx,%esi
call   1040 <fromRGB@plt>
mov    %eax,%esi
mov    $0x61,%edi
call   1030 <drawTimebar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawFullTimebar>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
call   1040 <fromRGB@plt>
mov    $0x61,%edi
mov    %eax,%esi
pop    %rax
jmp    1030 <drawTimebar@plt>

LLVM IR (-O0):
define void @drawFullTimebar() {
%1 = call i32 @fromRGB(i32 0, i32 0, i32 0)
%2 = call i32 @drawTimebar(i32 97, i32 %1)
ret void
}

LLVM IR (-O2):
define void @drawFullTimebar() {
%1 = tail call i32 @fromRGB(i32 0, i32 0, i32 0)
%2 = tail call i32 @drawTimebar(i32 97, i32 %1)
ret void
}
void _Unwind_Resume() { asm volatile("int $13"); }


x86 assembly (clang, -O0):
<_Unwind_Resume>:
push   %rbp
mov    %rsp,%rbp
int    $0xd
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Unwind_Resume>:
int    $0xd
ret

LLVM IR (-O0):
define void @_Unwind_Resume() {
ret void
}

LLVM IR (-O2):
define void @_Unwind_Resume() {
tail call void asm sideeffect "int $$13", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char);
void ft_putichar(int i, char c) {
  while (i > 0) {
    ft_putchar(c);
    i--;
  }
}


x86 assembly (clang, -O0):
<ft_putichar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1142 <ft_putichar+0x32>
movsbl -0x5(%rbp),%edi
call   1030 <ft_putchar@plt>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    1121 <ft_putichar+0x11>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putichar>:
push   %rbp
push   %rbx
push   %rax
test   %edi,%edi
jle    112f <ft_putichar+0x1f>
mov    %edi,%ebx
add    $0x1,%ebx
movsbl %sil,%ebp
mov    %ebp,%edi
call   1030 <ft_putchar@plt>
add    $0xffffffff,%ebx
cmp    $0x1,%ebx
ja     1120 <ft_putichar+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @ft_putichar(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
br label %5
5: ; preds = %8, %2
%6 = load i32, i32* %3
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %5
%9 = load i8, i8* %4
%10 = call i32 @ft_putchar(i8 signext %9)
%11 = load i32, i32* %3
%12 = add nsw i32 %11, -1
store i32 %12, i32* %3
br label %5
13: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @ft_putichar(i32 %0, i8 signext %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %9
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %0, %2 ]
%6 = tail call i32 @ft_putchar(i8 signext %1)
%7 = add nsw i32 %5, -1
%8 = icmp ugt i32 %5, 1
br i1 %8, label %4, label %9
9: ; preds = %4, %2
ret void
}