#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
float lowerleft_iou(float *, float *, float *, float *, int, int);
void nms_omp1_src(float *xmins, float *ymins, float *widths, float *heights,
                  int *order, int *keep, float threshold, int n) {
#pragma omp parallel for schedule(dynamic, 8)                                  \
    firstprivate(xmins, ymins, widths, heights, order, keep, threshold, n)
  for (int i = n - 1; i > 0; i -= 1) {
    for (int j = 0; j < i; j++) {
      float iou_result = lowerleft_iou(xmins, ymins, widths, heights, i, j);
      if (iou_result > threshold) {
        keep[i] = 0;
        continue;
      }
    }
  }
}


x86 assembly (clang, -O0):
<nms_omp1_src>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x10(%rbp),%eax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
movss  %xmm0,-0x34(%rbp)
mov    0x10(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x38(%rbp)
cmpl   $0x0,-0x38(%rbp)
jle    11c9 <nms_omp1_src+0xb9>
movl   $0x0,-0x3c(%rbp)
mov    -0x3c(%rbp),%eax
cmp    -0x38(%rbp),%eax
jge    11b6 <nms_omp1_src+0xa6>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x38(%rbp),%r8d
mov    -0x3c(%rbp),%r9d
call   1030 <lowerleft_iou@plt>
movss  %xmm0,-0x40(%rbp)
movss  -0x40(%rbp),%xmm0
ucomiss -0x34(%rbp),%xmm0
jbe    11a3 <nms_omp1_src+0x93>
mov    -0x30(%rbp),%rax
movslq -0x38(%rbp),%rcx
movl   $0x0,(%rax,%rcx,4)
jmp    11a8 <nms_omp1_src+0x98>
jmp    11a8 <nms_omp1_src+0x98>
mov    -0x3c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x3c(%rbp)
jmp    1152 <nms_omp1_src+0x42>
jmp    11bb <nms_omp1_src+0xab>
mov    -0x38(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x38(%rbp)
jmp    1141 <nms_omp1_src+0x31>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nms_omp1_src>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
sub    $0x28,%rsp
movss  %xmm0,0xc(%rsp)
mov    %r9,0x18(%rsp)
mov    %rcx,0x20(%rsp)
mov    0x60(%rsp),%r15d
cmp    $0x2,%r15d
jl     11a7 <nms_omp1_src+0x97>
mov    %rdx,%r12
mov    %rsi,%r13
mov    %rdi,%rbx
mov    %r15d,%ebp
add    $0xffffffff,%r15d
jmp    115c <nms_omp1_src+0x4c>
nopl   0x0(%rax,%rax,1)
add    $0xffffffff,%r15d
cmpq   $0x3,0x10(%rsp)
jl     11a7 <nms_omp1_src+0x97>
mov    %rbp,0x10(%rsp)
add    $0xffffffffffffffff,%rbp
xor    %r14d,%r14d
jmp    1179 <nms_omp1_src+0x69>
nopw   0x0(%rax,%rax,1)
add    $0x1,%r14d
cmp    %r14d,%r15d
je     1150 <nms_omp1_src+0x40>
mov    %rbx,%rdi
mov    %r13,%rsi
mov    %r12,%rdx
mov    0x20(%rsp),%rcx
mov    %ebp,%r8d
mov    %r14d,%r9d
call   1030 <lowerleft_iou@plt>
ucomiss 0xc(%rsp),%xmm0
jbe    1170 <nms_omp1_src+0x60>
mov    0x18(%rsp),%rax
movl   $0x0,(%rax,%rbp,4)
jmp    1170 <nms_omp1_src+0x60>
add    $0x28,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @nms_omp1_src(float* %0, float* %1, float* %2, float* %3, i32* %4, i32* %5, float %6, i32 %7) {
%9 = alloca float*
%10 = alloca float*
%11 = alloca float*
%12 = alloca float*
%13 = alloca i32*
%14 = alloca i32*
%15 = alloca float
%16 = alloca i32
%17 = alloca i32
%18 = alloca i32
%19 = alloca float
store float* %0, float** %9
store float* %1, float** %10
store float* %2, float** %11
store float* %3, float** %12
store i32* %4, i32** %13
store i32* %5, i32** %14
store float %6, float* %15
store i32 %7, i32* %16
%20 = load i32, i32* %16
%21 = sub nsw i32 %20, 1
store i32 %21, i32* %17
br label %22
22: ; preds = %51, %8
%23 = load i32, i32* %17
%24 = icmp sgt i32 %23, 0
br i1 %24, label %25, label %54
25: ; preds = %22
store i32 0, i32* %18
br label %26
26: ; preds = %47, %25
%27 = load i32, i32* %18
%28 = load i32, i32* %17
%29 = icmp slt i32 %27, %28
br i1 %29, label %30, label %50
30: ; preds = %26
%31 = load float*, float** %9
%32 = load float*, float** %10
%33 = load float*, float** %11
%34 = load float*, float** %12
%35 = load i32, i32* %17
%36 = load i32, i32* %18
%37 = call float @lowerleft_iou(float* %31, float* %32, float* %33, float* %34, i32 %35, i32 %36)
store float %37, float* %19
%38 = load float, float* %19
%39 = load float, float* %15
%40 = fcmp ogt float %38, %39
br i1 %40, label %41, label %46
41: ; preds = %30
%42 = load i32*, i32** %14
%43 = load i32, i32* %17
%44 = sext i32 %43 to i64
%45 = getelementptr inbounds i32, i32* %42, i64 %44
store i32 0, i32* %45
br label %47
46: ; preds = %30
br label %47
47: ; preds = %46, %41
%48 = load i32, i32* %18
%49 = add nsw i32 %48, 1
store i32 %49, i32* %18
br label %26
50: ; preds = %26
br label %51
51: ; preds = %50
%52 = load i32, i32* %17
%53 = sub nsw i32 %52, 1
store i32 %53, i32* %17
br label %22
54: ; preds = %22
ret void
}

LLVM IR (-O2):
define void @nms_omp1_src(float* %0, float* %1, float* %2, float* %3, i32* nocapture readnone %4, i32* nocapture writeonly %5, float %6, i32 %7) {
%9 = icmp sgt i32 %7, 1
br i1 %9, label %10, label %21
10: ; preds = %8
%11 = zext i32 %7 to i64
br label %14
12: ; preds = %27
%13 = icmp sgt i64 %15, 2
br i1 %13, label %14, label %21
14: ; preds = %12, %10
%15 = phi i64 [ %11, %10 ], [ %18, %12 ]
%16 = phi i32 [ %7, %10 ], [ %17, %12 ]
%17 = add i32 %16, -1
%18 = add nsw i64 %15, -1
%19 = getelementptr inbounds i32, i32* %5, i64 %18
%20 = trunc i64 %18 to i32
br label %22
21: ; preds = %12, %8
ret void
22: ; preds = %14, %27
%23 = phi i32 [ 0, %14 ], [ %28, %27 ]
%24 = tail call float @lowerleft_iou(float* %0, float* %1, float* %2, float* %3, i32 %20, i32 %23)
%25 = fcmp ogt float %24, %6
br i1 %25, label %26, label %27
26: ; preds = %22
store i32 0, i32* %19
br label %27
27: ; preds = %22, %26
%28 = add nuw nsw i32 %23, 1
%29 = icmp eq i32 %28, %17
br i1 %29, label %12, label %22
}