xunge/DecIR huggingface dataset:
int swap_str_ptrs(int *int1, int *int2, char **arg1, char **arg2) {
  char *tmp = *arg1;
  *arg1 = *arg2;
  *arg2 = tmp;
  int temp = *int1;
  *int1 = *int2;
  *int2 = temp;
  return 0;
}


x86 assembly (clang, -O0):
<swap_str_ptrs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x28(%rbp),%rcx
mov    -0x20(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x2c(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x2c(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_str_ptrs>:
mov    (%rdx),%r8
mov    (%rcx),%rax
mov    %rax,(%rdx)
mov    %r8,(%rcx)
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @swap_str_ptrs(i32* %0, i32* %1, i8** %2, i8** %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i8**
%8 = alloca i8**
%9 = alloca i8*
%10 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i8** %2, i8*** %7
store i8** %3, i8*** %8
%11 = load i8**, i8*** %7
%12 = load i8*, i8** %11
store i8* %12, i8** %9
%13 = load i8**, i8*** %8
%14 = load i8*, i8** %13
%15 = load i8**, i8*** %7
store i8* %14, i8** %15
%16 = load i8*, i8** %9
%17 = load i8**, i8*** %8
store i8* %16, i8** %17
%18 = load i32*, i32** %5
%19 = load i32, i32* %18
store i32 %19, i32* %10
%20 = load i32*, i32** %6
%21 = load i32, i32* %20
%22 = load i32*, i32** %5
store i32 %21, i32* %22
%23 = load i32, i32* %10
%24 = load i32*, i32** %6
store i32 %23, i32* %24
ret i32 0
}

LLVM IR (-O2):
define i32 @swap_str_ptrs(i32* nocapture %0, i32* nocapture %1, i8** nocapture %2, i8** nocapture %3) {
%5 = load i8*, i8** %2
%6 = load i8*, i8** %3
store i8* %6, i8** %2
store i8* %5, i8** %3
%7 = load i32, i32* %0
%8 = load i32, i32* %1
store i32 %8, i32* %0
store i32 %7, i32* %1
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;
typedef scalar_t__ int8_t;

/* Variables and functions */
scalar_t__ errno;
int /*<<< orphan*/ strtoul(int /*<<< orphan*/ *, char **, int /*<<< orphan*/);
int8_t parse_int(uint8_t *text, void *buf) {
  errno = 0;
  *(uint32_t *)buf = strtoul(text, (char **)NULL, 0);
  return errno;
}


x86 assembly (clang, -O0):
<parse_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb9(%rip),%rax
movq   $0x0,(%rax)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
xor    %edx,%edx
call   1030 <strtoul@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    0x2e94(%rip),%rax
mov    (%rax),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_int>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    0x2ec2(%rip),%r14
movq   $0x0,(%r14)
xor    %esi,%esi
xor    %edx,%edx
call   1030 <strtoul@plt>
mov    %eax,(%rbx)
mov    (%r14),%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@errno = global i64 0
define i64 @parse_int(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
store i64 0, i64* @errno
%5 = load i32*, i32** %3
%6 = call i32 @strtoul(i32* %5, i8** null, i32 0)
%7 = load i8*, i8** %4
%8 = bitcast i8* %7 to i32*
store i32 %6, i32* %8
%9 = load i64, i64* @errno
ret i64 %9
}

LLVM IR (-O2):
@errno = global i64 0
define i64 @parse_int(i32* nocapture %0, i8* nocapture writeonly %1) {
store i64 0, i64* @errno
%3 = tail call i32 @strtoul(i32* nocapture %0, i8** null, i32 0)
%4 = bitcast i8* %1 to i32*
store i32 %3, i32* %4
%5 = load i64, i64* @errno
ret i64 %5
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ request_code;
};
typedef TYPE_1__ XErrorEvent;

/* Variables and functions */
unsigned char get_XErrorEvent_request_code(void *_p) {
  return (unsigned char)((XErrorEvent *)_p)->request_code;
}


x86 assembly (clang, -O0):
<get_XErrorEvent_request_code>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XErrorEvent_request_code>:
mov    (%rdi),%al
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define zeroext i8 @get_XErrorEvent_request_code(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i8
ret i8 %7
}

LLVM IR (-O2):
define zeroext i8 @get_XErrorEvent_request_code(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i8
ret i8 %4
}
/* Variables and functions */
char *date_get_now_date_yyyy_mm_dd(int);
char *date_get_current_yyyy_mm_dd(int utc_offset) {
  return date_get_now_date_yyyy_mm_dd(utc_offset);
}


x86 assembly (clang, -O0):
<date_get_current_yyyy_mm_dd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <date_get_now_date_yyyy_mm_dd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<date_get_current_yyyy_mm_dd>:
jmp    1030 <date_get_now_date_yyyy_mm_dd@plt>

LLVM IR (-O0):
define i8* @date_get_current_yyyy_mm_dd(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @date_get_now_date_yyyy_mm_dd(i32 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @date_get_current_yyyy_mm_dd(i32 %0) {
%2 = tail call i8* @date_get_now_date_yyyy_mm_dd(i32 %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ ledctl(int);
int /*<<< orphan*/ sleep(int);
void display_loading() {
  unsigned int mask = 1;
  while (1) {
    ledctl(1);
    sleep(300);
    mask = (mask == 7) ? 1 : (mask << 1);
  }
}


x86 assembly (clang, -O0):
<display_loading>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <ledctl@plt>
mov    $0x12c,%edi
call   1040 <sleep@plt>
cmpl   $0x7,-0x4(%rbp)
jne    115a <display_loading+0x3a>
mov    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1163 <display_loading+0x43>
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    112f <display_loading+0xf>

x86 assembly (clang, -O2):
<display_loading>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x1,%edi
call   1030 <ledctl@plt>
mov    $0x12c,%edi
call   1040 <sleep@plt>
jmp    1130 <display_loading+0x10>

LLVM IR (-O0):
define void @display_loading() {
%1 = alloca i32
store i32 1, i32* %1
br label %2
2: ; preds = %0, %11
%3 = call i32 @ledctl(i32 1)
%4 = call i32 @sleep(i32 300)
%5 = load i32, i32* %1
%6 = icmp eq i32 %5, 7
br i1 %6, label %7, label %8
7: ; preds = %2
br label %11
8: ; preds = %2
%9 = load i32, i32* %1
%10 = shl i32 %9, 1
br label %11
11: ; preds = %8, %7
%12 = phi i32 [ 1, %7 ], [ %10, %8 ]
store i32 %12, i32* %1
br label %2
}

LLVM IR (-O2):
define void @display_loading() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @ledctl(i32 1)
%3 = tail call i32 @sleep(i32 300)
br label %1
}
int test_imm_D0int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0xD0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D0int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0xd0,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D0int64_midword_mem>:
testb  $0xd0,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D0int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 208
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_D0int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 13631488
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void g_vsnprintf() {}


x86 assembly (clang, -O0):
<g_vsnprintf>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_vsnprintf>:
ret

LLVM IR (-O0):
define void @g_vsnprintf() {
ret void
}

LLVM IR (-O2):
define void @g_vsnprintf() {
ret void
}
int foo3(void) {}


x86 assembly (clang, -O0):
<foo3>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo3>:
ret

LLVM IR (-O0):
define i32 @foo3() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @foo3() {
ret i32 undef
}
int uECC_bytes(void) { return 32; }


x86 assembly (clang, -O0):
<uECC_bytes>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uECC_bytes>:
mov    $0x20,%eax
ret

LLVM IR (-O0):
define i32 @uECC_bytes() {
ret i32 32
}

LLVM IR (-O2):
define i32 @uECC_bytes() {
ret i32 32
}
void nsvg__xformSetTranslation(float *t, float tx, float ty) {
  t[0] = 1.0f;
  t[1] = 0.0f;
  t[2] = 0.0f;
  t[3] = 1.0f;
  t[4] = tx;
  t[5] = ty;
}


x86 assembly (clang, -O0):
<nsvg__xformSetTranslation>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  %xmm1,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  0xee2(%rip),%xmm0
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,0x4(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
movss  0xeba(%rip),%xmm0
movss  %xmm0,0xc(%rax)
movss  -0xc(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x10(%rax)
movss  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x14(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nsvg__xformSetTranslation>:
movaps 0xef9(%rip),%xmm2
movups %xmm2,(%rdi)
movss  %xmm0,0x10(%rdi)
movss  %xmm1,0x14(%rdi)
ret

LLVM IR (-O0):
define void @nsvg__xformSetTranslation(float* %0, float %1, float %2) {
%4 = alloca float*
%5 = alloca float
%6 = alloca float
store float* %0, float** %4
store float %1, float* %5
store float %2, float* %6
%7 = load float*, float** %4
%8 = getelementptr inbounds float, float* %7, i64 0
store float 1.000000e+00, float* %8
%9 = load float*, float** %4
%10 = getelementptr inbounds float, float* %9, i64 1
store float 0.000000e+00, float* %10
%11 = load float*, float** %4
%12 = getelementptr inbounds float, float* %11, i64 2
store float 0.000000e+00, float* %12
%13 = load float*, float** %4
%14 = getelementptr inbounds float, float* %13, i64 3
store float 1.000000e+00, float* %14
%15 = load float, float* %5
%16 = load float*, float** %4
%17 = getelementptr inbounds float, float* %16, i64 4
store float %15, float* %17
%18 = load float, float* %6
%19 = load float*, float** %4
%20 = getelementptr inbounds float, float* %19, i64 5
store float %18, float* %20
ret void
}

LLVM IR (-O2):
define void @nsvg__xformSetTranslation(float* nocapture writeonly %0, float %1, float %2) {
%4 = bitcast float* %0 to <4 x float>*
store <4 x float> <float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00>, <4 x float>* %4
%5 = getelementptr inbounds float, float* %0, i64 4
store float %1, float* %5
%6 = getelementptr inbounds float, float* %0, i64 5
store float %2, float* %6
ret void
}
int get_fpu_except_flags(void) { return 0; }


x86 assembly (clang, -O0):
<get_fpu_except_flags>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_fpu_except_flags>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_fpu_except_flags() {
ret i32 0
}

LLVM IR (-O2):
define i32 @get_fpu_except_flags() {
ret i32 0
}
/* Variables and functions */
void *malloc(int);
void *need_malloc() { return malloc(1); }


x86 assembly (clang, -O0):
<need_malloc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <malloc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<need_malloc>:
mov    $0x1,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @need_malloc() {
%1 = call i8* @malloc(i32 1)
ret i8* %1
}

LLVM IR (-O2):
define noalias i8* @need_malloc() {
%1 = tail call dereferenceable_or_null(1) i8* @malloc(i32 1)
ret i8* %1
}
int ft_isprint(int c) {
  if (c < 32 || c >= 127)
    return (0);
  else
    return (1);
}


x86 assembly (clang, -O0):
<ft_isprint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x20,-0x8(%rbp)
jl     111b <ft_isprint+0x1b>
cmpl   $0x7f,-0x8(%rbp)
jl     1127 <ft_isprint+0x27>
movl   $0x0,-0x4(%rbp)
jmp    112e <ft_isprint+0x2e>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isprint>:
add    $0xffffffe0,%edi
xor    %eax,%eax
cmp    $0x5f,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @ft_isprint(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 32
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sge i32 %7, 127
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 0, i32* %2
br label %11
10: ; preds = %6
store i32 1, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @ft_isprint(i32 %0) {
%2 = add i32 %0, -32
%3 = icmp ult i32 %2, 95
%4 = zext i1 %3 to i32
ret i32 %4
}
int swapIntEndianness(int input) {
  int output = 0;
  for (int i = 0; i < sizeof(int); i++) {
    *((char *)&output + sizeof(int) - i - 1) = *((char *)&input + i);
  }
  return output;
}


x86 assembly (clang, -O0):
<swapIntEndianness>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movslq -0xc(%rbp),%rax
cmp    $0x4,%rax
jae    1146 <swapIntEndianness+0x46>
movslq -0xc(%rbp),%rax
mov    -0x4(%rbp,%rax,1),%cl
movslq -0xc(%rbp),%rdx
xor    %eax,%eax
sub    %rdx,%rax
mov    %cl,-0x5(%rbp,%rax,1)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1115 <swapIntEndianness+0x15>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swapIntEndianness>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @swapIntEndianness(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %22, %1
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = icmp ult i64 %7, 4
br i1 %8, label %9, label %25
9: ; preds = %5
%10 = bitcast i32* %2 to i8*
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i8, i8* %13
%15 = bitcast i32* %3 to i8*
%16 = getelementptr inbounds i8, i8* %15, i64 4
%17 = load i32, i32* %4
%18 = sext i32 %17 to i64
%19 = sub i64 0, %18
%20 = getelementptr inbounds i8, i8* %16, i64 %19
%21 = getelementptr inbounds i8, i8* %20, i64 -1
store i8 %14, i8* %21
br label %22
22: ; preds = %9
%23 = load i32, i32* %4
%24 = add nsw i32 %23, 1
store i32 %24, i32* %4
br label %5
25: ; preds = %5
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @swapIntEndianness(i32 %0) {
%2 = call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
/* Variables and functions */
double fermi_dirac_derivative(double, double, double);
double inverted_fermi_dirac_derivative(double E, double EF, double kBTemp) {
  return fermi_dirac_derivative(EF, E, kBTemp);
}


x86 assembly (clang, -O0):
<inverted_fermi_dirac_derivative>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
call   1030 <fermi_dirac_derivative@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inverted_fermi_dirac_derivative>:
movaps %xmm0,%xmm3
movaps %xmm1,%xmm0
movaps %xmm3,%xmm1
jmp    1030 <fermi_dirac_derivative@plt>

LLVM IR (-O0):
define double @inverted_fermi_dirac_derivative(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %5
%8 = load double, double* %4
%9 = load double, double* %6
%10 = call double @fermi_dirac_derivative(double %7, double %8, double %9)
ret double %10
}

LLVM IR (-O2):
define double @inverted_fermi_dirac_derivative(double %0, double %1, double %2) {
%4 = tail call double @fermi_dirac_derivative(double %1, double %0, double %2)
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ test_remove_after_last();
int /*<<< orphan*/ test_remove_last();
void test_remove_after() {
  test_remove_after_last();
  test_remove_last();
}


x86 assembly (clang, -O0):
<test_remove_after>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <test_remove_after_last@plt>
mov    $0x0,%al
call   1040 <test_remove_last@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_remove_after>:
push   %rax
xor    %eax,%eax
call   1030 <test_remove_after_last@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <test_remove_last@plt>

LLVM IR (-O0):
define void @test_remove_after() {
%1 = call i32 (...) @test_remove_after_last()
%2 = call i32 (...) @test_remove_last()
ret void
}

LLVM IR (-O2):
define void @test_remove_after() {
%1 = tail call i32 (...) @test_remove_after_last()
%2 = tail call i32 (...) @test_remove_last()
ret void
}
void GC_set_max_heap_size(unsigned int sz) { return; }


x86 assembly (clang, -O0):
<GC_set_max_heap_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GC_set_max_heap_size>:
ret

LLVM IR (-O0):
define void @GC_set_max_heap_size(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @GC_set_max_heap_size(i32 %0) {
ret void
}
int ExtractB12(unsigned char *buf) {
  int x;
  x = buf[0];
  x <<= 8;
  x |= buf[1] & 0x4;
  return x;
}


x86 assembly (clang, -O0):
<ExtractB12>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x1(%rax),%eax
and    $0x4,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ExtractB12>:
movzbl (%rdi),%ecx
shl    $0x8,%ecx
movzbl 0x1(%rdi),%eax
and    $0x4,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ExtractB12(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = shl i32 %8, 8
store i32 %9, i32* %3
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = and i32 %13, 4
%15 = load i32, i32* %3
%16 = or i32 %15, %14
store i32 %16, i32* %3
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @ExtractB12(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = and i8 %6, 4
%8 = zext i8 %7 to i32
%9 = or i32 %4, %8
ret i32 %9
}
/* Variables and functions */
int inportb(int);
int /*<<< orphan*/ outportb(int, int);
void tone_off() { outportb(0x61, inportb(0x61) & ~0x03); }


x86 assembly (clang, -O0):
<tone_off>:
push   %rbp
mov    %rsp,%rbp
mov    $0x61,%edi
call   1030 <inportb@plt>
mov    %eax,%esi
and    $0xfffffffc,%esi
mov    $0x61,%edi
call   1040 <outportb@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tone_off>:
push   %rax
mov    $0x61,%edi
call   1030 <inportb@plt>
and    $0xfffffffc,%eax
mov    $0x61,%edi
mov    %eax,%esi
pop    %rax
jmp    1040 <outportb@plt>

LLVM IR (-O0):
define void @tone_off() {
%1 = call i32 @inportb(i32 97)
%2 = and i32 %1, -4
%3 = call i32 @outportb(i32 97, i32 %2)
ret void
}

LLVM IR (-O2):
define void @tone_off() {
%1 = tail call i32 @inportb(i32 97)
%2 = and i32 %1, -4
%3 = tail call i32 @outportb(i32 97, i32 %2)
ret void
}
int bitcount(unsigned x) {
  int i;
  for (i = 0; x; i++, x &= (x - 1))
    ;
  return i;
}


x86 assembly (clang, -O0):
<bitcount>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1137 <bitcount+0x37>
jmp    111d <bitcount+0x1d>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
and    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    110e <bitcount+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitcount>:
xor    %eax,%eax
test   %edi,%edi
je     111c <bitcount+0x1c>
cs nopw 0x0(%rax,%rax,1)
add    $0x1,%eax
lea    -0x1(%rdi),%ecx
and    %edi,%ecx
mov    %ecx,%edi
jne    1110 <bitcount+0x10>
ret

LLVM IR (-O0):
define i32 @bitcount(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %4
br label %8
8: ; preds = %7
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
%11 = load i32, i32* %2
%12 = sub i32 %11, 1
%13 = load i32, i32* %2
%14 = and i32 %13, %12
store i32 %14, i32* %2
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @bitcount(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = add nuw nsw i32 %4, 1
%7 = add i32 %5, -1
%8 = and i32 %7, %5
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ green(char *);
void stop_motor() { green("Stop Stepper\n"); }


x86 assembly (clang, -O0):
<stop_motor>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <green@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<stop_motor>:
lea    0xee9(%rip),%rdi
jmp    1030 <green@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"Stop Stepper\0A\00"
define void @stop_motor() {
%1 = call i32 @green(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"Stop Stepper\0A\00"
define void @stop_motor() {
%1 = tail call i32 @green(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(char const *, char *);
bool is_vdso_map(const char *filename) { return !strcmp(filename, "[vdso]"); }


x86 assembly (clang, -O0):
<is_vdso_map>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_vdso_map>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"[vdso]\00"
define i32 @is_vdso_map(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strcmp(i8* %3, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
@.str = [7 x i8] c"[vdso]\00"
define i32 @is_vdso_map(i8* nocapture %0) {
%2 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(7) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
char *getenv(char const *);
scalar_t__ strtoul(char *, int /*<<< orphan*/ *, int);
unsigned int read_config_uint(const char *key, unsigned int default_value) {
  char *tmp_str;
  unsigned int ret;
  tmp_str = getenv(key);
  if (tmp_str) {
    ret = (unsigned int)strtoul(tmp_str, NULL, 10);
  } else {
    ret = default_value;
  }
  return ret;
}


x86 assembly (clang, -O0):
<read_config_uint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getenv@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1161 <read_config_uint+0x41>
mov    -0x18(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
mov    $0xa,%edx
call   1040 <strtoul@plt>
mov    %eax,-0x1c(%rbp)
jmp    1167 <read_config_uint+0x47>
mov    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_config_uint>:
push   %rbx
mov    %esi,%ebx
call   1030 <getenv@plt>
test   %rax,%rax
je     113f <read_config_uint+0x1f>
mov    %rax,%rdi
xor    %esi,%esi
mov    $0xa,%edx
call   1040 <strtoul@plt>
mov    %rax,%rbx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @read_config_uint(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i8*, i8** %3
%8 = call i8* @getenv(i8* %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i8*, i8** %5
%13 = call i64 @strtoul(i8* %12, i32* null, i32 10)
%14 = trunc i64 %13 to i32
store i32 %14, i32* %6
br label %17
15: ; preds = %2
%16 = load i32, i32* %4
store i32 %16, i32* %6
br label %17
17: ; preds = %15, %11
%18 = load i32, i32* %6
ret i32 %18
}

LLVM IR (-O2):
define i32 @read_config_uint(i8* nocapture %0, i32 %1) {
%3 = tail call i8* @getenv(i8* %0)
%4 = icmp eq i8* %3, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i64 @strtoul(i8* nocapture %3, i32* null, i32 10)
%7 = trunc i64 %6 to i32
br label %8
8: ; preds = %2, %5
%9 = phi i32 [ %7, %5 ], [ %1, %2 ]
ret i32 %9
}
/* Variables and functions */
scalar_t__ ignpoi(double);
int sample_Poi(double mu) { return (int)ignpoi(mu); }


x86 assembly (clang, -O0):
<sample_Poi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <ignpoi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sample_Poi>:
jmp    1030 <ignpoi@plt>

LLVM IR (-O0):
define i32 @sample_Poi(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i64 @ignpoi(double %3)
%5 = trunc i64 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @sample_Poi(double %0) {
%2 = tail call i64 @ignpoi(double %0)
%3 = trunc i64 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ system(char *);
int main() {
  printf("shutdown now...：\n");
  system("su -c 'reboot -p'");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1040 <printf@plt>
lea    0xed2(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeea(%rip),%rdi
call   1030 <puts@plt>
lea    0xecc(%rip),%rdi
call   1040 <system@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"shutdown now...\EF\BC\9A\0A\00"
@.str.1 = [18 x i8] c"su -c 'reboot -p'\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @system(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [18 x i8] c"su -c 'reboot -p'\00"
@str = [19 x i8] c"shutdown now...\EF\BC\9A\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @system(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
int count_star(char *share_file_info) {
  char *p;
  int count = 0;
  p = share_file_info;
  while (*p != '\0') {
    if (*p == '*')
      count++;
    p++;
  }
  return count;
}


x86 assembly (clang, -O0):
<count_star>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1151 <count_star+0x51>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2a,%eax
jne    1140 <count_star+0x40>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1117 <count_star+0x17>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_star>:
xor    %eax,%eax
jmp    1117 <count_star+0x17>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
add    $0x1,%eax
add    $0x1,%rdi
movzbl (%rdi),%ecx
cmp    $0x2a,%cl
je     1110 <count_star+0x10>
test   %cl,%cl
jne    1113 <count_star+0x13>
ret

LLVM IR (-O0):
define i32 @count_star(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %4
%5 = load i8*, i8** %2
store i8* %5, i8** %3
br label %6
6: ; preds = %19, %1
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %22
11: ; preds = %6
%12 = load i8*, i8** %3
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = icmp eq i32 %14, 42
br i1 %15, label %16, label %19
16: ; preds = %11
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 1
store i32 %18, i32* %4
br label %19
19: ; preds = %16, %11
%20 = load i8*, i8** %3
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %3
br label %6
22: ; preds = %6
%23 = load i32, i32* %4
ret i32 %23
}

LLVM IR (-O2):
define i32 @count_star(i8* nocapture %0) {
br label %2
2: ; preds = %8, %1
%3 = phi i8* [ %0, %1 ], [ %10, %8 ]
%4 = phi i32 [ 0, %1 ], [ %9, %8 ]
%5 = load i8, i8* %3
switch i8 %5, label %8 [
i8 0, label %11
i8 42, label %6
]
6: ; preds = %2
%7 = add nsw i32 %4, 1
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ %7, %6 ], [ %4, %2 ]
%10 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
11: ; preds = %2
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ tmpbuf;

/* Variables and functions */
int /*<<< orphan*/ jsonq(char const *, char const *, char *, int);
int /*<<< orphan*/ sscanf(char *, char *, long long *);
long long jsonq_int(const char *s, const char *name) {
  char tmpbuf[256];
  long long v = 0;
  jsonq(s, name, tmpbuf, sizeof(tmpbuf));
  sscanf(tmpbuf, "%lld", &v);
  return v;
}


x86 assembly (clang, -O0):
<jsonq_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x120,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x118(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x110(%rbp),%rdx
mov    $0x100,%ecx
call   1030 <jsonq@plt>
lea    -0x110(%rbp),%rdi
lea    0xe9b(%rip),%rsi
lea    -0x118(%rbp),%rdx
call   1040 <sscanf@plt>
mov    -0x118(%rbp),%rax
add    $0x120,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jsonq_int>:
push   %rbx
sub    $0x110,%rsp
movq   $0x0,0x8(%rsp)
lea    0x10(%rsp),%rbx
mov    %rbx,%rdx
mov    $0x100,%ecx
call   1030 <jsonq@plt>
lea    0xeb6(%rip),%rsi
lea    0x8(%rsp),%rdx
mov    %rbx,%rdi
call   1040 <sscanf@plt>
mov    0x8(%rsp),%rax
add    $0x110,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%lld\00"
define i64 @jsonq_int(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca [256 x i8]
%6 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
store i64 0, i64* %6
%7 = load i8*, i8** %3
%8 = load i8*, i8** %4
%9 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%10 = call i32 @jsonq(i8* %7, i8* %8, i8* %9, i32 256)
%11 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%12 = call i32 @sscanf(i8* %11, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64* %6)
%13 = load i64, i64* %6
ret i64 %13
}

LLVM IR (-O2):
@.str = [5 x i8] c"%lld\00"
define i64 @jsonq_int(i8* %0, i8* %1) {
%3 = alloca [256 x i8]
%4 = alloca i64
%5 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%6 = bitcast i64* %4 to i8*
store i64 0, i64* %4
%7 = call i32 @jsonq(i8* %0, i8* %1, i8* %5, i32 256)
%8 = call i32 @sscanf(i8* %5, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64* %4)
%9 = load i64, i64* %4
ret i64 %9
}
/* Type definitions */
typedef int uint8_t;
typedef int const uint32_t;

/* Variables and functions */
uint32_t read32_be(const uint8_t buf[4]) {
  return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | (buf[3]);
}


x86 assembly (clang, -O0):
<read32_be>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
mov    0x4(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
or     0xc(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read32_be>:
mov    (%rdi),%eax
mov    0x4(%rdi),%ecx
shl    $0x18,%eax
shl    $0x10,%ecx
or     %eax,%ecx
mov    0x8(%rdi),%eax
shl    $0x8,%eax
or     %ecx,%eax
or     0xc(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @read32_be(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = shl i32 %5, 24
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = shl i32 %9, 16
%11 = or i32 %6, %10
%12 = load i32*, i32** %2
%13 = getelementptr inbounds i32, i32* %12, i64 2
%14 = load i32, i32* %13
%15 = shl i32 %14, 8
%16 = or i32 %11, %15
%17 = load i32*, i32** %2
%18 = getelementptr inbounds i32, i32* %17, i64 3
%19 = load i32, i32* %18
%20 = or i32 %16, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @read32_be(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 24
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = shl i32 %5, 16
%7 = or i32 %6, %3
%8 = getelementptr inbounds i32, i32* %0, i64 2
%9 = load i32, i32* %8
%10 = shl i32 %9, 8
%11 = or i32 %7, %10
%12 = getelementptr inbounds i32, i32* %0, i64 3
%13 = load i32, i32* %12
%14 = or i32 %11, %13
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void version(void) {
  fputs("FLASH "
        "v1.2.11/lo"
        "\n"
        "Copyright (C) 2012 Tanja Magoc\n"
        "Copyright (C) 2012, 2013, 2014 Eric Biggers\n"
        "License GPLv3+; GNU GPL version 3 or later "
        "<http://gnu.org/licenses/gpl.html>.\n"
        "This is free software: you are free to change and redistribute it.\n"
        "There is NO WARRANTY, to the extent permitted by law.\n"
        "\n"
        "Report bugs to flash.comment@gmail.com or "
        "https://sourceforge.net/p/flashpage/bugs\n",
        stdout);
}


x86 assembly (clang, -O0):
<version>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <fputs@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<version>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
lea    0xee0(%rip),%rdi
jmp    1030 <fputs@plt>

LLVM IR (-O0):
@.str = [377 x i8] c"FLASH v1.2.11/lo\0ACopyright (C) 2012 Tanja Magoc\0ACopyright (C) 2012, 2013, 2014 Eric Biggers\0ALicense GPLv3+; GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>.\0AThis is free software: you are free to change and redistribute it.\0AThere is NO WARRANTY, to the extent permitted by law.\0A\0AReport bugs to flash.comment@gmail.com or https://sourceforge.net/p/flashpage/bugs\0A\00"
@stdout = global i32 0
define void @version() {
%1 = load i32, i32* @stdout
%2 = call i32 @fputs(i8* getelementptr inbounds ([377 x i8], [377 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [377 x i8] c"FLASH v1.2.11/lo\0ACopyright (C) 2012 Tanja Magoc\0ACopyright (C) 2012, 2013, 2014 Eric Biggers\0ALicense GPLv3+; GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>.\0AThis is free software: you are free to change and redistribute it.\0AThere is NO WARRANTY, to the extent permitted by law.\0A\0AReport bugs to flash.comment@gmail.com or https://sourceforge.net/p/flashpage/bugs\0A\00"
@stdout = global i32 0
define void @version() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([377 x i8], [377 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
extern unsigned long readl(unsigned long addr) {
  return *(volatile int *)(addr + ((0xfffffc0000000000UL) + 0x300000000UL));
}


x86 assembly (clang, -O0):
<readl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movabs $0xfffffc0300000000,%rax
fc ff ff
add    -0x8(%rbp),%rax
mov    (%rax),%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<readl>:
movabs $0xfffffc0300000000,%rax
fc ff ff
movslq (%rdi,%rax,1),%rax
ret

LLVM IR (-O0):
define i64 @readl(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, -4385161609216
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = sext i32 %6 to i64
ret i64 %7
}

LLVM IR (-O2):
define i64 @readl(i64 %0) {
%2 = add i64 %0, -4385161609216
%3 = inttoptr i64 %2 to i32*
%4 = load volatile i32, i32* %3
%5 = sext i32 %4 to i64
ret i64 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ SYS_mprotect;
scalar_t__ remote_syscall(int /*<<< orphan*/, int /*<<< orphan*/,
                          int /*<<< orphan*/, int /*<<< orphan*/,
                          int /*<<< orphan*/, int /*<<< orphan*/,
                          int /*<<< orphan*/, int /*<<< orphan*/);
void *remote_mprotect(pid_t pid, void *addr, size_t len, int prot) {
  return (void *)remote_syscall(pid, SYS_mprotect, (uint64_t)addr,
                                (uint64_t)len, (uint64_t)prot, (uint64_t)NULL,
                                (uint64_t)NULL, (uint64_t)NULL);
}


x86 assembly (clang, -O0):
<remote_mprotect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rax
mov    %eax,%edx
mov    -0x18(%rbp),%rax
mov    %eax,%ecx
mov    -0x1c(%rbp),%r8d
xor    %r9d,%r9d
movl   $0x0,(%rsp)
movl   $0x0,0x8(%rsp)
call   1030 <remote_syscall@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remote_mprotect>:
push   %rax
mov    %ecx,%r8d
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    0x2ecf(%rip),%rax
mov    (%rax),%esi
xor    %r9d,%r9d
push   $0x0
push   $0x0
call   1030 <remote_syscall@plt>
add    $0x10,%rsp
pop    %rcx
ret

LLVM IR (-O0):
@SYS_mprotect = global i32 0
define i8* @remote_mprotect(i32 %0, i8* %1, i64 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* @SYS_mprotect
%11 = load i8*, i8** %6
%12 = ptrtoint i8* %11 to i32
%13 = load i64, i64* %7
%14 = trunc i64 %13 to i32
%15 = load i32, i32* %8
%16 = call i64 @remote_syscall(i32 %9, i32 %10, i32 %12, i32 %14, i32 %15, i32 0, i32 0, i32 0)
%17 = inttoptr i64 %16 to i8*
ret i8* %17
}

LLVM IR (-O2):
@SYS_mprotect = global i32 0
define i8* @remote_mprotect(i32 %0, i8* %1, i64 %2, i32 %3) {
%5 = load i32, i32* @SYS_mprotect
%6 = ptrtoint i8* %1 to i64
%7 = trunc i64 %6 to i32
%8 = trunc i64 %2 to i32
%9 = tail call i64 @remote_syscall(i32 %0, i32 %5, i32 %7, i32 %8, i32 %3, i32 0, i32 0, i32 0)
%10 = inttoptr i64 %9 to i8*
ret i8* %10
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, unsigned int);
void fprint_hex(FILE *fp, const unsigned char *s, const int len) {
  for (int i = 0; i < len; i++) {
    fprintf(fp, "%02X", (unsigned int)s[i]);
  }
}


x86 assembly (clang, -O0):
<fprint_hex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1160 <fprint_hex+0x50>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
movzbl (%rax,%rcx,1),%edx
lea    0xeb3(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    112a <fprint_hex+0x1a>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fprint_hex>:
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
test   %edx,%edx
jle    1149 <fprint_hex+0x39>
mov    %rsi,%r14
mov    %rdi,%r12
mov    %edx,%r13d
xor    %ebx,%ebx
lea    0xed1(%rip),%r15
nop
movzbl (%r14,%rbx,1),%edx
mov    %r12,%rdi
mov    %r15,%rsi
call   1030 <fprintf@plt>
add    $0x1,%rbx
cmp    %rbx,%r13
jne    1130 <fprint_hex+0x20>
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%02X\00"
define void @fprint_hex(i32* %0, i8* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %21, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %24
12: ; preds = %8
%13 = load i32*, i32** %4
%14 = load i8*, i8** %5
%15 = load i32, i32* %7
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = zext i8 %18 to i32
%20 = call i32 @fprintf(i32* %13, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %19)
br label %21
21: ; preds = %12
%22 = load i32, i32* %7
%23 = add nsw i32 %22, 1
store i32 %23, i32* %7
br label %8
24: ; preds = %8
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%02X\00"
define void @fprint_hex(i32* nocapture %0, i8* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %8
7: ; preds = %8, %3
ret void
8: ; preds = %5, %8
%9 = phi i64 [ 0, %5 ], [ %14, %8 ]
%10 = getelementptr inbounds i8, i8* %1, i64 %9
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %12)
%14 = add nuw nsw i64 %9, 1
%15 = icmp eq i64 %14, %6
br i1 %15, label %7, label %8
}
/* Variables and functions */
void Reserved_Handler25(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<Reserved_Handler25>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <Reserved_Handler25+0x9>
jmp    1109 <Reserved_Handler25+0x9>

x86 assembly (clang, -O2):
<Reserved_Handler25>:
jmp    1100 <Reserved_Handler25>

LLVM IR (-O0):
define void @Reserved_Handler25() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @Reserved_Handler25() {
br label %1
1: ; preds = %0, %1
br label %1
}
int mt_lbprof_disable(void) {}


x86 assembly (clang, -O0):
<mt_lbprof_disable>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mt_lbprof_disable>:
ret

LLVM IR (-O0):
define i32 @mt_lbprof_disable() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @mt_lbprof_disable() {
ret i32 undef
}
/* Variables and functions */
scalar_t__ isdigit(char);
int /*<<< orphan*/ printf(char *, char, char *);
main() {
  char ch = '0';
  printf("%c is%s a digit \n", ch, isdigit(ch) ? "" : " not");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x30,-0x1(%rbp)
mov    -0x1(%rbp),%al
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <isdigit@plt>
mov    %rax,%rsi
mov    -0x2(%rbp),%al
lea    0xeca(%rip),%rdx
lea    0xec2(%rip),%rcx
cmp    $0x0,%rsi
cmovne %rcx,%rdx
lea    0xea2(%rip),%rdi
movsbl %al,%esi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x30,%edi
call   1030 <isdigit@plt>
test   %rax,%rax
lea    0xedd(%rip),%rax
lea    0xed5(%rip),%rdx
cmove  %rax,%rdx
lea    0xeb9(%rip),%rdi
mov    $0x30,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"%c is%s a digit \0A\00"
@.str.1 = [1 x i8] zeroinitializer
@.str.2 = [5 x i8] c" not\00"
define i32 @main() {
%1 = alloca i8
store i8 48, i8* %1
%2 = load i8, i8* %1
%3 = load i8, i8* %1
%4 = call i64 @isdigit(i8 signext %3)
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0)
%8 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8 signext %2, i8* %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [18 x i8] c"%c is%s a digit \0A\00"
@.str.1 = [1 x i8] zeroinitializer
@.str.2 = [5 x i8] c" not\00"
define i32 @main() {
%1 = tail call i64 @isdigit(i8 signext 48)
%2 = icmp eq i64 %1, 0
%3 = select i1 %2, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8 signext 48, i8* %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ SYS_gettid;
int syscall(int /*<<< orphan*/);
int get_thread_id() { return syscall(SYS_gettid); }


x86 assembly (clang, -O0):
<get_thread_id>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <syscall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_thread_id>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@SYS_gettid = global i32 0
define i32 @get_thread_id() {
%1 = load i32, i32* @SYS_gettid
%2 = call i32 @syscall(i32 %1)
ret i32 %2
}

LLVM IR (-O2):
@SYS_gettid = global i32 0
define i32 @get_thread_id() {
%1 = load i32, i32* @SYS_gettid
%2 = tail call i32 @syscall(i32 %1)
ret i32 %2
}
float degrees(float radians) {
  return radians * (180.0f / 3.14159265358979323846f);
}


x86 assembly (clang, -O0):
<degrees>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<degrees>:
mulss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @degrees(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float %3, 0x404CA5DC00000000
ret float %4
}

LLVM IR (-O2):
define float @degrees(float %0) {
%2 = fmul float %0, 0x404CA5DC00000000
ret float %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ internal_fiat_p256_divstep_precomp(uintptr_t);
void fiat_p256_divstep_precomp(uint64_t out1[4]) {
  internal_fiat_p256_divstep_precomp((uintptr_t)out1);
}


x86 assembly (clang, -O0):
<fiat_p256_divstep_precomp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <internal_fiat_p256_divstep_precomp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiat_p256_divstep_precomp>:
jmp    1030 <internal_fiat_p256_divstep_precomp@plt>

LLVM IR (-O0):
define void @fiat_p256_divstep_precomp(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = ptrtoint i32* %3 to i64
%5 = call i32 @internal_fiat_p256_divstep_precomp(i64 %4)
ret void
}

LLVM IR (-O2):
define void @fiat_p256_divstep_precomp(i32* %0) {
%2 = ptrtoint i32* %0 to i64
%3 = tail call i32 @internal_fiat_p256_divstep_precomp(i64 %2)
ret void
}