xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
uint8_t *display_get_buffer(void) { return NULL; }


x86 assembly (clang, -O0):
<display_get_buffer>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_get_buffer>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32* @display_get_buffer() {
ret i32* null
}

LLVM IR (-O2):
define noalias i32* @display_get_buffer() {
ret i32* null
}
/* Variables and functions */
int gob_encode_double(char *, size_t, double);
int gob_encode_float(char *buf, size_t buf_size, float v) {
  return gob_encode_double(buf, buf_size, (double)v);
}


x86 assembly (clang, -O0):
<gob_encode_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movss  -0x14(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
call   1030 <gob_encode_double@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gob_encode_float>:
cvtss2sd %xmm0,%xmm0
jmp    1030 <gob_encode_double@plt>

LLVM IR (-O0):
define i32 @gob_encode_float(i8* %0, i64 %1, float %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca float
store i8* %0, i8** %4
store i64 %1, i64* %5
store float %2, float* %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load float, float* %6
%10 = fpext float %9 to double
%11 = call i32 @gob_encode_double(i8* %7, i64 %8, double %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @gob_encode_float(i8* %0, i64 %1, float %2) {
%4 = fpext float %2 to double
%5 = tail call i32 @gob_encode_double(i8* %0, i64 %1, double %4)
ret i32 %5
}
/* Type definitions */
typedef unsigned long uint16_t;

/* Variables and functions */
scalar_t__ add_csum_hword(unsigned long const *, int);
uint16_t build_ip_csum(const uint16_t *start, int num_u16, unsigned long sum) {
  sum += add_csum_hword(start, num_u16);
  while (sum >> 16)
    sum = (sum & 0xffff) + (sum >> 16);
  return ~sum;
}


x86 assembly (clang, -O0):
<build_ip_csum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <add_csum_hword@plt>
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
shr    $0x10,%rax
cmp    $0x0,%rax
je     1167 <build_ip_csum+0x57>
mov    -0x18(%rbp),%rax
and    $0xffff,%rax
mov    -0x18(%rbp),%rcx
shr    $0x10,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
jmp    1137 <build_ip_csum+0x27>
mov    -0x18(%rbp),%rax
xor    $0xffffffffffffffff,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<build_ip_csum>:
push   %rbx
mov    %rdx,%rbx
call   1030 <add_csum_hword@plt>
add    %rbx,%rax
cmp    $0x10000,%rax
jb     1145 <build_ip_csum+0x35>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rax,%rcx
shr    $0x10,%rcx
movzwl %ax,%eax
add    %rcx,%rax
cmp    $0xffff,%rax
ja     1130 <build_ip_csum+0x20>
not    %rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @build_ip_csum(i64* %0, i32 %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i32
%6 = alloca i64
store i64* %0, i64** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%7 = load i64*, i64** %4
%8 = load i32, i32* %5
%9 = call i64 @add_csum_hword(i64* %7, i32 %8)
%10 = load i64, i64* %6
%11 = add i64 %10, %9
store i64 %11, i64* %6
br label %12
12: ; preds = %16, %3
%13 = load i64, i64* %6
%14 = lshr i64 %13, 16
%15 = icmp ne i64 %14, 0
br i1 %15, label %16, label %22
16: ; preds = %12
%17 = load i64, i64* %6
%18 = and i64 %17, 65535
%19 = load i64, i64* %6
%20 = lshr i64 %19, 16
%21 = add i64 %18, %20
store i64 %21, i64* %6
br label %12
22: ; preds = %12
%23 = load i64, i64* %6
%24 = xor i64 %23, -1
ret i64 %24
}

LLVM IR (-O2):
define i64 @build_ip_csum(i64* %0, i32 %1, i64 %2) {
%4 = tail call i64 @add_csum_hword(i64* %0, i32 %1)
%5 = add i64 %4, %2
%6 = icmp ult i64 %5, 65536
br i1 %6, label %13, label %7
7: ; preds = %3, %7
%8 = phi i64 [ %11, %7 ], [ %5, %3 ]
%9 = lshr i64 %8, 16
%10 = and i64 %8, 65535
%11 = add nuw nsw i64 %10, %9
%12 = icmp ult i64 %11, 65536
br i1 %12, label %13, label %7
13: ; preds = %7, %3
%14 = phi i64 [ %5, %3 ], [ %11, %7 ]
%15 = xor i64 %14, -1
ret i64 %15
}
/* Variables and functions */
scalar_t__ islower(int);
scalar_t__ isupper(int);
int isalpha(int c) { return isupper(c) || islower(c) ? 1 : 0; }


x86 assembly (clang, -O0):
<isalpha>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <isupper@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1157 <isalpha+0x37>
mov    -0x4(%rbp),%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%dl
xor    %eax,%eax
mov    $0x1,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isalpha>:
push   %rbx
mov    %edi,%ebx
call   1040 <isupper@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <isalpha+0x17>
pop    %rbx
ret
mov    %ebx,%edi
call   1030 <islower@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isalpha(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @isupper(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i64 @islower(i32 %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i64
%13 = select i1 %11, i32 1, i32 0
ret i32 %13
}

LLVM IR (-O2):
define i32 @isalpha(i32 %0) {
%2 = tail call i64 @isupper(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @islower(i32 %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
int UpperTriangIndex(int i, int j, int size) {
  if (i < j)
    return (2 * size - i - 3) * i / 2 + j - 1;
  else
    return (2 * size - j - 3) * j / 2 + i - 1;
}


x86 assembly (clang, -O0):
<UpperTriangIndex>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    113f <UpperTriangIndex+0x3f>
mov    -0x10(%rbp),%eax
shl    $0x1,%eax
sub    -0x8(%rbp),%eax
sub    $0x3,%eax
imul   -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
add    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1160 <UpperTriangIndex+0x60>
mov    -0x10(%rbp),%eax
shl    $0x1,%eax
sub    -0xc(%rbp),%eax
sub    $0x3,%eax
imul   -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
add    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<UpperTriangIndex>:
add    %edx,%edx
cmp    %esi,%edi
mov    %esi,%eax
cmovl  %edi,%eax
cmovl  %esi,%edi
sub    %eax,%edx
add    $0xfffffffd,%edx
imul   %eax,%edx
mov    %edx,%eax
shr    $0x1f,%eax
add    %edx,%eax
sar    %eax
add    %edi,%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @UpperTriangIndex(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %23
11: ; preds = %3
%12 = load i32, i32* %7
%13 = mul nsw i32 2, %12
%14 = load i32, i32* %5
%15 = sub nsw i32 %13, %14
%16 = sub nsw i32 %15, 3
%17 = load i32, i32* %5
%18 = mul nsw i32 %16, %17
%19 = sdiv i32 %18, 2
%20 = load i32, i32* %6
%21 = add nsw i32 %19, %20
%22 = sub nsw i32 %21, 1
store i32 %22, i32* %4
br label %35
23: ; preds = %3
%24 = load i32, i32* %7
%25 = mul nsw i32 2, %24
%26 = load i32, i32* %6
%27 = sub nsw i32 %25, %26
%28 = sub nsw i32 %27, 3
%29 = load i32, i32* %6
%30 = mul nsw i32 %28, %29
%31 = sdiv i32 %30, 2
%32 = load i32, i32* %5
%33 = add nsw i32 %31, %32
%34 = sub nsw i32 %33, 1
store i32 %34, i32* %4
br label %35
35: ; preds = %23, %11
%36 = load i32, i32* %4
ret i32 %36
}

LLVM IR (-O2):
define i32 @UpperTriangIndex(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, %1
%5 = shl nsw i32 %2, 1
%6 = select i1 %4, i32 %0, i32 %1
%7 = select i1 %4, i32 %1, i32 %0
%8 = sub i32 -3, %6
%9 = add i32 %8, %5
%10 = mul nsw i32 %9, %6
%11 = sdiv i32 %10, 2
%12 = add nsw i32 %11, %7
%13 = add nsw i32 %12, -1
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
scalar_t__ fib(int);
int /*<<< orphan*/ printf(char *, long long);
int main(int argc, char **argv) {
  int i;
  long long r = 0;
  for (i = 0; i < 4; i++) {
    r += fib(42);
  }
  printf("%lld\n", r);
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x20(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x4,-0x14(%rbp)
jge    117f <main+0x4f>
mov    $0x2a,%edi
call   1040 <fib@plt>
add    -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1155 <main+0x25>
mov    -0x20(%rbp),%rsi
lea    0xe76(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x2a,%edi
call   1040 <fib@plt>
mov    %rax,%rbx
mov    $0x2a,%edi
call   1040 <fib@plt>
add    %rax,%rbx
mov    $0x2a,%edi
call   1040 <fib@plt>
add    %rax,%rbx
mov    $0x2a,%edi
call   1040 <fib@plt>
add    %rax,%rbx
lea    0xe94(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"%lld\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i64
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i64 0, i64* %7
store i32 0, i32* %6
br label %8
8: ; preds = %15, %2
%9 = load i32, i32* %6
%10 = icmp slt i32 %9, 4
br i1 %10, label %11, label %18
11: ; preds = %8
%12 = call i64 @fib(i32 42)
%13 = load i64, i64* %7
%14 = add nsw i64 %13, %12
store i64 %14, i64* %7
br label %15
15: ; preds = %11
%16 = load i32, i32* %6
%17 = add nsw i32 %16, 1
store i32 %17, i32* %6
br label %8
18: ; preds = %8
%19 = load i64, i64* %7
%20 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i64 %19)
%21 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [6 x i8] c"%lld\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 @fib(i32 42)
%4 = tail call i64 @fib(i32 42)
%5 = add nsw i64 %4, %3
%6 = tail call i64 @fib(i32 42)
%7 = add nsw i64 %6, %5
%8 = tail call i64 @fib(i32 42)
%9 = add nsw i64 %8, %7
%10 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i64 %9)
%11 = tail call i32 @exit(i32 0)
unreachable
}
void flushall() {}


x86 assembly (clang, -O0):
<flushall>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flushall>:
ret

LLVM IR (-O0):
define void @flushall() {
ret void
}

LLVM IR (-O2):
define void @flushall() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cio_write(int, int);
void j2k_write_soc() { cio_write(0xff4f, 2); }


x86 assembly (clang, -O0):
<j2k_write_soc>:
push   %rbp
mov    %rsp,%rbp
mov    $0xff4f,%edi
mov    $0x2,%esi
call   1030 <cio_write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<j2k_write_soc>:
mov    $0xff4f,%edi
mov    $0x2,%esi
jmp    1030 <cio_write@plt>

LLVM IR (-O0):
define void @j2k_write_soc() {
%1 = call i32 @cio_write(i32 65359, i32 2)
ret void
}

LLVM IR (-O2):
define void @j2k_write_soc() {
%1 = tail call i32 @cio_write(i32 65359, i32 2)
ret void
}
const char *default_file_raw() {
  static const char *filename = "/dev/snd/midiC0D0";
  return (filename);
}


x86 assembly (clang, -O0):
<default_file_raw>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f15(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_file_raw>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@default_file_raw.filename = internal global i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i32 0, i32 0)
@.str = [18 x i8] c"/dev/snd/midiC0D0\00"
define i8* @default_file_raw() {
%1 = load i8*, i8** @default_file_raw.filename
ret i8* %1
}

LLVM IR (-O2):
@.str = [18 x i8] c"/dev/snd/midiC0D0\00"
define i8* @default_file_raw() {
ret i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef scalar_t__ uint64_t;
struct timespec {
  int dummy;
};

/* Variables and functions */
scalar_t__ timespec_to_nsec(struct timespec const *);
uint64_t timespec_delta_nsec(const struct timespec *before_ts,
                             const struct timespec *after_ts) {
  uint64_t before;
  uint64_t after;
  before = timespec_to_nsec(before_ts);
  after = timespec_to_nsec(after_ts);
  return after - before;
}


x86 assembly (clang, -O0):
<timespec_delta_nsec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <timespec_to_nsec@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <timespec_to_nsec@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
sub    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timespec_delta_nsec>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
call   1030 <timespec_to_nsec@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1030 <timespec_to_nsec@plt>
sub    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
define i64 @timespec_delta_nsec(%struct.timespec* %0, %struct.timespec* %1) {
%3 = alloca %struct.timespec*
%4 = alloca %struct.timespec*
%5 = alloca i64
%6 = alloca i64
store %struct.timespec* %0, %struct.timespec** %3
store %struct.timespec* %1, %struct.timespec** %4
%7 = load %struct.timespec*, %struct.timespec** %3
%8 = call i64 @timespec_to_nsec(%struct.timespec* %7)
store i64 %8, i64* %5
%9 = load %struct.timespec*, %struct.timespec** %4
%10 = call i64 @timespec_to_nsec(%struct.timespec* %9)
store i64 %10, i64* %6
%11 = load i64, i64* %6
%12 = load i64, i64* %5
%13 = sub nsw i64 %11, %12
ret i64 %13
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
define i64 @timespec_delta_nsec(%struct.timespec* %0, %struct.timespec* %1) {
%3 = tail call i64 @timespec_to_nsec(%struct.timespec* %0)
%4 = tail call i64 @timespec_to_nsec(%struct.timespec* %1)
%5 = sub nsw i64 %4, %3
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void aligned_free__(void *ptr) {
  void **p = (void **)ptr;
  free(p[-1]);
}


x86 assembly (clang, -O0):
<aligned_free__>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rax),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aligned_free__>:
mov    -0x8(%rdi),%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @aligned_free__(i8* %0) {
%2 = alloca i8*
%3 = alloca i8**
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i8**
store i8** %5, i8*** %3
%6 = load i8**, i8*** %3
%7 = getelementptr inbounds i8*, i8** %6, i64 -1
%8 = load i8*, i8** %7
%9 = call i32 @free(i8* %8)
ret void
}

LLVM IR (-O2):
define void @aligned_free__(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 -8
%3 = bitcast i8* %2 to i8**
%4 = load i8*, i8** %3
%5 = tail call i32 @free(i8* %4)
ret void
}
int d_eq_mr2(double *a1, double a2) { return !(((*a1) == (a2))); }


x86 assembly (clang, -O0):
<d_eq_mr2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
ucomisd -0x10(%rbp),%xmm0
sete   %al
setnp  %cl
and    %cl,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d_eq_mr2>:
cmpneqsd (%rdi),%xmm0
movq   %xmm0,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @d_eq_mr2(double* %0, double %1) {
%3 = alloca double*
%4 = alloca double
store double* %0, double** %3
store double %1, double* %4
%5 = load double*, double** %3
%6 = load double, double* %5
%7 = load double, double* %4
%8 = fcmp oeq double %6, %7
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @d_eq_mr2(double* nocapture %0, double %1) {
%3 = load double, double* %0
%4 = fcmp une double %3, %1
%5 = zext i1 %4 to i32
ret i32 %5
}
void cam_lam_enable(const int c, const int n) {}


x86 assembly (clang, -O0):
<cam_lam_enable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cam_lam_enable>:
ret

LLVM IR (-O0):
define void @cam_lam_enable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @cam_lam_enable(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
char *addColor(char *, char *);
char *red(char *str) { return addColor("31", str); }


x86 assembly (clang, -O0):
<red>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <addColor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<red>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <addColor@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"31\00"
define i8* @red(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @addColor(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i8* %4
}

LLVM IR (-O2):
@.str = [3 x i8] c"31\00"
define i8* @red(i8* %0) {
%2 = tail call i8* @addColor(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i8* %2
}
void H420ToAR30() {}


x86 assembly (clang, -O0):
<H420ToAR30>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<H420ToAR30>:
ret

LLVM IR (-O0):
define void @H420ToAR30() {
ret void
}

LLVM IR (-O2):
define void @H420ToAR30() {
ret void
}
void gtk_cell_renderer_set_fixed_size() {}


x86 assembly (clang, -O0):
<gtk_cell_renderer_set_fixed_size>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_cell_renderer_set_fixed_size>:
ret

LLVM IR (-O0):
define void @gtk_cell_renderer_set_fixed_size() {
ret void
}

LLVM IR (-O2):
define void @gtk_cell_renderer_set_fixed_size() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ MJCStatic_init();
int /*<<< orphan*/ Main_main();
int main() {
  MJCStatic_init();
  Main_main();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <MJCStatic_init@plt>
mov    $0x0,%al
call   1040 <Main_main@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <MJCStatic_init@plt>
xor    %eax,%eax
call   1040 <Main_main@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @MJCStatic_init()
%3 = call i32 (...) @Main_main()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @MJCStatic_init()
%2 = tail call i32 (...) @Main_main()
ret i32 0
}
int test_imm_CEint64_highword_reg(long long val) {
  return ((val >> 32) & (0xCE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CEint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xce,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CEint64_highword_reg>:
movabs $0xce00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CEint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 206
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_CEint64_highword_reg(i64 %0) {
%2 = and i64 %0, 884763262976
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int h(int c) {
  int a[10];
  for (unsigned int j = 0; j < 10; j++)
    a[j] = j;
  a[0] = a[1] + a[2];
  return a[0];
}


x86 assembly (clang, -O0):
<h>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x34(%rbp)
cmpl   $0xa,-0x34(%rbp)
jae    1130 <h+0x30>
mov    -0x34(%rbp),%ecx
mov    -0x34(%rbp),%eax
mov    %ecx,-0x30(%rbp,%rax,4)
mov    -0x34(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x34(%rbp)
jmp    110e <h+0xe>
mov    -0x2c(%rbp),%eax
add    -0x28(%rbp),%eax
mov    %eax,-0x30(%rbp)
mov    -0x30(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<h>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @h(i32 %0) {
%2 = alloca i32
%3 = alloca [10 x i32]
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
br label %5
5: ; preds = %13, %1
%6 = load i32, i32* %4
%7 = icmp ult i32 %6, 10
br i1 %7, label %8, label %16
8: ; preds = %5
%9 = load i32, i32* %4
%10 = load i32, i32* %4
%11 = zext i32 %10 to i64
%12 = getelementptr inbounds [10 x i32], [10 x i32]* %3, i64 0, i64 %11
store i32 %9, i32* %12
br label %13
13: ; preds = %8
%14 = load i32, i32* %4
%15 = add i32 %14, 1
store i32 %15, i32* %4
br label %5
16: ; preds = %5
%17 = getelementptr inbounds [10 x i32], [10 x i32]* %3, i64 0, i64 1
%18 = load i32, i32* %17
%19 = getelementptr inbounds [10 x i32], [10 x i32]* %3, i64 0, i64 2
%20 = load i32, i32* %19
%21 = add nsw i32 %18, %20
%22 = getelementptr inbounds [10 x i32], [10 x i32]* %3, i64 0, i64 0
store i32 %21, i32* %22
%23 = getelementptr inbounds [10 x i32], [10 x i32]* %3, i64 0, i64 0
%24 = load i32, i32* %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @h(i32 %0) {
ret i32 3
}
/* Variables and functions */
int /*<<< orphan*/ fp_msg(char *);
int fp_noop(void) {
  fp_msg("Input and output files are unchanged.\n");
  return (0);
}


x86 assembly (clang, -O0):
<fp_noop>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <fp_msg@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fp_noop>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <fp_msg@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [39 x i8] c"Input and output files are unchanged.\0A\00"
define i32 @fp_noop() {
%1 = call i32 @fp_msg(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [39 x i8] c"Input and output files are unchanged.\0A\00"
define i32 @fp_noop() {
%1 = tail call i32 @fp_msg(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
extern void shmem_clear_cache_line_inv(void *target) {
  printf("\nOpenSHMEM Analyzer\n");
}


x86 assembly (clang, -O0):
<shmem_clear_cache_line_inv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmem_clear_cache_line_inv>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"\0AOpenSHMEM Analyzer\0A\00"
define void @shmem_clear_cache_line_inv(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [20 x i8] c"\0AOpenSHMEM Analyzer\00"
define void @shmem_clear_cache_line_inv(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ hash(char *);
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int /*<<< orphan*/ scanf(char *, char *);
int main() {
  char word[200];
  scanf("%[^\n]s", word);
  printf("%ld", hash(word));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0xd0,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0xd0(%rbp),%rsi
lea    0xeb0(%rip),%rdi
call   1050 <scanf@plt>
lea    -0xd0(%rbp),%rdi
call   1030 <hash@plt>
mov    %eax,%esi
lea    0xe9d(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0xd0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0xd0,%rsp
lea    0xec1(%rip),%rdi
mov    %rsp,%rbx
mov    %rbx,%rsi
call   1050 <scanf@plt>
mov    %rbx,%rdi
call   1030 <hash@plt>
lea    0xeae(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0xd0,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%[^\0A]s\00"
@.str.1 = [4 x i8] c"%ld\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [200 x i8]
store i32 0, i32* %1
%3 = getelementptr inbounds [200 x i8], [200 x i8]* %2, i64 0, i64 0
%4 = call i32 @scanf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = getelementptr inbounds [200 x i8], [200 x i8]* %2, i64 0, i64 0
%6 = call i32 @hash(i8* %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%[^\0A]s\00"
@.str.1 = [4 x i8] c"%ld\00"
define i32 @main() {
%1 = alloca [200 x i8]
%2 = getelementptr inbounds [200 x i8], [200 x i8]* %1, i64 0, i64 0
%3 = call i32 @scanf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = call i32 @hash(i8* %2)
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ showMenu();
int main(int argc, char *argv[]) {
  showMenu();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <showMenu@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <showMenu@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @showMenu()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @showMenu()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
void *malloc(size_t);
int /*<<< orphan*/ stderr;
void *lanli_malloc(size_t size) {
  void *ret = malloc(size);
  if (!ret) {
    fprintf(stderr, "Allocation failed.\n");
    abort();
  }
  return ret;
}


x86 assembly (clang, -O0):
<lanli_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1170 <lanli_malloc+0x40>
mov    0x2e85(%rip),%rax
mov    (%rax),%edi
lea    0xe9c(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lanli_malloc>:
push   %rax
call   1050 <malloc@plt>
test   %rax,%rax
je     113d <lanli_malloc+0xd>
pop    %rcx
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [20 x i8] c"Allocation failed.\0A\00"
define i8* @lanli_malloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%11 = call i32 (...) @abort()
unreachable
12: ; preds = %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [20 x i8] c"Allocation failed.\0A\00"
define noalias i8* @lanli_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 (...) @abort()
unreachable
8: ; preds = %1
ret i8* %2
}
/* Variables and functions */
unsigned long compress(unsigned long, short);
unsigned long hash_int_constant_raw_info(long value, short num_bits) {
  return compress((unsigned long)value, num_bits);
}


x86 assembly (clang, -O0):
<hash_int_constant_raw_info>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
movswl -0xa(%rbp),%esi
call   1030 <compress@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_int_constant_raw_info>:
jmp    1030 <compress@plt>

LLVM IR (-O0):
define i64 @hash_int_constant_raw_info(i64 %0, i16 signext %1) {
%3 = alloca i64
%4 = alloca i16
store i64 %0, i64* %3
store i16 %1, i16* %4
%5 = load i64, i64* %3
%6 = load i16, i16* %4
%7 = call i64 @compress(i64 %5, i16 signext %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @hash_int_constant_raw_info(i64 %0, i16 signext %1) {
%3 = tail call i64 @compress(i64 %0, i16 signext %1)
ret i64 %3
}
int is_iso8859_1(const char *in) {
  const unsigned char *ip;
  for (ip = (const unsigned char *)in; *ip; ++ip)
    if (*ip < ' ' || (*ip >= 0x7F && *ip <= 0xA0))
      return 0;
  return 1;
}


x86 assembly (clang, -O0):
<is_iso8859_1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     1171 <is_iso8859_1+0x71>
mov    -0x18(%rbp),%rax
movzbl (%rax),%eax
cmp    $0x20,%eax
jl     114f <is_iso8859_1+0x4f>
mov    -0x18(%rbp),%rax
movzbl (%rax),%eax
cmp    $0x7f,%eax
jl     115b <is_iso8859_1+0x5b>
mov    -0x18(%rbp),%rax
movzbl (%rax),%eax
cmp    $0xa0,%eax
jg     115b <is_iso8859_1+0x5b>
movl   $0x0,-0x4(%rbp)
jmp    1178 <is_iso8859_1+0x78>
jmp    1160 <is_iso8859_1+0x60>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1110 <is_iso8859_1+0x10>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_iso8859_1>:
mov    (%rdi),%cl
test   %cl,%cl
je     1128 <is_iso8859_1+0x28>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
cmp    $0x20,%cl
jb     112d <is_iso8859_1+0x2d>
add    $0x81,%cl
cmp    $0x21,%cl
jbe    112d <is_iso8859_1+0x2d>
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <is_iso8859_1+0x10>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_iso8859_1(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
store i8* %5, i8** %4
br label %6
6: ; preds = %27, %1
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %30
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = icmp slt i32 %13, 32
br i1 %14, label %25, label %15
15: ; preds = %10
%16 = load i8*, i8** %4
%17 = load i8, i8* %16
%18 = zext i8 %17 to i32
%19 = icmp sge i32 %18, 127
br i1 %19, label %20, label %26
20: ; preds = %15
%21 = load i8*, i8** %4
%22 = load i8, i8* %21
%23 = zext i8 %22 to i32
%24 = icmp sle i32 %23, 160
br i1 %24, label %25, label %26
25: ; preds = %20, %10
store i32 0, i32* %2
br label %31
26: ; preds = %20, %15
br label %27
27: ; preds = %26
%28 = load i8*, i8** %4
%29 = getelementptr inbounds i8, i8* %28, i32 1
store i8* %29, i8** %4
br label %6
30: ; preds = %6
store i32 1, i32* %2
br label %31
31: ; preds = %30, %25
%32 = load i32, i32* %2
ret i32 %32
}

LLVM IR (-O2):
define i32 @is_iso8859_1(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %7
4: ; preds = %7
%5 = load i8, i8* %14
%6 = icmp eq i8 %5, 0
br i1 %6, label %15, label %7
7: ; preds = %1, %4
%8 = phi i8 [ %5, %4 ], [ %2, %1 ]
%9 = phi i8* [ %14, %4 ], [ %0, %1 ]
%10 = icmp ult i8 %8, 32
%11 = add i8 %8, -127
%12 = icmp ult i8 %11, 34
%13 = or i1 %10, %12
%14 = getelementptr inbounds i8, i8* %9, i64 1
br i1 %13, label %15, label %4
15: ; preds = %7, %4, %1
%16 = phi i32 [ 1, %1 ], [ 1, %4 ], [ 0, %7 ]
ret i32 %16
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void tsaf_set_randomaccess(uint8_t *p_ts) { p_ts[5] |= 0x40; }


x86 assembly (clang, -O0):
<tsaf_set_randomaccess>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%ecx
or     $0x40,%ecx
mov    %ecx,0x14(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tsaf_set_randomaccess>:
orb    $0x40,0x14(%rdi)
ret

LLVM IR (-O0):
define void @tsaf_set_randomaccess(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 5
%5 = load i32, i32* %4
%6 = or i32 %5, 64
store i32 %6, i32* %4
ret void
}

LLVM IR (-O2):
define void @tsaf_set_randomaccess(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 5
%3 = load i32, i32* %2
%4 = or i32 %3, 64
store i32 %4, i32* %2
ret void
}
int execute_mq_open() { return 0; }


x86 assembly (clang, -O0):
<execute_mq_open>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_mq_open>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_mq_open() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_mq_open() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __coverity_panic__();
void shutdownHaskellAndSignal(int sig, int fastExit) { __coverity_panic__(); }


x86 assembly (clang, -O0):
<shutdownHaskellAndSignal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__coverity_panic__@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shutdownHaskellAndSignal>:
xor    %eax,%eax
jmp    1030 <__coverity_panic__@plt>

LLVM IR (-O0):
define void @shutdownHaskellAndSignal(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @__coverity_panic__()
ret void
}

LLVM IR (-O2):
define void @shutdownHaskellAndSignal(i32 %0, i32 %1) {
%3 = tail call i32 (...) @__coverity_panic__()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ xscom_scan_chips(char *);
uint32_t xscom_init(void) {
  return xscom_scan_chips("/sys/kernel/debug/powerpc/scom");
}


x86 assembly (clang, -O0):
<xscom_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <xscom_scan_chips@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xscom_init>:
lea    0xee9(%rip),%rdi
jmp    1030 <xscom_scan_chips@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"/sys/kernel/debug/powerpc/scom\00"
define i32 @xscom_init() {
%1 = call i32 @xscom_scan_chips(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [31 x i8] c"/sys/kernel/debug/powerpc/scom\00"
define i32 @xscom_init() {
%1 = tail call i32 @xscom_scan_chips(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int, int, int, int);
int /*<<< orphan*/ stdout;
void print_json_uid_change(int pid, int tgid, int ruid, int euid) {
  fprintf(stdout,
          "{\"type\": \"uid_change\" \"pid\": %d, \"tgid\": %d, "
          "\"ruid\": %d, \"euid\": %d}\n",
          pid, tgid, ruid, euid);
  fflush(stdout);
}


x86 assembly (clang, -O0):
<print_json_uid_change>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
mov    -0xc(%rbp),%r8d
mov    -0x10(%rbp),%r9d
lea    0xeae(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e82(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_json_uid_change>:
push   %rbx
mov    %ecx,%r9d
mov    %edx,%r8d
mov    %esi,%ecx
mov    %edi,%edx
mov    0x2eae(%rip),%rbx
mov    (%rbx),%edi
lea    0xec5(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
pop    %rbx
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [70 x i8] c"{\22type\22: \22uid_change\22 \22pid\22: %d, \22tgid\22: %d, \22ruid\22: %d, \22euid\22: %d}\0A\00"
define void @print_json_uid_change(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* @stdout
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([70 x i8], [70 x i8]* @.str, i64 0, i64 0), i32 %10, i32 %11, i32 %12, i32 %13)
%15 = load i32, i32* @stdout
%16 = call i32 @fflush(i32 %15)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [70 x i8] c"{\22type\22: \22uid_change\22 \22pid\22: %d, \22tgid\22: %d, \22ruid\22: %d, \22euid\22: %d}\0A\00"
define void @print_json_uid_change(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = load i32, i32* @stdout
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([70 x i8], [70 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1, i32 %2, i32 %3)
%7 = load i32, i32* @stdout
%8 = tail call i32 @fflush(i32 %7)
ret void
}
void Print_Bits(code, bits, len) int code, bits, len;
{
  int i;
  for (i = 0; i < len; i++)
    printf("%d", (code >> (bits - 1 - i)) & 1);
}


x86 assembly (clang, -O0):
<Print_Bits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1161 <Print_Bits+0x51>
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
sub    -0x10(%rbp),%ecx
sar    %cl,%esi
and    $0x1,%esi
lea    0xeb4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1128 <Print_Bits+0x18>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Print_Bits>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
test   %edx,%edx
jle    114c <Print_Bits+0x3c>
mov    %edx,%ebx
mov    %esi,%ebp
mov    %edi,%r14d
add    $0xffffffff,%ebp
lea    0xed4(%rip),%r15
nopl   0x0(%rax)
mov    %r14d,%esi
mov    %ebp,%ecx
shr    %cl,%esi
and    $0x1,%esi
mov    %r15,%rdi
xor    %eax,%eax
call   1030 <printf@plt>
add    $0xffffffff,%ebp
add    $0xffffffff,%ebx
jne    1130 <Print_Bits+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @Print_Bits(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %21, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %24
12: ; preds = %8
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = sub nsw i32 %14, 1
%16 = load i32, i32* %7
%17 = sub nsw i32 %15, %16
%18 = ashr i32 %13, %17
%19 = and i32 %18, 1
%20 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %19)
br label %21
21: ; preds = %12
%22 = load i32, i32* %7
%23 = add nsw i32 %22, 1
store i32 %23, i32* %7
br label %8
24: ; preds = %8
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @Print_Bits(i32 %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %14
5: ; preds = %3, %5
%6 = phi i32 [ %12, %5 ], [ 0, %3 ]
%7 = xor i32 %6, -1
%8 = add i32 %7, %1
%9 = lshr i32 %0, %8
%10 = and i32 %9, 1
%11 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %10)
%12 = add nuw nsw i32 %6, 1
%13 = icmp eq i32 %12, %2
br i1 %13, label %14, label %5
14: ; preds = %5, %3
ret void
}
/* Variables and functions */
int open(char *, int);
int fs_open(char *path, int modus) { return open(path, modus); }


x86 assembly (clang, -O0):
<fs_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <open@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fs_open>:
jmp    1030 <open@plt>

LLVM IR (-O0):
define i32 @fs_open(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @open(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @fs_open(i8* nocapture %0, i32 %1) {
%3 = tail call i32 @open(i8* %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, void *, unsigned long, void *);
void *realloc(void *, unsigned long);
void *my_realloc(void *p, unsigned long s) {
  void *pp = realloc(p, s);
  printf(">>> realloc 0x%8.8X %lu\t-> 0x%8.8X\n", p, s, pp);
  return pp;
}


x86 assembly (clang, -O0):
<my_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_realloc>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1040 <realloc@plt>
mov    %rax,%rbx
lea    0xec6(%rip),%rdi
mov    %r15,%rsi
mov    %r14,%rdx
mov    %rax,%rcx
call   1030 <printf@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [36 x i8] c">>> realloc 0x%8.8X %lu\09-> 0x%8.8X\0A\00"
define i8* @my_realloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %3
%10 = load i64, i64* %4
%11 = load i8*, i8** %5
%12 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i8* %9, i64 %10, i8* %11)
%13 = load i8*, i8** %5
ret i8* %13
}

LLVM IR (-O2):
@.str = [36 x i8] c">>> realloc 0x%8.8X %lu\09-> 0x%8.8X\0A\00"
define i8* @my_realloc(i8* %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i8* %0, i64 %1, i8* %3)
ret i8* %3
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint8_t;

/* Variables and functions */
uint8_t hfp_subevent_service_level_connection_established_get_status(
    const uint8_t *event) {
  return event[3];
}


x86 assembly (clang, -O0):
<hfp_subevent_service_level_connection_established_get_status>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hfp_subevent_service_level_connection_established_get_status>:
mov    0xc(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @hfp_subevent_service_level_connection_established_get_status(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 3
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @hfp_subevent_service_level_connection_established_get_status(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 3
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, int *);
int main(void) {
  int num1, num2;
  scanf("%d %d", &num1, &num2);
  printf("A soma dos numeros eh: %d", num1 + num2);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
lea    -0x4(%rbp),%rsi
lea    -0x8(%rbp),%rdx
call   1040 <scanf@plt>
mov    -0x4(%rbp),%esi
add    -0x8(%rbp),%esi
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <scanf@plt>
mov    (%rsp),%esi
add    0x4(%rsp),%esi
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [26 x i8] c"A soma dos numeros eh: %d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2)
%4 = load i32, i32* %1
%5 = load i32, i32* %2
%6 = add nsw i32 %4, %5
%7 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [26 x i8] c"A soma dos numeros eh: %d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2)
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = add nsw i32 %7, %6
%9 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}
void mt_reg_sync_writeb(v, a) {
  *(volatile unsigned char *)(a) = (v);
  dsb();
  reg_dummy_read();
}


x86 assembly (clang, -O0):
<mt_reg_sync_writeb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %al,%cl
movslq -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    $0x0,%al
call   1040 <dsb@plt>
mov    $0x0,%al
call   1030 <reg_dummy_read@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mt_reg_sync_writeb>:
push   %rax
movslq %esi,%rax
mov    %dil,(%rax)
xor    %eax,%eax
call   1040 <dsb@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <reg_dummy_read@plt>

LLVM IR (-O0):
define void @mt_reg_sync_writeb(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = trunc i32 %5 to i8
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i8*
store volatile i8 %6, i8* %9
%10 = call i32 (...) @dsb()
%11 = call i32 (...) @reg_dummy_read()
ret void
}

LLVM IR (-O2):
define void @mt_reg_sync_writeb(i32 %0, i32 %1) {
%3 = trunc i32 %0 to i8
%4 = sext i32 %1 to i64
%5 = inttoptr i64 %4 to i8*
store volatile i8 %3, i8* %5
%6 = tail call i32 (...) @dsb()
%7 = tail call i32 (...) @reg_dummy_read()
ret void
}
void ab3cdefghijklmnopqrstuvwxzy() {}


x86 assembly (clang, -O0):
<ab3cdefghijklmnopqrstuvwxzy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ab3cdefghijklmnopqrstuvwxzy>:
ret

LLVM IR (-O0):
define void @ab3cdefghijklmnopqrstuvwxzy() {
ret void
}

LLVM IR (-O2):
define void @ab3cdefghijklmnopqrstuvwxzy() {
ret void
}