short uncomp_mode_type(prefix)
long prefix;
{
  short code;
  short len;
  switch (prefix) {
  case 0x18000L:
    return (2);
  case 0x24000L:
    return (3);
  case 0x32000L:
    return (4);
  case 0x41000L:
    return (5);
  case 0x50800L:
    return (6);
  case 0x60400L:
    return (7);
  case 0x70200L:
    return (8);
  case 0x80100L:
    return (9);
  case 0x90080L:
    return (10);
  case 0xA0040L:
    return (11);
  case 0xB0020L:
    return (12);
  }
  code = prefix & 0xffffL;
  len = (prefix >> 16) & 0xf;
  return ((code || len > 10) ? 14 : -1);
}


x86 assembly (clang, -O0):
<uncomp_mode_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
sub    $0x18000,%rax
je     11f3 <uncomp_mode_type+0xf3>
jmp    1121 <uncomp_mode_type+0x21>
mov    -0x20(%rbp),%rax
sub    $0x24000,%rax
je     11fe <uncomp_mode_type+0xfe>
jmp    1136 <uncomp_mode_type+0x36>
mov    -0x20(%rbp),%rax
sub    $0x32000,%rax
je     1209 <uncomp_mode_type+0x109>
jmp    114b <uncomp_mode_type+0x4b>
mov    -0x20(%rbp),%rax
sub    $0x41000,%rax
je     1214 <uncomp_mode_type+0x114>
jmp    1160 <uncomp_mode_type+0x60>
mov    -0x20(%rbp),%rax
sub    $0x50800,%rax
je     121f <uncomp_mode_type+0x11f>
jmp    1175 <uncomp_mode_type+0x75>
mov    -0x20(%rbp),%rax
sub    $0x60400,%rax
je     122a <uncomp_mode_type+0x12a>
jmp    118a <uncomp_mode_type+0x8a>
mov    -0x20(%rbp),%rax
sub    $0x70200,%rax
je     1235 <uncomp_mode_type+0x135>
jmp    119f <uncomp_mode_type+0x9f>
mov    -0x20(%rbp),%rax
sub    $0x80100,%rax
je     1240 <uncomp_mode_type+0x140>
jmp    11b4 <uncomp_mode_type+0xb4>
mov    -0x20(%rbp),%rax
sub    $0x90080,%rax
je     124b <uncomp_mode_type+0x14b>
jmp    11c9 <uncomp_mode_type+0xc9>
mov    -0x20(%rbp),%rax
sub    $0xa0040,%rax
je     1256 <uncomp_mode_type+0x156>
jmp    11de <uncomp_mode_type+0xde>
mov    -0x20(%rbp),%rax
sub    $0xb0020,%rax
je     1261 <uncomp_mode_type+0x161>
jmp    126c <uncomp_mode_type+0x16c>
movw   $0x2,-0x2(%rbp)
jmp    12c0 <uncomp_mode_type+0x1c0>
movw   $0x3,-0x2(%rbp)
jmp    12c0 <uncomp_mode_type+0x1c0>
movw   $0x4,-0x2(%rbp)
jmp    12c0 <uncomp_mode_type+0x1c0>
movw   $0x5,-0x2(%rbp)
jmp    12c0 <uncomp_mode_type+0x1c0>
movw   $0x6,-0x2(%rbp)
jmp    12c0 <uncomp_mode_type+0x1c0>
movw   $0x7,-0x2(%rbp)
jmp    12c0 <uncomp_mode_type+0x1c0>
movw   $0x8,-0x2(%rbp)
jmp    12c0 <uncomp_mode_type+0x1c0>
movw   $0x9,-0x2(%rbp)
jmp    12c0 <uncomp_mode_type+0x1c0>
movw   $0xa,-0x2(%rbp)
jmp    12c0 <uncomp_mode_type+0x1c0>
movw   $0xb,-0x2(%rbp)
jmp    12c0 <uncomp_mode_type+0x1c0>
movw   $0xc,-0x2(%rbp)
jmp    12c0 <uncomp_mode_type+0x1c0>
mov    -0x10(%rbp),%rax
and    $0xffff,%rax
mov    %ax,-0x12(%rbp)
mov    -0x10(%rbp),%rax
sar    $0x10,%rax
and    $0xf,%rax
mov    %ax,-0x14(%rbp)
movswl -0x12(%rbp),%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x21(%rbp)
jne    12a9 <uncomp_mode_type+0x1a9>
movswl -0x14(%rbp),%eax
cmp    $0xa,%eax
setg   %al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%dl
mov    $0xffffffff,%eax
mov    $0xe,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uncomp_mode_type>:
cmp    $0x603ff,%rdi
jle    1136 <uncomp_mode_type+0x36>
cmp    $0x9007f,%rdi
jg     115f <uncomp_mode_type+0x5f>
cmp    $0x60400,%rdi
je     119a <uncomp_mode_type+0x9a>
cmp    $0x70200,%rdi
je     119f <uncomp_mode_type+0x9f>
cmp    $0x80100,%rdi
jne    11b8 <uncomp_mode_type+0xb8>
mov    $0x9,%ax
ret
cmp    $0x31fff,%rdi
jle    117f <uncomp_mode_type+0x7f>
cmp    $0x32000,%rdi
je     11a4 <uncomp_mode_type+0xa4>
cmp    $0x41000,%rdi
je     11a9 <uncomp_mode_type+0xa9>
cmp    $0x50800,%rdi
jne    11b8 <uncomp_mode_type+0xb8>
mov    $0x6,%ax
ret
cmp    $0x90080,%rdi
je     11ae <uncomp_mode_type+0xae>
cmp    $0xa0040,%rdi
je     11b3 <uncomp_mode_type+0xb3>
cmp    $0xb0020,%rdi
jne    11b8 <uncomp_mode_type+0xb8>
mov    $0xc,%ax
ret
mov    $0x2,%ax
cmp    $0x18000,%rdi
je     11d7 <uncomp_mode_type+0xd7>
cmp    $0x24000,%rdi
jne    11b8 <uncomp_mode_type+0xb8>
mov    $0x3,%ax
ret
mov    $0x7,%ax
ret
mov    $0x8,%ax
ret
mov    $0x4,%ax
ret
mov    $0x5,%ax
ret
mov    $0xa,%ax
ret
mov    $0xb,%ax
ret
mov    %edi,%eax
and    $0xf0000,%eax
cmp    $0xa0001,%eax
mov    $0xe,%ecx
mov    $0xffff,%eax
cmovae %ecx,%eax
test   %di,%di
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define signext i16 @uncomp_mode_type(i64 %0) {
%2 = alloca i16
%3 = alloca i64
%4 = alloca i16
%5 = alloca i16
store i64 %0, i64* %3
%6 = load i64, i64* %3
switch i64 %6, label %18 [
i64 98304, label %7
i64 147456, label %8
i64 204800, label %9
i64 266240, label %10
i64 329728, label %11
i64 394240, label %12
i64 459264, label %13
i64 524544, label %14
i64 589952, label %15
i64 655424, label %16
i64 720928, label %17
]
7: ; preds = %1
store i16 2, i16* %2
br label %38
8: ; preds = %1
store i16 3, i16* %2
br label %38
9: ; preds = %1
store i16 4, i16* %2
br label %38
10: ; preds = %1
store i16 5, i16* %2
br label %38
11: ; preds = %1
store i16 6, i16* %2
br label %38
12: ; preds = %1
store i16 7, i16* %2
br label %38
13: ; preds = %1
store i16 8, i16* %2
br label %38
14: ; preds = %1
store i16 9, i16* %2
br label %38
15: ; preds = %1
store i16 10, i16* %2
br label %38
16: ; preds = %1
store i16 11, i16* %2
br label %38
17: ; preds = %1
store i16 12, i16* %2
br label %38
18: ; preds = %1
%19 = load i64, i64* %3
%20 = and i64 %19, 65535
%21 = trunc i64 %20 to i16
store i16 %21, i16* %4
%22 = load i64, i64* %3
%23 = ashr i64 %22, 16
%24 = and i64 %23, 15
%25 = trunc i64 %24 to i16
store i16 %25, i16* %5
%26 = load i16, i16* %4
%27 = sext i16 %26 to i32
%28 = icmp ne i32 %27, 0
br i1 %28, label %33, label %29
29: ; preds = %18
%30 = load i16, i16* %5
%31 = sext i16 %30 to i32
%32 = icmp sgt i32 %31, 10
br label %33
33: ; preds = %29, %18
%34 = phi i1 [ true, %18 ], [ %32, %29 ]
%35 = zext i1 %34 to i64
%36 = select i1 %34, i32 14, i32 -1
%37 = trunc i32 %36 to i16
store i16 %37, i16* %2
br label %38
38: ; preds = %33, %17, %16, %15, %14, %13, %12, %11, %10, %9, %8, %7
%39 = load i16, i16* %2
ret i16 %39
}

LLVM IR (-O2):
define signext i16 @uncomp_mode_type(i64 %0) {
switch i64 %0, label %12 [
i64 98304, label %19
i64 147456, label %2
i64 204800, label %3
i64 266240, label %4
i64 329728, label %5
i64 394240, label %6
i64 459264, label %7
i64 524544, label %8
i64 589952, label %9
i64 655424, label %10
i64 720928, label %11
]
2: ; preds = %1
br label %19
3: ; preds = %1
br label %19
4: ; preds = %1
br label %19
5: ; preds = %1
br label %19
6: ; preds = %1
br label %19
7: ; preds = %1
br label %19
8: ; preds = %1
br label %19
9: ; preds = %1
br label %19
10: ; preds = %1
br label %19
11: ; preds = %1
br label %19
12: ; preds = %1
%13 = and i64 %0, 65535
%14 = icmp ne i64 %13, 0
%15 = and i64 %0, 983040
%16 = icmp ugt i64 %15, 655360
%17 = or i1 %14, %16
%18 = select i1 %17, i16 14, i16 -1
br label %19
19: ; preds = %1, %12, %11, %10, %9, %8, %7, %6, %5, %4, %3, %2
%20 = phi i16 [ %18, %12 ], [ 12, %11 ], [ 11, %10 ], [ 10, %9 ], [ 9, %8 ], [ 8, %7 ], [ 7, %6 ], [ 6, %5 ], [ 5, %4 ], [ 4, %3 ], [ 3, %2 ], [ 2, %1 ]
ret i16 %20
}