#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ DCSMGrabRAMBlocks();
unsigned long DCSMGetRAMZone(unsigned long ramsection) {
  unsigned long z1_status;
  unsigned long z2_status;
  unsigned long shift_value;
  ;
  DCSMGrabRAMBlocks();
  shift_value = ramsection << 1;
  z1_status = ((*((volatile unsigned long *)(0x400FB400 + 0x00000094))) >>
               shift_value) &
              0x00000003;
  z2_status = ((*((volatile unsigned long *)(0x400FB400 + 0x0000009C))) >>
               shift_value) &
              0x00000003;
  if ((z1_status & z2_status) == 0x3) {
    return (3);
  } else if ((z1_status == 0x3) && ((z2_status == 0x2) || (z2_status == 0x1))) {
    return (2);
  } else if ((z2_status == 0x3) && ((z1_status == 0x2) || (z1_status == 0x1))) {
    return (1);
  } else {
    return (0);
  }
}


x86 assembly (clang, -O0):
<DCSMGetRAMZone>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <DCSMGrabRAMBlocks@plt>
mov    -0x10(%rbp),%rax
shl    $0x1,%rax
mov    %rax,-0x28(%rbp)
mov    $0x400fb494,%eax
mov    (%rax),%rax
mov    -0x28(%rbp),%rcx
shr    %cl,%rax
and    $0x3,%rax
mov    %rax,-0x18(%rbp)
mov    $0x400fb49c,%eax
mov    (%rax),%rax
mov    -0x28(%rbp),%rcx
shr    %cl,%rax
and    $0x3,%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
and    -0x20(%rbp),%rax
cmp    $0x3,%rax
jne    117c <DCSMGetRAMZone+0x6c>
movq   $0x3,-0x8(%rbp)
jmp    11e0 <DCSMGetRAMZone+0xd0>
cmpq   $0x3,-0x18(%rbp)
jne    11aa <DCSMGetRAMZone+0x9a>
cmpq   $0x2,-0x20(%rbp)
je     119d <DCSMGetRAMZone+0x8d>
cmpq   $0x1,-0x20(%rbp)
jne    11aa <DCSMGetRAMZone+0x9a>
movq   $0x2,-0x8(%rbp)
jmp    11e0 <DCSMGetRAMZone+0xd0>
cmpq   $0x3,-0x20(%rbp)
jne    11d8 <DCSMGetRAMZone+0xc8>
cmpq   $0x2,-0x18(%rbp)
je     11cb <DCSMGetRAMZone+0xbb>
cmpq   $0x1,-0x18(%rbp)
jne    11d8 <DCSMGetRAMZone+0xc8>
movq   $0x1,-0x8(%rbp)
jmp    11e0 <DCSMGetRAMZone+0xd0>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DCSMGetRAMZone>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <DCSMGrabRAMBlocks@plt>
add    %ebx,%ebx
mov    0x400fb494,%rdx
40
mov    %ebx,%ecx
shr    %cl,%rdx
mov    0x400fb49c,%rsi
40
shr    %cl,%rsi
and    $0x3,%esi
mov    %esi,%ecx
and    %edx,%ecx
mov    $0x3,%eax
cmp    $0x3,%ecx
je     115d <DCSMGetRAMZone+0x4d>
and    $0x3,%edx
cmp    $0x3,%edx
jne    115f <DCSMGetRAMZone+0x4f>
lea    -0x1(%rsi),%rcx
mov    $0x2,%eax
cmp    $0x2,%rcx
jae    115f <DCSMGetRAMZone+0x4f>
pop    %rbx
ret
cmp    $0x3,%esi
sete   %al
add    $0xffffffffffffffff,%rdx
cmp    $0x2,%rdx
setb   %cl
and    %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @DCSMGetRAMZone(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %3
%7 = call i32 (...) @DCSMGrabRAMBlocks()
%8 = load i64, i64* %3
%9 = shl i64 %8, 1
store i64 %9, i64* %6
%10 = load volatile i64, i64* inttoptr (i64 1074771092 to i64*)
%11 = load i64, i64* %6
%12 = lshr i64 %10, %11
%13 = and i64 %12, 3
store i64 %13, i64* %4
%14 = load volatile i64, i64* inttoptr (i64 1074771100 to i64*)
%15 = load i64, i64* %6
%16 = lshr i64 %14, %15
%17 = and i64 %16, 3
store i64 %17, i64* %5
%18 = load i64, i64* %4
%19 = load i64, i64* %5
%20 = and i64 %18, %19
%21 = icmp eq i64 %20, 3
br i1 %21, label %22, label %23
22: ; preds = %1
store i64 3, i64* %2
br label %44
23: ; preds = %1
%24 = load i64, i64* %4
%25 = icmp eq i64 %24, 3
br i1 %25, label %26, label %33
26: ; preds = %23
%27 = load i64, i64* %5
%28 = icmp eq i64 %27, 2
br i1 %28, label %32, label %29
29: ; preds = %26
%30 = load i64, i64* %5
%31 = icmp eq i64 %30, 1
br i1 %31, label %32, label %33
32: ; preds = %29, %26
store i64 2, i64* %2
br label %44
33: ; preds = %29, %23
%34 = load i64, i64* %5
%35 = icmp eq i64 %34, 3
br i1 %35, label %36, label %43
36: ; preds = %33
%37 = load i64, i64* %4
%38 = icmp eq i64 %37, 2
br i1 %38, label %42, label %39
39: ; preds = %36
%40 = load i64, i64* %4
%41 = icmp eq i64 %40, 1
br i1 %41, label %42, label %43
42: ; preds = %39, %36
store i64 1, i64* %2
br label %44
43: ; preds = %39, %33
store i64 0, i64* %2
br label %44
44: ; preds = %43, %42, %32, %22
%45 = load i64, i64* %2
ret i64 %45
}

LLVM IR (-O2):
define i64 @DCSMGetRAMZone(i64 %0) {
%2 = tail call i32 (...) @DCSMGrabRAMBlocks()
%3 = shl i64 %0, 1
%4 = load volatile i64, i64* inttoptr (i64 1074771092 to i64*)
%5 = lshr i64 %4, %3
%6 = and i64 %5, 3
%7 = load volatile i64, i64* inttoptr (i64 1074771100 to i64*)
%8 = lshr i64 %7, %3
%9 = and i64 %8, 3
%10 = and i64 %9, %5
%11 = icmp eq i64 %10, 3
br i1 %11, label %23, label %12
12: ; preds = %1
%13 = icmp eq i64 %6, 3
%14 = add nsw i64 %9, -1
%15 = icmp ult i64 %14, 2
%16 = select i1 %13, i1 %15, i1 false
br i1 %16, label %23, label %17
17: ; preds = %12
%18 = icmp eq i64 %9, 3
%19 = add nsw i64 %6, -1
%20 = icmp ult i64 %19, 2
%21 = select i1 %18, i1 %20, i1 false
%22 = zext i1 %21 to i64
br label %23
23: ; preds = %17, %12, %1
%24 = phi i64 [ 3, %1 ], [ 2, %12 ], [ %22, %17 ]
ret i64 %24
}