xunge/DecIR huggingface dataset:
/* Variables and functions */
int ffsll(long long mask) {
  int bit;
  if (mask == 0)
    return (0);
  for (bit = 1; !(mask & 1); bit++)
    mask = (unsigned long long)mask >> 1;
  return (bit);
}


x86 assembly (clang, -O0):
<ffsll>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    111f <ffsll+0x1f>
movl   $0x0,-0x4(%rbp)
jmp    1164 <ffsll+0x64>
movl   $0x1,-0x14(%rbp)
mov    -0x10(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1144 <ffsll+0x44>
jmp    115e <ffsll+0x5e>
mov    -0x10(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <ffsll+0x26>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffsll>:
test   %rdi,%rdi
je     1130 <ffsll+0x30>
mov    $0x1,%eax
test   $0x1,%dil
jne    112f <ffsll+0x2f>
mov    $0x1,%eax
mov    %rdi,%rcx
nopl   0x0(%rax,%rax,1)
shr    %rcx
add    $0x1,%eax
test   $0x2,%dil
mov    %rcx,%rdi
je     1120 <ffsll+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ffsll(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %22
8: ; preds = %1
store i32 1, i32* %4
br label %9
9: ; preds = %17, %8
%10 = load i64, i64* %3
%11 = and i64 %10, 1
%12 = icmp ne i64 %11, 0
%13 = xor i1 %12, true
br i1 %13, label %14, label %20
14: ; preds = %9
%15 = load i64, i64* %3
%16 = lshr i64 %15, 1
store i64 %16, i64* %3
br label %17
17: ; preds = %14
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %9
20: ; preds = %9
%21 = load i32, i32* %4
store i32 %21, i32* %2
br label %22
22: ; preds = %20, %7
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @ffsll(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %13, label %3
3: ; preds = %1
%4 = and i64 %0, 1
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %13
6: ; preds = %3, %6
%7 = phi i32 [ %10, %6 ], [ 1, %3 ]
%8 = phi i64 [ %9, %6 ], [ %0, %3 ]
%9 = lshr i64 %8, 1
%10 = add nuw nsw i32 %7, 1
%11 = and i64 %8, 2
%12 = icmp eq i64 %11, 0
br i1 %12, label %6, label %13
13: ; preds = %6, %3, %1
%14 = phi i32 [ 0, %1 ], [ 1, %3 ], [ %10, %6 ]
ret i32 %14
}
char *get_vlm_wind_interpolation_scheme() {
  static char *vlm_wind_interp_scheme = "TWSA";
  return vlm_wind_interp_scheme;
}


x86 assembly (clang, -O0):
<get_vlm_wind_interpolation_scheme>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f15(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_vlm_wind_interpolation_scheme>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@get_vlm_wind_interpolation_scheme.vlm_wind_interp_scheme = internal global i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i32 0, i32 0)
@.str = [5 x i8] c"TWSA\00"
define i8* @get_vlm_wind_interpolation_scheme() {
%1 = load i8*, i8** @get_vlm_wind_interpolation_scheme.vlm_wind_interp_scheme
ret i8* %1
}

LLVM IR (-O2):
@.str = [5 x i8] c"TWSA\00"
define i8* @get_vlm_wind_interpolation_scheme() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}
void lacking(s) char *s;
{
  write(2, "This termcap entry lacks the :", (unsigned)30);
  write(2, s, (unsigned)2);
  write(2, "=: capability\n", (unsigned)14);
  exit(1);
}


x86 assembly (clang, -O0):
<lacking>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x2,%edi
lea    0xec8(%rip),%rsi
mov    $0x1e,%edx
mov    $0x0,%al
call   1030 <write@plt>
mov    -0x8(%rbp),%rsi
mov    $0x2,%edx
mov    %edx,%edi
mov    $0x0,%al
call   1030 <write@plt>
mov    $0x2,%edi
lea    0xebd(%rip),%rsi
mov    $0xe,%edx
mov    $0x0,%al
call   1030 <write@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<lacking>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rsi
mov    $0x2,%edi
mov    $0x1e,%edx
xor    %eax,%eax
call   1030 <write@plt>
mov    $0x2,%edi
mov    %rbx,%rsi
mov    $0x2,%edx
xor    %eax,%eax
call   1030 <write@plt>
lea    0xec8(%rip),%rsi
mov    $0x2,%edi
mov    $0xe,%edx
xor    %eax,%eax
call   1030 <write@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"This termcap entry lacks the :\00"
@.str.1 = [15 x i8] c"=: capability\0A\00"
define void @lacking(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @write to i32 (i32, i8*, i32, ...)*)(i32 2, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 30)
%4 = load i8*, i8** %2
%5 = call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @write to i32 (i32, i8*, i32, ...)*)(i32 2, i8* %4, i32 2)
%6 = call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @write to i32 (i32, i8*, i32, ...)*)(i32 2, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i32 14)
unreachable
}

LLVM IR (-O2):
@.str = [31 x i8] c"This termcap entry lacks the :\00"
@.str.1 = [15 x i8] c"=: capability\0A\00"
define void @lacking(i8* %0) {
%2 = tail call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @write to i32 (i32, i8*, i32, ...)*)(i32 2, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 30)
%3 = tail call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @write to i32 (i32, i8*, i32, ...)*)(i32 2, i8* %0, i32 2)
%4 = tail call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @write to i32 (i32, i8*, i32, ...)*)(i32 2, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i32 14)
tail call void @exit(i32 1)
unreachable
}
/* Variables and functions */
unsigned short *make_decoder_ref(unsigned char const **);
unsigned short *make_decoder(const unsigned char *source) {
  return make_decoder_ref(&source);
}


x86 assembly (clang, -O0):
<make_decoder>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
call   1030 <make_decoder_ref@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_decoder>:
push   %rax
mov    %rdi,(%rsp)
mov    %rsp,%rdi
call   1030 <make_decoder_ref@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i16* @make_decoder(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i16* @make_decoder_ref(i8** %2)
ret i16* %3
}

LLVM IR (-O2):
define i16* @make_decoder(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i16* @make_decoder_ref(i8** %2)
ret i16* %3
}
/* Type definitions */
typedef int /*<<< orphan*/ fenv_t;

/* Variables and functions */
int /*<<< orphan*/ feholdexcept(int /*<<< orphan*/ *);
void nullPointer_feholdexcept(void) {
  fenv_t *envp = 0;
  (void)feholdexcept(envp);
  (void)feholdexcept(0);
}


x86 assembly (clang, -O0):
<nullPointer_feholdexcept>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <feholdexcept@plt>
xor    %eax,%eax
mov    %eax,%edi
call   1030 <feholdexcept@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nullPointer_feholdexcept>:
push   %rax
xor    %edi,%edi
call   1030 <feholdexcept@plt>
xor    %edi,%edi
pop    %rax
jmp    1030 <feholdexcept@plt>

LLVM IR (-O0):
define void @nullPointer_feholdexcept() {
%1 = alloca i32*
store i32* null, i32** %1
%2 = load i32*, i32** %1
%3 = call i32 @feholdexcept(i32* %2)
%4 = call i32 @feholdexcept(i32* null)
ret void
}

LLVM IR (-O2):
define void @nullPointer_feholdexcept() {
%1 = tail call i32 @feholdexcept(i32* null)
%2 = tail call i32 @feholdexcept(i32* null)
ret void
}
/* Variables and functions */
double log(double);
double mc_randf();
double mc_rand_exp(double lambda) {
  double rnd = mc_randf();
  return (-1.0 / lambda) * log(1.0 - rnd);
}


x86 assembly (clang, -O0):
<mc_rand_exp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <mc_randf@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  0xec7(%rip),%xmm0
divsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xead(%rip),%xmm0
subsd  -0x10(%rbp),%xmm0
call   1040 <log@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
mulsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mc_rand_exp>:
push   %rax
movsd  %xmm0,(%rsp)
xor    %eax,%eax
call   1030 <mc_randf@plt>
movsd  0xecb(%rip),%xmm1
divsd  (%rsp),%xmm1
movsd  %xmm1,(%rsp)
movsd  0xec1(%rip),%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
call   1040 <log@plt>
mulsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @mc_rand_exp(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = call double (...) @mc_randf()
store double %4, double* %3
%5 = load double, double* %2
%6 = fdiv double -1.000000e+00, %5
%7 = load double, double* %3
%8 = fsub double 1.000000e+00, %7
%9 = call double @log(double %8)
%10 = fmul double %6, %9
ret double %10
}

LLVM IR (-O2):
define double @mc_rand_exp(double %0) {
%2 = tail call double (...) @mc_randf()
%3 = fdiv double -1.000000e+00, %0
%4 = fsub double 1.000000e+00, %2
%5 = tail call double @log(double %4)
%6 = fmul double %3, %5
ret double %6
}
/* Variables and functions */
unsigned int UINT_MAX;
int expect_unsigned_int_sum(unsigned int (*f)(unsigned int, unsigned int)) {
  return f(UINT_MAX - 1, 1) == UINT_MAX;
}


x86 assembly (clang, -O0):
<expect_unsigned_int_sum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2ed1(%rip),%rcx
mov    (%rcx),%edi
sub    $0x1,%edi
mov    $0x1,%esi
call   *%rax
mov    0x2ebe(%rip),%rcx
cmp    (%rcx),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expect_unsigned_int_sum>:
push   %rbx
mov    %rdi,%rax
mov    0x2edd(%rip),%rbx
mov    (%rbx),%edi
add    $0xffffffff,%edi
mov    $0x1,%esi
call   *%rax
xor    %ecx,%ecx
cmp    (%rbx),%eax
sete   %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@UINT_MAX = global i32 0
define i32 @expect_unsigned_int_sum(i32 (i32, i32)* %0) {
%2 = alloca i32 (i32, i32)*
store i32 (i32, i32)* %0, i32 (i32, i32)** %2
%3 = load i32 (i32, i32)*, i32 (i32, i32)** %2
%4 = load i32, i32* @UINT_MAX
%5 = sub i32 %4, 1
%6 = call i32 %3(i32 %5, i32 1)
%7 = load i32, i32* @UINT_MAX
%8 = icmp eq i32 %6, %7
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
@UINT_MAX = global i32 0
define i32 @expect_unsigned_int_sum(i32 (i32, i32)* nocapture %0) {
%2 = load i32, i32* @UINT_MAX
%3 = add i32 %2, -1
%4 = tail call i32 %0(i32 %3, i32 1)
%5 = load i32, i32* @UINT_MAX
%6 = icmp eq i32 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ freeWakeLock(int);
int /*<<< orphan*/ getWakeLock(int);
int main() {
  int i;
  if (i == 0) {
    getWakeLock(1);
  } else {
    getWakeLock(0);
  }
  freeWakeLock(1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1148 <main+0x28>
mov    $0x1,%edi
call   1030 <getWakeLock@plt>
jmp    114f <main+0x2f>
xor    %edi,%edi
call   1030 <getWakeLock@plt>
mov    $0x1,%edi
call   1040 <freeWakeLock@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <getWakeLock@plt>
mov    $0x1,%edi
call   1040 <freeWakeLock@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 @getWakeLock(i32 1)
br label %9
7: ; preds = %0
%8 = call i32 @getWakeLock(i32 0)
br label %9
9: ; preds = %7, %5
%10 = call i32 @freeWakeLock(i32 1)
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @getWakeLock(i32 0)
%2 = tail call i32 @freeWakeLock(i32 1)
ret i32 0
}
/* Type definitions */
struct userdel_args_info {
  int dummy;
};

/* Variables and functions */
int userdel_cmdline_parser2(int, char **, struct userdel_args_info *,
                            int /*<<< orphan*/, int, int);
int userdel_cmdline_parser(int argc, char **argv,
                           struct userdel_args_info *args_info) {
  return userdel_cmdline_parser2(argc, argv, args_info, 0, 1, 1);
}


x86 assembly (clang, -O0):
<userdel_cmdline_parser>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
mov    $0x1,%r9d
mov    %r9d,%r8d
call   1030 <userdel_cmdline_parser2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<userdel_cmdline_parser>:
xor    %ecx,%ecx
mov    $0x1,%r8d
mov    $0x1,%r9d
jmp    1030 <userdel_cmdline_parser2@plt>

LLVM IR (-O0):
%struct.userdel_args_info = type { i32 }
define i32 @userdel_cmdline_parser(i32 %0, i8** %1, %struct.userdel_args_info* %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca %struct.userdel_args_info*
store i32 %0, i32* %4
store i8** %1, i8*** %5
store %struct.userdel_args_info* %2, %struct.userdel_args_info** %6
%7 = load i32, i32* %4
%8 = load i8**, i8*** %5
%9 = load %struct.userdel_args_info*, %struct.userdel_args_info** %6
%10 = call i32 @userdel_cmdline_parser2(i32 %7, i8** %8, %struct.userdel_args_info* %9, i32 0, i32 1, i32 1)
ret i32 %10
}

LLVM IR (-O2):
%struct.userdel_args_info = type { i32 }
define i32 @userdel_cmdline_parser(i32 %0, i8** %1, %struct.userdel_args_info* %2) {
%4 = tail call i32 @userdel_cmdline_parser2(i32 %0, i8** %1, %struct.userdel_args_info* %2, i32 0, i32 1, i32 1)
ret i32 %4
}
/* Variables and functions */
scalar_t__ check_desa_add_sub();
scalar_t__ check_desa_adda_suba();
scalar_t__ check_desa_addx_subx();
int /*<<< orphan*/ desa_dcw();
void desa_lin9D(void) {
  if (check_desa_adda_suba())
    return;
  else if (check_desa_addx_subx())
    return;
  else if (check_desa_add_sub())
    return;
  else
    desa_dcw();
  return;
}


x86 assembly (clang, -O0):
<desa_lin9D>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1060 <check_desa_adda_suba@plt>
cmp    $0x0,%rax
je     115a <desa_lin9D+0x1a>
jmp    119c <desa_lin9D+0x5c>
mov    $0x0,%al
call   1040 <check_desa_addx_subx@plt>
cmp    $0x0,%rax
je     1170 <desa_lin9D+0x30>
jmp    119c <desa_lin9D+0x5c>
mov    $0x0,%al
call   1030 <check_desa_add_sub@plt>
cmp    $0x0,%rax
je     1186 <desa_lin9D+0x46>
jmp    119c <desa_lin9D+0x5c>
mov    $0x0,%al
call   1050 <desa_dcw@plt>
jmp    1192 <desa_lin9D+0x52>
jmp    1197 <desa_lin9D+0x57>
jmp    119c <desa_lin9D+0x5c>
pop    %rbp
ret

x86 assembly (clang, -O2):
<desa_lin9D>:
push   %rax
xor    %eax,%eax
call   1060 <check_desa_adda_suba@plt>
test   %rax,%rax
jne    1165 <desa_lin9D+0x25>
xor    %eax,%eax
call   1040 <check_desa_addx_subx@plt>
test   %rax,%rax
jne    1165 <desa_lin9D+0x25>
xor    %eax,%eax
call   1030 <check_desa_add_sub@plt>
test   %rax,%rax
je     1167 <desa_lin9D+0x27>
pop    %rax
ret
xor    %eax,%eax
pop    %rcx
jmp    1050 <desa_dcw@plt>

LLVM IR (-O0):
define void @desa_lin9D() {
%1 = call i64 (...) @check_desa_adda_suba()
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %4
3: ; preds = %0
br label %17
4: ; preds = %0
%5 = call i64 (...) @check_desa_addx_subx()
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %4
br label %17
8: ; preds = %4
%9 = call i64 (...) @check_desa_add_sub()
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %8
br label %17
12: ; preds = %8
%13 = call i32 (...) @desa_dcw()
br label %14
14: ; preds = %12
br label %15
15: ; preds = %14
br label %16
16: ; preds = %15
br label %17
17: ; preds = %16, %11, %7, %3
ret void
}

LLVM IR (-O2):
define void @desa_lin9D() {
%1 = tail call i64 (...) @check_desa_adda_suba()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %11
3: ; preds = %0
%4 = tail call i64 (...) @check_desa_addx_subx()
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = tail call i64 (...) @check_desa_add_sub()
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = tail call i32 (...) @desa_dcw()
br label %11
11: ; preds = %6, %3, %0, %9
ret void
}
int config_IRDETO_GUESSING(void) { return 1; }


x86 assembly (clang, -O0):
<config_IRDETO_GUESSING>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_IRDETO_GUESSING>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @config_IRDETO_GUESSING() {
ret i32 1
}

LLVM IR (-O2):
define i32 @config_IRDETO_GUESSING() {
ret i32 1
}
float act(int x, float y, char z) {}


x86 assembly (clang, -O0):
<act>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %edi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    %al,-0xd(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<act>:
ret

LLVM IR (-O0):
define float @act(i32 %0, float %1, i8 signext %2) {
%4 = alloca float
%5 = alloca i32
%6 = alloca float
%7 = alloca i8
store i32 %0, i32* %5
store float %1, float* %6
store i8 %2, i8* %7
%8 = load float, float* %4
ret float %8
}

LLVM IR (-O2):
define float @act(i32 %0, float %1, i8 signext %2) {
ret float undef
}
/* Variables and functions */
bool read_char(const char **string, char ch) {
  return **string == ch && ({
    *string += 1;
    true;
  });
}


x86 assembly (clang, -O0):
<read_char>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%ecx
movsbl -0x9(%rbp),%edx
xor    %eax,%eax
cmp    %edx,%ecx
mov    %al,-0x11(%rbp)
jne    1148 <read_char+0x48>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
movl   $0x1,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_char>:
mov    (%rdi),%rax
mov    (%rax),%cl
cmp    %sil,%cl
jne    1111 <read_char+0x11>
add    $0x1,%rax
mov    %rax,(%rdi)
xor    %eax,%eax
cmp    %sil,%cl
sete   %al
ret

LLVM IR (-O0):
define i32 @read_char(i8** %0, i8 signext %1) {
%3 = alloca i8**
%4 = alloca i8
%5 = alloca i32
store i8** %0, i8*** %3
store i8 %1, i8* %4
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %6
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i8, i8* %4
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %9, %11
br i1 %12, label %13, label %19
13: ; preds = %2
%14 = load i8**, i8*** %3
%15 = load i8*, i8** %14
%16 = getelementptr inbounds i8, i8* %15, i64 1
store i8* %16, i8** %14
store i32 1, i32* %5
%17 = load i32, i32* %5
%18 = icmp ne i32 %17, 0
br label %19
19: ; preds = %13, %2
%20 = phi i1 [ false, %2 ], [ %18, %13 ]
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
define i32 @read_char(i8** nocapture %0, i8 signext %1) {
%3 = load i8*, i8** %0
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, %1
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = getelementptr inbounds i8, i8* %3, i64 1
store i8* %7, i8** %0
br label %8
8: ; preds = %6, %2
%9 = zext i1 %5 to i32
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void pritty() { printf("This is a pretty girl\n"); }


x86 assembly (clang, -O0):
<pritty>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pritty>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"This is a pretty girl\0A\00"
define void @pritty() {
%1 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [22 x i8] c"This is a pretty girl\00"
define void @pritty() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int test(int);
int main() {
  printf("%d\n", test(4));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4,%edi
call   1040 <test@plt>
mov    %eax,%esi
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
call   1040 <test@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @test(i32 4)
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @test(i32 4)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(int *);
int main() {
  int *p;
  *p = 1000;
  printf(p);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x3e8,(%rax)
mov    -0x10(%rbp),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32 0, i32* %1
%3 = load i32*, i32** %2
store i32 1000, i32* %3
%4 = load i32*, i32** %2
%5 = call i32 @printf(i32* %4)
ret i32 0
}

LLVM IR (-O2):
/* Variables and functions */
int /*<<< orphan*/ F_SETFL;
int /*<<< orphan*/ O_NDELAY;
int fcntl(int, int /*<<< orphan*/, int /*<<< orphan*/);
int BasSockUdpNonBlock(int sock) {
  int res;
  res = fcntl(sock, F_SETFL, O_NDELAY);
  if (res)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<BasSockUdpNonBlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
mov    0x2eaa(%rip),%rax
mov    (%rax),%edx
call   1030 <fcntl@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     114e <BasSockUdpNonBlock+0x3e>
movl   $0xffffffff,-0x4(%rbp)
jmp    1155 <BasSockUdpNonBlock+0x45>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BasSockUdpNonBlock>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
mov    0x2eb7(%rip),%rax
mov    (%rax),%edx
call   1030 <fcntl@plt>
neg    %eax
sbb    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@F_SETFL = global i32 0
@O_NDELAY = global i32 0
define i32 @BasSockUdpNonBlock(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = load i32, i32* @F_SETFL
%7 = load i32, i32* @O_NDELAY
%8 = call i32 @fcntl(i32 %5, i32 %6, i32 %7)
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %1
store i32 -1, i32* %2
br label %13
12: ; preds = %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
@F_SETFL = global i32 0
@O_NDELAY = global i32 0
define i32 @BasSockUdpNonBlock(i32 %0) {
%2 = load i32, i32* @F_SETFL
%3 = load i32, i32* @O_NDELAY
%4 = tail call i32 @fcntl(i32 %0, i32 %2, i32 %3)
%5 = icmp ne i32 %4, 0
%6 = sext i1 %5 to i32
ret i32 %6
}
/* Type definitions */
typedef int u_int32_t;

/* Variables and functions */
u_int32_t nxflat_swap32(u_int32_t little) {
  u_int32_t big = ((little >> 24) & 0xff) | (((little >> 16) & 0xff) << 8) |
                  (((little >> 8) & 0xff) << 16) | ((little & 0xff) << 24);
  return big;
}


x86 assembly (clang, -O0):
<nxflat_swap32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x18,%eax
and    $0xff,%eax
mov    -0x4(%rbp),%ecx
sar    $0x10,%ecx
and    $0xff,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff,%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
shl    $0x18,%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nxflat_swap32>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @nxflat_swap32(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = ashr i32 %4, 24
%6 = and i32 %5, 255
%7 = load i32, i32* %2
%8 = ashr i32 %7, 16
%9 = and i32 %8, 255
%10 = shl i32 %9, 8
%11 = or i32 %6, %10
%12 = load i32, i32* %2
%13 = ashr i32 %12, 8
%14 = and i32 %13, 255
%15 = shl i32 %14, 16
%16 = or i32 %11, %15
%17 = load i32, i32* %2
%18 = and i32 %17, 255
%19 = shl i32 %18, 24
%20 = or i32 %16, %19
store i32 %20, i32* %3
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @nxflat_swap32(i32 %0) {
%2 = tail call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
/* Variables and functions */
int SIGINT;
int /*<<< orphan*/ println(char *);
void signal_handler(int signal) {
  if (signal == SIGINT) {
    println("snippet:signal_handler: SIGINT signal catched");
  }
}


x86 assembly (clang, -O0):
<signal_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ec3(%rip),%rcx
cmp    (%rcx),%eax
jne    1139 <signal_handler+0x29>
lea    0xecc(%rip),%rdi
call   1030 <println@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<signal_handler>:
mov    0x2ed1(%rip),%rax
cmp    %edi,(%rax)
jne    1127 <signal_handler+0x17>
lea    0xede(%rip),%rdi
jmp    1030 <println@plt>
ret

LLVM IR (-O0):
@SIGINT = global i32 0
@.str = [46 x i8] c"snippet:signal_handler: SIGINT signal catched\00"
define void @signal_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIGINT
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @println(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@SIGINT = global i32 0
@.str = [46 x i8] c"snippet:signal_handler: SIGINT signal catched\00"
define void @signal_handler(i32 %0) {
%2 = load i32, i32* @SIGINT
%3 = icmp eq i32 %2, %0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @println(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
scalar_t__ mkdir(char *, unsigned int);
int lha_arch_mkdir(char *path, unsigned int unix_perms) {
  return mkdir(path, unix_perms) == 0;
}


x86 assembly (clang, -O0):
<lha_arch_mkdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <mkdir@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lha_arch_mkdir>:
push   %rax
call   1030 <mkdir@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @lha_arch_mkdir(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i64 @mkdir(i8* %5, i32 %6)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @lha_arch_mkdir(i8* nocapture %0, i32 %1) {
%3 = tail call i64 @mkdir(i8* %0, i32 %1)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
int strlencmp(const void *a, const void *b) {
  struct _sl {
    char *s;
    int len;
  };
  struct _sl *aa = (struct _sl *)a;
  struct _sl *bb = (struct _sl *)b;
  if (aa->len > bb->len)
    return 1;
  else if (aa->len == bb->len)
    return 0;
  else
    return -1;
}


x86 assembly (clang, -O0):
<strlencmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    0x8(%rax),%eax
mov    -0x28(%rbp),%rcx
cmp    0x8(%rcx),%eax
jle    113c <strlencmp+0x3c>
movl   $0x1,-0x4(%rbp)
jmp    1163 <strlencmp+0x63>
mov    -0x20(%rbp),%rax
mov    0x8(%rax),%eax
mov    -0x28(%rbp),%rcx
cmp    0x8(%rcx),%eax
jne    115c <strlencmp+0x5c>
movl   $0x0,-0x4(%rbp)
jmp    1163 <strlencmp+0x63>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlencmp>:
mov    0x8(%rdi),%eax
mov    0x8(%rsi),%ecx
xor    %edx,%edx
cmp    %ecx,%eax
setne  %dl
neg    %edx
cmp    %ecx,%eax
mov    $0x1,%eax
cmovle %edx,%eax
ret

LLVM IR (-O0):
%struct._sl = type { i8*, i32 }
define i32 @strlencmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca %struct._sl*
%7 = alloca %struct._sl*
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to %struct._sl*
store %struct._sl* %9, %struct._sl** %6
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to %struct._sl*
store %struct._sl* %11, %struct._sl** %7
%12 = load %struct._sl*, %struct._sl** %6
%13 = getelementptr inbounds %struct._sl, %struct._sl* %12, i32 0, i32 1
%14 = load i32, i32* %13
%15 = load %struct._sl*, %struct._sl** %7
%16 = getelementptr inbounds %struct._sl, %struct._sl* %15, i32 0, i32 1
%17 = load i32, i32* %16
%18 = icmp sgt i32 %14, %17
br i1 %18, label %19, label %20
19: ; preds = %2
store i32 1, i32* %3
br label %30
20: ; preds = %2
%21 = load %struct._sl*, %struct._sl** %6
%22 = getelementptr inbounds %struct._sl, %struct._sl* %21, i32 0, i32 1
%23 = load i32, i32* %22
%24 = load %struct._sl*, %struct._sl** %7
%25 = getelementptr inbounds %struct._sl, %struct._sl* %24, i32 0, i32 1
%26 = load i32, i32* %25
%27 = icmp eq i32 %23, %26
br i1 %27, label %28, label %29
28: ; preds = %20
store i32 0, i32* %3
br label %30
29: ; preds = %20
store i32 -1, i32* %3
br label %30
30: ; preds = %29, %28, %19
%31 = load i32, i32* %3
ret i32 %31
}

LLVM IR (-O2):
define i32 @strlencmp(i8* nocapture %0, i8* nocapture %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 8
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
%6 = getelementptr inbounds i8, i8* %1, i64 8
%7 = bitcast i8* %6 to i32*
%8 = load i32, i32* %7
%9 = icmp sgt i32 %5, %8
%10 = icmp ne i32 %5, %8
%11 = sext i1 %10 to i32
%12 = select i1 %9, i32 1, i32 %11
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ printColor(int /*<<< orphan*/);
int /*<<< orphan*/ red(char *);
void cmRed(char *str) { printColor(red(str)); }


x86 assembly (clang, -O0):
<cmRed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <red@plt>
mov    %eax,%edi
call   1040 <printColor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmRed>:
push   %rax
call   1030 <red@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <printColor@plt>

LLVM IR (-O0):
define void @cmRed(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @red(i8* %3)
%5 = call i32 @printColor(i32 %4)
ret void
}

LLVM IR (-O2):
define void @cmRed(i8* %0) {
%2 = tail call i32 @red(i8* %0)
%3 = tail call i32 @printColor(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bb_perror_msg(int /*<<< orphan*/);
void bb_perror_nomsg(void) { bb_perror_msg(0); }


x86 assembly (clang, -O0):
<bb_perror_nomsg>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <bb_perror_msg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bb_perror_nomsg>:
xor    %edi,%edi
jmp    1030 <bb_perror_msg@plt>

LLVM IR (-O0):
define void @bb_perror_nomsg() {
%1 = call i32 @bb_perror_msg(i32 0)
ret void
}

LLVM IR (-O2):
define void @bb_perror_nomsg() {
%1 = tail call i32 @bb_perror_msg(i32 0)
ret void
}
/* Variables and functions */
void *malloc(int);
int /*<<< orphan*/ memcpy(void *, void *, int);
void *comps_set_index_clone(void *item) {
  void *ret;
  if ((ret = malloc(sizeof(unsigned int))) == NULL)
    return NULL;
  memcpy(ret, item, sizeof(unsigned int));
  return ret;
}


x86 assembly (clang, -O0):
<comps_set_index_clone>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    1151 <comps_set_index_clone+0x31>
movq   $0x0,-0x8(%rbp)
jmp    116b <comps_set_index_clone+0x4b>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<comps_set_index_clone>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1149 <comps_set_index_clone+0x29>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @comps_set_index_clone(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = call i8* @malloc(i32 4)
store i8* %5, i8** %4
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %1
store i8* null, i8** %2
br label %13
8: ; preds = %1
%9 = load i8*, i8** %4
%10 = load i8*, i8** %3
%11 = call i32 @memcpy(i8* %9, i8* %10, i32 4)
%12 = load i8*, i8** %4
store i8* %12, i8** %2
br label %13
13: ; preds = %8, %7
%14 = load i8*, i8** %2
ret i8* %14
}

LLVM IR (-O2):
define i8* @comps_set_index_clone(i8* %0) {
%2 = tail call dereferenceable_or_null(4) i8* @malloc(i32 4)
%3 = icmp eq i8* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @memcpy(i8* %2, i8* %0, i32 4)
br label %6
6: ; preds = %1, %4
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ arr_dtor();
int /*<<< orphan*/ stack_clear();
void semantic_close() {
  stack_clear();
  arr_dtor();
}


x86 assembly (clang, -O0):
<semantic_close>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <stack_clear@plt>
mov    $0x0,%al
call   1030 <arr_dtor@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<semantic_close>:
push   %rax
xor    %eax,%eax
call   1040 <stack_clear@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <arr_dtor@plt>

LLVM IR (-O0):
define void @semantic_close() {
%1 = call i32 (...) @stack_clear()
%2 = call i32 (...) @arr_dtor()
ret void
}

LLVM IR (-O2):
define void @semantic_close() {
%1 = tail call i32 (...) @stack_clear()
%2 = tail call i32 (...) @arr_dtor()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, ...);
int main() {
  unsigned long a;
  unsigned long *p;
  p = (unsigned long *)&p;
  a = ++(*p);
  if (a - 1 != (unsigned long)&p) {
    printf("Error %d\n", (int)1);
    exit(1);
  };
  {
    printf("Success\n");
    exit(0);
  };
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
mov    (%rcx),%rax
add    $0x1,%rax
mov    %rax,(%rcx)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
sub    $0x1,%rax
lea    -0x18(%rbp),%rcx
cmp    %rcx,%rax
je     117b <main+0x5b>
lea    0xe9b(%rip),%rdi
mov    $0x1,%esi
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>
lea    0xe88(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0x1(%rsp),%rax
mov    %rax,(%rsp)
lea    0xecf(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"Error %d\0A\00"
@.str.1 = [9 x i8] c"Success\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64*
store i32 0, i32* %1
%4 = bitcast i64** %3 to i64*
store i64* %4, i64** %3
%5 = load i64*, i64** %3
%6 = load i64, i64* %5
%7 = add i64 %6, 1
store i64 %7, i64* %5
store i64 %7, i64* %2
%8 = load i64, i64* %2
%9 = sub i64 %8, 1
%10 = ptrtoint i64** %3 to i64
%11 = icmp ne i64 %9, %10
br i1 %11, label %12, label %15
12: ; preds = %0
%13 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 1)
%14 = call i32 @exit(i32 1)
unreachable
15: ; preds = %0
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
%17 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [8 x i8] c"Success\00"
define i32 @main() {
%1 = alloca i64*
%2 = bitcast i64** %1 to i8*
%3 = bitcast i64** %1 to i64*
%4 = ptrtoint i64** %1 to i64
%5 = or i64 %4, 1
store i64 %5, i64* %3
%6 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
%7 = call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ write(int /*<<< orphan*/, char *, int);
void sig_user1(int a) {
  write(0, "\nTerminando proceso...\n", sizeof("\nTerminando proceso...\n"));
  exit(0);
}


x86 assembly (clang, -O0):
<sig_user1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
lea    0xecc(%rip),%rsi
mov    $0x18,%edx
call   1030 <write@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<sig_user1>:
push   %rax
lea    0xed8(%rip),%rsi
xor    %edi,%edi
mov    $0x18,%edx
call   1030 <write@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"\0ATerminando proceso...\0A\00"
define void @sig_user1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @write(i32 0, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 24)
%4 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [24 x i8] c"\0ATerminando proceso...\0A\00"
define void @sig_user1(i32 %0) {
%2 = tail call i32 @write(i32 0, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 24)
%3 = tail call i32 @exit(i32 0)
unreachable
}
main(void) {
  char *cp = "\"± \"";
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
lea    0xeee(%rip),%rax
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [7 x i8] c"\22\C2\B1\C2\A0\22\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
void PKCS5_PBE_add(void) {}


x86 assembly (clang, -O0):
<PKCS5_PBE_add>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PKCS5_PBE_add>:
ret

LLVM IR (-O0):
define void @PKCS5_PBE_add() {
ret void
}

LLVM IR (-O2):
define void @PKCS5_PBE_add() {
ret void
}
unsigned long crb_process_keycode(long unit, long keycode, long again) {
  return 0xc000000000000000ul;
}


x86 assembly (clang, -O0):
<crb_process_keycode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movabs $0xc000000000000000,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<crb_process_keycode>:
movabs $0xc000000000000000,%rax
ret

LLVM IR (-O0):
define i64 @crb_process_keycode(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
ret i64 -4611686018427387904
}

LLVM IR (-O2):
define i64 @crb_process_keycode(i64 %0, i64 %1, i64 %2) {
ret i64 -4611686018427387904
}
int MemorySize(void *ptr) { return 0; }


x86 assembly (clang, -O0):
<MemorySize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<MemorySize>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @MemorySize(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @MemorySize(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ hoc_execerror(char *, int /*<<< orphan*/);
void hxe() { hoc_execerror("", 0); }


x86 assembly (clang, -O0):
<hxe>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
xor    %esi,%esi
call   1030 <hoc_execerror@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hxe>:
lea    0xee9(%rip),%rdi
xor    %esi,%esi
jmp    1030 <hoc_execerror@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define void @hxe() {
%1 = call i32 @hoc_execerror(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i32 0)
ret void
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define void @hxe() {
%1 = tail call i32 @hoc_execerror(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ AT_ENTRY;
long getauxval(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, long);
int main() {
  long int addr = getauxval(AT_ENTRY);
  printf("AT_ENTRY: 0x%Lu\n", addr);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
call   1040 <getauxval@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
call   1040 <getauxval@plt>
lea    0xeca(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@AT_ENTRY = global i32 0
@.str = [17 x i8] c"AT_ENTRY: 0x%Lu\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
store i32 0, i32* %1
%3 = load i32, i32* @AT_ENTRY
%4 = call i64 @getauxval(i32 %3)
store i64 %4, i64* %2
%5 = load i64, i64* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i64 %5)
ret i32 0
}

LLVM IR (-O2):
@AT_ENTRY = global i32 0
@.str = [17 x i8] c"AT_ENTRY: 0x%Lu\0A\00"
define i32 @main() {
%1 = load i32, i32* @AT_ENTRY
%2 = tail call i64 @getauxval(i32 %1)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i64 %2)
ret i32 0
}
char *hexenc_shortdesc(void) {
  return "encode data to their hexadecimal representation";
}


x86 assembly (clang, -O0):
<hexenc_shortdesc>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hexenc_shortdesc>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [48 x i8] c"encode data to their hexadecimal representation\00"
define i8* @hexenc_shortdesc() {
ret i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [48 x i8] c"encode data to their hexadecimal representation\00"
define i8* @hexenc_shortdesc() {
ret i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int rom_present(char *);
int gd5430_vlb_available(void) {
  return rom_present(L"roms/video/cirruslogic/diamondvlbus.bin");
}


x86 assembly (clang, -O0):
<gd5430_vlb_available>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <rom_present@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gd5430_vlb_available>:
lea    0xee9(%rip),%rdi
jmp    1030 <rom_present@plt>

LLVM IR (-O0):
@.str = [40 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 99, i32 105, i32 114, i32 114, i32 117, i32 115, i32 108, i32 111, i32 103, i32 105, i32 99, i32 47, i32 100, i32 105, i32 97, i32 109, i32 111, i32 110, i32 100, i32 118, i32 108, i32 98, i32 117, i32 115, i32 46, i32 98, i32 105, i32 110, i32 0]
define i32 @gd5430_vlb_available() {
%1 = call i32 @rom_present(i8* bitcast ([40 x i32]* @.str to i8*))
ret i32 %1
}

LLVM IR (-O2):
@.str = [40 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 99, i32 105, i32 114, i32 114, i32 117, i32 115, i32 108, i32 111, i32 103, i32 105, i32 99, i32 47, i32 100, i32 105, i32 97, i32 109, i32 111, i32 110, i32 100, i32 118, i32 108, i32 98, i32 117, i32 115, i32 46, i32 98, i32 105, i32 110, i32 0]
define i32 @gd5430_vlb_available() {
%1 = tail call i32 @rom_present(i8* bitcast ([40 x i32]* @.str to i8*))
ret i32 %1
}
/* Variables and functions */
void stub1(char, char);
void testClosureBBrV(void (*closure)(char, char), char a1, char a2) {
  if (closure != NULL)
    (*closure)(a1, a2);
}


x86 assembly (clang, -O0):
<testClosureBBrV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1132 <testClosureBBrV+0x32>
mov    -0x8(%rbp),%rax
mov    -0x9(%rbp),%cl
movsbl %cl,%edi
movsbl -0xa(%rbp),%esi
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testClosureBBrV>:
test   %rdi,%rdi
je     1111 <testClosureBBrV+0x11>
mov    %rdi,%rax
movsbl %sil,%edi
movsbl %dl,%esi
jmp    *%rax
ret

LLVM IR (-O0):
define void @testClosureBBrV(void (i8, i8)* %0, i8 signext %1, i8 signext %2) {
%4 = alloca void (i8, i8)*
%5 = alloca i8
%6 = alloca i8
store void (i8, i8)* %0, void (i8, i8)** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load void (i8, i8)*, void (i8, i8)** %4
%8 = icmp ne void (i8, i8)* %7, null
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = load void (i8, i8)*, void (i8, i8)** %4
%11 = load i8, i8* %5
%12 = load i8, i8* %6
br label %13
13: ; preds = %9, %3
ret void
}

LLVM IR (-O2):
define void @testClosureBBrV(void (i8, i8)* %0, i8 signext %1, i8 signext %2) {
%4 = icmp eq void (i8, i8)* %0, null
br i1 %4, label %6, label %5
5: ; preds = %3
tail call void %0(i8 signext %1, i8 signext %2)
br label %6
6: ; preds = %5, %3
ret void
}
unsigned long GPIODirModeGet(unsigned long ulPort, unsigned long ulBit) {
  ;
  ;
  if (ulBit < 8) {
    return (((*((volatile unsigned long *)(ulPort + 0x00000000))) &
             (0xF << (ulBit * 4))) >>
            (ulBit * 4));
  } else {
    return (((*((volatile unsigned long *)(ulPort + 0x00000004))) &
             (0xF << ((ulBit - 8) * 4))) >>
            ((ulBit - 8) * 4));
  }
}


x86 assembly (clang, -O0):
<GPIODirModeGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x8,-0x18(%rbp)
jae    1149 <GPIODirModeGet+0x49>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    -0x18(%rbp),%rcx
shl    $0x2,%rcx
mov    $0xf,%edx
shl    %cl,%edx
mov    %edx,%ecx
movslq %ecx,%rcx
and    %rcx,%rax
mov    -0x18(%rbp),%rcx
shl    $0x2,%rcx
shr    %cl,%rax
mov    %rax,-0x8(%rbp)
jmp    117f <GPIODirModeGet+0x7f>
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%rax
mov    -0x18(%rbp),%rcx
sub    $0x8,%rcx
shl    $0x2,%rcx
mov    $0xf,%edx
shl    %cl,%edx
mov    %edx,%ecx
movslq %ecx,%rcx
and    %rcx,%rax
mov    -0x18(%rbp),%rcx
sub    $0x8,%rcx
shl    $0x2,%rcx
shr    %cl,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIODirModeGet>:
lea    0x4(%rdi),%rdx
lea    0x0(,%rsi,4),%eax
cmp    $0x8,%rsi
cmovb  %rdi,%rdx
lea    -0x20(%rax),%ecx
movzbl %cl,%ecx
cmovb  %eax,%ecx
mov    $0xf,%eax
shl    %cl,%eax
cltq
and    (%rdx),%rax
shr    %cl,%rax
ret

LLVM IR (-O0):
define i64 @GPIODirModeGet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = icmp ult i64 %6, 8
br i1 %7, label %8, label %22
8: ; preds = %2
%9 = load i64, i64* %4
%10 = add i64 %9, 0
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = load i64, i64* %5
%14 = mul i64 %13, 4
%15 = trunc i64 %14 to i32
%16 = shl i32 15, %15
%17 = sext i32 %16 to i64
%18 = and i64 %12, %17
%19 = load i64, i64* %5
%20 = mul i64 %19, 4
%21 = lshr i64 %18, %20
store i64 %21, i64* %3
br label %38
22: ; preds = %2
%23 = load i64, i64* %4
%24 = add i64 %23, 4
%25 = inttoptr i64 %24 to i64*
%26 = load volatile i64, i64* %25
%27 = load i64, i64* %5
%28 = sub i64 %27, 8
%29 = mul i64 %28, 4
%30 = trunc i64 %29 to i32
%31 = shl i32 15, %30
%32 = sext i32 %31 to i64
%33 = and i64 %26, %32
%34 = load i64, i64* %5
%35 = sub i64 %34, 8
%36 = mul i64 %35, 4
%37 = lshr i64 %33, %36
store i64 %37, i64* %3
br label %38
38: ; preds = %22, %8
%39 = load i64, i64* %3
ret i64 %39
}

LLVM IR (-O2):
define i64 @GPIODirModeGet(i64 %0, i64 %1) {
%3 = icmp ult i64 %1, 8
%4 = add i64 %0, 4
%5 = shl i64 %1, 2
%6 = add i64 %5, -32
%7 = shl nuw nsw i64 %1, 2
%8 = select i1 %3, i64 %7, i64 %6
%9 = select i1 %3, i64 %0, i64 %4
%10 = inttoptr i64 %9 to i64*
%11 = load volatile i64, i64* %10
%12 = trunc i64 %8 to i32
%13 = shl i32 15, %12
%14 = sext i32 %13 to i64
%15 = and i64 %11, %14
%16 = lshr i64 %15, %8
ret i64 %16
}