xunge/DecIR huggingface dataset:
void Hal_hook_rd_sgnbfield(void) {}


x86 assembly (clang, -O0):
<Hal_hook_rd_sgnbfield>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Hal_hook_rd_sgnbfield>:
ret

LLVM IR (-O0):
define void @Hal_hook_rd_sgnbfield() {
ret void
}

LLVM IR (-O2):
define void @Hal_hook_rd_sgnbfield() {
ret void
}
void f1(int *x) {
  for (int j = 0; j < 2; ++j)
    x[j] += 1;
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x2,-0xc(%rbp)
jge    1138 <f1+0x38>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
add    $0x1,%edx
mov    %edx,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <f1+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
addl   $0x1,(%rdi)
addl   $0x1,0x4(%rdi)
ret

LLVM IR (-O0):
define void @f1(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 2
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load i32*, i32** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
%13 = add nsw i32 %12, 1
store i32 %13, i32* %11
br label %14
14: ; preds = %7
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %4
17: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @f1(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = add nsw i32 %2, 1
store i32 %3, i32* %0
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = add nsw i32 %5, 1
store i32 %6, i32* %4
ret void
}
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ epoll7(struct __test_metadata *);
void wrapper_epoll7(struct __test_metadata *_metadata,
                    struct __fixture_variant_metadata *variant) {
  epoll7(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_epoll7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <epoll7@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_epoll7>:
jmp    1030 <epoll7@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll7(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @epoll7(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll7(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @epoll7(%struct.__test_metadata* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ f(int /*<<< orphan*/, int);
int main() {
  if (!f(0, 2))
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
mov    $0x2,%esi
call   1040 <f@plt>
cmp    $0x0,%eax
jne    114b <main+0x2b>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
mov    $0x2,%esi
call   1040 <f@plt>
test   %eax,%eax
je     1135 <main+0x15>
xor    %eax,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @f(i32 0, i32 2)
%3 = icmp ne i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %0
%5 = call i32 (...) @abort()
unreachable
6: ; preds = %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @f(i32 0, i32 2)
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
ret i32 0
}
char getprintablechar(char a) {
  if (a >= ' ' && a <= '~')
    return a;
  return '.';
}


x86 assembly (clang, -O0):
<getprintablechar>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
cmp    $0x20,%eax
jl     112f <getprintablechar+0x2f>
movsbl -0x2(%rbp),%eax
cmp    $0x7e,%eax
jg     112f <getprintablechar+0x2f>
mov    -0x2(%rbp),%al
mov    %al,-0x1(%rbp)
jmp    1133 <getprintablechar+0x33>
movb   $0x2e,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getprintablechar>:
lea    -0x20(%rdi),%eax
cmp    $0x5f,%al
mov    $0x2e,%eax
cmovb  %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @getprintablechar(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 32
br i1 %6, label %7, label %13
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 126
br i1 %10, label %11, label %13
11: ; preds = %7
%12 = load i8, i8* %3
store i8 %12, i8* %2
br label %14
13: ; preds = %7, %1
store i8 46, i8* %2
br label %14
14: ; preds = %13, %11
%15 = load i8, i8* %2
ret i8 %15
}

LLVM IR (-O2):
define signext i8 @getprintablechar(i8 signext %0) {
%2 = add i8 %0, -32
%3 = icmp ult i8 %2, 95
%4 = select i1 %3, i8 %0, i8 46
ret i8 %4
}
/* Variables and functions */
int snprintf(char *, unsigned int, char *, unsigned long);
int rate_print_pps(unsigned long rate, char *buf, unsigned n) {
  int chars;
  chars = snprintf(buf, n, "%9lu pps", rate);
  buf[n - 1] = '\0';
  return chars;
}


x86 assembly (clang, -O0):
<rate_print_pps>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x8(%rbp),%rcx
lea    0xecb(%rip),%rdx
call   1030 <snprintf@plt>
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
sub    $0x1,%ecx
mov    %ecx,%ecx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rate_print_pps>:
push   %r14
push   %rbx
push   %rax
mov    %edx,%ebx
mov    %rsi,%r14
mov    %rdi,%rcx
lea    0xedd(%rip),%rdx
mov    %rsi,%rdi
mov    %ebx,%esi
call   1030 <snprintf@plt>
add    $0xffffffff,%ebx
movb   $0x0,(%r14,%rbx,1)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [9 x i8] c"%9lu pps\00"
define i32 @rate_print_pps(i64 %0, i8* %1, i32 %2) {
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i64 %0, i64* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = load i64, i64* %4
%11 = call i32 @snprintf(i8* %8, i32 %9, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 %10)
store i32 %11, i32* %7
%12 = load i8*, i8** %5
%13 = load i32, i32* %6
%14 = sub i32 %13, 1
%15 = zext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %12, i64 %15
store i8 0, i8* %16
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
@.str = [9 x i8] c"%9lu pps\00"
define i32 @rate_print_pps(i64 %0, i8* %1, i32 %2) {
%4 = tail call i32 @snprintf(i8* %1, i32 %2, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 %0)
%5 = add i32 %2, -1
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds i8, i8* %1, i64 %6
store i8 0, i8* %7
ret i32 %4
}
/* Type definitions */
typedef int __le16;

/* Variables and functions */
int __cpu_to_le16(int);
int ieee80211_is_reassoc_req(__le16 fc) {
  return (fc & __cpu_to_le16(0x000c | 0x00f0)) ==
         __cpu_to_le16(0x0000 | 0x0020);
}


x86 assembly (clang, -O0):
<ieee80211_is_reassoc_req>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0xfc,%edi
call   1030 <__cpu_to_le16@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
and    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    $0x20,%edi
call   1030 <__cpu_to_le16@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ieee80211_is_reassoc_req>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    $0xfc,%edi
call   1030 <__cpu_to_le16@plt>
mov    %eax,%ebp
and    %ebx,%ebp
mov    $0x20,%edi
call   1030 <__cpu_to_le16@plt>
xor    %ecx,%ecx
cmp    %eax,%ebp
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @ieee80211_is_reassoc_req(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__cpu_to_le16(i32 252)
%5 = and i32 %3, %4
%6 = call i32 @__cpu_to_le16(i32 32)
%7 = icmp eq i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @ieee80211_is_reassoc_req(i32 %0) {
%2 = tail call i32 @__cpu_to_le16(i32 252)
%3 = and i32 %2, %0
%4 = tail call i32 @__cpu_to_le16(i32 32)
%5 = icmp eq i32 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
uint8_t *EMACRxDMACurrentBufferGet(uint32_t ui32Base) {
  return ((uint8_t *)(*((volatile uint32_t *)(ui32Base + 0x00000C54))));
}


x86 assembly (clang, -O0):
<EMACRxDMACurrentBufferGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0xc54(%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<EMACRxDMACurrentBufferGet>:
mov    0xc54(%rdi),%rax
ret

LLVM IR (-O0):
define i32* @EMACRxDMACurrentBufferGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 3156
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = inttoptr i64 %6 to i32*
ret i32* %7
}

LLVM IR (-O2):
define i32* @EMACRxDMACurrentBufferGet(i64 %0) {
%2 = add nsw i64 %0, 3156
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = inttoptr i64 %4 to i32*
ret i32* %5
}
double viprod(x, y)
struct v *x, *y;
{
  return (vsume(vprod(x, y)));
}


x86 assembly (clang, -O0):
<viprod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1030 <vprod@plt>
mov    %eax,%edi
mov    $0x0,%al
call   1040 <vsume@plt>
cvtsi2sd %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<viprod>:
push   %rax
xor    %eax,%eax
call   1030 <vprod@plt>
mov    %eax,%edi
xor    %eax,%eax
call   1040 <vsume@plt>
cvtsi2sd %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
%struct.v = type opaque
define double @viprod(%struct.v* %0, %struct.v* %1) {
%3 = alloca %struct.v*
%4 = alloca %struct.v*
store %struct.v* %0, %struct.v** %3
store %struct.v* %1, %struct.v** %4
%5 = load %struct.v*, %struct.v** %3
%6 = load %struct.v*, %struct.v** %4
%7 = call i32 (%struct.v*, %struct.v*, ...) bitcast (i32 (...)* @vprod to i32 (%struct.v*, %struct.v*, ...)*)(%struct.v* %5, %struct.v* %6)
%8 = call i32 (i32, ...) bitcast (i32 (...)* @vsume to i32 (i32, ...)*)(i32 %7)
%9 = sitofp i32 %8 to double
ret double %9
}

LLVM IR (-O2):
%struct.v = type opaque
define double @viprod(%struct.v* %0, %struct.v* %1) {
%3 = tail call i32 (%struct.v*, %struct.v*, ...) bitcast (i32 (...)* @vprod to i32 (%struct.v*, %struct.v*, ...)*)(%struct.v* %0, %struct.v* %1)
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @vsume to i32 (i32, ...)*)(i32 %3)
%5 = sitofp i32 %4 to double
ret double %5
}
void g_idle_remove_by_data() {}


x86 assembly (clang, -O0):
<g_idle_remove_by_data>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_idle_remove_by_data>:
ret

LLVM IR (-O0):
define void @g_idle_remove_by_data() {
ret void
}

LLVM IR (-O2):
define void @g_idle_remove_by_data() {
ret void
}
/* Variables and functions */
char *memcpy(char *, char const *, scalar_t__);
scalar_t__ strlen(char const *);
char *strcpy(char *restrict whither, const char *restrict whence) {
  return memcpy(whither, whence, strlen(whence) + 1);
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %rax,%rdx
add    $0x1,%rdx
call   1040 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
lea    0x1(%rax),%rdx
mov    %r14,%rdi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <memcpy@plt>

LLVM IR (-O0):
define i8* @strcpy(i8* noalias %0, i8* noalias %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i64 @strlen(i8* %7)
%9 = add nsw i64 %8, 1
%10 = call i8* @memcpy(i8* %5, i8* %6, i64 %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @strcpy(i8* noalias returned writeonly %0, i8* noalias nocapture %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = add nsw i64 %3, 1
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 %4, i1 false)
ret i8* %0
}
/* Variables and functions */
char *strcpy(char *, char const *);
char *strcpy_P(char *dest, const char *src) { return strcpy(dest, src); }


x86 assembly (clang, -O0):
<strcpy_P>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy_P>:
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
define i8* @strcpy_P(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @strcpy(i8* %5, i8* %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @strcpy_P(i8* returned %0, i8* nocapture %1) {
%3 = tail call i8* @strcpy(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i8* %0
}
void g_utf8_collate_key() {}


x86 assembly (clang, -O0):
<g_utf8_collate_key>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_utf8_collate_key>:
ret

LLVM IR (-O0):
define void @g_utf8_collate_key() {
ret void
}

LLVM IR (-O2):
define void @g_utf8_collate_key() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_tagstruct_put_boolean() {
  printf("NOT IMPLEMENTED:"
         "pa_tagstruct_put_boolean"
         "\n");
}


x86 assembly (clang, -O0):
<pa_tagstruct_put_boolean>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_tagstruct_put_boolean>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [42 x i8] c"NOT IMPLEMENTED:pa_tagstruct_put_boolean\0A\00"
define i32 @pa_tagstruct_put_boolean() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [41 x i8] c"NOT IMPLEMENTED:pa_tagstruct_put_boolean\00"
define i32 @pa_tagstruct_put_boolean() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([41 x i8], [41 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
int test_imm_C2int64_highword_reg(long long val) {
  return ((val >> 32) & (0xC2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C2int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xc2,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C2int64_highword_reg>:
movabs $0xc200000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C2int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 194
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C2int64_highword_reg(i64 %0) {
%2 = and i64 %0, 833223655424
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ lngtxt(int);
int /*<<< orphan*/ p_log(int, int, int /*<<< orphan*/);
int /*<<< orphan*/ usr1_error(int);
int cmdsockstat(int usern) {
  p_log(0x0000, usern, lngtxt(22));
  usr1_error(31337);
  p_log(0x0000, usern, lngtxt(23));
}


x86 assembly (clang, -O0):
<cmdsockstat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    $0x16,%edi
call   1050 <lngtxt@plt>
mov    -0x10(%rbp),%esi
mov    %eax,%edx
xor    %edi,%edi
call   1030 <p_log@plt>
mov    $0x7a69,%edi
call   1040 <usr1_error@plt>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0x17,%edi
call   1050 <lngtxt@plt>
mov    -0xc(%rbp),%esi
mov    %eax,%edx
xor    %edi,%edi
call   1030 <p_log@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmdsockstat>:
push   %rbx
mov    %edi,%ebx
mov    $0x16,%edi
call   1050 <lngtxt@plt>
xor    %edi,%edi
mov    %ebx,%esi
mov    %eax,%edx
call   1030 <p_log@plt>
mov    $0x7a69,%edi
call   1040 <usr1_error@plt>
mov    $0x17,%edi
call   1050 <lngtxt@plt>
xor    %edi,%edi
mov    %ebx,%esi
mov    %eax,%edx
pop    %rbx
jmp    1030 <p_log@plt>

LLVM IR (-O0):
define i32 @cmdsockstat(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 @lngtxt(i32 22)
%6 = call i32 @p_log(i32 0, i32 %4, i32 %5)
%7 = call i32 @usr1_error(i32 31337)
%8 = load i32, i32* %3
%9 = call i32 @lngtxt(i32 23)
%10 = call i32 @p_log(i32 0, i32 %8, i32 %9)
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @cmdsockstat(i32 %0) {
%2 = tail call i32 @lngtxt(i32 22)
%3 = tail call i32 @p_log(i32 0, i32 %0, i32 %2)
%4 = tail call i32 @usr1_error(i32 31337)
%5 = tail call i32 @lngtxt(i32 23)
%6 = tail call i32 @p_log(i32 0, i32 %0, i32 %5)
ret i32 undef
}
void az_list_swap_(int *num1, int *max1, void **items1, int *num2, int *max2,
                   void **items2) {
  const int temp_num = *num1;
  const int temp_max = *max1;
  void *temp_items = *items1;
  *num1 = *num2;
  *max1 = *max2;
  *items1 = *items2;
  *num2 = temp_num;
  *max2 = temp_max;
  *items2 = temp_items;
}


x86 assembly (clang, -O0):
<az_list_swap_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x34(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x38(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x40(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x28(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x30(%rbp),%rax
mov    (%rax),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x34(%rbp),%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x38(%rbp),%ecx
mov    -0x28(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x40(%rbp),%rcx
mov    -0x30(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<az_list_swap_>:
push   %rbx
mov    (%rdi),%eax
mov    (%rsi),%r10d
mov    (%rdx),%r11
mov    (%rcx),%ebx
mov    %ebx,(%rdi)
mov    (%r8),%edi
mov    %edi,(%rsi)
mov    (%r9),%rsi
mov    %rsi,(%rdx)
mov    %eax,(%rcx)
mov    %r10d,(%r8)
mov    %r11,(%r9)
pop    %rbx
ret

LLVM IR (-O0):
define void @az_list_swap_(i32* %0, i32* %1, i8** %2, i32* %3, i32* %4, i8** %5) {
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i8**
%10 = alloca i32*
%11 = alloca i32*
%12 = alloca i8**
%13 = alloca i32
%14 = alloca i32
%15 = alloca i8*
store i32* %0, i32** %7
store i32* %1, i32** %8
store i8** %2, i8*** %9
store i32* %3, i32** %10
store i32* %4, i32** %11
store i8** %5, i8*** %12
%16 = load i32*, i32** %7
%17 = load i32, i32* %16
store i32 %17, i32* %13
%18 = load i32*, i32** %8
%19 = load i32, i32* %18
store i32 %19, i32* %14
%20 = load i8**, i8*** %9
%21 = load i8*, i8** %20
store i8* %21, i8** %15
%22 = load i32*, i32** %10
%23 = load i32, i32* %22
%24 = load i32*, i32** %7
store i32 %23, i32* %24
%25 = load i32*, i32** %11
%26 = load i32, i32* %25
%27 = load i32*, i32** %8
store i32 %26, i32* %27
%28 = load i8**, i8*** %12
%29 = load i8*, i8** %28
%30 = load i8**, i8*** %9
store i8* %29, i8** %30
%31 = load i32, i32* %13
%32 = load i32*, i32** %10
store i32 %31, i32* %32
%33 = load i32, i32* %14
%34 = load i32*, i32** %11
store i32 %33, i32* %34
%35 = load i8*, i8** %15
%36 = load i8**, i8*** %12
store i8* %35, i8** %36
ret void
}

LLVM IR (-O2):
define void @az_list_swap_(i32* nocapture %0, i32* nocapture %1, i8** nocapture %2, i32* nocapture %3, i32* nocapture %4, i8** nocapture %5) {
%7 = load i32, i32* %0
%8 = load i32, i32* %1
%9 = load i8*, i8** %2
%10 = load i32, i32* %3
store i32 %10, i32* %0
%11 = load i32, i32* %4
store i32 %11, i32* %1
%12 = load i8*, i8** %5
store i8* %12, i8** %2
store i32 %7, i32* %3
store i32 %8, i32* %4
store i8* %9, i8** %5
ret void
}
int test_imm_CBuint16_reg(unsigned short val) {
  return ((val) & (0xCB << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CBuint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xcb,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CBuint16_reg>:
test   $0xcb,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CBuint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 203
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_CBuint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 203
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void gensub() {}


x86 assembly (clang, -O0):
<gensub>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gensub>:
ret

LLVM IR (-O0):
define void @gensub() {
ret void
}

LLVM IR (-O2):
define void @gensub() {
ret void
}
void __attribute__((destructor)) mylib1_fini(void) {
  printf("Fini function %s\n", __FUNCTION__);
}


x86 assembly (clang, -O0):
<mylib1_fini>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xef0(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mylib1_fini>:
lea    0xee9(%rip),%rdi
lea    0xef4(%rip),%rsi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"Fini function %s\0A\00"
@__FUNCTION__.mylib1_fini = [12 x i8] c"mylib1_fini\00"
@llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @mylib1_fini, i8* null }]
define void @mylib1_fini() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @__FUNCTION__.mylib1_fini, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"Fini function %s\0A\00"
@__FUNCTION__.mylib1_fini = [12 x i8] c"mylib1_fini\00"
@llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @mylib1_fini, i8* null }]
define void @mylib1_fini() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @__FUNCTION__.mylib1_fini, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef scalar_t__ int32_t;

/* Variables and functions */
int32_t min32(int32_t x, int32_t y) { return x < y ? x : y; }


x86 assembly (clang, -O0):
<min32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1127 <min32+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <min32+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min32>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovl  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @min32(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @min32(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
scalar_t__ npm_isdbt_init();
char NMI320_init() {
  if (npm_isdbt_init() > 0)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<NMI320_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <npm_isdbt_init@plt>
cmp    $0x0,%rax
jle    1132 <NMI320_init+0x22>
movb   $0x1,-0x1(%rbp)
jmp    1136 <NMI320_init+0x26>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NMI320_init>:
push   %rax
xor    %eax,%eax
call   1030 <npm_isdbt_init@plt>
test   %rax,%rax
setg   %al
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @NMI320_init() {
%1 = alloca i8
%2 = call i64 (...) @npm_isdbt_init()
%3 = icmp sgt i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
store i8 1, i8* %1
br label %6
5: ; preds = %0
store i8 0, i8* %1
br label %6
6: ; preds = %5, %4
%7 = load i8, i8* %1
ret i8 %7
}

LLVM IR (-O2):
define signext i8 @NMI320_init() {
%1 = tail call i64 (...) @npm_isdbt_init()
%2 = icmp sgt i64 %1, 0
%3 = zext i1 %2 to i8
ret i8 %3
}
/* Variables and functions */
scalar_t__ geteuid();
long GETEUID() { return ((long)geteuid()); }


x86 assembly (clang, -O0):
<GETEUID>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <geteuid@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GETEUID>:
xor    %eax,%eax
jmp    1030 <geteuid@plt>

LLVM IR (-O0):
define i64 @GETEUID() {
%1 = call i64 (...) @geteuid()
ret i64 %1
}

LLVM IR (-O2):
define i64 @GETEUID() {
%1 = tail call i64 (...) @geteuid()
ret i64 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
size_t mbsrtowcs(int /*<<< orphan*/ *, void *, size_t, int /*<<< orphan*/);
size_t mbstowcs(wchar_t *restrict ws, const char *restrict s, size_t wn) {
  return mbsrtowcs(ws, (void *)&s, wn, 0);
}


x86 assembly (clang, -O0):
<mbstowcs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
call   1030 <mbsrtowcs@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mbstowcs>:
push   %rax
mov    %rsi,(%rsp)
mov    %rsp,%rsi
xor    %ecx,%ecx
call   1030 <mbsrtowcs@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i64 @mbstowcs(i32* noalias %0, i8* noalias %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i64
store i32* %0, i32** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32*, i32** %4
%8 = bitcast i8** %5 to i8*
%9 = load i64, i64* %6
%10 = call i64 @mbsrtowcs(i32* %7, i8* %8, i64 %9, i32 0)
ret i64 %10
}

LLVM IR (-O2):
define i64 @mbstowcs(i32* noalias %0, i8* noalias %1, i64 %2) {
%4 = alloca i8*
store i8* %1, i8** %4
%5 = bitcast i8** %4 to i8*
%6 = call i64 @mbsrtowcs(i32* %0, i8* %5, i64 %2, i32 0)
ret i64 %6
}
int my_isupper(int c) { return (unsigned)c - 'A' < 26; }


x86 assembly (clang, -O0):
<my_isupper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x41,%eax
cmp    $0x1a,%eax
setb   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_isupper>:
add    $0xffffffbf,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @my_isupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub i32 %3, 65
%5 = icmp ult i32 %4, 26
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @my_isupper(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ endwin();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ set_ticker(int /*<<< orphan*/);
int /*<<< orphan*/ tty_mode(int);
void sigint_handler(int sig) {
  tty_mode(1);
  set_ticker(0);
  endwin();
  exit(0);
}


x86 assembly (clang, -O0):
<sigint_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
call   1050 <tty_mode@plt>
xor    %edi,%edi
call   1030 <set_ticker@plt>
mov    $0x0,%al
call   1040 <endwin@plt>
xor    %edi,%edi
call   1060 <exit@plt>

x86 assembly (clang, -O2):
<sigint_handler>:
push   %rax
mov    $0x1,%edi
call   1050 <tty_mode@plt>
xor    %edi,%edi
call   1030 <set_ticker@plt>
xor    %eax,%eax
call   1040 <endwin@plt>
xor    %edi,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
define void @sigint_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @tty_mode(i32 1)
%4 = call i32 @set_ticker(i32 0)
%5 = call i32 (...) @endwin()
%6 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @sigint_handler(i32 %0) {
%2 = tail call i32 @tty_mode(i32 1)
%3 = tail call i32 @set_ticker(i32 0)
%4 = tail call i32 (...) @endwin()
%5 = tail call i32 @exit(i32 0)
unreachable
}
void Idle(void) {}


x86 assembly (clang, -O0):
<Idle>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Idle>:
ret

LLVM IR (-O0):
define void @Idle() {
ret void
}

LLVM IR (-O2):
define void @Idle() {
ret void
}
int test_imm_79int16_mem(short *val) {
  return ((*val) & (0x79 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_79int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0x79,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_79int16_mem>:
testb  $0x79,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_79int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 121
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_79int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 121
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ getFileTimestampEpochSeconds(char *);
char *getStringCopy(int /*<<< orphan*/);
int /*<<< orphan*/ i_to_a(int /*<<< orphan*/);
char *getFileTimestampString(char *filename) {
  return getStringCopy(i_to_a(getFileTimestampEpochSeconds(filename)));
}


x86 assembly (clang, -O0):
<getFileTimestampString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getFileTimestampEpochSeconds@plt>
mov    %eax,%edi
call   1050 <i_to_a@plt>
mov    %eax,%edi
call   1040 <getStringCopy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getFileTimestampString>:
push   %rax
call   1030 <getFileTimestampEpochSeconds@plt>
mov    %eax,%edi
call   1050 <i_to_a@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <getStringCopy@plt>

LLVM IR (-O0):
define i8* @getFileTimestampString(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @getFileTimestampEpochSeconds(i8* %3)
%5 = call i32 @i_to_a(i32 %4)
%6 = call i8* @getStringCopy(i32 %5)
ret i8* %6
}

LLVM IR (-O2):
define i8* @getFileTimestampString(i8* %0) {
%2 = tail call i32 @getFileTimestampEpochSeconds(i8* %0)
%3 = tail call i32 @i_to_a(i32 %2)
%4 = tail call i8* @getStringCopy(i32 %3)
ret i8* %4
}
int su_platform_uninit() { return 0; }


x86 assembly (clang, -O0):
<su_platform_uninit>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<su_platform_uninit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @su_platform_uninit() {
ret i32 0
}

LLVM IR (-O2):
define i32 @su_platform_uninit() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ SIGABRT;
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int getpid();
int /*<<< orphan*/ kill(int, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void wrong_widget(char *routine) {
  int mypid = getpid();
  fprintf(stderr, "Wrong class of widget passed to %s\n", routine);
  fflush(stderr);
  kill(mypid, SIGABRT);
}


x86 assembly (clang, -O0):
<wrong_widget>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,-0xc(%rbp)
mov    0x2e83(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xe96(%rip),%rsi
call   1040 <fprintf@plt>
mov    0x2e6a(%rip),%rax
mov    (%rax),%edi
call   1060 <fflush@plt>
mov    -0xc(%rbp),%edi
mov    0x2e51(%rip),%rax
mov    (%rax),%esi
call   1050 <kill@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrong_widget>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <getpid@plt>
mov    %eax,%ebp
mov    0x2e89(%rip),%r14
mov    (%r14),%edi
lea    0xe9f(%rip),%rsi
mov    %rbx,%rdx
call   1040 <fprintf@plt>
mov    (%r14),%edi
call   1060 <fflush@plt>
mov    0x2e60(%rip),%rax
mov    (%rax),%esi
mov    %ebp,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1050 <kill@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [36 x i8] c"Wrong class of widget passed to %s\0A\00"
@SIGABRT = global i32 0
define void @wrong_widget(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = call i32 (...) @getpid()
store i32 %4, i32* %3
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %2
%7 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = load i32, i32* @stderr
%9 = call i32 @fflush(i32 %8)
%10 = load i32, i32* %3
%11 = load i32, i32* @SIGABRT
%12 = call i32 @kill(i32 %10, i32 %11)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [36 x i8] c"Wrong class of widget passed to %s\0A\00"
@SIGABRT = global i32 0
define void @wrong_widget(i8* %0) {
%2 = tail call i32 (...) @getpid()
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i8* %0)
%5 = load i32, i32* @stderr
%6 = tail call i32 @fflush(i32 %5)
%7 = load i32, i32* @SIGABRT
%8 = tail call i32 @kill(i32 %2, i32 %7)
ret void
}
int CharToInt(char *str) {
  int res = 0;
  while (*str != '\0') {
    res *= 10;
    res += *str++ & 0x0F;
  }
  return res;
}


x86 assembly (clang, -O0):
<CharToInt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1146 <CharToInt+0x46>
imul   $0xa,-0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
and    $0xf,%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    110f <CharToInt+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CharToInt>:
mov    (%rdi),%cl
test   %cl,%cl
je     1128 <CharToInt+0x28>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
lea    (%rax,%rax,4),%eax
and    $0xf,%cl
movzbl %cl,%ecx
lea    (%rcx,%rax,2),%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <CharToInt+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @CharToInt(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %19
9: ; preds = %4
%10 = load i32, i32* %3
%11 = mul nsw i32 %10, 10
store i32 %11, i32* %3
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %2
%14 = load i8, i8* %12
%15 = sext i8 %14 to i32
%16 = and i32 %15, 15
%17 = load i32, i32* %3
%18 = add nsw i32 %17, %16
store i32 %18, i32* %3
br label %4
19: ; preds = %4
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @CharToInt(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %13, %4 ], [ %2, %1 ]
%6 = phi i32 [ %12, %4 ], [ 0, %1 ]
%7 = phi i8* [ %9, %4 ], [ %0, %1 ]
%8 = mul nsw i32 %6, 10
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = and i8 %5, 15
%11 = zext i8 %10 to i32
%12 = add nsw i32 %8, %11
%13 = load i8, i8* %9
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %4, %1
%16 = phi i32 [ 0, %1 ], [ %12, %4 ]
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ __bitmap_shift_right(unsigned long *, unsigned long const *,
                                        int, int);
void bitmap_shift_right(unsigned long *dst, const unsigned long *src, int n,
                        int nbits) {
  if (nbits <= ((int)sizeof(unsigned long) * 8))
    *dst = *src >> n;
  else
    __bitmap_shift_right(dst, src, n, nbits);
}


x86 assembly (clang, -O0):
<bitmap_shift_right>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
cmpl   $0x40,-0x18(%rbp)
jg     114c <bitmap_shift_right+0x3c>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    -0x14(%rbp),%ecx
shr    %cl,%rax
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
jmp    115f <bitmap_shift_right+0x4f>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
call   1030 <__bitmap_shift_right@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitmap_shift_right>:
cmp    $0x40,%ecx
jg     1121 <bitmap_shift_right+0x11>
mov    (%rsi),%rax
mov    %edx,%ecx
shr    %cl,%rax
mov    %rax,(%rdi)
ret
jmp    1030 <__bitmap_shift_right@plt>

LLVM IR (-O0):
define void @bitmap_shift_right(i64* %0, i64* %1, i32 %2, i32 %3) {
%5 = alloca i64*
%6 = alloca i64*
%7 = alloca i32
%8 = alloca i32
store i64* %0, i64** %5
store i64* %1, i64** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %8
%10 = icmp sle i32 %9, 64
br i1 %10, label %11, label %18
11: ; preds = %4
%12 = load i64*, i64** %6
%13 = load i64, i64* %12
%14 = load i32, i32* %7
%15 = zext i32 %14 to i64
%16 = lshr i64 %13, %15
%17 = load i64*, i64** %5
store i64 %16, i64* %17
br label %24
18: ; preds = %4
%19 = load i64*, i64** %5
%20 = load i64*, i64** %6
%21 = load i32, i32* %7
%22 = load i32, i32* %8
%23 = call i32 @__bitmap_shift_right(i64* %19, i64* %20, i32 %21, i32 %22)
br label %24
24: ; preds = %18, %11
ret void
}

LLVM IR (-O2):
define void @bitmap_shift_right(i64* %0, i64* %1, i32 %2, i32 %3) {
%5 = icmp slt i32 %3, 65
br i1 %5, label %6, label %10
6: ; preds = %4
%7 = load i64, i64* %1
%8 = zext i32 %2 to i64
%9 = lshr i64 %7, %8
store i64 %9, i64* %0
br label %12
10: ; preds = %4
%11 = tail call i32 @__bitmap_shift_right(i64* %0, i64* %1, i32 %2, i32 %3)
br label %12
12: ; preds = %10, %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int add(int a, int b) {
  printf("dynamic link library : add\n");
  return a + b;
}


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
lea    0xee2(%rip),%rdi
call   1030 <puts@plt>
add    %ebx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [28 x i8] c"dynamic link library : add\0A\00"
define i32 @add(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = add nsw i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
@str = [27 x i8] c"dynamic link library : add\00"
define i32 @add(i32 %0, i32 %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @str, i64 0, i64 0))
%4 = add nsw i32 %1, %0
ret i32 %4
}
/* Variables and functions */
int can_change_color();
int wrap_can_change_color(void) { return can_change_color(); }


x86 assembly (clang, -O0):
<wrap_can_change_color>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <can_change_color@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrap_can_change_color>:
xor    %eax,%eax
jmp    1030 <can_change_color@plt>

LLVM IR (-O0):
define i32 @wrap_can_change_color() {
%1 = call i32 (...) @can_change_color()
ret i32 %1
}

LLVM IR (-O2):
define i32 @wrap_can_change_color() {
%1 = tail call i32 (...) @can_change_color()
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ mask;
typedef int /*<<< orphan*/ cpu_set_t;

/* Variables and functions */
int /*<<< orphan*/ sched_getaffinity(int, int, int /*<<< orphan*/ *);
int main() {
  cpu_set_t mask;
  sched_getaffinity(0, sizeof(mask), &mask);
  sched_getaffinity(-1, sizeof(mask), &mask);
  sched_getaffinity(0, sizeof(mask), (cpu_set_t *)-1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
mov    $0x4,%esi
lea    -0x8(%rbp),%rdx
call   1030 <sched_getaffinity@plt>
mov    $0xffffffff,%edi
mov    $0x4,%esi
lea    -0x8(%rbp),%rdx
call   1030 <sched_getaffinity@plt>
xor    %edi,%edi
mov    $0x4,%esi
mov    $0xffffffffffffffff,%rdx
call   1030 <sched_getaffinity@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
xor    %edi,%edi
mov    $0x4,%esi
mov    %rbx,%rdx
call   1030 <sched_getaffinity@plt>
mov    $0xffffffff,%edi
mov    $0x4,%esi
mov    %rbx,%rdx
call   1030 <sched_getaffinity@plt>
xor    %edi,%edi
mov    $0x4,%esi
mov    $0xffffffffffffffff,%rdx
call   1030 <sched_getaffinity@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @sched_getaffinity(i32 0, i32 4, i32* %2)
%4 = call i32 @sched_getaffinity(i32 -1, i32 4, i32* %2)
%5 = call i32 @sched_getaffinity(i32 0, i32 4, i32* inttoptr (i64 -1 to i32*))
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @sched_getaffinity(i32 0, i32 4, i32* %1)
%4 = call i32 @sched_getaffinity(i32 -1, i32 4, i32* %1)
%5 = call i32 @sched_getaffinity(i32 0, i32 4, i32* inttoptr (i64 -1 to i32*))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ postamble();
int /*<<< orphan*/ preamble();
int /*<<< orphan*/ walkpages();
void dvimain(void) {
  postamble();
  preamble();
  walkpages();
  return;
}


x86 assembly (clang, -O0):
<dvimain>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <postamble@plt>
mov    $0x0,%al
call   1050 <preamble@plt>
mov    $0x0,%al
call   1030 <walkpages@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dvimain>:
push   %rax
xor    %eax,%eax
call   1040 <postamble@plt>
xor    %eax,%eax
call   1050 <preamble@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <walkpages@plt>

LLVM IR (-O0):
define void @dvimain() {
%1 = call i32 (...) @postamble()
%2 = call i32 (...) @preamble()
%3 = call i32 (...) @walkpages()
ret void
}

LLVM IR (-O2):
define void @dvimain() {
%1 = tail call i32 (...) @postamble()
%2 = tail call i32 (...) @preamble()
%3 = tail call i32 (...) @walkpages()
ret void
}
/* Variables and functions */
int range_ptrinbuf(const void *buf, size_t len, const void *ptr) {
  register const char *c = (const char *)buf;
  return (c && ((uintptr_t)c) + len > (uintptr_t)c &&
          (uintptr_t)((const char *)ptr - c) < len);
}


x86 assembly (clang, -O0):
<range_ptrinbuf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x20(%rbp)
mov    %al,-0x21(%rbp)
je     1157 <range_ptrinbuf+0x57>
mov    -0x20(%rbp),%rcx
add    -0x10(%rbp),%rcx
mov    -0x20(%rbp),%rdx
xor    %eax,%eax
cmp    %rdx,%rcx
mov    %al,-0x21(%rbp)
jbe    1157 <range_ptrinbuf+0x57>
mov    -0x18(%rbp),%rax
mov    -0x20(%rbp),%rcx
sub    %rcx,%rax
cmp    -0x10(%rbp),%rax
setb   %al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<range_ptrinbuf>:
xor    %eax,%eax
test   %rdi,%rdi
je     111b <range_ptrinbuf+0x1b>
lea    (%rdi,%rsi,1),%rcx
cmp    %rdi,%rcx
jbe    111b <range_ptrinbuf+0x1b>
sub    %rdi,%rdx
xor    %eax,%eax
cmp    %rsi,%rdx
setb   %al
ret

LLVM IR (-O0):
define i32 @range_ptrinbuf(i8* %0, i64 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
%7 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i8* %2, i8** %6
%8 = load i8*, i8** %4
store i8* %8, i8** %7
%9 = load i8*, i8** %7
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %27
11: ; preds = %3
%12 = load i8*, i8** %7
%13 = ptrtoint i8* %12 to i64
%14 = load i64, i64* %5
%15 = add i64 %13, %14
%16 = load i8*, i8** %7
%17 = ptrtoint i8* %16 to i64
%18 = icmp ugt i64 %15, %17
br i1 %18, label %19, label %27
19: ; preds = %11
%20 = load i8*, i8** %6
%21 = load i8*, i8** %7
%22 = ptrtoint i8* %20 to i64
%23 = ptrtoint i8* %21 to i64
%24 = sub i64 %22, %23
%25 = load i64, i64* %5
%26 = icmp ult i64 %24, %25
br label %27
27: ; preds = %19, %11, %3
%28 = phi i1 [ false, %11 ], [ false, %3 ], [ %26, %19 ]
%29 = zext i1 %28 to i32
ret i32 %29
}

LLVM IR (-O2):
define i32 @range_ptrinbuf(i8* %0, i64 %1, i8* %2) {
%4 = icmp eq i8* %0, null
br i1 %4, label %14, label %5
5: ; preds = %3
%6 = ptrtoint i8* %0 to i64
%7 = add i64 %6, %1
%8 = icmp ugt i64 %7, %6
br i1 %8, label %9, label %14
9: ; preds = %5
%10 = ptrtoint i8* %2 to i64
%11 = sub i64 %10, %6
%12 = icmp ult i64 %11, %1
%13 = zext i1 %12 to i32
br label %14
14: ; preds = %9, %5, %3
%15 = phi i32 [ 0, %5 ], [ 0, %3 ], [ %13, %9 ]
ret i32 %15
}