xunge/DecIR huggingface dataset:
unsigned int foo(const unsigned int wvalue) {
  const unsigned char type = (wvalue >> 8);
  unsigned int size = 0;
  if (type == 1) {
    size = 20;
  }
  return size;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x8,%eax
mov    %al,-0x5(%rbp)
movl   $0x0,-0xc(%rbp)
movzbl -0x5(%rbp),%eax
cmp    $0x1,%eax
jne    112b <foo+0x2b>
movl   $0x14,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
and    $0xff00,%edi
xor    %ecx,%ecx
cmp    $0x100,%edi
mov    $0x14,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i8
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = lshr i32 %5, 8
%7 = trunc i32 %6 to i8
store i8 %7, i8* %3
store i32 0, i32* %4
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = icmp eq i32 %9, 1
br i1 %10, label %11, label %12
11: ; preds = %1
store i32 20, i32* %4
br label %12
12: ; preds = %11, %1
%13 = load i32, i32* %4
ret i32 %13
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = and i32 %0, 65280
%3 = icmp eq i32 %2, 256
%4 = select i1 %3, i32 20, i32 0
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ clock_t;

/* Variables and functions */
unsigned int CLOCKS_PER_SEC;
scalar_t__ clock();
void mydelay(unsigned int delay) {
  clock_t goal = delay * CLOCKS_PER_SEC / 1000 + clock();
  while (goal > clock())
    ;
}


x86 assembly (clang, -O0):
<mydelay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ec3(%rip),%rcx
imul   (%rcx),%eax
mov    $0x3e8,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,%eax
mov    %rax,-0x18(%rbp)
mov    $0x0,%al
call   1030 <clock@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    $0x0,%al
call   1030 <clock@plt>
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
cmp    %rcx,%rax
jle    1170 <mydelay+0x60>
jmp    114c <mydelay+0x3c>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mydelay>:
push   %r14
push   %rbx
push   %rax
mov    0x2ecd(%rip),%rax
imul   (%rax),%edi
imul   $0x10624dd3,%rdi,%r14
shr    $0x26,%r14
xor    %eax,%eax
call   1030 <clock@plt>
mov    %rax,%rbx
add    %r14,%rbx
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <clock@plt>
cmp    %rax,%rbx
jg     1140 <mydelay+0x30>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@CLOCKS_PER_SEC = global i32 0
define void @mydelay(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @CLOCKS_PER_SEC
%6 = mul i32 %4, %5
%7 = udiv i32 %6, 1000
%8 = zext i32 %7 to i64
%9 = call i64 (...) @clock()
%10 = add nsw i64 %8, %9
store i64 %10, i64* %3
br label %11
11: ; preds = %15, %1
%12 = load i64, i64* %3
%13 = call i64 (...) @clock()
%14 = icmp sgt i64 %12, %13
br i1 %14, label %15, label %16
15: ; preds = %11
br label %11
16: ; preds = %11
ret void
}

LLVM IR (-O2):
@CLOCKS_PER_SEC = global i32 0
define void @mydelay(i32 %0) {
%2 = load i32, i32* @CLOCKS_PER_SEC
%3 = mul i32 %2, %0
%4 = udiv i32 %3, 1000
%5 = zext i32 %4 to i64
%6 = tail call i64 (...) @clock()
%7 = add nsw i64 %6, %5
br label %8
8: ; preds = %8, %1
%9 = tail call i64 (...) @clock()
%10 = icmp sgt i64 %7, %9
br i1 %10, label %8, label %11
11: ; preds = %8
ret void
}
/* Variables and functions */
int rmdir(char const *);
__attribute__((__weak__, __always___)) int
softboundmpx_rmdir(const char *pathname) {
  return rmdir(pathname);
}


x86 assembly (clang, -O0):
<softboundmpx_rmdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <rmdir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_rmdir>:
jmp    1030 <rmdir@plt>

LLVM IR (-O0):
define weak i32 @softboundmpx_rmdir(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @rmdir(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define weak i32 @softboundmpx_rmdir(i8* %0) {
%2 = tail call i32 @rmdir(i8* %0)
ret i32 %2
}
void mod_brute_is_GPL_compatible() {}


x86 assembly (clang, -O0):
<mod_brute_is_GPL_compatible>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod_brute_is_GPL_compatible>:
ret

LLVM IR (-O0):
define void @mod_brute_is_GPL_compatible() {
ret void
}

LLVM IR (-O2):
define void @mod_brute_is_GPL_compatible() {
ret void
}
int tobin(int n) {
  int s = 0;
  while (n != 0) {
    int x = n % 2;
    s += x;
    n /= 2;
  }
  return s;
}


x86 assembly (clang, -O0):
<tobin>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1142 <tobin+0x42>
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    110e <tobin+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tobin>:
xor    %eax,%eax
test   %edi,%edi
je     112c <tobin+0x2c>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
shr    $0x1f,%ecx
add    %edi,%ecx
mov    %ecx,%edx
and    $0xfffffffe,%edx
mov    %edi,%esi
sub    %edx,%esi
add    %esi,%eax
sar    %ecx
add    $0x1,%edi
cmp    $0x2,%edi
mov    %ecx,%edi
ja     1110 <tobin+0x10>
ret

LLVM IR (-O0):
define i32 @tobin(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %5
5: ; preds = %8, %1
%6 = load i32, i32* %2
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %16
8: ; preds = %5
%9 = load i32, i32* %2
%10 = srem i32 %9, 2
store i32 %10, i32* %4
%11 = load i32, i32* %4
%12 = load i32, i32* %3
%13 = add nsw i32 %12, %11
store i32 %13, i32* %3
%14 = load i32, i32* %2
%15 = sdiv i32 %14, 2
store i32 %15, i32* %2
br label %5
16: ; preds = %5
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @tobin(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %7, %3 ], [ 0, %1 ]
%6 = srem i32 %4, 2
%7 = add nsw i32 %6, %5
%8 = sdiv i32 %4, 2
%9 = add i32 %4, 1
%10 = icmp ult i32 %9, 3
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %12
}
/* Variables and functions */
int rand();
void gk_vector_mutate(unsigned int *data) {
  int pos = (rand() % (sizeof(unsigned int) * 8));
  *data ^= ((unsigned int)(1 << pos));
}


x86 assembly (clang, -O0):
<gk_vector_mutate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cltq
and    $0x1f,%rax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
xor    (%rax),%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gk_vector_mutate>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <rand@plt>
mov    $0x1,%edx
mov    %eax,%ecx
shl    %cl,%edx
xor    %edx,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @gk_vector_mutate(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = call i32 (...) @rand()
%5 = sext i32 %4 to i64
%6 = urem i64 %5, 32
%7 = trunc i64 %6 to i32
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = shl i32 1, %8
%10 = load i32*, i32** %2
%11 = load i32, i32* %10
%12 = xor i32 %11, %9
store i32 %12, i32* %10
ret void
}

LLVM IR (-O2):
define void @gk_vector_mutate(i32* nocapture %0) {
%2 = tail call i32 (...) @rand()
%3 = and i32 %2, 31
%4 = shl nuw i32 1, %3
%5 = load i32, i32* %0
%6 = xor i32 %4, %5
store i32 %6, i32* %0
ret void
}
/* Variables and functions */
int fsync(int);
int fdatasync(int fildes) { return fsync(fildes); }


x86 assembly (clang, -O0):
<fdatasync>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <fsync@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdatasync>:
jmp    1030 <fsync@plt>

LLVM IR (-O0):
define i32 @fdatasync(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @fsync(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @fdatasync(i32 %0) {
%2 = tail call i32 @fsync(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void stdfree(void *p) { free(p); }


x86 assembly (clang, -O0):
<stdfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stdfree>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @stdfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @stdfree(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
void rop3_35_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = ~*D;
  stk2 = T & stk3;
  stk1 = S | stk2;
  stk1 = ~stk1;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_35_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xd(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_35_1_1>:
mov    (%rdi),%al
mov    %edx,%ecx
or     %sil,%cl
not    %cl
and    %al,%sil
or     %cl,%sil
and    %dl,%al
or     %sil,%al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_35_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = xor i32 %12, -1
%14 = trunc i32 %13 to i8
store i8 %14, i8* %9
%15 = load i8, i8* %6
%16 = zext i8 %15 to i32
%17 = load i8, i8* %9
%18 = zext i8 %17 to i32
%19 = and i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %8
%21 = load i8, i8* %5
%22 = zext i8 %21 to i32
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = or i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %7
%27 = load i8, i8* %7
%28 = zext i8 %27 to i32
%29 = xor i32 %28, -1
%30 = trunc i32 %29 to i8
store i8 %30, i8* %7
%31 = load i8, i8* %7
%32 = zext i8 %31 to i32
%33 = load i8, i8* %5
%34 = zext i8 %33 to i32
%35 = xor i32 %34, -1
%36 = and i32 %32, %35
%37 = load i8, i8* %6
%38 = zext i8 %37 to i32
%39 = xor i32 %38, -1
%40 = and i32 %36, %39
%41 = load i8*, i8** %4
%42 = load i8, i8* %41
%43 = zext i8 %42 to i32
%44 = load i8, i8* %5
%45 = zext i8 %44 to i32
%46 = and i32 %43, %45
%47 = or i32 %40, %46
%48 = load i8*, i8** %4
%49 = load i8, i8* %48
%50 = zext i8 %49 to i32
%51 = load i8, i8* %6
%52 = zext i8 %51 to i32
%53 = and i32 %50, %52
%54 = or i32 %47, %53
%55 = trunc i32 %54 to i8
%56 = load i8*, i8** %4
store i8 %55, i8* %56
ret void
}

LLVM IR (-O2):
define void @rop3_35_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %2, %1
%6 = xor i8 %5, -1
%7 = and i8 %4, %1
%8 = or i8 %7, %6
%9 = and i8 %4, %2
%10 = or i8 %8, %9
store i8 %10, i8* %0
ret void
}
void gtk_image_new_from_file() {}


x86 assembly (clang, -O0):
<gtk_image_new_from_file>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_image_new_from_file>:
ret

LLVM IR (-O0):
define void @gtk_image_new_from_file() {
ret void
}

LLVM IR (-O2):
define void @gtk_image_new_from_file() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dump_pmus();
int /*<<< orphan*/ init_pmus();
int main(int argc, char **argv) {
  init_pmus();
  dump_pmus();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <init_pmus@plt>
mov    $0x0,%al
call   1030 <dump_pmus@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <init_pmus@plt>
xor    %eax,%eax
call   1030 <dump_pmus@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @init_pmus()
%7 = call i32 (...) @dump_pmus()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @init_pmus()
%4 = tail call i32 (...) @dump_pmus()
ret i32 0
}
void func8(int (*fptr[])(char *w1, char *w2)) { fptr[1]("", ""); }


x86 assembly (clang, -O0):
<func8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
lea    0xee9(%rip),%rsi
mov    %rsi,%rdi
call   *0x8(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func8>:
mov    0x8(%rdi),%rax
lea    0xef5(%rip),%rdi
mov    %rdi,%rsi
jmp    *%rax

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define void @func8(i32 (i8*, i8*)** %0) {
%2 = alloca i32 (i8*, i8*)**
store i32 (i8*, i8*)** %0, i32 (i8*, i8*)*** %2
%3 = load i32 (i8*, i8*)**, i32 (i8*, i8*)*** %2
%4 = getelementptr inbounds i32 (i8*, i8*)*, i32 (i8*, i8*)** %3, i64 1
%5 = load i32 (i8*, i8*)*, i32 (i8*, i8*)** %4
%6 = call i32 %5(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define void @func8(i32 (i8*, i8*)** nocapture %0) {
%2 = getelementptr inbounds i32 (i8*, i8*)*, i32 (i8*, i8*)** %0, i64 1
%3 = load i32 (i8*, i8*)*, i32 (i8*, i8*)** %2
%4 = tail call i32 %3(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct statvfs {
  int dummy;
};
struct statfs {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __statvfs_cvt(struct statfs *, struct statvfs *);
int fstatfs(int, struct statfs *);
int fstatvfs(int fd, struct statvfs *sv) {
  struct statfs ss;
  if (fstatfs(fd, &ss) == -1)
    return -1;
  __statvfs_cvt(&ss, sv);
  return 0;
}


x86 assembly (clang, -O0):
<fstatvfs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
lea    -0x18(%rbp),%rsi
call   1040 <fstatfs@plt>
cmp    $0xffffffff,%eax
jne    1150 <fstatvfs+0x30>
movl   $0xffffffff,-0x4(%rbp)
jmp    1164 <fstatvfs+0x44>
mov    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdi
call   1030 <__statvfs_cvt@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fstatvfs>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
lea    0x8(%rsp),%rsi
call   1040 <fstatfs@plt>
cmp    $0xffffffff,%eax
je     1148 <fstatvfs+0x28>
lea    0x8(%rsp),%rdi
mov    %rbx,%rsi
call   1030 <__statvfs_cvt@plt>
xor    %eax,%eax
jmp    114d <fstatvfs+0x2d>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.statvfs = type { i32 }
%struct.statfs = type { i32 }
define i32 @fstatvfs(i32 %0, %struct.statvfs* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca %struct.statvfs*
%6 = alloca %struct.statfs
store i32 %0, i32* %4
store %struct.statvfs* %1, %struct.statvfs** %5
%7 = load i32, i32* %4
%8 = call i32 @fstatfs(i32 %7, %struct.statfs* %6)
%9 = icmp eq i32 %8, -1
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 -1, i32* %3
br label %14
11: ; preds = %2
%12 = load %struct.statvfs*, %struct.statvfs** %5
%13 = call i32 @__statvfs_cvt(%struct.statfs* %6, %struct.statvfs* %12)
store i32 0, i32* %3
br label %14
14: ; preds = %11, %10
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
%struct.statvfs = type { i32 }
%struct.statfs = type { i32 }
define i32 @fstatvfs(i32 %0, %struct.statvfs* %1) {
%3 = alloca %struct.statfs
%4 = bitcast %struct.statfs* %3 to i8*
%5 = call i32 @fstatfs(i32 %0, %struct.statfs* %3)
%6 = icmp eq i32 %5, -1
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = call i32 @__statvfs_cvt(%struct.statfs* %3, %struct.statvfs* %1)
br label %9
9: ; preds = %2, %7
%10 = phi i32 [ 0, %7 ], [ -1, %2 ]
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ sqlite3_file;

/* Variables and functions */
int SQLITE_IOCAP_IMMUTABLE;
int memDeviceCharacteristics(sqlite3_file *pFile) {
  return SQLITE_IOCAP_IMMUTABLE;
}


x86 assembly (clang, -O0):
<memDeviceCharacteristics>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memDeviceCharacteristics>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@SQLITE_IOCAP_IMMUTABLE = global i32 0
define i32 @memDeviceCharacteristics(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32, i32* @SQLITE_IOCAP_IMMUTABLE
ret i32 %3
}

LLVM IR (-O2):
@SQLITE_IOCAP_IMMUTABLE = global i32 0
define i32 @memDeviceCharacteristics(i32* nocapture readnone %0) {
%2 = load i32, i32* @SQLITE_IOCAP_IMMUTABLE
ret i32 %2
}
int hst(double i) { return 1; }


x86 assembly (clang, -O0):
<hst>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hst>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @hst(double %0) {
%2 = alloca double
store double %0, double* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @hst(double %0) {
ret i32 1
}
int f1(int x, int y, int z) { return 0; }


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @f1(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @f1(i32 %0, i32 %1, i32 %2) {
ret i32 0
}
__attribute__((always_)) void setup_node_to_cpumask_map(void) {}


x86 assembly (clang, -O0):
<setup_node_to_cpumask_map>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup_node_to_cpumask_map>:
ret

LLVM IR (-O0):
define void @setup_node_to_cpumask_map() {
ret void
}

LLVM IR (-O2):
define void @setup_node_to_cpumask_map() {
ret void
}
void lum_setup() {}


x86 assembly (clang, -O0):
<lum_setup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lum_setup>:
ret

LLVM IR (-O0):
define void @lum_setup() {
ret void
}

LLVM IR (-O2):
define void @lum_setup() {
ret void
}
void PmaxAck(struct PlinkBuffer *Buff) {}


x86 assembly (clang, -O0):
<PmaxAck>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PmaxAck>:
ret

LLVM IR (-O0):
%struct.PlinkBuffer = type opaque
define void @PmaxAck(%struct.PlinkBuffer* %0) {
%2 = alloca %struct.PlinkBuffer*
store %struct.PlinkBuffer* %0, %struct.PlinkBuffer** %2
ret void
}

LLVM IR (-O2):
%struct.PlinkBuffer = type opaque
define void @PmaxAck(%struct.PlinkBuffer* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ assume(int);
int main() {
  int x;
  int y;
  assume(x < y);
  while (x < y) {
    x = x + 100;
  }
  assert(x >= y && x <= y + 99);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assume@plt>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    115c <main+0x3c>
mov    -0x8(%rbp),%eax
add    $0x64,%eax
mov    %eax,-0x8(%rbp)
jmp    1142 <main+0x22>
mov    -0x8(%rbp),%ecx
xor    %eax,%eax
cmp    -0xc(%rbp),%ecx
mov    %al,-0xd(%rbp)
jl     117e <main+0x5e>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
add    $0x63,%ecx
cmp    %ecx,%eax
setle  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <assume@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = icmp slt i32 %4, %5
%7 = zext i1 %6 to i32
%8 = call i32 @assume(i32 %7)
br label %9
9: ; preds = %13, %0
%10 = load i32, i32* %2
%11 = load i32, i32* %3
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = load i32, i32* %2
%15 = add nsw i32 %14, 100
store i32 %15, i32* %2
br label %9
16: ; preds = %9
%17 = load i32, i32* %2
%18 = load i32, i32* %3
%19 = icmp sge i32 %17, %18
br i1 %19, label %20, label %25
20: ; preds = %16
%21 = load i32, i32* %2
%22 = load i32, i32* %3
%23 = add nsw i32 %22, 99
%24 = icmp sle i32 %21, %23
br label %25
25: ; preds = %20, %16
%26 = phi i1 [ false, %16 ], [ %24, %20 ]
%27 = zext i1 %26 to i32
%28 = call i32 @assert(i32 %27)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assume(i32 0)
%2 = tail call i32 @assert(i32 1)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fscanf(int /*<<< orphan*/ *, char *, char *);
char *LePalavra(FILE *f) {
  static char palavra[100];
  if (fscanf(f, "%s", palavra) == 1)
    return palavra;
  else
    return NULL;
}


x86 assembly (clang, -O0):
<LePalavra>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
lea    0x2f12(%rip),%rdx
call   1030 <fscanf@plt>
cmp    $0x1,%eax
jne    114c <LePalavra+0x3c>
lea    0x2efd(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1154 <LePalavra+0x44>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LePalavra>:
push   %rbx
lea    0xee8(%rip),%rsi
lea    0x2f21(%rip),%rbx
mov    %rbx,%rdx
call   1030 <fscanf@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
cmove  %rbx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@LePalavra.palavra = internal global [100 x i8] zeroinitializer
@.str = [3 x i8] c"%s\00"
define i8* @LePalavra(i32* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = call i32 @fscanf(i32* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @LePalavra.palavra, i64 0, i64 0))
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %8
7: ; preds = %1
store i8* getelementptr inbounds ([100 x i8], [100 x i8]* @LePalavra.palavra, i64 0, i64 0), i8** %2
br label %9
8: ; preds = %1
store i8* null, i8** %2
br label %9
9: ; preds = %8, %7
%10 = load i8*, i8** %2
ret i8* %10
}

LLVM IR (-O2):
@LePalavra.palavra = internal global [100 x i8] zeroinitializer
@.str = [3 x i8] c"%s\00"
define i8* @LePalavra(i32* nocapture %0) {
%2 = tail call i32 @fscanf(i32* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @LePalavra.palavra, i64 0, i64 0))
%3 = icmp eq i32 %2, 1
%4 = select i1 %3, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @LePalavra.palavra, i64 0, i64 0), i8* null
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char);
void ft_is_negative(int n) {
  if (n < 0)
    ft_putchar('N');
  else if (n >= 0)
    ft_putchar('P');
}


x86 assembly (clang, -O0):
<ft_is_negative>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1134 <ft_is_negative+0x24>
mov    $0x4e,%edi
call   1030 <ft_putchar@plt>
jmp    114d <ft_is_negative+0x3d>
cmpl   $0x0,-0x4(%rbp)
jl     1148 <ft_is_negative+0x38>
mov    $0x50,%edi
call   1030 <ft_putchar@plt>
jmp    114d <ft_is_negative+0x3d>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_is_negative>:
not    %edi
shr    $0x1f,%edi
add    %edi,%edi
add    $0x4e,%edi
jmp    1030 <ft_putchar@plt>

LLVM IR (-O0):
define void @ft_is_negative(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @ft_putchar(i8 signext 78)
br label %13
7: ; preds = %1
%8 = load i32, i32* %2
%9 = icmp sge i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = call i32 @ft_putchar(i8 signext 80)
br label %12
12: ; preds = %10, %7
br label %13
13: ; preds = %12, %5
ret void
}

LLVM IR (-O2):
define void @ft_is_negative(i32 %0) {
%2 = icmp slt i32 %0, 0
%3 = select i1 %2, i8 78, i8 80
%4 = tail call i32 @ft_putchar(i8 signext %3)
ret void
}
int _is_operator(char c) {
  return c == '+' || c == '-' || c == '*' || c == '/' || c == '(' || c == ')' ||
         c == '=';
}


x86 assembly (clang, -O0):
<_is_operator>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2b,%ecx
mov    %al,-0x2(%rbp)
je     1183 <_is_operator+0x83>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2d,%ecx
mov    %al,-0x2(%rbp)
je     1183 <_is_operator+0x83>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2a,%ecx
mov    %al,-0x2(%rbp)
je     1183 <_is_operator+0x83>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2f,%ecx
mov    %al,-0x2(%rbp)
je     1183 <_is_operator+0x83>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x28,%ecx
mov    %al,-0x2(%rbp)
je     1183 <_is_operator+0x83>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x29,%ecx
mov    %al,-0x2(%rbp)
je     1183 <_is_operator+0x83>
movsbl -0x1(%rbp),%eax
cmp    $0x3d,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_is_operator>:
lea    -0x28(%rdi),%eax
cmp    $0x8,%al
jae    1119 <_is_operator+0x19>
movzbl %al,%ecx
mov    $0x1,%eax
mov    $0xaf,%edx
bt     %ecx,%edx
jb     1122 <_is_operator+0x22>
xor    %eax,%eax
cmp    $0x3d,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @_is_operator(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 43
br i1 %5, label %30, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 45
br i1 %9, label %30, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 42
br i1 %13, label %30, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 47
br i1 %17, label %30, label %18
18: ; preds = %14
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 40
br i1 %21, label %30, label %22
22: ; preds = %18
%23 = load i8, i8* %2
%24 = sext i8 %23 to i32
%25 = icmp eq i32 %24, 41
br i1 %25, label %30, label %26
26: ; preds = %22
%27 = load i8, i8* %2
%28 = sext i8 %27 to i32
%29 = icmp eq i32 %28, 61
br label %30
30: ; preds = %26, %22, %18, %14, %10, %6, %1
%31 = phi i1 [ true, %22 ], [ true, %18 ], [ true, %14 ], [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %29, %26 ]
%32 = zext i1 %31 to i32
ret i32 %32
}

LLVM IR (-O2):
define i32 @_is_operator(i8 signext %0) {
%2 = add i8 %0, -40
%3 = icmp ult i8 %2, 8
br i1 %3, label %7, label %4
4: ; preds = %7, %1
%5 = icmp eq i8 %0, 61
%6 = zext i1 %5 to i32
br label %11
7: ; preds = %1
%8 = lshr i8 -81, %2
%9 = and i8 %8, 1
%10 = icmp eq i8 %9, 0
br i1 %10, label %4, label %11
11: ; preds = %7, %4
%12 = phi i32 [ %6, %4 ], [ 1, %7 ]
ret i32 %12
}
/* Type definitions */
typedef scalar_t__ uint64_t;

/* Variables and functions */
int m_less(const uint64_t a, const uint64_t b) { return (a < b); }


x86 assembly (clang, -O0):
<m_less>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<m_less>:
xor    %eax,%eax
cmp    %rsi,%rdi
setl   %al
ret

LLVM IR (-O0):
define i32 @m_less(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @m_less(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
unsigned GetFieldW16(unsigned int *A, register unsigned int index) {
  register unsigned int i = index / 2, j = (index & 1) << 4, result;
  result = (A[i] << (16 - j)) >> (16);
  return result;
}


x86 assembly (clang, -O0):
<GetFieldW16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
and    $0x1,%eax
shl    $0x4,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%ecx
mov    (%rax,%rcx,4),%eax
mov    $0x10,%ecx
sub    -0x14(%rbp),%ecx
shl    %cl,%eax
shr    $0x10,%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetFieldW16>:
mov    %esi,%ecx
mov    %esi,%eax
shr    %eax
shl    $0x4,%ecx
mov    (%rdi,%rax,4),%eax
not    %cl
and    $0x10,%cl
shl    %cl,%eax
shr    $0x10,%eax
ret

LLVM IR (-O0):
define i32 @GetFieldW16(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%8 = load i32, i32* %4
%9 = udiv i32 %8, 2
store i32 %9, i32* %5
%10 = load i32, i32* %4
%11 = and i32 %10, 1
%12 = shl i32 %11, 4
store i32 %12, i32* %6
%13 = load i32*, i32** %3
%14 = load i32, i32* %5
%15 = zext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32, i32* %6
%19 = sub i32 16, %18
%20 = shl i32 %17, %19
%21 = lshr i32 %20, 16
store i32 %21, i32* %7
%22 = load i32, i32* %7
ret i32 %22
}

LLVM IR (-O2):
define i32 @GetFieldW16(i32* nocapture %0, i32 %1) {
%3 = lshr i32 %1, 1
%4 = shl i32 %1, 4
%5 = zext i32 %3 to i64
%6 = getelementptr inbounds i32, i32* %0, i64 %5
%7 = load i32, i32* %6
%8 = and i32 %4, 16
%9 = xor i32 %8, 16
%10 = shl i32 %7, %9
%11 = lshr i32 %10, 16
ret i32 %11
}
int test_imm_93uint8_reg(unsigned char val) {
  return ((val) & (0x93 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_93uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0x93,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_93uint8_reg>:
test   $0x93,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_93uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 147
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_93uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -109
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ fma(double, double, double);
int /*<<< orphan*/ fmaf(float, float, float);
int /*<<< orphan*/ fmal(long double, long double, long double);
void uninitvar_fma(void) {
  float f1, f2, f3;
  (void)fmaf(f1, f2, f3);
  double d1, d2, d3;
  (void)fma(d1, d2, d3);
  long double ld1, ld2, ld3;
  (void)fmal(ld1, ld2, ld3);
}


x86 assembly (clang, -O0):
<uninitvar_fma>:
push   %rbp
mov    %rsp,%rbp
sub    $0x90,%rsp
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm2
call   1030 <fmaf@plt>
movsd  -0x18(%rbp),%xmm0
movsd  -0x20(%rbp),%xmm1
movsd  -0x28(%rbp),%xmm2
call   1050 <fma@plt>
fldt   -0x40(%rbp)
fldt   -0x50(%rbp)
fldt   -0x60(%rbp)
mov    %rsp,%rax
fstpt  0x20(%rax)
fstpt  0x10(%rax)
fstpt  (%rax)
call   1040 <fmal@plt>
add    $0x90,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_fma>:
sub    $0x38,%rsp
call   1030 <fmaf@plt>
call   1050 <fma@plt>
call   1040 <fmal@plt>
add    $0x38,%rsp
ret

LLVM IR (-O0):
define void @uninitvar_fma() {
%1 = alloca float
%2 = alloca float
%3 = alloca float
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca x86_fp80
%8 = alloca x86_fp80
%9 = alloca x86_fp80
%10 = load float, float* %1
%11 = load float, float* %2
%12 = load float, float* %3
%13 = call i32 @fmaf(float %10, float %11, float %12)
%14 = load double, double* %4
%15 = load double, double* %5
%16 = load double, double* %6
%17 = call i32 @fma(double %14, double %15, double %16)
%18 = load x86_fp80, x86_fp80* %7
%19 = load x86_fp80, x86_fp80* %8
%20 = load x86_fp80, x86_fp80* %9
%21 = call i32 @fmal(x86_fp80 %18, x86_fp80 %19, x86_fp80 %20)
ret void
}

LLVM IR (-O2):
define void @uninitvar_fma() {
%1 = tail call i32 @fmaf(float undef, float undef, float undef)
%2 = tail call i32 @fma(double undef, double undef, double undef)
%3 = tail call i32 @fmal(x86_fp80 undef, x86_fp80 undef, x86_fp80 undef)
ret void
}
void foo627(int p) {}


x86 assembly (clang, -O0):
<foo627>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo627>:
ret

LLVM IR (-O0):
define void @foo627(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo627(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ acos(int /*<<< orphan*/);
double glmDegd(int /*<<< orphan*/);
int /*<<< orphan*/ glmDotProduct4d(double const *, double const *);
double glmComputeNormalizedVectorAngle4dDeg(const double v1[4],
                                            const double v2[4]) {
  return glmDegd(acos(glmDotProduct4d(v1, v2)));
}


x86 assembly (clang, -O0):
<glmComputeNormalizedVectorAngle4dDeg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <glmDotProduct4d@plt>
mov    %eax,%edi
call   1040 <acos@plt>
mov    %eax,%edi
call   1050 <glmDegd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmComputeNormalizedVectorAngle4dDeg>:
push   %rax
call   1030 <glmDotProduct4d@plt>
mov    %eax,%edi
call   1040 <acos@plt>
mov    %eax,%edi
pop    %rax
jmp    1050 <glmDegd@plt>

LLVM IR (-O0):
define double @glmComputeNormalizedVectorAngle4dDeg(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = load double*, double** %4
%7 = call i32 @glmDotProduct4d(double* %5, double* %6)
%8 = call i32 @acos(i32 %7)
%9 = call double @glmDegd(i32 %8)
ret double %9
}

LLVM IR (-O2):
define double @glmComputeNormalizedVectorAngle4dDeg(double* %0, double* %1) {
%3 = tail call i32 @glmDotProduct4d(double* %0, double* %1)
%4 = tail call i32 @acos(i32 %3)
%5 = tail call double @glmDegd(i32 %4)
ret double %5
}
void d2i_X509_CINF(void) {}


x86 assembly (clang, -O0):
<d2i_X509_CINF>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_X509_CINF>:
ret

LLVM IR (-O0):
define void @d2i_X509_CINF() {
ret void
}

LLVM IR (-O2):
define void @d2i_X509_CINF() {
ret void
}
/* Variables and functions */
int dump_image(char *);
int alisp_dump_image(char *p) { return dump_image(p); }


x86 assembly (clang, -O0):
<alisp_dump_image>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dump_image@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alisp_dump_image>:
jmp    1030 <dump_image@plt>

LLVM IR (-O0):
define i32 @alisp_dump_image(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @dump_image(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @alisp_dump_image(i8* %0) {
%2 = tail call i32 @dump_image(i8* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ O_WRONLY;
int /*<<< orphan*/ close(int);
int dup(int);
int /*<<< orphan*/ dup2(int, int);
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int open(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
int close_stdout(void) {
  int bak;
  int new;
  fflush(stdout);
  bak = dup(1);
  new = open("/dev/null", O_WRONLY);
  dup2(new, 1);
  close(new);
  return (bak);
}


x86 assembly (clang, -O0):
<close_stdout>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2e81(%rip),%rax
mov    (%rax),%edi
call   1060 <fflush@plt>
mov    $0x1,%edi
call   1040 <dup@plt>
mov    %eax,-0x4(%rbp)
mov    0x2e56(%rip),%rax
mov    (%rax),%esi
lea    0xe7d(%rip),%rdi
call   1070 <open@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
mov    $0x1,%esi
call   1030 <dup2@plt>
mov    -0x8(%rbp),%edi
call   1050 <close@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_stdout>:
push   %rbp
push   %rbx
push   %rax
mov    0x2e86(%rip),%rax
mov    (%rax),%edi
call   1060 <fflush@plt>
mov    $0x1,%edi
call   1040 <dup@plt>
mov    %eax,%ebx
mov    0x2e5c(%rip),%rax
mov    (%rax),%esi
lea    0xe83(%rip),%rdi
call   1070 <open@plt>
mov    %eax,%ebp
mov    %eax,%edi
mov    $0x1,%esi
call   1030 <dup2@plt>
mov    %ebp,%edi
call   1050 <close@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@stdout = global i32 0
@.str = [10 x i8] c"/dev/null\00"
@O_WRONLY = global i32 0
define i32 @close_stdout() {
%1 = alloca i32
%2 = alloca i32
%3 = load i32, i32* @stdout
%4 = call i32 @fflush(i32 %3)
%5 = call i32 @dup(i32 1)
store i32 %5, i32* %1
%6 = load i32, i32* @O_WRONLY
%7 = call i32 @open(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %6)
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = call i32 @dup2(i32 %8, i32 1)
%10 = load i32, i32* %2
%11 = call i32 @close(i32 %10)
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [10 x i8] c"/dev/null\00"
@O_WRONLY = global i32 0
define i32 @close_stdout() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fflush(i32 %1)
%3 = tail call i32 @dup(i32 1)
%4 = load i32, i32* @O_WRONLY
%5 = tail call i32 @open(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = tail call i32 @dup2(i32 %5, i32 1)
%7 = tail call i32 @close(i32 %5)
ret i32 %3
}
/* Type definitions */
struct slist {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct slist *);
void slist_free(struct slist *list) { free(list); }


x86 assembly (clang, -O0):
<slist_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<slist_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.slist = type { i32 }
define void @slist_free(%struct.slist* %0) {
%2 = alloca %struct.slist*
store %struct.slist* %0, %struct.slist** %2
%3 = load %struct.slist*, %struct.slist** %2
%4 = call i32 @free(%struct.slist* %3)
ret void
}

LLVM IR (-O2):
%struct.slist = type { i32 }
define void @slist_free(%struct.slist* nocapture %0) {
%2 = tail call i32 @free(%struct.slist* %0)
ret void
}
/* Variables and functions */
int strcmp(char *const, char *const);
int cmpstringp_inv(const void *p1, const void *p2) {
  int a = strcmp(*(char *const *)p1, *(char *const *)p2);
  a = -a;
  return a;
}


x86 assembly (clang, -O0):
<cmpstringp_inv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
mov    %eax,-0x14(%rbp)
xor    %eax,%eax
sub    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmpstringp_inv>:
push   %rax
mov    (%rdi),%rdi
mov    (%rsi),%rsi
call   1030 <strcmp@plt>
neg    %eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @cmpstringp_inv(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i8**
%8 = load i8*, i8** %7
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i8**
%11 = load i8*, i8** %10
%12 = call i32 @strcmp(i8* %8, i8* %11)
store i32 %12, i32* %5
%13 = load i32, i32* %5
%14 = sub nsw i32 0, %13
store i32 %14, i32* %5
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
define i32 @cmpstringp_inv(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %4, i8* dereferenceable(1) %6)
%8 = sub nsw i32 0, %7
ret i32 %8
}
/* Variables and functions */
bool isPrime(unsigned num) {
  unsigned i = 2;
  if (num == 1)
    return false;
  for (i = 2; i < num; i++) {
    if (num % i == 0) {
      return false;
    }
  }
  return true;
}


x86 assembly (clang, -O0):
<isPrime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1124 <isPrime+0x24>
movl   $0x0,-0x4(%rbp)
jmp    116e <isPrime+0x6e>
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jae    1167 <isPrime+0x67>
mov    -0x8(%rbp),%eax
xor    %edx,%edx
divl   -0xc(%rbp)
cmp    $0x0,%edx
jne    1154 <isPrime+0x54>
movl   $0x0,-0x4(%rbp)
jmp    116e <isPrime+0x6e>
jmp    1159 <isPrime+0x59>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112b <isPrime+0x2b>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPrime>:
xor    %ecx,%ecx
cmp    $0x1,%edi
jne    110a <isPrime+0xa>
mov    %ecx,%eax
ret
cmp    $0x3,%edi
jb     1131 <isPrime+0x31>
mov    $0x2,%esi
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
mov    %edi,%eax
xor    %edx,%edx
div    %esi
test   %edx,%edx
je     1107 <isPrime+0x7>
add    $0x1,%esi
cmp    %esi,%edi
jne    1120 <isPrime+0x20>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isPrime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 2, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %24
8: ; preds = %1
store i32 2, i32* %4
br label %9
9: ; preds = %20, %8
%10 = load i32, i32* %4
%11 = load i32, i32* %3
%12 = icmp ult i32 %10, %11
br i1 %12, label %13, label %23
13: ; preds = %9
%14 = load i32, i32* %3
%15 = load i32, i32* %4
%16 = urem i32 %14, %15
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %13
store i32 0, i32* %2
br label %24
19: ; preds = %13
br label %20
20: ; preds = %19
%21 = load i32, i32* %4
%22 = add i32 %21, 1
store i32 %22, i32* %4
br label %9
23: ; preds = %9
store i32 1, i32* %2
br label %24
24: ; preds = %23, %18, %7
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @isPrime(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = icmp ugt i32 %0, 2
br i1 %4, label %7, label %12
5: ; preds = %7
%6 = icmp eq i32 %11, %0
br i1 %6, label %12, label %7
7: ; preds = %3, %5
%8 = phi i32 [ %11, %5 ], [ 2, %3 ]
%9 = urem i32 %0, %8
%10 = icmp eq i32 %9, 0
%11 = add nuw i32 %8, 1
br i1 %10, label %12, label %5
12: ; preds = %7, %5, %3, %1
%13 = phi i32 [ 0, %1 ], [ 1, %3 ], [ 0, %7 ], [ 1, %5 ]
ret i32 %13
}
int isp1301_remove(struct i2c_client *client) { return 0; }


x86 assembly (clang, -O0):
<isp1301_remove>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isp1301_remove>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.i2c_client = type opaque
define i32 @isp1301_remove(%struct.i2c_client* %0) {
%2 = alloca %struct.i2c_client*
store %struct.i2c_client* %0, %struct.i2c_client** %2
ret i32 0
}

LLVM IR (-O2):
%struct.i2c_client = type opaque
define i32 @isp1301_remove(%struct.i2c_client* nocapture readnone %0) {
ret i32 0
}
int test_imm_19uint8_reg(unsigned char val) {
  return ((val) & (-0x19 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_19uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffffe7,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_19uint8_reg>:
test   $0xe7,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_19uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -25
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_19uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -25
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int strcmp(char const *, char const *);
int fs__cmp(const void *a, const void *b) {
  return strcmp(*(const char **)a, *(const char **)b);
}


x86 assembly (clang, -O0):
<fs__cmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fs__cmp>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @fs__cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i8**
%7 = load i8*, i8** %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i8**
%10 = load i8*, i8** %9
%11 = call i32 @strcmp(i8* %7, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @fs__cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %4, i8* dereferenceable(1) %6)
ret i32 %7
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void SHAMD5DMADisable(uint32_t ui32Base) {
  ASSERT(ui32Base == 0x44034000);
  (*((volatile uint32_t *)(ui32Base + 0x00000110))) &=
      ~(0x00000080 | 0x00000008);
}


x86 assembly (clang, -O0):
<SHAMD5DMADisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x44034000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x110,%eax
cltq
mov    (%rax),%ecx
and    $0xffffff77,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAMD5DMADisable>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
cmp    $0x44034000,%ebx
sete   %dil
call   1030 <ASSERT@plt>
movslq %ebx,%rax
andl   $0xffffff77,0x110(%rax)
ff ff ff
pop    %rbx
ret

LLVM IR (-O0):
define void @SHAMD5DMADisable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1141063680
%5 = zext i1 %4 to i32
%6 = call i32 @ASSERT(i32 %5)
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 272
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
%11 = load volatile i32, i32* %10
%12 = and i32 %11, -137
store volatile i32 %12, i32* %10
ret void
}

LLVM IR (-O2):
define void @SHAMD5DMADisable(i32 %0) {
%2 = icmp eq i32 %0, 1141063680
%3 = zext i1 %2 to i32
%4 = tail call i32 @ASSERT(i32 %3)
%5 = add nsw i32 %0, 272
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
%8 = load volatile i32, i32* %7
%9 = and i32 %8, -137
store volatile i32 %9, i32* %7
ret void
}
void barInDylib() {}


x86 assembly (clang, -O0):
<barInDylib>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<barInDylib>:
ret

LLVM IR (-O0):
define void @barInDylib() {
ret void
}

LLVM IR (-O2):
define void @barInDylib() {
ret void
}