xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ isspace(char);
char *skip_spaces(char *chp) {
  while (1) {
    if (*chp == '\0' || *chp == '\n' || !isspace(*chp))
      return chp;
    chp++;
  }
}


x86 assembly (clang, -O0):
<skip_spaces>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1151 <skip_spaces+0x41>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xa,%eax
je     1151 <skip_spaces+0x41>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%eax
jne    115b <skip_spaces+0x4b>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <skip_spaces+0xc>

x86 assembly (clang, -O2):
<skip_spaces>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movzbl (%rbx),%eax
test   %al,%al
je     113d <skip_spaces+0x2d>
cmp    $0xa,%al
je     113d <skip_spaces+0x2d>
movsbl %al,%edi
call   1030 <isspace@plt>
test   %eax,%eax
je     113d <skip_spaces+0x2d>
add    $0x1,%rbx
jmp    1120 <skip_spaces+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @skip_spaces(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %1, %20
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, 0
br i1 %7, label %18, label %8
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 10
br i1 %12, label %18, label %13
13: ; preds = %8
%14 = load i8*, i8** %2
%15 = load i8, i8* %14
%16 = call i32 @isspace(i8 signext %15)
%17 = icmp ne i32 %16, 0
br i1 %17, label %20, label %18
18: ; preds = %13, %8, %3
%19 = load i8*, i8** %2
ret i8* %19
20: ; preds = %13
%21 = load i8*, i8** %2
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %2
br label %3
}

LLVM IR (-O2):
define i8* @skip_spaces(i8* %0) {
br label %2
2: ; preds = %1, %9
%3 = phi i8* [ %0, %1 ], [ %10, %9 ]
%4 = load i8, i8* %3
switch i8 %4, label %5 [
i8 0, label %8
i8 10, label %8
]
5: ; preds = %2
%6 = tail call i32 @isspace(i8 signext %4)
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2, %2, %5
ret i8* %3
9: ; preds = %5
%10 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
}
int light_isalpha(int c) {
  c |= 32;
  return (c >= 'a' && c <= 'z');
}


x86 assembly (clang, -O0):
<light_isalpha>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
or     $0x20,%eax
mov    %eax,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x61,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1129 <light_isalpha+0x29>
cmpl   $0x7a,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<light_isalpha>:
or     $0x20,%edi
add    $0xffffff9f,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @light_isalpha(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = or i32 %3, 32
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp sge i32 %5, 97
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = icmp sle i32 %8, 122
br label %10
10: ; preds = %7, %1
%11 = phi i1 [ false, %1 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @light_isalpha(i32 %0) {
%2 = or i32 %0, 32
%3 = add i32 %2, -97
%4 = icmp ult i32 %3, 26
%5 = zext i1 %4 to i32
ret i32 %5
}
int snd_soc_jack_add_gpiods(struct device *gpiod_dev, struct snd_soc_jack *jack,
                            int count, struct snd_soc_jack_gpio *gpios) {
  return 0;
}


x86 assembly (clang, -O0):
<snd_soc_jack_add_gpiods>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<snd_soc_jack_add_gpiods>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.device = type opaque
%struct.snd_soc_jack = type opaque
%struct.snd_soc_jack_gpio = type opaque
define i32 @snd_soc_jack_add_gpiods(%struct.device* %0, %struct.snd_soc_jack* %1, i32 %2, %struct.snd_soc_jack_gpio* %3) {
%5 = alloca %struct.device*
%6 = alloca %struct.snd_soc_jack*
%7 = alloca i32
%8 = alloca %struct.snd_soc_jack_gpio*
store %struct.device* %0, %struct.device** %5
store %struct.snd_soc_jack* %1, %struct.snd_soc_jack** %6
store i32 %2, i32* %7
store %struct.snd_soc_jack_gpio* %3, %struct.snd_soc_jack_gpio** %8
ret i32 0
}

LLVM IR (-O2):
%struct.device = type opaque
%struct.snd_soc_jack = type opaque
%struct.snd_soc_jack_gpio = type opaque
define i32 @snd_soc_jack_add_gpiods(%struct.device* nocapture readnone %0, %struct.snd_soc_jack* nocapture readnone %1, i32 %2, %struct.snd_soc_jack_gpio* nocapture readnone %3) {
ret i32 0
}
void RTLockValidatorRecSharedCheckSignaller(void) {}


x86 assembly (clang, -O0):
<RTLockValidatorRecSharedCheckSignaller>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTLockValidatorRecSharedCheckSignaller>:
ret

LLVM IR (-O0):
define void @RTLockValidatorRecSharedCheckSignaller() {
ret void
}

LLVM IR (-O2):
define void @RTLockValidatorRecSharedCheckSignaller() {
ret void
}
void ecm_sfe_ipv6_exit(void) { return; }


x86 assembly (clang, -O0):
<ecm_sfe_ipv6_exit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ecm_sfe_ipv6_exit>:
ret

LLVM IR (-O0):
define void @ecm_sfe_ipv6_exit() {
ret void
}

LLVM IR (-O2):
define void @ecm_sfe_ipv6_exit() {
ret void
}
float system_get_total_cpu_usage() { return 0; }


x86 assembly (clang, -O0):
<system_get_total_cpu_usage>:
push   %rbp
mov    %rsp,%rbp
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<system_get_total_cpu_usage>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @system_get_total_cpu_usage() {
ret float 0.000000e+00
}

LLVM IR (-O2):
define float @system_get_total_cpu_usage() {
ret float 0.000000e+00
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ htonl(size_t);
int /*<<< orphan*/ write(int, int /*<<< orphan*/ *, size_t);
int write_buf(int fd, uint8_t *buf, size_t buflen) {
  uint32_t msglen = htonl(buflen);
  write(fd, &msglen, 4);
  write(fd, buf, buflen);
  return (0);
}


x86 assembly (clang, -O0):
<write_buf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <htonl@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x1c(%rbp),%rsi
mov    $0x4,%edx
call   1030 <write@plt>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <write@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_buf>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rdx,%rbx
mov    %rsi,%r14
mov    %edi,%ebp
mov    %rdx,%rdi
call   1040 <htonl@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rsi
mov    $0x4,%edx
mov    %ebp,%edi
call   1030 <write@plt>
mov    %ebp,%edi
mov    %r14,%rsi
mov    %rbx,%rdx
call   1030 <write@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @write_buf(i32 %0, i32* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i64
%7 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i64 %2, i64* %6
%8 = load i64, i64* %6
%9 = call i32 @htonl(i64 %8)
store i32 %9, i32* %7
%10 = load i32, i32* %4
%11 = call i32 @write(i32 %10, i32* %7, i64 4)
%12 = load i32, i32* %4
%13 = load i32*, i32** %5
%14 = load i64, i64* %6
%15 = call i32 @write(i32 %12, i32* %13, i64 %14)
ret i32 0
}

LLVM IR (-O2):
define i32 @write_buf(i32 %0, i32* nocapture %1, i64 %2) {
%4 = alloca i32
%5 = bitcast i32* %4 to i8*
%6 = tail call i32 @htonl(i64 %2)
store i32 %6, i32* %4
%7 = call i32 @write(i32 %0, i32* %4, i64 4)
%8 = tail call i32 @write(i32 %0, i32* %1, i64 %2)
ret i32 0
}
/* Type definitions */
struct genlmsg {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct genlmsg *);
extern void genlmsg_free(struct genlmsg *genlmsg) { free(genlmsg); }


x86 assembly (clang, -O0):
<genlmsg_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genlmsg_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.genlmsg = type { i32 }
define void @genlmsg_free(%struct.genlmsg* %0) {
%2 = alloca %struct.genlmsg*
store %struct.genlmsg* %0, %struct.genlmsg** %2
%3 = load %struct.genlmsg*, %struct.genlmsg** %2
%4 = call i32 @free(%struct.genlmsg* %3)
ret void
}

LLVM IR (-O2):
%struct.genlmsg = type { i32 }
define void @genlmsg_free(%struct.genlmsg* nocapture %0) {
%2 = tail call i32 @free(%struct.genlmsg* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int kvz_math_floor_log2(unsigned int);
unsigned kvz_math_ceil_log2(unsigned value) {
  assert(value > 0);
  return kvz_math_floor_log2(value) + ((value & (value - 1)) ? 1 : 0);
}


x86 assembly (clang, -O0):
<kvz_math_ceil_log2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
seta   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%edi
call   1040 <kvz_math_floor_log2@plt>
mov    -0x4(%rbp),%esi
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%esi
xor    %ecx,%ecx
mov    $0x1,%edx
cmp    $0x0,%esi
cmovne %edx,%ecx
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kvz_math_ceil_log2>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
test   %ebx,%ebx
setne  %dil
call   1030 <assert@plt>
mov    %ebx,%edi
call   1040 <kvz_math_floor_log2@plt>
lea    -0x1(%rbx),%ecx
and    %ebx,%ecx
cmp    $0x1,%ecx
sbb    $0xffffffff,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @kvz_math_ceil_log2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ugt i32 %3, 0
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
%7 = load i32, i32* %2
%8 = call i32 @kvz_math_floor_log2(i32 %7)
%9 = load i32, i32* %2
%10 = load i32, i32* %2
%11 = sub i32 %10, 1
%12 = and i32 %9, %11
%13 = icmp ne i32 %12, 0
%14 = zext i1 %13 to i64
%15 = select i1 %13, i32 1, i32 0
%16 = add nsw i32 %8, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @kvz_math_ceil_log2(i32 %0) {
%2 = icmp ne i32 %0, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = tail call i32 @kvz_math_floor_log2(i32 %0)
%6 = tail call i32 @llvm.ctpop.i32(i32 %0)
%7 = icmp ugt i32 %6, 1
%8 = zext i1 %7 to i32
%9 = add nsw i32 %5, %8
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("#define SIZEOF_INT %d\n", (int)sizeof(int));
  printf("#define SIZEOF_LONG %d\n", (int)sizeof(long));
  printf("#define SIZEOF_LONG_LONG %d\n", 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
lea    0xee0(%rip),%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
lea    0xee7(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
lea    0xeee(%rip),%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
lea    0xef5(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"#define SIZEOF_INT %d\0A\00"
@.str.1 = [24 x i8] c"#define SIZEOF_LONG %d\0A\00"
@.str.2 = [29 x i8] c"#define SIZEOF_LONG_LONG %d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 4)
%3 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0), i32 8)
%4 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.2, i64 0, i64 0), i32 0)
ret i32 0
}

LLVM IR (-O2):
@.str = [23 x i8] c"#define SIZEOF_INT %d\0A\00"
@.str.1 = [24 x i8] c"#define SIZEOF_LONG %d\0A\00"
@.str.2 = [29 x i8] c"#define SIZEOF_LONG_LONG %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 4)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0), i32 8)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.2, i64 0, i64 0), i32 0)
ret i32 0
}
/* Variables and functions */
int ll_nth_up_if(int);
int ll_first_up_if(void) { return ll_nth_up_if(1); }


x86 assembly (clang, -O0):
<ll_first_up_if>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <ll_nth_up_if@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ll_first_up_if>:
mov    $0x1,%edi
jmp    1030 <ll_nth_up_if@plt>

LLVM IR (-O0):
define i32 @ll_first_up_if() {
%1 = call i32 @ll_nth_up_if(i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @ll_first_up_if() {
%1 = tail call i32 @ll_nth_up_if(i32 1)
ret i32 %1
}
void testfunc(int v) {
  int i = 2 / 1;
  while (v--) {
    i--;
  }
}


x86 assembly (clang, -O0):
<testfunc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
je     1130 <testfunc+0x30>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <testfunc+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<testfunc>:
ret

LLVM IR (-O0):
define void @testfunc(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 2, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %2
%6 = add nsw i32 %5, -1
store i32 %6, i32* %2
%7 = icmp ne i32 %5, 0
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32, i32* %3
%10 = add nsw i32 %9, -1
store i32 %10, i32* %3
br label %4
11: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @testfunc(i32 %0) {
ret void
}
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
ssize_t lgetxattr(const char *__path, const char *__name, void *__value,
                  size_t __size) {
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<lgetxattr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lgetxattr>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @lgetxattr(i8* %0, i8* %1, i8* %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i64
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%9 = load i32, i32* @ENOSYS
%10 = call i32 @__set_errno(i32 %9)
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @lgetxattr(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i64 %3) {
%5 = load i32, i32* @ENOSYS
%6 = tail call i32 @__set_errno(i32 %5)
ret i32 -1
}
/* Variables and functions */
long double __scan_float(char const **, int /*<<< orphan*/);
long double strtold(const char *nptr, char **endptr) {
  long double value;
  value = __scan_float(&nptr, 0);
  if (endptr) {
    *endptr = (char *)nptr;
  }
  return value;
}


x86 assembly (clang, -O0):
<strtold>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <__scan_float@plt>
fstpt  -0x20(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1144 <strtold+0x34>
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
fldt   -0x20(%rbp)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtold>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
mov    %rdi,0x8(%rsp)
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <__scan_float@plt>
test   %rbx,%rbx
je     1136 <strtold+0x26>
mov    0x8(%rsp),%rax
mov    %rax,(%rbx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define x86_fp80 @strtold(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
%5 = alloca x86_fp80
store i8* %0, i8** %3
store i8** %1, i8*** %4
%6 = call x86_fp80 @__scan_float(i8** %3, i32 0)
store x86_fp80 %6, x86_fp80* %5
%7 = load i8**, i8*** %4
%8 = icmp ne i8** %7, null
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load i8*, i8** %3
%11 = load i8**, i8*** %4
store i8* %10, i8** %11
br label %12
12: ; preds = %9, %2
%13 = load x86_fp80, x86_fp80* %5
ret x86_fp80 %13
}

LLVM IR (-O2):
define x86_fp80 @strtold(i8* %0, i8** writeonly %1) {
%3 = alloca i8*
store i8* %0, i8** %3
%4 = call x86_fp80 @__scan_float(i8** %3, i32 0)
%5 = icmp eq i8** %1, null
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = load i8*, i8** %3
store i8* %7, i8** %1
br label %8
8: ; preds = %6, %2
ret x86_fp80 %4
}
void foo273(int p) {}


x86 assembly (clang, -O0):
<foo273>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo273>:
ret

LLVM IR (-O0):
define void @foo273(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo273(i32 %0) {
ret void
}
/* Variables and functions */
int f157(int *);
int f158(int *p) { return f157(p); }


x86 assembly (clang, -O0):
<f158>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f157@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f158>:
jmp    1030 <f157@plt>

LLVM IR (-O0):
define i32 @f158(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f157(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f158(i32* %0) {
%2 = tail call i32 @f157(i32* %0)
ret i32 %2
}
int do_763() { return 763; }


x86 assembly (clang, -O0):
<do_763>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2fb,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_763>:
mov    $0x2fb,%eax
ret

LLVM IR (-O0):
define i32 @do_763() {
ret i32 763
}

LLVM IR (-O2):
define i32 @do_763() {
ret i32 763
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void cfbf_print_license(void) {
  puts("MIT License - https://opensource.org/licenses/MIT");
}


x86 assembly (clang, -O0):
<cfbf_print_license>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfbf_print_license>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [50 x i8] c"MIT License - https://opensource.org/licenses/MIT\00"
define void @cfbf_print_license() {
%1 = call i32 @puts(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [50 x i8] c"MIT License - https://opensource.org/licenses/MIT\00"
define void @cfbf_print_license() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
ret void
}
void Clear_Images() {}


x86 assembly (clang, -O0):
<Clear_Images>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Clear_Images>:
ret

LLVM IR (-O0):
define void @Clear_Images() {
ret void
}

LLVM IR (-O2):
define void @Clear_Images() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
void foo(int n, int a[n]) {
  int x = a[7];
  assert(x == 42);
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x1c(%rax),%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x2a,-0x14(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %edi,%edi
cmpl   $0x2a,0x1c(%rsi)
sete   %dil
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @foo(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
%6 = load i32, i32* %3
%7 = zext i32 %6 to i64
%8 = load i32*, i32** %4
%9 = getelementptr inbounds i32, i32* %8, i64 7
%10 = load i32, i32* %9
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = icmp eq i32 %11, 42
%13 = zext i1 %12 to i32
%14 = call i32 @assert(i32 %13)
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0, i32* nocapture %1) {
%3 = getelementptr inbounds i32, i32* %1, i64 7
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 42
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
ret void
}
int find(int x, int *arr, int dim) {
  int i;
  for (i = 0; i < dim; i++) {
    if (arr[i] == x) {
      return 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<find>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1154 <find+0x54>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x8(%rbp),%eax
jne    1141 <find+0x41>
movl   $0x1,-0x4(%rbp)
jmp    115b <find+0x5b>
jmp    1146 <find+0x46>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1115 <find+0x15>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<find>:
test   %edx,%edx
jle    111e <find+0x1e>
mov    %edx,%eax
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
cmp    %edi,(%rsi,%rcx,4)
je     1121 <find+0x21>
add    $0x1,%rcx
cmp    %rcx,%rax
jne    1110 <find+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @find(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %23, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %7
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %26
13: ; preds = %9
%14 = load i32*, i32** %6
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %5
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %22
21: ; preds = %13
store i32 1, i32* %4
br label %27
22: ; preds = %13
br label %23
23: ; preds = %22
%24 = load i32, i32* %8
%25 = add nsw i32 %24, 1
store i32 %25, i32* %8
br label %9
26: ; preds = %9
store i32 0, i32* %4
br label %27
27: ; preds = %26, %21
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @find(i32 %0, i32* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %15
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %9
7: ; preds = %9
%8 = icmp eq i64 %14, %6
br i1 %8, label %15, label %9
9: ; preds = %5, %7
%10 = phi i64 [ 0, %5 ], [ %14, %7 ]
%11 = getelementptr inbounds i32, i32* %1, i64 %10
%12 = load i32, i32* %11
%13 = icmp eq i32 %12, %0
%14 = add nuw nsw i64 %10, 1
br i1 %13, label %15, label %7
15: ; preds = %9, %7, %3
%16 = phi i32 [ 0, %3 ], [ 0, %7 ], [ 1, %9 ]
ret i32 %16
}
/* Variables and functions */
float cosf(float);
float sinf(float);
void __attribute__((visibility("hidden")))
sincosf(float x, float *psin, float *pcos) {
  *psin = sinf(x);
  *pcos = cosf(x);
}


x86 assembly (clang, -O0):
<sincosf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sinf@plt>
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x4(%rbp),%xmm0
call   1040 <cosf@plt>
mov    -0x18(%rbp),%rax
movss  %xmm0,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sincosf>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
movss  %xmm0,0x4(%rsp)
call   1030 <sinf@plt>
movss  %xmm0,(%rbx)
movss  0x4(%rsp),%xmm0
call   1040 <cosf@plt>
movss  %xmm0,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define hidden void @sincosf(float %0, float* %1, float* %2) {
%4 = alloca float
%5 = alloca float*
%6 = alloca float*
store float %0, float* %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float, float* %4
%8 = call float @sinf(float %7)
%9 = load float*, float** %5
store float %8, float* %9
%10 = load float, float* %4
%11 = call float @cosf(float %10)
%12 = load float*, float** %6
store float %11, float* %12
ret void
}

LLVM IR (-O2):
define hidden void @sincosf(float %0, float* nocapture writeonly %1, float* nocapture writeonly %2) {
%4 = tail call float @sinf(float %0)
store float %4, float* %1
%5 = tail call float @cosf(float %0)
store float %5, float* %2
ret void
}
void ft_ultimate_ft(int *********nbr) { *********nbr = 42; }


x86 assembly (clang, -O0):
<ft_ultimate_ft>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%rax
mov    (%rax),%rax
mov    (%rax),%rax
mov    (%rax),%rax
mov    (%rax),%rax
mov    (%rax),%rax
mov    (%rax),%rax
movl   $0x2a,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_ultimate_ft>:
mov    (%rdi),%rax
mov    (%rax),%rax
mov    (%rax),%rax
mov    (%rax),%rax
mov    (%rax),%rax
mov    (%rax),%rax
mov    (%rax),%rax
mov    (%rax),%rax
movl   $0x2a,(%rax)
ret

LLVM IR (-O0):
define void @ft_ultimate_ft(i32********* %0) {
%2 = alloca i32*********
store i32********* %0, i32********** %2
%3 = load i32*********, i32********** %2
%4 = load i32********, i32********* %3
%5 = load i32*******, i32******** %4
%6 = load i32******, i32******* %5
%7 = load i32*****, i32****** %6
%8 = load i32****, i32***** %7
%9 = load i32***, i32**** %8
%10 = load i32**, i32*** %9
%11 = load i32*, i32** %10
store i32 42, i32* %11
ret void
}

LLVM IR (-O2):
define void @ft_ultimate_ft(i32********* nocapture %0) {
%2 = load i32********, i32********* %0
%3 = load i32*******, i32******** %2
%4 = load i32******, i32******* %3
%5 = load i32*****, i32****** %4
%6 = load i32****, i32***** %5
%7 = load i32***, i32**** %6
%8 = load i32**, i32*** %7
%9 = load i32*, i32** %8
store i32 42, i32* %9
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stdout;
void greatest_usage(const char *name) {
  fprintf(stdout,
          "Usage: %s [-hlfv] [-s SUITE] [-t TEST]\n"
          "  -h        print this Help\n"
          "  -l        List suites and their tests, then exit\n"
          "  -f        Stop runner after first failure\n"
          "  -v        Verbose output\n"
          "  -s SUITE  only run suite named SUITE\n"
          "  -t TEST   only run test named TEST\n",
          name);
}


x86 assembly (clang, -O0):
<greatest_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<greatest_usage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [266 x i8] c"Usage: %s [-hlfv] [-s SUITE] [-t TEST]\0A -h print this Help\0A -l List suites and their tests, then exit\0A -f Stop runner after first failure\0A -v Verbose output\0A -s SUITE only run suite named SUITE\0A -t TEST only run test named TEST\0A\00"
define void @greatest_usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stdout
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([266 x i8], [266 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [266 x i8] c"Usage: %s [-hlfv] [-s SUITE] [-t TEST]\0A -h print this Help\0A -l List suites and their tests, then exit\0A -f Stop runner after first failure\0A -v Verbose output\0A -s SUITE only run suite named SUITE\0A -t TEST only run test named TEST\0A\00"
define void @greatest_usage(i8* %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([266 x i8], [266 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
struct flashrom_flashctx {
  int dummy;
};

/* Variables and functions */
int printlock_w39_common(struct flashrom_flashctx *, int);
int printlock_w39v080a(struct flashrom_flashctx *flash) {
  return printlock_w39_common(flash, 0xffff2);
}


x86 assembly (clang, -O0):
<printlock_w39v080a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xffff2,%esi
call   1030 <printlock_w39_common@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printlock_w39v080a>:
mov    $0xffff2,%esi
jmp    1030 <printlock_w39_common@plt>

LLVM IR (-O0):
%struct.flashrom_flashctx = type { i32 }
define i32 @printlock_w39v080a(%struct.flashrom_flashctx* %0) {
%2 = alloca %struct.flashrom_flashctx*
store %struct.flashrom_flashctx* %0, %struct.flashrom_flashctx** %2
%3 = load %struct.flashrom_flashctx*, %struct.flashrom_flashctx** %2
%4 = call i32 @printlock_w39_common(%struct.flashrom_flashctx* %3, i32 1048562)
ret i32 %4
}

LLVM IR (-O2):
%struct.flashrom_flashctx = type { i32 }
define i32 @printlock_w39v080a(%struct.flashrom_flashctx* %0) {
%2 = tail call i32 @printlock_w39_common(%struct.flashrom_flashctx* %0, i32 1048562)
ret i32 %2
}
int vga_get(struct pci_dev *pdev, unsigned int rsrc, int interruptible) {
  return 0;
}


x86 assembly (clang, -O0):
<vga_get>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vga_get>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.pci_dev = type opaque
define i32 @vga_get(%struct.pci_dev* %0, i32 %1, i32 %2) {
%4 = alloca %struct.pci_dev*
%5 = alloca i32
%6 = alloca i32
store %struct.pci_dev* %0, %struct.pci_dev** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
%struct.pci_dev = type opaque
define i32 @vga_get(%struct.pci_dev* nocapture readnone %0, i32 %1, i32 %2) {
ret i32 0
}
void gdk_pixmap_colormap_create_from_xpm_d() {}


x86 assembly (clang, -O0):
<gdk_pixmap_colormap_create_from_xpm_d>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_pixmap_colormap_create_from_xpm_d>:
ret

LLVM IR (-O0):
define void @gdk_pixmap_colormap_create_from_xpm_d() {
ret void
}

LLVM IR (-O2):
define void @gdk_pixmap_colormap_create_from_xpm_d() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;

/* Variables and functions */
int /*<<< orphan*/ stdc_89F6F026(int /*<<< orphan*/ *);
time_t time(time_t *timer) { return stdc_89F6F026(timer); }


x86 assembly (clang, -O0):
<time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <stdc_89F6F026@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<time>:
jmp    1030 <stdc_89F6F026@plt>

LLVM IR (-O0):
define i32 @time(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @stdc_89F6F026(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @time(i32* %0) {
%2 = tail call i32 @stdc_89F6F026(i32* %0)
ret i32 %2
}
void ADCEnable(unsigned long ulBase) {
  (*((volatile unsigned long *)(ulBase + 0x00000000))) |= 0x1;
}


x86 assembly (clang, -O0):
<ADCEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
or     $0x1,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCEnable>:
orq    $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @ADCEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 0
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = or i64 %6, 1
store volatile i64 %7, i64* %5
ret void
}

LLVM IR (-O2):
define void @ADCEnable(i64 %0) {
%2 = inttoptr i64 %0 to i64*
%3 = load volatile i64, i64* %2
%4 = or i64 %3, 1
store volatile i64 %4, i64* %2
ret void
}
void gdb_init(void) {}


x86 assembly (clang, -O0):
<gdb_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdb_init>:
ret

LLVM IR (-O0):
define void @gdb_init() {
ret void
}

LLVM IR (-O2):
define void @gdb_init() {
ret void
}
int __xap_ap_ro_release(int fd, unsigned long *aperrno_p) {}


x86 assembly (clang, -O0):
<__xap_ap_ro_release>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__xap_ap_ro_release>:
ret

LLVM IR (-O0):
define i32 @__xap_ap_ro_release(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64*
store i32 %0, i32* %4
store i64* %1, i64** %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @__xap_ap_ro_release(i32 %0, i64* nocapture readnone %1) {
ret i32 undef
}
void arm_cdp() {}


x86 assembly (clang, -O0):
<arm_cdp>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm_cdp>:
ret

LLVM IR (-O0):
define void @arm_cdp() {
ret void
}

LLVM IR (-O2):
define void @arm_cdp() {
ret void
}
/* Variables and functions */
int d21(int);
int d22(int a) { return d21(d21(a)); }


x86 assembly (clang, -O0):
<d22>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <d21@plt>
mov    %eax,%edi
call   1030 <d21@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d22>:
push   %rax
call   1030 <d21@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <d21@plt>

LLVM IR (-O0):
define i32 @d22(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @d21(i32 %3)
%5 = call i32 @d21(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @d22(i32 %0) {
%2 = tail call i32 @d21(i32 %0)
%3 = tail call i32 @d21(i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *);
int die(char *string) {
  printf("%s", string);
  exit(0);
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<die>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i32 @die(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i32 @die(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
size_t align_ceil(size_t n, size_t alignment) {
  const size_t remainder = n % alignment;
  return remainder != 0 ? (n - remainder) + alignment : n;
}


x86 assembly (clang, -O0):
<align_ceil>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     113c <align_ceil+0x3c>
mov    -0x8(%rbp),%rax
sub    -0x18(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
jmp    1144 <align_ceil+0x44>
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<align_ceil>:
mov    %rdi,%rax
or     %rsi,%rax
shr    $0x20,%rax
je     1116 <align_ceil+0x16>
mov    %rdi,%rax
xor    %edx,%edx
div    %rsi
jmp    111c <align_ceil+0x1c>
mov    %edi,%eax
xor    %edx,%edx
div    %esi
add    %rdi,%rsi
sub    %rdx,%rsi
test   %rdx,%rdx
cmove  %rdi,%rsi
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @align_ceil(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = urem i64 %6, %7
store i64 %8, i64* %5
%9 = load i64, i64* %5
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %2
%12 = load i64, i64* %3
%13 = load i64, i64* %5
%14 = sub i64 %12, %13
%15 = load i64, i64* %4
%16 = add i64 %14, %15
br label %19
17: ; preds = %2
%18 = load i64, i64* %3
br label %19
19: ; preds = %17, %11
%20 = phi i64 [ %16, %11 ], [ %18, %17 ]
ret i64 %20
}

LLVM IR (-O2):
define i64 @align_ceil(i64 %0, i64 %1) {
%3 = urem i64 %0, %1
%4 = icmp eq i64 %3, 0
%5 = add i64 %1, %0
%6 = sub i64 %5, %3
%7 = select i1 %4, i64 %0, i64 %6
ret i64 %7
}
/* Variables and functions */
int errno;
int a2_set_errno(int n) {
  errno = n;
  return -1;
}


x86 assembly (clang, -O0):
<a2_set_errno>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    0x2ecf(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<a2_set_errno>:
mov    0x2ed9(%rip),%rax
mov    %edi,(%rax)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@errno = global i32 0
define i32 @a2_set_errno(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store i32 %3, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@errno = global i32 0
define i32 @a2_set_errno(i32 %0) {
store i32 %0, i32* @errno
ret i32 -1
}
/* Type definitions */
struct sockaddr_in6 {
  int dummy;
};
struct sockaddr_in {
  int dummy;
};
struct sockaddr {
  int sa_family;
};
typedef int socklen_t;

/* Variables and functions */
#define AF_INET 129
#define AF_INET6 128
socklen_t sockaddr_len(struct sockaddr *addr) {
  if (addr != NULL)
    switch (addr->sa_family) {
    case AF_INET:
      return sizeof(struct sockaddr_in);
    case AF_INET6:
      return sizeof(struct sockaddr_in6);
    default:
      break;
    }
  return 0;
}


x86 assembly (clang, -O0):
<sockaddr_len>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1161 <sockaddr_len+0x61>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
sub    $0x80,%eax
je     114b <sockaddr_len+0x4b>
jmp    112c <sockaddr_len+0x2c>
mov    -0x14(%rbp),%eax
sub    $0x81,%eax
jne    1157 <sockaddr_len+0x57>
jmp    113f <sockaddr_len+0x3f>
movl   $0x4,-0x4(%rbp)
jmp    1168 <sockaddr_len+0x68>
movl   $0x4,-0x4(%rbp)
jmp    1168 <sockaddr_len+0x68>
jmp    115c <sockaddr_len+0x5c>
jmp    1161 <sockaddr_len+0x61>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sockaddr_len>:
test   %rdi,%rdi
je     1119 <sockaddr_len+0x19>
mov    (%rdi),%ecx
and    $0xfffffffe,%ecx
xor    %eax,%eax
cmp    $0x80,%ecx
sete   %al
shl    $0x2,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
define i32 @sockaddr_len(%struct.sockaddr* %0) {
%2 = alloca i32
%3 = alloca %struct.sockaddr*
store %struct.sockaddr* %0, %struct.sockaddr** %3
%4 = load %struct.sockaddr*, %struct.sockaddr** %3
%5 = icmp ne %struct.sockaddr* %4, null
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load %struct.sockaddr*, %struct.sockaddr** %3
%8 = getelementptr inbounds %struct.sockaddr, %struct.sockaddr* %7, i32 0, i32 0
%9 = load i32, i32* %8
switch i32 %9, label %12 [
i32 129, label %10
i32 128, label %11
]
10: ; preds = %6
store i32 4, i32* %2
br label %15
11: ; preds = %6
store i32 4, i32* %2
br label %15
12: ; preds = %6
br label %13
13: ; preds = %12
br label %14
14: ; preds = %13, %1
store i32 0, i32* %2
br label %15
15: ; preds = %14, %11, %10
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
define i32 @sockaddr_len(%struct.sockaddr* %0) {
%2 = icmp eq %struct.sockaddr* %0, null
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = getelementptr inbounds %struct.sockaddr, %struct.sockaddr* %0, i64 0, i32 0
%5 = load i32, i32* %4
%6 = and i32 %5, -2
%7 = icmp eq i32 %6, 128
%8 = select i1 %7, i32 4, i32 0
br label %9
9: ; preds = %1, %3
%10 = phi i32 [ %8, %3 ], [ 0, %1 ]
ret i32 %10
}
/* Variables and functions */
void const *GppcFinfoV1();
const void *pg_finfo_numericfunc1(void) { return GppcFinfoV1(); }


x86 assembly (clang, -O0):
<pg_finfo_numericfunc1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GppcFinfoV1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pg_finfo_numericfunc1>:
xor    %eax,%eax
jmp    1030 <GppcFinfoV1@plt>

LLVM IR (-O0):
define i8* @pg_finfo_numericfunc1() {
%1 = call i8* (...) @GppcFinfoV1()
ret i8* %1
}

LLVM IR (-O2):
define i8* @pg_finfo_numericfunc1() {
%1 = tail call i8* (...) @GppcFinfoV1()
ret i8* %1
}
void dans_if_test() {
  if (1)
    if (2)
      3;
  if (1)
    if (2) {
      3;
    } else
      4;
  if (1)
    while (2)
      3;
}


x86 assembly (clang, -O0):
<dans_if_test>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <dans_if_test+0x9>
jmp    1109 <dans_if_test+0x9>

x86 assembly (clang, -O2):
<dans_if_test>:
jmp    1100 <dans_if_test>

LLVM IR (-O0):
define void @dans_if_test() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @dans_if_test() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Type definitions */
struct qcc_stream_node {
  int dummy;
};
struct qcc_stream_data {
  int dummy;
};
struct qcc_list_node {
  int dummy;
};
struct qcc_list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ qcc_list_push_back(struct qcc_list *,
                                      struct qcc_list_node *);
void qcc_stream_data_push_back(struct qcc_stream_data *list,
                               struct qcc_stream_node *node) {
  qcc_list_push_back((struct qcc_list *)list, (struct qcc_list_node *)node);
}


x86 assembly (clang, -O0):
<qcc_stream_data_push_back>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <qcc_list_push_back@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qcc_stream_data_push_back>:
jmp    1030 <qcc_list_push_back@plt>

LLVM IR (-O0):
%struct.qcc_stream_data = type { i32 }
%struct.qcc_stream_node = type { i32 }
%struct.qcc_list = type { i32 }
%struct.qcc_list_node = type { i32 }
define void @qcc_stream_data_push_back(%struct.qcc_stream_data* %0, %struct.qcc_stream_node* %1) {
%3 = alloca %struct.qcc_stream_data*
%4 = alloca %struct.qcc_stream_node*
store %struct.qcc_stream_data* %0, %struct.qcc_stream_data** %3
store %struct.qcc_stream_node* %1, %struct.qcc_stream_node** %4
%5 = load %struct.qcc_stream_data*, %struct.qcc_stream_data** %3
%6 = bitcast %struct.qcc_stream_data* %5 to %struct.qcc_list*
%7 = load %struct.qcc_stream_node*, %struct.qcc_stream_node** %4
%8 = bitcast %struct.qcc_stream_node* %7 to %struct.qcc_list_node*
%9 = call i32 @qcc_list_push_back(%struct.qcc_list* %6, %struct.qcc_list_node* %8)
ret void
}

LLVM IR (-O2):
%struct.qcc_stream_data = type { i32 }
%struct.qcc_stream_node = type { i32 }
%struct.qcc_list = type { i32 }
%struct.qcc_list_node = type { i32 }
define void @qcc_stream_data_push_back(%struct.qcc_stream_data* %0, %struct.qcc_stream_node* %1) {
%3 = bitcast %struct.qcc_stream_data* %0 to %struct.qcc_list*
%4 = bitcast %struct.qcc_stream_node* %1 to %struct.qcc_list_node*
%5 = tail call i32 @qcc_list_push_back(%struct.qcc_list* %3, %struct.qcc_list_node* %4)
ret void
}
void RandomFunc(unsigned int input[1], unsigned int output[1]) {
  unsigned int state[1];
  unsigned int local2;
  unsigned int local1;
  {
    state[0UL] = input[0UL] + 4284877637U;
    local1 = 0UL;
    while (local1 < 0U) {
      local2 = 0UL;
      while (local2 < 0U) {
        local2 += 2UL;
      }
      local1 += 2UL;
    }
    output[0UL] = state[0UL] - 3662329353U;
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
add    $0xff660b45,%eax
mov    %eax,-0x14(%rbp)
movl   $0x0,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jae    115a <RandomFunc+0x5a>
movl   $0x0,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jae    114b <RandomFunc+0x4b>
mov    -0x18(%rbp),%eax
add    $0x2,%rax
mov    %eax,-0x18(%rbp)
jmp    1132 <RandomFunc+0x32>
mov    -0x1c(%rbp),%eax
add    $0x2,%rax
mov    %eax,-0x1c(%rbp)
jmp    1121 <RandomFunc+0x21>
mov    -0x14(%rbp),%ecx
sub    $0xda4ab609,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
mov    $0x251b553c,%eax
add    (%rdi),%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca [1 x i32]
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 0
%10 = load i32, i32* %9
%11 = add i32 %10, -10089659
%12 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
store i32 %11, i32* %12
store i32 0, i32* %7
br label %13
13: ; preds = %25, %2
%14 = load i32, i32* %7
%15 = icmp ult i32 %14, 0
br i1 %15, label %16, label %30
16: ; preds = %13
store i32 0, i32* %6
br label %17
17: ; preds = %20, %16
%18 = load i32, i32* %6
%19 = icmp ult i32 %18, 0
br i1 %19, label %20, label %25
20: ; preds = %17
%21 = load i32, i32* %6
%22 = zext i32 %21 to i64
%23 = add i64 %22, 2
%24 = trunc i64 %23 to i32
store i32 %24, i32* %6
br label %17
25: ; preds = %17
%26 = load i32, i32* %7
%27 = zext i32 %26 to i64
%28 = add i64 %27, 2
%29 = trunc i64 %28 to i32
store i32 %29, i32* %7
br label %13
30: ; preds = %13
%31 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
%32 = load i32, i32* %31
%33 = sub i32 %32, -632637943
%34 = load i32*, i32** %4
%35 = getelementptr inbounds i32, i32* %34, i64 0
store i32 %33, i32* %35
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i32* nocapture %0, i32* nocapture writeonly %1) {
%3 = load i32, i32* %0
%4 = add i32 %3, 622548284
store i32 %4, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ error_handler(char *);
int /*<<< orphan*/ free(void *);
void *realloc(void *, size_t);
void *xrealloc(void *p, size_t len) {
  void *p2 = realloc(p, len);
  if (p2 == NULL) {
    free(p);
    error_handler("realloc failed.");
  }
  return p2;
}


x86 assembly (clang, -O0):
<xrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1171 <xrealloc+0x41>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
lea    0xe94(%rip),%rdi
call   1040 <error_handler@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrealloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1050 <realloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1158 <xrealloc+0x28>
mov    %r14,%rdi
call   1030 <free@plt>
lea    0xead(%rip),%rdi
call   1040 <error_handler@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [16 x i8] c"realloc failed.\00"
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i8*, i8** %3
%13 = call i32 @free(i8* %12)
%14 = call i32 @error_handler(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %15
15: ; preds = %11, %2
%16 = load i8*, i8** %5
ret i8* %16
}

LLVM IR (-O2):
@.str = [16 x i8] c"realloc failed.\00"
define noalias i8* @xrealloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = tail call i32 @free(i8* %0)
%7 = tail call i32 @error_handler(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %5, %2
ret i8* %3
}