xunge/DecIR huggingface dataset:
double INHGtoMB(double INHG) {
  double MB = 33.8639 * INHG;
  return MB;
}


x86 assembly (clang, -O0):
<INHGtoMB>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<INHGtoMB>:
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @INHGtoMB(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fmul double 3.386390e+01, %4
store double %5, double* %3
%6 = load double, double* %3
ret double %6
}

LLVM IR (-O2):
define double @INHGtoMB(double %0) {
%2 = fmul double %0, 3.386390e+01
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ HAA_heap_print();
void heap_print() { HAA_heap_print(); }


x86 assembly (clang, -O0):
<heap_print>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HAA_heap_print@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<heap_print>:
xor    %eax,%eax
jmp    1030 <HAA_heap_print@plt>

LLVM IR (-O0):
define void @heap_print() {
%1 = call i32 (...) @HAA_heap_print()
ret void
}

LLVM IR (-O2):
define void @heap_print() {
%1 = tail call i32 (...) @HAA_heap_print()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ demo_funcA();
int demo_func(void) {
  demo_funcA();
  return 0;
}


x86 assembly (clang, -O0):
<demo_func>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <demo_funcA@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<demo_func>:
push   %rax
xor    %eax,%eax
call   1030 <demo_funcA@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @demo_func() {
%1 = call i32 (...) @demo_funcA()
ret i32 0
}

LLVM IR (-O2):
define i32 @demo_func() {
%1 = tail call i32 (...) @demo_funcA()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void *malloc(size_t);
int /*<<< orphan*/ printf(char *, size_t);
void *allocMem(size_t size) {
  void *result = malloc(size);
  if (result == NULL) {
    printf("Failed to allocate %u bytes of memory\n", size);
    exit(1);
  }
  return result;
}


x86 assembly (clang, -O0):
<allocMem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    116e <allocMem+0x3e>
mov    -0x8(%rbp),%rsi
lea    0xea1(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<allocMem>:
push   %rbx
mov    %rdi,%rbx
call   1040 <malloc@plt>
test   %rax,%rax
je     1140 <allocMem+0x10>
pop    %rbx
ret
lea    0xeb9(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [39 x i8] c"Failed to allocate %u bytes of memory\0A\00"
define i8* @allocMem(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i64, i64* %2
%10 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i64 %9)
%11 = call i32 @exit(i32 1)
unreachable
12: ; preds = %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@.str = [39 x i8] c"Failed to allocate %u bytes of memory\0A\00"
define noalias i8* @allocMem(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i64 %0)
%6 = tail call i32 @exit(i32 1)
unreachable
7: ; preds = %1
ret i8* %2
}
int f(int a) { return 10 / -a; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %ecx,%ecx
sub    -0x4(%rbp),%ecx
mov    $0xa,%eax
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
neg    %edi
mov    $0xa,%eax
xor    %edx,%edx
idiv   %edi
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 0, %3
%5 = sdiv i32 10, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = sub nsw i32 0, %0
%3 = sdiv i32 10, %2
ret i32 %3
}
/* Variables and functions */
double *return_null() { return NULL; }


x86 assembly (clang, -O0):
<return_null>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<return_null>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define double* @return_null() {
ret double* null
}

LLVM IR (-O2):
define noalias double* @return_null() {
ret double* null
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void QEIFilterDisable(uint32_t ui32Base) {
  ASSERT((ui32Base == 0x4002C000) || (ui32Base == 0x4002D000));
  (*((volatile uint32_t *)(ui32Base + 0x00000000))) &= ~(0x00002000);
}


x86 assembly (clang, -O0):
<QEIFilterDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x4002c000,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113a <QEIFilterDisable+0x2a>
cmpl   $0x4002d000,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x0,%eax
cltq
mov    (%rax),%ecx
and    $0xffffdfff,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<QEIFilterDisable>:
push   %rbx
mov    %edi,%ebx
mov    %edi,%eax
and    $0xffffefff,%eax
xor    %edi,%edi
cmp    $0x4002c000,%eax
sete   %dil
call   1030 <ASSERT@plt>
movslq %ebx,%rax
andl   $0xffffdfff,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @QEIFilterDisable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1073922048
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 1073926144
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = call i32 @ASSERT(i32 %10)
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 0
%14 = sext i32 %13 to i64
%15 = inttoptr i64 %14 to i32*
%16 = load volatile i32, i32* %15
%17 = and i32 %16, -8193
store volatile i32 %17, i32* %15
ret void
}

LLVM IR (-O2):
define void @QEIFilterDisable(i32 %0) {
%2 = and i32 %0, -4097
%3 = icmp eq i32 %2, 1073922048
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = sext i32 %0 to i64
%7 = inttoptr i64 %6 to i32*
%8 = load volatile i32, i32* %7
%9 = and i32 %8, -8193
store volatile i32 %9, i32* %7
ret void
}
/* Variables and functions */
long double exp2l(long double);
long double log2l(long double);
double freq2midi(double freq, double a_freq) {
  long double f0;
  f0 = (long double)a_freq * exp2l(((long double)-69.0 / (long double)12.0));
  return (double)((long double)12.0 * log2l((long double)freq / f0));
}


x86 assembly (clang, -O0):
<freq2midi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
fldl   -0x10(%rbp)
fstpt  -0x34(%rbp)
mov    %rsp,%rax
flds   0xebf(%rip)
fstpt  (%rax)
call   1030 <exp2l@plt>
fldt   -0x34(%rbp)
fmulp  %st,%st(1)
fstpt  -0x20(%rbp)
fldl   -0x8(%rbp)
fldt   -0x20(%rbp)
fdivrp %st,%st(1)
mov    %rsp,%rax
fstpt  (%rax)
call   1040 <log2l@plt>
flds   0xe9c(%rip)
fmulp  %st,%st(1)
fstpl  -0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freq2midi>:
sub    $0x38,%rsp
movsd  %xmm0,0x18(%rsp)
movsd  %xmm1,0x28(%rsp)
flds   0xeca(%rip)
fstpt  (%rsp)
call   1030 <exp2l@plt>
fmull  0x28(%rsp)
movsd  0x18(%rsp),%xmm0
movsd  %xmm0,0x30(%rsp)
fdivrl 0x30(%rsp)
fstpt  (%rsp)
call   1040 <log2l@plt>
fmuls  0xea4(%rip)
fstpl  0x20(%rsp)
movsd  0x20(%rsp),%xmm0
add    $0x38,%rsp
ret

LLVM IR (-O0):
define double @freq2midi(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca x86_fp80
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %4
%7 = fpext double %6 to x86_fp80
%8 = call x86_fp80 @exp2l(x86_fp80 0xKC001B800000000000000)
%9 = fmul x86_fp80 %7, %8
store x86_fp80 %9, x86_fp80* %5
%10 = load double, double* %3
%11 = fpext double %10 to x86_fp80
%12 = load x86_fp80, x86_fp80* %5
%13 = fdiv x86_fp80 %11, %12
%14 = call x86_fp80 @log2l(x86_fp80 %13)
%15 = fmul x86_fp80 0xK4002C000000000000000, %14
%16 = fptrunc x86_fp80 %15 to double
ret double %16
}

LLVM IR (-O2):
define double @freq2midi(double %0, double %1) {
%3 = fpext double %1 to x86_fp80
%4 = tail call x86_fp80 @exp2l(x86_fp80 0xKC001B800000000000000)
%5 = fmul x86_fp80 %4, %3
%6 = fpext double %0 to x86_fp80
%7 = fdiv x86_fp80 %6, %5
%8 = tail call x86_fp80 @log2l(x86_fp80 %7)
%9 = fmul x86_fp80 %8, 0xK4002C000000000000000
%10 = fptrunc x86_fp80 %9 to double
ret double %10
}
struct ure *pure_g(struct ure *p) {
  return p;
}


x86 assembly (clang, -O0):
<pure_g>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pure_g>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
%struct.ure = type opaque
define %struct.ure* @pure_g(%struct.ure* %0) {
%2 = alloca %struct.ure*
store %struct.ure* %0, %struct.ure** %2
%3 = load %struct.ure*, %struct.ure** %2
ret %struct.ure* %3
}

LLVM IR (-O2):
%struct.ure = type opaque
define %struct.ure* @pure_g(%struct.ure* readnone returned %0) {
ret %struct.ure* %0
}
void mc_socket_destroy(void) {}


x86 assembly (clang, -O0):
<mc_socket_destroy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mc_socket_destroy>:
ret

LLVM IR (-O0):
define void @mc_socket_destroy() {
ret void
}

LLVM IR (-O2):
define void @mc_socket_destroy() {
ret void
}
const char *deviceColorSensorGetName(void) { return "COLOR SENSOR"; }


x86 assembly (clang, -O0):
<deviceColorSensorGetName>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<deviceColorSensorGetName>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [13 x i8] c"COLOR SENSOR\00"
define i8* @deviceColorSensorGetName() {
ret i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [13 x i8] c"COLOR SENSOR\00"
define i8* @deviceColorSensorGetName() {
ret i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
extern void *evaluationInit(void) { return NULL; }


x86 assembly (clang, -O0):
<evaluationInit>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<evaluationInit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @evaluationInit() {
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @evaluationInit() {
ret i8* null
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_1__;

/* Type definitions */
struct TYPE_4__ {
  void *ss_sp;
  int ss_size;
  int /*<<< orphan*/ ss_flags;
};
typedef TYPE_1__ stack_t;

/* Variables and functions */
int /*<<< orphan*/ SS_DISABLE;
scalar_t__ sigaltstack(TYPE_1__ *, TYPE_1__ *);
int main(void) {
  stack_t ss = {.ss_sp = (void *)0xbaadf00d,
                .ss_flags = SS_DISABLE,
                .ss_size = 0xdeadbeef};
  return sigaltstack(&ss, (stack_t *)0) ? 77 : 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xbaadf00d,%eax
mov    %rax,-0x18(%rbp)
movl   $0xdeadbeef,-0x10(%rbp)
mov    0x2eb2(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
lea    -0x18(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <sigaltstack@plt>
mov    %rax,%rdx
xor    %eax,%eax
mov    $0x4d,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
mov    $0xbaadf00d,%eax
mov    %rax,(%rsp)
movl   $0xdeadbeef,0x8(%rsp)
de
mov    0x2ebb(%rip),%rax
mov    (%rax),%eax
mov    %eax,0xc(%rsp)
xor    %ebx,%ebx
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <sigaltstack@plt>
test   %rax,%rax
mov    $0x4d,%eax
cmove  %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { i8*, i32, i32 }
@SS_DISABLE = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.TYPE_4__
store i32 0, i32* %1
%3 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %2, i32 0, i32 0
store i8* inttoptr (i64 3131961357 to i8*), i8** %3
%4 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %2, i32 0, i32 1
store i32 -559038737, i32* %4
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %2, i32 0, i32 2
%6 = load i32, i32* @SS_DISABLE
store i32 %6, i32* %5
%7 = call i64 @sigaltstack(%struct.TYPE_4__* %2, %struct.TYPE_4__* null)
%8 = icmp ne i64 %7, 0
%9 = zext i1 %8 to i64
%10 = select i1 %8, i32 77, i32 0
ret i32 %10
}

LLVM IR (-O2):
%struct.TYPE_4__ = type { i8*, i32, i32 }
@SS_DISABLE = global i32 0
define i32 @main() {
%1 = alloca %struct.TYPE_4__
%2 = bitcast %struct.TYPE_4__* %1 to i8*
%3 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %1, i64 0, i32 0
store i8* inttoptr (i64 3131961357 to i8*), i8** %3
%4 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %1, i64 0, i32 1
store i32 -559038737, i32* %4
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %1, i64 0, i32 2
%6 = load i32, i32* @SS_DISABLE
store i32 %6, i32* %5
%7 = call i64 @sigaltstack(%struct.TYPE_4__* %1, %struct.TYPE_4__* null)
%8 = icmp eq i64 %7, 0
%9 = select i1 %8, i32 0, i32 77
ret i32 %9
}
void tape_patches(char *mem) {
  mem[0x18a7] = 0xed;
  mem[0x18a8] = 0xfc;
  mem[0x18a9] = 0xc9;
  mem[0x1820] = 0xed;
  mem[0x1821] = 0xfd;
  mem[0x1822] = 0xc9;
}


x86 assembly (clang, -O0):
<tape_patches>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movb   $0xed,0x18a7(%rax)
mov    -0x8(%rbp),%rax
movb   $0xfc,0x18a8(%rax)
mov    -0x8(%rbp),%rax
movb   $0xc9,0x18a9(%rax)
mov    -0x8(%rbp),%rax
movb   $0xed,0x1820(%rax)
mov    -0x8(%rbp),%rax
movb   $0xfd,0x1821(%rax)
mov    -0x8(%rbp),%rax
movb   $0xc9,0x1822(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tape_patches>:
movw   $0xfced,0x18a7(%rdi)
ed fc
movb   $0xc9,0x18a9(%rdi)
movw   $0xfded,0x1820(%rdi)
ed fd
movb   $0xc9,0x1822(%rdi)
ret

LLVM IR (-O0):
define void @tape_patches(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 6311
store i8 -19, i8* %4
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i64 6312
store i8 -4, i8* %6
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 6313
store i8 -55, i8* %8
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 6176
store i8 -19, i8* %10
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i64 6177
store i8 -3, i8* %12
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i64 6178
store i8 -55, i8* %14
ret void
}

LLVM IR (-O2):
define void @tape_patches(i8* nocapture writeonly %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 6311
store i8 -19, i8* %2
%3 = getelementptr inbounds i8, i8* %0, i64 6312
store i8 -4, i8* %3
%4 = getelementptr inbounds i8, i8* %0, i64 6313
store i8 -55, i8* %4
%5 = getelementptr inbounds i8, i8* %0, i64 6176
store i8 -19, i8* %5
%6 = getelementptr inbounds i8, i8* %0, i64 6177
store i8 -3, i8* %6
%7 = getelementptr inbounds i8, i8* %0, i64 6178
store i8 -55, i8* %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clear();
int /*<<< orphan*/ endwin();
int /*<<< orphan*/ refresh();
void handler_sigwinch(int sig) {
  (void)(sig);
  endwin();
  refresh();
  clear();
}


x86 assembly (clang, -O0):
<handler_sigwinch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <endwin@plt>
mov    $0x0,%al
call   1030 <refresh@plt>
mov    $0x0,%al
call   1050 <clear@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handler_sigwinch>:
push   %rax
xor    %eax,%eax
call   1040 <endwin@plt>
xor    %eax,%eax
call   1030 <refresh@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <clear@plt>

LLVM IR (-O0):
define void @handler_sigwinch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (...) @endwin()
%5 = call i32 (...) @refresh()
%6 = call i32 (...) @clear()
ret void
}

LLVM IR (-O2):
define void @handler_sigwinch(i32 %0) {
%2 = tail call i32 (...) @endwin()
%3 = tail call i32 (...) @refresh()
%4 = tail call i32 (...) @clear()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ err_sys(char *);
int /*<<< orphan*/ vfork();
void call_fork() {
  pid_t pid;
  if ((pid = vfork()) < 0) {
    err_sys("error on vfork()");
  }
}


x86 assembly (clang, -O0):
<call_fork>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
call   1040 <vfork@plt>
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
jge    1145 <call_fork+0x25>
lea    0xec0(%rip),%rdi
call   1030 <err_sys@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_fork>:
push   %rax
call   1040 <vfork@plt>
test   %eax,%eax
js     112c <call_fork+0xc>
pop    %rax
ret
lea    0xecd(%rip),%rdi
call   1030 <err_sys@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [17 x i8] c"error on vfork()\00"
define void @call_fork() {
%1 = alloca i32
%2 = call i32 @vfork()
store i32 %2, i32* %1
%3 = icmp slt i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @err_sys(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"error on vfork()\00"
define void @call_fork() {
%1 = call i32 @vfork()
%2 = icmp slt i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = call i32 @err_sys(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void version(const char *progname) {
  printf("%s "
         "1.5.1"
         "\n",
         progname);
}


x86 assembly (clang, -O0):
<version>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<version>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"%s 1.5.1\0A\00"
define void @version(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"%s 1.5.1\0A\00"
define void @version(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void __thread_entry(void (*entry)(void *), void *argument) {
  entry(argument);
  __asm__ volatile("movl $0, %%eax\r\n"
                   "int $0x80\r\n"
                   :
                   : "c"(0));
  while (1) {
  }
}


x86 assembly (clang, -O0):
<__thread_entry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rdi
call   *%rax
xor    %ecx,%ecx
mov    $0x0,%eax
int    $0x80
jmp    1123 <__thread_entry+0x23>

x86 assembly (clang, -O2):
<__thread_entry>:
push   %rax
mov    %rdi,%rax
mov    %rsi,%rdi
call   *%rax
xor    %ecx,%ecx
mov    $0x0,%eax
int    $0x80
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
jmp    1120 <__thread_entry+0x20>

LLVM IR (-O0):
define void @__thread_entry(void (i8*)* %0, i8* %1) {
%3 = alloca void (i8*)*
%4 = alloca i8*
store void (i8*)* %0, void (i8*)** %3
store i8* %1, i8** %4
%5 = load void (i8*)*, void (i8*)** %3
%6 = load i8*, i8** %4
br label %7
7: ; preds = %2, %7
br label %7
}

LLVM IR (-O2):
define void @__thread_entry(void (i8*)* nocapture %0, i8* %1) {
tail call void %0(i8* %1)
tail call void asm sideeffect "movl $$0, %eax\0D\0Aint $$0x80\0D\0A", "{cx},~{dirflag},~{fpsr},~{flags}"(i32 0)
br label %3
3: ; preds = %2, %3
br label %3
}
void test___atomic_fetch_nand_0(char *mem) { __atomic_fetch_nand(mem, -1, 4); }


x86 assembly (clang, -O0):
<test___atomic_fetch_nand_0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movb   $0xff,-0x9(%rbp)
mov    -0x9(%rbp),%cl
mov    %cl,-0xc(%rbp)
mov    (%rax),%al
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%al
mov    -0x18(%rbp),%rcx
mov    -0xc(%rbp),%sil
mov    %al,%dl
and    %sil,%dl
mov    %dl,-0x1a(%rbp)
not    %dl
lock cmpxchg %dl,(%rcx)
sete   %cl
mov    %al,-0x19(%rbp)
test   $0x1,%cl
mov    %al,-0xb(%rbp)
jne    114f <test___atomic_fetch_nand_0+0x4f>
jmp    111f <test___atomic_fetch_nand_0+0x1f>
mov    -0x19(%rbp),%al
mov    %al,-0xa(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test___atomic_fetch_nand_0>:
mov    (%rdi),%al
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %eax,%ecx
not    %cl
lock cmpxchg %cl,(%rdi)
jne    1110 <test___atomic_fetch_nand_0+0x10>
ret

LLVM IR (-O0):
define void @test___atomic_fetch_nand_0(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
%4 = alloca i8
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8 -1, i8* %3
%6 = load i8, i8* %3
%7 = atomicrmw nand i8* %5, i8 %6 acq_rel
store i8 %7, i8* %4
%8 = load i8, i8* %4
ret void
}

LLVM IR (-O2):
define void @test___atomic_fetch_nand_0(i8* nocapture %0) {
%2 = atomicrmw nand i8* %0, i8 -1 acq_rel
ret void
}
/* Variables and functions */
unsigned long strtoul(char const *, char **, int);
unsigned long simple_strtoul(const char *nptr, char **endptr, int base) {
  return strtoul(nptr, endptr, base);
}


x86 assembly (clang, -O0):
<simple_strtoul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <strtoul@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<simple_strtoul>:
jmp    1030 <strtoul@plt>

LLVM IR (-O0):
define i64 @simple_strtoul(i8* %0, i8** %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i32
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8**, i8*** %5
%9 = load i32, i32* %6
%10 = call i64 @strtoul(i8* %7, i8** %8, i32 %9)
ret i64 %10
}

LLVM IR (-O2):
define i64 @simple_strtoul(i8* %0, i8** nocapture %1, i32 %2) {
%4 = tail call i64 @strtoul(i8* %0, i8** %1, i32 %2)
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ getchar();
int /*<<< orphan*/ printf(char *, char);
int /*<<< orphan*/ scanf(char *, double *);
double getdouble(char letter) {
  double val;
  printf("%c: ", letter);
  scanf("%lf", &val);
  getchar();
  return val;
}


x86 assembly (clang, -O0):
<getdouble>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
lea    0xebb(%rip),%rdi
movsbl -0x1(%rbp),%esi
call   1030 <printf@plt>
lea    0xeb0(%rip),%rdi
lea    -0x10(%rbp),%rsi
call   1050 <scanf@plt>
mov    $0x0,%al
call   1040 <getchar@plt>
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getdouble>:
push   %rax
mov    %edi,%esi
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
lea    0xebf(%rip),%rdi
mov    %rsp,%rsi
call   1050 <scanf@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
movsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%c: \00"
@.str.1 = [4 x i8] c"%lf\00"
define double @getdouble(i8 signext %0) {
%2 = alloca i8
%3 = alloca double
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8 signext %4)
%6 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), double* %3)
%7 = call i32 (...) @getchar()
%8 = load double, double* %3
ret double %8
}

LLVM IR (-O2):
@.str = [5 x i8] c"%c: \00"
@.str.1 = [4 x i8] c"%lf\00"
define double @getdouble(i8 signext %0) {
%2 = alloca double
%3 = bitcast double* %2 to i8*
%4 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8 signext %0)
%5 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), double* %2)
%6 = call i32 (...) @getchar()
%7 = load double, double* %2
ret double %7
}
/* Type definitions */
struct root_node {
  int dummy;
};
struct object {
  int dummy;
};
struct node {
  int dummy;
};

/* Variables and functions */
struct object *object_new(int /*<<< orphan*/);
int /*<<< orphan*/ root_node_class_get();
int /*<<< orphan*/ root_node_init(struct root_node *, char *);
struct node *root_node_new(char *template_str) {
  struct object *node = object_new(root_node_class_get());
  root_node_init(((struct root_node *)(node)), template_str);
  return ((struct node *)(node));
}


x86 assembly (clang, -O0):
<root_node_new>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1050 <root_node_class_get@plt>
mov    %eax,%edi
call   1040 <object_new@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <root_node_init@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<root_node_new>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %eax,%eax
call   1050 <root_node_class_get@plt>
mov    %eax,%edi
call   1040 <object_new@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <root_node_init@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.node = type { i32 }
%struct.object = type { i32 }
%struct.root_node = type { i32 }
define %struct.node* @root_node_new(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.object*
store i8* %0, i8** %2
%4 = call i32 (...) @root_node_class_get()
%5 = call %struct.object* @object_new(i32 %4)
store %struct.object* %5, %struct.object** %3
%6 = load %struct.object*, %struct.object** %3
%7 = bitcast %struct.object* %6 to %struct.root_node*
%8 = load i8*, i8** %2
%9 = call i32 @root_node_init(%struct.root_node* %7, i8* %8)
%10 = load %struct.object*, %struct.object** %3
%11 = bitcast %struct.object* %10 to %struct.node*
ret %struct.node* %11
}

LLVM IR (-O2):
%struct.node = type { i32 }
%struct.object = type { i32 }
%struct.root_node = type { i32 }
define %struct.node* @root_node_new(i8* %0) {
%2 = tail call i32 (...) @root_node_class_get()
%3 = tail call %struct.object* @object_new(i32 %2)
%4 = bitcast %struct.object* %3 to %struct.root_node*
%5 = tail call i32 @root_node_init(%struct.root_node* %4, i8* %0)
%6 = bitcast %struct.object* %3 to %struct.node*
ret %struct.node* %6
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void usage() {
  printf("nope!\n");
  exit(-1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"nope!\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@str = [6 x i8] c"nope!\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 -1)
unreachable
}
const char *LZ4_versionString(void) { return "1.8.3"; }


x86 assembly (clang, -O0):
<LZ4_versionString>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZ4_versionString>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"1.8.3\00"
define i8* @LZ4_versionString() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"1.8.3\00"
define i8* @LZ4_versionString() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int in_byte(int);
int /*<<< orphan*/ out_byte(int, int);
void screen_enable_cursor() {
  out_byte(0x3D4, 0x0A);
  out_byte(0x3D5, (in_byte(0x3D5) & 0xC0));
  out_byte(0x3D4, 0x0E);
  out_byte(0x3D5, (in_byte(0x3D5) & 0xC0));
}


x86 assembly (clang, -O0):
<screen_enable_cursor>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3d4,%edi
mov    $0xa,%esi
call   1040 <out_byte@plt>
mov    $0x3d5,%edi
call   1030 <in_byte@plt>
mov    %eax,%esi
and    $0xc0,%esi
mov    $0x3d5,%edi
call   1040 <out_byte@plt>
mov    $0x3d4,%edi
mov    $0xe,%esi
call   1040 <out_byte@plt>
mov    $0x3d5,%edi
call   1030 <in_byte@plt>
mov    %eax,%esi
and    $0xc0,%esi
mov    $0x3d5,%edi
call   1040 <out_byte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<screen_enable_cursor>:
push   %rax
mov    $0x3d4,%edi
mov    $0xa,%esi
call   1040 <out_byte@plt>
mov    $0x3d5,%edi
call   1030 <in_byte@plt>
and    $0xc0,%eax
mov    $0x3d5,%edi
mov    %eax,%esi
call   1040 <out_byte@plt>
mov    $0x3d4,%edi
mov    $0xe,%esi
call   1040 <out_byte@plt>
mov    $0x3d5,%edi
call   1030 <in_byte@plt>
and    $0xc0,%eax
mov    $0x3d5,%edi
mov    %eax,%esi
pop    %rax
jmp    1040 <out_byte@plt>

LLVM IR (-O0):
define void @screen_enable_cursor() {
%1 = call i32 @out_byte(i32 980, i32 10)
%2 = call i32 @in_byte(i32 981)
%3 = and i32 %2, 192
%4 = call i32 @out_byte(i32 981, i32 %3)
%5 = call i32 @out_byte(i32 980, i32 14)
%6 = call i32 @in_byte(i32 981)
%7 = and i32 %6, 192
%8 = call i32 @out_byte(i32 981, i32 %7)
ret void
}

LLVM IR (-O2):
define void @screen_enable_cursor() {
%1 = tail call i32 @out_byte(i32 980, i32 10)
%2 = tail call i32 @in_byte(i32 981)
%3 = and i32 %2, 192
%4 = tail call i32 @out_byte(i32 981, i32 %3)
%5 = tail call i32 @out_byte(i32 980, i32 14)
%6 = tail call i32 @in_byte(i32 981)
%7 = and i32 %6, 192
%8 = tail call i32 @out_byte(i32 981, i32 %7)
ret void
}
/* Variables and functions */
scalar_t__ getenv(char *);
int src_is_valid_ratio(double oi_ratio) {
  return getenv("SOXR_LSR_STRICT") ? oi_ratio >= 1. / 256 && oi_ratio <= 256
                                   : oi_ratio > 0;
}


x86 assembly (clang, -O0):
<src_is_valid_ratio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
lea    0xeec(%rip),%rdi
call   1030 <getenv@plt>
cmp    $0x0,%rax
je     1172 <src_is_valid_ratio+0x62>
movsd  -0x8(%rbp),%xmm0
xor    %eax,%eax
movsd  0xebe(%rip),%xmm1
ucomisd %xmm1,%xmm0
mov    %al,-0x9(%rbp)
jb     1162 <src_is_valid_ratio+0x52>
movsd  0xeb1(%rip),%xmm0
ucomisd -0x8(%rbp),%xmm0
setae  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x10(%rbp)
jmp    1189 <src_is_valid_ratio+0x79>
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<src_is_valid_ratio>:
push   %rax
movsd  %xmm0,(%rsp)
lea    0xef3(%rip),%rdi
call   1030 <getenv@plt>
test   %rax,%rax
je     114a <src_is_valid_ratio+0x3a>
movsd  (%rsp),%xmm1
ucomisd 0xecc(%rip),%xmm1
setae  %cl
movsd  0xec9(%rip),%xmm0
ucomisd %xmm1,%xmm0
setae  %al
and    %cl,%al
jmp    115a <src_is_valid_ratio+0x4a>
xorpd  %xmm0,%xmm0
movsd  (%rsp),%xmm1
ucomisd %xmm0,%xmm1
seta   %al
movzbl %al,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"SOXR_LSR_STRICT\00"
define i32 @src_is_valid_ratio(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = call i64 @getenv(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %14
5: ; preds = %1
%6 = load double, double* %2
%7 = fcmp oge double %6, 3.906250e-03
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load double, double* %2
%10 = fcmp ole double %9, 2.560000e+02
br label %11
11: ; preds = %8, %5
%12 = phi i1 [ false, %5 ], [ %10, %8 ]
%13 = zext i1 %12 to i32
br label %18
14: ; preds = %1
%15 = load double, double* %2
%16 = fcmp ogt double %15, 0.000000e+00
%17 = zext i1 %16 to i32
br label %18
18: ; preds = %14, %11
%19 = phi i32 [ %13, %11 ], [ %17, %14 ]
ret i32 %19
}

LLVM IR (-O2):
@.str = [16 x i8] c"SOXR_LSR_STRICT\00"
define i32 @src_is_valid_ratio(double %0) {
%2 = tail call i64 @getenv(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = fcmp oge double %0, 3.906250e-03
%6 = fcmp ole double %0, 2.560000e+02
%7 = and i1 %5, %6
br label %10
8: ; preds = %1
%9 = fcmp ogt double %0, 0.000000e+00
br label %10
10: ; preds = %8, %4
%11 = phi i1 [ %7, %4 ], [ %9, %8 ]
%12 = zext i1 %11 to i32
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ fatal(char *, char *, int);
void *realloc(void *, int);
void *erealloc(void *rv, int size) {
  void *new_rv;
  if ((new_rv = realloc(rv, size)) == NULL)
    fatal("realloc failed", "", 1);
  return new_rv;
}


x86 assembly (clang, -O0):
<erealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    1161 <erealloc+0x41>
lea    0xeb0(%rip),%rdi
lea    0xeb7(%rip),%rsi
mov    $0x1,%edx
call   1040 <fatal@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<erealloc>:
push   %rbx
call   1030 <realloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1146 <erealloc+0x26>
lea    0xecb(%rip),%rdi
lea    0xed2(%rip),%rsi
mov    $0x1,%edx
call   1040 <fatal@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"realloc failed\00"
@.str.1 = [1 x i8] zeroinitializer
define i8* @erealloc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i8* @realloc(i8* %6, i32 %7)
store i8* %8, i8** %5
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = call i32 @fatal(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), i32 1)
br label %12
12: ; preds = %10, %2
%13 = load i8*, i8** %5
ret i8* %13
}

LLVM IR (-O2):
@.str = [15 x i8] c"realloc failed\00"
@.str.1 = [1 x i8] zeroinitializer
define i8* @erealloc(i8* %0, i32 %1) {
%3 = tail call i8* @realloc(i8* %0, i32 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @fatal(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), i32 1)
br label %7
7: ; preds = %5, %2
ret i8* %3
}
long int f6(int x) { return ~(1ULL << x); }


x86 assembly (clang, -O0):
<f6>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
xor    $0xffffffffffffffff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f6>:
mov    %edi,%ecx
mov    $0xfffffffffffffffe,%rax
rol    %cl,%rax
ret

LLVM IR (-O0):
define i64 @f6(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = shl i64 1, %4
%6 = xor i64 %5, -1
ret i64 %6
}

LLVM IR (-O2):
define i64 @f6(i32 %0) {
%2 = zext i32 %0 to i64
%3 = shl nuw i64 1, %2
%4 = xor i64 %3, -1
ret i64 %4
}
unsigned int UARTScratchPadRegRead(unsigned int baseAdd) {
  return ((*((volatile unsigned int *)(baseAdd + (0x1C)))) & (0x000000FFu));
}


x86 assembly (clang, -O0):
<UARTScratchPadRegRead>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1c,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTScratchPadRegRead>:
add    $0x1c,%edi
mov    (%rdi),%eax
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @UARTScratchPadRegRead(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 28
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, 255
ret i32 %8
}

LLVM IR (-O2):
define i32 @UARTScratchPadRegRead(i32 %0) {
%2 = add i32 %0, 28
%3 = zext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = and i32 %5, 255
ret i32 %6
}
int dxl_equal(char *typ, char *val, char *s, int n) { return 0; }


x86 assembly (clang, -O0):
<dxl_equal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dxl_equal>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dxl_equal(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
ret i32 0
}

LLVM IR (-O2):
define i32 @dxl_equal(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i32 %3) {
ret i32 0
}
g(a, b) {}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
ret

LLVM IR (-O0):
define i32 @g(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @g(i32 %0, i32 %1) {
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fscanf(int /*<<< orphan*/ *, char *, char *);
const char *_fetch_read_word(FILE *f) {
  static char word[1024];
  if (fscanf(f, " %1024s ", word) != 1)
    return (NULL);
  return (word);
}


x86 assembly (clang, -O0):
<_fetch_read_word>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
lea    0x2f12(%rip),%rdx
call   1030 <fscanf@plt>
cmp    $0x1,%eax
je     1149 <_fetch_read_word+0x39>
movq   $0x0,-0x8(%rbp)
jmp    1154 <_fetch_read_word+0x44>
lea    0x2ef0(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fetch_read_word>:
push   %rbx
lea    0xee8(%rip),%rsi
lea    0x2f21(%rip),%rbx
mov    %rbx,%rdx
call   1030 <fscanf@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
cmove  %rbx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@_fetch_read_word.word = internal global [1024 x i8] zeroinitializer
@.str = [9 x i8] c" %1024s \00"
define i8* @_fetch_read_word(i32* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = call i32 @fscanf(i32* %4, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @_fetch_read_word.word, i64 0, i64 0))
%6 = icmp ne i32 %5, 1
br i1 %6, label %7, label %8
7: ; preds = %1
store i8* null, i8** %2
br label %9
8: ; preds = %1
store i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @_fetch_read_word.word, i64 0, i64 0), i8** %2
br label %9
9: ; preds = %8, %7
%10 = load i8*, i8** %2
ret i8* %10
}

LLVM IR (-O2):
@_fetch_read_word.word = internal global [1024 x i8] zeroinitializer
@.str = [9 x i8] c" %1024s \00"
define i8* @_fetch_read_word(i32* nocapture %0) {
%2 = tail call i32 @fscanf(i32* %0, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @_fetch_read_word.word, i64 0, i64 0))
%3 = icmp eq i32 %2, 1
%4 = select i1 %3, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @_fetch_read_word.word, i64 0, i64 0), i8* null
ret i8* %4
}
/* Variables and functions */
int rpmatch(char const *);
__attribute__((__weak__, __always___)) int
softboundcets_rpmatch(const char *response) {
  return rpmatch(response);
}


x86 assembly (clang, -O0):
<softboundcets_rpmatch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <rpmatch@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundcets_rpmatch>:
jmp    1030 <rpmatch@plt>

LLVM IR (-O0):
define weak i32 @softboundcets_rpmatch(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @rpmatch(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define weak i32 @softboundcets_rpmatch(i8* %0) {
%2 = tail call i32 @rpmatch(i8* %0)
ret i32 %2
}
void yydestruct(const char *yymsg, int yytype, struct ListaVetor *yyvaluep) {
  ((void)(yyvaluep));
  if (!yymsg)
    yymsg = "Deleting";
  ;

#pragma GCC diagnostic push

#pragma GCC diagnostic ignored "-Wuninitialized"

#pragma GCC diagnostic ignored "-Wmaybe-uninitialized"

  ((void)(yytype));

#pragma GCC diagnostic pop
}


x86 assembly (clang, -O0):
<yydestruct>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1125 <yydestruct+0x25>
lea    0xedf(%rip),%rax
mov    %rax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<yydestruct>:
ret

LLVM IR (-O0):
%struct.ListaVetor = type opaque
@.str = [9 x i8] c"Deleting\00"
define void @yydestruct(i8* %0, i32 %1, %struct.ListaVetor* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca %struct.ListaVetor*
store i8* %0, i8** %4
store i32 %1, i32* %5
store %struct.ListaVetor* %2, %struct.ListaVetor** %6
%7 = load %struct.ListaVetor*, %struct.ListaVetor** %6
%8 = load i8*, i8** %4
%9 = icmp ne i8* %8, null
br i1 %9, label %11, label %10
10: ; preds = %3
store i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8** %4
br label %11
11: ; preds = %10, %3
%12 = load i32, i32* %5
ret void
}

LLVM IR (-O2):
%struct.ListaVetor = type opaque
define void @yydestruct(i8* nocapture %0, i32 %1, %struct.ListaVetor* nocapture %2) {
ret void
}
double new_speed(double initial_speed, double acceleration, double delta_t) {
  return initial_speed + acceleration * delta_t;
}


x86 assembly (clang, -O0):
<new_speed>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<new_speed>:
mulsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @new_speed(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = load double, double* %6
%10 = call double @llvm.fmuladd.f64(double %8, double %9, double %7)
ret double %10
}

LLVM IR (-O2):
define double @new_speed(double %0, double %1, double %2) {
%4 = tail call double @llvm.fmuladd.f64(double %1, double %2, double %0)
ret double %4
}
/* Type definitions */
struct UPnPService {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void RNDResponseSink_RenderingControl_SetSharpness(struct UPnPService *Service,
                                                   int ErrorCode, void *User) {
  printf(
      "RND Invoke Response: RenderingControl/SetSharpness[ErrorCode:%d]()\r\n",
      ErrorCode);
}


x86 assembly (clang, -O0):
<RNDResponseSink_RenderingControl_SetSharpness>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0xc(%rbp),%esi
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNDResponseSink_RenderingControl_SetSharpness>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
%struct.UPnPService = type { i32 }
@.str = [69 x i8] c"RND Invoke Response: RenderingControl/SetSharpness[ErrorCode:%d]()\0D\0A\00"
define void @RNDResponseSink_RenderingControl_SetSharpness(%struct.UPnPService* %0, i32 %1, i8* %2) {
%4 = alloca %struct.UPnPService*
%5 = alloca i32
%6 = alloca i8*
store %struct.UPnPService* %0, %struct.UPnPService** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %5
%8 = call i32 @printf(i8* getelementptr inbounds ([69 x i8], [69 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
%struct.UPnPService = type { i32 }
@.str = [69 x i8] c"RND Invoke Response: RenderingControl/SetSharpness[ErrorCode:%d]()\0D\0A\00"
define void @RNDResponseSink_RenderingControl_SetSharpness(%struct.UPnPService* nocapture readnone %0, i32 %1, i8* nocapture readnone %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([69 x i8], [69 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
int g_DUMMY_popup_checkbox(int win_id, char *title, char *subtitle,
                           int item_count, char *items[], int *select) {
  win_id = win_id;
  title = title;
  subtitle = subtitle;
  item_count = item_count;
  items = items;
  select = select;
  return 0;
}


x86 assembly (clang, -O0):
<g_DUMMY_popup_checkbox>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,-0x30(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_DUMMY_popup_checkbox>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @g_DUMMY_popup_checkbox(i32 %0, i8* %1, i8* %2, i32 %3, i8** %4, i32* %5) {
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i32
%11 = alloca i8**
%12 = alloca i32*
store i32 %0, i32* %7
store i8* %1, i8** %8
store i8* %2, i8** %9
store i32 %3, i32* %10
store i8** %4, i8*** %11
store i32* %5, i32** %12
%13 = load i32, i32* %7
store i32 %13, i32* %7
%14 = load i8*, i8** %8
store i8* %14, i8** %8
%15 = load i8*, i8** %9
store i8* %15, i8** %9
%16 = load i32, i32* %10
store i32 %16, i32* %10
%17 = load i8**, i8*** %11
store i8** %17, i8*** %11
%18 = load i32*, i32** %12
store i32* %18, i32** %12
ret i32 0
}

LLVM IR (-O2):
define i32 @g_DUMMY_popup_checkbox(i32 %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i32 %3, i8** nocapture readnone %4, i32* nocapture readnone %5) {
ret i32 0
}
int do_218() { return 218; }


x86 assembly (clang, -O0):
<do_218>:
push   %rbp
mov    %rsp,%rbp
mov    $0xda,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_218>:
mov    $0xda,%eax
ret

LLVM IR (-O0):
define i32 @do_218() {
ret i32 218
}

LLVM IR (-O2):
define i32 @do_218() {
ret i32 218
}
/* Variables and functions */
int kappa2(double);
int omega(double);
double k2om(double x) { return kappa2(x) / (2 * omega(x)); }


x86 assembly (clang, -O0):
<k2om>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <kappa2@plt>
mov    %eax,-0xc(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <omega@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
shl    $0x1,%ecx
cltd
idiv   %ecx
cvtsi2sd %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<k2om>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm0,0x8(%rsp)
call   1040 <kappa2@plt>
mov    %eax,%ebx
movsd  0x8(%rsp),%xmm0
call   1030 <omega@plt>
mov    %eax,%ecx
add    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define double @k2om(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @kappa2(double %3)
%5 = load double, double* %2
%6 = call i32 @omega(double %5)
%7 = mul nsw i32 2, %6
%8 = sdiv i32 %4, %7
%9 = sitofp i32 %8 to double
ret double %9
}

LLVM IR (-O2):
define double @k2om(double %0) {
%2 = tail call i32 @kappa2(double %0)
%3 = tail call i32 @omega(double %0)
%4 = shl nsw i32 %3, 1
%5 = sdiv i32 %2, %4
%6 = sitofp i32 %5 to double
ret double %6
}
void stall(void *arg) {}


x86 assembly (clang, -O0):
<stall>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<stall>:
ret

LLVM IR (-O0):
define void @stall(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @stall(i8* nocapture %0) {
ret void
}