xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int getchar();
scalar_t__ kbhit();
int /*<<< orphan*/ printf(char *);
int checkExit(void) {
  int cc = 0;
  if (kbhit()) {
    cc = getchar();
    if (cc == 'q' || cc == 'Q') {
      printf("\n");
      exit(0);
    }
    return (cc);
  }
  return (0);
}


x86 assembly (clang, -O0):
<checkExit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x8(%rbp)
mov    $0x0,%al
call   1040 <kbhit@plt>
cmp    $0x0,%rax
je     119c <checkExit+0x5c>
mov    $0x0,%al
call   1050 <getchar@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x71,-0x8(%rbp)
je     117e <checkExit+0x3e>
cmpl   $0x51,-0x8(%rbp)
jne    1191 <checkExit+0x51>
lea    0xe7b(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1060 <exit@plt>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    11a3 <checkExit+0x63>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkExit>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <kbhit@plt>
test   %rax,%rax
je     1160 <checkExit+0x20>
xor    %eax,%eax
call   1050 <getchar@plt>
mov    %eax,%ebx
and    $0xffffffdf,%eax
cmp    $0x51,%eax
je     1164 <checkExit+0x24>
mov    %ebx,%eax
pop    %rbx
ret
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %edi,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define i32 @checkExit() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %2
%3 = call i64 (...) @kbhit()
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %17
5: ; preds = %0
%6 = call i32 (...) @getchar()
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = icmp eq i32 %7, 113
br i1 %8, label %12, label %9
9: ; preds = %5
%10 = load i32, i32* %2
%11 = icmp eq i32 %10, 81
br i1 %11, label %12, label %15
12: ; preds = %9, %5
%13 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%14 = call i32 @exit(i32 0)
unreachable
15: ; preds = %9
%16 = load i32, i32* %2
store i32 %16, i32* %1
br label %18
17: ; preds = %0
store i32 0, i32* %1
br label %18
18: ; preds = %17, %15
%19 = load i32, i32* %1
ret i32 %19
}

LLVM IR (-O2):
define i32 @checkExit() {
%1 = tail call i64 (...) @kbhit()
%2 = icmp eq i64 %1, 0
br i1 %2, label %10, label %3
3: ; preds = %0
%4 = tail call i32 (...) @getchar()
%5 = and i32 %4, -33
%6 = icmp eq i32 %5, 81
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = tail call i32 @putchar(i32 10)
%9 = tail call i32 @exit(i32 0)
unreachable
10: ; preds = %0, %3
%11 = phi i32 [ %4, %3 ], [ 0, %0 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ switcheroo(int);
int main(int argc, char *argv[]) {
  switcheroo(argc);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <switcheroo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <switcheroo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = call i32 @switcheroo(i32 %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @switcheroo(i32 %0)
ret i32 0
}
/* Variables and functions */
void *f1();
void *f2();
int main() {
  void *v1 = f1();
  void *v2 = f2();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <f1@plt>
mov    %rax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <f2@plt>
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <f1@plt>
xor    %eax,%eax
call   1030 <f2@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i8*
%2 = alloca i8*
%3 = call i8* (...) @f1()
store i8* %3, i8** %1
%4 = call i8* (...) @f2()
store i8* %4, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i8* (...) @f1()
%2 = tail call i8* (...) @f2()
ret i32 0
}
const char *mz_version(void) { return "9.1.11"; }


x86 assembly (clang, -O0):
<mz_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mz_version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [7 x i8] c"9.1.11\00"
define i8* @mz_version() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [7 x i8] c"9.1.11\00"
define i8* @mz_version() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}
int typed_oldstyle1(dummy)
char *dummy;
{ ; }


x86 assembly (clang, -O0):
<typed_oldstyle1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<typed_oldstyle1>:
ret

LLVM IR (-O0):
define i32 @typed_oldstyle1(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @typed_oldstyle1(i8* nocapture readnone %0) {
ret i32 undef
}
int get_pathmtu(struct msghdr *mhdr) { return (0); }


x86 assembly (clang, -O0):
<get_pathmtu>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_pathmtu>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.msghdr = type opaque
define i32 @get_pathmtu(%struct.msghdr* %0) {
%2 = alloca %struct.msghdr*
store %struct.msghdr* %0, %struct.msghdr** %2
ret i32 0
}

LLVM IR (-O2):
%struct.msghdr = type opaque
define i32 @get_pathmtu(%struct.msghdr* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ __u8;

/* Variables and functions */
int /*<<< orphan*/ __put_unaligned_4(unsigned long long const,
                                     int /*<<< orphan*/ *);
extern void __put_unaligned_8(const unsigned long long __v,
                              register __u8 *__p) {
  __put_unaligned_4(__v, __p + 4);
  __put_unaligned_4(__v >> 32, __p);
}


x86 assembly (clang, -O0):
<__put_unaligned_8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
add    $0x10,%rsi
call   1030 <__put_unaligned_4@plt>
mov    -0x8(%rbp),%rdi
shr    $0x20,%rdi
mov    -0x10(%rbp),%rsi
call   1030 <__put_unaligned_4@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__put_unaligned_8>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
add    $0x10,%rsi
call   1030 <__put_unaligned_4@plt>
shr    $0x20,%rbx
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <__put_unaligned_4@plt>

LLVM IR (-O0):
define void @__put_unaligned_8(i64 %0, i32* %1) {
%3 = alloca i64
%4 = alloca i32*
store i64 %0, i64* %3
store i32* %1, i32** %4
%5 = load i64, i64* %3
%6 = load i32*, i32** %4
%7 = getelementptr inbounds i32, i32* %6, i64 4
%8 = call i32 @__put_unaligned_4(i64 %5, i32* %7)
%9 = load i64, i64* %3
%10 = lshr i64 %9, 32
%11 = load i32*, i32** %4
%12 = call i32 @__put_unaligned_4(i64 %10, i32* %11)
ret void
}

LLVM IR (-O2):
define void @__put_unaligned_8(i64 %0, i32* %1) {
%3 = getelementptr inbounds i32, i32* %1, i64 4
%4 = tail call i32 @__put_unaligned_4(i64 %0, i32* %3)
%5 = lshr i64 %0, 32
%6 = tail call i32 @__put_unaligned_4(i64 %5, i32* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ discardUnnecessaryInput();
int /*<<< orphan*/ printf(char *);
void waitForEnterKey() {
  printf("\n\nPress enter key to continue .... ");
  discardUnnecessaryInput();
  discardUnnecessaryInput();
}


x86 assembly (clang, -O0):
<waitForEnterKey>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <discardUnnecessaryInput@plt>
mov    $0x0,%al
call   1040 <discardUnnecessaryInput@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<waitForEnterKey>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
call   1040 <discardUnnecessaryInput@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <discardUnnecessaryInput@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"\0A\0APress enter key to continue .... \00"
define void @waitForEnterKey() {
%1 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @discardUnnecessaryInput()
%3 = call i32 (...) @discardUnnecessaryInput()
ret void
}

LLVM IR (-O2):
@.str = [36 x i8] c"\0A\0APress enter key to continue .... \00"
define void @waitForEnterKey() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @discardUnnecessaryInput()
%3 = tail call i32 (...) @discardUnnecessaryInput()
ret void
}
/* Variables and functions */
int EcrireParametre(char *, char *, char *);
int /*<<< orphan*/ printf(char *);
void testEcrireParametre() {
  char *NomFichier;
  char *Parametre;
  char *Valeur;
  int result = EcrireParametre(NomFichier, Parametre, Valeur);
  if (1) {
    printf("%%TEST_FAILED%% time=0 testname=testEcrireParametre "
           "(Test_gestionfichier) message=error message sample\n");
  }
}


x86 assembly (clang, -O0):
<testEcrireParametre>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <EcrireParametre@plt>
mov    %eax,-0x1c(%rbp)
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testEcrireParametre>:
push   %rax
call   1040 <EcrireParametre@plt>
lea    0xed3(%rip),%rdi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [104 x i8] c"%%TEST_FAILED%% time=0 testname=testEcrireParametre (Test_gestionfichier) message=error message sample\0A\00"
define void @testEcrireParametre() {
%1 = alloca i8*
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
%5 = load i8*, i8** %1
%6 = load i8*, i8** %2
%7 = load i8*, i8** %3
%8 = call i32 @EcrireParametre(i8* %5, i8* %6, i8* %7)
store i32 %8, i32* %4
%9 = call i32 @printf(i8* getelementptr inbounds ([104 x i8], [104 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [104 x i8] c"%%TEST_FAILED%% time=0 testname=testEcrireParametre (Test_gestionfichier) message=error message sample\0A\00"
define void @testEcrireParametre() {
%1 = tail call i32 @EcrireParametre(i8* undef, i8* undef, i8* undef)
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([104 x i8], [104 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ isdigit(char);
int isnum(char *s) {
  register char *c;
  c = s;
  while (*c) {
    if (!isdigit(*c))
      return 0;
    c++;
  }
  return 1;
}


x86 assembly (clang, -O0):
<isnum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     1163 <isnum+0x53>
mov    -0x18(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%eax
jne    1152 <isnum+0x42>
movl   $0x0,-0x4(%rbp)
jmp    116a <isnum+0x5a>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1124 <isnum+0x14>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isnum>:
push   %rbp
push   %rbx
push   %rax
mov    (%rdi),%al
mov    $0x1,%ebp
test   %al,%al
je     114b <isnum+0x3b>
mov    %rdi,%rbx
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
nop
movsbl %al,%edi
call   1030 <isdigit@plt>
test   %eax,%eax
je     1149 <isnum+0x39>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <isnum+0x20>
jmp    114b <isnum+0x3b>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @isnum(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
store i8* %5, i8** %4
br label %6
6: ; preds = %16, %1
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = call i32 @isdigit(i8 signext %12)
%14 = icmp ne i32 %13, 0
br i1 %14, label %16, label %15
15: ; preds = %10
store i32 0, i32* %2
br label %20
16: ; preds = %10
%17 = load i8*, i8** %4
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %4
br label %6
19: ; preds = %6
store i32 1, i32* %2
br label %20
20: ; preds = %19, %15
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @isnum(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %7
4: ; preds = %7
%5 = load i8, i8* %12
%6 = icmp eq i8 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %1, %4
%8 = phi i8 [ %5, %4 ], [ %2, %1 ]
%9 = phi i8* [ %12, %4 ], [ %0, %1 ]
%10 = tail call i32 @isdigit(i8 signext %8)
%11 = icmp eq i32 %10, 0
%12 = getelementptr inbounds i8, i8* %9, i64 1
br i1 %11, label %13, label %4
13: ; preds = %7, %4, %1
%14 = phi i32 [ 1, %1 ], [ 1, %4 ], [ 0, %7 ]
ret i32 %14
}
/* Type definitions */
typedef scalar_t__ uint32_t;
typedef int /*<<< orphan*/ in;

/* Variables and functions */
uint32_t FROM_LE32(uint32_t in) {
  unsigned char *pin = (unsigned char *)&in;
  uint32_t out;
  int i;
  for (i = 0, out = 0; i < sizeof(in); ++i)
    out += pin[i] << (8 * i);
  return out;
}


x86 assembly (clang, -O0):
<FROM_LE32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x1c(%rbp)
movq   $0x0,-0x18(%rbp)
movslq -0x1c(%rbp),%rax
cmp    $0x8,%rax
jae    1159 <FROM_LE32+0x59>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movzbl (%rax,%rcx,1),%eax
mov    -0x1c(%rbp),%ecx
shl    $0x3,%ecx
shl    %cl,%eax
cltq
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    111f <FROM_LE32+0x1f>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FROM_LE32>:
ret

LLVM IR (-O0):
define i64 @FROM_LE32(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i32
store i64 %0, i64* %2
%6 = bitcast i64* %2 to i8*
store i8* %6, i8** %3
store i32 0, i32* %5
store i64 0, i64* %4
br label %7
7: ; preds = %24, %1
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = icmp ult i64 %9, 8
br i1 %10, label %11, label %27
11: ; preds = %7
%12 = load i8*, i8** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = load i32, i32* %5
%19 = mul nsw i32 8, %18
%20 = shl i32 %17, %19
%21 = sext i32 %20 to i64
%22 = load i64, i64* %4
%23 = add nsw i64 %22, %21
store i64 %23, i64* %4
br label %24
24: ; preds = %11
%25 = load i32, i32* %5
%26 = add nsw i32 %25, 1
store i32 %26, i32* %5
br label %7
27: ; preds = %7
%28 = load i64, i64* %4
ret i64 %28
}

LLVM IR (-O2):
define i64 @FROM_LE32(i64 %0) {
ret i64 poison
}
char *quicklisp_extention(struct install_options *param) { return ".lisp"; }


x86 assembly (clang, -O0):
<quicklisp_extention>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    0xef1(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<quicklisp_extention>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
%struct.install_options = type opaque
@.str = [6 x i8] c".lisp\00"
define i8* @quicklisp_extention(%struct.install_options* %0) {
%2 = alloca %struct.install_options*
store %struct.install_options* %0, %struct.install_options** %2
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
%struct.install_options = type opaque
@.str = [6 x i8] c".lisp\00"
define i8* @quicklisp_extention(%struct.install_options* nocapture readnone %0) {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
int test_imm_FDint64_lowword_reg(long long val) {
  return ((val) & (0xFD << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FDint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xfd,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FDint64_lowword_reg>:
test   $0xfd,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FDint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 253
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_FDint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 253
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
__attribute__((__noreturn__)) void abort(void) {
  printf("Aborted...");
  while (1) {
  }
}


x86 assembly (clang, -O0):
<abort>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
jmp    1120 <abort+0x10>

x86 assembly (clang, -O2):
<abort>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
nopl   (%rax)
jmp    1120 <abort+0x10>

LLVM IR (-O0):
@.str = [11 x i8] c"Aborted...\00"
define void @abort() {
%1 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
@.str = [11 x i8] c"Aborted...\00"
define void @abort() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
br label %2
2: ; preds = %0, %2
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int sayi_oku() {
  int x;
  printf("sayi girin: ");
  scanf("%d", &x);
  return x;
}


x86 assembly (clang, -O0):
<sayi_oku>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
lea    0xed2(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sayi_oku>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
lea    0xed9(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"sayi girin: \00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @sayi_oku() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
@.str = [13 x i8] c"sayi girin: \00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @sayi_oku() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
ret i32 %5
}
void fa167(void) {
P0A:
  goto P0A;
  ({
    P01A:
      goto P01A;
      ({
        P012A:
          goto P012A;
          0;
      });
    P01B:
      goto P01B;
      ({
        P013A:
          goto P013A;
          0;
      });
    P01C:
      goto P01C;
      0;
  });
P0B:
  goto P0B;
  ({
    P02A:
      goto P02A;
      ({
        P024A:
          goto P024A;
          0;
      });
    P02B:
      goto P02B;
      ({
        P025A:
          goto P025A;
          0;
      });
    a:
      goto a;
    P02C:
      goto P02C;
      0;
  });
P0C:
  goto P0C;
  0;
P0D:
  goto P0D;
}


x86 assembly (clang, -O0):
<fa167>:
push   %rbp
mov    %rsp,%rbp
jmp    1104 <fa167+0x4>

x86 assembly (clang, -O2):
<fa167>:
jmp    1100 <fa167>

LLVM IR (-O0):
define void @fa167() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
br label %7
7: ; preds = %7, %0
br label %7
8: ; No predecessors!
br label %9
9: ; preds = %9, %8
br label %9
10: ; No predecessors!
br label %11
11: ; preds = %11, %10
br label %11
12: ; preds = %12
br label %12
13: ; No predecessors!
br label %14
14: ; preds = %14, %13
br label %14
15: ; preds = %15
br label %15
16: ; preds = %16
br label %16
17: ; No predecessors!
br label %18
18: ; preds = %18, %17
br label %18
19: ; No predecessors!
br label %20
20: ; preds = %20, %19
br label %20
21: ; preds = %21
br label %21
22: ; No predecessors!
br label %23
23: ; preds = %23, %22
br label %23
24: ; preds = %24
br label %24
25: ; preds = %25
br label %25
26: ; preds = %26
br label %26
27: ; preds = %27
br label %27
}

LLVM IR (-O2):
define void @fa167() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ link_failure_significandf();
scalar_t__ significandf(float);
void test_significandf(float f) {
  if (significandf(f) != significandf(f))
    link_failure_significandf();
}


x86 assembly (clang, -O0):
<test_significandf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1040 <significandf@plt>
mov    %rax,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
call   1040 <significandf@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
je     115c <test_significandf+0x3c>
mov    $0x0,%al
call   1030 <link_failure_significandf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_significandf>:
push   %rbx
sub    $0x10,%rsp
movss  %xmm0,0xc(%rsp)
call   1040 <significandf@plt>
mov    %rax,%rbx
movss  0xc(%rsp),%xmm0
call   1040 <significandf@plt>
cmp    %rax,%rbx
jne    1149 <test_significandf+0x29>
add    $0x10,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1030 <link_failure_significandf@plt>

LLVM IR (-O0):
define void @test_significandf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i64 @significandf(float %3)
%5 = load float, float* %2
%6 = call i64 @significandf(float %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_significandf()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_significandf(float %0) {
%2 = tail call i64 @significandf(float %0)
%3 = tail call i64 @significandf(float %0)
%4 = icmp eq i64 %2, %3
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @link_failure_significandf()
br label %7
7: ; preds = %5, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ two_safety_conditions(int);
void call_two_safety_conditions_l1_and_l2_Bad() { two_safety_conditions(10); }


x86 assembly (clang, -O0):
<call_two_safety_conditions_l1_and_l2_Bad>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
call   1030 <two_safety_conditions@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_two_safety_conditions_l1_and_l2_Bad>:
mov    $0xa,%edi
jmp    1030 <two_safety_conditions@plt>

LLVM IR (-O0):
define void @call_two_safety_conditions_l1_and_l2_Bad() {
%1 = call i32 @two_safety_conditions(i32 10)
ret void
}

LLVM IR (-O2):
define void @call_two_safety_conditions_l1_and_l2_Bad() {
%1 = tail call i32 @two_safety_conditions(i32 10)
ret void
}
unsigned long find_zero(unsigned long mask) {
  long a = (0x0ff0001 + mask) >> 23;
  return a & mask;
}


x86 assembly (clang, -O0):
<find_zero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0xff0001,%rax
shr    $0x17,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_zero>:
lea    0xff0001(%rdi),%rax
shr    $0x17,%rax
and    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @find_zero(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = add i64 16711681, %4
%6 = lshr i64 %5, 23
store i64 %6, i64* %3
%7 = load i64, i64* %3
%8 = load i64, i64* %2
%9 = and i64 %7, %8
ret i64 %9
}

LLVM IR (-O2):
define i64 @find_zero(i64 %0) {
%2 = add i64 %0, 16711681
%3 = lshr i64 %2, 23
%4 = and i64 %3, %0
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ default_handler();
__attribute__((weak)) void UART5_IRQHandler() { default_handler(); }


x86 assembly (clang, -O0):
<UART5_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <default_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<UART5_IRQHandler>:
xor    %eax,%eax
jmp    1030 <default_handler@plt>

LLVM IR (-O0):
define weak void @UART5_IRQHandler() {
%1 = call i32 (...) @default_handler()
ret void
}

LLVM IR (-O2):
define weak void @UART5_IRQHandler() {
%1 = tail call i32 (...) @default_handler()
ret void
}
/* Variables and functions */
unsigned int _mm_crc32_u32(unsigned int, unsigned int);
unsigned int test_mm_crc32_u32(unsigned int CRC, unsigned int V) {
  return _mm_crc32_u32(CRC, V);
}


x86 assembly (clang, -O0):
<test_mm_crc32_u32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_crc32_u32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_crc32_u32>:
jmp    1030 <_mm_crc32_u32@plt>

LLVM IR (-O0):
define i32 @test_mm_crc32_u32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_crc32_u32(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_crc32_u32(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_crc32_u32(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
char *basename(char *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void show_usage(char *prog_name) {
  char *name = basename(prog_name);
  fprintf(stderr, "Syntax: %s [-x|-r] <image>\n", name);
}


x86 assembly (clang, -O0):
<show_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <basename@plt>
mov    %rax,-0x10(%rbp)
mov    0x2ea0(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
lea    0xeb3(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_usage>:
push   %rax
call   1040 <basename@plt>
mov    0x2eb3(%rip),%rcx
mov    (%rcx),%edi
lea    0xeca(%rip),%rsi
mov    %rax,%rdx
pop    %rax
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [28 x i8] c"Syntax: %s [-x|-r] <image>\0A\00"
define void @show_usage(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @basename(i8* %4)
store i8* %5, i8** %3
%6 = load i32, i32* @stderr
%7 = load i8*, i8** %3
%8 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %7)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [28 x i8] c"Syntax: %s [-x|-r] <image>\0A\00"
define void @show_usage(i8* %0) {
%2 = tail call i8* @basename(i8* %0)
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %2)
ret void
}
int isVowel(char ch) {
  if (ch == 'a' || ch == 'e' || ch == 'i' || ch == 'o' || ch == 'u')
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<isVowel>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
je     114b <isVowel+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x65,%eax
je     114b <isVowel+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x69,%eax
je     114b <isVowel+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x6f,%eax
je     114b <isVowel+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x75,%eax
jne    1157 <isVowel+0x57>
movl   $0x1,-0x4(%rbp)
jmp    115e <isVowel+0x5e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isVowel>:
add    $0x9f,%dil
ror    %dil
xor    %eax,%eax
cmp    $0xa,%dil
ja     111d <isVowel+0x1d>
movsbq %dil,%rax
lea    0xee6(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @isVowel(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 97
br i1 %6, label %23, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 101
br i1 %10, label %23, label %11
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 105
br i1 %14, label %23, label %15
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 111
br i1 %18, label %23, label %19
19: ; preds = %15
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %21, 117
br i1 %22, label %23, label %24
23: ; preds = %19, %15, %11, %7, %1
store i32 1, i32* %2
br label %25
24: ; preds = %19
store i32 0, i32* %2
br label %25
25: ; preds = %24, %23
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
@switch.table.isVowel = [11 x i32] [i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 1]
define i32 @isVowel(i8 signext %0) {
%2 = add i8 %0, -97
%3 = tail call i8 @llvm.fshl.i8(i8 %2, i8 %2, i8 7)
%4 = icmp ult i8 %3, 11
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = sext i8 %3 to i64
%7 = getelementptr inbounds [11 x i32], [11 x i32]* @switch.table.isVowel, i64 0, i64 %6
%8 = load i32, i32* %7
br label %9
9: ; preds = %1, %5
%10 = phi i32 [ %8, %5 ], [ 0, %1 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void foo(void) { printf("in foo\n"); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"in foo\0A\00"
define void @foo() {
%1 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [7 x i8] c"in foo\00"
define void @foo() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ simple_check(int);
void no_assertion_failure() {
  int x = 2;
  simple_check(x);
}


x86 assembly (clang, -O0):
<no_assertion_failure>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x2,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <simple_check@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<no_assertion_failure>:
mov    $0x2,%edi
jmp    1030 <simple_check@plt>

LLVM IR (-O0):
define void @no_assertion_failure() {
%1 = alloca i32
store i32 2, i32* %1
%2 = load i32, i32* %1
%3 = call i32 @simple_check(i32 %2)
ret void
}

LLVM IR (-O2):
define void @no_assertion_failure() {
%1 = tail call i32 @simple_check(i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ console_log(char *);
int main() { console_log("Hello world!"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <console_log@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <console_log@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello world!\00"
define i32 @main() {
%1 = call i32 @console_log(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hello world!\00"
define i32 @main() {
%1 = tail call i32 @console_log(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct stack {
  int dummy;
};

/* Variables and functions */
int min(struct stack *);
int /*<<< orphan*/ pushInternal(struct stack **, int);
void push(struct stack **Min, struct stack **normal, int data) {
  if (data < min(*Min)) {
    pushInternal(Min, data);
    pushInternal(normal, data);
  } else {
    pushInternal(normal, data);
  }
}


x86 assembly (clang, -O0):
<push>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <min@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
cmp    %ecx,%eax
jge    116f <push+0x4f>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <pushInternal@plt>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <pushInternal@plt>
jmp    117b <push+0x5b>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <pushInternal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<push>:
push   %r15
push   %r14
push   %rbx
mov    %edx,%ebx
mov    %rsi,%r14
mov    %rdi,%r15
mov    (%rdi),%rdi
call   1030 <min@plt>
cmp    %ebx,%eax
jle    1143 <push+0x23>
mov    %r15,%rdi
mov    %ebx,%esi
call   1040 <pushInternal@plt>
mov    %r14,%rdi
mov    %ebx,%esi
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <pushInternal@plt>

LLVM IR (-O0):
%struct.stack = type { i32 }
define void @push(%struct.stack** %0, %struct.stack** %1, i32 %2) {
%4 = alloca %struct.stack**
%5 = alloca %struct.stack**
%6 = alloca i32
store %struct.stack** %0, %struct.stack*** %4
store %struct.stack** %1, %struct.stack*** %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load %struct.stack**, %struct.stack*** %4
%9 = load %struct.stack*, %struct.stack** %8
%10 = call i32 @min(%struct.stack* %9)
%11 = icmp slt i32 %7, %10
br i1 %11, label %12, label %19
12: ; preds = %3
%13 = load %struct.stack**, %struct.stack*** %4
%14 = load i32, i32* %6
%15 = call i32 @pushInternal(%struct.stack** %13, i32 %14)
%16 = load %struct.stack**, %struct.stack*** %5
%17 = load i32, i32* %6
%18 = call i32 @pushInternal(%struct.stack** %16, i32 %17)
br label %23
19: ; preds = %3
%20 = load %struct.stack**, %struct.stack*** %5
%21 = load i32, i32* %6
%22 = call i32 @pushInternal(%struct.stack** %20, i32 %21)
br label %23
23: ; preds = %19, %12
ret void
}

LLVM IR (-O2):
%struct.stack = type { i32 }
define void @push(%struct.stack** %0, %struct.stack** %1, i32 %2) {
%4 = load %struct.stack*, %struct.stack** %0
%5 = tail call i32 @min(%struct.stack* %4)
%6 = icmp sgt i32 %5, %2
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = tail call i32 @pushInternal(%struct.stack** %0, i32 %2)
br label %9
9: ; preds = %3, %7
%10 = tail call i32 @pushInternal(%struct.stack** %1, i32 %2)
ret void
}
/* Variables and functions */
int textws(int, char *, int);
int drv_text(int p, char *s, int n) { return textws(p, s, n); }


x86 assembly (clang, -O0):
<drv_text>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <textws@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drv_text>:
jmp    1030 <textws@plt>

LLVM IR (-O0):
define i32 @drv_text(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @textws(i32 %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @drv_text(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @textws(i32 %0, i8* %1, i32 %2)
ret i32 %4
}
int amd_iommu_deactivate_guest_mode(void *data) { return 0; }


x86 assembly (clang, -O0):
<amd_iommu_deactivate_guest_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<amd_iommu_deactivate_guest_mode>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @amd_iommu_deactivate_guest_mode(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @amd_iommu_deactivate_guest_mode(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char const *);
void error(const char *errorMsg) {
  perror(errorMsg);
  exit(1);
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<error>:
push   %rax
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @error(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
scalar_t__ getegid();
char *getenv(char const *);
scalar_t__ geteuid();
scalar_t__ getgid();
scalar_t__ getuid();
char *getenv_wrapper(const char *name) {
  if (getuid() == geteuid() && getgid() == getegid()) {
    return getenv(name);
  } else {
    return NULL;
  }
}


x86 assembly (clang, -O0):
<getenv_wrapper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <getuid@plt>
mov    %rax,-0x18(%rbp)
mov    $0x0,%al
call   1050 <geteuid@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
jne    11b2 <getenv_wrapper+0x62>
mov    $0x0,%al
call   1060 <getgid@plt>
mov    %rax,-0x20(%rbp)
mov    $0x0,%al
call   1070 <getegid@plt>
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
cmp    %rcx,%rax
jne    11b2 <getenv_wrapper+0x62>
mov    -0x10(%rbp),%rdi
call   1030 <getenv@plt>
mov    %rax,-0x8(%rbp)
jmp    11ba <getenv_wrapper+0x6a>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getenv_wrapper>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %eax,%eax
call   1040 <getuid@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1050 <geteuid@plt>
cmp    %rax,%rbx
jne    1192 <getenv_wrapper+0x42>
xor    %eax,%eax
call   1060 <getgid@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1070 <getegid@plt>
cmp    %rax,%rbx
jne    1192 <getenv_wrapper+0x42>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <getenv@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @getenv_wrapper(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = call i64 (...) @getuid()
%5 = call i64 (...) @geteuid()
%6 = icmp eq i64 %4, %5
br i1 %6, label %7, label %14
7: ; preds = %1
%8 = call i64 (...) @getgid()
%9 = call i64 (...) @getegid()
%10 = icmp eq i64 %8, %9
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i8*, i8** %3
%13 = call i8* @getenv(i8* %12)
store i8* %13, i8** %2
br label %15
14: ; preds = %7, %1
store i8* null, i8** %2
br label %15
15: ; preds = %14, %11
%16 = load i8*, i8** %2
ret i8* %16
}

LLVM IR (-O2):
define i8* @getenv_wrapper(i8* nocapture %0) {
%2 = tail call i64 (...) @getuid()
%3 = tail call i64 (...) @geteuid()
%4 = icmp eq i64 %2, %3
br i1 %4, label %5, label %11
5: ; preds = %1
%6 = tail call i64 (...) @getgid()
%7 = tail call i64 (...) @getegid()
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %5
%10 = tail call i8* @getenv(i8* %0)
br label %11
11: ; preds = %1, %5, %9
%12 = phi i8* [ %10, %9 ], [ null, %5 ], [ null, %1 ]
ret i8* %12
}
/* Type definitions */
typedef int uint64_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
uint64_t TimerLoadGet64(uint32_t ui32Base) {
  uint32_t ui32High1, ui32High2, ui32Low;
  ;
  do {
    ui32High1 = (*((volatile uint32_t *)(ui32Base + 0x0000002C)));
    ui32Low = (*((volatile uint32_t *)(ui32Base + 0x00000028)));
    ui32High2 = (*((volatile uint32_t *)(ui32Base + 0x0000002C)));
  } while (ui32High1 != ui32High2);
  return (((uint64_t)ui32High1 << 32) | (uint64_t)ui32Low);
}


x86 assembly (clang, -O0):
<TimerLoadGet64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2c(%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0x28(%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2c(%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jne    1108 <TimerLoadGet64+0x8>
mov    -0x10(%rbp),%rax
mov    $0x20,%ecx
shl    %cl,%eax
mov    -0x20(%rbp),%rcx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerLoadGet64>:
mov    0x2c(%rdi),%rax
mov    0x28(%rdi),%rcx
cmp    0x2c(%rdi),%rax
jne    1100 <TimerLoadGet64>
ret

LLVM IR (-O0):
define i32 @TimerLoadGet64(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %2
br label %6
6: ; preds = %19, %1
%7 = load i64, i64* %2
%8 = add nsw i64 %7, 44
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
store i64 %10, i64* %3
%11 = load i64, i64* %2
%12 = add nsw i64 %11, 40
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
store i64 %14, i64* %5
%15 = load i64, i64* %2
%16 = add nsw i64 %15, 44
%17 = inttoptr i64 %16 to i64*
%18 = load volatile i64, i64* %17
store i64 %18, i64* %4
br label %19
19: ; preds = %6
%20 = load i64, i64* %3
%21 = load i64, i64* %4
%22 = icmp ne i64 %20, %21
br i1 %22, label %6, label %23
23: ; preds = %19
%24 = load i64, i64* %3
%25 = trunc i64 %24 to i32
%26 = shl i32 %25, 32
%27 = load i64, i64* %5
%28 = trunc i64 %27 to i32
%29 = or i32 %26, %28
ret i32 %29
}

LLVM IR (-O2):
define i32 @TimerLoadGet64(i64 %0) {
%2 = add nsw i64 %0, 44
%3 = inttoptr i64 %2 to i64*
%4 = add nsw i64 %0, 40
%5 = inttoptr i64 %4 to i64*
br label %6
6: ; preds = %6, %1
%7 = load volatile i64, i64* %3
%8 = load volatile i64, i64* %5
%9 = load volatile i64, i64* %3
%10 = icmp eq i64 %7, %9
br i1 %10, label %11, label %6
11: ; preds = %6
ret i32 poison
}
unsigned int f25(unsigned int x, int y) {
  return (x >> ((-y) & (8 * sizeof(unsigned int) - 1))) ^ (x << y);
}


x86 assembly (clang, -O0):
<f25>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
movslq %ecx,%rcx
and    $0x1f,%rcx
shr    %cl,%eax
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f25>:
mov    %esi,%ecx
neg    %cl
mov    %edi,%eax
shr    %cl,%eax
mov    %esi,%ecx
shl    %cl,%edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f25(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 0, %6
%8 = sext i32 %7 to i64
%9 = and i64 %8, 31
%10 = trunc i64 %9 to i32
%11 = lshr i32 %5, %10
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = shl i32 %12, %13
%15 = xor i32 %11, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @f25(i32 %0, i32 %1) {
%3 = sub nsw i32 0, %1
%4 = and i32 %3, 31
%5 = lshr i32 %0, %4
%6 = shl i32 %0, %1
%7 = xor i32 %5, %6
ret i32 %7
}
int dividing_code_p(int code) {
  switch (code) {
  case '\n':
  case '\t':
  case ';':
  case '(':
  case ')':
  case ' ':
    return 1;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<dividing_code_p>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
add    $0xfffffff7,%eax
sub    $0x2,%eax
jb     1154 <dividing_code_p+0x54>
jmp    111e <dividing_code_p+0x1e>
mov    -0xc(%rbp),%eax
sub    $0x20,%eax
je     1154 <dividing_code_p+0x54>
jmp    112f <dividing_code_p+0x2f>
mov    -0xc(%rbp),%eax
add    $0xffffffd8,%eax
sub    $0x2,%eax
jb     1154 <dividing_code_p+0x54>
jmp    1143 <dividing_code_p+0x43>
mov    -0xc(%rbp),%eax
sub    $0x3b,%eax
jne    1160 <dividing_code_p+0x60>
jmp    1154 <dividing_code_p+0x54>
movl   $0x1,-0x4(%rbp)
jmp    1167 <dividing_code_p+0x67>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dividing_code_p>:
cmp    $0x3b,%edi
ja     111d <dividing_code_p+0x1d>
mov    $0x1,%eax
mov    %edi,%ecx
movabs $0x800030100000600,%rdx
bt     %rcx,%rdx
jae    111d <dividing_code_p+0x1d>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dividing_code_p(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 10, label %5
i32 9, label %5
i32 59, label %5
i32 40, label %5
i32 41, label %5
i32 32, label %5
]
5: ; preds = %1, %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @dividing_code_p(i32 %0) {
switch i32 %0, label %2 [
i32 10, label %3
i32 9, label %3
i32 59, label %3
i32 40, label %3
i32 41, label %3
i32 32, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %1, %2
%4 = phi i32 [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ switch_off_bits(unsigned char *, int);
int /*<<< orphan*/ switch_on_bits(unsigned char *, int);
void CTRL_REGSC_BITSET_R6g_T3g(unsigned char *data) {
  switch_on_bits(data, (0x01 | 0x10));
  switch_off_bits(data, (0x02));
}


x86 assembly (clang, -O0):
<CTRL_REGSC_BITSET_R6g_T3g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x11,%esi
call   1030 <switch_on_bits@plt>
mov    -0x8(%rbp),%rdi
mov    $0x2,%esi
call   1040 <switch_off_bits@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CTRL_REGSC_BITSET_R6g_T3g>:
push   %rbx
mov    %rdi,%rbx
mov    $0x11,%esi
call   1030 <switch_on_bits@plt>
mov    %rbx,%rdi
mov    $0x2,%esi
pop    %rbx
jmp    1040 <switch_off_bits@plt>

LLVM IR (-O0):
define void @CTRL_REGSC_BITSET_R6g_T3g(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @switch_on_bits(i8* %3, i32 17)
%5 = load i8*, i8** %2
%6 = call i32 @switch_off_bits(i8* %5, i32 2)
ret void
}

LLVM IR (-O2):
define void @CTRL_REGSC_BITSET_R6g_T3g(i8* %0) {
%2 = tail call i32 @switch_on_bits(i8* %0, i32 17)
%3 = tail call i32 @switch_off_bits(i8* %0, i32 2)
ret void
}
int iptables_add_mark_rule(int table, char *protocol, struct in6_addr *ip_orig,
                           struct in6_addr *ip_dest, int dest_port,
                           int orig_port, int mark) {
  dbgprint(__FUNCTION__, "IPTA");
  return 1;
}


x86 assembly (clang, -O0):
<iptables_add_mark_rule>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0x10(%rbp),%eax
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    %r9d,-0x28(%rbp)
lea    0xec7(%rip),%rdi
lea    0xed7(%rip),%rsi
mov    $0x0,%al
call   1030 <dbgprint@plt>
mov    $0x1,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iptables_add_mark_rule>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xef8(%rip),%rsi
xor    %eax,%eax
call   1030 <dbgprint@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.in6_addr = type opaque
@__FUNCTION__.iptables_add_mark_rule = [23 x i8] c"iptables_add_mark_rule\00"
@.str = [5 x i8] c"IPTA\00"
define i32 @iptables_add_mark_rule(i32 %0, i8* %1, %struct.in6_addr* %2, %struct.in6_addr* %3, i32 %4, i32 %5, i32 %6) {
%8 = alloca i32
%9 = alloca i8*
%10 = alloca %struct.in6_addr*
%11 = alloca %struct.in6_addr*
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
store i32 %0, i32* %8
store i8* %1, i8** %9
store %struct.in6_addr* %2, %struct.in6_addr** %10
store %struct.in6_addr* %3, %struct.in6_addr** %11
store i32 %4, i32* %12
store i32 %5, i32* %13
store i32 %6, i32* %14
%15 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @dbgprint to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @__FUNCTION__.iptables_add_mark_rule, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
%struct.in6_addr = type opaque
@__FUNCTION__.iptables_add_mark_rule = [23 x i8] c"iptables_add_mark_rule\00"
@.str = [5 x i8] c"IPTA\00"
define i32 @iptables_add_mark_rule(i32 %0, i8* nocapture readnone %1, %struct.in6_addr* nocapture readnone %2, %struct.in6_addr* nocapture readnone %3, i32 %4, i32 %5, i32 %6) {
%8 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @dbgprint to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @__FUNCTION__.iptables_add_mark_rule, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 1
}