xunge/DecIR huggingface dataset:
/* Variables and functions */
double M_PI;
double sin(double);
double du_dy(double L, double a_uy, double u_y, double y) {
  return -M_PI * a_uy * u_y * sin(M_PI * a_uy * y / L) / L;
}


x86 assembly (clang, -O0):
<du_dy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
mov    0x2eb5(%rip),%rax
movsd  (%rax),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
mov    0x2e84(%rip),%rax
movsd  (%rax),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x20(%rbp),%xmm0
divsd  -0x8(%rbp),%xmm0
call   1030 <sin@plt>
movaps %xmm0,%xmm1
movsd  -0x28(%rbp),%xmm0
mulsd  %xmm1,%xmm0
divsd  -0x8(%rbp),%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<du_dy>:
sub    $0x28,%rsp
movapd %xmm0,%xmm4
movsd  %xmm0,0x8(%rsp)
mov    0x2ec3(%rip),%rax
movsd  (%rax),%xmm0
movapd 0xecf(%rip),%xmm5
xorpd  %xmm0,%xmm5
mulsd  %xmm1,%xmm5
mulsd  %xmm2,%xmm5
movapd %xmm5,0x10(%rsp)
mulsd  %xmm1,%xmm0
mulsd  %xmm3,%xmm0
divsd  %xmm4,%xmm0
call   1030 <sin@plt>
mulsd  0x10(%rsp),%xmm0
divsd  0x8(%rsp),%xmm0
add    $0x28,%rsp
ret

LLVM IR (-O0):
@M_PI = global double 0.000000e+00
define double @du_dy(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%9 = load double, double* @M_PI
%10 = fneg double %9
%11 = load double, double* %6
%12 = fmul double %10, %11
%13 = load double, double* %7
%14 = fmul double %12, %13
%15 = load double, double* @M_PI
%16 = load double, double* %6
%17 = fmul double %15, %16
%18 = load double, double* %8
%19 = fmul double %17, %18
%20 = load double, double* %5
%21 = fdiv double %19, %20
%22 = call double @sin(double %21)
%23 = fmul double %14, %22
%24 = load double, double* %5
%25 = fdiv double %23, %24
ret double %25
}

LLVM IR (-O2):
@M_PI = global double 0.000000e+00
define double @du_dy(double %0, double %1, double %2, double %3) {
%5 = load double, double* @M_PI
%6 = fneg double %5
%7 = fmul double %6, %1
%8 = fmul double %7, %2
%9 = fmul double %5, %1
%10 = fmul double %9, %3
%11 = fdiv double %10, %0
%12 = tail call double @sin(double %11)
%13 = fmul double %12, %8
%14 = fdiv double %13, %0
ret double %14
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void mpga_set_layer(uint8_t *p_mpga, uint8_t i_layer) {
  p_mpga[1] &= ~0x06;
  p_mpga[1] |= (i_layer & 0x3) << 1;
}


x86 assembly (clang, -O0):
<mpga_set_layer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%ecx
and    $0xfffffff9,%ecx
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
and    $0x3,%ecx
shl    $0x1,%ecx
mov    -0x8(%rbp),%rax
or     0x4(%rax),%ecx
mov    %ecx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpga_set_layer>:
mov    0x4(%rdi),%eax
and    $0xfffffff9,%eax
and    $0x3,%esi
lea    (%rax,%rsi,2),%eax
mov    %eax,0x4(%rdi)
ret

LLVM IR (-O0):
define void @mpga_set_layer(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 1
%7 = load i32, i32* %6
%8 = and i32 %7, -7
store i32 %8, i32* %6
%9 = load i32, i32* %4
%10 = and i32 %9, 3
%11 = shl i32 %10, 1
%12 = load i32*, i32** %3
%13 = getelementptr inbounds i32, i32* %12, i64 1
%14 = load i32, i32* %13
%15 = or i32 %14, %11
store i32 %15, i32* %13
ret void
}

LLVM IR (-O2):
define void @mpga_set_layer(i32* nocapture %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = load i32, i32* %3
%5 = and i32 %4, -7
%6 = shl i32 %1, 1
%7 = and i32 %6, 6
%8 = or i32 %5, %7
store i32 %8, i32* %3
ret void
}
int findFiboN(long n) {
  int i;
  if (n <= 1)
    return n;
  i = findFiboN(n - 1) + findFiboN(n - 2);
  return i;
}


x86 assembly (clang, -O0):
<findFiboN>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x1,-0x10(%rbp)
jg     1133 <findFiboN+0x23>
mov    -0x10(%rbp),%rax
mov    %eax,-0x4(%rbp)
jmp    1160 <findFiboN+0x50>
mov    -0x10(%rbp),%rdi
sub    $0x1,%rdi
call   1030 <findFiboN@plt>
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
sub    $0x2,%rdi
call   1030 <findFiboN@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<findFiboN>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %ebp,%ebp
cmp    $0x2,%rdi
jge    1123 <findFiboN+0x13>
mov    %rbx,%rax
jmp    114a <findFiboN+0x3a>
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nop
lea    -0x1(%rbx),%rdi
call   1030 <findFiboN@plt>
mov    %eax,%ecx
lea    -0x2(%rbx),%rax
add    %ecx,%ebp
cmp    $0x4,%rbx
mov    %rax,%rbx
jae    1130 <findFiboN+0x20>
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @findFiboN(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
%5 = load i64, i64* %3
%6 = icmp sle i64 %5, 1
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i64, i64* %3
%9 = trunc i64 %8 to i32
store i32 %9, i32* %2
br label %19
10: ; preds = %1
%11 = load i64, i64* %3
%12 = sub nsw i64 %11, 1
%13 = call i32 @findFiboN(i64 %12)
%14 = load i64, i64* %3
%15 = sub nsw i64 %14, 2
%16 = call i32 @findFiboN(i64 %15)
%17 = add nsw i32 %13, %16
store i32 %17, i32* %4
%18 = load i32, i32* %4
store i32 %18, i32* %2
br label %19
19: ; preds = %10, %7
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @findFiboN(i64 %0) {
%2 = icmp slt i64 %0, 2
br i1 %2, label %3, label %8
3: ; preds = %8, %1
%4 = phi i32 [ 0, %1 ], [ %14, %8 ]
%5 = phi i64 [ %0, %1 ], [ %13, %8 ]
%6 = trunc i64 %5 to i32
%7 = add nsw i32 %4, %6
ret i32 %7
8: ; preds = %1, %8
%9 = phi i64 [ %13, %8 ], [ %0, %1 ]
%10 = phi i32 [ %14, %8 ], [ 0, %1 ]
%11 = add nsw i64 %9, -1
%12 = tail call i32 @findFiboN(i64 %11)
%13 = add nsw i64 %9, -2
%14 = add nsw i32 %12, %10
%15 = icmp ult i64 %9, 4
br i1 %15, label %3, label %8
}
int check_hsv(double h, double s, double v) {
  return (
      ((h < 0.0 || h > 360.0) || (s < 0.0 || s > 1.0) || (h < 0.0 || v > 1.0)));
}


x86 assembly (clang, -O0):
<check_hsv>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
mov    $0x1,%al
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
mov    %al,-0x19(%rbp)
ja     11a1 <check_hsv+0xa1>
movsd  -0x8(%rbp),%xmm0
mov    $0x1,%al
movsd  0xecb(%rip),%xmm1
ucomisd %xmm1,%xmm0
mov    %al,-0x19(%rbp)
ja     11a1 <check_hsv+0xa1>
mov    $0x1,%al
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
mov    %al,-0x19(%rbp)
ja     11a1 <check_hsv+0xa1>
movsd  -0x10(%rbp),%xmm0
mov    $0x1,%al
movsd  0xea4(%rip),%xmm1
ucomisd %xmm1,%xmm0
mov    %al,-0x19(%rbp)
ja     11a1 <check_hsv+0xa1>
mov    $0x1,%al
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
mov    %al,-0x1a(%rbp)
ja     119b <check_hsv+0x9b>
movsd  -0x18(%rbp),%xmm0
movsd  0xe77(%rip),%xmm1
ucomisd %xmm1,%xmm0
seta   %al
mov    %al,-0x1a(%rbp)
mov    -0x1a(%rbp),%al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_hsv>:
xorpd  %xmm3,%xmm3
ucomisd %xmm0,%xmm3
seta   %al
ucomisd 0xeed(%rip),%xmm0
seta   %cl
ucomisd %xmm1,%xmm3
seta   %dl
or     %al,%dl
or     %cl,%dl
movsd  0xedf(%rip),%xmm0
ucomisd %xmm0,%xmm1
seta   %al
ucomisd %xmm0,%xmm2
seta   %cl
or     %al,%cl
or     %dl,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @check_hsv(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = fcmp olt double %7, 0.000000e+00
br i1 %8, label %26, label %9
9: ; preds = %3
%10 = load double, double* %4
%11 = fcmp ogt double %10, 3.600000e+02
br i1 %11, label %26, label %12
12: ; preds = %9
%13 = load double, double* %5
%14 = fcmp olt double %13, 0.000000e+00
br i1 %14, label %26, label %15
15: ; preds = %12
%16 = load double, double* %5
%17 = fcmp ogt double %16, 1.000000e+00
br i1 %17, label %26, label %18
18: ; preds = %15
%19 = load double, double* %4
%20 = fcmp olt double %19, 0.000000e+00
br i1 %20, label %24, label %21
21: ; preds = %18
%22 = load double, double* %6
%23 = fcmp ogt double %22, 1.000000e+00
br label %24
24: ; preds = %21, %18
%25 = phi i1 [ true, %18 ], [ %23, %21 ]
br label %26
26: ; preds = %24, %15, %12, %9, %3
%27 = phi i1 [ true, %15 ], [ true, %12 ], [ true, %9 ], [ true, %3 ], [ %25, %24 ]
%28 = zext i1 %27 to i32
ret i32 %28
}

LLVM IR (-O2):
define i32 @check_hsv(double %0, double %1, double %2) {
%4 = fcmp olt double %0, 0.000000e+00
%5 = fcmp ogt double %0, 3.600000e+02
%6 = or i1 %4, %5
%7 = fcmp olt double %1, 0.000000e+00
%8 = or i1 %6, %7
%9 = fcmp ogt double %1, 1.000000e+00
%10 = or i1 %9, %8
%11 = fcmp ogt double %2, 1.000000e+00
%12 = or i1 %11, %10
%13 = zext i1 %12 to i32
ret i32 %13
}
unsigned xrop3_207_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = ~T;
  stk1 = S | stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_207_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_207_1_1>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%eax
shl    $0x8,%eax
or     %esi,%eax
or     %ecx,%eax
not    %eax
or     %edi,%esi
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_207_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %7
%23 = xor i32 %22, -1
store i32 %23, i32* %9
%24 = load i32, i32* %6
%25 = load i32, i32* %9
%26 = or i32 %24, %25
store i32 %26, i32* %8
%27 = load i32, i32* %8
%28 = load i32, i32* %6
%29 = xor i32 %28, -1
%30 = and i32 %27, %29
%31 = load i32, i32* %7
%32 = xor i32 %31, -1
%33 = and i32 %30, %32
%34 = load i32, i32* %5
%35 = load i32, i32* %6
%36 = and i32 %34, %35
%37 = or i32 %33, %36
%38 = load i32, i32* %5
%39 = load i32, i32* %7
%40 = and i32 %38, %39
%41 = or i32 %37, %40
ret i32 %41
}

LLVM IR (-O2):
define i32 @xrop3_207_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = or i32 %6, %4
%8 = xor i32 %7, -1
%9 = or i8 %1, %0
%10 = zext i8 %9 to i32
%11 = or i32 %10, %8
ret i32 %11
}
void rwx(short unsigned int bits, char *chars) {
  chars[0] = (bits & 00400) ? 'r' : '-';
  chars[1] = (bits & 00200) ? 'w' : '-';
  chars[2] = (bits & 00100) ? 'x' : '-';
}


x86 assembly (clang, -O0):
<rwx>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x100,%edx
mov    $0x2d,%eax
mov    $0x72,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
movzwl -0x2(%rbp),%edx
and    $0x80,%edx
mov    $0x2d,%eax
mov    $0x77,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x1(%rax)
movzwl -0x2(%rbp),%edx
and    $0x40,%edx
mov    $0x2d,%eax
mov    $0x78,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x2(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rwx>:
test   $0x100,%edi
mov    $0x2d,%eax
mov    $0x72,%ecx
cmove  %eax,%ecx
mov    %cl,(%rsi)
test   $0x80,%dil
mov    $0x77,%ecx
cmove  %eax,%ecx
mov    %cl,0x1(%rsi)
test   $0x40,%dil
mov    $0x78,%ecx
cmove  %eax,%ecx
mov    %cl,0x2(%rsi)
ret

LLVM IR (-O0):
define void @rwx(i16 zeroext %0, i8* %1) {
%3 = alloca i16
%4 = alloca i8*
store i16 %0, i16* %3
store i8* %1, i8** %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = and i32 %6, 256
%8 = icmp ne i32 %7, 0
%9 = zext i1 %8 to i64
%10 = select i1 %8, i32 114, i32 45
%11 = trunc i32 %10 to i8
%12 = load i8*, i8** %4
%13 = getelementptr inbounds i8, i8* %12, i64 0
store i8 %11, i8* %13
%14 = load i16, i16* %3
%15 = zext i16 %14 to i32
%16 = and i32 %15, 128
%17 = icmp ne i32 %16, 0
%18 = zext i1 %17 to i64
%19 = select i1 %17, i32 119, i32 45
%20 = trunc i32 %19 to i8
%21 = load i8*, i8** %4
%22 = getelementptr inbounds i8, i8* %21, i64 1
store i8 %20, i8* %22
%23 = load i16, i16* %3
%24 = zext i16 %23 to i32
%25 = and i32 %24, 64
%26 = icmp ne i32 %25, 0
%27 = zext i1 %26 to i64
%28 = select i1 %26, i32 120, i32 45
%29 = trunc i32 %28 to i8
%30 = load i8*, i8** %4
%31 = getelementptr inbounds i8, i8* %30, i64 2
store i8 %29, i8* %31
ret void
}

LLVM IR (-O2):
define void @rwx(i16 zeroext %0, i8* nocapture writeonly %1) {
%3 = zext i16 %0 to i32
%4 = and i32 %3, 256
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i8 45, i8 114
store i8 %6, i8* %1
%7 = and i32 %3, 128
%8 = icmp eq i32 %7, 0
%9 = select i1 %8, i8 45, i8 119
%10 = getelementptr inbounds i8, i8* %1, i64 1
store i8 %9, i8* %10
%11 = and i32 %3, 64
%12 = icmp eq i32 %11, 0
%13 = select i1 %12, i8 45, i8 120
%14 = getelementptr inbounds i8, i8* %1, i64 2
store i8 %13, i8* %14
ret void
}
/* Variables and functions */
int tapdisk_disktype_parse_params(char const *, char const **);
int tapdisk_parse_disk_type(const char *params, const char **_path,
                            int *_type) {
  int type;
  type = tapdisk_disktype_parse_params(params, _path);
  if (type < 0)
    return type;
  *_type = type;
  return 0;
}


x86 assembly (clang, -O0):
<tapdisk_parse_disk_type>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <tapdisk_disktype_parse_params@plt>
mov    %eax,-0x24(%rbp)
cmpl   $0x0,-0x24(%rbp)
jge    1149 <tapdisk_parse_disk_type+0x39>
mov    -0x24(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1159 <tapdisk_parse_disk_type+0x49>
mov    -0x24(%rbp),%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tapdisk_parse_disk_type>:
push   %rbx
mov    %rdx,%rbx
call   1030 <tapdisk_disktype_parse_params@plt>
test   %eax,%eax
js     1121 <tapdisk_parse_disk_type+0x11>
mov    %eax,(%rbx)
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @tapdisk_parse_disk_type(i8* %0, i8** %1, i32* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8**
%7 = alloca i32*
%8 = alloca i32
store i8* %0, i8** %5
store i8** %1, i8*** %6
store i32* %2, i32** %7
%9 = load i8*, i8** %5
%10 = load i8**, i8*** %6
%11 = call i32 @tapdisk_disktype_parse_params(i8* %9, i8** %10)
store i32 %11, i32* %8
%12 = load i32, i32* %8
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %3
%15 = load i32, i32* %8
store i32 %15, i32* %4
br label %19
16: ; preds = %3
%17 = load i32, i32* %8
%18 = load i32*, i32** %7
store i32 %17, i32* %18
store i32 0, i32* %4
br label %19
19: ; preds = %16, %14
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @tapdisk_parse_disk_type(i8* %0, i8** %1, i32* nocapture writeonly %2) {
%4 = tail call i32 @tapdisk_disktype_parse_params(i8* %0, i8** %1)
%5 = icmp slt i32 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %3
store i32 %4, i32* %2
br label %7
7: ; preds = %3, %6
%8 = phi i32 [ 0, %6 ], [ %4, %3 ]
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ n;

/* Variables and functions */
int /*<<< orphan*/ htobe32(int /*<<< orphan*/);
int /*<<< orphan*/ memcpy(char *, int /*<<< orphan*/ *, int);
void hton32(uint32_t i, char *p) {
  uint32_t n = htobe32(i);
  memcpy(p, &n, sizeof(n));
}


x86 assembly (clang, -O0):
<hton32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <htobe32@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x14(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hton32>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
call   1040 <htobe32@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @hton32(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i32, i32* %3
%7 = call i32 @htobe32(i32 %6)
store i32 %7, i32* %5
%8 = load i8*, i8** %4
%9 = call i32 @memcpy(i8* %8, i32* %5, i32 4)
ret void
}

LLVM IR (-O2):
define void @hton32(i32 %0, i8* %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = tail call i32 @htobe32(i32 %0)
store i32 %5, i32* %3
%6 = call i32 @memcpy(i8* %1, i32* %3, i32 4)
ret void
}
/* Variables and functions */
scalar_t__ isupper(char);
char *downcase(char *str) {
  char *buf = str;
  while (*buf) {
    if (isupper(*buf))
      *buf += 'a' - 'A';
    buf++;
  }
  return str;
}


x86 assembly (clang, -O0):
<downcase>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1164 <downcase+0x54>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
je     1153 <downcase+0x43>
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
add    $0x20,%ecx
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1124 <downcase+0x14>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<downcase>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%al
test   %al,%al
je     114e <downcase+0x3e>
mov    %r14,%rbx
jmp    113c <downcase+0x2c>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl 0x1(%rbx),%eax
add    $0x1,%rbx
test   %al,%al
je     114e <downcase+0x3e>
movsbl %al,%edi
call   1030 <isupper@plt>
test   %rax,%rax
je     1130 <downcase+0x20>
addb   $0x20,(%rbx)
jmp    1130 <downcase+0x20>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @downcase(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %20, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %23
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = call i64 @isupper(i8 signext %11)
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %20
14: ; preds = %9
%15 = load i8*, i8** %3
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = add nsw i32 %17, 32
%19 = trunc i32 %18 to i8
store i8 %19, i8* %15
br label %20
20: ; preds = %14, %9
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %3
br label %5
23: ; preds = %5
%24 = load i8*, i8** %2
ret i8* %24
}

LLVM IR (-O2):
define i8* @downcase(i8* returned %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %12
%5 = phi i8 [ %14, %12 ], [ %2, %1 ]
%6 = phi i8* [ %13, %12 ], [ %0, %1 ]
%7 = tail call i64 @isupper(i8 signext %5)
%8 = icmp eq i64 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %4
%10 = load i8, i8* %6
%11 = add i8 %10, 32
store i8 %11, i8* %6
br label %12
12: ; preds = %9, %4
%13 = getelementptr inbounds i8, i8* %6, i64 1
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %4
16: ; preds = %12, %1
ret i8* %0
}
int r(int i) { return 2i + 1; }


x86 assembly (clang, -O0):
<r>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<r>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @r(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @r(i32 %0) {
ret i32 1
}
void gtk_statusbar_remove() {}


x86 assembly (clang, -O0):
<gtk_statusbar_remove>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_statusbar_remove>:
ret

LLVM IR (-O0):
define void @gtk_statusbar_remove() {
ret void
}

LLVM IR (-O2):
define void @gtk_statusbar_remove() {
ret void
}
int test_imm_9Cint16_reg(short val) {
  return ((val) & (0x9C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Cint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x9c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Cint16_reg>:
test   $0x9c,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Cint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 156
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_9Cint16_reg(i16 signext %0) {
%2 = and i16 %0, 156
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int __u32;

/* Variables and functions */
__u32 vx6852_sub_sampling_factor(__u32 ei, __u32 oi) { return ((ei + oi) / 2); }


x86 assembly (clang, -O0):
<vx6852_sub_sampling_factor>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<vx6852_sub_sampling_factor>:
lea    (%rdi,%rsi,1),%ecx
mov    %ecx,%eax
shr    $0x1f,%eax
add    %ecx,%eax
sar    %eax
ret

LLVM IR (-O0):
define i32 @vx6852_sub_sampling_factor(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
%8 = sdiv i32 %7, 2
ret i32 %8
}

LLVM IR (-O2):
define i32 @vx6852_sub_sampling_factor(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
%4 = sdiv i32 %3, 2
ret i32 %4
}
void rop3_30_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = *D | S;
  stk1 = T ^ stk2;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_30_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_30_1_0>:
mov    (%rdi),%al
mov    %eax,%ecx
or     %sil,%cl
xor    %dl,%cl
xor    %cl,%al
and    %sil,%al
xor    %cl,%al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_30_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %8
%16 = load i8, i8* %6
%17 = zext i8 %16 to i32
%18 = load i8, i8* %8
%19 = zext i8 %18 to i32
%20 = xor i32 %17, %19
%21 = trunc i32 %20 to i8
store i8 %21, i8* %7
%22 = load i8, i8* %7
%23 = zext i8 %22 to i32
%24 = load i8, i8* %5
%25 = zext i8 %24 to i32
%26 = xor i32 %25, -1
%27 = and i32 %23, %26
%28 = load i8*, i8** %4
%29 = load i8, i8* %28
%30 = zext i8 %29 to i32
%31 = load i8, i8* %5
%32 = zext i8 %31 to i32
%33 = and i32 %30, %32
%34 = or i32 %27, %33
%35 = trunc i32 %34 to i8
%36 = load i8*, i8** %4
store i8 %35, i8* %36
ret void
}

LLVM IR (-O2):
define void @rop3_30_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %4, %1
%6 = xor i8 %5, %2
%7 = xor i8 %1, -1
%8 = and i8 %6, %7
%9 = and i8 %4, %1
%10 = or i8 %8, %9
store i8 %10, i8* %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ fflush(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/ *);
int /*<<< orphan*/ sleep(int);
int main(int argc, char **argv) {
  FILE *fp;
  fp = fopen("./store.sh", "w+");
  while (1) {
    fputs("test test\n", fp);
    fflush(fp);
    sleep(2);
  }
  fclose(fp);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xea3(%rip),%rdi
lea    0xea7(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
lea    0xe96(%rip),%rdi
call   1030 <fputs@plt>
mov    -0x18(%rbp),%rdi
call   1040 <fflush@plt>
mov    $0x2,%edi
call   1060 <sleep@plt>
jmp    116d <main+0x2d>

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0xeb5(%rip),%rdi
lea    0xeb9(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,%rbx
lea    0xead(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0xa,%esi
mov    $0x1,%edx
mov    %r14,%rdi
mov    %rbx,%rcx
call   1050 <fwrite@plt>
mov    %rbx,%rdi
call   1030 <fflush@plt>
mov    $0x2,%edi
call   1060 <sleep@plt>
jmp    1170 <main+0x30>

LLVM IR (-O0):
@.str = [11 x i8] c"./store.sh\00"
@.str.1 = [3 x i8] c"w+\00"
@.str.2 = [11 x i8] c"test test\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32* @fopen(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
store i32* %7, i32** %6
br label %8
8: ; preds = %2, %8
%9 = load i32*, i32** %6
%10 = call i32 @fputs(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0), i32* %9)
%11 = load i32*, i32** %6
%12 = call i32 @fflush(i32* %11)
%13 = call i32 @sleep(i32 2)
br label %8
}

LLVM IR (-O2):
@.str = [11 x i8] c"./store.sh\00"
@.str.1 = [3 x i8] c"w+\00"
@.str.2 = [11 x i8] c"test test\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32* @fopen(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
br label %4
4: ; preds = %4, %2
%5 = tail call i64 @fwrite(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0), i64 10, i64 1, i32* %3)
%6 = tail call i32 @fflush(i32* %3)
%7 = tail call i32 @sleep(i32 2)
br label %4
}
int cloneInt(void *dst, const void *src) {
  *((int *)dst) = *((int *)src);
  return 0;
}


x86 assembly (clang, -O0):
<cloneInt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cloneInt>:
mov    (%rsi),%eax
mov    %eax,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @cloneInt(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %3
%9 = bitcast i8* %8 to i32*
store i32 %7, i32* %9
ret i32 0
}

LLVM IR (-O2):
define i32 @cloneInt(i8* nocapture writeonly %0, i8* nocapture %1) {
%3 = bitcast i8* %1 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %0 to i32*
store i32 %4, i32* %5
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void free_i32vector(int *v, long nl, long nh) { free((char *)(v + nl - 0)); }


x86 assembly (clang, -O0):
<free_i32vector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_i32vector>:
lea    (%rdi,%rsi,4),%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_i32vector(i32* %0, i64 %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i64
%6 = alloca i64
store i32* %0, i32** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i32*, i32** %4
%8 = load i64, i64* %5
%9 = getelementptr inbounds i32, i32* %7, i64 %8
%10 = getelementptr inbounds i32, i32* %9, i64 0
%11 = bitcast i32* %10 to i8*
%12 = call i32 @free(i8* %11)
ret void
}

LLVM IR (-O2):
define void @free_i32vector(i32* nocapture %0, i64 %1, i64 %2) {
%4 = getelementptr inbounds i32, i32* %0, i64 %1
%5 = bitcast i32* %4 to i8*
%6 = tail call i32 @free(i8* %5)
ret void
}
__attribute__((always_)) char *alloc_secdata(void) { return (char *)1; }


x86 assembly (clang, -O0):
<alloc_secdata>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_secdata>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i8* @alloc_secdata() {
ret i8* inttoptr (i64 1 to i8*)
}

LLVM IR (-O2):
define i8* @alloc_secdata() {
ret i8* inttoptr (i64 1 to i8*)
}
/* Variables and functions */
char lib_toupper(char);
void lib_strupr(char *str) {
  while (*str) {
    *str = lib_toupper(*str);
    str++;
  }
}


x86 assembly (clang, -O0):
<lib_strupr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     114e <lib_strupr+0x3e>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <lib_toupper@plt>
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <lib_strupr+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lib_strupr>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1136 <lib_strupr+0x26>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <lib_toupper@plt>
mov    %al,-0x1(%rbx)
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <lib_strupr+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @lib_strupr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = call signext i8 @lib_toupper(i8 signext %9)
%11 = load i8*, i8** %2
store i8 %10, i8* %11
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %2
br label %3
14: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @lib_strupr(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = tail call signext i8 @lib_toupper(i8 signext %5)
store i8 %7, i8* %6
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
long long bit00() { return 0x0000000000000001LL; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i64 @bit00() {
ret i64 1
}

LLVM IR (-O2):
define i64 @bit00() {
ret i64 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Hola mundo");
  printf("\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <printf@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"Hola mundo\00"
@.str.1 = [2 x i8] c"\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"Hola mundo\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @putchar(i32 10)
ret i32 0
}
void yy_2_TableRowContentStar(char *yytext, int yyleng) {
  ;
  ;
}


x86 assembly (clang, -O0):
<yy_2_TableRowContentStar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<yy_2_TableRowContentStar>:
ret

LLVM IR (-O0):
define void @yy_2_TableRowContentStar(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @yy_2_TableRowContentStar(i8* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
float log2f(float);
float logf(float x) {
  return log2f(x) * 0.693147180559945309417232121458176568F;
}


x86 assembly (clang, -O0):
<logf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <log2f@plt>
movss  0xed1(%rip),%xmm1
mulss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<logf>:
push   %rax
call   1030 <log2f@plt>
mulss  0xee2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @logf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @log2f(float %3)
%5 = fmul float %4, 0x3FE62E4300000000
ret float %5
}

LLVM IR (-O2):
define float @logf(float %0) {
%2 = tail call float @log2f(float %0)
%3 = fmul float %2, 0x3FE62E4300000000
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ GPSTimeHandle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void GPSTimeUpdated() { UAVObjUpdated(GPSTimeHandle()); }


x86 assembly (clang, -O0):
<GPSTimeUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GPSTimeHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPSTimeUpdated>:
push   %rax
xor    %eax,%eax
call   1030 <GPSTimeHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @GPSTimeUpdated() {
%1 = call i32 (...) @GPSTimeHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @GPSTimeUpdated() {
%1 = tail call i32 (...) @GPSTimeHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
int pmi_simple_client_publish_name(struct pmi_simple_client *pmi,
                                   const char *service_name, const char *port) {
  return -1;
}


x86 assembly (clang, -O0):
<pmi_simple_client_publish_name>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmi_simple_client_publish_name>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.pmi_simple_client = type opaque
define i32 @pmi_simple_client_publish_name(%struct.pmi_simple_client* %0, i8* %1, i8* %2) {
%4 = alloca %struct.pmi_simple_client*
%5 = alloca i8*
%6 = alloca i8*
store %struct.pmi_simple_client* %0, %struct.pmi_simple_client** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
ret i32 -1
}

LLVM IR (-O2):
%struct.pmi_simple_client = type opaque
define i32 @pmi_simple_client_publish_name(%struct.pmi_simple_client* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
ret i32 -1
}
void netcdf_UpdateTimeUnitsSpatial(int year, int month, int day, int hour,
                                   int min, int sec) {}


x86 assembly (clang, -O0):
<netcdf_UpdateTimeUnitsSpatial>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<netcdf_UpdateTimeUnitsSpatial>:
ret

LLVM IR (-O0):
define void @netcdf_UpdateTimeUnitsSpatial(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
ret void
}

LLVM IR (-O2):
define void @netcdf_UpdateTimeUnitsSpatial(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EVP_aes_128_cbc();
int do_test_bio_cipher(int /*<<< orphan*/, int);
int test_bio_enc_aes_128_cbc(int idx) {
  return do_test_bio_cipher(EVP_aes_128_cbc(), idx);
}


x86 assembly (clang, -O0):
<test_bio_enc_aes_128_cbc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <EVP_aes_128_cbc@plt>
mov    %eax,%edi
mov    -0x4(%rbp),%esi
call   1030 <do_test_bio_cipher@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_bio_enc_aes_128_cbc>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <EVP_aes_128_cbc@plt>
mov    %eax,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <do_test_bio_cipher@plt>

LLVM IR (-O0):
define i32 @test_bio_enc_aes_128_cbc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @EVP_aes_128_cbc()
%4 = load i32, i32* %2
%5 = call i32 @do_test_bio_cipher(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @test_bio_enc_aes_128_cbc(i32 %0) {
%2 = tail call i32 (...) @EVP_aes_128_cbc()
%3 = tail call i32 @do_test_bio_cipher(i32 %2, i32 %0)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ MC_put2_16(int, int /*<<< orphan*/ *,
                              int /*<<< orphan*/ const *, int, int, int);
void MC_put_y_16_3dnow(uint8_t *dest, const uint8_t *ref, int stride,
                       int height) {
  MC_put2_16(height, dest, ref, stride, stride, 1);
}


x86 assembly (clang, -O0):
<MC_put_y_16_3dnow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x18(%rbp),%edi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    $0x1,%r9d
call   1030 <MC_put2_16@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MC_put_y_16_3dnow>:
mov    %edx,%r8d
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    %ecx,%edi
mov    %r8d,%ecx
mov    $0x1,%r9d
jmp    1030 <MC_put2_16@plt>

LLVM IR (-O0):
define void @MC_put_y_16_3dnow(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %8
%10 = load i32*, i32** %5
%11 = load i32*, i32** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %7
%14 = call i32 @MC_put2_16(i32 %9, i32* %10, i32* %11, i32 %12, i32 %13, i32 1)
ret void
}

LLVM IR (-O2):
define void @MC_put_y_16_3dnow(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = tail call i32 @MC_put2_16(i32 %3, i32* %0, i32* %1, i32 %2, i32 %2, i32 1)
ret void
}
int dcmpgt(double a, double b) { return a > b; }


x86 assembly (clang, -O0):
<dcmpgt>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dcmpgt>:
xor    %eax,%eax
ucomisd %xmm1,%xmm0
seta   %al
ret

LLVM IR (-O0):
define i32 @dcmpgt(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp ogt double %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @dcmpgt(double %0, double %1) {
%3 = fcmp ogt double %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
size_t strlen(void *);
bool __s32_shorter(void *cc, void *k, void *v) {
  return strlen(k) <= *(size_t *)cc;
}


x86 assembly (clang, -O0):
<__s32_shorter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x8(%rbp),%rcx
cmp    (%rcx),%rax
setbe  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__s32_shorter>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <strlen@plt>
xor    %ecx,%ecx
cmp    (%rbx),%rax
setbe  %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @__s32_shorter(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %5
%8 = call i64 @strlen(i8* %7)
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i64*
%11 = load i64, i64* %10
%12 = icmp ule i64 %8, %11
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @__s32_shorter(i8* nocapture %0, i8* nocapture %1, i8* nocapture readnone %2) {
%4 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%5 = bitcast i8* %0 to i64*
%6 = load i64, i64* %5
%7 = icmp ule i64 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
scalar_t__ isupper(int);
int tolower(int c) {
  if (isupper(c)) {
    return (c | (0x20));
  }
  return c;
}


x86 assembly (clang, -O0):
<tolower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
je     113b <tolower+0x2b>
mov    -0x8(%rbp),%eax
or     $0x20,%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <tolower+0x31>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tolower>:
push   %rbx
mov    %edi,%ebx
call   1030 <isupper@plt>
mov    %ebx,%ecx
or     $0x20,%ecx
test   %rax,%rax
cmove  %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @tolower(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @isupper(i32 %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = or i32 %8, 32
store i32 %9, i32* %2
br label %12
10: ; preds = %1
%11 = load i32, i32* %3
store i32 %11, i32* %2
br label %12
12: ; preds = %10, %7
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @tolower(i32 %0) {
%2 = tail call i64 @isupper(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = or i32 %0, 32
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
int islegal(int c) {
  if (c >= ' ') {
    if (c <= '~') {
      return (1);
    }
  }
  if (c == ' ')
    return (1);
  if (c == '\t')
    return (1);
  if (c == '\n')
    return (1);
  if (c == 4)
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<islegal>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x20,-0x8(%rbp)
jl     112c <islegal+0x2c>
cmpl   $0x7e,-0x8(%rbp)
jg     1127 <islegal+0x27>
movl   $0x1,-0x4(%rbp)
jmp    118b <islegal+0x8b>
jmp    112c <islegal+0x2c>
cmpl   $0x20,-0x8(%rbp)
jne    1142 <islegal+0x42>
movl   $0x1,-0x4(%rbp)
jmp    118b <islegal+0x8b>
cmpl   $0x9,-0x8(%rbp)
jne    1158 <islegal+0x58>
movl   $0x1,-0x4(%rbp)
jmp    118b <islegal+0x8b>
cmpl   $0xa,-0x8(%rbp)
jne    116e <islegal+0x6e>
movl   $0x1,-0x4(%rbp)
jmp    118b <islegal+0x8b>
cmpl   $0x4,-0x8(%rbp)
jne    1184 <islegal+0x84>
movl   $0x1,-0x4(%rbp)
jmp    118b <islegal+0x8b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<islegal>:
lea    -0x20(%rdi),%ecx
mov    $0x1,%eax
cmp    $0x5f,%ecx
jb     1124 <islegal+0x24>
add    $0xfffffffc,%edi
xor    %eax,%eax
cmp    $0x6,%edi
ja     1124 <islegal+0x24>
movslq %edi,%rax
lea    0xedf(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @islegal(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 32
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 126
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %2
br label %28
10: ; preds = %6
br label %11
11: ; preds = %10, %1
%12 = load i32, i32* %3
%13 = icmp eq i32 %12, 32
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 1, i32* %2
br label %28
15: ; preds = %11
%16 = load i32, i32* %3
%17 = icmp eq i32 %16, 9
br i1 %17, label %18, label %19
18: ; preds = %15
store i32 1, i32* %2
br label %28
19: ; preds = %15
%20 = load i32, i32* %3
%21 = icmp eq i32 %20, 10
br i1 %21, label %22, label %23
22: ; preds = %19
store i32 1, i32* %2
br label %28
23: ; preds = %19
%24 = load i32, i32* %3
%25 = icmp eq i32 %24, 4
br i1 %25, label %26, label %27
26: ; preds = %23
store i32 1, i32* %2
br label %28
27: ; preds = %23
store i32 0, i32* %2
br label %28
28: ; preds = %27, %26, %22, %18, %14, %9
%29 = load i32, i32* %2
ret i32 %29
}

LLVM IR (-O2):
@switch.table.islegal = [7 x i32] [i32 1, i32 0, i32 0, i32 0, i32 0, i32 1, i32 1]
define i32 @islegal(i32 %0) {
%2 = add i32 %0, -32
%3 = icmp ult i32 %2, 95
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = add i32 %0, -4
%6 = icmp ult i32 %5, 7
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = sext i32 %5 to i64
%9 = getelementptr inbounds [7 x i32], [7 x i32]* @switch.table.islegal, i64 0, i64 %8
%10 = load i32, i32* %9
br label %11
11: ; preds = %4, %7, %1
%12 = phi i32 [ 1, %1 ], [ %10, %7 ], [ 0, %4 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int unaddr_test4(int *val_p) {
  int x = 1;
  printf("testing access after free\n");
  return (*val_p & x) ? 1 : 0;
}


x86 assembly (clang, -O0):
<unaddr_test4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    -0xc(%rbp),%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unaddr_test4>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
mov    (%rbx),%eax
and    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"testing access after free\0A\00"
define i32 @unaddr_test4(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 1, i32* %3
%4 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
%7 = load i32, i32* %3
%8 = and i32 %6, %7
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i64
%11 = select i1 %9, i32 1, i32 0
ret i32 %11
}

LLVM IR (-O2):
@str = [26 x i8] c"testing access after free\00"
define i32 @unaddr_test4(i32* nocapture %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str, i64 0, i64 0))
%3 = load i32, i32* %0
%4 = and i32 %3, 1
ret i32 %4
}
unsigned long int cast_long_ulong(long int x) { return (unsigned long int)x; }


x86 assembly (clang, -O0):
<cast_long_ulong>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cast_long_ulong>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @cast_long_ulong(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
ret i64 %3
}

LLVM IR (-O2):
define i64 @cast_long_ulong(i64 returned %0) {
ret i64 %0
}