xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t bin_to_uint32(const void *s) {
  uint32_t x = *((uint32_t *)s);
  return (x << 24) | ((x & 0xff00) << 8) | ((x >> 8) & 0xff00) | (x >> 24);
}


x86 assembly (clang, -O0):
<bin_to_uint32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x18,%eax
mov    -0xc(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff00,%ecx
or     %ecx,%eax
mov    -0xc(%rbp),%ecx
sar    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bin_to_uint32>:
mov    (%rdi),%eax
mov    %eax,%ecx
and    $0xffffff,%ecx
bswap  %ecx
sar    $0x18,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @bin_to_uint32(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
%6 = load i32, i32* %5
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = shl i32 %7, 24
%9 = load i32, i32* %3
%10 = and i32 %9, 65280
%11 = shl i32 %10, 8
%12 = or i32 %8, %11
%13 = load i32, i32* %3
%14 = ashr i32 %13, 8
%15 = and i32 %14, 65280
%16 = or i32 %12, %15
%17 = load i32, i32* %3
%18 = ashr i32 %17, 24
%19 = or i32 %16, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @bin_to_uint32(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = and i32 %3, 16777215
%5 = tail call i32 @llvm.bswap.i32(i32 %4)
%6 = ashr i32 %3, 24
%7 = or i32 %5, %6
ret i32 %7
}
unsigned xrop3_92_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = S ^ D;
  stk2 = T | stk3;
  stk1 = D ^ stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_92_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_92_1_1>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%eax
shl    $0x8,%eax
or     %esi,%eax
mov    %ecx,%edx
xor    $0xff,%edx
or     %eax,%edx
xor    $0xff,%edx
or     %ecx,%eax
not    %eax
and    %edx,%eax
or     %edi,%esi
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_92_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %6
%24 = load i32, i32* %5
%25 = xor i32 %23, %24
store i32 %25, i32* %10
%26 = load i32, i32* %7
%27 = load i32, i32* %10
%28 = or i32 %26, %27
store i32 %28, i32* %9
%29 = load i32, i32* %5
%30 = load i32, i32* %9
%31 = xor i32 %29, %30
store i32 %31, i32* %8
%32 = load i32, i32* %8
%33 = load i32, i32* %6
%34 = xor i32 %33, -1
%35 = and i32 %32, %34
%36 = load i32, i32* %7
%37 = xor i32 %36, -1
%38 = and i32 %35, %37
%39 = load i32, i32* %5
%40 = load i32, i32* %6
%41 = and i32 %39, %40
%42 = or i32 %38, %41
%43 = load i32, i32* %5
%44 = load i32, i32* %7
%45 = and i32 %43, %44
%46 = or i32 %42, %45
ret i32 %46
}

LLVM IR (-O2):
define i32 @xrop3_92_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %4, 255
%8 = or i32 %6, %7
%9 = xor i32 %8, 255
%10 = or i32 %6, %4
%11 = xor i32 %10, -1
%12 = and i32 %9, %11
%13 = or i8 %1, %0
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
ret i32 %15
}
void vbe_biosfn_set_get_logical_scan_line_length(AX) {}


x86 assembly (clang, -O0):
<vbe_biosfn_set_get_logical_scan_line_length>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vbe_biosfn_set_get_logical_scan_line_length>:
ret

LLVM IR (-O0):
define void @vbe_biosfn_set_get_logical_scan_line_length(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @vbe_biosfn_set_get_logical_scan_line_length(i32 %0) {
ret void
}
/* Variables and functions */
int partition(int *, int, int);
void quicksort(int *a, int l, int h) {
  int s;
  if (l < h) {
    s = partition(a, l, h);
    quicksort(a, l, s - 1);
    quicksort(a, s, h);
  }
}


x86 assembly (clang, -O0):
<quicksort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1171 <quicksort+0x51>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quicksort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1040 <quicksort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quicksort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1163 <quicksort+0x43>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quicksort@plt>
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quicksort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quicksort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %23
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partition(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = load i32, i32* %6
br label %23
23: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @quicksort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %10
5: ; preds = %3, %5
%6 = phi i32 [ %7, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quicksort(i32* %0, i32 %6, i32 %8)
%9 = icmp slt i32 %7, %2
br i1 %9, label %5, label %10
10: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ input_num();
int main() {
  input_num();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <input_num@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <input_num@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @input_num()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @input_num()
ret i32 0
}
int myFloor(double data) {
  if (data - (int)data == 0)
    return data;
  if (data > 0)
    return ((int)data);
  else
    return ((int)data) - 1;
}


x86 assembly (clang, -O0):
<myFloor>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
cvttsd2si -0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
subsd  %xmm1,%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    113b <myFloor+0x3b>
jp     113b <myFloor+0x3b>
cvttsd2si -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1165 <myFloor+0x65>
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    115a <myFloor+0x5a>
cvttsd2si -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1165 <myFloor+0x65>
cvttsd2si -0x10(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<myFloor>:
cvttsd2si %xmm0,%eax
cvttpd2dq %xmm0,%xmm1
cvtdq2pd %xmm1,%xmm1
movapd %xmm0,%xmm2
subsd  %xmm1,%xmm2
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm2
setp   %cl
setne  %dl
or     %cl,%dl
ucomisd %xmm1,%xmm0
setbe  %cl
and    %dl,%cl
movzbl %cl,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @myFloor(double %0) {
%2 = alloca i32
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = load double, double* %3
%6 = fptosi double %5 to i32
%7 = sitofp i32 %6 to double
%8 = fsub double %4, %7
%9 = fcmp oeq double %8, 0.000000e+00
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load double, double* %3
%12 = fptosi double %11 to i32
store i32 %12, i32* %2
br label %23
13: ; preds = %1
%14 = load double, double* %3
%15 = fcmp ogt double %14, 0.000000e+00
br i1 %15, label %16, label %19
16: ; preds = %13
%17 = load double, double* %3
%18 = fptosi double %17 to i32
store i32 %18, i32* %2
br label %23
19: ; preds = %13
%20 = load double, double* %3
%21 = fptosi double %20 to i32
%22 = sub nsw i32 %21, 1
store i32 %22, i32* %2
br label %23
23: ; preds = %19, %16, %10
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @myFloor(double %0) {
%2 = fptosi double %0 to i32
%3 = sitofp i32 %2 to double
%4 = fsub double %0, %3
%5 = fcmp une double %4, 0.000000e+00
%6 = fcmp ule double %0, 0.000000e+00
%7 = and i1 %6, %5
%8 = sext i1 %7 to i32
%9 = add nsw i32 %8, %2
ret i32 %9
}
void UYVYToUVRow_Any_SSE2() {}


x86 assembly (clang, -O0):
<UYVYToUVRow_Any_SSE2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UYVYToUVRow_Any_SSE2>:
ret

LLVM IR (-O0):
define void @UYVYToUVRow_Any_SSE2() {
ret void
}

LLVM IR (-O2):
define void @UYVYToUVRow_Any_SSE2() {
ret void
}
void ff_hevc_put_hevc_bi_epel_h64_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_epel_h64_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_epel_h64_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_epel_h64_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_epel_h64_8_sse4() {
ret void
}
/* Variables and functions */
int inw(int);
void spi_wait_idle(void) {
  while (inw(0xfff2) & (1 << 8))
    continue;
}


x86 assembly (clang, -O0):
<spi_wait_idle>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <spi_wait_idle+0x9>
mov    $0xfff2,%edi
call   1030 <inw@plt>
and    $0x100,%eax
cmp    $0x0,%eax
je     1136 <spi_wait_idle+0x26>
jmp    1119 <spi_wait_idle+0x9>
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_wait_idle>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0xfff2,%edi
call   1030 <inw@plt>
test   $0x100,%eax
jne    1120 <spi_wait_idle+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @spi_wait_idle() {
br label %1
1: ; preds = %5, %0
%2 = call i32 @inw(i32 65522)
%3 = and i32 %2, 256
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %1
6: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @spi_wait_idle() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @inw(i32 65522)
%3 = and i32 %2, 256
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %1
5: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *);
void usage(char *name) {
  printf("Usage: %s FILE1.cnf FILE2.lrat [optional: FILE3.drat]\n", name);
  exit(0);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [55 x i8] c"Usage: %s FILE1.cnf FILE2.lrat [optional: FILE3.drat]\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [55 x i8] c"Usage: %s FILE1.cnf FILE2.lrat [optional: FILE3.drat]\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
scalar_t__ strcmp(char const *, char *);
int isLEA(const char *comm) { return strcmp(comm, "lea") == 0; }


x86 assembly (clang, -O0):
<isLEA>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isLEA>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"lea\00"
define i32 @isLEA(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @strcmp(i8* %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
@.str = [4 x i8] c"lea\00"
define i32 @isLEA(i8* %0) {
%2 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
uint32_t swap32(uint32_t v) {
  uint8_t ret[4];
  ret[0] = v >> 24;
  ret[1] = v >> 16;
  ret[2] = v >> 8;
  ret[3] = v;
  return (*((uint32_t *)ret));
}


x86 assembly (clang, -O0):
<swap32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x18,%eax
mov    %eax,-0x20(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
mov    %eax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x20(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap32>:
mov    %edi,%eax
sar    $0x18,%eax
ret

LLVM IR (-O0):
define i32 @swap32(i32 %0) {
%2 = alloca i32
%3 = alloca [4 x i32]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = ashr i32 %4, 24
%6 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 0
store i32 %5, i32* %6
%7 = load i32, i32* %2
%8 = ashr i32 %7, 16
%9 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 1
store i32 %8, i32* %9
%10 = load i32, i32* %2
%11 = ashr i32 %10, 8
%12 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 2
store i32 %11, i32* %12
%13 = load i32, i32* %2
%14 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 3
store i32 %13, i32* %14
%15 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 0
%16 = load i32, i32* %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @swap32(i32 %0) {
%2 = ashr i32 %0, 24
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double, double);
void cube(double n) { printf("The cube value of %lf is %lf.\n", n, n * n * n); }


x86 assembly (clang, -O0):
<cube>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
mulsd  -0x8(%rbp),%xmm1
mulsd  -0x8(%rbp),%xmm1
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cube>:
movapd %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
lea    0xedd(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"The cube value of %lf is %lf.\0A\00"
define void @cube(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = load double, double* %2
%6 = fmul double %4, %5
%7 = load double, double* %2
%8 = fmul double %6, %7
%9 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), double %3, double %8)
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"The cube value of %lf is %lf.\0A\00"
define void @cube(double %0) {
%2 = fmul double %0, %0
%3 = fmul double %2, %0
%4 = tail call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), double %0, double %3)
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ strcpy(char *const, char const *);
int strlen(char const *);
char *u_str_dup(const char *s) {
  char *const d = ((char *)malloc((strlen(s) + 1) * sizeof(char)));
  strcpy(d, s);
  return d;
}


x86 assembly (clang, -O0):
<u_str_dup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
add    $0x1,%eax
cltq
shl    $0x0,%rax
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<u_str_dup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @u_str_dup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = add nsw i32 %5, 1
%7 = sext i32 %6 to i64
%8 = mul i64 %7, 1
%9 = trunc i64 %8 to i32
%10 = call i64 @malloc(i32 %9)
%11 = inttoptr i64 %10 to i8*
store i8* %11, i8** %3
%12 = load i8*, i8** %3
%13 = load i8*, i8** %2
%14 = call i32 @strcpy(i8* %12, i8* %13)
%15 = load i8*, i8** %3
ret i8* %15
}

LLVM IR (-O2):
define i8* @u_str_dup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = tail call i64 @malloc(i32 %3)
%5 = inttoptr i64 %4 to i8*
%6 = tail call i32 @strcpy(i8* %5, i8* %0)
ret i8* %5
}
int HelpItem116(void) { return 0; }


x86 assembly (clang, -O0):
<HelpItem116>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelpItem116>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HelpItem116() {
ret i32 0
}

LLVM IR (-O2):
define i32 @HelpItem116() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ execl(char *, char *, char *, int /*<<< orphan*/);
int /*<<< orphan*/ puts(char *);
int main(int argc, char **argv) {
  if (argc == 1) {
    execl(argv[0], argv[0], "Hello world", 0);
    return 1;
  } else {
    puts(argv[1]);
    return 0;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1168 <main+0x48>
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xeab(%rip),%rdx
xor    %ecx,%ecx
call   1040 <execl@plt>
movl   $0x1,-0x4(%rbp)
jmp    117c <main+0x5c>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <puts@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x1,%edi
jne    1141 <main+0x21>
mov    (%rsi),%rdi
lea    0xed0(%rip),%rdx
mov    %rdi,%rsi
xor    %ecx,%ecx
call   1040 <execl@plt>
mov    $0x1,%eax
pop    %rcx
ret
mov    0x8(%rsi),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"Hello world\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %16
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 0
%11 = load i8*, i8** %10
%12 = load i8**, i8*** %5
%13 = getelementptr inbounds i8*, i8** %12, i64 0
%14 = load i8*, i8** %13
%15 = call i32 @execl(i8* %11, i8* %14, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 0)
store i32 1, i32* %3
br label %21
16: ; preds = %2
%17 = load i8**, i8*** %5
%18 = getelementptr inbounds i8*, i8** %17, i64 1
%19 = load i8*, i8** %18
%20 = call i32 @puts(i8* %19)
store i32 0, i32* %3
br label %21
21: ; preds = %16, %8
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
@.str = [12 x i8] c"Hello world\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 1
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = load i8*, i8** %1
%6 = tail call i32 @execl(i8* %5, i8* %5, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 0)
br label %11
7: ; preds = %2
%8 = getelementptr inbounds i8*, i8** %1, i64 1
%9 = load i8*, i8** %8
%10 = tail call i32 @puts(i8* dereferenceable(1) %9)
br label %11
11: ; preds = %7, %4
%12 = phi i32 [ 1, %4 ], [ 0, %7 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ fgets(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ reverse_string(char *);
int /*<<< orphan*/ stdin;
int main(void) {
  char string[100];
  puts("Say something nice:");
  fgets(string, 100, stdin);
  puts("Reverse of that would be..");
  reverse_string(string);
  puts(string);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
call   1040 <puts@plt>
lea    -0x70(%rbp),%rdi
mov    0x2e92(%rip),%rax
mov    (%rax),%edx
mov    $0x64,%esi
call   1050 <fgets@plt>
lea    0xeab(%rip),%rdi
call   1040 <puts@plt>
lea    -0x70(%rbp),%rdi
call   1030 <reverse_string@plt>
lea    -0x70(%rbp),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x70,%rsp
lea    0xec4(%rip),%rdi
call   1040 <puts@plt>
mov    0x2ea0(%rip),%rax
mov    (%rax),%edx
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x64,%esi
call   1050 <fgets@plt>
lea    0xeb3(%rip),%rdi
call   1040 <puts@plt>
mov    %rbx,%rdi
call   1030 <reverse_string@plt>
mov    %rbx,%rdi
call   1040 <puts@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"Say something nice:\00"
@stdin = global i32 0
@.str.1 = [27 x i8] c"Reverse of that would be..\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [100 x i8]
store i32 0, i32* %1
%3 = call i32 @puts(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%4 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%5 = load i32, i32* @stdin
%6 = call i32 @fgets(i8* %4, i32 100, i32 %5)
%7 = call i32 @puts(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
%8 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%9 = call i32 @reverse_string(i8* %8)
%10 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%11 = call i32 @puts(i8* %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [20 x i8] c"Say something nice:\00"
@stdin = global i32 0
@.str.1 = [27 x i8] c"Reverse of that would be..\00"
define i32 @main() {
%1 = alloca [100 x i8]
%2 = getelementptr inbounds [100 x i8], [100 x i8]* %1, i64 0, i64 0
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* @stdin
%5 = call i32 @fgets(i8* %2, i32 100, i32 %4)
%6 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
%7 = call i32 @reverse_string(i8* %2)
%8 = call i32 @puts(i8* %2)
ret i32 0
}
/* Variables and functions */
scalar_t__ floor(double);
int mul_shr_16(int a, int b) {
  return (int)floor(((double)a) * ((double)b) * (1.0 / (1 << 16)));
}


x86 assembly (clang, -O0):
<mul_shr_16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
cvtsi2sdl -0x8(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xecc(%rip),%xmm1
mulsd  %xmm1,%xmm0
call   1030 <floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mul_shr_16>:
cvtsi2sd %edi,%xmm1
cvtsi2sd %esi,%xmm0
mulsd  %xmm1,%xmm0
mulsd  0xedc(%rip),%xmm0
jmp    1030 <floor@plt>

LLVM IR (-O0):
define i32 @mul_shr_16(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = sitofp i32 %5 to double
%7 = load i32, i32* %4
%8 = sitofp i32 %7 to double
%9 = fmul double %6, %8
%10 = fmul double %9, 0x3EF0000000000000
%11 = call i64 @floor(double %10)
%12 = trunc i64 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @mul_shr_16(i32 %0, i32 %1) {
%3 = sitofp i32 %0 to double
%4 = sitofp i32 %1 to double
%5 = fmul double %3, %4
%6 = fmul double %5, 0x3EF0000000000000
%7 = tail call i64 @floor(double %6)
%8 = trunc i64 %7 to i32
ret i32 %8
}
/* Variables and functions */
scalar_t__ asm_func(int, int);
int asmfunc(int volatile);
int main() {
  volatile int i, j;
  i = 0;
  while (1) {
    i++;
    j = asmfunc(i);
    j += asm_func(1, 2);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <asmfunc@plt>
mov    %eax,-0xc(%rbp)
mov    $0x1,%edi
mov    $0x2,%esi
call   1040 <asm_func@plt>
mov    %rax,%rcx
mov    -0xc(%rbp),%eax
cltq
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    %eax,-0xc(%rbp)
jmp    1136 <main+0x16>

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x0,(%rsp)
nopl   0x0(%rax,%rax,1)
addl   $0x1,(%rsp)
mov    (%rsp),%edi
call   1030 <asmfunc@plt>
mov    %eax,0x4(%rsp)
mov    $0x1,%edi
mov    $0x2,%esi
call   1040 <asm_func@plt>
add    %eax,0x4(%rsp)
jmp    1130 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store volatile i32 0, i32* %2
br label %4
4: ; preds = %0, %4
%5 = load volatile i32, i32* %2
%6 = add nsw i32 %5, 1
store volatile i32 %6, i32* %2
%7 = load volatile i32, i32* %2
%8 = call i32 @asmfunc(i32 %7)
store volatile i32 %8, i32* %3
%9 = call i64 @asm_func(i32 1, i32 2)
%10 = load volatile i32, i32* %3
%11 = sext i32 %10 to i64
%12 = add nsw i64 %11, %9
%13 = trunc i64 %12 to i32
store volatile i32 %13, i32* %3
br label %4
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
store volatile i32 0, i32* %1
br label %5
5: ; preds = %5, %0
%6 = load volatile i32, i32* %1
%7 = add nsw i32 %6, 1
store volatile i32 %7, i32* %1
%8 = load volatile i32, i32* %1
%9 = tail call i32 @asmfunc(i32 %8)
store volatile i32 %9, i32* %2
%10 = tail call i64 @asm_func(i32 1, i32 2)
%11 = load volatile i32, i32* %2
%12 = trunc i64 %10 to i32
%13 = add i32 %11, %12
store volatile i32 %13, i32* %2
br label %5
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ gmtime_r(int /*<<< orphan*/ *, struct tm *);
int /*<<< orphan*/ localtime_r(int /*<<< orphan*/ *, struct tm *);
long mktime(struct tm *);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
long neo_tz_offset(struct tm *ttm) {
  long tz;
  struct tm loc_tm, gmt_tm;
  time_t tt;
  tt = time(NULL);
  localtime_r(&tt, &loc_tm);
  gmtime_r(&tt, &gmt_tm);
  tz = mktime(&loc_tm) - mktime(&gmt_tm);
  return tz;
}


x86 assembly (clang, -O0):
<neo_tz_offset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1050 <time@plt>
mov    %eax,-0x24(%rbp)
lea    -0x24(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <localtime_r@plt>
lea    -0x24(%rbp),%rdi
lea    -0x20(%rbp),%rsi
call   1040 <gmtime_r@plt>
lea    -0x18(%rbp),%rdi
call   1060 <mktime@plt>
mov    %rax,-0x30(%rbp)
lea    -0x20(%rbp),%rdi
call   1060 <mktime@plt>
mov    %rax,%rcx
mov    -0x30(%rbp),%rax
sub    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<neo_tz_offset>:
push   %r15
push   %r14
push   %rbx
sub    $0x20,%rsp
xor    %edi,%edi
call   1050 <time@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rbx
lea    0x18(%rsp),%r14
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <localtime_r@plt>
lea    0x10(%rsp),%r15
mov    %rbx,%rdi
mov    %r15,%rsi
call   1040 <gmtime_r@plt>
mov    %r14,%rdi
call   1060 <mktime@plt>
mov    %rax,%rbx
mov    %r15,%rdi
call   1060 <mktime@plt>
sub    %rax,%rbx
mov    %rbx,%rax
add    $0x20,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define i64 @neo_tz_offset(%struct.tm* %0) {
%2 = alloca %struct.tm*
%3 = alloca i64
%4 = alloca %struct.tm
%5 = alloca %struct.tm
%6 = alloca i32
store %struct.tm* %0, %struct.tm** %2
%7 = call i32 @time(i32* null)
store i32 %7, i32* %6
%8 = call i32 @localtime_r(i32* %6, %struct.tm* %4)
%9 = call i32 @gmtime_r(i32* %6, %struct.tm* %5)
%10 = call i64 @mktime(%struct.tm* %4)
%11 = call i64 @mktime(%struct.tm* %5)
%12 = sub nsw i64 %10, %11
store i64 %12, i64* %3
%13 = load i64, i64* %3
ret i64 %13
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define i64 @neo_tz_offset(%struct.tm* nocapture readnone %0) {
%2 = alloca %struct.tm
%3 = alloca %struct.tm
%4 = alloca i32
%5 = bitcast %struct.tm* %2 to i8*
%6 = bitcast %struct.tm* %3 to i8*
%7 = bitcast i32* %4 to i8*
%8 = tail call i32 @time(i32* null)
store i32 %8, i32* %4
%9 = call i32 @localtime_r(i32* %4, %struct.tm* %2)
%10 = call i32 @gmtime_r(i32* %4, %struct.tm* %3)
%11 = call i64 @mktime(%struct.tm* %2)
%12 = call i64 @mktime(%struct.tm* %3)
%13 = sub nsw i64 %11, %12
ret i64 %13
}
adr0indreg1(r0, r1, x0, x1, p0, p1) short r0, r1;
short *p0, *p1;
{
  if ((*((short *)10000000)) <= (*p1))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<adr0indreg1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    $0x989680,%eax
movswl (%rax),%eax
mov    -0x20(%rbp),%rcx
movswl (%rcx),%ecx
cmp    %ecx,%eax
jg     1142 <adr0indreg1+0x42>
movl   $0x1,-0x4(%rbp)
jmp    1149 <adr0indreg1+0x49>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adr0indreg1>:
movzwl 0x989680,%ecx
xor    %eax,%eax
cmp    (%r9),%cx
setle  %al
ret

LLVM IR (-O0):
define i32 @adr0indreg1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16, i16* inttoptr (i64 10000000 to i16*)
%17 = sext i16 %16 to i32
%18 = load i16*, i16** %13
%19 = load i16, i16* %18
%20 = sext i16 %19 to i32
%21 = icmp sle i32 %17, %20
br i1 %21, label %22, label %23
22: ; preds = %6
store i32 1, i32* %7
br label %24
23: ; preds = %6
store i32 0, i32* %7
br label %24
24: ; preds = %23, %22
%25 = load i32, i32* %7
ret i32 %25
}

LLVM IR (-O2):
define i32 @adr0indreg1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture %5) {
%7 = load i16, i16* inttoptr (i64 10000000 to i16*)
%8 = load i16, i16* %5
%9 = icmp sle i16 %7, %8
%10 = zext i1 %9 to i32
ret i32 %10
}
void I422AlphaToARGBRow_Any_NEON() {}


x86 assembly (clang, -O0):
<I422AlphaToARGBRow_Any_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I422AlphaToARGBRow_Any_NEON>:
ret

LLVM IR (-O0):
define void @I422AlphaToARGBRow_Any_NEON() {
ret void
}

LLVM IR (-O2):
define void @I422AlphaToARGBRow_Any_NEON() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
void poke8(uint8_t *address, uint8_t value) { (*address) = value; }


x86 assembly (clang, -O0):
<poke8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<poke8>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @poke8(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
store i32 %5, i32* %6
ret void
}

LLVM IR (-O2):
define void @poke8(i32* nocapture writeonly %0, i32 %1) {
store i32 %1, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
void *malloc(size_t);
int /*<<< orphan*/ stderr;
void *emalloc(size_t size) {
  void *p = malloc(size);
  if (!p) {
    fputs("out of memory", stderr);
    abort();
  }
  return p;
}


x86 assembly (clang, -O0):
<emalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1170 <emalloc+0x40>
mov    0x2e85(%rip),%rax
mov    (%rax),%esi
lea    0xe9c(%rip),%rdi
call   1040 <fputs@plt>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emalloc>:
push   %rax
call   1050 <malloc@plt>
test   %rax,%rax
je     113d <emalloc+0xd>
pop    %rcx
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%esi
lea    0xeb3(%rip),%rdi
call   1040 <fputs@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"out of memory\00"
@stderr = global i32 0
define i8* @emalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = load i32, i32* @stderr
%10 = call i32 @fputs(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = call i32 (...) @abort()
unreachable
12: ; preds = %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@.str = [14 x i8] c"out of memory\00"
@stderr = global i32 0
define noalias i8* @emalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fputs(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = tail call i32 (...) @abort()
unreachable
8: ; preds = %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ SUB_HOST_REG_B(int, int);
int /*<<< orphan*/ addbyte(int);
int CMP_HOST_REG_B(int dst_reg, int src_reg) {
  if (dst_reg & 8) {
    addbyte(0x44);
    addbyte(0x89);
    addbyte(0xc0 | ((dst_reg & 7) << 3) | 2);
    dst_reg = (dst_reg & 0x10) | 2;
  }
  SUB_HOST_REG_B(dst_reg, src_reg);
  return dst_reg & ~0x10;
}


x86 assembly (clang, -O0):
<CMP_HOST_REG_B>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x8,%eax
cmp    $0x0,%eax
je     1174 <CMP_HOST_REG_B+0x54>
mov    $0x44,%edi
call   1040 <addbyte@plt>
mov    $0x89,%edi
call   1040 <addbyte@plt>
mov    -0x4(%rbp),%edi
and    $0x7,%edi
shl    $0x3,%edi
or     $0xc0,%edi
or     $0x2,%edi
call   1040 <addbyte@plt>
mov    -0x4(%rbp),%eax
and    $0x10,%eax
or     $0x2,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <SUB_HOST_REG_B@plt>
mov    -0x4(%rbp),%eax
and    $0xffffffef,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CMP_HOST_REG_B>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %edi,%ebx
test   $0x8,%bl
je     115a <CMP_HOST_REG_B+0x3a>
mov    $0x44,%edi
call   1040 <addbyte@plt>
mov    $0x89,%edi
call   1040 <addbyte@plt>
lea    0x0(,%rbx,8),%eax
or     $0xc2,%eax
movzbl %al,%edi
call   1040 <addbyte@plt>
and    $0x10,%ebx
or     $0x2,%ebx
mov    %ebx,%edi
mov    %ebp,%esi
call   1030 <SUB_HOST_REG_B@plt>
and    $0xffffffef,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @CMP_HOST_REG_B(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = and i32 %5, 8
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %20
8: ; preds = %2
%9 = call i32 @addbyte(i32 68)
%10 = call i32 @addbyte(i32 137)
%11 = load i32, i32* %3
%12 = and i32 %11, 7
%13 = shl i32 %12, 3
%14 = or i32 192, %13
%15 = or i32 %14, 2
%16 = call i32 @addbyte(i32 %15)
%17 = load i32, i32* %3
%18 = and i32 %17, 16
%19 = or i32 %18, 2
store i32 %19, i32* %3
br label %20
20: ; preds = %8, %2
%21 = load i32, i32* %3
%22 = load i32, i32* %4
%23 = call i32 @SUB_HOST_REG_B(i32 %21, i32 %22)
%24 = load i32, i32* %3
%25 = and i32 %24, -17
ret i32 %25
}

LLVM IR (-O2):
define i32 @CMP_HOST_REG_B(i32 %0, i32 %1) {
%3 = and i32 %0, 8
%4 = icmp eq i32 %3, 0
br i1 %4, label %14, label %5
5: ; preds = %2
%6 = tail call i32 @addbyte(i32 68)
%7 = tail call i32 @addbyte(i32 137)
%8 = shl i32 %0, 3
%9 = and i32 %8, 56
%10 = or i32 %9, 194
%11 = tail call i32 @addbyte(i32 %10)
%12 = and i32 %0, 16
%13 = or i32 %12, 2
br label %14
14: ; preds = %5, %2
%15 = phi i32 [ %13, %5 ], [ %0, %2 ]
%16 = tail call i32 @SUB_HOST_REG_B(i32 %15, i32 %1)
%17 = and i32 %15, -17
ret i32 %17
}
int tt_height(struct bitmap_font *font) { return 6; }


x86 assembly (clang, -O0):
<tt_height>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tt_height>:
mov    $0x6,%eax
ret

LLVM IR (-O0):
%struct.bitmap_font = type opaque
define i32 @tt_height(%struct.bitmap_font* %0) {
%2 = alloca %struct.bitmap_font*
store %struct.bitmap_font* %0, %struct.bitmap_font** %2
ret i32 6
}

LLVM IR (-O2):
%struct.bitmap_font = type opaque
define i32 @tt_height(%struct.bitmap_font* nocapture readnone %0) {
ret i32 6
}
int b_twist_l2_on_midperm(mperm)
int mperm;
{
  int temp_arr[4];
  b_midperm_unpack(mperm, temp_arr);
  two_cycle(temp_arr, 1, 3);
  return b_midperm_pack(temp_arr);
}


x86 assembly (clang, -O0):
<b_twist_l2_on_midperm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x20(%rbp),%rsi
mov    $0x0,%al
call   1030 <b_midperm_unpack@plt>
lea    -0x20(%rbp),%rdi
mov    $0x1,%esi
mov    $0x3,%edx
mov    $0x0,%al
call   1050 <two_cycle@plt>
lea    -0x20(%rbp),%rdi
mov    $0x0,%al
call   1040 <b_midperm_pack@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_twist_l2_on_midperm>:
push   %rbx
sub    $0x10,%rsp
mov    %rsp,%rbx
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <b_midperm_unpack@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
mov    $0x3,%edx
xor    %eax,%eax
call   1050 <two_cycle@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1040 <b_midperm_pack@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @b_twist_l2_on_midperm(i32 %0) {
%2 = alloca i32
%3 = alloca [4 x i32]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 0
%6 = call i32 (i32, i32*, ...) bitcast (i32 (...)* @b_midperm_unpack to i32 (i32, i32*, ...)*)(i32 %4, i32* %5)
%7 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 0
%8 = call i32 (i32*, i32, i32, ...) bitcast (i32 (...)* @two_cycle to i32 (i32*, i32, i32, ...)*)(i32* %7, i32 1, i32 3)
%9 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 0
%10 = call i32 (i32*, ...) bitcast (i32 (...)* @b_midperm_pack to i32 (i32*, ...)*)(i32* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @b_twist_l2_on_midperm(i32 %0) {
%2 = alloca [4 x i32]
%3 = bitcast [4 x i32]* %2 to i8*
%4 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 0, i64 0
%5 = call i32 (i32, i32*, ...) bitcast (i32 (...)* @b_midperm_unpack to i32 (i32, i32*, ...)*)(i32 %0, i32* %4)
%6 = call i32 (i32*, i32, i32, ...) bitcast (i32 (...)* @two_cycle to i32 (i32*, i32, i32, ...)*)(i32* %4, i32 1, i32 3)
%7 = call i32 (i32*, ...) bitcast (i32 (...)* @b_midperm_pack to i32 (i32*, ...)*)(i32* %4)
ret i32 %7
}
/* Type definitions */
struct katcp_dispatch {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ find_name_type_katcp(struct katcp_dispatch *, char *);
void *search_type_katcp(struct katcp_dispatch *, int /*<<< orphan*/, char *,
                        void *);
void *search_named_type_katcp(struct katcp_dispatch *d, char *type, char *key,
                              void *data) {
  return search_type_katcp(d, find_name_type_katcp(d, type), key, data);
}


x86 assembly (clang, -O0):
<search_named_type_katcp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <find_name_type_katcp@plt>
mov    -0x28(%rbp),%rdi
mov    %eax,%esi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1040 <search_type_katcp@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<search_named_type_katcp>:
push   %r15
push   %r14
push   %rbx
mov    %rcx,%r14
mov    %rdx,%r15
mov    %rdi,%rbx
call   1030 <find_name_type_katcp@plt>
mov    %rbx,%rdi
mov    %eax,%esi
mov    %r15,%rdx
mov    %r14,%rcx
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <search_type_katcp@plt>

LLVM IR (-O0):
%struct.katcp_dispatch = type { i32 }
define i8* @search_named_type_katcp(%struct.katcp_dispatch* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca %struct.katcp_dispatch*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store %struct.katcp_dispatch* %0, %struct.katcp_dispatch** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load %struct.katcp_dispatch*, %struct.katcp_dispatch** %5
%10 = load %struct.katcp_dispatch*, %struct.katcp_dispatch** %5
%11 = load i8*, i8** %6
%12 = call i32 @find_name_type_katcp(%struct.katcp_dispatch* %10, i8* %11)
%13 = load i8*, i8** %7
%14 = load i8*, i8** %8
%15 = call i8* @search_type_katcp(%struct.katcp_dispatch* %9, i32 %12, i8* %13, i8* %14)
ret i8* %15
}

LLVM IR (-O2):
%struct.katcp_dispatch = type { i32 }
define i8* @search_named_type_katcp(%struct.katcp_dispatch* %0, i8* %1, i8* %2, i8* %3) {
%5 = tail call i32 @find_name_type_katcp(%struct.katcp_dispatch* %0, i8* %1)
%6 = tail call i8* @search_type_katcp(%struct.katcp_dispatch* %0, i32 %5, i8* %2, i8* %3)
ret i8* %6
}
void OCSP_BASICRESP_free(void) {}


x86 assembly (clang, -O0):
<OCSP_BASICRESP_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OCSP_BASICRESP_free>:
ret

LLVM IR (-O0):
define void @OCSP_BASICRESP_free() {
ret void
}

LLVM IR (-O2):
define void @OCSP_BASICRESP_free() {
ret void
}
/* Variables and functions */
int GL_COLOR_BUFFER_BIT;
int GL_DEPTH_BUFFER_BIT;
int /*<<< orphan*/ glClear(int);
int /*<<< orphan*/ glColor3f(int /*<<< orphan*/, double, double);
int /*<<< orphan*/ glFlush();
int /*<<< orphan*/ glutSolidSphere(double, int, int);
void display() {
  glClear(GL_COLOR_BUFFER_BIT | GL_DEPTH_BUFFER_BIT);
  glColor3f(0, 0.5, 0.5);
  glutSolidSphere(1.0, 40, 32);
  glFlush();
}


x86 assembly (clang, -O0):
<display>:
push   %rbp
mov    %rsp,%rbp
mov    0x2e8d(%rip),%rax
mov    (%rax),%edi
mov    0x2e94(%rip),%rax
or     (%rax),%edi
call   1030 <glClear@plt>
xor    %edi,%edi
movsd  0xea3(%rip),%xmm1
movaps %xmm1,%xmm0
call   1040 <glColor3f@plt>
movsd  0xe8b(%rip),%xmm0
mov    $0x28,%edi
mov    $0x20,%esi
call   1060 <glutSolidSphere@plt>
mov    $0x0,%al
call   1050 <glFlush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display>:
push   %rax
mov    0x2e90(%rip),%rax
mov    0x2e99(%rip),%rcx
mov    (%rcx),%edi
or     (%rax),%edi
call   1030 <glClear@plt>
movsd  0xea0(%rip),%xmm0
xor    %edi,%edi
movaps %xmm0,%xmm1
call   1040 <glColor3f@plt>
movsd  0xe96(%rip),%xmm0
mov    $0x28,%edi
mov    $0x20,%esi
call   1060 <glutSolidSphere@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <glFlush@plt>

LLVM IR (-O0):
@GL_COLOR_BUFFER_BIT = global i32 0
@GL_DEPTH_BUFFER_BIT = global i32 0
define void @display() {
%1 = load i32, i32* @GL_COLOR_BUFFER_BIT
%2 = load i32, i32* @GL_DEPTH_BUFFER_BIT
%3 = or i32 %1, %2
%4 = call i32 @glClear(i32 %3)
%5 = call i32 @glColor3f(i32 0, double 5.000000e-01, double 5.000000e-01)
%6 = call i32 @glutSolidSphere(double 1.000000e+00, i32 40, i32 32)
%7 = call i32 (...) @glFlush()
ret void
}

LLVM IR (-O2):
@GL_COLOR_BUFFER_BIT = global i32 0
@GL_DEPTH_BUFFER_BIT = global i32 0
define void @display() {
%1 = load i32, i32* @GL_COLOR_BUFFER_BIT
%2 = load i32, i32* @GL_DEPTH_BUFFER_BIT
%3 = or i32 %2, %1
%4 = tail call i32 @glClear(i32 %3)
%5 = tail call i32 @glColor3f(i32 0, double 5.000000e-01, double 5.000000e-01)
%6 = tail call i32 @glutSolidSphere(double 1.000000e+00, i32 40, i32 32)
%7 = tail call i32 (...) @glFlush()
ret void
}
int tcg_target_get_call_iarg_regs_count(int flags) { return 4; }


x86 assembly (clang, -O0):
<tcg_target_get_call_iarg_regs_count>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcg_target_get_call_iarg_regs_count>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @tcg_target_get_call_iarg_regs_count(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 4
}

LLVM IR (-O2):
define i32 @tcg_target_get_call_iarg_regs_count(i32 %0) {
ret i32 4
}
/* Type definitions */
typedef int uint64_t;
typedef int int64_t;

/* Variables and functions */
uint64_t mc_swap64(uint64_t in) {
  int64_t rv = 0;
  int i = 0;
  for (i = 0; i < 8; i++) {
    rv = (rv << 8) | (in & 0xff);
    in >>= 8;
  }
  return rv;
}


x86 assembly (clang, -O0):
<mc_swap64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x8,-0xc(%rbp)
jge    1151 <mc_swap64+0x51>
mov    -0x8(%rbp),%eax
shl    $0x8,%eax
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    111c <mc_swap64+0x1c>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mc_swap64>:
sar    $0x1f,%edi
movzbl %dil,%ecx
mov    %ecx,%edx
shl    $0x10,%edx
mov    %ecx,%eax
shl    $0x8,%eax
or     %edx,%eax
or     %ecx,%eax
shl    $0x8,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @mc_swap64(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
store i32 0, i32* %4
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 8
br i1 %7, label %8, label %19
8: ; preds = %5
%9 = load i32, i32* %3
%10 = shl i32 %9, 8
%11 = load i32, i32* %2
%12 = and i32 %11, 255
%13 = or i32 %10, %12
store i32 %13, i32* %3
%14 = load i32, i32* %2
%15 = ashr i32 %14, 8
store i32 %15, i32* %2
br label %16
16: ; preds = %8
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 1
store i32 %18, i32* %4
br label %5
19: ; preds = %5
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @mc_swap64(i32 %0) {
%2 = icmp slt i32 %0, 0
%3 = select i1 %2, i32 255, i32 0
%4 = shl nuw nsw i32 %3, 16
%5 = shl nuw nsw i32 %3, 8
%6 = or i32 %4, %5
%7 = or i32 %6, %3
%8 = shl nuw i32 %7, 8
%9 = or i32 %8, %3
ret i32 %9
}