xunge/DecIR huggingface dataset:
int isalnum(c)
int c;
{
  return (c >= 'A' && c <= 'Z') || (c >= 'a' && c <= 'z') ||
         (c >= '0' && c <= '9');
}


x86 assembly (clang, -O0):
<isalnum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x41,-0x4(%rbp)
jl     1120 <isalnum+0x20>
mov    $0x1,%al
cmpl   $0x5a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1158 <isalnum+0x58>
cmpl   $0x61,-0x4(%rbp)
jl     1139 <isalnum+0x39>
mov    $0x1,%al
cmpl   $0x7a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1158 <isalnum+0x58>
xor    %eax,%eax
cmpl   $0x30,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     1152 <isalnum+0x52>
cmpl   $0x39,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isalnum>:
mov    %edi,%eax
and    $0xffffffdf,%eax
add    $0xffffffbf,%eax
cmp    $0x1a,%eax
setb   %al
add    $0xffffffd0,%edi
cmp    $0xa,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @isalnum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 65
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 90
br i1 %7, label %22, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 97
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 122
br i1 %13, label %22, label %14
14: ; preds = %11, %8
%15 = load i32, i32* %2
%16 = icmp sge i32 %15, 48
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp sle i32 %18, 57
br label %20
20: ; preds = %17, %14
%21 = phi i1 [ false, %14 ], [ %19, %17 ]
br label %22
22: ; preds = %20, %11, %5
%23 = phi i1 [ true, %11 ], [ true, %5 ], [ %21, %20 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @isalnum(i32 %0) {
%2 = and i32 %0, -33
%3 = add i32 %2, -65
%4 = icmp ult i32 %3, 26
%5 = add i32 %0, -48
%6 = icmp ult i32 %5, 10
%7 = or i1 %6, %4
%8 = zext i1 %7 to i32
ret i32 %8
}
int dev_pm_set_dedicated__wake_irq(struct device *dev, int irq) { return 0; }


x86 assembly (clang, -O0):
<dev_pm_set_dedicated__wake_irq>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dev_pm_set_dedicated__wake_irq>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.device = type opaque
define i32 @dev_pm_set_dedicated__wake_irq(%struct.device* %0, i32 %1) {
%3 = alloca %struct.device*
%4 = alloca i32
store %struct.device* %0, %struct.device** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
%struct.device = type opaque
define i32 @dev_pm_set_dedicated__wake_irq(%struct.device* nocapture readnone %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int EOF;
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  printf("eof is %d\n", EOF);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%esi
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%esi
lea    0xedf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"eof is %d\0A\00"
@EOF = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @EOF
%3 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"eof is %d\0A\00"
@EOF = global i32 0
define i32 @main() {
%1 = load i32, i32* @EOF
%2 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
void func_if_with_assignment(int c) {
  int a = 0;
  if (c) {
    a = 1;
  }
}


x86 assembly (clang, -O0):
<func_if_with_assignment>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     111f <func_if_with_assignment+0x1f>
movl   $0x1,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_if_with_assignment>:
ret

LLVM IR (-O0):
define void @func_if_with_assignment(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %3
br label %7
7: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
define void @func_if_with_assignment(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
struct tm *localtime(int /*<<< orphan*/ *);
int /*<<< orphan*/ strftime(char *, int, char *, struct tm *);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
void set_current_time(char *t) {
  time_t rawtime;
  struct tm *timeinfo;
  time(&rawtime);
  timeinfo = localtime(&rawtime);
  strftime(t, 80, "%a, %d %b %Y %X %Z", timeinfo);
}


x86 assembly (clang, -O0):
<set_current_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0xc(%rbp),%rdi
call   1040 <time@plt>
lea    -0xc(%rbp),%rdi
call   1030 <localtime@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rcx
mov    $0x50,%esi
lea    0xe9a(%rip),%rdx
call   1050 <strftime@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_current_time>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
lea    0x4(%rsp),%r14
mov    %r14,%rdi
call   1040 <time@plt>
mov    %r14,%rdi
call   1030 <localtime@plt>
lea    0xead(%rip),%rdx
mov    %rbx,%rdi
mov    $0x50,%esi
mov    %rax,%rcx
call   1050 <strftime@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
@.str = [19 x i8] c"%a, %d %b %Y %X %Z\00"
define void @set_current_time(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca %struct.tm*
store i8* %0, i8** %2
%5 = call i32 @time(i32* %3)
%6 = call %struct.tm* @localtime(i32* %3)
store %struct.tm* %6, %struct.tm** %4
%7 = load i8*, i8** %2
%8 = load %struct.tm*, %struct.tm** %4
%9 = call i32 @strftime(i8* %7, i32 80, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), %struct.tm* %8)
ret void
}

LLVM IR (-O2):
%struct.tm = type { i32 }
@.str = [19 x i8] c"%a, %d %b %Y %X %Z\00"
define void @set_current_time(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @time(i32* %2)
%5 = call %struct.tm* @localtime(i32* %2)
%6 = call i32 @strftime(i8* %0, i32 80, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), %struct.tm* %5)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128d;

/* Variables and functions */
int /*<<< orphan*/ _mm_cmplt_sd(int /*<<< orphan*/, int /*<<< orphan*/);
__m128d test_mm_cmplt_sd(__m128d __a, __m128d __b) {
  return _mm_cmplt_sd(__a, __b);
}


x86 assembly (clang, -O0):
<test_mm_cmplt_sd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_cmplt_sd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cmplt_sd>:
jmp    1030 <_mm_cmplt_sd@plt>

LLVM IR (-O0):
define i32 @test_mm_cmplt_sd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_cmplt_sd(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_cmplt_sd(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmplt_sd(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ machdep_Unlock();
void McSrv_Unlock(void) { machdep_Unlock(); }


x86 assembly (clang, -O0):
<McSrv_Unlock>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <machdep_Unlock@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<McSrv_Unlock>:
xor    %eax,%eax
jmp    1030 <machdep_Unlock@plt>

LLVM IR (-O0):
define void @McSrv_Unlock() {
%1 = call i32 (...) @machdep_Unlock()
ret void
}

LLVM IR (-O2):
define void @McSrv_Unlock() {
%1 = tail call i32 (...) @machdep_Unlock()
ret void
}
void i2d_AUTHORITY_INFO_ACCESS(void) {}


x86 assembly (clang, -O0):
<i2d_AUTHORITY_INFO_ACCESS>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_AUTHORITY_INFO_ACCESS>:
ret

LLVM IR (-O0):
define void @i2d_AUTHORITY_INFO_ACCESS() {
ret void
}

LLVM IR (-O2):
define void @i2d_AUTHORITY_INFO_ACCESS() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ client();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int main() {
  client();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <client@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <client@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @client()
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @client()
%2 = tail call i32 @exit(i32 0)
unreachable
}
void grace_get_world_minimum_y(double *world_min_y, double y) {
  *world_min_y = y;
}


x86 assembly (clang, -O0):
<grace_get_world_minimum_y>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<grace_get_world_minimum_y>:
movsd  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @grace_get_world_minimum_y(double* %0, double %1) {
%3 = alloca double*
%4 = alloca double
store double* %0, double** %3
store double %1, double* %4
%5 = load double, double* %4
%6 = load double*, double** %3
store double %5, double* %6
ret void
}

LLVM IR (-O2):
define void @grace_get_world_minimum_y(double* nocapture writeonly %0, double %1) {
store double %1, double* %0
ret void
}
/* Variables and functions */
scalar_t__ Parray();
scalar_t__ PnameDef();
PportNameDef() {
  int b = -1;
  ;
  b = PnameDef() || Parray();
  return (b);
}


x86 assembly (clang, -O0):
<PportNameDef>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xffffffff,-0x4(%rbp)
mov    $0x0,%al
call   1030 <PnameDef@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1159 <PportNameDef+0x39>
mov    $0x0,%al
call   1040 <Parray@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PportNameDef>:
push   %rax
xor    %eax,%eax
call   1030 <PnameDef@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <PportNameDef+0x17>
pop    %rcx
ret
xor    %eax,%eax
call   1040 <Parray@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @PportNameDef() {
%1 = alloca i32
store i32 -1, i32* %1
%2 = call i64 (...) @PnameDef()
%3 = icmp ne i64 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %0
%5 = call i64 (...) @Parray()
%6 = icmp ne i64 %5, 0
br label %7
7: ; preds = %4, %0
%8 = phi i1 [ true, %0 ], [ %6, %4 ]
%9 = zext i1 %8 to i32
store i32 %9, i32* %1
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
define i32 @PportNameDef() {
%1 = tail call i64 (...) @PnameDef()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %7
3: ; preds = %0
%4 = tail call i64 (...) @Parray()
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %0
%8 = phi i32 [ 1, %0 ], [ %6, %3 ]
ret i32 %8
}
adrreg0adrreg1_set(r0, r1, x0, x1, p0, p1) float r0, r1;
float *p0, *p1;
{ (p0[10000000]) = (p1[1111111 / 4]); }


x86 assembly (clang, -O0):
<adrreg0adrreg1_set>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm1,-0x30(%rbp)
movaps %xmm0,%xmm1
movsd  -0x30(%rbp),%xmm0
cvtsd2ss %xmm1,%xmm1
cvtsd2ss %xmm0,%xmm0
movss  %xmm1,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    %edi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x28(%rbp),%rax
movss  0x10f444(%rax),%xmm0
mov    -0x20(%rbp),%rax
movss  %xmm0,0x2625a00(%rax)
02
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adrreg0adrreg1_set>:
movss  0x10f444(%rcx),%xmm0
movss  %xmm0,0x2625a00(%rdx)
02
ret

LLVM IR (-O0):
define i32 @adrreg0adrreg1_set(double %0, double %1, i32 %2, i32 %3, float* %4, float* %5) {
%7 = alloca i32
%8 = alloca float
%9 = alloca float
%10 = alloca i32
%11 = alloca i32
%12 = alloca float*
%13 = alloca float*
%14 = fptrunc double %0 to float
%15 = fptrunc double %1 to float
store float %14, float* %8
store float %15, float* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store float* %4, float** %12
store float* %5, float** %13
%16 = load float*, float** %13
%17 = getelementptr inbounds float, float* %16, i64 277777
%18 = load float, float* %17
%19 = load float*, float** %12
%20 = getelementptr inbounds float, float* %19, i64 10000000
store float %18, float* %20
%21 = load i32, i32* %7
ret i32 %21
}

LLVM IR (-O2):
define i32 @adrreg0adrreg1_set(double %0, double %1, i32 %2, i32 %3, float* nocapture writeonly %4, float* nocapture %5) {
%7 = getelementptr inbounds float, float* %5, i64 277777
%8 = load float, float* %7
%9 = getelementptr inbounds float, float* %4, i64 10000000
store float %8, float* %9
ret i32 undef
}
void MMU_LockEntry() {}


x86 assembly (clang, -O0):
<MMU_LockEntry>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MMU_LockEntry>:
ret

LLVM IR (-O0):
define void @MMU_LockEntry() {
ret void
}

LLVM IR (-O2):
define void @MMU_LockEntry() {
ret void
}
int device_recovery_start() { return 0; }


x86 assembly (clang, -O0):
<device_recovery_start>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<device_recovery_start>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @device_recovery_start() {
ret i32 0
}

LLVM IR (-O2):
define i32 @device_recovery_start() {
ret i32 0
}
void RandomFunc(unsigned int input[1], unsigned int output[1]) {
  unsigned int state[1];
  unsigned int local1;
  {
    state[0UL] = (input[0UL] | 51238316UL) >> 3U;
    local1 = 0UL;
    while (local1 < 0U) {
      state[0UL] <<= ((state[0UL] >> 3U) & 7U) | 1UL;
      local1 += 2UL;
    }
    output[0UL] = (state[0UL] & 144997984UL) & 434169834U;
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
or     $0x30dd5ac,%rax
shr    $0x3,%rax
mov    %eax,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jae    1158 <RandomFunc+0x58>
mov    -0x14(%rbp),%eax
shr    $0x3,%eax
and    $0x7,%eax
mov    %eax,%eax
mov    %eax,%ecx
or     $0x1,%rcx
mov    -0x14(%rbp),%eax
shl    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
add    $0x2,%rax
mov    %eax,-0x18(%rbp)
jmp    1126 <RandomFunc+0x26>
mov    -0x14(%rbp),%eax
and    $0x8a47e60,%rax
and    $0x19e0e7ea,%rax
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
mov    (%rdi),%eax
shr    $0x3,%eax
and    $0x8804440,%eax
or     $0x202220,%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca [1 x i32]
%6 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 0
%9 = load i32, i32* %8
%10 = zext i32 %9 to i64
%11 = or i64 %10, 51238316
%12 = lshr i64 %11, 3
%13 = trunc i64 %12 to i32
%14 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
store i32 %13, i32* %14
store i32 0, i32* %6
br label %15
15: ; preds = %18, %2
%16 = load i32, i32* %6
%17 = icmp ult i32 %16, 0
br i1 %17, label %18, label %33
18: ; preds = %15
%19 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
%20 = load i32, i32* %19
%21 = lshr i32 %20, 3
%22 = and i32 %21, 7
%23 = zext i32 %22 to i64
%24 = or i64 %23, 1
%25 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
%26 = load i32, i32* %25
%27 = trunc i64 %24 to i32
%28 = shl i32 %26, %27
store i32 %28, i32* %25
%29 = load i32, i32* %6
%30 = zext i32 %29 to i64
%31 = add i64 %30, 2
%32 = trunc i64 %31 to i32
store i32 %32, i32* %6
br label %15
33: ; preds = %15
%34 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
%35 = load i32, i32* %34
%36 = zext i32 %35 to i64
%37 = and i64 %36, 144997984
%38 = and i64 %37, 434169834
%39 = trunc i64 %38 to i32
%40 = load i32*, i32** %4
%41 = getelementptr inbounds i32, i32* %40, i64 0
store i32 %39, i32* %41
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i32* nocapture %0, i32* nocapture writeonly %1) {
%3 = load i32, i32* %0
%4 = lshr i32 %3, 3
%5 = and i32 %4, 142623808
%6 = or i32 %5, 2105888
store i32 %6, i32* %1
ret void
}
int generate_color(int key) {
  key = ~key + (key << 15);
  key = key ^ (key >> 12);
  key = key + (key << 2);
  key = key ^ (key >> 4);
  key = key * 2057;
  key = key ^ (key >> 16);
  return key % (0xffffff + 1);
}


x86 assembly (clang, -O0):
<generate_color>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
mov    -0x4(%rbp),%ecx
shl    $0xf,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0xc,%ecx
xor    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
shl    $0x2,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x4,%ecx
xor    %ecx,%eax
mov    %eax,-0x4(%rbp)
imul   $0x809,-0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x10,%ecx
xor    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x1000000,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_color>:
mov    %edi,%eax
not    %eax
shl    $0xf,%edi
add    %eax,%edi
mov    %edi,%eax
sar    $0xc,%eax
xor    %edi,%eax
lea    (%rax,%rax,4),%eax
mov    %eax,%ecx
sar    $0x4,%ecx
xor    %eax,%ecx
imul   $0x809,%ecx,%ecx
mov    %ecx,%eax
sar    $0x10,%eax
xor    %ecx,%eax
lea    0xffffff(%rax),%ecx
test   %eax,%eax
cmovns %eax,%ecx
and    $0xff000000,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @generate_color(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = xor i32 %3, -1
%5 = load i32, i32* %2
%6 = shl i32 %5, 15
%7 = add nsw i32 %4, %6
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = load i32, i32* %2
%10 = ashr i32 %9, 12
%11 = xor i32 %8, %10
store i32 %11, i32* %2
%12 = load i32, i32* %2
%13 = load i32, i32* %2
%14 = shl i32 %13, 2
%15 = add nsw i32 %12, %14
store i32 %15, i32* %2
%16 = load i32, i32* %2
%17 = load i32, i32* %2
%18 = ashr i32 %17, 4
%19 = xor i32 %16, %18
store i32 %19, i32* %2
%20 = load i32, i32* %2
%21 = mul nsw i32 %20, 2057
store i32 %21, i32* %2
%22 = load i32, i32* %2
%23 = load i32, i32* %2
%24 = ashr i32 %23, 16
%25 = xor i32 %22, %24
store i32 %25, i32* %2
%26 = load i32, i32* %2
%27 = srem i32 %26, 16777216
ret i32 %27
}

LLVM IR (-O2):
define i32 @generate_color(i32 %0) {
%2 = xor i32 %0, -1
%3 = shl i32 %0, 15
%4 = add nsw i32 %3, %2
%5 = ashr i32 %4, 12
%6 = xor i32 %5, %4
%7 = mul i32 %6, 5
%8 = ashr i32 %7, 4
%9 = xor i32 %8, %7
%10 = mul nsw i32 %9, 2057
%11 = ashr i32 %10, 16
%12 = xor i32 %11, %10
%13 = srem i32 %12, 16777216
ret i32 %13
}
void RTHandleTableFreeWithCtx(void) {}


x86 assembly (clang, -O0):
<RTHandleTableFreeWithCtx>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTHandleTableFreeWithCtx>:
ret

LLVM IR (-O0):
define void @RTHandleTableFreeWithCtx() {
ret void
}

LLVM IR (-O2):
define void @RTHandleTableFreeWithCtx() {
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int uint16_t;

/* Variables and functions */
void set_bit(uint32_t *number, uint16_t position, bool bit_value) {
  if (bit_value == 1) {
    *number |= (bit_value << position);
  } else {
    *number &= (~(1U << position));
  }
}


x86 assembly (clang, -O0):
<set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x1,-0x10(%rbp)
jne    112f <set_bit+0x2f>
mov    -0x10(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    %cl,%eax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
or     (%rax),%ecx
mov    %ecx,(%rax)
jmp    1146 <set_bit+0x46>
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
xor    $0xffffffff,%ecx
mov    -0x8(%rbp),%rax
and    (%rax),%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_bit>:
mov    %esi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
cmp    $0x1,%edx
jne    1113 <set_bit+0x13>
or     (%rdi),%eax
mov    %eax,(%rdi)
ret
not    %eax
and    (%rdi),%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @set_bit(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %16
9: ; preds = %3
%10 = load i32, i32* %6
%11 = load i32, i32* %5
%12 = shl i32 %10, %11
%13 = load i32*, i32** %4
%14 = load i32, i32* %13
%15 = or i32 %14, %12
store i32 %15, i32* %13
br label %23
16: ; preds = %3
%17 = load i32, i32* %5
%18 = shl i32 1, %17
%19 = xor i32 %18, -1
%20 = load i32*, i32** %4
%21 = load i32, i32* %20
%22 = and i32 %21, %19
store i32 %22, i32* %20
br label %23
23: ; preds = %16, %9
ret void
}

LLVM IR (-O2):
define void @set_bit(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %2, 1
%5 = shl nuw i32 1, %1
br i1 %4, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %0
%8 = or i32 %7, %5
br label %13
9: ; preds = %3
%10 = xor i32 %5, -1
%11 = load i32, i32* %0
%12 = and i32 %11, %10
br label %13
13: ; preds = %9, %6
%14 = phi i32 [ %12, %9 ], [ %8, %6 ]
store i32 %14, i32* %0
ret void
}
void foo529() {}


x86 assembly (clang, -O0):
<foo529>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo529>:
ret

LLVM IR (-O0):
define void @foo529() {
ret void
}

LLVM IR (-O2):
define void @foo529() {
ret void
}
int ZLIBH_compressBound(int size) { return (size + 256); }


x86 assembly (clang, -O0):
<ZLIBH_compressBound>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x100,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZLIBH_compressBound>:
lea    0x100(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @ZLIBH_compressBound(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 256
ret i32 %4
}

LLVM IR (-O2):
define i32 @ZLIBH_compressBound(i32 %0) {
%2 = add nsw i32 %0, 256
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ VIM_HIF_SetReg8(int, unsigned char);
void VIM_MARB_SetJbufUpThreshold(unsigned long Length) {
  VIM_HIF_SetReg8((0x2400 + 0x028), (unsigned char)Length);
  VIM_HIF_SetReg8((0x2400 + 0x027), (unsigned char)(Length >> 8));
  VIM_HIF_SetReg8((0x2400 + 0x026), (unsigned char)(Length >> 16));
}


x86 assembly (clang, -O0):
<VIM_MARB_SetJbufUpThreshold>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x2428,%edi
movzbl %al,%esi
call   1030 <VIM_HIF_SetReg8@plt>
mov    -0x8(%rbp),%rax
shr    $0x8,%rax
mov    $0x2427,%edi
movzbl %al,%esi
call   1030 <VIM_HIF_SetReg8@plt>
mov    -0x8(%rbp),%rax
shr    $0x10,%rax
mov    $0x2426,%edi
movzbl %al,%esi
call   1030 <VIM_HIF_SetReg8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VIM_MARB_SetJbufUpThreshold>:
push   %rbx
mov    %rdi,%rbx
movzbl %bl,%esi
mov    $0x2428,%edi
call   1030 <VIM_HIF_SetReg8@plt>
movzbl %bh,%esi
mov    $0x2427,%edi
call   1030 <VIM_HIF_SetReg8@plt>
shr    $0x10,%ebx
movzbl %bl,%esi
mov    $0x2426,%edi
pop    %rbx
jmp    1030 <VIM_HIF_SetReg8@plt>

LLVM IR (-O0):
define void @VIM_MARB_SetJbufUpThreshold(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i8
%5 = call i32 @VIM_HIF_SetReg8(i32 9256, i8 zeroext %4)
%6 = load i64, i64* %2
%7 = lshr i64 %6, 8
%8 = trunc i64 %7 to i8
%9 = call i32 @VIM_HIF_SetReg8(i32 9255, i8 zeroext %8)
%10 = load i64, i64* %2
%11 = lshr i64 %10, 16
%12 = trunc i64 %11 to i8
%13 = call i32 @VIM_HIF_SetReg8(i32 9254, i8 zeroext %12)
ret void
}

LLVM IR (-O2):
define void @VIM_MARB_SetJbufUpThreshold(i64 %0) {
%2 = trunc i64 %0 to i8
%3 = tail call i32 @VIM_HIF_SetReg8(i32 9256, i8 zeroext %2)
%4 = lshr i64 %0, 8
%5 = trunc i64 %4 to i8
%6 = tail call i32 @VIM_HIF_SetReg8(i32 9255, i8 zeroext %5)
%7 = lshr i64 %0, 16
%8 = trunc i64 %7 to i8
%9 = tail call i32 @VIM_HIF_SetReg8(i32 9254, i8 zeroext %8)
ret void
}
int BPQSerialGetDTRRTS(unsigned int hDevice, unsigned long *Flags) { return 0; }


x86 assembly (clang, -O0):
<BPQSerialGetDTRRTS>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BPQSerialGetDTRRTS>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @BPQSerialGetDTRRTS(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @BPQSerialGetDTRRTS(i32 %0, i64* nocapture readnone %1) {
ret i32 0
}
void kprint(const char *str) { static char *vga = 0xB8000; }


x86 assembly (clang, -O0):
<kprint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<kprint>:
ret

LLVM IR (-O0):
@kprint.vga = internal global i8* inttoptr (i64 753664 to i8*)
define void @kprint(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @kprint(i8* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ gid_t;

/* Variables and functions */
int /*<<< orphan*/ err_exit(char *);
scalar_t__ setregid(int /*<<< orphan*/, int /*<<< orphan*/);
void _setregid(gid_t r, gid_t g) {
  if (setregid(r, g) < 0)
    err_exit("_setregid");
}


x86 assembly (clang, -O0):
<_setregid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <setregid@plt>
cmp    $0x0,%rax
jge    114f <_setregid+0x2f>
lea    0xeb6(%rip),%rdi
call   1030 <err_exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_setregid>:
push   %rax
call   1040 <setregid@plt>
test   %rax,%rax
js     112d <_setregid+0xd>
pop    %rax
ret
lea    0xecc(%rip),%rdi
pop    %rax
jmp    1030 <err_exit@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"_setregid\00"
define void @_setregid(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i64 @setregid(i32 %5, i32 %6)
%8 = icmp slt i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 @err_exit(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"_setregid\00"
define void @_setregid(i32 %0, i32 %1) {
%3 = tail call i64 @setregid(i32 %0, i32 %1)
%4 = icmp slt i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @err_exit(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret void
}
/* Type definitions */
struct forf_env {
  int dummy;
};

/* Variables and functions */
long forf_pop_num(struct forf_env *);
int /*<<< orphan*/ forf_push_num(struct forf_env *, long);
void forf_proc_rshift(struct forf_env *env) {
  long a = forf_pop_num(env);
  long b = forf_pop_num(env);
  forf_push_num(env, b >> a);
}


x86 assembly (clang, -O0):
<forf_proc_rshift>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <forf_pop_num@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <forf_pop_num@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x10(%rbp),%rcx
sar    %cl,%rsi
call   1040 <forf_push_num@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<forf_proc_rshift>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <forf_pop_num@plt>
mov    %rax,%r14
mov    %rbx,%rdi
call   1030 <forf_pop_num@plt>
mov    %r14d,%ecx
sar    %cl,%rax
mov    %rbx,%rdi
mov    %rax,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <forf_push_num@plt>

LLVM IR (-O0):
%struct.forf_env = type { i32 }
define void @forf_proc_rshift(%struct.forf_env* %0) {
%2 = alloca %struct.forf_env*
%3 = alloca i64
%4 = alloca i64
store %struct.forf_env* %0, %struct.forf_env** %2
%5 = load %struct.forf_env*, %struct.forf_env** %2
%6 = call i64 @forf_pop_num(%struct.forf_env* %5)
store i64 %6, i64* %3
%7 = load %struct.forf_env*, %struct.forf_env** %2
%8 = call i64 @forf_pop_num(%struct.forf_env* %7)
store i64 %8, i64* %4
%9 = load %struct.forf_env*, %struct.forf_env** %2
%10 = load i64, i64* %4
%11 = load i64, i64* %3
%12 = ashr i64 %10, %11
%13 = call i32 @forf_push_num(%struct.forf_env* %9, i64 %12)
ret void
}

LLVM IR (-O2):
%struct.forf_env = type { i32 }
define void @forf_proc_rshift(%struct.forf_env* %0) {
%2 = tail call i64 @forf_pop_num(%struct.forf_env* %0)
%3 = tail call i64 @forf_pop_num(%struct.forf_env* %0)
%4 = ashr i64 %3, %2
%5 = tail call i32 @forf_push_num(%struct.forf_env* %0, i64 %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ enum_t;
typedef int /*<<< orphan*/ bool_t;
typedef int /*<<< orphan*/ XDR;

/* Variables and functions */
int /*<<< orphan*/ xdr_long(int /*<<< orphan*/ *, long *);
bool_t xdr_enum(XDR *xdrs, enum_t *ep) { return (xdr_long(xdrs, (long *)ep)); }


x86 assembly (clang, -O0):
<xdr_enum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <xdr_long@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xdr_enum>:
jmp    1030 <xdr_long@plt>

LLVM IR (-O0):
define i32 @xdr_enum(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = bitcast i32* %6 to i64*
%8 = call i32 @xdr_long(i32* %5, i64* %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @xdr_enum(i32* %0, i32* %1) {
%3 = bitcast i32* %1 to i64*
%4 = tail call i32 @xdr_long(i32* %0, i64* %3)
ret i32 %4
}
/* Type definitions */
struct t_dogelist {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ dogelist_remove_all(struct t_dogelist *);
int /*<<< orphan*/ free(struct t_dogelist *);
void dogelist_free(struct t_dogelist *dogelist) {
  if (!dogelist)
    return;
  dogelist_remove_all(dogelist);
  free(dogelist);
}


x86 assembly (clang, -O0):
<dogelist_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113c <dogelist_free+0x1c>
jmp    114e <dogelist_free+0x2e>
mov    -0x8(%rbp),%rdi
call   1040 <dogelist_remove_all@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dogelist_free>:
test   %rdi,%rdi
je     1137 <dogelist_free+0x17>
push   %rbx
mov    %rdi,%rbx
call   1040 <dogelist_remove_all@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
%struct.t_dogelist = type { i32 }
define void @dogelist_free(%struct.t_dogelist* %0) {
%2 = alloca %struct.t_dogelist*
store %struct.t_dogelist* %0, %struct.t_dogelist** %2
%3 = load %struct.t_dogelist*, %struct.t_dogelist** %2
%4 = icmp ne %struct.t_dogelist* %3, null
br i1 %4, label %6, label %5
5: ; preds = %1
br label %11
6: ; preds = %1
%7 = load %struct.t_dogelist*, %struct.t_dogelist** %2
%8 = call i32 @dogelist_remove_all(%struct.t_dogelist* %7)
%9 = load %struct.t_dogelist*, %struct.t_dogelist** %2
%10 = call i32 @free(%struct.t_dogelist* %9)
br label %11
11: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
%struct.t_dogelist = type { i32 }
define void @dogelist_free(%struct.t_dogelist* %0) {
%2 = icmp eq %struct.t_dogelist* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i32 @dogelist_remove_all(%struct.t_dogelist* %0)
%5 = tail call i32 @free(%struct.t_dogelist* %0)
br label %6
6: ; preds = %1, %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;
struct tcphdr {
  int /*<<< orphan*/ source;
};

/* Variables and functions */
uint16_t _tcphdr_source(struct tcphdr *h) { return h->source; }


x86 assembly (clang, -O0):
<_tcphdr_source>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_tcphdr_source>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.tcphdr = type { i32 }
define i32 @_tcphdr_source(%struct.tcphdr* %0) {
%2 = alloca %struct.tcphdr*
store %struct.tcphdr* %0, %struct.tcphdr** %2
%3 = load %struct.tcphdr*, %struct.tcphdr** %2
%4 = getelementptr inbounds %struct.tcphdr, %struct.tcphdr* %3, i32 0, i32 0
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
%struct.tcphdr = type { i32 }
define i32 @_tcphdr_source(%struct.tcphdr* nocapture %0) {
%2 = getelementptr inbounds %struct.tcphdr, %struct.tcphdr* %0, i64 0, i32 0
%3 = load i32, i32* %2
ret i32 %3
}
unsigned xrop3_36_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk1 = S ^ T;
  stk2 = D ^ S;
  stk1 = stk1 & stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_36_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_36_1_1>:
mov    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_36_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %6
%23 = load i32, i32* %7
%24 = xor i32 %22, %23
store i32 %24, i32* %8
%25 = load i32, i32* %5
%26 = load i32, i32* %6
%27 = xor i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %8
%29 = load i32, i32* %9
%30 = and i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = load i32, i32* %6
%33 = xor i32 %32, -1
%34 = and i32 %31, %33
%35 = load i32, i32* %7
%36 = xor i32 %35, -1
%37 = and i32 %34, %36
%38 = load i32, i32* %5
%39 = load i32, i32* %6
%40 = and i32 %38, %39
%41 = or i32 %37, %40
%42 = load i32, i32* %5
%43 = load i32, i32* %7
%44 = and i32 %42, %43
%45 = or i32 %41, %44
ret i32 %45
}

LLVM IR (-O2):
define i32 @xrop3_36_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = or i8 %1, %0
%4 = zext i8 %3 to i32
ret i32 %4
}
void test_min_with_positive_numbers(void) {
  do {
    seatest_assert_int_equal(56, ({
                               typeof(56) _a = (56);
                               typeof(82) _b = (82);
                               (_a < _b) ? _a : _b;
                             }),
                             __FUNCTION__, 16);
  } while (0);
}


x86 assembly (clang, -O0):
<test_min_with_positive_numbers>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x38,-0x4(%rbp)
movl   $0x52,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    113d <test_min_with_positive_numbers+0x2d>
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1143 <test_min_with_positive_numbers+0x33>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
mov    $0x38,%edi
lea    0xea8(%rip),%rdx
mov    $0x10,%ecx
mov    $0x0,%al
call   1030 <seatest_assert_int_equal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_min_with_positive_numbers>:
lea    0xee9(%rip),%rdx
mov    $0x38,%edi
mov    $0x38,%esi
mov    $0x10,%ecx
xor    %eax,%eax
jmp    1030 <seatest_assert_int_equal@plt>

LLVM IR (-O0):
@__FUNCTION__.test_min_with_positive_numbers = [31 x i8] c"test_min_with_positive_numbers\00"
define void @test_min_with_positive_numbers() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
br label %4
4: ; preds = %0
store i32 56, i32* %1
store i32 82, i32* %2
%5 = load i32, i32* %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %4
%9 = load i32, i32* %1
br label %12
10: ; preds = %4
%11 = load i32, i32* %2
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
store i32 %13, i32* %3
%14 = load i32, i32* %3
%15 = call i32 (i32, i32, i8*, i32, ...) bitcast (i32 (...)* @seatest_assert_int_equal to i32 (i32, i32, i8*, i32, ...)*)(i32 56, i32 %14, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @__FUNCTION__.test_min_with_positive_numbers, i64 0, i64 0), i32 16)
br label %16
16: ; preds = %12
ret void
}

LLVM IR (-O2):
@__FUNCTION__.test_min_with_positive_numbers = [31 x i8] c"test_min_with_positive_numbers\00"
define void @test_min_with_positive_numbers() {
%1 = tail call i32 (i32, i32, i8*, i32, ...) bitcast (i32 (...)* @seatest_assert_int_equal to i32 (i32, i32, i8*, i32, ...)*)(i32 56, i32 56, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @__FUNCTION__.test_min_with_positive_numbers, i64 0, i64 0), i32 16)
ret void
}
int store_encrypted_secret(char *esecret) { return 1; }


x86 assembly (clang, -O0):
<store_encrypted_secret>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<store_encrypted_secret>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @store_encrypted_secret(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @store_encrypted_secret(i8* nocapture readnone %0) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ print_status(int, char const *);
int /*<<< orphan*/ stdout;
void exit_status(int n, const char *text) {
  print_status(n, text);
  fputs("Content-Type: text/plain\r\n\r\n", stdout);
  exit(0);
}


x86 assembly (clang, -O0):
<exit_status>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <print_status@plt>
mov    0x2e8e(%rip),%rax
mov    (%rax),%esi
lea    0xea5(%rip),%rdi
call   1030 <fputs@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<exit_status>:
push   %rax
call   1040 <print_status@plt>
mov    0x2ea3(%rip),%rax
mov    (%rax),%esi
lea    0xeba(%rip),%rdi
call   1030 <fputs@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"Content-Type: text/plain\0D\0A\0D\0A\00"
@stdout = global i32 0
define void @exit_status(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i32 @print_status(i32 %5, i8* %6)
%8 = load i32, i32* @stdout
%9 = call i32 @fputs(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %8)
%10 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [29 x i8] c"Content-Type: text/plain\0D\0A\0D\0A\00"
@stdout = global i32 0
define void @exit_status(i32 %0, i8* %1) {
%3 = tail call i32 @print_status(i32 %0, i8* %1)
%4 = load i32, i32* @stdout
%5 = tail call i32 @fputs(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
void *__arch_fetch_and_add_ptr(void **, long);
void *fetch_and_add_ptr(void **pointer, long int delta) {
  return __arch_fetch_and_add_ptr(pointer, delta);
}


x86 assembly (clang, -O0):
<fetch_and_add_ptr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <__arch_fetch_and_add_ptr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fetch_and_add_ptr>:
jmp    1030 <__arch_fetch_and_add_ptr@plt>

LLVM IR (-O0):
define i8* @fetch_and_add_ptr(i8** %0, i64 %1) {
%3 = alloca i8**
%4 = alloca i64
store i8** %0, i8*** %3
store i64 %1, i64* %4
%5 = load i8**, i8*** %3
%6 = load i64, i64* %4
%7 = call i8* @__arch_fetch_and_add_ptr(i8** %5, i64 %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @fetch_and_add_ptr(i8** %0, i64 %1) {
%3 = tail call i8* @__arch_fetch_and_add_ptr(i8** %0, i64 %1)
ret i8* %3
}
int execute_setresgid() { return 0; }


x86 assembly (clang, -O0):
<execute_setresgid>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_setresgid>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_setresgid() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_setresgid() {
ret i32 0
}
void f(unsigned int m) {
  int e[2][m];
  e[0][0] = 0;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
mov    %rsp,%rax
mov    %rax,-0x10(%rbp)
lea    0xf(,%rcx,8),%rdx
and    $0xfffffffffffffff0,%rdx
mov    %rsp,%rax
sub    %rdx,%rax
mov    %rax,%rsp
mov    %rcx,-0x18(%rbp)
imul   $0x0,%rcx,%rcx
movl   $0x0,(%rax,%rcx,4)
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
ret

LLVM IR (-O0):
define void @f(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i64
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
%7 = call i8* @llvm.stacksave()
store i8* %7, i8** %3
%8 = mul nuw i64 2, %6
%9 = alloca i32, i64 %8
store i64 %6, i64* %4
%10 = mul nsw i64 0, %6
%11 = getelementptr inbounds i32, i32* %9, i64 %10
%12 = getelementptr inbounds i32, i32* %11, i64 0
store i32 0, i32* %12
%13 = load i8*, i8** %3
ret void
}

LLVM IR (-O2):
define void @f(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TKSPI_ChipSel(int /*<<< orphan*/);
int /*<<< orphan*/ TKSPI_Deselect();
scalar_t__ TKSPI_WaitReady();
int TKSPI_Select(void) {
  TKSPI_ChipSel(0);
  if (TKSPI_WaitReady())
    return (1);
  TKSPI_Deselect();
  return (0);
}


x86 assembly (clang, -O0):
<TKSPI_Select>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
call   1030 <TKSPI_ChipSel@plt>
mov    $0x0,%al
call   1040 <TKSPI_WaitReady@plt>
cmp    $0x0,%rax
je     115c <TKSPI_Select+0x2c>
movl   $0x1,-0x4(%rbp)
jmp    116a <TKSPI_Select+0x3a>
mov    $0x0,%al
call   1050 <TKSPI_Deselect@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TKSPI_Select>:
push   %rax
xor    %edi,%edi
call   1030 <TKSPI_ChipSel@plt>
xor    %eax,%eax
call   1040 <TKSPI_WaitReady@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     114e <TKSPI_Select+0x1e>
pop    %rcx
ret
xor    %eax,%eax
call   1050 <TKSPI_Deselect@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @TKSPI_Select() {
%1 = alloca i32
%2 = call i32 @TKSPI_ChipSel(i32 0)
%3 = call i64 (...) @TKSPI_WaitReady()
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %0
store i32 1, i32* %1
br label %8
6: ; preds = %0
%7 = call i32 (...) @TKSPI_Deselect()
store i32 0, i32* %1
br label %8
8: ; preds = %6, %5
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
define i32 @TKSPI_Select() {
%1 = tail call i32 @TKSPI_ChipSel(i32 0)
%2 = tail call i64 (...) @TKSPI_WaitReady()
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = tail call i32 (...) @TKSPI_Deselect()
br label %6
6: ; preds = %0, %4
%7 = phi i32 [ 0, %4 ], [ 1, %0 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
int /*<<< orphan*/ scanf(char *, char *);
int main() {
  char letter, b;
  scanf("%c", &letter);
  b = 'a' + 'z' - letter;
  printf("\n%c", b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xecb(%rip),%rdi
lea    -0x5(%rbp),%rsi
call   1040 <scanf@plt>
movsbl -0x5(%rbp),%ecx
mov    $0xdb,%eax
sub    %ecx,%eax
mov    %al,-0x6(%rbp)
lea    0xeac(%rip),%rdi
movsbl -0x6(%rbp),%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed9(%rip),%rdi
lea    0x7(%rsp),%rsi
call   1040 <scanf@plt>
mov    $0xdb,%al
sub    0x7(%rsp),%al
movsbl %al,%esi
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
@.str.1 = [4 x i8] c"\0A%c\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i8
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %2)
%5 = load i8, i8* %2
%6 = sext i8 %5 to i32
%7 = sub nsw i32 219, %6
%8 = trunc i32 %7 to i8
store i8 %8, i8* %3
%9 = load i8, i8* %3
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8 signext %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
@.str.1 = [4 x i8] c"\0A%c\00"
define i32 @main() {
%1 = alloca i8
%2 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %1)
%3 = load i8, i8* %1
%4 = sub i8 -37, %3
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8 signext %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ write(int, char *, int);
int main() {
  write(4, "ok", 2);
  printf("%m\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4,%edi
lea    0xec5(%rip),%rsi
mov    $0x2,%edx
call   1030 <write@plt>
lea    0xeb7(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rsi
mov    $0x4,%edi
mov    $0x2,%edx
call   1030 <write@plt>
lea    0xec5(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"ok\00"
@.str.1 = [4 x i8] c"%m\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @write(i32 4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 2)
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"ok\00"
@.str.1 = [4 x i8] c"%m\0A\00"
define i32 @main() {
%1 = tail call i32 @write(i32 4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 2)
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}