#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int get_cputype(int);
int get_vendor();
int /*<<< orphan*/ have_cpuid();
int get_coretype(void) {
  int family, exfamily, model, exmodel, vendor;
  if (!have_cpuid())
    return 1;
  family = get_cputype(4);
  exfamily = get_cputype(1);
  model = get_cputype(5);
  exmodel = get_cputype(2);
  vendor = get_vendor();
  if (vendor == 1) {
    switch (family) {
    case 4:
      return 1;
    case 5:
      return 2;
    case 6:
      switch (exmodel) {
      case 0:
        switch (model) {
        case 0:
        case 1:
        case 2:
        case 3:
        case 4:
        case 5:
        case 6:
          return 3;
        case 7:
          return 4;
        case 8:
        case 10:
        case 11:
          return 5;
        case 9:
        case 13:
        case 14:
          return 8;
        case 15:
          return 14;
        }
        break;
      case 1:
        switch (model) {
        case 6:
          return 14;
        case 7:
          return 15;
        case 10:
        case 11:
        case 14:
        case 15:
          return 17;
        case 12:
          return 18;
        case 13:
          return 16;
        }
        break;
      case 2:
        switch (model) {
        case 5:
          return 17;
        case 10:
          return 17;
        case 12:
          return 17;
        case 13:
          return 17;
        case 15:
          return 17;
        }
        break;
      }
      break;
    case 15:
      if (model <= 0x2)
        return 6;
      else
        return 7;
    }
  }
  if (vendor == 3) {
    if (family <= 0x5)
      return 1;
    if (family <= 0xe)
      return 9;
    if (family == 0xf) {
      if ((exfamily == 0) || (exfamily == 2))
        return 10;
      else
        return 11;
    }
  }
  if (vendor == 6) {
    switch (family) {
    case 0x6:
      return 19;
      break;
    }
    return 12;
  }
  return 0;
}


x86 assembly (clang, -O0):
<get_coretype>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    $0x0,%al
call   1050 <have_cpuid@plt>
cmp    $0x0,%eax
jne    1154 <get_coretype+0x24>
movl   $0x1,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
mov    $0x4,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x8(%rbp)
mov    $0x1,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0xc(%rbp)
mov    $0x5,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x10(%rbp)
mov    $0x2,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1040 <get_vendor@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x1,-0x18(%rbp)
jne    1378 <get_coretype+0x248>
mov    -0x8(%rbp),%eax
add    $0xfffffffc,%eax
mov    %eax,%ecx
mov    %rcx,-0x20(%rbp)
sub    $0xb,%eax
ja     1373 <get_coretype+0x243>
mov    -0x20(%rbp),%rax
lea    0xe44(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
movl   $0x2,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
mov    -0x14(%rbp),%eax
mov    %eax,-0x24(%rbp)
test   %eax,%eax
je     1212 <get_coretype+0xe2>
jmp    11f0 <get_coretype+0xc0>
mov    -0x24(%rbp),%eax
sub    $0x1,%eax
je     1278 <get_coretype+0x148>
jmp    1201 <get_coretype+0xd1>
mov    -0x24(%rbp),%eax
sub    $0x2,%eax
je     12e2 <get_coretype+0x1b2>
jmp    134c <get_coretype+0x21c>
mov    -0x10(%rbp),%eax
mov    %rax,-0x30(%rbp)
sub    $0xf,%rax
ja     1273 <get_coretype+0x143>
mov    -0x30(%rbp),%rax
lea    0xe56(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x3,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
movl   $0x4,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
movl   $0x5,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
movl   $0x8,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
movl   $0xe,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
jmp    134c <get_coretype+0x21c>
mov    -0x10(%rbp),%eax
add    $0xfffffffa,%eax
mov    %eax,%ecx
mov    %rcx,-0x38(%rbp)
sub    $0x9,%eax
ja     12dd <get_coretype+0x1ad>
mov    -0x38(%rbp),%rax
lea    0xdc4(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0xe,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
movl   $0xf,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
movl   $0x11,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
movl   $0x12,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
movl   $0x10,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
jmp    134c <get_coretype+0x21c>
mov    -0x10(%rbp),%eax
add    $0xfffffffb,%eax
mov    %eax,%ecx
mov    %rcx,-0x40(%rbp)
sub    $0xa,%eax
ja     1347 <get_coretype+0x217>
mov    -0x40(%rbp),%rax
lea    0xd2e(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x11,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
movl   $0x11,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
movl   $0x11,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
movl   $0x11,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
movl   $0x11,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
jmp    134c <get_coretype+0x21c>
jmp    1373 <get_coretype+0x243>
cmpl   $0x2,-0x10(%rbp)
jg     1367 <get_coretype+0x237>
movl   $0x6,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
movl   $0x7,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
jmp    1378 <get_coretype+0x248>
cmpl   $0x3,-0x18(%rbp)
jne    13e9 <get_coretype+0x2b9>
cmpl   $0x5,-0x8(%rbp)
jg     1398 <get_coretype+0x268>
movl   $0x1,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
cmpl   $0xe,-0x8(%rbp)
jg     13ae <get_coretype+0x27e>
movl   $0x9,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
cmpl   $0xf,-0x8(%rbp)
jne    13e4 <get_coretype+0x2b4>
cmpl   $0x0,-0xc(%rbp)
je     13cc <get_coretype+0x29c>
cmpl   $0x2,-0xc(%rbp)
jne    13d8 <get_coretype+0x2a8>
movl   $0xa,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
movl   $0xb,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
jmp    13e9 <get_coretype+0x2b9>
cmpl   $0x6,-0x18(%rbp)
jne    141c <get_coretype+0x2ec>
mov    -0x8(%rbp),%eax
sub    $0x6,%eax
jne    1410 <get_coretype+0x2e0>
jmp    1404 <get_coretype+0x2d4>
movl   $0x13,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
movl   $0xc,-0x4(%rbp)
jmp    1423 <get_coretype+0x2f3>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_coretype>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1050 <have_cpuid@plt>
test   %eax,%eax
je     11bd <get_coretype+0x8d>
mov    $0x4,%edi
call   1030 <get_cputype@plt>
mov    %eax,%ebp
mov    $0x1,%edi
call   1030 <get_cputype@plt>
mov    %eax,%r15d
mov    $0x5,%edi
call   1030 <get_cputype@plt>
mov    %eax,%r14d
mov    $0x2,%edi
call   1030 <get_cputype@plt>
mov    %eax,%r12d
xor    %eax,%eax
call   1040 <get_vendor@plt>
cmp    $0x6,%eax
je     11c7 <get_coretype+0x97>
cmp    $0x3,%eax
je     11dc <get_coretype+0xac>
cmp    $0x1,%eax
jne    126f <get_coretype+0x13f>
add    $0xfffffffc,%ebp
cmp    $0xb,%ebp
ja     126d <get_coretype+0x13d>
mov    $0x1,%ebx
lea    0xe56(%rip),%rax
movslq (%rax,%rbp,4),%rcx
add    %rax,%rcx
jmp    *%rcx
mov    $0x2,%ebx
jmp    126f <get_coretype+0x13f>
mov    $0x1,%ebx
jmp    126f <get_coretype+0x13f>
cmp    $0x6,%ebp
mov    $0x13,%eax
mov    $0xc,%ebx
cmove  %eax,%ebx
jmp    126f <get_coretype+0x13f>
mov    $0x1,%ebx
cmp    $0x6,%ebp
jl     126f <get_coretype+0x13f>
mov    $0x9,%ebx
cmp    $0xf,%ebp
jb     126f <get_coretype+0x13f>
mov    $0x0,%ebx
jne    126f <get_coretype+0x13f>
and    $0xfffffffd,%r15d
cmp    $0x1,%r15d
mov    $0xb,%ebx
sbb    $0x0,%ebx
jmp    126f <get_coretype+0x13f>
cmp    $0x2,%r12d
je     123e <get_coretype+0x10e>
cmp    $0x1,%r12d
je     1254 <get_coretype+0x124>
test   %r12d,%r12d
jne    126d <get_coretype+0x13d>
cmp    $0x10,%r14d
jae    126d <get_coretype+0x13d>
movslq %r14d,%rax
lea    0xe02(%rip),%rcx
jmp    1268 <get_coretype+0x138>
xor    %ebx,%ebx
cmp    $0x3,%r14d
setl   %bl
xor    $0x7,%ebx
jmp    126f <get_coretype+0x13f>
add    $0xfffffffb,%r14d
cmp    $0xb,%r14d
jae    126d <get_coretype+0x13d>
movslq %r14d,%rax
lea    0xe46(%rip),%rcx
jmp    1268 <get_coretype+0x138>
add    $0xfffffffa,%r14d
cmp    $0xa,%r14d
jae    126d <get_coretype+0x13d>
movslq %r14d,%rax
lea    0xe08(%rip),%rcx
mov    (%rcx,%rax,4),%ebx
jmp    126f <get_coretype+0x13f>
xor    %ebx,%ebx
mov    %ebx,%eax
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @get_coretype() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = call i32 (...) @have_cpuid()
%8 = icmp ne i32 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %0
store i32 1, i32* %1
br label %86
10: ; preds = %0
%11 = call i32 @get_cputype(i32 4)
store i32 %11, i32* %2
%12 = call i32 @get_cputype(i32 1)
store i32 %12, i32* %3
%13 = call i32 @get_cputype(i32 5)
store i32 %13, i32* %4
%14 = call i32 @get_cputype(i32 2)
store i32 %14, i32* %5
%15 = call i32 (...) @get_vendor()
store i32 %15, i32* %6
%16 = load i32, i32* %6
%17 = icmp eq i32 %16, 1
br i1 %17, label %18, label %55
18: ; preds = %10
%19 = load i32, i32* %2
switch i32 %19, label %54 [
i32 4, label %20
i32 5, label %21
i32 6, label %22
i32 15, label %49
]
20: ; preds = %18
store i32 1, i32* %1
br label %86
21: ; preds = %18
store i32 2, i32* %1
br label %86
22: ; preds = %18
%23 = load i32, i32* %5
switch i32 %23, label %48 [
i32 0, label %24
i32 1, label %32
i32 2, label %40
]
24: ; preds = %22
%25 = load i32, i32* %4
switch i32 %25, label %31 [
i32 0, label %26
i32 1, label %26
i32 2, label %26
i32 3, label %26
i32 4, label %26
i32 5, label %26
i32 6, label %26
i32 7, label %27
i32 8, label %28
i32 10, label %28
i32 11, label %28
i32 9, label %29
i32 13, label %29
i32 14, label %29
i32 15, label %30
]
26: ; preds = %24, %24, %24, %24, %24, %24, %24
store i32 3, i32* %1
br label %86
27: ; preds = %24
store i32 4, i32* %1
br label %86
28: ; preds = %24, %24, %24
store i32 5, i32* %1
br label %86
29: ; preds = %24, %24, %24
store i32 8, i32* %1
br label %86
30: ; preds = %24
store i32 14, i32* %1
br label %86
31: ; preds = %24
br label %48
32: ; preds = %22
%33 = load i32, i32* %4
switch i32 %33, label %39 [
i32 6, label %34
i32 7, label %35
i32 10, label %36
i32 11, label %36
i32 14, label %36
i32 15, label %36
i32 12, label %37
i32 13, label %38
]
34: ; preds = %32
store i32 14, i32* %1
br label %86
35: ; preds = %32
store i32 15, i32* %1
br label %86
36: ; preds = %32, %32, %32, %32
store i32 17, i32* %1
br label %86
37: ; preds = %32
store i32 18, i32* %1
br label %86
38: ; preds = %32
store i32 16, i32* %1
br label %86
39: ; preds = %32
br label %48
40: ; preds = %22
%41 = load i32, i32* %4
switch i32 %41, label %47 [
i32 5, label %42
i32 10, label %43
i32 12, label %44
i32 13, label %45
i32 15, label %46
]
42: ; preds = %40
store i32 17, i32* %1
br label %86
43: ; preds = %40
store i32 17, i32* %1
br label %86
44: ; preds = %40
store i32 17, i32* %1
br label %86
45: ; preds = %40
store i32 17, i32* %1
br label %86
46: ; preds = %40
store i32 17, i32* %1
br label %86
47: ; preds = %40
br label %48
48: ; preds = %22, %47, %39, %31
br label %54
49: ; preds = %18
%50 = load i32, i32* %4
%51 = icmp sle i32 %50, 2
br i1 %51, label %52, label %53
52: ; preds = %49
store i32 6, i32* %1
br label %86
53: ; preds = %49
store i32 7, i32* %1
br label %86
54: ; preds = %18, %48
br label %55
55: ; preds = %54, %10
%56 = load i32, i32* %6
%57 = icmp eq i32 %56, 3
br i1 %57, label %58, label %78
58: ; preds = %55
%59 = load i32, i32* %2
%60 = icmp sle i32 %59, 5
br i1 %60, label %61, label %62
61: ; preds = %58
store i32 1, i32* %1
br label %86
62: ; preds = %58
%63 = load i32, i32* %2
%64 = icmp sle i32 %63, 14
br i1 %64, label %65, label %66
65: ; preds = %62
store i32 9, i32* %1
br label %86
66: ; preds = %62
%67 = load i32, i32* %2
%68 = icmp eq i32 %67, 15
br i1 %68, label %69, label %77
69: ; preds = %66
%70 = load i32, i32* %3
%71 = icmp eq i32 %70, 0
br i1 %71, label %75, label %72
72: ; preds = %69
%73 = load i32, i32* %3
%74 = icmp eq i32 %73, 2
br i1 %74, label %75, label %76
75: ; preds = %72, %69
store i32 10, i32* %1
br label %86
76: ; preds = %72
store i32 11, i32* %1
br label %86
77: ; preds = %66
br label %78
78: ; preds = %77, %55
%79 = load i32, i32* %6
%80 = icmp eq i32 %79, 6
br i1 %80, label %81, label %85
81: ; preds = %78
%82 = load i32, i32* %2
switch i32 %82, label %84 [
i32 6, label %83
]
83: ; preds = %81
store i32 19, i32* %1
br label %86
84: ; preds = %81
store i32 12, i32* %1
br label %86
85: ; preds = %78
store i32 0, i32* %1
br label %86
86: ; preds = %85, %84, %83, %76, %75, %65, %61, %53, %52, %46, %45, %44, %43, %42, %38, %37, %36, %35, %34, %30, %29, %28, %27, %26, %21, %20, %9
%87 = load i32, i32* %1
ret i32 %87
}

LLVM IR (-O2):
@switch.table.get_coretype = [16 x i32] [i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 4, i32 5, i32 8, i32 5, i32 5, i32 0, i32 8, i32 8, i32 14]
@switch.table.get_coretype.1 = [10 x i32] [i32 14, i32 15, i32 0, i32 0, i32 17, i32 17, i32 18, i32 16, i32 17, i32 17]
@switch.table.get_coretype.2 = [11 x i32] [i32 17, i32 0, i32 0, i32 0, i32 0, i32 17, i32 0, i32 17, i32 17, i32 0, i32 17]
define i32 @get_coretype() {
%1 = tail call i32 (...) @have_cpuid()
%2 = icmp eq i32 %1, 0
br i1 %2, label %49, label %3
3: ; preds = %0
%4 = tail call i32 @get_cputype(i32 4)
%5 = tail call i32 @get_cputype(i32 1)
%6 = tail call i32 @get_cputype(i32 5)
%7 = tail call i32 @get_cputype(i32 2)
%8 = tail call i32 (...) @get_vendor()
switch i32 %8, label %49 [
i32 1, label %9
i32 3, label %24
i32 6, label %34
]
9: ; preds = %3
switch i32 %4, label %23 [
i32 4, label %49
i32 5, label %10
i32 6, label %11
i32 15, label %20
]
10: ; preds = %9
br label %49
11: ; preds = %9
switch i32 %7, label %23 [
i32 0, label %12
i32 1, label %14
i32 2, label %17
]
12: ; preds = %11
%13 = icmp ult i32 %6, 16
br i1 %13, label %37, label %23
14: ; preds = %11
%15 = add i32 %6, -6
%16 = icmp ult i32 %15, 10
br i1 %16, label %41, label %23
17: ; preds = %11
%18 = add i32 %6, -5
%19 = icmp ult i32 %18, 11
br i1 %19, label %45, label %23
20: ; preds = %9
%21 = icmp slt i32 %6, 3
%22 = select i1 %21, i32 6, i32 7
br label %49
23: ; preds = %17, %14, %12, %9, %11
br label %49
24: ; preds = %3
%25 = icmp slt i32 %4, 6
br i1 %25, label %49, label %26
26: ; preds = %24
%27 = icmp ult i32 %4, 15
br i1 %27, label %49, label %28
28: ; preds = %26
%29 = icmp eq i32 %4, 15
br i1 %29, label %30, label %49
30: ; preds = %28
%31 = and i32 %5, -3
%32 = icmp eq i32 %31, 0
%33 = select i1 %32, i32 10, i32 11
br label %49
34: ; preds = %3
%35 = icmp eq i32 %4, 6
%36 = select i1 %35, i32 19, i32 12
br label %49
37: ; preds = %12
%38 = sext i32 %6 to i64
%39 = getelementptr inbounds [16 x i32], [16 x i32]* @switch.table.get_coretype, i64 0, i64 %38
%40 = load i32, i32* %39
br label %49
41: ; preds = %14
%42 = sext i32 %15 to i64
%43 = getelementptr inbounds [10 x i32], [10 x i32]* @switch.table.get_coretype.1, i64 0, i64 %42
%44 = load i32, i32* %43
br label %49
45: ; preds = %17
%46 = sext i32 %18 to i64
%47 = getelementptr inbounds [11 x i32], [11 x i32]* @switch.table.get_coretype.2, i64 0, i64 %46
%48 = load i32, i32* %47
br label %49
49: ; preds = %45, %41, %37, %28, %23, %3, %34, %30, %26, %24, %20, %9, %0, %10
%50 = phi i32 [ 2, %10 ], [ 1, %0 ], [ 1, %9 ], [ %22, %20 ], [ 1, %24 ], [ 9, %26 ], [ %33, %30 ], [ %36, %34 ], [ 0, %3 ], [ 0, %23 ], [ 0, %28 ], [ %40, %37 ], [ %44, %41 ], [ %48, %45 ]
ret i32 %50
}