xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, void const *, unsigned int);
void append(void *dst, unsigned *dstlen, const void *src, unsigned srclen) {
  memcpy((char *)dst + *dstlen, src, srclen);
  *dstlen += srclen;
}


x86 assembly (clang, -O0):
<append>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
add    %rax,%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <memcpy@plt>
mov    -0x1c(%rbp),%ecx
mov    -0x10(%rbp),%rax
add    (%rax),%ecx
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<append>:
push   %rbp
push   %rbx
push   %rax
mov    %ecx,%ebp
mov    %rsi,%rbx
mov    (%rsi),%eax
add    %rax,%rdi
mov    %rdx,%rsi
mov    %ecx,%edx
call   1030 <memcpy@plt>
add    %ebp,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @append(i8* %0, i32* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i32* %1, i32** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i32*, i32** %6
%11 = load i32, i32* %10
%12 = zext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %9, i64 %12
%14 = load i8*, i8** %7
%15 = load i32, i32* %8
%16 = call i32 @memcpy(i8* %13, i8* %14, i32 %15)
%17 = load i32, i32* %8
%18 = load i32*, i32** %6
%19 = load i32, i32* %18
%20 = add i32 %19, %17
store i32 %20, i32* %18
ret void
}

LLVM IR (-O2):
define void @append(i8* %0, i32* nocapture %1, i8* %2, i32 %3) {
%5 = load i32, i32* %1
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = tail call i32 @memcpy(i8* %7, i8* %2, i32 %3)
%9 = load i32, i32* %1
%10 = add i32 %9, %3
store i32 %10, i32* %1
ret void
}
int test_imm_FDint64_highword_mem(long long *val) {
  return ((*val >> 32) & (0xFD << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FDint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x20,%rdx
and    $0xfd,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FDint64_highword_mem>:
testb  $0xfd,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FDint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 32
%6 = and i64 %5, 253
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_FDint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 1086626725888
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void _M2_M2RTS_finish(__attribute__((unused)) int argc,
                      __attribute__((unused)) char *argv[]) {}


x86 assembly (clang, -O0):
<_M2_M2RTS_finish>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_M2_M2RTS_finish>:
ret

LLVM IR (-O0):
define void @_M2_M2RTS_finish(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret void
}

LLVM IR (-O2):
define void @_M2_M2RTS_finish(i32 %0, i8** nocapture %1) {
ret void
}
/* Variables and functions */
bool nrf52_errata_77(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_77>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_77>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_77() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_77() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
char getc(int /*<<< orphan*/ *);
char endian_little_read_8(FILE *fp) { return (getc(fp)); }


x86 assembly (clang, -O0):
<endian_little_read_8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getc@plt>
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<endian_little_read_8>:
jmp    1030 <getc@plt>

LLVM IR (-O0):
define signext i8 @endian_little_read_8(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call signext i8 @getc(i32* %3)
ret i8 %4
}

LLVM IR (-O2):
define signext i8 @endian_little_read_8(i32* nocapture %0) {
%2 = tail call signext i8 @getc(i32* %0)
ret i8 %2
}
/* Variables and functions */
int isdigit(unsigned char c) { return (c >= '0' && c <= '9'); }


x86 assembly (clang, -O0):
<isdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <isdigit+0x29>
movzbl -0x1(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isdigit>:
add    $0xd0,%dil
xor    %eax,%eax
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @isdigit(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = zext i8 %7 to i32
%9 = icmp sle i32 %8, 57
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @isdigit(i8 zeroext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
int isnuc(char nuc) {
  switch (nuc) {
  case 'A':
    return 1;
  case 'C':
    return 1;
  case 'G':
    return 1;
  case 'T':
    return 1;
  case 'U':
    return 1;
  case 'a':
    return 1;
  case 'c':
    return 1;
  case 'g':
    return 1;
  case 't':
    return 1;
  case 'u':
    return 1;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<isnuc>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
add    $0xffffffbf,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x34,%eax
ja     11ac <isnuc+0xac>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x4(%rbp)
jmp    11b3 <isnuc+0xb3>
movl   $0x1,-0x4(%rbp)
jmp    11b3 <isnuc+0xb3>
movl   $0x1,-0x4(%rbp)
jmp    11b3 <isnuc+0xb3>
movl   $0x1,-0x4(%rbp)
jmp    11b3 <isnuc+0xb3>
movl   $0x1,-0x4(%rbp)
jmp    11b3 <isnuc+0xb3>
movl   $0x1,-0x4(%rbp)
jmp    11b3 <isnuc+0xb3>
movl   $0x1,-0x4(%rbp)
jmp    11b3 <isnuc+0xb3>
movl   $0x1,-0x4(%rbp)
jmp    11b3 <isnuc+0xb3>
movl   $0x1,-0x4(%rbp)
jmp    11b3 <isnuc+0xb3>
movl   $0x1,-0x4(%rbp)
jmp    11b3 <isnuc+0xb3>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isnuc>:
add    $0xffffffbf,%edi
cmp    $0x34,%edi
ja     111e <isnuc+0x1e>
mov    $0x1,%eax
movabs $0x18004500180045,%rcx
bt     %rdi,%rcx
jae    111e <isnuc+0x1e>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isnuc(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %16 [
i32 65, label %6
i32 67, label %7
i32 71, label %8
i32 84, label %9
i32 85, label %10
i32 97, label %11
i32 99, label %12
i32 103, label %13
i32 116, label %14
i32 117, label %15
]
6: ; preds = %1
store i32 1, i32* %2
br label %17
7: ; preds = %1
store i32 1, i32* %2
br label %17
8: ; preds = %1
store i32 1, i32* %2
br label %17
9: ; preds = %1
store i32 1, i32* %2
br label %17
10: ; preds = %1
store i32 1, i32* %2
br label %17
11: ; preds = %1
store i32 1, i32* %2
br label %17
12: ; preds = %1
store i32 1, i32* %2
br label %17
13: ; preds = %1
store i32 1, i32* %2
br label %17
14: ; preds = %1
store i32 1, i32* %2
br label %17
15: ; preds = %1
store i32 1, i32* %2
br label %17
16: ; preds = %1
store i32 0, i32* %2
br label %17
17: ; preds = %16, %15, %14, %13, %12, %11, %10, %9, %8, %7, %6
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @isnuc(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %3 [
i32 65, label %4
i32 67, label %4
i32 71, label %4
i32 84, label %4
i32 85, label %4
i32 97, label %4
i32 99, label %4
i32 103, label %4
i32 116, label %4
i32 117, label %4
]
3: ; preds = %1
br label %4
4: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %3
%5 = phi i32 [ 0, %3 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %5
}
/* Variables and functions */
int RAND_bytes(void *, int);
extern int genrand(void *buf, int len) { return (RAND_bytes(buf, len)); }


x86 assembly (clang, -O0):
<genrand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <RAND_bytes@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genrand>:
jmp    1030 <RAND_bytes@plt>

LLVM IR (-O0):
define i32 @genrand(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @RAND_bytes(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @genrand(i8* %0, i32 %1) {
%3 = tail call i32 @RAND_bytes(i8* %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ test_Vector_append();
int /*<<< orphan*/ test_Vector_basics();
int /*<<< orphan*/ test_Vector_erase();
int /*<<< orphan*/ test_Vector_insert();
int /*<<< orphan*/ test_Vector_pop();
void test_Vector(void) {
  test_Vector_basics();
  test_Vector_append();
  test_Vector_insert();
  test_Vector_erase();
  test_Vector_pop();
}


x86 assembly (clang, -O0):
<test_Vector>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <test_Vector_basics@plt>
mov    $0x0,%al
call   1070 <test_Vector_append@plt>
mov    $0x0,%al
call   1060 <test_Vector_insert@plt>
mov    $0x0,%al
call   1030 <test_Vector_erase@plt>
mov    $0x0,%al
call   1040 <test_Vector_pop@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_Vector>:
push   %rax
xor    %eax,%eax
call   1050 <test_Vector_basics@plt>
xor    %eax,%eax
call   1070 <test_Vector_append@plt>
xor    %eax,%eax
call   1060 <test_Vector_insert@plt>
xor    %eax,%eax
call   1030 <test_Vector_erase@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <test_Vector_pop@plt>

LLVM IR (-O0):
define void @test_Vector() {
%1 = call i32 (...) @test_Vector_basics()
%2 = call i32 (...) @test_Vector_append()
%3 = call i32 (...) @test_Vector_insert()
%4 = call i32 (...) @test_Vector_erase()
%5 = call i32 (...) @test_Vector_pop()
ret void
}

LLVM IR (-O2):
define void @test_Vector() {
%1 = tail call i32 (...) @test_Vector_basics()
%2 = tail call i32 (...) @test_Vector_append()
%3 = tail call i32 (...) @test_Vector_insert()
%4 = tail call i32 (...) @test_Vector_erase()
%5 = tail call i32 (...) @test_Vector_pop()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void show_error() {
  fprintf(stderr, "Invalid parameters. \n"
                  "Please try \"mkres --help\""
                  " to get more informations.\n\n");
}


x86 assembly (clang, -O0):
<show_error>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_error>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [75 x i8] c"Invalid parameters. \0APlease try \22mkres --help\22 to get more informations.\0A\0A\00"
define void @show_error() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([75 x i8], [75 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [75 x i8] c"Invalid parameters. \0APlease try \22mkres --help\22 to get more informations.\0A\0A\00"
define void @show_error() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([75 x i8], [75 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ strcmp(char *, char *);
int equals(char *a, char *b) {
  if (b[0] == '\0' || strcmp(a, b) == 0)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<equals>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1147 <equals+0x37>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
jne    1153 <equals+0x43>
movl   $0x1,-0x4(%rbp)
jmp    115a <equals+0x4a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<equals>:
push   %rax
cmpb   $0x0,(%rsi)
je     1128 <equals+0x18>
call   1030 <strcmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
pop    %rcx
ret
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @equals(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %5
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 0
br i1 %10, label %16, label %11
11: ; preds = %2
%12 = load i8*, i8** %4
%13 = load i8*, i8** %5
%14 = call i64 @strcmp(i8* %12, i8* %13)
%15 = icmp eq i64 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %11, %2
store i32 1, i32* %3
br label %18
17: ; preds = %11
store i32 0, i32* %3
br label %18
18: ; preds = %17, %16
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @equals(i8* %0, i8* %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i64 @strcmp(i8* %0, i8* %1)
%7 = icmp eq i64 %6, 0
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %5, %2
%10 = phi i32 [ 1, %2 ], [ %8, %5 ]
ret i32 %10
}
struct C2 {
  double d;
  int i, j;
} h2() {
  return (struct C2){1, 2, 3};
}


x86 assembly (clang, -O0):
<h2>:
push   %rbp
mov    %rsp,%rbp
movabs $0x3ff0000000000000,%rax
mov    %rax,-0x10(%rbp)
movl   $0x2,-0x8(%rbp)
movl   $0x3,-0x4(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<h2>:
movsd  0xef8(%rip),%xmm0
movabs $0x300000002,%rax
ret

LLVM IR (-O0):
%struct.C2 = type { double, i32, i32 }
define { double, i64 } @h2() {
%1 = alloca %struct.C2
%2 = getelementptr inbounds %struct.C2, %struct.C2* %1, i32 0, i32 0
store double 1.000000e+00, double* %2
%3 = getelementptr inbounds %struct.C2, %struct.C2* %1, i32 0, i32 1
store i32 2, i32* %3
%4 = getelementptr inbounds %struct.C2, %struct.C2* %1, i32 0, i32 2
store i32 3, i32* %4
%5 = bitcast %struct.C2* %1 to { double, i64 }*
%6 = load { double, i64 }, { double, i64 }* %5
ret { double, i64 } %6
}

LLVM IR (-O2):
define { double, i64 } @h2() {
ret { double, i64 } { double 1.000000e+00, i64 12884901890 }
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, int);
void color_def(const char *name, int value) {
  printf("   %-16s : constant Color_Number := %d;\n", name, value);
}


x86 assembly (clang, -O0):
<color_def>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<color_def>:
mov    %esi,%edx
mov    %rdi,%rsi
lea    0xee4(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [41 x i8] c" %-16s : constant Color_Number := %d;\0A\00"
define void @color_def(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [41 x i8] c" %-16s : constant Color_Number := %d;\0A\00"
define void @color_def(i8* %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
ret void
}
/* Variables and functions */
int als_enable_write(int);
int als_enable(void) { return als_enable_write(1); }


x86 assembly (clang, -O0):
<als_enable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <als_enable_write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<als_enable>:
mov    $0x1,%edi
jmp    1030 <als_enable_write@plt>

LLVM IR (-O0):
define i32 @als_enable() {
%1 = call i32 @als_enable_write(i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @als_enable() {
%1 = tail call i32 @als_enable_write(i32 1)
ret i32 %1
}
/* Variables and functions */
int _pico_big_long(int src) {
  return ((src & 0xFF000000) >> 24) | ((src & 0x00FF0000) >> 8) |
         ((src & 0x0000FF00) << 8) | ((src & 0x000000FF) << 24);
}


x86 assembly (clang, -O0):
<_pico_big_long>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff000000,%eax
shr    $0x18,%eax
mov    -0x4(%rbp),%ecx
and    $0xff0000,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
shl    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_pico_big_long>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @_pico_big_long(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -16777216
%5 = lshr i32 %4, 24
%6 = load i32, i32* %2
%7 = and i32 %6, 16711680
%8 = ashr i32 %7, 8
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = and i32 %10, 65280
%12 = shl i32 %11, 8
%13 = or i32 %9, %12
%14 = load i32, i32* %2
%15 = and i32 %14, 255
%16 = shl i32 %15, 24
%17 = or i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @_pico_big_long(i32 %0) {
%2 = tail call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
void test_no_clause() {
  int i;
#pragma omp parallel for simd
  for (i = 0; i < 16; ++i)
    ;
#pragma omp parallel for simd
  ++i;
}


x86 assembly (clang, -O0):
<test_no_clause>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1128 <test_no_clause+0x28>
jmp    111a <test_no_clause+0x1a>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <test_no_clause+0xb>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_no_clause>:
ret

LLVM IR (-O0):
define void @test_no_clause() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %6, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 16
br i1 %4, label %5, label %9
5: ; preds = %2
br label %6
6: ; preds = %5
%7 = load i32, i32* %1
%8 = add nsw i32 %7, 1
store i32 %8, i32* %1
br label %2
9: ; preds = %2
%10 = load i32, i32* %1
%11 = add nsw i32 %10, 1
store i32 %11, i32* %1
ret void
}

LLVM IR (-O2):
define void @test_no_clause() {
ret void
}
void spx__sqr(float x, float y, float *r_x, float *r_y) {
  float squash = (x + y) * 0.3660254037844386;
  *r_x = x + squash;
  *r_y = y + squash;
}


x86 assembly (clang, -O0):
<spx__sqr>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movss  -0x4(%rbp),%xmm0
addss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xed4(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  -0x4(%rbp),%xmm0
addss  -0x1c(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x8(%rbp),%xmm0
addss  -0x1c(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<spx__sqr>:
movaps %xmm0,%xmm2
addss  %xmm1,%xmm2
cvtss2sd %xmm2,%xmm2
mulsd  0xeed(%rip),%xmm2
cvtsd2ss %xmm2,%xmm2
addss  %xmm2,%xmm0
movss  %xmm0,(%rdi)
addss  %xmm1,%xmm2
movss  %xmm2,(%rsi)
ret

LLVM IR (-O0):
define void @spx__sqr(float %0, float %1, float* %2, float* %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float*
%8 = alloca float*
%9 = alloca float
store float %0, float* %5
store float %1, float* %6
store float* %2, float** %7
store float* %3, float** %8
%10 = load float, float* %5
%11 = load float, float* %6
%12 = fadd float %10, %11
%13 = fpext float %12 to double
%14 = fmul double %13, 0x3FD76CF5D0B09954
%15 = fptrunc double %14 to float
store float %15, float* %9
%16 = load float, float* %5
%17 = load float, float* %9
%18 = fadd float %16, %17
%19 = load float*, float** %7
store float %18, float* %19
%20 = load float, float* %6
%21 = load float, float* %9
%22 = fadd float %20, %21
%23 = load float*, float** %8
store float %22, float* %23
ret void
}

LLVM IR (-O2):
define void @spx__sqr(float %0, float %1, float* nocapture writeonly %2, float* nocapture writeonly %3) {
%5 = fadd float %0, %1
%6 = fpext float %5 to double
%7 = fmul double %6, 0x3FD76CF5D0B09954
%8 = fptrunc double %7 to float
%9 = fadd float %8, %0
store float %9, float* %2
%10 = fadd float %8, %1
store float %10, float* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void caml_js_enable_utf8() { exit(1); }


x86 assembly (clang, -O0):
<caml_js_enable_utf8>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<caml_js_enable_utf8>:
push   %rax
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @caml_js_enable_utf8() {
%1 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @caml_js_enable_utf8() {
%1 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ script_write_byte(int);
void script_wait_length(int distance) {
  script_write_byte(156);
  script_write_byte(((distance & 0xFFFF) >> 8));
  script_write_byte((distance & 0xFF));
}


x86 assembly (clang, -O0):
<script_wait_length>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x9c,%edi
call   1030 <script_write_byte@plt>
mov    -0x4(%rbp),%edi
and    $0xffff,%edi
sar    $0x8,%edi
call   1030 <script_write_byte@plt>
mov    -0x4(%rbp),%edi
and    $0xff,%edi
call   1030 <script_write_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<script_wait_length>:
push   %rbx
mov    %edi,%ebx
mov    $0x9c,%edi
call   1030 <script_write_byte@plt>
movzbl %bh,%edi
call   1030 <script_write_byte@plt>
movzbl %bl,%edi
pop    %rbx
jmp    1030 <script_write_byte@plt>

LLVM IR (-O0):
define void @script_wait_length(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @script_write_byte(i32 156)
%4 = load i32, i32* %2
%5 = and i32 %4, 65535
%6 = ashr i32 %5, 8
%7 = call i32 @script_write_byte(i32 %6)
%8 = load i32, i32* %2
%9 = and i32 %8, 255
%10 = call i32 @script_write_byte(i32 %9)
ret void
}

LLVM IR (-O2):
define void @script_wait_length(i32 %0) {
%2 = tail call i32 @script_write_byte(i32 156)
%3 = lshr i32 %0, 8
%4 = and i32 %3, 255
%5 = tail call i32 @script_write_byte(i32 %4)
%6 = and i32 %0, 255
%7 = tail call i32 @script_write_byte(i32 %6)
ret void
}
/* Type definitions */
struct DynamicBuffer {
  int dummy;
};

/* Variables and functions */
char const *DynamicBufferFGetString(struct DynamicBuffer *, int /*<<< orphan*/);
int /*<<< orphan*/ EINVAL;
int /*<<< orphan*/ errno;
int /*<<< orphan*/ stdin;
const char *DynamicBufferGetString(struct DynamicBuffer *self) {
  if (!self) {
    errno = EINVAL;
    return NULL;
  }
  return DynamicBufferFGetString(self, stdin);
}


x86 assembly (clang, -O0):
<DynamicBufferGetString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1146 <DynamicBufferGetString+0x36>
mov    0x2ea2(%rip),%rax
mov    (%rax),%ecx
mov    0x2ea1(%rip),%rax
mov    %ecx,(%rax)
movq   $0x0,-0x8(%rbp)
jmp    115c <DynamicBufferGetString+0x4c>
mov    -0x10(%rbp),%rdi
mov    0x2e97(%rip),%rax
mov    (%rax),%esi
call   1030 <DynamicBufferFGetString@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DynamicBufferGetString>:
test   %rdi,%rdi
je     1123 <DynamicBufferGetString+0x13>
mov    0x2ecc(%rip),%rax
mov    (%rax),%esi
jmp    1030 <DynamicBufferFGetString@plt>
mov    0x2ea6(%rip),%rax
mov    (%rax),%eax
mov    0x2ea5(%rip),%rcx
mov    %eax,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.DynamicBuffer = type { i32 }
@EINVAL = global i32 0
@errno = global i32 0
@stdin = global i32 0
define i8* @DynamicBufferGetString(%struct.DynamicBuffer* %0) {
%2 = alloca i8*
%3 = alloca %struct.DynamicBuffer*
store %struct.DynamicBuffer* %0, %struct.DynamicBuffer** %3
%4 = load %struct.DynamicBuffer*, %struct.DynamicBuffer** %3
%5 = icmp ne %struct.DynamicBuffer* %4, null
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = load i32, i32* @EINVAL
store i32 %7, i32* @errno
store i8* null, i8** %2
br label %12
8: ; preds = %1
%9 = load %struct.DynamicBuffer*, %struct.DynamicBuffer** %3
%10 = load i32, i32* @stdin
%11 = call i8* @DynamicBufferFGetString(%struct.DynamicBuffer* %9, i32 %10)
store i8* %11, i8** %2
br label %12
12: ; preds = %8, %6
%13 = load i8*, i8** %2
ret i8* %13
}

LLVM IR (-O2):
%struct.DynamicBuffer = type { i32 }
@EINVAL = global i32 0
@errno = global i32 0
@stdin = global i32 0
define i8* @DynamicBufferGetString(%struct.DynamicBuffer* %0) {
%2 = icmp eq %struct.DynamicBuffer* %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = load i32, i32* @EINVAL
store i32 %4, i32* @errno
br label %8
5: ; preds = %1
%6 = load i32, i32* @stdin
%7 = tail call i8* @DynamicBufferFGetString(%struct.DynamicBuffer* %0, i32 %6)
br label %8
8: ; preds = %5, %3
%9 = phi i8* [ %7, %5 ], [ null, %3 ]
ret i8* %9
}
int test_imm_46uint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x46 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_46uint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0x46,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_46uint64_midword_mem>:
testb  $0x46,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_46uint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 70
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_46uint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 4587520
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int lrand48();
int rndlim(int low, int high) { return (low + lrand48() % (high - low + 1)); }


x86 assembly (clang, -O0):
<rndlim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <lrand48@plt>
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
mov    -0xc(%rbp),%eax
add    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rndlim>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <lrand48@plt>
sub    %ebp,%ebx
add    $0x1,%ebx
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @rndlim(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 (...) @lrand48()
%7 = load i32, i32* %4
%8 = load i32, i32* %3
%9 = sub nsw i32 %7, %8
%10 = add nsw i32 %9, 1
%11 = srem i32 %6, %10
%12 = add nsw i32 %5, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @rndlim(i32 %0, i32 %1) {
%3 = tail call i32 (...) @lrand48()
%4 = sub i32 1, %0
%5 = add i32 %4, %1
%6 = srem i32 %3, %5
%7 = add nsw i32 %6, %0
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int kill(int /*<<< orphan*/, int);
int killpg(pid_t pid, int signal) { return kill(-pid, signal); }


x86 assembly (clang, -O0):
<killpg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %edi,%edi
sub    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <kill@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<killpg>:
neg    %edi
jmp    1030 <kill@plt>

LLVM IR (-O0):
define i32 @killpg(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = sub nsw i32 0, %5
%7 = load i32, i32* %4
%8 = call i32 @kill(i32 %6, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @killpg(i32 %0, i32 %1) {
%3 = sub nsw i32 0, %0
%4 = tail call i32 @kill(i32 %3, i32 %1)
ret i32 %4
}
/* Variables and functions */
int createShmIntAux(int /*<<< orphan*/);
int getShmIntId() { return createShmIntAux(0); }


x86 assembly (clang, -O0):
<getShmIntId>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <createShmIntAux@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getShmIntId>:
xor    %edi,%edi
jmp    1030 <createShmIntAux@plt>

LLVM IR (-O0):
define i32 @getShmIntId() {
%1 = call i32 @createShmIntAux(i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @getShmIntId() {
%1 = tail call i32 @createShmIntAux(i32 0)
ret i32 %1
}
void RTPollSetGetCount(void) {}


x86 assembly (clang, -O0):
<RTPollSetGetCount>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTPollSetGetCount>:
ret

LLVM IR (-O0):
define void @RTPollSetGetCount() {
ret void
}

LLVM IR (-O2):
define void @RTPollSetGetCount() {
ret void
}
__attribute__((no, noclone)) unsigned short foo15(unsigned short arg) {
  unsigned short ret = 1;
  if (arg + 1 < ((!1) ? -(1 << (sizeof(char) * 8 - 1)) : 0) + 1 ||
      arg + 1 > ((!1) ? ((1 << (sizeof(char) * 8 - 1)) - 1)
                      : ((1 << (sizeof(char) * 8)) - 1)) -
                    1)
    return ret;
  arg = arg + 1;
  ret = (char)arg;
  return arg;
}


x86 assembly (clang, -O0):
<foo15>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x4(%rbp)
movw   $0x1,-0x6(%rbp)
movzwl -0x4(%rbp),%eax
add    $0x1,%eax
cmp    $0x1,%eax
jl     1133 <foo15+0x33>
movzwl -0x4(%rbp),%eax
add    $0x1,%eax
cmp    $0xfe,%eax
jle    1140 <foo15+0x40>
mov    -0x6(%rbp),%ax
mov    %ax,-0x2(%rbp)
jmp    115e <foo15+0x5e>
movzwl -0x4(%rbp),%eax
add    $0x1,%eax
mov    %ax,-0x4(%rbp)
mov    -0x4(%rbp),%ax
movsbl %al,%eax
mov    %ax,-0x6(%rbp)
mov    -0x4(%rbp),%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo15>:
lea    0x1(%rdi),%ecx
cmp    $0xfe,%edi
mov    $0x1,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define zeroext i16 @foo15(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 1, i16* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = add nsw i32 %6, 1
%8 = icmp slt i32 %7, 1
br i1 %8, label %14, label %9
9: ; preds = %1
%10 = load i16, i16* %3
%11 = zext i16 %10 to i32
%12 = add nsw i32 %11, 1
%13 = icmp sgt i32 %12, 254
br i1 %13, label %14, label %16
14: ; preds = %9, %1
%15 = load i16, i16* %4
store i16 %15, i16* %2
br label %25
16: ; preds = %9
%17 = load i16, i16* %3
%18 = zext i16 %17 to i32
%19 = add nsw i32 %18, 1
%20 = trunc i32 %19 to i16
store i16 %20, i16* %3
%21 = load i16, i16* %3
%22 = trunc i16 %21 to i8
%23 = sext i8 %22 to i16
store i16 %23, i16* %4
%24 = load i16, i16* %3
store i16 %24, i16* %2
br label %25
25: ; preds = %16, %14
%26 = load i16, i16* %2
ret i16 %26
}

LLVM IR (-O2):
define zeroext i16 @foo15(i16 zeroext %0) {
%2 = add i16 %0, 1
%3 = icmp ugt i16 %0, 253
%4 = select i1 %3, i16 1, i16 %2
ret i16 %4
}
int test_imm_0Auint16_reg(unsigned short val) {
  return ((val) & (-0x0A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Auint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xfffffff6,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Auint16_reg>:
test   $0xfff6,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Auint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -10
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_0Auint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -10
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int test_imm_7Aint8_reg(signed char val) {
  return ((val) & (0x7A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Aint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0x7a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Aint8_reg>:
test   $0x7a,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Aint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 122
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_7Aint8_reg(i8 signext %0) {
%2 = and i8 %0, 122
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ read_line(char *, int const);
int main(void) {
  const int line_sz = 1024;
  char line[line_sz];
  read_line(line, line_sz);
  printf("Read: %s\n", line);
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x410,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x400,-0x8(%rbp)
mov    %rsp,%rax
mov    %rax,-0x10(%rbp)
lea    -0x410(%rbp),%rdi
mov    $0x400,%esi
call   1040 <read_line@plt>
lea    0xea8(%rip),%rdi
lea    -0x410(%rbp),%rsi
call   1030 <printf@plt>
mov    0x2e75(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
mov    -0x4(%rbp),%eax
add    $0x410,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x400,%rsp
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x400,%esi
call   1040 <read_line@plt>
lea    0xec1(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
mov    0x2e92(%rip),%rax
mov    (%rax),%eax
add    $0x400,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"Read: %s\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8*
store i32 0, i32* %1
store i32 1024, i32* %2
%4 = call i8* @llvm.stacksave()
store i8* %4, i8** %3
%5 = alloca i8, i64 1024
%6 = call i32 @read_line(i8* %5, i32 1024)
%7 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %5)
%8 = load i32, i32* @EXIT_SUCCESS
store i32 %8, i32* %1
%9 = load i8*, i8** %3
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
@.str = [10 x i8] c"Read: %s\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca [1024 x i8]
%2 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 0
%3 = call i32 @read_line(i8* %2, i32 1024)
%4 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %2)
%5 = load i32, i32* @EXIT_SUCCESS
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ free(int *);
scalar_t__ malloc(int);
int main1() {
  int *array4;
  array4 = (int *)malloc(sizeof(int) * 4);
  int i;
  for (i = 0; i < 4; ++i) {
    array4[i] = i;
  }
  assert(array4[2] == 1);
  free(array4);
}


x86 assembly (clang, -O0):
<main1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x10,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x4,-0x14(%rbp)
jge    1173 <main1+0x43>
mov    -0x14(%rbp),%edx
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    114d <main1+0x1d>
mov    -0x10(%rbp),%rax
cmpl   $0x1,0x8(%rax)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main1>:
push   %rbx
mov    $0x10,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
movaps 0xebb(%rip),%xmm0
movups %xmm0,(%rax)
xor    %edi,%edi
call   1040 <assert@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define i32 @main1() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32
%4 = call i64 @malloc(i32 16)
%5 = inttoptr i64 %4 to i32*
store i32* %5, i32** %2
store i32 0, i32* %3
br label %6
6: ; preds = %15, %0
%7 = load i32, i32* %3
%8 = icmp slt i32 %7, 4
br i1 %8, label %9, label %18
9: ; preds = %6
%10 = load i32, i32* %3
%11 = load i32*, i32** %2
%12 = load i32, i32* %3
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
store i32 %10, i32* %14
br label %15
15: ; preds = %9
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
store i32 %17, i32* %3
br label %6
18: ; preds = %6
%19 = load i32*, i32** %2
%20 = getelementptr inbounds i32, i32* %19, i64 2
%21 = load i32, i32* %20
%22 = icmp eq i32 %21, 1
%23 = zext i1 %22 to i32
%24 = call i32 @assert(i32 %23)
%25 = load i32*, i32** %2
%26 = call i32 @free(i32* %25)
%27 = load i32, i32* %1
ret i32 %27
}

LLVM IR (-O2):
define i32 @main1() {
%1 = tail call i64 @malloc(i32 16)
%2 = inttoptr i64 %1 to i32*
%3 = inttoptr i64 %1 to <4 x i32>*
store <4 x i32> <i32 0, i32 1, i32 2, i32 3>, <4 x i32>* %3
%4 = tail call i32 @assert(i32 0)
%5 = tail call i32 @free(i32* %2)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ vectorSet(float *, float const, float const, float const);
void vectorCopy(float dest[3], const float src[3]) {
  vectorSet(dest, src[0], src[1], src[2]);
}


x86 assembly (clang, -O0):
<vectorCopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  0x4(%rax),%xmm1
mov    -0x10(%rbp),%rax
movss  0x8(%rax),%xmm2
call   1030 <vectorSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vectorCopy>:
movss  (%rsi),%xmm0
movss  0x4(%rsi),%xmm1
movss  0x8(%rsi),%xmm2
jmp    1030 <vectorSet@plt>

LLVM IR (-O0):
define void @vectorCopy(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = load float*, float** %4
%7 = getelementptr inbounds float, float* %6, i64 0
%8 = load float, float* %7
%9 = load float*, float** %4
%10 = getelementptr inbounds float, float* %9, i64 1
%11 = load float, float* %10
%12 = load float*, float** %4
%13 = getelementptr inbounds float, float* %12, i64 2
%14 = load float, float* %13
%15 = call i32 @vectorSet(float* %5, float %8, float %11, float %14)
ret void
}

LLVM IR (-O2):
define void @vectorCopy(float* %0, float* nocapture %1) {
%3 = load float, float* %1
%4 = getelementptr inbounds float, float* %1, i64 1
%5 = load float, float* %4
%6 = getelementptr inbounds float, float* %1, i64 2
%7 = load float, float* %6
%8 = tail call i32 @vectorSet(float* %0, float %3, float %5, float %7)
ret void
}
int security_quota_on(struct dentry *dentry) { return 0; }


x86 assembly (clang, -O0):
<security_quota_on>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<security_quota_on>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.dentry = type opaque
define i32 @security_quota_on(%struct.dentry* %0) {
%2 = alloca %struct.dentry*
store %struct.dentry* %0, %struct.dentry** %2
ret i32 0
}

LLVM IR (-O2):
%struct.dentry = type opaque
define i32 @security_quota_on(%struct.dentry* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int bar(int, int);
int /*<<< orphan*/ foo();
int main() {
  foo();
  assert(bar(1, 2) == 3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <foo@plt>
mov    $0x1,%edi
mov    $0x2,%esi
call   1030 <bar@plt>
cmp    $0x3,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <foo@plt>
mov    $0x1,%edi
mov    $0x2,%esi
call   1030 <bar@plt>
xor    %edi,%edi
cmp    $0x3,%eax
sete   %dil
call   1040 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @foo()
%3 = call i32 @bar(i32 1, i32 2)
%4 = icmp eq i32 %3, 3
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @foo()
%2 = tail call i32 @bar(i32 1, i32 2)
%3 = icmp eq i32 %2, 3
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
ret i32 0
}
/* Variables and functions */
int unix_passive_socket(char const *, int, int /*<<< orphan*/,
                        int /*<<< orphan*/);
int unix_bind(const char *path, int type) {
  return unix_passive_socket(path, type, 0, 0);
}


x86 assembly (clang, -O0):
<unix_bind>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %ecx,%ecx
mov    %ecx,%edx
call   1030 <unix_passive_socket@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unix_bind>:
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <unix_passive_socket@plt>

LLVM IR (-O0):
define i32 @unix_bind(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @unix_passive_socket(i8* %5, i32 %6, i32 0, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @unix_bind(i8* %0, i32 %1) {
%3 = tail call i32 @unix_passive_socket(i8* %0, i32 %1, i32 0, i32 0)
ret i32 %3
}
/* Type definitions */
typedef unsigned long uint32_t;

/* Variables and functions */
void EventRegister(uint32_t ui32EventSudirriber, uint32_t ui32EventSource) {

  ;
  (*((volatile unsigned long *)(0x40083000 + ui32EventSudirriber))) =
      ui32EventSource;
}


x86 assembly (clang, -O0):
<EventRegister>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
add    $0x40083000,%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<EventRegister>:
mov    %rsi,0x40083000(%rdi)
ret

LLVM IR (-O0):
define void @EventRegister(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add i64 1074278400, %6
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @EventRegister(i64 %0, i64 %1) {
%3 = add i64 %0, 1074278400
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}
int getdigit(int ch) { return ch <= '9' ? ch - '0' : ch - 'A' + 10; }


x86 assembly (clang, -O0):
<getdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x39,-0x4(%rbp)
jg     111f <getdigit+0x1f>
mov    -0x4(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x8(%rbp)
jmp    112b <getdigit+0x2b>
mov    -0x4(%rbp),%eax
sub    $0x41,%eax
add    $0xa,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getdigit>:
lea    -0x37(%rdi),%ecx
lea    -0x30(%rdi),%eax
cmp    $0x3a,%edi
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @getdigit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 %3, 57
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = sub nsw i32 %6, 48
br label %12
8: ; preds = %1
%9 = load i32, i32* %2
%10 = sub nsw i32 %9, 65
%11 = add nsw i32 %10, 10
br label %12
12: ; preds = %8, %5
%13 = phi i32 [ %7, %5 ], [ %11, %8 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @getdigit(i32 %0) {
%2 = icmp slt i32 %0, 58
%3 = select i1 %2, i32 -48, i32 -55
%4 = add nsw i32 %3, %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ check_memory_usage();
int /*<<< orphan*/ glutMainLoop();
int /*<<< orphan*/ load_data();
int /*<<< orphan*/ post_load_init(int, char **);
int /*<<< orphan*/ pre_load_init(int, char **);
int /*<<< orphan*/ print_welcome();
int /*<<< orphan*/ start_rendering();
int main(int argc, char **argv) {
  pre_load_init(argc, argv);
  print_welcome();
  load_data();
  post_load_init(argc, argv);
  check_memory_usage();
  start_rendering();
  glutMainLoop();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1050 <pre_load_init@plt>
mov    $0x0,%al
call   1060 <print_welcome@plt>
mov    $0x0,%al
call   1030 <load_data@plt>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1070 <post_load_init@plt>
mov    $0x0,%al
call   1090 <check_memory_usage@plt>
mov    $0x0,%al
call   1080 <start_rendering@plt>
mov    $0x0,%al
call   1040 <glutMainLoop@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
call   1050 <pre_load_init@plt>
xor    %eax,%eax
call   1060 <print_welcome@plt>
xor    %eax,%eax
call   1030 <load_data@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
call   1070 <post_load_init@plt>
xor    %eax,%eax
call   1090 <check_memory_usage@plt>
xor    %eax,%eax
call   1080 <start_rendering@plt>
xor    %eax,%eax
call   1040 <glutMainLoop@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @pre_load_init(i32 %6, i8** %7)
%9 = call i32 (...) @print_welcome()
%10 = call i32 (...) @load_data()
%11 = load i32, i32* %4
%12 = load i8**, i8*** %5
%13 = call i32 @post_load_init(i32 %11, i8** %12)
%14 = call i32 (...) @check_memory_usage()
%15 = call i32 (...) @start_rendering()
%16 = call i32 (...) @glutMainLoop()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @pre_load_init(i32 %0, i8** %1)
%4 = tail call i32 (...) @print_welcome()
%5 = tail call i32 (...) @load_data()
%6 = tail call i32 @post_load_init(i32 %0, i8** %1)
%7 = tail call i32 (...) @check_memory_usage()
%8 = tail call i32 (...) @start_rendering()
%9 = tail call i32 (...) @glutMainLoop()
ret i32 0
}
/* Type definitions */
typedef scalar_t__ uint8_t;

/* Variables and functions */
unsigned long __VERIFIER_nondet_ulong() {
  unsigned long initialValue;
  int byteOffset = 0;
  uint8_t *initialValueAsByte = (uint8_t *)&initialValue;
  for (; byteOffset < sizeof(unsigned long); ++byteOffset) {
    initialValueAsByte[byteOffset] = 0;
  }
  return initialValue;
}


x86 assembly (clang, -O0):
<__VERIFIER_nondet_ulong>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0xc(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movslq -0xc(%rbp),%rax
cmp    $0x8,%rax
jae    113f <__VERIFIER_nondet_ulong+0x3f>
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
movq   $0x0,(%rax,%rcx,8)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1113 <__VERIFIER_nondet_ulong+0x13>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__VERIFIER_nondet_ulong>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @__VERIFIER_nondet_ulong() {
%1 = alloca i64
%2 = alloca i32
%3 = alloca i64*
store i32 0, i32* %2
store i64* %1, i64** %3
br label %4
4: ; preds = %13, %0
%5 = load i32, i32* %2
%6 = sext i32 %5 to i64
%7 = icmp ult i64 %6, 8
br i1 %7, label %8, label %16
8: ; preds = %4
%9 = load i64*, i64** %3
%10 = load i32, i32* %2
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i64, i64* %9, i64 %11
store i64 0, i64* %12
br label %13
13: ; preds = %8
%14 = load i32, i32* %2
%15 = add nsw i32 %14, 1
store i32 %15, i32* %2
br label %4
16: ; preds = %4
%17 = load i64, i64* %1
ret i64 %17
}

LLVM IR (-O2):
define i64 @__VERIFIER_nondet_ulong() {
ret i64 0
}