xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_thread_set_name() {
  printf("NOT IMPLEMENTED:"
         "pa_thread_set_name"
         "\n");
}


x86 assembly (clang, -O0):
<pa_thread_set_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_thread_set_name>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"NOT IMPLEMENTED:pa_thread_set_name\0A\00"
define i32 @pa_thread_set_name() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [35 x i8] c"NOT IMPLEMENTED:pa_thread_set_name\00"
define i32 @pa_thread_set_name() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
float high_frequency_content(float *spectrum, float N) {
  int i;
  float sum = 0.f;
  for (i = 0; i <= N; i++) {
    sum += i * spectrum[i];
  }
  return sum / (float)(N + 1);
}


x86 assembly (clang, -O0):
<high_frequency_content>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
xorps  %xmm0,%xmm0
movss  %xmm0,-0x14(%rbp)
movl   $0x0,-0x10(%rbp)
cvtsi2ssl -0x10(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jb     1161 <high_frequency_content+0x61>
cvtsi2ssl -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm2
movss  -0x14(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x14(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    111c <high_frequency_content+0x1c>
movss  -0x14(%rbp),%xmm0
movss  0xe92(%rip),%xmm1
addss  -0xc(%rbp),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<high_frequency_content>:
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     1129 <high_frequency_content+0x29>
xorps  %xmm2,%xmm2
xor    %eax,%eax
xorps  %xmm1,%xmm1
mulss  (%rdi,%rax,4),%xmm2
addss  %xmm2,%xmm1
add    $0x1,%rax
xorps  %xmm2,%xmm2
cvtsi2ss %eax,%xmm2
ucomiss %xmm2,%xmm0
jae    1110 <high_frequency_content+0x10>
addss  0xecf(%rip),%xmm0
divss  %xmm0,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @high_frequency_content(float* %0, float %1) {
%3 = alloca float*
%4 = alloca float
%5 = alloca i32
%6 = alloca float
store float* %0, float** %3
store float %1, float* %4
store float 0.000000e+00, float* %6
store i32 0, i32* %5
br label %7
7: ; preds = %22, %2
%8 = load i32, i32* %5
%9 = sitofp i32 %8 to float
%10 = load float, float* %4
%11 = fcmp ole float %9, %10
br i1 %11, label %12, label %25
12: ; preds = %7
%13 = load i32, i32* %5
%14 = sitofp i32 %13 to float
%15 = load float*, float** %3
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds float, float* %15, i64 %17
%19 = load float, float* %18
%20 = load float, float* %6
%21 = call float @llvm.fmuladd.f32(float %14, float %19, float %20)
store float %21, float* %6
br label %22
22: ; preds = %12
%23 = load i32, i32* %5
%24 = add nsw i32 %23, 1
store i32 %24, i32* %5
br label %7
25: ; preds = %7
%26 = load float, float* %6
%27 = load float, float* %4
%28 = fadd float %27, 1.000000e+00
%29 = fdiv float %26, %28
ret float %29
}

LLVM IR (-O2):
define float @high_frequency_content(float* nocapture %0, float %1) {
%3 = fcmp ult float %1, 0.000000e+00
br i1 %3, label %15, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %11, %4 ], [ 0, %2 ]
%6 = phi float [ %13, %4 ], [ 0.000000e+00, %2 ]
%7 = phi float [ %10, %4 ], [ 0.000000e+00, %2 ]
%8 = getelementptr inbounds float, float* %0, i64 %5
%9 = load float, float* %8
%10 = tail call float @llvm.fmuladd.f32(float %6, float %9, float %7)
%11 = add nuw i64 %5, 1
%12 = trunc i64 %11 to i32
%13 = sitofp i32 %12 to float
%14 = fcmp ugt float %13, %1
br i1 %14, label %15, label %4
15: ; preds = %4, %2
%16 = phi float [ 0.000000e+00, %2 ], [ %10, %4 ]
%17 = fadd float %1, 1.000000e+00
%18 = fdiv float %16, %17
ret float %18
}
int intCompare(void const *a, void const *b) {
  int *__cil_tmp3;
  int __cil_tmp4;
  int __cil_tmp5;
  int *__cil_tmp6;
  int __cil_tmp7;
  int __cil_tmp8;
  {
    {
      __cil_tmp3 = (int *)b;
      __cil_tmp4 = *((int *)__cil_tmp3);
      __cil_tmp5 = (int)__cil_tmp4;
      __cil_tmp6 = (int *)a;
      __cil_tmp7 = *((int *)__cil_tmp6);
      __cil_tmp8 = (int)__cil_tmp7;
      return (__cil_tmp8 - __cil_tmp5);
    }
  }
}


x86 assembly (clang, -O0):
<intCompare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
mov    %eax,-0x30(%rbp)
mov    -0x30(%rbp),%eax
sub    -0x20(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intCompare>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @intCompare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32*
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%11 = load i8*, i8** %4
%12 = bitcast i8* %11 to i32*
store i32* %12, i32** %5
%13 = load i32*, i32** %5
%14 = load i32, i32* %13
store i32 %14, i32* %6
%15 = load i32, i32* %6
store i32 %15, i32* %7
%16 = load i8*, i8** %3
%17 = bitcast i8* %16 to i32*
store i32* %17, i32** %8
%18 = load i32*, i32** %8
%19 = load i32, i32* %18
store i32 %19, i32* %9
%20 = load i32, i32* %9
store i32 %20, i32* %10
%21 = load i32, i32* %10
%22 = load i32, i32* %7
%23 = sub nsw i32 %21, %22
ret i32 %23
}

LLVM IR (-O2):
define i32 @intCompare(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %1 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %0 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %6, %4
ret i32 %7
}
int Remain(int N) {
  int number;
  number = N % 10;
  return number;
}


x86 assembly (clang, -O0):
<Remain>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Remain>:
movslq %edi,%rax
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
add    %edx,%ecx
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @Remain(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = srem i32 %4, 10
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @Remain(i32 %0) {
%2 = srem i32 %0, 10
ret i32 %2
}
const char *get_config_path() { return "."; }


x86 assembly (clang, -O0):
<get_config_path>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_config_path>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [2 x i8] c".\00"
define i8* @get_config_path() {
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [2 x i8] c".\00"
define i8* @get_config_path() {
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
}
int foo(int *a, int *b) {
  *a = 5;
  *b = 6;
  return *a + *b;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x5,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x6,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
add    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
movl   $0x5,(%rdi)
movl   $0x6,(%rsi)
mov    (%rdi),%eax
add    $0x6,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
store i32 5, i32* %5
%6 = load i32*, i32** %4
store i32 6, i32* %6
%7 = load i32*, i32** %3
%8 = load i32, i32* %7
%9 = load i32*, i32** %4
%10 = load i32, i32* %9
%11 = add nsw i32 %8, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @foo(i32* nocapture %0, i32* nocapture writeonly %1) {
store i32 5, i32* %0
store i32 6, i32* %1
%3 = load i32, i32* %0
%4 = add nsw i32 %3, 6
ret i32 %4
}
void ff_hevc_put_hevc_uni_w_pel_pixels48_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_pel_pixels48_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_pel_pixels48_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_pel_pixels48_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_pel_pixels48_12_sse4() {
ret void
}
void create_int(void *newint) { return; }


x86 assembly (clang, -O0):
<create_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_int>:
ret

LLVM IR (-O0):
define void @create_int(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @create_int(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fputc(char, int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char const *const, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void putserr_and_exit(const char *const str) {
  fputs(str, stderr);
  fputc('\n', stderr);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<putserr_and_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e99(%rip),%rax
mov    (%rax),%esi
call   1030 <fputs@plt>
mov    0x2e8b(%rip),%rax
mov    (%rax),%esi
mov    $0xa,%edi
call   1040 <fputc@plt>
mov    0x2e70(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<putserr_and_exit>:
push   %rbx
mov    0x2ea8(%rip),%rbx
mov    (%rbx),%esi
call   1030 <fputs@plt>
mov    (%rbx),%esi
mov    $0xa,%edi
call   1040 <fputc@plt>
mov    0x2e86(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@EXIT_FAILURE = global i32 0
define void @putserr_and_exit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @stderr
%5 = call i32 @fputs(i8* %3, i32 %4)
%6 = load i32, i32* @stderr
%7 = call i32 @fputc(i8 signext 10, i32 %6)
%8 = load i32, i32* @EXIT_FAILURE
%9 = call i32 @exit(i32 %8)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@EXIT_FAILURE = global i32 0
define void @putserr_and_exit(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fputs(i8* %0, i32 %2)
%4 = load i32, i32* @stderr
%5 = tail call i32 @fputc(i8 signext 10, i32 %4)
%6 = load i32, i32* @EXIT_FAILURE
%7 = tail call i32 @exit(i32 %6)
unreachable
}
void test_01(char *x, int y) {
  x[0] = y;
  x[1] = y;
  x[2] = y;
}


x86 assembly (clang, -O0):
<test_01>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x2(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_01>:
mov    %sil,(%rdi)
mov    %sil,0x1(%rdi)
mov    %sil,0x2(%rdi)
ret

LLVM IR (-O0):
define void @test_01(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = trunc i32 %5 to i8
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i64 0
store i8 %6, i8* %8
%9 = load i32, i32* %4
%10 = trunc i32 %9 to i8
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i64 1
store i8 %10, i8* %12
%13 = load i32, i32* %4
%14 = trunc i32 %13 to i8
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i64 2
store i8 %14, i8* %16
ret void
}

LLVM IR (-O2):
define void @test_01(i8* nocapture writeonly %0, i32 %1) {
%3 = trunc i32 %1 to i8
store i8 %3, i8* %0
%4 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %3, i8* %4
%5 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %3, i8* %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void die(const char *text) {
  fprintf(stderr, "Fatal error: %s\n", text);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e8c(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<die>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [17 x i8] c"Fatal error: %s\0A\00"
@EXIT_FAILURE = global i32 0
define void @die(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @EXIT_FAILURE
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [17 x i8] c"Fatal error: %s\0A\00"
@EXIT_FAILURE = global i32 0
define void @die(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @EXIT_FAILURE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
int(_rl_pure_alphabetic)(c) int c;
{ return (((unsigned char)(c) == (c)) && (1 && isalpha(c))); }


x86 assembly (clang, -O0):
<_rl_pure_alphabetic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
movzbl %al,%ecx
xor    %eax,%eax
cmp    -0x4(%rbp),%ecx
mov    %al,-0x5(%rbp)
jne    1140 <_rl_pure_alphabetic+0x30>
mov    -0x4(%rbp),%edi
call   1030 <isalpha@plt>
cmp    $0x0,%eax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_rl_pure_alphabetic>:
xor    %eax,%eax
cmp    $0xff,%edi
ja     112d <_rl_pure_alphabetic+0x1d>
push   %rax
call   1030 <isalpha@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
setne  %al
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @_rl_pure_alphabetic(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i8
%5 = zext i8 %4 to i32
%6 = load i32, i32* %2
%7 = icmp eq i32 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i32, i32* %2
%10 = call i32 @isalpha(i32 %9)
%11 = icmp ne i32 %10, 0
br label %12
12: ; preds = %8, %1
%13 = phi i1 [ false, %1 ], [ %11, %8 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @_rl_pure_alphabetic(i32 %0) {
%2 = icmp ult i32 %0, 256
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = tail call i32 @isalpha(i32 %0)
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %1
%8 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ helper_double_15_recursive(double *, int);
void helper_double_15(double *buf) { helper_double_15_recursive(buf, 15); }


x86 assembly (clang, -O0):
<helper_double_15>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xf,%esi
call   1030 <helper_double_15_recursive@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<helper_double_15>:
mov    $0xf,%esi
jmp    1030 <helper_double_15_recursive@plt>

LLVM IR (-O0):
define void @helper_double_15(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = call i32 @helper_double_15_recursive(double* %3, i32 15)
ret void
}

LLVM IR (-O2):
define void @helper_double_15(double* %0) {
%2 = tail call i32 @helper_double_15_recursive(double* %0, i32 15)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ WIFSTOPPED(int /*<<< orphan*/);
int WSTOPSIG(int /*<<< orphan*/);
int StopSignal(uint32_t *w) {
  if (!WIFSTOPPED(*w))
    return -1;
  return WSTOPSIG(*w);
}


x86 assembly (clang, -O0):
<StopSignal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
call   1030 <WIFSTOPPED@plt>
cmp    $0x0,%eax
jne    114c <StopSignal+0x2c>
movl   $0xffffffff,-0x4(%rbp)
jmp    115a <StopSignal+0x3a>
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
call   1040 <WSTOPSIG@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<StopSignal>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%edi
call   1030 <WIFSTOPPED@plt>
test   %eax,%eax
je     1137 <StopSignal+0x17>
mov    (%rbx),%edi
pop    %rbx
jmp    1040 <WSTOPSIG@plt>
mov    $0xffffffff,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @StopSignal(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = load i32, i32* %4
%6 = call i32 @WIFSTOPPED(i32 %5)
%7 = icmp ne i32 %6, 0
br i1 %7, label %9, label %8
8: ; preds = %1
store i32 -1, i32* %2
br label %13
9: ; preds = %1
%10 = load i32*, i32** %3
%11 = load i32, i32* %10
%12 = call i32 @WSTOPSIG(i32 %11)
store i32 %12, i32* %2
br label %13
13: ; preds = %9, %8
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @StopSignal(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @WIFSTOPPED(i32 %2)
%4 = icmp eq i32 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %0
%7 = tail call i32 @WSTOPSIG(i32 %6)
br label %8
8: ; preds = %1, %5
%9 = phi i32 [ %7, %5 ], [ -1, %1 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ randomWord(int);
int main(int argc, const char *argv[]) {
  printf("This program generates %d random words.\n", 5);
  randomWord(5);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
mov    $0x5,%esi
call   1040 <printf@plt>
mov    $0x5,%edi
call   1030 <randomWord@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
mov    $0x5,%esi
call   1040 <printf@plt>
mov    $0x5,%edi
call   1030 <randomWord@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [41 x i8] c"This program generates %d random words.\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 5)
%7 = call i32 @randomWord(i32 5)
ret i32 0
}

LLVM IR (-O2):
@.str = [41 x i8] c"This program generates %d random words.\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 5)
%4 = tail call i32 @randomWord(i32 5)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, int);
void print_constant_int(char *name, int value) {
  printf("#define %s %d\n", name, value);
}


x86 assembly (clang, -O0):
<print_constant_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_constant_int>:
mov    %esi,%edx
mov    %rdi,%rsi
lea    0xee4(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"#define %s %d\0A\00"
define void @print_constant_int(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"#define %s %d\0A\00"
define void @print_constant_int(i8* %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
ret void
}
/* Variables and functions */
char *calloc(int, int);
int /*<<< orphan*/ sprintf(char *, char *, int);
char *itoa(int n) {
  char *buf = calloc(1, 19);
  sprintf(buf, "%d", n);
  return buf;
}


x86 assembly (clang, -O0):
<itoa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
mov    $0x13,%esi
call   1030 <calloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%edx
lea    0xeb4(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<itoa>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
mov    $0x1,%edi
mov    $0x13,%esi
call   1030 <calloc@plt>
mov    %rax,%rbx
lea    0xec2(%rip),%rsi
mov    %rax,%rdi
mov    %ebp,%edx
call   1040 <sprintf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i8* @itoa(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = call i8* @calloc(i32 1, i32 19)
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = load i32, i32* %2
%7 = call i32 @sprintf(i8* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = load i8*, i8** %3
ret i8* %8
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define noalias i8* @itoa(i32 %0) {
%2 = tail call dereferenceable_or_null(19) i8* @calloc(i32 1, i32 19)
%3 = tail call i32 @sprintf(i8* dereferenceable(1) %2, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i8* %2
}
extern unsigned int inb(unsigned long addr) {
  long result =
      *(volatile int *)((addr << 5) + ((0xfffffc0000000000UL) + 0x1c0000000UL) +
                        0x00);
  result >>= (addr & 3) * 8;
  return 0xffUL & result;
}


x86 assembly (clang, -O0):
<inb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x5,%rax
movabs $0xfffffc01c0000000,%rcx
fc ff ff
add    %rcx,%rax
mov    (%rax),%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
and    $0x3,%rcx
shl    $0x3,%rcx
mov    -0x10(%rbp),%rax
sar    %cl,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0xff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inb>:
lea    0x0(,%rdi,8),%ecx
shl    $0x5,%rdi
movabs $0xfffffc01c0000000,%rax
fc ff ff
movslq (%rdi,%rax,1),%rax
and    $0x18,%cl
sar    %cl,%rax
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @inb(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = shl i64 %4, 5
%6 = add i64 %5, -4390530318336
%7 = add i64 %6, 0
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = sext i32 %9 to i64
store i64 %10, i64* %3
%11 = load i64, i64* %2
%12 = and i64 %11, 3
%13 = mul i64 %12, 8
%14 = load i64, i64* %3
%15 = ashr i64 %14, %13
store i64 %15, i64* %3
%16 = load i64, i64* %3
%17 = and i64 255, %16
%18 = trunc i64 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @inb(i64 %0) {
%2 = shl i64 %0, 5
%3 = add i64 %2, -4390530318336
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = sext i32 %5 to i64
%7 = shl i64 %0, 3
%8 = and i64 %7, 24
%9 = ashr i64 %6, %8
%10 = trunc i64 %9 to i32
%11 = and i32 %10, 255
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(int *, int *, int /*<<< orphan*/);
void memcpy_good2() {
  int arr1[10];
  int arr2[20];
  memcpy(arr2, arr1, 0);
}


x86 assembly (clang, -O0):
<memcpy_good2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
lea    -0x80(%rbp),%rdi
lea    -0x30(%rbp),%rsi
xor    %edx,%edx
call   1030 <memcpy@plt>
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcpy_good2>:
sub    $0x88,%rsp
lea    0x30(%rsp),%rdi
mov    %rsp,%rsi
xor    %edx,%edx
call   1030 <memcpy@plt>
add    $0x88,%rsp
ret

LLVM IR (-O0):
define void @memcpy_good2() {
%1 = alloca [10 x i32]
%2 = alloca [20 x i32]
%3 = getelementptr inbounds [20 x i32], [20 x i32]* %2, i64 0, i64 0
%4 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%5 = call i32 @memcpy(i32* %3, i32* %4, i32 0)
ret void
}

LLVM IR (-O2):
define void @memcpy_good2() {
%1 = alloca [10 x i32]
%2 = alloca [20 x i32]
%3 = bitcast [10 x i32]* %1 to i8*
%4 = bitcast [20 x i32]* %2 to i8*
%5 = getelementptr inbounds [20 x i32], [20 x i32]* %2, i64 0, i64 0
%6 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%7 = call i32 @memcpy(i32* %5, i32* %6, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_visual_attribs_long_header(void) {
  printf("Vis   Vis   Visual Trans  buff lev render DB ste  r   g   b   a      "
         "s  aux dep ste  accum buffer   MS   MS         \n");
  printf(" ID  Depth   Type  parent size el   type     reo sz  sz  sz  sz flt "
         "rgb buf th  ncl  r   g   b   a  num bufs caveats\n");
  printf("---------------------------------------------------------------------"
         "-----------------------------------------------\n");
}


x86 assembly (clang, -O0):
<print_visual_attribs_long_header>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf4f(%rip),%rdi
call   1030 <printf@plt>
lea    0xfb9(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_visual_attribs_long_header>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf51(%rip),%rdi
call   1030 <puts@plt>
lea    0xfba(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [118 x i8] c"Vis Vis Visual Trans buff lev render DB ste r g b a s aux dep ste accum buffer MS MS \0A\00"
@.str.1 = [118 x i8] c" ID Depth Type parent size el type reo sz sz sz sz flt rgb buf th ncl r g b a num bufs caveats\0A\00"
@.str.2 = [118 x i8] c"--------------------------------------------------------------------------------------------------------------------\0A\00"
define void @print_visual_attribs_long_header() {
%1 = call i32 @printf(i8* getelementptr inbounds ([118 x i8], [118 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([118 x i8], [118 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([118 x i8], [118 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [117 x i8] c"Vis Vis Visual Trans buff lev render DB ste r g b a s aux dep ste accum buffer MS MS \00"
@str.3 = [117 x i8] c" ID Depth Type parent size el type reo sz sz sz sz flt rgb buf th ncl r g b a num bufs caveats\00"
@str.4 = [117 x i8] c"--------------------------------------------------------------------------------------------------------------------\00"
define void @print_visual_attribs_long_header() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([117 x i8], [117 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([117 x i8], [117 x i8]* @str.3, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([117 x i8], [117 x i8]* @str.4, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LBA_REG_WRITE(void *, int, int);
int gemini_util_reset(void *phys_addr) {
  LBA_REG_WRITE(phys_addr, 0x0500, 0xf);
  return 0;
}


x86 assembly (clang, -O0):
<gemini_util_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x500,%esi
mov    $0xf,%edx
call   1030 <LBA_REG_WRITE@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gemini_util_reset>:
push   %rax
mov    $0x500,%esi
mov    $0xf,%edx
call   1030 <LBA_REG_WRITE@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gemini_util_reset(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @LBA_REG_WRITE(i8* %3, i32 1280, i32 15)
ret i32 0
}

LLVM IR (-O2):
define i32 @gemini_util_reset(i8* %0) {
%2 = tail call i32 @LBA_REG_WRITE(i8* %0, i32 1280, i32 15)
ret i32 0
}
unsigned get_unsigned_arg(void **params) {
  unsigned ret = **((unsigned **)params);
  *params += sizeof(unsigned);
  return ret;
}


x86 assembly (clang, -O0):
<get_unsigned_arg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x4,%rcx
mov    %rcx,(%rax)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_unsigned_arg>:
mov    (%rdi),%rcx
mov    (%rcx),%eax
add    $0x4,%rcx
mov    %rcx,(%rdi)
ret

LLVM IR (-O0):
define i32 @get_unsigned_arg(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = bitcast i8** %4 to i32**
%6 = load i32*, i32** %5
%7 = load i32, i32* %6
store i32 %7, i32* %3
%8 = load i8**, i8*** %2
%9 = load i8*, i8** %8
%10 = getelementptr i8, i8* %9, i64 4
store i8* %10, i8** %8
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @get_unsigned_arg(i8** nocapture %0) {
%2 = bitcast i8** %0 to i32**
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = getelementptr i32, i32* %3, i64 1
store i32* %5, i32** %2
ret i32 %4
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ serial;
};
typedef TYPE_1__ XGraphicsExposeEvent;

/* Variables and functions */
unsigned long get_XGraphicsExposeEvent_serial(void *_p) {
  return (unsigned long)((XGraphicsExposeEvent *)_p)->serial;
}


x86 assembly (clang, -O0):
<get_XGraphicsExposeEvent_serial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XGraphicsExposeEvent_serial>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XGraphicsExposeEvent_serial(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XGraphicsExposeEvent_serial(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
float glmRadf(float d) { return d * 0.017453292519943295769236907684886f; }


x86 assembly (clang, -O0):
<glmRadf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmRadf>:
mulss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @glmRadf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float %3, 0x3F91DF46A0000000
ret float %4
}

LLVM IR (-O2):
define float @glmRadf(float %0) {
%2 = fmul float %0, 0x3F91DF46A0000000
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ test(int, char *);
void reset_forced(void) {
  test(0x40, "RESET: clear SDHC");
  test(0x00, "RESET: begin");
  test(0x01, "RESET: end");
  test(0x41, "RESET: set SDHC");
}


x86 assembly (clang, -O0):
<reset_forced>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40,%edi
lea    0xee0(%rip),%rsi
call   1030 <test@plt>
xor    %edi,%edi
lea    0xee4(%rip),%rsi
call   1030 <test@plt>
mov    $0x1,%edi
lea    0xee0(%rip),%rsi
call   1030 <test@plt>
mov    $0x41,%edi
lea    0xeda(%rip),%rsi
call   1030 <test@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<reset_forced>:
push   %rax
lea    0xee8(%rip),%rsi
mov    $0x40,%edi
call   1030 <test@plt>
lea    0xee9(%rip),%rsi
xor    %edi,%edi
call   1030 <test@plt>
lea    0xee8(%rip),%rsi
mov    $0x1,%edi
call   1030 <test@plt>
lea    0xee2(%rip),%rsi
mov    $0x41,%edi
pop    %rax
jmp    1030 <test@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"RESET: clear SDHC\00"
@.str.1 = [13 x i8] c"RESET: begin\00"
@.str.2 = [11 x i8] c"RESET: end\00"
@.str.3 = [16 x i8] c"RESET: set SDHC\00"
define void @reset_forced() {
%1 = call i32 @test(i32 64, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @test(i32 0, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @test(i32 1, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @test(i32 65, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"RESET: clear SDHC\00"
@.str.1 = [13 x i8] c"RESET: begin\00"
@.str.2 = [11 x i8] c"RESET: end\00"
@.str.3 = [16 x i8] c"RESET: set SDHC\00"
define void @reset_forced() {
%1 = tail call i32 @test(i32 64, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @test(i32 0, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @test(i32 1, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @test(i32 65, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.3, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint16_t;

/* Variables and functions */
void unaligned_write_be16(void *_u, uint16_t a) {
  uint8_t *u = _u;
  u[0] = (uint8_t)(a >> 8);
  u[1] = (uint8_t)a;
}


x86 assembly (clang, -O0):
<unaligned_write_be16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
movslq %eax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
movslq -0xc(%rbp),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<unaligned_write_be16>:
movslq %esi,%rax
sar    $0x8,%esi
movslq %esi,%rcx
mov    %rcx,(%rdi)
mov    %rax,0x8(%rdi)
ret

LLVM IR (-O0):
define void @unaligned_write_be16(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i64*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i64*
store i64* %7, i64** %5
%8 = load i32, i32* %4
%9 = ashr i32 %8, 8
%10 = sext i32 %9 to i64
%11 = load i64*, i64** %5
%12 = getelementptr inbounds i64, i64* %11, i64 0
store i64 %10, i64* %12
%13 = load i32, i32* %4
%14 = sext i32 %13 to i64
%15 = load i64*, i64** %5
%16 = getelementptr inbounds i64, i64* %15, i64 1
store i64 %14, i64* %16
ret void
}

LLVM IR (-O2):
define void @unaligned_write_be16(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i64*
%4 = ashr i32 %1, 8
%5 = sext i32 %4 to i64
store i64 %5, i64* %3
%6 = sext i32 %1 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 8
%8 = bitcast i8* %7 to i64*
store i64 %6, i64* %8
ret void
}
int islower(int ch) { return (unsigned)ch - 'a' < 26; }


x86 assembly (clang, -O0):
<islower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x61,%eax
cmp    $0x1a,%eax
setb   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<islower>:
add    $0xffffff9f,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @islower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub i32 %3, 97
%5 = icmp ult i32 %4, 26
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @islower(i32 %0) {
%2 = add i32 %0, -97
%3 = icmp ult i32 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int number_occurrences_char(char, char *);
int timlib_character_count(char char_to_count, char *source) {
  return number_occurrences_char(char_to_count, source);
}


x86 assembly (clang, -O0):
<timlib_character_count>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x1(%rbp),%al
mov    -0x10(%rbp),%rsi
movsbl %al,%edi
call   1030 <number_occurrences_char@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timlib_character_count>:
jmp    1030 <number_occurrences_char@plt>

LLVM IR (-O0):
define i32 @timlib_character_count(i8 signext %0, i8* %1) {
%3 = alloca i8
%4 = alloca i8*
store i8 %0, i8* %3
store i8* %1, i8** %4
%5 = load i8, i8* %3
%6 = load i8*, i8** %4
%7 = call i32 @number_occurrences_char(i8 signext %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @timlib_character_count(i8 signext %0, i8* %1) {
%3 = tail call i32 @number_occurrences_char(i8 signext %0, i8* %1)
ret i32 %3
}
/* Type definitions */
typedef int pid_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int wait(int *);
void sigchld_handler(int sig) {
  pid_t pid;
  int stat;
  pid = wait(&stat);
  printf("child %d terminated\n", pid);
}


x86 assembly (clang, -O0):
<sigchld_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0xc(%rbp),%rdi
call   1040 <wait@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xebf(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigchld_handler>:
push   %rax
lea    0x4(%rsp),%rdi
call   1040 <wait@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [21 x i8] c"child %d terminated\0A\00"
define void @sigchld_handler(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = call i32 @wait(i32* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"child %d terminated\0A\00"
define void @sigchld_handler(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @wait(i32* %2)
%5 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}
/* Type definitions */
struct in6_addr {
  int dummy;
};

/* Variables and functions */
int ipv6_route_op(int, int, struct in6_addr *, int, int, int);
int del_ipv6_route(int sock_fd, struct in6_addr *addr, int prefix_len,
                   int metric, int ifindex) {
  return ipv6_route_op(1, sock_fd, addr, prefix_len, metric, ifindex);
}


x86 assembly (clang, -O0):
<del_ipv6_route>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
mov    -0x1c(%rbp),%r9d
mov    $0x1,%edi
call   1030 <ipv6_route_op@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<del_ipv6_route>:
mov    %r8d,%r9d
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0x1,%edi
jmp    1030 <ipv6_route_op@plt>

LLVM IR (-O0):
%struct.in6_addr = type { i32 }
define i32 @del_ipv6_route(i32 %0, %struct.in6_addr* %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca %struct.in6_addr*
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store %struct.in6_addr* %1, %struct.in6_addr** %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load %struct.in6_addr*, %struct.in6_addr** %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i32 @ipv6_route_op(i32 1, i32 %11, %struct.in6_addr* %12, i32 %13, i32 %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
%struct.in6_addr = type { i32 }
define i32 @del_ipv6_route(i32 %0, %struct.in6_addr* %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @ipv6_route_op(i32 1, i32 %0, %struct.in6_addr* %1, i32 %2, i32 %3, i32 %4)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ bar(int);
int /*<<< orphan*/ foo(int *);
void baz(void) {
  int i;
  if (i)
    bar(i);
  foo(&i);
}


x86 assembly (clang, -O0):
<baz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
cmpl   $0x0,-0x4(%rbp)
je     113a <baz+0x1a>
mov    -0x4(%rbp),%edi
call   1030 <bar@plt>
lea    -0x4(%rbp),%rdi
call   1040 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz>:
push   %rax
call   1030 <bar@plt>
lea    0x4(%rsp),%rdi
call   1040 <foo@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @baz() {
%1 = alloca i32
%2 = load i32, i32* %1
%3 = icmp ne i32 %2, 0
br i1 %3, label %4, label %7
4: ; preds = %0
%5 = load i32, i32* %1
%6 = call i32 @bar(i32 %5)
br label %7
7: ; preds = %4, %0
%8 = call i32 @foo(i32* %1)
ret void
}

LLVM IR (-O2):
define void @baz() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @bar(i32 undef)
%4 = call i32 @foo(i32* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, int *, int *, int *);
int main() {
  int a, b, c, d;
  scanf("%d %d %d %d", &a, &b, &c, &d);
  printf("DIFERENCA = %d\n", a * b - c * d);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%r8
call   1040 <scanf@plt>
mov    -0x8(%rbp),%esi
imul   -0xc(%rbp),%esi
mov    -0x10(%rbp),%eax
imul   -0x14(%rbp),%eax
sub    %eax,%esi
lea    0xeaa(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
lea    0xed5(%rip),%rdi
lea    0x14(%rsp),%rsi
lea    0x10(%rsp),%rdx
lea    0xc(%rsp),%rcx
lea    0x8(%rsp),%r8
call   1040 <scanf@plt>
mov    0x10(%rsp),%esi
imul   0x14(%rsp),%esi
mov    0x8(%rsp),%eax
imul   0xc(%rsp),%eax
sub    %eax,%esi
lea    0xead(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [12 x i8] c"%d %d %d %d\00"
@.str.1 = [16 x i8] c"DIFERENCA = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
%6 = call i32 @scanf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32* %2, i32* %3, i32* %4, i32* %5)
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = mul nsw i32 %7, %8
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = mul nsw i32 %10, %11
%13 = sub nsw i32 %9, %12
%14 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i32 %13)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"%d %d %d %d\00"
@.str.1 = [16 x i8] c"DIFERENCA = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %1 to i8*
%6 = bitcast i32* %2 to i8*
%7 = bitcast i32* %3 to i8*
%8 = bitcast i32* %4 to i8*
%9 = call i32 @scanf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2, i32* %3, i32* %4)
%10 = load i32, i32* %1
%11 = load i32, i32* %2
%12 = mul nsw i32 %11, %10
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = mul nsw i32 %14, %13
%16 = sub nsw i32 %12, %15
%17 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i32 %16)
ret i32 0
}
/* Variables and functions */
size_t strnlen(char const *, size_t);
size_t strlen(const char *src) { return strnlen(src, ~((size_t)0)); }


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xffffffffffffffff,%rsi
call   1030 <strnlen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
mov    $0xffffffffffffffff,%rsi
jmp    1030 <strnlen@plt>

LLVM IR (-O0):
define i64 @strlen(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @strnlen(i8* %3, i64 -1)
ret i64 %4
}

LLVM IR (-O2):
define i64 @strlen(i8* nocapture %0) {
%2 = tail call i64 @strnlen(i8* %0, i64 -1)
ret i64 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ mpz_t;

/* Variables and functions */
int /*<<< orphan*/ mpz_add_ui(int /*<<< orphan*/, int /*<<< orphan*/, int);
int /*<<< orphan*/ mpz_clear(int /*<<< orphan*/);
int /*<<< orphan*/ mpz_divexact_ui(int /*<<< orphan*/, int /*<<< orphan*/, int);
int /*<<< orphan*/ mpz_init(int /*<<< orphan*/);
int /*<<< orphan*/ mpz_mul(int /*<<< orphan*/, int /*<<< orphan*/,
                           int /*<<< orphan*/);
void mpz_triangular(mpz_t rop, mpz_t op) {
  mpz_t i;
  mpz_init(i);
  mpz_add_ui(i, op, 1);
  mpz_mul(rop, op, i);
  mpz_divexact_ui(rop, rop, 2);
  mpz_clear(i);
  return;
}


x86 assembly (clang, -O0):
<mpz_triangular>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0xc(%rbp),%edi
call   1050 <mpz_init@plt>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x1,%edx
call   1040 <mpz_add_ui@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1060 <mpz_mul@plt>
mov    -0x4(%rbp),%edi
mov    -0x4(%rbp),%esi
mov    $0x2,%edx
call   1030 <mpz_divexact_ui@plt>
mov    -0xc(%rbp),%edi
call   1070 <mpz_clear@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpz_triangular>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1050 <mpz_init@plt>
mov    %ebx,%esi
mov    $0x1,%edx
call   1040 <mpz_add_ui@plt>
mov    %ebp,%edi
mov    %ebx,%esi
call   1060 <mpz_mul@plt>
mov    %ebp,%edi
mov    %ebp,%esi
mov    $0x2,%edx
call   1030 <mpz_divexact_ui@plt>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1070 <mpz_clear@plt>

LLVM IR (-O0):
define void @mpz_triangular(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %5
%7 = call i32 @mpz_init(i32 %6)
%8 = load i32, i32* %5
%9 = load i32, i32* %4
%10 = call i32 @mpz_add_ui(i32 %8, i32 %9, i32 1)
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = call i32 @mpz_mul(i32 %11, i32 %12, i32 %13)
%15 = load i32, i32* %3
%16 = load i32, i32* %3
%17 = call i32 @mpz_divexact_ui(i32 %15, i32 %16, i32 2)
%18 = load i32, i32* %5
%19 = call i32 @mpz_clear(i32 %18)
ret void
}

LLVM IR (-O2):
define void @mpz_triangular(i32 %0, i32 %1) {
%3 = tail call i32 @mpz_init(i32 undef)
%4 = tail call i32 @mpz_add_ui(i32 undef, i32 %1, i32 1)
%5 = tail call i32 @mpz_mul(i32 %0, i32 %1, i32 undef)
%6 = tail call i32 @mpz_divexact_ui(i32 %0, i32 %0, i32 2)
%7 = tail call i32 @mpz_clear(i32 undef)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ register_data(int, int);
int /*<<< orphan*/ register_size(int);
void collect_register(int n, void *buf) {
  memcpy(buf, register_data(n, 1), register_size(n));
}


x86 assembly (clang, -O0):
<collect_register>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1050 <register_data@plt>
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <register_size@plt>
mov    -0x20(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    %eax,%edx
call   1040 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<collect_register>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %edi,%ebp
mov    $0x1,%esi
call   1050 <register_data@plt>
mov    %eax,%ebx
mov    %ebp,%edi
call   1030 <register_size@plt>
mov    %r14,%rdi
mov    %ebx,%esi
mov    %eax,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <memcpy@plt>

LLVM IR (-O0):
define void @collect_register(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i32, i32* %3
%7 = call i32 @register_data(i32 %6, i32 1)
%8 = load i32, i32* %3
%9 = call i32 @register_size(i32 %8)
%10 = call i32 @memcpy(i8* %5, i32 %7, i32 %9)
ret void
}

LLVM IR (-O2):
define void @collect_register(i32 %0, i8* %1) {
%3 = tail call i32 @register_data(i32 %0, i32 1)
%4 = tail call i32 @register_size(i32 %0)
%5 = tail call i32 @memcpy(i8* %1, i32 %3, i32 %4)
ret void
}