xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct wl_resource {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wl_resource_post_event(struct wl_resource *,
                                          int /*<<< orphan*/,
                                          int /*<<< orphan*/);
void wl_seat_send_capabilities(struct wl_resource *resource_,
                               uint32_t capabilities) {
  wl_resource_post_event(resource_, 0, capabilities);
}


x86 assembly (clang, -O0):
<wl_seat_send_capabilities>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
xor    %esi,%esi
call   1030 <wl_resource_post_event@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wl_seat_send_capabilities>:
mov    %esi,%edx
xor    %esi,%esi
jmp    1030 <wl_resource_post_event@plt>

LLVM IR (-O0):
%struct.wl_resource = type { i32 }
define void @wl_seat_send_capabilities(%struct.wl_resource* %0, i32 %1) {
%3 = alloca %struct.wl_resource*
%4 = alloca i32
store %struct.wl_resource* %0, %struct.wl_resource** %3
store i32 %1, i32* %4
%5 = load %struct.wl_resource*, %struct.wl_resource** %3
%6 = load i32, i32* %4
%7 = call i32 @wl_resource_post_event(%struct.wl_resource* %5, i32 0, i32 %6)
ret void
}

LLVM IR (-O2):
%struct.wl_resource = type { i32 }
define void @wl_seat_send_capabilities(%struct.wl_resource* %0, i32 %1) {
%3 = tail call i32 @wl_resource_post_event(%struct.wl_resource* %0, i32 0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ControlSpeak();
int /*<<< orphan*/ ModelSpeak();
int /*<<< orphan*/ ViewSpeak();
int main(void) {
  ViewSpeak();
  ControlSpeak();
  ModelSpeak();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <ViewSpeak@plt>
mov    $0x0,%al
call   1030 <ControlSpeak@plt>
mov    $0x0,%al
call   1040 <ModelSpeak@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <ViewSpeak@plt>
xor    %eax,%eax
call   1030 <ControlSpeak@plt>
xor    %eax,%eax
call   1040 <ModelSpeak@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @ViewSpeak()
%3 = call i32 (...) @ControlSpeak()
%4 = call i32 (...) @ModelSpeak()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @ViewSpeak()
%2 = tail call i32 (...) @ControlSpeak()
%3 = tail call i32 (...) @ModelSpeak()
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int32_t onKeepalive(void *context) { return 0; }


x86 assembly (clang, -O0):
<onKeepalive>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<onKeepalive>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @onKeepalive(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @onKeepalive(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void *realloc(void *, size_t);
void *xrealloc(void *ptr, size_t sz) {
  void *ret;
  ret = realloc(ptr, sz);
  if (!ret)
    abort();
  return ret;
}


x86 assembly (clang, -O0):
<xrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1153 <xrealloc+0x33>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrealloc>:
push   %rax
call   1040 <realloc@plt>
test   %rax,%rax
je     112d <xrealloc+0xd>
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %13, label %11
11: ; preds = %2
%12 = call i32 (...) @abort()
unreachable
13: ; preds = %2
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
define noalias i8* @xrealloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 (...) @abort()
unreachable
7: ; preds = %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ AllocArrays();
int /*<<< orphan*/ ComputeResistanceProfile();
int /*<<< orphan*/ IntegrateResistanceProfile();
int /*<<< orphan*/ LoadData();
int /*<<< orphan*/ LoadZstep();
int /*<<< orphan*/ PrintProfiles();
int main() {
  AllocArrays();
  LoadData();
  ComputeResistanceProfile();
  LoadZstep();
  PrintProfiles();
  IntegrateResistanceProfile();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <AllocArrays@plt>
mov    $0x0,%al
call   1070 <LoadData@plt>
mov    $0x0,%al
call   1030 <ComputeResistanceProfile@plt>
mov    $0x0,%al
call   1050 <LoadZstep@plt>
mov    $0x0,%al
call   1080 <PrintProfiles@plt>
mov    $0x0,%al
call   1060 <IntegrateResistanceProfile@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <AllocArrays@plt>
xor    %eax,%eax
call   1070 <LoadData@plt>
xor    %eax,%eax
call   1030 <ComputeResistanceProfile@plt>
xor    %eax,%eax
call   1050 <LoadZstep@plt>
xor    %eax,%eax
call   1080 <PrintProfiles@plt>
xor    %eax,%eax
call   1060 <IntegrateResistanceProfile@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @AllocArrays()
%3 = call i32 (...) @LoadData()
%4 = call i32 (...) @ComputeResistanceProfile()
%5 = call i32 (...) @LoadZstep()
%6 = call i32 (...) @PrintProfiles()
%7 = call i32 (...) @IntegrateResistanceProfile()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @AllocArrays()
%2 = tail call i32 (...) @LoadData()
%3 = tail call i32 (...) @ComputeResistanceProfile()
%4 = tail call i32 (...) @LoadZstep()
%5 = tail call i32 (...) @PrintProfiles()
%6 = tail call i32 (...) @IntegrateResistanceProfile()
ret i32 0
}
int fun1019() { return 1019; }


x86 assembly (clang, -O0):
<fun1019>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3fb,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1019>:
mov    $0x3fb,%eax
ret

LLVM IR (-O0):
define i32 @fun1019() {
ret i32 1019
}

LLVM IR (-O2):
define i32 @fun1019() {
ret i32 1019
}
/* Variables and functions */
unsigned int sys_call(int, int, int /*<<< orphan*/, int /*<<< orphan*/,
                      int /*<<< orphan*/);
unsigned int gcd_start() { return sys_call(0x06, 2, 0, 0, 0); }


x86 assembly (clang, -O0):
<gcd_start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
mov    $0x2,%esi
xor    %r8d,%r8d
mov    %r8d,%edx
mov    %r8d,%ecx
call   1030 <sys_call@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd_start>:
mov    $0x6,%edi
mov    $0x2,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <sys_call@plt>

LLVM IR (-O0):
define i32 @gcd_start() {
%1 = call i32 @sys_call(i32 6, i32 2, i32 0, i32 0, i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @gcd_start() {
%1 = tail call i32 @sys_call(i32 6, i32 2, i32 0, i32 0, i32 0)
ret i32 %1
}
/* Variables and functions */
scalar_t__ strcmp(char *, char *);
int strings_are_equal(char *s1, char *s2) { return (strcmp(s1, s2) == 0); }


x86 assembly (clang, -O0):
<strings_are_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strings_are_equal>:
push   %rax
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @strings_are_equal(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i64 @strcmp(i8* %5, i8* %6)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @strings_are_equal(i8* %0, i8* %1) {
%3 = tail call i64 @strcmp(i8* %0, i8* %1)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
void sxe_log_assert_cb_default(void) {}


x86 assembly (clang, -O0):
<sxe_log_assert_cb_default>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sxe_log_assert_cb_default>:
ret

LLVM IR (-O0):
define void @sxe_log_assert_cb_default() {
ret void
}

LLVM IR (-O2):
define void @sxe_log_assert_cb_default() {
ret void
}
int foo2(void) { return 1; }


x86 assembly (clang, -O0):
<foo2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo2>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @foo2() {
ret i32 1
}

LLVM IR (-O2):
define i32 @foo2() {
ret i32 1
}
int upper_multiple(int N, int n) {
  int d = N / n;
  if (d * n == N)
    return N;
  else
    return (d + 1) * n;
}


x86 assembly (clang, -O0):
<upper_multiple>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
imul   -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jne    112f <upper_multiple+0x2f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    113c <upper_multiple+0x3c>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
imul   -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<upper_multiple>:
mov    %edi,%eax
cltd
idiv   %esi
mov    %eax,%ecx
imul   %esi,%ecx
add    $0x1,%eax
imul   %esi,%eax
cmp    %edi,%ecx
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @upper_multiple(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = sdiv i32 %7, %8
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = load i32, i32* %5
%12 = mul nsw i32 %10, %11
%13 = load i32, i32* %4
%14 = icmp eq i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %2
%16 = load i32, i32* %4
store i32 %16, i32* %3
br label %22
17: ; preds = %2
%18 = load i32, i32* %6
%19 = add nsw i32 %18, 1
%20 = load i32, i32* %5
%21 = mul nsw i32 %19, %20
store i32 %21, i32* %3
br label %22
22: ; preds = %17, %15
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @upper_multiple(i32 %0, i32 %1) {
%3 = sdiv i32 %0, %1
%4 = mul nsw i32 %3, %1
%5 = icmp eq i32 %4, %0
%6 = add nsw i32 %3, 1
%7 = mul nsw i32 %6, %1
%8 = select i1 %5, i32 %0, i32 %7
ret i32 %8
}
int fusion_float_read(float *p) { return p[0x12345]; }


x86 assembly (clang, -O0):
<fusion_float_read>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cvttss2si 0x48d14(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fusion_float_read>:
cvttss2si 0x48d14(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @fusion_float_read(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 74565
%5 = load float, float* %4
%6 = fptosi float %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @fusion_float_read(float* nocapture %0) {
%2 = getelementptr inbounds float, float* %0, i64 74565
%3 = load float, float* %2
%4 = fptosi float %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char, int);
int main() {
  char c = 0;
  int i = 0;
  for (i = 0; i <= 255; i++) {
    printf("%c - %d\n", c, i);
    c++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movb   $0x0,-0x5(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0xff,-0xc(%rbp)
jg     1169 <main+0x59>
mov    -0x5(%rbp),%al
mov    -0xc(%rbp),%edx
lea    0xeb5(%rip),%rdi
movsbl %al,%esi
call   1030 <printf@plt>
mov    -0x5(%rbp),%al
add    $0x1,%al
mov    %al,-0x5(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1131 <main+0x21>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xee3(%rip),%r14
nopl   (%rax)
movsbl %bl,%esi
mov    %r14,%rdi
mov    %ebx,%edx
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x100,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [9 x i8] c"%c - %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i32
store i32 0, i32* %1
store i8 0, i8* %2
store i32 0, i32* %3
store i32 0, i32* %3
br label %4
4: ; preds = %13, %0
%5 = load i32, i32* %3
%6 = icmp sle i32 %5, 255
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = load i8, i8* %2
%9 = load i32, i32* %3
%10 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8 signext %8, i32 %9)
%11 = load i8, i8* %2
%12 = add i8 %11, 1
store i8 %12, i8* %2
br label %13
13: ; preds = %7
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %4
16: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"%c - %d\0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %5, %1 ]
%3 = trunc i32 %2 to i8
%4 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8 signext %3, i32 %2)
%5 = add nuw nsw i32 %2, 1
%6 = icmp eq i32 %5, 256
br i1 %6, label %7, label %1
7: ; preds = %1
ret i32 0
}
int h2o_toupper(int ch) { return 'a' <= ch && ch <= 'z' ? ch - 0x20 : ch; }


x86 assembly (clang, -O0):
<h2o_toupper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x61,%eax
cmp    -0x4(%rbp),%eax
jg     112d <h2o_toupper+0x2d>
cmpl   $0x7a,-0x4(%rbp)
jg     112d <h2o_toupper+0x2d>
mov    -0x4(%rbp),%eax
sub    $0x20,%eax
mov    %eax,-0x8(%rbp)
jmp    1133 <h2o_toupper+0x33>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<h2o_toupper>:
lea    -0x61(%rdi),%ecx
lea    -0x20(%rdi),%eax
cmp    $0x1a,%ecx
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @h2o_toupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 97, %3
br i1 %4, label %5, label %11
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 122
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i32, i32* %2
%10 = sub nsw i32 %9, 32
br label %13
11: ; preds = %5, %1
%12 = load i32, i32* %2
br label %13
13: ; preds = %11, %8
%14 = phi i32 [ %10, %8 ], [ %12, %11 ]
ret i32 %14
}

LLVM IR (-O2):
define i32 @h2o_toupper(i32 %0) {
%2 = add i32 %0, -97
%3 = icmp ult i32 %2, 26
%4 = add nsw i32 %0, -32
%5 = select i1 %3, i32 %4, i32 %0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ disp_int(int);
int /*<<< orphan*/ disp_str(char *);
void spurious_irq(int irq) {
  disp_str("spurious irq: ");
  disp_int(irq);
  disp_str("\n");
}


x86 assembly (clang, -O0):
<spurious_irq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1030 <disp_str@plt>
mov    -0x4(%rbp),%edi
call   1040 <disp_int@plt>
lea    0xec9(%rip),%rdi
call   1030 <disp_str@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spurious_irq>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
call   1030 <disp_str@plt>
mov    %ebx,%edi
call   1040 <disp_int@plt>
lea    0xed2(%rip),%rdi
pop    %rbx
jmp    1030 <disp_str@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"spurious irq: \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @spurious_irq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @disp_str(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* %2
%5 = call i32 @disp_int(i32 %4)
%6 = call i32 @disp_str(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"spurious irq: \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @spurious_irq(i32 %0) {
%2 = tail call i32 @disp_str(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @disp_int(i32 %0)
%4 = tail call i32 @disp_str(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void onUSBCommTask(void *pvParameters) {}


x86 assembly (clang, -O0):
<onUSBCommTask>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<onUSBCommTask>:
ret

LLVM IR (-O0):
define void @onUSBCommTask(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @onUSBCommTask(i8* nocapture %0) {
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *xtrymalloc(size_t n) { return malloc(n); }


x86 assembly (clang, -O0):
<xtrymalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xtrymalloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @xtrymalloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @xtrymalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
void GPMCPrefetchFifoThrldValSet(unsigned int baseAddr,
                                 unsigned int fifoThrsld) {
  (*((volatile unsigned int *)(baseAddr + (0x1E0 + ((1 - 1) * (0x4)))))) &=
      ~(0x00007F00u);
  (*((volatile unsigned int *)(baseAddr + (0x1E0 + ((1 - 1) * (0x4)))))) |=
      ((fifoThrsld << (0x00000008u)) & (0x00007F00u));
}


x86 assembly (clang, -O0):
<GPMCPrefetchFifoThrldValSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1e0,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xffff80ff,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%edx
shl    $0x8,%edx
and    $0x7f00,%edx
mov    -0x4(%rbp),%eax
add    $0x1e0,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPMCPrefetchFifoThrldValSet>:
add    $0x1e0,%edi
andl   $0xffff80ff,(%rdi)
and    $0x7f,%esi
shl    $0x8,%esi
or     %esi,(%rdi)
ret

LLVM IR (-O0):
define void @GPMCPrefetchFifoThrldValSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add i32 %5, 480
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, -32513
store volatile i32 %10, i32* %8
%11 = load i32, i32* %4
%12 = shl i32 %11, 8
%13 = and i32 %12, 32512
%14 = load i32, i32* %3
%15 = add i32 %14, 480
%16 = zext i32 %15 to i64
%17 = inttoptr i64 %16 to i32*
%18 = load volatile i32, i32* %17
%19 = or i32 %18, %13
store volatile i32 %19, i32* %17
ret void
}

LLVM IR (-O2):
define void @GPMCPrefetchFifoThrldValSet(i32 %0, i32 %1) {
%3 = add i32 %0, 480
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, -32513
store volatile i32 %7, i32* %5
%8 = shl i32 %1, 8
%9 = and i32 %8, 32512
%10 = load volatile i32, i32* %5
%11 = or i32 %10, %9
store volatile i32 %11, i32* %5
ret void
}
const char *Resize_Name(void) { return "Reserve"; }


x86 assembly (clang, -O0):
<Resize_Name>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Resize_Name>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [8 x i8] c"Reserve\00"
define i8* @Resize_Name() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [8 x i8] c"Reserve\00"
define i8* @Resize_Name() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}
void swap(int *pa, int *pb) {
  int t = *pa;
  *pa = *pb;
  *pb = t;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
/* Variables and functions */
int bios(int);
int dio() { return bios(2 + 1); }


x86 assembly (clang, -O0):
<dio>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <bios@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dio>:
mov    $0x3,%edi
jmp    1030 <bios@plt>

LLVM IR (-O0):
define i32 @dio() {
%1 = call i32 @bios(i32 3)
ret i32 %1
}

LLVM IR (-O2):
define i32 @dio() {
%1 = tail call i32 @bios(i32 3)
ret i32 %1
}
void test_J() { asm volatile("" ::"J"(0)); }


x86 assembly (clang, -O0):
<test_J>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_J>:
ret

LLVM IR (-O0):
define void @test_J() {
ret void
}

LLVM IR (-O2):
define void @test_J() {
tail call void asm sideeffect "", "J,~{dirflag},~{fpsr},~{flags}"(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Footer_ism3();
int /*<<< orphan*/ Header_ism3(char *, int /*<<< orphan*/);
int /*<<< orphan*/ PassDirectHtml(char *);
int /*<<< orphan*/ printf(char *);
void NamedConf(void) {
  Header_ism3("NamedConf()", 0);
  printf("</center><pre><blockquote>");
  PassDirectHtml("/usr/local/idns/named.conf");
  printf("</blockquote></pre>");
  Footer_ism3();
}


x86 assembly (clang, -O0):
<NamedConf>:
push   %rbp
mov    %rsp,%rbp
lea    0xeb5(%rip),%rdi
xor    %esi,%esi
call   1030 <Header_ism3@plt>
lea    0xeb3(%rip),%rdi
call   1040 <printf@plt>
lea    0xec2(%rip),%rdi
call   1060 <PassDirectHtml@plt>
lea    0xed1(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <Footer_ism3@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<NamedConf>:
push   %rax
lea    0xeb8(%rip),%rdi
xor    %esi,%esi
call   1030 <Header_ism3@plt>
lea    0xeb6(%rip),%rdi
call   1040 <printf@plt>
lea    0xec5(%rip),%rdi
call   1060 <PassDirectHtml@plt>
lea    0xed4(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <Footer_ism3@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"NamedConf()\00"
@.str.1 = [27 x i8] c"</center><pre><blockquote>\00"
@.str.2 = [27 x i8] c"/usr/local/idns/named.conf\00"
@.str.3 = [20 x i8] c"</blockquote></pre>\00"
define void @NamedConf() {
%1 = call i32 @Header_ism3(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 0)
%2 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @PassDirectHtml(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.3, i64 0, i64 0))
%5 = call i32 (...) @Footer_ism3()
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"NamedConf()\00"
@.str.1 = [27 x i8] c"</center><pre><blockquote>\00"
@.str.2 = [27 x i8] c"/usr/local/idns/named.conf\00"
@.str.3 = [20 x i8] c"</blockquote></pre>\00"
define void @NamedConf() {
%1 = tail call i32 @Header_ism3(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 0)
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @PassDirectHtml(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str.3, i64 0, i64 0))
%5 = tail call i32 (...) @Footer_ism3()
ret void
}
int xtensa_uimm5(v)
int v;
{ return v >= 0 && v <= 31; }


x86 assembly (clang, -O0):
<xtensa_uimm5>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <xtensa_uimm5+0x20>
cmpl   $0x1f,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xtensa_uimm5>:
xor    %eax,%eax
cmp    $0x20,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @xtensa_uimm5(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 31
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @xtensa_uimm5(i32 %0) {
%2 = icmp ult i32 %0, 32
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ link_failure_pow();
scalar_t__ pow(double, double);
void test_pow(double d1, double d2) {
  if (pow(d1, d2) != pow(d1, d2))
    link_failure_pow();
}


x86 assembly (clang, -O0):
<test_pow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1040 <pow@plt>
mov    %rax,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1040 <pow@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
je     116b <test_pow+0x4b>
mov    $0x0,%al
call   1030 <link_failure_pow@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_pow>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm1,0x8(%rsp)
movsd  %xmm0,(%rsp)
call   1040 <pow@plt>
mov    %rax,%rbx
movsd  (%rsp),%xmm0
movsd  0x8(%rsp),%xmm1
call   1040 <pow@plt>
cmp    %rax,%rbx
jne    1153 <test_pow+0x33>
add    $0x10,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1030 <link_failure_pow@plt>

LLVM IR (-O0):
define void @test_pow(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call i64 @pow(double %5, double %6)
%8 = load double, double* %3
%9 = load double, double* %4
%10 = call i64 @pow(double %8, double %9)
%11 = icmp ne i64 %7, %10
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = call i32 (...) @link_failure_pow()
br label %14
14: ; preds = %12, %2
ret void
}

LLVM IR (-O2):
define void @test_pow(double %0, double %1) {
%3 = tail call i64 @pow(double %0, double %1)
%4 = tail call i64 @pow(double %0, double %1)
%5 = icmp eq i64 %3, %4
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 (...) @link_failure_pow()
br label %8
8: ; preds = %6, %2
ret void
}
int genhash_string_hash(const void *p) {
  int rv = 5381;
  int i = 0;
  char *str = (char *)p;
  for (i = 0; str[i] != 0x00; i++) {
    rv = ((rv << 5) + rv) ^ str[i];
  }
  return rv;
}


x86 assembly (clang, -O0):
<genhash_string_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x1505,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x18(%rbp),%rax
movslq -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1162 <genhash_string_hash+0x62>
mov    -0xc(%rbp),%eax
shl    $0x5,%eax
add    -0xc(%rbp),%eax
mov    -0x18(%rbp),%rcx
movslq -0x10(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
xor    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1125 <genhash_string_hash+0x25>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<genhash_string_hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1138 <genhash_string_hash+0x38>
add    $0x1,%rdi
mov    $0x1505,%edx
mov    %edx,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movsbl %cl,%ecx
shl    $0x5,%eax
add    %edx,%eax
xor    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
mov    %eax,%edx
test   %cl,%cl
jne    1120 <genhash_string_hash+0x20>
ret
mov    $0x1505,%eax
ret

LLVM IR (-O0):
define i32 @genhash_string_hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %2
store i32 5381, i32* %3
store i32 0, i32* %4
%6 = load i8*, i8** %2
store i8* %6, i8** %5
store i32 0, i32* %4
br label %7
7: ; preds = %27, %1
%8 = load i8*, i8** %5
%9 = load i32, i32* %4
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %30
15: ; preds = %7
%16 = load i32, i32* %3
%17 = shl i32 %16, 5
%18 = load i32, i32* %3
%19 = add nsw i32 %17, %18
%20 = load i8*, i8** %5
%21 = load i32, i32* %4
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %20, i64 %22
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
%26 = xor i32 %19, %25
store i32 %26, i32* %3
br label %27
27: ; preds = %15
%28 = load i32, i32* %4
%29 = add nsw i32 %28, 1
store i32 %29, i32* %4
br label %7
30: ; preds = %7
%31 = load i32, i32* %3
ret i32 %31
}

LLVM IR (-O2):
define i32 @genhash_string_hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %11, %4 ], [ 0, %1 ]
%6 = phi i8 [ %13, %4 ], [ %2, %1 ]
%7 = phi i32 [ %10, %4 ], [ 5381, %1 ]
%8 = sext i8 %6 to i32
%9 = mul i32 %7, 33
%10 = xor i32 %9, %8
%11 = add nuw nsw i64 %5, 1
%12 = getelementptr inbounds i8, i8* %0, i64 %11
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %4, %1
%16 = phi i32 [ 5381, %1 ], [ %10, %4 ]
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ call_int();
int /*<<< orphan*/ puts(char *);
scalar_t__ test_int();
int main(void) {
  if (test_int()) {
    puts("The Miniserver has not been installed.\n");
    return (1);
  }
  call_int();
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <test_int@plt>
cmp    $0x0,%rax
je     1168 <main+0x38>
lea    0xea9(%rip),%rdi
call   1040 <puts@plt>
movl   $0x1,-0x4(%rbp)
jmp    1176 <main+0x46>
mov    $0x0,%al
call   1030 <call_int@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1050 <test_int@plt>
test   %rax,%rax
je     1152 <main+0x22>
lea    0xeba(%rip),%rdi
call   1040 <puts@plt>
mov    $0x1,%ebx
jmp    1159 <main+0x29>
xor    %eax,%eax
call   1030 <call_int@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [40 x i8] c"The Miniserver has not been installed.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 (...) @test_int()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @puts(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
store i32 1, i32* %1
br label %8
6: ; preds = %0
%7 = call i32 (...) @call_int()
store i32 0, i32* %1
br label %8
8: ; preds = %6, %4
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
@.str = [40 x i8] c"The Miniserver has not been installed.\0A\00"
define i32 @main() {
%1 = tail call i64 (...) @test_int()
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
br label %7
5: ; preds = %0
%6 = tail call i32 (...) @call_int()
br label %7
7: ; preds = %5, %3
%8 = phi i32 [ 1, %3 ], [ 0, %5 ]
ret i32 %8
}
/* Variables and functions */
scalar_t__ syscall(int, int /*<<< orphan*/, int /*<<< orphan*/,
                   int /*<<< orphan*/);
int fork(void) { return (int)syscall(2, 0, 0, 0); }


x86 assembly (clang, -O0):
<fork>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
xor    %ecx,%ecx
mov    %ecx,%esi
mov    %ecx,%edx
call   1030 <syscall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fork>:
mov    $0x2,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @fork() {
%1 = call i64 @syscall(i32 2, i32 0, i32 0, i32 0)
%2 = trunc i64 %1 to i32
ret i32 %2
}

LLVM IR (-O2):
define i32 @fork() {
%1 = tail call i64 @syscall(i32 2, i32 0, i32 0, i32 0)
%2 = trunc i64 %1 to i32
ret i32 %2
}
/* Variables and functions */
float sqrt(float);
float consradii(int n) {
  float r;
  r = (n * (n - 1));
  r = 1 / r;
  r = sqrt(r);
  return r;
}


x86 assembly (clang, -O0):
<consradii>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
imul   %ecx,%eax
cvtsi2ss %eax,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  0xec8(%rip),%xmm0
divss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
call   1030 <sqrt@plt>
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<consradii>:
lea    -0x1(%rdi),%eax
imul   %edi,%eax
cvtsi2ss %eax,%xmm1
movss  0xede(%rip),%xmm0
divss  %xmm1,%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     1133 <consradii+0x23>
sqrtss %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define float @consradii(i32 %0) {
%2 = alloca i32
%3 = alloca float
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* %2
%6 = sub nsw i32 %5, 1
%7 = mul nsw i32 %4, %6
%8 = sitofp i32 %7 to float
store float %8, float* %3
%9 = load float, float* %3
%10 = fdiv float 1.000000e+00, %9
store float %10, float* %3
%11 = load float, float* %3
%12 = call float @sqrt(float %11)
store float %12, float* %3
%13 = load float, float* %3
ret float %13
}

LLVM IR (-O2):
define float @consradii(i32 %0) {
%2 = add nsw i32 %0, -1
%3 = mul nsw i32 %2, %0
%4 = sitofp i32 %3 to float
%5 = fdiv float 1.000000e+00, %4
%6 = tail call float @sqrt(float %5)
ret float %6
}
/* Variables and functions */
double fabs(double);
double sign(double x, double y) {
  if (y >= 0.0)
    return (fabs(x));
  return (-fabs(x));
}


x86 assembly (clang, -O0):
<sign>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     113a <sign+0x3a>
movsd  -0x10(%rbp),%xmm0
movaps 0xed4(%rip),%xmm1
pand   %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1166 <sign+0x66>
movsd  -0x10(%rbp),%xmm0
movaps 0xeba(%rip),%xmm1
pand   %xmm1,%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sign>:
movapd 0xef8(%rip),%xmm2
andpd  %xmm0,%xmm2
orpd   0xefc(%rip),%xmm0
xorpd  %xmm3,%xmm3
cmpnlesd %xmm1,%xmm3
andpd  %xmm3,%xmm0
andnpd %xmm2,%xmm3
orpd   %xmm3,%xmm0
ret

LLVM IR (-O0):
define double @sign(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %5
%7 = fcmp oge double %6, 0.000000e+00
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load double, double* %4
%10 = call double @llvm.fabs.f64(double %9)
store double %10, double* %3
br label %15
11: ; preds = %2
%12 = load double, double* %4
%13 = call double @llvm.fabs.f64(double %12)
%14 = fneg double %13
store double %14, double* %3
br label %15
15: ; preds = %11, %8
%16 = load double, double* %3
ret double %16
}

LLVM IR (-O2):
define double @sign(double %0, double %1) {
%3 = fcmp ult double %1, 0.000000e+00
%4 = tail call double @llvm.fabs.f64(double %0)
%5 = fneg double %4
%6 = select i1 %3, double %5, double %4
ret double %6
}
/* Variables and functions */
int /*<<< orphan*/ NormalDynamicFunction();
int /*<<< orphan*/ StaticFunctionEmbeddedIntoDynamic();
int main() {
  NormalDynamicFunction();
  StaticFunctionEmbeddedIntoDynamic();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <NormalDynamicFunction@plt>
mov    $0x0,%al
call   1040 <StaticFunctionEmbeddedIntoDynamic@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <NormalDynamicFunction@plt>
xor    %eax,%eax
call   1040 <StaticFunctionEmbeddedIntoDynamic@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @NormalDynamicFunction()
%3 = call i32 (...) @StaticFunctionEmbeddedIntoDynamic()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @NormalDynamicFunction()
%2 = tail call i32 (...) @StaticFunctionEmbeddedIntoDynamic()
ret i32 0
}
int jpeg12_quality_scaling(int quality) {
  if (quality <= 0)
    quality = 1;
  if (quality > 100)
    quality = 100;
  if (quality < 50)
    quality = 5000 / quality;
  else
    quality = 200 - quality * 2;
  return quality;
}


x86 assembly (clang, -O0):
<jpeg12_quality_scaling>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jg     1118 <jpeg12_quality_scaling+0x18>
movl   $0x1,-0x4(%rbp)
cmpl   $0x64,-0x4(%rbp)
jle    1129 <jpeg12_quality_scaling+0x29>
movl   $0x64,-0x4(%rbp)
cmpl   $0x32,-0x4(%rbp)
jge    1144 <jpeg12_quality_scaling+0x44>
mov    $0x1388,%eax
cltd
idivl  -0x4(%rbp)
mov    %eax,-0x4(%rbp)
jmp    1154 <jpeg12_quality_scaling+0x54>
mov    -0x4(%rbp),%ecx
shl    $0x1,%ecx
mov    $0xc8,%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<jpeg12_quality_scaling>:
test   %edi,%edi
mov    $0x1,%eax
cmovg  %edi,%eax
cmp    $0x64,%eax
mov    $0x64,%ecx
cmovb  %eax,%ecx
cmp    $0x31,%ecx
ja     1127 <jpeg12_quality_scaling+0x27>
mov    $0x1388,%ax
xor    %edx,%edx
div    %cx
movzwl %ax,%eax
ret
add    %ecx,%ecx
mov    $0xc8,%eax
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @jpeg12_quality_scaling(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
store i32 1, i32* %2
br label %6
6: ; preds = %5, %1
%7 = load i32, i32* %2
%8 = icmp sgt i32 %7, 100
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 100, i32* %2
br label %10
10: ; preds = %9, %6
%11 = load i32, i32* %2
%12 = icmp slt i32 %11, 50
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %2
%15 = sdiv i32 5000, %14
store i32 %15, i32* %2
br label %20
16: ; preds = %10
%17 = load i32, i32* %2
%18 = mul nsw i32 %17, 2
%19 = sub nsw i32 200, %18
store i32 %19, i32* %2
br label %20
20: ; preds = %16, %13
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @jpeg12_quality_scaling(i32 %0) {
%2 = icmp sgt i32 %0, 1
%3 = select i1 %2, i32 %0, i32 1
%4 = icmp ult i32 %3, 100
%5 = select i1 %4, i32 %3, i32 100
%6 = icmp ult i32 %5, 50
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = trunc i32 %5 to i16
%9 = udiv i16 5000, %8
%10 = zext i16 %9 to i32
br label %14
11: ; preds = %1
%12 = mul nsw i32 %5, -2
%13 = add nsw i32 %12, 200
br label %14
14: ; preds = %11, %7
%15 = phi i32 [ %10, %7 ], [ %13, %11 ]
ret i32 %15
}
/* Variables and functions */
size_t const strlen(char const *);
scalar_t__ strncmp(char const *, char const *, size_t const);
bool string_match_start(const char *str, const char *pat) {
  const size_t pat_len = strlen(pat);
  return (strlen(str) >= pat_len && strncmp(str, pat, pat_len) == 0);
}


x86 assembly (clang, -O0):
<string_match_start>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    -0x18(%rbp),%rcx
mov    %al,-0x19(%rbp)
jb     1173 <string_match_start+0x53>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
sete   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_match_start>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %rax,%rbx
mov    %r15,%rdi
call   1040 <strlen@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rbx,%rcx
jb     1161 <string_match_start+0x41>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
call   1030 <strncmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @string_match_start(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = call i64 @strlen(i8* %6)
store i64 %7, i64* %5
%8 = load i8*, i8** %3
%9 = call i64 @strlen(i8* %8)
%10 = load i64, i64* %5
%11 = icmp uge i64 %9, %10
br i1 %11, label %12, label %18
12: ; preds = %2
%13 = load i8*, i8** %3
%14 = load i8*, i8** %4
%15 = load i64, i64* %5
%16 = call i64 @strncmp(i8* %13, i8* %14, i64 %15)
%17 = icmp eq i64 %16, 0
br label %18
18: ; preds = %12, %2
%19 = phi i1 [ false, %2 ], [ %17, %12 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @string_match_start(i8* %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%5 = icmp ult i64 %4, %3
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = tail call i64 @strncmp(i8* %0, i8* %1, i64 %3)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %6, %2
%11 = phi i32 [ 0, %2 ], [ %9, %6 ]
ret i32 %11
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ type;
};
typedef TYPE_1__ XEvent;
typedef int /*<<< orphan*/ Display;
typedef int Bool;

/* Variables and functions */
scalar_t__ GraphicsExpose;
scalar_t__ NoExpose;
Bool grexornoex(Display *dpy, XEvent *ev, char *arg) {
  return (ev->type == GraphicsExpose || ev->type == NoExpose);
}


x86 assembly (clang, -O0):
<grexornoex>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
mov    $0x1,%al
mov    0x2eb8(%rip),%rdx
cmp    (%rdx),%rcx
mov    %al,-0x19(%rbp)
je     1143 <grexornoex+0x43>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    0x2eae(%rip),%rcx
cmp    (%rcx),%rax
sete   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<grexornoex>:
mov    (%rsi),%rax
mov    0x2ece(%rip),%rcx
cmp    (%rcx),%rax
sete   %cl
mov    0x2ed1(%rip),%rdx
cmp    (%rdx),%rax
sete   %al
or     %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
%struct.TYPE_3__ = type { i64 }
@GraphicsExpose = global i64 0
@NoExpose = global i64 0
define i32 @grexornoex(i32* %0, %struct.TYPE_3__* %1, i8* %2) {
%4 = alloca i32*
%5 = alloca %struct.TYPE_3__*
%6 = alloca i8*
store i32* %0, i32** %4
store %struct.TYPE_3__* %1, %struct.TYPE_3__** %5
store i8* %2, i8** %6
%7 = load %struct.TYPE_3__*, %struct.TYPE_3__** %5
%8 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %7, i32 0, i32 0
%9 = load i64, i64* %8
%10 = load i64, i64* @GraphicsExpose
%11 = icmp eq i64 %9, %10
br i1 %11, label %18, label %12
12: ; preds = %3
%13 = load %struct.TYPE_3__*, %struct.TYPE_3__** %5
%14 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %13, i32 0, i32 0
%15 = load i64, i64* %14
%16 = load i64, i64* @NoExpose
%17 = icmp eq i64 %15, %16
br label %18
18: ; preds = %12, %3
%19 = phi i1 [ true, %3 ], [ %17, %12 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i64 }
@GraphicsExpose = global i64 0
@NoExpose = global i64 0
define i32 @grexornoex(i32* nocapture readnone %0, %struct.TYPE_3__* nocapture %1, i8* nocapture readnone %2) {
%4 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %1, i64 0, i32 0
%5 = load i64, i64* %4
%6 = load i64, i64* @GraphicsExpose
%7 = icmp eq i64 %5, %6
%8 = load i64, i64* @NoExpose
%9 = icmp eq i64 %5, %8
%10 = select i1 %7, i1 true, i1 %9
%11 = zext i1 %10 to i32
ret i32 %11
}
void gtk_notebook_get_tab_label_text() {}


x86 assembly (clang, -O0):
<gtk_notebook_get_tab_label_text>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_notebook_get_tab_label_text>:
ret

LLVM IR (-O0):
define void @gtk_notebook_get_tab_label_text() {
ret void
}

LLVM IR (-O2):
define void @gtk_notebook_get_tab_label_text() {
ret void
}
unsigned int p1(unsigned int a, unsigned int b) { return a >> b; }


x86 assembly (clang, -O0):
<p1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<p1>:
mov    %esi,%ecx
mov    %edi,%eax
shr    %cl,%eax
ret

LLVM IR (-O0):
define i32 @p1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = lshr i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @p1(i32 %0, i32 %1) {
%3 = lshr i32 %0, %1
ret i32 %3
}
/* Variables and functions */
int initI2cBus(char *, int);
int /*<<< orphan*/ writeI2cReg(int, int, int);
int initI2C() {
  int i2cFileDesc = initI2cBus("/dev/i2c-1", 0x20);
  writeI2cReg(i2cFileDesc, 0x00, 0x00);
  writeI2cReg(i2cFileDesc, 0x01, 0x00);
  writeI2cReg(i2cFileDesc, 0x14, 0x00);
  writeI2cReg(i2cFileDesc, 0x15, 0x00);
  return i2cFileDesc;
}


x86 assembly (clang, -O0):
<initI2C>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
mov    $0x20,%esi
call   1040 <initI2cBus@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <writeI2cReg@plt>
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
xor    %edx,%edx
call   1030 <writeI2cReg@plt>
mov    -0x4(%rbp),%edi
mov    $0x14,%esi
xor    %edx,%edx
call   1030 <writeI2cReg@plt>
mov    -0x4(%rbp),%edi
mov    $0x15,%esi
xor    %edx,%edx
call   1030 <writeI2cReg@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initI2C>:
push   %rbx
lea    0xed8(%rip),%rdi
mov    $0x20,%esi
call   1040 <initI2cBus@plt>
mov    %eax,%ebx
mov    %eax,%edi
xor    %esi,%esi
xor    %edx,%edx
call   1030 <writeI2cReg@plt>
mov    %ebx,%edi
mov    $0x1,%esi
xor    %edx,%edx
call   1030 <writeI2cReg@plt>
mov    %ebx,%edi
mov    $0x14,%esi
xor    %edx,%edx
call   1030 <writeI2cReg@plt>
mov    %ebx,%edi
mov    $0x15,%esi
xor    %edx,%edx
call   1030 <writeI2cReg@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"/dev/i2c-1\00"
define i32 @initI2C() {
%1 = alloca i32
%2 = call i32 @initI2cBus(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 32)
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @writeI2cReg(i32 %3, i32 0, i32 0)
%5 = load i32, i32* %1
%6 = call i32 @writeI2cReg(i32 %5, i32 1, i32 0)
%7 = load i32, i32* %1
%8 = call i32 @writeI2cReg(i32 %7, i32 20, i32 0)
%9 = load i32, i32* %1
%10 = call i32 @writeI2cReg(i32 %9, i32 21, i32 0)
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
@.str = [11 x i8] c"/dev/i2c-1\00"
define i32 @initI2C() {
%1 = tail call i32 @initI2cBus(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 32)
%2 = tail call i32 @writeI2cReg(i32 %1, i32 0, i32 0)
%3 = tail call i32 @writeI2cReg(i32 %1, i32 1, i32 0)
%4 = tail call i32 @writeI2cReg(i32 %1, i32 20, i32 0)
%5 = tail call i32 @writeI2cReg(i32 %1, i32 21, i32 0)
ret i32 %1
}
const char *C_Float_Name(void) { return "C_Float"; }


x86 assembly (clang, -O0):
<C_Float_Name>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<C_Float_Name>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [8 x i8] c"C_Float\00"
define i8* @C_Float_Name() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [8 x i8] c"C_Float\00"
define i8* @C_Float_Name() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}