xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ strlen(char *);
char *shortenstr(char *str, int len) {
  int slen = (int)strlen(str);
  if (slen < len + 1)
    return str;
  str += (slen - len);
  str[0] = '+';
  return str;
}


x86 assembly (clang, -O0):
<shortenstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    -0x14(%rbp),%ecx
add    $0x1,%ecx
cmp    %ecx,%eax
jge    1149 <shortenstr+0x39>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    116c <shortenstr+0x5c>
mov    -0x18(%rbp),%ecx
sub    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movb   $0x2b,(%rax)
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shortenstr>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <strlen@plt>
sub    %ebp,%eax
jle    112a <shortenstr+0x1a>
cltq
movb   $0x2b,(%rbx,%rax,1)
add    %rax,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @shortenstr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i8*, i8** %4
%8 = call i64 @strlen(i8* %7)
%9 = trunc i64 %8 to i32
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = load i32, i32* %5
%12 = add nsw i32 %11, 1
%13 = icmp slt i32 %10, %12
br i1 %13, label %14, label %16
14: ; preds = %2
%15 = load i8*, i8** %4
store i8* %15, i8** %3
br label %26
16: ; preds = %2
%17 = load i32, i32* %6
%18 = load i32, i32* %5
%19 = sub nsw i32 %17, %18
%20 = load i8*, i8** %4
%21 = sext i32 %19 to i64
%22 = getelementptr inbounds i8, i8* %20, i64 %21
store i8* %22, i8** %4
%23 = load i8*, i8** %4
%24 = getelementptr inbounds i8, i8* %23, i64 0
store i8 43, i8* %24
%25 = load i8*, i8** %4
store i8* %25, i8** %3
br label %26
26: ; preds = %16, %14
%27 = load i8*, i8** %3
ret i8* %27
}

LLVM IR (-O2):
define i8* @shortenstr(i8* %0, i32 %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = trunc i64 %3 to i32
%5 = icmp sgt i32 %4, %1
br i1 %5, label %6, label %10
6: ; preds = %2
%7 = sub nsw i32 %4, %1
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %0, i64 %8
store i8 43, i8* %9
br label %10
10: ; preds = %2, %6
%11 = phi i8* [ %9, %6 ], [ %0, %2 ]
ret i8* %11
}
unsigned setbitsi(unsigned x, int p, int n, unsigned y) {
  return (x & ((~0 << (p + 1)) | (~(~0 << (p + 1 - n))))) |
         ((y & ~(~0 << n)) << (p + 1 - n));
}


x86 assembly (clang, -O0):
<setbitsi>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
sub    -0xc(%rbp),%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
mov    -0x14(%rbp),%ecx
xor    $0xffffffff,%edx
or     %edx,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    $0xffffffff,%esi
shl    %cl,%esi
mov    %esi,%ecx
xor    $0xffffffff,%ecx
and    %ecx,%edx
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
sub    -0xc(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setbitsi>:
mov    %ecx,%r8d
mov    %edx,%r9d
add    $0x1,%esi
mov    $0xffffffff,%eax
mov    $0xffffffff,%r10d
mov    %esi,%ecx
shl    %cl,%r10d
sub    %edx,%esi
mov    $0xffffffff,%edx
mov    %esi,%ecx
shl    %cl,%edx
not    %edx
mov    %r9d,%ecx
shl    %cl,%eax
or     %r10d,%edx
and    %edi,%edx
not    %eax
and    %r8d,%eax
mov    %esi,%ecx
shl    %cl,%eax
or     %edx,%eax
ret

LLVM IR (-O0):
define i32 @setbitsi(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = add nsw i32 %10, 1
%12 = shl i32 -1, %11
%13 = load i32, i32* %6
%14 = add nsw i32 %13, 1
%15 = load i32, i32* %7
%16 = sub nsw i32 %14, %15
%17 = shl i32 -1, %16
%18 = xor i32 %17, -1
%19 = or i32 %12, %18
%20 = and i32 %9, %19
%21 = load i32, i32* %8
%22 = load i32, i32* %7
%23 = shl i32 -1, %22
%24 = xor i32 %23, -1
%25 = and i32 %21, %24
%26 = load i32, i32* %6
%27 = add nsw i32 %26, 1
%28 = load i32, i32* %7
%29 = sub nsw i32 %27, %28
%30 = shl i32 %25, %29
%31 = or i32 %20, %30
ret i32 %31
}

LLVM IR (-O2):
define i32 @setbitsi(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = add nsw i32 %1, 1
%6 = shl nsw i32 -1, %5
%7 = sub nsw i32 %5, %2
%8 = shl nsw i32 -1, %7
%9 = xor i32 %8, -1
%10 = or i32 %6, %9
%11 = and i32 %10, %0
%12 = shl nsw i32 -1, %2
%13 = xor i32 %12, -1
%14 = and i32 %13, %3
%15 = shl i32 %14, %7
%16 = or i32 %11, %15
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ floats_mat44_inv(float const *, float *);
int /*<<< orphan*/ floats_mat44_rotate_vector(float *, float const *, float *);
void floats_mat44_inv_rotate_vector(const float M[16], const float in[3],
                                    float out[3]) {
  float T[16];
  floats_mat44_inv(M, T);
  floats_mat44_rotate_vector(T, in, out);
}


x86 assembly (clang, -O0):
<floats_mat44_inv_rotate_vector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x60(%rbp),%rsi
call   1040 <floats_mat44_inv@plt>
lea    -0x60(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <floats_mat44_rotate_vector@plt>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<floats_mat44_inv_rotate_vector>:
push   %r15
push   %r14
push   %rbx
sub    $0x40,%rsp
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %rsp,%r15
mov    %r15,%rsi
call   1040 <floats_mat44_inv@plt>
mov    %r15,%rdi
mov    %rbx,%rsi
mov    %r14,%rdx
call   1030 <floats_mat44_rotate_vector@plt>
add    $0x40,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @floats_mat44_inv_rotate_vector(float* %0, float* %1, float* %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float*
%7 = alloca [16 x float]
store float* %0, float** %4
store float* %1, float** %5
store float* %2, float** %6
%8 = load float*, float** %4
%9 = getelementptr inbounds [16 x float], [16 x float]* %7, i64 0, i64 0
%10 = call i32 @floats_mat44_inv(float* %8, float* %9)
%11 = getelementptr inbounds [16 x float], [16 x float]* %7, i64 0, i64 0
%12 = load float*, float** %5
%13 = load float*, float** %6
%14 = call i32 @floats_mat44_rotate_vector(float* %11, float* %12, float* %13)
ret void
}

LLVM IR (-O2):
define void @floats_mat44_inv_rotate_vector(float* %0, float* %1, float* %2) {
%4 = alloca [16 x float]
%5 = bitcast [16 x float]* %4 to i8*
%6 = getelementptr inbounds [16 x float], [16 x float]* %4, i64 0, i64 0
%7 = call i32 @floats_mat44_inv(float* %0, float* %6)
%8 = call i32 @floats_mat44_rotate_vector(float* %6, float* %1, float* %2)
ret void
}
int gcd(int u, int v) {
  int temp;
  while (u > 0) {
    if (u < v) {
      temp = u;
      u = v;
      v = temp;
    }
    u = u % v;
  }
  return v;
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1141 <gcd+0x41>
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1132 <gcd+0x32>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0x4(%rbp)
jmp    110a <gcd+0xa>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
test   %edi,%edi
jle    1126 <gcd+0x26>
mov    %edi,%edx
mov    %esi,%ecx
nopl   0x0(%rax,%rax,1)
cmp    %esi,%edx
cmovl  %edx,%ecx
cmovl  %esi,%edx
mov    %edx,%eax
cltd
idiv   %ecx
mov    %ecx,%esi
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %ecx,%eax
ret
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %21
9: ; preds = %6
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %17
13: ; preds = %9
%14 = load i32, i32* %3
store i32 %14, i32* %5
%15 = load i32, i32* %4
store i32 %15, i32* %3
%16 = load i32, i32* %5
store i32 %16, i32* %4
br label %17
17: ; preds = %13, %9
%18 = load i32, i32* %3
%19 = load i32, i32* %4
%20 = srem i32 %18, %19
store i32 %20, i32* %3
br label %6
21: ; preds = %6
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %12
4: ; preds = %2, %4
%5 = phi i32 [ %10, %4 ], [ %0, %2 ]
%6 = phi i32 [ %8, %4 ], [ %1, %2 ]
%7 = icmp slt i32 %5, %6
%8 = select i1 %7, i32 %5, i32 %6
%9 = select i1 %7, i32 %6, i32 %5
%10 = srem i32 %9, %8
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %2
%13 = phi i32 [ %1, %2 ], [ %8, %4 ]
ret i32 %13
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ prg4setBank3(int);
void m31setParams5003(uint16_t addr, uint8_t val) {
  (void)addr;
  prg4setBank3(val << 12);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
shl    $0xc,%edi
call   1030 <prg4setBank3@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    %esi,%edi
shl    $0xc,%edi
jmp    1030 <prg4setBank3@plt>

LLVM IR (-O0):
define void @m31setParams5003(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %6, 12
%8 = call i32 @prg4setBank3(i32 %7)
ret void
}

LLVM IR (-O2):
define void @m31setParams5003(i32 %0, i32 %1) {
%3 = shl i32 %1, 12
%4 = tail call i32 @prg4setBank3(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pmu_reg_write(int, int);
void pmu_adc_disable() {
  pmu_reg_write(0x3B, ((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) |
                       (1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) | (1 << 9) |
                       (1 << 10) | (0 << 11) | (0 << 12) | (1 << 13) |
                       (1 << 14) | (1 << 15) | (1 << 16) | (1 << 17) |
                       (1 << 18) | (0 << 19) | (1 << 20)));
}


x86 assembly (clang, -O0):
<pmu_adc_disable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3b,%edi
mov    $0x17e7ff,%esi
call   1030 <pmu_reg_write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmu_adc_disable>:
mov    $0x3b,%edi
mov    $0x17e7ff,%esi
jmp    1030 <pmu_reg_write@plt>

LLVM IR (-O0):
define void @pmu_adc_disable() {
%1 = call i32 @pmu_reg_write(i32 59, i32 1566719)
ret void
}

LLVM IR (-O2):
define void @pmu_adc_disable() {
%1 = tail call i32 @pmu_reg_write(i32 59, i32 1566719)
ret void
}
void gb_update_objects() { __asm__("jp 0xFF80"); }


x86 assembly (clang, -O0):
<gb_update_objects>:
push   %rbp
mov    %rsp,%rbp
jp     ff80 <completed.0+0xbf60>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gb_update_objects>:
jp     ff80 <completed.0+0xbf60>
ret

LLVM IR (-O0):
define void @gb_update_objects() {
ret void
}

LLVM IR (-O2):
define void @gb_update_objects() {
tail call void asm sideeffect "jp 0xFF80", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void version(void) { puts("Icarus version: pre-alpha"); }


x86 assembly (clang, -O0):
<version>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<version>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [26 x i8] c"Icarus version: pre-alpha\00"
define void @version() {
%1 = call i32 @puts(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [26 x i8] c"Icarus version: pre-alpha\00"
define void @version() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ send_event;
};
struct TYPE_4__ {
  TYPE_1__ xdestroywindow;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
int get_XEvent_xdestroywindow_send_event(void *_p) {
  return (int)((XEvent *)_p)->xdestroywindow.send_event;
}


x86 assembly (clang, -O0):
<get_XEvent_xdestroywindow_send_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xdestroywindow_send_event>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i32 @get_XEvent_xdestroywindow_send_event(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_XEvent_xdestroywindow_send_event(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
char flip(char dir) { return (12 - dir) % 12; }


x86 assembly (clang, -O0):
<flip>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0xc,%eax
sub    %ecx,%eax
mov    $0xc,%ecx
cltd
idiv   %ecx
mov    %dl,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flip>:
mov    $0xc,%eax
sub    %edi,%eax
imul   $0x2aab,%eax,%ecx
mov    %ecx,%edx
shr    $0x1f,%edx
shr    $0x11,%ecx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,2),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @flip(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = sub nsw i32 12, %4
%6 = srem i32 %5, 12
%7 = trunc i32 %6 to i8
ret i8 %7
}

LLVM IR (-O2):
define signext i8 @flip(i8 signext %0) {
%2 = sext i8 %0 to i16
%3 = sub nsw i16 12, %2
%4 = srem i16 %3, 12
%5 = trunc i16 %4 to i8
ret i8 %5
}
void *send_to_rb() {}


x86 assembly (clang, -O0):
<send_to_rb>:
push   %rbp
mov    %rsp,%rbp
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_to_rb>:
ret

LLVM IR (-O0):
define i8* @send_to_rb() {
%1 = alloca i8*
%2 = load i8*, i8** %1
ret i8* %2
}

LLVM IR (-O2):
define noalias i8* @send_to_rb() {
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ initIMU();
int /*<<< orphan*/ initMotorStuff();
int /*<<< orphan*/ initPIDs();
int /*<<< orphan*/ initRC();
int /*<<< orphan*/ initRCPins();
int /*<<< orphan*/ initSensorOrientation();
void updateAllParameters() {
  initMotorStuff();
  initPIDs();
  initIMU();
  initSensorOrientation();
  initRCPins();
  initRC();
}


x86 assembly (clang, -O0):
<updateAllParameters>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <initMotorStuff@plt>
mov    $0x0,%al
call   1080 <initPIDs@plt>
mov    $0x0,%al
call   1040 <initIMU@plt>
mov    $0x0,%al
call   1060 <initSensorOrientation@plt>
mov    $0x0,%al
call   1030 <initRCPins@plt>
mov    $0x0,%al
call   1070 <initRC@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<updateAllParameters>:
push   %rax
xor    %eax,%eax
call   1050 <initMotorStuff@plt>
xor    %eax,%eax
call   1080 <initPIDs@plt>
xor    %eax,%eax
call   1040 <initIMU@plt>
xor    %eax,%eax
call   1060 <initSensorOrientation@plt>
xor    %eax,%eax
call   1030 <initRCPins@plt>
xor    %eax,%eax
pop    %rcx
jmp    1070 <initRC@plt>

LLVM IR (-O0):
define void @updateAllParameters() {
%1 = call i32 (...) @initMotorStuff()
%2 = call i32 (...) @initPIDs()
%3 = call i32 (...) @initIMU()
%4 = call i32 (...) @initSensorOrientation()
%5 = call i32 (...) @initRCPins()
%6 = call i32 (...) @initRC()
ret void
}

LLVM IR (-O2):
define void @updateAllParameters() {
%1 = tail call i32 (...) @initMotorStuff()
%2 = tail call i32 (...) @initPIDs()
%3 = tail call i32 (...) @initIMU()
%4 = tail call i32 (...) @initSensorOrientation()
%5 = tail call i32 (...) @initRCPins()
%6 = tail call i32 (...) @initRC()
ret void
}
void ff_hevc_put_hevc_bi_w_epel_v32_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_epel_v32_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_epel_v32_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_epel_v32_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_epel_v32_12_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void help(void) {
  printf("Usage: accelerometer [options] <device path>\n"
         "  --debug         debug to stderr\n"
         "  --help          print this help text\n\n");
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<help>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [120 x i8] c"Usage: accelerometer [options] <device path>\0A --debug debug to stderr\0A --help print this help text\0A\0A\00"
define void @help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([120 x i8], [120 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [119 x i8] c"Usage: accelerometer [options] <device path>\0A --debug debug to stderr\0A --help print this help text\0A\00"
define void @help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([119 x i8], [119 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
uint32_t abs_u32(int32_t value) { return value > 0 ? value : -value; }


x86 assembly (clang, -O0):
<abs_u32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    111c <abs_u32+0x1c>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1124 <abs_u32+0x24>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs_u32>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs_u32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i32, i32* %2
br label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = sub nsw i32 0, %8
br label %10
10: ; preds = %7, %5
%11 = phi i32 [ %6, %5 ], [ %9, %7 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @abs_u32(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
__attribute__((always_)) void sync_mm_rss(struct task_struct *task,
                                          struct mm_struct *mm) {}


x86 assembly (clang, -O0):
<sync_mm_rss>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sync_mm_rss>:
ret

LLVM IR (-O0):
%struct.task_struct = type opaque
%struct.mm_struct = type opaque
define void @sync_mm_rss(%struct.task_struct* %0, %struct.mm_struct* %1) {
%3 = alloca %struct.task_struct*
%4 = alloca %struct.mm_struct*
store %struct.task_struct* %0, %struct.task_struct** %3
store %struct.mm_struct* %1, %struct.mm_struct** %4
ret void
}

LLVM IR (-O2):
%struct.task_struct = type opaque
%struct.mm_struct = type opaque
define void @sync_mm_rss(%struct.task_struct* nocapture %0, %struct.mm_struct* nocapture %1) {
ret void
}
char xor (char a, char b) {
  assert(is_binary(a) && is_binary(b));
  if (a == b)
    return '0';
  else
    return '1';
}


x86 assembly (clang, -O0):
<xor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x2(%rbp)
mov    %al,-0x3(%rbp)
movsbl -0x2(%rbp),%edi
mov    $0x0,%al
call   1040 <is_binary@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x4(%rbp)
je     1163 <xor+0x43>
movsbl -0x3(%rbp),%edi
mov    $0x0,%al
call   1040 <is_binary@plt>
cmp    $0x0,%eax
setne  %al
mov    %al,-0x4(%rbp)
mov    -0x4(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
mov    $0x0,%al
call   1030 <assert@plt>
movsbl -0x2(%rbp),%eax
movsbl -0x3(%rbp),%ecx
cmp    %ecx,%eax
jne    118b <xor+0x6b>
movb   $0x30,-0x1(%rbp)
jmp    118f <xor+0x6f>
movb   $0x31,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xor>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %edi,%ebp
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <is_binary@plt>
test   %eax,%eax
je     1148 <xor+0x28>
movsbl %r14b,%edi
xor    %eax,%eax
call   1040 <is_binary@plt>
xor    %ebx,%ebx
test   %eax,%eax
setne  %bl
mov    %ebx,%edi
xor    %eax,%eax
call   1030 <assert@plt>
cmp    %r14b,%bpl
sete   %al
xor    $0x31,%al
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define signext i8 @xor(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
%6 = load i8, i8* %4
%7 = sext i8 %6 to i32
%8 = call i32 (i32, ...) bitcast (i32 (...)* @is_binary to i32 (i32, ...)*)(i32 %7)
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %15
10: ; preds = %2
%11 = load i8, i8* %5
%12 = sext i8 %11 to i32
%13 = call i32 (i32, ...) bitcast (i32 (...)* @is_binary to i32 (i32, ...)*)(i32 %12)
%14 = icmp ne i32 %13, 0
br label %15
15: ; preds = %10, %2
%16 = phi i1 [ false, %2 ], [ %14, %10 ]
%17 = zext i1 %16 to i32
%18 = call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 %17)
%19 = load i8, i8* %4
%20 = sext i8 %19 to i32
%21 = load i8, i8* %5
%22 = sext i8 %21 to i32
%23 = icmp eq i32 %20, %22
br i1 %23, label %24, label %25
24: ; preds = %15
store i8 48, i8* %3
br label %26
25: ; preds = %15
store i8 49, i8* %3
br label %26
26: ; preds = %25, %24
%27 = load i8, i8* %3
ret i8 %27
}

LLVM IR (-O2):
define signext i8 @xor(i8 signext %0, i8 signext %1) {
%3 = sext i8 %0 to i32
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @is_binary to i32 (i32, ...)*)(i32 %3)
%5 = icmp eq i32 %4, 0
br i1 %5, label %11, label %6
6: ; preds = %2
%7 = sext i8 %1 to i32
%8 = tail call i32 (i32, ...) bitcast (i32 (...)* @is_binary to i32 (i32, ...)*)(i32 %7)
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %6, %2
%12 = phi i32 [ 0, %2 ], [ %10, %6 ]
%13 = tail call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 %12)
%14 = icmp eq i8 %0, %1
%15 = select i1 %14, i8 48, i8 49
ret i8 %15
}
/* Type definitions */
struct constant {
  int dummy;
};

/* Variables and functions */
struct constant *constant_str_integer(char const *);
struct constant *constant_oct_integer(const char *string) {
  return constant_str_integer(string);
}


x86 assembly (clang, -O0):
<constant_oct_integer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <constant_str_integer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<constant_oct_integer>:
jmp    1030 <constant_str_integer@plt>

LLVM IR (-O0):
%struct.constant = type { i32 }
define %struct.constant* @constant_oct_integer(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call %struct.constant* @constant_str_integer(i8* %3)
ret %struct.constant* %4
}

LLVM IR (-O2):
%struct.constant = type { i32 }
define %struct.constant* @constant_oct_integer(i8* %0) {
%2 = tail call %struct.constant* @constant_str_integer(i8* %0)
ret %struct.constant* %2
}
unsigned long ROR64c(unsigned long word, const int i) {
  asm("rorq %%cl,%0" : "=r"(word) : "0"(word), "c"(i));
  return word;
}


x86 assembly (clang, -O0):
<ROR64c>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
ror    %cl,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ROR64c>:
mov    %esi,%ecx
mov    %rdi,%rax
ror    %cl,%rax
ret

LLVM IR (-O0):
define i64 @ROR64c(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i64, i64* %3
%6 = load i32, i32* %4
%7 = call i64 asm "rorq %cl,$0", "=r,0,{cx},~{dirflag},~{fpsr},~{flags}"(i64 %5, i32 %6)
store i64 %7, i64* %3
%8 = load i64, i64* %3
ret i64 %8
}

LLVM IR (-O2):
define i64 @ROR64c(i64 %0, i32 %1) {
%3 = tail call i64 asm "rorq %cl,$0", "=r,0,{cx},~{dirflag},~{fpsr},~{flags}"(i64 %0, i32 %1)
ret i64 %3
}
void foo358(int p) {}


x86 assembly (clang, -O0):
<foo358>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo358>:
ret

LLVM IR (-O0):
define void @foo358(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo358(i32 %0) {
ret void
}
/* Type definitions */
typedef int pid_t;

/* Variables and functions */
int setsid();
int test(void) {
  pid_t pid;
  pid = setsid();
  return (pid == -1) ? -1 : 0;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <setsid@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edx
xor    %eax,%eax
mov    $0xffffffff,%ecx
cmp    $0xffffffff,%edx
cmove  %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
push   %rax
xor    %eax,%eax
call   1030 <setsid@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
sete   %cl
neg    %ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @test() {
%1 = alloca i32
%2 = call i32 (...) @setsid()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, -1
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 -1, i32 0
ret i32 %6
}

LLVM IR (-O2):
define i32 @test() {
%1 = tail call i32 (...) @setsid()
%2 = icmp eq i32 %1, -1
%3 = sext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ dumpio_read_data(int /*<<< orphan*/, int /*<<< orphan*/,
                                    void *);
void dumpio_read_data_(int32_t *fid, int32_t *idxsize, void *data) {
  int32_t ierr;
  ierr = dumpio_read_data(*fid, *idxsize, data);
}


x86 assembly (clang, -O0):
<dumpio_read_data_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
mov    -0x18(%rbp),%rdx
call   1030 <dumpio_read_data@plt>
mov    %eax,-0x1c(%rbp)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dumpio_read_data_>:
mov    (%rdi),%edi
mov    (%rsi),%esi
jmp    1030 <dumpio_read_data@plt>

LLVM IR (-O0):
define void @dumpio_read_data_(i32* %0, i32* %1, i8* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i8*
%7 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i8* %2, i8** %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %5
%11 = load i32, i32* %10
%12 = load i8*, i8** %6
%13 = call i32 @dumpio_read_data(i32 %9, i32 %11, i8* %12)
store i32 %13, i32* %7
ret void
}

LLVM IR (-O2):
define void @dumpio_read_data_(i32* nocapture %0, i32* nocapture %1, i8* %2) {
%4 = load i32, i32* %0
%5 = load i32, i32* %1
%6 = tail call i32 @dumpio_read_data(i32 %4, i32 %5, i8* %2)
ret void
}
/* Variables and functions */
int strlen(char const *);
scalar_t__ strncmp(char const *, char const *, int const);
int isRadix8(const char *c) {
  const char *PREFIX = "#o";
  const int PREFIX_SZ = strlen(PREFIX);
  if (c == NULL)
    return 0;
  if (strncmp(c, PREFIX, PREFIX_SZ) == 0)
    return PREFIX_SZ;
  else
    return 0;
}


x86 assembly (clang, -O0):
<isRadix8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
lea    0xecd(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0x1c(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    115a <isRadix8+0x3a>
movl   $0x0,-0x4(%rbp)
jmp    1186 <isRadix8+0x66>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
jne    117f <isRadix8+0x5f>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1186 <isRadix8+0x66>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isRadix8>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
lea    0xed3(%rip),%rdi
call   1040 <strlen@plt>
test   %rbx,%rbx
je     1157 <isRadix8+0x37>
mov    %eax,%ebp
lea    0xec0(%rip),%rsi
mov    %rbx,%rdi
mov    %eax,%edx
call   1030 <strncmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
cmove  %ebp,%eax
jmp    1159 <isRadix8+0x39>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"#o\00"
define i32 @isRadix8(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %4
%6 = load i8*, i8** %4
%7 = call i32 @strlen(i8* %6)
store i32 %7, i32* %5
%8 = load i8*, i8** %3
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 0, i32* %2
br label %20
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = load i8*, i8** %4
%14 = load i32, i32* %5
%15 = call i64 @strncmp(i8* %12, i8* %13, i32 %14)
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %19
17: ; preds = %11
%18 = load i32, i32* %5
store i32 %18, i32* %2
br label %20
19: ; preds = %11
store i32 0, i32* %2
br label %20
20: ; preds = %19, %17, %10
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
@.str = [3 x i8] c"#o\00"
define i32 @isRadix8(i8* %0) {
%2 = tail call i32 @strlen(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i8* %0, null
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = tail call i64 @strncmp(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %2)
%6 = icmp eq i64 %5, 0
%7 = select i1 %6, i32 %2, i32 0
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ change_bit(int, void volatile *);
void sync_change_bit(int nr, volatile void *addr) { change_bit(nr, addr); }


x86 assembly (clang, -O0):
<sync_change_bit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <change_bit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sync_change_bit>:
jmp    1030 <change_bit@plt>

LLVM IR (-O0):
define void @sync_change_bit(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i32 @change_bit(i32 %5, i8* %6)
ret void
}

LLVM IR (-O2):
define void @sync_change_bit(i32 %0, i8* %1) {
%3 = tail call i32 @change_bit(i32 %0, i8* %1)
ret void
}
/* Variables and functions */
int _islower(int);
int islower(int c) { return _islower(c); }


x86 assembly (clang, -O0):
<islower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_islower@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<islower>:
jmp    1030 <_islower@plt>

LLVM IR (-O0):
define i32 @islower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_islower(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @islower(i32 %0) {
%2 = tail call i32 @_islower(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void dothings() { printf("doing things\n"); }


x86 assembly (clang, -O0):
<dothings>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dothings>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"doing things\0A\00"
define void @dothings() {
%1 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [13 x i8] c"doing things\00"
define void @dothings() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret void
}
void foo7b() {}


x86 assembly (clang, -O0):
<foo7b>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo7b>:
ret

LLVM IR (-O0):
define void @foo7b() {
ret void
}

LLVM IR (-O2):
define void @foo7b() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
char getc(int /*<<< orphan*/ *);
char __scan_char(FILE *stream, int flags) { return getc(stream); }


x86 assembly (clang, -O0):
<__scan_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getc@plt>
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__scan_char>:
jmp    1030 <getc@plt>

LLVM IR (-O0):
define signext i8 @__scan_char(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = call signext i8 @getc(i32* %5)
ret i8 %6
}

LLVM IR (-O2):
define signext i8 @__scan_char(i32* nocapture %0, i32 %1) {
%3 = tail call signext i8 @getc(i32* %0)
ret i8 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ u_char;

/* Variables and functions */
int ns_name_skip(int /*<<< orphan*/ const **, int /*<<< orphan*/ const *);
int dn_skipname(const u_char *ptr, const u_char *eom) {
  const u_char *saveptr = ptr;
  if (ns_name_skip(&ptr, eom) == -1)
    return (-1);
  return ((int)(ptr - saveptr));
}


x86 assembly (clang, -O0):
<dn_skipname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rsi
lea    -0x10(%rbp),%rdi
call   1030 <ns_name_skip@plt>
cmp    $0xffffffff,%eax
jne    114a <dn_skipname+0x3a>
movl   $0xffffffff,-0x4(%rbp)
jmp    115c <dn_skipname+0x4c>
mov    -0x10(%rbp),%rax
mov    -0x20(%rbp),%rcx
sub    %rcx,%rax
sar    $0x2,%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dn_skipname>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %rdi,0x8(%rsp)
lea    0x8(%rsp),%rdi
call   1030 <ns_name_skip@plt>
mov    0x8(%rsp),%rcx
sub    %rbx,%rcx
shr    $0x2,%rcx
cmp    $0xffffffff,%eax
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @dn_skipname(i32* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
%7 = load i32*, i32** %4
store i32* %7, i32** %6
%8 = load i32*, i32** %5
%9 = call i32 @ns_name_skip(i32** %4, i32* %8)
%10 = icmp eq i32 %9, -1
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 -1, i32* %3
br label %20
12: ; preds = %2
%13 = load i32*, i32** %4
%14 = load i32*, i32** %6
%15 = ptrtoint i32* %13 to i64
%16 = ptrtoint i32* %14 to i64
%17 = sub i64 %15, %16
%18 = sdiv exact i64 %17, 4
%19 = trunc i64 %18 to i32
store i32 %19, i32* %3
br label %20
20: ; preds = %12, %11
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @dn_skipname(i32* %0, i32* %1) {
%3 = alloca i32*
store i32* %0, i32** %3
%4 = call i32 @ns_name_skip(i32** %3, i32* %1)
%5 = icmp eq i32 %4, -1
%6 = load i32*, i32** %3
%7 = ptrtoint i32* %6 to i64
%8 = ptrtoint i32* %0 to i64
%9 = sub i64 %7, %8
%10 = lshr exact i64 %9, 2
%11 = trunc i64 %10 to i32
%12 = select i1 %5, i32 -1, i32 %11
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ loadp_dst();
int /*<<< orphan*/ push();
void mfpi() {
  loadp_dst();
  push();
}


x86 assembly (clang, -O0):
<mfpi>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <loadp_dst@plt>
mov    $0x0,%al
call   1040 <push@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mfpi>:
push   %rax
xor    %eax,%eax
call   1030 <loadp_dst@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <push@plt>

LLVM IR (-O0):
define void @mfpi() {
%1 = call i32 (...) @loadp_dst()
%2 = call i32 (...) @push()
ret void
}

LLVM IR (-O2):
define void @mfpi() {
%1 = tail call i32 (...) @loadp_dst()
%2 = tail call i32 (...) @push()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ChangeVaultPassDialog();
void MenuChangeVaultPass(const char *key) { ChangeVaultPassDialog(); }


x86 assembly (clang, -O0):
<MenuChangeVaultPass>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <ChangeVaultPassDialog@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MenuChangeVaultPass>:
xor    %eax,%eax
jmp    1030 <ChangeVaultPassDialog@plt>

LLVM IR (-O0):
define void @MenuChangeVaultPass(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @ChangeVaultPassDialog()
ret void
}

LLVM IR (-O2):
define void @MenuChangeVaultPass(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @ChangeVaultPassDialog()
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ memcpy(char *, char *, int);
char *stringStore(char *src, int len) {
  char *s = (char *)malloc(len + 1);
  memcpy(s, src, len);
  s[len] = 0;
  return s;
}


x86 assembly (clang, -O0):
<stringStore>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
add    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <memcpy@plt>
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stringStore>:
push   %r15
push   %r14
push   %rbx
mov    %esi,%r15d
mov    %rdi,%r14
lea    0x1(%r15),%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15d,%edx
call   1030 <memcpy@plt>
movslq %r15d,%rax
movb   $0x0,(%rbx,%rax,1)
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @stringStore(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 1
%8 = call i64 @malloc(i32 %7)
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = load i8*, i8** %3
%12 = load i32, i32* %4
%13 = call i32 @memcpy(i8* %10, i8* %11, i32 %12)
%14 = load i8*, i8** %5
%15 = load i32, i32* %4
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
store i8 0, i8* %17
%18 = load i8*, i8** %5
ret i8* %18
}

LLVM IR (-O2):
define i8* @stringStore(i8* %0, i32 %1) {
%3 = add nsw i32 %1, 1
%4 = tail call i64 @malloc(i32 %3)
%5 = inttoptr i64 %4 to i8*
%6 = tail call i32 @memcpy(i8* %5, i8* %0, i32 %1)
%7 = sext i32 %1 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
store i8 0, i8* %8
ret i8* %5
}
int stun_msg2method(int msg) {
  return (msg & 0x000f) | ((msg & 0x00e0) >> 1) | ((msg & 0x3e00) >> 2);
}


x86 assembly (clang, -O0):
<stun_msg2method>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf,%eax
mov    -0x4(%rbp),%ecx
and    $0xe0,%ecx
sar    $0x1,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0x3e00,%ecx
sar    $0x2,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stun_msg2method>:
mov    %edi,%ecx
and    $0xf,%ecx
mov    %edi,%eax
shr    %eax
and    $0x70,%eax
or     %ecx,%eax
shr    $0x2,%edi
and    $0xf80,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @stun_msg2method(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 15
%5 = load i32, i32* %2
%6 = and i32 %5, 224
%7 = ashr i32 %6, 1
%8 = or i32 %4, %7
%9 = load i32, i32* %2
%10 = and i32 %9, 15872
%11 = ashr i32 %10, 2
%12 = or i32 %8, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @stun_msg2method(i32 %0) {
%2 = and i32 %0, 15
%3 = lshr i32 %0, 1
%4 = and i32 %3, 112
%5 = or i32 %4, %2
%6 = lshr i32 %0, 2
%7 = and i32 %6, 3968
%8 = or i32 %5, %7
ret i32 %8
}
char *ft_basename(const char *name) {
  const char *base;
  const char *current;
  char c;
  base = name;
  current = name;
  c = *current;
  while (c) {
    if (c == '/' || c == '\\')
      base = current + 1;
    current++;
    c = *current;
  }
  return (char *)base;
}


x86 assembly (clang, -O0):
<ft_basename>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x19(%rbp)
cmpb   $0x0,-0x19(%rbp)
je     116b <ft_basename+0x6b>
movsbl -0x19(%rbp),%eax
cmp    $0x2f,%eax
je     1145 <ft_basename+0x45>
movsbl -0x19(%rbp),%eax
cmp    $0x5c,%eax
jne    1151 <ft_basename+0x51>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x19(%rbp)
jmp    1121 <ft_basename+0x21>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_basename>:
mov    %rdi,%rax
lea    0x1(%rdi),%rcx
jmp    1117 <ft_basename+0x17>
nopl   0x0(%rax)
mov    %rcx,%rax
add    $0x1,%rcx
movzbl -0x1(%rcx),%edx
cmp    $0x2f,%dl
je     1110 <ft_basename+0x10>
cmp    $0x5c,%dl
je     1110 <ft_basename+0x10>
test   %dl,%dl
jne    1113 <ft_basename+0x13>
ret

LLVM IR (-O0):
define i8* @ft_basename(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %2
%6 = load i8*, i8** %2
store i8* %6, i8** %3
%7 = load i8*, i8** %2
store i8* %7, i8** %4
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
store i8 %9, i8* %5
br label %10
10: ; preds = %24, %1
%11 = load i8, i8* %5
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %29
13: ; preds = %10
%14 = load i8, i8* %5
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 47
br i1 %16, label %21, label %17
17: ; preds = %13
%18 = load i8, i8* %5
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 92
br i1 %20, label %21, label %24
21: ; preds = %17, %13
%22 = load i8*, i8** %4
%23 = getelementptr inbounds i8, i8* %22, i64 1
store i8* %23, i8** %3
br label %24
24: ; preds = %21, %17
%25 = load i8*, i8** %4
%26 = getelementptr inbounds i8, i8* %25, i32 1
store i8* %26, i8** %4
%27 = load i8*, i8** %4
%28 = load i8, i8* %27
store i8 %28, i8* %5
br label %10
29: ; preds = %10
%30 = load i8*, i8** %3
ret i8* %30
}

LLVM IR (-O2):
define i8* @ft_basename(i8* %0) {
br label %2
2: ; preds = %8, %1
%3 = phi i8* [ %0, %1 ], [ %9, %8 ]
%4 = phi i8* [ %0, %1 ], [ %10, %8 ]
%5 = load i8, i8* %4
switch i8 %5, label %8 [
i8 0, label %11
i8 92, label %6
i8 47, label %6
]
6: ; preds = %2, %2
%7 = getelementptr inbounds i8, i8* %4, i64 1
br label %8
8: ; preds = %2, %6
%9 = phi i8* [ %7, %6 ], [ %3, %2 ]
%10 = getelementptr inbounds i8, i8* %4, i64 1
br label %2
11: ; preds = %2
ret i8* %3
}
/* Variables and functions */
double errorSum(double, double);
double *uncertainSum(double A, double errorA, double B, double errorB) {
  static double retorno[2];
  retorno[0] = A + B;
  retorno[1] = errorSum(errorA, errorB);
  return retorno;
}


x86 assembly (clang, -O0):
<uncertainSum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x18(%rbp),%xmm0
movsd  %xmm0,0x2f02(%rip)
movsd  -0x10(%rbp),%xmm0
movsd  -0x20(%rbp),%xmm1
call   1030 <errorSum@plt>
movsd  %xmm0,0x2ef3(%rip)
lea    0x2ee4(%rip),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uncertainSum>:
push   %rbx
addsd  %xmm2,%xmm0
movsd  %xmm0,0x2f23(%rip)
lea    0x2f1c(%rip),%rbx
movaps %xmm1,%xmm0
movaps %xmm3,%xmm1
call   1030 <errorSum@plt>
movsd  %xmm0,0x2f11(%rip)
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@uncertainSum.retorno = internal global [2 x double] zeroinitializer
define double* @uncertainSum(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%9 = load double, double* %5
%10 = load double, double* %7
%11 = fadd double %9, %10
store double %11, double* getelementptr inbounds ([2 x double], [2 x double]* @uncertainSum.retorno, i64 0, i64 0)
%12 = load double, double* %6
%13 = load double, double* %8
%14 = call double @errorSum(double %12, double %13)
store double %14, double* getelementptr inbounds ([2 x double], [2 x double]* @uncertainSum.retorno, i64 0, i64 1)
ret double* getelementptr inbounds ([2 x double], [2 x double]* @uncertainSum.retorno, i64 0, i64 0)
}

LLVM IR (-O2):
@uncertainSum.retorno = internal global [2 x double] zeroinitializer
define double* @uncertainSum(double %0, double %1, double %2, double %3) {
%5 = fadd double %0, %2
store double %5, double* getelementptr inbounds ([2 x double], [2 x double]* @uncertainSum.retorno, i64 0, i64 0)
%6 = tail call double @errorSum(double %1, double %3)
store double %6, double* getelementptr inbounds ([2 x double], [2 x double]* @uncertainSum.retorno, i64 0, i64 1)
ret double* getelementptr inbounds ([2 x double], [2 x double]* @uncertainSum.retorno, i64 0, i64 0)
}
/* Variables and functions */
int NLA_ALIGN(int /*<<< orphan*/);
int /*<<< orphan*/ nla_attr_size(int);
int nla_total_size(int payload) { return NLA_ALIGN(nla_attr_size(payload)); }


x86 assembly (clang, -O0):
<nla_total_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <nla_attr_size@plt>
mov    %eax,%edi
call   1040 <NLA_ALIGN@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nla_total_size>:
push   %rax
call   1030 <nla_attr_size@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <NLA_ALIGN@plt>

LLVM IR (-O0):
define i32 @nla_total_size(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @nla_attr_size(i32 %3)
%5 = call i32 @NLA_ALIGN(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @nla_total_size(i32 %0) {
%2 = tail call i32 @nla_attr_size(i32 %0)
%3 = tail call i32 @NLA_ALIGN(i32 %2)
ret i32 %3
}
__attribute__((__format__(__printf__, 1, 2))) void
printdbg_dummy(char const *format, ...) {}


x86 assembly (clang, -O0):
<printdbg_dummy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<printdbg_dummy>:
ret

LLVM IR (-O0):
define void @printdbg_dummy(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @printdbg_dummy(i8* nocapture %0, ...) {
ret void
}