#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
struct compile_state {
  int dummy;
};

/* Variables and functions */
int do_select_reg(struct compile_state *, char *, int, int);
int arch_select_free_register(struct compile_state *state, char *used,
                              int classes) {
  int i, reg;
  reg = 1;
  for (i = 37; (reg == 1) && (i <= 44); i++) {
    reg = do_select_reg(state, used, i, classes);
  }
  for (i = 29; (reg == 1) && (i <= 36); i++) {
    reg = do_select_reg(state, used, i, classes);
  }
  for (i = 26; (reg == 1) && (i >= 19); i--) {
    reg = do_select_reg(state, used, i, classes);
  }
  for (i = 11; (reg == 1) && (i <= 18); i++) {
    reg = do_select_reg(state, used, i, classes);
  }
  for (i = 3; (reg == 1) && (i <= 10); i++) {
    reg = do_select_reg(state, used, i, classes);
  }
  for (i = 3; (reg == 1) && (i <= 6); i++) {
    reg = do_select_reg(state, used, i, classes);
  }
  for (i = 28; (reg == 1) && (i <= 28); i++) {
    reg = do_select_reg(state, used, i, classes);
  }
  for (i = 27; (reg == 1) && (i <= 27); i++) {
    reg = do_select_reg(state, used, i, classes);
  }
  for (i = 2; (reg == 1) && (i <= 2); i++) {
    reg = do_select_reg(state, used, i, classes);
  }
  return reg;
}


x86 assembly (clang, -O0):
<arch_select_free_register>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x1,-0x1c(%rbp)
movl   $0x25,-0x18(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0x1c(%rbp)
mov    %al,-0x1d(%rbp)
jne    114a <arch_select_free_register+0x3a>
cmpl   $0x2c,-0x18(%rbp)
setle  %al
mov    %al,-0x1d(%rbp)
mov    -0x1d(%rbp),%al
test   $0x1,%al
jne    115a <arch_select_free_register+0x4a>
jmp    117e <arch_select_free_register+0x6e>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%edx
mov    -0x14(%rbp),%ecx
call   1030 <do_select_reg@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1131 <arch_select_free_register+0x21>
movl   $0x1d,-0x18(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0x1c(%rbp)
mov    %al,-0x1e(%rbp)
jne    119e <arch_select_free_register+0x8e>
cmpl   $0x24,-0x18(%rbp)
setle  %al
mov    %al,-0x1e(%rbp)
mov    -0x1e(%rbp),%al
test   $0x1,%al
jne    11ae <arch_select_free_register+0x9e>
jmp    11d2 <arch_select_free_register+0xc2>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%edx
mov    -0x14(%rbp),%ecx
call   1030 <do_select_reg@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1185 <arch_select_free_register+0x75>
movl   $0x1a,-0x18(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0x1c(%rbp)
mov    %al,-0x1f(%rbp)
jne    11f2 <arch_select_free_register+0xe2>
cmpl   $0x13,-0x18(%rbp)
setge  %al
mov    %al,-0x1f(%rbp)
mov    -0x1f(%rbp),%al
test   $0x1,%al
jne    1202 <arch_select_free_register+0xf2>
jmp    1226 <arch_select_free_register+0x116>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%edx
mov    -0x14(%rbp),%ecx
call   1030 <do_select_reg@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
jmp    11d9 <arch_select_free_register+0xc9>
movl   $0xb,-0x18(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0x1c(%rbp)
mov    %al,-0x20(%rbp)
jne    1246 <arch_select_free_register+0x136>
cmpl   $0x12,-0x18(%rbp)
setle  %al
mov    %al,-0x20(%rbp)
mov    -0x20(%rbp),%al
test   $0x1,%al
jne    1256 <arch_select_free_register+0x146>
jmp    127a <arch_select_free_register+0x16a>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%edx
mov    -0x14(%rbp),%ecx
call   1030 <do_select_reg@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    122d <arch_select_free_register+0x11d>
movl   $0x3,-0x18(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0x1c(%rbp)
mov    %al,-0x21(%rbp)
jne    129a <arch_select_free_register+0x18a>
cmpl   $0xa,-0x18(%rbp)
setle  %al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%al
test   $0x1,%al
jne    12aa <arch_select_free_register+0x19a>
jmp    12ce <arch_select_free_register+0x1be>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%edx
mov    -0x14(%rbp),%ecx
call   1030 <do_select_reg@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1281 <arch_select_free_register+0x171>
movl   $0x3,-0x18(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0x1c(%rbp)
mov    %al,-0x22(%rbp)
jne    12ee <arch_select_free_register+0x1de>
cmpl   $0x6,-0x18(%rbp)
setle  %al
mov    %al,-0x22(%rbp)
mov    -0x22(%rbp),%al
test   $0x1,%al
jne    12fe <arch_select_free_register+0x1ee>
jmp    1322 <arch_select_free_register+0x212>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%edx
mov    -0x14(%rbp),%ecx
call   1030 <do_select_reg@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    12d5 <arch_select_free_register+0x1c5>
movl   $0x1c,-0x18(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0x1c(%rbp)
mov    %al,-0x23(%rbp)
jne    1342 <arch_select_free_register+0x232>
cmpl   $0x1c,-0x18(%rbp)
setle  %al
mov    %al,-0x23(%rbp)
mov    -0x23(%rbp),%al
test   $0x1,%al
jne    1352 <arch_select_free_register+0x242>
jmp    1376 <arch_select_free_register+0x266>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%edx
mov    -0x14(%rbp),%ecx
call   1030 <do_select_reg@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1329 <arch_select_free_register+0x219>
movl   $0x1b,-0x18(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0x1c(%rbp)
mov    %al,-0x24(%rbp)
jne    1396 <arch_select_free_register+0x286>
cmpl   $0x1b,-0x18(%rbp)
setle  %al
mov    %al,-0x24(%rbp)
mov    -0x24(%rbp),%al
test   $0x1,%al
jne    13a6 <arch_select_free_register+0x296>
jmp    13ca <arch_select_free_register+0x2ba>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%edx
mov    -0x14(%rbp),%ecx
call   1030 <do_select_reg@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    137d <arch_select_free_register+0x26d>
movl   $0x2,-0x18(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0x1c(%rbp)
mov    %al,-0x25(%rbp)
jne    13ea <arch_select_free_register+0x2da>
cmpl   $0x2,-0x18(%rbp)
setle  %al
mov    %al,-0x25(%rbp)
mov    -0x25(%rbp),%al
test   $0x1,%al
jne    13fa <arch_select_free_register+0x2ea>
jmp    141e <arch_select_free_register+0x30e>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%edx
mov    -0x14(%rbp),%ecx
call   1030 <do_select_reg@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    13d1 <arch_select_free_register+0x2c1>
mov    -0x1c(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_select_free_register>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %rsi,%r15
mov    %rdi,%rbp
mov    $0x25,%ebx
cs nopw 0x0(%rax,%rax,1)
nop
mov    %rbp,%rdi
mov    %r15,%rsi
mov    %ebx,%edx
mov    %r14d,%ecx
call   1030 <do_select_reg@plt>
cmp    $0x1,%eax
jne    114f <arch_select_free_register+0x3f>
lea    0x1(%rbx),%ecx
cmp    $0x2c,%ebx
mov    %ecx,%ebx
jb     1130 <arch_select_free_register+0x20>
cmp    $0x1,%eax
jne    1291 <arch_select_free_register+0x181>
mov    $0x1d,%ebx
nopl   (%rax)
mov    %rbp,%rdi
mov    %r15,%rsi
mov    %ebx,%edx
mov    %r14d,%ecx
call   1030 <do_select_reg@plt>
cmp    $0x1,%eax
jne    117f <arch_select_free_register+0x6f>
lea    0x1(%rbx),%ecx
cmp    $0x24,%ebx
mov    %ecx,%ebx
jb     1160 <arch_select_free_register+0x50>
cmp    $0x1,%eax
jne    1291 <arch_select_free_register+0x181>
mov    $0x1a,%ebx
nopl   (%rax)
mov    %rbp,%rdi
mov    %r15,%rsi
mov    %ebx,%edx
mov    %r14d,%ecx
call   1030 <do_select_reg@plt>
cmp    $0x1,%eax
jne    11af <arch_select_free_register+0x9f>
lea    -0x1(%rbx),%ecx
cmp    $0x13,%ebx
mov    %ecx,%ebx
ja     1190 <arch_select_free_register+0x80>
cmp    $0x1,%eax
jne    1291 <arch_select_free_register+0x181>
mov    $0xb,%ebx
nopl   (%rax)
mov    %rbp,%rdi
mov    %r15,%rsi
mov    %ebx,%edx
mov    %r14d,%ecx
call   1030 <do_select_reg@plt>
cmp    $0x1,%eax
jne    11df <arch_select_free_register+0xcf>
lea    0x1(%rbx),%ecx
cmp    $0x12,%ebx
mov    %ecx,%ebx
jb     11c0 <arch_select_free_register+0xb0>
cmp    $0x1,%eax
jne    1291 <arch_select_free_register+0x181>
mov    $0x3,%ebx
nopl   (%rax)
mov    %rbp,%rdi
mov    %r15,%rsi
mov    %ebx,%edx
mov    %r14d,%ecx
call   1030 <do_select_reg@plt>
cmp    $0x1,%eax
jne    120f <arch_select_free_register+0xff>
lea    0x1(%rbx),%ecx
cmp    $0xa,%ebx
mov    %ecx,%ebx
jb     11f0 <arch_select_free_register+0xe0>
cmp    $0x1,%eax
jne    1291 <arch_select_free_register+0x181>
mov    $0x3,%ebx
nopl   0x0(%rax)
mov    %rbp,%rdi
mov    %r15,%rsi
mov    %ebx,%edx
mov    %r14d,%ecx
call   1030 <do_select_reg@plt>
cmp    $0x1,%eax
jne    123f <arch_select_free_register+0x12f>
lea    0x1(%rbx),%ecx
cmp    $0x6,%ebx
mov    %ecx,%ebx
jb     1220 <arch_select_free_register+0x110>
cmp    $0x1,%eax
jne    1291 <arch_select_free_register+0x181>
mov    %rbp,%rdi
mov    %r15,%rsi
mov    $0x1c,%edx
mov    %r14d,%ecx
call   1030 <do_select_reg@plt>
cmp    $0x1,%eax
jne    1291 <arch_select_free_register+0x181>
mov    %rbp,%rdi
mov    %r15,%rsi
mov    $0x1b,%edx
mov    %r14d,%ecx
call   1030 <do_select_reg@plt>
cmp    $0x1,%eax
jne    1291 <arch_select_free_register+0x181>
mov    %rbp,%rdi
mov    %r15,%rsi
mov    $0x2,%edx
mov    %r14d,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <do_select_reg@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
%struct.compile_state = type { i32 }
define i32 @arch_select_free_register(%struct.compile_state* %0, i8* %1, i32 %2) {
%4 = alloca %struct.compile_state*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store %struct.compile_state* %0, %struct.compile_state** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
store i32 1, i32* %8
store i32 37, i32* %7
br label %9
9: ; preds = %23, %3
%10 = load i32, i32* %8
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %15
12: ; preds = %9
%13 = load i32, i32* %7
%14 = icmp sle i32 %13, 44
br label %15
15: ; preds = %12, %9
%16 = phi i1 [ false, %9 ], [ %14, %12 ]
br i1 %16, label %17, label %26
17: ; preds = %15
%18 = load %struct.compile_state*, %struct.compile_state** %4
%19 = load i8*, i8** %5
%20 = load i32, i32* %7
%21 = load i32, i32* %6
%22 = call i32 @do_select_reg(%struct.compile_state* %18, i8* %19, i32 %20, i32 %21)
store i32 %22, i32* %8
br label %23
23: ; preds = %17
%24 = load i32, i32* %7
%25 = add nsw i32 %24, 1
store i32 %25, i32* %7
br label %9
26: ; preds = %15
store i32 29, i32* %7
br label %27
27: ; preds = %41, %26
%28 = load i32, i32* %8
%29 = icmp eq i32 %28, 1
br i1 %29, label %30, label %33
30: ; preds = %27
%31 = load i32, i32* %7
%32 = icmp sle i32 %31, 36
br label %33
33: ; preds = %30, %27
%34 = phi i1 [ false, %27 ], [ %32, %30 ]
br i1 %34, label %35, label %44
35: ; preds = %33
%36 = load %struct.compile_state*, %struct.compile_state** %4
%37 = load i8*, i8** %5
%38 = load i32, i32* %7
%39 = load i32, i32* %6
%40 = call i32 @do_select_reg(%struct.compile_state* %36, i8* %37, i32 %38, i32 %39)
store i32 %40, i32* %8
br label %41
41: ; preds = %35
%42 = load i32, i32* %7
%43 = add nsw i32 %42, 1
store i32 %43, i32* %7
br label %27
44: ; preds = %33
store i32 26, i32* %7
br label %45
45: ; preds = %59, %44
%46 = load i32, i32* %8
%47 = icmp eq i32 %46, 1
br i1 %47, label %48, label %51
48: ; preds = %45
%49 = load i32, i32* %7
%50 = icmp sge i32 %49, 19
br label %51
51: ; preds = %48, %45
%52 = phi i1 [ false, %45 ], [ %50, %48 ]
br i1 %52, label %53, label %62
53: ; preds = %51
%54 = load %struct.compile_state*, %struct.compile_state** %4
%55 = load i8*, i8** %5
%56 = load i32, i32* %7
%57 = load i32, i32* %6
%58 = call i32 @do_select_reg(%struct.compile_state* %54, i8* %55, i32 %56, i32 %57)
store i32 %58, i32* %8
br label %59
59: ; preds = %53
%60 = load i32, i32* %7
%61 = add nsw i32 %60, -1
store i32 %61, i32* %7
br label %45
62: ; preds = %51
store i32 11, i32* %7
br label %63
63: ; preds = %77, %62
%64 = load i32, i32* %8
%65 = icmp eq i32 %64, 1
br i1 %65, label %66, label %69
66: ; preds = %63
%67 = load i32, i32* %7
%68 = icmp sle i32 %67, 18
br label %69
69: ; preds = %66, %63
%70 = phi i1 [ false, %63 ], [ %68, %66 ]
br i1 %70, label %71, label %80
71: ; preds = %69
%72 = load %struct.compile_state*, %struct.compile_state** %4
%73 = load i8*, i8** %5
%74 = load i32, i32* %7
%75 = load i32, i32* %6
%76 = call i32 @do_select_reg(%struct.compile_state* %72, i8* %73, i32 %74, i32 %75)
store i32 %76, i32* %8
br label %77
77: ; preds = %71
%78 = load i32, i32* %7
%79 = add nsw i32 %78, 1
store i32 %79, i32* %7
br label %63
80: ; preds = %69
store i32 3, i32* %7
br label %81
81: ; preds = %95, %80
%82 = load i32, i32* %8
%83 = icmp eq i32 %82, 1
br i1 %83, label %84, label %87
84: ; preds = %81
%85 = load i32, i32* %7
%86 = icmp sle i32 %85, 10
br label %87
87: ; preds = %84, %81
%88 = phi i1 [ false, %81 ], [ %86, %84 ]
br i1 %88, label %89, label %98
89: ; preds = %87
%90 = load %struct.compile_state*, %struct.compile_state** %4
%91 = load i8*, i8** %5
%92 = load i32, i32* %7
%93 = load i32, i32* %6
%94 = call i32 @do_select_reg(%struct.compile_state* %90, i8* %91, i32 %92, i32 %93)
store i32 %94, i32* %8
br label %95
95: ; preds = %89
%96 = load i32, i32* %7
%97 = add nsw i32 %96, 1
store i32 %97, i32* %7
br label %81
98: ; preds = %87
store i32 3, i32* %7
br label %99
99: ; preds = %113, %98
%100 = load i32, i32* %8
%101 = icmp eq i32 %100, 1
br i1 %101, label %102, label %105
102: ; preds = %99
%103 = load i32, i32* %7
%104 = icmp sle i32 %103, 6
br label %105
105: ; preds = %102, %99
%106 = phi i1 [ false, %99 ], [ %104, %102 ]
br i1 %106, label %107, label %116
107: ; preds = %105
%108 = load %struct.compile_state*, %struct.compile_state** %4
%109 = load i8*, i8** %5
%110 = load i32, i32* %7
%111 = load i32, i32* %6
%112 = call i32 @do_select_reg(%struct.compile_state* %108, i8* %109, i32 %110, i32 %111)
store i32 %112, i32* %8
br label %113
113: ; preds = %107
%114 = load i32, i32* %7
%115 = add nsw i32 %114, 1
store i32 %115, i32* %7
br label %99
116: ; preds = %105
store i32 28, i32* %7
br label %117
117: ; preds = %131, %116
%118 = load i32, i32* %8
%119 = icmp eq i32 %118, 1
br i1 %119, label %120, label %123
120: ; preds = %117
%121 = load i32, i32* %7
%122 = icmp sle i32 %121, 28
br label %123
123: ; preds = %120, %117
%124 = phi i1 [ false, %117 ], [ %122, %120 ]
br i1 %124, label %125, label %134
125: ; preds = %123
%126 = load %struct.compile_state*, %struct.compile_state** %4
%127 = load i8*, i8** %5
%128 = load i32, i32* %7
%129 = load i32, i32* %6
%130 = call i32 @do_select_reg(%struct.compile_state* %126, i8* %127, i32 %128, i32 %129)
store i32 %130, i32* %8
br label %131
131: ; preds = %125
%132 = load i32, i32* %7
%133 = add nsw i32 %132, 1
store i32 %133, i32* %7
br label %117
134: ; preds = %123
store i32 27, i32* %7
br label %135
135: ; preds = %149, %134
%136 = load i32, i32* %8
%137 = icmp eq i32 %136, 1
br i1 %137, label %138, label %141
138: ; preds = %135
%139 = load i32, i32* %7
%140 = icmp sle i32 %139, 27
br label %141
141: ; preds = %138, %135
%142 = phi i1 [ false, %135 ], [ %140, %138 ]
br i1 %142, label %143, label %152
143: ; preds = %141
%144 = load %struct.compile_state*, %struct.compile_state** %4
%145 = load i8*, i8** %5
%146 = load i32, i32* %7
%147 = load i32, i32* %6
%148 = call i32 @do_select_reg(%struct.compile_state* %144, i8* %145, i32 %146, i32 %147)
store i32 %148, i32* %8
br label %149
149: ; preds = %143
%150 = load i32, i32* %7
%151 = add nsw i32 %150, 1
store i32 %151, i32* %7
br label %135
152: ; preds = %141
store i32 2, i32* %7
br label %153
153: ; preds = %167, %152
%154 = load i32, i32* %8
%155 = icmp eq i32 %154, 1
br i1 %155, label %156, label %159
156: ; preds = %153
%157 = load i32, i32* %7
%158 = icmp sle i32 %157, 2
br label %159
159: ; preds = %156, %153
%160 = phi i1 [ false, %153 ], [ %158, %156 ]
br i1 %160, label %161, label %170
161: ; preds = %159
%162 = load %struct.compile_state*, %struct.compile_state** %4
%163 = load i8*, i8** %5
%164 = load i32, i32* %7
%165 = load i32, i32* %6
%166 = call i32 @do_select_reg(%struct.compile_state* %162, i8* %163, i32 %164, i32 %165)
store i32 %166, i32* %8
br label %167
167: ; preds = %161
%168 = load i32, i32* %7
%169 = add nsw i32 %168, 1
store i32 %169, i32* %7
br label %153
170: ; preds = %159
%171 = load i32, i32* %8
ret i32 %171
}

LLVM IR (-O2):
%struct.compile_state = type { i32 }
define i32 @arch_select_free_register(%struct.compile_state* %0, i8* %1, i32 %2) {
br label %5
4: ; preds = %5
br i1 %9, label %14, label %65
5: ; preds = %3, %5
%6 = phi i32 [ 37, %3 ], [ %8, %5 ]
%7 = tail call i32 @do_select_reg(%struct.compile_state* %0, i8* %1, i32 %6, i32 %2)
%8 = add nuw nsw i32 %6, 1
%9 = icmp eq i32 %7, 1
%10 = icmp ult i32 %6, 44
%11 = and i1 %9, %10
br i1 %11, label %5, label %4
12: ; preds = %14
%13 = icmp eq i32 %16, 1
br i1 %13, label %23, label %65
14: ; preds = %4, %14
%15 = phi i32 [ %17, %14 ], [ 29, %4 ]
%16 = tail call i32 @do_select_reg(%struct.compile_state* %0, i8* %1, i32 %15, i32 %2)
%17 = add nuw nsw i32 %15, 1
%18 = icmp eq i32 %16, 1
%19 = icmp ult i32 %15, 36
%20 = and i1 %18, %19
br i1 %20, label %14, label %12
21: ; preds = %23
%22 = icmp eq i32 %25, 1
br i1 %22, label %32, label %65
23: ; preds = %12, %23
%24 = phi i32 [ %26, %23 ], [ 26, %12 ]
%25 = tail call i32 @do_select_reg(%struct.compile_state* %0, i8* %1, i32 %24, i32 %2)
%26 = add nsw i32 %24, -1
%27 = icmp eq i32 %25, 1
%28 = icmp ugt i32 %24, 19
%29 = and i1 %27, %28
br i1 %29, label %23, label %21
30: ; preds = %32
%31 = icmp eq i32 %34, 1
br i1 %31, label %41, label %65
32: ; preds = %21, %32
%33 = phi i32 [ %35, %32 ], [ 11, %21 ]
%34 = tail call i32 @do_select_reg(%struct.compile_state* %0, i8* %1, i32 %33, i32 %2)
%35 = add nuw nsw i32 %33, 1
%36 = icmp eq i32 %34, 1
%37 = icmp ult i32 %33, 18
%38 = and i1 %36, %37
br i1 %38, label %32, label %30
39: ; preds = %41
%40 = icmp eq i32 %43, 1
br i1 %40, label %50, label %65
41: ; preds = %30, %41
%42 = phi i32 [ %44, %41 ], [ 3, %30 ]
%43 = tail call i32 @do_select_reg(%struct.compile_state* %0, i8* %1, i32 %42, i32 %2)
%44 = add nuw nsw i32 %42, 1
%45 = icmp eq i32 %43, 1
%46 = icmp ult i32 %42, 10
%47 = and i1 %45, %46
br i1 %47, label %41, label %39
48: ; preds = %50
%49 = icmp eq i32 %52, 1
br i1 %49, label %57, label %65
50: ; preds = %39, %50
%51 = phi i32 [ %53, %50 ], [ 3, %39 ]
%52 = tail call i32 @do_select_reg(%struct.compile_state* %0, i8* %1, i32 %51, i32 %2)
%53 = add nuw nsw i32 %51, 1
%54 = icmp eq i32 %52, 1
%55 = icmp ult i32 %51, 6
%56 = and i1 %54, %55
br i1 %56, label %50, label %48
57: ; preds = %48
%58 = tail call i32 @do_select_reg(%struct.compile_state* %0, i8* %1, i32 28, i32 %2)
%59 = icmp eq i32 %58, 1
br i1 %59, label %60, label %65
60: ; preds = %57
%61 = tail call i32 @do_select_reg(%struct.compile_state* %0, i8* %1, i32 27, i32 %2)
%62 = icmp eq i32 %61, 1
br i1 %62, label %63, label %65
63: ; preds = %60
%64 = tail call i32 @do_select_reg(%struct.compile_state* %0, i8* %1, i32 2, i32 %2)
br label %65
65: ; preds = %4, %12, %21, %30, %39, %48, %57, %63, %60
%66 = phi i32 [ %61, %60 ], [ %64, %63 ], [ %58, %57 ], [ %52, %48 ], [ %43, %39 ], [ %34, %30 ], [ %25, %21 ], [ %16, %12 ], [ %7, %4 ]
ret i32 %66
}