xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ abort();
int x() {
  static int c;
  if (c) {
    abort();
  }
  c = 1;
  ;
  return 2;
}


x86 assembly (clang, -O0):
<x>:
push   %rbp
mov    %rsp,%rbp
cmpl   $0x0,0x2f11(%rip)
je     1128 <x+0x18>
mov    $0x0,%al
call   1030 <abort@plt>
movl   $0x1,0x2efa(%rip)
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<x>:
push   %rax
cmpb   $0x1,0x2f14(%rip)
je     1128 <x+0x18>
movb   $0x1,0x2f0b(%rip)
mov    $0x2,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@x.c = internal global i32 0
define i32 @x() {
%1 = load i32, i32* @x.c
%2 = icmp ne i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = call i32 (...) @abort()
unreachable
5: ; preds = %0
store i32 1, i32* @x.c
ret i32 2
}

LLVM IR (-O2):
@x.c = internal unnamed_addr global i1 false
define i32 @x() {
%1 = load i1, i1* @x.c
br i1 %1, label %2, label %4
2: ; preds = %0
%3 = tail call i32 (...) @abort()
unreachable
4: ; preds = %0
store i1 true, i1* @x.c
ret i32 2
}
/* Variables and functions */
int /*<<< orphan*/ led_set_code(int, float);
void show_on_off(unsigned char v) {
  if (v) {
    led_set_code(2, 0xFF);
    led_set_code(1, 'O');
    led_set_code(0, 'N');
  } else {
    led_set_code(2, 'O');
    led_set_code(1, 'F');
    led_set_code(0, 'F');
  }
}


x86 assembly (clang, -O0):
<show_on_off>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
cmpb   $0x0,-0x1(%rbp)
je     1160 <show_on_off+0x50>
mov    $0x2,%edi
movss  0xed7(%rip),%xmm0
call   1030 <led_set_code@plt>
mov    $0x1,%edi
movss  0xebd(%rip),%xmm0
call   1030 <led_set_code@plt>
xor    %edi,%edi
movss  0xeb2(%rip),%xmm0
call   1030 <led_set_code@plt>
jmp    1193 <show_on_off+0x83>
mov    $0x2,%edi
movss  0xe97(%rip),%xmm0
call   1030 <led_set_code@plt>
mov    $0x1,%edi
movss  0xe81(%rip),%xmm0
call   1030 <led_set_code@plt>
xor    %edi,%edi
movss  0xe72(%rip),%xmm0
call   1030 <led_set_code@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_on_off>:
push   %rax
xor    %eax,%eax
test   %edi,%edi
sete   %al
lea    0xee1(%rip),%rcx
movss  (%rcx,%rax,4),%xmm0
lea    0xedd(%rip),%rcx
movss  (%rcx,%rax,4),%xmm1
movss  %xmm1,(%rsp)
lea    0xed4(%rip),%rcx
movss  (%rcx,%rax,4),%xmm1
movss  %xmm1,0x4(%rsp)
mov    $0x2,%edi
call   1030 <led_set_code@plt>
mov    $0x1,%edi
movss  (%rsp),%xmm0
call   1030 <led_set_code@plt>
xor    %edi,%edi
movss  0x4(%rsp),%xmm0
pop    %rax
jmp    1030 <led_set_code@plt>

LLVM IR (-O0):
define void @show_on_off(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = icmp ne i8 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = call i32 @led_set_code(i32 2, float 2.550000e+02)
%7 = call i32 @led_set_code(i32 1, float 7.900000e+01)
%8 = call i32 @led_set_code(i32 0, float 7.800000e+01)
br label %13
9: ; preds = %1
%10 = call i32 @led_set_code(i32 2, float 7.900000e+01)
%11 = call i32 @led_set_code(i32 1, float 7.000000e+01)
%12 = call i32 @led_set_code(i32 0, float 7.000000e+01)
br label %13
13: ; preds = %9, %5
ret void
}

LLVM IR (-O2):
define void @show_on_off(i8 zeroext %0) {
%2 = icmp eq i8 %0, 0
%3 = select i1 %2, float 7.900000e+01, float 2.550000e+02
%4 = select i1 %2, float 7.000000e+01, float 7.900000e+01
%5 = select i1 %2, float 7.000000e+01, float 7.800000e+01
%6 = tail call i32 @led_set_code(i32 2, float %3)
%7 = tail call i32 @led_set_code(i32 1, float %4)
%8 = tail call i32 @led_set_code(i32 0, float %5)
ret void
}
/* Type definitions */
struct mloop_async {
  int dummy;
};

/* Variables and functions */
int mloop__unref_any(struct mloop_async *);
__attribute__((visibility("default"))) int
mloop_async_unref(struct mloop_async *self) {
  return mloop__unref_any(self);
}


x86 assembly (clang, -O0):
<mloop_async_unref>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mloop__unref_any@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mloop_async_unref>:
jmp    1030 <mloop__unref_any@plt>

LLVM IR (-O0):
%struct.mloop_async = type { i32 }
define i32 @mloop_async_unref(%struct.mloop_async* %0) {
%2 = alloca %struct.mloop_async*
store %struct.mloop_async* %0, %struct.mloop_async** %2
%3 = load %struct.mloop_async*, %struct.mloop_async** %2
%4 = call i32 @mloop__unref_any(%struct.mloop_async* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.mloop_async = type { i32 }
define i32 @mloop_async_unref(%struct.mloop_async* %0) {
%2 = tail call i32 @mloop__unref_any(%struct.mloop_async* %0)
ret i32 %2
}
/* Variables and functions */
int ebbrt_newlib_fork();
int fork(void) { return ebbrt_newlib_fork(); }


x86 assembly (clang, -O0):
<fork>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ebbrt_newlib_fork@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fork>:
xor    %eax,%eax
jmp    1030 <ebbrt_newlib_fork@plt>

LLVM IR (-O0):
define i32 @fork() {
%1 = call i32 (...) @ebbrt_newlib_fork()
ret i32 %1
}

LLVM IR (-O2):
define i32 @fork() {
%1 = tail call i32 (...) @ebbrt_newlib_fork()
ret i32 %1
}
void genc_le_s() {}


x86 assembly (clang, -O0):
<genc_le_s>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genc_le_s>:
ret

LLVM IR (-O0):
define void @genc_le_s() {
ret void
}

LLVM IR (-O2):
define void @genc_le_s() {
ret void
}
/* Variables and functions */
int *unpack_rng_simple(char *);
int *funpack_rng_simple(char *buffer) { return unpack_rng_simple(buffer); }


x86 assembly (clang, -O0):
<funpack_rng_simple>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <unpack_rng_simple@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<funpack_rng_simple>:
jmp    1030 <unpack_rng_simple@plt>

LLVM IR (-O0):
define i32* @funpack_rng_simple(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32* @unpack_rng_simple(i8* %3)
ret i32* %4
}

LLVM IR (-O2):
define i32* @funpack_rng_simple(i8* %0) {
%2 = tail call i32* @unpack_rng_simple(i8* %0)
ret i32* %2
}
/* Variables and functions */
int /*<<< orphan*/ halt();
int main(void) { halt(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <halt@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <halt@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @halt()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @halt()
ret i32 0
}
void skb_over_panic(struct sk_buff *skb, int len, void *here) {}


x86 assembly (clang, -O0):
<skb_over_panic>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<skb_over_panic>:
ret

LLVM IR (-O0):
%struct.sk_buff = type opaque
define void @skb_over_panic(%struct.sk_buff* %0, i32 %1, i8* %2) {
%4 = alloca %struct.sk_buff*
%5 = alloca i32
%6 = alloca i8*
store %struct.sk_buff* %0, %struct.sk_buff** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
ret void
}

LLVM IR (-O2):
%struct.sk_buff = type opaque
define void @skb_over_panic(%struct.sk_buff* nocapture %0, i32 %1, i8* nocapture %2) {
ret void
}
/* Variables and functions */
scalar_t__ isdigit(char);
int is_digit(char c) { return (isdigit(c) || (c == '.')); }


x86 assembly (clang, -O0):
<is_digit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <isdigit@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x2(%rbp)
jne    1146 <is_digit+0x36>
movsbl -0x1(%rbp),%eax
cmp    $0x2e,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_digit>:
push   %rbx
mov    %edi,%ebx
call   1030 <isdigit@plt>
test   %rax,%rax
setne  %al
cmp    $0x2e,%bl
sete   %cl
or     %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @is_digit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @isdigit(i8 signext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 46
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_digit(i8 signext %0) {
%2 = tail call i64 @isdigit(i8 signext %0)
%3 = icmp ne i64 %2, 0
%4 = icmp eq i8 %0, 46
%5 = or i1 %4, %3
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ test_difference();
int /*<<< orphan*/ test_mul();
int /*<<< orphan*/ test_sum();
int main(int argc, char **argv) {
  test_sum();
  test_difference();
  test_mul();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1050 <test_sum@plt>
mov    $0x0,%al
call   1040 <test_difference@plt>
mov    $0x0,%al
call   1030 <test_mul@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <test_sum@plt>
xor    %eax,%eax
call   1040 <test_difference@plt>
xor    %eax,%eax
call   1030 <test_mul@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @test_sum()
%7 = call i32 (...) @test_difference()
%8 = call i32 (...) @test_mul()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @test_sum()
%4 = tail call i32 (...) @test_difference()
%5 = tail call i32 (...) @test_mul()
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void Interp2(uint32_t *pc, uint32_t c1, uint32_t c2, uint32_t c3) {
  *pc = ((((c1 & 0x00FF00) * 2 + (c2 & 0x00FF00) + (c3 & 0x00FF00)) >> 2) &
         0x00FF00) +
        ((((c1 & 0xFF00FF) * 2 + (c2 & 0xFF00FF) + (c3 & 0xFF00FF)) >> 2) &
         0xFF00FF);
}


x86 assembly (clang, -O0):
<Interp2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x1,%ecx
mov    -0x10(%rbp),%eax
and    $0xff00,%eax
add    %eax,%ecx
mov    -0x14(%rbp),%eax
and    $0xff00,%eax
add    %eax,%ecx
sar    $0x2,%ecx
and    $0xff00,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x1,%eax
mov    -0x10(%rbp),%edx
and    $0xff00ff,%edx
add    %edx,%eax
mov    -0x14(%rbp),%edx
and    $0xff00ff,%edx
add    %edx,%eax
sar    $0x2,%eax
and    $0xff00ff,%eax
add    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Interp2>:
add    %esi,%esi
mov    %esi,%r8d
and    $0x1fe00,%r8d
mov    %edx,%r9d
and    $0xff00,%r9d
add    %r8d,%r9d
mov    %ecx,%eax
and    $0xff00,%eax
add    %r9d,%eax
shr    $0x2,%eax
and    $0xff00,%eax
and    $0x1fe01fe,%esi
and    $0xff00ff,%edx
add    %esi,%edx
and    $0xff00ff,%ecx
add    %edx,%ecx
shr    $0x2,%ecx
and    $0xff00ff,%ecx
or     %eax,%ecx
mov    %ecx,(%rdi)
ret

LLVM IR (-O0):
define void @Interp2(i32* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %6
%10 = and i32 %9, 65280
%11 = mul nsw i32 %10, 2
%12 = load i32, i32* %7
%13 = and i32 %12, 65280
%14 = add nsw i32 %11, %13
%15 = load i32, i32* %8
%16 = and i32 %15, 65280
%17 = add nsw i32 %14, %16
%18 = ashr i32 %17, 2
%19 = and i32 %18, 65280
%20 = load i32, i32* %6
%21 = and i32 %20, 16711935
%22 = mul nsw i32 %21, 2
%23 = load i32, i32* %7
%24 = and i32 %23, 16711935
%25 = add nsw i32 %22, %24
%26 = load i32, i32* %8
%27 = and i32 %26, 16711935
%28 = add nsw i32 %25, %27
%29 = ashr i32 %28, 2
%30 = and i32 %29, 16711935
%31 = add nsw i32 %19, %30
%32 = load i32*, i32** %5
store i32 %31, i32* %32
ret void
}

LLVM IR (-O2):
define void @Interp2(i32* nocapture writeonly %0, i32 %1, i32 %2, i32 %3) {
%5 = shl i32 %1, 1
%6 = and i32 %5, 130560
%7 = and i32 %2, 65280
%8 = add nuw nsw i32 %6, %7
%9 = and i32 %3, 65280
%10 = add nuw nsw i32 %8, %9
%11 = lshr exact i32 %10, 2
%12 = and i32 %11, 65280
%13 = and i32 %5, 33423870
%14 = and i32 %2, 16711935
%15 = add nuw nsw i32 %13, %14
%16 = and i32 %3, 16711935
%17 = add nuw nsw i32 %15, %16
%18 = lshr i32 %17, 2
%19 = and i32 %18, 16711935
%20 = or i32 %12, %19
store i32 %20, i32* %0
ret void
}
void msrs_get(unsigned int msr, unsigned int *low, unsigned int *high) {
  __asm__ volatile("rdmsr" : "=a"(*low), "=d"(*high) : "c"(msr));
}


x86 assembly (clang, -O0):
<msrs_get>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x4(%rbp),%ecx
rdmsr
mov    -0x28(%rbp),%rcx
mov    %eax,%esi
mov    -0x20(%rbp),%rax
mov    %esi,(%rcx)
mov    %edx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<msrs_get>:
mov    %rdx,%r8
mov    %edi,%ecx
rdmsr
mov    %eax,(%rsi)
mov    %edx,(%r8)
ret

LLVM IR (-O0):
define void @msrs_get(i32 %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %5
%8 = load i32*, i32** %6
%9 = load i32, i32* %4
%10 = call { i32, i32 } asm sideeffect "rdmsr", "={ax},={dx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 %9)
%11 = extractvalue { i32, i32 } %10, 0
%12 = extractvalue { i32, i32 } %10, 1
store i32 %11, i32* %7
store i32 %12, i32* %8
ret void
}

LLVM IR (-O2):
define void @msrs_get(i32 %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2) {
%4 = tail call { i32, i32 } asm sideeffect "rdmsr", "={ax},={dx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 %0)
%5 = extractvalue { i32, i32 } %4, 0
%6 = extractvalue { i32, i32 } %4, 1
store i32 %5, i32* %1
store i32 %6, i32* %2
ret void
}
double dps(long dax, long day, long dra) {
  return (1.0 - ((double)dra / (dax + day + dra)));
}


x86 assembly (clang, -O0):
<dps>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cvtsi2sdq -0x18(%rbp),%xmm1
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
add    -0x18(%rbp),%rax
cvtsi2sd %rax,%xmm0
divsd  %xmm0,%xmm1
movsd  0xecd(%rip),%xmm0
subsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dps>:
cvtsi2sd %rdx,%xmm1
add    %rsi,%rdi
add    %rdx,%rdi
cvtsi2sd %rdi,%xmm0
divsd  %xmm0,%xmm1
movsd  0xee4(%rip),%xmm0
subsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @dps(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %6
%8 = sitofp i64 %7 to double
%9 = load i64, i64* %4
%10 = load i64, i64* %5
%11 = add nsw i64 %9, %10
%12 = load i64, i64* %6
%13 = add nsw i64 %11, %12
%14 = sitofp i64 %13 to double
%15 = fdiv double %8, %14
%16 = fsub double 1.000000e+00, %15
ret double %16
}

LLVM IR (-O2):
define double @dps(i64 %0, i64 %1, i64 %2) {
%4 = sitofp i64 %2 to double
%5 = add nsw i64 %1, %0
%6 = add nsw i64 %5, %2
%7 = sitofp i64 %6 to double
%8 = fdiv double %4, %7
%9 = fsub double 1.000000e+00, %8
ret double %9
}
int fibonacci(int z) {
  return (z <= 1) ? 1 : fibonacci(z - 1) + fibonacci(z - 2);
}


x86 assembly (clang, -O0):
<fibonacci>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jg     1132 <fibonacci+0x22>
mov    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1155 <fibonacci+0x45>
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1030 <fibonacci@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
sub    $0x2,%edi
call   1030 <fibonacci@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibonacci>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x2,%edi
jl     1145 <fibonacci+0x35>
mov    %edi,%ebx
add    $0x2,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    -0x3(%rbx),%edi
call   1030 <fibonacci@plt>
add    %eax,%ebp
add    $0xfffffffe,%ebx
cmp    $0x3,%ebx
ja     1130 <fibonacci+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fibonacci(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 %3, 1
br i1 %4, label %5, label %6
5: ; preds = %1
br label %14
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 1
%9 = call i32 @fibonacci(i32 %8)
%10 = load i32, i32* %2
%11 = sub nsw i32 %10, 2
%12 = call i32 @fibonacci(i32 %11)
%13 = add nsw i32 %9, %12
br label %14
14: ; preds = %6, %5
%15 = phi i32 [ 1, %5 ], [ %13, %6 ]
ret i32 %15
}

LLVM IR (-O2):
define i32 @fibonacci(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fibonacci(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
void usage(char **argv) {
  printf("usage: %s N\n  N - number of threads to fork\n", argv[0]);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rsi
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    (%rdi),%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [45 x i8] c"usage: %s N\0A N - number of threads to fork\0A\00"
define void @usage(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = getelementptr inbounds i8*, i8** %3, i64 0
%5 = load i8*, i8** %4
%6 = call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [45 x i8] c"usage: %s N\0A N - number of threads to fork\0A\00"
define void @usage(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = tail call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = tail call i32 @exit(i32 1)
unreachable
}
int test_imm_A9int16_mem(short *val) {
  return ((*val) & (0xA9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A9int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xa9,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A9int16_mem>:
testb  $0xa9,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A9int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 169
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_A9int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 169
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void func1() { printf("this is func1"); }


x86 assembly (clang, -O0):
<func1>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<func1>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"this is func1\00"
define void @func1() {
%1 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"this is func1\00"
define void @func1() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}
int security_shm_shmctl(struct shmid_kernel *shp, int shmid, int cmd) {
  return 0;
}


x86 assembly (clang, -O0):
<security_shm_shmctl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<security_shm_shmctl>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.shmid_kernel = type opaque
define i32 @security_shm_shmctl(%struct.shmid_kernel* %0, i32 %1, i32 %2) {
%4 = alloca %struct.shmid_kernel*
%5 = alloca i32
%6 = alloca i32
store %struct.shmid_kernel* %0, %struct.shmid_kernel** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
%struct.shmid_kernel = type opaque
define i32 @security_shm_shmctl(%struct.shmid_kernel* nocapture readnone %0, i32 %1, i32 %2) {
ret i32 0
}
unsigned xrop3_120_0_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D & S;
  stk1 = T ^ stk2;
  return (stk1 & S) | (stk1 & (~T)) | (T & (~S) & D);
}


x86 assembly (clang, -O0):
<xrop3_120_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_120_0_1>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%eax
shl    $0x8,%eax
or     %esi,%eax
xor    %esi,%edi
xor    %edi,%eax
and    %ecx,%eax
xor    %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_120_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %6
%24 = and i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %7
%26 = load i32, i32* %9
%27 = xor i32 %25, %26
store i32 %27, i32* %8
%28 = load i32, i32* %8
%29 = load i32, i32* %6
%30 = and i32 %28, %29
%31 = load i32, i32* %8
%32 = load i32, i32* %7
%33 = xor i32 %32, -1
%34 = and i32 %31, %33
%35 = or i32 %30, %34
%36 = load i32, i32* %7
%37 = load i32, i32* %6
%38 = xor i32 %37, -1
%39 = and i32 %36, %38
%40 = load i32, i32* %5
%41 = and i32 %39, %40
%42 = or i32 %35, %41
ret i32 %42
}

LLVM IR (-O2):
define i32 @xrop3_120_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %6, %3
%8 = and i32 %7, %4
%9 = xor i32 %4, -1
%10 = and i32 %9, %5
%11 = or i32 %8, %10
ret i32 %11
}
int HelpItem66(void) { return 0; }


x86 assembly (clang, -O0):
<HelpItem66>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelpItem66>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HelpItem66() {
ret i32 0
}

LLVM IR (-O2):
define i32 @HelpItem66() {
ret i32 0
}
/* Variables and functions */
int func1();
int /*<<< orphan*/ printf(char *, ...);
int main(int argc, char *argv[]) {
  printf("Hello, world!\n");
  printf("%d\n", func1());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <func1@plt>
mov    %eax,%esi
lea    0xebb(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xecc(%rip),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
call   1030 <func1@plt>
lea    0xeb5(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1050 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Hello, world!\0A\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%7 = call i32 (...) @func1()
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [4 x i8] c"%d\0A\00"
@str = [14 x i8] c"Hello, world!\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 (...) @func1()
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret i32 0
}
/* Variables and functions */
int i386_cpuid();
int have_sse(void) {
  int edx = i386_cpuid();
  if (edx & (1 << 25))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<have_sse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <i386_cpuid@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x2000000,%eax
cmp    $0x0,%eax
je     113f <have_sse+0x2f>
movl   $0x1,-0x4(%rbp)
jmp    1146 <have_sse+0x36>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<have_sse>:
push   %rax
xor    %eax,%eax
call   1030 <i386_cpuid@plt>
shr    $0x19,%eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @have_sse() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @i386_cpuid()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = and i32 %4, 33554432
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %0
store i32 1, i32* %1
br label %9
8: ; preds = %0
store i32 0, i32* %1
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
define i32 @have_sse() {
%1 = tail call i32 (...) @i386_cpuid()
%2 = lshr i32 %1, 25
%3 = and i32 %2, 1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *malloc(int);
int read(int, char *, int);
scalar_t__ write(int, char *, int);
void copyBytes(int ofd, int dfd) {
  char *buffer = malloc(65536);
  int len;
  while ((len = read(ofd, buffer, 65536)) > 0) {
    if (write(dfd, buffer, len) <= 0)
      break;
  }
  free(buffer);
}


x86 assembly (clang, -O0):
<copyBytes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x10000,%edi
call   1060 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x10000,%edx
call   1050 <read@plt>
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
jle    119c <copyBytes+0x5c>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <write@plt>
cmp    $0x0,%rax
jg     1197 <copyBytes+0x57>
jmp    119c <copyBytes+0x5c>
jmp    115c <copyBytes+0x1c>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copyBytes>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %edi,%ebp
mov    $0x10000,%edi
call   1060 <malloc@plt>
mov    %rax,%rbx
cs nopw 0x0(%rax,%rax,1)
mov    %ebp,%edi
mov    %rbx,%rsi
mov    $0x10000,%edx
call   1050 <read@plt>
test   %eax,%eax
jle    1185 <copyBytes+0x45>
mov    %r14d,%edi
mov    %rbx,%rsi
mov    %eax,%edx
call   1040 <write@plt>
test   %rax,%rax
jg     1160 <copyBytes+0x20>
mov    %rbx,%rdi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @copyBytes(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = call i8* @malloc(i32 65536)
store i8* %7, i8** %5
br label %8
8: ; preds = %20, %2
%9 = load i32, i32* %3
%10 = load i8*, i8** %5
%11 = call i32 @read(i32 %9, i8* %10, i32 65536)
store i32 %11, i32* %6
%12 = icmp sgt i32 %11, 0
br i1 %12, label %13, label %21
13: ; preds = %8
%14 = load i32, i32* %4
%15 = load i8*, i8** %5
%16 = load i32, i32* %6
%17 = call i64 @write(i32 %14, i8* %15, i32 %16)
%18 = icmp sle i64 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %13
br label %21
20: ; preds = %13
br label %8
21: ; preds = %19, %8
%22 = load i8*, i8** %5
%23 = call i32 @free(i8* %22)
ret void
}

LLVM IR (-O2):
define void @copyBytes(i32 %0, i32 %1) {
%3 = tail call dereferenceable_or_null(65536) i8* @malloc(i32 65536)
br label %4
4: ; preds = %7, %2
%5 = tail call i32 @read(i32 %0, i8* %3, i32 65536)
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %4
%8 = tail call i64 @write(i32 %1, i8* %3, i32 %5)
%9 = icmp slt i64 %8, 1
br i1 %9, label %10, label %4
10: ; preds = %7, %4
%11 = tail call i32 @free(i8* %3)
ret void
}
/* Type definitions */
struct ListNode {
  int dummy;
};

/* Variables and functions */
struct ListNode *_mergeKLists(struct ListNode **, int /*<<< orphan*/, int);
struct ListNode *mergeKLists(struct ListNode **lists, int listsSize) {
  if (listsSize <= 1)
    return *lists;
  return _mergeKLists(lists, 0, listsSize - 1);
}


x86 assembly (clang, -O0):
<mergeKLists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x1,-0x14(%rbp)
jg     1139 <mergeKLists+0x29>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
jmp    114e <mergeKLists+0x3e>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
xor    %esi,%esi
call   1030 <_mergeKLists@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mergeKLists>:
cmp    $0x1,%esi
jg     1119 <mergeKLists+0x9>
mov    (%rdi),%rax
ret
mov    %esi,%edx
add    $0xffffffff,%edx
xor    %esi,%esi
jmp    1030 <_mergeKLists@plt>

LLVM IR (-O0):
%struct.ListNode = type { i32 }
define %struct.ListNode* @mergeKLists(%struct.ListNode** %0, i32 %1) {
%3 = alloca %struct.ListNode*
%4 = alloca %struct.ListNode**
%5 = alloca i32
store %struct.ListNode** %0, %struct.ListNode*** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp sle i32 %6, 1
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load %struct.ListNode**, %struct.ListNode*** %4
%10 = load %struct.ListNode*, %struct.ListNode** %9
store %struct.ListNode* %10, %struct.ListNode** %3
br label %16
11: ; preds = %2
%12 = load %struct.ListNode**, %struct.ListNode*** %4
%13 = load i32, i32* %5
%14 = sub nsw i32 %13, 1
%15 = call %struct.ListNode* @_mergeKLists(%struct.ListNode** %12, i32 0, i32 %14)
store %struct.ListNode* %15, %struct.ListNode** %3
br label %16
16: ; preds = %11, %8
%17 = load %struct.ListNode*, %struct.ListNode** %3
ret %struct.ListNode* %17
}

LLVM IR (-O2):
%struct.ListNode = type { i32 }
define %struct.ListNode* @mergeKLists(%struct.ListNode** %0, i32 %1) {
%3 = icmp slt i32 %1, 2
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = load %struct.ListNode*, %struct.ListNode** %0
br label %9
6: ; preds = %2
%7 = add nsw i32 %1, -1
%8 = tail call %struct.ListNode* @_mergeKLists(%struct.ListNode** %0, i32 0, i32 %7)
br label %9
9: ; preds = %6, %4
%10 = phi %struct.ListNode* [ %5, %4 ], [ %8, %6 ]
ret %struct.ListNode* %10
}
/* Type definitions */
struct katcl_parse {
  int dummy;
};

/* Variables and functions */
int is_type_parse_katcl(struct katcl_parse *, char);
int is_reply_parse_katcl(struct katcl_parse *p) {
  return is_type_parse_katcl(p, '!');
}


x86 assembly (clang, -O0):
<is_reply_parse_katcl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x21,%esi
call   1030 <is_type_parse_katcl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_reply_parse_katcl>:
mov    $0x21,%esi
jmp    1030 <is_type_parse_katcl@plt>

LLVM IR (-O0):
%struct.katcl_parse = type { i32 }
define i32 @is_reply_parse_katcl(%struct.katcl_parse* %0) {
%2 = alloca %struct.katcl_parse*
store %struct.katcl_parse* %0, %struct.katcl_parse** %2
%3 = load %struct.katcl_parse*, %struct.katcl_parse** %2
%4 = call i32 @is_type_parse_katcl(%struct.katcl_parse* %3, i8 signext 33)
ret i32 %4
}

LLVM IR (-O2):
%struct.katcl_parse = type { i32 }
define i32 @is_reply_parse_katcl(%struct.katcl_parse* %0) {
%2 = tail call i32 @is_type_parse_katcl(%struct.katcl_parse* %0, i8 signext 33)
ret i32 %2
}
void led_gpio_rgb_unregister(struct gpio_rgb_led *led) {}


x86 assembly (clang, -O0):
<led_gpio_rgb_unregister>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<led_gpio_rgb_unregister>:
ret

LLVM IR (-O0):
%struct.gpio_rgb_led = type opaque
define void @led_gpio_rgb_unregister(%struct.gpio_rgb_led* %0) {
%2 = alloca %struct.gpio_rgb_led*
store %struct.gpio_rgb_led* %0, %struct.gpio_rgb_led** %2
ret void
}

LLVM IR (-O2):
%struct.gpio_rgb_led = type opaque
define void @led_gpio_rgb_unregister(%struct.gpio_rgb_led* nocapture %0) {
ret void
}
extern int cset_gate_Leave(volatile int *gate, volatile int *pass) {
  if (*pass <= 0) {
    return -1;
  }
  asm volatile("add %[checkout], %[pass]\n"
               "jnz cset_gate_Leave_skip\n"
               "mov %[unlock], %[gate]\n"
               "cset_gate_Leave_skip:\n"
               : [gate] "=m"(*gate), [pass] "=m"(*pass)
               : [unlock] "r"(0), [checkout] "r"(-1)
               : "eax");
  return 0;
}


x86 assembly (clang, -O0):
<cset_gate_Leave>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
cmp    $0x0,%eax
jg     1127 <cset_gate_Leave+0x27>
movl   $0xffffffff,-0x4(%rbp)
jmp    1147 <cset_gate_Leave_skip+0x7>
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%rdx
xor    %esi,%esi
mov    $0xffffffff,%edi
add    %edi,(%rdx)
jne    1140 <cset_gate_Leave_skip>
mov    %esi,(%rcx)

x86 assembly (clang, -O2):
<cset_gate_Leave>:
cmpl   $0x0,(%rsi)
jle    1115 <cset_gate_Leave_skip+0x3>
xor    %ecx,%ecx
mov    $0xffffffff,%edx
add    %edx,(%rsi)
jne    1112 <cset_gate_Leave_skip>
mov    %ecx,(%rdi)

LLVM IR (-O0):
define i32 @cset_gate_Leave(i32* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
%6 = load i32*, i32** %5
%7 = load volatile i32, i32* %6
%8 = icmp sle i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 -1, i32* %3
br label %13
10: ; preds = %2
%11 = load i32*, i32** %4
%12 = load i32*, i32** %5
store i32 0, i32* %3
br label %13
13: ; preds = %10, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @cset_gate_Leave(i32* %0, i32* %1) {
%3 = load volatile i32, i32* %1
%4 = icmp slt i32 %3, 1
br i1 %4, label %6, label %5
5: ; preds = %2
tail call void asm sideeffect "add $3, $1\0Ajnz cset_gate_Leave_skip\0Amov $2, $0\0Acset_gate_Leave_skip:\0A", "=*m,=*m,r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %0, i32* elementtype(i32) %1, i32 0, i32 -1)
br label %6
6: ; preds = %2, %5
%7 = phi i32 [ 0, %5 ], [ -1, %2 ]
ret i32 %7
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char **argv) {
  int v = 55;
  printf("%d\n", v);
  printf("%c\n", v);
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x37,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%esi
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e8e(%rip),%rax
mov    (%rax),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x37,%esi
call   1030 <printf@plt>
lea    0xedb(%rip),%rdi
mov    $0x37,%esi
call   1030 <printf@plt>
mov    0x2ea6(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
@.str.1 = [4 x i8] c"%c\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 55, i32* %6
%7 = load i32, i32* %6
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = load i32, i32* %6
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %9)
%11 = load i32, i32* @EXIT_SUCCESS
ret i32 %11
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
@.str.1 = [4 x i8] c"%c\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 55)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 55)
%5 = load i32, i32* @EXIT_SUCCESS
ret i32 %5
}
int lseek(int des, unsigned long offset, int whence) { return -1; }


x86 assembly (clang, -O0):
<lseek>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lseek>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @lseek(i32 %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %4
store i64 %1, i64* %5
store i32 %2, i32* %6
ret i32 -1
}

LLVM IR (-O2):
define i32 @lseek(i32 %0, i64 %1, i32 %2) {
ret i32 -1
}
char *hash_plugin_summary(void) { return ("grub2 \t\tGRUB2 plugin"); }


x86 assembly (clang, -O0):
<hash_plugin_summary>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_plugin_summary>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [21 x i8] c"grub2 \09\09GRUB2 plugin\00"
define i8* @hash_plugin_summary() {
ret i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [21 x i8] c"grub2 \09\09GRUB2 plugin\00"
define i8* @hash_plugin_summary() {
ret i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ atof(char const *);
int /*<<< orphan*/ c_plsdiori(int /*<<< orphan*/);
int opt_ori(const char *opt, const char *myoptarg, void *client_data) {
  (void)opt;
  (void)client_data;
  c_plsdiori(atof(myoptarg));
  return 0;
}


x86 assembly (clang, -O0):
<opt_ori>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <atof@plt>
mov    %eax,%edi
call   1040 <c_plsdiori@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<opt_ori>:
push   %rax
mov    %rsi,%rdi
call   1030 <atof@plt>
mov    %eax,%edi
call   1040 <c_plsdiori@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @opt_ori(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %6
%9 = load i8*, i8** %5
%10 = call i32 @atof(i8* %9)
%11 = call i32 @c_plsdiori(i32 %10)
ret i32 0
}

LLVM IR (-O2):
define i32 @opt_ori(i8* nocapture readnone %0, i8* nocapture %1, i8* nocapture readnone %2) {
%4 = tail call i32 @atof(i8* %1)
%5 = tail call i32 @c_plsdiori(i32 %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_assert(int);
int main(void) {
  unsigned int x = 0;
  while (x < 0x0fffffff) {
    if (x < 0xfff1) {
      x++;
    } else {
      x += 2;
    }
  }
  __VERIFIER_assert(!(x % 2));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xfffffff,-0x8(%rbp)
jae    115c <main+0x4c>
cmpl   $0xfff1,-0x8(%rbp)
jae    114e <main+0x3e>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1157 <main+0x47>
mov    -0x8(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__VERIFIER_assert@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %edi,%edi
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
cmp    $0xfff1,%edi
sbb    $0x0,%edi
add    $0x2,%edi
cmp    $0xfffffff,%edi
jb     1120 <main+0x10>
push   %rax
not    %edi
and    $0x1,%edi
call   1030 <__VERIFIER_assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %15, %0
%4 = load i32, i32* %2
%5 = icmp ult i32 %4, 268435455
br i1 %5, label %6, label %16
6: ; preds = %3
%7 = load i32, i32* %2
%8 = icmp ult i32 %7, 65521
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %2
%11 = add i32 %10, 1
store i32 %11, i32* %2
br label %15
12: ; preds = %6
%13 = load i32, i32* %2
%14 = add i32 %13, 2
store i32 %14, i32* %2
br label %15
15: ; preds = %12, %9
br label %3
16: ; preds = %3
%17 = load i32, i32* %2
%18 = urem i32 %17, 2
%19 = icmp ne i32 %18, 0
%20 = xor i1 %19, true
%21 = zext i1 %20 to i32
%22 = call i32 @__VERIFIER_assert(i32 %21)
%23 = load i32, i32* %1
ret i32 %23
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %5, %1 ]
%3 = icmp ult i32 %2, 65521
%4 = select i1 %3, i32 1, i32 2
%5 = add nuw nsw i32 %4, %2
%6 = icmp ult i32 %5, 268435455
br i1 %6, label %1, label %7
7: ; preds = %1
%8 = and i32 %5, 1
%9 = xor i32 %8, 1
%10 = tail call i32 @__VERIFIER_assert(i32 %9)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ IntEnable(int);
int /*<<< orphan*/ IntRegister(int, void (*)());
void SDHostIntRegister(unsigned long ulBase, void (*pfnHandler)(void)) {
  IntRegister(175, pfnHandler);
  IntEnable(175);
}


x86 assembly (clang, -O0):
<SDHostIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    $0xaf,%edi
call   1040 <IntRegister@plt>
mov    $0xaf,%edi
call   1030 <IntEnable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SDHostIntRegister>:
push   %rax
mov    $0xaf,%edi
call   1040 <IntRegister@plt>
mov    $0xaf,%edi
pop    %rax
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @SDHostIntRegister(i64 %0, void ()* %1) {
%3 = alloca i64
%4 = alloca void ()*
store i64 %0, i64* %3
store void ()* %1, void ()** %4
%5 = load void ()*, void ()** %4
%6 = bitcast void ()* %5 to void (...)*
%7 = call i32 @IntRegister(i32 175, void (...)* %6)
%8 = call i32 @IntEnable(i32 175)
ret void
}

LLVM IR (-O2):
define void @SDHostIntRegister(i64 %0, void ()* %1) {
%3 = bitcast void ()* %1 to void (...)*
%4 = tail call i32 @IntRegister(i32 175, void (...)* %3)
%5 = tail call i32 @IntEnable(i32 175)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ AF_INET;
int SOCK_NONBLOCK;
int SOCK_STREAM;
int socket(int /*<<< orphan*/, int, int /*<<< orphan*/);
int Tcp_Open() { return socket(AF_INET, SOCK_STREAM | SOCK_NONBLOCK, 0); }


x86 assembly (clang, -O0):
<Tcp_Open>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
mov    0x2eac(%rip),%rax
mov    (%rax),%esi
mov    0x2eab(%rip),%rax
or     (%rax),%esi
xor    %edx,%edx
call   1030 <socket@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Tcp_Open>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
mov    0x2eb0(%rip),%rax
mov    0x2eb1(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
xor    %edx,%edx
jmp    1030 <socket@plt>

LLVM IR (-O0):
@AF_INET = global i32 0
@SOCK_STREAM = global i32 0
@SOCK_NONBLOCK = global i32 0
define i32 @Tcp_Open() {
%1 = load i32, i32* @AF_INET
%2 = load i32, i32* @SOCK_STREAM
%3 = load i32, i32* @SOCK_NONBLOCK
%4 = or i32 %2, %3
%5 = call i32 @socket(i32 %1, i32 %4, i32 0)
ret i32 %5
}

LLVM IR (-O2):
@AF_INET = global i32 0
@SOCK_STREAM = global i32 0
@SOCK_NONBLOCK = global i32 0
define i32 @Tcp_Open() {
%1 = load i32, i32* @AF_INET
%2 = load i32, i32* @SOCK_STREAM
%3 = load i32, i32* @SOCK_NONBLOCK
%4 = or i32 %3, %2
%5 = tail call i32 @socket(i32 %1, i32 %4, i32 0)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ err(int);
void err_div0(unsigned long long int num, int sn, int sd) {
  if (num == 0)
    err(1);
  else if (sn == sd)
    err(4);
  else
    err(5);
}


x86 assembly (clang, -O0):
<err_div0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113c <err_div0+0x2c>
mov    $0x1,%edi
call   1030 <err@plt>
jmp    1166 <err_div0+0x56>
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jne    1157 <err_div0+0x47>
mov    $0x4,%edi
call   1030 <err@plt>
jmp    1161 <err_div0+0x51>
mov    $0x5,%edi
call   1030 <err@plt>
jmp    1166 <err_div0+0x56>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<err_div0>:
xor    %eax,%eax
cmp    %edx,%esi
sete   %al
xor    $0x5,%eax
test   %rdi,%rdi
mov    $0x1,%edi
cmovne %eax,%edi
jmp    1030 <err@plt>

LLVM IR (-O0):
define void @err_div0(i64 %0, i32 %1, i32 %2) {
%4 = alloca i64
%5 = alloca i32
%6 = alloca i32
store i64 %0, i64* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i64, i64* %4
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %3
%10 = call i32 @err(i32 1)
br label %20
11: ; preds = %3
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = icmp eq i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = call i32 @err(i32 4)
br label %19
17: ; preds = %11
%18 = call i32 @err(i32 5)
br label %19
19: ; preds = %17, %15
br label %20
20: ; preds = %19, %9
ret void
}

LLVM IR (-O2):
define void @err_div0(i64 %0, i32 %1, i32 %2) {
%4 = icmp eq i64 %0, 0
%5 = icmp eq i32 %1, %2
%6 = select i1 %5, i32 4, i32 5
%7 = select i1 %4, i32 1, i32 %6
%8 = tail call i32 @err(i32 %7)
ret void
}