xunge/DecIR huggingface dataset:
/* Variables and functions */
int init_reset();
int /*<<< orphan*/ radio_df_ant_configure();
int lll_df_init(void) {
  radio_df_ant_configure();
  return init_reset();
}


x86 assembly (clang, -O0):
<lll_df_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <radio_df_ant_configure@plt>
mov    $0x0,%al
call   1030 <init_reset@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lll_df_init>:
push   %rax
xor    %eax,%eax
call   1040 <radio_df_ant_configure@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <init_reset@plt>

LLVM IR (-O0):
define i32 @lll_df_init() {
%1 = call i32 (...) @radio_df_ant_configure()
%2 = call i32 (...) @init_reset()
ret i32 %2
}

LLVM IR (-O2):
define i32 @lll_df_init() {
%1 = tail call i32 (...) @radio_df_ant_configure()
%2 = tail call i32 (...) @init_reset()
ret i32 %2
}
int test_imm_FBuint8_reg(unsigned char val) {
  return ((val) & (0xFB << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FBuint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xfb,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FBuint8_reg>:
test   $0xfb,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FBuint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 251
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_FBuint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -5
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
unsigned addval_405(unsigned x) { return x + 3229931161U; }


x86 assembly (clang, -O0):
<addval_405>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xc084d699,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<addval_405>:
lea    -0x3f7b2967(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @addval_405(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, -1065036135
ret i32 %4
}

LLVM IR (-O2):
define i32 @addval_405(i32 %0) {
%2 = add i32 %0, -1065036135
ret i32 %2
}
void DectoBin(unsigned char *letrabin, unsigned char letra) {
  int i, aux;
  aux = letra;
  for (i = 7; i >= 0; i--) {
    letrabin[i] = aux % 2;
    aux = aux / 2;
  }
}


x86 assembly (clang, -O0):
<DectoBin>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
mov    %eax,-0x14(%rbp)
movl   $0x7,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jl     1158 <DectoBin+0x58>
mov    -0x14(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    111c <DectoBin+0x1c>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DectoBin>:
mov    %esi,%eax
and    $0x1,%al
mov    %al,0x7(%rdi)
mov    %esi,%eax
shr    %al
and    $0x1,%al
mov    %al,0x6(%rdi)
mov    %esi,%eax
shr    $0x2,%al
and    $0x1,%al
mov    %al,0x5(%rdi)
mov    %esi,%eax
shr    $0x3,%al
and    $0x1,%al
mov    %al,0x4(%rdi)
mov    %esi,%eax
shr    $0x4,%al
and    $0x1,%al
mov    %al,0x3(%rdi)
mov    %esi,%eax
shr    $0x5,%al
and    $0x1,%al
mov    %al,0x2(%rdi)
mov    %esi,%eax
shr    $0x6,%al
and    $0x1,%al
mov    %al,0x1(%rdi)
shr    $0x7,%sil
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @DectoBin(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8 %1, i8* %4
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
store i32 %8, i32* %6
store i32 7, i32* %5
br label %9
9: ; preds = %22, %2
%10 = load i32, i32* %5
%11 = icmp sge i32 %10, 0
br i1 %11, label %12, label %25
12: ; preds = %9
%13 = load i32, i32* %6
%14 = srem i32 %13, 2
%15 = trunc i32 %14 to i8
%16 = load i8*, i8** %3
%17 = load i32, i32* %5
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
store i8 %15, i8* %19
%20 = load i32, i32* %6
%21 = sdiv i32 %20, 2
store i32 %21, i32* %6
br label %22
22: ; preds = %12
%23 = load i32, i32* %5
%24 = add nsw i32 %23, -1
store i32 %24, i32* %5
br label %9
25: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @DectoBin(i8* nocapture writeonly %0, i8 zeroext %1) {
%3 = and i8 %1, 1
%4 = getelementptr inbounds i8, i8* %0, i64 7
store i8 %3, i8* %4
%5 = lshr i8 %1, 1
%6 = and i8 %5, 1
%7 = getelementptr inbounds i8, i8* %0, i64 6
store i8 %6, i8* %7
%8 = lshr i8 %1, 2
%9 = and i8 %8, 1
%10 = getelementptr inbounds i8, i8* %0, i64 5
store i8 %9, i8* %10
%11 = lshr i8 %1, 3
%12 = and i8 %11, 1
%13 = getelementptr inbounds i8, i8* %0, i64 4
store i8 %12, i8* %13
%14 = lshr i8 %1, 4
%15 = and i8 %14, 1
%16 = getelementptr inbounds i8, i8* %0, i64 3
store i8 %15, i8* %16
%17 = lshr i8 %1, 5
%18 = and i8 %17, 1
%19 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %18, i8* %19
%20 = lshr i8 %1, 6
%21 = and i8 %20, 1
%22 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %21, i8* %22
%23 = lshr i8 %1, 7
store i8 %23, i8* %0
ret void
}
void canon_dNaN(unsigned a[2]) {
  if ((a[0] & 0x7FF00000) != 0x7FF00000)
    return;
  if (!(a[0] & 0xFFFFF) && !a[1])
    return;
  a[0] &= 0x7FF80000;
  a[1] = 0x00000001;
}


x86 assembly (clang, -O0):
<canon_dNaN>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0x7ff00000,%eax
cmp    $0x7ff00000,%eax
je     1123 <canon_dNaN+0x23>
jmp    1163 <canon_dNaN+0x63>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0xfffff,%eax
cmp    $0x0,%eax
jne    114a <canon_dNaN+0x4a>
mov    -0x8(%rbp),%rax
cmpl   $0x0,0x4(%rax)
jne    114a <canon_dNaN+0x4a>
jmp    1163 <canon_dNaN+0x63>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
and    $0x7ff80000,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
movl   $0x1,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<canon_dNaN>:
mov    (%rdi),%eax
mov    %eax,%ecx
not    %ecx
test   $0x7ff00000,%ecx
jne    1129 <canon_dNaN+0x29>
test   $0xfffff,%eax
jne    111b <canon_dNaN+0x1b>
cmpl   $0x0,0x4(%rdi)
je     1129 <canon_dNaN+0x29>
and    $0x7ff80000,%eax
mov    %eax,(%rdi)
movl   $0x1,0x4(%rdi)
ret

LLVM IR (-O0):
define void @canon_dNaN(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = and i32 %5, 2146435072
%7 = icmp ne i32 %6, 2146435072
br i1 %7, label %8, label %9
8: ; preds = %1
br label %28
9: ; preds = %1
%10 = load i32*, i32** %2
%11 = getelementptr inbounds i32, i32* %10, i64 0
%12 = load i32, i32* %11
%13 = and i32 %12, 1048575
%14 = icmp ne i32 %13, 0
br i1 %14, label %21, label %15
15: ; preds = %9
%16 = load i32*, i32** %2
%17 = getelementptr inbounds i32, i32* %16, i64 1
%18 = load i32, i32* %17
%19 = icmp ne i32 %18, 0
br i1 %19, label %21, label %20
20: ; preds = %15
br label %28
21: ; preds = %15, %9
%22 = load i32*, i32** %2
%23 = getelementptr inbounds i32, i32* %22, i64 0
%24 = load i32, i32* %23
%25 = and i32 %24, 2146959360
store i32 %25, i32* %23
%26 = load i32*, i32** %2
%27 = getelementptr inbounds i32, i32* %26, i64 1
store i32 1, i32* %27
br label %28
28: ; preds = %21, %20, %8
ret void
}

LLVM IR (-O2):
define void @canon_dNaN(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 2146435072
%4 = icmp eq i32 %3, 2146435072
br i1 %4, label %5, label %15
5: ; preds = %1
%6 = and i32 %2, 1048575
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = getelementptr inbounds i32, i32* %0, i64 1
%10 = load i32, i32* %9
%11 = icmp eq i32 %10, 0
br i1 %11, label %15, label %12
12: ; preds = %8, %5
%13 = and i32 %2, 2146959360
store i32 %13, i32* %0
%14 = getelementptr inbounds i32, i32* %0, i64 1
store i32 1, i32* %14
br label %15
15: ; preds = %8, %1, %12
ret void
}
void vec3_add3(double *v1, const double *v2, const double *v3) {
  v1[0] = v2[0] + v3[0];
  v1[1] = v2[1] + v3[1];
  v1[2] = v2[2] + v3[2];
}


x86 assembly (clang, -O0):
<vec3_add3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x18(%rbp),%rax
addsd  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x18(%rbp),%rax
addsd  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,0x8(%rax)
mov    -0x10(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x18(%rbp),%rax
addsd  0x10(%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec3_add3>:
movsd  (%rsi),%xmm0
addsd  (%rdx),%xmm0
movsd  %xmm0,(%rdi)
movsd  0x8(%rsi),%xmm0
addsd  0x8(%rdx),%xmm0
movsd  %xmm0,0x8(%rdi)
movsd  0x10(%rsi),%xmm0
addsd  0x10(%rdx),%xmm0
movsd  %xmm0,0x10(%rdi)
ret

LLVM IR (-O0):
define void @vec3_add3(double* %0, double* %1, double* %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca double*
store double* %0, double** %4
store double* %1, double** %5
store double* %2, double** %6
%7 = load double*, double** %5
%8 = getelementptr inbounds double, double* %7, i64 0
%9 = load double, double* %8
%10 = load double*, double** %6
%11 = getelementptr inbounds double, double* %10, i64 0
%12 = load double, double* %11
%13 = fadd double %9, %12
%14 = load double*, double** %4
%15 = getelementptr inbounds double, double* %14, i64 0
store double %13, double* %15
%16 = load double*, double** %5
%17 = getelementptr inbounds double, double* %16, i64 1
%18 = load double, double* %17
%19 = load double*, double** %6
%20 = getelementptr inbounds double, double* %19, i64 1
%21 = load double, double* %20
%22 = fadd double %18, %21
%23 = load double*, double** %4
%24 = getelementptr inbounds double, double* %23, i64 1
store double %22, double* %24
%25 = load double*, double** %5
%26 = getelementptr inbounds double, double* %25, i64 2
%27 = load double, double* %26
%28 = load double*, double** %6
%29 = getelementptr inbounds double, double* %28, i64 2
%30 = load double, double* %29
%31 = fadd double %27, %30
%32 = load double*, double** %4
%33 = getelementptr inbounds double, double* %32, i64 2
store double %31, double* %33
ret void
}

LLVM IR (-O2):
define void @vec3_add3(double* nocapture writeonly %0, double* nocapture %1, double* nocapture %2) {
%4 = load double, double* %1
%5 = load double, double* %2
%6 = fadd double %4, %5
store double %6, double* %0
%7 = getelementptr inbounds double, double* %1, i64 1
%8 = load double, double* %7
%9 = getelementptr inbounds double, double* %2, i64 1
%10 = load double, double* %9
%11 = fadd double %8, %10
%12 = getelementptr inbounds double, double* %0, i64 1
store double %11, double* %12
%13 = getelementptr inbounds double, double* %1, i64 2
%14 = load double, double* %13
%15 = getelementptr inbounds double, double* %2, i64 2
%16 = load double, double* %15
%17 = fadd double %14, %16
%18 = getelementptr inbounds double, double* %0, i64 2
store double %17, double* %18
ret void
}
void build_Dn(const double *u, const unsigned int k, double *Dn) {
  Dn[0] = u[0];
  Dn[1] = u[1];
}


x86 assembly (clang, -O0):
<build_Dn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<build_Dn>:
movsd  (%rdi),%xmm0
movsd  %xmm0,(%rdx)
movsd  0x8(%rdi),%xmm0
movsd  %xmm0,0x8(%rdx)
ret

LLVM IR (-O0):
define void @build_Dn(double* %0, i32 %1, double* %2) {
%4 = alloca double*
%5 = alloca i32
%6 = alloca double*
store double* %0, double** %4
store i32 %1, i32* %5
store double* %2, double** %6
%7 = load double*, double** %4
%8 = getelementptr inbounds double, double* %7, i64 0
%9 = load double, double* %8
%10 = load double*, double** %6
%11 = getelementptr inbounds double, double* %10, i64 0
store double %9, double* %11
%12 = load double*, double** %4
%13 = getelementptr inbounds double, double* %12, i64 1
%14 = load double, double* %13
%15 = load double*, double** %6
%16 = getelementptr inbounds double, double* %15, i64 1
store double %14, double* %16
ret void
}

LLVM IR (-O2):
define void @build_Dn(double* nocapture %0, i32 %1, double* nocapture writeonly %2) {
%4 = load double, double* %0
store double %4, double* %2
%5 = getelementptr inbounds double, double* %0, i64 1
%6 = load double, double* %5
%7 = getelementptr inbounds double, double* %2, i64 1
store double %6, double* %7
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;

/* Variables and functions */
time_t time(time_t *tloc) {
  time_t res;
  if (!tloc)
    *tloc = res;
  return res;
}


x86 assembly (clang, -O0):
<time>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    111c <time+0x1c>
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<time>:
ret

LLVM IR (-O0):
define i32 @time(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = icmp ne i32* %4, null
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = load i32*, i32** %2
store i32 %7, i32* %8
br label %9
9: ; preds = %6, %1
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @time(i32* readnone %0) {
%2 = icmp ne i32* %0, null
tail call void @llvm.assume(i1 %2)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ foo();
int /*<<< orphan*/ foo2();
int /*<<< orphan*/ getchar();
int /*<<< orphan*/ printf(char *);
void main() {
  printf("hello from main\n");
  foo();
  foo2();
  getchar();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xeb5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1060 <foo@plt>
mov    $0x0,%al
call   1040 <foo2@plt>
mov    $0x0,%al
call   1050 <getchar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeb8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1060 <foo@plt>
xor    %eax,%eax
call   1040 <foo2@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <getchar@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"hello from main\0A\00"
define void @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @foo()
%3 = call i32 (...) @foo2()
%4 = call i32 (...) @getchar()
ret void
}

LLVM IR (-O2):
@str = [16 x i8] c"hello from main\00"
define void @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @foo()
%3 = tail call i32 (...) @foo2()
%4 = tail call i32 (...) @getchar()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
scalar_t__ size_add_check(size_t const, size_t const);
int size_add(size_t *z, const size_t x, const size_t y) {
  assert(z != NULL);
  if (size_add_check(x, y) != 0) {
    *z = x + y;
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<size_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1040 <size_add_check@plt>
cmp    $0x0,%rax
je     1178 <size_add+0x58>
mov    -0x18(%rbp),%rcx
add    -0x20(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x0,-0x4(%rbp)
jmp    117f <size_add+0x5f>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<size_add>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%rbx
mov    %rsi,%r15
mov    %rdi,%r14
xor    %edi,%edi
test   %r14,%r14
setne  %dil
call   1030 <assert@plt>
mov    %r15,%rdi
mov    %rbx,%rsi
call   1040 <size_add_check@plt>
test   %rax,%rax
je     1156 <size_add+0x36>
add    %r15,%rbx
mov    %rbx,(%r14)
xor    %eax,%eax
jmp    115b <size_add+0x3b>
mov    $0x1,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @size_add(i64* %0, i64 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i64*
%6 = alloca i64
%7 = alloca i64
store i64* %0, i64** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%8 = load i64*, i64** %5
%9 = icmp ne i64* %8, null
%10 = zext i1 %9 to i32
%11 = call i32 @assert(i32 %10)
%12 = load i64, i64* %6
%13 = load i64, i64* %7
%14 = call i64 @size_add_check(i64 %12, i64 %13)
%15 = icmp ne i64 %14, 0
br i1 %15, label %16, label %21
16: ; preds = %3
%17 = load i64, i64* %6
%18 = load i64, i64* %7
%19 = add i64 %17, %18
%20 = load i64*, i64** %5
store i64 %19, i64* %20
store i32 0, i32* %4
br label %22
21: ; preds = %3
store i32 1, i32* %4
br label %22
22: ; preds = %21, %16
%23 = load i32, i32* %4
ret i32 %23
}

LLVM IR (-O2):
define i32 @size_add(i64* writeonly %0, i64 %1, i64 %2) {
%4 = icmp ne i64* %0, null
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
%7 = tail call i64 @size_add_check(i64 %1, i64 %2)
%8 = icmp eq i64 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %3
%10 = add i64 %2, %1
store i64 %10, i64* %0
br label %11
11: ; preds = %3, %9
%12 = phi i32 [ 0, %9 ], [ 1, %3 ]
ret i32 %12
}
void __IO_wait_for_interrupt() {}


x86 assembly (clang, -O0):
<__IO_wait_for_interrupt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__IO_wait_for_interrupt>:
ret

LLVM IR (-O0):
define void @__IO_wait_for_interrupt() {
ret void
}

LLVM IR (-O2):
define void @__IO_wait_for_interrupt() {
ret void
}
/* Variables and functions */
int rand();
int randomInt(int n) { return rand() % n; }


x86 assembly (clang, -O0):
<randomInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cltd
idivl  -0x4(%rbp)
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randomInt>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %ebx
mov    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @randomInt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @rand()
%4 = load i32, i32* %2
%5 = srem i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @randomInt(i32 %0) {
%2 = tail call i32 (...) @rand()
%3 = srem i32 %2, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ bar(int, int, int);
void foo(int a, int b, int c) {
  bar(a, b, c);
  bar(a, b, c);
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <bar@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <bar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %edi,%ebx
call   1030 <bar@plt>
mov    %ebx,%edi
mov    %ebp,%esi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <bar@plt>

LLVM IR (-O0):
define void @foo(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @bar(i32 %7, i32 %8, i32 %9)
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = call i32 @bar(i32 %11, i32 %12, i32 %13)
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @bar(i32 %0, i32 %1, i32 %2)
%5 = tail call i32 @bar(i32 %0, i32 %1, i32 %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ SYS_write;
int /*<<< orphan*/ syscall(int /*<<< orphan*/, int, void const *, size_t);
ssize_t real_write(int fd, __const void *buf, size_t count) {
  return (syscall(SYS_write, (fd), (buf), (count)));
}


x86 assembly (clang, -O0):
<real_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<real_write>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %edi,%esi
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@SYS_write = global i32 0
define i32 @real_write(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32, i32* @SYS_write
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = call i32 @syscall(i32 %7, i32 %8, i8* %9, i64 %10)
ret i32 %11
}

LLVM IR (-O2):
@SYS_write = global i32 0
define i32 @real_write(i32 %0, i8* %1, i64 %2) {
%4 = load i32, i32* @SYS_write
%5 = tail call i32 @syscall(i32 %4, i32 %0, i8* %1, i64 %2)
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ ct_iterate_plane(int /*<<< orphan*/ *, int, int, int);
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int main(void) {
  FILE *fout = fopen("ct_ffe_cipher.ppm", "w");
  assert(fout != NULL);
  ct_iterate_plane(fout, 1024, 1024, 128);
  fclose(fout);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeaa(%rip),%rdi
lea    0xeb5(%rip),%rsi
call   1060 <fopen@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
mov    -0x10(%rbp),%rdi
mov    $0x400,%edx
mov    $0x80,%ecx
mov    %edx,%esi
call   1040 <ct_iterate_plane@plt>
mov    -0x10(%rbp),%rdi
call   1030 <fclose@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xeb8(%rip),%rdi
lea    0xec3(%rip),%rsi
call   1060 <fopen@plt>
mov    %rax,%rbx
xor    %edi,%edi
test   %rax,%rax
setne  %dil
call   1050 <assert@plt>
mov    %rbx,%rdi
mov    $0x400,%esi
mov    $0x400,%edx
mov    $0x80,%ecx
call   1040 <ct_iterate_plane@plt>
mov    %rbx,%rdi
call   1030 <fclose@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"ct_ffe_cipher.ppm\00"
@.str.1 = [2 x i8] c"w\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32 0, i32* %1
%3 = call i32* @fopen(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %3, i32** %2
%4 = load i32*, i32** %2
%5 = icmp ne i32* %4, null
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
%8 = load i32*, i32** %2
%9 = call i32 @ct_iterate_plane(i32* %8, i32 1024, i32 1024, i32 128)
%10 = load i32*, i32** %2
%11 = call i32 @fclose(i32* %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [18 x i8] c"ct_ffe_cipher.ppm\00"
@.str.1 = [2 x i8] c"w\00"
define i32 @main() {
%1 = tail call i32* @fopen(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%2 = icmp ne i32* %1, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = tail call i32 @ct_iterate_plane(i32* %1, i32 1024, i32 1024, i32 128)
%6 = tail call i32 @fclose(i32* %1)
ret i32 0
}
int fun1179() { return 1179; }


x86 assembly (clang, -O0):
<fun1179>:
push   %rbp
mov    %rsp,%rbp
mov    $0x49b,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1179>:
mov    $0x49b,%eax
ret

LLVM IR (-O0):
define i32 @fun1179() {
ret i32 1179
}

LLVM IR (-O2):
define i32 @fun1179() {
ret i32 1179
}
/* Variables and functions */
int /*<<< orphan*/ f(unsigned int);
int main() {
  unsigned int buflen, i;
  buflen = 4 + 3 * 16;
  for (i = 4; i < buflen; i += 3)
    f(i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x34,-0x8(%rbp)
movl   $0x4,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jae    114f <main+0x3f>
mov    -0xc(%rbp),%edi
call   1030 <f@plt>
mov    -0xc(%rbp),%eax
add    $0x3,%eax
mov    %eax,-0xc(%rbp)
jmp    112d <main+0x1d>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
call   1030 <f@plt>
mov    $0x7,%edi
call   1030 <f@plt>
mov    $0xa,%edi
call   1030 <f@plt>
mov    $0xd,%edi
call   1030 <f@plt>
mov    $0x10,%edi
call   1030 <f@plt>
mov    $0x13,%edi
call   1030 <f@plt>
mov    $0x16,%edi
call   1030 <f@plt>
mov    $0x19,%edi
call   1030 <f@plt>
mov    $0x1c,%edi
call   1030 <f@plt>
mov    $0x1f,%edi
call   1030 <f@plt>
mov    $0x22,%edi
call   1030 <f@plt>
mov    $0x25,%edi
call   1030 <f@plt>
mov    $0x28,%edi
call   1030 <f@plt>
mov    $0x2b,%edi
call   1030 <f@plt>
mov    $0x2e,%edi
call   1030 <f@plt>
mov    $0x31,%edi
call   1030 <f@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 52, i32* %2
store i32 4, i32* %3
br label %4
4: ; preds = %11, %0
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp ult i32 %5, %6
br i1 %7, label %8, label %14
8: ; preds = %4
%9 = load i32, i32* %3
%10 = call i32 @f(i32 %9)
br label %11
11: ; preds = %8
%12 = load i32, i32* %3
%13 = add i32 %12, 3
store i32 %13, i32* %3
br label %4
14: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @f(i32 4)
%2 = tail call i32 @f(i32 7)
%3 = tail call i32 @f(i32 10)
%4 = tail call i32 @f(i32 13)
%5 = tail call i32 @f(i32 16)
%6 = tail call i32 @f(i32 19)
%7 = tail call i32 @f(i32 22)
%8 = tail call i32 @f(i32 25)
%9 = tail call i32 @f(i32 28)
%10 = tail call i32 @f(i32 31)
%11 = tail call i32 @f(i32 34)
%12 = tail call i32 @f(i32 37)
%13 = tail call i32 @f(i32 40)
%14 = tail call i32 @f(i32 43)
%15 = tail call i32 @f(i32 46)
%16 = tail call i32 @f(i32 49)
ret i32 0
}
void TMTimerIsLockOwner(void) {}


x86 assembly (clang, -O0):
<TMTimerIsLockOwner>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TMTimerIsLockOwner>:
ret

LLVM IR (-O0):
define void @TMTimerIsLockOwner() {
ret void
}

LLVM IR (-O2):
define void @TMTimerIsLockOwner() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void bar(void) { printf("secondary bar\n"); }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"secondary bar\0A\00"
define void @bar() {
%1 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [14 x i8] c"secondary bar\00"
define void @bar() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret void
}
void compile_time_assert(unsigned cond) {
  extern void _compile_time_assert(void);
  if (!cond)
    _compile_time_assert();
}


x86 assembly (clang, -O0):
<compile_time_assert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    112a <compile_time_assert+0x1a>
call   1030 <_compile_time_assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compile_time_assert>:
test   %edi,%edi
je     1115 <compile_time_assert+0x5>
ret
jmp    1030 <_compile_time_assert@plt>

LLVM IR (-O0):
define void @compile_time_assert(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %6, label %5
5: ; preds = %1
br label %6
6: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @compile_time_assert(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %3, label %4
3: ; preds = %1
tail call void @_compile_time_assert()
br label %4
4: ; preds = %3, %1
ret void
}
void buttonignition1() {}


x86 assembly (clang, -O0):
<buttonignition1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buttonignition1>:
ret

LLVM IR (-O0):
define void @buttonignition1() {
ret void
}

LLVM IR (-O2):
define void @buttonignition1() {
ret void
}
void *get_per_cpu_data(void) {
  void *ptr;
  __asm__ volatile("movq	%%fs:0, %0" : "=r"(ptr) : : "memory");
  return ptr;
}


x86 assembly (clang, -O0):
<get_per_cpu_data>:
push   %rbp
mov    %rsp,%rbp
mov    %fs:0x0,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_per_cpu_data>:
mov    %fs:0x0,%rax
ret

LLVM IR (-O0):
define i8* @get_per_cpu_data() {
%1 = alloca i8*
%2 = call i8* asm sideeffect "movq\09%fs:0, $0", "=r,~{memory},~{dirflag},~{fpsr},~{flags}"()
store i8* %2, i8** %1
%3 = load i8*, i8** %1
ret i8* %3
}

LLVM IR (-O2):
define i8* @get_per_cpu_data() {
%1 = tail call i8* asm sideeffect "movq\09%fs:0, $0", "=r,~{memory},~{dirflag},~{fpsr},~{flags}"()
ret i8* %1
}
void U_WMRREALIZEPALETTE_print(const char *contents) { (void)(contents); }


x86 assembly (clang, -O0):
<U_WMRREALIZEPALETTE_print>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRREALIZEPALETTE_print>:
ret

LLVM IR (-O0):
define void @U_WMRREALIZEPALETTE_print(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @U_WMRREALIZEPALETTE_print(i8* nocapture %0) {
ret void
}
int test_imm_C9uint16_reg(unsigned short val) {
  return ((val) & (-0xC9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C9uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff37,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C9uint16_reg>:
test   $0xff37,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C9uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -201
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C9uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -201
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ stdout;
void clearline(void) { fprintf(stdout, "%c[2K", 0x1B); }


x86 assembly (clang, -O0):
<clearline>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
mov    $0x1b,%edx
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clearline>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
mov    $0x1b,%edx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [6 x i8] c"%c[2K\00"
define void @clearline() {
%1 = load i32, i32* @stdout
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 27)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [6 x i8] c"%c[2K\00"
define void @clearline() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 27)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_eval(int /*<<< orphan*/);
int /*<<< orphan*/ isalnum(char);
void test_alnum() {
  clang_analyzer_eval(isalnum('1'));
  clang_analyzer_eval(isalnum(')'));
}


x86 assembly (clang, -O0):
<test_alnum>:
push   %rbp
mov    %rsp,%rbp
mov    $0x31,%edi
call   1030 <isalnum@plt>
mov    %eax,%edi
call   1040 <clang_analyzer_eval@plt>
mov    $0x29,%edi
call   1030 <isalnum@plt>
mov    %eax,%edi
call   1040 <clang_analyzer_eval@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_alnum>:
push   %rax
mov    $0x31,%edi
call   1030 <isalnum@plt>
mov    %eax,%edi
call   1040 <clang_analyzer_eval@plt>
mov    $0x29,%edi
call   1030 <isalnum@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <clang_analyzer_eval@plt>

LLVM IR (-O0):
define void @test_alnum() {
%1 = call i32 @isalnum(i8 signext 49)
%2 = call i32 @clang_analyzer_eval(i32 %1)
%3 = call i32 @isalnum(i8 signext 41)
%4 = call i32 @clang_analyzer_eval(i32 %3)
ret void
}

LLVM IR (-O2):
define void @test_alnum() {
%1 = tail call i32 @isalnum(i8 signext 49)
%2 = tail call i32 @clang_analyzer_eval(i32 %1)
%3 = tail call i32 @isalnum(i8 signext 41)
%4 = tail call i32 @clang_analyzer_eval(i32 %3)
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ putc(int, int /*<<< orphan*/ *);
void write_uint32(FILE *out, uint32_t value) {
  putc((value >> 24) & 0xff, out);
  putc((value >> 16) & 0xff, out);
  putc((value >> 8) & 0xff, out);
  putc(value & 0xff, out);
}


x86 assembly (clang, -O0):
<write_uint32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
sar    $0x18,%edi
and    $0xff,%edi
mov    -0x8(%rbp),%rsi
call   1030 <putc@plt>
mov    -0xc(%rbp),%edi
sar    $0x10,%edi
and    $0xff,%edi
mov    -0x8(%rbp),%rsi
call   1030 <putc@plt>
mov    -0xc(%rbp),%edi
sar    $0x8,%edi
and    $0xff,%edi
mov    -0x8(%rbp),%rsi
call   1030 <putc@plt>
mov    -0xc(%rbp),%edi
and    $0xff,%edi
mov    -0x8(%rbp),%rsi
call   1030 <putc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_uint32>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
mov    %esi,%eax
shr    $0x18,%eax
mov    %eax,%edi
mov    %r14,%rsi
call   1030 <putc@plt>
mov    %ebx,%eax
shr    $0x10,%eax
movzbl %al,%edi
mov    %r14,%rsi
call   1030 <putc@plt>
movzbl %bh,%edi
mov    %r14,%rsi
call   1030 <putc@plt>
movzbl %bl,%edi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <putc@plt>

LLVM IR (-O0):
define void @write_uint32(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 24
%7 = and i32 %6, 255
%8 = load i32*, i32** %3
%9 = call i32 @putc(i32 %7, i32* %8)
%10 = load i32, i32* %4
%11 = ashr i32 %10, 16
%12 = and i32 %11, 255
%13 = load i32*, i32** %3
%14 = call i32 @putc(i32 %12, i32* %13)
%15 = load i32, i32* %4
%16 = ashr i32 %15, 8
%17 = and i32 %16, 255
%18 = load i32*, i32** %3
%19 = call i32 @putc(i32 %17, i32* %18)
%20 = load i32, i32* %4
%21 = and i32 %20, 255
%22 = load i32*, i32** %3
%23 = call i32 @putc(i32 %21, i32* %22)
ret void
}

LLVM IR (-O2):
define void @write_uint32(i32* nocapture %0, i32 %1) {
%3 = lshr i32 %1, 24
%4 = tail call i32 @putc(i32 %3, i32* %0)
%5 = lshr i32 %1, 16
%6 = and i32 %5, 255
%7 = tail call i32 @putc(i32 %6, i32* %0)
%8 = lshr i32 %1, 8
%9 = and i32 %8, 255
%10 = tail call i32 @putc(i32 %9, i32* %0)
%11 = and i32 %1, 255
%12 = tail call i32 @putc(i32 %11, i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  for (int i = 0; i < 10000; ++i)
    printf("%d ", i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x2710,-0x8(%rbp)
jge    1150 <main+0x40>
mov    -0x8(%rbp),%esi
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xee3(%rip),%r14
nopl   (%rax)
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x2710,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d \00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %9, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 10000
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = load i32, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
br label %9
9: ; preds = %6
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
br label %3
12: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d \00"
define i32 @main() {
br label %2
1: ; preds = %2
ret i32 0
2: ; preds = %0, %2
%3 = phi i32 [ 0, %0 ], [ %5, %2 ]
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = add nuw nsw i32 %3, 1
%6 = icmp eq i32 %5, 10000
br i1 %6, label %1, label %2
}
/* Variables and functions */
float logf(float);
float pow(int, double);
float img_deflect_iec2(float db) {
  float v = pow(10, .05 * db);
  v *= 3.17f;
  return 0.3f * logf(v) + 0.77633f;
}


x86 assembly (clang, -O0):
<img_deflect_iec2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xed2(%rip),%xmm0
mulsd  %xmm1,%xmm0
mov    $0xa,%edi
call   1040 <pow@plt>
movss  %xmm0,-0x8(%rbp)
movss  0xeaf(%rip),%xmm0
mulss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
call   1030 <logf@plt>
movss  0xe8b(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xe83(%rip),%xmm1
addss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<img_deflect_iec2>:
push   %rax
cvtss2sd %xmm0,%xmm0
mulsd  0xed3(%rip),%xmm0
mov    $0xa,%edi
call   1040 <pow@plt>
mulss  0xec9(%rip),%xmm0
call   1030 <logf@plt>
mulss  0xec0(%rip),%xmm0
addss  0xebc(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @img_deflect_iec2(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = fpext float %4 to double
%6 = fmul double 5.000000e-02, %5
%7 = call float @pow(i32 10, double %6)
store float %7, float* %3
%8 = load float, float* %3
%9 = fmul float %8, 0x40095C2900000000
store float %9, float* %3
%10 = load float, float* %3
%11 = call float @logf(float %10)
%12 = call float @llvm.fmuladd.f32(float 0x3FD3333340000000, float %11, float 0x3FE8D7B200000000)
ret float %12
}

LLVM IR (-O2):
define float @img_deflect_iec2(float %0) {
%2 = fpext float %0 to double
%3 = fmul double %2, 5.000000e-02
%4 = tail call float @pow(i32 10, double %3)
%5 = fmul float %4, 0x40095C2900000000
%6 = tail call float @logf(float %5)
%7 = tail call float @llvm.fmuladd.f32(float %6, float 0x3FD3333340000000, float 0x3FE8D7B200000000)
ret float %7
}
float INTERP(float a, float b, float t) { return a * (1 - t) + b * t; }


x86 assembly (clang, -O0):
<INTERP>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xee0(%rip),%xmm2
subss  -0xc(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<INTERP>:
movss  0xef8(%rip),%xmm3
subss  %xmm2,%xmm3
mulss  %xmm2,%xmm1
mulss  %xmm3,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @INTERP(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %6
%9 = fsub float 1.000000e+00, %8
%10 = load float, float* %5
%11 = load float, float* %6
%12 = fmul float %10, %11
%13 = call float @llvm.fmuladd.f32(float %7, float %9, float %12)
ret float %13
}

LLVM IR (-O2):
define float @INTERP(float %0, float %1, float %2) {
%4 = fsub float 1.000000e+00, %2
%5 = fmul float %1, %2
%6 = tail call float @llvm.fmuladd.f32(float %0, float %4, float %5)
ret float %6
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int copy_multprec_container_to_target_solutions(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc(286, a, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<copy_multprec_container_to_target_solutions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x11e,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_multprec_container_to_target_solutions>:
mov    $0x11e,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @copy_multprec_container_to_target_solutions() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 286, i32* %5, i32* %6, double* %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @copy_multprec_container_to_target_solutions() {
%1 = tail call i32 @_ada_use_c2phc(i32 286, i32* undef, i32* undef, double* undef)
ret i32 %1
}
const char *sigutils_api_version(void) {
  return "0"
         "."
         "2"
         "."
         "0";
}


x86 assembly (clang, -O0):
<sigutils_api_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigutils_api_version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"0.2.0\00"
define i8* @sigutils_api_version() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"0.2.0\00"
define i8* @sigutils_api_version() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
unsigned long long native_read_msr_safe(unsigned int, int *);
__attribute__((always_)) int rdmsrl_safe(unsigned msr, unsigned long long *p) {
  int err;
  *p = native_read_msr_safe(msr, &err);
  return err;
}


x86 assembly (clang, -O0):
<rdmsrl_safe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x14(%rbp),%rsi
call   1030 <native_read_msr_safe@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rdmsrl_safe>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
lea    0xc(%rsp),%rsi
call   1030 <native_read_msr_safe@plt>
mov    %rax,(%rbx)
mov    0xc(%rsp),%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @rdmsrl_safe(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i32
store i32 %0, i32* %3
store i64* %1, i64** %4
%6 = load i32, i32* %3
%7 = call i64 @native_read_msr_safe(i32 %6, i32* %5)
%8 = load i64*, i64** %4
store i64 %7, i64* %8
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @rdmsrl_safe(i32 %0, i64* nocapture writeonly %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i64 @native_read_msr_safe(i32 %0, i32* %3)
store i64 %5, i64* %1
%6 = load i32, i32* %3
ret i32 %6
}
/* Type definitions */
typedef int uint32_t;
struct in_addr {
  int s_addr;
};
typedef int in_addr_t;

/* Variables and functions */
in_addr_t inet_netof(struct in_addr in) {
  uint32_t h = in.s_addr;
  if (h >> 24 < 128)
    return h >> 24;
  if (h >> 24 < 192)
    return h >> 16;
  return h >> 8;
}


x86 assembly (clang, -O0):
<inet_netof>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x18,%eax
cmp    $0x80,%eax
jge    112c <inet_netof+0x2c>
mov    -0xc(%rbp),%eax
sar    $0x18,%eax
mov    %eax,-0x4(%rbp)
jmp    1154 <inet_netof+0x54>
mov    -0xc(%rbp),%eax
sar    $0x18,%eax
cmp    $0xc0,%eax
jge    114b <inet_netof+0x4b>
mov    -0xc(%rbp),%eax
sar    $0x10,%eax
mov    %eax,-0x4(%rbp)
jmp    1154 <inet_netof+0x54>
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inet_netof>:
mov    %edi,%eax
sar    $0x18,%eax
ret

LLVM IR (-O0):
%struct.in_addr = type { i32 }
define i32 @inet_netof(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.in_addr
%4 = alloca i32
%5 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %3, i32 0, i32 0
store i32 %0, i32* %5
%6 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %3, i32 0, i32 0
%7 = load i32, i32* %6
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = ashr i32 %8, 24
%10 = icmp slt i32 %9, 128
br i1 %10, label %11, label %14
11: ; preds = %1
%12 = load i32, i32* %4
%13 = ashr i32 %12, 24
store i32 %13, i32* %2
br label %24
14: ; preds = %1
%15 = load i32, i32* %4
%16 = ashr i32 %15, 24
%17 = icmp slt i32 %16, 192
br i1 %17, label %18, label %21
18: ; preds = %14
%19 = load i32, i32* %4
%20 = ashr i32 %19, 16
store i32 %20, i32* %2
br label %24
21: ; preds = %14
%22 = load i32, i32* %4
%23 = ashr i32 %22, 8
store i32 %23, i32* %2
br label %24
24: ; preds = %21, %18, %11
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @inet_netof(i32 %0) {
%2 = ashr i32 %0, 24
ret i32 %2
}
int START_OF_LINE_ADDR(int ADDRESS) {
  return (((int)ADDRESS / (4 * 4)) * 4 * 4);
}


x86 assembly (clang, -O0):
<START_OF_LINE_ADDR>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x10,%ecx
cltd
idiv   %ecx
shl    $0x2,%eax
shl    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<START_OF_LINE_ADDR>:
lea    0xf(%rdi),%eax
test   %edi,%edi
cmovns %edi,%eax
and    $0xfffffff0,%eax
ret

LLVM IR (-O0):
define i32 @START_OF_LINE_ADDR(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, 16
%5 = mul nsw i32 %4, 4
%6 = mul nsw i32 %5, 4
ret i32 %6
}

LLVM IR (-O2):
define i32 @START_OF_LINE_ADDR(i32 %0) {
%2 = sdiv i32 %0, 16
%3 = shl nsw i32 %2, 4
ret i32 %3
}
/* Variables and functions */
int getachar();
int ask(void) {
  int ch = getachar();
  return ch == 'y' || ch == 'Y';
}


x86 assembly (clang, -O0):
<ask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getachar@plt>
mov    %eax,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x79,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113b <ask+0x2b>
cmpl   $0x59,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ask>:
push   %rax
xor    %eax,%eax
call   1030 <getachar@plt>
and    $0xffffffdf,%eax
xor    %ecx,%ecx
cmp    $0x59,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ask() {
%1 = alloca i32
%2 = call i32 (...) @getachar()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, 121
br i1 %4, label %8, label %5
5: ; preds = %0
%6 = load i32, i32* %1
%7 = icmp eq i32 %6, 89
br label %8
8: ; preds = %5, %0
%9 = phi i1 [ true, %0 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @ask() {
%1 = tail call i32 (...) @getachar()
%2 = and i32 %1, -33
%3 = icmp eq i32 %2, 89
%4 = zext i1 %3 to i32
ret i32 %4
}
int dblEqual(double left, double right) {
  if (left == right)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<dblEqual>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
ucomisd -0x18(%rbp),%xmm0
jne    1130 <dblEqual+0x30>
jp     1130 <dblEqual+0x30>
movl   $0xffffffff,-0x4(%rbp)
jmp    1137 <dblEqual+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dblEqual>:
cmpeqsd %xmm1,%xmm0
movq   %xmm0,%rax
ret

LLVM IR (-O0):
define i32 @dblEqual(double %0, double %1) {
%3 = alloca i32
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %4
%7 = load double, double* %5
%8 = fcmp oeq double %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 -1, i32* %3
br label %11
10: ; preds = %2
store i32 0, i32* %3
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @dblEqual(double %0, double %1) {
%3 = fcmp oeq double %0, %1
%4 = sext i1 %3 to i32
ret i32 %4
}
int fun123() { return 123; }


x86 assembly (clang, -O0):
<fun123>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7b,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun123>:
mov    $0x7b,%eax
ret

LLVM IR (-O0):
define i32 @fun123() {
ret i32 123
}

LLVM IR (-O2):
define i32 @fun123() {
ret i32 123
}