xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printChar(char);
void printString(char str[]) {
  int i;
  for (i = 0; str[i] != '\0'; i++) {
    printChar(str[i]);
  }
}


x86 assembly (clang, -O0):
<printString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1157 <printString+0x47>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <printChar@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <printString+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printString>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <printString+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <printChar@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <printString+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @printString(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %19, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %22
12: ; preds = %4
%13 = load i8*, i8** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = call i32 @printChar(i8 signext %17)
br label %19
19: ; preds = %12
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 1
store i32 %21, i32* %3
br label %4
22: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @printString(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8 [ %10, %4 ], [ %2, %1 ]
%7 = tail call i32 @printChar(i8 signext %6)
%8 = add nuw i64 %5, 1
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ OUTI(int, int);
int /*<<< orphan*/ T_WAIT_UNTIL(int);
void op_ED_0xa3(void) {
  OUTI(5, 9);
  T_WAIT_UNTIL(12);
  return;
}


x86 assembly (clang, -O0):
<op_ED_0xa3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%edi
mov    $0x9,%esi
call   1040 <OUTI@plt>
mov    $0xc,%edi
call   1030 <T_WAIT_UNTIL@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_ED_0xa3>:
push   %rax
mov    $0x5,%edi
mov    $0x9,%esi
call   1040 <OUTI@plt>
mov    $0xc,%edi
pop    %rax
jmp    1030 <T_WAIT_UNTIL@plt>

LLVM IR (-O0):
define void @op_ED_0xa3() {
%1 = call i32 @OUTI(i32 5, i32 9)
%2 = call i32 @T_WAIT_UNTIL(i32 12)
ret void
}

LLVM IR (-O2):
define void @op_ED_0xa3() {
%1 = tail call i32 @OUTI(i32 5, i32 9)
%2 = tail call i32 @T_WAIT_UNTIL(i32 12)
ret void
}
void setcolor(char x, char y, unsigned char c) {
  *((char *)0x4000 + 192 * 32 + (unsigned short)y * 32 + x) = c;
}


x86 assembly (clang, -O0):
<setcolor>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %dil,%dl
mov    %dl,-0x1(%rbp)
mov    %cl,-0x2(%rbp)
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%dl
movsbl -0x2(%rbp),%eax
movzwl %ax,%eax
shl    $0x5,%eax
movslq %eax,%rcx
mov    $0x4000,%eax
add    $0x1800,%rax
add    %rcx,%rax
movsbl -0x1(%rbp),%ecx
movslq %ecx,%rcx
mov    %dl,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<setcolor>:
movzwl %si,%eax
shl    $0x5,%rax
movslq %edi,%rcx
mov    %dl,0x5800(%rax,%rcx,1)
ret

LLVM IR (-O0):
define void @setcolor(i8 signext %0, i8 signext %1, i8 zeroext %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load i8, i8* %6
%8 = load i8, i8* %5
%9 = sext i8 %8 to i16
%10 = zext i16 %9 to i32
%11 = mul nsw i32 %10, 32
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* getelementptr inbounds (i8, i8* inttoptr (i64 16384 to i8*), i64 6144), i64 %12
%14 = load i8, i8* %4
%15 = sext i8 %14 to i32
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %13, i64 %16
store i8 %7, i8* %17
ret void
}

LLVM IR (-O2):
define void @setcolor(i8 signext %0, i8 signext %1, i8 zeroext %2) {
%4 = sext i8 %1 to i64
%5 = shl nsw i64 %4, 5
%6 = and i64 %5, 2097120
%7 = getelementptr inbounds i8, i8* inttoptr (i64 22528 to i8*), i64 %6
%8 = sext i8 %0 to i64
%9 = getelementptr inbounds i8, i8* %7, i64 %8
store i8 %2, i8* %9
ret void
}
int isprint(int c) { return ' ' <= c && c < '\177'; }


x86 assembly (clang, -O0):
<isprint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
mov    $0x20,%ecx
cmp    -0x4(%rbp),%ecx
mov    %al,-0x5(%rbp)
jg     1124 <isprint+0x24>
cmpl   $0x7f,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isprint>:
add    $0xffffffe0,%edi
xor    %eax,%eax
cmp    $0x5f,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isprint(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 32, %3
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 127
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isprint(i32 %0) {
%2 = add i32 %0, -32
%3 = icmp ult i32 %2, 95
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ delay(int);
void main() {
  (*(volatile unsigned long *)0xE0200280) =
      (1 << (0 * 4)) | (1 << (1 * 4)) | (1 << (2 * 4)) | (1 << (3 * 4));
  while (1) {
    (*(volatile unsigned long *)0xE0200284) = 0;
    delay(0x100000);
    (*(volatile unsigned long *)0xE0200284) = 0xf;
    delay(0x100000);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe0200280,%eax
movq   $0x1111,(%rax)
mov    $0xe0200284,%eax
movq   $0x0,(%rax)
mov    $0x100000,%edi
call   1030 <delay@plt>
mov    $0xe0200284,%eax
movq   $0xf,(%rax)
mov    $0x100000,%edi
call   1030 <delay@plt>
jmp    1120 <main+0x10>

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0xe0200284,%ebx
movq   $0x1111,-0x4(%rbx)
xchg   %ax,%ax
movq   $0x0,(%rbx)
mov    $0x100000,%edi
call   1030 <delay@plt>
movq   $0xf,(%rbx)
mov    $0x100000,%edi
call   1030 <delay@plt>
jmp    1120 <main+0x10>

LLVM IR (-O0):
define void @main() {
store volatile i64 4369, i64* inttoptr (i64 3760194176 to i64*)
br label %1
1: ; preds = %0, %1
store volatile i64 0, i64* inttoptr (i64 3760194180 to i64*)
%2 = call i32 @delay(i32 1048576)
store volatile i64 15, i64* inttoptr (i64 3760194180 to i64*)
%3 = call i32 @delay(i32 1048576)
br label %1
}

LLVM IR (-O2):
define void @main() {
store volatile i64 4369, i64* inttoptr (i64 3760194176 to i64*)
br label %1
1: ; preds = %0, %1
store volatile i64 0, i64* inttoptr (i64 3760194180 to i64*)
%2 = tail call i32 @delay(i32 1048576)
store volatile i64 15, i64* inttoptr (i64 3760194180 to i64*)
%3 = tail call i32 @delay(i32 1048576)
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ __NR_memfd_create;
int syscall(int /*<<< orphan*/, char const *, unsigned int);
int my_memfd_create(const char *name, unsigned int flags) {
  return syscall(__NR_memfd_create, name, flags);
}


x86 assembly (clang, -O0):
<my_memfd_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_memfd_create>:
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2ec4(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@__NR_memfd_create = global i32 0
define i32 @my_memfd_create(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @__NR_memfd_create
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @syscall(i32 %5, i8* %6, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
@__NR_memfd_create = global i32 0
define i32 @my_memfd_create(i8* %0, i32 %1) {
%3 = load i32, i32* @__NR_memfd_create
%4 = tail call i32 @syscall(i32 %3, i8* %0, i32 %1)
ret i32 %4
}
void glRotatef(int a, int b, int c, int d) {}


x86 assembly (clang, -O0):
<glRotatef>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glRotatef>:
ret

LLVM IR (-O0):
define void @glRotatef(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret void
}

LLVM IR (-O2):
define void @glRotatef(i32 %0, i32 %1, i32 %2, i32 %3) {
ret void
}
/* Variables and functions */
double fabs(double);
double sgnum(double x, double y) {
  if (y < 0.0)
    return (-fabs(x));
  else
    return (fabs(x));
}


x86 assembly (clang, -O0):
<sgnum>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x18(%rbp),%xmm0
jbe    114d <sgnum+0x4d>
movsd  -0x10(%rbp),%xmm0
movaps 0xed8(%rip),%xmm1
pand   %xmm1,%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1162 <sgnum+0x62>
movsd  -0x10(%rbp),%xmm0
movaps 0xea7(%rip),%xmm1
pand   %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sgnum>:
movapd 0xef8(%rip),%xmm2
andpd  %xmm0,%xmm2
orpd   0xefc(%rip),%xmm0
xorpd  %xmm3,%xmm3
cmpltsd %xmm3,%xmm1
andpd  %xmm1,%xmm0
andnpd %xmm2,%xmm1
orpd   %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @sgnum(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %5
%7 = fcmp olt double %6, 0.000000e+00
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load double, double* %4
%10 = call double @llvm.fabs.f64(double %9)
%11 = fneg double %10
store double %11, double* %3
br label %15
12: ; preds = %2
%13 = load double, double* %4
%14 = call double @llvm.fabs.f64(double %13)
store double %14, double* %3
br label %15
15: ; preds = %12, %8
%16 = load double, double* %3
ret double %16
}

LLVM IR (-O2):
define double @sgnum(double %0, double %1) {
%3 = fcmp olt double %1, 0.000000e+00
%4 = tail call double @llvm.fabs.f64(double %0)
%5 = fneg double %4
%6 = select i1 %3, double %5, double %4
ret double %6
}
/* Type definitions */
typedef char *uint64_t;

/* Variables and functions */
uint64_t ROL64_17(uint64_t x) {
  __asm__("rolq $17, %0" : "=r"(x) : "0"(x));
  return x;
}


x86 assembly (clang, -O0):
<ROL64_17>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
rol    $0x11,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ROL64_17>:
mov    %rdi,%rax
rol    $0x11,%rax
ret

LLVM IR (-O0):
define i8* @ROL64_17(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* asm "rolq $$17, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define i8* @ROL64_17(i8* readnone %0) {
%2 = tail call i8* asm "rolq $$17, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret i8* %2
}
int compare_double_keys(register void *key1, register void *key2) {
  register double val1 = *((double *)key1);
  register double val2 = *((double *)key2);
  if (val1 < val2)
    return -1;
  else if (val1 == val2)
    return 0;
  else
    return 1;
}


x86 assembly (clang, -O0):
<compare_double_keys>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x20(%rbp)
mov    -0x18(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x20(%rbp),%xmm1
movsd  -0x28(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1146 <compare_double_keys+0x46>
movl   $0xffffffff,-0x4(%rbp)
jmp    116f <compare_double_keys+0x6f>
movsd  -0x20(%rbp),%xmm0
ucomisd -0x28(%rbp),%xmm0
jne    1168 <compare_double_keys+0x68>
jp     1168 <compare_double_keys+0x68>
movl   $0x0,-0x4(%rbp)
jmp    116f <compare_double_keys+0x6f>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_double_keys>:
movsd  (%rdi),%xmm0
movsd  (%rsi),%xmm1
movapd %xmm0,%xmm2
cmpneqsd %xmm1,%xmm2
movq   %xmm2,%rcx
and    $0x1,%ecx
ucomisd %xmm0,%xmm1
mov    $0xffffffff,%eax
cmovbe %ecx,%eax
ret

LLVM IR (-O0):
define i32 @compare_double_keys(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca double
%7 = alloca double
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to double*
%10 = load double, double* %9
store double %10, double* %6
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to double*
%13 = load double, double* %12
store double %13, double* %7
%14 = load double, double* %6
%15 = load double, double* %7
%16 = fcmp olt double %14, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 -1, i32* %3
br label %24
18: ; preds = %2
%19 = load double, double* %6
%20 = load double, double* %7
%21 = fcmp oeq double %19, %20
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 0, i32* %3
br label %24
23: ; preds = %18
store i32 1, i32* %3
br label %24
24: ; preds = %23, %22, %17
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @compare_double_keys(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to double*
%4 = load double, double* %3
%5 = bitcast i8* %1 to double*
%6 = load double, double* %5
%7 = fcmp olt double %4, %6
%8 = fcmp une double %4, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
const char *rp_app_desc() { return "Multichannel Pulse Height Analyzer.\n"; }


x86 assembly (clang, -O0):
<rp_app_desc>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rp_app_desc>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [37 x i8] c"Multichannel Pulse Height Analyzer.\0A\00"
define i8* @rp_app_desc() {
ret i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [37 x i8] c"Multichannel Pulse Height Analyzer.\0A\00"
define i8* @rp_app_desc() {
ret i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct ps_summary_event {
  int dummy;
};

/* Variables and functions */
int obus_event_commit(int /*<<< orphan*/);
int /*<<< orphan*/ ps_summary_obus_event(struct ps_summary_event *);
int ps_summary_event_commit(struct ps_summary_event *event) {
  return obus_event_commit(ps_summary_obus_event(event));
}


x86 assembly (clang, -O0):
<ps_summary_event_commit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ps_summary_obus_event@plt>
mov    %eax,%edi
call   1040 <obus_event_commit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps_summary_event_commit>:
push   %rax
call   1030 <ps_summary_obus_event@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <obus_event_commit@plt>

LLVM IR (-O0):
%struct.ps_summary_event = type { i32 }
define i32 @ps_summary_event_commit(%struct.ps_summary_event* %0) {
%2 = alloca %struct.ps_summary_event*
store %struct.ps_summary_event* %0, %struct.ps_summary_event** %2
%3 = load %struct.ps_summary_event*, %struct.ps_summary_event** %2
%4 = call i32 @ps_summary_obus_event(%struct.ps_summary_event* %3)
%5 = call i32 @obus_event_commit(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
%struct.ps_summary_event = type { i32 }
define i32 @ps_summary_event_commit(%struct.ps_summary_event* %0) {
%2 = tail call i32 @ps_summary_obus_event(%struct.ps_summary_event* %0)
%3 = tail call i32 @obus_event_commit(i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage(void) { printf("Usage: ./eeg DEVICENODE\n"); }


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"Usage: ./eeg DEVICENODE\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [24 x i8] c"Usage: ./eeg DEVICENODE\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str, i64 0, i64 0))
ret void
}
void mhl_unpowered_disconnection(void) {}


x86 assembly (clang, -O0):
<mhl_unpowered_disconnection>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mhl_unpowered_disconnection>:
ret

LLVM IR (-O0):
define void @mhl_unpowered_disconnection() {
ret void
}

LLVM IR (-O2):
define void @mhl_unpowered_disconnection() {
ret void
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ perrordie(char *);
void *safe_malloc(size_t s) {
  void *r = malloc(s);
  if (r == NULL)
    perrordie("malloc");
  return r;
}


x86 assembly (clang, -O0):
<safe_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <safe_malloc+0x30>
lea    0xeb5(%rip),%rdi
call   1040 <perrordie@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_malloc>:
push   %rbx
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <safe_malloc+0x1a>
lea    0xecb(%rip),%rdi
call   1040 <perrordie@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"malloc\00"
define i8* @safe_malloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @perrordie(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [7 x i8] c"malloc\00"
define noalias i8* @safe_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @perrordie(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
void arch_kgdb_breakpoint(void) { asm("   int $3"); }


x86 assembly (clang, -O0):
<arch_kgdb_breakpoint>:
push   %rbp
mov    %rsp,%rbp
int3
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_kgdb_breakpoint>:
int3
ret

LLVM IR (-O0):
define void @arch_kgdb_breakpoint() {
ret void
}

LLVM IR (-O2):
define void @arch_kgdb_breakpoint() {
tail call void asm sideeffect " int $$3", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
int bar(int x) { return x; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @bar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @bar(i32 returned %0) {
ret i32 %0
}
void copy() {
  int i;
  extern char line[], longest[];
  i = 0;
  while ((longest[i] = line[i]) != '\0')
    ++i;
}


x86 assembly (clang, -O0):
<copy>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movslq -0x4(%rbp),%rcx
mov    0x2ed2(%rip),%rax
mov    (%rax,%rcx,1),%al
movslq -0x4(%rbp),%rdx
mov    0x2eb4(%rip),%rcx
mov    %al,(%rcx,%rdx,1)
movsbl %al,%eax
cmp    $0x0,%eax
je     1141 <copy+0x41>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <copy+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy>:
xor    %eax,%eax
mov    0x2edf(%rip),%rsi
mov    0x2ec8(%rip),%rdx
movzbl (%rsi,%rax,1),%ecx
mov    %cl,(%rdx,%rax,1)
add    $0x1,%rax
test   %cl,%cl
jne    1110 <copy+0x10>
ret

LLVM IR (-O0):
@line = external global [0 x i8]
@longest = external global [0 x i8]
define void @copy() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %12, %0
%3 = load i32, i32* %1
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds [0 x i8], [0 x i8]* @line, i64 0, i64 %4
%6 = load i8, i8* %5
%7 = load i32, i32* %1
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds [0 x i8], [0 x i8]* @longest, i64 0, i64 %8
store i8 %6, i8* %9
%10 = sext i8 %6 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = load i32, i32* %1
%14 = add nsw i32 %13, 1
store i32 %14, i32* %1
br label %2
15: ; preds = %2
ret void
}

LLVM IR (-O2):
@line = external global [0 x i8]
@longest = external global [0 x i8]
define void @copy() {
br label %1
1: ; preds = %1, %0
%2 = phi i64 [ %7, %1 ], [ 0, %0 ]
%3 = getelementptr inbounds [0 x i8], [0 x i8]* @line, i64 0, i64 %2
%4 = load i8, i8* %3
%5 = getelementptr inbounds [0 x i8], [0 x i8]* @longest, i64 0, i64 %2
store i8 %4, i8* %5
%6 = icmp eq i8 %4, 0
%7 = add nuw i64 %2, 1
br i1 %6, label %8, label %1
8: ; preds = %1
ret void
}
int foo(int *array) {
  if (array[1] != 0)
    return array[1];
  return 0;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpl   $0x0,0x4(%rax)
je     1125 <foo+0x25>
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    112c <foo+0x2c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    0x4(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @foo(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = getelementptr inbounds i32, i32* %4, i64 1
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i32*, i32** %3
%10 = getelementptr inbounds i32, i32* %9, i64 1
%11 = load i32, i32* %10
store i32 %11, i32* %2
br label %13
12: ; preds = %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %8
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @foo(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 1
%3 = load i32, i32* %2
ret i32 %3
}
void glGenVertexArrays(void) { return; }


x86 assembly (clang, -O0):
<glGenVertexArrays>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glGenVertexArrays>:
ret

LLVM IR (-O0):
define void @glGenVertexArrays() {
ret void
}

LLVM IR (-O2):
define void @glGenVertexArrays() {
ret void
}
/* Variables and functions */
int strcmp(char const *, char const *);
int g_strcmp(const char *c1, const char *c2) { return strcmp(c1, c2); }


x86 assembly (clang, -O0):
<g_strcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_strcmp>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @g_strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @g_strcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ input_prompt_string(char *);
int /*<<< orphan*/ memo(char *);
int /*<<< orphan*/ str_command(int /*<<< orphan*/);
void cmd_command(int argc, const char **argv) {
  if (!str_command(input_prompt_string(":"))) {
    memo("Unrecognized command.");
  }
}


x86 assembly (clang, -O0):
<cmd_command>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeba(%rip),%rdi
call   1040 <input_prompt_string@plt>
mov    %eax,%edi
call   1050 <str_command@plt>
cmp    $0x0,%eax
jne    1167 <cmd_command+0x37>
lea    0xea0(%rip),%rdi
call   1030 <memo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_command>:
push   %rax
lea    0xec8(%rip),%rdi
call   1040 <input_prompt_string@plt>
mov    %eax,%edi
call   1050 <str_command@plt>
test   %eax,%eax
je     114a <cmd_command+0x1a>
pop    %rax
ret
lea    0xeb1(%rip),%rdi
pop    %rax
jmp    1030 <memo@plt>

LLVM IR (-O0):
@.str = [2 x i8] c":\00"
@.str.1 = [22 x i8] c"Unrecognized command.\00"
define void @cmd_command(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @input_prompt_string(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @str_command(i32 %5)
%7 = icmp ne i32 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %2
%9 = call i32 @memo(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %8, %2
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c":\00"
@.str.1 = [22 x i8] c"Unrecognized command.\00"
define void @cmd_command(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @input_prompt_string(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @str_command(i32 %3)
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @memo(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0))
br label %8
8: ; preds = %6, %2
ret void
}
int test_imm_DFuint16_mem(unsigned short *val) {
  return ((*val) & (0xDF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DFuint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xdf,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DFuint16_mem>:
testb  $0xdf,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DFuint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 223
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_DFuint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 223
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void RTSha512FromString(void) {}


x86 assembly (clang, -O0):
<RTSha512FromString>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTSha512FromString>:
ret

LLVM IR (-O0):
define void @RTSha512FromString() {
ret void
}

LLVM IR (-O2):
define void @RTSha512FromString() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ code_segment_gtext();
int /*<<< orphan*/ frontend_version();
int /*<<< orphan*/ newline();
int /*<<< orphan*/ output_line(char *);
int /*<<< orphan*/ output_string(char *);
void header(void) {
  output_string("; Small C Z80\n;\tCoder (ac0)\n;");
  frontend_version();
  newline();
  output_line("\t;program area SMALLC_GENERATED is RELOCATABLE");
  output_line("\t.module SMALLC_GENERATED");
  code_segment_gtext();
}


x86 assembly (clang, -O0):
<header>:
push   %rbp
mov    %rsp,%rbp
lea    0xea5(%rip),%rdi
call   1040 <output_string@plt>
mov    $0x0,%al
call   1060 <frontend_version@plt>
mov    $0x0,%al
call   1030 <newline@plt>
lea    0xea9(%rip),%rdi
call   1070 <output_line@plt>
lea    0xecc(%rip),%rdi
call   1070 <output_line@plt>
mov    $0x0,%al
call   1050 <code_segment_gtext@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<header>:
push   %rax
lea    0xea8(%rip),%rdi
call   1040 <output_string@plt>
xor    %eax,%eax
call   1060 <frontend_version@plt>
xor    %eax,%eax
call   1030 <newline@plt>
lea    0xeac(%rip),%rdi
call   1070 <output_line@plt>
lea    0xecf(%rip),%rdi
call   1070 <output_line@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <code_segment_gtext@plt>

LLVM IR (-O0):
@.str = [30 x i8] c"; Small C Z80\0A;\09Coder (ac0)\0A;\00"
@.str.1 = [47 x i8] c"\09;program area SMALLC_GENERATED is RELOCATABLE\00"
@.str.2 = [26 x i8] c"\09.module SMALLC_GENERATED\00"
define void @header() {
%1 = call i32 @output_string(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @frontend_version()
%3 = call i32 (...) @newline()
%4 = call i32 @output_line(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str.1, i64 0, i64 0))
%5 = call i32 @output_line(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i64 0, i64 0))
%6 = call i32 (...) @code_segment_gtext()
ret void
}

LLVM IR (-O2):
@.str = [30 x i8] c"; Small C Z80\0A;\09Coder (ac0)\0A;\00"
@.str.1 = [47 x i8] c"\09;program area SMALLC_GENERATED is RELOCATABLE\00"
@.str.2 = [26 x i8] c"\09.module SMALLC_GENERATED\00"
define void @header() {
%1 = tail call i32 @output_string(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @frontend_version()
%3 = tail call i32 (...) @newline()
%4 = tail call i32 @output_line(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 @output_line(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i64 0, i64 0))
%6 = tail call i32 (...) @code_segment_gtext()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ F_DUPFD;
int fcntl(int, int /*<<< orphan*/);
int /*<<< orphan*/ pexit(char *);
int _dup(int oldfd) {
  int newfd = fcntl(oldfd, F_DUPFD);
  if (newfd == -1) {
    pexit("fcntl");
  }
  return newfd;
}


x86 assembly (clang, -O0):
<_dup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eb3(%rip),%rax
mov    (%rax),%esi
call   1030 <fcntl@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0xffffffff,-0x8(%rbp)
jne    1155 <_dup+0x35>
lea    0xeb0(%rip),%rdi
call   1040 <pexit@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dup>:
push   %rbx
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
call   1030 <fcntl@plt>
mov    %eax,%ebx
cmp    $0xffffffff,%eax
jne    1142 <_dup+0x22>
lea    0xec3(%rip),%rdi
call   1040 <pexit@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@F_DUPFD = global i32 0
@.str = [6 x i8] c"fcntl\00"
define i32 @_dup(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @F_DUPFD
%6 = call i32 @fcntl(i32 %4, i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, -1
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = call i32 @pexit(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %1
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
@F_DUPFD = global i32 0
@.str = [6 x i8] c"fcntl\00"
define i32 @_dup(i32 %0) {
%2 = load i32, i32* @F_DUPFD
%3 = tail call i32 @fcntl(i32 %0, i32 %2)
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @pexit(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ O_RDWR;
int rw_test(char const *, int, int, int /*<<< orphan*/, int);
int test_rw_exist(const char *file) {
  return rw_test(file, 16, 26, O_RDWR, 0777);
}


x86 assembly (clang, -O0):
<test_rw_exist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ec1(%rip),%rax
mov    (%rax),%ecx
mov    $0x10,%esi
mov    $0x1a,%edx
mov    $0x1ff,%r8d
call   1030 <rw_test@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_rw_exist>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%ecx
mov    $0x10,%esi
mov    $0x1a,%edx
mov    $0x1ff,%r8d
jmp    1030 <rw_test@plt>

LLVM IR (-O0):
@O_RDWR = global i32 0
define i32 @test_rw_exist(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @O_RDWR
%5 = call i32 @rw_test(i8* %3, i32 16, i32 26, i32 %4, i32 511)
ret i32 %5
}

LLVM IR (-O2):
@O_RDWR = global i32 0
define i32 @test_rw_exist(i8* %0) {
%2 = load i32, i32* @O_RDWR
%3 = tail call i32 @rw_test(i8* %0, i32 16, i32 26, i32 %2, i32 511)
ret i32 %3
}
unsigned int rng_seed_from_tid_nodeid(int tid, int node) {
  unsigned int seedbuf[11] = {12345678, 3498711,  19872134, 1004141,
                              1275987,  23904273, 2091097,  19872727,
                              31337,    20872837, 1020733};
  return seedbuf[tid % 11] + node * 31337;
}


x86 assembly (clang, -O0):
<rng_seed_from_tid_nodeid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    -0x40(%rbp),%rdi
lea    0xed7(%rip),%rsi
mov    $0x2c,%edx
call   1030 <memcpy@plt>
mov    -0x4(%rbp),%eax
mov    $0xb,%ecx
cltd
idiv   %ecx
movslq %edx,%rax
mov    -0x40(%rbp,%rax,4),%eax
imul   $0x7a69,-0x8(%rbp),%ecx
add    %ecx,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rng_seed_from_tid_nodeid>:
movslq %edi,%rax
imul   $0x2e8ba2e9,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x21,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,4),%edx
lea    (%rcx,%rdx,2),%ecx
sub    %ecx,%eax
movslq %eax,%rcx
lea    0xed7(%rip),%rdx
imul   $0x7a69,%esi,%eax
add    (%rdx,%rcx,4),%eax
ret

LLVM IR (-O0):
@__const.rng_seed_from_tid_nodeid.seedbuf = [11 x i32] [i32 12345678, i32 3498711, i32 19872134, i32 1004141, i32 1275987, i32 23904273, i32 2091097, i32 19872727, i32 31337, i32 20872837, i32 1020733]
define i32 @rng_seed_from_tid_nodeid(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca [11 x i32]
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = bitcast [11 x i32]* %5 to i8*
%7 = load i32, i32* %3
%8 = srem i32 %7, 11
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds [11 x i32], [11 x i32]* %5, i64 0, i64 %9
%11 = load i32, i32* %10
%12 = load i32, i32* %4
%13 = mul nsw i32 %12, 31337
%14 = add i32 %11, %13
ret i32 %14
}

LLVM IR (-O2):
@__const.rng_seed_from_tid_nodeid.seedbuf = [11 x i32] [i32 12345678, i32 3498711, i32 19872134, i32 1004141, i32 1275987, i32 23904273, i32 2091097, i32 19872727, i32 31337, i32 20872837, i32 1020733]
define i32 @rng_seed_from_tid_nodeid(i32 %0, i32 %1) {
%3 = srem i32 %0, 11
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds [11 x i32], [11 x i32]* @__const.rng_seed_from_tid_nodeid.seedbuf, i64 0, i64 %4
%6 = load i32, i32* %5
%7 = mul nsw i32 %1, 31337
%8 = add i32 %6, %7
ret i32 %8
}
/* Variables and functions */
int isupper(unsigned char);
int isUpper(const char *ptr) { return isupper(*(unsigned char *)ptr); }


x86 assembly (clang, -O0):
<isUpper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edi
call   1030 <isupper@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isUpper>:
movzbl (%rdi),%edi
jmp    1030 <isupper@plt>

LLVM IR (-O0):
define i32 @isUpper(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = call i32 @isupper(i8 zeroext %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @isUpper(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = tail call i32 @isupper(i8 zeroext %2)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
void ivory_serialize_pack_prim_4_be(uint8_t *dst, const uint8_t *src) {
  dst[0] = src[3];
  dst[1] = src[2];
  dst[2] = src[1];
  dst[3] = src[0];
}


x86 assembly (clang, -O0):
<ivory_serialize_pack_prim_4_be>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0xc(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ivory_serialize_pack_prim_4_be>:
mov    0xc(%rsi),%eax
mov    %eax,(%rdi)
mov    0x8(%rsi),%eax
mov    %eax,0x4(%rdi)
mov    0x4(%rsi),%eax
mov    %eax,0x8(%rdi)
mov    (%rsi),%eax
mov    %eax,0xc(%rdi)
ret

LLVM IR (-O0):
define void @ivory_serialize_pack_prim_4_be(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = getelementptr inbounds i32, i32* %5, i64 3
%7 = load i32, i32* %6
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 0
store i32 %7, i32* %9
%10 = load i32*, i32** %4
%11 = getelementptr inbounds i32, i32* %10, i64 2
%12 = load i32, i32* %11
%13 = load i32*, i32** %3
%14 = getelementptr inbounds i32, i32* %13, i64 1
store i32 %12, i32* %14
%15 = load i32*, i32** %4
%16 = getelementptr inbounds i32, i32* %15, i64 1
%17 = load i32, i32* %16
%18 = load i32*, i32** %3
%19 = getelementptr inbounds i32, i32* %18, i64 2
store i32 %17, i32* %19
%20 = load i32*, i32** %4
%21 = getelementptr inbounds i32, i32* %20, i64 0
%22 = load i32, i32* %21
%23 = load i32*, i32** %3
%24 = getelementptr inbounds i32, i32* %23, i64 3
store i32 %22, i32* %24
ret void
}

LLVM IR (-O2):
define void @ivory_serialize_pack_prim_4_be(i32* nocapture writeonly %0, i32* nocapture %1) {
%3 = getelementptr inbounds i32, i32* %1, i64 3
%4 = load i32, i32* %3
store i32 %4, i32* %0
%5 = getelementptr inbounds i32, i32* %1, i64 2
%6 = load i32, i32* %5
%7 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %6, i32* %7
%8 = getelementptr inbounds i32, i32* %1, i64 1
%9 = load i32, i32* %8
%10 = getelementptr inbounds i32, i32* %0, i64 2
store i32 %9, i32* %10
%11 = load i32, i32* %1
%12 = getelementptr inbounds i32, i32* %0, i64 3
store i32 %11, i32* %12
ret void
}
unsigned xrop3_246_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D ^ S;
  stk1 = T | stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_246_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_246_1_1>:
mov    $0xff,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_246_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %6
%24 = xor i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %7
%26 = load i32, i32* %9
%27 = or i32 %25, %26
store i32 %27, i32* %8
%28 = load i32, i32* %8
%29 = load i32, i32* %6
%30 = xor i32 %29, -1
%31 = and i32 %28, %30
%32 = load i32, i32* %7
%33 = xor i32 %32, -1
%34 = and i32 %31, %33
%35 = load i32, i32* %5
%36 = load i32, i32* %6
%37 = and i32 %35, %36
%38 = or i32 %34, %37
%39 = load i32, i32* %5
%40 = load i32, i32* %7
%41 = and i32 %39, %40
%42 = or i32 %38, %41
ret i32 %42
}

LLVM IR (-O2):
define i32 @xrop3_246_1_1(i8 zeroext %0, i8 zeroext %1) {
ret i32 255
}
/* Type definitions */
struct page {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ clear_page(void *);
void clear_user_page(void *addr, unsigned long vaddr, struct page *page) {
  clear_page(addr);
}


x86 assembly (clang, -O0):
<clear_user_page>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <clear_page@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_user_page>:
jmp    1030 <clear_page@plt>

LLVM IR (-O0):
%struct.page = type { i32 }
define void @clear_user_page(i8* %0, i64 %1, %struct.page* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca %struct.page*
store i8* %0, i8** %4
store i64 %1, i64* %5
store %struct.page* %2, %struct.page** %6
%7 = load i8*, i8** %4
%8 = call i32 @clear_page(i8* %7)
ret void
}

LLVM IR (-O2):
%struct.page = type { i32 }
define void @clear_user_page(i8* %0, i64 %1, %struct.page* nocapture readnone %2) {
%4 = tail call i32 @clear_page(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ g();
void f() {
  int j;
  for (j = 0; j < 4000000; j++)
    g();
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x3d0900,-0x4(%rbp)
jge    1141 <f+0x31>
mov    $0x0,%al
call   1030 <g@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <f+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rbx
mov    $0x3d0900,%ebx
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <g@plt>
add    $0xffffffff,%ebx
jne    1120 <f+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @f() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %7, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 4000000
br i1 %4, label %5, label %10
5: ; preds = %2
%6 = call i32 (...) @g()
br label %7
7: ; preds = %5
%8 = load i32, i32* %1
%9 = add nsw i32 %8, 1
store i32 %9, i32* %1
br label %2
10: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @f() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 (...) @g()
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 4000000
br i1 %5, label %6, label %1
6: ; preds = %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void latex_output_longtable_footer(FILE *output_stream) {
  fprintf(output_stream, "\n\\hline\n\\end{longtable}\n");
}


x86 assembly (clang, -O0):
<latex_output_longtable_footer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<latex_output_longtable_footer>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
mov    $0x18,%esi
mov    $0x1,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"\0A\\hline\0A\\end{longtable}\0A\00"
define void @latex_output_longtable_footer(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"\0A\\hline\0A\\end{longtable}\0A\00"
define void @latex_output_longtable_footer(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i64 24, i64 1, i32* %0)
ret void
}
/* Type definitions */
struct msgbuf {
  int dummy;
};

/* Variables and functions */
struct msgbuf *msgbuf_new(size_t);
int /*<<< orphan*/ msgbuf_put(struct msgbuf *, void const *, size_t);
struct msgbuf *msgbuf_clone_data(const void *data, size_t size) {
  struct msgbuf *b = msgbuf_new(size);
  msgbuf_put(b, data, size);
  return b;
}


x86 assembly (clang, -O0):
<msgbuf_clone_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <msgbuf_new@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <msgbuf_put@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msgbuf_clone_data>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <msgbuf_new@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1030 <msgbuf_put@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.msgbuf = type { i32 }
define %struct.msgbuf* @msgbuf_clone_data(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca %struct.msgbuf*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = call %struct.msgbuf* @msgbuf_new(i64 %6)
store %struct.msgbuf* %7, %struct.msgbuf** %5
%8 = load %struct.msgbuf*, %struct.msgbuf** %5
%9 = load i8*, i8** %3
%10 = load i64, i64* %4
%11 = call i32 @msgbuf_put(%struct.msgbuf* %8, i8* %9, i64 %10)
%12 = load %struct.msgbuf*, %struct.msgbuf** %5
ret %struct.msgbuf* %12
}

LLVM IR (-O2):
%struct.msgbuf = type { i32 }
define %struct.msgbuf* @msgbuf_clone_data(i8* %0, i64 %1) {
%3 = tail call %struct.msgbuf* @msgbuf_new(i64 %1)
%4 = tail call i32 @msgbuf_put(%struct.msgbuf* %3, i8* %0, i64 %1)
ret %struct.msgbuf* %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void print_int_array(int *array, int size) {
  for (int n = 0; n < size; n++) {
    printf("%d\t", array[n]);
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<print_int_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1159 <print_int_array+0x49>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <print_int_array+0x16>
lea    0xea4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_int_array>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1157 <print_int_array+0x37>
mov    %rdi,%r15
mov    %esi,%r12d
lea    0xec7(%rip),%r14
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <print_int_array+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\09\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @print_int_array(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\09\00"
define void @print_int_array(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %8
6: ; preds = %8, %2
%7 = tail call i32 @putchar(i32 10)
ret void
8: ; preds = %4, %8
%9 = phi i64 [ 0, %4 ], [ %13, %8 ]
%10 = getelementptr inbounds i32, i32* %0, i64 %9
%11 = load i32, i32* %10
%12 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = add nuw nsw i64 %9, 1
%14 = icmp eq i64 %13, %5
br i1 %14, label %6, label %8
}