xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void free_lmatrix(unsigned long **m, long nrl, long nrh, long ncl, long nch) {
  free((char *)(m[nrl] + ncl - 1));
  free((char *)(m + nrl - 1));
}


x86 assembly (clang, -O0):
<free_lmatrix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
mov    -0x20(%rbp),%rax
shl    $0x3,%rax
add    %rax,%rdi
add    $0xfffffffffffffff8,%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
shl    $0x3,%rax
add    %rax,%rdi
add    $0xfffffffffffffff8,%rdi
call   1030 <free@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_lmatrix>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    (%rdi,%rsi,8),%rax
lea    (%rax,%rcx,8),%rdi
add    $0xfffffffffffffff8,%rdi
call   1030 <free@plt>
lea    (%rbx,%r14,8),%rdi
add    $0xfffffffffffffff8,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_lmatrix(i64** %0, i64 %1, i64 %2, i64 %3, i64 %4) {
%6 = alloca i64**
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
store i64** %0, i64*** %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i64 %3, i64* %9
store i64 %4, i64* %10
%11 = load i64**, i64*** %6
%12 = load i64, i64* %7
%13 = getelementptr inbounds i64*, i64** %11, i64 %12
%14 = load i64*, i64** %13
%15 = load i64, i64* %9
%16 = getelementptr inbounds i64, i64* %14, i64 %15
%17 = getelementptr inbounds i64, i64* %16, i64 -1
%18 = bitcast i64* %17 to i8*
%19 = call i32 @free(i8* %18)
%20 = load i64**, i64*** %6
%21 = load i64, i64* %7
%22 = getelementptr inbounds i64*, i64** %20, i64 %21
%23 = getelementptr inbounds i64*, i64** %22, i64 -1
%24 = bitcast i64** %23 to i8*
%25 = call i32 @free(i8* %24)
ret void
}

LLVM IR (-O2):
define void @free_lmatrix(i64** nocapture %0, i64 %1, i64 %2, i64 %3, i64 %4) {
%6 = getelementptr inbounds i64*, i64** %0, i64 %1
%7 = load i64*, i64** %6
%8 = getelementptr inbounds i64, i64* %7, i64 %3
%9 = getelementptr inbounds i64, i64* %8, i64 -1
%10 = bitcast i64* %9 to i8*
%11 = tail call i32 @free(i8* %10)
%12 = getelementptr inbounds i64*, i64** %6, i64 -1
%13 = bitcast i64** %12 to i8*
%14 = tail call i32 @free(i8* %13)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, long double, long double);
int main() {
  long double a = 0.1;
  printf("%10.2Lf %f\n", a, a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x4(%rbp)
fldl   0xedb(%rip)
fstpt  -0x20(%rbp)
fldt   -0x20(%rbp)
fld    %st(0)
mov    %rsp,%rax
fxch   %st(1)
fstpt  0x10(%rax)
fstpt  (%rax)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
fldl   0xee6(%rip)
fld    %st(0)
fstpt  0x10(%rsp)
fstpt  (%rsp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@.str = [12 x i8] c"%10.2Lf %f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca x86_fp80
store i32 0, i32* %1
store x86_fp80 0xK3FFBCCCCCCCCCCCCD000, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = load x86_fp80, x86_fp80* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), x86_fp80 %3, x86_fp80 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"%10.2Lf %f\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), x86_fp80 0xK3FFBCCCCCCCCCCCCD000, x86_fp80 0xK3FFBCCCCCCCCCCCCD000)
ret i32 0
}
/* Variables and functions */
float lerp(float, float, float);
float bilerp(float a, float b, float c, float d, float u, float v) {
  return lerp(lerp(a, b, u), lerp(c, d, u), v);
}


x86 assembly (clang, -O0):
<bilerp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  %xmm4,-0x14(%rbp)
movss  %xmm5,-0x18(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movss  -0x14(%rbp),%xmm2
call   1030 <lerp@plt>
movss  %xmm0,-0x1c(%rbp)
movss  -0xc(%rbp),%xmm0
movss  -0x10(%rbp),%xmm1
movss  -0x14(%rbp),%xmm2
call   1030 <lerp@plt>
movaps %xmm0,%xmm1
movss  -0x1c(%rbp),%xmm0
movss  -0x18(%rbp),%xmm2
call   1030 <lerp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bilerp>:
sub    $0x18,%rsp
movss  %xmm5,0x14(%rsp)
movss  %xmm4,0x4(%rsp)
movss  %xmm3,0x10(%rsp)
movss  %xmm2,0xc(%rsp)
movaps %xmm4,%xmm2
call   1030 <lerp@plt>
movss  %xmm0,0x8(%rsp)
movss  0xc(%rsp),%xmm0
movss  0x10(%rsp),%xmm1
movss  0x4(%rsp),%xmm2
call   1030 <lerp@plt>
movaps %xmm0,%xmm1
movss  0x8(%rsp),%xmm0
movss  0x14(%rsp),%xmm2
add    $0x18,%rsp
jmp    1030 <lerp@plt>

LLVM IR (-O0):
define float @bilerp(float %0, float %1, float %2, float %3, float %4, float %5) {
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
%11 = alloca float
%12 = alloca float
store float %0, float* %7
store float %1, float* %8
store float %2, float* %9
store float %3, float* %10
store float %4, float* %11
store float %5, float* %12
%13 = load float, float* %7
%14 = load float, float* %8
%15 = load float, float* %11
%16 = call float @lerp(float %13, float %14, float %15)
%17 = load float, float* %9
%18 = load float, float* %10
%19 = load float, float* %11
%20 = call float @lerp(float %17, float %18, float %19)
%21 = load float, float* %12
%22 = call float @lerp(float %16, float %20, float %21)
ret float %22
}

LLVM IR (-O2):
define float @bilerp(float %0, float %1, float %2, float %3, float %4, float %5) {
%7 = tail call float @lerp(float %0, float %1, float %4)
%8 = tail call float @lerp(float %2, float %3, float %4)
%9 = tail call float @lerp(float %7, float %8, float %5)
ret float %9
}
/* Variables and functions */
int /*<<< orphan*/ printOrBranch(int, int);
int main() {
  printOrBranch(5, -1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x5,%edi
mov    $0xffffffff,%esi
call   1030 <printOrBranch@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
mov    $0xffffffff,%esi
call   1030 <printOrBranch@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printOrBranch(i32 5, i32 -1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @printOrBranch(i32 5, i32 -1)
ret i32 0
}
void swap(int *a, int *b) {
  int tmp;
  tmp = a;
  a = b;
  b = tmp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
movslq -0x14(%rbp),%rax
mov    %rax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = ptrtoint i32* %6 to i32
store i32 %7, i32* %5
%8 = load i32*, i32** %4
store i32* %8, i32** %3
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
store i32* %11, i32** %4
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ S_StopStreamingSound(int /*<<< orphan*/);
void S_Base_StopBackgroundTrack(void) { S_StopStreamingSound(0); }


x86 assembly (clang, -O0):
<S_Base_StopBackgroundTrack>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <S_StopStreamingSound@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<S_Base_StopBackgroundTrack>:
xor    %edi,%edi
jmp    1030 <S_StopStreamingSound@plt>

LLVM IR (-O0):
define void @S_Base_StopBackgroundTrack() {
%1 = call i32 @S_StopStreamingSound(i32 0)
ret void
}

LLVM IR (-O2):
define void @S_Base_StopBackgroundTrack() {
%1 = tail call i32 @S_StopStreamingSound(i32 0)
ret void
}
double sqlen(double v[3]) { return v[0] * v[0] + v[1] * v[1] + v[2] * v[2]; }


x86 assembly (clang, -O0):
<sqlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
mulsd  0x8(%rax),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqlen>:
movsd  (%rdi),%xmm1
movsd  0x8(%rdi),%xmm0
mulsd  %xmm0,%xmm0
mulsd  %xmm1,%xmm1
addsd  %xmm0,%xmm1
movsd  0x10(%rdi),%xmm0
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @sqlen(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = load double*, double** %2
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = load double*, double** %2
%10 = getelementptr inbounds double, double* %9, i64 1
%11 = load double, double* %10
%12 = load double*, double** %2
%13 = getelementptr inbounds double, double* %12, i64 1
%14 = load double, double* %13
%15 = fmul double %11, %14
%16 = call double @llvm.fmuladd.f64(double %5, double %8, double %15)
%17 = load double*, double** %2
%18 = getelementptr inbounds double, double* %17, i64 2
%19 = load double, double* %18
%20 = load double*, double** %2
%21 = getelementptr inbounds double, double* %20, i64 2
%22 = load double, double* %21
%23 = call double @llvm.fmuladd.f64(double %19, double %22, double %16)
ret double %23
}

LLVM IR (-O2):
define double @sqlen(double* nocapture %0) {
%2 = load double, double* %0
%3 = getelementptr inbounds double, double* %0, i64 1
%4 = load double, double* %3
%5 = fmul double %4, %4
%6 = tail call double @llvm.fmuladd.f64(double %2, double %2, double %5)
%7 = getelementptr inbounds double, double* %0, i64 2
%8 = load double, double* %7
%9 = tail call double @llvm.fmuladd.f64(double %8, double %8, double %6)
ret double %9
}
/* Variables and functions */
int /*<<< orphan*/ set_bit(unsigned int, unsigned long *);
int test_bit(unsigned int, unsigned long *);
int test_and_set_bit(unsigned int nr, unsigned long *addr) {
  int oldval = test_bit(nr, addr);
  set_bit(nr, addr);
  return oldval;
}


x86 assembly (clang, -O0):
<test_and_set_bit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <test_bit@plt>
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <set_bit@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_and_set_bit>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %edi,%ebp
call   1040 <test_bit@plt>
mov    %eax,%r14d
mov    %ebp,%edi
mov    %rbx,%rsi
call   1030 <set_bit@plt>
mov    %r14d,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @test_and_set_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i32
store i32 %0, i32* %3
store i64* %1, i64** %4
%6 = load i32, i32* %3
%7 = load i64*, i64** %4
%8 = call i32 @test_bit(i32 %6, i64* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %3
%10 = load i64*, i64** %4
%11 = call i32 @set_bit(i32 %9, i64* %10)
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @test_and_set_bit(i32 %0, i64* %1) {
%3 = tail call i32 @test_bit(i32 %0, i64* %1)
%4 = tail call i32 @set_bit(i32 %0, i64* %1)
ret i32 %3
}
/* Variables and functions */
unsigned long gfx_pci_config_read(int);
int sc1200_get_vsa2_softvga_enable(void) {
  unsigned long reg_val;
  reg_val = gfx_pci_config_read(0x80009444);
  if ((reg_val & 0x1) == 0)
    return (1);
  else
    return (0);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x80009444,%edi
call   1030 <gfx_pci_config_read@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
jne    1144 <sc1200_get_vsa2_softvga_enable+0x34>
movl   $0x1,-0x4(%rbp)
jmp    114b <sc1200_get_vsa2_softvga_enable+0x3b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
mov    $0x80009444,%edi
call   1030 <gfx_pci_config_read@plt>
not    %eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @sc1200_get_vsa2_softvga_enable() {
%1 = alloca i32
%2 = alloca i64
%3 = call i64 @gfx_pci_config_read(i32 -2147445692)
store i64 %3, i64* %2
%4 = load i64, i64* %2
%5 = and i64 %4, 1
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %0
store i32 1, i32* %1
br label %9
8: ; preds = %0
store i32 0, i32* %1
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
define i32 @sc1200_get_vsa2_softvga_enable() {
%1 = tail call i64 @gfx_pci_config_read(i32 -2147445692)
%2 = trunc i64 %1 to i32
%3 = and i32 %2, 1
%4 = xor i32 %3, 1
ret i32 %4
}
/* Type definitions */
struct serial_struct {
  int dummy;
};
typedef int /*<<< orphan*/ serial;

/* Variables and functions */
int /*<<< orphan*/ memset(struct serial_struct *, int /*<<< orphan*/, int);
int main(void) {
  struct serial_struct serial;
  (void)memset(&serial, 0, sizeof(serial));
  (void)serial;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    %rsp,%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.serial_struct = type { i32 }
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.serial_struct
store i32 0, i32* %1
%3 = call i32 @memset(%struct.serial_struct* %2, i32 0, i32 4)
ret i32 0
}

LLVM IR (-O2):
%struct.serial_struct = type { i32 }
define i32 @main() {
%1 = alloca %struct.serial_struct
%2 = bitcast %struct.serial_struct* %1 to i8*
%3 = call i32 @memset(%struct.serial_struct* %1, i32 0, i32 4)
ret i32 0
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ strcat(char **, char *);
int /*<<< orphan*/ strcpy(char **, char *);
int main(void) {
  puts("!!!Hello World!!!");
  char message[4];
  char driver = 0;
  char breakChar = '/';
  char value = 255;
  strcpy(&message, &driver);
  strcat(&message, &breakChar);
  strcat(&message, &value);
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
call   1040 <puts@plt>
movb   $0x0,-0x9(%rbp)
movb   $0x2f,-0xa(%rbp)
movb   $0xff,-0xb(%rbp)
lea    -0x8(%rbp),%rdi
lea    -0x9(%rbp),%rsi
call   1030 <strcpy@plt>
lea    -0x8(%rbp),%rdi
lea    -0xa(%rbp),%rsi
call   1050 <strcat@plt>
lea    -0x8(%rbp),%rdi
lea    -0xb(%rbp),%rsi
call   1050 <strcat@plt>
mov    0x2e5b(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xec4(%rip),%rdi
call   1040 <puts@plt>
movb   $0x0,0xb(%rsp)
movb   $0x2f,0xa(%rsp)
movb   $0xff,0x9(%rsp)
lea    0xc(%rsp),%rbx
lea    0xb(%rsp),%rsi
mov    %rbx,%rdi
call   1030 <strcpy@plt>
lea    0xa(%rsp),%rsi
mov    %rbx,%rdi
call   1050 <strcat@plt>
lea    0x9(%rsp),%rsi
mov    %rbx,%rdi
call   1050 <strcat@plt>
mov    0x2e5d(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"!!!Hello World!!!\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca [4 x i8]
%3 = alloca i8
%4 = alloca i8
%5 = alloca i8
store i32 0, i32* %1
%6 = call i32 @puts(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
store i8 0, i8* %3
store i8 47, i8* %4
store i8 -1, i8* %5
%7 = bitcast [4 x i8]* %2 to i8**
%8 = call i32 @strcpy(i8** %7, i8* %3)
%9 = bitcast [4 x i8]* %2 to i8**
%10 = call i32 @strcat(i8** %9, i8* %4)
%11 = bitcast [4 x i8]* %2 to i8**
%12 = call i32 @strcat(i8** %11, i8* %5)
%13 = load i32, i32* @EXIT_SUCCESS
ret i32 %13
}

LLVM IR (-O2):
@.str = [18 x i8] c"!!!Hello World!!!\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca [4 x i8]
%2 = alloca i8
%3 = alloca i8
%4 = alloca i8
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%6 = getelementptr inbounds [4 x i8], [4 x i8]* %1, i64 0, i64 0
store i8 0, i8* %2
store i8 47, i8* %3
store i8 -1, i8* %4
%7 = bitcast [4 x i8]* %1 to i8**
%8 = call i32 @strcpy(i8** %7, i8* %2)
%9 = call i32 @strcat(i8** %7, i8* %3)
%10 = call i32 @strcat(i8** %7, i8* %4)
%11 = load i32, i32* @EXIT_SUCCESS
ret i32 %11
}
_Complex long double test_csinl(_Complex long double x) {
  return __builtin_csinl(x);
}


x86 assembly (clang, -O0):
<test_csinl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
lea    0x10(%rbp),%rax
fldt   (%rax)
fldt   0x10(%rax)
fxch   %st(1)
fstpt  -0x40(%rbp)
fstpt  -0x30(%rbp)
movaps -0x40(%rbp),%xmm0
movaps -0x30(%rbp),%xmm1
mov    %rsp,%rax
movaps %xmm1,0x10(%rax)
movaps %xmm0,(%rax)
call   1030 <csinl@plt>
fstpt  -0x20(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_csinl>:
sub    $0x48,%rsp
fldt   0x50(%rsp)
fldt   0x60(%rsp)
fxch   %st(1)
fstpt  0x20(%rsp)
fstpt  0x30(%rsp)
movaps 0x20(%rsp),%xmm0
movaps 0x30(%rsp),%xmm1
movaps %xmm1,0x10(%rsp)
movaps %xmm0,(%rsp)
call   1030 <csinl@plt>
add    $0x48,%rsp
ret

LLVM IR (-O0):
define { x86_fp80, x86_fp80 } @test_csinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16 %0) {
%2 = alloca { x86_fp80, x86_fp80 }
%3 = alloca { x86_fp80, x86_fp80 }
%4 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i32 0, i32 0
%5 = load x86_fp80, x86_fp80* %4
%6 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i32 0, i32 1
%7 = load x86_fp80, x86_fp80* %6
%8 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %3, i32 0, i32 0
%9 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %3, i32 0, i32 1
store x86_fp80 %5, x86_fp80* %8
store x86_fp80 %7, x86_fp80* %9
%10 = call { x86_fp80, x86_fp80 } @csinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16 %3)
%11 = extractvalue { x86_fp80, x86_fp80 } %10, 0
%12 = extractvalue { x86_fp80, x86_fp80 } %10, 1
%13 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %2, i32 0, i32 0
%14 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %2, i32 0, i32 1
store x86_fp80 %11, x86_fp80* %13
store x86_fp80 %12, x86_fp80* %14
%15 = load { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %2
ret { x86_fp80, x86_fp80 } %15
}

LLVM IR (-O2):
define { x86_fp80, x86_fp80 } @test_csinl({ x86_fp80, x86_fp80 }* nocapture byval({ x86_fp80, x86_fp80 }) align 16 %0) {
%2 = alloca { x86_fp80, x86_fp80 }
%3 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i64 0, i32 0
%4 = load x86_fp80, x86_fp80* %3
%5 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i64 0, i32 1
%6 = load x86_fp80, x86_fp80* %5
%7 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %2, i64 0, i32 0
%8 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %2, i64 0, i32 1
store x86_fp80 %4, x86_fp80* %7
store x86_fp80 %6, x86_fp80* %8
%9 = tail call { x86_fp80, x86_fp80 } @csinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16 %2)
ret { x86_fp80, x86_fp80 } %9
}
/* Type definitions */
typedef unsigned long uint32_t;

/* Variables and functions */
void LCDIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags) {
  ;

  ;
  (*((volatile unsigned long *)(ui32Base + 0x00000064))) = ui32IntFlags;
}


x86 assembly (clang, -O0):
<LCDIntDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x64(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCDIntDisable>:
mov    %rsi,0x64(%rdi)
ret

LLVM IR (-O0):
define void @LCDIntDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add i64 %6, 100
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @LCDIntDisable(i64 %0, i64 %1) {
%3 = add i64 %0, 100
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}
unsigned int tint(float z, unsigned int color) {
  z /= 500;
  z += 1000;
  unsigned int c = (unsigned int)((2000 - z) * 256);
  c = color + c * 256 * 256 * 256;
  return c;
}


x86 assembly (clang, -O0):
<tint>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xee7(%rip),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xed5(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm1
movss  0xec3(%rip),%xmm0
subss  %xmm1,%xmm0
movss  0xebb(%rip),%xmm1
mulss  %xmm1,%xmm0
cvttss2si %xmm0,%rax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    $0x8,%ecx
shl    $0x8,%ecx
shl    $0x8,%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tint>:
divss  0xef8(%rip),%xmm0
addss  0xef4(%rip),%xmm0
movss  0xef0(%rip),%xmm1
subss  %xmm0,%xmm1
mulss  0xee8(%rip),%xmm1
cvttss2si %xmm1,%rax
shl    $0x18,%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @tint(float %0, i32 %1) {
%3 = alloca float
%4 = alloca i32
%5 = alloca i32
store float %0, float* %3
store i32 %1, i32* %4
%6 = load float, float* %3
%7 = fdiv float %6, 5.000000e+02
store float %7, float* %3
%8 = load float, float* %3
%9 = fadd float %8, 1.000000e+03
store float %9, float* %3
%10 = load float, float* %3
%11 = fsub float 2.000000e+03, %10
%12 = fmul float %11, 2.560000e+02
%13 = fptoui float %12 to i32
store i32 %13, i32* %5
%14 = load i32, i32* %4
%15 = load i32, i32* %5
%16 = mul i32 %15, 256
%17 = mul i32 %16, 256
%18 = mul i32 %17, 256
%19 = add i32 %14, %18
store i32 %19, i32* %5
%20 = load i32, i32* %5
ret i32 %20
}

LLVM IR (-O2):
define i32 @tint(float %0, i32 %1) {
%3 = fdiv float %0, 5.000000e+02
%4 = fadd float %3, 1.000000e+03
%5 = fsub float 2.000000e+03, %4
%6 = fmul float %5, 2.560000e+02
%7 = fptoui float %6 to i32
%8 = shl i32 %7, 24
%9 = add i32 %8, %1
ret i32 %9
}
void lock_db() {}


x86 assembly (clang, -O0):
<lock_db>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lock_db>:
ret

LLVM IR (-O0):
define void @lock_db() {
ret void
}

LLVM IR (-O2):
define void @lock_db() {
ret void
}
int read_fan(struct stats_pwr_fan *st_pwr_fan, int nr_alloc) { return 0; }


x86 assembly (clang, -O0):
<read_fan>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_fan>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.stats_pwr_fan = type opaque
define i32 @read_fan(%struct.stats_pwr_fan* %0, i32 %1) {
%3 = alloca %struct.stats_pwr_fan*
%4 = alloca i32
store %struct.stats_pwr_fan* %0, %struct.stats_pwr_fan** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
%struct.stats_pwr_fan = type opaque
define i32 @read_fan(%struct.stats_pwr_fan* nocapture readnone %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ strncpy(char *, char *, int);
void firstn(char *str, int n) {
  char ret[n + 1];
  strncpy(ret, str, n);
  ret[n] = '\0';
  printf("Ret: %s \n", ret);
}


x86 assembly (clang, -O0):
<firstn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %rsp,%rcx
mov    %rcx,-0x18(%rbp)
mov    %rax,%rcx
add    $0xf,%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rdi
sub    %rcx,%rdi
mov    %rdi,-0x28(%rbp)
mov    %rdi,%rsp
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <strncpy@plt>
mov    -0x28(%rbp),%rsi
movslq -0xc(%rbp),%rax
movb   $0x0,(%rsi,%rax,1)
lea    0xe89(%rip),%rdi
call   1040 <printf@plt>
mov    -0x18(%rbp),%rax
mov    %rax,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<firstn>:
push   %rbp
mov    %rsp,%rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %rdi,%rsi
lea    0x1(%r14),%eax
mov    %rsp,%rbx
add    $0xf,%rax
and    $0xfffffffffffffff0,%rax
sub    %rax,%rbx
mov    %rbx,%rsp
mov    %rbx,%rdi
mov    %r14d,%edx
call   1030 <strncpy@plt>
movslq %r14d,%rax
movb   $0x0,(%rax,%rbx,1)
lea    0xea5(%rip),%rdi
mov    %rbx,%rsi
call   1040 <printf@plt>
lea    -0x10(%rbp),%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [10 x i8] c"Ret: %s \0A\00"
define void @firstn(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = add nsw i32 %7, 1
%9 = zext i32 %8 to i64
%10 = call i8* @llvm.stacksave()
store i8* %10, i8** %5
%11 = alloca i8, i64 %9
store i64 %9, i64* %6
%12 = load i8*, i8** %3
%13 = load i32, i32* %4
%14 = call i32 @strncpy(i8* %11, i8* %12, i32 %13)
%15 = load i32, i32* %4
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %11, i64 %16
store i8 0, i8* %17
%18 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %11)
%19 = load i8*, i8** %5
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"Ret: %s \0A\00"
define void @firstn(i8* %0, i32 %1) {
%3 = add nsw i32 %1, 1
%4 = zext i32 %3 to i64
%5 = alloca i8, i64 %4
%6 = call i32 @strncpy(i8* %5, i8* %0, i32 %1)
%7 = sext i32 %1 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
store i8 0, i8* %8
%9 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
unsigned char *malloc(int);
int /*<<< orphan*/ memcpy(unsigned char *, void *, int);
unsigned char *generate_lenstr(void *str, int str_len) {
  unsigned char *len_str = malloc(sizeof(unsigned char[str_len + 1]));
  assert(str_len <= 256);
  len_str[0] = str_len - 1;
  memcpy(len_str + 1, str, str_len);
  return len_str;
}


x86 assembly (clang, -O0):
<generate_lenstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,%eax
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpl   $0x100,-0xc(%rbp)
setle  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rdi
add    $0x1,%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1040 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_lenstr>:
push   %r15
push   %r14
push   %rbx
mov    %esi,%ebx
mov    %rdi,%r14
lea    0x1(%rbx),%edi
call   1050 <malloc@plt>
mov    %rax,%r15
xor    %edi,%edi
cmp    $0x101,%ebx
setl   %dil
call   1030 <assert@plt>
lea    -0x1(%rbx),%eax
mov    %al,(%r15)
lea    0x1(%r15),%rdi
mov    %r14,%rsi
mov    %ebx,%edx
call   1040 <memcpy@plt>
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @generate_lenstr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 1
%8 = zext i32 %7 to i64
%9 = trunc i64 %8 to i32
%10 = call i8* @malloc(i32 %9)
store i8* %10, i8** %5
%11 = load i32, i32* %4
%12 = icmp sle i32 %11, 256
%13 = zext i1 %12 to i32
%14 = call i32 @assert(i32 %13)
%15 = load i32, i32* %4
%16 = sub nsw i32 %15, 1
%17 = trunc i32 %16 to i8
%18 = load i8*, i8** %5
%19 = getelementptr inbounds i8, i8* %18, i64 0
store i8 %17, i8* %19
%20 = load i8*, i8** %5
%21 = getelementptr inbounds i8, i8* %20, i64 1
%22 = load i8*, i8** %3
%23 = load i32, i32* %4
%24 = call i32 @memcpy(i8* %21, i8* %22, i32 %23)
%25 = load i8*, i8** %5
ret i8* %25
}

LLVM IR (-O2):
define i8* @generate_lenstr(i8* %0, i32 %1) {
%3 = add nsw i32 %1, 1
%4 = tail call i8* @malloc(i32 %3)
%5 = icmp slt i32 %1, 257
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
%8 = trunc i32 %1 to i8
%9 = add i8 %8, -1
store i8 %9, i8* %4
%10 = getelementptr inbounds i8, i8* %4, i64 1
%11 = tail call i32 @memcpy(i8* %10, i8* %0, i32 %1)
ret i8* %4
}
void s5pv310_cpufreq_lock_free(unsigned int nId) {}


x86 assembly (clang, -O0):
<s5pv310_cpufreq_lock_free>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<s5pv310_cpufreq_lock_free>:
ret

LLVM IR (-O0):
define void @s5pv310_cpufreq_lock_free(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @s5pv310_cpufreq_lock_free(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_queue_free_strings();
int /*<<< orphan*/ test_queue_one();
void test_queue(void) {
  test_queue_one();
  test_queue_free_strings();
}


x86 assembly (clang, -O0):
<test_queue>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <test_queue_one@plt>
mov    $0x0,%al
call   1040 <test_queue_free_strings@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_queue>:
push   %rax
xor    %eax,%eax
call   1030 <test_queue_one@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <test_queue_free_strings@plt>

LLVM IR (-O0):
define void @test_queue() {
%1 = call i32 (...) @test_queue_one()
%2 = call i32 (...) @test_queue_free_strings()
ret void
}

LLVM IR (-O2):
define void @test_queue() {
%1 = tail call i32 (...) @test_queue_one()
%2 = tail call i32 (...) @test_queue_free_strings()
ret void
}
/* Type definitions */
struct event {
  int dummy;
};

/* Variables and functions */
int setup_event_flags(struct event *, int, struct event *, int, int);
int setup_event(struct event *e, int cpu, struct event *leader,
                bool measure_all, int measure_pid) {
  return setup_event_flags(e, cpu, leader, measure_pid,
                           !measure_all ? (1 << 0) : 0);
}


x86 assembly (clang, -O0):
<setup_event>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%ecx
cmpl   $0x0,-0x1c(%rbp)
setne  %r9b
xor    $0xff,%r9b
xor    %r8d,%r8d
mov    $0x1,%eax
test   $0x1,%r9b
cmovne %eax,%r8d
call   1030 <setup_event_flags@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup_event>:
mov    %r8d,%eax
xor    %r8d,%r8d
test   %ecx,%ecx
sete   %r8b
mov    %eax,%ecx
jmp    1030 <setup_event_flags@plt>

LLVM IR (-O0):
%struct.event = type { i32 }
define i32 @setup_event(%struct.event* %0, i32 %1, %struct.event* %2, i32 %3, i32 %4) {
%6 = alloca %struct.event*
%7 = alloca i32
%8 = alloca %struct.event*
%9 = alloca i32
%10 = alloca i32
store %struct.event* %0, %struct.event** %6
store i32 %1, i32* %7
store %struct.event* %2, %struct.event** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load %struct.event*, %struct.event** %6
%12 = load i32, i32* %7
%13 = load %struct.event*, %struct.event** %8
%14 = load i32, i32* %10
%15 = load i32, i32* %9
%16 = icmp ne i32 %15, 0
%17 = xor i1 %16, true
%18 = zext i1 %17 to i64
%19 = select i1 %17, i32 1, i32 0
%20 = call i32 @setup_event_flags(%struct.event* %11, i32 %12, %struct.event* %13, i32 %14, i32 %19)
ret i32 %20
}

LLVM IR (-O2):
%struct.event = type { i32 }
define i32 @setup_event(%struct.event* %0, i32 %1, %struct.event* %2, i32 %3, i32 %4) {
%6 = icmp eq i32 %3, 0
%7 = zext i1 %6 to i32
%8 = tail call i32 @setup_event_flags(%struct.event* %0, i32 %1, %struct.event* %2, i32 %4, i32 %7)
ret i32 %8
}
/* Variables and functions */
double fabs(int /*<<< orphan*/);
int /*<<< orphan*/ vsq_calc(double);
double x1_of_x0(double x0) {
  double x1, vsq;
  double dv = 1.e-15;
  vsq = fabs(vsq_calc(x0));
  return ((vsq > 1.) ? (1.0 - dv) : vsq);
}


x86 assembly (clang, -O0):
<x1_of_x0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xed3(%rip),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <vsq_calc@plt>
mov    %eax,%edi
call   1030 <fabs@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  0xea3(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    117e <x1_of_x0+0x5e>
movsd  0xe91(%rip),%xmm0
subsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
jmp    1188 <x1_of_x0+0x68>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x1_of_x0>:
push   %rax
call   1040 <vsq_calc@plt>
mov    %eax,%edi
call   1030 <fabs@plt>
movsd  0xecb(%rip),%xmm1
cmpltsd %xmm0,%xmm1
movsd  0xec6(%rip),%xmm2
andpd  %xmm1,%xmm2
andnpd %xmm0,%xmm1
orpd   %xmm2,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @x1_of_x0(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %2
store double 1.000000e-15, double* %5
%6 = load double, double* %2
%7 = call i32 @vsq_calc(double %6)
%8 = call double @fabs(i32 %7)
store double %8, double* %4
%9 = load double, double* %4
%10 = fcmp ogt double %9, 1.000000e+00
br i1 %10, label %11, label %14
11: ; preds = %1
%12 = load double, double* %5
%13 = fsub double 1.000000e+00, %12
br label %16
14: ; preds = %1
%15 = load double, double* %4
br label %16
16: ; preds = %14, %11
%17 = phi double [ %13, %11 ], [ %15, %14 ]
ret double %17
}

LLVM IR (-O2):
define double @x1_of_x0(double %0) {
%2 = tail call i32 @vsq_calc(double %0)
%3 = tail call double @fabs(i32 %2)
%4 = fcmp ogt double %3, 1.000000e+00
%5 = select i1 %4, double 0x3FEFFFFFFFFFFFF7, double %3
ret double %5
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ strx_printv(int *, char *, size_t, char const *,
                               int /*<<< orphan*/);
int ap_vsnprintf(char *buf, size_t len, const char *format, va_list ap) {
  int cc;
  strx_printv(&cc, buf, (len - 1), format, ap);
  return (cc);
}


x86 assembly (clang, -O0):
<ap_vsnprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
sub    $0x1,%rdx
mov    -0x18(%rbp),%rcx
mov    -0x1c(%rbp),%r8d
lea    -0x20(%rbp),%rdi
call   1030 <strx_printv@plt>
mov    -0x20(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ap_vsnprintf>:
push   %rax
mov    %ecx,%r8d
mov    %rdx,%rcx
mov    %rdi,%rax
lea    -0x1(%rsi),%rdx
lea    0x4(%rsp),%rdi
mov    %rax,%rsi
call   1030 <strx_printv@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ap_vsnprintf(i8* %0, i64 %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%10 = load i8*, i8** %5
%11 = load i64, i64* %6
%12 = sub i64 %11, 1
%13 = load i8*, i8** %7
%14 = load i32, i32* %8
%15 = call i32 @strx_printv(i32* %9, i8* %10, i64 %12, i8* %13, i32 %14)
%16 = load i32, i32* %9
ret i32 %16
}

LLVM IR (-O2):
define i32 @ap_vsnprintf(i8* %0, i64 %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = bitcast i32* %5 to i8*
%7 = add i64 %1, -1
%8 = call i32 @strx_printv(i32* %5, i8* %0, i64 %7, i8* %2, i32 %3)
%9 = load i32, i32* %5
ret i32 %9
}
/* Type definitions */
struct htrace_span {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ span_json_sprintf_impl(struct htrace_span const *, int,
                                          void *);
void span_json_sprintf(const struct htrace_span *span, int max, void *buf) {
  span_json_sprintf_impl(span, max, buf);
}


x86 assembly (clang, -O0):
<span_json_sprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1030 <span_json_sprintf_impl@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<span_json_sprintf>:
jmp    1030 <span_json_sprintf_impl@plt>

LLVM IR (-O0):
%struct.htrace_span = type { i32 }
define void @span_json_sprintf(%struct.htrace_span* %0, i32 %1, i8* %2) {
%4 = alloca %struct.htrace_span*
%5 = alloca i32
%6 = alloca i8*
store %struct.htrace_span* %0, %struct.htrace_span** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load %struct.htrace_span*, %struct.htrace_span** %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = call i32 @span_json_sprintf_impl(%struct.htrace_span* %7, i32 %8, i8* %9)
ret void
}

LLVM IR (-O2):
%struct.htrace_span = type { i32 }
define void @span_json_sprintf(%struct.htrace_span* %0, i32 %1, i8* %2) {
%4 = tail call i32 @span_json_sprintf_impl(%struct.htrace_span* %0, i32 %1, i8* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _vector3_dot(float *, float *);
int /*<<< orphan*/ _vector3_scale(float *, float);
float sqrt(int /*<<< orphan*/);
float _vector3_normalize(float *v) {
  float length = 0;
  float scale = 0;
  int k;
  length = sqrt(_vector3_dot(v, v));
  scale = 1.0f / length;
  _vector3_scale(v, scale);
  return length;
}


x86 assembly (clang, -O0):
<_vector3_normalize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
xorps  %xmm0,%xmm0
movss  %xmm0,-0xc(%rbp)
xorps  %xmm0,%xmm0
movss  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <_vector3_dot@plt>
mov    %eax,%edi
call   1050 <sqrt@plt>
movss  %xmm0,-0xc(%rbp)
movss  0xe93(%rip),%xmm0
divss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
movss  -0x10(%rbp),%xmm0
call   1030 <_vector3_scale@plt>
movss  -0xc(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_vector3_normalize>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %rdi,%rsi
call   1040 <_vector3_dot@plt>
mov    %eax,%edi
call   1050 <sqrt@plt>
movaps %xmm0,%xmm1
movss  %xmm0,0xc(%rsp)
movss  0xea8(%rip),%xmm0
divss  %xmm1,%xmm0
mov    %rbx,%rdi
call   1030 <_vector3_scale@plt>
movss  0xc(%rsp),%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define float @_vector3_normalize(float* %0) {
%2 = alloca float*
%3 = alloca float
%4 = alloca float
%5 = alloca i32
store float* %0, float** %2
store float 0.000000e+00, float* %3
store float 0.000000e+00, float* %4
%6 = load float*, float** %2
%7 = load float*, float** %2
%8 = call i32 @_vector3_dot(float* %6, float* %7)
%9 = call float @sqrt(i32 %8)
store float %9, float* %3
%10 = load float, float* %3
%11 = fdiv float 1.000000e+00, %10
store float %11, float* %4
%12 = load float*, float** %2
%13 = load float, float* %4
%14 = call i32 @_vector3_scale(float* %12, float %13)
%15 = load float, float* %3
ret float %15
}

LLVM IR (-O2):
define float @_vector3_normalize(float* %0) {
%2 = tail call i32 @_vector3_dot(float* %0, float* %0)
%3 = tail call float @sqrt(i32 %2)
%4 = fdiv float 1.000000e+00, %3
%5 = tail call i32 @_vector3_scale(float* %0, float %4)
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
scalar_t__ malloc(int);
pre_allocate_memory() {
  int i;
  char *j;
  for (i = 4; i < 128; i = i * 2) {
    j = (char *)malloc(i);
    free(j);
  }
}


x86 assembly (clang, -O0):
<pre_allocate_memory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x4,-0x8(%rbp)
cmpl   $0x80,-0x8(%rbp)
jge    115f <pre_allocate_memory+0x3f>
mov    -0x8(%rbp),%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    112f <pre_allocate_memory+0xf>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pre_allocate_memory>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,%rdi
call   1030 <free@plt>
mov    $0x8,%edi
call   1040 <malloc@plt>
mov    %rax,%rdi
call   1030 <free@plt>
mov    $0x10,%edi
call   1040 <malloc@plt>
mov    %rax,%rdi
call   1030 <free@plt>
mov    $0x20,%edi
call   1040 <malloc@plt>
mov    %rax,%rdi
call   1030 <free@plt>
mov    $0x40,%edi
call   1040 <malloc@plt>
mov    %rax,%rdi
pop    %rax
jmp    1030 <free@plt>

LLVM IR (-O0):
define i32 @pre_allocate_memory() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8*
store i32 4, i32* %2
br label %4
4: ; preds = %13, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 128
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = load i32, i32* %2
%9 = call i64 @malloc(i32 %8)
%10 = inttoptr i64 %9 to i8*
store i8* %10, i8** %3
%11 = load i8*, i8** %3
%12 = call i32 @free(i8* %11)
br label %13
13: ; preds = %7
%14 = load i32, i32* %2
%15 = mul nsw i32 %14, 2
store i32 %15, i32* %2
br label %4
16: ; preds = %4
%17 = load i32, i32* %1
ret i32 %17
}

LLVM IR (-O2):
define i32 @pre_allocate_memory() {
%1 = tail call i64 @malloc(i32 4)
%2 = inttoptr i64 %1 to i8*
%3 = tail call i32 @free(i8* %2)
%4 = tail call i64 @malloc(i32 8)
%5 = inttoptr i64 %4 to i8*
%6 = tail call i32 @free(i8* %5)
%7 = tail call i64 @malloc(i32 16)
%8 = inttoptr i64 %7 to i8*
%9 = tail call i32 @free(i8* %8)
%10 = tail call i64 @malloc(i32 32)
%11 = inttoptr i64 %10 to i8*
%12 = tail call i32 @free(i8* %11)
%13 = tail call i64 @malloc(i32 64)
%14 = inttoptr i64 %13 to i8*
%15 = tail call i32 @free(i8* %14)
ret i32 undef
}
float lbft_to_nm(float value) { return value * 1.3558179483f; }


x86 assembly (clang, -O0):
<lbft_to_nm>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<lbft_to_nm>:
mulss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @lbft_to_nm(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float %3, 0x3FF5B16E20000000
ret float %4
}

LLVM IR (-O2):
define float @lbft_to_nm(float %0) {
%2 = fmul float %0, 0x3FF5B16E20000000
ret float %2
}
/* Type definitions */
typedef int __u32;

/* Variables and functions */
__u32 LNET_NETTYP(__u32 net) { return (net >> 16) & 0xffff; }


x86 assembly (clang, -O0):
<LNET_NETTYP>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
and    $0xffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LNET_NETTYP>:
mov    %edi,%eax
shr    $0x10,%eax
ret

LLVM IR (-O0):
define i32 @LNET_NETTYP(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 16
%5 = and i32 %4, 65535
ret i32 %5
}

LLVM IR (-O2):
define i32 @LNET_NETTYP(i32 %0) {
%2 = lshr i32 %0, 16
ret i32 %2
}
int mDB_next(fn, idx, key, rows, dst) {
  return mDBi_msg('n', fn, idx, rows, key, 0, 0, dst);
}


x86 assembly (clang, -O0):
<mDB_next>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%r8d
mov    -0x14(%rbp),%eax
mov    $0x6e,%edi
xor    %r9d,%r9d
movl   $0x0,(%rsp)
mov    %eax,0x8(%rsp)
mov    $0x0,%al
call   1030 <mDBi_msg@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mDB_next>:
push   %rax
mov    %r8d,%r10d
mov    %edx,%r8d
mov    %esi,%edx
mov    %edi,%esi
mov    $0x6e,%edi
xor    %r9d,%r9d
xor    %eax,%eax
push   %r10
push   $0x0
call   1030 <mDBi_msg@plt>
add    $0x10,%rsp
pop    %rcx
ret

LLVM IR (-O0):
define i32 @mDB_next(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %9
%14 = load i32, i32* %8
%15 = load i32, i32* %10
%16 = call i32 (i32, i32, i32, i32, i32, i32, i32, i32, ...) bitcast (i32 (...)* @mDBi_msg to i32 (i32, i32, i32, i32, i32, i32, i32, i32, ...)*)(i32 110, i32 %11, i32 %12, i32 %13, i32 %14, i32 0, i32 0, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @mDB_next(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 (i32, i32, i32, i32, i32, i32, i32, i32, ...) bitcast (i32 (...)* @mDBi_msg to i32 (i32, i32, i32, i32, i32, i32, i32, i32, ...)*)(i32 110, i32 %0, i32 %1, i32 %3, i32 %2, i32 0, i32 0, i32 %4)
ret i32 %6
}
/* Variables and functions */
char VCNL4000_readCmd(int);
int testVCNL4000() {
  char c = VCNL4000_readCmd(0x80 + 0x1);
  if (c == 0x11)
    return 0;
  else
    return -1;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x81,%edi
call   1030 <VCNL4000_readCmd@plt>
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x11,%eax
jne    113e <testVCNL4000+0x2e>
movl   $0x0,-0x4(%rbp)
jmp    1145 <testVCNL4000+0x35>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
mov    $0x81,%edi
call   1030 <VCNL4000_readCmd@plt>
xor    %ecx,%ecx
cmp    $0x11,%al
setne  %cl
neg    %ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @testVCNL4000() {
%1 = alloca i32
%2 = alloca i8
%3 = call signext i8 @VCNL4000_readCmd(i32 129)
store i8 %3, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 17
br i1 %6, label %7, label %8
7: ; preds = %0
store i32 0, i32* %1
br label %9
8: ; preds = %0
store i32 -1, i32* %1
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
define i32 @testVCNL4000() {
%1 = tail call signext i8 @VCNL4000_readCmd(i32 129)
%2 = icmp ne i8 %1, 17
%3 = sext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ ST_logger_msg(char *, int);
int /*<<< orphan*/ printf(char *);
void *inc_interval(void *p) {
  int i;
  for (i = 0; i < 100; i++) {
    printf("################ ENTRY ################\n");
    ST_logger_msg("logger test", 2);
  }
  return NULL;
}


x86 assembly (clang, -O0):
<inc_interval>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x64,-0xc(%rbp)
jge    1168 <inc_interval+0x48>
lea    0xebc(%rip),%rdi
call   1040 <printf@plt>
lea    0xed9(%rip),%rdi
mov    $0x2,%esi
call   1030 <ST_logger_msg@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1133 <inc_interval+0x13>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inc_interval>:
push   %rbp
push   %r14
push   %rbx
mov    $0x64,%ebp
lea    0xedc(%rip),%r14
lea    0xec9(%rip),%rbx
nopw   0x0(%rax,%rax,1)
mov    %r14,%rdi
call   1040 <puts@plt>
mov    %rbx,%rdi
mov    $0x2,%esi
call   1030 <ST_logger_msg@plt>
add    $0xffffffff,%ebp
jne    1140 <inc_interval+0x20>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [41 x i8] c"################ ENTRY ################\0A\00"
@.str.1 = [12 x i8] c"logger test\00"
define i8* @inc_interval(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 100
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%9 = call i32 @ST_logger_msg(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 2)
br label %10
10: ; preds = %7
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
ret i8* null
}

LLVM IR (-O2):
@.str.1 = [12 x i8] c"logger test\00"
@str = [40 x i8] c"################ ENTRY ################\00"
define noalias i8* @inc_interval(i8* nocapture readnone %0) {
br label %2
2: ; preds = %1, %2
%3 = phi i32 [ 0, %1 ], [ %6, %2 ]
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([40 x i8], [40 x i8]* @str, i64 0, i64 0))
%5 = tail call i32 @ST_logger_msg(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 2)
%6 = add nuw nsw i32 %3, 1
%7 = icmp eq i32 %6, 100
br i1 %7, label %8, label %2
8: ; preds = %2
ret i8* null
}