xunge/DecIR huggingface dataset:
unsigned short _fargetsel(void) {
  unsigned short selector;
  __asm__ __volatile__("movw %%fs,%w0 \n" : "=r"(selector) :);
  return selector;
}


x86 assembly (clang, -O0):
<_fargetsel>:
push   %rbp
mov    %rsp,%rbp
mov    %fs,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fargetsel>:
mov    %fs,%ax
ret

LLVM IR (-O0):
define zeroext i16 @_fargetsel() {
%1 = alloca i16
%2 = call i16 asm sideeffect "movw %fs,${0:w} \0A", "=r,~{dirflag},~{fpsr},~{flags}"()
store i16 %2, i16* %1
%3 = load i16, i16* %1
ret i16 %3
}

LLVM IR (-O2):
define zeroext i16 @_fargetsel() {
%1 = tail call i16 asm sideeffect "movw %fs,${0:w} \0A", "=r,~{dirflag},~{fpsr},~{flags}"()
ret i16 %1
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void timeToDoSomething(int hour) {
  if ((hour > 12) && (hour < 13))
    printf("I'm starving ! bye\n");
  else if ((hour > 20) && (hour < 21))
    printf("I'm starving ! bye\n");
  else
    return;
  exit(-1);
}


x86 assembly (clang, -O0):
<timeToDoSomething>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xc,-0x4(%rbp)
jle    1150 <timeToDoSomething+0x30>
cmpl   $0xd,-0x4(%rbp)
jge    1150 <timeToDoSomething+0x30>
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
jmp    1180 <timeToDoSomething+0x60>
cmpl   $0x14,-0x4(%rbp)
jle    1175 <timeToDoSomething+0x55>
cmpl   $0x15,-0x4(%rbp)
jge    1175 <timeToDoSomething+0x55>
lea    0xe95(%rip),%rdi
call   1030 <printf@plt>
jmp    117b <timeToDoSomething+0x5b>
add    $0x10,%rsp
pop    %rbp
ret
jmp    1180 <timeToDoSomething+0x60>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<timeToDoSomething>:
ret

LLVM IR (-O0):
@.str = [20 x i8] c"I'm starving ! bye\0A\00"
define void @timeToDoSomething(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 12
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 13
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
br label %20
10: ; preds = %5, %1
%11 = load i32, i32* %2
%12 = icmp sgt i32 %11, 20
br i1 %12, label %13, label %18
13: ; preds = %10
%14 = load i32, i32* %2
%15 = icmp slt i32 %14, 21
br i1 %15, label %16, label %18
16: ; preds = %13
%17 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
br label %19
18: ; preds = %13, %10
ret void
19: ; preds = %16
br label %20
20: ; preds = %19, %8
%21 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
define void @timeToDoSomething(i32 %0) {
ret void
}
double get_dynamical_diff_sh1(double JD) {
  double TD, E;
  E = (JD - 2067314.5) / 36525.0;
  TD = 1830.0 - 405.0 * E + 46.5 * E * E;
  return TD;
}


x86 assembly (clang, -O0):
<get_dynamical_diff_sh1>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xf0a(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  0xef6(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm1
movsd  0xed0(%rip),%xmm0
mulsd  %xmm0,%xmm1
movsd  0xecc(%rip),%xmm0
addsd  %xmm0,%xmm1
movsd  0xeb0(%rip),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_dynamical_diff_sh1>:
addsd  0xef8(%rip),%xmm0
divsd  0xef8(%rip),%xmm0
movsd  0xef8(%rip),%xmm1
mulsd  %xmm0,%xmm1
addsd  0xef4(%rip),%xmm1
movsd  0xef4(%rip),%xmm2
mulsd  %xmm0,%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @get_dynamical_diff_sh1(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %2
%5 = load double, double* %2
%6 = fsub double %5, 0x413F8B7280000000
%7 = fdiv double %6, 3.652500e+04
store double %7, double* %4
%8 = load double, double* %4
%9 = call double @llvm.fmuladd.f64(double -4.050000e+02, double %8, double 1.830000e+03)
%10 = load double, double* %4
%11 = fmul double 4.650000e+01, %10
%12 = load double, double* %4
%13 = call double @llvm.fmuladd.f64(double %11, double %12, double %9)
store double %13, double* %3
%14 = load double, double* %3
ret double %14
}

LLVM IR (-O2):
define double @get_dynamical_diff_sh1(double %0) {
%2 = fadd double %0, 0xC13F8B7280000000
%3 = fdiv double %2, 3.652500e+04
%4 = tail call double @llvm.fmuladd.f64(double %3, double -4.050000e+02, double 1.830000e+03)
%5 = fmul double %3, 4.650000e+01
%6 = tail call double @llvm.fmuladd.f64(double %5, double %3, double %4)
ret double %6
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
void LPCByteWrite(unsigned long ulBase, unsigned long ulOffset,
                  unsigned char ucData) {
  DEBUG_ASSERT(ulBase == 0x40080000);
  DEBUG_ASSERT(
      ulOffset <
      ((((*((volatile unsigned long *)(ulBase + 0x00000004))) & 0x00070000) >>
        16) *
       256));
  (*((volatile unsigned char *)(ulBase + 0x00000400 + ulOffset))) = ucData;
}


x86 assembly (clang, -O0):
<LPCByteWrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dl,%al
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
cmpq   $0x40080000,-0x8(%rbp)
40
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
mov    0x4(%rcx),%rcx
and    $0x70000,%rcx
shr    $0x10,%rcx
shl    $0x8,%rcx
cmp    %rcx,%rax
setb   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x11(%rbp),%cl
mov    -0x8(%rbp),%rax
add    $0x400,%rax
add    -0x10(%rbp),%rax
mov    %cl,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LPCByteWrite>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
xor    %edi,%edi
cmp    $0x40080000,%rbp
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
mov    0x4(%rbp),%rax
shr    $0x8,%rax
and    $0x700,%eax
xor    %edi,%edi
cmp    %rbx,%rax
seta   %dil
call   1030 <DEBUG_ASSERT@plt>
mov    %r14b,0x400(%rbp,%rbx,1)
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @LPCByteWrite(i64 %0, i64 %1, i8 zeroext %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i8
store i64 %0, i64* %4
store i64 %1, i64* %5
store i8 %2, i8* %6
%7 = load i64, i64* %4
%8 = icmp eq i64 %7, 1074266112
%9 = zext i1 %8 to i32
%10 = call i32 @DEBUG_ASSERT(i32 %9)
%11 = load i64, i64* %5
%12 = load i64, i64* %4
%13 = add i64 %12, 4
%14 = inttoptr i64 %13 to i64*
%15 = load volatile i64, i64* %14
%16 = and i64 %15, 458752
%17 = lshr i64 %16, 16
%18 = mul i64 %17, 256
%19 = icmp ult i64 %11, %18
%20 = zext i1 %19 to i32
%21 = call i32 @DEBUG_ASSERT(i32 %20)
%22 = load i8, i8* %6
%23 = load i64, i64* %4
%24 = add i64 %23, 1024
%25 = load i64, i64* %5
%26 = add i64 %24, %25
%27 = inttoptr i64 %26 to i8*
store volatile i8 %22, i8* %27
ret void
}

LLVM IR (-O2):
define void @LPCByteWrite(i64 %0, i64 %1, i8 zeroext %2) {
%4 = icmp eq i64 %0, 1074266112
%5 = zext i1 %4 to i32
%6 = tail call i32 @DEBUG_ASSERT(i32 %5)
%7 = add i64 %0, 4
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = lshr i64 %9, 8
%11 = and i64 %10, 1792
%12 = icmp ugt i64 %11, %1
%13 = zext i1 %12 to i32
%14 = tail call i32 @DEBUG_ASSERT(i32 %13)
%15 = add i64 %0, 1024
%16 = add i64 %15, %1
%17 = inttoptr i64 %16 to i8*
store volatile i8 %2, i8* %17
ret void
}
int test_csneg32_condasn2(int w0, int w1, int w2, int w3) {
  int w4;
  w4 = (w0 == w1) ? w3 : -w2;
  return w4;
}


x86 assembly (clang, -O0):
<test_csneg32_condasn2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jne    1127 <test_csneg32_condasn2+0x27>
mov    -0x10(%rbp),%eax
mov    %eax,-0x18(%rbp)
jmp    112f <test_csneg32_condasn2+0x2f>
xor    %eax,%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_csneg32_condasn2>:
mov    %edx,%eax
neg    %eax
cmp    %esi,%edi
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_csneg32_condasn2(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = icmp eq i32 %10, %11
br i1 %12, label %13, label %15
13: ; preds = %4
%14 = load i32, i32* %8
br label %18
15: ; preds = %4
%16 = load i32, i32* %7
%17 = sub nsw i32 0, %16
br label %18
18: ; preds = %15, %13
%19 = phi i32 [ %14, %13 ], [ %17, %15 ]
store i32 %19, i32* %9
%20 = load i32, i32* %9
ret i32 %20
}

LLVM IR (-O2):
define i32 @test_csneg32_condasn2(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp eq i32 %0, %1
%6 = sub nsw i32 0, %2
%7 = select i1 %5, i32 %3, i32 %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char *argv[]) {
  char str[3];
  for (int i = 0; i < 3; ++i)
    str[i] = '\0';
  printf("Res_1: %s\n", str);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x18(%rbp)
cmpl   $0x3,-0x18(%rbp)
jge    114e <main+0x3e>
movslq -0x18(%rbp),%rax
movb   $0x0,-0x13(%rbp,%rax,1)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    112d <main+0x1d>
lea    -0x13(%rbp),%rsi
lea    0xea7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movb   $0x0,0x6(%rsp)
movw   $0x0,0x4(%rsp)
lea    0xedc(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"Res_1: %s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [3 x i8]
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %7
br label %8
8: ; preds = %15, %2
%9 = load i32, i32* %7
%10 = icmp slt i32 %9, 3
br i1 %10, label %11, label %18
11: ; preds = %8
%12 = load i32, i32* %7
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds [3 x i8], [3 x i8]* %6, i64 0, i64 %13
store i8 0, i8* %14
br label %15
15: ; preds = %11
%16 = load i32, i32* %7
%17 = add nsw i32 %16, 1
store i32 %17, i32* %7
br label %8
18: ; preds = %8
%19 = getelementptr inbounds [3 x i8], [3 x i8]* %6, i64 0, i64 0
%20 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %19)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"Res_1: %s\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [3 x i8]
%4 = getelementptr inbounds [3 x i8], [3 x i8]* %3, i64 0, i64 0
%5 = getelementptr inbounds [3 x i8], [3 x i8]* %3, i64 0, i64 0
%6 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %5)
ret i32 0
}
void RTManifestRelease(void) {}


x86 assembly (clang, -O0):
<RTManifestRelease>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTManifestRelease>:
ret

LLVM IR (-O0):
define void @RTManifestRelease() {
ret void
}

LLVM IR (-O2):
define void @RTManifestRelease() {
ret void
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ printf(char *);
int main(void) {
  int unuesd;
  printf("×ÏÒ¹À»Éº, ÇàÁæÏï²Ý\n");
  printf("Âä»¨ÃÀ¾ì, ËÆË®Á÷Äê\n");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xef2(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea2(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeff(%rip),%rdi
call   1030 <puts@plt>
mov    0x2eb0(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [36 x i8] c"\C3\97\C3\8F\C3\92\C2\B9\C3\80\C2\BB\C3\89\C2\BA, \C3\87\C3\A0\C3\81\C3\A6\C3\8F\C3\AF\C2\B2\C3\9D\0A\00"
@.str.1 = [36 x i8] c"\C3\82\C3\A4\C2\BB\C2\A8\C3\83\C3\80\C2\BE\C3\AC, \C3\8B\C3\86\C3\8B\C2\AE\C3\81\C3\B7\C3\84\C3\AA\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0))
%5 = load i32, i32* @EXIT_SUCCESS
ret i32 %5
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
@str = [35 x i8] c"\C3\97\C3\8F\C3\92\C2\B9\C3\80\C2\BB\C3\89\C2\BA, \C3\87\C3\A0\C3\81\C3\A6\C3\8F\C3\AF\C2\B2\C3\9D\00"
@str.2 = [35 x i8] c"\C3\82\C3\A4\C2\BB\C2\A8\C3\83\C3\80\C2\BE\C3\AC, \C3\8B\C3\86\C3\8B\C2\AE\C3\81\C3\B7\C3\84\C3\AA\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str.2, i64 0, i64 0))
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ _vdo(int /*<<< orphan*/, int /*<<< orphan*/, char const *,
                        int /*<<< orphan*/);
int /*<<< orphan*/ errno;
void vwarnx(const char *fmt, va_list args) { _vdo(errno, 0, fmt, args); }


x86 assembly (clang, -O0):
<vwarnx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
xor    %esi,%esi
call   1030 <_vdo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vwarnx>:
mov    %esi,%ecx
mov    %rdi,%rdx
mov    0x2ec4(%rip),%rax
mov    (%rax),%edi
xor    %esi,%esi
jmp    1030 <_vdo@plt>

LLVM IR (-O0):
@errno = global i32 0
define void @vwarnx(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @errno
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @_vdo(i32 %5, i32 0, i8* %6, i32 %7)
ret void
}

LLVM IR (-O2):
@errno = global i32 0
define void @vwarnx(i8* %0, i32 %1) {
%3 = load i32, i32* @errno
%4 = tail call i32 @_vdo(i32 %3, i32 0, i8* %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FETCH_B();
int /*<<< orphan*/ GetModRMRMB(int /*<<< orphan*/);
void i_escape(void) { GetModRMRMB(FETCH_B()); }


x86 assembly (clang, -O0):
<i_escape>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <FETCH_B@plt>
mov    %eax,%edi
call   1040 <GetModRMRMB@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<i_escape>:
push   %rax
xor    %eax,%eax
call   1030 <FETCH_B@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <GetModRMRMB@plt>

LLVM IR (-O0):
define void @i_escape() {
%1 = call i32 (...) @FETCH_B()
%2 = call i32 @GetModRMRMB(i32 %1)
ret void
}

LLVM IR (-O2):
define void @i_escape() {
%1 = tail call i32 (...) @FETCH_B()
%2 = tail call i32 @GetModRMRMB(i32 %1)
ret void
}
/* Variables and functions */
int munmap(void *addr __attribute__((unused)),
           size_t length __attribute__((unused))) {
  return -1;
}


x86 assembly (clang, -O0):
<munmap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<munmap>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @munmap(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
ret i32 -1
}

LLVM IR (-O2):
define i32 @munmap(i8* nocapture readnone %0, i64 %1) {
ret i32 -1
}
void PWM0Generator2_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<PWM0Generator2_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <PWM0Generator2_Handler+0x9>
jmp    1109 <PWM0Generator2_Handler+0x9>

x86 assembly (clang, -O2):
<PWM0Generator2_Handler>:
jmp    1100 <PWM0Generator2_Handler>

LLVM IR (-O0):
define void @PWM0Generator2_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @PWM0Generator2_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
int mvdu_mode_def(int mode) {
  switch (mode) {
  case 1:
  case 2:
    return 0;
  default:
    return 1;
  }
}


x86 assembly (clang, -O0):
<mvdu_mode_def>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
sub    $0x1,%eax
ja     1127 <mvdu_mode_def+0x27>
jmp    111b <mvdu_mode_def+0x1b>
movl   $0x0,-0x4(%rbp)
jmp    112e <mvdu_mode_def+0x2e>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mvdu_mode_def>:
add    $0xfffffffd,%edi
xor    %eax,%eax
cmp    $0xfffffffe,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @mvdu_mode_def(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 1, label %5
i32 2, label %5
]
5: ; preds = %1, %1
store i32 0, i32* %2
br label %7
6: ; preds = %1
store i32 1, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @mvdu_mode_def(i32 %0) {
%2 = add i32 %0, -3
%3 = icmp ult i32 %2, -2
%4 = zext i1 %3 to i32
ret i32 %4
}
void irq_init(void) {}


x86 assembly (clang, -O0):
<irq_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irq_init>:
ret

LLVM IR (-O0):
define void @irq_init() {
ret void
}

LLVM IR (-O2):
define void @irq_init() {
ret void
}
/* Variables and functions */
int getline(char **, size_t *, int /*<<< orphan*/);
int /*<<< orphan*/ parse_line(char *);
int /*<<< orphan*/ stdin;
int main(int argc, char *argv[]) {
  char *line;
  size_t linesize;
  while (getline(&line, &linesize, stdin) != -1) {
    parse_line(line);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eab(%rip),%rax
mov    (%rax),%edx
lea    -0x18(%rbp),%rdi
lea    -0x20(%rbp),%rsi
call   1040 <getline@plt>
cmp    $0xffffffff,%eax
je     1163 <main+0x43>
mov    -0x18(%rbp),%rdi
call   1030 <parse_line@plt>
jmp    1136 <main+0x16>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    0x2eb8(%rip),%r15
mov    (%r15),%edx
mov    %rsp,%rdi
lea    0x8(%rsp),%rsi
call   1040 <getline@plt>
cmp    $0xffffffff,%eax
je     116c <main+0x4c>
mov    %rsp,%r14
lea    0x8(%rsp),%rbx
nopl   (%rax)
mov    (%rsp),%rdi
call   1030 <parse_line@plt>
mov    (%r15),%edx
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <getline@plt>
cmp    $0xffffffff,%eax
jne    1150 <main+0x30>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@stdin = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
%7 = alloca i64
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
br label %8
8: ; preds = %12, %2
%9 = load i32, i32* @stdin
%10 = call i32 @getline(i8** %6, i64* %7, i32 %9)
%11 = icmp ne i32 %10, -1
br i1 %11, label %12, label %15
12: ; preds = %8
%13 = load i8*, i8** %6
%14 = call i32 @parse_line(i8* %13)
br label %8
15: ; preds = %8
ret i32 0
}

LLVM IR (-O2):
@stdin = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = bitcast i8** %3 to i8*
%6 = bitcast i64* %4 to i8*
%7 = load i32, i32* @stdin
%8 = call i32 @getline(i8** %3, i64* %4, i32 %7)
%9 = icmp eq i32 %8, -1
br i1 %9, label %16, label %10
10: ; preds = %2, %10
%11 = load i8*, i8** %3
%12 = call i32 @parse_line(i8* %11)
%13 = load i32, i32* @stdin
%14 = call i32 @getline(i8** %3, i64* %4, i32 %13)
%15 = icmp eq i32 %14, -1
br i1 %15, label %16, label %10
16: ; preds = %10, %2
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int func_inputs_max();
size_t cell_index_from_input(size_t i) {
  const size_t items_in_cell = 1 + func_inputs_max();
  assert(items_in_cell > 0);
  return i / items_in_cell;
}


x86 assembly (clang, -O0):
<cell_index_from_input>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <func_inputs_max@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
seta   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cell_index_from_input>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
xor    %eax,%eax
call   1040 <func_inputs_max@plt>
mov    %eax,%ebp
add    $0x1,%ebp
movslq %ebp,%rbx
xor    %edi,%edi
test   %ebx,%ebx
setne  %dil
call   1030 <assert@plt>
mov    %r14,%rax
or     %rbx,%rax
shr    $0x20,%rax
je     1159 <cell_index_from_input+0x39>
mov    %r14,%rax
xor    %edx,%edx
div    %rbx
jmp    1160 <cell_index_from_input+0x40>
mov    %r14d,%eax
xor    %edx,%edx
div    %ebp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i64 @cell_index_from_input(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = call i32 (...) @func_inputs_max()
%5 = add nsw i32 1, %4
%6 = sext i32 %5 to i64
store i64 %6, i64* %3
%7 = load i64, i64* %3
%8 = icmp ugt i64 %7, 0
%9 = zext i1 %8 to i32
%10 = call i32 @assert(i32 %9)
%11 = load i64, i64* %2
%12 = load i64, i64* %3
%13 = udiv i64 %11, %12
ret i64 %13
}

LLVM IR (-O2):
define i64 @cell_index_from_input(i64 %0) {
%2 = tail call i32 (...) @func_inputs_max()
%3 = add nsw i32 %2, 1
%4 = sext i32 %3 to i64
%5 = icmp ne i32 %3, 0
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
%8 = udiv i64 %0, %4
ret i64 %8
}
void VMR3HotPlugCpu(void) {}


x86 assembly (clang, -O0):
<VMR3HotPlugCpu>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VMR3HotPlugCpu>:
ret

LLVM IR (-O0):
define void @VMR3HotPlugCpu() {
ret void
}

LLVM IR (-O2):
define void @VMR3HotPlugCpu() {
ret void
}
int git_libgit2_shutdown(void) { return 0; }


x86 assembly (clang, -O0):
<git_libgit2_shutdown>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<git_libgit2_shutdown>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @git_libgit2_shutdown() {
ret i32 0
}

LLVM IR (-O2):
define i32 @git_libgit2_shutdown() {
ret i32 0
}
/* Variables and functions */
scalar_t__ EINTR;
scalar_t__ errno;
int ioctl(int, unsigned long, void *);
int xioctl(int fd, unsigned long int request, void *arg) {
  int r;
  do
    r = ioctl(fd, request, arg);
  while (-1 == r && EINTR == errno);
  return r;
}


x86 assembly (clang, -O0):
<xioctl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <ioctl@plt>
mov    %eax,-0x1c(%rbp)
xor    %eax,%eax
mov    $0xffffffff,%ecx
cmp    -0x1c(%rbp),%ecx
mov    %al,-0x1d(%rbp)
jne    1163 <xioctl+0x53>
mov    0x2e88(%rip),%rax
mov    (%rax),%rax
mov    0x2e86(%rip),%rcx
cmp    (%rcx),%rax
sete   %al
mov    %al,-0x1d(%rbp)
mov    -0x1d(%rbp),%al
test   $0x1,%al
jne    1123 <xioctl+0x13>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xioctl>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %edi,%ebp
mov    0x2eb1(%rip),%r15
mov    0x2eb2(%rip),%r12
xchg   %ax,%ax
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %r14,%rdx
call   1030 <ioctl@plt>
cmp    $0xffffffff,%eax
jne    114b <xioctl+0x3b>
mov    (%r12),%rcx
cmp    %rcx,(%r15)
je     1130 <xioctl+0x20>
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@EINTR = global i64 0
@errno = global i64 0
define i32 @xioctl(i32 %0, i64 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i8*
%7 = alloca i32
store i32 %0, i32* %4
store i64 %1, i64* %5
store i8* %2, i8** %6
br label %8
8: ; preds = %20, %3
%9 = load i32, i32* %4
%10 = load i64, i64* %5
%11 = load i8*, i8** %6
%12 = call i32 @ioctl(i32 %9, i64 %10, i8* %11)
store i32 %12, i32* %7
br label %13
13: ; preds = %8
%14 = load i32, i32* %7
%15 = icmp eq i32 -1, %14
br i1 %15, label %16, label %20
16: ; preds = %13
%17 = load i64, i64* @EINTR
%18 = load i64, i64* @errno
%19 = icmp eq i64 %17, %18
br label %20
20: ; preds = %16, %13
%21 = phi i1 [ false, %13 ], [ %19, %16 ]
br i1 %21, label %8, label %22
22: ; preds = %20
%23 = load i32, i32* %7
ret i32 %23
}

LLVM IR (-O2):
@EINTR = global i64 0
@errno = global i64 0
define i32 @xioctl(i32 %0, i64 %1, i8* %2) {
br label %4
4: ; preds = %4, %3
%5 = tail call i32 @ioctl(i32 %0, i64 %1, i8* %2)
%6 = icmp eq i32 %5, -1
%7 = load i64, i64* @EINTR
%8 = load i64, i64* @errno
%9 = icmp eq i64 %7, %8
%10 = select i1 %6, i1 %9, i1 false
br i1 %10, label %4, label %11
11: ; preds = %4
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  uid_t curds;
  extern uid_t geteuid();
  curds = geteuid();
  printf("#define HAVE_UID_T /* yes */\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <geteuid@plt>
mov    %eax,-0x8(%rbp)
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <geteuid@plt>
lea    0xed1(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [30 x i8] c"#define HAVE_UID_T /* yes */\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @geteuid()
store i32 %3, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [29 x i8] c"#define HAVE_UID_T /* yes */\00"
define i32 @main() {
%1 = tail call i32 (...) @geteuid()
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(unsigned char *, unsigned char const *, size_t);
size_t serialize_bytes(unsigned char *out, unsigned char const *bytes,
                       size_t size) {
  size_t offset = 0;
  if (out != NULL)
    memcpy(&out[offset], bytes, size);
  offset += size;
  return offset;
}


x86 assembly (clang, -O0):
<serialize_bytes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     114c <serialize_bytes+0x3c>
mov    -0x8(%rbp),%rdi
add    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serialize_bytes>:
push   %rbx
mov    %rdx,%rbx
test   %rdi,%rdi
je     1121 <serialize_bytes+0x11>
mov    %rbx,%rdx
call   1030 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @serialize_bytes(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
store i64 0, i64* %7
%8 = load i8*, i8** %4
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %17
10: ; preds = %3
%11 = load i8*, i8** %4
%12 = load i64, i64* %7
%13 = getelementptr inbounds i8, i8* %11, i64 %12
%14 = load i8*, i8** %5
%15 = load i64, i64* %6
%16 = call i32 @memcpy(i8* %13, i8* %14, i64 %15)
br label %17
17: ; preds = %10, %3
%18 = load i64, i64* %6
%19 = load i64, i64* %7
%20 = add i64 %19, %18
store i64 %20, i64* %7
%21 = load i64, i64* %7
ret i64 %21
}

LLVM IR (-O2):
define i64 @serialize_bytes(i8* %0, i8* %1, i64 returned %2) {
%4 = icmp eq i8* %0, null
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @memcpy(i8* %0, i8* %1, i64 %2)
br label %7
7: ; preds = %5, %3
ret i64 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fread(int /*<<< orphan*/ *, int, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ otfcc_endian_convert16(int /*<<< orphan*/);
uint16_t otfcc_get16u(FILE *file) {
  uint16_t tmp;
  fread(&tmp, 2, 1, file);
  return otfcc_endian_convert16(tmp);
}


x86 assembly (clang, -O0):
<otfcc_get16u>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
lea    -0xc(%rbp),%rdi
mov    $0x2,%esi
mov    $0x1,%edx
call   1030 <fread@plt>
mov    -0xc(%rbp),%edi
call   1040 <otfcc_endian_convert16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<otfcc_get16u>:
push   %rax
mov    %rdi,%rcx
lea    0x4(%rsp),%rdi
mov    $0x2,%esi
mov    $0x1,%edx
call   1030 <fread@plt>
mov    0x4(%rsp),%edi
pop    %rax
jmp    1040 <otfcc_endian_convert16@plt>

LLVM IR (-O0):
define i32 @otfcc_get16u(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @fread(i32* %3, i32 2, i32 1, i32* %4)
%6 = load i32, i32* %3
%7 = call i32 @otfcc_endian_convert16(i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @otfcc_get16u(i32* nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @fread(i32* %2, i32 2, i32 1, i32* %0)
%5 = load i32, i32* %2
%6 = tail call i32 @otfcc_endian_convert16(i32 %5)
ret i32 %6
}
/* Variables and functions */
int inreg(int, int);
int /*<<< orphan*/ outreg(int, int, int);
void serial_putc(int channel, int c) {
  int count;
  while (((inreg(channel, 0x05) & 0x20) == 0) && (count++ < 50000))
    ;
  outreg(channel, 0x00, c);
}


x86 assembly (clang, -O0):
<serial_putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x5,%esi
call   1040 <inreg@plt>
mov    %eax,%ecx
and    $0x20,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0xd(%rbp)
jne    1164 <serial_putc+0x44>
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0xc350,%eax
setl   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1174 <serial_putc+0x54>
jmp    1179 <serial_putc+0x59>
jmp    112e <serial_putc+0xe>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
xor    %esi,%esi
call   1030 <outreg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_putc>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %edi,%ebp
nopl   0x0(%rax)
mov    %ebp,%edi
mov    $0x5,%esi
call   1040 <inreg@plt>
test   $0x20,%al
jne    114d <serial_putc+0x2d>
lea    0x1(%rbx),%eax
cmp    $0xc350,%ebx
mov    %eax,%ebx
jl     1130 <serial_putc+0x10>
mov    %ebp,%edi
xor    %esi,%esi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <outreg@plt>

LLVM IR (-O0):
define void @serial_putc(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %3
%8 = call i32 @inreg(i32 %7, i32 5)
%9 = and i32 %8, 32
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %6
%12 = load i32, i32* %5
%13 = add nsw i32 %12, 1
store i32 %13, i32* %5
%14 = icmp slt i32 %12, 50000
br label %15
15: ; preds = %11, %6
%16 = phi i1 [ false, %6 ], [ %14, %11 ]
br i1 %16, label %17, label %18
17: ; preds = %15
br label %6
18: ; preds = %15
%19 = load i32, i32* %3
%20 = load i32, i32* %4
%21 = call i32 @outreg(i32 %19, i32 0, i32 %20)
ret void
}

LLVM IR (-O2):
define void @serial_putc(i32 %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ undef, %2 ], [ %8, %3 ]
%5 = tail call i32 @inreg(i32 %0, i32 5)
%6 = and i32 %5, 32
%7 = icmp eq i32 %6, 0
%8 = add nsw i32 %4, 1
%9 = icmp slt i32 %4, 50000
%10 = select i1 %7, i1 %9, i1 false
br i1 %10, label %3, label %11
11: ; preds = %3
%12 = tail call i32 @outreg(i32 %0, i32 0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage() {
  fprintf(stderr,
          "Razor [option]... \n"
          "-c|--config <config file>    Choose your config file. Default "
          "./razor.conf \n"
          "-h|--help                    Man page\n"
          "-v|--version                 Show Razor http server version\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [194 x i8] c"Razor [option]... \0A-c|--config <config file> Choose your config file. Default ./razor.conf \0A-h|--help Man page\0A-v|--version Show Razor http server version\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([194 x i8], [194 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [194 x i8] c"Razor [option]... \0A-c|--config <config file> Choose your config file. Default ./razor.conf \0A-h|--help Man page\0A-v|--version Show Razor http server version\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([194 x i8], [194 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ load_s15f16_(char const *, int, int);
double s15f16_to_d(int /*<<< orphan*/);
double load_s15f16(const char *icc, int length, int offset) {
  return s15f16_to_d(load_s15f16_(icc, length, offset));
}


x86 assembly (clang, -O0):
<load_s15f16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1040 <load_s15f16_@plt>
mov    %eax,%edi
call   1030 <s15f16_to_d@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_s15f16>:
push   %rax
call   1040 <load_s15f16_@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <s15f16_to_d@plt>

LLVM IR (-O0):
define double @load_s15f16(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @load_s15f16_(i8* %7, i32 %8, i32 %9)
%11 = call double @s15f16_to_d(i32 %10)
ret double %11
}

LLVM IR (-O2):
define double @load_s15f16(i8* %0, i32 %1, i32 %2) {
%4 = tail call i32 @load_s15f16_(i8* %0, i32 %1, i32 %2)
%5 = tail call double @s15f16_to_d(i32 %4)
ret double %5
}
int fstat(int fd, struct stat *st) {
  int rc;
  return rc;
}


x86 assembly (clang, -O0):
<fstat>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fstat>:
ret

LLVM IR (-O0):
%struct.stat = type opaque
define i32 @fstat(i32 %0, %struct.stat* %1) {
%3 = alloca i32
%4 = alloca %struct.stat*
%5 = alloca i32
store i32 %0, i32* %3
store %struct.stat* %1, %struct.stat** %4
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
%struct.stat = type opaque
define i32 @fstat(i32 %0, %struct.stat* nocapture readnone %1) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void Menu() {
  printf("  Menu Principal\n");
  printf("1 - Insere inicio\n");
  printf("2 - Insere ultimo\n");
  printf("3 - Retira\n");
  printf("4 - Sair\n");
  printf("\nOpcao: ");
}


x86 assembly (clang, -O0):
<Menu>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xeeb(%rip),%rdi
call   1030 <printf@plt>
lea    0xef2(%rip),%rdi
call   1030 <printf@plt>
lea    0xef9(%rip),%rdi
call   1030 <printf@plt>
lea    0xef9(%rip),%rdi
call   1030 <printf@plt>
lea    0xef7(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Menu>:
push   %rax
lea    0xee1(%rip),%rdi
call   1030 <puts@plt>
lea    0xee6(%rip),%rdi
call   1030 <puts@plt>
lea    0xeec(%rip),%rdi
call   1030 <puts@plt>
lea    0xef2(%rip),%rdi
call   1030 <puts@plt>
lea    0xef1(%rip),%rdi
call   1030 <puts@plt>
lea    0xe9c(%rip),%rdi
pop    %rax
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [18 x i8] c" Menu Principal\0A\00"
@.str.1 = [19 x i8] c"1 - Insere inicio\0A\00"
@.str.2 = [19 x i8] c"2 - Insere ultimo\0A\00"
@.str.3 = [12 x i8] c"3 - Retira\0A\00"
@.str.4 = [10 x i8] c"4 - Sair\0A\00"
@.str.5 = [9 x i8] c"\0AOpcao: \00"
define void @Menu() {
%1 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.3, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.4, i64 0, i64 0))
%6 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.5, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str.5 = [9 x i8] c"\0AOpcao: \00"
@str = [17 x i8] c" Menu Principal\00"
@str.6 = [18 x i8] c"1 - Insere inicio\00"
@str.7 = [18 x i8] c"2 - Insere ultimo\00"
@str.8 = [11 x i8] c"3 - Retira\00"
@str.9 = [9 x i8] c"4 - Sair\00"
define void @Menu() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str.6, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str.7, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str.8, i64 0, i64 0))
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str.9, i64 0, i64 0))
%6 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str.5, i64 0, i64 0))
ret void
}
int wiringXSupported(void) { return -1; }


x86 assembly (clang, -O0):
<wiringXSupported>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wiringXSupported>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @wiringXSupported() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @wiringXSupported() {
ret i32 -1
}
/* Type definitions */
struct timeval {
  scalar_t__ tv_usec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
scalar_t__ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
double potency_get_time() {
  struct timeval tv;
  if (gettimeofday(&tv, NULL)) {
    return 0;
  }
  return (double)tv.tv_sec + ((double)tv.tv_usec * 1.0e-6);
}


x86 assembly (clang, -O0):
<potency_get_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x18(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
cmp    $0x0,%rax
je     113c <potency_get_time+0x2c>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    115d <potency_get_time+0x4d>
cvtsi2sdq -0x10(%rbp),%xmm1
cvtsi2sdq -0x18(%rbp),%xmm0
movsd  0xeb0(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<potency_get_time>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
test   %rax,%rax
je     112d <potency_get_time+0x1d>
xorps  %xmm0,%xmm0
add    $0x18,%rsp
ret
cvtsi2sdq 0x10(%rsp),%xmm1
cvtsi2sdq 0x8(%rsp),%xmm0
mulsd  0xebd(%rip),%xmm0
addsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { i64, i64 }
define double @potency_get_time() {
%1 = alloca double
%2 = alloca %struct.timeval
%3 = call i64 @gettimeofday(%struct.timeval* %2, i32* null)
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %0
store double 0.000000e+00, double* %1
br label %14
6: ; preds = %0
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i32 0, i32 1
%8 = load i64, i64* %7
%9 = sitofp i64 %8 to double
%10 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i32 0, i32 0
%11 = load i64, i64* %10
%12 = sitofp i64 %11 to double
%13 = call double @llvm.fmuladd.f64(double %12, double 0x3EB0C6F7A0B5ED8D, double %9)
store double %13, double* %1
br label %14
14: ; preds = %6, %5
%15 = load double, double* %1
ret double %15
}

LLVM IR (-O2):
%struct.timeval = type { i64, i64 }
define double @potency_get_time() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i64 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %13
5: ; preds = %0
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%7 = load i64, i64* %6
%8 = sitofp i64 %7 to double
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%10 = load i64, i64* %9
%11 = sitofp i64 %10 to double
%12 = tail call double @llvm.fmuladd.f64(double %11, double 0x3EB0C6F7A0B5ED8D, double %8)
br label %13
13: ; preds = %0, %5
%14 = phi double [ %12, %5 ], [ 0.000000e+00, %0 ]
ret double %14
}
void gtk_tree_row_reference_reordered() {}


x86 assembly (clang, -O0):
<gtk_tree_row_reference_reordered>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_row_reference_reordered>:
ret

LLVM IR (-O0):
define void @gtk_tree_row_reference_reordered() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_row_reference_reordered() {
ret void
}
/* Variables and functions */
scalar_t__ read(int /*<<< orphan*/, char *, int);
int inbyte() {
  char c;
  if (read(0, &c, 1) <= 0)
    return -1;
  return c;
}


x86 assembly (clang, -O0):
<inbyte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
lea    -0x5(%rbp),%rsi
mov    $0x1,%edx
call   1030 <read@plt>
cmp    $0x0,%rax
jg     113e <inbyte+0x2e>
movl   $0xffffffff,-0x4(%rbp)
jmp    1145 <inbyte+0x35>
movsbl -0x5(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inbyte>:
push   %rax
lea    0x7(%rsp),%rsi
xor    %edi,%edi
mov    $0x1,%edx
call   1030 <read@plt>
test   %rax,%rax
movsbl 0x7(%rsp),%ecx
mov    $0xffffffff,%eax
cmovg  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @inbyte() {
%1 = alloca i32
%2 = alloca i8
%3 = call i64 @read(i32 0, i8* %2, i32 1)
%4 = icmp sle i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %0
store i32 -1, i32* %1
br label %9
6: ; preds = %0
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
store i32 %8, i32* %1
br label %9
9: ; preds = %6, %5
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
define i32 @inbyte() {
%1 = alloca i8
%2 = call i64 @read(i32 0, i8* %1, i32 1)
%3 = icmp slt i64 %2, 1
%4 = load i8, i8* %1
%5 = sext i8 %4 to i32
%6 = select i1 %3, i32 -1, i32 %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void func_typedef(int x) { printf("typedef'd enum: %d\n", x); }


x86 assembly (clang, -O0):
<func_typedef>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_typedef>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"typedef'd enum: %d\0A\00"
define void @func_typedef(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [20 x i8] c"typedef'd enum: %d\0A\00"
define void @func_typedef(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ verbose(char *, char const *);
void notify(const char *errinfo, const void *private_info, size_t cb,
            void *user_data) {
  verbose("%s", errinfo);
}


x86 assembly (clang, -O0):
<notify>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xecd(%rip),%rdi
call   1030 <verbose@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<notify>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <verbose@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @notify(i8* %0, i8* %1, i64 %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i8* %3, i8** %8
%9 = load i8*, i8** %5
%10 = call i32 @verbose(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %9)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @notify(i8* %0, i8* nocapture readnone %1, i64 %2, i8* nocapture readnone %3) {
%5 = tail call i32 @verbose(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
scalar_t__ malloc(long);
unsigned char *createBitVector(long int vectorSize) {
  unsigned char *vector =
      (unsigned char *)malloc(vectorSize * sizeof(unsigned char));
  for (long int i = 0; i < vectorSize; i++) {
    vector[i] = 0;
  }
  return vector;
}


x86 assembly (clang, -O0):
<createBitVector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
shl    $0x0,%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x8(%rbp),%rax
jge    1160 <createBitVector+0x50>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1135 <createBitVector+0x25>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<createBitVector>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <malloc@plt>
mov    %rax,%r14
test   %rbx,%rbx
jle    1141 <createBitVector+0x21>
mov    %r14,%rdi
xor    %esi,%esi
mov    %rbx,%rdx
call   1030 <memset@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @createBitVector(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
%4 = alloca i64
store i64 %0, i64* %2
%5 = load i64, i64* %2
%6 = mul i64 %5, 1
%7 = call i64 @malloc(i64 %6)
%8 = inttoptr i64 %7 to i8*
store i8* %8, i8** %3
store i64 0, i64* %4
br label %9
9: ; preds = %17, %1
%10 = load i64, i64* %4
%11 = load i64, i64* %2
%12 = icmp slt i64 %10, %11
br i1 %12, label %13, label %20
13: ; preds = %9
%14 = load i8*, i8** %3
%15 = load i64, i64* %4
%16 = getelementptr inbounds i8, i8* %14, i64 %15
store i8 0, i8* %16
br label %17
17: ; preds = %13
%18 = load i64, i64* %4
%19 = add nsw i64 %18, 1
store i64 %19, i64* %4
br label %9
20: ; preds = %9
%21 = load i8*, i8** %3
ret i8* %21
}

LLVM IR (-O2):
define i8* @createBitVector(i64 %0) {
%2 = tail call i64 @malloc(i64 %0)
%3 = inttoptr i64 %2 to i8*
%4 = icmp sgt i64 %0, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %6
6: ; preds = %5, %1
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ cpu_init();
int /*<<< orphan*/ debug_init();
int /*<<< orphan*/ mem_init();
int /*<<< orphan*/ rom_init();
int /*<<< orphan*/ timer_init();
void dmg_init() {
  debug_init();
  timer_init();
  rom_init();
  mem_init();
  cpu_init();
}


x86 assembly (clang, -O0):
<dmg_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <debug_init@plt>
mov    $0x0,%al
call   1060 <timer_init@plt>
mov    $0x0,%al
call   1070 <rom_init@plt>
mov    $0x0,%al
call   1040 <mem_init@plt>
mov    $0x0,%al
call   1050 <cpu_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dmg_init>:
push   %rax
xor    %eax,%eax
call   1030 <debug_init@plt>
xor    %eax,%eax
call   1060 <timer_init@plt>
xor    %eax,%eax
call   1070 <rom_init@plt>
xor    %eax,%eax
call   1040 <mem_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <cpu_init@plt>

LLVM IR (-O0):
define void @dmg_init() {
%1 = call i32 (...) @debug_init()
%2 = call i32 (...) @timer_init()
%3 = call i32 (...) @rom_init()
%4 = call i32 (...) @mem_init()
%5 = call i32 (...) @cpu_init()
ret void
}

LLVM IR (-O2):
define void @dmg_init() {
%1 = tail call i32 (...) @debug_init()
%2 = tail call i32 (...) @timer_init()
%3 = tail call i32 (...) @rom_init()
%4 = tail call i32 (...) @mem_init()
%5 = tail call i32 (...) @cpu_init()
ret void
}