xunge/DecIR huggingface dataset:
float filter_lowPassFilter(float currentValue, float previousValue,
                           float alpha) {
  return ((alpha * currentValue) + ((1.0 - alpha) * previousValue));
}


x86 assembly (clang, -O0):
<filter_lowPassFilter>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movss  -0xc(%rbp),%xmm0
cvtss2sd %xmm0,%xmm2
movsd  0xece(%rip),%xmm0
subsd  %xmm2,%xmm0
movss  -0x8(%rbp),%xmm2
cvtss2sd %xmm2,%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<filter_lowPassFilter>:
mulss  %xmm2,%xmm0
cvtss2sd %xmm0,%xmm0
cvtss2sd %xmm2,%xmm2
movsd  0xeec(%rip),%xmm3
subsd  %xmm2,%xmm3
cvtss2sd %xmm1,%xmm1
mulsd  %xmm3,%xmm1
addsd  %xmm0,%xmm1
xorps  %xmm0,%xmm0
cvtsd2ss %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @filter_lowPassFilter(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %6
%8 = load float, float* %4
%9 = fmul float %7, %8
%10 = fpext float %9 to double
%11 = load float, float* %6
%12 = fpext float %11 to double
%13 = fsub double 1.000000e+00, %12
%14 = load float, float* %5
%15 = fpext float %14 to double
%16 = call double @llvm.fmuladd.f64(double %13, double %15, double %10)
%17 = fptrunc double %16 to float
ret float %17
}

LLVM IR (-O2):
define float @filter_lowPassFilter(float %0, float %1, float %2) {
%4 = fmul float %0, %2
%5 = fpext float %4 to double
%6 = fpext float %2 to double
%7 = fsub double 1.000000e+00, %6
%8 = fpext float %1 to double
%9 = tail call double @llvm.fmuladd.f64(double %7, double %8, double %5)
%10 = fptrunc double %9 to float
ret float %10
}
/* Type definitions */
struct timespec {
  scalar_t__ tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
void timespec_diff(struct timespec *diff, struct timespec *a,
                   struct timespec *b) {
  diff->tv_sec = a->tv_sec - b->tv_sec;
  diff->tv_nsec = a->tv_nsec - b->tv_nsec;
}


x86 assembly (clang, -O0):
<timespec_diff>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rcx
mov    -0x18(%rbp),%rax
sub    0x8(%rax),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x8(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
mov    -0x18(%rbp),%rax
sub    (%rax),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<timespec_diff>:
movdqu (%rsi),%xmm0
movdqu (%rdx),%xmm1
psubq  %xmm1,%xmm0
movdqu %xmm0,(%rdi)
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
define void @timespec_diff(%struct.timespec* %0, %struct.timespec* %1, %struct.timespec* %2) {
%4 = alloca %struct.timespec*
%5 = alloca %struct.timespec*
%6 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %4
store %struct.timespec* %1, %struct.timespec** %5
store %struct.timespec* %2, %struct.timespec** %6
%7 = load %struct.timespec*, %struct.timespec** %5
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %7, i32 0, i32 1
%9 = load i64, i64* %8
%10 = load %struct.timespec*, %struct.timespec** %6
%11 = getelementptr inbounds %struct.timespec, %struct.timespec* %10, i32 0, i32 1
%12 = load i64, i64* %11
%13 = sub nsw i64 %9, %12
%14 = load %struct.timespec*, %struct.timespec** %4
%15 = getelementptr inbounds %struct.timespec, %struct.timespec* %14, i32 0, i32 1
store i64 %13, i64* %15
%16 = load %struct.timespec*, %struct.timespec** %5
%17 = getelementptr inbounds %struct.timespec, %struct.timespec* %16, i32 0, i32 0
%18 = load i64, i64* %17
%19 = load %struct.timespec*, %struct.timespec** %6
%20 = getelementptr inbounds %struct.timespec, %struct.timespec* %19, i32 0, i32 0
%21 = load i64, i64* %20
%22 = sub nsw i64 %18, %21
%23 = load %struct.timespec*, %struct.timespec** %4
%24 = getelementptr inbounds %struct.timespec, %struct.timespec* %23, i32 0, i32 0
store i64 %22, i64* %24
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i64, i64 }
define void @timespec_diff(%struct.timespec* nocapture writeonly %0, %struct.timespec* nocapture %1, %struct.timespec* nocapture %2) {
%4 = bitcast %struct.timespec* %1 to <2 x i64>*
%5 = load <2 x i64>, <2 x i64>* %4
%6 = bitcast %struct.timespec* %2 to <2 x i64>*
%7 = load <2 x i64>, <2 x i64>* %6
%8 = sub nsw <2 x i64> %5, %7
%9 = bitcast %struct.timespec* %0 to <2 x i64>*
store <2 x i64> %8, <2 x i64>* %9
ret void
}
/* Variables and functions */
int strcmp(char *, char *);
int strlen(char *);
int strcmptail(char *s1, char *s2) {
  int len_s1, len_s2;
  int start;
  len_s1 = strlen(s1);
  len_s2 = strlen(s2);
  start = (len_s1 < len_s2) ? 0 : (len_s1 - len_s2);
  return strcmp(s1 + start, s2);
}


x86 assembly (clang, -O0):
<strcmptail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    115e <strcmptail+0x3e>
xor    %eax,%eax
mov    %eax,-0x20(%rbp)
jmp    1167 <strcmptail+0x47>
mov    -0x14(%rbp),%eax
sub    -0x18(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
movslq -0x1c(%rbp),%rax
add    %rax,%rdi
mov    -0x10(%rbp),%rsi
call   1040 <strcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmptail>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1030 <strlen@plt>
mov    %eax,%ebx
mov    %r14,%rdi
call   1030 <strlen@plt>
xor    %ecx,%ecx
sub    %eax,%ebx
cmovl  %ecx,%ebx
add    %r15,%rbx
mov    %rbx,%rdi
mov    %r14,%rsi
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <strcmp@plt>

LLVM IR (-O0):
define i32 @strcmptail(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%8 = load i8*, i8** %3
%9 = call i32 @strlen(i8* %8)
store i32 %9, i32* %5
%10 = load i8*, i8** %4
%11 = call i32 @strlen(i8* %10)
store i32 %11, i32* %6
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = icmp slt i32 %12, %13
br i1 %14, label %15, label %16
15: ; preds = %2
br label %20
16: ; preds = %2
%17 = load i32, i32* %5
%18 = load i32, i32* %6
%19 = sub nsw i32 %17, %18
br label %20
20: ; preds = %16, %15
%21 = phi i32 [ 0, %15 ], [ %19, %16 ]
store i32 %21, i32* %7
%22 = load i8*, i8** %3
%23 = load i32, i32* %7
%24 = sext i32 %23 to i64
%25 = getelementptr inbounds i8, i8* %22, i64 %24
%26 = load i8*, i8** %4
%27 = call i32 @strcmp(i8* %25, i8* %26)
ret i32 %27
}

LLVM IR (-O2):
define i32 @strcmptail(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = tail call i32 @strlen(i8* %1)
%5 = icmp slt i32 %3, %4
%6 = sub nsw i32 %3, %4
%7 = select i1 %5, i32 0, i32 %6
%8 = zext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = tail call i32 @strcmp(i8* dereferenceable(1) %9, i8* dereferenceable(1) %1)
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ putc(unsigned int, int /*<<< orphan*/ *);
void _zip_write4(unsigned int i, FILE *fp) {
  putc(i & 0xff, fp);
  putc((i >> 8) & 0xff, fp);
  putc((i >> 16) & 0xff, fp);
  putc((i >> 24) & 0xff, fp);
  return;
}


x86 assembly (clang, -O0):
<_zip_write4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
and    $0xff,%edi
mov    -0x10(%rbp),%rsi
call   1030 <putc@plt>
mov    -0x4(%rbp),%edi
shr    $0x8,%edi
and    $0xff,%edi
mov    -0x10(%rbp),%rsi
call   1030 <putc@plt>
mov    -0x4(%rbp),%edi
shr    $0x10,%edi
and    $0xff,%edi
mov    -0x10(%rbp),%rsi
call   1030 <putc@plt>
mov    -0x4(%rbp),%edi
shr    $0x18,%edi
and    $0xff,%edi
mov    -0x10(%rbp),%rsi
call   1030 <putc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_zip_write4>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %edi,%ebx
movzbl %bl,%edi
call   1030 <putc@plt>
movzbl %bh,%edi
mov    %r14,%rsi
call   1030 <putc@plt>
mov    %ebx,%eax
shr    $0x10,%eax
movzbl %al,%edi
mov    %r14,%rsi
call   1030 <putc@plt>
shr    $0x18,%ebx
mov    %ebx,%edi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <putc@plt>

LLVM IR (-O0):
define void @_zip_write4(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = and i32 %5, 255
%7 = load i32*, i32** %4
%8 = call i32 @putc(i32 %6, i32* %7)
%9 = load i32, i32* %3
%10 = lshr i32 %9, 8
%11 = and i32 %10, 255
%12 = load i32*, i32** %4
%13 = call i32 @putc(i32 %11, i32* %12)
%14 = load i32, i32* %3
%15 = lshr i32 %14, 16
%16 = and i32 %15, 255
%17 = load i32*, i32** %4
%18 = call i32 @putc(i32 %16, i32* %17)
%19 = load i32, i32* %3
%20 = lshr i32 %19, 24
%21 = and i32 %20, 255
%22 = load i32*, i32** %4
%23 = call i32 @putc(i32 %21, i32* %22)
ret void
}

LLVM IR (-O2):
define void @_zip_write4(i32 %0, i32* nocapture %1) {
%3 = and i32 %0, 255
%4 = tail call i32 @putc(i32 %3, i32* %1)
%5 = lshr i32 %0, 8
%6 = and i32 %5, 255
%7 = tail call i32 @putc(i32 %6, i32* %1)
%8 = lshr i32 %0, 16
%9 = and i32 %8, 255
%10 = tail call i32 @putc(i32 %9, i32* %1)
%11 = lshr i32 %0, 24
%12 = tail call i32 @putc(i32 %11, i32* %1)
ret void
}
int frob(void) { return 0x12345678; }


x86 assembly (clang, -O0):
<frob>:
push   %rbp
mov    %rsp,%rbp
mov    $0x12345678,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<frob>:
mov    $0x12345678,%eax
ret

LLVM IR (-O0):
define i32 @frob() {
ret i32 305419896
}

LLVM IR (-O2):
define i32 @frob() {
ret i32 305419896
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int producto(int, int);
int main(void) {
  printf("%i ", producto(7, 3));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x7,%edi
mov    $0x3,%esi
call   1040 <producto@plt>
mov    %eax,%esi
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x7,%edi
mov    $0x3,%esi
call   1040 <producto@plt>
lea    0xec9(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%i \00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @producto(i32 7, i32 3)
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%i \00"
define i32 @main() {
%1 = tail call i32 @producto(i32 7, i32 3)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
int byte_on_index(unsigned char *id, int index) {
  return (id[index / 8] >> (7 - (index % 8)) & 1);
}


x86 assembly (clang, -O0):
<byte_on_index>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
movzbl (%rax,%rcx,1),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    -0x10(%rbp),%eax
mov    $0x7,%ecx
sub    %edx,%ecx
sar    %cl,%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<byte_on_index>:
lea    0x7(%rsi),%ecx
test   %esi,%esi
cmovns %esi,%ecx
mov    %ecx,%eax
sar    $0x3,%eax
cltq
movzbl (%rdi,%rax,1),%eax
and    $0xfffffff8,%ecx
sub    %ecx,%esi
mov    $0x7,%cl
sub    %sil,%cl
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @byte_on_index(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = sdiv i32 %6, 8
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %5, i64 %8
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i32, i32* %4
%13 = srem i32 %12, 8
%14 = sub nsw i32 7, %13
%15 = ashr i32 %11, %14
%16 = and i32 %15, 1
ret i32 %16
}

LLVM IR (-O2):
define i32 @byte_on_index(i8* nocapture %0, i32 %1) {
%3 = sdiv i32 %1, 8
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = srem i32 %1, 8
%9 = sub nsw i32 7, %8
%10 = lshr i32 %7, %9
%11 = and i32 %10, 1
ret i32 %11
}
void wifi_evt_hardware_external_interrupt(
    const struct wifi_msg_hardware_external_interrupt_evt_t *msg) {}


x86 assembly (clang, -O0):
<wifi_evt_hardware_external_interrupt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifi_evt_hardware_external_interrupt>:
ret

LLVM IR (-O0):
%struct.wifi_msg_hardware_external_interrupt_evt_t = type opaque
define void @wifi_evt_hardware_external_interrupt(%struct.wifi_msg_hardware_external_interrupt_evt_t* %0) {
%2 = alloca %struct.wifi_msg_hardware_external_interrupt_evt_t*
store %struct.wifi_msg_hardware_external_interrupt_evt_t* %0, %struct.wifi_msg_hardware_external_interrupt_evt_t** %2
ret void
}

LLVM IR (-O2):
%struct.wifi_msg_hardware_external_interrupt_evt_t = type opaque
define void @wifi_evt_hardware_external_interrupt(%struct.wifi_msg_hardware_external_interrupt_evt_t* nocapture %0) {
ret void
}
/* Variables and functions */
float __infer_nondet_float();
float log1pf(float x) { return __infer_nondet_float(); }


x86 assembly (clang, -O0):
<log1pf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_float@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log1pf>:
xor    %eax,%eax
jmp    1030 <__infer_nondet_float@plt>

LLVM IR (-O0):
define float @log1pf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = call float (...) @__infer_nondet_float()
ret float %3
}

LLVM IR (-O2):
define float @log1pf(float %0) {
%2 = tail call float (...) @__infer_nondet_float()
ret float %2
}
/* Variables and functions */
int **malloc(int);
int (*f1(void))[5] {
  int(*p)[5];
  p = malloc(sizeof(int) * 5);
  (*p)[3] = 1234;
  return p;
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x14,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x4d2,0xc(%rax)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
push   %rax
mov    $0x14,%edi
call   1030 <malloc@plt>
movl   $0x4d2,0xc(%rax)
pop    %rcx
ret

LLVM IR (-O0):
define [5 x i32]* @f1() {
%1 = alloca [5 x i32]*
%2 = call i32** @malloc(i32 20)
%3 = bitcast i32** %2 to [5 x i32]*
store [5 x i32]* %3, [5 x i32]** %1
%4 = load [5 x i32]*, [5 x i32]** %1
%5 = getelementptr inbounds [5 x i32], [5 x i32]* %4, i64 0, i64 3
store i32 1234, i32* %5
%6 = load [5 x i32]*, [5 x i32]** %1
ret [5 x i32]* %6
}

LLVM IR (-O2):
define noalias [5 x i32]* @f1() {
%1 = tail call i32** @malloc(i32 20)
%2 = bitcast i32** %1 to [5 x i32]*
%3 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 3
store i32 1234, i32* %3
ret [5 x i32]* %2
}
/* Variables and functions */
int /*<<< orphan*/ nop();
void bar(int i) {
  switch (i)
    ;
  switch (i) {}
  switch (i)
    nop();
  switch (i)
  case 1:
    nop();
  switch (i) {
    nop();
  case 1:
    nop();
  }
  nop();
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
jne    1133 <bar+0x23>
jmp    112c <bar+0x1c>
mov    $0x0,%al
call   1030 <nop@plt>
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
jne    114b <bar+0x3b>
jmp    1144 <bar+0x34>
mov    $0x0,%al
call   1030 <nop@plt>
mov    $0x0,%al
call   1030 <nop@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
cmp    $0x1,%edi
jne    1128 <bar+0x18>
push   %rax
xor    %eax,%eax
call   1030 <nop@plt>
xor    %eax,%eax
call   1030 <nop@plt>
add    $0x8,%rsp
xor    %eax,%eax
jmp    1030 <nop@plt>

LLVM IR (-O0):
define void @bar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
switch i32 %3, label %4 [
]
4: ; preds = %1
%5 = load i32, i32* %2
switch i32 %5, label %6 [
]
6: ; preds = %4
%7 = load i32, i32* %2
switch i32 %7, label %8 [
]
8: ; preds = %6
%9 = load i32, i32* %2
switch i32 %9, label %12 [
i32 1, label %10
]
10: ; preds = %8
%11 = call i32 (...) @nop()
br label %12
12: ; preds = %10, %8
%13 = load i32, i32* %2
switch i32 %13, label %16 [
i32 1, label %14
]
14: ; preds = %12
%15 = call i32 (...) @nop()
br label %16
16: ; preds = %14, %12
%17 = call i32 (...) @nop()
ret void
}

LLVM IR (-O2):
define void @bar(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = tail call i32 (...) @nop()
%5 = tail call i32 (...) @nop()
br label %6
6: ; preds = %1, %3
%7 = tail call i32 (...) @nop()
ret void
}
void RTDbgModLineByAddrA(void) {}


x86 assembly (clang, -O0):
<RTDbgModLineByAddrA>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTDbgModLineByAddrA>:
ret

LLVM IR (-O0):
define void @RTDbgModLineByAddrA() {
ret void
}

LLVM IR (-O2):
define void @RTDbgModLineByAddrA() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ cio_error(char *, char const *, ...);
int /*<<< orphan*/ strerror(int);
void __attribute__((noreturn)) cio_abort(const char *message, int error) {
  if (error)
    cio_error("%s: %s", message, strerror(error));
  else
    cio_error("%s", message);
  abort();
}


x86 assembly (clang, -O0):
<cio_abort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1172 <cio_abort+0x42>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%edi
call   1050 <strerror@plt>
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
lea    0xe9a(%rip),%rdi
mov    $0x0,%al
call   1040 <cio_error@plt>
jmp    1184 <cio_abort+0x54>
mov    -0x8(%rbp),%rsi
lea    0xe87(%rip),%rdi
mov    $0x0,%al
call   1040 <cio_error@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<cio_abort>:
push   %rbx
mov    %rdi,%rbx
test   %esi,%esi
jne    1150 <cio_abort+0x20>
lea    0xec5(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1040 <cio_error@plt>
xor    %eax,%eax
call   1030 <abort@plt>
mov    %esi,%edi
call   1050 <strerror@plt>
lea    0xea2(%rip),%rdi
mov    %rbx,%rsi
mov    %eax,%edx
xor    %eax,%eax
call   1040 <cio_error@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"%s: %s\00"
@.str.1 = [3 x i8] c"%s\00"
define void @cio_abort(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %2
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = call i32 @strerror(i32 %9)
%11 = call i32 (i8*, i8*, ...) @cio_error(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %8, i32 %10)
br label %15
12: ; preds = %2
%13 = load i8*, i8** %3
%14 = call i32 (i8*, i8*, ...) @cio_error(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %13)
br label %15
15: ; preds = %12, %7
%16 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@.str = [7 x i8] c"%s: %s\00"
@.str.1 = [3 x i8] c"%s\00"
define void @cio_abort(i8* %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = tail call i32 @strerror(i32 %1)
%6 = tail call i32 (i8*, i8*, ...) @cio_error(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %5)
br label %9
7: ; preds = %2
%8 = tail call i32 (i8*, i8*, ...) @cio_error(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %0)
br label %9
9: ; preds = %7, %4
%10 = tail call i32 (...) @abort()
unreachable
}
int test_imm_C0uint8_reg(unsigned char val) {
  return ((val) & (-0xC0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C0uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffff40,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C0uint8_reg>:
test   $0x40,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C0uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -192
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C0uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 64
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_VALUE;
typedef int /*<<< orphan*/ ASN1_IA5STRING;

/* Variables and functions */
int /*<<< orphan*/ ASN1_IA5STRING_it;
int ASN1_item_i2d(int /*<<< orphan*/ *, unsigned char **, int /*<<< orphan*/ *);
int i2d_ASN1_IA5STRING(ASN1_IA5STRING *a, unsigned char **out) {
  return ASN1_item_i2d((ASN1_VALUE *)a, out, &ASN1_IA5STRING_it);
}


x86 assembly (clang, -O0):
<i2d_ASN1_IA5STRING>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2ea9(%rip),%rdx
call   1030 <ASN1_item_i2d@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_ASN1_IA5STRING>:
mov    0x2ec1(%rip),%rdx
jmp    1030 <ASN1_item_i2d@plt>

LLVM IR (-O0):
@ASN1_IA5STRING_it = global i32 0
define i32 @i2d_ASN1_IA5STRING(i32* %0, i8** %1) {
%3 = alloca i32*
%4 = alloca i8**
store i32* %0, i32** %3
store i8** %1, i8*** %4
%5 = load i32*, i32** %3
%6 = load i8**, i8*** %4
%7 = call i32 @ASN1_item_i2d(i32* %5, i8** %6, i32* @ASN1_IA5STRING_it)
ret i32 %7
}

LLVM IR (-O2):
@ASN1_IA5STRING_it = global i32 0
define i32 @i2d_ASN1_IA5STRING(i32* %0, i8** %1) {
%3 = tail call i32 @ASN1_item_i2d(i32* %0, i8** %1, i32* @ASN1_IA5STRING_it)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ output_line(char *);
void trailer(void) { output_line(";\t.end"); }


x86 assembly (clang, -O0):
<trailer>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <output_line@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<trailer>:
lea    0xee9(%rip),%rdi
jmp    1030 <output_line@plt>

LLVM IR (-O0):
@.str = [7 x i8] c";\09.end\00"
define void @trailer() {
%1 = call i32 @output_line(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c";\09.end\00"
define void @trailer() {
%1 = tail call i32 @output_line(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
int iptcb_get_number(const struct ipt_entry *i, const struct ipt_entry *seek,
                     unsigned int *pos) {
  if (i == seek)
    return 1;
  (*pos)++;
  return 0;
}


x86 assembly (clang, -O0):
<iptcb_get_number>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jne    112a <iptcb_get_number+0x2a>
movl   $0x1,-0x4(%rbp)
jmp    113c <iptcb_get_number+0x3c>
mov    -0x20(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iptcb_get_number>:
cmp    %rsi,%rdi
je     110b <iptcb_get_number+0xb>
addl   $0x1,(%rdx)
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.ipt_entry = type opaque
define i32 @iptcb_get_number(%struct.ipt_entry* %0, %struct.ipt_entry* %1, i32* %2) {
%4 = alloca i32
%5 = alloca %struct.ipt_entry*
%6 = alloca %struct.ipt_entry*
%7 = alloca i32*
store %struct.ipt_entry* %0, %struct.ipt_entry** %5
store %struct.ipt_entry* %1, %struct.ipt_entry** %6
store i32* %2, i32** %7
%8 = load %struct.ipt_entry*, %struct.ipt_entry** %5
%9 = load %struct.ipt_entry*, %struct.ipt_entry** %6
%10 = icmp eq %struct.ipt_entry* %8, %9
br i1 %10, label %11, label %12
11: ; preds = %3
store i32 1, i32* %4
br label %16
12: ; preds = %3
%13 = load i32*, i32** %7
%14 = load i32, i32* %13
%15 = add i32 %14, 1
store i32 %15, i32* %13
store i32 0, i32* %4
br label %16
16: ; preds = %12, %11
%17 = load i32, i32* %4
ret i32 %17
}

LLVM IR (-O2):
%struct.ipt_entry = type opaque
define i32 @iptcb_get_number(%struct.ipt_entry* readnone %0, %struct.ipt_entry* readnone %1, i32* nocapture %2) {
%4 = icmp eq %struct.ipt_entry* %0, %1
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = load i32, i32* %2
%7 = add i32 %6, 1
store i32 %7, i32* %2
br label %8
8: ; preds = %3, %5
%9 = phi i32 [ 0, %5 ], [ 1, %3 ]
ret i32 %9
}
int HelpItem20(void) { return 0; }


x86 assembly (clang, -O0):
<HelpItem20>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelpItem20>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HelpItem20() {
ret i32 0
}

LLVM IR (-O2):
define i32 @HelpItem20() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int main(int argc, char **argv) {
  fprintf(stderr, "WARNING: runbench not implemented for platform yet\n");
  return 77;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
lea    0xeca(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x4d,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x4d,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [52 x i8] c"WARNING: runbench not implemented for platform yet\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* @stderr
%7 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str, i64 0, i64 0))
ret i32 77
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [52 x i8] c"WARNING: runbench not implemented for platform yet\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str, i64 0, i64 0))
ret i32 77
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct string_t {
  int dummy;
};

/* Variables and functions */
void string_cat_uint32(struct string_t *string, uint32_t val) {}


x86 assembly (clang, -O0):
<string_cat_uint32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_cat_uint32>:
ret

LLVM IR (-O0):
%struct.string_t = type { i32 }
define void @string_cat_uint32(%struct.string_t* %0, i32 %1) {
%3 = alloca %struct.string_t*
%4 = alloca i32
store %struct.string_t* %0, %struct.string_t** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.string_t = type { i32 }
define void @string_cat_uint32(%struct.string_t* nocapture %0, i32 %1) {
ret void
}
/* Type definitions */
struct perf_event_attr {
  int dummy;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ __NR_perf_event_open;
int syscall(int /*<<< orphan*/, struct perf_event_attr *, int /*<<< orphan*/,
            int, int, unsigned long);
long perf_event_open(struct perf_event_attr *hw_event, pid_t pid, int cpu,
                     int group_fd, unsigned long flags) {
  int ret;
  ret = syscall(__NR_perf_event_open, hw_event, pid, cpu, group_fd, flags);
  return ret;
}


x86 assembly (clang, -O0):
<perf_event_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    -0x20(%rbp),%r9
call   1030 <syscall@plt>
mov    %eax,-0x24(%rbp)
movslq -0x24(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perf_event_open>:
push   %rax
mov    %r8,%r9
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2ebb(%rip),%rax
mov    (%rax),%edi
call   1030 <syscall@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
%struct.perf_event_attr = type { i32 }
@__NR_perf_event_open = global i32 0
define i64 @perf_event_open(%struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4) {
%6 = alloca %struct.perf_event_attr*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i64
%11 = alloca i32
store %struct.perf_event_attr* %0, %struct.perf_event_attr** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i64 %4, i64* %10
%12 = load i32, i32* @__NR_perf_event_open
%13 = load %struct.perf_event_attr*, %struct.perf_event_attr** %6
%14 = load i32, i32* %7
%15 = load i32, i32* %8
%16 = load i32, i32* %9
%17 = load i64, i64* %10
%18 = call i32 @syscall(i32 %12, %struct.perf_event_attr* %13, i32 %14, i32 %15, i32 %16, i64 %17)
store i32 %18, i32* %11
%19 = load i32, i32* %11
%20 = sext i32 %19 to i64
ret i64 %20
}

LLVM IR (-O2):
%struct.perf_event_attr = type { i32 }
@__NR_perf_event_open = global i32 0
define i64 @perf_event_open(%struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4) {
%6 = load i32, i32* @__NR_perf_event_open
%7 = tail call i32 @syscall(i32 %6, %struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4)
%8 = sext i32 %7 to i64
ret i64 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ mcp4725_set_raw_output(int /*<<< orphan*/, int, int);
void mcp4725_set_voltage(uint8_t addr, float vdd, float value, bool eeprom) {
  mcp4725_set_raw_output(addr, 0x0fff / vdd * value, eeprom);
}


x86 assembly (clang, -O0):
<mcp4725_set_voltage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
movss  0xecd(%rip),%xmm0
divss  -0x8(%rbp),%xmm0
mulss  -0xc(%rbp),%xmm0
cvttss2si %xmm0,%esi
mov    -0x10(%rbp),%edx
call   1030 <mcp4725_set_raw_output@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mcp4725_set_voltage>:
mov    %esi,%edx
movss  0xee6(%rip),%xmm2
divss  %xmm0,%xmm2
mulss  %xmm1,%xmm2
cvttss2si %xmm2,%esi
jmp    1030 <mcp4725_set_raw_output@plt>

LLVM IR (-O0):
define void @mcp4725_set_voltage(i32 %0, float %1, float %2, i32 %3) {
%5 = alloca i32
%6 = alloca float
%7 = alloca float
%8 = alloca i32
store i32 %0, i32* %5
store float %1, float* %6
store float %2, float* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load float, float* %6
%11 = fdiv float 4.095000e+03, %10
%12 = load float, float* %7
%13 = fmul float %11, %12
%14 = fptosi float %13 to i32
%15 = load i32, i32* %8
%16 = call i32 @mcp4725_set_raw_output(i32 %9, i32 %14, i32 %15)
ret void
}

LLVM IR (-O2):
define void @mcp4725_set_voltage(i32 %0, float %1, float %2, i32 %3) {
%5 = fdiv float 4.095000e+03, %1
%6 = fmul float %5, %2
%7 = fptosi float %6 to i32
%8 = tail call i32 @mcp4725_set_raw_output(i32 %0, i32 %7, i32 %3)
ret void
}
/* Variables and functions */
scalar_t__ is_char(char const);
char *__skip_char(const char *s) {
  while (is_char(*s))
    s++;
  return (char *)s;
}


x86 assembly (clang, -O0):
<__skip_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <is_char@plt>
cmp    $0x0,%rax
je     1143 <__skip_char+0x33>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <__skip_char+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__skip_char>:
push   %rbx
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rbx
nopl   0x0(%rax,%rax,1)
movsbl 0x1(%rbx),%edi
add    $0x1,%rbx
call   1030 <is_char@plt>
test   %rax,%rax
jne    1120 <__skip_char+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @__skip_char(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = call i64 @is_char(i8 signext %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
br label %3
11: ; preds = %3
%12 = load i8*, i8** %2
ret i8* %12
}

LLVM IR (-O2):
define i8* @__skip_char(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %7, %2 ]
%4 = load i8, i8* %3
%5 = tail call i64 @is_char(i8 signext %4)
%6 = icmp eq i64 %5, 0
%7 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i8* %3
}
const char *sqlite3ParserTokenName(int tokenType) { return ""; }


x86 assembly (clang, -O0):
<sqlite3ParserTokenName>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
lea    0xef2(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqlite3ParserTokenName>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @sqlite3ParserTokenName(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @sqlite3ParserTokenName(i32 %0) {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int __putc(int, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
int putchar(int c) { return __putc(c, stdout); }


x86 assembly (clang, -O0):
<putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
call   1030 <__putc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putchar>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <__putc@plt>

LLVM IR (-O0):
@stdout = global i32 0
define i32 @putchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @stdout
%5 = call i32 @__putc(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@stdout = global i32 0
define i32 @putchar(i32 %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @__putc(i32 %0, i32 %2)
ret i32 %3
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int key_click_percent;
};
typedef TYPE_1__ XKeyboardControl;

/* Variables and functions */
void set_XKeyboardControl_key_click_percent(void *_p, int _v) {
  ((XKeyboardControl *)_p)->key_click_percent = (int)_v;
}


x86 assembly (clang, -O0):
<set_XKeyboardControl_key_click_percent>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XKeyboardControl_key_click_percent>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XKeyboardControl_key_click_percent(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XKeyboardControl_key_click_percent(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
void COM_FixPath(char *pathname) {
  while (*pathname) {
    if (*pathname == '\\')
      *pathname = '/';
    pathname++;
  }
}


x86 assembly (clang, -O0):
<COM_FixPath>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     113d <COM_FixPath+0x3d>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x5c,%eax
jne    112c <COM_FixPath+0x2c>
mov    -0x8(%rbp),%rax
movb   $0x2f,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <COM_FixPath+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<COM_FixPath>:
jmp    1117 <COM_FixPath+0x17>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movb   $0x2f,(%rdi)
add    $0x1,%rdi
movzbl (%rdi),%eax
cmp    $0x5c,%al
je     1110 <COM_FixPath+0x10>
test   %al,%al
jne    1113 <COM_FixPath+0x13>
ret

LLVM IR (-O0):
define void @COM_FixPath(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %14, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %17
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 92
br i1 %11, label %12, label %14
12: ; preds = %7
%13 = load i8*, i8** %2
store i8 47, i8* %13
br label %14
14: ; preds = %12, %7
%15 = load i8*, i8** %2
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %2
br label %3
17: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @COM_FixPath(i8* nocapture %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i8* [ %0, %1 ], [ %7, %6 ]
%4 = load i8, i8* %3
switch i8 %4, label %6 [
i8 0, label %8
i8 92, label %5
]
5: ; preds = %2
store i8 47, i8* %3
br label %6
6: ; preds = %2, %5
%7 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
8: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
main() {
  unsigned char a = 0xff;
  char b = 0xff;
  int c = a == b;
  if (c)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movb   $0xff,-0x5(%rbp)
movb   $0xff,-0x6(%rbp)
movzbl -0x5(%rbp),%eax
movsbl -0x6(%rbp),%ecx
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     114d <main+0x3d>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i8
%4 = alloca i32
store i32 0, i32* %1
store i8 -1, i8* %2
store i8 -1, i8* %3
%5 = load i8, i8* %2
%6 = zext i8 %5 to i32
%7 = load i8, i8* %3
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %6, %8
%10 = zext i1 %9 to i32
store i32 %10, i32* %4
%11 = load i32, i32* %4
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %0
%14 = call i32 (...) @abort()
unreachable
15: ; preds = %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
unsigned int rand_rdrand(void) {
  unsigned int r;
  __asm__ __volatile__("1: rdrand %0\n"
                       "   jnc 1b"
                       : "=a"(r));
  return r;
}


x86 assembly (clang, -O0):
<rand_rdrand>:
push   %rbp
mov    %rsp,%rbp
rdrand %eax
jae    1104 <rand_rdrand+0x4>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_rdrand>:
rdrand %eax
jae    1100 <rand_rdrand>
ret

LLVM IR (-O0):
define i32 @rand_rdrand() {
%1 = alloca i32
%2 = call i32 asm sideeffect "1: rdrand $0\0A jnc 1b", "={ax},~{dirflag},~{fpsr},~{flags}"()
store i32 %2, i32* %1
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @rand_rdrand() {
%1 = tail call i32 asm sideeffect "1: rdrand $0\0A jnc 1b", "={ax},~{dirflag},~{fpsr},~{flags}"()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ realloc(int /*<<< orphan*/ *, int);
int main(void) {
  realloc(NULL, 42);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,%edi
mov    $0x2a,%esi
call   1030 <realloc@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
mov    $0x2a,%esi
call   1030 <realloc@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @realloc(i32* null, i32 42)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @realloc(i32* null, i32 42)
ret i32 0
}
const char *ver_sendFd() { return "sendFd3"; }


x86 assembly (clang, -O0):
<ver_sendFd>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ver_sendFd>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [8 x i8] c"sendFd3\00"
define i8* @ver_sendFd() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [8 x i8] c"sendFd3\00"
define i8* @ver_sendFd() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct link {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ list_insert(struct link *, struct link *);
void list_insert_front(struct link *__restrict list, struct link *link) {
  list_insert(list, link);
}


x86 assembly (clang, -O0):
<list_insert_front>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <list_insert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_insert_front>:
jmp    1030 <list_insert@plt>

LLVM IR (-O0):
%struct.link = type { i32 }
define void @list_insert_front(%struct.link* noalias %0, %struct.link* %1) {
%3 = alloca %struct.link*
%4 = alloca %struct.link*
store %struct.link* %0, %struct.link** %3
store %struct.link* %1, %struct.link** %4
%5 = load %struct.link*, %struct.link** %3
%6 = load %struct.link*, %struct.link** %4
%7 = call i32 @list_insert(%struct.link* %5, %struct.link* %6)
ret void
}

LLVM IR (-O2):
%struct.link = type { i32 }
define void @list_insert_front(%struct.link* noalias %0, %struct.link* %1) {
%3 = tail call i32 @list_insert(%struct.link* %0, %struct.link* %1)
ret void
}
long clearBit_fun_long(long x, unsigned i) { return x & ~(1 << i); }


x86 assembly (clang, -O0):
<clearBit_fun_long>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
xor    $0xffffffff,%ecx
movslq %ecx,%rcx
and    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clearBit_fun_long>:
mov    %esi,%ecx
mov    $0xfffffffe,%eax
rol    %cl,%eax
cltq
and    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @clearBit_fun_long(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i64, i64* %3
%6 = load i32, i32* %4
%7 = shl i32 1, %6
%8 = xor i32 %7, -1
%9 = sext i32 %8 to i64
%10 = and i64 %5, %9
ret i64 %10
}

LLVM IR (-O2):
define i64 @clearBit_fun_long(i64 %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = xor i32 %3, -1
%5 = sext i32 %4 to i64
%6 = and i64 %5, %0
ret i64 %6
}
/* Variables and functions */
int /*<<< orphan*/ set_ptr(int *, int);
int set_ptr_param_array(int buf[]) {
  set_ptr(buf, 1);
  return buf[0];
}


x86 assembly (clang, -O0):
<set_ptr_param_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <set_ptr@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_ptr_param_array>:
push   %rbx
mov    %rdi,%rbx
mov    $0x1,%esi
call   1030 <set_ptr@plt>
mov    (%rbx),%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @set_ptr_param_array(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @set_ptr(i32* %3, i32 1)
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 0
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @set_ptr_param_array(i32* %0) {
%2 = tail call i32 @set_ptr(i32* %0, i32 1)
%3 = load i32, i32* %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ kernelpanic(char *);
void ns_undef() { kernelpanic("normal world Undef\n"); }


x86 assembly (clang, -O0):
<ns_undef>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <kernelpanic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ns_undef>:
lea    0xee9(%rip),%rdi
jmp    1030 <kernelpanic@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"normal world Undef\0A\00"
define void @ns_undef() {
%1 = call i32 @kernelpanic(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [20 x i8] c"normal world Undef\0A\00"
define void @ns_undef() {
%1 = tail call i32 @kernelpanic(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret void
}
int ft_str_is_printable(char *str) {
  int it;
  it = 0;
  while (str[it]) {
    if (str[it] > 0 && str[it] <= 31)
      return (0);
    it++;
  }
  return (1);
}


x86 assembly (clang, -O0):
<ft_str_is_printable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1165 <ft_str_is_printable+0x65>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
jle    1157 <ft_str_is_printable+0x57>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x1f,%eax
jg     1157 <ft_str_is_printable+0x57>
movl   $0x0,-0x4(%rbp)
jmp    116c <ft_str_is_printable+0x6c>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    110f <ft_str_is_printable+0xf>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_str_is_printable>:
mov    (%rdi),%cl
mov    $0x1,%eax
test   %cl,%cl
je     1123 <ft_str_is_printable+0x23>
add    $0x1,%rdi
nop
add    $0xff,%cl
cmp    $0x1e,%cl
jbe    1124 <ft_str_is_printable+0x24>
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <ft_str_is_printable+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ft_str_is_printable(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
br label %5
5: ; preds = %29, %1
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = icmp ne i8 %10, 0
br i1 %11, label %12, label %32
12: ; preds = %5
%13 = load i8*, i8** %3
%14 = load i32, i32* %4
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp sgt i32 %18, 0
br i1 %19, label %20, label %29
20: ; preds = %12
%21 = load i8*, i8** %3
%22 = load i32, i32* %4
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
%25 = load i8, i8* %24
%26 = sext i8 %25 to i32
%27 = icmp sle i32 %26, 31
br i1 %27, label %28, label %29
28: ; preds = %20
store i32 0, i32* %2
br label %33
29: ; preds = %20, %12
%30 = load i32, i32* %4
%31 = add nsw i32 %30, 1
store i32 %31, i32* %4
br label %5
32: ; preds = %5
store i32 1, i32* %2
br label %33
33: ; preds = %32, %28
%34 = load i32, i32* %2
ret i32 %34
}

LLVM IR (-O2):
define i32 @ft_str_is_printable(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %8
4: ; preds = %8
%5 = getelementptr inbounds i8, i8* %0, i64 %13
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
br i1 %7, label %14, label %8
8: ; preds = %1, %4
%9 = phi i64 [ %13, %4 ], [ 0, %1 ]
%10 = phi i8 [ %6, %4 ], [ %2, %1 ]
%11 = add i8 %10, -1
%12 = icmp ult i8 %11, 31
%13 = add nuw i64 %9, 1
br i1 %12, label %14, label %4
14: ; preds = %8, %4, %1
%15 = phi i32 [ 1, %1 ], [ 1, %4 ], [ 0, %8 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void appMenuFunc(int menu) {
  switch (menu) {
  case (1):
    exit(0);
    break;
  default:
    break;
  }
  return;
}


x86 assembly (clang, -O0):
<appMenuFunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
jne    1133 <appMenuFunc+0x23>
jmp    112c <appMenuFunc+0x1c>
xor    %edi,%edi
call   1030 <exit@plt>
jmp    1138 <appMenuFunc+0x28>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<appMenuFunc>:
cmp    $0x1,%edi
je     1116 <appMenuFunc+0x6>
ret
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @appMenuFunc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
switch i32 %3, label %6 [
i32 1, label %4
]
4: ; preds = %1
%5 = call i32 @exit(i32 0)
unreachable
6: ; preds = %1
br label %7
7: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @appMenuFunc(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @exit(i32 0)
unreachable
5: ; preds = %1
ret void
}
int HelpItem125(void) { return 0; }


x86 assembly (clang, -O0):
<HelpItem125>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelpItem125>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HelpItem125() {
ret i32 0
}

LLVM IR (-O2):
define i32 @HelpItem125() {
ret i32 0
}