xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int ushort;

/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void delay(ushort milliseconds) { usleep(milliseconds * 1000); }


x86 assembly (clang, -O0):
<delay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay>:
imul   $0x3e8,%edi,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @delay(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 1000
%5 = call i32 @usleep(i32 %4)
ret void
}

LLVM IR (-O2):
define void @delay(i32 %0) {
%2 = mul nsw i32 %0, 1000
%3 = tail call i32 @usleep(i32 %2)
ret void
}
void jump_start(void *init, void *exit_func, void *entry) {
  register long esp __asm__("esp") = init;
  register long edx __asm__("edx") = 0;
  __asm__ __volatile__("jmp *(%0)\n" : : "r"(entry), "r"(esp), "r"(edx) :);
}


x86 assembly (clang, -O0):
<jump_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%rdx
mov    %rcx,%rsp
jmp    *(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<jump_start>:
mov    %rdx,%rax
mov    %rdi,%rsp
xor    %edx,%edx
jmp    *(%rax)
ret

LLVM IR (-O0):
define void @jump_start(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%9 = load i8*, i8** %4
%10 = ptrtoint i8* %9 to i64
store i64 %10, i64* %7
store i64 0, i64* %8
%11 = load i8*, i8** %6
%12 = load i64, i64* %7
%13 = load i64, i64* %8
ret void
}

LLVM IR (-O2):
define void @jump_start(i8* %0, i8* nocapture readnone %1, i8* %2) {
%4 = ptrtoint i8* %0 to i64
tail call void asm sideeffect "jmp *($0)\0A", "r,{esp},{edx},~{dirflag},~{fpsr},~{flags}"(i8* %2, i64 %4, i64 0)
ret void
}
int swap(int *a, int *b) {
  int c;
  c = *a;
  *a = *b;
  *b = c;
  return 0;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret i32 0
}

LLVM IR (-O2):
define i32 @swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret i32 0
}
double g() { return 1.0; }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
movsd  0xef4(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @g() {
ret double 1.000000e+00
}

LLVM IR (-O2):
define double @g() {
ret double 1.000000e+00
}
double tauint_to_eta(double tauint) {
  double eta;
  if (tauint <= 1.0)
    eta = 0.0;
  else
    eta = (tauint - 1.0) / (tauint + 1.0);
  return eta;
}


x86 assembly (clang, -O0):
<tauint_to_eta>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
ucomisd -0x8(%rbp),%xmm0
jb     1129 <tauint_to_eta+0x29>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    1150 <tauint_to_eta+0x50>
movsd  -0x8(%rbp),%xmm0
movsd  0xeca(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  0xebe(%rip),%xmm1
addsd  -0x8(%rbp),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<tauint_to_eta>:
movapd %xmm0,%xmm1
xorpd  %xmm0,%xmm0
movsd  0xef0(%rip),%xmm2
ucomisd %xmm1,%xmm2
jae    112e <tauint_to_eta+0x2e>
movsd  0xeea(%rip),%xmm0
addsd  %xmm1,%xmm0
addsd  0xed6(%rip),%xmm1
divsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @tauint_to_eta(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fcmp ole double %4, 1.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
store double 0.000000e+00, double* %3
br label %13
7: ; preds = %1
%8 = load double, double* %2
%9 = fsub double %8, 1.000000e+00
%10 = load double, double* %2
%11 = fadd double %10, 1.000000e+00
%12 = fdiv double %9, %11
store double %12, double* %3
br label %13
13: ; preds = %7, %6
%14 = load double, double* %3
ret double %14
}

LLVM IR (-O2):
define double @tauint_to_eta(double %0) {
%2 = fcmp ugt double %0, 1.000000e+00
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = fadd double %0, -1.000000e+00
%5 = fadd double %0, 1.000000e+00
%6 = fdiv double %4, %5
br label %7
7: ; preds = %1, %3
%8 = phi double [ %6, %3 ], [ 0.000000e+00, %1 ]
ret double %8
}
int test_imm_E2int16_mem(short *val) {
  return ((*val) & (-0xE2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E2int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffff1e,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E2int16_mem>:
movzwl (%rdi),%eax
test   $0xff1e,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E2int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -226
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_E2int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -226
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void mumps_get_max_file_size_c(double *max_ooc_file_size) {
  *max_ooc_file_size = (double)(1879048192);
  return;
}


x86 assembly (clang, -O0):
<mumps_get_max_file_size_c>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  0xeec(%rip),%xmm0
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mumps_get_max_file_size_c>:
movabs $0x41dc000000000000,%rax
mov    %rax,(%rdi)
ret

LLVM IR (-O0):
define void @mumps_get_max_file_size_c(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
store double 0x41DC000000000000, double* %3
ret void
}

LLVM IR (-O2):
define void @mumps_get_max_file_size_c(double* nocapture writeonly %0) {
store double 0x41DC000000000000, double* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ funcComplexTypes();
void funcAttrs() { funcComplexTypes(); }


x86 assembly (clang, -O0):
<funcAttrs>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <funcComplexTypes@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<funcAttrs>:
xor    %eax,%eax
jmp    1030 <funcComplexTypes@plt>

LLVM IR (-O0):
define void @funcAttrs() {
%1 = call i32 (...) @funcComplexTypes()
ret void
}

LLVM IR (-O2):
define void @funcAttrs() {
%1 = tail call i32 (...) @funcComplexTypes()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ getout(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char const *);
int /*<<< orphan*/ write(int, char *, int);
void errexit(const char *s) {
  write(2, "\n", 1);
  perror(s);
  getout(0);
}


x86 assembly (clang, -O0):
<errexit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x2,%edi
lea    0xeb8(%rip),%rsi
mov    $0x1,%edx
call   1040 <write@plt>
mov    -0x8(%rbp),%rdi
call   1050 <perror@plt>
xor    %edi,%edi
call   1030 <getout@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<errexit>:
push   %rbx
mov    %rdi,%rbx
lea    0xec5(%rip),%rsi
mov    $0x2,%edi
mov    $0x1,%edx
call   1040 <write@plt>
mov    %rbx,%rdi
call   1050 <perror@plt>
xor    %edi,%edi
pop    %rbx
jmp    1030 <getout@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @errexit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @write(i32 2, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = load i8*, i8** %2
%5 = call i32 @perror(i8* %4)
%6 = call i32 @getout(i32 0)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"\0A\00"
define void @errexit(i8* nocapture %0) {
%2 = tail call i32 @write(i32 2, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
%3 = tail call i32 @perror(i8* %0)
%4 = tail call i32 @getout(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ run_add_cte_to_per_adv_chain_tests();
int /*<<< orphan*/ run_remove_cte_to_per_adv_chain_tests();
void test_main(void) {
  run_add_cte_to_per_adv_chain_tests();
  run_remove_cte_to_per_adv_chain_tests();
}


x86 assembly (clang, -O0):
<test_main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <run_add_cte_to_per_adv_chain_tests@plt>
mov    $0x0,%al
call   1040 <run_remove_cte_to_per_adv_chain_tests@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_main>:
push   %rax
xor    %eax,%eax
call   1030 <run_add_cte_to_per_adv_chain_tests@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <run_remove_cte_to_per_adv_chain_tests@plt>

LLVM IR (-O0):
define void @test_main() {
%1 = call i32 (...) @run_add_cte_to_per_adv_chain_tests()
%2 = call i32 (...) @run_remove_cte_to_per_adv_chain_tests()
ret void
}

LLVM IR (-O2):
define void @test_main() {
%1 = tail call i32 (...) @run_add_cte_to_per_adv_chain_tests()
%2 = tail call i32 (...) @run_remove_cte_to_per_adv_chain_tests()
ret void
}
extern int TakeUint8(int x) {
  if ((0xFF & (unsigned int)x) == 0xFE)
    return 10;
  return 0;
}


x86 assembly (clang, -O0):
<TakeUint8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xff,%eax
cmp    $0xfe,%eax
jne    1126 <TakeUint8+0x26>
movl   $0xa,-0x4(%rbp)
jmp    112d <TakeUint8+0x2d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TakeUint8>:
xor    %ecx,%ecx
cmp    $0xfe,%dil
mov    $0xa,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @TakeUint8(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = and i32 255, %4
%6 = icmp eq i32 %5, 254
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 10, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @TakeUint8(i32 %0) {
%2 = and i32 %0, 255
%3 = icmp eq i32 %2, 254
%4 = select i1 %3, i32 10, i32 0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ __real_free(void *);
unsigned int irq_disable();
int /*<<< orphan*/ irq_restore(unsigned int);
void __wrap_free(void *ptr) {
  unsigned state = irq_disable();
  __real_free(ptr);
  irq_restore(state);
}


x86 assembly (clang, -O0):
<__wrap_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <irq_disable@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <__real_free@plt>
mov    -0xc(%rbp),%edi
call   1050 <irq_restore@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__wrap_free>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <irq_disable@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1040 <__real_free@plt>
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <irq_restore@plt>

LLVM IR (-O0):
define void @__wrap_free(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = call i32 (...) @irq_disable()
store i32 %4, i32* %3
%5 = load i8*, i8** %2
%6 = call i32 @__real_free(i8* %5)
%7 = load i32, i32* %3
%8 = call i32 @irq_restore(i32 %7)
ret void
}

LLVM IR (-O2):
define void @__wrap_free(i8* %0) {
%2 = tail call i32 (...) @irq_disable()
%3 = tail call i32 @__real_free(i8* %0)
%4 = tail call i32 @irq_restore(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
void open_error() { perror("open error"); }


x86 assembly (clang, -O0):
<open_error>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <perror@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_error>:
lea    0xee9(%rip),%rdi
jmp    1030 <perror@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"open error\00"
define void @open_error() {
%1 = call i32 @perror(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"open error\00"
define void @open_error() {
%1 = tail call i32 @perror(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}
int test_imm_C1int8_mem(signed char *val) {
  return ((*val) & (-0xC1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C1int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xffffff3f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C1int8_mem>:
movsbl (%rdi),%eax
test   $0xffffff3f,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C1int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, -193
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C1int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
%4 = and i32 %3, -193
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i32 -40, i32 -20
ret i32 %6
}
void on_worker_reply(union ui_state *state, union move *move) {}


x86 assembly (clang, -O0):
<on_worker_reply>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<on_worker_reply>:
ret

LLVM IR (-O0):
%union.ui_state = type opaque
%union.move = type opaque
define void @on_worker_reply(%union.ui_state* %0, %union.move* %1) {
%3 = alloca %union.ui_state*
%4 = alloca %union.move*
store %union.ui_state* %0, %union.ui_state** %3
store %union.move* %1, %union.move** %4
ret void
}

LLVM IR (-O2):
%union.ui_state = type opaque
%union.move = type opaque
define void @on_worker_reply(%union.ui_state* nocapture %0, %union.move* nocapture %1) {
ret void
}
int test_imm_86uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x86 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_86uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x86,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_86uint64_highword_mem>:
testb  $0x86,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_86uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 134
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_86uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 575525617664
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int /*<<< orphan*/ sort(int *, int);
int main() {
  int *x;
  int n = __VERIFIER_nondet_int();
  sort(x, n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <sort@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <__VERIFIER_nondet_int@plt>
mov    %eax,%esi
call   1030 <sort@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %4, i32* %3
%5 = load i32*, i32** %2
%6 = load i32, i32* %3
%7 = call i32 @sort(i32* %5, i32 %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 @sort(i32* undef, i32 %1)
ret i32 0
}
int *f(int z) {
  { return &z; }
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
lea    -0x4(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    -0x4(%rsp),%rax
ret

LLVM IR (-O0):
define i32* @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32* %2
}

LLVM IR (-O2):
define noalias i32* @f(i32 %0) {
%2 = alloca i32
ret i32* %2
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
void *malloc(size_t);
int /*<<< orphan*/ stderr;
void *xmalloc(size_t size) {
  void *p;
  p = malloc(size);
  if (!p) {
    fprintf(stderr, "Out of memory");
    abort();
  }
  return p;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1170 <xmalloc+0x40>
mov    0x2e85(%rip),%rax
mov    (%rax),%edi
lea    0xe9c(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rax
call   1050 <malloc@plt>
test   %rax,%rax
je     113d <xmalloc+0xd>
pop    %rcx
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [14 x i8] c"Out of memory\00"
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%11 = call i32 (...) @abort()
unreachable
12: ; preds = %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [14 x i8] c"Out of memory\00"
define noalias i8* @xmalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 (...) @abort()
unreachable
8: ; preds = %1
ret i8* %2
}
int dsign(double x) {
  if (0 == x) {
    return 0;
  } else if (x > 0) {
    return 1;
  } else {
    return -1;
  }
}


x86 assembly (clang, -O0):
<dsign>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jne    1129 <dsign+0x29>
jp     1129 <dsign+0x29>
movl   $0x0,-0x4(%rbp)
jmp    114e <dsign+0x4e>
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    1147 <dsign+0x47>
movl   $0x1,-0x4(%rbp)
jmp    114e <dsign+0x4e>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dsign>:
xor    %eax,%eax
xorpd  %xmm1,%xmm1
xor    %ecx,%ecx
ucomisd %xmm1,%xmm0
seta   %cl
lea    -0x1(%rcx,%rcx,1),%ecx
cmovne %ecx,%eax
cmovp  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @dsign(double %0) {
%2 = alloca i32
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp oeq double 0.000000e+00, %4
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %12
7: ; preds = %1
%8 = load double, double* %3
%9 = fcmp ogt double %8, 0.000000e+00
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 1, i32* %2
br label %12
11: ; preds = %7
store i32 -1, i32* %2
br label %12
12: ; preds = %11, %10, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @dsign(double %0) {
%2 = fcmp oeq double %0, 0.000000e+00
%3 = fcmp ogt double %0, 0.000000e+00
%4 = select i1 %3, i32 1, i32 -1
%5 = select i1 %2, i32 0, i32 %4
ret i32 %5
}
/* Type definitions */
struct sigaction {
  int /*<<< orphan*/ sa_handler;
};

/* Variables and functions */
int /*<<< orphan*/ SIG_IGN;
int sigaction(int, struct sigaction *, int /*<<< orphan*/ *);
int _sigignore(int sig) {
  struct sigaction action;
  action.sa_handler = SIG_IGN;
  return sigaction(sig, &action, NULL);
}


x86 assembly (clang, -O0):
<_sigignore>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <sigaction@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_sigignore>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%eax
mov    %eax,(%rsp)
mov    %rsp,%rsi
xor    %edx,%edx
call   1030 <sigaction@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.sigaction = type { i32 }
@SIG_IGN = global i32 0
define i32 @_sigignore(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.sigaction
store i32 %0, i32* %2
%4 = load i32, i32* @SIG_IGN
%5 = getelementptr inbounds %struct.sigaction, %struct.sigaction* %3, i32 0, i32 0
store i32 %4, i32* %5
%6 = load i32, i32* %2
%7 = call i32 @sigaction(i32 %6, %struct.sigaction* %3, i32* null)
ret i32 %7
}

LLVM IR (-O2):
%struct.sigaction = type { i32 }
@SIG_IGN = global i32 0
define i32 @_sigignore(i32 %0) {
%2 = alloca %struct.sigaction
%3 = bitcast %struct.sigaction* %2 to i8*
%4 = load i32, i32* @SIG_IGN
%5 = getelementptr inbounds %struct.sigaction, %struct.sigaction* %2, i64 0, i32 0
store i32 %4, i32* %5
%6 = call i32 @sigaction(i32 %0, %struct.sigaction* %2, i32* null)
ret i32 %6
}
int strlen(c)
char *c;
{
  int len = 0;
  while (*(c++) != '\0')
    len++;
  return len;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1138 <strlen+0x38>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <strlen+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
cmpb   $0x0,(%rdi)
je     111c <strlen+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <strlen+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %4
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @strlen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add nuw nsw i32 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %12
}
void halt(void) { __asm volatile("hlt" ::); }


x86 assembly (clang, -O0):
<halt>:
push   %rbp
mov    %rsp,%rbp
hlt
pop    %rbp
ret

x86 assembly (clang, -O2):
<halt>:
hlt
ret

LLVM IR (-O0):
define void @halt() {
ret void
}

LLVM IR (-O2):
define void @halt() {
tail call void asm sideeffect "hlt", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ __infer_nondet_int();
size_t mbstowcs(wchar_t *__restrict pwcs, const char *__restrict s, size_t n) {
  return (size_t)__infer_nondet_int();
}


x86 assembly (clang, -O0):
<mbstowcs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_int@plt>
cltq
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mbstowcs>:
push   %rax
xor    %eax,%eax
call   1030 <__infer_nondet_int@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i64 @mbstowcs(i32* noalias %0, i8* noalias %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i64
store i32* %0, i32** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = call i32 (...) @__infer_nondet_int()
%8 = sext i32 %7 to i64
ret i64 %8
}

LLVM IR (-O2):
define i64 @mbstowcs(i32* noalias nocapture readnone %0, i8* noalias nocapture readnone %1, i64 %2) {
%4 = tail call i32 (...) @__infer_nondet_int()
%5 = sext i32 %4 to i64
ret i64 %5
}
int snapUpSize(int i) {
  if (i < 8) {
    i = 8;
  } else {
    unsigned int j;
    j = i;
    j |= (j >> 1);
    j |= (j >> 2);
    j |= (j >> 4);
    j |= (j >> 8);
    j |= (j >> 16);
    i = j + 1;
  }
  return i;
}


x86 assembly (clang, -O0):
<snapUpSize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x8,-0x4(%rbp)
jge    111d <snapUpSize+0x1d>
movl   $0x8,-0x4(%rbp)
jmp    1168 <snapUpSize+0x68>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x1,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x2,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x4,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x8,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x10,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<snapUpSize>:
mov    $0x8,%eax
cmp    $0x8,%edi
jl     112f <snapUpSize+0x2f>
mov    %edi,%eax
shr    %eax
or     %edi,%eax
mov    %eax,%ecx
shr    $0x2,%ecx
or     %eax,%ecx
mov    %ecx,%eax
shr    $0x4,%eax
or     %ecx,%eax
mov    %eax,%ecx
shr    $0x8,%ecx
or     %eax,%ecx
mov    %ecx,%eax
shr    $0x10,%eax
or     %ecx,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @snapUpSize(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 8
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 8, i32* %2
br label %31
7: ; preds = %1
%8 = load i32, i32* %2
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = lshr i32 %9, 1
%11 = load i32, i32* %3
%12 = or i32 %11, %10
store i32 %12, i32* %3
%13 = load i32, i32* %3
%14 = lshr i32 %13, 2
%15 = load i32, i32* %3
%16 = or i32 %15, %14
store i32 %16, i32* %3
%17 = load i32, i32* %3
%18 = lshr i32 %17, 4
%19 = load i32, i32* %3
%20 = or i32 %19, %18
store i32 %20, i32* %3
%21 = load i32, i32* %3
%22 = lshr i32 %21, 8
%23 = load i32, i32* %3
%24 = or i32 %23, %22
store i32 %24, i32* %3
%25 = load i32, i32* %3
%26 = lshr i32 %25, 16
%27 = load i32, i32* %3
%28 = or i32 %27, %26
store i32 %28, i32* %3
%29 = load i32, i32* %3
%30 = add i32 %29, 1
store i32 %30, i32* %2
br label %31
31: ; preds = %7, %6
%32 = load i32, i32* %2
ret i32 %32
}

LLVM IR (-O2):
define i32 @snapUpSize(i32 %0) {
%2 = icmp slt i32 %0, 8
br i1 %2, label %15, label %3
3: ; preds = %1
%4 = lshr i32 %0, 1
%5 = or i32 %4, %0
%6 = lshr i32 %5, 2
%7 = or i32 %6, %5
%8 = lshr i32 %7, 4
%9 = or i32 %8, %7
%10 = lshr i32 %9, 8
%11 = or i32 %10, %9
%12 = lshr i32 %11, 16
%13 = or i32 %12, %11
%14 = add i32 %13, 1
br label %15
15: ; preds = %1, %3
%16 = phi i32 [ %14, %3 ], [ 8, %1 ]
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_tagstruct_get() {
  printf("NOT IMPLEMENTED:"
         "pa_tagstruct_get"
         "\n");
}


x86 assembly (clang, -O0):
<pa_tagstruct_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_tagstruct_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"NOT IMPLEMENTED:pa_tagstruct_get\0A\00"
define i32 @pa_tagstruct_get() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [33 x i8] c"NOT IMPLEMENTED:pa_tagstruct_get\00"
define i32 @pa_tagstruct_get() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ Msp430GpioC__13__GeneralIO__clr();
void SensirionSht11LogicP__0__CLOCK__clr(void) {
  Msp430GpioC__13__GeneralIO__clr();
}


x86 assembly (clang, -O0):
<SensirionSht11LogicP__0__CLOCK__clr>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Msp430GpioC__13__GeneralIO__clr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SensirionSht11LogicP__0__CLOCK__clr>:
xor    %eax,%eax
jmp    1030 <Msp430GpioC__13__GeneralIO__clr@plt>

LLVM IR (-O0):
define void @SensirionSht11LogicP__0__CLOCK__clr() {
%1 = call i32 (...) @Msp430GpioC__13__GeneralIO__clr()
ret void
}

LLVM IR (-O2):
define void @SensirionSht11LogicP__0__CLOCK__clr() {
%1 = tail call i32 (...) @Msp430GpioC__13__GeneralIO__clr()
ret void
}
/* Variables and functions */
double cos(double);
double _cos(double x) { return cos(x); }


x86 assembly (clang, -O0):
<_cos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <cos@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_cos>:
jmp    1030 <cos@plt>

LLVM IR (-O0):
define double @_cos(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @cos(double %3)
ret double %4
}

LLVM IR (-O2):
define double @_cos(double %0) {
%2 = tail call double @cos(double %0)
ret double %2
}
/* Variables and functions */
int syscall(int, int, char const *, void const *, size_t, int);
int _fsetxattr(int fd, const char *name, const void *value, size_t size,
               int flags) {
  return syscall(190, fd, name, value, size, flags);
}


x86 assembly (clang, -O0):
<_fsetxattr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
mov    -0x24(%rbp),%r9d
mov    $0xbe,%edi
call   1030 <syscall@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fsetxattr>:
mov    %r8d,%r9d
mov    %rcx,%r8
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0xbe,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @_fsetxattr(i32 %0, i8* %1, i8* %2, i64 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i64
%10 = alloca i32
store i32 %0, i32* %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i64 %3, i64* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i8*, i8** %7
%13 = load i8*, i8** %8
%14 = load i64, i64* %9
%15 = load i32, i32* %10
%16 = call i32 @syscall(i32 190, i32 %11, i8* %12, i8* %13, i64 %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @_fsetxattr(i32 %0, i8* %1, i8* %2, i64 %3, i32 %4) {
%6 = tail call i32 @syscall(i32 190, i32 %0, i8* %1, i8* %2, i64 %3, i32 %4)
ret i32 %6
}
int isoneofN(char ch, const char *what, int size) {
  const char *end = what + size;
  while (what < end) {
    if (ch == *what++)
      return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<isoneofN>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x20(%rbp),%rax
jae    115d <isoneofN+0x5d>
movsbl -0x5(%rbp),%eax
mov    -0x10(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jne    1158 <isoneofN+0x58>
movl   $0x1,-0x4(%rbp)
jmp    1164 <isoneofN+0x64>
jmp    1120 <isoneofN+0x20>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isoneofN>:
movslq %edx,%rax
add    %rsi,%rax
cs nopw 0x0(%rax,%rax,1)
cmp    %rax,%rsi
jae    1127 <isoneofN+0x27>
lea    0x1(%rsi),%rcx
cmp    %dil,(%rsi)
mov    %rcx,%rsi
jne    1110 <isoneofN+0x10>
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isoneofN(i8 signext %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
store i8 %0, i8* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%9 = load i8*, i8** %6
%10 = load i32, i32* %7
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %9, i64 %11
store i8* %12, i8** %8
br label %13
13: ; preds = %26, %3
%14 = load i8*, i8** %6
%15 = load i8*, i8** %8
%16 = icmp ult i8* %14, %15
br i1 %16, label %17, label %27
17: ; preds = %13
%18 = load i8, i8* %5
%19 = sext i8 %18 to i32
%20 = load i8*, i8** %6
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %6
%22 = load i8, i8* %20
%23 = sext i8 %22 to i32
%24 = icmp eq i32 %19, %23
br i1 %24, label %25, label %26
25: ; preds = %17
store i32 1, i32* %4
br label %28
26: ; preds = %17
br label %13
27: ; preds = %13
store i32 0, i32* %4
br label %28
28: ; preds = %27, %25
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @isoneofN(i8 signext %0, i8* %1, i32 %2) {
%4 = sext i32 %2 to i64
%5 = getelementptr inbounds i8, i8* %1, i64 %4
br label %6
6: ; preds = %9, %3
%7 = phi i8* [ %1, %3 ], [ %10, %9 ]
%8 = icmp ult i8* %7, %5
br i1 %8, label %9, label %13
9: ; preds = %6
%10 = getelementptr inbounds i8, i8* %7, i64 1
%11 = load i8, i8* %7
%12 = icmp eq i8 %11, %0
br i1 %12, label %13, label %6
13: ; preds = %6, %9
%14 = phi i32 [ 1, %9 ], [ 0, %6 ]
ret i32 %14
}
int fun321() { return 321; }


x86 assembly (clang, -O0):
<fun321>:
push   %rbp
mov    %rsp,%rbp
mov    $0x141,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun321>:
mov    $0x141,%eax
ret

LLVM IR (-O0):
define i32 @fun321() {
ret i32 321
}

LLVM IR (-O2):
define i32 @fun321() {
ret i32 321
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void mfree(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<mfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mfree>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @mfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @mfree(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int rom_present(char *);
int mach64gx_isa_available(void) {
  return rom_present(L"roms/video/mach64/M64-1994.VBI");
}


x86 assembly (clang, -O0):
<mach64gx_isa_available>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <rom_present@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mach64gx_isa_available>:
lea    0xee9(%rip),%rdi
jmp    1030 <rom_present@plt>

LLVM IR (-O0):
@.str = [31 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 109, i32 97, i32 99, i32 104, i32 54, i32 52, i32 47, i32 77, i32 54, i32 52, i32 45, i32 49, i32 57, i32 57, i32 52, i32 46, i32 86, i32 66, i32 73, i32 0]
define i32 @mach64gx_isa_available() {
%1 = call i32 @rom_present(i8* bitcast ([31 x i32]* @.str to i8*))
ret i32 %1
}

LLVM IR (-O2):
@.str = [31 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 109, i32 97, i32 99, i32 104, i32 54, i32 52, i32 47, i32 77, i32 54, i32 52, i32 45, i32 49, i32 57, i32 57, i32 52, i32 46, i32 86, i32 66, i32 73, i32 0]
define i32 @mach64gx_isa_available() {
%1 = tail call i32 @rom_present(i8* bitcast ([31 x i32]* @.str to i8*))
ret i32 %1
}
/* Type definitions */
struct gpio {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ gpio_mode(struct gpio *, int, int);
void gpio_a_output(int bit) {
  gpio_mode((struct gpio *)0x40010800, bit, 3 | 0);
}


x86 assembly (clang, -O0):
<gpio_a_output>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x40010800,%edi
mov    $0x3,%edx
call   1030 <gpio_mode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_a_output>:
mov    %edi,%esi
mov    $0x40010800,%edi
mov    $0x3,%edx
jmp    1030 <gpio_mode@plt>

LLVM IR (-O0):
%struct.gpio = type { i32 }
define void @gpio_a_output(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @gpio_mode(%struct.gpio* inttoptr (i64 1073809408 to %struct.gpio*), i32 %3, i32 3)
ret void
}

LLVM IR (-O2):
%struct.gpio = type { i32 }
define void @gpio_a_output(i32 %0) {
%2 = tail call i32 @gpio_mode(%struct.gpio* inttoptr (i64 1073809408 to %struct.gpio*), i32 %0, i32 3)
ret void
}
/* Type definitions */
struct b_whirl {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ useRevOption(struct b_whirl *, int, int);
void revControlAll(void *d, unsigned char u) {
  struct b_whirl *w = (struct b_whirl *)d;
  useRevOption(w, (int)(u / 15), 2);
}


x86 assembly (clang, -O0):
<revControlAll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
movzbl -0x9(%rbp),%eax
mov    $0xf,%ecx
cltd
idiv   %ecx
mov    %eax,%esi
mov    $0x2,%edx
call   1030 <useRevOption@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<revControlAll>:
imul   $0x89,%esi,%esi
shr    $0xb,%esi
mov    $0x2,%edx
jmp    1030 <useRevOption@plt>

LLVM IR (-O0):
%struct.b_whirl = type { i32 }
define void @revControlAll(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca %struct.b_whirl*
store i8* %0, i8** %3
store i8 %1, i8* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.b_whirl*
store %struct.b_whirl* %7, %struct.b_whirl** %5
%8 = load %struct.b_whirl*, %struct.b_whirl** %5
%9 = load i8, i8* %4
%10 = zext i8 %9 to i32
%11 = sdiv i32 %10, 15
%12 = call i32 @useRevOption(%struct.b_whirl* %8, i32 %11, i32 2)
ret void
}

LLVM IR (-O2):
%struct.b_whirl = type { i32 }
define void @revControlAll(i8* %0, i8 zeroext %1) {
%3 = bitcast i8* %0 to %struct.b_whirl*
%4 = udiv i8 %1, 15
%5 = zext i8 %4 to i32
%6 = tail call i32 @useRevOption(%struct.b_whirl* %3, i32 %5, i32 2)
ret void
}
void gf8mul_00000001(void) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @gf8mul_00000001() {
ret void
}

LLVM IR (-O2):
define void @gf8mul_00000001() {
ret void
}
__attribute__((weak)) int _fork(void) { return -1; }


x86 assembly (clang, -O0):
<_fork>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fork>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define weak i32 @_fork() {
ret i32 -1
}

LLVM IR (-O2):
define weak i32 @_fork() {
ret i32 -1
}
double grib_op_sub_d(double a, double b) { return a - b; }


x86 assembly (clang, -O0):
<grib_op_sub_d>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<grib_op_sub_d>:
subsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @grib_op_sub_d(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fsub double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @grib_op_sub_d(double %0, double %1) {
%3 = fsub double %0, %1
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int main(void) {
  void *a, *a_1, *a_2;
  a = (void *)0x123;
#pragma acc data copyout(a_1, a_2)
#pragma acc kernels deviceptr(a)
  {
    a_1 = a;
    a_2 = &a;
  }
  if (a != (void *)0x123)
    abort();
  if (a_1 != a)
    abort();
  if (a_2 == &a)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x123,%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
lea    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    $0x123,%eax
cmp    %rax,-0x10(%rbp)
je     114e <main+0x3e>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
je     1163 <main+0x53>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x20(%rbp),%rax
lea    -0x10(%rbp),%rcx
cmp    %rcx,%rax
jne    117b <main+0x6b>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i32 0, i32* %1
store i8* inttoptr (i64 291 to i8*), i8** %2
%5 = load i8*, i8** %2
store i8* %5, i8** %3
%6 = bitcast i8** %2 to i8*
store i8* %6, i8** %4
%7 = load i8*, i8** %2
%8 = icmp ne i8* %7, inttoptr (i64 291 to i8*)
br i1 %8, label %9, label %11
9: ; preds = %0
%10 = call i32 (...) @abort()
unreachable
11: ; preds = %0
%12 = load i8*, i8** %3
%13 = load i8*, i8** %2
%14 = icmp ne i8* %12, %13
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = call i32 (...) @abort()
unreachable
17: ; preds = %11
%18 = load i8*, i8** %4
%19 = bitcast i8** %2 to i8*
%20 = icmp eq i8* %18, %19
br i1 %20, label %21, label %23
21: ; preds = %17
%22 = call i32 (...) @abort()
unreachable
23: ; preds = %17
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ WriteFSK(int);
int /*<<< orphan*/ WriteTone(int /*<<< orphan*/, int);
void WriteEnd() {
  for (int i = 0; i < 5; i++)
    WriteFSK(1);
  WriteTone(0, 1e9);
}


x86 assembly (clang, -O0):
<WriteEnd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x5,-0x4(%rbp)
jge    1151 <WriteEnd+0x31>
mov    $0x1,%edi
call   1040 <WriteFSK@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    112f <WriteEnd+0xf>
xor    %edi,%edi
mov    $0x3b9aca00,%esi
call   1030 <WriteTone@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WriteEnd>:
push   %rax
mov    $0x1,%edi
call   1040 <WriteFSK@plt>
mov    $0x1,%edi
call   1040 <WriteFSK@plt>
mov    $0x1,%edi
call   1040 <WriteFSK@plt>
mov    $0x1,%edi
call   1040 <WriteFSK@plt>
mov    $0x1,%edi
call   1040 <WriteFSK@plt>
xor    %edi,%edi
mov    $0x3b9aca00,%esi
pop    %rax
jmp    1030 <WriteTone@plt>

LLVM IR (-O0):
define void @WriteEnd() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %7, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 5
br i1 %4, label %5, label %10
5: ; preds = %2
%6 = call i32 @WriteFSK(i32 1)
br label %7
7: ; preds = %5
%8 = load i32, i32* %1
%9 = add nsw i32 %8, 1
store i32 %9, i32* %1
br label %2
10: ; preds = %2
%11 = call i32 @WriteTone(i32 0, i32 1000000000)
ret void
}

LLVM IR (-O2):
define void @WriteEnd() {
%1 = tail call i32 @WriteFSK(i32 1)
%2 = tail call i32 @WriteFSK(i32 1)
%3 = tail call i32 @WriteFSK(i32 1)
%4 = tail call i32 @WriteFSK(i32 1)
%5 = tail call i32 @WriteFSK(i32 1)
%6 = tail call i32 @WriteTone(i32 0, i32 1000000000)
ret void
}
unsigned int readl(unsigned int addr) {
  return *((volatile unsigned int *)addr);
}


x86 assembly (clang, -O0):
<readl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readl>:
mov    %edi,%eax
mov    (%rax),%eax
ret

LLVM IR (-O0):
define i32 @readl(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @readl(i32 %0) {
%2 = zext i32 %0 to i64
%3 = inttoptr i64 %2 to i32*
%4 = load volatile i32, i32* %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char const *, int);
void ft_putendl_fd(char const *s, int fd) {
  int i;
  i = 0;
  while (s[i])
    i++;
  write(fd, s, i);
  write(fd, "\n", 1);
}


x86 assembly (clang, -O0):
<ft_putendl_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1146 <ft_putendl_fd+0x36>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <ft_putendl_fd+0x16>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%edx
call   1030 <write@plt>
mov    -0xc(%rbp),%edi
lea    0xea1(%rip),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putendl_fd>:
push   %rbx
mov    %esi,%ebx
mov    %rdi,%rsi
xor    %edx,%edx
nopl   0x0(%rax,%rax,1)
cmpb   $0x0,(%rsi,%rdx,1)
lea    0x1(%rdx),%rdx
jne    1120 <ft_putendl_fd+0x10>
add    $0xffffffff,%edx
mov    %ebx,%edi
call   1030 <write@plt>
lea    0xec5(%rip),%rsi
mov    %ebx,%edi
mov    $0x1,%edx
pop    %rbx
jmp    1030 <write@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @ft_putendl_fd(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %13, %2
%7 = load i8*, i8** %3
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %6
%14 = load i32, i32* %5
%15 = add nsw i32 %14, 1
store i32 %15, i32* %5
br label %6
16: ; preds = %6
%17 = load i32, i32* %4
%18 = load i8*, i8** %3
%19 = load i32, i32* %5
%20 = call i32 @write(i32 %17, i8* %18, i32 %19)
%21 = load i32, i32* %4
%22 = call i32 @write(i32 %21, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"\0A\00"
define void @ft_putendl_fd(i8* nocapture %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i64 [ %8, %3 ], [ 0, %2 ]
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
%8 = add nuw i64 %4, 1
br i1 %7, label %9, label %3
9: ; preds = %3
%10 = trunc i64 %4 to i32
%11 = tail call i32 @write(i32 %1, i8* %0, i32 %10)
%12 = tail call i32 @write(i32 %1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(char const *, char const *);
int string_equal(const char *str1, const char *str2) {
  return !strcmp(str1, str2);
}


x86 assembly (clang, -O0):
<string_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_equal>:
push   %rax
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @string_equal(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @string_equal(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}