xunge/DecIR huggingface dataset:
int test_imm_45uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0x45 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_45uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x45,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_45uint64_lowword_mem>:
testb  $0x45,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_45uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 69
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_45uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 69
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int getInput() {
  int bg_no;
  printf("Enter The bogie number:");
  scanf("%d", &bg_no);
  return bg_no;
}


x86 assembly (clang, -O0):
<getInput>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
lea    0xedd(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getInput>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
lea    0xee4(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [24 x i8] c"Enter The bogie number:\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @getInput() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
@.str = [24 x i8] c"Enter The bogie number:\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @getInput() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
ret i32 %5
}
int func2(int arg1, int arg2) { return arg1 + arg2; }


x86 assembly (clang, -O0):
<func2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func2>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @func2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @func2(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
int fun762() { return 762; }


x86 assembly (clang, -O0):
<fun762>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2fa,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun762>:
mov    $0x2fa,%eax
ret

LLVM IR (-O0):
define i32 @fun762() {
ret i32 762
}

LLVM IR (-O2):
define i32 @fun762() {
ret i32 762
}
void avcodec_get_name() {}


x86 assembly (clang, -O0):
<avcodec_get_name>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avcodec_get_name>:
ret

LLVM IR (-O0):
define void @avcodec_get_name() {
ret void
}

LLVM IR (-O2):
define void @avcodec_get_name() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ draw_char(int, int, char);
int /*<<< orphan*/ show_screen();
void draw_balls() {
  draw_char(63, 22, 'O');
  draw_char(43, 19, 'O');
  draw_char(73, 1, 'O');
  draw_char(22, 20, 'O');
  show_screen();
}


x86 assembly (clang, -O0):
<draw_balls>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3f,%edi
mov    $0x16,%esi
mov    $0x4f,%edx
call   1040 <draw_char@plt>
mov    $0x2b,%edi
mov    $0x13,%esi
mov    $0x4f,%edx
call   1040 <draw_char@plt>
mov    $0x49,%edi
mov    $0x1,%esi
mov    $0x4f,%edx
call   1040 <draw_char@plt>
mov    $0x16,%edi
mov    $0x14,%esi
mov    $0x4f,%edx
call   1040 <draw_char@plt>
mov    $0x0,%al
call   1030 <show_screen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<draw_balls>:
push   %rax
mov    $0x3f,%edi
mov    $0x16,%esi
mov    $0x4f,%edx
call   1040 <draw_char@plt>
mov    $0x2b,%edi
mov    $0x13,%esi
mov    $0x4f,%edx
call   1040 <draw_char@plt>
mov    $0x49,%edi
mov    $0x1,%esi
mov    $0x4f,%edx
call   1040 <draw_char@plt>
mov    $0x16,%edi
mov    $0x14,%esi
mov    $0x4f,%edx
call   1040 <draw_char@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <show_screen@plt>

LLVM IR (-O0):
define void @draw_balls() {
%1 = call i32 @draw_char(i32 63, i32 22, i8 signext 79)
%2 = call i32 @draw_char(i32 43, i32 19, i8 signext 79)
%3 = call i32 @draw_char(i32 73, i32 1, i8 signext 79)
%4 = call i32 @draw_char(i32 22, i32 20, i8 signext 79)
%5 = call i32 (...) @show_screen()
ret void
}

LLVM IR (-O2):
define void @draw_balls() {
%1 = tail call i32 @draw_char(i32 63, i32 22, i8 signext 79)
%2 = tail call i32 @draw_char(i32 43, i32 19, i8 signext 79)
%3 = tail call i32 @draw_char(i32 73, i32 1, i8 signext 79)
%4 = tail call i32 @draw_char(i32 22, i32 20, i8 signext 79)
%5 = tail call i32 (...) @show_screen()
ret void
}
void no_debug(int level, const char *fmt, ...) {}


x86 assembly (clang, -O0):
<no_debug>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<no_debug>:
ret

LLVM IR (-O0):
define void @no_debug(i32 %0, i8* %1, ...) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @no_debug(i32 %0, i8* nocapture %1, ...) {
ret void
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t stdlib_base_labs(const int32_t x) {
  int32_t mask = x >> 31;
  return (x ^ mask) - mask;
}


x86 assembly (clang, -O0):
<stdlib_base_labs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1f,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stdlib_base_labs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @stdlib_base_labs(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = ashr i32 %4, 31
store i32 %5, i32* %3
%6 = load i32, i32* %2
%7 = load i32, i32* %3
%8 = xor i32 %6, %7
%9 = load i32, i32* %3
%10 = sub nsw i32 %8, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @stdlib_base_labs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ cli();
int /*<<< orphan*/ restore_flags(unsigned long);
int /*<<< orphan*/ save_flags(unsigned long);
void sti_iis(void) {
  unsigned long flags;
  save_flags(flags);
  cli();
  restore_flags(flags);
}


x86 assembly (clang, -O0):
<sti_iis>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x8(%rbp),%rdi
call   1040 <save_flags@plt>
mov    $0x0,%al
call   1050 <cli@plt>
mov    -0x8(%rbp),%rdi
call   1030 <restore_flags@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sti_iis>:
push   %rax
call   1040 <save_flags@plt>
xor    %eax,%eax
call   1050 <cli@plt>
pop    %rax
jmp    1030 <restore_flags@plt>

LLVM IR (-O0):
define void @sti_iis() {
%1 = alloca i64
%2 = load i64, i64* %1
%3 = call i32 @save_flags(i64 %2)
%4 = call i32 (...) @cli()
%5 = load i64, i64* %1
%6 = call i32 @restore_flags(i64 %5)
ret void
}

LLVM IR (-O2):
define void @sti_iis() {
%1 = tail call i32 @save_flags(i64 undef)
%2 = tail call i32 (...) @cli()
%3 = tail call i32 @restore_flags(i64 undef)
ret void
}
/* Type definitions */
struct buffer {
  int dummy;
};

/* Variables and functions */
int add_raw_data(struct buffer *, int, char const *, scalar_t__);
scalar_t__ strlen(char const *);
int add_hostname_avp(struct buffer *buf, const char *hostname) {
  return add_raw_data(buf, 7, hostname, strlen(hostname) + 1);
}


x86 assembly (clang, -O0):
<add_hostname_avp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    %rax,%rcx
add    $0x1,%rcx
mov    $0x7,%esi
call   1040 <add_raw_data@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_hostname_avp>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
lea    0x1(%rax),%rcx
mov    %r14,%rdi
mov    $0x7,%esi
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <add_raw_data@plt>

LLVM IR (-O0):
%struct.buffer = type { i32 }
define i32 @add_hostname_avp(%struct.buffer* %0, i8* %1) {
%3 = alloca %struct.buffer*
%4 = alloca i8*
store %struct.buffer* %0, %struct.buffer** %3
store i8* %1, i8** %4
%5 = load %struct.buffer*, %struct.buffer** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i64 @strlen(i8* %7)
%9 = add nsw i64 %8, 1
%10 = call i32 @add_raw_data(%struct.buffer* %5, i32 7, i8* %6, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
%struct.buffer = type { i32 }
define i32 @add_hostname_avp(%struct.buffer* %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = add nsw i64 %3, 1
%5 = tail call i32 @add_raw_data(%struct.buffer* %0, i32 7, i8* %1, i64 %4)
ret i32 %5
}
void gp_init() {}


x86 assembly (clang, -O0):
<gp_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gp_init>:
ret

LLVM IR (-O0):
define void @gp_init() {
ret void
}

LLVM IR (-O2):
define void @gp_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ tml_sr_vSet(int /*<<< orphan*/, float *, int);
void tml_sr_vZero(float *dst, int n) { tml_sr_vSet(0, dst, n); }


x86 assembly (clang, -O0):
<tml_sr_vZero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
xor    %edi,%edi
call   1030 <tml_sr_vSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tml_sr_vZero>:
mov    %esi,%edx
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <tml_sr_vSet@plt>

LLVM IR (-O0):
define void @tml_sr_vZero(float* %0, i32 %1) {
%3 = alloca float*
%4 = alloca i32
store float* %0, float** %3
store i32 %1, i32* %4
%5 = load float*, float** %3
%6 = load i32, i32* %4
%7 = call i32 @tml_sr_vSet(i32 0, float* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @tml_sr_vZero(float* %0, i32 %1) {
%3 = tail call i32 @tml_sr_vSet(i32 0, float* %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void vis_jsondoc_postamble(void) {
  printf("\n  ]\n");
  printf("}\n");
}


x86 assembly (clang, -O0):
<vis_jsondoc_postamble>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xedf(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vis_jsondoc_postamble>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xee1(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"\0A ]\0A\00"
@.str.1 = [3 x i8] c"}\0A\00"
define void @vis_jsondoc_postamble() {
%1 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [5 x i8] c"\0A ]\00"
@str.2 = [2 x i8] c"}\00"
define void @vis_jsondoc_postamble() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int tolower(char c) {
  if (c >= 'A' && c <= 'Z')
    c -= ('A' - 'a');
  return c;
}


x86 assembly (clang, -O0):
<tolower>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x41,%eax
jl     112e <tolower+0x2e>
movsbl -0x1(%rbp),%eax
cmp    $0x5a,%eax
jg     112e <tolower+0x2e>
movsbl -0x1(%rbp),%eax
sub    $0xffffffe0,%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tolower>:
lea    -0x41(%rdi),%eax
lea    0x20(%rdi),%ecx
cmp    $0x1a,%al
movzbl %cl,%eax
cmovae %edi,%eax
movsbl %al,%eax
ret

LLVM IR (-O0):
define i32 @tolower(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 65
br i1 %5, label %6, label %15
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 90
br i1 %9, label %10, label %15
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = sub nsw i32 %12, -32
%14 = trunc i32 %13 to i8
store i8 %14, i8* %2
br label %15
15: ; preds = %10, %6, %1
%16 = load i8, i8* %2
%17 = sext i8 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
define i32 @tolower(i8 signext %0) {
%2 = add i8 %0, -65
%3 = icmp ult i8 %2, 26
%4 = add i8 %0, 32
%5 = select i1 %3, i8 %4, i8 %0
%6 = sext i8 %5 to i32
ret i32 %6
}
double InvSqrt(double y) {
  float x;
  x = (float)y;
  {
    float xhalf = 0.5f * x;
    int i = *(int *)&x;
    i = 0x5f3759df - (i >> 1);
    x = *(float *)&i;
    x = x * (1.5f - xhalf * x * x);
    y = (double)x;
  }
  return y;
}


x86 assembly (clang, -O0):
<InvSqrt>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  0xee5(%rip),%xmm0
mulss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%ecx
sar    $0x1,%ecx
mov    $0x5f3759df,%eax
sub    %ecx,%eax
mov    %eax,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movss  -0x10(%rbp),%xmm1
mulss  -0xc(%rbp),%xmm1
movss  -0xc(%rbp),%xmm2
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm1
movss  0xe8a(%rip),%xmm2
addss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<InvSqrt>:
cvtsd2ss %xmm0,%xmm0
movd   %xmm0,%eax
sar    %eax
mov    $0x5f3759df,%ecx
sub    %eax,%ecx
movd   %ecx,%xmm1
mulss  0xee3(%rip),%xmm0
mulss  %xmm1,%xmm0
mulss  %xmm1,%xmm0
addss  0xed7(%rip),%xmm0
mulss  %xmm1,%xmm0
cvtss2sd %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @InvSqrt(double %0) {
%2 = alloca double
%3 = alloca float
%4 = alloca float
%5 = alloca i32
store double %0, double* %2
%6 = load double, double* %2
%7 = fptrunc double %6 to float
store float %7, float* %3
%8 = load float, float* %3
%9 = fmul float 5.000000e-01, %8
store float %9, float* %4
%10 = bitcast float* %3 to i32*
%11 = load i32, i32* %10
store i32 %11, i32* %5
%12 = load i32, i32* %5
%13 = ashr i32 %12, 1
%14 = sub nsw i32 1597463007, %13
store i32 %14, i32* %5
%15 = bitcast i32* %5 to float*
%16 = load float, float* %15
store float %16, float* %3
%17 = load float, float* %3
%18 = load float, float* %4
%19 = load float, float* %3
%20 = fmul float %18, %19
%21 = load float, float* %3
%22 = fneg float %20
%23 = call float @llvm.fmuladd.f32(float %22, float %21, float 1.500000e+00)
%24 = fmul float %17, %23
store float %24, float* %3
%25 = load float, float* %3
%26 = fpext float %25 to double
store double %26, double* %2
%27 = load double, double* %2
ret double %27
}

LLVM IR (-O2):
define double @InvSqrt(double %0) {
%2 = fptrunc double %0 to float
%3 = bitcast float %2 to i32
%4 = ashr i32 %3, 1
%5 = sub nsw i32 1597463007, %4
%6 = bitcast i32 %5 to float
%7 = fmul float %2, -5.000000e-01
%8 = fmul float %7, %6
%9 = tail call float @llvm.fmuladd.f32(float %8, float %6, float 1.500000e+00)
%10 = fmul float %9, %6
%11 = fpext float %10 to double
ret double %11
}
/* Variables and functions */
scalar_t__ isspace(char);
void eatWhitespace(char **iterator) {
  while (**iterator && isspace(**iterator)) {
    ++*iterator;
  }
}


x86 assembly (clang, -O0):
<eatWhitespace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
je     114d <eatWhitespace+0x3d>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    115d <eatWhitespace+0x4d>
jmp    1170 <eatWhitespace+0x60>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
jmp    111c <eatWhitespace+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eatWhitespace>:
push   %rbx
mov    (%rdi),%rax
mov    (%rax),%al
test   %al,%al
je     113f <eatWhitespace+0x2f>
mov    %rdi,%rbx
nopl   (%rax)
movsbl %al,%edi
call   1030 <isspace@plt>
test   %rax,%rax
je     113f <eatWhitespace+0x2f>
mov    (%rbx),%rax
lea    0x1(%rax),%rcx
mov    %rcx,(%rbx)
movzbl 0x1(%rax),%eax
test   %al,%al
jne    1120 <eatWhitespace+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @eatWhitespace(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
br label %3
3: ; preds = %17, %1
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %3
%10 = load i8**, i8*** %2
%11 = load i8*, i8** %10
%12 = load i8, i8* %11
%13 = call i64 @isspace(i8 signext %12)
%14 = icmp ne i64 %13, 0
br label %15
15: ; preds = %9, %3
%16 = phi i1 [ false, %3 ], [ %14, %9 ]
br i1 %16, label %17, label %21
17: ; preds = %15
%18 = load i8**, i8*** %2
%19 = load i8*, i8** %18
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %18
br label %3
21: ; preds = %15
ret void
}

LLVM IR (-O2):
define void @eatWhitespace(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = load i8, i8* %2
%4 = icmp eq i8 %3, 0
br i1 %4, label %14, label %5
5: ; preds = %1, %9
%6 = phi i8 [ %12, %9 ], [ %3, %1 ]
%7 = tail call i64 @isspace(i8 signext %6)
%8 = icmp eq i64 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %5
%10 = load i8*, i8** %0
%11 = getelementptr inbounds i8, i8* %10, i64 1
store i8* %11, i8** %0
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %5
14: ; preds = %5, %9, %1
ret void
}
int coq_feq(double x, double y) { return x == y; }


x86 assembly (clang, -O0):
<coq_feq>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<coq_feq>:
cmpeqsd %xmm1,%xmm0
movq   %xmm0,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @coq_feq(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp oeq double %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @coq_feq(double %0, double %1) {
%3 = fcmp oeq double %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
float acosf(float x) {
  float res = 0.0F;
  asm volatile("fld	%%st\n\t"
               "fmul	%%st(0)\n\t"
               "fld1\n\t"
               "fsubp\n\t"
               "fsqrt\n\t"
               "fxch	%%st(1)\n\t"
               "fpatan"
               : "=t"(res)
               : "0"(x)
               : "st(1)");
  return res;
}


x86 assembly (clang, -O0):
<acosf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
xorps  %xmm0,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
flds   -0xc(%rbp)
fld    %st(0)
fmul   %st(0),%st
fld1
fsubp  %st,%st(1)
fsqrt
fxch   %st(1)
fpatan
fstps  -0x10(%rbp)
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<acosf>:
movss  %xmm0,-0x4(%rsp)
flds   -0x4(%rsp)
fld    %st(0)
fmul   %st(0),%st
fld1
fsubp  %st,%st(1)
fsqrt
fxch   %st(1)
fpatan
fstps  -0x8(%rsp)
movss  -0x8(%rsp),%xmm0
ret

LLVM IR (-O0):
define float @acosf(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
store float 0.000000e+00, float* %3
%4 = load float, float* %2
%5 = call float asm sideeffect "fld\09%st\0A\09fmul\09%st(0)\0A\09fld1\0A\09fsubp\0A\09fsqrt\0A\09fxch\09%st(1)\0A\09fpatan", "={st},0,~{st(1)},~{dirflag},~{fpsr},~{flags}"(float %4)
store float %5, float* %3
%6 = load float, float* %3
ret float %6
}

LLVM IR (-O2):
define float @acosf(float %0) {
%2 = tail call float asm sideeffect "fld\09%st\0A\09fmul\09%st(0)\0A\09fld1\0A\09fsubp\0A\09fsqrt\0A\09fxch\09%st(1)\0A\09fpatan", "={st},0,~{st(1)},~{dirflag},~{fpsr},~{flags}"(float %0)
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ LockClaimGlobal();
void arenaClaimRingLock(void) { LockClaimGlobal(); }


x86 assembly (clang, -O0):
<arenaClaimRingLock>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <LockClaimGlobal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arenaClaimRingLock>:
xor    %eax,%eax
jmp    1030 <LockClaimGlobal@plt>

LLVM IR (-O0):
define void @arenaClaimRingLock() {
%1 = call i32 (...) @LockClaimGlobal()
ret void
}

LLVM IR (-O2):
define void @arenaClaimRingLock() {
%1 = tail call i32 (...) @LockClaimGlobal()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char const *);
int /*<<< orphan*/ stderr;
int _perror(char const *message, int ret) {
  fputs("modems: ", stderr);
  perror(message);
  return ret;
}


x86 assembly (clang, -O0):
<_perror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%esi
lea    0xec1(%rip),%rdi
call   1030 <fputs@plt>
mov    -0x8(%rbp),%rdi
call   1040 <perror@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_perror>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
lea    0xec8(%rip),%rdi
call   1030 <fputs@plt>
mov    %rbx,%rdi
call   1040 <perror@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [9 x i8] c"modems: \00"
@stderr = global i32 0
define i32 @_perror(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = call i32 @fputs(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i8*, i8** %3
%8 = call i32 @perror(i8* %7)
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
@.str = [9 x i8] c"modems: \00"
@stderr = global i32 0
define i32 @_perror(i8* nocapture %0, i32 returned %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fputs(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = tail call i32 @perror(i8* %0)
ret i32 %1
}
/* Variables and functions */
int sendCommand(char *);
int /*<<< orphan*/ sprintf(char *, char *, int, char);
int ti102_write(int address, char v0) {
  char str[128];
  sprintf(str, "hcitool cmd 0x3f 0x15 0x%x 0x00 0x%x", address, v0);
  return sendCommand(str);
}


x86 assembly (clang, -O0):
<ti102_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x90,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
lea    -0x90(%rbp),%rdi
mov    -0x4(%rbp),%edx
lea    0xebb(%rip),%rsi
movsbl -0x5(%rbp),%ecx
call   1040 <sprintf@plt>
lea    -0x90(%rbp),%rdi
call   1030 <sendCommand@plt>
add    $0x90,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ti102_write>:
push   %rbx
sub    $0x80,%rsp
mov    %esi,%ecx
mov    %edi,%edx
lea    0xecd(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <sendCommand@plt>
add    $0x80,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [37 x i8] c"hcitool cmd 0x3f 0x15 0x%x 0x00 0x%x\00"
define i32 @ti102_write(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca [128 x i8]
store i32 %0, i32* %3
store i8 %1, i8* %4
%6 = getelementptr inbounds [128 x i8], [128 x i8]* %5, i64 0, i64 0
%7 = load i32, i32* %3
%8 = load i8, i8* %4
%9 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 %7, i8 signext %8)
%10 = getelementptr inbounds [128 x i8], [128 x i8]* %5, i64 0, i64 0
%11 = call i32 @sendCommand(i8* %10)
ret i32 %11
}

LLVM IR (-O2):
@.str = [37 x i8] c"hcitool cmd 0x3f 0x15 0x%x 0x00 0x%x\00"
define i32 @ti102_write(i32 %0, i8 signext %1) {
%3 = alloca [128 x i8]
%4 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 0
%5 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 %0, i8 signext %1)
%6 = call i32 @sendCommand(i8* %4)
ret i32 %6
}
char *strchr(const char *s, char c) {
  while (*s != '\0') {
    if (*s == c) {
      return (char *)s;
    }
    s++;
  }
  return ((void *)0);
}


x86 assembly (clang, -O0):
<strchr>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     114f <strchr+0x4f>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x11(%rbp),%ecx
cmp    %ecx,%eax
jne    113e <strchr+0x3e>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1157 <strchr+0x57>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110e <strchr+0xe>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strchr>:
mov    (%rdi),%cl
test   %cl,%cl
je     1121 <strchr+0x21>
mov    %rdi,%rax
nopl   0x0(%rax)
cmp    %sil,%cl
je     1123 <strchr+0x23>
movzbl 0x1(%rax),%ecx
add    $0x1,%rax
test   %cl,%cl
jne    1110 <strchr+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @strchr(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
br label %6
6: ; preds = %20, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %23
11: ; preds = %6
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = load i8, i8* %5
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %14, %16
br i1 %17, label %18, label %20
18: ; preds = %11
%19 = load i8*, i8** %4
store i8* %19, i8** %3
br label %24
20: ; preds = %11
%21 = load i8*, i8** %4
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %4
br label %6
23: ; preds = %6
store i8* null, i8** %3
br label %24
24: ; preds = %23, %18
%25 = load i8*, i8** %3
ret i8* %25
}

LLVM IR (-O2):
define i8* @strchr(i8* %0, i8 signext %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %9
%6 = phi i8 [ %11, %9 ], [ %3, %2 ]
%7 = phi i8* [ %10, %9 ], [ %0, %2 ]
%8 = icmp eq i8 %6, %1
br i1 %8, label %13, label %9
9: ; preds = %5
%10 = getelementptr inbounds i8, i8* %7, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %9, %2
%14 = phi i8* [ null, %2 ], [ null, %9 ], [ %7, %5 ]
ret i8* %14
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0xc0() {
  Assert_real((iscntrl(192) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              965, ("iscntrl should be 0 for 0xc0"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0xc0>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc0,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3c5,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0xc0>:
push   %rax
mov    $0xc0,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3c5,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 0 for 0xc0\00"
define void @t_iscntrl_0xc0() {
%1 = call i64 @iscntrl(i32 192)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 965, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 0 for 0xc0\00"
define void @t_iscntrl_0xc0() {
%1 = tail call i64 @iscntrl(i32 192)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 965, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
long long bit32() { return 0x0000000100000000LL; }


x86 assembly (clang, -O0):
<bit32>:
push   %rbp
mov    %rsp,%rbp
movabs $0x100000000,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit32>:
movabs $0x100000000,%rax
ret

LLVM IR (-O0):
define i64 @bit32() {
ret i64 4294967296
}

LLVM IR (-O2):
define i64 @bit32() {
ret i64 4294967296
}
int f1(int t, int v) {
  int a = t - 1;
  int b = a * v;
  return b + v;
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @f1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %7, 1
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = mul nsw i32 %9, %10
store i32 %11, i32* %6
%12 = load i32, i32* %6
%13 = load i32, i32* %4
%14 = add nsw i32 %12, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @f1(i32 %0, i32 %1) {
%3 = mul i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int f323(int *);
int f324(int *p) { return f323(p); }


x86 assembly (clang, -O0):
<f324>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f323@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f324>:
jmp    1030 <f323@plt>

LLVM IR (-O0):
define i32 @f324(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f323(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f324(i32* %0) {
%2 = tail call i32 @f323(i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ output(int /*<<< orphan*/);
int main(void) { output(0); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <output@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <output@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @output(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @output(i32 0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ _SC_NPROCESSORS_ONLN;
int sysconf(int /*<<< orphan*/);
int ct_nprocs() { return sysconf(_SC_NPROCESSORS_ONLN); }


x86 assembly (clang, -O0):
<ct_nprocs>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <sysconf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ct_nprocs>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <sysconf@plt>

LLVM IR (-O0):
@_SC_NPROCESSORS_ONLN = global i32 0
define i32 @ct_nprocs() {
%1 = load i32, i32* @_SC_NPROCESSORS_ONLN
%2 = call i32 @sysconf(i32 %1)
ret i32 %2
}

LLVM IR (-O2):
@_SC_NPROCESSORS_ONLN = global i32 0
define i32 @ct_nprocs() {
%1 = load i32, i32* @_SC_NPROCESSORS_ONLN
%2 = tail call i32 @sysconf(i32 %1)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ assem_debug(char *, int, int);
int /*<<< orphan*/ output_w32(int);
void emit_fabsd(int s, int d) {
  assem_debug("fabsd s%d,d%d", d, s);
  output_w32(0xeeb00bc0 | ((d & 7) << 12) | (s & 7));
}


x86 assembly (clang, -O0):
<emit_fabsd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%esi
mov    -0x4(%rbp),%edx
lea    0xec5(%rip),%rdi
call   1030 <assem_debug@plt>
mov    -0x8(%rbp),%edi
and    $0x7,%edi
shl    $0xc,%edi
or     $0xeeb00bc0,%edi
mov    -0x4(%rbp),%eax
and    $0x7,%eax
or     %eax,%edi
call   1040 <output_w32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_fabsd>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%r14d
lea    0xed0(%rip),%rdi
mov    %r14d,%edx
call   1030 <assem_debug@plt>
and    $0x7,%ebx
shl    $0xc,%ebx
and    $0x7,%r14d
lea    (%r14,%rbx,1),%edi
add    $0xeeb00bc0,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <output_w32@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"fabsd s%d,d%d\00"
define void @emit_fabsd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = call i32 @assem_debug(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6)
%8 = load i32, i32* %4
%9 = and i32 %8, 7
%10 = shl i32 %9, 12
%11 = or i32 -290452544, %10
%12 = load i32, i32* %3
%13 = and i32 %12, 7
%14 = or i32 %11, %13
%15 = call i32 @output_w32(i32 %14)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"fabsd s%d,d%d\00"
define void @emit_fabsd(i32 %0, i32 %1) {
%3 = tail call i32 @assem_debug(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %1, i32 %0)
%4 = shl i32 %1, 12
%5 = and i32 %4, 28672
%6 = and i32 %0, 7
%7 = or i32 %6, %5
%8 = or i32 %7, -290452544
%9 = tail call i32 @output_w32(i32 %8)
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ root;
};
struct TYPE_4__ {
  TYPE_1__ xmotion;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
unsigned long get_XEvent_xmotion_root(void *_p) {
  return (unsigned long)((XEvent *)_p)->xmotion.root;
}


x86 assembly (clang, -O0):
<get_XEvent_xmotion_root>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xmotion_root>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i64 @get_XEvent_xmotion_root(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @get_XEvent_xmotion_root(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
int is_letter(const char ch) {
  if ((ch >= 'a' && ch <= 'z') || (ch >= 'A' && ch <= 'Z') ||
      (ch >= '0' && ch <= '9') || ch == '\'' || ch == '-')
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<is_letter>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1124 <is_letter+0x24>
movsbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
jle    1172 <is_letter+0x72>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     113e <is_letter+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jle    1172 <is_letter+0x72>
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1158 <is_letter+0x58>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jle    1172 <is_letter+0x72>
movsbl -0x5(%rbp),%eax
cmp    $0x27,%eax
je     1172 <is_letter+0x72>
movsbl -0x5(%rbp),%eax
cmp    $0x2d,%eax
jne    117e <is_letter+0x7e>
movl   $0x1,-0x4(%rbp)
jmp    1185 <is_letter+0x85>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_letter>:
mov    %edi,%eax
and    $0xdf,%al
add    $0xbf,%al
cmp    $0x1a,%al
setb   %al
lea    -0x30(%rdi),%ecx
cmp    $0xa,%cl
setb   %cl
or     %al,%cl
cmp    $0x2d,%dil
sete   %al
cmp    $0x27,%dil
sete   %dl
or     %al,%dl
or     %cl,%dl
movzbl %dl,%eax
ret

LLVM IR (-O0):
define i32 @is_letter(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 97
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 122
br i1 %10, label %35, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp sge i32 %13, 65
br i1 %14, label %15, label %19
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp sle i32 %17, 90
br i1 %18, label %35, label %19
19: ; preds = %15, %11
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp sge i32 %21, 48
br i1 %22, label %23, label %27
23: ; preds = %19
%24 = load i8, i8* %3
%25 = sext i8 %24 to i32
%26 = icmp sle i32 %25, 57
br i1 %26, label %35, label %27
27: ; preds = %23, %19
%28 = load i8, i8* %3
%29 = sext i8 %28 to i32
%30 = icmp eq i32 %29, 39
br i1 %30, label %35, label %31
31: ; preds = %27
%32 = load i8, i8* %3
%33 = sext i8 %32 to i32
%34 = icmp eq i32 %33, 45
br i1 %34, label %35, label %36
35: ; preds = %31, %27, %23, %15, %7
store i32 1, i32* %2
br label %37
36: ; preds = %31
store i32 0, i32* %2
br label %37
37: ; preds = %36, %35
%38 = load i32, i32* %2
ret i32 %38
}

LLVM IR (-O2):
define i32 @is_letter(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = add i8 %0, -48
%6 = icmp ult i8 %5, 10
%7 = or i1 %6, %4
%8 = icmp eq i8 %0, 45
%9 = icmp eq i8 %0, 39
%10 = or i1 %8, %9
%11 = or i1 %10, %7
%12 = zext i1 %11 to i32
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ invalid_phase(char *);
void phase_3(char *input) { invalid_phase("3c"); }


x86 assembly (clang, -O0):
<phase_3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <invalid_phase@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<phase_3>:
lea    0xee9(%rip),%rdi
jmp    1030 <invalid_phase@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"3c\00"
define void @phase_3(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @invalid_phase(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"3c\00"
define void @phase_3(i8* nocapture readnone %0) {
%2 = tail call i32 @invalid_phase(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}
unsigned int get_module_rev(struct ssp_data *data) { return 15071700; }


x86 assembly (clang, -O0):
<get_module_rev>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xe5f9d4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_module_rev>:
mov    $0xe5f9d4,%eax
ret

LLVM IR (-O0):
%struct.ssp_data = type opaque
define i32 @get_module_rev(%struct.ssp_data* %0) {
%2 = alloca %struct.ssp_data*
store %struct.ssp_data* %0, %struct.ssp_data** %2
ret i32 15071700
}

LLVM IR (-O2):
%struct.ssp_data = type opaque
define i32 @get_module_rev(%struct.ssp_data* nocapture readnone %0) {
ret i32 15071700
}
int fetch_init(void) { return 0; }


x86 assembly (clang, -O0):
<fetch_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fetch_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fetch_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @fetch_init() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ twoDsim_emptyCbuffer();
void empty_cbuffer(void) { twoDsim_emptyCbuffer(); }


x86 assembly (clang, -O0):
<empty_cbuffer>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <twoDsim_emptyCbuffer@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<empty_cbuffer>:
xor    %eax,%eax
jmp    1030 <twoDsim_emptyCbuffer@plt>

LLVM IR (-O0):
define void @empty_cbuffer() {
%1 = call i32 (...) @twoDsim_emptyCbuffer()
ret void
}

LLVM IR (-O2):
define void @empty_cbuffer() {
%1 = tail call i32 (...) @twoDsim_emptyCbuffer()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
int ingreat_c(char *x, char *y) {
  printf("1 %d \n", (*x) - (*y));
  return (*x) - (*y);
}


x86 assembly (clang, -O0):
<ingreat_c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
sub    %ecx,%eax
lea    0xec9(%rip),%rdi
movsbl %al,%esi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
sub    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ingreat_c>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    (%rdi),%al
sub    (%rsi),%al
movsbl %al,%esi
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
movsbl (%rbx),%eax
movsbl (%r14),%ecx
sub    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [7 x i8] c"1 %d \0A\00"
define i32 @ingreat_c(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = sub nsw i32 %7, %10
%12 = trunc i32 %11 to i8
%13 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8 signext %12)
%14 = load i8*, i8** %3
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = load i8*, i8** %4
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = sub nsw i32 %16, %19
ret i32 %20
}

LLVM IR (-O2):
@.str = [7 x i8] c"1 %d \0A\00"
define i32 @ingreat_c(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
%5 = sub i8 %3, %4
%6 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8 signext %5)
%7 = load i8, i8* %0
%8 = sext i8 %7 to i32
%9 = load i8, i8* %1
%10 = sext i8 %9 to i32
%11 = sub nsw i32 %8, %10
ret i32 %11
}
int addition(int x, int y) { return (x + y); }


x86 assembly (clang, -O0):
<addition>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<addition>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @addition(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @addition(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
int test_imm_BEint16_reg(short val) {
  return ((val) & (-0xBE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_BEint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffff42,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_BEint16_reg>:
test   $0xff42,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_BEint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -190
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_BEint16_reg(i16 signext %0) {
%2 = and i16 %0, -190
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
double divide(unsigned a, unsigned b) {
  if (b == 0)
    return -1;
  return (a * 1.0) / b;
}


x86 assembly (clang, -O0):
<divide>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    1126 <divide+0x26>
movsd  0xee4(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    113f <divide+0x3f>
mov    -0xc(%rbp),%eax
cvtsi2sd %rax,%xmm0
mov    -0x10(%rbp),%eax
cvtsi2sd %rax,%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<divide>:
test   %esi,%esi
je     1117 <divide+0x17>
mov    %edi,%eax
cvtsi2sd %rax,%xmm0
mov    %esi,%eax
cvtsi2sd %rax,%xmm1
divsd  %xmm1,%xmm0
ret
movsd  0xee1(%rip),%xmm0
ret

LLVM IR (-O0):
define double @divide(i32 %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store double -1.000000e+00, double* %3
br label %16
9: ; preds = %2
%10 = load i32, i32* %4
%11 = uitofp i32 %10 to double
%12 = fmul double %11, 1.000000e+00
%13 = load i32, i32* %5
%14 = uitofp i32 %13 to double
%15 = fdiv double %12, %14
store double %15, double* %3
br label %16
16: ; preds = %9, %8
%17 = load double, double* %3
ret double %17
}

LLVM IR (-O2):
define double @divide(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = uitofp i32 %0 to double
%6 = uitofp i32 %1 to double
%7 = fdiv double %5, %6
br label %8
8: ; preds = %2, %4
%9 = phi double [ %7, %4 ], [ -1.000000e+00, %2 ]
ret double %9
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void delay(int ms) { usleep(ms * 1000); }


x86 assembly (clang, -O0):
<delay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay>:
imul   $0x3e8,%edi,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @delay(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 1000
%5 = call i32 @usleep(i32 %4)
ret void
}

LLVM IR (-O2):
define void @delay(i32 %0) {
%2 = mul nsw i32 %0, 1000
%3 = tail call i32 @usleep(i32 %2)
ret void
}
/* Type definitions */
struct epoll_event {
  int dummy;
};

/* Variables and functions */
int epoll_ctl(int, int, int, struct epoll_event *);
int epoll_ctl_portable(int epfd, int op, int fd, struct epoll_event *event) {
  return epoll_ctl(epfd, op, fd, event);
}


x86 assembly (clang, -O0):
<epoll_ctl_portable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
call   1030 <epoll_ctl@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<epoll_ctl_portable>:
jmp    1030 <epoll_ctl@plt>

LLVM IR (-O0):
%struct.epoll_event = type { i32 }
define i32 @epoll_ctl_portable(i32 %0, i32 %1, i32 %2, %struct.epoll_event* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca %struct.epoll_event*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store %struct.epoll_event* %3, %struct.epoll_event** %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load %struct.epoll_event*, %struct.epoll_event** %8
%13 = call i32 @epoll_ctl(i32 %9, i32 %10, i32 %11, %struct.epoll_event* %12)
ret i32 %13
}

LLVM IR (-O2):
%struct.epoll_event = type { i32 }
define i32 @epoll_ctl_portable(i32 %0, i32 %1, i32 %2, %struct.epoll_event* %3) {
%5 = tail call i32 @epoll_ctl(i32 %0, i32 %1, i32 %2, %struct.epoll_event* %3)
ret i32 %5
}