xunge/DecIR huggingface dataset:
void rop3_42_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = T & S;
  stk2 = ~stk2;
  stk1 = *D & stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_42_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_42_1_1>:
ret

LLVM IR (-O0):
define void @rop3_42_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8, i8* %6
%10 = zext i8 %9 to i32
%11 = load i8, i8* %5
%12 = zext i8 %11 to i32
%13 = and i32 %10, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %8
%15 = load i8, i8* %8
%16 = zext i8 %15 to i32
%17 = xor i32 %16, -1
%18 = trunc i32 %17 to i8
store i8 %18, i8* %8
%19 = load i8*, i8** %4
%20 = load i8, i8* %19
%21 = zext i8 %20 to i32
%22 = load i8, i8* %8
%23 = zext i8 %22 to i32
%24 = and i32 %21, %23
%25 = trunc i32 %24 to i8
store i8 %25, i8* %7
%26 = load i8, i8* %7
%27 = zext i8 %26 to i32
%28 = load i8, i8* %5
%29 = zext i8 %28 to i32
%30 = xor i32 %29, -1
%31 = and i32 %27, %30
%32 = load i8, i8* %6
%33 = zext i8 %32 to i32
%34 = xor i32 %33, -1
%35 = and i32 %31, %34
%36 = load i8*, i8** %4
%37 = load i8, i8* %36
%38 = zext i8 %37 to i32
%39 = load i8, i8* %5
%40 = zext i8 %39 to i32
%41 = and i32 %38, %40
%42 = or i32 %35, %41
%43 = load i8*, i8** %4
%44 = load i8, i8* %43
%45 = zext i8 %44 to i32
%46 = load i8, i8* %6
%47 = zext i8 %46 to i32
%48 = and i32 %45, %47
%49 = or i32 %42, %48
%50 = trunc i32 %49 to i8
%51 = load i8*, i8** %4
store i8 %50, i8* %51
ret void
}

LLVM IR (-O2):
define void @rop3_42_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CX4_immediate_reg(int);
void CX4_op60(void) { CX4_immediate_reg(3); }


x86 assembly (clang, -O0):
<CX4_op60>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <CX4_immediate_reg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CX4_op60>:
mov    $0x3,%edi
jmp    1030 <CX4_immediate_reg@plt>

LLVM IR (-O0):
define void @CX4_op60() {
%1 = call i32 @CX4_immediate_reg(i32 3)
ret void
}

LLVM IR (-O2):
define void @CX4_op60() {
%1 = tail call i32 @CX4_immediate_reg(i32 3)
ret void
}
/* Variables and functions */
int epoll_create(int);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char **argv) {
  int fd;
  int i;
  for (i = 0; i < 1000; ++i) {
    fd = epoll_create(1024);
    printf("HelloWorld! %d\n", fd);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x18(%rbp)
cmpl   $0x3e8,-0x18(%rbp)
jge    1174 <main+0x54>
mov    $0x400,%edi
call   1040 <epoll_create@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xe9f(%rip),%rdi
call   1030 <printf@plt>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    113d <main+0x1d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    $0x3e8,%ebp
lea    0xed1(%rip),%rbx
nop
mov    $0x400,%edi
call   1040 <epoll_create@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
add    $0xffffffff,%ebp
jne    1130 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [16 x i8] c"HelloWorld! %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %7
br label %8
8: ; preds = %15, %2
%9 = load i32, i32* %7
%10 = icmp slt i32 %9, 1000
br i1 %10, label %11, label %18
11: ; preds = %8
%12 = call i32 @epoll_create(i32 1024)
store i32 %12, i32* %6
%13 = load i32, i32* %6
%14 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %13)
br label %15
15: ; preds = %11
%16 = load i32, i32* %7
%17 = add nsw i32 %16, 1
store i32 %17, i32* %7
br label %8
18: ; preds = %8
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"HelloWorld! %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
br label %3
3: ; preds = %2, %3
%4 = phi i32 [ 0, %2 ], [ %7, %3 ]
%5 = tail call i32 @epoll_create(i32 1024)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = add nuw nsw i32 %4, 1
%8 = icmp eq i32 %7, 1000
br i1 %8, label %9, label %3
9: ; preds = %3
ret i32 0
}
void packcombine(int *strchr, int rest, int bitno_rest) {
  *strchr = *strchr << bitno_rest;
  *strchr += rest;
}


x86 assembly (clang, -O0):
<packcombine>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%ecx
shl    %cl,%eax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
add    (%rax),%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<packcombine>:
mov    %edx,%ecx
mov    (%rdi),%eax
shl    %cl,%eax
add    %esi,%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @packcombine(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = load i32, i32* %6
%10 = shl i32 %8, %9
%11 = load i32*, i32** %4
store i32 %10, i32* %11
%12 = load i32, i32* %5
%13 = load i32*, i32** %4
%14 = load i32, i32* %13
%15 = add nsw i32 %14, %12
store i32 %15, i32* %13
ret void
}

LLVM IR (-O2):
define void @packcombine(i32* nocapture %0, i32 %1, i32 %2) {
%4 = load i32, i32* %0
%5 = shl i32 %4, %2
%6 = add nsw i32 %5, %1
store i32 %6, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0x64() {
  Assert_real((isupper(100) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              505, ("isupper should be 0 for d"));
}


x86 assembly (clang, -O0):
<t_isupper_0x64>:
push   %rbp
mov    %rsp,%rbp
mov    $0x64,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x1f9,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0x64>:
push   %rax
mov    $0x64,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x1f9,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [26 x i8] c"isupper should be 0 for d\00"
define void @t_isupper_0x64() {
%1 = call i64 @isupper(i32 100)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 505, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [26 x i8] c"isupper should be 0 for d\00"
define void @t_isupper_0x64() {
%1 = tail call i64 @isupper(i32 100)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 505, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
__attribute__((no)) void baz(int x) { asm volatile("" : : "r"(x) : "memory"); }


x86 assembly (clang, -O0):
<baz>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz>:
ret

LLVM IR (-O0):
define void @baz(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret void
}

LLVM IR (-O2):
define void @baz(i32 %0) {
tail call void asm sideeffect "", "r,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %0)
ret void
}
float FRingBuffer_at(float *array, unsigned int row, unsigned int col,
                     unsigned int width) {
  return array[row * width + col];
}


x86 assembly (clang, -O0):
<FRingBuffer_at>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
imul   -0x14(%rbp),%ecx
add    -0x10(%rbp),%ecx
mov    %ecx,%ecx
movss  (%rax,%rcx,4),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<FRingBuffer_at>:
imul   %ecx,%esi
add    %edx,%esi
movss  (%rdi,%rsi,4),%xmm0
ret

LLVM IR (-O0):
define float @FRingBuffer_at(float* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca float*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store float* %0, float** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load float*, float** %5
%10 = load i32, i32* %6
%11 = load i32, i32* %8
%12 = mul i32 %10, %11
%13 = load i32, i32* %7
%14 = add i32 %12, %13
%15 = zext i32 %14 to i64
%16 = getelementptr inbounds float, float* %9, i64 %15
%17 = load float, float* %16
ret float %17
}

LLVM IR (-O2):
define float @FRingBuffer_at(float* nocapture %0, i32 %1, i32 %2, i32 %3) {
%5 = mul i32 %3, %1
%6 = add i32 %5, %2
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds float, float* %0, i64 %7
%9 = load float, float* %8
ret float %9
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
void cut() { sleep(3); }


x86 assembly (clang, -O0):
<cut>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <sleep@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cut>:
mov    $0x3,%edi
jmp    1030 <sleep@plt>

LLVM IR (-O0):
define void @cut() {
%1 = call i32 @sleep(i32 3)
ret void
}

LLVM IR (-O2):
define void @cut() {
%1 = tail call i32 @sleep(i32 3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void **);
void darray_free(void **arr) {
  if (arr != NULL)
    free(arr);
}


x86 assembly (clang, -O0):
<darray_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <darray_free+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<darray_free>:
test   %rdi,%rdi
je     111a <darray_free+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @darray_free(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = icmp ne i8** %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8**, i8*** %2
%7 = call i32 @free(i8** %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @darray_free(i8** %0) {
%2 = icmp eq i8** %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8** %0)
br label %5
5: ; preds = %3, %1
ret void
}
int test_imm_B5uint16_reg(unsigned short val) {
  return ((val) & (0xB5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B5uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xb5,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B5uint16_reg>:
test   $0xb5,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B5uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 181
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_B5uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 181
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
__attribute__((always_)) __attribute__((__const__)) int
get_order(unsigned long size) {
  int order;
  size = (size - 1) >> (12 - 1);
  order = -1;
  do {
    size >>= 1;
    order++;
  } while (size);
  return order;
}


x86 assembly (clang, -O0):
<get_order>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
sub    $0x1,%rax
shr    $0xb,%rax
mov    %rax,-0x8(%rbp)
movl   $0xffffffff,-0xc(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    111f <get_order+0x1f>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_order>:
add    $0xffffffffffffffff,%rdi
shr    $0xb,%rdi
mov    $0xffffffff,%eax
mov    %rdi,%rcx
shr    %rcx
add    $0x1,%eax
cmp    $0x1,%rdi
mov    %rcx,%rdi
ja     1110 <get_order+0x10>
ret

LLVM IR (-O0):
define i32 @get_order(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = sub i64 %4, 1
%6 = lshr i64 %5, 11
store i64 %6, i64* %2
store i32 -1, i32* %3
br label %7
7: ; preds = %12, %1
%8 = load i64, i64* %2
%9 = lshr i64 %8, 1
store i64 %9, i64* %2
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %12
12: ; preds = %7
%13 = load i64, i64* %2
%14 = icmp ne i64 %13, 0
br i1 %14, label %7, label %15
15: ; preds = %12
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @get_order(i64 %0) {
%2 = add i64 %0, -1
%3 = lshr i64 %2, 11
br label %4
4: ; preds = %4, %1
%5 = phi i64 [ %3, %1 ], [ %7, %4 ]
%6 = phi i32 [ -1, %1 ], [ %8, %4 ]
%7 = lshr i64 %5, 1
%8 = add nsw i32 %6, 1
%9 = icmp ult i64 %5, 2
br i1 %9, label %10, label %4
10: ; preds = %4
ret i32 %8
}
extern int test_mmx() {
  int retval;
  __asm__ __volatile__("cpuid\n\t"
                       "testl $23, %%edx\n\t"
                       "setnzb %%al\n\t"
                       "movzx %%al, %%eax"
                       : "=a"(retval)
                       : "a"(0)
                       : "ebx", "ecx", "edx");
  return retval;
}


x86 assembly (clang, -O0):
<test_mmx>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
xor    %eax,%eax
cpuid
test   $0x17,%edx
setne  %al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mmx>:
push   %rbx
xor    %eax,%eax
cpuid
test   $0x17,%edx
setne  %al
movzbl %al,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @test_mmx() {
%1 = alloca i32
%2 = call i32 asm sideeffect "cpuid\0A\09testl $$23, %edx\0A\09setnzb %al\0A\09movzx %al, %eax", "={ax},{ax},~{ebx},~{ecx},~{edx},~{dirflag},~{fpsr},~{flags}"(i32 0)
store i32 %2, i32* %1
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @test_mmx() {
%1 = tail call i32 asm sideeffect "cpuid\0A\09testl $$23, %edx\0A\09setnzb %al\0A\09movzx %al, %eax", "={ax},{ax},~{ebx},~{ecx},~{edx},~{dirflag},~{fpsr},~{flags}"(i32 0)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ F_GETFL;
int /*<<< orphan*/ F_SETFL;
int O_NONBLOCK;
int fcntl(int, int /*<<< orphan*/, ...);
int socket_set_nonblock(int fd) {
  int flags = fcntl(fd, F_GETFL);
  return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
}


x86 assembly (clang, -O0):
<socket_set_nonblock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eab(%rip),%rax
mov    (%rax),%esi
mov    $0x0,%al
call   1030 <fcntl@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2e9d(%rip),%rax
mov    (%rax),%esi
mov    -0x8(%rbp),%edx
mov    0x2ea1(%rip),%rax
or     (%rax),%edx
mov    $0x0,%al
call   1030 <fcntl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<socket_set_nonblock>:
push   %rbx
mov    %edi,%ebx
mov    0x2eb6(%rip),%rax
mov    (%rax),%esi
xor    %eax,%eax
call   1030 <fcntl@plt>
mov    0x2eae(%rip),%rcx
mov    (%rcx),%esi
mov    0x2eb5(%rip),%rcx
or     (%rcx),%eax
mov    %ebx,%edi
mov    %eax,%edx
xor    %eax,%eax
pop    %rbx
jmp    1030 <fcntl@plt>

LLVM IR (-O0):
@F_GETFL = global i32 0
@F_SETFL = global i32 0
@O_NONBLOCK = global i32 0
define i32 @socket_set_nonblock(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @F_GETFL
%6 = call i32 (i32, i32, ...) @fcntl(i32 %4, i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = load i32, i32* @F_SETFL
%9 = load i32, i32* %3
%10 = load i32, i32* @O_NONBLOCK
%11 = or i32 %9, %10
%12 = call i32 (i32, i32, ...) @fcntl(i32 %7, i32 %8, i32 %11)
ret i32 %12
}

LLVM IR (-O2):
@F_GETFL = global i32 0
@F_SETFL = global i32 0
@O_NONBLOCK = global i32 0
define i32 @socket_set_nonblock(i32 %0) {
%2 = load i32, i32* @F_GETFL
%3 = tail call i32 (i32, i32, ...) @fcntl(i32 %0, i32 %2)
%4 = load i32, i32* @F_SETFL
%5 = load i32, i32* @O_NONBLOCK
%6 = or i32 %5, %3
%7 = tail call i32 (i32, i32, ...) @fcntl(i32 %0, i32 %4, i32 %6)
ret i32 %7
}
int G_NextQueueTime(int queuedBP, int totalBP, int queueBaseRate) {
  float fractionQueued;
  if (totalBP == 0)
    return 0;
  fractionQueued = queuedBP / (float)totalBP;
  return (1.0f - fractionQueued) * queueBaseRate;
}


x86 assembly (clang, -O0):
<G_NextQueueTime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1123 <G_NextQueueTime+0x23>
movl   $0x0,-0x4(%rbp)
jmp    1153 <G_NextQueueTime+0x53>
cvtsi2ssl -0x8(%rbp),%xmm0
cvtsi2ssl -0xc(%rbp),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0x14(%rbp)
movss  0xec2(%rip),%xmm0
subss  -0x14(%rbp),%xmm0
cvtsi2ssl -0x10(%rbp),%xmm1
mulss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<G_NextQueueTime>:
test   %esi,%esi
je     1129 <G_NextQueueTime+0x29>
cvtsi2ss %edi,%xmm0
cvtsi2ss %esi,%xmm1
divss  %xmm1,%xmm0
movss  0xee8(%rip),%xmm1
cvtsi2ss %edx,%xmm2
subss  %xmm0,%xmm1
mulss  %xmm1,%xmm2
cvttss2si %xmm2,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @G_NextQueueTime(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca float
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i32, i32* %6
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %3
store i32 0, i32* %4
br label %24
12: ; preds = %3
%13 = load i32, i32* %5
%14 = sitofp i32 %13 to float
%15 = load i32, i32* %6
%16 = sitofp i32 %15 to float
%17 = fdiv float %14, %16
store float %17, float* %8
%18 = load float, float* %8
%19 = fsub float 1.000000e+00, %18
%20 = load i32, i32* %7
%21 = sitofp i32 %20 to float
%22 = fmul float %19, %21
%23 = fptosi float %22 to i32
store i32 %23, i32* %4
br label %24
24: ; preds = %12, %11
%25 = load i32, i32* %4
ret i32 %25
}

LLVM IR (-O2):
define i32 @G_NextQueueTime(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %1, 0
br i1 %4, label %13, label %5
5: ; preds = %3
%6 = sitofp i32 %0 to float
%7 = sitofp i32 %1 to float
%8 = fdiv float %6, %7
%9 = fsub float 1.000000e+00, %8
%10 = sitofp i32 %2 to float
%11 = fmul float %9, %10
%12 = fptosi float %11 to i32
br label %13
13: ; preds = %3, %5
%14 = phi i32 [ %12, %5 ], [ 0, %3 ]
ret i32 %14
}
/* Type definitions */
struct timespec {
  int dummy;
};
typedef int /*<<< orphan*/ *mqd_t;

/* Variables and functions */
int mq_timedsend(int /*<<< orphan*/ *, char *, size_t, unsigned int,
                 struct timespec *);
void test_mq_timedsend_prototype(void) {
  mqd_t mqdes;
  struct timespec timeout;
  char *msgp;
  int err;
  size_t msg_len;
  unsigned msg_prio;
  mqdes = NULL;
  msgp = NULL;
  msg_len = 0;
  msg_prio = 0;
  err = mq_timedsend(mqdes, msgp, msg_len, msg_prio, &timeout);
}


x86 assembly (clang, -O0):
<test_mq_timedsend_prototype>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movq   $0x0,-0x8(%rbp)
movq   $0x0,-0x18(%rbp)
movq   $0x0,-0x28(%rbp)
movl   $0x0,-0x2c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x28(%rbp),%rdx
mov    -0x2c(%rbp),%ecx
lea    -0x10(%rbp),%r8
call   1030 <mq_timedsend@plt>
mov    %eax,-0x1c(%rbp)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mq_timedsend_prototype>:
push   %rax
mov    %rsp,%r8
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
call   1030 <mq_timedsend@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
define void @test_mq_timedsend_prototype() {
%1 = alloca i32*
%2 = alloca %struct.timespec
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32* null, i32** %1
store i8* null, i8** %3
store i64 0, i64* %5
store i32 0, i32* %6
%7 = load i32*, i32** %1
%8 = load i8*, i8** %3
%9 = load i64, i64* %5
%10 = load i32, i32* %6
%11 = call i32 @mq_timedsend(i32* %7, i8* %8, i64 %9, i32 %10, %struct.timespec* %2)
store i32 %11, i32* %4
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
define void @test_mq_timedsend_prototype() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = call i32 @mq_timedsend(i32* null, i8* null, i64 0, i32 0, %struct.timespec* %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __sighandler_t;

/* Variables and functions */
int SA_INTERRUPT;
int SA_NOMASK;
int SA_ONESHOT;
int SA_RESTART;
int /*<<< orphan*/ __signal(int, int /*<<< orphan*/, int);
__sighandler_t signal(int sig, __sighandler_t handler) {
  return __signal(sig, handler,
                  (SA_ONESHOT | SA_NOMASK | SA_INTERRUPT) & ~SA_RESTART);
}


x86 assembly (clang, -O0):
<signal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    0x2e95(%rip),%rax
mov    (%rax),%edx
mov    0x2ebc(%rip),%rax
or     (%rax),%edx
mov    0x2e93(%rip),%rax
or     (%rax),%edx
mov    0x2e9a(%rip),%rax
mov    (%rax),%eax
xor    $0xffffffff,%eax
and    %eax,%edx
call   1030 <__signal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<signal>:
mov    0x2ea9(%rip),%rax
mov    0x2ed2(%rip),%rcx
mov    (%rcx),%ecx
or     (%rax),%ecx
mov    0x2ea7(%rip),%rax
or     (%rax),%ecx
mov    0x2eae(%rip),%rax
mov    (%rax),%edx
not    %edx
and    %ecx,%edx
jmp    1030 <__signal@plt>

LLVM IR (-O0):
@SA_ONESHOT = global i32 0
@SA_NOMASK = global i32 0
@SA_INTERRUPT = global i32 0
@SA_RESTART = global i32 0
define i32 @signal(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = load i32, i32* @SA_ONESHOT
%8 = load i32, i32* @SA_NOMASK
%9 = or i32 %7, %8
%10 = load i32, i32* @SA_INTERRUPT
%11 = or i32 %9, %10
%12 = load i32, i32* @SA_RESTART
%13 = xor i32 %12, -1
%14 = and i32 %11, %13
%15 = call i32 @__signal(i32 %5, i32 %6, i32 %14)
ret i32 %15
}

LLVM IR (-O2):
@SA_ONESHOT = global i32 0
@SA_NOMASK = global i32 0
@SA_INTERRUPT = global i32 0
@SA_RESTART = global i32 0
define i32 @signal(i32 %0, i32 %1) {
%3 = load i32, i32* @SA_ONESHOT
%4 = load i32, i32* @SA_NOMASK
%5 = or i32 %4, %3
%6 = load i32, i32* @SA_INTERRUPT
%7 = or i32 %5, %6
%8 = load i32, i32* @SA_RESTART
%9 = xor i32 %8, -1
%10 = and i32 %7, %9
%11 = tail call i32 @__signal(i32 %0, i32 %1, i32 %10)
ret i32 %11
}
int witem_cache_init(void) { return (0); }


x86 assembly (clang, -O0):
<witem_cache_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<witem_cache_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @witem_cache_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @witem_cache_init() {
ret i32 0
}
int instr_util_signx_byte(unsigned int val) {
  if (val & 0x00000080)
    val |= 0xffffff00;
  else
    val &= 0x000000ff;
  return (int)val;
}


x86 assembly (clang, -O0):
<instr_util_signx_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     1128 <instr_util_signx_byte+0x28>
mov    -0x4(%rbp),%eax
or     $0xffffff00,%eax
mov    %eax,-0x4(%rbp)
jmp    1133 <instr_util_signx_byte+0x33>
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<instr_util_signx_byte>:
movsbl %dil,%eax
movzbl %al,%ecx
and    $0xffffff00,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @instr_util_signx_byte(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 128
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = or i32 %7, -256
store i32 %8, i32* %2
br label %12
9: ; preds = %1
%10 = load i32, i32* %2
%11 = and i32 %10, 255
store i32 %11, i32* %2
br label %12
12: ; preds = %9, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @instr_util_signx_byte(i32 %0) {
%2 = and i32 %0, 128
%3 = icmp eq i32 %2, 0
%4 = and i32 %0, 255
%5 = select i1 %3, i32 0, i32 -256
%6 = or i32 %5, %4
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ db(int);
void rdtsc() {
  db(0x0F);
  db(0x31);
}


x86 assembly (clang, -O0):
<rdtsc>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf,%edi
call   1030 <db@plt>
mov    $0x31,%edi
call   1030 <db@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rdtsc>:
push   %rax
mov    $0xf,%edi
call   1030 <db@plt>
mov    $0x31,%edi
pop    %rax
jmp    1030 <db@plt>

LLVM IR (-O0):
define void @rdtsc() {
%1 = call i32 @db(i32 15)
%2 = call i32 @db(i32 49)
ret void
}

LLVM IR (-O2):
define void @rdtsc() {
%1 = tail call i32 @db(i32 15)
%2 = tail call i32 @db(i32 49)
ret void
}
unsigned int __mulu10(unsigned int n) { return (n << 3) + (n << 1); }


x86 assembly (clang, -O0):
<__mulu10>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x3,%eax
mov    -0x4(%rbp),%ecx
shl    $0x1,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__mulu10>:
add    %edi,%edi
lea    (%rdi,%rdi,4),%eax
ret

LLVM IR (-O0):
define i32 @__mulu10(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 3
%5 = load i32, i32* %2
%6 = shl i32 %5, 1
%7 = add i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @__mulu10(i32 %0) {
%2 = mul i32 %0, 10
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ dbexec(char *, int /*<<< orphan*/, int /*<<< orphan*/,
                          int /*<<< orphan*/);
void database_onconnect() { dbexec("update nicks set identified=0;", 0, 0, 0); }


x86 assembly (clang, -O0):
<database_onconnect>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
xor    %ecx,%ecx
mov    %ecx,%esi
mov    %ecx,%edx
call   1030 <dbexec@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<database_onconnect>:
lea    0xee9(%rip),%rdi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <dbexec@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"update nicks set identified=0;\00"
define void @database_onconnect() {
%1 = call i32 @dbexec(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 0, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"update nicks set identified=0;\00"
define void @database_onconnect() {
%1 = tail call i32 @dbexec(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 0, i32 0, i32 0)
ret void
}
void populate_periodicity(float *zrp, float *zip, int size, float zr,
                          float zi) {
  int more_size = size;
  while (size) {
    zrp[size] = zrp[--size];
    zip[more_size] = zip[--more_size];
  }
  zrp[0] = zr;
  zip[0] = zi;
}


x86 assembly (clang, -O0):
<populate_periodicity>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movss  %xmm0,-0x18(%rbp)
movss  %xmm1,-0x1c(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x20(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1172 <populate_periodicity+0x72>
mov    -0x8(%rbp),%rax
mov    -0x14(%rbp),%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x14(%rbp)
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm0
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movss  %xmm0,(%rax,%rcx,4)
mov    -0x10(%rbp),%rax
mov    -0x20(%rbp),%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x20(%rbp)
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm0
mov    -0x10(%rbp),%rax
movslq -0x20(%rbp),%rcx
movss  %xmm0,(%rax,%rcx,4)
jmp    111f <populate_periodicity+0x1f>
movss  -0x18(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x1c(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<populate_periodicity>:
movss  %xmm0,(%rdi)
movss  %xmm1,(%rsi)
ret

LLVM IR (-O0):
define void @populate_periodicity(float* %0, float* %1, i32 %2, float %3, float %4) {
%6 = alloca float*
%7 = alloca float*
%8 = alloca i32
%9 = alloca float
%10 = alloca float
%11 = alloca i32
store float* %0, float** %6
store float* %1, float** %7
store i32 %2, i32* %8
store float %3, float* %9
store float %4, float* %10
%12 = load i32, i32* %8
store i32 %12, i32* %11
br label %13
13: ; preds = %16, %5
%14 = load i32, i32* %8
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %37
16: ; preds = %13
%17 = load float*, float** %6
%18 = load i32, i32* %8
%19 = add nsw i32 %18, -1
store i32 %19, i32* %8
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds float, float* %17, i64 %20
%22 = load float, float* %21
%23 = load float*, float** %6
%24 = load i32, i32* %8
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds float, float* %23, i64 %25
store float %22, float* %26
%27 = load float*, float** %7
%28 = load i32, i32* %11
%29 = add nsw i32 %28, -1
store i32 %29, i32* %11
%30 = sext i32 %29 to i64
%31 = getelementptr inbounds float, float* %27, i64 %30
%32 = load float, float* %31
%33 = load float*, float** %7
%34 = load i32, i32* %11
%35 = sext i32 %34 to i64
%36 = getelementptr inbounds float, float* %33, i64 %35
store float %32, float* %36
br label %13
37: ; preds = %13
%38 = load float, float* %9
%39 = load float*, float** %6
%40 = getelementptr inbounds float, float* %39, i64 0
store float %38, float* %40
%41 = load float, float* %10
%42 = load float*, float** %7
%43 = getelementptr inbounds float, float* %42, i64 0
store float %41, float* %43
ret void
}

LLVM IR (-O2):
define void @populate_periodicity(float* nocapture writeonly %0, float* nocapture writeonly %1, i32 %2, float %3, float %4) {
store float %3, float* %0
store float %4, float* %1
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int numbtrop_standard_clear(void) {
  int fail, *a, *b;
  double *c;
  fail = _ada_use_c2phc4c(726, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<numbtrop_standard_clear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x2d6,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<numbtrop_standard_clear>:
mov    $0x2d6,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @numbtrop_standard_clear() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca double*
%5 = load i32*, i32** %2
%6 = load i32*, i32** %3
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 726, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %1
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
define i32 @numbtrop_standard_clear() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 726, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void out_word(unsigned short word) {
  static int words = 0;
  printf("0x%04x, ", word);
  if (++words == 8) {
    words = 0;
    printf("\n\t");
  }
}


x86 assembly (clang, -O0):
<out_word>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%esi
lea    0xed6(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    0x2ef5(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2eec(%rip)
cmp    $0x8,%eax
jne    1161 <out_word+0x51>
movl   $0x0,0x2ed9(%rip)
lea    0xeaf(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<out_word>:
push   %rax
mov    %edi,%esi
lea    0xee6(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
mov    0x2f05(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2efc(%rip)
cmp    $0x8,%eax
jne    114e <out_word+0x3e>
movl   $0x0,0x2eed(%rip)
lea    0xec3(%rip),%rdi
xor    %eax,%eax
pop    %rcx
jmp    1030 <printf@plt>
pop    %rax
ret

LLVM IR (-O0):
@out_word.words = internal global i32 0
@.str = [9 x i8] c"0x%04x, \00"
@.str.1 = [3 x i8] c"\0A\09\00"
define void @out_word(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = load i32, i32* @out_word.words
%7 = add nsw i32 %6, 1
store i32 %7, i32* @out_word.words
%8 = icmp eq i32 %7, 8
br i1 %8, label %9, label %11
9: ; preds = %1
store i32 0, i32* @out_word.words
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
br label %11
11: ; preds = %9, %1
ret void
}

LLVM IR (-O2):
@out_word.words = internal unnamed_addr global i32 0
@.str = [9 x i8] c"0x%04x, \00"
@.str.1 = [3 x i8] c"\0A\09\00"
define void @out_word(i16 zeroext %0) {
%2 = zext i16 %0 to i32
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = load i32, i32* @out_word.words
%5 = add nsw i32 %4, 1
store i32 %5, i32* @out_word.words
%6 = icmp eq i32 %5, 8
br i1 %6, label %7, label %9
7: ; preds = %1
store i32 0, i32* @out_word.words
%8 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
br label %9
9: ; preds = %7, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ call_gcc(char **);
int main(int argc, char **argv, char **envp) { call_gcc(envp); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <call_gcc@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    %rdx,%rdi
call   1030 <call_gcc@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1, i8** %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8**
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8** %2, i8*** %6
%7 = load i8**, i8*** %6
%8 = call i32 @call_gcc(i8** %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1, i8** %2) {
%4 = tail call i32 @call_gcc(i8** %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *);
void dotab_buffer(char *c, int tabflag) {
  if (tabflag)
    sprintf(c, "\t");
  else
    sprintf(c, " ");
}


x86 assembly (clang, -O0):
<dotab_buffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     113e <dotab_buffer+0x2e>
mov    -0x8(%rbp),%rdi
lea    0xecc(%rip),%rsi
call   1030 <sprintf@plt>
jmp    114e <dotab_buffer+0x3e>
mov    -0x8(%rbp),%rdi
lea    0xeb9(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dotab_buffer>:
test   %esi,%esi
mov    $0x20,%eax
mov    $0x9,%ecx
cmove  %eax,%ecx
mov    %cx,(%rdi)
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\09\00"
@.str.1 = [2 x i8] c" \00"
define void @dotab_buffer(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i8*, i8** %3
%9 = call i32 @sprintf(i8* %8, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %13
10: ; preds = %2
%11 = load i8*, i8** %3
%12 = call i32 @sprintf(i8* %11, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
br label %13
13: ; preds = %10, %7
ret void
}

LLVM IR (-O2):
define void @dotab_buffer(i8* nocapture writeonly %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = bitcast i8* %0 to i16*
%5 = select i1 %3, i16 32, i16 9
store i16 %5, i16* %4
ret void
}
unsigned int usb_checksendstatus() {
  unsigned int i = 0;
  *(volatile unsigned int *)0xCC006814 = 0x000000D0;
  *(volatile unsigned int *)0xCC006824 = 0xC0000000;
  *(volatile unsigned int *)0xCC006820 = 0x19;
  while ((*(volatile unsigned int *)0xCC006820) & 1)
    ;
  i = *(volatile unsigned int *)0xCC006824;
  *(volatile unsigned int *)0xCC006814 = 0x0;
  if (i & 0x04000000) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<usb_checksendstatus>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x8(%rbp)
mov    $0xcc006814,%eax
movl   $0xd0,(%rax)
mov    $0xcc006824,%eax
movl   $0xc0000000,(%rax)
mov    $0xcc006820,%eax
movl   $0x19,(%rax)
mov    $0xcc006820,%eax
mov    (%rax),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1144 <usb_checksendstatus+0x44>
jmp    112c <usb_checksendstatus+0x2c>
mov    $0xcc006824,%eax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    $0xcc006814,%eax
movl   $0x0,(%rax)
mov    -0x8(%rbp),%eax
and    $0x4000000,%eax
cmp    $0x0,%eax
je     1176 <usb_checksendstatus+0x76>
movl   $0x1,-0x4(%rbp)
jmp    117d <usb_checksendstatus+0x7d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<usb_checksendstatus>:
mov    $0xcc006814,%ecx
movl   $0xd0,(%rcx)
movl   $0xc0000000,0x10(%rcx)
movl   $0x19,0xc(%rcx)
nopl   0x0(%rax)
mov    0xc(%rcx),%eax
test   $0x1,%al
jne    1120 <usb_checksendstatus+0x20>
mov    0x10(%rcx),%eax
movl   $0x0,(%rcx)
shr    $0x1a,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @usb_checksendstatus() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %2
store volatile i32 208, i32* inttoptr (i64 3422578708 to i32*)
store volatile i32 -1073741824, i32* inttoptr (i64 3422578724 to i32*)
store volatile i32 25, i32* inttoptr (i64 3422578720 to i32*)
br label %3
3: ; preds = %7, %0
%4 = load volatile i32, i32* inttoptr (i64 3422578720 to i32*)
%5 = and i32 %4, 1
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
%9 = load volatile i32, i32* inttoptr (i64 3422578724 to i32*)
store i32 %9, i32* %2
store volatile i32 0, i32* inttoptr (i64 3422578708 to i32*)
%10 = load i32, i32* %2
%11 = and i32 %10, 67108864
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %8
store i32 1, i32* %1
br label %15
14: ; preds = %8
store i32 0, i32* %1
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %1
ret i32 %16
}

LLVM IR (-O2):
define i32 @usb_checksendstatus() {
store volatile i32 208, i32* inttoptr (i64 3422578708 to i32*)
store volatile i32 -1073741824, i32* inttoptr (i64 3422578724 to i32*)
store volatile i32 25, i32* inttoptr (i64 3422578720 to i32*)
br label %1
1: ; preds = %1, %0
%2 = load volatile i32, i32* inttoptr (i64 3422578720 to i32*)
%3 = and i32 %2, 1
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %1
5: ; preds = %1
%6 = load volatile i32, i32* inttoptr (i64 3422578724 to i32*)
store volatile i32 0, i32* inttoptr (i64 3422578708 to i32*)
%7 = lshr i32 %6, 26
%8 = and i32 %7, 1
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ generic_search_dlg_reopen_native_keyboard();
void on_search_error_message(int exit_code) {
  generic_search_dlg_reopen_native_keyboard();
}


x86 assembly (clang, -O0):
<on_search_error_message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <generic_search_dlg_reopen_native_keyboard@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<on_search_error_message>:
xor    %eax,%eax
jmp    1030 <generic_search_dlg_reopen_native_keyboard@plt>

LLVM IR (-O0):
define void @on_search_error_message(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @generic_search_dlg_reopen_native_keyboard()
ret void
}

LLVM IR (-O2):
define void @on_search_error_message(i32 %0) {
%2 = tail call i32 (...) @generic_search_dlg_reopen_native_keyboard()
ret void
}
unsigned short bSwap16(unsigned short value) {
  value = (value >> 8) | (value << 8);
  return value;
}


x86 assembly (clang, -O0):
<bSwap16>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
sar    $0x8,%eax
movzwl -0x2(%rbp),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bSwap16>:
mov    %edi,%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define zeroext i16 @bSwap16(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = ashr i32 %4, 8
%6 = load i16, i16* %2
%7 = zext i16 %6 to i32
%8 = shl i32 %7, 8
%9 = or i32 %5, %8
%10 = trunc i32 %9 to i16
store i16 %10, i16* %2
%11 = load i16, i16* %2
ret i16 %11
}

LLVM IR (-O2):
define zeroext i16 @bSwap16(i16 zeroext %0) {
%2 = tail call i16 @llvm.bswap.i16(i16 %0)
ret i16 %2
}
void gtk_label_get_label() {}


x86 assembly (clang, -O0):
<gtk_label_get_label>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_label_get_label>:
ret

LLVM IR (-O0):
define void @gtk_label_get_label() {
ret void
}

LLVM IR (-O2):
define void @gtk_label_get_label() {
ret void
}
void lock_cache(void) {}


x86 assembly (clang, -O0):
<lock_cache>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lock_cache>:
ret

LLVM IR (-O0):
define void @lock_cache() {
ret void
}

LLVM IR (-O2):
define void @lock_cache() {
ret void
}
int foo() {
  static int a;
  __asm__ __volatile__("xorl %%ebx, %%ebx\n"
                       "movl %%ebx, %0\n"
                       : "=m"(a)
                       :
                       : "%ebx");
  return a;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
xor    %ebx,%ebx
mov    %ebx,0x2f17(%rip)
mov    0x2f11(%rip),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbx
xor    %ebx,%ebx
mov    %ebx,0x2f1b(%rip)
mov    0x2f15(%rip),%eax
pop    %rbx
ret

LLVM IR (-O0):
@foo.a = internal global i32 0
define i32 @foo() {
%1 = load i32, i32* @foo.a
ret i32 %1
}

LLVM IR (-O2):
@foo.a = internal global i32 0
define i32 @foo() {
tail call void asm sideeffect "xorl %ebx, %ebx\0Amovl %ebx, $0\0A", "=*m,~{ebx},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) @foo.a)
%1 = load i32, i32* @foo.a
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ a();
int /*<<< orphan*/ b();
int main(int argc, char **argv) {
  a();
  b();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <a@plt>
mov    $0x0,%al
call   1030 <b@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <a@plt>
xor    %eax,%eax
call   1030 <b@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @a()
%7 = call i32 (...) @b()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @a()
%4 = tail call i32 (...) @b()
ret i32 0
}
int fib_rec(int n) {
  int result;
  if (n == 0 || n == 1) {
    result = 1;
  } else {
    result = fib_rec(n - 1) + fib_rec(n - 2);
  }
  return result;
}


x86 assembly (clang, -O0):
<fib_rec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     112f <fib_rec+0x1f>
cmpl   $0x1,-0x4(%rbp)
jne    113b <fib_rec+0x2b>
movl   $0x1,-0x8(%rbp)
jmp    115e <fib_rec+0x4e>
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib_rec@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib_rec@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib_rec>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x2,%edi
jb     1145 <fib_rec+0x35>
mov    %edi,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
lea    -0x1(%rbx),%edi
call   1030 <fib_rec@plt>
add    $0xfffffffe,%ebx
add    %eax,%ebp
cmp    $0x1,%ebx
ja     1130 <fib_rec+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib_rec(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 1, i32* %3
br label %18
10: ; preds = %6
%11 = load i32, i32* %2
%12 = sub nsw i32 %11, 1
%13 = call i32 @fib_rec(i32 %12)
%14 = load i32, i32* %2
%15 = sub nsw i32 %14, 2
%16 = call i32 @fib_rec(i32 %15)
%17 = add nsw i32 %13, %16
store i32 %17, i32* %3
br label %18
18: ; preds = %10, %9
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @fib_rec(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib_rec(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %8, 2
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ SystemCoreClockUpdate();
void SystemInit(void) { SystemCoreClockUpdate(); }


x86 assembly (clang, -O0):
<SystemInit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <SystemCoreClockUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SystemInit>:
xor    %eax,%eax
jmp    1030 <SystemCoreClockUpdate@plt>

LLVM IR (-O0):
define void @SystemInit() {
%1 = call i32 (...) @SystemCoreClockUpdate()
ret void
}

LLVM IR (-O2):
define void @SystemInit() {
%1 = tail call i32 (...) @SystemCoreClockUpdate()
ret void
}
void numa_remove_cpu(unsigned int cpu) {}


x86 assembly (clang, -O0):
<numa_remove_cpu>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<numa_remove_cpu>:
ret

LLVM IR (-O0):
define void @numa_remove_cpu(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @numa_remove_cpu(i32 %0) {
ret void
}
int sys_close(int fd) {}


x86 assembly (clang, -O0):
<sys_close>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_close>:
ret

LLVM IR (-O0):
define i32 @sys_close(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @sys_close(i32 %0) {
ret i32 undef
}