xunge/DecIR huggingface dataset:
void foo() {
  int pass1;
  int i;
  {
    int pass2;
    int i;
    {
      int pass3;
      int i;
    }
  }
  int sin;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
ret void
}

LLVM IR (-O2):
define void @foo() {
ret void
}
double bpm_to_mpb(double bpm) { return 60000. / bpm; }


x86 assembly (clang, -O0):
<bpm_to_mpb>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
divsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<bpm_to_mpb>:
movsd  0xef8(%rip),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @bpm_to_mpb(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double 6.000000e+04, %3
ret double %4
}

LLVM IR (-O2):
define double @bpm_to_mpb(double %0) {
%2 = fdiv double 6.000000e+04, %0
ret double %2
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t rte_align64pow2(uint64_t v) {
  v--;
  v |= v >> 1;
  v |= v >> 2;
  v |= v >> 4;
  v |= v >> 8;
  v |= v >> 16;
  v |= v >> 32;
  return v + 1;
}


x86 assembly (clang, -O0):
<rte_align64pow2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x2,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
sar    %cl,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rte_align64pow2>:
ret

LLVM IR (-O0):
define i32 @rte_align64pow2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, -1
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = ashr i32 %5, 1
%7 = load i32, i32* %2
%8 = or i32 %7, %6
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = ashr i32 %9, 2
%11 = load i32, i32* %2
%12 = or i32 %11, %10
store i32 %12, i32* %2
%13 = load i32, i32* %2
%14 = ashr i32 %13, 4
%15 = load i32, i32* %2
%16 = or i32 %15, %14
store i32 %16, i32* %2
%17 = load i32, i32* %2
%18 = ashr i32 %17, 8
%19 = load i32, i32* %2
%20 = or i32 %19, %18
store i32 %20, i32* %2
%21 = load i32, i32* %2
%22 = ashr i32 %21, 16
%23 = load i32, i32* %2
%24 = or i32 %23, %22
store i32 %24, i32* %2
%25 = load i32, i32* %2
%26 = ashr i32 %25, 32
%27 = load i32, i32* %2
%28 = or i32 %27, %26
store i32 %28, i32* %2
%29 = load i32, i32* %2
%30 = add nsw i32 %29, 1
ret i32 %30
}

LLVM IR (-O2):
define i32 @rte_align64pow2(i32 %0) {
ret i32 poison
}
void testticks() {
  int i = getticks();
  printf(1, "%d\n", i);
}


x86 assembly (clang, -O0):
<testticks>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <getticks@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0x1,%edi
lea    0xebf(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testticks>:
push   %rax
xor    %eax,%eax
call   1040 <getticks@plt>
lea    0xed1(%rip),%rsi
mov    $0x1,%edi
mov    %eax,%edx
xor    %eax,%eax
pop    %rcx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @testticks() {
%1 = alloca i32
%2 = call i32 (...) @getticks()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 (i8*, ...) @printf(i8* inttoptr (i64 1 to i8*), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @testticks() {
%1 = tail call i32 (...) @getticks()
%2 = tail call i32 (i8*, ...) @printf(i8* inttoptr (i64 1 to i8*), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
/* Variables and functions */
int shell_errorn(char const *, int /*<<< orphan*/);
int /*<<< orphan*/ str_len(char const *);
int shell_error(const char *s) { return shell_errorn(s, str_len(s)); }


x86 assembly (clang, -O0):
<shell_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <str_len@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1030 <shell_errorn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shell_error>:
push   %rbx
mov    %rdi,%rbx
call   1040 <str_len@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1030 <shell_errorn@plt>

LLVM IR (-O0):
define i32 @shell_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @str_len(i8* %4)
%6 = call i32 @shell_errorn(i8* %3, i32 %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @shell_error(i8* %0) {
%2 = tail call i32 @str_len(i8* %0)
%3 = tail call i32 @shell_errorn(i8* %0, i32 %2)
ret i32 %3
}
unsigned int decena(const unsigned int valor) {
  if (valor >= 40)
    return 4;
  else if (valor >= 30)
    return 3;
  else if (valor >= 20)
    return 2;
  else if (valor >= 10)
    return 1;
  else
    return 0;
  return 0;
}


x86 assembly (clang, -O0):
<decena>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x28,-0x8(%rbp)
jb     111d <decena+0x1d>
movl   $0x4,-0x4(%rbp)
jmp    1166 <decena+0x66>
cmpl   $0x1e,-0x8(%rbp)
jb     1133 <decena+0x33>
movl   $0x3,-0x4(%rbp)
jmp    1166 <decena+0x66>
cmpl   $0x14,-0x8(%rbp)
jb     1149 <decena+0x49>
movl   $0x2,-0x4(%rbp)
jmp    1166 <decena+0x66>
cmpl   $0xa,-0x8(%rbp)
jb     115f <decena+0x5f>
movl   $0x1,-0x4(%rbp)
jmp    1166 <decena+0x66>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<decena>:
mov    $0x4,%eax
cmp    $0x27,%edi
ja     1126 <decena+0x26>
mov    $0x3,%eax
cmp    $0x1d,%edi
ja     1126 <decena+0x26>
mov    $0x2,%eax
cmp    $0x13,%edi
ja     1126 <decena+0x26>
xor    %eax,%eax
cmp    $0xa,%edi
setae  %al
ret

LLVM IR (-O0):
define i32 @decena(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp uge i32 %4, 40
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 4, i32* %2
br label %20
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp uge i32 %8, 30
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 3, i32* %2
br label %20
11: ; preds = %7
%12 = load i32, i32* %3
%13 = icmp uge i32 %12, 20
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 2, i32* %2
br label %20
15: ; preds = %11
%16 = load i32, i32* %3
%17 = icmp uge i32 %16, 10
br i1 %17, label %18, label %19
18: ; preds = %15
store i32 1, i32* %2
br label %20
19: ; preds = %15
store i32 0, i32* %2
br label %20
20: ; preds = %19, %18, %14, %10, %6
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @decena(i32 %0) {
%2 = icmp ugt i32 %0, 39
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = icmp ugt i32 %0, 29
br i1 %4, label %10, label %5
5: ; preds = %3
%6 = icmp ugt i32 %0, 19
br i1 %6, label %10, label %7
7: ; preds = %5
%8 = icmp ugt i32 %0, 9
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %7, %5, %3, %1
%11 = phi i32 [ 4, %1 ], [ 3, %3 ], [ 2, %5 ], [ %9, %7 ]
ret i32 %11
}
void gtk_table_set_col_spacings() {}


x86 assembly (clang, -O0):
<gtk_table_set_col_spacings>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_table_set_col_spacings>:
ret

LLVM IR (-O0):
define void @gtk_table_set_col_spacings() {
ret void
}

LLVM IR (-O2):
define void @gtk_table_set_col_spacings() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ string_count(char const *);
void main() {
  const char *str = "just fuck you";
  string_count(str);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <string_count@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xee9(%rip),%rdi
jmp    1030 <string_count@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"just fuck you\00"
define void @main() {
%1 = alloca i8*
store i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = call i32 @string_count(i8* %2)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"just fuck you\00"
define void @main() {
%1 = tail call i32 @string_count(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ htobe16(int /*<<< orphan*/);
void htonu16(unsigned char *buf, uint16_t number) {
  *(uint16_t *)buf = htobe16(number);
}


x86 assembly (clang, -O0):
<htonu16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <htobe16@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<htonu16>:
push   %rbx
mov    %rdi,%rbx
mov    %esi,%edi
call   1030 <htobe16@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @htonu16(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i32 @htobe16(i32 %5)
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32 %6, i32* %8
ret void
}

LLVM IR (-O2):
define void @htonu16(i8* nocapture writeonly %0, i32 %1) {
%3 = tail call i32 @htobe16(i32 %1)
%4 = bitcast i8* %0 to i32*
store i32 %3, i32* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ glWindowPos4f(float const, float const, float const, int);
void glWindowPos3fv(const float v[3]) { glWindowPos4f(v[0], v[1], v[2], 1); }


x86 assembly (clang, -O0):
<glWindowPos3fv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm1
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm2
mov    $0x1,%edi
call   1030 <glWindowPos4f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glWindowPos3fv>:
movss  (%rdi),%xmm0
movss  0x4(%rdi),%xmm1
movss  0x8(%rdi),%xmm2
mov    $0x1,%edi
jmp    1030 <glWindowPos4f@plt>

LLVM IR (-O0):
define void @glWindowPos3fv(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 0
%5 = load float, float* %4
%6 = load float*, float** %2
%7 = getelementptr inbounds float, float* %6, i64 1
%8 = load float, float* %7
%9 = load float*, float** %2
%10 = getelementptr inbounds float, float* %9, i64 2
%11 = load float, float* %10
%12 = call i32 @glWindowPos4f(float %5, float %8, float %11, i32 1)
ret void
}

LLVM IR (-O2):
define void @glWindowPos3fv(float* nocapture %0) {
%2 = load float, float* %0
%3 = getelementptr inbounds float, float* %0, i64 1
%4 = load float, float* %3
%5 = getelementptr inbounds float, float* %0, i64 2
%6 = load float, float* %5
%7 = tail call i32 @glWindowPos4f(float %2, float %4, float %6, i32 1)
ret void
}
int smb347_set_battery_0V(void) { return 0; }


x86 assembly (clang, -O0):
<smb347_set_battery_0V>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<smb347_set_battery_0V>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @smb347_set_battery_0V() {
ret i32 0
}

LLVM IR (-O2):
define i32 @smb347_set_battery_0V() {
ret i32 0
}
int capUsingRinging40Hz(void) {
  unsigned short sample10ms, sample1sec;
  return (0);
}


x86 assembly (clang, -O0):
<capUsingRinging40Hz>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<capUsingRinging40Hz>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @capUsingRinging40Hz() {
%1 = alloca i16
%2 = alloca i16
ret i32 0
}

LLVM IR (-O2):
define i32 @capUsingRinging40Hz() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ a_or(void volatile *, long);
void a_or_l(volatile void *p, long v) { a_or(p, v); }


x86 assembly (clang, -O0):
<a_or_l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <a_or@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_or_l>:
jmp    1030 <a_or@plt>

LLVM IR (-O0):
define void @a_or_l(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @a_or(i8* %5, i64 %6)
ret void
}

LLVM IR (-O2):
define void @a_or_l(i8* %0, i64 %1) {
%3 = tail call i32 @a_or(i8* %0, i64 %1)
ret void
}
void MultiplyRow_16_C() {}


x86 assembly (clang, -O0):
<MultiplyRow_16_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MultiplyRow_16_C>:
ret

LLVM IR (-O0):
define void @MultiplyRow_16_C() {
ret void
}

LLVM IR (-O2):
define void @MultiplyRow_16_C() {
ret void
}
/* Variables and functions */
int dup2(int, int);
int octave_dup2_wrapper(int fd1, int fd2) { return dup2(fd1, fd2); }


x86 assembly (clang, -O0):
<octave_dup2_wrapper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <dup2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<octave_dup2_wrapper>:
jmp    1030 <dup2@plt>

LLVM IR (-O0):
define i32 @octave_dup2_wrapper(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @dup2(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @octave_dup2_wrapper(i32 %0, i32 %1) {
%3 = tail call i32 @dup2(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(char *, char *);
int iguais(char *a, char *b) { return !strcmp(a, b); }


x86 assembly (clang, -O0):
<iguais>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iguais>:
push   %rax
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @iguais(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @iguais(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
float cbrt(float);
float call_cbrtf(float x) { return cbrt((float)x); }


x86 assembly (clang, -O0):
<call_cbrtf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <cbrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_cbrtf>:
jmp    1030 <cbrt@plt>

LLVM IR (-O0):
define float @call_cbrtf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @cbrt(float %3)
ret float %4
}

LLVM IR (-O2):
define float @call_cbrtf(float %0) {
%2 = tail call float @cbrt(float %0)
ret float %2
}
/* Variables and functions */
int partition(int *, int, int);
void quick_sort_int(int *unsorted, int p, int r) {
  int q;
  if (p < r) {
    q = partition(unsorted, p, r);
    quick_sort_int(unsorted, p, q - 1);
    quick_sort_int(unsorted, q + 1, r);
  }
}


x86 assembly (clang, -O0):
<quick_sort_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <quick_sort_int+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quick_sort_int@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quick_sort_int@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quick_sort_int>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quick_sort_int+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quick_sort_int@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quick_sort_int+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quick_sort_int(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partition(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @quick_sort_int(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quick_sort_int(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
void delay_m(int m) {
  unsigned int a, b, i, j;
  a = 80;
  b = 1500;
  for (; m > 0; m--)
    for (i = 0; i < a; i++)
      ;
  for (j = 0; j < b; j++)
    ;
}


x86 assembly (clang, -O0):
<delay_m>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x50,-0x8(%rbp)
movl   $0x5dc,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1158 <delay_m+0x58>
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jae    1145 <delay_m+0x45>
jmp    1137 <delay_m+0x37>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <delay_m+0x26>
jmp    114a <delay_m+0x4a>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    1115 <delay_m+0x15>
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0xc(%rbp),%eax
jae    117e <delay_m+0x7e>
jmp    1170 <delay_m+0x70>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    115f <delay_m+0x5f>
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay_m>:
ret

LLVM IR (-O0):
define void @delay_m(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %2
store i32 80, i32* %3
store i32 1500, i32* %4
br label %7
7: ; preds = %20, %1
%8 = load i32, i32* %2
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %23
10: ; preds = %7
store i32 0, i32* %5
br label %11
11: ; preds = %16, %10
%12 = load i32, i32* %5
%13 = load i32, i32* %3
%14 = icmp ult i32 %12, %13
br i1 %14, label %15, label %19
15: ; preds = %11
br label %16
16: ; preds = %15
%17 = load i32, i32* %5
%18 = add i32 %17, 1
store i32 %18, i32* %5
br label %11
19: ; preds = %11
br label %20
20: ; preds = %19
%21 = load i32, i32* %2
%22 = add nsw i32 %21, -1
store i32 %22, i32* %2
br label %7
23: ; preds = %7
store i32 0, i32* %6
br label %24
24: ; preds = %29, %23
%25 = load i32, i32* %6
%26 = load i32, i32* %4
%27 = icmp ult i32 %25, %26
br i1 %27, label %28, label %32
28: ; preds = %24
br label %29
29: ; preds = %28
%30 = load i32, i32* %6
%31 = add i32 %30, 1
store i32 %31, i32* %6
br label %24
32: ; preds = %24
ret void
}

LLVM IR (-O2):
define void @delay_m(i32 %0) {
ret void
}
int side(double x) { return (x > 0) + (x >= 0); }


x86 assembly (clang, -O0):
<side>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
setae  %cl
and    $0x1,%cl
movzbl %cl,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<side>:
xorpd  %xmm1,%xmm1
xor    %eax,%eax
ucomisd %xmm1,%xmm0
seta   %al
sbb    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @side(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp ogt double %3, 0.000000e+00
%5 = zext i1 %4 to i32
%6 = load double, double* %2
%7 = fcmp oge double %6, 0.000000e+00
%8 = zext i1 %7 to i32
%9 = add nsw i32 %5, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @side(double %0) {
%2 = fcmp ogt double %0, 0.000000e+00
%3 = zext i1 %2 to i32
%4 = fcmp oge double %0, 0.000000e+00
%5 = zext i1 %4 to i32
%6 = add nuw nsw i32 %3, %5
ret i32 %6
}
void procbyte(int *secbyte) {
  int indicator = 0;
  int r;
  for (r = 0; r < 8; r++) {
    if (secbyte[r] == 1)
      indicator++;
  }
  if (indicator == 8)
    secbyte[0] = 0;
}


x86 assembly (clang, -O0):
<procbyte>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x8,-0x10(%rbp)
jge    114e <procbyte+0x4e>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
cmpl   $0x1,(%rax,%rcx,4)
jne    113b <procbyte+0x3b>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1140 <procbyte+0x40>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1116 <procbyte+0x16>
cmpl   $0x8,-0xc(%rbp)
jne    1162 <procbyte+0x62>
mov    -0x8(%rbp),%rax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<procbyte>:
movdqu (%rdi),%xmm0
movdqu 0x10(%rdi),%xmm1
movdqa 0xeef(%rip),%xmm2
pcmpeqd %xmm2,%xmm1
pcmpeqd %xmm3,%xmm3
pxor   %xmm3,%xmm1
pcmpeqd %xmm2,%xmm0
pxor   %xmm3,%xmm0
packssdw %xmm1,%xmm0
pmovmskb %xmm0,%eax
test   %eax,%eax
je     1132 <procbyte+0x32>
ret
movl   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @procbyte(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %19, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 8
br i1 %7, label %8, label %22
8: ; preds = %5
%9 = load i32*, i32** %2
%10 = load i32, i32* %4
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, i32* %9, i64 %11
%13 = load i32, i32* %12
%14 = icmp eq i32 %13, 1
br i1 %14, label %15, label %18
15: ; preds = %8
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
store i32 %17, i32* %3
br label %18
18: ; preds = %15, %8
br label %19
19: ; preds = %18
%20 = load i32, i32* %4
%21 = add nsw i32 %20, 1
store i32 %21, i32* %4
br label %5
22: ; preds = %5
%23 = load i32, i32* %3
%24 = icmp eq i32 %23, 8
br i1 %24, label %25, label %28
25: ; preds = %22
%26 = load i32*, i32** %2
%27 = getelementptr inbounds i32, i32* %26, i64 0
store i32 0, i32* %27
br label %28
28: ; preds = %25, %22
ret void
}

LLVM IR (-O2):
define void @procbyte(i32* nocapture %0) {
%2 = bitcast i32* %0 to <8 x i32>*
%3 = load <8 x i32>, <8 x i32>* %2
%4 = icmp ne <8 x i32> %3, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
%5 = bitcast <8 x i1> %4 to i8
%6 = icmp eq i8 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %0
br label %8
8: ; preds = %7, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lprintf(int, char *);
void ipmi_vFlash_usage(void) {
  lprintf(5, "");
  lprintf(5, "   vFlash info Card");
  lprintf(5, "      Shows Extended SD Card information");
  lprintf(5, "");
}


x86 assembly (clang, -O0):
<ipmi_vFlash_usage>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%edi
lea    0xef3(%rip),%rsi
call   1030 <lprintf@plt>
mov    $0x5,%edi
lea    0xecf(%rip),%rsi
call   1030 <lprintf@plt>
mov    $0x5,%edi
lea    0xed2(%rip),%rsi
call   1030 <lprintf@plt>
mov    $0x5,%edi
lea    0xec0(%rip),%rsi
call   1030 <lprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipmi_vFlash_usage>:
push   %rbx
lea    0xefb(%rip),%rbx
mov    $0x5,%edi
mov    %rbx,%rsi
call   1030 <lprintf@plt>
lea    0xed4(%rip),%rsi
mov    $0x5,%edi
call   1030 <lprintf@plt>
lea    0xed7(%rip),%rsi
mov    $0x5,%edi
call   1030 <lprintf@plt>
mov    $0x5,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <lprintf@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
@.str.1 = [20 x i8] c" vFlash info Card\00"
@.str.2 = [41 x i8] c" Shows Extended SD Card information\00"
define void @ipmi_vFlash_usage() {
%1 = call i32 @lprintf(i32 5, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @lprintf(i32 5, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @lprintf(i32 5, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @lprintf(i32 5, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
@.str.1 = [20 x i8] c" vFlash info Card\00"
@.str.2 = [41 x i8] c" Shows Extended SD Card information\00"
define void @ipmi_vFlash_usage() {
%1 = tail call i32 @lprintf(i32 5, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @lprintf(i32 5, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @lprintf(i32 5, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @lprintf(i32 5, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct sabir {
  int dummy;
};

/* Variables and functions */
scalar_t__ SIZE_MAX;
int /*<<< orphan*/ sb_process(struct sabir *, void const *, size_t);
void sb_feed(struct sabir *sb, const void *chunk, size_t len) {
  sb_process(sb, chunk,
             len < ((size_t)SIZE_MAX / 2) ? len : ((size_t)SIZE_MAX / 2));
}


x86 assembly (clang, -O0):
<sb_feed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    0x2e99(%rip),%rcx
mov    (%rcx),%rcx
shr    $0x1,%rcx
cmp    %rcx,%rax
jae    115c <sb_feed+0x4c>
mov    -0x18(%rbp),%rax
mov    %rax,-0x30(%rbp)
jmp    116e <sb_feed+0x5e>
mov    0x2e75(%rip),%rax
mov    (%rax),%rax
shr    $0x1,%rax
mov    %rax,-0x30(%rbp)
mov    -0x20(%rbp),%rsi
mov    -0x28(%rbp),%rdi
mov    -0x30(%rbp),%rdx
call   1030 <sb_process@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sb_feed>:
mov    0x2ec1(%rip),%rax
mov    (%rax),%rax
shr    %rax
cmp    %rdx,%rax
cmovbe %rax,%rdx
jmp    1030 <sb_process@plt>

LLVM IR (-O0):
%struct.sabir = type { i32 }
@SIZE_MAX = global i64 0
define void @sb_feed(%struct.sabir* %0, i8* %1, i64 %2) {
%4 = alloca %struct.sabir*
%5 = alloca i8*
%6 = alloca i64
store %struct.sabir* %0, %struct.sabir** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load %struct.sabir*, %struct.sabir** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = load i64, i64* @SIZE_MAX
%11 = udiv i64 %10, 2
%12 = icmp ult i64 %9, %11
br i1 %12, label %13, label %15
13: ; preds = %3
%14 = load i64, i64* %6
br label %18
15: ; preds = %3
%16 = load i64, i64* @SIZE_MAX
%17 = udiv i64 %16, 2
br label %18
18: ; preds = %15, %13
%19 = phi i64 [ %14, %13 ], [ %17, %15 ]
%20 = call i32 @sb_process(%struct.sabir* %7, i8* %8, i64 %19)
ret void
}

LLVM IR (-O2):
%struct.sabir = type { i32 }
@SIZE_MAX = global i64 0
define void @sb_feed(%struct.sabir* %0, i8* %1, i64 %2) {
%4 = load i64, i64* @SIZE_MAX
%5 = lshr i64 %4, 1
%6 = icmp ugt i64 %5, %2
%7 = select i1 %6, i64 %2, i64 %5
%8 = tail call i32 @sb_process(%struct.sabir* %0, i8* %1, i64 %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0x6f() {
  Assert_real((iscntrl(111) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              560, ("iscntrl should be 0 for o"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0x6f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6f,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x230,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0x6f>:
push   %rax
mov    $0x6f,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x230,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for o\00"
define void @t_iscntrl_0x6f() {
%1 = call i64 @iscntrl(i32 111)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 560, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for o\00"
define void @t_iscntrl_0x6f() {
%1 = tail call i64 @iscntrl(i32 111)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 560, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
char rgetchar();
void wait_for_ack() {
  while (rgetchar() != ' ')
    ;
}


x86 assembly (clang, -O0):
<wait_for_ack>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <wait_for_ack+0x9>
mov    $0x0,%al
call   1030 <rgetchar@plt>
movsbl %al,%eax
cmp    $0x20,%eax
je     1131 <wait_for_ack+0x21>
jmp    1119 <wait_for_ack+0x9>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait_for_ack>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <rgetchar@plt>
cmp    $0x20,%al
jne    1120 <wait_for_ack+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @wait_for_ack() {
br label %1
1: ; preds = %5, %0
%2 = call signext i8 (...) @rgetchar()
%3 = sext i8 %2 to i32
%4 = icmp ne i32 %3, 32
br i1 %4, label %5, label %6
5: ; preds = %1
br label %1
6: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @wait_for_ack() {
br label %1
1: ; preds = %1, %0
%2 = tail call signext i8 (...) @rgetchar()
%3 = icmp eq i8 %2, 32
br i1 %3, label %4, label %1
4: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ default_handler();
__attribute__((weak)) void ADC_IRQHandler() { default_handler(); }


x86 assembly (clang, -O0):
<ADC_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <default_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADC_IRQHandler>:
xor    %eax,%eax
jmp    1030 <default_handler@plt>

LLVM IR (-O0):
define weak void @ADC_IRQHandler() {
%1 = call i32 (...) @default_handler()
ret void
}

LLVM IR (-O2):
define weak void @ADC_IRQHandler() {
%1 = tail call i32 (...) @default_handler()
ret void
}
int powerOfTwo(int power) {
  int i;
  int result = 1;
  for (i = 1; i <= power; ++i) {
    result <<= 1;
  }
  return result;
}


x86 assembly (clang, -O0):
<powerOfTwo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0xc(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     1138 <powerOfTwo+0x38>
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1115 <powerOfTwo+0x15>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<powerOfTwo>:
test   %edi,%edi
jle    1118 <powerOfTwo+0x18>
lea    -0x1(%rdi),%eax
mov    %edi,%ecx
and    $0x7,%ecx
cmp    $0x7,%eax
jae    111e <powerOfTwo+0x1e>
mov    $0x1,%eax
jmp    1138 <powerOfTwo+0x38>
mov    $0x1,%eax
ret
and    $0xfffffff8,%edi
mov    $0x1,%eax
cs nopw 0x0(%rax,%rax,1)
shl    $0x8,%eax
add    $0xfffffff8,%edi
jne    1130 <powerOfTwo+0x30>
test   %ecx,%ecx
je     1147 <powerOfTwo+0x47>
nopl   0x0(%rax)
add    %eax,%eax
add    $0xffffffff,%ecx
jne    1140 <powerOfTwo+0x40>
ret

LLVM IR (-O0):
define i32 @powerOfTwo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %4
store i32 1, i32* %3
br label %5
5: ; preds = %12, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp sle i32 %6, %7
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i32, i32* %4
%11 = shl i32 %10, 1
store i32 %11, i32* %4
br label %12
12: ; preds = %9
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %5
15: ; preds = %5
%16 = load i32, i32* %4
ret i32 %16
}

LLVM IR (-O2):
define i32 @powerOfTwo(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %25, label %3
3: ; preds = %1
%4 = add i32 %0, -1
%5 = and i32 %0, 7
%6 = icmp ult i32 %4, 7
br i1 %6, label %15, label %7
7: ; preds = %3
%8 = and i32 %0, -8
br label %9
9: ; preds = %9, %7
%10 = phi i32 [ 1, %7 ], [ %12, %9 ]
%11 = phi i32 [ 0, %7 ], [ %13, %9 ]
%12 = shl i32 %10, 8
%13 = add i32 %11, 8
%14 = icmp eq i32 %13, %8
br i1 %14, label %15, label %9
15: ; preds = %9, %3
%16 = phi i32 [ undef, %3 ], [ %12, %9 ]
%17 = phi i32 [ 1, %3 ], [ %12, %9 ]
%18 = icmp eq i32 %5, 0
br i1 %18, label %25, label %19
19: ; preds = %15, %19
%20 = phi i32 [ %22, %19 ], [ %17, %15 ]
%21 = phi i32 [ %23, %19 ], [ 0, %15 ]
%22 = shl i32 %20, 1
%23 = add i32 %21, 1
%24 = icmp eq i32 %23, %5
br i1 %24, label %25, label %19
25: ; preds = %15, %19, %1
%26 = phi i32 [ 1, %1 ], [ %16, %15 ], [ %22, %19 ]
ret i32 %26
}
/* Variables and functions */
int /*<<< orphan*/ exp(double);
double lua_check_number(int, char *);
int /*<<< orphan*/ lua_pushnumber(int /*<<< orphan*/);
void math_exp(void) {
  double d = lua_check_number(1, "exp");
  lua_pushnumber(exp(d));
}


x86 assembly (clang, -O0):
<math_exp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
lea    0xebc(%rip),%rsi
call   1030 <lua_check_number@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1050 <exp@plt>
mov    %eax,%edi
call   1040 <lua_pushnumber@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<math_exp>:
push   %rax
lea    0xec8(%rip),%rsi
mov    $0x1,%edi
call   1030 <lua_check_number@plt>
call   1050 <exp@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <lua_pushnumber@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"exp\00"
define void @math_exp() {
%1 = alloca double
%2 = call double @lua_check_number(i32 1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
store double %2, double* %1
%3 = load double, double* %1
%4 = call i32 @exp(double %3)
%5 = call i32 @lua_pushnumber(i32 %4)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"exp\00"
define void @math_exp() {
%1 = tail call double @lua_check_number(i32 1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @exp(double %1)
%3 = tail call i32 @lua_pushnumber(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ outb(int, int);
void w977_efm_enter(void) {
  outb(0x87, 0x370);
  outb(0x87, 0x370);
}


x86 assembly (clang, -O0):
<w977_efm_enter>:
push   %rbp
mov    %rsp,%rbp
mov    $0x87,%edi
mov    $0x370,%esi
call   1030 <outb@plt>
mov    $0x87,%edi
mov    $0x370,%esi
call   1030 <outb@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<w977_efm_enter>:
push   %rax
mov    $0x87,%edi
mov    $0x370,%esi
call   1030 <outb@plt>
mov    $0x87,%edi
mov    $0x370,%esi
pop    %rax
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @w977_efm_enter() {
%1 = call i32 @outb(i32 135, i32 880)
%2 = call i32 @outb(i32 135, i32 880)
ret void
}

LLVM IR (-O2):
define void @w977_efm_enter() {
%1 = tail call i32 @outb(i32 135, i32 880)
%2 = tail call i32 @outb(i32 135, i32 880)
ret void
}
int test_imm_E9int16_reg(short val) {
  return ((val) & (-0xE9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E9int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffff17,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E9int16_reg>:
test   $0xff17,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E9int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -233
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E9int16_reg(i16 signext %0) {
%2 = and i16 %0, -233
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct sb_image_ctx {
  int dummy;
};
struct sb_cmd_list {
  int dummy;
};

/* Variables and functions */
int sb_build_command_jump_call(struct sb_image_ctx *, struct sb_cmd_list *,
                               int);
int sb_build_command_call(struct sb_image_ctx *ictx, struct sb_cmd_list *cmd) {
  return sb_build_command_jump_call(ictx, cmd, 1);
}


x86 assembly (clang, -O0):
<sb_build_command_call>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <sb_build_command_jump_call@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sb_build_command_call>:
mov    $0x1,%edx
jmp    1030 <sb_build_command_jump_call@plt>

LLVM IR (-O0):
%struct.sb_image_ctx = type { i32 }
%struct.sb_cmd_list = type { i32 }
define i32 @sb_build_command_call(%struct.sb_image_ctx* %0, %struct.sb_cmd_list* %1) {
%3 = alloca %struct.sb_image_ctx*
%4 = alloca %struct.sb_cmd_list*
store %struct.sb_image_ctx* %0, %struct.sb_image_ctx** %3
store %struct.sb_cmd_list* %1, %struct.sb_cmd_list** %4
%5 = load %struct.sb_image_ctx*, %struct.sb_image_ctx** %3
%6 = load %struct.sb_cmd_list*, %struct.sb_cmd_list** %4
%7 = call i32 @sb_build_command_jump_call(%struct.sb_image_ctx* %5, %struct.sb_cmd_list* %6, i32 1)
ret i32 %7
}

LLVM IR (-O2):
%struct.sb_image_ctx = type { i32 }
%struct.sb_cmd_list = type { i32 }
define i32 @sb_build_command_call(%struct.sb_image_ctx* %0, %struct.sb_cmd_list* %1) {
%3 = tail call i32 @sb_build_command_jump_call(%struct.sb_image_ctx* %0, %struct.sb_cmd_list* %1, i32 1)
ret i32 %3
}
/* Variables and functions */
unsigned int getnexttime();
int /*<<< orphan*/ pthread_yield();
unsigned int realsleep(unsigned int);
scalar_t__ sleepy();
void *__m_thread_routine(void *arg) {
  unsigned int nexttime;
  unsigned int delta;
  while (1) {
    if (sleepy()) {
      nexttime = getnexttime();
      delta = realsleep(nexttime);
    }
    pthread_yield();
  }
  return NULL;
}


x86 assembly (clang, -O0):
<__m_thread_routine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <sleepy@plt>
cmp    $0x0,%rax
je     1172 <__m_thread_routine+0x32>
mov    $0x0,%al
call   1040 <getnexttime@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1060 <realsleep@plt>
mov    %eax,-0x10(%rbp)
mov    $0x0,%al
call   1050 <pthread_yield@plt>
jmp    114c <__m_thread_routine+0xc>

x86 assembly (clang, -O2):
<__m_thread_routine>:
push   %rax
jmp    1157 <__m_thread_routine+0x17>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
xor    %eax,%eax
call   1050 <pthread_yield@plt>
xor    %eax,%eax
call   1030 <sleepy@plt>
test   %rax,%rax
je     1150 <__m_thread_routine+0x10>
xor    %eax,%eax
call   1040 <getnexttime@plt>
mov    %eax,%edi
call   1060 <realsleep@plt>
jmp    1150 <__m_thread_routine+0x10>

LLVM IR (-O0):
define i8* @__m_thread_routine(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
br label %5
5: ; preds = %1, %12
%6 = call i64 (...) @sleepy()
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = call i32 (...) @getnexttime()
store i32 %9, i32* %3
%10 = load i32, i32* %3
%11 = call i32 @realsleep(i32 %10)
store i32 %11, i32* %4
br label %12
12: ; preds = %8, %5
%13 = call i32 (...) @pthread_yield()
br label %5
}

LLVM IR (-O2):
define noalias i8* @__m_thread_routine(i8* nocapture readnone %0) {
br label %2
2: ; preds = %8, %1
%3 = tail call i64 (...) @sleepy()
%4 = icmp eq i64 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 (...) @getnexttime()
%7 = tail call i32 @realsleep(i32 %6)
br label %8
8: ; preds = %5, %2
%9 = tail call i32 (...) @pthread_yield()
br label %2
}
void NV21ToNV12() {}


x86 assembly (clang, -O0):
<NV21ToNV12>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NV21ToNV12>:
ret

LLVM IR (-O0):
define void @NV21ToNV12() {
ret void
}

LLVM IR (-O2):
define void @NV21ToNV12() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EBADF;
#define STDERR_FILENO 130
#define STDIN_FILENO 129
#define STDOUT_FILENO 128
int /*<<< orphan*/ errno;
int _isatty(int file) {
  switch (file) {
  case STDOUT_FILENO:
  case STDERR_FILENO:
  case STDIN_FILENO:
    return 1;
  default:
    errno = EBADF;
    return 0;
  }
}


x86 assembly (clang, -O0):
<_isatty>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffff80,%eax
sub    $0x2,%eax
ja     1127 <_isatty+0x27>
jmp    111b <_isatty+0x1b>
movl   $0x1,-0x4(%rbp)
jmp    1140 <_isatty+0x40>
mov    0x2eaa(%rip),%rax
mov    (%rax),%ecx
mov    0x2ea9(%rip),%rax
mov    %ecx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_isatty>:
add    $0xffffff80,%edi
mov    $0x1,%eax
cmp    $0x3,%edi
jb     1121 <_isatty+0x21>
mov    0x2ec4(%rip),%rax
mov    (%rax),%eax
mov    0x2ec3(%rip),%rcx
mov    %eax,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
@EBADF = global i32 0
@errno = global i32 0
define i32 @_isatty(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 128, label %5
i32 130, label %5
i32 129, label %5
]
5: ; preds = %1, %1, %1
store i32 1, i32* %2
br label %8
6: ; preds = %1
%7 = load i32, i32* @EBADF
store i32 %7, i32* @errno
store i32 0, i32* %2
br label %8
8: ; preds = %6, %5
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
@EBADF = global i32 0
@errno = global i32 0
define i32 @_isatty(i32 %0) {
%2 = add i32 %0, -128
%3 = icmp ult i32 %2, 3
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = load i32, i32* @EBADF
store i32 %5, i32* @errno
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 0, %4 ], [ 1, %1 ]
ret i32 %7
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
bool valid_unicode(uint16_t c) { return (c >= 32 && c <= 126) || c >= 160; }


x86 assembly (clang, -O0):
<valid_unicode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x20,-0x4(%rbp)
jl     1120 <valid_unicode+0x20>
mov    $0x1,%al
cmpl   $0x7e,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    112d <valid_unicode+0x2d>
cmpl   $0xa0,-0x4(%rbp)
setge  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<valid_unicode>:
lea    -0x20(%rdi),%eax
cmp    $0x5f,%eax
setb   %al
cmp    $0xa0,%edi
setge  %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @valid_unicode(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 32
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 126
br i1 %7, label %11, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 160
br label %11
11: ; preds = %8, %5
%12 = phi i1 [ true, %5 ], [ %10, %8 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @valid_unicode(i32 %0) {
%2 = add i32 %0, -32
%3 = icmp ult i32 %2, 95
%4 = icmp sgt i32 %0, 159
%5 = or i1 %4, %3
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
int main(int argc, char *argv[]) {
  while (1) {
    system("/system/bin/BTstackDaemon");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <system@plt>
jmp    1126 <main+0x16>

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <system@plt>
jmp    1120 <main+0x10>

LLVM IR (-O0):
@.str = [26 x i8] c"/system/bin/BTstackDaemon\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
br label %6
6: ; preds = %2, %6
%7 = call i32 @system(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
br label %6
}

LLVM IR (-O2):
@.str = [26 x i8] c"/system/bin/BTstackDaemon\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
br label %3
3: ; preds = %2, %3
%4 = tail call i32 @system(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
br label %3
}
unsigned tstamp_chksum(unsigned tstamp) {
  return ((~tstamp) & 0xffff) | 0x80000000;
}


x86 assembly (clang, -O0):
<tstamp_chksum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
and    $0xffff,%eax
or     $0x80000000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tstamp_chksum>:
movzwl %di,%eax
xor    $0x8000ffff,%eax
ret

LLVM IR (-O0):
define i32 @tstamp_chksum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = xor i32 %3, -1
%5 = and i32 %4, 65535
%6 = or i32 %5, -2147483648
ret i32 %6
}

LLVM IR (-O2):
define i32 @tstamp_chksum(i32 %0) {
%2 = and i32 %0, 65535
%3 = xor i32 %2, -2147418113
ret i32 %3
}
/* Variables and functions */
scalar_t__ memcmp(char *, char *, int);
int kind_varread(char *str) {
  if (0 == memcmp("%_#", str, 3))
    return 2;
}


x86 assembly (clang, -O0):
<kind_varread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xed9(%rip),%rdi
mov    $0x3,%edx
call   1030 <memcmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
jne    1146 <kind_varread+0x36>
movl   $0x2,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kind_varread>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
mov    $0x3,%edx
call   1030 <memcmp@plt>
mov    $0x2,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%_#\00"
define i32 @kind_varread(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @memcmp(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4, i32 3)
%6 = icmp eq i64 0, %5
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 2, i32* %2
br label %8
8: ; preds = %7, %1
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
@.str = [4 x i8] c"%_#\00"
define i32 @kind_varread(i8* %0) {
%2 = tail call i64 @memcmp(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0, i32 3)
ret i32 2
}