xunge/DecIR huggingface dataset:
/* Type definitions */
struct trace_seq {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ trace_seq_printf(struct trace_seq *, char const *, ...);
void print_str_to_seq(struct trace_seq *s, const char *format, int len_arg,
                      const char *str) {
  if (len_arg >= 0)
    trace_seq_printf(s, format, len_arg, str);
  else
    trace_seq_printf(s, format, str);
}


x86 assembly (clang, -O0):
<print_str_to_seq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
cmpl   $0x0,-0x14(%rbp)
jl     114c <print_str_to_seq+0x3c>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x20(%rbp),%rcx
mov    $0x0,%al
call   1030 <trace_seq_printf@plt>
jmp    115f <print_str_to_seq+0x4f>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    $0x0,%al
call   1030 <trace_seq_printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_str_to_seq>:
test   %edx,%edx
js     111b <print_str_to_seq+0xb>
xor    %eax,%eax
jmp    1030 <trace_seq_printf@plt>
mov    %rcx,%rdx
xor    %eax,%eax
jmp    1030 <trace_seq_printf@plt>

LLVM IR (-O0):
%struct.trace_seq = type { i32 }
define void @print_str_to_seq(%struct.trace_seq* %0, i8* %1, i32 %2, i8* %3) {
%5 = alloca %struct.trace_seq*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
store %struct.trace_seq* %0, %struct.trace_seq** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%9 = load i32, i32* %7
%10 = icmp sge i32 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %4
%12 = load %struct.trace_seq*, %struct.trace_seq** %5
%13 = load i8*, i8** %6
%14 = load i32, i32* %7
%15 = load i8*, i8** %8
%16 = call i32 (%struct.trace_seq*, i8*, ...) @trace_seq_printf(%struct.trace_seq* %12, i8* %13, i32 %14, i8* %15)
br label %22
17: ; preds = %4
%18 = load %struct.trace_seq*, %struct.trace_seq** %5
%19 = load i8*, i8** %6
%20 = load i8*, i8** %8
%21 = call i32 (%struct.trace_seq*, i8*, ...) @trace_seq_printf(%struct.trace_seq* %18, i8* %19, i8* %20)
br label %22
22: ; preds = %17, %11
ret void
}

LLVM IR (-O2):
%struct.trace_seq = type { i32 }
define void @print_str_to_seq(%struct.trace_seq* %0, i8* %1, i32 %2, i8* %3) {
%5 = icmp sgt i32 %2, -1
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 (%struct.trace_seq*, i8*, ...) @trace_seq_printf(%struct.trace_seq* %0, i8* %1, i32 %2, i8* %3)
br label %10
8: ; preds = %4
%9 = tail call i32 (%struct.trace_seq*, i8*, ...) @trace_seq_printf(%struct.trace_seq* %0, i8* %1, i8* %3)
br label %10
10: ; preds = %8, %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ my_exit(int *);
void egs_exit(int *status) { my_exit(status); }


x86 assembly (clang, -O0):
<egs_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <my_exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<egs_exit>:
jmp    1030 <my_exit@plt>

LLVM IR (-O0):
define void @egs_exit(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @my_exit(i32* %3)
ret void
}

LLVM IR (-O2):
define void @egs_exit(i32* %0) {
%2 = tail call i32 @my_exit(i32* %0)
ret void
}
/* Type definitions */
struct timeval {
  scalar_t__ tv_usec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
float tvtof(struct timeval tv) {
  return (float)tv.tv_sec + (float)tv.tv_usec / 1000000.0;
}


x86 assembly (clang, -O0):
<tvtof>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x8(%rbp)
cvtsi2ssq -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
cvtsi2ssq -0x10(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
movsd  0xed8(%rip),%xmm2
divsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<tvtof>:
cvtsi2ss %rsi,%xmm0
cvtsi2ss %rdi,%xmm1
cvtss2sd %xmm1,%xmm1
divsd  0xeea(%rip),%xmm1
cvtss2sd %xmm0,%xmm0
addsd  %xmm0,%xmm1
xorps  %xmm0,%xmm0
cvtsd2ss %xmm1,%xmm0
ret

LLVM IR (-O0):
%struct.timeval = type { i64, i64 }
define float @tvtof(i64 %0, i64 %1) {
%3 = alloca %struct.timeval
%4 = bitcast %struct.timeval* %3 to { i64, i64 }*
%5 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %4, i32 0, i32 0
store i64 %0, i64* %5
%6 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %4, i32 0, i32 1
store i64 %1, i64* %6
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i32 0, i32 1
%8 = load i64, i64* %7
%9 = sitofp i64 %8 to float
%10 = fpext float %9 to double
%11 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i32 0, i32 0
%12 = load i64, i64* %11
%13 = sitofp i64 %12 to float
%14 = fpext float %13 to double
%15 = fdiv double %14, 1.000000e+06
%16 = fadd double %10, %15
%17 = fptrunc double %16 to float
ret float %17
}

LLVM IR (-O2):
define float @tvtof(i64 %0, i64 %1) {
%3 = sitofp i64 %1 to float
%4 = fpext float %3 to double
%5 = sitofp i64 %0 to float
%6 = fpext float %5 to double
%7 = fdiv double %6, 1.000000e+06
%8 = fadd double %7, %4
%9 = fptrunc double %8 to float
ret float %9
}
/* Variables and functions */
int /*<<< orphan*/ glColor3f(double, double, double);
int /*<<< orphan*/ glPopMatrix();
int /*<<< orphan*/ glPushMatrix();
int /*<<< orphan*/ glScalef(float, float, float);
int /*<<< orphan*/ glutSolidCube(double);
void drawSCuboid(void) {
  glColor3f(0.5, 0.0, 0.5);
  glPushMatrix();
  glScalef(2.0f, 1.0f, 2.0f);
  glutSolidCube(4.5);
  glPopMatrix();
}


x86 assembly (clang, -O0):
<drawSCuboid>:
push   %rbp
mov    %rsp,%rbp
movsd  0xeac(%rip),%xmm2
xorps  %xmm1,%xmm1
movaps %xmm2,%xmm0
call   1050 <glColor3f@plt>
mov    $0x0,%al
call   1070 <glPushMatrix@plt>
movss  0xe9a(%rip),%xmm2
movss  0xe96(%rip),%xmm1
movaps %xmm2,%xmm0
call   1060 <glScalef@plt>
movsd  0xe72(%rip),%xmm0
call   1030 <glutSolidCube@plt>
mov    $0x0,%al
call   1040 <glPopMatrix@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawSCuboid>:
push   %rax
movsd  0xea7(%rip),%xmm0
xorps  %xmm1,%xmm1
movaps %xmm0,%xmm2
call   1050 <glColor3f@plt>
xor    %eax,%eax
call   1070 <glPushMatrix@plt>
movss  0xe9d(%rip),%xmm1
movss  0xe99(%rip),%xmm0
movaps %xmm0,%xmm2
call   1060 <glScalef@plt>
movsd  0xe7d(%rip),%xmm0
call   1030 <glutSolidCube@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <glPopMatrix@plt>

LLVM IR (-O0):
define void @drawSCuboid() {
%1 = call i32 @glColor3f(double 5.000000e-01, double 0.000000e+00, double 5.000000e-01)
%2 = call i32 (...) @glPushMatrix()
%3 = call i32 @glScalef(float 2.000000e+00, float 1.000000e+00, float 2.000000e+00)
%4 = call i32 @glutSolidCube(double 4.500000e+00)
%5 = call i32 (...) @glPopMatrix()
ret void
}

LLVM IR (-O2):
define void @drawSCuboid() {
%1 = tail call i32 @glColor3f(double 5.000000e-01, double 0.000000e+00, double 5.000000e-01)
%2 = tail call i32 (...) @glPushMatrix()
%3 = tail call i32 @glScalef(float 2.000000e+00, float 1.000000e+00, float 2.000000e+00)
%4 = tail call i32 @glutSolidCube(double 4.500000e+00)
%5 = tail call i32 (...) @glPopMatrix()
ret void
}
void parse_none(int argc, char **argv, int *option, int *bad_arg) {
  if (argc != 0 || *option)
    *bad_arg = 1;
  *option = 1;
}


x86 assembly (clang, -O0):
<parse_none>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    112a <parse_none+0x2a>
mov    -0x18(%rbp),%rax
cmpl   $0x0,(%rax)
je     1134 <parse_none+0x34>
mov    -0x20(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x18(%rbp),%rax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_none>:
test   %edi,%edi
jne    1109 <parse_none+0x9>
cmpl   $0x0,(%rdx)
je     110f <parse_none+0xf>
movl   $0x1,(%rcx)
movl   $0x1,(%rdx)
ret

LLVM IR (-O0):
define void @parse_none(i32 %0, i8** %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i8**
%7 = alloca i32*
%8 = alloca i32*
store i32 %0, i32* %5
store i8** %1, i8*** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32, i32* %5
%10 = icmp ne i32 %9, 0
br i1 %10, label %15, label %11
11: ; preds = %4
%12 = load i32*, i32** %7
%13 = load i32, i32* %12
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %11, %4
%16 = load i32*, i32** %8
store i32 1, i32* %16
br label %17
17: ; preds = %15, %11
%18 = load i32*, i32** %7
store i32 1, i32* %18
ret void
}

LLVM IR (-O2):
define void @parse_none(i32 %0, i8** nocapture readnone %1, i32* nocapture %2, i32* nocapture writeonly %3) {
%5 = icmp eq i32 %0, 0
br i1 %5, label %6, label %9
6: ; preds = %4
%7 = load i32, i32* %2
%8 = icmp eq i32 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %6, %4
store i32 1, i32* %3
br label %10
10: ; preds = %9, %6
store i32 1, i32* %2
ret void
}
void _hfault_default_handler() {
  while (1)
    ;
  return;
}


x86 assembly (clang, -O0):
<_hfault_default_handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <_hfault_default_handler+0x9>
jmp    1109 <_hfault_default_handler+0x9>

x86 assembly (clang, -O2):
<_hfault_default_handler>:
jmp    1100 <_hfault_default_handler>

LLVM IR (-O0):
define void @_hfault_default_handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @_hfault_default_handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
void g_object_set() {}


x86 assembly (clang, -O0):
<g_object_set>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_object_set>:
ret

LLVM IR (-O0):
define void @g_object_set() {
ret void
}

LLVM IR (-O2):
define void @g_object_set() {
ret void
}
/* Variables and functions */
int _bit_scan_forward(int);
int test_bit_scan_forward(int a) { return _bit_scan_forward(a); }


x86 assembly (clang, -O0):
<test_bit_scan_forward>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_bit_scan_forward@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_bit_scan_forward>:
jmp    1030 <_bit_scan_forward@plt>

LLVM IR (-O0):
define i32 @test_bit_scan_forward(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_bit_scan_forward(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test_bit_scan_forward(i32 %0) {
%2 = tail call i32 @_bit_scan_forward(i32 %0)
ret i32 %2
}
/* Variables and functions */
int factorial(int);
void test_factorial() {
  if (factorial(3) == 6) {
    int *p = 0;
    *p = 0xDEADBEEF;
  } else {
    int *p = 0;
    *p = 0xDEADBEEF;
  }
}


x86 assembly (clang, -O0):
<test_factorial>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x3,%edi
call   1030 <factorial@plt>
cmp    $0x6,%eax
jne    1142 <test_factorial+0x32>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0xdeadbeef,(%rax)
jmp    1154 <test_factorial+0x44>
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0xdeadbeef,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_factorial>:
push   %rax
mov    $0x3,%edi
call   1030 <factorial@plt>

LLVM IR (-O0):
define void @test_factorial() {
%1 = alloca i32*
%2 = alloca i32*
%3 = call i32 @factorial(i32 3)
%4 = icmp eq i32 %3, 6
br i1 %4, label %5, label %7
5: ; preds = %0
store i32* null, i32** %1
%6 = load i32*, i32** %1
store i32 -559038737, i32* %6
br label %9
7: ; preds = %0
store i32* null, i32** %2
%8 = load i32*, i32** %2
store i32 -559038737, i32* %8
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @test_factorial() {
%1 = tail call i32 @factorial(i32 3)
unreachable
}
int test_imm_54int64_midword_reg(long long val) {
  return ((val >> 16) & (0x54 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_54int64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0x54,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_54int64_midword_reg>:
test   $0x540000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_54int64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 84
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_54int64_midword_reg(i64 %0) {
%2 = and i64 %0, 5505024
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void RTAvlU32DoWithAll(void) {}


x86 assembly (clang, -O0):
<RTAvlU32DoWithAll>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvlU32DoWithAll>:
ret

LLVM IR (-O0):
define void @RTAvlU32DoWithAll() {
ret void
}

LLVM IR (-O2):
define void @RTAvlU32DoWithAll() {
ret void
}
void av_image_fill_pointers() {}


x86 assembly (clang, -O0):
<av_image_fill_pointers>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_image_fill_pointers>:
ret

LLVM IR (-O0):
define void @av_image_fill_pointers() {
ret void
}

LLVM IR (-O2):
define void @av_image_fill_pointers() {
ret void
}
/* Variables and functions */
float evaluatePostfixExp(char *);
int /*<<< orphan*/ gets(char *);
int /*<<< orphan*/ printf(char *, ...);
void PostfixEvaluation_call() {
  float val;
  char exp[100];
  printf("\n\t\t\t\t\t\t\t\t   Enter any postfix expression: ");
  gets(exp);
  val = evaluatePostfixExp(exp);
  printf("\n\t\t\t\t\t\t\t   Value of the postfix expression = %.2f", val);
}


x86 assembly (clang, -O0):
<PostfixEvaluation_call>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
lea    0xec1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    -0x70(%rbp),%rdi
call   1040 <gets@plt>
lea    -0x70(%rbp),%rdi
call   1050 <evaluatePostfixExp@plt>
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
lea    0xebe(%rip),%rdi
mov    $0x1,%al
call   1030 <printf@plt>
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PostfixEvaluation_call>:
push   %rbx
sub    $0x70,%rsp
lea    0xec4(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <gets@plt>
mov    %rbx,%rdi
call   1050 <evaluatePostfixExp@plt>
cvtss2sd %xmm0,%xmm0
lea    0xeca(%rip),%rdi
mov    $0x1,%al
call   1030 <printf@plt>
add    $0x70,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [43 x i8] c"\0A\09\09\09\09\09\09\09\09 Enter any postfix expression: \00"
@.str.1 = [50 x i8] c"\0A\09\09\09\09\09\09\09 Value of the postfix expression = %.2f\00"
define void @PostfixEvaluation_call() {
%1 = alloca float
%2 = alloca [100 x i8]
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%4 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%5 = call i32 @gets(i8* %4)
%6 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%7 = call float @evaluatePostfixExp(i8* %6)
store float %7, float* %1
%8 = load float, float* %1
%9 = fpext float %8 to double
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str.1, i64 0, i64 0), double %9)
ret void
}

LLVM IR (-O2):
@.str = [43 x i8] c"\0A\09\09\09\09\09\09\09\09 Enter any postfix expression: \00"
@.str.1 = [50 x i8] c"\0A\09\09\09\09\09\09\09 Value of the postfix expression = %.2f\00"
define void @PostfixEvaluation_call() {
%1 = alloca [100 x i8]
%2 = getelementptr inbounds [100 x i8], [100 x i8]* %1, i64 0, i64 0
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @gets(i8* %2)
%5 = call float @evaluatePostfixExp(i8* %2)
%6 = fpext float %5 to double
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([50 x i8], [50 x i8]* @.str.1, i64 0, i64 0), double %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int);
main() {
  int a, b, c;
  a = 4;
  b = 5;
  c = a + b;
  printf("This sum of %d and %d is %d\n", a, b, c);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x4,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x4,%esi
mov    $0x5,%edx
mov    $0x9,%ecx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"This sum of %d and %d is %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 4, i32* %1
store i32 5, i32* %2
%4 = load i32, i32* %1
%5 = load i32, i32* %2
%6 = add nsw i32 %4, %5
store i32 %6, i32* %3
%7 = load i32, i32* %1
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8, i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [29 x i8] c"This sum of %d and %d is %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 4, i32 5, i32 9)
ret i32 0
}
int foo(a)
int a;
{ return 0; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
ret i32 0
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMR89_get(void) { return U_WMRCORENONE_get("U_WMR89"); }


x86 assembly (clang, -O0):
<U_WMR89_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR89_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR89\00"
define i32 @U_WMR89_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR89\00"
define i32 @U_WMR89_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
/* Type definitions */
typedef int uint_fast64_t;

/* Variables and functions */
int UINT64_C(int);
bool softfloat_isSigNaNF64UI(uint_fast64_t ui) {
  return ((ui >> 51 & 0xFFF) == 0xFFE) && (ui & UINT64_C(0x0007FFFFFFFFFFFF));
}


x86 assembly (clang, -O0):
<softfloat_isSigNaNF64UI>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x33,%ecx
sar    %cl,%eax
mov    %eax,%ecx
and    $0xfff,%ecx
xor    %eax,%eax
cmp    $0xffe,%ecx
mov    %al,-0x5(%rbp)
jne    115e <softfloat_isSigNaNF64UI+0x4e>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0xffffffff,%edi
call   1030 <UINT64_C@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softfloat_isSigNaNF64UI>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @softfloat_isSigNaNF64UI(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 51
%5 = and i32 %4, 4095
%6 = icmp eq i32 %5, 4094
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i32, i32* %2
%9 = call i32 @UINT64_C(i32 -1)
%10 = and i32 %8, %9
%11 = icmp ne i32 %10, 0
br label %12
12: ; preds = %7, %1
%13 = phi i1 [ false, %1 ], [ %11, %7 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @softfloat_isSigNaNF64UI(i32 %0) {
ret i32 0
}
/* Type definitions */
typedef int u_int8_t;

/* Variables and functions */
int ipsec_validate_exchange(u_int8_t exch) { return exch != 32 && exch != 33; }


x86 assembly (clang, -O0):
<ipsec_validate_exchange>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1120 <ipsec_validate_exchange+0x20>
cmpl   $0x21,-0x4(%rbp)
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipsec_validate_exchange>:
and    $0xfffffffe,%edi
xor    %eax,%eax
cmp    $0x20,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @ipsec_validate_exchange(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 32
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp ne i32 %6, 33
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @ipsec_validate_exchange(i32 %0) {
%2 = and i32 %0, -2
%3 = icmp ne i32 %2, 32
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ read(int, void *, size_t);
ssize_t read_pre(int fd, void *buffer, size_t count) {
  return read(fd, buffer, count);
}


x86 assembly (clang, -O0):
<read_pre>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <read@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_pre>:
jmp    1030 <read@plt>

LLVM IR (-O0):
define i32 @read_pre(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @read(i32 %7, i8* %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @read_pre(i32 %0, i8* nocapture %1, i64 %2) {
%4 = tail call i32 @read(i32 %0, i8* %1, i64 %2)
ret i32 %4
}
float arectangle(float l, float h) { return (l * h); }


x86 assembly (clang, -O0):
<arectangle>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<arectangle>:
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @arectangle(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fmul float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @arectangle(float %0, float %1) {
%3 = fmul float %0, %1
ret float %3
}
int test_imm_8Euint8_mem(unsigned char *val) {
  return ((*val) & (0x8E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Euint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0x8e,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Euint8_mem>:
testb  $0x8e,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Euint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 142
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_8Euint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -114
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int rand();
int /*<<< orphan*/ sleep(int);
void sail(int boat_id) {
  int sail_time = rand() % 6 + 1;
  printf("[B%02d] will sail for %d secs.\n", sail_time);
  sleep(sail_time);
}


x86 assembly (clang, -O0):
<sail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1050 <rand@plt>
mov    $0x6,%ecx
cltd
idiv   %ecx
add    $0x1,%edx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xea6(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%edi
call   1040 <sleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sail>:
push   %rbx
xor    %eax,%eax
call   1050 <rand@plt>
cltq
imul   $0x2aaaaaab,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rcx
add    %edx,%ecx
add    %ecx,%ecx
lea    (%rcx,%rcx,2),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%ebx
add    $0x1,%ebx
lea    0xe9e(%rip),%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <sleep@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"[B%02d] will sail for %d secs.\0A\00"
define void @sail(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 (...) @rand()
%5 = srem i32 %4, 6
%6 = add nsw i32 %5, 1
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = load i32, i32* %3
%10 = call i32 @sleep(i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [32 x i8] c"[B%02d] will sail for %d secs.\0A\00"
define void @sail(i32 %0) {
%2 = tail call i32 (...) @rand()
%3 = srem i32 %2, 6
%4 = add nsw i32 %3, 1
%5 = tail call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = tail call i32 @sleep(i32 %4)
ret void
}
/* Type definitions */
struct rlimit {
  void *rlim_max;
  void *rlim_cur;
};
typedef void *rlim_t;

/* Variables and functions */
int setrlimit(int, struct rlimit *);
int limit(int resource, rlim_t max) {
  struct rlimit l;
  l.rlim_cur = max;
  l.rlim_max = max;
  return setrlimit(resource, &l);
}


x86 assembly (clang, -O0):
<limit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x20(%rbp),%rsi
call   1030 <setrlimit@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<limit>:
sub    $0x18,%rsp
mov    %rsi,0x10(%rsp)
mov    %rsi,0x8(%rsp)
lea    0x8(%rsp),%rsi
call   1030 <setrlimit@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.rlimit = type { i8*, i8* }
define i32 @limit(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca %struct.rlimit
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = getelementptr inbounds %struct.rlimit, %struct.rlimit* %5, i32 0, i32 1
store i8* %6, i8** %7
%8 = load i8*, i8** %4
%9 = getelementptr inbounds %struct.rlimit, %struct.rlimit* %5, i32 0, i32 0
store i8* %8, i8** %9
%10 = load i32, i32* %3
%11 = call i32 @setrlimit(i32 %10, %struct.rlimit* %5)
ret i32 %11
}

LLVM IR (-O2):
%struct.rlimit = type { i8*, i8* }
define i32 @limit(i32 %0, i8* %1) {
%3 = alloca %struct.rlimit
%4 = bitcast %struct.rlimit* %3 to i8*
%5 = getelementptr inbounds %struct.rlimit, %struct.rlimit* %3, i64 0, i32 1
store i8* %1, i8** %5
%6 = getelementptr inbounds %struct.rlimit, %struct.rlimit* %3, i64 0, i32 0
store i8* %1, i8** %6
%7 = call i32 @setrlimit(i32 %0, %struct.rlimit* %3)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(int argc, const char **argv) {
  printf("%i", (argc + 1));
  return argc - 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%esi
add    $0x1,%esi
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    %edi,%ebx
lea    0x1(%rbx),%esi
lea    0xee3(%rip),%rdi
call   1030 <printf@plt>
add    $0xffffffff,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%i\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 1
%8 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = load i32, i32* %4
%10 = sub nsw i32 %9, 1
ret i32 %10
}

LLVM IR (-O2):
@.str = [3 x i8] c"%i\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = add nsw i32 %0, 1
%4 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = add nsw i32 %0, -1
ret i32 %5
}
main() {
  typedef int *intp;
  goto next;
  __builtin_trap();
next:
  not_builtin();
  _Static_assert(1 == (__builtin_constant_p(__builtin_constant_p(5))),
                 "__builtin_constant_p(__builtin_constant_p(5))"
                 " failed");
  _Static_assert(
      1 == (__builtin_constant_p(__builtin_types_compatible_p(void, int))),
      "__builtin_constant_p(__builtin_types_compatible_p(void, int))"
      " failed");
  _Static_assert(1 == (__builtin_types_compatible_p(int *, intp)),
                 "__builtin_types_compatible_p(int *, intp)"
                 " failed");
  _Static_assert(1 == (__builtin_types_compatible_p(int *, __typeof(0) *)),
                 "__builtin_types_compatible_p(int *, __typeof(0) *)"
                 " failed");
  _Static_assert(0 == (__builtin_constant_p(f())), "__builtin_constant_p(f())"
                                                   " failed");
  _Static_assert(1 == (__builtin_constant_p(1)), "__builtin_constant_p(1)"
                                                 " failed");
  return 0;
  __builtin_unreachable();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <not_builtin@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <not_builtin@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0
%3 = call i32 (...) @not_builtin()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @not_builtin()
ret i32 0
}
int ft_isparenthesis(int c) {
  if (c == '(' || c == ')')
    return (1);
  else if (c == '[' || c == ']')
    return (1);
  else if (c == '{' || c == '}')
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<ft_isparenthesis>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x28,-0x8(%rbp)
je     111b <ft_isparenthesis+0x1b>
cmpl   $0x29,-0x8(%rbp)
jne    1127 <ft_isparenthesis+0x27>
movl   $0x1,-0x4(%rbp)
jmp    1178 <ft_isparenthesis+0x78>
cmpl   $0x5b,-0x8(%rbp)
je     113b <ft_isparenthesis+0x3b>
cmpl   $0x5d,-0x8(%rbp)
jne    1147 <ft_isparenthesis+0x47>
movl   $0x1,-0x4(%rbp)
jmp    1178 <ft_isparenthesis+0x78>
cmpl   $0x7b,-0x8(%rbp)
je     115b <ft_isparenthesis+0x5b>
cmpl   $0x7d,-0x8(%rbp)
jne    1167 <ft_isparenthesis+0x67>
movl   $0x1,-0x4(%rbp)
jmp    1178 <ft_isparenthesis+0x78>
jmp    116c <ft_isparenthesis+0x6c>
jmp    1171 <ft_isparenthesis+0x71>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isparenthesis>:
mov    %edi,%ecx
and    $0xfffffffe,%ecx
mov    $0x1,%eax
cmp    $0x28,%ecx
je     1127 <ft_isparenthesis+0x27>
add    $0xffffffa5,%edi
cmp    $0x22,%edi
ja     1128 <ft_isparenthesis+0x28>
movabs $0x500000005,%rcx
bt     %rdi,%rcx
jae    1128 <ft_isparenthesis+0x28>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ft_isparenthesis(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 40
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 41
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 1, i32* %2
br label %27
10: ; preds = %6
%11 = load i32, i32* %3
%12 = icmp eq i32 %11, 91
br i1 %12, label %16, label %13
13: ; preds = %10
%14 = load i32, i32* %3
%15 = icmp eq i32 %14, 93
br i1 %15, label %16, label %17
16: ; preds = %13, %10
store i32 1, i32* %2
br label %27
17: ; preds = %13
%18 = load i32, i32* %3
%19 = icmp eq i32 %18, 123
br i1 %19, label %23, label %20
20: ; preds = %17
%21 = load i32, i32* %3
%22 = icmp eq i32 %21, 125
br i1 %22, label %23, label %24
23: ; preds = %20, %17
store i32 1, i32* %2
br label %27
24: ; preds = %20
br label %25
25: ; preds = %24
br label %26
26: ; preds = %25
store i32 0, i32* %2
br label %27
27: ; preds = %26, %23, %16, %9
%28 = load i32, i32* %2
ret i32 %28
}

LLVM IR (-O2):
define i32 @ft_isparenthesis(i32 %0) {
%2 = and i32 %0, -2
%3 = icmp eq i32 %2, 40
br i1 %3, label %6, label %4
4: ; preds = %1
switch i32 %0, label %5 [
i32 93, label %6
i32 91, label %6
i32 125, label %6
i32 123, label %6
]
5: ; preds = %4
br label %6
6: ; preds = %4, %4, %4, %4, %1, %5
%7 = phi i32 [ 0, %5 ], [ 1, %1 ], [ 1, %4 ], [ 1, %4 ], [ 1, %4 ], [ 1, %4 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ iis_s3c2410_hw_exit();
void iis_hw_exit(void) { iis_s3c2410_hw_exit(); }


x86 assembly (clang, -O0):
<iis_hw_exit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <iis_s3c2410_hw_exit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<iis_hw_exit>:
xor    %eax,%eax
jmp    1030 <iis_s3c2410_hw_exit@plt>

LLVM IR (-O0):
define void @iis_hw_exit() {
%1 = call i32 (...) @iis_s3c2410_hw_exit()
ret void
}

LLVM IR (-O2):
define void @iis_hw_exit() {
%1 = tail call i32 (...) @iis_s3c2410_hw_exit()
ret void
}
/* Type definitions */
struct lm {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ lm_remove_n(struct lm *, char const *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char const *);
void lm_remove(struct lm *map, const char *key) {
  lm_remove_n(map, key, strlen(key));
}


x86 assembly (clang, -O0):
<lm_remove>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1040 <lm_remove_n@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lm_remove>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <lm_remove_n@plt>

LLVM IR (-O0):
%struct.lm = type { i32 }
define void @lm_remove(%struct.lm* %0, i8* %1) {
%3 = alloca %struct.lm*
%4 = alloca i8*
store %struct.lm* %0, %struct.lm** %3
store i8* %1, i8** %4
%5 = load %struct.lm*, %struct.lm** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i32 @lm_remove_n(%struct.lm* %5, i8* %6, i32 %8)
ret void
}

LLVM IR (-O2):
%struct.lm = type { i32 }
define void @lm_remove(%struct.lm* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @lm_remove_n(%struct.lm* %0, i8* %1, i32 %3)
ret void
}
void outportb(unsigned short port, unsigned char data) {
  asm volatile("outb %1, %0" : : "dN"(port), "a"(data));
}


x86 assembly (clang, -O0):
<outportb>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %al,-0x3(%rbp)
mov    -0x2(%rbp),%dx
mov    -0x3(%rbp),%al
out    %al,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outportb>:
mov    %esi,%eax
mov    %edi,%edx
out    %al,(%dx)
ret

LLVM IR (-O0):
define void @outportb(i16 zeroext %0, i8 zeroext %1) {
%3 = alloca i16
%4 = alloca i8
store i16 %0, i16* %3
store i8 %1, i8* %4
%5 = load i16, i16* %3
%6 = load i8, i8* %4
ret void
}

LLVM IR (-O2):
define void @outportb(i16 zeroext %0, i8 zeroext %1) {
tail call void asm sideeffect "outb $1, $0", "{dx}N,{ax},~{dirflag},~{fpsr},~{flags}"(i16 %0, i8 %1)
ret void
}
void writePort1(unsigned short int port, unsigned char value) {
  __asm__ __volatile__("outb %b0,%w1" : : "a"(value), "Nd"(port));
}


x86 assembly (clang, -O0):
<writePort1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    -0x2(%rbp),%dx
out    %al,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<writePort1>:
mov    %esi,%eax
mov    %edi,%edx
out    %al,(%dx)
ret

LLVM IR (-O0):
define void @writePort1(i16 zeroext %0, i8 zeroext %1) {
%3 = alloca i16
%4 = alloca i8
store i16 %0, i16* %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i16, i16* %3
ret void
}

LLVM IR (-O2):
define void @writePort1(i16 zeroext %0, i8 zeroext %1) {
tail call void asm sideeffect "outb ${0:b},${1:w}", "{ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i8 %1, i16 %0)
ret void
}
/* Variables and functions */
double RAND_MAX;
scalar_t__ rand();
double rd(void) { return (double)rand() / RAND_MAX * 20.0 - 10.0; }


x86 assembly (clang, -O0):
<rd>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ec1(%rip),%rax
divsd  (%rax),%xmm0
movsd  0xecd(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xec9(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<rd>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ec4(%rip),%rax
divsd  (%rax),%xmm0
mulsd  0xed0(%rip),%xmm0
addsd  0xed0(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global double 0.000000e+00
define double @rd() {
%1 = call i64 (...) @rand()
%2 = sitofp i64 %1 to double
%3 = load double, double* @RAND_MAX
%4 = fdiv double %2, %3
%5 = call double @llvm.fmuladd.f64(double %4, double 2.000000e+01, double -1.000000e+01)
ret double %5
}

LLVM IR (-O2):
@RAND_MAX = global double 0.000000e+00
define double @rd() {
%1 = tail call i64 (...) @rand()
%2 = sitofp i64 %1 to double
%3 = load double, double* @RAND_MAX
%4 = fdiv double %2, %3
%5 = tail call double @llvm.fmuladd.f64(double %4, double 2.000000e+01, double -1.000000e+01)
ret double %5
}
/* Variables and functions */
int /*<<< orphan*/ usleep(unsigned int);
void msleep(unsigned ms) { usleep(ms * 1000); }


x86 assembly (clang, -O0):
<msleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msleep>:
imul   $0x3e8,%edi,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @msleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul i32 %3, 1000
%5 = call i32 @usleep(i32 %4)
ret void
}

LLVM IR (-O2):
define void @msleep(i32 %0) {
%2 = mul i32 %0, 1000
%3 = tail call i32 @usleep(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abortmsg(char *);
void *realloc(void *, size_t);
void *chg_reallocx(void *ptr, size_t size) {
  void *result = realloc(ptr, size);
  if (!result)
    abortmsg("failed to realloc");
  return result;
}


x86 assembly (clang, -O0):
<chg_reallocx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1158 <chg_reallocx+0x38>
lea    0xead(%rip),%rdi
call   1040 <abortmsg@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chg_reallocx>:
push   %rbx
call   1030 <realloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <chg_reallocx+0x1a>
lea    0xecb(%rip),%rdi
call   1040 <abortmsg@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"failed to realloc\00"
define i8* @chg_reallocx(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %13, label %11
11: ; preds = %2
%12 = call i32 @abortmsg(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %2
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
@.str = [18 x i8] c"failed to realloc\00"
define noalias i8* @chg_reallocx(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @abortmsg(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret i8* %3
}
/* Type definitions */
typedef int uint32_t;
typedef int int64_t;

/* Variables and functions */
int64_t clearBit_fun_int64_t(int64_t x, uint32_t i) { return x & ~(1 << i); }


x86 assembly (clang, -O0):
<clearBit_fun_int64_t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clearBit_fun_int64_t>:
mov    %edi,%eax
btr    %esi,%eax
ret

LLVM IR (-O0):
define i32 @clearBit_fun_int64_t(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 1, %6
%8 = xor i32 %7, -1
%9 = and i32 %5, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @clearBit_fun_int64_t(i32 %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = xor i32 %3, -1
%5 = and i32 %4, %0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void lnvm_close(int fd) { close(fd); }


x86 assembly (clang, -O0):
<lnvm_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lnvm_close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @lnvm_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret void
}

LLVM IR (-O2):
define void @lnvm_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret void
}
int sys$bintim(void *timbuf, unsigned long long *timadr) {
  return ({
    unsigned long resultvar;
    register long int _a2 asm("rsi") = (long)(timadr);
    register long int _a1 asm("rdi") = (long)(timbuf);
    asm volatile("movq %1, %%rax\n\t"
                 "int $0x84\n\t"
                 : "=a"(resultvar)
                 : "i"(2), "r"(_a1), "r"(_a2)
                 : "memory", "cc", "r11", "cx");
    (long)resultvar;
  });
}


x86 assembly (clang, -O0):
<sys$bintim>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    $0x2,%rax
int    $0x84
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys$bintim>:
mov    $0x2,%rax
int    $0x84
ret

LLVM IR (-O0):
define i32 @"sys$bintim"(i8* %0, i64* %1) {
%3 = alloca i8*
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i8* %0, i8** %3
store i64* %1, i64** %4
%9 = load i64*, i64** %4
%10 = ptrtoint i64* %9 to i64
store i64 %10, i64* %6
%11 = load i8*, i8** %3
%12 = ptrtoint i8* %11 to i64
store i64 %12, i64* %7
%13 = load i64, i64* %7
%14 = load i64, i64* %6
%15 = call i64 asm sideeffect "movq $1, %rax\0A\09int $$0x84\0A\09", "={ax},i,{rdi},{rsi},~{memory},~{cc},~{r11},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 2, i64 %13, i64 %14)
store i64 %15, i64* %5
%16 = load i64, i64* %5
store i64 %16, i64* %8
%17 = load i64, i64* %8
%18 = trunc i64 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @"sys$bintim"(i8* %0, i64* %1) {
%3 = ptrtoint i64* %1 to i64
%4 = ptrtoint i8* %0 to i64
%5 = tail call i64 asm sideeffect "movq $1, %rax\0A\09int $$0x84\0A\09", "={ax},i,{rdi},{rsi},~{memory},~{cc},~{r11},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 2, i64 %4, i64 %3)
%6 = trunc i64 %5 to i32
ret i32 %6
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_network_monitor_new(void **m, const char *category) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_network_monitor_new>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ecb(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_network_monitor_new>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_network_monitor_new(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
store i8** %0, i8*** %3
store i8* %1, i8** %4
%5 = load i32, i32* @EINVAL
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_network_monitor_new(i8** nocapture readnone %0, i8* nocapture readnone %1) {
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ put8(unsigned char);
void shr_reg64_imm8(unsigned int reg64, unsigned char imm8) {
  put8(0x48);
  put8(0xC1);
  put8(0xE8 + reg64);
  put8(imm8);
}


x86 assembly (clang, -O0):
<shr_reg64_imm8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    $0x48,%edi
call   1030 <put8@plt>
mov    $0xc1,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%eax
add    $0xe8,%eax
movzbl %al,%edi
call   1030 <put8@plt>
movzbl -0x5(%rbp),%edi
call   1030 <put8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shr_reg64_imm8>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x48,%edi
call   1030 <put8@plt>
mov    $0xc1,%edi
call   1030 <put8@plt>
add    $0xe8,%bpl
movzbl %bpl,%edi
call   1030 <put8@plt>
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @shr_reg64_imm8(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
%5 = call i32 @put8(i8 zeroext 72)
%6 = call i32 @put8(i8 zeroext -63)
%7 = load i32, i32* %3
%8 = add i32 232, %7
%9 = trunc i32 %8 to i8
%10 = call i32 @put8(i8 zeroext %9)
%11 = load i8, i8* %4
%12 = call i32 @put8(i8 zeroext %11)
ret void
}

LLVM IR (-O2):
define void @shr_reg64_imm8(i32 %0, i8 zeroext %1) {
%3 = tail call i32 @put8(i8 zeroext 72)
%4 = tail call i32 @put8(i8 zeroext -63)
%5 = trunc i32 %0 to i8
%6 = add i8 %5, -24
%7 = tail call i32 @put8(i8 zeroext %6)
%8 = tail call i32 @put8(i8 zeroext %1)
ret void
}
char *return_rabbitlancer() { return "A LOGO IS COMING SOON!"; }


x86 assembly (clang, -O0):
<return_rabbitlancer>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<return_rabbitlancer>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [23 x i8] c"A LOGO IS COMING SOON!\00"
define i8* @return_rabbitlancer() {
ret i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [23 x i8] c"A LOGO IS COMING SOON!\00"
define i8* @return_rabbitlancer() {
ret i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ server_shutdown();
void cf_quit(char *c) { server_shutdown(); }


x86 assembly (clang, -O0):
<cf_quit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <server_shutdown@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cf_quit>:
xor    %eax,%eax
jmp    1030 <server_shutdown@plt>

LLVM IR (-O0):
define void @cf_quit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @server_shutdown()
ret void
}

LLVM IR (-O2):
define void @cf_quit(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @server_shutdown()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void internaloutput(const char *str) { printf("%s", str); }


x86 assembly (clang, -O0):
<internaloutput>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<internaloutput>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @internaloutput(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @internaloutput(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}