xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ BF_execute(char *);
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char const *, char *);
int /*<<< orphan*/ fread(char *, int, int, int /*<<< orphan*/ *);
void BF_executeFile(const char *filename) {
  char code[30000 + 1] = {0};
  FILE *file = fopen(filename, "r");
  fread(code, sizeof(*code), 30000, file);
  fclose(file);
  BF_execute(code);
}


x86 assembly (clang, -O0):
<BF_executeFile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x7550,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x7540(%rbp),%rdi
xor    %esi,%esi
mov    $0x7531,%edx
call   1050 <memset@plt>
mov    -0x8(%rbp),%rdi
lea    0xe83(%rip),%rsi
call   1070 <fopen@plt>
mov    %rax,-0x7548(%rbp)
lea    -0x7540(%rbp),%rdi
mov    -0x7548(%rbp),%rcx
mov    $0x1,%esi
mov    $0x7530,%edx
call   1030 <fread@plt>
mov    -0x7548(%rbp),%rdi
call   1040 <fclose@plt>
lea    -0x7540(%rbp),%rdi
call   1060 <BF_execute@plt>
add    $0x7550,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BF_executeFile>:
push   %r14
push   %rbx
sub    $0x7538,%rsp
mov    %rdi,%rbx
mov    %rsp,%r14
mov    $0x7531,%edx
mov    %r14,%rdi
xor    %esi,%esi
call   1050 <memset@plt>
lea    0xe8a(%rip),%rsi
mov    %rbx,%rdi
call   1070 <fopen@plt>
mov    %rax,%rbx
mov    %r14,%rdi
mov    $0x1,%esi
mov    $0x7530,%edx
mov    %rax,%rcx
call   1030 <fread@plt>
mov    %rbx,%rdi
call   1040 <fclose@plt>
mov    %r14,%rdi
call   1060 <BF_execute@plt>
add    $0x7538,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [2 x i8] c"r\00"
define void @BF_executeFile(i8* %0) {
%2 = alloca i8*
%3 = alloca [30001 x i8]
%4 = alloca i32*
store i8* %0, i8** %2
%5 = bitcast [30001 x i8]* %3 to i8*
%6 = load i8*, i8** %2
%7 = call i32* @fopen(i8* %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %7, i32** %4
%8 = getelementptr inbounds [30001 x i8], [30001 x i8]* %3, i64 0, i64 0
%9 = load i32*, i32** %4
%10 = call i32 @fread(i8* %8, i32 1, i32 30000, i32* %9)
%11 = load i32*, i32** %4
%12 = call i32 @fclose(i32* %11)
%13 = getelementptr inbounds [30001 x i8], [30001 x i8]* %3, i64 0, i64 0
%14 = call i32 @BF_execute(i8* %13)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"r\00"
define void @BF_executeFile(i8* nocapture %0) {
%2 = alloca [30001 x i8]
%3 = getelementptr inbounds [30001 x i8], [30001 x i8]* %2, i64 0, i64 0
%4 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @fread(i8* %3, i32 1, i32 30000, i32* %4)
%6 = tail call i32 @fclose(i32* %4)
%7 = call i32 @BF_execute(i8* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TRUE;
int /*<<< orphan*/ cbreak();
int /*<<< orphan*/ curs_set(int /*<<< orphan*/);
int /*<<< orphan*/ initscr();
int /*<<< orphan*/ leaveok(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ noecho();
int /*<<< orphan*/ nonl();
int /*<<< orphan*/ savetty();
int /*<<< orphan*/ stdscr;
int /*<<< orphan*/ timeout(int /*<<< orphan*/);
void start() {
  initscr();
  savetty();
  nonl();
  cbreak();
  noecho();
  timeout(0);
  leaveok(stdscr, TRUE);
  curs_set(0);
}


x86 assembly (clang, -O0):
<start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <initscr@plt>
mov    $0x0,%al
call   1030 <savetty@plt>
mov    $0x0,%al
call   1070 <nonl@plt>
mov    $0x0,%al
call   1040 <cbreak@plt>
mov    $0x0,%al
call   1080 <noecho@plt>
xor    %edi,%edi
call   1060 <timeout@plt>
mov    0x2e33(%rip),%rax
mov    (%rax),%edi
mov    0x2e22(%rip),%rax
mov    (%rax),%esi
call   10a0 <leaveok@plt>
xor    %edi,%edi
call   1090 <curs_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<start>:
push   %rax
xor    %eax,%eax
call   1050 <initscr@plt>
xor    %eax,%eax
call   1030 <savetty@plt>
xor    %eax,%eax
call   1070 <nonl@plt>
xor    %eax,%eax
call   1040 <cbreak@plt>
xor    %eax,%eax
call   1080 <noecho@plt>
xor    %edi,%edi
call   1060 <timeout@plt>
mov    0x2e36(%rip),%rax
mov    (%rax),%edi
mov    0x2e25(%rip),%rax
mov    (%rax),%esi
call   10a0 <leaveok@plt>
xor    %edi,%edi
pop    %rax
jmp    1090 <curs_set@plt>

LLVM IR (-O0):
@stdscr = global i32 0
@TRUE = global i32 0
define void @start() {
%1 = call i32 (...) @initscr()
%2 = call i32 (...) @savetty()
%3 = call i32 (...) @nonl()
%4 = call i32 (...) @cbreak()
%5 = call i32 (...) @noecho()
%6 = call i32 @timeout(i32 0)
%7 = load i32, i32* @stdscr
%8 = load i32, i32* @TRUE
%9 = call i32 @leaveok(i32 %7, i32 %8)
%10 = call i32 @curs_set(i32 0)
ret void
}

LLVM IR (-O2):
@stdscr = global i32 0
@TRUE = global i32 0
define void @start() {
%1 = tail call i32 (...) @initscr()
%2 = tail call i32 (...) @savetty()
%3 = tail call i32 (...) @nonl()
%4 = tail call i32 (...) @cbreak()
%5 = tail call i32 (...) @noecho()
%6 = tail call i32 @timeout(i32 0)
%7 = load i32, i32* @stdscr
%8 = load i32, i32* @TRUE
%9 = tail call i32 @leaveok(i32 %7, i32 %8)
%10 = tail call i32 @curs_set(i32 0)
ret void
}
main() {
  struct {
    int i : 1;
  };
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void cu_noop() { return; }


x86 assembly (clang, -O0):
<cu_noop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cu_noop>:
ret

LLVM IR (-O0):
define void @cu_noop() {
ret void
}

LLVM IR (-O2):
define void @cu_noop() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ opx_dreg(char *, char *);
void i_subx_dreg(void) { opx_dreg("sbb", ""); }


x86 assembly (clang, -O0):
<i_subx_dreg>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee1(%rip),%rsi
call   1030 <opx_dreg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<i_subx_dreg>:
lea    0xee9(%rip),%rdi
lea    0xee5(%rip),%rsi
jmp    1030 <opx_dreg@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"sbb\00"
@.str.1 = [1 x i8] zeroinitializer
define void @i_subx_dreg() {
%1 = call i32 @opx_dreg(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"sbb\00"
@.str.1 = [1 x i8] zeroinitializer
define void @i_subx_dreg() {
%1 = tail call i32 @opx_dreg(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t nn_gets(const uint8_t *buf) {
  return (((uint16_t)buf[0]) << 8) | ((uint16_t)buf[1]);
}


x86 assembly (clang, -O0):
<nn_gets>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%rcx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nn_gets>:
mov    (%rdi),%eax
shl    $0x8,%eax
or     0x8(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @nn_gets(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = getelementptr inbounds i64, i64* %3, i64 0
%5 = load i64, i64* %4
%6 = trunc i64 %5 to i32
%7 = shl i32 %6, 8
%8 = load i64*, i64** %2
%9 = getelementptr inbounds i64, i64* %8, i64 1
%10 = load i64, i64* %9
%11 = trunc i64 %10 to i32
%12 = or i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @nn_gets(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = trunc i64 %2 to i32
%4 = shl i32 %3, 8
%5 = getelementptr inbounds i64, i64* %0, i64 1
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
%8 = or i32 %4, %7
ret i32 %8
}
void TCPWM_1_SaveConfig(void) {}


x86 assembly (clang, -O0):
<TCPWM_1_SaveConfig>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TCPWM_1_SaveConfig>:
ret

LLVM IR (-O0):
define void @TCPWM_1_SaveConfig() {
ret void
}

LLVM IR (-O2):
define void @TCPWM_1_SaveConfig() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EspDrv_espEmptyBuf(int);
int EspDrv_readUntil(int, void *, int);
int /*<<< orphan*/ UART_println(char *);
int EspDrv_sendCmd(char *cmd, int timeout) {
  int idx;
  EspDrv_espEmptyBuf((1));
  ;
  ;
  UART_println(cmd);
  idx = EspDrv_readUntil(timeout, ((void *)0), (1));
  ;
  ;
  return idx;
}


x86 assembly (clang, -O0):
<EspDrv_sendCmd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%edi
call   1030 <EspDrv_espEmptyBuf@plt>
mov    -0x8(%rbp),%rdi
call   1040 <UART_println@plt>
mov    -0xc(%rbp),%edi
xor    %eax,%eax
mov    %eax,%esi
mov    $0x1,%edx
call   1050 <EspDrv_readUntil@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EspDrv_sendCmd>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    $0x1,%edi
call   1030 <EspDrv_espEmptyBuf@plt>
mov    %rbx,%rdi
call   1040 <UART_println@plt>
mov    %ebp,%edi
xor    %esi,%esi
mov    $0x1,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <EspDrv_readUntil@plt>

LLVM IR (-O0):
define i32 @EspDrv_sendCmd(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = call i32 @EspDrv_espEmptyBuf(i32 1)
%7 = load i8*, i8** %3
%8 = call i32 @UART_println(i8* %7)
%9 = load i32, i32* %4
%10 = call i32 @EspDrv_readUntil(i32 %9, i8* null, i32 1)
store i32 %10, i32* %5
%11 = load i32, i32* %5
ret i32 %11
}

LLVM IR (-O2):
define i32 @EspDrv_sendCmd(i8* %0, i32 %1) {
%3 = tail call i32 @EspDrv_espEmptyBuf(i32 1)
%4 = tail call i32 @UART_println(i8* %0)
%5 = tail call i32 @EspDrv_readUntil(i32 %1, i8* null, i32 1)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ _sys_write(char *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
void print_string(char *str) { _sys_write(str, strlen(str)); }


x86 assembly (clang, -O0):
<print_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1030 <_sys_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_string>:
push   %rbx
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1030 <_sys_write@plt>

LLVM IR (-O0):
define void @print_string(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = call i32 @_sys_write(i8* %3, i32 %5)
ret void
}

LLVM IR (-O2):
define void @print_string(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32 @_sys_write(i8* %0, i32 %2)
ret void
}
unsigned char GetInterruptVector() { return 0x00; }


x86 assembly (clang, -O0):
<GetInterruptVector>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetInterruptVector>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i8 @GetInterruptVector() {
ret i8 0
}

LLVM IR (-O2):
define zeroext i8 @GetInterruptVector() {
ret i8 0
}
unsigned int vixGetVersion(void) { return (100); }


x86 assembly (clang, -O0):
<vixGetVersion>:
push   %rbp
mov    %rsp,%rbp
mov    $0x64,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vixGetVersion>:
mov    $0x64,%eax
ret

LLVM IR (-O0):
define i32 @vixGetVersion() {
ret i32 100
}

LLVM IR (-O2):
define i32 @vixGetVersion() {
ret i32 100
}
/* Variables and functions */
int /*<<< orphan*/ do_interact(char *);
int /*<<< orphan*/ do_test(char *);
int main(int args, char *argv[]) {
  do_test("ls -l /usr");
  do_interact("python ./interact.py");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
call   1040 <do_test@plt>
lea    0xec2(%rip),%rdi
call   1030 <do_interact@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <do_test@plt>
lea    0xed7(%rip),%rdi
call   1030 <do_interact@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"ls -l /usr\00"
@.str.1 = [21 x i8] c"python ./interact.py\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @do_test(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @do_interact(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"ls -l /usr\00"
@.str.1 = [21 x i8] c"python ./interact.py\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @do_test(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @do_interact(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
void av_get_standard_channel_layout() {}


x86 assembly (clang, -O0):
<av_get_standard_channel_layout>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_get_standard_channel_layout>:
ret

LLVM IR (-O0):
define void @av_get_standard_channel_layout() {
ret void
}

LLVM IR (-O2):
define void @av_get_standard_channel_layout() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ read_config();
int /*<<< orphan*/ read_contacts();
int /*<<< orphan*/ read_macros();
void file_init() {
  read_contacts();
  read_config();
  read_macros();
}


x86 assembly (clang, -O0):
<file_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <read_contacts@plt>
mov    $0x0,%al
call   1040 <read_config@plt>
mov    $0x0,%al
call   1030 <read_macros@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_init>:
push   %rax
xor    %eax,%eax
call   1050 <read_contacts@plt>
xor    %eax,%eax
call   1040 <read_config@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <read_macros@plt>

LLVM IR (-O0):
define void @file_init() {
%1 = call i32 (...) @read_contacts()
%2 = call i32 (...) @read_config()
%3 = call i32 (...) @read_macros()
ret void
}

LLVM IR (-O2):
define void @file_init() {
%1 = tail call i32 (...) @read_contacts()
%2 = tail call i32 (...) @read_config()
%3 = tail call i32 (...) @read_macros()
ret void
}
void foo477(int p) {}


x86 assembly (clang, -O0):
<foo477>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo477>:
ret

LLVM IR (-O0):
define void @foo477(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo477(i32 %0) {
ret void
}
/* Variables and functions */
unsigned int inl(unsigned long);
int /*<<< orphan*/ outl(unsigned int, unsigned long);
void sunxi_io_mask(void *base, int offset, unsigned int value,
                   unsigned int mask) {
  unsigned int tmp = inl((unsigned long)(base + offset));
  tmp &= ~mask;
  tmp |= value & mask;
  outl(tmp, (unsigned long)(base + offset));
}


x86 assembly (clang, -O0):
<sunxi_io_mask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
movslq -0xc(%rbp),%rax
add    %rax,%rdi
call   1040 <inl@plt>
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
and    -0x14(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%edi
mov    -0x8(%rbp),%rsi
movslq -0xc(%rbp),%rax
add    %rax,%rsi
call   1030 <outl@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sunxi_io_mask>:
push   %rbp
push   %r14
push   %rbx
mov    %ecx,%r14d
mov    %edx,%ebp
movslq %esi,%rbx
add    %rdi,%rbx
mov    %rbx,%rdi
call   1040 <inl@plt>
xor    %eax,%ebp
and    %r14d,%ebp
xor    %eax,%ebp
mov    %ebp,%edi
mov    %rbx,%rsi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <outl@plt>

LLVM IR (-O0):
define void @sunxi_io_mask(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i8*, i8** %5
%11 = load i32, i32* %6
%12 = sext i32 %11 to i64
%13 = getelementptr i8, i8* %10, i64 %12
%14 = ptrtoint i8* %13 to i64
%15 = call i32 @inl(i64 %14)
store i32 %15, i32* %9
%16 = load i32, i32* %8
%17 = xor i32 %16, -1
%18 = load i32, i32* %9
%19 = and i32 %18, %17
store i32 %19, i32* %9
%20 = load i32, i32* %7
%21 = load i32, i32* %8
%22 = and i32 %20, %21
%23 = load i32, i32* %9
%24 = or i32 %23, %22
store i32 %24, i32* %9
%25 = load i32, i32* %9
%26 = load i8*, i8** %5
%27 = load i32, i32* %6
%28 = sext i32 %27 to i64
%29 = getelementptr i8, i8* %26, i64 %28
%30 = ptrtoint i8* %29 to i64
%31 = call i32 @outl(i32 %25, i64 %30)
ret void
}

LLVM IR (-O2):
define void @sunxi_io_mask(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = sext i32 %1 to i64
%6 = getelementptr i8, i8* %0, i64 %5
%7 = ptrtoint i8* %6 to i64
%8 = tail call i32 @inl(i64 %7)
%9 = xor i32 %3, -1
%10 = and i32 %8, %9
%11 = and i32 %3, %2
%12 = or i32 %10, %11
%13 = tail call i32 @outl(i32 %12, i64 %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
void Sleep(int dwMilliseconds) { sleep(dwMilliseconds / 1000); }


x86 assembly (clang, -O0):
<Sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1030 <sleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sleep>:
movslq %edi,%rax
imul   $0x10624dd3,%rax,%rdi
mov    %rdi,%rax
shr    $0x3f,%rax
sar    $0x26,%rdi
add    %eax,%edi
jmp    1030 <sleep@plt>

LLVM IR (-O0):
define void @Sleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, 1000
%5 = call i32 @sleep(i32 %4)
ret void
}

LLVM IR (-O2):
define void @Sleep(i32 %0) {
%2 = sdiv i32 %0, 1000
%3 = tail call i32 @sleep(i32 %2)
ret void
}
void GPIODirModeSet(unsigned int baseAdd, unsigned int pinNumber,
                    unsigned int pinDirection) {
  if (((0x0u)) == pinDirection) {
    (*((volatile unsigned int *)(baseAdd + (0x134)))) &= ~(1 << pinNumber);
  } else {
    (*((volatile unsigned int *)(baseAdd + (0x134)))) |= (1 << pinNumber);
  }
}


x86 assembly (clang, -O0):
<GPIODirModeSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
xor    %eax,%eax
cmp    -0xc(%rbp),%eax
jne    113a <GPIODirModeSet+0x3a>
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
xor    $0xffffffff,%edx
mov    -0x4(%rbp),%eax
add    $0x134,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    %edx,%ecx
mov    %ecx,(%rax)
jmp    1154 <GPIODirModeSet+0x54>
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    -0x4(%rbp),%eax
add    $0x134,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIODirModeSet>:
mov    %esi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
test   %edx,%edx
je     1116 <GPIODirModeSet+0x16>
add    $0x134,%edi
or     %eax,(%rdi)
ret
not    %eax
add    $0x134,%edi
and    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @GPIODirModeSet(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = icmp eq i32 0, %7
br i1 %8, label %9, label %19
9: ; preds = %3
%10 = load i32, i32* %5
%11 = shl i32 1, %10
%12 = xor i32 %11, -1
%13 = load i32, i32* %4
%14 = add i32 %13, 308
%15 = zext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
%17 = load volatile i32, i32* %16
%18 = and i32 %17, %12
store volatile i32 %18, i32* %16
br label %28
19: ; preds = %3
%20 = load i32, i32* %5
%21 = shl i32 1, %20
%22 = load i32, i32* %4
%23 = add i32 %22, 308
%24 = zext i32 %23 to i64
%25 = inttoptr i64 %24 to i32*
%26 = load volatile i32, i32* %25
%27 = or i32 %26, %21
store volatile i32 %27, i32* %25
br label %28
28: ; preds = %19, %9
ret void
}

LLVM IR (-O2):
define void @GPIODirModeSet(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %2, 0
%5 = shl nuw i32 1, %1
br i1 %4, label %6, label %13
6: ; preds = %3
%7 = xor i32 %5, -1
%8 = add i32 %0, 308
%9 = zext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
%11 = load volatile i32, i32* %10
%12 = and i32 %11, %7
store volatile i32 %12, i32* %10
br label %19
13: ; preds = %3
%14 = add i32 %0, 308
%15 = zext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
%17 = load volatile i32, i32* %16
%18 = or i32 %17, %5
store volatile i32 %18, i32* %16
br label %19
19: ; preds = %13, %6
ret void
}
__attribute__((__section__(".cpuidle.text"))) void native_halt(void) {
  asm volatile("hlt" : : : "memory");
}


x86 assembly (clang, -O0):
<native_halt>:
push   %rbp
mov    %rsp,%rbp
hlt
pop    %rbp
ret

x86 assembly (clang, -O2):
<native_halt>:
hlt
ret

LLVM IR (-O0):
define void @native_halt() section ".cpuidle.text" {
ret void
}

LLVM IR (-O2):
define void @native_halt() section ".cpuidle.text" {
tail call void asm sideeffect "hlt", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
const char *src_get_version(void) { return ""; }


x86 assembly (clang, -O0):
<src_get_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<src_get_version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @src_get_version() {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @src_get_version() {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef scalar_t__ u_long;

/* Variables and functions */
int do_rand(scalar_t__ *);
int rand_r(unsigned int *ctx) {
  u_long val = (u_long)*ctx;
  int r = do_rand(&val);
  *ctx = (unsigned int)val;
  return (r);
}


x86 assembly (clang, -O0):
<rand_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %rax,-0x10(%rbp)
lea    -0x10(%rbp),%rdi
call   1030 <do_rand@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_r>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    (%rdi),%eax
mov    %rax,0x8(%rsp)
lea    0x8(%rsp),%rdi
call   1030 <do_rand@plt>
mov    0x8(%rsp),%ecx
mov    %ecx,(%rbx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @rand_r(i32* %0) {
%2 = alloca i32*
%3 = alloca i64
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
%7 = zext i32 %6 to i64
store i64 %7, i64* %3
%8 = call i32 @do_rand(i64* %3)
store i32 %8, i32* %4
%9 = load i64, i64* %3
%10 = trunc i64 %9 to i32
%11 = load i32*, i32** %2
store i32 %10, i32* %11
%12 = load i32, i32* %4
ret i32 %12
}

LLVM IR (-O2):
define i32 @rand_r(i32* nocapture %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = load i32, i32* %0
%5 = zext i32 %4 to i64
store i64 %5, i64* %2
%6 = call i32 @do_rand(i64* %2)
%7 = load i64, i64* %2
%8 = trunc i64 %7 to i32
store i32 %8, i32* %0
ret i32 %6
}
void fn1(int a) {
  const int x = a;
  if (x && x) {
  }
  if (x && (int)x) {
  }
  if ((int)x && x) {
  }
  if ((int)x && (int)x) {
  }
}


x86 assembly (clang, -O0):
<fn1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1126 <fn1+0x26>
cmpl   $0x0,-0x8(%rbp)
je     1126 <fn1+0x26>
jmp    1126 <fn1+0x26>
cmpl   $0x0,-0x8(%rbp)
je     113f <fn1+0x3f>
cmpl   $0x0,-0x8(%rbp)
je     113f <fn1+0x3f>
jmp    113f <fn1+0x3f>
cmpl   $0x0,-0x8(%rbp)
je     1158 <fn1+0x58>
cmpl   $0x0,-0x8(%rbp)
je     1158 <fn1+0x58>
jmp    1158 <fn1+0x58>
cmpl   $0x0,-0x8(%rbp)
je     1171 <fn1+0x71>
cmpl   $0x0,-0x8(%rbp)
je     1171 <fn1+0x71>
jmp    1171 <fn1+0x71>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn1>:
ret

LLVM IR (-O0):
define void @fn1(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %7
br label %11
11: ; preds = %10, %7, %1
%12 = load i32, i32* %3
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %11
%15 = load i32, i32* %3
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %14
br label %18
18: ; preds = %17, %14, %11
%19 = load i32, i32* %3
%20 = icmp ne i32 %19, 0
br i1 %20, label %21, label %25
21: ; preds = %18
%22 = load i32, i32* %3
%23 = icmp ne i32 %22, 0
br i1 %23, label %24, label %25
24: ; preds = %21
br label %25
25: ; preds = %24, %21, %18
%26 = load i32, i32* %3
%27 = icmp ne i32 %26, 0
br i1 %27, label %28, label %32
28: ; preds = %25
%29 = load i32, i32* %3
%30 = icmp ne i32 %29, 0
br i1 %30, label %31, label %32
31: ; preds = %28
br label %32
32: ; preds = %31, %28, %25
ret void
}

LLVM IR (-O2):
define void @fn1(i32 %0) {
ret void
}
int do_state_22(char c, int *state, char *word, int *length) {
  if (c >= '0' && c <= '9') {
    word[(*length)++] = c;
    *state = 24;
    return 0;
  } else {
    return 1;
  }
}


x86 assembly (clang, -O0):
<do_state_22>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1160 <do_state_22+0x60>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jg     1160 <do_state_22+0x60>
mov    -0x5(%rbp),%dl
mov    -0x18(%rbp),%rax
mov    -0x20(%rbp),%rsi
mov    (%rsi),%ecx
mov    %ecx,%edi
add    $0x1,%edi
mov    %edi,(%rsi)
movslq %ecx,%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x10(%rbp),%rax
movl   $0x18,(%rax)
movl   $0x0,-0x4(%rbp)
jmp    1167 <do_state_22+0x67>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_state_22>:
lea    -0x30(%rdi),%r8d
mov    $0x1,%eax
cmp    $0x9,%r8b
ja     1124 <do_state_22+0x24>
movslq (%rcx),%r8
lea    0x1(%r8),%eax
mov    %eax,(%rcx)
mov    %dil,(%rdx,%r8,1)
movl   $0x18,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @do_state_22(i8 signext %0, i32* %1, i8* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i8
%7 = alloca i32*
%8 = alloca i8*
%9 = alloca i32*
store i8 %0, i8* %6
store i32* %1, i32** %7
store i8* %2, i8** %8
store i32* %3, i32** %9
%10 = load i8, i8* %6
%11 = sext i8 %10 to i32
%12 = icmp sge i32 %11, 48
br i1 %12, label %13, label %26
13: ; preds = %4
%14 = load i8, i8* %6
%15 = sext i8 %14 to i32
%16 = icmp sle i32 %15, 57
br i1 %16, label %17, label %26
17: ; preds = %13
%18 = load i8, i8* %6
%19 = load i8*, i8** %8
%20 = load i32*, i32** %9
%21 = load i32, i32* %20
%22 = add nsw i32 %21, 1
store i32 %22, i32* %20
%23 = sext i32 %21 to i64
%24 = getelementptr inbounds i8, i8* %19, i64 %23
store i8 %18, i8* %24
%25 = load i32*, i32** %7
store i32 24, i32* %25
store i32 0, i32* %5
br label %27
26: ; preds = %13, %4
store i32 1, i32* %5
br label %27
27: ; preds = %26, %17
%28 = load i32, i32* %5
ret i32 %28
}

LLVM IR (-O2):
define i32 @do_state_22(i8 signext %0, i32* nocapture writeonly %1, i8* nocapture writeonly %2, i32* nocapture %3) {
%5 = add i8 %0, -48
%6 = icmp ult i8 %5, 10
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
%10 = sext i32 %8 to i64
%11 = getelementptr inbounds i8, i8* %2, i64 %10
store i8 %0, i8* %11
store i32 24, i32* %1
br label %12
12: ; preds = %4, %7
%13 = phi i32 [ 0, %7 ], [ 1, %4 ]
ret i32 %13
}
/* Variables and functions */
scalar_t__ strtoul(char const *, int /*<<< orphan*/ *, int);
scalar_t__ time(int /*<<< orphan*/ *);
int check_nonce(const char *nonce) {
  unsigned long now = (unsigned long)time(NULL);
  unsigned long val = (unsigned long)strtoul(nonce, NULL, 16);
  return 1 || now < val || now - val < 3600;
}


x86 assembly (clang, -O0):
<check_nonce>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1030 <time@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
mov    $0x10,%edx
call   1040 <strtoul@plt>
mov    %rax,-0x18(%rbp)
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_nonce>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
call   1030 <time@plt>
mov    %rbx,%rdi
xor    %esi,%esi
mov    $0x10,%edx
call   1040 <strtoul@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @check_nonce(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i64
store i8* %0, i8** %2
%5 = call i64 @time(i32* null)
store i64 %5, i64* %3
%6 = load i8*, i8** %2
%7 = call i64 @strtoul(i8* %6, i32* null, i32 16)
store i64 %7, i64* %4
ret i32 1
}

LLVM IR (-O2):
define i32 @check_nonce(i8* nocapture %0) {
%2 = tail call i64 @time(i32* null)
%3 = tail call i64 @strtoul(i8* nocapture %0, i32* null, i32 16)
ret i32 1
}
void caller_2_1_1_2_1_2_1() {}


x86 assembly (clang, -O0):
<caller_2_1_1_2_1_2_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<caller_2_1_1_2_1_2_1>:
ret

LLVM IR (-O0):
define void @caller_2_1_1_2_1_2_1() {
ret void
}

LLVM IR (-O2):
define void @caller_2_1_1_2_1_2_1() {
ret void
}
void gtk_spin_button_get_wrap() {}


x86 assembly (clang, -O0):
<gtk_spin_button_get_wrap>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_spin_button_get_wrap>:
ret

LLVM IR (-O0):
define void @gtk_spin_button_get_wrap() {
ret void
}

LLVM IR (-O2):
define void @gtk_spin_button_get_wrap() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gfx_outd(int, unsigned long);
void gfx_pci_config_write(unsigned long address, unsigned long data) {
  gfx_outd(0x0CF8, address);
  gfx_outd(0x0CFC, data);
  return;
}


x86 assembly (clang, -O0):
<gfx_pci_config_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0xcf8,%edi
call   1030 <gfx_outd@plt>
mov    -0x10(%rbp),%rsi
mov    $0xcfc,%edi
call   1030 <gfx_outd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfx_pci_config_write>:
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%rsi
mov    $0xcf8,%edi
call   1030 <gfx_outd@plt>
mov    $0xcfc,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <gfx_outd@plt>

LLVM IR (-O0):
define void @gfx_pci_config_write(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = call i32 @gfx_outd(i32 3320, i64 %5)
%7 = load i64, i64* %4
%8 = call i32 @gfx_outd(i32 3324, i64 %7)
ret void
}

LLVM IR (-O2):
define void @gfx_pci_config_write(i64 %0, i64 %1) {
%3 = tail call i32 @gfx_outd(i32 3320, i64 %0)
%4 = tail call i32 @gfx_outd(i32 3324, i64 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  printf("Hello Bitches\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Hello Bitches\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [14 x i8] c"Hello Bitches\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct meat_dbg {
  int dummy;
};
struct meat_ctxt {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ SIGINT;
int /*<<< orphan*/ raise(int /*<<< orphan*/);
void meat_dbg_break(struct meat_ctxt *const p_ctxt,
                    struct meat_dbg *const p_dbg) {
  (void)(p_ctxt);
  (void)(p_dbg);
  raise(SIGINT);
}


x86 assembly (clang, -O0):
<meat_dbg_break>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ec1(%rip),%rax
mov    (%rax),%edi
call   1030 <raise@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<meat_dbg_break>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <raise@plt>

LLVM IR (-O0):
%struct.meat_ctxt = type { i32 }
%struct.meat_dbg = type { i32 }
@SIGINT = global i32 0
define void @meat_dbg_break(%struct.meat_ctxt* %0, %struct.meat_dbg* %1) {
%3 = alloca %struct.meat_ctxt*
%4 = alloca %struct.meat_dbg*
store %struct.meat_ctxt* %0, %struct.meat_ctxt** %3
store %struct.meat_dbg* %1, %struct.meat_dbg** %4
%5 = load %struct.meat_ctxt*, %struct.meat_ctxt** %3
%6 = load %struct.meat_dbg*, %struct.meat_dbg** %4
%7 = load i32, i32* @SIGINT
%8 = call i32 @raise(i32 %7)
ret void
}

LLVM IR (-O2):
%struct.meat_ctxt = type { i32 }
%struct.meat_dbg = type { i32 }
@SIGINT = global i32 0
define void @meat_dbg_break(%struct.meat_ctxt* nocapture readnone %0, %struct.meat_dbg* nocapture readnone %1) {
%3 = load i32, i32* @SIGINT
%4 = tail call i32 @raise(i32 %3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef void *uint32_t;

/* Variables and functions */
void *bswap_32(void *);
uint64_t bswap_64(uint64_t x) {
  union {
    uint64_t ll;
    uint32_t l[2];
  } w, r;
  w.ll = x;
  r.l[0] = bswap_32(w.l[1]);
  r.l[1] = bswap_32(w.l[0]);
  return r.ll;
}


x86 assembly (clang, -O0):
<bswap_64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <bswap_32@plt>
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <bswap_32@plt>
mov    %rax,-0x20(%rbp)
mov    -0x28(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bswap_64>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%r14d
call   1030 <bswap_32@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1030 <bswap_32@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%union.anon = type { [2 x i8*] }
define i32 @bswap_64(i32 %0) {
%2 = alloca i32
%3 = alloca %union.anon
%4 = alloca %union.anon
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = bitcast %union.anon* %3 to i32*
store i32 %5, i32* %6
%7 = bitcast %union.anon* %3 to [2 x i8*]*
%8 = getelementptr inbounds [2 x i8*], [2 x i8*]* %7, i64 0, i64 1
%9 = load i8*, i8** %8
%10 = call i8* @bswap_32(i8* %9)
%11 = bitcast %union.anon* %4 to [2 x i8*]*
%12 = getelementptr inbounds [2 x i8*], [2 x i8*]* %11, i64 0, i64 0
store i8* %10, i8** %12
%13 = bitcast %union.anon* %3 to [2 x i8*]*
%14 = getelementptr inbounds [2 x i8*], [2 x i8*]* %13, i64 0, i64 0
%15 = load i8*, i8** %14
%16 = call i8* @bswap_32(i8* %15)
%17 = bitcast %union.anon* %4 to [2 x i8*]*
%18 = getelementptr inbounds [2 x i8*], [2 x i8*]* %17, i64 0, i64 1
store i8* %16, i8** %18
%19 = bitcast %union.anon* %4 to i32*
%20 = load i32, i32* %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @bswap_64(i32 %0) {
%2 = zext i32 %0 to i64
%3 = inttoptr i64 %2 to i8*
%4 = tail call i8* @bswap_32(i8* undef)
%5 = tail call i8* @bswap_32(i8* %3)
%6 = ptrtoint i8* %4 to i64
%7 = trunc i64 %6 to i32
ret i32 %7
}
void rop3_18_0_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = *D ^ T;
  stk2 = ~stk2;
  stk1 = S | stk2;
  stk1 = ~stk1;
  *D = (stk1 & S) | (stk1 & (~T)) | (T & (~S) & *D);
}


x86 assembly (clang, -O0):
<rop3_18_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xa(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
movzbl -0xb(%rbp),%ecx
movzbl -0xa(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
movzbl -0xa(%rbp),%ecx
movzbl -0x9(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
mov    -0x8(%rbp),%rdx
movzbl (%rdx),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_18_0_1>:
not    %sil
and    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_18_0_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i8, i8* %6
%13 = zext i8 %12 to i32
%14 = xor i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %8
%16 = load i8, i8* %8
%17 = zext i8 %16 to i32
%18 = xor i32 %17, -1
%19 = trunc i32 %18 to i8
store i8 %19, i8* %8
%20 = load i8, i8* %5
%21 = zext i8 %20 to i32
%22 = load i8, i8* %8
%23 = zext i8 %22 to i32
%24 = or i32 %21, %23
%25 = trunc i32 %24 to i8
store i8 %25, i8* %7
%26 = load i8, i8* %7
%27 = zext i8 %26 to i32
%28 = xor i32 %27, -1
%29 = trunc i32 %28 to i8
store i8 %29, i8* %7
%30 = load i8, i8* %7
%31 = zext i8 %30 to i32
%32 = load i8, i8* %5
%33 = zext i8 %32 to i32
%34 = and i32 %31, %33
%35 = load i8, i8* %7
%36 = zext i8 %35 to i32
%37 = load i8, i8* %6
%38 = zext i8 %37 to i32
%39 = xor i32 %38, -1
%40 = and i32 %36, %39
%41 = or i32 %34, %40
%42 = load i8, i8* %6
%43 = zext i8 %42 to i32
%44 = load i8, i8* %5
%45 = zext i8 %44 to i32
%46 = xor i32 %45, -1
%47 = and i32 %43, %46
%48 = load i8*, i8** %4
%49 = load i8, i8* %48
%50 = zext i8 %49 to i32
%51 = and i32 %47, %50
%52 = or i32 %41, %51
%53 = trunc i32 %52 to i8
%54 = load i8*, i8** %4
store i8 %53, i8* %54
ret void
}

LLVM IR (-O2):
define void @rop3_18_0_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %1, -1
%6 = and i8 %4, %5
store i8 %6, i8* %0
ret void
}
const char *TA_GetVersionString(void) {
  if (sizeof("dev") > 1) {
    return "0"
           "."
           "6"
           "."
           "0"
           "-"
           "dev"
           " "
           "("
           "Mar 16 2022"
           " "
           "01:25:44"
           ")";
  } else {
    return "0"
           "."
           "6"
           "."
           "0"
           " "
           "("
           "Mar 16 2022"
           " "
           "01:25:44"
           ")";
  }
}


x86 assembly (clang, -O0):
<TA_GetVersionString>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TA_GetVersionString>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [33 x i8] c"0.6.0-dev (Mar 16 2022 01:25:44)\00"
define i8* @TA_GetVersionString() {
ret i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [33 x i8] c"0.6.0-dev (Mar 16 2022 01:25:44)\00"
define i8* @TA_GetVersionString() {
ret i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
main() {
  int sum = 0, i;
  for (i = 2; i <= 30; i += 2)
    sum += i;
  printf("Сумма равна:%d", sum);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
cmpl   $0x1e,-0xc(%rbp)
jg     114e <main+0x3e>
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0xc(%rbp)
jmp    112d <main+0x1d>
mov    -0x8(%rbp),%esi
lea    0xea8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0xf0,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"\D0\A1\D1\83\D0\BC\D0\BC\D0\B0 \D1\80\D0\B0\D0\B2\D0\BD\D0\B0:%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 2, i32* %3
br label %4
4: ; preds = %11, %0
%5 = load i32, i32* %3
%6 = icmp sle i32 %5, 30
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, i32* %3
%9 = load i32, i32* %2
%10 = add nsw i32 %9, %8
store i32 %10, i32* %2
br label %11
11: ; preds = %7
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 2
store i32 %13, i32* %3
br label %4
14: ; preds = %4
%15 = load i32, i32* %2
%16 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 %15)
ret i32 0
}

LLVM IR (-O2):
@.str = [25 x i8] c"\D0\A1\D1\83\D0\BC\D0\BC\D0\B0 \D1\80\D0\B0\D0\B2\D0\BD\D0\B0:%d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 240)
ret i32 0
}
char updatebyte(char byte, char bit, char value) {
  if (value == 0) {
    return (byte &= ~(1 << bit));
  } else {
    return (byte |= 1 << bit);
  }
}


x86 assembly (clang, -O0):
<updatebyte>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %dil,%dl
mov    %dl,-0x2(%rbp)
mov    %cl,-0x3(%rbp)
mov    %al,-0x4(%rbp)
movsbl -0x4(%rbp),%eax
cmp    $0x0,%eax
jne    1143 <updatebyte+0x43>
movsbl -0x3(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
xor    $0xffffffff,%ecx
movsbl -0x2(%rbp),%eax
and    %ecx,%eax
mov    %al,-0x2(%rbp)
mov    %al,-0x1(%rbp)
jmp    115c <updatebyte+0x5c>
movsbl -0x3(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
movsbl -0x2(%rbp),%eax
or     %ecx,%eax
mov    %al,-0x2(%rbp)
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<updatebyte>:
mov    %esi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
not    %cl
and    %dil,%cl
or     %dil,%al
test   %dl,%dl
movzbl %al,%edx
movzbl %cl,%eax
cmovne %edx,%eax
ret

LLVM IR (-O0):
define signext i8 @updatebyte(i8 signext %0, i8 signext %1, i8 signext %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
store i8 %0, i8* %5
store i8 %1, i8* %6
store i8 %2, i8* %7
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %20
11: ; preds = %3
%12 = load i8, i8* %6
%13 = sext i8 %12 to i32
%14 = shl i32 1, %13
%15 = xor i32 %14, -1
%16 = load i8, i8* %5
%17 = sext i8 %16 to i32
%18 = and i32 %17, %15
%19 = trunc i32 %18 to i8
store i8 %19, i8* %5
store i8 %19, i8* %4
br label %28
20: ; preds = %3
%21 = load i8, i8* %6
%22 = sext i8 %21 to i32
%23 = shl i32 1, %22
%24 = load i8, i8* %5
%25 = sext i8 %24 to i32
%26 = or i32 %25, %23
%27 = trunc i32 %26 to i8
store i8 %27, i8* %5
store i8 %27, i8* %4
br label %28
28: ; preds = %20, %11
%29 = load i8, i8* %4
ret i8 %29
}

LLVM IR (-O2):
define signext i8 @updatebyte(i8 signext %0, i8 signext %1, i8 signext %2) {
%4 = icmp eq i8 %2, 0
%5 = zext i8 %1 to i32
%6 = shl nuw i32 1, %5
%7 = trunc i32 %6 to i8
%8 = xor i8 %7, -1
%9 = and i8 %8, %0
%10 = or i8 %7, %0
%11 = select i1 %4, i8 %9, i8 %10
ret i8 %11
}
void PDO_DBG_INF_FMT(char *format, ...) {}


x86 assembly (clang, -O0):
<PDO_DBG_INF_FMT>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PDO_DBG_INF_FMT>:
ret

LLVM IR (-O0):
define void @PDO_DBG_INF_FMT(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @PDO_DBG_INF_FMT(i8* nocapture %0, ...) {
ret void
}
/* Variables and functions */
int COLS;
int wincols() { return COLS; }


x86 assembly (clang, -O0):
<wincols>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wincols>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@COLS = global i32 0
define i32 @wincols() {
%1 = load i32, i32* @COLS
ret i32 %1
}

LLVM IR (-O2):
@COLS = global i32 0
define i32 @wincols() {
%1 = load i32, i32* @COLS
ret i32 %1
}
const char *svn_version(void) {
  const char *SVN_Version = "bc3c27c";
  return SVN_Version;
}


x86 assembly (clang, -O0):
<svn_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<svn_version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [8 x i8] c"bc3c27c\00"
define i8* @svn_version() {
%1 = alloca i8*
store i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
ret i8* %2
}

LLVM IR (-O2):
@.str = [8 x i8] c"bc3c27c\00"
define i8* @svn_version() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int o_pthread_mutex_trylock(int /*<<< orphan*/ *);
int ___pthread_mutex_try_lock(pthread_mutex_t *mutex) {
  ;
  return o_pthread_mutex_trylock(mutex);
}


x86 assembly (clang, -O0):
<___pthread_mutex_try_lock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <o_pthread_mutex_trylock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<___pthread_mutex_try_lock>:
jmp    1030 <o_pthread_mutex_trylock@plt>

LLVM IR (-O0):
define i32 @___pthread_mutex_try_lock(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @o_pthread_mutex_trylock(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @___pthread_mutex_try_lock(i32* %0) {
%2 = tail call i32 @o_pthread_mutex_trylock(i32* %0)
ret i32 %2
}
/* Variables and functions */
int rand();
int randomMax(int max) { return rand() % (max + 1); }


x86 assembly (clang, -O0):
<randomMax>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x4(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randomMax>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
add    $0x1,%ebx
cltd
idiv   %ebx
mov    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @randomMax(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @rand()
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
%6 = srem i32 %3, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @randomMax(i32 %0) {
%2 = tail call i32 (...) @rand()
%3 = add nsw i32 %0, 1
%4 = srem i32 %2, %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int is_triangle(int);
void is_triangle_test(void) {
  assert(is_triangle(406));
  assert(!is_triangle(326));
}


x86 assembly (clang, -O0):
<is_triangle_test>:
push   %rbp
mov    %rsp,%rbp
mov    $0x196,%edi
call   1030 <is_triangle@plt>
mov    %eax,%edi
call   1040 <assert@plt>
mov    $0x146,%edi
call   1030 <is_triangle@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_triangle_test>:
push   %rax
mov    $0x196,%edi
call   1030 <is_triangle@plt>
mov    %eax,%edi
call   1040 <assert@plt>
mov    $0x146,%edi
call   1030 <is_triangle@plt>
xor    %edi,%edi
test   %eax,%eax
sete   %dil
pop    %rax
jmp    1040 <assert@plt>

LLVM IR (-O0):
define void @is_triangle_test() {
%1 = call i32 @is_triangle(i32 406)
%2 = call i32 @assert(i32 %1)
%3 = call i32 @is_triangle(i32 326)
%4 = icmp ne i32 %3, 0
%5 = xor i1 %4, true
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
ret void
}

LLVM IR (-O2):
define void @is_triangle_test() {
%1 = tail call i32 @is_triangle(i32 406)
%2 = tail call i32 @assert(i32 %1)
%3 = tail call i32 @is_triangle(i32 326)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
ret void
}