xunge/DecIR huggingface dataset:
int test_imm_D5int16_reg(short val) {
  return ((val) & (-0xD5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D5int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffff2b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D5int16_reg>:
test   $0xff2b,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D5int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -213
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D5int16_reg(i16 signext %0) {
%2 = and i16 %0, -213
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;
typedef int /*<<< orphan*/ pthread_cond_t;

/* Variables and functions */
int /*<<< orphan*/ _unsupported();
int pthread_cond_wait(pthread_cond_t *cond, pthread_mutex_t *mutex) {
  _unsupported();
  return -1;
}


x86 assembly (clang, -O0):
<pthread_cond_wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <_unsupported@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_cond_wait>:
push   %rax
xor    %eax,%eax
call   1030 <_unsupported@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @pthread_cond_wait(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = call i32 (...) @_unsupported()
ret i32 -1
}

LLVM IR (-O2):
define i32 @pthread_cond_wait(i32* nocapture readnone %0, i32* nocapture readnone %1) {
%3 = tail call i32 (...) @_unsupported()
ret i32 -1
}
/* Variables and functions */
int kill(int, int);
int send_signal(int pid, int SIG) {
  int ret;
  ret = kill(pid, SIG);
  return ret;
}


x86 assembly (clang, -O0):
<send_signal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <kill@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_signal>:
jmp    1030 <kill@plt>

LLVM IR (-O0):
define i32 @send_signal(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @kill(i32 %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @send_signal(i32 %0, i32 %1) {
%3 = tail call i32 @kill(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ delay(int);
int /*<<< orphan*/ mbus_remote_register_write(int, int, int);
void pmu_adc_enable() {
  mbus_remote_register_write(
      0x6, 0x3B,
      ((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5) |
       (1 << 6) | (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) |
       (0 << 12) | (0 << 13) | (1 << 14) | (1 << 15) | (1 << 16) | (1 << 17) |
       (1 << 18) | (1 << 19) | (1 << 20)));
  delay(100);
}


x86 assembly (clang, -O0):
<pmu_adc_enable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
mov    $0x3b,%esi
mov    $0x1fcfff,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
call   1030 <delay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmu_adc_enable>:
push   %rax
mov    $0x6,%edi
mov    $0x3b,%esi
mov    $0x1fcfff,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
pop    %rax
jmp    1030 <delay@plt>

LLVM IR (-O0):
define void @pmu_adc_enable() {
%1 = call i32 @mbus_remote_register_write(i32 6, i32 59, i32 2084863)
%2 = call i32 @delay(i32 100)
ret void
}

LLVM IR (-O2):
define void @pmu_adc_enable() {
%1 = tail call i32 @mbus_remote_register_write(i32 6, i32 59, i32 2084863)
%2 = tail call i32 @delay(i32 100)
ret void
}
void dpi_uninit_platform_driver(void) {}


x86 assembly (clang, -O0):
<dpi_uninit_platform_driver>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dpi_uninit_platform_driver>:
ret

LLVM IR (-O0):
define void @dpi_uninit_platform_driver() {
ret void
}

LLVM IR (-O2):
define void @dpi_uninit_platform_driver() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int EOF;
int fgetc(int /*<<< orphan*/ *);
int cmp(FILE *a, FILE *b) {
  int t;
  while ((t = fgetc(a)) == fgetc(b))
    if (t == EOF)
      return 1;
  return 0;
}


x86 assembly (clang, -O0):
<cmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %eax,-0x20(%rbp)
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %eax,%ecx
mov    -0x20(%rbp),%eax
cmp    %ecx,%eax
jne    1168 <cmp+0x58>
mov    -0x1c(%rbp),%eax
mov    0x2e99(%rip),%rcx
cmp    (%rcx),%eax
jne    1163 <cmp+0x53>
movl   $0x1,-0x4(%rbp)
jmp    116f <cmp+0x5f>
jmp    1120 <cmp+0x10>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    0x2ec4(%rip),%r15
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rbx,%rdi
call   1030 <fgetc@plt>
mov    %eax,%ebp
mov    %r14,%rdi
call   1030 <fgetc@plt>
cmp    %eax,%ebp
jne    1152 <cmp+0x42>
cmp    (%r15),%ebp
jne    1130 <cmp+0x20>
mov    $0x1,%eax
jmp    1154 <cmp+0x44>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@EOF = global i32 0
define i32 @cmp(i32* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
br label %7
7: ; preds = %18, %2
%8 = load i32*, i32** %4
%9 = call i32 @fgetc(i32* %8)
store i32 %9, i32* %6
%10 = load i32*, i32** %5
%11 = call i32 @fgetc(i32* %10)
%12 = icmp eq i32 %9, %11
br i1 %12, label %13, label %19
13: ; preds = %7
%14 = load i32, i32* %6
%15 = load i32, i32* @EOF
%16 = icmp eq i32 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 1, i32* %3
br label %20
18: ; preds = %13
br label %7
19: ; preds = %7
store i32 0, i32* %3
br label %20
20: ; preds = %19, %17
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @cmp(i32* nocapture %0, i32* nocapture %1) {
br label %3
3: ; preds = %7, %2
%4 = tail call i32 @fgetc(i32* %0)
%5 = tail call i32 @fgetc(i32* %1)
%6 = icmp eq i32 %4, %5
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i32, i32* @EOF
%9 = icmp eq i32 %4, %8
br i1 %9, label %10, label %3
10: ; preds = %3, %7
%11 = phi i32 [ 1, %7 ], [ 0, %3 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, ...);
int /*<<< orphan*/ stderr;
void InvalidOperationError(char *function, char *message) {
  fprintf(stderr, "\nInvalid operation performed in function %s.", function);
  fprintf(stderr, message);
}


x86 assembly (clang, -O0):
<InvalidOperationError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xecc(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    0x2e9e(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<InvalidOperationError>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%rdx
mov    0x2ebf(%rip),%r14
mov    (%r14),%edi
lea    0xed5(%rip),%rsi
xor    %eax,%eax
call   1030 <fprintf@plt>
mov    (%r14),%edi
mov    %rbx,%rsi
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [45 x i8] c"\0AInvalid operation performed in function %s.\00"
define void @InvalidOperationError(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = call i32 (i32, i8*, ...) @fprintf(i32 %5, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = load i32, i32* @stderr
%9 = load i8*, i8** %4
%10 = call i32 (i32, i8*, ...) @fprintf(i32 %8, i8* %9)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [45 x i8] c"\0AInvalid operation performed in function %s.\00"
define void @InvalidOperationError(i8* %0, i8* %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 (i32, i8*, ...) @fprintf(i32 %3, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0), i8* %0)
%5 = load i32, i32* @stderr
%6 = tail call i32 (i32, i8*, ...) @fprintf(i32 %5, i8* %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ SEEK_SET;
int /*<<< orphan*/ fseek(int /*<<< orphan*/ *, int, int /*<<< orphan*/);
int /*<<< orphan*/ sys_fread_int(int *, int /*<<< orphan*/ *);
int _dbx_read_int(FILE *file, int offset, int value) {
  int val = value;
  if (offset) {
    fseek(file, offset, SEEK_SET);
    sys_fread_int(&val, file);
  }
  return val;
}


x86 assembly (clang, -O0):
<_dbx_read_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1164 <_dbx_read_int+0x44>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    0x2e90(%rip),%rax
mov    (%rax),%edx
call   1030 <fseek@plt>
mov    -0x8(%rbp),%rsi
lea    -0x14(%rbp),%rdi
call   1040 <sys_fread_int@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dbx_read_int>:
push   %rbx
sub    $0x10,%rsp
mov    %edx,%eax
mov    %edx,0xc(%rsp)
test   %esi,%esi
je     1151 <_dbx_read_int+0x31>
mov    %rdi,%rbx
mov    0x2ea7(%rip),%rax
mov    (%rax),%edx
call   1030 <fseek@plt>
lea    0xc(%rsp),%rdi
mov    %rbx,%rsi
call   1040 <sys_fread_int@plt>
mov    0xc(%rsp),%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@SEEK_SET = global i32 0
define i32 @_dbx_read_int(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
store i32 %8, i32* %7
%9 = load i32, i32* %5
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %18
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* @SEEK_SET
%15 = call i32 @fseek(i32* %12, i32 %13, i32 %14)
%16 = load i32*, i32** %4
%17 = call i32 @sys_fread_int(i32* %7, i32* %16)
br label %18
18: ; preds = %11, %3
%19 = load i32, i32* %7
ret i32 %19
}

LLVM IR (-O2):
@SEEK_SET = global i32 0
define i32 @_dbx_read_int(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = bitcast i32* %4 to i8*
store i32 %2, i32* %4
%6 = icmp eq i32 %1, 0
br i1 %6, label %12, label %7
7: ; preds = %3
%8 = load i32, i32* @SEEK_SET
%9 = tail call i32 @fseek(i32* %0, i32 %1, i32 %8)
%10 = call i32 @sys_fread_int(i32* %4, i32* %0)
%11 = load i32, i32* %4
br label %12
12: ; preds = %7, %3
%13 = phi i32 [ %11, %7 ], [ %2, %3 ]
ret i32 %13
}
/* Type definitions */
struct node {
  int dummy;
};

/* Variables and functions */
struct node *get_node_by_label(struct node *, char const *);
struct node *get_node_by_path(struct node *, char const *);
struct node *get_node_by_ref(struct node *tree, const char *ref) {
  if (ref[0] == '/')
    return get_node_by_path(tree, ref);
  else
    return get_node_by_label(tree, ref);
}


x86 assembly (clang, -O0):
<get_node_by_ref>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2f,%eax
jne    1156 <get_node_by_ref+0x36>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <get_node_by_path@plt>
mov    %rax,-0x8(%rbp)
jmp    1167 <get_node_by_ref+0x47>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <get_node_by_label@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_node_by_ref>:
cmpb   $0x2f,(%rsi)
jne    112a <get_node_by_ref+0xa>
jmp    1030 <get_node_by_path@plt>
jmp    1040 <get_node_by_label@plt>

LLVM IR (-O0):
%struct.node = type { i32 }
define %struct.node* @get_node_by_ref(%struct.node* %0, i8* %1) {
%3 = alloca %struct.node*
%4 = alloca %struct.node*
%5 = alloca i8*
store %struct.node* %0, %struct.node** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %5
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 47
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load %struct.node*, %struct.node** %4
%13 = load i8*, i8** %5
%14 = call %struct.node* @get_node_by_path(%struct.node* %12, i8* %13)
store %struct.node* %14, %struct.node** %3
br label %19
15: ; preds = %2
%16 = load %struct.node*, %struct.node** %4
%17 = load i8*, i8** %5
%18 = call %struct.node* @get_node_by_label(%struct.node* %16, i8* %17)
store %struct.node* %18, %struct.node** %3
br label %19
19: ; preds = %15, %11
%20 = load %struct.node*, %struct.node** %3
ret %struct.node* %20
}

LLVM IR (-O2):
%struct.node = type { i32 }
define %struct.node* @get_node_by_ref(%struct.node* %0, i8* %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 47
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call %struct.node* @get_node_by_path(%struct.node* %0, i8* %1)
br label %9
7: ; preds = %2
%8 = tail call %struct.node* @get_node_by_label(%struct.node* %0, i8* %1)
br label %9
9: ; preds = %7, %5
%10 = phi %struct.node* [ %6, %5 ], [ %8, %7 ]
ret %struct.node* %10
}
__attribute__((always_)) int func2(int x) { return x * 17; }


x86 assembly (clang, -O0):
<func2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0x11,-0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func2>:
mov    %edi,%eax
shl    $0x4,%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @func2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 17
ret i32 %4
}

LLVM IR (-O2):
define i32 @func2(i32 %0) {
%2 = mul nsw i32 %0, 17
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ z_stream;

/* Variables and functions */
int /*<<< orphan*/ inflateInit(int /*<<< orphan*/ *);
int main(void) {
  z_stream zs;
  inflateInit(&zs);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
call   1030 <inflateInit@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0x4(%rsp),%rdi
call   1030 <inflateInit@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @inflateInit(i32* %2)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @inflateInit(i32* %1)
ret i32 0
}
/* Variables and functions */
double __dcosd(double);
double d_cosd(double *x) { return __dcosd(*x); }


x86 assembly (clang, -O0):
<d_cosd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
call   1030 <__dcosd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d_cosd>:
movsd  (%rdi),%xmm0
jmp    1030 <__dcosd@plt>

LLVM IR (-O0):
define double @d_cosd(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = load double, double* %3
%5 = call double @__dcosd(double %4)
ret double %5
}

LLVM IR (-O2):
define double @d_cosd(double* nocapture %0) {
%2 = load double, double* %0
%3 = tail call double @__dcosd(double %2)
ret double %3
}
/* Variables and functions */
int FindPos(int *, int, int);
void QuickSort_(int *a, int low, int high) {
  int pos;
  if (low < high) {
    pos = FindPos(a, low, high);
    QuickSort_(a, low, pos - 1);
    QuickSort_(a, pos + 1, high);
  }
}


x86 assembly (clang, -O0):
<QuickSort_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <QuickSort_+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <FindPos@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <QuickSort_@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <QuickSort_@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<QuickSort_>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <QuickSort_+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <FindPos@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <QuickSort_@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <QuickSort_+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @QuickSort_(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @FindPos(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @QuickSort_(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @FindPos(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @QuickSort_(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CompileWord(int, long);
void DoSourceBang(void) {
  CompileWord(50, 9);
  CompileWord(8, 0L);
  CompileWord(50, 8);
  CompileWord(8, 0L);
}


x86 assembly (clang, -O0):
<DoSourceBang>:
push   %rbp
mov    %rsp,%rbp
mov    $0x32,%edi
mov    $0x9,%esi
call   1030 <CompileWord@plt>
mov    $0x8,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <CompileWord@plt>
mov    $0x32,%edi
mov    $0x8,%esi
call   1030 <CompileWord@plt>
mov    $0x8,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <CompileWord@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoSourceBang>:
push   %rax
mov    $0x9,%esi
mov    $0x32,%edi
call   1030 <CompileWord@plt>
mov    $0x8,%edi
xor    %esi,%esi
call   1030 <CompileWord@plt>
mov    $0x8,%esi
mov    $0x32,%edi
call   1030 <CompileWord@plt>
mov    $0x8,%edi
xor    %esi,%esi
pop    %rax
jmp    1030 <CompileWord@plt>

LLVM IR (-O0):
define void @DoSourceBang() {
%1 = call i32 @CompileWord(i32 50, i64 9)
%2 = call i32 @CompileWord(i32 8, i64 0)
%3 = call i32 @CompileWord(i32 50, i64 8)
%4 = call i32 @CompileWord(i32 8, i64 0)
ret void
}

LLVM IR (-O2):
define void @DoSourceBang() {
%1 = tail call i32 @CompileWord(i32 50, i64 9)
%2 = tail call i32 @CompileWord(i32 8, i64 0)
%3 = tail call i32 @CompileWord(i32 50, i64 8)
%4 = tail call i32 @CompileWord(i32 8, i64 0)
ret void
}
char index_to_house(int house) {
  if (house == 0)
    return 'A';
  else if (house == 1)
    return 'D';
  else if (house == 2)
    return 'H';
  else if (house == 3)
    return 'J';
  else if (house == 4)
    return 'L';
  else if (house == 5)
    return 'M';
  return -1;
}


x86 assembly (clang, -O0):
<index_to_house>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    111a <index_to_house+0x1a>
movb   $0x41,-0x1(%rbp)
jmp    1196 <index_to_house+0x96>
cmpl   $0x1,-0x8(%rbp)
jne    112d <index_to_house+0x2d>
movb   $0x44,-0x1(%rbp)
jmp    1196 <index_to_house+0x96>
cmpl   $0x2,-0x8(%rbp)
jne    1140 <index_to_house+0x40>
movb   $0x48,-0x1(%rbp)
jmp    1196 <index_to_house+0x96>
cmpl   $0x3,-0x8(%rbp)
jne    1153 <index_to_house+0x53>
movb   $0x4a,-0x1(%rbp)
jmp    1196 <index_to_house+0x96>
cmpl   $0x4,-0x8(%rbp)
jne    1166 <index_to_house+0x66>
movb   $0x4c,-0x1(%rbp)
jmp    1196 <index_to_house+0x96>
cmpl   $0x5,-0x8(%rbp)
jne    1179 <index_to_house+0x79>
movb   $0x4d,-0x1(%rbp)
jmp    1196 <index_to_house+0x96>
jmp    117e <index_to_house+0x7e>
jmp    1183 <index_to_house+0x83>
jmp    1188 <index_to_house+0x88>
jmp    118d <index_to_house+0x8d>
jmp    1192 <index_to_house+0x92>
movb   $0xff,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<index_to_house>:
lea    0x0(,%rdi,8),%ecx
movabs $0x4d4c4a484441,%rdx
shr    %cl,%rdx
cmp    $0x6,%edi
mov    $0xff,%eax
cmovb  %edx,%eax
ret

LLVM IR (-O0):
define signext i8 @index_to_house(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i8 65, i8* %2
br label %33
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %7
store i8 68, i8* %2
br label %33
11: ; preds = %7
%12 = load i32, i32* %3
%13 = icmp eq i32 %12, 2
br i1 %13, label %14, label %15
14: ; preds = %11
store i8 72, i8* %2
br label %33
15: ; preds = %11
%16 = load i32, i32* %3
%17 = icmp eq i32 %16, 3
br i1 %17, label %18, label %19
18: ; preds = %15
store i8 74, i8* %2
br label %33
19: ; preds = %15
%20 = load i32, i32* %3
%21 = icmp eq i32 %20, 4
br i1 %21, label %22, label %23
22: ; preds = %19
store i8 76, i8* %2
br label %33
23: ; preds = %19
%24 = load i32, i32* %3
%25 = icmp eq i32 %24, 5
br i1 %25, label %26, label %27
26: ; preds = %23
store i8 77, i8* %2
br label %33
27: ; preds = %23
br label %28
28: ; preds = %27
br label %29
29: ; preds = %28
br label %30
30: ; preds = %29
br label %31
31: ; preds = %30
br label %32
32: ; preds = %31
store i8 -1, i8* %2
br label %33
33: ; preds = %32, %26, %22, %18, %14, %10, %6
%34 = load i8, i8* %2
ret i8 %34
}

LLVM IR (-O2):
define signext i8 @index_to_house(i32 %0) {
%2 = icmp ult i32 %0, 6
%3 = zext i32 %0 to i48
%4 = shl nuw nsw i48 %3, 3
%5 = lshr i48 84990059103297, %4
%6 = trunc i48 %5 to i8
%7 = select i1 %2, i8 %6, i8 -1
ret i8 %7
}
unsigned int scan_8long(s, u)
register char *s;
register unsigned long *u;
{
  register unsigned int pos;
  register unsigned long result;
  register unsigned long c;
  pos = 0;
  result = 0;
  while ((c = (unsigned long)(unsigned char)(s[pos] - '0')) < 8) {
    result = result * 8 + c;
    ++pos;
  }
  *u = result;
  return pos;
}


x86 assembly (clang, -O0):
<scan_8long>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x14(%rbp),%ecx
movsbl (%rax,%rcx,1),%eax
sub    $0x30,%eax
movzbl %al,%eax
mov    %rax,-0x28(%rbp)
cmp    $0x8,%rax
jae    1158 <scan_8long+0x58>
mov    -0x20(%rbp),%rax
shl    $0x3,%rax
add    -0x28(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    111b <scan_8long+0x1b>
mov    -0x20(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scan_8long>:
mov    (%rdi),%dl
add    $0xd0,%dl
cmp    $0x7,%dl
ja     112a <scan_8long+0x2a>
xor    %eax,%eax
xor    %ecx,%ecx
xchg   %ax,%ax
movzbl %dl,%edx
lea    (%rdx,%rcx,8),%rcx
add    $0x1,%eax
movzbl (%rdi,%rax,1),%edx
add    $0xd0,%dl
cmp    $0x8,%dl
jb     1110 <scan_8long+0x10>
mov    %rcx,(%rsi)
ret
xor    %ecx,%ecx
xor    %eax,%eax
mov    %rcx,(%rsi)
ret

LLVM IR (-O0):
define i32 @scan_8long(i8* %0, i64* %1) {
%3 = alloca i8*
%4 = alloca i64*
%5 = alloca i32
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %3
store i64* %1, i64** %4
store i32 0, i32* %5
store i64 0, i64* %6
br label %8
8: ; preds = %19, %2
%9 = load i8*, i8** %3
%10 = load i32, i32* %5
%11 = zext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %9, i64 %11
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = sub nsw i32 %14, 48
%16 = trunc i32 %15 to i8
%17 = zext i8 %16 to i64
store i64 %17, i64* %7
%18 = icmp ult i64 %17, 8
br i1 %18, label %19, label %26
19: ; preds = %8
%20 = load i64, i64* %6
%21 = mul i64 %20, 8
%22 = load i64, i64* %7
%23 = add i64 %21, %22
store i64 %23, i64* %6
%24 = load i32, i32* %5
%25 = add i32 %24, 1
store i32 %25, i32* %5
br label %8
26: ; preds = %8
%27 = load i64, i64* %6
%28 = load i64*, i64** %4
store i64 %27, i64* %28
%29 = load i32, i32* %5
ret i32 %29
}

LLVM IR (-O2):
define i32 @scan_8long(i8* nocapture %0, i64* nocapture writeonly %1) {
%3 = load i8, i8* %0
%4 = add i8 %3, -48
%5 = icmp ult i8 %4, 8
br i1 %5, label %6, label %19
6: ; preds = %2, %6
%7 = phi i8 [ %17, %6 ], [ %4, %2 ]
%8 = phi i32 [ %13, %6 ], [ 0, %2 ]
%9 = phi i64 [ %12, %6 ], [ 0, %2 ]
%10 = zext i8 %7 to i64
%11 = shl i64 %9, 3
%12 = add nuw i64 %11, %10
%13 = add i32 %8, 1
%14 = zext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %0, i64 %14
%16 = load i8, i8* %15
%17 = add i8 %16, -48
%18 = icmp ult i8 %17, 8
br i1 %18, label %6, label %19
19: ; preds = %6, %2
%20 = phi i64 [ 0, %2 ], [ %12, %6 ]
%21 = phi i32 [ 0, %2 ], [ %13, %6 ]
store i64 %20, i64* %1
ret i32 %21
}
/* Variables and functions */
int /*<<< orphan*/ minHeapFixup(int *, int);
void minHeapAddNumber(int a[], int n, int num) {
  a[n] = num;
  minHeapFixup(a, n);
}


x86 assembly (clang, -O0):
<minHeapAddNumber>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <minHeapFixup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<minHeapAddNumber>:
movslq %esi,%rsi
mov    %edx,(%rdi,%rsi,4)
jmp    1030 <minHeapFixup@plt>

LLVM IR (-O0):
define void @minHeapAddNumber(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
store i32 %7, i32* %11
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = call i32 @minHeapFixup(i32* %12, i32 %13)
ret void
}

LLVM IR (-O2):
define void @minHeapAddNumber(i32* %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
store i32 %2, i32* %5
%6 = tail call i32 @minHeapFixup(i32* %0, i32 %1)
ret void
}
int cmpn(const void *a, const void *b) {
  return (*(unsigned long *)a - *(unsigned long *)b);
}


x86 assembly (clang, -O0):
<cmpn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmpn>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @cmpn(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i64*
%7 = load i64, i64* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i64*
%10 = load i64, i64* %9
%11 = sub i64 %7, %10
%12 = trunc i64 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @cmpn(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = load i64, i64* %3
%5 = bitcast i8* %1 to i64*
%6 = load i64, i64* %5
%7 = sub i64 %4, %6
%8 = trunc i64 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int, int, int);
void handleMouseUp(int button, int shiftIsDown, int controlIsDown,
                   int altOptionIsDown, int superCommandIsDown) {
  printf("mouse up %d, shift %d, control %d, altOpt %d, supComm %d\n", button,
         shiftIsDown, controlIsDown, altOptionIsDown, superCommandIsDown);
}


x86 assembly (clang, -O0):
<handleMouseUp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    -0x10(%rbp),%r8d
mov    -0x14(%rbp),%r9d
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handleMouseUp>:
mov    %r8d,%r9d
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
lea    0xedd(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [58 x i8] c"mouse up %d, shift %d, control %d, altOpt %d, supComm %d\0A\00"
define void @handleMouseUp(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i32 @printf(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str, i64 0, i64 0), i32 %11, i32 %12, i32 %13, i32 %14, i32 %15)
ret void
}

LLVM IR (-O2):
@.str = [58 x i8] c"mouse up %d, shift %d, control %d, altOpt %d, supComm %d\0A\00"
define void @handleMouseUp(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @printf(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1, i32 %2, i32 %3, i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ n4(int, int, int, int);
void call_f4() { n4(1, 2, 3, 4); }


x86 assembly (clang, -O0):
<call_f4>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
mov    $0x4,%ecx
call   1030 <n4@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_f4>:
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
mov    $0x4,%ecx
jmp    1030 <n4@plt>

LLVM IR (-O0):
define void @call_f4() {
%1 = call i32 @n4(i32 1, i32 2, i32 3, i32 4)
ret void
}

LLVM IR (-O2):
define void @call_f4() {
%1 = tail call i32 @n4(i32 1, i32 2, i32 3, i32 4)
ret void
}
void libguess_init(void) {}


x86 assembly (clang, -O0):
<libguess_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libguess_init>:
ret

LLVM IR (-O0):
define void @libguess_init() {
ret void
}

LLVM IR (-O2):
define void @libguess_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LOG_ERR;
int /*<<< orphan*/ errno;
int /*<<< orphan*/ report(int /*<<< orphan*/, char *, int /*<<< orphan*/);
int /*<<< orphan*/ strerror(int /*<<< orphan*/);
void log_kqueue(void) {
  report(LOG_ERR, "Error in kqueue(): %s", strerror(errno));
}


x86 assembly (clang, -O0):
<log_kqueue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ea1(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
call   1040 <strerror@plt>
mov    -0x4(%rbp),%edi
mov    %eax,%edx
lea    0xeb2(%rip),%rsi
call   1030 <report@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_kqueue>:
push   %rbx
mov    0x2ea8(%rip),%rax
mov    (%rax),%ebx
mov    0x2eaf(%rip),%rax
mov    (%rax),%edi
call   1040 <strerror@plt>
lea    0xec1(%rip),%rsi
mov    %ebx,%edi
mov    %eax,%edx
pop    %rbx
jmp    1030 <report@plt>

LLVM IR (-O0):
@LOG_ERR = global i32 0
@.str = [22 x i8] c"Error in kqueue(): %s\00"
@errno = global i32 0
define void @log_kqueue() {
%1 = load i32, i32* @LOG_ERR
%2 = load i32, i32* @errno
%3 = call i32 @strerror(i32 %2)
%4 = call i32 @report(i32 %1, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@LOG_ERR = global i32 0
@.str = [22 x i8] c"Error in kqueue(): %s\00"
@errno = global i32 0
define void @log_kqueue() {
%1 = load i32, i32* @LOG_ERR
%2 = load i32, i32* @errno
%3 = tail call i32 @strerror(i32 %2)
%4 = tail call i32 @report(i32 %1, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}
int khugepaged_enter(struct vm_area_struct *vma) { return 0; }


x86 assembly (clang, -O0):
<khugepaged_enter>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<khugepaged_enter>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.vm_area_struct = type opaque
define i32 @khugepaged_enter(%struct.vm_area_struct* %0) {
%2 = alloca %struct.vm_area_struct*
store %struct.vm_area_struct* %0, %struct.vm_area_struct** %2
ret i32 0
}

LLVM IR (-O2):
%struct.vm_area_struct = type opaque
define i32 @khugepaged_enter(%struct.vm_area_struct* nocapture readnone %0) {
ret i32 0
}
int test_imm_AAint16_reg(short val) {
  return ((val) & (0xAA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_AAint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xaa,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_AAint16_reg>:
test   $0xaa,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_AAint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 170
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_AAint16_reg(i16 signext %0) {
%2 = and i16 %0, 170
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ TIPC_CMD_SET_LINK_PRI;
int /*<<< orphan*/ set_linkset_value(char *, char *, int /*<<< orphan*/);
void set_linkset_priority(char *args) {
  set_linkset_value(args, "priority", TIPC_CMD_SET_LINK_PRI);
}


x86 assembly (clang, -O0):
<set_linkset_priority>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ec1(%rip),%rax
mov    (%rax),%edx
lea    0xed0(%rip),%rsi
call   1030 <set_linkset_value@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_linkset_priority>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edx
lea    0xee0(%rip),%rsi
jmp    1030 <set_linkset_value@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"priority\00"
@TIPC_CMD_SET_LINK_PRI = global i32 0
define void @set_linkset_priority(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @TIPC_CMD_SET_LINK_PRI
%5 = call i32 @set_linkset_value(i8* %3, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"priority\00"
@TIPC_CMD_SET_LINK_PRI = global i32 0
define void @set_linkset_priority(i8* %0) {
%2 = load i32, i32* @TIPC_CMD_SET_LINK_PRI
%3 = tail call i32 @set_linkset_value(i8* %0, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %2)
ret void
}
/* Type definitions */
typedef scalar_t__ uint64_t;
typedef scalar_t__ const uint32_t;

/* Variables and functions */
scalar_t__ const UINT32_MAX;
uint32_t __stdfix_sat_uk(const uint64_t x) {
  if (x > UINT32_MAX)
    return (UINT32_MAX);
  return ((uint32_t)x);
}


x86 assembly (clang, -O0):
<__stdfix_sat_uk>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x2ee5(%rip),%rcx
cmp    (%rcx),%rax
jle    112f <__stdfix_sat_uk+0x2f>
mov    0x2ed5(%rip),%rax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
jmp    1137 <__stdfix_sat_uk+0x37>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__stdfix_sat_uk>:
mov    %rdi,%rax
sar    $0x3f,%rax
and    %rdi,%rax
ret

LLVM IR (-O0):
@UINT32_MAX = constant i64 0
define i64 @__stdfix_sat_uk(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = load i64, i64* @UINT32_MAX
%6 = icmp sgt i64 %4, %5
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i64, i64* @UINT32_MAX
store i64 %8, i64* %2
br label %11
9: ; preds = %1
%10 = load i64, i64* %3
store i64 %10, i64* %2
br label %11
11: ; preds = %9, %7
%12 = load i64, i64* %2
ret i64 %12
}

LLVM IR (-O2):
@UINT32_MAX = constant i64 0
define i64 @__stdfix_sat_uk(i64 %0) {
%2 = icmp slt i64 %0, 0
%3 = select i1 %2, i64 %0, i64 0
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ __NR_renameat2;
int errno;
int syscall(int /*<<< orphan*/, int, char const *, int, char const *,
            unsigned int);
int sys_renameat2(int olddirfd, const char *oldpath, int newdirfd,
                  const char *newpath, unsigned int flags) {
  int ret =
      syscall(__NR_renameat2, olddirfd, oldpath, newdirfd, newpath, flags);
  return ret >= 0 ? ret : -errno;
}


x86 assembly (clang, -O0):
<sys_renameat2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    0x2eaf(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x20(%rbp),%r8
mov    -0x24(%rbp),%r9d
call   1030 <syscall@plt>
mov    %eax,-0x28(%rbp)
cmpl   $0x0,-0x28(%rbp)
jl     1162 <sys_renameat2+0x52>
mov    -0x28(%rbp),%eax
mov    %eax,-0x2c(%rbp)
jmp    1170 <sys_renameat2+0x60>
xor    %eax,%eax
mov    0x2e6d(%rip),%rcx
sub    (%rcx),%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_renameat2>:
push   %rax
mov    %r8d,%r9d
mov    %rcx,%r8
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%esi
mov    0x2ebb(%rip),%rax
mov    (%rax),%edi
call   1030 <syscall@plt>
mov    0x2ea5(%rip),%rcx
xor    %edx,%edx
sub    (%rcx),%edx
test   %eax,%eax
cmovs  %edx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__NR_renameat2 = global i32 0
@errno = global i32 0
define i32 @sys_renameat2(i32 %0, i8* %1, i32 %2, i8* %3, i32 %4) {
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i32
%11 = alloca i32
store i32 %0, i32* %6
store i8* %1, i8** %7
store i32 %2, i32* %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%12 = load i32, i32* @__NR_renameat2
%13 = load i32, i32* %6
%14 = load i8*, i8** %7
%15 = load i32, i32* %8
%16 = load i8*, i8** %9
%17 = load i32, i32* %10
%18 = call i32 @syscall(i32 %12, i32 %13, i8* %14, i32 %15, i8* %16, i32 %17)
store i32 %18, i32* %11
%19 = load i32, i32* %11
%20 = icmp sge i32 %19, 0
br i1 %20, label %21, label %23
21: ; preds = %5
%22 = load i32, i32* %11
br label %26
23: ; preds = %5
%24 = load i32, i32* @errno
%25 = sub nsw i32 0, %24
br label %26
26: ; preds = %23, %21
%27 = phi i32 [ %22, %21 ], [ %25, %23 ]
ret i32 %27
}

LLVM IR (-O2):
@__NR_renameat2 = global i32 0
@errno = global i32 0
define i32 @sys_renameat2(i32 %0, i8* %1, i32 %2, i8* %3, i32 %4) {
%6 = load i32, i32* @__NR_renameat2
%7 = tail call i32 @syscall(i32 %6, i32 %0, i8* %1, i32 %2, i8* %3, i32 %4)
%8 = icmp sgt i32 %7, -1
%9 = load i32, i32* @errno
%10 = sub nsw i32 0, %9
%11 = select i1 %8, i32 %7, i32 %10
ret i32 %11
}
int test_imm_86uint8_reg(unsigned char val) {
  return ((val) & (0x86 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_86uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0x86,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_86uint8_reg>:
test   $0x86,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_86uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 134
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_86uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -122
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct sockaddr {
  int dummy;
};
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
int accept(int, struct sockaddr *, int /*<<< orphan*/ *);
int errno;
int os_accept(int s, struct sockaddr *addr, int *addrlen) {
  int retval;
  retval = accept(s, addr, (socklen_t *)addrlen);
  if (retval == -1)
    retval = -errno;
  return retval;
}


x86 assembly (clang, -O0):
<os_accept>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <accept@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0xffffffff,-0x1c(%rbp)
jne    114e <os_accept+0x3e>
xor    %eax,%eax
mov    0x2e97(%rip),%rcx
sub    (%rcx),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_accept>:
push   %rax
call   1030 <accept@plt>
mov    0x2ec3(%rip),%rcx
xor    %edx,%edx
sub    (%rcx),%edx
cmp    $0xffffffff,%eax
cmove  %edx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
@errno = global i32 0
define i32 @os_accept(i32 %0, %struct.sockaddr* %1, i32* %2) {
%4 = alloca i32
%5 = alloca %struct.sockaddr*
%6 = alloca i32*
%7 = alloca i32
store i32 %0, i32* %4
store %struct.sockaddr* %1, %struct.sockaddr** %5
store i32* %2, i32** %6
%8 = load i32, i32* %4
%9 = load %struct.sockaddr*, %struct.sockaddr** %5
%10 = load i32*, i32** %6
%11 = call i32 @accept(i32 %8, %struct.sockaddr* %9, i32* %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = icmp eq i32 %12, -1
br i1 %13, label %14, label %17
14: ; preds = %3
%15 = load i32, i32* @errno
%16 = sub nsw i32 0, %15
store i32 %16, i32* %7
br label %17
17: ; preds = %14, %3
%18 = load i32, i32* %7
ret i32 %18
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
@errno = global i32 0
define i32 @os_accept(i32 %0, %struct.sockaddr* %1, i32* %2) {
%4 = tail call i32 @accept(i32 %0, %struct.sockaddr* %1, i32* %2)
%5 = icmp eq i32 %4, -1
%6 = load i32, i32* @errno
%7 = sub nsw i32 0, %6
%8 = select i1 %5, i32 %7, i32 %4
ret i32 %8
}
void delayacct_set_flag(int flag) {}


x86 assembly (clang, -O0):
<delayacct_set_flag>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<delayacct_set_flag>:
ret

LLVM IR (-O0):
define void @delayacct_set_flag(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @delayacct_set_flag(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(char *, char *);
int tg_strneq(char *s1, char *s2) { return (!strcmp(s1, s2) ? 1 : 0); }


x86 assembly (clang, -O0):
<tg_strneq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%eax
setne  %dl
xor    $0xff,%dl
xor    %eax,%eax
mov    $0x1,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tg_strneq>:
push   %rax
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @tg_strneq(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = zext i1 %9 to i64
%11 = select i1 %9, i32 1, i32 0
ret i32 %11
}

LLVM IR (-O2):
define i32 @tg_strneq(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
int((access_transport_transmit))(struct ss7 *ss7, struct isup_call *c,
                                 int messagetype, unsigned char *parm,
                                 int len) {
  return len;
}


x86 assembly (clang, -O0):
<access_transport_transmit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<access_transport_transmit>:
mov    %r8d,%eax
ret

LLVM IR (-O0):
%struct.ss7 = type opaque
%struct.isup_call = type opaque
define i32 @access_transport_transmit(%struct.ss7* %0, %struct.isup_call* %1, i32 %2, i8* %3, i32 %4) {
%6 = alloca %struct.ss7*
%7 = alloca %struct.isup_call*
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i32
store %struct.ss7* %0, %struct.ss7** %6
store %struct.isup_call* %1, %struct.isup_call** %7
store i32 %2, i32* %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%11 = load i32, i32* %10
ret i32 %11
}

LLVM IR (-O2):
%struct.ss7 = type opaque
%struct.isup_call = type opaque
define i32 @access_transport_transmit(%struct.ss7* nocapture readnone %0, %struct.isup_call* nocapture readnone %1, i32 %2, i8* nocapture readnone %3, i32 returned %4) {
ret i32 %4
}
int do_290() { return 290; }


x86 assembly (clang, -O0):
<do_290>:
push   %rbp
mov    %rsp,%rbp
mov    $0x122,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_290>:
mov    $0x122,%eax
ret

LLVM IR (-O0):
define i32 @do_290() {
ret i32 290
}

LLVM IR (-O2):
define i32 @do_290() {
ret i32 290
}
int foo(int a, int b) { return ((a & (1 << 25)) ? 5 : 4); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edx
and    $0x2000000,%edx
mov    $0x4,%eax
mov    $0x5,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
and    $0x2000000,%edi
cmp    $0x1,%edi
mov    $0x5,%eax
sbb    $0x0,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = and i32 %5, 33554432
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 5, i32 4
ret i32 %9
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i32 %1) {
%3 = and i32 %0, 33554432
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 4, i32 5
ret i32 %5
}
/* Type definitions */
typedef char uint8_t;

/* Variables and functions */
void main(void) { *(uint8_t *)0xb8000 = 'X'; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb8000,%eax
movb   $0x58,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
movb   $0x58,0xb8000
58
ret

LLVM IR (-O0):
define void @main() {
store i8 88, i8* inttoptr (i64 753664 to i8*)
ret void
}

LLVM IR (-O2):
define void @main() {
store i8 88, i8* inttoptr (i64 753664 to i8*)
ret void
}