xunge/DecIR huggingface dataset:
/* Type definitions */
typedef unsigned short frame_id;
typedef unsigned short control_id;

/* Variables and functions */
int /*<<< orphan*/ SendChar(unsigned short);
void BatchSetFrame(unsigned short int control_id, unsigned short int frame_id) {
  SendChar(((control_id) >> 8) & 0xFF);
  SendChar((control_id)&0xFF);
  SendChar(((2) >> 8) & 0xFF);
  SendChar((2) & 0xFF);
  SendChar(((frame_id) >> 8) & 0xFF);
  SendChar((frame_id)&0xFF);
}


x86 assembly (clang, -O0):
<BatchSetFrame>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movzwl -0x2(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
movzwl %ax,%edi
call   1030 <SendChar@plt>
movzwl -0x2(%rbp),%eax
and    $0xff,%eax
movzwl %ax,%edi
call   1030 <SendChar@plt>
xor    %edi,%edi
call   1030 <SendChar@plt>
mov    $0x2,%edi
call   1030 <SendChar@plt>
movzwl -0x4(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
movzwl %ax,%edi
call   1030 <SendChar@plt>
movzwl -0x4(%rbp),%eax
and    $0xff,%eax
movzwl %ax,%edi
call   1030 <SendChar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BatchSetFrame>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
shr    $0x8,%edi
call   1030 <SendChar@plt>
movzbl %bpl,%edi
call   1030 <SendChar@plt>
xor    %edi,%edi
call   1030 <SendChar@plt>
mov    $0x2,%edi
call   1030 <SendChar@plt>
mov    %ebx,%edi
shr    $0x8,%edi
call   1030 <SendChar@plt>
movzbl %bl,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <SendChar@plt>

LLVM IR (-O0):
define void @BatchSetFrame(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = ashr i32 %6, 8
%8 = and i32 %7, 255
%9 = trunc i32 %8 to i16
%10 = call i32 @SendChar(i16 zeroext %9)
%11 = load i16, i16* %3
%12 = zext i16 %11 to i32
%13 = and i32 %12, 255
%14 = trunc i32 %13 to i16
%15 = call i32 @SendChar(i16 zeroext %14)
%16 = call i32 @SendChar(i16 zeroext 0)
%17 = call i32 @SendChar(i16 zeroext 2)
%18 = load i16, i16* %4
%19 = zext i16 %18 to i32
%20 = ashr i32 %19, 8
%21 = and i32 %20, 255
%22 = trunc i32 %21 to i16
%23 = call i32 @SendChar(i16 zeroext %22)
%24 = load i16, i16* %4
%25 = zext i16 %24 to i32
%26 = and i32 %25, 255
%27 = trunc i32 %26 to i16
%28 = call i32 @SendChar(i16 zeroext %27)
ret void
}

LLVM IR (-O2):
define void @BatchSetFrame(i16 zeroext %0, i16 zeroext %1) {
%3 = lshr i16 %0, 8
%4 = tail call i32 @SendChar(i16 zeroext %3)
%5 = and i16 %0, 255
%6 = tail call i32 @SendChar(i16 zeroext %5)
%7 = tail call i32 @SendChar(i16 zeroext 0)
%8 = tail call i32 @SendChar(i16 zeroext 2)
%9 = lshr i16 %1, 8
%10 = tail call i32 @SendChar(i16 zeroext %9)
%11 = and i16 %1, 255
%12 = tail call i32 @SendChar(i16 zeroext %11)
ret void
}
void *dup_obj(void *priv_data, void *val) { return val; }


x86 assembly (clang, -O0):
<dup_obj>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dup_obj>:
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i8* @dup_obj(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
ret i8* %5
}

LLVM IR (-O2):
define i8* @dup_obj(i8* nocapture readnone %0, i8* readnone returned %1) {
ret i8* %1
}
/* Type definitions */
typedef unsigned long uint32_t;

/* Variables and functions */
void UARTFIFOLevelSet(uint32_t ui32Base, uint32_t ui32TxLevel,
                      uint32_t ui32RxLevel) {
  ;

  ;

  ;
  (*((volatile unsigned long *)(ui32Base + 0x00000034))) =
      ui32TxLevel | ui32RxLevel;
}


x86 assembly (clang, -O0):
<UARTFIFOLevelSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rcx
or     -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x34(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTFIFOLevelSet>:
or     %rdx,%rsi
mov    %rsi,0x34(%rdi)
ret

LLVM IR (-O0):
define void @UARTFIFOLevelSet(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %5
%8 = load i64, i64* %6
%9 = or i64 %7, %8
%10 = load i64, i64* %4
%11 = add i64 %10, 52
%12 = inttoptr i64 %11 to i64*
store volatile i64 %9, i64* %12
ret void
}

LLVM IR (-O2):
define void @UARTFIFOLevelSet(i64 %0, i64 %1, i64 %2) {
%4 = or i64 %2, %1
%5 = add i64 %0, 52
%6 = inttoptr i64 %5 to i64*
store volatile i64 %4, i64* %6
ret void
}
void put_unaligned_uint32(void *p, unsigned int datum) {
  struct {
    unsigned int d;
  } __attribute__((packed)) *pp = (void *)p;
  pp->d = datum;
}


x86 assembly (clang, -O0):
<put_unaligned_uint32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_unaligned_uint32>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.anon = type { i32 }
define void @put_unaligned_uint32(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca %struct.anon*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.anon*
store %struct.anon* %7, %struct.anon** %5
%8 = load i32, i32* %4
%9 = load %struct.anon*, %struct.anon** %5
%10 = getelementptr inbounds %struct.anon, %struct.anon* %9, i32 0, i32 0
store i32 %8, i32* %10
ret void
}

LLVM IR (-O2):
define void @put_unaligned_uint32(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
void _M2_StrLib_init(__attribute__((unused)) int argc,
                     __attribute__((unused)) char *argv[]) {}


x86 assembly (clang, -O0):
<_M2_StrLib_init>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_M2_StrLib_init>:
ret

LLVM IR (-O0):
define void @_M2_StrLib_init(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret void
}

LLVM IR (-O2):
define void @_M2_StrLib_init(i32 %0, i8** nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pchar(char);
void prints(char *s) {
  int index = 0;
  while (s[index] != 0) {
    pchar(s[index]);
    index++;
  }
}


x86 assembly (clang, -O0):
<prints>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1157 <prints+0x47>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <pchar@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <prints+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prints>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <prints+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <pchar@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <prints+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @prints(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %21
12: ; preds = %4
%13 = load i8*, i8** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = call i32 @pchar(i8 signext %17)
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %4
21: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @prints(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8 [ %10, %4 ], [ %2, %1 ]
%7 = tail call i32 @pchar(i8 signext %6)
%8 = add nuw i64 %5, 1
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
void ordran(n, pbuf) int n;
double pbuf[];
{
  ranvec(n, pbuf);
  order(n, pbuf);
}


x86 assembly (clang, -O0):
<ordran>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1040 <ranvec@plt>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1030 <order@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ordran>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
xor    %eax,%eax
call   1040 <ranvec@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <order@plt>

LLVM IR (-O0):
define void @ordran(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca double*
store i32 %0, i32* %3
store double* %1, double** %4
%5 = load i32, i32* %3
%6 = load double*, double** %4
%7 = call i32 (i32, double*, ...) bitcast (i32 (...)* @ranvec to i32 (i32, double*, ...)*)(i32 %5, double* %6)
%8 = load i32, i32* %3
%9 = load double*, double** %4
%10 = call i32 (i32, double*, ...) bitcast (i32 (...)* @order to i32 (i32, double*, ...)*)(i32 %8, double* %9)
ret void
}

LLVM IR (-O2):
define void @ordran(i32 %0, double* %1) {
%3 = tail call i32 (i32, double*, ...) bitcast (i32 (...)* @ranvec to i32 (i32, double*, ...)*)(i32 %0, double* %1)
%4 = tail call i32 (i32, double*, ...) bitcast (i32 (...)* @order to i32 (i32, double*, ...)*)(i32 %0, double* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pound(int);
int main(int argc, char const *argv[]) {
  int times = 5;
  char ch = '!';
  float f = 6.0;
  pound(times);
  pound(ch);
  pound((int)f);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x5,-0x14(%rbp)
movb   $0x21,-0x15(%rbp)
movss  0xec7(%rip),%xmm0
movss  %xmm0,-0x1c(%rbp)
mov    -0x14(%rbp),%edi
call   1030 <pound@plt>
movsbl -0x15(%rbp),%edi
call   1030 <pound@plt>
cvttss2si -0x1c(%rbp),%edi
call   1030 <pound@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
call   1030 <pound@plt>
mov    $0x21,%edi
call   1030 <pound@plt>
mov    $0x6,%edi
call   1030 <pound@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i8
%8 = alloca float
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 5, i32* %6
store i8 33, i8* %7
store float 6.000000e+00, float* %8
%9 = load i32, i32* %6
%10 = call i32 @pound(i32 %9)
%11 = load i8, i8* %7
%12 = sext i8 %11 to i32
%13 = call i32 @pound(i32 %12)
%14 = load float, float* %8
%15 = fptosi float %14 to i32
%16 = call i32 @pound(i32 %15)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @pound(i32 5)
%4 = tail call i32 @pound(i32 33)
%5 = tail call i32 @pound(i32 6)
ret i32 0
}
/* Variables and functions */
void *calloc(size_t, size_t);
void *compat_calloc(size_t nelem, size_t size) {
  if (size == 0)
    size++;
  return calloc(nelem, size);
}


x86 assembly (clang, -O0):
<compat_calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1137 <compat_calloc+0x27>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <calloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compat_calloc>:
test   %rsi,%rsi
mov    $0x1,%eax
cmove  %rax,%rsi
jmp    1030 <calloc@plt>

LLVM IR (-O0):
define i8* @compat_calloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i64, i64* %4
%9 = add i64 %8, 1
store i64 %9, i64* %4
br label %10
10: ; preds = %7, %2
%11 = load i64, i64* %3
%12 = load i64, i64* %4
%13 = call i8* @calloc(i64 %11, i64 %12)
ret i8* %13
}

LLVM IR (-O2):
define noalias i8* @compat_calloc(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 0
%4 = select i1 %3, i64 1, i64 %1
%5 = tail call i8* @calloc(i64 %0, i64 %4)
ret i8* %5
}
/* Variables and functions */
int __builtin_mips_cabs_olt_d(double, double);
int test4(double a, double b) { return __builtin_mips_cabs_olt_d(a, b); }


x86 assembly (clang, -O0):
<test4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <__builtin_mips_cabs_olt_d@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test4>:
jmp    1030 <__builtin_mips_cabs_olt_d@plt>

LLVM IR (-O0):
define i32 @test4(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call i32 @__builtin_mips_cabs_olt_d(double %5, double %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test4(double %0, double %1) {
%3 = tail call i32 @__builtin_mips_cabs_olt_d(double %0, double %1)
ret i32 %3
}
void MPI_Bcast() {}


x86 assembly (clang, -O0):
<MPI_Bcast>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MPI_Bcast>:
ret

LLVM IR (-O0):
define void @MPI_Bcast() {
ret void
}

LLVM IR (-O2):
define void @MPI_Bcast() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void log_end_xml(FILE *fd) {
  fprintf(fd, "  </trace>\n");
  fprintf(fd, "</syscalltrace>\n");
}


x86 assembly (clang, -O0):
<log_end_xml>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x8(%rbp),%rdi
lea    0xed5(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_end_xml>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
mov    $0xb,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1030 <fwrite@plt>
lea    0xed8(%rip),%rdi
mov    $0x10,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
pop    %rbx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@.str = [12 x i8] c" </trace>\0A\00"
@.str.1 = [17 x i8] c"</syscalltrace>\0A\00"
define void @log_end_xml(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%5 = load i32*, i32** %2
%6 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c" </trace>\0A\00"
@.str.1 = [17 x i8] c"</syscalltrace>\0A\00"
define void @log_end_xml(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i64 11, i64 1, i32* %0)
%3 = tail call i64 @fwrite(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i64 16, i64 1, i32* %0)
ret void
}
/* Variables and functions */
char *strchr(char *, char);
void quitar_saltosA(char *cadena) {
  char *p;
  p = strchr(cadena, '\n');
  if (p)
    *p = '\0';
}


x86 assembly (clang, -O0):
<quitar_saltosA>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xa,%esi
call   1030 <strchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1140 <quitar_saltosA+0x30>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quitar_saltosA>:
push   %rax
mov    $0xa,%esi
call   1030 <strchr@plt>
test   %rax,%rax
je     1123 <quitar_saltosA+0x13>
movb   $0x0,(%rax)
pop    %rax
ret

LLVM IR (-O0):
define void @quitar_saltosA(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strchr(i8* %4, i8 signext 10)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i8*, i8** %3
store i8 0, i8* %9
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @quitar_saltosA(i8* %0) {
%2 = tail call i8* @strchr(i8* dereferenceable(1) %0, i8 signext 10)
%3 = icmp eq i8* %2, null
br i1 %3, label %5, label %4
4: ; preds = %1
store i8 0, i8* %2
br label %5
5: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void giveup(char *msg) {
  fprintf(stderr, "gen3m: %s\n", msg);
  exit(1);
}


x86 assembly (clang, -O0):
<giveup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<giveup>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [11 x i8] c"gen3m: %s\0A\00"
define void @giveup(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [11 x i8] c"gen3m: %s\0A\00"
define void @giveup(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ OS_LOCK();
int /*<<< orphan*/ OS_TIACK();
void os_irq_ack_lock(void) {
  OS_TIACK();
  OS_LOCK();
}


x86 assembly (clang, -O0):
<os_irq_ack_lock>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <OS_TIACK@plt>
mov    $0x0,%al
call   1030 <OS_LOCK@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_irq_ack_lock>:
push   %rax
xor    %eax,%eax
call   1040 <OS_TIACK@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <OS_LOCK@plt>

LLVM IR (-O0):
define void @os_irq_ack_lock() {
%1 = call i32 (...) @OS_TIACK()
%2 = call i32 (...) @OS_LOCK()
ret void
}

LLVM IR (-O2):
define void @os_irq_ack_lock() {
%1 = tail call i32 (...) @OS_TIACK()
%2 = tail call i32 (...) @OS_LOCK()
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t EMACAddrFilterGet(uint32_t ui32Base, uint32_t ui32Index) {
  ;
  ;
  return ((*((volatile uint32_t *)(ui32Base +
                                   (0x00000040 + ((0x0000004C - 0x00000044) *
                                                  (ui32Index)))))) &
          (0x3F000000 | 0x80000000 | 0x40000000));
}


x86 assembly (clang, -O0):
<EMACAddrFilterGet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    $0x3,%ecx
add    $0x40,%ecx
add    %ecx,%eax
cltq
mov    (%rax),%eax
and    $0xff000000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<EMACAddrFilterGet>:
lea    (%rdi,%rsi,8),%eax
add    $0x40,%eax
movslq %eax,%rcx
mov    $0xff000000,%eax
and    (%rcx),%eax
ret

LLVM IR (-O0):
define i32 @EMACAddrFilterGet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = mul nsw i32 8, %6
%8 = add nsw i32 64, %7
%9 = add nsw i32 %5, %8
%10 = sext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
%12 = load volatile i32, i32* %11
%13 = and i32 %12, -16777216
ret i32 %13
}

LLVM IR (-O2):
define i32 @EMACAddrFilterGet(i32 %0, i32 %1) {
%3 = shl nsw i32 %1, 3
%4 = add i32 %0, 64
%5 = add i32 %4, %3
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
%8 = load volatile i32, i32* %7
%9 = and i32 %8, -16777216
ret i32 %9
}
int test_imm_ADint32_reg(int val) { return ((val) & (0xAD << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_ADint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xad,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_ADint32_reg>:
test   $0xad,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_ADint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 173
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_ADint32_reg(i32 %0) {
%2 = and i32 %0, 173
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
char *kn_getvowel(char *t) {
  if (t[0] == 'c') {
    return (++t);
  } else {
    return (t);
  }
}


x86 assembly (clang, -O0):
<kn_getvowel>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x63,%eax
jne    112d <kn_getvowel+0x2d>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    %rax,-0x8(%rbp)
jmp    1135 <kn_getvowel+0x35>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kn_getvowel>:
xor    %eax,%eax
cmpb   $0x63,(%rdi)
sete   %al
add    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @kn_getvowel(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 99
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %3
store i8* %11, i8** %2
br label %14
12: ; preds = %1
%13 = load i8*, i8** %3
store i8* %13, i8** %2
br label %14
14: ; preds = %12, %9
%15 = load i8*, i8** %2
ret i8* %15
}

LLVM IR (-O2):
define i8* @kn_getvowel(i8* %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 99
%4 = zext i1 %3 to i64
%5 = getelementptr i8, i8* %0, i64 %4
ret i8* %5
}
int reg_entry_isvalid(unsigned long entry) { return (entry & 0x20) == 0x00; }


x86 assembly (clang, -O0):
<reg_entry_isvalid>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x20,%rax
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg_entry_isvalid>:
xor    %eax,%eax
test   $0x20,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @reg_entry_isvalid(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 32
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @reg_entry_isvalid(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = lshr i32 %2, 5
%4 = and i32 %3, 1
%5 = xor i32 %4, 1
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("Hello Samsugn??\n");
  printf("Hello World!!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xedf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeec(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Hello Samsugn??\0A\00"
@.str.1 = [15 x i8] c"Hello World!!\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [16 x i8] c"Hello Samsugn??\00"
@str.2 = [14 x i8] c"Hello World!!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
signed long long int atoll(const char *__nptr) {
  signed long long int return_value_strtoll$1;
  return_value_strtoll$1 = strtoll(__nptr, ((char **)((void *)0)), 10);
  return return_value_strtoll$1;
}


x86 assembly (clang, -O0):
<atoll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
mov    $0xa,%edx
call   1030 <strtoll@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atoll>:
xor    %esi,%esi
mov    $0xa,%edx
jmp    1030 <strtoll@plt>

LLVM IR (-O0):
define i64 @atoll(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strtoll(i8* %4, i8** null, i32 10)
store i64 %5, i64* %3
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
define i64 @atoll(i8* nocapture %0) {
%2 = tail call i64 @strtoll(i8* nocapture %0, i8** null, i32 10)
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ f(int);
int main(int i) { f(1); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <f@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <f@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @f(i32 1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0) {
%2 = tail call i32 @f(i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int i = 0;
  for (; i != 100; i = i + 1) {
    if (i == 7)
      break;
  }
  assert(i == 7);
  i = 0;
  while (1) {
    if (i == 10)
      break;
    i = i + 1;
  }
  assert(i == 10);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x64,-0x8(%rbp)
je     1152 <main+0x42>
cmpl   $0x7,-0x8(%rbp)
jne    113f <main+0x2f>
jmp    1152 <main+0x42>
jmp    1144 <main+0x34>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
cmpl   $0x7,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jne    1179 <main+0x69>
jmp    1187 <main+0x77>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    116a <main+0x5a>
cmpl   $0xa,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
cmp    $0x7,%eax
je     112d <main+0x1d>
nopw   0x0(%rax,%rax,1)
cmp    $0x64,%eax
je     112d <main+0x1d>
add    $0x1,%eax
cmp    $0x7,%eax
jne    1120 <main+0x10>
push   %rax
xor    %edi,%edi
cmp    $0x7,%eax
sete   %dil
call   1030 <assert@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %11, %0
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 100
br i1 %5, label %6, label %14
6: ; preds = %3
%7 = load i32, i32* %2
%8 = icmp eq i32 %7, 7
br i1 %8, label %9, label %10
9: ; preds = %6
br label %14
10: ; preds = %6
br label %11
11: ; preds = %10
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 1
store i32 %13, i32* %2
br label %3
14: ; preds = %9, %3
%15 = load i32, i32* %2
%16 = icmp eq i32 %15, 7
%17 = zext i1 %16 to i32
%18 = call i32 @assert(i32 %17)
store i32 0, i32* %2
br label %19
19: ; preds = %14, %23
%20 = load i32, i32* %2
%21 = icmp eq i32 %20, 10
br i1 %21, label %22, label %23
22: ; preds = %19
br label %26
23: ; preds = %19
%24 = load i32, i32* %2
%25 = add nsw i32 %24, 1
store i32 %25, i32* %2
br label %19
26: ; preds = %22
%27 = load i32, i32* %2
%28 = icmp eq i32 %27, 10
%29 = zext i1 %28 to i32
%30 = call i32 @assert(i32 %29)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %3, %0
%2 = phi i32 [ 0, %0 ], [ %4, %3 ]
switch i32 %2, label %3 [
i32 100, label %5
i32 7, label %5
]
3: ; preds = %1
%4 = add nuw nsw i32 %2, 1
br label %1
5: ; preds = %1, %1
%6 = icmp eq i32 %2, 7
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
%9 = tail call i32 @assert(i32 1)
ret i32 0
}
/* Variables and functions */
unsigned int floor(double);
unsigned int numeroArrotondatoAIntero(double x) { return floor(x + .5); }


x86 assembly (clang, -O0):
<numeroArrotondatoAIntero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xedb(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
call   1030 <floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<numeroArrotondatoAIntero>:
addsd  0xee8(%rip),%xmm0
jmp    1030 <floor@plt>

LLVM IR (-O0):
define i32 @numeroArrotondatoAIntero(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double %3, 5.000000e-01
%5 = call i32 @floor(double %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @numeroArrotondatoAIntero(double %0) {
%2 = fadd double %0, 5.000000e-01
%3 = tail call i32 @floor(double %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ EX_USAGE;
int /*<<< orphan*/ logerr(int /*<<< orphan*/, char *);
void usage(void) {
  logerr(EX_USAGE, "usage: mail.local [-l] [-f from] user ...");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <logerr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <logerr@plt>

LLVM IR (-O0):
@EX_USAGE = global i32 0
@.str = [42 x i8] c"usage: mail.local [-l] [-f from] user ...\00"
define void @usage() {
%1 = load i32, i32* @EX_USAGE
%2 = call i32 @logerr(i32 %1, i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@EX_USAGE = global i32 0
@.str = [42 x i8] c"usage: mail.local [-l] [-f from] user ...\00"
define void @usage() {
%1 = load i32, i32* @EX_USAGE
%2 = tail call i32 @logerr(i32 %1, i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
ret void
}
void menuMusic(void) {}


x86 assembly (clang, -O0):
<menuMusic>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<menuMusic>:
ret

LLVM IR (-O0):
define void @menuMusic() {
ret void
}

LLVM IR (-O2):
define void @menuMusic() {
ret void
}
void SPIM_1_DisableRxInt(void) {}


x86 assembly (clang, -O0):
<SPIM_1_DisableRxInt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPIM_1_DisableRxInt>:
ret

LLVM IR (-O0):
define void @SPIM_1_DisableRxInt() {
ret void
}

LLVM IR (-O2):
define void @SPIM_1_DisableRxInt() {
ret void
}
int main(void) {
  int cards[] = {[10 ... 15] = 1, 2, [1 ... 5] = 3, 4};
  if (sizeof(cards) != 17 * sizeof(int)) {
  ERROR:
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x50(%rbp),%rdi
lea    0xed6(%rip),%rsi
mov    $0x44,%edx
call   1030 <memcpy@plt>
xor    %eax,%eax
test   $0x1,%al
jne    1143 <main+0x33>
jmp    1154 <main+0x44>
jmp    1148 <main+0x38>
movl   $0x1,-0x4(%rbp)
jmp    115b <main+0x4b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@__const.main.cards = [17 x i32] [i32 0, i32 3, i32 3, i32 3, i32 3, i32 3, i32 4, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 2]
define i32 @main() {
%1 = alloca i32
%2 = alloca [17 x i32]
store i32 0, i32* %1
%3 = bitcast [17 x i32]* %2 to i8*
br i1 false, label %4, label %6
4: ; preds = %0
br label %5
5: ; preds = %4
store i32 1, i32* %1
br label %7
6: ; preds = %0
store i32 0, i32* %1
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
int count_letters(signed char *letters) {
  int i, count = 0;
  for (i = 0; i < (1 + 26); i++)
    count += letters[i];
  return count;
}


x86 assembly (clang, -O0):
<count_letters>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x1b,-0xc(%rbp)
jge    1140 <count_letters+0x40>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <count_letters+0x16>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_letters>:
movdqu (%rdi),%xmm0
punpckhbw %xmm0,%xmm1
punpcklwd %xmm1,%xmm2
psrad  $0x18,%xmm2
punpcklbw %xmm0,%xmm0
punpcklwd %xmm0,%xmm3
psrad  $0x18,%xmm3
paddd  %xmm2,%xmm3
punpckhwd %xmm1,%xmm1
psrad  $0x18,%xmm1
punpckhwd %xmm0,%xmm0
psrad  $0x18,%xmm0
paddd  %xmm1,%xmm0
paddd  %xmm3,%xmm0
movq   0x10(%rdi),%xmm1
punpcklbw %xmm1,%xmm1
punpckhwd %xmm1,%xmm2
psrad  $0x18,%xmm2
punpcklwd %xmm1,%xmm1
psrad  $0x18,%xmm1
paddd  %xmm2,%xmm1
movsbl 0x18(%rdi),%ecx
movsbl 0x19(%rdi),%edx
movsbl 0x1a(%rdi),%esi
pshufd $0xee,%xmm0,%xmm2
paddd  %xmm0,%xmm2
pshufd $0x55,%xmm2,%xmm0
paddd  %xmm2,%xmm0
movd   %xmm0,%edi
pshufd $0xee,%xmm1,%xmm0
paddd  %xmm1,%xmm0
pshufd $0x55,%xmm0,%xmm1
paddd  %xmm0,%xmm1
movd   %xmm1,%eax
add    %edi,%eax
add    %ecx,%eax
add    %edx,%eax
add    %esi,%eax
ret

LLVM IR (-O0):
define i32 @count_letters(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %17, %1
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 27
br i1 %7, label %8, label %20
8: ; preds = %5
%9 = load i8*, i8** %2
%10 = load i32, i32* %3
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %9, i64 %11
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = load i32, i32* %4
%16 = add nsw i32 %15, %14
store i32 %16, i32* %4
br label %17
17: ; preds = %8
%18 = load i32, i32* %3
%19 = add nsw i32 %18, 1
store i32 %19, i32* %3
br label %5
20: ; preds = %5
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @count_letters(i8* nocapture %0) {
%2 = bitcast i8* %0 to <16 x i8>*
%3 = load <16 x i8>, <16 x i8>* %2
%4 = sext <16 x i8> %3 to <16 x i32>
%5 = getelementptr inbounds i8, i8* %0, i64 16
%6 = bitcast i8* %5 to <8 x i8>*
%7 = load <8 x i8>, <8 x i8>* %6
%8 = sext <8 x i8> %7 to <8 x i32>
%9 = getelementptr inbounds i8, i8* %0, i64 24
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = getelementptr inbounds i8, i8* %0, i64 25
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = getelementptr inbounds i8, i8* %0, i64 26
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %4)
%19 = call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> %8)
%20 = add nsw i32 %18, %19
%21 = add nsw i32 %20, %11
%22 = add nsw i32 %21, %14
%23 = add nsw i32 %22, %17
ret i32 %23
}
unsigned char f23(unsigned char x, unsigned int y) {
  return (x >> ((-y) & (8 - 1))) ^ (x << y);
}


x86 assembly (clang, -O0):
<f23>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
and    $0x7,%ecx
sar    %cl,%eax
movzbl -0x1(%rbp),%edx
mov    -0x8(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f23>:
mov    %esi,%ecx
neg    %cl
and    $0x7,%cl
mov    %edi,%eax
shr    %cl,%eax
mov    %esi,%ecx
shl    %cl,%edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @f23(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i32, i32* %4
%8 = sub i32 0, %7
%9 = and i32 %8, 7
%10 = ashr i32 %6, %9
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = load i32, i32* %4
%14 = shl i32 %12, %13
%15 = xor i32 %10, %14
%16 = trunc i32 %15 to i8
ret i8 %16
}

LLVM IR (-O2):
define zeroext i8 @f23(i8 zeroext %0, i32 %1) {
%3 = zext i8 %0 to i32
%4 = sub i32 0, %1
%5 = and i32 %4, 7
%6 = lshr i32 %3, %5
%7 = shl i32 %3, %1
%8 = xor i32 %6, %7
%9 = trunc i32 %8 to i8
ret i8 %9
}
__attribute__((always_)) int clamp_int(int a, int b, int c) {
  return a < b ? b : a > c ? c : a;
}


x86 assembly (clang, -O0):
<clamp_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1124 <clamp_int+0x24>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1147 <clamp_int+0x47>
mov    -0x4(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    113b <clamp_int+0x3b>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1141 <clamp_int+0x41>
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clamp_int>:
mov    %edx,%eax
cmp    %edx,%edi
cmovle %edi,%eax
cmp    %esi,%edi
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define i32 @clamp_int(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load i32, i32* %5
br label %22
12: ; preds = %3
%13 = load i32, i32* %4
%14 = load i32, i32* %6
%15 = icmp sgt i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load i32, i32* %6
br label %20
18: ; preds = %12
%19 = load i32, i32* %4
br label %20
20: ; preds = %18, %16
%21 = phi i32 [ %17, %16 ], [ %19, %18 ]
br label %22
22: ; preds = %20, %10
%23 = phi i32 [ %11, %10 ], [ %21, %20 ]
ret i32 %23
}

LLVM IR (-O2):
define i32 @clamp_int(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, %1
%5 = icmp sgt i32 %0, %2
%6 = select i1 %5, i32 %2, i32 %0
%7 = select i1 %4, i32 %1, i32 %6
ret i32 %7
}
void addValueToPointersRestrict(int *restrict ptrA, int *restrict ptrB,
                                int *restrict value) {
  *ptrA += *value;
  *ptrB += *value;
}


x86 assembly (clang, -O0):
<addValueToPointersRestrict>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
add    (%rax),%ecx
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
add    (%rax),%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<addValueToPointersRestrict>:
mov    (%rdx),%eax
add    %eax,(%rdi)
add    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @addValueToPointersRestrict(i32* noalias %0, i32* noalias %1, i32* noalias %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %6
%8 = load i32, i32* %7
%9 = load i32*, i32** %4
%10 = load i32, i32* %9
%11 = add nsw i32 %10, %8
store i32 %11, i32* %9
%12 = load i32*, i32** %6
%13 = load i32, i32* %12
%14 = load i32*, i32** %5
%15 = load i32, i32* %14
%16 = add nsw i32 %15, %13
store i32 %16, i32* %14
ret void
}

LLVM IR (-O2):
define void @addValueToPointersRestrict(i32* noalias nocapture %0, i32* noalias nocapture %1, i32* noalias nocapture %2) {
%4 = load i32, i32* %2
%5 = load i32, i32* %0
%6 = add nsw i32 %5, %4
store i32 %6, i32* %0
%7 = load i32, i32* %1
%8 = add nsw i32 %7, %4
store i32 %8, i32* %1
ret void
}
/* Variables and functions */
double lgamma_r(double, int *);
double gamma_r(double x, int *signgamp) { return lgamma_r(x, signgamp); }


x86 assembly (clang, -O0):
<gamma_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    -0x10(%rbp),%rdi
call   1030 <lgamma_r@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gamma_r>:
jmp    1030 <lgamma_r@plt>

LLVM IR (-O0):
define double @gamma_r(double %0, i32* %1) {
%3 = alloca double
%4 = alloca i32*
store double %0, double* %3
store i32* %1, i32** %4
%5 = load double, double* %3
%6 = load i32*, i32** %4
%7 = call double @lgamma_r(double %5, i32* %6)
ret double %7
}

LLVM IR (-O2):
define double @gamma_r(double %0, i32* %1) {
%3 = tail call double @lgamma_r(double %0, i32* %1)
ret double %3
}
void core_my_compare_call(int *ret, int x) { *ret = x + 7; }


x86 assembly (clang, -O0):
<core_my_compare_call>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
add    $0x7,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<core_my_compare_call>:
add    $0x7,%esi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @core_my_compare_call(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = add nsw i32 %5, 7
%7 = load i32*, i32** %3
store i32 %6, i32* %7
ret void
}

LLVM IR (-O2):
define void @core_my_compare_call(i32* nocapture writeonly %0, i32 %1) {
%3 = add nsw i32 %1, 7
store i32 %3, i32* %0
ret void
}
const char *dummy_test_two(void) { return ("hello"); }


x86 assembly (clang, -O0):
<dummy_test_two>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy_test_two>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"hello\00"
define i8* @dummy_test_two() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"hello\00"
define i8* @dummy_test_two() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct comp {
  int dummy;
};
struct BrzCaseFetch_ {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ SEND_ACKDOWN_DELAYED(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ SEND_ACKUP(int /*<<< orphan*/);
int /*<<< orphan*/ SEND_DATAOFF_DELAYED(int /*<<< orphan*/, int);
void BrzCaseFetch_ackdown(struct comp *comp, int port) {
  struct BrzCaseFetch_ *c = (struct BrzCaseFetch_ *)comp;
  if (port == 1) {
    SEND_ACKUP(0);
  } else {
    SEND_ACKDOWN_DELAYED(0, 0);
    SEND_DATAOFF_DELAYED(0, 1);
  }
}


x86 assembly (clang, -O0):
<BrzCaseFetch_ackdown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpl   $0x1,-0xc(%rbp)
jne    115d <BrzCaseFetch_ackdown+0x2d>
xor    %edi,%edi
call   1030 <SEND_ACKUP@plt>
jmp    1172 <BrzCaseFetch_ackdown+0x42>
xor    %esi,%esi
mov    %esi,%edi
call   1040 <SEND_ACKDOWN_DELAYED@plt>
xor    %edi,%edi
mov    $0x1,%esi
call   1050 <SEND_DATAOFF_DELAYED@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BrzCaseFetch_ackdown>:
cmp    $0x1,%esi
jne    113c <BrzCaseFetch_ackdown+0xc>
xor    %edi,%edi
jmp    1030 <SEND_ACKUP@plt>
push   %rax
xor    %edi,%edi
xor    %esi,%esi
call   1040 <SEND_ACKDOWN_DELAYED@plt>
xor    %edi,%edi
mov    $0x1,%esi
pop    %rax
jmp    1050 <SEND_DATAOFF_DELAYED@plt>

LLVM IR (-O0):
%struct.comp = type { i32 }
%struct.BrzCaseFetch_ = type { i32 }
define void @BrzCaseFetch_ackdown(%struct.comp* %0, i32 %1) {
%3 = alloca %struct.comp*
%4 = alloca i32
%5 = alloca %struct.BrzCaseFetch_*
store %struct.comp* %0, %struct.comp** %3
store i32 %1, i32* %4
%6 = load %struct.comp*, %struct.comp** %3
%7 = bitcast %struct.comp* %6 to %struct.BrzCaseFetch_*
store %struct.BrzCaseFetch_* %7, %struct.BrzCaseFetch_** %5
%8 = load i32, i32* %4
%9 = icmp eq i32 %8, 1
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = call i32 @SEND_ACKUP(i32 0)
br label %15
12: ; preds = %2
%13 = call i32 @SEND_ACKDOWN_DELAYED(i32 0, i32 0)
%14 = call i32 @SEND_DATAOFF_DELAYED(i32 0, i32 1)
br label %15
15: ; preds = %12, %10
ret void
}

LLVM IR (-O2):
%struct.comp = type { i32 }
define void @BrzCaseFetch_ackdown(%struct.comp* nocapture readnone %0, i32 %1) {
%3 = icmp eq i32 %1, 1
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @SEND_ACKUP(i32 0)
br label %9
6: ; preds = %2
%7 = tail call i32 @SEND_ACKDOWN_DELAYED(i32 0, i32 0)
%8 = tail call i32 @SEND_DATAOFF_DELAYED(i32 0, i32 1)
br label %9
9: ; preds = %6, %4
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ event;
};
typedef TYPE_1__ XConfigureEvent;

/* Variables and functions */
unsigned long get_XConfigureEvent_event(void *_p) {
  return (unsigned long)((XConfigureEvent *)_p)->event;
}


x86 assembly (clang, -O0):
<get_XConfigureEvent_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XConfigureEvent_event>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XConfigureEvent_event(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XConfigureEvent_event(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Type definitions */
struct itimerspec {
  int dummy;
};

/* Variables and functions */
int syscall(int, int, int, struct itimerspec const *, struct itimerspec *);
int timerfd_settime(int fd, int flags, const struct itimerspec *new,
                    struct itimerspec *old) {
  return syscall(353, fd, flags, new, old);
}


x86 assembly (clang, -O0):
<timerfd_settime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
mov    $0x161,%edi
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timerfd_settime>:
mov    %rcx,%r8
mov    %rdx,%rcx
mov    %esi,%edx
mov    %edi,%esi
mov    $0x161,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.itimerspec = type { i32 }
define i32 @timerfd_settime(i32 %0, i32 %1, %struct.itimerspec* %2, %struct.itimerspec* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca %struct.itimerspec*
%8 = alloca %struct.itimerspec*
store i32 %0, i32* %5
store i32 %1, i32* %6
store %struct.itimerspec* %2, %struct.itimerspec** %7
store %struct.itimerspec* %3, %struct.itimerspec** %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load %struct.itimerspec*, %struct.itimerspec** %7
%12 = load %struct.itimerspec*, %struct.itimerspec** %8
%13 = call i32 @syscall(i32 353, i32 %9, i32 %10, %struct.itimerspec* %11, %struct.itimerspec* %12)
ret i32 %13
}

LLVM IR (-O2):
%struct.itimerspec = type { i32 }
define i32 @timerfd_settime(i32 %0, i32 %1, %struct.itimerspec* %2, %struct.itimerspec* %3) {
%5 = tail call i32 @syscall(i32 353, i32 %0, i32 %1, %struct.itimerspec* %2, %struct.itimerspec* %3)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ memcmp(void *, void *, int);
void test5(void *ptr) {
  if (memcmp(ptr, ptr, 8) != 0)
    abort();
}


x86 assembly (clang, -O0):
<test5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    $0x8,%edx
call   1040 <memcmp@plt>
cmp    $0x0,%rax
je     114f <test5+0x2f>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test5>:
push   %rax
mov    %rdi,%rsi
mov    $0x8,%edx
call   1040 <memcmp@plt>
test   %rax,%rax
jne    1135 <test5+0x15>
pop    %rax
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @test5(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @memcmp(i8* %3, i8* %4, i32 8)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 (...) @abort()
unreachable
9: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @test5(i8* %0) {
%2 = tail call i64 @memcmp(i8* %0, i8* %0, i32 8)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 (...) @abort()
unreachable
6: ; preds = %1
ret void
}