#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned short gen_web_stream_plus(unsigned short, int, int);
unsigned short get_back_diag(unsigned long long, unsigned long long, int);
unsigned short get_forward_diag(unsigned long long, unsigned long long, int);
int /*<<< orphan*/ put_back_diag(unsigned long long *, unsigned long long *,
                                 unsigned short, int);
int /*<<< orphan*/ put_forward_diag(unsigned long long *, unsigned long long *,
                                    unsigned short, int);
void gen_web_board(unsigned long long *web_l, unsigned long long *web_u,
                   unsigned long long board_l, unsigned long long board_u,
                   int pos) {
  unsigned short row, col, fdiag, bdiag;
  unsigned short web_row, web_col, web_fdiag, web_bdiag;
  int diag;
  if (pos > 49)
    row = (board_u >> ((int)pos / 10 % 5) * 10) & 0x3ff;
  else
    row = (board_l >> ((int)pos / 10 % 5) * 10) & 0x3ff;
  web_row = gen_web_stream_plus(row, pos % 10, 10);
  if (pos > 49)
    *web_u |= ((unsigned long long)web_row << ((pos / 10 % 5) * 10));
  else
    *web_l |= ((unsigned long long)web_row << ((pos / 10 % 5) * 10));
  col = ((((board_l >> pos % 10) & 0x1) | ((board_l >> (pos % 10 + 9)) & 0x2) |
          ((board_l >> (pos % 10 + 18)) & 0x4) |
          ((board_l >> (pos % 10 + 27)) & 0x8) |
          ((board_l >> (pos % 10 + 36)) & 0x10)) |
         ((((board_u >> pos % 10) & 0x1) | ((board_u >> (pos % 10 + 9)) & 0x2) |
           ((board_u >> (pos % 10 + 18)) & 0x4) |
           ((board_u >> (pos % 10 + 27)) & 0x8) |
           ((board_u >> (pos % 10 + 36)) & 0x10))
          << 5));
  web_col = gen_web_stream_plus(col, (int)pos / 10, 10);
  *web_l |= ((((unsigned long long)web_col & 0x1) << pos % 10) |
             (((unsigned long long)web_col & 0x2) << (pos % 10 + 9)) |
             (((unsigned long long)web_col & 0x4) << (pos % 10 + 18)) |
             (((unsigned long long)web_col & 0x8) << (pos % 10 + 27)) |
             (((unsigned long long)web_col & 0x10) << (pos % 10 + 36)));
  *web_u |= ((((unsigned long long)web_col >> 5 & 0x1) << pos % 10) |
             (((unsigned long long)web_col >> 5 & 0x2) << (pos % 10 + 9)) |
             (((unsigned long long)web_col >> 5 & 0x4) << (pos % 10 + 18)) |
             (((unsigned long long)web_col >> 5 & 0x8) << (pos % 10 + 27)) |
             (((unsigned long long)web_col >> 5 & 0x10) << (pos % 10 + 36)));
  diag =
      (pos % 10 > pos / 10) ? pos - ((pos / 10) * 11) : pos - ((pos % 10) * 11);
  fdiag = get_forward_diag(board_l, board_u, diag);
  web_fdiag =
      gen_web_stream_plus(fdiag, (pos % 10 > pos / 10) ? pos / 10 : pos % 10,
                          (diag < 10) ? (10 - diag) : (10 - diag / 10));
  put_forward_diag(web_l, web_u, web_fdiag, diag);
  diag = (pos / 10 < (10 - pos % 10)) ? pos - ((pos / 10) * 9)
                                      : pos - ((9 - (pos % 10)) * 9);
  bdiag = get_back_diag(board_l, board_u, diag);
  web_bdiag = gen_web_stream_plus(
      bdiag, (pos / 10 < (10 - pos % 10)) ? pos / 10 : 9 - pos % 10,
      (diag < 10) ? diag + 1 : (10 - diag / 10));
  put_back_diag(web_l, web_u, web_bdiag, diag);
}


x86 assembly (clang, -O0):
<gen_web_board>:
push   %rbp
mov    %rsp,%rbp
sub    $0x1e0,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
cmpl   $0x31,-0x24(%rbp)
jle    11af <gen_web_board+0x5f>
mov    -0x20(%rbp),%rax
mov    %rax,-0x40(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    $0x5,%ecx
cltd
idiv   %ecx
mov    -0x40(%rbp),%rax
imul   $0xa,%edx,%ecx
mov    %ecx,%ecx
shr    %cl,%rax
and    $0x3ff,%rax
mov    %ax,-0x26(%rbp)
jmp    11e0 <gen_web_board+0x90>
mov    -0x18(%rbp),%rax
mov    %rax,-0x48(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    $0x5,%ecx
cltd
idiv   %ecx
mov    -0x48(%rbp),%rax
imul   $0xa,%edx,%ecx
mov    %ecx,%ecx
shr    %cl,%rax
and    $0x3ff,%rax
mov    %ax,-0x26(%rbp)
mov    -0x26(%rbp),%ax
mov    %ax,-0x4a(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x4a(%rbp),%ax
mov    %edx,%esi
mov    $0xa,%edx
movzwl %ax,%edi
call   1060 <gen_web_stream_plus@plt>
mov    %ax,-0x2e(%rbp)
cmpl   $0x31,-0x24(%rbp)
jle    124d <gen_web_board+0xfd>
movzwl -0x2e(%rbp),%eax
mov    %rax,-0x58(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    $0x5,%ecx
cltd
idiv   %ecx
mov    -0x58(%rbp),%rax
imul   $0xa,%edx,%ecx
mov    %ecx,%ecx
shl    %cl,%rax
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
or     (%rax),%rcx
mov    %rcx,(%rax)
jmp    1281 <gen_web_board+0x131>
movzwl -0x2e(%rbp),%eax
mov    %rax,-0x60(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    $0x5,%ecx
cltd
idiv   %ecx
mov    -0x60(%rbp),%rax
imul   $0xa,%edx,%ecx
mov    %ecx,%ecx
shl    %cl,%rax
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
or     (%rax),%rcx
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rax
mov    %rax,-0x198(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x198(%rbp),%rax
mov    %edx,%ecx
shr    %cl,%rax
and    $0x1,%rax
mov    %rax,-0x190(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x188(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x190(%rbp),%rax
mov    %edx,%ecx
mov    -0x188(%rbp),%rdx
add    $0x9,%ecx
mov    %ecx,%ecx
shr    %cl,%rdx
mov    %rdx,%rcx
and    $0x2,%rcx
or     %rcx,%rax
mov    %rax,-0x180(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x178(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x180(%rbp),%rax
mov    %edx,%ecx
mov    -0x178(%rbp),%rdx
add    $0x12,%ecx
mov    %ecx,%ecx
shr    %cl,%rdx
mov    %rdx,%rcx
and    $0x4,%rcx
or     %rcx,%rax
mov    %rax,-0x170(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x168(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x170(%rbp),%rax
mov    %edx,%ecx
mov    -0x168(%rbp),%rdx
add    $0x1b,%ecx
mov    %ecx,%ecx
shr    %cl,%rdx
mov    %rdx,%rcx
and    $0x8,%rcx
or     %rcx,%rax
mov    %rax,-0x160(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x158(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x160(%rbp),%rax
mov    %edx,%ecx
mov    -0x158(%rbp),%rdx
add    $0x24,%ecx
mov    %ecx,%ecx
shr    %cl,%rdx
mov    %rdx,%rcx
and    $0x10,%rcx
or     %rcx,%rax
mov    %rax,-0x118(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x150(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x150(%rbp),%rax
mov    %edx,%ecx
shr    %cl,%rax
and    $0x1,%rax
mov    %rax,-0x148(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x140(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x148(%rbp),%rax
mov    %edx,%ecx
mov    -0x140(%rbp),%rdx
add    $0x9,%ecx
mov    %ecx,%ecx
shr    %cl,%rdx
mov    %rdx,%rcx
and    $0x2,%rcx
or     %rcx,%rax
mov    %rax,-0x138(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x130(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x138(%rbp),%rax
mov    %edx,%ecx
mov    -0x130(%rbp),%rdx
add    $0x12,%ecx
mov    %ecx,%ecx
shr    %cl,%rdx
mov    %rdx,%rcx
and    $0x4,%rcx
or     %rcx,%rax
mov    %rax,-0x128(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x120(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x128(%rbp),%rax
mov    %edx,%ecx
mov    -0x120(%rbp),%rdx
add    $0x1b,%ecx
mov    %ecx,%ecx
shr    %cl,%rdx
mov    %rdx,%rcx
and    $0x8,%rcx
or     %rcx,%rax
mov    %rax,-0x108(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x110(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x118(%rbp),%rax
mov    %edx,%ecx
mov    -0x110(%rbp),%rdx
add    $0x24,%ecx
mov    %ecx,%ecx
shr    %cl,%rdx
mov    -0x108(%rbp),%rcx
and    $0x10,%rdx
or     %rdx,%rcx
shl    $0x5,%rcx
or     %rcx,%rax
mov    %ax,-0x28(%rbp)
mov    -0x28(%rbp),%ax
mov    %ax,-0xfa(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,%esi
mov    -0xfa(%rbp),%ax
mov    $0xa,%edx
movzwl %ax,%edi
call   1060 <gen_web_stream_plus@plt>
mov    %ax,-0x30(%rbp)
movzwl -0x30(%rbp),%eax
and    $0x1,%rax
mov    %rax,-0xf8(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0xf8(%rbp),%rax
mov    %edx,%ecx
shl    %cl,%rax
mov    %rax,-0xf0(%rbp)
movzwl -0x30(%rbp),%eax
and    $0x2,%rax
mov    %rax,-0xe8(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0xf0(%rbp),%rax
mov    %edx,%ecx
mov    -0xe8(%rbp),%rdx
add    $0x9,%ecx
mov    %ecx,%ecx
shl    %cl,%rdx
mov    %rdx,%rcx
or     %rcx,%rax
mov    %rax,-0xe0(%rbp)
movzwl -0x30(%rbp),%eax
and    $0x4,%rax
mov    %rax,-0xd8(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0xe0(%rbp),%rax
mov    %edx,%ecx
mov    -0xd8(%rbp),%rdx
add    $0x12,%ecx
mov    %ecx,%ecx
shl    %cl,%rdx
mov    %rdx,%rcx
or     %rcx,%rax
mov    %rax,-0xd0(%rbp)
movzwl -0x30(%rbp),%eax
and    $0x8,%rax
mov    %rax,-0xc8(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0xd0(%rbp),%rax
mov    %edx,%ecx
mov    -0xc8(%rbp),%rdx
add    $0x1b,%ecx
mov    %ecx,%ecx
shl    %cl,%rdx
mov    %rdx,%rcx
or     %rcx,%rax
mov    %rax,-0xb8(%rbp)
movzwl -0x30(%rbp),%eax
and    $0x10,%rax
mov    %rax,-0xc0(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0xc0(%rbp),%rax
add    $0x24,%edx
mov    %edx,%ecx
shl    %cl,%rax
mov    -0xb8(%rbp),%rcx
or     %rax,%rcx
mov    -0x8(%rbp),%rax
or     (%rax),%rcx
mov    %rcx,(%rax)
movzwl -0x30(%rbp),%eax
shr    $0x5,%rax
and    $0x1,%rax
mov    %rax,-0xb0(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0xb0(%rbp),%rax
mov    %edx,%ecx
shl    %cl,%rax
mov    %rax,-0xa8(%rbp)
movzwl -0x30(%rbp),%eax
shr    $0x5,%rax
and    $0x2,%rax
mov    %rax,-0xa0(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0xa8(%rbp),%rax
mov    %edx,%ecx
mov    -0xa0(%rbp),%rdx
add    $0x9,%ecx
mov    %ecx,%ecx
shl    %cl,%rdx
mov    %rdx,%rcx
or     %rcx,%rax
mov    %rax,-0x98(%rbp)
movzwl -0x30(%rbp),%eax
shr    $0x5,%rax
and    $0x4,%rax
mov    %rax,-0x90(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x98(%rbp),%rax
mov    %edx,%ecx
mov    -0x90(%rbp),%rdx
add    $0x12,%ecx
mov    %ecx,%ecx
shl    %cl,%rdx
mov    %rdx,%rcx
or     %rcx,%rax
mov    %rax,-0x88(%rbp)
movzwl -0x30(%rbp),%eax
shr    $0x5,%rax
and    $0x8,%rax
mov    %rax,-0x80(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x88(%rbp),%rax
mov    %edx,%ecx
mov    -0x80(%rbp),%rdx
add    $0x1b,%ecx
mov    %ecx,%ecx
shl    %cl,%rdx
mov    %rdx,%rcx
or     %rcx,%rax
mov    %rax,-0x70(%rbp)
movzwl -0x30(%rbp),%eax
shr    $0x5,%rax
and    $0x10,%rax
mov    %rax,-0x78(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x78(%rbp),%rax
add    $0x24,%edx
mov    %edx,%ecx
shl    %cl,%rax
mov    -0x70(%rbp),%rcx
or     %rax,%rcx
mov    -0x10(%rbp),%rax
or     (%rax),%rcx
mov    %rcx,(%rax)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,-0x64(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x64(%rbp),%edx
cmp    %eax,%edx
jle    17ab <gen_web_board+0x65b>
mov    -0x24(%rbp),%eax
mov    %eax,-0x1a0(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x1a0(%rbp),%eax
imul   $0xb,%ecx,%ecx
sub    %ecx,%eax
mov    %eax,-0x19c(%rbp)
jmp    17d0 <gen_web_board+0x680>
mov    -0x24(%rbp),%eax
mov    %eax,-0x1a4(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x1a4(%rbp),%eax
imul   $0xb,%edx,%ecx
sub    %ecx,%eax
mov    %eax,-0x19c(%rbp)
mov    -0x19c(%rbp),%eax
mov    %eax,-0x38(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x38(%rbp),%edx
call   1070 <get_forward_diag@plt>
mov    %ax,-0x2a(%rbp)
mov    -0x2a(%rbp),%ax
mov    %ax,-0x1aa(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,-0x1a8(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x1a8(%rbp),%edx
cmp    %eax,%edx
jle    183a <gen_web_board+0x6ea>
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,%edx
mov    %edx,-0x1b0(%rbp)
jmp    184b <gen_web_board+0x6fb>
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,-0x1b0(%rbp)
mov    -0x1b0(%rbp),%eax
mov    %eax,-0x1b4(%rbp)
cmpl   $0xa,-0x38(%rbp)
jge    1874 <gen_web_board+0x724>
mov    $0xa,%eax
sub    -0x38(%rbp),%eax
mov    %eax,-0x1b8(%rbp)
jmp    188e <gen_web_board+0x73e>
mov    -0x38(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    $0xa,%eax
sub    %ecx,%eax
mov    %eax,-0x1b8(%rbp)
mov    -0x1b4(%rbp),%esi
mov    -0x1aa(%rbp),%ax
mov    -0x1b8(%rbp),%edx
movzwl %ax,%edi
call   1060 <gen_web_stream_plus@plt>
mov    %ax,-0x32(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x32(%rbp),%ax
mov    -0x38(%rbp),%ecx
movzwl %ax,%edx
call   1030 <put_forward_diag@plt>
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x1bc(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x1bc(%rbp),%eax
mov    $0xa,%ecx
sub    %edx,%ecx
cmp    %ecx,%eax
jge    1921 <gen_web_board+0x7d1>
mov    -0x24(%rbp),%eax
mov    %eax,-0x1c4(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x1c4(%rbp),%eax
imul   $0x9,%ecx,%ecx
sub    %ecx,%eax
mov    %eax,-0x1c0(%rbp)
jmp    194d <gen_web_board+0x7fd>
mov    -0x24(%rbp),%eax
mov    %eax,-0x1c8(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x1c8(%rbp),%eax
mov    $0x9,%ecx
sub    %edx,%ecx
imul   $0x9,%ecx,%ecx
sub    %ecx,%eax
mov    %eax,-0x1c0(%rbp)
mov    -0x1c0(%rbp),%eax
mov    %eax,-0x38(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x38(%rbp),%edx
call   1040 <get_back_diag@plt>
mov    %ax,-0x2c(%rbp)
mov    -0x2c(%rbp),%ax
mov    %ax,-0x1ce(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x1cc(%rbp)
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x1cc(%rbp),%eax
mov    $0xa,%ecx
sub    %edx,%ecx
cmp    %ecx,%eax
jge    19bc <gen_web_board+0x86c>
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x1d4(%rbp)
jmp    19d4 <gen_web_board+0x884>
mov    -0x24(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    $0x9,%eax
sub    %edx,%eax
mov    %eax,-0x1d4(%rbp)
mov    -0x1d4(%rbp),%eax
mov    %eax,-0x1d8(%rbp)
cmpl   $0xa,-0x38(%rbp)
jge    19fb <gen_web_board+0x8ab>
mov    -0x38(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1dc(%rbp)
jmp    1a15 <gen_web_board+0x8c5>
mov    -0x38(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    $0xa,%eax
sub    %ecx,%eax
mov    %eax,-0x1dc(%rbp)
mov    -0x1d8(%rbp),%esi
mov    -0x1ce(%rbp),%ax
mov    -0x1dc(%rbp),%edx
movzwl %ax,%edi
call   1060 <gen_web_stream_plus@plt>
mov    %ax,-0x34(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x34(%rbp),%ax
mov    -0x38(%rbp),%ecx
movzwl %ax,%edx
call   1050 <put_back_diag@plt>
add    $0x1e0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_web_board>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
sub    $0x38,%rsp
mov    %r8d,%ebp
mov    %rdx,%rbx
mov    %rdi,0x8(%rsp)
cmp    $0x32,%r8d
mov    %rcx,0x20(%rsp)
mov    %rbp,0x30(%rsp)
mov    %rsi,0x28(%rsp)
jl     11e1 <gen_web_board+0x91>
mov    %rcx,%r8
mov    %rsi,%r15
mov    %ebp,%r14d
mov    $0xcccccccd,%eax
imul   %rax,%r14
shr    $0x23,%r14
imul   %r14,%rax
shr    $0x22,%rax
lea    (%rax,%rax,4),%eax
mov    %r14d,%ecx
sub    %eax,%ecx
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%r13d
mov    %r8,%rdi
mov    %r13d,%ecx
shr    %cl,%rdi
lea    (%r14,%r14,1),%eax
lea    (%rax,%rax,4),%eax
mov    %ebp,%r12d
sub    %eax,%r12d
and    $0x3ff,%edi
mov    %r12d,%esi
mov    $0xa,%edx
call   1060 <gen_web_stream_plus@plt>
movzwl %ax,%eax
mov    %r13d,%ecx
shl    %cl,%rax
or     %rax,(%r15)
jmp    1255 <gen_web_board+0x105>
movslq %ebp,%rax
imul   $0x66666667,%rax,%r14
mov    %r14,%rax
shr    $0x3f,%rax
sar    $0x22,%r14
add    %eax,%r14d
movslq %r14d,%rax
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x21,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,4),%ecx
mov    %eax,%edx
sub    %ecx,%edx
add    %edx,%edx
lea    (%rdx,%rdx,4),%r13d
mov    %rbx,%rdi
mov    %r13d,%ecx
shr    %cl,%rdi
add    %eax,%eax
lea    (%rax,%rax,4),%eax
mov    %ebp,%r12d
sub    %eax,%r12d
and    $0x3ff,%edi
mov    %r12d,%esi
mov    $0xa,%edx
call   1060 <gen_web_stream_plus@plt>
movzwl %ax,%eax
mov    %r13d,%ecx
shl    %cl,%rax
mov    0x8(%rsp),%rcx
or     %rax,(%rcx)
mov    %rbx,%rax
mov    %r12d,%ecx
shr    %cl,%rax
lea    0x9(%r12),%edi
mov    %rbx,%rdx
mov    %edi,%ecx
mov    %edi,(%rsp)
shr    %cl,%rdx
and    $0x1,%eax
and    $0x2,%edx
or     %eax,%edx
lea    0x12(%r12),%r8d
mov    %rbx,%rax
mov    %r8d,%ecx
mov    %r8d,0x14(%rsp)
shr    %cl,%rax
and    $0x4,%eax
lea    0x1b(%r12),%ebp
mov    %rbx,%rsi
mov    %rbx,0x18(%rsp)
mov    %ebp,%ecx
mov    %ebp,0x10(%rsp)
shr    %cl,%rsi
or     %edx,%eax
and    $0x8,%esi
or     %eax,%esi
lea    0x24(%r12),%r13d
mov    %r13d,%ecx
shr    %cl,%rbx
and    $0x10,%ebx
or     %esi,%ebx
mov    0x20(%rsp),%r15
mov    %r15,%rdx
mov    %r12d,%ecx
shr    %cl,%rdx
and    $0x1,%edx
mov    %r15,%rsi
mov    %edi,%ecx
shr    %cl,%rsi
and    $0x2,%esi
mov    %r15,%rdi
mov    %r8d,%ecx
shr    %cl,%rdi
or     %edx,%esi
mov    %r15,%rdx
mov    %ebp,%ecx
shr    %cl,%rdx
and    $0x4,%edi
or     %esi,%edi
and    $0x8,%edx
or     %edi,%edx
mov    %r15,%rsi
mov    %r13d,%ecx
shr    %cl,%rsi
and    $0x10,%esi
or     %edx,%esi
shl    $0x5,%esi
or     %ebx,%esi
movzwl %si,%edi
mov    %r14d,%esi
mov    $0xa,%edx
call   1060 <gen_web_stream_plus@plt>
movzwl %ax,%ebp
mov    %ebp,%ebx
and    $0x1,%ebx
mov    %r12d,%ecx
shl    %cl,%rbx
mov    %ebp,%edx
and    $0x2,%edx
mov    (%rsp),%r8d
mov    %r8d,%ecx
shl    %cl,%rdx
mov    %ebp,%edi
and    $0x4,%edi
mov    0x14(%rsp),%r9d
mov    %r9d,%ecx
shl    %cl,%rdi
mov    %ebp,%eax
and    $0x8,%eax
mov    0x10(%rsp),%r10d
mov    %r10d,%ecx
shl    %cl,%rax
mov    %ebp,%esi
and    $0x10,%esi
mov    %r13d,%ecx
shl    %cl,%rsi
or     %rbx,%rdi
or     %rdi,%rax
mov    0x8(%rsp),%rcx
or     (%rcx),%rdx
or     %rax,%rsi
or     %rsi,%rdx
mov    %rdx,(%rcx)
shr    $0x5,%rbp
mov    %ebp,%eax
and    $0x1,%eax
mov    %r12d,%ecx
shl    %cl,%rax
mov    %ebp,%edx
and    $0x2,%edx
mov    %r8d,%ecx
shl    %cl,%rdx
mov    %ebp,%esi
and    $0x4,%esi
mov    %r9d,%ecx
shl    %cl,%rsi
mov    %ebp,%edi
and    $0x8,%edi
mov    %r10d,%ecx
shl    %cl,%rdi
and    $0x10,%ebp
mov    %r13d,%ecx
shl    %cl,%rbp
or     %rax,%rsi
or     %rsi,%rdi
mov    0x28(%rsp),%r13
or     0x0(%r13),%rdx
or     %rdi,%rbp
or     %rbp,%rdx
mov    %rdx,0x0(%r13)
cmp    %r14d,%r12d
mov    %r12d,%ebx
mov    %r14,(%rsp)
cmovg  %r14d,%ebx
imul   $0xfffffff5,%ebx,%ebp
mov    0x30(%rsp),%r14
add    %r14d,%ebp
mov    0x18(%rsp),%rdi
mov    %r15,%rsi
mov    %ebp,%edx
call   1070 <get_forward_diag@plt>
mov    %ebp,%ecx
cmp    $0xa,%ebp
jl     1404 <gen_web_board+0x2b4>
mov    %ebp,%edx
mov    $0xcccccccd,%ecx
imul   %rdx,%rcx
shr    $0x23,%rcx
mov    $0xa,%edx
sub    %ecx,%edx
movzwl %ax,%edi
mov    %ebx,%esi
call   1060 <gen_web_stream_plus@plt>
movzwl %ax,%edx
mov    0x8(%rsp),%rbx
mov    %rbx,%rdi
mov    %r13,%rsi
mov    %ebp,%ecx
call   1030 <put_forward_diag@plt>
mov    $0xa,%ecx
sub    %r12d,%ecx
mov    $0x9,%ebp
sub    %r12d,%ebp
mov    (%rsp),%rax
cmp    %ecx,%eax
cmovl  %eax,%ebp
lea    0x0(%rbp,%rbp,8),%eax
sub    %eax,%r14d
mov    0x18(%rsp),%rdi
mov    0x20(%rsp),%rsi
mov    %r14d,%edx
call   1040 <get_back_diag@plt>
cmp    $0x9,%r14d
jg     1468 <gen_web_board+0x318>
lea    0x1(%r14),%edx
jmp    147f <gen_web_board+0x32f>
mov    %r14d,%ecx
mov    $0xcccccccd,%esi
imul   %rcx,%rsi
shr    $0x23,%rsi
mov    $0xa,%edx
sub    %esi,%edx
movzwl %ax,%edi
mov    %ebp,%esi
call   1060 <gen_web_stream_plus@plt>
movzwl %ax,%edx
mov    %rbx,%rdi
mov    %r13,%rsi
mov    %r14d,%ecx
add    $0x38,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
jmp    1050 <put_back_diag@plt>

LLVM IR (-O0):
define void @gen_web_board(i64* %0, i64* %1, i64 %2, i64 %3, i32 %4) {
%6 = alloca i64*
%7 = alloca i64*
%8 = alloca i64
%9 = alloca i64
%10 = alloca i32
%11 = alloca i16
%12 = alloca i16
%13 = alloca i16
%14 = alloca i16
%15 = alloca i16
%16 = alloca i16
%17 = alloca i16
%18 = alloca i16
%19 = alloca i32
store i64* %0, i64** %6
store i64* %1, i64** %7
store i64 %2, i64* %8
store i64 %3, i64* %9
store i32 %4, i32* %10
%20 = load i32, i32* %10
%21 = icmp sgt i32 %20, 49
br i1 %21, label %22, label %32
22: ; preds = %5
%23 = load i64, i64* %9
%24 = load i32, i32* %10
%25 = sdiv i32 %24, 10
%26 = srem i32 %25, 5
%27 = mul nsw i32 %26, 10
%28 = zext i32 %27 to i64
%29 = lshr i64 %23, %28
%30 = and i64 %29, 1023
%31 = trunc i64 %30 to i16
store i16 %31, i16* %11
br label %42
32: ; preds = %5
%33 = load i64, i64* %8
%34 = load i32, i32* %10
%35 = sdiv i32 %34, 10
%36 = srem i32 %35, 5
%37 = mul nsw i32 %36, 10
%38 = zext i32 %37 to i64
%39 = lshr i64 %33, %38
%40 = and i64 %39, 1023
%41 = trunc i64 %40 to i16
store i16 %41, i16* %11
br label %42
42: ; preds = %32, %22
%43 = load i16, i16* %11
%44 = load i32, i32* %10
%45 = srem i32 %44, 10
%46 = call zeroext i16 @gen_web_stream_plus(i16 zeroext %43, i32 %45, i32 10)
store i16 %46, i16* %15
%47 = load i32, i32* %10
%48 = icmp sgt i32 %47, 49
br i1 %48, label %49, label %61
49: ; preds = %42
%50 = load i16, i16* %15
%51 = zext i16 %50 to i64
%52 = load i32, i32* %10
%53 = sdiv i32 %52, 10
%54 = srem i32 %53, 5
%55 = mul nsw i32 %54, 10
%56 = zext i32 %55 to i64
%57 = shl i64 %51, %56
%58 = load i64*, i64** %7
%59 = load i64, i64* %58
%60 = or i64 %59, %57
store i64 %60, i64* %58
br label %73
61: ; preds = %42
%62 = load i16, i16* %15
%63 = zext i16 %62 to i64
%64 = load i32, i32* %10
%65 = sdiv i32 %64, 10
%66 = srem i32 %65, 5
%67 = mul nsw i32 %66, 10
%68 = zext i32 %67 to i64
%69 = shl i64 %63, %68
%70 = load i64*, i64** %6
%71 = load i64, i64* %70
%72 = or i64 %71, %69
store i64 %72, i64* %70
br label %73
73: ; preds = %61, %49
%74 = load i64, i64* %8
%75 = load i32, i32* %10
%76 = srem i32 %75, 10
%77 = zext i32 %76 to i64
%78 = lshr i64 %74, %77
%79 = and i64 %78, 1
%80 = load i64, i64* %8
%81 = load i32, i32* %10
%82 = srem i32 %81, 10
%83 = add nsw i32 %82, 9
%84 = zext i32 %83 to i64
%85 = lshr i64 %80, %84
%86 = and i64 %85, 2
%87 = or i64 %79, %86
%88 = load i64, i64* %8
%89 = load i32, i32* %10
%90 = srem i32 %89, 10
%91 = add nsw i32 %90, 18
%92 = zext i32 %91 to i64
%93 = lshr i64 %88, %92
%94 = and i64 %93, 4
%95 = or i64 %87, %94
%96 = load i64, i64* %8
%97 = load i32, i32* %10
%98 = srem i32 %97, 10
%99 = add nsw i32 %98, 27
%100 = zext i32 %99 to i64
%101 = lshr i64 %96, %100
%102 = and i64 %101, 8
%103 = or i64 %95, %102
%104 = load i64, i64* %8
%105 = load i32, i32* %10
%106 = srem i32 %105, 10
%107 = add nsw i32 %106, 36
%108 = zext i32 %107 to i64
%109 = lshr i64 %104, %108
%110 = and i64 %109, 16
%111 = or i64 %103, %110
%112 = load i64, i64* %9
%113 = load i32, i32* %10
%114 = srem i32 %113, 10
%115 = zext i32 %114 to i64
%116 = lshr i64 %112, %115
%117 = and i64 %116, 1
%118 = load i64, i64* %9
%119 = load i32, i32* %10
%120 = srem i32 %119, 10
%121 = add nsw i32 %120, 9
%122 = zext i32 %121 to i64
%123 = lshr i64 %118, %122
%124 = and i64 %123, 2
%125 = or i64 %117, %124
%126 = load i64, i64* %9
%127 = load i32, i32* %10
%128 = srem i32 %127, 10
%129 = add nsw i32 %128, 18
%130 = zext i32 %129 to i64
%131 = lshr i64 %126, %130
%132 = and i64 %131, 4
%133 = or i64 %125, %132
%134 = load i64, i64* %9
%135 = load i32, i32* %10
%136 = srem i32 %135, 10
%137 = add nsw i32 %136, 27
%138 = zext i32 %137 to i64
%139 = lshr i64 %134, %138
%140 = and i64 %139, 8
%141 = or i64 %133, %140
%142 = load i64, i64* %9
%143 = load i32, i32* %10
%144 = srem i32 %143, 10
%145 = add nsw i32 %144, 36
%146 = zext i32 %145 to i64
%147 = lshr i64 %142, %146
%148 = and i64 %147, 16
%149 = or i64 %141, %148
%150 = shl i64 %149, 5
%151 = or i64 %111, %150
%152 = trunc i64 %151 to i16
store i16 %152, i16* %12
%153 = load i16, i16* %12
%154 = load i32, i32* %10
%155 = sdiv i32 %154, 10
%156 = call zeroext i16 @gen_web_stream_plus(i16 zeroext %153, i32 %155, i32 10)
store i16 %156, i16* %16
%157 = load i16, i16* %16
%158 = zext i16 %157 to i64
%159 = and i64 %158, 1
%160 = load i32, i32* %10
%161 = srem i32 %160, 10
%162 = zext i32 %161 to i64
%163 = shl i64 %159, %162
%164 = load i16, i16* %16
%165 = zext i16 %164 to i64
%166 = and i64 %165, 2
%167 = load i32, i32* %10
%168 = srem i32 %167, 10
%169 = add nsw i32 %168, 9
%170 = zext i32 %169 to i64
%171 = shl i64 %166, %170
%172 = or i64 %163, %171
%173 = load i16, i16* %16
%174 = zext i16 %173 to i64
%175 = and i64 %174, 4
%176 = load i32, i32* %10
%177 = srem i32 %176, 10
%178 = add nsw i32 %177, 18
%179 = zext i32 %178 to i64
%180 = shl i64 %175, %179
%181 = or i64 %172, %180
%182 = load i16, i16* %16
%183 = zext i16 %182 to i64
%184 = and i64 %183, 8
%185 = load i32, i32* %10
%186 = srem i32 %185, 10
%187 = add nsw i32 %186, 27
%188 = zext i32 %187 to i64
%189 = shl i64 %184, %188
%190 = or i64 %181, %189
%191 = load i16, i16* %16
%192 = zext i16 %191 to i64
%193 = and i64 %192, 16
%194 = load i32, i32* %10
%195 = srem i32 %194, 10
%196 = add nsw i32 %195, 36
%197 = zext i32 %196 to i64
%198 = shl i64 %193, %197
%199 = or i64 %190, %198
%200 = load i64*, i64** %6
%201 = load i64, i64* %200
%202 = or i64 %201, %199
store i64 %202, i64* %200
%203 = load i16, i16* %16
%204 = zext i16 %203 to i64
%205 = lshr i64 %204, 5
%206 = and i64 %205, 1
%207 = load i32, i32* %10
%208 = srem i32 %207, 10
%209 = zext i32 %208 to i64
%210 = shl i64 %206, %209
%211 = load i16, i16* %16
%212 = zext i16 %211 to i64
%213 = lshr i64 %212, 5
%214 = and i64 %213, 2
%215 = load i32, i32* %10
%216 = srem i32 %215, 10
%217 = add nsw i32 %216, 9
%218 = zext i32 %217 to i64
%219 = shl i64 %214, %218
%220 = or i64 %210, %219
%221 = load i16, i16* %16
%222 = zext i16 %221 to i64
%223 = lshr i64 %222, 5
%224 = and i64 %223, 4
%225 = load i32, i32* %10
%226 = srem i32 %225, 10
%227 = add nsw i32 %226, 18
%228 = zext i32 %227 to i64
%229 = shl i64 %224, %228
%230 = or i64 %220, %229
%231 = load i16, i16* %16
%232 = zext i16 %231 to i64
%233 = lshr i64 %232, 5
%234 = and i64 %233, 8
%235 = load i32, i32* %10
%236 = srem i32 %235, 10
%237 = add nsw i32 %236, 27
%238 = zext i32 %237 to i64
%239 = shl i64 %234, %238
%240 = or i64 %230, %239
%241 = load i16, i16* %16
%242 = zext i16 %241 to i64
%243 = lshr i64 %242, 5
%244 = and i64 %243, 16
%245 = load i32, i32* %10
%246 = srem i32 %245, 10
%247 = add nsw i32 %246, 36
%248 = zext i32 %247 to i64
%249 = shl i64 %244, %248
%250 = or i64 %240, %249
%251 = load i64*, i64** %7
%252 = load i64, i64* %251
%253 = or i64 %252, %250
store i64 %253, i64* %251
%254 = load i32, i32* %10
%255 = srem i32 %254, 10
%256 = load i32, i32* %10
%257 = sdiv i32 %256, 10
%258 = icmp sgt i32 %255, %257
br i1 %258, label %259, label %265
259: ; preds = %73
%260 = load i32, i32* %10
%261 = load i32, i32* %10
%262 = sdiv i32 %261, 10
%263 = mul nsw i32 %262, 11
%264 = sub nsw i32 %260, %263
br label %271
265: ; preds = %73
%266 = load i32, i32* %10
%267 = load i32, i32* %10
%268 = srem i32 %267, 10
%269 = mul nsw i32 %268, 11
%270 = sub nsw i32 %266, %269
br label %271
271: ; preds = %265, %259
%272 = phi i32 [ %264, %259 ], [ %270, %265 ]
store i32 %272, i32* %19
%273 = load i64, i64* %8
%274 = load i64, i64* %9
%275 = load i32, i32* %19
%276 = call zeroext i16 @get_forward_diag(i64 %273, i64 %274, i32 %275)
store i16 %276, i16* %13
%277 = load i16, i16* %13
%278 = load i32, i32* %10
%279 = srem i32 %278, 10
%280 = load i32, i32* %10
%281 = sdiv i32 %280, 10
%282 = icmp sgt i32 %279, %281
br i1 %282, label %283, label %286
283: ; preds = %271
%284 = load i32, i32* %10
%285 = sdiv i32 %284, 10
br label %289
286: ; preds = %271
%287 = load i32, i32* %10
%288 = srem i32 %287, 10
br label %289
289: ; preds = %286, %283
%290 = phi i32 [ %285, %283 ], [ %288, %286 ]
%291 = load i32, i32* %19
%292 = icmp slt i32 %291, 10
br i1 %292, label %293, label %296
293: ; preds = %289
%294 = load i32, i32* %19
%295 = sub nsw i32 10, %294
br label %300
296: ; preds = %289
%297 = load i32, i32* %19
%298 = sdiv i32 %297, 10
%299 = sub nsw i32 10, %298
br label %300
300: ; preds = %296, %293
%301 = phi i32 [ %295, %293 ], [ %299, %296 ]
%302 = call zeroext i16 @gen_web_stream_plus(i16 zeroext %277, i32 %290, i32 %301)
store i16 %302, i16* %17
%303 = load i64*, i64** %6
%304 = load i64*, i64** %7
%305 = load i16, i16* %17
%306 = load i32, i32* %19
%307 = call i32 @put_forward_diag(i64* %303, i64* %304, i16 zeroext %305, i32 %306)
%308 = load i32, i32* %10
%309 = sdiv i32 %308, 10
%310 = load i32, i32* %10
%311 = srem i32 %310, 10
%312 = sub nsw i32 10, %311
%313 = icmp slt i32 %309, %312
br i1 %313, label %314, label %320
314: ; preds = %300
%315 = load i32, i32* %10
%316 = load i32, i32* %10
%317 = sdiv i32 %316, 10
%318 = mul nsw i32 %317, 9
%319 = sub nsw i32 %315, %318
br label %327
320: ; preds = %300
%321 = load i32, i32* %10
%322 = load i32, i32* %10
%323 = srem i32 %322, 10
%324 = sub nsw i32 9, %323
%325 = mul nsw i32 %324, 9
%326 = sub nsw i32 %321, %325
br label %327
327: ; preds = %320, %314
%328 = phi i32 [ %319, %314 ], [ %326, %320 ]
store i32 %328, i32* %19
%329 = load i64, i64* %8
%330 = load i64, i64* %9
%331 = load i32, i32* %19
%332 = call zeroext i16 @get_back_diag(i64 %329, i64 %330, i32 %331)
store i16 %332, i16* %14
%333 = load i16, i16* %14
%334 = load i32, i32* %10
%335 = sdiv i32 %334, 10
%336 = load i32, i32* %10
%337 = srem i32 %336, 10
%338 = sub nsw i32 10, %337
%339 = icmp slt i32 %335, %338
br i1 %339, label %340, label %343
340: ; preds = %327
%341 = load i32, i32* %10
%342 = sdiv i32 %341, 10
br label %347
343: ; preds = %327
%344 = load i32, i32* %10
%345 = srem i32 %344, 10
%346 = sub nsw i32 9, %345
br label %347
347: ; preds = %343, %340
%348 = phi i32 [ %342, %340 ], [ %346, %343 ]
%349 = load i32, i32* %19
%350 = icmp slt i32 %349, 10
br i1 %350, label %351, label %354
351: ; preds = %347
%352 = load i32, i32* %19
%353 = add nsw i32 %352, 1
br label %358
354: ; preds = %347
%355 = load i32, i32* %19
%356 = sdiv i32 %355, 10
%357 = sub nsw i32 10, %356
br label %358
358: ; preds = %354, %351
%359 = phi i32 [ %353, %351 ], [ %357, %354 ]
%360 = call zeroext i16 @gen_web_stream_plus(i16 zeroext %333, i32 %348, i32 %359)
store i16 %360, i16* %18
%361 = load i64*, i64** %6
%362 = load i64*, i64** %7
%363 = load i16, i16* %18
%364 = load i32, i32* %19
%365 = call i32 @put_back_diag(i64* %361, i64* %362, i16 zeroext %363, i32 %364)
ret void
}

LLVM IR (-O2):
define void @gen_web_board(i64* %0, i64* %1, i64 %2, i64 %3, i32 %4) {
%6 = icmp sgt i32 %4, 49
br i1 %6, label %7, label %22
7: ; preds = %5
%8 = udiv i32 %4, 10
%9 = urem i32 %8, 5
%10 = mul nuw nsw i32 %9, 10
%11 = zext i32 %10 to i64
%12 = lshr i64 %3, %11
%13 = trunc i64 %12 to i16
%14 = and i16 %13, 1023
%15 = urem i32 %4, 10
%16 = tail call zeroext i16 @gen_web_stream_plus(i16 zeroext %14, i32 %15, i32 10)
%17 = zext i16 %16 to i64
%18 = shl nuw nsw i64 %17, %11
%19 = load i64, i64* %1
%20 = or i64 %18, %19
store i64 %20, i64* %1
%21 = udiv i32 %4, 10
br label %36
22: ; preds = %5
%23 = sdiv i32 %4, 10
%24 = srem i32 %23, 5
%25 = mul nsw i32 %24, 10
%26 = zext i32 %25 to i64
%27 = lshr i64 %2, %26
%28 = trunc i64 %27 to i16
%29 = and i16 %28, 1023
%30 = srem i32 %4, 10
%31 = tail call zeroext i16 @gen_web_stream_plus(i16 zeroext %29, i32 %30, i32 10)
%32 = zext i16 %31 to i64
%33 = shl i64 %32, %26
%34 = load i64, i64* %0
%35 = or i64 %33, %34
store i64 %35, i64* %0
br label %36
36: ; preds = %22, %7
%37 = phi i32 [ %23, %22 ], [ %21, %7 ]
%38 = phi i32 [ %30, %22 ], [ %15, %7 ]
%39 = zext i32 %38 to i64
%40 = lshr i64 %2, %39
%41 = and i64 %40, 1
%42 = add nsw i32 %38, 9
%43 = zext i32 %42 to i64
%44 = lshr i64 %2, %43
%45 = and i64 %44, 2
%46 = add nsw i32 %38, 18
%47 = zext i32 %46 to i64
%48 = lshr i64 %2, %47
%49 = and i64 %48, 4
%50 = add nsw i32 %38, 27
%51 = zext i32 %50 to i64
%52 = lshr i64 %2, %51
%53 = and i64 %52, 8
%54 = add nsw i32 %38, 36
%55 = zext i32 %54 to i64
%56 = lshr i64 %2, %55
%57 = and i64 %56, 16
%58 = lshr i64 %3, %39
%59 = and i64 %58, 1
%60 = lshr i64 %3, %43
%61 = and i64 %60, 2
%62 = lshr i64 %3, %47
%63 = and i64 %62, 4
%64 = lshr i64 %3, %51
%65 = and i64 %64, 8
%66 = lshr i64 %3, %55
%67 = and i64 %66, 16
%68 = or i64 %61, %59
%69 = or i64 %68, %63
%70 = or i64 %69, %65
%71 = or i64 %70, %67
%72 = shl nuw nsw i64 %71, 5
%73 = or i64 %45, %41
%74 = or i64 %73, %49
%75 = or i64 %74, %53
%76 = or i64 %75, %57
%77 = or i64 %76, %72
%78 = trunc i64 %77 to i16
%79 = tail call zeroext i16 @gen_web_stream_plus(i16 zeroext %78, i32 %37, i32 10)
%80 = zext i16 %79 to i64
%81 = and i64 %80, 1
%82 = shl nuw i64 %81, %39
%83 = and i64 %80, 2
%84 = shl nuw nsw i64 %83, %43
%85 = and i64 %80, 4
%86 = shl nuw nsw i64 %85, %47
%87 = and i64 %80, 8
%88 = shl nuw nsw i64 %87, %51
%89 = and i64 %80, 16
%90 = shl nuw nsw i64 %89, %55
%91 = load i64, i64* %0
%92 = or i64 %84, %91
%93 = or i64 %92, %82
%94 = or i64 %93, %86
%95 = or i64 %94, %88
%96 = or i64 %95, %90
store i64 %96, i64* %0
%97 = lshr i64 %80, 5
%98 = and i64 %97, 1
%99 = shl nuw i64 %98, %39
%100 = and i64 %97, 2
%101 = shl nuw nsw i64 %100, %43
%102 = and i64 %97, 4
%103 = shl nuw nsw i64 %102, %47
%104 = and i64 %97, 8
%105 = shl nuw nsw i64 %104, %51
%106 = and i64 %97, 16
%107 = shl nuw nsw i64 %106, %55
%108 = load i64, i64* %1
%109 = or i64 %101, %108
%110 = or i64 %109, %99
%111 = or i64 %110, %103
%112 = or i64 %111, %105
%113 = or i64 %112, %107
store i64 %113, i64* %1
%114 = icmp sgt i32 %38, %37
%115 = select i1 %114, i32 %37, i32 %38
%116 = mul i32 %115, -11
%117 = add i32 %116, %4
%118 = tail call zeroext i16 @get_forward_diag(i64 %2, i64 %3, i32 %117)
%119 = icmp slt i32 %117, 10
%120 = udiv i32 %117, 10
%121 = select i1 %119, i32 %117, i32 %120
%122 = sub nsw i32 10, %121
%123 = tail call zeroext i16 @gen_web_stream_plus(i16 zeroext %118, i32 %115, i32 %122)
%124 = tail call i32 @put_forward_diag(i64* %0, i64* %1, i16 zeroext %123, i32 %117)
%125 = sub nsw i32 10, %38
%126 = icmp slt i32 %37, %125
%127 = sub nsw i32 9, %38
%128 = select i1 %126, i32 %37, i32 %127
%129 = mul nsw i32 %128, -9
%130 = add i32 %129, %4
%131 = tail call zeroext i16 @get_back_diag(i64 %2, i64 %3, i32 %130)
%132 = icmp slt i32 %130, 10
br i1 %132, label %133, label %135
133: ; preds = %36
%134 = add nsw i32 %130, 1
br label %138
135: ; preds = %36
%136 = udiv i32 %130, 10
%137 = sub nsw i32 10, %136
br label %138
138: ; preds = %135, %133
%139 = phi i32 [ %134, %133 ], [ %137, %135 ]
%140 = tail call zeroext i16 @gen_web_stream_plus(i16 zeroext %131, i32 %128, i32 %139)
%141 = tail call i32 @put_back_diag(i64* %0, i64* %1, i16 zeroext %140, i32 %130)
ret void
}