xunge/DecIR huggingface dataset:
unsigned int reHashCode(unsigned int collision, unsigned int code) {
  return (code + collision) % 100;
}


x86 assembly (clang, -O0):
<reHashCode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
mov    $0x64,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reHashCode>:
lea    (%rdi,%rsi,1),%eax
imul   $0x51eb851f,%rax,%rcx
shr    $0x25,%rcx
imul   $0x64,%ecx,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @reHashCode(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = add i32 %5, %6
%8 = urem i32 %7, 100
ret i32 %8
}

LLVM IR (-O2):
define i32 @reHashCode(i32 %0, i32 %1) {
%3 = add i32 %1, %0
%4 = urem i32 %3, 100
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ write_data(int, int, int);
void send_bytes(int byte0, int byte1, int byte2, int byte3) {
  write_data(0x20, 0x12, byte0);
  write_data(0x20, 0x13, byte1);
  write_data(0x21, 0x12, byte2);
  write_data(0x21, 0x13, byte3);
}


x86 assembly (clang, -O0):
<send_bytes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edx
mov    $0x20,%edi
mov    $0x12,%esi
call   1030 <write_data@plt>
mov    -0x8(%rbp),%edx
mov    $0x20,%edi
mov    $0x13,%esi
call   1030 <write_data@plt>
mov    -0xc(%rbp),%edx
mov    $0x21,%edi
mov    $0x12,%esi
call   1030 <write_data@plt>
mov    -0x10(%rbp),%edx
mov    $0x21,%edi
mov    $0x13,%esi
call   1030 <write_data@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_bytes>:
push   %rbp
push   %r14
push   %rbx
mov    %ecx,%r14d
mov    %edx,%ebp
mov    %esi,%ebx
mov    %edi,%edx
mov    $0x20,%edi
mov    $0x12,%esi
call   1030 <write_data@plt>
mov    $0x20,%edi
mov    $0x13,%esi
mov    %ebx,%edx
call   1030 <write_data@plt>
mov    $0x21,%edi
mov    $0x12,%esi
mov    %ebp,%edx
call   1030 <write_data@plt>
mov    $0x21,%edi
mov    $0x13,%esi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <write_data@plt>

LLVM IR (-O0):
define void @send_bytes(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = call i32 @write_data(i32 32, i32 18, i32 %9)
%11 = load i32, i32* %6
%12 = call i32 @write_data(i32 32, i32 19, i32 %11)
%13 = load i32, i32* %7
%14 = call i32 @write_data(i32 33, i32 18, i32 %13)
%15 = load i32, i32* %8
%16 = call i32 @write_data(i32 33, i32 19, i32 %15)
ret void
}

LLVM IR (-O2):
define void @send_bytes(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @write_data(i32 32, i32 18, i32 %0)
%6 = tail call i32 @write_data(i32 32, i32 19, i32 %1)
%7 = tail call i32 @write_data(i32 33, i32 18, i32 %2)
%8 = tail call i32 @write_data(i32 33, i32 19, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isgraph(int);
void t_isgraph_0x4a() {
  Assert_real((isgraph(74)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              375, ("isgraph should be 1 for J"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x4a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4a,%edi
call   1040 <isgraph@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x177,%edx
lea    0xf65(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x4a>:
push   %rax
mov    $0x4a,%edi
call   1040 <isgraph@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x177,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for J\00"
define void @t_isgraph_0x4a() {
%1 = call i32 @isgraph(i32 74)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 375, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for J\00"
define void @t_isgraph_0x4a() {
%1 = tail call i32 @isgraph(i32 74)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 375, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
AR0A1(r0, r1, x0, x1, p0, p1) int r0, r1;
int *p0, *p1;
{ (p0[10000000]) = (*((int *)11111111)); }


x86 assembly (clang, -O0):
<AR0A1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    $0xa98ac7,%eax
mov    (%rax),%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,0x2625a00(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<AR0A1>:
mov    0xa98ac7,%eax
mov    %eax,0x2625a00(%r8)
ret

LLVM IR (-O0):
define i32 @AR0A1(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32, i32* inttoptr (i64 11111111 to i32*)
%15 = load i32*, i32** %12
%16 = getelementptr inbounds i32, i32* %15, i64 10000000
store i32 %14, i32* %16
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
define i32 @AR0A1(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture writeonly %4, i32* nocapture readnone %5) {
%7 = load i32, i32* inttoptr (i64 11111111 to i32*)
%8 = getelementptr inbounds i32, i32* %4, i64 10000000
store i32 %7, i32* %8
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
double rnd();
double uniform(void) {
  double x = rnd() / (double)(2147483647 - 1);
  assert(x >= 0 && x <= 1);
  return (x);
}


x86 assembly (clang, -O0):
<uniform>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <rnd@plt>
movsd  0xec9(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xor    %eax,%eax
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
mov    %al,-0x9(%rbp)
jb     116a <uniform+0x4a>
movsd  0xea9(%rip),%xmm0
ucomisd -0x8(%rbp),%xmm0
setae  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uniform>:
push   %rax
xor    %eax,%eax
call   1030 <rnd@plt>
divsd  0xed0(%rip),%xmm0
movsd  %xmm0,(%rsp)
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
setae  %al
movsd  0xec0(%rip),%xmm1
ucomisd %xmm0,%xmm1
setae  %cl
and    %al,%cl
movzbl %cl,%edi
call   1040 <assert@plt>
movsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @uniform() {
%1 = alloca double
%2 = call double (...) @rnd()
%3 = fdiv double %2, 0x41DFFFFFFF800000
store double %3, double* %1
%4 = load double, double* %1
%5 = fcmp oge double %4, 0.000000e+00
br i1 %5, label %6, label %9
6: ; preds = %0
%7 = load double, double* %1
%8 = fcmp ole double %7, 1.000000e+00
br label %9
9: ; preds = %6, %0
%10 = phi i1 [ false, %0 ], [ %8, %6 ]
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load double, double* %1
ret double %13
}

LLVM IR (-O2):
define double @uniform() {
%1 = tail call double (...) @rnd()
%2 = fdiv double %1, 0x41DFFFFFFF800000
%3 = fcmp oge double %2, 0.000000e+00
%4 = fcmp ole double %2, 1.000000e+00
%5 = and i1 %3, %4
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
ret double %2
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ save_bmp(char *);
int32_t main() {
  save_bmp("output.bmp");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <save_bmp@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <save_bmp@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"output.bmp\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @save_bmp(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"output.bmp\00"
define i32 @main() {
%1 = tail call i32 @save_bmp(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct DHCPSingleOption {
  int dummy;
};

/* Variables and functions */
struct DHCPSingleOption const *DHCP_nextSingleOption(struct DHCPSingleOption *);
struct DHCPSingleOption const *
DHCP_nextSingleOptionConst(struct DHCPSingleOption const *opt) {
  return DHCP_nextSingleOption(((struct DHCPSingleOption *)(opt)));
}


x86 assembly (clang, -O0):
<DHCP_nextSingleOptionConst>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <DHCP_nextSingleOption@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DHCP_nextSingleOptionConst>:
jmp    1030 <DHCP_nextSingleOption@plt>

LLVM IR (-O0):
%struct.DHCPSingleOption = type { i32 }
define %struct.DHCPSingleOption* @DHCP_nextSingleOptionConst(%struct.DHCPSingleOption* %0) {
%2 = alloca %struct.DHCPSingleOption*
store %struct.DHCPSingleOption* %0, %struct.DHCPSingleOption** %2
%3 = load %struct.DHCPSingleOption*, %struct.DHCPSingleOption** %2
%4 = call %struct.DHCPSingleOption* @DHCP_nextSingleOption(%struct.DHCPSingleOption* %3)
ret %struct.DHCPSingleOption* %4
}

LLVM IR (-O2):
%struct.DHCPSingleOption = type { i32 }
define %struct.DHCPSingleOption* @DHCP_nextSingleOptionConst(%struct.DHCPSingleOption* %0) {
%2 = tail call %struct.DHCPSingleOption* @DHCP_nextSingleOption(%struct.DHCPSingleOption* %0)
ret %struct.DHCPSingleOption* %2
}
/* Type definitions */
typedef int pid_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int wait(int *);
void sigchld_handler(int sig) {
  pid_t pid;
  int status;
  pid = wait(&status);
  printf("Pid [%d] returned %d.\n", pid, status);
}


x86 assembly (clang, -O0):
<sigchld_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0xc(%rbp),%rdi
call   1040 <wait@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigchld_handler>:
push   %rax
lea    0x4(%rsp),%rdi
call   1040 <wait@plt>
mov    0x4(%rsp),%edx
lea    0xeca(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [23 x i8] c"Pid [%d] returned %d.\0A\00"
define void @sigchld_handler(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = call i32 @wait(i32* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %6, i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c"Pid [%d] returned %d.\0A\00"
define void @sigchld_handler(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @wait(i32* %2)
%5 = load i32, i32* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delay(int);
int /*<<< orphan*/ disp_int(int /*<<< orphan*/);
int /*<<< orphan*/ disp_str(char *);
int /*<<< orphan*/ get_ticks();
void TestA() {
  int i = 0;
  while (1) {
    get_ticks();
    disp_str("A");
    disp_int(i++);
    disp_str(".");
    delay(1);
  }
}


x86 assembly (clang, -O0):
<TestA>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <get_ticks@plt>
lea    0xea3(%rip),%rdi
call   1030 <disp_str@plt>
mov    -0x4(%rbp),%edi
mov    %edi,%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    %eax,-0x4(%rbp)
call   1060 <disp_int@plt>
lea    0xe86(%rip),%rdi
call   1030 <disp_str@plt>
mov    $0x1,%edi
call   1040 <delay@plt>
jmp    114f <TestA+0xf>

x86 assembly (clang, -O2):
<TestA>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
lea    0xeb2(%rip),%r14
lea    0xead(%rip),%r15
xor    %ebx,%ebx
nopw   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1050 <get_ticks@plt>
mov    %r14,%rdi
call   1030 <disp_str@plt>
lea    0x1(%rbx),%ebp
mov    %ebx,%edi
call   1060 <disp_int@plt>
mov    %r15,%rdi
call   1030 <disp_str@plt>
mov    $0x1,%edi
call   1040 <delay@plt>
mov    %ebp,%ebx
jmp    1160 <TestA+0x20>

LLVM IR (-O0):
@.str = [2 x i8] c"A\00"
@.str.1 = [2 x i8] c".\00"
define void @TestA() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0, %2
%3 = call i32 (...) @get_ticks()
%4 = call i32 @disp_str(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* %1
%6 = add nsw i32 %5, 1
store i32 %6, i32* %1
%7 = call i32 @disp_int(i32 %5)
%8 = call i32 @disp_str(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%9 = call i32 @delay(i32 1)
br label %2
}

LLVM IR (-O2):
@.str = [2 x i8] c"A\00"
@.str.1 = [2 x i8] c".\00"
define void @TestA() {
br label %1
1: ; preds = %1, %0
%2 = phi i32 [ 0, %0 ], [ %5, %1 ]
%3 = tail call i32 (...) @get_ticks()
%4 = tail call i32 @disp_str(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%5 = add nuw nsw i32 %2, 1
%6 = tail call i32 @disp_int(i32 %2)
%7 = tail call i32 @disp_str(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%8 = tail call i32 @delay(i32 1)
br label %1
}
unsigned int vadd4(unsigned int a, unsigned int b) {
  unsigned int r, s, t;
  s = a ^ b;
  r = a & 0x7f7f7f7f;
  t = b & 0x7f7f7f7f;
  s = s & 0x80808080;
  r = r + t;
  r = r ^ s;
  return r;
}


x86 assembly (clang, -O0):
<vadd4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x7f7f7f7f,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    $0x7f7f7f7f,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
and    $0x80808080,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    -0x14(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vadd4>:
mov    %esi,%eax
xor    %edi,%eax
and    $0x7f7f7f7f,%edi
and    $0x7f7f7f7f,%esi
lea    (%rsi,%rdi,1),%ecx
and    $0x80808080,%eax
xor    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @vadd4(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = xor i32 %8, %9
store i32 %10, i32* %6
%11 = load i32, i32* %3
%12 = and i32 %11, 2139062143
store i32 %12, i32* %5
%13 = load i32, i32* %4
%14 = and i32 %13, 2139062143
store i32 %14, i32* %7
%15 = load i32, i32* %6
%16 = and i32 %15, -2139062144
store i32 %16, i32* %6
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = add i32 %17, %18
store i32 %19, i32* %5
%20 = load i32, i32* %5
%21 = load i32, i32* %6
%22 = xor i32 %20, %21
store i32 %22, i32* %5
%23 = load i32, i32* %5
ret i32 %23
}

LLVM IR (-O2):
define i32 @vadd4(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
%4 = and i32 %0, 2139062143
%5 = and i32 %1, 2139062143
%6 = and i32 %3, -2139062144
%7 = add nuw i32 %5, %4
%8 = xor i32 %7, %6
ret i32 %8
}
int iso8859_mblen(unsigned char *str, int len) { return 1; }


x86 assembly (clang, -O0):
<iso8859_mblen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iso8859_mblen>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @iso8859_mblen(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 1
}

LLVM IR (-O2):
define i32 @iso8859_mblen(i8* nocapture readnone %0, i32 %1) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_socket_is_local() {
  printf("NOT IMPLEMENTED:"
         "pa_socket_is_local"
         "\n");
}


x86 assembly (clang, -O0):
<pa_socket_is_local>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_socket_is_local>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"NOT IMPLEMENTED:pa_socket_is_local\0A\00"
define i32 @pa_socket_is_local() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [35 x i8] c"NOT IMPLEMENTED:pa_socket_is_local\00"
define i32 @pa_socket_is_local() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
int test_imm_47uint32_mem(unsigned int *val) {
  return ((*val) & (0x47 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_47uint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x47,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_47uint32_mem>:
testb  $0x47,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_47uint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 71
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_47uint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 71
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct timeval {
  int tv_usec;
  int /*<<< orphan*/ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/);
long timer_to_time(int /*<<< orphan*/);
long time_now(void) {
  struct timeval time_struct;
  gettimeofday(&time_struct, 0);
  return (timer_to_time(time_struct.tv_sec) + time_struct.tv_usec / 10000);
}


x86 assembly (clang, -O0):
<time_now>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
mov    -0x4(%rbp),%edi
call   1040 <timer_to_time@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2710,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_now>:
push   %rax
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
mov    0x4(%rsp),%edi
call   1040 <timer_to_time@plt>
movslq (%rsp),%rcx
imul   $0x68db8bad,%rcx,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x2c,%rcx
add    %edx,%ecx
movslq %ecx,%rcx
add    %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define i64 @time_now() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32 0)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%4 = load i32, i32* %3
%5 = call i64 @timer_to_time(i32 %4)
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%7 = load i32, i32* %6
%8 = sdiv i32 %7, 10000
%9 = sext i32 %8 to i64
%10 = add nsw i64 %5, %9
ret i64 %10
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define i64 @time_now() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32 0)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%5 = load i32, i32* %4
%6 = call i64 @timer_to_time(i32 %5)
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%8 = load i32, i32* %7
%9 = sdiv i32 %8, 10000
%10 = sext i32 %9 to i64
%11 = add nsw i64 %6, %10
ret i64 %11
}
/* Variables and functions */
int /*<<< orphan*/ test_enc_speed();
int /*<<< orphan*/ test_key_speed();
int main(int argc, const char *argv[]) {
  test_enc_speed();
  test_key_speed();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <test_enc_speed@plt>
mov    $0x0,%al
call   1030 <test_key_speed@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <test_enc_speed@plt>
xor    %eax,%eax
call   1030 <test_key_speed@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @test_enc_speed()
%7 = call i32 (...) @test_key_speed()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @test_enc_speed()
%4 = tail call i32 (...) @test_key_speed()
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ CLOCK_SYS_GetBusClockFreq();
uint32_t CLOCK_SYS_GetSpiFreq(uint32_t instance) {
  (void)instance;
  return CLOCK_SYS_GetBusClockFreq();
}


x86 assembly (clang, -O0):
<CLOCK_SYS_GetSpiFreq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <CLOCK_SYS_GetBusClockFreq@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CLOCK_SYS_GetSpiFreq>:
xor    %eax,%eax
jmp    1030 <CLOCK_SYS_GetBusClockFreq@plt>

LLVM IR (-O0):
define i32 @CLOCK_SYS_GetSpiFreq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (...) @CLOCK_SYS_GetBusClockFreq()
ret i32 %4
}

LLVM IR (-O2):
define i32 @CLOCK_SYS_GetSpiFreq(i32 %0) {
%2 = tail call i32 (...) @CLOCK_SYS_GetBusClockFreq()
ret i32 %2
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ myWrite(int, int *, int);
void sendFull(int fd) {
  uint8_t data[1] = {132};
  myWrite(fd, data, 1);
}


x86 assembly (clang, -O0):
<sendFull>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0xedf(%rip),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
mov    $0x1,%edx
call   1030 <myWrite@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sendFull>:
push   %rax
movl   $0x84,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x1,%edx
call   1030 <myWrite@plt>
pop    %rax
ret

LLVM IR (-O0):
@__const.sendFull.data = [1 x i32] [i32 132]
define void @sendFull(i32 %0) {
%2 = alloca i32
%3 = alloca [1 x i32]
store i32 %0, i32* %2
%4 = bitcast [1 x i32]* %3 to i8*
%5 = load i32, i32* %2
%6 = getelementptr inbounds [1 x i32], [1 x i32]* %3, i64 0, i64 0
%7 = call i32 @myWrite(i32 %5, i32* %6, i32 1)
ret void
}

LLVM IR (-O2):
define void @sendFull(i32 %0) {
%2 = alloca [1 x i32]
%3 = bitcast [1 x i32]* %2 to i8*
%4 = getelementptr inbounds [1 x i32], [1 x i32]* %2, i64 0, i64 0
store i32 132, i32* %4
%5 = call i32 @myWrite(i32 %0, i32* %4, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void sub() { printf("sub\n"); }


x86 assembly (clang, -O0):
<sub>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"sub\0A\00"
define void @sub() {
%1 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [4 x i8] c"sub\00"
define void @sub() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ basic_teardown();
void namespace_teardown(void) { basic_teardown(); }


x86 assembly (clang, -O0):
<namespace_teardown>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <basic_teardown@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<namespace_teardown>:
xor    %eax,%eax
jmp    1030 <basic_teardown@plt>

LLVM IR (-O0):
define void @namespace_teardown() {
%1 = call i32 (...) @basic_teardown()
ret void
}

LLVM IR (-O2):
define void @namespace_teardown() {
%1 = tail call i32 (...) @basic_teardown()
ret void
}
int xmlUCSIsOsmanya(int code) {
  return (((code >= 0x10480) && (code <= 0x104AF)));
}


x86 assembly (clang, -O0):
<xmlUCSIsOsmanya>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x10480,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1126 <xmlUCSIsOsmanya+0x26>
cmpl   $0x104af,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmlUCSIsOsmanya>:
add    $0xfffefb80,%edi
xor    %eax,%eax
cmp    $0x30,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @xmlUCSIsOsmanya(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 66688
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 66735
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @xmlUCSIsOsmanya(i32 %0) {
%2 = add i32 %0, -66688
%3 = icmp ult i32 %2, 48
%4 = zext i1 %3 to i32
ret i32 %4
}
void a_and(volatile void *p, int v) { *(int *)p &= v; }


x86 assembly (clang, -O0):
<a_and>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
and    (%rax),%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_and>:
and    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @a_and(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
%8 = load i32, i32* %7
%9 = and i32 %8, %5
store i32 %9, i32* %7
ret void
}

LLVM IR (-O2):
define void @a_and(i8* nocapture %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = and i32 %4, %1
store i32 %5, i32* %3
ret void
}
/* Type definitions */
struct fsm {
  int dummy;
};

/* Variables and functions */
struct fsm *fsm_completes(struct fsm *, int /*<<< orphan*/);
struct fsm *fsm_complement(struct fsm *net) {
  return (fsm_completes(net, 0));
}


x86 assembly (clang, -O0):
<fsm_complement>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <fsm_completes@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsm_complement>:
xor    %esi,%esi
jmp    1030 <fsm_completes@plt>

LLVM IR (-O0):
%struct.fsm = type { i32 }
define %struct.fsm* @fsm_complement(%struct.fsm* %0) {
%2 = alloca %struct.fsm*
store %struct.fsm* %0, %struct.fsm** %2
%3 = load %struct.fsm*, %struct.fsm** %2
%4 = call %struct.fsm* @fsm_completes(%struct.fsm* %3, i32 0)
ret %struct.fsm* %4
}

LLVM IR (-O2):
%struct.fsm = type { i32 }
define %struct.fsm* @fsm_complement(%struct.fsm* %0) {
%2 = tail call %struct.fsm* @fsm_completes(%struct.fsm* %0, i32 0)
ret %struct.fsm* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() { printf("AAAAAA\033[5LBBBBBB"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"AAAAAA\1B[5LBBBBBB\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [17 x i8] c"AAAAAA\1B[5LBBBBBB\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fwrite(short *, int, int, int /*<<< orphan*/ *);
void write_short(FILE *file, short bytes) {
  fwrite(&bytes, sizeof(char), 2, file);
  return;
}


x86 assembly (clang, -O0):
<write_short>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rcx
lea    -0xa(%rbp),%rdi
mov    $0x1,%esi
mov    $0x2,%edx
call   1030 <fwrite@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_short>:
push   %rax
mov    %rdi,%rcx
mov    %si,0x6(%rsp)
lea    0x6(%rsp),%rdi
mov    $0x1,%esi
mov    $0x2,%edx
call   1030 <fwrite@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @write_short(i32* %0, i16 signext %1) {
%3 = alloca i32*
%4 = alloca i16
store i32* %0, i32** %3
store i16 %1, i16* %4
%5 = load i32*, i32** %3
%6 = call i32 @fwrite(i16* %4, i32 1, i32 2, i32* %5)
ret void
}

LLVM IR (-O2):
define void @write_short(i32* nocapture %0, i16 signext %1) {
%3 = alloca i16
store i16 %1, i16* %3
%4 = call i32 @fwrite(i16* %3, i32 1, i32 2, i32* %0)
ret void
}
int ft_splitcount(char **split) {
  int count;
  count = 0;
  while (*split) {
    count++;
    split++;
  }
  return (count);
}


x86 assembly (clang, -O0):
<ft_splitcount>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     1137 <ft_splitcount+0x37>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <ft_splitcount+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_splitcount>:
cmpq   $0x0,(%rdi)
je     111d <ft_splitcount+0x1d>
xor    %eax,%eax
nopl   0x0(%rax,%rax,1)
cmpq   $0x0,0x8(%rdi,%rax,8)
lea    0x1(%rax),%rax
jne    1110 <ft_splitcount+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ft_splitcount(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i8**, i8*** %2
%6 = load i8*, i8** %5
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
%11 = load i8**, i8*** %2
%12 = getelementptr inbounds i8*, i8** %11, i32 1
store i8** %12, i8*** %2
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @ft_splitcount(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = icmp eq i8* %2, null
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = phi i8** [ %8, %4 ], [ %0, %1 ]
%7 = add nuw nsw i32 %5, 1
%8 = getelementptr inbounds i8*, i8** %6, i64 1
%9 = load i8*, i8** %8
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %12
}
/* Variables and functions */
double y0(double);
double c_y0(double arg0) { return y0(arg0); }


x86 assembly (clang, -O0):
<c_y0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <y0@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_y0>:
jmp    1030 <y0@plt>

LLVM IR (-O0):
define double @c_y0(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @y0(double %3)
ret double %4
}

LLVM IR (-O2):
define double @c_y0(double %0) {
%2 = tail call double @y0(double %0)
ret double %2
}
int pair(int *p) { return *p + p[1]; }


x86 assembly (clang, -O0):
<pair>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x8(%rbp),%rcx
add    0x4(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pair>:
mov    0x4(%rdi),%eax
add    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @pair(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 1
%7 = load i32, i32* %6
%8 = add nsw i32 %4, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @pair(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = load i32, i32* %3
%5 = add nsw i32 %4, %2
ret i32 %5
}
void vectInit(int X[10]) {
  int j;
  for (j = 0; j < 4; j++)
    X[j] = 1;
  for (; j < 10; j++)
    X[j] = 0;
}


x86 assembly (clang, -O0):
<vectInit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x4,-0xc(%rbp)
jge    1136 <vectInit+0x36>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movl   $0x1,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <vectInit+0xf>
jmp    113b <vectInit+0x3b>
cmpl   $0xa,-0xc(%rbp)
jge    1162 <vectInit+0x62>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movl   $0x0,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    113b <vectInit+0x3b>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vectInit>:
movaps 0xef9(%rip),%xmm0
movups %xmm0,(%rdi)
xorps  %xmm0,%xmm0
movups %xmm0,0x10(%rdi)
movq   $0x0,0x20(%rdi)
ret

LLVM IR (-O0):
define void @vectInit(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 4
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32*, i32** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
store i32 1, i32* %11
br label %12
12: ; preds = %7
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
br label %16
16: ; preds = %24, %15
%17 = load i32, i32* %3
%18 = icmp slt i32 %17, 10
br i1 %18, label %19, label %27
19: ; preds = %16
%20 = load i32*, i32** %2
%21 = load i32, i32* %3
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i32, i32* %20, i64 %22
store i32 0, i32* %23
br label %24
24: ; preds = %19
%25 = load i32, i32* %3
%26 = add nsw i32 %25, 1
store i32 %26, i32* %3
br label %16
27: ; preds = %16
ret void
}

LLVM IR (-O2):
define void @vectInit(i32* nocapture writeonly %0) {
%2 = bitcast i32* %0 to <4 x i32>*
store <4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32>* %2
%3 = getelementptr i32, i32* %0, i64 4
%4 = bitcast i32* %3 to i8*
ret void
}
int invert_hs_control(int connect) { return 0; }


x86 assembly (clang, -O0):
<invert_hs_control>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<invert_hs_control>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @invert_hs_control(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @invert_hs_control(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ EMLINK;
int /*<<< orphan*/ errno;
int _link(char *old, char *new_) {
  errno = EMLINK;
  return -1;
}


x86 assembly (clang, -O0):
<_link>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2edd(%rip),%rax
mov    (%rax),%ecx
mov    0x2ebc(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_link>:
mov    0x2ee9(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@EMLINK = global i32 0
@errno = global i32 0
define i32 @_link(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i32, i32* @EMLINK
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@EMLINK = global i32 0
@errno = global i32 0
define i32 @_link(i8* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = load i32, i32* @EMLINK
store i32 %3, i32* @errno
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ strncmp(char *, char *, size_t);
void uninitvar_strncmp(char *Ct, char *S, size_t N) {
  char *ct;
  char *s;
  size_t n;
  (void)strncmp(ct, s, n);
  (void)strncmp(ct, S, N);
  (void)strncmp(Ct, s, N);
  (void)strncmp(Ct, S, n);
  (void)strncmp(Ct, S, N);
}


x86 assembly (clang, -O0):
<uninitvar_strncmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    -0x30(%rbp),%rdx
call   1030 <strncmp@plt>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncmp@plt>
mov    -0x8(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncmp@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x30(%rbp),%rdx
call   1030 <strncmp@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncmp@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_strncmp>:
ret

LLVM IR (-O0):
define void @uninitvar_strncmp(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%10 = load i8*, i8** %7
%11 = load i8*, i8** %8
%12 = load i64, i64* %9
%13 = call i32 @strncmp(i8* %10, i8* %11, i64 %12)
%14 = load i8*, i8** %7
%15 = load i8*, i8** %5
%16 = load i64, i64* %6
%17 = call i32 @strncmp(i8* %14, i8* %15, i64 %16)
%18 = load i8*, i8** %4
%19 = load i8*, i8** %8
%20 = load i64, i64* %6
%21 = call i32 @strncmp(i8* %18, i8* %19, i64 %20)
%22 = load i8*, i8** %4
%23 = load i8*, i8** %5
%24 = load i64, i64* %9
%25 = call i32 @strncmp(i8* %22, i8* %23, i64 %24)
%26 = load i8*, i8** %4
%27 = load i8*, i8** %5
%28 = load i64, i64* %6
%29 = call i32 @strncmp(i8* %26, i8* %27, i64 %28)
ret void
}

LLVM IR (-O2):
define void @uninitvar_strncmp(i8* nocapture %0, i8* nocapture %1, i64 %2) {
ret void
}
int test_imm_78uint8_reg(unsigned char val) {
  return ((val) & (0x78 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_78uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0x78,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_78uint8_reg>:
test   $0x78,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_78uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 120
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_78uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 120
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
scalar_t__ __usb_receivebyte(char *);
void usb_flush() {
  char tempbyte;
  while (__usb_receivebyte(&tempbyte))
    ;
}


x86 assembly (clang, -O0):
<usb_flush>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x1(%rbp),%rdi
call   1030 <__usb_receivebyte@plt>
cmp    $0x0,%rax
je     1130 <usb_flush+0x20>
jmp    1118 <usb_flush+0x8>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usb_flush>:
push   %rbx
sub    $0x10,%rsp
lea    0xf(%rsp),%rbx
nopw   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <__usb_receivebyte@plt>
test   %rax,%rax
jne    1120 <usb_flush+0x10>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @usb_flush() {
%1 = alloca i8
br label %2
2: ; preds = %5, %0
%3 = call i64 @__usb_receivebyte(i8* %1)
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %2
br label %2
6: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @usb_flush() {
%1 = alloca i8
br label %2
2: ; preds = %2, %0
%3 = call i64 @__usb_receivebyte(i8* %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %2
5: ; preds = %2
ret void
}
void hoedown_version(int *major, int *minor, int *revision, int *extras) {
  *major = 3;
  *minor = 0;
  *revision = 7;
  *extras = 3;
}


x86 assembly (clang, -O0):
<hoedown_version>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x3,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x18(%rbp),%rax
movl   $0x7,(%rax)
mov    -0x20(%rbp),%rax
movl   $0x3,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<hoedown_version>:
movl   $0x3,(%rdi)
movl   $0x0,(%rsi)
movl   $0x7,(%rdx)
movl   $0x3,(%rcx)
ret

LLVM IR (-O0):
define void @hoedown_version(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
store i32 3, i32* %9
%10 = load i32*, i32** %6
store i32 0, i32* %10
%11 = load i32*, i32** %7
store i32 7, i32* %11
%12 = load i32*, i32** %8
store i32 3, i32* %12
ret void
}

LLVM IR (-O2):
define void @hoedown_version(i32* nocapture writeonly %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3) {
store i32 3, i32* %0
store i32 0, i32* %1
store i32 7, i32* %2
store i32 3, i32* %3
ret void
}
int qpnp_chg_get_nonstandard_state(void) {}


x86 assembly (clang, -O0):
<qpnp_chg_get_nonstandard_state>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<qpnp_chg_get_nonstandard_state>:
ret

LLVM IR (-O0):
define i32 @qpnp_chg_get_nonstandard_state() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @qpnp_chg_get_nonstandard_state() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ printline(char *, int);
char *test_read_input();
char *all_tests() {
  printline("*", 80);
  printf("Running tests\n");
  do {
    char *message = test_read_input();
    if (message)
      return message;
  } while (0);
  printline("*", 80);
  return 0;
}


x86 assembly (clang, -O0):
<all_tests>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
mov    $0x50,%esi
call   1050 <printline@plt>
lea    0xeb2(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <test_read_input@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1178 <all_tests+0x48>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1196 <all_tests+0x66>
jmp    117d <all_tests+0x4d>
lea    0xe7c(%rip),%rdi
mov    $0x50,%esi
call   1050 <printline@plt>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<all_tests>:
push   %rbx
lea    0xec8(%rip),%rdi
mov    $0x50,%esi
call   1050 <printline@plt>
lea    0xeb9(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <test_read_input@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    116e <all_tests+0x3e>
lea    0xe9c(%rip),%rdi
mov    $0x50,%esi
call   1050 <printline@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"*\00"
@.str.1 = [15 x i8] c"Running tests\0A\00"
define i8* @all_tests() {
%1 = alloca i8*
%2 = alloca i8*
%3 = call i32 @printline(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 80)
%4 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
br label %5
5: ; preds = %0
%6 = call i8* (...) @test_read_input()
store i8* %6, i8** %2
%7 = load i8*, i8** %2
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %11
9: ; preds = %5
%10 = load i8*, i8** %2
store i8* %10, i8** %1
br label %14
11: ; preds = %5
br label %12
12: ; preds = %11
%13 = call i32 @printline(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 80)
store i8* null, i8** %1
br label %14
14: ; preds = %12, %9
%15 = load i8*, i8** %1
ret i8* %15
}

LLVM IR (-O2):
@.str = [2 x i8] c"*\00"
@str = [14 x i8] c"Running tests\00"
define i8* @all_tests() {
%1 = tail call i32 @printline(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 80)
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
%3 = tail call i8* (...) @test_read_input()
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = tail call i32 @printline(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 80)
br label %7
7: ; preds = %0, %5
ret i8* %3
}
/* Variables and functions */
unsigned int _readfsbase_u32();
unsigned int __attribute__((__target__("fsgsbase"))) readfsbase_u32_wrap(void) {
  return _readfsbase_u32();
}


x86 assembly (clang, -O0):
<readfsbase_u32_wrap>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_readfsbase_u32@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<readfsbase_u32_wrap>:
xor    %eax,%eax
jmp    1030 <_readfsbase_u32@plt>

LLVM IR (-O0):
define i32 @readfsbase_u32_wrap() {
%1 = call i32 (...) @_readfsbase_u32()
ret i32 %1
}

LLVM IR (-O2):
define i32 @readfsbase_u32_wrap() {
%1 = tail call i32 (...) @_readfsbase_u32()
ret i32 %1
}
int iSign(const int number) {
  if (number >= 0) {
    return 1;
  } else {
    return -1;
  }
}


x86 assembly (clang, -O0):
<iSign>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     111d <iSign+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    1124 <iSign+0x24>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iSign>:
mov    %edi,%eax
sar    $0x1f,%eax
or     $0x1,%eax
ret

LLVM IR (-O0):
define i32 @iSign(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %8
7: ; preds = %1
store i32 -1, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @iSign(i32 %0) {
%2 = icmp sgt i32 %0, -1
%3 = select i1 %2, i32 1, i32 -1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0xfd() {
  Assert_real((isodigit(253) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              1270, ("isodigit should be 0 for 0xfd"));
}


x86 assembly (clang, -O0):
<t_isodigit_0xfd>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfd,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4f6,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0xfd>:
push   %rax
mov    $0xfd,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x4f6,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0xfd\00"
define void @t_isodigit_0xfd() {
%1 = call i64 @isodigit(i32 253)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1270, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0xfd\00"
define void @t_isodigit_0xfd() {
%1 = tail call i64 @isodigit(i32 253)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1270, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}