xunge/DecIR huggingface dataset:
/* Variables and functions */
int strlen(char *);
int /*<<< orphan*/ ungetch(char);
void ungets(char s[]) {
  for (int i = strlen(s) - 1; i >= 0; i--)
    ungetch(s[i]);
}


x86 assembly (clang, -O0):
<ungets>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jl     1164 <ungets+0x44>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1040 <ungetch@plt>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    113b <ungets+0x1b>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ungets>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <strlen@plt>
test   %eax,%eax
jle    1157 <ungets+0x37>
mov    %eax,%ebx
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
lea    -0x2(%rbx),%eax
movsbl (%r14,%rax,1),%edi
call   1040 <ungetch@plt>
add    $0xffffffffffffffff,%rbx
cmp    $0x1,%rbx
ja     1140 <ungets+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @ungets(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = sub nsw i32 %5, 1
store i32 %6, i32* %3
br label %7
7: ; preds = %17, %1
%8 = load i32, i32* %3
%9 = icmp sge i32 %8, 0
br i1 %9, label %10, label %20
10: ; preds = %7
%11 = load i8*, i8** %2
%12 = load i32, i32* %3
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i8, i8* %14
%16 = call i32 @ungetch(i8 signext %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %3
%19 = add nsw i32 %18, -1
store i32 %19, i32* %3
br label %7
20: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @ungets(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = zext i32 %2 to i64
br label %7
6: ; preds = %7, %1
ret void
7: ; preds = %4, %7
%8 = phi i64 [ %5, %4 ], [ %9, %7 ]
%9 = add nsw i64 %8, -1
%10 = and i64 %9, 4294967295
%11 = getelementptr inbounds i8, i8* %0, i64 %10
%12 = load i8, i8* %11
%13 = tail call i32 @ungetch(i8 signext %12)
%14 = icmp ugt i64 %8, 1
br i1 %14, label %7, label %6
}
/* Variables and functions */
int /*<<< orphan*/ put32(unsigned int);
int /*<<< orphan*/ put8(unsigned int);
void or_m32_reg32(unsigned int *m32, unsigned int reg32) {
  put8(0x09);
  put8((reg32 << 3) | 5);
  put32((unsigned int)(m32));
}


x86 assembly (clang, -O0):
<or_m32_reg32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x9,%edi
call   1030 <put8@plt>
mov    -0xc(%rbp),%edi
shl    $0x3,%edi
or     $0x5,%edi
call   1030 <put8@plt>
mov    -0x8(%rbp),%rax
mov    %eax,%edi
call   1040 <put32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<or_m32_reg32>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
mov    $0x9,%edi
call   1030 <put8@plt>
lea    0x5(,%rbx,8),%edi
call   1030 <put8@plt>
mov    %r14d,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <put32@plt>

LLVM IR (-O0):
define void @or_m32_reg32(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = call i32 @put8(i32 9)
%6 = load i32, i32* %4
%7 = shl i32 %6, 3
%8 = or i32 %7, 5
%9 = call i32 @put8(i32 %8)
%10 = load i32*, i32** %3
%11 = ptrtoint i32* %10 to i32
%12 = call i32 @put32(i32 %11)
ret void
}

LLVM IR (-O2):
define void @or_m32_reg32(i32* %0, i32 %1) {
%3 = tail call i32 @put8(i32 9)
%4 = shl i32 %1, 3
%5 = or i32 %4, 5
%6 = tail call i32 @put8(i32 %5)
%7 = ptrtoint i32* %0 to i64
%8 = trunc i64 %7 to i32
%9 = tail call i32 @put32(i32 %8)
ret void
}
int main(void) {
  int foo, bar, foobar;
  foobar = foo + bar;
  foobar = foo + bar;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = add nsw i32 %5, %6
store i32 %7, i32* %4
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = add nsw i32 %8, %9
store i32 %10, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ decode(int *, int *, int *);
int /*<<< orphan*/ printf(char *, int, int, int);
void main() {
  int a = 1;
  int b = 2;
  int c = 3;
  decode(&a, &b, &c);
  printf("a = %d, b = %d, c = %d\n", a, b, c);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
movl   $0x3,-0xc(%rbp)
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1040 <decode@plt>
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
lea    0xea2(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movl   $0x1,0x14(%rsp)
movl   $0x2,0x10(%rsp)
movl   $0x3,0xc(%rsp)
lea    0x14(%rsp),%rdi
lea    0x10(%rsp),%rsi
lea    0xc(%rsp),%rdx
call   1040 <decode@plt>
mov    0x14(%rsp),%esi
mov    0x10(%rsp),%edx
mov    0xc(%rsp),%ecx
lea    0xe9d(%rip),%rdi
call   1030 <printf@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [24 x i8] c"a = %d, b = %d, c = %d\0A\00"
define void @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 1, i32* %1
store i32 2, i32* %2
store i32 3, i32* %3
%4 = call i32 @decode(i32* %1, i32* %2, i32* %3)
%5 = load i32, i32* %1
%6 = load i32, i32* %2
%7 = load i32, i32* %3
%8 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6, i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"a = %d, b = %d, c = %d\0A\00"
define void @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = bitcast i32* %1 to i8*
store i32 1, i32* %1
%5 = bitcast i32* %2 to i8*
store i32 2, i32* %2
%6 = bitcast i32* %3 to i8*
store i32 3, i32* %3
%7 = call i32 @decode(i32* %1, i32* %2, i32* %3)
%8 = load i32, i32* %1
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %8, i32 %9, i32 %10)
ret void
}
void csv_disp_bar(double perct) {}


x86 assembly (clang, -O0):
<csv_disp_bar>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<csv_disp_bar>:
ret

LLVM IR (-O0):
define void @csv_disp_bar(double %0) {
%2 = alloca double
store double %0, double* %2
ret void
}

LLVM IR (-O2):
define void @csv_disp_bar(double %0) {
ret void
}
void ixp2000_reg_wrb(volatile void *reg, unsigned long val) {
  *((volatile unsigned long *)reg) = val;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @ixp2000_reg_wrb(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i64*
store volatile i64 %5, i64* %7
ret void
}

LLVM IR (-O2):
define void @ixp2000_reg_wrb(i8* %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store volatile i64 %1, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
int /*<<< orphan*/ my_hold2(int /*<<< orphan*/, int /*<<< orphan*/, int *);
int *my_malloc(int);
void af2d() {
  int *p = my_malloc(12);
  free(p);
  my_hold2(0, 0, p);
}


x86 assembly (clang, -O0):
<af2d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xc,%edi
call   1040 <my_malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rdx
xor    %esi,%esi
mov    %esi,%edi
call   1050 <my_hold2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<af2d>:
push   %rbx
mov    $0xc,%edi
call   1040 <my_malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1030 <free@plt>
xor    %edi,%edi
xor    %esi,%esi
mov    %rbx,%rdx
pop    %rbx
jmp    1050 <my_hold2@plt>

LLVM IR (-O0):
define void @af2d() {
%1 = alloca i32*
%2 = call i32* @my_malloc(i32 12)
store i32* %2, i32** %1
%3 = load i32*, i32** %1
%4 = call i32 @free(i32* %3)
%5 = load i32*, i32** %1
%6 = call i32 @my_hold2(i32 0, i32 0, i32* %5)
ret void
}

LLVM IR (-O2):
define void @af2d() {
%1 = tail call i32* @my_malloc(i32 12)
%2 = tail call i32 @free(i32* %1)
%3 = tail call i32 @my_hold2(i32 0, i32 0, i32* %1)
ret void
}
int test_imm_28uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x28 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_28uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x28,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_28uint64_lowword_reg>:
test   $0x28,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_28uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 40
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_28uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 40
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ write_uint8(int /*<<< orphan*/ *, unsigned short);
void write_uint16(FILE *f, unsigned short i) {
  write_uint8(f, i >> 8);
  write_uint8(f, i);
}


x86 assembly (clang, -O0):
<write_uint16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
movzwl -0xa(%rbp),%eax
sar    $0x8,%eax
movzwl %ax,%esi
call   1030 <write_uint8@plt>
mov    -0x8(%rbp),%rdi
movzwl -0xa(%rbp),%esi
call   1030 <write_uint8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_uint16>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
shr    $0x8,%esi
call   1030 <write_uint8@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <write_uint8@plt>

LLVM IR (-O0):
define void @write_uint16(i32* %0, i16 zeroext %1) {
%3 = alloca i32*
%4 = alloca i16
store i32* %0, i32** %3
store i16 %1, i16* %4
%5 = load i32*, i32** %3
%6 = load i16, i16* %4
%7 = zext i16 %6 to i32
%8 = ashr i32 %7, 8
%9 = trunc i32 %8 to i16
%10 = call i32 @write_uint8(i32* %5, i16 zeroext %9)
%11 = load i32*, i32** %3
%12 = load i16, i16* %4
%13 = call i32 @write_uint8(i32* %11, i16 zeroext %12)
ret void
}

LLVM IR (-O2):
define void @write_uint16(i32* %0, i16 zeroext %1) {
%3 = lshr i16 %1, 8
%4 = tail call i32 @write_uint8(i32* %0, i16 zeroext %3)
%5 = tail call i32 @write_uint8(i32* %0, i16 zeroext %1)
ret void
}
/* Type definitions */
struct bufferevent {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ bufferevent_get_input(struct bufferevent *);
int /*<<< orphan*/ evbuffer_drain(int /*<<< orphan*/, int);
void discard_readcb(struct bufferevent *bev, void *arg) {
  evbuffer_drain(bufferevent_get_input(bev), -1);
}


x86 assembly (clang, -O0):
<discard_readcb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <bufferevent_get_input@plt>
mov    %eax,%edi
mov    $0xffffffff,%esi
call   1040 <evbuffer_drain@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<discard_readcb>:
push   %rax
call   1030 <bufferevent_get_input@plt>
mov    %eax,%edi
mov    $0xffffffff,%esi
pop    %rax
jmp    1040 <evbuffer_drain@plt>

LLVM IR (-O0):
%struct.bufferevent = type { i32 }
define void @discard_readcb(%struct.bufferevent* %0, i8* %1) {
%3 = alloca %struct.bufferevent*
%4 = alloca i8*
store %struct.bufferevent* %0, %struct.bufferevent** %3
store i8* %1, i8** %4
%5 = load %struct.bufferevent*, %struct.bufferevent** %3
%6 = call i32 @bufferevent_get_input(%struct.bufferevent* %5)
%7 = call i32 @evbuffer_drain(i32 %6, i32 -1)
ret void
}

LLVM IR (-O2):
%struct.bufferevent = type { i32 }
define void @discard_readcb(%struct.bufferevent* %0, i8* nocapture readnone %1) {
%3 = tail call i32 @bufferevent_get_input(%struct.bufferevent* %0)
%4 = tail call i32 @evbuffer_drain(i32 %3, i32 -1)
ret void
}
/* Variables and functions */
int f(int);
int j(int i) { return 2 * f(i); }


x86 assembly (clang, -O0):
<j>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <f@plt>
shl    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<j>:
push   %rax
call   1030 <f@plt>
add    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @j(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @f(i32 %3)
%5 = mul nsw i32 2, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @j(i32 %0) {
%2 = tail call i32 @f(i32 %0)
%3 = shl nsw i32 %2, 1
ret i32 %3
}
int test_any_LSB_zero(unsigned x) {
  unsigned char LSB = (unsigned char)x;
  unsigned char allones = (unsigned char)~0;
  return (LSB != allones);
}


x86 assembly (clang, -O0):
<test_any_LSB_zero>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %al,-0x5(%rbp)
movb   $0xff,-0x6(%rbp)
movzbl -0x5(%rbp),%eax
movzbl -0x6(%rbp),%ecx
cmp    %ecx,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_any_LSB_zero>:
xor    %eax,%eax
cmp    $0xff,%dil
setne  %al
ret

LLVM IR (-O0):
define i32 @test_any_LSB_zero(i32 %0) {
%2 = alloca i32
%3 = alloca i8
%4 = alloca i8
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = trunc i32 %5 to i8
store i8 %6, i8* %3
store i8 -1, i8* %4
%7 = load i8, i8* %3
%8 = zext i8 %7 to i32
%9 = load i8, i8* %4
%10 = zext i8 %9 to i32
%11 = icmp ne i32 %8, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @test_any_LSB_zero(i32 %0) {
%2 = and i32 %0, 255
%3 = icmp ne i32 %2, 255
%4 = zext i1 %3 to i32
ret i32 %4
}
void sdhost_add_debugfs(struct sdhost_host *host) {}


x86 assembly (clang, -O0):
<sdhost_add_debugfs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sdhost_add_debugfs>:
ret

LLVM IR (-O0):
%struct.sdhost_host = type opaque
define void @sdhost_add_debugfs(%struct.sdhost_host* %0) {
%2 = alloca %struct.sdhost_host*
store %struct.sdhost_host* %0, %struct.sdhost_host** %2
ret void
}

LLVM IR (-O2):
%struct.sdhost_host = type opaque
define void @sdhost_add_debugfs(%struct.sdhost_host* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, ...);
void show_version(void) {
  printf("FIRESTARTER - A Processor Stress Test Utility, Version %i.%i\n", 1,
         2);
  printf("Copyright (C) %i TU Dresden, Center for Information Services and "
         "High Performance Computing\n",
         2014);
}


x86 assembly (clang, -O0):
<show_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x1,%esi
mov    $0x2,%edx
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xf0b(%rip),%rdi
mov    $0x7de,%esi
mov    $0x0,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_version>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1,%esi
mov    $0x2,%edx
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xf0e(%rip),%rdi
mov    $0x7de,%esi
xor    %eax,%eax
pop    %rcx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [62 x i8] c"FIRESTARTER - A Processor Stress Test Utility, Version %i.%i\0A\00"
@.str.1 = [93 x i8] c"Copyright (C) %i TU Dresden, Center for Information Services and High Performance Computing\0A\00"
define void @show_version() {
%1 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0), i32 1, i32 2)
%2 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([93 x i8], [93 x i8]* @.str.1, i64 0, i64 0), i32 2014)
ret void
}

LLVM IR (-O2):
@.str = [62 x i8] c"FIRESTARTER - A Processor Stress Test Utility, Version %i.%i\0A\00"
@.str.1 = [93 x i8] c"Copyright (C) %i TU Dresden, Center for Information Services and High Performance Computing\0A\00"
define void @show_version() {
%1 = tail call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0), i32 1, i32 2)
%2 = tail call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([93 x i8], [93 x i8]* @.str.1, i64 0, i64 0), i32 2014)
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef unsigned int uint16_t;

/* Variables and functions */
uint16_t read16le(const uint8_t *buf) {
  uint16_t ret = 0;
  for (unsigned i = 0; i < 16 / 8; ++i)
    ret |= (uint16_t)buf[i] << (i * 8);
  return ret;
}


x86 assembly (clang, -O0):
<read16le>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x2,-0x10(%rbp)
jae    1147 <read16le+0x47>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%ecx
mov    (%rax,%rcx,8),%rax
mov    -0x10(%rbp),%ecx
shl    $0x3,%ecx
shl    %cl,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1116 <read16le+0x16>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read16le>:
mov    0x8(%rdi),%eax
shl    $0x8,%eax
or     (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @read16le(i64* %0) {
%2 = alloca i64*
%3 = alloca i32
%4 = alloca i32
store i64* %0, i64** %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %20, %1
%6 = load i32, i32* %4
%7 = icmp ult i32 %6, 2
br i1 %7, label %8, label %23
8: ; preds = %5
%9 = load i64*, i64** %2
%10 = load i32, i32* %4
%11 = zext i32 %10 to i64
%12 = getelementptr inbounds i64, i64* %9, i64 %11
%13 = load i64, i64* %12
%14 = trunc i64 %13 to i32
%15 = load i32, i32* %4
%16 = mul i32 %15, 8
%17 = shl i32 %14, %16
%18 = load i32, i32* %3
%19 = or i32 %18, %17
store i32 %19, i32* %3
br label %20
20: ; preds = %8
%21 = load i32, i32* %4
%22 = add i32 %21, 1
store i32 %22, i32* %4
br label %5
23: ; preds = %5
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @read16le(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = trunc i64 %2 to i32
%4 = getelementptr inbounds i64, i64* %0, i64 1
%5 = load i64, i64* %4
%6 = trunc i64 %5 to i32
%7 = shl i32 %6, 8
%8 = or i32 %7, %3
ret i32 %8
}
int XDefaultDepthOfScreen() {}


x86 assembly (clang, -O0):
<XDefaultDepthOfScreen>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XDefaultDepthOfScreen>:
ret

LLVM IR (-O0):
define i32 @XDefaultDepthOfScreen() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @XDefaultDepthOfScreen() {
ret i32 undef
}
mul(a) { return 85 * a; }


x86 assembly (clang, -O0):
<mul>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0x55,-0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mul>:
imul   $0x55,%edi,%eax
ret

LLVM IR (-O0):
define i32 @mul(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 85, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @mul(i32 %0) {
%2 = mul nsw i32 %0, 85
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_help(void) {
  printf("Usage: tst_random <value1> [value2]\n");
  printf("       Generated random will be between value1 and value2.\n");
  printf("       If only value1 is specified, value2 will treated as 0.\n");
}


x86 assembly (clang, -O0):
<print_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xefe(%rip),%rdi
call   1030 <printf@plt>
lea    0xf2e(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_help>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf00(%rip),%rdi
call   1030 <puts@plt>
lea    0xf2f(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"Usage: tst_random <value1> [value2]\0A\00"
@.str.1 = [60 x i8] c" Generated random will be between value1 and value2.\0A\00"
@.str.2 = [63 x i8] c" If only value1 is specified, value2 will treated as 0.\0A\00"
define void @print_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [36 x i8] c"Usage: tst_random <value1> [value2]\00"
@str.3 = [59 x i8] c" Generated random will be between value1 and value2.\00"
@str.4 = [62 x i8] c" If only value1 is specified, value2 will treated as 0.\00"
define void @print_help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([59 x i8], [59 x i8]* @str.3, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([62 x i8], [62 x i8]* @str.4, i64 0, i64 0))
ret void
}
void rq_sched_info_dequeue(struct rq *rq, unsigned long long delta) {}


x86 assembly (clang, -O0):
<rq_sched_info_dequeue>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rq_sched_info_dequeue>:
ret

LLVM IR (-O0):
%struct.rq = type opaque
define void @rq_sched_info_dequeue(%struct.rq* %0, i64 %1) {
%3 = alloca %struct.rq*
%4 = alloca i64
store %struct.rq* %0, %struct.rq** %3
store i64 %1, i64* %4
ret void
}

LLVM IR (-O2):
%struct.rq = type opaque
define void @rq_sched_info_dequeue(%struct.rq* nocapture %0, i64 %1) {
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ atom;
};
struct TYPE_4__ {
  TYPE_1__ xproperty;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
unsigned long get_XEvent_xproperty_atom(void *_p) {
  return (unsigned long)((XEvent *)_p)->xproperty.atom;
}


x86 assembly (clang, -O0):
<get_XEvent_xproperty_atom>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xproperty_atom>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i64 @get_XEvent_xproperty_atom(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @get_XEvent_xproperty_atom(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
void map_normal() { (*(unsigned int *)(0x40048000)) = 2; }


x86 assembly (clang, -O0):
<map_normal>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40048000,%eax
movl   $0x2,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<map_normal>:
movl   $0x2,0x40048000
ret

LLVM IR (-O0):
define void @map_normal() {
store i32 2, i32* inttoptr (i64 1074036736 to i32*)
ret void
}

LLVM IR (-O2):
define void @map_normal() {
store i32 2, i32* inttoptr (i64 1074036736 to i32*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ atoi(char *);
int power3(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char *argv[]) {
  printf("power3() = %d\n", power3(atoi(argv[1])));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <atoi@plt>
mov    %eax,%edi
call   1050 <power3@plt>
mov    %eax,%esi
lea    0xe9d(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rdi
call   1040 <atoi@plt>
mov    %eax,%edi
call   1050 <power3@plt>
lea    0xeb8(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"power3() = %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %5
%7 = getelementptr inbounds i8*, i8** %6, i64 1
%8 = load i8*, i8** %7
%9 = call i32 @atoi(i8* %8)
%10 = call i32 @power3(i32 %9)
%11 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c"power3() = %d\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @atoi(i8* %4)
%6 = tail call i32 @power3(i32 %5)
%7 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}
/* Variables and functions */
char *_agstrcanon(char *, char *);
char *agcanonhtmlstr(char *, char *);
char *getoutputbuffer(char *);
char *agcanon(char *str, int html) {
  char *buf = getoutputbuffer(str);
  if (html)
    return agcanonhtmlstr(str, buf);
  else
    return _agstrcanon(str, buf);
}


x86 assembly (clang, -O0):
<agcanon>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <getoutputbuffer@plt>
mov    %rax,-0x20(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     116c <agcanon+0x3c>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1050 <agcanonhtmlstr@plt>
mov    %rax,-0x8(%rbp)
jmp    117d <agcanon+0x4d>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <_agstrcanon@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<agcanon>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1040 <getoutputbuffer@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
add    $0x8,%rsp
test   %ebp,%ebp
je     1152 <agcanon+0x22>
pop    %rbx
pop    %rbp
jmp    1050 <agcanonhtmlstr@plt>
pop    %rbx
pop    %rbp
jmp    1030 <_agstrcanon@plt>

LLVM IR (-O0):
define i8* @agcanon(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i8*, i8** %4
%8 = call i8* @getoutputbuffer(i8* %7)
store i8* %8, i8** %6
%9 = load i32, i32* %5
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i8*, i8** %4
%13 = load i8*, i8** %6
%14 = call i8* @agcanonhtmlstr(i8* %12, i8* %13)
store i8* %14, i8** %3
br label %19
15: ; preds = %2
%16 = load i8*, i8** %4
%17 = load i8*, i8** %6
%18 = call i8* @_agstrcanon(i8* %16, i8* %17)
store i8* %18, i8** %3
br label %19
19: ; preds = %15, %11
%20 = load i8*, i8** %3
ret i8* %20
}

LLVM IR (-O2):
define i8* @agcanon(i8* %0, i32 %1) {
%3 = tail call i8* @getoutputbuffer(i8* %0)
%4 = icmp eq i32 %1, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i8* @agcanonhtmlstr(i8* %0, i8* %3)
br label %9
7: ; preds = %2
%8 = tail call i8* @_agstrcanon(i8* %0, i8* %3)
br label %9
9: ; preds = %7, %5
%10 = phi i8* [ %6, %5 ], [ %8, %7 ]
ret i8* %10
}
int test_imm_87uint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0x87 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_87uint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0x87,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_87uint64_highword_reg>:
movabs $0x8700000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_87uint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 135
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_87uint64_highword_reg(i64 %0) {
%2 = and i64 %0, 579820584960
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void gtk_icon_info_get_base_size() {}


x86 assembly (clang, -O0):
<gtk_icon_info_get_base_size>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_icon_info_get_base_size>:
ret

LLVM IR (-O0):
define void @gtk_icon_info_get_base_size() {
ret void
}

LLVM IR (-O2):
define void @gtk_icon_info_get_base_size() {
ret void
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int x = __VERIFIER_nondet_int();
  int y = __VERIFIER_nondet_int();
  while (x > 0) {
    x = x - 2 * y;
    y++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1159 <main+0x49>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    $0x1,%ecx
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1133 <main+0x23>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %4, i32* %2
%5 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %5, i32* %3
br label %6
6: ; preds = %9, %0
%7 = load i32, i32* %2
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %16
9: ; preds = %6
%10 = load i32, i32* %2
%11 = load i32, i32* %3
%12 = mul nsw i32 2, %11
%13 = sub nsw i32 %10, %12
store i32 %13, i32* %2
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %6
16: ; preds = %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ tst_resm(int, char *);
void func_gval(int rval) {
  if (rval == 1) {
    tst_resm(0, "semaphore value is correct");
  } else {
    tst_resm(1, "semaphore value is not correct");
  }
}


x86 assembly (clang, -O0):
<func_gval>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jne    1138 <func_gval+0x28>
xor    %edi,%edi
lea    0xed2(%rip),%rsi
call   1030 <tst_resm@plt>
jmp    1149 <func_gval+0x39>
mov    $0x1,%edi
lea    0xed7(%rip),%rsi
call   1030 <tst_resm@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_gval>:
cmp    $0x1,%edi
jne    1123 <func_gval+0x13>
lea    0xee4(%rip),%rsi
xor    %edi,%edi
jmp    1030 <tst_resm@plt>
lea    0xef1(%rip),%rsi
mov    $0x1,%edi
jmp    1030 <tst_resm@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"semaphore value is correct\00"
@.str.1 = [31 x i8] c"semaphore value is not correct\00"
define void @func_gval(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @tst_resm(i32 0, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
br label %9
7: ; preds = %1
%8 = call i32 @tst_resm(i32 1, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.1, i64 0, i64 0))
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"semaphore value is correct\00"
@.str.1 = [31 x i8] c"semaphore value is not correct\00"
define void @func_gval(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @tst_resm(i32 0, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
br label %7
5: ; preds = %1
%6 = tail call i32 @tst_resm(i32 1, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.1, i64 0, i64 0))
br label %7
7: ; preds = %5, %3
ret void
}
unsigned int divisao(unsigned int x, unsigned int y) { return x / y; }


x86 assembly (clang, -O0):
<divisao>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    %edx,%edx
divl   -0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<divisao>:
mov    %edi,%eax
xor    %edx,%edx
div    %esi
ret

LLVM IR (-O0):
define i32 @divisao(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = udiv i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @divisao(i32 %0, i32 %1) {
%3 = udiv i32 %0, %1
ret i32 %3
}
int IsValidOperation(char operation) {
  return operation == '+' || operation == '-' || operation == '*' ||
         operation == '/';
}


x86 assembly (clang, -O0):
<IsValidOperation>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2b,%ecx
mov    %al,-0x2(%rbp)
je     114d <IsValidOperation+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2d,%ecx
mov    %al,-0x2(%rbp)
je     114d <IsValidOperation+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2a,%ecx
mov    %al,-0x2(%rbp)
je     114d <IsValidOperation+0x4d>
movsbl -0x1(%rbp),%eax
cmp    $0x2f,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IsValidOperation>:
cmp    $0x2d,%dil
ja     1120 <IsValidOperation+0x20>
mov    $0x1,%eax
movzbl %dil,%ecx
movabs $0x2c0000000000,%rdx
bt     %rcx,%rdx
jae    1120 <IsValidOperation+0x20>
ret
xor    %eax,%eax
cmp    $0x2f,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @IsValidOperation(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 43
br i1 %5, label %18, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 45
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 42
br i1 %13, label %18, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 47
br label %18
18: ; preds = %14, %10, %6, %1
%19 = phi i1 [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %17, %14 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @IsValidOperation(i8 signext %0) {
switch i8 %0, label %2 [
i8 45, label %5
i8 43, label %5
i8 42, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 47
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Type definitions */
typedef char wchar_t;

/* Variables and functions */
int /*<<< orphan*/ wprintf(char const *, ...);
void uninitvar_wprintf(wchar_t *format, int input) {
  const wchar_t *f;
  int i;
  (void)wprintf(f, i);
  (void)wprintf(f);
  (void)wprintf(f, input);
  (void)wprintf(format, i);
  (void)wprintf(format, input);
  (void)wprintf(format);
}


x86 assembly (clang, -O0):
<uninitvar_wprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x1c(%rbp),%esi
mov    $0x0,%al
call   1030 <wprintf@plt>
mov    -0x18(%rbp),%rdi
mov    $0x0,%al
call   1030 <wprintf@plt>
mov    -0x18(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    $0x0,%al
call   1030 <wprintf@plt>
mov    -0x8(%rbp),%rdi
mov    -0x1c(%rbp),%esi
mov    $0x0,%al
call   1030 <wprintf@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    $0x0,%al
call   1030 <wprintf@plt>
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <wprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_wprintf>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <wprintf@plt>
xor    %eax,%eax
call   1030 <wprintf@plt>
mov    %ebp,%esi
xor    %eax,%eax
call   1030 <wprintf@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <wprintf@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
xor    %eax,%eax
call   1030 <wprintf@plt>
mov    %rbx,%rdi
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <wprintf@plt>

LLVM IR (-O0):
define void @uninitvar_wprintf(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i8*, i8** %5
%8 = load i32, i32* %6
%9 = call i32 (i8*, ...) @wprintf(i8* %7, i32 %8)
%10 = load i8*, i8** %5
%11 = call i32 (i8*, ...) @wprintf(i8* %10)
%12 = load i8*, i8** %5
%13 = load i32, i32* %4
%14 = call i32 (i8*, ...) @wprintf(i8* %12, i32 %13)
%15 = load i8*, i8** %3
%16 = load i32, i32* %6
%17 = call i32 (i8*, ...) @wprintf(i8* %15, i32 %16)
%18 = load i8*, i8** %3
%19 = load i32, i32* %4
%20 = call i32 (i8*, ...) @wprintf(i8* %18, i32 %19)
%21 = load i8*, i8** %3
%22 = call i32 (i8*, ...) @wprintf(i8* %21)
ret void
}

LLVM IR (-O2):
define void @uninitvar_wprintf(i8* %0, i32 %1) {
%3 = tail call i32 (i8*, ...) @wprintf(i8* undef, i32 undef)
%4 = tail call i32 (i8*, ...) @wprintf(i8* undef)
%5 = tail call i32 (i8*, ...) @wprintf(i8* undef, i32 %1)
%6 = tail call i32 (i8*, ...) @wprintf(i8* %0, i32 undef)
%7 = tail call i32 (i8*, ...) @wprintf(i8* %0, i32 %1)
%8 = tail call i32 (i8*, ...) @wprintf(i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128d;

/* Variables and functions */
int /*<<< orphan*/ _mm_cmpnlt_pd(int /*<<< orphan*/, int /*<<< orphan*/);
__m128d test_mm_cmpnlt_pd(__m128d __a, __m128d __b) {
  return _mm_cmpnlt_pd(__a, __b);
}


x86 assembly (clang, -O0):
<test_mm_cmpnlt_pd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_cmpnlt_pd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cmpnlt_pd>:
jmp    1030 <_mm_cmpnlt_pd@plt>

LLVM IR (-O0):
define i32 @test_mm_cmpnlt_pd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_cmpnlt_pd(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_cmpnlt_pd(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmpnlt_pd(i32 %0, i32 %1)
ret i32 %3
}
void INT_Excep_SCI10_TEI10(void) {}


x86 assembly (clang, -O0):
<INT_Excep_SCI10_TEI10>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_SCI10_TEI10>:
ret

LLVM IR (-O0):
define void @INT_Excep_SCI10_TEI10() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_SCI10_TEI10() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isascii(int);
void t_isascii_0xa3() {
  Assert_real((isascii(163) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              820, ("isascii should be 0 for 0xa3"));
}


x86 assembly (clang, -O0):
<t_isascii_0xa3>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa3,%edi
call   1030 <isascii@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x334,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0xa3>:
push   %rax
mov    $0xa3,%edi
call   1030 <isascii@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x334,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xa3\00"
define void @t_isascii_0xa3() {
%1 = call i64 @isascii(i32 163)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 820, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xa3\00"
define void @t_isascii_0xa3() {
%1 = tail call i64 @isascii(i32 163)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 820, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ core_util_critical_section_exit();
void wsf_mbed_os_critical_section_exit(void) {
  core_util_critical_section_exit();
}


x86 assembly (clang, -O0):
<wsf_mbed_os_critical_section_exit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <core_util_critical_section_exit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wsf_mbed_os_critical_section_exit>:
xor    %eax,%eax
jmp    1030 <core_util_critical_section_exit@plt>

LLVM IR (-O0):
define void @wsf_mbed_os_critical_section_exit() {
%1 = call i32 (...) @core_util_critical_section_exit()
ret void
}

LLVM IR (-O2):
define void @wsf_mbed_os_critical_section_exit() {
%1 = tail call i32 (...) @core_util_critical_section_exit()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
int /*<<< orphan*/ puts_nonl(char const *);
int puts(const char *buf) {
  puts_nonl(buf);
  putchar('\n');
  return 0;
}


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <puts_nonl@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
push   %rax
call   1040 <puts_nonl@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @puts_nonl(i8* %3)
%5 = call i32 @putchar(i8 signext 10)
ret i32 0
}

LLVM IR (-O2):
define i32 @puts(i8* %0) {
%2 = tail call i32 @puts_nonl(i8* %0)
%3 = tail call i32 @putchar(i8 signext 10)
ret i32 0
}
int bit_mask(int bit) { return (1 << ((bit)&7)); }


x86 assembly (clang, -O0):
<bit_mask>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
and    $0x7,%ecx
mov    $0x1,%eax
shl    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit_mask>:
mov    %edi,%ecx
and    $0x7,%cl
mov    $0x1,%eax
shl    %cl,%eax
ret

LLVM IR (-O0):
define i32 @bit_mask(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 7
%5 = shl i32 1, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @bit_mask(i32 %0) {
%2 = and i32 %0, 7
%3 = shl nuw nsw i32 1, %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void penDown() { printf("\033[10000;1H"); }


x86 assembly (clang, -O0):
<penDown>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<penDown>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"\1B[10000;1H\00"
define void @penDown() {
%1 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"\1B[10000;1H\00"
define void @penDown() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}
int armPortClose(void *port) { return 0; }


x86 assembly (clang, -O0):
<armPortClose>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<armPortClose>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @armPortClose(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @armPortClose(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
size_t BRBIP32ParseMasterPrivKey(void *seed, size_t seedLen, const char *str) {
  return 0;
}


x86 assembly (clang, -O0):
<BRBIP32ParseMasterPrivKey>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BRBIP32ParseMasterPrivKey>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @BRBIP32ParseMasterPrivKey(i8* %0, i64 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i8* %2, i8** %6
ret i64 0
}

LLVM IR (-O2):
define i64 @BRBIP32ParseMasterPrivKey(i8* nocapture readnone %0, i64 %1, i8* nocapture readnone %2) {
ret i64 0
}
int test_imm_6Aint64_highword_reg(long long val) {
  return ((val >> 32) & (0x6A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Aint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0x6a,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Aint64_highword_reg>:
movabs $0x6a00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Aint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 106
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_6Aint64_highword_reg(i64 %0) {
%2 = and i64 %0, 455266533376
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int /*<<< orphan*/ g(int);
int main() {
  int x = __VERIFIER_nondet_int();
  g(x);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <g@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,%edi
call   1040 <g@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @g(i32 %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 @g(i32 %1)
ret i32 0
}