xunge/DecIR huggingface dataset:
/* Variables and functions */
int atoi(char const *);
char *om_gps_keep_on_in_suspend_path();
char *om_sysfs_readfile(char const *);
int om_gps_keep_on_in_suspend_get() {
  const char *path = om_gps_keep_on_in_suspend_path();
  if (path == NULL)
    return -1;
  const char *val = om_sysfs_readfile(path);
  if (val == NULL)
    return -1;
  return atoi(val);
}


x86 assembly (clang, -O0):
<om_gps_keep_on_in_suspend_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x0,%al
call   1040 <om_gps_keep_on_in_suspend_path@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    115a <om_gps_keep_on_in_suspend_get+0x2a>
movl   $0xffffffff,-0x4(%rbp)
jmp    118a <om_gps_keep_on_in_suspend_get+0x5a>
mov    -0x10(%rbp),%rdi
call   1030 <om_sysfs_readfile@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    117e <om_gps_keep_on_in_suspend_get+0x4e>
movl   $0xffffffff,-0x4(%rbp)
jmp    118a <om_gps_keep_on_in_suspend_get+0x5a>
mov    -0x18(%rbp),%rdi
call   1050 <atoi@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<om_gps_keep_on_in_suspend_get>:
push   %rax
xor    %eax,%eax
call   1040 <om_gps_keep_on_in_suspend_path@plt>
test   %rax,%rax
je     1153 <om_gps_keep_on_in_suspend_get+0x23>
mov    %rax,%rdi
call   1030 <om_sysfs_readfile@plt>
test   %rax,%rax
je     1153 <om_gps_keep_on_in_suspend_get+0x23>
mov    %rax,%rdi
pop    %rax
jmp    1050 <atoi@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @om_gps_keep_on_in_suspend_get() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
%4 = call i8* (...) @om_gps_keep_on_in_suspend_path()
store i8* %4, i8** %2
%5 = load i8*, i8** %2
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %0
store i32 -1, i32* %1
br label %17
8: ; preds = %0
%9 = load i8*, i8** %2
%10 = call i8* @om_sysfs_readfile(i8* %9)
store i8* %10, i8** %3
%11 = load i8*, i8** %3
%12 = icmp eq i8* %11, null
br i1 %12, label %13, label %14
13: ; preds = %8
store i32 -1, i32* %1
br label %17
14: ; preds = %8
%15 = load i8*, i8** %3
%16 = call i32 @atoi(i8* %15)
store i32 %16, i32* %1
br label %17
17: ; preds = %14, %13, %7
%18 = load i32, i32* %1
ret i32 %18
}

LLVM IR (-O2):
define i32 @om_gps_keep_on_in_suspend_get() {
%1 = tail call i8* (...) @om_gps_keep_on_in_suspend_path()
%2 = icmp eq i8* %1, null
br i1 %2, label %8, label %3
3: ; preds = %0
%4 = tail call i8* @om_sysfs_readfile(i8* %1)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @atoi(i8* %4)
br label %8
8: ; preds = %6, %3, %0
%9 = phi i32 [ -1, %0 ], [ %7, %6 ], [ -1, %3 ]
ret i32 %9
}
__attribute__((noipa, optimize("Ofast"))) int f1(float x) {
  return __builtin_sqrtf(x) < 1.17549435082228750796873653722224568e-38F;
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sqrtf@plt>
movaps %xmm0,%xmm1
movss  0xece(%rip),%xmm0
ucomiss %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
push   %rax
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     111f <f1+0xf>
sqrtss %xmm0,%xmm0
jmp    1124 <f1+0x14>
call   1030 <sqrtf@plt>
movss  0xed4(%rip),%xmm1
xor    %eax,%eax
ucomiss %xmm0,%xmm1
seta   %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @f1(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @sqrtf(float %3)
%5 = fcmp olt float %4, 0x3810000000000000
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @f1(float %0) {
%2 = tail call float @sqrtf(float %0)
%3 = fcmp olt float %2, 0x3810000000000000
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ rand_r(unsigned int *);
void randomSequence(unsigned int *seedp, int *arr, int size) {
  int i = 0;
  for (i = 0; i < size; ++i) {
    rand_r(seedp);
    arr[i] = *seedp;
  }
}


x86 assembly (clang, -O0):
<randomSequence>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1165 <randomSequence+0x55>
mov    -0x8(%rbp),%rdi
call   1030 <rand_r@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1131 <randomSequence+0x21>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randomSequence>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %edx,%edx
jle    1149 <randomSequence+0x39>
mov    %rsi,%r14
mov    %rdi,%r12
mov    %edx,%r15d
xor    %ebx,%ebx
nopw   0x0(%rax,%rax,1)
mov    %r12,%rdi
call   1030 <rand_r@plt>
mov    (%r12),%eax
mov    %eax,(%r14,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <randomSequence+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @randomSequence(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
store i32 0, i32* %7
store i32 0, i32* %7
br label %8
8: ; preds = %21, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %24
12: ; preds = %8
%13 = load i32*, i32** %4
%14 = call i32 @rand_r(i32* %13)
%15 = load i32*, i32** %4
%16 = load i32, i32* %15
%17 = load i32*, i32** %5
%18 = load i32, i32* %7
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, i32* %17, i64 %19
store i32 %16, i32* %20
br label %21
21: ; preds = %12
%22 = load i32, i32* %7
%23 = add nsw i32 %22, 1
store i32 %23, i32* %7
br label %8
24: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @randomSequence(i32* %0, i32* nocapture writeonly %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %14
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %7
7: ; preds = %5, %7
%8 = phi i64 [ 0, %5 ], [ %12, %7 ]
%9 = tail call i32 @rand_r(i32* %0)
%10 = load i32, i32* %0
%11 = getelementptr inbounds i32, i32* %1, i64 %8
store i32 %10, i32* %11
%12 = add nuw nsw i64 %8, 1
%13 = icmp eq i64 %12, %6
br i1 %13, label %14, label %7
14: ; preds = %7, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int a = 99;
  char c;
  printf("\nHello World. a = %d\n", a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x63,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xed0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x63,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"\0AHello World. a = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8
store i32 0, i32* %1
store i32 99, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [22 x i8] c"\0AHello World. a = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 99)
ret i32 0
}
int limit10(int num, int denom) {
  register int val;
  val = num / denom;
  return (val > 10 ? 10 : val);
}


x86 assembly (clang, -O0):
<limit10>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,-0xc(%rbp)
cmpl   $0xa,-0xc(%rbp)
jle    112b <limit10+0x2b>
mov    $0xa,%eax
mov    %eax,-0x10(%rbp)
jmp    1131 <limit10+0x31>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<limit10>:
mov    %edi,%eax
cltd
idiv   %esi
cmp    $0xa,%eax
mov    $0xa,%ecx
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @limit10(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = sdiv i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp sgt i32 %9, 10
br i1 %10, label %11, label %12
11: ; preds = %2
br label %14
12: ; preds = %2
%13 = load i32, i32* %5
br label %14
14: ; preds = %12, %11
%15 = phi i32 [ 10, %11 ], [ %13, %12 ]
ret i32 %15
}

LLVM IR (-O2):
define i32 @limit10(i32 %0, i32 %1) {
%3 = sdiv i32 %0, %1
%4 = icmp slt i32 %3, 10
%5 = select i1 %4, i32 %3, i32 10
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ dxl_hal_close();
void dxl_terminate() { dxl_hal_close(); }


x86 assembly (clang, -O0):
<dxl_terminate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <dxl_hal_close@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dxl_terminate>:
xor    %eax,%eax
jmp    1030 <dxl_hal_close@plt>

LLVM IR (-O0):
define void @dxl_terminate() {
%1 = call i32 (...) @dxl_hal_close()
ret void
}

LLVM IR (-O2):
define void @dxl_terminate() {
%1 = tail call i32 (...) @dxl_hal_close()
ret void
}
/* Variables and functions */
int platform_set_malloc_free(void *(*)(size_t), void (*)(void *));
int memory_set_own(void *(*malloc_func)(size_t), void (*free_func)(void *)) {
  return platform_set_malloc_free(malloc_func, free_func);
}


x86 assembly (clang, -O0):
<memory_set_own>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <platform_set_malloc_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memory_set_own>:
jmp    1030 <platform_set_malloc_free@plt>

LLVM IR (-O0):
define i32 @memory_set_own(i8* (i64)* %0, void (i8*)* %1) {
%3 = alloca i8* (i64)*
%4 = alloca void (i8*)*
store i8* (i64)* %0, i8* (i64)** %3
store void (i8*)* %1, void (i8*)** %4
%5 = load i8* (i64)*, i8* (i64)** %3
%6 = load void (i8*)*, void (i8*)** %4
%7 = call i32 @platform_set_malloc_free(i8* (i64)* %5, void (i8*)* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @memory_set_own(i8* (i64)* %0, void (i8*)* %1) {
%3 = tail call i32 @platform_set_malloc_free(i8* (i64)* %0, void (i8*)* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ register_write(int, unsigned int);
void register_write_pcie(unsigned int key, unsigned int val) {
  register_write(0x0030, key);
  register_write(0x0034, val);
}


x86 assembly (clang, -O0):
<register_write_pcie>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x30,%edi
call   1030 <register_write@plt>
mov    -0x8(%rbp),%esi
mov    $0x34,%edi
call   1030 <register_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<register_write_pcie>:
push   %rbx
mov    %esi,%ebx
mov    %edi,%esi
mov    $0x30,%edi
call   1030 <register_write@plt>
mov    $0x34,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <register_write@plt>

LLVM IR (-O0):
define void @register_write_pcie(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @register_write(i32 48, i32 %5)
%7 = load i32, i32* %4
%8 = call i32 @register_write(i32 52, i32 %7)
ret void
}

LLVM IR (-O2):
define void @register_write_pcie(i32 %0, i32 %1) {
%3 = tail call i32 @register_write(i32 48, i32 %0)
%4 = tail call i32 @register_write(i32 52, i32 %1)
ret void
}
/* Type definitions */
typedef scalar_t__ int64_t;
typedef int /*<<< orphan*/ Z3_symbol;
typedef int /*<<< orphan*/ Z3_sort;
typedef int /*<<< orphan*/ Z3_context;

/* Variables and functions */
int /*<<< orphan*/ Z3_mk_const(int /*<<< orphan*/, int /*<<< orphan*/,
                               int /*<<< orphan*/);
int /*<<< orphan*/ Z3_mk_int_sort(int /*<<< orphan*/);
int /*<<< orphan*/ Z3_mk_string_symbol(int /*<<< orphan*/, char const *);
int64_t redz3_mkIntVar(int64_t ctx, const char *name) {
  Z3_sort ty = Z3_mk_int_sort((Z3_context)ctx);
  Z3_symbol s = Z3_mk_string_symbol((Z3_context)ctx, name);
  return (int64_t)Z3_mk_const((Z3_context)ctx, s, ty);
}


x86 assembly (clang, -O0):
<redz3_mkIntVar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%edi
call   1050 <Z3_mk_int_sort@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
call   1040 <Z3_mk_string_symbol@plt>
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%edi
mov    -0x18(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1030 <Z3_mk_const@plt>
cltq
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<redz3_mkIntVar>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
call   1050 <Z3_mk_int_sort@plt>
mov    %eax,%ebp
mov    %ebx,%edi
mov    %r14,%rsi
call   1040 <Z3_mk_string_symbol@plt>
mov    %ebx,%edi
mov    %eax,%esi
mov    %ebp,%edx
call   1030 <Z3_mk_const@plt>
cltq
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i64 @redz3_mkIntVar(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i64 %0, i64* %3
store i8* %1, i8** %4
%7 = load i64, i64* %3
%8 = trunc i64 %7 to i32
%9 = call i32 @Z3_mk_int_sort(i32 %8)
store i32 %9, i32* %5
%10 = load i64, i64* %3
%11 = trunc i64 %10 to i32
%12 = load i8*, i8** %4
%13 = call i32 @Z3_mk_string_symbol(i32 %11, i8* %12)
store i32 %13, i32* %6
%14 = load i64, i64* %3
%15 = trunc i64 %14 to i32
%16 = load i32, i32* %6
%17 = load i32, i32* %5
%18 = call i32 @Z3_mk_const(i32 %15, i32 %16, i32 %17)
%19 = sext i32 %18 to i64
ret i64 %19
}

LLVM IR (-O2):
define i64 @redz3_mkIntVar(i64 %0, i8* %1) {
%3 = trunc i64 %0 to i32
%4 = tail call i32 @Z3_mk_int_sort(i32 %3)
%5 = tail call i32 @Z3_mk_string_symbol(i32 %3, i8* %1)
%6 = tail call i32 @Z3_mk_const(i32 %3, i32 %5, i32 %4)
%7 = sext i32 %6 to i64
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void hello() { printf("hello\n"); }


x86 assembly (clang, -O0):
<hello>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hello>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"hello\0A\00"
define void @hello() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [6 x i8] c"hello\00"
define void @hello() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_io_bit(int, int);
void TOSH_SET_POT_SELECT_PIN() { set_io_bit(0x43, 5); }


x86 assembly (clang, -O0):
<TOSH_SET_POT_SELECT_PIN>:
push   %rbp
mov    %rsp,%rbp
mov    $0x43,%edi
mov    $0x5,%esi
call   1030 <set_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_SET_POT_SELECT_PIN>:
mov    $0x43,%edi
mov    $0x5,%esi
jmp    1030 <set_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_SET_POT_SELECT_PIN() {
%1 = call i32 @set_io_bit(i32 67, i32 5)
ret void
}

LLVM IR (-O2):
define void @TOSH_SET_POT_SELECT_PIN() {
%1 = tail call i32 @set_io_bit(i32 67, i32 5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ L_update();
int /*<<< orphan*/ M_systemsclose();
int /*<<< orphan*/ V_update();
void M_gameloop() {
  while (0) {
    L_update();
    V_update();
  }
  M_systemsclose();
}


x86 assembly (clang, -O0):
<M_gameloop>:
push   %rbp
mov    %rsp,%rbp
jmp    1139 <M_gameloop+0x9>
xor    %eax,%eax
test   $0x1,%al
jne    1148 <M_gameloop+0x18>
jmp    115b <M_gameloop+0x2b>
mov    $0x0,%al
call   1040 <L_update@plt>
mov    $0x0,%al
call   1030 <V_update@plt>
jmp    1139 <M_gameloop+0x9>
mov    $0x0,%al
call   1050 <M_systemsclose@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<M_gameloop>:
xor    %eax,%eax
jmp    1030 <M_systemsclose@plt>

LLVM IR (-O0):
define void @M_gameloop() {
br label %1
1: ; preds = %2, %0
br i1 false, label %2, label %5
2: ; preds = %1
%3 = call i32 (...) @L_update()
%4 = call i32 (...) @V_update()
br label %1
5: ; preds = %1
%6 = call i32 (...) @M_systemsclose()
ret void
}

LLVM IR (-O2):
define void @M_gameloop() {
%1 = tail call i32 (...) @M_systemsclose()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ngen2(char *, char *, int, int);
void cginitlw(int v, int a) { ngen2("%s\t$%d,%d(%%ebp)", "movl", v, a); }


x86 assembly (clang, -O0):
<cginitlw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
lea    0xed5(%rip),%rdi
lea    0xedf(%rip),%rsi
call   1030 <ngen2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cginitlw>:
mov    %esi,%ecx
mov    %edi,%edx
lea    0xee5(%rip),%rdi
lea    0xeef(%rip),%rsi
jmp    1030 <ngen2@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"%s\09$%d,%d(%%ebp)\00"
@.str.1 = [5 x i8] c"movl\00"
define void @cginitlw(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @ngen2(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"%s\09$%d,%d(%%ebp)\00"
@.str.1 = [5 x i8] c"movl\00"
define void @cginitlw(i32 %0, i32 %1) {
%3 = tail call i32 @ngen2(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void free_mem(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<free_mem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_mem>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @free_mem(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
void foo201(int p) {}


x86 assembly (clang, -O0):
<foo201>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo201>:
ret

LLVM IR (-O0):
define void @foo201(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo201(i32 %0) {
ret void
}
int plat_device_is_coherent(struct device *dev) { return 1; }


x86 assembly (clang, -O0):
<plat_device_is_coherent>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<plat_device_is_coherent>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.device = type opaque
define i32 @plat_device_is_coherent(%struct.device* %0) {
%2 = alloca %struct.device*
store %struct.device* %0, %struct.device** %2
ret i32 1
}

LLVM IR (-O2):
%struct.device = type opaque
define i32 @plat_device_is_coherent(%struct.device* nocapture readnone %0) {
ret i32 1
}
/* Type definitions */
struct spwd {
  int dummy;
};
typedef enum nss_status { ____Placeholder_nss_status } nss_status;

/* Variables and functions */
int ENOENT;
int NSS_STATUS_NOTFOUND;
enum nss_status _nss_noenum_getspnam_r(const char *name, struct spwd *spw,
                                       char *buffer, size_t buflen,
                                       int *errnop) {
  *errnop = ENOENT;
  return NSS_STATUS_NOTFOUND;
}


x86 assembly (clang, -O0):
<_nss_noenum_getspnam_r>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    0x2eb1(%rip),%rax
mov    (%rax),%ecx
mov    -0x28(%rbp),%rax
mov    %ecx,(%rax)
mov    0x2eb2(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_nss_noenum_getspnam_r>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%eax
mov    %eax,(%r8)
mov    0x2ecd(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
%struct.spwd = type { i32 }
@ENOENT = global i32 0
@NSS_STATUS_NOTFOUND = global i32 0
define i32 @_nss_noenum_getspnam_r(i8* %0, %struct.spwd* %1, i8* %2, i64 %3, i32* %4) {
%6 = alloca i8*
%7 = alloca %struct.spwd*
%8 = alloca i8*
%9 = alloca i64
%10 = alloca i32*
store i8* %0, i8** %6
store %struct.spwd* %1, %struct.spwd** %7
store i8* %2, i8** %8
store i64 %3, i64* %9
store i32* %4, i32** %10
%11 = load i32, i32* @ENOENT
%12 = load i32*, i32** %10
store i32 %11, i32* %12
%13 = load i32, i32* @NSS_STATUS_NOTFOUND
ret i32 %13
}

LLVM IR (-O2):
%struct.spwd = type { i32 }
@ENOENT = global i32 0
@NSS_STATUS_NOTFOUND = global i32 0
define i32 @_nss_noenum_getspnam_r(i8* nocapture readnone %0, %struct.spwd* nocapture readnone %1, i8* nocapture readnone %2, i64 %3, i32* nocapture writeonly %4) {
%6 = load i32, i32* @ENOENT
store i32 %6, i32* %4
%7 = load i32, i32* @NSS_STATUS_NOTFOUND
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ f(int);
int main() { f(10); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
call   1030 <f@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
call   1030 <f@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @f(i32 10)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @f(i32 10)
ret i32 0
}
int hammingDistance(int x, int y) {
  int xor = x ^ y;
  int n = 0;
  while (xor^(xor-1)) {
    xor = xor^(xor-1);
    n++;
  }
  return n;
}


x86 assembly (clang, -O0):
<hammingDistance>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
xor    %ecx,%eax
cmp    $0x0,%eax
je     114a <hammingDistance+0x4a>
mov    -0xc(%rbp),%eax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
xor    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    111a <hammingDistance+0x1a>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hammingDistance>:
xor    %esi,%edi
mov    $0xffffffff,%eax
nopw   0x0(%rax,%rax,1)
lea    -0x1(%rdi),%ecx
add    $0x1,%eax
xor    %edi,%ecx
mov    %ecx,%edi
jne    1110 <hammingDistance+0x10>
ret

LLVM IR (-O0):
define i32 @hammingDistance(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = xor i32 %7, %8
store i32 %9, i32* %5
store i32 0, i32* %6
br label %10
10: ; preds = %16, %2
%11 = load i32, i32* %5
%12 = load i32, i32* %5
%13 = sub nsw i32 %12, 1
%14 = xor i32 %11, %13
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %23
16: ; preds = %10
%17 = load i32, i32* %5
%18 = load i32, i32* %5
%19 = sub nsw i32 %18, 1
%20 = xor i32 %17, %19
store i32 %20, i32* %5
%21 = load i32, i32* %6
%22 = add nsw i32 %21, 1
store i32 %22, i32* %6
br label %10
23: ; preds = %10
%24 = load i32, i32* %6
ret i32 %24
}

LLVM IR (-O2):
define i32 @hammingDistance(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
br label %4
4: ; preds = %4, %2
%5 = phi i32 [ %3, %2 ], [ %8, %4 ]
%6 = phi i32 [ 0, %2 ], [ %10, %4 ]
%7 = add nsw i32 %5, -1
%8 = xor i32 %7, %5
%9 = icmp eq i32 %8, 0
%10 = add nuw nsw i32 %6, 1
br i1 %9, label %11, label %4
11: ; preds = %4
ret i32 %6
}
void t1(void *f, int g) { asm("str %1, %0" : "=Q"(f) : "r"(g)); }


x86 assembly (clang, -O0):
x86 assembly (clang, -O2):
<t1>:
ret

LLVM IR (-O0):
LLVM IR (-O2):
define void @t1(i8* nocapture %0, i32 %1) {
%3 = tail call i8* asm "str $1, $0", "=Q,r,~{dirflag},~{fpsr},~{flags}"(i32 %1)
ret void
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
void ref_mul_int64_t(int64_t arg1, int64_t arg2, int64_t *result) {
  *result = arg1 * arg2;
}


x86 assembly (clang, -O0):
<ref_mul_int64_t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
imul   -0x8(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ref_mul_int64_t>:
imul   %esi,%edi
mov    %edi,(%rdx)
ret

LLVM IR (-O0):
define void @ref_mul_int64_t(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = mul nsw i32 %7, %8
%10 = load i32*, i32** %6
store i32 %9, i32* %10
ret void
}

LLVM IR (-O2):
define void @ref_mul_int64_t(i32 %0, i32 %1, i32* nocapture writeonly %2) {
%4 = mul nsw i32 %1, %0
store i32 %4, i32* %2
ret void
}
/* Variables and functions */
void *fn1(void *p) { return NULL; }


x86 assembly (clang, -O0):
<fn1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn1>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @fn1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @fn1(i8* nocapture readnone %0) {
ret i8* null
}
void RAWToRGBARow_C() {}


x86 assembly (clang, -O0):
<RAWToRGBARow_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RAWToRGBARow_C>:
ret

LLVM IR (-O0):
define void @RAWToRGBARow_C() {
ret void
}

LLVM IR (-O2):
define void @RAWToRGBARow_C() {
ret void
}
void find_char(char fc, char **buf) {
  char *ptr = *buf;
  while (*ptr != fc)
    ptr++;
  *buf = ptr;
}


x86 assembly (clang, -O0):
<find_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x1(%rbp),%ecx
cmp    %ecx,%eax
je     113d <find_char+0x3d>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1119 <find_char+0x19>
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_char>:
mov    (%rsi),%rax
add    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
mov    %rax,%rcx
add    $0x1,%rax
cmp    %dil,0x1(%rcx)
jne    1110 <find_char+0x10>
mov    %rax,(%rsi)
ret

LLVM IR (-O0):
define void @find_char(i8 signext %0, i8** %1) {
%3 = alloca i8
%4 = alloca i8**
%5 = alloca i8*
store i8 %0, i8* %3
store i8** %1, i8*** %4
%6 = load i8**, i8*** %4
%7 = load i8*, i8** %6
store i8* %7, i8** %5
br label %8
8: ; preds = %15, %2
%9 = load i8*, i8** %5
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp ne i32 %11, %13
br i1 %14, label %15, label %18
15: ; preds = %8
%16 = load i8*, i8** %5
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %5
br label %8
18: ; preds = %8
%19 = load i8*, i8** %5
%20 = load i8**, i8*** %4
store i8* %19, i8** %20
ret void
}

LLVM IR (-O2):
define void @find_char(i8 signext %0, i8** nocapture %1) {
%3 = load i8*, i8** %1
br label %4
4: ; preds = %4, %2
%5 = phi i8* [ %3, %2 ], [ %8, %4 ]
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, %0
%8 = getelementptr inbounds i8, i8* %5, i64 1
br i1 %7, label %9, label %4
9: ; preds = %4
store i8* %5, i8** %1
ret void
}
int test_imm_09int32_reg(int val) { return ((val) & (0x09 << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_09int32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x9,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_09int32_reg>:
test   $0x9,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_09int32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 9
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_09int32_reg(i32 %0) {
%2 = and i32 %0, 9
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
__attribute__((no, noclone)) signed __int128 t111_2sub(signed __int128 y) {
  signed __int128 x =
      (((signed __int128)(((unsigned __int128)1 << (16 * 8 - 1)) - 1)));
  signed __int128 r;
  if (__builtin_sub_overflow(x, y, &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t111_2sub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
movabs $0x7fffffffffffffff,%rax
ff ff 7f
mov    %rax,-0x38(%rbp)
movq   $0xffffffffffffffff,-0x40(%rbp)
ff
mov    -0x40(%rbp),%rdx
mov    -0x38(%rbp),%rcx
mov    -0x30(%rbp),%rsi
mov    -0x28(%rbp),%rax
sub    %rsi,%rdx
sbb    %rax,%rcx
seto   %al
mov    %rdx,-0x50(%rbp)
mov    %rcx,-0x48(%rbp)
test   $0x1,%al
jne    1174 <t111_2sub+0x64>
jmp    117b <t111_2sub+0x6b>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x50(%rbp),%rax
mov    -0x48(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t111_2sub>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
not    %r14
movabs $0x7fffffffffffffff,%rbx
ff ff 7f
sub    %rsi,%rbx
jno    1130 <t111_2sub+0x20>
xor    %eax,%eax
call   1030 <bar@plt>
mov    %r14,%rax
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define { i64, i64 } @t111_2sub(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = alloca i128
%8 = bitcast i128* %4 to { i64, i64 }*
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %8, i32 0, i32 0
store i64 %0, i64* %9
%10 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %8, i32 0, i32 1
store i64 %1, i64* %10
%11 = load i128, i128* %4
store i128 %11, i128* %5
store i128 170141183460469231731687303715884105727, i128* %6
%12 = load i128, i128* %6
%13 = load i128, i128* %5
%14 = call { i128, i1 } @llvm.ssub.with.overflow.i128(i128 %12, i128 %13)
%15 = extractvalue { i128, i1 } %14, 1
%16 = extractvalue { i128, i1 } %14, 0
store i128 %16, i128* %7
br i1 %15, label %17, label %19
17: ; preds = %2
%18 = call i32 (...) @bar()
br label %19
19: ; preds = %17, %2
%20 = load i128, i128* %7
store i128 %20, i128* %3
%21 = bitcast i128* %3 to { i64, i64 }*
%22 = load { i64, i64 }, { i64, i64 }* %21
ret { i64, i64 } %22
}

LLVM IR (-O2):
define { i64, i64 } @t111_2sub(i64 %0, i64 %1) {
%3 = zext i64 %1 to i128
%4 = shl nuw i128 %3, 64
%5 = zext i64 %0 to i128
%6 = or i128 %4, %5
%7 = tail call { i128, i1 } @llvm.ssub.with.overflow.i128(i128 170141183460469231731687303715884105727, i128 %6)
%8 = extractvalue { i128, i1 } %7, 1
%9 = extractvalue { i128, i1 } %7, 0
br i1 %8, label %10, label %12
10: ; preds = %2
%11 = tail call i32 (...) @bar()
br label %12
12: ; preds = %10, %2
%13 = trunc i128 %9 to i64
%14 = lshr i128 %9, 64
%15 = trunc i128 %14 to i64
%16 = insertvalue { i64, i64 } poison, i64 %13, 0
%17 = insertvalue { i64, i64 } %16, i64 %15, 1
ret { i64, i64 } %17
}
float wireframe() { return wireframe("polygons", 1.0, 1); }


x86 assembly (clang, -O0):
<wireframe>:
push   %rbp
mov    %rsp,%rbp
lea    0xeed(%rip),%rdi
movsd  0xedd(%rip),%xmm0
mov    $0x1,%esi
mov    $0x1,%al
call   1030 <wireframe@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wireframe>:
jmp    1100 <wireframe>

LLVM IR (-O0):
@.str = [9 x i8] c"polygons\00"
define float @wireframe() {
%1 = call float (i8*, double, i32, ...) bitcast (float ()* @wireframe to float (i8*, double, i32, ...)*)(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), double 1.000000e+00, i32 1)
ret float %1
}

LLVM IR (-O2):
define float @wireframe() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
void *gettext(char *);
void *i18n_localized_text(void *text_id) { return gettext((char *)text_id); }


x86 assembly (clang, -O0):
<i18n_localized_text>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <gettext@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i18n_localized_text>:
jmp    1030 <gettext@plt>

LLVM IR (-O0):
define i8* @i18n_localized_text(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @gettext(i8* %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @i18n_localized_text(i8* %0) {
%2 = tail call i8* @gettext(i8* %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print(void) {
  printf("Executing function print at program "
         "termination\nProgram terminated\n");
}


x86 assembly (clang, -O0):
<print>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [68 x i8] c"Executing function print at program termination\0AProgram terminated\0A\00"
define void @print() {
%1 = call i32 @printf(i8* getelementptr inbounds ([68 x i8], [68 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [67 x i8] c"Executing function print at program termination\0AProgram terminated\00"
define void @print() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([67 x i8], [67 x i8]* @str, i64 0, i64 0))
ret void
}
void foo292() {}


x86 assembly (clang, -O0):
<foo292>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo292>:
ret

LLVM IR (-O0):
define void @foo292() {
ret void
}

LLVM IR (-O2):
define void @foo292() {
ret void
}
/* Variables and functions */
int kbd(int);
int scankbd(void) { return (kbd(1) != -1); }


x86 assembly (clang, -O0):
<scankbd>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <kbd@plt>
cmp    $0xffffffff,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scankbd>:
push   %rax
mov    $0x1,%edi
call   1030 <kbd@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @scankbd() {
%1 = call i32 @kbd(i32 1)
%2 = icmp ne i32 %1, -1
%3 = zext i1 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @scankbd() {
%1 = tail call i32 @kbd(i32 1)
%2 = icmp ne i32 %1, -1
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int pigpio_command(int, int, int /*<<< orphan*/, int /*<<< orphan*/, int);
int wave_tx_at(int pi) { return pigpio_command(pi, 101, 0, 0, 1); }


x86 assembly (clang, -O0):
<wave_tx_at>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x65,%esi
xor    %ecx,%ecx
mov    $0x1,%r8d
mov    %ecx,%edx
call   1030 <pigpio_command@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wave_tx_at>:
mov    $0x65,%esi
xor    %edx,%edx
xor    %ecx,%ecx
mov    $0x1,%r8d
jmp    1030 <pigpio_command@plt>

LLVM IR (-O0):
define i32 @wave_tx_at(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @pigpio_command(i32 %3, i32 101, i32 0, i32 0, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @wave_tx_at(i32 %0) {
%2 = tail call i32 @pigpio_command(i32 %0, i32 101, i32 0, i32 0, i32 1)
ret i32 %2
}
/* Variables and functions */
int getCombinations(int /*<<< orphan*/, int);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char *argv[]) {
  int target = 200;
  printf("Result: %d\n", getCombinations(0, target));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0xc8,-0x14(%rbp)
mov    -0x14(%rbp),%esi
xor    %edi,%edi
call   1040 <getCombinations@plt>
mov    %eax,%esi
lea    0xeb0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
mov    $0xc8,%esi
call   1040 <getCombinations@plt>
lea    0xecc(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"Result: %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 200, i32* %6
%7 = load i32, i32* %6
%8 = call i32 @getCombinations(i32 0, i32 %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"Result: %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @getCombinations(i32 0, i32 200)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
double clamp(const double a, const double min, const double max) {
  return (a < min) ? min : (a > max) ? max : a;
}


x86 assembly (clang, -O0):
<clamp>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1136 <clamp+0x36>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
jmp    1169 <clamp+0x69>
movsd  -0x8(%rbp),%xmm0
ucomisd -0x18(%rbp),%xmm0
jbe    1155 <clamp+0x55>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
jmp    115f <clamp+0x5f>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<clamp>:
minsd  %xmm0,%xmm2
cmpltsd %xmm1,%xmm0
movapd %xmm0,%xmm3
andnpd %xmm2,%xmm3
andpd  %xmm1,%xmm0
orpd   %xmm3,%xmm0
ret

LLVM IR (-O0):
define double @clamp(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = fcmp olt double %7, %8
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load double, double* %5
br label %22
12: ; preds = %3
%13 = load double, double* %4
%14 = load double, double* %6
%15 = fcmp ogt double %13, %14
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load double, double* %6
br label %20
18: ; preds = %12
%19 = load double, double* %4
br label %20
20: ; preds = %18, %16
%21 = phi double [ %17, %16 ], [ %19, %18 ]
br label %22
22: ; preds = %20, %10
%23 = phi double [ %11, %10 ], [ %21, %20 ]
ret double %23
}

LLVM IR (-O2):
define double @clamp(double %0, double %1, double %2) {
%4 = fcmp olt double %0, %1
%5 = fcmp ogt double %0, %2
%6 = select i1 %5, double %2, double %0
%7 = select i1 %4, double %1, double %6
ret double %7
}
/* Variables and functions */
int ls_costN_nm10_f0(double const **, double **, int *, double *, int);
int ls_costN_nm10(const double **arg, double **res, int *iw, double *w,
                  int mem) {
  return ls_costN_nm10_f0(arg, res, iw, w, mem);
}


x86 assembly (clang, -O0):
<ls_costN_nm10>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x24(%rbp),%r8d
call   1030 <ls_costN_nm10_f0@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_costN_nm10>:
jmp    1030 <ls_costN_nm10_f0@plt>

LLVM IR (-O0):
define i32 @ls_costN_nm10(double** %0, double** %1, i32* %2, double* %3, i32 %4) {
%6 = alloca double**
%7 = alloca double**
%8 = alloca i32*
%9 = alloca double*
%10 = alloca i32
store double** %0, double*** %6
store double** %1, double*** %7
store i32* %2, i32** %8
store double* %3, double** %9
store i32 %4, i32* %10
%11 = load double**, double*** %6
%12 = load double**, double*** %7
%13 = load i32*, i32** %8
%14 = load double*, double** %9
%15 = load i32, i32* %10
%16 = call i32 @ls_costN_nm10_f0(double** %11, double** %12, i32* %13, double* %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @ls_costN_nm10(double** %0, double** %1, i32* %2, double* %3, i32 %4) {
%6 = tail call i32 @ls_costN_nm10_f0(double** %0, double** %1, i32* %2, double* %3, i32 %4)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ Term_Hq2x();
void Term_Gfx() { Term_Hq2x(); }


x86 assembly (clang, -O0):
<Term_Gfx>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Term_Hq2x@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Term_Gfx>:
xor    %eax,%eax
jmp    1030 <Term_Hq2x@plt>

LLVM IR (-O0):
define void @Term_Gfx() {
%1 = call i32 (...) @Term_Hq2x()
ret void
}

LLVM IR (-O2):
define void @Term_Gfx() {
%1 = tail call i32 (...) @Term_Hq2x()
ret void
}
float quinticEaseInf(float p) { return p * p * p * p * p; }


x86 assembly (clang, -O0):
<quinticEaseInf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<quinticEaseInf>:
movaps %xmm0,%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @quinticEaseInf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fmul float %3, %4
%6 = load float, float* %2
%7 = fmul float %5, %6
%8 = load float, float* %2
%9 = fmul float %7, %8
%10 = load float, float* %2
%11 = fmul float %9, %10
ret float %11
}

LLVM IR (-O2):
define float @quinticEaseInf(float %0) {
%2 = fmul float %0, %0
%3 = fmul float %2, %0
%4 = fmul float %3, %0
%5 = fmul float %4, %0
ret float %5
}
int test_imm_FAint64_lowword_reg(long long val) {
  return ((val) & (0xFA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FAint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xfa,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FAint64_lowword_reg>:
test   $0xfa,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FAint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 250
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_FAint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 250
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int fun(char *x) {
  int xx = x[72];
  return xx > 4;
}


x86 assembly (clang, -O0):
<fun>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl 0x48(%rax),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x4,-0xc(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun>:
xor    %eax,%eax
cmpb   $0x5,0x48(%rdi)
setge  %al
ret

LLVM IR (-O0):
define i32 @fun(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 72
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = icmp sgt i32 %8, 4
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @fun(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 72
%3 = load i8, i8* %2
%4 = icmp sgt i8 %3, 4
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
size_t strlen(char const *);
size_t softc_strlen(const char *str) { return strlen(str); }


x86 assembly (clang, -O0):
<softc_strlen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softc_strlen>:
jmp    1030 <strlen@plt>

LLVM IR (-O0):
define i64 @softc_strlen(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @strlen(i8* %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @softc_strlen(i8* nocapture %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
ret i64 %2
}
/* Type definitions */
typedef char *uint64_t;

/* Variables and functions */
uint64_t rdrand_get() {
  uint64_t x;
  unsigned char err = 1;
  do {
    __asm(".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc %1"
          : "=a"(x), "=qm"(err));
  } while (err != 1);
  return x;
}


x86 assembly (clang, -O0):
<rdrand_get>:
push   %rbp
mov    %rsp,%rbp
movb   $0x1,-0x9(%rbp)
rdrand %rax
setb   -0x9(%rbp)
mov    %rax,-0x8(%rbp)
movzbl -0x9(%rbp),%eax
cmp    $0x1,%eax
jne    1108 <rdrand_get+0x8>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rdrand_get>:
movb   $0x1,-0x1(%rsp)
cs nopw 0x0(%rax,%rax,1)
nop
rdrand %rax
setb   -0x1(%rsp)
cmpb   $0x1,-0x1(%rsp)
jne    1110 <rdrand_get+0x10>
ret

LLVM IR (-O0):
define i8* @rdrand_get() {
%1 = alloca i8*
%2 = alloca i8
store i8 1, i8* %2
br label %3
3: ; preds = %5, %0
%4 = call i8* asm ".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc $1", "={ax},=*qm,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %2)
store i8* %4, i8** %1
br label %5
5: ; preds = %3
%6 = load i8, i8* %2
%7 = zext i8 %6 to i32
%8 = icmp ne i32 %7, 1
br i1 %8, label %3, label %9
9: ; preds = %5
%10 = load i8*, i8** %1
ret i8* %10
}

LLVM IR (-O2):
define i8* @rdrand_get() {
%1 = alloca i8
store i8 1, i8* %1
br label %2
2: ; preds = %2, %0
%3 = call i8* asm ".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc $1", "={ax},=*qm,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %1)
%4 = load i8, i8* %1
%5 = icmp eq i8 %4, 1
br i1 %5, label %6, label %2
6: ; preds = %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ fatal(char *);
void *realloc(void *, size_t const);
void *xrealloc(void *ptr, const size_t size) {
  void *p;
  if ((p = realloc(ptr, size)) == NULL && size != 0)
    fatal("Can't allocate memory!");
  return p;
}


x86 assembly (clang, -O0):
<xrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    1162 <xrealloc+0x42>
cmpq   $0x0,-0x10(%rbp)
je     1162 <xrealloc+0x42>
lea    0xea3(%rip),%rdi
call   1040 <fatal@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrealloc>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
call   1030 <realloc@plt>
mov    %rax,%r14
test   %rbx,%rbx
je     1145 <xrealloc+0x25>
test   %r14,%r14
jne    1145 <xrealloc+0x25>
lea    0xec0(%rip),%rdi
call   1040 <fatal@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [23 x i8] c"Can't allocate memory!\00"
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %15
10: ; preds = %2
%11 = load i64, i64* %4
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %10
%14 = call i32 @fatal(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
br label %15
15: ; preds = %13, %10, %2
%16 = load i8*, i8** %5
ret i8* %16
}

LLVM IR (-O2):
@.str = [23 x i8] c"Can't allocate memory!\00"
define noalias i8* @xrealloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
%5 = icmp ne i64 %1, 0
%6 = and i1 %5, %4
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = tail call i32 @fatal(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ print_string(char *);
void main(void) { print_string("A"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <print_string@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xee9(%rip),%rdi
jmp    1030 <print_string@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"A\00"
define void @main() {
%1 = call i32 @print_string(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"A\00"
define void @main() {
%1 = tail call i32 @print_string(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}