xunge/DecIR huggingface dataset:
int main() {
  int x;
  scanf("%d", &x);
  int result = sum(x);
  printf("%d", sum);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
lea    -0x4(%rbp),%rsi
mov    $0x0,%al
call   1040 <scanf@plt>
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1050 <sum@plt>
mov    %eax,-0x8(%rbp)
lea    0xeb2(%rip),%rdi
mov    0x2e93(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xed4(%rip),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
xor    %eax,%eax
call   1040 <scanf@plt>
mov    0xc(%rsp),%edi
xor    %eax,%eax
call   1050 <sum@plt>
mov    0x2e9b(%rip),%rsi
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (i8*, ...) @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 (i32, ...) bitcast (i32 (...)* @sum to i32 (i32, ...)*)(i32 %4)
store i32 %5, i32* %2
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 (...)* @sum)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 (i8*, ...) @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 (i32, ...) bitcast (i32 (...)* @sum to i32 (i32, ...)*)(i32 %4)
%6 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 (...)* @sum)
ret i32 0
}
int calculate_number_length(long int num) {
  int num_length = 0;
  while (num) {
    num = num / 10;
    num_length++;
  }
  return num_length;
}


x86 assembly (clang, -O0):
<calculate_number_length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     113a <calculate_number_length+0x3a>
mov    -0x8(%rbp),%rax
mov    $0xa,%ecx
cqto
idiv   %rcx
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <calculate_number_length+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculate_number_length>:
xor    %ecx,%ecx
test   %rdi,%rdi
je     1144 <calculate_number_length+0x44>
movabs $0x6666666666666667,%rsi
66 66 66
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %rdi,%rax
imul   %rsi
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x2,%rdx
add    %rax,%rdx
add    $0x1,%ecx
add    $0x9,%rdi
cmp    $0x12,%rdi
mov    %rdx,%rdi
ja     1120 <calculate_number_length+0x20>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @calculate_number_length(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i64, i64* %2
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i64, i64* %2
%9 = sdiv i64 %8, 10
store i64 %9, i64* %2
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @calculate_number_length(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i64 [ %6, %3 ], [ %0, %1 ]
%6 = sdiv i64 %5, 10
%7 = add nuw nsw i32 %4, 1
%8 = add i64 %5, 9
%9 = icmp ult i64 %8, 19
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %11
}
int BCD2Binary(int a) {
  int r, t;
  t = a & 0x0F;
  r = t;
  a = 0xF0 & a;
  t = a >> 4;
  t = 0x0F & t;
  r = t * 10 + r;
  return r;
}


x86 assembly (clang, -O0):
<BCD2Binary>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf0,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xf,%eax
mov    %eax,-0xc(%rbp)
imul   $0xa,-0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BCD2Binary>:
mov    %edi,%eax
and    $0xf,%eax
shr    $0x4,%edi
and    $0xf,%edi
lea    (%rdi,%rdi,4),%ecx
lea    (%rax,%rcx,2),%eax
ret

LLVM IR (-O0):
define i32 @BCD2Binary(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = and i32 %5, 15
store i32 %6, i32* %4
%7 = load i32, i32* %4
store i32 %7, i32* %3
%8 = load i32, i32* %2
%9 = and i32 240, %8
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = ashr i32 %10, 4
store i32 %11, i32* %4
%12 = load i32, i32* %4
%13 = and i32 15, %12
store i32 %13, i32* %4
%14 = load i32, i32* %4
%15 = mul nsw i32 %14, 10
%16 = load i32, i32* %3
%17 = add nsw i32 %15, %16
store i32 %17, i32* %3
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @BCD2Binary(i32 %0) {
%2 = and i32 %0, 15
%3 = lshr i32 %0, 4
%4 = and i32 %3, 15
%5 = mul nuw nsw i32 %4, 10
%6 = add nuw nsw i32 %5, %2
ret i32 %6
}
double test1(double x) {
  double s, c;
  s = __builtin_sin(x);
  c = __builtin_cos(x);
  return s + c;
}


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <sin@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <cos@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
addsd  -0x18(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
sub    $0x18,%rsp
movsd  %xmm0,0x8(%rsp)
call   1030 <sin@plt>
movsd  %xmm0,0x10(%rsp)
movsd  0x8(%rsp),%xmm0
call   1040 <cos@plt>
addsd  0x10(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @test1(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %2
%5 = load double, double* %2
%6 = call double @sin(double %5)
store double %6, double* %3
%7 = load double, double* %2
%8 = call double @cos(double %7)
store double %8, double* %4
%9 = load double, double* %3
%10 = load double, double* %4
%11 = fadd double %9, %10
ret double %11
}

LLVM IR (-O2):
define double @test1(double %0) {
%2 = tail call double @sin(double %0)
%3 = tail call double @cos(double %0)
%4 = fadd double %2, %3
ret double %4
}
/* Type definitions */
typedef int /*<<< orphan*/ __u64;

/* Variables and functions */
int syscall(int, int, unsigned int, int /*<<< orphan*/, int, char const *);
int fanotify_mark(int fanotify_fd, unsigned int flags, __u64 mask, int dfd,
                  const char *pathname) {
  return syscall(301, fanotify_fd, flags, mask, dfd, pathname);
}


x86 assembly (clang, -O0):
<fanotify_mark>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    -0x10(%rbp),%r8d
mov    -0x18(%rbp),%r9
mov    $0x12d,%edi
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fanotify_mark>:
mov    %r8,%r9
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
mov    $0x12d,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @fanotify_mark(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i8*
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i8* %4, i8** %10
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load i8*, i8** %10
%16 = call i32 @syscall(i32 301, i32 %11, i32 %12, i32 %13, i32 %14, i8* %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @fanotify_mark(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4) {
%6 = tail call i32 @syscall(i32 301, i32 %0, i32 %1, i32 %2, i32 %3, i8* %4)
ret i32 %6
}
long core___core__Int___Numeric__to_i(long self) {
  long var;
  var = self;
  goto RET_LABEL;
RET_LABEL:;
  return var;
}


x86 assembly (clang, -O0):
<core___core__Int___Numeric__to_i>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<core___core__Int___Numeric__to_i>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @core___core__Int___Numeric__to_i(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
store i64 %4, i64* %3
br label %5
5: ; preds = %1
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
define i64 @core___core__Int___Numeric__to_i(i64 returned %0) {
ret i64 %0
}
int test_array_check(int key, int a[], int len) {
  int ret = -1;
  int i;
  for (i = 0; i < len; i++) {
  }
  return ret;
}


x86 assembly (clang, -O0):
<test_array_check>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0xffffffff,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    113b <test_array_check+0x3b>
jmp    112d <test_array_check+0x2d>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    111c <test_array_check+0x1c>
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_array_check>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @test_array_check(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
store i32 -1, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %14, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %17
13: ; preds = %9
br label %14
14: ; preds = %13
%15 = load i32, i32* %8
%16 = add nsw i32 %15, 1
store i32 %16, i32* %8
br label %9
17: ; preds = %9
%18 = load i32, i32* %7
ret i32 %18
}

LLVM IR (-O2):
define i32 @test_array_check(i32 %0, i32* nocapture readnone %1, i32 %2) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ videoram_put(char const *);
void videoram_puts(const char *s) {
  videoram_put(s);
  videoram_put("\r\n");
}


x86 assembly (clang, -O0):
<videoram_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <videoram_put@plt>
lea    0xed4(%rip),%rdi
call   1030 <videoram_put@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<videoram_puts>:
push   %rax
call   1030 <videoram_put@plt>
lea    0xee3(%rip),%rdi
pop    %rax
jmp    1030 <videoram_put@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"\0D\0A\00"
define void @videoram_puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @videoram_put(i8* %3)
%5 = call i32 @videoram_put(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"\0D\0A\00"
define void @videoram_puts(i8* %0) {
%2 = tail call i32 @videoram_put(i8* %0)
%3 = tail call i32 @videoram_put(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
double f(double x) {
  printf("calculating f(%f)\n", x);
  return x;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rax
movsd  %xmm0,(%rsp)
lea    0xee3(%rip),%rdi
call   1030 <printf@plt>
movsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@.str = [19 x i8] c"calculating f(%f)\0A\00"
define double @f(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), double %3)
%5 = load double, double* %2
ret double %5
}

LLVM IR (-O2):
@.str = [19 x i8] c"calculating f(%f)\0A\00"
define double @f(double returned %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), double %0)
ret double %0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isprint(int);
void t_isprint_0xdd() {
  Assert_real((isprint(221) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              1110, ("isprint should be 0 for 0xdd"));
}


x86 assembly (clang, -O0):
<t_isprint_0xdd>:
push   %rbp
mov    %rsp,%rbp
mov    $0xdd,%edi
call   1030 <isprint@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x456,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0xdd>:
push   %rax
mov    $0xdd,%edi
call   1030 <isprint@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x456,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xdd\00"
define void @t_isprint_0xdd() {
%1 = call i64 @isprint(i32 221)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1110, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xdd\00"
define void @t_isprint_0xdd() {
%1 = tail call i64 @isprint(i32 221)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1110, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
struct turn_attr_hdr {
  int dummy;
};
struct sockaddr {
  int dummy;
};
struct iovec {
  int dummy;
};

/* Variables and functions */
struct turn_attr_hdr *turn_attr_address_create(int, struct sockaddr const *,
                                               struct iovec *);
struct turn_attr_hdr *
turn_attr_mapped_address_create(const struct sockaddr *address,
                                struct iovec *iov) {
  return turn_attr_address_create(0x0001, address, iov);
}


x86 assembly (clang, -O0):
<turn_attr_mapped_address_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0x1,%edi
call   1030 <turn_attr_address_create@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<turn_attr_mapped_address_create>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x1,%edi
jmp    1030 <turn_attr_address_create@plt>

LLVM IR (-O0):
%struct.turn_attr_hdr = type { i32 }
%struct.sockaddr = type { i32 }
%struct.iovec = type { i32 }
define %struct.turn_attr_hdr* @turn_attr_mapped_address_create(%struct.sockaddr* %0, %struct.iovec* %1) {
%3 = alloca %struct.sockaddr*
%4 = alloca %struct.iovec*
store %struct.sockaddr* %0, %struct.sockaddr** %3
store %struct.iovec* %1, %struct.iovec** %4
%5 = load %struct.sockaddr*, %struct.sockaddr** %3
%6 = load %struct.iovec*, %struct.iovec** %4
%7 = call %struct.turn_attr_hdr* @turn_attr_address_create(i32 1, %struct.sockaddr* %5, %struct.iovec* %6)
ret %struct.turn_attr_hdr* %7
}

LLVM IR (-O2):
%struct.turn_attr_hdr = type { i32 }
%struct.sockaddr = type { i32 }
%struct.iovec = type { i32 }
define %struct.turn_attr_hdr* @turn_attr_mapped_address_create(%struct.sockaddr* %0, %struct.iovec* %1) {
%3 = tail call %struct.turn_attr_hdr* @turn_attr_address_create(i32 1, %struct.sockaddr* %0, %struct.iovec* %1)
ret %struct.turn_attr_hdr* %3
}
/* Variables and functions */
int /*<<< orphan*/ C_LOG2L(double);
int main() {
  C_LOG2L(1.0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movsd  0xed9(%rip),%xmm0
call   1030 <C_LOG2L@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movsd  0xee7(%rip),%xmm0
call   1030 <C_LOG2L@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @C_LOG2L(double 1.000000e+00)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @C_LOG2L(double 1.000000e+00)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ tss_t;
typedef int /*<<< orphan*/ tss_dtor_t;

/* Variables and functions */
scalar_t__ __pthread_key_create(int /*<<< orphan*/ *, int /*<<< orphan*/);
int thrd_error;
int thrd_success;
int tss_create(tss_t *tss, tss_dtor_t dtor) {
  return __pthread_key_create(tss, dtor) ? thrd_error : thrd_success;
}


x86 assembly (clang, -O0):
<tss_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <__pthread_key_create@plt>
cmp    $0x0,%rax
je     1146 <tss_create+0x36>
mov    0x2e9c(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
jmp    1152 <tss_create+0x42>
mov    0x2e9b(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tss_create>:
push   %rax
call   1030 <__pthread_key_create@plt>
test   %rax,%rax
jne    1124 <tss_create+0x14>
mov    0x2ec6(%rip),%rax
jmp    112b <tss_create+0x1b>
mov    0x2ead(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@thrd_error = global i32 0
@thrd_success = global i32 0
define i32 @tss_create(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i64 @__pthread_key_create(i32* %5, i32 %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* @thrd_error
br label %13
11: ; preds = %2
%12 = load i32, i32* @thrd_success
br label %13
13: ; preds = %11, %9
%14 = phi i32 [ %10, %9 ], [ %12, %11 ]
ret i32 %14
}

LLVM IR (-O2):
@thrd_error = global i32 0
@thrd_success = global i32 0
define i32 @tss_create(i32* %0, i32 %1) {
%3 = tail call i64 @__pthread_key_create(i32* %0, i32 %1)
%4 = icmp eq i64 %3, 0
%5 = load i32, i32* @thrd_error
%6 = load i32, i32* @thrd_success
%7 = select i1 %4, i32 %6, i32 %5
ret i32 %7
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
scalar_t__ ERR;
scalar_t__ refresh();
uint8_t ccbi_refresh() { return ((refresh()) == ERR ? 0 : 1); }


x86 assembly (clang, -O0):
<ccbi_refresh>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <refresh@plt>
mov    %rax,%rdx
mov    0x2ec3(%rip),%rax
mov    (%rax),%rsi
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    %rsi,%rdx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccbi_refresh>:
push   %rax
xor    %eax,%eax
call   1030 <refresh@plt>
mov    0x2ec9(%rip),%rdx
xor    %ecx,%ecx
cmp    (%rdx),%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@ERR = global i64 0
define i32 @ccbi_refresh() {
%1 = call i64 (...) @refresh()
%2 = load i64, i64* @ERR
%3 = icmp eq i64 %1, %2
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 0, i32 1
ret i32 %5
}

LLVM IR (-O2):
@ERR = global i64 0
define i32 @ccbi_refresh() {
%1 = tail call i64 (...) @refresh()
%2 = load i64, i64* @ERR
%3 = icmp ne i64 %1, %2
%4 = zext i1 %3 to i32
ret i32 %4
}
int hugo_timewait(int n) { return 0; }


x86 assembly (clang, -O0):
<hugo_timewait>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hugo_timewait>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hugo_timewait(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @hugo_timewait(i32 %0) {
ret i32 0
}
/* Type definitions */
struct str {
  int dummy;
};

/* Variables and functions */
int str_append(struct str *, char *);
int str_separator(struct str *str) { return str_append(str, " | "); }


x86 assembly (clang, -O0):
<str_separator>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <str_append@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_separator>:
lea    0xee9(%rip),%rsi
jmp    1030 <str_append@plt>

LLVM IR (-O0):
%struct.str = type { i32 }
@.str = [4 x i8] c" | \00"
define i32 @str_separator(%struct.str* %0) {
%2 = alloca %struct.str*
store %struct.str* %0, %struct.str** %2
%3 = load %struct.str*, %struct.str** %2
%4 = call i32 @str_append(%struct.str* %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
%struct.str = type { i32 }
@.str = [4 x i8] c" | \00"
define i32 @str_separator(%struct.str* %0) {
%2 = tail call i32 @str_append(%struct.str* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
/* Variables and functions */
size_t strlen(char const *);
scalar_t__ strncmp(char const *, char const *, size_t);
bool starts_with(const char *pre, const char *str) {
  size_t lenpre = strlen(pre), lenstr = strlen(str);
  return lenstr < lenpre ? false : strncmp(pre, str, lenpre) == 0;
}


x86 assembly (clang, -O0):
<starts_with>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1162 <starts_with+0x42>
xor    %eax,%eax
mov    %eax,-0x24(%rbp)
jmp    1182 <starts_with+0x62>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<starts_with>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1040 <strlen@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1040 <strlen@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rbx,%rcx
jb     115e <starts_with+0x3e>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
call   1030 <strncmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @starts_with(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = call i64 @strlen(i8* %7)
store i64 %8, i64* %5
%9 = load i8*, i8** %4
%10 = call i64 @strlen(i8* %9)
store i64 %10, i64* %6
%11 = load i64, i64* %6
%12 = load i64, i64* %5
%13 = icmp ult i64 %11, %12
br i1 %13, label %14, label %15
14: ; preds = %2
br label %22
15: ; preds = %2
%16 = load i8*, i8** %3
%17 = load i8*, i8** %4
%18 = load i64, i64* %5
%19 = call i64 @strncmp(i8* %16, i8* %17, i64 %18)
%20 = icmp eq i64 %19, 0
%21 = zext i1 %20 to i32
br label %22
22: ; preds = %15, %14
%23 = phi i32 [ 0, %14 ], [ %21, %15 ]
ret i32 %23
}

LLVM IR (-O2):
define i32 @starts_with(i8* %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%5 = icmp ult i64 %4, %3
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = tail call i64 @strncmp(i8* %0, i8* %1, i64 %3)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %2, %6
%11 = phi i32 [ %9, %6 ], [ 0, %2 ]
ret i32 %11
}
void ecalc_memman_init(void) { return; }


x86 assembly (clang, -O0):
<ecalc_memman_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ecalc_memman_init>:
ret

LLVM IR (-O0):
define void @ecalc_memman_init() {
ret void
}

LLVM IR (-O2):
define void @ecalc_memman_init() {
ret void
}
long long r20(void *x) { return *(long long *)(x + 32748); }


x86 assembly (clang, -O0):
<r20>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x7fec(%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<r20>:
mov    0x7fec(%rdi),%rax
ret

LLVM IR (-O0):
define i64 @r20(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr i8, i8* %3, i64 32748
%5 = bitcast i8* %4 to i64*
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @r20(i8* nocapture %0) {
%2 = getelementptr i8, i8* %0, i64 32748
%3 = bitcast i8* %2 to i64*
%4 = load i64, i64* %3
ret i64 %4
}
void gf8mul_00001011(void) {
  __asm__ __volatile__("\tpxor    %xmm7, %xmm3\n"
                       "\tpxor    %xmm7, %xmm2\n"
                       "\tpxor    %xmm7, %xmm1\n"
                       "\tpxor    %xmm7, %xmm0\n"
                       "\tpxor    %xmm6, %xmm7\n"
                       "\tpxor    %xmm6, %xmm2\n"
                       "\tpxor    %xmm6, %xmm1\n"
                       "\tpxor    %xmm5, %xmm6\n"
                       "\tpxor    %xmm5, %xmm1\n"
                       "\tpxor    %xmm5, %xmm0\n"
                       "\tpxor    %xmm4, %xmm7\n"
                       "\tpxor    %xmm4, %xmm5\n"
                       "\tpxor    %xmm3, %xmm6\n"
                       "\tpxor    %xmm3, %xmm4\n"
                       "\tpxor    %xmm2, %xmm5\n"
                       "\tpxor    %xmm2, %xmm3\n"
                       "\tpxor    %xmm1, %xmm4\n"
                       "\tpxor    %xmm1, %xmm2\n"
                       "\tpxor    %xmm0, %xmm3\n"
                       "\tpxor    %xmm0, %xmm1\n");
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pxor   %xmm7,%xmm3
pxor   %xmm7,%xmm2
pxor   %xmm7,%xmm1
pxor   %xmm7,%xmm0
pxor   %xmm6,%xmm7
pxor   %xmm6,%xmm2
pxor   %xmm6,%xmm1
pxor   %xmm5,%xmm6
pxor   %xmm5,%xmm1
pxor   %xmm5,%xmm0
pxor   %xmm4,%xmm7
pxor   %xmm4,%xmm5
pxor   %xmm3,%xmm6
pxor   %xmm3,%xmm4
pxor   %xmm2,%xmm5
pxor   %xmm2,%xmm3
pxor   %xmm1,%xmm4
pxor   %xmm1,%xmm2
pxor   %xmm0,%xmm3
pxor   %xmm0,%xmm1
pop    %rbp
ret

x86 assembly (clang, -O2):
pxor   %xmm7,%xmm3
pxor   %xmm7,%xmm2
pxor   %xmm7,%xmm1
pxor   %xmm7,%xmm0
pxor   %xmm6,%xmm7
pxor   %xmm6,%xmm2
pxor   %xmm6,%xmm1
pxor   %xmm5,%xmm6
pxor   %xmm5,%xmm1
pxor   %xmm5,%xmm0
pxor   %xmm4,%xmm7
pxor   %xmm4,%xmm5
pxor   %xmm3,%xmm6
pxor   %xmm3,%xmm4
pxor   %xmm2,%xmm5
pxor   %xmm2,%xmm3
pxor   %xmm1,%xmm4
pxor   %xmm1,%xmm2
pxor   %xmm0,%xmm3
pxor   %xmm0,%xmm1
ret

LLVM IR (-O0):
define void @gf8mul_00001011() {
ret void
}

LLVM IR (-O2):
define void @gf8mul_00001011() {
tail call void asm sideeffect "\09pxor %xmm7, %xmm3\0A\09pxor %xmm7, %xmm2\0A\09pxor %xmm7, %xmm1\0A\09pxor %xmm7, %xmm0\0A\09pxor %xmm6, %xmm7\0A\09pxor %xmm6, %xmm2\0A\09pxor %xmm6, %xmm1\0A\09pxor %xmm5, %xmm6\0A\09pxor %xmm5, %xmm1\0A\09pxor %xmm5, %xmm0\0A\09pxor %xmm4, %xmm7\0A\09pxor %xmm4, %xmm5\0A\09pxor %xmm3, %xmm6\0A\09pxor %xmm3, %xmm4\0A\09pxor %xmm2, %xmm5\0A\09pxor %xmm2, %xmm3\0A\09pxor %xmm1, %xmm4\0A\09pxor %xmm1, %xmm2\0A\09pxor %xmm0, %xmm3\0A\09pxor %xmm0, %xmm1\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
char *strrchr(p, ch) const char *p;
int ch;
{
  char *save;
  for (save = 0;; ++p) {
    if (*p == ch)
      save = ((void *)(unsigned long)(const void *)(p));
    if (!*p)
      return (save);
  }
}


x86 assembly (clang, -O0):
<strrchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    -0xc(%rbp),%eax
jne    112b <strrchr+0x2b>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
jne    113e <strrchr+0x3e>
mov    -0x18(%rbp),%rax
pop    %rbp
ret
jmp    1143 <strrchr+0x43>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1113 <strrchr+0x13>

x86 assembly (clang, -O2):
<strrchr>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbl (%rdi),%ecx
cmp    %esi,%ecx
cmove  %rdi,%rax
add    $0x1,%rdi
test   %ecx,%ecx
jne    1110 <strrchr+0x10>
ret

LLVM IR (-O0):
define i8* @strrchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
store i8* null, i8** %5
br label %6
6: ; preds = %23, %2
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i32, i32* %4
%11 = icmp eq i32 %9, %10
br i1 %11, label %12, label %16
12: ; preds = %6
%13 = load i8*, i8** %3
%14 = ptrtoint i8* %13 to i64
%15 = inttoptr i64 %14 to i8*
store i8* %15, i8** %5
br label %16
16: ; preds = %12, %6
%17 = load i8*, i8** %3
%18 = load i8, i8* %17
%19 = icmp ne i8 %18, 0
br i1 %19, label %22, label %20
20: ; preds = %16
%21 = load i8*, i8** %5
ret i8* %21
22: ; preds = %16
br label %23
23: ; preds = %22
%24 = load i8*, i8** %3
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %3
br label %6
}

LLVM IR (-O2):
define i8* @strrchr(i8* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %11, %3 ]
%5 = phi i8* [ null, %2 ], [ %9, %3 ]
%6 = load i8, i8* %4
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, %1
%9 = select i1 %8, i8* %4, i8* %5
%10 = icmp eq i8 %6, 0
%11 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %10, label %12, label %3
12: ; preds = %3
ret i8* %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *, char *, char *);
void show_header() {
  printf("%-40.40s%-20.20s%-10.10s%-10.10s\n", "Address", "HWaddress", "HWType",
         "Iface");
}


x86 assembly (clang, -O0):
<show_header>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xf00(%rip),%rsi
lea    0xf01(%rip),%rdx
lea    0xf04(%rip),%rcx
lea    0xf04(%rip),%r8
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_header>:
lea    0xee9(%rip),%rdi
lea    0xf04(%rip),%rsi
lea    0xf05(%rip),%rdx
lea    0xf08(%rip),%rcx
lea    0xf08(%rip),%r8
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"%-40.40s%-20.20s%-10.10s%-10.10s\0A\00"
@.str.1 = [8 x i8] c"Address\00"
@.str.2 = [10 x i8] c"HWaddress\00"
@.str.3 = [7 x i8] c"HWType\00"
@.str.4 = [6 x i8] c"Iface\00"
define void @show_header() {
%1 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.3, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.4, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [34 x i8] c"%-40.40s%-20.20s%-10.10s%-10.10s\0A\00"
@.str.1 = [8 x i8] c"Address\00"
@.str.2 = [10 x i8] c"HWaddress\00"
@.str.3 = [7 x i8] c"HWType\00"
@.str.4 = [6 x i8] c"Iface\00"
define void @show_header() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.3, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.4, i64 0, i64 0))
ret void
}
int _config_exist(char *basedir) { return 0; }


x86 assembly (clang, -O0):
<_config_exist>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_config_exist>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @_config_exist(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @_config_exist(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int read_long_data(unsigned char *, unsigned char *);
int op_random_recv(unsigned char *packet, unsigned char *data) {
  return read_long_data(packet, data);
}


x86 assembly (clang, -O0):
<op_random_recv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <read_long_data@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_random_recv>:
jmp    1030 <read_long_data@plt>

LLVM IR (-O0):
define i32 @op_random_recv(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @read_long_data(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @op_random_recv(i8* %0, i8* %1) {
%3 = tail call i32 @read_long_data(i8* %0, i8* %1)
ret i32 %3
}
int min(const int a, const int b) { return a > b ? a : b; }


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <min+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <min+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
int xjosc_process(void) { return (0); }


x86 assembly (clang, -O0):
<xjosc_process>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xjosc_process>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @xjosc_process() {
ret i32 0
}

LLVM IR (-O2):
define i32 @xjosc_process() {
ret i32 0
}
/* Variables and functions */
int iopl(int);
int /*<<< orphan*/ printf(char *, int);
void thread_func(void *arg) {
  int ret = iopl(3);
  printf("thread iopl=%d\n", ret);
}


x86 assembly (clang, -O0):
<thread_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x3,%edi
call   1040 <iopl@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread_func>:
push   %rax
mov    $0x3,%edi
call   1040 <iopl@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"thread iopl=%d\0A\00"
define void @thread_func(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = call i32 @iopl(i32 3)
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %5)
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"thread iopl=%d\0A\00"
define void @thread_func(i8* nocapture readnone %0) {
%2 = tail call i32 @iopl(i32 3)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cls();
void killlabel() { cls(); }


x86 assembly (clang, -O0):
<killlabel>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <cls@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<killlabel>:
xor    %eax,%eax
jmp    1030 <cls@plt>

LLVM IR (-O0):
define void @killlabel() {
%1 = call i32 (...) @cls()
ret void
}

LLVM IR (-O2):
define void @killlabel() {
%1 = tail call i32 (...) @cls()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void caml_js_alert() { exit(1); }


x86 assembly (clang, -O0):
<caml_js_alert>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<caml_js_alert>:
push   %rax
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @caml_js_alert() {
%1 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @caml_js_alert() {
%1 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int cmpl(void const *, void const *);
int cmph(const void *a, const void *b) { return cmpl(b, a); }


x86 assembly (clang, -O0):
<cmph>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <cmpl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmph>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
jmp    1030 <cmpl@plt>

LLVM IR (-O0):
define i32 @cmph(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i8*, i8** %3
%7 = call i32 @cmpl(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @cmph(i8* %0, i8* %1) {
%3 = tail call i32 @cmpl(i8* %1, i8* %0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ F_RDLCK;
int /*<<< orphan*/ F_SETLK;
int fd_get_lock(int, int /*<<< orphan*/, int /*<<< orphan*/);
int fd_get_read_lock(int fd) { return (fd_get_lock(fd, F_SETLK, F_RDLCK)); }


x86 assembly (clang, -O0):
<fd_get_read_lock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ec3(%rip),%rax
mov    (%rax),%esi
mov    0x2ea2(%rip),%rax
mov    (%rax),%edx
call   1030 <fd_get_lock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fd_get_read_lock>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
mov    0x2eb0(%rip),%rax
mov    (%rax),%edx
jmp    1030 <fd_get_lock@plt>

LLVM IR (-O0):
@F_SETLK = global i32 0
@F_RDLCK = global i32 0
define i32 @fd_get_read_lock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @F_SETLK
%5 = load i32, i32* @F_RDLCK
%6 = call i32 @fd_get_lock(i32 %3, i32 %4, i32 %5)
ret i32 %6
}

LLVM IR (-O2):
@F_SETLK = global i32 0
@F_RDLCK = global i32 0
define i32 @fd_get_read_lock(i32 %0) {
%2 = load i32, i32* @F_SETLK
%3 = load i32, i32* @F_RDLCK
%4 = tail call i32 @fd_get_lock(i32 %0, i32 %2, i32 %3)
ret i32 %4
}
/* Variables and functions */
double pcapack_variance(int const, double *);
double sqrt(double);
double pcapack_sdev(const int n, double *x) {
  double sdev = pcapack_variance(n, x);
  return sqrt(sdev);
}


x86 assembly (clang, -O0):
<pcapack_sdev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <pcapack_variance@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
call   1040 <sqrt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcapack_sdev>:
push   %rax
call   1030 <pcapack_variance@plt>
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1136 <pcapack_sdev+0x16>
sqrtsd %xmm0,%xmm0
pop    %rax
ret
pop    %rax
jmp    1040 <sqrt@plt>

LLVM IR (-O0):
define double @pcapack_sdev(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca double*
%5 = alloca double
store i32 %0, i32* %3
store double* %1, double** %4
%6 = load i32, i32* %3
%7 = load double*, double** %4
%8 = call double @pcapack_variance(i32 %6, double* %7)
store double %8, double* %5
%9 = load double, double* %5
%10 = call double @sqrt(double %9)
ret double %10
}

LLVM IR (-O2):
define double @pcapack_sdev(i32 %0, double* %1) {
%3 = tail call double @pcapack_variance(i32 %0, double* %1)
%4 = tail call double @sqrt(double %3)
ret double %4
}
int test_imm_81uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x81 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_81uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x81,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_81uint64_lowword_reg>:
test   $0x81,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_81uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 129
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_81uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 129
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int test_imm_79int16_reg(short val) {
  return ((val) & (0x79 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_79int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x79,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_79int16_reg>:
test   $0x79,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_79int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 121
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_79int16_reg(i16 signext %0) {
%2 = and i16 %0, 121
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void ADCIntEnable(uint32_t ui32Base, uint32_t ui32SequenceNum) {
  ;
  ;
  (*((volatile uint32_t *)(ui32Base + 0x0000000C))) = 1 << ui32SequenceNum;
  (*((volatile uint32_t *)(ui32Base + 0x00000008))) |= 1 << ui32SequenceNum;
}


x86 assembly (clang, -O0):
<ADCIntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
add    $0xc,%eax
cltq
mov    %ecx,(%rax)
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    -0x4(%rbp),%eax
add    $0x8,%eax
cltq
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCIntEnable>:
mov    %esi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %edi,%rcx
mov    %eax,0xc(%rcx)
or     %eax,0x8(%rcx)
ret

LLVM IR (-O0):
define void @ADCIntEnable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 1, %5
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 12
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
store volatile i32 %6, i32* %10
%11 = load i32, i32* %4
%12 = shl i32 1, %11
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 8
%15 = sext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
%17 = load volatile i32, i32* %16
%18 = or i32 %17, %12
store volatile i32 %18, i32* %16
ret void
}

LLVM IR (-O2):
define void @ADCIntEnable(i32 %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = add nsw i32 %0, 12
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
store volatile i32 %3, i32* %6
%7 = add nsw i32 %0, 8
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
%10 = load volatile i32, i32* %9
%11 = or i32 %10, %3
store volatile i32 %11, i32* %9
ret void
}
/* Variables and functions */
double getXRange(double *, size_t, double, double);
double getXRangeHalving(double *equation, size_t degree) {
  return getXRange(equation, degree, -100.0, 100.0);
}


x86 assembly (clang, -O0):
<getXRangeHalving>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movsd  0xed0(%rip),%xmm0
movsd  0xed0(%rip),%xmm1
call   1030 <getXRange@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getXRangeHalving>:
movsd  0xee8(%rip),%xmm0
movsd  0xee8(%rip),%xmm1
jmp    1030 <getXRange@plt>

LLVM IR (-O0):
define double @getXRangeHalving(double* %0, i64 %1) {
%3 = alloca double*
%4 = alloca i64
store double* %0, double** %3
store i64 %1, i64* %4
%5 = load double*, double** %3
%6 = load i64, i64* %4
%7 = call double @getXRange(double* %5, i64 %6, double -1.000000e+02, double 1.000000e+02)
ret double %7
}

LLVM IR (-O2):
define double @getXRangeHalving(double* %0, i64 %1) {
%3 = tail call double @getXRange(double* %0, i64 %1, double -1.000000e+02, double 1.000000e+02)
ret double %3
}
double _Complex div_double_rc(double a, double _Complex b) { return a / b; }


x86 assembly (clang, -O0):
<div_double_rc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm1,-0x20(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
movsd  -0x20(%rbp),%xmm2
movsd  -0x18(%rbp),%xmm3
xorps  %xmm1,%xmm1
call   1150 <__divdc3>
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x8(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
add    $0x30,%rsp
pop    %rbp
ret
nopl   0x0(%rax,%rax,1)

x86 assembly (clang, -O2):
<div_double_rc>:
movaps %xmm2,%xmm3
movaps %xmm1,%xmm2
xorps  %xmm1,%xmm1
jmp    1110 <__divdc3>
xchg   %ax,%ax

LLVM IR (-O0):
define { double, double } @div_double_rc(double %0, double %1, double %2) {
%4 = alloca { double, double }
%5 = alloca { double, double }
%6 = alloca double
%7 = getelementptr inbounds { double, double }, { double, double }* %5, i32 0, i32 0
store double %1, double* %7
%8 = getelementptr inbounds { double, double }, { double, double }* %5, i32 0, i32 1
store double %2, double* %8
store double %0, double* %6
%9 = load double, double* %6
%10 = getelementptr inbounds { double, double }, { double, double }* %5, i32 0, i32 0
%11 = load double, double* %10
%12 = getelementptr inbounds { double, double }, { double, double }* %5, i32 0, i32 1
%13 = load double, double* %12
%14 = call { double, double } @__divdc3(double %9, double 0.000000e+00, double %11, double %13)
%15 = extractvalue { double, double } %14, 0
%16 = extractvalue { double, double } %14, 1
%17 = getelementptr inbounds { double, double }, { double, double }* %4, i32 0, i32 0
%18 = getelementptr inbounds { double, double }, { double, double }* %4, i32 0, i32 1
store double %15, double* %17
store double %16, double* %18
%19 = load { double, double }, { double, double }* %4
ret { double, double } %19
}

LLVM IR (-O2):
define { double, double } @div_double_rc(double %0, double %1, double %2) {
%4 = tail call { double, double } @__divdc3(double %0, double 0.000000e+00, double %1, double %2)
ret { double, double } %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ show_term(char const *, int *, int /*<<< orphan*/ *);
void ei_efprint(FILE *stream, const char *termbuf) {
  int index = 0;
  show_term(termbuf, &index, stream);
}


x86 assembly (clang, -O0):
<ei_efprint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rdx
lea    -0x14(%rbp),%rsi
call   1030 <show_term@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ei_efprint>:
push   %rax
mov    %rsi,%rax
mov    %rdi,%rdx
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    %rax,%rdi
call   1030 <show_term@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @ei_efprint(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
%5 = alloca i32
store i32* %0, i32** %3
store i8* %1, i8** %4
store i32 0, i32* %5
%6 = load i8*, i8** %4
%7 = load i32*, i32** %3
%8 = call i32 @show_term(i8* %6, i32* %5, i32* %7)
ret void
}

LLVM IR (-O2):
define void @ei_efprint(i32* %0, i8* %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
store i32 0, i32* %3
%5 = call i32 @show_term(i8* %1, i32* %3, i32* %0)
ret void
}