xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ strcmp(void const *, void const *);
int _compare(const void *s1, const void *s2) { return !strcmp(s1, s2); }


x86 assembly (clang, -O0):
<_compare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_compare>:
push   %rax
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @_compare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @_compare(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
int digitp(int c) {
  int ret = 0;
  switch (c) {
  case '0':
  case '1':
  case '2':
  case '3':
  case '4':
  case '5':
  case '6':
  case '7':
  case '8':
  case '9':
    ret = 1;
    break;
  }
  return ret;
}


x86 assembly (clang, -O0):
<digitp>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffd0,%eax
sub    $0x9,%eax
ja     1129 <digitp+0x29>
jmp    1122 <digitp+0x22>
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<digitp>:
add    $0xffffffd0,%edi
xor    %eax,%eax
cmp    $0xa,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @digitp(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
switch i32 %4, label %6 [
i32 48, label %5
i32 49, label %5
i32 50, label %5
i32 51, label %5
i32 52, label %5
i32 53, label %5
i32 54, label %5
i32 55, label %5
i32 56, label %5
i32 57, label %5
]
5: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
store i32 1, i32* %3
br label %6
6: ; preds = %1, %5
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @digitp(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int w5100_writeSn(unsigned int, int, int /*<<< orphan*/ *, int);
unsigned w5100_writeSnDIPR(unsigned sock, uint8_t *buf) {
  return w5100_writeSn(sock, 0x000C, buf, 4);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rdx
mov    $0xc,%esi
mov    $0x4,%ecx
call   1030 <w5100_writeSn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    %rsi,%rdx
mov    $0xc,%esi
mov    $0x4,%ecx
jmp    1030 <w5100_writeSn@plt>

LLVM IR (-O0):
define i32 @w5100_writeSnDIPR(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = call i32 @w5100_writeSn(i32 %5, i32 12, i32* %6, i32 4)
ret i32 %7
}

LLVM IR (-O2):
define i32 @w5100_writeSnDIPR(i32 %0, i32* %1) {
%3 = tail call i32 @w5100_writeSn(i32 %0, i32 12, i32* %1, i32 4)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ PIT_DriverIRQHandler();
__attribute__((weak)) void PIT_IRQHandler(void) { PIT_DriverIRQHandler(); }


x86 assembly (clang, -O0):
<PIT_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <PIT_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PIT_IRQHandler>:
xor    %eax,%eax
jmp    1030 <PIT_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @PIT_IRQHandler() {
%1 = call i32 (...) @PIT_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @PIT_IRQHandler() {
%1 = tail call i32 (...) @PIT_DriverIRQHandler()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ lockname;

/* Variables and functions */
int FILENAME_MAX;
int /*<<< orphan*/ snprintf(char *, int, char *, char const *, char const *);
int waitnolock(char *, int);
int donewlock(char const *calldir, char const *sysname) {
  char lockname[FILENAME_MAX];
  snprintf(lockname, sizeof(lockname),
           "%s/%s/"
           "prearc.lck",
           calldir, sysname);
  return (waitnolock(lockname, 180));
}


x86 assembly (clang, -O0):
<donewlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb1(%rip),%rax
mov    (%rax),%eax
mov    %rsp,%rcx
mov    %rcx,-0x18(%rbp)
mov    %rax,%rcx
add    $0xf,%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rdi
sub    %rcx,%rdi
mov    %rdi,-0x28(%rbp)
mov    %rdi,%rsp
mov    %rax,-0x20(%rbp)
mov    %eax,%esi
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%r8
lea    0xe93(%rip),%rdx
call   1030 <snprintf@plt>
mov    -0x28(%rbp),%rdi
mov    $0xb4,%esi
call   1040 <waitnolock@plt>
mov    -0x18(%rbp),%rcx
mov    %rcx,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<donewlock>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
push   %rax
mov    %rsi,%r8
mov    %rdi,%rcx
mov    0x2eb5(%rip),%rax
mov    (%rax),%esi
mov    %rsp,%rbx
mov    %rsi,%rax
add    $0xf,%rax
and    $0xfffffffffffffff0,%rax
sub    %rax,%rbx
mov    %rbx,%rsp
lea    0xeb0(%rip),%rdx
mov    %rbx,%rdi
call   1030 <snprintf@plt>
mov    %rbx,%rdi
mov    $0xb4,%esi
call   1040 <waitnolock@plt>
lea    -0x8(%rbp),%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@FILENAME_MAX = global i32 0
@.str = [17 x i8] c"%s/%s/prearc.lck\00"
define i32 @donewlock(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i32, i32* @FILENAME_MAX
%8 = zext i32 %7 to i64
%9 = call i8* @llvm.stacksave()
store i8* %9, i8** %5
%10 = alloca i8, i64 %8
store i64 %8, i64* %6
%11 = trunc i64 %8 to i32
%12 = load i8*, i8** %3
%13 = load i8*, i8** %4
%14 = call i32 @snprintf(i8* %10, i32 %11, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* %12, i8* %13)
%15 = call i32 @waitnolock(i8* %10, i32 180)
%16 = load i8*, i8** %5
ret i32 %15
}

LLVM IR (-O2):
@FILENAME_MAX = global i32 0
@.str = [17 x i8] c"%s/%s/prearc.lck\00"
define i32 @donewlock(i8* %0, i8* %1) {
%3 = load i32, i32* @FILENAME_MAX
%4 = zext i32 %3 to i64
%5 = alloca i8, i64 %4
%6 = call i32 @snprintf(i8* %5, i32 %3, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%7 = call i32 @waitnolock(i8* %5, i32 180)
ret i32 %7
}
void foo351() {}


x86 assembly (clang, -O0):
<foo351>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo351>:
ret

LLVM IR (-O0):
define void @foo351() {
ret void
}

LLVM IR (-O2):
define void @foo351() {
ret void
}
void foo2(int *a) { *a = 2; }


x86 assembly (clang, -O0):
<foo2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x2,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo2>:
movl   $0x2,(%rdi)
ret

LLVM IR (-O0):
define void @foo2(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
store i32 2, i32* %3
ret void
}

LLVM IR (-O2):
define void @foo2(i32* nocapture writeonly %0) {
store i32 2, i32* %0
ret void
}
int test_imm_C5uint32_reg(unsigned int val) {
  return ((val) & (0xC5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C5uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xc5,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C5uint32_reg>:
test   $0xc5,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C5uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 197
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_C5uint32_reg(i32 %0) {
%2 = and i32 %0, 197
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int a;
  scanf("%d", &a);
  if (a % 2 != 1 && a % 2 != -1) {
    printf("%d\n", a - 1);
  } else {
    printf("%d\n", a);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x1,%edx
je     117e <main+0x5e>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0xffffffff,%edx
je     117e <main+0x5e>
mov    -0x8(%rbp),%esi
sub    $0x1,%esi
lea    0xe8f(%rip),%rdi
call   1030 <printf@plt>
jmp    118d <main+0x6d>
mov    -0x8(%rbp),%esi
lea    0xe7b(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%esi
mov    %esi,%ecx
shr    $0x1f,%ecx
add    %esi,%ecx
and    $0xfffffffe,%ecx
mov    %esi,%eax
sub    %ecx,%eax
cmp    $0xffffffff,%eax
je     1151 <main+0x31>
cmp    $0x1,%eax
je     1151 <main+0x31>
add    $0xffffffff,%esi
lea    0xeab(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = srem i32 %4, 2
%6 = icmp ne i32 %5, 1
br i1 %6, label %7, label %15
7: ; preds = %0
%8 = load i32, i32* %2
%9 = srem i32 %8, 2
%10 = icmp ne i32 %9, -1
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = load i32, i32* %2
%13 = sub nsw i32 %12, 1
%14 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %13)
br label %18
15: ; preds = %7, %0
%16 = load i32, i32* %2
%17 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %16)
br label %18
18: ; preds = %15, %11
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = srem i32 %4, 2
switch i32 %5, label %6 [
i32 1, label %8
i32 -1, label %8
]
6: ; preds = %0
%7 = add nsw i32 %4, -1
br label %8
8: ; preds = %0, %0, %6
%9 = phi i32 [ %7, %6 ], [ %4, %0 ], [ %4, %0 ]
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %9)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ PPI_DoPortBInput();
unsigned int ppi_read_port(int);
unsigned int PPI_ReadPortB(void) {
  PPI_DoPortBInput();
  return ppi_read_port(1);
}


x86 assembly (clang, -O0):
<PPI_ReadPortB>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <PPI_DoPortBInput@plt>
mov    $0x1,%edi
call   1030 <ppi_read_port@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PPI_ReadPortB>:
push   %rax
xor    %eax,%eax
call   1040 <PPI_DoPortBInput@plt>
mov    $0x1,%edi
pop    %rax
jmp    1030 <ppi_read_port@plt>

LLVM IR (-O0):
define i32 @PPI_ReadPortB() {
%1 = call i32 (...) @PPI_DoPortBInput()
%2 = call i32 @ppi_read_port(i32 1)
ret i32 %2
}

LLVM IR (-O2):
define i32 @PPI_ReadPortB() {
%1 = tail call i32 (...) @PPI_DoPortBInput()
%2 = tail call i32 @ppi_read_port(i32 1)
ret i32 %2
}
void ELMErrCorrectionLevelSet(unsigned int baseAddr, unsigned int bchECCLevel) {
  (*((volatile unsigned int *)(baseAddr + (0x20)))) |=
      (bchECCLevel << (0x00000000u));
}


x86 assembly (clang, -O0):
<ELMErrCorrectionLevelSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edx
shl    $0x0,%edx
mov    -0x4(%rbp),%eax
add    $0x20,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ELMErrCorrectionLevelSet>:
add    $0x20,%edi
or     %esi,(%rdi)
ret

LLVM IR (-O0):
define void @ELMErrCorrectionLevelSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 %5, 0
%7 = load i32, i32* %3
%8 = add i32 %7, 32
%9 = zext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
%11 = load volatile i32, i32* %10
%12 = or i32 %11, %6
store volatile i32 %12, i32* %10
ret void
}

LLVM IR (-O2):
define void @ELMErrCorrectionLevelSet(i32 %0, i32 %1) {
%3 = add i32 %0, 32
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = or i32 %6, %1
store volatile i32 %7, i32* %5
ret void
}
void bpars(double *a, double *b, double mean, double var) {
  double x2, g, xmean, x, m, v;
  double xa, xb, ym, yv;
  m = mean;
  v = var;
  x = (m * (1 - m) - v) / v;
  xa = x * m;
  xb = x * (1 - m);
  *a = xa;
  *b = xb;
}


x86 assembly (clang, -O0):
<bpars>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movsd  %xmm0,-0x18(%rbp)
movsd  %xmm1,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x48(%rbp)
movsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x50(%rbp)
movsd  -0x48(%rbp),%xmm0
movsd  0xec9(%rip),%xmm2
subsd  -0x48(%rbp),%xmm2
movsd  -0x50(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
divsd  -0x50(%rbp),%xmm0
movsd  %xmm0,-0x40(%rbp)
movsd  -0x40(%rbp),%xmm0
mulsd  -0x48(%rbp),%xmm0
movsd  %xmm0,-0x58(%rbp)
movsd  -0x40(%rbp),%xmm0
movsd  0xe7a(%rip),%xmm1
subsd  -0x48(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x60(%rbp)
movsd  -0x58(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
movsd  -0x60(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bpars>:
movsd  0xef8(%rip),%xmm2
subsd  %xmm0,%xmm2
movapd %xmm0,%xmm3
mulsd  %xmm2,%xmm3
subsd  %xmm1,%xmm3
divsd  %xmm1,%xmm3
mulsd  %xmm3,%xmm0
mulsd  %xmm2,%xmm3
movsd  %xmm0,(%rdi)
movsd  %xmm3,(%rsi)
ret

LLVM IR (-O0):
define void @bpars(double* %0, double* %1, double %2, double %3) {
%5 = alloca double*
%6 = alloca double*
%7 = alloca double
%8 = alloca double
%9 = alloca double
%10 = alloca double
%11 = alloca double
%12 = alloca double
%13 = alloca double
%14 = alloca double
%15 = alloca double
%16 = alloca double
%17 = alloca double
%18 = alloca double
store double* %0, double** %5
store double* %1, double** %6
store double %2, double* %7
store double %3, double* %8
%19 = load double, double* %7
store double %19, double* %13
%20 = load double, double* %8
store double %20, double* %14
%21 = load double, double* %13
%22 = load double, double* %13
%23 = fsub double 1.000000e+00, %22
%24 = load double, double* %14
%25 = fneg double %24
%26 = call double @llvm.fmuladd.f64(double %21, double %23, double %25)
%27 = load double, double* %14
%28 = fdiv double %26, %27
store double %28, double* %12
%29 = load double, double* %12
%30 = load double, double* %13
%31 = fmul double %29, %30
store double %31, double* %15
%32 = load double, double* %12
%33 = load double, double* %13
%34 = fsub double 1.000000e+00, %33
%35 = fmul double %32, %34
store double %35, double* %16
%36 = load double, double* %15
%37 = load double*, double** %5
store double %36, double* %37
%38 = load double, double* %16
%39 = load double*, double** %6
store double %38, double* %39
ret void
}

LLVM IR (-O2):
define void @bpars(double* nocapture writeonly %0, double* nocapture writeonly %1, double %2, double %3) {
%5 = fsub double 1.000000e+00, %2
%6 = fneg double %3
%7 = tail call double @llvm.fmuladd.f64(double %2, double %5, double %6)
%8 = fdiv double %7, %3
%9 = fmul double %8, %2
%10 = fmul double %5, %8
store double %9, double* %0
store double %10, double* %1
ret void
}
void avpriv_report_missing_feature() {}


x86 assembly (clang, -O0):
<avpriv_report_missing_feature>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avpriv_report_missing_feature>:
ret

LLVM IR (-O0):
define void @avpriv_report_missing_feature() {
ret void
}

LLVM IR (-O2):
define void @avpriv_report_missing_feature() {
ret void
}
int ohci_rh_resume(struct ohci_hcd *ohci) { return 0; }


x86 assembly (clang, -O0):
<ohci_rh_resume>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ohci_rh_resume>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ohci_hcd = type opaque
define i32 @ohci_rh_resume(%struct.ohci_hcd* %0) {
%2 = alloca %struct.ohci_hcd*
store %struct.ohci_hcd* %0, %struct.ohci_hcd** %2
ret i32 0
}

LLVM IR (-O2):
%struct.ohci_hcd = type opaque
define i32 @ohci_rh_resume(%struct.ohci_hcd* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int __VERIFIER_nondet_int();
scalar_t__ alloca(int);
int /*<<< orphan*/ sort(int *, int);
int main() {
  int array_size = __VERIFIER_nondet_int();
  if (array_size < 1 || array_size >= 2147483647 / sizeof(int)) {
    array_size = 1;
  }
  int *numbers = (int *)alloca(array_size * sizeof(int));
  sort(numbers, array_size);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jl     1163 <main+0x33>
movslq -0x8(%rbp),%rax
cmp    $0x1fffffff,%rax
jb     116a <main+0x3a>
movl   $0x1,-0x8(%rbp)
movslq -0x8(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edi
call   1040 <alloca@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%esi
call   1030 <sort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1050 <__VERIFIER_nondet_int@plt>
lea    -0x1fffffff(%rax),%ecx
cmp    $0xe0000002,%ecx
mov    $0x1,%ebx
cmovae %eax,%ebx
lea    0x0(,%rbx,4),%edi
call   1040 <alloca@plt>
mov    %rax,%rdi
mov    %ebx,%esi
call   1030 <sort@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 1
br i1 %6, label %11, label %7
7: ; preds = %0
%8 = load i32, i32* %2
%9 = sext i32 %8 to i64
%10 = icmp uge i64 %9, 536870911
br i1 %10, label %11, label %12
11: ; preds = %7, %0
store i32 1, i32* %2
br label %12
12: ; preds = %11, %7
%13 = load i32, i32* %2
%14 = sext i32 %13 to i64
%15 = mul i64 %14, 4
%16 = trunc i64 %15 to i32
%17 = call i64 @alloca(i32 %16)
%18 = inttoptr i64 %17 to i32*
store i32* %18, i32** %3
%19 = load i32*, i32** %3
%20 = load i32, i32* %2
%21 = call i32 @sort(i32* %19, i32 %20)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = add i32 %1, -536870911
%3 = icmp ult i32 %2, -536870910
%4 = select i1 %3, i32 1, i32 %1
%5 = shl nuw nsw i32 %4, 2
%6 = tail call i64 @alloca(i32 %5)
%7 = inttoptr i64 %6 to i32*
%8 = tail call i32 @sort(i32* %7, i32 %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0x22() {
  Assert_real((isalnum(34) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              175, ("isalnum should be 0 for 0x22"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x22>:
push   %rbp
mov    %rsp,%rbp
mov    $0x22,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xaf,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x22>:
push   %rax
mov    $0x22,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0xaf,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x22\00"
define void @t_isalnum_0x22() {
%1 = call i64 @isalnum(i32 34)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 175, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x22\00"
define void @t_isalnum_0x22() {
%1 = tail call i64 @isalnum(i32 34)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 175, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int LOAD_VAR_W(uintptr_t);
int LOAD_VAR_WL(uintptr_t addr) { return LOAD_VAR_W(addr); }


x86 assembly (clang, -O0):
<LOAD_VAR_WL>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <LOAD_VAR_W@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LOAD_VAR_WL>:
jmp    1030 <LOAD_VAR_W@plt>

LLVM IR (-O0):
define i32 @LOAD_VAR_WL(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @LOAD_VAR_W(i64 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @LOAD_VAR_WL(i64 %0) {
%2 = tail call i32 @LOAD_VAR_W(i64 %0)
ret i32 %2
}
/* Variables and functions */
float ANTweenTimingFunctionQuadOut(float, int /*<<< orphan*/, int, float);
float ANTweenProgressTimingFunctionQuadOut(float time, float duration) {
  return ANTweenTimingFunctionQuadOut(time, 0, 1, duration);
}


x86 assembly (clang, -O0):
<ANTweenProgressTimingFunctionQuadOut>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <ANTweenTimingFunctionQuadOut@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ANTweenProgressTimingFunctionQuadOut>:
xor    %edi,%edi
mov    $0x1,%esi
jmp    1030 <ANTweenTimingFunctionQuadOut@plt>

LLVM IR (-O0):
define float @ANTweenProgressTimingFunctionQuadOut(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call float @ANTweenTimingFunctionQuadOut(float %5, i32 0, i32 1, float %6)
ret float %7
}

LLVM IR (-O2):
define float @ANTweenProgressTimingFunctionQuadOut(float %0, float %1) {
%3 = tail call float @ANTweenTimingFunctionQuadOut(float %0, i32 0, i32 1, float %1)
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ ND_Screen_Put(char const);
void ND_Screen_WriteString(const char *c) {
  int i = 0;
  while (c[i]) {
    ND_Screen_Put(c[i++]);
  }
}


x86 assembly (clang, -O0):
<ND_Screen_WriteString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1155 <ND_Screen_WriteString+0x45>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0xc(%rbp)
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <ND_Screen_Put@plt>
jmp    1123 <ND_Screen_WriteString+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ND_Screen_WriteString>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <ND_Screen_WriteString+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <ND_Screen_Put@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <ND_Screen_WriteString+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @ND_Screen_WriteString(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %4
%12 = load i8*, i8** %2
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
%15 = sext i32 %13 to i64
%16 = getelementptr inbounds i8, i8* %12, i64 %15
%17 = load i8, i8* %16
%18 = call i32 @ND_Screen_Put(i8 signext %17)
br label %4
19: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @ND_Screen_WriteString(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %7, %4 ], [ 0, %1 ]
%6 = phi i8 [ %10, %4 ], [ %2, %1 ]
%7 = add nuw i64 %5, 1
%8 = tail call i32 @ND_Screen_Put(i8 signext %6)
%9 = getelementptr inbounds i8, i8* %0, i64 %7
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *aiger_default_malloc(void *state, size_t bytes) { return malloc(bytes); }


x86 assembly (clang, -O0):
<aiger_default_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aiger_default_malloc>:
mov    %rsi,%rdi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @aiger_default_malloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = call i8* @malloc(i64 %5)
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @aiger_default_malloc(i8* nocapture readnone %0, i64 %1) {
%3 = tail call i8* @malloc(i64 %1)
ret i8* %3
}
/* Variables and functions */
scalar_t__ SIGABRT;
int /*<<< orphan*/ exit(scalar_t__);
void abort() { exit(128 + SIGABRT); }


x86 assembly (clang, -O0):
<abort>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%rdi
add    $0x80,%rdi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<abort>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%rdi
sub    $0xffffffffffffff80,%rdi
call   1030 <exit@plt>

LLVM IR (-O0):
@SIGABRT = global i64 0
define void @abort() {
%1 = load i64, i64* @SIGABRT
%2 = add nsw i64 128, %1
%3 = call i32 @exit(i64 %2)
unreachable
}

LLVM IR (-O2):
@SIGABRT = global i64 0
define void @abort() {
%1 = load i64, i64* @SIGABRT
%2 = add nsw i64 %1, 128
%3 = tail call i32 @exit(i64 %2)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ moovement;

/* Variables and functions */
int /*<<< orphan*/ write(int, int *, int);
void moove_cursor(int moove) {
  int moovement[2];
  moovement[0] = moove;
  moovement[1] = moove;
  write(1, moovement, sizeof(moovement));
}


x86 assembly (clang, -O0):
<moove_cursor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
lea    -0xc(%rbp),%rsi
mov    $0x1,%edi
mov    $0x8,%edx
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<moove_cursor>:
push   %rax
mov    %edi,(%rsp)
mov    %edi,0x4(%rsp)
mov    %rsp,%rsi
mov    $0x1,%edi
mov    $0x8,%edx
call   1030 <write@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @moove_cursor(i32 %0) {
%2 = alloca i32
%3 = alloca [2 x i32]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = getelementptr inbounds [2 x i32], [2 x i32]* %3, i64 0, i64 0
store i32 %4, i32* %5
%6 = load i32, i32* %2
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %3, i64 0, i64 1
store i32 %6, i32* %7
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %3, i64 0, i64 0
%9 = call i32 @write(i32 1, i32* %8, i32 8)
ret void
}

LLVM IR (-O2):
define void @moove_cursor(i32 %0) {
%2 = alloca [2 x i32]
%3 = bitcast [2 x i32]* %2 to i8*
%4 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 0
store i32 %0, i32* %4
%5 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 1
store i32 %0, i32* %5
%6 = call i32 @write(i32 1, i32* %4, i32 8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void print(const char *string) { printf("%s\n", string); }


x86 assembly (clang, -O0):
<print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @print(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @print(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
typedef int const int64_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int32_t quantization32(int64_t x, const int fractional_digits) {
  return (int32_t)(x >> fractional_digits);
}


x86 assembly (clang, -O0):
<quantization32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<quantization32>:
mov    %esi,%ecx
mov    %edi,%eax
sar    %cl,%eax
ret

LLVM IR (-O0):
define i32 @quantization32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = ashr i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @quantization32(i32 %0, i32 %1) {
%3 = ashr i32 %0, %1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isbdigit(int);
void t_isbdigit_0x9d() {
  Assert_real((isbdigit(157) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isbdigit.c",
              790, ("isbdigit should be 0 for 0x9d"));
}


x86 assembly (clang, -O0):
<t_isbdigit_0x9d>:
push   %rbp
mov    %rsp,%rbp
mov    $0x9d,%edi
call   1040 <isbdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x316,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isbdigit_0x9d>:
push   %rax
mov    $0x9d,%edi
call   1040 <isbdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x316,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0x9d\00"
define void @t_isbdigit_0x9d() {
%1 = call i64 @isbdigit(i32 157)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 790, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0x9d\00"
define void @t_isbdigit_0x9d() {
%1 = tail call i64 @isbdigit(i32 157)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 790, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
R0RX1(r0, r1, x0, x1, p0, p1) char r0, r1;
char *p0, *p1;
{ r0 = (p1[x1]); }


x86 assembly (clang, -O0):
<R0RX1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %dil,%sil
mov    %sil,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<R0RX1>:
ret

LLVM IR (-O0):
define i32 @R0RX1(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4, i8* %5) {
%7 = alloca i32
%8 = alloca i8
%9 = alloca i8
%10 = alloca i32
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i8*
%14 = trunc i32 %0 to i8
%15 = trunc i32 %1 to i8
store i8 %14, i8* %8
store i8 %15, i8* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i8* %4, i8** %12
store i8* %5, i8** %13
%16 = load i8*, i8** %13
%17 = load i32, i32* %11
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
%20 = load i8, i8* %19
store i8 %20, i8* %8
%21 = load i32, i32* %7
ret i32 %21
}

LLVM IR (-O2):
define i32 @R0RX1(i32 %0, i32 %1, i32 %2, i32 %3, i8* nocapture readnone %4, i8* nocapture readnone %5) {
ret i32 undef
}
int min4(int x1, int x2, int x3, int x4) {
  int m;
  m = x1;
  if (x2 < m)
    m = x2;
  if (x3 < m)
    m = x3;
  if (x4 < m) {
    return x4;
  } else {
    return m;
  }
}


x86 assembly (clang, -O0):
<min4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    1128 <min4+0x28>
mov    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    113a <min4+0x3a>
mov    -0x10(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    1151 <min4+0x51>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1157 <min4+0x57>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min4>:
mov    %edi,%eax
cmp    %edi,%esi
cmovl  %esi,%eax
cmp    %edx,%eax
cmovg  %edx,%eax
cmp    %ecx,%eax
cmovg  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @min4(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
%11 = load i32, i32* %6
store i32 %11, i32* %10
%12 = load i32, i32* %7
%13 = load i32, i32* %10
%14 = icmp slt i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %4
%16 = load i32, i32* %7
store i32 %16, i32* %10
br label %17
17: ; preds = %15, %4
%18 = load i32, i32* %8
%19 = load i32, i32* %10
%20 = icmp slt i32 %18, %19
br i1 %20, label %21, label %23
21: ; preds = %17
%22 = load i32, i32* %8
store i32 %22, i32* %10
br label %23
23: ; preds = %21, %17
%24 = load i32, i32* %9
%25 = load i32, i32* %10
%26 = icmp slt i32 %24, %25
br i1 %26, label %27, label %29
27: ; preds = %23
%28 = load i32, i32* %9
store i32 %28, i32* %5
br label %31
29: ; preds = %23
%30 = load i32, i32* %10
store i32 %30, i32* %5
br label %31
31: ; preds = %29, %27
%32 = load i32, i32* %5
ret i32 %32
}

LLVM IR (-O2):
define i32 @min4(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp slt i32 %1, %0
%6 = select i1 %5, i32 %1, i32 %0
%7 = icmp sgt i32 %6, %2
%8 = select i1 %7, i32 %2, i32 %6
%9 = icmp sgt i32 %8, %3
%10 = select i1 %9, i32 %3, i32 %8
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutexattr_t;

/* Variables and functions */
int pthread_mutexattr_destroy(pthread_mutexattr_t *attr) {
  (void)attr;
  return 0;
}


x86 assembly (clang, -O0):
<pthread_mutexattr_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_mutexattr_destroy>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pthread_mutexattr_destroy(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @pthread_mutexattr_destroy(i32* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
double sqrt(int);
double func6(double x) { return sqrt(42 + x * x); }


x86 assembly (clang, -O0):
<func6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xecd(%rip),%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func6>:
mulsd  %xmm0,%xmm0
addsd  0xee4(%rip),%xmm0
cvttsd2si %xmm0,%edi
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @func6(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = call double @llvm.fmuladd.f64(double %3, double %4, double 4.200000e+01)
%6 = fptosi double %5 to i32
%7 = call double @sqrt(i32 %6)
ret double %7
}

LLVM IR (-O2):
define double @func6(double %0) {
%2 = tail call double @llvm.fmuladd.f64(double %0, double %0, double 4.200000e+01)
%3 = fptosi double %2 to i32
%4 = tail call double @sqrt(i32 %3)
ret double %4
}
int abs(int x) { return x *= (x < 0) ? -1 : 1; }


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0x1,%eax
mov    $0xffffffff,%ecx
cmp    $0x0,%edx
cmovl  %ecx,%eax
imul   -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 -1, i32 1
%7 = load i32, i32* %2
%8 = mul nsw i32 %7, %6
store i32 %8, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
int cairo_code_draw_envInLabel_get_height() { return 12; }


x86 assembly (clang, -O0):
<cairo_code_draw_envInLabel_get_height>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cairo_code_draw_envInLabel_get_height>:
mov    $0xc,%eax
ret

LLVM IR (-O0):
define i32 @cairo_code_draw_envInLabel_get_height() {
ret i32 12
}

LLVM IR (-O2):
define i32 @cairo_code_draw_envInLabel_get_height() {
ret i32 12
}
/* Variables and functions */
char *strdup(char *);
int strlen(char *);
int converter_convert(char *s, char **d_r, size_t insize, char *from,
                      char *to) {
  *d_r = strdup(s);
  return strlen(*d_r);
}


x86 assembly (clang, -O0):
<converter_convert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strdup@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1030 <strlen@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<converter_convert>:
push   %rbx
mov    %rsi,%rbx
call   1040 <strdup@plt>
mov    %rax,(%rbx)
mov    %rax,%rdi
pop    %rbx
jmp    1030 <strlen@plt>

LLVM IR (-O0):
define i32 @converter_convert(i8* %0, i8** %1, i64 %2, i8* %3, i8* %4) {
%6 = alloca i8*
%7 = alloca i8**
%8 = alloca i64
%9 = alloca i8*
%10 = alloca i8*
store i8* %0, i8** %6
store i8** %1, i8*** %7
store i64 %2, i64* %8
store i8* %3, i8** %9
store i8* %4, i8** %10
%11 = load i8*, i8** %6
%12 = call i8* @strdup(i8* %11)
%13 = load i8**, i8*** %7
store i8* %12, i8** %13
%14 = load i8**, i8*** %7
%15 = load i8*, i8** %14
%16 = call i32 @strlen(i8* %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @converter_convert(i8* nocapture %0, i8** nocapture writeonly %1, i64 %2, i8* nocapture readnone %3, i8* nocapture readnone %4) {
%6 = tail call i8* @strdup(i8* %0)
store i8* %6, i8** %1
%7 = tail call i32 @strlen(i8* %6)
ret i32 %7
}
/* Type definitions */
struct ber_element {
  int dummy;
};

/* Variables and functions */
struct ber_element *ber_get_element(int /*<<< orphan*/);
int /*<<< orphan*/ ber_link_elements(struct ber_element *,
                                     struct ber_element *);
struct ber_element *ber_add_eoc(struct ber_element *prev) {
  struct ber_element *elm;
  if ((elm = ber_get_element(0)) == NULL)
    return NULL;
  ber_link_elements(prev, elm);
  return elm;
}


x86 assembly (clang, -O0):
<ber_add_eoc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
xor    %edi,%edi
call   1030 <ber_get_element@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    114e <ber_add_eoc+0x2e>
movq   $0x0,-0x8(%rbp)
jmp    1163 <ber_add_eoc+0x43>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <ber_link_elements@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ber_add_eoc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %edi,%edi
call   1030 <ber_get_element@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1141 <ber_add_eoc+0x21>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <ber_link_elements@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.ber_element = type { i32 }
define %struct.ber_element* @ber_add_eoc(%struct.ber_element* %0) {
%2 = alloca %struct.ber_element*
%3 = alloca %struct.ber_element*
%4 = alloca %struct.ber_element*
store %struct.ber_element* %0, %struct.ber_element** %3
%5 = call %struct.ber_element* @ber_get_element(i32 0)
store %struct.ber_element* %5, %struct.ber_element** %4
%6 = icmp eq %struct.ber_element* %5, null
br i1 %6, label %7, label %8
7: ; preds = %1
store %struct.ber_element* null, %struct.ber_element** %2
br label %13
8: ; preds = %1
%9 = load %struct.ber_element*, %struct.ber_element** %3
%10 = load %struct.ber_element*, %struct.ber_element** %4
%11 = call i32 @ber_link_elements(%struct.ber_element* %9, %struct.ber_element* %10)
%12 = load %struct.ber_element*, %struct.ber_element** %4
store %struct.ber_element* %12, %struct.ber_element** %2
br label %13
13: ; preds = %8, %7
%14 = load %struct.ber_element*, %struct.ber_element** %2
ret %struct.ber_element* %14
}

LLVM IR (-O2):
%struct.ber_element = type { i32 }
define %struct.ber_element* @ber_add_eoc(%struct.ber_element* %0) {
%2 = tail call %struct.ber_element* @ber_get_element(i32 0)
%3 = icmp eq %struct.ber_element* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @ber_link_elements(%struct.ber_element* %0, %struct.ber_element* %2)
br label %6
6: ; preds = %1, %4
ret %struct.ber_element* %2
}
/* Variables and functions */
bool ret_bool() { return 3; }


x86 assembly (clang, -O0):
<ret_bool>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ret_bool>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @ret_bool() {
ret i32 3
}

LLVM IR (-O2):
define i32 @ret_bool() {
ret i32 3
}
f(int *restrict a, int *restrict b) {
  a = b + 1;
  a = (void *)(b[0] + 1);
  *a = *b;
  __builtin_trap();
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
add    $0x1,%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
ud2
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
movslq (%rsi),%rax
mov    %eax,0x1(%rax)
ud2

LLVM IR (-O0):
define i32 @f(i32* noalias %0, i32* noalias %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
%6 = load i32*, i32** %5
%7 = getelementptr inbounds i32, i32* %6, i64 1
store i32* %7, i32** %4
%8 = load i32*, i32** %5
%9 = getelementptr inbounds i32, i32* %8, i64 0
%10 = load i32, i32* %9
%11 = add nsw i32 %10, 1
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i8*
%14 = bitcast i8* %13 to i32*
store i32* %14, i32** %4
%15 = load i32*, i32** %5
%16 = load i32, i32* %15
%17 = load i32*, i32** %4
store i32 %16, i32* %17
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @f(i32* noalias nocapture readnone %0, i32* noalias nocapture %1) {
%3 = load i32, i32* %1
%4 = add nsw i32 %3, 1
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
store i32 %3, i32* %6
tail call void @llvm.trap()
unreachable
}
int isleap(unsigned year) {
  return year % 400 ? year % 100 ? year % 4 ? 0 : 1 : 0 : 1;
}


x86 assembly (clang, -O0):
<isleap>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
xor    %edx,%edx
div    %ecx
cmp    $0x0,%edx
je     1161 <isleap+0x61>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
xor    %edx,%edx
div    %ecx
cmp    $0x0,%edx
je     114c <isleap+0x4c>
mov    -0x4(%rbp),%edx
and    $0x3,%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %eax,-0x8(%rbp)
jmp    1156 <isleap+0x56>
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    1156 <isleap+0x56>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    116e <isleap+0x6e>
mov    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    116e <isleap+0x6e>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isleap>:
imul   $0xc28f5c29,%edi,%eax
mov    %eax,%ecx
ror    $0x4,%ecx
cmp    $0xa3d70b,%ecx
jb     1127 <isleap+0x27>
ror    $0x2,%eax
cmp    $0x28f5c29,%eax
jb     112d <isleap+0x2d>
xor    %eax,%eax
test   $0x3,%dil
sete   %al
ret
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isleap(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = urem i32 %3, 400
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %19
6: ; preds = %1
%7 = load i32, i32* %2
%8 = urem i32 %7, 100
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i32, i32* %2
%12 = urem i32 %11, 4
%13 = icmp ne i32 %12, 0
%14 = zext i1 %13 to i64
%15 = select i1 %13, i32 0, i32 1
br label %17
16: ; preds = %6
br label %17
17: ; preds = %16, %10
%18 = phi i32 [ %15, %10 ], [ 0, %16 ]
br label %20
19: ; preds = %1
br label %20
20: ; preds = %19, %17
%21 = phi i32 [ %18, %17 ], [ 1, %19 ]
ret i32 %21
}

LLVM IR (-O2):
define i32 @isleap(i32 %0) {
%2 = urem i32 %0, 400
%3 = icmp eq i32 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = urem i32 %0, 100
%6 = icmp eq i32 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = and i32 %0, 3
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %1, %7, %4
%12 = phi i32 [ %10, %7 ], [ 0, %4 ], [ 1, %1 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void sig_handler(int sig_num) {
  printf("\x1B[31m"
         " (fatal signal intercepted)\n"
         "\x1B[0m");
  exit(1);
}


x86 assembly (clang, -O0):
<sig_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<sig_handler>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [38 x i8] c"\1B[31m (fatal signal intercepted)\0A\1B[0m\00"
define void @sig_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [38 x i8] c"\1B[31m (fatal signal intercepted)\0A\1B[0m\00"
define void @sig_handler(i32 %0) {
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}