xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ f(int);
int /*<<< orphan*/ g(int);
int /*<<< orphan*/ m(int);
int /*<<< orphan*/ r(int);
int main() {
  static int x;
  static int y;
  if (12)
    f(4 + 3);
  g(4 + 3);
  m(3 + 3);
  g(3 + 3);
  r(3 + 4);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7,%edi
call   1040 <f@plt>
mov    $0x7,%edi
call   1050 <g@plt>
mov    $0x6,%edi
call   1060 <m@plt>
mov    $0x6,%edi
call   1050 <g@plt>
mov    $0x7,%edi
call   1030 <r@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x7,%edi
call   1040 <f@plt>
mov    $0x7,%edi
call   1050 <g@plt>
mov    $0x6,%edi
call   1060 <m@plt>
mov    $0x6,%edi
call   1050 <g@plt>
mov    $0x7,%edi
call   1030 <r@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@main.x = internal global i32 0
@main.y = internal global i32 0
define i32 @main() {
%1 = call i32 @f(i32 7)
%2 = call i32 @g(i32 7)
%3 = call i32 @m(i32 6)
%4 = call i32 @g(i32 6)
%5 = call i32 @r(i32 7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @f(i32 7)
%2 = tail call i32 @g(i32 7)
%3 = tail call i32 @m(i32 6)
%4 = tail call i32 @g(i32 6)
%5 = tail call i32 @r(i32 7)
ret i32 0
}
void RTMemPoolDup(void) {}


x86 assembly (clang, -O0):
<RTMemPoolDup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTMemPoolDup>:
ret

LLVM IR (-O0):
define void @RTMemPoolDup() {
ret void
}

LLVM IR (-O2):
define void @RTMemPoolDup() {
ret void
}
/* Type definitions */
struct file_state {
  int dummy;
};

/* Variables and functions */
char *next_char(struct file_state *, char const *, int);
size_t char_strlen(struct file_state *file, const char *src, const char *end) {
  size_t len;
  len = 0;
  while (src < end) {
    src = next_char(file, src, 1);
    len++;
  }
  return len;
}


x86 assembly (clang, -O0):
<char_strlen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1161 <char_strlen+0x51>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <next_char@plt>
mov    %rax,-0x10(%rbp)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    112c <char_strlen+0x1c>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<char_strlen>:
push   %r15
push   %r14
push   %rbx
cmp    %rdx,%rsi
jae    114b <char_strlen+0x3b>
mov    %rdx,%r14
mov    %rsi,%rax
mov    %rdi,%r15
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nop
mov    %r15,%rdi
mov    %rax,%rsi
mov    $0x1,%edx
call   1030 <next_char@plt>
add    $0x1,%rbx
cmp    %r14,%rax
jb     1130 <char_strlen+0x20>
jmp    114d <char_strlen+0x3d>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.file_state = type { i32 }
define i64 @char_strlen(%struct.file_state* %0, i8* %1, i8* %2) {
%4 = alloca %struct.file_state*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
store %struct.file_state* %0, %struct.file_state** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
store i64 0, i64* %7
br label %8
8: ; preds = %12, %3
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = icmp ult i8* %9, %10
br i1 %11, label %12, label %18
12: ; preds = %8
%13 = load %struct.file_state*, %struct.file_state** %4
%14 = load i8*, i8** %5
%15 = call i8* @next_char(%struct.file_state* %13, i8* %14, i32 1)
store i8* %15, i8** %5
%16 = load i64, i64* %7
%17 = add i64 %16, 1
store i64 %17, i64* %7
br label %8
18: ; preds = %8
%19 = load i64, i64* %7
ret i64 %19
}

LLVM IR (-O2):
%struct.file_state = type { i32 }
define i64 @char_strlen(%struct.file_state* %0, i8* %1, i8* readnone %2) {
%4 = icmp ult i8* %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i64 [ %9, %5 ], [ 0, %3 ]
%7 = phi i8* [ %8, %5 ], [ %1, %3 ]
%8 = tail call i8* @next_char(%struct.file_state* %0, i8* %7, i32 1)
%9 = add i64 %6, 1
%10 = icmp ult i8* %8, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
%12 = phi i64 [ 0, %3 ], [ %9, %5 ]
ret i64 %12
}
int ValidateBasePair(char c) {
  switch (c) {
  case 'a':
  case 'c':
  case 'g':
  case 't':
  case 'A':
  case 'C':
  case 'G':
  case 'T':
  case 'n':
  case 'N':
  case '.':
    return 1;
    break;
  default:
    return 0;
    break;
  }
}


x86 assembly (clang, -O0):
<ValidateBasePair>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
add    $0xffffffd2,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x46,%eax
ja     1140 <ValidateBasePair+0x40>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x4(%rbp)
jmp    1147 <ValidateBasePair+0x47>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ValidateBasePair>:
add    $0xffffffd2,%edi
cmp    $0x46,%edi
ja     111e <ValidateBasePair+0x1e>
mov    $0x1,%eax
lea    0xeec(%rip),%rcx
movslq (%rcx,%rdi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ValidateBasePair(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %7 [
i32 97, label %6
i32 99, label %6
i32 103, label %6
i32 116, label %6
i32 65, label %6
i32 67, label %6
i32 71, label %6
i32 84, label %6
i32 110, label %6
i32 78, label %6
i32 46, label %6
]
6: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @ValidateBasePair(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %3 [
i32 97, label %4
i32 99, label %4
i32 103, label %4
i32 116, label %4
i32 65, label %4
i32 67, label %4
i32 71, label %4
i32 84, label %4
i32 110, label %4
i32 78, label %4
i32 46, label %4
]
3: ; preds = %1
br label %4
4: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %3
%5 = phi i32 [ 0, %3 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %5
}
double Bbp0b(double x) { return -1.0; }


x86 assembly (clang, -O0):
<Bbp0b>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Bbp0b>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @Bbp0b(double %0) {
%2 = alloca double
store double %0, double* %2
ret double -1.000000e+00
}

LLVM IR (-O2):
define double @Bbp0b(double %0) {
ret double -1.000000e+00
}
void XkbKeycodeToKeysym() {}


x86 assembly (clang, -O0):
<XkbKeycodeToKeysym>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XkbKeycodeToKeysym>:
ret

LLVM IR (-O0):
define void @XkbKeycodeToKeysym() {
ret void
}

LLVM IR (-O2):
define void @XkbKeycodeToKeysym() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ErrorFatal(char *);
scalar_t__ malloc(int);
char *NewChar(int i) {
  char *c = (char *)malloc(sizeof(char));
  if (c == NULL)
    ErrorFatal("Not enought of memory");
  *c = (char)i;
  return (c);
}


x86 assembly (clang, -O0):
<NewChar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <NewChar+0x30>
lea    0xeb5(%rip),%rdi
call   1040 <ErrorFatal@plt>
mov    -0x4(%rbp),%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NewChar>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
mov    $0x1,%edi
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1143 <NewChar+0x23>
lea    0xec2(%rip),%rdi
call   1040 <ErrorFatal@plt>
mov    %bpl,(%rbx)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [22 x i8] c"Not enought of memory\00"
define i8* @NewChar(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = call i64 @malloc(i32 1)
%5 = inttoptr i64 %4 to i8*
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @ErrorFatal(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i32, i32* %2
%12 = trunc i32 %11 to i8
%13 = load i8*, i8** %3
store i8 %12, i8* %13
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
@.str = [22 x i8] c"Not enought of memory\00"
define i8* @NewChar(i32 %0) {
%2 = tail call i64 @malloc(i32 1)
%3 = inttoptr i64 %2 to i8*
%4 = icmp eq i64 %2, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @ErrorFatal(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %1
%8 = trunc i32 %0 to i8
store i8 %8, i8* %3
ret i8* %3
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  unsigned long window;
};
struct TYPE_4__ {
  TYPE_1__ xcrossing;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xcrossing_window(void *_p, unsigned long _v) {
  ((XEvent *)_p)->xcrossing.window = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xcrossing_window>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xcrossing_window>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define void @set_XEvent_xcrossing_window(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i64 %5, i64* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xcrossing_window(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
double test_atan(double x) { return __builtin_atan(x); }


x86 assembly (clang, -O0):
<test_atan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <atan@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_atan>:
jmp    1030 <atan@plt>

LLVM IR (-O0):
define double @test_atan(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @atan(double %3)
ret double %4
}

LLVM IR (-O2):
define double @test_atan(double %0) {
%2 = tail call double @atan(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int errno;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ sprintf(char *, char *, int, char const *);
void error(const char *fun_name) {
  char info[20];
  int tmp_errno = errno;
  sprintf(info, "error %d in function %s", tmp_errno, fun_name);
  errno = tmp_errno;
  perror(info);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e9d(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x24(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%edx
mov    -0x8(%rbp),%rcx
lea    0xea6(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x24(%rbp),%ecx
mov    0x2e77(%rip),%rax
mov    %ecx,(%rax)
lea    -0x20(%rbp),%rdi
call   1030 <perror@plt>
mov    0x2e5d(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<error>:
push   %r15
push   %r14
push   %rbx
sub    $0x20,%rsp
mov    %rdi,%rcx
mov    0x2e9d(%rip),%r15
mov    (%r15),%ebx
lea    0xeb3(%rip),%rsi
mov    %rsp,%r14
mov    %r14,%rdi
mov    %ebx,%edx
call   1040 <sprintf@plt>
mov    %ebx,(%r15)
mov    %r14,%rdi
call   1030 <perror@plt>
mov    0x2e6c(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@errno = global i32 0
@.str = [24 x i8] c"error %d in function %s\00"
@EXIT_FAILURE = global i32 0
define void @error(i8* %0) {
%2 = alloca i8*
%3 = alloca [20 x i8]
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i32, i32* @errno
store i32 %5, i32* %4
%6 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i64 0, i64 0
%7 = load i32, i32* %4
%8 = load i8*, i8** %2
%9 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %7, i8* %8)
%10 = load i32, i32* %4
store i32 %10, i32* @errno
%11 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i64 0, i64 0
%12 = call i32 @perror(i8* %11)
%13 = load i32, i32* @EXIT_FAILURE
%14 = call i32 @exit(i32 %13)
unreachable
}

LLVM IR (-O2):
@errno = global i32 0
@.str = [24 x i8] c"error %d in function %s\00"
@EXIT_FAILURE = global i32 0
define void @error(i8* %0) {
%2 = alloca [20 x i8]
%3 = getelementptr inbounds [20 x i8], [20 x i8]* %2, i64 0, i64 0
%4 = load i32, i32* @errno
%5 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %4, i8* %0)
store i32 %4, i32* @errno
%6 = call i32 @perror(i8* %3)
%7 = load i32, i32* @EXIT_FAILURE
%8 = tail call i32 @exit(i32 %7)
unreachable
}
unsigned long rho_ruby_array_get(unsigned long ar, int nIndex) { return 0; }


x86 assembly (clang, -O0):
<rho_ruby_array_get>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rho_ruby_array_get>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @rho_ruby_array_get(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
ret i64 0
}

LLVM IR (-O2):
define i64 @rho_ruby_array_get(i64 %0, i32 %1) {
ret i64 0
}
/* Variables and functions */
scalar_t__ round(float const);
int frequency_to_control(const float frequency) {
  const int PLLFREQ = 500000000;
  const float PLL_MHZ = (float)PLLFREQ / 1000000.0f;
  const float poll_per_carrier = PLL_MHZ / frequency;
  const int frequency_control = (int)round(poll_per_carrier * (1 << 12));
  return frequency_control;
}


x86 assembly (clang, -O0):
<frequency_to_control>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movl   $0x1dcd6500,-0x8(%rbp)
movss  0xed8(%rip),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  0xecb(%rip),%xmm0
divss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  0xeb5(%rip),%xmm0
mulss  -0x10(%rbp),%xmm0
call   1030 <round@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<frequency_to_control>:
movss  0xee8(%rip),%xmm1
divss  %xmm0,%xmm1
mulss  0xee0(%rip),%xmm1
movaps %xmm1,%xmm0
jmp    1030 <round@plt>

LLVM IR (-O0):
define i32 @frequency_to_control(float %0) {
%2 = alloca float
%3 = alloca i32
%4 = alloca float
%5 = alloca float
%6 = alloca i32
store float %0, float* %2
store i32 500000000, i32* %3
store float 5.000000e+02, float* %4
%7 = load float, float* %2
%8 = fdiv float 5.000000e+02, %7
store float %8, float* %5
%9 = load float, float* %5
%10 = fmul float %9, 4.096000e+03
%11 = call i64 @round(float %10)
%12 = trunc i64 %11 to i32
store i32 %12, i32* %6
%13 = load i32, i32* %6
ret i32 %13
}

LLVM IR (-O2):
define i32 @frequency_to_control(float %0) {
%2 = fdiv float 5.000000e+02, %0
%3 = fmul float %2, 4.096000e+03
%4 = tail call i64 @round(float %3)
%5 = trunc i64 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ vecNf_add_new(float *, float *, float const *, int);
void vec3f_add(float a[3], const float b[3]) { vecNf_add_new(a, a, b, 3); }


x86 assembly (clang, -O0):
<vec3f_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0x3,%ecx
call   1030 <vecNf_add_new@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec3f_add>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x3,%ecx
jmp    1030 <vecNf_add_new@plt>

LLVM IR (-O0):
define void @vec3f_add(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = load float*, float** %3
%7 = load float*, float** %4
%8 = call i32 @vecNf_add_new(float* %5, float* %6, float* %7, i32 3)
ret void
}

LLVM IR (-O2):
define void @vec3f_add(float* %0, float* %1) {
%3 = tail call i32 @vecNf_add_new(float* %0, float* %0, float* %1, i32 3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LCD_WriteCommand(int);
void LCD_BlinkCursor(int onOff) {
  if (onOff) {
    LCD_WriteCommand(0x08 | 0x04 | 0x02 | 0x01);
  } else {
    LCD_WriteCommand(0x08 | 0x04 | 0x02);
  }
}


x86 assembly (clang, -O0):
<LCD_BlinkCursor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1134 <LCD_BlinkCursor+0x24>
mov    $0xf,%edi
call   1030 <LCD_WriteCommand@plt>
jmp    113e <LCD_BlinkCursor+0x2e>
mov    $0xe,%edi
call   1030 <LCD_WriteCommand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCD_BlinkCursor>:
cmp    $0x1,%edi
mov    $0xf,%edi
sbb    $0x0,%edi
jmp    1030 <LCD_WriteCommand@plt>

LLVM IR (-O0):
define void @LCD_BlinkCursor(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @LCD_WriteCommand(i32 15)
br label %9
7: ; preds = %1
%8 = call i32 @LCD_WriteCommand(i32 14)
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @LCD_BlinkCursor(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i32 14, i32 15
%4 = tail call i32 @LCD_WriteCommand(i32 %3)
ret void
}
/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ snprintf(char *, int, char *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
int /*<<< orphan*/ strncat(char *, char *, int);
char *encodeString(char *input) {
  char *ans = malloc(80);
  snprintf(ans, 100, "%zu", strlen(input));
  strncat(ans, ":", 10000);
  strncat(ans, input, 10000);
  return ans;
}


x86 assembly (clang, -O0):
<encodeString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x50,%edi
call   1060 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%ecx
mov    $0x64,%esi
lea    0xe83(%rip),%rdx
call   1040 <snprintf@plt>
mov    -0x10(%rbp),%rdi
lea    0xe77(%rip),%rsi
mov    $0x2710,%edx
call   1050 <strncat@plt>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    $0x2710,%edx
call   1050 <strncat@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<encodeString>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    $0x50,%edi
call   1060 <malloc@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1030 <strlen@plt>
lea    0xe9d(%rip),%rdx
mov    %rbx,%rdi
mov    $0x64,%esi
mov    %eax,%ecx
call   1040 <snprintf@plt>
lea    0xe8b(%rip),%rsi
mov    %rbx,%rdi
mov    $0x2710,%edx
call   1050 <strncat@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    $0x2710,%edx
call   1050 <strncat@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%zu\00"
@.str.1 = [2 x i8] c":\00"
define i8* @encodeString(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = call i8* @malloc(i32 80)
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = load i8*, i8** %2
%7 = call i32 @strlen(i8* %6)
%8 = call i32 @snprintf(i8* %5, i32 100, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = load i8*, i8** %3
%10 = call i32 @strncat(i8* %9, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32 10000)
%11 = load i8*, i8** %3
%12 = load i8*, i8** %2
%13 = call i32 @strncat(i8* %11, i8* %12, i32 10000)
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
@.str = [4 x i8] c"%zu\00"
@.str.1 = [2 x i8] c":\00"
define i8* @encodeString(i8* %0) {
%2 = tail call dereferenceable_or_null(80) i8* @malloc(i32 80)
%3 = tail call i32 @strlen(i8* %0)
%4 = tail call i32 @snprintf(i8* %2, i32 100, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = tail call i32 @strncat(i8* %2, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32 10000)
%6 = tail call i32 @strncat(i8* %2, i8* %0, i32 10000)
ret i8* %2
}
int null_check_kl(int kl) {
  switch (kl) {
  case 16:
  case 24:
  case 32:
    return 1;
  default:
    return -12;
  }
}


x86 assembly (clang, -O0):
<null_check_kl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x10,%eax
je     113d <null_check_kl+0x3d>
jmp    111b <null_check_kl+0x1b>
mov    -0xc(%rbp),%eax
sub    $0x18,%eax
je     113d <null_check_kl+0x3d>
jmp    112c <null_check_kl+0x2c>
mov    -0xc(%rbp),%eax
sub    $0x20,%eax
jne    1149 <null_check_kl+0x49>
jmp    113d <null_check_kl+0x3d>
movl   $0x1,-0x4(%rbp)
jmp    1150 <null_check_kl+0x50>
movl   $0xfffffff4,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_check_kl>:
cmp    $0x20,%edi
ja     111d <null_check_kl+0x1d>
mov    $0x1,%eax
mov    %edi,%ecx
movabs $0x101010000,%rdx
bt     %rcx,%rdx
jae    111d <null_check_kl+0x1d>
ret
mov    $0xfffffff4,%eax
ret

LLVM IR (-O0):
define i32 @null_check_kl(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 16, label %5
i32 24, label %5
i32 32, label %5
]
5: ; preds = %1, %1, %1
store i32 1, i32* %2
br label %7
6: ; preds = %1
store i32 -12, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @null_check_kl(i32 %0) {
switch i32 %0, label %2 [
i32 16, label %3
i32 24, label %3
i32 32, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %2
%4 = phi i32 [ -12, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ EVP_MD_CTX;

/* Variables and functions */
void EVP_MD_CTX_destroy(int /*<<< orphan*/ *);
void tnt_EVP_MD_CTX_free(EVP_MD_CTX *ctx) { return EVP_MD_CTX_destroy(ctx); }


x86 assembly (clang, -O0):
<tnt_EVP_MD_CTX_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <EVP_MD_CTX_destroy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tnt_EVP_MD_CTX_free>:
jmp    1030 <EVP_MD_CTX_destroy@plt>

LLVM IR (-O0):
define void @tnt_EVP_MD_CTX_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
ret void
}

LLVM IR (-O2):
define void @tnt_EVP_MD_CTX_free(i32* %0) {
tail call void @EVP_MD_CTX_destroy(i32* %0)
ret void
}
/* Variables and functions */
int *f();
int main(void) {
  int *p = f();
  int y = *p;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <f@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <f@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32* (...) @f()
store i32* %4, i32** %2
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
store i32 %6, i32* %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32* (...) @f()
ret i32 0
}
int test2() {
  int x, y, z;
  x = 10;
  y = 100;
  if (x > 0) {
    y = 1;
  } else {
    while (x <= 0) {
      x++;
      y++;
    }
  }
  z = y;
  return 0;
}


x86 assembly (clang, -O0):
<test2>:
push   %rbp
mov    %rsp,%rbp
movl   $0xa,-0x4(%rbp)
movl   $0x64,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1128 <test2+0x28>
movl   $0x1,-0x8(%rbp)
jmp    1153 <test2+0x53>
jmp    112d <test2+0x2d>
cmpl   $0x0,-0x4(%rbp)
jg     114e <test2+0x4e>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    112d <test2+0x2d>
jmp    1153 <test2+0x53>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test2>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test2() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 10, i32* %1
store i32 100, i32* %2
%4 = load i32, i32* %1
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %0
store i32 1, i32* %2
br label %17
7: ; preds = %0
br label %8
8: ; preds = %11, %7
%9 = load i32, i32* %1
%10 = icmp sle i32 %9, 0
br i1 %10, label %11, label %16
11: ; preds = %8
%12 = load i32, i32* %1
%13 = add nsw i32 %12, 1
store i32 %13, i32* %1
%14 = load i32, i32* %2
%15 = add nsw i32 %14, 1
store i32 %15, i32* %2
br label %8
16: ; preds = %8
br label %17
17: ; preds = %16, %6
%18 = load i32, i32* %2
store i32 %18, i32* %3
ret i32 0
}

LLVM IR (-O2):
define i32 @test2() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ init_sp();
main() { init_sp(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <init_sp@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <init_sp@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @init_sp()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @init_sp()
ret i32 0
}
/* Variables and functions */
float expf(float);
float logf(float);
float powf(float num, float power) { return expf(logf(num) * power); }


x86 assembly (clang, -O0):
<powf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <logf@plt>
mulss  -0x8(%rbp),%xmm0
call   1040 <expf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<powf>:
push   %rax
movss  %xmm1,0x4(%rsp)
call   1030 <logf@plt>
mulss  0x4(%rsp),%xmm0
pop    %rax
jmp    1040 <expf@plt>

LLVM IR (-O0):
define float @powf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = call float @logf(float %5)
%7 = load float, float* %4
%8 = fmul float %6, %7
%9 = call float @expf(float %8)
ret float %9
}

LLVM IR (-O2):
define float @powf(float %0, float %1) {
%3 = tail call float @logf(float %0)
%4 = fmul float %3, %1
%5 = tail call float @expf(float %4)
ret float %5
}
/* Type definitions */
typedef scalar_t__ val;
typedef int uint64_t;

/* Variables and functions */
int is_power_of_two(uint64_t val) {
  return ((((val) & (val - 1)) == 0) && (val > 0));
}


x86 assembly (clang, -O0):
<is_power_of_two>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
and    %eax,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x5(%rbp)
jne    112a <is_power_of_two+0x2a>
cmpl   $0x0,-0x4(%rbp)
setg   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_power_of_two>:
lea    -0x1(%rdi),%eax
test   %eax,%edi
sete   %al
test   %edi,%edi
setg   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_power_of_two(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 %4, 1
%6 = and i32 %3, %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32, i32* %2
%10 = icmp sgt i32 %9, 0
br label %11
11: ; preds = %8, %1
%12 = phi i1 [ false, %1 ], [ %10, %8 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @is_power_of_two(i32 %0) {
%2 = tail call i32 @llvm.ctpop.i32(i32 %0)
%3 = icmp ult i32 %2, 2
%4 = icmp sgt i32 %0, 0
%5 = and i1 %4, %3
%6 = zext i1 %5 to i32
ret i32 %6
}
void compute_coupling_ac_el_cuda_(long *Mesh_pointer, int *phase_is_innerf,
                                  int *num_coupling_ac_el_facesf) {}


x86 assembly (clang, -O0):
<compute_coupling_ac_el_cuda_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<compute_coupling_ac_el_cuda_>:
ret

LLVM IR (-O0):
define void @compute_coupling_ac_el_cuda_(i64* %0, i32* %1, i32* %2) {
%4 = alloca i64*
%5 = alloca i32*
%6 = alloca i32*
store i64* %0, i64** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
ret void
}

LLVM IR (-O2):
define void @compute_coupling_ac_el_cuda_(i64* nocapture %0, i32* nocapture %1, i32* nocapture %2) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ le32toh(int /*<<< orphan*/);
void unaligned_write_le32(void *_u, uint32_t a) {
  struct __attribute__((__packed__, __may_alias__)) {
    uint32_t x;
  } *u = _u;
  u->x = le32toh(a);
}


x86 assembly (clang, -O0):
<unaligned_write_le32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <le32toh@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unaligned_write_le32>:
push   %rbx
mov    %rdi,%rbx
mov    %esi,%edi
call   1030 <le32toh@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
%struct.anon = type { i32 }
define void @unaligned_write_le32(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca %struct.anon*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.anon*
store %struct.anon* %7, %struct.anon** %5
%8 = load i32, i32* %4
%9 = call i32 @le32toh(i32 %8)
%10 = load %struct.anon*, %struct.anon** %5
%11 = getelementptr inbounds %struct.anon, %struct.anon* %10, i32 0, i32 0
store i32 %9, i32* %11
ret void
}

LLVM IR (-O2):
define void @unaligned_write_le32(i8* nocapture writeonly %0, i32 %1) {
%3 = tail call i32 @le32toh(i32 %1)
%4 = bitcast i8* %0 to i32*
store i32 %3, i32* %4
ret void
}
/* Variables and functions */
unsigned short read_chan(int);
unsigned short read_vbat(void) { return read_chan(0x12); }


x86 assembly (clang, -O0):
<read_vbat>:
push   %rbp
mov    %rsp,%rbp
mov    $0x12,%edi
call   1030 <read_chan@plt>
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_vbat>:
mov    $0x12,%edi
jmp    1030 <read_chan@plt>

LLVM IR (-O0):
define zeroext i16 @read_vbat() {
%1 = call zeroext i16 @read_chan(i32 18)
ret i16 %1
}

LLVM IR (-O2):
define zeroext i16 @read_vbat() {
%1 = tail call zeroext i16 @read_chan(i32 18)
ret i16 %1
}
/* Variables and functions */
void do_miniht_load(int ht, int rh) {}


x86 assembly (clang, -O0):
<do_miniht_load>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_miniht_load>:
ret

LLVM IR (-O0):
define void @do_miniht_load(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @do_miniht_load(i32 %0, i32 %1) {
ret void
}
int dns_v_rel(void) { return 0x20100416; }


x86 assembly (clang, -O0):
<dns_v_rel>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20100416,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dns_v_rel>:
mov    $0x20100416,%eax
ret

LLVM IR (-O0):
define i32 @dns_v_rel() {
ret i32 537920534
}

LLVM IR (-O2):
define i32 @dns_v_rel() {
ret i32 537920534
}
unsigned char BaseToChar(char base) {
  if (base == 0x00)
    return 'A';
  else if (base == 0x01)
    return 'C';
  else if (base == 0x02)
    return 'T';
  else if (base == 0x03)
    return 'G';
  return 'N';
}


x86 assembly (clang, -O0):
<BaseToChar>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
cmp    $0x0,%eax
jne    1120 <BaseToChar+0x20>
movb   $0x41,-0x1(%rbp)
jmp    1175 <BaseToChar+0x75>
movsbl -0x2(%rbp),%eax
cmp    $0x1,%eax
jne    1136 <BaseToChar+0x36>
movb   $0x43,-0x1(%rbp)
jmp    1175 <BaseToChar+0x75>
movsbl -0x2(%rbp),%eax
cmp    $0x2,%eax
jne    114c <BaseToChar+0x4c>
movb   $0x54,-0x1(%rbp)
jmp    1175 <BaseToChar+0x75>
movsbl -0x2(%rbp),%eax
cmp    $0x3,%eax
jne    1162 <BaseToChar+0x62>
movb   $0x47,-0x1(%rbp)
jmp    1175 <BaseToChar+0x75>
jmp    1167 <BaseToChar+0x67>
jmp    116c <BaseToChar+0x6c>
jmp    1171 <BaseToChar+0x71>
movb   $0x4e,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BaseToChar>:
lea    0x0(,%rdi,8),%ecx
mov    $0x47544341,%edx
shr    %cl,%edx
cmp    $0x4,%dil
mov    $0x4e,%eax
cmovb  %edx,%eax
ret

LLVM IR (-O0):
define zeroext i8 @BaseToChar(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i8 65, i8* %2
br label %27
8: ; preds = %1
%9 = load i8, i8* %3
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %13
12: ; preds = %8
store i8 67, i8* %2
br label %27
13: ; preds = %8
%14 = load i8, i8* %3
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 2
br i1 %16, label %17, label %18
17: ; preds = %13
store i8 84, i8* %2
br label %27
18: ; preds = %13
%19 = load i8, i8* %3
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 3
br i1 %21, label %22, label %23
22: ; preds = %18
store i8 71, i8* %2
br label %27
23: ; preds = %18
br label %24
24: ; preds = %23
br label %25
25: ; preds = %24
br label %26
26: ; preds = %25
store i8 78, i8* %2
br label %27
27: ; preds = %26, %22, %17, %12, %7
%28 = load i8, i8* %2
ret i8 %28
}

LLVM IR (-O2):
define zeroext i8 @BaseToChar(i8 signext %0) {
%2 = icmp ult i8 %0, 4
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 3
%5 = lshr i32 1196704577, %4
%6 = trunc i32 %5 to i8
%7 = select i1 %2, i8 %6, i8 78
ret i8 %7
}
/* Variables and functions */
scalar_t__ malloc(int);
int *alTest() {
  int *p = (int *)malloc(sizeof(int));
  *p = 15;
  return p;
}


x86 assembly (clang, -O0):
<alTest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0xf,(%rax)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alTest>:
push   %rax
mov    $0x4,%edi
call   1030 <malloc@plt>
movl   $0xf,(%rax)
pop    %rcx
ret

LLVM IR (-O0):
define i32* @alTest() {
%1 = alloca i32*
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32* %3, i32** %1
%4 = load i32*, i32** %1
store i32 15, i32* %4
%5 = load i32*, i32** %1
ret i32* %5
}

LLVM IR (-O2):
define i32* @alTest() {
%1 = tail call i64 @malloc(i32 4)
%2 = inttoptr i64 %1 to i32*
store i32 15, i32* %2
ret i32* %2
}
/* Variables and functions */
int /*<<< orphan*/ usart_put(char *);
void log_raw(char *string) { usart_put(string); }


x86 assembly (clang, -O0):
<log_raw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <usart_put@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_raw>:
jmp    1030 <usart_put@plt>

LLVM IR (-O0):
define void @log_raw(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @usart_put(i8* %3)
ret void
}

LLVM IR (-O2):
define void @log_raw(i8* %0) {
%2 = tail call i32 @usart_put(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void mailimf_msg_id_free(char *msg_id) { free(msg_id); }


x86 assembly (clang, -O0):
<mailimf_msg_id_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mailimf_msg_id_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @mailimf_msg_id_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @mailimf_msg_id_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Type definitions */
struct timeval {
  double tv_sec;
  scalar_t__ tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/);
double OGGetAbsoluteTime() {
  struct timeval tv;
  gettimeofday(&tv, 0);
  return ((double)tv.tv_usec) / 1000000. + (tv.tv_sec);
}


x86 assembly (clang, -O0):
<OGGetAbsoluteTime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x10(%rbp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
cvtsi2sdq -0x8(%rbp),%xmm0
movsd  0xecf(%rip),%xmm1
divsd  %xmm1,%xmm0
addsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OGGetAbsoluteTime>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
cvtsi2sdq 0x10(%rsp),%xmm0
divsd  0xed1(%rip),%xmm0
addsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { double, i64 }
define double @OGGetAbsoluteTime() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32 0)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%4 = load i64, i64* %3
%5 = sitofp i64 %4 to double
%6 = fdiv double %5, 1.000000e+06
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%8 = load double, double* %7
%9 = fadd double %6, %8
ret double %9
}

LLVM IR (-O2):
%struct.timeval = type { double, i64 }
define double @OGGetAbsoluteTime() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32 0)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%5 = load i64, i64* %4
%6 = sitofp i64 %5 to double
%7 = fdiv double %6, 1.000000e+06
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%9 = load double, double* %8
%10 = fadd double %9, %7
ret double %10
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int EOF;
int fwrite(int *, int, int, int /*<<< orphan*/ *);
int fputc(int character, FILE *stream) {
  return fwrite(&character, sizeof(char), 1, stream) == 1 ? character : EOF;
}


x86 assembly (clang, -O0):
<fputc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
lea    -0x4(%rbp),%rdi
mov    $0x1,%edx
mov    %edx,%esi
call   1030 <fwrite@plt>
cmp    $0x1,%eax
jne    1147 <fputc+0x37>
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1153 <fputc+0x43>
mov    0x2e9a(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fputc>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rcx
mov    %edi,0xc(%rsp)
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
mov    $0x1,%esi
mov    $0x1,%edx
call   1030 <fwrite@plt>
cmp    $0x1,%eax
je     113f <fputc+0x2f>
mov    0x2ea9(%rip),%rbx
mov    (%rbx),%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@EOF = global i32 0
define i32 @fputc(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = call i32 @fwrite(i32* %3, i32 1, i32 1, i32* %5)
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* @EOF
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @fputc(i32 %0, i32* nocapture %1) {
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 @fwrite(i32* %3, i32 1, i32 1, i32* %1)
%5 = icmp eq i32 %4, 1
%6 = load i32, i32* %3
%7 = load i32, i32* @EOF
%8 = select i1 %5, i32 %6, i32 %7
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0xbb() {
  Assert_real((isspace(187) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              940, ("isspace should be 0 for 0xbb"));
}


x86 assembly (clang, -O0):
<t_isspace_0xbb>:
push   %rbp
mov    %rsp,%rbp
mov    $0xbb,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3ac,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0xbb>:
push   %rax
mov    $0xbb,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3ac,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0xbb\00"
define void @t_isspace_0xbb() {
%1 = call i64 @isspace(i32 187)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 940, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0xbb\00"
define void @t_isspace_0xbb() {
%1 = tail call i64 @isspace(i32 187)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 940, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void banner_stars(void) {
  printf("               ******************************************\n");
}


x86 assembly (clang, -O0):
<banner_stars>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<banner_stars>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [59 x i8] c" ******************************************\0A\00"
define void @banner_stars() {
%1 = call i32 @printf(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [58 x i8] c" ******************************************\00"
define void @banner_stars() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([58 x i8], [58 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
unsigned long __strtoul_internal(char const *, char **, int,
                                 int /*<<< orphan*/);
unsigned long int strtoul(const char *nptr, char **endptr, int base) {
  return __strtoul_internal(nptr, endptr, base, 0);
}


x86 assembly (clang, -O0):
<strtoul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
xor    %ecx,%ecx
call   1030 <__strtoul_internal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtoul>:
xor    %ecx,%ecx
jmp    1030 <__strtoul_internal@plt>

LLVM IR (-O0):
define i64 @strtoul(i8* %0, i8** %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i32
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8**, i8*** %5
%9 = load i32, i32* %6
%10 = call i64 @__strtoul_internal(i8* %7, i8** %8, i32 %9, i32 0)
ret i64 %10
}

LLVM IR (-O2):
define i64 @strtoul(i8* %0, i8** %1, i32 %2) {
%4 = tail call i64 @__strtoul_internal(i8* %0, i8** %1, i32 %2, i32 0)
ret i64 %4
}
/* Variables and functions */
size_t align8(size_t s) {
  if ((s & 0x7) == 0) {
    return s;
  }
  return ((s >> 3) + 1) << 3;
}


x86 assembly (clang, -O0):
<align8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x7,%rax
cmp    $0x0,%rax
jne    1127 <align8+0x27>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    113b <align8+0x3b>
mov    -0x10(%rbp),%rax
shr    $0x3,%rax
add    $0x1,%rax
shl    $0x3,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<align8>:
lea    0x8(%rdi),%rax
and    $0xfffffffffffffff8,%rax
test   $0x7,%dil
cmove  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @align8(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = and i64 %4, 7
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i64, i64* %3
store i64 %8, i64* %2
br label %14
9: ; preds = %1
%10 = load i64, i64* %3
%11 = lshr i64 %10, 3
%12 = add i64 %11, 1
%13 = shl i64 %12, 3
store i64 %13, i64* %2
br label %14
14: ; preds = %9, %7
%15 = load i64, i64* %2
ret i64 %15
}

LLVM IR (-O2):
define i64 @align8(i64 %0) {
%2 = and i64 %0, 7
%3 = icmp eq i64 %2, 0
%4 = add i64 %0, 8
%5 = and i64 %4, -8
%6 = select i1 %3, i64 %0, i64 %5
ret i64 %6
}
int clamp(int min, int value, int max) {
  if (value < min)
    return min;
  if (value > max)
    return max;
  return value;
}


x86 assembly (clang, -O0):
<clamp>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1124 <clamp+0x24>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <clamp+0x41>
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    113b <clamp+0x3b>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <clamp+0x41>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clamp>:
mov    %edx,%eax
cmp    %edx,%esi
cmovle %esi,%eax
cmp    %edi,%esi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @clamp(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load i32, i32* %5
store i32 %12, i32* %4
br label %21
13: ; preds = %3
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = icmp sgt i32 %14, %15
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = load i32, i32* %7
store i32 %18, i32* %4
br label %21
19: ; preds = %13
%20 = load i32, i32* %6
store i32 %20, i32* %4
br label %21
21: ; preds = %19, %17, %11
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @clamp(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %0
%5 = icmp sgt i32 %1, %2
%6 = select i1 %5, i32 %2, i32 %1
%7 = select i1 %4, i32 %0, i32 %6
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ writel(int /*<<< orphan*/, void *);
void write_pxpenc(unsigned port, uint32_t value) {
  writel(value, (void *)0xb0010000 + (port * 0x100) + (0x78));
}


x86 assembly (clang, -O0):
<write_pxpenc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x4(%rbp),%eax
shl    $0x8,%eax
mov    %eax,%eax
mov    $0xb0010000,%esi
add    %rax,%rsi
add    $0x78,%rsi
call   1030 <writel@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_pxpenc>:
mov    %esi,%eax
shl    $0x8,%edi
mov    $0xb0010078,%esi
add    %rdi,%rsi
mov    %eax,%edi
jmp    1030 <writel@plt>

LLVM IR (-O0):
define void @write_pxpenc(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = mul i32 %6, 256
%8 = zext i32 %7 to i64
%9 = getelementptr i8, i8* inttoptr (i64 2952855552 to i8*), i64 %8
%10 = getelementptr i8, i8* %9, i64 120
%11 = call i32 @writel(i32 %5, i8* %10)
ret void
}

LLVM IR (-O2):
define void @write_pxpenc(i32 %0, i32 %1) {
%3 = shl i32 %0, 8
%4 = zext i32 %3 to i64
%5 = getelementptr i8, i8* inttoptr (i64 2952855552 to i8*), i64 %4
%6 = getelementptr i8, i8* %5, i64 120
%7 = tail call i32 @writel(i32 %1, i8* %6)
ret void
}