xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ wdt_enable(int);
void netprog_reboot() {
  wdt_enable(1);
  while (1)
    ;
}


x86 assembly (clang, -O0):
<netprog_reboot>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <wdt_enable@plt>
jmp    111e <netprog_reboot+0xe>

x86 assembly (clang, -O2):
<netprog_reboot>:
push   %rax
mov    $0x1,%edi
call   1030 <wdt_enable@plt>
nopl   0x0(%rax,%rax,1)
jmp    1120 <netprog_reboot+0x10>

LLVM IR (-O0):
define void @netprog_reboot() {
%1 = call i32 @wdt_enable(i32 1)
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
define void @netprog_reboot() {
%1 = tail call i32 @wdt_enable(i32 1)
br label %2
2: ; preds = %0, %2
br label %2
}
int main() {
  int a = 1;
  if (a)
    ;
  else if (a)
    ;
  else if (a)
    ;
  else if (a)
    ;
  else
    ;
  if (a) {
  } else if (a) {
  } else {
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1121 <main+0x21>
jmp    1162 <main+0x62>
cmpl   $0x0,-0x8(%rbp)
je     1130 <main+0x30>
jmp    115d <main+0x5d>
cmpl   $0x0,-0x8(%rbp)
je     113f <main+0x3f>
jmp    1158 <main+0x58>
cmpl   $0x0,-0x8(%rbp)
je     114e <main+0x4e>
jmp    1153 <main+0x53>
jmp    1153 <main+0x53>
jmp    1158 <main+0x58>
jmp    115d <main+0x5d>
jmp    1162 <main+0x62>
cmpl   $0x0,-0x8(%rbp)
je     1171 <main+0x71>
jmp    118a <main+0x8a>
cmpl   $0x0,-0x8(%rbp)
je     1180 <main+0x80>
jmp    1185 <main+0x85>
jmp    1185 <main+0x85>
jmp    118a <main+0x8a>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %0
br label %22
6: ; preds = %0
%7 = load i32, i32* %2
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %6
br label %21
10: ; preds = %6
%11 = load i32, i32* %2
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %10
br label %20
14: ; preds = %10
%15 = load i32, i32* %2
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %14
br label %19
18: ; preds = %14
br label %19
19: ; preds = %18, %17
br label %20
20: ; preds = %19, %13
br label %21
21: ; preds = %20, %9
br label %22
22: ; preds = %21, %5
%23 = load i32, i32* %2
%24 = icmp ne i32 %23, 0
br i1 %24, label %25, label %26
25: ; preds = %22
br label %32
26: ; preds = %22
%27 = load i32, i32* %2
%28 = icmp ne i32 %27, 0
br i1 %28, label %29, label %30
29: ; preds = %26
br label %31
30: ; preds = %26
br label %31
31: ; preds = %30, %29
br label %32
32: ; preds = %31, %25
%33 = load i32, i32* %1
ret i32 %33
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
struct page {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ClearPageReclaim(struct page *);
int tux3_set_page_dirty_buffers(struct page *);
int tux3_set_page_dirty(struct page *page) {
  ClearPageReclaim(page);
  return tux3_set_page_dirty_buffers(page);
}


x86 assembly (clang, -O0):
<tux3_set_page_dirty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <ClearPageReclaim@plt>
mov    -0x8(%rbp),%rdi
call   1030 <tux3_set_page_dirty_buffers@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tux3_set_page_dirty>:
push   %rbx
mov    %rdi,%rbx
call   1040 <ClearPageReclaim@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <tux3_set_page_dirty_buffers@plt>

LLVM IR (-O0):
%struct.page = type { i32 }
define i32 @tux3_set_page_dirty(%struct.page* %0) {
%2 = alloca %struct.page*
store %struct.page* %0, %struct.page** %2
%3 = load %struct.page*, %struct.page** %2
%4 = call i32 @ClearPageReclaim(%struct.page* %3)
%5 = load %struct.page*, %struct.page** %2
%6 = call i32 @tux3_set_page_dirty_buffers(%struct.page* %5)
ret i32 %6
}

LLVM IR (-O2):
%struct.page = type { i32 }
define i32 @tux3_set_page_dirty(%struct.page* %0) {
%2 = tail call i32 @ClearPageReclaim(%struct.page* %0)
%3 = tail call i32 @tux3_set_page_dirty_buffers(%struct.page* %0)
ret i32 %3
}
int isgreaterequal(float f1, float f2) {
  int r = __builtin_isgreaterequal(f1, f2);
  return !r ? -1 : 1;
}


x86 assembly (clang, -O0):
<isgreaterequal>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
setne  %dl
xor    $0xff,%dl
mov    $0x1,%eax
mov    $0xffffffff,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isgreaterequal>:
xor    %eax,%eax
ucomiss %xmm1,%xmm0
setae  %al
add    %eax,%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @isgreaterequal(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca i32
store float %0, float* %3
store float %1, float* %4
%6 = load float, float* %3
%7 = load float, float* %4
%8 = fcmp oge float %6, %7
%9 = zext i1 %8 to i32
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = icmp ne i32 %10, 0
%12 = xor i1 %11, true
%13 = zext i1 %12 to i64
%14 = select i1 %12, i32 -1, i32 1
ret i32 %14
}

LLVM IR (-O2):
define i32 @isgreaterequal(float %0, float %1) {
%3 = fcmp ult float %0, %1
%4 = select i1 %3, i32 -1, i32 1
ret i32 %4
}
/* Variables and functions */
float fmin(float in1, float in2) {
  if (in1 < in2)
    return in1;
  else
    return in2;
}


x86 assembly (clang, -O0):
<fmin>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1130 <fmin+0x30>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    113a <fmin+0x3a>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmin>:
minss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @fmin(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %4
%7 = load float, float* %5
%8 = fcmp olt float %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load float, float* %4
store float %10, float* %3
br label %13
11: ; preds = %2
%12 = load float, float* %5
store float %12, float* %3
br label %13
13: ; preds = %11, %9
%14 = load float, float* %3
ret float %14
}

LLVM IR (-O2):
define float @fmin(float %0, float %1) {
%3 = fcmp olt float %0, %1
%4 = select i1 %3, float %0, float %1
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ mz_crypt_init();
void mz_crypt_aes_reset(void *handle) {
  ((void)handle);
  mz_crypt_init();
}


x86 assembly (clang, -O0):
<mz_crypt_aes_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <mz_crypt_init@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mz_crypt_aes_reset>:
xor    %eax,%eax
jmp    1030 <mz_crypt_init@plt>

LLVM IR (-O0):
define void @mz_crypt_aes_reset(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (...) @mz_crypt_init()
ret void
}

LLVM IR (-O2):
define void @mz_crypt_aes_reset(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @mz_crypt_init()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ putch_color(short, char const);
void cputs_color(short color, const char *string) {
  while (*string) {
    if (*string == '\n')
      putch_color(color, '\r');
    putch_color(color, *string);
    string += 1;
  }
  return;
}


x86 assembly (clang, -O0):
<cputs_color>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1172 <cputs_color+0x62>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xa,%eax
jne    114e <cputs_color+0x3e>
mov    $0xd,%esi
movswl -0x2(%rbp),%edi
call   1030 <putch_color@plt>
mov    -0x2(%rbp),%cx
mov    -0x10(%rbp),%rax
movswl %cx,%edi
movsbl (%rax),%esi
call   1030 <putch_color@plt>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1123 <cputs_color+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cputs_color>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
movswl %di,%ebp
jmp    113d <cputs_color+0x2d>
nopl   0x0(%rax,%rax,1)
mov    %ebp,%edi
mov    $0xd,%esi
call   1030 <putch_color@plt>
movzbl (%rbx),%eax
movsbl %al,%esi
mov    %ebp,%edi
call   1030 <putch_color@plt>
add    $0x1,%rbx
movzbl (%rbx),%eax
cmp    $0xa,%al
je     1120 <cputs_color+0x10>
test   %al,%al
jne    112f <cputs_color+0x1f>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @cputs_color(i16 signext %0, i8* %1) {
%3 = alloca i16
%4 = alloca i8*
store i16 %0, i16* %3
store i8* %1, i8** %4
br label %5
5: ; preds = %17, %2
%6 = load i8*, i8** %4
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %24
9: ; preds = %5
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 10
br i1 %13, label %14, label %17
14: ; preds = %9
%15 = load i16, i16* %3
%16 = call i32 @putch_color(i16 signext %15, i8 signext 13)
br label %17
17: ; preds = %14, %9
%18 = load i16, i16* %3
%19 = load i8*, i8** %4
%20 = load i8, i8* %19
%21 = call i32 @putch_color(i16 signext %18, i8 signext %20)
%22 = load i8*, i8** %4
%23 = getelementptr inbounds i8, i8* %22, i64 1
store i8* %23, i8** %4
br label %5
24: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @cputs_color(i16 signext %0, i8* nocapture %1) {
br label %3
3: ; preds = %9, %2
%4 = phi i8* [ %1, %2 ], [ %12, %9 ]
%5 = load i8, i8* %4
switch i8 %5, label %9 [
i8 0, label %13
i8 10, label %6
]
6: ; preds = %3
%7 = tail call i32 @putch_color(i16 signext %0, i8 signext 13)
%8 = load i8, i8* %4
br label %9
9: ; preds = %3, %6
%10 = phi i8 [ %5, %3 ], [ %8, %6 ]
%11 = tail call i32 @putch_color(i16 signext %0, i8 signext %10)
%12 = getelementptr inbounds i8, i8* %4, i64 1
br label %3
13: ; preds = %3
ret void
}
void b43_leds_unregister(struct b43_wldev *dev) {}


x86 assembly (clang, -O0):
<b43_leds_unregister>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<b43_leds_unregister>:
ret

LLVM IR (-O0):
%struct.b43_wldev = type opaque
define void @b43_leds_unregister(%struct.b43_wldev* %0) {
%2 = alloca %struct.b43_wldev*
store %struct.b43_wldev* %0, %struct.b43_wldev** %2
ret void
}

LLVM IR (-O2):
%struct.b43_wldev = type opaque
define void @b43_leds_unregister(%struct.b43_wldev* nocapture %0) {
ret void
}
void omap_vram_reserve_sdram(void) {}


x86 assembly (clang, -O0):
<omap_vram_reserve_sdram>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<omap_vram_reserve_sdram>:
ret

LLVM IR (-O0):
define void @omap_vram_reserve_sdram() {
ret void
}

LLVM IR (-O2):
define void @omap_vram_reserve_sdram() {
ret void
}
unsigned int htc_aes_get_chunk_size(unsigned char chunks) {
  return ((int)chunks) << 20;
}


x86 assembly (clang, -O0):
<htc_aes_get_chunk_size>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x14,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<htc_aes_get_chunk_size>:
mov    %edi,%eax
shl    $0x14,%eax
ret

LLVM IR (-O0):
define i32 @htc_aes_get_chunk_size(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = shl i32 %4, 20
ret i32 %5
}

LLVM IR (-O2):
define i32 @htc_aes_get_chunk_size(i8 zeroext %0) {
%2 = zext i8 %0 to i32
%3 = shl nuw nsw i32 %2, 20
ret i32 %3
}
void insl(int port, void *addr, int cnt) {
  asm volatile("cld; rep insl"
               : "=D"(addr), "=c"(cnt)
               : "d"(port), "0"(addr), "1"(cnt)
               : "memory", "cc");
}


x86 assembly (clang, -O0):
<insl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%ecx
cld
rep insl (%dx),%es:(%rdi)
mov    %rdi,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<insl>:
mov    %edx,%ecx
mov    %edi,%edx
mov    %rsi,%rdi
cld
rep insl (%dx),%es:(%rdi)
ret

LLVM IR (-O0):
define void @insl(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call { i8*, i32 } asm sideeffect "cld; rep insl", "={di},={cx},{dx},0,1,~{memory},~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %7, i8* %8, i32 %9)
%11 = extractvalue { i8*, i32 } %10, 0
%12 = extractvalue { i8*, i32 } %10, 1
store i8* %11, i8** %5
store i32 %12, i32* %6
ret void
}

LLVM IR (-O2):
define void @insl(i32 %0, i8* %1, i32 %2) {
%4 = tail call { i8*, i32 } asm sideeffect "cld; rep insl", "={di},={cx},{dx},0,1,~{memory},~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* %1, i32 %2)
ret void
}
/* Type definitions */
struct dns_resolver {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ dns_res_release(struct dns_resolver *);
struct dns_resolver *dns_res_mortal(struct dns_resolver *res) {
  if (res)
    dns_res_release(res);
  return res;
}


x86 assembly (clang, -O0):
<dns_res_mortal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <dns_res_mortal+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <dns_res_release@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dns_res_mortal>:
push   %rbx
mov    %rdi,%rbx
test   %rdi,%rdi
je     1121 <dns_res_mortal+0x11>
mov    %rbx,%rdi
call   1030 <dns_res_release@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.dns_resolver = type { i32 }
define %struct.dns_resolver* @dns_res_mortal(%struct.dns_resolver* %0) {
%2 = alloca %struct.dns_resolver*
store %struct.dns_resolver* %0, %struct.dns_resolver** %2
%3 = load %struct.dns_resolver*, %struct.dns_resolver** %2
%4 = icmp ne %struct.dns_resolver* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load %struct.dns_resolver*, %struct.dns_resolver** %2
%7 = call i32 @dns_res_release(%struct.dns_resolver* %6)
br label %8
8: ; preds = %5, %1
%9 = load %struct.dns_resolver*, %struct.dns_resolver** %2
ret %struct.dns_resolver* %9
}

LLVM IR (-O2):
%struct.dns_resolver = type { i32 }
define %struct.dns_resolver* @dns_res_mortal(%struct.dns_resolver* returned %0) {
%2 = icmp eq %struct.dns_resolver* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @dns_res_release(%struct.dns_resolver* %0)
br label %5
5: ; preds = %3, %1
ret %struct.dns_resolver* %0
}
int foo(int *a) {
  int x = 0;
  return __atomic_compare_exchange_n(a, &x, 4, 0, 2, 2);
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rcx
movl   $0x4,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x10(%rbp),%edx
lock cmpxchg %edx,(%rcx)
mov    %eax,%ecx
sete   %al
mov    %al,-0x19(%rbp)
mov    %ecx,-0x18(%rbp)
test   $0x1,%al
jne    113d <foo+0x3d>
mov    -0x18(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    $0x4,%edx
xor    %ecx,%ecx
xor    %eax,%eax
lock cmpxchg %edx,(%rdi)
sete   %cl
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8
store i32* %0, i32** %2
store i32 0, i32* %3
%6 = load i32*, i32** %2
store i32 4, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = cmpxchg i32* %6, i32 %7, i32 %8 acquire acquire
%10 = extractvalue { i32, i1 } %9, 0
%11 = extractvalue { i32, i1 } %9, 1
br i1 %11, label %13, label %12
12: ; preds = %1
store i32 %10, i32* %3
br label %13
13: ; preds = %12, %1
%14 = zext i1 %11 to i8
store i8 %14, i8* %5
%15 = load i8, i8* %5
%16 = trunc i8 %15 to i1
%17 = zext i1 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
define i32 @foo(i32* nocapture %0) {
%2 = cmpxchg i32* %0, i32 0, i32 4 acquire acquire
%3 = extractvalue { i32, i1 } %2, 1
%4 = zext i1 %3 to i32
ret i32 %4
}
void CAN_SCE_IRQHandler(void) {}


x86 assembly (clang, -O0):
<CAN_SCE_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CAN_SCE_IRQHandler>:
ret

LLVM IR (-O0):
define void @CAN_SCE_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @CAN_SCE_IRQHandler() {
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *memset(void *, int /*<<< orphan*/, size_t);
void *calloc(size_t nelem, size_t elsize) {
  size_t total = nelem * elsize;
  void *p = malloc(total);
  return (p == NULL) ? p : memset(p, 0, total);
}


x86 assembly (clang, -O0):
<calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
imul   -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1162 <calloc+0x42>
mov    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
jmp    117d <calloc+0x5d>
mov    -0x20(%rbp),%rdi
mov    %rdi,-0x30(%rbp)
mov    -0x18(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x30(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
imul   %rsi,%rbx
mov    %rbx,%rdi
call   1040 <malloc@plt>
mov    %rax,%r14
test   %rax,%rax
je     1148 <calloc+0x28>
mov    %r14,%rdi
xor    %esi,%esi
mov    %rbx,%rdx
call   1030 <memset@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @calloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%7 = load i64, i64* %3
%8 = load i64, i64* %4
%9 = mul i64 %7, %8
store i64 %9, i64* %5
%10 = load i64, i64* %5
%11 = call i8* @malloc(i64 %10)
store i8* %11, i8** %6
%12 = load i8*, i8** %6
%13 = icmp eq i8* %12, null
br i1 %13, label %14, label %16
14: ; preds = %2
%15 = load i8*, i8** %6
br label %19
16: ; preds = %2
%17 = load i8*, i8** %6
%18 = load i64, i64* %5
br label %19
19: ; preds = %16, %14
%20 = phi i8* [ %15, %14 ], [ %17, %16 ]
ret i8* %20
}

LLVM IR (-O2):
define noalias i8* @calloc(i64 %0, i64 %1) {
%3 = mul i64 %1, %0
%4 = tail call i8* @malloc(i64 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %7, label %6
6: ; preds = %2
tail call void @llvm.memset.p0i8.i64(i8* align 1 %4, i8 0, i64 %3, i1 false)
br label %7
7: ; preds = %2, %6
ret i8* %4
}
/* Variables and functions */
scalar_t__ isprint(unsigned char);
int /*<<< orphan*/ printf(char *, ...);
void printchar(unsigned char c) {
  if (isprint(c))
    printf("%c", c);
  else
    printf(".");
}


x86 assembly (clang, -O0):
<printchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1040 <isprint@plt>
cmp    $0x0,%rax
je     1158 <printchar+0x38>
movzbl -0x1(%rbp),%esi
lea    0xeb4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
jmp    1166 <printchar+0x46>
lea    0xea4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printchar>:
push   %rbx
mov    %edi,%ebx
call   1040 <isprint@plt>
test   %rax,%rax
mov    $0x2e,%edi
cmovne %ebx,%edi
pop    %rbx
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
@.str.1 = [2 x i8] c".\00"
define void @printchar(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @isprint(i8 zeroext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = zext i8 %7 to i32
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %8)
br label %12
10: ; preds = %1
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
br label %12
12: ; preds = %10, %6
ret void
}

LLVM IR (-O2):
define void @printchar(i8 zeroext %0) {
%2 = tail call i64 @isprint(i8 zeroext %0)
%3 = icmp eq i64 %2, 0
%4 = zext i8 %0 to i32
%5 = select i1 %3, i32 46, i32 %4
%6 = tail call i32 @putchar(i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ tempchart(int /*<<< orphan*/, int);
int main() { tempchart(0, 300); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0x12c,%esi
call   1030 <tempchart@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
mov    $0x12c,%esi
call   1030 <tempchart@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @tempchart(i32 0, i32 300)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @tempchart(i32 0, i32 300)
ret i32 0
}
void pyi_launch_initialize(const char *executable, const char *extractionpath) {
}


x86 assembly (clang, -O0):
<pyi_launch_initialize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pyi_launch_initialize>:
ret

LLVM IR (-O0):
define void @pyi_launch_initialize(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @pyi_launch_initialize(i8* nocapture %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
int f123(int *);
int f124(int *p) { return f123(p); }


x86 assembly (clang, -O0):
<f124>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f123@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f124>:
jmp    1030 <f123@plt>

LLVM IR (-O0):
define i32 @f124(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f123(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f124(i32* %0) {
%2 = tail call i32 @f123(i32* %0)
ret i32 %2
}
/* Type definitions */
typedef char uint8_t;
typedef int int8_t;

/* Variables and functions */
int /*<<< orphan*/ strncpy(char *, char *, int);
int8_t parse_string(uint8_t *text, void *buf) {
  uint8_t *dest = (uint8_t *)buf;
  dest[128 - 1] = '\0';
  strncpy(dest, text, 128);
  if (dest[128 - 1] != '\0') {
    dest[128 - 1] = '\0';
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<parse_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movb   $0x0,0x7f(%rax)
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x80,%edx
call   1030 <strncpy@plt>
mov    -0x20(%rbp),%rax
movsbl 0x7f(%rax),%eax
cmp    $0x0,%eax
je     1167 <parse_string+0x57>
mov    -0x20(%rbp),%rax
movb   $0x0,0x7f(%rax)
movl   $0xffffffff,-0x4(%rbp)
jmp    116e <parse_string+0x5e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_string>:
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%rsi
movb   $0x0,0x7f(%rbx)
mov    %rbx,%rdi
mov    $0x80,%edx
call   1030 <strncpy@plt>
cmpb   $0x0,0x7f(%rbx)
je     1139 <parse_string+0x29>
movb   $0x0,0x7f(%rbx)
mov    $0xffffffff,%eax
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @parse_string(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %5
store i8* %7, i8** %6
%8 = load i8*, i8** %6
%9 = getelementptr inbounds i8, i8* %8, i64 127
store i8 0, i8* %9
%10 = load i8*, i8** %6
%11 = load i8*, i8** %4
%12 = call i32 @strncpy(i8* %10, i8* %11, i32 128)
%13 = load i8*, i8** %6
%14 = getelementptr inbounds i8, i8* %13, i64 127
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %21
18: ; preds = %2
%19 = load i8*, i8** %6
%20 = getelementptr inbounds i8, i8* %19, i64 127
store i8 0, i8* %20
store i32 -1, i32* %3
br label %22
21: ; preds = %2
store i32 0, i32* %3
br label %22
22: ; preds = %21, %18
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @parse_string(i8* %0, i8* %1) {
%3 = getelementptr inbounds i8, i8* %1, i64 127
store i8 0, i8* %3
%4 = tail call i32 @strncpy(i8* %1, i8* %0, i32 128)
%5 = load i8, i8* %3
%6 = icmp eq i8 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %2
store i8 0, i8* %3
br label %8
8: ; preds = %2, %7
%9 = phi i32 [ -1, %7 ], [ 0, %2 ]
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int64_t;

/* Variables and functions */
u_int64_t null_parser(char *buf, void *key, size_t *prefixlen, void *arg) {
  return (0);
}


x86 assembly (clang, -O0):
<null_parser>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_parser>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @null_parser(i8* %0, i8* %1, i64* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64*
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64* %2, i64** %7
store i8* %3, i8** %8
ret i32 0
}

LLVM IR (-O2):
define i32 @null_parser(i8* nocapture readnone %0, i8* nocapture readnone %1, i64* nocapture readnone %2, i8* nocapture readnone %3) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int integerData;
  printf("size of integer: %d", sizeof integerData);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"size of integer: %d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 4)
ret i32 0
}

LLVM IR (-O2):
@.str = [20 x i8] c"size of integer: %d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 4)
ret i32 0
}
unsigned char SCD_Read_Byte(unsigned int Adr) { return 0; }


x86 assembly (clang, -O0):
<SCD_Read_Byte>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SCD_Read_Byte>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i8 @SCD_Read_Byte(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i8 0
}

LLVM IR (-O2):
define zeroext i8 @SCD_Read_Byte(i32 %0) {
ret i8 0
}
/* Variables and functions */
int flsl(unsigned long);
int drm_order(unsigned long size) {
  int order;
  if (size == 0)
    return 0;
  order = flsl(size) - 1;
  if (size & ~(1ul << order))
    ++order;
  return order;
}


x86 assembly (clang, -O0):
<drm_order>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1133 <drm_order+0x23>
movl   $0x0,-0x4(%rbp)
jmp    1174 <drm_order+0x64>
mov    -0x10(%rbp),%rdi
call   1030 <flsl@plt>
sub    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%rdx
mov    %rdx,%rcx
xor    $0xffffffffffffffff,%rcx
and    %rcx,%rax
cmp    $0x0,%rax
je     116e <drm_order+0x5e>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drm_order>:
test   %rdi,%rdi
je     112d <drm_order+0x1d>
push   %rbx
mov    %rdi,%rbx
call   1030 <flsl@plt>
lea    -0x1(%rax),%ecx
btr    %rcx,%rbx
test   %rbx,%rbx
cmove  %ecx,%eax
pop    %rbx
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @drm_order(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %24
8: ; preds = %1
%9 = load i64, i64* %3
%10 = call i32 @flsl(i64 %9)
%11 = sub nsw i32 %10, 1
store i32 %11, i32* %4
%12 = load i64, i64* %3
%13 = load i32, i32* %4
%14 = zext i32 %13 to i64
%15 = shl i64 1, %14
%16 = xor i64 %15, -1
%17 = and i64 %12, %16
%18 = icmp ne i64 %17, 0
br i1 %18, label %19, label %22
19: ; preds = %8
%20 = load i32, i32* %4
%21 = add nsw i32 %20, 1
store i32 %21, i32* %4
br label %22
22: ; preds = %19, %8
%23 = load i32, i32* %4
store i32 %23, i32* %2
br label %24
24: ; preds = %22, %7
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @drm_order(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = tail call i32 @flsl(i64 %0)
%5 = add nsw i32 %4, -1
%6 = zext i32 %5 to i64
%7 = shl nuw i64 1, %6
%8 = xor i64 %7, -1
%9 = and i64 %8, %0
%10 = icmp eq i64 %9, 0
%11 = select i1 %10, i32 %5, i32 %4
br label %12
12: ; preds = %1, %3
%13 = phi i32 [ %11, %3 ], [ 0, %1 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ cr();
int /*<<< orphan*/ say(char *);
void titles(void) {
  say("\ndset sort n nsegs . bl1 bl2 iosz tfl . nkeys nbytes tfbytes obytes "
      "alloc . ");
  say("nT nN nP nB nS nF . add gro srt mer . rea tfw tfr wri . tot mbs");
  cr();
}


x86 assembly (clang, -O0):
<titles>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <say@plt>
lea    0xf16(%rip),%rdi
call   1040 <say@plt>
mov    $0x0,%al
call   1030 <cr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<titles>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <say@plt>
lea    0xf19(%rip),%rdi
call   1040 <say@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <cr@plt>

LLVM IR (-O0):
@.str = [77 x i8] c"\0Adset sort n nsegs . bl1 bl2 iosz tfl . nkeys nbytes tfbytes obytes alloc . \00"
@.str.1 = [64 x i8] c"nT nN nP nB nS nF . add gro srt mer . rea tfw tfr wri . tot mbs\00"
define void @titles() {
%1 = call i32 @say(i8* getelementptr inbounds ([77 x i8], [77 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @say(i8* getelementptr inbounds ([64 x i8], [64 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 (...) @cr()
ret void
}

LLVM IR (-O2):
@.str = [77 x i8] c"\0Adset sort n nsegs . bl1 bl2 iosz tfl . nkeys nbytes tfbytes obytes alloc . \00"
@.str.1 = [64 x i8] c"nT nN nP nB nS nF . add gro srt mer . rea tfw tfr wri . tot mbs\00"
define void @titles() {
%1 = tail call i32 @say(i8* getelementptr inbounds ([77 x i8], [77 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @say(i8* getelementptr inbounds ([64 x i8], [64 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 (...) @cr()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
uint64_t rng_max() { return (uint64_t)-1UL; }


x86 assembly (clang, -O0):
<rng_max>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rng_max>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @rng_max() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @rng_max() {
ret i32 -1
}
/* Variables and functions */
char toupper(char);
char revcomp(char c) {
  char ch = toupper(c);
  switch (ch) {
  case 'A':
    return 'T';
  case 'C':
    return 'G';
  case 'G':
    return 'C';
  case 'T':
    return 'A';
  default:
    return ch;
  }
}


x86 assembly (clang, -O0):
<revcomp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%edi
call   1030 <toupper@plt>
mov    %al,-0x3(%rbp)
movsbl -0x3(%rbp),%eax
add    $0xffffffbf,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x13,%eax
ja     1178 <revcomp+0x68>
mov    -0x10(%rbp),%rax
lea    0xeb5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movb   $0x54,-0x1(%rbp)
jmp    117e <revcomp+0x6e>
movb   $0x47,-0x1(%rbp)
jmp    117e <revcomp+0x6e>
movb   $0x43,-0x1(%rbp)
jmp    117e <revcomp+0x6e>
movb   $0x41,-0x1(%rbp)
jmp    117e <revcomp+0x6e>
mov    -0x3(%rbp),%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<revcomp>:
push   %rax
call   1030 <toupper@plt>
mov    %eax,%ecx
movsbl %al,%edx
add    $0xffffffbf,%edx
cmp    $0x13,%edx
ja     1139 <revcomp+0x29>
mov    $0x54,%al
lea    0xed4(%rip),%rsi
movslq (%rsi,%rdx,4),%rdx
add    %rsi,%rdx
jmp    *%rdx
mov    $0x47,%al
pop    %rcx
ret
mov    %ecx,%eax
pop    %rcx
ret
mov    $0x43,%al
pop    %rcx
ret
mov    $0x41,%al
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @revcomp(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
%5 = load i8, i8* %3
%6 = call signext i8 @toupper(i8 signext %5)
store i8 %6, i8* %4
%7 = load i8, i8* %4
%8 = sext i8 %7 to i32
switch i32 %8, label %13 [
i32 65, label %9
i32 67, label %10
i32 71, label %11
i32 84, label %12
]
9: ; preds = %1
store i8 84, i8* %2
br label %15
10: ; preds = %1
store i8 71, i8* %2
br label %15
11: ; preds = %1
store i8 67, i8* %2
br label %15
12: ; preds = %1
store i8 65, i8* %2
br label %15
13: ; preds = %1
%14 = load i8, i8* %4
store i8 %14, i8* %2
br label %15
15: ; preds = %13, %12, %11, %10, %9
%16 = load i8, i8* %2
ret i8 %16
}

LLVM IR (-O2):
define signext i8 @revcomp(i8 signext %0) {
%2 = tail call signext i8 @toupper(i8 signext %0)
%3 = sext i8 %2 to i32
switch i32 %3, label %7 [
i32 65, label %8
i32 67, label %4
i32 71, label %5
i32 84, label %6
]
4: ; preds = %1
br label %8
5: ; preds = %1
br label %8
6: ; preds = %1
br label %8
7: ; preds = %1
br label %8
8: ; preds = %1, %7, %6, %5, %4
%9 = phi i8 [ %2, %7 ], [ 65, %6 ], [ 67, %5 ], [ 71, %4 ], [ 84, %1 ]
ret i8 %9
}
/* Variables and functions */
int /*<<< orphan*/ dtoi(float);
int /*<<< orphan*/ g2_pen(int /*<<< orphan*/, int /*<<< orphan*/);
void g2_pen_(float *dev, float *color) { g2_pen(dtoi(*dev), dtoi(*color)); }


x86 assembly (clang, -O0):
<g2_pen_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
call   1030 <dtoi@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
call   1030 <dtoi@plt>
mov    -0x14(%rbp),%edi
mov    %eax,%esi
call   1040 <g2_pen@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g2_pen_>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
movss  (%rdi),%xmm0
call   1030 <dtoi@plt>
mov    %eax,%ebp
movss  (%rbx),%xmm0
call   1030 <dtoi@plt>
mov    %ebp,%edi
mov    %eax,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <g2_pen@plt>

LLVM IR (-O0):
define void @g2_pen_(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = load float, float* %5
%7 = call i32 @dtoi(float %6)
%8 = load float*, float** %4
%9 = load float, float* %8
%10 = call i32 @dtoi(float %9)
%11 = call i32 @g2_pen(i32 %7, i32 %10)
ret void
}

LLVM IR (-O2):
define void @g2_pen_(float* nocapture %0, float* nocapture %1) {
%3 = load float, float* %0
%4 = tail call i32 @dtoi(float %3)
%5 = load float, float* %1
%6 = tail call i32 @dtoi(float %5)
%7 = tail call i32 @g2_pen(i32 %4, i32 %6)
ret void
}
int acronymHint(int maxWidth) { return (int)(maxWidth / 6.00); }


x86 assembly (clang, -O0):
<acronymHint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
movsd  0xeec(%rip),%xmm1
divsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<acronymHint>:
cvtsi2sd %edi,%xmm0
divsd  0xef4(%rip),%xmm0
cvttsd2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @acronymHint(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sitofp i32 %3 to double
%5 = fdiv double %4, 6.000000e+00
%6 = fptosi double %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @acronymHint(i32 %0) {
%2 = sitofp i32 %0 to double
%3 = fdiv double %2, 6.000000e+00
%4 = fptosi double %3 to i32
ret i32 %4
}
__attribute__((always_)) int unregister_trace_mm_pagevec_free(
    void (*probe)(void *__data, struct page *page, int cold), void *data) {
  return -38;
}


x86 assembly (clang, -O0):
<unregister_trace_mm_pagevec_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffda,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unregister_trace_mm_pagevec_free>:
mov    $0xffffffda,%eax
ret

LLVM IR (-O0):
%struct.page = type opaque
define i32 @unregister_trace_mm_pagevec_free(void (i8*, %struct.page*, i32)* %0, i8* %1) {
%3 = alloca void (i8*, %struct.page*, i32)*
%4 = alloca i8*
store void (i8*, %struct.page*, i32)* %0, void (i8*, %struct.page*, i32)** %3
store i8* %1, i8** %4
ret i32 -38
}

LLVM IR (-O2):
%struct.page = type opaque
define i32 @unregister_trace_mm_pagevec_free(void (i8*, %struct.page*, i32)* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 -38
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
struct crypto_aes_key {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ AES_encrypt(int /*<<< orphan*/ const *, int /*<<< orphan*/ *,
                               void const *);
void crypto_aes_encrypt_block(const uint8_t *in, uint8_t *out,
                              const struct crypto_aes_key *key) {
  AES_encrypt(in, out, (const void *)key);
}


x86 assembly (clang, -O0):
<crypto_aes_encrypt_block>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <AES_encrypt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crypto_aes_encrypt_block>:
jmp    1030 <AES_encrypt@plt>

LLVM IR (-O0):
%struct.crypto_aes_key = type { i32 }
define void @crypto_aes_encrypt_block(i32* %0, i32* %1, %struct.crypto_aes_key* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca %struct.crypto_aes_key*
store i32* %0, i32** %4
store i32* %1, i32** %5
store %struct.crypto_aes_key* %2, %struct.crypto_aes_key** %6
%7 = load i32*, i32** %4
%8 = load i32*, i32** %5
%9 = load %struct.crypto_aes_key*, %struct.crypto_aes_key** %6
%10 = bitcast %struct.crypto_aes_key* %9 to i8*
%11 = call i32 @AES_encrypt(i32* %7, i32* %8, i8* %10)
ret void
}

LLVM IR (-O2):
%struct.crypto_aes_key = type { i32 }
define void @crypto_aes_encrypt_block(i32* %0, i32* %1, %struct.crypto_aes_key* %2) {
%4 = bitcast %struct.crypto_aes_key* %2 to i8*
%5 = tail call i32 @AES_encrypt(i32* %0, i32* %1, i8* %4)
ret void
}
/* Variables and functions */
void *new (void *, size_t);
void *newa(void *heap, void *affinity, size_t size) { return new (heap, size); }


x86 assembly (clang, -O0):
<newa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <new@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<newa>:
mov    %rdx,%rsi
jmp    1030 <new@plt>

LLVM IR (-O0):
define i8* @newa(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %6
%9 = call i8* @new(i8* %7, i64 %8)
ret i8* %9
}

LLVM IR (-O2):
define i8* @newa(i8* %0, i8* nocapture readnone %1, i64 %2) {
%4 = tail call i8* @new(i8* %0, i64 %2)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ PF_INET;
int /*<<< orphan*/ SOCK_STREAM;
int /*<<< orphan*/ error(char *);
int socket(int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/);
int open_socket(void) {
  int s;
  if ((s = socket(PF_INET, SOCK_STREAM, 0)) == -1)
    error("Can't open socket");
  return s;
}


x86 assembly (clang, -O0):
<open_socket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
mov    0x2ea8(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1040 <socket@plt>
mov    %eax,-0x4(%rbp)
cmp    $0xffffffff,%eax
jne    1159 <open_socket+0x39>
lea    0xeac(%rip),%rdi
call   1030 <error@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_socket>:
push   %rbx
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
mov    0x2eaf(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1040 <socket@plt>
mov    %eax,%ebx
cmp    $0xffffffff,%eax
jne    114d <open_socket+0x2d>
lea    0xeb8(%rip),%rdi
call   1030 <error@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@PF_INET = global i32 0
@SOCK_STREAM = global i32 0
@.str = [18 x i8] c"Can't open socket\00"
define i32 @open_socket() {
%1 = alloca i32
%2 = load i32, i32* @PF_INET
%3 = load i32, i32* @SOCK_STREAM
%4 = call i32 @socket(i32 %2, i32 %3, i32 0)
store i32 %4, i32* %1
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @error(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %0
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
@PF_INET = global i32 0
@SOCK_STREAM = global i32 0
@.str = [18 x i8] c"Can't open socket\00"
define i32 @open_socket() {
%1 = load i32, i32* @PF_INET
%2 = load i32, i32* @SOCK_STREAM
%3 = tail call i32 @socket(i32 %1, i32 %2, i32 0)
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = tail call i32 @error(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %0
ret i32 %3
}
void signed_char_xor_signed_char(signed char *LHS, signed char RHS) {
  (*LHS) ^= RHS;
}


x86 assembly (clang, -O0):
<signed_char_xor_signed_char>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movsbl -0x9(%rbp),%edx
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %edx,%ecx
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<signed_char_xor_signed_char>:
xor    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @signed_char_xor_signed_char(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = xor i32 %9, %6
%11 = trunc i32 %10 to i8
store i8 %11, i8* %7
ret void
}

LLVM IR (-O2):
define void @signed_char_xor_signed_char(i8* nocapture %0, i8 signext %1) {
%3 = load i8, i8* %0
%4 = xor i8 %3, %1
store i8 %4, i8* %0
ret void
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t ne_int32_t(int32_t a, int32_t b) { return a != b; }


x86 assembly (clang, -O0):
<ne_int32_t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ne_int32_t>:
xor    %eax,%eax
cmp    %esi,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @ne_int32_t(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ne i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @ne_int32_t(i32 %0, i32 %1) {
%3 = icmp ne i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
void avio_alloc_context() {}


x86 assembly (clang, -O0):
<avio_alloc_context>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avio_alloc_context>:
ret

LLVM IR (-O0):
define void @avio_alloc_context() {
ret void
}

LLVM IR (-O2):
define void @avio_alloc_context() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ResetGameEvent();
int ShuffleOK(int n) {
  ResetGameEvent();
  return 1;
}


x86 assembly (clang, -O0):
<ShuffleOK>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <ResetGameEvent@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ShuffleOK>:
push   %rax
xor    %eax,%eax
call   1030 <ResetGameEvent@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ShuffleOK(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @ResetGameEvent()
ret i32 1
}

LLVM IR (-O2):
define i32 @ShuffleOK(i32 %0) {
%2 = tail call i32 (...) @ResetGameEvent()
ret i32 1
}
cbuf20(f, n) int f, n;
{ cbuf(f, n, 20); }


x86 assembly (clang, -O0):
<cbuf20>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    $0x14,%edx
mov    $0x0,%al
call   1030 <cbuf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbuf20>:
mov    $0x14,%edx
xor    %eax,%eax
jmp    1030 <cbuf@plt>

LLVM IR (-O0):
define i32 @cbuf20(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = call i32 (i32, i32, i32, ...) bitcast (i32 (...)* @cbuf to i32 (i32, i32, i32, ...)*)(i32 %6, i32 %7, i32 20)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @cbuf20(i32 %0, i32 %1) {
%3 = tail call i32 (i32, i32, i32, ...) bitcast (i32 (...)* @cbuf to i32 (i32, i32, i32, ...)*)(i32 %0, i32 %1, i32 20)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0x4f() {
  Assert_real((iscntrl(79) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              400, ("iscntrl should be 0 for O"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0x4f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4f,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x190,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0x4f>:
push   %rax
mov    $0x4f,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x190,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for O\00"
define void @t_iscntrl_0x4f() {
%1 = call i64 @iscntrl(i32 79)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 400, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for O\00"
define void @t_iscntrl_0x4f() {
%1 = tail call i64 @iscntrl(i32 79)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 400, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Error(char *);
int /*<<< orphan*/ SkipUntilSep();
void InvalidFormatString(void) {
  Error("Invalid format string");
  SkipUntilSep();
}


x86 assembly (clang, -O0):
<InvalidFormatString>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <Error@plt>
mov    $0x0,%al
call   1040 <SkipUntilSep@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<InvalidFormatString>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <Error@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <SkipUntilSep@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"Invalid format string\00"
define void @InvalidFormatString() {
%1 = call i32 @Error(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @SkipUntilSep()
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"Invalid format string\00"
define void @InvalidFormatString() {
%1 = tail call i32 @Error(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @SkipUntilSep()
ret void
}