xunge/DecIR huggingface dataset:
int test_imm_3Bint8_mem(signed char *val) {
  return ((*val) & (0x3B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Bint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0x3b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Bint8_mem>:
testb  $0x3b,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Bint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 59
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_3Bint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 59
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t rmd_f2(uint32_t x, uint32_t y, uint32_t z) {
  return (x & y) | (~x & z);
}


x86 assembly (clang, -O0):
<rmd_f2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
xor    $0xffffffff,%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rmd_f2>:
mov    %esi,%eax
xor    %edx,%eax
and    %edi,%eax
xor    %edx,%eax
ret

LLVM IR (-O0):
define i32 @rmd_f2(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = and i32 %7, %8
%10 = load i32, i32* %4
%11 = xor i32 %10, -1
%12 = load i32, i32* %6
%13 = and i32 %11, %12
%14 = or i32 %9, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @rmd_f2(i32 %0, i32 %1, i32 %2) {
%4 = and i32 %1, %0
%5 = xor i32 %0, -1
%6 = and i32 %5, %2
%7 = or i32 %6, %4
ret i32 %7
}
int can_change_color() { return 0; }


x86 assembly (clang, -O0):
<can_change_color>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<can_change_color>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @can_change_color() {
ret i32 0
}

LLVM IR (-O2):
define i32 @can_change_color() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ ofl_hex_print(int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                                 size_t);
int /*<<< orphan*/ *open_memstream(char **, size_t *);
char *ofl_hex_to_string(uint8_t *buf, size_t buf_size) {
  char *str;
  size_t str_size;
  FILE *stream = open_memstream(&str, &str_size);
  ofl_hex_print(stream, buf, buf_size);
  fclose(stream);
  return str;
}


x86 assembly (clang, -O0):
<ofl_hex_to_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x18(%rbp),%rdi
lea    -0x20(%rbp),%rsi
call   1030 <open_memstream@plt>
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1050 <ofl_hex_print@plt>
mov    -0x28(%rbp),%rdi
call   1040 <fclose@plt>
mov    -0x18(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ofl_hex_to_string>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%r14
mov    %rdi,%r15
mov    %rsp,%rdi
lea    0x8(%rsp),%rsi
call   1030 <open_memstream@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
call   1050 <ofl_hex_print@plt>
mov    %rbx,%rdi
call   1040 <fclose@plt>
mov    (%rsp),%rax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @ofl_hex_to_string(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32*
store i32* %0, i32** %3
store i64 %1, i64* %4
%8 = call i32* @open_memstream(i8** %5, i64* %6)
store i32* %8, i32** %7
%9 = load i32*, i32** %7
%10 = load i32*, i32** %3
%11 = load i64, i64* %4
%12 = call i32 @ofl_hex_print(i32* %9, i32* %10, i64 %11)
%13 = load i32*, i32** %7
%14 = call i32 @fclose(i32* %13)
%15 = load i8*, i8** %5
ret i8* %15
}

LLVM IR (-O2):
define i8* @ofl_hex_to_string(i32* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = bitcast i8** %3 to i8*
%6 = bitcast i64* %4 to i8*
%7 = call i32* @open_memstream(i8** %3, i64* %4)
%8 = call i32 @ofl_hex_print(i32* %7, i32* %0, i64 %1)
%9 = call i32 @fclose(i32* %7)
%10 = load i8*, i8** %3
ret i8* %10
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void encbe32(const uint32_t n, void *_b) {
  uint8_t *b = (uint8_t *)_b;
  b[3] = (n >> 0) & 0xff;
  b[2] = (n >> 8) & 0xff;
  b[1] = (n >> 16) & 0xff;
  b[0] = (n >> 24) & 0xff;
}


x86 assembly (clang, -O0):
<encbe32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%ecx
sar    $0x0,%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0xc(%rax)
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0x4(%rbp),%ecx
sar    $0x10,%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0x4(%rbp),%ecx
sar    $0x18,%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<encbe32>:
mov    %edi,%eax
movzbl %al,%ecx
mov    %ecx,0xc(%rsi)
movzbl %ah,%ecx
mov    %ecx,0x8(%rsi)
mov    %edi,%ecx
shr    $0x10,%ecx
movzbl %cl,%ecx
mov    %ecx,0x4(%rsi)
shr    $0x18,%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @encbe32(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32*
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %5
%8 = load i32, i32* %3
%9 = ashr i32 %8, 0
%10 = and i32 %9, 255
%11 = load i32*, i32** %5
%12 = getelementptr inbounds i32, i32* %11, i64 3
store i32 %10, i32* %12
%13 = load i32, i32* %3
%14 = ashr i32 %13, 8
%15 = and i32 %14, 255
%16 = load i32*, i32** %5
%17 = getelementptr inbounds i32, i32* %16, i64 2
store i32 %15, i32* %17
%18 = load i32, i32* %3
%19 = ashr i32 %18, 16
%20 = and i32 %19, 255
%21 = load i32*, i32** %5
%22 = getelementptr inbounds i32, i32* %21, i64 1
store i32 %20, i32* %22
%23 = load i32, i32* %3
%24 = ashr i32 %23, 24
%25 = and i32 %24, 255
%26 = load i32*, i32** %5
%27 = getelementptr inbounds i32, i32* %26, i64 0
store i32 %25, i32* %27
ret void
}

LLVM IR (-O2):
define void @encbe32(i32 %0, i8* nocapture writeonly %1) {
%3 = bitcast i8* %1 to i32*
%4 = and i32 %0, 255
%5 = getelementptr inbounds i8, i8* %1, i64 12
%6 = bitcast i8* %5 to i32*
store i32 %4, i32* %6
%7 = lshr i32 %0, 8
%8 = and i32 %7, 255
%9 = getelementptr inbounds i8, i8* %1, i64 8
%10 = bitcast i8* %9 to i32*
store i32 %8, i32* %10
%11 = lshr i32 %0, 16
%12 = and i32 %11, 255
%13 = getelementptr inbounds i8, i8* %1, i64 4
%14 = bitcast i8* %13 to i32*
store i32 %12, i32* %14
%15 = lshr i32 %0, 24
store i32 %15, i32* %3
ret void
}
int test_imm_34int8_mem(signed char *val) {
  return ((*val) & (-0x34 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_34int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xffffffcc,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_34int8_mem>:
testb  $0xcc,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_34int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, -52
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_34int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -52
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void mutex_flock_close(int fd) { close(fd); }


x86 assembly (clang, -O0):
<mutex_flock_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mutex_flock_close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @mutex_flock_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret void
}

LLVM IR (-O2):
define void @mutex_flock_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret void
}
void ft_striteri(char *s, void (*f)(unsigned int, char *)) {
  int i;
  i = 0;
  while (*s) {
    (*f)(i, s);
    i++;
    s++;
  }
}


x86 assembly (clang, -O0):
<ft_striteri>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     114b <ft_striteri+0x4b>
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%edi
mov    -0x8(%rbp),%rsi
call   *%rax
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1117 <ft_striteri+0x17>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_striteri>:
push   %r15
push   %r14
push   %rbx
cmpb   $0x0,(%rdi)
je     1135 <ft_striteri+0x35>
mov    %rsi,%r14
mov    %rdi,%r15
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    (%r15,%rbx,1),%rsi
mov    %ebx,%edi
call   *%r14
cmpb   $0x0,0x1(%r15,%rbx,1)
lea    0x1(%rbx),%rbx
jne    1120 <ft_striteri+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @ft_striteri(i8* %0, void (i32, i8*)* %1) {
%3 = alloca i8*
%4 = alloca void (i32, i8*)*
%5 = alloca i32
store i8* %0, i8** %3
store void (i32, i8*)* %1, void (i32, i8*)** %4
store i32 0, i32* %5
br label %6
6: ; preds = %10, %2
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load void (i32, i8*)*, void (i32, i8*)** %4
%12 = load i32, i32* %5
%13 = load i8*, i8** %3
%14 = load i32, i32* %5
%15 = add nsw i32 %14, 1
store i32 %15, i32* %5
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %3
br label %6
18: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @ft_striteri(i8* %0, void (i32, i8*)* nocapture %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %12, label %5
5: ; preds = %2, %5
%6 = phi i32 [ %8, %5 ], [ 0, %2 ]
%7 = phi i8* [ %9, %5 ], [ %0, %2 ]
tail call void %1(i32 %6, i8* %7)
%8 = add nuw nsw i32 %6, 1
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %5
12: ; preds = %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ f4();
int /*<<< orphan*/ f5();
int /*<<< orphan*/ pf1();
int /*<<< orphan*/ pf2();
int /*<<< orphan*/ pf4();
int /*<<< orphan*/ pf5();
int main(void) {
  f4();
  f5();
  pf1();
  pf2();
  pf4();
  pf5();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1080 <f4@plt>
mov    $0x0,%al
call   1050 <f5@plt>
mov    $0x0,%al
call   1030 <pf1@plt>
mov    $0x0,%al
call   1070 <pf2@plt>
mov    $0x0,%al
call   1060 <pf4@plt>
mov    $0x0,%al
call   1040 <pf5@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1080 <f4@plt>
xor    %eax,%eax
call   1050 <f5@plt>
xor    %eax,%eax
call   1030 <pf1@plt>
xor    %eax,%eax
call   1070 <pf2@plt>
xor    %eax,%eax
call   1060 <pf4@plt>
xor    %eax,%eax
call   1040 <pf5@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @f4()
%3 = call i32 (...) @f5()
%4 = call i32 (...) @pf1()
%5 = call i32 (...) @pf2()
%6 = call i32 (...) @pf4()
%7 = call i32 (...) @pf5()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @f4()
%2 = tail call i32 (...) @f5()
%3 = tail call i32 (...) @pf1()
%4 = tail call i32 (...) @pf2()
%5 = tail call i32 (...) @pf4()
%6 = tail call i32 (...) @pf5()
ret i32 0
}
int test_imm_9Fuint32_mem(unsigned int *val) {
  return ((*val) & (0x9F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Fuint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x9f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Fuint32_mem>:
testb  $0x9f,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Fuint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 159
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_9Fuint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 159
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ GPIO_direction_set(int);
int /*<<< orphan*/ GPIO_set(int);
int /*<<< orphan*/ delay(int);
int main() {
  GPIO_direction_set(0x3);
  while (1) {
    GPIO_set(0);
    delay(1000);
    GPIO_set(3);
    delay(1000);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x3,%edi
call   1030 <GPIO_direction_set@plt>
xor    %edi,%edi
call   1050 <GPIO_set@plt>
mov    $0x3e8,%edi
call   1040 <delay@plt>
mov    $0x3,%edi
call   1050 <GPIO_set@plt>
mov    $0x3e8,%edi
call   1040 <delay@plt>
jmp    1149 <main+0x19>

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x3,%edi
call   1030 <GPIO_direction_set@plt>
nopl   0x0(%rax,%rax,1)
xor    %edi,%edi
call   1050 <GPIO_set@plt>
mov    $0x3e8,%edi
call   1040 <delay@plt>
mov    $0x3,%edi
call   1050 <GPIO_set@plt>
mov    $0x3e8,%edi
call   1040 <delay@plt>
jmp    1140 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @GPIO_direction_set(i32 3)
br label %3
3: ; preds = %0, %3
%4 = call i32 @GPIO_set(i32 0)
%5 = call i32 @delay(i32 1000)
%6 = call i32 @GPIO_set(i32 3)
%7 = call i32 @delay(i32 1000)
br label %3
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @GPIO_direction_set(i32 3)
br label %2
2: ; preds = %0, %2
%3 = tail call i32 @GPIO_set(i32 0)
%4 = tail call i32 @delay(i32 1000)
%5 = tail call i32 @GPIO_set(i32 3)
%6 = tail call i32 @delay(i32 1000)
br label %2
}
void swift_slowAlloc(void) {}


x86 assembly (clang, -O0):
<swift_slowAlloc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swift_slowAlloc>:
ret

LLVM IR (-O0):
define void @swift_slowAlloc() {
ret void
}

LLVM IR (-O2):
define void @swift_slowAlloc() {
ret void
}
/* Variables and functions */
char *fgetln(int /*<<< orphan*/, size_t *);
int /*<<< orphan*/ stdin;
int main(void) {
  char *cp;
  size_t sz;
  cp = fgetln(stdin, &sz);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
lea    -0x18(%rbp),%rsi
call   1030 <fgetln@plt>
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
call   1030 <fgetln@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stdin = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i64
store i32 0, i32* %1
%4 = load i32, i32* @stdin
%5 = call i8* @fgetln(i32 %4, i64* %3)
store i8* %5, i8** %2
ret i32 0
}

LLVM IR (-O2):
@stdin = global i32 0
define i32 @main() {
%1 = alloca i64
%2 = bitcast i64* %1 to i8*
%3 = load i32, i32* @stdin
%4 = call i8* @fgetln(i32 %3, i64* %1)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ bam_swap_endian_4(int /*<<< orphan*/);
void *bam_swap_endian_4p(void *x) {
  *(uint32_t *)x = bam_swap_endian_4(*(uint32_t *)x);
  return x;
}


x86 assembly (clang, -O0):
<bam_swap_endian_4p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <bam_swap_endian_4@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bam_swap_endian_4p>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%edi
call   1030 <bam_swap_endian_4@plt>
mov    %eax,(%rbx)
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @bam_swap_endian_4p(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
%6 = call i32 @bam_swap_endian_4(i32 %5)
%7 = load i8*, i8** %2
%8 = bitcast i8* %7 to i32*
store i32 %6, i32* %8
%9 = load i8*, i8** %2
ret i8* %9
}

LLVM IR (-O2):
define i8* @bam_swap_endian_4p(i8* returned %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 @bam_swap_endian_4(i32 %3)
store i32 %4, i32* %2
ret i8* %0
}
unsigned long next(unsigned long index, unsigned long count) {
  return (index + count) % 30000;
}


x86 assembly (clang, -O0):
<next>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    $0x7530,%ecx
xor    %edx,%edx
div    %rcx
mov    %rdx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<next>:
lea    (%rdi,%rsi,1),%rcx
mov    %rcx,%rax
shr    $0x4,%rax
movabs $0x45e7b272f608771,%rdx
7b 5e 04
mul    %rdx
shr    $0x5,%rdx
imul   $0x7530,%rdx,%rax
sub    %rax,%rcx
mov    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @next(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = add i64 %5, %6
%8 = urem i64 %7, 30000
ret i64 %8
}

LLVM IR (-O2):
define i64 @next(i64 %0, i64 %1) {
%3 = add i64 %1, %0
%4 = urem i64 %3, 30000
ret i64 %4
}
int anychar(char *s, char c) {
  char *sindex = s;
  while (*sindex != '\0') {
    if (*sindex++ == c)
      return (int)(sindex - s - 1);
  }
  return -1;
}


x86 assembly (clang, -O0):
<anychar>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1160 <anychar+0x60>
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x20(%rbp)
movsbl (%rax),%eax
movsbl -0x11(%rbp),%ecx
cmp    %ecx,%eax
jne    115b <anychar+0x5b>
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
sub    $0x1,%rax
mov    %eax,-0x4(%rbp)
jmp    1167 <anychar+0x67>
jmp    1116 <anychar+0x16>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<anychar>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
movzbl (%rdi),%ecx
test   %cl,%cl
je     1124 <anychar+0x24>
add    $0x1,%rdi
add    $0x1,%eax
cmp    %sil,%cl
jne    1110 <anychar+0x10>
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @anychar(i8* %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8*
store i8* %0, i8** %4
store i8 %1, i8* %5
%7 = load i8*, i8** %4
store i8* %7, i8** %6
br label %8
8: ; preds = %29, %2
%9 = load i8*, i8** %6
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %30
13: ; preds = %8
%14 = load i8*, i8** %6
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %6
%16 = load i8, i8* %14
%17 = sext i8 %16 to i32
%18 = load i8, i8* %5
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %17, %19
br i1 %20, label %21, label %29
21: ; preds = %13
%22 = load i8*, i8** %6
%23 = load i8*, i8** %4
%24 = ptrtoint i8* %22 to i64
%25 = ptrtoint i8* %23 to i64
%26 = sub i64 %24, %25
%27 = sub nsw i64 %26, 1
%28 = trunc i64 %27 to i32
store i32 %28, i32* %3
br label %31
29: ; preds = %13
br label %8
30: ; preds = %8
store i32 -1, i32* %3
br label %31
31: ; preds = %30, %21
%32 = load i32, i32* %3
ret i32 %32
}

LLVM IR (-O2):
define i32 @anychar(i8* %0, i8 signext %1) {
br label %3
3: ; preds = %7, %2
%4 = phi i8* [ %0, %2 ], [ %8, %7 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
br i1 %6, label %16, label %7
7: ; preds = %3
%8 = getelementptr inbounds i8, i8* %4, i64 1
%9 = icmp eq i8 %5, %1
br i1 %9, label %10, label %3
10: ; preds = %7
%11 = ptrtoint i8* %8 to i64
%12 = ptrtoint i8* %0 to i64
%13 = xor i64 %12, -1
%14 = add i64 %11, %13
%15 = trunc i64 %14 to i32
br label %16
16: ; preds = %3, %10
%17 = phi i32 [ %15, %10 ], [ -1, %3 ]
ret i32 %17
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ milli_delay(int);
int /*<<< orphan*/ printf(char *);
void TestC() {
  assert(0);
  while (1) {
    printf("C");
    milli_delay(200);
  }
}


x86 assembly (clang, -O0):
<TestC>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1040 <assert@plt>
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
mov    $0xc8,%edi
call   1050 <milli_delay@plt>
jmp    113b <TestC+0xb>

x86 assembly (clang, -O2):
<TestC>:
push   %rax
xor    %edi,%edi
call   1040 <assert@plt>
nopl   0x0(%rax,%rax,1)
mov    $0x43,%edi
call   1030 <putchar@plt>
mov    $0xc8,%edi
call   1050 <milli_delay@plt>
jmp    1140 <TestC+0x10>

LLVM IR (-O0):
@.str = [2 x i8] c"C\00"
define void @TestC() {
%1 = call i32 @assert(i32 0)
br label %2
2: ; preds = %0, %2
%3 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @milli_delay(i32 200)
br label %2
}

LLVM IR (-O2):
define void @TestC() {
%1 = tail call i32 @assert(i32 0)
br label %2
2: ; preds = %0, %2
%3 = tail call i32 @putchar(i32 67)
%4 = tail call i32 @milli_delay(i32 200)
br label %2
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
float stdlib_strided_svariance(int, float, float *, int);
int main() {
  float x[] = {1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0};
  int64_t N = 4;
  int64_t stride = 2;
  float v = stdlib_strided_svariance(N, 1.0f, x, stride);
  printf("sample variance: %f\n", v);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0xee1(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xede(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xedb(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xed8(%rip),%rax
mov    %rax,-0x8(%rbp)
movl   $0x4,-0x24(%rbp)
movl   $0x2,-0x28(%rbp)
mov    -0x24(%rbp),%edi
lea    -0x20(%rbp),%rsi
mov    -0x28(%rbp),%edx
movss  0xe8c(%rip),%xmm0
call   1040 <stdlib_strided_svariance@plt>
movss  %xmm0,-0x2c(%rbp)
movss  -0x2c(%rbp),%xmm0
lea    0xea6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
movaps 0xef5(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xed9(%rip),%xmm0
movaps %xmm0,(%rsp)
movss  0xebd(%rip),%xmm0
mov    %rsp,%rsi
mov    $0x4,%edi
mov    $0x2,%edx
call   1040 <stdlib_strided_svariance@plt>
lea    0xed4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.main.x = [8 x float] [float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00, float 5.000000e+00, float 6.000000e+00, float 7.000000e+00, float 8.000000e+00]
@.str = [21 x i8] c"sample variance: %f\0A\00"
define i32 @main() {
%1 = alloca [8 x float]
%2 = alloca i32
%3 = alloca i32
%4 = alloca float
%5 = bitcast [8 x float]* %1 to i8*
store i32 4, i32* %2
store i32 2, i32* %3
%6 = load i32, i32* %2
%7 = getelementptr inbounds [8 x float], [8 x float]* %1, i64 0, i64 0
%8 = load i32, i32* %3
%9 = call float @stdlib_strided_svariance(i32 %6, float 1.000000e+00, float* %7, i32 %8)
store float %9, float* %4
%10 = load float, float* %4
%11 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), float %10)
ret i32 0
}

LLVM IR (-O2):
@__const.main.x = [8 x float] [float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00, float 5.000000e+00, float 6.000000e+00, float 7.000000e+00, float 8.000000e+00]
@.str = [21 x i8] c"sample variance: %f\0A\00"
define i32 @main() {
%1 = alloca [8 x float]
%2 = bitcast [8 x float]* %1 to i8*
%3 = getelementptr inbounds [8 x float], [8 x float]* %1, i64 0, i64 0
%4 = call float @stdlib_strided_svariance(i32 4, float 1.000000e+00, float* %3, i32 2)
%5 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), float %4)
ret i32 0
}
void foo618() {}


x86 assembly (clang, -O0):
<foo618>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo618>:
ret

LLVM IR (-O0):
define void @foo618() {
ret void
}

LLVM IR (-O2):
define void @foo618() {
ret void
}
/* Variables and functions */
int wiringPiI2CSetup(int);
int __pca9685_init(void) {
  int fd = 0;
  fd = wiringPiI2CSetup(0x40);
  if (fd > 0) {
  }
  return fd;
}


x86 assembly (clang, -O0):
<__pca9685_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x40,%edi
call   1030 <wiringPiI2CSetup@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    113b <__pca9685_init+0x2b>
jmp    113b <__pca9685_init+0x2b>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__pca9685_init>:
mov    $0x40,%edi
jmp    1030 <wiringPiI2CSetup@plt>

LLVM IR (-O0):
define i32 @__pca9685_init() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @wiringPiI2CSetup(i32 64)
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %0
br label %6
6: ; preds = %5, %0
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
define i32 @__pca9685_init() {
%1 = tail call i32 @wiringPiI2CSetup(i32 64)
ret i32 %1
}
/* Variables and functions */
int hash(char const *);
int get_resourceid(const char *description) { return hash(description) % 128; }


x86 assembly (clang, -O0):
<get_resourceid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <hash@plt>
mov    $0x80,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_resourceid>:
push   %rax
call   1030 <hash@plt>
lea    0x7f(%rax),%ecx
test   %eax,%eax
cmovns %eax,%ecx
and    $0xffffff80,%ecx
sub    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @get_resourceid(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @hash(i8* %3)
%5 = srem i32 %4, 128
ret i32 %5
}

LLVM IR (-O2):
define i32 @get_resourceid(i8* %0) {
%2 = tail call i32 @hash(i8* %0)
%3 = srem i32 %2, 128
ret i32 %3
}
/* Type definitions */
struct timeval {
  int dummy;
};

/* Variables and functions */
double const timevaldouble(struct timeval *);
double thruputpersec(const double n, struct timeval *t) {
  double tv;
  tv = timevaldouble(t);
  if (tv != 0)
    return n / timevaldouble(t);
  else
    return 0;
}


x86 assembly (clang, -O0):
<thruputpersec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <timevaldouble@plt>
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    114c <thruputpersec+0x3c>
jp     114c <thruputpersec+0x3c>
jmp    1175 <thruputpersec+0x65>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <timevaldouble@plt>
movaps %xmm0,%xmm1
movsd  -0x28(%rbp),%xmm0
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    117d <thruputpersec+0x6d>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thruputpersec>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movsd  %xmm0,0x8(%rsp)
call   1030 <timevaldouble@plt>
movapd %xmm0,%xmm1
xorpd  %xmm0,%xmm0
ucomisd %xmm0,%xmm1
jne    1133 <thruputpersec+0x23>
jnp    1149 <thruputpersec+0x39>
mov    %rbx,%rdi
call   1030 <timevaldouble@plt>
movsd  0x8(%rsp),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.timeval = type { i32 }
define double @thruputpersec(double %0, %struct.timeval* %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca %struct.timeval*
%6 = alloca double
store double %0, double* %4
store %struct.timeval* %1, %struct.timeval** %5
%7 = load %struct.timeval*, %struct.timeval** %5
%8 = call double @timevaldouble(%struct.timeval* %7)
store double %8, double* %6
%9 = load double, double* %6
%10 = fcmp une double %9, 0.000000e+00
br i1 %10, label %11, label %16
11: ; preds = %2
%12 = load double, double* %4
%13 = load %struct.timeval*, %struct.timeval** %5
%14 = call double @timevaldouble(%struct.timeval* %13)
%15 = fdiv double %12, %14
store double %15, double* %3
br label %17
16: ; preds = %2
store double 0.000000e+00, double* %3
br label %17
17: ; preds = %16, %11
%18 = load double, double* %3
ret double %18
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
define double @thruputpersec(double %0, %struct.timeval* %1) {
%3 = tail call double @timevaldouble(%struct.timeval* %1)
%4 = fcmp une double %3, 0.000000e+00
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = tail call double @timevaldouble(%struct.timeval* %1)
%7 = fdiv double %0, %6
br label %8
8: ; preds = %2, %5
%9 = phi double [ %7, %5 ], [ 0.000000e+00, %2 ]
ret double %9
}
float sq_side_sperimeter(float semiperimeter) {
  float side = semiperimeter / 2;
  return side;
}


x86 assembly (clang, -O0):
<sq_side_sperimeter>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xeea(%rip),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sq_side_sperimeter>:
mulss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @sq_side_sperimeter(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = fdiv float %4, 2.000000e+00
store float %5, float* %3
%6 = load float, float* %3
ret float %6
}

LLVM IR (-O2):
define float @sq_side_sperimeter(float %0) {
%2 = fmul float %0, 5.000000e-01
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ _BufferWrite(int /*<<< orphan*/, int);
void LCD_X_WriteM01(unsigned char *pData, int NumBytes) {
  for (; NumBytes; NumBytes--) {
    _BufferWrite(*pData++, 1);
  }
}


x86 assembly (clang, -O0):
<LCD_X_WriteM01>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1153 <LCD_X_WriteM01+0x43>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%edi
mov    $0x1,%esi
call   1030 <_BufferWrite@plt>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    111f <LCD_X_WriteM01+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCD_X_WriteM01>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
je     1148 <LCD_X_WriteM01+0x38>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movzbl (%r14,%rbx,1),%edi
mov    $0x1,%esi
call   1030 <_BufferWrite@plt>
add    $0x1,%rbx
cmp    %ebx,%r15d
jne    1130 <LCD_X_WriteM01+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @LCD_X_WriteM01(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %14, %2
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %5
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %3
%11 = load i8, i8* %9
%12 = zext i8 %11 to i32
%13 = call i32 @_BufferWrite(i32 %12, i32 1)
br label %14
14: ; preds = %8
%15 = load i32, i32* %4
%16 = add nsw i32 %15, -1
store i32 %16, i32* %4
br label %5
17: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @LCD_X_WriteM01(i8* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %13, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %11, %4 ], [ %1, %2 ]
%6 = phi i8* [ %7, %4 ], [ %0, %2 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = load i8, i8* %6
%9 = zext i8 %8 to i32
%10 = tail call i32 @_BufferWrite(i32 %9, i32 1)
%11 = add nsw i32 %5, -1
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %2
ret void
}
void foo_2_1_2_2_1_2_1_1_1() {}


x86 assembly (clang, -O0):
<foo_2_1_2_2_1_2_1_1_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_1_2_2_1_2_1_1_1>:
ret

LLVM IR (-O0):
define void @foo_2_1_2_2_1_2_1_1_1() {
ret void
}

LLVM IR (-O2):
define void @foo_2_1_2_2_1_2_1_1_1() {
ret void
}
void Configure_Source_Host(char *filename) { return; }


x86 assembly (clang, -O0):
<Configure_Source_Host>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Configure_Source_Host>:
ret

LLVM IR (-O0):
define void @Configure_Source_Host(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @Configure_Source_Host(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int main(void) {
  close(42);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x2a,%edi
call   1030 <close@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2a,%edi
call   1030 <close@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @close(i32 42)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @close(i32 42)
ret i32 0
}
/* Variables and functions */
int rand();
int rand_int_range(int start, int end) {
  return rand() % (end + 1 - start) + start;
}


x86 assembly (clang, -O0):
<rand_int_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
sub    -0x4(%rbp),%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_int_range>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
sub    %ebp,%ebx
add    $0x1,%ebx
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @rand_int_range(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @rand()
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 1
%8 = load i32, i32* %3
%9 = sub nsw i32 %7, %8
%10 = srem i32 %5, %9
%11 = load i32, i32* %3
%12 = add nsw i32 %10, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @rand_int_range(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = sub i32 1, %0
%5 = add i32 %4, %1
%6 = srem i32 %3, %5
%7 = add nsw i32 %6, %0
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ EACCES;
int /*<<< orphan*/ errno;
int /*<<< orphan*/ printf(char *);
size_t fread(void *ptr __attribute__((unused)),
             size_t size __attribute__((unused)),
             size_t nmemb __attribute__((unused)),
             FILE *stream __attribute__((unused))) {
  printf("fread\n");
  errno = EACCES;
  return 0;
}


x86 assembly (clang, -O0):
<fread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ead(%rip),%rax
mov    (%rax),%ecx
mov    0x2e94(%rip),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fread>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2ec4(%rip),%rax
mov    (%rax),%eax
mov    0x2eab(%rip),%rcx
mov    %eax,(%rcx)
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"fread\0A\00"
@EACCES = global i32 0
@errno = global i32 0
define i64 @fread(i8* %0, i64 %1, i64 %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i32*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i32* %3, i32** %8
%9 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%10 = load i32, i32* @EACCES
store i32 %10, i32* @errno
ret i64 0
}

LLVM IR (-O2):
@EACCES = global i32 0
@errno = global i32 0
@str = [6 x i8] c"fread\00"
define i64 @fread(i8* nocapture readnone %0, i64 %1, i64 %2, i32* nocapture readnone %3) {
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
%6 = load i32, i32* @EACCES
store i32 %6, i32* @errno
ret i64 0
}
unsigned long long g(unsigned long long a) { return a | 0x8000000000000000ull; }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movabs $0x8000000000000000,%rax
or     -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
movabs $0x8000000000000000,%rax
or     %rdi,%rax
ret

LLVM IR (-O0):
define i64 @g(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = or i64 %3, -9223372036854775808
ret i64 %4
}

LLVM IR (-O2):
define i64 @g(i64 %0) {
%2 = or i64 %0, -9223372036854775808
ret i64 %2
}
int is_power_2(unsigned int n) { return ((n - 1) & n) == 0; }


x86 assembly (clang, -O0):
<is_power_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
and    -0x4(%rbp),%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_power_2>:
lea    -0x1(%rdi),%ecx
xor    %eax,%eax
test   %ecx,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_power_2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub i32 %3, 1
%5 = load i32, i32* %2
%6 = and i32 %4, %5
%7 = icmp eq i32 %6, 0
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @is_power_2(i32 %0) {
%2 = tail call i32 @llvm.ctpop.i32(i32 %0)
%3 = icmp ult i32 %2, 2
%4 = zext i1 %3 to i32
ret i32 %4
}
unsigned long unsignedlong_ignoring_unsignedlongint(unsigned long x,
                                                    unsigned long int y) {
  return x;
}


x86 assembly (clang, -O0):
<unsignedlong_ignoring_unsignedlongint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsignedlong_ignoring_unsignedlongint>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @unsignedlong_ignoring_unsignedlongint(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @unsignedlong_ignoring_unsignedlongint(i64 returned %0, i64 %1) {
ret i64 %0
}
/* Variables and functions */
unsigned long xatoull_range(char const *, unsigned long, unsigned long);
__attribute__((always_)) unsigned long
xatoul_range(const char *str, unsigned long l, unsigned long u) {
  return xatoull_range(str, l, u);
}


x86 assembly (clang, -O0):
<xatoul_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <xatoull_range@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xatoul_range>:
jmp    1030 <xatoull_range@plt>

LLVM IR (-O0):
define i64 @xatoul_range(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = call i64 @xatoull_range(i8* %7, i64 %8, i64 %9)
ret i64 %10
}

LLVM IR (-O2):
define i64 @xatoul_range(i8* %0, i64 %1, i64 %2) {
%4 = tail call i64 @xatoull_range(i8* %0, i64 %1, i64 %2)
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ O_RDWR;
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ dup2(int, int);
int open(char *, int /*<<< orphan*/);
void dup_devnull(int to) {
  int fd = open("/dev/null", O_RDWR);
  dup2(fd, to);
  close(fd);
}


x86 assembly (clang, -O0):
<dup_devnull>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ea6(%rip),%rax
mov    (%rax),%esi
lea    0xeb5(%rip),%rdi
call   1050 <open@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x4(%rbp),%esi
call   1030 <dup2@plt>
mov    -0x8(%rbp),%edi
call   1040 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dup_devnull>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    0x2eac(%rip),%rax
mov    (%rax),%esi
lea    0xebb(%rip),%rdi
call   1050 <open@plt>
mov    %eax,%ebp
mov    %eax,%edi
mov    %ebx,%esi
call   1030 <dup2@plt>
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <close@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"/dev/null\00"
@O_RDWR = global i32 0
define void @dup_devnull(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* @O_RDWR
%5 = call i32 @open(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = call i32 @dup2(i32 %6, i32 %7)
%9 = load i32, i32* %3
%10 = call i32 @close(i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"/dev/null\00"
@O_RDWR = global i32 0
define void @dup_devnull(i32 %0) {
%2 = load i32, i32* @O_RDWR
%3 = tail call i32 @open(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = tail call i32 @dup2(i32 %3, i32 %0)
%5 = tail call i32 @close(i32 %3)
ret void
}
int validated_or_get_len(char *cred) {
  char *c = cred;
  while ('\0' != *c) {
    if (';' == *c++)
      return 0;
  }
  return cred - c;
}


x86 assembly (clang, -O0):
<validated_or_get_len>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    %ecx,%eax
je     1151 <validated_or_get_len+0x51>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
movsbl (%rax),%ecx
mov    $0x3b,%eax
cmp    %ecx,%eax
jne    114c <validated_or_get_len+0x4c>
movl   $0x0,-0x4(%rbp)
jmp    115f <validated_or_get_len+0x5f>
jmp    1110 <validated_or_get_len+0x10>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
sub    %rcx,%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<validated_or_get_len>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%rdi,%rax,1),%ecx
test   %cl,%cl
je     1124 <validated_or_get_len+0x24>
add    $0x1,%rax
cmp    $0x3b,%cl
jne    1110 <validated_or_get_len+0x10>
xor    %eax,%eax
ret
neg    %eax
ret

LLVM IR (-O0):
define i32 @validated_or_get_len(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
store i8* %5, i8** %4
br label %6
6: ; preds = %18, %1
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 0, %9
br i1 %10, label %11, label %19
11: ; preds = %6
%12 = load i8*, i8** %4
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %4
%14 = load i8, i8* %12
%15 = sext i8 %14 to i32
%16 = icmp eq i32 59, %15
br i1 %16, label %17, label %18
17: ; preds = %11
store i32 0, i32* %2
br label %26
18: ; preds = %11
br label %6
19: ; preds = %6
%20 = load i8*, i8** %3
%21 = load i8*, i8** %4
%22 = ptrtoint i8* %20 to i64
%23 = ptrtoint i8* %21 to i64
%24 = sub i64 %22, %23
%25 = trunc i64 %24 to i32
store i32 %25, i32* %2
br label %26
26: ; preds = %19, %17
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @validated_or_get_len(i8* %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i8* [ %0, %1 ], [ %7, %6 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %2
%7 = getelementptr inbounds i8, i8* %3, i64 1
%8 = icmp eq i8 %4, 59
br i1 %8, label %14, label %2
9: ; preds = %2
%10 = ptrtoint i8* %0 to i64
%11 = ptrtoint i8* %3 to i64
%12 = sub i64 %10, %11
%13 = trunc i64 %12 to i32
br label %14
14: ; preds = %6, %9
%15 = phi i32 [ %13, %9 ], [ 0, %6 ]
ret i32 %15
}
unsigned char clip(int i) { return (i < 0) ? 0 : ((i > 255) ? 255 : i); }


x86 assembly (clang, -O0):
<clip>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    111b <clip+0x1b>
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    1141 <clip+0x41>
cmpl   $0xff,-0x4(%rbp)
jle    1135 <clip+0x35>
mov    $0xff,%eax
mov    %eax,-0xc(%rbp)
jmp    113b <clip+0x3b>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clip>:
cmp    $0xff,%edi
mov    $0xff,%ecx
cmovl  %edi,%ecx
xor    %eax,%eax
test   %ecx,%ecx
cmovg  %ecx,%eax
ret

LLVM IR (-O0):
define zeroext i8 @clip(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %14
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp sgt i32 %7, 255
br i1 %8, label %9, label %10
9: ; preds = %6
br label %12
10: ; preds = %6
%11 = load i32, i32* %2
br label %12
12: ; preds = %10, %9
%13 = phi i32 [ 255, %9 ], [ %11, %10 ]
br label %14
14: ; preds = %12, %5
%15 = phi i32 [ 0, %5 ], [ %13, %12 ]
%16 = trunc i32 %15 to i8
ret i8 %16
}

LLVM IR (-O2):
define zeroext i8 @clip(i32 %0) {
%2 = icmp slt i32 %0, 255
%3 = select i1 %2, i32 %0, i32 255
%4 = icmp sgt i32 %3, 0
%5 = select i1 %4, i32 %3, i32 0
%6 = trunc i32 %5 to i8
ret i8 %6
}
void foo118(int p) {}


x86 assembly (clang, -O0):
<foo118>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo118>:
ret

LLVM IR (-O0):
define void @foo118(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo118(i32 %0) {
ret void
}
/* Variables and functions */
int LZ5_decompress_fast(char const *, char *, int);
int LZ5_uncompress(const char *source, char *dest, int outputSize) {
  return LZ5_decompress_fast(source, dest, outputSize);
}


x86 assembly (clang, -O0):
<LZ5_uncompress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <LZ5_decompress_fast@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZ5_uncompress>:
jmp    1030 <LZ5_decompress_fast@plt>

LLVM IR (-O0):
define i32 @LZ5_uncompress(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @LZ5_decompress_fast(i8* %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @LZ5_uncompress(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @LZ5_decompress_fast(i8* %0, i8* %1, i32 %2)
ret i32 %4
}
int COPY_REG(int src_reg) { return src_reg; }


x86 assembly (clang, -O0):
<COPY_REG>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<COPY_REG>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @COPY_REG(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @COPY_REG(i32 returned %0) {
ret i32 %0
}