xunge/DecIR huggingface dataset:
int do_302() { return 302; }


x86 assembly (clang, -O0):
<do_302>:
push   %rbp
mov    %rsp,%rbp
mov    $0x12e,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_302>:
mov    $0x12e,%eax
ret

LLVM IR (-O0):
define i32 @do_302() {
ret i32 302
}

LLVM IR (-O2):
define i32 @do_302() {
ret i32 302
}
void elf_emit_main_init() {}


x86 assembly (clang, -O0):
<elf_emit_main_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<elf_emit_main_init>:
ret

LLVM IR (-O0):
define void @elf_emit_main_init() {
ret void
}

LLVM IR (-O2):
define void @elf_emit_main_init() {
ret void
}
/* Variables and functions */
int main() {
  int a, b, c, x;
  int *pi;
  int *ok;
  a = 5;
  ok = &a;
  pi = &a;
  b = *pi;
  pi = NULL;
  x = *ok;
  c = *pi;
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x28(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32*
store i32 0, i32* %1
store i32 5, i32* %2
store i32* %2, i32** %7
store i32* %2, i32** %6
%8 = load i32*, i32** %6
%9 = load i32, i32* %8
store i32 %9, i32* %3
store i32* null, i32** %6
%10 = load i32*, i32** %7
%11 = load i32, i32* %10
store i32 %11, i32* %5
%12 = load i32*, i32** %6
%13 = load i32, i32* %12
store i32 %13, i32* %4
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ F_SETLKW;
int /*<<< orphan*/ F_WRLCK;
int fd_fcntl(int, int /*<<< orphan*/, int /*<<< orphan*/, char *);
int fd_lock(int fd, char *filepath) {
  return fd_fcntl(fd, F_SETLKW, F_WRLCK, filepath);
}


x86 assembly (clang, -O0):
<fd_lock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebf(%rip),%rax
mov    (%rax),%esi
mov    0x2ea6(%rip),%rax
mov    (%rax),%edx
mov    -0x10(%rbp),%rcx
call   1030 <fd_fcntl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fd_lock>:
mov    %rsi,%rcx
mov    0x2ece(%rip),%rax
mov    (%rax),%esi
mov    0x2eb5(%rip),%rax
mov    (%rax),%edx
jmp    1030 <fd_fcntl@plt>

LLVM IR (-O0):
@F_SETLKW = global i32 0
@F_WRLCK = global i32 0
define i32 @fd_lock(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i32, i32* @F_SETLKW
%7 = load i32, i32* @F_WRLCK
%8 = load i8*, i8** %4
%9 = call i32 @fd_fcntl(i32 %5, i32 %6, i32 %7, i8* %8)
ret i32 %9
}

LLVM IR (-O2):
@F_SETLKW = global i32 0
@F_WRLCK = global i32 0
define i32 @fd_lock(i32 %0, i8* %1) {
%3 = load i32, i32* @F_SETLKW
%4 = load i32, i32* @F_WRLCK
%5 = tail call i32 @fd_fcntl(i32 %0, i32 %3, i32 %4, i8* %1)
ret i32 %5
}
/* Type definitions */
struct RNAplex_args_info {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ RNAplex_cmdline_parser_release(struct RNAplex_args_info *);
void RNAplex_cmdline_parser_free(struct RNAplex_args_info *args_info) {
  RNAplex_cmdline_parser_release(args_info);
}


x86 assembly (clang, -O0):
<RNAplex_cmdline_parser_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <RNAplex_cmdline_parser_release@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNAplex_cmdline_parser_free>:
jmp    1030 <RNAplex_cmdline_parser_release@plt>

LLVM IR (-O0):
%struct.RNAplex_args_info = type { i32 }
define void @RNAplex_cmdline_parser_free(%struct.RNAplex_args_info* %0) {
%2 = alloca %struct.RNAplex_args_info*
store %struct.RNAplex_args_info* %0, %struct.RNAplex_args_info** %2
%3 = load %struct.RNAplex_args_info*, %struct.RNAplex_args_info** %2
%4 = call i32 @RNAplex_cmdline_parser_release(%struct.RNAplex_args_info* %3)
ret void
}

LLVM IR (-O2):
%struct.RNAplex_args_info = type { i32 }
define void @RNAplex_cmdline_parser_free(%struct.RNAplex_args_info* %0) {
%2 = tail call i32 @RNAplex_cmdline_parser_release(%struct.RNAplex_args_info* %0)
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int UINT16_MAX;
uint32_t mp_sizeof_map(uint32_t size) {
  if (size <= 15) {
    return 1;
  } else if (size <= UINT16_MAX) {
    return 1 + sizeof(uint16_t);
  } else {
    return 1 + sizeof(uint32_t);
  }
}


x86 assembly (clang, -O0):
<mp_sizeof_map>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0xf,-0x8(%rbp)
jg     111d <mp_sizeof_map+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    1142 <mp_sizeof_map+0x42>
mov    -0x8(%rbp),%eax
mov    0x2eb9(%rip),%rcx
cmp    (%rcx),%eax
jg     113b <mp_sizeof_map+0x3b>
movl   $0x5,-0x4(%rbp)
jmp    1142 <mp_sizeof_map+0x42>
movl   $0x5,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp_sizeof_map>:
xor    %eax,%eax
cmp    $0x10,%edi
setge  %al
lea    0x1(,%rax,4),%eax
ret

LLVM IR (-O0):
@UINT16_MAX = global i32 0
define i32 @mp_sizeof_map(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 15
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %13
7: ; preds = %1
%8 = load i32, i32* %3
%9 = load i32, i32* @UINT16_MAX
%10 = icmp sle i32 %8, %9
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 5, i32* %2
br label %13
12: ; preds = %7
store i32 5, i32* %2
br label %13
13: ; preds = %12, %11, %6
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
@UINT16_MAX = global i32 0
define i32 @mp_sizeof_map(i32 %0) {
%2 = icmp slt i32 %0, 16
%3 = select i1 %2, i32 1, i32 5
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int write_data(int /*<<< orphan*/ *, int, unsigned char *, int);
int write_partition_physical_disk_drive_id_fat32(FILE *fp) {
  unsigned char ucId = 0x80;
  return write_data(fp, 0x40, &ucId, 1);
}


x86 assembly (clang, -O0):
<write_partition_physical_disk_drive_id_fat32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movb   $0x80,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x40,%esi
lea    -0x9(%rbp),%rdx
mov    $0x1,%ecx
call   1030 <write_data@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_partition_physical_disk_drive_id_fat32>:
push   %rax
movb   $0x80,0x7(%rsp)
lea    0x7(%rsp),%rdx
mov    $0x40,%esi
mov    $0x1,%ecx
call   1030 <write_data@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @write_partition_physical_disk_drive_id_fat32(i32* %0) {
%2 = alloca i32*
%3 = alloca i8
store i32* %0, i32** %2
store i8 -128, i8* %3
%4 = load i32*, i32** %2
%5 = call i32 @write_data(i32* %4, i32 64, i8* %3, i32 1)
ret i32 %5
}

LLVM IR (-O2):
define i32 @write_partition_physical_disk_drive_id_fat32(i32* %0) {
%2 = alloca i8
store i8 -128, i8* %2
%3 = call i32 @write_data(i32* %0, i32 64, i8* %2, i32 1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Fwd(unsigned char);
int /*<<< orphan*/ OnEx(unsigned char, unsigned char);
int /*<<< orphan*/ SetSpeed(unsigned char, char);
void OnFwdRegEx(unsigned char Outputs, char Speed, unsigned char RegMode,
                unsigned char reset) {
  Fwd(Outputs);
  SetSpeed(Outputs, Speed);
  OnEx(Outputs, reset);
}


x86 assembly (clang, -O0):
<OnFwdRegEx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %cl,%al
mov    %dl,%cl
mov    %sil,%dl
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %dl,-0x2(%rbp)
mov    %cl,-0x3(%rbp)
mov    %al,-0x4(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <Fwd@plt>
mov    -0x1(%rbp),%al
movzbl %al,%edi
movsbl -0x2(%rbp),%esi
call   1050 <SetSpeed@plt>
mov    -0x1(%rbp),%al
movzbl %al,%edi
movzbl -0x4(%rbp),%esi
call   1040 <OnEx@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OnFwdRegEx>:
push   %rbp
push   %r14
push   %rbx
mov    %ecx,%r14d
mov    %esi,%ebp
mov    %edi,%ebx
call   1030 <Fwd@plt>
mov    %ebx,%edi
mov    %ebp,%esi
call   1050 <SetSpeed@plt>
mov    %ebx,%edi
mov    %r14d,%esi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <OnEx@plt>

LLVM IR (-O0):
define void @OnFwdRegEx(i8 zeroext %0, i8 signext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8 %0, i8* %5
store i8 %1, i8* %6
store i8 %2, i8* %7
store i8 %3, i8* %8
%9 = load i8, i8* %5
%10 = call i32 @Fwd(i8 zeroext %9)
%11 = load i8, i8* %5
%12 = load i8, i8* %6
%13 = call i32 @SetSpeed(i8 zeroext %11, i8 signext %12)
%14 = load i8, i8* %5
%15 = load i8, i8* %8
%16 = call i32 @OnEx(i8 zeroext %14, i8 zeroext %15)
ret void
}

LLVM IR (-O2):
define void @OnFwdRegEx(i8 zeroext %0, i8 signext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = tail call i32 @Fwd(i8 zeroext %0)
%6 = tail call i32 @SetSpeed(i8 zeroext %0, i8 signext %1)
%7 = tail call i32 @OnEx(i8 zeroext %0, i8 zeroext %3)
ret void
}
/* Type definitions */
struct cri_mutex {
  int dummy;
};

/* Variables and functions */
int ENOTSUP;
int cri_mutex_init_once(struct cri_mutex *mutex) { return -ENOTSUP; }


x86 assembly (clang, -O0):
<cri_mutex_init_once>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    0x2ed7(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cri_mutex_init_once>:
mov    0x2ee1(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
%struct.cri_mutex = type { i32 }
@ENOTSUP = global i32 0
define i32 @cri_mutex_init_once(%struct.cri_mutex* %0) {
%2 = alloca %struct.cri_mutex*
store %struct.cri_mutex* %0, %struct.cri_mutex** %2
%3 = load i32, i32* @ENOTSUP
%4 = sub nsw i32 0, %3
ret i32 %4
}

LLVM IR (-O2):
%struct.cri_mutex = type { i32 }
@ENOTSUP = global i32 0
define i32 @cri_mutex_init_once(%struct.cri_mutex* nocapture readnone %0) {
%2 = load i32, i32* @ENOTSUP
%3 = sub nsw i32 0, %2
ret i32 %3
}
int division(int k) { return k % 113; }


x86 assembly (clang, -O0):
<division>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x71,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<division>:
movslq %edi,%rax
imul   $0x487ede05,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x25,%rcx
add    %edx,%ecx
imul   $0x71,%ecx,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @division(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 113
ret i32 %4
}

LLVM IR (-O2):
define i32 @division(i32 %0) {
%2 = srem i32 %0, 113
ret i32 %2
}
void smbus_delay(void) {}


x86 assembly (clang, -O0):
<smbus_delay>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smbus_delay>:
ret

LLVM IR (-O0):
define void @smbus_delay() {
ret void
}

LLVM IR (-O2):
define void @smbus_delay() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ p16e_adc();
int /*<<< orphan*/ p16e_eeprom();
int /*<<< orphan*/ p16e_int_pin();
int /*<<< orphan*/ p16e_int_ports();
int /*<<< orphan*/ p16e_mssp();
int /*<<< orphan*/ p16e_tmr0();
int /*<<< orphan*/ p16e_tmr1();
int /*<<< orphan*/ p16e_tmr2();
int /*<<< orphan*/ p16e_wdt_2();
int /*<<< orphan*/ serial(int /*<<< orphan*/);
void PIC16F1788_periferic(void) {
  p16e_mssp();
  p16e_adc();
  p16e_int_pin();
  p16e_int_ports();
  p16e_tmr0();
  p16e_wdt_2();
  p16e_eeprom();
  p16e_tmr1();
  p16e_tmr2();
  serial(0);
}


x86 assembly (clang, -O0):
<PIC16F1788_periferic>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <p16e_mssp@plt>
mov    $0x0,%al
call   1060 <p16e_adc@plt>
mov    $0x0,%al
call   10a0 <p16e_int_pin@plt>
mov    $0x0,%al
call   1090 <p16e_int_ports@plt>
mov    $0x0,%al
call   1080 <p16e_tmr0@plt>
mov    $0x0,%al
call   1050 <p16e_wdt_2@plt>
mov    $0x0,%al
call   10c0 <p16e_eeprom@plt>
mov    $0x0,%al
call   10b0 <p16e_tmr1@plt>
mov    $0x0,%al
call   1070 <p16e_tmr2@plt>
xor    %edi,%edi
call   1040 <serial@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PIC16F1788_periferic>:
push   %rax
xor    %eax,%eax
call   1030 <p16e_mssp@plt>
xor    %eax,%eax
call   1060 <p16e_adc@plt>
xor    %eax,%eax
call   10a0 <p16e_int_pin@plt>
xor    %eax,%eax
call   1090 <p16e_int_ports@plt>
xor    %eax,%eax
call   1080 <p16e_tmr0@plt>
xor    %eax,%eax
call   1050 <p16e_wdt_2@plt>
xor    %eax,%eax
call   10c0 <p16e_eeprom@plt>
xor    %eax,%eax
call   10b0 <p16e_tmr1@plt>
xor    %eax,%eax
call   1070 <p16e_tmr2@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <serial@plt>

LLVM IR (-O0):
define void @PIC16F1788_periferic() {
%1 = call i32 (...) @p16e_mssp()
%2 = call i32 (...) @p16e_adc()
%3 = call i32 (...) @p16e_int_pin()
%4 = call i32 (...) @p16e_int_ports()
%5 = call i32 (...) @p16e_tmr0()
%6 = call i32 (...) @p16e_wdt_2()
%7 = call i32 (...) @p16e_eeprom()
%8 = call i32 (...) @p16e_tmr1()
%9 = call i32 (...) @p16e_tmr2()
%10 = call i32 @serial(i32 0)
ret void
}

LLVM IR (-O2):
define void @PIC16F1788_periferic() {
%1 = tail call i32 (...) @p16e_mssp()
%2 = tail call i32 (...) @p16e_adc()
%3 = tail call i32 (...) @p16e_int_pin()
%4 = tail call i32 (...) @p16e_int_ports()
%5 = tail call i32 (...) @p16e_tmr0()
%6 = tail call i32 (...) @p16e_wdt_2()
%7 = tail call i32 (...) @p16e_eeprom()
%8 = tail call i32 (...) @p16e_tmr1()
%9 = tail call i32 (...) @p16e_tmr2()
%10 = tail call i32 @serial(i32 0)
ret void
}
int rev(int n) {
  int t = n, r = 0;
  while (t != 0) {
    r *= 10;
    r += t % 10;
    t /= 10;
  }
  return r;
}


x86 assembly (clang, -O0):
<rev>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1149 <rev+0x49>
imul   $0xa,-0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
add    -0xc(%rbp),%edx
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
jmp    1114 <rev+0x14>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rev>:
xor    %eax,%eax
test   %edi,%edi
je     113f <rev+0x3f>
cs nopw 0x0(%rax,%rax,1)
lea    (%rax,%rax,4),%eax
movslq %edi,%rcx
imul   $0x66666667,%rcx,%rdi
mov    %rdi,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rdi
add    %edx,%edi
lea    (%rdi,%rdi,1),%edx
lea    (%rdx,%rdx,4),%edx
mov    %ecx,%esi
sub    %edx,%esi
lea    (%rsi,%rax,2),%eax
add    $0x9,%ecx
cmp    $0x12,%ecx
ja     1110 <rev+0x10>
ret

LLVM IR (-O0):
define i32 @rev(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
store i32 %5, i32* %3
store i32 0, i32* %4
br label %6
6: ; preds = %9, %1
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %18
9: ; preds = %6
%10 = load i32, i32* %4
%11 = mul nsw i32 %10, 10
store i32 %11, i32* %4
%12 = load i32, i32* %3
%13 = srem i32 %12, 10
%14 = load i32, i32* %4
%15 = add nsw i32 %14, %13
store i32 %15, i32* %4
%16 = load i32, i32* %3
%17 = sdiv i32 %16, 10
store i32 %17, i32* %3
br label %6
18: ; preds = %6
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
define i32 @rev(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %12, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ 0, %1 ]
%5 = phi i32 [ %9, %3 ], [ %0, %1 ]
%6 = mul nsw i32 %4, 10
%7 = srem i32 %5, 10
%8 = add nsw i32 %6, %7
%9 = sdiv i32 %5, 10
%10 = add i32 %5, 9
%11 = icmp ult i32 %10, 19
br i1 %11, label %12, label %3
12: ; preds = %3, %1
%13 = phi i32 [ 0, %1 ], [ %8, %3 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
void nine() {
  float f = 12.5;
  float *p = &f;
  printf("The value of p is: %f\n", *p);
}


x86 assembly (clang, -O0):
<nine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  0xee0(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nine>:
lea    0xeed(%rip),%rdi
movss  0xee1(%rip),%xmm0
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"The value of p is: %f\0A\00"
define void @nine() {
%1 = alloca float
%2 = alloca float*
store float 1.250000e+01, float* %1
store float* %1, float** %2
%3 = load float*, float** %2
%4 = load float, float* %3
%5 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), float %4)
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c"The value of p is: %f\0A\00"
define void @nine() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), float 1.250000e+01)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ AbsoluteIndexedYX1(int);
int /*<<< orphan*/ STA8(int /*<<< orphan*/);
void Op99M1X1(void) { STA8(AbsoluteIndexedYX1(2)); }


x86 assembly (clang, -O0):
<Op99M1X1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <AbsoluteIndexedYX1@plt>
mov    %eax,%edi
call   1040 <STA8@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Op99M1X1>:
push   %rax
mov    $0x2,%edi
call   1030 <AbsoluteIndexedYX1@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <STA8@plt>

LLVM IR (-O0):
define void @Op99M1X1() {
%1 = call i32 @AbsoluteIndexedYX1(i32 2)
%2 = call i32 @STA8(i32 %1)
ret void
}

LLVM IR (-O2):
define void @Op99M1X1() {
%1 = tail call i32 @AbsoluteIndexedYX1(i32 2)
%2 = tail call i32 @STA8(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int isempty(char *s) {
  if (s[0] == '\0') {
    puts("Error: Expected non-empty expression");
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<isempty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1144 <isempty+0x34>
lea    0xecd(%rip),%rdi
call   1030 <puts@plt>
movl   $0x1,-0x4(%rbp)
jmp    114b <isempty+0x3b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isempty>:
push   %rax
xor    %eax,%eax
cmpb   $0x0,(%rdi)
je     111a <isempty+0xa>
pop    %rcx
ret
lea    0xedf(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [37 x i8] c"Error: Expected non-empty expression\00"
define i32 @isempty(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = call i32 @puts(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
store i32 1, i32* %2
br label %12
11: ; preds = %1
store i32 0, i32* %2
br label %12
12: ; preds = %11, %9
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@.str = [37 x i8] c"Error: Expected non-empty expression\00"
define i32 @isempty(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 1, %4 ], [ 0, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void *malloc(size_t);
void *Malloc(size_t bytes) {
  void *retval = malloc(bytes);
  if (retval == 0)
    exit(2);
  return retval;
}


x86 assembly (clang, -O0):
<Malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114e <Malloc+0x2e>
mov    $0x2,%edi
call   1040 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Malloc>:
push   %rax
call   1030 <malloc@plt>
test   %rax,%rax
je     112d <Malloc+0xd>
pop    %rcx
ret
mov    $0x2,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i8* @Malloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @exit(i32 2)
unreachable
10: ; preds = %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
define noalias i8* @Malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @exit(i32 2)
unreachable
6: ; preds = %1
ret i8* %2
}
char *StrArrAt(char **strArr, int n) { return strArr[n]; }


x86 assembly (clang, -O0):
<StrArrAt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<StrArrAt>:
movslq %esi,%rax
mov    (%rdi,%rax,8),%rax
ret

LLVM IR (-O0):
define i8* @StrArrAt(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
%5 = load i8**, i8*** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8*, i8** %5, i64 %7
%9 = load i8*, i8** %8
ret i8* %9
}

LLVM IR (-O2):
define i8* @StrArrAt(i8** nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i8*, i8** %0, i64 %3
%5 = load i8*, i8** %4
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ printNibble(unsigned char);
void printByte(unsigned char c) {
  printNibble((c & 0xf0) >> 4);
  printNibble(c & 0x0f);
}


x86 assembly (clang, -O0):
<printByte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
and    $0xf0,%eax
sar    $0x4,%eax
movzbl %al,%edi
call   1030 <printNibble@plt>
movzbl -0x1(%rbp),%eax
and    $0xf,%eax
movzbl %al,%edi
call   1030 <printNibble@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printByte>:
push   %rbx
mov    %edi,%ebx
mov    %ebx,%eax
shr    $0x4,%al
movzbl %al,%edi
call   1030 <printNibble@plt>
and    $0xf,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <printNibble@plt>

LLVM IR (-O0):
define void @printByte(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 240
%6 = ashr i32 %5, 4
%7 = trunc i32 %6 to i8
%8 = call i32 @printNibble(i8 zeroext %7)
%9 = load i8, i8* %2
%10 = zext i8 %9 to i32
%11 = and i32 %10, 15
%12 = trunc i32 %11 to i8
%13 = call i32 @printNibble(i8 zeroext %12)
ret void
}

LLVM IR (-O2):
define void @printByte(i8 zeroext %0) {
%2 = lshr i8 %0, 4
%3 = tail call i32 @printNibble(i8 zeroext %2)
%4 = and i8 %0, 15
%5 = tail call i32 @printNibble(i8 zeroext %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ h2o__fatal(char *, int, char *);
void *malloc(size_t);
void *h2o_mem_alloc(size_t sz) {
  void *p = malloc(sz);
  if (p == NULL)
    h2o__fatal("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/deweerdt/h2o/refs/heads/"
               "master/lib/common/h2o/memory.h",
               373, "no memory");
  return p;
}


x86 assembly (clang, -O0):
<h2o_mem_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    115c <h2o_mem_alloc+0x3c>
lea    0xeb5(%rip),%rdi
mov    $0x175,%esi
lea    0xf3a(%rip),%rdx
call   1030 <h2o__fatal@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h2o_mem_alloc>:
push   %rbx
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1146 <h2o_mem_alloc+0x26>
lea    0xecb(%rip),%rdi
lea    0xf55(%rip),%rdx
mov    $0x175,%esi
call   1030 <h2o__fatal@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [145 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/deweerdt/h2o/refs/heads/master/lib/common/h2o/memory.h\00"
@.str.1 = [10 x i8] c"no memory\00"
define i8* @h2o_mem_alloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @h2o__fatal(i8* getelementptr inbounds ([145 x i8], [145 x i8]* @.str, i64 0, i64 0), i32 373, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [145 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/deweerdt/h2o/refs/heads/master/lib/common/h2o/memory.h\00"
@.str.1 = [10 x i8] c"no memory\00"
define noalias i8* @h2o_mem_alloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @h2o__fatal(i8* getelementptr inbounds ([145 x i8], [145 x i8]* @.str, i64 0, i64 0), i32 373, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
void RTDbgAsSymbolByNameA(void) {}


x86 assembly (clang, -O0):
<RTDbgAsSymbolByNameA>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTDbgAsSymbolByNameA>:
ret

LLVM IR (-O0):
define void @RTDbgAsSymbolByNameA() {
ret void
}

LLVM IR (-O2):
define void @RTDbgAsSymbolByNameA() {
ret void
}
/* Variables and functions */
int str_int(char *, int *);
int /*<<< orphan*/ sys_die(char *, char *);
int parse_port(char *p) {
  int port = 0, e = -1;
  port = str_int(p, &e);
  if (e || port < 1 || port > 65535)
    sys_die("invalid port '%s'\n", p);
  return port;
}


x86 assembly (clang, -O0):
<parse_port>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0xffffffff,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1040 <str_int@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    116b <parse_port+0x4b>
cmpl   $0x1,-0xc(%rbp)
jl     116b <parse_port+0x4b>
cmpl   $0xffff,-0xc(%rbp)
jle    117b <parse_port+0x5b>
mov    -0x8(%rbp),%rsi
lea    0xe8a(%rip),%rdi
call   1030 <sys_die@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_port>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
movl   $0xffffffff,0x4(%rsp)
ff
lea    0x4(%rsp),%rsi
call   1040 <str_int@plt>
mov    %eax,%ebp
cmpl   $0x0,0x4(%rsp)
jne    114d <parse_port+0x2d>
test   %ebp,%ebp
jle    114d <parse_port+0x2d>
cmp    $0x10000,%ebp
jl     115c <parse_port+0x3c>
lea    0xeac(%rip),%rdi
mov    %rbx,%rsi
call   1030 <sys_die@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [19 x i8] c"invalid port '%s'\0A\00"
define i32 @parse_port(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
store i32 -1, i32* %4
%5 = load i8*, i8** %2
%6 = call i32 @str_int(i8* %5, i32* %4)
store i32 %6, i32* %3
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %15, label %9
9: ; preds = %1
%10 = load i32, i32* %3
%11 = icmp slt i32 %10, 1
br i1 %11, label %15, label %12
12: ; preds = %9
%13 = load i32, i32* %3
%14 = icmp sgt i32 %13, 65535
br i1 %14, label %15, label %18
15: ; preds = %12, %9, %1
%16 = load i8*, i8** %2
%17 = call i32 @sys_die(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %16)
br label %18
18: ; preds = %15, %12
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
@.str = [19 x i8] c"invalid port '%s'\0A\00"
define i32 @parse_port(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 -1, i32* %2
%4 = call i32 @str_int(i8* %0, i32* %2)
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
%7 = icmp slt i32 %4, 1
%8 = select i1 %6, i1 true, i1 %7
%9 = icmp sgt i32 %4, 65535
%10 = select i1 %8, i1 true, i1 %9
br i1 %10, label %11, label %13
11: ; preds = %1
%12 = call i32 @sys_die(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %13
13: ; preds = %1, %11
ret i32 %4
}
int nn_xsub_ispeer(int socktype) { return socktype == (2 * 16 + 0) ? 1 : 0; }


x86 assembly (clang, -O0):
<nn_xsub_ispeer>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x20,%edx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nn_xsub_ispeer>:
xor    %eax,%eax
cmp    $0x20,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @nn_xsub_ispeer(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 32
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 1, i32 0
ret i32 %6
}

LLVM IR (-O2):
define i32 @nn_xsub_ispeer(i32 %0) {
%2 = icmp eq i32 %0, 32
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ power_of_two(int);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int main(void) {
  int num = 0;
  printf("Enter the number\n");
  scanf("%d", &num);
  power_of_two(num);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
lea    0xeb9(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1040 <power_of_two@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0xec3(%rip),%rdi
call   1030 <puts@plt>
lea    0xeb4(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
call   1040 <power_of_two@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"Enter the number\0A\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = call i32 @power_of_two(i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"%d\00"
@str = [17 x i8] c"Enter the number\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @power_of_two(i32 %5)
ret i32 0
}
/* Type definitions */
struct device {
  int dummy;
};
struct adbDevice {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ writeDevice(int /*<<< orphan*/ *, struct device *);
void adbWriteDevice(FILE *file, struct adbDevice *dev) {
  writeDevice(file, (struct device *)dev);
}


x86 assembly (clang, -O0):
<adbWriteDevice>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <writeDevice@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<adbWriteDevice>:
jmp    1030 <writeDevice@plt>

LLVM IR (-O0):
%struct.adbDevice = type { i32 }
%struct.device = type { i32 }
define void @adbWriteDevice(i32* %0, %struct.adbDevice* %1) {
%3 = alloca i32*
%4 = alloca %struct.adbDevice*
store i32* %0, i32** %3
store %struct.adbDevice* %1, %struct.adbDevice** %4
%5 = load i32*, i32** %3
%6 = load %struct.adbDevice*, %struct.adbDevice** %4
%7 = bitcast %struct.adbDevice* %6 to %struct.device*
%8 = call i32 @writeDevice(i32* %5, %struct.device* %7)
ret void
}

LLVM IR (-O2):
%struct.adbDevice = type { i32 }
%struct.device = type { i32 }
define void @adbWriteDevice(i32* %0, %struct.adbDevice* %1) {
%3 = bitcast %struct.adbDevice* %1 to %struct.device*
%4 = tail call i32 @writeDevice(i32* %0, %struct.device* %3)
ret void
}
void glGetQueryiv(void) { return; }


x86 assembly (clang, -O0):
<glGetQueryiv>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glGetQueryiv>:
ret

LLVM IR (-O0):
define void @glGetQueryiv() {
ret void
}

LLVM IR (-O2):
define void @glGetQueryiv() {
ret void
}
/* Type definitions */
struct nlattr {
  int dummy;
};
typedef int /*<<< orphan*/ __be32;

/* Variables and functions */
scalar_t__ nla_data(struct nlattr const *);
__be32 nla_get_be32(const struct nlattr *nla) {
  return *(__be32 *)nla_data(nla);
}


x86 assembly (clang, -O0):
<nla_get_be32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <nla_data@plt>
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nla_get_be32>:
push   %rax
call   1030 <nla_data@plt>
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.nlattr = type { i32 }
define i32 @nla_get_be32(%struct.nlattr* %0) {
%2 = alloca %struct.nlattr*
store %struct.nlattr* %0, %struct.nlattr** %2
%3 = load %struct.nlattr*, %struct.nlattr** %2
%4 = call i64 @nla_data(%struct.nlattr* %3)
%5 = inttoptr i64 %4 to i32*
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
%struct.nlattr = type { i32 }
define i32 @nla_get_be32(%struct.nlattr* %0) {
%2 = tail call i64 @nla_data(%struct.nlattr* %0)
%3 = inttoptr i64 %2 to i32*
%4 = load i32, i32* %3
ret i32 %4
}
void asciilower(char *str) {
  while (*str != 0) {
    if (*str >= 'A' && *str <= 'Z')
      *str = *str - 'A' + 'a';
    str++;
  }
}


x86 assembly (clang, -O0):
<asciilower>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     115e <asciilower+0x5e>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x41,%eax
jl     114d <asciilower+0x4d>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x5a,%eax
jg     114d <asciilower+0x4d>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
sub    $0x41,%eax
add    $0x61,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <asciilower+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<asciilower>:
mov    (%rdi),%al
test   %al,%al
je     112a <asciilower+0x2a>
add    $0x1,%rdi
jmp    111b <asciilower+0x1b>
nopl   0x0(%rax)
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
je     112a <asciilower+0x2a>
lea    -0x41(%rax),%ecx
cmp    $0x19,%cl
ja     1110 <asciilower+0x10>
add    $0x20,%al
mov    %al,-0x1(%rdi)
jmp    1110 <asciilower+0x10>
ret

LLVM IR (-O0):
define void @asciilower(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %26, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %29
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp sge i32 %11, 65
br i1 %12, label %13, label %26
13: ; preds = %8
%14 = load i8*, i8** %2
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp sle i32 %16, 90
br i1 %17, label %18, label %26
18: ; preds = %13
%19 = load i8*, i8** %2
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = sub nsw i32 %21, 65
%23 = add nsw i32 %22, 97
%24 = trunc i32 %23 to i8
%25 = load i8*, i8** %2
store i8 %24, i8* %25
br label %26
26: ; preds = %18, %13, %8
%27 = load i8*, i8** %2
%28 = getelementptr inbounds i8, i8* %27, i32 1
store i8* %28, i8** %2
br label %3
29: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @asciilower(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %11
%5 = phi i8 [ %13, %11 ], [ %2, %1 ]
%6 = phi i8* [ %12, %11 ], [ %0, %1 ]
%7 = add i8 %5, -65
%8 = icmp ult i8 %7, 26
br i1 %8, label %9, label %11
9: ; preds = %4
%10 = add nuw nsw i8 %5, 32
store i8 %10, i8* %6
br label %11
11: ; preds = %9, %4
%12 = getelementptr inbounds i8, i8* %6, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %11, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ puts(char *);
void flag_error(char msg[]) {
  puts(msg);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<flag_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <puts@plt>
mov    0x2ea4(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<flag_error>:
push   %rax
call   1030 <puts@plt>
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
define void @flag_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @puts(i8* %3)
%5 = load i32, i32* @EXIT_FAILURE
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
define void @flag_error(i8* nocapture %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) %0)
%3 = load i32, i32* @EXIT_FAILURE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
/* Variables and functions */
scalar_t__ strncpy(char *, char const *, size_t);
int strncpy_s(char *str, size_t size, const char *src, size_t len) {
  return strncpy(str, src, ((size) < (len) ? (size) : (len))) ? 0 : -1;
}


x86 assembly (clang, -O0):
<strncpy_s>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x20(%rbp),%rax
jae    1153 <strncpy_s+0x43>
mov    -0x10(%rbp),%rax
mov    %rax,-0x38(%rbp)
jmp    115b <strncpy_s+0x4b>
mov    -0x20(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x28(%rbp),%rsi
mov    -0x30(%rbp),%rdi
mov    -0x38(%rbp),%rdx
call   1030 <strncpy@plt>
mov    %rax,%rdx
mov    $0xffffffff,%eax
xor    %ecx,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncpy_s>:
push   %rax
cmp    %rcx,%rsi
cmovb  %rsi,%rcx
mov    %rdx,%rsi
mov    %rcx,%rdx
call   1030 <strncpy@plt>
cmp    $0x1,%rax
sbb    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @strncpy_s(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %7
%11 = load i64, i64* %6
%12 = load i64, i64* %8
%13 = icmp ult i64 %11, %12
br i1 %13, label %14, label %16
14: ; preds = %4
%15 = load i64, i64* %6
br label %18
16: ; preds = %4
%17 = load i64, i64* %8
br label %18
18: ; preds = %16, %14
%19 = phi i64 [ %15, %14 ], [ %17, %16 ]
%20 = call i64 @strncpy(i8* %9, i8* %10, i64 %19)
%21 = icmp ne i64 %20, 0
%22 = zext i1 %21 to i64
%23 = select i1 %21, i32 0, i32 -1
ret i32 %23
}

LLVM IR (-O2):
define i32 @strncpy_s(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = icmp ult i64 %1, %3
%6 = select i1 %5, i64 %1, i64 %3
%7 = tail call i64 @strncpy(i8* %0, i8* %2, i64 %6)
%8 = icmp eq i64 %7, 0
%9 = sext i1 %8 to i32
ret i32 %9
}
int cmp(void *a, void *b) {
  int *c = (int *)a, *d = (int *)b;
  if (*c < *d)
    return 1;
  else if (*c > *d)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%eax
mov    -0x28(%rbp),%rcx
cmp    (%rcx),%eax
jge    113a <cmp+0x3a>
movl   $0x1,-0x4(%rbp)
jmp    1164 <cmp+0x64>
mov    -0x20(%rbp),%rax
mov    (%rax),%eax
mov    -0x28(%rbp),%rcx
cmp    (%rcx),%eax
jle    1158 <cmp+0x58>
movl   $0xffffffff,-0x4(%rbp)
jmp    1164 <cmp+0x64>
jmp    115d <cmp+0x5d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
xor    %edx,%edx
cmp    %ecx,%eax
setg   %dl
neg    %edx
cmp    %ecx,%eax
mov    $0x1,%eax
cmovge %edx,%eax
ret

LLVM IR (-O0):
define i32 @cmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
store i32* %9, i32** %6
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to i32*
store i32* %11, i32** %7
%12 = load i32*, i32** %6
%13 = load i32, i32* %12
%14 = load i32*, i32** %7
%15 = load i32, i32* %14
%16 = icmp slt i32 %13, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 1, i32* %3
br label %27
18: ; preds = %2
%19 = load i32*, i32** %6
%20 = load i32, i32* %19
%21 = load i32*, i32** %7
%22 = load i32, i32* %21
%23 = icmp sgt i32 %20, %22
br i1 %23, label %24, label %25
24: ; preds = %18
store i32 -1, i32* %3
br label %27
25: ; preds = %18
br label %26
26: ; preds = %25
store i32 0, i32* %3
br label %27
27: ; preds = %26, %24, %17
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
%8 = icmp sgt i32 %5, %6
%9 = sext i1 %8 to i32
%10 = select i1 %7, i32 1, i32 %9
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ clear_io_bit(int, int);
void TOSH_MAKE_RADIO_SFD_INPUT() { clear_io_bit(-3, 4); }


x86 assembly (clang, -O0):
<TOSH_MAKE_RADIO_SFD_INPUT>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffffffd,%edi
mov    $0x4,%esi
call   1030 <clear_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_MAKE_RADIO_SFD_INPUT>:
mov    $0xfffffffd,%edi
mov    $0x4,%esi
jmp    1030 <clear_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_MAKE_RADIO_SFD_INPUT() {
%1 = call i32 @clear_io_bit(i32 -3, i32 4)
ret void
}

LLVM IR (-O2):
define void @TOSH_MAKE_RADIO_SFD_INPUT() {
%1 = tail call i32 @clear_io_bit(i32 -3, i32 4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ GLuint;
typedef int /*<<< orphan*/ GLenum;

/* Variables and functions */
void glBindTexture(GLenum target, GLuint id) {}


x86 assembly (clang, -O0):
<glBindTexture>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glBindTexture>:
ret

LLVM IR (-O0):
define void @glBindTexture(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @glBindTexture(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
double floor(double);
double myround(double x) { return floor(x + 0.5); }


x86 assembly (clang, -O0):
<myround>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xedb(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
call   1030 <floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<myround>:
addsd  0xee8(%rip),%xmm0
jmp    1030 <floor@plt>

LLVM IR (-O0):
define double @myround(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double %3, 5.000000e-01
%5 = call double @llvm.floor.f64(double %4)
ret double %5
}

LLVM IR (-O2):
define double @myround(double %0) {
%2 = fadd double %0, 5.000000e-01
%3 = tail call double @llvm.floor.f64(double %2)
ret double %3
}
/* Variables and functions */
int syscall(int, char const *, unsigned int);
int glib_linux_memfd_create(const char *name, unsigned int flags) {
  return syscall(319, name, flags);
}


x86 assembly (clang, -O0):
<glib_linux_memfd_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    $0x13f,%edi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glib_linux_memfd_create>:
mov    %esi,%edx
mov    %rdi,%rsi
mov    $0x13f,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @glib_linux_memfd_create(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @syscall(i32 319, i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @glib_linux_memfd_create(i8* %0, i32 %1) {
%3 = tail call i32 @syscall(i32 319, i8* %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void delete_array(void *array) {
  free(array);
  return;
}


x86 assembly (clang, -O0):
<delete_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delete_array>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @delete_array(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @delete_array(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
void test_non_identifiers() {
  int i, x;
#pragma omp target simd;
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target simd private(x);
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target simd, private(x);
  for (i = 0; i < 16; ++i)
    ;
}


x86 assembly (clang, -O0):
<test_non_identifiers>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1128 <test_non_identifiers+0x28>
jmp    111a <test_non_identifiers+0x1a>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <test_non_identifiers+0xb>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    114c <test_non_identifiers+0x4c>
jmp    113e <test_non_identifiers+0x3e>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    112f <test_non_identifiers+0x2f>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1170 <test_non_identifiers+0x70>
jmp    1162 <test_non_identifiers+0x62>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1153 <test_non_identifiers+0x53>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_non_identifiers>:
ret

LLVM IR (-O0):
define void @test_non_identifiers() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %7, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 16
br i1 %5, label %6, label %10
6: ; preds = %3
br label %7
7: ; preds = %6
%8 = load i32, i32* %1
%9 = add nsw i32 %8, 1
store i32 %9, i32* %1
br label %3
10: ; preds = %3
store i32 0, i32* %1
br label %11
11: ; preds = %15, %10
%12 = load i32, i32* %1
%13 = icmp slt i32 %12, 16
br i1 %13, label %14, label %18
14: ; preds = %11
br label %15
15: ; preds = %14
%16 = load i32, i32* %1
%17 = add nsw i32 %16, 1
store i32 %17, i32* %1
br label %11
18: ; preds = %11
store i32 0, i32* %1
br label %19
19: ; preds = %23, %18
%20 = load i32, i32* %1
%21 = icmp slt i32 %20, 16
br i1 %21, label %22, label %26
22: ; preds = %19
br label %23
23: ; preds = %22
%24 = load i32, i32* %1
%25 = add nsw i32 %24, 1
store i32 %25, i32* %1
br label %19
26: ; preds = %19
ret void
}

LLVM IR (-O2):
define void @test_non_identifiers() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ uugcInjectC(int);
extern void uwiUngetC(int c) {
  do {
  } while (0);
  uugcInjectC(c);
}


x86 assembly (clang, -O0):
<uwiUngetC>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
jmp    1120 <uwiUngetC+0x10>
mov    -0x4(%rbp),%edi
call   1030 <uugcInjectC@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uwiUngetC>:
jmp    1030 <uugcInjectC@plt>

LLVM IR (-O0):
define void @uwiUngetC(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %1
br label %4
4: ; preds = %3
%5 = load i32, i32* %2
%6 = call i32 @uugcInjectC(i32 %5)
ret void
}

LLVM IR (-O2):
define void @uwiUngetC(i32 %0) {
%2 = tail call i32 @uugcInjectC(i32 %0)
ret void
}