int ADC_get(int adc) {
  int val;
  if (adc <= (1 << 7)) {
    val = (*((volatile unsigned long *)0xE0034004));
    (*((volatile unsigned long *)0xE0034000)) &= ~(1 << 24);
    return (val >> 6) & 0x3ff;
  } else {
    val = (*((volatile unsigned long *)0xE0060004));
    (*((volatile unsigned long *)0xE0060000)) &= ~(1 << 24);
    return (val >> 6) & 0x3ff;
  }
}


x86 assembly (clang, -O0):
<ADC_get>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x80,-0x8(%rbp)
jg     1149 <ADC_get+0x49>
mov    $0xe0034004,%eax
mov    (%rax),%rax
mov    %eax,-0xc(%rbp)
mov    $0xe0034000,%eax
mov    (%rax),%rcx
and    $0xfffffffffeffffff,%rcx
mov    $0xe0034000,%eax
mov    %rcx,(%rax)
mov    -0xc(%rbp),%eax
sar    $0x6,%eax
and    $0x3ff,%eax
mov    %eax,-0x4(%rbp)
jmp    1179 <ADC_get+0x79>
mov    $0xe0060004,%eax
mov    (%rax),%rax
mov    %eax,-0xc(%rbp)
mov    $0xe0060000,%eax
mov    (%rax),%rcx
and    $0xfffffffffeffffff,%rcx
mov    $0xe0060000,%eax
mov    %rcx,(%rax)
mov    -0xc(%rbp),%eax
sar    $0x6,%eax
and    $0x3ff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADC_get>:
mov    $0xe0034000,%ecx
cmp    $0x80,%edi
jg     1121 <ADC_get+0x21>
mov    0x4(%rcx),%rax
andq   $0xfffffffffeffffff,(%rcx)
sar    $0x6,%eax
and    $0x3ff,%eax
ret
mov    0x2c004(%rcx),%rax
andq   $0xfffffffffeffffff,0x2c000(%rcx)
ff ff ff fe
shr    $0x6,%eax
and    $0x3ff,%eax
ret

LLVM IR (-O0):
define i32 @ADC_get(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp sle i32 %5, 128
br i1 %6, label %7, label %15
7: ; preds = %1
%8 = load volatile i64, i64* inttoptr (i64 3758309380 to i64*)
%9 = trunc i64 %8 to i32
store i32 %9, i32* %4
%10 = load volatile i64, i64* inttoptr (i64 3758309376 to i64*)
%11 = and i64 %10, -16777217
store volatile i64 %11, i64* inttoptr (i64 3758309376 to i64*)
%12 = load i32, i32* %4
%13 = ashr i32 %12, 6
%14 = and i32 %13, 1023
store i32 %14, i32* %2
br label %23
15: ; preds = %1
%16 = load volatile i64, i64* inttoptr (i64 3758489604 to i64*)
%17 = trunc i64 %16 to i32
store i32 %17, i32* %4
%18 = load volatile i64, i64* inttoptr (i64 3758489600 to i64*)
%19 = and i64 %18, -16777217
store volatile i64 %19, i64* inttoptr (i64 3758489600 to i64*)
%20 = load i32, i32* %4
%21 = ashr i32 %20, 6
%22 = and i32 %21, 1023
store i32 %22, i32* %2
br label %23
23: ; preds = %15, %7
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @ADC_get(i32 %0) {
%2 = icmp slt i32 %0, 129
br i1 %2, label %3, label %9
3: ; preds = %1
%4 = load volatile i64, i64* inttoptr (i64 3758309380 to i64*)
%5 = trunc i64 %4 to i32
%6 = load volatile i64, i64* inttoptr (i64 3758309376 to i64*)
%7 = and i64 %6, -16777217
store volatile i64 %7, i64* inttoptr (i64 3758309376 to i64*)
%8 = ashr i32 %5, 6
br label %15
9: ; preds = %1
%10 = load volatile i64, i64* inttoptr (i64 3758489604 to i64*)
%11 = trunc i64 %10 to i32
%12 = load volatile i64, i64* inttoptr (i64 3758489600 to i64*)
%13 = and i64 %12, -16777217
store volatile i64 %13, i64* inttoptr (i64 3758489600 to i64*)
%14 = lshr i32 %11, 6
br label %15
15: ; preds = %9, %3
%16 = phi i32 [ %8, %3 ], [ %14, %9 ]
%17 = and i32 %16, 1023
ret i32 %17
}