xunge/DecIR huggingface dataset:
/* Type definitions */
typedef unsigned long long uint64_t;

/* Variables and functions */
uint64_t tail_index(uint64_t t) { return (t & ~(1ull << 63)); }


x86 assembly (clang, -O0):
<tail_index>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movabs $0x7fffffffffffffff,%rax
ff ff 7f
and    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tail_index>:
movabs $0x7fffffffffffffff,%rax
ff ff 7f
and    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @tail_index(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 9223372036854775807
ret i64 %4
}

LLVM IR (-O2):
define i64 @tail_index(i64 %0) {
%2 = and i64 %0, 9223372036854775807
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, double *);
int /*<<< orphan*/ system(char *);
double get_bank_balance(void) {
  double balance = 0.0;
  printf("Starting balance? ");
  scanf(" %lf", &balance);
  system("cls");
  return balance;
}


x86 assembly (clang, -O0):
<get_bank_balance>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
lea    0xeb9(%rip),%rdi
call   1040 <printf@plt>
lea    0xec0(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
lea    0xeb5(%rip),%rdi
call   1030 <system@plt>
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_bank_balance>:
push   %rax
movq   $0x0,(%rsp)
lea    0xec0(%rip),%rdi
call   1040 <printf@plt>
lea    0xec7(%rip),%rdi
mov    %rsp,%rsi
call   1050 <scanf@plt>
lea    0xebd(%rip),%rdi
call   1030 <system@plt>
movsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@.str = [19 x i8] c"Starting balance? \00"
@.str.1 = [5 x i8] c" %lf\00"
@.str.2 = [4 x i8] c"cls\00"
define double @get_bank_balance() {
%1 = alloca double
store double 0.000000e+00, double* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), double* %1)
%4 = call i32 @system(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0))
%5 = load double, double* %1
ret double %5
}

LLVM IR (-O2):
@.str = [19 x i8] c"Starting balance? \00"
@.str.1 = [5 x i8] c" %lf\00"
@.str.2 = [4 x i8] c"cls\00"
define double @get_bank_balance() {
%1 = alloca double
%2 = bitcast double* %1 to i8*
store double 0.000000e+00, double* %1
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), double* %1)
%5 = call i32 @system(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0))
%6 = load double, double* %1
ret double %6
}
void ssd1306_setDisplayAddressesForFrameBufferCopy(
    struct ssd1306Display *display) {}


x86 assembly (clang, -O0):
<ssd1306_setDisplayAddressesForFrameBufferCopy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssd1306_setDisplayAddressesForFrameBufferCopy>:
ret

LLVM IR (-O0):
%struct.ssd1306Display = type opaque
define void @ssd1306_setDisplayAddressesForFrameBufferCopy(%struct.ssd1306Display* %0) {
%2 = alloca %struct.ssd1306Display*
store %struct.ssd1306Display* %0, %struct.ssd1306Display** %2
ret void
}

LLVM IR (-O2):
%struct.ssd1306Display = type opaque
define void @ssd1306_setDisplayAddressesForFrameBufferCopy(%struct.ssd1306Display* nocapture %0) {
ret void
}
/* Variables and functions */
scalar_t__ GetVoidMemory(size_t);
char *GetCharMemory(size_t Size) { return (char *)GetVoidMemory(Size); }


x86 assembly (clang, -O0):
<GetCharMemory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <GetVoidMemory@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetCharMemory>:
jmp    1030 <GetVoidMemory@plt>

LLVM IR (-O0):
define i8* @GetCharMemory(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @GetVoidMemory(i64 %3)
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}

LLVM IR (-O2):
define i8* @GetCharMemory(i64 %0) {
%2 = tail call i64 @GetVoidMemory(i64 %0)
%3 = inttoptr i64 %2 to i8*
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ print_config_init();
void print_module_init() { print_config_init(); }


x86 assembly (clang, -O0):
<print_module_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <print_config_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_module_init>:
xor    %eax,%eax
jmp    1030 <print_config_init@plt>

LLVM IR (-O0):
define void @print_module_init() {
%1 = call i32 (...) @print_config_init()
ret void
}

LLVM IR (-O2):
define void @print_module_init() {
%1 = tail call i32 (...) @print_config_init()
ret void
}
/* Variables and functions */
scalar_t__ k_strtod(char const *, char **);
float k_strtof(const char *p, char **sret) { return (float)k_strtod(p, sret); }


x86 assembly (clang, -O0):
<k_strtof>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <k_strtod@plt>
cvtsi2ss %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<k_strtof>:
push   %rax
call   1030 <k_strtod@plt>
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @k_strtof(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
%5 = load i8*, i8** %3
%6 = load i8**, i8*** %4
%7 = call i64 @k_strtod(i8* %5, i8** %6)
%8 = sitofp i64 %7 to float
ret float %8
}

LLVM IR (-O2):
define float @k_strtof(i8* %0, i8** %1) {
%3 = tail call i64 @k_strtod(i8* %0, i8** %1)
%4 = sitofp i64 %3 to float
ret float %4
}
int do_772() { return 772; }


x86 assembly (clang, -O0):
<do_772>:
push   %rbp
mov    %rsp,%rbp
mov    $0x304,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_772>:
mov    $0x304,%eax
ret

LLVM IR (-O0):
define i32 @do_772() {
ret i32 772
}

LLVM IR (-O2):
define i32 @do_772() {
ret i32 772
}
void a_Dpi_dillo_exit() {}


x86 assembly (clang, -O0):
<a_Dpi_dillo_exit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_Dpi_dillo_exit>:
ret

LLVM IR (-O0):
define void @a_Dpi_dillo_exit() {
ret void
}

LLVM IR (-O2):
define void @a_Dpi_dillo_exit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void got_endmod(char *cp, int len) {
  (void)cp;
  (void)len;
  printf("ENDMOD\n");
}


x86 assembly (clang, -O0):
<got_endmod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<got_endmod>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"ENDMOD\0A\00"
define void @got_endmod(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [7 x i8] c"ENDMOD\00"
define void @got_endmod(i8* nocapture readnone %0, i32 %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_slist_zip_iter_add();
int /*<<< orphan*/ test_slist_zip_iter_next();
int /*<<< orphan*/ test_slist_zip_iter_remove();
int /*<<< orphan*/ test_slist_zip_iter_replace();
void test_slist_zip_iter() {
  test_slist_zip_iter_next();
  test_slist_zip_iter_add();
  test_slist_zip_iter_remove();
  test_slist_zip_iter_replace();
}


x86 assembly (clang, -O0):
<test_slist_zip_iter>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <test_slist_zip_iter_next@plt>
mov    $0x0,%al
call   1060 <test_slist_zip_iter_add@plt>
mov    $0x0,%al
call   1050 <test_slist_zip_iter_remove@plt>
mov    $0x0,%al
call   1040 <test_slist_zip_iter_replace@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_slist_zip_iter>:
push   %rax
xor    %eax,%eax
call   1030 <test_slist_zip_iter_next@plt>
xor    %eax,%eax
call   1060 <test_slist_zip_iter_add@plt>
xor    %eax,%eax
call   1050 <test_slist_zip_iter_remove@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <test_slist_zip_iter_replace@plt>

LLVM IR (-O0):
define void @test_slist_zip_iter() {
%1 = call i32 (...) @test_slist_zip_iter_next()
%2 = call i32 (...) @test_slist_zip_iter_add()
%3 = call i32 (...) @test_slist_zip_iter_remove()
%4 = call i32 (...) @test_slist_zip_iter_replace()
ret void
}

LLVM IR (-O2):
define void @test_slist_zip_iter() {
%1 = tail call i32 (...) @test_slist_zip_iter_next()
%2 = tail call i32 (...) @test_slist_zip_iter_add()
%3 = tail call i32 (...) @test_slist_zip_iter_remove()
%4 = tail call i32 (...) @test_slist_zip_iter_replace()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_usage() {
  printf("Usage: asm [input filename] [output filename]\n");
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [47 x i8] c"Usage: asm [input filename] [output filename]\0A\00"
define void @print_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [46 x i8] c"Usage: asm [input filename] [output filename]\00"
define void @print_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([46 x i8], [46 x i8]* @str, i64 0, i64 0))
ret void
}
int msecDelay(int msecs) {
  unsigned int bottom;
  if (msecs > 1000)
    return 1;
  bottom = 0x10000000 - (msecs * 50000);
  (*(volatile unsigned int *)((0x3FF0000 + 0x6004)) = (0x10000000));
  (*(volatile unsigned int *)((0x3FF0000 + 0x6000)) = (1));
  while ((*(volatile unsigned int *)((0x3FF0000 + 0x600C))) > bottom)
    ;
  (*(volatile unsigned int *)((0x3FF0000 + 0x6000)) = (0));
}


x86 assembly (clang, -O0):
<msecDelay>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x3e8,-0x8(%rbp)
jle    1120 <msecDelay+0x20>
movl   $0x1,-0x4(%rbp)
jmp    1167 <msecDelay+0x67>
imul   $0xc350,-0x8(%rbp),%ecx
mov    $0x10000000,%eax
sub    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    $0x3ff6004,%eax
movl   $0x10000000,(%rax)
mov    $0x3ff6000,%eax
movl   $0x1,(%rax)
mov    $0x3ff600c,%eax
mov    (%rax),%eax
cmp    -0xc(%rbp),%eax
jbe    115c <msecDelay+0x5c>
jmp    1147 <msecDelay+0x47>
mov    $0x3ff6000,%eax
movl   $0x0,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<msecDelay>:
cmp    $0x3e8,%edi
jg     1146 <msecDelay+0x46>
imul   $0xffff3cb0,%edi,%eax
add    $0x10000000,%eax
movl   $0x10000000,0x3ff6004
movl   $0x1,0x3ff6000
nopl   0x0(%rax)
mov    0x3ff600c,%ecx
cmp    %eax,%ecx
ja     1130 <msecDelay+0x30>
movl   $0x0,0x3ff6000
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @msecDelay(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp sgt i32 %5, 1000
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %18
8: ; preds = %1
%9 = load i32, i32* %3
%10 = mul nsw i32 %9, 50000
%11 = sub nsw i32 268435456, %10
store i32 %11, i32* %4
store volatile i32 268435456, i32* inttoptr (i64 67067908 to i32*)
store volatile i32 1, i32* inttoptr (i64 67067904 to i32*)
br label %12
12: ; preds = %16, %8
%13 = load volatile i32, i32* inttoptr (i64 67067916 to i32*)
%14 = load i32, i32* %4
%15 = icmp ugt i32 %13, %14
br i1 %15, label %16, label %17
16: ; preds = %12
br label %12
17: ; preds = %12
store volatile i32 0, i32* inttoptr (i64 67067904 to i32*)
br label %18
18: ; preds = %17, %7
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @msecDelay(i32 %0) {
%2 = icmp sgt i32 %0, 1000
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = mul i32 %0, -50000
%5 = add i32 %4, 268435456
store volatile i32 268435456, i32* inttoptr (i64 67067908 to i32*)
store volatile i32 1, i32* inttoptr (i64 67067904 to i32*)
br label %6
6: ; preds = %6, %3
%7 = load volatile i32, i32* inttoptr (i64 67067916 to i32*)
%8 = icmp ugt i32 %7, %5
br i1 %8, label %6, label %9
9: ; preds = %6
store volatile i32 0, i32* inttoptr (i64 67067904 to i32*)
br label %10
10: ; preds = %1, %9
ret i32 1
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t shabal_u(uint32_t a) { return (a << 1) + a; }


x86 assembly (clang, -O0):
<shabal_u>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
add    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shabal_u>:
lea    (%rdi,%rdi,2),%eax
ret

LLVM IR (-O0):
define i32 @shabal_u(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 1
%5 = load i32, i32* %2
%6 = add nsw i32 %4, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @shabal_u(i32 %0) {
%2 = mul i32 %0, 3
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ EXTENDED_KEY_USAGE;
typedef int /*<<< orphan*/ ASN1_OBJECT;

/* Variables and functions */
int /*<<< orphan*/ *sk_ASN1_OBJECT_value(int /*<<< orphan*/ *, int);
ASN1_OBJECT *GetX509EkuField(EXTENDED_KEY_USAGE *eku, int loc) {
  return sk_ASN1_OBJECT_value(eku, loc);
}


x86 assembly (clang, -O0):
<GetX509EkuField>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <sk_ASN1_OBJECT_value@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetX509EkuField>:
jmp    1030 <sk_ASN1_OBJECT_value@plt>

LLVM IR (-O0):
define i32* @GetX509EkuField(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32* @sk_ASN1_OBJECT_value(i32* %5, i32 %6)
ret i32* %7
}

LLVM IR (-O2):
define i32* @GetX509EkuField(i32* %0, i32 %1) {
%3 = tail call i32* @sk_ASN1_OBJECT_value(i32* %0, i32 %1)
ret i32* %3
}
const char *Alloc_Description(void) {
  return "The `Alloc` class can be used to override how memory is allocated "
         "for a "
         "given data type. By default memory is allocated using `calloc` along "
         "with "
         "the `Size` class to determine the amount of memory to allocate."
         "\n\n"
         "A custom allocator should be careful to also initialise the header "
         "for "
         "the allocated memory using the function `header_init`. Cello objects "
         "without a header wont be recognised as such as so will throw errors "
         "when "
         "used with Cello functions."
         "\n\n"
         "Allocated memory is automatically registered with the garbage "
         "collector "
         "unless the functions `alloc_raw` and `dealloc_raw` are used.";
}


x86 assembly (clang, -O0):
<Alloc_Description>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Alloc_Description>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [585 x i8] c"The `Alloc` class can be used to override how memory is allocated for a given data type. By default memory is allocated using `calloc` along with the `Size` class to determine the amount of memory to allocate.\0A\0AA custom allocator should be careful to also initialise the header for the allocated memory using the function `header_init`. Cello objects without a header wont be recognised as such as so will throw errors when used with Cello functions.\0A\0AAllocated memory is automatically registered with the garbage collector unless the functions `alloc_raw` and `dealloc_raw` are used.\00"
define i8* @Alloc_Description() {
ret i8* getelementptr inbounds ([585 x i8], [585 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [585 x i8] c"The `Alloc` class can be used to override how memory is allocated for a given data type. By default memory is allocated using `calloc` along with the `Size` class to determine the amount of memory to allocate.\0A\0AA custom allocator should be careful to also initialise the header for the allocated memory using the function `header_init`. Cello objects without a header wont be recognised as such as so will throw errors when used with Cello functions.\0A\0AAllocated memory is automatically registered with the garbage collector unless the functions `alloc_raw` and `dealloc_raw` are used.\00"
define i8* @Alloc_Description() {
ret i8* getelementptr inbounds ([585 x i8], [585 x i8]* @.str, i64 0, i64 0)
}
const char const *lxc_version(void) { return "0.9.0"; }


x86 assembly (clang, -O0):
<lxc_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lxc_version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"0.9.0\00"
define i8* @lxc_version() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"0.9.0\00"
define i8* @lxc_version() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
__attribute__((__weak__)) int _getpid() { return 1; }


x86 assembly (clang, -O0):
<_getpid>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_getpid>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define weak i32 @_getpid() {
ret i32 1
}

LLVM IR (-O2):
define weak i32 @_getpid() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
int get_bind_path_server(char *bind_path) {
  strcpy(bind_path, "UDS_SERVER");
  return 0;
}


x86 assembly (clang, -O0):
<get_bind_path_server>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcpy@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_bind_path_server>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <strcpy@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"UDS_SERVER\00"
define i32 @get_bind_path_server(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strcpy(i8* %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"UDS_SERVER\00"
define i32 @get_bind_path_server(i8* %0) {
%2 = tail call i32 @strcpy(i8* %0, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct ip6_hdr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int IsMulticastv6(struct ip6_hdr *hdr __attribute__((unused))) {
  assert(hdr != NULL);
  return 0;
}


x86 assembly (clang, -O0):
<IsMulticastv6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IsMulticastv6>:
push   %rax
xor    %eax,%eax
test   %rdi,%rdi
setne  %al
mov    %eax,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.ip6_hdr = type { i32 }
define i32 @IsMulticastv6(%struct.ip6_hdr* %0) {
%2 = alloca %struct.ip6_hdr*
store %struct.ip6_hdr* %0, %struct.ip6_hdr** %2
%3 = load %struct.ip6_hdr*, %struct.ip6_hdr** %2
%4 = icmp ne %struct.ip6_hdr* %3, null
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
ret i32 0
}

LLVM IR (-O2):
%struct.ip6_hdr = type { i32 }
define i32 @IsMulticastv6(%struct.ip6_hdr* readnone %0) {
%2 = icmp ne %struct.ip6_hdr* %0, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
ret i32 0
}
/* Variables and functions */
unsigned short dxl_read_word(unsigned char, int);
unsigned short getPresentSpeed(unsigned char id) {
  return dxl_read_word(id, (38));
}


x86 assembly (clang, -O0):
<getPresentSpeed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x26,%esi
movzbl -0x1(%rbp),%edi
call   1030 <dxl_read_word@plt>
movzwl %ax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getPresentSpeed>:
mov    $0x26,%esi
jmp    1030 <dxl_read_word@plt>

LLVM IR (-O0):
define zeroext i16 @getPresentSpeed(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call zeroext i16 @dxl_read_word(i8 zeroext %3, i32 38)
ret i16 %4
}

LLVM IR (-O2):
define zeroext i16 @getPresentSpeed(i8 zeroext %0) {
%2 = tail call zeroext i16 @dxl_read_word(i8 zeroext %0, i32 38)
ret i16 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
float ucastf(uint32_t t) { return *(float *)&t; }


x86 assembly (clang, -O0):
<ucastf>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ucastf>:
movd   %edi,%xmm0
ret

LLVM IR (-O0):
define float @ucastf(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = bitcast i32* %2 to float*
%4 = load float, float* %3
ret float %4
}

LLVM IR (-O2):
define float @ucastf(i32 %0) {
%2 = bitcast i32 %0 to float
ret float %2
}
float HMM_Lerp(float A, float Time, float B) {
  float Result = (1.0f - Time) * A + Time * B;
  return (Result);
}


x86 assembly (clang, -O0):
<HMM_Lerp>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  0xee5(%rip),%xmm0
subss  -0x8(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<HMM_Lerp>:
movss  0xef8(%rip),%xmm3
subss  %xmm1,%xmm3
mulss  %xmm1,%xmm2
mulss  %xmm3,%xmm0
addss  %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @HMM_Lerp(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%8 = load float, float* %5
%9 = fsub float 1.000000e+00, %8
%10 = load float, float* %4
%11 = load float, float* %5
%12 = load float, float* %6
%13 = fmul float %11, %12
%14 = call float @llvm.fmuladd.f32(float %9, float %10, float %13)
store float %14, float* %7
%15 = load float, float* %7
ret float %15
}

LLVM IR (-O2):
define float @HMM_Lerp(float %0, float %1, float %2) {
%4 = fsub float 1.000000e+00, %1
%5 = fmul float %1, %2
%6 = tail call float @llvm.fmuladd.f32(float %4, float %0, float %5)
ret float %6
}
int test_imm_5Fint8_reg(signed char val) {
  return ((val) & (-0x5F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Fint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffffa1,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Fint8_reg>:
test   $0xa1,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Fint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -95
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_5Fint8_reg(i8 signext %0) {
%2 = and i8 %0, -95
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int syscall_isatty(int);
int isatty(int file) { return syscall_isatty(file); }


x86 assembly (clang, -O0):
<isatty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <syscall_isatty@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isatty>:
jmp    1030 <syscall_isatty@plt>

LLVM IR (-O0):
define i32 @isatty(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @syscall_isatty(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @isatty(i32 %0) {
%2 = tail call i32 @syscall_isatty(i32 %0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, double const *, int);
uint64_t double_to_bits(const double d) {
  uint64_t bits = 0;
  memcpy(&bits, &d, sizeof(double));
  return bits;
}


x86 assembly (clang, -O0):
<double_to_bits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
lea    -0xc(%rbp),%rdi
lea    -0x8(%rbp),%rsi
mov    $0x8,%edx
call   1030 <memcpy@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<double_to_bits>:
sub    $0x18,%rsp
movsd  %xmm0,0x10(%rsp)
movl   $0x0,0xc(%rsp)
lea    0xc(%rsp),%rdi
lea    0x10(%rsp),%rsi
mov    $0x8,%edx
call   1030 <memcpy@plt>
mov    0xc(%rsp),%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @double_to_bits(double %0) {
%2 = alloca double
%3 = alloca i32
store double %0, double* %2
store i32 0, i32* %3
%4 = call i32 @memcpy(i32* %3, double* %2, i32 8)
%5 = load i32, i32* %3
ret i32 %5
}

LLVM IR (-O2):
define i32 @double_to_bits(double %0) {
%2 = alloca double
%3 = alloca i32
store double %0, double* %2
%4 = bitcast i32* %3 to i8*
store i32 0, i32* %3
%5 = call i32 @memcpy(i32* %3, double* %2, i32 8)
%6 = load i32, i32* %3
ret i32 %6
}
void test_four(int x, int y) {
#pragma omp parallel for simd collapse(2)
  for (int i = 0; i < x; i++)
    for (int i = 0; i < y; i++)
      ;
}


x86 assembly (clang, -O0):
<test_four>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1156 <test_four+0x56>
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1143 <test_four+0x43>
jmp    1135 <test_four+0x35>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1124 <test_four+0x24>
jmp    1148 <test_four+0x48>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1111 <test_four+0x11>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_four>:
ret

LLVM IR (-O0):
define void @test_four(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %7
7: ; preds = %21, %2
%8 = load i32, i32* %5
%9 = load i32, i32* %3
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %7
store i32 0, i32* %6
br label %12
12: ; preds = %17, %11
%13 = load i32, i32* %6
%14 = load i32, i32* %4
%15 = icmp slt i32 %13, %14
br i1 %15, label %16, label %20
16: ; preds = %12
br label %17
17: ; preds = %16
%18 = load i32, i32* %6
%19 = add nsw i32 %18, 1
store i32 %19, i32* %6
br label %12
20: ; preds = %12
br label %21
21: ; preds = %20
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %7
24: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @test_four(i32 %0, i32 %1) {
ret void
}
unsigned int swap32(unsigned int val) {
  return ((val >> 24) & 0xff) | ((val << 8) & 0xff0000) |
         ((val >> 8) & 0xff00) | ((val << 24) & 0xff000000);
}


x86 assembly (clang, -O0):
<swap32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x18,%eax
and    $0xff,%eax
mov    -0x4(%rbp),%ecx
shl    $0x8,%ecx
and    $0xff0000,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
shr    $0x8,%ecx
and    $0xff00,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
shl    $0x18,%ecx
and    $0xff000000,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap32>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @swap32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 24
%5 = and i32 %4, 255
%6 = load i32, i32* %2
%7 = shl i32 %6, 8
%8 = and i32 %7, 16711680
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = lshr i32 %10, 8
%12 = and i32 %11, 65280
%13 = or i32 %9, %12
%14 = load i32, i32* %2
%15 = shl i32 %14, 24
%16 = and i32 %15, -16777216
%17 = or i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @swap32(i32 %0) {
%2 = tail call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
char *nullptr_allones_BAD() {
  static char *const base = (char *)0;
  static const unsigned long offset = -1;
  return base + offset;
}


x86 assembly (clang, -O0):
<nullptr_allones_BAD>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
add    $0xffffffffffffffff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nullptr_allones_BAD>:
mov    $0xffffffffffffffff,%rax
ret

LLVM IR (-O0):
@nullptr_allones_BAD.base = internal constant i8* null
@nullptr_allones_BAD.offset = internal constant i64 -1
define i8* @nullptr_allones_BAD() {
ret i8* getelementptr inbounds (i8, i8* null, i64 -1)
}

LLVM IR (-O2):
define i8* @nullptr_allones_BAD() {
ret i8* inttoptr (i64 -1 to i8*)
}
void handle_ALRM(int sig) {}


x86 assembly (clang, -O0):
<handle_ALRM>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_ALRM>:
ret

LLVM IR (-O0):
define void @handle_ALRM(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @handle_ALRM(i32 %0) {
ret void
}
int test_imm_FCint16_reg(short val) {
  return ((val) & (-0xFC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FCint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffff04,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FCint16_reg>:
test   $0xff04,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FCint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -252
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_FCint16_reg(i16 signext %0) {
%2 = and i16 %0, -252
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void io_reg_atomic_xor(volatile uint32_t *reg, uint32_t mask) {
  *((volatile uint32_t *)(((uintptr_t)(reg)) | (0x1000U))) = mask;
}


x86 assembly (clang, -O0):
<io_reg_atomic_xor>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
or     $0x1000,%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<io_reg_atomic_xor>:
or     $0x1000,%rdi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @io_reg_atomic_xor(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
%7 = ptrtoint i32* %6 to i64
%8 = or i64 %7, 4096
%9 = inttoptr i64 %8 to i32*
store volatile i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @io_reg_atomic_xor(i32* %0, i32 %1) {
%3 = ptrtoint i32* %0 to i64
%4 = or i64 %3, 4096
%5 = inttoptr i64 %4 to i32*
store volatile i32 %1, i32* %5
ret void
}
void rct_set_usb_clk(void) {}


x86 assembly (clang, -O0):
<rct_set_usb_clk>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rct_set_usb_clk>:
ret

LLVM IR (-O0):
define void @rct_set_usb_clk() {
ret void
}

LLVM IR (-O2):
define void @rct_set_usb_clk() {
ret void
}
/* Variables and functions */
char *getenv(char const *);
int sscanf(char *, char *, int *);
void dat1GetEnv(const char *varname, int def, int *val) {
  char *txt;
  txt = getenv(varname);
  if (txt == NULL) {
    *val = def;
  } else if (sscanf(txt, "%d", val) != 1) {
    *val = def;
  }
  return;
}


x86 assembly (clang, -O0):
<dat1GetEnv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getenv@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1159 <dat1GetEnv+0x39>
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
jmp    1184 <dat1GetEnv+0x64>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rdx
lea    0xe98(%rip),%rsi
call   1040 <sscanf@plt>
cmp    $0x1,%eax
je     117f <dat1GetEnv+0x5f>
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
jmp    1184 <dat1GetEnv+0x64>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dat1GetEnv>:
push   %rbp
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %esi,%ebp
call   1030 <getenv@plt>
test   %rax,%rax
je     1149 <dat1GetEnv+0x29>
lea    0xec7(%rip),%rsi
mov    %rax,%rdi
mov    %rbx,%rdx
call   1040 <sscanf@plt>
cmp    $0x1,%eax
je     114b <dat1GetEnv+0x2b>
mov    %ebp,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @dat1GetEnv(i8* %0, i32 %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%8 = load i8*, i8** %4
%9 = call i8* @getenv(i8* %8)
store i8* %9, i8** %7
%10 = load i8*, i8** %7
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %15
12: ; preds = %3
%13 = load i32, i32* %5
%14 = load i32*, i32** %6
store i32 %13, i32* %14
br label %24
15: ; preds = %3
%16 = load i8*, i8** %7
%17 = load i32*, i32** %6
%18 = call i32 @sscanf(i8* %16, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %17)
%19 = icmp ne i32 %18, 1
br i1 %19, label %20, label %23
20: ; preds = %15
%21 = load i32, i32* %5
%22 = load i32*, i32** %6
store i32 %21, i32* %22
br label %23
23: ; preds = %20, %15
br label %24
24: ; preds = %23, %12
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @dat1GetEnv(i8* nocapture %0, i32 %1, i32* %2) {
%4 = tail call i8* @getenv(i8* %0)
%5 = icmp eq i8* %4, null
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = tail call i32 @sscanf(i8* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%8 = icmp eq i32 %7, 1
br i1 %8, label %10, label %9
9: ; preds = %6, %3
store i32 %1, i32* %2
br label %10
10: ; preds = %9, %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void cexit() { exit(1); }


x86 assembly (clang, -O0):
<cexit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<cexit>:
push   %rax
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @cexit() {
%1 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @cexit() {
%1 = tail call i32 @exit(i32 1)
unreachable
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ x;
};
struct TYPE_4__ {
  TYPE_1__ xkey;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
int get_XEvent_xkey_x(void *_p) { return (int)((XEvent *)_p)->xkey.x; }


x86 assembly (clang, -O0):
<get_XEvent_xkey_x>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xkey_x>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i32 @get_XEvent_xkey_x(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_XEvent_xkey_x(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
int sq_count_impl();
int sq_count() { return sq_count_impl(); }


x86 assembly (clang, -O0):
<sq_count>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sq_count_impl@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sq_count>:
xor    %eax,%eax
jmp    1030 <sq_count_impl@plt>

LLVM IR (-O0):
define i32 @sq_count() {
%1 = call i32 (...) @sq_count_impl()
ret i32 %1
}

LLVM IR (-O2):
define i32 @sq_count() {
%1 = tail call i32 (...) @sq_count_impl()
ret i32 %1
}
regx0reg1(r0, r1, x0, x1, p0, p1) unsigned int r0, r1;
unsigned int *p0, *p1;
{
  if ((p0[x0]) <= r1)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<regx0reg1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x20(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0xc(%rbp),%eax
ja     1138 <regx0reg1+0x38>
movl   $0x1,-0x4(%rbp)
jmp    113f <regx0reg1+0x3f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<regx0reg1>:
movslq %edx,%rcx
xor    %eax,%eax
cmp    %esi,(%r8,%rcx,4)
setbe  %al
ret

LLVM IR (-O0):
define i32 @regx0reg1(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32*, i32** %12
%15 = load i32, i32* %10
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %9
%20 = icmp ule i32 %18, %19
br i1 %20, label %21, label %22
21: ; preds = %6
store i32 1, i32* %7
br label %23
22: ; preds = %6
store i32 0, i32* %7
br label %23
23: ; preds = %22, %21
%24 = load i32, i32* %7
ret i32 %24
}

LLVM IR (-O2):
define i32 @regx0reg1(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture %4, i32* nocapture readnone %5) {
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %4, i64 %7
%9 = load i32, i32* %8
%10 = icmp ule i32 %9, %1
%11 = zext i1 %10 to i32
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int main(int argc, char **argv) {
  int a;
  scanf("%i", &a);
  if ((a & 1) == 0) {
    printf("cislo je sude \n");
  } else
    printf("cislo neni sude. \n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
lea    -0x14(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x14(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
jne    1166 <main+0x46>
lea    0xea7(%rip),%rdi
call   1030 <printf@plt>
jmp    1172 <main+0x52>
lea    0xea6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
testb  $0x1,0x4(%rsp)
lea    0xed7(%rip),%rax
lea    0xebe(%rip),%rdi
cmove  %rax,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%i\00"
@.str.1 = [16 x i8] c"cislo je sude \0A\00"
@.str.2 = [19 x i8] c"cislo neni sude. \0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %6)
%8 = load i32, i32* %6
%9 = and i32 %8, 1
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
br label %15
13: ; preds = %2
%14 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.2, i64 0, i64 0))
br label %15
15: ; preds = %13, %11
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%i\00"
@str = [18 x i8] c"cislo neni sude. \00"
@str.3 = [15 x i8] c"cislo je sude \00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %3)
%6 = load i32, i32* %3
%7 = and i32 %6, 1
%8 = icmp eq i32 %7, 0
%9 = select i1 %8, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @str.3, i64 0, i64 0), i8* getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0)
%10 = call i32 @puts(i8* dereferenceable(1) %9)
ret i32 0
}
int test03(const char *s1, const char *s2) {
  return __builtin_strcmp(__builtin_assume_aligned(s1, 4),
                          __builtin_assume_aligned(s2, 4));
}


x86 assembly (clang, -O0):
<test03>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test03>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @test03(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test03(i8* %0, i8* %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
void s3c24xx_serial_fifo_wait(void) {}


x86 assembly (clang, -O0):
<s3c24xx_serial_fifo_wait>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s3c24xx_serial_fifo_wait>:
ret

LLVM IR (-O0):
define void @s3c24xx_serial_fifo_wait() {
ret void
}

LLVM IR (-O2):
define void @s3c24xx_serial_fifo_wait() {
ret void
}
int choords_to_field(int col, int row) { return (row - 1) * 9 + (col - 1); }


x86 assembly (clang, -O0):
<choords_to_field>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
imul   $0x9,%eax,%eax
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<choords_to_field>:
lea    (%rsi,%rsi,8),%eax
add    %edi,%eax
add    $0xfffffff6,%eax
ret

LLVM IR (-O0):
define i32 @choords_to_field(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = sub nsw i32 %5, 1
%7 = mul nsw i32 %6, 9
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = add nsw i32 %7, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @choords_to_field(i32 %0, i32 %1) {
%3 = mul i32 %1, 9
%4 = add i32 %0, -10
%5 = add i32 %4, %3
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ jump(char *);
void cmd_jump(char *str) { jump(str); }


x86 assembly (clang, -O0):
<cmd_jump>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <jump@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_jump>:
jmp    1030 <jump@plt>

LLVM IR (-O0):
define void @cmd_jump(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @jump(i8* %3)
ret void
}

LLVM IR (-O2):
define void @cmd_jump(i8* %0) {
%2 = tail call i32 @jump(i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ PKCS7_ENC_CONTENT;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
int /*<<< orphan*/ ASN1_item_free(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ PKCS7_ENC_CONTENT_it;
void PKCS7_ENC_CONTENT_free(PKCS7_ENC_CONTENT *a) {
  ASN1_item_free((ASN1_VALUE *)a, &PKCS7_ENC_CONTENT_it);
}


x86 assembly (clang, -O0):
<PKCS7_ENC_CONTENT_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rsi
call   1030 <ASN1_item_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PKCS7_ENC_CONTENT_free>:
mov    0x2ec9(%rip),%rsi
jmp    1030 <ASN1_item_free@plt>

LLVM IR (-O0):
@PKCS7_ENC_CONTENT_it = global i32 0
define void @PKCS7_ENC_CONTENT_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @ASN1_item_free(i32* %3, i32* @PKCS7_ENC_CONTENT_it)
ret void
}

LLVM IR (-O2):
@PKCS7_ENC_CONTENT_it = global i32 0
define void @PKCS7_ENC_CONTENT_free(i32* %0) {
%2 = tail call i32 @ASN1_item_free(i32* %0, i32* @PKCS7_ENC_CONTENT_it)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dns_domain_length(char const *);
int /*<<< orphan*/ rr_add(char const *, int /*<<< orphan*/);
void rr_addname(const char *d) { rr_add(d, dns_domain_length(d)); }


x86 assembly (clang, -O0):
<rr_addname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <dns_domain_length@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1030 <rr_add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rr_addname>:
push   %rbx
mov    %rdi,%rbx
call   1040 <dns_domain_length@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1030 <rr_add@plt>

LLVM IR (-O0):
define void @rr_addname(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @dns_domain_length(i8* %4)
%6 = call i32 @rr_add(i8* %3, i32 %5)
ret void
}

LLVM IR (-O2):
define void @rr_addname(i8* %0) {
%2 = tail call i32 @dns_domain_length(i8* %0)
%3 = tail call i32 @rr_add(i8* %0, i32 %2)
ret void
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMR6F_get(void) { return U_WMRCORENONE_get("U_WMR6F"); }


x86 assembly (clang, -O0):
<U_WMR6F_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR6F_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR6F\00"
define i32 @U_WMR6F_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR6F\00"
define i32 @U_WMR6F_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
/* Variables and functions */
int f2u(float);
scalar_t__ isnan(float);
float u2f(unsigned int);
unsigned test_float_half(unsigned uf) {
  float f = u2f(uf);
  float hf = 0.5 * f;
  if (isnan(f))
    return uf;
  else
    return f2u(hf);
}


x86 assembly (clang, -O0):
<test_float_half>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <u2f@plt>
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xea7(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
call   1040 <isnan@plt>
cmp    $0x0,%rax
je     1185 <test_float_half+0x55>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1192 <test_float_half+0x62>
movss  -0x10(%rbp),%xmm0
call   1050 <f2u@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_float_half>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
call   1030 <u2f@plt>
movss  %xmm0,0xc(%rsp)
call   1040 <isnan@plt>
test   %rax,%rax
je     1154 <test_float_half+0x24>
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret
movss  0xc(%rsp),%xmm0
mulss  0xe9e(%rip),%xmm0
add    $0x10,%rsp
pop    %rbx
jmp    1050 <f2u@plt>

LLVM IR (-O0):
define i32 @test_float_half(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca float
%5 = alloca float
store i32 %0, i32* %3
%6 = load i32, i32* %3
%7 = call float @u2f(i32 %6)
store float %7, float* %4
%8 = load float, float* %4
%9 = fpext float %8 to double
%10 = fmul double 5.000000e-01, %9
%11 = fptrunc double %10 to float
store float %11, float* %5
%12 = load float, float* %4
%13 = call i64 @isnan(float %12)
%14 = icmp ne i64 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %1
%16 = load i32, i32* %3
store i32 %16, i32* %2
br label %20
17: ; preds = %1
%18 = load float, float* %5
%19 = call i32 @f2u(float %18)
store i32 %19, i32* %2
br label %20
20: ; preds = %17, %15
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @test_float_half(i32 %0) {
%2 = tail call float @u2f(i32 %0)
%3 = tail call i64 @isnan(float %2)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = fmul float %2, 5.000000e-01
%7 = tail call i32 @f2u(float %6)
br label %8
8: ; preds = %1, %5
%9 = phi i32 [ %7, %5 ], [ %0, %1 ]
ret i32 %9
}