double sqrt6(double y) {
  double x, z, tempf;
  unsigned long *tfptr = ((unsigned long *)&tempf) + 1;
  tempf = y;
  *tfptr = (0xbfcdd90a - *tfptr) >> 1;
  x = tempf;
  z = y * 0.5;
  x = (1.5 * x) - (x * x) * (x * z);
  x = (1.5 * x) - (x * x) * (x * z);
  return x * y;
}


x86 assembly (clang, -O0):
<sqrt6>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
lea    -0x20(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x28(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
mov    -0x28(%rbp),%rax
mov    $0xbfcdd90a,%ecx
sub    (%rax),%rcx
shr    $0x1,%rcx
mov    -0x28(%rbp),%rax
mov    %rcx,(%rax)
movsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xec0(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  -0x10(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm2
mulsd  -0x18(%rbp),%xmm2
mulsd  %xmm2,%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
movsd  0xe72(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  -0x10(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm2
mulsd  -0x18(%rbp),%xmm2
mulsd  %xmm2,%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
movsd  0xe29(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqrt6>:
movsd  0xef8(%rip),%xmm1
mulsd  %xmm0,%xmm1
movapd %xmm1,%xmm2
mulsd  %xmm0,%xmm2
movapd %xmm0,%xmm3
mulsd  %xmm0,%xmm3
mulsd  %xmm2,%xmm3
movsd  0xee0(%rip),%xmm2
movapd %xmm0,%xmm4
mulsd  %xmm2,%xmm4
subsd  %xmm3,%xmm4
mulsd  %xmm4,%xmm1
movapd %xmm4,%xmm3
mulsd  %xmm4,%xmm3
mulsd  %xmm1,%xmm3
mulsd  %xmm2,%xmm4
subsd  %xmm3,%xmm4
mulsd  %xmm4,%xmm0
ret

LLVM IR (-O0):
define double @sqrt6(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
%5 = alloca double
%6 = alloca i64*
store double %0, double* %2
%7 = bitcast double* %5 to i64*
%8 = getelementptr inbounds i64, i64* %7, i64 1
store i64* %8, i64** %6
%9 = load double, double* %2
store double %9, double* %5
%10 = load i64*, i64** %6
%11 = load i64, i64* %10
%12 = sub i64 3217938698, %11
%13 = lshr i64 %12, 1
%14 = load i64*, i64** %6
store i64 %13, i64* %14
%15 = load double, double* %5
store double %15, double* %3
%16 = load double, double* %2
%17 = fmul double %16, 5.000000e-01
store double %17, double* %4
%18 = load double, double* %3
%19 = load double, double* %3
%20 = load double, double* %3
%21 = fmul double %19, %20
%22 = load double, double* %3
%23 = load double, double* %4
%24 = fmul double %22, %23
%25 = fmul double %21, %24
%26 = fneg double %25
%27 = call double @llvm.fmuladd.f64(double 1.500000e+00, double %18, double %26)
store double %27, double* %3
%28 = load double, double* %3
%29 = load double, double* %3
%30 = load double, double* %3
%31 = fmul double %29, %30
%32 = load double, double* %3
%33 = load double, double* %4
%34 = fmul double %32, %33
%35 = fmul double %31, %34
%36 = fneg double %35
%37 = call double @llvm.fmuladd.f64(double 1.500000e+00, double %28, double %36)
store double %37, double* %3
%38 = load double, double* %3
%39 = load double, double* %2
%40 = fmul double %38, %39
ret double %40
}

LLVM IR (-O2):
define double @sqrt6(double %0) {
%2 = fmul double %0, 5.000000e-01
%3 = fmul double %2, %0
%4 = fneg double %0
%5 = fmul double %4, %0
%6 = fmul double %5, %3
%7 = tail call double @llvm.fmuladd.f64(double %0, double 1.500000e+00, double %6)
%8 = fmul double %2, %7
%9 = fneg double %7
%10 = fmul double %7, %9
%11 = fmul double %10, %8
%12 = tail call double @llvm.fmuladd.f64(double %7, double 1.500000e+00, double %11)
%13 = fmul double %12, %0
ret double %13
}