xunge/DecIR huggingface dataset:
int isprint(int c) { return c >= ' ' && c != 0x7f; }


x86 assembly (clang, -O0):
<isprint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <isprint+0x20>
cmpl   $0x7f,-0x4(%rbp)
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isprint>:
cmp    $0x20,%edi
setge  %al
cmp    $0x7f,%edi
setne  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @isprint(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 32
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp ne i32 %6, 127
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isprint(i32 %0) {
%2 = icmp sgt i32 %0, 31
%3 = icmp ne i32 %0, 127
%4 = and i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
int rec_min(int num[]) {
  int result_1, result_2;
  static int n = 0;
  if (n == 9)
    return num[9];
  else
    return (result_1 = num[n++]) < (result_2 = rec_min(num)) ? result_1
                                                             : result_2;
}


x86 assembly (clang, -O0):
<rec_min>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpl   $0x9,0x2f09(%rip)
jne    1138 <rec_min+0x28>
mov    -0x10(%rbp),%rax
mov    0x24(%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    1189 <rec_min+0x79>
mov    -0x10(%rbp),%rax
mov    0x2eea(%rip),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,0x2edf(%rip)
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x1c(%rbp)
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <rec_min@plt>
mov    %eax,%ecx
mov    -0x1c(%rbp),%eax
mov    %ecx,-0x18(%rbp)
cmp    %ecx,%eax
jge    117d <rec_min+0x6d>
mov    -0x14(%rbp),%eax
mov    %eax,-0x20(%rbp)
jmp    1183 <rec_min+0x73>
mov    -0x18(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rec_min>:
push   %rbx
movslq 0x2f14(%rip),%rax
cmp    $0x9,%rax
jne    1123 <rec_min+0x13>
mov    0x24(%rdi),%eax
pop    %rbx
ret
lea    0x1(%rax),%ecx
mov    %ecx,0x2f00(%rip)
mov    (%rdi,%rax,4),%ebx
call   1030 <rec_min@plt>
cmp    %eax,%ebx
cmovl  %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@rec_min.n = internal global i32 0
define i32 @rec_min(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
%6 = load i32, i32* @rec_min.n
%7 = icmp eq i32 %6, 9
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i32*, i32** %3
%10 = getelementptr inbounds i32, i32* %9, i64 9
%11 = load i32, i32* %10
store i32 %11, i32* %2
br label %28
12: ; preds = %1
%13 = load i32*, i32** %3
%14 = load i32, i32* @rec_min.n
%15 = add nsw i32 %14, 1
store i32 %15, i32* @rec_min.n
%16 = sext i32 %14 to i64
%17 = getelementptr inbounds i32, i32* %13, i64 %16
%18 = load i32, i32* %17
store i32 %18, i32* %4
%19 = load i32*, i32** %3
%20 = call i32 @rec_min(i32* %19)
store i32 %20, i32* %5
%21 = icmp slt i32 %18, %20
br i1 %21, label %22, label %24
22: ; preds = %12
%23 = load i32, i32* %4
br label %26
24: ; preds = %12
%25 = load i32, i32* %5
br label %26
26: ; preds = %24, %22
%27 = phi i32 [ %23, %22 ], [ %25, %24 ]
store i32 %27, i32* %2
br label %28
28: ; preds = %26, %8
%29 = load i32, i32* %2
ret i32 %29
}

LLVM IR (-O2):
@rec_min.n = internal unnamed_addr global i32 0
define i32 @rec_min(i32* nocapture %0) {
%2 = load i32, i32* @rec_min.n
%3 = icmp eq i32 %2, 9
br i1 %3, label %4, label %9
4: ; preds = %1
%5 = getelementptr inbounds i32, i32* %0, i64 9
%6 = load i32, i32* %5
br label %7
7: ; preds = %4, %9
%8 = phi i32 [ %16, %9 ], [ %6, %4 ]
ret i32 %8
9: ; preds = %1
%10 = add nsw i32 %2, 1
store i32 %10, i32* @rec_min.n
%11 = sext i32 %2 to i64
%12 = getelementptr inbounds i32, i32* %0, i64 %11
%13 = load i32, i32* %12
%14 = tail call i32 @rec_min(i32* %0)
%15 = icmp slt i32 %13, %14
%16 = select i1 %15, i32 %13, i32 %14
br label %7
}
/* Variables and functions */
int core3_swap(char *, int);
int U_EMRSETMAPMODE_swap(char *record, int torev) {
  return (core3_swap(record, torev));
}


x86 assembly (clang, -O0):
<U_EMRSETMAPMODE_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <core3_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRSETMAPMODE_swap>:
jmp    1030 <core3_swap@plt>

LLVM IR (-O0):
define i32 @U_EMRSETMAPMODE_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @core3_swap(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @U_EMRSETMAPMODE_swap(i8* %0, i32 %1) {
%3 = tail call i32 @core3_swap(i8* %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int usage(char *a0) {
  printf("%s [-u beacon timestamp] pixiewps_parameters\n\n"
         "runs pixiewps in:\n"
         "1) normal mode\n"
         "2) if above failed, several likely timestamps with short interval\n"
         "3) if above failed, with --force\n\n"
         "if env var PIXIEWPS is set, its value will be used as the "
         "executable.\n\n"
         "parameter 'u', if used, must be the first command line arg.\n"
         "it shall contain the 64bit uptime timestamp of beacon/probe resp "
         "packets\n"
         "sent by the router immediately before the pixiewps attack (in "
         "decimal).\n",
         a0);
  return 1;
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [456 x i8] c"%s [-u beacon timestamp] pixiewps_parameters\0A\0Aruns pixiewps in:\0A1) normal mode\0A2) if above failed, several likely timestamps with short interval\0A3) if above failed, with --force\0A\0Aif env var PIXIEWPS is set, its value will be used as the executable.\0A\0Aparameter 'u', if used, must be the first command line arg.\0Ait shall contain the 64bit uptime timestamp of beacon/probe resp packets\0Asent by the router immediately before the pixiewps attack (in decimal).\0A\00"
define i32 @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([456 x i8], [456 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 1
}

LLVM IR (-O2):
@.str = [456 x i8] c"%s [-u beacon timestamp] pixiewps_parameters\0A\0Aruns pixiewps in:\0A1) normal mode\0A2) if above failed, several likely timestamps with short interval\0A3) if above failed, with --force\0A\0Aif env var PIXIEWPS is set, its value will be used as the executable.\0A\0Aparameter 'u', if used, must be the first command line arg.\0Ait shall contain the 64bit uptime timestamp of beacon/probe resp packets\0Asent by the router immediately before the pixiewps attack (in decimal).\0A\00"
define i32 @usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([456 x i8], [456 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ ceal_cut_end_with(int /*<<< orphan*/ *);
void ceal_cut_end() { ceal_cut_end_with(NULL); }


x86 assembly (clang, -O0):
<ceal_cut_end>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1030 <ceal_cut_end_with@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceal_cut_end>:
xor    %edi,%edi
jmp    1030 <ceal_cut_end_with@plt>

LLVM IR (-O0):
define void @ceal_cut_end() {
%1 = call i32 @ceal_cut_end_with(i32* null)
ret void
}

LLVM IR (-O2):
define void @ceal_cut_end() {
%1 = tail call i32 @ceal_cut_end_with(i32* null)
ret void
}
void mmslipflight(unsigned n, double t, double *Y, double *p, double *f) {
  f[0] = Y[2];
  f[1] = Y[3];
  f[2] = 0.;
  f[3] = -9.81;
}


x86 assembly (clang, -O0):
<mmslipflight>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x18(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x28(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x18(%rbp),%rax
movsd  0x18(%rax),%xmm0
mov    -0x28(%rbp),%rax
movsd  %xmm0,0x8(%rax)
mov    -0x28(%rbp),%rax
xorps  %xmm0,%xmm0
movsd  %xmm0,0x10(%rax)
mov    -0x28(%rbp),%rax
movsd  0xead(%rip),%xmm0
movsd  %xmm0,0x18(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmslipflight>:
movsd  0x10(%rsi),%xmm0
movsd  %xmm0,(%rcx)
movsd  0x18(%rsi),%xmm0
movsd  %xmm0,0x8(%rcx)
xorps  %xmm0,%xmm0
movhps 0xee3(%rip),%xmm0
movups %xmm0,0x10(%rcx)
ret

LLVM IR (-O0):
define void @mmslipflight(i32 %0, double %1, double* %2, double* %3, double* %4) {
%6 = alloca i32
%7 = alloca double
%8 = alloca double*
%9 = alloca double*
%10 = alloca double*
store i32 %0, i32* %6
store double %1, double* %7
store double* %2, double** %8
store double* %3, double** %9
store double* %4, double** %10
%11 = load double*, double** %8
%12 = getelementptr inbounds double, double* %11, i64 2
%13 = load double, double* %12
%14 = load double*, double** %10
%15 = getelementptr inbounds double, double* %14, i64 0
store double %13, double* %15
%16 = load double*, double** %8
%17 = getelementptr inbounds double, double* %16, i64 3
%18 = load double, double* %17
%19 = load double*, double** %10
%20 = getelementptr inbounds double, double* %19, i64 1
store double %18, double* %20
%21 = load double*, double** %10
%22 = getelementptr inbounds double, double* %21, i64 2
store double 0.000000e+00, double* %22
%23 = load double*, double** %10
%24 = getelementptr inbounds double, double* %23, i64 3
store double -9.810000e+00, double* %24
ret void
}

LLVM IR (-O2):
define void @mmslipflight(i32 %0, double %1, double* nocapture %2, double* nocapture readnone %3, double* nocapture writeonly %4) {
%6 = getelementptr inbounds double, double* %2, i64 2
%7 = load double, double* %6
store double %7, double* %4
%8 = getelementptr inbounds double, double* %2, i64 3
%9 = load double, double* %8
%10 = getelementptr inbounds double, double* %4, i64 1
store double %9, double* %10
%11 = getelementptr inbounds double, double* %4, i64 2
%12 = bitcast double* %11 to <2 x double>*
store <2 x double> <double 0.000000e+00, double -9.810000e+00>, <2 x double>* %12
ret void
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMR56_set(void) { return U_WMRCORENONE_set("U_WMR56"); }


x86 assembly (clang, -O0):
<U_WMR56_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR56_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR56\00"
define i8* @U_WMR56_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR56\00"
define i8* @U_WMR56_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ err(int /*<<< orphan*/, char *, int /*<<< orphan*/);
int /*<<< orphan*/ errno;
void *malloc(size_t);
int /*<<< orphan*/ strerror(int /*<<< orphan*/);
void *xmalloc(size_t size) {
  void *p;
  if ((p = malloc(size)) == NULL)
    err(0, "%s", strerror(errno));
  return (p);
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    1171 <xmalloc+0x41>
mov    0x2e86(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
mov    %eax,%edx
xor    %edi,%edi
lea    0xe94(%rip),%rsi
call   1030 <err@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rbx
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    115c <xmalloc+0x2c>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
lea    0xead(%rip),%rsi
xor    %edi,%edi
mov    %eax,%edx
call   1030 <err@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@errno = global i32 0
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i32, i32* @errno
%9 = call i32 @strerror(i32 %8)
%10 = call i32 @err(i32 0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %9)
br label %11
11: ; preds = %7, %1
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@errno = global i32 0
define noalias i8* @xmalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = load i32, i32* @errno
%6 = tail call i32 @strerror(i32 %5)
%7 = tail call i32 @err(i32 0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
br label %8
8: ; preds = %4, %1
ret i8* %2
}
int d2x24_end_screen() { return 0; }


x86 assembly (clang, -O0):
<d2x24_end_screen>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2x24_end_screen>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @d2x24_end_screen() {
ret i32 0
}

LLVM IR (-O2):
define i32 @d2x24_end_screen() {
ret i32 0
}
int Sign(double arg) {
  if (arg > 0)
    return 1;
  else if (arg < 0)
    return -1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<Sign>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    1127 <Sign+0x27>
movl   $0x1,-0x4(%rbp)
jmp    1148 <Sign+0x48>
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1141 <Sign+0x41>
movl   $0xffffffff,-0x4(%rbp)
jmp    1148 <Sign+0x48>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sign>:
xorpd  %xmm1,%xmm1
xor    %ecx,%ecx
ucomisd %xmm0,%xmm1
seta   %cl
neg    %ecx
ucomisd %xmm1,%xmm0
mov    $0x1,%eax
cmovbe %ecx,%eax
ret

LLVM IR (-O0):
define i32 @Sign(double %0) {
%2 = alloca i32
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp ogt double %4, 0.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %12
7: ; preds = %1
%8 = load double, double* %3
%9 = fcmp olt double %8, 0.000000e+00
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 -1, i32* %2
br label %12
11: ; preds = %7
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @Sign(double %0) {
%2 = fcmp ogt double %0, 0.000000e+00
%3 = fcmp olt double %0, 0.000000e+00
%4 = sext i1 %3 to i32
%5 = select i1 %2, i32 1, i32 %4
ret i32 %5
}
void REMR3StateBack(void) {}


x86 assembly (clang, -O0):
<REMR3StateBack>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<REMR3StateBack>:
ret

LLVM IR (-O0):
define void @REMR3StateBack() {
ret void
}

LLVM IR (-O2):
define void @REMR3StateBack() {
ret void
}
/* Variables and functions */
int ap_base64decode_binary(unsigned char *, char const *);
int ap_base64decode(char *bufplain, const char *bufcoded) {
  int len;
  len = ap_base64decode_binary((unsigned char *)bufplain, bufcoded);
  bufplain[len] = '\0';
  return len;
}


x86 assembly (clang, -O0):
<ap_base64decode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <ap_base64decode_binary@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ap_base64decode>:
push   %rbx
mov    %rdi,%rbx
call   1030 <ap_base64decode_binary@plt>
cltq
movb   $0x0,(%rbx,%rax,1)
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ap_base64decode(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i32 @ap_base64decode_binary(i8* %6, i8* %7)
store i32 %8, i32* %5
%9 = load i8*, i8** %3
%10 = load i32, i32* %5
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %9, i64 %11
store i8 0, i8* %12
%13 = load i32, i32* %5
ret i32 %13
}

LLVM IR (-O2):
define i32 @ap_base64decode(i8* %0, i8* %1) {
%3 = tail call i32 @ap_base64decode_binary(i8* %0, i8* %1)
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
store i8 0, i8* %5
ret i32 %3
}
void safe_free_strs(char **str) {
  if (!str)
    return;
  for (int i = 0; str[i]; i++)
    free(str[i]);
  free(str);
}


x86 assembly (clang, -O0):
<safe_free_strs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    112c <safe_free_strs+0x1c>
jmp    116e <safe_free_strs+0x5e>
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     1165 <safe_free_strs+0x55>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1133 <safe_free_strs+0x23>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_free_strs>:
test   %rdi,%rdi
je     1150 <safe_free_strs+0x40>
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1141 <safe_free_strs+0x31>
lea    0x8(%r14),%rbx
nopl   0x0(%rax,%rax,1)
call   1030 <free@plt>
mov    (%rbx),%rdi
add    $0x8,%rbx
test   %rdi,%rdi
jne    1130 <safe_free_strs+0x20>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @safe_free_strs(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = icmp ne i8** %4, null
br i1 %5, label %7, label %6
6: ; preds = %1
br label %27
7: ; preds = %1
store i32 0, i32* %3
br label %8
8: ; preds = %21, %7
%9 = load i8**, i8*** %2
%10 = load i32, i32* %3
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8*, i8** %9, i64 %11
%13 = load i8*, i8** %12
%14 = icmp ne i8* %13, null
br i1 %14, label %15, label %24
15: ; preds = %8
%16 = load i8**, i8*** %2
%17 = load i32, i32* %3
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8*, i8** %16, i64 %18
%20 = load i8*, i8** %19
br label %21
21: ; preds = %15
%22 = load i32, i32* %3
%23 = add nsw i32 %22, 1
store i32 %23, i32* %3
br label %8
24: ; preds = %8
%25 = load i8**, i8*** %2
%26 = bitcast i8** %25 to i8*
br label %27
27: ; preds = %24, %6
ret void
}

LLVM IR (-O2):
define void @safe_free_strs(i8** %0) {
%2 = icmp eq i8** %0, null
br i1 %2, label %15, label %3
3: ; preds = %1
%4 = load i8*, i8** %0
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %8
6: ; preds = %8, %3
%7 = bitcast i8** %0 to i8*
tail call void @free(i8* %7)
br label %15
8: ; preds = %3, %8
%9 = phi i64 [ %11, %8 ], [ 0, %3 ]
%10 = phi i8* [ %13, %8 ], [ %4, %3 ]
tail call void @free(i8* %10)
%11 = add nuw nsw i64 %9, 1
%12 = getelementptr inbounds i8*, i8** %0, i64 %11
%13 = load i8*, i8** %12
%14 = icmp eq i8* %13, null
br i1 %14, label %6, label %8
15: ; preds = %1, %6
ret void
}
/* Variables and functions */
scalar_t__ test19_aux2();
scalar_t__ test19_aux3(int *);
int test21(int x, int y) {
  int z;
  if ((x && y) || test19_aux3(&z) || test19_aux2())
    return z;
  return 0;
}


x86 assembly (clang, -O0):
<test21>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1142 <test21+0x22>
cmpl   $0x0,-0xc(%rbp)
jne    1166 <test21+0x46>
lea    -0x10(%rbp),%rdi
call   1040 <test19_aux3@plt>
cmp    $0x0,%rax
jne    1166 <test21+0x46>
mov    $0x0,%al
call   1030 <test19_aux2@plt>
cmp    $0x0,%rax
je     1171 <test21+0x51>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1178 <test21+0x58>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test21>:
push   %rbx
sub    $0x10,%rsp
test   %edi,%edi
je     112d <test21+0xd>
test   %esi,%esi
jne    114a <test21+0x2a>
lea    0xc(%rsp),%rdi
call   1040 <test19_aux3@plt>
test   %rax,%rax
jne    114a <test21+0x2a>
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <test19_aux2@plt>
test   %rax,%rax
je     114e <test21+0x2e>
mov    0xc(%rsp),%ebx
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @test21(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load i32, i32* %5
%11 = icmp ne i32 %10, 0
br i1 %11, label %18, label %12
12: ; preds = %9, %2
%13 = call i64 @test19_aux3(i32* %6)
%14 = icmp ne i64 %13, 0
br i1 %14, label %18, label %15
15: ; preds = %12
%16 = call i64 (...) @test19_aux2()
%17 = icmp ne i64 %16, 0
br i1 %17, label %18, label %20
18: ; preds = %15, %12, %9
%19 = load i32, i32* %6
store i32 %19, i32* %3
br label %21
20: ; preds = %15
store i32 0, i32* %3
br label %21
21: ; preds = %20, %18
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @test21(i32 %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = icmp ne i32 %0, 0
%6 = icmp ne i32 %1, 0
%7 = and i1 %5, %6
br i1 %7, label %14, label %8
8: ; preds = %2
%9 = call i64 @test19_aux3(i32* %3)
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = call i64 (...) @test19_aux2()
%13 = icmp eq i64 %12, 0
br i1 %13, label %16, label %14
14: ; preds = %2, %11, %8
%15 = load i32, i32* %3
br label %16
16: ; preds = %11, %14
%17 = phi i32 [ %15, %14 ], [ 0, %11 ]
ret i32 %17
}
/* Variables and functions */
int /*<<< orphan*/ _SC_NPROCESSORS_ONLN;
int sysconf(int /*<<< orphan*/);
int hw_cores() {
  int ncpus = 1;
  ncpus = sysconf(_SC_NPROCESSORS_ONLN);
  return (ncpus > 0) ? ncpus : 1;
}


x86 assembly (clang, -O0):
<hw_cores>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
call   1030 <sysconf@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1145 <hw_cores+0x35>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1152 <hw_cores+0x42>
mov    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1152 <hw_cores+0x42>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hw_cores>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <sysconf@plt>
test   %eax,%eax
mov    $0x1,%ecx
cmovle %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@_SC_NPROCESSORS_ONLN = global i32 0
define i32 @hw_cores() {
%1 = alloca i32
store i32 1, i32* %1
%2 = load i32, i32* @_SC_NPROCESSORS_ONLN
%3 = call i32 @sysconf(i32 %2)
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = load i32, i32* %1
br label %9
8: ; preds = %0
br label %9
9: ; preds = %8, %6
%10 = phi i32 [ %7, %6 ], [ 1, %8 ]
ret i32 %10
}

LLVM IR (-O2):
@_SC_NPROCESSORS_ONLN = global i32 0
define i32 @hw_cores() {
%1 = load i32, i32* @_SC_NPROCESSORS_ONLN
%2 = tail call i32 @sysconf(i32 %1)
%3 = icmp sgt i32 %2, 1
%4 = select i1 %3, i32 %2, i32 1
ret i32 %4
}
/* Type definitions */
typedef int __le16;

/* Variables and functions */
int cpu_to_le16(int);
int ieee80211_is_pspoll(__le16 fc) {
  return (fc & cpu_to_le16(0x000c | 0x00f0)) == cpu_to_le16(0x0004 | 0x00A0);
}


x86 assembly (clang, -O0):
<ieee80211_is_pspoll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0xfc,%edi
call   1030 <cpu_to_le16@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
and    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    $0xa4,%edi
call   1030 <cpu_to_le16@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ieee80211_is_pspoll>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    $0xfc,%edi
call   1030 <cpu_to_le16@plt>
mov    %eax,%ebp
and    %ebx,%ebp
mov    $0xa4,%edi
call   1030 <cpu_to_le16@plt>
xor    %ecx,%ecx
cmp    %eax,%ebp
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @ieee80211_is_pspoll(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @cpu_to_le16(i32 252)
%5 = and i32 %3, %4
%6 = call i32 @cpu_to_le16(i32 164)
%7 = icmp eq i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @ieee80211_is_pspoll(i32 %0) {
%2 = tail call i32 @cpu_to_le16(i32 252)
%3 = and i32 %2, %0
%4 = tail call i32 @cpu_to_le16(i32 164)
%5 = icmp eq i32 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Type definitions */
struct entry {
  int dummy;
};

/* Variables and functions */
char *av_strdup(char *);
int pass_password_get(struct entry *ent, const char *param, char **resp) {
  *resp = av_strdup("");
  return 0;
}


x86 assembly (clang, -O0):
<pass_password_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    0xed5(%rip),%rdi
call   1030 <av_strdup@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pass_password_get>:
push   %rbx
mov    %rdx,%rbx
lea    0xee5(%rip),%rdi
call   1030 <av_strdup@plt>
mov    %rax,(%rbx)
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.entry = type { i32 }
@.str = [1 x i8] zeroinitializer
define i32 @pass_password_get(%struct.entry* %0, i8* %1, i8** %2) {
%4 = alloca %struct.entry*
%5 = alloca i8*
%6 = alloca i8**
store %struct.entry* %0, %struct.entry** %4
store i8* %1, i8** %5
store i8** %2, i8*** %6
%7 = call i8* @av_strdup(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%8 = load i8**, i8*** %6
store i8* %7, i8** %8
ret i32 0
}

LLVM IR (-O2):
%struct.entry = type { i32 }
@.str = [1 x i8] zeroinitializer
define i32 @pass_password_get(%struct.entry* nocapture readnone %0, i8* nocapture readnone %1, i8** nocapture writeonly %2) {
%4 = tail call i8* @av_strdup(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
store i8* %4, i8** %2
ret i32 0
}
unsigned long strlength(const char *str) {
  unsigned long len = 0;
  while (*(str++)) {
    len++;
  }
  return len;
}


x86 assembly (clang, -O0):
<strlength>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,(%rax)
je     1139 <strlength+0x39>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <strlength+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlength>:
cmpb   $0x0,(%rdi)
je     111f <strlength+0x1f>
xor    %ecx,%ecx
nopw   0x0(%rax,%rax,1)
lea    0x1(%rcx),%rax
cmpb   $0x0,0x1(%rdi,%rcx,1)
mov    %rax,%rcx
jne    1110 <strlength+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @strlength(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = load i64, i64* %3
%11 = add i64 %10, 1
store i64 %11, i64* %3
br label %4
12: ; preds = %4
%13 = load i64, i64* %3
ret i64 %13
}

LLVM IR (-O2):
define i64 @strlength(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add i64 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i64 [ 0, %1 ], [ %8, %4 ]
ret i64 %12
}
int isinf(n)
double n;
{ return (!finite(n) && !isnan(n)); }


x86 assembly (clang, -O0):
<isinf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movaps 0xee7(%rip),%xmm1
pand   %xmm1,%xmm0
xor    %eax,%eax
movsd  0xec9(%rip),%xmm1
ucomisd %xmm1,%xmm0
mov    %al,-0x9(%rbp)
jne    115b <isinf+0x4b>
movsd  -0x8(%rbp),%xmm0
mov    $0x1,%al
call   1030 <isnan@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isinf>:
push   %rax
movapd 0xee7(%rip),%xmm1
andpd  %xmm0,%xmm1
xor    %eax,%eax
ucomisd 0xee9(%rip),%xmm1
je     112b <isinf+0x1b>
pop    %rcx
ret
mov    $0x1,%al
call   1030 <isnan@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
sete   %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @isinf(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @llvm.fabs.f64(double %3)
%5 = fcmp one double %4, 0x7FF0000000000000
br i1 %5, label %11, label %6
6: ; preds = %1
%7 = load double, double* %2
%8 = call i32 (double, ...) bitcast (i32 (...)* @isnan to i32 (double, ...)*)(double %7)
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
br label %11
11: ; preds = %6, %1
%12 = phi i1 [ false, %1 ], [ %10, %6 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @isinf(double %0) {
%2 = tail call double @llvm.fabs.f64(double %0)
%3 = fcmp ueq double %2, 0x7FF0000000000000
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i32 (double, ...) bitcast (i32 (...)* @isnan to i32 (double, ...)*)(double %0)
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %9
}
long get_grid_index_from_address(const long address[3], const long D_diag[3]) {
  return (address[2] * D_diag[0] * D_diag[1] + address[1] * D_diag[0] +
          address[0]);
}


x86 assembly (clang, -O0):
<get_grid_index_from_address>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%rax
mov    -0x10(%rbp),%rcx
imul   (%rcx),%rax
mov    -0x10(%rbp),%rcx
imul   0x8(%rcx),%rax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%rcx
mov    -0x10(%rbp),%rdx
imul   (%rdx),%rcx
add    %rcx,%rax
mov    -0x8(%rbp),%rcx
add    (%rcx),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_grid_index_from_address>:
mov    0x8(%rsi),%rax
imul   0x10(%rdi),%rax
add    0x8(%rdi),%rax
imul   (%rsi),%rax
add    (%rdi),%rax
ret

LLVM IR (-O0):
define i64 @get_grid_index_from_address(i64* %0, i64* %1) {
%3 = alloca i64*
%4 = alloca i64*
store i64* %0, i64** %3
store i64* %1, i64** %4
%5 = load i64*, i64** %3
%6 = getelementptr inbounds i64, i64* %5, i64 2
%7 = load i64, i64* %6
%8 = load i64*, i64** %4
%9 = getelementptr inbounds i64, i64* %8, i64 0
%10 = load i64, i64* %9
%11 = mul nsw i64 %7, %10
%12 = load i64*, i64** %4
%13 = getelementptr inbounds i64, i64* %12, i64 1
%14 = load i64, i64* %13
%15 = mul nsw i64 %11, %14
%16 = load i64*, i64** %3
%17 = getelementptr inbounds i64, i64* %16, i64 1
%18 = load i64, i64* %17
%19 = load i64*, i64** %4
%20 = getelementptr inbounds i64, i64* %19, i64 0
%21 = load i64, i64* %20
%22 = mul nsw i64 %18, %21
%23 = add nsw i64 %15, %22
%24 = load i64*, i64** %3
%25 = getelementptr inbounds i64, i64* %24, i64 0
%26 = load i64, i64* %25
%27 = add nsw i64 %23, %26
ret i64 %27
}

LLVM IR (-O2):
define i64 @get_grid_index_from_address(i64* nocapture %0, i64* nocapture %1) {
%3 = getelementptr inbounds i64, i64* %0, i64 2
%4 = load i64, i64* %3
%5 = load i64, i64* %1
%6 = getelementptr inbounds i64, i64* %1, i64 1
%7 = load i64, i64* %6
%8 = mul i64 %7, %4
%9 = getelementptr inbounds i64, i64* %0, i64 1
%10 = load i64, i64* %9
%11 = load i64, i64* %0
%12 = add i64 %10, %8
%13 = mul i64 %12, %5
%14 = add i64 %13, %11
ret i64 %14
}
void free_table(int **table, int width) {
  for (int row = 0; row < width; ++row) {
    free(table[row]);
  }
  free(table);
}


x86 assembly (clang, -O0):
<free_table>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1151 <free_table+0x41>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <free_table+0x16>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_table>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
test   %esi,%esi
jle    1142 <free_table+0x32>
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <free@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <free_table+0x20>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_table(i32** %0, i32 %1) {
%3 = alloca i32**
%4 = alloca i32
%5 = alloca i32
store i32** %0, i32*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32**, i32*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32*, i32** %11, i64 %13
%15 = load i32*, i32** %14
%16 = bitcast i32* %15 to i8*
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = load i32**, i32*** %3
%22 = bitcast i32** %21 to i8*
ret void
}

LLVM IR (-O2):
define void @free_table(i32** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %8
6: ; preds = %8, %2
%7 = bitcast i32** %0 to i8*
tail call void @free(i8* %7)
ret void
8: ; preds = %4, %8
%9 = phi i64 [ 0, %4 ], [ %13, %8 ]
%10 = getelementptr inbounds i32*, i32** %0, i64 %9
%11 = bitcast i32** %10 to i8**
%12 = load i8*, i8** %11
tail call void @free(i8* %12)
%13 = add nuw nsw i64 %9, 1
%14 = icmp eq i64 %13, %5
br i1 %14, label %6, label %8
}
void glutVideoPan(int x, int y, int w, int h) {}


x86 assembly (clang, -O0):
<glutVideoPan>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glutVideoPan>:
ret

LLVM IR (-O0):
define void @glutVideoPan(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret void
}

LLVM IR (-O2):
define void @glutVideoPan(i32 %0, i32 %1, i32 %2, i32 %3) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void usage() {
  puts("usage: host-scan <subnet/cidr>");
  puts("ex: host-scan 10.10.0.0/16");
  puts("ex: host-scan 192.168.100.100/32");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
lea    0xef8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf07(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xefb(%rip),%rdi
call   1030 <puts@plt>
lea    0xf0a(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"usage: host-scan <subnet/cidr>\00"
@.str.1 = [27 x i8] c"ex: host-scan 10.10.0.0/16\00"
@.str.2 = [33 x i8] c"ex: host-scan 192.168.100.100/32\00"
define void @usage() {
%1 = call i32 @puts(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @puts(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @puts(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"usage: host-scan <subnet/cidr>\00"
@.str.1 = [27 x i8] c"ex: host-scan 10.10.0.0/16\00"
@.str.2 = [33 x i8] c"ex: host-scan 192.168.100.100/32\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @.str.2, i64 0, i64 0))
ret void
}
int compare_doubles_descending(const void *p, const void *q) {
  double x = *(const double *)p;
  double y = *(const double *)q;
  int ret;
  if (x == y) {
    ret = 0;
  } else {
    ret = (x < y) ? 1 : -1;
  }
  return ret;
}


x86 assembly (clang, -O0):
<compare_doubles_descending>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
ucomisd -0x20(%rbp),%xmm0
jne    1148 <compare_doubles_descending+0x48>
jp     1148 <compare_doubles_descending+0x48>
movl   $0x0,-0x24(%rbp)
jmp    1166 <compare_doubles_descending+0x66>
movsd  -0x18(%rbp),%xmm1
movsd  -0x20(%rbp),%xmm0
mov    $0xffffffff,%eax
mov    $0x1,%ecx
ucomisd %xmm1,%xmm0
cmova  %ecx,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_doubles_descending>:
movsd  (%rdi),%xmm0
movsd  (%rsi),%xmm1
xor    %ecx,%ecx
ucomisd %xmm0,%xmm1
seta   %cl
xor    %eax,%eax
ucomisd %xmm1,%xmm0
lea    -0x1(%rcx,%rcx,1),%ecx
cmovne %ecx,%eax
cmovp  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @compare_doubles_descending(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca double
%6 = alloca double
%7 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%8 = load i8*, i8** %3
%9 = bitcast i8* %8 to double*
%10 = load double, double* %9
store double %10, double* %5
%11 = load i8*, i8** %4
%12 = bitcast i8* %11 to double*
%13 = load double, double* %12
store double %13, double* %6
%14 = load double, double* %5
%15 = load double, double* %6
%16 = fcmp oeq double %14, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 0, i32* %7
br label %24
18: ; preds = %2
%19 = load double, double* %5
%20 = load double, double* %6
%21 = fcmp olt double %19, %20
%22 = zext i1 %21 to i64
%23 = select i1 %21, i32 1, i32 -1
store i32 %23, i32* %7
br label %24
24: ; preds = %18, %17
%25 = load i32, i32* %7
ret i32 %25
}

LLVM IR (-O2):
define i32 @compare_doubles_descending(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to double*
%4 = load double, double* %3
%5 = bitcast i8* %1 to double*
%6 = load double, double* %5
%7 = fcmp oeq double %4, %6
%8 = fcmp olt double %4, %6
%9 = select i1 %8, i32 1, i32 -1
%10 = select i1 %7, i32 0, i32 %9
ret i32 %10
}
int f1(int a, int b) { return (a | b) ^ b; }


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
or     -0x8(%rbp),%eax
xor    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
mov    %esi,%eax
not    %eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = or i32 %5, %6
%8 = load i32, i32* %4
%9 = xor i32 %7, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @f1(i32 %0, i32 %1) {
%3 = xor i32 %1, -1
%4 = and i32 %3, %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ csolve_assert(int);
scalar_t__ malloc(int);
int nondet();
int /*<<< orphan*/ validptr(int *);
void main() {
  int *r;
  r = (int *)malloc(sizeof(*r));
  validptr(r);
  *r = 10;
  validptr(r);
  csolve_assert(*r == 10);
  *r = nondet();
  int a = *r;
  int b = *r;
  csolve_assert(a == b);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1060 <validptr@plt>
mov    -0x8(%rbp),%rax
movl   $0xa,(%rax)
mov    -0x8(%rbp),%rdi
call   1060 <validptr@plt>
mov    -0x8(%rbp),%rax
cmpl   $0xa,(%rax)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <csolve_assert@plt>
mov    $0x0,%al
call   1030 <nondet@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <csolve_assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1060 <validptr@plt>
movl   $0xa,(%rbx)
mov    %rbx,%rdi
call   1060 <validptr@plt>
xor    %edi,%edi
cmpl   $0xa,(%rbx)
sete   %dil
call   1050 <csolve_assert@plt>
xor    %eax,%eax
call   1030 <nondet@plt>
mov    %eax,(%rbx)
mov    $0x1,%edi
pop    %rbx
jmp    1050 <csolve_assert@plt>

LLVM IR (-O0):
define void @main() {
%1 = alloca i32*
%2 = alloca i32
%3 = alloca i32
%4 = call i64 @malloc(i32 4)
%5 = inttoptr i64 %4 to i32*
store i32* %5, i32** %1
%6 = load i32*, i32** %1
%7 = call i32 @validptr(i32* %6)
%8 = load i32*, i32** %1
store i32 10, i32* %8
%9 = load i32*, i32** %1
%10 = call i32 @validptr(i32* %9)
%11 = load i32*, i32** %1
%12 = load i32, i32* %11
%13 = icmp eq i32 %12, 10
%14 = zext i1 %13 to i32
%15 = call i32 @csolve_assert(i32 %14)
%16 = call i32 (...) @nondet()
%17 = load i32*, i32** %1
store i32 %16, i32* %17
%18 = load i32*, i32** %1
%19 = load i32, i32* %18
store i32 %19, i32* %2
%20 = load i32*, i32** %1
%21 = load i32, i32* %20
store i32 %21, i32* %3
%22 = load i32, i32* %2
%23 = load i32, i32* %3
%24 = icmp eq i32 %22, %23
%25 = zext i1 %24 to i32
%26 = call i32 @csolve_assert(i32 %25)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i64 @malloc(i32 4)
%2 = inttoptr i64 %1 to i32*
%3 = tail call i32 @validptr(i32* %2)
store i32 10, i32* %2
%4 = tail call i32 @validptr(i32* %2)
%5 = load i32, i32* %2
%6 = icmp eq i32 %5, 10
%7 = zext i1 %6 to i32
%8 = tail call i32 @csolve_assert(i32 %7)
%9 = tail call i32 (...) @nondet()
store i32 %9, i32* %2
%10 = tail call i32 @csolve_assert(i32 1)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, unsigned char, int);
void sprint_mov_direct_to_atRi(char *str, unsigned char i, uint8_t direct) {
  sprintf(str,
          "MOV   @R%X, "
          "0x%02X"
          "                 ",
          i, direct);
}


x86 assembly (clang, -O0):
<sprint_mov_direct_to_atRi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x9(%rbp),%al
mov    -0x10(%rbp),%ecx
lea    0xeca(%rip),%rsi
movzbl %al,%edx
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sprint_mov_direct_to_atRi>:
mov    %edx,%ecx
mov    %esi,%edx
lea    0xee5(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"MOV @R%X, 0x%02X \00"
define void @sprint_mov_direct_to_atRi(i8* %0, i8 zeroext %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i32
store i8* %0, i8** %4
store i8 %1, i8* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8, i8* %5
%9 = load i32, i32* %6
%10 = call i32 @sprintf(i8* %7, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i8 zeroext %8, i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [36 x i8] c"MOV @R%X, 0x%02X \00"
define void @sprint_mov_direct_to_atRi(i8* nocapture writeonly %0, i8 zeroext %1, i32 %2) {
%4 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i8 zeroext %1, i32 %2)
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int sweep_set_quaddobl_start(int n, double *c) {
  int fail, ptos[2];
  ptos[0] = 2;
  ptos[1] = 0;
  fail = _ada_use_c2phc4c(618, ptos, &n, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<sweep_set_quaddobl_start>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x2,-0x1c(%rbp)
movl   $0x0,-0x18(%rbp)
lea    -0x1c(%rbp),%rsi
mov    -0x10(%rbp),%rcx
mov    $0x26a,%edi
lea    -0x4(%rbp),%rdx
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sweep_set_quaddobl_start>:
sub    $0x18,%rsp
mov    %rsi,%rcx
mov    %edi,0xc(%rsp)
movq   $0x2,0x10(%rsp)
lea    0x10(%rsp),%rsi
lea    0xc(%rsp),%rdx
mov    $0x26a,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @sweep_set_quaddobl_start(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca double*
%5 = alloca i32
%6 = alloca [2 x i32]
store i32 %0, i32* %3
store double* %1, double** %4
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 0
store i32 2, i32* %7
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 1
store i32 0, i32* %8
%9 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 0
%10 = load double*, double** %4
%11 = call i32 @_ada_use_c2phc4c(i32 618, i32* %9, i32* %3, double* %10, i32 0)
store i32 %11, i32* %5
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @sweep_set_quaddobl_start(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca [2 x i32]
store i32 %0, i32* %3
%5 = bitcast [2 x i32]* %4 to i8*
%6 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 0
store i32 2, i32* %6
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 1
store i32 0, i32* %7
%8 = call i32 @_ada_use_c2phc4c(i32 618, i32* %6, i32* %3, double* %1, i32 0)
ret i32 %8
}
/* Variables and functions */
int (*getbuiltout(int verbose))(float *) {
  int qpolygon(float *);
  switch (verbose) {
  case 1:
    return qpolygon;
  default:
    return NULL;
  }
}


x86 assembly (clang, -O0):
<getbuiltout>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
jne    1128 <getbuiltout+0x28>
jmp    1118 <getbuiltout+0x18>
mov    0x2ec1(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1130 <getbuiltout+0x30>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getbuiltout>:
cmp    $0x1,%edi
jne    110d <getbuiltout+0xd>
mov    0x2ed4(%rip),%rax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 (float*)* @getbuiltout(i32 %0) {
%2 = alloca i32 (float*)*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 1, label %5
]
5: ; preds = %1
store i32 (float*)* @qpolygon, i32 (float*)** %2
br label %7
6: ; preds = %1
store i32 (float*)* null, i32 (float*)** %2
br label %7
7: ; preds = %6, %5
%8 = load i32 (float*)*, i32 (float*)** %2
ret i32 (float*)* %8
}

LLVM IR (-O2):
define i32 (float*)* @getbuiltout(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = select i1 %2, i32 (float*)* @qpolygon, i32 (float*)* null
ret i32 (float*)* %3
}
int func4(int x) {
#pragma critTer : 20 :../ test / resources / functionCommentReturn.c:
  return 0;
#pragma critTer : 21 :../ test / resources / functionCommentReturn.c:
}


x86 assembly (clang, -O0):
<func4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func4>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @func4(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @func4(i32 %0) {
ret i32 0
}
void gtk_file_chooser_button_new_with_backend() {}


x86 assembly (clang, -O0):
<gtk_file_chooser_button_new_with_backend>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_file_chooser_button_new_with_backend>:
ret

LLVM IR (-O0):
define void @gtk_file_chooser_button_new_with_backend() {
ret void
}

LLVM IR (-O2):
define void @gtk_file_chooser_button_new_with_backend() {
ret void
}