unsigned long long flip_B7(const unsigned long long P,
                           const unsigned long long O) {
  unsigned int outflank_v, outflank_h, outflank_d7;
  unsigned long long flipped;
  outflank_v = ((((((((unsigned int)(O)) & 0x02020200u) << 3) +
                   ((((unsigned int)((O) >> 32)) & 0x00000202u) >> 1)) *
                  0x08040201u) >>
                 24) +
                4) &
               (((((((unsigned int)(P)) & 0x02020202u) << 3) +
                  ((((unsigned int)((P) >> 32)) & 0x00000002u) >> 1)) *
                 0x08040201u) >>
                24);
  flipped = (outflank_v * 0x0000007c3c1c0c04ULL) & 0x0000020202020200ULL;
  outflank_h = ((((unsigned int)((O) >> 32)) & 0x007c0000u) + 0x00040000u) &
               ((unsigned int)((P) >> 32));
  flipped |=
      (unsigned long long)((outflank_h - (outflank_h >> 8)) & 0x007c0000u)
      << 32;
  outflank_d7 = (((((((unsigned int)(O)) & 0x10204000u) +
                    (((unsigned int)((O) >> 32)) & 0x00000408u)) *
                   0x01010101u) >>
                  25) +
                 2) &
                ((((((unsigned int)(P)) & 0x10204080u) +
                   (((unsigned int)((P) >> 32)) & 0x00000008u)) *
                  0x01010101u) >>
                 25);
  flipped |= (outflank_d7 * 0x000001f1e1c18100ULL) & 0x0000040810204000ULL;
  return flipped;
}


x86 assembly (clang, -O0):
<flip_B7>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x2020200,%eax
shl    $0x3,%eax
mov    -0x10(%rbp),%rcx
shr    $0x20,%rcx
and    $0x202,%ecx
shr    $0x1,%ecx
add    %ecx,%eax
imul   $0x8040201,%eax,%eax
shr    $0x18,%eax
add    $0x4,%eax
mov    -0x8(%rbp),%rcx
and    $0x2020202,%ecx
shl    $0x3,%ecx
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0x2,%edx
shr    $0x1,%edx
add    %edx,%ecx
imul   $0x8040201,%ecx,%ecx
shr    $0x18,%ecx
and    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
movabs $0x7c3c1c0c04,%rcx
imul   %rcx,%rax
movabs $0x20202020200,%rcx
and    %rcx,%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x20,%rax
and    $0x7c0000,%eax
add    $0x40000,%eax
mov    -0x8(%rbp),%rcx
shr    $0x20,%rcx
and    %ecx,%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    -0x18(%rbp),%ecx
shr    $0x8,%ecx
sub    %ecx,%eax
and    $0x7c0000,%eax
mov    %eax,%eax
shl    $0x20,%rax
or     -0x28(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
and    $0x10204000,%eax
mov    -0x10(%rbp),%rcx
shr    $0x20,%rcx
and    $0x408,%ecx
add    %ecx,%eax
imul   $0x1010101,%eax,%eax
shr    $0x19,%eax
add    $0x2,%eax
mov    -0x8(%rbp),%rcx
and    $0x10204080,%ecx
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0x8,%edx
add    %edx,%ecx
imul   $0x1010101,%ecx,%ecx
shr    $0x19,%ecx
and    %ecx,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
movabs $0x1f1e1c18100,%rcx
imul   %rcx,%rax
movabs $0x40810204000,%rcx
and    %rcx,%rax
or     -0x28(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flip_B7>:
mov    %esi,%ecx
and    $0x2020200,%ecx
mov    %rsi,%r8
shr    $0x20,%r8
mov    %rsi,%rdx
shr    $0x21,%rdx
and    $0x101,%edx
lea    (%rdx,%rcx,8),%ecx
imul   $0x8040201,%ecx,%edx
shr    $0x18,%edx
add    $0x4,%edx
mov    %edi,%r9d
and    $0x2020202,%r9d
mov    %rdi,%rcx
shr    $0x20,%rcx
mov    %rdi,%rax
shr    $0x21,%rax
and    $0x1,%eax
lea    (%rax,%r9,8),%eax
imul   $0x8040201,%eax,%eax
shr    $0x18,%eax
and    %edx,%eax
movabs $0x7c3c1c0c04,%rdx
imul   %rax,%rdx
movabs $0x20202020200,%r9
and    %rdx,%r9
mov    %r8d,%edx
and    $0x7c0000,%edx
add    $0x40000,%edx
and    %ecx,%edx
mov    %edx,%eax
shr    $0x8,%eax
sub    %eax,%edx
and    $0x7c0000,%edx
shl    $0x20,%rdx
or     %r9,%rdx
and    $0x10204000,%esi
and    $0x408,%r8d
or     %esi,%r8d
imul   $0x1010101,%r8d,%eax
shr    $0x19,%eax
add    $0x2,%eax
and    $0x10204080,%edi
and    $0x8,%ecx
or     %edi,%ecx
imul   $0x1010101,%ecx,%ecx
shr    $0x19,%ecx
and    %eax,%ecx
movabs $0x1f1e1c18100,%rsi
imul   %rcx,%rsi
movabs $0x40810204000,%rax
and    %rsi,%rax
or     %rdx,%rax
ret

LLVM IR (-O0):
define i64 @flip_B7(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%9 = load i64, i64* %4
%10 = trunc i64 %9 to i32
%11 = and i32 %10, 33686016
%12 = shl i32 %11, 3
%13 = load i64, i64* %4
%14 = lshr i64 %13, 32
%15 = trunc i64 %14 to i32
%16 = and i32 %15, 514
%17 = lshr i32 %16, 1
%18 = add i32 %12, %17
%19 = mul i32 %18, 134480385
%20 = lshr i32 %19, 24
%21 = add i32 %20, 4
%22 = load i64, i64* %3
%23 = trunc i64 %22 to i32
%24 = and i32 %23, 33686018
%25 = shl i32 %24, 3
%26 = load i64, i64* %3
%27 = lshr i64 %26, 32
%28 = trunc i64 %27 to i32
%29 = and i32 %28, 2
%30 = lshr i32 %29, 1
%31 = add i32 %25, %30
%32 = mul i32 %31, 134480385
%33 = lshr i32 %32, 24
%34 = and i32 %21, %33
store i32 %34, i32* %5
%35 = load i32, i32* %5
%36 = zext i32 %35 to i64
%37 = mul i64 %36, 533584415748
%38 = and i64 %37, 2207646876160
store i64 %38, i64* %8
%39 = load i64, i64* %4
%40 = lshr i64 %39, 32
%41 = trunc i64 %40 to i32
%42 = and i32 %41, 8126464
%43 = add i32 %42, 262144
%44 = load i64, i64* %3
%45 = lshr i64 %44, 32
%46 = trunc i64 %45 to i32
%47 = and i32 %43, %46
store i32 %47, i32* %6
%48 = load i32, i32* %6
%49 = load i32, i32* %6
%50 = lshr i32 %49, 8
%51 = sub i32 %48, %50
%52 = and i32 %51, 8126464
%53 = zext i32 %52 to i64
%54 = shl i64 %53, 32
%55 = load i64, i64* %8
%56 = or i64 %55, %54
store i64 %56, i64* %8
%57 = load i64, i64* %4
%58 = trunc i64 %57 to i32
%59 = and i32 %58, 270548992
%60 = load i64, i64* %4
%61 = lshr i64 %60, 32
%62 = trunc i64 %61 to i32
%63 = and i32 %62, 1032
%64 = add i32 %59, %63
%65 = mul i32 %64, 16843009
%66 = lshr i32 %65, 25
%67 = add i32 %66, 2
%68 = load i64, i64* %3
%69 = trunc i64 %68 to i32
%70 = and i32 %69, 270549120
%71 = load i64, i64* %3
%72 = lshr i64 %71, 32
%73 = trunc i64 %72 to i32
%74 = and i32 %73, 8
%75 = add i32 %70, %74
%76 = mul i32 %75, 16843009
%77 = lshr i32 %76, 25
%78 = and i32 %67, %77
store i32 %78, i32* %7
%79 = load i32, i32* %7
%80 = zext i32 %79 to i64
%81 = mul i64 %80, 2138386301184
%82 = and i64 %81, 4432676798464
%83 = load i64, i64* %8
%84 = or i64 %83, %82
store i64 %84, i64* %8
%85 = load i64, i64* %8
ret i64 %85
}

LLVM IR (-O2):
define i64 @flip_B7(i64 %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = shl i32 %3, 3
%5 = and i32 %4, 269488128
%6 = lshr i64 %1, 32
%7 = trunc i64 %6 to i32
%8 = lshr i32 %7, 1
%9 = and i32 %8, 257
%10 = or i32 %9, %5
%11 = mul i32 %10, 134480385
%12 = lshr i32 %11, 24
%13 = add nuw nsw i32 %12, 4
%14 = trunc i64 %0 to i32
%15 = shl i32 %14, 3
%16 = and i32 %15, 269488144
%17 = lshr i64 %0, 32
%18 = trunc i64 %17 to i32
%19 = lshr i32 %18, 1
%20 = and i32 %19, 1
%21 = or i32 %20, %16
%22 = mul i32 %21, 134480385
%23 = lshr i32 %22, 24
%24 = and i32 %13, %23
%25 = zext i32 %24 to i64
%26 = mul nuw nsw i64 %25, 533584415748
%27 = and i64 %26, 2207646876160
%28 = and i32 %7, 8126464
%29 = add nuw nsw i32 %28, 262144
%30 = and i32 %29, %18
%31 = lshr exact i32 %30, 8
%32 = sub nsw i32 %30, %31
%33 = and i32 %32, 8126464
%34 = zext i32 %33 to i64
%35 = shl nuw nsw i64 %34, 32
%36 = or i64 %27, %35
%37 = and i32 %3, 270548992
%38 = and i32 %7, 1032
%39 = or i32 %38, %37
%40 = mul i32 %39, 16843009
%41 = lshr i32 %40, 25
%42 = add nuw nsw i32 %41, 2
%43 = and i32 %14, 270549120
%44 = and i32 %18, 8
%45 = or i32 %44, %43
%46 = mul i32 %45, 16843009
%47 = lshr i32 %46, 25
%48 = and i32 %42, %47
%49 = zext i32 %48 to i64
%50 = mul nuw nsw i64 %49, 2138386301184
%51 = and i64 %50, 4432676798464
%52 = or i64 %36, %51
ret i64 %52
}