void test_simdlen() {
  int i;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen(
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen()
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen(,
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen(, )
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen 4)
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen(4
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen(4,
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen(4, )
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen(4)
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen(4 4)
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen(4, , 4)
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen(4)
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen(4, 8)
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen(2.5)
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen(foo())
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen(-5)
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen(0)
  for (i = 0; i < 16; ++i)
    ;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd simdlen(5 - 5)
  for (i = 0; i < 16; ++i)
    ;
}


x86 assembly (clang, -O0):
<test_simdlen>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1128 <test_simdlen+0x28>
jmp    111a <test_simdlen+0x1a>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <test_simdlen+0xb>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    114c <test_simdlen+0x4c>
jmp    113e <test_simdlen+0x3e>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    112f <test_simdlen+0x2f>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1170 <test_simdlen+0x70>
jmp    1162 <test_simdlen+0x62>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1153 <test_simdlen+0x53>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1194 <test_simdlen+0x94>
jmp    1186 <test_simdlen+0x86>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1177 <test_simdlen+0x77>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    11b8 <test_simdlen+0xb8>
jmp    11aa <test_simdlen+0xaa>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    119b <test_simdlen+0x9b>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    11dc <test_simdlen+0xdc>
jmp    11ce <test_simdlen+0xce>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    11bf <test_simdlen+0xbf>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1200 <test_simdlen+0x100>
jmp    11f2 <test_simdlen+0xf2>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    11e3 <test_simdlen+0xe3>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1224 <test_simdlen+0x124>
jmp    1216 <test_simdlen+0x116>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1207 <test_simdlen+0x107>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1248 <test_simdlen+0x148>
jmp    123a <test_simdlen+0x13a>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    122b <test_simdlen+0x12b>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    126c <test_simdlen+0x16c>
jmp    125e <test_simdlen+0x15e>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    124f <test_simdlen+0x14f>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1290 <test_simdlen+0x190>
jmp    1282 <test_simdlen+0x182>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1273 <test_simdlen+0x173>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    12b4 <test_simdlen+0x1b4>
jmp    12a6 <test_simdlen+0x1a6>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1297 <test_simdlen+0x197>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    12d8 <test_simdlen+0x1d8>
jmp    12ca <test_simdlen+0x1ca>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    12bb <test_simdlen+0x1bb>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    12fc <test_simdlen+0x1fc>
jmp    12ee <test_simdlen+0x1ee>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    12df <test_simdlen+0x1df>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1320 <test_simdlen+0x220>
jmp    1312 <test_simdlen+0x212>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1303 <test_simdlen+0x203>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1344 <test_simdlen+0x244>
jmp    1336 <test_simdlen+0x236>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1327 <test_simdlen+0x227>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1368 <test_simdlen+0x268>
jmp    135a <test_simdlen+0x25a>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    134b <test_simdlen+0x24b>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    138c <test_simdlen+0x28c>
jmp    137e <test_simdlen+0x27e>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    136f <test_simdlen+0x26f>
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    13b0 <test_simdlen+0x2b0>
jmp    13a2 <test_simdlen+0x2a2>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1393 <test_simdlen+0x293>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_simdlen>:
ret

LLVM IR (-O0):
define void @test_simdlen() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %6, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 16
br i1 %4, label %5, label %9
5: ; preds = %2
br label %6
6: ; preds = %5
%7 = load i32, i32* %1
%8 = add nsw i32 %7, 1
store i32 %8, i32* %1
br label %2
9: ; preds = %2
store i32 0, i32* %1
br label %10
10: ; preds = %14, %9
%11 = load i32, i32* %1
%12 = icmp slt i32 %11, 16
br i1 %12, label %13, label %17
13: ; preds = %10
br label %14
14: ; preds = %13
%15 = load i32, i32* %1
%16 = add nsw i32 %15, 1
store i32 %16, i32* %1
br label %10
17: ; preds = %10
store i32 0, i32* %1
br label %18
18: ; preds = %22, %17
%19 = load i32, i32* %1
%20 = icmp slt i32 %19, 16
br i1 %20, label %21, label %25
21: ; preds = %18
br label %22
22: ; preds = %21
%23 = load i32, i32* %1
%24 = add nsw i32 %23, 1
store i32 %24, i32* %1
br label %18
25: ; preds = %18
store i32 0, i32* %1
br label %26
26: ; preds = %30, %25
%27 = load i32, i32* %1
%28 = icmp slt i32 %27, 16
br i1 %28, label %29, label %33
29: ; preds = %26
br label %30
30: ; preds = %29
%31 = load i32, i32* %1
%32 = add nsw i32 %31, 1
store i32 %32, i32* %1
br label %26
33: ; preds = %26
store i32 0, i32* %1
br label %34
34: ; preds = %38, %33
%35 = load i32, i32* %1
%36 = icmp slt i32 %35, 16
br i1 %36, label %37, label %41
37: ; preds = %34
br label %38
38: ; preds = %37
%39 = load i32, i32* %1
%40 = add nsw i32 %39, 1
store i32 %40, i32* %1
br label %34
41: ; preds = %34
store i32 0, i32* %1
br label %42
42: ; preds = %46, %41
%43 = load i32, i32* %1
%44 = icmp slt i32 %43, 16
br i1 %44, label %45, label %49
45: ; preds = %42
br label %46
46: ; preds = %45
%47 = load i32, i32* %1
%48 = add nsw i32 %47, 1
store i32 %48, i32* %1
br label %42
49: ; preds = %42
store i32 0, i32* %1
br label %50
50: ; preds = %54, %49
%51 = load i32, i32* %1
%52 = icmp slt i32 %51, 16
br i1 %52, label %53, label %57
53: ; preds = %50
br label %54
54: ; preds = %53
%55 = load i32, i32* %1
%56 = add nsw i32 %55, 1
store i32 %56, i32* %1
br label %50
57: ; preds = %50
store i32 0, i32* %1
br label %58
58: ; preds = %62, %57
%59 = load i32, i32* %1
%60 = icmp slt i32 %59, 16
br i1 %60, label %61, label %65
61: ; preds = %58
br label %62
62: ; preds = %61
%63 = load i32, i32* %1
%64 = add nsw i32 %63, 1
store i32 %64, i32* %1
br label %58
65: ; preds = %58
store i32 0, i32* %1
br label %66
66: ; preds = %70, %65
%67 = load i32, i32* %1
%68 = icmp slt i32 %67, 16
br i1 %68, label %69, label %73
69: ; preds = %66
br label %70
70: ; preds = %69
%71 = load i32, i32* %1
%72 = add nsw i32 %71, 1
store i32 %72, i32* %1
br label %66
73: ; preds = %66
store i32 0, i32* %1
br label %74
74: ; preds = %78, %73
%75 = load i32, i32* %1
%76 = icmp slt i32 %75, 16
br i1 %76, label %77, label %81
77: ; preds = %74
br label %78
78: ; preds = %77
%79 = load i32, i32* %1
%80 = add nsw i32 %79, 1
store i32 %80, i32* %1
br label %74
81: ; preds = %74
store i32 0, i32* %1
br label %82
82: ; preds = %86, %81
%83 = load i32, i32* %1
%84 = icmp slt i32 %83, 16
br i1 %84, label %85, label %89
85: ; preds = %82
br label %86
86: ; preds = %85
%87 = load i32, i32* %1
%88 = add nsw i32 %87, 1
store i32 %88, i32* %1
br label %82
89: ; preds = %82
store i32 0, i32* %1
br label %90
90: ; preds = %94, %89
%91 = load i32, i32* %1
%92 = icmp slt i32 %91, 16
br i1 %92, label %93, label %97
93: ; preds = %90
br label %94
94: ; preds = %93
%95 = load i32, i32* %1
%96 = add nsw i32 %95, 1
store i32 %96, i32* %1
br label %90
97: ; preds = %90
store i32 0, i32* %1
br label %98
98: ; preds = %102, %97
%99 = load i32, i32* %1
%100 = icmp slt i32 %99, 16
br i1 %100, label %101, label %105
101: ; preds = %98
br label %102
102: ; preds = %101
%103 = load i32, i32* %1
%104 = add nsw i32 %103, 1
store i32 %104, i32* %1
br label %98
105: ; preds = %98
store i32 0, i32* %1
br label %106
106: ; preds = %110, %105
%107 = load i32, i32* %1
%108 = icmp slt i32 %107, 16
br i1 %108, label %109, label %113
109: ; preds = %106
br label %110
110: ; preds = %109
%111 = load i32, i32* %1
%112 = add nsw i32 %111, 1
store i32 %112, i32* %1
br label %106
113: ; preds = %106
store i32 0, i32* %1
br label %114
114: ; preds = %118, %113
%115 = load i32, i32* %1
%116 = icmp slt i32 %115, 16
br i1 %116, label %117, label %121
117: ; preds = %114
br label %118
118: ; preds = %117
%119 = load i32, i32* %1
%120 = add nsw i32 %119, 1
store i32 %120, i32* %1
br label %114
121: ; preds = %114
store i32 0, i32* %1
br label %122
122: ; preds = %126, %121
%123 = load i32, i32* %1
%124 = icmp slt i32 %123, 16
br i1 %124, label %125, label %129
125: ; preds = %122
br label %126
126: ; preds = %125
%127 = load i32, i32* %1
%128 = add nsw i32 %127, 1
store i32 %128, i32* %1
br label %122
129: ; preds = %122
store i32 0, i32* %1
br label %130
130: ; preds = %134, %129
%131 = load i32, i32* %1
%132 = icmp slt i32 %131, 16
br i1 %132, label %133, label %137
133: ; preds = %130
br label %134
134: ; preds = %133
%135 = load i32, i32* %1
%136 = add nsw i32 %135, 1
store i32 %136, i32* %1
br label %130
137: ; preds = %130
store i32 0, i32* %1
br label %138
138: ; preds = %142, %137
%139 = load i32, i32* %1
%140 = icmp slt i32 %139, 16
br i1 %140, label %141, label %145
141: ; preds = %138
br label %142
142: ; preds = %141
%143 = load i32, i32* %1
%144 = add nsw i32 %143, 1
store i32 %144, i32* %1
br label %138
145: ; preds = %138
store i32 0, i32* %1
br label %146
146: ; preds = %150, %145
%147 = load i32, i32* %1
%148 = icmp slt i32 %147, 16
br i1 %148, label %149, label %153
149: ; preds = %146
br label %150
150: ; preds = %149
%151 = load i32, i32* %1
%152 = add nsw i32 %151, 1
store i32 %152, i32* %1
br label %146
153: ; preds = %146
ret void
}

LLVM IR (-O2):
define void @test_simdlen() {
ret void
}