xunge/DecIR huggingface dataset:
int test_imm_E9int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0xE9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E9int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0xe9,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E9int64_midword_mem>:
testb  $0xe9,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E9int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 233
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_E9int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 15269888
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int to_sudoku_num(const int row_index) { return row_index % 9; }


x86 assembly (clang, -O0):
<to_sudoku_num>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x9,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<to_sudoku_num>:
movslq %edi,%rax
imul   $0x38e38e39,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x21,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,8),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @to_sudoku_num(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 9
ret i32 %4
}

LLVM IR (-O2):
define i32 @to_sudoku_num(i32 %0) {
%2 = srem i32 %0, 9
ret i32 %2
}
/* Type definitions */
typedef scalar_t__ int32_t;

/* Variables and functions */
int32_t prv_gte_int32_fn(int32_t a, int32_t b) { return a >= b ? -1 : 0; }


x86 assembly (clang, -O0):
<prv_gte_int32_fn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rsi
xor    %eax,%eax
mov    $0xffffffff,%ecx
cmp    %rsi,%rdx
cmovge %ecx,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<prv_gte_int32_fn>:
xor    %eax,%eax
cmp    %rsi,%rdi
setge  %al
neg    %rax
ret

LLVM IR (-O0):
define i64 @prv_gte_int32_fn(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sge i64 %5, %6
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -1, i32 0
%10 = sext i32 %9 to i64
ret i64 %10
}

LLVM IR (-O2):
define i64 @prv_gte_int32_fn(i64 %0, i64 %1) {
%3 = icmp sge i64 %0, %1
%4 = sext i1 %3 to i64
ret i64 %4
}
int check_frame_size(int frame_sz) { return (!(frame_sz % sizeof(float))); }


x86 assembly (clang, -O0):
<check_frame_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
and    $0x3,%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_frame_size>:
xor    %eax,%eax
test   $0x3,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @check_frame_size(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = urem i64 %4, 4
%6 = icmp ne i64 %5, 0
%7 = xor i1 %6, true
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @check_frame_size(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
void ff_hevc_put_hevc_qpel_v64_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_qpel_v64_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_qpel_v64_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_qpel_v64_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_qpel_v64_12_sse4() {
ret void
}
void ff_hevc_put_hevc_qpel_h32_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_qpel_h32_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_qpel_h32_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_qpel_h32_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_qpel_h32_8_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, ...);
void func6(int a, int b, int c, int d, int x_min, int x_max) {
  printf("plot %d*x^3+%d*x^2+%d*x+%d with lines linetype 1\n", a, b, c, d);
  printf("set xrange [%d:%d]\n", x_min, x_max);
}


x86 assembly (clang, -O0):
<func6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    -0x10(%rbp),%r8d
lea    0xec0(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%esi
mov    -0x18(%rbp),%edx
lea    0xede(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func6>:
push   %rbp
push   %rbx
push   %rax
mov    %r9d,%ebx
mov    %r8d,%ebp
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
lea    0xed7(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xefb(%rip),%rdi
mov    %ebp,%esi
mov    %ebx,%edx
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [50 x i8] c"plot %d*x^3+%d*x^2+%d*x+%d with lines linetype 1\0A\00"
@.str.1 = [20 x i8] c"set xrange [%d:%d]\0A\00"
define void @func6(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = load i32, i32* %10
%17 = call i32 (i8*, i32, i32, ...) @printf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0), i32 %13, i32 %14, i32 %15, i32 %16)
%18 = load i32, i32* %11
%19 = load i32, i32* %12
%20 = call i32 (i8*, i32, i32, ...) @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0), i32 %18, i32 %19)
ret void
}

LLVM IR (-O2):
@.str = [50 x i8] c"plot %d*x^3+%d*x^2+%d*x+%d with lines linetype 1\0A\00"
@.str.1 = [20 x i8] c"set xrange [%d:%d]\0A\00"
define void @func6(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = tail call i32 (i8*, i32, i32, ...) @printf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1, i32 %2, i32 %3)
%8 = tail call i32 (i8*, i32, i32, ...) @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0), i32 %4, i32 %5)
ret void
}
void WDC_CommInit(void) {}


x86 assembly (clang, -O0):
<WDC_CommInit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WDC_CommInit>:
ret

LLVM IR (-O0):
define void @WDC_CommInit() {
ret void
}

LLVM IR (-O2):
define void @WDC_CommInit() {
ret void
}
void rop3_6_0_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = *D ^ S;
  stk2 = ~stk2;
  stk1 = T | stk2;
  stk1 = ~stk1;
  *D = (stk1 & S) | (stk1 & (~T)) | (T & (~S) & *D);
}


x86 assembly (clang, -O0):
<rop3_6_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
movzbl -0xb(%rbp),%ecx
movzbl -0xa(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
movzbl -0xa(%rbp),%ecx
movzbl -0x9(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
mov    -0x8(%rbp),%rdx
movzbl (%rdx),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_6_0_1>:
mov    (%rdi),%al
mov    %eax,%ecx
xor    %sil,%cl
not    %sil
and    %dl,%sil
not    %dl
and    %cl,%dl
and    %al,%sil
or     %dl,%sil
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_6_0_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = xor i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %8
%16 = load i8, i8* %8
%17 = zext i8 %16 to i32
%18 = xor i32 %17, -1
%19 = trunc i32 %18 to i8
store i8 %19, i8* %8
%20 = load i8, i8* %6
%21 = zext i8 %20 to i32
%22 = load i8, i8* %8
%23 = zext i8 %22 to i32
%24 = or i32 %21, %23
%25 = trunc i32 %24 to i8
store i8 %25, i8* %7
%26 = load i8, i8* %7
%27 = zext i8 %26 to i32
%28 = xor i32 %27, -1
%29 = trunc i32 %28 to i8
store i8 %29, i8* %7
%30 = load i8, i8* %7
%31 = zext i8 %30 to i32
%32 = load i8, i8* %5
%33 = zext i8 %32 to i32
%34 = and i32 %31, %33
%35 = load i8, i8* %7
%36 = zext i8 %35 to i32
%37 = load i8, i8* %6
%38 = zext i8 %37 to i32
%39 = xor i32 %38, -1
%40 = and i32 %36, %39
%41 = or i32 %34, %40
%42 = load i8, i8* %6
%43 = zext i8 %42 to i32
%44 = load i8, i8* %5
%45 = zext i8 %44 to i32
%46 = xor i32 %45, -1
%47 = and i32 %43, %46
%48 = load i8*, i8** %4
%49 = load i8, i8* %48
%50 = zext i8 %49 to i32
%51 = and i32 %47, %50
%52 = or i32 %41, %51
%53 = trunc i32 %52 to i8
%54 = load i8*, i8** %4
store i8 %53, i8* %54
ret void
}

LLVM IR (-O2):
define void @rop3_6_0_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %4, %1
%6 = xor i8 %2, -1
%7 = and i8 %5, %6
%8 = xor i8 %1, -1
%9 = and i8 %8, %2
%10 = and i8 %9, %4
%11 = or i8 %7, %10
store i8 %11, i8* %0
ret void
}
/* Variables and functions */
int getline(char *, int);
int htoi(char *);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int n, len;
  char s[1000];
  while ((len = getline(s, 1000)) > 0) {
    n = htoi(s);
    printf("%d\n", n);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x400,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x400(%rbp),%rdi
mov    $0x3e8,%esi
call   1050 <getline@plt>
mov    %eax,-0xc(%rbp)
cmp    $0x0,%eax
jle    1182 <main+0x52>
lea    -0x400(%rbp),%rdi
call   1040 <htoi@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xe88(%rip),%rdi
call   1030 <printf@plt>
jmp    1142 <main+0x12>
xor    %eax,%eax
add    $0x400,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
sub    $0x3e8,%rsp
mov    %rsp,%rdi
mov    $0x3e8,%esi
call   1050 <getline@plt>
test   %eax,%eax
jle    1183 <main+0x53>
mov    %rsp,%rbx
lea    0xeab(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nop
mov    %rbx,%rdi
call   1040 <htoi@plt>
mov    %r14,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x3e8,%esi
call   1050 <getline@plt>
test   %eax,%eax
jg     1160 <main+0x30>
xor    %eax,%eax
add    $0x3e8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca [1000 x i8]
store i32 0, i32* %1
br label %5
5: ; preds = %9, %0
%6 = getelementptr inbounds [1000 x i8], [1000 x i8]* %4, i64 0, i64 0
%7 = call i32 @getline(i8* %6, i32 1000)
store i32 %7, i32* %3
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %5
%10 = getelementptr inbounds [1000 x i8], [1000 x i8]* %4, i64 0, i64 0
%11 = call i32 @htoi(i8* %10)
store i32 %11, i32* %2
%12 = load i32, i32* %2
%13 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %12)
br label %5
14: ; preds = %5
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca [1000 x i8]
%2 = getelementptr inbounds [1000 x i8], [1000 x i8]* %1, i64 0, i64 0
%3 = call i32 @getline(i8* %2, i32 1000)
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %10
5: ; preds = %0, %5
%6 = call i32 @htoi(i8* %2)
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = call i32 @getline(i8* %2, i32 1000)
%9 = icmp sgt i32 %8, 0
br i1 %9, label %5, label %10
10: ; preds = %5, %0
ret i32 0
}
void toggle_rx_led(void) {}


x86 assembly (clang, -O0):
<toggle_rx_led>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toggle_rx_led>:
ret

LLVM IR (-O0):
define void @toggle_rx_led() {
ret void
}

LLVM IR (-O2):
define void @toggle_rx_led() {
ret void
}
/* Variables and functions */
double dsfmt_gv_genrand_open_close();
double genrand_open_close(void) { return dsfmt_gv_genrand_open_close(); }


x86 assembly (clang, -O0):
<genrand_open_close>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <dsfmt_gv_genrand_open_close@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<genrand_open_close>:
xor    %eax,%eax
jmp    1030 <dsfmt_gv_genrand_open_close@plt>

LLVM IR (-O0):
define double @genrand_open_close() {
%1 = call double (...) @dsfmt_gv_genrand_open_close()
ret double %1
}

LLVM IR (-O2):
define double @genrand_open_close() {
%1 = tail call double (...) @dsfmt_gv_genrand_open_close()
ret double %1
}
void RTLogDefaultInstance(void) {}


x86 assembly (clang, -O0):
<RTLogDefaultInstance>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTLogDefaultInstance>:
ret

LLVM IR (-O0):
define void @RTLogDefaultInstance() {
ret void
}

LLVM IR (-O2):
define void @RTLogDefaultInstance() {
ret void
}
/* Variables and functions */
int busy_pages_open();
int /*<<< orphan*/ cache_status_close();
int cache_status_open();
int cc_cache_init(void) {
  int ret = 0;
  ret = cache_status_open();
  if (ret < 0) {
    return ret;
  }
  ret = busy_pages_open();
  if (ret < 0) {
    cache_status_close();
  }
  return ret;
}


x86 assembly (clang, -O0):
<cc_cache_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <cache_status_open@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    115e <cc_cache_init+0x2e>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    117f <cc_cache_init+0x4f>
mov    $0x0,%al
call   1050 <busy_pages_open@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1179 <cc_cache_init+0x49>
mov    $0x0,%al
call   1040 <cache_status_close@plt>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cc_cache_init>:
push   %rbx
xor    %eax,%eax
call   1030 <cache_status_open@plt>
test   %eax,%eax
js     1152 <cc_cache_init+0x22>
xor    %eax,%eax
call   1050 <busy_pages_open@plt>
mov    %eax,%ebx
test   %eax,%eax
jns    1154 <cc_cache_init+0x24>
xor    %eax,%eax
call   1040 <cache_status_close@plt>
jmp    1154 <cc_cache_init+0x24>
mov    %eax,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @cc_cache_init() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %2
%3 = call i32 (...) @cache_status_open()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = load i32, i32* %2
store i32 %7, i32* %1
br label %16
8: ; preds = %0
%9 = call i32 (...) @busy_pages_open()
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = icmp slt i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = call i32 (...) @cache_status_close()
br label %14
14: ; preds = %12, %8
%15 = load i32, i32* %2
store i32 %15, i32* %1
br label %16
16: ; preds = %14, %6
%17 = load i32, i32* %1
ret i32 %17
}

LLVM IR (-O2):
define i32 @cc_cache_init() {
%1 = tail call i32 (...) @cache_status_open()
%2 = icmp slt i32 %1, 0
br i1 %2, label %8, label %3
3: ; preds = %0
%4 = tail call i32 (...) @busy_pages_open()
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 (...) @cache_status_close()
br label %8
8: ; preds = %3, %6, %0
%9 = phi i32 [ %1, %0 ], [ %4, %6 ], [ %4, %3 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0x59() {
  Assert_real((iscntrl(89) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              450, ("iscntrl should be 0 for Y"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0x59>:
push   %rbp
mov    %rsp,%rbp
mov    $0x59,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x1c2,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0x59>:
push   %rax
mov    $0x59,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x1c2,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for Y\00"
define void @t_iscntrl_0x59() {
%1 = call i64 @iscntrl(i32 89)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 450, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for Y\00"
define void @t_iscntrl_0x59() {
%1 = tail call i64 @iscntrl(i32 89)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 450, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ *next(char *, int *, char *);
int /*<<< orphan*/ printf(char *, char *);
int scan(char *text) {
  int ti = 0;
  char token[100];
  while (next(text, &ti, token) != NULL) {
    printf("%s|", token);
  }
}


x86 assembly (clang, -O0):
<scan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x80(%rbp),%rdx
lea    -0x14(%rbp),%rsi
call   1040 <next@plt>
cmp    $0x0,%rax
je     1166 <scan+0x46>
lea    -0x80(%rbp),%rsi
lea    0xea4(%rip),%rdi
call   1030 <printf@plt>
jmp    1136 <scan+0x16>
mov    -0x4(%rbp),%eax
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scan>:
push   %r15
push   %r14
push   %r12
push   %rbx
sub    $0x78,%rsp
mov    %rdi,%r15
movl   $0x0,0xc(%rsp)
lea    0xc(%rsp),%rsi
lea    0x10(%rsp),%rdx
call   1040 <next@plt>
test   %rax,%rax
je     117e <scan+0x5e>
lea    0xeaf(%rip),%r14
lea    0x10(%rsp),%rbx
lea    0xc(%rsp),%r12
nopl   0x0(%rax,%rax,1)
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
mov    %r15,%rdi
mov    %r12,%rsi
mov    %rbx,%rdx
call   1040 <next@plt>
test   %rax,%rax
jne    1160 <scan+0x40>
add    $0x78,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s|\00"
define i32 @scan(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
%5 = alloca [100 x i8]
store i8* %0, i8** %3
store i32 0, i32* %4
br label %6
6: ; preds = %11, %1
%7 = load i8*, i8** %3
%8 = getelementptr inbounds [100 x i8], [100 x i8]* %5, i64 0, i64 0
%9 = call i32* @next(i8* %7, i32* %4, i8* %8)
%10 = icmp ne i32* %9, null
br i1 %10, label %11, label %14
11: ; preds = %6
%12 = getelementptr inbounds [100 x i8], [100 x i8]* %5, i64 0, i64 0
%13 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %12)
br label %6
14: ; preds = %6
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s|\00"
define i32 @scan(i8* %0) {
%2 = alloca i32
%3 = alloca [100 x i8]
%4 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%5 = getelementptr inbounds [100 x i8], [100 x i8]* %3, i64 0, i64 0
%6 = call i32* @next(i8* %0, i32* %2, i8* %5)
%7 = icmp eq i32* %6, null
br i1 %7, label %12, label %8
8: ; preds = %1, %8
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %5)
%10 = call i32* @next(i8* %0, i32* %2, i8* %5)
%11 = icmp eq i32* %10, null
br i1 %11, label %12, label %8
12: ; preds = %8, %1
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int CalculateIndexSize(char index_char) {
  if (index_char >= '0' && index_char <= '9') {
    return 10;
  } else if (index_char >= 'A' && index_char <= 'z') {
    return 26;
  } else {
    printf("Error");
    return -1;
  }
}


x86 assembly (clang, -O0):
<CalculateIndexSize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1144 <CalculateIndexSize+0x34>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jg     1144 <CalculateIndexSize+0x34>
movl   $0xa,-0x4(%rbp)
jmp    117d <CalculateIndexSize+0x6d>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     116a <CalculateIndexSize+0x5a>
movsbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
jg     116a <CalculateIndexSize+0x5a>
movl   $0x1a,-0x4(%rbp)
jmp    117d <CalculateIndexSize+0x6d>
lea    0xe8f(%rip),%rdi
call   1030 <printf@plt>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CalculateIndexSize>:
lea    -0x30(%rdi),%ecx
mov    $0xa,%eax
cmp    $0xa,%cl
jb     1142 <CalculateIndexSize+0x32>
add    $0xbf,%dil
mov    $0x1a,%eax
cmp    $0x3a,%dil
jb     1142 <CalculateIndexSize+0x32>
push   %rax
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
mov    $0xffffffff,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
@.str = [6 x i8] c"Error\00"
define i32 @CalculateIndexSize(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 10, i32* %2
br label %23
12: ; preds = %7, %1
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = icmp sge i32 %14, 65
br i1 %15, label %16, label %21
16: ; preds = %12
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = icmp sle i32 %18, 122
br i1 %19, label %20, label %21
20: ; preds = %16
store i32 26, i32* %2
br label %23
21: ; preds = %16, %12
%22 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %2
br label %23
23: ; preds = %21, %20, %11
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
@.str = [6 x i8] c"Error\00"
define i32 @CalculateIndexSize(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = add i8 %0, -65
%6 = icmp ult i8 %5, 58
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %4, %1, %7
%10 = phi i32 [ -1, %7 ], [ 10, %1 ], [ 26, %4 ]
ret i32 %10
}
/* Variables and functions */
char *strncpy(char *dest, const char *src, int count) {
  int d0, d1, d2, d3;
  __asm__ __volatile__("1:\tdecl %2\n\t"
                       "js 2f\n\t"
                       "lodsb\n\t"
                       "stosb\n\t"
                       "testb %%al,%%al\n\t"
                       "jne 1b\n\t"
                       "rep\n\t"
                       "stosb\n"
                       "2:"
                       : "=&S"(d0), "=&D"(d1), "=&c"(d2), "=&a"(d3)
                       : "0"(src), "1"(dest), "2"(count)
                       : "memory");
  return dest;
}


x86 assembly (clang, -O0):
<strncpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%ecx
dec    %ecx
js     112e <strncpy+0x2e>
lods   %ds:(%rsi),%al
stos   %al,%es:(%rdi)
test   %al,%al
jne    111a <strncpy+0x1a>
rep stos %al,%es:(%rdi)
mov    %esi,%edx
mov    %edx,-0x18(%rbp)
mov    %edi,%edx
mov    %edx,-0x1c(%rbp)
mov    %ecx,-0x20(%rbp)
mov    %eax,-0x24(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncpy>:
mov    %edx,%ecx
mov    %rdi,%rdx
dec    %ecx
js     1111 <strncpy+0x11>
lods   %ds:(%rsi),%al
stos   %al,%es:(%rdi)
test   %al,%al
jne    1105 <strncpy+0x5>
rep stos %al,%es:(%rdi)
mov    %rdx,%rax
ret

LLVM IR (-O0):
define i8* @strncpy(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%11 = load i8*, i8** %5
%12 = load i8*, i8** %4
%13 = load i32, i32* %6
%14 = call { i8*, i8*, i32, i32 } asm sideeffect "1:\09decl $2\0A\09js 2f\0A\09lodsb\0A\09stosb\0A\09testb %al,%al\0A\09jne 1b\0A\09rep\0A\09stosb\0A2:", "=&{si},=&{di},=&{cx},=&{ax},0,1,2,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %11, i8* %12, i32 %13)
%15 = extractvalue { i8*, i8*, i32, i32 } %14, 0
%16 = extractvalue { i8*, i8*, i32, i32 } %14, 1
%17 = extractvalue { i8*, i8*, i32, i32 } %14, 2
%18 = extractvalue { i8*, i8*, i32, i32 } %14, 3
%19 = ptrtoint i8* %15 to i64
%20 = trunc i64 %19 to i32
store i32 %20, i32* %7
%21 = ptrtoint i8* %16 to i64
%22 = trunc i64 %21 to i32
store i32 %22, i32* %8
store i32 %17, i32* %9
store i32 %18, i32* %10
%23 = load i8*, i8** %4
ret i8* %23
}

LLVM IR (-O2):
define i8* @strncpy(i8* returned %0, i8* %1, i32 %2) {
%4 = tail call { i8*, i8*, i32, i32 } asm sideeffect "1:\09decl $2\0A\09js 2f\0A\09lodsb\0A\09stosb\0A\09testb %al,%al\0A\09jne 1b\0A\09rep\0A\09stosb\0A2:", "=&{si},=&{di},=&{cx},=&{ax},0,1,2,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %1, i8* %0, i32 %2)
ret i8* %0
}
/* Type definitions */
struct tms {
  int dummy;
};
typedef int /*<<< orphan*/ clock_t;

/* Variables and functions */
int /*<<< orphan*/ times(struct tms *);
clock_t system_get_clock_ticks() {
  struct tms buf;
  return times(&buf);
}


x86 assembly (clang, -O0):
<system_get_clock_ticks>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
call   1030 <times@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<system_get_clock_ticks>:
push   %rax
mov    %rsp,%rdi
call   1030 <times@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.tms = type { i32 }
define i32 @system_get_clock_ticks() {
%1 = alloca %struct.tms
%2 = call i32 @times(%struct.tms* %1)
ret i32 %2
}

LLVM IR (-O2):
%struct.tms = type { i32 }
define i32 @system_get_clock_ticks() {
%1 = alloca %struct.tms
%2 = bitcast %struct.tms* %1 to i8*
%3 = call i32 @times(%struct.tms* %1)
ret i32 %3
}
/* Variables and functions */
double cos(double);
double exp(double);
double trans(double x) { return exp(x) * cos(x) - 1.2; }


x86 assembly (clang, -O0):
<trans>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <exp@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <cos@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  0xea6(%rip),%xmm1
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trans>:
sub    $0x18,%rsp
movsd  %xmm0,0x8(%rsp)
call   1030 <exp@plt>
movsd  %xmm0,0x10(%rsp)
movsd  0x8(%rsp),%xmm0
call   1040 <cos@plt>
mulsd  0x10(%rsp),%xmm0
addsd  0xeb2(%rip),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @trans(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @exp(double %3)
%5 = load double, double* %2
%6 = call double @cos(double %5)
%7 = call double @llvm.fmuladd.f64(double %4, double %6, double -1.200000e+00)
ret double %7
}

LLVM IR (-O2):
define double @trans(double %0) {
%2 = tail call double @exp(double %0)
%3 = tail call double @cos(double %0)
%4 = tail call double @llvm.fmuladd.f64(double %2, double %3, double -1.200000e+00)
ret double %4
}
void llong_to_double(double *dest, long long *src) { *dest = (double)*src; }


x86 assembly (clang, -O0):
<llong_to_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cvtsi2sdq (%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<llong_to_double>:
cvtsi2sdq (%rsi),%xmm0
movsd  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @llong_to_double(double* %0, i64* %1) {
%3 = alloca double*
%4 = alloca i64*
store double* %0, double** %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
%6 = load i64, i64* %5
%7 = sitofp i64 %6 to double
%8 = load double*, double** %3
store double %7, double* %8
ret void
}

LLVM IR (-O2):
define void @llong_to_double(double* nocapture writeonly %0, i64* nocapture %1) {
%3 = load i64, i64* %1
%4 = sitofp i64 %3 to double
store double %4, double* %0
ret void
}
void *vpassv(void *p) { return p; }


x86 assembly (clang, -O0):
<vpassv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vpassv>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @vpassv(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @vpassv(i8* readnone returned %0) {
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ delay(int);
int /*<<< orphan*/ mbus_remote_register_write(int, int, int);
void pmu_set_sleep_radio() {
  mbus_remote_register_write(0x6, 0x15,
                             ((0 << 19) | (0 << 18) | (0 << 17) | (3 << 14) |
                              (0 << 13) | (0xF << 9) | (0xF << 5) | (3)));
  delay(100);
  mbus_remote_register_write(0x6, 0x15,
                             ((0 << 19) | (0 << 18) | (0 << 17) | (3 << 14) |
                              (0 << 13) | (0xF << 9) | (0xF << 5) | (3)));
  delay(100);
  mbus_remote_register_write(
      0x6, 0x17, ((3 << 14) | (0 << 13) | (0xF << 9) | (2 << 5) | (1)));
  delay(100);
}


x86 assembly (clang, -O0):
<pmu_set_sleep_radio>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
mov    $0x15,%esi
mov    $0xdfe3,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
call   1030 <delay@plt>
mov    $0x6,%edi
mov    $0x15,%esi
mov    $0xdfe3,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
call   1030 <delay@plt>
mov    $0x6,%edi
mov    $0x17,%esi
mov    $0xde41,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
call   1030 <delay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmu_set_sleep_radio>:
push   %rax
mov    $0x6,%edi
mov    $0x15,%esi
mov    $0xdfe3,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
call   1030 <delay@plt>
mov    $0x6,%edi
mov    $0x15,%esi
mov    $0xdfe3,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
call   1030 <delay@plt>
mov    $0x6,%edi
mov    $0x17,%esi
mov    $0xde41,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
pop    %rax
jmp    1030 <delay@plt>

LLVM IR (-O0):
define void @pmu_set_sleep_radio() {
%1 = call i32 @mbus_remote_register_write(i32 6, i32 21, i32 57315)
%2 = call i32 @delay(i32 100)
%3 = call i32 @mbus_remote_register_write(i32 6, i32 21, i32 57315)
%4 = call i32 @delay(i32 100)
%5 = call i32 @mbus_remote_register_write(i32 6, i32 23, i32 56897)
%6 = call i32 @delay(i32 100)
ret void
}

LLVM IR (-O2):
define void @pmu_set_sleep_radio() {
%1 = tail call i32 @mbus_remote_register_write(i32 6, i32 21, i32 57315)
%2 = tail call i32 @delay(i32 100)
%3 = tail call i32 @mbus_remote_register_write(i32 6, i32 21, i32 57315)
%4 = tail call i32 @delay(i32 100)
%5 = tail call i32 @mbus_remote_register_write(i32 6, i32 23, i32 56897)
%6 = tail call i32 @delay(i32 100)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delay(int);
int /*<<< orphan*/ mbus_remote_register_write(int, int, int);
void pmu_adc_disable() {
  mbus_remote_register_write(0x8, 0x3B,
                             ((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) |
                              (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7) |
                              (1 << 8) | (1 << 9) | (1 << 10) | (0 << 11) |
                              (0 << 12) | (0 << 13) | (1 << 14) | (1 << 15) |
                              (1 << 16) | (1 << 17) | (1 << 18) | (1 << 19)));
  delay(200);
}


x86 assembly (clang, -O0):
<pmu_adc_disable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8,%edi
mov    $0x3b,%esi
mov    $0xfc7ff,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0xc8,%edi
call   1030 <delay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmu_adc_disable>:
push   %rax
mov    $0x8,%edi
mov    $0x3b,%esi
mov    $0xfc7ff,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0xc8,%edi
pop    %rax
jmp    1030 <delay@plt>

LLVM IR (-O0):
define void @pmu_adc_disable() {
%1 = call i32 @mbus_remote_register_write(i32 8, i32 59, i32 1034239)
%2 = call i32 @delay(i32 200)
ret void
}

LLVM IR (-O2):
define void @pmu_adc_disable() {
%1 = tail call i32 @mbus_remote_register_write(i32 8, i32 59, i32 1034239)
%2 = tail call i32 @delay(i32 200)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
int /*<<< orphan*/ memset(char *, int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
void clean(char *dst) {
  if (dst) {
    memset(dst, 0, strlen(dst));
    free(dst);
  }
}


x86 assembly (clang, -O0):
<clean>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     116e <clean+0x3e>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%edx
xor    %esi,%esi
call   1050 <memset@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clean>:
test   %rdi,%rdi
je     1153 <clean+0x23>
push   %rbx
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    %rbx,%rdi
xor    %esi,%esi
mov    %eax,%edx
call   1050 <memset@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @clean(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = load i8*, i8** %2
%8 = call i32 @strlen(i8* %7)
%9 = call i32 @memset(i8* %6, i32 0, i32 %8)
%10 = load i8*, i8** %2
%11 = call i32 @free(i8* %10)
br label %12
12: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @clean(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i32 @strlen(i8* %0)
%5 = tail call i32 @memset(i8* %0, i32 0, i32 %4)
%6 = tail call i32 @free(i8* %0)
br label %7
7: ; preds = %3, %1
ret void
}
void dj_set_nosound(char flag) {}


x86 assembly (clang, -O0):
<dj_set_nosound>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dj_set_nosound>:
ret

LLVM IR (-O0):
define void @dj_set_nosound(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
ret void
}

LLVM IR (-O2):
define void @dj_set_nosound(i8 signext %0) {
ret void
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int quaddobl_scale_system(int mode, double *cff) {
  int fail, *b;
  fail = _ada_use_c2phc(592, &mode, b, cff);
  return fail;
}


x86 assembly (clang, -O0):
<quaddobl_scale_system>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x20(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    $0x250,%edi
lea    -0x4(%rbp),%rsi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quaddobl_scale_system>:
push   %rax
mov    %rsi,%rcx
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x250,%edi
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @quaddobl_scale_system(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca double*
%5 = alloca i32
%6 = alloca i32*
store i32 %0, i32* %3
store double* %1, double** %4
%7 = load i32*, i32** %6
%8 = load double*, double** %4
%9 = call i32 @_ada_use_c2phc(i32 592, i32* %3, i32* %7, double* %8)
store i32 %9, i32* %5
%10 = load i32, i32* %5
ret i32 %10
}

LLVM IR (-O2):
define i32 @quaddobl_scale_system(i32 %0, double* %1) {
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 @_ada_use_c2phc(i32 592, i32* %3, i32* undef, double* %1)
ret i32 %4
}
/* Variables and functions */
int strlen(char *);
size_t remove_new_line(char *str) {
  int lenght = strlen(str);
  if (str[lenght - 1] == '\n') {
    str[lenght - 1] = '\0';
  }
  return lenght;
}


x86 assembly (clang, -O0):
<remove_new_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0xa,%eax
jne    1153 <remove_new_line+0x43>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
movslq -0xc(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_new_line>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
cltq
cmpb   $0xa,-0x1(%rax,%rbx,1)
jne    1127 <remove_new_line+0x17>
movb   $0x0,-0x1(%rbx,%rax,1)
pop    %rbx
ret

LLVM IR (-O0):
define i64 @remove_new_line(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
store i32 %5, i32* %3
%6 = load i8*, i8** %2
%7 = load i32, i32* %3
%8 = sub nsw i32 %7, 1
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %6, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 10
br i1 %13, label %14, label %20
14: ; preds = %1
%15 = load i8*, i8** %2
%16 = load i32, i32* %3
%17 = sub nsw i32 %16, 1
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %15, i64 %18
store i8 0, i8* %19
br label %20
20: ; preds = %14, %1
%21 = load i32, i32* %3
%22 = sext i32 %21 to i64
ret i64 %22
}

LLVM IR (-O2):
define i64 @remove_new_line(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, -1
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 10
br i1 %7, label %8, label %9
8: ; preds = %1
store i8 0, i8* %5
br label %9
9: ; preds = %8, %1
%10 = sext i32 %2 to i64
ret i64 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
scalar_t__ ftello(int /*<<< orphan*/ *);
long ftell(FILE *fp) {
  long pos;
  pos = (long)ftello(fp);
  return (pos);
}


x86 assembly (clang, -O0):
<ftell>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ftello@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ftell>:
jmp    1030 <ftello@plt>

LLVM IR (-O0):
define i64 @ftell(i32* %0) {
%2 = alloca i32*
%3 = alloca i64
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i64 @ftello(i32* %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
define i64 @ftell(i32* nocapture %0) {
%2 = tail call i64 @ftello(i32* %0)
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ die(char *);
void usage(void) {
  die("Usage: build [-b] bootsect setup system [rootdev] [> image]");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <die@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <die@plt>

LLVM IR (-O0):
@.str = [60 x i8] c"Usage: build [-b] bootsect setup system [rootdev] [> image]\00"
define void @usage() {
%1 = call i32 @die(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [60 x i8] c"Usage: build [-b] bootsect setup system [rootdev] [> image]\00"
define void @usage() {
%1 = tail call i32 @die(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str, i64 0, i64 0))
ret void
}
void _M2_MathLib0_init(__attribute__((unused)) int argc,
                       __attribute__((unused)) char *argv[]) {}


x86 assembly (clang, -O0):
<_M2_MathLib0_init>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_M2_MathLib0_init>:
ret

LLVM IR (-O0):
define void @_M2_MathLib0_init(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret void
}

LLVM IR (-O2):
define void @_M2_MathLib0_init(i32 %0, i8** nocapture %1) {
ret void
}
float valor_pagamento(float x, float y) {
  int result = 0;
  if (y == 0) {
    return x;
  } else {
    result = x + (x * 0.03) + x * (0.01 * y);
    return result;
  }
}


x86 assembly (clang, -O0):
<valor_pagamento>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jne    113b <valor_pagamento+0x3b>
jp     113b <valor_pagamento+0x3b>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1194 <valor_pagamento+0x94>
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movss  -0x8(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
movsd  0xeb3(%rip),%xmm2
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movss  -0xc(%rbp),%xmm2
cvtss2sd %xmm2,%xmm3
movsd  0xe89(%rip),%xmm2
mulsd  %xmm3,%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x10(%rbp)
cvtsi2ssl -0x10(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<valor_pagamento>:
xorps  %xmm2,%xmm2
ucomiss %xmm2,%xmm1
jne    110b <valor_pagamento+0xb>
jp     110b <valor_pagamento+0xb>
ret
cvtss2sd %xmm0,%xmm0
movsd  0xee9(%rip),%xmm2
mulsd  %xmm0,%xmm2
addsd  %xmm0,%xmm2
cvtss2sd %xmm1,%xmm1
mulsd  0xedd(%rip),%xmm1
mulsd  %xmm0,%xmm1
addsd  %xmm2,%xmm1
cvttpd2dq %xmm1,%xmm0
cvtdq2ps %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @valor_pagamento(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
%6 = alloca i32
store float %0, float* %4
store float %1, float* %5
store i32 0, i32* %6
%7 = load float, float* %5
%8 = fcmp oeq float %7, 0.000000e+00
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load float, float* %4
store float %10, float* %3
br label %26
11: ; preds = %2
%12 = load float, float* %4
%13 = fpext float %12 to double
%14 = load float, float* %4
%15 = fpext float %14 to double
%16 = call double @llvm.fmuladd.f64(double %15, double 3.000000e-02, double %13)
%17 = load float, float* %4
%18 = fpext float %17 to double
%19 = load float, float* %5
%20 = fpext float %19 to double
%21 = fmul double 1.000000e-02, %20
%22 = call double @llvm.fmuladd.f64(double %18, double %21, double %16)
%23 = fptosi double %22 to i32
store i32 %23, i32* %6
%24 = load i32, i32* %6
%25 = sitofp i32 %24 to float
store float %25, float* %3
br label %26
26: ; preds = %11, %9
%27 = load float, float* %3
ret float %27
}

LLVM IR (-O2):
define float @valor_pagamento(float %0, float %1) {
%3 = fcmp oeq float %1, 0.000000e+00
br i1 %3, label %12, label %4
4: ; preds = %2
%5 = fpext float %0 to double
%6 = tail call double @llvm.fmuladd.f64(double %5, double 3.000000e-02, double %5)
%7 = fpext float %1 to double
%8 = fmul double %7, 1.000000e-02
%9 = tail call double @llvm.fmuladd.f64(double %5, double %8, double %6)
%10 = fptosi double %9 to i32
%11 = sitofp i32 %10 to float
br label %12
12: ; preds = %2, %4
%13 = phi float [ %11, %4 ], [ %0, %2 ]
ret float %13
}
void a_or_l(volatile void *p, long v) { *(long *)p |= v; }


x86 assembly (clang, -O0):
<a_or_l>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
or     (%rax),%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_or_l>:
or     %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @a_or_l(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i64*
%8 = load i64, i64* %7
%9 = or i64 %8, %5
store i64 %9, i64* %7
ret void
}

LLVM IR (-O2):
define void @a_or_l(i8* nocapture %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
%4 = load i64, i64* %3
%5 = or i64 %4, %1
store i64 %5, i64* %3
ret void
}
/* Variables and functions */
unsigned int sleep(unsigned int);
int /*<<< orphan*/ unix_error(char *);
unsigned int Sleep(unsigned int secs) {
  unsigned int rc;
  if ((rc = sleep(secs)) != 0)
    unix_error("Sleep error");
  return rc;
}


x86 assembly (clang, -O0):
<Sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <sleep@plt>
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
je     114b <Sleep+0x2b>
lea    0xeba(%rip),%rdi
call   1030 <unix_error@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sleep>:
push   %rbx
call   1040 <sleep@plt>
mov    %eax,%ebx
test   %eax,%eax
je     1138 <Sleep+0x18>
lea    0xecd(%rip),%rdi
call   1030 <unix_error@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"Sleep error\00"
define i32 @Sleep(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @sleep(i32 %4)
store i32 %5, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @unix_error(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %1
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
@.str = [12 x i8] c"Sleep error\00"
define i32 @Sleep(i32 %0) {
%2 = tail call i32 @sleep(i32 %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @unix_error(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i32 %2
}
/* Type definitions */
struct timespec {
  int dummy;
};
struct mmsghdr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int recvmmsg(int fd, struct mmsghdr *vmessages, unsigned int vlen, int flags,
             const struct timespec *tmo) {
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<recvmmsg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<recvmmsg>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.mmsghdr = type { i32 }
%struct.timespec = type { i32 }
@ENOSYS = global i32 0
define i32 @recvmmsg(i32 %0, %struct.mmsghdr* %1, i32 %2, i32 %3, %struct.timespec* %4) {
%6 = alloca i32
%7 = alloca %struct.mmsghdr*
%8 = alloca i32
%9 = alloca i32
%10 = alloca %struct.timespec*
store i32 %0, i32* %6
store %struct.mmsghdr* %1, %struct.mmsghdr** %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store %struct.timespec* %4, %struct.timespec** %10
%11 = load i32, i32* @ENOSYS
%12 = call i32 @__set_errno(i32 %11)
ret i32 -1
}

LLVM IR (-O2):
%struct.mmsghdr = type { i32 }
%struct.timespec = type { i32 }
@ENOSYS = global i32 0
define i32 @recvmmsg(i32 %0, %struct.mmsghdr* nocapture readnone %1, i32 %2, i32 %3, %struct.timespec* nocapture readnone %4) {
%6 = load i32, i32* @ENOSYS
%7 = tail call i32 @__set_errno(i32 %6)
ret i32 -1
}