xunge/DecIR huggingface dataset:
void free_2darray(unsigned char **array, int n) {
  int i;
  for (i = 0; i < n; i++)
    free(array[i]);
  free(array);
}


x86 assembly (clang, -O0):
<free_2darray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1151 <free_2darray+0x41>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <free_2darray+0x16>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_2darray>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
test   %esi,%esi
jle    1142 <free_2darray+0x32>
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <free@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <free_2darray+0x20>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_2darray(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
%5 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %16, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i8**, i8*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8*, i8** %11, i64 %13
%15 = load i8*, i8** %14
br label %16
16: ; preds = %10
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 1
store i32 %18, i32* %5
br label %6
19: ; preds = %6
%20 = load i8**, i8*** %3
%21 = bitcast i8** %20 to i8*
ret void
}

LLVM IR (-O2):
define void @free_2darray(i8** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %12
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %10, %6 ]
%8 = getelementptr inbounds i8*, i8** %0, i64 %7
%9 = load i8*, i8** %8
tail call void @free(i8* %9)
%10 = add nuw nsw i64 %7, 1
%11 = icmp eq i64 %10, %5
br i1 %11, label %12, label %6
12: ; preds = %6, %2
%13 = bitcast i8** %0 to i8*
tail call void @free(i8* %13)
ret void
}
/* Variables and functions */
int wr_test(char const *, int, int, int /*<<< orphan*/, int);
int test_wr_short_exist(const char *file) {
  return wr_test(file, 7, 26, 0, 0777);
}


x86 assembly (clang, -O0):
<test_wr_short_exist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x7,%esi
mov    $0x1a,%edx
xor    %ecx,%ecx
mov    $0x1ff,%r8d
call   1030 <wr_test@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_wr_short_exist>:
mov    $0x7,%esi
mov    $0x1a,%edx
xor    %ecx,%ecx
mov    $0x1ff,%r8d
jmp    1030 <wr_test@plt>

LLVM IR (-O0):
define i32 @test_wr_short_exist(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @wr_test(i8* %3, i32 7, i32 26, i32 0, i32 511)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test_wr_short_exist(i8* %0) {
%2 = tail call i32 @wr_test(i8* %0, i32 7, i32 26, i32 0, i32 511)
ret i32 %2
}
void free_string_list(char **vals) {
  int i = 0;
  for (i = 0; vals[i]; i++) {
    free(vals[i]);
  }
  free(vals);
}


x86 assembly (clang, -O0):
<free_string_list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     115c <free_string_list+0x4c>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112a <free_string_list+0x1a>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_string_list>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1141 <free_string_list+0x31>
lea    0x8(%r14),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
call   1030 <free@plt>
mov    (%rbx),%rdi
add    $0x8,%rbx
test   %rdi,%rdi
jne    1130 <free_string_list+0x20>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_string_list(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
store i32 0, i32* %3
br label %4
4: ; preds = %17, %1
%5 = load i8**, i8*** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8*, i8** %5, i64 %7
%9 = load i8*, i8** %8
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %20
11: ; preds = %4
%12 = load i8**, i8*** %2
%13 = load i32, i32* %3
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8*, i8** %12, i64 %14
%16 = load i8*, i8** %15
br label %17
17: ; preds = %11
%18 = load i32, i32* %3
%19 = add nsw i32 %18, 1
store i32 %19, i32* %3
br label %4
20: ; preds = %4
%21 = load i8**, i8*** %2
%22 = bitcast i8** %21 to i8*
ret void
}

LLVM IR (-O2):
define void @free_string_list(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = icmp eq i8* %2, null
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %7, %4 ], [ 0, %1 ]
%6 = phi i8* [ %9, %4 ], [ %2, %1 ]
tail call void @free(i8* %6)
%7 = add nuw nsw i64 %5, 1
%8 = getelementptr inbounds i8*, i8** %0, i64 %7
%9 = load i8*, i8** %8
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = bitcast i8** %0 to i8*
tail call void @free(i8* %12)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
struct lldp_tlv {
  int dummy;
};

/* Variables and functions */
struct lldp_tlv *tlvpop(uint8_t *buffer) {
  return NULL;
}


x86 assembly (clang, -O0):
<tlvpop>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tlvpop>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.lldp_tlv = type { i32 }
define %struct.lldp_tlv* @tlvpop(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret %struct.lldp_tlv* null
}

LLVM IR (-O2):
%struct.lldp_tlv = type { i32 }
define noalias %struct.lldp_tlv* @tlvpop(i32* nocapture readnone %0) {
ret %struct.lldp_tlv* null
}
void gg_change_info_request_free(struct gg_change_info_request *r) {}


x86 assembly (clang, -O0):
<gg_change_info_request_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gg_change_info_request_free>:
ret

LLVM IR (-O0):
%struct.gg_change_info_request = type opaque
define void @gg_change_info_request_free(%struct.gg_change_info_request* %0) {
%2 = alloca %struct.gg_change_info_request*
store %struct.gg_change_info_request* %0, %struct.gg_change_info_request** %2
ret void
}

LLVM IR (-O2):
%struct.gg_change_info_request = type opaque
define void @gg_change_info_request_free(%struct.gg_change_info_request* nocapture %0) {
ret void
}
void graph_display_progressive_draw_to_gtk_screen(struct graph_display *self,
                                                  struct bio_graph *g,
                                                  void *widget, int *argc,
                                                  char ***argv) {}


x86 assembly (clang, -O0):
<graph_display_progressive_draw_to_gtk_screen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<graph_display_progressive_draw_to_gtk_screen>:
ret

LLVM IR (-O0):
%struct.graph_display = type opaque
%struct.bio_graph = type opaque
define void @graph_display_progressive_draw_to_gtk_screen(%struct.graph_display* %0, %struct.bio_graph* %1, i8* %2, i32* %3, i8*** %4) {
%6 = alloca %struct.graph_display*
%7 = alloca %struct.bio_graph*
%8 = alloca i8*
%9 = alloca i32*
%10 = alloca i8***
store %struct.graph_display* %0, %struct.graph_display** %6
store %struct.bio_graph* %1, %struct.bio_graph** %7
store i8* %2, i8** %8
store i32* %3, i32** %9
store i8*** %4, i8**** %10
ret void
}

LLVM IR (-O2):
%struct.graph_display = type opaque
%struct.bio_graph = type opaque
define void @graph_display_progressive_draw_to_gtk_screen(%struct.graph_display* nocapture %0, %struct.bio_graph* nocapture %1, i8* nocapture %2, i32* nocapture %3, i8*** nocapture %4) {
ret void
}
/* Variables and functions */
char *getenv(char const *);
char *_tgetenv(const char *varname) { return getenv(varname); }


x86 assembly (clang, -O0):
<_tgetenv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getenv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_tgetenv>:
jmp    1030 <getenv@plt>

LLVM IR (-O0):
define i8* @_tgetenv(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @getenv(i8* %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @_tgetenv(i8* nocapture %0) {
%2 = tail call i8* @getenv(i8* %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ _IO(int, int);
int /*<<< orphan*/ ioctl(int, int /*<<< orphan*/, int);
void cbmarch_iec_release(int f, int line) { ioctl(f, _IO(0xcb, 14), line); }


x86 assembly (clang, -O0):
<cbmarch_iec_release>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0xcb,%edi
mov    $0xe,%esi
call   1030 <_IO@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%esi
mov    -0x8(%rbp),%edx
call   1040 <ioctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbmarch_iec_release>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0xcb,%edi
mov    $0xe,%esi
call   1030 <_IO@plt>
mov    %ebp,%edi
mov    %eax,%esi
mov    %ebx,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <ioctl@plt>

LLVM IR (-O0):
define void @cbmarch_iec_release(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @_IO(i32 203, i32 14)
%7 = load i32, i32* %4
%8 = call i32 @ioctl(i32 %5, i32 %6, i32 %7)
ret void
}

LLVM IR (-O2):
define void @cbmarch_iec_release(i32 %0, i32 %1) {
%3 = tail call i32 @_IO(i32 203, i32 14)
%4 = tail call i32 @ioctl(i32 %0, i32 %3, i32 %1)
ret void
}
const char *get_gearbox_level_position_string(int gear) {
  static const char *gear_string[] = {"  P\n", "  R\n", "  N\n", "  D\n"};
  return gear_string[gear & 0b11];
}


x86 assembly (clang, -O0):
<get_gearbox_level_position_string>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x3,%eax
movslq %eax,%rcx
lea    0x2f19(%rip),%rax
mov    (%rax,%rcx,8),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_gearbox_level_position_string>:
and    $0x3,%edi
lea    0xef6(%rip),%rcx
movslq (%rcx,%rdi,4),%rax
add    %rcx,%rax
ret

LLVM IR (-O0):
@get_gearbox_level_position_string.gear_string = internal global [4 x i8*] [i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i32 0, i32 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i32 0, i32 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.3, i32 0, i32 0)]
@.str = [5 x i8] c" P\0A\00"
@.str.1 = [5 x i8] c" R\0A\00"
@.str.2 = [5 x i8] c" N\0A\00"
@.str.3 = [5 x i8] c" D\0A\00"
define i8* @get_gearbox_level_position_string(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 3
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds [4 x i8*], [4 x i8*]* @get_gearbox_level_position_string.gear_string, i64 0, i64 %5
%7 = load i8*, i8** %6
ret i8* %7
}

LLVM IR (-O2):
@reltable.get_gearbox_level_position_string = internal unnamed_addr constant [4 x i32] [i32 trunc (i64 sub (i64 ptrtoint ([5 x i8]* @.str to i64), i64 ptrtoint ([4 x i32]* @reltable.get_gearbox_level_position_string to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([5 x i8]* @.str.1 to i64), i64 ptrtoint ([4 x i32]* @reltable.get_gearbox_level_position_string to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([5 x i8]* @.str.2 to i64), i64 ptrtoint ([4 x i32]* @reltable.get_gearbox_level_position_string to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([5 x i8]* @.str.3 to i64), i64 ptrtoint ([4 x i32]* @reltable.get_gearbox_level_position_string to i64)) to i32)]
@.str = [5 x i8] c" P\0A\00"
@.str.1 = [5 x i8] c" R\0A\00"
@.str.2 = [5 x i8] c" N\0A\00"
@.str.3 = [5 x i8] c" D\0A\00"
define i8* @get_gearbox_level_position_string(i32 %0) {
%2 = and i32 %0, 3
%3 = zext i32 %2 to i64
%4 = shl i64 %3, 2
%5 = call i8* @llvm.load.relative.i64(i8* bitcast ([4 x i32]* @reltable.get_gearbox_level_position_string to i8*), i64 %4)
ret i8* %5
}
int isatty(int fd) { return fd >= 0 && fd <= 2; }


x86 assembly (clang, -O0):
<isatty>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <isatty+0x20>
cmpl   $0x2,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isatty>:
xor    %eax,%eax
cmp    $0x3,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isatty(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 2
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isatty(i32 %0) {
%2 = icmp ult i32 %0, 3
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ dequeueList();
int /*<<< orphan*/ peekList();
scalar_t__ strcmp(int /*<<< orphan*/, char *);
int tab() {
  if (strcmp(peekList(), "\t") != 0) {
    return 0;
  }
  dequeueList();
  return 1;
}


x86 assembly (clang, -O0):
<tab>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <peekList@plt>
mov    %eax,%edi
lea    0xeb8(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
je     1163 <tab+0x33>
movl   $0x0,-0x4(%rbp)
jmp    1171 <tab+0x41>
mov    $0x0,%al
call   1050 <dequeueList@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tab>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <peekList@plt>
lea    0xebf(%rip),%rsi
mov    %eax,%edi
call   1030 <strcmp@plt>
test   %rax,%rax
jne    1159 <tab+0x29>
xor    %eax,%eax
call   1050 <dequeueList@plt>
mov    $0x1,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\09\00"
define i32 @tab() {
%1 = alloca i32
%2 = call i32 (...) @peekList()
%3 = call i64 @strcmp(i32 %2, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %0
store i32 0, i32* %1
br label %8
6: ; preds = %0
%7 = call i32 (...) @dequeueList()
store i32 1, i32* %1
br label %8
8: ; preds = %6, %5
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
@.str = [2 x i8] c"\09\00"
define i32 @tab() {
%1 = tail call i32 (...) @peekList()
%2 = tail call i64 @strcmp(i32 %1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = tail call i32 (...) @dequeueList()
br label %6
6: ; preds = %0, %4
%7 = phi i32 [ 1, %4 ], [ 0, %0 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ CtpRoutingEngineP__0__CtpInfo__recomputeRoutes();
void CtpForwardingEngineP__0__CtpInfo__recomputeRoutes(void) {
  CtpRoutingEngineP__0__CtpInfo__recomputeRoutes();
}


x86 assembly (clang, -O0):
<CtpForwardingEngineP__0__CtpInfo__recomputeRoutes>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <CtpRoutingEngineP__0__CtpInfo__recomputeRoutes@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CtpForwardingEngineP__0__CtpInfo__recomputeRoutes>:
xor    %eax,%eax
jmp    1030 <CtpRoutingEngineP__0__CtpInfo__recomputeRoutes@plt>

LLVM IR (-O0):
define void @CtpForwardingEngineP__0__CtpInfo__recomputeRoutes() {
%1 = call i32 (...) @CtpRoutingEngineP__0__CtpInfo__recomputeRoutes()
ret void
}

LLVM IR (-O2):
define void @CtpForwardingEngineP__0__CtpInfo__recomputeRoutes() {
%1 = tail call i32 (...) @CtpRoutingEngineP__0__CtpInfo__recomputeRoutes()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __coverity_free__(void *);
int /*<<< orphan*/ __coverity_panic__();
void isc__mem_put(void *mem, void *ptr, unsigned int size, const char *file,
                  unsigned int line) {
  if (!mem)
    __coverity_panic__();
  __coverity_free__(ptr);
}


x86 assembly (clang, -O0):
<isc__mem_put>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    114d <isc__mem_put+0x2d>
mov    $0x0,%al
call   1030 <__coverity_panic__@plt>
mov    -0x10(%rbp),%rdi
call   1040 <__coverity_free__@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isc__mem_put>:
push   %rbx
mov    %rsi,%rbx
test   %rdi,%rdi
jne    1130 <isc__mem_put+0x10>
xor    %eax,%eax
call   1030 <__coverity_panic__@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <__coverity_free__@plt>

LLVM IR (-O0):
define void @isc__mem_put(i8* %0, i8* %1, i32 %2, i8* %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i32 %2, i32* %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%11 = load i8*, i8** %6
%12 = icmp ne i8* %11, null
br i1 %12, label %15, label %13
13: ; preds = %5
%14 = call i32 (...) @__coverity_panic__()
br label %15
15: ; preds = %13, %5
%16 = load i8*, i8** %7
%17 = call i32 @__coverity_free__(i8* %16)
ret void
}

LLVM IR (-O2):
define void @isc__mem_put(i8* readnone %0, i8* %1, i32 %2, i8* nocapture readnone %3, i32 %4) {
%6 = icmp eq i8* %0, null
br i1 %6, label %7, label %9
7: ; preds = %5
%8 = tail call i32 (...) @__coverity_panic__()
br label %9
9: ; preds = %7, %5
%10 = tail call i32 @__coverity_free__(i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0xae() {
  Assert_real((isupper(174) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              875, ("isupper should be 0 for 0xae"));
}


x86 assembly (clang, -O0):
<t_isupper_0xae>:
push   %rbp
mov    %rsp,%rbp
mov    $0xae,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x36b,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0xae>:
push   %rax
mov    $0xae,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x36b,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0xae\00"
define void @t_isupper_0xae() {
%1 = call i64 @isupper(i32 174)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 875, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0xae\00"
define void @t_isupper_0xae() {
%1 = tail call i64 @isupper(i32 174)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 875, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cgincind(char *, char *, int);
void cginc2iw(void) { cgincind("bx", "add", 1); }


x86 assembly (clang, -O0):
<cginc2iw>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee1(%rip),%rsi
mov    $0x1,%edx
call   1030 <cgincind@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cginc2iw>:
lea    0xee9(%rip),%rdi
lea    0xee5(%rip),%rsi
mov    $0x1,%edx
jmp    1030 <cgincind@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"bx\00"
@.str.1 = [4 x i8] c"add\00"
define void @cginc2iw() {
%1 = call i32 @cgincind(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"bx\00"
@.str.1 = [4 x i8] c"add\00"
define void @cginc2iw() {
%1 = tail call i32 @cgincind(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 1)
ret void
}
int cton(int c) { return (c - '0'); }


x86 assembly (clang, -O0):
<cton>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x30,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cton>:
lea    -0x30(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @cton(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 %3, 48
ret i32 %4
}

LLVM IR (-O2):
define i32 @cton(i32 %0) {
%2 = add nsw i32 %0, -48
ret i32 %2
}
m_test(label) int label;
{
  needbrack("(");
  expression();
  needbrack(")");
  testjump(label);
}


x86 assembly (clang, -O0):
<m_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
lea    0xebe(%rip),%rdi
mov    $0x0,%al
call   1050 <needbrack@plt>
mov    $0x0,%al
call   1040 <expression@plt>
lea    0xeab(%rip),%rdi
mov    $0x0,%al
call   1050 <needbrack@plt>
mov    -0x8(%rbp),%edi
mov    $0x0,%al
call   1030 <testjump@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m_test>:
push   %rbx
mov    %edi,%ebx
lea    0xec6(%rip),%rdi
xor    %eax,%eax
call   1050 <needbrack@plt>
xor    %eax,%eax
call   1040 <expression@plt>
lea    0xeb3(%rip),%rdi
xor    %eax,%eax
call   1050 <needbrack@plt>
mov    %ebx,%edi
xor    %eax,%eax
pop    %rbx
jmp    1030 <testjump@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"(\00"
@.str.1 = [2 x i8] c")\00"
define i32 @m_test(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 (i8*, ...) bitcast (i32 (...)* @needbrack to i32 (i8*, ...)*)(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%5 = call i32 (...) @expression()
%6 = call i32 (i8*, ...) bitcast (i32 (...)* @needbrack to i32 (i8*, ...)*)(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%7 = load i32, i32* %3
%8 = call i32 (i32, ...) bitcast (i32 (...)* @testjump to i32 (i32, ...)*)(i32 %7)
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
@.str = [2 x i8] c"(\00"
@.str.1 = [2 x i8] c")\00"
define i32 @m_test(i32 %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @needbrack to i32 (i8*, ...)*)(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @expression()
%4 = tail call i32 (i8*, ...) bitcast (i32 (...)* @needbrack to i32 (i8*, ...)*)(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 (i32, ...) bitcast (i32 (...)* @testjump to i32 (i32, ...)*)(i32 %0)
ret i32 undef
}
void ktsan_thr_destroy(struct ktsan_thr_s *old) {}


x86 assembly (clang, -O0):
<ktsan_thr_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ktsan_thr_destroy>:
ret

LLVM IR (-O0):
%struct.ktsan_thr_s = type opaque
define void @ktsan_thr_destroy(%struct.ktsan_thr_s* %0) {
%2 = alloca %struct.ktsan_thr_s*
store %struct.ktsan_thr_s* %0, %struct.ktsan_thr_s** %2
ret void
}

LLVM IR (-O2):
%struct.ktsan_thr_s = type opaque
define void @ktsan_thr_destroy(%struct.ktsan_thr_s* nocapture %0) {
ret void
}
void init_status_leds(void) {}


x86 assembly (clang, -O0):
<init_status_leds>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_status_leds>:
ret

LLVM IR (-O0):
define void @init_status_leds() {
ret void
}

LLVM IR (-O2):
define void @init_status_leds() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void utarray_str_dtor(void *elt) {
  char **eltc = (char **)elt;
  if (*eltc != NULL)
    free(*eltc);
}


x86 assembly (clang, -O0):
<utarray_str_dtor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
je     113e <utarray_str_dtor+0x2e>
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<utarray_str_dtor>:
mov    (%rdi),%rdi
test   %rdi,%rdi
je     111d <utarray_str_dtor+0xd>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @utarray_str_dtor(i8* %0) {
%2 = alloca i8*
%3 = alloca i8**
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i8**
store i8** %5, i8*** %3
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %6
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %13
9: ; preds = %1
%10 = load i8**, i8*** %3
%11 = load i8*, i8** %10
%12 = call i32 @free(i8* %11)
br label %13
13: ; preds = %9, %1
ret void
}

LLVM IR (-O2):
define void @utarray_str_dtor(i8* nocapture %0) {
%2 = bitcast i8* %0 to i8**
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 @free(i8* %3)
br label %7
7: ; preds = %5, %1
ret void
}
int testWithWarning() {}


x86 assembly (clang, -O0):
<testWithWarning>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<testWithWarning>:
ret

LLVM IR (-O0):
define i32 @testWithWarning() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @testWithWarning() {
ret i32 undef
}
void handle_34(int sig) {}


x86 assembly (clang, -O0):
<handle_34>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_34>:
ret

LLVM IR (-O0):
define void @handle_34(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @handle_34(i32 %0) {
ret void
}
int hashmapIntHash(void *key) { return *((int *)key); }


x86 assembly (clang, -O0):
<hashmapIntHash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashmapIntHash>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @hashmapIntHash(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @hashmapIntHash(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
ret i32 %3
}
void report_accelerometer_data(struct ssp_data *data,
                               struct sensor_value *acc) {
  return;
}


x86 assembly (clang, -O0):
<report_accelerometer_data>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<report_accelerometer_data>:
ret

LLVM IR (-O0):
%struct.ssp_data = type opaque
%struct.sensor_value = type opaque
define void @report_accelerometer_data(%struct.ssp_data* %0, %struct.sensor_value* %1) {
%3 = alloca %struct.ssp_data*
%4 = alloca %struct.sensor_value*
store %struct.ssp_data* %0, %struct.ssp_data** %3
store %struct.sensor_value* %1, %struct.sensor_value** %4
ret void
}

LLVM IR (-O2):
%struct.ssp_data = type opaque
%struct.sensor_value = type opaque
define void @report_accelerometer_data(%struct.ssp_data* nocapture %0, %struct.sensor_value* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ uartTx(char *, int);
void lcdBoxCursorOn() { uartTx("\xFE\x0D", 2); }


x86 assembly (clang, -O0):
<lcdBoxCursorOn>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x2,%esi
call   1030 <uartTx@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcdBoxCursorOn>:
lea    0xee9(%rip),%rdi
mov    $0x2,%esi
jmp    1030 <uartTx@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"\FE\0D\00"
define void @lcdBoxCursorOn() {
%1 = call i32 @uartTx(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 2)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"\FE\0D\00"
define void @lcdBoxCursorOn() {
%1 = tail call i32 @uartTx(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 2)
ret void
}
/* Type definitions */
struct mempool {
  int dummy;
};

/* Variables and functions */
int sm_commit(struct mempool *, void *, size_t, int /*<<< orphan*/ *,
              int /*<<< orphan*/);
int sm_commit_simple(struct mempool *mp, void *addr, size_t size) {
  return sm_commit(mp, addr, size, NULL, 0);
}


x86 assembly (clang, -O0):
<sm_commit_simple>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %eax,%eax
mov    %eax,%ecx
xor    %r8d,%r8d
call   1030 <sm_commit@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sm_commit_simple>:
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <sm_commit@plt>

LLVM IR (-O0):
%struct.mempool = type { i32 }
define i32 @sm_commit_simple(%struct.mempool* %0, i8* %1, i64 %2) {
%4 = alloca %struct.mempool*
%5 = alloca i8*
%6 = alloca i64
store %struct.mempool* %0, %struct.mempool** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load %struct.mempool*, %struct.mempool** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @sm_commit(%struct.mempool* %7, i8* %8, i64 %9, i32* null, i32 0)
ret i32 %10
}

LLVM IR (-O2):
%struct.mempool = type { i32 }
define i32 @sm_commit_simple(%struct.mempool* %0, i8* %1, i64 %2) {
%4 = tail call i32 @sm_commit(%struct.mempool* %0, i8* %1, i64 %2, i32* null, i32 0)
ret i32 %4
}
int lcd_valid_mod(void) { return 0; }


x86 assembly (clang, -O0):
<lcd_valid_mod>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcd_valid_mod>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @lcd_valid_mod() {
ret i32 0
}

LLVM IR (-O2):
define i32 @lcd_valid_mod() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fn2();
void fn1(void) { fn2(); }


x86 assembly (clang, -O0):
<fn1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <fn2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn1>:
xor    %eax,%eax
jmp    1030 <fn2@plt>

LLVM IR (-O0):
define void @fn1() {
%1 = call i32 (...) @fn2()
ret void
}

LLVM IR (-O2):
define void @fn1() {
%1 = tail call i32 (...) @fn2()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ api4(int, int, int, int, int);
void draw_pixel(int sid, int x, int y, unsigned int color) {
  api4(1008, sid, x, y, (int)color);
}


x86 assembly (clang, -O0):
<draw_pixel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    -0x10(%rbp),%r8d
mov    $0x3f0,%edi
call   1030 <api4@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<draw_pixel>:
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
mov    $0x3f0,%edi
jmp    1030 <api4@plt>

LLVM IR (-O0):
define void @draw_pixel(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @api4(i32 1008, i32 %9, i32 %10, i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
define void @draw_pixel(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @api4(i32 1008, i32 %0, i32 %1, i32 %2, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void do_aligned_free(void *buf) {
  if (buf != NULL) {
    free(buf);
  }
}


x86 assembly (clang, -O0):
<do_aligned_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <do_aligned_free+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_aligned_free>:
test   %rdi,%rdi
je     111a <do_aligned_free+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @do_aligned_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @do_aligned_free(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
scalar_t__ write(int, char *, size_t);
void othello_write_mesg(int sock_descr, char *mesg, size_t msg_len) {
  if ((write(sock_descr, mesg, msg_len)) < 0) {
    perror("Error : Impossible to write message to the server ...\n");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<othello_write_mesg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <write@plt>
cmp    $0x0,%rax
jge    1173 <othello_write_mesg+0x43>
lea    0xe9c(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<othello_write_mesg>:
push   %rax
call   1030 <write@plt>
test   %rax,%rax
js     113d <othello_write_mesg+0xd>
pop    %rax
ret
lea    0xebc(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [55 x i8] c"Error : Impossible to write message to the server ...\0A\00"
define void @othello_write_mesg(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i64 @write(i32 %7, i8* %8, i64 %9)
%11 = icmp slt i64 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %3
%13 = call i32 @perror(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0))
%14 = call i32 @exit(i32 1)
unreachable
15: ; preds = %3
ret void
}

LLVM IR (-O2):
@.str = [55 x i8] c"Error : Impossible to write message to the server ...\0A\00"
define void @othello_write_mesg(i32 %0, i8* nocapture %1, i64 %2) {
%4 = tail call i64 @write(i32 %0, i8* %1, i64 %2)
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = tail call i32 @perror(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0))
%8 = tail call i32 @exit(i32 1)
unreachable
9: ; preds = %3
ret void
}
void gtk_spin_button_update() {}


x86 assembly (clang, -O0):
<gtk_spin_button_update>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_spin_button_update>:
ret

LLVM IR (-O0):
define void @gtk_spin_button_update() {
ret void
}

LLVM IR (-O2):
define void @gtk_spin_button_update() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ display_clear();
int /*<<< orphan*/ ledmat_init();
void display_init(void) {
  ledmat_init();
  display_clear();
}


x86 assembly (clang, -O0):
<display_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ledmat_init@plt>
mov    $0x0,%al
call   1040 <display_clear@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_init>:
push   %rax
xor    %eax,%eax
call   1030 <ledmat_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <display_clear@plt>

LLVM IR (-O0):
define void @display_init() {
%1 = call i32 (...) @ledmat_init()
%2 = call i32 (...) @display_clear()
ret void
}

LLVM IR (-O2):
define void @display_init() {
%1 = tail call i32 (...) @ledmat_init()
%2 = tail call i32 (...) @display_clear()
ret void
}
void error(subject, msg) char *subject, *msg;
{ message_1("Error: ", subject, msg); }


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rdi
mov    $0x0,%al
call   1030 <message_1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<error>:
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee3(%rip),%rdi
xor    %eax,%eax
jmp    1030 <message_1@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"Error: \00"
define void @error(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @message_1 to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %5, i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"Error: \00"
define void @error(i8* %0, i8* %1) {
%3 = tail call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @message_1 to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
ret void
}
void gtk_entry_set_activates_default() {}


x86 assembly (clang, -O0):
<gtk_entry_set_activates_default>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_entry_set_activates_default>:
ret

LLVM IR (-O0):
define void @gtk_entry_set_activates_default() {
ret void
}

LLVM IR (-O2):
define void @gtk_entry_set_activates_default() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mbus_remote_register_write(int, int, int);
void snail_cnt_start(void) {
  mbus_remote_register_write(0x5, 0x01, ((0 << 5) | (1 << 4) | (2 << 2) | (1)));
}


x86 assembly (clang, -O0):
<snail_cnt_start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%edi
mov    $0x1,%esi
mov    $0x19,%edx
call   1030 <mbus_remote_register_write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<snail_cnt_start>:
mov    $0x5,%edi
mov    $0x1,%esi
mov    $0x19,%edx
jmp    1030 <mbus_remote_register_write@plt>

LLVM IR (-O0):
define void @snail_cnt_start() {
%1 = call i32 @mbus_remote_register_write(i32 5, i32 1, i32 25)
ret void
}

LLVM IR (-O2):
define void @snail_cnt_start() {
%1 = tail call i32 @mbus_remote_register_write(i32 5, i32 1, i32 25)
ret void
}
/* Type definitions */
struct list_elem {
  int dummy;
};
struct list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ list_end(struct list *);
int /*<<< orphan*/ list_insert(int /*<<< orphan*/, struct list_elem *);
void list_push_back(struct list *list, struct list_elem *elem) {
  list_insert(list_end(list), elem);
}


x86 assembly (clang, -O0):
<list_push_back>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <list_end@plt>
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
call   1030 <list_insert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_push_back>:
push   %rbx
mov    %rsi,%rbx
call   1040 <list_end@plt>
mov    %eax,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <list_insert@plt>

LLVM IR (-O0):
%struct.list = type { i32 }
%struct.list_elem = type { i32 }
define void @list_push_back(%struct.list* %0, %struct.list_elem* %1) {
%3 = alloca %struct.list*
%4 = alloca %struct.list_elem*
store %struct.list* %0, %struct.list** %3
store %struct.list_elem* %1, %struct.list_elem** %4
%5 = load %struct.list*, %struct.list** %3
%6 = call i32 @list_end(%struct.list* %5)
%7 = load %struct.list_elem*, %struct.list_elem** %4
%8 = call i32 @list_insert(i32 %6, %struct.list_elem* %7)
ret void
}

LLVM IR (-O2):
%struct.list = type { i32 }
%struct.list_elem = type { i32 }
define void @list_push_back(%struct.list* %0, %struct.list_elem* %1) {
%3 = tail call i32 @list_end(%struct.list* %0)
%4 = tail call i32 @list_insert(i32 %3, %struct.list_elem* %1)
ret void
}
/* Variables and functions */
scalar_t__ CallBack2(int, void *, char *);
int UniqueName(const char *baseName, char *finalName) {
  return (int)CallBack2(22, (void *)baseName, finalName);
}


x86 assembly (clang, -O0):
<UniqueName>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0x16,%edi
call   1030 <CallBack2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UniqueName>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x16,%edi
jmp    1030 <CallBack2@plt>

LLVM IR (-O0):
define i32 @UniqueName(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i64 @CallBack2(i32 22, i8* %5, i8* %6)
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @UniqueName(i8* %0, i8* %1) {
%3 = tail call i64 @CallBack2(i32 22, i8* %0, i8* %1)
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int ksft_exit_skip(void) { exit(4); }


x86 assembly (clang, -O0):
<ksft_exit_skip>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<ksft_exit_skip>:
push   %rax
mov    $0x4,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @ksft_exit_skip() {
%1 = call i32 @exit(i32 4)
unreachable
}

LLVM IR (-O2):
define i32 @ksft_exit_skip() {
%1 = tail call i32 @exit(i32 4)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ print_hex(unsigned int);
void print_hexl(unsigned long l) {
  unsigned int i;
  i = (unsigned int)(l);
  print_hex(i);
  i = (unsigned int)(l >> 32);
  print_hex(i);
}


x86 assembly (clang, -O0):
<print_hexl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <print_hex@plt>
mov    -0x8(%rbp),%rax
shr    $0x20,%rax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <print_hex@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_hexl>:
push   %rbx
mov    %rdi,%rbx
call   1030 <print_hex@plt>
shr    $0x20,%rbx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <print_hex@plt>

LLVM IR (-O0):
define void @print_hexl(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = trunc i64 %4 to i32
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @print_hex(i32 %6)
%8 = load i64, i64* %2
%9 = lshr i64 %8, 32
%10 = trunc i64 %9 to i32
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = call i32 @print_hex(i32 %11)
ret void
}

LLVM IR (-O2):
define void @print_hexl(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = tail call i32 @print_hex(i32 %2)
%4 = lshr i64 %0, 32
%5 = trunc i64 %4 to i32
%6 = tail call i32 @print_hex(i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void usage(char *pname) {
  printf("Program \"%s\" to find smallest subsequence where amino-acid "
         "sequence has equal numbers of all AAs.\n",
         "eqaa");
  return;
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
lea    0xf39(%rip),%rsi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
lea    0xf45(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [99 x i8] c"Program \22%s\22 to find smallest subsequence where amino-acid sequence has equal numbers of all AAs.\0A\00"
@.str.1 = [5 x i8] c"eqaa\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([99 x i8], [99 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [99 x i8] c"Program \22%s\22 to find smallest subsequence where amino-acid sequence has equal numbers of all AAs.\0A\00"
@.str.1 = [5 x i8] c"eqaa\00"
define void @usage(i8* nocapture readnone %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([99 x i8], [99 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}
unsigned xrop3_72_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D ^ T;
  stk1 = S & stk2;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_72_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x10(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_72_1_0>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_72_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %7
%24 = xor i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %6
%26 = load i32, i32* %9
%27 = and i32 %25, %26
store i32 %27, i32* %8
%28 = load i32, i32* %8
%29 = load i32, i32* %6
%30 = xor i32 %29, -1
%31 = and i32 %28, %30
%32 = load i32, i32* %5
%33 = load i32, i32* %6
%34 = and i32 %32, %33
%35 = or i32 %31, %34
ret i32 %35
}

LLVM IR (-O2):
define i32 @xrop3_72_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
ret i32 %3
}
void hashstat() {}


x86 assembly (clang, -O0):
<hashstat>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashstat>:
ret

LLVM IR (-O0):
define void @hashstat() {
ret void
}

LLVM IR (-O2):
define void @hashstat() {
ret void
}
void BootPciInterruptEnable() { __asm__ __volatile__("sti"); }


x86 assembly (clang, -O0):
<BootPciInterruptEnable>:
push   %rbp
mov    %rsp,%rbp
sti
pop    %rbp
ret

x86 assembly (clang, -O2):
<BootPciInterruptEnable>:
sti
ret

LLVM IR (-O0):
define void @BootPciInterruptEnable() {
ret void
}

LLVM IR (-O2):
define void @BootPciInterruptEnable() {
tail call void asm sideeffect "sti", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
struct ct_test_stats {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct ct_test_stats *);
void ct_destroy_stats(struct ct_test_stats *stats) { free(stats); }


x86 assembly (clang, -O0):
<ct_destroy_stats>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ct_destroy_stats>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.ct_test_stats = type { i32 }
define void @ct_destroy_stats(%struct.ct_test_stats* %0) {
%2 = alloca %struct.ct_test_stats*
store %struct.ct_test_stats* %0, %struct.ct_test_stats** %2
%3 = load %struct.ct_test_stats*, %struct.ct_test_stats** %2
%4 = call i32 @free(%struct.ct_test_stats* %3)
ret void
}

LLVM IR (-O2):
%struct.ct_test_stats = type { i32 }
define void @ct_destroy_stats(%struct.ct_test_stats* nocapture %0) {
%2 = tail call i32 @free(%struct.ct_test_stats* %0)
ret void
}