xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ hardening_trigger(int /*<<< orphan*/ *, int /*<<< orphan*/,
                                     int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("I iz an exprimental speling error!\n");
  hardening_trigger(NULL, 0, NULL);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
mov    %eax,%edx
xor    %esi,%esi
mov    %rdx,%rdi
call   1040 <hardening_trigger@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
call   1040 <hardening_trigger@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [36 x i8] c"I iz an exprimental speling error!\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @hardening_trigger(i32* null, i32 0, i32* null)
ret i32 0
}

LLVM IR (-O2):
@str = [35 x i8] c"I iz an exprimental speling error!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @hardening_trigger(i32* null, i32 0, i32* null)
ret i32 0
}
/* Variables and functions */
uintptr_t mpc55xx_cache_aligned_start(const void *s) {
  return ((uintptr_t)s & ((uintptr_t)0x1f))
             ? (((uintptr_t)s & ~((uintptr_t)0x1f)) + 32)
             : (uintptr_t)s;
}


x86 assembly (clang, -O0):
<mpc55xx_cache_aligned_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x1f,%rax
cmp    $0x0,%rax
je     112f <mpc55xx_cache_aligned_start+0x2f>
mov    -0x8(%rbp),%rax
and    $0xffffffffffffffe0,%rax
add    $0x20,%rax
mov    %rax,-0x10(%rbp)
jmp    1137 <mpc55xx_cache_aligned_start+0x37>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpc55xx_cache_aligned_start>:
lea    0x20(%rdi),%rax
and    $0xffffffffffffffe0,%rax
test   $0x1f,%dil
cmove  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @mpc55xx_cache_aligned_start(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
%5 = and i64 %4, 31
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = ptrtoint i8* %8 to i64
%10 = and i64 %9, -32
%11 = add i64 %10, 32
br label %15
12: ; preds = %1
%13 = load i8*, i8** %2
%14 = ptrtoint i8* %13 to i64
br label %15
15: ; preds = %12, %7
%16 = phi i64 [ %11, %7 ], [ %14, %12 ]
ret i64 %16
}

LLVM IR (-O2):
define i64 @mpc55xx_cache_aligned_start(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = and i64 %2, 31
%4 = icmp eq i64 %3, 0
%5 = add i64 %2, 32
%6 = and i64 %5, -32
%7 = select i1 %4, i64 %2, i64 %6
ret i64 %7
}
int test_imm_F1uint8_mem(unsigned char *val) {
  return ((*val) & (-0xF1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F1uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffff0f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F1uint8_mem>:
testb  $0xf,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F1uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -241
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_F1uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 15
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef uintptr_t uint16_t;

/* Variables and functions */
void prot_to_seg_ofs(void *prot, uint16_t *seg, uint16_t *ofs) {
  *seg = ((uintptr_t)prot >> 4) & 0xFFFFUL;
  *ofs = ((uintptr_t)prot & 0xFUL);
}


x86 assembly (clang, -O0):
<prot_to_seg_ofs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rcx
shr    $0x4,%rcx
and    $0xffff,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rcx
and    $0xf,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<prot_to_seg_ofs>:
mov    %edi,%eax
shr    $0x4,%eax
movzwl %ax,%eax
mov    %rax,(%rsi)
and    $0xf,%edi
mov    %rdi,(%rdx)
ret

LLVM IR (-O0):
define void @prot_to_seg_ofs(i8* %0, i64* %1, i64* %2) {
%4 = alloca i8*
%5 = alloca i64*
%6 = alloca i64*
store i8* %0, i8** %4
store i64* %1, i64** %5
store i64* %2, i64** %6
%7 = load i8*, i8** %4
%8 = ptrtoint i8* %7 to i64
%9 = lshr i64 %8, 4
%10 = and i64 %9, 65535
%11 = load i64*, i64** %5
store i64 %10, i64* %11
%12 = load i8*, i8** %4
%13 = ptrtoint i8* %12 to i64
%14 = and i64 %13, 15
%15 = load i64*, i64** %6
store i64 %14, i64* %15
ret void
}

LLVM IR (-O2):
define void @prot_to_seg_ofs(i8* %0, i64* nocapture writeonly %1, i64* nocapture writeonly %2) {
%4 = ptrtoint i8* %0 to i64
%5 = lshr i64 %4, 4
%6 = and i64 %5, 65535
store i64 %6, i64* %1
%7 = and i64 %4, 15
store i64 %7, i64* %2
ret void
}
unsigned int json_strhash(const char *key) {
  const char *p = key;
  unsigned int h = *p;
  if (h) {
    for (p += 1; *p != '\0'; p++) {
      h = (h << 5) - h + *p;
    }
  }
  return h;
}


x86 assembly (clang, -O0):
<json_strhash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     116b <json_strhash+0x6b>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1166 <json_strhash+0x66>
mov    -0x14(%rbp),%eax
shl    $0x5,%eax
sub    -0x14(%rbp),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
add    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1130 <json_strhash+0x30>
jmp    116b <json_strhash+0x6b>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<json_strhash>:
movsbl (%rdi),%ecx
test   %ecx,%ecx
je     1138 <json_strhash+0x38>
mov    0x1(%rdi),%dl
test   %dl,%dl
je     113b <json_strhash+0x3b>
add    $0x2,%rdi
mov    %ecx,%eax
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movsbl %dl,%edx
shl    $0x5,%eax
sub    %ecx,%eax
add    %edx,%eax
movzbl (%rdi),%edx
add    $0x1,%rdi
mov    %eax,%ecx
test   %dl,%dl
jne    1120 <json_strhash+0x20>
ret
xor    %eax,%eax
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @json_strhash(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %32
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i64 1
store i8* %13, i8** %3
br label %14
14: ; preds = %28, %11
%15 = load i8*, i8** %3
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp ne i32 %17, 0
br i1 %18, label %19, label %31
19: ; preds = %14
%20 = load i32, i32* %4
%21 = shl i32 %20, 5
%22 = load i32, i32* %4
%23 = sub i32 %21, %22
%24 = load i8*, i8** %3
%25 = load i8, i8* %24
%26 = sext i8 %25 to i32
%27 = add i32 %23, %26
store i32 %27, i32* %4
br label %28
28: ; preds = %19
%29 = load i8*, i8** %3
%30 = getelementptr inbounds i8, i8* %29, i32 1
store i8* %30, i8** %3
br label %14
31: ; preds = %14
br label %32
32: ; preds = %31, %1
%33 = load i32, i32* %4
ret i32 %33
}

LLVM IR (-O2):
define i32 @json_strhash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %19, label %4
4: ; preds = %1
%5 = sext i8 %2 to i32
%6 = getelementptr inbounds i8, i8* %0, i64 1
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
br i1 %8, label %19, label %9
9: ; preds = %4, %9
%10 = phi i8 [ %17, %9 ], [ %7, %4 ]
%11 = phi i8* [ %16, %9 ], [ %6, %4 ]
%12 = phi i32 [ %15, %9 ], [ %5, %4 ]
%13 = sext i8 %10 to i32
%14 = mul i32 %12, 31
%15 = add i32 %14, %13
%16 = getelementptr inbounds i8, i8* %11, i64 1
%17 = load i8, i8* %16
%18 = icmp eq i8 %17, 0
br i1 %18, label %19, label %9
19: ; preds = %9, %4, %1
%20 = phi i32 [ 0, %1 ], [ %5, %4 ], [ %15, %9 ]
ret i32 %20
}
int fun678() { return 678; }


x86 assembly (clang, -O0):
<fun678>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun678>:
mov    $0x2a6,%eax
ret

LLVM IR (-O0):
define i32 @fun678() {
ret i32 678
}

LLVM IR (-O2):
define i32 @fun678() {
ret i32 678
}
void glutTimerFunc(unsigned int millis, void (*func)(int value), int value) {}


x86 assembly (clang, -O0):
<glutTimerFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glutTimerFunc>:
ret

LLVM IR (-O0):
define void @glutTimerFunc(i32 %0, void (i32)* %1, i32 %2) {
%4 = alloca i32
%5 = alloca void (i32)*
%6 = alloca i32
store i32 %0, i32* %4
store void (i32)* %1, void (i32)** %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
define void @glutTimerFunc(i32 %0, void (i32)* nocapture %1, i32 %2) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ wmemmove(int /*<<< orphan*/ *, int /*<<< orphan*/ *, size_t);
void uninitvar_wmemmove(void) {
  wchar_t *cs;
  wchar_t *c;
  size_t n;
  (void)wmemmove(cs, c, n);
}


x86 assembly (clang, -O0):
<uninitvar_wmemmove>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <wmemmove@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_wmemmove>:
jmp    1030 <wmemmove@plt>

LLVM IR (-O0):
define void @uninitvar_wmemmove() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i64
%4 = load i32*, i32** %1
%5 = load i32*, i32** %2
%6 = load i64, i64* %3
%7 = call i32 @wmemmove(i32* %4, i32* %5, i64 %6)
ret void
}

LLVM IR (-O2):
define void @uninitvar_wmemmove() {
%1 = tail call i32 @wmemmove(i32* undef, i32* undef, i64 undef)
ret void
}
/* Type definitions */
struct set {
  int dummy;
};

/* Variables and functions */
size_t set_query(void *, size_t, struct set *, void *, size_t);
size_t set_query_bytes(void *out, size_t nmemb, struct set *t, void *y,
                       size_t n) {
  return set_query(out, nmemb, t, y, n);
}


x86 assembly (clang, -O0):
<set_query_bytes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
call   1030 <set_query@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_query_bytes>:
jmp    1030 <set_query@plt>

LLVM IR (-O0):
%struct.set = type { i32 }
define i64 @set_query_bytes(i8* %0, i64 %1, %struct.set* %2, i8* %3, i64 %4) {
%6 = alloca i8*
%7 = alloca i64
%8 = alloca %struct.set*
%9 = alloca i8*
%10 = alloca i64
store i8* %0, i8** %6
store i64 %1, i64* %7
store %struct.set* %2, %struct.set** %8
store i8* %3, i8** %9
store i64 %4, i64* %10
%11 = load i8*, i8** %6
%12 = load i64, i64* %7
%13 = load %struct.set*, %struct.set** %8
%14 = load i8*, i8** %9
%15 = load i64, i64* %10
%16 = call i64 @set_query(i8* %11, i64 %12, %struct.set* %13, i8* %14, i64 %15)
ret i64 %16
}

LLVM IR (-O2):
%struct.set = type { i32 }
define i64 @set_query_bytes(i8* %0, i64 %1, %struct.set* %2, i8* %3, i64 %4) {
%6 = tail call i64 @set_query(i8* %0, i64 %1, %struct.set* %2, i8* %3, i64 %4)
ret i64 %6
}
/* Variables and functions */
int /*<<< orphan*/
quickSort_parallel_internal_d_i(double *, int *, int /*<<< orphan*/, int, int);
void quickSort_parallel_d_i(double *key, int *value, int lenArray,
                            int numThreads) {
  int cutoff = 10000;
  if (numThreads > 16)
    numThreads = 16;
#pragma omp parallel num_threads(numThreads)
  {
#pragma omp single nowait
    { quickSort_parallel_internal_d_i(key, value, 0, lenArray - 1, cutoff); }
  }
}


x86 assembly (clang, -O0):
<quickSort_parallel_d_i>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
movl   $0x2710,-0x1c(%rbp)
cmpl   $0x10,-0x18(%rbp)
jle    113e <quickSort_parallel_d_i+0x2e>
movl   $0x10,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%ecx
sub    $0x1,%ecx
mov    -0x1c(%rbp),%r8d
xor    %edx,%edx
call   1030 <quickSort_parallel_internal_d_i@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quickSort_parallel_d_i>:
lea    -0x1(%rdx),%ecx
xor    %edx,%edx
mov    $0x2710,%r8d
jmp    1030 <quickSort_parallel_internal_d_i@plt>

LLVM IR (-O0):
define void @quickSort_parallel_d_i(double* %0, i32* %1, i32 %2, i32 %3) {
%5 = alloca double*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store double* %0, double** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
store i32 10000, i32* %9
%10 = load i32, i32* %8
%11 = icmp sgt i32 %10, 16
br i1 %11, label %12, label %13
12: ; preds = %4
store i32 16, i32* %8
br label %13
13: ; preds = %12, %4
%14 = load double*, double** %5
%15 = load i32*, i32** %6
%16 = load i32, i32* %7
%17 = sub nsw i32 %16, 1
%18 = load i32, i32* %9
%19 = call i32 @quickSort_parallel_internal_d_i(double* %14, i32* %15, i32 0, i32 %17, i32 %18)
ret void
}

LLVM IR (-O2):
define void @quickSort_parallel_d_i(double* %0, i32* %1, i32 %2, i32 %3) {
%5 = add nsw i32 %2, -1
%6 = tail call i32 @quickSort_parallel_internal_d_i(double* %0, i32* %1, i32 0, i32 %5, i32 10000)
ret void
}
unsigned Athena_IsWithinXYWH(int p_x, int p_y, unsigned p_w, unsigned p_h,
                             int x, int y) {
  return x >= p_x && y >= p_y && x <= p_x + p_w && y <= p_y + p_h;
}


x86 assembly (clang, -O0):
<Athena_IsWithinXYWH>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x14(%rbp),%ecx
xor    %eax,%eax
cmp    -0x4(%rbp),%ecx
mov    %al,-0x19(%rbp)
jl     1161 <Athena_IsWithinXYWH+0x61>
mov    -0x18(%rbp),%ecx
xor    %eax,%eax
cmp    -0x8(%rbp),%ecx
mov    %al,-0x19(%rbp)
jl     1161 <Athena_IsWithinXYWH+0x61>
mov    -0x14(%rbp),%ecx
mov    -0x4(%rbp),%edx
add    -0xc(%rbp),%edx
xor    %eax,%eax
cmp    %edx,%ecx
mov    %al,-0x19(%rbp)
ja     1161 <Athena_IsWithinXYWH+0x61>
mov    -0x18(%rbp),%eax
mov    -0x8(%rbp),%ecx
add    -0x10(%rbp),%ecx
cmp    %ecx,%eax
setbe  %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Athena_IsWithinXYWH>:
cmp    %edi,%r8d
setge  %r10b
cmp    %esi,%r9d
setge  %al
and    %r10b,%al
add    %edi,%edx
cmp    %r8d,%edx
setae  %dl
add    %esi,%ecx
cmp    %r9d,%ecx
setae  %cl
and    %al,%dl
and    %cl,%dl
movzbl %dl,%eax
ret

LLVM IR (-O0):
define i32 @Athena_IsWithinXYWH(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = load i32, i32* %11
%14 = load i32, i32* %7
%15 = icmp sge i32 %13, %14
br i1 %15, label %16, label %32
16: ; preds = %6
%17 = load i32, i32* %12
%18 = load i32, i32* %8
%19 = icmp sge i32 %17, %18
br i1 %19, label %20, label %32
20: ; preds = %16
%21 = load i32, i32* %11
%22 = load i32, i32* %7
%23 = load i32, i32* %9
%24 = add i32 %22, %23
%25 = icmp ule i32 %21, %24
br i1 %25, label %26, label %32
26: ; preds = %20
%27 = load i32, i32* %12
%28 = load i32, i32* %8
%29 = load i32, i32* %10
%30 = add i32 %28, %29
%31 = icmp ule i32 %27, %30
br label %32
32: ; preds = %26, %20, %16, %6
%33 = phi i1 [ false, %20 ], [ false, %16 ], [ false, %6 ], [ %31, %26 ]
%34 = zext i1 %33 to i32
ret i32 %34
}

LLVM IR (-O2):
define i32 @Athena_IsWithinXYWH(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = icmp slt i32 %4, %0
%8 = icmp slt i32 %5, %1
%9 = or i1 %7, %8
%10 = add i32 %2, %0
%11 = icmp ult i32 %10, %4
%12 = or i1 %11, %9
%13 = add i32 %3, %1
%14 = icmp uge i32 %13, %5
%15 = xor i1 %12, true
%16 = and i1 %14, %15
%17 = zext i1 %16 to i32
ret i32 %17
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void unload_mod2() { printf("unload mod2\n"); }


x86 assembly (clang, -O0):
<unload_mod2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<unload_mod2>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"unload mod2\0A\00"
define void @unload_mod2() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [12 x i8] c"unload mod2\00"
define void @unload_mod2() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret void
}
int double_increasing(const void *a, const void *b) {
  return ((*(double *)a) - (*(double *)b));
}


x86 assembly (clang, -O0):
<double_increasing>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rax
subsd  (%rax),%xmm0
cvttsd2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<double_increasing>:
movsd  (%rdi),%xmm0
subsd  (%rsi),%xmm0
cvttsd2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @double_increasing(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to double*
%7 = load double, double* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to double*
%10 = load double, double* %9
%11 = fsub double %7, %10
%12 = fptosi double %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @double_increasing(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to double*
%4 = load double, double* %3
%5 = bitcast i8* %1 to double*
%6 = load double, double* %5
%7 = fsub double %4, %6
%8 = fptosi double %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ O_RDONLY;
int /*<<< orphan*/ close(int);
int open(char const *, int /*<<< orphan*/);
int file_is_openable_for_read(const char *filename) {
  int fd;
  fd = open(filename, O_RDONLY);
  if (fd < 0) {
    return 0;
  } else {
    close(fd);
    return 1;
  }
}


x86 assembly (clang, -O0):
<file_is_openable_for_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
call   1040 <open@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jge    1157 <file_is_openable_for_read+0x37>
movl   $0x0,-0x4(%rbp)
jmp    1166 <file_is_openable_for_read+0x46>
mov    -0x14(%rbp),%edi
call   1030 <close@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_is_openable_for_read>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
call   1040 <open@plt>
test   %eax,%eax
js     1141 <file_is_openable_for_read+0x21>
mov    %eax,%edi
call   1030 <close@plt>
mov    $0x1,%eax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@O_RDONLY = global i32 0
define i32 @file_is_openable_for_read(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = load i32, i32* @O_RDONLY
%7 = call i32 @open(i8* %5, i32 %6)
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 0, i32* %2
br label %14
11: ; preds = %1
%12 = load i32, i32* %4
%13 = call i32 @close(i32 %12)
store i32 1, i32* %2
br label %14
14: ; preds = %11, %10
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
@O_RDONLY = global i32 0
define i32 @file_is_openable_for_read(i8* nocapture %0) {
%2 = load i32, i32* @O_RDONLY
%3 = tail call i32 @open(i8* %0, i32 %2)
%4 = icmp slt i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 @close(i32 %3)
br label %7
7: ; preds = %1, %5
%8 = phi i32 [ 1, %5 ], [ 0, %1 ]
ret i32 %8
}
void perf_check_microcode(void) {}


x86 assembly (clang, -O0):
<perf_check_microcode>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perf_check_microcode>:
ret

LLVM IR (-O0):
define void @perf_check_microcode() {
ret void
}

LLVM IR (-O2):
define void @perf_check_microcode() {
ret void
}
int test_imm_ACint8_mem(signed char *val) {
  return ((*val) & (0xAC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_ACint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xac,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_ACint8_mem>:
testb  $0xac,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_ACint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 172
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_ACint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -84
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
long long int gcd(long long int a, long long int b) {
  if (b == 0)
    return a;
  else
    return gcd(b, a % b);
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1138 <gcd+0x28>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1152 <gcd+0x42>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rax
cqto
idivq  -0x18(%rbp)
mov    %rdx,%rsi
call   1030 <gcd@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %rdi,%rax
test   %rsi,%rsi
je     1135 <gcd+0x35>
mov    %rsi,%rdx
jmp    111d <gcd+0x1d>
nopl   (%rax)
cqto
idiv   %rcx
mov    %rcx,%rax
test   %rdx,%rdx
je     1132 <gcd+0x32>
mov    %rdx,%rcx
mov    %rax,%rdx
or     %rcx,%rdx
shr    $0x20,%rdx
jne    1110 <gcd+0x10>
xor    %edx,%edx
div    %ecx
jmp    1115 <gcd+0x15>
mov    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @gcd(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %4
store i64 %9, i64* %3
br label %16
10: ; preds = %2
%11 = load i64, i64* %5
%12 = load i64, i64* %4
%13 = load i64, i64* %5
%14 = srem i64 %12, %13
%15 = call i64 @gcd(i64 %11, i64 %14)
store i64 %15, i64* %3
br label %16
16: ; preds = %10, %8
%17 = load i64, i64* %3
ret i64 %17
}

LLVM IR (-O2):
define i64 @gcd(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %7, %4 ], [ %1, %2 ]
%6 = phi i64 [ %5, %4 ], [ %0, %2 ]
%7 = srem i64 %6, %5
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i64 [ %0, %2 ], [ %5, %4 ]
ret i64 %10
}
/* Variables and functions */
int INT_MIN;
int test2(int x) { return ~(x + INT_MIN); }


x86 assembly (clang, -O0):
<test2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ed7(%rip),%rcx
add    (%rcx),%eax
xor    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test2>:
mov    %edi,%eax
mov    0x2edf(%rip),%rcx
add    (%rcx),%eax
not    %eax
ret

LLVM IR (-O0):
@INT_MIN = global i32 0
define i32 @test2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @INT_MIN
%5 = add nsw i32 %3, %4
%6 = xor i32 %5, -1
ret i32 %6
}

LLVM IR (-O2):
@INT_MIN = global i32 0
define i32 @test2(i32 %0) {
%2 = load i32, i32* @INT_MIN
%3 = add nsw i32 %2, %0
%4 = xor i32 %3, -1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ Library_Init();
int main(void) {
  Library_Init();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <Library_Init@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <Library_Init@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @Library_Init()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @Library_Init()
ret i32 0
}
void from_libb() { printf("%s\n", __PRETTY_FUNCTION__); }


x86 assembly (clang, -O0):
<from_libb>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee2(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<from_libb>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
@__PRETTY_FUNCTION__.from_libb = [17 x i8] c"void from_libb()\00"
define void @from_libb() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @__PRETTY_FUNCTION__.from_libb, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__PRETTY_FUNCTION__.from_libb = [17 x i8] c"void from_libb()\00"
define void @from_libb() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @__PRETTY_FUNCTION__.from_libb, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
scalar_t__ EOF;
scalar_t__ putc(unsigned short, int /*<<< orphan*/ *);
int writeshort(FILE *fp, unsigned short s) {
  putc(s, fp);
  return putc(s >> 8, fp) != EOF;
}


x86 assembly (clang, -O0):
<writeshort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0xa(%rbp),%ax
mov    -0x8(%rbp),%rsi
movzwl %ax,%edi
call   1030 <putc@plt>
movzwl -0xa(%rbp),%eax
sar    $0x8,%eax
mov    -0x8(%rbp),%rsi
movzwl %ax,%edi
call   1030 <putc@plt>
mov    0x2e9b(%rip),%rcx
cmp    (%rcx),%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<writeshort>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
mov    %esi,%edi
mov    %r14,%rsi
call   1030 <putc@plt>
shr    $0x8,%ebx
mov    %ebx,%edi
mov    %r14,%rsi
call   1030 <putc@plt>
mov    0x2eb1(%rip),%rdx
xor    %ecx,%ecx
cmp    (%rdx),%rax
setne  %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@EOF = global i64 0
define i32 @writeshort(i32* %0, i16 zeroext %1) {
%3 = alloca i32*
%4 = alloca i16
store i32* %0, i32** %3
store i16 %1, i16* %4
%5 = load i16, i16* %4
%6 = load i32*, i32** %3
%7 = call i64 @putc(i16 zeroext %5, i32* %6)
%8 = load i16, i16* %4
%9 = zext i16 %8 to i32
%10 = ashr i32 %9, 8
%11 = trunc i32 %10 to i16
%12 = load i32*, i32** %3
%13 = call i64 @putc(i16 zeroext %11, i32* %12)
%14 = load i64, i64* @EOF
%15 = icmp ne i64 %13, %14
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
@EOF = global i64 0
define i32 @writeshort(i32* nocapture %0, i16 zeroext %1) {
%3 = tail call i64 @putc(i16 zeroext %1, i32* %0)
%4 = lshr i16 %1, 8
%5 = tail call i64 @putc(i16 zeroext %4, i32* %0)
%6 = load i64, i64* @EOF
%7 = icmp ne i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
void perfstats_deinit(void) {}


x86 assembly (clang, -O0):
<perfstats_deinit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perfstats_deinit>:
ret

LLVM IR (-O0):
define void @perfstats_deinit() {
ret void
}

LLVM IR (-O2):
define void @perfstats_deinit() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int /*<<< orphan*/ convert_to_signed(int /*<<< orphan*/);
int /*<<< orphan*/ read_var_restricted();
int64_t read_svar_restricted(void) {
  return convert_to_signed(read_var_restricted());
}


x86 assembly (clang, -O0):
<read_svar_restricted>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <read_var_restricted@plt>
mov    %eax,%edi
call   1040 <convert_to_signed@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_svar_restricted>:
push   %rax
xor    %eax,%eax
call   1030 <read_var_restricted@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <convert_to_signed@plt>

LLVM IR (-O0):
define i32 @read_svar_restricted() {
%1 = call i32 (...) @read_var_restricted()
%2 = call i32 @convert_to_signed(i32 %1)
ret i32 %2
}

LLVM IR (-O2):
define i32 @read_svar_restricted() {
%1 = tail call i32 (...) @read_var_restricted()
%2 = tail call i32 @convert_to_signed(i32 %1)
ret i32 %2
}
int somatorio(int N) {
  if (N == 0)
    return 0;
  return N + somatorio(N - 1);
}


x86 assembly (clang, -O0):
<somatorio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1131 <somatorio+0x21>
movl   $0x0,-0x4(%rbp)
jmp    114c <somatorio+0x3c>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <somatorio@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<somatorio>:
test   %edi,%edi
je     1119 <somatorio+0x19>
lea    -0x1(%rdi),%eax
lea    -0x2(%rdi),%ecx
imul   %rax,%rcx
imul   %eax,%eax
shr    %rcx
add    %edi,%eax
sub    %ecx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @somatorio(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %13
7: ; preds = %1
%8 = load i32, i32* %3
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 1
%11 = call i32 @somatorio(i32 %10)
%12 = add nsw i32 %8, %11
store i32 %12, i32* %2
br label %13
13: ; preds = %7, %6
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @somatorio(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %14, label %3
3: ; preds = %1
%4 = add i32 %0, -1
%5 = mul i32 %4, %4
%6 = zext i32 %4 to i33
%7 = add i32 %0, -2
%8 = zext i32 %7 to i33
%9 = mul i33 %6, %8
%10 = lshr i33 %9, 1
%11 = trunc i33 %10 to i32
%12 = add i32 %5, %0
%13 = sub i32 %12, %11
br label %14
14: ; preds = %3, %1
%15 = phi i32 [ 0, %1 ], [ %13, %3 ]
ret i32 %15
}
int dash_exit(char **args) { return 0; }


x86 assembly (clang, -O0):
<dash_exit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dash_exit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dash_exit(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @dash_exit(i8** nocapture readnone %0) {
ret i32 0
}
int fib(int n) {
  if (n < 2)
    return n;
  else
    return fib(n - 1) + fib(n - 2);
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    1130 <fib+0x20>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1153 <fib+0x43>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x2,%edi
jge    1120 <fib+0x10>
mov    %ebx,%ecx
jmp    1144 <fib+0x34>
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    -0x1(%rbx),%edi
call   1030 <fib@plt>
lea    -0x2(%rbx),%ecx
add    %eax,%ebp
cmp    $0x3,%ebx
mov    %ecx,%ebx
ja     1130 <fib+0x20>
add    %ecx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 2
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %16
8: ; preds = %1
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 1
%11 = call i32 @fib(i32 %10)
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 2
%14 = call i32 @fib(i32 %13)
%15 = add nsw i32 %11, %14
store i32 %15, i32* %2
br label %16
16: ; preds = %8, %6
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %9, %3 ]
%13 = phi i32 [ %0, %1 ], [ %8, %3 ]
%14 = add nsw i32 %13, %12
ret i32 %14
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
float btoh_float(float bigval) {
  union {
    float f;
    uint8_t b[4];
  } u1, u2;
  u1.f = bigval;
  u2.b[0] = u1.b[3];
  u2.b[1] = u1.b[2];
  u2.b[2] = u1.b[1];
  u2.b[3] = u1.b[0];
  return u2.f;
}


x86 assembly (clang, -O0):
<btoh_float>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x1c(%rbp)
movss  -0x28(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<btoh_float>:
ret

LLVM IR (-O0):
%union.anon = type { [4 x i32] }
define float @btoh_float(float %0) {
%2 = alloca float
%3 = alloca %union.anon
%4 = alloca %union.anon
store float %0, float* %2
%5 = load float, float* %2
%6 = bitcast %union.anon* %3 to float*
store float %5, float* %6
%7 = bitcast %union.anon* %3 to [4 x i32]*
%8 = getelementptr inbounds [4 x i32], [4 x i32]* %7, i64 0, i64 3
%9 = load i32, i32* %8
%10 = bitcast %union.anon* %4 to [4 x i32]*
%11 = getelementptr inbounds [4 x i32], [4 x i32]* %10, i64 0, i64 0
store i32 %9, i32* %11
%12 = bitcast %union.anon* %3 to [4 x i32]*
%13 = getelementptr inbounds [4 x i32], [4 x i32]* %12, i64 0, i64 2
%14 = load i32, i32* %13
%15 = bitcast %union.anon* %4 to [4 x i32]*
%16 = getelementptr inbounds [4 x i32], [4 x i32]* %15, i64 0, i64 1
store i32 %14, i32* %16
%17 = bitcast %union.anon* %3 to [4 x i32]*
%18 = getelementptr inbounds [4 x i32], [4 x i32]* %17, i64 0, i64 1
%19 = load i32, i32* %18
%20 = bitcast %union.anon* %4 to [4 x i32]*
%21 = getelementptr inbounds [4 x i32], [4 x i32]* %20, i64 0, i64 2
store i32 %19, i32* %21
%22 = bitcast %union.anon* %3 to [4 x i32]*
%23 = getelementptr inbounds [4 x i32], [4 x i32]* %22, i64 0, i64 0
%24 = load i32, i32* %23
%25 = bitcast %union.anon* %4 to [4 x i32]*
%26 = getelementptr inbounds [4 x i32], [4 x i32]* %25, i64 0, i64 3
store i32 %24, i32* %26
%27 = bitcast %union.anon* %4 to float*
%28 = load float, float* %27
ret float %28
}

LLVM IR (-O2):
define float @btoh_float(float %0) {
ret float undef
}
int float_equal(double a, double b) {
  return a >= (b - (0.00000005960464477539062 * 2.0)) &&
         a <= (b + (0.00000005960464477539062 * 2.0));
}


x86 assembly (clang, -O0):
<float_equal>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  0xee0(%rip),%xmm2
subsd  %xmm2,%xmm1
xor    %eax,%eax
ucomisd %xmm1,%xmm0
mov    %al,-0x11(%rbp)
jb     114f <float_equal+0x4f>
movsd  -0x8(%rbp),%xmm1
movsd  0xec0(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
setae  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<float_equal>:
movsd  0xef8(%rip),%xmm2
addsd  %xmm1,%xmm2
ucomisd %xmm2,%xmm0
setae  %al
addsd  0xeed(%rip),%xmm1
ucomisd %xmm0,%xmm1
setae  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @float_equal(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fsub double %6, 0x3E7FFFFFFFFFFFFF
%8 = fcmp oge double %5, %7
br i1 %8, label %9, label %14
9: ; preds = %2
%10 = load double, double* %3
%11 = load double, double* %4
%12 = fadd double %11, 0x3E7FFFFFFFFFFFFF
%13 = fcmp ole double %10, %12
br label %14
14: ; preds = %9, %2
%15 = phi i1 [ false, %2 ], [ %13, %9 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @float_equal(double %0, double %1) {
%3 = fadd double %1, 0xBE7FFFFFFFFFFFFF
%4 = fcmp ole double %3, %0
%5 = fadd double %1, 0x3E7FFFFFFFFFFFFF
%6 = fcmp oge double %5, %0
%7 = and i1 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
double exp(double);
double f(double x) { return 1.0 / (1.0 + exp(-x)); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
call   1030 <exp@plt>
movsd  0xeba(%rip),%xmm1
addsd  %xmm0,%xmm1
movsd  0xeae(%rip),%xmm0
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rax
xorpd  0xee7(%rip),%xmm0
call   1030 <exp@plt>
movsd  0xeea(%rip),%xmm1
addsd  %xmm1,%xmm0
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @f(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fneg double %3
%5 = call double @exp(double %4)
%6 = fadd double 1.000000e+00, %5
%7 = fdiv double 1.000000e+00, %6
ret double %7
}

LLVM IR (-O2):
define double @f(double %0) {
%2 = fneg double %0
%3 = tail call double @exp(double %2)
%4 = fadd double %3, 1.000000e+00
%5 = fdiv double 1.000000e+00, %4
ret double %5
}
char const *catGreet(void) { return "mijau!"; }


x86 assembly (clang, -O0):
<catGreet>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<catGreet>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [7 x i8] c"mijau!\00"
define i8* @catGreet() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [7 x i8] c"mijau!\00"
define i8* @catGreet() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ read_le64(int /*<<< orphan*/ const *);
uint64_t read_at_le64(const void *src, size_t offset) {
  const uint8_t *s = src;
  s += offset;
  return read_le64(s);
}


x86 assembly (clang, -O0):
<read_at_le64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
shl    $0x2,%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <read_le64@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_at_le64>:
lea    (%rdi,%rsi,4),%rdi
jmp    1030 <read_le64@plt>

LLVM IR (-O0):
define i32 @read_at_le64(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i32*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %5
%8 = load i64, i64* %4
%9 = load i32*, i32** %5
%10 = getelementptr inbounds i32, i32* %9, i64 %8
store i32* %10, i32** %5
%11 = load i32*, i32** %5
%12 = call i32 @read_le64(i32* %11)
ret i32 %12
}

LLVM IR (-O2):
define i32 @read_at_le64(i8* %0, i64 %1) {
%3 = bitcast i8* %0 to i32*
%4 = getelementptr inbounds i32, i32* %3, i64 %1
%5 = tail call i32 @read_le64(i32* %4)
ret i32 %5
}
/* Type definitions */
struct timespec {
  int /*<<< orphan*/ tv_nsec;
  int /*<<< orphan*/ tv_sec;
};

/* Variables and functions */
void stamp_cpy(struct timespec *dst, const struct timespec *src) {
  dst->tv_sec = src->tv_sec;
  dst->tv_nsec = src->tv_nsec;
}


x86 assembly (clang, -O0):
<stamp_cpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<stamp_cpy>:
mov    0x4(%rsi),%eax
mov    %eax,0x4(%rdi)
mov    (%rsi),%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
define void @stamp_cpy(%struct.timespec* %0, %struct.timespec* %1) {
%3 = alloca %struct.timespec*
%4 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load %struct.timespec*, %struct.timespec** %4
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %5, i32 0, i32 1
%7 = load i32, i32* %6
%8 = load %struct.timespec*, %struct.timespec** %3
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %8, i32 0, i32 1
store i32 %7, i32* %9
%10 = load %struct.timespec*, %struct.timespec** %4
%11 = getelementptr inbounds %struct.timespec, %struct.timespec* %10, i32 0, i32 0
%12 = load i32, i32* %11
%13 = load %struct.timespec*, %struct.timespec** %3
%14 = getelementptr inbounds %struct.timespec, %struct.timespec* %13, i32 0, i32 0
store i32 %12, i32* %14
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
define void @stamp_cpy(%struct.timespec* nocapture writeonly %0, %struct.timespec* nocapture %1) {
%3 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%4 = load i32, i32* %3
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 1
store i32 %4, i32* %5
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%7 = load i32, i32* %6
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 0
store i32 %7, i32* %8
ret void
}
/* Variables and functions */
scalar_t__ u8islowerasciii(int);
scalar_t__ u8isupperasciii(int);
int u8isasciiletteri(int n) { return u8islowerasciii(n) || u8isupperasciii(n); }


x86 assembly (clang, -O0):
<u8isasciiletteri>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <u8islowerasciii@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1157 <u8isasciiletteri+0x37>
mov    -0x4(%rbp),%edi
call   1030 <u8isupperasciii@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<u8isasciiletteri>:
push   %rbx
mov    %edi,%ebx
call   1040 <u8islowerasciii@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <u8isasciiletteri+0x17>
pop    %rbx
ret
mov    %ebx,%edi
call   1030 <u8isupperasciii@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @u8isasciiletteri(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @u8islowerasciii(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i64 @u8isupperasciii(i32 %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @u8isasciiletteri(i32 %0) {
%2 = tail call i64 @u8islowerasciii(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @u8isupperasciii(i32 %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
void ieee80211_debugfs_key_remove_beacon_default(
    struct ieee80211_sub_if_data *sdata) {}


x86 assembly (clang, -O0):
<ieee80211_debugfs_key_remove_beacon_default>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ieee80211_debugfs_key_remove_beacon_default>:
ret

LLVM IR (-O0):
%struct.ieee80211_sub_if_data = type opaque
define void @ieee80211_debugfs_key_remove_beacon_default(%struct.ieee80211_sub_if_data* %0) {
%2 = alloca %struct.ieee80211_sub_if_data*
store %struct.ieee80211_sub_if_data* %0, %struct.ieee80211_sub_if_data** %2
ret void
}

LLVM IR (-O2):
%struct.ieee80211_sub_if_data = type opaque
define void @ieee80211_debugfs_key_remove_beacon_default(%struct.ieee80211_sub_if_data* nocapture %0) {
ret void
}
void insb(int port, void *addr, unsigned long count) {
  __asm__ __volatile__("rep; insb" : "+D"(addr), "+c"(count) : "d"(port));
}


x86 assembly (clang, -O0):
<insb>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rcx
mov    -0x4(%rbp),%edx
rep insb (%dx),%es:(%rdi)
mov    %rdi,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<insb>:
mov    %rdx,%rcx
mov    %edi,%edx
mov    %rsi,%rdi
rep insb (%dx),%es:(%rdi)
ret

LLVM IR (-O0):
define void @insb(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i64, i64* %6
%9 = load i32, i32* %4
%10 = call { i8*, i64 } asm sideeffect "rep; insb", "={di},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i32 %9, i8* %7, i64 %8)
%11 = extractvalue { i8*, i64 } %10, 0
%12 = extractvalue { i8*, i64 } %10, 1
store i8* %11, i8** %5
store i64 %12, i64* %6
ret void
}

LLVM IR (-O2):
define void @insb(i32 %0, i8* %1, i64 %2) {
%4 = tail call { i8*, i64 } asm sideeffect "rep; insb", "={di},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* %1, i64 %2)
ret void
}
int compare_sizeof(int x) { return sizeof(x == x); }


x86 assembly (clang, -O0):
<compare_sizeof>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_sizeof>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @compare_sizeof(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 4
}

LLVM IR (-O2):
define i32 @compare_sizeof(i32 %0) {
ret i32 4
}
/* Variables and functions */
int /*<<< orphan*/ VIM_HIF_SetReg8(int, unsigned char);
void VIM_MARB_SetThumbbufLowThreshold(unsigned long Length) {
  VIM_HIF_SetReg8((0x2400 + 0x034), (unsigned char)Length);
  VIM_HIF_SetReg8((0x2400 + 0x033), (unsigned char)(Length >> 8));
  VIM_HIF_SetReg8((0x2400 + 0x032), (unsigned char)(Length >> 16));
}


x86 assembly (clang, -O0):
<VIM_MARB_SetThumbbufLowThreshold>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x2434,%edi
movzbl %al,%esi
call   1030 <VIM_HIF_SetReg8@plt>
mov    -0x8(%rbp),%rax
shr    $0x8,%rax
mov    $0x2433,%edi
movzbl %al,%esi
call   1030 <VIM_HIF_SetReg8@plt>
mov    -0x8(%rbp),%rax
shr    $0x10,%rax
mov    $0x2432,%edi
movzbl %al,%esi
call   1030 <VIM_HIF_SetReg8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VIM_MARB_SetThumbbufLowThreshold>:
push   %rbx
mov    %rdi,%rbx
movzbl %bl,%esi
mov    $0x2434,%edi
call   1030 <VIM_HIF_SetReg8@plt>
movzbl %bh,%esi
mov    $0x2433,%edi
call   1030 <VIM_HIF_SetReg8@plt>
shr    $0x10,%ebx
movzbl %bl,%esi
mov    $0x2432,%edi
pop    %rbx
jmp    1030 <VIM_HIF_SetReg8@plt>

LLVM IR (-O0):
define void @VIM_MARB_SetThumbbufLowThreshold(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i8
%5 = call i32 @VIM_HIF_SetReg8(i32 9268, i8 zeroext %4)
%6 = load i64, i64* %2
%7 = lshr i64 %6, 8
%8 = trunc i64 %7 to i8
%9 = call i32 @VIM_HIF_SetReg8(i32 9267, i8 zeroext %8)
%10 = load i64, i64* %2
%11 = lshr i64 %10, 16
%12 = trunc i64 %11 to i8
%13 = call i32 @VIM_HIF_SetReg8(i32 9266, i8 zeroext %12)
ret void
}

LLVM IR (-O2):
define void @VIM_MARB_SetThumbbufLowThreshold(i64 %0) {
%2 = trunc i64 %0 to i8
%3 = tail call i32 @VIM_HIF_SetReg8(i32 9268, i8 zeroext %2)
%4 = lshr i64 %0, 8
%5 = trunc i64 %4 to i8
%6 = tail call i32 @VIM_HIF_SetReg8(i32 9267, i8 zeroext %5)
%7 = lshr i64 %0, 16
%8 = trunc i64 %7 to i8
%9 = tail call i32 @VIM_HIF_SetReg8(i32 9266, i8 zeroext %8)
ret void
}