#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ cpuid(int, int *, int *, int *, int *);
int get_vendor();
int /*<<< orphan*/ have_cpuid();
int /*<<< orphan*/ support_avx();
int cpu_detect() {
  int eax, ebx, ecx, edx;
  int vendor, family, extend_family, model, extend_model;
  if (!have_cpuid())
    return 0;
  vendor = get_vendor();
  cpuid(1, &eax, &ebx, &ecx, &edx);
  extend_family = ((((eax) >> (20)) & (0xff)));
  extend_model = ((((eax) >> (16)) & (0x0f)));
  family = ((((eax) >> (8)) & (0x0f)));
  model = ((((eax) >> (4)) & (0x0f)));
  if (vendor == 1) {
    switch (family) {
    case 0x6:
      switch (extend_model) {
      case 1:
        switch (model) {
        case 7:
          return 1;
        case 13:
          return 1;
        }
        break;
      case 2:
        switch (model) {
        case 10:
        case 13:
          if (support_avx()) {
            return 2;
          } else {
            return 0;
          }
        }
        break;
      case 3:
        switch (model) {
        case 10:
        case 14:
          if (support_avx()) {
            return 2;
          } else {
            return 0;
          }
        case 12:
        case 15:
          if (support_avx()) {
            return 3;
          } else {
            return 0;
          }
        }
        break;
      case 4:
        switch (model) {
        case 5:
        case 6:
          if (support_avx()) {
            return 3;
          } else {
            return 0;
          }
        }
        break;
      }
      break;
    }
  } else if (vendor == 2) {
    switch (family) {
    case 0xf:
      switch (extend_family) {
      case 6:
        switch (model) {
        case 1:
          if (support_avx())
            return 4;
          else
            return 0;
        case 2:
          if (support_avx())
            return 5;
          else
            return 0;
        case 0:
          if (support_avx())
            return 5;
          else
            return 0;
        }
      }
      break;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<cpu_detect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    $0x0,%al
call   1060 <have_cpuid@plt>
cmp    $0x0,%eax
jne    1164 <cpu_detect+0x24>
movl   $0x0,-0x4(%rbp)
jmp    144f <cpu_detect+0x30f>
mov    $0x0,%al
call   1030 <get_vendor@plt>
mov    %eax,-0x18(%rbp)
mov    $0x1,%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%r8
call   1050 <cpuid@plt>
mov    -0x8(%rbp),%eax
sar    $0x14,%eax
and    $0xff,%eax
mov    %eax,-0x20(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x10,%eax
and    $0xf,%eax
mov    %eax,-0x28(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x8,%eax
and    $0xf,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x4,%eax
and    $0xf,%eax
mov    %eax,-0x24(%rbp)
cmpl   $0x1,-0x18(%rbp)
jne    135b <cpu_detect+0x21b>
mov    -0x1c(%rbp),%eax
sub    $0x6,%eax
jne    1356 <cpu_detect+0x216>
jmp    11d5 <cpu_detect+0x95>
mov    -0x28(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x30(%rbp)
sub    $0x3,%eax
ja     1351 <cpu_detect+0x211>
mov    -0x30(%rbp),%rax
lea    0xe0b(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x24(%rbp),%eax
mov    %eax,-0x34(%rbp)
sub    $0x7,%eax
je     1223 <cpu_detect+0xe3>
jmp    1212 <cpu_detect+0xd2>
mov    -0x34(%rbp),%eax
sub    $0xd,%eax
je     122f <cpu_detect+0xef>
jmp    123b <cpu_detect+0xfb>
movl   $0x1,-0x4(%rbp)
jmp    144f <cpu_detect+0x30f>
movl   $0x1,-0x4(%rbp)
jmp    144f <cpu_detect+0x30f>
jmp    1351 <cpu_detect+0x211>
mov    -0x24(%rbp),%eax
mov    %eax,-0x38(%rbp)
sub    $0xa,%eax
je     1265 <cpu_detect+0x125>
jmp    1254 <cpu_detect+0x114>
mov    -0x38(%rbp),%eax
sub    $0xd,%eax
jne    128d <cpu_detect+0x14d>
jmp    1265 <cpu_detect+0x125>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     1281 <cpu_detect+0x141>
movl   $0x2,-0x4(%rbp)
jmp    144f <cpu_detect+0x30f>
movl   $0x0,-0x4(%rbp)
jmp    144f <cpu_detect+0x30f>
jmp    1351 <cpu_detect+0x211>
mov    -0x24(%rbp),%eax
add    $0xfffffff6,%eax
mov    %eax,%ecx
mov    %rcx,-0x40(%rbp)
sub    $0x5,%eax
ja     130b <cpu_detect+0x1cb>
mov    -0x40(%rbp),%rax
lea    0xd5e(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     12d7 <cpu_detect+0x197>
movl   $0x2,-0x4(%rbp)
jmp    144f <cpu_detect+0x30f>
movl   $0x0,-0x4(%rbp)
jmp    144f <cpu_detect+0x30f>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     12ff <cpu_detect+0x1bf>
movl   $0x3,-0x4(%rbp)
jmp    144f <cpu_detect+0x30f>
movl   $0x0,-0x4(%rbp)
jmp    144f <cpu_detect+0x30f>
jmp    1351 <cpu_detect+0x211>
mov    -0x24(%rbp),%eax
add    $0xfffffffb,%eax
sub    $0x1,%eax
ja     134c <cpu_detect+0x20c>
jmp    1324 <cpu_detect+0x1e4>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     1340 <cpu_detect+0x200>
movl   $0x3,-0x4(%rbp)
jmp    144f <cpu_detect+0x30f>
movl   $0x0,-0x4(%rbp)
jmp    144f <cpu_detect+0x30f>
jmp    1351 <cpu_detect+0x211>
jmp    1356 <cpu_detect+0x216>
jmp    1448 <cpu_detect+0x308>
cmpl   $0x2,-0x18(%rbp)
jne    1443 <cpu_detect+0x303>
mov    -0x1c(%rbp),%eax
sub    $0xf,%eax
jne    143e <cpu_detect+0x2fe>
jmp    1376 <cpu_detect+0x236>
mov    -0x20(%rbp),%eax
sub    $0x6,%eax
jne    1439 <cpu_detect+0x2f9>
jmp    1387 <cpu_detect+0x247>
mov    -0x24(%rbp),%eax
mov    %eax,-0x44(%rbp)
test   %eax,%eax
je     140c <cpu_detect+0x2cc>
jmp    139a <cpu_detect+0x25a>
mov    -0x44(%rbp),%eax
sub    $0x1,%eax
je     13bc <cpu_detect+0x27c>
jmp    13ab <cpu_detect+0x26b>
mov    -0x44(%rbp),%eax
sub    $0x2,%eax
je     13e4 <cpu_detect+0x2a4>
jmp    1434 <cpu_detect+0x2f4>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     13d8 <cpu_detect+0x298>
movl   $0x4,-0x4(%rbp)
jmp    144f <cpu_detect+0x30f>
movl   $0x0,-0x4(%rbp)
jmp    144f <cpu_detect+0x30f>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     1400 <cpu_detect+0x2c0>
movl   $0x5,-0x4(%rbp)
jmp    144f <cpu_detect+0x30f>
movl   $0x0,-0x4(%rbp)
jmp    144f <cpu_detect+0x30f>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     1428 <cpu_detect+0x2e8>
movl   $0x5,-0x4(%rbp)
jmp    144f <cpu_detect+0x30f>
movl   $0x0,-0x4(%rbp)
jmp    144f <cpu_detect+0x30f>
jmp    1439 <cpu_detect+0x2f9>
jmp    143e <cpu_detect+0x2fe>
jmp    1443 <cpu_detect+0x303>
jmp    1448 <cpu_detect+0x308>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_detect>:
push   %rbp
push   %rbx
sub    $0x18,%rsp
xor    %ebx,%ebx
xor    %eax,%eax
call   1060 <have_cpuid@plt>
test   %eax,%eax
je     1281 <cpu_detect+0x141>
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <get_vendor@plt>
mov    %eax,%ebp
lea    0x8(%rsp),%rsi
lea    0x14(%rsp),%rdx
lea    0x10(%rsp),%rcx
lea    0xc(%rsp),%r8
mov    $0x1,%edi
call   1050 <cpuid@plt>
mov    0x8(%rsp),%ecx
mov    %ecx,%edx
shr    $0x8,%edx
and    $0xf,%edx
mov    %ecx,%eax
shr    $0x4,%eax
and    $0xf,%eax
cmp    $0x1,%ebp
jne    11da <cpu_detect+0x9a>
cmp    $0x6,%edx
jne    1281 <cpu_detect+0x141>
shr    $0x10,%ecx
and    $0xf,%ecx
add    $0xffffffff,%ecx
cmp    $0x3,%ecx
ja     1281 <cpu_detect+0x141>
lea    0xe45(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
cmp    $0x7,%eax
sete   %cl
cmp    $0xd,%eax
sete   %al
or     %cl,%al
movzbl %al,%ebx
jmp    1281 <cpu_detect+0x141>
cmp    $0x2,%ebp
jne    1281 <cpu_detect+0x141>
cmp    $0xf,%edx
jne    1281 <cpu_detect+0x141>
and    $0xff00000,%ecx
cmp    $0x600000,%ecx
jne    1281 <cpu_detect+0x141>
test   %eax,%eax
je     121f <cpu_detect+0xdf>
cmp    $0x2,%eax
je     121f <cpu_detect+0xdf>
cmp    $0x1,%eax
jne    1281 <cpu_detect+0x141>
xor    %eax,%eax
call   1040 <support_avx@plt>
xor    %ebx,%ebx
test   %eax,%eax
setne  %bl
shl    $0x2,%ebx
jmp    1281 <cpu_detect+0x141>
xor    %eax,%eax
call   1040 <support_avx@plt>
xor    %ecx,%ecx
test   %eax,%eax
setne  %cl
lea    (%rcx,%rcx,4),%ebx
jmp    1281 <cpu_detect+0x141>
cmp    $0xd,%eax
je     1256 <cpu_detect+0x116>
cmp    $0xa,%eax
je     1256 <cpu_detect+0x116>
jmp    1281 <cpu_detect+0x141>
add    $0xfffffff6,%eax
cmp    $0x5,%eax
ja     1281 <cpu_detect+0x141>
lea    0xdc3(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
xor    %eax,%eax
call   1040 <support_avx@plt>
xor    %ebx,%ebx
test   %eax,%eax
setne  %bl
add    %ebx,%ebx
jmp    1281 <cpu_detect+0x141>
add    $0xfffffffb,%eax
cmp    $0x1,%eax
ja     1281 <cpu_detect+0x141>
xor    %eax,%eax
call   1040 <support_avx@plt>
xor    %ecx,%ecx
test   %eax,%eax
setne  %cl
lea    (%rcx,%rcx,2),%ebx
mov    %ebx,%eax
add    $0x18,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @cpu_detect() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = call i32 (...) @have_cpuid()
%12 = icmp ne i32 %11, 0
br i1 %12, label %14, label %13
13: ; preds = %0
store i32 0, i32* %1
br label %100
14: ; preds = %0
%15 = call i32 (...) @get_vendor()
store i32 %15, i32* %6
%16 = call i32 @cpuid(i32 1, i32* %2, i32* %3, i32* %4, i32* %5)
%17 = load i32, i32* %2
%18 = ashr i32 %17, 20
%19 = and i32 %18, 255
store i32 %19, i32* %8
%20 = load i32, i32* %2
%21 = ashr i32 %20, 16
%22 = and i32 %21, 15
store i32 %22, i32* %10
%23 = load i32, i32* %2
%24 = ashr i32 %23, 8
%25 = and i32 %24, 15
store i32 %25, i32* %7
%26 = load i32, i32* %2
%27 = ashr i32 %26, 4
%28 = and i32 %27, 15
store i32 %28, i32* %9
%29 = load i32, i32* %6
%30 = icmp eq i32 %29, 1
br i1 %30, label %31, label %71
31: ; preds = %14
%32 = load i32, i32* %7
switch i32 %32, label %70 [
i32 6, label %33
]
33: ; preds = %31
%34 = load i32, i32* %10
switch i32 %34, label %69 [
i32 1, label %35
i32 2, label %40
i32 3, label %48
i32 4, label %61
]
35: ; preds = %33
%36 = load i32, i32* %9
switch i32 %36, label %39 [
i32 7, label %37
i32 13, label %38
]
37: ; preds = %35
store i32 1, i32* %1
br label %100
38: ; preds = %35
store i32 1, i32* %1
br label %100
39: ; preds = %35
br label %69
40: ; preds = %33
%41 = load i32, i32* %9
switch i32 %41, label %47 [
i32 10, label %42
i32 13, label %42
]
42: ; preds = %40, %40
%43 = call i32 (...) @support_avx()
%44 = icmp ne i32 %43, 0
br i1 %44, label %45, label %46
45: ; preds = %42
store i32 2, i32* %1
br label %100
46: ; preds = %42
store i32 0, i32* %1
br label %100
47: ; preds = %40
br label %69
48: ; preds = %33
%49 = load i32, i32* %9
switch i32 %49, label %60 [
i32 10, label %50
i32 14, label %50
i32 12, label %55
i32 15, label %55
]
50: ; preds = %48, %48
%51 = call i32 (...) @support_avx()
%52 = icmp ne i32 %51, 0
br i1 %52, label %53, label %54
53: ; preds = %50
store i32 2, i32* %1
br label %100
54: ; preds = %50
store i32 0, i32* %1
br label %100
55: ; preds = %48, %48
%56 = call i32 (...) @support_avx()
%57 = icmp ne i32 %56, 0
br i1 %57, label %58, label %59
58: ; preds = %55
store i32 3, i32* %1
br label %100
59: ; preds = %55
store i32 0, i32* %1
br label %100
60: ; preds = %48
br label %69
61: ; preds = %33
%62 = load i32, i32* %9
switch i32 %62, label %68 [
i32 5, label %63
i32 6, label %63
]
63: ; preds = %61, %61
%64 = call i32 (...) @support_avx()
%65 = icmp ne i32 %64, 0
br i1 %65, label %66, label %67
66: ; preds = %63
store i32 3, i32* %1
br label %100
67: ; preds = %63
store i32 0, i32* %1
br label %100
68: ; preds = %61
br label %69
69: ; preds = %33, %68, %60, %47, %39
br label %70
70: ; preds = %31, %69
br label %99
71: ; preds = %14
%72 = load i32, i32* %6
%73 = icmp eq i32 %72, 2
br i1 %73, label %74, label %98
74: ; preds = %71
%75 = load i32, i32* %7
switch i32 %75, label %97 [
i32 15, label %76
]
76: ; preds = %74
%77 = load i32, i32* %8
switch i32 %77, label %96 [
i32 6, label %78
]
78: ; preds = %76
%79 = load i32, i32* %9
switch i32 %79, label %95 [
i32 1, label %80
i32 2, label %85
i32 0, label %90
]
80: ; preds = %78
%81 = call i32 (...) @support_avx()
%82 = icmp ne i32 %81, 0
br i1 %82, label %83, label %84
83: ; preds = %80
store i32 4, i32* %1
br label %100
84: ; preds = %80
store i32 0, i32* %1
br label %100
85: ; preds = %78
%86 = call i32 (...) @support_avx()
%87 = icmp ne i32 %86, 0
br i1 %87, label %88, label %89
88: ; preds = %85
store i32 5, i32* %1
br label %100
89: ; preds = %85
store i32 0, i32* %1
br label %100
90: ; preds = %78
%91 = call i32 (...) @support_avx()
%92 = icmp ne i32 %91, 0
br i1 %92, label %93, label %94
93: ; preds = %90
store i32 5, i32* %1
br label %100
94: ; preds = %90
store i32 0, i32* %1
br label %100
95: ; preds = %78
br label %96
96: ; preds = %95, %76
br label %97
97: ; preds = %74, %96
br label %98
98: ; preds = %97, %71
br label %99
99: ; preds = %98, %70
store i32 0, i32* %1
br label %100
100: ; preds = %99, %94, %93, %89, %88, %84, %83, %67, %66, %59, %58, %54, %53, %46, %45, %38, %37, %13
%101 = load i32, i32* %1
ret i32 %101
}

LLVM IR (-O2):
define i32 @cpu_detect() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %1 to i8*
%6 = bitcast i32* %2 to i8*
%7 = bitcast i32* %3 to i8*
%8 = bitcast i32* %4 to i8*
%9 = tail call i32 (...) @have_cpuid()
%10 = icmp eq i32 %9, 0
br i1 %10, label %71, label %11
11: ; preds = %0
%12 = tail call i32 (...) @get_vendor()
%13 = call i32 @cpuid(i32 1, i32* %1, i32* %2, i32* %3, i32* %4)
%14 = load i32, i32* %1
%15 = lshr i32 %14, 16
%16 = and i32 %15, 15
%17 = lshr i32 %14, 8
%18 = and i32 %17, 15
%19 = lshr i32 %14, 4
%20 = and i32 %19, 15
%21 = icmp eq i32 %12, 1
br i1 %21, label %22, label %51
22: ; preds = %11
%23 = icmp eq i32 %18, 6
br i1 %23, label %24, label %71
24: ; preds = %22
switch i32 %16, label %71 [
i32 1, label %25
i32 2, label %30
i32 3, label %35
i32 4, label %44
]
25: ; preds = %24
%26 = icmp eq i32 %20, 7
%27 = icmp eq i32 %20, 13
%28 = or i1 %26, %27
%29 = zext i1 %28 to i32
br label %71
30: ; preds = %24
switch i32 %20, label %71 [
i32 10, label %31
i32 13, label %31
]
31: ; preds = %30, %30
%32 = call i32 (...) @support_avx()
%33 = icmp eq i32 %32, 0
%34 = select i1 %33, i32 0, i32 2
br label %71
35: ; preds = %24
switch i32 %20, label %71 [
i32 10, label %36
i32 14, label %36
i32 12, label %40
i32 15, label %40
]
36: ; preds = %35, %35
%37 = call i32 (...) @support_avx()
%38 = icmp eq i32 %37, 0
%39 = select i1 %38, i32 0, i32 2
br label %71
40: ; preds = %35, %35
%41 = call i32 (...) @support_avx()
%42 = icmp eq i32 %41, 0
%43 = select i1 %42, i32 0, i32 3
br label %71
44: ; preds = %24
%45 = add nsw i32 %20, -5
%46 = icmp ult i32 %45, 2
br i1 %46, label %47, label %71
47: ; preds = %44
%48 = call i32 (...) @support_avx()
%49 = icmp eq i32 %48, 0
%50 = select i1 %49, i32 0, i32 3
br label %71
51: ; preds = %11
%52 = icmp eq i32 %12, 2
%53 = icmp eq i32 %18, 15
%54 = select i1 %52, i1 %53, i1 false
%55 = and i32 %14, 267386880
%56 = icmp eq i32 %55, 6291456
%57 = select i1 %54, i1 %56, i1 false
br i1 %57, label %58, label %71
58: ; preds = %51
switch i32 %20, label %71 [
i32 1, label %59
i32 2, label %63
i32 0, label %67
]
59: ; preds = %58
%60 = call i32 (...) @support_avx()
%61 = icmp eq i32 %60, 0
%62 = select i1 %61, i32 0, i32 4
br label %71
63: ; preds = %58
%64 = call i32 (...) @support_avx()
%65 = icmp eq i32 %64, 0
%66 = select i1 %65, i32 0, i32 5
br label %71
67: ; preds = %58
%68 = call i32 (...) @support_avx()
%69 = icmp eq i32 %68, 0
%70 = select i1 %69, i32 0, i32 5
br label %71
71: ; preds = %24, %30, %35, %22, %58, %51, %44, %67, %63, %59, %47, %40, %36, %31, %25, %0
%72 = phi i32 [ 0, %0 ], [ %29, %25 ], [ %34, %31 ], [ %39, %36 ], [ %43, %40 ], [ %50, %47 ], [ %62, %59 ], [ %66, %63 ], [ %70, %67 ], [ 0, %44 ], [ 0, %51 ], [ 0, %58 ], [ 0, %22 ], [ 0, %35 ], [ 0, %30 ], [ 0, %24 ]
ret i32 %72
}