#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
long ADCSequenceDataGet(unsigned long ulBase, unsigned long ulSequenceNum,
                        unsigned long *pulBuffer) {
  unsigned long ulCount;
  DEBUG_ASSERT((ulBase == 0x40038000) || (ulBase == 0x40039000));
  DEBUG_ASSERT(ulSequenceNum < 4);
  ulBase += (0x00000040) + ((0x00000060 - 0x00000040) * ulSequenceNum);
  ulCount = 0;
  while (!((*((volatile unsigned long *)(ulBase + (0x0000004C - 0x00000040)))) &
           0x00000100) &&
         (ulCount < 8)) {
    *pulBuffer++ =
        (*((volatile unsigned long *)(ulBase + (0x00000048 - 0x00000040))));
    ulCount++;
  }
  return (ulCount);
}


x86 assembly (clang, -O0):
<ADCSequenceDataGet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x1,%al
cmpq   $0x40038000,-0x8(%rbp)
40
mov    %al,-0x21(%rbp)
je     1145 <ADCSequenceDataGet+0x35>
cmpq   $0x40039000,-0x8(%rbp)
40
sete   %al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
cmpq   $0x4,-0x10(%rbp)
setb   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rax
shl    $0x5,%rax
add    $0x40,%rax
add    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%rcx
and    $0x100,%rcx
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x22(%rbp)
jne    11a9 <ADCSequenceDataGet+0x99>
cmpq   $0x8,-0x20(%rbp)
setb   %al
mov    %al,-0x22(%rbp)
mov    -0x22(%rbp),%al
test   $0x1,%al
jne    11b9 <ADCSequenceDataGet+0xa9>
jmp    11e4 <ADCSequenceDataGet+0xd4>
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rcx
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x8,%rdx
mov    %rdx,-0x18(%rbp)
mov    %rcx,(%rax)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1180 <ADCSequenceDataGet+0x70>
mov    -0x20(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCSequenceDataGet>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %rdi,%r15
mov    %rdi,%rax
and    $0xffffffffffffefff,%rax
xor    %edi,%edi
cmp    $0x40038000,%rax
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
xor    %edi,%edi
cmp    $0x4,%rbx
setb   %dil
call   1030 <DEBUG_ASSERT@plt>
shl    $0x5,%rbx
testq  $0x100,0x4c(%r15,%rbx,1)
jne    1225 <ADCSequenceDataGet+0x115>
mov    0x48(%rbx,%r15,1),%rax
mov    %rax,(%r14)
mov    $0x1,%eax
testq  $0x100,0x4c(%rbx,%r15,1)
jne    1227 <ADCSequenceDataGet+0x117>
mov    0x48(%rbx,%r15,1),%rax
mov    %rax,0x8(%r14)
mov    $0x2,%eax
testq  $0x100,0x4c(%rbx,%r15,1)
jne    1227 <ADCSequenceDataGet+0x117>
mov    0x48(%rbx,%r15,1),%rax
mov    %rax,0x10(%r14)
mov    $0x3,%eax
testq  $0x100,0x4c(%rbx,%r15,1)
jne    1227 <ADCSequenceDataGet+0x117>
mov    0x48(%rbx,%r15,1),%rax
mov    %rax,0x18(%r14)
mov    $0x4,%eax
testq  $0x100,0x4c(%rbx,%r15,1)
jne    1227 <ADCSequenceDataGet+0x117>
mov    0x48(%rbx,%r15,1),%rax
mov    %rax,0x20(%r14)
mov    $0x5,%eax
testq  $0x100,0x4c(%rbx,%r15,1)
jne    1227 <ADCSequenceDataGet+0x117>
mov    0x48(%rbx,%r15,1),%rax
mov    %rax,0x28(%r14)
mov    $0x6,%eax
testq  $0x100,0x4c(%rbx,%r15,1)
jne    1227 <ADCSequenceDataGet+0x117>
mov    0x48(%rbx,%r15,1),%rax
mov    %rax,0x30(%r14)
mov    $0x7,%eax
testq  $0x100,0x4c(%rbx,%r15,1)
jne    1227 <ADCSequenceDataGet+0x117>
mov    0x48(%rbx,%r15,1),%rax
mov    %rax,0x38(%r14)
mov    0x4c(%rbx,%r15,1),%rax
mov    $0x8,%eax
jmp    1227 <ADCSequenceDataGet+0x117>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @ADCSequenceDataGet(i64 %0, i64 %1, i64* %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64*
%7 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64* %2, i64** %6
%8 = load i64, i64* %4
%9 = icmp eq i64 %8, 1073971200
br i1 %9, label %13, label %10
10: ; preds = %3
%11 = load i64, i64* %4
%12 = icmp eq i64 %11, 1073975296
br label %13
13: ; preds = %10, %3
%14 = phi i1 [ true, %3 ], [ %12, %10 ]
%15 = zext i1 %14 to i32
%16 = call i32 @DEBUG_ASSERT(i32 %15)
%17 = load i64, i64* %5
%18 = icmp ult i64 %17, 4
%19 = zext i1 %18 to i32
%20 = call i32 @DEBUG_ASSERT(i32 %19)
%21 = load i64, i64* %5
%22 = mul i64 32, %21
%23 = add i64 64, %22
%24 = load i64, i64* %4
%25 = add i64 %24, %23
store i64 %25, i64* %4
store i64 0, i64* %7
br label %26
26: ; preds = %38, %13
%27 = load i64, i64* %4
%28 = add i64 %27, 12
%29 = inttoptr i64 %28 to i64*
%30 = load volatile i64, i64* %29
%31 = and i64 %30, 256
%32 = icmp ne i64 %31, 0
br i1 %32, label %36, label %33
33: ; preds = %26
%34 = load i64, i64* %7
%35 = icmp ult i64 %34, 8
br label %36
36: ; preds = %33, %26
%37 = phi i1 [ false, %26 ], [ %35, %33 ]
br i1 %37, label %38, label %47
38: ; preds = %36
%39 = load i64, i64* %4
%40 = add i64 %39, 8
%41 = inttoptr i64 %40 to i64*
%42 = load volatile i64, i64* %41
%43 = load i64*, i64** %6
%44 = getelementptr inbounds i64, i64* %43, i32 1
store i64* %44, i64** %6
store i64 %42, i64* %43
%45 = load i64, i64* %7
%46 = add i64 %45, 1
store i64 %46, i64* %7
br label %26
47: ; preds = %36
%48 = load i64, i64* %7
ret i64 %48
}

LLVM IR (-O2):
define i64 @ADCSequenceDataGet(i64 %0, i64 %1, i64* nocapture writeonly %2) {
%4 = and i64 %0, -4097
%5 = icmp eq i64 %4, 1073971200
%6 = zext i1 %5 to i32
%7 = tail call i32 @DEBUG_ASSERT(i32 %6)
%8 = icmp ult i64 %1, 4
%9 = zext i1 %8 to i32
%10 = tail call i32 @DEBUG_ASSERT(i32 %9)
%11 = shl i64 %1, 5
%12 = add i64 %0, 64
%13 = add i64 %12, %11
%14 = add i64 %13, 12
%15 = inttoptr i64 %14 to i64*
%16 = load volatile i64, i64* %15
%17 = and i64 %16, 256
%18 = icmp eq i64 %17, 0
br i1 %18, label %19, label %66
19: ; preds = %3
%20 = add i64 %13, 8
%21 = inttoptr i64 %20 to i64*
%22 = load volatile i64, i64* %21
store i64 %22, i64* %2
%23 = load volatile i64, i64* %15
%24 = and i64 %23, 256
%25 = icmp eq i64 %24, 0
br i1 %25, label %26, label %66
26: ; preds = %19
%27 = getelementptr inbounds i64, i64* %2, i64 1
%28 = load volatile i64, i64* %21
store i64 %28, i64* %27
%29 = load volatile i64, i64* %15
%30 = and i64 %29, 256
%31 = icmp eq i64 %30, 0
br i1 %31, label %32, label %66
32: ; preds = %26
%33 = getelementptr inbounds i64, i64* %2, i64 2
%34 = load volatile i64, i64* %21
store i64 %34, i64* %33
%35 = load volatile i64, i64* %15
%36 = and i64 %35, 256
%37 = icmp eq i64 %36, 0
br i1 %37, label %38, label %66
38: ; preds = %32
%39 = getelementptr inbounds i64, i64* %2, i64 3
%40 = load volatile i64, i64* %21
store i64 %40, i64* %39
%41 = load volatile i64, i64* %15
%42 = and i64 %41, 256
%43 = icmp eq i64 %42, 0
br i1 %43, label %44, label %66
44: ; preds = %38
%45 = getelementptr inbounds i64, i64* %2, i64 4
%46 = load volatile i64, i64* %21
store i64 %46, i64* %45
%47 = load volatile i64, i64* %15
%48 = and i64 %47, 256
%49 = icmp eq i64 %48, 0
br i1 %49, label %50, label %66
50: ; preds = %44
%51 = getelementptr inbounds i64, i64* %2, i64 5
%52 = load volatile i64, i64* %21
store i64 %52, i64* %51
%53 = load volatile i64, i64* %15
%54 = and i64 %53, 256
%55 = icmp eq i64 %54, 0
br i1 %55, label %56, label %66
56: ; preds = %50
%57 = getelementptr inbounds i64, i64* %2, i64 6
%58 = load volatile i64, i64* %21
store i64 %58, i64* %57
%59 = load volatile i64, i64* %15
%60 = and i64 %59, 256
%61 = icmp eq i64 %60, 0
br i1 %61, label %62, label %66
62: ; preds = %56
%63 = getelementptr inbounds i64, i64* %2, i64 7
%64 = load volatile i64, i64* %21
store i64 %64, i64* %63
%65 = load volatile i64, i64* %15
br label %66
66: ; preds = %19, %26, %32, %38, %44, %50, %56, %62, %3
%67 = phi i64 [ 0, %3 ], [ 1, %19 ], [ 2, %26 ], [ 3, %32 ], [ 4, %38 ], [ 5, %44 ], [ 6, %50 ], [ 7, %56 ], [ 8, %62 ]
ret i64 %67
}