xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ nullf(char *);
int /*<<< orphan*/ output_byte(int);
void emit_fchs() {
  nullf("fchs\n");
  output_byte(0xd9);
  output_byte(0xe0);
}


x86 assembly (clang, -O0):
<emit_fchs>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <nullf@plt>
mov    $0xd9,%edi
call   1040 <output_byte@plt>
mov    $0xe0,%edi
call   1040 <output_byte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_fchs>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <nullf@plt>
mov    $0xd9,%edi
call   1040 <output_byte@plt>
mov    $0xe0,%edi
pop    %rax
jmp    1040 <output_byte@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"fchs\0A\00"
define void @emit_fchs() {
%1 = call i32 @nullf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @output_byte(i32 217)
%3 = call i32 @output_byte(i32 224)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"fchs\0A\00"
define void @emit_fchs() {
%1 = tail call i32 @nullf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @output_byte(i32 217)
%3 = tail call i32 @output_byte(i32 224)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ vOneTwo(unsigned char const *, int, unsigned char *);
void vOneTwo0(const unsigned char *psIn, int iLength, unsigned char *pszOut) {
  vOneTwo(psIn, iLength, pszOut);
  if (iLength < 0)
    iLength = 0;
  pszOut[2 * iLength] = 0;
}


x86 assembly (clang, -O0):
<vOneTwo0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1030 <vOneTwo@plt>
cmpl   $0x0,-0xc(%rbp)
jge    1144 <vOneTwo0+0x34>
movl   $0x0,-0xc(%rbp)
mov    -0x18(%rbp),%rax
mov    -0xc(%rbp),%ecx
shl    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vOneTwo0>:
push   %rbp
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %esi,%ebp
call   1030 <vOneTwo@plt>
xor    %eax,%eax
test   %ebp,%ebp
cmovns %ebp,%eax
movb   $0x0,(%rbx,%rax,2)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @vOneTwo0(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = call i32 @vOneTwo(i8* %7, i32 %8, i8* %9)
%11 = load i32, i32* %5
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %3
store i32 0, i32* %5
br label %14
14: ; preds = %13, %3
%15 = load i8*, i8** %6
%16 = load i32, i32* %5
%17 = mul nsw i32 2, %16
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %15, i64 %18
store i8 0, i8* %19
ret void
}

LLVM IR (-O2):
define void @vOneTwo0(i8* %0, i32 %1, i8* %2) {
%4 = tail call i32 @vOneTwo(i8* %0, i32 %1, i8* %2)
%5 = icmp sgt i32 %1, 0
%6 = select i1 %5, i32 %1, i32 0
%7 = shl nuw nsw i32 %6, 1
%8 = zext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %2, i64 %8
store i8 0, i8* %9
ret void
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ pipe(int *);
int /*<<< orphan*/ printf(char *);
scalar_t__ write(int, char *, int);
int main(void) {
  int p[2];
  pipe(p);
  if (write(p[0], "hello", 5) == 0)
    printf("success\n");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0xc(%rbp),%rdi
call   1050 <pipe@plt>
mov    -0xc(%rbp),%edi
lea    0xeae(%rip),%rsi
mov    $0x5,%edx
call   1030 <write@plt>
cmp    $0x0,%rax
jne    1172 <main+0x42>
lea    0xe99(%rip),%rdi
call   1040 <printf@plt>
mov    0x2e67(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    %rsp,%rdi
call   1050 <pipe@plt>
mov    (%rsp),%edi
lea    0xebd(%rip),%rsi
mov    $0x5,%edx
call   1040 <write@plt>
test   %rax,%rax
jne    115e <main+0x2e>
lea    0xead(%rip),%rdi
call   1030 <puts@plt>
mov    0x2e7b(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"hello\00"
@.str.1 = [9 x i8] c"success\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca [2 x i32]
store i32 0, i32* %1
%3 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 0
%4 = call i32 @pipe(i32* %3)
%5 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 0
%6 = load i32, i32* %5
%7 = call i64 @write(i32 %6, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 5)
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %0
%10 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
br label %11
11: ; preds = %9, %0
%12 = load i32, i32* @EXIT_SUCCESS
ret i32 %12
}

LLVM IR (-O2):
@.str = [6 x i8] c"hello\00"
@EXIT_SUCCESS = global i32 0
@str = [8 x i8] c"success\00"
define i32 @main() {
%1 = alloca [2 x i32]
%2 = bitcast [2 x i32]* %1 to i8*
%3 = getelementptr inbounds [2 x i32], [2 x i32]* %1, i64 0, i64 0
%4 = call i32 @pipe(i32* %3)
%5 = load i32, i32* %3
%6 = call i64 @write(i32 %5, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 5)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %0
%9 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
br label %10
10: ; preds = %8, %0
%11 = load i32, i32* @EXIT_SUCCESS
ret i32 %11
}
void g_set_application_name() {}


x86 assembly (clang, -O0):
<g_set_application_name>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_set_application_name>:
ret

LLVM IR (-O0):
define void @g_set_application_name() {
ret void
}

LLVM IR (-O2):
define void @g_set_application_name() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int num;
  printf("Digite um número");
  scanf("%d", &num);
  if (num % 2 == 0) {
    printf("Par");
  } else {
    printf("Impar");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
lea    0xed0(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1170 <main+0x50>
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
jmp    117c <main+0x5c>
lea    0xea2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
lea    0xede(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
testb  $0x1,0x4(%rsp)
lea    0xecb(%rip),%rax
lea    0xec8(%rip),%rdi
cmove  %rax,%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"Digite um n\C3\BAmero\00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [4 x i8] c"Par\00"
@.str.3 = [6 x i8] c"Impar\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = srem i32 %5, 2
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %0
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0))
br label %12
10: ; preds = %0
%11 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.3, i64 0, i64 0))
br label %12
12: ; preds = %10, %8
ret i32 0
}

LLVM IR (-O2):
@.str = [18 x i8] c"Digite um n\C3\BAmero\00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [4 x i8] c"Par\00"
@.str.3 = [6 x i8] c"Impar\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = and i32 %5, 1
%7 = icmp eq i32 %6, 0
%8 = select i1 %7, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.3, i64 0, i64 0)
%9 = call i32 @printf(i8* dereferenceable(1) %8)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __ycheck(char const *, char const *, unsigned int);
int /*<<< orphan*/ abort();
void __ycheck_noreturn(const char *e, const char *file, unsigned int line) {
  __ycheck(e, file, line);
  abort();
}


x86 assembly (clang, -O0):
<__ycheck_noreturn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <__ycheck@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<__ycheck_noreturn>:
push   %rax
call   1040 <__ycheck@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @__ycheck_noreturn(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @__ycheck(i8* %7, i8* %8, i32 %9)
%11 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define void @__ycheck_noreturn(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @__ycheck(i8* %0, i8* %1, i32 %2)
%5 = tail call i32 (...) @abort()
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int vsnprintf(char *, size_t, char const *, int /*<<< orphan*/);
int xvsnprintf(char *s, size_t n, const char *fmt, va_list arg) {
  return (vsnprintf(s, n, fmt, arg));
}


x86 assembly (clang, -O0):
<xvsnprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <vsnprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xvsnprintf>:
jmp    1030 <vsnprintf@plt>

LLVM IR (-O0):
define i32 @xvsnprintf(i8* %0, i64 %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = load i8*, i8** %7
%12 = load i32, i32* %8
%13 = call i32 @vsnprintf(i8* %9, i64 %10, i8* %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @xvsnprintf(i8* nocapture %0, i64 %1, i8* nocapture %2, i32 %3) {
%5 = tail call i32 @vsnprintf(i8* %0, i64 %1, i8* %2, i32 %3)
ret i32 %5
}
/* Variables and functions */
int strtoi_base(char **, int *, int /*<<< orphan*/);
int strtoi(char **str, int *dest) { return strtoi_base(str, dest, 0); }


x86 assembly (clang, -O0):
<strtoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <strtoi_base@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtoi>:
xor    %edx,%edx
jmp    1030 <strtoi_base@plt>

LLVM IR (-O0):
define i32 @strtoi(i8** %0, i32* %1) {
%3 = alloca i8**
%4 = alloca i32*
store i8** %0, i8*** %3
store i32* %1, i32** %4
%5 = load i8**, i8*** %3
%6 = load i32*, i32** %4
%7 = call i32 @strtoi_base(i8** %5, i32* %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @strtoi(i8** %0, i32* %1) {
%3 = tail call i32 @strtoi_base(i8** %0, i32* %1, i32 0)
ret i32 %3
}
int test3(int e) { return -e == 5; }


x86 assembly (clang, -O0):
<test3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
sub    -0x4(%rbp),%eax
cmp    $0x5,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test3>:
xor    %eax,%eax
cmp    $0xfffffffb,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @test3(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 0, %3
%5 = icmp eq i32 %4, 5
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @test3(i32 %0) {
%2 = icmp eq i32 %0, -5
%3 = zext i1 %2 to i32
ret i32 %3
}
void clearTokens() {}


x86 assembly (clang, -O0):
<clearTokens>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clearTokens>:
ret

LLVM IR (-O0):
define void @clearTokens() {
ret void
}

LLVM IR (-O2):
define void @clearTokens() {
ret void
}
/* Variables and functions */
int rand();
int IntRandom(int Range) { return rand() % Range - Range / 2; }


x86 assembly (clang, -O0):
<IntRandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cltd
idivl  -0x4(%rbp)
mov    %edx,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
sub    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IntRandom>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %ebx
mov    %edx,%eax
mov    %ebx,%ecx
shr    $0x1f,%ecx
add    %ebx,%ecx
sar    %ecx
sub    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @IntRandom(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @rand()
%4 = load i32, i32* %2
%5 = srem i32 %3, %4
%6 = load i32, i32* %2
%7 = sdiv i32 %6, 2
%8 = sub nsw i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @IntRandom(i32 %0) {
%2 = tail call i32 (...) @rand()
%3 = srem i32 %2, %0
%4 = sdiv i32 %0, -2
%5 = add i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ print_cut_rod_solution(int *, int, int *, int *);
int main(void) {
  int p[] = {0, 1, 5, 8, 9, 10, 17, 17, 20, 24, 30};
  int r[13], s[13];
  print_cut_rod_solution(p, 11, r, s);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0xb0,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x30(%rbp),%rdi
lea    0xec3(%rip),%rsi
mov    $0x2c,%edx
call   1030 <memcpy@plt>
lea    -0x30(%rbp),%rdi
lea    -0x70(%rbp),%rdx
lea    -0xb0(%rbp),%rcx
mov    $0xb,%esi
call   1040 <print_cut_rod_solution@plt>
xor    %eax,%eax
add    $0xb0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0xa8,%rsp
movups 0xefe(%rip),%xmm0
movups %xmm0,0x1c(%rsp)
movaps 0xee6(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xeca(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
lea    0x70(%rsp),%rdx
lea    0x30(%rsp),%rcx
mov    $0xb,%esi
call   1030 <print_cut_rod_solution@plt>
xor    %eax,%eax
add    $0xa8,%rsp
ret

LLVM IR (-O0):
@__const.main.p = [11 x i32] [i32 0, i32 1, i32 5, i32 8, i32 9, i32 10, i32 17, i32 17, i32 20, i32 24, i32 30]
define i32 @main() {
%1 = alloca i32
%2 = alloca [11 x i32]
%3 = alloca [13 x i32]
%4 = alloca [13 x i32]
store i32 0, i32* %1
%5 = bitcast [11 x i32]* %2 to i8*
%6 = getelementptr inbounds [11 x i32], [11 x i32]* %2, i64 0, i64 0
%7 = getelementptr inbounds [13 x i32], [13 x i32]* %3, i64 0, i64 0
%8 = getelementptr inbounds [13 x i32], [13 x i32]* %4, i64 0, i64 0
%9 = call i32 @print_cut_rod_solution(i32* %6, i32 11, i32* %7, i32* %8)
ret i32 0
}

LLVM IR (-O2):
@__const.main.p = [11 x i32] [i32 0, i32 1, i32 5, i32 8, i32 9, i32 10, i32 17, i32 17, i32 20, i32 24, i32 30]
define i32 @main() {
%1 = alloca [11 x i32]
%2 = alloca [13 x i32]
%3 = alloca [13 x i32]
%4 = bitcast [11 x i32]* %1 to i8*
%5 = bitcast [13 x i32]* %2 to i8*
%6 = bitcast [13 x i32]* %3 to i8*
%7 = getelementptr inbounds [11 x i32], [11 x i32]* %1, i64 0, i64 0
%8 = getelementptr inbounds [13 x i32], [13 x i32]* %2, i64 0, i64 0
%9 = getelementptr inbounds [13 x i32], [13 x i32]* %3, i64 0, i64 0
%10 = call i32 @print_cut_rod_solution(i32* %7, i32 11, i32* %8, i32* %9)
ret i32 0
}
unsigned xrop3_157_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = T | D;
  stk2 = S & stk3;
  stk1 = D ^ stk2;
  stk1 = ~stk1;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_157_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_157_0_0>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
shl    $0x8,%esi
lea    0xff(%rsi),%eax
and    %ecx,%eax
xor    $0xffffff00,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_157_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
%24 = load i32, i32* %5
%25 = or i32 %23, %24
store i32 %25, i32* %10
%26 = load i32, i32* %6
%27 = load i32, i32* %10
%28 = and i32 %26, %27
store i32 %28, i32* %9
%29 = load i32, i32* %5
%30 = load i32, i32* %9
%31 = xor i32 %29, %30
store i32 %31, i32* %8
%32 = load i32, i32* %8
%33 = xor i32 %32, -1
store i32 %33, i32* %8
%34 = load i32, i32* %8
ret i32 %34
}

LLVM IR (-O2):
define i32 @xrop3_157_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = shl nuw nsw i32 %5, 8
%7 = or i32 %6, 255
%8 = and i32 %7, %4
%9 = xor i32 %8, -256
ret i32 %9
}
int batadv_nc_nodes_seq_print_text(struct seq_file *seq, void *offset) {
  return 0;
}


x86 assembly (clang, -O0):
<batadv_nc_nodes_seq_print_text>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<batadv_nc_nodes_seq_print_text>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.seq_file = type opaque
define i32 @batadv_nc_nodes_seq_print_text(%struct.seq_file* %0, i8* %1) {
%3 = alloca %struct.seq_file*
%4 = alloca i8*
store %struct.seq_file* %0, %struct.seq_file** %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
%struct.seq_file = type opaque
define i32 @batadv_nc_nodes_seq_print_text(%struct.seq_file* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 0
}
void logbuf_close(void) {}


x86 assembly (clang, -O0):
<logbuf_close>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<logbuf_close>:
ret

LLVM IR (-O0):
define void @logbuf_close() {
ret void
}

LLVM IR (-O2):
define void @logbuf_close() {
ret void
}
char hex2int(unsigned char hex) {
  hex = hex - '0';
  if (hex > 9) {
    hex = (hex + '0' - 1) | 0x20;
    hex = hex - 'a' + 11;
  }
  if (hex > 15)
    hex = 0xFF;
  return hex;
}


x86 assembly (clang, -O0):
<hex2int>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
sub    $0x30,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0x9,%eax
jle    113e <hex2int+0x3e>
movzbl -0x1(%rbp),%eax
add    $0x30,%eax
sub    $0x1,%eax
or     $0x20,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
sub    $0x61,%eax
add    $0xb,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0xf,%eax
jle    114f <hex2int+0x4f>
movb   $0xff,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hex2int>:
lea    -0x30(%rdi),%eax
add    $0xff,%dil
or     $0x20,%dil
add    $0xaa,%dil
cmp    $0xa,%al
movzbl %al,%eax
movzbl %dil,%ecx
cmovb  %eax,%ecx
cmp    $0x10,%cl
mov    $0xff,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @hex2int(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = sub nsw i32 %4, 48
%6 = trunc i32 %5 to i8
store i8 %6, i8* %2
%7 = load i8, i8* %2
%8 = zext i8 %7 to i32
%9 = icmp sgt i32 %8, 9
br i1 %9, label %10, label %22
10: ; preds = %1
%11 = load i8, i8* %2
%12 = zext i8 %11 to i32
%13 = add nsw i32 %12, 48
%14 = sub nsw i32 %13, 1
%15 = or i32 %14, 32
%16 = trunc i32 %15 to i8
store i8 %16, i8* %2
%17 = load i8, i8* %2
%18 = zext i8 %17 to i32
%19 = sub nsw i32 %18, 97
%20 = add nsw i32 %19, 11
%21 = trunc i32 %20 to i8
store i8 %21, i8* %2
br label %22
22: ; preds = %10, %1
%23 = load i8, i8* %2
%24 = zext i8 %23 to i32
%25 = icmp sgt i32 %24, 15
br i1 %25, label %26, label %27
26: ; preds = %22
store i8 -1, i8* %2
br label %27
27: ; preds = %26, %22
%28 = load i8, i8* %2
ret i8 %28
}

LLVM IR (-O2):
define signext i8 @hex2int(i8 zeroext %0) {
%2 = add i8 %0, -48
%3 = icmp ugt i8 %2, 9
%4 = add i8 %0, -1
%5 = or i8 %4, 32
%6 = add i8 %5, -86
%7 = select i1 %3, i8 %6, i8 %2
%8 = icmp ugt i8 %7, 15
%9 = select i1 %8, i8 -1, i8 %7
ret i8 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char, char);
void print_hanoi(int count, char from, char to) {
  printf("no.%d disk, %c -> %c\n", count, from, to);
}


x86 assembly (clang, -O0):
<print_hanoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %sil,%cl
mov    %edi,-0x4(%rbp)
mov    %cl,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x5(%rbp),%al
lea    0xecd(%rip),%rdi
movsbl %al,%edx
movsbl -0x6(%rbp),%ecx
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_hanoi>:
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
lea    0xee3(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"no.%d disk, %c -> %c\0A\00"
define void @print_hanoi(i32 %0, i8 signext %1, i8 signext %2) {
%4 = alloca i32
%5 = alloca i8
%6 = alloca i8
store i32 %0, i32* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load i32, i32* %4
%8 = load i8, i8* %5
%9 = load i8, i8* %6
%10 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %7, i8 signext %8, i8 signext %9)
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"no.%d disk, %c -> %c\0A\00"
define void @print_hanoi(i32 %0, i8 signext %1, i8 signext %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %0, i8 signext %1, i8 signext %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int run();
int main() {
  int ret = 0;
  ret = run();
  printf("1 ret = %d\n", ret);
  ret = run();
  printf("2 ret = %d\n", ret);
  ret = run();
  printf("3 ret = %d\n", ret);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <run@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeb6(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <run@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xea9(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <run@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xe9c(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <run@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
call   1030 <run@plt>
lea    0xec8(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
call   1030 <run@plt>
lea    0xebf(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"1 ret = %d\0A\00"
@.str.1 = [12 x i8] c"2 ret = %d\0A\00"
@.str.2 = [12 x i8] c"3 ret = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = call i32 (...) @run()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = call i32 (...) @run()
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 %7)
%9 = call i32 (...) @run()
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0), i32 %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"1 ret = %d\0A\00"
@.str.1 = [12 x i8] c"2 ret = %d\0A\00"
@.str.2 = [12 x i8] c"3 ret = %d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @run()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 (...) @run()
%4 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 %3)
%5 = tail call i32 (...) @run()
%6 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0), i32 %5)
ret i32 0
}
void ARGBCopyYToAlphaRow_Any_AVX2() {}


x86 assembly (clang, -O0):
<ARGBCopyYToAlphaRow_Any_AVX2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBCopyYToAlphaRow_Any_AVX2>:
ret

LLVM IR (-O0):
define void @ARGBCopyYToAlphaRow_Any_AVX2() {
ret void
}

LLVM IR (-O2):
define void @ARGBCopyYToAlphaRow_Any_AVX2() {
ret void
}
/* Variables and functions */
scalar_t__ isnum(char);
char toupper(char);
int ishex(char c) { return isnum(c) || ((c = toupper(c)) >= 'A' && c <= 'F'); }


x86 assembly (clang, -O0):
<ishex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1040 <isnum@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x2(%rbp)
jne    1179 <ishex+0x59>
movsbl -0x1(%rbp),%edi
call   1030 <toupper@plt>
mov    %al,-0x1(%rbp)
movsbl %al,%ecx
xor    %eax,%eax
cmp    $0x41,%ecx
mov    %al,-0x3(%rbp)
jl     1173 <ishex+0x53>
movsbl -0x1(%rbp),%eax
cmp    $0x46,%eax
setle  %al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ishex>:
push   %rbx
mov    %edi,%ebx
call   1040 <isnum@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <ishex+0x17>
pop    %rbx
ret
movsbl %bl,%edi
call   1030 <toupper@plt>
mov    %eax,%ecx
add    $0xbf,%cl
xor    %eax,%eax
cmp    $0x6,%cl
setb   %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ishex(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @isnum(i8 signext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %17, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = call signext i8 @toupper(i8 signext %7)
store i8 %8, i8* %2
%9 = sext i8 %8 to i32
%10 = icmp sge i32 %9, 65
br i1 %10, label %11, label %15
11: ; preds = %6
%12 = load i8, i8* %2
%13 = sext i8 %12 to i32
%14 = icmp sle i32 %13, 70
br label %15
15: ; preds = %11, %6
%16 = phi i1 [ false, %6 ], [ %14, %11 ]
br label %17
17: ; preds = %15, %1
%18 = phi i1 [ true, %1 ], [ %16, %15 ]
%19 = zext i1 %18 to i32
ret i32 %19
}

LLVM IR (-O2):
define i32 @ishex(i8 signext %0) {
%2 = tail call i64 @isnum(i8 signext %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %9
4: ; preds = %1
%5 = tail call signext i8 @toupper(i8 signext %0)
%6 = add i8 %5, -65
%7 = icmp ult i8 %6, 6
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %4, %1
%10 = phi i32 [ 1, %1 ], [ %8, %4 ]
ret i32 %10
}
int getSequenceLength(int sequence) {
  switch (sequence) {
  case 140:
    return 14;
  case 134:
  case 37:
    return 9;
  case 70:
    return 7;
  case 64:
    return 40;
  case 87:
    return 1;
  default:
    return 8;
  }
}


x86 assembly (clang, -O0):
<getSequenceLength>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x25,%eax
je     1180 <getSequenceLength+0x80>
jmp    111b <getSequenceLength+0x1b>
mov    -0xc(%rbp),%eax
sub    $0x40,%eax
je     1198 <getSequenceLength+0x98>
jmp    112c <getSequenceLength+0x2c>
mov    -0xc(%rbp),%eax
sub    $0x46,%eax
je     118c <getSequenceLength+0x8c>
jmp    113d <getSequenceLength+0x3d>
mov    -0xc(%rbp),%eax
sub    $0x57,%eax
je     11a4 <getSequenceLength+0xa4>
jmp    114e <getSequenceLength+0x4e>
mov    -0xc(%rbp),%eax
sub    $0x86,%eax
je     1180 <getSequenceLength+0x80>
jmp    1161 <getSequenceLength+0x61>
mov    -0xc(%rbp),%eax
sub    $0x8c,%eax
jne    11b0 <getSequenceLength+0xb0>
jmp    1174 <getSequenceLength+0x74>
movl   $0xe,-0x4(%rbp)
jmp    11b7 <getSequenceLength+0xb7>
movl   $0x9,-0x4(%rbp)
jmp    11b7 <getSequenceLength+0xb7>
movl   $0x7,-0x4(%rbp)
jmp    11b7 <getSequenceLength+0xb7>
movl   $0x28,-0x4(%rbp)
jmp    11b7 <getSequenceLength+0xb7>
movl   $0x1,-0x4(%rbp)
jmp    11b7 <getSequenceLength+0xb7>
movl   $0x8,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getSequenceLength>:
cmp    $0x56,%edi
jg     111a <getSequenceLength+0x1a>
cmp    $0x25,%edi
je     112f <getSequenceLength+0x2f>
cmp    $0x40,%edi
je     1135 <getSequenceLength+0x35>
cmp    $0x46,%edi
jne    1147 <getSequenceLength+0x47>
mov    $0x7,%eax
ret
cmp    $0x57,%edi
je     113b <getSequenceLength+0x3b>
cmp    $0x8c,%edi
je     1141 <getSequenceLength+0x41>
cmp    $0x86,%edi
jne    1147 <getSequenceLength+0x47>
mov    $0x9,%eax
ret
mov    $0x28,%eax
ret
mov    $0x1,%eax
ret
mov    $0xe,%eax
ret
mov    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @getSequenceLength(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %10 [
i32 140, label %5
i32 134, label %6
i32 37, label %6
i32 70, label %7
i32 64, label %8
i32 87, label %9
]
5: ; preds = %1
store i32 14, i32* %2
br label %11
6: ; preds = %1, %1
store i32 9, i32* %2
br label %11
7: ; preds = %1
store i32 7, i32* %2
br label %11
8: ; preds = %1
store i32 40, i32* %2
br label %11
9: ; preds = %1
store i32 1, i32* %2
br label %11
10: ; preds = %1
store i32 8, i32* %2
br label %11
11: ; preds = %10, %9, %8, %7, %6, %5
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @getSequenceLength(i32 %0) {
switch i32 %0, label %6 [
i32 140, label %7
i32 134, label %2
i32 37, label %2
i32 70, label %3
i32 64, label %4
i32 87, label %5
]
2: ; preds = %1, %1
br label %7
3: ; preds = %1
br label %7
4: ; preds = %1
br label %7
5: ; preds = %1
br label %7
6: ; preds = %1
br label %7
7: ; preds = %1, %6, %5, %4, %3, %2
%8 = phi i32 [ 8, %6 ], [ 1, %5 ], [ 40, %4 ], [ 7, %3 ], [ 9, %2 ], [ 14, %1 ]
ret i32 %8
}
void pci_set_bus_of_node(struct pci_bus *bus) {}


x86 assembly (clang, -O0):
<pci_set_bus_of_node>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_set_bus_of_node>:
ret

LLVM IR (-O0):
%struct.pci_bus = type opaque
define void @pci_set_bus_of_node(%struct.pci_bus* %0) {
%2 = alloca %struct.pci_bus*
store %struct.pci_bus* %0, %struct.pci_bus** %2
ret void
}

LLVM IR (-O2):
%struct.pci_bus = type opaque
define void @pci_set_bus_of_node(%struct.pci_bus* nocapture %0) {
ret void
}
long ffi_test_22(long x, long long y, long long z) { return x + y / z; }


x86 assembly (clang, -O0):
<ffi_test_22>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
cqto
idivq  -0x18(%rbp)
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffi_test_22>:
mov    %rdx,%rcx
mov    %rsi,%rax
mov    %rsi,%rdx
or     %rcx,%rdx
shr    $0x20,%rdx
je     111b <ffi_test_22+0x1b>
cqto
idiv   %rcx
add    %rdi,%rax
ret
xor    %edx,%edx
div    %ecx
add    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @ffi_test_22(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = sdiv i64 %8, %9
%11 = add nsw i64 %7, %10
ret i64 %11
}

LLVM IR (-O2):
define i64 @ffi_test_22(i64 %0, i64 %1, i64 %2) {
%4 = sdiv i64 %1, %2
%5 = add nsw i64 %4, %0
ret i64 %5
}
double f4_sum_pre_int_int_int_int_int(int v0, int v1, int v2, int v3, int v) {
  return (double)v0 + (double)v1 + (double)v2 + (double)v3 + ((double)(v));
}


x86 assembly (clang, -O0):
<f4_sum_pre_int_int_int_int_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
cvtsi2sdl -0x8(%rbp),%xmm1
addsd  %xmm1,%xmm0
cvtsi2sdl -0xc(%rbp),%xmm1
addsd  %xmm1,%xmm0
cvtsi2sdl -0x10(%rbp),%xmm1
addsd  %xmm1,%xmm0
cvtsi2sdl -0x14(%rbp),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4_sum_pre_int_int_int_int_int>:
cvtsi2sd %edi,%xmm0
cvtsi2sd %esi,%xmm1
cvtsi2sd %edx,%xmm2
addsd  %xmm0,%xmm1
addsd  %xmm1,%xmm2
xorps  %xmm1,%xmm1
cvtsi2sd %ecx,%xmm1
addsd  %xmm2,%xmm1
xorps  %xmm0,%xmm0
cvtsi2sd %r8d,%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @f4_sum_pre_int_int_int_int_int(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = sitofp i32 %11 to double
%13 = load i32, i32* %7
%14 = sitofp i32 %13 to double
%15 = fadd double %12, %14
%16 = load i32, i32* %8
%17 = sitofp i32 %16 to double
%18 = fadd double %15, %17
%19 = load i32, i32* %9
%20 = sitofp i32 %19 to double
%21 = fadd double %18, %20
%22 = load i32, i32* %10
%23 = sitofp i32 %22 to double
%24 = fadd double %21, %23
ret double %24
}

LLVM IR (-O2):
define double @f4_sum_pre_int_int_int_int_int(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = sitofp i32 %0 to double
%7 = sitofp i32 %1 to double
%8 = fadd double %6, %7
%9 = sitofp i32 %2 to double
%10 = fadd double %8, %9
%11 = sitofp i32 %3 to double
%12 = fadd double %10, %11
%13 = sitofp i32 %4 to double
%14 = fadd double %12, %13
ret double %14
}
const char *Alloc_Brief(void) { return "Memory Allocation"; }


x86 assembly (clang, -O0):
<Alloc_Brief>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Alloc_Brief>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [18 x i8] c"Memory Allocation\00"
define i8* @Alloc_Brief() {
ret i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [18 x i8] c"Memory Allocation\00"
define i8* @Alloc_Brief() {
ret i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0)
}
int fun838() { return 838; }


x86 assembly (clang, -O0):
<fun838>:
push   %rbp
mov    %rsp,%rbp
mov    $0x346,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun838>:
mov    $0x346,%eax
ret

LLVM IR (-O0):
define i32 @fun838() {
ret i32 838
}

LLVM IR (-O2):
define i32 @fun838() {
ret i32 838
}
int xrdp_rdp_process_data_pointer(struct xrdp_rdp *self, struct stream *s) {
  return 0;
}


x86 assembly (clang, -O0):
<xrdp_rdp_process_data_pointer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrdp_rdp_process_data_pointer>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.xrdp_rdp = type opaque
%struct.stream = type opaque
define i32 @xrdp_rdp_process_data_pointer(%struct.xrdp_rdp* %0, %struct.stream* %1) {
%3 = alloca %struct.xrdp_rdp*
%4 = alloca %struct.stream*
store %struct.xrdp_rdp* %0, %struct.xrdp_rdp** %3
store %struct.stream* %1, %struct.stream** %4
ret i32 0
}

LLVM IR (-O2):
%struct.xrdp_rdp = type opaque
%struct.stream = type opaque
define i32 @xrdp_rdp_process_data_pointer(%struct.xrdp_rdp* nocapture readnone %0, %struct.stream* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ pinMode(int, int);
int /*<<< orphan*/ sleep(int);
int /*<<< orphan*/ wiringXPWMEnable(int, int);
int /*<<< orphan*/ wiringXSetPWM(int, int, int);
int /*<<< orphan*/ wiringXSetup();
int main(void) {
  int pin = 4;
  wiringXSetup();
  pinMode(pin, 2);
  wiringXPWMEnable(pin, 0);
  wiringXSetPWM(pin, 1000, 50);
  wiringXPWMEnable(pin, 1);
  sleep(15);
  wiringXPWMEnable(pin, 0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x4,-0x4(%rbp)
mov    $0x0,%al
call   1030 <wiringXSetup@plt>
mov    -0x4(%rbp),%edi
mov    $0x2,%esi
call   1060 <pinMode@plt>
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1040 <wiringXPWMEnable@plt>
mov    -0x4(%rbp),%edi
mov    $0x3e8,%esi
mov    $0x32,%edx
call   1050 <wiringXSetPWM@plt>
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1040 <wiringXPWMEnable@plt>
mov    $0xf,%edi
call   1070 <sleep@plt>
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1040 <wiringXPWMEnable@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <wiringXSetup@plt>
mov    $0x4,%edi
mov    $0x2,%esi
call   1060 <pinMode@plt>
mov    $0x4,%edi
xor    %esi,%esi
call   1040 <wiringXPWMEnable@plt>
mov    $0x4,%edi
mov    $0x3e8,%esi
mov    $0x32,%edx
call   1050 <wiringXSetPWM@plt>
mov    $0x4,%edi
mov    $0x1,%esi
call   1040 <wiringXPWMEnable@plt>
mov    $0xf,%edi
call   1070 <sleep@plt>
mov    $0x4,%edi
xor    %esi,%esi
call   1040 <wiringXPWMEnable@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 4, i32* %1
%2 = call i32 (...) @wiringXSetup()
%3 = load i32, i32* %1
%4 = call i32 @pinMode(i32 %3, i32 2)
%5 = load i32, i32* %1
%6 = call i32 @wiringXPWMEnable(i32 %5, i32 0)
%7 = load i32, i32* %1
%8 = call i32 @wiringXSetPWM(i32 %7, i32 1000, i32 50)
%9 = load i32, i32* %1
%10 = call i32 @wiringXPWMEnable(i32 %9, i32 1)
%11 = call i32 @sleep(i32 15)
%12 = load i32, i32* %1
%13 = call i32 @wiringXPWMEnable(i32 %12, i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @wiringXSetup()
%2 = tail call i32 @pinMode(i32 4, i32 2)
%3 = tail call i32 @wiringXPWMEnable(i32 4, i32 0)
%4 = tail call i32 @wiringXSetPWM(i32 4, i32 1000, i32 50)
%5 = tail call i32 @wiringXPWMEnable(i32 4, i32 1)
%6 = tail call i32 @sleep(i32 15)
%7 = tail call i32 @wiringXPWMEnable(i32 4, i32 0)
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t reorder32(uint32_t n) {
  return ((n & 0xff) << 24) | ((n & 0xff00) << 8) | ((n & 0xff0000) >> 8) |
         ((n & 0xff000000) >> 24);
}


x86 assembly (clang, -O0):
<reorder32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
shl    $0x18,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff0000,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff000000,%ecx
shr    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reorder32>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @reorder32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
%5 = shl i32 %4, 24
%6 = load i32, i32* %2
%7 = and i32 %6, 65280
%8 = shl i32 %7, 8
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = and i32 %10, 16711680
%12 = ashr i32 %11, 8
%13 = or i32 %9, %12
%14 = load i32, i32* %2
%15 = and i32 %14, -16777216
%16 = lshr i32 %15, 24
%17 = or i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @reorder32(i32 %0) {
%2 = tail call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
f(unsigned char x) { return (0x50 | (x >> 4)) ^ 0xff; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
sar    $0x4,%eax
or     $0x50,%eax
xor    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
shr    $0x4,%dil
xor    $0xaf,%dil
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @f(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = ashr i32 %4, 4
%6 = or i32 80, %5
%7 = xor i32 %6, 255
ret i32 %7
}

LLVM IR (-O2):
define i32 @f(i8 zeroext %0) {
%2 = lshr i8 %0, 4
%3 = xor i8 %2, -81
%4 = zext i8 %3 to i32
ret i32 %4
}
int test_imm_E2uint16_reg(unsigned short val) {
  return ((val) & (0xE2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E2uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xe2,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E2uint16_reg>:
test   $0xe2,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E2uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 226
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E2uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 226
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int cas(volatile int *addr, int expected, int newval) {
  int result = 0;
  asm volatile("lock\n\t"
               "cmpxchg %3, %0\n\t"
               "setz %%al\n\t"
               "movzx %%al, %1\n\t"
               : "+m"(*addr), "=r"(result)
               : "a"(expected), "b"(newval)
               : "cc");
  return result;
}


x86 assembly (clang, -O0):
<cas>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%eax
mov    -0x18(%rbp),%ebx
lock cmpxchg %ebx,(%rcx)
sete   %al
movzbl %al,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<cas>:
push   %rbx
mov    %edx,%ebx
mov    %esi,%eax
lock cmpxchg %ebx,(%rdi)
sete   %al
movzbl %al,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @cas(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 asm sideeffect "lock\0A\09cmpxchg $3, $0\0A\09setz %al\0A\09movzx %al, $1\0A\09", "=*m,=r,{ax},{bx},*m,~{cc},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %8, i32 %9, i32 %10, i32* elementtype(i32) %8)
store i32 %11, i32* %7
%12 = load i32, i32* %7
ret i32 %12
}

LLVM IR (-O2):
define i32 @cas(i32* %0, i32 %1, i32 %2) {
%4 = tail call i32 asm sideeffect "lock\0A\09cmpxchg $3, $0\0A\09setz %al\0A\09movzx %al, $1\0A\09", "=*m,=r,{ax},{bx},*m,~{cc},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %0, i32 %1, i32 %2, i32* elementtype(i32) %0)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ SYS_brk;
int syscall_1(int /*<<< orphan*/, long);
int brk(void *end_data_segment) {
  int ret;
  ret = syscall_1(SYS_brk, ((long)(end_data_segment)));
  return ret;
}


x86 assembly (clang, -O0):
<brk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <syscall_1@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<brk>:
mov    %rdi,%rsi
mov    0x2ece(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall_1@plt>

LLVM IR (-O0):
@SYS_brk = global i32 0
define i32 @brk(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i32, i32* @SYS_brk
%5 = load i8*, i8** %2
%6 = ptrtoint i8* %5 to i64
%7 = call i32 @syscall_1(i32 %4, i64 %6)
store i32 %7, i32* %3
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
@SYS_brk = global i32 0
define i32 @brk(i8* %0) {
%2 = load i32, i32* @SYS_brk
%3 = ptrtoint i8* %0 to i64
%4 = tail call i32 @syscall_1(i32 %2, i64 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ one_more();
void local_func() { one_more(); }


x86 assembly (clang, -O0):
<local_func>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <one_more@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<local_func>:
xor    %eax,%eax
jmp    1030 <one_more@plt>

LLVM IR (-O0):
define void @local_func() {
%1 = call i32 (...) @one_more()
ret void
}

LLVM IR (-O2):
define void @local_func() {
%1 = tail call i32 (...) @one_more()
ret void
}
/* Type definitions */
struct net_device {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ BUG_ON(int);
struct net_device *alloc_etherdev(int);
struct net_device *alloc_etherdev_mq(int sizeof_priv,
                                     unsigned int queue_count) {
  BUG_ON(queue_count != 1);
  return alloc_etherdev(sizeof_priv);
}


x86 assembly (clang, -O0):
<alloc_etherdev_mq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <BUG_ON@plt>
mov    -0x4(%rbp),%edi
call   1040 <alloc_etherdev@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_etherdev_mq>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
cmp    $0x1,%esi
setne  %dil
call   1030 <BUG_ON@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <alloc_etherdev@plt>

LLVM IR (-O0):
%struct.net_device = type { i32 }
define %struct.net_device* @alloc_etherdev_mq(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 1
%7 = zext i1 %6 to i32
%8 = call i32 @BUG_ON(i32 %7)
%9 = load i32, i32* %3
%10 = call %struct.net_device* @alloc_etherdev(i32 %9)
ret %struct.net_device* %10
}

LLVM IR (-O2):
%struct.net_device = type { i32 }
define %struct.net_device* @alloc_etherdev_mq(i32 %0, i32 %1) {
%3 = icmp ne i32 %1, 1
%4 = zext i1 %3 to i32
%5 = tail call i32 @BUG_ON(i32 %4)
%6 = tail call %struct.net_device* @alloc_etherdev(i32 %0)
ret %struct.net_device* %6
}
/* Variables and functions */
int /*<<< orphan*/ dwrite_ascfile(char const *, double const, double const,
                                  int const, double const *);
void DWRITE_ASCFILE_C(const char *name, const double *t0, const double *dt,
                      const int *n, const double *data) {
  dwrite_ascfile(name, *t0, *dt, *n, data);
}


x86 assembly (clang, -O0):
<DWRITE_ASCFILE_C>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x18(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x20(%rbp),%rax
mov    (%rax),%esi
mov    -0x28(%rbp),%rdx
call   1030 <dwrite_ascfile@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DWRITE_ASCFILE_C>:
movsd  (%rsi),%xmm0
movsd  (%rdx),%xmm1
mov    (%rcx),%esi
mov    %r8,%rdx
jmp    1030 <dwrite_ascfile@plt>

LLVM IR (-O0):
define void @DWRITE_ASCFILE_C(i8* %0, double* %1, double* %2, i32* %3, double* %4) {
%6 = alloca i8*
%7 = alloca double*
%8 = alloca double*
%9 = alloca i32*
%10 = alloca double*
store i8* %0, i8** %6
store double* %1, double** %7
store double* %2, double** %8
store i32* %3, i32** %9
store double* %4, double** %10
%11 = load i8*, i8** %6
%12 = load double*, double** %7
%13 = load double, double* %12
%14 = load double*, double** %8
%15 = load double, double* %14
%16 = load i32*, i32** %9
%17 = load i32, i32* %16
%18 = load double*, double** %10
%19 = call i32 @dwrite_ascfile(i8* %11, double %13, double %15, i32 %17, double* %18)
ret void
}

LLVM IR (-O2):
define void @DWRITE_ASCFILE_C(i8* %0, double* nocapture %1, double* nocapture %2, i32* nocapture %3, double* %4) {
%6 = load double, double* %1
%7 = load double, double* %2
%8 = load i32, i32* %3
%9 = tail call i32 @dwrite_ascfile(i8* %0, double %6, double %7, i32 %8, double* %4)
ret void
}