xunge/DecIR huggingface dataset:
/* Type definitions */
struct hostent {
  int dummy;
};

/* Variables and functions */
struct hostent *o_gethostbyname(char const *);
struct hostent *f_gethostbyname(const char *name) {
  return o_gethostbyname(name);
}


x86 assembly (clang, -O0):
<f_gethostbyname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <o_gethostbyname@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_gethostbyname>:
jmp    1030 <o_gethostbyname@plt>

LLVM IR (-O0):
%struct.hostent = type { i32 }
define %struct.hostent* @f_gethostbyname(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call %struct.hostent* @o_gethostbyname(i8* %3)
ret %struct.hostent* %4
}

LLVM IR (-O2):
%struct.hostent = type { i32 }
define %struct.hostent* @f_gethostbyname(i8* %0) {
%2 = tail call %struct.hostent* @o_gethostbyname(i8* %0)
ret %struct.hostent* %2
}
void SIO1writeData16(unsigned short val) {}


x86 assembly (clang, -O0):
<SIO1writeData16>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SIO1writeData16>:
ret

LLVM IR (-O0):
define void @SIO1writeData16(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
ret void
}

LLVM IR (-O2):
define void @SIO1writeData16(i16 zeroext %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Fish001();
int /*<<< orphan*/ Fish002();
int /*<<< orphan*/ Fish003();
int /*<<< orphan*/ Fish004();
int /*<<< orphan*/ Fish005();
int /*<<< orphan*/ Fish006();
int /*<<< orphan*/ Fish007();
int /*<<< orphan*/ Fish008();
int /*<<< orphan*/ Fish009();
void Fish_2(void) {
  Fish005();
  Fish004();
  Fish003();
  Fish008();
  Fish006();
  Fish002();
  Fish007();
  Fish009();
  Fish001();
}


x86 assembly (clang, -O0):
<Fish_2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Fish005@plt>
mov    $0x0,%al
call   10a0 <Fish004@plt>
mov    $0x0,%al
call   1040 <Fish003@plt>
mov    $0x0,%al
call   10b0 <Fish008@plt>
mov    $0x0,%al
call   1090 <Fish006@plt>
mov    $0x0,%al
call   1080 <Fish002@plt>
mov    $0x0,%al
call   1060 <Fish007@plt>
mov    $0x0,%al
call   1070 <Fish009@plt>
mov    $0x0,%al
call   1050 <Fish001@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Fish_2>:
push   %rax
xor    %eax,%eax
call   1030 <Fish005@plt>
xor    %eax,%eax
call   10a0 <Fish004@plt>
xor    %eax,%eax
call   1040 <Fish003@plt>
xor    %eax,%eax
call   10b0 <Fish008@plt>
xor    %eax,%eax
call   1090 <Fish006@plt>
xor    %eax,%eax
call   1080 <Fish002@plt>
xor    %eax,%eax
call   1060 <Fish007@plt>
xor    %eax,%eax
call   1070 <Fish009@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <Fish001@plt>

LLVM IR (-O0):
define void @Fish_2() {
%1 = call i32 (...) @Fish005()
%2 = call i32 (...) @Fish004()
%3 = call i32 (...) @Fish003()
%4 = call i32 (...) @Fish008()
%5 = call i32 (...) @Fish006()
%6 = call i32 (...) @Fish002()
%7 = call i32 (...) @Fish007()
%8 = call i32 (...) @Fish009()
%9 = call i32 (...) @Fish001()
ret void
}

LLVM IR (-O2):
define void @Fish_2() {
%1 = tail call i32 (...) @Fish005()
%2 = tail call i32 (...) @Fish004()
%3 = tail call i32 (...) @Fish003()
%4 = tail call i32 (...) @Fish008()
%5 = tail call i32 (...) @Fish006()
%6 = tail call i32 (...) @Fish002()
%7 = tail call i32 (...) @Fish007()
%8 = tail call i32 (...) @Fish009()
%9 = tail call i32 (...) @Fish001()
ret void
}
void av_match_ext() {}


x86 assembly (clang, -O0):
<av_match_ext>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_match_ext>:
ret

LLVM IR (-O0):
define void @av_match_ext() {
ret void
}

LLVM IR (-O2):
define void @av_match_ext() {
ret void
}
void gdk_threads_enter() {}


x86 assembly (clang, -O0):
<gdk_threads_enter>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_threads_enter>:
ret

LLVM IR (-O0):
define void @gdk_threads_enter() {
ret void
}

LLVM IR (-O2):
define void @gdk_threads_enter() {
ret void
}
/* Variables and functions */
int strlen(char const *);
int strspn(char const *, char const *);
int avm_check_name(const char *avm_name) {
  static const char *goodchars =
      "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ_-0123456789.";
  int len = strlen(avm_name);
  int slen = strspn(avm_name, goodchars);
  return (len == slen);
}


x86 assembly (clang, -O0):
<avm_check_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eed(%rip),%rsi
call   1040 <strspn@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avm_check_name>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %eax,%ebp
lea    0xecc(%rip),%rsi
mov    %rbx,%rdi
call   1040 <strspn@plt>
xor    %ecx,%ecx
cmp    %eax,%ebp
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@avm_check_name.goodchars = internal global i8* getelementptr inbounds ([66 x i8], [66 x i8]* @.str, i32 0, i32 0)
@.str = [66 x i8] c"abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ_-0123456789.\00"
define i32 @avm_check_name(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
store i32 %6, i32* %3
%7 = load i8*, i8** %2
%8 = load i8*, i8** @avm_check_name.goodchars
%9 = call i32 @strspn(i8* %7, i8* %8)
store i32 %9, i32* %4
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = icmp eq i32 %10, %11
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
@.str = [66 x i8] c"abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ_-0123456789.\00"
define i32 @avm_check_name(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32 @strspn(i8* %0, i8* getelementptr inbounds ([66 x i8], [66 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i32 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ ad9361_spi_op(int, int);
void ad9361_spi_write(int addr, int data) {
  addr &= 0x3ff;
  addr |= 0x8000;
  ad9361_spi_op(addr, data);
}


x86 assembly (clang, -O0):
<ad9361_spi_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x3ff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
or     $0x8000,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <ad9361_spi_op@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ad9361_spi_write>:
and    $0x3ff,%edi
or     $0x8000,%edi
jmp    1030 <ad9361_spi_op@plt>

LLVM IR (-O0):
define void @ad9361_spi_write(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = and i32 %5, 1023
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = or i32 %7, 32768
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = call i32 @ad9361_spi_op(i32 %9, i32 %10)
ret void
}

LLVM IR (-O2):
define void @ad9361_spi_write(i32 %0, i32 %1) {
%3 = and i32 %0, 1023
%4 = or i32 %3, 32768
%5 = tail call i32 @ad9361_spi_op(i32 %4, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_usage() {
  printf("Usage: ./set_test_sched -t/-m scheduler\n"
         "Scheduler should be one of NORMAL, FIFO or RR\n");
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [87 x i8] c"Usage: ./set_test_sched -t/-m scheduler\0AScheduler should be one of NORMAL, FIFO or RR\0A\00"
define void @print_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([87 x i8], [87 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [86 x i8] c"Usage: ./set_test_sched -t/-m scheduler\0AScheduler should be one of NORMAL, FIFO or RR\00"
define void @print_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([86 x i8], [86 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_bus_call_method(void *bus, const char *destination, const char *path,
                   const char *interface, const char *member, void *ret_error,
                   void **reply, const char *types, ...) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_bus_call_method>:
push   %rbp
mov    %rsp,%rbp
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    0x2eb5(%rip),%rax
mov    (%rax),%eax
neg    %eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_call_method>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_bus_call_method(i8* %0, i8* %1, i8* %2, i8* %3, i8* %4, i8* %5, i8** %6, i8* %7, ...) {
%9 = alloca i8*
%10 = alloca i8*
%11 = alloca i8*
%12 = alloca i8*
%13 = alloca i8*
%14 = alloca i8*
%15 = alloca i8**
%16 = alloca i8*
store i8* %0, i8** %9
store i8* %1, i8** %10
store i8* %2, i8** %11
store i8* %3, i8** %12
store i8* %4, i8** %13
store i8* %5, i8** %14
store i8** %6, i8*** %15
store i8* %7, i8** %16
%17 = load i32, i32* @EINVAL
%18 = sub nsw i32 0, %17
ret i32 %18
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_bus_call_method(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i8* nocapture readnone %3, i8* nocapture readnone %4, i8* nocapture readnone %5, i8** nocapture readnone %6, i8* nocapture readnone %7, ...) {
%9 = load i32, i32* @EINVAL
%10 = sub nsw i32 0, %9
ret i32 %10
}
void g_type_default_interface_peek() {}


x86 assembly (clang, -O0):
<g_type_default_interface_peek>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_type_default_interface_peek>:
ret

LLVM IR (-O0):
define void @g_type_default_interface_peek() {
ret void
}

LLVM IR (-O2):
define void @g_type_default_interface_peek() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isprint(int);
void t_isprint_0xba() {
  Assert_real((isprint(186) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              935, ("isprint should be 0 for 0xba"));
}


x86 assembly (clang, -O0):
<t_isprint_0xba>:
push   %rbp
mov    %rsp,%rbp
mov    $0xba,%edi
call   1030 <isprint@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3a7,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0xba>:
push   %rax
mov    $0xba,%edi
call   1030 <isprint@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3a7,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xba\00"
define void @t_isprint_0xba() {
%1 = call i64 @isprint(i32 186)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 935, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xba\00"
define void @t_isprint_0xba() {
%1 = tail call i64 @isprint(i32 186)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 935, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
getnumb(ap) register char *ap;
{
  register int n, c;
  n = 0;
  while ((c = *ap++) >= '0' && c <= '9')
    n = n * 10 + c - '0';
  return (n);
}


x86 assembly (clang, -O0):
<getnumb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%ecx
mov    %ecx,-0x10(%rbp)
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x11(%rbp)
jl     113c <getnumb+0x3c>
cmpl   $0x39,-0x10(%rbp)
setle  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    114c <getnumb+0x4c>
jmp    115e <getnumb+0x5e>
imul   $0xa,-0xc(%rbp),%eax
add    -0x10(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <getnumb+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getnumb>:
mov    (%rdi),%cl
lea    -0x30(%rcx),%edx
xor    %eax,%eax
cmp    $0x9,%dl
ja     113b <getnumb+0x3b>
add    $0x1,%rdi
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl %cl,%ecx
lea    (%rax,%rax,4),%eax
lea    (%rcx,%rax,2),%eax
add    $0xffffffd0,%eax
movzbl (%rdi),%ecx
lea    -0x30(%rcx),%edx
add    $0x1,%rdi
cmp    $0xa,%dl
jb     1120 <getnumb+0x20>
ret

LLVM IR (-O0):
define i32 @getnumb(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %5
5: ; preds = %16, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
store i32 %9, i32* %4
%10 = icmp sge i32 %9, 48
br i1 %10, label %11, label %14
11: ; preds = %5
%12 = load i32, i32* %4
%13 = icmp sle i32 %12, 57
br label %14
14: ; preds = %11, %5
%15 = phi i1 [ false, %5 ], [ %13, %11 ]
br i1 %15, label %16, label %22
16: ; preds = %14
%17 = load i32, i32* %3
%18 = mul nsw i32 %17, 10
%19 = load i32, i32* %4
%20 = add nsw i32 %18, %19
%21 = sub nsw i32 %20, 48
store i32 %21, i32* %3
br label %5
22: ; preds = %14
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @getnumb(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = add i8 %2, -48
%4 = icmp ult i8 %3, 10
br i1 %4, label %5, label %17
5: ; preds = %1, %5
%6 = phi i8 [ %14, %5 ], [ %2, %1 ]
%7 = phi i8* [ %10, %5 ], [ %0, %1 ]
%8 = phi i32 [ %13, %5 ], [ 0, %1 ]
%9 = zext i8 %6 to i32
%10 = getelementptr inbounds i8, i8* %7, i64 1
%11 = mul nsw i32 %8, 10
%12 = add i32 %11, -48
%13 = add i32 %12, %9
%14 = load i8, i8* %10
%15 = add i8 %14, -48
%16 = icmp ult i8 %15, 10
br i1 %16, label %5, label %17
17: ; preds = %5, %1
%18 = phi i32 [ 0, %1 ], [ %13, %5 ]
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
main() {
  if (sizeof(long) == 8) {
    printf("-DLONG8\n");
  } else if (sizeof(long) == 4) {
    printf("-DLONG4\n");
  }
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"-DLONG8\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [8 x i8] c"-DLONG8\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
uint16_t sancus_u16l(long v) {
  assert((v >= 0) && (v <= 0xffff));
  return (uint16_t)v;
}


x86 assembly (clang, -O0):
<sancus_u16l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x9(%rbp)
jl     113a <sancus_u16l+0x2a>
cmpq   $0xffff,-0x8(%rbp)
setle  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sancus_u16l>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
cmp    $0x10000,%rbx
setb   %dil
call   1030 <assert@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @sancus_u16l(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp sge i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i64, i64* %2
%7 = icmp sle i64 %6, 65535
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = call i32 @assert(i32 %10)
%12 = load i64, i64* %2
%13 = trunc i64 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @sancus_u16l(i64 %0) {
%2 = icmp ult i64 %0, 65536
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = trunc i64 %0 to i32
ret i32 %5
}
void PiComs_DisableTxInt(void) {}


x86 assembly (clang, -O0):
<PiComs_DisableTxInt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PiComs_DisableTxInt>:
ret

LLVM IR (-O0):
define void @PiComs_DisableTxInt() {
ret void
}

LLVM IR (-O2):
define void @PiComs_DisableTxInt() {
ret void
}
int os2_netbreak(void) { return (-1); }


x86 assembly (clang, -O0):
<os2_netbreak>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<os2_netbreak>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @os2_netbreak() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @os2_netbreak() {
ret i32 -1
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;
typedef int /*<<< orphan*/ __m128d;

/* Variables and functions */
int /*<<< orphan*/ _mm_cvttpd_pi32(int /*<<< orphan*/);
__m64 test18(__m128d a) { return _mm_cvttpd_pi32(a); }


x86 assembly (clang, -O0):
<test18>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_mm_cvttpd_pi32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test18>:
jmp    1030 <_mm_cvttpd_pi32@plt>

LLVM IR (-O0):
define i32 @test18(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_mm_cvttpd_pi32(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test18(i32 %0) {
%2 = tail call i32 @_mm_cvttpd_pi32(i32 %0)
ret i32 %2
}
/* Variables and functions */
float fromRep32(int);
float makeQNaN32() { return fromRep32(0x7fc00000U); }


x86 assembly (clang, -O0):
<makeQNaN32>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7fc00000,%edi
call   1030 <fromRep32@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<makeQNaN32>:
mov    $0x7fc00000,%edi
jmp    1030 <fromRep32@plt>

LLVM IR (-O0):
define float @makeQNaN32() {
%1 = call float @fromRep32(i32 2143289344)
ret float %1
}

LLVM IR (-O2):
define float @makeQNaN32() {
%1 = tail call float @fromRep32(i32 2143289344)
ret float %1
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ SEEK_SET;
scalar_t__ fgetc(int /*<<< orphan*/ *);
int fseek(int /*<<< orphan*/ *, int /*<<< orphan*/, int /*<<< orphan*/);
long ftell(int /*<<< orphan*/ *);
long file_size(FILE *stream) {
  int failure;
  failure = fseek(stream, SEEK_SET, 0);
  if (failure)
    return -1L;
  while (fgetc(stream) >= 0)
    ;
  return ftell(stream);
}


x86 assembly (clang, -O0):
<file_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    0x2e99(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1050 <fseek@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     116a <file_size+0x3a>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    1194 <file_size+0x64>
jmp    116f <file_size+0x3f>
mov    -0x10(%rbp),%rdi
call   1030 <fgetc@plt>
cmp    $0x0,%rax
jl     1187 <file_size+0x57>
jmp    116f <file_size+0x3f>
mov    -0x10(%rbp),%rdi
call   1040 <ftell@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_size>:
push   %rbx
mov    %rdi,%rbx
mov    0x2ea5(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1050 <fseek@plt>
test   %eax,%eax
je     1160 <file_size+0x30>
mov    $0xffffffffffffffff,%rax
pop    %rbx
ret
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <fgetc@plt>
test   %rax,%rax
jns    1160 <file_size+0x30>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <ftell@plt>

LLVM IR (-O0):
@SEEK_SET = global i32 0
define i64 @file_size(i32* %0) {
%2 = alloca i64
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
%5 = load i32*, i32** %3
%6 = load i32, i32* @SEEK_SET
%7 = call i32 @fseek(i32* %5, i32 %6, i32 0)
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %1
store i64 -1, i64* %2
br label %20
11: ; preds = %1
br label %12
12: ; preds = %16, %11
%13 = load i32*, i32** %3
%14 = call i64 @fgetc(i32* %13)
%15 = icmp sge i64 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %12
br label %12
17: ; preds = %12
%18 = load i32*, i32** %3
%19 = call i64 @ftell(i32* %18)
store i64 %19, i64* %2
br label %20
20: ; preds = %17, %10
%21 = load i64, i64* %2
ret i64 %21
}

LLVM IR (-O2):
@SEEK_SET = global i32 0
define i64 @file_size(i32* nocapture %0) {
%2 = load i32, i32* @SEEK_SET
%3 = tail call i32 @fseek(i32* %0, i32 %2, i32 0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %10
5: ; preds = %1, %5
%6 = tail call i64 @fgetc(i32* %0)
%7 = icmp sgt i64 %6, -1
br i1 %7, label %5, label %8
8: ; preds = %5
%9 = tail call i64 @ftell(i32* %0)
br label %10
10: ; preds = %1, %8
%11 = phi i64 [ %9, %8 ], [ -1, %1 ]
ret i64 %11
}
int __test() {
  int x = 3;
  int y = 4;
  int z = 2;
  return z ? x : y;
}


x86 assembly (clang, -O0):
<__test>:
push   %rbp
mov    %rsp,%rbp
movl   $0x3,-0x4(%rbp)
movl   $0x4,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     112e <__test+0x2e>
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1134 <__test+0x34>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__test>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @__test() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 3, i32* %1
store i32 4, i32* %2
store i32 2, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = load i32, i32* %1
br label %10
8: ; preds = %0
%9 = load i32, i32* %2
br label %10
10: ; preds = %8, %6
%11 = phi i32 [ %7, %6 ], [ %9, %8 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @__test() {
ret i32 3
}
char *encodeJSON(struct TObject *objects) { return 0; }


x86 assembly (clang, -O0):
<encodeJSON>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<encodeJSON>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.TObject = type opaque
define i8* @encodeJSON(%struct.TObject* %0) {
%2 = alloca %struct.TObject*
store %struct.TObject* %0, %struct.TObject** %2
ret i8* null
}

LLVM IR (-O2):
%struct.TObject = type opaque
define noalias i8* @encodeJSON(%struct.TObject* nocapture readnone %0) {
ret i8* null
}
unsigned int bitSet(unsigned int value, unsigned int bit) {
  return ((value) |= (1UL << (bit)));
}


x86 assembly (clang, -O0):
<bitSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
mov    %rax,%rcx
mov    -0x4(%rbp),%eax
or     %rcx,%rax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitSet>:
mov    %esi,%ecx
mov    $0x1,%eax
shl    %cl,%rax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @bitSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = zext i32 %5 to i64
%7 = shl i64 1, %6
%8 = load i32, i32* %3
%9 = zext i32 %8 to i64
%10 = or i64 %9, %7
%11 = trunc i64 %10 to i32
store i32 %11, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @bitSet(i32 %0, i32 %1) {
%3 = zext i32 %1 to i64
%4 = shl nuw i64 1, %3
%5 = trunc i64 %4 to i32
%6 = or i32 %5, %0
ret i32 %6
}
int test_imm_1Buint8_mem(unsigned char *val) {
  return ((*val) & (-0x1B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Buint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffffe5,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Buint8_mem>:
testb  $0xe5,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Buint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -27
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_1Buint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -27
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void a_or(volatile int *p, int v) {
  __asm__("lock ; orl %1, %0" : "=m"(*p) : "r"(v) : "memory");
}


x86 assembly (clang, -O0):
<a_or>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
lock or %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_or>:
lock or %esi,(%rdi)
ret

LLVM IR (-O0):
define void @a_or(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
define void @a_or(i32* %0, i32 %1) {
tail call void asm "lock ; orl $1, $0", "=*m,r,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ g(int *, int);
void f(int x, int *y, int *z) {
  if (x > 0) {
    f(x - 2, y, z);
    g(z, x);
  } else
    *z = *y;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1161 <f+0x41>
mov    -0x4(%rbp),%edi
sub    $0x2,%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <f@plt>
mov    -0x18(%rbp),%rdi
mov    -0x4(%rbp),%esi
call   1040 <g@plt>
jmp    116d <f+0x4d>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
test   %edi,%edi
jle    1149 <f+0x29>
mov    %edi,%ebx
lea    -0x2(%rbx),%edi
mov    %r14,%rdx
call   1030 <f@plt>
mov    %r14,%rdi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <g@plt>
mov    (%rsi),%eax
mov    %eax,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @f(i32 %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %3
%10 = load i32, i32* %4
%11 = sub nsw i32 %10, 2
%12 = load i32*, i32** %5
%13 = load i32*, i32** %6
%14 = load i32*, i32** %6
%15 = load i32, i32* %4
%16 = call i32 @g(i32* %14, i32 %15)
br label %21
17: ; preds = %3
%18 = load i32*, i32** %5
%19 = load i32, i32* %18
%20 = load i32*, i32** %6
store i32 %19, i32* %20
br label %21
21: ; preds = %17, %9
ret void
}

LLVM IR (-O2):
define void @f(i32 %0, i32* nocapture %1, i32* %2) {
%4 = icmp sgt i32 %0, 0
br i1 %4, label %6, label %9
5: ; preds = %9, %6
ret void
6: ; preds = %3
%7 = add nsw i32 %0, -2
tail call void @f(i32 %7, i32* %1, i32* %2)
%8 = tail call i32 @g(i32* %2, i32 %0)
br label %5
9: ; preds = %3
%10 = load i32, i32* %1
store i32 %10, i32* %2
br label %5
}
/* Variables and functions */
int /*<<< orphan*/ create_letter_distribution_diagram();
int main() {
  create_letter_distribution_diagram();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <create_letter_distribution_diagram@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <create_letter_distribution_diagram@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @create_letter_distribution_diagram()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @create_letter_distribution_diagram()
ret i32 0
}
int strlen_utf8(const char *s) {
  int i = 0, j = 0;
  while (s[i]) {
    if ((s[i] & 0xc0) != 0x80)
      j++;
    i++;
  }
  return j;
}


x86 assembly (clang, -O0):
<strlen_utf8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     115b <strlen_utf8+0x5b>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
and    $0xc0,%eax
cmp    $0x80,%eax
je     114d <strlen_utf8+0x4d>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <strlen_utf8+0x16>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen_utf8>:
mov    (%rdi),%cl
test   %cl,%cl
je     1129 <strlen_utf8+0x29>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
and    $0xc0,%cl
xor    %edx,%edx
cmp    $0x80,%cl
setne  %dl
add    %edx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <strlen_utf8+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @strlen_utf8(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %24, %1
%6 = load i8*, i8** %2
%7 = load i32, i32* %3
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = icmp ne i8 %10, 0
br i1 %11, label %12, label %27
12: ; preds = %5
%13 = load i8*, i8** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = and i32 %18, 192
%20 = icmp ne i32 %19, 128
br i1 %20, label %21, label %24
21: ; preds = %12
%22 = load i32, i32* %4
%23 = add nsw i32 %22, 1
store i32 %23, i32* %4
br label %24
24: ; preds = %21, %12
%25 = load i32, i32* %3
%26 = add nsw i32 %25, 1
store i32 %26, i32* %3
br label %5
27: ; preds = %5
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @strlen_utf8(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %12, %4 ], [ 0, %1 ]
%6 = phi i8 [ %14, %4 ], [ %2, %1 ]
%7 = phi i32 [ %11, %4 ], [ 0, %1 ]
%8 = and i8 %6, -64
%9 = icmp ne i8 %8, -128
%10 = zext i1 %9 to i32
%11 = add nuw nsw i32 %7, %10
%12 = add nuw nsw i64 %5, 1
%13 = getelementptr inbounds i8, i8* %0, i64 %12
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %4
16: ; preds = %4, %1
%17 = phi i32 [ 0, %1 ], [ %11, %4 ]
ret i32 %17
}
/* Variables and functions */
scalar_t__ eq(float, float);
int le(float x, float y) { return ((x < y) || eq(x, y)); }


x86 assembly (clang, -O0):
<le>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
mov    $0x1,%al
ucomiss %xmm1,%xmm0
mov    %al,-0x9(%rbp)
ja     1153 <le+0x43>
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <eq@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<le>:
mov    $0x1,%eax
ucomiss %xmm0,%xmm1
ja     112f <le+0x1f>
push   %rax
call   1030 <eq@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @le(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp olt float %5, %6
br i1 %7, label %13, label %8
8: ; preds = %2
%9 = load float, float* %3
%10 = load float, float* %4
%11 = call i64 @eq(float %9, float %10)
%12 = icmp ne i64 %11, 0
br label %13
13: ; preds = %8, %2
%14 = phi i1 [ true, %2 ], [ %12, %8 ]
%15 = zext i1 %14 to i32
ret i32 %15
}

LLVM IR (-O2):
define i32 @le(float %0, float %1) {
%3 = fcmp olt float %0, %1
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = tail call i64 @eq(float %0, float %1)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %2
%9 = phi i32 [ 1, %2 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char *, int);
void ft_putchar_fd(int fd, char c) { write(fd, &c, 1); }


x86 assembly (clang, -O0):
<ft_putchar_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x5(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putchar_fd>:
push   %rax
mov    %sil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @ft_putchar_fd(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
%5 = load i32, i32* %3
%6 = call i32 @write(i32 %5, i8* %4, i32 1)
ret void
}

LLVM IR (-O2):
define void @ft_putchar_fd(i32 %0, i8 signext %1) {
%3 = alloca i8
store i8 %1, i8* %3
%4 = call i32 @write(i32 %0, i8* %3, i32 1)
ret void
}
/* Type definitions */
struct Cyc_PP_Doc {
  int dummy;
};
struct Cyc_Absyn_Exp {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ Cyc_Absynpp_exp2doc_prec(int /*<<< orphan*/,
                                            struct Cyc_Absyn_Exp *);
struct Cyc_PP_Doc *Cyc_Absynpp_exp2doc(struct Cyc_Absyn_Exp *e) {
  return ({ Cyc_Absynpp_exp2doc_prec(0, e); });
}


x86 assembly (clang, -O0):
<Cyc_Absynpp_exp2doc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
xor    %edi,%edi
call   1030 <Cyc_Absynpp_exp2doc_prec@plt>
mov    %eax,-0xc(%rbp)
movslq -0xc(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_Absynpp_exp2doc>:
push   %rax
mov    %rdi,%rsi
xor    %edi,%edi
call   1030 <Cyc_Absynpp_exp2doc_prec@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
%struct.Cyc_PP_Doc = type { i32 }
%struct.Cyc_Absyn_Exp = type { i32 }
define %struct.Cyc_PP_Doc* @Cyc_Absynpp_exp2doc(%struct.Cyc_Absyn_Exp* %0) {
%2 = alloca %struct.Cyc_Absyn_Exp*
%3 = alloca i32
store %struct.Cyc_Absyn_Exp* %0, %struct.Cyc_Absyn_Exp** %2
%4 = load %struct.Cyc_Absyn_Exp*, %struct.Cyc_Absyn_Exp** %2
%5 = call i32 @Cyc_Absynpp_exp2doc_prec(i32 0, %struct.Cyc_Absyn_Exp* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to %struct.Cyc_PP_Doc*
ret %struct.Cyc_PP_Doc* %8
}

LLVM IR (-O2):
%struct.Cyc_PP_Doc = type { i32 }
%struct.Cyc_Absyn_Exp = type { i32 }
define %struct.Cyc_PP_Doc* @Cyc_Absynpp_exp2doc(%struct.Cyc_Absyn_Exp* %0) {
%2 = tail call i32 @Cyc_Absynpp_exp2doc_prec(i32 0, %struct.Cyc_Absyn_Exp* %0)
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to %struct.Cyc_PP_Doc*
ret %struct.Cyc_PP_Doc* %4
}
/* Variables and functions */
int strcasecmp(char *, char *);
int compare_strings(const void *entry1, const void *entry2) {
  char **e1 = (char **)entry1;
  char **e2 = (char **)entry2;
  return (strcasecmp(*e1, *e2));
}


x86 assembly (clang, -O0):
<compare_strings>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rdi
mov    -0x20(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcasecmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_strings>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcasecmp@plt>

LLVM IR (-O0):
define i32 @compare_strings(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i8**
store i8** %8, i8*** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i8**
store i8** %10, i8*** %6
%11 = load i8**, i8*** %5
%12 = load i8*, i8** %11
%13 = load i8**, i8*** %6
%14 = load i8*, i8** %13
%15 = call i32 @strcasecmp(i8* %12, i8* %14)
ret i32 %15
}

LLVM IR (-O2):
define i32 @compare_strings(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = bitcast i8* %1 to i8**
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = tail call i32 @strcasecmp(i8* %5, i8* %6)
ret i32 %7
}
void zzTraceIn(char *rule) { return; }


x86 assembly (clang, -O0):
<zzTraceIn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<zzTraceIn>:
ret

LLVM IR (-O0):
define void @zzTraceIn(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @zzTraceIn(i8* nocapture %0) {
ret void
}
/* Type definitions */
struct wl_proxy {
  int dummy;
};
struct wl_data_offer {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ wl_proxy_marshal(struct wl_proxy *, int, char const *,
                                    int /*<<< orphan*/);
void wl_data_offer_receive(struct wl_data_offer *wl_data_offer,
                           const char *mime_type, int32_t fd) {
  wl_proxy_marshal((struct wl_proxy *)wl_data_offer, 1, mime_type, fd);
}


x86 assembly (clang, -O0):
<wl_data_offer_receive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0x1,%esi
call   1030 <wl_proxy_marshal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wl_data_offer_receive>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    $0x1,%esi
jmp    1030 <wl_proxy_marshal@plt>

LLVM IR (-O0):
%struct.wl_data_offer = type { i32 }
%struct.wl_proxy = type { i32 }
define void @wl_data_offer_receive(%struct.wl_data_offer* %0, i8* %1, i32 %2) {
%4 = alloca %struct.wl_data_offer*
%5 = alloca i8*
%6 = alloca i32
store %struct.wl_data_offer* %0, %struct.wl_data_offer** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load %struct.wl_data_offer*, %struct.wl_data_offer** %4
%8 = bitcast %struct.wl_data_offer* %7 to %struct.wl_proxy*
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 @wl_proxy_marshal(%struct.wl_proxy* %8, i32 1, i8* %9, i32 %10)
ret void
}

LLVM IR (-O2):
%struct.wl_data_offer = type { i32 }
%struct.wl_proxy = type { i32 }
define void @wl_data_offer_receive(%struct.wl_data_offer* %0, i8* %1, i32 %2) {
%4 = bitcast %struct.wl_data_offer* %0 to %struct.wl_proxy*
%5 = tail call i32 @wl_proxy_marshal(%struct.wl_proxy* %4, i32 1, i8* %1, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ digin_open();
int /*<<< orphan*/ timer_init();
void init() {
  timer_init();
  digin_open();
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <timer_init@plt>
mov    $0x0,%al
call   1030 <digin_open@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
push   %rax
xor    %eax,%eax
call   1040 <timer_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <digin_open@plt>

LLVM IR (-O0):
define void @init() {
%1 = call i32 (...) @timer_init()
%2 = call i32 (...) @digin_open()
ret void
}

LLVM IR (-O2):
define void @init() {
%1 = tail call i32 (...) @timer_init()
%2 = tail call i32 (...) @digin_open()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ BUF_strlcpy(char *, char *, int);
char *strrchr(char *, char);
void program_name(char *in, char *out, int size) {
  char *p;
  p = strrchr(in, '/');
  if (p != NULL)
    p++;
  else
    p = in;
  BUF_strlcpy(out, p, size);
}


x86 assembly (clang, -O0):
<program_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2f,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     1161 <program_name+0x41>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1169 <program_name+0x49>
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <BUF_strlcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<program_name>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
mov    $0x2f,%esi
call   1030 <strrchr@plt>
lea    0x1(%rax),%rsi
test   %rax,%rax
cmove  %rbp,%rsi
mov    %rbx,%rdi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <BUF_strlcpy@plt>

LLVM IR (-O0):
define void @program_name(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
%9 = call i8* @strrchr(i8* %8, i8 signext 47)
store i8* %9, i8** %7
%10 = load i8*, i8** %7
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %15
12: ; preds = %3
%13 = load i8*, i8** %7
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %7
br label %17
15: ; preds = %3
%16 = load i8*, i8** %4
store i8* %16, i8** %7
br label %17
17: ; preds = %15, %12
%18 = load i8*, i8** %5
%19 = load i8*, i8** %7
%20 = load i32, i32* %6
%21 = call i32 @BUF_strlcpy(i8* %18, i8* %19, i32 %20)
ret void
}

LLVM IR (-O2):
define void @program_name(i8* %0, i8* %1, i32 %2) {
%4 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 47)
%5 = icmp eq i8* %4, null
%6 = getelementptr inbounds i8, i8* %4, i64 1
%7 = select i1 %5, i8* %0, i8* %6
%8 = tail call i32 @BUF_strlcpy(i8* %1, i8* %7, i32 %2)
ret void
}
/* Variables and functions */
double floor(double);
double Melder_roundDown(double x) { return floor(x); }


x86 assembly (clang, -O0):
<Melder_roundDown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Melder_roundDown>:
jmp    1030 <floor@plt>

LLVM IR (-O0):
define double @Melder_roundDown(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @llvm.floor.f64(double %3)
ret double %4
}

LLVM IR (-O2):
define double @Melder_roundDown(double %0) {
%2 = tail call double @llvm.floor.f64(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ svcPanic();
int lseek(int file, int ptr, int dir) { svcPanic(); }


x86 assembly (clang, -O0):
<lseek>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    $0x0,%al
call   1030 <svcPanic@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lseek>:
xor    %eax,%eax
jmp    1030 <svcPanic@plt>

LLVM IR (-O0):
define i32 @lseek(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = call i32 (...) @svcPanic()
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @lseek(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 (...) @svcPanic()
ret i32 undef
}
/* Variables and functions */
int strcmp(char *, char *);
int compare(const void *a, const void *b) {
  return strcmp(*(char **)a, *(char **)b);
}


x86 assembly (clang, -O0):
<compare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @compare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i8**
%7 = load i8*, i8** %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i8**
%10 = load i8*, i8** %9
%11 = call i32 @strcmp(i8* %7, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @compare(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %4, i8* dereferenceable(1) %6)
ret i32 %7
}
/* Variables and functions */
bool nrf53_errata_97(void) { return false; }


x86 assembly (clang, -O0):
<nrf53_errata_97>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf53_errata_97>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf53_errata_97() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf53_errata_97() {
ret i32 0
}
void *arg2(void *a1, void *a2) { return a2; }


x86 assembly (clang, -O0):
<arg2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<arg2>:
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i8* @arg2(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
ret i8* %5
}

LLVM IR (-O2):
define i8* @arg2(i8* nocapture readnone %0, i8* readnone returned %1) {
ret i8* %1
}
/* Type definitions */
typedef unsigned long idx;

/* Variables and functions */
int /*<<< orphan*/ dpaa_set_bits(unsigned long, unsigned long volatile *);
void dpaa_set_bit(int idx, volatile unsigned long *bits) {
  dpaa_set_bits(
      (1UL << ((idx) & ((sizeof(unsigned long) << 3) - 1))),
      bits + ((idx) >> (((1 << 5) == (sizeof(unsigned long) << 3)) ? 5 : 6)));
}


x86 assembly (clang, -O0):
<dpaa_set_bit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movslq -0x4(%rbp),%rcx
and    $0x3f,%rcx
mov    $0x1,%edi
shl    %cl,%rdi
mov    -0x10(%rbp),%rsi
mov    -0x4(%rbp),%eax
sar    $0x6,%eax
cltq
shl    $0x3,%rax
add    %rax,%rsi
call   1030 <dpaa_set_bits@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dpaa_set_bit>:
mov    %edi,%ecx
mov    $0x1,%edi
shl    %cl,%rdi
sar    $0x6,%ecx
movslq %ecx,%rax
lea    (%rsi,%rax,8),%rsi
jmp    1030 <dpaa_set_bits@plt>

LLVM IR (-O0):
define void @dpaa_set_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%5 = load i32, i32* %3
%6 = sext i32 %5 to i64
%7 = and i64 %6, 63
%8 = shl i64 1, %7
%9 = load i64*, i64** %4
%10 = load i32, i32* %3
%11 = ashr i32 %10, 6
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i64, i64* %9, i64 %12
%14 = call i32 @dpaa_set_bits(i64 %8, i64* %13)
ret void
}

LLVM IR (-O2):
define void @dpaa_set_bit(i32 %0, i64* %1) {
%3 = and i32 %0, 63
%4 = zext i32 %3 to i64
%5 = shl nuw i64 1, %4
%6 = ashr i32 %0, 6
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i64, i64* %1, i64 %7
%9 = tail call i32 @dpaa_set_bits(i64 %5, i64* %8)
ret void
}