#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
bool isDivisible(int n) {
  int i;
  for (i = 11; i <= 20; i++) {
    if (n % i != 0)
      return false;
  }
  return true;
}


x86 assembly (clang, -O0):
<isDivisible>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0xb,-0xc(%rbp)
cmpl   $0x14,-0xc(%rbp)
jg     1147 <isDivisible+0x47>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
je     1134 <isDivisible+0x34>
movl   $0x0,-0x4(%rbp)
jmp    114e <isDivisible+0x4e>
jmp    1139 <isDivisible+0x39>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <isDivisible+0xe>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isDivisible>:
movslq %edi,%rcx
imul   $0x2e8ba2e9,%rcx,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rax
sar    %eax
add    %edx,%eax
lea    (%rax,%rax,4),%edx
lea    (%rax,%rdx,2),%eax
mov    %ecx,%edx
sub    %eax,%edx
imul   $0x2aaaaaab,%rcx,%rax
mov    %rax,%rsi
shr    $0x3f,%rsi
shr    $0x21,%rax
add    %esi,%eax
shl    $0x2,%eax
lea    (%rax,%rax,2),%eax
mov    %ecx,%esi
sub    %eax,%esi
or     %edx,%esi
imul   $0x4ec4ec4f,%rcx,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rax
sar    $0x2,%eax
add    %edx,%eax
lea    (%rax,%rax,2),%edx
lea    (%rax,%rdx,4),%eax
mov    %ecx,%edx
sub    %eax,%edx
or     %esi,%edx
imul   $0xffffffff92492493,%rcx,%rsi
shr    $0x20,%rsi
add    %ecx,%esi
mov    %esi,%eax
shr    $0x1f,%eax
sar    $0x3,%esi
add    %eax,%esi
mov    %esi,%edi
shl    $0x4,%edi
mov    %esi,%eax
sub    %edi,%eax
add    %esi,%eax
add    %ecx,%eax
or     %edx,%eax
imul   $0xffffffff88888889,%rcx,%rdx
shr    $0x20,%rdx
add    %ecx,%edx
mov    %edx,%esi
shr    $0x1f,%esi
sar    $0x3,%edx
add    %esi,%edx
lea    (%rdx,%rdx,4),%edx
lea    (%rdx,%rdx,2),%edx
mov    %ecx,%esi
sub    %edx,%esi
mov    %ecx,%edi
and    $0xf,%edi
or     %esi,%edi
imul   $0x78787879,%rcx,%rdx
mov    %rdx,%rsi
shr    $0x3f,%rsi
sar    $0x23,%rdx
add    %esi,%edx
mov    %edx,%esi
shl    $0x4,%esi
add    %edx,%esi
mov    %ecx,%edx
sub    %esi,%edx
or     %edi,%edx
or     %eax,%edx
imul   $0x38e38e39,%rcx,%rax
mov    %rax,%rsi
shr    $0x3f,%rsi
sar    $0x22,%rax
add    %esi,%eax
add    %eax,%eax
lea    (%rax,%rax,8),%eax
mov    %ecx,%esi
sub    %eax,%esi
imul   $0x6bca1af3,%rcx,%rax
mov    %rax,%rdi
shr    $0x3f,%rdi
sar    $0x23,%rax
add    %edi,%eax
lea    (%rax,%rax,8),%edi
lea    (%rax,%rdi,2),%eax
mov    %ecx,%edi
sub    %eax,%edi
or     %esi,%edi
or     %edx,%edi
imul   $0x66666667,%rcx,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rax
add    %edx,%eax
shl    $0x2,%eax
lea    (%rax,%rax,4),%eax
sub    %eax,%ecx
xor    %eax,%eax
or     %edi,%ecx
sete   %al
ret

LLVM IR (-O0):
define i32 @isDivisible(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 11, i32* %4
br label %5
5: ; preds = %15, %1
%6 = load i32, i32* %4
%7 = icmp sle i32 %6, 20
br i1 %7, label %8, label %18
8: ; preds = %5
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = srem i32 %9, %10
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %8
store i32 0, i32* %2
br label %19
14: ; preds = %8
br label %15
15: ; preds = %14
%16 = load i32, i32* %4
%17 = add nsw i32 %16, 1
store i32 %17, i32* %4
br label %5
18: ; preds = %5
store i32 1, i32* %2
br label %19
19: ; preds = %18, %13
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @isDivisible(i32 %0) {
%2 = srem i32 %0, 11
%3 = srem i32 %0, 12
%4 = or i32 %2, %3
%5 = srem i32 %0, 13
%6 = or i32 %4, %5
%7 = srem i32 %0, 14
%8 = or i32 %6, %7
%9 = srem i32 %0, 15
%10 = or i32 %8, %9
%11 = and i32 %0, 15
%12 = or i32 %10, %11
%13 = srem i32 %0, 17
%14 = or i32 %12, %13
%15 = srem i32 %0, 18
%16 = or i32 %14, %15
%17 = srem i32 %0, 19
%18 = or i32 %16, %17
%19 = srem i32 %0, 20
%20 = or i32 %18, %19
%21 = icmp eq i32 %20, 0
%22 = zext i1 %21 to i32
ret i32 %22
}