xunge/DecIR huggingface dataset:
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ printf(char *);
int main() {
  printf("HTTP/1.1 200 OK\n");
  printf("Content-type: text/plain\n");
  printf("\r\n");
  printf("CGI work !\n");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xedf(%rip),%rdi
call   1030 <printf@plt>
lea    0xeed(%rip),%rdi
call   1030 <printf@plt>
lea    0xee4(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e8a(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeec(%rip),%rdi
call   1030 <puts@plt>
lea    0xef9(%rip),%rdi
call   1030 <puts@plt>
lea    0xeef(%rip),%rdi
call   1030 <puts@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"HTTP/1.1 200 OK\0A\00"
@.str.1 = [26 x i8] c"Content-type: text/plain\0A\00"
@.str.2 = [3 x i8] c"\0D\0A\00"
@.str.3 = [12 x i8] c"CGI work !\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.3, i64 0, i64 0))
%6 = load i32, i32* @EXIT_SUCCESS
ret i32 %6
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
@str = [16 x i8] c"HTTP/1.1 200 OK\00"
@str.4 = [25 x i8] c"Content-type: text/plain\00"
@str.5 = [2 x i8] c"\0D\00"
@str.6 = [11 x i8] c"CGI work !\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str.4, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str.5, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str.6, i64 0, i64 0))
%5 = load i32, i32* @EXIT_SUCCESS
ret i32 %5
}
int test_imm_41uint8_reg(unsigned char val) {
  return ((val) & (-0x41 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_41uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffffbf,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_41uint8_reg>:
test   $0xbf,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_41uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -65
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_41uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -65
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int nf_data();
void nf_wait_io(void) {
  while ((1) & nf_data())
    ;
}


x86 assembly (clang, -O0):
<nf_wait_io>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <nf_wait_io+0x9>
mov    $0x0,%al
call   1030 <nf_data@plt>
and    $0x1,%eax
cmp    $0x0,%eax
je     1131 <nf_wait_io+0x21>
jmp    1119 <nf_wait_io+0x9>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nf_wait_io>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <nf_data@plt>
test   $0x1,%al
jne    1120 <nf_wait_io+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @nf_wait_io() {
br label %1
1: ; preds = %5, %0
%2 = call i32 (...) @nf_data()
%3 = and i32 1, %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %1
6: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @nf_wait_io() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @nf_data()
%3 = and i32 %2, 1
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %1
5: ; preds = %1
ret void
}
/* Variables and functions */
int isalpha(unsigned char);
int isalpha_c(char c) { return isalpha((unsigned char)c); }


x86 assembly (clang, -O0):
<isalpha_c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <isalpha@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isalpha_c>:
movzbl %dil,%edi
jmp    1030 <isalpha@plt>

LLVM IR (-O0):
define i32 @isalpha_c(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @isalpha(i8 zeroext %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @isalpha_c(i8 signext %0) {
%2 = tail call i32 @isalpha(i8 zeroext %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_context_get_sink_info_by_name() {
  printf("NOT IMPLEMENTED:"
         "pa_context_get_sink_info_by_name"
         "\n");
}


x86 assembly (clang, -O0):
<pa_context_get_sink_info_by_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_context_get_sink_info_by_name>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [50 x i8] c"NOT IMPLEMENTED:pa_context_get_sink_info_by_name\0A\00"
define i32 @pa_context_get_sink_info_by_name() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [49 x i8] c"NOT IMPLEMENTED:pa_context_get_sink_info_by_name\00"
define i32 @pa_context_get_sink_info_by_name() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([49 x i8], [49 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int client_microtcp(const char *serverip, uint16_t server_port,
                    const char *file) {
  return 0;
}


x86 assembly (clang, -O0):
<client_microtcp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<client_microtcp>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @client_microtcp(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
ret i32 0
}

LLVM IR (-O2):
define i32 @client_microtcp(i8* nocapture readnone %0, i32 %1, i8* nocapture readnone %2) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ leitura(int *);
int main() {
  int vet[4];
  leitura(&vet[0]);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x10(%rbp),%rdi
call   1030 <leitura@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
mov    %rsp,%rdi
call   1030 <leitura@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca [4 x i32]
%2 = getelementptr inbounds [4 x i32], [4 x i32]* %1, i64 0, i64 0
%3 = call i32 @leitura(i32* %2)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [4 x i32]
%2 = bitcast [4 x i32]* %1 to i8*
%3 = getelementptr inbounds [4 x i32], [4 x i32]* %1, i64 0, i64 0
%4 = call i32 @leitura(i32* %3)
ret i32 0
}
int main() {
  void *p;
  int x;
  x = 2;
  p = &x;
  if (*((int *)p) != 2)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x2,-0x14(%rbp)
lea    -0x14(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpl   $0x2,(%rax)
je     1133 <main+0x33>
movl   $0x1,-0x4(%rbp)
jmp    113a <main+0x3a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i32
store i32 0, i32* %1
store i32 2, i32* %3
%4 = bitcast i32* %3 to i8*
store i8* %4, i8** %2
%5 = load i8*, i8** %2
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = icmp ne i32 %7, 2
br i1 %8, label %9, label %10
9: ; preds = %0
store i32 1, i32* %1
br label %11
10: ; preds = %0
store i32 0, i32* %1
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ a;

/* Variables and functions */
int /*<<< orphan*/ f(int *);
int get_sum(int *, int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int a[] = {1, 2, 3, 4, 5, 6};
  int len = sizeof(a) / sizeof(a[0]);
  printf("The sum of elements of a is %d\n", get_sum(a, len));
  f(a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeba(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xeb7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xeb4(%rip),%rax
mov    %rax,-0x10(%rbp)
movl   $0x6,-0x24(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%esi
call   1050 <get_sum@plt>
mov    %eax,%esi
lea    0xe9c(%rip),%rdi
call   1040 <printf@plt>
lea    -0x20(%rbp),%rdi
call   1030 <f@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x20,%rsp
mov    0xed4(%rip),%rax
mov    %rax,0x10(%rsp)
movaps 0xeb8(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x6,%esi
call   1050 <get_sum@plt>
lea    0xeb5(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
mov    %rbx,%rdi
call   1030 <f@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.a = [6 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5, i32 6]
@.str = [32 x i8] c"The sum of elements of a is %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [6 x i32]
%3 = alloca i32
store i32 0, i32* %1
%4 = bitcast [6 x i32]* %2 to i8*
store i32 6, i32* %3
%5 = getelementptr inbounds [6 x i32], [6 x i32]* %2, i64 0, i64 0
%6 = load i32, i32* %3
%7 = call i32 @get_sum(i32* %5, i32 %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = getelementptr inbounds [6 x i32], [6 x i32]* %2, i64 0, i64 0
%10 = call i32 @f(i32* %9)
ret i32 0
}

LLVM IR (-O2):
@__const.main.a = [6 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5, i32 6]
@.str = [32 x i8] c"The sum of elements of a is %d\0A\00"
define i32 @main() {
%1 = alloca [6 x i32]
%2 = bitcast [6 x i32]* %1 to i8*
%3 = getelementptr inbounds [6 x i32], [6 x i32]* %1, i64 0, i64 0
%4 = call i32 @get_sum(i32* %3, i32 6)
%5 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = call i32 @f(i32* %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void print_usage(char *binary_name) {
  printf("Usage: %s <ip> <game file>\n", binary_name);
  printf("E.g.: %s 192.168.0.120 TetrisKiwamemichi_v6.bin\n", binary_name);
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rsi
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
lea    0xef2(%rip),%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"Usage: %s <ip> <game file>\0A\00"
@.str.1 = [49 x i8] c"E.g.: %s 192.168.0.120 TetrisKiwamemichi_v6.bin\0A\00"
define void @print_usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @printf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str.1, i64 0, i64 0), i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c"Usage: %s <ip> <game file>\0A\00"
@.str.1 = [49 x i8] c"E.g.: %s 192.168.0.120 TetrisKiwamemichi_v6.bin\0A\00"
define void @print_usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, long);
void StartFill(long id) { printf("\033GF%ld", id); }


x86 assembly (clang, -O0):
<StartFill>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<StartFill>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"\1BGF%ld\00"
define void @StartFill(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i64 %3)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"\1BGF%ld\00"
define void @StartFill(i64 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i64 %0)
ret void
}
void tegra132_init_speedo_data(struct tegra_sku_info *sku_info) {}


x86 assembly (clang, -O0):
<tegra132_init_speedo_data>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tegra132_init_speedo_data>:
ret

LLVM IR (-O0):
%struct.tegra_sku_info = type opaque
define void @tegra132_init_speedo_data(%struct.tegra_sku_info* %0) {
%2 = alloca %struct.tegra_sku_info*
store %struct.tegra_sku_info* %0, %struct.tegra_sku_info** %2
ret void
}

LLVM IR (-O2):
%struct.tegra_sku_info = type opaque
define void @tegra132_init_speedo_data(%struct.tegra_sku_info* nocapture %0) {
ret void
}
int test_imm_4Bint64_highword_reg(long long val) {
  return ((val >> 32) & (0x4B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_4Bint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0x4b,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_4Bint64_highword_reg>:
movabs $0x4b00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_4Bint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 75
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_4Bint64_highword_reg(i64 %0) {
%2 = and i64 %0, 322122547200
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void XtSetTypeConverter() {}


x86 assembly (clang, -O0):
<XtSetTypeConverter>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XtSetTypeConverter>:
ret

LLVM IR (-O0):
define void @XtSetTypeConverter() {
ret void
}

LLVM IR (-O2):
define void @XtSetTypeConverter() {
ret void
}
long double creall(long double __complex__ z) { return __real__ z; }


x86 assembly (clang, -O0):
<creall>:
push   %rbp
mov    %rsp,%rbp
lea    0x10(%rbp),%rax
fldt   (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<creall>:
fldt   0x8(%rsp)
ret

LLVM IR (-O0):
define x86_fp80 @creall({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16 %0) {
%2 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i32 0, i32 0
%3 = load x86_fp80, x86_fp80* %2
ret x86_fp80 %3
}

LLVM IR (-O2):
define x86_fp80 @creall({ x86_fp80, x86_fp80 }* nocapture byval({ x86_fp80, x86_fp80 }) align 16 %0) {
%2 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i64 0, i32 0
%3 = load x86_fp80, x86_fp80* %2
ret x86_fp80 %3
}
int Stack_Full(void) { return 0; }


x86 assembly (clang, -O0):
<Stack_Full>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Stack_Full>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Stack_Full() {
ret i32 0
}

LLVM IR (-O2):
define i32 @Stack_Full() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void arch_init() { printf("in conflict's arch init\n"); }


x86 assembly (clang, -O0):
<arch_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_init>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"in conflict's arch init\0A\00"
define void @arch_init() {
%1 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [24 x i8] c"in conflict's arch init\00"
define void @arch_init() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str, i64 0, i64 0))
ret void
}
void at91sam926x_lowlevel_board_config(struct at91sam926x_lowlevel_cfg *cfg) {}


x86 assembly (clang, -O0):
<at91sam926x_lowlevel_board_config>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<at91sam926x_lowlevel_board_config>:
ret

LLVM IR (-O0):
%struct.at91sam926x_lowlevel_cfg = type opaque
define void @at91sam926x_lowlevel_board_config(%struct.at91sam926x_lowlevel_cfg* %0) {
%2 = alloca %struct.at91sam926x_lowlevel_cfg*
store %struct.at91sam926x_lowlevel_cfg* %0, %struct.at91sam926x_lowlevel_cfg** %2
ret void
}

LLVM IR (-O2):
%struct.at91sam926x_lowlevel_cfg = type opaque
define void @at91sam926x_lowlevel_board_config(%struct.at91sam926x_lowlevel_cfg* nocapture %0) {
ret void
}
void SensorSetMode_FUJITSU(unsigned char val) {}


x86 assembly (clang, -O0):
<SensorSetMode_FUJITSU>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SensorSetMode_FUJITSU>:
ret

LLVM IR (-O0):
define void @SensorSetMode_FUJITSU(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
ret void
}

LLVM IR (-O2):
define void @SensorSetMode_FUJITSU(i8 zeroext %0) {
ret void
}
int test_imm_DDint64_highword_reg(long long val) {
  return ((val >> 32) & (0xDD << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DDint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xdd,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DDint64_highword_reg>:
movabs $0xdd00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DDint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 221
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_DDint64_highword_reg(i64 %0) {
%2 = and i64 %0, 949187772416
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
scalar_t__ calloc(int, int);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, char *);
char *DIS_le_ementa(void) {
  char *ementa = (char *)calloc(300, sizeof(char));
  if (ementa == NULL) {
    exit(1);
  }
  printf("Digite a ementa\n");
  scanf(" %300s", ementa);
  return ementa;
}


x86 assembly (clang, -O0):
<DIS_le_ementa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x12c,%edi
mov    $0x1,%esi
call   1040 <calloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1170 <DIS_le_ementa+0x30>
mov    $0x1,%edi
call   1060 <exit@plt>
lea    0xe89(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rsi
lea    0xe8a(%rip),%rdi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DIS_le_ementa>:
push   %rbx
mov    $0x12c,%edi
mov    $0x1,%esi
call   1040 <calloc@plt>
test   %rax,%rax
je     1178 <DIS_le_ementa+0x38>
mov    %rax,%rbx
lea    0xea8(%rip),%rdi
call   1030 <puts@plt>
lea    0xe95(%rip),%rdi
mov    %rbx,%rsi
call   1050 <scanf@plt>
mov    %rbx,%rax
pop    %rbx
ret
mov    $0x1,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"Digite a ementa\0A\00"
@.str.1 = [7 x i8] c" %300s\00"
define i8* @DIS_le_ementa() {
%1 = alloca i8*
%2 = call i64 @calloc(i32 300, i32 1)
%3 = inttoptr i64 %2 to i8*
store i8* %3, i8** %1
%4 = load i8*, i8** %1
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @exit(i32 1)
unreachable
8: ; preds = %0
%9 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%10 = load i8*, i8** %1
%11 = call i32 @scanf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* %10)
%12 = load i8*, i8** %1
ret i8* %12
}

LLVM IR (-O2):
@.str.1 = [7 x i8] c" %300s\00"
@str = [16 x i8] c"Digite a ementa\00"
define i8* @DIS_le_ementa() {
%1 = tail call i64 @calloc(i32 300, i32 1)
%2 = inttoptr i64 %1 to i8*
%3 = icmp eq i64 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = tail call i32 @exit(i32 1)
unreachable
6: ; preds = %0
%7 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
%8 = tail call i32 @scanf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* %2)
ret i8* %2
}
/* Type definitions */
struct option {
  int dummy;
};
struct _getopt_data {
  int dummy;
};

/* Variables and functions */
int _getopt_internal_r(int, char *const *, char const *, struct option const *,
                       int *, int /*<<< orphan*/, struct _getopt_data *,
                       int /*<<< orphan*/);
int _getopt_long_r(int argc, char *const *argv, const char *options,
                   const struct option *long_options, int *opt_index,
                   struct _getopt_data *d) {
  return _getopt_internal_r(argc, argv, options, long_options, opt_index, 0, d,
                            0);
}


x86 assembly (clang, -O0):
<_getopt_long_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    -0x30(%rbp),%rax
xor    %r9d,%r9d
mov    %rax,(%rsp)
movl   $0x0,0x8(%rsp)
call   1030 <_getopt_internal_r@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_getopt_long_r>:
push   %rax
mov    %r9,%rax
xor    %r9d,%r9d
push   $0x0
push   %rax
call   1030 <_getopt_internal_r@plt>
add    $0x10,%rsp
pop    %rcx
ret

LLVM IR (-O0):
%struct.option = type { i32 }
%struct._getopt_data = type { i32 }
define i32 @_getopt_long_r(i32 %0, i8** %1, i8* %2, %struct.option* %3, i32* %4, %struct._getopt_data* %5) {
%7 = alloca i32
%8 = alloca i8**
%9 = alloca i8*
%10 = alloca %struct.option*
%11 = alloca i32*
%12 = alloca %struct._getopt_data*
store i32 %0, i32* %7
store i8** %1, i8*** %8
store i8* %2, i8** %9
store %struct.option* %3, %struct.option** %10
store i32* %4, i32** %11
store %struct._getopt_data* %5, %struct._getopt_data** %12
%13 = load i32, i32* %7
%14 = load i8**, i8*** %8
%15 = load i8*, i8** %9
%16 = load %struct.option*, %struct.option** %10
%17 = load i32*, i32** %11
%18 = load %struct._getopt_data*, %struct._getopt_data** %12
%19 = call i32 @_getopt_internal_r(i32 %13, i8** %14, i8* %15, %struct.option* %16, i32* %17, i32 0, %struct._getopt_data* %18, i32 0)
ret i32 %19
}

LLVM IR (-O2):
%struct.option = type { i32 }
%struct._getopt_data = type { i32 }
define i32 @_getopt_long_r(i32 %0, i8** %1, i8* %2, %struct.option* %3, i32* %4, %struct._getopt_data* %5) {
%7 = tail call i32 @_getopt_internal_r(i32 %0, i8** %1, i8* %2, %struct.option* %3, i32* %4, i32 0, %struct._getopt_data* %5, i32 0)
ret i32 %7
}
/* Variables and functions */
int fannkuch(int);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char *argv[]) {
  int n = 6;
  printf("0x%08x\n", fannkuch(n));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x6,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1040 <fannkuch@plt>
mov    %eax,%esi
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x6,%edi
call   1040 <fannkuch@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"0x%08x\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 6, i32* %6
%7 = load i32, i32* %6
%8 = call i32 @fannkuch(i32 %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"0x%08x\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @fannkuch(i32 6)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
void atomic_dec_long(volatile long *var) {
  asm volatile("lock ;"
               " "
               "decl %0"
               " \n\t"
               : "=m"(*var)
               : "m"(*var)
               : "cc", "memory");
}


x86 assembly (clang, -O0):
<atomic_dec_long>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
lock decl (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_dec_long>:
lock decl (%rdi)
ret

LLVM IR (-O0):
define void @atomic_dec_long(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64*, i64** %2
ret void
}

LLVM IR (-O2):
define void @atomic_dec_long(i64* %0) {
tail call void asm sideeffect "lock ; decl $0 \0A\09", "=*m,*m,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %0, i64* elementtype(i64) %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ chdir(char *);
int /*<<< orphan*/ eFree(char *);
char *popString();
int /*<<< orphan*/ pushNumber(int /*<<< orphan*/);
void basChDir() {
  char *name;
  name = popString();
  pushNumber(chdir(name));
  eFree(name);
}


x86 assembly (clang, -O0):
<basChDir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <popString@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <chdir@plt>
mov    %eax,%edi
call   1060 <pushNumber@plt>
mov    -0x8(%rbp),%rdi
call   1030 <eFree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<basChDir>:
push   %rbx
xor    %eax,%eax
call   1050 <popString@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <chdir@plt>
mov    %eax,%edi
call   1060 <pushNumber@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <eFree@plt>

LLVM IR (-O0):
define void @basChDir() {
%1 = alloca i8*
%2 = call i8* (...) @popString()
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = call i32 @chdir(i8* %3)
%5 = call i32 @pushNumber(i32 %4)
%6 = load i8*, i8** %1
%7 = call i32 @eFree(i8* %6)
ret void
}

LLVM IR (-O2):
define void @basChDir() {
%1 = tail call i8* (...) @popString()
%2 = tail call i32 @chdir(i8* %1)
%3 = tail call i32 @pushNumber(i32 %2)
%4 = tail call i32 @eFree(i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0x95() {
  Assert_real((isodigit(149) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              750, ("isodigit should be 0 for 0x95"));
}


x86 assembly (clang, -O0):
<t_isodigit_0x95>:
push   %rbp
mov    %rsp,%rbp
mov    $0x95,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2ee,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0x95>:
push   %rax
mov    $0x95,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x2ee,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0x95\00"
define void @t_isodigit_0x95() {
%1 = call i64 @isodigit(i32 149)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 750, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0x95\00"
define void @t_isodigit_0x95() {
%1 = tail call i64 @isodigit(i32 149)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 750, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
const char *dm_get_version_s(void) { return "supported: BIN, ISO, CDI"; }


x86 assembly (clang, -O0):
<dm_get_version_s>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dm_get_version_s>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [25 x i8] c"supported: BIN, ISO, CDI\00"
define i8* @dm_get_version_s() {
ret i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [25 x i8] c"supported: BIN, ISO, CDI\00"
define i8* @dm_get_version_s() {
ret i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0)
}
void f(void) {
  int a[100];
#pragma hlt unroll(11)
  for (int i = 0; i < 100; i++) {
    a[i] = i;
  }
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x120,%rsp
movl   $0x0,-0x194(%rbp)
cmpl   $0x64,-0x194(%rbp)
jge    114a <f+0x4a>
mov    -0x194(%rbp),%ecx
movslq -0x194(%rbp),%rax
mov    %ecx,-0x190(%rbp,%rax,4)
mov    -0x194(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x194(%rbp)
jmp    1115 <f+0x15>
add    $0x120,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
ret

LLVM IR (-O0):
define void @f() {
%1 = alloca [100 x i32]
%2 = alloca i32
store i32 0, i32* %2
br label %3
3: ; preds = %11, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 100
br i1 %5, label %6, label %14
6: ; preds = %3
%7 = load i32, i32* %2
%8 = load i32, i32* %2
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds [100 x i32], [100 x i32]* %1, i64 0, i64 %9
store i32 %7, i32* %10
br label %11
11: ; preds = %6
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 1
store i32 %13, i32* %2
br label %3
14: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @f() {
ret void
}
regx0reg1_set(r0, r1, x0, x1, p0, p1) float r0, r1;
float *p0, *p1;
{ (p0[x0]) = r1; }


x86 assembly (clang, -O0):
<regx0reg1_set>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm1,-0x30(%rbp)
movaps %xmm0,%xmm1
movsd  -0x30(%rbp),%xmm0
cvtsd2ss %xmm1,%xmm1
cvtsd2ss %xmm0,%xmm0
movss  %xmm1,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    %edi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
movss  -0xc(%rbp),%xmm0
mov    -0x20(%rbp),%rax
movslq -0x10(%rbp),%rcx
movss  %xmm0,(%rax,%rcx,4)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<regx0reg1_set>:
cvtsd2ss %xmm1,%xmm0
movslq %edi,%rax
movss  %xmm0,(%rdx,%rax,4)
ret

LLVM IR (-O0):
define i32 @regx0reg1_set(double %0, double %1, i32 %2, i32 %3, float* %4, float* %5) {
%7 = alloca i32
%8 = alloca float
%9 = alloca float
%10 = alloca i32
%11 = alloca i32
%12 = alloca float*
%13 = alloca float*
%14 = fptrunc double %0 to float
%15 = fptrunc double %1 to float
store float %14, float* %8
store float %15, float* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store float* %4, float** %12
store float* %5, float** %13
%16 = load float, float* %9
%17 = load float*, float** %12
%18 = load i32, i32* %10
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds float, float* %17, i64 %19
store float %16, float* %20
%21 = load i32, i32* %7
ret i32 %21
}

LLVM IR (-O2):
define i32 @regx0reg1_set(double %0, double %1, i32 %2, i32 %3, float* nocapture writeonly %4, float* nocapture readnone %5) {
%7 = fptrunc double %1 to float
%8 = sext i32 %2 to i64
%9 = getelementptr inbounds float, float* %4, i64 %8
store float %7, float* %9
ret i32 undef
}
change_letter(inserts, deletes) int inserts, deletes;
{
  if (!inserts)
    return 'd';
  else if (!deletes)
    return 'a';
  else
    return 'c';
}


x86 assembly (clang, -O0):
<change_letter>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1120 <change_letter+0x20>
movl   $0x64,-0x4(%rbp)
jmp    113d <change_letter+0x3d>
cmpl   $0x0,-0xc(%rbp)
jne    1136 <change_letter+0x36>
movl   $0x61,-0x4(%rbp)
jmp    113d <change_letter+0x3d>
movl   $0x63,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<change_letter>:
xor    %eax,%eax
test   %esi,%esi
setne  %al
test   %edi,%edi
lea    0x61(%rax,%rax,1),%ecx
mov    $0x64,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @change_letter(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 0
br i1 %7, label %9, label %8
8: ; preds = %2
store i32 100, i32* %3
br label %14
9: ; preds = %2
%10 = load i32, i32* %5
%11 = icmp ne i32 %10, 0
br i1 %11, label %13, label %12
12: ; preds = %9
store i32 97, i32* %3
br label %14
13: ; preds = %9
store i32 99, i32* %3
br label %14
14: ; preds = %13, %12, %8
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @change_letter(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
%4 = icmp eq i32 %1, 0
%5 = select i1 %4, i32 97, i32 99
%6 = select i1 %3, i32 100, i32 %5
ret i32 %6
}
int frob(int i) {
  switch (i) {
  case -5:
    return -2;
  case -3:
    return -1;
  case 0:
    return 0;
  case 3:
    return 1;
  case 5:
    break;
  default:
    __builtin_unreachable();
  }
  return i;
}


x86 assembly (clang, -O0):
<frob>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x5,%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
lea    0xee4(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0xfffffffe,-0x4(%rbp)
jmp    1160 <frob+0x60>
movl   $0xffffffff,-0x4(%rbp)
jmp    1160 <frob+0x60>
movl   $0x0,-0x4(%rbp)
jmp    1160 <frob+0x60>
movl   $0x1,-0x4(%rbp)
jmp    1160 <frob+0x60>
jmp    115a <frob+0x5a>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<frob>:
add    $0x5,%edi
movslq %edi,%rax
lea    0xef3(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @frob(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %10 [
i32 -5, label %5
i32 -3, label %6
i32 0, label %7
i32 3, label %8
i32 5, label %9
]
5: ; preds = %1
store i32 -2, i32* %2
br label %13
6: ; preds = %1
store i32 -1, i32* %2
br label %13
7: ; preds = %1
store i32 0, i32* %2
br label %13
8: ; preds = %1
store i32 1, i32* %2
br label %13
9: ; preds = %1
br label %11
10: ; preds = %1
unreachable
11: ; preds = %9
%12 = load i32, i32* %3
store i32 %12, i32* %2
br label %13
13: ; preds = %11, %8, %7, %6, %5
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
@switch.table.frob = [11 x i32] [i32 -2, i32 -2, i32 -1, i32 -2, i32 -2, i32 0, i32 -2, i32 -2, i32 1, i32 -2, i32 5]
define i32 @frob(i32 %0) {
%2 = add i32 %0, 5
%3 = trunc i32 %2 to i16
%4 = lshr i16 1317, %3
%5 = and i16 %4, 1
%6 = icmp ne i16 %5, 0
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds [11 x i32], [11 x i32]* @switch.table.frob, i64 0, i64 %7
%9 = load i32, i32* %8
ret i32 %9
}
/* Type definitions */
typedef char *uint16_t;

/* Variables and functions */
uint16_t get_gs(void) {
  uint16_t result;
  asm volatile("movw %%"
               "gs"
               ", %0"
               : "=m"(result));
  return result;
}


x86 assembly (clang, -O0):
<get_gs>:
push   %rbp
mov    %rsp,%rbp
mov    %gs,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_gs>:
mov    %gs,-0x8(%rsp)
mov    -0x8(%rsp),%rax
ret

LLVM IR (-O0):
define i8* @get_gs() {
%1 = alloca i8*
%2 = load i8*, i8** %1
ret i8* %2
}

LLVM IR (-O2):
define i8* @get_gs() {
%1 = alloca i8*
%2 = bitcast i8** %1 to i8*
%3 = load i8*, i8** %1
ret i8* %3
}
void dd(int n) {
  int ay[n];
  ay[0] = 10;
}


x86 assembly (clang, -O0):
<dd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
mov    %rsp,%rax
mov    %rax,-0x10(%rbp)
lea    0xf(,%rcx,4),%rdx
and    $0xfffffffffffffff0,%rdx
mov    %rsp,%rax
sub    %rdx,%rax
mov    %rax,%rsp
mov    %rcx,-0x18(%rbp)
movl   $0xa,(%rax)
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dd>:
ret

LLVM IR (-O0):
define void @dd(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i64
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
%7 = call i8* @llvm.stacksave()
store i8* %7, i8** %3
%8 = alloca i32, i64 %6
store i64 %6, i64* %4
%9 = getelementptr inbounds i32, i32* %8, i64 0
store i32 10, i32* %9
%10 = load i8*, i8** %3
ret void
}

LLVM IR (-O2):
define void @dd(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clear();
int /*<<< orphan*/ display();
int /*<<< orphan*/ endwin();
int /*<<< orphan*/ refresh();
void handle_winch(int sig) {
  endwin();
  refresh();
  clear();
  display();
  refresh();
}


x86 assembly (clang, -O0):
<handle_winch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1050 <endwin@plt>
mov    $0x0,%al
call   1040 <refresh@plt>
mov    $0x0,%al
call   1060 <clear@plt>
mov    $0x0,%al
call   1030 <display@plt>
mov    $0x0,%al
call   1040 <refresh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_winch>:
push   %rax
xor    %eax,%eax
call   1050 <endwin@plt>
xor    %eax,%eax
call   1040 <refresh@plt>
xor    %eax,%eax
call   1060 <clear@plt>
xor    %eax,%eax
call   1030 <display@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <refresh@plt>

LLVM IR (-O0):
define void @handle_winch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @endwin()
%4 = call i32 (...) @refresh()
%5 = call i32 (...) @clear()
%6 = call i32 (...) @display()
%7 = call i32 (...) @refresh()
ret void
}

LLVM IR (-O2):
define void @handle_winch(i32 %0) {
%2 = tail call i32 (...) @endwin()
%3 = tail call i32 (...) @refresh()
%4 = tail call i32 (...) @clear()
%5 = tail call i32 (...) @display()
%6 = tail call i32 (...) @refresh()
ret void
}
void test3() {
  unsigned short x, y;
  unsigned int z;
  if ((x > y ? x : y) > z)
    (void)0;
}


x86 assembly (clang, -O0):
<test3>:
push   %rbp
mov    %rsp,%rbp
movzwl -0x2(%rbp),%eax
movzwl -0x4(%rbp),%ecx
cmp    %ecx,%eax
jle    1120 <test3+0x20>
movzwl -0x2(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <test3+0x27>
movzwl -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jbe    1138 <test3+0x38>
jmp    1138 <test3+0x38>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test3>:
ret

LLVM IR (-O0):
define void @test3() {
%1 = alloca i16
%2 = alloca i16
%3 = alloca i32
%4 = load i16, i16* %1
%5 = zext i16 %4 to i32
%6 = load i16, i16* %2
%7 = zext i16 %6 to i32
%8 = icmp sgt i32 %5, %7
br i1 %8, label %9, label %12
9: ; preds = %0
%10 = load i16, i16* %1
%11 = zext i16 %10 to i32
br label %15
12: ; preds = %0
%13 = load i16, i16* %2
%14 = zext i16 %13 to i32
br label %15
15: ; preds = %12, %9
%16 = phi i32 [ %11, %9 ], [ %14, %12 ]
%17 = load i32, i32* %3
%18 = icmp ugt i32 %16, %17
br i1 %18, label %19, label %20
19: ; preds = %15
br label %20
20: ; preds = %19, %15
ret void
}

LLVM IR (-O2):
define void @test3() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TIOCMGET;
int /*<<< orphan*/ TIOCMSET;
int TIOCM_DTR;
int /*<<< orphan*/ ioctl(int, int /*<<< orphan*/, int *);
void setDTR(int fd) {
  int lineData;
  ioctl(fd, TIOCMGET, &lineData);
  lineData |= TIOCM_DTR;
  ioctl(fd, TIOCMSET, &lineData);
}


x86 assembly (clang, -O0):
<setDTR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eb3(%rip),%rax
mov    (%rax),%esi
lea    -0x8(%rbp),%rdx
call   1030 <ioctl@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2e9f(%rip),%rax
mov    (%rax),%esi
lea    -0x8(%rbp),%rdx
call   1030 <ioctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setDTR>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
lea    0x4(%rsp),%r14
mov    %r14,%rdx
call   1030 <ioctl@plt>
mov    0x2ead(%rip),%rax
mov    (%rax),%eax
or     %eax,0x4(%rsp)
mov    0x2ea8(%rip),%rax
mov    (%rax),%esi
mov    %ebx,%edi
mov    %r14,%rdx
call   1030 <ioctl@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@TIOCMGET = global i32 0
@TIOCM_DTR = global i32 0
@TIOCMSET = global i32 0
define void @setDTR(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @TIOCMGET
%6 = call i32 @ioctl(i32 %4, i32 %5, i32* %3)
%7 = load i32, i32* @TIOCM_DTR
%8 = load i32, i32* %3
%9 = or i32 %8, %7
store i32 %9, i32* %3
%10 = load i32, i32* %2
%11 = load i32, i32* @TIOCMSET
%12 = call i32 @ioctl(i32 %10, i32 %11, i32* %3)
ret void
}

LLVM IR (-O2):
@TIOCMGET = global i32 0
@TIOCM_DTR = global i32 0
@TIOCMSET = global i32 0
define void @setDTR(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = load i32, i32* @TIOCMGET
%5 = call i32 @ioctl(i32 %0, i32 %4, i32* %2)
%6 = load i32, i32* @TIOCM_DTR
%7 = load i32, i32* %2
%8 = or i32 %7, %6
store i32 %8, i32* %2
%9 = load i32, i32* @TIOCMSET
%10 = call i32 @ioctl(i32 %0, i32 %9, i32* %2)
ret void
}
void init_add_rel_pixel_pt_funcs_c(void) {}


x86 assembly (clang, -O0):
<init_add_rel_pixel_pt_funcs_c>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_add_rel_pixel_pt_funcs_c>:
ret

LLVM IR (-O0):
define void @init_add_rel_pixel_pt_funcs_c() {
ret void
}

LLVM IR (-O2):
define void @init_add_rel_pixel_pt_funcs_c() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ atomic_int;

/* Variables and functions */
int atomic_load(int /*<<< orphan*/ *);
int fi1c(atomic_int *i) { return atomic_load(i); }


x86 assembly (clang, -O0):
<fi1c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <atomic_load@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fi1c>:
jmp    1030 <atomic_load@plt>

LLVM IR (-O0):
define i32 @fi1c(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @atomic_load(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @fi1c(i32* %0) {
%2 = tail call i32 @atomic_load(i32* %0)
ret i32 %2
}
int test_imm_47int8_reg(signed char val) {
  return ((val) & (-0x47 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_47int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffffb9,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_47int8_reg>:
test   $0xb9,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_47int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -71
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_47int8_reg(i8 signext %0) {
%2 = and i8 %0, -71
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void g(void) {
  int P = 0;
  int x = P;
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
ret

LLVM IR (-O0):
define void @g() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* %1
store i32 %3, i32* %2
ret void
}

LLVM IR (-O2):
define void @g() {
ret void
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMR50_set(void) { return U_WMRCORENONE_set("U_WMRENDPAGE"); }


x86 assembly (clang, -O0):
<U_WMR50_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR50_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"U_WMRENDPAGE\00"
define i8* @U_WMR50_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [13 x i8] c"U_WMRENDPAGE\00"
define i8* @U_WMR50_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ __glutFatalError(char *);
void glutSetupVideoResizing(void) {
  __glutFatalError(
      "glutEstablishVideoResizing: video resizing not possible.\n");
}


x86 assembly (clang, -O0):
<glutSetupVideoResizing>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <__glutFatalError@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<glutSetupVideoResizing>:
lea    0xee9(%rip),%rdi
jmp    1030 <__glutFatalError@plt>

LLVM IR (-O0):
@.str = [58 x i8] c"glutEstablishVideoResizing: video resizing not possible.\0A\00"
define void @glutSetupVideoResizing() {
%1 = call i32 @__glutFatalError(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [58 x i8] c"glutEstablishVideoResizing: video resizing not possible.\0A\00"
define void @glutSetupVideoResizing() {
%1 = tail call i32 @__glutFatalError(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
double __ocml_rlen3_f64(double, double, double);
double rnorm3d(double x, double y, double z) {
  return __ocml_rlen3_f64(x, y, z);
}


x86 assembly (clang, -O0):
<rnorm3d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
call   1030 <__ocml_rlen3_f64@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rnorm3d>:
jmp    1030 <__ocml_rlen3_f64@plt>

LLVM IR (-O0):
define double @rnorm3d(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = load double, double* %6
%10 = call double @__ocml_rlen3_f64(double %7, double %8, double %9)
ret double %10
}

LLVM IR (-O2):
define double @rnorm3d(double %0, double %1, double %2) {
%4 = tail call double @__ocml_rlen3_f64(double %0, double %1, double %2)
ret double %4
}