#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ RamWriteA(int, int /*<<< orphan*/);
int /*<<< orphan*/ RegReadA(int, unsigned char *);
int /*<<< orphan*/ RegWriteA(int, int);
int /*<<< orphan*/ SrvCon(int, unsigned char);
int /*<<< orphan*/ WitTim(int);
void StbOnnN(unsigned char UcStbY, unsigned char UcStbX) {
  unsigned char UcRegIni;
  unsigned char UcSttMsk = 0;
  unsigned char UcCnt;
  RegWriteA(0x017C, 0x01);
  if (UcStbX == 0x01)
    UcSttMsk |= 0x07;
  if (UcStbY == 0x01)
    UcSttMsk |= 0x70;
  SrvCon(0x00, UcStbX);
  SrvCon(0x01, UcStbY);
  for (UcCnt = 0; UcCnt < 60; UcCnt++) {
    RegReadA(0x01F8, &UcRegIni);
    if ((UcRegIni & UcSttMsk) == (0x66 & UcSttMsk))
      break;
    WitTim(10);
  }
  RegWriteA(0x017C, 0x00);
  if (UcCnt == 60) {
    if (UcStbX == 0x01) {
      RamWriteA(0x1462, 0);
    }
    if (UcStbY == 0x01) {
      RamWriteA(0x14E2, 0);
    }
  }
}


x86 assembly (clang, -O0):
<StbOnnN>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movb   $0x0,-0x4(%rbp)
mov    $0x17c,%edi
mov    $0x1,%esi
call   1070 <RegWriteA@plt>
movzbl -0x2(%rbp),%eax
cmp    $0x1,%eax
jne    118e <StbOnnN+0x3e>
movzbl -0x4(%rbp),%eax
or     $0x7,%eax
mov    %al,-0x4(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0x1,%eax
jne    11a5 <StbOnnN+0x55>
movzbl -0x4(%rbp),%eax
or     $0x70,%eax
mov    %al,-0x4(%rbp)
xor    %edi,%edi
movzbl -0x2(%rbp),%esi
call   1030 <SrvCon@plt>
mov    $0x1,%edi
movzbl -0x1(%rbp),%esi
call   1030 <SrvCon@plt>
movb   $0x0,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
cmp    $0x3c,%eax
jge    1212 <StbOnnN+0xc2>
mov    $0x1f8,%edi
lea    -0x3(%rbp),%rsi
call   1060 <RegReadA@plt>
movzbl -0x3(%rbp),%eax
movzbl -0x4(%rbp),%ecx
and    %ecx,%eax
movzbl -0x4(%rbp),%ecx
and    $0x66,%ecx
cmp    %ecx,%eax
jne    11fb <StbOnnN+0xab>
jmp    1212 <StbOnnN+0xc2>
mov    $0xa,%edi
call   1050 <WitTim@plt>
mov    -0x5(%rbp),%al
add    $0x1,%al
mov    %al,-0x5(%rbp)
jmp    11c2 <StbOnnN+0x72>
mov    $0x17c,%edi
xor    %esi,%esi
call   1070 <RegWriteA@plt>
movzbl -0x5(%rbp),%eax
cmp    $0x3c,%eax
jne    1262 <StbOnnN+0x112>
movzbl -0x2(%rbp),%eax
cmp    $0x1,%eax
jne    1244 <StbOnnN+0xf4>
mov    $0x1462,%edi
xor    %esi,%esi
call   1040 <RamWriteA@plt>
movzbl -0x1(%rbp),%eax
cmp    $0x1,%eax
jne    125d <StbOnnN+0x10d>
mov    $0x14e2,%edi
xor    %esi,%esi
call   1040 <RamWriteA@plt>
jmp    1262 <StbOnnN+0x112>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<StbOnnN>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
sub    $0x10,%rsp
mov    %esi,%r15d
mov    %edi,%r14d
mov    $0x17c,%edi
mov    $0x1,%esi
call   1070 <RegWriteA@plt>
xor    %eax,%eax
cmp    $0x1,%r15b
mov    $0x7,%ecx
cmovne %eax,%ecx
lea    0x70(%rcx),%eax
cmp    $0x1,%r14b
movzbl %al,%ebp
cmovne %ecx,%ebp
xor    %edi,%edi
mov    %r15d,%esi
call   1030 <SrvCon@plt>
mov    $0x1,%edi
mov    %r14d,%esi
call   1030 <SrvCon@plt>
mov    $0x3c,%bl
lea    0xf(%rsp),%r12
nopw   0x0(%rax,%rax,1)
mov    $0x1f8,%edi
mov    %r12,%rsi
call   1060 <RegReadA@plt>
movzbl 0xf(%rsp),%eax
xor    $0x66,%al
test   %bpl,%al
je     120a <StbOnnN+0xba>
mov    $0xa,%edi
call   1050 <WitTim@plt>
add    $0xff,%bl
jne    11b0 <StbOnnN+0x60>
mov    $0x17c,%edi
xor    %esi,%esi
call   1070 <RegWriteA@plt>
cmp    $0x1,%r15b
jne    11f6 <StbOnnN+0xa6>
mov    $0x1462,%edi
xor    %esi,%esi
call   1040 <RamWriteA@plt>
cmp    $0x1,%r14b
jne    1216 <StbOnnN+0xc6>
mov    $0x14e2,%edi
xor    %esi,%esi
call   1040 <RamWriteA@plt>
jmp    1216 <StbOnnN+0xc6>
mov    $0x17c,%edi
xor    %esi,%esi
call   1070 <RegWriteA@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @StbOnnN(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
store i8 0, i8* %6
%8 = call i32 @RegWriteA(i32 380, i32 1)
%9 = load i8, i8* %4
%10 = zext i8 %9 to i32
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %17
12: ; preds = %2
%13 = load i8, i8* %6
%14 = zext i8 %13 to i32
%15 = or i32 %14, 7
%16 = trunc i32 %15 to i8
store i8 %16, i8* %6
br label %17
17: ; preds = %12, %2
%18 = load i8, i8* %3
%19 = zext i8 %18 to i32
%20 = icmp eq i32 %19, 1
br i1 %20, label %21, label %26
21: ; preds = %17
%22 = load i8, i8* %6
%23 = zext i8 %22 to i32
%24 = or i32 %23, 112
%25 = trunc i32 %24 to i8
store i8 %25, i8* %6
br label %26
26: ; preds = %21, %17
%27 = load i8, i8* %4
%28 = call i32 @SrvCon(i32 0, i8 zeroext %27)
%29 = load i8, i8* %3
%30 = call i32 @SrvCon(i32 1, i8 zeroext %29)
store i8 0, i8* %7
br label %31
31: ; preds = %49, %26
%32 = load i8, i8* %7
%33 = zext i8 %32 to i32
%34 = icmp slt i32 %33, 60
br i1 %34, label %35, label %52
35: ; preds = %31
%36 = call i32 @RegReadA(i32 504, i8* %5)
%37 = load i8, i8* %5
%38 = zext i8 %37 to i32
%39 = load i8, i8* %6
%40 = zext i8 %39 to i32
%41 = and i32 %38, %40
%42 = load i8, i8* %6
%43 = zext i8 %42 to i32
%44 = and i32 102, %43
%45 = icmp eq i32 %41, %44
br i1 %45, label %46, label %47
46: ; preds = %35
br label %52
47: ; preds = %35
%48 = call i32 @WitTim(i32 10)
br label %49
49: ; preds = %47
%50 = load i8, i8* %7
%51 = add i8 %50, 1
store i8 %51, i8* %7
br label %31
52: ; preds = %46, %31
%53 = call i32 @RegWriteA(i32 380, i32 0)
%54 = load i8, i8* %7
%55 = zext i8 %54 to i32
%56 = icmp eq i32 %55, 60
br i1 %56, label %57, label %70
57: ; preds = %52
%58 = load i8, i8* %4
%59 = zext i8 %58 to i32
%60 = icmp eq i32 %59, 1
br i1 %60, label %61, label %63
61: ; preds = %57
%62 = call i32 @RamWriteA(i32 5218, i32 0)
br label %63
63: ; preds = %61, %57
%64 = load i8, i8* %3
%65 = zext i8 %64 to i32
%66 = icmp eq i32 %65, 1
br i1 %66, label %67, label %69
67: ; preds = %63
%68 = call i32 @RamWriteA(i32 5346, i32 0)
br label %69
69: ; preds = %67, %63
br label %70
70: ; preds = %69, %52
ret void
}

LLVM IR (-O2):
define void @StbOnnN(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = tail call i32 @RegWriteA(i32 380, i32 1)
%5 = icmp eq i8 %1, 1
%6 = select i1 %5, i8 7, i8 0
%7 = icmp eq i8 %0, 1
%8 = or i8 %6, 112
%9 = select i1 %7, i8 %8, i8 %6
%10 = tail call i32 @SrvCon(i32 0, i8 zeroext %1)
%11 = tail call i32 @SrvCon(i32 1, i8 zeroext %0)
br label %12
12: ; preds = %2, %21
%13 = phi i8 [ 0, %2 ], [ %23, %21 ]
%14 = call i32 @RegReadA(i32 504, i8* %3)
%15 = load i8, i8* %3
%16 = xor i8 %15, 102
%17 = and i8 %16, %9
%18 = icmp eq i8 %17, 0
br i1 %18, label %19, label %21
19: ; preds = %12
%20 = call i32 @RegWriteA(i32 380, i32 0)
br label %32
21: ; preds = %12
%22 = call i32 @WitTim(i32 10)
%23 = add nuw nsw i8 %13, 1
%24 = icmp eq i8 %23, 60
br i1 %24, label %25, label %12
25: ; preds = %21
%26 = call i32 @RegWriteA(i32 380, i32 0)
br i1 %5, label %27, label %29
27: ; preds = %25
%28 = call i32 @RamWriteA(i32 5218, i32 0)
br label %29
29: ; preds = %27, %25
br i1 %7, label %30, label %32
30: ; preds = %29
%31 = call i32 @RamWriteA(i32 5346, i32 0)
br label %32
32: ; preds = %19, %29, %30
ret void
}