xunge/DecIR huggingface dataset:
int _fips_qcrypto_cipher_selftest(struct fips_selftest_data *selftest_d) {
  return 0;
}


x86 assembly (clang, -O0):
<_fips_qcrypto_cipher_selftest>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fips_qcrypto_cipher_selftest>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.fips_selftest_data = type opaque
define i32 @_fips_qcrypto_cipher_selftest(%struct.fips_selftest_data* %0) {
%2 = alloca %struct.fips_selftest_data*
store %struct.fips_selftest_data* %0, %struct.fips_selftest_data** %2
ret i32 0
}

LLVM IR (-O2):
%struct.fips_selftest_data = type opaque
define i32 @_fips_qcrypto_cipher_selftest(%struct.fips_selftest_data* nocapture readnone %0) {
ret i32 0
}
void dostuff3(int param) {
  char *x = (char *)0x5;
  if (param == 0x30)
    *x = 5;
}


x86 assembly (clang, -O0):
<dostuff3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x5,%eax
mov    %rax,-0x10(%rbp)
cmpl   $0x30,-0x4(%rbp)
jne    1121 <dostuff3+0x21>
mov    -0x10(%rbp),%rax
movb   $0x5,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dostuff3>:
cmp    $0x30,%edi
jne    110d <dostuff3+0xd>
movb   $0x5,0x5
05
ret

LLVM IR (-O0):
define void @dostuff3(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
store i8* inttoptr (i64 5 to i8*), i8** %3
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 48
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i8*, i8** %3
store i8 5, i8* %7
br label %8
8: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
define void @dostuff3(i32 %0) {
%2 = icmp eq i32 %0, 48
br i1 %2, label %3, label %4
3: ; preds = %1
store i8 5, i8* inttoptr (i64 5 to i8*)
br label %4
4: ; preds = %3, %1
ret void
}
void invlpg(const void *page) {
  __asm__("invlpg %[addr]" : : [addr] "m"(page));
}


x86 assembly (clang, -O0):
<invlpg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
invlpg -0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<invlpg>:
mov    %rdi,-0x8(%rsp)
invlpg -0x8(%rsp)
ret

LLVM IR (-O0):
define void @invlpg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @invlpg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}
int intify(char *x) { return (int)x; }


x86 assembly (clang, -O0):
<intify>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intify>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i32 @intify(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @intify(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i32
ret i32 %3
}
int scan_rows(char *str) {
  int rows;
  int i;
  rows = 0;
  i = 0;
  while (str[i] != '\0') {
    if (str[i] == '\n')
      rows++;
    i++;
  }
  if (rows == 0)
    return (++rows);
  return (rows);
}


x86 assembly (clang, -O0):
<scan_rows>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1157 <scan_rows+0x57>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0xa,%eax
jne    1149 <scan_rows+0x49>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1116 <scan_rows+0x16>
cmpl   $0x0,-0x14(%rbp)
jne    1172 <scan_rows+0x72>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    %eax,-0x4(%rbp)
jmp    1178 <scan_rows+0x78>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scan_rows>:
xor    %ecx,%ecx
jmp    1117 <scan_rows+0x17>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
add    $0x1,%ecx
add    $0x1,%rdi
movzbl (%rdi),%eax
cmp    $0xa,%al
je     1110 <scan_rows+0x10>
test   %al,%al
jne    1113 <scan_rows+0x13>
test   %ecx,%ecx
mov    $0x1,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @scan_rows(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %25, %1
%7 = load i8*, i8** %3
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %28
14: ; preds = %6
%15 = load i8*, i8** %3
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 10
br i1 %21, label %22, label %25
22: ; preds = %14
%23 = load i32, i32* %4
%24 = add nsw i32 %23, 1
store i32 %24, i32* %4
br label %25
25: ; preds = %22, %14
%26 = load i32, i32* %5
%27 = add nsw i32 %26, 1
store i32 %27, i32* %5
br label %6
28: ; preds = %6
%29 = load i32, i32* %4
%30 = icmp eq i32 %29, 0
br i1 %30, label %31, label %34
31: ; preds = %28
%32 = load i32, i32* %4
%33 = add nsw i32 %32, 1
store i32 %33, i32* %4
store i32 %33, i32* %2
br label %36
34: ; preds = %28
%35 = load i32, i32* %4
store i32 %35, i32* %2
br label %36
36: ; preds = %34, %31
%37 = load i32, i32* %2
ret i32 %37
}

LLVM IR (-O2):
define i32 @scan_rows(i8* nocapture %0) {
br label %2
2: ; preds = %9, %1
%3 = phi i64 [ %11, %9 ], [ 0, %1 ]
%4 = phi i32 [ %10, %9 ], [ 0, %1 ]
%5 = getelementptr inbounds i8, i8* %0, i64 %3
%6 = load i8, i8* %5
switch i8 %6, label %9 [
i8 0, label %12
i8 10, label %7
]
7: ; preds = %2
%8 = add nsw i32 %4, 1
br label %9
9: ; preds = %2, %7
%10 = phi i32 [ %8, %7 ], [ %4, %2 ]
%11 = add nuw i64 %3, 1
br label %2
12: ; preds = %2
%13 = icmp eq i32 %4, 0
%14 = select i1 %13, i32 1, i32 %4
ret i32 %14
}
/* Variables and functions */
int generic_test(char const *, char const *, int /*<<< orphan*/, int);
int /*<<< orphan*/ test_title(char *);
int test3(void) {
  const char *rd, *wr;
  rd = "uart16550";
  wr = "solution";
  test_title("Test 3. Read, small speed");
  return generic_test(rd, wr, 0, 5);
}


x86 assembly (clang, -O0):
<test3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xed0(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    0xece(%rip),%rdi
call   1040 <test_title@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
mov    $0x5,%ecx
call   1030 <generic_test@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test3>:
push   %rax
lea    0xeeb(%rip),%rdi
call   1040 <test_title@plt>
lea    0xecc(%rip),%rdi
lea    0xecf(%rip),%rsi
xor    %edx,%edx
mov    $0x5,%ecx
pop    %rax
jmp    1030 <generic_test@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"uart16550\00"
@.str.1 = [9 x i8] c"solution\00"
@.str.2 = [26 x i8] c"Test 3. Read, small speed\00"
define i32 @test3() {
%1 = alloca i8*
%2 = alloca i8*
store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8** %1
store i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8** %2
%3 = call i32 @test_title(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i64 0, i64 0))
%4 = load i8*, i8** %1
%5 = load i8*, i8** %2
%6 = call i32 @generic_test(i8* %4, i8* %5, i32 0, i32 5)
ret i32 %6
}

LLVM IR (-O2):
@.str = [10 x i8] c"uart16550\00"
@.str.1 = [9 x i8] c"solution\00"
@.str.2 = [26 x i8] c"Test 3. Read, small speed\00"
define i32 @test3() {
%1 = tail call i32 @test_title(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i64 0, i64 0))
%2 = tail call i32 @generic_test(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32 0, i32 5)
ret i32 %2
}
void ARGBToAR30Row_Any_AVX2() {}


x86 assembly (clang, -O0):
<ARGBToAR30Row_Any_AVX2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBToAR30Row_Any_AVX2>:
ret

LLVM IR (-O0):
define void @ARGBToAR30Row_Any_AVX2() {
ret void
}

LLVM IR (-O2):
define void @ARGBToAR30Row_Any_AVX2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
void usage(char *program_name) {
  printf("Usage: %s <message> <# of times to repeat>\n", program_name);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [44 x i8] c"Usage: %s <message> <# of times to repeat>\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [44 x i8] c"Usage: %s <message> <# of times to repeat>\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
signed int ptsname_r(signed int __fd, char *__buf, unsigned long int __buflen) {
  signed int return_value___ptsname_r_chk$1;
  signed int return_value___ptsname_r_chk_warn$2;
  signed int return_value___ptsname_r_alias$3;
  return_value___ptsname_r_alias$3 = __ptsname_r_alias(__fd, __buf, __buflen);
  return return_value___ptsname_r_alias$3;
}


x86 assembly (clang, -O0):
<ptsname_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    $0x0,%al
call   1030 <__ptsname_r_alias@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptsname_r>:
xor    %eax,%eax
jmp    1030 <__ptsname_r_alias@plt>

LLVM IR (-O0):
define i32 @ptsname_r(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%10 = load i32, i32* %4
%11 = load i8*, i8** %5
%12 = load i64, i64* %6
%13 = call i32 (i32, i8*, i64, ...) bitcast (i32 (...)* @__ptsname_r_alias to i32 (i32, i8*, i64, ...)*)(i32 %10, i8* %11, i64 %12)
store i32 %13, i32* %9
%14 = load i32, i32* %9
ret i32 %14
}

LLVM IR (-O2):
define i32 @ptsname_r(i32 %0, i8* %1, i64 %2) {
%4 = tail call i32 (i32, i8*, i64, ...) bitcast (i32 (...)* @__ptsname_r_alias to i32 (i32, i8*, i64, ...)*)(i32 %0, i8* %1, i64 %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ _fail(char const *const, int const);
int /*<<< orphan*/ print_error(char *, char const *const);
void _assert_true(const unsigned long long result, const char *const expression,
                  const char *const file, const int line) {
  if (!result) {
    print_error("%s\n", expression);
    _fail(file, line);
  }
}


x86 assembly (clang, -O0):
<_assert_true>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    115e <_assert_true+0x3e>
mov    -0x10(%rbp),%rsi
lea    0xeb3(%rip),%rdi
call   1030 <print_error@plt>
mov    -0x18(%rbp),%rdi
mov    -0x1c(%rbp),%esi
call   1040 <_fail@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_assert_true>:
test   %rdi,%rdi
je     1126 <_assert_true+0x6>
ret
push   %rbp
push   %rbx
push   %rax
mov    %ecx,%ebp
mov    %rdx,%rbx
lea    0xecb(%rip),%rdi
call   1030 <print_error@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <_fail@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @_assert_true(i64 %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i64
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store i64 %0, i64* %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i64, i64* %5
%10 = icmp ne i64 %9, 0
br i1 %10, label %17, label %11
11: ; preds = %4
%12 = load i8*, i8** %6
%13 = call i32 @print_error(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %12)
%14 = load i8*, i8** %7
%15 = load i32, i32* %8
%16 = call i32 @_fail(i8* %14, i32 %15)
br label %17
17: ; preds = %11, %4
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @_assert_true(i64 %0, i8* %1, i8* %2, i32 %3) {
%5 = icmp eq i64 %0, 0
br i1 %5, label %6, label %9
6: ; preds = %4
%7 = tail call i32 @print_error(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %1)
%8 = tail call i32 @_fail(i8* %2, i32 %3)
br label %9
9: ; preds = %6, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ tgt_put(char *);
void gen_target_header() {
  tgt_put("<?xml version=\"1.0\"?><!DOCTYPE target SYSTEM \"gdb-target.dtd\">");
}


x86 assembly (clang, -O0):
<gen_target_header>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <tgt_put@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_target_header>:
lea    0xee9(%rip),%rdi
jmp    1030 <tgt_put@plt>

LLVM IR (-O0):
@.str = [63 x i8] c"<?xml version=\221.0\22?><!DOCTYPE target SYSTEM \22gdb-target.dtd\22>\00"
define void @gen_target_header() {
%1 = call i32 @tgt_put(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [63 x i8] c"<?xml version=\221.0\22?><!DOCTYPE target SYSTEM \22gdb-target.dtd\22>\00"
define void @gen_target_header() {
%1 = tail call i32 @tgt_put(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct nouveau_i2c {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ nv_mask(struct nouveau_i2c *, int, int, int);
void auxch_fini(struct nouveau_i2c *aux, int ch) {
  nv_mask(aux, 0x00e4e4 + (ch * 0x50), 0x00310000, 0x00000000);
}


x86 assembly (clang, -O0):
<auxch_fini>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
imul   $0x50,-0xc(%rbp),%esi
add    $0xe4e4,%esi
mov    $0x310000,%edx
xor    %ecx,%ecx
call   1030 <nv_mask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<auxch_fini>:
lea    (%rsi,%rsi,4),%esi
shl    $0x4,%esi
add    $0xe4e4,%esi
mov    $0x310000,%edx
xor    %ecx,%ecx
jmp    1030 <nv_mask@plt>

LLVM IR (-O0):
%struct.nouveau_i2c = type { i32 }
define void @auxch_fini(%struct.nouveau_i2c* %0, i32 %1) {
%3 = alloca %struct.nouveau_i2c*
%4 = alloca i32
store %struct.nouveau_i2c* %0, %struct.nouveau_i2c** %3
store i32 %1, i32* %4
%5 = load %struct.nouveau_i2c*, %struct.nouveau_i2c** %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %6, 80
%8 = add nsw i32 58596, %7
%9 = call i32 @nv_mask(%struct.nouveau_i2c* %5, i32 %8, i32 3211264, i32 0)
ret void
}

LLVM IR (-O2):
%struct.nouveau_i2c = type { i32 }
define void @auxch_fini(%struct.nouveau_i2c* %0, i32 %1) {
%3 = mul nsw i32 %1, 80
%4 = add nsw i32 %3, 58596
%5 = tail call i32 @nv_mask(%struct.nouveau_i2c* %0, i32 %4, i32 3211264, i32 0)
ret void
}
void outnop1str(s) char *s;
{
  ;
  outstr(s);
  bumplc();
  outnl();
}


x86 assembly (clang, -O0):
<outnop1str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <outstr@plt>
mov    $0x0,%al
call   1030 <bumplc@plt>
mov    $0x0,%al
call   1050 <outnl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outnop1str>:
push   %rax
xor    %eax,%eax
call   1040 <outstr@plt>
xor    %eax,%eax
call   1030 <bumplc@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <outnl@plt>

LLVM IR (-O0):
define void @outnop1str(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, ...) bitcast (i32 (...)* @outstr to i32 (i8*, ...)*)(i8* %3)
%5 = call i32 (...) @bumplc()
%6 = call i32 (...) @outnl()
ret void
}

LLVM IR (-O2):
define void @outnop1str(i8* %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @outstr to i32 (i8*, ...)*)(i8* %0)
%3 = tail call i32 (...) @bumplc()
%4 = tail call i32 (...) @outnl()
ret void
}
/* Variables and functions */
unsigned int glGetError();
unsigned int GetError(void) { return glGetError(); }


x86 assembly (clang, -O0):
<GetError>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <glGetError@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetError>:
xor    %eax,%eax
jmp    1030 <glGetError@plt>

LLVM IR (-O0):
define i32 @GetError() {
%1 = call i32 (...) @glGetError()
ret i32 %1
}

LLVM IR (-O2):
define i32 @GetError() {
%1 = tail call i32 (...) @glGetError()
ret i32 %1
}
/* Variables and functions */
int __isatty(int);
int isatty(int fd) { return __isatty(fd); }


x86 assembly (clang, -O0):
<isatty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <__isatty@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isatty>:
jmp    1030 <__isatty@plt>

LLVM IR (-O0):
define i32 @isatty(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__isatty(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @isatty(i32 %0) {
%2 = tail call i32 @__isatty(i32 %0)
ret i32 %2
}
/* Variables and functions */
int foo();
int main() {
  int result;
  result = foo();
  result++;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <foo@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @foo()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
store i32 %5, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @foo()
ret i32 0
}
/* Variables and functions */
scalar_t__ strlen(char *);
int strncmp(char *, char *, scalar_t__);
int compareStr(char *str1, char *str2) {
  if (strlen(str1) != strlen(str2))
    return -1;
  return strncmp(str1, str2, strlen(str1));
}


x86 assembly (clang, -O0):
<compareStr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
cmp    %rcx,%rax
je     1162 <compareStr+0x42>
movl   $0xffffffff,-0x4(%rbp)
jmp    118e <compareStr+0x6e>
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x30(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    %rax,%rdx
call   1030 <strncmp@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compareStr>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1040 <strlen@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1040 <strlen@plt>
cmp    %rax,%rbx
jne    1153 <compareStr+0x33>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <strncmp@plt>
mov    $0xffffffff,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @compareStr(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = call i64 @strlen(i8* %6)
%8 = load i8*, i8** %5
%9 = call i64 @strlen(i8* %8)
%10 = icmp ne i64 %7, %9
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 -1, i32* %3
br label %18
12: ; preds = %2
%13 = load i8*, i8** %4
%14 = load i8*, i8** %5
%15 = load i8*, i8** %4
%16 = call i64 @strlen(i8* %15)
%17 = call i32 @strncmp(i8* %13, i8* %14, i64 %16)
store i32 %17, i32* %3
br label %18
18: ; preds = %12, %11
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @compareStr(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @strncmp(i8* %0, i8* %1, i64 %3)
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ %7, %6 ], [ -1, %2 ]
ret i32 %9
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
int sine(int angle) {
  int cflag, zflag;
  cflag = angle & 0x0800;
  zflag = angle & 0x1000;
  if (cflag)
    angle = -angle;
  angle &= 0xfff;
  angle |= 0xe000 >> 1;
  angle <<= 1;
  angle = *(uint16_t *)angle;
  if (zflag)
    angle = -angle;
  return angle;
}


x86 assembly (clang, -O0):
<sine>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x800,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1000,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112f <sine+0x2f>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xfff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
or     $0x7000,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x4(%rbp)
movslq -0x4(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1169 <sine+0x69>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sine>:
mov    %edi,%eax
neg    %eax
test   $0x800,%edi
cmove  %edi,%eax
add    %eax,%eax
movzwl %ax,%eax
or     $0xe000,%rax
mov    (%rax),%ecx
mov    %ecx,%eax
neg    %eax
test   $0x1000,%edi
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @sine(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = and i32 %5, 2048
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = and i32 %7, 4096
store i32 %8, i32* %4
%9 = load i32, i32* %3
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %1
%12 = load i32, i32* %2
%13 = sub nsw i32 0, %12
store i32 %13, i32* %2
br label %14
14: ; preds = %11, %1
%15 = load i32, i32* %2
%16 = and i32 %15, 4095
store i32 %16, i32* %2
%17 = load i32, i32* %2
%18 = or i32 %17, 28672
store i32 %18, i32* %2
%19 = load i32, i32* %2
%20 = shl i32 %19, 1
store i32 %20, i32* %2
%21 = load i32, i32* %2
%22 = sext i32 %21 to i64
%23 = inttoptr i64 %22 to i32*
%24 = load i32, i32* %23
store i32 %24, i32* %2
%25 = load i32, i32* %4
%26 = icmp ne i32 %25, 0
br i1 %26, label %27, label %30
27: ; preds = %14
%28 = load i32, i32* %2
%29 = sub nsw i32 0, %28
store i32 %29, i32* %2
br label %30
30: ; preds = %27, %14
%31 = load i32, i32* %2
ret i32 %31
}

LLVM IR (-O2):
define i32 @sine(i32 %0) {
%2 = and i32 %0, 2048
%3 = and i32 %0, 4096
%4 = icmp eq i32 %2, 0
%5 = sub nsw i32 0, %0
%6 = select i1 %4, i32 %0, i32 %5
%7 = shl i32 %6, 1
%8 = and i32 %7, 8190
%9 = or i32 %8, 57344
%10 = zext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
%12 = load i32, i32* %11
%13 = icmp eq i32 %3, 0
%14 = sub nsw i32 0, %12
%15 = select i1 %13, i32 %12, i32 %14
ret i32 %15
}
int f2fs_set_bit(unsigned int nr, unsigned char *addr) {
  int mask;
  int ret;
  addr += (nr >> 3);
  mask = 1 << (7 - (nr & 0x07));
  ret = mask & *addr;
  *addr |= mask;
  return ret;
}


x86 assembly (clang, -O0):
<f2fs_set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
shr    $0x3,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,%ecx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x7,%eax
mov    $0x7,%ecx
sub    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x10(%rbp),%rcx
movzbl (%rcx),%ecx
and    %ecx,%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%edx
mov    -0x10(%rbp),%rax
movzbl (%rax),%ecx
or     %edx,%ecx
mov    %cl,(%rax)
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2fs_set_bit>:
mov    %edi,%ecx
mov    %edi,%edx
shr    $0x3,%rdx
not    %cl
and    $0x7,%cl
mov    $0x1,%eax
shl    %cl,%eax
movzbl (%rsi,%rdx,1),%edi
and    %edi,%eax
bts    %ecx,%edi
mov    %dil,(%rsi,%rdx,1)
ret

LLVM IR (-O0):
define i32 @f2fs_set_bit(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%7 = load i32, i32* %3
%8 = lshr i32 %7, 3
%9 = load i8*, i8** %4
%10 = zext i32 %8 to i64
%11 = getelementptr inbounds i8, i8* %9, i64 %10
store i8* %11, i8** %4
%12 = load i32, i32* %3
%13 = and i32 %12, 7
%14 = sub i32 7, %13
%15 = shl i32 1, %14
store i32 %15, i32* %5
%16 = load i32, i32* %5
%17 = load i8*, i8** %4
%18 = load i8, i8* %17
%19 = zext i8 %18 to i32
%20 = and i32 %16, %19
store i32 %20, i32* %6
%21 = load i32, i32* %5
%22 = load i8*, i8** %4
%23 = load i8, i8* %22
%24 = zext i8 %23 to i32
%25 = or i32 %24, %21
%26 = trunc i32 %25 to i8
store i8 %26, i8* %22
%27 = load i32, i32* %6
ret i32 %27
}

LLVM IR (-O2):
define i32 @f2fs_set_bit(i32 %0, i8* nocapture %1) {
%3 = lshr i32 %0, 3
%4 = zext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %1, i64 %4
%6 = and i32 %0, 7
%7 = xor i32 %6, 7
%8 = shl nuw i32 1, %7
%9 = load i8, i8* %5
%10 = zext i8 %9 to i32
%11 = and i32 %8, %10
%12 = trunc i32 %8 to i8
%13 = or i8 %9, %12
store i8 %13, i8* %5
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void halt_this_thing() {
  printf("\n");
  exit(0);
}


x86 assembly (clang, -O0):
<halt_this_thing>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<halt_this_thing>:
push   %rax
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @halt_this_thing() {
%1 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @halt_this_thing() {
%1 = tail call i32 @putchar(i32 10)
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ print_error(char *, int);
int /*<<< orphan*/ print_type(char *, int);
void gen_int8() {
  if (sizeof(char) == 1)
    print_type("char", 8);
  else
    print_error("char", sizeof(char));
}


x86 assembly (clang, -O0):
<gen_int8>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x8,%esi
call   1030 <print_type@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_int8>:
lea    0xee9(%rip),%rdi
mov    $0x8,%esi
jmp    1030 <print_type@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"char\00"
define void @gen_int8() {
%1 = call i32 @print_type(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 8)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"char\00"
define void @gen_int8() {
%1 = tail call i32 @print_type(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 8)
ret void
}
/* Type definitions */
struct tcb {
  int dummy;
};

/* Variables and functions */
int do_accept(struct tcb *, int);
int sys_accept4(struct tcb *tcp) { return do_accept(tcp, 3); }


x86 assembly (clang, -O0):
<sys_accept4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x3,%esi
call   1030 <do_accept@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_accept4>:
mov    $0x3,%esi
jmp    1030 <do_accept@plt>

LLVM IR (-O0):
%struct.tcb = type { i32 }
define i32 @sys_accept4(%struct.tcb* %0) {
%2 = alloca %struct.tcb*
store %struct.tcb* %0, %struct.tcb** %2
%3 = load %struct.tcb*, %struct.tcb** %2
%4 = call i32 @do_accept(%struct.tcb* %3, i32 3)
ret i32 %4
}

LLVM IR (-O2):
%struct.tcb = type { i32 }
define i32 @sys_accept4(%struct.tcb* %0) {
%2 = tail call i32 @do_accept(%struct.tcb* %0, i32 3)
ret i32 %2
}
int chartorune(char *rp, char *s) {
  *rp = s[0];
  return 1;
}


x86 assembly (clang, -O0):
<chartorune>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<chartorune>:
mov    (%rsi),%al
mov    %al,(%rdi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @chartorune(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = getelementptr inbounds i8, i8* %5, i64 0
%7 = load i8, i8* %6
%8 = load i8*, i8** %3
store i8 %7, i8* %8
ret i32 1
}

LLVM IR (-O2):
define i32 @chartorune(i8* nocapture writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
store i8 %3, i8* %0
ret i32 1
}
unsigned int ht_hashcode(const char *key) {
  unsigned char *ukey = (unsigned char *)key;
  unsigned int result = 17;
  while (*ukey != '\0') {
    result = 31 * result + *ukey++;
  }
  return result;
}


x86 assembly (clang, -O0):
<ht_hashcode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
movl   $0x11,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
cmp    $0x0,%eax
je     1147 <ht_hashcode+0x47>
imul   $0x1f,-0x14(%rbp),%eax
mov    -0x10(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
movzbl (%rcx),%ecx
add    %ecx,%eax
mov    %eax,-0x14(%rbp)
jmp    1117 <ht_hashcode+0x17>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ht_hashcode>:
mov    (%rdi),%cl
test   %cl,%cl
je     1138 <ht_hashcode+0x38>
add    $0x1,%rdi
mov    $0x11,%edx
mov    %edx,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movzbl %cl,%ecx
shl    $0x5,%eax
sub    %edx,%eax
add    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
mov    %eax,%edx
test   %cl,%cl
jne    1120 <ht_hashcode+0x20>
ret
mov    $0x11,%eax
ret

LLVM IR (-O0):
define i32 @ht_hashcode(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8* %5, i8** %3
store i32 17, i32* %4
br label %6
6: ; preds = %11, %1
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %6
%12 = load i32, i32* %4
%13 = mul i32 31, %12
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %3
%16 = load i8, i8* %14
%17 = zext i8 %16 to i32
%18 = add i32 %13, %17
store i32 %18, i32* %4
br label %6
19: ; preds = %6
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @ht_hashcode(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 17, %1 ]
%7 = phi i8* [ %10, %4 ], [ %0, %1 ]
%8 = zext i8 %5 to i32
%9 = mul i32 %6, 31
%10 = getelementptr inbounds i8, i8* %7, i64 1
%11 = add i32 %9, %8
%12 = load i8, i8* %10
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i32 [ 17, %1 ], [ %11, %4 ]
ret i32 %15
}
int set_bit(unsigned long int *n, unsigned int index) {
  if (index <= 64) {
    *n = *n | (1 << index);
    return (1);
  }
  return (-1);
}


x86 assembly (clang, -O0):
<set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x40,-0x14(%rbp)
ja     1146 <set_bit+0x46>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x14(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    -0x20(%rbp),%rcx
cltq
or     %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x1,-0x4(%rbp)
jmp    114d <set_bit+0x4d>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_bit>:
mov    $0xffffffff,%eax
cmp    $0x40,%esi
ja     111e <set_bit+0x1e>
mov    $0x1,%eax
mov    $0x1,%edx
mov    %esi,%ecx
shl    %cl,%edx
movslq %edx,%rcx
or     %rcx,(%rdi)
ret

LLVM IR (-O0):
define i32 @set_bit(i64* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i32
store i64* %0, i64** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ule i32 %6, 64
br i1 %7, label %8, label %16
8: ; preds = %2
%9 = load i64*, i64** %4
%10 = load i64, i64* %9
%11 = load i32, i32* %5
%12 = shl i32 1, %11
%13 = sext i32 %12 to i64
%14 = or i64 %10, %13
%15 = load i64*, i64** %4
store i64 %14, i64* %15
store i32 1, i32* %3
br label %17
16: ; preds = %2
store i32 -1, i32* %3
br label %17
17: ; preds = %16, %8
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @set_bit(i64* nocapture %0, i32 %1) {
%3 = icmp ult i32 %1, 65
br i1 %3, label %4, label %9
4: ; preds = %2
%5 = load i64, i64* %0
%6 = shl nuw i32 1, %1
%7 = sext i32 %6 to i64
%8 = or i64 %5, %7
store i64 %8, i64* %0
br label %9
9: ; preds = %2, %4
%10 = phi i32 [ 1, %4 ], [ -1, %2 ]
ret i32 %10
}
void c_pomp_single_begin_(struct ompregdescr *r) { (void)0; }


x86 assembly (clang, -O0):
<c_pomp_single_begin_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_pomp_single_begin_>:
ret

LLVM IR (-O0):
%struct.ompregdescr = type opaque
define void @c_pomp_single_begin_(%struct.ompregdescr* %0) {
%2 = alloca %struct.ompregdescr*
store %struct.ompregdescr* %0, %struct.ompregdescr** %2
ret void
}

LLVM IR (-O2):
%struct.ompregdescr = type opaque
define void @c_pomp_single_begin_(%struct.ompregdescr* nocapture %0) {
ret void
}
/* Variables and functions */
void *malloc(int);
scalar_t__ nondet_bool();
int analyze_this() {
  char *p_char = malloc(sizeof(char));
  int *p_int = malloc(sizeof(int));
  void *p;
  p = nondet_bool() ? p_char : p_int;
  p_int = p;
  if ((void *)p_int != (void *)p_char)
    *p_int = 1;
}


x86 assembly (clang, -O0):
<analyze_this>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    $0x1,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    $0x0,%al
call   1040 <nondet_bool@plt>
cmp    $0x0,%rax
je     1162 <analyze_this+0x42>
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
jmp    116a <analyze_this+0x4a>
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
je     1192 <analyze_this+0x72>
mov    -0x18(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<analyze_this>:
push   %r14
push   %rbx
push   %rax
mov    $0x1,%edi
call   1030 <malloc@plt>
mov    %rax,%r14
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1040 <nondet_bool@plt>
test   %rax,%rax
cmovne %r14,%rbx
cmp    %r14,%rbx
je     1157 <analyze_this+0x37>
movl   $0x1,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @analyze_this() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i32*
%4 = alloca i8*
%5 = call i8* @malloc(i32 1)
store i8* %5, i8** %2
%6 = call i8* @malloc(i32 4)
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %3
%8 = call i64 (...) @nondet_bool()
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %0
%11 = load i8*, i8** %2
br label %15
12: ; preds = %0
%13 = load i32*, i32** %3
%14 = bitcast i32* %13 to i8*
br label %15
15: ; preds = %12, %10
%16 = phi i8* [ %11, %10 ], [ %14, %12 ]
store i8* %16, i8** %4
%17 = load i8*, i8** %4
%18 = bitcast i8* %17 to i32*
store i32* %18, i32** %3
%19 = load i32*, i32** %3
%20 = bitcast i32* %19 to i8*
%21 = load i8*, i8** %2
%22 = icmp ne i8* %20, %21
br i1 %22, label %23, label %25
23: ; preds = %15
%24 = load i32*, i32** %3
store i32 1, i32* %24
br label %25
25: ; preds = %23, %15
%26 = load i32, i32* %1
ret i32 %26
}

LLVM IR (-O2):
define i32 @analyze_this() {
%1 = tail call dereferenceable_or_null(1) i8* @malloc(i32 1)
%2 = tail call dereferenceable_or_null(4) i8* @malloc(i32 4)
%3 = tail call i64 (...) @nondet_bool()
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i8* %2, i8* %1
%6 = icmp eq i8* %5, %1
br i1 %6, label %9, label %7
7: ; preds = %0
%8 = bitcast i8* %5 to i32*
store i32 1, i32* %8
br label %9
9: ; preds = %7, %0
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *);
void banner() {
  printf("Kardinal %s, %s\n", "0.9.0", "13 August 2017 10:24:37");
}


x86 assembly (clang, -O0):
<banner>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xeef(%rip),%rsi
lea    0xeee(%rip),%rdx
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<banner>:
lea    0xee9(%rip),%rdi
lea    0xef3(%rip),%rsi
lea    0xef2(%rip),%rdx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"Kardinal %s, %s\0A\00"
@.str.1 = [6 x i8] c"0.9.0\00"
@.str.2 = [24 x i8] c"13 August 2017 10:24:37\00"
define void @banner() {
%1 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"Kardinal %s, %s\0A\00"
@.str.1 = [6 x i8] c"0.9.0\00"
@.str.2 = [24 x i8] c"13 August 2017 10:24:37\00"
define void @banner() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.2, i64 0, i64 0))
ret void
}
void xpm_init() {}


x86 assembly (clang, -O0):
<xpm_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xpm_init>:
ret

LLVM IR (-O0):
define void @xpm_init() {
ret void
}

LLVM IR (-O2):
define void @xpm_init() {
ret void
}
/* Variables and functions */
char *getenv(const char *var) { return NULL; }


x86 assembly (clang, -O0):
<getenv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getenv>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @getenv(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @getenv(i8* nocapture readnone %0) {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ do_uninit_read(int *);
void uninit_test1(int *val_p) { do_uninit_read(val_p); }


x86 assembly (clang, -O0):
<uninit_test1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <do_uninit_read@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninit_test1>:
jmp    1030 <do_uninit_read@plt>

LLVM IR (-O0):
define void @uninit_test1(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @do_uninit_read(i32* %3)
ret void
}

LLVM IR (-O2):
define void @uninit_test1(i32* %0) {
%2 = tail call i32 @do_uninit_read(i32* %0)
ret void
}
void swap(int *a, int *b) {
  int i;
  i = *a;
  *a = *b;
  *b = i;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ntohl(int /*<<< orphan*/);
uint32_t freertps_ntohl(uint32_t u) { return ntohl(u); }


x86 assembly (clang, -O0):
<freertps_ntohl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ntohl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freertps_ntohl>:
jmp    1030 <ntohl@plt>

LLVM IR (-O0):
define i32 @freertps_ntohl(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ntohl(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @freertps_ntohl(i32 %0) {
%2 = tail call i32 @ntohl(i32 %0)
ret i32 %2
}
void DisableRTC1HZ(void) {}


x86 assembly (clang, -O0):
<DisableRTC1HZ>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DisableRTC1HZ>:
ret

LLVM IR (-O0):
define void @DisableRTC1HZ() {
ret void
}

LLVM IR (-O2):
define void @DisableRTC1HZ() {
ret void
}
void REMR3State(void) {}


x86 assembly (clang, -O0):
<REMR3State>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<REMR3State>:
ret

LLVM IR (-O0):
define void @REMR3State() {
ret void
}

LLVM IR (-O2):
define void @REMR3State() {
ret void
}
void glDrawElements(unsigned int mode, int count, unsigned int type,
                    const void *indices) {}


x86 assembly (clang, -O0):
<glDrawElements>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glDrawElements>:
ret

LLVM IR (-O0):
define void @glDrawElements(i32 %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8* %3, i8** %8
ret void
}

LLVM IR (-O2):
define void @glDrawElements(i32 %0, i32 %1, i32 %2, i8* nocapture %3) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ addbyte(int);
void ADD_HOST_REG_B(int dst_reg, int src_reg) {
  addbyte(0x00);
  addbyte(0xc0 | dst_reg | (src_reg << 3));
}


x86 assembly (clang, -O0):
<ADD_HOST_REG_B>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %edi,%edi
call   1030 <addbyte@plt>
mov    -0x4(%rbp),%edi
or     $0xc0,%edi
mov    -0x8(%rbp),%eax
shl    $0x3,%eax
or     %eax,%edi
call   1030 <addbyte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADD_HOST_REG_B>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
call   1030 <addbyte@plt>
shl    $0x3,%ebx
or     %ebp,%ebx
or     $0xc0,%ebx
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <addbyte@plt>

LLVM IR (-O0):
define void @ADD_HOST_REG_B(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @addbyte(i32 0)
%6 = load i32, i32* %3
%7 = or i32 192, %6
%8 = load i32, i32* %4
%9 = shl i32 %8, 3
%10 = or i32 %7, %9
%11 = call i32 @addbyte(i32 %10)
ret void
}

LLVM IR (-O2):
define void @ADD_HOST_REG_B(i32 %0, i32 %1) {
%3 = tail call i32 @addbyte(i32 0)
%4 = shl i32 %1, 3
%5 = or i32 %4, %0
%6 = or i32 %5, 192
%7 = tail call i32 @addbyte(i32 %6)
ret void
}
/* Variables and functions */
int test_and_set_bit(int, unsigned long volatile *);
__attribute__((always_)) __attribute__((always_)) int
test_and_set_bit_lock(int nr, volatile unsigned long *addr) {
  return test_and_set_bit(nr, addr);
}


x86 assembly (clang, -O0):
<test_and_set_bit_lock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <test_and_set_bit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_and_set_bit_lock>:
jmp    1030 <test_and_set_bit@plt>

LLVM IR (-O0):
define i32 @test_and_set_bit_lock(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%5 = load i32, i32* %3
%6 = load i64*, i64** %4
%7 = call i32 @test_and_set_bit(i32 %5, i64* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_and_set_bit_lock(i32 %0, i64* %1) {
%3 = tail call i32 @test_and_set_bit(i32 %0, i64* %1)
ret i32 %3
}
void rop3_248_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = *D & S;
  stk1 = T | stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_248_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_248_1_1>:
or     %edx,%esi
and    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_248_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = and i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %8
%16 = load i8, i8* %6
%17 = zext i8 %16 to i32
%18 = load i8, i8* %8
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
%21 = trunc i32 %20 to i8
store i8 %21, i8* %7
%22 = load i8, i8* %7
%23 = zext i8 %22 to i32
%24 = load i8, i8* %5
%25 = zext i8 %24 to i32
%26 = xor i32 %25, -1
%27 = and i32 %23, %26
%28 = load i8, i8* %6
%29 = zext i8 %28 to i32
%30 = xor i32 %29, -1
%31 = and i32 %27, %30
%32 = load i8*, i8** %4
%33 = load i8, i8* %32
%34 = zext i8 %33 to i32
%35 = load i8, i8* %5
%36 = zext i8 %35 to i32
%37 = and i32 %34, %36
%38 = or i32 %31, %37
%39 = load i8*, i8** %4
%40 = load i8, i8* %39
%41 = zext i8 %40 to i32
%42 = load i8, i8* %6
%43 = zext i8 %42 to i32
%44 = and i32 %41, %43
%45 = or i32 %38, %44
%46 = trunc i32 %45 to i8
%47 = load i8*, i8** %4
store i8 %46, i8* %47
ret void
}

LLVM IR (-O2):
define void @rop3_248_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %2, %1
%6 = and i8 %4, %5
store i8 %6, i8* %0
ret void
}
/* Type definitions */
struct Var {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ pA(char *, char const *, char const *, char const *,
                      char const *);
void __func_gt_sint(struct Var *avar, const char *areg, const char *lreg,
                    const char *rreg) {
  pA("if (%s > %s) {%s = 1;} else {%s = 0;}", lreg, rreg, areg, areg);
}


x86 assembly (clang, -O0):
<__func_gt_sint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x10(%rbp),%r8
lea    0xec1(%rip),%rdi
call   1030 <pA@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__func_gt_sint>:
mov    %rsi,%r8
lea    0xee6(%rip),%rdi
mov    %rdx,%rsi
mov    %rcx,%rdx
mov    %r8,%rcx
jmp    1030 <pA@plt>

LLVM IR (-O0):
%struct.Var = type { i32 }
@.str = [38 x i8] c"if (%s > %s) {%s = 1;} else {%s = 0;}\00"
define void @__func_gt_sint(%struct.Var* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca %struct.Var*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store %struct.Var* %0, %struct.Var** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %7
%10 = load i8*, i8** %8
%11 = load i8*, i8** %6
%12 = load i8*, i8** %6
%13 = call i32 @pA(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i8* %9, i8* %10, i8* %11, i8* %12)
ret void
}

LLVM IR (-O2):
%struct.Var = type { i32 }
@.str = [38 x i8] c"if (%s > %s) {%s = 1;} else {%s = 0;}\00"
define void @__func_gt_sint(%struct.Var* nocapture readnone %0, i8* %1, i8* %2, i8* %3) {
%5 = tail call i32 @pA(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i8* %2, i8* %3, i8* %1, i8* %1)
ret void
}