xunge/DecIR huggingface dataset:
double Distance(int i, int j, double **delta) {
  if (i > j)
    return (delta[i][j]);
  else
    return (delta[j][i]);
}


x86 assembly (clang, -O0):
<Distance>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    1139 <Distance+0x39>
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
movslq -0x10(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1153 <Distance+0x53>
mov    -0x18(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
movslq -0xc(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Distance>:
cmp    %esi,%edi
mov    %esi,%eax
cmovg  %edi,%eax
cmovg  %esi,%edi
cltq
mov    (%rdx,%rax,8),%rax
movslq %edi,%rcx
movsd  (%rax,%rcx,8),%xmm0
ret

LLVM IR (-O0):
define double @Distance(i32 %0, i32 %1, double** %2) {
%4 = alloca double
%5 = alloca i32
%6 = alloca i32
%7 = alloca double**
store i32 %0, i32* %5
store i32 %1, i32* %6
store double** %2, double*** %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp sgt i32 %8, %9
br i1 %10, label %11, label %21
11: ; preds = %3
%12 = load double**, double*** %7
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds double*, double** %12, i64 %14
%16 = load double*, double** %15
%17 = load i32, i32* %6
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds double, double* %16, i64 %18
%20 = load double, double* %19
store double %20, double* %4
br label %31
21: ; preds = %3
%22 = load double**, double*** %7
%23 = load i32, i32* %6
%24 = sext i32 %23 to i64
%25 = getelementptr inbounds double*, double** %22, i64 %24
%26 = load double*, double** %25
%27 = load i32, i32* %5
%28 = sext i32 %27 to i64
%29 = getelementptr inbounds double, double* %26, i64 %28
%30 = load double, double* %29
store double %30, double* %4
br label %31
31: ; preds = %21, %11
%32 = load double, double* %4
ret double %32
}

LLVM IR (-O2):
define double @Distance(i32 %0, i32 %1, double** nocapture %2) {
%4 = icmp sgt i32 %0, %1
%5 = select i1 %4, i32 %0, i32 %1
%6 = select i1 %4, i32 %1, i32 %0
%7 = sext i32 %5 to i64
%8 = getelementptr inbounds double*, double** %2, i64 %7
%9 = load double*, double** %8
%10 = sext i32 %6 to i64
%11 = getelementptr inbounds double, double* %9, i64 %10
%12 = load double, double* %11
ret double %12
}
/* Type definitions */
typedef int uint64_t;
typedef scalar_t__ int64_t;

/* Variables and functions */
uint64_t lowest_bit(uint64_t bits) {
  return (bits & (uint64_t)(-(int64_t)bits));
}


x86 assembly (clang, -O0):
<lowest_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
movslq -0x4(%rbp),%rdx
xor    %ecx,%ecx
sub    %rdx,%rcx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lowest_bit>:
mov    %edi,%eax
neg    %eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @lowest_bit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = sext i32 %4 to i64
%6 = sub nsw i64 0, %5
%7 = trunc i64 %6 to i32
%8 = and i32 %3, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @lowest_bit(i32 %0) {
%2 = sub i32 0, %0
%3 = and i32 %2, %0
ret i32 %3
}
char *concatenate(string1, string2)
char *string1, *string2;
{
  int l1 = strlen(string1);
  int l2 = strlen(string2);
  char *new_string = check_malloc(l1 + l2 + 1);
  strncpy(new_string, string1, l1);
  strncat(new_string, string2, l2);
  return (new_string);
}


x86 assembly (clang, -O0):
<concatenate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%edi
add    -0x18(%rbp),%edi
add    $0x1,%edi
mov    $0x0,%al
call   1060 <check_malloc@plt>
cltq
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%rsi
movslq -0x14(%rbp),%rdx
call   1030 <strncpy@plt>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movslq -0x18(%rbp),%rdx
call   1050 <strncat@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<concatenate>:
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1040 <strlen@plt>
mov    %rax,%r13
mov    %r14,%rdi
call   1040 <strlen@plt>
mov    %rax,%r12
lea    (%rax,%r13,1),%edi
add    $0x1,%edi
xor    %eax,%eax
call   1060 <check_malloc@plt>
movslq %eax,%rbx
movslq %r13d,%rdx
mov    %rbx,%rdi
mov    %r15,%rsi
call   1030 <strncpy@plt>
movslq %r12d,%rdx
mov    %rbx,%rdi
mov    %r14,%rsi
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
jmp    1050 <strncat@plt>

LLVM IR (-O0):
define i8* @concatenate(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%8 = load i8*, i8** %3
%9 = call i64 @strlen(i8* %8)
%10 = trunc i64 %9 to i32
store i32 %10, i32* %5
%11 = load i8*, i8** %4
%12 = call i64 @strlen(i8* %11)
%13 = trunc i64 %12 to i32
store i32 %13, i32* %6
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = add nsw i32 %14, %15
%17 = add nsw i32 %16, 1
%18 = call i32 (i32, ...) bitcast (i32 (...)* @check_malloc to i32 (i32, ...)*)(i32 %17)
%19 = sext i32 %18 to i64
%20 = inttoptr i64 %19 to i8*
store i8* %20, i8** %7
%21 = load i8*, i8** %7
%22 = load i8*, i8** %3
%23 = load i32, i32* %5
%24 = sext i32 %23 to i64
%25 = call i8* @strncpy(i8* %21, i8* %22, i64 %24)
%26 = load i8*, i8** %7
%27 = load i8*, i8** %4
%28 = load i32, i32* %6
%29 = sext i32 %28 to i64
%30 = call i8* @strncat(i8* %26, i8* %27, i64 %29)
%31 = load i8*, i8** %7
ret i8* %31
}

LLVM IR (-O2):
define i8* @concatenate(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = trunc i64 %3 to i32
%5 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%6 = trunc i64 %5 to i32
%7 = add i32 %4, 1
%8 = add i32 %7, %6
%9 = tail call i32 (i32, ...) bitcast (i32 (...)* @check_malloc to i32 (i32, ...)*)(i32 %8)
%10 = sext i32 %9 to i64
%11 = inttoptr i64 %10 to i8*
%12 = shl i64 %3, 32
%13 = ashr exact i64 %12, 32
%14 = tail call i8* @strncpy(i8* dereferenceable(1) %11, i8* %0, i64 %13)
%15 = shl i64 %5, 32
%16 = ashr exact i64 %15, 32
%17 = tail call i8* @strncat(i8* dereferenceable(1) %11, i8* %1, i64 %16)
ret i8* %11
}
/* Type definitions */
typedef int __u32;

/* Variables and functions */
int pvrdma_idx_valid(__u32 idx, __u32 max_elems) {
  return (idx & ~((max_elems << 1) - 1)) == 0;
}


x86 assembly (clang, -O0):
<pvrdma_idx_valid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    $0x1,%ecx
sub    $0x1,%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pvrdma_idx_valid>:
add    %esi,%esi
neg    %esi
xor    %eax,%eax
test   %edi,%esi
sete   %al
ret

LLVM IR (-O0):
define i32 @pvrdma_idx_valid(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %6, 1
%8 = sub nsw i32 %7, 1
%9 = xor i32 %8, -1
%10 = and i32 %5, %9
%11 = icmp eq i32 %10, 0
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @pvrdma_idx_valid(i32 %0, i32 %1) {
%3 = mul i32 %1, -2
%4 = and i32 %3, %0
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
int ANSITOOEM() {}


x86 assembly (clang, -O0):
<ANSITOOEM>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ANSITOOEM>:
ret

LLVM IR (-O0):
define i32 @ANSITOOEM() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @ANSITOOEM() {
ret i32 undef
}
/* Type definitions */
struct term {
  int dummy;
};

/* Variables and functions */
scalar_t__ error();
int /*<<< orphan*/ free_object(int, short *);
void free_term(struct term *trm) {
  free_object(57, (short *)trm);
  if (error())
    return;
}


x86 assembly (clang, -O0):
<free_term>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x39,%edi
call   1030 <free_object@plt>
mov    $0x0,%al
call   1040 <error@plt>
cmp    $0x0,%rax
je     1150 <free_term+0x30>
jmp    1150 <free_term+0x30>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_term>:
push   %rax
mov    %rdi,%rsi
mov    $0x39,%edi
call   1030 <free_object@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <error@plt>

LLVM IR (-O0):
%struct.term = type { i32 }
define void @free_term(%struct.term* %0) {
%2 = alloca %struct.term*
store %struct.term* %0, %struct.term** %2
%3 = load %struct.term*, %struct.term** %2
%4 = bitcast %struct.term* %3 to i16*
%5 = call i32 @free_object(i32 57, i16* %4)
%6 = call i64 (...) @error()
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
br label %9
9: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
%struct.term = type { i32 }
define void @free_term(%struct.term* %0) {
%2 = bitcast %struct.term* %0 to i16*
%3 = tail call i32 @free_object(i32 57, i16* %2)
%4 = tail call i64 (...) @error()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo();
int test(long x) {
  if (x & (0x01UL << 10))
    foo();
  return 0;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x400,%rax
cmp    $0x0,%rax
je     1137 <test+0x27>
mov    $0x0,%al
call   1030 <foo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
test   $0x400,%edi
je     1124 <test+0x14>
push   %rax
xor    %eax,%eax
call   1030 <foo@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 1024
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 (...) @foo()
br label %8
8: ; preds = %6, %1
ret i32 0
}

LLVM IR (-O2):
define i32 @test(i64 %0) {
%2 = and i64 %0, 1024
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 (...) @foo()
br label %6
6: ; preds = %4, %1
ret i32 0
}
/* Variables and functions */
double rand();
void generateRandomMatrix(int length, double *array) {
  int i;
  for (i = 0; i < length; i++) {
    array[i] = rand();
  }
}


x86 assembly (clang, -O0):
<generateRandomMatrix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1154 <generateRandomMatrix+0x44>
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsd  %xmm0,(%rax,%rcx,8)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <generateRandomMatrix+0x16>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generateRandomMatrix>:
push   %r15
push   %r14
push   %rbx
test   %edi,%edi
jle    1146 <generateRandomMatrix+0x36>
mov    %rsi,%r14
mov    %edi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <rand@plt>
movsd  %xmm0,(%r14,%rbx,8)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <generateRandomMatrix+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @generateRandomMatrix(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca double*
%5 = alloca i32
store i32 %0, i32* %3
store double* %1, double** %4
store i32 0, i32* %5
br label %6
6: ; preds = %16, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = call double (...) @rand()
%12 = load double*, double** %4
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds double, double* %12, i64 %14
store double %11, double* %15
br label %16
16: ; preds = %10
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 1
store i32 %18, i32* %5
br label %6
19: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @generateRandomMatrix(i32 %0, double* nocapture writeonly %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %12
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %10, %6 ]
%8 = tail call double (...) @rand()
%9 = getelementptr inbounds double, double* %1, i64 %7
store double %8, double* %9
%10 = add nuw nsw i64 %7, 1
%11 = icmp eq i64 %10, %5
br i1 %11, label %12, label %6
12: ; preds = %6, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ put_bits(int, int, int);
void put_dmv(int dmv, int id) {
  {
    if (dmv == 0) {
      put_bits(0, 1, id);
    } else if (dmv > 0) {
      put_bits(2, 2, id);
    } else {
      put_bits(3, 2, id);
    }
    return;
  }
}


x86 assembly (clang, -O0):
<put_dmv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    113c <put_dmv+0x2c>
mov    -0x8(%rbp),%edx
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <put_bits@plt>
jmp    1171 <put_dmv+0x61>
cmpl   $0x0,-0x4(%rbp)
jle    115a <put_dmv+0x4a>
mov    -0x8(%rbp),%edx
mov    $0x2,%esi
mov    %esi,%edi
call   1030 <put_bits@plt>
jmp    116c <put_dmv+0x5c>
mov    -0x8(%rbp),%edx
mov    $0x3,%edi
mov    $0x2,%esi
call   1030 <put_bits@plt>
jmp    1171 <put_dmv+0x61>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_dmv>:
mov    %esi,%edx
test   %edi,%edi
je     1127 <put_dmv+0x17>
jle    1133 <put_dmv+0x23>
mov    $0x2,%edi
mov    $0x2,%esi
jmp    1030 <put_bits@plt>
xor    %edi,%edi
mov    $0x1,%esi
jmp    1030 <put_bits@plt>
mov    $0x3,%edi
mov    $0x2,%esi
jmp    1030 <put_bits@plt>

LLVM IR (-O0):
define void @put_dmv(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %4
%9 = call i32 @put_bits(i32 0, i32 1, i32 %8)
br label %20
10: ; preds = %2
%11 = load i32, i32* %3
%12 = icmp sgt i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %4
%15 = call i32 @put_bits(i32 2, i32 2, i32 %14)
br label %19
16: ; preds = %10
%17 = load i32, i32* %4
%18 = call i32 @put_bits(i32 3, i32 2, i32 %17)
br label %19
19: ; preds = %16, %13
br label %20
20: ; preds = %19, %7
ret void
}

LLVM IR (-O2):
define void @put_dmv(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @put_bits(i32 0, i32 1, i32 %1)
br label %12
6: ; preds = %2
%7 = icmp sgt i32 %0, 0
br i1 %7, label %8, label %10
8: ; preds = %6
%9 = tail call i32 @put_bits(i32 2, i32 2, i32 %1)
br label %12
10: ; preds = %6
%11 = tail call i32 @put_bits(i32 3, i32 2, i32 %1)
br label %12
12: ; preds = %8, %10, %4
ret void
}
/* Variables and functions */
int ArchWizard(int /*<<< orphan*/);
int /*<<< orphan*/ Me();
int Cnd_Arch(void) { return (ArchWizard(Me())); }


x86 assembly (clang, -O0):
<Cnd_Arch>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <Me@plt>
mov    %eax,%edi
call   1030 <ArchWizard@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cnd_Arch>:
push   %rax
xor    %eax,%eax
call   1040 <Me@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <ArchWizard@plt>

LLVM IR (-O0):
define i32 @Cnd_Arch() {
%1 = call i32 (...) @Me()
%2 = call i32 @ArchWizard(i32 %1)
ret i32 %2
}

LLVM IR (-O2):
define i32 @Cnd_Arch() {
%1 = tail call i32 (...) @Me()
%2 = tail call i32 @ArchWizard(i32 %1)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_9051() {
  Assert_real((isqrt(9051) == 95),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              1465, ("Integer square root of 9051 should be 95"));
}


x86 assembly (clang, -O0):
<t_sqrt_9051>:
push   %rbp
mov    %rsp,%rbp
mov    $0x235b,%edi
call   1030 <isqrt@plt>
cmp    $0x5f,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0x5b9,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_9051>:
push   %rax
mov    $0x235b,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0x5f,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0x5b9,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [41 x i8] c"Integer square root of 9051 should be 95\00"
define void @t_sqrt_9051() {
%1 = call i32 @isqrt(i32 9051)
%2 = icmp eq i32 %1, 95
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1465, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [41 x i8] c"Integer square root of 9051 should be 95\00"
define void @t_sqrt_9051() {
%1 = tail call i32 @isqrt(i32 9051)
%2 = icmp eq i32 %1, 95
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1465, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void flush_pending_by_state(struct state *st) {}


x86 assembly (clang, -O0):
<flush_pending_by_state>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<flush_pending_by_state>:
ret

LLVM IR (-O0):
%struct.state = type opaque
define void @flush_pending_by_state(%struct.state* %0) {
%2 = alloca %struct.state*
store %struct.state* %0, %struct.state** %2
ret void
}

LLVM IR (-O2):
%struct.state = type opaque
define void @flush_pending_by_state(%struct.state* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
size_t strlen(char *);
size_t wcslen(const wchar_t *s) { return strlen((char *)s); }


x86 assembly (clang, -O0):
<wcslen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcslen>:
jmp    1030 <strlen@plt>

LLVM IR (-O0):
define i64 @wcslen(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = bitcast i32* %3 to i8*
%5 = call i64 @strlen(i8* %4)
ret i64 %5
}

LLVM IR (-O2):
define i64 @wcslen(i32* nocapture %0) {
%2 = bitcast i32* %0 to i8*
%3 = tail call i64 @strlen(i8* dereferenceable(1) %2)
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ reverseString(char *, int, int);
int strlen(char *);
void rotateString(char *string, int rotateFactor) {
  int length = strlen(string);
  rotateFactor %= length;
  reverseString(string, 0, rotateFactor);
  reverseString(string, rotateFactor, length);
  reverseString(string, 0, length);
}


x86 assembly (clang, -O0):
<rotateString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%eax
cltd
idiv   %ecx
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
xor    %esi,%esi
call   1040 <reverseString@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1040 <reverseString@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%edx
xor    %esi,%esi
call   1040 <reverseString@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotateString>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %eax,%ebp
mov    %r14d,%eax
cltd
idiv   %ebp
mov    %edx,%r14d
mov    %rbx,%rdi
xor    %esi,%esi
mov    %r14d,%edx
call   1040 <reverseString@plt>
mov    %rbx,%rdi
mov    %r14d,%esi
mov    %ebp,%edx
call   1040 <reverseString@plt>
mov    %rbx,%rdi
xor    %esi,%esi
mov    %ebp,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <reverseString@plt>

LLVM IR (-O0):
define void @rotateString(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = call i32 @strlen(i8* %6)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = load i32, i32* %4
%10 = srem i32 %9, %8
store i32 %10, i32* %4
%11 = load i8*, i8** %3
%12 = load i32, i32* %4
%13 = call i32 @reverseString(i8* %11, i32 0, i32 %12)
%14 = load i8*, i8** %3
%15 = load i32, i32* %4
%16 = load i32, i32* %5
%17 = call i32 @reverseString(i8* %14, i32 %15, i32 %16)
%18 = load i8*, i8** %3
%19 = load i32, i32* %5
%20 = call i32 @reverseString(i8* %18, i32 0, i32 %19)
ret void
}

LLVM IR (-O2):
define void @rotateString(i8* %0, i32 %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = srem i32 %1, %3
%5 = tail call i32 @reverseString(i8* %0, i32 0, i32 %4)
%6 = tail call i32 @reverseString(i8* %0, i32 %4, i32 %3)
%7 = tail call i32 @reverseString(i8* %0, i32 0, i32 %3)
ret void
}
int test_imm_FAint8_reg(signed char val) {
  return ((val) & (-0xFA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FAint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff06,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FAint8_reg>:
test   $0xffffff06,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FAint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -250
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_FAint8_reg(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = and i32 %2, -250
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ putchar(char);
void print_pattern1(int ile_gwiazdek) {
  for (int i = 1; i <= ile_gwiazdek; i++) {
    putchar('*');
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<print_pattern1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     1156 <print_pattern1+0x36>
mov    $0x2a,%edi
call   1030 <putchar@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1132 <print_pattern1+0x12>
lea    0xea3(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_pattern1>:
push   %rbx
test   %edi,%edi
jle    112f <print_pattern1+0x1f>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0x2a,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebx
jne    1120 <print_pattern1+0x10>
mov    $0xa,%edi
pop    %rbx
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @print_pattern1(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp sle i32 %5, %6
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = call i32 @putchar(i8 signext 42)
br label %10
10: ; preds = %8
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
%14 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
define void @print_pattern1(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %3, label %5
3: ; preds = %5, %1
%4 = tail call i32 bitcast (i32 (i8)* @putchar to i32 (i32)*)(i32 10)
ret void
5: ; preds = %1, %5
%6 = phi i32 [ %8, %5 ], [ 1, %1 ]
%7 = tail call i32 @putchar(i8 signext 42)
%8 = add nuw i32 %6, 1
%9 = icmp eq i32 %6, %0
br i1 %9, label %3, label %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  char t[4];
  t[0] = 0;
  t[1] = 1;
  t[2] = 0;
  t[3] = 0;
  char *z1 = t;
  void *z2 = z1;
  unsigned int *pi = z2;
  if (*pi == 256) {
    printf("UNSAFE\n");
    goto ERROR;
  }
  printf("SAFE\n");
  return (0);
ERROR:
  return (-1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movb   $0x0,-0x8(%rbp)
movb   $0x1,-0x7(%rbp)
movb   $0x0,-0x6(%rbp)
movb   $0x0,-0x5(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmpl   $0x100,(%rax)
jne    1168 <main+0x58>
lea    0xea2(%rip),%rdi
call   1030 <printf@plt>
jmp    1180 <main+0x70>
lea    0xe93(%rip),%rdi
call   1030 <printf@plt>
movl   $0x0,-0x4(%rbp)
jmp    1187 <main+0x77>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"UNSAFE\0A\00"
@.str.1 = [6 x i8] c"SAFE\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [4 x i8]
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
store i32 0, i32* %1
%6 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
store i8 0, i8* %6
%7 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 1
store i8 1, i8* %7
%8 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 2
store i8 0, i8* %8
%9 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 3
store i8 0, i8* %9
%10 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
store i8* %10, i8** %3
%11 = load i8*, i8** %3
store i8* %11, i8** %4
%12 = load i8*, i8** %4
%13 = bitcast i8* %12 to i32*
store i32* %13, i32** %5
%14 = load i32*, i32** %5
%15 = load i32, i32* %14
%16 = icmp eq i32 %15, 256
br i1 %16, label %17, label %19
17: ; preds = %0
%18 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %21
19: ; preds = %0
%20 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
store i32 0, i32* %1
br label %22
21: ; preds = %17
store i32 -1, i32* %1
br label %22
22: ; preds = %21, %19
%23 = load i32, i32* %1
ret i32 %23
}

LLVM IR (-O2):
@str = [7 x i8] c"UNSAFE\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
ret i32 -1
}
int fun608() { return 608; }


x86 assembly (clang, -O0):
<fun608>:
push   %rbp
mov    %rsp,%rbp
mov    $0x260,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun608>:
mov    $0x260,%eax
ret

LLVM IR (-O0):
define i32 @fun608() {
ret i32 608
}

LLVM IR (-O2):
define i32 @fun608() {
ret i32 608
}
int time_clocks() { return 0; }


x86 assembly (clang, -O0):
<time_clocks>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_clocks>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @time_clocks() {
ret i32 0
}

LLVM IR (-O2):
define i32 @time_clocks() {
ret i32 0
}
/* Variables and functions */
scalar_t__ is_prime(int);
int problem_7(void) {
  int i = 0, n = 0;
  while (n < 10001) {
    i++;
    if (is_prime(i)) {
      n += 1;
    }
  }
  return i;
}


x86 assembly (clang, -O0):
<problem_7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x2711,-0x8(%rbp)
jge    115c <problem_7+0x4c>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <is_prime@plt>
cmp    $0x0,%rax
je     1157 <problem_7+0x47>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <problem_7+0x16>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<problem_7>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %ebx,%ebx
nopw   0x0(%rax,%rax,1)
add    $0x1,%ebx
mov    %ebx,%edi
call   1030 <is_prime@plt>
cmp    $0x1,%rax
sbb    $0xffffffff,%ebp
cmp    $0x2711,%ebp
jb     1120 <problem_7+0x10>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @problem_7() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %15, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 10001
br i1 %5, label %6, label %16
6: ; preds = %3
%7 = load i32, i32* %1
%8 = add nsw i32 %7, 1
store i32 %8, i32* %1
%9 = load i32, i32* %1
%10 = call i64 @is_prime(i32 %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %6
%13 = load i32, i32* %2
%14 = add nsw i32 %13, 1
store i32 %14, i32* %2
br label %15
15: ; preds = %12, %6
br label %3
16: ; preds = %3
%17 = load i32, i32* %1
ret i32 %17
}

LLVM IR (-O2):
define i32 @problem_7() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %8, %1 ]
%3 = phi i32 [ 0, %0 ], [ %4, %1 ]
%4 = add nuw nsw i32 %3, 1
%5 = tail call i64 @is_prime(i32 %4)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
%8 = add nuw nsw i32 %2, %7
%9 = icmp ult i32 %8, 10001
br i1 %9, label %1, label %10
10: ; preds = %1
ret i32 %4
}
void RTTcpSelectOne(void) {}


x86 assembly (clang, -O0):
<RTTcpSelectOne>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTTcpSelectOne>:
ret

LLVM IR (-O0):
define void @RTTcpSelectOne() {
ret void
}

LLVM IR (-O2):
define void @RTTcpSelectOne() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __builtin_arm_wsr64(char *, unsigned long);
void wsr64_2(unsigned long v) { __builtin_arm_wsr64("0:1:2:3:4", v); }


x86 assembly (clang, -O0):
<wsr64_2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <__builtin_arm_wsr64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wsr64_2>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <__builtin_arm_wsr64@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"0:1:2:3:4\00"
define void @wsr64_2(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @__builtin_arm_wsr64(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i64 %3)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"0:1:2:3:4\00"
define void @wsr64_2(i64 %0) {
%2 = tail call i32 @__builtin_arm_wsr64(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i64 %0)
ret void
}
int diag_debugfs_init(void) { return 0; }


x86 assembly (clang, -O0):
<diag_debugfs_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<diag_debugfs_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @diag_debugfs_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @diag_debugfs_init() {
ret i32 0
}
/* Variables and functions */
int *return_int_ptr();
int *use_return_int_ptr() { return return_int_ptr(); }


x86 assembly (clang, -O0):
<use_return_int_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <return_int_ptr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<use_return_int_ptr>:
xor    %eax,%eax
jmp    1030 <return_int_ptr@plt>

LLVM IR (-O0):
define i32* @use_return_int_ptr() {
%1 = call i32* (...) @return_int_ptr()
ret i32* %1
}

LLVM IR (-O2):
define i32* @use_return_int_ptr() {
%1 = tail call i32* (...) @return_int_ptr()
ret i32* %1
}
/* Variables and functions */
double log2(double);
double entropiaMensaje(double probabilidadMensaje) {
  return -log2(probabilidadMensaje);
}


x86 assembly (clang, -O0):
<entropiaMensaje>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <log2@plt>
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<entropiaMensaje>:
push   %rax
call   1030 <log2@plt>
xorps  0xee3(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @entropiaMensaje(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @log2(double %3)
%5 = fneg double %4
ret double %5
}

LLVM IR (-O2):
define double @entropiaMensaje(double %0) {
%2 = tail call double @log2(double %0)
%3 = fneg double %2
ret double %3
}
int AddReg(int a, int b) {
  __asm__ __volatile__("addl %%ebx, %%eax" : "=a"(a) : "b"(b), "a"(a));
  return a;
}


x86 assembly (clang, -O0):
<AddReg>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    -0x10(%rbp),%ebx
mov    -0xc(%rbp),%eax
add    %ebx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<AddReg>:
push   %rbx
mov    %esi,%ebx
mov    %edi,%eax
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @AddReg(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = call i32 asm sideeffect "addl %ebx, %eax", "={ax},{bx},{ax},~{dirflag},~{fpsr},~{flags}"(i32 %5, i32 %6)
store i32 %7, i32* %3
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @AddReg(i32 %0, i32 %1) {
%3 = tail call i32 asm sideeffect "addl %ebx, %eax", "={ax},{bx},{ax},~{dirflag},~{fpsr},~{flags}"(i32 %1, i32 %0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ idt_set_gate(unsigned int, int, int /*<<< orphan*/, void *);
void set_intr_gate(unsigned int n, void(*addr)) {
  idt_set_gate(n, 14, 0, addr);
}


x86 assembly (clang, -O0):
<set_intr_gate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rcx
mov    $0xe,%esi
xor    %edx,%edx
call   1030 <idt_set_gate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_intr_gate>:
mov    %rsi,%rcx
mov    $0xe,%esi
xor    %edx,%edx
jmp    1030 <idt_set_gate@plt>

LLVM IR (-O0):
define void @set_intr_gate(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i32 @idt_set_gate(i32 %5, i32 14, i32 0, i8* %6)
ret void
}

LLVM IR (-O2):
define void @set_intr_gate(i32 %0, i8* %1) {
%3 = tail call i32 @idt_set_gate(i32 %0, i32 14, i32 0, i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ newline();
int /*<<< orphan*/ print(char *);
void println(char *s) {
  print(s);
  newline();
}


x86 assembly (clang, -O0):
<println>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <print@plt>
mov    $0x0,%al
call   1030 <newline@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<println>:
push   %rax
call   1040 <print@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <newline@plt>

LLVM IR (-O0):
define void @println(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @print(i8* %3)
%5 = call i32 (...) @newline()
ret void
}

LLVM IR (-O2):
define void @println(i8* %0) {
%2 = tail call i32 @print(i8* %0)
%3 = tail call i32 (...) @newline()
ret void
}
void kol_screen_wait_rr() { asm("int $0x40" ::"a"(18), "b"(14)); }


x86 assembly (clang, -O0):
<kol_screen_wait_rr>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    $0x12,%eax
mov    $0xe,%ebx
int    $0x40
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<kol_screen_wait_rr>:
push   %rbx
mov    $0x12,%eax
mov    $0xe,%ebx
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define void @kol_screen_wait_rr() {
ret void
}

LLVM IR (-O2):
define void @kol_screen_wait_rr() {
tail call void asm sideeffect "int $$0x40", "{ax},{bx},~{dirflag},~{fpsr},~{flags}"(i32 18, i32 14)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _delay_us(int);
void write_to_port(int data) { _delay_us(10); }


x86 assembly (clang, -O0):
<write_to_port>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0xa,%edi
call   1030 <_delay_us@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_to_port>:
mov    $0xa,%edi
jmp    1030 <_delay_us@plt>

LLVM IR (-O0):
define void @write_to_port(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @_delay_us(i32 10)
ret void
}

LLVM IR (-O2):
define void @write_to_port(i32 %0) {
%2 = tail call i32 @_delay_us(i32 10)
ret void
}
/* Variables and functions */
double Uglue(double, double, double);
double dPhi_dmu_Uglue(double Phi, double T, double mu) {
  return Uglue(Phi, T, mu);
}


x86 assembly (clang, -O0):
<dPhi_dmu_Uglue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
call   1030 <Uglue@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dPhi_dmu_Uglue>:
jmp    1030 <Uglue@plt>

LLVM IR (-O0):
define double @dPhi_dmu_Uglue(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = load double, double* %6
%10 = call double @Uglue(double %7, double %8, double %9)
ret double %10
}

LLVM IR (-O2):
define double @dPhi_dmu_Uglue(double %0, double %1, double %2) {
%4 = tail call double @Uglue(double %0, double %1, double %2)
ret double %4
}
int test_imm_33uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x33 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_33uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x33,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_33uint64_midword_reg>:
test   $0x330000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_33uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 51
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_33uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 3342336
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ testEmulateDivMod();
void runTests() { testEmulateDivMod(); }


x86 assembly (clang, -O0):
<runTests>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <testEmulateDivMod@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<runTests>:
xor    %eax,%eax
jmp    1030 <testEmulateDivMod@plt>

LLVM IR (-O0):
define void @runTests() {
%1 = call i32 (...) @testEmulateDivMod()
ret void
}

LLVM IR (-O2):
define void @runTests() {
%1 = tail call i32 (...) @testEmulateDivMod()
ret void
}
/* Type definitions */
struct opencl_x86_device_t {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void *, unsigned int);
void opencl_x86_device_mem_read(struct opencl_x86_device_t *device,
                                void *host_ptr, void *device_ptr,
                                unsigned int size) {
  memcpy(host_ptr, device_ptr, size);
}


x86 assembly (clang, -O0):
<opencl_x86_device_mem_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<opencl_x86_device_mem_read>:
mov    %rsi,%rdi
mov    %rdx,%rsi
mov    %ecx,%edx
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
%struct.opencl_x86_device_t = type { i32 }
define void @opencl_x86_device_mem_read(%struct.opencl_x86_device_t* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca %struct.opencl_x86_device_t*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store %struct.opencl_x86_device_t* %0, %struct.opencl_x86_device_t** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %6
%10 = load i8*, i8** %7
%11 = load i32, i32* %8
%12 = call i32 @memcpy(i8* %9, i8* %10, i32 %11)
ret void
}

LLVM IR (-O2):
%struct.opencl_x86_device_t = type { i32 }
define void @opencl_x86_device_mem_read(%struct.opencl_x86_device_t* nocapture readnone %0, i8* %1, i8* %2, i32 %3) {
%5 = tail call i32 @memcpy(i8* %1, i8* %2, i32 %3)
ret void
}
/* Variables and functions */
int link(char const *, char const *);
int symlink(char const *, char const *);
int UnixVfs_link(const char *zSrc, const char *zTarget, int is_sym) {
  int rc;
  if (is_sym) {
    rc = symlink(zSrc, zTarget);
  } else {
    rc = link(zSrc, zTarget);
  }
  return rc == 0 ? 0 : -1;
}


x86 assembly (clang, -O0):
<UnixVfs_link>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1152 <UnixVfs_link+0x32>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <symlink@plt>
mov    %eax,-0x18(%rbp)
jmp    1162 <UnixVfs_link+0x42>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <link@plt>
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%edx
mov    $0xffffffff,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmove  %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UnixVfs_link>:
push   %rax
test   %edx,%edx
je     112c <UnixVfs_link+0xc>
call   1030 <symlink@plt>
jmp    1131 <UnixVfs_link+0x11>
call   1040 <link@plt>
neg    %eax
sbb    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @UnixVfs_link(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i8*, i8** %4
%12 = load i8*, i8** %5
%13 = call i32 @symlink(i8* %11, i8* %12)
store i32 %13, i32* %7
br label %18
14: ; preds = %3
%15 = load i8*, i8** %4
%16 = load i8*, i8** %5
%17 = call i32 @link(i8* %15, i8* %16)
store i32 %17, i32* %7
br label %18
18: ; preds = %14, %10
%19 = load i32, i32* %7
%20 = icmp eq i32 %19, 0
%21 = zext i1 %20 to i64
%22 = select i1 %20, i32 0, i32 -1
ret i32 %22
}

LLVM IR (-O2):
define i32 @UnixVfs_link(i8* %0, i8* %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @symlink(i8* %0, i8* %1)
br label %9
7: ; preds = %3
%8 = tail call i32 @link(i8* %0, i8* %1)
br label %9
9: ; preds = %7, %5
%10 = phi i32 [ %6, %5 ], [ %8, %7 ]
%11 = icmp ne i32 %10, 0
%12 = sext i1 %11 to i32
ret i32 %12
}
int tdefault_can_async_p(struct target_ops *self) { return 0; }


x86 assembly (clang, -O0):
<tdefault_can_async_p>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tdefault_can_async_p>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.target_ops = type opaque
define i32 @tdefault_can_async_p(%struct.target_ops* %0) {
%2 = alloca %struct.target_ops*
store %struct.target_ops* %0, %struct.target_ops** %2
ret i32 0
}

LLVM IR (-O2):
%struct.target_ops = type opaque
define i32 @tdefault_can_async_p(%struct.target_ops* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int test1(int, int);
int test2(int a, int b) {
  int res = test1(a, b) + b;
  return res;
}


x86 assembly (clang, -O0):
<test2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <test1@plt>
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test2>:
push   %rbx
mov    %esi,%ebx
call   1030 <test1@plt>
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @test2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @test1(i32 %6, i32 %7)
%9 = load i32, i32* %4
%10 = add nsw i32 %8, %9
store i32 %10, i32* %5
%11 = load i32, i32* %5
ret i32 %11
}

LLVM IR (-O2):
define i32 @test2(i32 %0, i32 %1) {
%3 = tail call i32 @test1(i32 %0, i32 %1)
%4 = add nsw i32 %3, %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ to_point(int /*<<< orphan*/, int);
int /*<<< orphan*/ turn(int /*<<< orphan*/);
int turn_down() {
  turn(to_point(0, -1));
  return 1;
}


x86 assembly (clang, -O0):
<turn_down>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0xffffffff,%esi
call   1040 <to_point@plt>
mov    %eax,%edi
call   1030 <turn@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<turn_down>:
push   %rax
xor    %edi,%edi
mov    $0xffffffff,%esi
call   1040 <to_point@plt>
mov    %eax,%edi
call   1030 <turn@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @turn_down() {
%1 = call i32 @to_point(i32 0, i32 -1)
%2 = call i32 @turn(i32 %1)
ret i32 1
}

LLVM IR (-O2):
define i32 @turn_down() {
%1 = tail call i32 @to_point(i32 0, i32 -1)
%2 = tail call i32 @turn(i32 %1)
ret i32 1
}
void print_dnssl(struct dhcpv6_option *opt,
                 void (*print)(const char *fmt, ...)) {}


x86 assembly (clang, -O0):
<print_dnssl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_dnssl>:
ret

LLVM IR (-O0):
%struct.dhcpv6_option = type opaque
define void @print_dnssl(%struct.dhcpv6_option* %0, void (i8*, ...)* %1) {
%3 = alloca %struct.dhcpv6_option*
%4 = alloca void (i8*, ...)*
store %struct.dhcpv6_option* %0, %struct.dhcpv6_option** %3
store void (i8*, ...)* %1, void (i8*, ...)** %4
ret void
}

LLVM IR (-O2):
%struct.dhcpv6_option = type opaque
define void @print_dnssl(%struct.dhcpv6_option* nocapture %0, void (i8*, ...)* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ svcPanic();
int link(char *old, char *new) { svcPanic(); }


x86 assembly (clang, -O0):
<link>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    $0x0,%al
call   1030 <svcPanic@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<link>:
xor    %eax,%eax
jmp    1030 <svcPanic@plt>

LLVM IR (-O0):
define i32 @link(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = call i32 (...) @svcPanic()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @link(i8* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = tail call i32 (...) @svcPanic()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ uwsgi_build_unshare(char *, int *);
void uwsgi_opt_set_unshare(char *opt, char *value, void *mask) {
  uwsgi_build_unshare(value, (int *)mask);
}


x86 assembly (clang, -O0):
<uwsgi_opt_set_unshare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <uwsgi_build_unshare@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uwsgi_opt_set_unshare>:
mov    %rsi,%rdi
mov    %rdx,%rsi
jmp    1030 <uwsgi_build_unshare@plt>

LLVM IR (-O0):
define void @uwsgi_opt_set_unshare(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %5
%8 = load i8*, i8** %6
%9 = bitcast i8* %8 to i32*
%10 = call i32 @uwsgi_build_unshare(i8* %7, i32* %9)
ret void
}

LLVM IR (-O2):
define void @uwsgi_opt_set_unshare(i8* nocapture readnone %0, i8* %1, i8* %2) {
%4 = bitcast i8* %2 to i32*
%5 = tail call i32 @uwsgi_build_unshare(i8* %1, i32* %4)
ret void
}