xunge/DecIR huggingface dataset:
int decdigit(int x) {
  if ((x < 48 || x > 102) || (x > 57 && x < 97))
    return 0;
  if (x < 97)
    return x - 48;
  else
    return x - 87;
}


x86 assembly (clang, -O0):
<decdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x30,-0x8(%rbp)
jl     112f <decdigit+0x2f>
cmpl   $0x66,-0x8(%rbp)
jg     112f <decdigit+0x2f>
cmpl   $0x39,-0x8(%rbp)
jle    113b <decdigit+0x3b>
cmpl   $0x61,-0x8(%rbp)
jge    113b <decdigit+0x3b>
movl   $0x0,-0x4(%rbp)
jmp    115c <decdigit+0x5c>
cmpl   $0x61,-0x8(%rbp)
jge    1153 <decdigit+0x53>
mov    -0x8(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    115c <decdigit+0x5c>
mov    -0x8(%rbp),%eax
sub    $0x57,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<decdigit>:
lea    -0x67(%rdi),%ecx
xor    %eax,%eax
cmp    $0xffffffc9,%ecx
jb     1121 <decdigit+0x21>
lea    -0x3a(%rdi),%ecx
cmp    $0x27,%ecx
jb     1121 <decdigit+0x21>
cmp    $0x60,%edi
ja     111c <decdigit+0x1c>
add    $0xffffffd0,%edi
jmp    111f <decdigit+0x1f>
add    $0xffffffa9,%edi
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @decdigit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 48
br i1 %5, label %15, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 102
br i1 %8, label %15, label %9
9: ; preds = %6
%10 = load i32, i32* %3
%11 = icmp sgt i32 %10, 57
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = load i32, i32* %3
%14 = icmp slt i32 %13, 97
br i1 %14, label %15, label %16
15: ; preds = %12, %6, %1
store i32 0, i32* %2
br label %25
16: ; preds = %12, %9
%17 = load i32, i32* %3
%18 = icmp slt i32 %17, 97
br i1 %18, label %19, label %22
19: ; preds = %16
%20 = load i32, i32* %3
%21 = sub nsw i32 %20, 48
store i32 %21, i32* %2
br label %25
22: ; preds = %16
%23 = load i32, i32* %3
%24 = sub nsw i32 %23, 87
store i32 %24, i32* %2
br label %25
25: ; preds = %22, %19, %15
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @decdigit(i32 %0) {
%2 = add i32 %0, -103
%3 = icmp ult i32 %2, -55
%4 = add i32 %0, -58
%5 = icmp ult i32 %4, 39
%6 = or i1 %3, %5
br i1 %6, label %13, label %7
7: ; preds = %1
%8 = icmp ult i32 %0, 97
br i1 %8, label %9, label %11
9: ; preds = %7
%10 = add nsw i32 %0, -48
br label %13
11: ; preds = %7
%12 = add nsw i32 %0, -87
br label %13
13: ; preds = %1, %11, %9
%14 = phi i32 [ %10, %9 ], [ %12, %11 ], [ 0, %1 ]
ret i32 %14
}
/* Type definitions */
struct pooled_fd {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assert(struct pooled_fd *);
int /*<<< orphan*/ fdpool_unpool(struct pooled_fd *);
void fdpool_close(struct pooled_fd *pfd) {
  assert(pfd);
  fdpool_unpool(pfd);
}


x86 assembly (clang, -O0):
<fdpool_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rdi
call   1040 <fdpool_unpool@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdpool_close>:
push   %rbx
mov    %rdi,%rbx
call   1030 <assert@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <fdpool_unpool@plt>

LLVM IR (-O0):
%struct.pooled_fd = type { i32 }
define void @fdpool_close(%struct.pooled_fd* %0) {
%2 = alloca %struct.pooled_fd*
store %struct.pooled_fd* %0, %struct.pooled_fd** %2
%3 = load %struct.pooled_fd*, %struct.pooled_fd** %2
%4 = call i32 @assert(%struct.pooled_fd* %3)
%5 = load %struct.pooled_fd*, %struct.pooled_fd** %2
%6 = call i32 @fdpool_unpool(%struct.pooled_fd* %5)
ret void
}

LLVM IR (-O2):
%struct.pooled_fd = type { i32 }
define void @fdpool_close(%struct.pooled_fd* %0) {
%2 = tail call i32 @assert(%struct.pooled_fd* %0)
%3 = tail call i32 @fdpool_unpool(%struct.pooled_fd* %0)
ret void
}
/* Type definitions */
struct solver {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ printActive(struct solver *);
int /*<<< orphan*/ printCore(struct solver *);
int /*<<< orphan*/ printNoCore(struct solver *);
int /*<<< orphan*/ printProof(struct solver *);
int /*<<< orphan*/ printTrace(struct solver *);
void postprocess(struct solver *S) {
  printNoCore(S);
  printActive(S);
  printCore(S);
  printTrace(S);
  printProof(S);
}


x86 assembly (clang, -O0):
<postprocess>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <printNoCore@plt>
mov    -0x8(%rbp),%rdi
call   1040 <printActive@plt>
mov    -0x8(%rbp),%rdi
call   1050 <printCore@plt>
mov    -0x8(%rbp),%rdi
call   1070 <printTrace@plt>
mov    -0x8(%rbp),%rdi
call   1060 <printProof@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<postprocess>:
push   %rbx
mov    %rdi,%rbx
call   1030 <printNoCore@plt>
mov    %rbx,%rdi
call   1040 <printActive@plt>
mov    %rbx,%rdi
call   1050 <printCore@plt>
mov    %rbx,%rdi
call   1070 <printTrace@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1060 <printProof@plt>

LLVM IR (-O0):
%struct.solver = type { i32 }
define void @postprocess(%struct.solver* %0) {
%2 = alloca %struct.solver*
store %struct.solver* %0, %struct.solver** %2
%3 = load %struct.solver*, %struct.solver** %2
%4 = call i32 @printNoCore(%struct.solver* %3)
%5 = load %struct.solver*, %struct.solver** %2
%6 = call i32 @printActive(%struct.solver* %5)
%7 = load %struct.solver*, %struct.solver** %2
%8 = call i32 @printCore(%struct.solver* %7)
%9 = load %struct.solver*, %struct.solver** %2
%10 = call i32 @printTrace(%struct.solver* %9)
%11 = load %struct.solver*, %struct.solver** %2
%12 = call i32 @printProof(%struct.solver* %11)
ret void
}

LLVM IR (-O2):
%struct.solver = type { i32 }
define void @postprocess(%struct.solver* %0) {
%2 = tail call i32 @printNoCore(%struct.solver* %0)
%3 = tail call i32 @printActive(%struct.solver* %0)
%4 = tail call i32 @printCore(%struct.solver* %0)
%5 = tail call i32 @printTrace(%struct.solver* %0)
%6 = tail call i32 @printProof(%struct.solver* %0)
ret void
}
char *OSCPaddedStrcpy(char *target, const char *source) {
  while ((*target++ = *source++)) {
  }
  while (((int)target) % 4 != 0) {
    *target = '\0';
    target++;
  }
  return target;
}


x86 assembly (clang, -O0):
<OSCPaddedStrcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %al,(%rcx)
cmp    $0x0,%al
je     113b <OSCPaddedStrcpy+0x3b>
jmp    110c <OSCPaddedStrcpy+0xc>
jmp    1140 <OSCPaddedStrcpy+0x40>
mov    -0x8(%rbp),%rax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     116d <OSCPaddedStrcpy+0x6d>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1140 <OSCPaddedStrcpy+0x40>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OSCPaddedStrcpy>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    %rdi,%r14
nopw   0x0(%rax,%rax,1)
movzbl (%rsi),%eax
add    $0x1,%rsi
mov    %al,(%r14)
add    $0x1,%r14
add    $0x1,%rbx
test   %al,%al
jne    1120 <OSCPaddedStrcpy+0x10>
test   $0x3,%bl
je     1162 <OSCPaddedStrcpy+0x52>
mov    %ebx,%eax
and    $0x3,%eax
mov    $0x4,%edx
sub    %rax,%rdx
mov    %r14,%rdi
xor    %esi,%esi
call   1030 <memset@plt>
movzbl %bl,%eax
and    $0x3,%eax
neg    %rax
add    %rax,%r14
add    $0x4,%r14
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @OSCPaddedStrcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %12, %2
%6 = load i8*, i8** %4
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %4
%8 = load i8, i8* %6
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %3
store i8 %8, i8* %9
%11 = icmp ne i8 %8, 0
br i1 %11, label %12, label %13
12: ; preds = %5
br label %5
13: ; preds = %5
br label %14
14: ; preds = %19, %13
%15 = load i8*, i8** %3
%16 = ptrtoint i8* %15 to i32
%17 = srem i32 %16, 4
%18 = icmp ne i32 %17, 0
br i1 %18, label %19, label %23
19: ; preds = %14
%20 = load i8*, i8** %3
store i8 0, i8* %20
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %3
br label %14
23: ; preds = %14
%24 = load i8*, i8** %3
ret i8* %24
}

LLVM IR (-O2):
define i8* @OSCPaddedStrcpy(i8* %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %8, %3 ]
%5 = phi i8* [ %1, %2 ], [ %6, %3 ]
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %5
%8 = getelementptr inbounds i8, i8* %4, i64 1
store i8 %7, i8* %4
%9 = icmp eq i8 %7, 0
br i1 %9, label %10, label %3
10: ; preds = %3
%11 = ptrtoint i8* %8 to i64
%12 = and i64 %11, 3
%13 = icmp eq i64 %12, 0
br i1 %13, label %18, label %14
14: ; preds = %10
%15 = and i64 %11, 3
%16 = sub nuw nsw i64 4, %15
%17 = getelementptr i8, i8* %8, i64 %16
br label %18
18: ; preds = %14, %10
%19 = phi i8* [ %8, %10 ], [ %17, %14 ]
ret i8* %19
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ stdout;
void handle(int signal) {
  printf("Signal number %d has been received.\n", signal);
  fflush(stdout);
}


x86 assembly (clang, -O0):
<handle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e9f(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle>:
push   %rax
mov    %edi,%esi
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"Signal number %d has been received.\0A\00"
@stdout = global i32 0
define void @handle(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* @stdout
%6 = call i32 @fflush(i32 %5)
ret void
}

LLVM IR (-O2):
@.str = [37 x i8] c"Signal number %d has been received.\0A\00"
@stdout = global i32 0
define void @handle(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = load i32, i32* @stdout
%4 = tail call i32 @fflush(i32 %3)
ret void
}
/* Variables and functions */
int BASS_ErrorGetCode();
int /*<<< orphan*/ BASS_Free();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, int, char const *);
void Error(const char *text) {
  printf("Error(%d): %s\n", BASS_ErrorGetCode(), text);
  BASS_Free();
  exit(0);
}


x86 assembly (clang, -O0):
<Error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <BASS_ErrorGetCode@plt>
mov    %eax,%esi
mov    -0x8(%rbp),%rdx
lea    0xea0(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <BASS_Free@plt>
xor    %edi,%edi
call   1060 <exit@plt>

x86 assembly (clang, -O2):
<Error>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <BASS_ErrorGetCode@plt>
lea    0xeae(%rip),%rdi
mov    %eax,%esi
mov    %rbx,%rdx
call   1040 <printf@plt>
xor    %eax,%eax
call   1050 <BASS_Free@plt>
xor    %edi,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"Error(%d): %s\0A\00"
define void @Error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @BASS_ErrorGetCode()
%4 = load i8*, i8** %2
%5 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %3, i8* %4)
%6 = call i32 (...) @BASS_Free()
%7 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [15 x i8] c"Error(%d): %s\0A\00"
define void @Error(i8* %0) {
%2 = tail call i32 (...) @BASS_ErrorGetCode()
%3 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %2, i8* %0)
%4 = tail call i32 (...) @BASS_Free()
%5 = tail call i32 @exit(i32 0)
unreachable
}
void movei_(x, y, z) int *x, *y, *z;
{ move((float)*x, (float)*y, (float)*z); }


x86 assembly (clang, -O0):
<movei_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cvtsi2ssl (%rax),%xmm0
cvtss2sd %xmm0,%xmm0
mov    -0x10(%rbp),%rax
cvtsi2ssl (%rax),%xmm1
cvtss2sd %xmm1,%xmm1
mov    -0x18(%rbp),%rax
cvtsi2ssl (%rax),%xmm2
cvtss2sd %xmm2,%xmm2
mov    $0x3,%al
call   1030 <move@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<movei_>:
cvtsi2ssl (%rdi),%xmm0
cvtsi2ssl (%rsi),%xmm1
cvtsi2ssl (%rdx),%xmm2
cvtss2sd %xmm0,%xmm0
cvtss2sd %xmm1,%xmm1
cvtss2sd %xmm2,%xmm2
mov    $0x3,%al
jmp    1030 <move@plt>

LLVM IR (-O0):
define void @movei_(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = sitofp i32 %8 to float
%10 = fpext float %9 to double
%11 = load i32*, i32** %5
%12 = load i32, i32* %11
%13 = sitofp i32 %12 to float
%14 = fpext float %13 to double
%15 = load i32*, i32** %6
%16 = load i32, i32* %15
%17 = sitofp i32 %16 to float
%18 = fpext float %17 to double
%19 = call i32 (double, double, double, ...) bitcast (i32 (...)* @move to i32 (double, double, double, ...)*)(double %10, double %14, double %18)
ret void
}

LLVM IR (-O2):
define void @movei_(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2) {
%4 = load i32, i32* %0
%5 = sitofp i32 %4 to float
%6 = fpext float %5 to double
%7 = load i32, i32* %1
%8 = sitofp i32 %7 to float
%9 = fpext float %8 to double
%10 = load i32, i32* %2
%11 = sitofp i32 %10 to float
%12 = fpext float %11 to double
%13 = tail call i32 (double, double, double, ...) bitcast (i32 (...)* @move to i32 (double, double, double, ...)*)(double %6, double %9, double %12)
ret void
}
void cw1200_debug_txed_multi(struct cw1200_common *priv, int count) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
%struct.cw1200_common = type opaque
define void @cw1200_debug_txed_multi(%struct.cw1200_common* %0, i32 %1) {
%3 = alloca %struct.cw1200_common*
%4 = alloca i32
store %struct.cw1200_common* %0, %struct.cw1200_common** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.cw1200_common = type opaque
define void @cw1200_debug_txed_multi(%struct.cw1200_common* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ em_connect_text(char *);
void cf_connect(char *addr) { em_connect_text(addr); }


x86 assembly (clang, -O0):
<cf_connect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <em_connect_text@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cf_connect>:
jmp    1030 <em_connect_text@plt>

LLVM IR (-O0):
define void @cf_connect(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @em_connect_text(i8* %3)
ret void
}

LLVM IR (-O2):
define void @cf_connect(i8* %0) {
%2 = tail call i32 @em_connect_text(i8* %0)
ret void
}
setincdirs() {}


x86 assembly (clang, -O0):
<setincdirs>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setincdirs>:
ret

LLVM IR (-O0):
define i32 @setincdirs() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @setincdirs() {
ret i32 undef
}
zap(str) char str[];
{
  register char *cp;
  cp = index(str, '\n');
  if (cp != 0)
    *cp = 0;
}


x86 assembly (clang, -O0):
<zap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0xa,%esi
call   1030 <index@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1140 <zap+0x30>
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zap>:
push   %rax
mov    $0xa,%esi
call   1030 <index@plt>
test   %rax,%rax
je     1123 <zap+0x13>
movb   $0x0,(%rax)
pop    %rcx
ret

LLVM IR (-O0):
define i32 @zap(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i8* @index(i8* %5, i32 10)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i8*, i8** %4
store i8 0, i8* %10
br label %11
11: ; preds = %9, %1
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @zap(i8* %0) {
%2 = tail call i8* @index(i8* %0, i32 10)
%3 = icmp eq i8* %2, null
br i1 %3, label %5, label %4
4: ; preds = %1
store i8 0, i8* %2
br label %5
5: ; preds = %4, %1
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
int execv(const char *path, char *const argv[]) {
  fprintf(stderr, "\nAccess to dangerous function %s() denied.\n", "execv");
  assert(0);
  ;
}


x86 assembly (clang, -O0):
<execv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
lea    0xec0(%rip),%rsi
lea    0xee5(%rip),%rdx
call   1040 <fprintf@plt>
xor    %edi,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<execv>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
lea    0xef4(%rip),%rdx
call   1040 <fprintf@plt>
xor    %edi,%edi
pop    %rax
jmp    1030 <assert@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [44 x i8] c"\0AAccess to dangerous function %s() denied.\0A\00"
@.str.1 = [6 x i8] c"execv\00"
define i32 @execv(i8* %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8**
store i8* %0, i8** %4
store i8** %1, i8*** %5
%6 = load i32, i32* @stderr
%7 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%8 = call i32 @assert(i32 0)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [44 x i8] c"\0AAccess to dangerous function %s() denied.\0A\00"
@.str.1 = [6 x i8] c"execv\00"
define i32 @execv(i8* nocapture readnone %0, i8** nocapture readnone %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 @assert(i32 0)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isalnum(int);
void t_isalnum_0x36() {
  Assert_real((isalnum(54)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              275, ("isalnum should be 1 for 6"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x36>:
push   %rbp
mov    %rsp,%rbp
mov    $0x36,%edi
call   1030 <isalnum@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x113,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x36>:
push   %rax
mov    $0x36,%edi
call   1030 <isalnum@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x113,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 1 for 6\00"
define void @t_isalnum_0x36() {
%1 = call i32 @isalnum(i32 54)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 275, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 1 for 6\00"
define void @t_isalnum_0x36() {
%1 = tail call i32 @isalnum(i32 54)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 275, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ce_coroutine_yield();
void ce_yield() { ce_coroutine_yield(); }


x86 assembly (clang, -O0):
<ce_yield>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ce_coroutine_yield@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ce_yield>:
xor    %eax,%eax
jmp    1030 <ce_coroutine_yield@plt>

LLVM IR (-O0):
define void @ce_yield() {
%1 = call i32 (...) @ce_coroutine_yield()
ret void
}

LLVM IR (-O2):
define void @ce_yield() {
%1 = tail call i32 (...) @ce_coroutine_yield()
ret void
}
void (*device_pm_set_timout_handler(void (*new_fun)(unsigned long)))(
    unsigned long) {}


x86 assembly (clang, -O0):
<device_pm_set_timout_handler>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<device_pm_set_timout_handler>:
ret

LLVM IR (-O0):
define void (i64)* @device_pm_set_timout_handler(void (i64)* %0) {
%2 = alloca void (i64)*
%3 = alloca void (i64)*
store void (i64)* %0, void (i64)** %3
%4 = load void (i64)*, void (i64)** %2
ret void (i64)* %4
}

LLVM IR (-O2):
define noalias void (i64)* @device_pm_set_timout_handler(void (i64)* nocapture readnone %0) {
ret void (i64)* undef
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
void worker_usage(char **argv) {
  printf("usage: %s <application> worker {add,remove}\n", argv[0]);
  exit(1);
}


x86 assembly (clang, -O0):
<worker_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rsi
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<worker_usage>:
push   %rax
mov    (%rdi),%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [45 x i8] c"usage: %s <application> worker {add,remove}\0A\00"
define void @worker_usage(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = getelementptr inbounds i8*, i8** %3, i64 0
%5 = load i8*, i8** %4
%6 = call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [45 x i8] c"usage: %s <application> worker {add,remove}\0A\00"
define void @worker_usage(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = tail call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void ComparatorIntDisable(uint32_t ui32Base, uint32_t ui32Comp) {
  ;
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000008))) &= ~(1 << ui32Comp);
}


x86 assembly (clang, -O0):
<ComparatorIntDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
xor    $0xffffffff,%edx
mov    -0x4(%rbp),%eax
add    $0x8,%eax
cltq
mov    (%rax),%ecx
and    %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ComparatorIntDisable>:
mov    %esi,%ecx
mov    $0xfffffffe,%eax
rol    %cl,%eax
movslq %edi,%rcx
and    %eax,0x8(%rcx)
ret

LLVM IR (-O0):
define void @ComparatorIntDisable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 1, %5
%7 = xor i32 %6, -1
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 8
%10 = sext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
%12 = load volatile i32, i32* %11
%13 = and i32 %12, %7
store volatile i32 %13, i32* %11
ret void
}

LLVM IR (-O2):
define void @ComparatorIntDisable(i32 %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = xor i32 %3, -1
%5 = add nsw i32 %0, 8
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
%8 = load volatile i32, i32* %7
%9 = and i32 %8, %4
store volatile i32 %9, i32* %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ err(int /*<<< orphan*/, char const *);
int /*<<< orphan*/ errno;
void quit(const char *text) { err(errno, text); }


x86 assembly (clang, -O0):
<quit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <err@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quit>:
mov    %rdi,%rsi
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
jmp    1030 <err@plt>

LLVM IR (-O0):
@errno = global i32 0
define void @quit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @errno
%4 = load i8*, i8** %2
%5 = call i32 @err(i32 %3, i8* %4)
ret void
}

LLVM IR (-O2):
@errno = global i32 0
define void @quit(i8* %0) {
%2 = load i32, i32* @errno
%3 = tail call i32 @err(i32 %2, i8* %0)
ret void
}
/* Variables and functions */
char *read_record(int, char *, int *, int);
char *QMReadu(int fno, char *id, int wait, int *err) {
  return read_record(fno, id, err, (wait) ? 10 : 9);
}


x86 assembly (clang, -O0):
<QMReadu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x14(%rbp),%r8d
mov    $0x9,%ecx
mov    $0xa,%eax
cmp    $0x0,%r8d
cmovne %eax,%ecx
call   1030 <read_record@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<QMReadu>:
cmp    $0x1,%edx
mov    $0xa,%eax
sbb    $0x0,%eax
mov    %rcx,%rdx
mov    %eax,%ecx
jmp    1030 <read_record@plt>

LLVM IR (-O0):
define i8* @QMReadu(i32 %0, i8* %1, i32 %2, i32* %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32*
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32* %3, i32** %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i32*, i32** %8
%12 = load i32, i32* %7
%13 = icmp ne i32 %12, 0
%14 = zext i1 %13 to i64
%15 = select i1 %13, i32 10, i32 9
%16 = call i8* @read_record(i32 %9, i8* %10, i32* %11, i32 %15)
ret i8* %16
}

LLVM IR (-O2):
define i8* @QMReadu(i32 %0, i8* %1, i32 %2, i32* %3) {
%5 = icmp eq i32 %2, 0
%6 = select i1 %5, i32 9, i32 10
%7 = tail call i8* @read_record(i32 %0, i8* %1, i32* %3, i32 %6)
ret i8* %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
__attribute__((always_)) void tu_move_left(int delta_x) {
  printf("\x1b[%dD", delta_x);
}


x86 assembly (clang, -O0):
<tu_move_left>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tu_move_left>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"\1B[%dD\00"
define void @tu_move_left(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"\1B[%dD\00"
define void @tu_move_left(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Platform_Halt(int);
int OPM_Min(int a, int b) {
  int _o_result;
  if (a < b) {
    _o_result = a;
    return _o_result;
  } else {
    _o_result = b;
    return _o_result;
  }
__retchk:
  Platform_Halt(-3);
  return 0;
  ;
}


x86 assembly (clang, -O0):
<OPM_Min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1127 <OPM_Min+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1133 <OPM_Min+0x33>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OPM_Min>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @OPM_Min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %13
10: ; preds = %2
%11 = load i32, i32* %4
store i32 %11, i32* %6
%12 = load i32, i32* %6
store i32 %12, i32* %3
br label %18
13: ; preds = %2
%14 = load i32, i32* %5
store i32 %14, i32* %6
%15 = load i32, i32* %6
store i32 %15, i32* %3
br label %18
16: ; No predecessors!
%17 = call i32 @Platform_Halt(i32 -3)
store i32 0, i32* %3
br label %18
18: ; preds = %16, %13, %10
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @OPM_Min(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
unsigned swoz(unsigned x) {
  return ((x & 0x100) >> 4) | ((x & 0xf0) << 1) | x & 0xf;
}


x86 assembly (clang, -O0):
<swoz>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x100,%eax
shr    $0x4,%eax
mov    -0x4(%rbp),%ecx
and    $0xf0,%ecx
shl    $0x1,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xf,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swoz>:
mov    %edi,%ecx
shr    $0x4,%ecx
and    $0x10,%ecx
mov    %edi,%eax
and    $0xf0,%eax
and    $0xf,%edi
lea    (%rdi,%rax,2),%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @swoz(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 256
%5 = lshr i32 %4, 4
%6 = load i32, i32* %2
%7 = and i32 %6, 240
%8 = shl i32 %7, 1
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = and i32 %10, 15
%12 = or i32 %9, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @swoz(i32 %0) {
%2 = lshr i32 %0, 4
%3 = and i32 %2, 16
%4 = shl i32 %0, 1
%5 = and i32 %4, 480
%6 = and i32 %0, 15
%7 = or i32 %5, %6
%8 = or i32 %7, %3
ret i32 %8
}
char dfn_rc() { return 1; }


x86 assembly (clang, -O0):
<dfn_rc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dfn_rc>:
mov    $0x1,%al
ret

LLVM IR (-O0):
define signext i8 @dfn_rc() {
ret i8 1
}

LLVM IR (-O2):
define signext i8 @dfn_rc() {
ret i8 1
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int x = __VERIFIER_nondet_int();
  int a = __VERIFIER_nondet_int();
  int b = __VERIFIER_nondet_int();
  if (a != b) {
    return 0;
  }
  while (x >= 0) {
    x = x + a - b - 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
je     1155 <main+0x45>
movl   $0x0,-0x4(%rbp)
jmp    117f <main+0x6f>
jmp    115a <main+0x4a>
cmpl   $0x0,-0x8(%rbp)
jl     1178 <main+0x68>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
sub    -0x10(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    115a <main+0x4a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %5, i32* %2
%6 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %6, i32* %3
%7 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %7, i32* %4
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = icmp ne i32 %8, %9
br i1 %10, label %11, label %12
11: ; preds = %0
store i32 0, i32* %1
br label %24
12: ; preds = %0
br label %13
13: ; preds = %16, %12
%14 = load i32, i32* %2
%15 = icmp sge i32 %14, 0
br i1 %15, label %16, label %23
16: ; preds = %13
%17 = load i32, i32* %2
%18 = load i32, i32* %3
%19 = add nsw i32 %17, %18
%20 = load i32, i32* %4
%21 = sub nsw i32 %19, %20
%22 = sub nsw i32 %21, 1
store i32 %22, i32* %2
br label %13
23: ; preds = %13
store i32 0, i32* %1
br label %24
24: ; preds = %23, %11
%25 = load i32, i32* %1
ret i32 %25
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 (...) @__VERIFIER_nondet_int()
%3 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}
void ipcsyslog_init(void) {}


x86 assembly (clang, -O0):
<ipcsyslog_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipcsyslog_init>:
ret

LLVM IR (-O0):
define void @ipcsyslog_init() {
ret void
}

LLVM IR (-O2):
define void @ipcsyslog_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ roadmap_screen_freeze();
int /*<<< orphan*/ roadmap_screen_unfreeze();
void roadmap_start_screen_refresh(int refresh) {
  if (refresh) {
    roadmap_screen_unfreeze();
  } else {
    roadmap_screen_freeze();
  }
}


x86 assembly (clang, -O0):
<roadmap_start_screen_refresh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1141 <roadmap_start_screen_refresh+0x21>
mov    $0x0,%al
call   1040 <roadmap_screen_unfreeze@plt>
jmp    1148 <roadmap_start_screen_refresh+0x28>
mov    $0x0,%al
call   1030 <roadmap_screen_freeze@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<roadmap_start_screen_refresh>:
xor    %eax,%eax
test   %edi,%edi
je     112b <roadmap_start_screen_refresh+0xb>
jmp    1040 <roadmap_screen_unfreeze@plt>
jmp    1030 <roadmap_screen_freeze@plt>

LLVM IR (-O0):
define void @roadmap_start_screen_refresh(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @roadmap_screen_unfreeze()
br label %9
7: ; preds = %1
%8 = call i32 (...) @roadmap_screen_freeze()
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @roadmap_start_screen_refresh(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 (...) @roadmap_screen_unfreeze()
br label %7
5: ; preds = %1
%6 = tail call i32 (...) @roadmap_screen_freeze()
br label %7
7: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, float, char, double);
int main(int argc, char **argv) {
  int a = 1;
  float b = 2.5f;
  char c = 'a';
  double pi_value = 3.14159265359;
  int pi_int = (int)pi_value;
  int magic = (int)c;
  printf("a: %d b: %f c: %c pi_value: %0.11lf\n", a, b, c, pi_value);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
movss  0xeda(%rip),%xmm0
movss  %xmm0,-0x18(%rbp)
movb   $0x61,-0x19(%rbp)
movsd  0xec1(%rip),%xmm0
movsd  %xmm0,-0x28(%rbp)
cvttsd2si -0x28(%rbp),%eax
mov    %eax,-0x2c(%rbp)
movsbl -0x19(%rbp),%eax
mov    %eax,-0x30(%rbp)
mov    -0x14(%rbp),%esi
movss  -0x18(%rbp),%xmm0
mov    -0x19(%rbp),%al
movsd  -0x28(%rbp),%xmm1
lea    0xea2(%rip),%rdi
movsbl %al,%edx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xef8(%rip),%rdi
movss  0xee0(%rip),%xmm0
movsd  0xee0(%rip),%xmm1
mov    $0x1,%esi
mov    $0x61,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [37 x i8] c"a: %d b: %f c: %c pi_value: %0.11lf\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
%6 = alloca float
%7 = alloca i8
%8 = alloca double
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
store i32 1, i32* %5
store float 2.500000e+00, float* %6
store i8 97, i8* %7
store double 0x400921FB54442EEA, double* %8
%11 = load double, double* %8
%12 = fptosi double %11 to i32
store i32 %12, i32* %9
%13 = load i8, i8* %7
%14 = sext i8 %13 to i32
store i32 %14, i32* %10
%15 = load i32, i32* %5
%16 = load float, float* %6
%17 = load i8, i8* %7
%18 = load double, double* %8
%19 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 %15, float %16, i8 signext %17, double %18)
ret i32 0
}

LLVM IR (-O2):
@.str = [37 x i8] c"a: %d b: %f c: %c pi_value: %0.11lf\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 1, float 2.500000e+00, i8 signext 97, double 0x400921FB54442EEA)
ret i32 0
}
void CdAudioUnload(int DriverObject) {
  { return; }
}


x86 assembly (clang, -O0):
<CdAudioUnload>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<CdAudioUnload>:
ret

LLVM IR (-O0):
define void @CdAudioUnload(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @CdAudioUnload(i32 %0) {
ret void
}
long double remainderl(long double x, long double y) {
  unsigned short fpsr;
  do
    __asm__("fprem1; fnstsw %%ax" : "+t"(x), "=a"(fpsr) : "u"(y));
  while (fpsr & 0x400);
  return x;
}


x86 assembly (clang, -O0):
<remainderl>:
push   %rbp
mov    %rsp,%rbp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
fxch   %st(1)
fprem1
fnstsw %ax
fstp   %st(1)
fstpt  -0x10(%rbp)
mov    %ax,-0x22(%rbp)
movzwl -0x22(%rbp),%eax
and    $0x400,%eax
cmp    $0x0,%eax
jne    1110 <remainderl+0x10>
fldt   -0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<remainderl>:
fldt   0x18(%rsp)
fldt   0x8(%rsp)
nopl   0x0(%rax,%rax,1)
fprem1
fnstsw %ax
test   $0x400,%eax
jne    1110 <remainderl+0x10>
fstp   %st(1)
ret

LLVM IR (-O0):
define x86_fp80 @remainderl(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
%5 = alloca i16
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
br label %6
6: ; preds = %12, %2
%7 = load x86_fp80, x86_fp80* %3
%8 = load x86_fp80, x86_fp80* %4
%9 = call { x86_fp80, i16 } asm "fprem1; fnstsw %ax", "={st},={ax},{st(1)},0,~{dirflag},~{fpsr},~{flags}"(x86_fp80 %8, x86_fp80 %7)
%10 = extractvalue { x86_fp80, i16 } %9, 0
%11 = extractvalue { x86_fp80, i16 } %9, 1
store x86_fp80 %10, x86_fp80* %3
store i16 %11, i16* %5
br label %12
12: ; preds = %6
%13 = load i16, i16* %5
%14 = zext i16 %13 to i32
%15 = and i32 %14, 1024
%16 = icmp ne i32 %15, 0
br i1 %16, label %6, label %17
17: ; preds = %12
%18 = load x86_fp80, x86_fp80* %3
ret x86_fp80 %18
}

LLVM IR (-O2):
define x86_fp80 @remainderl(x86_fp80 %0, x86_fp80 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi x86_fp80 [ %0, %2 ], [ %6, %3 ]
%5 = tail call { x86_fp80, i16 } asm "fprem1; fnstsw %ax", "={st},={ax},{st(1)},0,~{dirflag},~{fpsr},~{flags}"(x86_fp80 %1, x86_fp80 %4)
%6 = extractvalue { x86_fp80, i16 } %5, 0
%7 = extractvalue { x86_fp80, i16 } %5, 1
%8 = and i16 %7, 1024
%9 = icmp eq i16 %8, 0
br i1 %9, label %10, label %3
10: ; preds = %3
%11 = extractvalue { x86_fp80, i16 } %5, 0
ret x86_fp80 %11
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct databuf {
  int dummy;
};

/* Variables and functions */
int check_promote_databuf(struct databuf *ts, uint32_t typeword) { return -1; }


x86 assembly (clang, -O0):
<check_promote_databuf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_promote_databuf>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.databuf = type { i32 }
define i32 @check_promote_databuf(%struct.databuf* %0, i32 %1) {
%3 = alloca %struct.databuf*
%4 = alloca i32
store %struct.databuf* %0, %struct.databuf** %3
store i32 %1, i32* %4
ret i32 -1
}

LLVM IR (-O2):
%struct.databuf = type { i32 }
define i32 @check_promote_databuf(%struct.databuf* nocapture readnone %0, i32 %1) {
ret i32 -1
}
int f_gt_mm2(float *a1, float *a2) { return !(((*a1) > (*a2))); }


x86 assembly (clang, -O0):
<f_gt_mm2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
ucomiss (%rax),%xmm0
seta   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_gt_mm2>:
movss  (%rdi),%xmm0
xor    %eax,%eax
ucomiss (%rsi),%xmm0
setbe  %al
ret

LLVM IR (-O0):
define i32 @f_gt_mm2(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = load float, float* %5
%7 = load float*, float** %4
%8 = load float, float* %7
%9 = fcmp ogt float %6, %8
%10 = xor i1 %9, true
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @f_gt_mm2(float* nocapture %0, float* nocapture %1) {
%3 = load float, float* %0
%4 = load float, float* %1
%5 = fcmp ule float %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ myDtChkpntMsgSend(char *, char *);
void _DtPerfChkpntMsgSend(char *message) {
  myDtChkpntMsgSend(message, "Chkpnt");
}


x86 assembly (clang, -O0):
<_DtPerfChkpntMsgSend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <myDtChkpntMsgSend@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_DtPerfChkpntMsgSend>:
lea    0xee9(%rip),%rsi
jmp    1030 <myDtChkpntMsgSend@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"Chkpnt\00"
define void @_DtPerfChkpntMsgSend(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @myDtChkpntMsgSend(i8* %3, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"Chkpnt\00"
define void @_DtPerfChkpntMsgSend(i8* %0) {
%2 = tail call i32 @myDtChkpntMsgSend(i8* %0, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct timespec {
  scalar_t__ tv_sec;
  scalar_t__ tv_nsec;
};

/* Variables and functions */
double time2double(struct timespec t) {
  double d_tiempo;
  d_tiempo = (double)t.tv_nsec / 1000000000.0;
  d_tiempo += (double)t.tv_sec;
  return d_tiempo;
}


x86 assembly (clang, -O0):
<time2double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x8(%rbp)
cvtsi2sdq -0x8(%rbp),%xmm0
movsd  0xee6(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
cvtsi2sdq -0x10(%rbp),%xmm0
addsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<time2double>:
cvtsi2sd %rsi,%xmm1
divsd  0xef3(%rip),%xmm1
cvtsi2sd %rdi,%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
define double @time2double(i64 %0, i64 %1) {
%3 = alloca %struct.timespec
%4 = alloca double
%5 = bitcast %struct.timespec* %3 to { i64, i64 }*
%6 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %5, i32 0, i32 0
store i64 %0, i64* %6
%7 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %5, i32 0, i32 1
store i64 %1, i64* %7
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
%9 = load i64, i64* %8
%10 = sitofp i64 %9 to double
%11 = fdiv double %10, 1.000000e+09
store double %11, double* %4
%12 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
%13 = load i64, i64* %12
%14 = sitofp i64 %13 to double
%15 = load double, double* %4
%16 = fadd double %15, %14
store double %16, double* %4
%17 = load double, double* %4
ret double %17
}

LLVM IR (-O2):
define double @time2double(i64 %0, i64 %1) {
%3 = sitofp i64 %1 to double
%4 = fdiv double %3, 1.000000e+09
%5 = sitofp i64 %0 to double
%6 = fadd double %4, %5
ret double %6
}
void init_pf_foldLP(int length) {}


x86 assembly (clang, -O0):
<init_pf_foldLP>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_pf_foldLP>:
ret

LLVM IR (-O0):
define void @init_pf_foldLP(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @init_pf_foldLP(i32 %0) {
ret void
}
/* Type definitions */
struct SN_env {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ SN_close_env(struct SN_env *);
extern void norwegian_UTF_8_close_env(struct SN_env *z) { SN_close_env(z); }


x86 assembly (clang, -O0):
<norwegian_UTF_8_close_env>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <SN_close_env@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<norwegian_UTF_8_close_env>:
jmp    1030 <SN_close_env@plt>

LLVM IR (-O0):
%struct.SN_env = type { i32 }
define void @norwegian_UTF_8_close_env(%struct.SN_env* %0) {
%2 = alloca %struct.SN_env*
store %struct.SN_env* %0, %struct.SN_env** %2
%3 = load %struct.SN_env*, %struct.SN_env** %2
%4 = call i32 @SN_close_env(%struct.SN_env* %3)
ret void
}

LLVM IR (-O2):
%struct.SN_env = type { i32 }
define void @norwegian_UTF_8_close_env(%struct.SN_env* %0) {
%2 = tail call i32 @SN_close_env(%struct.SN_env* %0)
ret void
}
int f2(volatile int *a) {
  int b = a[1];
  int c = a[2];
  return b + c;
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
mov    0x4(%rdi),%eax
add    0x8(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @f2(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 1
%7 = load volatile i32, i32* %6
store i32 %7, i32* %3
%8 = load i32*, i32** %2
%9 = getelementptr inbounds i32, i32* %8, i64 2
%10 = load volatile i32, i32* %9
store i32 %10, i32* %4
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = add nsw i32 %11, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @f2(i32* %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 1
%3 = load volatile i32, i32* %2
%4 = getelementptr inbounds i32, i32* %0, i64 2
%5 = load volatile i32, i32* %4
%6 = add nsw i32 %5, %3
ret i32 %6
}
void AVCDecodeUnsignedExpGolomb() {}


x86 assembly (clang, -O0):
<AVCDecodeUnsignedExpGolomb>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AVCDecodeUnsignedExpGolomb>:
ret

LLVM IR (-O0):
define void @AVCDecodeUnsignedExpGolomb() {
ret void
}

LLVM IR (-O2):
define void @AVCDecodeUnsignedExpGolomb() {
ret void
}
void DBGFR3OSDeregister(void) {}


x86 assembly (clang, -O0):
<DBGFR3OSDeregister>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DBGFR3OSDeregister>:
ret

LLVM IR (-O0):
define void @DBGFR3OSDeregister() {
ret void
}

LLVM IR (-O2):
define void @DBGFR3OSDeregister() {
ret void
}
void g_mem_chunk_print() {}


x86 assembly (clang, -O0):
<g_mem_chunk_print>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_mem_chunk_print>:
ret

LLVM IR (-O0):
define void @g_mem_chunk_print() {
ret void
}

LLVM IR (-O2):
define void @g_mem_chunk_print() {
ret void
}