xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ fooWithEmptyReturn(int);
int /*<<< orphan*/ free(int *);
scalar_t__ malloc(int);
int uafAndCallsFooWithEmptyReturn() {
  int *x = (int *)malloc(12);
  free(x);
  fooWithEmptyReturn(12);
  return *x;
}


x86 assembly (clang, -O0):
<uafAndCallsFooWithEmptyReturn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xc,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    $0xc,%edi
call   1050 <fooWithEmptyReturn@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uafAndCallsFooWithEmptyReturn>:
push   %rbx
mov    $0xc,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1030 <free@plt>
mov    $0xc,%edi
call   1050 <fooWithEmptyReturn@plt>
mov    (%rbx),%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @uafAndCallsFooWithEmptyReturn() {
%1 = alloca i32*
%2 = call i64 @malloc(i32 12)
%3 = inttoptr i64 %2 to i32*
store i32* %3, i32** %1
%4 = load i32*, i32** %1
%5 = call i32 @free(i32* %4)
%6 = call i32 @fooWithEmptyReturn(i32 12)
%7 = load i32*, i32** %1
%8 = load i32, i32* %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @uafAndCallsFooWithEmptyReturn() {
%1 = tail call i64 @malloc(i32 12)
%2 = inttoptr i64 %1 to i32*
%3 = tail call i32 @free(i32* %2)
%4 = tail call i32 @fooWithEmptyReturn(i32 12)
%5 = load i32, i32* %2
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ OSTimeTick();
void pwm_isr(void) {
  (*(volatile unsigned int *)(0x7F006044)) |= (1 << 5);
  (*(volatile unsigned int *)(0x71200F00)) = 0;
  OSTimeTick();
  return;
}


x86 assembly (clang, -O0):
<pwm_isr>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7f006044,%eax
mov    (%rax),%ecx
or     $0x20,%ecx
mov    $0x7f006044,%eax
mov    %ecx,(%rax)
mov    $0x71200f00,%eax
movl   $0x0,(%rax)
mov    $0x0,%al
call   1030 <OSTimeTick@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pwm_isr>:
orl    $0x20,0x7f006044
20
movl   $0x0,0x71200f00
xor    %eax,%eax
jmp    1030 <OSTimeTick@plt>

LLVM IR (-O0):
define void @pwm_isr() {
%1 = load volatile i32, i32* inttoptr (i64 2130731076 to i32*)
%2 = or i32 %1, 32
store volatile i32 %2, i32* inttoptr (i64 2130731076 to i32*)
store volatile i32 0, i32* inttoptr (i64 1897926400 to i32*)
%3 = call i32 (...) @OSTimeTick()
ret void
}

LLVM IR (-O2):
define void @pwm_isr() {
%1 = load volatile i32, i32* inttoptr (i64 2130731076 to i32*)
%2 = or i32 %1, 32
store volatile i32 %2, i32* inttoptr (i64 2130731076 to i32*)
store volatile i32 0, i32* inttoptr (i64 1897926400 to i32*)
%3 = tail call i32 (...) @OSTimeTick()
ret void
}
void san_fail(void) {
  extern _Noreturn void exit(int);
  exit(5);
}


x86 assembly (clang, -O0):
<san_fail>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<san_fail>:
push   %rax
mov    $0x5,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @san_fail() {
unreachable
}

LLVM IR (-O2):
define void @san_fail() {
tail call void @exit(i32 5)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void yyerror(char *str) { printf("Invalid Character..."); }


x86 assembly (clang, -O0):
<yyerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yyerror>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"Invalid Character...\00"
define void @yyerror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"Invalid Character...\00"
define void @yyerror(i8* nocapture readnone %0) {
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct event_base {
  int dummy;
};
struct ev_loop {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ev_loop(struct ev_loop *, int);
int event_base_loop(struct event_base *base, int flags) {
  struct ev_loop *loop = (struct ev_loop *)base;
  ev_loop(loop, flags);
  return 0;
}


x86 assembly (clang, -O0):
<event_base_loop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <ev_loop@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_base_loop>:
push   %rax
call   1030 <ev_loop@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.event_base = type { i32 }
%struct.ev_loop = type { i32 }
define i32 @event_base_loop(%struct.event_base* %0, i32 %1) {
%3 = alloca %struct.event_base*
%4 = alloca i32
%5 = alloca %struct.ev_loop*
store %struct.event_base* %0, %struct.event_base** %3
store i32 %1, i32* %4
%6 = load %struct.event_base*, %struct.event_base** %3
%7 = bitcast %struct.event_base* %6 to %struct.ev_loop*
store %struct.ev_loop* %7, %struct.ev_loop** %5
%8 = load %struct.ev_loop*, %struct.ev_loop** %5
%9 = load i32, i32* %4
%10 = call i32 @ev_loop(%struct.ev_loop* %8, i32 %9)
ret i32 0
}

LLVM IR (-O2):
%struct.event_base = type { i32 }
%struct.ev_loop = type { i32 }
define i32 @event_base_loop(%struct.event_base* %0, i32 %1) {
%3 = bitcast %struct.event_base* %0 to %struct.ev_loop*
%4 = tail call i32 @ev_loop(%struct.ev_loop* %3, i32 %1)
ret i32 0
}
void cpu_dec16_flags(struct cpu *cpu, unsigned short a, signed int t) {}


x86 assembly (clang, -O0):
<cpu_dec16_flags>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    %edx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_dec16_flags>:
ret

LLVM IR (-O0):
%struct.cpu = type opaque
define void @cpu_dec16_flags(%struct.cpu* %0, i16 zeroext %1, i32 %2) {
%4 = alloca %struct.cpu*
%5 = alloca i16
%6 = alloca i32
store %struct.cpu* %0, %struct.cpu** %4
store i16 %1, i16* %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
%struct.cpu = type opaque
define void @cpu_dec16_flags(%struct.cpu* nocapture %0, i16 zeroext %1, i32 %2) {
ret void
}
int lambda(int x) { return (x * x + 1) % 255; }


x86 assembly (clang, -O0):
<lambda>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
add    $0x1,%eax
mov    $0xff,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lambda>:
imul   %edi,%edi
lea    0x1(%rdi),%eax
mov    $0x80808081,%ecx
imul   %rax,%rcx
shr    $0x27,%rcx
mov    %ecx,%eax
shl    $0x8,%eax
sub    %eax,%ecx
lea    (%rdi,%rcx,1),%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @lambda(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %3, %4
%6 = add nsw i32 %5, 1
%7 = srem i32 %6, 255
ret i32 %7
}

LLVM IR (-O2):
define i32 @lambda(i32 %0) {
%2 = mul nsw i32 %0, %0
%3 = add nuw nsw i32 %2, 1
%4 = urem i32 %3, 255
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ errno;
int /*<<< orphan*/ fgets(char *, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
char *strerror(int /*<<< orphan*/);
void parser_get_line(FILE *f, char line[4096]) {
  if (!fgets(line, 4096, f))
    fprintf(stderr, "%s\n", strerror(errno));
}


x86 assembly (clang, -O0):
<parser_get_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    $0x1000,%esi
call   1030 <fgets@plt>
cmp    $0x0,%eax
jne    1187 <parser_get_line+0x57>
mov    0x2e7e(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    0x2e6a(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
mov    -0x14(%rbp),%edi
mov    %rax,%rdx
lea    0xe7e(%rip),%rsi
call   1040 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parser_get_line>:
push   %rbx
mov    %rdi,%rdx
mov    %rsi,%rdi
mov    $0x1000,%esi
call   1030 <fgets@plt>
test   %eax,%eax
je     1147 <parser_get_line+0x17>
pop    %rbx
ret
mov    0x2e92(%rip),%rax
mov    (%rax),%ebx
mov    0x2e81(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
lea    0xe9b(%rip),%rsi
mov    %ebx,%edi
mov    %rax,%rdx
pop    %rbx
jmp    1040 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
@errno = global i32 0
define void @parser_get_line(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i32*, i32** %3
%7 = call i32 @fgets(i8* %5, i32 4096, i32* %6)
%8 = icmp ne i32 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %2
%10 = load i32, i32* @stderr
%11 = load i32, i32* @errno
%12 = call i8* @strerror(i32 %11)
%13 = call i32 @fprintf(i32 %10, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %12)
br label %14
14: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
@errno = global i32 0
define void @parser_get_line(i32* nocapture %0, i8* %1) {
%3 = tail call i32 @fgets(i8* %1, i32 4096, i32* %0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %10
5: ; preds = %2
%6 = load i32, i32* @stderr
%7 = load i32, i32* @errno
%8 = tail call i8* @strerror(i32 %7)
%9 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %8)
br label %10
10: ; preds = %5, %2
ret void
}
/* Variables and functions */
scalar_t__ ft_islower(int);
int ft_toupper(int c) {
  if (ft_islower(c))
    return (c - 32);
  else
    return (c);
}


x86 assembly (clang, -O0):
<ft_toupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <ft_islower@plt>
cmp    $0x0,%rax
je     113b <ft_toupper+0x2b>
mov    -0x8(%rbp),%eax
sub    $0x20,%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <ft_toupper+0x31>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_toupper>:
push   %rbx
mov    %edi,%ebx
call   1030 <ft_islower@plt>
lea    -0x20(%rbx),%ecx
test   %rax,%rax
cmove  %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ft_toupper(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @ft_islower(i32 %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 32
store i32 %9, i32* %2
br label %12
10: ; preds = %1
%11 = load i32, i32* %3
store i32 %11, i32* %2
br label %12
12: ; preds = %10, %7
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @ft_toupper(i32 %0) {
%2 = tail call i64 @ft_islower(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = add nsw i32 %0, -32
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ adds();
int /*<<< orphan*/ cmps();
int /*<<< orphan*/ cvts();
int /*<<< orphan*/ divs();
int /*<<< orphan*/ muls();
int /*<<< orphan*/ nanz();
void tests(void) {
  cmps();
  nanz();
  adds();
  muls();
  divs();
  cvts();
}


x86 assembly (clang, -O0):
<tests>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <cmps@plt>
mov    $0x0,%al
call   1060 <nanz@plt>
mov    $0x0,%al
call   1070 <adds@plt>
mov    $0x0,%al
call   1030 <muls@plt>
mov    $0x0,%al
call   1080 <divs@plt>
mov    $0x0,%al
call   1040 <cvts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tests>:
push   %rax
xor    %eax,%eax
call   1050 <cmps@plt>
xor    %eax,%eax
call   1060 <nanz@plt>
xor    %eax,%eax
call   1070 <adds@plt>
xor    %eax,%eax
call   1030 <muls@plt>
xor    %eax,%eax
call   1080 <divs@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <cvts@plt>

LLVM IR (-O0):
define void @tests() {
%1 = call i32 (...) @cmps()
%2 = call i32 (...) @nanz()
%3 = call i32 (...) @adds()
%4 = call i32 (...) @muls()
%5 = call i32 (...) @divs()
%6 = call i32 (...) @cvts()
ret void
}

LLVM IR (-O2):
define void @tests() {
%1 = tail call i32 (...) @cmps()
%2 = tail call i32 (...) @nanz()
%3 = tail call i32 (...) @adds()
%4 = tail call i32 (...) @muls()
%5 = tail call i32 (...) @divs()
%6 = tail call i32 (...) @cvts()
ret void
}
/* Variables and functions */
int waitForInterruptSys(int, int);
int waitForInterruptGpio(int pin, int mS) {
  return waitForInterruptSys(pin, mS);
}


x86 assembly (clang, -O0):
<waitForInterruptGpio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <waitForInterruptSys@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<waitForInterruptGpio>:
jmp    1030 <waitForInterruptSys@plt>

LLVM IR (-O0):
define i32 @waitForInterruptGpio(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @waitForInterruptSys(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @waitForInterruptGpio(i32 %0, i32 %1) {
%3 = tail call i32 @waitForInterruptSys(i32 %0, i32 %1)
ret i32 %3
}
int fa_kaiser_cof_num(float ftrans, float atten) {
  int cof_num;
  if (atten <= 21.)
    cof_num = (int)((0.9222 * 2.) / ftrans);
  else
    cof_num = (int)(((atten - 7.95) * 2.) / (14.36 * ftrans));
  return cof_num;
}


x86 assembly (clang, -O0):
<fa_kaiser_cof_num>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xee1(%rip),%xmm0
ucomisd %xmm1,%xmm0
jb     114a <fa_kaiser_cof_num+0x4a>
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xee6(%rip),%xmm0
divsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0xc(%rbp)
jmp    118b <fa_kaiser_cof_num+0x8b>
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xebd(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  0xea9(%rip),%xmm1
mulsd  %xmm1,%xmm0
movss  -0x4(%rbp),%xmm1
cvtss2sd %xmm1,%xmm2
movsd  0xe8c(%rip),%xmm1
mulsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fa_kaiser_cof_num>:
movss  0xef8(%rip),%xmm2
ucomiss %xmm1,%xmm2
jae    112b <fa_kaiser_cof_num+0x2b>
cvtss2sd %xmm1,%xmm1
addsd  0xef7(%rip),%xmm1
addsd  %xmm1,%xmm1
cvtss2sd %xmm0,%xmm0
mulsd  0xeef(%rip),%xmm0
jmp    1137 <fa_kaiser_cof_num+0x37>
cvtss2sd %xmm0,%xmm0
movsd  0xed1(%rip),%xmm1
divsd  %xmm0,%xmm1
cvttsd2si %xmm1,%eax
ret

LLVM IR (-O0):
define i32 @fa_kaiser_cof_num(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca i32
store float %0, float* %3
store float %1, float* %4
%6 = load float, float* %4
%7 = fpext float %6 to double
%8 = fcmp ole double %7, 2.100000e+01
br i1 %8, label %9, label %14
9: ; preds = %2
%10 = load float, float* %3
%11 = fpext float %10 to double
%12 = fdiv double 1.844400e+00, %11
%13 = fptosi double %12 to i32
store i32 %13, i32* %5
br label %24
14: ; preds = %2
%15 = load float, float* %4
%16 = fpext float %15 to double
%17 = fsub double %16, 7.950000e+00
%18 = fmul double %17, 2.000000e+00
%19 = load float, float* %3
%20 = fpext float %19 to double
%21 = fmul double 1.436000e+01, %20
%22 = fdiv double %18, %21
%23 = fptosi double %22 to i32
store i32 %23, i32* %5
br label %24
24: ; preds = %14, %9
%25 = load i32, i32* %5
ret i32 %25
}

LLVM IR (-O2):
define i32 @fa_kaiser_cof_num(float %0, float %1) {
%3 = fcmp ugt float %1, 2.100000e+01
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = fpext float %0 to double
%6 = fdiv double 1.844400e+00, %5
br label %14
7: ; preds = %2
%8 = fpext float %1 to double
%9 = fadd double %8, -7.950000e+00
%10 = fmul double %9, 2.000000e+00
%11 = fpext float %0 to double
%12 = fmul double %11, 1.436000e+01
%13 = fdiv double %10, %12
br label %14
14: ; preds = %7, %4
%15 = phi double [ %6, %4 ], [ %13, %7 ]
%16 = fptosi double %15 to i32
ret i32 %16
}
/* Type definitions */
struct in6_addr {
  int dummy;
};

/* Variables and functions */
int memcmp(struct in6_addr const *const *, struct in6_addr const *const *, int);
int listitem_cmp(const void *pa, const void *pb) {
  const struct in6_addr *const *a = pa, *const *b = pb;
  return memcmp(a, b, sizeof(**a));
}


x86 assembly (clang, -O0):
<listitem_cmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<listitem_cmp>:
mov    $0x4,%edx
jmp    1030 <memcmp@plt>

LLVM IR (-O0):
%struct.in6_addr = type { i32 }
define i32 @listitem_cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca %struct.in6_addr**
%6 = alloca %struct.in6_addr**
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to %struct.in6_addr**
store %struct.in6_addr** %8, %struct.in6_addr*** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to %struct.in6_addr**
store %struct.in6_addr** %10, %struct.in6_addr*** %6
%11 = load %struct.in6_addr**, %struct.in6_addr*** %5
%12 = load %struct.in6_addr**, %struct.in6_addr*** %6
%13 = call i32 @memcmp(%struct.in6_addr** %11, %struct.in6_addr** %12, i32 4)
ret i32 %13
}

LLVM IR (-O2):
%struct.in6_addr = type { i32 }
define i32 @listitem_cmp(i8* %0, i8* %1) {
%3 = bitcast i8* %0 to %struct.in6_addr**
%4 = bitcast i8* %1 to %struct.in6_addr**
%5 = tail call i32 @memcmp(%struct.in6_addr** %3, %struct.in6_addr** %4, i32 4)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ fn1(int);
int /*<<< orphan*/ fn2(int);
int /*<<< orphan*/ fn3(int);
int /*<<< orphan*/ fn4(int);
int /*<<< orphan*/ fn5(int, int);
int /*<<< orphan*/ fn6(int);
int main(void) {
  fn1(128);
  fn2(128);
  fn3(128);
  fn4(128);
  fn5(128, 127);
  fn5(128, 128);
  fn6(128);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x80,%edi
call   1030 <fn1@plt>
mov    $0x80,%edi
call   1080 <fn2@plt>
mov    $0x80,%edi
call   1040 <fn3@plt>
mov    $0x80,%edi
call   1070 <fn4@plt>
mov    $0x80,%edi
mov    $0x7f,%esi
call   1050 <fn5@plt>
mov    $0x80,%esi
mov    %esi,%edi
call   1050 <fn5@plt>
mov    $0x80,%edi
call   1060 <fn6@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x80,%edi
call   1030 <fn1@plt>
mov    $0x80,%edi
call   1080 <fn2@plt>
mov    $0x80,%edi
call   1040 <fn3@plt>
mov    $0x80,%edi
call   1070 <fn4@plt>
mov    $0x80,%edi
mov    $0x7f,%esi
call   1050 <fn5@plt>
mov    $0x80,%edi
mov    $0x80,%esi
call   1050 <fn5@plt>
mov    $0x80,%edi
call   1060 <fn6@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @fn1(i32 128)
%3 = call i32 @fn2(i32 128)
%4 = call i32 @fn3(i32 128)
%5 = call i32 @fn4(i32 128)
%6 = call i32 @fn5(i32 128, i32 127)
%7 = call i32 @fn5(i32 128, i32 128)
%8 = call i32 @fn6(i32 128)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @fn1(i32 128)
%2 = tail call i32 @fn2(i32 128)
%3 = tail call i32 @fn3(i32 128)
%4 = tail call i32 @fn4(i32 128)
%5 = tail call i32 @fn5(i32 128, i32 127)
%6 = tail call i32 @fn5(i32 128, i32 128)
%7 = tail call i32 @fn6(i32 128)
ret i32 0
}
char *__attribute__((__unused__)) untilt_slashes(char *s) {
  char *p;
  for (p = s; *p; p++)
    if (*p == '\\')
      *p = '/';
  return s;
}


x86 assembly (clang, -O0):
<untilt_slashes>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     114a <untilt_slashes+0x4a>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x5c,%eax
jne    1134 <untilt_slashes+0x34>
mov    -0x10(%rbp),%rax
movb   $0x2f,(%rax)
jmp    1139 <untilt_slashes+0x39>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <untilt_slashes+0x10>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<untilt_slashes>:
mov    %rdi,%rax
mov    %rdi,%rcx
jmp    1117 <untilt_slashes+0x17>
nopl   0x0(%rax,%rax,1)
movb   $0x2f,(%rcx)
add    $0x1,%rcx
movzbl (%rcx),%edx
cmp    $0x5c,%dl
je     1110 <untilt_slashes+0x10>
test   %dl,%dl
jne    1113 <untilt_slashes+0x13>
ret

LLVM IR (-O0):
define i8* @untilt_slashes(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %17, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %20
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 92
br i1 %13, label %14, label %16
14: ; preds = %9
%15 = load i8*, i8** %3
store i8 47, i8* %15
br label %16
16: ; preds = %14, %9
br label %17
17: ; preds = %16
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
br label %5
20: ; preds = %5
%21 = load i8*, i8** %2
ret i8* %21
}

LLVM IR (-O2):
define i8* @untilt_slashes(i8* returned %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i8* [ %0, %1 ], [ %7, %6 ]
%4 = load i8, i8* %3
switch i8 %4, label %6 [
i8 0, label %8
i8 92, label %5
]
5: ; preds = %2
store i8 47, i8* %3
br label %6
6: ; preds = %2, %5
%7 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
8: ; preds = %2
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ O_WRONLY;
scalar_t__ open(char *, int /*<<< orphan*/);
void *OsaOpenDriver(void) { return (void *)open("/dev/cgos", O_WRONLY); }


x86 assembly (clang, -O0):
<OsaOpenDriver>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ebd(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <open@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<OsaOpenDriver>:
mov    0x2ec1(%rip),%rax
mov    (%rax),%esi
lea    0xee0(%rip),%rdi
jmp    1030 <open@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"/dev/cgos\00"
@O_WRONLY = global i32 0
define i8* @OsaOpenDriver() {
%1 = load i32, i32* @O_WRONLY
%2 = call i64 @open(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = inttoptr i64 %2 to i8*
ret i8* %3
}

LLVM IR (-O2):
@.str = [10 x i8] c"/dev/cgos\00"
@O_WRONLY = global i32 0
define i8* @OsaOpenDriver() {
%1 = load i32, i32* @O_WRONLY
%2 = tail call i64 @open(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = inttoptr i64 %2 to i8*
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ nio_pixel_putc(int const, int const, char const,
                                  unsigned char const, unsigned char const);
void nio_grid_putc(const int offset_x, const int offset_y, const int x,
                   const int y, const char ch, const unsigned char bgColor,
                   const unsigned char textColor) {
  nio_pixel_putc(offset_x + x * 6, offset_y + y * 8, ch, bgColor, textColor);
}


x86 assembly (clang, -O0):
<nio_grid_putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %r8d,-0x24(%rbp)
mov    %ecx,%eax
mov    -0x24(%rbp),%ecx
mov    %eax,-0x20(%rbp)
mov    %edx,%eax
mov    -0x20(%rbp),%edx
mov    %eax,-0x1c(%rbp)
mov    %esi,%eax
mov    -0x1c(%rbp),%esi
mov    %eax,-0x18(%rbp)
mov    %edi,%r8d
mov    -0x18(%rbp),%edi
mov    %r9b,%al
mov    0x10(%rbp),%r9b
mov    %r8d,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %cl,-0x11(%rbp)
mov    %al,-0x12(%rbp)
mov    -0x4(%rbp),%edi
imul   $0x6,-0xc(%rbp),%eax
add    %eax,%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%eax
shl    $0x3,%eax
add    %eax,%esi
mov    -0x11(%rbp),%cl
mov    -0x12(%rbp),%al
movsbl %cl,%edx
movzbl %al,%ecx
movzbl 0x10(%rbp),%r8d
call   1030 <nio_pixel_putc@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nio_grid_putc>:
mov    %r8d,%eax
movzbl 0x8(%rsp),%r8d
lea    (%rdx,%rdx,2),%edx
lea    (%rdi,%rdx,2),%edi
lea    (%rsi,%rcx,8),%esi
mov    %eax,%edx
mov    %r9d,%ecx
jmp    1030 <nio_pixel_putc@plt>

LLVM IR (-O0):
define void @nio_grid_putc(i32 %0, i32 %1, i32 %2, i32 %3, i8 signext %4, i8 zeroext %5, i8 zeroext %6) {
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i8
%13 = alloca i8
%14 = alloca i8
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i8 %4, i8* %12
store i8 %5, i8* %13
store i8 %6, i8* %14
%15 = load i32, i32* %8
%16 = load i32, i32* %10
%17 = mul nsw i32 %16, 6
%18 = add nsw i32 %15, %17
%19 = load i32, i32* %9
%20 = load i32, i32* %11
%21 = mul nsw i32 %20, 8
%22 = add nsw i32 %19, %21
%23 = load i8, i8* %12
%24 = load i8, i8* %13
%25 = load i8, i8* %14
%26 = call i32 @nio_pixel_putc(i32 %18, i32 %22, i8 signext %23, i8 zeroext %24, i8 zeroext %25)
ret void
}

LLVM IR (-O2):
define void @nio_grid_putc(i32 %0, i32 %1, i32 %2, i32 %3, i8 signext %4, i8 zeroext %5, i8 zeroext %6) {
%8 = mul nsw i32 %2, 6
%9 = add nsw i32 %8, %0
%10 = shl nsw i32 %3, 3
%11 = add nsw i32 %10, %1
%12 = tail call i32 @nio_pixel_putc(i32 %9, i32 %11, i8 signext %4, i8 zeroext %5, i8 zeroext %6)
ret void
}
void pcp_def_queue_metrics(void) {}


x86 assembly (clang, -O0):
<pcp_def_queue_metrics>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcp_def_queue_metrics>:
ret

LLVM IR (-O0):
define void @pcp_def_queue_metrics() {
ret void
}

LLVM IR (-O2):
define void @pcp_def_queue_metrics() {
ret void
}
int determineType(float a, float b, float c) {
  int type = 3;
  if (a == 0) {
    if (b == 0) {
      type = 1;
    } else {
      type = 2;
    }
  }
  return type;
}


x86 assembly (clang, -O0):
<determineType>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movl   $0x3,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jne    1160 <determineType+0x60>
jp     1160 <determineType+0x60>
movss  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jne    1154 <determineType+0x54>
jp     1154 <determineType+0x54>
movl   $0x1,-0x10(%rbp)
jmp    115b <determineType+0x5b>
movl   $0x2,-0x10(%rbp)
jmp    1160 <determineType+0x60>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<determineType>:
xorps  %xmm2,%xmm2
cmpeqss %xmm2,%xmm1
movd   %xmm1,%eax
add    $0x2,%eax
ucomiss %xmm2,%xmm0
mov    $0x3,%ecx
cmovne %ecx,%eax
cmovp  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @determineType(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca i32
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
store i32 3, i32* %7
%8 = load float, float* %4
%9 = fcmp oeq float %8, 0.000000e+00
br i1 %9, label %10, label %16
10: ; preds = %3
%11 = load float, float* %5
%12 = fcmp oeq float %11, 0.000000e+00
br i1 %12, label %13, label %14
13: ; preds = %10
store i32 1, i32* %7
br label %15
14: ; preds = %10
store i32 2, i32* %7
br label %15
15: ; preds = %14, %13
br label %16
16: ; preds = %15, %3
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
define i32 @determineType(float %0, float %1, float %2) {
%4 = fcmp oeq float %0, 0.000000e+00
%5 = fcmp oeq float %1, 0.000000e+00
%6 = select i1 %5, i32 1, i32 2
%7 = select i1 %4, i32 %6, i32 3
ret i32 %7
}
/* Variables and functions */
int ax2qu(double *, double *, int);
int ro2ax(double *, double *, int);
int ro2qu(double *ro, double *qu, int p) {
  double ax[4];
  int trash;
  trash = ro2ax(ro, ax, p);
  trash = ax2qu(ax, qu, p);
  return 1;
}


x86 assembly (clang, -O0):
<ro2qu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x40(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <ro2ax@plt>
mov    %eax,-0x44(%rbp)
lea    -0x40(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <ax2qu@plt>
mov    %eax,-0x44(%rbp)
mov    $0x1,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ro2qu>:
push   %r15
push   %r14
push   %rbx
sub    $0x20,%rsp
mov    %edx,%ebx
mov    %rsi,%r14
mov    %rsp,%r15
mov    %r15,%rsi
call   1040 <ro2ax@plt>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %ebx,%edx
call   1030 <ax2qu@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @ro2qu(double* %0, double* %1, i32 %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca i32
%7 = alloca [4 x double]
%8 = alloca i32
store double* %0, double** %4
store double* %1, double** %5
store i32 %2, i32* %6
%9 = load double*, double** %4
%10 = getelementptr inbounds [4 x double], [4 x double]* %7, i64 0, i64 0
%11 = load i32, i32* %6
%12 = call i32 @ro2ax(double* %9, double* %10, i32 %11)
store i32 %12, i32* %8
%13 = getelementptr inbounds [4 x double], [4 x double]* %7, i64 0, i64 0
%14 = load double*, double** %5
%15 = load i32, i32* %6
%16 = call i32 @ax2qu(double* %13, double* %14, i32 %15)
store i32 %16, i32* %8
ret i32 1
}

LLVM IR (-O2):
define i32 @ro2qu(double* %0, double* %1, i32 %2) {
%4 = alloca [4 x double]
%5 = bitcast [4 x double]* %4 to i8*
%6 = getelementptr inbounds [4 x double], [4 x double]* %4, i64 0, i64 0
%7 = call i32 @ro2ax(double* %0, double* %6, i32 %2)
%8 = call i32 @ax2qu(double* %6, double* %1, i32 %2)
ret i32 1
}
int peach(int n) {
  if (n == 1)
    return 1;
  else
    return (peach(n - 1) + 1) * 2;
}


x86 assembly (clang, -O0):
<peach>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1131 <peach+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1145 <peach+0x35>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <peach@plt>
add    $0x1,%eax
shl    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<peach>:
mov    $0x1,%eax
cmp    $0x1,%edi
je     112c <peach+0x1c>
push   %rax
add    $0xffffffff,%edi
call   1030 <peach@plt>
add    %eax,%eax
add    $0x2,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @peach(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %13
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i32 @peach(i32 %9)
%11 = add nsw i32 %10, 1
%12 = mul nsw i32 %11, 2
store i32 %12, i32* %2
br label %13
13: ; preds = %7, %6
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @peach(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %3, label %5
3: ; preds = %1, %5
%4 = phi i32 [ %9, %5 ], [ 1, %1 ]
ret i32 %4
5: ; preds = %1
%6 = add nsw i32 %0, -1
%7 = tail call i32 @peach(i32 %6)
%8 = shl i32 %7, 1
%9 = add i32 %8, 2
br label %3
}
/* Variables and functions */
int /*<<< orphan*/ test_MOVBE_MtoR_16();
int /*<<< orphan*/ test_MOVBE_MtoR_32();
int /*<<< orphan*/ test_MOVBE_RtoM_16();
int /*<<< orphan*/ test_MOVBE_RtoM_32();
int main(void) {
  test_MOVBE_RtoM_32();
  test_MOVBE_RtoM_16();
  test_MOVBE_MtoR_32();
  test_MOVBE_MtoR_16();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <test_MOVBE_RtoM_32@plt>
mov    $0x0,%al
call   1030 <test_MOVBE_RtoM_16@plt>
mov    $0x0,%al
call   1050 <test_MOVBE_MtoR_32@plt>
mov    $0x0,%al
call   1060 <test_MOVBE_MtoR_16@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <test_MOVBE_RtoM_32@plt>
xor    %eax,%eax
call   1030 <test_MOVBE_RtoM_16@plt>
xor    %eax,%eax
call   1050 <test_MOVBE_MtoR_32@plt>
xor    %eax,%eax
call   1060 <test_MOVBE_MtoR_16@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_MOVBE_RtoM_32()
%3 = call i32 (...) @test_MOVBE_RtoM_16()
%4 = call i32 (...) @test_MOVBE_MtoR_32()
%5 = call i32 (...) @test_MOVBE_MtoR_16()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_MOVBE_RtoM_32()
%2 = tail call i32 (...) @test_MOVBE_RtoM_16()
%3 = tail call i32 (...) @test_MOVBE_MtoR_32()
%4 = tail call i32 (...) @test_MOVBE_MtoR_16()
ret i32 0
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void le32enc(void *pp, uint32_t u) {
  uint8_t *p = (uint8_t *)pp;
  p[0] = u & 0xff;
  p[1] = (u >> 8) & 0xff;
  p[2] = (u >> 16) & 0xff;
  p[3] = (u >> 24) & 0xff;
}


x86 assembly (clang, -O0):
<le32enc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x10,%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x18,%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<le32enc>:
mov    %esi,%eax
movzbl %al,%ecx
mov    %ecx,(%rdi)
movzbl %ah,%ecx
mov    %ecx,0x4(%rdi)
mov    %esi,%ecx
shr    $0x10,%ecx
movzbl %cl,%ecx
mov    %ecx,0x8(%rdi)
shr    $0x18,%eax
mov    %eax,0xc(%rdi)
ret

LLVM IR (-O0):
define void @le32enc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %5
%8 = load i32, i32* %4
%9 = and i32 %8, 255
%10 = load i32*, i32** %5
%11 = getelementptr inbounds i32, i32* %10, i64 0
store i32 %9, i32* %11
%12 = load i32, i32* %4
%13 = ashr i32 %12, 8
%14 = and i32 %13, 255
%15 = load i32*, i32** %5
%16 = getelementptr inbounds i32, i32* %15, i64 1
store i32 %14, i32* %16
%17 = load i32, i32* %4
%18 = ashr i32 %17, 16
%19 = and i32 %18, 255
%20 = load i32*, i32** %5
%21 = getelementptr inbounds i32, i32* %20, i64 2
store i32 %19, i32* %21
%22 = load i32, i32* %4
%23 = ashr i32 %22, 24
%24 = and i32 %23, 255
%25 = load i32*, i32** %5
%26 = getelementptr inbounds i32, i32* %25, i64 3
store i32 %24, i32* %26
ret void
}

LLVM IR (-O2):
define void @le32enc(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
%4 = and i32 %1, 255
store i32 %4, i32* %3
%5 = lshr i32 %1, 8
%6 = and i32 %5, 255
%7 = getelementptr inbounds i8, i8* %0, i64 4
%8 = bitcast i8* %7 to i32*
store i32 %6, i32* %8
%9 = lshr i32 %1, 16
%10 = and i32 %9, 255
%11 = getelementptr inbounds i8, i8* %0, i64 8
%12 = bitcast i8* %11 to i32*
store i32 %10, i32* %12
%13 = lshr i32 %1, 24
%14 = getelementptr inbounds i8, i8* %0, i64 12
%15 = bitcast i8* %14 to i32*
store i32 %13, i32* %15
ret void
}
int fun663() { return 663; }


x86 assembly (clang, -O0):
<fun663>:
push   %rbp
mov    %rsp,%rbp
mov    $0x297,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun663>:
mov    $0x297,%eax
ret

LLVM IR (-O0):
define i32 @fun663() {
ret i32 663
}

LLVM IR (-O2):
define i32 @fun663() {
ret i32 663
}
int qsort_cmp__char(const void *x, const void *y) {
  if (*((char *)x) > *((char *)y))
    return (-1);
  else
    return (*((char *)x) < *((char *)y));
}


x86 assembly (clang, -O0):
<qsort_cmp__char>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    -0x18(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jle    112e <qsort_cmp__char+0x2e>
movl   $0xffffffff,-0x4(%rbp)
jmp    1149 <qsort_cmp__char+0x49>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    -0x18(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<qsort_cmp__char>:
mov    (%rdi),%al
xor    %ecx,%ecx
cmp    (%rsi),%al
setl   %cl
mov    $0xffffffff,%eax
cmovle %ecx,%eax
ret

LLVM IR (-O0):
define i32 @qsort_cmp__char(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = load i8*, i8** %5
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp sgt i32 %8, %11
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 -1, i32* %3
br label %23
14: ; preds = %2
%15 = load i8*, i8** %4
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = load i8*, i8** %5
%19 = load i8, i8* %18
%20 = sext i8 %19 to i32
%21 = icmp slt i32 %17, %20
%22 = zext i1 %21 to i32
store i32 %22, i32* %3
br label %23
23: ; preds = %14, %13
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @qsort_cmp__char(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
%5 = icmp sgt i8 %3, %4
%6 = icmp slt i8 %3, %4
%7 = zext i1 %6 to i32
%8 = select i1 %5, i32 -1, i32 %7
ret i32 %8
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ do_init();
const char *rtlsdr_get_device_name(uint32_t index) {
  do_init();
  if (index < 0 || index > 2)
    return "";
  return "Generic RTL2832U OEM";
}


x86 assembly (clang, -O0):
<rtlsdr_get_device_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <do_init@plt>
cmpl   $0x0,-0xc(%rbp)
jl     1136 <rtlsdr_get_device_name+0x26>
cmpl   $0x2,-0xc(%rbp)
jle    1146 <rtlsdr_get_device_name+0x36>
lea    0xed7(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1151 <rtlsdr_get_device_name+0x41>
lea    0xeb3(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtlsdr_get_device_name>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <do_init@plt>
cmp    $0x3,%ebx
lea    0xef0(%rip),%rcx
lea    0xed5(%rip),%rax
cmovae %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
@.str.1 = [21 x i8] c"Generic RTL2832U OEM\00"
define i8* @rtlsdr_get_device_name(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 (...) @do_init()
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp sgt i32 %8, 2
br i1 %9, label %10, label %11
10: ; preds = %7, %1
store i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8** %2
br label %12
11: ; preds = %7
store i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %12
12: ; preds = %11, %10
%13 = load i8*, i8** %2
ret i8* %13
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
@.str.1 = [21 x i8] c"Generic RTL2832U OEM\00"
define i8* @rtlsdr_get_device_name(i32 %0) {
%2 = tail call i32 (...) @do_init()
%3 = icmp ugt i32 %0, 2
%4 = select i1 %3, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0)
ret i8* %4
}
int test_imm_45uint32_reg(unsigned int val) {
  return ((val) & (0x45 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_45uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x45,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_45uint32_reg>:
test   $0x45,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_45uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 69
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_45uint32_reg(i32 %0) {
%2 = and i32 %0, 69
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ int_least64_t;

/* Variables and functions */
bool SHAREMIND_MAP_KEY_LESS_int_least64_t(int_least64_t const k1,
                                          int_least64_t const k2) {
  return k1 < k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_LESS_int_least64_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_LESS_int_least64_t>:
xor    %eax,%eax
cmp    %rsi,%rdi
setl   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_MAP_KEY_LESS_int_least64_t(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @SHAREMIND_MAP_KEY_LESS_int_least64_t(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int tm_mon;
};

/* Variables and functions */
struct tm *localtime(int /*<<< orphan*/ *);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int date_get_month(void) {
  time_t t = time(NULL);
  struct tm *lt = localtime(&t);
  return lt->tm_mon + 1;
}


x86 assembly (clang, -O0):
<date_get_month>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,-0x4(%rbp)
lea    -0x4(%rbp),%rdi
call   1030 <localtime@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<date_get_month>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1030 <localtime@plt>
mov    (%rax),%eax
add    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define i32 @date_get_month() {
%1 = alloca i32
%2 = alloca %struct.tm*
%3 = call i32 @time(i32* null)
store i32 %3, i32* %1
%4 = call %struct.tm* @localtime(i32* %1)
store %struct.tm* %4, %struct.tm** %2
%5 = load %struct.tm*, %struct.tm** %2
%6 = getelementptr inbounds %struct.tm, %struct.tm* %5, i32 0, i32 0
%7 = load i32, i32* %6
%8 = add nsw i32 %7, 1
ret i32 %8
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define i32 @date_get_month() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @time(i32* null)
store i32 %3, i32* %1
%4 = call %struct.tm* @localtime(i32* %1)
%5 = getelementptr inbounds %struct.tm, %struct.tm* %4, i64 0, i32 0
%6 = load i32, i32* %5
%7 = add nsw i32 %6, 1
ret i32 %7
}
int mkstemp(template) char *template;
{ return __gen_tempname(template, 0); }


x86 assembly (clang, -O0):
<mkstemp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x0,%al
call   1030 <__gen_tempname@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mkstemp>:
xor    %esi,%esi
xor    %eax,%eax
jmp    1030 <__gen_tempname@plt>

LLVM IR (-O0):
define i32 @mkstemp(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @__gen_tempname to i32 (i8*, i32, ...)*)(i8* %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @mkstemp(i8* %0) {
%2 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @__gen_tempname to i32 (i8*, i32, ...)*)(i8* %0, i32 0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ daemonize2(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
void daemonize() { daemonize2(NULL, NULL); }


x86 assembly (clang, -O0):
<daemonize>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%esi
mov    %rsi,%rdi
call   1030 <daemonize2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<daemonize>:
xor    %edi,%edi
xor    %esi,%esi
jmp    1030 <daemonize2@plt>

LLVM IR (-O0):
define void @daemonize() {
%1 = call i32 @daemonize2(i32* null, i32* null)
ret void
}

LLVM IR (-O2):
define void @daemonize() {
%1 = tail call i32 @daemonize2(i32* null, i32* null)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ EVP_MD_CTX;

/* Variables and functions */
int /*<<< orphan*/ EVP_MD_CTX_md_data(int /*<<< orphan*/ *);
int SHA384_Init(int /*<<< orphan*/);
int init384(EVP_MD_CTX *ctx) { return SHA384_Init(EVP_MD_CTX_md_data(ctx)); }


x86 assembly (clang, -O0):
<init384>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <EVP_MD_CTX_md_data@plt>
mov    %eax,%edi
call   1040 <SHA384_Init@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init384>:
push   %rax
call   1030 <EVP_MD_CTX_md_data@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <SHA384_Init@plt>

LLVM IR (-O0):
define i32 @init384(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @EVP_MD_CTX_md_data(i32* %3)
%5 = call i32 @SHA384_Init(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @init384(i32* %0) {
%2 = tail call i32 @EVP_MD_CTX_md_data(i32* %0)
%3 = tail call i32 @SHA384_Init(i32 %2)
ret i32 %3
}
/* Variables and functions */
int it8707f_write_enable(int);
int it8707f_write_enable_2e(void) { return it8707f_write_enable(0x2e); }


x86 assembly (clang, -O0):
<it8707f_write_enable_2e>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2e,%edi
call   1030 <it8707f_write_enable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<it8707f_write_enable_2e>:
mov    $0x2e,%edi
jmp    1030 <it8707f_write_enable@plt>

LLVM IR (-O0):
define i32 @it8707f_write_enable_2e() {
%1 = call i32 @it8707f_write_enable(i32 46)
ret i32 %1
}

LLVM IR (-O2):
define i32 @it8707f_write_enable_2e() {
%1 = tail call i32 @it8707f_write_enable(i32 46)
ret i32 %1
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
int /*<<< orphan*/ send_gpio(int, int /*<<< orphan*/);
void lcd_clear(void) {
  uint16_t val = 0b0000000001;
  send_gpio(val, 0);
}


x86 assembly (clang, -O0):
<lcd_clear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1030 <send_gpio@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcd_clear>:
mov    $0x1,%edi
xor    %esi,%esi
jmp    1030 <send_gpio@plt>

LLVM IR (-O0):
define void @lcd_clear() {
%1 = alloca i32
store i32 1, i32* %1
%2 = load i32, i32* %1
%3 = call i32 @send_gpio(i32 %2, i32 0)
ret void
}

LLVM IR (-O2):
define void @lcd_clear() {
%1 = tail call i32 @send_gpio(i32 1, i32 0)
ret void
}
int test_imm_F3int16_reg(short val) {
  return ((val) & (-0xF3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F3int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffff0d,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F3int16_reg>:
test   $0xff0d,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F3int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -243
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_F3int16_reg(i16 signext %0) {
%2 = and i16 %0, -243
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
__attribute__((always_)) void align_free(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<align_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<align_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @align_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @align_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
int tiwlan_disable(void) { return -1; }


x86 assembly (clang, -O0):
<tiwlan_disable>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tiwlan_disable>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @tiwlan_disable() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @tiwlan_disable() {
ret i32 -1
}