xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ _write_string_len(char **, char const *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char const *);
void _write_string(char **pptr, const char *string) {
  _write_string_len(pptr, string, strlen(string));
}


x86 assembly (clang, -O0):
<_write_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1040 <_write_string_len@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_write_string>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <_write_string_len@plt>

LLVM IR (-O0):
define void @_write_string(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
store i8** %0, i8*** %3
store i8* %1, i8** %4
%5 = load i8**, i8*** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i32 @_write_string_len(i8** %5, i8* %6, i32 %8)
ret void
}

LLVM IR (-O2):
define void @_write_string(i8** %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @_write_string_len(i8** %0, i8* %1, i32 %3)
ret void
}
/* Variables and functions */
scalar_t__ exp2(double);
int /*<<< orphan*/ link_failure_exp2();
void test_exp2(double d) {
  if (exp2(d) != exp2(d))
    link_failure_exp2();
}


x86 assembly (clang, -O0):
<test_exp2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <exp2@plt>
mov    %rax,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <exp2@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
je     115c <test_exp2+0x3c>
mov    $0x0,%al
call   1040 <link_failure_exp2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_exp2>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm0,0x8(%rsp)
call   1030 <exp2@plt>
mov    %rax,%rbx
movsd  0x8(%rsp),%xmm0
call   1030 <exp2@plt>
cmp    %rax,%rbx
jne    1149 <test_exp2+0x29>
add    $0x10,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1040 <link_failure_exp2@plt>

LLVM IR (-O0):
define void @test_exp2(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i64 @exp2(double %3)
%5 = load double, double* %2
%6 = call i64 @exp2(double %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_exp2()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_exp2(double %0) {
%2 = tail call i64 @exp2(double %0)
%3 = tail call i64 @exp2(double %0)
%4 = icmp eq i64 %2, %3
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @link_failure_exp2()
br label %7
7: ; preds = %5, %1
ret void
}
float norm_ftc_servo(float value) { return ((value / 127) + 1) / 2 * 255; }


x86 assembly (clang, -O0):
<norm_ftc_servo>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xef6(%rip),%xmm1
divss  %xmm1,%xmm0
movss  0xee6(%rip),%xmm1
addss  %xmm1,%xmm0
movss  0xed6(%rip),%xmm1
divss  %xmm1,%xmm0
movss  0xec6(%rip),%xmm1
mulss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<norm_ftc_servo>:
divss  0xef8(%rip),%xmm0
addss  0xef4(%rip),%xmm0
mulss  0xef0(%rip),%xmm0
mulss  0xeec(%rip),%xmm0
ret

LLVM IR (-O0):
define float @norm_ftc_servo(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fdiv float %3, 1.270000e+02
%5 = fadd float %4, 1.000000e+00
%6 = fdiv float %5, 2.000000e+00
%7 = fmul float %6, 2.550000e+02
ret float %7
}

LLVM IR (-O2):
define float @norm_ftc_servo(float %0) {
%2 = fdiv float %0, 1.270000e+02
%3 = fadd float %2, 1.000000e+00
%4 = fmul float %3, 5.000000e-01
%5 = fmul float %4, 2.550000e+02
ret float %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, long);
void print_bw_nicely(long bytes, long us) {
  printf("%f Mb/s", (bytes * 8.0f) / us);
}


x86 assembly (clang, -O0):
<print_bw_nicely>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cvtsi2ssq -0x8(%rbp),%xmm0
movss  0xed2(%rip),%xmm1
mulss  %xmm1,%xmm0
cvtsi2ssq -0x10(%rbp),%xmm1
divss  %xmm1,%xmm0
cvttss2si %xmm0,%rsi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_bw_nicely>:
cvtsi2ss %rdi,%xmm0
mulss  0xee3(%rip),%xmm0
cvtsi2ss %rsi,%xmm1
divss  %xmm1,%xmm0
cvttss2si %xmm0,%rsi
lea    0xed2(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"%f Mb/s\00"
define void @print_bw_nicely(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = sitofp i64 %5 to float
%7 = fmul float %6, 8.000000e+00
%8 = load i64, i64* %4
%9 = sitofp i64 %8 to float
%10 = fdiv float %7, %9
%11 = fptosi float %10 to i64
%12 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i64 %11)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"%f Mb/s\00"
define void @print_bw_nicely(i64 %0, i64 %1) {
%3 = sitofp i64 %0 to float
%4 = fmul float %3, 8.000000e+00
%5 = sitofp i64 %1 to float
%6 = fdiv float %4, %5
%7 = fptosi float %6 to i64
%8 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i64 %7)
ret void
}
main() {
  typedef int int_t;
  typedef int int_t;
  int_t x;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
int fib(int n) {
  if (n == 0 || n == 1) {
    return 1;
  } else {
    return fib(n - 1) + fib(n - 2);
  }
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112f <fib+0x1f>
cmpl   $0x1,-0x8(%rbp)
jne    113b <fib+0x2b>
movl   $0x1,-0x4(%rbp)
jmp    115e <fib+0x4e>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x2,%edi
jb     1145 <fib+0x35>
mov    %edi,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
lea    -0x1(%rbx),%edi
call   1030 <fib@plt>
add    $0xfffffffe,%ebx
add    %eax,%ebp
cmp    $0x1,%ebx
ja     1130 <fib+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 1, i32* %2
br label %18
10: ; preds = %6
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 1
%13 = call i32 @fib(i32 %12)
%14 = load i32, i32* %3
%15 = sub nsw i32 %14, 2
%16 = call i32 @fib(i32 %15)
%17 = add nsw i32 %13, %16
store i32 %17, i32* %2
br label %18
18: ; preds = %10, %9
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %8, 2
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
void gtk_accelerator_name() {}


x86 assembly (clang, -O0):
<gtk_accelerator_name>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_accelerator_name>:
ret

LLVM IR (-O0):
define void @gtk_accelerator_name() {
ret void
}

LLVM IR (-O2):
define void @gtk_accelerator_name() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pic24_program_verify();
int /*<<< orphan*/ pic24_write_program_init();
void pic24_program_begin(void) {
  pic24_program_verify();
  pic24_write_program_init();
}


x86 assembly (clang, -O0):
<pic24_program_begin>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <pic24_program_verify@plt>
mov    $0x0,%al
call   1040 <pic24_write_program_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pic24_program_begin>:
push   %rax
xor    %eax,%eax
call   1030 <pic24_program_verify@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <pic24_write_program_init@plt>

LLVM IR (-O0):
define void @pic24_program_begin() {
%1 = call i32 (...) @pic24_program_verify()
%2 = call i32 (...) @pic24_write_program_init()
ret void
}

LLVM IR (-O2):
define void @pic24_program_begin() {
%1 = tail call i32 (...) @pic24_program_verify()
%2 = tail call i32 (...) @pic24_write_program_init()
ret void
}
/* Variables and functions */
int rj_readbyte(int);
int rj485_getc(void) { return rj_readbyte(0x20); }


x86 assembly (clang, -O0):
<rj485_getc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20,%edi
call   1030 <rj_readbyte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rj485_getc>:
mov    $0x20,%edi
jmp    1030 <rj_readbyte@plt>

LLVM IR (-O0):
define i32 @rj485_getc() {
%1 = call i32 @rj_readbyte(i32 32)
ret i32 %1
}

LLVM IR (-O2):
define i32 @rj485_getc() {
%1 = tail call i32 @rj_readbyte(i32 32)
ret i32 %1
}
int network_get_channel() { return 0; }


x86 assembly (clang, -O0):
<network_get_channel>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<network_get_channel>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @network_get_channel() {
ret i32 0
}

LLVM IR (-O2):
define i32 @network_get_channel() {
ret i32 0
}
int repeat(int nums[], const int start, const int end) {
  int i;
  for (i = start; i < end; ++i) {
    if (nums[i] == nums[end])
      return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<repeat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    115b <repeat+0x5b>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    -0x10(%rbp),%rcx
movslq -0x18(%rbp),%rdx
cmp    (%rcx,%rdx,4),%eax
jne    1148 <repeat+0x48>
movl   $0x1,-0x4(%rbp)
jmp    1162 <repeat+0x62>
jmp    114d <repeat+0x4d>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1114 <repeat+0x14>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<repeat>:
xor    %eax,%eax
cmp    %edx,%esi
jge    1135 <repeat+0x35>
movslq %edx,%rax
mov    (%rdi,%rax,4),%eax
movslq %esi,%rcx
lea    (%rdi,%rcx,4),%rcx
sub    %esi,%edx
xor    %esi,%esi
nopw   0x0(%rax,%rax,1)
cmp    %eax,(%rcx,%rsi,4)
je     1130 <repeat+0x30>
add    $0x1,%rsi
cmp    %esi,%edx
jne    1120 <repeat+0x20>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @repeat(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i32, i32* %6
store i32 %9, i32* %8
br label %10
10: ; preds = %28, %3
%11 = load i32, i32* %8
%12 = load i32, i32* %7
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %31
14: ; preds = %10
%15 = load i32*, i32** %5
%16 = load i32, i32* %8
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %15, i64 %17
%19 = load i32, i32* %18
%20 = load i32*, i32** %5
%21 = load i32, i32* %7
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i32, i32* %20, i64 %22
%24 = load i32, i32* %23
%25 = icmp eq i32 %19, %24
br i1 %25, label %26, label %27
26: ; preds = %14
store i32 1, i32* %4
br label %32
27: ; preds = %14
br label %28
28: ; preds = %27
%29 = load i32, i32* %8
%30 = add nsw i32 %29, 1
store i32 %30, i32* %8
br label %10
31: ; preds = %10
store i32 0, i32* %4
br label %32
32: ; preds = %31, %26
%33 = load i32, i32* %4
ret i32 %33
}

LLVM IR (-O2):
define i32 @repeat(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %19
5: ; preds = %3
%6 = sext i32 %2 to i64
%7 = getelementptr inbounds i32, i32* %0, i64 %6
%8 = load i32, i32* %7
%9 = sext i32 %1 to i64
br label %13
10: ; preds = %13
%11 = trunc i64 %18 to i32
%12 = icmp eq i32 %11, %2
br i1 %12, label %19, label %13
13: ; preds = %5, %10
%14 = phi i64 [ %9, %5 ], [ %18, %10 ]
%15 = getelementptr inbounds i32, i32* %0, i64 %14
%16 = load i32, i32* %15
%17 = icmp eq i32 %16, %8
%18 = add nsw i64 %14, 1
br i1 %17, label %19, label %10
19: ; preds = %13, %10, %3
%20 = phi i32 [ 0, %3 ], [ 0, %10 ], [ 1, %13 ]
ret i32 %20
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ _UARTBaseValid(int);
void UARTFIFOEnable(uint32_t ui32Base) {
  ASSERT(_UARTBaseValid(ui32Base));
  (*((volatile uint32_t *)(ui32Base + 0x0000002C))) |= 0x00000010;
}


x86 assembly (clang, -O0):
<UARTFIFOEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x2c,%eax
cltq
mov    (%rax),%ecx
or     $0x10,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTFIFOEnable>:
push   %rbx
mov    %edi,%ebx
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
movslq %ebx,%rax
orl    $0x10,0x2c(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @UARTFIFOEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_UARTBaseValid(i32 %3)
%5 = call i32 @ASSERT(i32 %4)
%6 = load i32, i32* %2
%7 = add nsw i32 %6, 44
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
%10 = load volatile i32, i32* %9
%11 = or i32 %10, 16
store volatile i32 %11, i32* %9
ret void
}

LLVM IR (-O2):
define void @UARTFIFOEnable(i32 %0) {
%2 = tail call i32 @_UARTBaseValid(i32 %0)
%3 = tail call i32 @ASSERT(i32 %2)
%4 = add nsw i32 %0, 44
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = or i32 %7, 16
store volatile i32 %8, i32* %6
ret void
}
/* Variables and functions */
int ENXIO;
int pm8921_charger_register_vbus_sn(void (*callback)(int)) { return -ENXIO; }


x86 assembly (clang, -O0):
<pm8921_charger_register_vbus_sn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    0x2ecf(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pm8921_charger_register_vbus_sn>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@ENXIO = global i32 0
define i32 @pm8921_charger_register_vbus_sn(void (i32)* %0) {
%2 = alloca void (i32)*
store void (i32)* %0, void (i32)** %2
%3 = load i32, i32* @ENXIO
%4 = sub nsw i32 0, %3
ret i32 %4
}

LLVM IR (-O2):
@ENXIO = global i32 0
define i32 @pm8921_charger_register_vbus_sn(void (i32)* nocapture readnone %0) {
%2 = load i32, i32* @ENXIO
%3 = sub nsw i32 0, %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ memset(char *, int /*<<< orphan*/, int);
int read(int, char *, int);
int read_socket(int sockfd, char *buf, int size) {
  int len = 0;
  if (!buf) {
    return -1;
  }
  memset(buf, 0, size);
  len = read(sockfd, buf, size);
  if (len > 0) {
  }
  return len;
}


x86 assembly (clang, -O0):
<read_socket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <read_socket+0x30>
movl   $0xffffffff,-0x4(%rbp)
jmp    1185 <read_socket+0x65>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%edx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <read@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jle    117f <read_socket+0x5f>
jmp    117f <read_socket+0x5f>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_socket>:
test   %rsi,%rsi
je     114c <read_socket+0x2c>
push   %rbp
push   %r14
push   %rbx
mov    %edx,%ebp
mov    %rsi,%rbx
mov    %edi,%r14d
mov    %rsi,%rdi
xor    %esi,%esi
call   1030 <memset@plt>
mov    %r14d,%edi
mov    %rbx,%rsi
mov    %ebp,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <read@plt>
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @read_socket(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 0, i32* %8
%9 = load i8*, i8** %6
%10 = icmp ne i8* %9, null
br i1 %10, label %12, label %11
11: ; preds = %3
store i32 -1, i32* %4
br label %25
12: ; preds = %3
%13 = load i8*, i8** %6
%14 = load i32, i32* %7
%15 = call i32 @memset(i8* %13, i32 0, i32 %14)
%16 = load i32, i32* %5
%17 = load i8*, i8** %6
%18 = load i32, i32* %7
%19 = call i32 @read(i32 %16, i8* %17, i32 %18)
store i32 %19, i32* %8
%20 = load i32, i32* %8
%21 = icmp sgt i32 %20, 0
br i1 %21, label %22, label %23
22: ; preds = %12
br label %23
23: ; preds = %22, %12
%24 = load i32, i32* %8
store i32 %24, i32* %4
br label %25
25: ; preds = %23, %11
%26 = load i32, i32* %4
ret i32 %26
}

LLVM IR (-O2):
define i32 @read_socket(i32 %0, i8* %1, i32 %2) {
%4 = icmp eq i8* %1, null
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = tail call i32 @memset(i8* %1, i32 0, i32 %2)
%7 = tail call i32 @read(i32 %0, i8* %1, i32 %2)
br label %8
8: ; preds = %3, %5
%9 = phi i32 [ %7, %5 ], [ -1, %3 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ out8(unsigned short const, unsigned char);
void pit_write_cmd(unsigned char cmd) {
  static const unsigned short PIT_CMD_PORT = 0x43;
  out8(PIT_CMD_PORT, cmd);
}


x86 assembly (clang, -O0):
<pit_write_cmd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x43,%edi
movzbl -0x1(%rbp),%esi
call   1030 <out8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pit_write_cmd>:
mov    %edi,%esi
mov    $0x43,%edi
jmp    1030 <out8@plt>

LLVM IR (-O0):
@pit_write_cmd.PIT_CMD_PORT = internal constant i16 67
define void @pit_write_cmd(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @out8(i16 zeroext 67, i8 zeroext %3)
ret void
}

LLVM IR (-O2):
define void @pit_write_cmd(i8 zeroext %0) {
%2 = tail call i32 @out8(i16 zeroext 67, i8 zeroext %0)
ret void
}
int _write() { return -1; }


x86 assembly (clang, -O0):
<_write>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_write>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @_write() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @_write() {
ret i32 -1
}
void viewvideo_stop(void) {}


x86 assembly (clang, -O0):
<viewvideo_stop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<viewvideo_stop>:
ret

LLVM IR (-O0):
define void @viewvideo_stop() {
ret void
}

LLVM IR (-O2):
define void @viewvideo_stop() {
ret void
}
/* Variables and functions */
int f457(int *);
int f458(int *p) { return f457(p); }


x86 assembly (clang, -O0):
<f458>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f457@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f458>:
jmp    1030 <f457@plt>

LLVM IR (-O0):
define i32 @f458(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f457(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f458(i32* %0) {
%2 = tail call i32 @f457(i32* %0)
ret i32 %2
}
unsigned long msm_subsystem_get_partition_no(int subsys_id) {
  return 0xFFFFFFFF;
}


x86 assembly (clang, -O0):
<msm_subsystem_get_partition_no>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<msm_subsystem_get_partition_no>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i64 @msm_subsystem_get_partition_no(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i64 4294967295
}

LLVM IR (-O2):
define i64 @msm_subsystem_get_partition_no(i32 %0) {
ret i64 4294967295
}
void serial_purge_tx() {}


x86 assembly (clang, -O0):
<serial_purge_tx>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_purge_tx>:
ret

LLVM IR (-O0):
define void @serial_purge_tx() {
ret void
}

LLVM IR (-O2):
define void @serial_purge_tx() {
ret void
}
void xfree(s) register char *s;
{ freecell((char *)s); }


x86 assembly (clang, -O0):
<xfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <freecell@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfree>:
xor    %eax,%eax
jmp    1030 <freecell@plt>

LLVM IR (-O0):
define void @xfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, ...) bitcast (i32 (...)* @freecell to i32 (i8*, ...)*)(i8* %3)
ret void
}

LLVM IR (-O2):
define void @xfree(i8* %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @freecell to i32 (i8*, ...)*)(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int salbase, salreceber, salimp;
  printf("Digite o salario base!");
  scanf("%d", &salbase);
  salimp = (0, 1 * salbase) - salbase;
  salreceber = salimp + 50;
  printf("O novo salrio é %d", salreceber);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xee4(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%eax
shl    $0x0,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x32,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xeab(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xef2(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
lea    0xed0(%rip),%rdi
mov    $0x32,%esi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"Digite o salario base!\00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [20 x i8] c"O novo salrio \C3\A9 %d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%7 = load i32, i32* %2
%8 = mul nsw i32 1, %7
%9 = load i32, i32* %2
%10 = sub nsw i32 %8, %9
store i32 %10, i32* %4
%11 = load i32, i32* %4
%12 = add nsw i32 %11, 50
store i32 %12, i32* %3
%13 = load i32, i32* %3
%14 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.2, i64 0, i64 0), i32 %13)
ret i32 0
}

LLVM IR (-O2):
@.str = [23 x i8] c"Digite o salario base!\00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [20 x i8] c"O novo salrio \C3\A9 %d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str.2, i64 0, i64 0), i32 50)
ret i32 0
}
void uds_on_write(struct DSClient *client) {}


x86 assembly (clang, -O0):
<uds_on_write>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<uds_on_write>:
ret

LLVM IR (-O0):
%struct.DSClient = type opaque
define void @uds_on_write(%struct.DSClient* %0) {
%2 = alloca %struct.DSClient*
store %struct.DSClient* %0, %struct.DSClient** %2
ret void
}

LLVM IR (-O2):
%struct.DSClient = type opaque
define void @uds_on_write(%struct.DSClient* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char, char);
void move(char from, char to) { printf("%c --> %c\n", from, to); }


x86 assembly (clang, -O0):
<move>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    -0x1(%rbp),%al
lea    0xed2(%rip),%rdi
movsbl %al,%esi
movsbl -0x2(%rbp),%edx
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<move>:
mov    %esi,%edx
mov    %edi,%esi
lea    0xee5(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"%c --> %c\0A\00"
define void @move(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = load i8, i8* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8 signext %5, i8 signext %6)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"%c --> %c\0A\00"
define void @move(i8 signext %0, i8 signext %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8 signext %0, i8 signext %1)
ret void
}
/* Variables and functions */
size_t serialize_uint8(unsigned char *out, unsigned char v) {
  if (out != NULL) {
    out[0] = v & 0xFF;
  }
  return 1;
}


x86 assembly (clang, -O0):
<serialize_uint8>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     112a <serialize_uint8+0x2a>
movzbl -0x9(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<serialize_uint8>:
test   %rdi,%rdi
je     1108 <serialize_uint8+0x8>
mov    %sil,(%rdi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i64 @serialize_uint8(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %14
7: ; preds = %2
%8 = load i8, i8* %4
%9 = zext i8 %8 to i32
%10 = and i32 %9, 255
%11 = trunc i32 %10 to i8
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i64 0
store i8 %11, i8* %13
br label %14
14: ; preds = %7, %2
ret i64 1
}

LLVM IR (-O2):
define i64 @serialize_uint8(i8* writeonly %0, i8 zeroext %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %5, label %4
4: ; preds = %2
store i8 %1, i8* %0
br label %5
5: ; preds = %4, %2
ret i64 1
}
/* Variables and functions */
int any_decrqss(char const *, char *);
int rpt_DECSPMA(const char *the_title) { return any_decrqss(the_title, ",x"); }


x86 assembly (clang, -O0):
<rpt_DECSPMA>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <any_decrqss@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpt_DECSPMA>:
lea    0xee9(%rip),%rsi
jmp    1030 <any_decrqss@plt>

LLVM IR (-O0):
@.str = [3 x i8] c",x\00"
define i32 @rpt_DECSPMA(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @any_decrqss(i8* %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [3 x i8] c",x\00"
define i32 @rpt_DECSPMA(i8* %0) {
%2 = tail call i32 @any_decrqss(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
/* Type definitions */
struct coprthr_command_queue {
  int dummy;
};

/* Variables and functions */
scalar_t__ __qnotempty(struct coprthr_command_queue *);
int /*<<< orphan*/ _printcl(char *, int, char *, char *,
                            struct coprthr_command_queue *);
void __do_waitq_1(struct coprthr_command_queue *cmdq1) {
  do {
    if ("<7>"
        "waitq %p\n"[1] <= '0')
      _printcl("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/browndeer/coprthr/refs/heads/"
               "parallellocalypse/src/libcoprthr/event.c",
               561, "clmesg",
               "<7>"
               "waitq %p\n",
               cmdq1);
  } while (0);
  while (__qnotempty(cmdq1))
    ;
  return;
}


x86 assembly (clang, -O0):
<__do_waitq_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
jmp    1121 <__do_waitq_1+0x11>
jmp    1126 <__do_waitq_1+0x16>
mov    -0x8(%rbp),%rdi
call   1030 <__qnotempty@plt>
cmp    $0x0,%rax
je     113e <__do_waitq_1+0x2e>
jmp    1126 <__do_waitq_1+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__do_waitq_1>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rbx,%rdi
call   1030 <__qnotempty@plt>
test   %rax,%rax
jne    1120 <__do_waitq_1+0x10>
pop    %rbx
ret

LLVM IR (-O0):
%struct.coprthr_command_queue = type { i32 }
define void @__do_waitq_1(%struct.coprthr_command_queue* %0) {
%2 = alloca %struct.coprthr_command_queue*
store %struct.coprthr_command_queue* %0, %struct.coprthr_command_queue** %2
br label %3
3: ; preds = %1
br label %4
4: ; preds = %3
br label %5
5: ; preds = %9, %4
%6 = load %struct.coprthr_command_queue*, %struct.coprthr_command_queue** %2
%7 = call i64 @__qnotempty(%struct.coprthr_command_queue* %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %5
br label %5
10: ; preds = %5
ret void
}

LLVM IR (-O2):
%struct.coprthr_command_queue = type { i32 }
define void @__do_waitq_1(%struct.coprthr_command_queue* %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i64 @__qnotempty(%struct.coprthr_command_queue* %0)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %2
5: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void showArgError(const char *arg, const char *name) {
  printf("Argument error: %s\n", arg);
  printf("Please type \"%s -h\" get the usage!\n", name);
}


x86 assembly (clang, -O0):
<showArgError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<showArgError>:
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%rsi
lea    0xee2(%rip),%rdi
call   1030 <printf@plt>
lea    0xeea(%rip),%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"Argument error: %s\0A\00"
@.str.1 = [36 x i8] c"Please type \22%s -h\22 get the usage!\0A\00"
define void @showArgError(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = load i8*, i8** %4
%8 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0), i8* %7)
ret void
}

LLVM IR (-O2):
@.str = [20 x i8] c"Argument error: %s\0A\00"
@.str.1 = [36 x i8] c"Please type \22%s -h\22 get the usage!\0A\00"
define void @showArgError(i8* %0, i8* %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0), i8* %1)
ret void
}
int do_666() { return 666; }


x86 assembly (clang, -O0):
<do_666>:
push   %rbp
mov    %rsp,%rbp
mov    $0x29a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_666>:
mov    $0x29a,%eax
ret

LLVM IR (-O0):
define i32 @do_666() {
ret i32 666
}

LLVM IR (-O2):
define i32 @do_666() {
ret i32 666
}
/* Type definitions */
struct dddsp_modulator_s {
  int dummy;
};

/* Variables and functions */
void dddsp_modulator_append_const_freq(struct dddsp_modulator_s *, float, float,
                                       float);
void dddsp_modulator_append_silence(struct dddsp_modulator_s *self,
                                    float duration) {
  return dddsp_modulator_append_const_freq(self, duration, 0.0f, 0.0f);
}


x86 assembly (clang, -O0):
<dddsp_modulator_append_silence>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
movss  -0xc(%rbp),%xmm0
xorps  %xmm2,%xmm2
movaps %xmm2,%xmm1
call   1030 <dddsp_modulator_append_const_freq@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dddsp_modulator_append_silence>:
xorps  %xmm1,%xmm1
xorps  %xmm2,%xmm2
jmp    1030 <dddsp_modulator_append_const_freq@plt>

LLVM IR (-O0):
%struct.dddsp_modulator_s = type { i32 }
define void @dddsp_modulator_append_silence(%struct.dddsp_modulator_s* %0, float %1) {
%3 = alloca %struct.dddsp_modulator_s*
%4 = alloca float
store %struct.dddsp_modulator_s* %0, %struct.dddsp_modulator_s** %3
store float %1, float* %4
%5 = load %struct.dddsp_modulator_s*, %struct.dddsp_modulator_s** %3
%6 = load float, float* %4
ret void
}

LLVM IR (-O2):
%struct.dddsp_modulator_s = type { i32 }
define void @dddsp_modulator_append_silence(%struct.dddsp_modulator_s* %0, float %1) {
tail call void @dddsp_modulator_append_const_freq(%struct.dddsp_modulator_s* %0, float %1, float 0.000000e+00, float 0.000000e+00)
ret void
}
/* Type definitions */
struct seq_file {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ seq_puts(struct seq_file *, char *);
int ufsdbg_reset_controller_show(struct seq_file *file, void *data) {
  seq_puts(file, "echo 1 > /sys/kernel/debug/.../reset_controller\n");
  seq_puts(file,
           "resets the UFS controller and restores its operational state\n\n");
  return 0;
}


x86 assembly (clang, -O0):
<ufsdbg_reset_controller_show>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed5(%rip),%rsi
call   1030 <seq_puts@plt>
mov    -0x8(%rbp),%rdi
lea    0xef6(%rip),%rsi
call   1030 <seq_puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ufsdbg_reset_controller_show>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <seq_puts@plt>
lea    0xf0a(%rip),%rsi
mov    %rbx,%rdi
call   1030 <seq_puts@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.seq_file = type { i32 }
@.str = [49 x i8] c"echo 1 > /sys/kernel/debug/.../reset_controller\0A\00"
@.str.1 = [63 x i8] c"resets the UFS controller and restores its operational state\0A\0A\00"
define i32 @ufsdbg_reset_controller_show(%struct.seq_file* %0, i8* %1) {
%3 = alloca %struct.seq_file*
%4 = alloca i8*
store %struct.seq_file* %0, %struct.seq_file** %3
store i8* %1, i8** %4
%5 = load %struct.seq_file*, %struct.seq_file** %3
%6 = call i32 @seq_puts(%struct.seq_file* %5, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0))
%7 = load %struct.seq_file*, %struct.seq_file** %3
%8 = call i32 @seq_puts(%struct.seq_file* %7, i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
%struct.seq_file = type { i32 }
@.str = [49 x i8] c"echo 1 > /sys/kernel/debug/.../reset_controller\0A\00"
@.str.1 = [63 x i8] c"resets the UFS controller and restores its operational state\0A\0A\00"
define i32 @ufsdbg_reset_controller_show(%struct.seq_file* %0, i8* nocapture readnone %1) {
%3 = tail call i32 @seq_puts(%struct.seq_file* %0, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @seq_puts(%struct.seq_file* %0, i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int ff_mpa_check_header(uint32_t header) {
  if ((header & 0xffe00000) != 0xffe00000)
    return -1;
  if ((header & (3 << 17)) == 0)
    return -1;
  if ((header & (0xf << 12)) == 0xf << 12)
    return -1;
  if ((header & (3 << 10)) == 3 << 10)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<ff_mpa_check_header>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xffe00000,%eax
cmp    $0xffe00000,%eax
je     1126 <ff_mpa_check_header+0x26>
movl   $0xffffffff,-0x4(%rbp)
jmp    1188 <ff_mpa_check_header+0x88>
mov    -0x8(%rbp),%eax
and    $0x60000,%eax
cmp    $0x0,%eax
jne    1143 <ff_mpa_check_header+0x43>
movl   $0xffffffff,-0x4(%rbp)
jmp    1188 <ff_mpa_check_header+0x88>
mov    -0x8(%rbp),%eax
and    $0xf000,%eax
cmp    $0xf000,%eax
jne    1162 <ff_mpa_check_header+0x62>
movl   $0xffffffff,-0x4(%rbp)
jmp    1188 <ff_mpa_check_header+0x88>
mov    -0x8(%rbp),%eax
and    $0xc00,%eax
cmp    $0xc00,%eax
jne    1181 <ff_mpa_check_header+0x81>
movl   $0xffffffff,-0x4(%rbp)
jmp    1188 <ff_mpa_check_header+0x88>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_mpa_check_header>:
cmp    $0xffe00000,%edi
setb   %al
test   $0x60000,%edi
sete   %cl
or     %al,%cl
not    %edi
test   $0xf000,%edi
sete   %al
or     %cl,%al
test   $0xc00,%edi
sete   %cl
or     %al,%cl
movzbl %cl,%eax
neg    %eax
ret

LLVM IR (-O0):
define i32 @ff_mpa_check_header(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = and i32 %4, -2097152
%6 = icmp ne i32 %5, -2097152
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 -1, i32* %2
br label %24
8: ; preds = %1
%9 = load i32, i32* %3
%10 = and i32 %9, 393216
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 -1, i32* %2
br label %24
13: ; preds = %8
%14 = load i32, i32* %3
%15 = and i32 %14, 61440
%16 = icmp eq i32 %15, 61440
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 -1, i32* %2
br label %24
18: ; preds = %13
%19 = load i32, i32* %3
%20 = and i32 %19, 3072
%21 = icmp eq i32 %20, 3072
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 -1, i32* %2
br label %24
23: ; preds = %18
store i32 0, i32* %2
br label %24
24: ; preds = %23, %22, %17, %12, %7
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @ff_mpa_check_header(i32 %0) {
%2 = icmp ult i32 %0, -2097152
%3 = and i32 %0, 393216
%4 = icmp eq i32 %3, 0
%5 = or i1 %2, %4
%6 = and i32 %0, 61440
%7 = icmp eq i32 %6, 61440
%8 = or i1 %7, %5
%9 = and i32 %0, 3072
%10 = icmp eq i32 %9, 3072
%11 = or i1 %10, %8
%12 = sext i1 %11 to i32
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ *_fatlegalize(int /*<<< orphan*/ const *, char *);
wchar_t *fatlegalizepathlong(const wchar_t *path) {
  return _fatlegalize(path, L"\"*:<>?\\|[]");
}


x86 assembly (clang, -O0):
<fatlegalizepathlong>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <_fatlegalize@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fatlegalizepathlong>:
lea    0xee9(%rip),%rsi
jmp    1030 <_fatlegalize@plt>

LLVM IR (-O0):
@.str = [11 x i32] [i32 34, i32 42, i32 58, i32 60, i32 62, i32 63, i32 92, i32 124, i32 91, i32 93, i32 0]
define i32* @fatlegalizepathlong(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32* @_fatlegalize(i32* %3, i8* bitcast ([11 x i32]* @.str to i8*))
ret i32* %4
}

LLVM IR (-O2):
@.str = [11 x i32] [i32 34, i32 42, i32 58, i32 60, i32 62, i32 63, i32 92, i32 124, i32 91, i32 93, i32 0]
define i32* @fatlegalizepathlong(i32* %0) {
%2 = tail call i32* @_fatlegalize(i32* %0, i8* bitcast ([11 x i32]* @.str to i8*))
ret i32* %2
}
/* Type definitions */
typedef scalar_t__ volatile uint32_t;

/* Variables and functions */
uint32_t SysTickPeriodGet(void) {
  return ((*((volatile uint32_t *)(0xE000E014))) + 1);
}


x86 assembly (clang, -O0):
<SysTickPeriodGet>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe000e014,%eax
mov    (%rax),%rax
add    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysTickPeriodGet>:
mov    $0xe000e014,%eax
mov    (%rax),%rax
add    $0x1,%rax
ret

LLVM IR (-O0):
define i64 @SysTickPeriodGet() {
%1 = load volatile i64, i64* inttoptr (i64 3758153748 to i64*)
%2 = add nsw i64 %1, 1
ret i64 %2
}

LLVM IR (-O2):
define i64 @SysTickPeriodGet() {
%1 = load volatile i64, i64* inttoptr (i64 3758153748 to i64*)
%2 = add nsw i64 %1, 1
ret i64 %2
}
/* Variables and functions */
scalar_t__ EINTR;
scalar_t__ errno;
int read(int, char *, int);
int sock_read(int fd, char *buf, int bufsize, void *arg) {
  int res;
  do
    res = read(fd, buf, bufsize);
  while (res == -1 && errno == EINTR);
  return res;
}


x86 assembly (clang, -O0):
<sock_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <read@plt>
mov    %eax,-0x24(%rbp)
xor    %eax,%eax
cmpl   $0xffffffff,-0x24(%rbp)
mov    %al,-0x25(%rbp)
jne    1161 <sock_read+0x51>
mov    0x2e92(%rip),%rax
mov    (%rax),%rax
mov    0x2e80(%rip),%rcx
cmp    (%rcx),%rax
sete   %al
mov    %al,-0x25(%rbp)
mov    -0x25(%rbp),%al
test   $0x1,%al
jne    1126 <sock_read+0x16>
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sock_read>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %edi,%ebp
mov    0x2eb9(%rip),%r15
mov    0x2eaa(%rip),%r12
xchg   %ax,%ax
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %r14d,%edx
call   1030 <read@plt>
cmp    $0xffffffff,%eax
jne    114b <sock_read+0x3b>
mov    (%r12),%rcx
cmp    %rcx,(%r15)
je     1130 <sock_read+0x20>
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i64 0
@EINTR = global i64 0
define i32 @sock_read(i32 %0, i8* %1, i32 %2, i8* %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i8* %3, i8** %8
br label %10
10: ; preds = %22, %4
%11 = load i32, i32* %5
%12 = load i8*, i8** %6
%13 = load i32, i32* %7
%14 = call i32 @read(i32 %11, i8* %12, i32 %13)
store i32 %14, i32* %9
br label %15
15: ; preds = %10
%16 = load i32, i32* %9
%17 = icmp eq i32 %16, -1
br i1 %17, label %18, label %22
18: ; preds = %15
%19 = load i64, i64* @errno
%20 = load i64, i64* @EINTR
%21 = icmp eq i64 %19, %20
br label %22
22: ; preds = %18, %15
%23 = phi i1 [ false, %15 ], [ %21, %18 ]
br i1 %23, label %10, label %24
24: ; preds = %22
%25 = load i32, i32* %9
ret i32 %25
}

LLVM IR (-O2):
@errno = global i64 0
@EINTR = global i64 0
define i32 @sock_read(i32 %0, i8* nocapture %1, i32 %2, i8* nocapture readnone %3) {
br label %5
5: ; preds = %5, %4
%6 = tail call i32 @read(i32 %0, i8* %1, i32 %2)
%7 = icmp eq i32 %6, -1
%8 = load i64, i64* @errno
%9 = load i64, i64* @EINTR
%10 = icmp eq i64 %8, %9
%11 = select i1 %7, i1 %10, i1 false
br i1 %11, label %5, label %12
12: ; preds = %5
ret i32 %6
}
void testCondProblem(int *p) {
  if (p)
    return;
  int x = *p ? 0 : 1;
  (void)x;
}


x86 assembly (clang, -O0):
<testCondProblem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1118 <testCondProblem+0x18>
jmp    112e <testCondProblem+0x2e>
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %eax,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<testCondProblem>:
ret

LLVM IR (-O0):
define void @testCondProblem(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = icmp ne i32* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
br label %14
7: ; preds = %1
%8 = load i32*, i32** %2
%9 = load i32, i32* %8
%10 = icmp ne i32 %9, 0
%11 = zext i1 %10 to i64
%12 = select i1 %10, i32 0, i32 1
store i32 %12, i32* %3
%13 = load i32, i32* %3
br label %14
14: ; preds = %7, %6
ret void
}

LLVM IR (-O2):
define void @testCondProblem(i32* nocapture %0) {
ret void
}
double c(double x) {
  return x - ((x * x * x * x * x - 7) / (5 * x * x * x * x));
}


x86 assembly (clang, -O0):
<c>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
mulsd  -0x8(%rbp),%xmm1
mulsd  -0x8(%rbp),%xmm1
mulsd  -0x8(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm2
mulsd  %xmm2,%xmm1
movsd  0xed5(%rip),%xmm2
addsd  %xmm2,%xmm1
movsd  0xec1(%rip),%xmm2
mulsd  -0x8(%rbp),%xmm2
mulsd  -0x8(%rbp),%xmm2
mulsd  -0x8(%rbp),%xmm2
mulsd  -0x8(%rbp),%xmm2
divsd  %xmm2,%xmm1
subsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<c>:
movapd %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
addsd  0xee4(%rip),%xmm1
movsd  0xee4(%rip),%xmm2
mulsd  %xmm0,%xmm2
mulsd  %xmm0,%xmm2
mulsd  %xmm0,%xmm2
mulsd  %xmm0,%xmm2
divsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @c(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = load double, double* %2
%6 = fmul double %4, %5
%7 = load double, double* %2
%8 = fmul double %6, %7
%9 = load double, double* %2
%10 = fmul double %8, %9
%11 = load double, double* %2
%12 = call double @llvm.fmuladd.f64(double %10, double %11, double -7.000000e+00)
%13 = load double, double* %2
%14 = fmul double 5.000000e+00, %13
%15 = load double, double* %2
%16 = fmul double %14, %15
%17 = load double, double* %2
%18 = fmul double %16, %17
%19 = load double, double* %2
%20 = fmul double %18, %19
%21 = fdiv double %12, %20
%22 = fsub double %3, %21
ret double %22
}

LLVM IR (-O2):
define double @c(double %0) {
%2 = fmul double %0, %0
%3 = fmul double %2, %0
%4 = fmul double %3, %0
%5 = tail call double @llvm.fmuladd.f64(double %4, double %0, double -7.000000e+00)
%6 = fmul double %0, 5.000000e+00
%7 = fmul double %6, %0
%8 = fmul double %7, %0
%9 = fmul double %8, %0
%10 = fdiv double %5, %9
%11 = fsub double %0, %10
ret double %11
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ VdpDma(int /*<<< orphan*/, int /*<<< orphan*/ const,
                          int /*<<< orphan*/, int);
void VdpTilesLoad(const uint32_t *tiles, const uint16_t vram_addr,
                  uint16_t wlen) {
  VdpDma((uint32_t)tiles, vram_addr, wlen, 0x4080);
}


x86 assembly (clang, -O0):
<VdpTilesLoad>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%edi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    $0x4080,%ecx
call   1030 <VdpDma@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VdpTilesLoad>:
mov    $0x4080,%ecx
jmp    1030 <VdpDma@plt>

LLVM IR (-O0):
define void @VdpTilesLoad(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = ptrtoint i32* %7 to i32
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @VdpDma(i32 %8, i32 %9, i32 %10, i32 16512)
ret void
}

LLVM IR (-O2):
define void @VdpTilesLoad(i32* %0, i32 %1, i32 %2) {
%4 = ptrtoint i32* %0 to i64
%5 = trunc i64 %4 to i32
%6 = tail call i32 @VdpDma(i32 %5, i32 %1, i32 %2, i32 16512)
ret void
}
float _celsius_to_rankine(float input) {
  return (input + 273.15) * (9.0 / 5.0);
}


x86 assembly (clang, -O0):
<_celsius_to_rankine>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xeee(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  0xeda(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_celsius_to_rankine>:
cvtss2sd %xmm0,%xmm0
addsd  0xef4(%rip),%xmm0
mulsd  0xef4(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @_celsius_to_rankine(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fadd double %4, 2.731500e+02
%6 = fmul double %5, 1.800000e+00
%7 = fptrunc double %6 to float
ret float %7
}

LLVM IR (-O2):
define float @_celsius_to_rankine(float %0) {
%2 = fpext float %0 to double
%3 = fadd double %2, 2.731500e+02
%4 = fmul double %3, 1.800000e+00
%5 = fptrunc double %4 to float
ret float %5
}