xunge/DecIR huggingface dataset:
__attribute__((no, noclone)) unsigned __int128 t153_5add(signed __int128 x) {
  unsigned __int128 r;
  if (__builtin_add_overflow(x, (signed __int128)(0), &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t153_5add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rcx
mov    -0x28(%rbp),%rdx
mov    %rdx,%rax
shr    $0x3f,%rax
test   %rax,%rax
setne  %al
mov    %rdx,-0x38(%rbp)
mov    %rcx,-0x40(%rbp)
test   $0x1,%al
jne    115a <t153_5add+0x4a>
jmp    1161 <t153_5add+0x51>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t153_5add>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rax
sar    $0x3f,%rax
je     112a <t153_5add+0x1a>
xor    %eax,%eax
call   1030 <bar@plt>
mov    %r14,%rax
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define { i64, i64 } @t153_5add(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = bitcast i128* %4 to { i64, i64 }*
%8 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 0
store i64 %0, i64* %8
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 1
store i64 %1, i64* %9
%10 = load i128, i128* %4
store i128 %10, i128* %5
%11 = load i128, i128* %5
%12 = sext i128 %11 to i129
%13 = call { i129, i1 } @llvm.sadd.with.overflow.i129(i129 %12, i129 0)
%14 = extractvalue { i129, i1 } %13, 1
%15 = extractvalue { i129, i1 } %13, 0
%16 = trunc i129 %15 to i128
%17 = zext i128 %16 to i129
%18 = icmp ne i129 %15, %17
%19 = or i1 %14, %18
store i128 %16, i128* %6
br i1 %19, label %20, label %22
20: ; preds = %2
%21 = call i32 (...) @bar()
br label %22
22: ; preds = %20, %2
%23 = load i128, i128* %6
store i128 %23, i128* %3
%24 = bitcast i128* %3 to { i64, i64 }*
%25 = load { i64, i64 }, { i64, i64 }* %24
ret { i64, i64 } %25
}

LLVM IR (-O2):
define { i64, i64 } @t153_5add(i64 %0, i64 %1) {
%3 = zext i64 %1 to i128
%4 = shl nuw i128 %3, 64
%5 = zext i64 %0 to i128
%6 = or i128 %4, %5
%7 = sext i128 %6 to i129
%8 = zext i128 %6 to i129
%9 = icmp eq i129 %7, %8
br i1 %9, label %12, label %10
10: ; preds = %2
%11 = tail call i32 (...) @bar()
br label %12
12: ; preds = %10, %2
%13 = insertvalue { i64, i64 } poison, i64 %0, 0
%14 = insertvalue { i64, i64 } %13, i64 %1, 1
ret { i64, i64 } %14
}
/* Variables and functions */
int /*<<< orphan*/ cc_uci_wd_wan_port_checking();
int /*<<< orphan*/ sleep(int);
void cc_watch_dog_task() {
  while (1) {
    cc_uci_wd_wan_port_checking();
    sleep(300);
  }
}


x86 assembly (clang, -O0):
<cc_watch_dog_task>:
push   %rbp
mov    %rsp,%rbp
jmp    1129 <cc_watch_dog_task+0x9>
mov    $0x0,%al
call   1030 <cc_uci_wd_wan_port_checking@plt>
mov    $0x12c,%edi
call   1040 <sleep@plt>
jmp    1129 <cc_watch_dog_task+0x9>

x86 assembly (clang, -O2):
<cc_watch_dog_task>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <cc_uci_wd_wan_port_checking@plt>
mov    $0x12c,%edi
call   1040 <sleep@plt>
jmp    1130 <cc_watch_dog_task+0x10>

LLVM IR (-O0):
define void @cc_watch_dog_task() {
br label %1
1: ; preds = %0, %1
%2 = call i32 (...) @cc_uci_wd_wan_port_checking()
%3 = call i32 @sleep(i32 300)
br label %1
}

LLVM IR (-O2):
define void @cc_watch_dog_task() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 (...) @cc_uci_wd_wan_port_checking()
%3 = tail call i32 @sleep(i32 300)
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRNOTIMPLEMENTED_swap(char *, int);
void U_WMR60_swap(char *record, int torev) {
  U_WMRNOTIMPLEMENTED_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMR60_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRNOTIMPLEMENTED_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR60_swap>:
jmp    1030 <U_WMRNOTIMPLEMENTED_swap@plt>

LLVM IR (-O0):
define void @U_WMR60_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMR60_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %0, i32 %1)
ret void
}
void RAWToUVRow_NEON() {}


x86 assembly (clang, -O0):
<RAWToUVRow_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RAWToUVRow_NEON>:
ret

LLVM IR (-O0):
define void @RAWToUVRow_NEON() {
ret void
}

LLVM IR (-O2):
define void @RAWToUVRow_NEON() {
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ serial;
};
typedef TYPE_1__ XButtonReleasedEvent;

/* Variables and functions */
unsigned long get_XButtonReleasedEvent_serial(void *_p) {
  return (unsigned long)((XButtonReleasedEvent *)_p)->serial;
}


x86 assembly (clang, -O0):
<get_XButtonReleasedEvent_serial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XButtonReleasedEvent_serial>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XButtonReleasedEvent_serial(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XButtonReleasedEvent_serial(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Variables and functions */
int multiply(int, int);
int square(int num) { return multiply(num, num); }


x86 assembly (clang, -O0):
<square>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x4(%rbp),%esi
call   1030 <multiply@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<square>:
mov    %edi,%esi
jmp    1030 <multiply@plt>

LLVM IR (-O0):
define i32 @square(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @multiply(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @square(i32 %0) {
%2 = tail call i32 @multiply(i32 %0, i32 %0)
ret i32 %2
}
void X509V3_EXT_nconf_nid(void) {}


x86 assembly (clang, -O0):
<X509V3_EXT_nconf_nid>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509V3_EXT_nconf_nid>:
ret

LLVM IR (-O0):
define void @X509V3_EXT_nconf_nid() {
ret void
}

LLVM IR (-O2):
define void @X509V3_EXT_nconf_nid() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ L1C_CleanInvalidateCache(int);
__attribute__((always_)) void L1C_CleanInvalidateDCacheAll(void) {
  L1C_CleanInvalidateCache(2);
}


x86 assembly (clang, -O0):
<L1C_CleanInvalidateDCacheAll>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <L1C_CleanInvalidateCache@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<L1C_CleanInvalidateDCacheAll>:
mov    $0x2,%edi
jmp    1030 <L1C_CleanInvalidateCache@plt>

LLVM IR (-O0):
define void @L1C_CleanInvalidateDCacheAll() {
%1 = call i32 @L1C_CleanInvalidateCache(i32 2)
ret void
}

LLVM IR (-O2):
define void @L1C_CleanInvalidateDCacheAll() {
%1 = tail call i32 @L1C_CleanInvalidateCache(i32 2)
ret void
}
/* Variables and functions */
double pow(double, double);
double AT_N2_to_step(double N2) { return (pow(2.0, 1.0 / (double)(N2))); }


x86 assembly (clang, -O0):
<AT_N2_to_step>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xee3(%rip),%xmm1
divsd  -0x8(%rbp),%xmm1
movsd  0xece(%rip),%xmm0
call   1030 <pow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AT_N2_to_step>:
movsd  0xee8(%rip),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
jmp    1030 <exp2@plt>

LLVM IR (-O0):
define double @AT_N2_to_step(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double 1.000000e+00, %3
%5 = call double @pow(double 2.000000e+00, double %4)
ret double %5
}

LLVM IR (-O2):
define double @AT_N2_to_step(double %0) {
%2 = fdiv double 1.000000e+00, %0
%3 = tail call double @exp2(double %2)
ret double %3
}
int XDefaultDepth() {}


x86 assembly (clang, -O0):
<XDefaultDepth>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XDefaultDepth>:
ret

LLVM IR (-O0):
define i32 @XDefaultDepth() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @XDefaultDepth() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0xdd() {
  Assert_real((iscntrl(221) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              1110, ("iscntrl should be 0 for 0xdd"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0xdd>:
push   %rbp
mov    %rsp,%rbp
mov    $0xdd,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x456,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0xdd>:
push   %rax
mov    $0xdd,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x456,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 0 for 0xdd\00"
define void @t_iscntrl_0xdd() {
%1 = call i64 @iscntrl(i32 221)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1110, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 0 for 0xdd\00"
define void @t_iscntrl_0xdd() {
%1 = tail call i64 @iscntrl(i32 221)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1110, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GL_COLOR_BUFFER_BIT;
int /*<<< orphan*/ glClear(int /*<<< orphan*/);
int /*<<< orphan*/ glFlush();
int /*<<< orphan*/ glRectf(float, float, float, float);
void hello_display(void) {
  glClear(GL_COLOR_BUFFER_BIT);
  glRectf(-0.5f, -0.5f, 0.5f, 0.5f);
  glFlush();
}


x86 assembly (clang, -O0):
<hello_display>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
call   1030 <glClear@plt>
movss  0xeb6(%rip),%xmm1
movss  0xeb2(%rip),%xmm3
movaps %xmm1,%xmm0
movaps %xmm3,%xmm2
call   1040 <glRectf@plt>
mov    $0x0,%al
call   1050 <glFlush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hello_display>:
push   %rax
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
call   1030 <glClear@plt>
movss  0xeb9(%rip),%xmm0
movss  0xeb5(%rip),%xmm2
movaps %xmm0,%xmm1
movaps %xmm2,%xmm3
call   1040 <glRectf@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <glFlush@plt>

LLVM IR (-O0):
@GL_COLOR_BUFFER_BIT = global i32 0
define void @hello_display() {
%1 = load i32, i32* @GL_COLOR_BUFFER_BIT
%2 = call i32 @glClear(i32 %1)
%3 = call i32 @glRectf(float -5.000000e-01, float -5.000000e-01, float 5.000000e-01, float 5.000000e-01)
%4 = call i32 (...) @glFlush()
ret void
}

LLVM IR (-O2):
@GL_COLOR_BUFFER_BIT = global i32 0
define void @hello_display() {
%1 = load i32, i32* @GL_COLOR_BUFFER_BIT
%2 = tail call i32 @glClear(i32 %1)
%3 = tail call i32 @glRectf(float -5.000000e-01, float -5.000000e-01, float 5.000000e-01, float 5.000000e-01)
%4 = tail call i32 (...) @glFlush()
ret void
}
/* Variables and functions */
void __aeabi_unwind_cpp_pr0(void) {}


x86 assembly (clang, -O0):
<__aeabi_unwind_cpp_pr0>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__aeabi_unwind_cpp_pr0>:
ret

LLVM IR (-O0):
define void @__aeabi_unwind_cpp_pr0() {
ret void
}

LLVM IR (-O2):
define void @__aeabi_unwind_cpp_pr0() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ main();
int __pok_partition_start() {
  main();
  return (0);
}


x86 assembly (clang, -O0):
<__pok_partition_start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <main@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__pok_partition_start>:
push   %rax
xor    %eax,%eax
call   1030 <main@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @__pok_partition_start() {
%1 = call i32 (...) @main()
ret i32 0
}

LLVM IR (-O2):
define i32 @__pok_partition_start() {
%1 = tail call i32 (...) @main()
ret i32 0
}
char countc(register char *s, char c) {
  char n = 0;
  while (*s)
    if (*s++ == c)
      n++;
  return n;
}


x86 assembly (clang, -O0):
<countc>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movb   $0x0,-0xa(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     114a <countc+0x4a>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jne    1145 <countc+0x45>
mov    -0xa(%rbp),%al
add    $0x1,%al
mov    %al,-0xa(%rbp)
jmp    1112 <countc+0x12>
movsbl -0xa(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<countc>:
mov    (%rdi),%cl
test   %cl,%cl
je     1124 <countc+0x24>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
cmp    %sil,%cl
sete   %cl
add    %cl,%al
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <countc+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define signext i8 @countc(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
store i8 0, i8* %5
br label %6
6: ; preds = %21, %2
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %22
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %3
%13 = load i8, i8* %11
%14 = sext i8 %13 to i32
%15 = load i8, i8* %4
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %14, %16
br i1 %17, label %18, label %21
18: ; preds = %10
%19 = load i8, i8* %5
%20 = add i8 %19, 1
store i8 %20, i8* %5
br label %21
21: ; preds = %18, %10
br label %6
22: ; preds = %6
%23 = load i8, i8* %5
ret i8 %23
}

LLVM IR (-O2):
define signext i8 @countc(i8* nocapture %0, i8 signext %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %13, %5 ], [ %3, %2 ]
%7 = phi i8 [ %12, %5 ], [ 0, %2 ]
%8 = phi i8* [ %9, %5 ], [ %0, %2 ]
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = icmp eq i8 %6, %1
%11 = zext i1 %10 to i8
%12 = add i8 %7, %11
%13 = load i8, i8* %9
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %2
%16 = phi i8 [ 0, %2 ], [ %12, %5 ]
ret i8 %16
}
unsigned char ReceiveByte(unsigned short from) {}


x86 assembly (clang, -O0):
<ReceiveByte>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x4(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReceiveByte>:
ret

LLVM IR (-O0):
define zeroext i8 @ReceiveByte(i16 zeroext %0) {
%2 = alloca i8
%3 = alloca i16
store i16 %0, i16* %3
%4 = load i8, i8* %2
ret i8 %4
}

LLVM IR (-O2):
define zeroext i8 @ReceiveByte(i16 zeroext %0) {
ret i8 undef
}
/* Variables and functions */
int INT_MAX;
int INT_MIN;
long double scalbnl(long double, int);
long double scalblnl(long double x, long n) {
  int in;
  in = (int)n;
  if (in != n) {
    if (n > 0)
      in = INT_MAX;
    else
      in = INT_MIN;
  }
  return (scalbnl(x, (int)n));
}


x86 assembly (clang, -O0):
<scalblnl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
mov    %rdi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %eax,-0x1c(%rbp)
movslq -0x1c(%rbp),%rax
cmp    -0x18(%rbp),%rax
je     1164 <scalblnl+0x54>
cmpq   $0x0,-0x18(%rbp)
jle    1153 <scalblnl+0x43>
mov    0x2e9f(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
jmp    115f <scalblnl+0x4f>
mov    0x2e86(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
jmp    1164 <scalblnl+0x54>
fldt   -0x10(%rbp)
mov    -0x18(%rbp),%edi
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <scalbnl@plt>
fld    %st(0)
fstp   %st(0)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scalblnl>:
jmp    1030 <scalbnl@plt>

LLVM IR (-O0):
@INT_MAX = global i32 0
@INT_MIN = global i32 0
define x86_fp80 @scalblnl(x86_fp80 %0, i64 %1) {
%3 = alloca x86_fp80
%4 = alloca i64
%5 = alloca i32
store x86_fp80 %0, x86_fp80* %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = trunc i64 %6 to i32
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = load i64, i64* %4
%11 = icmp ne i64 %9, %10
br i1 %11, label %12, label %20
12: ; preds = %2
%13 = load i64, i64* %4
%14 = icmp sgt i64 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %12
%16 = load i32, i32* @INT_MAX
store i32 %16, i32* %5
br label %19
17: ; preds = %12
%18 = load i32, i32* @INT_MIN
store i32 %18, i32* %5
br label %19
19: ; preds = %17, %15
br label %20
20: ; preds = %19, %2
%21 = load x86_fp80, x86_fp80* %3
%22 = load i64, i64* %4
%23 = trunc i64 %22 to i32
%24 = call x86_fp80 @scalbnl(x86_fp80 %21, i32 %23)
ret x86_fp80 %24
}

LLVM IR (-O2):
@INT_MAX = global i32 0
@INT_MIN = global i32 0
define x86_fp80 @scalblnl(x86_fp80 %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = tail call x86_fp80 @scalbnl(x86_fp80 %0, i32 %3)
ret x86_fp80 %4
}
/* Variables and functions */
int getLimInt(int /*<<< orphan*/, int);
int /*<<< orphan*/ printf(char *);
int menu() {
  printf("1- List all items\n"
         "2- Search for an item\n"
         "3- Sort Items\n"
         "0- Exit program\n> ");
  return getLimInt(0, 3);
}


x86 assembly (clang, -O0):
<menu>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
mov    $0x3,%esi
call   1040 <getLimInt@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<menu>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
mov    $0x3,%esi
pop    %rax
jmp    1040 <getLimInt@plt>

LLVM IR (-O0):
@.str = [73 x i8] c"1- List all items\0A2- Search for an item\0A3- Sort Items\0A0- Exit program\0A> \00"
define i32 @menu() {
%1 = call i32 @printf(i8* getelementptr inbounds ([73 x i8], [73 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @getLimInt(i32 0, i32 3)
ret i32 %2
}

LLVM IR (-O2):
@.str = [73 x i8] c"1- List all items\0A2- Search for an item\0A3- Sort Items\0A0- Exit program\0A> \00"
define i32 @menu() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([73 x i8], [73 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @getLimInt(i32 0, i32 3)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ hashFunction_2(char *);
int rand();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int hashFunction_3(char a[20]) {
  srand(hashFunction_2(a));
  return rand() % 32000;
}


x86 assembly (clang, -O0):
<hashFunction_3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <hashFunction_2@plt>
mov    %eax,%edi
call   1030 <srand@plt>
mov    $0x0,%al
call   1050 <rand@plt>
mov    $0x7d00,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashFunction_3>:
push   %rax
call   1040 <hashFunction_2@plt>
mov    %eax,%edi
call   1030 <srand@plt>
xor    %eax,%eax
call   1050 <rand@plt>
cltq
imul   $0x10624dd3,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x2b,%rcx
add    %edx,%ecx
imul   $0x7d00,%ecx,%ecx
sub    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @hashFunction_3(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @hashFunction_2(i8* %3)
%5 = call i32 @srand(i32 %4)
%6 = call i32 (...) @rand()
%7 = srem i32 %6, 32000
ret i32 %7
}

LLVM IR (-O2):
define i32 @hashFunction_3(i8* %0) {
%2 = tail call i32 @hashFunction_2(i8* %0)
%3 = tail call i32 @srand(i32 %2)
%4 = tail call i32 (...) @rand()
%5 = srem i32 %4, 32000
ret i32 %5
}
void move_Item_top() {}


x86 assembly (clang, -O0):
<move_Item_top>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<move_Item_top>:
ret

LLVM IR (-O0):
define void @move_Item_top() {
ret void
}

LLVM IR (-O2):
define void @move_Item_top() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ PTHREAD_CANCEL_DEFERRED;
int /*<<< orphan*/ pthread_setcanceltype(int /*<<< orphan*/,
                                         int /*<<< orphan*/ *);
void ptsetcancel(void) { pthread_setcanceltype(PTHREAD_CANCEL_DEFERRED, NULL); }


x86 assembly (clang, -O0):
<ptsetcancel>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <pthread_setcanceltype@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptsetcancel>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
xor    %esi,%esi
jmp    1030 <pthread_setcanceltype@plt>

LLVM IR (-O0):
@PTHREAD_CANCEL_DEFERRED = global i32 0
define void @ptsetcancel() {
%1 = load i32, i32* @PTHREAD_CANCEL_DEFERRED
%2 = call i32 @pthread_setcanceltype(i32 %1, i32* null)
ret void
}

LLVM IR (-O2):
@PTHREAD_CANCEL_DEFERRED = global i32 0
define void @ptsetcancel() {
%1 = load i32, i32* @PTHREAD_CANCEL_DEFERRED
%2 = tail call i32 @pthread_setcanceltype(i32 %1, i32* null)
ret void
}
int test_imm_5Cint64_lowword_reg(long long val) {
  return ((val) & (0x5C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Cint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x5c,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Cint64_lowword_reg>:
test   $0x5c,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Cint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 92
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_5Cint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 92
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ fiber_yield();
void fib(void) {
  int i;
  int fib[2] = {0, 1};
  for (i = 2; i < 100; i++) {
    int next = fib[0] + fib[1];
    fib[0] = fib[1];
    fib[1] = next;
    fiber_yield();
  }
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xee1(%rip),%rax
mov    %rax,-0xc(%rbp)
movl   $0x2,-0x4(%rbp)
cmpl   $0x64,-0x4(%rbp)
jge    115e <fib+0x4e>
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <fiber_yield@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    112a <fib+0x1a>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbx
mov    $0x62,%ebx
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <fiber_yield@plt>
add    $0xffffffff,%ebx
jne    1120 <fib+0x10>
pop    %rbx
ret

LLVM IR (-O0):
@__const.fib.fib = [2 x i32] [i32 0, i32 1]
define void @fib() {
%1 = alloca i32
%2 = alloca [2 x i32]
%3 = alloca i32
%4 = bitcast [2 x i32]* %2 to i8*
store i32 2, i32* %1
br label %5
5: ; preds = %20, %0
%6 = load i32, i32* %1
%7 = icmp slt i32 %6, 100
br i1 %7, label %8, label %23
8: ; preds = %5
%9 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 0
%10 = load i32, i32* %9
%11 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 1
%12 = load i32, i32* %11
%13 = add nsw i32 %10, %12
store i32 %13, i32* %3
%14 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 1
%15 = load i32, i32* %14
%16 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 0
store i32 %15, i32* %16
%17 = load i32, i32* %3
%18 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 1
store i32 %17, i32* %18
%19 = call i32 (...) @fiber_yield()
br label %20
20: ; preds = %8
%21 = load i32, i32* %1
%22 = add nsw i32 %21, 1
store i32 %22, i32* %1
br label %5
23: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @fib() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 2, %0 ], [ %4, %1 ]
%3 = tail call i32 (...) @fiber_yield()
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 100
br i1 %5, label %6, label %1
6: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, unsigned int);
void KeccakP1600_OverwriteWithZeroes(void *state, unsigned int byteCount) {
  assert(byteCount <= 200);
  memset(state, 0, byteCount);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0xc8,-0xc(%rbp)
setbe  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
xor    %edi,%edi
cmp    $0xc9,%esi
setb   %dil
call   1040 <assert@plt>
mov    %r14,%rdi
xor    %esi,%esi
mov    %ebx,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <memset@plt>

LLVM IR (-O0):
define void @KeccakP1600_OverwriteWithZeroes(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ule i32 %5, 200
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i8*, i8** %3
%10 = load i32, i32* %4
%11 = call i32 @memset(i8* %9, i32 0, i32 %10)
ret void
}

LLVM IR (-O2):
define void @KeccakP1600_OverwriteWithZeroes(i8* %0, i32 %1) {
%3 = icmp ult i32 %1, 201
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = tail call i32 @memset(i8* %0, i32 0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ g(void (*)());
void f(void (*p)(void)) { g(p); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <g@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
jmp    1030 <g@plt>

LLVM IR (-O0):
define void @f(void ()* %0) {
%2 = alloca void ()*
store void ()* %0, void ()** %2
%3 = load void ()*, void ()** %2
%4 = bitcast void ()* %3 to void (...)*
%5 = call i32 @g(void (...)* %4)
ret void
}

LLVM IR (-O2):
define void @f(void ()* %0) {
%2 = bitcast void ()* %0 to void (...)*
%3 = tail call i32 @g(void (...)* %2)
ret void
}
_Bool or1(unsigned x, unsigned y) { return x > y || x != 0; }


x86 assembly (clang, -O0):
<or1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x1,%al
cmp    -0x8(%rbp),%ecx
mov    %al,-0x9(%rbp)
ja     1125 <or1+0x25>
cmpl   $0x0,-0x4(%rbp)
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<or1>:
test   %edi,%edi
setne  %al
ret

LLVM IR (-O0):
define zeroext i1 @or1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ugt i32 %5, %6
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i32, i32* %3
%10 = icmp ne i32 %9, 0
br label %11
11: ; preds = %8, %2
%12 = phi i1 [ true, %2 ], [ %10, %8 ]
ret i1 %12
}

LLVM IR (-O2):
define zeroext i1 @or1(i32 %0, i32 %1) {
%3 = icmp ne i32 %0, 0
ret i1 %3
}
/* Variables and functions */
int japi_checkbox(int, char *);
int j_checkbox(int arg0, char *arg1) { return (japi_checkbox(arg0, arg1)); }


x86 assembly (clang, -O0):
<j_checkbox>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <japi_checkbox@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<j_checkbox>:
jmp    1030 <japi_checkbox@plt>

LLVM IR (-O0):
define i32 @j_checkbox(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i32 @japi_checkbox(i32 %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @j_checkbox(i32 %0, i8* %1) {
%3 = tail call i32 @japi_checkbox(i32 %0, i8* %1)
ret i32 %3
}
const char *pathconN_nm7_name_in(int i) {
  switch (i) {
  case 0:
    return "i0";
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<pathconN_nm7_name_in>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
test   %eax,%eax
jne    1127 <pathconN_nm7_name_in+0x27>
jmp    1117 <pathconN_nm7_name_in+0x17>
lea    0xee2(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    112f <pathconN_nm7_name_in+0x2f>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathconN_nm7_name_in>:
xor    %eax,%eax
test   %edi,%edi
lea    0xef5(%rip),%rcx
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"i0\00"
define i8* @pathconN_nm7_name_in(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 0, label %5
]
5: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %2
br label %7
6: ; preds = %1
store i8* null, i8** %2
br label %7
7: ; preds = %6, %5
%8 = load i8*, i8** %2
ret i8* %8
}

LLVM IR (-O2):
@.str = [3 x i8] c"i0\00"
define i8* @pathconN_nm7_name_in(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* null
ret i8* %3
}
/* Variables and functions */
int INT_MIN;
int /*<<< orphan*/ itoa(int, char *);
int /*<<< orphan*/ printf(char *, ...);
int main(void) {
  int min_int = INT_MIN;
  char s[200];
  itoa(min_int, s);
  printf("%d\n", min_int);
  printf("%s\n", s);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0xd0,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eaf(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
lea    -0xd0(%rbp),%rsi
call   1040 <itoa@plt>
mov    -0x8(%rbp),%esi
lea    0xea9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    -0xd0(%rbp),%rsi
lea    0xe98(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0xd0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
sub    $0xc8,%rsp
mov    0x2ea7(%rip),%rax
mov    (%rax),%ebx
mov    %rsp,%r14
mov    %ebx,%edi
mov    %r14,%rsi
call   1050 <itoa@plt>
lea    0xea9(%rip),%rdi
mov    %ebx,%esi
xor    %eax,%eax
call   1040 <printf@plt>
mov    %r14,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0xc8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@INT_MIN = global i32 0
@.str = [4 x i8] c"%d\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [200 x i8]
store i32 0, i32* %1
%4 = load i32, i32* @INT_MIN
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = getelementptr inbounds [200 x i8], [200 x i8]* %3, i64 0, i64 0
%7 = call i32 @itoa(i32 %5, i8* %6)
%8 = load i32, i32* %2
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %8)
%10 = getelementptr inbounds [200 x i8], [200 x i8]* %3, i64 0, i64 0
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %10)
ret i32 0
}

LLVM IR (-O2):
@INT_MIN = global i32 0
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca [200 x i8]
%2 = load i32, i32* @INT_MIN
%3 = getelementptr inbounds [200 x i8], [200 x i8]* %1, i64 0, i64 0
%4 = call i32 @itoa(i32 %2, i8* %3)
%5 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
%6 = call i32 @puts(i8* %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int XAutoRepeatOn() {
  printf("XAutoRepeatOn called\n");
  return 0;
}


x86 assembly (clang, -O0):
<XAutoRepeatOn>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XAutoRepeatOn>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"XAutoRepeatOn called\0A\00"
define i32 @XAutoRepeatOn() {
%1 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [21 x i8] c"XAutoRepeatOn called\00"
define i32 @XAutoRepeatOn() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int rsock_socktype_to_int(const char *str, long len, int *valp) {
  switch (len) {
  case 3:
    return -1;
  case 5:
    return -1;
  case 6:
    return -1;
  case 8:
    return -1;
  case 9:
    return -1;
  case 10:
    return -1;
  case 11:
    return -1;
  case 14:
    return -1;
  default:
    return -1;
  }
}


x86 assembly (clang, -O0):
<rsock_socktype_to_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x18(%rbp),%rax
add    $0xfffffffffffffffd,%rax
mov    %rax,-0x28(%rbp)
sub    $0xb,%rax
ja     119a <rsock_socktype_to_int+0x9a>
mov    -0x28(%rbp),%rax
lea    0xecf(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0xffffffff,-0x4(%rbp)
jmp    11a1 <rsock_socktype_to_int+0xa1>
movl   $0xffffffff,-0x4(%rbp)
jmp    11a1 <rsock_socktype_to_int+0xa1>
movl   $0xffffffff,-0x4(%rbp)
jmp    11a1 <rsock_socktype_to_int+0xa1>
movl   $0xffffffff,-0x4(%rbp)
jmp    11a1 <rsock_socktype_to_int+0xa1>
movl   $0xffffffff,-0x4(%rbp)
jmp    11a1 <rsock_socktype_to_int+0xa1>
movl   $0xffffffff,-0x4(%rbp)
jmp    11a1 <rsock_socktype_to_int+0xa1>
movl   $0xffffffff,-0x4(%rbp)
jmp    11a1 <rsock_socktype_to_int+0xa1>
movl   $0xffffffff,-0x4(%rbp)
jmp    11a1 <rsock_socktype_to_int+0xa1>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rsock_socktype_to_int>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @rsock_socktype_to_int(i8* %0, i64 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i32* %2, i32** %7
%8 = load i64, i64* %6
switch i64 %8, label %17 [
i64 3, label %9
i64 5, label %10
i64 6, label %11
i64 8, label %12
i64 9, label %13
i64 10, label %14
i64 11, label %15
i64 14, label %16
]
9: ; preds = %3
store i32 -1, i32* %4
br label %18
10: ; preds = %3
store i32 -1, i32* %4
br label %18
11: ; preds = %3
store i32 -1, i32* %4
br label %18
12: ; preds = %3
store i32 -1, i32* %4
br label %18
13: ; preds = %3
store i32 -1, i32* %4
br label %18
14: ; preds = %3
store i32 -1, i32* %4
br label %18
15: ; preds = %3
store i32 -1, i32* %4
br label %18
16: ; preds = %3
store i32 -1, i32* %4
br label %18
17: ; preds = %3
store i32 -1, i32* %4
br label %18
18: ; preds = %17, %16, %15, %14, %13, %12, %11, %10, %9
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
define i32 @rsock_socktype_to_int(i8* nocapture readnone %0, i64 %1, i32* nocapture readnone %2) {
ret i32 -1
}
int map_cmp_key_def(void *key1, void *key2) { return key1 != key2; }


x86 assembly (clang, -O0):
<map_cmp_key_def>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<map_cmp_key_def>:
xor    %eax,%eax
cmp    %rsi,%rdi
setne  %al
ret

LLVM IR (-O0):
define i32 @map_cmp_key_def(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = icmp ne i8* %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @map_cmp_key_def(i8* readnone %0, i8* readnone %1) {
%3 = icmp ne i8* %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
int known_types() {
  long long bin = 0, oct = 0, dec = 0, hex = 0;
  bin = 0x123456789abcdefLL;
  oct = 01234567123456701234567LL;
  dec = 12345678901234567890LL;
  hex = bin - dec | oct;
}


x86 assembly (clang, -O0):
<known_types>:
push   %rbp
mov    %rsp,%rbp
movq   $0x0,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
movabs $0x123456789abcdef,%rax
45 23 01
mov    %rax,-0x10(%rbp)
movabs $0xa72ee53977053977,%rax
e5 2e a7
mov    %rax,-0x18(%rbp)
movabs $0xab54a98ceb1f0ad2,%rax
a9 54 ab
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
sub    -0x20(%rbp),%rax
or     -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<known_types>:
ret

LLVM IR (-O0):
define i32 @known_types() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 0, i64* %2
store i64 0, i64* %3
store i64 0, i64* %4
store i64 0, i64* %5
store i64 81985529216486895, i64* %2
store i64 -6399925985474168457, i64* %3
store i64 -6101065172474983726, i64* %4
%6 = load i64, i64* %2
%7 = load i64, i64* %4
%8 = sub nsw i64 %6, %7
%9 = load i64, i64* %3
%10 = or i64 %8, %9
store i64 %10, i64* %5
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
define i32 @known_types() {
ret i32 undef
}
/* Variables and functions */
scalar_t__ tolower(char);
scalar_t__ toupper(char);
char *strcap(char *src) {
  char *s = src;
  while (*s) {
    *s = (char)tolower(*s);
    s++;
  }
  *src = (char)toupper(*src);
  return src;
}


x86 assembly (clang, -O0):
<strcap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1166 <strcap+0x46>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1040 <tolower@plt>
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1134 <strcap+0x14>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <toupper@plt>
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcap>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%al
test   %al,%al
je     115b <strcap+0x3b>
lea    0x1(%r14),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movsbl %al,%edi
call   1040 <tolower@plt>
mov    %al,-0x1(%rbx)
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1140 <strcap+0x20>
mov    (%r14),%al
jmp    115d <strcap+0x3d>
xor    %eax,%eax
movsbl %al,%edi
call   1030 <toupper@plt>
mov    %al,(%r14)
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strcap(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %9, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = call i64 @tolower(i8 signext %11)
%13 = trunc i64 %12 to i8
%14 = load i8*, i8** %3
store i8 %13, i8* %14
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
br label %5
17: ; preds = %5
%18 = load i8*, i8** %2
%19 = load i8, i8* %18
%20 = call i64 @toupper(i8 signext %19)
%21 = trunc i64 %20 to i8
%22 = load i8*, i8** %2
store i8 %21, i8* %22
%23 = load i8*, i8** %2
ret i8* %23
}

LLVM IR (-O2):
define i8* @strcap(i8* returned %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %10, %4 ], [ %2, %1 ]
%6 = phi i8* [ %9, %4 ], [ %0, %1 ]
%7 = tail call i64 @tolower(i8 signext %5)
%8 = trunc i64 %7 to i8
store i8 %8, i8* %6
%9 = getelementptr inbounds i8, i8* %6, i64 1
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4
%13 = load i8, i8* %0
br label %14
14: ; preds = %12, %1
%15 = phi i8 [ %13, %12 ], [ 0, %1 ]
%16 = tail call i64 @toupper(i8 signext %15)
%17 = trunc i64 %16 to i8
store i8 %17, i8* %0
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void main_init2(void) {
  printf("main_init2"
         "\n");
}


x86 assembly (clang, -O0):
<main_init2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main_init2>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"main_init2\0A\00"
define void @main_init2() {
%1 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [11 x i8] c"main_init2\00"
define void @main_init2() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
ret void
}
void I422AlphaToARGBRow_SSSE3() {}


x86 assembly (clang, -O0):
<I422AlphaToARGBRow_SSSE3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I422AlphaToARGBRow_SSSE3>:
ret

LLVM IR (-O0):
define void @I422AlphaToARGBRow_SSSE3() {
ret void
}

LLVM IR (-O2):
define void @I422AlphaToARGBRow_SSSE3() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _IOR(char, int, int /*<<< orphan*/);
int /*<<< orphan*/ ioctl(int, int /*<<< orphan*/, size_t *);
int /*<<< orphan*/ uint32_t;
int beaglelogic_getbufunitsize(int fd) {
  size_t sz;
  ioctl(fd, _IOR('k', 0x27, uint32_t), &sz);
  return sz;
}


x86 assembly (clang, -O0):
<beaglelogic_getbufunitsize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    0x2eb0(%rip),%rax
mov    (%rax),%edx
mov    $0x6b,%edi
mov    $0x27,%esi
call   1040 <_IOR@plt>
mov    -0x14(%rbp),%edi
mov    %eax,%esi
lea    -0x10(%rbp),%rdx
call   1030 <ioctl@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<beaglelogic_getbufunitsize>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
mov    0x2eba(%rip),%rax
mov    (%rax),%edx
mov    $0x6b,%edi
mov    $0x27,%esi
call   1040 <_IOR@plt>
lea    0x8(%rsp),%rdx
mov    %ebx,%edi
mov    %eax,%esi
call   1030 <ioctl@plt>
mov    0x8(%rsp),%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@uint32_t = global i32 0
define i32 @beaglelogic_getbufunitsize(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @uint32_t
%6 = call i32 @_IOR(i8 signext 107, i32 39, i32 %5)
%7 = call i32 @ioctl(i32 %4, i32 %6, i64* %3)
%8 = load i64, i64* %3
%9 = trunc i64 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
@uint32_t = global i32 0
define i32 @beaglelogic_getbufunitsize(i32 %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = load i32, i32* @uint32_t
%5 = tail call i32 @_IOR(i8 signext 107, i32 39, i32 %4)
%6 = call i32 @ioctl(i32 %0, i32 %5, i64* %2)
%7 = load i64, i64* %2
%8 = trunc i64 %7 to i32
ret i32 %8
}
/* Variables and functions */
int partition(int *, int, int);
void quickSort(int *a, int lo, int hi) {
  int pivot;
  if (lo < hi) {
    pivot = partition(a, lo, hi);
    quickSort(a, lo, pivot - 1);
    quickSort(a, pivot + 1, hi);
  }
}


x86 assembly (clang, -O0):
<quickSort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <quickSort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quickSort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quickSort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quickSort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quickSort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quickSort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quickSort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quickSort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partition(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @quickSort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quickSort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}