xunge/DecIR huggingface dataset:
float fast_log2(float val) {
  int *const exp_ptr = (int *)(&val);
  int x = *exp_ptr;
  const int log_2 = ((x >> 23) & 255) - 128;
  x &= ~(255 << 23);
  x += 127 << 23;
  *exp_ptr = x;
  val = ((-1.0f / 3) * val + 2) * val - 2.0f / 3;
  return (val + log_2);
}


x86 assembly (clang, -O0):
<fast_log2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sar    $0x17,%eax
and    $0xff,%eax
sub    $0x80,%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
and    $0x807fffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x3f800000,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
movss  -0x4(%rbp),%xmm0
movss  0xeab(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xea3(%rip),%xmm1
addss  %xmm1,%xmm0
movss  -0x4(%rbp),%xmm1
mulss  %xmm1,%xmm0
movss  0xe86(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtsi2ssl -0x18(%rbp),%xmm1
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fast_log2>:
movd   %xmm0,%eax
mov    %eax,%ecx
shr    $0x17,%ecx
movzbl %cl,%ecx
and    $0x807fffff,%eax
or     $0x3f800000,%eax
movd   %eax,%xmm0
movss  0xede(%rip),%xmm1
mulss  %xmm0,%xmm1
addss  0xed6(%rip),%xmm1
add    $0xffffff80,%ecx
mulss  %xmm0,%xmm1
addss  0xecb(%rip),%xmm1
xorps  %xmm0,%xmm0
cvtsi2ss %ecx,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @fast_log2(float %0) {
%2 = alloca float
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store float %0, float* %2
%6 = bitcast float* %2 to i32*
store i32* %6, i32** %3
%7 = load i32*, i32** %3
%8 = load i32, i32* %7
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = ashr i32 %9, 23
%11 = and i32 %10, 255
%12 = sub nsw i32 %11, 128
store i32 %12, i32* %5
%13 = load i32, i32* %4
%14 = and i32 %13, -2139095041
store i32 %14, i32* %4
%15 = load i32, i32* %4
%16 = add nsw i32 %15, 1065353216
store i32 %16, i32* %4
%17 = load i32, i32* %4
%18 = load i32*, i32** %3
store i32 %17, i32* %18
%19 = load float, float* %2
%20 = call float @llvm.fmuladd.f32(float 0xBFD5555560000000, float %19, float 2.000000e+00)
%21 = load float, float* %2
%22 = call float @llvm.fmuladd.f32(float %20, float %21, float 0xBFE5555560000000)
store float %22, float* %2
%23 = load float, float* %2
%24 = load i32, i32* %5
%25 = sitofp i32 %24 to float
%26 = fadd float %23, %25
ret float %26
}

LLVM IR (-O2):
define float @fast_log2(float %0) {
%2 = bitcast float %0 to i32
%3 = lshr i32 %2, 23
%4 = and i32 %3, 255
%5 = add nsw i32 %4, -128
%6 = and i32 %2, -2139095041
%7 = or i32 %6, 1065353216
%8 = bitcast i32 %7 to float
%9 = tail call float @llvm.fmuladd.f32(float %8, float 0xBFD5555560000000, float 2.000000e+00)
%10 = tail call float @llvm.fmuladd.f32(float %9, float %8, float 0xBFE5555560000000)
%11 = sitofp i32 %5 to float
%12 = fadd float %10, %11
ret float %12
}
/* Variables and functions */
int /*<<< orphan*/ Index_InitCfg();
int /*<<< orphan*/ Process_InitCfg();
int /*<<< orphan*/ Progress_InitCfg();
int /*<<< orphan*/ Signature_InitCfg();
int /*<<< orphan*/ Stem_InitCfg();
int /*<<< orphan*/ Stop_InitCfg();
void ConfigUpdate() {
  Process_InitCfg();
  Stop_InitCfg();
  Stem_InitCfg();
  Signature_InitCfg();
  Progress_InitCfg();
  Index_InitCfg();
}


x86 assembly (clang, -O0):
<ConfigUpdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1060 <Process_InitCfg@plt>
mov    $0x0,%al
call   1080 <Stop_InitCfg@plt>
mov    $0x0,%al
call   1030 <Stem_InitCfg@plt>
mov    $0x0,%al
call   1050 <Signature_InitCfg@plt>
mov    $0x0,%al
call   1070 <Progress_InitCfg@plt>
mov    $0x0,%al
call   1040 <Index_InitCfg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ConfigUpdate>:
push   %rax
xor    %eax,%eax
call   1060 <Process_InitCfg@plt>
xor    %eax,%eax
call   1080 <Stop_InitCfg@plt>
xor    %eax,%eax
call   1030 <Stem_InitCfg@plt>
xor    %eax,%eax
call   1050 <Signature_InitCfg@plt>
xor    %eax,%eax
call   1070 <Progress_InitCfg@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <Index_InitCfg@plt>

LLVM IR (-O0):
define void @ConfigUpdate() {
%1 = call i32 (...) @Process_InitCfg()
%2 = call i32 (...) @Stop_InitCfg()
%3 = call i32 (...) @Stem_InitCfg()
%4 = call i32 (...) @Signature_InitCfg()
%5 = call i32 (...) @Progress_InitCfg()
%6 = call i32 (...) @Index_InitCfg()
ret void
}

LLVM IR (-O2):
define void @ConfigUpdate() {
%1 = tail call i32 (...) @Process_InitCfg()
%2 = tail call i32 (...) @Stop_InitCfg()
%3 = tail call i32 (...) @Stem_InitCfg()
%4 = tail call i32 (...) @Signature_InitCfg()
%5 = tail call i32 (...) @Progress_InitCfg()
%6 = tail call i32 (...) @Index_InitCfg()
ret void
}
/* Variables and functions */
unsigned char i2c_master_start(unsigned char);
unsigned char i2c_start_write(unsigned char addr) {
  return i2c_master_start((addr << 1) | 0);
}


x86 assembly (clang, -O0):
<i2c_start_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x1,%eax
or     $0x0,%eax
movzbl %al,%edi
call   1030 <i2c_master_start@plt>
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_start_write>:
add    %dil,%dil
movzbl %dil,%edi
jmp    1030 <i2c_master_start@plt>

LLVM IR (-O0):
define zeroext i8 @i2c_start_write(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = shl i32 %4, 1
%6 = or i32 %5, 0
%7 = trunc i32 %6 to i8
%8 = call zeroext i8 @i2c_master_start(i8 zeroext %7)
ret i8 %8
}

LLVM IR (-O2):
define zeroext i8 @i2c_start_write(i8 zeroext %0) {
%2 = shl i8 %0, 1
%3 = tail call zeroext i8 @i2c_master_start(i8 zeroext %2)
ret i8 %3
}
unsigned long umin(unsigned long a, unsigned long b) { return a < b ? a : b; }


x86 assembly (clang, -O0):
<umin>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1127 <umin+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <umin+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<umin>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovb  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @umin(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp ult i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @umin(i64 %0, i64 %1) {
%3 = icmp ult i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
void l1_symbolic_underrun_Bad(int i) {
  int a[10];
  if (i < 0) {
    a[i] = 0;
  }
}


x86 assembly (clang, -O0):
<l1_symbolic_underrun_Bad>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    111d <l1_symbolic_underrun_Bad+0x1d>
movslq -0x4(%rbp),%rax
movl   $0x0,-0x30(%rbp,%rax,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<l1_symbolic_underrun_Bad>:
ret

LLVM IR (-O0):
define void @l1_symbolic_underrun_Bad(i32 %0) {
%2 = alloca i32
%3 = alloca [10 x i32]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds [10 x i32], [10 x i32]* %3, i64 0, i64 %8
store i32 0, i32* %9
br label %10
10: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
define void @l1_symbolic_underrun_Bad(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clear_io_bit(int, int);
void TOSH_MAKE_RADIO_GIO1_INPUT() { clear_io_bit(-3, 7); }


x86 assembly (clang, -O0):
<TOSH_MAKE_RADIO_GIO1_INPUT>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffffffd,%edi
mov    $0x7,%esi
call   1030 <clear_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_MAKE_RADIO_GIO1_INPUT>:
mov    $0xfffffffd,%edi
mov    $0x7,%esi
jmp    1030 <clear_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_MAKE_RADIO_GIO1_INPUT() {
%1 = call i32 @clear_io_bit(i32 -3, i32 7)
ret void
}

LLVM IR (-O2):
define void @TOSH_MAKE_RADIO_GIO1_INPUT() {
%1 = tail call i32 @clear_io_bit(i32 -3, i32 7)
ret void
}
int test2(float X, float Y) { return !__builtin_isunordered(X, Y); }


x86 assembly (clang, -O0):
<test2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
setp   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test2>:
xor    %eax,%eax
ucomiss %xmm1,%xmm0
setnp  %al
ret

LLVM IR (-O0):
define i32 @test2(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp uno float %5, %6
%8 = xor i1 %7, true
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @test2(float %0, float %1) {
%3 = fcmp ord float %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ CreatePic(unsigned char *);
int /*<<< orphan*/ DestroyPic();
void GPUshowScreenPic(unsigned char *pMem) {
  DestroyPic();
  if (pMem == 0)
    return;
  CreatePic(pMem);
}


x86 assembly (clang, -O0):
<GPUshowScreenPic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <DestroyPic@plt>
cmpq   $0x0,-0x8(%rbp)
jne    1143 <GPUshowScreenPic+0x23>
jmp    114c <GPUshowScreenPic+0x2c>
mov    -0x8(%rbp),%rdi
call   1030 <CreatePic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPUshowScreenPic>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <DestroyPic@plt>
test   %rbx,%rbx
je     1139 <GPUshowScreenPic+0x19>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <CreatePic@plt>
pop    %rbx
ret

LLVM IR (-O0):
define void @GPUshowScreenPic(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @DestroyPic()
%4 = load i8*, i8** %2
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
br label %10
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = call i32 @CreatePic(i8* %8)
br label %10
10: ; preds = %7, %6
ret void
}

LLVM IR (-O2):
define void @GPUshowScreenPic(i8* %0) {
%2 = tail call i32 (...) @DestroyPic()
%3 = icmp eq i8* %0, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @CreatePic(i8* %0)
br label %6
6: ; preds = %1, %4
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char *);
void file_store(char *file, char *content) {
  FILE *f;
  if (!(f = fopen(file, "w+"))) {
    return;
  }
  fprintf(f, "%s", content);
  fclose(f);
}


x86 assembly (clang, -O0):
<file_store>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xeb5(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    1163 <file_store+0x33>
jmp    1180 <file_store+0x50>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xe91(%rip),%rsi
call   1040 <fprintf@plt>
mov    -0x18(%rbp),%rdi
call   1030 <fclose@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_store>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
lea    0xec2(%rip),%rsi
call   1050 <fopen@plt>
test   %rax,%rax
je     1165 <file_store+0x35>
mov    %rax,%rbx
mov    %r14,%rdi
mov    %rax,%rsi
call   1040 <fputs@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fclose@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"w+\00"
@.str.1 = [3 x i8] c"%s\00"
define void @file_store(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i32* @fopen(i8* %6, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
store i32* %7, i32** %5
%8 = icmp ne i32* %7, null
br i1 %8, label %10, label %9
9: ; preds = %2
br label %16
10: ; preds = %2
%11 = load i32*, i32** %5
%12 = load i8*, i8** %4
%13 = call i32 @fprintf(i32* %11, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %12)
%14 = load i32*, i32** %5
%15 = call i32 @fclose(i32* %14)
br label %16
16: ; preds = %10, %9
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"w+\00"
define void @file_store(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i32* %3, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @fputs(i8* %1, i32* %3)
%7 = tail call i32 @fclose(i32* %3)
br label %8
8: ; preds = %2, %5
ret void
}
/* Type definitions */
struct thread_info {
  int dummy;
};

/* Variables and functions */
void *work(struct thread_info *);
void *worker_thread(void *ptr) {
  struct thread_info *tip = (struct thread_info *)ptr;
  return work(tip);
}


x86 assembly (clang, -O0):
<worker_thread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <work@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<worker_thread>:
jmp    1030 <work@plt>

LLVM IR (-O0):
%struct.thread_info = type { i32 }
define i8* @worker_thread(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.thread_info*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to %struct.thread_info*
store %struct.thread_info* %5, %struct.thread_info** %3
%6 = load %struct.thread_info*, %struct.thread_info** %3
%7 = call i8* @work(%struct.thread_info* %6)
ret i8* %7
}

LLVM IR (-O2):
%struct.thread_info = type { i32 }
define i8* @worker_thread(i8* %0) {
%2 = bitcast i8* %0 to %struct.thread_info*
%3 = tail call i8* @work(%struct.thread_info* %2)
ret i8* %3
}
/* Variables and functions */
char *test_heap_property();
char *all_tests() {
  do {
    char *run_test_msg = test_heap_property();
    if (run_test_msg)
      return run_test_msg;
  } while (0);
  return 0;
}


x86 assembly (clang, -O0):
<all_tests>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <test_heap_property@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     113b <all_tests+0x2b>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1148 <all_tests+0x38>
jmp    1140 <all_tests+0x30>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<all_tests>:
xor    %eax,%eax
jmp    1030 <test_heap_property@plt>

LLVM IR (-O0):
define i8* @all_tests() {
%1 = alloca i8*
%2 = alloca i8*
br label %3
3: ; preds = %0
%4 = call i8* (...) @test_heap_property()
store i8* %4, i8** %2
%5 = load i8*, i8** %2
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = load i8*, i8** %2
store i8* %8, i8** %1
br label %11
9: ; preds = %3
br label %10
10: ; preds = %9
store i8* null, i8** %1
br label %11
11: ; preds = %10, %7
%12 = load i8*, i8** %1
ret i8* %12
}

LLVM IR (-O2):
define i8* @all_tests() {
%1 = tail call i8* (...) @test_heap_property()
ret i8* %1
}
int max_node(int a, int b) { return (a > b) ? a : b; }


x86 assembly (clang, -O0):
<max_node>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <max_node+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <max_node+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max_node>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @max_node(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @max_node(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
int check_float(char a[]) {
  int i = 0;
  while (a[i] != '\0') {
    if (a[i] == '.')
      return 1;
    i++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<check_float>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1153 <check_float+0x53>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x2e,%eax
jne    1145 <check_float+0x45>
movl   $0x1,-0x4(%rbp)
jmp    115a <check_float+0x5a>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    110f <check_float+0xf>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_float>:
movzbl (%rdi),%eax
test   %al,%al
je     1111 <check_float+0x11>
cmp    $0x2e,%al
je     1114 <check_float+0x14>
add    $0x1,%rdi
jmp    1100 <check_float>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @check_float(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
br label %5
5: ; preds = %22, %1
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %25
13: ; preds = %5
%14 = load i8*, i8** %3
%15 = load i32, i32* %4
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 46
br i1 %20, label %21, label %22
21: ; preds = %13
store i32 1, i32* %2
br label %26
22: ; preds = %13
%23 = load i32, i32* %4
%24 = add nsw i32 %23, 1
store i32 %24, i32* %4
br label %5
25: ; preds = %5
store i32 0, i32* %2
br label %26
26: ; preds = %25, %21
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @check_float(i8* nocapture %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i64 [ %7, %6 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
switch i8 %5, label %6 [
i8 0, label %9
i8 46, label %8
]
6: ; preds = %2
%7 = add nuw i64 %3, 1
br label %2
8: ; preds = %2
br label %9
9: ; preds = %2, %8
%10 = phi i32 [ 1, %8 ], [ 0, %2 ]
ret i32 %10
}
adr0indreg1(r0, r1, x0, x1, p0, p1) unsigned char r0, r1;
unsigned char *p0, *p1;
{
  if ((*((unsigned char *)10000000)) <= (*p1))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<adr0indreg1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %dil,%sil
mov    %sil,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    $0x989680,%eax
movzbl (%rax),%eax
mov    -0x20(%rbp),%rcx
movzbl (%rcx),%ecx
cmp    %ecx,%eax
jg     1141 <adr0indreg1+0x41>
movl   $0x1,-0x4(%rbp)
jmp    1148 <adr0indreg1+0x48>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adr0indreg1>:
mov    0x989680,%cl
xor    %eax,%eax
cmp    (%r9),%cl
setbe  %al
ret

LLVM IR (-O0):
define i32 @adr0indreg1(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4, i8* %5) {
%7 = alloca i32
%8 = alloca i8
%9 = alloca i8
%10 = alloca i32
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i8*
%14 = trunc i32 %0 to i8
%15 = trunc i32 %1 to i8
store i8 %14, i8* %8
store i8 %15, i8* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i8* %4, i8** %12
store i8* %5, i8** %13
%16 = load i8, i8* inttoptr (i64 10000000 to i8*)
%17 = zext i8 %16 to i32
%18 = load i8*, i8** %13
%19 = load i8, i8* %18
%20 = zext i8 %19 to i32
%21 = icmp sle i32 %17, %20
br i1 %21, label %22, label %23
22: ; preds = %6
store i32 1, i32* %7
br label %24
23: ; preds = %6
store i32 0, i32* %7
br label %24
24: ; preds = %23, %22
%25 = load i32, i32* %7
ret i32 %25
}

LLVM IR (-O2):
define i32 @adr0indreg1(i32 %0, i32 %1, i32 %2, i32 %3, i8* nocapture readnone %4, i8* nocapture %5) {
%7 = load i8, i8* inttoptr (i64 10000000 to i8*)
%8 = load i8, i8* %5
%9 = icmp ule i8 %7, %8
%10 = zext i1 %9 to i32
ret i32 %10
}
void exchange(int a, int b) {
  int tmp = a;
  a = b;
  b = tmp;
}


x86 assembly (clang, -O0):
<exchange>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<exchange>:
ret

LLVM IR (-O0):
define void @exchange(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
store i32 %6, i32* %5
%7 = load i32, i32* %4
store i32 %7, i32* %3
%8 = load i32, i32* %5
store i32 %8, i32* %4
ret void
}

LLVM IR (-O2):
define void @exchange(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
int getuid();
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ setuid(int /*<<< orphan*/);
int /*<<< orphan*/ sleep(int);
int main() {
  sleep(5);
  setuid(0);
  printf("UID: %d\n", getuid());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x5,%edi
call   1060 <sleep@plt>
xor    %edi,%edi
call   1050 <setuid@plt>
mov    $0x0,%al
call   1030 <getuid@plt>
mov    %eax,%esi
lea    0xe90(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
call   1060 <sleep@plt>
xor    %edi,%edi
call   1050 <setuid@plt>
xor    %eax,%eax
call   1030 <getuid@plt>
lea    0xea0(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"UID: %d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @sleep(i32 5)
%3 = call i32 @setuid(i32 0)
%4 = call i32 (...) @getuid()
%5 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"UID: %d\0A\00"
define i32 @main() {
%1 = tail call i32 @sleep(i32 5)
%2 = tail call i32 @setuid(i32 0)
%3 = tail call i32 (...) @getuid()
%4 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *fopen(char *, char *);
FILE *createFile(char name[]) { return fopen(name, "wb+"); }


x86 assembly (clang, -O0):
<createFile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fopen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<createFile>:
lea    0xee9(%rip),%rsi
jmp    1030 <fopen@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"wb+\00"
define i32* @createFile(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32* @fopen(i8* %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i32* %4
}

LLVM IR (-O2):
@.str = [4 x i8] c"wb+\00"
define noalias i32* @createFile(i8* nocapture %0) {
%2 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i32* %2
}
/* Variables and functions */
unsigned long syscall(int, void *);
int brk(void *end) { return -(syscall(12, end) != (unsigned long)end); }


x86 assembly (clang, -O0):
<brk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0xc,%edi
call   1030 <syscall@plt>
mov    -0x8(%rbp),%rcx
cmp    %rcx,%rax
setne  %al
and    $0x1,%al
movzbl %al,%ecx
xor    %eax,%eax
sub    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<brk>:
push   %rbx
mov    %rdi,%rbx
mov    $0xc,%edi
mov    %rbx,%rsi
call   1030 <syscall@plt>
xor    %ecx,%ecx
cmp    %rbx,%rax
setne  %cl
neg    %ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @brk(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @syscall(i32 12, i8* %3)
%5 = load i8*, i8** %2
%6 = ptrtoint i8* %5 to i64
%7 = icmp ne i64 %4, %6
%8 = zext i1 %7 to i32
%9 = sub nsw i32 0, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @brk(i8* %0) {
%2 = tail call i64 @syscall(i32 12, i8* %0)
%3 = ptrtoint i8* %0 to i64
%4 = icmp ne i64 %2, %3
%5 = sext i1 %4 to i32
ret i32 %5
}
void SockStartup(void) { return; }


x86 assembly (clang, -O0):
<SockStartup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SockStartup>:
ret

LLVM IR (-O0):
define void @SockStartup() {
ret void
}

LLVM IR (-O2):
define void @SockStartup() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int /*<<< orphan*/ closelog();
void xcloselog(BIO *bp) { closelog(); }


x86 assembly (clang, -O0):
<xcloselog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <closelog@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xcloselog>:
xor    %eax,%eax
jmp    1030 <closelog@plt>

LLVM IR (-O0):
define void @xcloselog(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = call i32 (...) @closelog()
ret void
}

LLVM IR (-O2):
define void @xcloselog(i32* nocapture readnone %0) {
%2 = tail call i32 (...) @closelog()
ret void
}
int fibo(int n) {
  if (n <= 1)
    return n;
  else
    return fibo(n - 1) + fibo(n - 2);
}


x86 assembly (clang, -O0):
<fibo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jg     1130 <fibo+0x20>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1153 <fibo+0x43>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fibo@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fibo@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibo>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x2,%edi
jge    1120 <fibo+0x10>
mov    %ebx,%ecx
jmp    1144 <fibo+0x34>
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    -0x1(%rbx),%edi
call   1030 <fibo@plt>
lea    -0x2(%rbx),%ecx
add    %eax,%ebp
cmp    $0x3,%ebx
mov    %ecx,%ebx
ja     1130 <fibo+0x20>
add    %ecx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fibo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %16
8: ; preds = %1
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 1
%11 = call i32 @fibo(i32 %10)
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 2
%14 = call i32 @fibo(i32 %13)
%15 = add nsw i32 %11, %14
store i32 %15, i32* %2
br label %16
16: ; preds = %8, %6
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @fibo(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fibo(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %9, %3 ]
%13 = phi i32 [ %0, %1 ], [ %8, %3 ]
%14 = add nsw i32 %13, %12
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ memset(char *, int /*<<< orphan*/, size_t);
char *oml_malloc(size_t);
char *oml_stralloc(size_t len) {
  char *ret = oml_malloc(len + 1);
  memset(ret, 0, len + 1);
  return ret;
}


x86 assembly (clang, -O0):
<oml_stralloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x1,%rdi
call   1040 <oml_malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rdx
add    $0x1,%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<oml_stralloc>:
push   %r14
push   %rbx
push   %rax
lea    0x1(%rdi),%r14
mov    %r14,%rdi
call   1040 <oml_malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %esi,%esi
mov    %r14,%rdx
call   1030 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @oml_stralloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = add i64 %4, 1
%6 = call i8* @oml_malloc(i64 %5)
store i8* %6, i8** %3
%7 = load i8*, i8** %3
%8 = load i64, i64* %2
%9 = add i64 %8, 1
%10 = call i32 @memset(i8* %7, i32 0, i64 %9)
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
define i8* @oml_stralloc(i64 %0) {
%2 = add i64 %0, 1
%3 = tail call i8* @oml_malloc(i64 %2)
%4 = tail call i32 @memset(i8* %3, i32 0, i64 %2)
ret i8* %3
}
/* Variables and functions */
size_t strlen(const char *str) {
  size_t len = 0;
  while (str[len] != 0) {
    len++;
  }
  return len;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1136 <strlen+0x36>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <strlen+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
mov    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <strlen+0x10>
ret

LLVM IR (-O0):
define i64 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %2
%6 = load i64, i64* %3
%7 = getelementptr inbounds i8, i8* %5, i64 %6
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %4
%12 = load i64, i64* %3
%13 = add i64 %12, 1
store i64 %13, i64* %3
br label %4
14: ; preds = %4
%15 = load i64, i64* %3
ret i64 %15
}

LLVM IR (-O2):
define i64 @strlen(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 0, %1 ], [ %7, %2 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i64 %3
}
void RTMpGetPresentSet(void) {}


x86 assembly (clang, -O0):
<RTMpGetPresentSet>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTMpGetPresentSet>:
ret

LLVM IR (-O0):
define void @RTMpGetPresentSet() {
ret void
}

LLVM IR (-O2):
define void @RTMpGetPresentSet() {
ret void
}
float fastcos(float x) {
  asm("fsin" : "+t"(x));
  return x;
}


x86 assembly (clang, -O0):
<fastcos>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
flds   -0x8(%rbp)
fsin
fstps  -0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fastcos>:
movss  %xmm0,-0x4(%rsp)
flds   -0x4(%rsp)
fsin
fstps  -0x8(%rsp)
movss  -0x8(%rsp),%xmm0
ret

LLVM IR (-O0):
define float @fastcos(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float asm "fsin", "={st},0,~{dirflag},~{fpsr},~{flags}"(float %3)
store float %4, float* %2
%5 = load float, float* %2
ret float %5
}

LLVM IR (-O2):
define float @fastcos(float %0) {
%2 = tail call float asm "fsin", "={st},0,~{dirflag},~{fpsr},~{flags}"(float %0)
ret float %2
}
int sigma(int num) {
  int soma;
  for (soma = 0; num >= 1; num--)
    soma = soma + num;
  return soma;
}


x86 assembly (clang, -O0):
<sigma>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x1,-0x4(%rbp)
jl     112f <sigma+0x2f>
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <sigma+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigma>:
test   %edi,%edi
jle    1119 <sigma+0x19>
lea    -0x1(%rdi),%eax
lea    -0x2(%rdi),%ecx
imul   %rax,%rcx
imul   %eax,%eax
shr    %rcx
add    %edi,%eax
sub    %ecx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sigma(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i32, i32* %2
%6 = icmp sge i32 %5, 1
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, i32* %3
%9 = load i32, i32* %2
%10 = add nsw i32 %8, %9
store i32 %10, i32* %3
br label %11
11: ; preds = %7
%12 = load i32, i32* %2
%13 = add nsw i32 %12, -1
store i32 %13, i32* %2
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @sigma(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %14
3: ; preds = %1
%4 = add nsw i32 %0, -1
%5 = mul i32 %4, %4
%6 = zext i32 %4 to i33
%7 = add nsw i32 %0, -2
%8 = zext i32 %7 to i33
%9 = mul i33 %6, %8
%10 = lshr i33 %9, 1
%11 = trunc i33 %10 to i32
%12 = add i32 %5, %0
%13 = sub i32 %12, %11
br label %14
14: ; preds = %3, %1
%15 = phi i32 [ 0, %1 ], [ %13, %3 ]
ret i32 %15
}
void a(int y) { int z = y; }


x86 assembly (clang, -O0):
<a>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<a>:
ret

LLVM IR (-O0):
define void @a(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
ret void
}

LLVM IR (-O2):
define void @a(i32 %0) {
ret void
}
void *id3(void *v1, void *v2, void *v3) { return v3; }


x86 assembly (clang, -O0):
<id3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<id3>:
mov    %rdx,%rax
ret

LLVM IR (-O0):
define i8* @id3(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
ret i8* %7
}

LLVM IR (-O2):
define i8* @id3(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* readnone returned %2) {
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ eris_low_sup_setup_dma(int /*<<< orphan*/, int,
                                          int /*<<< orphan*/,
                                          int /*<<< orphan*/,
                                          int /*<<< orphan*/,
                                          int /*<<< orphan*/);
void barf(void) { eris_low_sup_setup_dma(0, 1, 0, 0, 0, 0); }


x86 assembly (clang, -O0):
<barf>:
push   %rbp
mov    %rsp,%rbp
xor    %r9d,%r9d
mov    $0x1,%esi
mov    %r9d,%edi
mov    %r9d,%edx
mov    %r9d,%ecx
mov    %r9d,%r8d
call   1030 <eris_low_sup_setup_dma@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<barf>:
xor    %edi,%edi
mov    $0x1,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <eris_low_sup_setup_dma@plt>

LLVM IR (-O0):
define void @barf() {
%1 = call i32 @eris_low_sup_setup_dma(i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @barf() {
%1 = tail call i32 @eris_low_sup_setup_dma(i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
ret void
}
void imap_main_init(void) {}


x86 assembly (clang, -O0):
<imap_main_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<imap_main_init>:
ret

LLVM IR (-O0):
define void @imap_main_init() {
ret void
}

LLVM IR (-O2):
define void @imap_main_init() {
ret void
}
int gcd(int n, int m) {
  if (n > m) {
    int t = n;
    n = m;
    m = t;
  }
  while (n != 0) {
    int r = m % n;
    m = n;
    n = r;
  }
  return m;
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1128 <gcd+0x28>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    112d <gcd+0x2d>
cmpl   $0x0,-0x4(%rbp)
je     1152 <gcd+0x52>
mov    -0x8(%rbp),%eax
cltd
idivl  -0x4(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    112d <gcd+0x2d>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %edi,%edx
cmp    %esi,%edi
mov    %esi,%eax
cmovg  %edi,%eax
cmovg  %esi,%edx
test   %edx,%edx
je     111d <gcd+0x1d>
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = icmp sgt i32 %7, %8
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = load i32, i32* %3
store i32 %11, i32* %5
%12 = load i32, i32* %4
store i32 %12, i32* %3
%13 = load i32, i32* %5
store i32 %13, i32* %4
br label %14
14: ; preds = %10, %2
br label %15
15: ; preds = %18, %14
%16 = load i32, i32* %3
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %24
18: ; preds = %15
%19 = load i32, i32* %4
%20 = load i32, i32* %3
%21 = srem i32 %19, %20
store i32 %21, i32* %6
%22 = load i32, i32* %3
store i32 %22, i32* %4
%23 = load i32, i32* %6
store i32 %23, i32* %3
br label %15
24: ; preds = %15
%25 = load i32, i32* %4
ret i32 %25
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
%5 = select i1 %3, i32 %1, i32 %0
%6 = icmp eq i32 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %2, %7
%8 = phi i32 [ %10, %7 ], [ %5, %2 ]
%9 = phi i32 [ %8, %7 ], [ %4, %2 ]
%10 = srem i32 %9, %8
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %7
12: ; preds = %7, %2
%13 = phi i32 [ %4, %2 ], [ %8, %7 ]
ret i32 %13
}
/* Type definitions */
struct tcb {
  int dummy;
};

/* Variables and functions */
int sys_accept(struct tcb *);
int sys_getpeername(struct tcb *tcp) { return sys_accept(tcp); }


x86 assembly (clang, -O0):
<sys_getpeername>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <sys_accept@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_getpeername>:
jmp    1030 <sys_accept@plt>

LLVM IR (-O0):
%struct.tcb = type { i32 }
define i32 @sys_getpeername(%struct.tcb* %0) {
%2 = alloca %struct.tcb*
store %struct.tcb* %0, %struct.tcb** %2
%3 = load %struct.tcb*, %struct.tcb** %2
%4 = call i32 @sys_accept(%struct.tcb* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.tcb = type { i32 }
define i32 @sys_getpeername(%struct.tcb* %0) {
%2 = tail call i32 @sys_accept(%struct.tcb* %0)
ret i32 %2
}
float atanf(float x) {
  float res;
  asm("fld1\n\t"
      "fpatan"
      : "=t"(res)
      : "0"(x));
  return res;
}


x86 assembly (clang, -O0):
<atanf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
flds   -0xc(%rbp)
fld1
fpatan
fstps  -0x10(%rbp)
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<atanf>:
movss  %xmm0,-0x4(%rsp)
flds   -0x4(%rsp)
fld1
fpatan
fstps  -0x8(%rsp)
movss  -0x8(%rsp),%xmm0
ret

LLVM IR (-O0):
define float @atanf(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = call float asm "fld1\0A\09fpatan", "={st},0,~{dirflag},~{fpsr},~{flags}"(float %4)
store float %5, float* %3
%6 = load float, float* %3
ret float %6
}

LLVM IR (-O2):
define float @atanf(float %0) {
%2 = tail call float asm "fld1\0A\09fpatan", "={st},0,~{dirflag},~{fpsr},~{flags}"(float %0)
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int system(char *);
int main(void) {
  int ret;
  ret = system("ps aux");
  printf("ps returned %d\n", ret);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <system@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xebf(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <system@plt>
lea    0xed3(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"ps aux\00"
@.str.1 = [16 x i8] c"ps returned %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @system(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"ps aux\00"
@.str.1 = [16 x i8] c"ps returned %d\0A\00"
define i32 @main() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, void (*)());
void foo() { printf("&foo=%p\n", &foo); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    0x2ec6(%rip),%rsi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
lea    0xee9(%rip),%rdi
mov    0x2eca(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"&foo=%p\0A\00"
define void @foo() {
%1 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), void (...)* bitcast (void ()* @foo to void (...)*))
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"&foo=%p\0A\00"
define void @foo() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), void (...)* bitcast (void ()* @foo to void (...)*))
ret void
}
double degtorad(double deg) {
  double tmp = (deg * 3.141593e+0) / 180.000000;
  return tmp;
}


x86 assembly (clang, -O0):
<degtorad>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xee2(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<degtorad>:
mulsd  0xef8(%rip),%xmm0
divsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @degtorad(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fmul double %4, 0x400921FB82C2BD7F
%6 = fdiv double %5, 1.800000e+02
store double %6, double* %3
%7 = load double, double* %3
ret double %7
}

LLVM IR (-O2):
define double @degtorad(double %0) {
%2 = fmul double %0, 0x400921FB82C2BD7F
%3 = fdiv double %2, 1.800000e+02
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ bar();
void func4() {
  int i = 0;
  while (i++ < 10)
    if (i < 5)
      bar();
}


x86 assembly (clang, -O0):
<func4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0xa,%eax
jge    1149 <func4+0x39>
cmpl   $0x5,-0x4(%rbp)
jge    1144 <func4+0x34>
mov    $0x0,%al
call   1030 <bar@plt>
jmp    111f <func4+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func4>:
push   %rax
xor    %eax,%eax
call   1030 <bar@plt>
xor    %eax,%eax
call   1030 <bar@plt>
xor    %eax,%eax
call   1030 <bar@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <bar@plt>

LLVM IR (-O0):
define void @func4() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %11, %0
%3 = load i32, i32* %1
%4 = add nsw i32 %3, 1
store i32 %4, i32* %1
%5 = icmp slt i32 %3, 10
br i1 %5, label %6, label %12
6: ; preds = %2
%7 = load i32, i32* %1
%8 = icmp slt i32 %7, 5
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = call i32 (...) @bar()
br label %11
11: ; preds = %9, %6
br label %2
12: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @func4() {
%1 = tail call i32 (...) @bar()
%2 = tail call i32 (...) @bar()
%3 = tail call i32 (...) @bar()
%4 = tail call i32 (...) @bar()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ flusho();
int /*<<< orphan*/ read(int, char *, int);
dostop() {
  char junk;
  flusho();
  read(2, &junk, 1);
}


x86 assembly (clang, -O0):
<dostop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <flusho@plt>
mov    $0x2,%edi
lea    -0x5(%rbp),%rsi
mov    $0x1,%edx
call   1030 <read@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dostop>:
push   %rax
xor    %eax,%eax
call   1040 <flusho@plt>
lea    0x7(%rsp),%rsi
mov    $0x2,%edi
mov    $0x1,%edx
call   1030 <read@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @dostop() {
%1 = alloca i32
%2 = alloca i8
%3 = call i32 (...) @flusho()
%4 = call i32 @read(i32 2, i8* %2, i32 1)
%5 = load i32, i32* %1
ret i32 %5
}

LLVM IR (-O2):
define i32 @dostop() {
%1 = alloca i8
%2 = tail call i32 (...) @flusho()
%3 = call i32 @read(i32 2, i8* %1, i32 1)
ret i32 undef
}
/* Variables and functions */
int do_some_job(int, int, int, int);
int prologue_epilogue_8(int a0, int a1, int a2, int a3, int a4, int a5, int a6,
                        int a7) {
  int v0, v1;
  v0 = do_some_job(a0, a1, a2, a3);
  v1 = do_some_job(a4, a5, a6, a7);
  return v0 + v1;
}


x86 assembly (clang, -O0):
<prologue_epilogue_8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1030 <do_some_job@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x18(%rbp),%esi
mov    0x10(%rbp),%edx
mov    0x18(%rbp),%ecx
call   1030 <do_some_job@plt>
mov    %eax,-0x20(%rbp)
mov    -0x1c(%rbp),%eax
add    -0x20(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prologue_epilogue_8>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %r9d,%r12d
mov    %r8d,%ebp
mov    0x30(%rsp),%r14d
mov    0x38(%rsp),%r15d
call   1030 <do_some_job@plt>
mov    %eax,%ebx
mov    %ebp,%edi
mov    %r12d,%esi
mov    %r14d,%edx
mov    %r15d,%ecx
call   1030 <do_some_job@plt>
add    %ebx,%eax
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @prologue_epilogue_8(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) {
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
%17 = alloca i32
%18 = alloca i32
store i32 %0, i32* %9
store i32 %1, i32* %10
store i32 %2, i32* %11
store i32 %3, i32* %12
store i32 %4, i32* %13
store i32 %5, i32* %14
store i32 %6, i32* %15
store i32 %7, i32* %16
%19 = load i32, i32* %9
%20 = load i32, i32* %10
%21 = load i32, i32* %11
%22 = load i32, i32* %12
%23 = call i32 @do_some_job(i32 %19, i32 %20, i32 %21, i32 %22)
store i32 %23, i32* %17
%24 = load i32, i32* %13
%25 = load i32, i32* %14
%26 = load i32, i32* %15
%27 = load i32, i32* %16
%28 = call i32 @do_some_job(i32 %24, i32 %25, i32 %26, i32 %27)
store i32 %28, i32* %18
%29 = load i32, i32* %17
%30 = load i32, i32* %18
%31 = add nsw i32 %29, %30
ret i32 %31
}

LLVM IR (-O2):
define i32 @prologue_epilogue_8(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) {
%9 = tail call i32 @do_some_job(i32 %0, i32 %1, i32 %2, i32 %3)
%10 = tail call i32 @do_some_job(i32 %4, i32 %5, i32 %6, i32 %7)
%11 = add nsw i32 %10, %9
ret i32 %11
}
int __attribute__((__no__)) test_gt(__float128 x, __float128 y) {
  return x > y;
}


x86 assembly (clang, -O0):
<test_gt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movaps %xmm0,-0x10(%rbp)
movaps %xmm1,-0x20(%rbp)
movaps -0x10(%rbp),%xmm0
movaps -0x20(%rbp),%xmm1
call   1130 <__getf2>
test   %eax,%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret
nopl   (%rax)

x86 assembly (clang, -O2):
<test_gt>:
push   %rax
call   1120 <__getf2>
xor    %ecx,%ecx
test   %eax,%eax
setg   %cl
mov    %ecx,%eax
pop    %rcx
ret
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)

LLVM IR (-O0):
define i32 @test_gt(fp128 %0, fp128 %1) {
%3 = alloca fp128
%4 = alloca fp128
store fp128 %0, fp128* %3
store fp128 %1, fp128* %4
%5 = load fp128, fp128* %3
%6 = load fp128, fp128* %4
%7 = fcmp ogt fp128 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_gt(fp128 %0, fp128 %1) {
%3 = fcmp ogt fp128 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}