xunge/DecIR huggingface dataset:
/* Type definitions */
struct AttachBuff {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct AttachBuff *);
void AttachBuff_Destroy(struct AttachBuff *self) {
  do {
    if (self != 0)
      free(self);
  } while (0);
}


x86 assembly (clang, -O0):
<AttachBuff_Destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <AttachBuff_Destroy+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
jmp    1135 <AttachBuff_Destroy+0x25>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AttachBuff_Destroy>:
test   %rdi,%rdi
je     111a <AttachBuff_Destroy+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
%struct.AttachBuff = type { i32 }
define void @AttachBuff_Destroy(%struct.AttachBuff* %0) {
%2 = alloca %struct.AttachBuff*
store %struct.AttachBuff* %0, %struct.AttachBuff** %2
br label %3
3: ; preds = %1
%4 = load %struct.AttachBuff*, %struct.AttachBuff** %2
%5 = icmp ne %struct.AttachBuff* %4, null
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load %struct.AttachBuff*, %struct.AttachBuff** %2
%8 = call i32 @free(%struct.AttachBuff* %7)
br label %9
9: ; preds = %6, %3
br label %10
10: ; preds = %9
ret void
}

LLVM IR (-O2):
%struct.AttachBuff = type { i32 }
define void @AttachBuff_Destroy(%struct.AttachBuff* %0) {
%2 = icmp eq %struct.AttachBuff* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(%struct.AttachBuff* %0)
br label %5
5: ; preds = %1, %3
ret void
}
void im_a_minion_02(void) {}


x86 assembly (clang, -O0):
<im_a_minion_02>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<im_a_minion_02>:
ret

LLVM IR (-O0):
define void @im_a_minion_02() {
ret void
}

LLVM IR (-O2):
define void @im_a_minion_02() {
ret void
}
int log2overhead(int first_term, int num_terms) {
  if (first_term > 8)
    return (8 + num_terms * 3) << 11;
  else
    return (4 + num_terms * 3) << 11;
}


x86 assembly (clang, -O0):
<log2overhead>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x8,-0x8(%rbp)
jle    1126 <log2overhead+0x26>
imul   $0x3,-0xc(%rbp),%eax
add    $0x8,%eax
shl    $0xb,%eax
mov    %eax,-0x4(%rbp)
jmp    1133 <log2overhead+0x33>
imul   $0x3,-0xc(%rbp),%eax
add    $0x4,%eax
shl    $0xb,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<log2overhead>:
xor    %eax,%eax
cmp    $0x9,%edi
setge  %al
lea    (%rsi,%rsi,2),%ecx
shl    $0xb,%ecx
shl    $0xd,%eax
add    %ecx,%eax
add    $0x2000,%eax
ret

LLVM IR (-O0):
define i32 @log2overhead(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 8
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load i32, i32* %5
%10 = mul nsw i32 %9, 3
%11 = add nsw i32 8, %10
%12 = shl i32 %11, 11
store i32 %12, i32* %3
br label %18
13: ; preds = %2
%14 = load i32, i32* %5
%15 = mul nsw i32 %14, 3
%16 = add nsw i32 4, %15
%17 = shl i32 %16, 11
store i32 %17, i32* %3
br label %18
18: ; preds = %13, %8
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @log2overhead(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, 8
%4 = mul i32 %1, 6144
%5 = select i1 %3, i32 16384, i32 8192
%6 = add i32 %4, %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int n = 1000;
  int s = 0;
  int i = n;
  while (!(i <= 0)) {
    s = s + i;
    i = i - 1;
  }
  printf("%d;", s);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x3e8,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
setle  %al
xor    $0xff,%al
test   $0x1,%al
jne    1149 <main+0x39>
jmp    1160 <main+0x50>
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1133 <main+0x23>
mov    -0xc(%rbp),%esi
lea    0xe96(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x7a314,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d;\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 1000, i32* %2
store i32 0, i32* %3
%5 = load i32, i32* %2
store i32 %5, i32* %4
br label %6
6: ; preds = %10, %0
%7 = load i32, i32* %4
%8 = icmp sle i32 %7, 0
%9 = xor i1 %8, true
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = add nsw i32 %11, %12
store i32 %13, i32* %3
%14 = load i32, i32* %4
%15 = sub nsw i32 %14, 1
store i32 %15, i32* %4
br label %6
16: ; preds = %6
%17 = load i32, i32* %3
%18 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %17)
%19 = load i32, i32* %1
ret i32 %19
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d;\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 500500)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ memmove(int *, int *, int);
void copy_imatrix(int **dst, int **src, int nr, int nc) {
  memmove(dst[0], src[0], sizeof(int) * nr * nc);
}


x86 assembly (clang, -O0):
<copy_imatrix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
movslq -0x14(%rbp),%rax
shl    $0x2,%rax
movslq -0x18(%rbp),%rcx
imul   %rcx,%rax
mov    %eax,%edx
call   1030 <memmove@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_imatrix>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
imul   %ecx,%edx
shl    $0x2,%edx
jmp    1030 <memmove@plt>

LLVM IR (-O0):
define void @copy_imatrix(i32** %0, i32** %1, i32 %2, i32 %3) {
%5 = alloca i32**
%6 = alloca i32**
%7 = alloca i32
%8 = alloca i32
store i32** %0, i32*** %5
store i32** %1, i32*** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32**, i32*** %5
%10 = getelementptr inbounds i32*, i32** %9, i64 0
%11 = load i32*, i32** %10
%12 = load i32**, i32*** %6
%13 = getelementptr inbounds i32*, i32** %12, i64 0
%14 = load i32*, i32** %13
%15 = load i32, i32* %7
%16 = sext i32 %15 to i64
%17 = mul i64 4, %16
%18 = load i32, i32* %8
%19 = sext i32 %18 to i64
%20 = mul i64 %17, %19
%21 = trunc i64 %20 to i32
%22 = call i32 @memmove(i32* %11, i32* %14, i32 %21)
ret void
}

LLVM IR (-O2):
define void @copy_imatrix(i32** nocapture %0, i32** nocapture %1, i32 %2, i32 %3) {
%5 = load i32*, i32** %0
%6 = load i32*, i32** %1
%7 = shl i32 %2, 2
%8 = mul i32 %7, %3
%9 = tail call i32 @memmove(i32* %5, i32* %6, i32 %8)
ret void
}
void qcom_smem_state_unregister(struct qcom_smem_state *state) {}


x86 assembly (clang, -O0):
<qcom_smem_state_unregister>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<qcom_smem_state_unregister>:
ret

LLVM IR (-O0):
%struct.qcom_smem_state = type opaque
define void @qcom_smem_state_unregister(%struct.qcom_smem_state* %0) {
%2 = alloca %struct.qcom_smem_state*
store %struct.qcom_smem_state* %0, %struct.qcom_smem_state** %2
ret void
}

LLVM IR (-O2):
%struct.qcom_smem_state = type opaque
define void @qcom_smem_state_unregister(%struct.qcom_smem_state* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ saa7114_write_reg(int, unsigned char);
int saa7114_set_decoder_contrast(unsigned char contrast) {
  saa7114_write_reg(0x0B, (unsigned char)(contrast >> 1));
  return (0);
}


x86 assembly (clang, -O0):
<saa7114_set_decoder_contrast>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
sar    $0x1,%eax
mov    $0xb,%edi
movzbl %al,%esi
call   1030 <saa7114_write_reg@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<saa7114_set_decoder_contrast>:
push   %rax
shr    %dil
movzbl %dil,%esi
mov    $0xb,%edi
call   1030 <saa7114_write_reg@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @saa7114_set_decoder_contrast(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = ashr i32 %4, 1
%6 = trunc i32 %5 to i8
%7 = call i32 @saa7114_write_reg(i32 11, i8 zeroext %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @saa7114_set_decoder_contrast(i8 zeroext %0) {
%2 = lshr i8 %0, 1
%3 = tail call i32 @saa7114_write_reg(i32 11, i8 zeroext %2)
ret i32 0
}
/* Variables and functions */
scalar_t__ gumbo_malloc(size_t);
int /*<<< orphan*/ memcpy(char *, char const *, size_t);
int strlen(char const *);
char *gumbo_strdup(const char *str) {
  size_t len = strlen(str) + 1;
  char *copy = (char *)gumbo_malloc(len);
  memcpy(copy, str, len);
  return copy;
}


x86 assembly (clang, -O0):
<gumbo_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <gumbo_malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gumbo_strdup>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
add    $0x1,%eax
movslq %eax,%r15
mov    %r15,%rdi
call   1050 <gumbo_malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1040 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @gumbo_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = add nsw i32 %6, 1
%8 = sext i32 %7 to i64
store i64 %8, i64* %3
%9 = load i64, i64* %3
%10 = call i64 @gumbo_malloc(i64 %9)
%11 = inttoptr i64 %10 to i8*
store i8* %11, i8** %4
%12 = load i8*, i8** %4
%13 = load i8*, i8** %2
%14 = load i64, i64* %3
%15 = call i32 @memcpy(i8* %12, i8* %13, i64 %14)
%16 = load i8*, i8** %4
ret i8* %16
}

LLVM IR (-O2):
define i8* @gumbo_strdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = sext i32 %3 to i64
%5 = tail call i64 @gumbo_malloc(i64 %4)
%6 = inttoptr i64 %5 to i8*
%7 = tail call i32 @memcpy(i8* %6, i8* %0, i64 %4)
ret i8* %6
}
void console_final(void) {}


x86 assembly (clang, -O0):
<console_final>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<console_final>:
ret

LLVM IR (-O0):
define void @console_final() {
ret void
}

LLVM IR (-O2):
define void @console_final() {
ret void
}
void PinHysteresisSet(unsigned long ulHysteresis) {
  unsigned long ulRegValue;
  ulRegValue = ((*((volatile unsigned long *)(0x4402E000 + 0x00000144))) &
                ~(0x0000001C));
  if (ulHysteresis != 0x00000000) {
    ulRegValue |= (ulHysteresis & 0x0000001C);
  }
  (*((volatile unsigned long *)(0x4402E000 + 0x00000144))) = ulRegValue;
}


x86 assembly (clang, -O0):
<PinHysteresisSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x4402e144,%eax
mov    (%rax),%rax
and    $0xffffffffffffffe3,%rax
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1133 <PinHysteresisSet+0x33>
mov    -0x8(%rbp),%rax
and    $0x1c,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    $0x4402e144,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PinHysteresisSet>:
mov    0x4402e144,%rax
44
and    $0xffffffffffffffe3,%rax
and    $0x1c,%edi
or     %rax,%rdi
mov    %rdi,0x4402e144
44
ret

LLVM IR (-O0):
define void @PinHysteresisSet(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 1141039428 to i64*)
%5 = and i64 %4, -29
store i64 %5, i64* %3
%6 = load i64, i64* %2
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %1
%9 = load i64, i64* %2
%10 = and i64 %9, 28
%11 = load i64, i64* %3
%12 = or i64 %11, %10
store i64 %12, i64* %3
br label %13
13: ; preds = %8, %1
%14 = load i64, i64* %3
store volatile i64 %14, i64* inttoptr (i64 1141039428 to i64*)
ret void
}

LLVM IR (-O2):
define void @PinHysteresisSet(i64 %0) {
%2 = load volatile i64, i64* inttoptr (i64 1141039428 to i64*)
%3 = and i64 %2, -29
%4 = and i64 %0, 28
%5 = or i64 %3, %4
store volatile i64 %5, i64* inttoptr (i64 1141039428 to i64*)
ret void
}
/* Variables and functions */
int round1_a();
int public_func() { return round1_a(); }


x86 assembly (clang, -O0):
<public_func>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <round1_a@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<public_func>:
xor    %eax,%eax
jmp    1030 <round1_a@plt>

LLVM IR (-O0):
define i32 @public_func() {
%1 = call i32 (...) @round1_a()
ret i32 %1
}

LLVM IR (-O2):
define i32 @public_func() {
%1 = tail call i32 (...) @round1_a()
ret i32 %1
}
/* Type definitions */
typedef scalar_t__ int64_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ close(int);
int32_t tcp_close(int64_t sockfd) { return (int32_t)close((int)sockfd); }


x86 assembly (clang, -O0):
<tcp_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcp_close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define i32 @tcp_close(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
%5 = call i32 @close(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @tcp_close(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = tail call i32 @close(i32 %2)
ret i32 %3
}
void f135(void) {
  ({
    ({ 0; });
    ({ 0; });
    0;
  });
  ({
    ({ 0; });
    goto a;
  a:
    ({ 0; });
    0;
  });
  0;
}


x86 assembly (clang, -O0):
<f135>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f135>:
ret

LLVM IR (-O0):
define void @f135() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 0, i32* %1
%7 = load i32, i32* %1
store i32 0, i32* %2
%8 = load i32, i32* %2
store i32 0, i32* %3
%9 = load i32, i32* %3
store i32 0, i32* %4
%10 = load i32, i32* %4
br label %11
11: ; preds = %0
store i32 0, i32* %5
%12 = load i32, i32* %5
store i32 0, i32* %6
%13 = load i32, i32* %6
ret void
}

LLVM IR (-O2):
define void @f135() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free_string(char *);
int /*<<< orphan*/ strcpy(char *, char *);
char *valid_ipv4(char *);
void valid_ipv4_c(char *userInput, char *buf) {
  char *result = valid_ipv4(userInput);
  strcpy(buf, result);
  free_string(result);
}


x86 assembly (clang, -O0):
<valid_ipv4_c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <valid_ipv4@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rdi
call   1050 <free_string@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<valid_ipv4_c>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
call   1040 <valid_ipv4@plt>
mov    %rax,%rbx
mov    %r14,%rdi
mov    %rax,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1050 <free_string@plt>

LLVM IR (-O0):
define void @valid_ipv4_c(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i8* @valid_ipv4(i8* %6)
store i8* %7, i8** %5
%8 = load i8*, i8** %4
%9 = load i8*, i8** %5
%10 = call i32 @strcpy(i8* %8, i8* %9)
%11 = load i8*, i8** %5
%12 = call i32 @free_string(i8* %11)
ret void
}

LLVM IR (-O2):
define void @valid_ipv4_c(i8* %0, i8* %1) {
%3 = tail call i8* @valid_ipv4(i8* %0)
%4 = tail call i32 @strcpy(i8* %1, i8* %3)
%5 = tail call i32 @free_string(i8* %3)
ret void
}
/* Variables and functions */
scalar_t__ LONG_MAX;
int can_add_ulong_within(unsigned long const, unsigned long const,
                         unsigned long);
int can_add_within_long(const unsigned long x, const unsigned long y) {
  return can_add_ulong_within(x, y, (unsigned long)LONG_MAX);
}


x86 assembly (clang, -O0):
<can_add_within_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2eb1(%rip),%rax
mov    (%rax),%rdx
call   1030 <can_add_ulong_within@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<can_add_within_long>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%rdx
jmp    1030 <can_add_ulong_within@plt>

LLVM IR (-O0):
@LONG_MAX = global i64 0
define i32 @can_add_within_long(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = load i64, i64* @LONG_MAX
%8 = call i32 @can_add_ulong_within(i64 %5, i64 %6, i64 %7)
ret i32 %8
}

LLVM IR (-O2):
@LONG_MAX = global i64 0
define i32 @can_add_within_long(i64 %0, i64 %1) {
%3 = load i64, i64* @LONG_MAX
%4 = tail call i32 @can_add_ulong_within(i64 %0, i64 %1, i64 %3)
ret i32 %4
}
/* Variables and functions */
int g_utf8_collate(char const *, char const *);
int nm_utf8_collate0(const char *a, const char *b) {
  if (!a)
    return !b ? 0 : -1;
  if (!b)
    return 1;
  return g_utf8_collate(a, b);
}


x86 assembly (clang, -O0):
<nm_utf8_collate0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114b <nm_utf8_collate0+0x3b>
cmpq   $0x0,-0x18(%rbp)
setne  %dl
xor    $0xff,%dl
mov    $0xffffffff,%eax
xor    %ecx,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    1172 <nm_utf8_collate0+0x62>
cmpq   $0x0,-0x18(%rbp)
jne    1162 <nm_utf8_collate0+0x52>
movl   $0x1,-0x4(%rbp)
jmp    1172 <nm_utf8_collate0+0x62>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <g_utf8_collate@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nm_utf8_collate0>:
test   %rdi,%rdi
je     111f <nm_utf8_collate0+0xf>
test   %rsi,%rsi
je     1125 <nm_utf8_collate0+0x15>
jmp    1030 <g_utf8_collate@plt>
neg    %rsi
sbb    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @nm_utf8_collate0(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %14, label %8
8: ; preds = %2
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
%11 = xor i1 %10, true
%12 = zext i1 %11 to i64
%13 = select i1 %11, i32 0, i32 -1
store i32 %13, i32* %3
br label %22
14: ; preds = %2
%15 = load i8*, i8** %5
%16 = icmp ne i8* %15, null
br i1 %16, label %18, label %17
17: ; preds = %14
store i32 1, i32* %3
br label %22
18: ; preds = %14
%19 = load i8*, i8** %4
%20 = load i8*, i8** %5
%21 = call i32 @g_utf8_collate(i8* %19, i8* %20)
store i32 %21, i32* %3
br label %22
22: ; preds = %18, %17, %8
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @nm_utf8_collate0(i8* %0, i8* %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = icmp ne i8* %1, null
%6 = sext i1 %5 to i32
br label %11
7: ; preds = %2
%8 = icmp eq i8* %1, null
br i1 %8, label %11, label %9
9: ; preds = %7
%10 = tail call i32 @g_utf8_collate(i8* %0, i8* %1)
br label %11
11: ; preds = %7, %9, %4
%12 = phi i32 [ %10, %9 ], [ %6, %4 ], [ 1, %7 ]
ret i32 %12
}
int test_imm_14int32_mem(int *val) {
  return ((*val) & (0x14 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_14int32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x14,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_14int32_mem>:
testb  $0x14,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_14int32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 20
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_14int32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 20
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
unsigned int IWM_SCD_QUEUE_STATUS_BITS(unsigned int chnl) {
  if (chnl < 20)
    return ((0x00000) + 0xa02c00) + 0x10c + chnl * 4;
  return ((0x00000) + 0xa02c00) + 0x384 + (chnl - 20) * 4;
}


x86 assembly (clang, -O0):
<IWM_SCD_QUEUE_STATUS_BITS>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x14,-0x8(%rbp)
jae    1124 <IWM_SCD_QUEUE_STATUS_BITS+0x24>
mov    -0x8(%rbp),%eax
shl    $0x2,%eax
add    $0xa02d0c,%eax
mov    %eax,-0x4(%rbp)
jmp    1135 <IWM_SCD_QUEUE_STATUS_BITS+0x35>
mov    -0x8(%rbp),%eax
sub    $0x14,%eax
shl    $0x2,%eax
add    $0xa02f84,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IWM_SCD_QUEUE_STATUS_BITS>:
cmp    $0x14,%edi
lea    0xa02d0c(,%rdi,4),%ecx
lea    0xa02f34(,%rdi,4),%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @IWM_SCD_QUEUE_STATUS_BITS(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ult i32 %4, 20
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = mul i32 %7, 4
%9 = add i32 10497292, %8
store i32 %9, i32* %2
br label %15
10: ; preds = %1
%11 = load i32, i32* %3
%12 = sub i32 %11, 20
%13 = mul i32 %12, 4
%14 = add i32 10497924, %13
store i32 %14, i32* %2
br label %15
15: ; preds = %10, %6
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @IWM_SCD_QUEUE_STATUS_BITS(i32 %0) {
%2 = icmp ult i32 %0, 20
%3 = shl i32 %0, 2
%4 = select i1 %2, i32 10497292, i32 10497844
%5 = add i32 %4, %3
ret i32 %5
}
void foo521() {}


x86 assembly (clang, -O0):
<foo521>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo521>:
ret

LLVM IR (-O0):
define void @foo521() {
ret void
}

LLVM IR (-O2):
define void @foo521() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print_binary(int);
int /*<<< orphan*/ printf(char *);
int main(void) {
  print_binary(0);
  printf("\n");
  print_binary(1);
  printf("\n");
  print_binary(98);
  printf("\n");
  print_binary(1024);
  printf("\n");
  print_binary((1 << 10) + 1);
  printf("\n");
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1040 <print_binary@plt>
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <print_binary@plt>
lea    0xead(%rip),%rdi
call   1030 <printf@plt>
mov    $0x62,%edi
call   1040 <print_binary@plt>
lea    0xe97(%rip),%rdi
call   1030 <printf@plt>
mov    $0x400,%edi
call   1040 <print_binary@plt>
lea    0xe81(%rip),%rdi
call   1030 <printf@plt>
mov    $0x401,%edi
call   1040 <print_binary@plt>
lea    0xe6b(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <print_binary@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0x1,%edi
call   1040 <print_binary@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0x62,%edi
call   1040 <print_binary@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0x400,%edi
call   1040 <print_binary@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0x401,%edi
call   1040 <print_binary@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @print_binary(i32 0)
%3 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @print_binary(i32 1)
%5 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @print_binary(i32 98)
%7 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @print_binary(i32 1024)
%9 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%10 = call i32 @print_binary(i32 1025)
%11 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @print_binary(i32 0)
%2 = tail call i32 @putchar(i32 10)
%3 = tail call i32 @print_binary(i32 1)
%4 = tail call i32 @putchar(i32 10)
%5 = tail call i32 @print_binary(i32 98)
%6 = tail call i32 @putchar(i32 10)
%7 = tail call i32 @print_binary(i32 1024)
%8 = tail call i32 @putchar(i32 10)
%9 = tail call i32 @print_binary(i32 1025)
%10 = tail call i32 @putchar(i32 10)
ret i32 0
}
/* Variables and functions */
int strcasecmp(char *, char *);
int ary_cb_strcasecmp(const void *a, const void *b) {
  return strcasecmp(*(char **)a, *(char **)b);
}


x86 assembly (clang, -O0):
<ary_cb_strcasecmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcasecmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ary_cb_strcasecmp>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcasecmp@plt>

LLVM IR (-O0):
define i32 @ary_cb_strcasecmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i8**
%7 = load i8*, i8** %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i8**
%10 = load i8*, i8** %9
%11 = call i32 @strcasecmp(i8* %7, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @ary_cb_strcasecmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @strcasecmp(i8* %4, i8* %6)
ret i32 %7
}
/* Type definitions */
struct timespec {
  int dummy;
};
typedef int /*<<< orphan*/ clockid_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int __clock_settime(clockid_t clock_id, const struct timespec *tp) {
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<__clock_settime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__clock_settime>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
@ENOSYS = global i32 0
define i32 @__clock_settime(i32 %0, %struct.timespec* %1) {
%3 = alloca i32
%4 = alloca %struct.timespec*
store i32 %0, i32* %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load i32, i32* @ENOSYS
%6 = call i32 @__set_errno(i32 %5)
ret i32 -1
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@ENOSYS = global i32 0
define i32 @__clock_settime(i32 %0, %struct.timespec* nocapture readnone %1) {
%3 = load i32, i32* @ENOSYS
%4 = tail call i32 @__set_errno(i32 %3)
ret i32 -1
}
long ilog2(unsigned long value) {
  long shift_count = 0;
  if (value == 0)
    return (0);
  if (value == 1)
    return (1);
  value -= 1;
  while (value > 0) {
    shift_count++;
    value = value >> 1;
  }
  return (shift_count);
}


x86 assembly (clang, -O0):
<ilog2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1128 <ilog2+0x28>
movq   $0x0,-0x8(%rbp)
jmp    117c <ilog2+0x7c>
cmpq   $0x1,-0x10(%rbp)
jne    1140 <ilog2+0x40>
movq   $0x1,-0x8(%rbp)
jmp    117c <ilog2+0x7c>
mov    -0x10(%rbp),%rax
sub    $0x1,%rax
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jbe    1174 <ilog2+0x74>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    114c <ilog2+0x4c>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ilog2>:
mov    %rdi,%rax
test   %rdi,%rdi
je     1130 <ilog2+0x30>
cmp    $0x1,%rax
jne    1114 <ilog2+0x14>
mov    $0x1,%eax
ret
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
xor    %eax,%eax
mov    %rcx,%rdx
add    $0x1,%rax
shr    %rdx
cmp    $0x1,%rcx
mov    %rdx,%rcx
ja     1120 <ilog2+0x20>
ret

LLVM IR (-O0):
define i64 @ilog2(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 0, i64* %4
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i64 0, i64* %2
br label %25
8: ; preds = %1
%9 = load i64, i64* %3
%10 = icmp eq i64 %9, 1
br i1 %10, label %11, label %12
11: ; preds = %8
store i64 1, i64* %2
br label %25
12: ; preds = %8
%13 = load i64, i64* %3
%14 = sub i64 %13, 1
store i64 %14, i64* %3
br label %15
15: ; preds = %18, %12
%16 = load i64, i64* %3
%17 = icmp ugt i64 %16, 0
br i1 %17, label %18, label %23
18: ; preds = %15
%19 = load i64, i64* %4
%20 = add nsw i64 %19, 1
store i64 %20, i64* %4
%21 = load i64, i64* %3
%22 = lshr i64 %21, 1
store i64 %22, i64* %3
br label %15
23: ; preds = %15
%24 = load i64, i64* %4
store i64 %24, i64* %2
br label %25
25: ; preds = %23, %11, %7
%26 = load i64, i64* %2
ret i64 %26
}

LLVM IR (-O2):
define i64 @ilog2(i64 %0) {
switch i64 %0, label %3 [
i64 0, label %11
i64 1, label %2
]
2: ; preds = %1
br label %11
3: ; preds = %1
%4 = add i64 %0, -1
br label %5
5: ; preds = %3, %5
%6 = phi i64 [ %8, %5 ], [ 0, %3 ]
%7 = phi i64 [ %9, %5 ], [ %4, %3 ]
%8 = add nuw nsw i64 %6, 1
%9 = lshr i64 %7, 1
%10 = icmp ult i64 %7, 2
br i1 %10, label %11, label %5
11: ; preds = %5, %1, %2
%12 = phi i64 [ 1, %2 ], [ %0, %1 ], [ %8, %5 ]
ret i64 %12
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int x = 2;
  int y = 3;
  int z = 0;
  int n = 0;
  int nn = 0;
  int top;
  if (x + y == 4) {
    z = 3;
  }
  assert(z == 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
movl   $0x3,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
cmp    $0x4,%eax
jne    1158 <main+0x48>
movl   $0x3,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %1
store i32 2, i32* %2
store i32 3, i32* %3
store i32 0, i32* %4
store i32 0, i32* %5
store i32 0, i32* %6
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = add nsw i32 %8, %9
%11 = icmp eq i32 %10, 4
br i1 %11, label %12, label %13
12: ; preds = %0
store i32 3, i32* %4
br label %13
13: ; preds = %12, %0
%14 = load i32, i32* %4
%15 = icmp eq i32 %14, 0
%16 = zext i1 %15 to i32
%17 = call i32 @assert(i32 %16)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
ret i32 0
}
void vector_add_3d(const double v1[3], const double v2[3], double result[3]) {
  result[0] = v1[0] + v2[0];
  result[1] = v1[1] + v2[1];
  result[2] = v1[2] + v2[2];
}


x86 assembly (clang, -O0):
<vector_add_3d>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rax
addsd  (%rax),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x10(%rbp),%rax
addsd  0x8(%rax),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x10(%rbp),%rax
addsd  0x10(%rax),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vector_add_3d>:
movsd  (%rdi),%xmm0
addsd  (%rsi),%xmm0
movsd  %xmm0,(%rdx)
movsd  0x8(%rdi),%xmm0
addsd  0x8(%rsi),%xmm0
movsd  %xmm0,0x8(%rdx)
movsd  0x10(%rdi),%xmm0
addsd  0x10(%rsi),%xmm0
movsd  %xmm0,0x10(%rdx)
ret

LLVM IR (-O0):
define void @vector_add_3d(double* %0, double* %1, double* %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca double*
store double* %0, double** %4
store double* %1, double** %5
store double* %2, double** %6
%7 = load double*, double** %4
%8 = getelementptr inbounds double, double* %7, i64 0
%9 = load double, double* %8
%10 = load double*, double** %5
%11 = getelementptr inbounds double, double* %10, i64 0
%12 = load double, double* %11
%13 = fadd double %9, %12
%14 = load double*, double** %6
%15 = getelementptr inbounds double, double* %14, i64 0
store double %13, double* %15
%16 = load double*, double** %4
%17 = getelementptr inbounds double, double* %16, i64 1
%18 = load double, double* %17
%19 = load double*, double** %5
%20 = getelementptr inbounds double, double* %19, i64 1
%21 = load double, double* %20
%22 = fadd double %18, %21
%23 = load double*, double** %6
%24 = getelementptr inbounds double, double* %23, i64 1
store double %22, double* %24
%25 = load double*, double** %4
%26 = getelementptr inbounds double, double* %25, i64 2
%27 = load double, double* %26
%28 = load double*, double** %5
%29 = getelementptr inbounds double, double* %28, i64 2
%30 = load double, double* %29
%31 = fadd double %27, %30
%32 = load double*, double** %6
%33 = getelementptr inbounds double, double* %32, i64 2
store double %31, double* %33
ret void
}

LLVM IR (-O2):
define void @vector_add_3d(double* nocapture %0, double* nocapture %1, double* nocapture writeonly %2) {
%4 = load double, double* %0
%5 = load double, double* %1
%6 = fadd double %4, %5
store double %6, double* %2
%7 = getelementptr inbounds double, double* %0, i64 1
%8 = load double, double* %7
%9 = getelementptr inbounds double, double* %1, i64 1
%10 = load double, double* %9
%11 = fadd double %8, %10
%12 = getelementptr inbounds double, double* %2, i64 1
store double %11, double* %12
%13 = getelementptr inbounds double, double* %0, i64 2
%14 = load double, double* %13
%15 = getelementptr inbounds double, double* %1, i64 2
%16 = load double, double* %15
%17 = fadd double %14, %16
%18 = getelementptr inbounds double, double* %2, i64 2
store double %17, double* %18
ret void
}
void insw(short port, void *buf, int size) {
  __asm__("rep insw" ::"D"(buf), "d"(port), "c"(size >> 1));
}


x86 assembly (clang, -O0):
<insw>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x2(%rbp),%dx
mov    -0x14(%rbp),%ecx
sar    $0x1,%ecx
rep insw (%dx),%es:(%rdi)
pop    %rbp
ret

x86 assembly (clang, -O2):
<insw>:
mov    %edx,%ecx
mov    %edi,%edx
sar    %ecx
mov    %rsi,%rdi
rep insw (%dx),%es:(%rdi)
ret

LLVM IR (-O0):
define void @insw(i16 signext %0, i8* %1, i32 %2) {
%4 = alloca i16
%5 = alloca i8*
%6 = alloca i32
store i16 %0, i16* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %5
%8 = load i16, i16* %4
%9 = load i32, i32* %6
%10 = ashr i32 %9, 1
ret void
}

LLVM IR (-O2):
define void @insw(i16 signext %0, i8* %1, i32 %2) {
%4 = ashr i32 %2, 1
tail call void asm sideeffect "rep insw", "{di},{dx},{cx},~{dirflag},~{fpsr},~{flags}"(i8* %1, i16 %0, i32 %4)
ret void
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
uint32_t SysTickValueGet(void) {
  return ((*((volatile unsigned long *)(0xE000E018))));
}


x86 assembly (clang, -O0):
<SysTickValueGet>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe000e018,%eax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysTickValueGet>:
mov    $0xe000e018,%eax
mov    (%rax),%rax
ret

LLVM IR (-O0):
define i64 @SysTickValueGet() {
%1 = load volatile i64, i64* inttoptr (i64 3758153752 to i64*)
ret i64 %1
}

LLVM IR (-O2):
define i64 @SysTickValueGet() {
%1 = load volatile i64, i64* inttoptr (i64 3758153752 to i64*)
ret i64 %1
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
bool WatchdogLockState(uint32_t ui32Base) {
  ;
  return (((*((volatile uint32_t *)(ui32Base + 0x00000C00))) == 0x00000001)
              ? true
              : false);
}


x86 assembly (clang, -O0):
<WatchdogLockState>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xc00,%eax
cltq
mov    (%rax),%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x1,%edx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<WatchdogLockState>:
movslq %edi,%rax
mov    0xc00(%rax),%ecx
xor    %eax,%eax
cmp    $0x1,%ecx
sete   %al
ret

LLVM IR (-O0):
define i32 @WatchdogLockState(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 3072
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = icmp eq i32 %7, 1
%9 = zext i1 %8 to i64
%10 = select i1 %8, i32 1, i32 0
ret i32 %10
}

LLVM IR (-O2):
define i32 @WatchdogLockState(i32 %0) {
%2 = add nsw i32 %0, 3072
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = icmp eq i32 %5, 1
%7 = zext i1 %6 to i32
ret i32 %7
}
void *test_anti_range_139(signed char n) {
  extern void *alloc_anti_range_139(signed char) __attribute__((alloc_size(1)));
  if (-1 <= n && n <= 2)
    n = -1 - 1;
  return alloc_anti_range_139(n);
}


x86 assembly (clang, -O0):
<test_anti_range_139>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0xffffffff,%eax
cmp    %ecx,%eax
jg     1140 <test_anti_range_139+0x30>
movsbl -0x1(%rbp),%eax
cmp    $0x2,%eax
jg     1140 <test_anti_range_139+0x30>
movb   $0xfe,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <alloc_anti_range_139@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_anti_range_139>:
lea    0x1(%rdi),%eax
cmp    $0x4,%al
mov    $0xfe,%eax
cmovae %edi,%eax
movsbl %al,%edi
jmp    1030 <alloc_anti_range_139@plt>

LLVM IR (-O0):
define i8* @test_anti_range_139(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sle i32 -1, %4
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 2
br i1 %9, label %10, label %11
10: ; preds = %6
store i8 -2, i8* %2
br label %11
11: ; preds = %10, %6, %1
%12 = load i8, i8* %2
%13 = call i8* @alloc_anti_range_139(i8 signext %12)
ret i8* %13
}

LLVM IR (-O2):
define i8* @test_anti_range_139(i8 signext %0) {
%2 = add i8 %0, 1
%3 = icmp ult i8 %2, 4
%4 = select i1 %3, i8 -2, i8 %0
%5 = tail call i8* @alloc_anti_range_139(i8 signext %4)
ret i8* %5
}
/* Variables and functions */
scalar_t__ isLittleEndian();
unsigned int little2bigui(unsigned int);
unsigned int little2hostui(unsigned int num) {
  if (isLittleEndian())
    return num;
  return little2bigui(num);
}


x86 assembly (clang, -O0):
<little2hostui>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <isLittleEndian@plt>
cmp    $0x0,%rax
je     1147 <little2hostui+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1152 <little2hostui+0x32>
mov    -0x8(%rbp),%edi
call   1030 <little2bigui@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<little2hostui>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <isLittleEndian@plt>
test   %rax,%rax
je     1133 <little2hostui+0x13>
mov    %ebx,%eax
pop    %rbx
ret
mov    %ebx,%edi
pop    %rbx
jmp    1030 <little2bigui@plt>

LLVM IR (-O0):
define i32 @little2hostui(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i64 (...) @isLittleEndian()
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %11
8: ; preds = %1
%9 = load i32, i32* %3
%10 = call i32 @little2bigui(i32 %9)
store i32 %10, i32* %2
br label %11
11: ; preds = %8, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @little2hostui(i32 %0) {
%2 = tail call i64 (...) @isLittleEndian()
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @little2bigui(i32 %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ %5, %4 ], [ %0, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void print_int(int x) { printf("%d", x); }


x86 assembly (clang, -O0):
<print_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_int>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @print_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @print_int(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
PHP_MINFO_FUNCTION(sync) {
  php_info_print_table_start();
  php_info_print_table_header(2, "sync support", "enabled");
  php_info_print_table_end();
}


x86 assembly (clang, -O0):
<PHP_MINFO_FUNCTION>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x0,%al
call   1050 <php_info_print_table_start@plt>
mov    $0x2,%edi
lea    0xeb2(%rip),%rsi
lea    0xeb8(%rip),%rdx
mov    $0x0,%al
call   1040 <php_info_print_table_header@plt>
mov    $0x0,%al
call   1030 <php_info_print_table_end@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PHP_MINFO_FUNCTION>:
push   %rax
xor    %eax,%eax
call   1050 <php_info_print_table_start@plt>
lea    0xec1(%rip),%rsi
lea    0xec7(%rip),%rdx
mov    $0x2,%edi
xor    %eax,%eax
call   1040 <php_info_print_table_header@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <php_info_print_table_end@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"sync support\00"
@.str.1 = [8 x i8] c"enabled\00"
define i32 @PHP_MINFO_FUNCTION(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 (...) @php_info_print_table_start()
%5 = call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @php_info_print_table_header to i32 (i32, i8*, i8*, ...)*)(i32 2, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
%6 = call i32 (...) @php_info_print_table_end()
%7 = load i32, i32* %2
ret i32 %7
}

LLVM IR (-O2):
@.str = [13 x i8] c"sync support\00"
@.str.1 = [8 x i8] c"enabled\00"
define i32 @PHP_MINFO_FUNCTION(i32 %0) {
%2 = tail call i32 (...) @php_info_print_table_start()
%3 = tail call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @php_info_print_table_header to i32 (i32, i8*, i8*, ...)*)(i32 2, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i32 (...) @php_info_print_table_end()
ret i32 undef
}
extern __attribute__((gnu_)) int carmen_round(double X) {
  if (X >= 0)
    return (int)(X + 0.5);
  else
    return (int)(X - 0.5);
}


x86 assembly (clang, -O0):
<carmen_round>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1134 <carmen_round+0x34>
movsd  0xedd(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x4(%rbp)
jmp    114c <carmen_round+0x4c>
movsd  -0x10(%rbp),%xmm0
movsd  0xebf(%rip),%xmm1
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<carmen_round>:
xorpd  %xmm1,%xmm1
xor    %eax,%eax
ucomisd %xmm1,%xmm0
setb   %al
lea    0xeec(%rip),%rcx
addsd  (%rcx,%rax,8),%xmm0
cvttsd2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @carmen_round(double %0) {
%2 = alloca i32
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp oge double %4, 0.000000e+00
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load double, double* %3
%8 = fadd double %7, 5.000000e-01
%9 = fptosi double %8 to i32
store i32 %9, i32* %2
br label %14
10: ; preds = %1
%11 = load double, double* %3
%12 = fsub double %11, 5.000000e-01
%13 = fptosi double %12 to i32
store i32 %13, i32* %2
br label %14
14: ; preds = %10, %6
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @carmen_round(double %0) {
%2 = fcmp ult double %0, 0.000000e+00
%3 = select i1 %2, double -5.000000e-01, double 5.000000e-01
%4 = fadd double %3, %0
%5 = fptosi double %4 to i32
ret i32 %5
}
int isBlocked(char a) { return 0; }


x86 assembly (clang, -O0):
<isBlocked>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isBlocked>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isBlocked(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @isBlocked(i8 signext %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ SIGUSR1;
int /*<<< orphan*/ raise(int /*<<< orphan*/);
void *thread3(void *d) {
  raise(SIGUSR1);
  return NULL;
}


x86 assembly (clang, -O0):
<thread3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
call   1030 <raise@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread3>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <raise@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@SIGUSR1 = global i32 0
define i8* @thread3(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @SIGUSR1
%4 = call i32 @raise(i32 %3)
ret i8* null
}

LLVM IR (-O2):
@SIGUSR1 = global i32 0
define noalias i8* @thread3(i8* nocapture readnone %0) {
%2 = load i32, i32* @SIGUSR1
%3 = tail call i32 @raise(i32 %2)
ret i8* null
}
void rop3_0_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  stk1 = 0;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_0_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movb   $0x0,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_0_0_0>:
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_0_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
store i8 0, i8* %7
%8 = load i8, i8* %7
%9 = load i8*, i8** %4
store i8 %8, i8* %9
ret void
}

LLVM IR (-O2):
define void @rop3_0_0_0(i8* nocapture writeonly %0, i8 zeroext %1, i8 zeroext %2) {
store i8 0, i8* %0
ret void
}