#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
struct nrf24l01 {
  int dummy;
};

/* Variables and functions */
int rf_reg_write(struct nrf24l01 *, int, int);
int rf_reg_writelong(struct nrf24l01 *, int, int /*<<< orphan*/ *, int);
int rf_rx_addr(struct nrf24l01 *dev, uint64_t addr) {
  int ret;
  ret = rf_reg_write(dev, 0x02, 0b00000001);
  if (ret < 0)
    goto out;
  ret = rf_reg_write(dev, 0x01, 0b00000001);
  if (ret < 0)
    goto out;
  ret = rf_reg_write(dev, 0x11, 32);
  if (ret < 0)
    goto out;
  ret = rf_reg_writelong(dev, 0x0a, &addr, 5);
  if (ret < 0)
    goto out;
  ret = 0;
out:
  return ret;
}


x86 assembly (clang, -O0):
<rf_rx_addr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2,%esi
mov    $0x1,%edx
call   1030 <rf_reg_write@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jge    1154 <rf_rx_addr+0x34>
jmp    11cb <rf_rx_addr+0xab>
mov    -0x8(%rbp),%rdi
mov    $0x1,%edx
mov    %edx,%esi
call   1030 <rf_reg_write@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jge    1176 <rf_rx_addr+0x56>
jmp    11cb <rf_rx_addr+0xab>
mov    -0x8(%rbp),%rdi
mov    $0x11,%esi
mov    $0x20,%edx
call   1030 <rf_reg_write@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jge    119b <rf_rx_addr+0x7b>
jmp    11cb <rf_rx_addr+0xab>
mov    -0x8(%rbp),%rdi
mov    $0xa,%esi
lea    -0xc(%rbp),%rdx
mov    $0x5,%ecx
call   1040 <rf_reg_writelong@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jge    11c4 <rf_rx_addr+0xa4>
jmp    11cb <rf_rx_addr+0xab>
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rf_rx_addr>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %esi,0xc(%rsp)
mov    $0x2,%esi
mov    $0x1,%edx
call   1030 <rf_reg_write@plt>
test   %eax,%eax
js     1189 <rf_rx_addr+0x69>
mov    %rbx,%rdi
mov    $0x1,%esi
mov    $0x1,%edx
call   1030 <rf_reg_write@plt>
test   %eax,%eax
js     1189 <rf_rx_addr+0x69>
mov    %rbx,%rdi
mov    $0x11,%esi
mov    $0x20,%edx
call   1030 <rf_reg_write@plt>
test   %eax,%eax
js     1189 <rf_rx_addr+0x69>
lea    0xc(%rsp),%rdx
mov    %rbx,%rdi
mov    $0xa,%esi
mov    $0x5,%ecx
call   1040 <rf_reg_writelong@plt>
mov    %eax,%ecx
sar    $0x1f,%eax
and    %ecx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.nrf24l01 = type { i32 }
define i32 @rf_rx_addr(%struct.nrf24l01* %0, i32 %1) {
%3 = alloca %struct.nrf24l01*
%4 = alloca i32
%5 = alloca i32
store %struct.nrf24l01* %0, %struct.nrf24l01** %3
store i32 %1, i32* %4
%6 = load %struct.nrf24l01*, %struct.nrf24l01** %3
%7 = call i32 @rf_reg_write(%struct.nrf24l01* %6, i32 2, i32 1)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
br label %30
11: ; preds = %2
%12 = load %struct.nrf24l01*, %struct.nrf24l01** %3
%13 = call i32 @rf_reg_write(%struct.nrf24l01* %12, i32 1, i32 1)
store i32 %13, i32* %5
%14 = load i32, i32* %5
%15 = icmp slt i32 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %11
br label %30
17: ; preds = %11
%18 = load %struct.nrf24l01*, %struct.nrf24l01** %3
%19 = call i32 @rf_reg_write(%struct.nrf24l01* %18, i32 17, i32 32)
store i32 %19, i32* %5
%20 = load i32, i32* %5
%21 = icmp slt i32 %20, 0
br i1 %21, label %22, label %23
22: ; preds = %17
br label %30
23: ; preds = %17
%24 = load %struct.nrf24l01*, %struct.nrf24l01** %3
%25 = call i32 @rf_reg_writelong(%struct.nrf24l01* %24, i32 10, i32* %4, i32 5)
store i32 %25, i32* %5
%26 = load i32, i32* %5
%27 = icmp slt i32 %26, 0
br i1 %27, label %28, label %29
28: ; preds = %23
br label %30
29: ; preds = %23
store i32 0, i32* %5
br label %30
30: ; preds = %29, %28, %22, %16, %10
%31 = load i32, i32* %5
ret i32 %31
}

LLVM IR (-O2):
%struct.nrf24l01 = type { i32 }
define i32 @rf_rx_addr(%struct.nrf24l01* %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = tail call i32 @rf_reg_write(%struct.nrf24l01* %0, i32 2, i32 1)
%5 = icmp slt i32 %4, 0
br i1 %5, label %16, label %6
6: ; preds = %2
%7 = tail call i32 @rf_reg_write(%struct.nrf24l01* %0, i32 1, i32 1)
%8 = icmp slt i32 %7, 0
br i1 %8, label %16, label %9
9: ; preds = %6
%10 = tail call i32 @rf_reg_write(%struct.nrf24l01* %0, i32 17, i32 32)
%11 = icmp slt i32 %10, 0
br i1 %11, label %16, label %12
12: ; preds = %9
%13 = call i32 @rf_reg_writelong(%struct.nrf24l01* %0, i32 10, i32* %3, i32 5)
%14 = icmp slt i32 %13, 0
%15 = select i1 %14, i32 %13, i32 0
br label %16
16: ; preds = %12, %9, %6, %2
%17 = phi i32 [ %4, %2 ], [ %7, %6 ], [ %10, %9 ], [ %15, %12 ]
ret i32 %17
}