xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ RAND_MAX;
int rand_r(unsigned int *);
double frand(unsigned *seed, double a, double b) {
  int r;
  r = rand_r(seed);
  return (r / (double)RAND_MAX) * (b - a) + a;
}


x86 assembly (clang, -O0):
<frand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <rand_r@plt>
mov    %eax,-0x1c(%rbp)
cvtsi2sdl -0x1c(%rbp),%xmm0
mov    0x2eaa(%rip),%rax
cvtsi2sdq (%rax),%xmm1
divsd  %xmm1,%xmm0
movsd  -0x18(%rbp),%xmm2
subsd  -0x10(%rbp),%xmm2
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<frand>:
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
movsd  %xmm0,0x8(%rsp)
call   1030 <rand_r@plt>
cvtsi2sd %eax,%xmm2
mov    0x2eb8(%rip),%rax
xorps  %xmm1,%xmm1
cvtsi2sdq (%rax),%xmm1
divsd  %xmm1,%xmm2
movsd  0x10(%rsp),%xmm0
movsd  0x8(%rsp),%xmm1
subsd  %xmm1,%xmm0
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define double @frand(i32* %0, double %1, double %2) {
%4 = alloca i32*
%5 = alloca double
%6 = alloca double
%7 = alloca i32
store i32* %0, i32** %4
store double %1, double* %5
store double %2, double* %6
%8 = load i32*, i32** %4
%9 = call i32 @rand_r(i32* %8)
store i32 %9, i32* %7
%10 = load i32, i32* %7
%11 = sitofp i32 %10 to double
%12 = load i64, i64* @RAND_MAX
%13 = sitofp i64 %12 to double
%14 = fdiv double %11, %13
%15 = load double, double* %6
%16 = load double, double* %5
%17 = fsub double %15, %16
%18 = load double, double* %5
%19 = call double @llvm.fmuladd.f64(double %14, double %17, double %18)
ret double %19
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define double @frand(i32* %0, double %1, double %2) {
%4 = tail call i32 @rand_r(i32* %0)
%5 = sitofp i32 %4 to double
%6 = load i64, i64* @RAND_MAX
%7 = sitofp i64 %6 to double
%8 = fdiv double %5, %7
%9 = fsub double %2, %1
%10 = tail call double @llvm.fmuladd.f64(double %8, double %9, double %1)
ret double %10
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void usage(void) {
  fputs("makesfx -o outfile -z zipfile -xunzipsfx -sstubfile\n", stderr);
  exit(0);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%esi
lea    0xecc(%rip),%rdi
call   1030 <fputs@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
lea    0xecf(%rip),%rdi
call   1030 <fputs@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [53 x i8] c"makesfx -o outfile -z zipfile -xunzipsfx -sstubfile\0A\00"
@stderr = global i32 0
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [53 x i8] c"makesfx -o outfile -z zipfile -xunzipsfx -sstubfile\0A\00"
@stderr = global i32 0
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @exit(i32 0)
unreachable
}
void ARGBToUVRow_AVX2() {}


x86 assembly (clang, -O0):
<ARGBToUVRow_AVX2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBToUVRow_AVX2>:
ret

LLVM IR (-O0):
define void @ARGBToUVRow_AVX2() {
ret void
}

LLVM IR (-O2):
define void @ARGBToUVRow_AVX2() {
ret void
}
int calculate_winner(int pos1, int pos2, int pos3) {
  if (pos1 == 'X' && pos2 == 'X' && pos3 == 'X')
    return 1;
  else if (pos1 == 'O' && pos2 == 'O' && pos3 == 'O')
    return 2;
  else
    return 0;
}


x86 assembly (clang, -O0):
<calculate_winner>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x58,-0x8(%rbp)
jne    1137 <calculate_winner+0x37>
cmpl   $0x58,-0xc(%rbp)
jne    1137 <calculate_winner+0x37>
cmpl   $0x58,-0x10(%rbp)
jne    1137 <calculate_winner+0x37>
movl   $0x1,-0x4(%rbp)
jmp    1168 <calculate_winner+0x68>
cmpl   $0x4f,-0x8(%rbp)
jne    1161 <calculate_winner+0x61>
cmpl   $0x4f,-0xc(%rbp)
jne    1161 <calculate_winner+0x61>
cmpl   $0x4f,-0x10(%rbp)
jne    1161 <calculate_winner+0x61>
movl   $0x2,-0x4(%rbp)
jmp    1168 <calculate_winner+0x68>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculate_winner>:
cmp    $0x58,%edi
jne    1115 <calculate_winner+0x15>
cmp    $0x58,%esi
jne    1115 <calculate_winner+0x15>
mov    $0x1,%eax
cmp    $0x58,%edx
jne    1115 <calculate_winner+0x15>
ret
xor    $0x4f,%edi
xor    $0x4f,%esi
or     %edi,%esi
xor    $0x4f,%edx
xor    %eax,%eax
or     %esi,%edx
sete   %al
add    %eax,%eax
ret

LLVM IR (-O0):
define i32 @calculate_winner(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = icmp eq i32 %8, 88
br i1 %9, label %10, label %17
10: ; preds = %3
%11 = load i32, i32* %6
%12 = icmp eq i32 %11, 88
br i1 %12, label %13, label %17
13: ; preds = %10
%14 = load i32, i32* %7
%15 = icmp eq i32 %14, 88
br i1 %15, label %16, label %17
16: ; preds = %13
store i32 1, i32* %4
br label %28
17: ; preds = %13, %10, %3
%18 = load i32, i32* %5
%19 = icmp eq i32 %18, 79
br i1 %19, label %20, label %27
20: ; preds = %17
%21 = load i32, i32* %6
%22 = icmp eq i32 %21, 79
br i1 %22, label %23, label %27
23: ; preds = %20
%24 = load i32, i32* %7
%25 = icmp eq i32 %24, 79
br i1 %25, label %26, label %27
26: ; preds = %23
store i32 2, i32* %4
br label %28
27: ; preds = %23, %20, %17
store i32 0, i32* %4
br label %28
28: ; preds = %27, %26, %16
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @calculate_winner(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %0, 88
%5 = icmp eq i32 %1, 88
%6 = and i1 %4, %5
%7 = icmp eq i32 %2, 88
%8 = and i1 %6, %7
br i1 %8, label %16, label %9
9: ; preds = %3
%10 = icmp eq i32 %0, 79
%11 = icmp eq i32 %1, 79
%12 = and i1 %10, %11
%13 = icmp eq i32 %2, 79
%14 = and i1 %12, %13
%15 = select i1 %14, i32 2, i32 0
br label %16
16: ; preds = %9, %3
%17 = phi i32 [ 1, %3 ], [ %15, %9 ]
ret i32 %17
}
void mdp_ppp_init_scale(struct mdp_info *mdp) {}


x86 assembly (clang, -O0):
<mdp_ppp_init_scale>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdp_ppp_init_scale>:
ret

LLVM IR (-O0):
%struct.mdp_info = type opaque
define void @mdp_ppp_init_scale(%struct.mdp_info* %0) {
%2 = alloca %struct.mdp_info*
store %struct.mdp_info* %0, %struct.mdp_info** %2
ret void
}

LLVM IR (-O2):
%struct.mdp_info = type opaque
define void @mdp_ppp_init_scale(%struct.mdp_info* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ stw_write(char const *, char const *);
void wo5_node_keyval(const char *key, const char *val) { stw_write(key, val); }


x86 assembly (clang, -O0):
<wo5_node_keyval>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <stw_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wo5_node_keyval>:
jmp    1030 <stw_write@plt>

LLVM IR (-O0):
define void @wo5_node_keyval(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @stw_write(i8* %5, i8* %6)
ret void
}

LLVM IR (-O2):
define void @wo5_node_keyval(i8* %0, i8* %1) {
%3 = tail call i32 @stw_write(i8* %0, i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sanitizer(int);
int /*<<< orphan*/ sink(int);
int test_dataFlowToFromParam(int aUniqueParamName) {
  sanitizer(aUniqueParamName);
  sink(aUniqueParamName);
}


x86 assembly (clang, -O0):
<test_dataFlowToFromParam>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <sanitizer@plt>
mov    -0x8(%rbp),%edi
call   1040 <sink@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_dataFlowToFromParam>:
push   %rbx
mov    %edi,%ebx
call   1030 <sanitizer@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <sink@plt>

LLVM IR (-O0):
define i32 @test_dataFlowToFromParam(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 @sanitizer(i32 %4)
%6 = load i32, i32* %3
%7 = call i32 @sink(i32 %6)
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_dataFlowToFromParam(i32 %0) {
%2 = tail call i32 @sanitizer(i32 %0)
%3 = tail call i32 @sink(i32 %0)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ odcgi_print_login_form(char *, char const *);
scalar_t__ strcmp(char *, char const *);
int odcgi_check_root(const char *http_user) {
  if (strcmp("root", http_user) == 0) {
    odcgi_print_login_form("root has not access", http_user);
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<odcgi_check_root>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
jne    1162 <odcgi_check_root+0x42>
mov    -0x10(%rbp),%rsi
lea    0xeb4(%rip),%rdi
call   1040 <odcgi_print_login_form@plt>
movl   $0x1,-0x4(%rbp)
jmp    1169 <odcgi_check_root+0x49>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<odcgi_check_root>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
mov    %rbx,%rsi
call   1030 <strcmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
je     113f <odcgi_check_root+0x1f>
pop    %rbx
ret
lea    0xebf(%rip),%rdi
mov    %rbx,%rsi
call   1040 <odcgi_print_login_form@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"root\00"
@.str.1 = [20 x i8] c"root has not access\00"
define i32 @odcgi_check_root(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @strcmp(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = call i32 @odcgi_print_login_form(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0), i8* %8)
store i32 1, i32* %2
br label %11
10: ; preds = %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
@.str = [5 x i8] c"root\00"
@.str.1 = [20 x i8] c"root has not access\00"
define i32 @odcgi_check_root(i8* %0) {
%2 = tail call i64 @strcmp(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @odcgi_print_login_form(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0), i8* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 1, %4 ], [ 0, %1 ]
ret i32 %7
}
unsigned long mktime(struct tm *tm) { return 0; }


x86 assembly (clang, -O0):
<mktime>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mktime>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.tm = type opaque
define i64 @mktime(%struct.tm* %0) {
%2 = alloca %struct.tm*
store %struct.tm* %0, %struct.tm** %2
ret i64 0
}

LLVM IR (-O2):
%struct.tm = type opaque
define i64 @mktime(%struct.tm* nocapture readnone %0) {
ret i64 0
}
/* Variables and functions */
int /*<<< orphan*/ send_char(char);
void send_success(void) { send_char('\001'); }


x86 assembly (clang, -O0):
<send_success>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <send_char@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_success>:
mov    $0x1,%edi
jmp    1030 <send_char@plt>

LLVM IR (-O0):
define void @send_success() {
%1 = call i32 @send_char(i8 signext 1)
ret void
}

LLVM IR (-O2):
define void @send_success() {
%1 = tail call i32 @send_char(i8 signext 1)
ret void
}
__attribute__((always_)) unsigned long pmd_index(unsigned long address) {
  return (address >> 21) & (512 - 1);
}


x86 assembly (clang, -O0):
<pmd_index>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x15,%rax
and    $0x1ff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmd_index>:
mov    %rdi,%rax
shr    $0x15,%eax
and    $0x1ff,%eax
ret

LLVM IR (-O0):
define i64 @pmd_index(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 21
%5 = and i64 %4, 511
ret i64 %5
}

LLVM IR (-O2):
define i64 @pmd_index(i64 %0) {
%2 = lshr i64 %0, 21
%3 = and i64 %2, 511
ret i64 %3
}
unsigned int ishftr_(unsigned int *arg, int *len) { return (*arg >> *len); }


x86 assembly (clang, -O0):
<ishftr_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
mov    (%rcx),%ecx
shr    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ishftr_>:
mov    (%rdi),%eax
mov    (%rsi),%cl
shr    %cl,%eax
ret

LLVM IR (-O0):
define i32 @ishftr_(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = lshr i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @ishftr_(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = lshr i32 %3, %4
ret i32 %5
}
/* Variables and functions */
double logf(int);
float atanhf(float x) { return 0.5 * logf((1. + x) / (1. - x)); }


x86 assembly (clang, -O0):
<atanhf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xeda(%rip),%xmm0
addsd  %xmm1,%xmm0
movss  -0x4(%rbp),%xmm1
cvtss2sd %xmm1,%xmm2
movsd  0xec5(%rip),%xmm1
subsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <logf@plt>
movaps %xmm0,%xmm1
movsd  0xea1(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atanhf>:
push   %rax
cvtss2sd %xmm0,%xmm0
movsd  0xee3(%rip),%xmm1
movaps %xmm0,%xmm2
addsd  %xmm1,%xmm2
subsd  %xmm0,%xmm1
divsd  %xmm1,%xmm2
cvttsd2si %xmm2,%edi
call   1030 <logf@plt>
mulsd  0xecb(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @atanhf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fadd double 1.000000e+00, %4
%6 = load float, float* %2
%7 = fpext float %6 to double
%8 = fsub double 1.000000e+00, %7
%9 = fdiv double %5, %8
%10 = fptosi double %9 to i32
%11 = call double @logf(i32 %10)
%12 = fmul double 5.000000e-01, %11
%13 = fptrunc double %12 to float
ret float %13
}

LLVM IR (-O2):
define float @atanhf(float %0) {
%2 = fpext float %0 to double
%3 = fadd double %2, 1.000000e+00
%4 = fsub double 1.000000e+00, %2
%5 = fdiv double %3, %4
%6 = fptosi double %5 to i32
%7 = tail call double @logf(i32 %6)
%8 = fmul double %7, 5.000000e-01
%9 = fptrunc double %8 to float
ret float %9
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int random_linear_product_system(void) {
  int fail, *a, *b;
  double *c;
  fail = _ada_use_c2phc4c(113, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<random_linear_product_system>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x71,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_linear_product_system>:
mov    $0x71,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @random_linear_product_system() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca double*
%5 = load i32*, i32** %2
%6 = load i32*, i32** %3
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 113, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %1
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
define i32 @random_linear_product_system() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 113, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ safe_close(int);
void safe_closep(int *p) {
  if (*p)
    safe_close(*p);
}


x86 assembly (clang, -O0):
<safe_closep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0x0,(%rax)
je     1134 <safe_closep+0x24>
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <safe_close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_closep>:
mov    (%rdi),%edi
test   %edi,%edi
je     111b <safe_closep+0xb>
jmp    1030 <safe_close@plt>
ret

LLVM IR (-O0):
define void @safe_closep(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32*, i32** %2
%8 = load i32, i32* %7
%9 = call i32 @safe_close(i32 %8)
br label %10
10: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
define void @safe_closep(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = icmp eq i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @safe_close(i32 %2)
br label %6
6: ; preds = %4, %1
ret void
}
int CFun(int x, int y) {
  if (x > y)
    return 1;
  else if (x == y)
    return 0;
  else
    return -1;
}


x86 assembly (clang, -O0):
<CFun>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1122 <CFun+0x22>
movl   $0x1,-0x4(%rbp)
jmp    1141 <CFun+0x41>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    113a <CFun+0x3a>
movl   $0x0,-0x4(%rbp)
jmp    1141 <CFun+0x41>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CFun>:
xor    %ecx,%ecx
cmp    %esi,%edi
setne  %cl
neg    %ecx
cmp    %esi,%edi
mov    $0x1,%eax
cmovle %ecx,%eax
ret

LLVM IR (-O0):
define i32 @CFun(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, i32* %3
br label %16
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = icmp eq i32 %11, %12
br i1 %13, label %14, label %15
14: ; preds = %10
store i32 0, i32* %3
br label %16
15: ; preds = %10
store i32 -1, i32* %3
br label %16
16: ; preds = %15, %14, %9
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @CFun(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = icmp ne i32 %0, %1
%5 = sext i1 %4 to i32
%6 = select i1 %3, i32 1, i32 %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
__attribute__((constructor)) void foo1() {
  printf("Hello World from a constructor foo1\n");
}


x86 assembly (clang, -O0):
<foo1>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo1>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"Hello World from a constructor foo1\0A\00"
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @foo1, i8* null }]
define void @foo1() {
%1 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @foo1, i8* null }]
@str = [36 x i8] c"Hello World from a constructor foo1\00"
define void @foo1() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ create_pci_bus_list();
int /*<<< orphan*/ create_root_bridge_list();
int /*<<< orphan*/ create_sysfs_slot_list();
int create_sysfs_pci_tree(void) {
  create_root_bridge_list();
  create_pci_bus_list();
  create_sysfs_slot_list();
  return 0;
}


x86 assembly (clang, -O0):
<create_sysfs_pci_tree>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <create_root_bridge_list@plt>
mov    $0x0,%al
call   1040 <create_pci_bus_list@plt>
mov    $0x0,%al
call   1050 <create_sysfs_slot_list@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_sysfs_pci_tree>:
push   %rax
xor    %eax,%eax
call   1030 <create_root_bridge_list@plt>
xor    %eax,%eax
call   1040 <create_pci_bus_list@plt>
xor    %eax,%eax
call   1050 <create_sysfs_slot_list@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @create_sysfs_pci_tree() {
%1 = call i32 (...) @create_root_bridge_list()
%2 = call i32 (...) @create_pci_bus_list()
%3 = call i32 (...) @create_sysfs_slot_list()
ret i32 0
}

LLVM IR (-O2):
define i32 @create_sysfs_pci_tree() {
%1 = tail call i32 (...) @create_root_bridge_list()
%2 = tail call i32 (...) @create_pci_bus_list()
%3 = tail call i32 (...) @create_sysfs_slot_list()
ret i32 0
}
void HSMMCSDSupportedVoltSet(unsigned int baseAddr, unsigned int volt) {
  (*((volatile unsigned int *)(baseAddr + (0x240)))) &=
      ~((0x04000000u) | (0x02000000u) | (0x01000000u));
  (*((volatile unsigned int *)(baseAddr + (0x240)))) |= volt;
}


x86 assembly (clang, -O0):
<HSMMCSDSupportedVoltSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x240,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xf8ffffff,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%edx
mov    -0x4(%rbp),%eax
add    $0x240,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<HSMMCSDSupportedVoltSet>:
add    $0x240,%edi
andl   $0xf8ffffff,(%rdi)
or     %esi,(%rdi)
ret

LLVM IR (-O0):
define void @HSMMCSDSupportedVoltSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add i32 %5, 576
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, -117440513
store volatile i32 %10, i32* %8
%11 = load i32, i32* %4
%12 = load i32, i32* %3
%13 = add i32 %12, 576
%14 = zext i32 %13 to i64
%15 = inttoptr i64 %14 to i32*
%16 = load volatile i32, i32* %15
%17 = or i32 %16, %11
store volatile i32 %17, i32* %15
ret void
}

LLVM IR (-O2):
define void @HSMMCSDSupportedVoltSet(i32 %0, i32 %1) {
%3 = add i32 %0, 576
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, -117440513
store volatile i32 %7, i32* %5
%8 = load volatile i32, i32* %5
%9 = or i32 %8, %1
store volatile i32 %9, i32* %5
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
int gca_search_uint32(const void *aa, void *bb) {
  const uint32_t a = *(const uint32_t *)aa;
  const uint32_t b = *(uint32_t *)bb;
  return (((a) > (b)) - ((b) > (a)));
}


x86 assembly (clang, -O0):
<gca_search_uint32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x20(%rbp),%rax
setg   %al
and    $0x1,%al
movzbl %al,%eax
mov    -0x20(%rbp),%rcx
cmp    -0x18(%rbp),%rcx
setg   %cl
and    $0x1,%cl
movzbl %cl,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gca_search_uint32>:
mov    (%rdi),%rcx
mov    (%rsi),%rdx
xor    %eax,%eax
xor    %esi,%esi
cmp    %rdx,%rcx
setg   %al
setl   %sil
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @gca_search_uint32(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i64*
%9 = load i64, i64* %8
store i64 %9, i64* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i64*
%12 = load i64, i64* %11
store i64 %12, i64* %6
%13 = load i64, i64* %5
%14 = load i64, i64* %6
%15 = icmp sgt i64 %13, %14
%16 = zext i1 %15 to i32
%17 = load i64, i64* %6
%18 = load i64, i64* %5
%19 = icmp sgt i64 %17, %18
%20 = zext i1 %19 to i32
%21 = sub nsw i32 %16, %20
ret i32 %21
}

LLVM IR (-O2):
define i32 @gca_search_uint32(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = load i64, i64* %3
%5 = bitcast i8* %1 to i64*
%6 = load i64, i64* %5
%7 = icmp sgt i64 %4, %6
%8 = zext i1 %7 to i32
%9 = icmp sgt i64 %6, %4
%10 = sext i1 %9 to i32
%11 = add nsw i32 %10, %8
ret i32 %11
}
/* Variables and functions */
int TestLargeVector();
int TestVectors();
bool TestAesCbc(void) {
  bool totalSuccess = true;
  bool success;
  success = TestVectors();
  if (!success) {
    totalSuccess = false;
  }
  success = TestLargeVector();
  if (!success) {
    totalSuccess = false;
  }
  return totalSuccess;
}


x86 assembly (clang, -O0):
<TestAesCbc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
mov    $0x0,%al
call   1030 <TestVectors@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    114a <TestAesCbc+0x2a>
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <TestLargeVector@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1165 <TestAesCbc+0x45>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TestAesCbc>:
push   %rbx
xor    %eax,%eax
call   1030 <TestVectors@plt>
test   %eax,%eax
setne  %bl
xor    %eax,%eax
call   1040 <TestLargeVector@plt>
test   %eax,%eax
setne  %al
and    %bl,%al
movzbl %al,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @TestAesCbc() {
%1 = alloca i32
%2 = alloca i32
store i32 1, i32* %1
%3 = call i32 (...) @TestVectors()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %0
store i32 0, i32* %1
br label %7
7: ; preds = %6, %0
%8 = call i32 (...) @TestLargeVector()
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = icmp ne i32 %9, 0
br i1 %10, label %12, label %11
11: ; preds = %7
store i32 0, i32* %1
br label %12
12: ; preds = %11, %7
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @TestAesCbc() {
%1 = tail call i32 (...) @TestVectors()
%2 = icmp ne i32 %1, 0
%3 = tail call i32 (...) @TestLargeVector()
%4 = icmp ne i32 %3, 0
%5 = select i1 %4, i1 %2, i1 false
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
void *realloc(void *, size_t);
void *memrealloc(void *ptr, size_t size) {
  void *mem;
  mem = realloc(ptr, size);
  assert(mem != NULL);
  return mem;
}


x86 assembly (clang, -O0):
<memrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memrealloc>:
push   %rbx
call   1040 <realloc@plt>
mov    %rax,%rbx
xor    %edi,%edi
test   %rax,%rax
setne  %dil
call   1030 <assert@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @memrealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i8*, i8** %5
ret i8* %13
}

LLVM IR (-O2):
define noalias i8* @memrealloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp ne i8* %3, null
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
ret i8* %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, unsigned char);
void fprint_movx_to_atRi(FILE *stream, unsigned char i) {
  fprintf(stream, "MOVX  @R%X, A                    ", i);
}


x86 assembly (clang, -O0):
<fprint_movx_to_atRi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed3(%rip),%rsi
movzbl -0x9(%rbp),%edx
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fprint_movx_to_atRi>:
mov    %esi,%edx
lea    0xee7(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"MOVX @R%X, A \00"
define void @fprint_movx_to_atRi(i32* %0, i8 zeroext %1) {
%3 = alloca i32*
%4 = alloca i8
store i32* %0, i32** %3
store i8 %1, i8* %4
%5 = load i32*, i32** %3
%6 = load i8, i8* %4
%7 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8 zeroext %6)
ret void
}

LLVM IR (-O2):
@.str = [34 x i8] c"MOVX @R%X, A \00"
define void @fprint_movx_to_atRi(i32* nocapture %0, i8 zeroext %1) {
%3 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8 zeroext %1)
ret void
}
void TimerCompare2Set(unsigned long ulBase, unsigned long ulCompare2) {

  ;
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000038))) = ulCompare2;
}


x86 assembly (clang, -O0):
<TimerCompare2Set>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x38(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerCompare2Set>:
mov    %rsi,0x38(%rdi)
ret

LLVM IR (-O0):
define void @TimerCompare2Set(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add i64 %6, 56
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @TimerCompare2Set(i64 %0, i64 %1) {
%3 = add i64 %0, 56
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}
void Swapf(float *a, float *b) {
  float t = *a;
  *a = *b;
  *b = t;
}


x86 assembly (clang, -O0):
<Swapf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
movss  %xmm0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x14(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Swapf>:
movss  (%rdi),%xmm0
movss  (%rsi),%xmm1
movss  %xmm1,(%rdi)
movss  %xmm0,(%rsi)
ret

LLVM IR (-O0):
define void @Swapf(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
%5 = alloca float
store float* %0, float** %3
store float* %1, float** %4
%6 = load float*, float** %3
%7 = load float, float* %6
store float %7, float* %5
%8 = load float*, float** %4
%9 = load float, float* %8
%10 = load float*, float** %3
store float %9, float* %10
%11 = load float, float* %5
%12 = load float*, float** %4
store float %11, float* %12
ret void
}

LLVM IR (-O2):
define void @Swapf(float* nocapture %0, float* nocapture %1) {
%3 = load float, float* %0
%4 = load float, float* %1
store float %4, float* %0
store float %3, float* %1
ret void
}
void set_bit(int nr, volatile void *addr) {
  asm volatile(""
               "btsl %1,%0"
               : "=m"((*(volatile long *)addr))
               : "Ir"(nr), "m"((*(volatile long *)addr))
               : "memory");
}


x86 assembly (clang, -O0):
<set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rdx
bts    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_bit>:
bts    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @set_bit(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i64*
%7 = load i32, i32* %3
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i64*
ret void
}

LLVM IR (-O2):
define void @set_bit(i32 %0, i8* %1) {
%3 = bitcast i8* %1 to i64*
tail call void asm sideeffect "btsl $1,$0", "=*m,Ir,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %3, i32 %0, i64* elementtype(i64) %3)
ret void
}
void test_matrix_print() {}


x86 assembly (clang, -O0):
<test_matrix_print>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_matrix_print>:
ret

LLVM IR (-O0):
define void @test_matrix_print() {
ret void
}

LLVM IR (-O2):
define void @test_matrix_print() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned char);
int main() {
  unsigned char c = 0xff;
  printf("c=%d\n", ++c);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0xff,-0x1(%rbp)
mov    -0x1(%rbp),%al
add    $0x1,%al
mov    %al,-0x1(%rbp)
lea    0xed5(%rip),%rdi
movzbl %al,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"c=%d\0A\00"
define i32 @main() {
%1 = alloca i8
store i8 -1, i8* %1
%2 = load i8, i8* %1
%3 = add i8 %2, 1
store i8 %3, i8* %1
%4 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8 zeroext %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"c=%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8 zeroext 0)
ret i32 0
}
int NpyOS_ascii_isdigit(char c) { return (c >= '0' && c <= '9'); }


x86 assembly (clang, -O0):
<NpyOS_ascii_isdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <NpyOS_ascii_isdigit+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<NpyOS_ascii_isdigit>:
add    $0xd0,%dil
xor    %eax,%eax
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @NpyOS_ascii_isdigit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 57
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @NpyOS_ascii_isdigit(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
int execute_mmap() { return 0; }


x86 assembly (clang, -O0):
<execute_mmap>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_mmap>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_mmap() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_mmap() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ vfprintf(int /*<<< orphan*/, char const *,
                            int /*<<< orphan*/);
void fprint_message_to_stderr(const char *format, va_list arg_ptr) {
  (void)vfprintf(stderr, format, arg_ptr);
}


x86 assembly (clang, -O0):
<fprint_message_to_stderr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <vfprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fprint_message_to_stderr>:
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2ec4(%rip),%rax
mov    (%rax),%edi
jmp    1030 <vfprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
define void @fprint_message_to_stderr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @vfprintf(i32 %5, i8* %6, i32 %7)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
define void @fprint_message_to_stderr(i8* %0, i32 %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @vfprintf(i32 %3, i8* %0, i32 %1)
ret void
}
int main(int argc, char const *argv[]) { return 1; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
ret i32 1
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 1
}
/* Type definitions */
struct wpabuf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wpa_hexdump(int, char const *, int /*<<< orphan*/,
                               int /*<<< orphan*/);
int /*<<< orphan*/ wpabuf_head(struct wpabuf const *);
int /*<<< orphan*/ wpabuf_len(struct wpabuf const *);
void wpa_hexdump_buf(int level, const char *title, const struct wpabuf *buf) {
  wpa_hexdump(level, title, wpabuf_head(buf), wpabuf_len(buf));
}


x86 assembly (clang, -O0):
<wpa_hexdump_buf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x2c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <wpabuf_head@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <wpabuf_len@plt>
mov    -0x2c(%rbp),%edi
mov    -0x28(%rbp),%rsi
mov    -0x1c(%rbp),%edx
mov    %eax,%ecx
call   1050 <wpa_hexdump@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpa_hexdump_buf>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %rsi,%r14
mov    %edi,%r15d
mov    %rdx,%rdi
call   1040 <wpabuf_head@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <wpabuf_len@plt>
mov    %r15d,%edi
mov    %r14,%rsi
mov    %ebp,%edx
mov    %eax,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1050 <wpa_hexdump@plt>

LLVM IR (-O0):
%struct.wpabuf = type { i32 }
define void @wpa_hexdump_buf(i32 %0, i8* %1, %struct.wpabuf* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca %struct.wpabuf*
store i32 %0, i32* %4
store i8* %1, i8** %5
store %struct.wpabuf* %2, %struct.wpabuf** %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load %struct.wpabuf*, %struct.wpabuf** %6
%10 = call i32 @wpabuf_head(%struct.wpabuf* %9)
%11 = load %struct.wpabuf*, %struct.wpabuf** %6
%12 = call i32 @wpabuf_len(%struct.wpabuf* %11)
%13 = call i32 @wpa_hexdump(i32 %7, i8* %8, i32 %10, i32 %12)
ret void
}

LLVM IR (-O2):
%struct.wpabuf = type { i32 }
define void @wpa_hexdump_buf(i32 %0, i8* %1, %struct.wpabuf* %2) {
%4 = tail call i32 @wpabuf_head(%struct.wpabuf* %2)
%5 = tail call i32 @wpabuf_len(%struct.wpabuf* %2)
%6 = tail call i32 @wpa_hexdump(i32 %0, i8* %1, i32 %4, i32 %5)
ret void
}
/* Variables and functions */
int cos(double);
double kern(double k, double s, int hanning) {
  if (!hanning) {
    return k + s;
  }
  return k + ((cos(s * 3.14159265) / 21) + 1.) / 2.;
}


x86 assembly (clang, -O0):
<kern>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
mov    %edi,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jne    1143 <kern+0x33>
movsd  -0x10(%rbp),%xmm0
addsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1191 <kern+0x81>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  0xebb(%rip),%xmm0
mulsd  -0x18(%rbp),%xmm0
call   1030 <cos@plt>
movsd  -0x28(%rbp),%xmm0
mov    $0x15,%ecx
cltd
idiv   %ecx
cvtsi2sd %eax,%xmm1
movsd  0xe90(%rip),%xmm2
addsd  %xmm2,%xmm1
movsd  0xe7c(%rip),%xmm2
divsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kern>:
test   %edi,%edi
je     115c <kern+0x4c>
push   %rax
mulsd  0xee3(%rip),%xmm1
movsd  %xmm0,(%rsp)
movapd %xmm1,%xmm0
call   1030 <cos@plt>
movsd  (%rsp),%xmm0
cltq
imul   $0x30c30c31,%rax,%rax
mov    %rax,%rcx
sar    $0x22,%rcx
shr    $0x3f,%rax
add    %ecx,%eax
add    $0x1,%eax
xorps  %xmm1,%xmm1
cvtsi2sd %eax,%xmm1
mulsd  0xeb0(%rip),%xmm1
add    $0x8,%rsp
addsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @kern(double %0, double %1, i32 %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca i32
store double %0, double* %5
store double %1, double* %6
store i32 %2, i32* %7
%8 = load i32, i32* %7
%9 = icmp ne i32 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %3
%11 = load double, double* %5
%12 = load double, double* %6
%13 = fadd double %11, %12
store double %13, double* %4
br label %24
14: ; preds = %3
%15 = load double, double* %5
%16 = load double, double* %6
%17 = fmul double %16, 0x400921FB53C8D4F1
%18 = call i32 @cos(double %17)
%19 = sdiv i32 %18, 21
%20 = sitofp i32 %19 to double
%21 = fadd double %20, 1.000000e+00
%22 = fdiv double %21, 2.000000e+00
%23 = fadd double %15, %22
store double %23, double* %4
br label %24
24: ; preds = %14, %10
%25 = load double, double* %4
ret double %25
}

LLVM IR (-O2):
define double @kern(double %0, double %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %12, label %5
5: ; preds = %3
%6 = fmul double %1, 0x400921FB53C8D4F1
%7 = tail call i32 @cos(double %6)
%8 = sdiv i32 %7, 21
%9 = add nsw i32 %8, 1
%10 = sitofp i32 %9 to double
%11 = fmul double %10, 5.000000e-01
br label %12
12: ; preds = %3, %5
%13 = phi double [ %11, %5 ], [ %1, %3 ]
%14 = fadd double %13, %0
ret double %14
}
/* Variables and functions */
int __get_array_size(char *);
int __infer_nondet_int();
int sprintf(char *s, const char *format, ...) {
  int res;
  int size1;
  size1 = __get_array_size(s);
  res = __infer_nondet_int();
  if (res < 0)
    while (1)
      ;
  return res;
}


x86 assembly (clang, -O0):
<sprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <__get_array_size@plt>
mov    %eax,-0x18(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_int@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jge    115a <sprintf+0x3a>
jmp    1155 <sprintf+0x35>
jmp    1155 <sprintf+0x35>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sprintf>:
push   %rax
call   1040 <__get_array_size@plt>
xor    %eax,%eax
call   1030 <__infer_nondet_int@plt>
test   %eax,%eax
js     1140 <sprintf+0x20>
pop    %rcx
ret
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
jmp    1140 <sprintf+0x20>

LLVM IR (-O0):
define i32 @sprintf(i8* %0, i8* %1, ...) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = call i32 @__get_array_size(i8* %7)
store i32 %8, i32* %6
%9 = call i32 (...) @__infer_nondet_int()
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = icmp slt i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %2
br label %13
13: ; preds = %12, %13
br label %13
14: ; preds = %2
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
define i32 @sprintf(i8* %0, i8* nocapture readnone %1, ...) {
%3 = tail call i32 @__get_array_size(i8* %0)
%4 = tail call i32 (...) @__infer_nondet_int()
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %2, %6
br label %6
7: ; preds = %2
ret i32 %4
}
/* Type definitions */
typedef int __u16;

/* Variables and functions */
int compare_ether_addr(const void *a, const void *b) {
  const __u16 *_a = a, *_b = b;
  ;
  return (_a[0] ^ _b[0]) | (_a[1] ^ _b[1]) | (_a[2] ^ _b[2]);
}


x86 assembly (clang, -O0):
<compare_ether_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
xor    (%rcx),%eax
mov    -0x18(%rbp),%rcx
mov    0x4(%rcx),%ecx
mov    -0x20(%rbp),%rdx
xor    0x4(%rdx),%ecx
or     %ecx,%eax
mov    -0x18(%rbp),%rcx
mov    0x8(%rcx),%ecx
mov    -0x20(%rbp),%rdx
xor    0x8(%rdx),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_ether_addr>:
mov    (%rsi),%eax
xor    (%rdi),%eax
mov    0x4(%rsi),%ecx
xor    0x4(%rdi),%ecx
or     %eax,%ecx
mov    0x8(%rsi),%eax
xor    0x8(%rdi),%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @compare_ether_addr(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %5
%12 = getelementptr inbounds i32, i32* %11, i64 0
%13 = load i32, i32* %12
%14 = load i32*, i32** %6
%15 = getelementptr inbounds i32, i32* %14, i64 0
%16 = load i32, i32* %15
%17 = xor i32 %13, %16
%18 = load i32*, i32** %5
%19 = getelementptr inbounds i32, i32* %18, i64 1
%20 = load i32, i32* %19
%21 = load i32*, i32** %6
%22 = getelementptr inbounds i32, i32* %21, i64 1
%23 = load i32, i32* %22
%24 = xor i32 %20, %23
%25 = or i32 %17, %24
%26 = load i32*, i32** %5
%27 = getelementptr inbounds i32, i32* %26, i64 2
%28 = load i32, i32* %27
%29 = load i32*, i32** %6
%30 = getelementptr inbounds i32, i32* %29, i64 2
%31 = load i32, i32* %30
%32 = xor i32 %28, %31
%33 = or i32 %25, %32
ret i32 %33
}

LLVM IR (-O2):
define i32 @compare_ether_addr(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = xor i32 %6, %5
%8 = getelementptr inbounds i8, i8* %0, i64 4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = getelementptr inbounds i8, i8* %1, i64 4
%12 = bitcast i8* %11 to i32*
%13 = load i32, i32* %12
%14 = xor i32 %13, %10
%15 = or i32 %14, %7
%16 = getelementptr inbounds i8, i8* %0, i64 8
%17 = bitcast i8* %16 to i32*
%18 = load i32, i32* %17
%19 = getelementptr inbounds i8, i8* %1, i64 8
%20 = bitcast i8* %19 to i32*
%21 = load i32, i32* %20
%22 = xor i32 %21, %18
%23 = or i32 %15, %22
ret i32 %23
}
short swap_short(short s) {
  do {
    register char c;
    c = ((char *)&s)[1];
    ((char *)&s)[1] = ((char *)&s)[0];
    ((char *)&s)[0] = c;
  } while (0);
  return (s);
}


x86 assembly (clang, -O0):
<swap_short>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x1(%rbp),%al
mov    %al,-0x3(%rbp)
mov    -0x2(%rbp),%al
mov    %al,-0x1(%rbp)
mov    -0x3(%rbp),%al
mov    %al,-0x2(%rbp)
movswl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_short>:
mov    %edi,%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define signext i16 @swap_short(i16 signext %0) {
%2 = alloca i16
%3 = alloca i8
store i16 %0, i16* %2
br label %4
4: ; preds = %1
%5 = bitcast i16* %2 to i8*
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %6
store i8 %7, i8* %3
%8 = bitcast i16* %2 to i8*
%9 = getelementptr inbounds i8, i8* %8, i64 0
%10 = load i8, i8* %9
%11 = bitcast i16* %2 to i8*
%12 = getelementptr inbounds i8, i8* %11, i64 1
store i8 %10, i8* %12
%13 = load i8, i8* %3
%14 = bitcast i16* %2 to i8*
%15 = getelementptr inbounds i8, i8* %14, i64 0
store i8 %13, i8* %15
br label %16
16: ; preds = %4
%17 = load i16, i16* %2
ret i16 %17
}

LLVM IR (-O2):
define signext i16 @swap_short(i16 signext %0) {
%2 = tail call i16 @llvm.bswap.i16(i16 %0)
ret i16 %2
}