#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
scalar_t__ stupid_sincos_x86_fpu(double);
int bench_stupid_sincos_x86_fpu() {
  int niter = 100000, i, j;
  double x = 0.5, y = 0;
  for (i = 0; i < niter; ++i) {
    for (j = 0; j < 4; ++j) {
      x += 1e-6;
      y += stupid_sincos_x86_fpu(x + 5 * (j & 1));
    }
  }
  if (y == 2.32132323232)
    niter--;
  return niter;
}


x86 assembly (clang, -O0):
<bench_stupid_sincos_x86_fpu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x186a0,-0x4(%rbp)
movsd  0xed9(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x20(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    11b5 <bench_stupid_sincos_x86_fpu+0xa5>
movl   $0x0,-0xc(%rbp)
cmpl   $0x4,-0xc(%rbp)
jge    11a2 <bench_stupid_sincos_x86_fpu+0x92>
movsd  0xeb0(%rip),%xmm0
addsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
mov    -0xc(%rbp),%eax
and    $0x1,%eax
imul   $0x5,%eax,%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
call   1030 <stupid_sincos_x86_fpu@plt>
cvtsi2sd %rax,%xmm0
addsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    114e <bench_stupid_sincos_x86_fpu+0x3e>
jmp    11a7 <bench_stupid_sincos_x86_fpu+0x97>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    113b <bench_stupid_sincos_x86_fpu+0x2b>
movsd  -0x20(%rbp),%xmm0
movsd  0xe46(%rip),%xmm1
ucomisd %xmm1,%xmm0
jne    11db <bench_stupid_sincos_x86_fpu+0xcb>
jp     11db <bench_stupid_sincos_x86_fpu+0xcb>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bench_stupid_sincos_x86_fpu>:
push   %rbx
sub    $0x10,%rsp
movsd  0xee3(%rip),%xmm0
movsd  %xmm0,(%rsp)
mov    $0x186a0,%ebx
xorpd  %xmm0,%xmm0
nopl   0x0(%rax,%rax,1)
movsd  %xmm0,0x8(%rsp)
movsd  (%rsp),%xmm1
movsd  0xec5(%rip),%xmm0
addsd  %xmm0,%xmm1
movsd  %xmm1,(%rsp)
movapd %xmm1,%xmm0
xorpd  %xmm1,%xmm1
addsd  %xmm1,%xmm0
call   1030 <stupid_sincos_x86_fpu@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
addsd  0x8(%rsp),%xmm0
movsd  %xmm0,0x8(%rsp)
movsd  (%rsp),%xmm0
addsd  0xe8a(%rip),%xmm0
movsd  %xmm0,(%rsp)
movsd  0xe85(%rip),%xmm1
addsd  %xmm1,%xmm0
call   1030 <stupid_sincos_x86_fpu@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
addsd  0x8(%rsp),%xmm0
movsd  %xmm0,0x8(%rsp)
movsd  (%rsp),%xmm0
addsd  0xe53(%rip),%xmm0
movsd  %xmm0,(%rsp)
addsd  0xe5e(%rip),%xmm0
call   1030 <stupid_sincos_x86_fpu@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
addsd  0x8(%rsp),%xmm0
movsd  %xmm0,0x8(%rsp)
movsd  (%rsp),%xmm0
addsd  0xe20(%rip),%xmm0
movsd  %xmm0,(%rsp)
addsd  0xe1b(%rip),%xmm0
call   1030 <stupid_sincos_x86_fpu@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
addsd  0x8(%rsp),%xmm0
add    $0xffffffff,%ebx
jne    1130 <bench_stupid_sincos_x86_fpu+0x20>
cmpeqsd 0xdfe(%rip),%xmm0
movq   %xmm0,%rax
add    $0x186a0,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @bench_stupid_sincos_x86_fpu() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca double
%5 = alloca double
store i32 100000, i32* %1
store double 5.000000e-01, double* %4
store double 0.000000e+00, double* %5
store i32 0, i32* %2
br label %6
6: ; preds = %31, %0
%7 = load i32, i32* %2
%8 = load i32, i32* %1
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %34
10: ; preds = %6
store i32 0, i32* %3
br label %11
11: ; preds = %27, %10
%12 = load i32, i32* %3
%13 = icmp slt i32 %12, 4
br i1 %13, label %14, label %30
14: ; preds = %11
%15 = load double, double* %4
%16 = fadd double %15, 0x3EB0C6F7A0B5ED8D
store double %16, double* %4
%17 = load double, double* %4
%18 = load i32, i32* %3
%19 = and i32 %18, 1
%20 = mul nsw i32 5, %19
%21 = sitofp i32 %20 to double
%22 = fadd double %17, %21
%23 = call i64 @stupid_sincos_x86_fpu(double %22)
%24 = sitofp i64 %23 to double
%25 = load double, double* %5
%26 = fadd double %25, %24
store double %26, double* %5
br label %27
27: ; preds = %14
%28 = load i32, i32* %3
%29 = add nsw i32 %28, 1
store i32 %29, i32* %3
br label %11
30: ; preds = %11
br label %31
31: ; preds = %30
%32 = load i32, i32* %2
%33 = add nsw i32 %32, 1
store i32 %33, i32* %2
br label %6
34: ; preds = %6
%35 = load double, double* %5
%36 = fcmp oeq double %35, 0x40029211EA321346
br i1 %36, label %37, label %40
37: ; preds = %34
%38 = load i32, i32* %1
%39 = add nsw i32 %38, -1
store i32 %39, i32* %1
br label %40
40: ; preds = %37, %34
%41 = load i32, i32* %1
ret i32 %41
}

LLVM IR (-O2):
define i32 @bench_stupid_sincos_x86_fpu() {
br label %1
1: ; preds = %0, %1
%2 = phi double [ 0.000000e+00, %0 ], [ %24, %1 ]
%3 = phi double [ 5.000000e-01, %0 ], [ %20, %1 ]
%4 = phi i32 [ 0, %0 ], [ %25, %1 ]
%5 = fadd double %3, 0x3EB0C6F7A0B5ED8D
%6 = fadd double %5, 0.000000e+00
%7 = tail call i64 @stupid_sincos_x86_fpu(double %6)
%8 = sitofp i64 %7 to double
%9 = fadd double %2, %8
%10 = fadd double %5, 0x3EB0C6F7A0B5ED8D
%11 = fadd double %10, 5.000000e+00
%12 = tail call i64 @stupid_sincos_x86_fpu(double %11)
%13 = sitofp i64 %12 to double
%14 = fadd double %9, %13
%15 = fadd double %10, 0x3EB0C6F7A0B5ED8D
%16 = fadd double %15, 0.000000e+00
%17 = tail call i64 @stupid_sincos_x86_fpu(double %16)
%18 = sitofp i64 %17 to double
%19 = fadd double %14, %18
%20 = fadd double %15, 0x3EB0C6F7A0B5ED8D
%21 = fadd double %20, 5.000000e+00
%22 = tail call i64 @stupid_sincos_x86_fpu(double %21)
%23 = sitofp i64 %22 to double
%24 = fadd double %19, %23
%25 = add nuw nsw i32 %4, 1
%26 = icmp eq i32 %25, 100000
br i1 %26, label %27, label %1
27: ; preds = %1
%28 = fcmp oeq double %24, 0x40029211EA321346
%29 = select i1 %28, i32 99999, i32 100000
ret i32 %29
}