long UART_OutByte(unsigned char data) {
  int counter = 0;
  int reg = 0;
  int reg2 = 0;
  ((reg) = *((volatile unsigned int *)((volatile unsigned int *)((0x92b06000) +
                                                                 0x14))));
  if (!(reg & 0x1e)) {
    do {
      ((reg) = *((volatile unsigned int *)((
           volatile unsigned int *)((0x92b06000) + 0x18))));
      ((reg2) = *((volatile unsigned int *)((
           volatile unsigned int *)((0x92b06000) + 0x20))));
      counter++;
    } while ((!(reg & 0x10) | (reg2 & 0x04)) && counter < 4000);
    if (counter < 4000) {
      (*((volatile unsigned int *)((volatile unsigned int *)((0x92b06000) +
                                                             0x00))) = (data));
      return 1;
    } else {
      return -1;
    }
  }
  return -1;
}


x86 assembly (clang, -O0):
<UART_OutByte>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x9(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    $0x92b06014,%eax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    $0x1e,%eax
cmp    $0x0,%eax
jne    11cd <UART_OutByte+0xcd>
jmp    113d <UART_OutByte+0x3d>
mov    $0x92b06018,%eax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    $0x92b06020,%eax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
and    $0x10,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%ecx
mov    -0x18(%rbp),%eax
and    $0x4,%eax
or     %eax,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x19(%rbp)
je     1190 <UART_OutByte+0x90>
cmpl   $0xfa0,-0x10(%rbp)
setl   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
test   $0x1,%al
jne    113d <UART_OutByte+0x3d>
cmpl   $0xfa0,-0x10(%rbp)
jge    11c0 <UART_OutByte+0xc0>
movzbl -0x9(%rbp),%ecx
mov    $0x92b06000,%eax
mov    %ecx,(%rax)
movq   $0x1,-0x8(%rbp)
jmp    11d5 <UART_OutByte+0xd5>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    11d5 <UART_OutByte+0xd5>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<UART_OutByte>:
mov    $0x92b06000,%r8d
mov    $0xffffffffffffffff,%rax
testl  $0x1e,0x14(%r8)
je     1118 <UART_OutByte+0x18>
ret
xor    %esi,%esi
nopw   0x0(%rax,%rax,1)
mov    %esi,%edx
mov    0x18(%r8),%esi
mov    0x20(%r8),%ecx
shr    $0x4,%esi
and    $0x1,%esi
and    $0x4,%ecx
or     %esi,%ecx
cmp    $0x1,%ecx
je     1145 <UART_OutByte+0x45>
lea    0x1(%rdx),%esi
cmp    $0xf9f,%edx
jb     1120 <UART_OutByte+0x20>
cmp    $0xf9e,%edx
ja     1117 <UART_OutByte+0x17>
movzbl %dil,%eax
mov    %eax,(%r8)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i64 @UART_OutByte(i8 zeroext %0) {
%2 = alloca i64
%3 = alloca i8
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i8 %0, i8* %3
store i32 0, i32* %4
store i32 0, i32* %5
store i32 0, i32* %6
%7 = load volatile i32, i32* inttoptr (i64 2461032468 to i32*)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = and i32 %8, 30
%10 = icmp ne i32 %9, 0
br i1 %10, label %39, label %11
11: ; preds = %1
br label %12
12: ; preds = %30, %11
%13 = load volatile i32, i32* inttoptr (i64 2461032472 to i32*)
store i32 %13, i32* %5
%14 = load volatile i32, i32* inttoptr (i64 2461032480 to i32*)
store i32 %14, i32* %6
%15 = load i32, i32* %4
%16 = add nsw i32 %15, 1
store i32 %16, i32* %4
br label %17
17: ; preds = %12
%18 = load i32, i32* %5
%19 = and i32 %18, 16
%20 = icmp ne i32 %19, 0
%21 = xor i1 %20, true
%22 = zext i1 %21 to i32
%23 = load i32, i32* %6
%24 = and i32 %23, 4
%25 = or i32 %22, %24
%26 = icmp ne i32 %25, 0
br i1 %26, label %27, label %30
27: ; preds = %17
%28 = load i32, i32* %4
%29 = icmp slt i32 %28, 4000
br label %30
30: ; preds = %27, %17
%31 = phi i1 [ false, %17 ], [ %29, %27 ]
br i1 %31, label %12, label %32
32: ; preds = %30
%33 = load i32, i32* %4
%34 = icmp slt i32 %33, 4000
br i1 %34, label %35, label %38
35: ; preds = %32
%36 = load i8, i8* %3
%37 = zext i8 %36 to i32
store volatile i32 %37, i32* inttoptr (i64 2461032448 to i32*)
store i64 1, i64* %2
br label %40
38: ; preds = %32
store i64 -1, i64* %2
br label %40
39: ; preds = %1
store i64 -1, i64* %2
br label %40
40: ; preds = %39, %38, %35
%41 = load i64, i64* %2
ret i64 %41
}

LLVM IR (-O2):
define i64 @UART_OutByte(i8 zeroext %0) {
%2 = load volatile i32, i32* inttoptr (i64 2461032468 to i32*)
%3 = and i32 %2, 30
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %20
5: ; preds = %1, %5
%6 = phi i32 [ %9, %5 ], [ 0, %1 ]
%7 = load volatile i32, i32* inttoptr (i64 2461032472 to i32*)
%8 = load volatile i32, i32* inttoptr (i64 2461032480 to i32*)
%9 = add nuw nsw i32 %6, 1
%10 = lshr i32 %7, 4
%11 = and i32 %10, 1
%12 = and i32 %8, 4
%13 = or i32 %11, %12
%14 = icmp ne i32 %13, 1
%15 = icmp ult i32 %6, 3999
%16 = select i1 %14, i1 %15, i1 false
br i1 %16, label %5, label %17
17: ; preds = %5
br i1 %15, label %18, label %20
18: ; preds = %17
%19 = zext i8 %0 to i32
store volatile i32 %19, i32* inttoptr (i64 2461032448 to i32*)
br label %20
20: ; preds = %1, %17, %18
%21 = phi i64 [ 1, %18 ], [ -1, %17 ], [ -1, %1 ]
ret i64 %21
}