void load_xmm(int i, void *v) {
  switch (i) {
  case 0:
    __asm__ volatile("movups %%xmm0, (%0)" ::"r"(v));
    break;
  case 1:
    __asm__ volatile("movups %%xmm1, (%0)" ::"r"(v));
    break;
  case 2:
    __asm__ volatile("movups %%xmm2, (%0)" ::"r"(v));
    break;
  case 3:
    __asm__ volatile("movups %%xmm3, (%0)" ::"r"(v));
    break;
  case 4:
    __asm__ volatile("movups %%xmm4, (%0)" ::"r"(v));
    break;
  case 5:
    __asm__ volatile("movups %%xmm5, (%0)" ::"r"(v));
    break;
  case 6:
    __asm__ volatile("movups %%xmm6, (%0)" ::"r"(v));
    break;
  case 7:
    __asm__ volatile("movups %%xmm7, (%0)" ::"r"(v));
    break;
  }
}


x86 assembly (clang, -O0):
<load_xmm>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %rax,-0x18(%rbp)
sub    $0x7,%rax
ja     118b <load_xmm+0x8b>
mov    -0x18(%rbp),%rax
lea    0xed9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x10(%rbp),%rax
movups %xmm0,(%rax)
jmp    118b <load_xmm+0x8b>
mov    -0x10(%rbp),%rax
movups %xmm1,(%rax)
jmp    118b <load_xmm+0x8b>
mov    -0x10(%rbp),%rax
movups %xmm2,(%rax)
jmp    118b <load_xmm+0x8b>
mov    -0x10(%rbp),%rax
movups %xmm3,(%rax)
jmp    118b <load_xmm+0x8b>
mov    -0x10(%rbp),%rax
movups %xmm4,(%rax)
jmp    118b <load_xmm+0x8b>
mov    -0x10(%rbp),%rax
movups %xmm5,(%rax)
jmp    118b <load_xmm+0x8b>
mov    -0x10(%rbp),%rax
movups %xmm6,(%rax)
jmp    118b <load_xmm+0x8b>
mov    -0x10(%rbp),%rax
movups %xmm7,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_xmm>:
cmp    $0x7,%edi
ja     1136 <load_xmm+0x36>
mov    %edi,%eax
lea    0xef2(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movups %xmm0,(%rsi)
ret
movups %xmm1,(%rsi)
ret
movups %xmm2,(%rsi)
ret
movups %xmm3,(%rsi)
ret
movups %xmm4,(%rsi)
ret
movups %xmm5,(%rsi)
ret
movups %xmm6,(%rsi)
ret
movups %xmm7,(%rsi)
ret

LLVM IR (-O0):
define void @load_xmm(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
switch i32 %5, label %22 [
i32 0, label %6
i32 1, label %8
i32 2, label %10
i32 3, label %12
i32 4, label %14
i32 5, label %16
i32 6, label %18
i32 7, label %20
]
6: ; preds = %2
%7 = load i8*, i8** %4
br label %22
8: ; preds = %2
%9 = load i8*, i8** %4
br label %22
10: ; preds = %2
%11 = load i8*, i8** %4
br label %22
12: ; preds = %2
%13 = load i8*, i8** %4
br label %22
14: ; preds = %2
%15 = load i8*, i8** %4
br label %22
16: ; preds = %2
%17 = load i8*, i8** %4
br label %22
18: ; preds = %2
%19 = load i8*, i8** %4
br label %22
20: ; preds = %2
%21 = load i8*, i8** %4
br label %22
22: ; preds = %2, %20, %18, %16, %14, %12, %10, %8, %6
ret void
}

LLVM IR (-O2):
define void @load_xmm(i32 %0, i8* %1) {
switch i32 %0, label %11 [
i32 0, label %3
i32 1, label %4
i32 2, label %5
i32 3, label %6
i32 4, label %7
i32 5, label %8
i32 6, label %9
i32 7, label %10
]
3: ; preds = %2
tail call void asm sideeffect "movups %xmm0, ($0)", "r,~{dirflag},~{fpsr},~{flags}"(i8* %1)
br label %11
4: ; preds = %2
tail call void asm sideeffect "movups %xmm1, ($0)", "r,~{dirflag},~{fpsr},~{flags}"(i8* %1)
br label %11
5: ; preds = %2
tail call void asm sideeffect "movups %xmm2, ($0)", "r,~{dirflag},~{fpsr},~{flags}"(i8* %1)
br label %11
6: ; preds = %2
tail call void asm sideeffect "movups %xmm3, ($0)", "r,~{dirflag},~{fpsr},~{flags}"(i8* %1)
br label %11
7: ; preds = %2
tail call void asm sideeffect "movups %xmm4, ($0)", "r,~{dirflag},~{fpsr},~{flags}"(i8* %1)
br label %11
8: ; preds = %2
tail call void asm sideeffect "movups %xmm5, ($0)", "r,~{dirflag},~{fpsr},~{flags}"(i8* %1)
br label %11
9: ; preds = %2
tail call void asm sideeffect "movups %xmm6, ($0)", "r,~{dirflag},~{fpsr},~{flags}"(i8* %1)
br label %11
10: ; preds = %2
tail call void asm sideeffect "movups %xmm7, ($0)", "r,~{dirflag},~{fpsr},~{flags}"(i8* %1)
br label %11
11: ; preds = %2, %10, %9, %8, %7, %6, %5, %4, %3
ret void
}