xunge/DecIR huggingface dataset:
long reverse(long x) {
  int num = 0;
  while (x) {
    int rem = x % 10;
    x = x / 10;
    num = num * 10 + rem;
  }
  return num;
}


x86 assembly (clang, -O0):
<reverse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     114e <reverse+0x4e>
mov    -0x8(%rbp),%rax
mov    $0xa,%ecx
cqto
idiv   %rcx
mov    %edx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    $0xa,%ecx
cqto
idiv   %rcx
mov    %rax,-0x8(%rbp)
imul   $0xa,-0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    110f <reverse+0xf>
movslq -0xc(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse>:
xor    %ecx,%ecx
test   %rdi,%rdi
je     1154 <reverse+0x54>
movabs $0x6666666666666667,%r8
66 66 66
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %rdi,%rax
imul   %r8
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x2,%rdx
add    %rax,%rdx
lea    (%rdx,%rdx,1),%eax
lea    (%rax,%rax,4),%eax
mov    %edi,%esi
sub    %eax,%esi
lea    (%rcx,%rcx,4),%eax
lea    (%rsi,%rax,2),%ecx
add    $0x9,%rdi
cmp    $0x12,%rdi
mov    %rdx,%rdi
ja     1120 <reverse+0x20>
movslq %ecx,%rcx
mov    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @reverse(i64 %0) {
%2 = alloca i64
%3 = alloca i32
%4 = alloca i32
store i64 %0, i64* %2
store i32 0, i32* %3
br label %5
5: ; preds = %8, %1
%6 = load i64, i64* %2
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %18
8: ; preds = %5
%9 = load i64, i64* %2
%10 = srem i64 %9, 10
%11 = trunc i64 %10 to i32
store i32 %11, i32* %4
%12 = load i64, i64* %2
%13 = sdiv i64 %12, 10
store i64 %13, i64* %2
%14 = load i32, i32* %3
%15 = mul nsw i32 %14, 10
%16 = load i32, i32* %4
%17 = add nsw i32 %15, %16
store i32 %17, i32* %3
br label %5
18: ; preds = %5
%19 = load i32, i32* %3
%20 = sext i32 %19 to i64
ret i64 %20
}

LLVM IR (-O2):
define i64 @reverse(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %15, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %10, %3 ], [ 0, %1 ]
%6 = srem i64 %4, 10
%7 = trunc i64 %6 to i32
%8 = sdiv i64 %4, 10
%9 = mul nsw i32 %5, 10
%10 = add nsw i32 %9, %7
%11 = add i64 %4, 9
%12 = icmp ult i64 %11, 19
br i1 %12, label %13, label %3
13: ; preds = %3
%14 = sext i32 %10 to i64
br label %15
15: ; preds = %13, %1
%16 = phi i64 [ 0, %1 ], [ %14, %13 ]
ret i64 %16
}
int test_imm_1Euint16_reg(unsigned short val) {
  return ((val) & (0x1E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Euint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x1e,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Euint16_reg>:
test   $0x1e,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Euint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 30
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_1Euint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 30
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ usleep(unsigned long);
void sleep_sec(double sec) {
  if (sec > 0)
    usleep((unsigned long)(sec * 1000000.0));
}


x86 assembly (clang, -O0):
<sleep_sec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    116b <sleep_sec+0x5b>
movsd  -0x8(%rbp),%xmm0
movsd  0xec4(%rip),%xmm1
mulsd  %xmm1,%xmm0
movaps %xmm0,%xmm1
cvttsd2si %xmm1,%rdi
mov    %rdi,%rcx
sar    $0x3f,%rcx
movsd  0xeb1(%rip),%xmm1
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rax
and    %rcx,%rax
or     %rax,%rdi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleep_sec>:
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    1146 <sleep_sec+0x36>
mulsd  0xede(%rip),%xmm0
cvttsd2si %xmm0,%rax
mov    %rax,%rcx
sar    $0x3f,%rcx
subsd  0xed2(%rip),%xmm0
cvttsd2si %xmm0,%rdi
and    %rcx,%rdi
or     %rax,%rdi
jmp    1030 <usleep@plt>
ret

LLVM IR (-O0):
define void @sleep_sec(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp ogt double %3, 0.000000e+00
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load double, double* %2
%7 = fmul double %6, 1.000000e+06
%8 = fptoui double %7 to i64
%9 = call i32 @usleep(i64 %8)
br label %10
10: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @sleep_sec(double %0) {
%2 = fcmp ogt double %0, 0.000000e+00
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = fmul double %0, 1.000000e+06
%5 = fptoui double %4 to i64
%6 = tail call i32 @usleep(i64 %5)
br label %7
7: ; preds = %3, %1
ret void
}
void ui_new_config(void) {}


x86 assembly (clang, -O0):
<ui_new_config>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ui_new_config>:
ret

LLVM IR (-O0):
define void @ui_new_config() {
ret void
}

LLVM IR (-O2):
define void @ui_new_config() {
ret void
}
void destroy_value(void *data) {
  int *value = data;
  *value = 2;
}


x86 assembly (clang, -O0):
<destroy_value>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<destroy_value>:
movl   $0x2,(%rdi)
ret

LLVM IR (-O0):
define void @destroy_value(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
store i32* %5, i32** %3
%6 = load i32*, i32** %3
store i32 2, i32* %6
ret void
}

LLVM IR (-O2):
define void @destroy_value(i8* nocapture writeonly %0) {
%2 = bitcast i8* %0 to i32*
store i32 2, i32* %2
ret void
}
void gdk_set_show_events() {}


x86 assembly (clang, -O0):
<gdk_set_show_events>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_set_show_events>:
ret

LLVM IR (-O0):
define void @gdk_set_show_events() {
ret void
}

LLVM IR (-O2):
define void @gdk_set_show_events() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(float *);
void free_lp(float *lp) { free(lp); }


x86 assembly (clang, -O0):
<free_lp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_lp>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_lp(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = call i32 @free(float* %3)
ret void
}

LLVM IR (-O2):
define void @free_lp(float* nocapture %0) {
%2 = tail call i32 @free(float* %0)
ret void
}
void default_interrupt_handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<default_interrupt_handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <default_interrupt_handler+0x9>
jmp    1109 <default_interrupt_handler+0x9>

x86 assembly (clang, -O2):
<default_interrupt_handler>:
jmp    1100 <default_interrupt_handler>

LLVM IR (-O0):
define void @default_interrupt_handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @default_interrupt_handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void __attribute__((weak)) __libnx_free(void *p) { free(p); }


x86 assembly (clang, -O0):
<__libnx_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__libnx_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define weak void @__libnx_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define weak void @__libnx_free(i8* %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int addi(long, long, long, long, int);
int subi(long x, long y, long min, long max, int needconst) {
  return addi(x, -y, min, max, needconst);
}


x86 assembly (clang, -O0):
<subi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
sub    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x24(%rbp),%r8d
call   1030 <addi@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<subi>:
neg    %rsi
jmp    1030 <addi@plt>

LLVM IR (-O0):
define i32 @subi(i64 %0, i64 %1, i64 %2, i64 %3, i32 %4) {
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
%10 = alloca i32
store i64 %0, i64* %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i64 %3, i64* %9
store i32 %4, i32* %10
%11 = load i64, i64* %6
%12 = load i64, i64* %7
%13 = sub nsw i64 0, %12
%14 = load i64, i64* %8
%15 = load i64, i64* %9
%16 = load i32, i32* %10
%17 = call i32 @addi(i64 %11, i64 %13, i64 %14, i64 %15, i32 %16)
ret i32 %17
}

LLVM IR (-O2):
define i32 @subi(i64 %0, i64 %1, i64 %2, i64 %3, i32 %4) {
%6 = sub nsw i64 0, %1
%7 = tail call i32 @addi(i64 %0, i64 %6, i64 %2, i64 %3, i32 %4)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ write_command_packet(int, int, int, int);
void idle(int n) {
  int i;
  for (i = 0; i < n; i++) {
    write_command_packet(0xa0, 0xa0, 0, 2);
    write_command_packet(0xa1, 0xa0, 1000000, 2);
  }
}


x86 assembly (clang, -O0):
<idle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1168 <idle+0x58>
mov    $0xa0,%esi
xor    %edx,%edx
mov    $0x2,%ecx
mov    %esi,%edi
call   1030 <write_command_packet@plt>
mov    $0xa1,%edi
mov    $0xa0,%esi
mov    $0xf4240,%edx
mov    $0x2,%ecx
call   1030 <write_command_packet@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <idle+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<idle>:
push   %rbx
test   %edi,%edi
jle    1154 <idle+0x44>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0xa0,%edi
mov    $0xa0,%esi
xor    %edx,%edx
mov    $0x2,%ecx
call   1030 <write_command_packet@plt>
mov    $0xa1,%edi
mov    $0xa0,%esi
mov    $0xf4240,%edx
mov    $0x2,%ecx
call   1030 <write_command_packet@plt>
add    $0xffffffff,%ebx
jne    1120 <idle+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @idle(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %14
8: ; preds = %4
%9 = call i32 @write_command_packet(i32 160, i32 160, i32 0, i32 2)
%10 = call i32 @write_command_packet(i32 161, i32 160, i32 1000000, i32 2)
br label %11
11: ; preds = %8
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @idle(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = tail call i32 @write_command_packet(i32 160, i32 160, i32 0, i32 2)
%6 = tail call i32 @write_command_packet(i32 161, i32 160, i32 1000000, i32 2)
%7 = add nuw nsw i32 %4, 1
%8 = icmp eq i32 %7, %0
br i1 %8, label %9, label %3
9: ; preds = %3, %1
ret void
}
int test_18(int a, int b) {
  return (a & 0x80000000) != (b & 0x80000000) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_18>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edx
and    $0x80000000,%edx
mov    -0x8(%rbp),%esi
and    $0x80000000,%esi
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    %esi,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_18>:
xor    %esi,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmovns %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_18(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = and i32 %5, -2147483648
%7 = load i32, i32* %4
%8 = and i32 %7, -2147483648
%9 = icmp ne i32 %6, %8
%10 = zext i1 %9 to i64
%11 = select i1 %9, i32 -20, i32 -40
ret i32 %11
}

LLVM IR (-O2):
define i32 @test_18(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
%4 = icmp sgt i32 %3, -1
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ HError(int, char *);
void MakeXGraf(char *wname, int x, int y, int w, int h, int bw) {
  HError(6870, "MakeXGraf: Not compiled with X11 support: use HGraf.X.c");
}


x86 assembly (clang, -O0):
<MakeXGraf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    %r9d,-0x1c(%rbp)
mov    $0x1ad6,%edi
lea    0xec7(%rip),%rsi
call   1030 <HError@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MakeXGraf>:
lea    0xee9(%rip),%rsi
mov    $0x1ad6,%edi
jmp    1030 <HError@plt>

LLVM IR (-O0):
@.str = [56 x i8] c"MakeXGraf: Not compiled with X11 support: use HGraf.X.c\00"
define void @MakeXGraf(i8* %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i8* %0, i8** %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = call i32 @HError(i32 6870, i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [56 x i8] c"MakeXGraf: Not compiled with X11 support: use HGraf.X.c\00"
define void @MakeXGraf(i8* nocapture readnone %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = tail call i32 @HError(i32 6870, i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0))
ret void
}
extern void out_be32(volatile unsigned int *addr, int val) {
  ((void)(void)((*(volatile unsigned int *)(addr)) = (val)));
}


x86 assembly (clang, -O0):
<out_be32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<out_be32>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @out_be32(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
store volatile i32 %5, i32* %6
ret void
}

LLVM IR (-O2):
define void @out_be32(i32* %0, i32 %1) {
store volatile i32 %1, i32* %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128d;

/* Variables and functions */
long long _mm_cvtsd_i64(int /*<<< orphan*/);
long long test_mm_cvtsd_i64(__m128d A) { return _mm_cvtsd_i64(A); }


x86 assembly (clang, -O0):
<test_mm_cvtsd_i64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_mm_cvtsd_i64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cvtsd_i64>:
jmp    1030 <_mm_cvtsd_i64@plt>

LLVM IR (-O0):
define i64 @test_mm_cvtsd_i64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @_mm_cvtsd_i64(i32 %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @test_mm_cvtsd_i64(i32 %0) {
%2 = tail call i64 @_mm_cvtsd_i64(i32 %0)
ret i64 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ *, int);
uint64_t load64(uint8_t *b) {
  uint64_t x;
  memcpy(&x, b, 8);
  return x;
}


x86 assembly (clang, -O0):
<load64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdi
mov    $0x8,%edx
call   1030 <memcpy@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<load64>:
push   %rax
mov    %rdi,%rsi
lea    0x4(%rsp),%rdi
mov    $0x8,%edx
call   1030 <memcpy@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @load64(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @memcpy(i32* %3, i32* %4, i32 8)
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @load64(i32* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @memcpy(i32* %2, i32* %0, i32 8)
%5 = load i32, i32* %2
ret i32 %5
}
/* Type definitions */
typedef unsigned long uint32_t;

/* Variables and functions */
void SHAMD5ConfigSet(uint32_t ui32Base, uint32_t ui32Mode) {
  ;

  ;
  (*((volatile unsigned long *)(ui32Base + 0x00000044))) = ui32Mode;
}


x86 assembly (clang, -O0):
<SHAMD5ConfigSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x44(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAMD5ConfigSet>:
mov    %rsi,0x44(%rdi)
ret

LLVM IR (-O0):
define void @SHAMD5ConfigSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add i64 %6, 68
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @SHAMD5ConfigSet(i64 %0, i64 %1) {
%3 = add i64 %0, 68
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}
int cvmx_pko_get_base_queue_per_core(int port, int core) { return port; }


x86 assembly (clang, -O0):
<cvmx_pko_get_base_queue_per_core>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvmx_pko_get_base_queue_per_core>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @cvmx_pko_get_base_queue_per_core(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
ret i32 %5
}

LLVM IR (-O2):
define i32 @cvmx_pko_get_base_queue_per_core(i32 returned %0, i32 %1) {
ret i32 %0
}
void vnum_test1(int *data) { data[0] = data[1] * data[3] - data[1] * data[3]; }


x86 assembly (clang, -O0):
<vnum_test1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%ecx
mov    -0x8(%rbp),%rax
imul   0xc(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
mov    -0x8(%rbp),%rdx
imul   0xc(%rdx),%eax
sub    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vnum_test1>:
movl   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @vnum_test1(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 1
%5 = load i32, i32* %4
%6 = load i32*, i32** %2
%7 = getelementptr inbounds i32, i32* %6, i64 3
%8 = load i32, i32* %7
%9 = mul nsw i32 %5, %8
%10 = load i32*, i32** %2
%11 = getelementptr inbounds i32, i32* %10, i64 1
%12 = load i32, i32* %11
%13 = load i32*, i32** %2
%14 = getelementptr inbounds i32, i32* %13, i64 3
%15 = load i32, i32* %14
%16 = mul nsw i32 %12, %15
%17 = sub nsw i32 %9, %16
%18 = load i32*, i32** %2
%19 = getelementptr inbounds i32, i32* %18, i64 0
store i32 %17, i32* %19
ret void
}

LLVM IR (-O2):
define void @vnum_test1(i32* nocapture writeonly %0) {
store i32 0, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ heap_clean();
int /*<<< orphan*/ printf(char *);
void sigint_handler(int signum) {
  heap_clean();
  printf("\nBye Bye!\n");
  exit(EXIT_SUCCESS);
  return;
}


x86 assembly (clang, -O0):
<sigint_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <heap_clean@plt>
lea    0xeb7(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e8b(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<sigint_handler>:
push   %rax
xor    %eax,%eax
call   1040 <heap_clean@plt>
lea    0xec1(%rip),%rdi
call   1030 <puts@plt>
mov    0x2e95(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"\0ABye Bye!\0A\00"
@EXIT_SUCCESS = global i32 0
define void @sigint_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @heap_clean()
%4 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* @EXIT_SUCCESS
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
@str = [10 x i8] c"\0ABye Bye!\00"
define void @sigint_handler(i32 %0) {
%2 = tail call i32 (...) @heap_clean()
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0))
%4 = load i32, i32* @EXIT_SUCCESS
%5 = tail call i32 @exit(i32 %4)
unreachable
}
int test_imm_1Buint8_reg(unsigned char val) {
  return ((val) & (0x1B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Buint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0x1b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Buint8_reg>:
test   $0x1b,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Buint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 27
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_1Buint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 27
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct BoolExpr {
  int dummy;
};

/* Variables and functions */
struct BoolExpr *_eq_new(size_t, struct BoolExpr **);
struct BoolExpr *BX_Equal(size_t n, struct BoolExpr **xs) {
  return _eq_new(n, xs);
}


x86 assembly (clang, -O0):
<BX_Equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <_eq_new@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BX_Equal>:
jmp    1030 <_eq_new@plt>

LLVM IR (-O0):
%struct.BoolExpr = type { i32 }
define %struct.BoolExpr* @BX_Equal(i64 %0, %struct.BoolExpr** %1) {
%3 = alloca i64
%4 = alloca %struct.BoolExpr**
store i64 %0, i64* %3
store %struct.BoolExpr** %1, %struct.BoolExpr*** %4
%5 = load i64, i64* %3
%6 = load %struct.BoolExpr**, %struct.BoolExpr*** %4
%7 = call %struct.BoolExpr* @_eq_new(i64 %5, %struct.BoolExpr** %6)
ret %struct.BoolExpr* %7
}

LLVM IR (-O2):
%struct.BoolExpr = type { i32 }
define %struct.BoolExpr* @BX_Equal(i64 %0, %struct.BoolExpr** %1) {
%3 = tail call %struct.BoolExpr* @_eq_new(i64 %0, %struct.BoolExpr** %1)
ret %struct.BoolExpr* %3
}
/* Variables and functions */
int /*<<< orphan*/ kitsune_register_var(char *, char *, char *,
                                        int /*<<< orphan*/, char *, int, int);
int /*<<< orphan*/ printf(char *);
void __kitsune_register_symbols(void) {
  printf("mainv1: inside kit_reg_symbols, calling kit_reg_var\n");
  kitsune_register_var("buf_num", "ObfuscateIpToText", "mainv1.c", 0, "mainv1",
                       10, 1);
}


x86 assembly (clang, -O0):
<__kitsune_register_symbols>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
lea    0xefa(%rip),%rdi
lea    0xefb(%rip),%rsi
lea    0xf06(%rip),%rdx
xor    %ecx,%ecx
lea    0xf06(%rip),%r8
mov    $0xa,%r9d
movl   $0x1,(%rsp)
call   1040 <kitsune_register_var@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__kitsune_register_symbols>:
push   %rax
lea    0xf02(%rip),%rdi
call   1030 <puts@plt>
movl   $0x1,(%rsp)
lea    0xec5(%rip),%rdi
lea    0xec6(%rip),%rsi
lea    0xed1(%rip),%rdx
lea    0xed3(%rip),%r8
xor    %ecx,%ecx
mov    $0xa,%r9d
call   1040 <kitsune_register_var@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [53 x i8] c"mainv1: inside kit_reg_symbols, calling kit_reg_var\0A\00"
@.str.1 = [8 x i8] c"buf_num\00"
@.str.2 = [18 x i8] c"ObfuscateIpToText\00"
@.str.3 = [9 x i8] c"mainv1.c\00"
@.str.4 = [7 x i8] c"mainv1\00"
define void @__kitsune_register_symbols() {
%1 = call i32 @printf(i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @kitsune_register_var(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.3, i64 0, i64 0), i32 0, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.4, i64 0, i64 0), i32 10, i32 1)
ret void
}

LLVM IR (-O2):
@.str.1 = [8 x i8] c"buf_num\00"
@.str.2 = [18 x i8] c"ObfuscateIpToText\00"
@.str.3 = [9 x i8] c"mainv1.c\00"
@.str.4 = [7 x i8] c"mainv1\00"
@str = [52 x i8] c"mainv1: inside kit_reg_symbols, calling kit_reg_var\00"
define void @__kitsune_register_symbols() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([52 x i8], [52 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @kitsune_register_var(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.3, i64 0, i64 0), i32 0, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.4, i64 0, i64 0), i32 10, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void command(int a) { printf("geez"); }


x86 assembly (clang, -O0):
<command>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<command>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"geez\00"
define void @command(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"geez\00"
define void @command(i32 %0) {
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}
void ProcessPlugins(int dummy __attribute__((unused))) {}


x86 assembly (clang, -O0):
<ProcessPlugins>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ProcessPlugins>:
ret

LLVM IR (-O0):
define void @ProcessPlugins(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @ProcessPlugins(i32 %0) {
ret void
}
/* Variables and functions */
float babl_pow_1_24f(float);
float babl_linear_to_gamma_2_2f(float value) {
  if (value > 0.003130804954f)
    return 1.055f * babl_pow_1_24f(value) - 0.055f;
  return 12.92f * value;
}


x86 assembly (clang, -O0):
<babl_linear_to_gamma_2_2f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
movss  0xed6(%rip),%xmm1
ucomiss %xmm1,%xmm0
jbe    115f <babl_linear_to_gamma_2_2f+0x4f>
movss  -0x8(%rbp),%xmm0
call   1030 <babl_pow_1_24f@plt>
movss  0xec3(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xebb(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1171 <babl_linear_to_gamma_2_2f+0x61>
movss  0xe9d(%rip),%xmm0
mulss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<babl_linear_to_gamma_2_2f>:
push   %rax
ucomiss 0xee8(%rip),%xmm0
jbe    1131 <babl_linear_to_gamma_2_2f+0x21>
call   1030 <babl_pow_1_24f@plt>
mulss  0xee1(%rip),%xmm0
addss  0xedd(%rip),%xmm0
pop    %rax
ret
mulss  0xecb(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @babl_linear_to_gamma_2_2f(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = fcmp ogt float %4, 0x3F69A5C620000000
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load float, float* %3
%8 = call float @babl_pow_1_24f(float %7)
%9 = call float @llvm.fmuladd.f32(float 0x3FF0E147A0000000, float %8, float 0xBFAC28F5C0000000)
store float %9, float* %2
br label %13
10: ; preds = %1
%11 = load float, float* %3
%12 = fmul float 0x4029D70A40000000, %11
store float %12, float* %2
br label %13
13: ; preds = %10, %6
%14 = load float, float* %2
ret float %14
}

LLVM IR (-O2):
define float @babl_linear_to_gamma_2_2f(float %0) {
%2 = fcmp ogt float %0, 0x3F69A5C620000000
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = tail call float @babl_pow_1_24f(float %0)
%5 = tail call float @llvm.fmuladd.f32(float %4, float 0x3FF0E147A0000000, float 0xBFAC28F5C0000000)
br label %8
6: ; preds = %1
%7 = fmul float %0, 0x4029D70A40000000
br label %8
8: ; preds = %6, %3
%9 = phi float [ %5, %3 ], [ %7, %6 ]
ret float %9
}
int qsort_cmp_QUEUE_ID(const void *x, const void *y) {
  if (*((int *)x) < *((int *)y))
    return (-1);
  else
    return (*((int *)x) > *((int *)y));
}


x86 assembly (clang, -O0):
<qsort_cmp_QUEUE_ID>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
jge    112a <qsort_cmp_QUEUE_ID+0x2a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1141 <qsort_cmp_QUEUE_ID+0x41>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<qsort_cmp_QUEUE_ID>:
mov    (%rdi),%eax
xor    %ecx,%ecx
cmp    (%rsi),%eax
setg   %cl
mov    $0xffffffff,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @qsort_cmp_QUEUE_ID(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i32*
%8 = load i32, i32* %7
%9 = load i8*, i8** %5
%10 = bitcast i8* %9 to i32*
%11 = load i32, i32* %10
%12 = icmp slt i32 %8, %11
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 -1, i32* %3
br label %23
14: ; preds = %2
%15 = load i8*, i8** %4
%16 = bitcast i8* %15 to i32*
%17 = load i32, i32* %16
%18 = load i8*, i8** %5
%19 = bitcast i8* %18 to i32*
%20 = load i32, i32* %19
%21 = icmp sgt i32 %17, %20
%22 = zext i1 %21 to i32
store i32 %22, i32* %3
br label %23
23: ; preds = %14, %13
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @qsort_cmp_QUEUE_ID(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp slt i32 %4, %6
%8 = icmp sgt i32 %4, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
char *GraphErrorMsg(int ErrorCode) { return "Test!"; }


x86 assembly (clang, -O0):
<GraphErrorMsg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
lea    0xef2(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GraphErrorMsg>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"Test!\00"
define i8* @GraphErrorMsg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"Test!\00"
define i8* @GraphErrorMsg(i32 %0) {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct katcl_parse {
  int dummy;
};

/* Variables and functions */
int is_type_parse_katcl(struct katcl_parse *, char);
int is_request_parse_katcl(struct katcl_parse *p) {
  return is_type_parse_katcl(p, '?');
}


x86 assembly (clang, -O0):
<is_request_parse_katcl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x3f,%esi
call   1030 <is_type_parse_katcl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_request_parse_katcl>:
mov    $0x3f,%esi
jmp    1030 <is_type_parse_katcl@plt>

LLVM IR (-O0):
%struct.katcl_parse = type { i32 }
define i32 @is_request_parse_katcl(%struct.katcl_parse* %0) {
%2 = alloca %struct.katcl_parse*
store %struct.katcl_parse* %0, %struct.katcl_parse** %2
%3 = load %struct.katcl_parse*, %struct.katcl_parse** %2
%4 = call i32 @is_type_parse_katcl(%struct.katcl_parse* %3, i8 signext 63)
ret i32 %4
}

LLVM IR (-O2):
%struct.katcl_parse = type { i32 }
define i32 @is_request_parse_katcl(%struct.katcl_parse* %0) {
%2 = tail call i32 @is_type_parse_katcl(%struct.katcl_parse* %0, i8 signext 63)
ret i32 %2
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ MFRC522_CalculateCRC(int *, int, int *);
int /*<<< orphan*/ MFRC522_ToCard(int, int *, int, int *, int /*<<< orphan*/ *);
void MFRC522_WakeUp(void) {
  uint16_t unLen;
  uint8_t buff[4];
  buff[0] = 0x50;
  buff[1] = 0;
  MFRC522_CalculateCRC(buff, 2, &buff[2]);
  MFRC522_ToCard(0x0C, buff, 4, buff, &unLen);
}


x86 assembly (clang, -O0):
<MFRC522_WakeUp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x50,-0x20(%rbp)
movl   $0x0,-0x1c(%rbp)
lea    -0x20(%rbp),%rdi
lea    -0x20(%rbp),%rdx
add    $0x8,%rdx
mov    $0x2,%esi
call   1040 <MFRC522_CalculateCRC@plt>
lea    -0x20(%rbp),%rsi
lea    -0x20(%rbp),%rcx
mov    $0xc,%edi
mov    $0x4,%edx
lea    -0x4(%rbp),%r8
call   1030 <MFRC522_ToCard@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MFRC522_WakeUp>:
push   %rbx
sub    $0x20,%rsp
movq   $0x50,0x10(%rsp)
lea    0x18(%rsp),%rdx
lea    0x10(%rsp),%rbx
mov    %rbx,%rdi
mov    $0x2,%esi
call   1040 <MFRC522_CalculateCRC@plt>
lea    0xc(%rsp),%r8
mov    $0xc,%edi
mov    %rbx,%rsi
mov    $0x4,%edx
mov    %rbx,%rcx
call   1030 <MFRC522_ToCard@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @MFRC522_WakeUp() {
%1 = alloca i32
%2 = alloca [4 x i32]
%3 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 0, i64 0
store i32 80, i32* %3
%4 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 0, i64 1
store i32 0, i32* %4
%5 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 0, i64 0
%6 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 0, i64 2
%7 = call i32 @MFRC522_CalculateCRC(i32* %5, i32 2, i32* %6)
%8 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 0, i64 0
%9 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 0, i64 0
%10 = call i32 @MFRC522_ToCard(i32 12, i32* %8, i32 4, i32* %9, i32* %1)
ret void
}

LLVM IR (-O2):
define void @MFRC522_WakeUp() {
%1 = alloca i32
%2 = alloca [4 x i32]
%3 = bitcast i32* %1 to i8*
%4 = bitcast [4 x i32]* %2 to i8*
%5 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 0, i64 0
store i32 80, i32* %5
%6 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 0, i64 1
store i32 0, i32* %6
%7 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 0, i64 2
%8 = call i32 @MFRC522_CalculateCRC(i32* %5, i32 2, i32* %7)
%9 = call i32 @MFRC522_ToCard(i32 12, i32* %5, i32 4, i32* %5, i32* %1)
ret void
}
/* Variables and functions */
int cReadEdgeFace(int, char **);
int ReadEdgeFace(int argc, char *argv[]) { return cReadEdgeFace(argc, argv); }


x86 assembly (clang, -O0):
<ReadEdgeFace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <cReadEdgeFace@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReadEdgeFace>:
jmp    1030 <cReadEdgeFace@plt>

LLVM IR (-O0):
define i32 @ReadEdgeFace(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i8**, i8*** %4
%7 = call i32 @cReadEdgeFace(i32 %5, i8** %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @ReadEdgeFace(i32 %0, i8** %1) {
%3 = tail call i32 @cReadEdgeFace(i32 %0, i8** %1)
ret i32 %3
}
/* Variables and functions */
double sqrt(double);
double hypot3d(double x, double y, double z) {
  return sqrt(x * x + y * y + z * z);
}


x86 assembly (clang, -O0):
<hypot3d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm2
movsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hypot3d>:
mulsd  %xmm1,%xmm1
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
mulsd  %xmm2,%xmm2
addsd  %xmm0,%xmm2
xorpd  %xmm0,%xmm0
ucomisd %xmm0,%xmm2
jb     1136 <hypot3d+0x26>
xorps  %xmm0,%xmm0
sqrtsd %xmm2,%xmm0
ret
movapd %xmm2,%xmm0
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @hypot3d(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %4
%9 = load double, double* %5
%10 = load double, double* %5
%11 = fmul double %9, %10
%12 = call double @llvm.fmuladd.f64(double %7, double %8, double %11)
%13 = load double, double* %6
%14 = load double, double* %6
%15 = call double @llvm.fmuladd.f64(double %13, double %14, double %12)
%16 = call double @sqrt(double %15)
ret double %16
}

LLVM IR (-O2):
define double @hypot3d(double %0, double %1, double %2) {
%4 = fmul double %1, %1
%5 = tail call double @llvm.fmuladd.f64(double %0, double %0, double %4)
%6 = tail call double @llvm.fmuladd.f64(double %2, double %2, double %5)
%7 = tail call double @sqrt(double %6)
ret double %7
}
void INT_Excep_PERIB_INTB163(void) {}


x86 assembly (clang, -O0):
<INT_Excep_PERIB_INTB163>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_PERIB_INTB163>:
ret

LLVM IR (-O0):
define void @INT_Excep_PERIB_INTB163() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_PERIB_INTB163() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exchange(int, int);
int /*<<< orphan*/ printf(char *, ...);
void main() {
  int a, b;
  a = 5;
  b = 7;
  printf("From main: a = %d, b = %d\n", a, b);
  exchange(a, b);
  printf("Back in main: ");
  printf("a = %d, b = %d\n", a, b);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x5,-0x4(%rbp)
movl   $0x7,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xebd(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <exchange@plt>
lea    0xebf(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xe9b(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
mov    $0x5,%esi
mov    $0x7,%edx
xor    %eax,%eax
call   1030 <printf@plt>
mov    $0x5,%edi
mov    $0x7,%esi
call   1040 <exchange@plt>
lea    0xecc(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xeae(%rip),%rdi
mov    $0x5,%esi
mov    $0x7,%edx
xor    %eax,%eax
pop    %rcx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"From main: a = %d, b = %d\0A\00"
@.str.1 = [15 x i8] c"Back in main: \00"
@.str.2 = [16 x i8] c"a = %d, b = %d\0A\00"
define void @main() {
%1 = alloca i32
%2 = alloca i32
store i32 5, i32* %1
store i32 7, i32* %2
%3 = load i32, i32* %1
%4 = load i32, i32* %2
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %4)
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = call i32 @exchange(i32 %6, i32 %7)
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
%10 = load i32, i32* %1
%11 = load i32, i32* %2
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i64 0, i64 0), i32 %10, i32 %11)
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"From main: a = %d, b = %d\0A\00"
@.str.1 = [15 x i8] c"Back in main: \00"
@.str.2 = [16 x i8] c"a = %d, b = %d\0A\00"
define void @main() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 5, i32 7)
%2 = tail call i32 @exchange(i32 5, i32 7)
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i64 0, i64 0), i32 5, i32 7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Hello World! And Second! And Forth!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [37 x i8] c"Hello World! And Second! And Forth!\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [36 x i8] c"Hello World! And Second! And Forth!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int marshal_opaque(unsigned char *data, unsigned char **out, size_t *size) {
  if (*size < 1)
    return -1;
  *(*out) = *data;
  (*size) -= 1;
  (*out) += 1;
  return 0;
}


x86 assembly (clang, -O0):
<marshal_opaque>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmpq   $0x1,(%rax)
jae    112a <marshal_opaque+0x2a>
movl   $0xffffffff,-0x4(%rbp)
jmp    115c <marshal_opaque+0x5c>
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    %cl,(%rax)
mov    -0x20(%rbp),%rax
mov    (%rax),%rcx
sub    $0x1,%rcx
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<marshal_opaque>:
cmpq   $0x0,(%rdx)
je     1118 <marshal_opaque+0x18>
mov    (%rdi),%al
mov    (%rsi),%rcx
mov    %al,(%rcx)
addq   $0xffffffffffffffff,(%rdx)
addq   $0x1,(%rsi)
xor    %eax,%eax
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @marshal_opaque(i8* %0, i8** %1, i64* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8**
%7 = alloca i64*
store i8* %0, i8** %5
store i8** %1, i8*** %6
store i64* %2, i64** %7
%8 = load i64*, i64** %7
%9 = load i64, i64* %8
%10 = icmp ult i64 %9, 1
br i1 %10, label %11, label %12
11: ; preds = %3
store i32 -1, i32* %4
br label %23
12: ; preds = %3
%13 = load i8*, i8** %5
%14 = load i8, i8* %13
%15 = load i8**, i8*** %6
%16 = load i8*, i8** %15
store i8 %14, i8* %16
%17 = load i64*, i64** %7
%18 = load i64, i64* %17
%19 = sub i64 %18, 1
store i64 %19, i64* %17
%20 = load i8**, i8*** %6
%21 = load i8*, i8** %20
%22 = getelementptr inbounds i8, i8* %21, i64 1
store i8* %22, i8** %20
store i32 0, i32* %4
br label %23
23: ; preds = %12, %11
%24 = load i32, i32* %4
ret i32 %24
}

LLVM IR (-O2):
define i32 @marshal_opaque(i8* nocapture %0, i8** nocapture %1, i64* nocapture %2) {
%4 = load i64, i64* %2
%5 = icmp eq i64 %4, 0
br i1 %5, label %13, label %6
6: ; preds = %3
%7 = load i8, i8* %0
%8 = load i8*, i8** %1
store i8 %7, i8* %8
%9 = load i64, i64* %2
%10 = add i64 %9, -1
store i64 %10, i64* %2
%11 = load i8*, i8** %1
%12 = getelementptr inbounds i8, i8* %11, i64 1
store i8* %12, i8** %1
br label %13
13: ; preds = %3, %6
%14 = phi i32 [ 0, %6 ], [ -1, %3 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned char, unsigned char, unsigned char);
int main(void) {
  unsigned char a = 1;
  unsigned char b = 4;
  unsigned char c = a + b;
  while (1) {
    printf("%u + %u = %u \n", a, b, c);
    printf("%c + %c = %c \n", a, b, c);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movb   $0x1,-0x5(%rbp)
movb   $0x4,-0x6(%rbp)
movzbl -0x5(%rbp),%eax
movzbl -0x6(%rbp),%ecx
add    %ecx,%eax
mov    %al,-0x7(%rbp)
mov    -0x5(%rbp),%cl
mov    -0x6(%rbp),%al
lea    0xebf(%rip),%rdi
movzbl %cl,%esi
movzbl %al,%edx
movzbl -0x7(%rbp),%ecx
call   1030 <printf@plt>
mov    -0x5(%rbp),%cl
mov    -0x6(%rbp),%al
lea    0xeb2(%rip),%rdi
movzbl %cl,%esi
movzbl %al,%edx
movzbl -0x7(%rbp),%ecx
call   1030 <printf@plt>
jmp    1134 <main+0x24>

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0xee5(%rip),%r14
lea    0xeed(%rip),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %r14,%rdi
mov    $0x1,%esi
mov    $0x4,%edx
mov    $0x5,%ecx
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
mov    $0x4,%edx
mov    $0x5,%ecx
call   1030 <printf@plt>
jmp    1130 <main+0x20>

LLVM IR (-O0):
@.str = [15 x i8] c"%u + %u = %u \0A\00"
@.str.1 = [15 x i8] c"%c + %c = %c \0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i8
%4 = alloca i8
store i32 0, i32* %1
store i8 1, i8* %2
store i8 4, i8* %3
%5 = load i8, i8* %2
%6 = zext i8 %5 to i32
%7 = load i8, i8* %3
%8 = zext i8 %7 to i32
%9 = add nsw i32 %6, %8
%10 = trunc i32 %9 to i8
store i8 %10, i8* %4
br label %11
11: ; preds = %0, %11
%12 = load i8, i8* %2
%13 = load i8, i8* %3
%14 = load i8, i8* %4
%15 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8 zeroext %12, i8 zeroext %13, i8 zeroext %14)
%16 = load i8, i8* %2
%17 = load i8, i8* %3
%18 = load i8, i8* %4
%19 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i8 zeroext %16, i8 zeroext %17, i8 zeroext %18)
br label %11
}

LLVM IR (-O2):
@.str = [15 x i8] c"%u + %u = %u \0A\00"
@.str.1 = [15 x i8] c"%c + %c = %c \0A\00"
define i32 @main() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8 zeroext 1, i8 zeroext 4, i8 zeroext 5)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i8 zeroext 1, i8 zeroext 4, i8 zeroext 5)
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ ssort(char *);
main() {
  char msg[] = "Hello World";
  printf("%s \n", msg);
  ssort(msg);
  printf("%s \n", msg);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xed1(%rip),%rax
mov    %rax,-0xc(%rbp)
mov    0xecf(%rip),%eax
mov    %eax,-0x4(%rbp)
lea    -0xc(%rbp),%rsi
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
lea    -0xc(%rbp),%rdi
call   1040 <ssort@plt>
lea    -0xc(%rbp),%rsi
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
sub    $0x18,%rsp
movabs $0x6f57206f6c6c6548,%rax
20 57 6f
mov    %rax,0x8(%rsp)
movl   $0x646c72,0x10(%rsp)
lea    0xec7(%rip),%r14
lea    0x8(%rsp),%rbx
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1040 <ssort@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@__const.main.msg = [12 x i8] c"Hello World\00"
@.str = [5 x i8] c"%s \0A\00"
define i32 @main() {
%1 = alloca [12 x i8]
%2 = bitcast [12 x i8]* %1 to i8*
%3 = getelementptr inbounds [12 x i8], [12 x i8]* %1, i64 0, i64 0
%4 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = getelementptr inbounds [12 x i8], [12 x i8]* %1, i64 0, i64 0
%6 = call i32 @ssort(i8* %5)
%7 = getelementptr inbounds [12 x i8], [12 x i8]* %1, i64 0, i64 0
%8 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %7)
ret i32 0
}

LLVM IR (-O2):
@__const.main.msg = [12 x i8] c"Hello World\00"
@.str = [5 x i8] c"%s \0A\00"
define i32 @main() {
%1 = alloca [12 x i8]
%2 = getelementptr inbounds [12 x i8], [12 x i8]* %1, i64 0, i64 0
%3 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = call i32 @ssort(i8* %2)
%5 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %2)
ret i32 0
}