xunge/DecIR huggingface dataset:
int fib(int n) {
  if (n < 2)
    return (n);
  else {
    int x, y;
    x = fib(n - 1);
    y = fib(n - 2);
    return (x + y);
  }
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    1130 <fib+0x20>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1155 <fib+0x45>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x2,%edi
jge    1120 <fib+0x10>
mov    %ebx,%ecx
jmp    1144 <fib+0x34>
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    -0x1(%rbx),%edi
call   1030 <fib@plt>
lea    -0x2(%rbx),%ecx
add    %eax,%ebp
cmp    $0x3,%ebx
mov    %ecx,%ebx
ja     1130 <fib+0x20>
add    %ecx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 2
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i32, i32* %3
store i32 %9, i32* %2
br label %20
10: ; preds = %1
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 1
%13 = call i32 @fib(i32 %12)
store i32 %13, i32* %4
%14 = load i32, i32* %3
%15 = sub nsw i32 %14, 2
%16 = call i32 @fib(i32 %15)
store i32 %16, i32* %5
%17 = load i32, i32* %4
%18 = load i32, i32* %5
%19 = add nsw i32 %17, %18
store i32 %19, i32* %2
br label %20
20: ; preds = %10, %8
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %9, %3 ]
%13 = phi i32 [ %0, %1 ], [ %8, %3 ]
%14 = add nsw i32 %13, %12
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
void init() { srand(time(NULL)); }


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @init() {
%1 = call i32 @time(i32* null)
%2 = call i32 @srand(i32 %1)
ret void
}

LLVM IR (-O2):
define void @init() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 @srand(i32 %1)
ret void
}
/* Type definitions */
typedef int int64_t;
typedef int int32_t;

/* Variables and functions */
int32_t scale_sample_s24le(int32_t s, int vol) {
  int64_t sample = s;
  if (sample < 0) {
    sample = (sample * vol - 65536 / 2) / 65536;
    if (sample < -0x800000)
      sample = -0x800000;
  } else {
    sample = (sample * vol + 65536 / 2) / 65536;
    if (sample > 0x7fffff)
      sample = 0x7fffff;
  }
  return sample;
}


x86 assembly (clang, -O0):
<scale_sample_s24le>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    114a <scale_sample_s24le+0x4a>
mov    -0xc(%rbp),%eax
imul   -0x8(%rbp),%eax
sub    $0x8000,%eax
mov    $0x10000,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
cmpl   $0xff800000,-0xc(%rbp)
jge    1145 <scale_sample_s24le+0x45>
movl   $0xff800000,-0xc(%rbp)
jmp    117a <scale_sample_s24le+0x7a>
mov    -0xc(%rbp),%eax
imul   -0x8(%rbp),%eax
add    $0x8000,%eax
mov    $0x10000,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
cmpl   $0x7fffff,-0xc(%rbp)
jle    1175 <scale_sample_s24le+0x75>
movl   $0x7fffff,-0xc(%rbp)
jmp    117a <scale_sample_s24le+0x7a>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scale_sample_s24le>:
imul   %edi,%esi
not    %edi
shr    $0xf,%edi
and    $0x10000,%edi
lea    (%rdi,%rsi,1),%ecx
add    $0xffff8000,%ecx
lea    (%rdi,%rsi,1),%eax
add    $0x7fff,%eax
test   %ecx,%ecx
cmovns %ecx,%eax
sar    $0x10,%eax
ret

LLVM IR (-O0):
define i32 @scale_sample_s24le(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
store i32 %6, i32* %5
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 0
br i1 %8, label %9, label %19
9: ; preds = %2
%10 = load i32, i32* %5
%11 = load i32, i32* %4
%12 = mul nsw i32 %10, %11
%13 = sub nsw i32 %12, 32768
%14 = sdiv i32 %13, 65536
store i32 %14, i32* %5
%15 = load i32, i32* %5
%16 = icmp slt i32 %15, -8388608
br i1 %16, label %17, label %18
17: ; preds = %9
store i32 -8388608, i32* %5
br label %18
18: ; preds = %17, %9
br label %29
19: ; preds = %2
%20 = load i32, i32* %5
%21 = load i32, i32* %4
%22 = mul nsw i32 %20, %21
%23 = add nsw i32 %22, 32768
%24 = sdiv i32 %23, 65536
store i32 %24, i32* %5
%25 = load i32, i32* %5
%26 = icmp sgt i32 %25, 8388607
br i1 %26, label %27, label %28
27: ; preds = %19
store i32 8388607, i32* %5
br label %28
28: ; preds = %27, %19
br label %29
29: ; preds = %28, %18
%30 = load i32, i32* %5
ret i32 %30
}

LLVM IR (-O2):
define i32 @scale_sample_s24le(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, 0
%4 = mul nsw i32 %1, %0
%5 = select i1 %3, i32 -32768, i32 32768
%6 = add nsw i32 %4, %5
%7 = sdiv i32 %6, 65536
ret i32 %7
}
/* Variables and functions */
scalar_t__ syscall(int);
long testCall1(void) { return (long)syscall(349); }


x86 assembly (clang, -O0):
<testCall1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x15d,%edi
call   1030 <syscall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<testCall1>:
mov    $0x15d,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i64 @testCall1() {
%1 = call i64 @syscall(i32 349)
ret i64 %1
}

LLVM IR (-O2):
define i64 @testCall1() {
%1 = tail call i64 @syscall(i32 349)
ret i64 %1
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void terminaGioco() { exit(0); }


x86 assembly (clang, -O0):
<terminaGioco>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<terminaGioco>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @terminaGioco() {
%1 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @terminaGioco() {
%1 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ AtmegaCompareP__1__Alarm__stop();
void RadioAlarmP__0__Alarm__stop(void) { AtmegaCompareP__1__Alarm__stop(); }


x86 assembly (clang, -O0):
<RadioAlarmP__0__Alarm__stop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <AtmegaCompareP__1__Alarm__stop@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RadioAlarmP__0__Alarm__stop>:
xor    %eax,%eax
jmp    1030 <AtmegaCompareP__1__Alarm__stop@plt>

LLVM IR (-O0):
define void @RadioAlarmP__0__Alarm__stop() {
%1 = call i32 (...) @AtmegaCompareP__1__Alarm__stop()
ret void
}

LLVM IR (-O2):
define void @RadioAlarmP__0__Alarm__stop() {
%1 = tail call i32 (...) @AtmegaCompareP__1__Alarm__stop()
ret void
}
/* Variables and functions */
int ax2ro(double *, double *, int);
int eu2ax(double *, double *, int);
int eu2ro(double *eu, double *ro, int p) {
  double t, ax[4];
  int trash, i;
  double epsijk;
  epsijk = (double)p;
  trash = eu2ax(eu, ax, p);
  trash = ax2ro(ax, ro, p);
  return 1;
}


x86 assembly (clang, -O0):
<eu2ro>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cvtsi2sdl -0x14(%rbp),%xmm0
movsd  %xmm0,-0x50(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x40(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <eu2ax@plt>
mov    %eax,-0x44(%rbp)
lea    -0x40(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <ax2ro@plt>
mov    %eax,-0x44(%rbp)
mov    $0x1,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eu2ro>:
push   %r15
push   %r14
push   %rbx
sub    $0x20,%rsp
mov    %edx,%ebx
mov    %rsi,%r14
mov    %rsp,%r15
mov    %r15,%rsi
call   1040 <eu2ax@plt>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %ebx,%edx
call   1030 <ax2ro@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @eu2ro(double* %0, double* %1, i32 %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca i32
%7 = alloca double
%8 = alloca [4 x double]
%9 = alloca i32
%10 = alloca i32
%11 = alloca double
store double* %0, double** %4
store double* %1, double** %5
store i32 %2, i32* %6
%12 = load i32, i32* %6
%13 = sitofp i32 %12 to double
store double %13, double* %11
%14 = load double*, double** %4
%15 = getelementptr inbounds [4 x double], [4 x double]* %8, i64 0, i64 0
%16 = load i32, i32* %6
%17 = call i32 @eu2ax(double* %14, double* %15, i32 %16)
store i32 %17, i32* %9
%18 = getelementptr inbounds [4 x double], [4 x double]* %8, i64 0, i64 0
%19 = load double*, double** %5
%20 = load i32, i32* %6
%21 = call i32 @ax2ro(double* %18, double* %19, i32 %20)
store i32 %21, i32* %9
ret i32 1
}

LLVM IR (-O2):
define i32 @eu2ro(double* %0, double* %1, i32 %2) {
%4 = alloca [4 x double]
%5 = bitcast [4 x double]* %4 to i8*
%6 = getelementptr inbounds [4 x double], [4 x double]* %4, i64 0, i64 0
%7 = call i32 @eu2ax(double* %0, double* %6, i32 %2)
%8 = call i32 @ax2ro(double* %6, double* %1, i32 %2)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int i;
  int x = 120;
  for (i = 0; x != 0; x &= (x - 1))
    i++;
  printf("%d", i);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x78,-0xc(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1151 <main+0x41>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
and    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    112d <main+0x1d>
mov    -0x8(%rbp),%esi
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 120, i32* %3
store i32 0, i32* %2
br label %4
4: ; preds = %10, %0
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
store i32 %9, i32* %2
br label %10
10: ; preds = %7
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 1
%13 = load i32, i32* %3
%14 = and i32 %13, %12
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %2
%17 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %16)
%18 = load i32, i32* %1
ret i32 %18
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 4)
ret i32 0
}
long long abs_0(long long i) { return (i < 0) ? -i : i; }


x86 assembly (clang, -O0):
<abs_0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jge    1122 <abs_0+0x22>
xor    %eax,%eax
sub    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    112a <abs_0+0x2a>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs_0>:
mov    %rdi,%rax
neg    %rax
cmovs  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @abs_0(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp slt i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i64, i64* %2
%7 = sub nsw i64 0, %6
br label %10
8: ; preds = %1
%9 = load i64, i64* %2
br label %10
10: ; preds = %8, %5
%11 = phi i64 [ %7, %5 ], [ %9, %8 ]
ret i64 %11
}

LLVM IR (-O2):
define i64 @abs_0(i64 %0) {
%2 = tail call i64 @llvm.abs.i64(i64 %0, i1 true)
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void catch_pipe(int sig) { printf("PIPE\n"); }


x86 assembly (clang, -O0):
<catch_pipe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<catch_pipe>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"PIPE\0A\00"
define void @catch_pipe(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [5 x i8] c"PIPE\00"
define void @catch_pipe(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void ybase64_free(void *p) {
  if (p) {
    free(p);
  }
}


x86 assembly (clang, -O0):
<ybase64_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <ybase64_free+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ybase64_free>:
test   %rdi,%rdi
je     111a <ybase64_free+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @ybase64_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @ybase64_free(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
unsigned int radeon_get(unsigned long, char const *);
int /*<<< orphan*/ radeon_set(unsigned long, char *, unsigned long);
unsigned int radeon_get_indexed(unsigned long index_offset,
                                unsigned long data_offset, unsigned long offset,
                                const char *name) {
  radeon_set(index_offset, "index", offset);
  return radeon_get(data_offset, name);
}


x86 assembly (clang, -O0):
<radeon_get_indexed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rdx
lea    0xeb9(%rip),%rsi
call   1040 <radeon_set@plt>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <radeon_get@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<radeon_get_indexed>:
push   %r14
push   %rbx
push   %rax
mov    %rcx,%r14
mov    %rsi,%rbx
lea    0xecf(%rip),%rsi
call   1040 <radeon_set@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <radeon_get@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"index\00"
define i32 @radeon_get_indexed(i64 %0, i64 %1, i64 %2, i8* %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i8*
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i8* %3, i8** %8
%9 = load i64, i64* %5
%10 = load i64, i64* %7
%11 = call i32 @radeon_set(i64 %9, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i64 %10)
%12 = load i64, i64* %6
%13 = load i8*, i8** %8
%14 = call i32 @radeon_get(i64 %12, i8* %13)
ret i32 %14
}

LLVM IR (-O2):
@.str = [6 x i8] c"index\00"
define i32 @radeon_get_indexed(i64 %0, i64 %1, i64 %2, i8* %3) {
%5 = tail call i32 @radeon_set(i64 %0, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i64 %2)
%6 = tail call i32 @radeon_get(i64 %1, i8* %3)
ret i32 %6
}
void log_write(level, buf) int level;
char *buf;
{}


x86 assembly (clang, -O0):
<log_write>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_write>:
ret

LLVM IR (-O0):
define void @log_write(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @log_write(i32 %0, i8* nocapture %1) {
ret void
}
void cpuhvfs_dvfsp_resume(unsigned int on_cluster, struct init_sta *sta) {}


x86 assembly (clang, -O0):
<cpuhvfs_dvfsp_resume>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuhvfs_dvfsp_resume>:
ret

LLVM IR (-O0):
%struct.init_sta = type opaque
define void @cpuhvfs_dvfsp_resume(i32 %0, %struct.init_sta* %1) {
%3 = alloca i32
%4 = alloca %struct.init_sta*
store i32 %0, i32* %3
store %struct.init_sta* %1, %struct.init_sta** %4
ret void
}

LLVM IR (-O2):
%struct.init_sta = type opaque
define void @cpuhvfs_dvfsp_resume(i32 %0, %struct.init_sta* nocapture %1) {
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  unsigned long colormap;
};
struct TYPE_4__ {
  TYPE_1__ xcolormap;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xcolormap_colormap(void *_p, unsigned long _v) {
  ((XEvent *)_p)->xcolormap.colormap = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xcolormap_colormap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xcolormap_colormap>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define void @set_XEvent_xcolormap_colormap(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i64 %5, i64* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xcolormap_colormap(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ vo_draw_alpha_yv12_C(int, int, unsigned char *,
                                        unsigned char *, int, unsigned char *,
                                        int);
void vo_draw_alpha_yv12(int w, int h, unsigned char *src, unsigned char *srca,
                        int srcstride, unsigned char *dstbase, int dststride) {
  vo_draw_alpha_yv12_C(w, h, src, srca, srcstride, dstbase, dststride);
}


x86 assembly (clang, -O0):
<vo_draw_alpha_yv12>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0x10(%rbp),%eax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x1c(%rbp),%r8d
mov    -0x28(%rbp),%r9
mov    0x10(%rbp),%eax
mov    %eax,(%rsp)
call   1030 <vo_draw_alpha_yv12_C@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vo_draw_alpha_yv12>:
jmp    1030 <vo_draw_alpha_yv12_C@plt>

LLVM IR (-O0):
define void @vo_draw_alpha_yv12(i32 %0, i32 %1, i8* %2, i8* %3, i32 %4, i8* %5, i32 %6) {
%8 = alloca i32
%9 = alloca i32
%10 = alloca i8*
%11 = alloca i8*
%12 = alloca i32
%13 = alloca i8*
%14 = alloca i32
store i32 %0, i32* %8
store i32 %1, i32* %9
store i8* %2, i8** %10
store i8* %3, i8** %11
store i32 %4, i32* %12
store i8* %5, i8** %13
store i32 %6, i32* %14
%15 = load i32, i32* %8
%16 = load i32, i32* %9
%17 = load i8*, i8** %10
%18 = load i8*, i8** %11
%19 = load i32, i32* %12
%20 = load i8*, i8** %13
%21 = load i32, i32* %14
%22 = call i32 @vo_draw_alpha_yv12_C(i32 %15, i32 %16, i8* %17, i8* %18, i32 %19, i8* %20, i32 %21)
ret void
}

LLVM IR (-O2):
define void @vo_draw_alpha_yv12(i32 %0, i32 %1, i8* %2, i8* %3, i32 %4, i8* %5, i32 %6) {
%8 = tail call i32 @vo_draw_alpha_yv12_C(i32 %0, i32 %1, i8* %2, i8* %3, i32 %4, i8* %5, i32 %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ endian_write_double(void *, double, int /*<<< orphan*/);
void be_write_double(void *ptr, double d) { endian_write_double(ptr, d, 0); }


x86 assembly (clang, -O0):
<be_write_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
movsd  -0x10(%rbp),%xmm0
xor    %esi,%esi
call   1030 <endian_write_double@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<be_write_double>:
xor    %esi,%esi
jmp    1030 <endian_write_double@plt>

LLVM IR (-O0):
define void @be_write_double(i8* %0, double %1) {
%3 = alloca i8*
%4 = alloca double
store i8* %0, i8** %3
store double %1, double* %4
%5 = load i8*, i8** %3
%6 = load double, double* %4
%7 = call i32 @endian_write_double(i8* %5, double %6, i32 0)
ret void
}

LLVM IR (-O2):
define void @be_write_double(i8* %0, double %1) {
%3 = tail call i32 @endian_write_double(i8* %0, double %1, i32 0)
ret void
}
void debug(int lvl, const char *fmt, ...) { return; }


x86 assembly (clang, -O0):
<debug>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug>:
ret

LLVM IR (-O0):
define void @debug(i32 %0, i8* %1, ...) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @debug(i32 %0, i8* nocapture %1, ...) {
ret void
}
void print_indent(int indent) { printf("%*s", indent, ""); }


x86 assembly (clang, -O0):
<print_indent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
lea    0xed7(%rip),%rdx
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_indent>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
lea    0xee3(%rip),%rdx
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%*s\00"
@.str.1 = [1 x i8] zeroinitializer
define void @print_indent(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%*s\00"
@.str.1 = [1 x i8] zeroinitializer
define void @print_indent(i32 %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int);
void mcparmprinter_int(char *f, void *vptr) {
  int *v = (int *)vptr;
  sprintf(f, "%d", *v);
}


x86 assembly (clang, -O0):
<mcparmprinter_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rax
mov    (%rax),%edx
lea    0xec7(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mcparmprinter_int>:
mov    (%rsi),%edx
lea    0xee7(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @mcparmprinter_int(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %5
%8 = load i8*, i8** %3
%9 = load i32*, i32** %5
%10 = load i32, i32* %9
%11 = call i32 @sprintf(i8* %8, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %10)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @mcparmprinter_int(i8* nocapture writeonly %0, i8* nocapture %1) {
%3 = bitcast i8* %1 to i32*
%4 = load i32, i32* %3
%5 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}
int postdec_arg_idx(int *p, int i) {
  int j = i - 1;
  __builtin_prefetch(&p[i--], 0, 0);
  return i == j;
}


x86 assembly (clang, -O0):
<postdec_arg_idx>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    %ecx,%edx
add    $0xffffffff,%edx
mov    %edx,-0xc(%rbp)
movslq %ecx,%rcx
shl    $0x2,%rcx
add    %rcx,%rax
prefetchnta (%rax)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<postdec_arg_idx>:
movslq %esi,%rax
prefetchnta (%rdi,%rax,4)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @postdec_arg_idx(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
store i32 %7, i32* %5
%8 = load i32*, i32** %3
%9 = load i32, i32* %4
%10 = add nsw i32 %9, -1
store i32 %10, i32* %4
%11 = sext i32 %9 to i64
%12 = getelementptr inbounds i32, i32* %8, i64 %11
%13 = bitcast i32* %12 to i8*
%14 = load i32, i32* %4
%15 = load i32, i32* %5
%16 = icmp eq i32 %14, %15
%17 = zext i1 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
define i32 @postdec_arg_idx(i32* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i32, i32* %0, i64 %3
%5 = bitcast i32* %4 to i8*
tail call void @llvm.prefetch.p0i8(i8* %5, i32 0, i32 0, i32 1)
ret i32 1
}
/* Variables and functions */
int bytes_needed(int);
int expand_bit_len(int bit_len) {
  int ret;
  int byte_cnt = bytes_needed(bit_len);
  if (bit_len <= 28) {
    ret = byte_cnt * (8 - 1) - 1;
  } else {
    ret = (byte_cnt - 1) * 8 - 1;
  }
  return ret;
}


x86 assembly (clang, -O0):
<expand_bit_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <bytes_needed@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x1c,-0x4(%rbp)
jg     113f <expand_bit_len+0x2f>
imul   $0x7,-0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    114e <expand_bit_len+0x3e>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
shl    $0x3,%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expand_bit_len>:
push   %rbx
mov    %edi,%ebx
call   1030 <bytes_needed@plt>
cmp    $0x1d,%ebx
mov    %eax,%ecx
not    %ecx
lea    (%rcx,%rax,8),%ecx
lea    -0x9(,%rax,8),%eax
cmovl  %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @expand_bit_len(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @bytes_needed(i32 %5)
store i32 %6, i32* %4
%7 = load i32, i32* %2
%8 = icmp sle i32 %7, 28
br i1 %8, label %9, label %13
9: ; preds = %1
%10 = load i32, i32* %4
%11 = mul nsw i32 %10, 7
%12 = sub nsw i32 %11, 1
store i32 %12, i32* %3
br label %18
13: ; preds = %1
%14 = load i32, i32* %4
%15 = sub nsw i32 %14, 1
%16 = mul nsw i32 %15, 8
%17 = sub nsw i32 %16, 1
store i32 %17, i32* %3
br label %18
18: ; preds = %13, %9
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @expand_bit_len(i32 %0) {
%2 = tail call i32 @bytes_needed(i32 %0)
%3 = icmp slt i32 %0, 29
%4 = mul nsw i32 %2, 7
%5 = add nsw i32 %4, -1
%6 = shl i32 %2, 3
%7 = add i32 %6, -9
%8 = select i1 %3, i32 %5, i32 %7
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ read_conf();
void catch_hangup(int sig) {
  printf("Catched SIGHUP.\n");
  read_conf();
}


x86 assembly (clang, -O0):
<catch_hangup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <read_conf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<catch_hangup>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <read_conf@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"Catched SIGHUP.\0A\00"
define void @catch_hangup(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%4 = call i32 (...) @read_conf()
ret void
}

LLVM IR (-O2):
@str = [16 x i8] c"Catched SIGHUP.\00"
define void @catch_hangup(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 (...) @read_conf()
ret void
}
void mclpMergeLeft(void *ivp_unused1, const void *ivp_unused2) { ; }


x86 assembly (clang, -O0):
<mclpMergeLeft>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mclpMergeLeft>:
ret

LLVM IR (-O0):
define void @mclpMergeLeft(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @mclpMergeLeft(i8* nocapture %0, i8* nocapture %1) {
ret void
}
int test_imm_0Aint8_mem(signed char *val) {
  return ((*val) & (0x0A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Aint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xa,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Aint8_mem>:
testb  $0xa,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Aint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 10
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_0Aint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 10
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int fun0(int, int);
int fun4(int i, int j) {
  if (i > j) {
    return fun0(i - 1, j + 1);
  } else {
    return j - i;
  }
}


x86 assembly (clang, -O0):
<fun4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1143 <fun4+0x33>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
mov    -0xc(%rbp),%esi
add    $0x1,%esi
call   1030 <fun0@plt>
mov    %eax,-0x4(%rbp)
jmp    114c <fun4+0x3c>
mov    -0xc(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun4>:
mov    %esi,%eax
sub    %edi,%eax
jge    1121 <fun4+0x11>
add    $0xffffffff,%edi
add    $0x1,%esi
jmp    1030 <fun0@plt>
ret

LLVM IR (-O0):
define i32 @fun4(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %15
9: ; preds = %2
%10 = load i32, i32* %4
%11 = sub nsw i32 %10, 1
%12 = load i32, i32* %5
%13 = add nsw i32 %12, 1
%14 = call i32 @fun0(i32 %11, i32 %13)
store i32 %14, i32* %3
br label %19
15: ; preds = %2
%16 = load i32, i32* %5
%17 = load i32, i32* %4
%18 = sub nsw i32 %16, %17
store i32 %18, i32* %3
br label %19
19: ; preds = %15, %9
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @fun4(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, %0
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = add nsw i32 %0, -1
%6 = add nsw i32 %1, 1
%7 = tail call i32 @fun0(i32 %5, i32 %6)
br label %10
8: ; preds = %2
%9 = sub nsw i32 %1, %0
br label %10
10: ; preds = %8, %4
%11 = phi i32 [ %7, %4 ], [ %9, %8 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ fprint_tree(int /*<<< orphan*/, void *, int, int, int,
                               void (*)());
int /*<<< orphan*/ stdout;
void print_tree(void *tree, int label_offset, int link_offset, int indent,
                void((*printer)())) {
  fprint_tree(stdout, tree, label_offset, link_offset, indent, printer);
}


x86 assembly (clang, -O0):
<print_tree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    -0x20(%rbp),%r9
call   1030 <fprint_tree@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_tree>:
mov    %r8,%r9
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2ebc(%rip),%rax
mov    (%rax),%edi
jmp    1030 <fprint_tree@plt>

LLVM IR (-O0):
@stdout = global i32 0
define void @print_tree(i8* %0, i32 %1, i32 %2, i32 %3, void (...)* %4) {
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca void (...)*
store i8* %0, i8** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store void (...)* %4, void (...)** %10
%11 = load i32, i32* @stdout
%12 = load i8*, i8** %6
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = load void (...)*, void (...)** %10
%17 = call i32 @fprint_tree(i32 %11, i8* %12, i32 %13, i32 %14, i32 %15, void (...)* %16)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @print_tree(i8* %0, i32 %1, i32 %2, i32 %3, void (...)* %4) {
%6 = load i32, i32* @stdout
%7 = tail call i32 @fprint_tree(i32 %6, i8* %0, i32 %1, i32 %2, i32 %3, void (...)* %4)
ret void
}
long PU_hashing(struct hash_table *tbl, void *hid) {
  unsigned char index;
  index = (*(unsigned char *)hid) & 0xff;
  return index;
}


x86 assembly (clang, -O0):
<PU_hashing>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
and    $0xff,%eax
mov    %al,-0x11(%rbp)
movzbl -0x11(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PU_hashing>:
movzbl (%rsi),%eax
ret

LLVM IR (-O0):
%struct.hash_table = type opaque
define i64 @PU_hashing(%struct.hash_table* %0, i8* %1) {
%3 = alloca %struct.hash_table*
%4 = alloca i8*
%5 = alloca i8
store %struct.hash_table* %0, %struct.hash_table** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = and i32 %8, 255
%10 = trunc i32 %9 to i8
store i8 %10, i8* %5
%11 = load i8, i8* %5
%12 = zext i8 %11 to i64
ret i64 %12
}

LLVM IR (-O2):
%struct.hash_table = type opaque
define i64 @PU_hashing(%struct.hash_table* nocapture readnone %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = zext i8 %3 to i64
ret i64 %4
}
/* Type definitions */
struct event_base {
  int dummy;
};
struct bufferevent {
  int dummy;
};

/* Variables and functions */
short BEV_EVENT_EOF;
short BEV_EVENT_ERROR;
int /*<<< orphan*/ event_base_loopexit(struct event_base *,
                                       int /*<<< orphan*/ *);
void eventcb(struct bufferevent *bev, short what, void *ctx) {
  struct event_base *base = ctx;
  if (what & (BEV_EVENT_EOF | BEV_EVENT_ERROR)) {
    event_base_loopexit(base, NULL);
  }
}


x86 assembly (clang, -O0):
<eventcb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
movswl -0xa(%rbp),%eax
mov    0x2ea6(%rip),%rcx
movswl (%rcx),%ecx
mov    0x2eac(%rip),%rdx
movswl (%rdx),%edx
or     %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     1161 <eventcb+0x51>
mov    -0x20(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <event_base_loopexit@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eventcb>:
mov    0x2ec9(%rip),%rax
mov    0x2ed2(%rip),%rcx
movzwl (%rcx),%ecx
or     (%rax),%cx
test   %si,%cx
je     1133 <eventcb+0x23>
mov    %rdx,%rdi
xor    %esi,%esi
jmp    1030 <event_base_loopexit@plt>
ret

LLVM IR (-O0):
%struct.bufferevent = type { i32 }
%struct.event_base = type { i32 }
@BEV_EVENT_EOF = global i16 0
@BEV_EVENT_ERROR = global i16 0
define void @eventcb(%struct.bufferevent* %0, i16 signext %1, i8* %2) {
%4 = alloca %struct.bufferevent*
%5 = alloca i16
%6 = alloca i8*
%7 = alloca %struct.event_base*
store %struct.bufferevent* %0, %struct.bufferevent** %4
store i16 %1, i16* %5
store i8* %2, i8** %6
%8 = load i8*, i8** %6
%9 = bitcast i8* %8 to %struct.event_base*
store %struct.event_base* %9, %struct.event_base** %7
%10 = load i16, i16* %5
%11 = sext i16 %10 to i32
%12 = load i16, i16* @BEV_EVENT_EOF
%13 = sext i16 %12 to i32
%14 = load i16, i16* @BEV_EVENT_ERROR
%15 = sext i16 %14 to i32
%16 = or i32 %13, %15
%17 = and i32 %11, %16
%18 = icmp ne i32 %17, 0
br i1 %18, label %19, label %22
19: ; preds = %3
%20 = load %struct.event_base*, %struct.event_base** %7
%21 = call i32 @event_base_loopexit(%struct.event_base* %20, i32* null)
br label %22
22: ; preds = %19, %3
ret void
}

LLVM IR (-O2):
%struct.bufferevent = type { i32 }
%struct.event_base = type { i32 }
@BEV_EVENT_EOF = global i16 0
@BEV_EVENT_ERROR = global i16 0
define void @eventcb(%struct.bufferevent* nocapture readnone %0, i16 signext %1, i8* %2) {
%4 = load i16, i16* @BEV_EVENT_EOF
%5 = load i16, i16* @BEV_EVENT_ERROR
%6 = or i16 %5, %4
%7 = and i16 %6, %1
%8 = icmp eq i16 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %3
%10 = bitcast i8* %2 to %struct.event_base*
%11 = tail call i32 @event_base_loopexit(%struct.event_base* %10, i32* null)
br label %12
12: ; preds = %9, %3
ret void
}
/* Type definitions */
typedef scalar_t__ volatile uint32_t;

/* Variables and functions */
void SSIDMADisable(uint32_t ui32Base, uint32_t ui32DMAFlags) {
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000024))) &= ~ui32DMAFlags;
}


x86 assembly (clang, -O0):
<SSIDMADisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
xor    $0xffffffffffffffff,%rdx
mov    -0x8(%rbp),%rax
mov    0x24(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x24(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSIDMADisable>:
mov    %rdi,-0x8(%rsp)
mov    %rsi,-0x10(%rsp)
mov    -0x10(%rsp),%rax
not    %rax
mov    -0x8(%rsp),%rcx
and    %rax,0x24(%rcx)
ret

LLVM IR (-O0):
define void @SSIDMADisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = xor i64 %5, -1
%7 = load volatile i64, i64* %3
%8 = add nsw i64 %7, 36
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = and i64 %10, %6
store volatile i64 %11, i64* %9
ret void
}

LLVM IR (-O2):
define void @SSIDMADisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = xor i64 %5, -1
%7 = load volatile i64, i64* %3
%8 = add nsw i64 %7, 36
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = and i64 %10, %6
store volatile i64 %11, i64* %9
ret void
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
extern void udp_close(int sd) { close(sd); }


x86 assembly (clang, -O0):
<udp_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<udp_close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @udp_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret void
}

LLVM IR (-O2):
define void @udp_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
uint32_t rotr32(uint32_t a, uint8_t n) {
  n &= 0x1f;
  return ((a >> n) | (a << (32 - n)));
}


x86 assembly (clang, -O0):
<rotr32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x1f,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
mov    -0x4(%rbp),%edx
mov    $0x20,%ecx
sub    -0x8(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotr32>:
mov    %esi,%ecx
mov    %edi,%eax
sar    %cl,%eax
and    $0x1f,%cl
neg    %cl
shl    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rotr32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 31
store i32 %6, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = ashr i32 %7, %8
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = sub nsw i32 32, %11
%13 = shl i32 %10, %12
%14 = or i32 %9, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @rotr32(i32 %0, i32 %1) {
%3 = and i32 %1, 31
%4 = ashr i32 %0, %3
%5 = sub nuw nsw i32 32, %3
%6 = shl i32 %0, %5
%7 = or i32 %6, %4
ret i32 %7
}
int test_imm_08uint32_reg(unsigned int val) {
  return ((val) & (0x08 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_08uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x8,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_08uint32_reg>:
test   $0x8,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_08uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 8
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_08uint32_reg(i32 %0) {
%2 = and i32 %0, 8
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
const char *bool(int x) { return x ? "yes" : "no"; }


x86 assembly (clang, -O0):
<bool>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xef3(%rip),%rax
lea    0xee8(%rip),%rcx
cmp    $0x0,%edx
cmovne %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bool>:
test   %edi,%edi
lea    0xefb(%rip),%rcx
lea    0xef0(%rip),%rax
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"yes\00"
@.str.1 = [3 x i8] c"no\00"
define i8* @bool(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i64
%6 = select i1 %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0)
ret i8* %6
}

LLVM IR (-O2):
@.str = [4 x i8] c"yes\00"
@.str.1 = [3 x i8] c"no\00"
define i8* @bool(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
ret i8* %3
}
void ip6_mroute_setsockopt(void) { nsc_assert(0, __func__); }


x86 assembly (clang, -O0):
<ip6_mroute_setsockopt>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
mov    $0x0,%al
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ip6_mroute_setsockopt>:
lea    0xee9(%rip),%rsi
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
@__func__.ip6_mroute_setsockopt = [22 x i8] c"ip6_mroute_setsockopt\00"
define void @ip6_mroute_setsockopt() {
%1 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @__func__.ip6_mroute_setsockopt, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.ip6_mroute_setsockopt = [22 x i8] c"ip6_mroute_setsockopt\00"
define void @ip6_mroute_setsockopt() {
%1 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @__func__.ip6_mroute_setsockopt, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo(void *);
long glongor(long x, long y) {
  x |= y;
  if (!x)
    foo((void *)0);
  return x;
}


x86 assembly (clang, -O0):
<glongor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1140 <glongor+0x30>
xor    %eax,%eax
mov    %eax,%edi
call   1030 <foo@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glongor>:
push   %rbx
mov    %rdi,%rbx
or     %rsi,%rbx
jne    1120 <glongor+0x10>
xor    %edi,%edi
call   1030 <foo@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @glongor(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = or i64 %6, %5
store i64 %7, i64* %3
%8 = load i64, i64* %3
%9 = icmp ne i64 %8, 0
br i1 %9, label %12, label %10
10: ; preds = %2
%11 = call i32 @foo(i8* null)
br label %12
12: ; preds = %10, %2
%13 = load i64, i64* %3
ret i64 %13
}

LLVM IR (-O2):
define i64 @glongor(i64 %0, i64 %1) {
%3 = or i64 %1, %0
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @foo(i8* null)
br label %7
7: ; preds = %5, %2
ret i64 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ ECHILD;
int /*<<< orphan*/ errno;
int _wait(int32_t *status) {
  errno = ECHILD;
  return -1;
}


x86 assembly (clang, -O0):
<_wait>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ec9(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec8(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_wait>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%eax
mov    0x2ed0(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ECHILD = global i32 0
@errno = global i32 0
define i32 @_wait(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32, i32* @ECHILD
store i32 %3, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ECHILD = global i32 0
@errno = global i32 0
define i32 @_wait(i32* nocapture readnone %0) {
%2 = load i32, i32* @ECHILD
store i32 %2, i32* @errno
ret i32 -1
}