xunge/DecIR huggingface dataset:
void __VERIFIER_atomic_end(void) {
  { return; }
}


x86 assembly (clang, -O0):
<__VERIFIER_atomic_end>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__VERIFIER_atomic_end>:
ret

LLVM IR (-O0):
define void @__VERIFIER_atomic_end() {
ret void
}

LLVM IR (-O2):
define void @__VERIFIER_atomic_end() {
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void mp2vpicx_set_fcode01(uint8_t *p_mp2vpicx, uint8_t i_fcode01) {
  p_mp2vpicx[5] &= 0x0f;
  p_mp2vpicx[5] |= (i_fcode01 << 4) & 0xf0;
}


x86 assembly (clang, -O0):
<mp2vpicx_set_fcode01>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%ecx
and    $0xf,%ecx
mov    %ecx,0x14(%rax)
mov    -0xc(%rbp),%ecx
shl    $0x4,%ecx
and    $0xf0,%ecx
mov    -0x8(%rbp),%rax
or     0x14(%rax),%ecx
mov    %ecx,0x14(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp2vpicx_set_fcode01>:
mov    0x14(%rdi),%eax
and    $0xf,%eax
shl    $0x4,%esi
movzbl %sil,%ecx
or     %eax,%ecx
mov    %ecx,0x14(%rdi)
ret

LLVM IR (-O0):
define void @mp2vpicx_set_fcode01(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 5
%7 = load i32, i32* %6
%8 = and i32 %7, 15
store i32 %8, i32* %6
%9 = load i32, i32* %4
%10 = shl i32 %9, 4
%11 = and i32 %10, 240
%12 = load i32*, i32** %3
%13 = getelementptr inbounds i32, i32* %12, i64 5
%14 = load i32, i32* %13
%15 = or i32 %14, %11
store i32 %15, i32* %13
ret void
}

LLVM IR (-O2):
define void @mp2vpicx_set_fcode01(i32* nocapture %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 5
%4 = load i32, i32* %3
%5 = and i32 %4, 15
%6 = shl i32 %1, 4
%7 = and i32 %6, 240
%8 = or i32 %5, %7
store i32 %8, i32* %3
ret void
}
/* Variables and functions */
bool nrf52_errata_106(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_106>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_106>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_106() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_106() {
ret i32 0
}
/* Variables and functions */
unsigned int executeHandleMessages(void *, char *, int, unsigned int *,
                                   unsigned int **);
unsigned int assertEvents(void *handle, char *messages,
                          unsigned int *resultsLength, unsigned int **results) {
  return executeHandleMessages(handle, messages, 2, resultsLength, results);
}


x86 assembly (clang, -O0):
<assertEvents>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
mov    $0x2,%edx
call   1030 <executeHandleMessages@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assertEvents>:
mov    %rcx,%r8
mov    %rdx,%rcx
mov    $0x2,%edx
jmp    1030 <executeHandleMessages@plt>

LLVM IR (-O0):
define i32 @assertEvents(i8* %0, i8* %1, i32* %2, i32** %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32*
%8 = alloca i32**
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32* %2, i32** %7
store i32** %3, i32*** %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i32*, i32** %7
%12 = load i32**, i32*** %8
%13 = call i32 @executeHandleMessages(i8* %9, i8* %10, i32 2, i32* %11, i32** %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @assertEvents(i8* %0, i8* %1, i32* %2, i32** %3) {
%5 = tail call i32 @executeHandleMessages(i8* %0, i8* %1, i32 2, i32* %2, i32** %3)
ret i32 %5
}
char *codetxt_to_ramtxt(const char *ctxt) {
  static char txt[70];
  char i;
  for (i = 0; txt[i] = ctxt[i]; i++)
    ;
  return txt;
}


x86 assembly (clang, -O0):
<codetxt_to_ramtxt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movb   $0x0,-0x9(%rbp)
mov    -0x8(%rbp),%rax
movsbq -0x9(%rbp),%rcx
mov    (%rax,%rcx,1),%al
movsbq -0x9(%rbp),%rdx
lea    0x2f0c(%rip),%rcx
mov    %al,(%rcx,%rdx,1)
cmp    $0x0,%al
je     1141 <codetxt_to_ramtxt+0x41>
jmp    1134 <codetxt_to_ramtxt+0x34>
mov    -0x9(%rbp),%al
add    $0x1,%al
mov    %al,-0x9(%rbp)
jmp    110c <codetxt_to_ramtxt+0xc>
lea    0x2ee8(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<codetxt_to_ramtxt>:
xor    %eax,%eax
lea    0x2f27(%rip),%rcx
nopl   0x0(%rax)
movsbq %al,%rax
movzbl (%rdi,%rax,1),%edx
mov    %dl,(%rax,%rcx,1)
add    $0x1,%al
test   %dl,%dl
jne    1110 <codetxt_to_ramtxt+0x10>
lea    0x2f08(%rip),%rax
ret

LLVM IR (-O0):
@codetxt_to_ramtxt.txt = internal global [70 x i8] zeroinitializer
define i8* @codetxt_to_ramtxt(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
store i8* %0, i8** %2
store i8 0, i8* %3
br label %4
4: ; preds = %15, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %3
%7 = sext i8 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = load i8, i8* %3
%11 = sext i8 %10 to i64
%12 = getelementptr inbounds [70 x i8], [70 x i8]* @codetxt_to_ramtxt.txt, i64 0, i64 %11
store i8 %9, i8* %12
%13 = icmp ne i8 %9, 0
br i1 %13, label %14, label %18
14: ; preds = %4
br label %15
15: ; preds = %14
%16 = load i8, i8* %3
%17 = add i8 %16, 1
store i8 %17, i8* %3
br label %4
18: ; preds = %4
ret i8* getelementptr inbounds ([70 x i8], [70 x i8]* @codetxt_to_ramtxt.txt, i64 0, i64 0)
}

LLVM IR (-O2):
@codetxt_to_ramtxt.txt = internal global [70 x i8] zeroinitializer
define i8* @codetxt_to_ramtxt(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8 [ 0, %1 ], [ %9, %2 ]
%4 = sext i8 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = getelementptr inbounds [70 x i8], [70 x i8]* @codetxt_to_ramtxt.txt, i64 0, i64 %4
store i8 %6, i8* %7
%8 = icmp eq i8 %6, 0
%9 = add i8 %3, 1
br i1 %8, label %10, label %2
10: ; preds = %2
ret i8* getelementptr inbounds ([70 x i8], [70 x i8]* @codetxt_to_ramtxt.txt, i64 0, i64 0)
}
void delay(volatile int n) {
  for (; n > 0; n--)
    ;
}


x86 assembly (clang, -O0):
<delay>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
cmp    $0x0,%eax
jle    1126 <delay+0x26>
jmp    1118 <delay+0x18>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    1107 <delay+0x7>
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay>:
mov    %edi,-0x4(%rsp)
cmpl   $0x0,-0x4(%rsp)
jle    111c <delay+0x1c>
nopl   0x0(%rax,%rax,1)
addl   $0xffffffff,-0x4(%rsp)
cmpl   $0x0,-0x4(%rsp)
jg     1110 <delay+0x10>
ret

LLVM IR (-O0):
define void @delay(i32 %0) {
%2 = alloca i32
store volatile i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load volatile i32, i32* %2
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %3
br label %7
7: ; preds = %6
%8 = load volatile i32, i32* %2
%9 = add nsw i32 %8, -1
store volatile i32 %9, i32* %2
br label %3
10: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @delay(i32 %0) {
%2 = alloca i32
store volatile i32 %0, i32* %2
%3 = load volatile i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %10
5: ; preds = %1, %5
%6 = load volatile i32, i32* %2
%7 = add nsw i32 %6, -1
store volatile i32 %7, i32* %2
%8 = load volatile i32, i32* %2
%9 = icmp sgt i32 %8, 0
br i1 %9, label %5, label %10
10: ; preds = %5, %1
ret void
}
/* Variables and functions */
bool nrf51_errata_31(void) { return false; }


x86 assembly (clang, -O0):
<nrf51_errata_31>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf51_errata_31>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf51_errata_31() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf51_errata_31() {
ret i32 0
}
int avl_dup_error() { return (-1); }


x86 assembly (clang, -O0):
<avl_dup_error>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<avl_dup_error>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @avl_dup_error() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @avl_dup_error() {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void h_form_end(void) { puts("</form>"); }


x86 assembly (clang, -O0):
<h_form_end>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<h_form_end>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"</form>\00"
define void @h_form_end() {
%1 = call i32 @puts(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"</form>\00"
define void @h_form_end() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float, float);
void fc_forward(float a, float b) { printf("fc: %f, %f\n", a, b); }


x86 assembly (clang, -O0):
<fc_forward>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc_forward>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"fc: %f, %f\0A\00"
define void @fc_forward(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), float %5, float %6)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"fc: %f, %f\0A\00"
define void @fc_forward(float %0, float %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), float %0, float %1)
ret void
}
/* Variables and functions */
double drand48();
bool is_lost(double loss_rate) {
  double rv = drand48();
  return (rv < loss_rate);
}


x86 assembly (clang, -O0):
<is_lost>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <drand48@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_lost>:
push   %rax
movsd  %xmm0,(%rsp)
xor    %eax,%eax
call   1030 <drand48@plt>
xor    %eax,%eax
movsd  (%rsp),%xmm1
ucomisd %xmm0,%xmm1
seta   %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @is_lost(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = call double (...) @drand48()
store double %4, double* %3
%5 = load double, double* %3
%6 = load double, double* %2
%7 = fcmp olt double %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @is_lost(double %0) {
%2 = tail call double (...) @drand48()
%3 = fcmp olt double %2, %0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ _zlog_buffer_lock();
int /*<<< orphan*/ _zlog_buffer_unlock();
int /*<<< orphan*/ _zlog_flush_buffer();
void zlog_flush_buffer() {
  _zlog_buffer_lock();
  _zlog_flush_buffer();
  _zlog_buffer_unlock();
}


x86 assembly (clang, -O0):
<zlog_flush_buffer>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_zlog_buffer_lock@plt>
mov    $0x0,%al
call   1040 <_zlog_flush_buffer@plt>
mov    $0x0,%al
call   1050 <_zlog_buffer_unlock@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<zlog_flush_buffer>:
push   %rax
xor    %eax,%eax
call   1030 <_zlog_buffer_lock@plt>
xor    %eax,%eax
call   1040 <_zlog_flush_buffer@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <_zlog_buffer_unlock@plt>

LLVM IR (-O0):
define void @zlog_flush_buffer() {
%1 = call i32 (...) @_zlog_buffer_lock()
%2 = call i32 (...) @_zlog_flush_buffer()
%3 = call i32 (...) @_zlog_buffer_unlock()
ret void
}

LLVM IR (-O2):
define void @zlog_flush_buffer() {
%1 = tail call i32 (...) @_zlog_buffer_lock()
%2 = tail call i32 (...) @_zlog_flush_buffer()
%3 = tail call i32 (...) @_zlog_buffer_unlock()
ret void
}
unsigned long long int potull(unsigned long long int b, unsigned int e) {
  unsigned int i;
  unsigned long long int res;
  res = 1;
  for (i = 1; i <= e; i++) {
    res *= b;
  }
  return res;
}


x86 assembly (clang, -O0):
<potull>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movq   $0x1,-0x18(%rbp)
movl   $0x1,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
ja     1141 <potull+0x41>
mov    -0x8(%rbp),%rax
imul   -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    111a <potull+0x1a>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<potull>:
test   %esi,%esi
je     1118 <potull+0x18>
lea    -0x1(%rsi),%eax
mov    %esi,%ecx
and    $0x7,%ecx
cmp    $0x7,%eax
jae    111e <potull+0x1e>
mov    $0x1,%eax
jmp    1155 <potull+0x55>
mov    $0x1,%eax
ret
and    $0xfffffff8,%esi
mov    $0x1,%eax
cs nopw 0x0(%rax,%rax,1)
imul   %rdi,%rax
imul   %rdi,%rax
imul   %rdi,%rax
imul   %rdi,%rax
imul   %rdi,%rax
imul   %rdi,%rax
imul   %rdi,%rax
imul   %rdi,%rax
add    $0xfffffff8,%esi
jne    1130 <potull+0x30>
test   %ecx,%ecx
je     1169 <potull+0x69>
nopl   0x0(%rax)
imul   %rdi,%rax
add    $0xffffffff,%ecx
jne    1160 <potull+0x60>
ret

LLVM IR (-O0):
define i64 @potull(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca i32
%6 = alloca i64
store i64 %0, i64* %3
store i32 %1, i32* %4
store i64 1, i64* %6
store i32 1, i32* %5
br label %7
7: ; preds = %15, %2
%8 = load i32, i32* %5
%9 = load i32, i32* %4
%10 = icmp ule i32 %8, %9
br i1 %10, label %11, label %18
11: ; preds = %7
%12 = load i64, i64* %3
%13 = load i64, i64* %6
%14 = mul i64 %13, %12
store i64 %14, i64* %6
br label %15
15: ; preds = %11
%16 = load i32, i32* %5
%17 = add i32 %16, 1
store i32 %17, i32* %5
br label %7
18: ; preds = %7
%19 = load i64, i64* %6
ret i64 %19
}

LLVM IR (-O2):
define i64 @potull(i64 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %33, label %4
4: ; preds = %2
%5 = add i32 %1, -1
%6 = and i32 %1, 7
%7 = icmp ult i32 %5, 7
br i1 %7, label %23, label %8
8: ; preds = %4
%9 = and i32 %1, -8
br label %10
10: ; preds = %10, %8
%11 = phi i64 [ 1, %8 ], [ %20, %10 ]
%12 = phi i32 [ 0, %8 ], [ %21, %10 ]
%13 = mul i64 %11, %0
%14 = mul i64 %13, %0
%15 = mul i64 %14, %0
%16 = mul i64 %15, %0
%17 = mul i64 %16, %0
%18 = mul i64 %17, %0
%19 = mul i64 %18, %0
%20 = mul i64 %19, %0
%21 = add i32 %12, 8
%22 = icmp eq i32 %21, %9
br i1 %22, label %23, label %10
23: ; preds = %10, %4
%24 = phi i64 [ undef, %4 ], [ %20, %10 ]
%25 = phi i64 [ 1, %4 ], [ %20, %10 ]
%26 = icmp eq i32 %6, 0
br i1 %26, label %33, label %27
27: ; preds = %23, %27
%28 = phi i64 [ %30, %27 ], [ %25, %23 ]
%29 = phi i32 [ %31, %27 ], [ 0, %23 ]
%30 = mul i64 %28, %0
%31 = add i32 %29, 1
%32 = icmp eq i32 %31, %6
br i1 %32, label %33, label %27
33: ; preds = %23, %27, %2
%34 = phi i64 [ 1, %2 ], [ %24, %23 ], [ %30, %27 ]
ret i64 %34
}
void rop3_58_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = *D ^ S;
  stk2 = T | stk3;
  stk1 = S ^ stk2;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_58_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xd(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_58_1_0>:
mov    (%rdi),%al
mov    %eax,%ecx
xor    %sil,%cl
or     %dl,%cl
xor    %cl,%al
and    %sil,%al
xor    %cl,%al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_58_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = load i8, i8* %5
%14 = zext i8 %13 to i32
%15 = xor i32 %12, %14
%16 = trunc i32 %15 to i8
store i8 %16, i8* %9
%17 = load i8, i8* %6
%18 = zext i8 %17 to i32
%19 = load i8, i8* %9
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
%22 = trunc i32 %21 to i8
store i8 %22, i8* %8
%23 = load i8, i8* %5
%24 = zext i8 %23 to i32
%25 = load i8, i8* %8
%26 = zext i8 %25 to i32
%27 = xor i32 %24, %26
%28 = trunc i32 %27 to i8
store i8 %28, i8* %7
%29 = load i8, i8* %7
%30 = zext i8 %29 to i32
%31 = load i8, i8* %5
%32 = zext i8 %31 to i32
%33 = xor i32 %32, -1
%34 = and i32 %30, %33
%35 = load i8*, i8** %4
%36 = load i8, i8* %35
%37 = zext i8 %36 to i32
%38 = load i8, i8* %5
%39 = zext i8 %38 to i32
%40 = and i32 %37, %39
%41 = or i32 %34, %40
%42 = trunc i32 %41 to i8
%43 = load i8*, i8** %4
store i8 %42, i8* %43
ret void
}

LLVM IR (-O2):
define void @rop3_58_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %4, %1
%6 = or i8 %5, %2
%7 = xor i8 %1, -1
%8 = and i8 %6, %7
%9 = and i8 %4, %1
%10 = or i8 %8, %9
store i8 %10, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ C67_asm(char *, int, int, int);
void C67_CMPGTSP(int s1, int s2, int dst) {
  C67_asm("CMPGTSP.S1", s1, s2, dst);
}


x86 assembly (clang, -O0):
<C67_CMPGTSP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
lea    0xecf(%rip),%rdi
call   1030 <C67_asm@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<C67_CMPGTSP>:
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
lea    0xee3(%rip),%rdi
jmp    1030 <C67_asm@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"CMPGTSP.S1\00"
define void @C67_CMPGTSP(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @C67_asm(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8, i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"CMPGTSP.S1\00"
define void @C67_CMPGTSP(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @C67_asm(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void swf4free(void *ptr) { free((char *)ptr); }


x86 assembly (clang, -O0):
<swf4free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swf4free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @swf4free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @swf4free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int is_prime(int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int number;
  scanf("%d", &number);
  printf("%d", is_prime(number));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x4(%rbp),%edi
call   1040 <is_prime@plt>
mov    %eax,%esi
lea    0xea7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xec4(%rip),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1050 <scanf@plt>
mov    0xc(%rsp),%edi
call   1040 <is_prime@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%3 = load i32, i32* %1
%4 = call i32 @is_prime(i32 %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @is_prime(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Variables and functions */
double cos(double);
double libballistics_deg2rad(double);
double libballistics_headWind(double windSpeed, double windAngle) {
  double Wangle = libballistics_deg2rad(windAngle);
  return (cos(Wangle) * windSpeed);
}


x86 assembly (clang, -O0):
<libballistics_headWind>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <libballistics_deg2rad@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
call   1040 <cos@plt>
mulsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libballistics_headWind>:
push   %rax
movsd  %xmm0,(%rsp)
movapd %xmm1,%xmm0
call   1030 <libballistics_deg2rad@plt>
call   1040 <cos@plt>
mulsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @libballistics_headWind(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %4
%7 = call double @libballistics_deg2rad(double %6)
store double %7, double* %5
%8 = load double, double* %5
%9 = call double @cos(double %8)
%10 = load double, double* %3
%11 = fmul double %9, %10
ret double %11
}

LLVM IR (-O2):
define double @libballistics_headWind(double %0, double %1) {
%3 = tail call double @libballistics_deg2rad(double %1)
%4 = tail call double @cos(double %3)
%5 = fmul double %4, %0
ret double %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int read_i2c_reg(int, int, int /*<<< orphan*/ *);
int piups_get_irailconv(int file_i2c, uint16_t *irailconv) {
  return read_i2c_reg(file_i2c, 0x5C, irailconv);
}


x86 assembly (clang, -O0):
<piups_get_irailconv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rdx
mov    $0x5c,%esi
call   1030 <read_i2c_reg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<piups_get_irailconv>:
mov    %rsi,%rdx
mov    $0x5c,%esi
jmp    1030 <read_i2c_reg@plt>

LLVM IR (-O0):
define i32 @piups_get_irailconv(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = call i32 @read_i2c_reg(i32 %5, i32 92, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @piups_get_irailconv(i32 %0, i32* %1) {
%3 = tail call i32 @read_i2c_reg(i32 %0, i32 92, i32* %1)
ret i32 %3
}
signed int readpng(char *name, signed int *xres, signed int *yres,
                   unsigned char **imgdata) {
  return 2;
}


x86 assembly (clang, -O0):
<readpng>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readpng>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @readpng(i8* %0, i32* %1, i32* %2, i8** %3) {
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i8**
store i8* %0, i8** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i8** %3, i8*** %8
ret i32 2
}

LLVM IR (-O2):
define i32 @readpng(i8* nocapture readnone %0, i32* nocapture readnone %1, i32* nocapture readnone %2, i8** nocapture readnone %3) {
ret i32 2
}
/* Variables and functions */
int /*<<< orphan*/ foo(unsigned short);
__attribute__((no, noclone)) unsigned short f35(unsigned short x,
                                                unsigned short y) {
  unsigned short r = x + y;
  if (y < r)
    foo(r);
  return r;
}


x86 assembly (clang, -O0):
<f35>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movzwl -0x2(%rbp),%eax
movzwl -0x4(%rbp),%ecx
add    %ecx,%eax
mov    %ax,-0x6(%rbp)
movzwl -0x4(%rbp),%eax
movzwl -0x6(%rbp),%ecx
cmp    %ecx,%eax
jge    114d <f35+0x3d>
movzwl -0x6(%rbp),%edi
call   1030 <foo@plt>
movzwl -0x6(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f35>:
push   %rbx
mov    %edi,%ebx
add    %esi,%ebx
cmp    %si,%bx
jbe    1122 <f35+0x12>
movzwl %bx,%edi
call   1030 <foo@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define zeroext i16 @f35(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
%5 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%6 = load i16, i16* %3
%7 = zext i16 %6 to i32
%8 = load i16, i16* %4
%9 = zext i16 %8 to i32
%10 = add nsw i32 %7, %9
%11 = trunc i32 %10 to i16
store i16 %11, i16* %5
%12 = load i16, i16* %4
%13 = zext i16 %12 to i32
%14 = load i16, i16* %5
%15 = zext i16 %14 to i32
%16 = icmp slt i32 %13, %15
br i1 %16, label %17, label %20
17: ; preds = %2
%18 = load i16, i16* %5
%19 = call i32 @foo(i16 zeroext %18)
br label %20
20: ; preds = %17, %2
%21 = load i16, i16* %5
ret i16 %21
}

LLVM IR (-O2):
define zeroext i16 @f35(i16 zeroext %0, i16 zeroext %1) {
%3 = add i16 %1, %0
%4 = icmp ugt i16 %3, %1
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @foo(i16 zeroext %3)
br label %7
7: ; preds = %5, %2
ret i16 %3
}
unsigned int lcm_compare_id(void) { return 1; }


x86 assembly (clang, -O0):
<lcm_compare_id>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcm_compare_id>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @lcm_compare_id() {
ret i32 1
}

LLVM IR (-O2):
define i32 @lcm_compare_id() {
ret i32 1
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
uint8_t uart_tx_is_full(uint32_t *uart) { return uart[0x18 / 4] & 0x20; }


x86 assembly (clang, -O0):
<uart_tx_is_full>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x18(%rax),%eax
and    $0x20,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_tx_is_full>:
mov    0x18(%rdi),%eax
and    $0x20,%eax
ret

LLVM IR (-O0):
define i32 @uart_tx_is_full(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 6
%5 = load i32, i32* %4
%6 = and i32 %5, 32
ret i32 %6
}

LLVM IR (-O2):
define i32 @uart_tx_is_full(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 6
%3 = load i32, i32* %2
%4 = and i32 %3, 32
ret i32 %4
}
void wait(volatile unsigned long dly) {
  for (; dly > 0; dly--)
    ;
}


x86 assembly (clang, -O0):
<wait>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmp    $0x0,%rax
jbe    112c <wait+0x2c>
jmp    111b <wait+0x1b>
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <wait+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait>:
mov    %rdi,-0x8(%rsp)
cmpq   $0x0,-0x8(%rsp)
je     111e <wait+0x1e>
nopl   (%rax)
addq   $0xffffffffffffffff,-0x8(%rsp)
cmpq   $0x0,-0x8(%rsp)
jne    1110 <wait+0x10>
ret

LLVM IR (-O0):
define void @wait(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
br label %3
3: ; preds = %7, %1
%4 = load volatile i64, i64* %2
%5 = icmp ugt i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %3
br label %7
7: ; preds = %6
%8 = load volatile i64, i64* %2
%9 = add i64 %8, -1
store volatile i64 %9, i64* %2
br label %3
10: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @wait(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = icmp eq i64 %3, 0
br i1 %4, label %10, label %5
5: ; preds = %1, %5
%6 = load volatile i64, i64* %2
%7 = add i64 %6, -1
store volatile i64 %7, i64* %2
%8 = load volatile i64, i64* %2
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %5
10: ; preds = %5, %1
ret void
}
void VXD_CF_FAILURE(void) { __asm__ __volatile__("stc"); }


x86 assembly (clang, -O0):
<VXD_CF_FAILURE>:
push   %rbp
mov    %rsp,%rbp
stc
pop    %rbp
ret

x86 assembly (clang, -O2):
<VXD_CF_FAILURE>:
stc
ret

LLVM IR (-O0):
define void @VXD_CF_FAILURE() {
ret void
}

LLVM IR (-O2):
define void @VXD_CF_FAILURE() {
tail call void asm sideeffect "stc", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
void window_manager_shutdown(void) {}


x86 assembly (clang, -O0):
<window_manager_shutdown>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<window_manager_shutdown>:
ret

LLVM IR (-O0):
define void @window_manager_shutdown() {
ret void
}

LLVM IR (-O2):
define void @window_manager_shutdown() {
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void write_pointer(void *dst, void *ptr_to_write) {
  uint32_t pu32;
  uint64_t pu64;
  switch ((sizeof(void *))) {
  case 4:
    pu32 = (uint32_t)((uint64_t)ptr_to_write & 0xFFFFFFFFUL);
    *((uint32_t *)dst) = pu32;
    break;
  case 8:
    pu64 = (uint64_t)ptr_to_write;
    *((uint64_t *)dst) = pu64;
    break;
  }
}


x86 assembly (clang, -O0):
<write_pointer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_pointer>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @write_pointer(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %4
%8 = ptrtoint i8* %7 to i32
store i32 %8, i32* %6
%9 = load i32, i32* %6
%10 = load i8*, i8** %3
%11 = bitcast i8* %10 to i32*
store i32 %9, i32* %11
ret void
}

LLVM IR (-O2):
define void @write_pointer(i8* nocapture writeonly %0, i8* %1) {
%3 = ptrtoint i8* %1 to i64
%4 = trunc i64 %3 to i32
%5 = bitcast i8* %0 to i32*
store i32 %4, i32* %5
ret void
}
void rop3_6_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = *D ^ S;
  stk2 = ~stk2;
  stk1 = T | stk2;
  stk1 = ~stk1;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_6_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_6_1_0>:
not    %dl
or     %sil,%dl
and    %dl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_6_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = xor i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %8
%16 = load i8, i8* %8
%17 = zext i8 %16 to i32
%18 = xor i32 %17, -1
%19 = trunc i32 %18 to i8
store i8 %19, i8* %8
%20 = load i8, i8* %6
%21 = zext i8 %20 to i32
%22 = load i8, i8* %8
%23 = zext i8 %22 to i32
%24 = or i32 %21, %23
%25 = trunc i32 %24 to i8
store i8 %25, i8* %7
%26 = load i8, i8* %7
%27 = zext i8 %26 to i32
%28 = xor i32 %27, -1
%29 = trunc i32 %28 to i8
store i8 %29, i8* %7
%30 = load i8, i8* %7
%31 = zext i8 %30 to i32
%32 = load i8, i8* %5
%33 = zext i8 %32 to i32
%34 = xor i32 %33, -1
%35 = and i32 %31, %34
%36 = load i8*, i8** %4
%37 = load i8, i8* %36
%38 = zext i8 %37 to i32
%39 = load i8, i8* %5
%40 = zext i8 %39 to i32
%41 = and i32 %38, %40
%42 = or i32 %35, %41
%43 = trunc i32 %42 to i8
%44 = load i8*, i8** %4
store i8 %43, i8* %44
ret void
}

LLVM IR (-O2):
define void @rop3_6_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %2, -1
%6 = or i8 %5, %1
%7 = and i8 %4, %6
store i8 %7, i8* %0
ret void
}
void gdk_window_set_cursor() {}


x86 assembly (clang, -O0):
<gdk_window_set_cursor>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_window_set_cursor>:
ret

LLVM IR (-O0):
define void @gdk_window_set_cursor() {
ret void
}

LLVM IR (-O2):
define void @gdk_window_set_cursor() {
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void printM128(__m128i value) {
  uint32_t *p = (uint32_t *)&value;
  uint32_t i;
  for (i = 0; i < 4; i++) {
    printf("%u ", *p++);
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<printM128>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x4,-0x14(%rbp)
jge    1161 <printM128+0x51>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x4,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%esi
lea    0xeb4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112a <printM128+0x1a>
lea    0xe9c(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printM128>:
push   %rbx
mov    %edi,%esi
lea    0xed6(%rip),%rbx
mov    %rbx,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    $0xa,%edi
pop    %rbx
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%u \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @printM128(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
store i32 %0, i32* %2
store i32* %2, i32** %3
store i32 0, i32* %4
br label %5
5: ; preds = %13, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 4
br i1 %7, label %8, label %16
8: ; preds = %5
%9 = load i32*, i32** %3
%10 = getelementptr inbounds i32, i32* %9, i32 1
store i32* %10, i32** %3
%11 = load i32, i32* %9
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %11)
br label %13
13: ; preds = %8
%14 = load i32, i32* %4
%15 = add nsw i32 %14, 1
store i32 %15, i32* %4
br label %5
16: ; preds = %5
%17 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%u \00"
define void @printM128(i32 %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 poison)
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 poison)
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 poison)
%6 = tail call i32 @putchar(i32 10)
ret void
}
/* Variables and functions */
float __ocml_i0_f32(float);
float cyl_bessel_i0f(float x) { return __ocml_i0_f32(x); }


x86 assembly (clang, -O0):
<cyl_bessel_i0f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <__ocml_i0_f32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cyl_bessel_i0f>:
jmp    1030 <__ocml_i0_f32@plt>

LLVM IR (-O0):
define float @cyl_bessel_i0f(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @__ocml_i0_f32(float %3)
ret float %4
}

LLVM IR (-O2):
define float @cyl_bessel_i0f(float %0) {
%2 = tail call float @__ocml_i0_f32(float %0)
ret float %2
}
void ADCIntDisable(unsigned long ulBase, unsigned long ulSequenceNum) {
  ;
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000008))) &= ~(1 << ulSequenceNum);
}


x86 assembly (clang, -O0):
<ADCIntDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
movslq %eax,%rdx
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCIntDisable>:
mov    %rsi,%rcx
mov    $0xfffffffe,%eax
rol    %cl,%eax
cltq
and    %rax,0x8(%rdi)
ret

LLVM IR (-O0):
define void @ADCIntDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = trunc i64 %5 to i32
%7 = shl i32 1, %6
%8 = xor i32 %7, -1
%9 = sext i32 %8 to i64
%10 = load i64, i64* %3
%11 = add i64 %10, 8
%12 = inttoptr i64 %11 to i64*
%13 = load volatile i64, i64* %12
%14 = and i64 %13, %9
store volatile i64 %14, i64* %12
ret void
}

LLVM IR (-O2):
define void @ADCIntDisable(i64 %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = shl nuw i32 1, %3
%5 = xor i32 %4, -1
%6 = sext i32 %5 to i64
%7 = add i64 %0, 8
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = and i64 %9, %6
store volatile i64 %10, i64* %8
ret void
}
/* Variables and functions */
scalar_t__ malloc(unsigned int);
unsigned char *Uchar_array(int size) {
  return ((unsigned char *)malloc((unsigned)(size * sizeof(unsigned char))));
}


x86 assembly (clang, -O0):
<Uchar_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
shl    $0x0,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Uchar_array>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @Uchar_array(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = mul i64 %4, 1
%6 = trunc i64 %5 to i32
%7 = call i64 @malloc(i32 %6)
%8 = inttoptr i64 %7 to i8*
ret i8* %8
}

LLVM IR (-O2):
define i8* @Uchar_array(i32 %0) {
%2 = tail call i64 @malloc(i32 %0)
%3 = inttoptr i64 %2 to i8*
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int i = 7, j = i - i;
  while (!i) {
    i /= 2;
    j++;
  }
  printf("%d", j);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x7,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1145 <main+0x35>
jmp    1161 <main+0x51>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112f <main+0x1f>
mov    -0xc(%rbp),%esi
lea    0xe95(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 7, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* %2
%6 = sub nsw i32 %4, %5
store i32 %6, i32* %3
br label %7
7: ; preds = %11, %0
%8 = load i32, i32* %2
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
br i1 %10, label %11, label %16
11: ; preds = %7
%12 = load i32, i32* %2
%13 = sdiv i32 %12, 2
store i32 %13, i32* %2
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %7
16: ; preds = %7
%17 = load i32, i32* %3
%18 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %17)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 0)
ret i32 0
}
int destroy_queue_item(void *data) {
  data = 0;
  return (1);
}


x86 assembly (clang, -O0):
<destroy_queue_item>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<destroy_queue_item>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @destroy_queue_item(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
store i8* null, i8** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @destroy_queue_item(i8* nocapture readnone %0) {
ret i32 1
}
/* Variables and functions */
int OPENSSL_VERSION_NUMBER;
int /*<<< orphan*/ SSL_SESSION_new();
long SSLeay();
int /*<<< orphan*/ printf(char *);
int main() {
  long ver;
  SSL_SESSION_new();
  if (OPENSSL_VERSION_NUMBER < 0x00907000L) {
    printf("OpenSSL version 0.9.7 or better is required!\n");
    return 1;
  }
  ver = SSLeay();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <SSL_SESSION_new@plt>
mov    0x2e9b(%rip),%rax
movslq (%rax),%rax
cmp    $0x907000,%rax
jge    1174 <main+0x44>
lea    0xe9d(%rip),%rdi
call   1040 <printf@plt>
movl   $0x1,-0x4(%rbp)
jmp    1186 <main+0x56>
mov    $0x0,%al
call   1050 <SSLeay@plt>
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <SSL_SESSION_new@plt>
mov    0x2ea7(%rip),%rax
cmpl   $0x906fff,(%rax)
jg     115c <main+0x2c>
lea    0xeb0(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%ebx
jmp    1163 <main+0x33>
xor    %eax,%eax
call   1050 <SSLeay@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@OPENSSL_VERSION_NUMBER = global i32 0
@.str = [46 x i8] c"OpenSSL version 0.9.7 or better is required!\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
store i32 0, i32* %1
%3 = call i32 (...) @SSL_SESSION_new()
%4 = load i32, i32* @OPENSSL_VERSION_NUMBER
%5 = sext i32 %4 to i64
%6 = icmp slt i64 %5, 9465856
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
store i32 1, i32* %1
br label %11
9: ; preds = %0
%10 = call i64 (...) @SSLeay()
store i64 %10, i64* %2
store i32 0, i32* %1
br label %11
11: ; preds = %9, %7
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
@OPENSSL_VERSION_NUMBER = global i32 0
@str = [45 x i8] c"OpenSSL version 0.9.7 or better is required!\00"
define i32 @main() {
%1 = tail call i32 (...) @SSL_SESSION_new()
%2 = load i32, i32* @OPENSSL_VERSION_NUMBER
%3 = icmp slt i32 %2, 9465856
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([45 x i8], [45 x i8]* @str, i64 0, i64 0))
br label %8
6: ; preds = %0
%7 = tail call i64 (...) @SSLeay()
br label %8
8: ; preds = %6, %4
%9 = phi i32 [ 1, %4 ], [ 0, %6 ]
ret i32 %9
}
/* Variables and functions */
int f16(int *);
int f17(int *p) { return f16(p); }


x86 assembly (clang, -O0):
<f17>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f17>:
jmp    1030 <f16@plt>

LLVM IR (-O0):
define i32 @f17(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f16(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f17(i32* %0) {
%2 = tail call i32 @f16(i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void *ct_exit(void *arg) {
  printf("child thread exit\n");
  return 0;
}


x86 assembly (clang, -O0):
<ct_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ct_exit>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"child thread exit\0A\00"
define i8* @ct_exit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret i8* null
}

LLVM IR (-O2):
@str = [18 x i8] c"child thread exit\00"
define noalias i8* @ct_exit(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0))
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ _ITM_initializeProcess();
void tanger_stm_init() { _ITM_initializeProcess(); }


x86 assembly (clang, -O0):
<tanger_stm_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_ITM_initializeProcess@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tanger_stm_init>:
xor    %eax,%eax
jmp    1030 <_ITM_initializeProcess@plt>

LLVM IR (-O0):
define void @tanger_stm_init() {
%1 = call i32 (...) @_ITM_initializeProcess()
ret void
}

LLVM IR (-O2):
define void @tanger_stm_init() {
%1 = tail call i32 (...) @_ITM_initializeProcess()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void loadSubsList() {
  FILE *ifp = fopen("subs_list.txt", "r");
  if (ifp == NULL) {
    fprintf(stderr, "Can't open input file in.list!\n");
  }
}


x86 assembly (clang, -O0):
<loadSubsList>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
lea    0xed8(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    115f <loadSubsList+0x3f>
mov    0x2e8f(%rip),%rax
mov    (%rax),%edi
lea    0xeb6(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loadSubsList>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xedf(%rip),%rsi
call   1040 <fopen@plt>
test   %rax,%rax
je     113b <loadSubsList+0x1b>
pop    %rax
ret
mov    0x2e9e(%rip),%rax
mov    (%rax),%edi
lea    0xec5(%rip),%rsi
pop    %rax
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"subs_list.txt\00"
@.str.1 = [2 x i8] c"r\00"
@stderr = global i32 0
@.str.2 = [32 x i8] c"Can't open input file in.list!\0A\00"
define void @loadSubsList() {
%1 = alloca i32*
%2 = call i32* @fopen(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %2, i32** %1
%3 = load i32*, i32** %1
%4 = icmp eq i32* %3, null
br i1 %4, label %5, label %8
5: ; preds = %0
%6 = load i32, i32* @stderr
%7 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.2, i64 0, i64 0))
br label %8
8: ; preds = %5, %0
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"subs_list.txt\00"
@.str.1 = [2 x i8] c"r\00"
@stderr = global i32 0
@.str.2 = [32 x i8] c"Can't open input file in.list!\0A\00"
define void @loadSubsList() {
%1 = tail call i32* @fopen(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%2 = icmp eq i32* %1, null
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.2, i64 0, i64 0))
br label %6
6: ; preds = %3, %0
ret void
}