#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void ADCProcessorTrigger(uint32_t ui32Base, uint32_t ui32SequenceNum) {
  ASSERT((ui32Base == 0x40038000) || (ui32Base == 0x40039000));
  ASSERT(ui32SequenceNum < 4);
  (*((volatile uint32_t *)(ui32Base + 0x00000028))) |=
      ((ui32SequenceNum & 0xffff0000) | (1 << (ui32SequenceNum & 0xf)));
}


x86 assembly (clang, -O0):
<ADCProcessorTrigger>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x1,%al
cmpl   $0x40038000,-0x4(%rbp)
mov    %al,-0x9(%rbp)
je     113d <ADCProcessorTrigger+0x2d>
cmpl   $0x40039000,-0x4(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
cmpl   $0x4,-0x8(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%edx
and    $0xffff0000,%edx
mov    -0x8(%rbp),%ecx
and    $0xf,%ecx
mov    $0x1,%eax
shl    %cl,%eax
or     %eax,%edx
mov    -0x4(%rbp),%eax
add    $0x28,%eax
cltq
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCProcessorTrigger>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %edi,%eax
and    $0xffffefff,%eax
xor    %edi,%edi
cmp    $0x40038000,%eax
sete   %dil
call   1030 <ASSERT@plt>
xor    %edi,%edi
cmp    $0x4,%ebx
setl   %dil
call   1030 <ASSERT@plt>
mov    %ebx,%eax
and    $0xffff0000,%eax
and    $0xf,%bl
bts    %ebx,%eax
movslq %ebp,%rcx
or     %eax,0x28(%rcx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @ADCProcessorTrigger(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1073971200
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 1073975296
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ true, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
%13 = call i32 @ASSERT(i32 %12)
%14 = load i32, i32* %4
%15 = icmp slt i32 %14, 4
%16 = zext i1 %15 to i32
%17 = call i32 @ASSERT(i32 %16)
%18 = load i32, i32* %4
%19 = and i32 %18, -65536
%20 = load i32, i32* %4
%21 = and i32 %20, 15
%22 = shl i32 1, %21
%23 = or i32 %19, %22
%24 = load i32, i32* %3
%25 = add nsw i32 %24, 40
%26 = sext i32 %25 to i64
%27 = inttoptr i64 %26 to i32*
%28 = load volatile i32, i32* %27
%29 = or i32 %28, %23
store volatile i32 %29, i32* %27
ret void
}

LLVM IR (-O2):
define void @ADCProcessorTrigger(i32 %0, i32 %1) {
%3 = and i32 %0, -4097
%4 = icmp eq i32 %3, 1073971200
%5 = zext i1 %4 to i32
%6 = tail call i32 @ASSERT(i32 %5)
%7 = icmp slt i32 %1, 4
%8 = zext i1 %7 to i32
%9 = tail call i32 @ASSERT(i32 %8)
%10 = and i32 %1, -65536
%11 = and i32 %1, 15
%12 = shl nuw nsw i32 1, %11
%13 = or i32 %12, %10
%14 = add nsw i32 %0, 40
%15 = sext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
%17 = load volatile i32, i32* %16
%18 = or i32 %17, %13
store volatile i32 %18, i32* %16
ret void
}