xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void dns_buf_set_qr(uint8_t *buf, bool value) {
  buf[2] &= 0x7F;
  buf[2] |= value << 7;
}


x86 assembly (clang, -O0):
<dns_buf_set_qr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%ecx
and    $0x7f,%ecx
mov    %ecx,0x8(%rax)
mov    -0xc(%rbp),%ecx
shl    $0x7,%ecx
mov    -0x8(%rbp),%rax
or     0x8(%rax),%ecx
mov    %ecx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dns_buf_set_qr>:
mov    0x8(%rdi),%eax
and    $0x7f,%eax
shl    $0x7,%esi
or     %eax,%esi
mov    %esi,0x8(%rdi)
ret

LLVM IR (-O0):
define void @dns_buf_set_qr(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 2
%7 = load i32, i32* %6
%8 = and i32 %7, 127
store i32 %8, i32* %6
%9 = load i32, i32* %4
%10 = shl i32 %9, 7
%11 = load i32*, i32** %3
%12 = getelementptr inbounds i32, i32* %11, i64 2
%13 = load i32, i32* %12
%14 = or i32 %13, %10
store i32 %14, i32* %12
ret void
}

LLVM IR (-O2):
define void @dns_buf_set_qr(i32* nocapture %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 2
%4 = load i32, i32* %3
%5 = and i32 %4, 127
%6 = shl i32 %1, 7
%7 = or i32 %5, %6
store i32 %7, i32* %3
ret void
}
/* Variables and functions */
char const *strstr(char const *, char *);
const char *GetClearCaseVersionExtendedPath(const char *fullname) {
  return (strstr(fullname, "@@/"));
}


x86 assembly (clang, -O0):
<GetClearCaseVersionExtendedPath>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strstr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetClearCaseVersionExtendedPath>:
lea    0xee9(%rip),%rsi
jmp    1030 <strstr@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"@@/\00"
define i8* @GetClearCaseVersionExtendedPath(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @strstr(i8* %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i8* %4
}

LLVM IR (-O2):
@.str = [4 x i8] c"@@/\00"
define i8* @GetClearCaseVersionExtendedPath(i8* %0) {
%2 = tail call i8* @strstr(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int XrmParseCommand() {
  printf("XrmParseCommand called\n");
  return 0;
}


x86 assembly (clang, -O0):
<XrmParseCommand>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XrmParseCommand>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [24 x i8] c"XrmParseCommand called\0A\00"
define i32 @XrmParseCommand() {
%1 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [23 x i8] c"XrmParseCommand called\00"
define i32 @XrmParseCommand() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
ret i32 0
}
void f(long *p) {
  *p = 42;
  p[4] = 42;
  __builtin_memset(p, 0, 100);
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movq   $0x2a,(%rax)
mov    -0x8(%rbp),%rax
movq   $0x2a,0x20(%rax)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x64,%edx
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
xorps  %xmm0,%xmm0
movups %xmm0,0x50(%rdi)
movups %xmm0,0x40(%rdi)
movups %xmm0,0x30(%rdi)
movups %xmm0,0x20(%rdi)
movups %xmm0,0x10(%rdi)
movups %xmm0,(%rdi)
movl   $0x0,0x60(%rdi)
ret

LLVM IR (-O0):
define void @f(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
store i64 42, i64* %3
%4 = load i64*, i64** %2
%5 = getelementptr inbounds i64, i64* %4, i64 4
store i64 42, i64* %5
%6 = load i64*, i64** %2
%7 = bitcast i64* %6 to i8*
ret void
}

LLVM IR (-O2):
define void @f(i64* nocapture writeonly %0) {
%2 = bitcast i64* %0 to i8*
tail call void @llvm.memset.p0i8.i64(i8* align 8 dereferenceable(100) %2, i8 0, i64 100, i1 false)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ shuffle_test2();
int main(int argc, char *argv[]) {
  shuffle_test2();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <shuffle_test2@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <shuffle_test2@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @shuffle_test2()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @shuffle_test2()
ret i32 0
}
/* Type definitions */
typedef int pid_t;

/* Variables and functions */
int getpid();
int getppid();
int /*<<< orphan*/ printf(char *, int);
main() {
  pid_t id_proceso;
  pid_t id_padre;
  id_proceso = getpid();
  id_padre = getppid();
  printf("Identificador de proceso: %d\n", id_proceso);
  printf("Identificador del proceso padre: %d\n", id_padre);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1050 <getppid@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%esi
lea    0xeaa(%rip),%rdi
call   1040 <printf@plt>
mov    -0x8(%rbp),%esi
lea    0xeb9(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
xor    %eax,%eax
call   1030 <getpid@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <getppid@plt>
mov    %eax,%ebp
lea    0xeb4(%rip),%rdi
mov    %ebx,%esi
call   1040 <printf@plt>
lea    0xec4(%rip),%rdi
mov    %ebp,%esi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [30 x i8] c"Identificador de proceso: %d\0A\00"
@.str.1 = [37 x i8] c"Identificador del proceso padre: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @getpid()
store i32 %3, i32* %1
%4 = call i32 (...) @getppid()
store i32 %4, i32* %2
%5 = load i32, i32* %1
%6 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i32, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [30 x i8] c"Identificador de proceso: %d\0A\00"
@.str.1 = [37 x i8] c"Identificador del proceso padre: %d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @getpid()
%2 = tail call i32 (...) @getppid()
%3 = tail call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i32 %1)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.1, i64 0, i64 0), i32 %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(char *progname) {
  fprintf(stderr,
          "usage:  %s [-f file] [-p port]\n"
          "\nWhere:\n\t"
          "-f      Flag file signaling server readiness\n\t"
          "-p      Listening port, otherwise random\n\t"
          "-s      Single-client mode\n",
          progname);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [156 x i8] c"usage: %s [-f file] [-p port]\0A\0AWhere:\0A\09-f Flag file signaling server readiness\0A\09-p Listening port, otherwise random\0A\09-s Single-client mode\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([156 x i8], [156 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [156 x i8] c"usage: %s [-f file] [-p port]\0A\0AWhere:\0A\09-f Flag file signaling server readiness\0A\09-p Listening port, otherwise random\0A\09-s Single-client mode\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([156 x i8], [156 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int truncate_caller(int);
int truncate_up(void) { return truncate_caller(1); }


x86 assembly (clang, -O0):
<truncate_up>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <truncate_caller@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<truncate_up>:
mov    $0x1,%edi
jmp    1030 <truncate_caller@plt>

LLVM IR (-O0):
define i32 @truncate_up() {
%1 = call i32 @truncate_caller(i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @truncate_up() {
%1 = tail call i32 @truncate_caller(i32 1)
ret i32 %1
}
/* Variables and functions */
int syscall(int);
int inotify_init() { return syscall(316); }


x86 assembly (clang, -O0):
<inotify_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x13c,%edi
call   1030 <syscall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<inotify_init>:
mov    $0x13c,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @inotify_init() {
%1 = call i32 @syscall(i32 316)
ret i32 %1
}

LLVM IR (-O2):
define i32 @inotify_init() {
%1 = tail call i32 @syscall(i32 316)
ret i32 %1
}
int test_imm_E5uint32_mem(unsigned int *val) {
  return ((*val) & (0xE5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E5uint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xe5,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E5uint32_mem>:
testb  $0xe5,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E5uint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 229
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E5uint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 229
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int mux(int a, int b) { return a * b; }


x86 assembly (clang, -O0):
<mux>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mux>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @mux(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @mux(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
ret i32 %3
}
int _gv2(sptr)
char **sptr;
{
  int n;
  n = 0;
  while (isdigit(**sptr))
    n = 10 * n + *(*sptr)++ - '0';
  return n;
}


x86 assembly (clang, -O0):
<_gv2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%eax
je     1160 <_gv2+0x50>
imul   $0xa,-0xc(%rbp),%eax
mov    -0x8(%rbp),%rdx
mov    (%rdx),%rcx
mov    %rcx,%rsi
add    $0x1,%rsi
mov    %rsi,(%rdx)
movsbl (%rcx),%ecx
add    %ecx,%eax
sub    $0x30,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <_gv2+0x13>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_gv2>:
mov    (%rdi),%rcx
movsbl (%rcx),%edx
add    $0xffffffd0,%edx
xor    %eax,%eax
cmp    $0x9,%edx
ja     113f <_gv2+0x3f>
add    $0x1,%rcx
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
lea    (%rax,%rax,4),%eax
mov    %rcx,(%rdi)
movsbl -0x1(%rcx),%edx
lea    (%rdx,%rax,2),%eax
add    $0xffffffd0,%eax
movsbl (%rcx),%edx
add    $0xffffffd0,%edx
add    $0x1,%rcx
cmp    $0xa,%edx
jb     1120 <_gv2+0x20>
ret

LLVM IR (-O0):
define i32 @_gv2(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i8**, i8*** %2
%6 = load i8*, i8** %5
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = call i32 @isdigit(i32 %8)
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %21
11: ; preds = %4
%12 = load i32, i32* %3
%13 = mul nsw i32 10, %12
%14 = load i8**, i8*** %2
%15 = load i8*, i8** %14
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %14
%17 = load i8, i8* %15
%18 = sext i8 %17 to i32
%19 = add nsw i32 %13, %18
%20 = sub nsw i32 %19, 48
store i32 %20, i32* %3
br label %4
21: ; preds = %4
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @_gv2(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = add nsw i32 %4, -48
%6 = icmp ult i32 %5, 10
br i1 %6, label %7, label %20
7: ; preds = %1, %7
%8 = phi i8* [ %11, %7 ], [ %2, %1 ]
%9 = phi i32 [ %15, %7 ], [ 0, %1 ]
%10 = mul nsw i32 %9, 10
%11 = getelementptr inbounds i8, i8* %8, i64 1
store i8* %11, i8** %0
%12 = load i8, i8* %8
%13 = sext i8 %12 to i32
%14 = add i32 %10, -48
%15 = add i32 %14, %13
%16 = load i8, i8* %11
%17 = sext i8 %16 to i32
%18 = add nsw i32 %17, -48
%19 = icmp ult i32 %18, 10
br i1 %19, label %7, label %20
20: ; preds = %7, %1
%21 = phi i32 [ 0, %1 ], [ %15, %7 ]
ret i32 %21
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int solcon_clear_dobldobl_solutions(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(347, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_clear_dobldobl_solutions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x15b,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_clear_dobldobl_solutions>:
mov    $0x15b,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @solcon_clear_dobldobl_solutions() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 347, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @solcon_clear_dobldobl_solutions() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 347, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
void av_thread_message_queue_set_err_recv() {}


x86 assembly (clang, -O0):
<av_thread_message_queue_set_err_recv>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_thread_message_queue_set_err_recv>:
ret

LLVM IR (-O0):
define void @av_thread_message_queue_set_err_recv() {
ret void
}

LLVM IR (-O2):
define void @av_thread_message_queue_set_err_recv() {
ret void
}
int abs(int num) { return (num < 0 ? -num : num); }


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    111e <abs+0x1e>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1124 <abs+0x24>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = sub nsw i32 0, %6
br label %10
8: ; preds = %1
%9 = load i32, i32* %2
br label %10
10: ; preds = %8, %5
%11 = phi i32 [ %7, %5 ], [ %9, %8 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
long fib(long n) {
  if (n == 1 || n == 2) {
    return 1L;
  } else {
    return fib(n - 1) + fib(n - 2);
  }
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x1,-0x10(%rbp)
je     1132 <fib+0x22>
cmpq   $0x2,-0x10(%rbp)
jne    113f <fib+0x2f>
movq   $0x1,-0x8(%rbp)
jmp    116b <fib+0x5b>
mov    -0x10(%rbp),%rdi
sub    $0x1,%rdi
call   1030 <fib@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
sub    $0x2,%rdi
call   1030 <fib@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rbx
mov    $0x1,%r14d
cmp    $0x2,%rbx
jb     1149 <fib+0x39>
xor    %r14d,%r14d
nopw   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <fib@plt>
add    %rax,%r14
add    $0xfffffffffffffffe,%rbx
cmp    $0x1,%rbx
ja     1130 <fib+0x20>
add    $0x1,%r14
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @fib(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp eq i64 %4, 1
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i64, i64* %3
%8 = icmp eq i64 %7, 2
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i64 1, i64* %2
br label %18
10: ; preds = %6
%11 = load i64, i64* %3
%12 = sub nsw i64 %11, 1
%13 = call i64 @fib(i64 %12)
%14 = load i64, i64* %3
%15 = sub nsw i64 %14, 2
%16 = call i64 @fib(i64 %15)
%17 = add nsw i64 %13, %16
store i64 %17, i64* %2
br label %18
18: ; preds = %10, %9
%19 = load i64, i64* %2
ret i64 %19
}

LLVM IR (-O2):
define i64 @fib(i64 %0) {
%2 = add i64 %0, -1
%3 = icmp ult i64 %2, 2
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %11, %4 ], [ %2, %1 ]
%6 = phi i64 [ %9, %4 ], [ %0, %1 ]
%7 = phi i64 [ %10, %4 ], [ 0, %1 ]
%8 = tail call i64 @fib(i64 %5)
%9 = add nsw i64 %6, -2
%10 = add nsw i64 %8, %7
%11 = add i64 %6, -3
%12 = icmp ult i64 %11, 2
br i1 %12, label %13, label %4
13: ; preds = %4
%14 = add i64 %10, 1
br label %15
15: ; preds = %13, %1
%16 = phi i64 [ 1, %1 ], [ %14, %13 ]
ret i64 %16
}
/* Variables and functions */
int /*<<< orphan*/ Msp430GpioC__1__GeneralIO__makeOutput();
void CC2420TransmitP__CSN__makeOutput(void) {
  Msp430GpioC__1__GeneralIO__makeOutput();
}


x86 assembly (clang, -O0):
<CC2420TransmitP__CSN__makeOutput>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Msp430GpioC__1__GeneralIO__makeOutput@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC2420TransmitP__CSN__makeOutput>:
xor    %eax,%eax
jmp    1030 <Msp430GpioC__1__GeneralIO__makeOutput@plt>

LLVM IR (-O0):
define void @CC2420TransmitP__CSN__makeOutput() {
%1 = call i32 (...) @Msp430GpioC__1__GeneralIO__makeOutput()
ret void
}

LLVM IR (-O2):
define void @CC2420TransmitP__CSN__makeOutput() {
%1 = tail call i32 (...) @Msp430GpioC__1__GeneralIO__makeOutput()
ret void
}
void savegame(void) {}


x86 assembly (clang, -O0):
<savegame>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<savegame>:
ret

LLVM IR (-O0):
define void @savegame() {
ret void
}

LLVM IR (-O2):
define void @savegame() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ const int32_t;

/* Variables and functions */
int32_t copy_int32_t(const int32_t _val) { return _val; }


x86 assembly (clang, -O0):
<copy_int32_t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_int32_t>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @copy_int32_t(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @copy_int32_t(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int foo(int n) {
  int i;
  for (i = 0; i < 5; ++i) {
    if (i == n)
      goto error;
  }
  if (i == 1)
  quit:
  error:
    abort();
  while (i == 0)
  regret:
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jge    1150 <foo+0x40>
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jne    113d <foo+0x2d>
jmp    1164 <foo+0x54>
jmp    1142 <foo+0x32>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <foo+0x12>
cmpl   $0x1,-0x8(%rbp)
jne    116b <foo+0x5b>
jmp    115f <foo+0x4f>
jmp    1164 <foo+0x54>
mov    $0x0,%al
call   1030 <abort@plt>
jmp    1170 <foo+0x60>
cmpl   $0x0,-0x8(%rbp)
jne    1186 <foo+0x76>
jmp    117f <foo+0x6f>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
cmp    $0x4,%edi
jbe    1118 <foo+0x8>
xor    %eax,%eax
ret
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %13, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 5
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = load i32, i32* %3
%9 = load i32, i32* %2
%10 = icmp eq i32 %8, %9
br i1 %10, label %11, label %12
11: ; preds = %7
br label %21
12: ; preds = %7
br label %13
13: ; preds = %12
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %4
16: ; preds = %4
%17 = load i32, i32* %3
%18 = icmp eq i32 %17, 1
br i1 %18, label %19, label %23
19: ; preds = %16
br label %20
20: ; preds = %19
br label %21
21: ; preds = %20, %11
%22 = call i32 (...) @abort()
unreachable
23: ; preds = %16
br label %24
24: ; preds = %23
%25 = load i32, i32* %3
%26 = icmp eq i32 %25, 0
br i1 %26, label %27, label %30
27: ; preds = %24
br label %28
28: ; preds = %27
%29 = call i32 (...) @abort()
unreachable
30: ; preds = %24
ret i32 0
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = icmp ult i32 %0, 5
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %1
ret i32 0
}
void _cc3_mmc_idle(void) {
  (*(volatile unsigned long *)((0xE002C000))) =
      ((~0x0000FF00) & (*(volatile unsigned long *)((0xE002C000)))) |
      0x00000000;
}


x86 assembly (clang, -O0):
<_cc3_mmc_idle>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe002c000,%eax
mov    (%rax),%rcx
and    $0xffffffffffff00ff,%rcx
or     $0x0,%rcx
mov    $0xe002c000,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_cc3_mmc_idle>:
mov    $0xe002c000,%eax
andq   $0xffffffffffff00ff,(%rax)
ret

LLVM IR (-O0):
define void @_cc3_mmc_idle() {
%1 = load volatile i64, i64* inttoptr (i64 3758276608 to i64*)
%2 = and i64 -65281, %1
%3 = or i64 %2, 0
store volatile i64 %3, i64* inttoptr (i64 3758276608 to i64*)
ret void
}

LLVM IR (-O2):
define void @_cc3_mmc_idle() {
%1 = load volatile i64, i64* inttoptr (i64 3758276608 to i64*)
%2 = and i64 %1, -65281
store volatile i64 %2, i64* inttoptr (i64 3758276608 to i64*)
ret void
}
void gtk_binding_set_add_path() {}


x86 assembly (clang, -O0):
<gtk_binding_set_add_path>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_binding_set_add_path>:
ret

LLVM IR (-O0):
define void @gtk_binding_set_add_path() {
ret void
}

LLVM IR (-O2):
define void @gtk_binding_set_add_path() {
ret void
}
void rs_reset(int *items, int cap, int *_size) { *_size = 0; }


x86 assembly (clang, -O0):
<rs_reset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rs_reset>:
movl   $0x0,(%rdx)
ret

LLVM IR (-O0):
define void @rs_reset(i32* %0, i32 %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32*
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32*, i32** %6
store i32 0, i32* %7
ret void
}

LLVM IR (-O2):
define void @rs_reset(i32* nocapture readnone %0, i32 %1, i32* nocapture writeonly %2) {
store i32 0, i32* %2
ret void
}
int fun751() { return 751; }


x86 assembly (clang, -O0):
<fun751>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2ef,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun751>:
mov    $0x2ef,%eax
ret

LLVM IR (-O0):
define i32 @fun751() {
ret i32 751
}

LLVM IR (-O2):
define i32 @fun751() {
ret i32 751
}
/* Type definitions */
typedef int /*<<< orphan*/ sqlite3_file;

/* Variables and functions */
int SQLITE_IOCAP_ATOMIC;
int SQLITE_IOCAP_POWERSAFE_OVERWRITE;
int SQLITE_IOCAP_SAFE_APPEND;
int SQLITE_IOCAP_SEQUENTIAL;
int memDeviceCharacteristics(sqlite3_file *pFile) {
  return SQLITE_IOCAP_ATOMIC | SQLITE_IOCAP_POWERSAFE_OVERWRITE |
         SQLITE_IOCAP_SAFE_APPEND | SQLITE_IOCAP_SEQUENTIAL;
}


x86 assembly (clang, -O0):
<memDeviceCharacteristics>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
mov    0x2ec0(%rip),%rcx
or     (%rcx),%eax
mov    0x2eaf(%rip),%rcx
or     (%rcx),%eax
mov    0x2e9e(%rip),%rcx
or     (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memDeviceCharacteristics>:
mov    0x2ee1(%rip),%rcx
mov    0x2eca(%rip),%rax
mov    (%rax),%eax
or     (%rcx),%eax
mov    0x2eb7(%rip),%rcx
or     (%rcx),%eax
mov    0x2ea6(%rip),%rcx
or     (%rcx),%eax
ret

LLVM IR (-O0):
@SQLITE_IOCAP_ATOMIC = global i32 0
@SQLITE_IOCAP_POWERSAFE_OVERWRITE = global i32 0
@SQLITE_IOCAP_SAFE_APPEND = global i32 0
@SQLITE_IOCAP_SEQUENTIAL = global i32 0
define i32 @memDeviceCharacteristics(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32, i32* @SQLITE_IOCAP_ATOMIC
%4 = load i32, i32* @SQLITE_IOCAP_POWERSAFE_OVERWRITE
%5 = or i32 %3, %4
%6 = load i32, i32* @SQLITE_IOCAP_SAFE_APPEND
%7 = or i32 %5, %6
%8 = load i32, i32* @SQLITE_IOCAP_SEQUENTIAL
%9 = or i32 %7, %8
ret i32 %9
}

LLVM IR (-O2):
@SQLITE_IOCAP_ATOMIC = global i32 0
@SQLITE_IOCAP_POWERSAFE_OVERWRITE = global i32 0
@SQLITE_IOCAP_SAFE_APPEND = global i32 0
@SQLITE_IOCAP_SEQUENTIAL = global i32 0
define i32 @memDeviceCharacteristics(i32* nocapture readnone %0) {
%2 = load i32, i32* @SQLITE_IOCAP_ATOMIC
%3 = load i32, i32* @SQLITE_IOCAP_POWERSAFE_OVERWRITE
%4 = or i32 %3, %2
%5 = load i32, i32* @SQLITE_IOCAP_SAFE_APPEND
%6 = or i32 %4, %5
%7 = load i32, i32* @SQLITE_IOCAP_SEQUENTIAL
%8 = or i32 %6, %7
ret i32 %8
}
/* Variables and functions */
int first_one(int /*<<< orphan*/);
int /*<<< orphan*/ h_to_line(unsigned long long, int);
int h_flip_index(int x) { return first_one(h_to_line(1ULL << x, x)); }


x86 assembly (clang, -O0):
<h_flip_index>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
mov    $0x1,%edi
shl    %cl,%rdi
mov    -0x4(%rbp),%esi
call   1030 <h_to_line@plt>
mov    %eax,%edi
call   1040 <first_one@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h_flip_index>:
push   %rax
mov    %edi,%ecx
mov    $0x1,%edi
shl    %cl,%rdi
mov    %ecx,%esi
call   1030 <h_to_line@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <first_one@plt>

LLVM IR (-O0):
define i32 @h_flip_index(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = shl i64 1, %4
%6 = load i32, i32* %2
%7 = call i32 @h_to_line(i64 %5, i32 %6)
%8 = call i32 @first_one(i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @h_flip_index(i32 %0) {
%2 = zext i32 %0 to i64
%3 = shl nuw i64 1, %2
%4 = tail call i32 @h_to_line(i64 %3, i32 %0)
%5 = tail call i32 @first_one(i32 %4)
ret i32 %5
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int64_t cfs_stub_lockf(int fd, int cmd, int64_t len) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<cfs_stub_lockf>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    0x2ed4(%rip),%rax
mov    (%rax),%ecx
mov    0x2ebb(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfs_stub_lockf>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @cfs_stub_lockf(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* @ENOSYS
store i32 %7, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @cfs_stub_lockf(i32 %0, i32 %1, i32 %2) {
%4 = load i32, i32* @ENOSYS
store i32 %4, i32* @errno
ret i32 -1
}
/* Variables and functions */
scalar_t__ printf(char *, int);
int main(void) {
  int ret = 42;
  while (ret < 10000000)
    ret += printf("hello world: %d\n", ret);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x2a,-0x8(%rbp)
cmpl   $0x989680,-0x8(%rbp)
jge    1154 <main+0x44>
mov    -0x8(%rbp),%esi
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
mov    %rax,%rcx
movslq -0x8(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    $0x2a,%ebp
lea    0xee1(%rip),%rbx
nop
mov    %rbx,%rdi
mov    %ebp,%esi
call   1030 <printf@plt>
add    %ebp,%eax
mov    %eax,%ebp
cmp    $0x989680,%eax
jl     1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [17 x i8] c"hello world: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 42, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 10000000
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = load i32, i32* %2
%8 = call i64 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = load i32, i32* %2
%10 = sext i32 %9 to i64
%11 = add nsw i64 %10, %8
%12 = trunc i64 %11 to i32
store i32 %12, i32* %2
br label %3
13: ; preds = %3
%14 = load i32, i32* %1
ret i32 %14
}

LLVM IR (-O2):
@.str = [17 x i8] c"hello world: %d\0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 42, %0 ], [ %5, %1 ]
%3 = tail call i64 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = trunc i64 %3 to i32
%5 = add i32 %2, %4
%6 = icmp slt i32 %5, 10000000
br i1 %6, label %1, label %7
7: ; preds = %1
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ EX_USAGE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void emit_help(void) {
  fputs("Usage: pathof filename\n", stderr);
  exit(EX_USAGE);
}


x86 assembly (clang, -O0):
<emit_help>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ead(%rip),%rax
mov    (%rax),%esi
lea    0xecc(%rip),%rdi
call   1030 <fputs@plt>
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<emit_help>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%esi
lea    0xecf(%rip),%rdi
call   1030 <fputs@plt>
mov    0x2eab(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"Usage: pathof filename\0A\00"
@stderr = global i32 0
@EX_USAGE = global i32 0
define void @emit_help() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = load i32, i32* @EX_USAGE
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
@.str = [24 x i8] c"Usage: pathof filename\0A\00"
@stderr = global i32 0
@EX_USAGE = global i32 0
define void @emit_help() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = load i32, i32* @EX_USAGE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
void test2() {
  printf("\t*** %s ***\n", __func__);
  small_string_test("123,456,abcac,\'multiword field 4\'\n"
                    "none,none,0\n"
                    ",,\n"
                    ",,");
  printf("\t*** %s: done ***\n ", __func__);
}


x86 assembly (clang, -O0):
<test2>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xedb(%rip),%rsi
mov    $0x0,%al
call   1040 <printf@plt>
lea    0xed3(%rip),%rdi
mov    $0x0,%al
call   1030 <small_string_test@plt>
lea    0xef9(%rip),%rdi
lea    0xeb8(%rip),%rsi
mov    $0x0,%al
call   1040 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test2>:
push   %rbx
lea    0xed8(%rip),%rdi
lea    0xede(%rip),%rbx
mov    %rbx,%rsi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xed3(%rip),%rdi
xor    %eax,%eax
call   1030 <small_string_test@plt>
lea    0xef9(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
pop    %rbx
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"\09*** %s ***\0A\00"
@__func__.test2 = [6 x i8] c"test2\00"
@.str.1 = [52 x i8] c"123,456,abcac,'multiword field 4'\0Anone,none,0\0A,,\0A,,\00"
@.str.2 = [20 x i8] c"\09*** %s: done ***\0A \00"
define void @test2() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @__func__.test2, i64 0, i64 0))
%2 = call i32 (i8*, ...) bitcast (i32 (...)* @small_string_test to i32 (i8*, ...)*)(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @__func__.test2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"\09*** %s ***\0A\00"
@__func__.test2 = [6 x i8] c"test2\00"
@.str.1 = [52 x i8] c"123,456,abcac,'multiword field 4'\0Anone,none,0\0A,,\0A,,\00"
@.str.2 = [20 x i8] c"\09*** %s: done ***\0A \00"
define void @test2() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @__func__.test2, i64 0, i64 0))
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @small_string_test to i32 (i8*, ...)*)(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @__func__.test2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage() {
  printf("usage: pws-neural-net [L/l|T/t] <t-lms-file>\n");
  printf("         L/l -> Start or continue learning.\n");
  printf("         T/t -> Test <t-lms-file>.\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf07(%rip),%rdi
call   1030 <printf@plt>
lea    0xf28(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf09(%rip),%rdi
call   1030 <puts@plt>
lea    0xf29(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [46 x i8] c"usage: pws-neural-net [L/l|T/t] <t-lms-file>\0A\00"
@.str.1 = [45 x i8] c" L/l -> Start or continue learning.\0A\00"
@.str.2 = [36 x i8] c" T/t -> Test <t-lms-file>.\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [45 x i8] c"usage: pws-neural-net [L/l|T/t] <t-lms-file>\00"
@str.3 = [44 x i8] c" L/l -> Start or continue learning.\00"
@str.4 = [35 x i8] c" T/t -> Test <t-lms-file>.\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([45 x i8], [45 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @str.3, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str.4, i64 0, i64 0))
ret void
}
int Error_Trap(Test, LowerBound, UpperBound) {
  int Error = 0;
  if (Test >= LowerBound && Test <= UpperBound) {
    Error = 1;
  } else {
    Error = 0;
  }
  return Error;
}


x86 assembly (clang, -O0):
<Error_Trap>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jl     1138 <Error_Trap+0x38>
mov    -0x4(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     1138 <Error_Trap+0x38>
movl   $0x1,-0x10(%rbp)
jmp    113f <Error_Trap+0x3f>
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Error_Trap>:
cmp    %esi,%edi
setge  %al
cmp    %edx,%edi
setle  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @Error_Trap(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = icmp sge i32 %8, %9
br i1 %10, label %11, label %16
11: ; preds = %3
%12 = load i32, i32* %4
%13 = load i32, i32* %6
%14 = icmp sle i32 %12, %13
br i1 %14, label %15, label %16
15: ; preds = %11
store i32 1, i32* %7
br label %17
16: ; preds = %11, %3
store i32 0, i32* %7
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %7
ret i32 %18
}

LLVM IR (-O2):
define i32 @Error_Trap(i32 %0, i32 %1, i32 %2) {
%4 = icmp sge i32 %0, %1
%5 = icmp sle i32 %0, %2
%6 = and i1 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Type definitions */
struct bhv_vnode {
  int dummy;
};

/* Variables and functions */
int is_bad_inode(int /*<<< orphan*/);
int /*<<< orphan*/ vn_to_inode(struct bhv_vnode *);
int VN_BAD(struct bhv_vnode *vp) { return is_bad_inode(vn_to_inode(vp)); }


x86 assembly (clang, -O0):
<VN_BAD>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <vn_to_inode@plt>
mov    %eax,%edi
call   1030 <is_bad_inode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VN_BAD>:
push   %rax
call   1040 <vn_to_inode@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <is_bad_inode@plt>

LLVM IR (-O0):
%struct.bhv_vnode = type { i32 }
define i32 @VN_BAD(%struct.bhv_vnode* %0) {
%2 = alloca %struct.bhv_vnode*
store %struct.bhv_vnode* %0, %struct.bhv_vnode** %2
%3 = load %struct.bhv_vnode*, %struct.bhv_vnode** %2
%4 = call i32 @vn_to_inode(%struct.bhv_vnode* %3)
%5 = call i32 @is_bad_inode(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
%struct.bhv_vnode = type { i32 }
define i32 @VN_BAD(%struct.bhv_vnode* %0) {
%2 = tail call i32 @vn_to_inode(%struct.bhv_vnode* %0)
%3 = tail call i32 @is_bad_inode(i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ EncryptPasswdMD5(char *);
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char *argv[]) {
  if (!argv[0][0])
    return (1);
  EncryptPasswdMD5(argv[1]);
  printf("%s", argv[1]);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
cmpb   $0x0,(%rax)
jne    1152 <main+0x32>
movl   $0x1,-0x4(%rbp)
jmp    117a <main+0x5a>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <EncryptPasswdMD5@plt>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rsi
lea    0xe92(%rip),%rdi
call   1040 <printf@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    (%rsi),%rax
cmpb   $0x0,(%rax)
je     1149 <main+0x29>
mov    %rsi,%rbx
mov    0x8(%rsi),%rdi
call   1030 <EncryptPasswdMD5@plt>
mov    0x8(%rbx),%rsi
lea    0xec0(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %5
%7 = getelementptr inbounds i8*, i8** %6, i64 0
%8 = load i8*, i8** %7
%9 = getelementptr inbounds i8, i8* %8, i64 0
%10 = load i8, i8* %9
%11 = icmp ne i8 %10, 0
br i1 %11, label %13, label %12
12: ; preds = %2
store i32 1, i32* %3
br label %22
13: ; preds = %2
%14 = load i8**, i8*** %5
%15 = getelementptr inbounds i8*, i8** %14, i64 1
%16 = load i8*, i8** %15
%17 = call i32 @EncryptPasswdMD5(i8* %16)
%18 = load i8**, i8*** %5
%19 = getelementptr inbounds i8*, i8** %18, i64 1
%20 = load i8*, i8** %19
%21 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %20)
store i32 0, i32* %3
br label %22
22: ; preds = %13, %12
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = load i8*, i8** %1
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 0
br i1 %5, label %12, label %6
6: ; preds = %2
%7 = getelementptr inbounds i8*, i8** %1, i64 1
%8 = load i8*, i8** %7
%9 = tail call i32 @EncryptPasswdMD5(i8* %8)
%10 = load i8*, i8** %7
%11 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %10)
br label %12
12: ; preds = %2, %6
%13 = phi i32 [ 0, %6 ], [ 1, %2 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ t1();
int /*<<< orphan*/ t2();
main() {
  t1();
  t2();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <t1@plt>
mov    $0x0,%al
call   1040 <t2@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <t1@plt>
xor    %eax,%eax
call   1040 <t2@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @t1()
%3 = call i32 (...) @t2()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @t1()
%2 = tail call i32 (...) @t2()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ cleanup_sniff();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void event_kill() {
  cleanup_sniff();
  exit(0);
}


x86 assembly (clang, -O0):
<event_kill>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <cleanup_sniff@plt>
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<event_kill>:
push   %rax
xor    %eax,%eax
call   1040 <cleanup_sniff@plt>
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @event_kill() {
%1 = call i32 (...) @cleanup_sniff()
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @event_kill() {
%1 = tail call i32 (...) @cleanup_sniff()
%2 = tail call i32 @exit(i32 0)
unreachable
}
int ti_kama_start(double const *options) { return (int)options[0] - 1; }


x86 assembly (clang, -O0):
<ti_kama_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cvttsd2si (%rax),%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ti_kama_start>:
cvttsd2si (%rdi),%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @ti_kama_start(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = fptosi double %5 to i32
%7 = sub nsw i32 %6, 1
ret i32 %7
}

LLVM IR (-O2):
define i32 @ti_kama_start(double* nocapture %0) {
%2 = load double, double* %0
%3 = fptosi double %2 to i32
%4 = add nsw i32 %3, -1
ret i32 %4
}
int test_2() { return 0; }


x86 assembly (clang, -O0):
<test_2>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_2>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test_2() {
ret i32 0
}

LLVM IR (-O2):
define i32 @test_2() {
ret i32 0
}
/* Variables and functions */
void uintptr_example(uintptr_t u) {}


x86 assembly (clang, -O0):
<uintptr_example>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<uintptr_example>:
ret

LLVM IR (-O0):
define void @uintptr_example(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret void
}

LLVM IR (-O2):
define void @uintptr_example(i64 %0) {
ret void
}
unsigned xrop3_113_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk2 = S ^ D;
  stk3 = T ^ D;
  stk2 = stk2 & stk3;
  stk1 = S ^ stk2;
  stk1 = ~stk1;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_113_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_113_1_0>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%eax
shl    $0x8,%eax
or     %esi,%eax
mov    %ecx,%edx
xor    $0xff,%edx
xor    $0xff,%eax
and    %edx,%eax
or     %ecx,%eax
not    %eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_113_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %6
%24 = load i32, i32* %5
%25 = xor i32 %23, %24
store i32 %25, i32* %9
%26 = load i32, i32* %7
%27 = load i32, i32* %5
%28 = xor i32 %26, %27
store i32 %28, i32* %10
%29 = load i32, i32* %9
%30 = load i32, i32* %10
%31 = and i32 %29, %30
store i32 %31, i32* %9
%32 = load i32, i32* %6
%33 = load i32, i32* %9
%34 = xor i32 %32, %33
store i32 %34, i32* %8
%35 = load i32, i32* %8
%36 = xor i32 %35, -1
store i32 %36, i32* %8
%37 = load i32, i32* %8
%38 = load i32, i32* %6
%39 = xor i32 %38, -1
%40 = and i32 %37, %39
%41 = load i32, i32* %5
%42 = load i32, i32* %6
%43 = and i32 %41, %42
%44 = or i32 %40, %43
ret i32 %44
}

LLVM IR (-O2):
define i32 @xrop3_113_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %4, 255
%8 = xor i32 %6, 255
%9 = and i32 %8, %7
%10 = or i32 %9, %4
%11 = xor i32 %10, -1
%12 = or i32 %11, %3
ret i32 %12
}