xunge/DecIR huggingface dataset:
/* Type definitions */
struct lifo {
  int dummy;
};

/* Variables and functions */
double cos(double);
double pop(struct lifo *);
double opr_cos(struct lifo *stack) {
  double op = pop(stack);
  return cos(op);
}


x86 assembly (clang, -O0):
<opr_cos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pop@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1040 <cos@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<opr_cos>:
push   %rax
call   1030 <pop@plt>
pop    %rax
jmp    1040 <cos@plt>

LLVM IR (-O0):
%struct.lifo = type { i32 }
define double @opr_cos(%struct.lifo* %0) {
%2 = alloca %struct.lifo*
%3 = alloca double
store %struct.lifo* %0, %struct.lifo** %2
%4 = load %struct.lifo*, %struct.lifo** %2
%5 = call double @pop(%struct.lifo* %4)
store double %5, double* %3
%6 = load double, double* %3
%7 = call double @cos(double %6)
ret double %7
}

LLVM IR (-O2):
%struct.lifo = type { i32 }
define double @opr_cos(%struct.lifo* %0) {
%2 = tail call double @pop(%struct.lifo* %0)
%3 = tail call double @cos(double %2)
ret double %3
}
void swapchar(char *string, char oldchar, char newchar) {
  while (*string) {
    if (*string == oldchar)
      *string = newchar;
    string++;
  }
}


x86 assembly (clang, -O0):
<swapchar>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     114d <swapchar+0x4d>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jne    113c <swapchar+0x3c>
mov    -0xa(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1113 <swapchar+0x13>
pop    %rbp
ret

x86 assembly (clang, -O2):
<swapchar>:
mov    (%rdi),%al
test   %al,%al
je     1125 <swapchar+0x25>
add    $0x1,%rdi
jmp    111b <swapchar+0x1b>
nopl   0x0(%rax)
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
je     1125 <swapchar+0x25>
cmp    %sil,%al
jne    1110 <swapchar+0x10>
mov    %dl,-0x1(%rdi)
jmp    1110 <swapchar+0x10>
ret

LLVM IR (-O0):
define void @swapchar(i8* %0, i8 signext %1, i8 signext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
br label %7
7: ; preds = %21, %3
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %24
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = load i8, i8* %5
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %14, %16
br i1 %17, label %18, label %21
18: ; preds = %11
%19 = load i8, i8* %6
%20 = load i8*, i8** %4
store i8 %19, i8* %20
br label %21
21: ; preds = %18, %11
%22 = load i8*, i8** %4
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %4
br label %7
24: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @swapchar(i8* nocapture %0, i8 signext %1, i8 signext %2) {
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %15, label %6
6: ; preds = %3, %11
%7 = phi i8 [ %13, %11 ], [ %4, %3 ]
%8 = phi i8* [ %12, %11 ], [ %0, %3 ]
%9 = icmp eq i8 %7, %1
br i1 %9, label %10, label %11
10: ; preds = %6
store i8 %2, i8* %8
br label %11
11: ; preds = %10, %6
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %6
15: ; preds = %11, %3
ret void
}
int EMinInt(int a, int b) { return (a < b) ? a : b; }


x86 assembly (clang, -O0):
<EMinInt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <EMinInt+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <EMinInt+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<EMinInt>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @EMinInt(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @EMinInt(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
void gdk_pango_context_get() {}


x86 assembly (clang, -O0):
<gdk_pango_context_get>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_pango_context_get>:
ret

LLVM IR (-O0):
define void @gdk_pango_context_get() {
ret void
}

LLVM IR (-O2):
define void @gdk_pango_context_get() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memmove(char *, char *, int);
void memmove2() {
  char src[] = {1, 2, 3, 4};
  char dst[1];
  memmove(dst, src, 4);
}


x86 assembly (clang, -O0):
<memmove2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xee2(%rip),%eax
mov    %eax,-0x4(%rbp)
lea    -0x5(%rbp),%rdi
lea    -0x4(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memmove@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memmove2>:
push   %rax
movl   $0x4030201,0x4(%rsp)
04
lea    0x3(%rsp),%rdi
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
call   1030 <memmove@plt>
pop    %rax
ret

LLVM IR (-O0):
@__const.memmove2.src = [4 x i8] c"\01\02\03\04"
define void @memmove2() {
%1 = alloca [4 x i8]
%2 = alloca [1 x i8]
%3 = bitcast [4 x i8]* %1 to i8*
%4 = getelementptr inbounds [1 x i8], [1 x i8]* %2, i64 0, i64 0
%5 = getelementptr inbounds [4 x i8], [4 x i8]* %1, i64 0, i64 0
%6 = call i32 @memmove(i8* %4, i8* %5, i32 4)
ret void
}

LLVM IR (-O2):
define void @memmove2() {
%1 = alloca i32
%2 = alloca [1 x i8]
%3 = bitcast i32* %1 to i8*
store i32 67305985, i32* %1
%4 = getelementptr inbounds [1 x i8], [1 x i8]* %2, i64 0, i64 0
%5 = call i32 @memmove(i8* %4, i8* %3, i32 4)
ret void
}
int davinci_cfg_reg(unsigned long reg_cfg) { return 0; }


x86 assembly (clang, -O0):
<davinci_cfg_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<davinci_cfg_reg>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @davinci_cfg_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @davinci_cfg_reg(i64 %0) {
ret i32 0
}
/* Type definitions */
struct config_setting_t {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __config_setting_get_int(struct config_setting_t const *,
                                            int *);
int config_setting_get_int(const struct config_setting_t *setting) {
  int value = 0;
  __config_setting_get_int(setting, &value);
  return (value);
}


x86 assembly (clang, -O0):
<config_setting_get_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1030 <__config_setting_get_int@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_setting_get_int>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rsi
call   1030 <__config_setting_get_int@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.config_setting_t = type { i32 }
define i32 @config_setting_get_int(%struct.config_setting_t* %0) {
%2 = alloca %struct.config_setting_t*
%3 = alloca i32
store %struct.config_setting_t* %0, %struct.config_setting_t** %2
store i32 0, i32* %3
%4 = load %struct.config_setting_t*, %struct.config_setting_t** %2
%5 = call i32 @__config_setting_get_int(%struct.config_setting_t* %4, i32* %3)
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
%struct.config_setting_t = type { i32 }
define i32 @config_setting_get_int(%struct.config_setting_t* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%4 = call i32 @__config_setting_get_int(%struct.config_setting_t* %0, i32* %2)
%5 = load i32, i32* %2
ret i32 %5
}
/* Variables and functions */
double sqrt(double);
double testsqrt(double radius) { return 1 + sqrt(radius); }


x86 assembly (clang, -O0):
<testsqrt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <sqrt@plt>
movaps %xmm0,%xmm1
movsd  0xece(%rip),%xmm0
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testsqrt>:
push   %rax
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1121 <testsqrt+0x11>
sqrtsd %xmm0,%xmm0
jmp    1126 <testsqrt+0x16>
call   1030 <sqrt@plt>
addsd  0xed2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @testsqrt(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @sqrt(double %3)
%5 = fadd double 1.000000e+00, %4
ret double %5
}

LLVM IR (-O2):
define double @testsqrt(double %0) {
%2 = tail call double @sqrt(double %0)
%3 = fadd double %2, 1.000000e+00
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ srand(int);
void __InitRandom(int seed) {
  if (seed == -1) {
    srand(0x7654321L);
    srand(0x4321);
  } else {
    srand(seed);
    srand(seed);
  }
}


x86 assembly (clang, -O0):
<__InitRandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
jne    113e <__InitRandom+0x2e>
mov    $0x7654321,%edi
call   1030 <srand@plt>
mov    $0x4321,%edi
call   1030 <srand@plt>
jmp    114e <__InitRandom+0x3e>
mov    -0x4(%rbp),%edi
call   1030 <srand@plt>
mov    -0x4(%rbp),%edi
call   1030 <srand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__InitRandom>:
push   %rbx
mov    %edi,%ebx
cmp    $0xffffffff,%edi
mov    $0x7654321,%edi
cmovne %ebx,%edi
mov    $0x4321,%eax
cmove  %eax,%ebx
call   1030 <srand@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @__InitRandom(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = call i32 @srand(i32 124076833)
%7 = call i32 @srand(i32 17185)
br label %13
8: ; preds = %1
%9 = load i32, i32* %2
%10 = call i32 @srand(i32 %9)
%11 = load i32, i32* %2
%12 = call i32 @srand(i32 %11)
br label %13
13: ; preds = %8, %5
ret void
}

LLVM IR (-O2):
define void @__InitRandom(i32 %0) {
%2 = icmp eq i32 %0, -1
%3 = select i1 %2, i32 124076833, i32 %0
%4 = select i1 %2, i32 17185, i32 %0
%5 = tail call i32 @srand(i32 %3)
%6 = tail call i32 @srand(i32 %4)
ret void
}
int sys$ascefc(unsigned int efn, void *name, char prot, char perm) {
  return ({
    unsigned long resultvar;
    register long int _a4 asm("r10") = (long)((unsigned long)perm);
    register long int _a3 asm("rdx") = (long)((unsigned long)prot);
    register long int _a2 asm("rsi") = (long)(name);
    register long int _a1 asm("rdi") = (long)(efn);
    asm volatile("movq %1, %%rax\n\t"
                 "int $0x81\n\t"
                 : "=a"(resultvar)
                 : "i"(42), "r"(_a1), "r"(_a2), "r"(_a3), "r"(_a4)
                 : "memory", "cc", "r11", "cx");
    (long)resultvar;
  });
}


x86 assembly (clang, -O0):
<sys$ascefc>:
push   %rbp
mov    %rsp,%rbp
mov    %cl,%al
mov    %dl,%cl
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %cl,-0x11(%rbp)
mov    %al,-0x12(%rbp)
movsbq -0x12(%rbp),%rax
mov    %rax,-0x28(%rbp)
movsbq -0x11(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x4(%rbp),%eax
mov    %rax,-0x40(%rbp)
mov    -0x40(%rbp),%rdi
mov    -0x38(%rbp),%rsi
mov    -0x30(%rbp),%rdx
mov    -0x28(%rbp),%r10
mov    $0x2a,%rax
int    $0x81
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x48(%rbp)
mov    -0x48(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys$ascefc>:
movslq %ecx,%r10
movslq %edx,%rdx
mov    %edi,%edi
mov    $0x2a,%rax
int    $0x81
ret

LLVM IR (-O0):
define i32 @"sys$ascefc"(i32 %0, i8* %1, i8 signext %2, i8 signext %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8
%8 = alloca i8
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
%12 = alloca i64
%13 = alloca i64
%14 = alloca i64
store i32 %0, i32* %5
store i8* %1, i8** %6
store i8 %2, i8* %7
store i8 %3, i8* %8
%15 = load i8, i8* %8
%16 = sext i8 %15 to i64
store i64 %16, i64* %10
%17 = load i8, i8* %7
%18 = sext i8 %17 to i64
store i64 %18, i64* %11
%19 = load i8*, i8** %6
%20 = ptrtoint i8* %19 to i64
store i64 %20, i64* %12
%21 = load i32, i32* %5
%22 = zext i32 %21 to i64
store i64 %22, i64* %13
%23 = load i64, i64* %13
%24 = load i64, i64* %12
%25 = load i64, i64* %11
%26 = load i64, i64* %10
%27 = call i64 asm sideeffect "movq $1, %rax\0A\09int $$0x81\0A\09", "={ax},i,{rdi},{rsi},{rdx},{r10},~{memory},~{cc},~{r11},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 42, i64 %23, i64 %24, i64 %25, i64 %26)
store i64 %27, i64* %9
%28 = load i64, i64* %9
store i64 %28, i64* %14
%29 = load i64, i64* %14
%30 = trunc i64 %29 to i32
ret i32 %30
}

LLVM IR (-O2):
define i32 @"sys$ascefc"(i32 %0, i8* %1, i8 signext %2, i8 signext %3) {
%5 = sext i8 %3 to i64
%6 = sext i8 %2 to i64
%7 = ptrtoint i8* %1 to i64
%8 = zext i32 %0 to i64
%9 = tail call i64 asm sideeffect "movq $1, %rax\0A\09int $$0x81\0A\09", "={ax},i,{rdi},{rsi},{rdx},{r10},~{memory},~{cc},~{r11},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 42, i64 %8, i64 %7, i64 %6, i64 %5)
%10 = trunc i64 %9 to i32
ret i32 %10
}
void *tspin(void *arg) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<tspin>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
jmp    1108 <tspin+0x8>

x86 assembly (clang, -O2):
<tspin>:
jmp    1100 <tspin>

LLVM IR (-O0):
define i8* @tspin(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %1, %3
br label %3
}

LLVM IR (-O2):
define noalias i8* @tspin(i8* nocapture readnone %0) {
br label %2
2: ; preds = %1, %2
br label %2
}
/* Type definitions */
typedef scalar_t__ const wchar_t;

/* Variables and functions */
wchar_t *(wcsnchr)(const wchar_t *string, wchar_t c, size_t maxlen) {
  for (;;)
    if (*string == c)
      return string;
    else if (!*string++ || !maxlen--)
      return NULL;
}


x86 assembly (clang, -O0):
<wcsnchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
cmp    -0x18(%rbp),%rax
jne    112e <wcsnchr+0x2e>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1177 <wcsnchr+0x77>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x8,%rcx
mov    %rcx,-0x10(%rbp)
cmpq   $0x0,(%rax)
je     1160 <wcsnchr+0x60>
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x20(%rbp)
cmp    $0x0,%rax
jne    116d <wcsnchr+0x6d>
movq   $0x0,-0x8(%rbp)
jmp    1177 <wcsnchr+0x77>
jmp    1172 <wcsnchr+0x72>
jmp    1110 <wcsnchr+0x10>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcsnchr>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    (%rdi),%rcx
cmp    %rsi,%rcx
je     112f <wcsnchr+0x2f>
sub    $0x1,%rdx
setb   %r8b
test   %rcx,%rcx
je     112e <wcsnchr+0x2e>
add    $0x8,%rdi
test   %r8b,%r8b
je     1110 <wcsnchr+0x10>
ret
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64* @wcsnchr(i64* %0, i64 %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i64*
%6 = alloca i64
%7 = alloca i64
store i64* %0, i64** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
br label %8
8: ; preds = %26, %3
%9 = load i64*, i64** %5
%10 = load i64, i64* %9
%11 = load i64, i64* %6
%12 = icmp eq i64 %10, %11
br i1 %12, label %13, label %15
13: ; preds = %8
%14 = load i64*, i64** %5
store i64* %14, i64** %4
br label %27
15: ; preds = %8
%16 = load i64*, i64** %5
%17 = getelementptr inbounds i64, i64* %16, i32 1
store i64* %17, i64** %5
%18 = load i64, i64* %16
%19 = icmp ne i64 %18, 0
br i1 %19, label %20, label %24
20: ; preds = %15
%21 = load i64, i64* %7
%22 = add i64 %21, -1
store i64 %22, i64* %7
%23 = icmp ne i64 %21, 0
br i1 %23, label %25, label %24
24: ; preds = %20, %15
store i64* null, i64** %4
br label %27
25: ; preds = %20
br label %26
26: ; preds = %25
br label %8
27: ; preds = %24, %13
%28 = load i64*, i64** %4
ret i64* %28
}

LLVM IR (-O2):
define i64* @wcsnchr(i64* %0, i64 %1, i64 %2) {
br label %4
4: ; preds = %9, %3
%5 = phi i64* [ %0, %3 ], [ %11, %9 ]
%6 = phi i64 [ %2, %3 ], [ %12, %9 ]
%7 = load i64, i64* %5
%8 = icmp eq i64 %7, %1
br i1 %8, label %15, label %9
9: ; preds = %4
%10 = icmp eq i64 %7, 0
%11 = getelementptr inbounds i64, i64* %5, i64 1
%12 = add i64 %6, -1
%13 = icmp eq i64 %6, 0
%14 = select i1 %10, i1 true, i1 %13
br i1 %14, label %15, label %4
15: ; preds = %9, %4
%16 = phi i64* [ %5, %4 ], [ null, %9 ]
ret i64* %16
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void sleep(int x) {
  int i, j, k, m;
  for (i = 0; i < 10000; i++)
    for (j = 0; j < 1000; j++)
      for (k = 0; k < x; k++)
        m++;
  printf("Done sleeping!! %d", m);
}


x86 assembly (clang, -O0):
<sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x2710,-0x8(%rbp)
jge    1193 <sleep+0x83>
movl   $0x0,-0xc(%rbp)
cmpl   $0x3e8,-0xc(%rbp)
jge    1180 <sleep+0x70>
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    116d <sleep+0x5d>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    114a <sleep+0x3a>
jmp    1172 <sleep+0x62>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1136 <sleep+0x26>
jmp    1185 <sleep+0x75>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <sleep+0x12>
mov    -0x14(%rbp),%esi
lea    0xe63(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleep>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"Done sleeping!! %d\00"
define void @sleep(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %7
7: ; preds = %30, %1
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 10000
br i1 %9, label %10, label %33
10: ; preds = %7
store i32 0, i32* %4
br label %11
11: ; preds = %26, %10
%12 = load i32, i32* %4
%13 = icmp slt i32 %12, 1000
br i1 %13, label %14, label %29
14: ; preds = %11
store i32 0, i32* %5
br label %15
15: ; preds = %22, %14
%16 = load i32, i32* %5
%17 = load i32, i32* %2
%18 = icmp slt i32 %16, %17
br i1 %18, label %19, label %25
19: ; preds = %15
%20 = load i32, i32* %6
%21 = add nsw i32 %20, 1
store i32 %21, i32* %6
br label %22
22: ; preds = %19
%23 = load i32, i32* %5
%24 = add nsw i32 %23, 1
store i32 %24, i32* %5
br label %15
25: ; preds = %15
br label %26
26: ; preds = %25
%27 = load i32, i32* %4
%28 = add nsw i32 %27, 1
store i32 %28, i32* %4
br label %11
29: ; preds = %11
br label %30
30: ; preds = %29
%31 = load i32, i32* %3
%32 = add nsw i32 %31, 1
store i32 %32, i32* %3
br label %7
33: ; preds = %7
%34 = load i32, i32* %6
%35 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %34)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"Done sleeping!! %d\00"
define void @sleep(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 undef)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
struct tm *gmtime(int /*<<< orphan*/ const *);
struct tm *localtime(const time_t *timer) {
  return gmtime(timer);
}


x86 assembly (clang, -O0):
<localtime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <gmtime@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<localtime>:
jmp    1030 <gmtime@plt>

LLVM IR (-O0):
%struct.tm = type { i32 }
define %struct.tm* @localtime(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call %struct.tm* @gmtime(i32* %3)
ret %struct.tm* %4
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define %struct.tm* @localtime(i32* %0) {
%2 = tail call %struct.tm* @gmtime(i32* %0)
ret %struct.tm* %2
}
/* Type definitions */
struct timeval {
  int tv_sec;
  unsigned long tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
unsigned long int getTime() {
  struct timeval tv;
  gettimeofday(&tv, NULL);
  return 1000000 * tv.tv_sec + tv.tv_usec;
}


x86 assembly (clang, -O0):
<getTime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
imul   $0xf4240,-0x10(%rbp),%eax
cltq
add    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getTime>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
movslq 0x8(%rsp),%rax
imul   $0xf4240,%rax,%rax
add    0x10(%rsp),%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i64 }
define i64 @getTime() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load i32, i32* %3
%5 = mul nsw i32 1000000, %4
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%8 = load i64, i64* %7
%9 = add i64 %6, %8
ret i64 %9
}

LLVM IR (-O2):
%struct.timeval = type { i32, i64 }
define i64 @getTime() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load i32, i32* %4
%6 = mul nsw i32 %5, 1000000
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%9 = load i64, i64* %8
%10 = add i64 %9, %7
ret i64 %10
}
long add10(int n, int m, int a, int b, int c, int d, int e, int f, int g,
           int h) {
  return a + b + c + d + e + f + g + h + m + n;
}


x86 assembly (clang, -O0):
<add10>:
push   %rbp
mov    %rsp,%rbp
mov    0x28(%rbp),%eax
mov    0x20(%rbp),%eax
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
add    -0x14(%rbp),%eax
add    -0x18(%rbp),%eax
add    0x10(%rbp),%eax
add    0x18(%rbp),%eax
add    0x20(%rbp),%eax
add    0x28(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<add10>:
add    %esi,%edi
add    %edx,%edi
add    %ecx,%edi
add    %r8d,%edi
add    %r9d,%edi
add    0x8(%rsp),%edi
add    0x10(%rsp),%edi
add    0x18(%rsp),%edi
add    0x20(%rsp),%edi
movslq %edi,%rax
ret

LLVM IR (-O0):
define i64 @add10(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9) {
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
%17 = alloca i32
%18 = alloca i32
%19 = alloca i32
%20 = alloca i32
store i32 %0, i32* %11
store i32 %1, i32* %12
store i32 %2, i32* %13
store i32 %3, i32* %14
store i32 %4, i32* %15
store i32 %5, i32* %16
store i32 %6, i32* %17
store i32 %7, i32* %18
store i32 %8, i32* %19
store i32 %9, i32* %20
%21 = load i32, i32* %13
%22 = load i32, i32* %14
%23 = add nsw i32 %21, %22
%24 = load i32, i32* %15
%25 = add nsw i32 %23, %24
%26 = load i32, i32* %16
%27 = add nsw i32 %25, %26
%28 = load i32, i32* %17
%29 = add nsw i32 %27, %28
%30 = load i32, i32* %18
%31 = add nsw i32 %29, %30
%32 = load i32, i32* %19
%33 = add nsw i32 %31, %32
%34 = load i32, i32* %20
%35 = add nsw i32 %33, %34
%36 = load i32, i32* %12
%37 = add nsw i32 %35, %36
%38 = load i32, i32* %11
%39 = add nsw i32 %37, %38
%40 = sext i32 %39 to i64
ret i64 %40
}

LLVM IR (-O2):
define i64 @add10(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9) {
%11 = add i32 %1, %0
%12 = add i32 %11, %2
%13 = add i32 %12, %3
%14 = add i32 %13, %4
%15 = add i32 %14, %5
%16 = add i32 %15, %6
%17 = add i32 %16, %7
%18 = add i32 %17, %8
%19 = add i32 %18, %9
%20 = sext i32 %19 to i64
ret i64 %20
}
void async_unregister_domain(struct async_domain *domain) {}


x86 assembly (clang, -O0):
<async_unregister_domain>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<async_unregister_domain>:
ret

LLVM IR (-O0):
%struct.async_domain = type opaque
define void @async_unregister_domain(%struct.async_domain* %0) {
%2 = alloca %struct.async_domain*
store %struct.async_domain* %0, %struct.async_domain** %2
ret void
}

LLVM IR (-O2):
%struct.async_domain = type opaque
define void @async_unregister_domain(%struct.async_domain* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ a();
int /*<<< orphan*/ b();
int /*<<< orphan*/ c();
int main() {
  a();
  b();
  c();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <a@plt>
mov    $0x0,%al
call   1030 <b@plt>
mov    $0x0,%al
call   1040 <c@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <a@plt>
xor    %eax,%eax
call   1030 <b@plt>
xor    %eax,%eax
call   1040 <c@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @a()
%3 = call i32 (...) @b()
%4 = call i32 (...) @c()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @a()
%2 = tail call i32 (...) @b()
%3 = tail call i32 (...) @c()
ret i32 0
}
int test_imm_ADint16_reg(short val) {
  return ((val) & (-0xAD << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_ADint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffff53,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_ADint16_reg>:
test   $0xff53,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_ADint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -173
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_ADint16_reg(i16 signext %0) {
%2 = and i16 %0, -173
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
scalar_t__ malloc(int);
void foo(void ***buf) { *buf = (void **)malloc(4); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbx
mov    %rdi,%rbx
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @foo(i8*** %0) {
%2 = alloca i8***
store i8*** %0, i8**** %2
%3 = call i64 @malloc(i32 4)
%4 = inttoptr i64 %3 to i8**
%5 = load i8***, i8**** %2
store i8** %4, i8*** %5
ret void
}

LLVM IR (-O2):
define void @foo(i8*** nocapture writeonly %0) {
%2 = tail call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i8**
store i8** %3, i8*** %0
ret void
}
int foo32() { return 32; }


x86 assembly (clang, -O0):
<foo32>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo32>:
mov    $0x20,%eax
ret

LLVM IR (-O0):
define i32 @foo32() {
ret i32 32
}

LLVM IR (-O2):
define i32 @foo32() {
ret i32 32
}
void initstate(i, j, k) unsigned i;
char *j;
int k;
{}


x86 assembly (clang, -O0):
<initstate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<initstate>:
ret

LLVM IR (-O0):
define void @initstate(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
define void @initstate(i32 %0, i8* nocapture %1, i32 %2) {
ret void
}
void ff_hevc_put_hevc_uni_w_epel_v6_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_epel_v6_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_epel_v6_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_epel_v6_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_epel_v6_8_sse4() {
ret void
}
/* Type definitions */
struct evhttp_request {
  scalar_t__ response_code;
};

/* Variables and functions */
scalar_t__ HTTP_OK;
int /*<<< orphan*/ printf(char *);
void on_end_of_sudirribe(struct evhttp_request *req, void *nil) {
  (void)nil;
  if (!req || req->response_code != HTTP_OK) {
  }
  printf("end of sudirribe\n");
}


x86 assembly (clang, -O0):
<on_end_of_sudirribe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1142 <on_end_of_sudirribe+0x32>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    0x2ea7(%rip),%rcx
cmp    (%rcx),%rax
je     1147 <on_end_of_sudirribe+0x37>
jmp    1147 <on_end_of_sudirribe+0x37>
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<on_end_of_sudirribe>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
%struct.evhttp_request = type { i64 }
@HTTP_OK = global i64 0
@.str = [18 x i8] c"end of sudirribe\0A\00"
define void @on_end_of_sudirribe(%struct.evhttp_request* %0, i8* %1) {
%3 = alloca %struct.evhttp_request*
%4 = alloca i8*
store %struct.evhttp_request* %0, %struct.evhttp_request** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load %struct.evhttp_request*, %struct.evhttp_request** %3
%7 = icmp ne %struct.evhttp_request* %6, null
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load %struct.evhttp_request*, %struct.evhttp_request** %3
%10 = getelementptr inbounds %struct.evhttp_request, %struct.evhttp_request* %9, i32 0, i32 0
%11 = load i64, i64* %10
%12 = load i64, i64* @HTTP_OK
%13 = icmp ne i64 %11, %12
br i1 %13, label %14, label %15
14: ; preds = %8, %2
br label %15
15: ; preds = %14, %8
%16 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.evhttp_request = type { i64 }
@HTTP_OK = global i64 0
@str = [17 x i8] c"end of sudirribe\00"
define void @on_end_of_sudirribe(%struct.evhttp_request* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
char *Format_String(char *);
scalar_t__ Malloc(int);
int /*<<< orphan*/ free(char *);
int /*<<< orphan*/ memcpy(char *, char const *, int);
const char *Format_Len_String(const char *string, int len) {
  char *data;
  const char *result;
  data = (char *)Malloc(len + 1);
  memcpy(data, string, len);
  data[len] = '\0';
  result = Format_String(data);
  free(data);
  return result;
}


x86 assembly (clang, -O0):
<Format_Len_String>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
add    $0x1,%edi
call   1040 <Malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1050 <memcpy@plt>
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%rdi
call   1060 <Format_String@plt>
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Format_Len_String>:
push   %r15
push   %r14
push   %rbx
mov    %esi,%r15d
mov    %rdi,%r14
lea    0x1(%r15),%edi
call   1040 <Malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15d,%edx
call   1050 <memcpy@plt>
movslq %r15d,%rax
movb   $0x0,(%rbx,%rax,1)
mov    %rbx,%rdi
call   1060 <Format_String@plt>
mov    %rax,%r14
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %r14,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @Format_Len_String(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = add nsw i32 %7, 1
%9 = call i64 @Malloc(i32 %8)
%10 = inttoptr i64 %9 to i8*
store i8* %10, i8** %5
%11 = load i8*, i8** %5
%12 = load i8*, i8** %3
%13 = load i32, i32* %4
%14 = call i32 @memcpy(i8* %11, i8* %12, i32 %13)
%15 = load i8*, i8** %5
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
store i8 0, i8* %18
%19 = load i8*, i8** %5
%20 = call i8* @Format_String(i8* %19)
store i8* %20, i8** %6
%21 = load i8*, i8** %5
%22 = call i32 @free(i8* %21)
%23 = load i8*, i8** %6
ret i8* %23
}

LLVM IR (-O2):
define i8* @Format_Len_String(i8* %0, i32 %1) {
%3 = add nsw i32 %1, 1
%4 = tail call i64 @Malloc(i32 %3)
%5 = inttoptr i64 %4 to i8*
%6 = tail call i32 @memcpy(i8* %5, i8* %0, i32 %1)
%7 = sext i32 %1 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
store i8 0, i8* %8
%9 = tail call i8* @Format_String(i8* %5)
%10 = tail call i32 @free(i8* %5)
ret i8* %9
}
/* Variables and functions */
bool cmp3(unsigned int a1, unsigned int a2, unsigned int a3, unsigned int b1,
          unsigned int b2, unsigned int b3) {
  if (a1 != b1)
    return (a1 < b1);
  if (a2 != b2)
    return (a2 < b2);
  return (a3 < b3);
}


x86 assembly (clang, -O0):
<cmp3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    %r9d,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x14(%rbp),%eax
je     113a <cmp3+0x3a>
mov    -0x8(%rbp),%eax
cmp    -0x14(%rbp),%eax
setb   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    116d <cmp3+0x6d>
mov    -0xc(%rbp),%eax
cmp    -0x18(%rbp),%eax
je     115c <cmp3+0x5c>
mov    -0xc(%rbp),%eax
cmp    -0x18(%rbp),%eax
setb   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    116d <cmp3+0x6d>
mov    -0x10(%rbp),%eax
cmp    -0x1c(%rbp),%eax
setb   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp3>:
cmp    %ecx,%edi
jne    110c <cmp3+0xc>
cmp    %r8d,%esi
jne    110c <cmp3+0xc>
cmp    %r9d,%edx
setb   %al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @cmp3(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32 %4, i32* %12
store i32 %5, i32* %13
%14 = load i32, i32* %8
%15 = load i32, i32* %11
%16 = icmp ne i32 %14, %15
br i1 %16, label %17, label %22
17: ; preds = %6
%18 = load i32, i32* %8
%19 = load i32, i32* %11
%20 = icmp ult i32 %18, %19
%21 = zext i1 %20 to i32
store i32 %21, i32* %7
br label %36
22: ; preds = %6
%23 = load i32, i32* %9
%24 = load i32, i32* %12
%25 = icmp ne i32 %23, %24
br i1 %25, label %26, label %31
26: ; preds = %22
%27 = load i32, i32* %9
%28 = load i32, i32* %12
%29 = icmp ult i32 %27, %28
%30 = zext i1 %29 to i32
store i32 %30, i32* %7
br label %36
31: ; preds = %22
%32 = load i32, i32* %10
%33 = load i32, i32* %13
%34 = icmp ult i32 %32, %33
%35 = zext i1 %34 to i32
store i32 %35, i32* %7
br label %36
36: ; preds = %31, %26, %17
%37 = load i32, i32* %7
ret i32 %37
}

LLVM IR (-O2):
define i32 @cmp3(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = icmp eq i32 %0, %3
br i1 %7, label %10, label %8
8: ; preds = %6
%9 = icmp ult i32 %0, %3
br label %16
10: ; preds = %6
%11 = icmp eq i32 %1, %4
br i1 %11, label %14, label %12
12: ; preds = %10
%13 = icmp ult i32 %1, %4
br label %16
14: ; preds = %10
%15 = icmp ult i32 %2, %5
br label %16
16: ; preds = %14, %12, %8
%17 = phi i1 [ %9, %8 ], [ %13, %12 ], [ %15, %14 ]
%18 = zext i1 %17 to i32
ret i32 %18
}
int test_imm_F9uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0xF9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F9uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0xf9,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F9uint64_midword_reg>:
test   $0xf90000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F9uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 249
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_F9uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 16318464
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void seccomp_filter_fork(struct task_struct *child,
                         struct task_struct *parent) {}


x86 assembly (clang, -O0):
<seccomp_filter_fork>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<seccomp_filter_fork>:
ret

LLVM IR (-O0):
%struct.task_struct = type opaque
define void @seccomp_filter_fork(%struct.task_struct* %0, %struct.task_struct* %1) {
%3 = alloca %struct.task_struct*
%4 = alloca %struct.task_struct*
store %struct.task_struct* %0, %struct.task_struct** %3
store %struct.task_struct* %1, %struct.task_struct** %4
ret void
}

LLVM IR (-O2):
%struct.task_struct = type opaque
define void @seccomp_filter_fork(%struct.task_struct* nocapture %0, %struct.task_struct* nocapture %1) {
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint32_t;

/* Variables and functions */
void put_unaligned_be32(uint32_t val, uint8_t *buf) {
  buf[0] = (uint8_t)(val >> 24);
  buf[1] = (uint8_t)(val >> 16);
  buf[2] = (uint8_t)(val >> 8);
  buf[3] = (uint8_t)val;
}


x86 assembly (clang, -O0):
<put_unaligned_be32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x18,%eax
movslq %eax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
movslq %eax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,0x8(%rax)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
movslq %eax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,0x10(%rax)
movslq -0x4(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,0x18(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_unaligned_be32>:
mov    %edi,%eax
sar    $0x18,%eax
cltq
mov    %rax,(%rsi)
mov    %edi,%eax
sar    $0x10,%eax
cltq
mov    %rax,0x8(%rsi)
movslq %edi,%rax
sar    $0x8,%edi
movslq %edi,%rcx
mov    %rcx,0x10(%rsi)
mov    %rax,0x18(%rsi)
ret

LLVM IR (-O0):
define void @put_unaligned_be32(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%5 = load i32, i32* %3
%6 = ashr i32 %5, 24
%7 = sext i32 %6 to i64
%8 = load i64*, i64** %4
%9 = getelementptr inbounds i64, i64* %8, i64 0
store i64 %7, i64* %9
%10 = load i32, i32* %3
%11 = ashr i32 %10, 16
%12 = sext i32 %11 to i64
%13 = load i64*, i64** %4
%14 = getelementptr inbounds i64, i64* %13, i64 1
store i64 %12, i64* %14
%15 = load i32, i32* %3
%16 = ashr i32 %15, 8
%17 = sext i32 %16 to i64
%18 = load i64*, i64** %4
%19 = getelementptr inbounds i64, i64* %18, i64 2
store i64 %17, i64* %19
%20 = load i32, i32* %3
%21 = sext i32 %20 to i64
%22 = load i64*, i64** %4
%23 = getelementptr inbounds i64, i64* %22, i64 3
store i64 %21, i64* %23
ret void
}

LLVM IR (-O2):
define void @put_unaligned_be32(i32 %0, i64* nocapture writeonly %1) {
%3 = ashr i32 %0, 24
%4 = sext i32 %3 to i64
store i64 %4, i64* %1
%5 = ashr i32 %0, 16
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds i64, i64* %1, i64 1
store i64 %6, i64* %7
%8 = ashr i32 %0, 8
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i64, i64* %1, i64 2
store i64 %9, i64* %10
%11 = sext i32 %0 to i64
%12 = getelementptr inbounds i64, i64* %1, i64 3
store i64 %11, i64* %12
ret void
}
/* Variables and functions */
int /*<<< orphan*/ O_NDELAY;
int fcntl_fl_on(int, int /*<<< orphan*/);
int nonblock_on(int fd) { return fcntl_fl_on(fd, O_NDELAY); }


x86 assembly (clang, -O0):
<nonblock_on>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
call   1030 <fcntl_fl_on@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nonblock_on>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <fcntl_fl_on@plt>

LLVM IR (-O0):
@O_NDELAY = global i32 0
define i32 @nonblock_on(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @O_NDELAY
%5 = call i32 @fcntl_fl_on(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@O_NDELAY = global i32 0
define i32 @nonblock_on(i32 %0) {
%2 = load i32, i32* @O_NDELAY
%3 = tail call i32 @fcntl_fl_on(i32 %0, i32 %2)
ret i32 %3
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint32_t;

/* Variables and functions */
uint32_t load24_littleendian(const uint8_t x[3]) {
  uint32_t r;
  r = (uint32_t)x[0];
  r |= (uint32_t)x[1] << 8;
  r |= (uint32_t)x[2] << 16;
  return r;
}


x86 assembly (clang, -O0):
<load24_littleendian>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
shl    $0x8,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%rax
shl    $0x10,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<load24_littleendian>:
mov    0x8(%rdi),%ecx
mov    0x10(%rdi),%eax
shl    $0x8,%ecx
or     (%rdi),%ecx
shl    $0x10,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @load24_littleendian(i64* %0) {
%2 = alloca i64*
%3 = alloca i32
store i64* %0, i64** %2
%4 = load i64*, i64** %2
%5 = getelementptr inbounds i64, i64* %4, i64 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
store i32 %7, i32* %3
%8 = load i64*, i64** %2
%9 = getelementptr inbounds i64, i64* %8, i64 1
%10 = load i64, i64* %9
%11 = trunc i64 %10 to i32
%12 = shl i32 %11, 8
%13 = load i32, i32* %3
%14 = or i32 %13, %12
store i32 %14, i32* %3
%15 = load i64*, i64** %2
%16 = getelementptr inbounds i64, i64* %15, i64 2
%17 = load i64, i64* %16
%18 = trunc i64 %17 to i32
%19 = shl i32 %18, 16
%20 = load i32, i32* %3
%21 = or i32 %20, %19
store i32 %21, i32* %3
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @load24_littleendian(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = trunc i64 %2 to i32
%4 = getelementptr inbounds i64, i64* %0, i64 1
%5 = load i64, i64* %4
%6 = trunc i64 %5 to i32
%7 = shl i32 %6, 8
%8 = or i32 %7, %3
%9 = getelementptr inbounds i64, i64* %0, i64 2
%10 = load i64, i64* %9
%11 = trunc i64 %10 to i32
%12 = shl i32 %11, 16
%13 = or i32 %8, %12
ret i32 %13
}
/* Type definitions */
typedef int /*<<< orphan*/ mpz_t;

/* Variables and functions */
int /*<<< orphan*/ mpz_add_ui(int /*<<< orphan*/, int /*<<< orphan*/,
                              unsigned long);
int /*<<< orphan*/ mpz_mul_si(int /*<<< orphan*/, int /*<<< orphan*/, long);
int /*<<< orphan*/ mpz_set_si(int /*<<< orphan*/, long);
void set(mpz_t z, long x, int y) {
  mpz_set_si(z, x);
  mpz_mul_si(z, z, x);
  mpz_mul_si(z, z, x);
  mpz_add_ui(z, z, (unsigned long)y);
}


x86 assembly (clang, -O0):
<set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <mpz_set_si@plt>
mov    -0x4(%rbp),%edi
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1050 <mpz_mul_si@plt>
mov    -0x4(%rbp),%edi
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1050 <mpz_mul_si@plt>
mov    -0x4(%rbp),%edi
mov    -0x4(%rbp),%esi
movslq -0x14(%rbp),%rdx
call   1040 <mpz_add_ui@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %edi,%ebp
call   1030 <mpz_set_si@plt>
mov    %ebp,%edi
mov    %ebp,%esi
mov    %rbx,%rdx
call   1050 <mpz_mul_si@plt>
mov    %ebp,%edi
mov    %ebp,%esi
mov    %rbx,%rdx
call   1050 <mpz_mul_si@plt>
movslq %r14d,%rdx
mov    %ebp,%edi
mov    %ebp,%esi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <mpz_add_ui@plt>

LLVM IR (-O0):
define void @set(i32 %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i64, i64* %5
%9 = call i32 @mpz_set_si(i32 %7, i64 %8)
%10 = load i32, i32* %4
%11 = load i32, i32* %4
%12 = load i64, i64* %5
%13 = call i32 @mpz_mul_si(i32 %10, i32 %11, i64 %12)
%14 = load i32, i32* %4
%15 = load i32, i32* %4
%16 = load i64, i64* %5
%17 = call i32 @mpz_mul_si(i32 %14, i32 %15, i64 %16)
%18 = load i32, i32* %4
%19 = load i32, i32* %4
%20 = load i32, i32* %6
%21 = sext i32 %20 to i64
%22 = call i32 @mpz_add_ui(i32 %18, i32 %19, i64 %21)
ret void
}

LLVM IR (-O2):
define void @set(i32 %0, i64 %1, i32 %2) {
%4 = tail call i32 @mpz_set_si(i32 %0, i64 %1)
%5 = tail call i32 @mpz_mul_si(i32 %0, i32 %0, i64 %1)
%6 = tail call i32 @mpz_mul_si(i32 %0, i32 %0, i64 %1)
%7 = sext i32 %2 to i64
%8 = tail call i32 @mpz_add_ui(i32 %0, i32 %0, i64 %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ execvp(char *, char **);
int main(int argc, char **argv) {
  if (argc < 2)
    return 1;
  execvp(argv[1], argv + 2);
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    113c <main+0x2c>
movl   $0x1,-0x4(%rbp)
jmp    1158 <main+0x48>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
mov    -0x10(%rbp),%rsi
add    $0x10,%rsi
call   1030 <execvp@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
cmp    $0x2,%edi
jl     1127 <main+0x17>
push   %rax
mov    0x8(%rsi),%rdi
add    $0x10,%rsi
call   1030 <execvp@plt>
add    $0x8,%rsp
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 2
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 1, i32* %3
br label %16
9: ; preds = %2
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 1
%12 = load i8*, i8** %11
%13 = load i8**, i8*** %5
%14 = getelementptr inbounds i8*, i8** %13, i64 2
%15 = call i32 @execvp(i8* %12, i8** %14)
store i32 1, i32* %3
br label %16
16: ; preds = %9, %8
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = getelementptr inbounds i8*, i8** %1, i64 2
%8 = tail call i32 @execvp(i8* %6, i8** %7)
br label %9
9: ; preds = %2, %4
ret i32 1
}