xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ __m64;
typedef int /*<<< orphan*/ __m128d;

/* Variables and functions */
int /*<<< orphan*/ _mm_cvttpd_pi32(int /*<<< orphan*/);
__m64 test_mm_cvttpd_pi32(__m128d a) { return _mm_cvttpd_pi32(a); }


x86 assembly (clang, -O0):
<test_mm_cvttpd_pi32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_mm_cvttpd_pi32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cvttpd_pi32>:
jmp    1030 <_mm_cvttpd_pi32@plt>

LLVM IR (-O0):
define i32 @test_mm_cvttpd_pi32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_mm_cvttpd_pi32(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test_mm_cvttpd_pi32(i32 %0) {
%2 = tail call i32 @_mm_cvttpd_pi32(i32 %0)
ret i32 %2
}
/* Variables and functions */
scalar_t__ send_command_to_variable_server(int, char *);
int set_ascii(int socket) {
  if (send_command_to_variable_server(socket, "trick.var_ascii()") < 0) {
    return -1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<set_ascii>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
lea    0xedb(%rip),%rsi
call   1030 <send_command_to_variable_server@plt>
cmp    $0x0,%rax
jge    1140 <set_ascii+0x30>
movl   $0xffffffff,-0x4(%rbp)
jmp    1147 <set_ascii+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_ascii>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <send_command_to_variable_server@plt>
sar    $0x3f,%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"trick.var_ascii()\00"
define i32 @set_ascii(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @send_command_to_variable_server(i32 %4, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%6 = icmp slt i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 -1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
@.str = [18 x i8] c"trick.var_ascii()\00"
define i32 @set_ascii(i32 %0) {
%2 = tail call i64 @send_command_to_variable_server(i32 %0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%3 = ashr i64 %2, 63
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
scalar_t__ malloc(int);
int *const get_num2() {
  int *x = (int *)malloc(sizeof(int) * 1);
  *x = 2;
  return x;
}


x86 assembly (clang, -O0):
<get_num2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x2,(%rax)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_num2>:
push   %rax
mov    $0x4,%edi
call   1030 <malloc@plt>
movl   $0x2,(%rax)
pop    %rcx
ret

LLVM IR (-O0):
define i32* @get_num2() {
%1 = alloca i32*
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32* %3, i32** %1
%4 = load i32*, i32** %1
store i32 2, i32* %4
%5 = load i32*, i32** %1
ret i32* %5
}

LLVM IR (-O2):
define i32* @get_num2() {
%1 = tail call i64 @malloc(i32 4)
%2 = inttoptr i64 %1 to i32*
store i32 2, i32* %2
ret i32* %2
}
int dfm_params(struct snd_pcm_substream *substream,
               struct snd_pcm_hw_params *params) {
  sp_asoc_pr_dbg("%s \n", __func__);
  dfm_rate(params);
  return 0;
}


x86 assembly (clang, -O0):
<dfm_params>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec9(%rip),%rdi
lea    0xec7(%rip),%rsi
mov    $0x0,%al
call   1040 <sp_asoc_pr_dbg@plt>
mov    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1030 <dfm_rate@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dfm_params>:
push   %rbx
mov    %rsi,%rbx
lea    0xed5(%rip),%rdi
lea    0xed3(%rip),%rsi
xor    %eax,%eax
call   1040 <sp_asoc_pr_dbg@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <dfm_rate@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.snd_pcm_substream = type opaque
%struct.snd_pcm_hw_params = type opaque
@.str = [5 x i8] c"%s \0A\00"
@__func__.dfm_params = [11 x i8] c"dfm_params\00"
define i32 @dfm_params(%struct.snd_pcm_substream* %0, %struct.snd_pcm_hw_params* %1) {
%3 = alloca %struct.snd_pcm_substream*
%4 = alloca %struct.snd_pcm_hw_params*
store %struct.snd_pcm_substream* %0, %struct.snd_pcm_substream** %3
store %struct.snd_pcm_hw_params* %1, %struct.snd_pcm_hw_params** %4
%5 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @sp_asoc_pr_dbg to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @__func__.dfm_params, i64 0, i64 0))
%6 = load %struct.snd_pcm_hw_params*, %struct.snd_pcm_hw_params** %4
%7 = call i32 (%struct.snd_pcm_hw_params*, ...) bitcast (i32 (...)* @dfm_rate to i32 (%struct.snd_pcm_hw_params*, ...)*)(%struct.snd_pcm_hw_params* %6)
ret i32 0
}

LLVM IR (-O2):
%struct.snd_pcm_substream = type opaque
%struct.snd_pcm_hw_params = type opaque
@.str = [5 x i8] c"%s \0A\00"
@__func__.dfm_params = [11 x i8] c"dfm_params\00"
define i32 @dfm_params(%struct.snd_pcm_substream* nocapture readnone %0, %struct.snd_pcm_hw_params* %1) {
%3 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @sp_asoc_pr_dbg to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @__func__.dfm_params, i64 0, i64 0))
%4 = tail call i32 (%struct.snd_pcm_hw_params*, ...) bitcast (i32 (...)* @dfm_rate to i32 (%struct.snd_pcm_hw_params*, ...)*)(%struct.snd_pcm_hw_params* %1)
ret i32 0
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMR66_set(void) { return U_WMRCORENONE_set("U_WMR66"); }


x86 assembly (clang, -O0):
<U_WMR66_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR66_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR66\00"
define i8* @U_WMR66_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR66\00"
define i8* @U_WMR66_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
int test_imm_00uint8_mem(unsigned char *val) {
  return ((*val) & (-0x00 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0x0,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    $0xffffffd8,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_00uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 0
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_00uint8_mem(i8* nocapture readnone %0) {
ret i32 -40
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, char *);
void HitKey(void) {
  char toto;
  printf("\nHit <Return> to continue");
  scanf("%c", &toto);
  printf("\n");
}


x86 assembly (clang, -O0):
<HitKey>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
lea    0xedf(%rip),%rdi
lea    -0x1(%rbp),%rsi
call   1040 <scanf@plt>
lea    0xed2(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HitKey>:
push   %rax
lea    0xec8(%rip),%rdi
call   1040 <printf@plt>
lea    0xed6(%rip),%rdi
lea    0x7(%rsp),%rsi
call   1050 <scanf@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [26 x i8] c"\0AHit <Return> to continue\00"
@.str.1 = [3 x i8] c"%c\00"
@.str.2 = [2 x i8] c"\0A\00"
define void @HitKey() {
%1 = alloca i8
%2 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %1)
%4 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [26 x i8] c"\0AHit <Return> to continue\00"
@.str.1 = [3 x i8] c"%c\00"
define void @HitKey() {
%1 = alloca i8
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %1)
%4 = call i32 @putchar(i32 10)
ret void
}
float blendBehaviour(float inA, float inB, float finalA, float finalB) {
  float totalA = inA * finalA;
  float totalB = inB * finalB;
  return ((totalA + totalB) / (inA + inB));
}


x86 assembly (clang, -O0):
<blendBehaviour>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x8(%rbp),%xmm0
mulss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  -0x14(%rbp),%xmm0
addss  -0x18(%rbp),%xmm0
movss  -0x4(%rbp),%xmm1
addss  -0x8(%rbp),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<blendBehaviour>:
mulss  %xmm0,%xmm2
mulss  %xmm1,%xmm3
addss  %xmm2,%xmm3
addss  %xmm1,%xmm0
divss  %xmm0,%xmm3
movaps %xmm3,%xmm0
ret

LLVM IR (-O0):
define float @blendBehaviour(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%11 = load float, float* %5
%12 = load float, float* %7
%13 = fmul float %11, %12
store float %13, float* %9
%14 = load float, float* %6
%15 = load float, float* %8
%16 = fmul float %14, %15
store float %16, float* %10
%17 = load float, float* %9
%18 = load float, float* %10
%19 = fadd float %17, %18
%20 = load float, float* %5
%21 = load float, float* %6
%22 = fadd float %20, %21
%23 = fdiv float %19, %22
ret float %23
}

LLVM IR (-O2):
define float @blendBehaviour(float %0, float %1, float %2, float %3) {
%5 = fmul float %0, %2
%6 = fmul float %1, %3
%7 = fadd float %5, %6
%8 = fadd float %0, %1
%9 = fdiv float %7, %8
ret float %9
}
void nseel_asm_stack_peek_end(void) {}


x86 assembly (clang, -O0):
<nseel_asm_stack_peek_end>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nseel_asm_stack_peek_end>:
ret

LLVM IR (-O0):
define void @nseel_asm_stack_peek_end() {
ret void
}

LLVM IR (-O2):
define void @nseel_asm_stack_peek_end() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ outb(char, int);
void set_dma_mode(unsigned int dmanr, char mode) {
  if (dmanr <= 3)
    outb(mode | dmanr, 0x0B);
  else
    outb(mode | (dmanr & 3), 0xD6);
}


x86 assembly (clang, -O0):
<set_dma_mode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
cmpl   $0x3,-0x4(%rbp)
ja     1144 <set_dma_mode+0x34>
movsbl -0x5(%rbp),%eax
or     -0x4(%rbp),%eax
mov    $0xb,%esi
movsbl %al,%edi
call   1030 <outb@plt>
jmp    115d <set_dma_mode+0x4d>
movsbl -0x5(%rbp),%eax
mov    -0x4(%rbp),%ecx
and    $0x3,%ecx
or     %ecx,%eax
mov    $0xd6,%esi
movsbl %al,%edi
call   1030 <outb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_dma_mode>:
mov    %edi,%eax
and    $0x3,%al
cmp    $0x4,%edi
movzbl %al,%ecx
cmovb  %edi,%ecx
mov    $0xb,%edx
mov    $0xd6,%eax
cmovb  %edx,%eax
or     %esi,%ecx
movsbl %cl,%edi
mov    %eax,%esi
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @set_dma_mode(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
%5 = load i32, i32* %3
%6 = icmp ule i32 %5, 3
br i1 %6, label %7, label %14
7: ; preds = %2
%8 = load i8, i8* %4
%9 = sext i8 %8 to i32
%10 = load i32, i32* %3
%11 = or i32 %9, %10
%12 = trunc i32 %11 to i8
%13 = call i32 @outb(i8 signext %12, i32 11)
br label %22
14: ; preds = %2
%15 = load i8, i8* %4
%16 = sext i8 %15 to i32
%17 = load i32, i32* %3
%18 = and i32 %17, 3
%19 = or i32 %16, %18
%20 = trunc i32 %19 to i8
%21 = call i32 @outb(i8 signext %20, i32 214)
br label %22
22: ; preds = %14, %7
ret void
}

LLVM IR (-O2):
define void @set_dma_mode(i32 %0, i8 signext %1) {
%3 = icmp ult i32 %0, 4
%4 = trunc i32 %0 to i8
%5 = and i8 %4, 3
%6 = select i1 %3, i8 %4, i8 %5
%7 = select i1 %3, i32 11, i32 214
%8 = or i8 %6, %1
%9 = tail call i32 @outb(i8 signext %8, i32 %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void parenthandler(int signo __attribute__((unused))) {
  printf("Caught signal from parent!\n");
  exit(-1);
}


x86 assembly (clang, -O0):
<parenthandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<parenthandler>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"Caught signal from parent!\0A\00"
define void @parenthandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@str = [27 x i8] c"Caught signal from parent!\00"
define void @parenthandler(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 -1)
unreachable
}
int opencurry(int argc, char **argv) { return 0; }


x86 assembly (clang, -O0):
<opencurry>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<opencurry>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @opencurry(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @opencurry(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
void i2d_EXTENDED_KEY_USAGE(void) {}


x86 assembly (clang, -O0):
<i2d_EXTENDED_KEY_USAGE>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_EXTENDED_KEY_USAGE>:
ret

LLVM IR (-O0):
define void @i2d_EXTENDED_KEY_USAGE() {
ret void
}

LLVM IR (-O2):
define void @i2d_EXTENDED_KEY_USAGE() {
ret void
}
unsigned short greenValue(unsigned short c) { return ((c >> 5) & 63) << 2; }


x86 assembly (clang, -O0):
<greenValue>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
sar    $0x5,%eax
and    $0x3f,%eax
shl    $0x2,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<greenValue>:
mov    %edi,%eax
shr    $0x3,%eax
and    $0xfc,%eax
ret

LLVM IR (-O0):
define zeroext i16 @greenValue(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = ashr i32 %4, 5
%6 = and i32 %5, 63
%7 = shl i32 %6, 2
%8 = trunc i32 %7 to i16
ret i16 %8
}

LLVM IR (-O2):
define zeroext i16 @greenValue(i16 zeroext %0) {
%2 = lshr i16 %0, 3
%3 = and i16 %2, 252
ret i16 %3
}
int wake_lock_active(struct wake_lock *lock) { return 0; }


x86 assembly (clang, -O0):
<wake_lock_active>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wake_lock_active>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.wake_lock = type opaque
define i32 @wake_lock_active(%struct.wake_lock* %0) {
%2 = alloca %struct.wake_lock*
store %struct.wake_lock* %0, %struct.wake_lock** %2
ret i32 0
}

LLVM IR (-O2):
%struct.wake_lock = type opaque
define i32 @wake_lock_active(%struct.wake_lock* nocapture readnone %0) {
ret i32 0
}