xunge/DecIR huggingface dataset:
int mapHexDigit(int digit) {
  if (digit >= 'A' && digit <= 'F')
    return digit + 10 - 'A';
  if (digit >= 'a' && digit <= 'f')
    return digit + 10 - 'a';
  if (digit >= '0' && digit <= '9')
    return digit - '0';
  return -1;
}


x86 assembly (clang, -O0):
<mapHexDigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x41,-0x8(%rbp)
jl     112c <mapHexDigit+0x2c>
cmpl   $0x46,-0x8(%rbp)
jg     112c <mapHexDigit+0x2c>
mov    -0x8(%rbp),%eax
add    $0xa,%eax
sub    $0x41,%eax
mov    %eax,-0x4(%rbp)
jmp    117a <mapHexDigit+0x7a>
cmpl   $0x61,-0x8(%rbp)
jl     1151 <mapHexDigit+0x51>
cmpl   $0x66,-0x8(%rbp)
jg     1151 <mapHexDigit+0x51>
mov    -0x8(%rbp),%eax
add    $0xa,%eax
sub    $0x61,%eax
mov    %eax,-0x4(%rbp)
jmp    117a <mapHexDigit+0x7a>
cmpl   $0x30,-0x8(%rbp)
jl     1173 <mapHexDigit+0x73>
cmpl   $0x39,-0x8(%rbp)
jg     1173 <mapHexDigit+0x73>
mov    -0x8(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    117a <mapHexDigit+0x7a>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mapHexDigit>:
mov    %edi,%eax
lea    -0x41(%rax),%ecx
cmp    $0x5,%ecx
ja     110e <mapHexDigit+0xe>
add    $0xffffffc9,%eax
ret
lea    -0x61(%rax),%ecx
cmp    $0x5,%ecx
ja     111a <mapHexDigit+0x1a>
add    $0xffffffa9,%eax
ret
add    $0xffffffd0,%eax
cmp    $0xa,%eax
mov    $0xffffffff,%ecx
cmovb  %eax,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @mapHexDigit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 65
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 70
br i1 %8, label %9, label %13
9: ; preds = %6
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 10
%12 = sub nsw i32 %11, 65
store i32 %12, i32* %2
br label %33
13: ; preds = %6, %1
%14 = load i32, i32* %3
%15 = icmp sge i32 %14, 97
br i1 %15, label %16, label %23
16: ; preds = %13
%17 = load i32, i32* %3
%18 = icmp sle i32 %17, 102
br i1 %18, label %19, label %23
19: ; preds = %16
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 10
%22 = sub nsw i32 %21, 97
store i32 %22, i32* %2
br label %33
23: ; preds = %16, %13
%24 = load i32, i32* %3
%25 = icmp sge i32 %24, 48
br i1 %25, label %26, label %32
26: ; preds = %23
%27 = load i32, i32* %3
%28 = icmp sle i32 %27, 57
br i1 %28, label %29, label %32
29: ; preds = %26
%30 = load i32, i32* %3
%31 = sub nsw i32 %30, 48
store i32 %31, i32* %2
br label %33
32: ; preds = %26, %23
store i32 -1, i32* %2
br label %33
33: ; preds = %32, %29, %19, %9
%34 = load i32, i32* %2
ret i32 %34
}

LLVM IR (-O2):
define i32 @mapHexDigit(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 6
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = add nsw i32 %0, -55
br label %15
6: ; preds = %1
%7 = add i32 %0, -97
%8 = icmp ult i32 %7, 6
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = add nsw i32 %0, -87
br label %15
11: ; preds = %6
%12 = add i32 %0, -48
%13 = icmp ult i32 %12, 10
%14 = select i1 %13, i32 %12, i32 -1
br label %15
15: ; preds = %11, %9, %4
%16 = phi i32 [ %5, %4 ], [ %10, %9 ], [ %14, %11 ]
ret i32 %16
}
void handle_release(void *handle) {}


x86 assembly (clang, -O0):
<handle_release>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_release>:
ret

LLVM IR (-O0):
define void @handle_release(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @handle_release(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int chown(char const *, int, int);
int g_chown(const char *name, int uid, int gid) {
  return chown(name, uid, gid);
}


x86 assembly (clang, -O0):
<g_chown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <chown@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_chown>:
jmp    1030 <chown@plt>

LLVM IR (-O0):
define i32 @g_chown(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @chown(i8* %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @g_chown(i8* nocapture %0, i32 %1, i32 %2) {
%4 = tail call i32 @chown(i8* %0, i32 %1, i32 %2)
ret i32 %4
}
alphanum(c) int c;
{
  return ((c >= 'a' && c <= 'z') || (c >= 'A' && c <= 'Z') ||
          (c >= '0' && c <= '9'));
}


x86 assembly (clang, -O0):
<alphanum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x61,-0x4(%rbp)
jl     1120 <alphanum+0x20>
mov    $0x1,%al
cmpl   $0x7a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1158 <alphanum+0x58>
cmpl   $0x41,-0x4(%rbp)
jl     1139 <alphanum+0x39>
mov    $0x1,%al
cmpl   $0x5a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1158 <alphanum+0x58>
xor    %eax,%eax
cmpl   $0x30,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     1152 <alphanum+0x52>
cmpl   $0x39,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<alphanum>:
mov    %edi,%eax
and    $0xffffffdf,%eax
add    $0xffffffbf,%eax
cmp    $0x1a,%eax
setb   %al
add    $0xffffffd0,%edi
cmp    $0xa,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @alphanum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 97
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 122
br i1 %7, label %22, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 65
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 90
br i1 %13, label %22, label %14
14: ; preds = %11, %8
%15 = load i32, i32* %2
%16 = icmp sge i32 %15, 48
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp sle i32 %18, 57
br label %20
20: ; preds = %17, %14
%21 = phi i1 [ false, %14 ], [ %19, %17 ]
br label %22
22: ; preds = %20, %11, %5
%23 = phi i1 [ true, %11 ], [ true, %5 ], [ %21, %20 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @alphanum(i32 %0) {
%2 = and i32 %0, -33
%3 = add i32 %2, -65
%4 = icmp ult i32 %3, 26
%5 = add i32 %0, -48
%6 = icmp ult i32 %5, 10
%7 = or i1 %6, %4
%8 = zext i1 %7 to i32
ret i32 %8
}
void foo1() {}


x86 assembly (clang, -O0):
<foo1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo1>:
ret

LLVM IR (-O0):
define void @foo1() {
ret void
}

LLVM IR (-O2):
define void @foo1() {
ret void
}
int fun967() { return 967; }


x86 assembly (clang, -O0):
<fun967>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3c7,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun967>:
mov    $0x3c7,%eax
ret

LLVM IR (-O0):
define i32 @fun967() {
ret i32 967
}

LLVM IR (-O2):
define i32 @fun967() {
ret i32 967
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  enum boolean { FALSE, TRUE };
  printf("value of False is: %d\n", FALSE);
  printf("value of True is: %d\n", TRUE);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
lea    0xee3(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
lea    0xef1(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"value of False is: %d\0A\00"
@.str.1 = [22 x i8] c"value of True is: %d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 0)
%3 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i32 1)
ret i32 0
}

LLVM IR (-O2):
@.str = [23 x i8] c"value of False is: %d\0A\00"
@.str.1 = [22 x i8] c"value of True is: %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 0)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ IO_put_string(char *);
void ACME_switch_to_pet(void) {
  IO_put_string(
      "; ToACME: Adding pseudo opcode to use PetSCII encoding by default:\n"
      "!convtab pet\n");
}


x86 assembly (clang, -O0):
<ACME_switch_to_pet>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <IO_put_string@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ACME_switch_to_pet>:
lea    0xee9(%rip),%rdi
jmp    1030 <IO_put_string@plt>

LLVM IR (-O0):
@.str = [81 x i8] c"; ToACME: Adding pseudo opcode to use PetSCII encoding by default:\0A!convtab pet\0A\00"
define void @ACME_switch_to_pet() {
%1 = call i32 @IO_put_string(i8* getelementptr inbounds ([81 x i8], [81 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [81 x i8] c"; ToACME: Adding pseudo opcode to use PetSCII encoding by default:\0A!convtab pet\0A\00"
define void @ACME_switch_to_pet() {
%1 = tail call i32 @IO_put_string(i8* getelementptr inbounds ([81 x i8], [81 x i8]* @.str, i64 0, i64 0))
ret void
}
void set_tty_raw(int enabled) {
  ;
  if (enabled) {
  } else {
  };
}


x86 assembly (clang, -O0):
<set_tty_raw>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1116 <set_tty_raw+0x16>
jmp    111b <set_tty_raw+0x1b>
jmp    111b <set_tty_raw+0x1b>
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_tty_raw>:
ret

LLVM IR (-O0):
define void @set_tty_raw(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %7
6: ; preds = %1
br label %7
7: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
define void @set_tty_raw(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
flushmo() { fflush(stdout); }


x86 assembly (clang, -O0):
<flushmo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec1(%rip),%rax
mov    (%rax),%edi
call   1030 <fflush@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flushmo>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
jmp    1030 <fflush@plt>

LLVM IR (-O0):
@stdout = global i32 0
define i32 @flushmo() {
%1 = alloca i32
%2 = load i32, i32* @stdout
%3 = call i32 @fflush(i32 %2)
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
@stdout = global i32 0
define i32 @flushmo() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fflush(i32 %1)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ strcat(char *, char *);
size_t strlen(char *);
char *newline(char **cp) {
  size_t k;
  if ((k = strlen(*cp))) {
    *cp += k;
    strcat(*cp, ".\n");
    *cp += 2;
  }
  return *cp;
}


x86 assembly (clang, -O0):
<newline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
je     1175 <newline+0x55>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
add    (%rax),%rcx
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
lea    0xe9e(%rip),%rsi
call   1040 <strcat@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x2,%rcx
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<newline>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%rbx
mov    %rbx,%rdi
call   1030 <strlen@plt>
test   %rax,%rax
je     1156 <newline+0x36>
add    %rax,%rbx
mov    %rbx,(%r14)
lea    0xebc(%rip),%rsi
mov    %rbx,%rdi
call   1040 <strcat@plt>
mov    (%r14),%rbx
add    $0x2,%rbx
mov    %rbx,(%r14)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c".\0A\00"
define i8* @newline(i8** %0) {
%2 = alloca i8**
%3 = alloca i64
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
%6 = call i64 @strlen(i8* %5)
store i64 %6, i64* %3
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %19
8: ; preds = %1
%9 = load i64, i64* %3
%10 = load i8**, i8*** %2
%11 = load i8*, i8** %10
%12 = getelementptr inbounds i8, i8* %11, i64 %9
store i8* %12, i8** %10
%13 = load i8**, i8*** %2
%14 = load i8*, i8** %13
%15 = call i32 @strcat(i8* %14, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%16 = load i8**, i8*** %2
%17 = load i8*, i8** %16
%18 = getelementptr inbounds i8, i8* %17, i64 2
store i8* %18, i8** %16
br label %19
19: ; preds = %8, %1
%20 = load i8**, i8*** %2
%21 = load i8*, i8** %20
ret i8* %21
}

LLVM IR (-O2):
@.str = [3 x i8] c".\0A\00"
define i8* @newline(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = tail call i64 @strlen(i8* dereferenceable(1) %2)
%4 = icmp eq i64 %3, 0
br i1 %4, label %10, label %5
5: ; preds = %1
%6 = getelementptr inbounds i8, i8* %2, i64 %3
store i8* %6, i8** %0
%7 = tail call i32 @strcat(i8* %6, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%8 = load i8*, i8** %0
%9 = getelementptr inbounds i8, i8* %8, i64 2
store i8* %9, i8** %0
br label %10
10: ; preds = %5, %1
%11 = phi i8* [ %9, %5 ], [ %2, %1 ]
ret i8* %11
}
/* Type definitions */
struct timeval {
  int tv_sec;
  scalar_t__ tv_usec;
};

/* Variables and functions */
int set_up_timeout(struct timeval *timeout, int seconds) {
  if (seconds <= 0) {
    return 0;
  }
  timeout->tv_usec = 0;
  timeout->tv_sec = seconds;
  return seconds;
}


x86 assembly (clang, -O0):
<set_up_timeout>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jg     1121 <set_up_timeout+0x21>
movl   $0x0,-0x4(%rbp)
jmp    113c <set_up_timeout+0x3c>
mov    -0x10(%rbp),%rax
movq   $0x0,0x8(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_up_timeout>:
test   %esi,%esi
jle    1111 <set_up_timeout+0x11>
mov    %esi,%eax
movq   $0x0,0x8(%rdi)
mov    %esi,(%rdi)
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i64 }
define i32 @set_up_timeout(%struct.timeval* %0, i32 %1) {
%3 = alloca i32
%4 = alloca %struct.timeval*
%5 = alloca i32
store %struct.timeval* %0, %struct.timeval** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp sle i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 0, i32* %3
br label %16
9: ; preds = %2
%10 = load %struct.timeval*, %struct.timeval** %4
%11 = getelementptr inbounds %struct.timeval, %struct.timeval* %10, i32 0, i32 1
store i64 0, i64* %11
%12 = load i32, i32* %5
%13 = load %struct.timeval*, %struct.timeval** %4
%14 = getelementptr inbounds %struct.timeval, %struct.timeval* %13, i32 0, i32 0
store i32 %12, i32* %14
%15 = load i32, i32* %5
store i32 %15, i32* %3
br label %16
16: ; preds = %9, %8
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
%struct.timeval = type { i32, i64 }
define i32 @set_up_timeout(%struct.timeval* nocapture writeonly %0, i32 %1) {
%3 = icmp slt i32 %1, 1
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
store i64 0, i64* %5
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
store i32 %1, i32* %6
br label %7
7: ; preds = %2, %4
%8 = phi i32 [ %1, %4 ], [ 0, %2 ]
ret i32 %8
}
double cosh(x)
double x;
{
  if (x < 0)
    x = -x;
  return sinh_cosh(x, 1);
}


x86 assembly (clang, -O0):
<cosh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    114c <cosh+0x3c>
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    $0x1,%edi
mov    $0x1,%al
call   1030 <sinh_cosh@plt>
cvtsi2sd %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cosh>:
push   %rax
movapd 0xee7(%rip),%xmm2
xorpd  %xmm0,%xmm2
xorpd  %xmm3,%xmm3
movapd %xmm0,%xmm1
cmpltsd %xmm3,%xmm1
andpd  %xmm1,%xmm2
andnpd %xmm0,%xmm1
orpd   %xmm2,%xmm1
movapd %xmm1,%xmm0
mov    $0x1,%edi
mov    $0x1,%al
call   1030 <sinh_cosh@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @cosh(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp olt double %3, 0.000000e+00
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load double, double* %2
%7 = fneg double %6
store double %7, double* %2
br label %8
8: ; preds = %5, %1
%9 = load double, double* %2
%10 = call i32 (double, i32, ...) bitcast (i32 (...)* @sinh_cosh to i32 (double, i32, ...)*)(double %9, i32 1)
%11 = sitofp i32 %10 to double
ret double %11
}

LLVM IR (-O2):
define double @cosh(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
%3 = fneg double %0
%4 = select i1 %2, double %3, double %0
%5 = tail call i32 (double, i32, ...) bitcast (i32 (...)* @sinh_cosh to i32 (double, i32, ...)*)(double %4, i32 1)
%6 = sitofp i32 %5 to double
ret double %6
}
/* Variables and functions */
int abs(int);
int calc(int a) {
  a = (a * 567 / 9 + 7492) * 235 / 47 - 498;
  return abs((a % 100) / 10);
}


x86 assembly (clang, -O0):
<calc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x237,-0x4(%rbp),%eax
mov    $0x9,%ecx
cltd
idiv   %ecx
add    $0x1d44,%eax
imul   $0xeb,%eax,%eax
mov    $0x2f,%ecx
cltd
idiv   %ecx
sub    $0x1f2,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1030 <abs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc>:
imul   $0x39d5,%edi,%eax
mov    %eax,%ecx
add    $0x1add6c,%ecx
movslq %ecx,%rcx
imul   $0xffffffffae4c415d,%rcx,%rcx
shr    $0x20,%rcx
add    %ecx,%eax
add    $0x1add6c,%eax
mov    %eax,%ecx
sar    $0x5,%ecx
shr    $0x1f,%eax
add    %ecx,%eax
add    $0xfffffe0e,%eax
cltq
imul   $0x51eb851f,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x25,%rcx
add    %edx,%ecx
imul   $0x64,%ecx,%ecx
sub    %ecx,%eax
movsbl %al,%eax
imul   $0x67,%eax,%eax
movzwl %ax,%eax
movswl %ax,%ecx
shr    $0xf,%eax
shr    $0xa,%ecx
add    %al,%cl
mov    %ecx,%eax
sar    $0x7,%al
add    %al,%cl
xor    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @calc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 567
%5 = sdiv i32 %4, 9
%6 = add nsw i32 %5, 7492
%7 = mul nsw i32 %6, 235
%8 = sdiv i32 %7, 47
%9 = sub nsw i32 %8, 498
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = srem i32 %10, 100
%12 = sdiv i32 %11, 10
%13 = call i32 @abs(i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @calc(i32 %0) {
%2 = mul i32 %0, 14805
%3 = add i32 %2, 1760620
%4 = sdiv i32 %3, 47
%5 = add nsw i32 %4, -498
%6 = srem i32 %5, 100
%7 = trunc i32 %6 to i8
%8 = sdiv i8 %7, 10
%9 = tail call i8 @llvm.abs.i8(i8 %8, i1 true)
%10 = zext i8 %9 to i32
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ termattrs();
uint32_t __darwin_termattrs(void) { return termattrs(); }


x86 assembly (clang, -O0):
<__darwin_termattrs>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <termattrs@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__darwin_termattrs>:
xor    %eax,%eax
jmp    1030 <termattrs@plt>

LLVM IR (-O0):
define i32 @__darwin_termattrs() {
%1 = call i32 (...) @termattrs()
ret i32 %1
}

LLVM IR (-O2):
define i32 @__darwin_termattrs() {
%1 = tail call i32 (...) @termattrs()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) { printf("Hello World!\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hello World!\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [13 x i8] c"Hello World!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct group {
  int dummy;
};

/* Variables and functions */
struct group *getgrent(void) {
  return NULL;
}


x86 assembly (clang, -O0):
<getgrent>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getgrent>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.group = type { i32 }
define %struct.group* @getgrent() {
ret %struct.group* null
}

LLVM IR (-O2):
%struct.group = type { i32 }
define noalias %struct.group* @getgrent() {
ret %struct.group* null
}
void RTPathSetOwnerEx(void) {}


x86 assembly (clang, -O0):
<RTPathSetOwnerEx>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTPathSetOwnerEx>:
ret

LLVM IR (-O0):
define void @RTPathSetOwnerEx() {
ret void
}

LLVM IR (-O2):
define void @RTPathSetOwnerEx() {
ret void
}
OPHANDLER(nop) {}


x86 assembly (clang, -O0):
<OPHANDLER>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OPHANDLER>:
ret

LLVM IR (-O0):
define i32 @OPHANDLER(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @OPHANDLER(i32 %0) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printStaticLib();
int main(int argc, char const *argv[]) {
  printStaticLib();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <printStaticLib@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <printStaticLib@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @printStaticLib()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @printStaticLib()
ret i32 0
}
const unsigned long long clock_tic_() {
  unsigned int a, d;
  asm volatile("rdtsc" : "=a"(a), "=d"(d));
  return ((unsigned long long)a) | (((unsigned long long)d) << 32);
}


x86 assembly (clang, -O0):
<clock_tic_>:
push   %rbp
mov    %rsp,%rbp
rdtsc
mov    %eax,-0x4(%rbp)
mov    %edx,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    $0x20,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clock_tic_>:
rdtsc
mov    %eax,%eax
shl    $0x20,%rdx
or     %rdx,%rax
ret

LLVM IR (-O0):
define i64 @clock_tic_() {
%1 = alloca i32
%2 = alloca i32
%3 = call { i32, i32 } asm sideeffect "rdtsc", "={ax},={dx},~{dirflag},~{fpsr},~{flags}"()
%4 = extractvalue { i32, i32 } %3, 0
%5 = extractvalue { i32, i32 } %3, 1
store i32 %4, i32* %1
store i32 %5, i32* %2
%6 = load i32, i32* %1
%7 = zext i32 %6 to i64
%8 = load i32, i32* %2
%9 = zext i32 %8 to i64
%10 = shl i64 %9, 32
%11 = or i64 %7, %10
ret i64 %11
}

LLVM IR (-O2):
define i64 @clock_tic_() {
%1 = tail call { i32, i32 } asm sideeffect "rdtsc", "={ax},={dx},~{dirflag},~{fpsr},~{flags}"()
%2 = extractvalue { i32, i32 } %1, 0
%3 = extractvalue { i32, i32 } %1, 1
%4 = zext i32 %2 to i64
%5 = zext i32 %3 to i64
%6 = shl nuw i64 %5, 32
%7 = or i64 %6, %4
ret i64 %7
}
/* Type definitions */
struct tl880_dev {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ tl880_write_register(struct tl880_dev *, int,
                                        int /*<<< orphan*/);
void tl880_disable_apu(struct tl880_dev *tl880dev) {
  tl880_write_register(tl880dev, 0x3000, 0);
  tl880_write_register(tl880dev, 0x3004, 0);
}


x86 assembly (clang, -O0):
<tl880_disable_apu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x3000,%esi
xor    %edx,%edx
call   1030 <tl880_write_register@plt>
mov    -0x8(%rbp),%rdi
mov    $0x3004,%esi
xor    %edx,%edx
call   1030 <tl880_write_register@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tl880_disable_apu>:
push   %rbx
mov    %rdi,%rbx
mov    $0x3000,%esi
xor    %edx,%edx
call   1030 <tl880_write_register@plt>
mov    %rbx,%rdi
mov    $0x3004,%esi
xor    %edx,%edx
pop    %rbx
jmp    1030 <tl880_write_register@plt>

LLVM IR (-O0):
%struct.tl880_dev = type { i32 }
define void @tl880_disable_apu(%struct.tl880_dev* %0) {
%2 = alloca %struct.tl880_dev*
store %struct.tl880_dev* %0, %struct.tl880_dev** %2
%3 = load %struct.tl880_dev*, %struct.tl880_dev** %2
%4 = call i32 @tl880_write_register(%struct.tl880_dev* %3, i32 12288, i32 0)
%5 = load %struct.tl880_dev*, %struct.tl880_dev** %2
%6 = call i32 @tl880_write_register(%struct.tl880_dev* %5, i32 12292, i32 0)
ret void
}

LLVM IR (-O2):
%struct.tl880_dev = type { i32 }
define void @tl880_disable_apu(%struct.tl880_dev* %0) {
%2 = tail call i32 @tl880_write_register(%struct.tl880_dev* %0, i32 12288, i32 0)
%3 = tail call i32 @tl880_write_register(%struct.tl880_dev* %0, i32 12292, i32 0)
ret void
}
int z(int a) { return a * -1; }


x86 assembly (clang, -O0):
<z>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0xffffffff,-0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<z>:
mov    %edi,%eax
neg    %eax
ret

LLVM IR (-O0):
define i32 @z(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, -1
ret i32 %4
}

LLVM IR (-O2):
define i32 @z(i32 %0) {
%2 = sub nsw i32 0, %0
ret i32 %2
}
int ptrcomp(void *k1, void *k2) { return (k2 - k1); }


x86 assembly (clang, -O0):
<ptrcomp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptrcomp>:
mov    %rsi,%rax
sub    %edi,%eax
ret

LLVM IR (-O0):
define i32 @ptrcomp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i8*, i8** %3
%7 = ptrtoint i8* %5 to i64
%8 = ptrtoint i8* %6 to i64
%9 = sub i64 %7, %8
%10 = trunc i64 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @ptrcomp(i8* %0, i8* %1) {
%3 = ptrtoint i8* %1 to i64
%4 = ptrtoint i8* %0 to i64
%5 = sub i64 %3, %4
%6 = trunc i64 %5 to i32
ret i32 %6
}
struct lconv *localeconv() {
  extern struct lconv *__lconv;
  return (__lconv);
}


x86 assembly (clang, -O0):
<localeconv>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<localeconv>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%rax
ret

LLVM IR (-O0):
%struct.lconv = type opaque
@__lconv = external global %struct.lconv*
define %struct.lconv* @localeconv() {
%1 = load %struct.lconv*, %struct.lconv** @__lconv
ret %struct.lconv* %1
}

LLVM IR (-O2):
%struct.lconv = type opaque
@__lconv = external global %struct.lconv*
define %struct.lconv* @localeconv() {
%1 = load %struct.lconv*, %struct.lconv** @__lconv
ret %struct.lconv* %1
}
void foo045() {}


x86 assembly (clang, -O0):
<foo045>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo045>:
ret

LLVM IR (-O0):
define void @foo045() {
ret void
}

LLVM IR (-O2):
define void @foo045() {
ret void
}
int terra_is_walkable(char ch) {
  switch (ch) {
  case ' ':
  case '.':
  case '_':
    return 1;
  default:
    return 0;
  }
  return 0;
}


x86 assembly (clang, -O0):
<terra_is_walkable>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x20,%eax
je     1141 <terra_is_walkable+0x41>
jmp    111f <terra_is_walkable+0x1f>
mov    -0xc(%rbp),%eax
sub    $0x2e,%eax
je     1141 <terra_is_walkable+0x41>
jmp    1130 <terra_is_walkable+0x30>
mov    -0xc(%rbp),%eax
sub    $0x5f,%eax
jne    114d <terra_is_walkable+0x4d>
jmp    1141 <terra_is_walkable+0x41>
movl   $0x1,-0x4(%rbp)
jmp    1154 <terra_is_walkable+0x54>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<terra_is_walkable>:
add    $0xffffffe0,%edi
cmp    $0x3f,%edi
ja     111e <terra_is_walkable+0x1e>
mov    $0x1,%eax
movabs $0x8000000000004001,%rcx
bt     %rdi,%rcx
jae    111e <terra_is_walkable+0x1e>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @terra_is_walkable(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %7 [
i32 32, label %6
i32 46, label %6
i32 95, label %6
]
6: ; preds = %1, %1, %1
store i32 1, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @terra_is_walkable(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %3 [
i32 32, label %4
i32 46, label %4
i32 95, label %4
]
3: ; preds = %1
br label %4
4: ; preds = %1, %1, %1, %3
%5 = phi i32 [ 0, %3 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ die(char *);
char *strdup(char *);
char *xstrdup(char *s) {
  char *p;
  p = strdup(s);
  if (!p && s)
    die("Out of memory");
  return p;
}


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strdup@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    115b <xstrdup+0x3b>
cmpq   $0x0,-0x8(%rbp)
je     115b <xstrdup+0x3b>
lea    0xeaa(%rip),%rdi
call   1030 <die@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <strdup@plt>
mov    %rax,%r14
test   %rbx,%rbx
je     1145 <xstrdup+0x25>
test   %r14,%r14
jne    1145 <xstrdup+0x25>
lea    0xec0(%rip),%rdi
call   1030 <die@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Out of memory\00"
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strdup(i8* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %13, label %8
8: ; preds = %1
%9 = load i8*, i8** %2
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %13
11: ; preds = %8
%12 = call i32 @die(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %8, %1
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
@.str = [14 x i8] c"Out of memory\00"
define noalias i8* @xstrdup(i8* %0) {
%2 = tail call i8* @strdup(i8* %0)
%3 = icmp eq i8* %2, null
%4 = icmp ne i8* %0, null
%5 = and i1 %4, %3
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 @die(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
ret i8* %2
}
void put_hp71_length(unsigned char *entry, unsigned int length, int odd_flag) {
  length *= 2;
  if (odd_flag) {
    length--;
  }
  entry[28] = length & 0xFF;
  length >>= 8;
  entry[29] = length & 0xFF;
  length >>= 8;
  entry[30] = length & 0xFF;
  entry[31] = 0;
}


x86 assembly (clang, -O0):
<put_hp71_length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     112a <put_hp71_length+0x2a>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1c(%rax)
mov    -0xc(%rbp),%eax
shr    $0x8,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1d(%rax)
mov    -0xc(%rbp),%eax
shr    $0x8,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1e(%rax)
mov    -0x8(%rbp),%rax
movb   $0x0,0x1f(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_hp71_length>:
mov    %esi,%eax
add    %esi,%eax
cmp    $0x1,%edx
adc    $0xffffffff,%eax
mov    %al,0x1c(%rdi)
mov    %ah,0x1d(%rdi)
shr    $0x10,%eax
mov    %al,0x1e(%rdi)
movb   $0x0,0x1f(%rdi)
ret

LLVM IR (-O0):
define void @put_hp71_length(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = mul i32 %7, 2
store i32 %8, i32* %5
%9 = load i32, i32* %6
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %3
%12 = load i32, i32* %5
%13 = add i32 %12, -1
store i32 %13, i32* %5
br label %14
14: ; preds = %11, %3
%15 = load i32, i32* %5
%16 = and i32 %15, 255
%17 = trunc i32 %16 to i8
%18 = load i8*, i8** %4
%19 = getelementptr inbounds i8, i8* %18, i64 28
store i8 %17, i8* %19
%20 = load i32, i32* %5
%21 = lshr i32 %20, 8
store i32 %21, i32* %5
%22 = load i32, i32* %5
%23 = and i32 %22, 255
%24 = trunc i32 %23 to i8
%25 = load i8*, i8** %4
%26 = getelementptr inbounds i8, i8* %25, i64 29
store i8 %24, i8* %26
%27 = load i32, i32* %5
%28 = lshr i32 %27, 8
store i32 %28, i32* %5
%29 = load i32, i32* %5
%30 = and i32 %29, 255
%31 = trunc i32 %30 to i8
%32 = load i8*, i8** %4
%33 = getelementptr inbounds i8, i8* %32, i64 30
store i8 %31, i8* %33
%34 = load i8*, i8** %4
%35 = getelementptr inbounds i8, i8* %34, i64 31
store i8 0, i8* %35
ret void
}

LLVM IR (-O2):
define void @put_hp71_length(i8* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = shl i32 %1, 1
%5 = icmp ne i32 %2, 0
%6 = sext i1 %5 to i32
%7 = add i32 %4, %6
%8 = trunc i32 %7 to i8
%9 = getelementptr inbounds i8, i8* %0, i64 28
store i8 %8, i8* %9
%10 = lshr i32 %7, 8
%11 = trunc i32 %10 to i8
%12 = getelementptr inbounds i8, i8* %0, i64 29
store i8 %11, i8* %12
%13 = lshr i32 %7, 16
%14 = trunc i32 %13 to i8
%15 = getelementptr inbounds i8, i8* %0, i64 30
store i8 %14, i8* %15
%16 = getelementptr inbounds i8, i8* %0, i64 31
store i8 0, i8* %16
ret void
}
char *vide_buffer(char *str) {
  int i;
  i = 0;
  while (i != (100))
    str[i++] = '\0';
  return (str);
}


x86 assembly (clang, -O0):
<vide_buffer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x64,-0xc(%rbp)
je     1134 <vide_buffer+0x34>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0xc(%rbp)
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
jmp    110f <vide_buffer+0xf>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vide_buffer>:
mov    %rdi,%rax
xorps  %xmm0,%xmm0
movups %xmm0,0x50(%rdi)
movups %xmm0,0x40(%rdi)
movups %xmm0,0x30(%rdi)
movups %xmm0,0x20(%rdi)
movups %xmm0,0x10(%rdi)
movups %xmm0,(%rdi)
movl   $0x0,0x60(%rdi)
ret

LLVM IR (-O0):
define i8* @vide_buffer(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 100
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i8*, i8** %2
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
%11 = sext i32 %9 to i64
%12 = getelementptr inbounds i8, i8* %8, i64 %11
store i8 0, i8* %12
br label %4
13: ; preds = %4
%14 = load i8*, i8** %2
ret i8* %14
}

LLVM IR (-O2):
define i8* @vide_buffer(i8* returned writeonly %0) {
ret i8* %0
}
void RTAvlroGCPtrDoWithAll(void) {}


x86 assembly (clang, -O0):
<RTAvlroGCPtrDoWithAll>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvlroGCPtrDoWithAll>:
ret

LLVM IR (-O0):
define void @RTAvlroGCPtrDoWithAll() {
ret void
}

LLVM IR (-O2):
define void @RTAvlroGCPtrDoWithAll() {
ret void
}
float wy2gau(unsigned r) {
  const float _wynorm = 1.0f / (1ull << 9);
  return ((r & 0x3ff) + ((r >> 10) & 0x3ff) + ((r >> 20) & 0x3ff)) * _wynorm -
         3.0f;
}


x86 assembly (clang, -O0):
<wy2gau>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x3b000000,-0x8(%rbp)
mov    -0x4(%rbp),%ecx
mov    %ecx,%eax
and    $0x3ff,%eax
mov    %ecx,%edx
shr    $0xa,%edx
and    $0x3ff,%edx
add    %edx,%eax
shr    $0x14,%ecx
and    $0x3ff,%ecx
add    %ecx,%eax
cvtsi2ss %eax,%xmm0
movss  0xec4(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xebc(%rip),%xmm1
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<wy2gau>:
mov    %edi,%eax
and    $0x3ff,%eax
mov    %edi,%ecx
shr    $0xa,%ecx
and    $0x3ff,%ecx
add    %eax,%ecx
shr    $0x14,%edi
and    $0x3ff,%edi
add    %ecx,%edi
cvtsi2ss %edi,%xmm0
mulss  0xed5(%rip),%xmm0
addss  0xed1(%rip),%xmm0
ret

LLVM IR (-O0):
define float @wy2gau(i32 %0) {
%2 = alloca i32
%3 = alloca float
store i32 %0, i32* %2
store float 0x3F60000000000000, float* %3
%4 = load i32, i32* %2
%5 = and i32 %4, 1023
%6 = load i32, i32* %2
%7 = lshr i32 %6, 10
%8 = and i32 %7, 1023
%9 = add i32 %5, %8
%10 = load i32, i32* %2
%11 = lshr i32 %10, 20
%12 = and i32 %11, 1023
%13 = add i32 %9, %12
%14 = uitofp i32 %13 to float
%15 = call float @llvm.fmuladd.f32(float %14, float 0x3F60000000000000, float -3.000000e+00)
ret float %15
}

LLVM IR (-O2):
define float @wy2gau(i32 %0) {
%2 = and i32 %0, 1023
%3 = lshr i32 %0, 10
%4 = and i32 %3, 1023
%5 = add nuw nsw i32 %4, %2
%6 = lshr i32 %0, 20
%7 = and i32 %6, 1023
%8 = add nuw nsw i32 %5, %7
%9 = uitofp i32 %8 to float
%10 = tail call float @llvm.fmuladd.f32(float %9, float 0x3F60000000000000, float -3.000000e+00)
ret float %10
}
char grade(unsigned score) {
  if (score >= 90)
    return 'A';
  if (score >= 80)
    return 'B';
  if (score >= 70)
    return 'C';
  if (score >= 60)
    return 'D';
  return 'F';
}


x86 assembly (clang, -O0):
<grade>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x5a,-0x8(%rbp)
jb     111a <grade+0x1a>
movb   $0x41,-0x1(%rbp)
jmp    1157 <grade+0x57>
cmpl   $0x50,-0x8(%rbp)
jb     112d <grade+0x2d>
movb   $0x42,-0x1(%rbp)
jmp    1157 <grade+0x57>
cmpl   $0x46,-0x8(%rbp)
jb     1140 <grade+0x40>
movb   $0x43,-0x1(%rbp)
jmp    1157 <grade+0x57>
cmpl   $0x3c,-0x8(%rbp)
jb     1153 <grade+0x53>
movb   $0x44,-0x1(%rbp)
jmp    1157 <grade+0x57>
movb   $0x46,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<grade>:
mov    $0x41,%al
cmp    $0x59,%edi
ja     111f <grade+0x1f>
mov    $0x42,%al
cmp    $0x4f,%edi
ja     111f <grade+0x1f>
mov    $0x43,%al
cmp    $0x45,%edi
ja     111f <grade+0x1f>
cmp    $0x3c,%edi
setb   %al
add    %al,%al
or     $0x44,%al
ret

LLVM IR (-O0):
define signext i8 @grade(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp uge i32 %4, 90
br i1 %5, label %6, label %7
6: ; preds = %1
store i8 65, i8* %2
br label %20
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp uge i32 %8, 80
br i1 %9, label %10, label %11
10: ; preds = %7
store i8 66, i8* %2
br label %20
11: ; preds = %7
%12 = load i32, i32* %3
%13 = icmp uge i32 %12, 70
br i1 %13, label %14, label %15
14: ; preds = %11
store i8 67, i8* %2
br label %20
15: ; preds = %11
%16 = load i32, i32* %3
%17 = icmp uge i32 %16, 60
br i1 %17, label %18, label %19
18: ; preds = %15
store i8 68, i8* %2
br label %20
19: ; preds = %15
store i8 70, i8* %2
br label %20
20: ; preds = %19, %18, %14, %10, %6
%21 = load i8, i8* %2
ret i8 %21
}

LLVM IR (-O2):
define signext i8 @grade(i32 %0) {
%2 = icmp ugt i32 %0, 89
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = icmp ugt i32 %0, 79
br i1 %4, label %10, label %5
5: ; preds = %3
%6 = icmp ugt i32 %0, 69
br i1 %6, label %10, label %7
7: ; preds = %5
%8 = icmp ugt i32 %0, 59
%9 = select i1 %8, i8 68, i8 70
br label %10
10: ; preds = %7, %5, %3, %1
%11 = phi i8 [ 65, %1 ], [ 66, %3 ], [ 67, %5 ], [ %9, %7 ]
ret i8 %11
}
int is_symbol_char(int c) {
  return (c >= '0' && c <= '9') || (c >= 'a' && c <= 'z') ||
         (c >= 'A' && c <= 'Z') || c == '_' || c == '.';
}


x86 assembly (clang, -O0):
<is_symbol_char>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x30,-0x4(%rbp)
jl     1120 <is_symbol_char+0x20>
mov    $0x1,%al
cmpl   $0x39,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    116b <is_symbol_char+0x6b>
cmpl   $0x61,-0x4(%rbp)
jl     1139 <is_symbol_char+0x39>
mov    $0x1,%al
cmpl   $0x7a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    116b <is_symbol_char+0x6b>
cmpl   $0x41,-0x4(%rbp)
jl     1152 <is_symbol_char+0x52>
mov    $0x1,%al
cmpl   $0x5a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    116b <is_symbol_char+0x6b>
mov    $0x1,%al
cmpl   $0x5f,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     116b <is_symbol_char+0x6b>
cmpl   $0x2e,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_symbol_char>:
lea    -0x30(%rdi),%ecx
mov    $0x1,%eax
cmp    $0xa,%ecx
jb     112a <is_symbol_char+0x2a>
lea    -0x61(%rdi),%ecx
cmp    $0x1a,%ecx
jb     112a <is_symbol_char+0x2a>
cmp    $0x5f,%edi
je     112a <is_symbol_char+0x2a>
lea    -0x41(%rdi),%ecx
cmp    $0x1a,%ecx
jb     112a <is_symbol_char+0x2a>
xor    %eax,%eax
cmp    $0x2e,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_symbol_char(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 48
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 57
br i1 %7, label %26, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 97
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 122
br i1 %13, label %26, label %14
14: ; preds = %11, %8
%15 = load i32, i32* %2
%16 = icmp sge i32 %15, 65
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp sle i32 %18, 90
br i1 %19, label %26, label %20
20: ; preds = %17, %14
%21 = load i32, i32* %2
%22 = icmp eq i32 %21, 95
br i1 %22, label %26, label %23
23: ; preds = %20
%24 = load i32, i32* %2
%25 = icmp eq i32 %24, 46
br label %26
26: ; preds = %23, %20, %17, %11, %5
%27 = phi i1 [ true, %20 ], [ true, %17 ], [ true, %11 ], [ true, %5 ], [ %25, %23 ]
%28 = zext i1 %27 to i32
ret i32 %28
}

LLVM IR (-O2):
define i32 @is_symbol_char(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = add i32 %0, -97
%5 = icmp ult i32 %4, 26
%6 = or i1 %3, %5
br i1 %6, label %15, label %7
7: ; preds = %1
%8 = add i32 %0, -65
%9 = icmp ult i32 %8, 26
%10 = icmp eq i32 %0, 95
%11 = or i1 %10, %9
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = icmp eq i32 %0, 46
%14 = zext i1 %13 to i32
br label %15
15: ; preds = %7, %1, %12
%16 = phi i32 [ %14, %12 ], [ 1, %1 ], [ 1, %7 ]
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ func_a(int);
int /*<<< orphan*/ printf(char *, int, int);
void func_b(int b) {
  for (int i = 0; i < b; i++) {
    printf("func_b! %d of %d\n", i, b);
    func_a(i);
  }
}


x86 assembly (clang, -O0):
<func_b>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1166 <func_b+0x46>
mov    -0x8(%rbp),%esi
mov    -0x4(%rbp),%edx
lea    0xeb5(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%edi
call   1040 <func_a@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1132 <func_b+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_b>:
push   %rbp
push   %r14
push   %rbx
test   %edi,%edi
jle    115a <func_b+0x3a>
mov    %edi,%ebx
xor    %ebp,%ebp
lea    0xecd(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r14,%rdi
mov    %ebp,%esi
mov    %ebx,%edx
call   1030 <printf@plt>
mov    %ebp,%edi
call   1040 <func_a@plt>
add    $0x1,%ebp
cmp    %ebp,%ebx
jne    1140 <func_b+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [18 x i8] c"func_b! %d of %d\0A\00"
define void @func_b(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %17
8: ; preds = %4
%9 = load i32, i32* %3
%10 = load i32, i32* %2
%11 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %9, i32 %10)
%12 = load i32, i32* %3
%13 = call i32 @func_a(i32 %12)
br label %14
14: ; preds = %8
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %4
17: ; preds = %4
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"func_b! %d of %d\0A\00"
define void @func_b(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %4, label %3
3: ; preds = %4, %1
ret void
4: ; preds = %1, %4
%5 = phi i32 [ %8, %4 ], [ 0, %1 ]
%6 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %0)
%7 = tail call i32 @func_a(i32 %5)
%8 = add nuw nsw i32 %5, 1
%9 = icmp eq i32 %8, %0
br i1 %9, label %3, label %4
}
float power(float x, int y) {
  if (y == 1)
    return x;
  else
    return x * power(x, y - 1);
}


x86 assembly (clang, -O0):
<power>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jne    1139 <power+0x29>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1164 <power+0x54>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x8(%rbp),%xmm0
mov    -0xc(%rbp),%edi
sub    $0x1,%edi
call   1030 <power@plt>
movaps %xmm0,%xmm1
movss  -0x10(%rbp),%xmm0
mulss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<power>:
cmp    $0x1,%edi
je     1144 <power+0x34>
push   %rax
add    $0xffffffff,%edi
movss  %xmm0,0x4(%rsp)
movss  0x4(%rsp),%xmm0
call   1030 <power@plt>
movss  0x4(%rsp),%xmm1
mulss  %xmm0,%xmm1
movss  %xmm1,0x4(%rsp)
movss  0x4(%rsp),%xmm0
add    $0x8,%rsp
ret

LLVM IR (-O0):
define float @power(float %0, i32 %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca i32
store float %0, float* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load float, float* %4
store float %9, float* %3
br label %17
10: ; preds = %2
%11 = load float, float* %4
%12 = load float, float* %4
%13 = load i32, i32* %5
%14 = sub nsw i32 %13, 1
%15 = call float @power(float %12, i32 %14)
%16 = fmul float %11, %15
store float %16, float* %3
br label %17
17: ; preds = %10, %8
%18 = load float, float* %3
ret float %18
}

LLVM IR (-O2):
define float @power(float %0, i32 %1) {
%3 = icmp eq i32 %1, 1
br i1 %3, label %4, label %6
4: ; preds = %2, %6
%5 = phi float [ %9, %6 ], [ %0, %2 ]
ret float %5
6: ; preds = %2
%7 = add nsw i32 %1, -1
%8 = tail call float @power(float %0, i32 %7)
%9 = fmul float %8, %0
br label %4
}
/* Variables and functions */
int /*<<< orphan*/ ISR_CYCLES_Disable();
void ISR_CYCLES_Stop(void) { ISR_CYCLES_Disable(); }


x86 assembly (clang, -O0):
<ISR_CYCLES_Stop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ISR_CYCLES_Disable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ISR_CYCLES_Stop>:
xor    %eax,%eax
jmp    1030 <ISR_CYCLES_Disable@plt>

LLVM IR (-O0):
define void @ISR_CYCLES_Stop() {
%1 = call i32 (...) @ISR_CYCLES_Disable()
ret void
}

LLVM IR (-O2):
define void @ISR_CYCLES_Stop() {
%1 = tail call i32 (...) @ISR_CYCLES_Disable()
ret void
}