xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ uxmi_color_fg(int);
void uxmi_sysinit_disp(char *conlog) {
  uxmi_color_fg(3);
  printf("%s", conlog);
  return;
}


x86 assembly (clang, -O0):
<uxmi_sysinit_disp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x3,%edi
call   1040 <uxmi_color_fg@plt>
mov    -0x8(%rbp),%rsi
lea    0xebf(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uxmi_sysinit_disp>:
push   %rbx
mov    %rdi,%rbx
mov    $0x3,%edi
call   1040 <uxmi_color_fg@plt>
lea    0xecb(%rip),%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @uxmi_sysinit_disp(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @uxmi_color_fg(i32 3)
%4 = load i8*, i8** %2
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @uxmi_sysinit_disp(i8* %0) {
%2 = tail call i32 @uxmi_color_fg(i32 3)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ get_next_input_from_fuzzer();
size_t map2check_non_det_size_t() {
  return (size_t)get_next_input_from_fuzzer();
}


x86 assembly (clang, -O0):
<map2check_non_det_size_t>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <get_next_input_from_fuzzer@plt>
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<map2check_non_det_size_t>:
push   %rax
xor    %eax,%eax
call   1030 <get_next_input_from_fuzzer@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i64 @map2check_non_det_size_t() {
%1 = call i32 (...) @get_next_input_from_fuzzer()
%2 = sext i32 %1 to i64
ret i64 %2
}

LLVM IR (-O2):
define i64 @map2check_non_det_size_t() {
%1 = tail call i32 (...) @get_next_input_from_fuzzer()
%2 = sext i32 %1 to i64
ret i64 %2
}
/* Type definitions */
typedef int uint64_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
void TimerLoadSet64(uint32_t ui32Base, uint64_t ui64Value) {
  ;
  (*((volatile unsigned long *)(ui32Base + 0x0000002C))) = ui64Value >> 32;
  (*((volatile unsigned long *)(ui32Base + 0x00000028))) =
      ui64Value & 0xffffffff;
}


x86 assembly (clang, -O0):
<TimerLoadSet64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x20,%ecx
sar    %cl,%eax
movslq %eax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x2c(%rax)
mov    -0xc(%rbp),%eax
and    $0xffffffff,%eax
mov    %eax,%eax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rcx,0x28(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerLoadSet64>:
mov    %esi,%eax
mov    %rax,0x28(%rdi)
ret

LLVM IR (-O0):
define void @TimerLoadSet64(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 32
%7 = sext i32 %6 to i64
%8 = load i64, i64* %3
%9 = add nsw i64 %8, 44
%10 = inttoptr i64 %9 to i64*
store volatile i64 %7, i64* %10
%11 = load i32, i32* %4
%12 = and i32 %11, -1
%13 = zext i32 %12 to i64
%14 = load i64, i64* %3
%15 = add nsw i64 %14, 40
%16 = inttoptr i64 %15 to i64*
store volatile i64 %13, i64* %16
ret void
}

LLVM IR (-O2):
define void @TimerLoadSet64(i64 %0, i32 %1) {
%3 = add nsw i64 %0, 44
%4 = inttoptr i64 %3 to i64*
store volatile i64 poison, i64* %4
%5 = zext i32 %1 to i64
%6 = add nsw i64 %0, 40
%7 = inttoptr i64 %6 to i64*
store volatile i64 %5, i64* %7
ret void
}
void addhistz(double zs, struct hist_str *histp) {}


x86 assembly (clang, -O0):
<addhistz>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<addhistz>:
ret

LLVM IR (-O0):
%struct.hist_str = type opaque
define void @addhistz(double %0, %struct.hist_str* %1) {
%3 = alloca double
%4 = alloca %struct.hist_str*
store double %0, double* %3
store %struct.hist_str* %1, %struct.hist_str** %4
ret void
}

LLVM IR (-O2):
%struct.hist_str = type opaque
define void @addhistz(double %0, %struct.hist_str* nocapture %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int /*<<< orphan*/ pthread_mutex_unlock(int /*<<< orphan*/ *);
void coprthr_mutex_unlock(void *p_mtx) {
  pthread_mutex_unlock((pthread_mutex_t *)p_mtx);
}


x86 assembly (clang, -O0):
<coprthr_mutex_unlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pthread_mutex_unlock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<coprthr_mutex_unlock>:
jmp    1030 <pthread_mutex_unlock@plt>

LLVM IR (-O0):
define void @coprthr_mutex_unlock(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = call i32 @pthread_mutex_unlock(i32* %4)
ret void
}

LLVM IR (-O2):
define void @coprthr_mutex_unlock(i8* %0) {
%2 = bitcast i8* %0 to i32*
%3 = tail call i32 @pthread_mutex_unlock(i32* %2)
ret void
}
/* Type definitions */
struct obj {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ errl(char *, struct obj *);
void err0(void) { errl("0", ((struct obj *)0)); }


x86 assembly (clang, -O0):
<err0>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <errl@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<err0>:
lea    0xee9(%rip),%rdi
xor    %esi,%esi
jmp    1030 <errl@plt>

LLVM IR (-O0):
%struct.obj = type { i32 }
@.str = [2 x i8] c"0\00"
define void @err0() {
%1 = call i32 @errl(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), %struct.obj* null)
ret void
}

LLVM IR (-O2):
%struct.obj = type { i32 }
@.str = [2 x i8] c"0\00"
define void @err0() {
%1 = tail call i32 @errl(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), %struct.obj* null)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t op_not(uint32_t a, uint32_t b) { return ~a; }


x86 assembly (clang, -O0):
<op_not>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_not>:
mov    %edi,%eax
not    %eax
ret

LLVM IR (-O0):
define i32 @op_not(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = xor i32 %5, -1
ret i32 %6
}

LLVM IR (-O2):
define i32 @op_not(i32 %0, i32 %1) {
%3 = xor i32 %0, -1
ret i32 %3
}
int g_l(int a, int b) { return a < b; }


x86 assembly (clang, -O0):
<g_l>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_l>:
xor    %eax,%eax
cmp    %esi,%edi
setl   %al
ret

LLVM IR (-O0):
define i32 @g_l(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @g_l(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int strlen(const char *str) {
  int i;
  for (i = 0;; i++)
    if (str[i] == '\0')
      return i;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
jne    1129 <strlen+0x29>
mov    -0xc(%rbp),%eax
pop    %rbp
ret
jmp    112e <strlen+0x2e>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <strlen+0xf>

x86 assembly (clang, -O2):
<strlen>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <strlen+0x10>
ret

LLVM IR (-O0):
define i32 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %15, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
14: ; preds = %4
br label %15
15: ; preds = %14
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
store i32 %17, i32* %3
br label %4
}

LLVM IR (-O2):
define i32 @strlen(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
/* Variables and functions */
int rom_present(char *);
int gd5446_available(void) {
  return rom_present(L"roms/video/cirruslogic/5446BV.VBI");
}


x86 assembly (clang, -O0):
<gd5446_available>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <rom_present@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gd5446_available>:
lea    0xee9(%rip),%rdi
jmp    1030 <rom_present@plt>

LLVM IR (-O0):
@.str = [34 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 99, i32 105, i32 114, i32 114, i32 117, i32 115, i32 108, i32 111, i32 103, i32 105, i32 99, i32 47, i32 53, i32 52, i32 52, i32 54, i32 66, i32 86, i32 46, i32 86, i32 66, i32 73, i32 0]
define i32 @gd5446_available() {
%1 = call i32 @rom_present(i8* bitcast ([34 x i32]* @.str to i8*))
ret i32 %1
}

LLVM IR (-O2):
@.str = [34 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 99, i32 105, i32 114, i32 114, i32 117, i32 115, i32 108, i32 111, i32 103, i32 105, i32 99, i32 47, i32 53, i32 52, i32 52, i32 54, i32 66, i32 86, i32 46, i32 86, i32 66, i32 73, i32 0]
define i32 @gd5446_available() {
%1 = tail call i32 @rom_present(i8* bitcast ([34 x i32]* @.str to i8*))
ret i32 %1
}
/* Variables and functions */
void *memset(void *, int, size_t);
void *AI_memset(void *dest, int val, size_t len) {
  return memset(dest, val, len);
}


x86 assembly (clang, -O0):
<AI_memset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    %rdi,-0x20(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x18(%rbp),%rdx
movzbl %al,%esi
call   1030 <memset@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AI_memset>:
jmp    1030 <memset@plt>

LLVM IR (-O0):
define i8* @AI_memset(i8* %0, i32 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64
store i8* %0, i8** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = trunc i32 %8 to i8
%10 = load i64, i64* %6
ret i8* %7
}

LLVM IR (-O2):
define i8* @AI_memset(i8* returned writeonly %0, i32 %1, i64 %2) {
%4 = trunc i32 %1 to i8
tail call void @llvm.memset.p0i8.i64(i8* align 1 %0, i8 %4, i64 %2, i1 false)
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ __DCACHE_CALL();
int /*<<< orphan*/ __DSB();
int /*<<< orphan*/ __ISB();
void csi_dcache_clean(void) {
  __DSB();
  __ISB();
  __DCACHE_CALL();
  __DSB();
  __ISB();
}


x86 assembly (clang, -O0):
<csi_dcache_clean>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <__DSB@plt>
mov    $0x0,%al
call   1030 <__ISB@plt>
mov    $0x0,%al
call   1050 <__DCACHE_CALL@plt>
mov    $0x0,%al
call   1040 <__DSB@plt>
mov    $0x0,%al
call   1030 <__ISB@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<csi_dcache_clean>:
push   %rax
xor    %eax,%eax
call   1040 <__DSB@plt>
xor    %eax,%eax
call   1030 <__ISB@plt>
xor    %eax,%eax
call   1050 <__DCACHE_CALL@plt>
xor    %eax,%eax
call   1040 <__DSB@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <__ISB@plt>

LLVM IR (-O0):
define void @csi_dcache_clean() {
%1 = call i32 (...) @__DSB()
%2 = call i32 (...) @__ISB()
%3 = call i32 (...) @__DCACHE_CALL()
%4 = call i32 (...) @__DSB()
%5 = call i32 (...) @__ISB()
ret void
}

LLVM IR (-O2):
define void @csi_dcache_clean() {
%1 = tail call i32 (...) @__DSB()
%2 = tail call i32 (...) @__ISB()
%3 = tail call i32 (...) @__DCACHE_CALL()
%4 = tail call i32 (...) @__DSB()
%5 = tail call i32 (...) @__ISB()
ret void
}
/* Variables and functions */
int strcmp(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stringtosend();
int teststringrecu(char *recu) { return strcmp(recu, stringtosend()); }


x86 assembly (clang, -O0):
<teststringrecu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1040 <stringtosend@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<teststringrecu>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <stringtosend@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @teststringrecu(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (...) @stringtosend()
%5 = call i32 @strcmp(i8* %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @teststringrecu(i8* %0) {
%2 = tail call i32 (...) @stringtosend()
%3 = tail call i32 @strcmp(i8* %0, i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ mergeSort(int *, int /*<<< orphan*/, int);
void sortLoop0(int *arr, int len) { mergeSort(arr, 0, len - 1); }


x86 assembly (clang, -O0):
<sortLoop0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
sub    $0x1,%edx
xor    %esi,%esi
call   1030 <mergeSort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sortLoop0>:
lea    -0x1(%rsi),%edx
xor    %esi,%esi
jmp    1030 <mergeSort@plt>

LLVM IR (-O0):
define void @sortLoop0(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = call i32 @mergeSort(i32* %5, i32 0, i32 %7)
ret void
}

LLVM IR (-O2):
define void @sortLoop0(i32* %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = tail call i32 @mergeSort(i32* %0, i32 0, i32 %3)
ret void
}
int comp(const void *_a, const void *_b) {
  const struct interface *a = **(const struct interface ***)_a;
  const struct interface *b = **(const struct interface ***)_b;
  return ((a) < (b)) ? -1 : ((a) > (b)) ? 1 : 0;
}


x86 assembly (clang, -O0):
<comp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x20(%rbp),%rax
jae    1143 <comp+0x43>
mov    $0xffffffff,%eax
mov    %eax,-0x24(%rbp)
jmp    115b <comp+0x5b>
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rsi
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %rsi,%rdx
cmova  %ecx,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<comp>:
mov    (%rdi),%rax
mov    (%rax),%rax
mov    (%rsi),%rcx
xor    %edx,%edx
cmp    (%rcx),%rax
seta   %dl
mov    $0xffffffff,%eax
cmovae %edx,%eax
ret

LLVM IR (-O0):
%struct.interface = type opaque
define i32 @comp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca %struct.interface*
%6 = alloca %struct.interface*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to %struct.interface***
%9 = load %struct.interface**, %struct.interface*** %8
%10 = load %struct.interface*, %struct.interface** %9
store %struct.interface* %10, %struct.interface** %5
%11 = load i8*, i8** %4
%12 = bitcast i8* %11 to %struct.interface***
%13 = load %struct.interface**, %struct.interface*** %12
%14 = load %struct.interface*, %struct.interface** %13
store %struct.interface* %14, %struct.interface** %6
%15 = load %struct.interface*, %struct.interface** %5
%16 = load %struct.interface*, %struct.interface** %6
%17 = icmp ult %struct.interface* %15, %16
br i1 %17, label %18, label %19
18: ; preds = %2
br label %25
19: ; preds = %2
%20 = load %struct.interface*, %struct.interface** %5
%21 = load %struct.interface*, %struct.interface** %6
%22 = icmp ugt %struct.interface* %20, %21
%23 = zext i1 %22 to i64
%24 = select i1 %22, i32 1, i32 0
br label %25
25: ; preds = %19, %18
%26 = phi i32 [ -1, %18 ], [ %24, %19 ]
ret i32 %26
}

LLVM IR (-O2):
%struct.interface = type opaque
define i32 @comp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to %struct.interface***
%4 = load %struct.interface**, %struct.interface*** %3
%5 = load %struct.interface*, %struct.interface** %4
%6 = bitcast i8* %1 to %struct.interface***
%7 = load %struct.interface**, %struct.interface*** %6
%8 = load %struct.interface*, %struct.interface** %7
%9 = icmp ult %struct.interface* %5, %8
%10 = icmp ugt %struct.interface* %5, %8
%11 = zext i1 %10 to i32
%12 = select i1 %9, i32 -1, i32 %11
ret i32 %12
}
long long g(int a, int b) { return a != b; }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
xor    %eax,%eax
cmp    %esi,%edi
setne  %al
ret

LLVM IR (-O0):
define i64 @g(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ne i32 %5, %6
%8 = zext i1 %7 to i32
%9 = sext i32 %8 to i64
ret i64 %9
}

LLVM IR (-O2):
define i64 @g(i32 %0, i32 %1) {
%3 = icmp ne i32 %0, %1
%4 = zext i1 %3 to i64
ret i64 %4
}
void BIO_clear_flags(void) {}


x86 assembly (clang, -O0):
<BIO_clear_flags>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BIO_clear_flags>:
ret

LLVM IR (-O0):
define void @BIO_clear_flags() {
ret void
}

LLVM IR (-O2):
define void @BIO_clear_flags() {
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t checksum2(uint8_t checksum1) { return (~checksum1) & 0xFE; }


x86 assembly (clang, -O0):
<checksum2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
and    $0xfe,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checksum2>:
mov    %edi,%eax
not    %eax
and    $0xfe,%eax
ret

LLVM IR (-O0):
define i32 @checksum2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = xor i32 %3, -1
%5 = and i32 %4, 254
ret i32 %5
}

LLVM IR (-O2):
define i32 @checksum2(i32 %0) {
%2 = and i32 %0, 254
%3 = xor i32 %2, 254
ret i32 %3
}
int insy_rpy_csr_debug_set(unsigned int dev_id,
                           union insy_rpy_csr_debug_u *value) {
  return 1;
}


x86 assembly (clang, -O0):
<insy_rpy_csr_debug_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<insy_rpy_csr_debug_set>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%union.insy_rpy_csr_debug_u = type opaque
define i32 @insy_rpy_csr_debug_set(i32 %0, %union.insy_rpy_csr_debug_u* %1) {
%3 = alloca i32
%4 = alloca %union.insy_rpy_csr_debug_u*
store i32 %0, i32* %3
store %union.insy_rpy_csr_debug_u* %1, %union.insy_rpy_csr_debug_u** %4
ret i32 1
}

LLVM IR (-O2):
%union.insy_rpy_csr_debug_u = type opaque
define i32 @insy_rpy_csr_debug_set(i32 %0, %union.insy_rpy_csr_debug_u* nocapture readnone %1) {
ret i32 1
}
void SPISSIConfig(unsigned long ulBase, unsigned long ulSSI) {

  ;
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000000))) &= ~0x00000100;
  (*((volatile unsigned long *)(ulBase + 0x00000000))) |= ulSSI;
}


x86 assembly (clang, -O0):
<SPISSIConfig>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
and    $0xfffffffffffffeff,%rcx
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
or     %rdx,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPISSIConfig>:
andq   $0xfffffffffffffeff,(%rdi)
or     %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @SPISSIConfig(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = add i64 %5, 0
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = and i64 %8, -257
store volatile i64 %9, i64* %7
%10 = load i64, i64* %4
%11 = load i64, i64* %3
%12 = add i64 %11, 0
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
%15 = or i64 %14, %10
store volatile i64 %15, i64* %13
ret void
}

LLVM IR (-O2):
define void @SPISSIConfig(i64 %0, i64 %1) {
%3 = inttoptr i64 %0 to i64*
%4 = load volatile i64, i64* %3
%5 = and i64 %4, -257
store volatile i64 %5, i64* %3
%6 = load volatile i64, i64* %3
%7 = or i64 %6, %1
store volatile i64 %7, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
int /*<<< orphan*/ usleep(int);
int main(void) {
  while (1) {
    system("cat /sys/class/thermal/thermal_zone0/temp");
    usleep(1000000);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <system@plt>
mov    $0xf4240,%edi
call   1040 <usleep@plt>
jmp    112f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xed8(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <system@plt>
mov    $0xf4240,%edi
call   1040 <usleep@plt>
jmp    1130 <main+0x10>

LLVM IR (-O0):
@.str = [42 x i8] c"cat /sys/class/thermal/thermal_zone0/temp\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0, %2
%3 = call i32 @system(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @usleep(i32 1000000)
br label %2
}

LLVM IR (-O2):
@.str = [42 x i8] c"cat /sys/class/thermal/thermal_zone0/temp\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 @system(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @usleep(i32 1000000)
br label %1
}
/* Type definitions */
typedef int uint8_t;
typedef scalar_t__ uint64_t;
typedef int int64_t;

/* Variables and functions */
uint64_t sext(uint64_t val, uint8_t sign) {
  int64_t sval;
  uint8_t shc;
  sval = (int64_t)val;
  shc = 64 - sign;
  sval <<= shc;
  sval >>= shc;
  return (uint64_t)sval;
}


x86 assembly (clang, -O0):
<sext>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,-0x10(%rbp)
mov    $0x40,%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%eax
shl    %cl,%eax
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%eax
sar    %cl,%eax
mov    %eax,-0x10(%rbp)
movslq -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sext>:
mov    %esi,%ecx
neg    %cl
shl    %cl,%edi
sar    %cl,%edi
movslq %edi,%rax
ret

LLVM IR (-O0):
define i64 @sext(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%7 = load i64, i64* %3
%8 = trunc i64 %7 to i32
store i32 %8, i32* %5
%9 = load i32, i32* %4
%10 = sub nsw i32 64, %9
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = load i32, i32* %5
%13 = shl i32 %12, %11
store i32 %13, i32* %5
%14 = load i32, i32* %6
%15 = load i32, i32* %5
%16 = ashr i32 %15, %14
store i32 %16, i32* %5
%17 = load i32, i32* %5
%18 = sext i32 %17 to i64
ret i64 %18
}

LLVM IR (-O2):
define i64 @sext(i64 %0, i32 %1) {
%3 = trunc i64 %0 to i32
%4 = sub nsw i32 64, %1
%5 = shl i32 %3, %4
%6 = ashr i32 %5, %4
%7 = sext i32 %6 to i64
ret i64 %7
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
uint16_t mtob_w(const uint16_t in) {
  return (in & 0xFF00 >> 8) + (in & 0x00FF << 8);
}


x86 assembly (clang, -O0):
<mtob_w>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mtob_w>:
movzwl %di,%eax
ret

LLVM IR (-O0):
define i32 @mtob_w(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
%5 = load i32, i32* %2
%6 = and i32 %5, 65280
%7 = add nsw i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @mtob_w(i32 %0) {
%2 = and i32 %0, 65535
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ makelong(int /*<<< orphan*/, int /*<<< orphan*/ *);
int encodelong(uint32_t data, uint8_t *bigbuf, int position) {
  makelong(data, bigbuf);
  return position + 11;
}


x86 assembly (clang, -O0):
<encodelong>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <makelong@plt>
mov    -0x14(%rbp),%eax
add    $0xb,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<encodelong>:
push   %rbx
mov    %edx,%ebx
call   1030 <makelong@plt>
add    $0xb,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @encodelong(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32*, i32** %5
%9 = call i32 @makelong(i32 %7, i32* %8)
%10 = load i32, i32* %6
%11 = add nsw i32 %10, 11
ret i32 %11
}

LLVM IR (-O2):
define i32 @encodelong(i32 %0, i32* %1, i32 %2) {
%4 = tail call i32 @makelong(i32 %0, i32* %1)
%5 = add nsw i32 %2, 11
ret i32 %5
}
/* Variables and functions */
int ENOTSUP;
int NOTSUP() { return -ENOTSUP; }


x86 assembly (clang, -O0):
<NOTSUP>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    0x2edb(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<NOTSUP>:
mov    0x2ee1(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@ENOTSUP = global i32 0
define i32 @NOTSUP() {
%1 = load i32, i32* @ENOTSUP
%2 = sub nsw i32 0, %1
ret i32 %2
}

LLVM IR (-O2):
@ENOTSUP = global i32 0
define i32 @NOTSUP() {
%1 = load i32, i32* @ENOTSUP
%2 = sub nsw i32 0, %1
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void usage(char *name) {
  printf("Usage: %s <input filename> <output filename>\n\n", name);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [47 x i8] c"Usage: %s <input filename> <output filename>\0A\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [47 x i8] c"Usage: %s <input filename> <output filename>\0A\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
int DiagOpen(const char *pcName, int iMode) { return (-1); }


x86 assembly (clang, -O0):
<DiagOpen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DiagOpen>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @DiagOpen(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 -1
}

LLVM IR (-O2):
define i32 @DiagOpen(i8* nocapture readnone %0, i32 %1) {
ret i32 -1
}
/* Type definitions */
typedef int /*<<< orphan*/ key_t;

/* Variables and functions */
int IPC_CREAT;
int shmget(int /*<<< orphan*/, int, int);
int get_shared_mem_id(int key, int size) {
  int sm_id;
  sm_id = shmget((key_t)key, size, 0666 | IPC_CREAT);
  return sm_id;
}


x86 assembly (clang, -O0):
<get_shared_mem_id>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    0x2eb5(%rip),%rax
mov    (%rax),%edx
or     $0x1b6,%edx
call   1030 <shmget@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_shared_mem_id>:
mov    0x2ec9(%rip),%rax
mov    $0x1b6,%edx
or     (%rax),%edx
jmp    1030 <shmget@plt>

LLVM IR (-O0):
@IPC_CREAT = global i32 0
define i32 @get_shared_mem_id(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = load i32, i32* @IPC_CREAT
%9 = or i32 438, %8
%10 = call i32 @shmget(i32 %6, i32 %7, i32 %9)
store i32 %10, i32* %5
%11 = load i32, i32* %5
ret i32 %11
}

LLVM IR (-O2):
@IPC_CREAT = global i32 0
define i32 @get_shared_mem_id(i32 %0, i32 %1) {
%3 = load i32, i32* @IPC_CREAT
%4 = or i32 %3, 438
%5 = tail call i32 @shmget(i32 %0, i32 %1, i32 %4)
ret i32 %5
}
/* Variables and functions */
long double sqrtl(long double);
long double _norm(long double *a) {
  return sqrtl(a[0] * a[0] + a[1] * a[1] + a[2] * a[2]);
}


x86 assembly (clang, -O0):
<_norm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
fldt   (%rax)
fldt   0x10(%rax)
fmul   %st,%st(0)
fxch   %st(1)
fmul   %st,%st(0)
faddp  %st,%st(1)
fldt   0x20(%rax)
fmul   %st,%st(0)
faddp  %st,%st(1)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <sqrtl@plt>
fld    %st(0)
fstp   %st(0)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_norm>:
sub    $0x18,%rsp
fldt   (%rdi)
fldt   0x10(%rdi)
fmul   %st,%st(0)
fxch   %st(1)
fmul   %st,%st(0)
faddp  %st,%st(1)
fldt   0x20(%rdi)
fmul   %st,%st(0)
faddp  %st,%st(1)
fstpt  (%rsp)
call   1030 <sqrtl@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @_norm(x86_fp80* %0) {
%2 = alloca x86_fp80*
store x86_fp80* %0, x86_fp80** %2
%3 = load x86_fp80*, x86_fp80** %2
%4 = getelementptr inbounds x86_fp80, x86_fp80* %3, i64 0
%5 = load x86_fp80, x86_fp80* %4
%6 = load x86_fp80*, x86_fp80** %2
%7 = getelementptr inbounds x86_fp80, x86_fp80* %6, i64 0
%8 = load x86_fp80, x86_fp80* %7
%9 = load x86_fp80*, x86_fp80** %2
%10 = getelementptr inbounds x86_fp80, x86_fp80* %9, i64 1
%11 = load x86_fp80, x86_fp80* %10
%12 = load x86_fp80*, x86_fp80** %2
%13 = getelementptr inbounds x86_fp80, x86_fp80* %12, i64 1
%14 = load x86_fp80, x86_fp80* %13
%15 = fmul x86_fp80 %11, %14
%16 = call x86_fp80 @llvm.fmuladd.f80(x86_fp80 %5, x86_fp80 %8, x86_fp80 %15)
%17 = load x86_fp80*, x86_fp80** %2
%18 = getelementptr inbounds x86_fp80, x86_fp80* %17, i64 2
%19 = load x86_fp80, x86_fp80* %18
%20 = load x86_fp80*, x86_fp80** %2
%21 = getelementptr inbounds x86_fp80, x86_fp80* %20, i64 2
%22 = load x86_fp80, x86_fp80* %21
%23 = call x86_fp80 @llvm.fmuladd.f80(x86_fp80 %19, x86_fp80 %22, x86_fp80 %16)
%24 = call x86_fp80 @sqrtl(x86_fp80 %23)
ret x86_fp80 %24
}

LLVM IR (-O2):
define x86_fp80 @_norm(x86_fp80* nocapture %0) {
%2 = load x86_fp80, x86_fp80* %0
%3 = getelementptr inbounds x86_fp80, x86_fp80* %0, i64 1
%4 = load x86_fp80, x86_fp80* %3
%5 = fmul x86_fp80 %4, %4
%6 = tail call x86_fp80 @llvm.fmuladd.f80(x86_fp80 %2, x86_fp80 %2, x86_fp80 %5)
%7 = getelementptr inbounds x86_fp80, x86_fp80* %0, i64 2
%8 = load x86_fp80, x86_fp80* %7
%9 = tail call x86_fp80 @llvm.fmuladd.f80(x86_fp80 %8, x86_fp80 %8, x86_fp80 %6)
%10 = tail call x86_fp80 @sqrtl(x86_fp80 %9)
ret x86_fp80 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ vfprintf(int /*<<< orphan*/, char const *,
                            int /*<<< orphan*/);
void osmo_panic_default(const char *fmt, va_list args) {
  vfprintf(stderr, fmt, args);
  abort();
}


x86 assembly (clang, -O0):
<osmo_panic_default>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1040 <vfprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<osmo_panic_default>:
push   %rax
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
call   1040 <vfprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
define void @osmo_panic_default(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @vfprintf(i32 %5, i8* %6, i32 %7)
%9 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
define void @osmo_panic_default(i8* %0, i32 %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @vfprintf(i32 %3, i8* %0, i32 %1)
%5 = tail call i32 (...) @abort()
unreachable
}
void mtime_free() {}


x86 assembly (clang, -O0):
<mtime_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mtime_free>:
ret

LLVM IR (-O0):
define void @mtime_free() {
ret void
}

LLVM IR (-O2):
define void @mtime_free() {
ret void
}
/* Variables and functions */
int getchar();
void limpa_buffer(void) {
  int c;
  c = getchar();
}


x86 assembly (clang, -O0):
<limpa_buffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getchar@plt>
mov    %eax,-0x4(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<limpa_buffer>:
xor    %eax,%eax
jmp    1030 <getchar@plt>

LLVM IR (-O0):
define void @limpa_buffer() {
%1 = alloca i32
%2 = call i32 (...) @getchar()
store i32 %2, i32* %1
ret void
}

LLVM IR (-O2):
define void @limpa_buffer() {
%1 = tail call i32 (...) @getchar()
ret void
}
/* Type definitions */
struct svc_req {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int *reset_1_svc(char **device, struct svc_req *svc) {
  printf("RESET\n");
  printf("device:  %s\n", *device);
  printf("\n");
  return 0;
}


x86 assembly (clang, -O0):
<reset_1_svc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rsi
lea    0xecb(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xebb(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reset_1_svc>:
push   %rbx
mov    %rdi,%rbx
lea    0xed2(%rip),%rdi
call   1040 <puts@plt>
mov    (%rbx),%rsi
lea    0xeb6(%rip),%rdi
xor    %eax,%eax
call   1050 <printf@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.svc_req = type { i32 }
@.str = [7 x i8] c"RESET\0A\00"
@.str.1 = [13 x i8] c"device: %s\0A\00"
@.str.2 = [2 x i8] c"\0A\00"
define i32* @reset_1_svc(i8** %0, %struct.svc_req* %1) {
%3 = alloca i8**
%4 = alloca %struct.svc_req*
store i8** %0, i8*** %3
store %struct.svc_req* %1, %struct.svc_req** %4
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %6
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0), i8* %7)
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
ret i32* null
}

LLVM IR (-O2):
%struct.svc_req = type { i32 }
@.str.1 = [13 x i8] c"device: %s\0A\00"
@str = [6 x i8] c"RESET\00"
define noalias i32* @reset_1_svc(i8** nocapture %0, %struct.svc_req* nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
%4 = load i8*, i8** %0
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0), i8* %4)
%6 = tail call i32 @putchar(i32 10)
ret i32* null
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int);
void sprint_push(char *str, uint8_t direct) {
  sprintf(str,
          "PUSH  "
          "0x%02X"
          "                      ",
          direct);
}


x86 assembly (clang, -O0):
<sprint_push>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
lea    0xed3(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sprint_push>:
mov    %esi,%edx
lea    0xee7(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"PUSH 0x%02X \00"
define void @sprint_push(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @sprintf(i8* %5, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [35 x i8] c"PUSH 0x%02X \00"
define void @sprint_push(i8* nocapture writeonly %0, i32 %1) {
%3 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
/* Variables and functions */
double M_PI;
double radToDeg(double angle) { return (180.0 / M_PI) * angle; }


x86 assembly (clang, -O0):
<radToDeg>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mov    0x2ed0(%rip),%rax
divsd  (%rax),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<radToDeg>:
mov    0x2ee1(%rip),%rax
movsd  0xef1(%rip),%xmm1
divsd  (%rax),%xmm1
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
@M_PI = global double 0.000000e+00
define double @radToDeg(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* @M_PI
%4 = fdiv double 1.800000e+02, %3
%5 = load double, double* %2
%6 = fmul double %4, %5
ret double %6
}

LLVM IR (-O2):
@M_PI = global double 0.000000e+00
define double @radToDeg(double %0) {
%2 = load double, double* @M_PI
%3 = fdiv double 1.800000e+02, %2
%4 = fmul double %3, %0
ret double %4
}
int test_imm_4Fuint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x4F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_4Fuint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0x4f,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_4Fuint64_midword_mem>:
testb  $0x4f,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_4Fuint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 79
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_4Fuint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 5177344
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void X509_get_ex_new_index(void) {}


x86 assembly (clang, -O0):
<X509_get_ex_new_index>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_get_ex_new_index>:
ret

LLVM IR (-O0):
define void @X509_get_ex_new_index() {
ret void
}

LLVM IR (-O2):
define void @X509_get_ex_new_index() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
int /*<<< orphan*/ scanf(char *, char *);
int main() {
  char s;
  scanf("%c", &s);
  printf("\n%c\n", 'a' + ('z' - s));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x5(%rbp),%rsi
call   1040 <scanf@plt>
movsbl -0x5(%rbp),%ecx
mov    $0x7a,%eax
sub    %ecx,%eax
add    $0x61,%eax
lea    0xeaf(%rip),%rdi
movsbl %al,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x7(%rsp),%rsi
call   1040 <scanf@plt>
mov    $0xdb,%al
sub    0x7(%rsp),%al
movsbl %al,%esi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
@.str.1 = [5 x i8] c"\0A%c\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = sub nsw i32 122, %5
%7 = add nsw i32 97, %6
%8 = trunc i32 %7 to i8
%9 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8 signext %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
@.str.1 = [5 x i8] c"\0A%c\0A\00"
define i32 @main() {
%1 = alloca i8
%2 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %1)
%3 = load i8, i8* %1
%4 = sub i8 -37, %3
%5 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8 signext %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ isspace(char);
char *End(char *line) {
  while (!isspace((*line)) && *line)
    line++;
  return line;
}


x86 assembly (clang, -O0):
<End>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    1148 <End+0x38>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    1158 <End+0x48>
jmp    1169 <End+0x59>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <End+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<End>:
push   %rbx
mov    %rdi,%rbx
movsbl (%rdi),%edi
nopw   0x0(%rax,%rax,1)
call   1030 <isspace@plt>
test   %eax,%eax
jne    1138 <End+0x28>
cmpb   $0x0,(%rbx)
je     1138 <End+0x28>
movsbl 0x1(%rbx),%edi
add    $0x1,%rbx
jmp    1120 <End+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @End(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %15, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = call i32 @isspace(i8 signext %5)
%7 = icmp ne i32 %6, 0
br i1 %7, label %13, label %8
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br label %13
13: ; preds = %8, %3
%14 = phi i1 [ false, %3 ], [ %12, %8 ]
br i1 %14, label %15, label %18
15: ; preds = %13
%16 = load i8*, i8** %2
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %2
br label %3
18: ; preds = %13
%19 = load i8*, i8** %2
ret i8* %19
}

LLVM IR (-O2):
define i8* @End(i8* %0) {
%2 = load i8, i8* %0
%3 = tail call i32 @isspace(i8 signext %2)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %14
5: ; preds = %1, %9
%6 = phi i8* [ %10, %9 ], [ %0, %1 ]
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %5
%10 = getelementptr inbounds i8, i8* %6, i64 1
%11 = load i8, i8* %10
%12 = tail call i32 @isspace(i8 signext %11)
%13 = icmp eq i32 %12, 0
br i1 %13, label %5, label %14
14: ; preds = %5, %9, %1
%15 = phi i8* [ %0, %1 ], [ %10, %9 ], [ %6, %5 ]
ret i8* %15
}
/* Variables and functions */
scalar_t__ mock(char *);
char *cf_s_uuinbound(char *s) { return (char *)mock(s); }


x86 assembly (clang, -O0):
<cf_s_uuinbound>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cf_s_uuinbound>:
jmp    1030 <mock@plt>

LLVM IR (-O0):
define i8* @cf_s_uuinbound(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @mock(i8* %3)
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}

LLVM IR (-O2):
define i8* @cf_s_uuinbound(i8* %0) {
%2 = tail call i64 @mock(i8* %0)
%3 = inttoptr i64 %2 to i8*
ret i8* %3
}
/* Variables and functions */
unsigned int sys_call(int, unsigned int, int, int /*<<< orphan*/,
                      int /*<<< orphan*/);
unsigned int tty_putc(char byte) {
  return sys_call(0x02, (unsigned int)(&byte), 1, 0, 0);
}


x86 assembly (clang, -O0):
<tty_putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
lea    -0x1(%rbp),%rax
mov    %eax,%esi
mov    $0x2,%edi
mov    $0x1,%edx
xor    %r8d,%r8d
mov    %r8d,%ecx
call   1030 <sys_call@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tty_putc>:
push   %rax
mov    %dil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x2,%edi
mov    $0x1,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
call   1030 <sys_call@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @tty_putc(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = ptrtoint i8* %2 to i32
%4 = call i32 @sys_call(i32 2, i32 %3, i32 1, i32 0, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @tty_putc(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = ptrtoint i8* %2 to i64
%4 = trunc i64 %3 to i32
%5 = call i32 @sys_call(i32 2, i32 %4, i32 1, i32 0, i32 0)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ switch_off_bits(unsigned char *, int);
void CTRL_REGSC_BITSET_mwup_rsp_unlatchd(unsigned char *data) {
  switch_off_bits(data, (0x08));
}


x86 assembly (clang, -O0):
<CTRL_REGSC_BITSET_mwup_rsp_unlatchd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x8,%esi
call   1030 <switch_off_bits@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CTRL_REGSC_BITSET_mwup_rsp_unlatchd>:
mov    $0x8,%esi
jmp    1030 <switch_off_bits@plt>

LLVM IR (-O0):
define void @CTRL_REGSC_BITSET_mwup_rsp_unlatchd(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @switch_off_bits(i8* %3, i32 8)
ret void
}

LLVM IR (-O2):
define void @CTRL_REGSC_BITSET_mwup_rsp_unlatchd(i8* %0) {
%2 = tail call i32 @switch_off_bits(i8* %0, i32 8)
ret void
}
/* Variables and functions */
unsigned short NF_CheckId();
unsigned short K9Fxx08_checkid() { return NF_CheckId(); }


x86 assembly (clang, -O0):
<K9Fxx08_checkid>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <NF_CheckId@plt>
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<K9Fxx08_checkid>:
xor    %eax,%eax
jmp    1030 <NF_CheckId@plt>

LLVM IR (-O0):
define zeroext i16 @K9Fxx08_checkid() {
%1 = call zeroext i16 (...) @NF_CheckId()
ret i16 %1
}

LLVM IR (-O2):
define zeroext i16 @K9Fxx08_checkid() {
%1 = tail call zeroext i16 (...) @NF_CheckId()
ret i16 %1
}
/* Variables and functions */
int ioctl(int, unsigned int, void *);
int ioctl_or_perror(int fd, unsigned request, void *argp, const char *fmt,
                    ...) {
  int ret = ioctl(fd, request, argp);
  if (ret < 0) {
  }
  return ret;
}


x86 assembly (clang, -O0):
<ioctl_or_perror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1030 <ioctl@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jge    1147 <ioctl_or_perror+0x37>
jmp    1147 <ioctl_or_perror+0x37>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ioctl_or_perror>:
jmp    1030 <ioctl@plt>

LLVM IR (-O0):
define i32 @ioctl_or_perror(i32 %0, i32 %1, i8* %2, i8* %3, ...) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = load i8*, i8** %7
%13 = call i32 @ioctl(i32 %10, i32 %11, i8* %12)
store i32 %13, i32* %9
%14 = load i32, i32* %9
%15 = icmp slt i32 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %4
br label %17
17: ; preds = %16, %4
%18 = load i32, i32* %9
ret i32 %18
}

LLVM IR (-O2):
define i32 @ioctl_or_perror(i32 %0, i32 %1, i8* %2, i8* nocapture readnone %3, ...) {
%5 = tail call i32 @ioctl(i32 %0, i32 %1, i8* %2)
ret i32 %5
}