xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ _ses_str_cpy(int /*<<< orphan*/ *, int, char *,
                                unsigned int);
void ses_config_enclosure_descriptor_vendor_identifier(uint8_t *data, char *s,
                                                       unsigned slen) {
  _ses_str_cpy(data + 12, 8, s, slen);
}


x86 assembly (clang, -O0):
<ses_config_enclosure_descriptor_vendor_identifier>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x30,%rdi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0x8,%esi
call   1030 <_ses_str_cpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ses_config_enclosure_descriptor_vendor_identifier>:
mov    %edx,%ecx
mov    %rsi,%rdx
add    $0x30,%rdi
mov    $0x8,%esi
jmp    1030 <_ses_str_cpy@plt>

LLVM IR (-O0):
define void @ses_config_enclosure_descriptor_vendor_identifier(i32* %0, i8* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = getelementptr inbounds i32, i32* %7, i64 12
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 @_ses_str_cpy(i32* %8, i32 8, i8* %9, i32 %10)
ret void
}

LLVM IR (-O2):
define void @ses_config_enclosure_descriptor_vendor_identifier(i32* %0, i8* %1, i32 %2) {
%4 = getelementptr inbounds i32, i32* %0, i64 12
%5 = tail call i32 @_ses_str_cpy(i32* %4, i32 8, i8* %1, i32 %2)
ret void
}
/* Variables and functions */
long GetMouseWheel277();
long getmousewheel() { return GetMouseWheel277(); }


x86 assembly (clang, -O0):
<getmousewheel>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GetMouseWheel277@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getmousewheel>:
xor    %eax,%eax
jmp    1030 <GetMouseWheel277@plt>

LLVM IR (-O0):
define i64 @getmousewheel() {
%1 = call i64 (...) @GetMouseWheel277()
ret i64 %1
}

LLVM IR (-O2):
define i64 @getmousewheel() {
%1 = tail call i64 (...) @GetMouseWheel277()
ret i64 %1
}
void ARGBSobelXY() {}


x86 assembly (clang, -O0):
<ARGBSobelXY>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBSobelXY>:
ret

LLVM IR (-O0):
define void @ARGBSobelXY() {
ret void
}

LLVM IR (-O2):
define void @ARGBSobelXY() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *);
void show_help(void) {
  printf("Usage: %s [VARIABLE]...\n   or: %s OPTION\n\n    Print the value of "
         "VARIABLE.\n    If no environment VARIABLE specified, print them "
         "all.\n\nOptions:\n    -h, --help\t\tdisplay this help\n    -V, "
         "--version\tdisplay version information\n\nReport bugs to "
         "<bulliver@gmail.com>\n",
         "printenv", "printenv");
}


x86 assembly (clang, -O0):
<show_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xfe3(%rip),%rdx
mov    %rdx,%rsi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_help>:
lea    0xee9(%rip),%rdi
lea    0xfe7(%rip),%rdx
mov    %rdx,%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [261 x i8] c"Usage: %s [VARIABLE]...\0A or: %s OPTION\0A\0A Print the value of VARIABLE.\0A If no environment VARIABLE specified, print them all.\0A\0AOptions:\0A -h, --help\09\09display this help\0A -V, --version\09display version information\0A\0AReport bugs to <bulliver@gmail.com>\0A\00"
@.str.1 = [9 x i8] c"printenv\00"
define void @show_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([261 x i8], [261 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [261 x i8] c"Usage: %s [VARIABLE]...\0A or: %s OPTION\0A\0A Print the value of VARIABLE.\0A If no environment VARIABLE specified, print them all.\0A\0AOptions:\0A -h, --help\09\09display this help\0A -V, --version\09display version information\0A\0AReport bugs to <bulliver@gmail.com>\0A\00"
@.str.1 = [9 x i8] c"printenv\00"
define void @show_help() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([261 x i8], [261 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef scalar_t__ rax;

/* Variables and functions */
int /*<<< orphan*/ cpuid(int, int *, int *, int *, int *);
bool cpuid_pkg_therm_enable_status_and_interrupt(void) {
  uint64_t rax, rbx, rcx, rdx;
  int leaf = 6;
  cpuid(leaf, &rax, &rbx, &rcx, &rdx);
  if ((((uint64_t)(rax) &
        ((((uint64_t)1 << (((6)) - ((6)) + 1)) - 1) << ((6)))) >>
       (6)) == 1) {
    return true;
  } else {
    return false;
  }
}


x86 assembly (clang, -O0):
<cpuid_pkg_therm_enable_status_and_interrupt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x6,-0x18(%rbp)
mov    -0x18(%rbp),%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%r8
call   1030 <cpuid@plt>
mov    -0x8(%rbp),%eax
and    $0x40,%eax
sar    $0x6,%eax
cmp    $0x1,%eax
jne    1155 <cpuid_pkg_therm_enable_status_and_interrupt+0x45>
movl   $0x1,-0x4(%rbp)
jmp    115c <cpuid_pkg_therm_enable_status_and_interrupt+0x4c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuid_pkg_therm_enable_status_and_interrupt>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rsi
lea    0x14(%rsp),%rdx
lea    0x10(%rsp),%rcx
lea    0xc(%rsp),%r8
mov    $0x6,%edi
call   1030 <cpuid@plt>
mov    0x8(%rsp),%eax
shr    $0x6,%eax
and    $0x1,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @cpuid_pkg_therm_enable_status_and_interrupt() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 6, i32* %6
%7 = load i32, i32* %6
%8 = call i32 @cpuid(i32 %7, i32* %2, i32* %3, i32* %4, i32* %5)
%9 = load i32, i32* %2
%10 = and i32 %9, 64
%11 = ashr i32 %10, 6
%12 = icmp eq i32 %11, 1
br i1 %12, label %13, label %14
13: ; preds = %0
store i32 1, i32* %1
br label %15
14: ; preds = %0
store i32 0, i32* %1
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %1
ret i32 %16
}

LLVM IR (-O2):
define i32 @cpuid_pkg_therm_enable_status_and_interrupt() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %1 to i8*
%6 = bitcast i32* %2 to i8*
%7 = bitcast i32* %3 to i8*
%8 = bitcast i32* %4 to i8*
%9 = call i32 @cpuid(i32 6, i32* %1, i32* %2, i32* %3, i32* %4)
%10 = load i32, i32* %1
%11 = lshr i32 %10, 6
%12 = and i32 %11, 1
ret i32 %12
}
int new_intu(unsigned int lower, unsigned int upper) {
  unsigned int val = (unsigned)1u << 31;
  if (val < lower)
    return lower;
  if (val > upper)
    return upper;
  return val;
}


x86 assembly (clang, -O0):
<new_intu>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x80000000,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jae    1128 <new_intu+0x28>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1145 <new_intu+0x45>
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jbe    113f <new_intu+0x3f>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1145 <new_intu+0x45>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<new_intu>:
test   %esi,%esi
mov    $0x80000000,%eax
cmovns %esi,%eax
cmp    $0x80000001,%edi
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @new_intu(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 -2147483648, i32* %6
%7 = load i32, i32* %6
%8 = load i32, i32* %4
%9 = icmp ult i32 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = load i32, i32* %4
store i32 %11, i32* %3
br label %20
12: ; preds = %2
%13 = load i32, i32* %6
%14 = load i32, i32* %5
%15 = icmp ugt i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load i32, i32* %5
store i32 %17, i32* %3
br label %20
18: ; preds = %12
%19 = load i32, i32* %6
store i32 %19, i32* %3
br label %20
20: ; preds = %18, %16, %10
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @new_intu(i32 %0, i32 %1) {
%3 = icmp ugt i32 %0, -2147483648
%4 = icmp ult i32 %1, -2147483648
%5 = select i1 %4, i32 %1, i32 -2147483648
%6 = select i1 %3, i32 %0, i32 %5
ret i32 %6
}
/* Variables and functions */
int atoi(char *);
char *lp_internal_sconfig(int, char const *);
int lp_internal_iconfig(int chn, const char *name) {
  char *s = lp_internal_sconfig(chn, name);
  if (s)
    return atoi(s);
  return 0;
}


x86 assembly (clang, -O0):
<lp_internal_iconfig>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <lp_internal_sconfig@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     115b <lp_internal_iconfig+0x3b>
mov    -0x18(%rbp),%rdi
call   1040 <atoi@plt>
mov    %eax,-0x4(%rbp)
jmp    1162 <lp_internal_iconfig+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lp_internal_iconfig>:
push   %rax
call   1030 <lp_internal_sconfig@plt>
test   %rax,%rax
je     1134 <lp_internal_iconfig+0x14>
mov    %rax,%rdi
pop    %rax
jmp    1040 <atoi@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @lp_internal_iconfig(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = call i8* @lp_internal_sconfig(i32 %7, i8* %8)
store i8* %9, i8** %6
%10 = load i8*, i8** %6
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = load i8*, i8** %6
%14 = call i32 @atoi(i8* %13)
store i32 %14, i32* %3
br label %16
15: ; preds = %2
store i32 0, i32* %3
br label %16
16: ; preds = %15, %12
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @lp_internal_iconfig(i32 %0, i8* %1) {
%3 = tail call i8* @lp_internal_sconfig(i32 %0, i8* %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @atoi(i8* %3)
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ %6, %5 ], [ 0, %2 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ buf_put_char(int /*<<< orphan*/);
int /*<<< orphan*/ u_str_get_char(char const *, long *);
void buf_add_str(const char *str) {
  long i = 0;
  while (str[i]) {
    if (!buf_put_char(u_str_get_char(str, &i)))
      break;
  }
}


x86 assembly (clang, -O0):
<buf_add_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     116d <buf_add_str+0x4d>
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1040 <u_str_get_char@plt>
mov    %eax,%edi
call   1030 <buf_put_char@plt>
cmp    $0x0,%eax
jne    1168 <buf_add_str+0x48>
jmp    116d <buf_add_str+0x4d>
jmp    1134 <buf_add_str+0x14>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buf_add_str>:
push   %r14
push   %rbx
push   %rax
movq   $0x0,(%rsp)
cmpb   $0x0,(%rdi)
je     1160 <buf_add_str+0x40>
mov    %rdi,%rbx
mov    %rsp,%r14
nopw   0x0(%rax,%rax,1)
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <u_str_get_char@plt>
mov    %eax,%edi
call   1030 <buf_put_char@plt>
test   %eax,%eax
je     1160 <buf_add_str+0x40>
mov    (%rsp),%rax
cmpb   $0x0,(%rbx,%rax,1)
jne    1140 <buf_add_str+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @buf_add_str(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %16, %1
%5 = load i8*, i8** %2
%6 = load i64, i64* %3
%7 = getelementptr inbounds i8, i8* %5, i64 %6
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %4
%11 = load i8*, i8** %2
%12 = call i32 @u_str_get_char(i8* %11, i64* %3)
%13 = call i32 @buf_put_char(i32 %12)
%14 = icmp ne i32 %13, 0
br i1 %14, label %16, label %15
15: ; preds = %10
br label %17
16: ; preds = %10
br label %4
17: ; preds = %15, %4
ret void
}

LLVM IR (-O2):
define void @buf_add_str(i8* %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
store i64 0, i64* %2
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %15, label %6
6: ; preds = %1, %10
%7 = call i32 @u_str_get_char(i8* %0, i64* %2)
%8 = call i32 @buf_put_char(i32 %7)
%9 = icmp eq i32 %8, 0
br i1 %9, label %15, label %10
10: ; preds = %6
%11 = load i64, i64* %2
%12 = getelementptr inbounds i8, i8* %0, i64 %11
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %6
15: ; preds = %10, %6, %1
ret void
}
/* Variables and functions */
int rand();
int main(int argc, char **argv) {
  int x, y;
  int r = rand();
  if (r >= 0) {
    y = rand();
    x = 42;
  } else {
    rand();
    y = rand();
    x = 7;
  }
  return x;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jl     1150 <main+0x40>
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x18(%rbp)
movl   $0x2a,-0x14(%rbp)
jmp    1168 <main+0x58>
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x18(%rbp)
movl   $0x7,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1030 <rand@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
mov    $0x2a,%eax
test   %ebx,%ebx
js     112c <main+0x1c>
pop    %rbx
ret
xor    %eax,%eax
call   1030 <rand@plt>
mov    $0x7,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%9 = call i32 (...) @rand()
store i32 %9, i32* %8
%10 = load i32, i32* %8
%11 = icmp sge i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = call i32 (...) @rand()
store i32 %13, i32* %7
store i32 42, i32* %6
br label %17
14: ; preds = %2
%15 = call i32 (...) @rand()
%16 = call i32 (...) @rand()
store i32 %16, i32* %7
store i32 7, i32* %6
br label %17
17: ; preds = %14, %12
%18 = load i32, i32* %6
ret i32 %18
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @rand()
%4 = icmp sgt i32 %3, -1
%5 = tail call i32 (...) @rand()
br i1 %4, label %8, label %6
6: ; preds = %2
%7 = tail call i32 (...) @rand()
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ 7, %6 ], [ 42, %2 ]
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ wint_t;
typedef int wctrans_t;

/* Variables and functions */
int /*<<< orphan*/ towlower(int /*<<< orphan*/);
int /*<<< orphan*/ towupper(int /*<<< orphan*/);
wint_t towctrans(wint_t wc, wctrans_t trans) {
  if (trans == 1)
    return towupper(wc);
  if (trans == 2)
    return towlower(wc);
  return wc;
}


x86 assembly (clang, -O0):
<towctrans>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jne    1148 <towctrans+0x28>
mov    -0x8(%rbp),%edi
call   1040 <towupper@plt>
mov    %eax,-0x4(%rbp)
jmp    1168 <towctrans+0x48>
cmpl   $0x2,-0xc(%rbp)
jne    1162 <towctrans+0x42>
mov    -0x8(%rbp),%edi
call   1030 <towlower@plt>
mov    %eax,-0x4(%rbp)
jmp    1168 <towctrans+0x48>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<towctrans>:
cmp    $0x2,%esi
je     112f <towctrans+0xf>
cmp    $0x1,%esi
jne    1134 <towctrans+0x14>
jmp    1040 <towupper@plt>
jmp    1030 <towlower@plt>
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @towctrans(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* %4
%10 = call i32 @towupper(i32 %9)
store i32 %10, i32* %3
br label %19
11: ; preds = %2
%12 = load i32, i32* %5
%13 = icmp eq i32 %12, 2
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i32, i32* %4
%16 = call i32 @towlower(i32 %15)
store i32 %16, i32* %3
br label %19
17: ; preds = %11
%18 = load i32, i32* %4
store i32 %18, i32* %3
br label %19
19: ; preds = %17, %14, %8
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @towctrans(i32 %0, i32 %1) {
switch i32 %1, label %7 [
i32 1, label %3
i32 2, label %5
]
3: ; preds = %2
%4 = tail call i32 @towupper(i32 %0)
br label %7
5: ; preds = %2
%6 = tail call i32 @towlower(i32 %0)
br label %7
7: ; preds = %2, %5, %3
%8 = phi i32 [ %4, %3 ], [ %6, %5 ], [ %0, %2 ]
ret i32 %8
}
unsigned int count_bits(unsigned long n) {
  unsigned int count = 0;
  while (n) {
    count += n & 1;
    n >>= 1;
  }
  return count;
}


x86 assembly (clang, -O0):
<count_bits>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     113c <count_bits+0x3c>
mov    -0x8(%rbp),%rcx
and    $0x1,%rcx
mov    -0xc(%rbp),%eax
add    %rcx,%rax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <count_bits+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_bits>:
xor    %eax,%eax
test   %rdi,%rdi
je     1123 <count_bits+0x23>
mov    %rdi,%rcx
nopw   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
add    %edx,%eax
shr    %rcx
cmp    $0x1,%rdi
mov    %rcx,%rdi
ja     1110 <count_bits+0x10>
ret

LLVM IR (-O0):
define i32 @count_bits(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i64, i64* %2
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = load i64, i64* %2
%9 = and i64 %8, 1
%10 = load i32, i32* %3
%11 = zext i32 %10 to i64
%12 = add i64 %11, %9
%13 = trunc i64 %12 to i32
store i32 %13, i32* %3
%14 = load i64, i64* %2
%15 = lshr i64 %14, 1
store i64 %15, i64* %2
br label %4
16: ; preds = %4
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @count_bits(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ 0, %1 ]
%5 = phi i64 [ %9, %3 ], [ %0, %1 ]
%6 = trunc i64 %5 to i32
%7 = and i32 %6, 1
%8 = add i32 %7, %4
%9 = lshr i64 %5, 1
%10 = icmp ult i64 %5, 2
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %8, %3 ]
ret i32 %12
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int c, x;
  x = __VERIFIER_nondet_int();
  c = 0;
  while ((x > 1) && (x < 100)) {
    x = x * x;
    c = c + 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0xc(%rbp)
movl   $0x0,-0x8(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0xc(%rbp)
mov    %al,-0xd(%rbp)
jle    1149 <main+0x39>
cmpl   $0x64,-0xc(%rbp)
setl   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1159 <main+0x49>
jmp    1171 <main+0x61>
mov    -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1130 <main+0x20>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %4, i32* %3
store i32 0, i32* %2
br label %5
5: ; preds = %13, %0
%6 = load i32, i32* %3
%7 = icmp sgt i32 %6, 1
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i32, i32* %3
%10 = icmp slt i32 %9, 100
br label %11
11: ; preds = %8, %5
%12 = phi i1 [ false, %5 ], [ %10, %8 ]
br i1 %12, label %13, label %19
13: ; preds = %11
%14 = load i32, i32* %3
%15 = load i32, i32* %3
%16 = mul nsw i32 %14, %15
store i32 %16, i32* %3
%17 = load i32, i32* %2
%18 = add nsw i32 %17, 1
store i32 %18, i32* %2
br label %5
19: ; preds = %11
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t idegrees(int degrees) { return degrees * 4096.0f / 360.0f; }


x86 assembly (clang, -O0):
<idegrees>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
movss  0xef0(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xee0(%rip),%xmm1
divss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<idegrees>:
cvtsi2ss %edi,%xmm0
mulss  0xef4(%rip),%xmm0
divss  0xef0(%rip),%xmm0
cvttss2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @idegrees(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sitofp i32 %3 to float
%5 = fmul float %4, 4.096000e+03
%6 = fdiv float %5, 3.600000e+02
%7 = fptosi float %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @idegrees(i32 %0) {
%2 = sitofp i32 %0 to float
%3 = fmul float %2, 4.096000e+03
%4 = fdiv float %3, 3.600000e+02
%5 = fptosi float %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ LOG_INFO;
int /*<<< orphan*/ _debug(char *, int, int /*<<< orphan*/, char *);
int /*<<< orphan*/ iptables_fw_set_authservers();
void fw_set_authservers(void) {
  _debug("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
         "2022-01-22/02-19-57/repos/GaomingPan/wifidog-gateway/refs/heads/"
         "master/src/firewall.c",
         236, LOG_INFO, "Setting the authservers list");
  iptables_fw_set_authservers();
}


x86 assembly (clang, -O0):
<fw_set_authservers>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edx
lea    0xecc(%rip),%rdi
mov    $0xec,%esi
lea    0xf56(%rip),%rcx
call   1040 <_debug@plt>
mov    $0x0,%al
call   1030 <iptables_fw_set_authservers@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fw_set_authservers>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edx
lea    0xecf(%rip),%rdi
lea    0xf5e(%rip),%rcx
mov    $0xec,%esi
call   1040 <_debug@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <iptables_fw_set_authservers@plt>

LLVM IR (-O0):
@.str = [150 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/GaomingPan/wifidog-gateway/refs/heads/master/src/firewall.c\00"
@LOG_INFO = global i32 0
@.str.1 = [29 x i8] c"Setting the authservers list\00"
define void @fw_set_authservers() {
%1 = load i32, i32* @LOG_INFO
%2 = call i32 @_debug(i8* getelementptr inbounds ([150 x i8], [150 x i8]* @.str, i64 0, i64 0), i32 236, i32 %1, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 (...) @iptables_fw_set_authservers()
ret void
}

LLVM IR (-O2):
@.str = [150 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/GaomingPan/wifidog-gateway/refs/heads/master/src/firewall.c\00"
@LOG_INFO = global i32 0
@.str.1 = [29 x i8] c"Setting the authservers list\00"
define void @fw_set_authservers() {
%1 = load i32, i32* @LOG_INFO
%2 = tail call i32 @_debug(i8* getelementptr inbounds ([150 x i8], [150 x i8]* @.str, i64 0, i64 0), i32 236, i32 %1, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 (...) @iptables_fw_set_authservers()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  printf("Hello world, this binary's execution is okay");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [45 x i8] c"Hello world, this binary's execution is okay\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [45 x i8] c"Hello world, this binary's execution is okay\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ LeddarGetKey();
int /*<<< orphan*/ LeddarKeyPressed();
int /*<<< orphan*/ LeddarSleep(double);
char toupper(int /*<<< orphan*/);
char WaitKey(void) {
  while (!LeddarKeyPressed()) {
    LeddarSleep(0.5);
  }
  return toupper(LeddarGetKey());
}


x86 assembly (clang, -O0):
<WaitKey>:
push   %rbp
mov    %rsp,%rbp
jmp    1149 <WaitKey+0x9>
mov    $0x0,%al
call   1050 <LeddarKeyPressed@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1165 <WaitKey+0x25>
jmp    1177 <WaitKey+0x37>
movsd  0xe93(%rip),%xmm0
call   1060 <LeddarSleep@plt>
jmp    1149 <WaitKey+0x9>
mov    $0x0,%al
call   1040 <LeddarGetKey@plt>
mov    %eax,%edi
call   1030 <toupper@plt>
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<WaitKey>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1050 <LeddarKeyPressed@plt>
test   %eax,%eax
jne    116a <WaitKey+0x2a>
movsd  0xe9d(%rip),%xmm0
call   1060 <LeddarSleep@plt>
jmp    1150 <WaitKey+0x10>
xor    %eax,%eax
call   1040 <LeddarGetKey@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <toupper@plt>

LLVM IR (-O0):
define signext i8 @WaitKey() {
br label %1
1: ; preds = %5, %0
%2 = call i32 (...) @LeddarKeyPressed()
%3 = icmp ne i32 %2, 0
%4 = xor i1 %3, true
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @LeddarSleep(double 5.000000e-01)
br label %1
7: ; preds = %1
%8 = call i32 (...) @LeddarGetKey()
%9 = call signext i8 @toupper(i32 %8)
ret i8 %9
}

LLVM IR (-O2):
define signext i8 @WaitKey() {
%1 = tail call i32 (...) @LeddarKeyPressed()
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %7
3: ; preds = %0, %3
%4 = tail call i32 @LeddarSleep(double 5.000000e-01)
%5 = tail call i32 (...) @LeddarKeyPressed()
%6 = icmp eq i32 %5, 0
br i1 %6, label %3, label %7
7: ; preds = %3, %0
%8 = tail call i32 (...) @LeddarGetKey()
%9 = tail call signext i8 @toupper(i32 %8)
ret i8 %9
}
int fibonacci(int inputNum) {
  if (inputNum < 3) {
    return 1;
  } else {
    return fibonacci(inputNum - 2) + fibonacci(inputNum - 1);
  }
}


x86 assembly (clang, -O0):
<fibonacci>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x3,-0x8(%rbp)
jge    1131 <fibonacci+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1154 <fibonacci+0x44>
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fibonacci@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fibonacci@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibonacci>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x3,%edi
jl     1145 <fibonacci+0x35>
mov    %edi,%ebx
add    $0x1,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    -0x3(%rbx),%edi
call   1030 <fibonacci@plt>
add    %eax,%ebp
add    $0xffffffff,%ebx
cmp    $0x3,%ebx
ja     1130 <fibonacci+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fibonacci(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 3
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %15
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 2
%10 = call i32 @fibonacci(i32 %9)
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 1
%13 = call i32 @fibonacci(i32 %12)
%14 = add nsw i32 %10, %13
store i32 %14, i32* %2
br label %15
15: ; preds = %7, %6
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @fibonacci(i32 %0) {
%2 = icmp slt i32 %0, 3
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -2
%7 = tail call i32 @fibonacci(i32 %6)
%8 = add nsw i32 %4, -1
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ conversion(int);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *, int *, int *);
void rgb_hexi() {
  int r, g, b;
  scanf("%d,%d,%d", &r, &g, &b);
  printf("#");
  conversion(r);
  conversion(g);
  conversion(b);
}


x86 assembly (clang, -O0):
<rgb_hexi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
lea    -0x4(%rbp),%rsi
lea    -0x8(%rbp),%rdx
lea    -0xc(%rbp),%rcx
call   1040 <scanf@plt>
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%edi
call   1050 <conversion@plt>
mov    -0x8(%rbp),%edi
call   1050 <conversion@plt>
mov    -0xc(%rbp),%edi
call   1050 <conversion@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgb_hexi>:
sub    $0x18,%rsp
lea    0xec5(%rip),%rdi
lea    0x14(%rsp),%rsi
lea    0x10(%rsp),%rdx
lea    0xc(%rsp),%rcx
call   1040 <scanf@plt>
mov    $0x23,%edi
call   1030 <putchar@plt>
mov    0x14(%rsp),%edi
call   1050 <conversion@plt>
mov    0x10(%rsp),%edi
call   1050 <conversion@plt>
mov    0xc(%rsp),%edi
call   1050 <conversion@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [9 x i8] c"%d,%d,%d\00"
@.str.1 = [2 x i8] c"#\00"
define void @rgb_hexi() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = call i32 @scanf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2, i32* %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%6 = load i32, i32* %1
%7 = call i32 @conversion(i32 %6)
%8 = load i32, i32* %2
%9 = call i32 @conversion(i32 %8)
%10 = load i32, i32* %3
%11 = call i32 @conversion(i32 %10)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"%d,%d,%d\00"
define void @rgb_hexi() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = bitcast i32* %1 to i8*
%5 = bitcast i32* %2 to i8*
%6 = bitcast i32* %3 to i8*
%7 = call i32 @scanf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2, i32* %3)
%8 = call i32 @putchar(i32 35)
%9 = load i32, i32* %1
%10 = call i32 @conversion(i32 %9)
%11 = load i32, i32* %2
%12 = call i32 @conversion(i32 %11)
%13 = load i32, i32* %3
%14 = call i32 @conversion(i32 %13)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print(char *);
int /*<<< orphan*/ printd(int);
void mod(int a, int b) {
  printd(a);
  print(" % ");
  printd(b);
  print(" -> ");
  printd(a % b);
  print("\r\n");
}


x86 assembly (clang, -O0):
<mod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <printd@plt>
lea    0xec3(%rip),%rdi
call   1040 <print@plt>
mov    -0x8(%rbp),%edi
call   1030 <printd@plt>
lea    0xeb3(%rip),%rdi
call   1040 <print@plt>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%edi
call   1030 <printd@plt>
lea    0xe9e(%rip),%rdi
call   1040 <print@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <printd@plt>
lea    0xecd(%rip),%rdi
call   1040 <print@plt>
mov    %ebx,%edi
call   1030 <printd@plt>
lea    0xebe(%rip),%rdi
call   1040 <print@plt>
mov    %ebp,%eax
cltd
idiv   %ebx
mov    %edx,%edi
call   1030 <printd@plt>
lea    0xeab(%rip),%rdi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <print@plt>

LLVM IR (-O0):
@.str = [4 x i8] c" % \00"
@.str.1 = [5 x i8] c" -> \00"
@.str.2 = [3 x i8] c"\0D\0A\00"
define void @mod(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @printd(i32 %5)
%7 = call i32 @print(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* %4
%9 = call i32 @printd(i32 %8)
%10 = call i32 @print(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = srem i32 %11, %12
%14 = call i32 @printd(i32 %13)
%15 = call i32 @print(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c" % \00"
@.str.1 = [5 x i8] c" -> \00"
@.str.2 = [3 x i8] c"\0D\0A\00"
define void @mod(i32 %0, i32 %1) {
%3 = tail call i32 @printd(i32 %0)
%4 = tail call i32 @print(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 @printd(i32 %1)
%6 = tail call i32 @print(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%7 = srem i32 %0, %1
%8 = tail call i32 @printd(i32 %7)
%9 = tail call i32 @print(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FatalErrnoError(int, int, char *);
void *realloc(void *, size_t);
void *Erealloc(void *ptr, size_t new_size) {
  void *res = realloc(ptr, new_size);
  FatalErrnoError(res == 0 && new_size != 0, 1, "realloc()");
  return res;
}


x86 assembly (clang, -O0):
<Erealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x18(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x18(%rbp)
mov    %al,-0x19(%rbp)
jne    115c <Erealloc+0x3c>
cmpq   $0x0,-0x10(%rbp)
setne  %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
mov    $0x1,%esi
lea    0xe90(%rip),%rdx
call   1030 <FatalErrnoError@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Erealloc>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
call   1040 <realloc@plt>
mov    %rax,%r14
test   %rax,%rax
sete   %al
test   %rbx,%rbx
setne  %cl
and    %al,%cl
movzbl %cl,%edi
lea    0xeb9(%rip),%rdx
mov    $0x1,%esi
call   1030 <FatalErrnoError@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [10 x i8] c"realloc()\00"
define i8* @Erealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = load i64, i64* %4
%13 = icmp ne i64 %12, 0
br label %14
14: ; preds = %11, %2
%15 = phi i1 [ false, %2 ], [ %13, %11 ]
%16 = zext i1 %15 to i32
%17 = call i32 @FatalErrnoError(i32 %16, i32 1, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%18 = load i8*, i8** %5
ret i8* %18
}

LLVM IR (-O2):
@.str = [10 x i8] c"realloc()\00"
define noalias i8* @Erealloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
%5 = icmp ne i64 %1, 0
%6 = and i1 %5, %4
%7 = zext i1 %6 to i32
%8 = tail call i32 @FatalErrnoError(i32 %7, i32 1, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i8* %3
}
/* Type definitions */
struct UPnPService {
  int dummy;
};
struct UPnPDevice {
  int dummy;
};

/* Variables and functions */
struct UPnPService *RNDGetService(struct UPnPDevice *, char *, int);
struct UPnPService *RNDGetService_ContentDirectory(struct UPnPDevice *device) {
  return (RNDGetService(device,
                        "urn:schemas-upnp-org:service:ContentDirectory:1", 47));
}


x86 assembly (clang, -O0):
<RNDGetService_ContentDirectory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
mov    $0x2f,%edx
call   1030 <RNDGetService@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNDGetService_ContentDirectory>:
lea    0xee9(%rip),%rsi
mov    $0x2f,%edx
jmp    1030 <RNDGetService@plt>

LLVM IR (-O0):
%struct.UPnPService = type { i32 }
%struct.UPnPDevice = type { i32 }
@.str = [48 x i8] c"urn:schemas-upnp-org:service:ContentDirectory:1\00"
define %struct.UPnPService* @RNDGetService_ContentDirectory(%struct.UPnPDevice* %0) {
%2 = alloca %struct.UPnPDevice*
store %struct.UPnPDevice* %0, %struct.UPnPDevice** %2
%3 = load %struct.UPnPDevice*, %struct.UPnPDevice** %2
%4 = call %struct.UPnPService* @RNDGetService(%struct.UPnPDevice* %3, i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), i32 47)
ret %struct.UPnPService* %4
}

LLVM IR (-O2):
%struct.UPnPService = type { i32 }
%struct.UPnPDevice = type { i32 }
@.str = [48 x i8] c"urn:schemas-upnp-org:service:ContentDirectory:1\00"
define %struct.UPnPService* @RNDGetService_ContentDirectory(%struct.UPnPDevice* %0) {
%2 = tail call %struct.UPnPService* @RNDGetService(%struct.UPnPDevice* %0, i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), i32 47)
ret %struct.UPnPService* %2
}
int foo(long long v) {
  switch (v) {
  case 0:
    return 1;
  case -1:
    return 2;
  }
  return 0;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
sub    $0xffffffffffffffff,%rax
je     113d <foo+0x3d>
jmp    111f <foo+0x1f>
mov    -0x18(%rbp),%rax
test   %rax,%rax
jne    1149 <foo+0x49>
jmp    1131 <foo+0x31>
movl   $0x1,-0x4(%rbp)
jmp    1150 <foo+0x50>
movl   $0x2,-0x4(%rbp)
jmp    1150 <foo+0x50>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %ecx,%ecx
cmp    $0xffffffffffffffff,%rdi
sete   %cl
add    %ecx,%ecx
test   %rdi,%rdi
mov    $0x1,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @foo(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
switch i64 %4, label %7 [
i64 0, label %5
i64 -1, label %6
]
5: ; preds = %1
store i32 1, i32* %2
br label %8
6: ; preds = %1
store i32 2, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6, %5
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @foo(i64 %0) {
%2 = icmp eq i64 %0, -1
%3 = select i1 %2, i32 2, i32 0
%4 = icmp eq i64 %0, 0
%5 = select i1 %4, i32 1, i32 %3
ret i32 %5
}
void glPolygonMode(int a, int b) {}


x86 assembly (clang, -O0):
<glPolygonMode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glPolygonMode>:
ret

LLVM IR (-O0):
define void @glPolygonMode(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @glPolygonMode(i32 %0, i32 %1) {
ret void
}
int test_imm_2Bint8_mem(signed char *val) {
  return ((*val) & (-0x2B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_2Bint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xffffffd5,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Bint8_mem>:
testb  $0xd5,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Bint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, -43
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_2Bint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -43
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char const);
int ft_after(const char *format, int printed) {
  ft_putchar(format[0]);
  printed++;
  return (printed);
}


x86 assembly (clang, -O0):
<ft_after>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <ft_putchar@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_after>:
push   %rbx
mov    %esi,%ebx
movsbl (%rdi),%edi
call   1030 <ft_putchar@plt>
add    $0x1,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ft_after(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 0
%7 = load i8, i8* %6
%8 = call i32 @ft_putchar(i8 signext %7)
%9 = load i32, i32* %4
%10 = add nsw i32 %9, 1
store i32 %10, i32* %4
%11 = load i32, i32* %4
ret i32 %11
}

LLVM IR (-O2):
define i32 @ft_after(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = tail call i32 @ft_putchar(i8 signext %3)
%5 = add nsw i32 %1, 1
ret i32 %5
}
void send_character(long character) {
  (*((volatile unsigned long *)0xE0028014)) = 0x01000000;
  (*((volatile unsigned long *)0xE0028014)) = 0x02000000;
  (*((volatile unsigned long *)0xE002801C)) = 0x00FF0000;
  (*((volatile unsigned long *)0xE0028014)) = character << 16;
  (*((volatile unsigned long *)0xE002801C)) = 0x02000000;
}


x86 assembly (clang, -O0):
<send_character>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xe0028014,%eax
movq   $0x1000000,(%rax)
mov    $0xe0028014,%eax
movq   $0x2000000,(%rax)
mov    $0xe002801c,%eax
movq   $0xff0000,(%rax)
mov    -0x8(%rbp),%rcx
shl    $0x10,%rcx
mov    $0xe0028014,%eax
mov    %rcx,(%rax)
mov    $0xe002801c,%eax
movq   $0x2000000,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_character>:
mov    $0xe0028014,%eax
movq   $0x1000000,(%rax)
movq   $0x2000000,(%rax)
movq   $0xff0000,0x8(%rax)
shl    $0x10,%rdi
mov    %rdi,(%rax)
movq   $0x2000000,0x8(%rax)
02
ret

LLVM IR (-O0):
define void @send_character(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
store volatile i64 16777216, i64* inttoptr (i64 3758260244 to i64*)
store volatile i64 33554432, i64* inttoptr (i64 3758260244 to i64*)
store volatile i64 16711680, i64* inttoptr (i64 3758260252 to i64*)
%3 = load i64, i64* %2
%4 = shl i64 %3, 16
store volatile i64 %4, i64* inttoptr (i64 3758260244 to i64*)
store volatile i64 33554432, i64* inttoptr (i64 3758260252 to i64*)
ret void
}

LLVM IR (-O2):
define void @send_character(i64 %0) {
store volatile i64 16777216, i64* inttoptr (i64 3758260244 to i64*)
store volatile i64 33554432, i64* inttoptr (i64 3758260244 to i64*)
store volatile i64 16711680, i64* inttoptr (i64 3758260252 to i64*)
%2 = shl i64 %0, 16
store volatile i64 %2, i64* inttoptr (i64 3758260244 to i64*)
store volatile i64 33554432, i64* inttoptr (i64 3758260252 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0xd5() {
  Assert_real((isalpha(213) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              1070, ("isalpha should be 0 for 0xd5"));
}


x86 assembly (clang, -O0):
<t_isalpha_0xd5>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd5,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x42e,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0xd5>:
push   %rax
mov    $0xd5,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x42e,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xd5\00"
define void @t_isalpha_0xd5() {
%1 = call i64 @isalpha(i32 213)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1070, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xd5\00"
define void @t_isalpha_0xd5() {
%1 = tail call i64 @isalpha(i32 213)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1070, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void adjust_reg_8bit(int *reg) {
  while (*reg < 0) {
    *reg += 0x100;
  }
  while (*reg > 0xFF) {
    *reg -= 0x100;
  }
}


x86 assembly (clang, -O0):
<adjust_reg_8bit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0x0,(%rax)
jge    1128 <adjust_reg_8bit+0x28>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
add    $0x100,%ecx
mov    %ecx,(%rax)
jmp    1108 <adjust_reg_8bit+0x8>
jmp    112d <adjust_reg_8bit+0x2d>
mov    -0x8(%rbp),%rax
cmpl   $0xff,(%rax)
jle    1150 <adjust_reg_8bit+0x50>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
sub    $0x100,%ecx
mov    %ecx,(%rax)
jmp    112d <adjust_reg_8bit+0x2d>
pop    %rbp
ret

x86 assembly (clang, -O2):
<adjust_reg_8bit>:
mov    (%rdi),%eax
test   %eax,%eax
js     110e <adjust_reg_8bit+0xe>
cmp    $0x100,%eax
jge    1139 <adjust_reg_8bit+0x39>
ret
cmp    $0xffffff01,%eax
mov    $0xffffff00,%ecx
cmovge %eax,%ecx
sub    %eax,%ecx
add    $0xff,%ecx
and    $0xffffff00,%ecx
add    %ecx,%eax
add    $0x100,%eax
mov    %eax,(%rdi)
cmp    $0x100,%eax
jl     110d <adjust_reg_8bit+0xd>
cmp    $0x1ff,%eax
mov    $0x1ff,%ecx
cmovl  %eax,%ecx
neg    %ecx
add    %eax,%ecx
add    $0xff,%ecx
and    $0xffffff00,%ecx
neg    %ecx
add    %ecx,%eax
add    $0xffffff00,%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @adjust_reg_8bit(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
br label %3
3: ; preds = %7, %1
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %3
%8 = load i32*, i32** %2
%9 = load i32, i32* %8
%10 = add nsw i32 %9, 256
store i32 %10, i32* %8
br label %3
11: ; preds = %3
br label %12
12: ; preds = %16, %11
%13 = load i32*, i32** %2
%14 = load i32, i32* %13
%15 = icmp sgt i32 %14, 255
br i1 %15, label %16, label %20
16: ; preds = %12
%17 = load i32*, i32** %2
%18 = load i32, i32* %17
%19 = sub nsw i32 %18, 256
store i32 %19, i32* %17
br label %12
20: ; preds = %12
ret void
}

LLVM IR (-O2):
define void @adjust_reg_8bit(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = icmp slt i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = call i32 @llvm.smax.i32(i32 %2, i32 -256)
%6 = add i32 %5, 255
%7 = sub i32 %6, %2
%8 = and i32 %7, -256
%9 = add i32 %2, %8
%10 = add i32 %9, 256
store i32 %10, i32* %0
br label %11
11: ; preds = %4, %1
%12 = phi i32 [ %10, %4 ], [ %2, %1 ]
%13 = icmp sgt i32 %12, 255
br i1 %13, label %14, label %21
14: ; preds = %11
%15 = add nuw i32 %12, 255
%16 = call i32 @llvm.smin.i32(i32 %12, i32 511)
%17 = sub nuw i32 %15, %16
%18 = and i32 %17, -256
%19 = add nsw i32 %12, -256
%20 = sub nsw i32 %19, %18
store i32 %20, i32* %0
br label %21
21: ; preds = %14, %11
ret void
}