#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void SHAMD5ResultRead(uint32_t ui32Base, uint32_t *pui32Dest) {
  uint32_t ui32Idx, ui32Count;
  ASSERT(ui32Base == 0x44034000);
  switch ((*((volatile uint32_t *)(ui32Base + 0x00000044))) & 0x00000007) {
  case 0x00000000: {
    ui32Count = 16;
    break;
  }
  case 0x00000002: {
    ui32Count = 20;
    break;
  }
  case 0x00000004: {
    ui32Count = 28;
    break;
  }
  case 0x00000006: {
    ui32Count = 32;
    break;
  }
  default: {
    return;
  }
  }
  for (ui32Idx = 0; ui32Idx < ui32Count; ui32Idx += 4) {
    *pui32Dest++ = (*((volatile uint32_t *)(ui32Base + 0x00000020 + ui32Idx)));
  }
}


x86 assembly (clang, -O0):
<SHAMD5ResultRead>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x44034000,%eax
sete   %al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x44,%eax
cltq
mov    (%rax),%eax
and    $0x7,%eax
mov    %rax,-0x20(%rbp)
sub    $0x6,%eax
ja     1190 <SHAMD5ResultRead+0x80>
mov    -0x20(%rbp),%rax
lea    0xea9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x10,-0x18(%rbp)
jmp    1195 <SHAMD5ResultRead+0x85>
movl   $0x14,-0x18(%rbp)
jmp    1195 <SHAMD5ResultRead+0x85>
movl   $0x1c,-0x18(%rbp)
jmp    1195 <SHAMD5ResultRead+0x85>
movl   $0x20,-0x18(%rbp)
jmp    1195 <SHAMD5ResultRead+0x85>
jmp    11d4 <SHAMD5ResultRead+0xc4>
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    11d4 <SHAMD5ResultRead+0xc4>
mov    -0x4(%rbp),%eax
add    $0x20,%eax
add    -0x14(%rbp),%eax
cltq
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x10(%rbp)
mov    %ecx,(%rax)
mov    -0x14(%rbp),%eax
add    $0x4,%eax
mov    %eax,-0x14(%rbp)
jmp    119c <SHAMD5ResultRead+0x8c>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAMD5ResultRead>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
xor    %edi,%edi
cmp    $0x44034000,%ebp
sete   %dil
call   1030 <ASSERT@plt>
movslq %ebp,%rax
mov    0x44(%rax),%ecx
and    $0x7,%ecx
cmp    $0x7,%ecx
je     1160 <SHAMD5ResultRead+0x50>
mov    $0x55,%edx
bt     %ecx,%edx
jae    1160 <SHAMD5ResultRead+0x50>
lea    0xeb8(%rip),%rdx
mov    (%rdx,%rcx,8),%rcx
xor    %edx,%edx
xchg   %ax,%ax
mov    0x20(%rdx,%rax,1),%esi
mov    %esi,(%rbx,%rdx,1)
add    $0x4,%rdx
cmp    %rcx,%rdx
jb     1150 <SHAMD5ResultRead+0x40>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @SHAMD5ResultRead(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 1141063680
%9 = zext i1 %8 to i32
%10 = call i32 @ASSERT(i32 %9)
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 68
%13 = sext i32 %12 to i64
%14 = inttoptr i64 %13 to i32*
%15 = load volatile i32, i32* %14
%16 = and i32 %15, 7
switch i32 %16, label %21 [
i32 0, label %17
i32 2, label %18
i32 4, label %19
i32 6, label %20
]
17: ; preds = %2
store i32 16, i32* %6
br label %22
18: ; preds = %2
store i32 20, i32* %6
br label %22
19: ; preds = %2
store i32 28, i32* %6
br label %22
20: ; preds = %2
store i32 32, i32* %6
br label %22
21: ; preds = %2
br label %40
22: ; preds = %20, %19, %18, %17
store i32 0, i32* %5
br label %23
23: ; preds = %37, %22
%24 = load i32, i32* %5
%25 = load i32, i32* %6
%26 = icmp slt i32 %24, %25
br i1 %26, label %27, label %40
27: ; preds = %23
%28 = load i32, i32* %3
%29 = add nsw i32 %28, 32
%30 = load i32, i32* %5
%31 = add nsw i32 %29, %30
%32 = sext i32 %31 to i64
%33 = inttoptr i64 %32 to i32*
%34 = load volatile i32, i32* %33
%35 = load i32*, i32** %4
%36 = getelementptr inbounds i32, i32* %35, i32 1
store i32* %36, i32** %4
store i32 %34, i32* %35
br label %37
37: ; preds = %27
%38 = load i32, i32* %5
%39 = add nsw i32 %38, 4
store i32 %39, i32* %5
br label %23
40: ; preds = %21, %23
ret void
}

LLVM IR (-O2):
@switch.table.SHAMD5ResultRead = [7 x i64] [i64 16, i64 16, i64 20, i64 16, i64 28, i64 16, i64 32]
define void @SHAMD5ResultRead(i32 %0, i32* nocapture writeonly %1) {
%3 = icmp eq i32 %0, 1141063680
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = add nsw i32 %0, 68
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, 7
%11 = icmp eq i32 %10, 7
br i1 %11, label %32, label %12
12: ; preds = %2
%13 = trunc i32 %10 to i8
%14 = lshr i8 85, %13
%15 = and i8 %14, 1
%16 = icmp eq i8 %15, 0
br i1 %16, label %32, label %17
17: ; preds = %12
%18 = zext i32 %10 to i64
%19 = getelementptr inbounds [7 x i64], [7 x i64]* @switch.table.SHAMD5ResultRead, i64 0, i64 %18
%20 = load i64, i64* %19
%21 = add nsw i32 %0, 32
%22 = sext i32 %21 to i64
br label %23
23: ; preds = %17, %23
%24 = phi i64 [ 0, %17 ], [ %30, %23 ]
%25 = phi i32* [ %1, %17 ], [ %29, %23 ]
%26 = add nsw i64 %24, %22
%27 = inttoptr i64 %26 to i32*
%28 = load volatile i32, i32* %27
%29 = getelementptr inbounds i32, i32* %25, i64 1
store i32 %28, i32* %25
%30 = add nuw nsw i64 %24, 4
%31 = icmp ult i64 %30, %20
br i1 %31, label %23, label %32
32: ; preds = %23, %12, %2
ret void
}