#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ gleIntClear();
int /*<<< orphan*/ gleIntLoadCore_1_1_Base();
int /*<<< orphan*/ gleIntLoadCore_1_2_Base();
int /*<<< orphan*/ gleIntLoadCore_1_3_Base();
int /*<<< orphan*/ gleIntLoadCore_1_4_Base();
int /*<<< orphan*/ gleIntLoadCore_1_5_Base();
int /*<<< orphan*/ gleIntLoadCore_2_0_Base();
int /*<<< orphan*/ gleIntLoadCore_2_1_Base();
int /*<<< orphan*/ gleIntLoadCore_3_0_Base();
int /*<<< orphan*/ gleIntLoadCore_3_1_Base();
int /*<<< orphan*/ gleIntLoadCore_3_2_Base();
int /*<<< orphan*/ gleIntLoadCore_3_3_Base();
int /*<<< orphan*/ gleIntLoadCore_4_0_Base();
int gleIntLoad_Version_4_0_Comp() {
  int bIsLoaded = 1;
  gleIntClear();
  if (!gleIntLoadCore_1_1_Base())
    bIsLoaded = 0;
  if (!gleIntLoadCore_1_2_Base())
    bIsLoaded = 0;
  if (!gleIntLoadCore_1_3_Base())
    bIsLoaded = 0;
  if (!gleIntLoadCore_1_4_Base())
    bIsLoaded = 0;
  if (!gleIntLoadCore_1_5_Base())
    bIsLoaded = 0;
  if (!gleIntLoadCore_2_0_Base())
    bIsLoaded = 0;
  if (!gleIntLoadCore_2_1_Base())
    bIsLoaded = 0;
  if (!gleIntLoadCore_3_0_Base())
    bIsLoaded = 0;
  if (!gleIntLoadCore_3_1_Base())
    bIsLoaded = 0;
  if (!gleIntLoadCore_3_2_Base())
    bIsLoaded = 0;
  if (!gleIntLoadCore_3_3_Base())
    bIsLoaded = 0;
  if (!gleIntLoadCore_4_0_Base())
    bIsLoaded = 0;
  return bIsLoaded;
}


x86 assembly (clang, -O0):
<gleIntLoad_Version_4_0_Comp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
mov    $0x0,%al
call   1040 <gleIntClear@plt>
mov    $0x0,%al
call   1050 <gleIntLoadCore_1_1_Base@plt>
cmp    $0x0,%eax
jne    11fd <gleIntLoad_Version_4_0_Comp+0x2d>
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   10d0 <gleIntLoadCore_1_2_Base@plt>
cmp    $0x0,%eax
jne    1214 <gleIntLoad_Version_4_0_Comp+0x44>
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1090 <gleIntLoadCore_1_3_Base@plt>
cmp    $0x0,%eax
jne    122b <gleIntLoad_Version_4_0_Comp+0x5b>
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1070 <gleIntLoadCore_1_4_Base@plt>
cmp    $0x0,%eax
jne    1242 <gleIntLoad_Version_4_0_Comp+0x72>
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1060 <gleIntLoadCore_1_5_Base@plt>
cmp    $0x0,%eax
jne    1259 <gleIntLoad_Version_4_0_Comp+0x89>
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   10f0 <gleIntLoadCore_2_0_Base@plt>
cmp    $0x0,%eax
jne    1270 <gleIntLoad_Version_4_0_Comp+0xa0>
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   10e0 <gleIntLoadCore_2_1_Base@plt>
cmp    $0x0,%eax
jne    1287 <gleIntLoad_Version_4_0_Comp+0xb7>
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   10b0 <gleIntLoadCore_3_0_Base@plt>
cmp    $0x0,%eax
jne    129e <gleIntLoad_Version_4_0_Comp+0xce>
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   10a0 <gleIntLoadCore_3_1_Base@plt>
cmp    $0x0,%eax
jne    12b5 <gleIntLoad_Version_4_0_Comp+0xe5>
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1080 <gleIntLoadCore_3_2_Base@plt>
cmp    $0x0,%eax
jne    12cc <gleIntLoad_Version_4_0_Comp+0xfc>
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <gleIntLoadCore_3_3_Base@plt>
cmp    $0x0,%eax
jne    12e3 <gleIntLoad_Version_4_0_Comp+0x113>
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   10c0 <gleIntLoadCore_4_0_Base@plt>
cmp    $0x0,%eax
jne    12fa <gleIntLoad_Version_4_0_Comp+0x12a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gleIntLoad_Version_4_0_Comp>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
xor    %eax,%eax
call   1040 <gleIntClear@plt>
xor    %eax,%eax
call   1050 <gleIntLoadCore_1_1_Base@plt>
test   %eax,%eax
setne  0x7(%rsp)
xor    %eax,%eax
call   10d0 <gleIntLoadCore_1_2_Base@plt>
test   %eax,%eax
setne  0x6(%rsp)
xor    %eax,%eax
call   1090 <gleIntLoadCore_1_3_Base@plt>
test   %eax,%eax
setne  0x5(%rsp)
xor    %eax,%eax
call   1070 <gleIntLoadCore_1_4_Base@plt>
test   %eax,%eax
setne  0x4(%rsp)
xor    %eax,%eax
call   1060 <gleIntLoadCore_1_5_Base@plt>
test   %eax,%eax
setne  %bl
xor    %eax,%eax
call   10f0 <gleIntLoadCore_2_0_Base@plt>
test   %eax,%eax
setne  0x3(%rsp)
xor    %eax,%eax
call   10e0 <gleIntLoadCore_2_1_Base@plt>
test   %eax,%eax
setne  %r14b
xor    %eax,%eax
call   10b0 <gleIntLoadCore_3_0_Base@plt>
test   %eax,%eax
setne  %bpl
xor    %eax,%eax
call   10a0 <gleIntLoadCore_3_1_Base@plt>
test   %eax,%eax
setne  %r15b
xor    %eax,%eax
call   1080 <gleIntLoadCore_3_2_Base@plt>
test   %eax,%eax
setne  %r12b
xor    %eax,%eax
call   1030 <gleIntLoadCore_3_3_Base@plt>
test   %eax,%eax
setne  %r13b
xor    %eax,%eax
call   10c0 <gleIntLoadCore_4_0_Base@plt>
test   %eax,%eax
setne  %al
and    %r13b,%al
and    %r15b,%r12b
and    %al,%r12b
and    %r14b,%bpl
and    0x3(%rsp),%bpl
and    %r12b,%bpl
and    0x4(%rsp),%bl
and    0x5(%rsp),%bl
and    0x6(%rsp),%bl
and    %bpl,%bl
and    0x7(%rsp),%bl
movzbl %bl,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @gleIntLoad_Version_4_0_Comp() {
%1 = alloca i32
store i32 1, i32* %1
%2 = call i32 (...) @gleIntClear()
%3 = call i32 (...) @gleIntLoadCore_1_1_Base()
%4 = icmp ne i32 %3, 0
br i1 %4, label %6, label %5
5: ; preds = %0
store i32 0, i32* %1
br label %6
6: ; preds = %5, %0
%7 = call i32 (...) @gleIntLoadCore_1_2_Base()
%8 = icmp ne i32 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %6
store i32 0, i32* %1
br label %10
10: ; preds = %9, %6
%11 = call i32 (...) @gleIntLoadCore_1_3_Base()
%12 = icmp ne i32 %11, 0
br i1 %12, label %14, label %13
13: ; preds = %10
store i32 0, i32* %1
br label %14
14: ; preds = %13, %10
%15 = call i32 (...) @gleIntLoadCore_1_4_Base()
%16 = icmp ne i32 %15, 0
br i1 %16, label %18, label %17
17: ; preds = %14
store i32 0, i32* %1
br label %18
18: ; preds = %17, %14
%19 = call i32 (...) @gleIntLoadCore_1_5_Base()
%20 = icmp ne i32 %19, 0
br i1 %20, label %22, label %21
21: ; preds = %18
store i32 0, i32* %1
br label %22
22: ; preds = %21, %18
%23 = call i32 (...) @gleIntLoadCore_2_0_Base()
%24 = icmp ne i32 %23, 0
br i1 %24, label %26, label %25
25: ; preds = %22
store i32 0, i32* %1
br label %26
26: ; preds = %25, %22
%27 = call i32 (...) @gleIntLoadCore_2_1_Base()
%28 = icmp ne i32 %27, 0
br i1 %28, label %30, label %29
29: ; preds = %26
store i32 0, i32* %1
br label %30
30: ; preds = %29, %26
%31 = call i32 (...) @gleIntLoadCore_3_0_Base()
%32 = icmp ne i32 %31, 0
br i1 %32, label %34, label %33
33: ; preds = %30
store i32 0, i32* %1
br label %34
34: ; preds = %33, %30
%35 = call i32 (...) @gleIntLoadCore_3_1_Base()
%36 = icmp ne i32 %35, 0
br i1 %36, label %38, label %37
37: ; preds = %34
store i32 0, i32* %1
br label %38
38: ; preds = %37, %34
%39 = call i32 (...) @gleIntLoadCore_3_2_Base()
%40 = icmp ne i32 %39, 0
br i1 %40, label %42, label %41
41: ; preds = %38
store i32 0, i32* %1
br label %42
42: ; preds = %41, %38
%43 = call i32 (...) @gleIntLoadCore_3_3_Base()
%44 = icmp ne i32 %43, 0
br i1 %44, label %46, label %45
45: ; preds = %42
store i32 0, i32* %1
br label %46
46: ; preds = %45, %42
%47 = call i32 (...) @gleIntLoadCore_4_0_Base()
%48 = icmp ne i32 %47, 0
br i1 %48, label %50, label %49
49: ; preds = %46
store i32 0, i32* %1
br label %50
50: ; preds = %49, %46
%51 = load i32, i32* %1
ret i32 %51
}

LLVM IR (-O2):
define i32 @gleIntLoad_Version_4_0_Comp() {
%1 = tail call i32 (...) @gleIntClear()
%2 = tail call i32 (...) @gleIntLoadCore_1_1_Base()
%3 = icmp ne i32 %2, 0
%4 = tail call i32 (...) @gleIntLoadCore_1_2_Base()
%5 = icmp ne i32 %4, 0
%6 = tail call i32 (...) @gleIntLoadCore_1_3_Base()
%7 = icmp ne i32 %6, 0
%8 = tail call i32 (...) @gleIntLoadCore_1_4_Base()
%9 = icmp ne i32 %8, 0
%10 = tail call i32 (...) @gleIntLoadCore_1_5_Base()
%11 = icmp ne i32 %10, 0
%12 = tail call i32 (...) @gleIntLoadCore_2_0_Base()
%13 = icmp ne i32 %12, 0
%14 = tail call i32 (...) @gleIntLoadCore_2_1_Base()
%15 = icmp ne i32 %14, 0
%16 = tail call i32 (...) @gleIntLoadCore_3_0_Base()
%17 = icmp ne i32 %16, 0
%18 = tail call i32 (...) @gleIntLoadCore_3_1_Base()
%19 = icmp ne i32 %18, 0
%20 = tail call i32 (...) @gleIntLoadCore_3_2_Base()
%21 = icmp ne i32 %20, 0
%22 = tail call i32 (...) @gleIntLoadCore_3_3_Base()
%23 = icmp ne i32 %22, 0
%24 = tail call i32 (...) @gleIntLoadCore_4_0_Base()
%25 = icmp ne i32 %24, 0
%26 = select i1 %25, i1 %23, i1 false
%27 = select i1 %26, i1 %21, i1 false
%28 = select i1 %27, i1 %19, i1 false
%29 = select i1 %28, i1 %17, i1 false
%30 = select i1 %29, i1 %15, i1 false
%31 = select i1 %30, i1 %13, i1 false
%32 = select i1 %31, i1 %11, i1 false
%33 = select i1 %32, i1 %9, i1 false
%34 = select i1 %33, i1 %7, i1 false
%35 = select i1 %34, i1 %5, i1 false
%36 = select i1 %35, i1 %3, i1 false
%37 = zext i1 %36 to i32
ret i32 %37
}