xunge/DecIR huggingface dataset:
/* Variables and functions */
int mult(int, int);
int pot(int zahl, int potenz) {
  if (potenz == 0) {
    return 1;
  } else {
    int tmp = 1;
    for (potenz; potenz > 0; potenz--) {
      tmp = mult(tmp, zahl);
    }
    return tmp;
  }
}


x86 assembly (clang, -O0):
<pot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1134 <pot+0x24>
movl   $0x1,-0x4(%rbp)
jmp    1167 <pot+0x57>
movl   $0x1,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    1161 <pot+0x51>
mov    -0x10(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <mult@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    113b <pot+0x2b>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pot>:
push   %rbp
push   %rbx
push   %rax
test   %esi,%esi
jle    1143 <pot+0x33>
mov    %esi,%ebx
mov    %edi,%ebp
add    $0x1,%ebx
mov    $0x1,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %eax,%edi
mov    %ebp,%esi
call   1030 <mult@plt>
add    $0xffffffff,%ebx
cmp    $0x1,%ebx
ja     1130 <pot+0x20>
jmp    1148 <pot+0x38>
mov    $0x1,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @pot(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, i32* %3
br label %24
10: ; preds = %2
store i32 1, i32* %6
%11 = load i32, i32* %5
br label %12
12: ; preds = %19, %10
%13 = load i32, i32* %5
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %22
15: ; preds = %12
%16 = load i32, i32* %6
%17 = load i32, i32* %4
%18 = call i32 @mult(i32 %16, i32 %17)
store i32 %18, i32* %6
br label %19
19: ; preds = %15
%20 = load i32, i32* %5
%21 = add nsw i32 %20, -1
store i32 %21, i32* %5
br label %12
22: ; preds = %12
%23 = load i32, i32* %6
store i32 %23, i32* %3
br label %24
24: ; preds = %22, %9
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @pot(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %10
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ 1, %2 ]
%6 = phi i32 [ %8, %4 ], [ %1, %2 ]
%7 = tail call i32 @mult(i32 %5, i32 %0)
%8 = add nsw i32 %6, -1
%9 = icmp ugt i32 %6, 1
br i1 %9, label %4, label %10
10: ; preds = %4, %2
%11 = phi i32 [ 1, %2 ], [ %7, %4 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ err_quit(char *, char const *, int const);
void *do_nofail(void *ptr, const char *file, const int line) {
  if (ptr)
    return ptr;
  err_quit("Memory allocation failure at %s:%d.", file, line);
}


x86 assembly (clang, -O0):
<do_nofail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     113b <do_nofail+0x2b>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    114e <do_nofail+0x3e>
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
lea    0xeb7(%rip),%rdi
call   1030 <err_quit@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_nofail>:
push   %rbx
mov    %rdi,%rbx
test   %rdi,%rdi
jne    1125 <do_nofail+0x15>
lea    0xee0(%rip),%rdi
call   1030 <err_quit@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [36 x i8] c"Memory allocation failure at %s:%d.\00"
define i8* @do_nofail(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%8 = load i8*, i8** %5
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load i8*, i8** %5
store i8* %11, i8** %4
br label %16
12: ; preds = %3
%13 = load i8*, i8** %6
%14 = load i32, i32* %7
%15 = call i32 @err_quit(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i8* %13, i32 %14)
br label %16
16: ; preds = %12, %10
%17 = load i8*, i8** %4
ret i8* %17
}

LLVM IR (-O2):
@.str = [36 x i8] c"Memory allocation failure at %s:%d.\00"
define i8* @do_nofail(i8* readnone returned %0, i8* %1, i32 %2) {
%4 = icmp eq i8* %0, null
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 @err_quit(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i8* %1, i32 %2)
br label %7
7: ; preds = %3, %5
ret i8* %0
}
int FindElement(int *arr, int lo, int hi) {}


x86 assembly (clang, -O0):
<FindElement>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FindElement>:
ret

LLVM IR (-O0):
define i32 @FindElement(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %4
ret i32 %8
}

LLVM IR (-O2):
define i32 @FindElement(i32* nocapture readnone %0, i32 %1, i32 %2) {
ret i32 undef
}
/* Variables and functions */
scalar_t__ isLittleEndian();
long little2bigl(long);
long little2hostl(long num) {
  if (isLittleEndian())
    return num;
  return little2bigl(num);
}


x86 assembly (clang, -O0):
<little2hostl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <isLittleEndian@plt>
cmp    $0x0,%rax
je     114a <little2hostl+0x2a>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1157 <little2hostl+0x37>
mov    -0x10(%rbp),%rdi
call   1030 <little2bigl@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<little2hostl>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <isLittleEndian@plt>
test   %rax,%rax
je     1135 <little2hostl+0x15>
mov    %rbx,%rax
pop    %rbx
ret
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <little2bigl@plt>

LLVM IR (-O0):
define i64 @little2hostl(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = call i64 (...) @isLittleEndian()
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i64, i64* %3
store i64 %7, i64* %2
br label %11
8: ; preds = %1
%9 = load i64, i64* %3
%10 = call i64 @little2bigl(i64 %9)
store i64 %10, i64* %2
br label %11
11: ; preds = %8, %6
%12 = load i64, i64* %2
ret i64 %12
}

LLVM IR (-O2):
define i64 @little2hostl(i64 %0) {
%2 = tail call i64 (...) @isLittleEndian()
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i64 @little2bigl(i64 %0)
br label %6
6: ; preds = %1, %4
%7 = phi i64 [ %5, %4 ], [ %0, %1 ]
ret i64 %7
}
/* Variables and functions */
scalar_t__ is_hex(char const);
char *skip_hex(const char *s, int sz) {
  while (sz > 0 && is_hex(*s)) {
    s++;
    sz--;
  }
  return (char *)s;
}


x86 assembly (clang, -O0):
<skip_hex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0xc(%rbp)
mov    %al,-0xd(%rbp)
jle    1144 <skip_hex+0x34>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <is_hex@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1154 <skip_hex+0x44>
jmp    116e <skip_hex+0x5e>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    111f <skip_hex+0xf>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_hex>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
test   %esi,%esi
jle    1139 <skip_hex+0x29>
mov    %esi,%ebp
add    $0x1,%ebp
nop
movsbl (%rbx),%edi
call   1030 <is_hex@plt>
test   %rax,%rax
je     1139 <skip_hex+0x29>
add    $0x1,%rbx
add    $0xffffffff,%ebp
cmp    $0x1,%ebp
jg     1120 <skip_hex+0x10>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @skip_hex(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %15, %2
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %5
%9 = load i8*, i8** %3
%10 = load i8, i8* %9
%11 = call i64 @is_hex(i8 signext %10)
%12 = icmp ne i64 %11, 0
br label %13
13: ; preds = %8, %5
%14 = phi i1 [ false, %5 ], [ %12, %8 ]
br i1 %14, label %15, label %20
15: ; preds = %13
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %3
%18 = load i32, i32* %4
%19 = add nsw i32 %18, -1
store i32 %19, i32* %4
br label %5
20: ; preds = %13
%21 = load i8*, i8** %3
ret i8* %21
}

LLVM IR (-O2):
define i8* @skip_hex(i8* %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %14
4: ; preds = %2, %10
%5 = phi i32 [ %12, %10 ], [ %1, %2 ]
%6 = phi i8* [ %11, %10 ], [ %0, %2 ]
%7 = load i8, i8* %6
%8 = tail call i64 @is_hex(i8 signext %7)
%9 = icmp eq i64 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %4
%11 = getelementptr inbounds i8, i8* %6, i64 1
%12 = add nsw i32 %5, -1
%13 = icmp sgt i32 %5, 1
br i1 %13, label %4, label %14
14: ; preds = %4, %10, %2
%15 = phi i8* [ %0, %2 ], [ %11, %10 ], [ %6, %4 ]
ret i8* %15
}
/* Variables and functions */
int /*<<< orphan*/ run_server(int);
int start_server();
int main() {
  int srv_socket = start_server();
  run_server(srv_socket);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <start_server@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <run_server@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <start_server@plt>
mov    %eax,%edi
call   1030 <run_server@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @start_server()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @run_server(i32 %4)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @start_server()
%2 = tail call i32 @run_server(i32 %1)
ret i32 0
}
void mt_trace_ISR_end(int id) {}


x86 assembly (clang, -O0):
<mt_trace_ISR_end>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mt_trace_ISR_end>:
ret

LLVM IR (-O0):
define void @mt_trace_ISR_end(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @mt_trace_ISR_end(i32 %0) {
ret void
}
_Complex float test_casinhf(_Complex float x) { return __builtin_casinhf(x); }


x86 assembly (clang, -O0):
<test_casinhf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movlpd %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
movss  %xmm1,-0x18(%rbp)
movss  %xmm0,-0x14(%rbp)
movsd  -0x18(%rbp),%xmm0
call   1030 <casinhf@plt>
movlpd %xmm0,-0x20(%rbp)
movss  -0x20(%rbp),%xmm1
movss  -0x1c(%rbp),%xmm0
movss  %xmm1,-0x8(%rbp)
movss  %xmm0,-0x4(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_casinhf>:
jmp    1030 <casinhf@plt>

LLVM IR (-O0):
define <2 x float> @test_casinhf(<2 x float> %0) {
%2 = alloca { float, float }
%3 = alloca { float, float }
%4 = alloca { float, float }
%5 = alloca { float, float }
%6 = bitcast { float, float }* %3 to <2 x float>*
store <2 x float> %0, <2 x float>* %6
%7 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 0
%8 = load float, float* %7
%9 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 1
%10 = load float, float* %9
%11 = getelementptr inbounds { float, float }, { float, float }* %4, i32 0, i32 0
%12 = getelementptr inbounds { float, float }, { float, float }* %4, i32 0, i32 1
store float %8, float* %11
store float %10, float* %12
%13 = bitcast { float, float }* %4 to <2 x float>*
%14 = load <2 x float>, <2 x float>* %13
%15 = call <2 x float> @casinhf(<2 x float> %14)
%16 = bitcast { float, float }* %5 to <2 x float>*
store <2 x float> %15, <2 x float>* %16
%17 = getelementptr inbounds { float, float }, { float, float }* %5, i32 0, i32 0
%18 = load float, float* %17
%19 = getelementptr inbounds { float, float }, { float, float }* %5, i32 0, i32 1
%20 = load float, float* %19
%21 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 0
%22 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 1
store float %18, float* %21
store float %20, float* %22
%23 = bitcast { float, float }* %2 to <2 x float>*
%24 = load <2 x float>, <2 x float>* %23
ret <2 x float> %24
}

LLVM IR (-O2):
define <2 x float> @test_casinhf(<2 x float> %0) {
%2 = tail call <2 x float> @casinhf(<2 x float> %0)
ret <2 x float> %2
}
/* Variables and functions */
int /*<<< orphan*/ max_size_uint();
void main() { max_size_uint(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <max_size_uint@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <max_size_uint@plt>

LLVM IR (-O0):
define void @main() {
%1 = call i32 (...) @max_size_uint()
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 (...) @max_size_uint()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _hmt_register_covercase(char *, char *);
void _hmt_covercase_HMM_MultiplyQuaternion_init(void) {
  _hmt_register_covercase("HMM_MultiplyQuaternion", "1");
}


x86 assembly (clang, -O0):
<_hmt_covercase_HMM_MultiplyQuaternion_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xef5(%rip),%rsi
call   1030 <_hmt_register_covercase@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_hmt_covercase_HMM_MultiplyQuaternion_init>:
lea    0xee9(%rip),%rdi
lea    0xef9(%rip),%rsi
jmp    1030 <_hmt_register_covercase@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"HMM_MultiplyQuaternion\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_MultiplyQuaternion_init() {
%1 = call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c"HMM_MultiplyQuaternion\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_MultiplyQuaternion_init() {
%1 = tail call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ volatile uint8_t;

/* Variables and functions */
uint8_t mmio_read_8(uintptr_t addr) { return *(volatile uint8_t *)addr; }


x86 assembly (clang, -O0):
<mmio_read_8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmio_read_8>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @mmio_read_8(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @mmio_read_8(i64 %0) {
%2 = inttoptr i64 %0 to i32*
%3 = load volatile i32, i32* %2
ret i32 %3
}
int h(int i) { return i < (i + (-2)); }


x86 assembly (clang, -O0):
<h>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
add    $0xfffffffe,%ecx
cmp    %ecx,%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<h>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @h(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = add nsw i32 %4, -2
%6 = icmp slt i32 %3, %5
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @h(i32 %0) {
ret i32 0
}
int ft_isalpha(int c) {
  if ((c >= 'A' && c <= 'Z') || (c >= 'a' && c <= 'z'))
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<ft_isalpha>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x41,-0x8(%rbp)
jl     111b <ft_isalpha+0x1b>
cmpl   $0x5a,-0x8(%rbp)
jle    112f <ft_isalpha+0x2f>
cmpl   $0x61,-0x8(%rbp)
jl     113b <ft_isalpha+0x3b>
cmpl   $0x7a,-0x8(%rbp)
jg     113b <ft_isalpha+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    1142 <ft_isalpha+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isalpha>:
and    $0xffffffdf,%edi
add    $0xffffffbf,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @ft_isalpha(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 65
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 90
br i1 %8, label %15, label %9
9: ; preds = %6, %1
%10 = load i32, i32* %3
%11 = icmp sge i32 %10, 97
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = load i32, i32* %3
%14 = icmp sle i32 %13, 122
br i1 %14, label %15, label %16
15: ; preds = %12, %6
store i32 1, i32* %2
br label %17
16: ; preds = %12, %9
store i32 0, i32* %2
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @ft_isalpha(i32 %0) {
%2 = and i32 %0, -33
%3 = add i32 %2, -65
%4 = icmp ult i32 %3, 26
%5 = zext i1 %4 to i32
ret i32 %5
}
void QEIDisable(unsigned long ulBase) {
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000000))) &= ~(0x00000001);
}


x86 assembly (clang, -O0):
<QEIDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
and    $0xfffffffffffffffe,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<QEIDisable>:
andq   $0xfffffffffffffffe,(%rdi)
ret

LLVM IR (-O0):
define void @QEIDisable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 0
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, -2
store volatile i64 %7, i64* %5
ret void
}

LLVM IR (-O2):
define void @QEIDisable(i64 %0) {
%2 = inttoptr i64 %0 to i64*
%3 = load volatile i64, i64* %2
%4 = and i64 %3, -2
store volatile i64 %4, i64* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ g();
void f(int b) {
  for (int i = 0; i < b; i + b)
    g();
  for (int i = 0; i < b; b)
    g();
  for (int i = 0; i < b; !i)
    g();
  for (!b;;)
    g();
  for (;; b * 2)
    g();
  ({
    b / 5;
    b ^ 5;
  });
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    113a <f+0x2a>
mov    $0x0,%al
call   1030 <g@plt>
jmp    1122 <f+0x12>
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1159 <f+0x49>
mov    $0x0,%al
call   1030 <g@plt>
jmp    1141 <f+0x31>
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1178 <f+0x68>
mov    $0x0,%al
call   1030 <g@plt>
jmp    1160 <f+0x50>
mov    $0x0,%al
call   1030 <g@plt>
jmp    1178 <f+0x68>

x86 assembly (clang, -O2):
<f>:
push   %rax
test   %edi,%edi
jle    1130 <f+0x20>
xor    %eax,%eax
call   1030 <g@plt>
nopl   0x0(%rax)
xor    %eax,%eax
call   1030 <g@plt>
jmp    1120 <f+0x10>
nopl   0x0(%rax)
xor    %eax,%eax
call   1030 <g@plt>
jmp    1130 <f+0x20>

LLVM IR (-O0):
define void @f(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %6
6: ; preds = %12, %1
%7 = load i32, i32* %3
%8 = load i32, i32* %2
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = call i32 (...) @g()
br label %12
12: ; preds = %10
%13 = load i32, i32* %3
%14 = load i32, i32* %2
%15 = add nsw i32 %13, %14
br label %6
16: ; preds = %6
store i32 0, i32* %4
br label %17
17: ; preds = %23, %16
%18 = load i32, i32* %4
%19 = load i32, i32* %2
%20 = icmp slt i32 %18, %19
br i1 %20, label %21, label %25
21: ; preds = %17
%22 = call i32 (...) @g()
br label %23
23: ; preds = %21
%24 = load i32, i32* %2
br label %17
25: ; preds = %17
store i32 0, i32* %5
br label %26
26: ; preds = %32, %25
%27 = load i32, i32* %5
%28 = load i32, i32* %2
%29 = icmp slt i32 %27, %28
br i1 %29, label %30, label %37
30: ; preds = %26
%31 = call i32 (...) @g()
br label %32
32: ; preds = %30
%33 = load i32, i32* %5
%34 = icmp ne i32 %33, 0
%35 = xor i1 %34, true
%36 = zext i1 %35 to i32
br label %26
37: ; preds = %26
%38 = load i32, i32* %2
%39 = icmp ne i32 %38, 0
%40 = xor i1 %39, true
%41 = zext i1 %40 to i32
br label %42
42: ; preds = %42, %37
%43 = call i32 (...) @g()
br label %42
}

LLVM IR (-O2):
define void @f(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = tail call i32 (...) @g()
br label %5
5: ; preds = %5, %3
%6 = tail call i32 (...) @g()
br label %5
7: ; preds = %1, %7
%8 = tail call i32 (...) @g()
br label %7
}
/* Variables and functions */
int S_ISFIFO(unsigned int);
int s_ififo(unsigned int m) { return S_ISFIFO(m); }


x86 assembly (clang, -O0):
<s_ififo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <S_ISFIFO@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_ififo>:
jmp    1030 <S_ISFIFO@plt>

LLVM IR (-O0):
define i32 @s_ififo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @S_ISFIFO(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @s_ififo(i32 %0) {
%2 = tail call i32 @S_ISFIFO(i32 %0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ little_endian_read_16(int /*<<< orphan*/ const *, int);
uint16_t l2cap_event_connection_parameter_update_request_get_timeout_multiplier(
    const uint8_t *event) {
  return little_endian_read_16(event, 10);
}


x86 assembly (clang, -O0):
<l2cap_event_connection_parameter_update_request_get_timeout_multiplier>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xa,%esi
call   1030 <little_endian_read_16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<l2cap_event_connection_parameter_update_request_get_timeout_multiplier>:
mov    $0xa,%esi
jmp    1030 <little_endian_read_16@plt>

LLVM IR (-O0):
define i32 @l2cap_event_connection_parameter_update_request_get_timeout_multiplier(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @little_endian_read_16(i32* %3, i32 10)
ret i32 %4
}

LLVM IR (-O2):
define i32 @l2cap_event_connection_parameter_update_request_get_timeout_multiplier(i32* %0) {
%2 = tail call i32 @little_endian_read_16(i32* %0, i32 10)
ret i32 %2
}
void avformat_get_riff_audio_tags() {}


x86 assembly (clang, -O0):
<avformat_get_riff_audio_tags>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avformat_get_riff_audio_tags>:
ret

LLVM IR (-O0):
define void @avformat_get_riff_audio_tags() {
ret void
}

LLVM IR (-O2):
define void @avformat_get_riff_audio_tags() {
ret void
}
/* Variables and functions */
int strncmp(char const *, char const *, int);
int strcmp(const char *s1, const char *s2) {
  return strncmp(s1, s2, 0x7fffffff);
}


x86 assembly (clang, -O0):
<strcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x7fffffff,%edx
call   1030 <strncmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp>:
mov    $0x7fffffff,%edx
jmp    1030 <strncmp@plt>

LLVM IR (-O0):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strncmp(i8* %5, i8* %6, i32 2147483647)
ret i32 %7
}

LLVM IR (-O2):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = tail call i32 @strncmp(i8* %0, i8* %1, i32 2147483647)
ret i32 %3
}
void ioctl_eject(void) {}


x86 assembly (clang, -O0):
<ioctl_eject>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ioctl_eject>:
ret

LLVM IR (-O0):
define void @ioctl_eject() {
ret void
}

LLVM IR (-O2):
define void @ioctl_eject() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cu_handle_message(int);
void cu_success_assertation(void) { cu_handle_message(1); }


x86 assembly (clang, -O0):
<cu_success_assertation>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <cu_handle_message@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cu_success_assertation>:
mov    $0x1,%edi
jmp    1030 <cu_handle_message@plt>

LLVM IR (-O0):
define void @cu_success_assertation() {
%1 = call i32 @cu_handle_message(i32 1)
ret void
}

LLVM IR (-O2):
define void @cu_success_assertation() {
%1 = tail call i32 @cu_handle_message(i32 1)
ret void
}
void FF_PendSemaphore(void *pSemaphore) {}


x86 assembly (clang, -O0):
<FF_PendSemaphore>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<FF_PendSemaphore>:
ret

LLVM IR (-O0):
define void @FF_PendSemaphore(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @FF_PendSemaphore(i8* nocapture %0) {
ret void
}
/* Variables and functions */
scalar_t__ getchar();
int /*<<< orphan*/ printf(char *);
char getch() {
  char c = (char)getchar();
  if (c != 8)
    printf("\b \b");
  else
    printf(" ");
  return c;
}


x86 assembly (clang, -O0):
<getch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x8,%eax
je     1150 <getch+0x30>
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
jmp    115c <getch+0x3c>
lea    0xead(%rip),%rdi
call   1030 <printf@plt>
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getch>:
push   %rbx
xor    %eax,%eax
call   1050 <getchar@plt>
mov    %rax,%rbx
cmp    $0x8,%bl
jne    114c <getch+0x1c>
mov    $0x20,%edi
call   1030 <putchar@plt>
jmp    1158 <getch+0x28>
lea    0xead(%rip),%rdi
call   1040 <printf@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"\08 \08\00"
@.str.1 = [2 x i8] c" \00"
define signext i8 @getch() {
%1 = alloca i8
%2 = call i64 (...) @getchar()
%3 = trunc i64 %2 to i8
store i8 %3, i8* %1
%4 = load i8, i8* %1
%5 = sext i8 %4 to i32
%6 = icmp ne i32 %5, 8
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
br label %11
9: ; preds = %0
%10 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
br label %11
11: ; preds = %9, %7
%12 = load i8, i8* %1
ret i8 %12
}

LLVM IR (-O2):
@.str = [4 x i8] c"\08 \08\00"
define signext i8 @getch() {
%1 = tail call i64 (...) @getchar()
%2 = trunc i64 %1 to i8
%3 = icmp eq i8 %2, 8
br i1 %3, label %6, label %4
4: ; preds = %0
%5 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
br label %8
6: ; preds = %0
%7 = tail call i32 @putchar(i32 32)
br label %8
8: ; preds = %6, %4
ret i8 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ SEEK_SET;
int check_remainder(int /*<<< orphan*/ *);
scalar_t__ fseek(int /*<<< orphan*/ *, int /*<<< orphan*/, int /*<<< orphan*/);
int isprg(FILE *infile) {
  if (fseek(infile, 0, SEEK_SET) != 0)
    return 0;
  return check_remainder(infile);
}


x86 assembly (clang, -O0):
<isprg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    0x2ea9(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
call   1040 <fseek@plt>
cmp    $0x0,%rax
je     1156 <isprg+0x36>
movl   $0x0,-0x4(%rbp)
jmp    1162 <isprg+0x42>
mov    -0x10(%rbp),%rdi
call   1030 <check_remainder@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isprg>:
push   %rbx
mov    %rdi,%rbx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
call   1040 <fseek@plt>
test   %rax,%rax
je     113d <isprg+0x1d>
xor    %eax,%eax
pop    %rbx
ret
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <check_remainder@plt>

LLVM IR (-O0):
@SEEK_SET = global i32 0
define i32 @isprg(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = load i32, i32* @SEEK_SET
%6 = call i64 @fseek(i32* %4, i32 0, i32 %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %12
9: ; preds = %1
%10 = load i32*, i32** %3
%11 = call i32 @check_remainder(i32* %10)
store i32 %11, i32* %2
br label %12
12: ; preds = %9, %8
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@SEEK_SET = global i32 0
define i32 @isprg(i32* %0) {
%2 = load i32, i32* @SEEK_SET
%3 = tail call i64 @fseek(i32* %0, i32 0, i32 %2)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @check_remainder(i32* %0)
br label %7
7: ; preds = %1, %5
%8 = phi i32 [ %6, %5 ], [ 0, %1 ]
ret i32 %8
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t nvm_kv_round_upto_blk(uint64_t value, uint64_t blk_size) {
  return ((value + (blk_size - 1)) & ~(blk_size - 1));
}


x86 assembly (clang, -O0):
<nvm_kv_round_upto_blk>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
add    %ecx,%eax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nvm_kv_round_upto_blk>:
lea    (%rdi,%rsi,1),%eax
add    $0xffffffff,%eax
neg    %esi
and    %esi,%eax
ret

LLVM IR (-O0):
define i32 @nvm_kv_round_upto_blk(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = add nsw i32 %5, %7
%9 = load i32, i32* %4
%10 = sub nsw i32 %9, 1
%11 = xor i32 %10, -1
%12 = and i32 %8, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @nvm_kv_round_upto_blk(i32 %0, i32 %1) {
%3 = add i32 %0, -1
%4 = add i32 %3, %1
%5 = sub i32 0, %1
%6 = and i32 %4, %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ SIGPIPE;
int /*<<< orphan*/ SIG_IGN;
int /*<<< orphan*/ signal(int /*<<< orphan*/, int /*<<< orphan*/);
void setupSignals() { signal(SIGPIPE, SIG_IGN); }


x86 assembly (clang, -O0):
<setupSignals>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    0x2ec4(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<setupSignals>:
mov    0x2ec1(%rip),%rax
mov    (%rax),%edi
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
jmp    1030 <signal@plt>

LLVM IR (-O0):
@SIGPIPE = global i32 0
@SIG_IGN = global i32 0
define void @setupSignals() {
%1 = load i32, i32* @SIGPIPE
%2 = load i32, i32* @SIG_IGN
%3 = call i32 @signal(i32 %1, i32 %2)
ret void
}

LLVM IR (-O2):
@SIGPIPE = global i32 0
@SIG_IGN = global i32 0
define void @setupSignals() {
%1 = load i32, i32* @SIGPIPE
%2 = load i32, i32* @SIG_IGN
%3 = tail call i32 @signal(i32 %1, i32 %2)
ret void
}
/* Variables and functions */
char EOF;
char getchar();
int /*<<< orphan*/ printf(char *, char);
main() {
  char c;
  while ((c = getchar()) != EOF) {
    if (c != 10)
      printf("%d\n", c);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %al,-0x5(%rbp)
movsbl %al,%eax
mov    0x2ea5(%rip),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
je     1170 <main+0x50>
movsbl -0x5(%rbp),%eax
cmp    $0xa,%eax
je     116b <main+0x4b>
lea    0xe9e(%rip),%rdi
movsbl -0x5(%rbp),%esi
call   1030 <printf@plt>
jmp    112f <main+0xf>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %eax,%eax
call   1040 <getchar@plt>
mov    0x2eb6(%rip),%rbx
cmp    (%rbx),%al
jne    1140 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
lea    0xeb9(%rip),%r14
jmp    115b <main+0x3b>
nopl   0x0(%rax)
xor    %eax,%eax
call   1040 <getchar@plt>
cmp    (%rbx),%al
je     1136 <main+0x16>
cmp    $0xa,%al
je     1150 <main+0x30>
movsbl %al,%esi
mov    %r14,%rdi
call   1030 <printf@plt>
jmp    1150 <main+0x30>

LLVM IR (-O0):
@EOF = global i8 0
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
br label %3
3: ; preds = %16, %0
%4 = call signext i8 (...) @getchar()
store i8 %4, i8* %2
%5 = sext i8 %4 to i32
%6 = load i8, i8* @EOF
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %5, %7
br i1 %8, label %9, label %17
9: ; preds = %3
%10 = load i8, i8* %2
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 10
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = load i8, i8* %2
%15 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 signext %14)
br label %16
16: ; preds = %13, %9
br label %3
17: ; preds = %3
%18 = load i32, i32* %1
ret i32 %18
}

LLVM IR (-O2):
@EOF = global i8 0
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call signext i8 (...) @getchar()
%2 = load i8, i8* @EOF
%3 = icmp eq i8 %1, %2
br i1 %3, label %13, label %4
4: ; preds = %0, %9
%5 = phi i8 [ %10, %9 ], [ %1, %0 ]
%6 = icmp eq i8 %5, 10
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 signext %5)
br label %9
9: ; preds = %7, %4
%10 = tail call signext i8 (...) @getchar()
%11 = load i8, i8* @EOF
%12 = icmp eq i8 %10, %11
br i1 %12, label %13, label %4
13: ; preds = %9, %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int rod_cutting(int *);
int main() {
  int prices[] = {10, 52, 84, 93, 101, 17, 117, 20};
  printf("%d\n", rod_cutting(prices));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xec4(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xec1(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    -0x30(%rbp),%rdi
call   1030 <rod_cutting@plt>
mov    %eax,%esi
lea    0xeb3(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
movaps 0xee5(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xec9(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
call   1030 <rod_cutting@plt>
lea    0xed6(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.main.prices = [8 x i32] [i32 10, i32 52, i32 84, i32 93, i32 101, i32 17, i32 117, i32 20]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [8 x i32]
store i32 0, i32* %1
%3 = bitcast [8 x i32]* %2 to i8*
%4 = getelementptr inbounds [8 x i32], [8 x i32]* %2, i64 0, i64 0
%5 = call i32 @rod_cutting(i32* %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@__const.main.prices = [8 x i32] [i32 10, i32 52, i32 84, i32 93, i32 101, i32 17, i32 117, i32 20]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca [8 x i32]
%2 = bitcast [8 x i32]* %1 to i8*
%3 = getelementptr inbounds [8 x i32], [8 x i32]* %1, i64 0, i64 0
%4 = call i32 @rod_cutting(i32* %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}
void ff_hevc_put_hevc_epel_h16_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_epel_h16_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_epel_h16_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_epel_h16_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_epel_h16_8_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ NOROM_IntRegister(int, void (*)());
void SysTickIntRegister(void (*pfnHandler)(void)) {
  NOROM_IntRegister(15, pfnHandler);
  (*((volatile unsigned long *)(0xE000E010))) |= 0x00000002;
}


x86 assembly (clang, -O0):
<SysTickIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0xf,%edi
call   1030 <NOROM_IntRegister@plt>
mov    $0xe000e010,%eax
mov    (%rax),%rcx
or     $0x2,%rcx
mov    $0xe000e010,%eax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysTickIntRegister>:
push   %rax
mov    %rdi,%rsi
mov    $0xf,%edi
call   1030 <NOROM_IntRegister@plt>
mov    $0xe000e010,%eax
orq    $0x2,(%rax)
pop    %rax
ret

LLVM IR (-O0):
define void @SysTickIntRegister(void ()* %0) {
%2 = alloca void ()*
store void ()* %0, void ()** %2
%3 = load void ()*, void ()** %2
%4 = bitcast void ()* %3 to void (...)*
%5 = call i32 @NOROM_IntRegister(i32 15, void (...)* %4)
%6 = load volatile i64, i64* inttoptr (i64 3758153744 to i64*)
%7 = or i64 %6, 2
store volatile i64 %7, i64* inttoptr (i64 3758153744 to i64*)
ret void
}

LLVM IR (-O2):
define void @SysTickIntRegister(void ()* %0) {
%2 = bitcast void ()* %0 to void (...)*
%3 = tail call i32 @NOROM_IntRegister(i32 15, void (...)* %2)
%4 = load volatile i64, i64* inttoptr (i64 3758153744 to i64*)
%5 = or i64 %4, 2
store volatile i64 %5, i64* inttoptr (i64 3758153744 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
__attribute__((constructor)) void before_main() { printf("before main\n"); }


x86 assembly (clang, -O0):
<before_main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<before_main>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"before main\0A\00"
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @before_main, i8* null }]
define void @before_main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @before_main, i8* null }]
@str = [12 x i8] c"before main\00"
define void @before_main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void PWMFaultIntClearExt(uint32_t ui32Base, uint32_t ui32FaultInts) {
  ASSERT((ui32Base == 0x40028000) || (ui32Base == 0x40029000));
  ASSERT((ui32FaultInts &
          ~(0x00010000 | 0x00020000 | 0x00040000 | 0x00080000)) == 0);
  (*((volatile uint32_t *)(ui32Base + 0x0000001C))) = ui32FaultInts;
}


x86 assembly (clang, -O0):
<PWMFaultIntClearExt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x1,%al
cmpl   $0x40028000,-0x4(%rbp)
mov    %al,-0x9(%rbp)
je     113d <PWMFaultIntClearExt+0x2d>
cmpl   $0x40029000,-0x4(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%eax
and    $0xfff0ffff,%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x1c,%eax
cltq
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMFaultIntClearExt>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %edi,%eax
and    $0xffffefff,%eax
xor    %edi,%edi
cmp    $0x40028000,%eax
sete   %dil
call   1030 <ASSERT@plt>
xor    %edi,%edi
test   $0xfff0ffff,%ebx
sete   %dil
call   1030 <ASSERT@plt>
movslq %ebp,%rax
mov    %ebx,0x1c(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @PWMFaultIntClearExt(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1073905664
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 1073909760
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ true, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
%13 = call i32 @ASSERT(i32 %12)
%14 = load i32, i32* %4
%15 = and i32 %14, -983041
%16 = icmp eq i32 %15, 0
%17 = zext i1 %16 to i32
%18 = call i32 @ASSERT(i32 %17)
%19 = load i32, i32* %4
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 28
%22 = sext i32 %21 to i64
%23 = inttoptr i64 %22 to i32*
store volatile i32 %19, i32* %23
ret void
}

LLVM IR (-O2):
define void @PWMFaultIntClearExt(i32 %0, i32 %1) {
%3 = and i32 %0, -4097
%4 = icmp eq i32 %3, 1073905664
%5 = zext i1 %4 to i32
%6 = tail call i32 @ASSERT(i32 %5)
%7 = and i32 %1, -983041
%8 = icmp eq i32 %7, 0
%9 = zext i1 %8 to i32
%10 = tail call i32 @ASSERT(i32 %9)
%11 = add nsw i32 %0, 28
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i32*
store volatile i32 %1, i32* %13
ret void
}
/* Variables and functions */
float acosf(float);
float intr_wrap_000(float p1) { return acosf(p1); }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <acosf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
jmp    1030 <acosf@plt>

LLVM IR (-O0):
define float @intr_wrap_000(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @acosf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @intr_wrap_000(float %0) {
%2 = tail call float @acosf(float %0)
ret float %2
}
void display_process(void) {}


x86 assembly (clang, -O0):
<display_process>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_process>:
ret

LLVM IR (-O0):
define void @display_process() {
ret void
}

LLVM IR (-O2):
define void @display_process() {
ret void
}
void DEBUGF(char *strFormat, ...) {}


x86 assembly (clang, -O0):
<DEBUGF>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<DEBUGF>:
ret

LLVM IR (-O0):
define void @DEBUGF(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @DEBUGF(i8* nocapture %0, ...) {
ret void
}
void get_discrete_bounds(long long *lowp, long long *highp) {
  *lowp = 0;
  *highp = 2;
}


x86 assembly (clang, -O0):
<get_discrete_bounds>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
mov    -0x10(%rbp),%rax
movq   $0x2,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_discrete_bounds>:
movq   $0x0,(%rdi)
movq   $0x2,(%rsi)
ret

LLVM IR (-O0):
define void @get_discrete_bounds(i64* %0, i64* %1) {
%3 = alloca i64*
%4 = alloca i64*
store i64* %0, i64** %3
store i64* %1, i64** %4
%5 = load i64*, i64** %3
store i64 0, i64* %5
%6 = load i64*, i64** %4
store i64 2, i64* %6
ret void
}

LLVM IR (-O2):
define void @get_discrete_bounds(i64* nocapture writeonly %0, i64* nocapture writeonly %1) {
store i64 0, i64* %0
store i64 2, i64* %1
ret void
}
void foo_2_1_2_2_2_1_1_2_1() {}


x86 assembly (clang, -O0):
<foo_2_1_2_2_2_1_1_2_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_1_2_2_2_1_1_2_1>:
ret

LLVM IR (-O0):
define void @foo_2_1_2_2_2_1_1_2_1() {
ret void
}

LLVM IR (-O2):
define void @foo_2_1_2_2_2_1_1_2_1() {
ret void
}
/* Variables and functions */
__attribute__((visibility("default"))) void *sd_bus_track_unref(void *track) {
  return NULL;
}


x86 assembly (clang, -O0):
<sd_bus_track_unref>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_track_unref>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @sd_bus_track_unref(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @sd_bus_track_unref(i8* nocapture readnone %0) {
ret i8* null
}
/* Type definitions */
struct vec4 {
  int dummy;
};

/* Variables and functions */
float sqrtf(float);
float vec4_dot(struct vec4 const *, struct vec4 const *);
float vec4_len(const struct vec4 *v) {
  float dot_val = vec4_dot(v, v);
  return (dot_val > 0.0f) ? sqrtf(dot_val) : 0.0f;
}


x86 assembly (clang, -O0):
<vec4_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <vec4_dot@plt>
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jbe    1163 <vec4_len+0x43>
movss  -0xc(%rbp),%xmm0
call   1030 <sqrtf@plt>
movss  %xmm0,-0x10(%rbp)
jmp    1170 <vec4_len+0x50>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x10(%rbp)
jmp    1170 <vec4_len+0x50>
movss  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec4_len>:
push   %rax
mov    %rdi,%rsi
call   1040 <vec4_dot@plt>
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jbe    1140 <vec4_len+0x20>
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     1145 <vec4_len+0x25>
xorps  %xmm1,%xmm1
sqrtss %xmm0,%xmm1
movaps %xmm1,%xmm0
pop    %rax
ret
pop    %rax
jmp    1030 <sqrtf@plt>

LLVM IR (-O0):
%struct.vec4 = type { i32 }
define float @vec4_len(%struct.vec4* %0) {
%2 = alloca %struct.vec4*
%3 = alloca float
store %struct.vec4* %0, %struct.vec4** %2
%4 = load %struct.vec4*, %struct.vec4** %2
%5 = load %struct.vec4*, %struct.vec4** %2
%6 = call float @vec4_dot(%struct.vec4* %4, %struct.vec4* %5)
store float %6, float* %3
%7 = load float, float* %3
%8 = fcmp ogt float %7, 0.000000e+00
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load float, float* %3
%11 = call float @sqrtf(float %10)
br label %13
12: ; preds = %1
br label %13
13: ; preds = %12, %9
%14 = phi float [ %11, %9 ], [ 0.000000e+00, %12 ]
ret float %14
}

LLVM IR (-O2):
%struct.vec4 = type { i32 }
define float @vec4_len(%struct.vec4* %0) {
%2 = tail call float @vec4_dot(%struct.vec4* %0, %struct.vec4* %0)
%3 = fcmp ogt float %2, 0.000000e+00
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call float @sqrtf(float %2)
br label %6
6: ; preds = %1, %4
%7 = phi float [ %5, %4 ], [ 0.000000e+00, %1 ]
ret float %7
}
void pretty(double *x1, double *x2) {}


x86 assembly (clang, -O0):
<pretty>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pretty>:
ret

LLVM IR (-O0):
define void @pretty(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
ret void
}

LLVM IR (-O2):
define void @pretty(double* nocapture %0, double* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
main() {
  int s;
  int *u = &s;
  s = 8;
  scanf("%d", u);
  printf("%d\n", *u);
  printf("%p\n", u);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
movl   $0x8,-0x4(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xebe(%rip),%rdi
call   1040 <scanf@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
lea    0xeaf(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%rsi
lea    0xea1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movl   $0x8,0xc(%rsp)
lea    0xecc(%rip),%rdi
lea    0xc(%rsp),%rbx
mov    %rbx,%rsi
call   1040 <scanf@plt>
mov    0xc(%rsp),%esi
lea    0xeb7(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xead(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
@.str.2 = [4 x i8] c"%p\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32* %1, i32** %2
store i32 8, i32* %1
%3 = load i32*, i32** %2
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %3)
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %6)
%8 = load i32*, i32** %2
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32* %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
@.str.2 = [4 x i8] c"%p\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 8, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %4)
%6 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32* %1)
ret i32 0
}