xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
int EDOM;
int safe_read(int, void *, size_t);
ssize_t safe_read_exact(int fd, void *buf, size_t count) {
  int ret = safe_read(fd, buf, count);
  if (ret < 0)
    return ret;
  if ((size_t)ret != count)
    return -EDOM;
  return 0;
}


x86 assembly (clang, -O0):
<safe_read_exact>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <safe_read@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jge    114b <safe_read_exact+0x3b>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1173 <safe_read_exact+0x63>
movslq -0x1c(%rbp),%rax
cmp    -0x18(%rbp),%rax
je     116c <safe_read_exact+0x5c>
xor    %eax,%eax
mov    0x2e86(%rip),%rcx
sub    (%rcx),%eax
mov    %eax,-0x4(%rbp)
jmp    1173 <safe_read_exact+0x63>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_read_exact>:
push   %rbx
mov    %rdx,%rbx
call   1030 <safe_read@plt>
test   %eax,%eax
js     1131 <safe_read_exact+0x21>
mov    %eax,%ecx
xor    %eax,%eax
cmp    %rbx,%rcx
je     1131 <safe_read_exact+0x21>
mov    0x2ebb(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
pop    %rbx
ret

LLVM IR (-O0):
@EDOM = global i32 0
define i32 @safe_read_exact(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i64 %2, i64* %7
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %7
%12 = call i32 @safe_read(i32 %9, i8* %10, i64 %11)
store i32 %12, i32* %8
%13 = load i32, i32* %8
%14 = icmp slt i32 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %3
%16 = load i32, i32* %8
store i32 %16, i32* %4
br label %26
17: ; preds = %3
%18 = load i32, i32* %8
%19 = sext i32 %18 to i64
%20 = load i64, i64* %7
%21 = icmp ne i64 %19, %20
br i1 %21, label %22, label %25
22: ; preds = %17
%23 = load i32, i32* @EDOM
%24 = sub nsw i32 0, %23
store i32 %24, i32* %4
br label %26
25: ; preds = %17
store i32 0, i32* %4
br label %26
26: ; preds = %25, %22, %15
%27 = load i32, i32* %4
ret i32 %27
}

LLVM IR (-O2):
@EDOM = global i32 0
define i32 @safe_read_exact(i32 %0, i8* %1, i64 %2) {
%4 = tail call i32 @safe_read(i32 %0, i8* %1, i64 %2)
%5 = icmp slt i32 %4, 0
br i1 %5, label %12, label %6
6: ; preds = %3
%7 = zext i32 %4 to i64
%8 = icmp eq i64 %7, %2
br i1 %8, label %12, label %9
9: ; preds = %6
%10 = load i32, i32* @EDOM
%11 = sub nsw i32 0, %10
br label %12
12: ; preds = %6, %3, %9
%13 = phi i32 [ %11, %9 ], [ %4, %3 ], [ 0, %6 ]
ret i32 %13
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int32_t;

/* Variables and functions */
u_int32_t store_swp_fake32(u_int32_t v) { return v; }


x86 assembly (clang, -O0):
<store_swp_fake32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<store_swp_fake32>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @store_swp_fake32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @store_swp_fake32(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
scalar_t__ atexit(void (*)());
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
void gt_xatexit(void (*function)(void)) {
  if (atexit(function)) {
    perror("cannot register exit function");
    exit(EXIT_FAILURE);
  }
}


x86 assembly (clang, -O0):
<gt_xatexit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1170 <atexit>
cmp    $0x0,%rax
je     1169 <gt_xatexit+0x39>
lea    0xeaa(%rip),%rdi
call   1030 <perror@plt>
mov    0x2e7e(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret
nop

x86 assembly (clang, -O2):
<gt_xatexit>:
push   %rax
call   1160 <atexit>
test   %rax,%rax
jne    113d <gt_xatexit+0xd>
pop    %rax
ret
lea    0xebc(%rip),%rdi
call   1030 <perror@plt>
mov    0x2e90(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
nopw   0x0(%rax,%rax,1)

LLVM IR (-O0):
@.str = [30 x i8] c"cannot register exit function\00"
@EXIT_FAILURE = global i32 0
define void @gt_xatexit(void ()* %0) {
%2 = alloca void ()*
store void ()* %0, void ()** %2
%3 = load void ()*, void ()** %2
%4 = bitcast void ()* %3 to void (...)*
%5 = call i64 @atexit(void (...)* %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = call i32 @perror(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%9 = load i32, i32* @EXIT_FAILURE
%10 = call i32 @exit(i32 %9)
unreachable
11: ; preds = %1
ret void
}

LLVM IR (-O2):
@.str = [30 x i8] c"cannot register exit function\00"
@EXIT_FAILURE = global i32 0
define void @gt_xatexit(void ()* %0) {
%2 = bitcast void ()* %0 to void (...)*
%3 = tail call i64 @atexit(void (...)* %2)
%4 = icmp eq i64 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = tail call i32 @perror(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%7 = load i32, i32* @EXIT_FAILURE
%8 = tail call i32 @exit(i32 %7)
unreachable
9: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void sub_fun_2() {
  printf("sub_fun_2_1\n");
  ;
  printf("sub_fun_2_2\n");
}


x86 assembly (clang, -O0):
<sub_fun_2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xee6(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub_fun_2>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xee8(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"sub_fun_2_1\0A\00"
@.str.1 = [13 x i8] c"sub_fun_2_2\0A\00"
define void @sub_fun_2() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [12 x i8] c"sub_fun_2_1\00"
@str.2 = [12 x i8] c"sub_fun_2_2\00"
define void @sub_fun_2() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int simple_link_send(long, void const *, long, long, int /*<<< orphan*/ *,
                     int /*<<< orphan*/, int);
int send(long sd, const void *buf, long len, long flags) {
  return (simple_link_send(sd, buf, len, flags, NULL, 0, (0x01 + 0x80)));
}


x86 assembly (clang, -O0):
<send>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
xor    %eax,%eax
mov    %eax,%r8d
xor    %r9d,%r9d
movl   $0x81,(%rsp)
call   1030 <simple_link_send@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send>:
push   %rax
movl   $0x81,(%rsp)
xor    %r8d,%r8d
xor    %r9d,%r9d
call   1030 <simple_link_send@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @send(i64 %0, i8* %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %7
%12 = load i64, i64* %8
%13 = call i32 @simple_link_send(i64 %9, i8* %10, i64 %11, i64 %12, i32* null, i32 0, i32 129)
ret i32 %13
}

LLVM IR (-O2):
define i32 @send(i64 %0, i8* %1, i64 %2, i64 %3) {
%5 = tail call i32 @simple_link_send(i64 %0, i8* %1, i64 %2, i64 %3, i32* null, i32 0, i32 129)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ arm_memio_ldr(int /*<<< orphan*/);
int /*<<< orphan*/ t16_memio_imm8sp_op();
void t16_ldr_sp8() { arm_memio_ldr(t16_memio_imm8sp_op()); }


x86 assembly (clang, -O0):
<t16_ldr_sp8>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <t16_memio_imm8sp_op@plt>
mov    %eax,%edi
call   1030 <arm_memio_ldr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t16_ldr_sp8>:
push   %rax
xor    %eax,%eax
call   1040 <t16_memio_imm8sp_op@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <arm_memio_ldr@plt>

LLVM IR (-O0):
define void @t16_ldr_sp8() {
%1 = call i32 (...) @t16_memio_imm8sp_op()
%2 = call i32 @arm_memio_ldr(i32 %1)
ret void
}

LLVM IR (-O2):
define void @t16_ldr_sp8() {
%1 = tail call i32 (...) @t16_memio_imm8sp_op()
%2 = tail call i32 @arm_memio_ldr(i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, char const *, size_t);
size_t strlen(char const *);
size_t uint32_pack(size_t, int /*<<< orphan*/ *);
size_t string_pack(const char *str, uint8_t *out) {
  size_t len = strlen(str);
  size_t rv = uint32_pack(len, out);
  memcpy(out + rv, str, len);
  return rv + len;
}


x86 assembly (clang, -O0):
<string_pack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <uint32_pack@plt>
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rdi
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x20(%rbp),%rax
add    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_pack>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rsi,%r15
mov    %rdi,%r14
call   1030 <strlen@plt>
mov    %rax,%r12
mov    %rax,%rdi
mov    %r15,%rsi
call   1050 <uint32_pack@plt>
mov    %rax,%rbx
lea    (%r15,%rax,4),%rdi
mov    %r14,%rsi
mov    %r12,%rdx
call   1040 <memcpy@plt>
add    %r12,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @string_pack(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %3
store i32* %1, i32** %4
%7 = load i8*, i8** %3
%8 = call i64 @strlen(i8* %7)
store i64 %8, i64* %5
%9 = load i64, i64* %5
%10 = load i32*, i32** %4
%11 = call i64 @uint32_pack(i64 %9, i32* %10)
store i64 %11, i64* %6
%12 = load i32*, i32** %4
%13 = load i64, i64* %6
%14 = getelementptr inbounds i32, i32* %12, i64 %13
%15 = load i8*, i8** %3
%16 = load i64, i64* %5
%17 = call i32 @memcpy(i32* %14, i8* %15, i64 %16)
%18 = load i64, i64* %6
%19 = load i64, i64* %5
%20 = add i64 %18, %19
ret i64 %20
}

LLVM IR (-O2):
define i64 @string_pack(i8* %0, i32* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = tail call i64 @uint32_pack(i64 %3, i32* %1)
%5 = getelementptr inbounds i32, i32* %1, i64 %4
%6 = tail call i32 @memcpy(i32* %5, i8* %0, i64 %3)
%7 = add i64 %4, %3
ret i64 %7
}
/* Type definitions */
struct crypt_options {
  int dummy;
};

/* Variables and functions */
int crypt_create_and_update_device(struct crypt_options *, int /*<<< orphan*/);
int crypt_create_device(struct crypt_options *options) {
  return crypt_create_and_update_device(options, 0);
}


x86 assembly (clang, -O0):
<crypt_create_device>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <crypt_create_and_update_device@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crypt_create_device>:
xor    %esi,%esi
jmp    1030 <crypt_create_and_update_device@plt>

LLVM IR (-O0):
%struct.crypt_options = type { i32 }
define i32 @crypt_create_device(%struct.crypt_options* %0) {
%2 = alloca %struct.crypt_options*
store %struct.crypt_options* %0, %struct.crypt_options** %2
%3 = load %struct.crypt_options*, %struct.crypt_options** %2
%4 = call i32 @crypt_create_and_update_device(%struct.crypt_options* %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
%struct.crypt_options = type { i32 }
define i32 @crypt_create_device(%struct.crypt_options* %0) {
%2 = tail call i32 @crypt_create_and_update_device(%struct.crypt_options* %0, i32 0)
ret i32 %2
}
I0A1(r0, r1, x0, x1, p0, p1) unsigned short r0, r1;
unsigned short *p0, *p1;
{
  if (22 <= (*((unsigned short *)11111111)))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<I0A1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    $0xa98ac7,%eax
movzwl (%rax),%ecx
mov    $0x16,%eax
cmp    %ecx,%eax
jg     1140 <I0A1+0x40>
movl   $0x1,-0x4(%rbp)
jmp    1147 <I0A1+0x47>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<I0A1>:
xor    %eax,%eax
cmpw   $0x16,0xa98ac7
setae  %al
ret

LLVM IR (-O0):
define i32 @I0A1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16, i16* inttoptr (i64 11111111 to i16*)
%17 = zext i16 %16 to i32
%18 = icmp sle i32 22, %17
br i1 %18, label %19, label %20
19: ; preds = %6
store i32 1, i32* %7
br label %21
20: ; preds = %6
store i32 0, i32* %7
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %7
ret i32 %22
}

LLVM IR (-O2):
define i32 @I0A1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture readnone %5) {
%7 = load i16, i16* inttoptr (i64 11111111 to i16*)
%8 = icmp ugt i16 %7, 21
%9 = zext i1 %8 to i32
ret i32 %9
}
f(int i) { return 3 + i; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    0x3(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 3, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = add nsw i32 %0, 3
ret i32 %2
}
/* Variables and functions */
int read_fsr();
int check_rdismb() { return (read_fsr() & (1 << 2)) ? 1 : 0; }


x86 assembly (clang, -O0):
<check_rdismb>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <read_fsr@plt>
mov    %eax,%edx
and    $0x4,%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_rdismb>:
push   %rax
xor    %eax,%eax
call   1030 <read_fsr@plt>
shr    $0x2,%eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @check_rdismb() {
%1 = call i32 (...) @read_fsr()
%2 = and i32 %1, 4
%3 = icmp ne i32 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 1, i32 0
ret i32 %5
}

LLVM IR (-O2):
define i32 @check_rdismb() {
%1 = tail call i32 (...) @read_fsr()
%2 = lshr i32 %1, 2
%3 = and i32 %2, 1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ R_OK;
int /*<<< orphan*/ access(char *, int /*<<< orphan*/);
int apm_exists() {
  if (!access("/proc/apm", R_OK))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<apm_exists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec1(%rip),%rax
mov    (%rax),%esi
lea    0xed8(%rip),%rdi
call   1030 <access@plt>
cmp    $0x0,%eax
jne    1142 <apm_exists+0x32>
movl   $0x1,-0x4(%rbp)
jmp    1149 <apm_exists+0x39>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<apm_exists>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
lea    0xedf(%rip),%rdi
call   1030 <access@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"/proc/apm\00"
@R_OK = global i32 0
define i32 @apm_exists() {
%1 = alloca i32
%2 = load i32, i32* @R_OK
%3 = call i32 @access(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = icmp ne i32 %3, 0
br i1 %4, label %6, label %5
5: ; preds = %0
store i32 1, i32* %1
br label %7
6: ; preds = %0
store i32 0, i32* %1
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
@.str = [10 x i8] c"/proc/apm\00"
@R_OK = global i32 0
define i32 @apm_exists() {
%1 = load i32, i32* @R_OK
%2 = tail call i32 @access(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n;
  printf("Enter a number: ");
  scanf("%d", &n);
  printf("%d is your number", n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xecd(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%esi
lea    0xebd(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xedb(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%esi
lea    0xec9(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Enter a number: \00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [18 x i8] c"%d is your number\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.2, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [17 x i8] c"Enter a number: \00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [18 x i8] c"%d is your number\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str.2, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Variables and functions */
int SEGGER_RTT_Write(unsigned int, char const *, int);
int _strlen(char const *);
int SEGGER_RTT_WriteString(unsigned BufferIndex, const char *s) {
  int Len;
  Len = _strlen(s);
  return SEGGER_RTT_Write(BufferIndex, s, Len);
}


x86 assembly (clang, -O0):
<SEGGER_RTT_WriteString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <_strlen@plt>
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <SEGGER_RTT_Write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SEGGER_RTT_WriteString>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1030 <_strlen@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <SEGGER_RTT_Write@plt>

LLVM IR (-O0):
define i32 @SEGGER_RTT_WriteString(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = call i32 @_strlen(i8* %6)
store i32 %7, i32* %5
%8 = load i32, i32* %3
%9 = load i8*, i8** %4
%10 = load i32, i32* %5
%11 = call i32 @SEGGER_RTT_Write(i32 %8, i8* %9, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @SEGGER_RTT_WriteString(i32 %0, i8* %1) {
%3 = tail call i32 @_strlen(i8* %1)
%4 = tail call i32 @SEGGER_RTT_Write(i32 %0, i8* %1, i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ assume(int);
int main() {
  int x;
  int y;
  assume(y > 0 || x > 0);
  while (x + y <= -2) {
    if (x > 0)
      x++;
    else
      y++;
  }
  assert(x > 0 || y > 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x0,-0xc(%rbp)
mov    %al,-0xd(%rbp)
jg     1148 <main+0x28>
cmpl   $0x0,-0x8(%rbp)
setg   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assume@plt>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
cmp    $0xfffffffe,%eax
jg     118a <main+0x6a>
cmpl   $0x0,-0x8(%rbp)
jle    117c <main+0x5c>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1185 <main+0x65>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1155 <main+0x35>
mov    $0x1,%al
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0xe(%rbp)
jg     11a3 <main+0x83>
cmpl   $0x0,-0xc(%rbp)
setg   %al
mov    %al,-0xe(%rbp)
mov    -0xe(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <assume@plt>
xor    %edi,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %0
%7 = load i32, i32* %2
%8 = icmp sgt i32 %7, 0
br label %9
9: ; preds = %6, %0
%10 = phi i1 [ true, %0 ], [ %8, %6 ]
%11 = zext i1 %10 to i32
%12 = call i32 @assume(i32 %11)
br label %13
13: ; preds = %27, %9
%14 = load i32, i32* %2
%15 = load i32, i32* %3
%16 = add nsw i32 %14, %15
%17 = icmp sle i32 %16, -2
br i1 %17, label %18, label %28
18: ; preds = %13
%19 = load i32, i32* %2
%20 = icmp sgt i32 %19, 0
br i1 %20, label %21, label %24
21: ; preds = %18
%22 = load i32, i32* %2
%23 = add nsw i32 %22, 1
store i32 %23, i32* %2
br label %27
24: ; preds = %18
%25 = load i32, i32* %3
%26 = add nsw i32 %25, 1
store i32 %26, i32* %3
br label %27
27: ; preds = %24, %21
br label %13
28: ; preds = %13
%29 = load i32, i32* %2
%30 = icmp sgt i32 %29, 0
br i1 %30, label %34, label %31
31: ; preds = %28
%32 = load i32, i32* %3
%33 = icmp sgt i32 %32, 0
br label %34
34: ; preds = %31, %28
%35 = phi i1 [ true, %28 ], [ %33, %31 ]
%36 = zext i1 %35 to i32
%37 = call i32 @assert(i32 %36)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assume(i32 0)
%2 = tail call i32 @assert(i32 0)
ret i32 0
}
/* Type definitions */
typedef char const server;
typedef char const channel;

/* Variables and functions */
int /*<<< orphan*/ UNUSED(char const *);
int irc_send_message(struct server *s, struct channel *c, const char *m) {
  UNUSED(s);
  UNUSED(c);
  UNUSED(m);
  return 0;
}


x86 assembly (clang, -O0):
<irc_send_message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <UNUSED@plt>
mov    -0x10(%rbp),%rdi
call   1030 <UNUSED@plt>
mov    -0x18(%rbp),%rdi
call   1030 <UNUSED@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irc_send_message>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%rbx
call   1030 <UNUSED@plt>
mov    %rbx,%rdi
call   1030 <UNUSED@plt>
mov    %r14,%rdi
call   1030 <UNUSED@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.server = type opaque
%struct.channel = type opaque
define i32 @irc_send_message(%struct.server* %0, %struct.channel* %1, i8* %2) {
%4 = alloca %struct.server*
%5 = alloca %struct.channel*
%6 = alloca i8*
store %struct.server* %0, %struct.server** %4
store %struct.channel* %1, %struct.channel** %5
store i8* %2, i8** %6
%7 = load %struct.server*, %struct.server** %4
%8 = bitcast %struct.server* %7 to i8*
%9 = call i32 @UNUSED(i8* %8)
%10 = load %struct.channel*, %struct.channel** %5
%11 = bitcast %struct.channel* %10 to i8*
%12 = call i32 @UNUSED(i8* %11)
%13 = load i8*, i8** %6
%14 = call i32 @UNUSED(i8* %13)
ret i32 0
}

LLVM IR (-O2):
%struct.server = type opaque
%struct.channel = type opaque
define i32 @irc_send_message(%struct.server* %0, %struct.channel* %1, i8* %2) {
%4 = bitcast %struct.server* %0 to i8*
%5 = tail call i32 @UNUSED(i8* %4)
%6 = bitcast %struct.channel* %1 to i8*
%7 = tail call i32 @UNUSED(i8* %6)
%8 = tail call i32 @UNUSED(i8* %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ alu_instruction_test();
int main(void) {
  alu_instruction_test();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <alu_instruction_test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <alu_instruction_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @alu_instruction_test()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @alu_instruction_test()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void labelElse(int number) { printf("\tjmp .L%dE\n.L%dA:\n", number, number); }


x86 assembly (clang, -O0):
<labelElse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x4(%rbp),%edx
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<labelElse>:
mov    %edi,%edx
lea    0xee7(%rip),%rdi
mov    %edx,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"\09jmp .L%dE\0A.L%dA:\0A\00"
define void @labelElse(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %4)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"\09jmp .L%dE\0A.L%dA:\0A\00"
define void @labelElse(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int hello() {
  printf("** This is libfoo **\n");
  return 0xe110;
}


x86 assembly (clang, -O0):
<hello>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
mov    $0xe110,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hello>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0xe110,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"** This is libfoo **\0A\00"
define i32 @hello() {
%1 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret i32 57616
}

LLVM IR (-O2):
@str = [21 x i8] c"** This is libfoo **\00"
define i32 @hello() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
ret i32 57616
}
void g_byte_array_set_size() {}


x86 assembly (clang, -O0):
<g_byte_array_set_size>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_byte_array_set_size>:
ret

LLVM IR (-O0):
define void @g_byte_array_set_size() {
ret void
}

LLVM IR (-O2):
define void @g_byte_array_set_size() {
ret void
}
int is_ccm_mode(int keytype) { return ((keytype == 7) || (keytype == 8)); }


x86 assembly (clang, -O0):
<is_ccm_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x7,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1120 <is_ccm_mode+0x20>
cmpl   $0x8,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_ccm_mode>:
add    $0xfffffff9,%edi
xor    %eax,%eax
cmp    $0x2,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @is_ccm_mode(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 7
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 8
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @is_ccm_mode(i32 %0) {
%2 = add i32 %0, -7
%3 = icmp ult i32 %2, 2
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int raid_cpu_match_sse(int, int /*<<< orphan*/);
int raid_cpu_has_crc32(void) { return raid_cpu_match_sse(1 << 20, 0); }


x86 assembly (clang, -O0):
<raid_cpu_has_crc32>:
push   %rbp
mov    %rsp,%rbp
mov    $0x100000,%edi
xor    %esi,%esi
call   1030 <raid_cpu_match_sse@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<raid_cpu_has_crc32>:
mov    $0x100000,%edi
xor    %esi,%esi
jmp    1030 <raid_cpu_match_sse@plt>

LLVM IR (-O0):
define i32 @raid_cpu_has_crc32() {
%1 = call i32 @raid_cpu_match_sse(i32 1048576, i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @raid_cpu_has_crc32() {
%1 = tail call i32 @raid_cpu_match_sse(i32 1048576, i32 0)
ret i32 %1
}
int test_imm_78int8_reg(signed char val) {
  return ((val) & (-0x78 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_78int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff88,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_78int8_reg>:
test   $0x88,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_78int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -120
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_78int8_reg(i8 signext %0) {
%2 = and i8 %0, -120
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
int get_int32_be(const uint8_t *buffer) {
  uint32_t n;
  n = (buffer[0] << 24) | (buffer[1] << 16) | (buffer[2] << 8) | buffer[3];
  return n;
}


x86 assembly (clang, -O0):
<get_int32_be>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
mov    0x4(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
or     0xc(%rcx),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_int32_be>:
mov    (%rdi),%eax
mov    0x4(%rdi),%ecx
shl    $0x18,%eax
shl    $0x10,%ecx
or     %eax,%ecx
mov    0x8(%rdi),%eax
shl    $0x8,%eax
or     %ecx,%eax
or     0xc(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @get_int32_be(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = getelementptr inbounds i32, i32* %4, i64 0
%6 = load i32, i32* %5
%7 = shl i32 %6, 24
%8 = load i32*, i32** %2
%9 = getelementptr inbounds i32, i32* %8, i64 1
%10 = load i32, i32* %9
%11 = shl i32 %10, 16
%12 = or i32 %7, %11
%13 = load i32*, i32** %2
%14 = getelementptr inbounds i32, i32* %13, i64 2
%15 = load i32, i32* %14
%16 = shl i32 %15, 8
%17 = or i32 %12, %16
%18 = load i32*, i32** %2
%19 = getelementptr inbounds i32, i32* %18, i64 3
%20 = load i32, i32* %19
%21 = or i32 %17, %20
store i32 %21, i32* %3
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @get_int32_be(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 24
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = shl i32 %5, 16
%7 = or i32 %6, %3
%8 = getelementptr inbounds i32, i32* %0, i64 2
%9 = load i32, i32* %8
%10 = shl i32 %9, 8
%11 = or i32 %7, %10
%12 = getelementptr inbounds i32, i32* %0, i64 3
%13 = load i32, i32* %12
%14 = or i32 %11, %13
ret i32 %14
}
int rshifts(int val, unsigned int cnt) {
  if (val < 0 || cnt >= sizeof(int) * 8)
    return val;
  return val >> cnt;
}


x86 assembly (clang, -O0):
<rshifts>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     1121 <rshifts+0x21>
mov    -0xc(%rbp),%eax
cmp    $0x20,%rax
jb     112c <rshifts+0x2c>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1137 <rshifts+0x37>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rshifts>:
xor    %ecx,%ecx
cmp    $0x20,%esi
cmovae %ecx,%esi
mov    %edi,%eax
test   %edi,%edi
cmovns %esi,%ecx
sar    %cl,%eax
ret

LLVM IR (-O0):
define i32 @rshifts(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %2
%9 = load i32, i32* %5
%10 = zext i32 %9 to i64
%11 = icmp uge i64 %10, 32
br i1 %11, label %12, label %14
12: ; preds = %8, %2
%13 = load i32, i32* %4
store i32 %13, i32* %3
br label %18
14: ; preds = %8
%15 = load i32, i32* %4
%16 = load i32, i32* %5
%17 = ashr i32 %15, %16
store i32 %17, i32* %3
br label %18
18: ; preds = %14, %12
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @rshifts(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, 0
%4 = icmp ugt i32 %1, 31
%5 = or i1 %3, %4
%6 = select i1 %5, i32 0, i32 %1
%7 = ashr i32 %0, %6
ret i32 %7
}
int fun525() { return 525; }


x86 assembly (clang, -O0):
<fun525>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20d,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun525>:
mov    $0x20d,%eax
ret

LLVM IR (-O0):
define i32 @fun525() {
ret i32 525
}

LLVM IR (-O2):
define i32 @fun525() {
ret i32 525
}
int wraped_next(int ix, int sz) {
  ++ix;
  if (ix == sz) {
    return 0;
  } else {
    return ix;
  }
}


x86 assembly (clang, -O0):
<wraped_next>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    112b <wraped_next+0x2b>
movl   $0x0,-0x4(%rbp)
jmp    1131 <wraped_next+0x31>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wraped_next>:
lea    0x1(%rdi),%ecx
xor    %eax,%eax
cmp    %esi,%ecx
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @wraped_next(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 1
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = icmp eq i32 %8, %9
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 0, i32* %3
br label %14
12: ; preds = %2
%13 = load i32, i32* %4
store i32 %13, i32* %3
br label %14
14: ; preds = %12, %11
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @wraped_next(i32 %0, i32 %1) {
%3 = add nsw i32 %0, 1
%4 = icmp eq i32 %3, %1
%5 = select i1 %4, i32 0, i32 %3
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int ITM_CheckChar();
int ITM_ReceiveChar();
int /*<<< orphan*/ __NOP();
int fgetc(FILE *f) {
  while (ITM_CheckChar() != 1)
    __NOP();
  return (ITM_ReceiveChar());
}


x86 assembly (clang, -O0):
<fgetc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <ITM_CheckChar@plt>
cmp    $0x1,%eax
je     1158 <fgetc+0x28>
mov    $0x0,%al
call   1040 <__NOP@plt>
jmp    113c <fgetc+0xc>
mov    $0x0,%al
call   1050 <ITM_ReceiveChar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgetc>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <ITM_CheckChar@plt>
cmp    $0x1,%eax
je     1155 <fgetc+0x25>
xor    %eax,%eax
call   1040 <__NOP@plt>
jmp    1140 <fgetc+0x10>
xor    %eax,%eax
pop    %rcx
jmp    1050 <ITM_ReceiveChar@plt>

LLVM IR (-O0):
define i32 @fgetc(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
br label %3
3: ; preds = %6, %1
%4 = call i32 (...) @ITM_CheckChar()
%5 = icmp ne i32 %4, 1
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = call i32 (...) @__NOP()
br label %3
8: ; preds = %3
%9 = call i32 (...) @ITM_ReceiveChar()
ret i32 %9
}

LLVM IR (-O2):
define i32 @fgetc(i32* nocapture readnone %0) {
%2 = tail call i32 (...) @ITM_CheckChar()
%3 = icmp eq i32 %2, 1
br i1 %3, label %8, label %4
4: ; preds = %1, %4
%5 = tail call i32 (...) @__NOP()
%6 = tail call i32 (...) @ITM_CheckChar()
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %4
8: ; preds = %4, %1
%9 = tail call i32 (...) @ITM_ReceiveChar()
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_log_set_flags() {
  printf("NOT IMPLEMENTED:"
         "pa_log_set_flags"
         "\n");
}


x86 assembly (clang, -O0):
<pa_log_set_flags>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_log_set_flags>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"NOT IMPLEMENTED:pa_log_set_flags\0A\00"
define i32 @pa_log_set_flags() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [33 x i8] c"NOT IMPLEMENTED:pa_log_set_flags\00"
define i32 @pa_log_set_flags() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ mutal_rec_a();
int /*<<< orphan*/ recurse();
int main() {
  recurse();
  mutal_rec_a();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <recurse@plt>
mov    $0x0,%al
call   1040 <mutal_rec_a@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <recurse@plt>
xor    %eax,%eax
call   1040 <mutal_rec_a@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @recurse()
%3 = call i32 (...) @mutal_rec_a()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @recurse()
%2 = tail call i32 (...) @mutal_rec_a()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void isStillOpen(void) { printf("That is still open.\n"); }


x86 assembly (clang, -O0):
<isStillOpen>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<isStillOpen>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"That is still open.\0A\00"
define void @isStillOpen() {
%1 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [20 x i8] c"That is still open.\00"
define void @isStillOpen() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret void
}
int main() {
  int a;
  return a;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @main() {
ret i32 undef
}
/* Variables and functions */
int PAPI_multiplex_init();
void PAPIF_MULTIPLEX_INIT(int *check) { *check = PAPI_multiplex_init(); }


x86 assembly (clang, -O0):
<PAPIF_MULTIPLEX_INIT>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <PAPI_multiplex_init@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PAPIF_MULTIPLEX_INIT>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <PAPI_multiplex_init@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @PAPIF_MULTIPLEX_INIT(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = call i32 (...) @PAPI_multiplex_init()
%4 = load i32*, i32** %2
store i32 %3, i32* %4
ret void
}

LLVM IR (-O2):
define void @PAPIF_MULTIPLEX_INIT(i32* nocapture writeonly %0) {
%2 = tail call i32 (...) @PAPI_multiplex_init()
store i32 %2, i32* %0
ret void
}
void sim_abort() { (*((volatile char *)0x49)) = 0; }


x86 assembly (clang, -O0):
<sim_abort>:
push   %rbp
mov    %rsp,%rbp
mov    $0x49,%eax
movb   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sim_abort>:
movb   $0x0,0x49
ret

LLVM IR (-O0):
define void @sim_abort() {
store volatile i8 0, i8* inttoptr (i64 73 to i8*)
ret void
}

LLVM IR (-O2):
define void @sim_abort() {
store volatile i8 0, i8* inttoptr (i64 73 to i8*)
ret void
}
char *strerev(char *p, char *e, char c) {
  char *z = e;
  while (z > p && *(z - 1) != c)
    z--;
  return z;
}


x86 assembly (clang, -O0):
<strerev>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rcx
xor    %eax,%eax
cmp    -0x8(%rbp),%rcx
mov    %al,-0x21(%rbp)
jbe    1140 <strerev+0x40>
mov    -0x20(%rbp),%rax
movsbl -0x1(%rax),%eax
movsbl -0x11(%rbp),%ecx
cmp    %ecx,%eax
setne  %al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%al
test   $0x1,%al
jne    1150 <strerev+0x50>
jmp    1161 <strerev+0x61>
mov    -0x20(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x20(%rbp)
jmp    1119 <strerev+0x19>
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strerev>:
mov    %rsi,%rax
cmp    %rdi,%rsi
jbe    1111 <strerev+0x11>
lea    -0x1(%rax),%rsi
cmp    %dl,-0x1(%rax)
jne    1100 <strerev>
ret

LLVM IR (-O0):
define i8* @strerev(i8* %0, i8* %1, i8 signext %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8
%7 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8 %2, i8* %6
%8 = load i8*, i8** %5
store i8* %8, i8** %7
br label %9
9: ; preds = %23, %3
%10 = load i8*, i8** %7
%11 = load i8*, i8** %4
%12 = icmp ugt i8* %10, %11
br i1 %12, label %13, label %21
13: ; preds = %9
%14 = load i8*, i8** %7
%15 = getelementptr inbounds i8, i8* %14, i64 -1
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = load i8, i8* %6
%19 = sext i8 %18 to i32
%20 = icmp ne i32 %17, %19
br label %21
21: ; preds = %13, %9
%22 = phi i1 [ false, %9 ], [ %20, %13 ]
br i1 %22, label %23, label %26
23: ; preds = %21
%24 = load i8*, i8** %7
%25 = getelementptr inbounds i8, i8* %24, i32 -1
store i8* %25, i8** %7
br label %9
26: ; preds = %21
%27 = load i8*, i8** %7
ret i8* %27
}

LLVM IR (-O2):
define i8* @strerev(i8* readnone %0, i8* %1, i8 signext %2) {
br label %4
4: ; preds = %7, %3
%5 = phi i8* [ %1, %3 ], [ %8, %7 ]
%6 = icmp ugt i8* %5, %0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = getelementptr inbounds i8, i8* %5, i64 -1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, %2
br i1 %10, label %11, label %4
11: ; preds = %4, %7
ret i8* %5
}
void gtk_text_iter_order() {}


x86 assembly (clang, -O0):
<gtk_text_iter_order>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_iter_order>:
ret

LLVM IR (-O0):
define void @gtk_text_iter_order() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_iter_order() {
ret void
}
int pf_pqos_occupancy_setup(struct _perf_pqos *pqos __attribute__((unused)),
                            int pid __attribute__((unused)),
                            int lwpid __attribute__((unused))) {
  return 0;
}


x86 assembly (clang, -O0):
<pf_pqos_occupancy_setup>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pf_pqos_occupancy_setup>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct._perf_pqos = type opaque
define i32 @pf_pqos_occupancy_setup(%struct._perf_pqos* %0, i32 %1, i32 %2) {
%4 = alloca %struct._perf_pqos*
%5 = alloca i32
%6 = alloca i32
store %struct._perf_pqos* %0, %struct._perf_pqos** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
%struct._perf_pqos = type opaque
define i32 @pf_pqos_occupancy_setup(%struct._perf_pqos* nocapture readnone %0, i32 %1, i32 %2) {
ret i32 0
}
double Phys_RayleighJeans(double nu, double T_k) {
  static double c = 2.997924580000000e+08, k = 1.380650300000000e-23;
  return 2.0 * (nu * nu) * k * T_k / (c * c);
}


x86 assembly (clang, -O0):
<Phys_RayleighJeans>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm1
mulsd  -0x8(%rbp),%xmm1
movsd  0xee0(%rip),%xmm0
mulsd  %xmm1,%xmm0
mulsd  0x2efc(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  0x2ee7(%rip),%xmm1
mulsd  0x2edf(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Phys_RayleighJeans>:
mulsd  %xmm0,%xmm0
addsd  %xmm0,%xmm0
mulsd  0xef0(%rip),%xmm0
mulsd  %xmm1,%xmm0
divsd  0xeec(%rip),%xmm0
ret

LLVM IR (-O0):
@Phys_RayleighJeans.c = internal global double 0x41B1DE784A000000
@Phys_RayleighJeans.k = internal global double 0x3B30B0E7DD0A406E
define double @Phys_RayleighJeans(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %3
%7 = fmul double %5, %6
%8 = fmul double 2.000000e+00, %7
%9 = load double, double* @Phys_RayleighJeans.k
%10 = fmul double %8, %9
%11 = load double, double* %4
%12 = fmul double %10, %11
%13 = load double, double* @Phys_RayleighJeans.c
%14 = load double, double* @Phys_RayleighJeans.c
%15 = fmul double %13, %14
%16 = fdiv double %12, %15
ret double %16
}

LLVM IR (-O2):
define double @Phys_RayleighJeans(double %0, double %1) {
%3 = fmul double %0, %0
%4 = fmul double %3, 2.000000e+00
%5 = fmul double %4, 0x3B30B0E7DD0A406E
%6 = fmul double %5, %1
%7 = fdiv double %6, 0x4373F4D4EACDD756
ret double %7
}
/* Variables and functions */
int /*<<< orphan*/ task_assert_flag(int, int);
void task_assert_thread(int id) { task_assert_flag(id, (1 << 3)); }


x86 assembly (clang, -O0):
<task_assert_thread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x8,%esi
call   1030 <task_assert_flag@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<task_assert_thread>:
mov    $0x8,%esi
jmp    1030 <task_assert_flag@plt>

LLVM IR (-O0):
define void @task_assert_thread(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @task_assert_flag(i32 %3, i32 8)
ret void
}

LLVM IR (-O2):
define void @task_assert_thread(i32 %0) {
%2 = tail call i32 @task_assert_flag(i32 %0, i32 8)
ret void
}
void RTP_set_slicenum(unsigned char *p, unsigned int v) {
  p[18] = (unsigned char)((unsigned int)(0xff & v >> 8));
  p[19] = (unsigned char)(0xff & v);
}


x86 assembly (clang, -O0):
<RTP_set_slicenum>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shr    $0x8,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x12(%rax)
mov    -0xc(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x13(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTP_set_slicenum>:
rol    $0x8,%si
mov    %si,0x12(%rdi)
ret

LLVM IR (-O0):
define void @RTP_set_slicenum(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = lshr i32 %5, 8
%7 = and i32 255, %6
%8 = trunc i32 %7 to i8
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 18
store i8 %8, i8* %10
%11 = load i32, i32* %4
%12 = and i32 255, %11
%13 = trunc i32 %12 to i8
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i64 19
store i8 %13, i8* %15
ret void
}

LLVM IR (-O2):
define void @RTP_set_slicenum(i8* nocapture writeonly %0, i32 %1) {
%3 = lshr i32 %1, 8
%4 = trunc i32 %3 to i8
%5 = getelementptr inbounds i8, i8* %0, i64 18
store i8 %4, i8* %5
%6 = trunc i32 %1 to i8
%7 = getelementptr inbounds i8, i8* %0, i64 19
store i8 %6, i8* %7
ret void
}