xunge/DecIR huggingface dataset:
/* Type definitions */
struct hdr_histogram {
  int dummy;
};
typedef scalar_t__ int64_t;

/* Variables and functions */
scalar_t__ lowest_equivalent_value(struct hdr_histogram *, scalar_t__);
scalar_t__ size_of_equivalent_value_range(struct hdr_histogram *, scalar_t__);
int64_t next_non_equivalent_value(struct hdr_histogram *h, int64_t value) {
  return lowest_equivalent_value(h, value) +
         size_of_equivalent_value_range(h, value);
}


x86 assembly (clang, -O0):
<next_non_equivalent_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <lowest_equivalent_value@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <size_of_equivalent_value_range@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_non_equivalent_value>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <lowest_equivalent_value@plt>
mov    %rax,%r15
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <size_of_equivalent_value_range@plt>
add    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.hdr_histogram = type { i32 }
define i64 @next_non_equivalent_value(%struct.hdr_histogram* %0, i64 %1) {
%3 = alloca %struct.hdr_histogram*
%4 = alloca i64
store %struct.hdr_histogram* %0, %struct.hdr_histogram** %3
store i64 %1, i64* %4
%5 = load %struct.hdr_histogram*, %struct.hdr_histogram** %3
%6 = load i64, i64* %4
%7 = call i64 @lowest_equivalent_value(%struct.hdr_histogram* %5, i64 %6)
%8 = load %struct.hdr_histogram*, %struct.hdr_histogram** %3
%9 = load i64, i64* %4
%10 = call i64 @size_of_equivalent_value_range(%struct.hdr_histogram* %8, i64 %9)
%11 = add nsw i64 %7, %10
ret i64 %11
}

LLVM IR (-O2):
%struct.hdr_histogram = type { i32 }
define i64 @next_non_equivalent_value(%struct.hdr_histogram* %0, i64 %1) {
%3 = tail call i64 @lowest_equivalent_value(%struct.hdr_histogram* %0, i64 %1)
%4 = tail call i64 @size_of_equivalent_value_range(%struct.hdr_histogram* %0, i64 %1)
%5 = add nsw i64 %4, %3
ret i64 %5
}
__attribute__((always_)) void proc_sched_show_task(struct task_struct *p,
                                                   struct seq_file *m) {}


x86 assembly (clang, -O0):
<proc_sched_show_task>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<proc_sched_show_task>:
ret

LLVM IR (-O0):
%struct.task_struct = type opaque
%struct.seq_file = type opaque
define void @proc_sched_show_task(%struct.task_struct* %0, %struct.seq_file* %1) {
%3 = alloca %struct.task_struct*
%4 = alloca %struct.seq_file*
store %struct.task_struct* %0, %struct.task_struct** %3
store %struct.seq_file* %1, %struct.seq_file** %4
ret void
}

LLVM IR (-O2):
%struct.task_struct = type opaque
%struct.seq_file = type opaque
define void @proc_sched_show_task(%struct.task_struct* nocapture %0, %struct.seq_file* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void message(const char *s) { printf("\t%s\n", s); }


x86 assembly (clang, -O0):
<message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<message>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"\09%s\0A\00"
define void @message(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"\09%s\0A\00"
define void @message(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void gtk_check_menu_item_new() {}


x86 assembly (clang, -O0):
<gtk_check_menu_item_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_check_menu_item_new>:
ret

LLVM IR (-O0):
define void @gtk_check_menu_item_new() {
ret void
}

LLVM IR (-O2):
define void @gtk_check_menu_item_new() {
ret void
}
float ANTweenTimingFunctionQuartOut(float time, float begin, float change,
                                    float duration) {
  time = time / duration - 1;
  return -change * (time * time * time * time - 1) + begin;
}


x86 assembly (clang, -O0):
<ANTweenTimingFunctionQuartOut>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
divss  -0x10(%rbp),%xmm0
movss  0xeda(%rip),%xmm1
subss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0xc(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  -0x4(%rbp),%xmm2
mulss  -0x4(%rbp),%xmm2
mulss  -0x4(%rbp),%xmm2
movss  -0x4(%rbp),%xmm1
mulss  %xmm1,%xmm2
movss  0xe9b(%rip),%xmm1
addss  %xmm1,%xmm2
movss  -0x8(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ANTweenTimingFunctionQuartOut>:
divss  %xmm3,%xmm0
movss  0xef4(%rip),%xmm3
addss  %xmm3,%xmm0
movaps %xmm0,%xmm4
mulss  %xmm0,%xmm4
mulss  %xmm0,%xmm4
mulss  %xmm0,%xmm4
addss  %xmm3,%xmm4
mulss  %xmm2,%xmm4
subss  %xmm4,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @ANTweenTimingFunctionQuartOut(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %5
%10 = load float, float* %8
%11 = fdiv float %9, %10
%12 = fsub float %11, 1.000000e+00
store float %12, float* %5
%13 = load float, float* %7
%14 = fneg float %13
%15 = load float, float* %5
%16 = load float, float* %5
%17 = fmul float %15, %16
%18 = load float, float* %5
%19 = fmul float %17, %18
%20 = load float, float* %5
%21 = call float @llvm.fmuladd.f32(float %19, float %20, float -1.000000e+00)
%22 = load float, float* %6
%23 = call float @llvm.fmuladd.f32(float %14, float %21, float %22)
ret float %23
}

LLVM IR (-O2):
define float @ANTweenTimingFunctionQuartOut(float %0, float %1, float %2, float %3) {
%5 = fdiv float %0, %3
%6 = fadd float %5, -1.000000e+00
%7 = fneg float %2
%8 = fmul float %6, %6
%9 = fmul float %6, %8
%10 = tail call float @llvm.fmuladd.f32(float %9, float %6, float -1.000000e+00)
%11 = tail call float @llvm.fmuladd.f32(float %7, float %10, float %1)
ret float %11
}
unsigned int hash_function(const char *s) {
  unsigned int i;
  for (i = 0; *s; s++) {
    i = 131 * i + *s;
  }
  return i % 200;
}


x86 assembly (clang, -O0):
<hash_function>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1140 <hash_function+0x40>
imul   $0x83,-0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
movsbl (%rcx),%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <hash_function+0xf>
mov    -0xc(%rbp),%eax
mov    $0xc8,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_function>:
mov    (%rdi),%cl
test   %cl,%cl
je     113c <hash_function+0x3c>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
imul   $0x83,%eax,%edx
movsbl %cl,%eax
add    %edx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash_function+0x10>
mov    %eax,%ecx
imul   $0x51eb851f,%rcx,%rcx
shr    $0x26,%rcx
imul   $0xc8,%ecx,%ecx
sub    %ecx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hash_function(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %15, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %18
8: ; preds = %4
%9 = load i32, i32* %3
%10 = mul i32 131, %9
%11 = load i8*, i8** %2
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = add i32 %10, %13
store i32 %14, i32* %3
br label %15
15: ; preds = %8
%16 = load i8*, i8** %2
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %2
br label %4
18: ; preds = %4
%19 = load i32, i32* %3
%20 = urem i32 %19, 200
ret i32 %20
}

LLVM IR (-O2):
define i32 @hash_function(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %10, %4 ], [ 0, %1 ]
%7 = phi i8* [ %11, %4 ], [ %0, %1 ]
%8 = mul i32 %6, 131
%9 = sext i8 %5 to i32
%10 = add i32 %8, %9
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4
%15 = urem i32 %10, 200
br label %16
16: ; preds = %14, %1
%17 = phi i32 [ 0, %1 ], [ %15, %14 ]
ret i32 %17
}
void pm8921_bms_invalidate_shutdown_soc(void) {}


x86 assembly (clang, -O0):
<pm8921_bms_invalidate_shutdown_soc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pm8921_bms_invalidate_shutdown_soc>:
ret

LLVM IR (-O0):
define void @pm8921_bms_invalidate_shutdown_soc() {
ret void
}

LLVM IR (-O2):
define void @pm8921_bms_invalidate_shutdown_soc() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LibVarSet(char *, char *);
int Export_BotLibVarSet(char *var_name, char *value) {
  LibVarSet(var_name, value);
  return 0;
}


x86 assembly (clang, -O0):
<Export_BotLibVarSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <LibVarSet@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Export_BotLibVarSet>:
push   %rax
call   1030 <LibVarSet@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @Export_BotLibVarSet(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @LibVarSet(i8* %5, i8* %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @Export_BotLibVarSet(i8* %0, i8* %1) {
%3 = tail call i32 @LibVarSet(i8* %0, i8* %1)
ret i32 0
}
/* Variables and functions */
scalar_t__ foo2(short *);
unsigned int tr3(short array[], unsigned int n) {
  int sum = 0;
  unsigned int x;
  for (x = 0; x < n; ++x)
    sum += foo2(&array[x]);
  return sum;
}


x86 assembly (clang, -O0):
<tr3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0xc(%rbp),%eax
jae    1167 <tr3+0x57>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%eax
shl    $0x1,%rax
add    %rax,%rdi
call   1030 <foo2@plt>
mov    %rax,%rcx
movslq -0x10(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112d <tr3+0x1d>
mov    -0x10(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tr3>:
push   %rbp
push   %r14
push   %rbx
test   %esi,%esi
je     1137 <tr3+0x27>
mov    %rdi,%rbx
mov    %esi,%ebp
xor    %r14d,%r14d
mov    %rbx,%rdi
call   1030 <foo2@plt>
add    %eax,%r14d
add    $0x2,%rbx
add    $0xffffffffffffffff,%rbp
jne    1120 <tr3+0x10>
jmp    113a <tr3+0x2a>
xor    %r14d,%r14d
mov    %r14d,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @tr3(i16* %0, i32 %1) {
%3 = alloca i16*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i16* %0, i16** %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %21, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp ult i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %7
%12 = load i16*, i16** %3
%13 = load i32, i32* %6
%14 = zext i32 %13 to i64
%15 = getelementptr inbounds i16, i16* %12, i64 %14
%16 = call i64 @foo2(i16* %15)
%17 = load i32, i32* %5
%18 = sext i32 %17 to i64
%19 = add nsw i64 %18, %16
%20 = trunc i64 %19 to i32
store i32 %20, i32* %5
br label %21
21: ; preds = %11
%22 = load i32, i32* %6
%23 = add i32 %22, 1
store i32 %23, i32* %6
br label %7
24: ; preds = %7
%25 = load i32, i32* %5
ret i32 %25
}

LLVM IR (-O2):
define i32 @tr3(i16* %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %15, label %4
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %13, %6 ]
%8 = phi i32 [ 0, %4 ], [ %12, %6 ]
%9 = getelementptr inbounds i16, i16* %0, i64 %7
%10 = tail call i64 @foo2(i16* %9)
%11 = trunc i64 %10 to i32
%12 = add i32 %8, %11
%13 = add nuw nsw i64 %7, 1
%14 = icmp eq i64 %13, %5
br i1 %14, label %15, label %6
15: ; preds = %6, %2
%16 = phi i32 [ 0, %2 ], [ %12, %6 ]
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void _SocketFDClose(int fd) { close(fd); }


x86 assembly (clang, -O0):
<_SocketFDClose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_SocketFDClose>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @_SocketFDClose(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret void
}

LLVM IR (-O2):
define void @_SocketFDClose(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret void
}
/* Variables and functions */
unsigned long long readu4(unsigned char *);
unsigned int readu8(unsigned char *p) {
  return readu4(p) | ((unsigned long long)readu4(p + 4)) << 32;
}


x86 assembly (clang, -O0):
<readu8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <readu4@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x4,%rdi
call   1030 <readu4@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
shl    $0x20,%rcx
or     %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readu8>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <readu4@plt>
mov    %rax,%r14
add    $0x4,%rbx
mov    %rbx,%rdi
call   1030 <readu4@plt>
mov    %r14d,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @readu8(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @readu4(i8* %3)
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i64 4
%7 = call i64 @readu4(i8* %6)
%8 = shl i64 %7, 32
%9 = or i64 %4, %8
%10 = trunc i64 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @readu8(i8* %0) {
%2 = tail call i64 @readu4(i8* %0)
%3 = getelementptr inbounds i8, i8* %0, i64 4
%4 = tail call i64 @readu4(i8* %3)
%5 = trunc i64 %2 to i32
ret i32 %5
}
void g_date_new() {}


x86 assembly (clang, -O0):
<g_date_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_date_new>:
ret

LLVM IR (-O0):
define void @g_date_new() {
ret void
}

LLVM IR (-O2):
define void @g_date_new() {
ret void
}
/* Type definitions */
struct Dict {
  int dummy;
};

/* Variables and functions */
int dict_addl(struct Dict *, char const *, int /*<<< orphan*/, void *);
int /*<<< orphan*/ strlen(char const *);
bool dict_add(struct Dict *dict, const char *key, void *value) {
  return dict_addl(dict, key, strlen(key), value);
}


x86 assembly (clang, -O0):
<dict_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x28(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    %eax,%edx
mov    -0x18(%rbp),%rcx
call   1040 <dict_addl@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dict_add>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %rdi,%r15
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %r15,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
mov    %r14,%rcx
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <dict_addl@plt>

LLVM IR (-O0):
%struct.Dict = type { i32 }
define i32 @dict_add(%struct.Dict* %0, i8* %1, i8* %2) {
%4 = alloca %struct.Dict*
%5 = alloca i8*
%6 = alloca i8*
store %struct.Dict* %0, %struct.Dict** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load %struct.Dict*, %struct.Dict** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %5
%10 = call i32 @strlen(i8* %9)
%11 = load i8*, i8** %6
%12 = call i32 @dict_addl(%struct.Dict* %7, i8* %8, i32 %10, i8* %11)
ret i32 %12
}

LLVM IR (-O2):
%struct.Dict = type { i32 }
define i32 @dict_add(%struct.Dict* %0, i8* %1, i8* %2) {
%4 = tail call i32 @strlen(i8* %1)
%5 = tail call i32 @dict_addl(%struct.Dict* %0, i8* %1, i32 %4, i8* %2)
ret i32 %5
}
/* Type definitions */
struct stat {
  long st_size;
};

/* Variables and functions */
scalar_t__ stat(char const *, struct stat *);
long f_size(const char *path) {
  struct stat st;
  if (stat(path, &st) == 0)
    return st.st_size;
  return -1;
}


x86 assembly (clang, -O0):
<f_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <stat@plt>
cmp    $0x0,%rax
jne    1140 <f_size+0x30>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1148 <f_size+0x38>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_size>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
neg    %rax
sbb    %rax,%rax
or     (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i64 }
define i64 @f_size(i8* %0) {
%2 = alloca i64
%3 = alloca i8*
%4 = alloca %struct.stat
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @stat(i8* %5, %struct.stat* %4)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%10 = load i64, i64* %9
store i64 %10, i64* %2
br label %12
11: ; preds = %1
store i64 -1, i64* %2
br label %12
12: ; preds = %11, %8
%13 = load i64, i64* %2
ret i64 %13
}

LLVM IR (-O2):
%struct.stat = type { i64 }
define i64 @f_size(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i64 %4, 0
%6 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%7 = load i64, i64* %6
%8 = select i1 %5, i64 %7, i64 -1
ret i64 %8
}
int main(int argc, char *argv[]) {
  int x[1024];
#pragma acc data copyin(x [0:N])
  {
    int *xp;
#pragma acc host_data use_device(x)
    {
#pragma acc parallel present(x) copyout(xp)
      { xp = x; }
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0xfa0,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x1010(%rbp),%rax
mov    %rax,-0x1018(%rbp)
xor    %eax,%eax
add    $0xfa0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [1024 x i32]
%7 = alloca i32*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = getelementptr inbounds [1024 x i32], [1024 x i32]* %6, i64 0, i64 0
store i32* %8, i32** %7
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Type definitions */
struct PackList {
  int dummy;
};
struct FileEntry {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ packlist_insert(struct PackList *, struct FileEntry *);
int make_packs_insert(struct FileEntry *entry, void *user_data) {
  struct PackList *list = user_data;
  packlist_insert(list, entry);
  return 0;
}


x86 assembly (clang, -O0):
<make_packs_insert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <packlist_insert@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_packs_insert>:
push   %rax
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
call   1030 <packlist_insert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.FileEntry = type { i32 }
%struct.PackList = type { i32 }
define i32 @make_packs_insert(%struct.FileEntry* %0, i8* %1) {
%3 = alloca %struct.FileEntry*
%4 = alloca i8*
%5 = alloca %struct.PackList*
store %struct.FileEntry* %0, %struct.FileEntry** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to %struct.PackList*
store %struct.PackList* %7, %struct.PackList** %5
%8 = load %struct.PackList*, %struct.PackList** %5
%9 = load %struct.FileEntry*, %struct.FileEntry** %3
%10 = call i32 @packlist_insert(%struct.PackList* %8, %struct.FileEntry* %9)
ret i32 0
}

LLVM IR (-O2):
%struct.FileEntry = type { i32 }
%struct.PackList = type { i32 }
define i32 @make_packs_insert(%struct.FileEntry* %0, i8* %1) {
%3 = bitcast i8* %1 to %struct.PackList*
%4 = tail call i32 @packlist_insert(%struct.PackList* %3, %struct.FileEntry* %0)
ret i32 0
}
/* Variables and functions */
unsigned long long strtoull(char const *, char **, int);
unsigned long long strtouq(const char *nptr, char **endptr, int base) {
  return strtoull(nptr, endptr, base);
}


x86 assembly (clang, -O0):
<strtouq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <strtoull@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtouq>:
jmp    1030 <strtoull@plt>

LLVM IR (-O0):
define i64 @strtouq(i8* %0, i8** %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i32
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8**, i8*** %5
%9 = load i32, i32* %6
%10 = call i64 @strtoull(i8* %7, i8** %8, i32 %9)
ret i64 %10
}

LLVM IR (-O2):
define i64 @strtouq(i8* %0, i8** nocapture %1, i32 %2) {
%4 = tail call i64 @strtoull(i8* %0, i8** %1, i32 %2)
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
void pp_free_int(int **arr_ptr) {
  if (arr_ptr) {
    free(*arr_ptr);
    *arr_ptr = NULL;
  }
}


x86 assembly (clang, -O0):
<pp_free_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     113e <pp_free_int+0x2e>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pp_free_int>:
test   %rdi,%rdi
je     1129 <pp_free_int+0x19>
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <free@plt>
movq   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @pp_free_int(i32** %0) {
%2 = alloca i32**
store i32** %0, i32*** %2
%3 = load i32**, i32*** %2
%4 = icmp ne i32** %3, null
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load i32**, i32*** %2
%7 = load i32*, i32** %6
%8 = call i32 @free(i32* %7)
%9 = load i32**, i32*** %2
store i32* null, i32** %9
br label %10
10: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @pp_free_int(i32** %0) {
%2 = icmp eq i32** %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = load i32*, i32** %0
%5 = tail call i32 @free(i32* %4)
store i32* null, i32** %0
br label %6
6: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assertTrue(char *, int);
double ***init(int, int);
void test_init() {
  double ***w = init(5, 4);
  assertTrue("w[0][2] == 0", w[0][2] == 0);
  ;
}


x86 assembly (clang, -O0):
<test_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x5,%edi
mov    $0x4,%esi
call   1040 <init@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
cmpq   $0x0,0x10(%rax)
sete   %al
and    $0x1,%al
movzbl %al,%esi
lea    0xeaa(%rip),%rdi
call   1030 <assertTrue@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_init>:
push   %rax
mov    $0x5,%edi
mov    $0x4,%esi
call   1040 <init@plt>
mov    (%rax),%rax
xor    %esi,%esi
cmpq   $0x0,0x10(%rax)
sete   %sil
lea    0xebb(%rip),%rdi
pop    %rax
jmp    1030 <assertTrue@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"w[0][2] == 0\00"
define void @test_init() {
%1 = alloca double***
%2 = call double*** @init(i32 5, i32 4)
store double*** %2, double**** %1
%3 = load double***, double**** %1
%4 = getelementptr inbounds double**, double*** %3, i64 0
%5 = load double**, double*** %4
%6 = getelementptr inbounds double*, double** %5, i64 2
%7 = load double*, double** %6
%8 = icmp eq double* %7, null
%9 = zext i1 %8 to i32
%10 = call i32 @assertTrue(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"w[0][2] == 0\00"
define void @test_init() {
%1 = tail call double*** @init(i32 5, i32 4)
%2 = load double**, double*** %1
%3 = getelementptr inbounds double*, double** %2, i64 2
%4 = load double*, double** %3
%5 = icmp eq double* %4, null
%6 = zext i1 %5 to i32
%7 = tail call i32 @assertTrue(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %6)
ret void
}
int hash(char *clave) {
  int temporal = 0;
  int i = 0;
  while (clave[i] != '\0') {
    temporal = ((temporal << 4) + clave[i]) % 211;
    i++;
  }
  return temporal;
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1158 <hash+0x58>
mov    -0xc(%rbp),%eax
shl    $0x4,%eax
mov    -0x8(%rbp),%rcx
movslq -0x10(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
add    %ecx,%eax
mov    $0xd3,%ecx
cltd
idiv   %ecx
mov    %edx,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1116 <hash+0x16>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1142 <hash+0x42>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
movsbl %cl,%ecx
shl    $0x4,%eax
add    %ecx,%eax
cltq
imul   $0x4da637d,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
add    %edx,%ecx
imul   $0xd3,%ecx,%ecx
sub    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %13, %1
%6 = load i8*, i8** %2
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %26
13: ; preds = %5
%14 = load i32, i32* %3
%15 = shl i32 %14, 4
%16 = load i8*, i8** %2
%17 = load i32, i32* %4
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = add nsw i32 %15, %21
%23 = srem i32 %22, 211
store i32 %23, i32* %3
%24 = load i32, i32* %4
%25 = add nsw i32 %24, 1
store i32 %25, i32* %4
br label %5
26: ; preds = %5
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %12, %4 ], [ 0, %1 ]
%6 = phi i8 [ %14, %4 ], [ %2, %1 ]
%7 = phi i32 [ %11, %4 ], [ 0, %1 ]
%8 = sext i8 %6 to i32
%9 = shl nsw i32 %7, 4
%10 = add nsw i32 %9, %8
%11 = srem i32 %10, 211
%12 = add nuw nsw i64 %5, 1
%13 = getelementptr inbounds i8, i8* %0, i64 %12
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %4
16: ; preds = %4, %1
%17 = phi i32 [ 0, %1 ], [ %11, %4 ]
ret i32 %17
}
void hal_watchdog_enable(void) {}


x86 assembly (clang, -O0):
<hal_watchdog_enable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hal_watchdog_enable>:
ret

LLVM IR (-O0):
define void @hal_watchdog_enable() {
ret void
}

LLVM IR (-O2):
define void @hal_watchdog_enable() {
ret void
}
char *dynamicLibraryAFunction() { return "From DynamicLibraryA"; }


x86 assembly (clang, -O0):
<dynamicLibraryAFunction>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dynamicLibraryAFunction>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [21 x i8] c"From DynamicLibraryA\00"
define i8* @dynamicLibraryAFunction() {
ret i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [21 x i8] c"From DynamicLibraryA\00"
define i8* @dynamicLibraryAFunction() {
ret i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ gen(char *);
void cgclear(void) { gen("xor\tax,ax"); }


x86 assembly (clang, -O0):
<cgclear>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <gen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgclear>:
lea    0xee9(%rip),%rdi
jmp    1030 <gen@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"xor\09ax,ax\00"
define void @cgclear() {
%1 = call i32 @gen(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"xor\09ax,ax\00"
define void @cgclear() {
%1 = tail call i32 @gen(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}
int reassemble_21(int as21) {
  return (((as21 & 0x100000) >> 20) | ((as21 & 0x0ffe00) >> 8) |
          ((as21 & 0x000180) << 7) | ((as21 & 0x00007c) << 14) |
          ((as21 & 0x000003) << 12));
}


x86 assembly (clang, -O0):
<reassemble_21>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x100000,%eax
sar    $0x14,%eax
mov    -0x4(%rbp),%ecx
and    $0xffe00,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0x180,%ecx
shl    $0x7,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0x7c,%ecx
shl    $0xe,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0x3,%ecx
shl    $0xc,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reassemble_21>:
mov    %edi,%eax
shr    $0x14,%eax
and    $0x1,%eax
mov    %edi,%ecx
shr    $0x8,%ecx
and    $0xffe,%ecx
or     %eax,%ecx
mov    %edi,%edx
shl    $0x7,%edx
and    $0xc000,%edx
or     %ecx,%edx
mov    %edi,%eax
and    $0x7c,%eax
shl    $0xe,%eax
or     %edx,%eax
and    $0x3,%edi
shl    $0xc,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @reassemble_21(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 1048576
%5 = ashr i32 %4, 20
%6 = load i32, i32* %2
%7 = and i32 %6, 1048064
%8 = ashr i32 %7, 8
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = and i32 %10, 384
%12 = shl i32 %11, 7
%13 = or i32 %9, %12
%14 = load i32, i32* %2
%15 = and i32 %14, 124
%16 = shl i32 %15, 14
%17 = or i32 %13, %16
%18 = load i32, i32* %2
%19 = and i32 %18, 3
%20 = shl i32 %19, 12
%21 = or i32 %17, %20
ret i32 %21
}

LLVM IR (-O2):
define i32 @reassemble_21(i32 %0) {
%2 = lshr i32 %0, 20
%3 = and i32 %2, 1
%4 = lshr i32 %0, 8
%5 = and i32 %4, 4094
%6 = or i32 %3, %5
%7 = shl i32 %0, 7
%8 = and i32 %7, 49152
%9 = or i32 %6, %8
%10 = shl i32 %0, 14
%11 = and i32 %10, 2031616
%12 = or i32 %9, %11
%13 = shl i32 %0, 12
%14 = and i32 %13, 12288
%15 = or i32 %12, %14
ret i32 %15
}
/* Variables and functions */
int shim_enosys(int /*<<< orphan*/);
int shim_gettid(void) { return shim_enosys(0); }


x86 assembly (clang, -O0):
<shim_gettid>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <shim_enosys@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<shim_gettid>:
xor    %edi,%edi
jmp    1030 <shim_enosys@plt>

LLVM IR (-O0):
define i32 @shim_gettid() {
%1 = call i32 @shim_enosys(i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @shim_gettid() {
%1 = tail call i32 @shim_enosys(i32 0)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ g_load(int);
void aload2(void) { g_load(2); }


x86 assembly (clang, -O0):
<aload2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <g_load@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<aload2>:
mov    $0x2,%edi
jmp    1030 <g_load@plt>

LLVM IR (-O0):
define void @aload2() {
%1 = call i32 @g_load(i32 2)
ret void
}

LLVM IR (-O2):
define void @aload2() {
%1 = tail call i32 @g_load(i32 2)
ret void
}
/* Type definitions */
typedef int uint32_t;
struct pcg_state_setseq_64 {
  int dummy;
};

/* Variables and functions */
int pcg_setseq_64_xsl_rr_32_random_r(struct pcg_state_setseq_64 *);
uint32_t pcg_setseq_64_xsl_rr_32_boundedrand_r(struct pcg_state_setseq_64 *rng,
                                               uint32_t bound) {
  uint32_t threshold = -bound % bound;
  for (;;) {
    uint32_t r = pcg_setseq_64_xsl_rr_32_random_r(rng);
    if (r >= threshold)
      return r % bound;
  }
}


x86 assembly (clang, -O0):
<pcg_setseq_64_xsl_rr_32_boundedrand_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
sub    -0xc(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pcg_setseq_64_xsl_rr_32_random_r@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jl     1152 <pcg_setseq_64_xsl_rr_32_boundedrand_r+0x42>
mov    -0x14(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%eax
add    $0x20,%rsp
pop    %rbp
ret
jmp    112b <pcg_setseq_64_xsl_rr_32_boundedrand_r+0x1b>

x86 assembly (clang, -O2):
<pcg_setseq_64_xsl_rr_32_boundedrand_r>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <pcg_setseq_64_xsl_rr_32_random_r@plt>
test   %eax,%eax
js     1120 <pcg_setseq_64_xsl_rr_32_boundedrand_r+0x10>
cltd
idiv   %ebp
mov    %edx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.pcg_state_setseq_64 = type { i32 }
define i32 @pcg_setseq_64_xsl_rr_32_boundedrand_r(%struct.pcg_state_setseq_64* %0, i32 %1) {
%3 = alloca %struct.pcg_state_setseq_64*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store %struct.pcg_state_setseq_64* %0, %struct.pcg_state_setseq_64** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = sub nsw i32 0, %7
%9 = load i32, i32* %4
%10 = srem i32 %8, %9
store i32 %10, i32* %5
br label %11
11: ; preds = %21, %2
%12 = load %struct.pcg_state_setseq_64*, %struct.pcg_state_setseq_64** %3
%13 = call i32 @pcg_setseq_64_xsl_rr_32_random_r(%struct.pcg_state_setseq_64* %12)
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = load i32, i32* %5
%16 = icmp sge i32 %14, %15
br i1 %16, label %17, label %21
17: ; preds = %11
%18 = load i32, i32* %6
%19 = load i32, i32* %4
%20 = srem i32 %18, %19
ret i32 %20
21: ; preds = %11
br label %11
}

LLVM IR (-O2):
%struct.pcg_state_setseq_64 = type { i32 }
define i32 @pcg_setseq_64_xsl_rr_32_boundedrand_r(%struct.pcg_state_setseq_64* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = tail call i32 @pcg_setseq_64_xsl_rr_32_random_r(%struct.pcg_state_setseq_64* %0)
%5 = icmp sgt i32 %4, -1
br i1 %5, label %6, label %3
6: ; preds = %3
%7 = srem i32 %4, %1
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ selection_sort(int *, int);
int main(void) {
  int arr[] = {3, 4, 6, 2, 5, 4, 1, 5, 9, 8, 7};
  selection_sort(arr, 11);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
lea    -0x30(%rbp),%rdi
lea    0xecd(%rip),%rsi
mov    $0x2c,%edx
call   1040 <memcpy@plt>
lea    -0x30(%rbp),%rdi
mov    $0xb,%esi
call   1030 <selection_sort@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x38,%rsp
movups 0xf01(%rip),%xmm0
movups %xmm0,0x1c(%rsp)
movaps 0xee9(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xecd(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0xb,%esi
call   1030 <selection_sort@plt>
xor    %eax,%eax
add    $0x38,%rsp
ret

LLVM IR (-O0):
@__const.main.arr = [11 x i32] [i32 3, i32 4, i32 6, i32 2, i32 5, i32 4, i32 1, i32 5, i32 9, i32 8, i32 7]
define i32 @main() {
%1 = alloca [11 x i32]
%2 = bitcast [11 x i32]* %1 to i8*
%3 = getelementptr inbounds [11 x i32], [11 x i32]* %1, i64 0, i64 0
%4 = call i32 @selection_sort(i32* %3, i32 11)
ret i32 0
}

LLVM IR (-O2):
@__const.main.arr = [11 x i32] [i32 3, i32 4, i32 6, i32 2, i32 5, i32 4, i32 1, i32 5, i32 9, i32 8, i32 7]
define i32 @main() {
%1 = alloca [11 x i32]
%2 = bitcast [11 x i32]* %1 to i8*
%3 = getelementptr inbounds [11 x i32], [11 x i32]* %1, i64 0, i64 0
%4 = call i32 @selection_sort(i32* %3, i32 11)
ret i32 0
}
/* Type definitions */
struct zpdec {
  int dummy;
};

/* Variables and functions */
int zp_decode_pass_through(struct zpdec *);
unsigned int bzz_decode_raw(struct zpdec *zp, int b) {
  int n = 1;
  int m = 1 << b;
  while (n < m)
    n = (n << 1) | zp_decode_pass_through(zp);
  return n - m;
}


x86 assembly (clang, -O0):
<bzz_decode_raw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1160 <bzz_decode_raw+0x50>
mov    -0x10(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <zp_decode_pass_through@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
jmp    1133 <bzz_decode_raw+0x23>
mov    -0x10(%rbp),%eax
sub    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bzz_decode_raw>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ecx
mov    $0x1,%ebx
mov    $0x1,%ebp
shl    %cl,%ebp
cmp    $0x2,%ebp
jl     1140 <bzz_decode_raw+0x30>
mov    %rdi,%r14
mov    $0x1,%ebx
nop
add    %ebx,%ebx
mov    %r14,%rdi
call   1030 <zp_decode_pass_through@plt>
or     %eax,%ebx
cmp    %ebp,%ebx
jl     1130 <bzz_decode_raw+0x20>
sub    %ebp,%ebx
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
%struct.zpdec = type { i32 }
define i32 @bzz_decode_raw(%struct.zpdec* %0, i32 %1) {
%3 = alloca %struct.zpdec*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store %struct.zpdec* %0, %struct.zpdec** %3
store i32 %1, i32* %4
store i32 1, i32* %5
%7 = load i32, i32* %4
%8 = shl i32 1, %7
store i32 %8, i32* %6
br label %9
9: ; preds = %13, %2
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %19
13: ; preds = %9
%14 = load i32, i32* %5
%15 = shl i32 %14, 1
%16 = load %struct.zpdec*, %struct.zpdec** %3
%17 = call i32 @zp_decode_pass_through(%struct.zpdec* %16)
%18 = or i32 %15, %17
store i32 %18, i32* %5
br label %9
19: ; preds = %9
%20 = load i32, i32* %5
%21 = load i32, i32* %6
%22 = sub nsw i32 %20, %21
ret i32 %22
}

LLVM IR (-O2):
%struct.zpdec = type { i32 }
define i32 @bzz_decode_raw(%struct.zpdec* %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = icmp sgt i32 %3, 1
br i1 %4, label %5, label %11
5: ; preds = %2, %5
%6 = phi i32 [ %9, %5 ], [ 1, %2 ]
%7 = shl i32 %6, 1
%8 = tail call i32 @zp_decode_pass_through(%struct.zpdec* %0)
%9 = or i32 %8, %7
%10 = icmp slt i32 %9, %3
br i1 %10, label %5, label %11
11: ; preds = %5, %2
%12 = phi i32 [ 1, %2 ], [ %9, %5 ]
%13 = sub nsw i32 %12, %3
ret i32 %13
}
/* Variables and functions */
int GetINCHIKey102bFromINCHI(char const *, char *);
int cdecl_GetINCHIKey102bFromINCHI(const char *szINCHISource,
                                   char *szINCHIKey) {
  return GetINCHIKey102bFromINCHI(szINCHISource, szINCHIKey);
}


x86 assembly (clang, -O0):
<cdecl_GetINCHIKey102bFromINCHI>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <GetINCHIKey102bFromINCHI@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cdecl_GetINCHIKey102bFromINCHI>:
jmp    1030 <GetINCHIKey102bFromINCHI@plt>

LLVM IR (-O0):
define i32 @cdecl_GetINCHIKey102bFromINCHI(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @GetINCHIKey102bFromINCHI(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @cdecl_GetINCHIKey102bFromINCHI(i8* %0, i8* %1) {
%3 = tail call i32 @GetINCHIKey102bFromINCHI(i8* %0, i8* %1)
ret i32 %3
}
/* Type definitions */
struct retro_game_info {
  int dummy;
};

/* Variables and functions */
bool retro_load_game_special(unsigned game_type,
                             const struct retro_game_info *info,
                             size_t num_info) {
  return false;
}


x86 assembly (clang, -O0):
<retro_load_game_special>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<retro_load_game_special>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.retro_game_info = type { i32 }
define i32 @retro_load_game_special(i32 %0, %struct.retro_game_info* %1, i64 %2) {
%4 = alloca i32
%5 = alloca %struct.retro_game_info*
%6 = alloca i64
store i32 %0, i32* %4
store %struct.retro_game_info* %1, %struct.retro_game_info** %5
store i64 %2, i64* %6
ret i32 0
}

LLVM IR (-O2):
%struct.retro_game_info = type { i32 }
define i32 @retro_load_game_special(i32 %0, %struct.retro_game_info* nocapture readnone %1, i64 %2) {
ret i32 0
}
int securestore_key_uninit(void) { return -1; }


x86 assembly (clang, -O0):
<securestore_key_uninit>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<securestore_key_uninit>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @securestore_key_uninit() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @securestore_key_uninit() {
ret i32 -1
}
/* Variables and functions */
scalar_t__ is_screensaver_active();
int /*<<< orphan*/ screensaver_off();
int /*<<< orphan*/ screensaver_on();
void toggle_screensaver() {
  if (is_screensaver_active())
    screensaver_off();
  else
    screensaver_on();
}


x86 assembly (clang, -O0):
<toggle_screensaver>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <is_screensaver_active@plt>
cmp    $0x0,%rax
je     1151 <toggle_screensaver+0x21>
mov    $0x0,%al
call   1040 <screensaver_off@plt>
jmp    1158 <toggle_screensaver+0x28>
mov    $0x0,%al
call   1050 <screensaver_on@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<toggle_screensaver>:
push   %rax
xor    %eax,%eax
call   1030 <is_screensaver_active@plt>
test   %rax,%rax
je     1145 <toggle_screensaver+0x15>
xor    %eax,%eax
pop    %rcx
jmp    1040 <screensaver_off@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <screensaver_on@plt>

LLVM IR (-O0):
define void @toggle_screensaver() {
%1 = call i64 (...) @is_screensaver_active()
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = call i32 (...) @screensaver_off()
br label %7
5: ; preds = %0
%6 = call i32 (...) @screensaver_on()
br label %7
7: ; preds = %5, %3
ret void
}

LLVM IR (-O2):
define void @toggle_screensaver() {
%1 = tail call i64 (...) @is_screensaver_active()
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @screensaver_off()
br label %7
5: ; preds = %0
%6 = tail call i32 (...) @screensaver_on()
br label %7
7: ; preds = %5, %3
ret void
}
/* Variables and functions */
double log(double);
double __wrap_log(double x) { return log(x); }


x86 assembly (clang, -O0):
<__wrap_log>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <log@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__wrap_log>:
jmp    1030 <log@plt>

LLVM IR (-O0):
define double @__wrap_log(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @log(double %3)
ret double %4
}

LLVM IR (-O2):
define double @__wrap_log(double %0) {
%2 = tail call double @log(double %0)
ret double %2
}
int watchdog_deregister(struct watchdog *w) { return 0; }


x86 assembly (clang, -O0):
<watchdog_deregister>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<watchdog_deregister>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.watchdog = type opaque
define i32 @watchdog_deregister(%struct.watchdog* %0) {
%2 = alloca %struct.watchdog*
store %struct.watchdog* %0, %struct.watchdog** %2
ret i32 0
}

LLVM IR (-O2):
%struct.watchdog = type opaque
define i32 @watchdog_deregister(%struct.watchdog* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ dump_stuff_mmx64(void *, unsigned int, unsigned int);
int /*<<< orphan*/ printf(char *, char *);
void dump_stuff_mmx64_msg(const void *msg, void *buf, unsigned int size,
                          unsigned int index) {
  printf("%s : ", (char *)msg);
  dump_stuff_mmx64(buf, size, index);
}


x86 assembly (clang, -O0):
<dump_stuff_mmx64_msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xebf(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x18(%rbp),%edx
call   1040 <dump_stuff_mmx64@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dump_stuff_mmx64_msg>:
push   %rbp
push   %r14
push   %rbx
mov    %ecx,%r14d
mov    %edx,%ebp
mov    %rsi,%rbx
mov    %rdi,%rsi
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <dump_stuff_mmx64@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"%s : \00"
define void @dump_stuff_mmx64_msg(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %9)
%11 = load i8*, i8** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = call i32 @dump_stuff_mmx64(i8* %11, i32 %12, i32 %13)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"%s : \00"
define void @dump_stuff_mmx64_msg(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %0)
%6 = tail call i32 @dump_stuff_mmx64(i8* %1, i32 %2, i32 %3)
ret void
}