void kernel_CPU_06_mod_3DRhoCte(float *gU0, float *gU1, float *gVorg, int nnoi,
                                int nnoj, int k0, int k1, float FATMDFX,
                                float FATMDFY, float FATMDFZ, float *W) {
  int index_X, index_Y;
  int block_index_X, block_index_Y, block_k;
  int stride = nnoi * nnoj;
  int index, k;
  for (index_Y = 0; index_Y < nnoj; index_Y += 2)
    for (k = 0; k < k1 - k0; k += 2)
      for (index_X = 0; index_X < nnoi; index_X += 2)
        for (block_index_Y = index_Y; block_index_Y < ({
                                        typeof(nnoj) _min1 = (nnoj);
                                        typeof(index_Y + 2) _min2 =
                                            (index_Y + 2);
                                        (void)(&_min1 == &_min2);
                                        _min1 < _min2 ? _min1 : _min2;
                                      });
             block_index_Y++)
          for (block_k = k; block_k < ({
                              typeof(k1 - k0) _min1 = (k1 - k0);
                              typeof(k + 2) _min2 = (k + 2);
                              (void)(&_min1 == &_min2);
                              _min1 < _min2 ? _min1 : _min2;
                            });
               block_k++) {
            for (block_index_X = index_X; block_index_X < ({
                                            typeof(nnoi) _min1 = (nnoi);
                                            typeof(index_X + 2) _min2 =
                                                (index_X + 2);
                                            (void)(&_min1 == &_min2);
                                            _min1 < _min2 ? _min1 : _min2;
                                          });
                 block_index_X++) {
              index = (block_index_Y * nnoi + block_index_X) +
                      (k0 + block_k) * stride;
              if (gVorg[index] > 0.0f) {
                gU1[index] =
                    2.0f * gU0[index] - gU1[index] +
                    FATMDFX * gVorg[index] * gVorg[index] *
                        (+W[6] * (gU0[index - 6] + gU0[index + 6]) +
                         W[5] * (gU0[index - 5] + gU0[index + 5]) +
                         W[4] * (gU0[index - 4] + gU0[index + 4]) +
                         W[3] * (gU0[index - 3] + gU0[index + 3]) +
                         W[2] * (gU0[index - 2] + gU0[index + 2]) +
                         W[1] * (gU0[index - 1] + gU0[index + 1]) +
                         W[0] * gU0[index]) +
                    FATMDFY * gVorg[index] * gVorg[index] *
                        (+W[6] *
                             (gU0[index - 6 * nnoi] + gU0[index + 6 * nnoi]) +
                         W[5] *
                             (gU0[index - 5 * nnoi] + gU0[index + 5 * nnoi]) +
                         W[4] *
                             (gU0[index - 4 * nnoi] + gU0[index + 4 * nnoi]) +
                         W[3] *
                             (gU0[index - 3 * nnoi] + gU0[index + 3 * nnoi]) +
                         W[2] *
                             (gU0[index - 2 * nnoi] + gU0[index + 2 * nnoi]) +
                         W[1] * (gU0[index - nnoi] + gU0[index + nnoi]) +
                         W[0] * gU0[index]) +
                    FATMDFZ * gVorg[index] * gVorg[index] *
                        (+W[6] * (gU0[index + 6 * stride] +
                                  gU0[index - 6 * stride]) +
                         W[5] * (gU0[index + 5 * stride] +
                                 gU0[index - 5 * stride]) +
                         W[4] * (gU0[index + 4 * stride] +
                                 gU0[index - 4 * stride]) +
                         W[3] * (gU0[index + 3 * stride] +
                                 gU0[index - 3 * stride]) +
                         W[2] * (gU0[index + 2 * stride] +
                                 gU0[index - 2 * stride]) +
                         W[1] * (gU0[index + stride] + gU0[index - stride]) +
                         W[0] * gU0[index]);
              }
            }
          }
}


x86 assembly (clang, -O0):
<kernel_CPU_06_mod_3DRhoCte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%eax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    %r9d,-0x24(%rbp)
movss  %xmm0,-0x28(%rbp)
movss  %xmm1,-0x2c(%rbp)
movss  %xmm2,-0x30(%rbp)
mov    -0x1c(%rbp),%eax
imul   -0x20(%rbp),%eax
mov    %eax,-0x48(%rbp)
movl   $0x0,-0x38(%rbp)
mov    -0x38(%rbp),%eax
cmp    -0x20(%rbp),%eax
jge    181c <kernel_CPU_06_mod_3DRhoCte+0x71c>
movl   $0x0,-0x50(%rbp)
mov    -0x50(%rbp),%eax
mov    0x10(%rbp),%ecx
sub    -0x24(%rbp),%ecx
cmp    %ecx,%eax
jge    1809 <kernel_CPU_06_mod_3DRhoCte+0x709>
movl   $0x0,-0x34(%rbp)
mov    -0x34(%rbp),%eax
cmp    -0x1c(%rbp),%eax
jge    17f6 <kernel_CPU_06_mod_3DRhoCte+0x6f6>
mov    -0x38(%rbp),%eax
mov    %eax,-0x40(%rbp)
mov    -0x40(%rbp),%eax
mov    %eax,-0x78(%rbp)
mov    -0x20(%rbp),%eax
mov    %eax,-0x54(%rbp)
mov    -0x38(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x58(%rbp)
mov    -0x54(%rbp),%eax
cmp    -0x58(%rbp),%eax
jge    11af <kernel_CPU_06_mod_3DRhoCte+0xaf>
mov    -0x54(%rbp),%eax
mov    %eax,-0x7c(%rbp)
jmp    11b5 <kernel_CPU_06_mod_3DRhoCte+0xb5>
mov    -0x58(%rbp),%eax
mov    %eax,-0x7c(%rbp)
mov    -0x78(%rbp),%eax
mov    -0x7c(%rbp),%ecx
mov    %ecx,-0x5c(%rbp)
cmp    -0x5c(%rbp),%eax
jge    17e3 <kernel_CPU_06_mod_3DRhoCte+0x6e3>
mov    -0x50(%rbp),%eax
mov    %eax,-0x44(%rbp)
mov    -0x44(%rbp),%eax
mov    %eax,-0x80(%rbp)
mov    0x10(%rbp),%eax
sub    -0x24(%rbp),%eax
mov    %eax,-0x60(%rbp)
mov    -0x50(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x64(%rbp)
mov    -0x60(%rbp),%eax
cmp    -0x64(%rbp),%eax
jge    11ff <kernel_CPU_06_mod_3DRhoCte+0xff>
mov    -0x60(%rbp),%eax
mov    %eax,-0x84(%rbp)
jmp    1208 <kernel_CPU_06_mod_3DRhoCte+0x108>
mov    -0x64(%rbp),%eax
mov    %eax,-0x84(%rbp)
mov    -0x80(%rbp),%eax
mov    -0x84(%rbp),%ecx
mov    %ecx,-0x68(%rbp)
cmp    -0x68(%rbp),%eax
jge    17d0 <kernel_CPU_06_mod_3DRhoCte+0x6d0>
mov    -0x34(%rbp),%eax
mov    %eax,-0x3c(%rbp)
mov    -0x3c(%rbp),%eax
mov    %eax,-0x88(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x6c(%rbp)
mov    -0x34(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x70(%rbp)
mov    -0x6c(%rbp),%eax
cmp    -0x70(%rbp),%eax
jge    1255 <kernel_CPU_06_mod_3DRhoCte+0x155>
mov    -0x6c(%rbp),%eax
mov    %eax,-0x8c(%rbp)
jmp    125e <kernel_CPU_06_mod_3DRhoCte+0x15e>
mov    -0x70(%rbp),%eax
mov    %eax,-0x8c(%rbp)
mov    -0x88(%rbp),%eax
mov    -0x8c(%rbp),%ecx
mov    %ecx,-0x74(%rbp)
cmp    -0x74(%rbp),%eax
jge    17bd <kernel_CPU_06_mod_3DRhoCte+0x6bd>
mov    -0x40(%rbp),%eax
imul   -0x1c(%rbp),%eax
add    -0x3c(%rbp),%eax
mov    -0x24(%rbp),%ecx
add    -0x44(%rbp),%ecx
imul   -0x48(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0x4c(%rbp)
mov    -0x18(%rbp),%rax
movslq -0x4c(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jbe    17aa <kernel_CPU_06_mod_3DRhoCte+0x6aa>
mov    -0x8(%rbp),%rax
movslq -0x4c(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm1
mov    -0x10(%rbp),%rax
movslq -0x4c(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
addss  %xmm1,%xmm1
addss  %xmm0,%xmm1
movss  -0x28(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movslq -0x4c(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm0
mov    -0x18(%rbp),%rax
movslq -0x4c(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm0
mov    0x18(%rbp),%rax
movss  0x18(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
sub    $0x6,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
add    $0x6,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mov    0x18(%rbp),%rax
movss  0x14(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
sub    $0x5,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm5
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
add    $0x5,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm5
mulss  %xmm5,%xmm2
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  0x10(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
sub    $0x4,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
add    $0x4,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mov    0x18(%rbp),%rax
movss  0xc(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
sub    $0x3,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
add    $0x3,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  0x8(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
sub    $0x2,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
add    $0x2,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mov    0x18(%rbp),%rax
movss  0x4(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movslq -0x4c(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  -0x2c(%rbp),%xmm1
mov    -0x18(%rbp),%rax
movslq -0x4c(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm1
mov    -0x18(%rbp),%rax
movslq -0x4c(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm1
mov    0x18(%rbp),%rax
movss  0x18(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
imul   $0x6,-0x1c(%rbp),%edx
sub    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
imul   $0x6,-0x1c(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mov    0x18(%rbp),%rax
movss  0x14(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
imul   $0x5,-0x1c(%rbp),%edx
sub    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm5
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
imul   $0x5,-0x1c(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm5
mulss  %xmm5,%xmm2
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  0x10(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
mov    -0x1c(%rbp),%edx
shl    $0x2,%edx
sub    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
mov    -0x1c(%rbp),%edx
shl    $0x2,%edx
add    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mov    0x18(%rbp),%rax
movss  0xc(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
imul   $0x3,-0x1c(%rbp),%edx
sub    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
imul   $0x3,-0x1c(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  0x8(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
mov    -0x1c(%rbp),%edx
shl    $0x1,%edx
sub    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
mov    -0x1c(%rbp),%edx
shl    $0x1,%edx
add    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mov    0x18(%rbp),%rax
movss  0x4(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
sub    -0x1c(%rbp),%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
add    -0x1c(%rbp),%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movslq -0x4c(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mulss  %xmm2,%xmm1
addss  %xmm0,%xmm1
movss  -0x30(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movslq -0x4c(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm0
mov    -0x18(%rbp),%rax
movslq -0x4c(%rbp),%rcx
mulss  (%rax,%rcx,4),%xmm0
mov    0x18(%rbp),%rax
movss  0x18(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
imul   $0x6,-0x48(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
imul   $0x6,-0x48(%rbp),%edx
sub    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mov    0x18(%rbp),%rax
movss  0x14(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
imul   $0x5,-0x48(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm5
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
imul   $0x5,-0x48(%rbp),%edx
sub    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm5
mulss  %xmm5,%xmm2
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  0x10(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
mov    -0x48(%rbp),%edx
shl    $0x2,%edx
add    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
mov    -0x48(%rbp),%edx
shl    $0x2,%edx
sub    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mov    0x18(%rbp),%rax
movss  0xc(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
imul   $0x3,-0x48(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
imul   $0x3,-0x48(%rbp),%edx
sub    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  0x8(%rax),%xmm2
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
mov    -0x48(%rbp),%edx
shl    $0x1,%edx
add    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
mov    -0x48(%rbp),%edx
shl    $0x1,%edx
sub    %edx,%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mov    0x18(%rbp),%rax
movss  0x4(%rax),%xmm3
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
add    -0x48(%rbp),%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm4
mov    -0x8(%rbp),%rax
mov    -0x4c(%rbp),%ecx
sub    -0x48(%rbp),%ecx
movslq %ecx,%rcx
addss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm3
addss  %xmm2,%xmm3
mov    0x18(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movslq -0x4c(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm4
mulss  %xmm4,%xmm2
addss  %xmm3,%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
mov    -0x10(%rbp),%rax
movslq -0x4c(%rbp),%rcx
movss  %xmm0,(%rax,%rcx,4)
jmp    17af <kernel_CPU_06_mod_3DRhoCte+0x6af>
mov    -0x3c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x3c(%rbp)
jmp    1223 <kernel_CPU_06_mod_3DRhoCte+0x123>
jmp    17c2 <kernel_CPU_06_mod_3DRhoCte+0x6c2>
mov    -0x44(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x44(%rbp)
jmp    11cd <kernel_CPU_06_mod_3DRhoCte+0xcd>
jmp    17d5 <kernel_CPU_06_mod_3DRhoCte+0x6d5>
mov    -0x40(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x40(%rbp)
jmp    1183 <kernel_CPU_06_mod_3DRhoCte+0x83>
jmp    17e8 <kernel_CPU_06_mod_3DRhoCte+0x6e8>
mov    -0x34(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x34(%rbp)
jmp    1171 <kernel_CPU_06_mod_3DRhoCte+0x71>
jmp    17fb <kernel_CPU_06_mod_3DRhoCte+0x6fb>
mov    -0x50(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x50(%rbp)
jmp    1159 <kernel_CPU_06_mod_3DRhoCte+0x59>
jmp    180e <kernel_CPU_06_mod_3DRhoCte+0x70e>
mov    -0x38(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x38(%rbp)
jmp    1146 <kernel_CPU_06_mod_3DRhoCte+0x46>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kernel_CPU_06_mod_3DRhoCte>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
sub    $0x598,%rsp
movss  %xmm2,-0x3c(%rsp)
movss  %xmm1,-0x40(%rsp)
movss  %xmm0,-0x44(%rsp)
mov    %rcx,-0x70(%rsp)
mov    %rsi,0x590(%rsp)
test   %r8d,%r8d
jle    2778 <kernel_CPU_06_mod_3DRhoCte+0x1678>
mov    0x5d0(%rsp),%esi
mov    %r8d,%eax
mov    -0x70(%rsp),%rcx
imul   %ecx,%eax
sub    %r9d,%esi
mov    %r9d,%ebp
imul   %r8d,%ebp
mov    %ebp,%r10d
imul   %ecx,%r10d
lea    0x6(%r9),%ebx
imul   %eax,%ebx
mov    %rbx,0xd0(%rsp)
lea    -0x6(%r9),%ebx
imul   %eax,%ebx
mov    %rbx,0xc8(%rsp)
lea    0x5(%r9),%ebx
imul   %eax,%ebx
mov    %rbx,0xc0(%rsp)
lea    -0x5(%r9),%ebx
imul   %eax,%ebx
mov    %rbx,0xb8(%rsp)
lea    0x4(%r9),%ebx
imul   %eax,%ebx
mov    %rbx,0xb0(%rsp)
lea    -0x4(%r9),%ebx
imul   %eax,%ebx
mov    %rbx,0xa8(%rsp)
lea    0x3(%r9),%ebx
imul   %eax,%ebx
mov    %rbx,0xa0(%rsp)
lea    -0x3(%r9),%ebx
imul   %eax,%ebx
mov    %rbx,0x98(%rsp)
lea    0x2(%r9),%ebx
imul   %eax,%ebx
mov    %rbx,0x90(%rsp)
lea    -0x2(%r9),%ebx
imul   %eax,%ebx
mov    %rbx,0x88(%rsp)
lea    0x1(%r9),%ebx
imul   %eax,%ebx
mov    %rbx,0x80(%rsp)
add    $0xffffffff,%r9d
imul   %eax,%r9d
mov    %r9,0xe8(%rsp)
lea    (%rax,%rax,1),%ebx
mov    %rbx,0x580(%rsp)
mov    %eax,%r12d
mov    %r10d,%eax
add    $0x1,%eax
mov    %rax,0x78(%rsp)
lea    -0x6(%rbp),%eax
imul   %ecx,%eax
mov    %rax,0x70(%rsp)
lea    0x6(%rbp),%eax
imul   %ecx,%eax
mov    %rax,0x68(%rsp)
lea    -0x5(%rbp),%eax
imul   %ecx,%eax
mov    %rax,0x60(%rsp)
lea    0x5(%rbp),%eax
imul   %ecx,%eax
mov    %rax,0x58(%rsp)
lea    -0x4(%rbp),%eax
imul   %ecx,%eax
mov    %rax,0x50(%rsp)
lea    0x4(%rbp),%eax
imul   %ecx,%eax
mov    %rax,0x48(%rsp)
lea    -0x3(%rbp),%eax
imul   %ecx,%eax
mov    %rax,0x40(%rsp)
lea    0x3(%rbp),%eax
imul   %ecx,%eax
mov    %rax,0x38(%rsp)
lea    -0x2(%rbp),%eax
imul   %ecx,%eax
mov    %rax,0x30(%rsp)
lea    0x2(%rbp),%eax
imul   %ecx,%eax
mov    %rax,0x28(%rsp)
lea    -0x1(%rbp),%eax
imul   %ecx,%eax
mov    %rax,0x20(%rsp)
add    $0x1,%ebp
imul   %ecx,%ebp
mov    %rbp,0xe0(%rsp)
xorps  %xmm0,%xmm0
lea    (%rcx,%rcx,1),%eax
mov    %rax,0x578(%rsp)
lea    -0x1(%r10),%eax
mov    %rax,0x18(%rsp)
mov    %ecx,%eax
mov    %rax,0x588(%rsp)
lea    -0x2(%r10),%eax
mov    %rax,0x10(%rsp)
lea    -0x3(%r10),%eax
mov    %rax,0x8(%rsp)
lea    -0x4(%r10),%eax
mov    %rax,(%rsp)
lea    -0x5(%r10),%eax
mov    %rax,-0x8(%rsp)
lea    -0x6(%r10),%eax
mov    %rax,-0x10(%rsp)
lea    0x6(%r10),%eax
mov    %rax,-0x18(%rsp)
lea    0x5(%r10),%eax
mov    %rax,-0x20(%rsp)
lea    0x4(%r10),%eax
mov    %rax,-0x28(%rsp)
lea    0x3(%r10),%eax
mov    %rax,-0x30(%rsp)
mov    %r10,0xd8(%rsp)
lea    0x2(%r10),%eax
mov    %rax,-0x38(%rsp)
xor    %r9d,%r9d
mov    $0x2,%ecx
mov    %r8d,-0x80(%rsp)
mov    %esi,-0x78(%rsp)
mov    0x590(%rsp),%r11
jmp    1466 <kernel_CPU_06_mod_3DRhoCte+0x366>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    -0x68(%rsp),%ecx
add    $0x2,%ecx
mov    0x578(%rsp),%rax
add    %rax,0x18(%rsp)
add    %rax,0x10(%rsp)
add    %rax,0x8(%rsp)
add    %rax,(%rsp)
add    %rax,-0x8(%rsp)
add    %rax,-0x10(%rsp)
add    %rax,0xd8(%rsp)
add    %rax,-0x18(%rsp)
add    %rax,-0x20(%rsp)
add    %rax,-0x28(%rsp)
add    %rax,-0x30(%rsp)
add    %rax,-0x38(%rsp)
add    %rax,0x78(%rsp)
add    %rax,0x70(%rsp)
add    %rax,0x68(%rsp)
add    %rax,0x60(%rsp)
add    %rax,0x58(%rsp)
add    %rax,0x50(%rsp)
add    %rax,0x48(%rsp)
add    %rax,0x40(%rsp)
add    %rax,0x38(%rsp)
add    %rax,0x30(%rsp)
add    %rax,0x28(%rsp)
add    %rax,0x20(%rsp)
add    %rax,0xe0(%rsp)
add    %rax,0xd0(%rsp)
add    %rax,0xc8(%rsp)
add    %rax,0xc0(%rsp)
add    %rax,0xb8(%rsp)
add    %rax,0xb0(%rsp)
add    %rax,0xa8(%rsp)
add    %rax,0xa0(%rsp)
add    %rax,0x98(%rsp)
add    %rax,0x90(%rsp)
add    %rax,0x88(%rsp)
add    %rax,0x80(%rsp)
add    %rax,0xe8(%rsp)
mov    -0x7c(%rsp),%eax
mov    %eax,%r9d
mov    -0x80(%rsp),%r8d
cmp    %r8d,%eax
jge    2778 <kernel_CPU_06_mod_3DRhoCte+0x1678>
cmp    %ecx,%r8d
mov    %ecx,-0x68(%rsp)
cmovl  %r8d,%ecx
mov    %ecx,-0x5c(%rsp)
lea    0x2(%r9),%eax
mov    %eax,-0x7c(%rsp)
test   %esi,%esi
jle    1360 <kernel_CPU_06_mod_3DRhoCte+0x260>
mov    -0x80(%rsp),%eax
mov    -0x7c(%rsp),%ecx
cmp    %eax,%ecx
cmovg  %eax,%ecx
mov    %ecx,-0x60(%rsp)
xor    %r8d,%r8d
mov    $0x2,%ecx
mov    0xe8(%rsp),%rax
mov    %rax,0x210(%rsp)
mov    0x80(%rsp),%rax
mov    %rax,0x208(%rsp)
mov    0x88(%rsp),%rax
mov    %rax,0x200(%rsp)
mov    0x90(%rsp),%rax
mov    %rax,0x1f8(%rsp)
mov    0x98(%rsp),%rax
mov    %rax,0x1f0(%rsp)
mov    0xa0(%rsp),%rax
mov    %rax,0x1e8(%rsp)
mov    0xa8(%rsp),%rax
mov    %rax,0x1e0(%rsp)
mov    0xb0(%rsp),%rax
mov    %rax,0x1d8(%rsp)
mov    0xb8(%rsp),%rax
mov    %rax,0x1d0(%rsp)
mov    0xc0(%rsp),%rax
mov    %rax,0x1c8(%rsp)
mov    0xc8(%rsp),%rax
mov    %rax,0x1c0(%rsp)
mov    0xd0(%rsp),%rax
mov    %rax,0x1b8(%rsp)
mov    0xe0(%rsp),%rax
mov    %rax,0x1b0(%rsp)
mov    0x20(%rsp),%rax
mov    %rax,0x1a8(%rsp)
mov    0x28(%rsp),%rax
mov    %rax,0x1a0(%rsp)
mov    0x30(%rsp),%rax
mov    %rax,0x198(%rsp)
mov    0x38(%rsp),%rax
mov    %rax,0x190(%rsp)
mov    0x40(%rsp),%rax
mov    %rax,0x188(%rsp)
mov    0x48(%rsp),%rax
mov    %rax,0x180(%rsp)
mov    0x50(%rsp),%rax
mov    %rax,0x178(%rsp)
mov    0x58(%rsp),%rax
mov    %rax,0x170(%rsp)
mov    0x60(%rsp),%rax
mov    %rax,0x168(%rsp)
mov    0x68(%rsp),%rax
mov    %rax,0x160(%rsp)
mov    0x70(%rsp),%rax
mov    %rax,0x158(%rsp)
mov    0x78(%rsp),%rax
mov    %rax,0x150(%rsp)
mov    -0x38(%rsp),%rax
mov    %rax,0x148(%rsp)
mov    -0x30(%rsp),%rax
mov    %rax,0x140(%rsp)
mov    -0x28(%rsp),%rax
mov    %rax,0x138(%rsp)
mov    -0x20(%rsp),%rax
mov    %rax,0x130(%rsp)
mov    -0x18(%rsp),%rax
mov    %rax,0x128(%rsp)
mov    0xd8(%rsp),%rax
mov    %rax,0x120(%rsp)
mov    -0x10(%rsp),%rax
mov    %rax,0x118(%rsp)
mov    -0x8(%rsp),%rax
mov    %rax,0x110(%rsp)
mov    (%rsp),%rax
mov    %rax,0x108(%rsp)
mov    0x8(%rsp),%rax
mov    %rax,0x100(%rsp)
mov    0x10(%rsp),%rax
mov    %rax,0xf8(%rsp)
mov    0x18(%rsp),%rax
mov    %rax,0xf0(%rsp)
mov    %r9,0x218(%rsp)
jmp    180a <kernel_CPU_06_mod_3DRhoCte+0x70a>
cs nopw 0x0(%rax,%rax,1)
nop
mov    -0x64(%rsp),%ecx
add    $0x2,%ecx
mov    0x580(%rsp),%rax
add    %rax,0xf0(%rsp)
add    %rax,0xf8(%rsp)
add    %rax,0x100(%rsp)
add    %rax,0x108(%rsp)
add    %rax,0x110(%rsp)
add    %rax,0x118(%rsp)
add    %rax,0x120(%rsp)
add    %rax,0x128(%rsp)
add    %rax,0x130(%rsp)
add    %rax,0x138(%rsp)
add    %rax,0x140(%rsp)
add    %rax,0x148(%rsp)
add    %rax,0x150(%rsp)
add    %rax,0x158(%rsp)
add    %rax,0x160(%rsp)
add    %rax,0x168(%rsp)
add    %rax,0x170(%rsp)
add    %rax,0x178(%rsp)
add    %rax,0x180(%rsp)
add    %rax,0x188(%rsp)
add    %rax,0x190(%rsp)
add    %rax,0x198(%rsp)
add    %rax,0x1a0(%rsp)
add    %rax,0x1a8(%rsp)
add    %rax,0x1b0(%rsp)
add    %rax,0x1b8(%rsp)
add    %rax,0x1c0(%rsp)
add    %rax,0x1c8(%rsp)
add    %rax,0x1d0(%rsp)
add    %rax,0x1d8(%rsp)
add    %rax,0x1e0(%rsp)
add    %rax,0x1e8(%rsp)
add    %rax,0x1f0(%rsp)
add    %rax,0x1f8(%rsp)
add    %rax,0x200(%rsp)
add    %rax,0x208(%rsp)
add    %rax,0x210(%rsp)
mov    -0x74(%rsp),%eax
mov    %eax,%r8d
mov    -0x78(%rsp),%esi
cmp    %esi,%eax
jge    1360 <kernel_CPU_06_mod_3DRhoCte+0x260>
cmp    %esi,%ecx
mov    %ecx,-0x64(%rsp)
cmovl  %ecx,%esi
mov    %esi,-0x50(%rsp)
lea    0x2(%r8),%eax
mov    %eax,-0x74(%rsp)
cmpl   $0x0,-0x70(%rsp)
jle    16c0 <kernel_CPU_06_mod_3DRhoCte+0x5c0>
mov    -0x78(%rsp),%eax
mov    -0x74(%rsp),%ecx
cmp    %ecx,%eax
cmovl  %eax,%ecx
mov    %ecx,-0x58(%rsp)
mov    0x210(%rsp),%rax
mov    %rax,0x340(%rsp)
mov    0x208(%rsp),%rax
mov    %rax,0x338(%rsp)
mov    0x200(%rsp),%rax
mov    %rax,0x330(%rsp)
mov    0x1f8(%rsp),%rax
mov    %rax,0x328(%rsp)
mov    0x1f0(%rsp),%rax
mov    %rax,0x320(%rsp)
mov    0x1e8(%rsp),%rax
mov    %rax,0x318(%rsp)
mov    0x1e0(%rsp),%rax
mov    %rax,0x310(%rsp)
mov    0x1d8(%rsp),%rax
mov    %rax,0x308(%rsp)
mov    0x1d0(%rsp),%rax
mov    %rax,0x300(%rsp)
mov    0x1c8(%rsp),%rax
mov    %rax,0x2f8(%rsp)
mov    0x1c0(%rsp),%rax
mov    %rax,0x2f0(%rsp)
mov    0x1b8(%rsp),%rax
mov    %rax,0x2e8(%rsp)
mov    0x1b0(%rsp),%rax
mov    %rax,0x2e0(%rsp)
mov    0x1a8(%rsp),%rax
mov    %rax,0x2d8(%rsp)
mov    0x1a0(%rsp),%rax
mov    %rax,0x2d0(%rsp)
mov    0x198(%rsp),%rax
mov    %rax,0x2c8(%rsp)
mov    0x190(%rsp),%rax
mov    %rax,0x2c0(%rsp)
mov    0x188(%rsp),%rax
mov    %rax,0x2b8(%rsp)
mov    0x180(%rsp),%rax
mov    %rax,0x2b0(%rsp)
mov    0x178(%rsp),%rax
mov    %rax,0x2a8(%rsp)
mov    0x170(%rsp),%rax
mov    %rax,0x2a0(%rsp)
mov    0x168(%rsp),%rax
mov    %rax,0x298(%rsp)
mov    0x160(%rsp),%rax
mov    %rax,0x290(%rsp)
mov    0x158(%rsp),%rax
mov    %rax,0x288(%rsp)
mov    0x150(%rsp),%rax
mov    %rax,0x280(%rsp)
mov    0x148(%rsp),%rax
mov    %rax,0x278(%rsp)
mov    0x140(%rsp),%rax
mov    %rax,0x270(%rsp)
mov    0x138(%rsp),%rax
mov    %rax,0x268(%rsp)
mov    0x130(%rsp),%rax
mov    %rax,0x260(%rsp)
mov    0x128(%rsp),%rax
mov    %rax,0x258(%rsp)
mov    0x120(%rsp),%rax
mov    %rax,0x250(%rsp)
mov    0x118(%rsp),%rax
mov    %rax,0x248(%rsp)
mov    0x110(%rsp),%rax
mov    %rax,0x240(%rsp)
mov    0x108(%rsp),%rax
mov    %rax,0x238(%rsp)
mov    0x100(%rsp),%rax
mov    %rax,0x230(%rsp)
mov    0xf8(%rsp),%rax
mov    %rax,0x228(%rsp)
mov    0xf0(%rsp),%rax
mov    %rax,0x220(%rsp)
xor    %ebp,%ebp
mov    %r8,0x348(%rsp)
jmp    1c03 <kernel_CPU_06_mod_3DRhoCte+0xb03>
nopw   0x0(%rax,%rax,1)
add    $0x2,%rbp
addq   $0x2,0x220(%rsp)
addq   $0x2,0x228(%rsp)
addq   $0x2,0x230(%rsp)
addq   $0x2,0x238(%rsp)
addq   $0x2,0x240(%rsp)
addq   $0x2,0x248(%rsp)
addq   $0x2,0x250(%rsp)
addq   $0x2,0x258(%rsp)
addq   $0x2,0x260(%rsp)
addq   $0x2,0x268(%rsp)
addq   $0x2,0x270(%rsp)
addq   $0x2,0x278(%rsp)
addq   $0x2,0x280(%rsp)
addq   $0x2,0x288(%rsp)
addq   $0x2,0x290(%rsp)
addq   $0x2,0x298(%rsp)
addq   $0x2,0x2a0(%rsp)
addq   $0x2,0x2a8(%rsp)
addq   $0x2,0x2b0(%rsp)
addq   $0x2,0x2b8(%rsp)
addq   $0x2,0x2c0(%rsp)
addq   $0x2,0x2c8(%rsp)
addq   $0x2,0x2d0(%rsp)
addq   $0x2,0x2d8(%rsp)
addq   $0x2,0x2e0(%rsp)
addq   $0x2,0x2e8(%rsp)
addq   $0x2,0x2f0(%rsp)
addq   $0x2,0x2f8(%rsp)
addq   $0x2,0x300(%rsp)
addq   $0x2,0x308(%rsp)
addq   $0x2,0x310(%rsp)
addq   $0x2,0x318(%rsp)
addq   $0x2,0x320(%rsp)
addq   $0x2,0x328(%rsp)
addq   $0x2,0x330(%rsp)
addq   $0x2,0x338(%rsp)
addq   $0x2,0x340(%rsp)
cmp    -0x70(%rsp),%ebp
mov    0x218(%rsp),%r9
jge    16c0 <kernel_CPU_06_mod_3DRhoCte+0x5c0>
cmp    -0x60(%rsp),%r9d
jge    1aa0 <kernel_CPU_06_mod_3DRhoCte+0x9a0>
lea    0x2(%rbp),%ecx
mov    -0x70(%rsp),%rax
cmp    %eax,%ecx
cmovg  %eax,%ecx
mov    %ecx,-0x4c(%rsp)
movslq %ecx,%r15
mov    0x340(%rsp),%rax
mov    %rax,0x470(%rsp)
mov    0x338(%rsp),%rax
mov    %rax,0x468(%rsp)
mov    0x330(%rsp),%rax
mov    %rax,0x460(%rsp)
mov    0x328(%rsp),%rax
mov    %rax,0x458(%rsp)
mov    0x320(%rsp),%rax
mov    %rax,0x450(%rsp)
mov    0x318(%rsp),%rax
mov    %rax,0x448(%rsp)
mov    0x310(%rsp),%rax
mov    %rax,0x440(%rsp)
mov    0x308(%rsp),%rax
mov    %rax,0x438(%rsp)
mov    0x300(%rsp),%rax
mov    %rax,0x430(%rsp)
mov    0x2f8(%rsp),%rax
mov    %rax,0x428(%rsp)
mov    0x2f0(%rsp),%rax
mov    %rax,0x420(%rsp)
mov    0x2e8(%rsp),%rax
mov    %rax,0x418(%rsp)
mov    0x2e0(%rsp),%rax
mov    %rax,0x410(%rsp)
mov    0x2d8(%rsp),%rax
mov    %rax,0x408(%rsp)
mov    0x2d0(%rsp),%rax
mov    %rax,0x400(%rsp)
mov    0x2c8(%rsp),%rax
mov    %rax,0x3f8(%rsp)
mov    0x2c0(%rsp),%rax
mov    %rax,0x3f0(%rsp)
mov    0x2b8(%rsp),%rax
mov    %rax,0x3e8(%rsp)
mov    0x2b0(%rsp),%rax
mov    %rax,0x3e0(%rsp)
mov    0x2a8(%rsp),%rax
mov    %rax,0x3d8(%rsp)
mov    0x2a0(%rsp),%rax
mov    %rax,0x3d0(%rsp)
mov    0x298(%rsp),%rax
mov    %rax,0x3c8(%rsp)
mov    0x290(%rsp),%rax
mov    %rax,0x3c0(%rsp)
mov    0x288(%rsp),%rax
mov    %rax,0x3b8(%rsp)
mov    0x280(%rsp),%rax
mov    %rax,0x3b0(%rsp)
mov    0x278(%rsp),%rax
mov    %rax,0x3a8(%rsp)
mov    0x270(%rsp),%rax
mov    %rax,0x3a0(%rsp)
mov    0x268(%rsp),%rax
mov    %rax,0x398(%rsp)
mov    0x260(%rsp),%rax
mov    %rax,0x390(%rsp)
mov    0x258(%rsp),%rax
mov    %rax,0x388(%rsp)
mov    0x250(%rsp),%rax
mov    %rax,0x380(%rsp)
mov    0x248(%rsp),%rax
mov    %rax,0x378(%rsp)
mov    0x240(%rsp),%rax
mov    %rax,0x370(%rsp)
mov    0x238(%rsp),%rax
mov    %rax,0x368(%rsp)
mov    0x230(%rsp),%rax
mov    %rax,0x360(%rsp)
mov    0x228(%rsp),%rax
mov    %rax,0x358(%rsp)
mov    0x220(%rsp),%rax
mov    %rax,0x350(%rsp)
mov    0x218(%rsp),%rax
mov    %eax,%ecx
jmp    1fd9 <kernel_CPU_06_mod_3DRhoCte+0xed9>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    -0x54(%rsp),%ecx
add    $0x1,%ecx
mov    0x588(%rsp),%rax
add    %rax,0x350(%rsp)
add    %rax,0x358(%rsp)
add    %rax,0x360(%rsp)
add    %rax,0x368(%rsp)
add    %rax,0x370(%rsp)
add    %rax,0x378(%rsp)
add    %rax,0x380(%rsp)
add    %rax,0x388(%rsp)
add    %rax,0x390(%rsp)
add    %rax,0x398(%rsp)
add    %rax,0x3a0(%rsp)
add    %rax,0x3a8(%rsp)
add    %rax,0x3b0(%rsp)
add    %rax,0x3b8(%rsp)
add    %rax,0x3c0(%rsp)
add    %rax,0x3c8(%rsp)
add    %rax,0x3d0(%rsp)
add    %rax,0x3d8(%rsp)
add    %rax,0x3e0(%rsp)
add    %rax,0x3e8(%rsp)
add    %rax,0x3f0(%rsp)
add    %rax,0x3f8(%rsp)
add    %rax,0x400(%rsp)
add    %rax,0x408(%rsp)
add    %rax,0x410(%rsp)
add    %rax,0x418(%rsp)
add    %rax,0x420(%rsp)
add    %rax,0x428(%rsp)
add    %rax,0x430(%rsp)
add    %rax,0x438(%rsp)
add    %rax,0x440(%rsp)
add    %rax,0x448(%rsp)
add    %rax,0x450(%rsp)
add    %rax,0x458(%rsp)
add    %rax,0x460(%rsp)
add    %rax,0x468(%rsp)
add    %rax,0x470(%rsp)
cmp    -0x5c(%rsp),%ecx
mov    0x348(%rsp),%r8
je     1aa0 <kernel_CPU_06_mod_3DRhoCte+0x9a0>
mov    %ecx,-0x54(%rsp)
cmp    -0x58(%rsp),%r8d
jge    1e90 <kernel_CPU_06_mod_3DRhoCte+0xd90>
mov    0x470(%rsp),%rax
mov    %rax,0x570(%rsp)
mov    0x468(%rsp),%rax
mov    %rax,0x568(%rsp)
mov    0x460(%rsp),%rax
mov    %rax,0x560(%rsp)
mov    0x458(%rsp),%rax
mov    %rax,0x558(%rsp)
mov    0x450(%rsp),%rax
mov    %rax,0x550(%rsp)
mov    0x448(%rsp),%rax
mov    %rax,0x548(%rsp)
mov    0x440(%rsp),%rax
mov    %rax,0x540(%rsp)
mov    0x438(%rsp),%rax
mov    %rax,0x538(%rsp)
mov    0x430(%rsp),%rax
mov    %rax,0x530(%rsp)
mov    0x428(%rsp),%rax
mov    %rax,0x528(%rsp)
mov    0x420(%rsp),%rax
mov    %rax,0x520(%rsp)
mov    0x418(%rsp),%rax
mov    %rax,0x518(%rsp)
mov    0x410(%rsp),%rax
mov    %rax,0x510(%rsp)
mov    0x408(%rsp),%rax
mov    %rax,0x508(%rsp)
mov    0x400(%rsp),%rax
mov    %rax,0x500(%rsp)
mov    0x3f8(%rsp),%rax
mov    %rax,0x4f8(%rsp)
mov    0x3f0(%rsp),%rax
mov    %rax,0x4f0(%rsp)
mov    0x3e8(%rsp),%rax
mov    %rax,0x4e8(%rsp)
mov    0x3e0(%rsp),%rax
mov    %rax,0x4e0(%rsp)
mov    0x3d8(%rsp),%rax
mov    %rax,0x4d8(%rsp)
mov    0x3d0(%rsp),%rax
mov    %rax,0x4d0(%rsp)
mov    0x3c8(%rsp),%rax
mov    %rax,0x4c8(%rsp)
mov    0x3c0(%rsp),%rax
mov    %rax,0x4c0(%rsp)
mov    0x3b8(%rsp),%rax
mov    %rax,0x4b8(%rsp)
mov    0x3b0(%rsp),%rax
mov    %rax,0x4b0(%rsp)
mov    0x3a8(%rsp),%rax
mov    %rax,0x4a8(%rsp)
mov    0x3a0(%rsp),%rax
mov    %rax,0x4a0(%rsp)
mov    0x398(%rsp),%rax
mov    %rax,0x498(%rsp)
mov    0x390(%rsp),%rax
mov    %rax,0x490(%rsp)
mov    0x388(%rsp),%rax
mov    %rax,0x488(%rsp)
mov    0x380(%rsp),%r13
mov    0x378(%rsp),%rax
mov    %rax,0x480(%rsp)
mov    0x370(%rsp),%rax
mov    %rax,0x478(%rsp)
mov    0x368(%rsp),%r9
mov    0x360(%rsp),%r10
mov    0x358(%rsp),%r14
mov    0x350(%rsp),%rsi
mov    0x348(%rsp),%rcx
mov    %ecx,%eax
jmp    2340 <kernel_CPU_06_mod_3DRhoCte+0x1240>
nop
mov    -0x48(%rsp),%eax
add    $0x1,%eax
add    %r12,%rsi
add    %r12,%r14
add    %r12,%r10
add    %r12,%r9
add    %r12,0x478(%rsp)
add    %r12,0x480(%rsp)
add    %r12,%r13
add    %r12,0x488(%rsp)
add    %r12,0x490(%rsp)
add    %r12,0x498(%rsp)
add    %r12,0x4a0(%rsp)
add    %r12,0x4a8(%rsp)
add    %r12,0x4b0(%rsp)
add    %r12,0x4b8(%rsp)
add    %r12,0x4c0(%rsp)
add    %r12,0x4c8(%rsp)
add    %r12,0x4d0(%rsp)
add    %r12,0x4d8(%rsp)
add    %r12,0x4e0(%rsp)
add    %r12,0x4e8(%rsp)
add    %r12,0x4f0(%rsp)
add    %r12,0x4f8(%rsp)
add    %r12,0x500(%rsp)
add    %r12,0x508(%rsp)
add    %r12,0x510(%rsp)
add    %r12,0x518(%rsp)
add    %r12,0x520(%rsp)
add    %r12,0x528(%rsp)
add    %r12,0x530(%rsp)
add    %r12,0x538(%rsp)
add    %r12,0x540(%rsp)
add    %r12,0x548(%rsp)
add    %r12,0x550(%rsp)
add    %r12,0x558(%rsp)
add    %r12,0x560(%rsp)
add    %r12,0x568(%rsp)
add    %r12,0x570(%rsp)
cmp    -0x50(%rsp),%eax
je     1e90 <kernel_CPU_06_mod_3DRhoCte+0xd90>
mov    %eax,-0x48(%rsp)
cmp    %ebp,-0x4c(%rsp)
jle    2220 <kernel_CPU_06_mod_3DRhoCte+0x1120>
xor    %r8d,%r8d
jmp    2375 <kernel_CPU_06_mod_3DRhoCte+0x1275>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
lea    (%r8,%rbp,1),%rcx
add    $0x1,%rcx
add    $0x1,%r8
cmp    %r15,%rcx
jge    2220 <kernel_CPU_06_mod_3DRhoCte+0x1120>
lea    (%r8,%r13,1),%ecx
movslq %ecx,%rcx
movss  (%rdx,%rcx,4),%xmm7
ucomiss %xmm0,%xmm7
jbe    2360 <kernel_CPU_06_mod_3DRhoCte+0x1260>
movss  (%rdi,%rcx,4),%xmm15
movaps %xmm15,%xmm3
addss  %xmm15,%xmm3
mov    %rbp,%rax
subss  (%r11,%rcx,4),%xmm3
movaps %xmm7,%xmm5
mulss  -0x44(%rsp),%xmm5
mulss  %xmm7,%xmm5
mov    0x5d8(%rsp),%rbp
movss  0x18(%rbp),%xmm9
mov    0x480(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
movss  (%rdi,%rbx,4),%xmm2
mov    0x488(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
addss  (%rdi,%rbx,4),%xmm2
movss  0x14(%rbp),%xmm10
mov    0x478(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
movss  (%rdi,%rbx,4),%xmm4
mov    0x490(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
addss  (%rdi,%rbx,4),%xmm4
mulss  %xmm10,%xmm4
mulss  %xmm9,%xmm2
addss  %xmm4,%xmm2
movss  0x10(%rbp),%xmm11
lea    (%r9,%r8,1),%ebx
movslq %ebx,%rbx
movss  (%rdi,%rbx,4),%xmm4
mov    0x498(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
addss  (%rdi,%rbx,4),%xmm4
mulss  %xmm11,%xmm4
addss  %xmm2,%xmm4
movss  0xc(%rbp),%xmm12
lea    (%r10,%r8,1),%ebx
movslq %ebx,%rbx
movss  (%rdi,%rbx,4),%xmm2
mov    0x4a0(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
addss  (%rdi,%rbx,4),%xmm2
mulss  %xmm12,%xmm2
addss  %xmm4,%xmm2
movss  0x4(%rbp),%xmm13
movss  0x8(%rbp),%xmm14
lea    (%r14,%r8,1),%ebx
movslq %ebx,%rbx
movss  (%rdi,%rbx,4),%xmm4
mov    0x4a8(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
addss  (%rdi,%rbx,4),%xmm4
mulss  %xmm14,%xmm4
addss  %xmm2,%xmm4
lea    (%rsi,%r8,1),%ebx
movslq %ebx,%rbx
movss  (%rdi,%rbx,4),%xmm6
mov    0x4b0(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
addss  (%rdi,%rbx,4),%xmm6
mulss  %xmm13,%xmm6
addss  %xmm4,%xmm6
mulss  0x0(%rbp),%xmm15
addss  %xmm15,%xmm6
mulss  %xmm5,%xmm6
addss  %xmm3,%xmm6
movaps %xmm7,%xmm5
mulss  -0x40(%rsp),%xmm5
mulss  %xmm7,%xmm5
mov    0x4b8(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
movss  (%rdi,%rbx,4),%xmm2
mov    0x4c0(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
addss  (%rdi,%rbx,4),%xmm2
mov    0x4c8(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
movss  (%rdi,%rbx,4),%xmm3
mov    0x4d0(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
addss  (%rdi,%rbx,4),%xmm3
mulss  %xmm10,%xmm3
mulss  %xmm9,%xmm2
mov    0x4d8(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
movss  (%rdi,%rbx,4),%xmm4
mov    0x4e0(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
addss  (%rdi,%rbx,4),%xmm4
addss  %xmm3,%xmm2
mulss  %xmm11,%xmm4
addss  %xmm2,%xmm4
mov    0x4e8(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
movss  (%rdi,%rbx,4),%xmm3
mov    0x4f0(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
addss  (%rdi,%rbx,4),%xmm3
mulss  %xmm12,%xmm3
addss  %xmm4,%xmm3
mov    0x4f8(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
movss  (%rdi,%rbx,4),%xmm2
mov    0x500(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
addss  (%rdi,%rbx,4),%xmm2
mulss  %xmm14,%xmm2
addss  %xmm3,%xmm2
mov    0x508(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
movss  (%rdi,%rbx,4),%xmm3
mov    0x510(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
addss  (%rdi,%rbx,4),%xmm3
mulss  %xmm13,%xmm3
mov    0x518(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
movss  (%rdi,%rbx,4),%xmm4
mov    0x520(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
addss  (%rdi,%rbx,4),%xmm4
addss  %xmm2,%xmm3
mov    0x528(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
movss  (%rdi,%rbx,4),%xmm8
mov    0x530(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
addss  (%rdi,%rbx,4),%xmm8
addss  %xmm15,%xmm3
mov    0x538(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
movss  (%rdi,%rbx,4),%xmm2
mov    0x540(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
addss  (%rdi,%rbx,4),%xmm2
mulss  %xmm5,%xmm3
mov    0x548(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
movss  (%rdi,%rbx,4),%xmm5
mov    0x550(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
addss  (%rdi,%rbx,4),%xmm5
mov    0x558(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
movss  (%rdi,%rbx,4),%xmm1
mov    0x560(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
addss  (%rdi,%rbx,4),%xmm1
mov    0x568(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
movss  (%rdi,%rbx,4),%xmm0
mov    0x570(%rsp),%rbx
lea    (%rbx,%r8,1),%ebx
movslq %ebx,%rbx
addss  (%rdi,%rbx,4),%xmm0
addss  %xmm6,%xmm3
movaps %xmm7,%xmm6
mulss  -0x3c(%rsp),%xmm6
mulss  %xmm7,%xmm6
mulss  %xmm10,%xmm8
mulss  %xmm9,%xmm4
addss  %xmm8,%xmm4
mulss  %xmm11,%xmm2
addss  %xmm4,%xmm2
mulss  %xmm12,%xmm5
addss  %xmm2,%xmm5
mulss  %xmm14,%xmm1
addss  %xmm5,%xmm1
mulss  %xmm13,%xmm0
addss  %xmm1,%xmm0
addss  %xmm15,%xmm0
mulss  %xmm6,%xmm0
addss  %xmm3,%xmm0
movss  %xmm0,(%r11,%rcx,4)
mov    %rax,%rbp
xorps  %xmm0,%xmm0
jmp    2360 <kernel_CPU_06_mod_3DRhoCte+0x1260>
add    $0x598,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @kernel_CPU_06_mod_3DRhoCte(float* %0, float* %1, float* %2, i32 %3, i32 %4, i32 %5, i32 %6, float %7, float %8, float %9, float* %10) {
%12 = alloca float*
%13 = alloca float*
%14 = alloca float*
%15 = alloca i32
%16 = alloca i32
%17 = alloca i32
%18 = alloca i32
%19 = alloca float
%20 = alloca float
%21 = alloca float
%22 = alloca float*
%23 = alloca i32
%24 = alloca i32
%25 = alloca i32
%26 = alloca i32
%27 = alloca i32
%28 = alloca i32
%29 = alloca i32
%30 = alloca i32
%31 = alloca i32
%32 = alloca i32
%33 = alloca i32
%34 = alloca i32
%35 = alloca i32
%36 = alloca i32
%37 = alloca i32
%38 = alloca i32
%39 = alloca i32
store float* %0, float** %12
store float* %1, float** %13
store float* %2, float** %14
store i32 %3, i32* %15
store i32 %4, i32* %16
store i32 %5, i32* %17
store i32 %6, i32* %18
store float %7, float* %19
store float %8, float* %20
store float %9, float* %21
store float* %10, float** %22
%40 = load i32, i32* %15
%41 = load i32, i32* %16
%42 = mul nsw i32 %40, %41
store i32 %42, i32* %28
store i32 0, i32* %24
br label %43
43: ; preds = %596, %11
%44 = load i32, i32* %24
%45 = load i32, i32* %16
%46 = icmp slt i32 %44, %45
br i1 %46, label %47, label %599
47: ; preds = %43
store i32 0, i32* %30
br label %48
48: ; preds = %592, %47
%49 = load i32, i32* %30
%50 = load i32, i32* %18
%51 = load i32, i32* %17
%52 = sub nsw i32 %50, %51
%53 = icmp slt i32 %49, %52
br i1 %53, label %54, label %595
54: ; preds = %48
store i32 0, i32* %23
br label %55
55: ; preds = %588, %54
%56 = load i32, i32* %23
%57 = load i32, i32* %15
%58 = icmp slt i32 %56, %57
br i1 %58, label %59, label %591
59: ; preds = %55
%60 = load i32, i32* %24
store i32 %60, i32* %26
br label %61
61: ; preds = %584, %59
%62 = load i32, i32* %26
%63 = load i32, i32* %16
store i32 %63, i32* %31
%64 = load i32, i32* %24
%65 = add nsw i32 %64, 2
store i32 %65, i32* %32
%66 = icmp eq i32* %31, %32
%67 = zext i1 %66 to i32
%68 = load i32, i32* %31
%69 = load i32, i32* %32
%70 = icmp slt i32 %68, %69
br i1 %70, label %71, label %73
71: ; preds = %61
%72 = load i32, i32* %31
br label %75
73: ; preds = %61
%74 = load i32, i32* %32
br label %75
75: ; preds = %73, %71
%76 = phi i32 [ %72, %71 ], [ %74, %73 ]
store i32 %76, i32* %33
%77 = load i32, i32* %33
%78 = icmp slt i32 %62, %77
br i1 %78, label %79, label %587
79: ; preds = %75
%80 = load i32, i32* %30
store i32 %80, i32* %27
br label %81
81: ; preds = %580, %79
%82 = load i32, i32* %27
%83 = load i32, i32* %18
%84 = load i32, i32* %17
%85 = sub nsw i32 %83, %84
store i32 %85, i32* %34
%86 = load i32, i32* %30
%87 = add nsw i32 %86, 2
store i32 %87, i32* %35
%88 = icmp eq i32* %34, %35
%89 = zext i1 %88 to i32
%90 = load i32, i32* %34
%91 = load i32, i32* %35
%92 = icmp slt i32 %90, %91
br i1 %92, label %93, label %95
93: ; preds = %81
%94 = load i32, i32* %34
br label %97
95: ; preds = %81
%96 = load i32, i32* %35
br label %97
97: ; preds = %95, %93
%98 = phi i32 [ %94, %93 ], [ %96, %95 ]
store i32 %98, i32* %36
%99 = load i32, i32* %36
%100 = icmp slt i32 %82, %99
br i1 %100, label %101, label %583
101: ; preds = %97
%102 = load i32, i32* %23
store i32 %102, i32* %25
br label %103
103: ; preds = %576, %101
%104 = load i32, i32* %25
%105 = load i32, i32* %15
store i32 %105, i32* %37
%106 = load i32, i32* %23
%107 = add nsw i32 %106, 2
store i32 %107, i32* %38
%108 = icmp eq i32* %37, %38
%109 = zext i1 %108 to i32
%110 = load i32, i32* %37
%111 = load i32, i32* %38
%112 = icmp slt i32 %110, %111
br i1 %112, label %113, label %115
113: ; preds = %103
%114 = load i32, i32* %37
br label %117
115: ; preds = %103
%116 = load i32, i32* %38
br label %117
117: ; preds = %115, %113
%118 = phi i32 [ %114, %113 ], [ %116, %115 ]
store i32 %118, i32* %39
%119 = load i32, i32* %39
%120 = icmp slt i32 %104, %119
br i1 %120, label %121, label %579
121: ; preds = %117
%122 = load i32, i32* %26
%123 = load i32, i32* %15
%124 = mul nsw i32 %122, %123
%125 = load i32, i32* %25
%126 = add nsw i32 %124, %125
%127 = load i32, i32* %17
%128 = load i32, i32* %27
%129 = add nsw i32 %127, %128
%130 = load i32, i32* %28
%131 = mul nsw i32 %129, %130
%132 = add nsw i32 %126, %131
store i32 %132, i32* %29
%133 = load float*, float** %14
%134 = load i32, i32* %29
%135 = sext i32 %134 to i64
%136 = getelementptr inbounds float, float* %133, i64 %135
%137 = load float, float* %136
%138 = fcmp ogt float %137, 0.000000e+00
br i1 %138, label %139, label %575
139: ; preds = %121
%140 = load float*, float** %12
%141 = load i32, i32* %29
%142 = sext i32 %141 to i64
%143 = getelementptr inbounds float, float* %140, i64 %142
%144 = load float, float* %143
%145 = load float*, float** %13
%146 = load i32, i32* %29
%147 = sext i32 %146 to i64
%148 = getelementptr inbounds float, float* %145, i64 %147
%149 = load float, float* %148
%150 = fneg float %149
%151 = call float @llvm.fmuladd.f32(float 2.000000e+00, float %144, float %150)
%152 = load float, float* %19
%153 = load float*, float** %14
%154 = load i32, i32* %29
%155 = sext i32 %154 to i64
%156 = getelementptr inbounds float, float* %153, i64 %155
%157 = load float, float* %156
%158 = fmul float %152, %157
%159 = load float*, float** %14
%160 = load i32, i32* %29
%161 = sext i32 %160 to i64
%162 = getelementptr inbounds float, float* %159, i64 %161
%163 = load float, float* %162
%164 = fmul float %158, %163
%165 = load float*, float** %22
%166 = getelementptr inbounds float, float* %165, i64 6
%167 = load float, float* %166
%168 = load float*, float** %12
%169 = load i32, i32* %29
%170 = sub nsw i32 %169, 6
%171 = sext i32 %170 to i64
%172 = getelementptr inbounds float, float* %168, i64 %171
%173 = load float, float* %172
%174 = load float*, float** %12
%175 = load i32, i32* %29
%176 = add nsw i32 %175, 6
%177 = sext i32 %176 to i64
%178 = getelementptr inbounds float, float* %174, i64 %177
%179 = load float, float* %178
%180 = fadd float %173, %179
%181 = load float*, float** %22
%182 = getelementptr inbounds float, float* %181, i64 5
%183 = load float, float* %182
%184 = load float*, float** %12
%185 = load i32, i32* %29
%186 = sub nsw i32 %185, 5
%187 = sext i32 %186 to i64
%188 = getelementptr inbounds float, float* %184, i64 %187
%189 = load float, float* %188
%190 = load float*, float** %12
%191 = load i32, i32* %29
%192 = add nsw i32 %191, 5
%193 = sext i32 %192 to i64
%194 = getelementptr inbounds float, float* %190, i64 %193
%195 = load float, float* %194
%196 = fadd float %189, %195
%197 = fmul float %183, %196
%198 = call float @llvm.fmuladd.f32(float %167, float %180, float %197)
%199 = load float*, float** %22
%200 = getelementptr inbounds float, float* %199, i64 4
%201 = load float, float* %200
%202 = load float*, float** %12
%203 = load i32, i32* %29
%204 = sub nsw i32 %203, 4
%205 = sext i32 %204 to i64
%206 = getelementptr inbounds float, float* %202, i64 %205
%207 = load float, float* %206
%208 = load float*, float** %12
%209 = load i32, i32* %29
%210 = add nsw i32 %209, 4
%211 = sext i32 %210 to i64
%212 = getelementptr inbounds float, float* %208, i64 %211
%213 = load float, float* %212
%214 = fadd float %207, %213
%215 = call float @llvm.fmuladd.f32(float %201, float %214, float %198)
%216 = load float*, float** %22
%217 = getelementptr inbounds float, float* %216, i64 3
%218 = load float, float* %217
%219 = load float*, float** %12
%220 = load i32, i32* %29
%221 = sub nsw i32 %220, 3
%222 = sext i32 %221 to i64
%223 = getelementptr inbounds float, float* %219, i64 %222
%224 = load float, float* %223
%225 = load float*, float** %12
%226 = load i32, i32* %29
%227 = add nsw i32 %226, 3
%228 = sext i32 %227 to i64
%229 = getelementptr inbounds float, float* %225, i64 %228
%230 = load float, float* %229
%231 = fadd float %224, %230
%232 = call float @llvm.fmuladd.f32(float %218, float %231, float %215)
%233 = load float*, float** %22
%234 = getelementptr inbounds float, float* %233, i64 2
%235 = load float, float* %234
%236 = load float*, float** %12
%237 = load i32, i32* %29
%238 = sub nsw i32 %237, 2
%239 = sext i32 %238 to i64
%240 = getelementptr inbounds float, float* %236, i64 %239
%241 = load float, float* %240
%242 = load float*, float** %12
%243 = load i32, i32* %29
%244 = add nsw i32 %243, 2
%245 = sext i32 %244 to i64
%246 = getelementptr inbounds float, float* %242, i64 %245
%247 = load float, float* %246
%248 = fadd float %241, %247
%249 = call float @llvm.fmuladd.f32(float %235, float %248, float %232)
%250 = load float*, float** %22
%251 = getelementptr inbounds float, float* %250, i64 1
%252 = load float, float* %251
%253 = load float*, float** %12
%254 = load i32, i32* %29
%255 = sub nsw i32 %254, 1
%256 = sext i32 %255 to i64
%257 = getelementptr inbounds float, float* %253, i64 %256
%258 = load float, float* %257
%259 = load float*, float** %12
%260 = load i32, i32* %29
%261 = add nsw i32 %260, 1
%262 = sext i32 %261 to i64
%263 = getelementptr inbounds float, float* %259, i64 %262
%264 = load float, float* %263
%265 = fadd float %258, %264
%266 = call float @llvm.fmuladd.f32(float %252, float %265, float %249)
%267 = load float*, float** %22
%268 = getelementptr inbounds float, float* %267, i64 0
%269 = load float, float* %268
%270 = load float*, float** %12
%271 = load i32, i32* %29
%272 = sext i32 %271 to i64
%273 = getelementptr inbounds float, float* %270, i64 %272
%274 = load float, float* %273
%275 = call float @llvm.fmuladd.f32(float %269, float %274, float %266)
%276 = call float @llvm.fmuladd.f32(float %164, float %275, float %151)
%277 = load float, float* %20
%278 = load float*, float** %14
%279 = load i32, i32* %29
%280 = sext i32 %279 to i64
%281 = getelementptr inbounds float, float* %278, i64 %280
%282 = load float, float* %281
%283 = fmul float %277, %282
%284 = load float*, float** %14
%285 = load i32, i32* %29
%286 = sext i32 %285 to i64
%287 = getelementptr inbounds float, float* %284, i64 %286
%288 = load float, float* %287
%289 = fmul float %283, %288
%290 = load float*, float** %22
%291 = getelementptr inbounds float, float* %290, i64 6
%292 = load float, float* %291
%293 = load float*, float** %12
%294 = load i32, i32* %29
%295 = load i32, i32* %15
%296 = mul nsw i32 6, %295
%297 = sub nsw i32 %294, %296
%298 = sext i32 %297 to i64
%299 = getelementptr inbounds float, float* %293, i64 %298
%300 = load float, float* %299
%301 = load float*, float** %12
%302 = load i32, i32* %29
%303 = load i32, i32* %15
%304 = mul nsw i32 6, %303
%305 = add nsw i32 %302, %304
%306 = sext i32 %305 to i64
%307 = getelementptr inbounds float, float* %301, i64 %306
%308 = load float, float* %307
%309 = fadd float %300, %308
%310 = load float*, float** %22
%311 = getelementptr inbounds float, float* %310, i64 5
%312 = load float, float* %311
%313 = load float*, float** %12
%314 = load i32, i32* %29
%315 = load i32, i32* %15
%316 = mul nsw i32 5, %315
%317 = sub nsw i32 %314, %316
%318 = sext i32 %317 to i64
%319 = getelementptr inbounds float, float* %313, i64 %318
%320 = load float, float* %319
%321 = load float*, float** %12
%322 = load i32, i32* %29
%323 = load i32, i32* %15
%324 = mul nsw i32 5, %323
%325 = add nsw i32 %322, %324
%326 = sext i32 %325 to i64
%327 = getelementptr inbounds float, float* %321, i64 %326
%328 = load float, float* %327
%329 = fadd float %320, %328
%330 = fmul float %312, %329
%331 = call float @llvm.fmuladd.f32(float %292, float %309, float %330)
%332 = load float*, float** %22
%333 = getelementptr inbounds float, float* %332, i64 4
%334 = load float, float* %333
%335 = load float*, float** %12
%336 = load i32, i32* %29
%337 = load i32, i32* %15
%338 = mul nsw i32 4, %337
%339 = sub nsw i32 %336, %338
%340 = sext i32 %339 to i64
%341 = getelementptr inbounds float, float* %335, i64 %340
%342 = load float, float* %341
%343 = load float*, float** %12
%344 = load i32, i32* %29
%345 = load i32, i32* %15
%346 = mul nsw i32 4, %345
%347 = add nsw i32 %344, %346
%348 = sext i32 %347 to i64
%349 = getelementptr inbounds float, float* %343, i64 %348
%350 = load float, float* %349
%351 = fadd float %342, %350
%352 = call float @llvm.fmuladd.f32(float %334, float %351, float %331)
%353 = load float*, float** %22
%354 = getelementptr inbounds float, float* %353, i64 3
%355 = load float, float* %354
%356 = load float*, float** %12
%357 = load i32, i32* %29
%358 = load i32, i32* %15
%359 = mul nsw i32 3, %358
%360 = sub nsw i32 %357, %359
%361 = sext i32 %360 to i64
%362 = getelementptr inbounds float, float* %356, i64 %361
%363 = load float, float* %362
%364 = load float*, float** %12
%365 = load i32, i32* %29
%366 = load i32, i32* %15
%367 = mul nsw i32 3, %366
%368 = add nsw i32 %365, %367
%369 = sext i32 %368 to i64
%370 = getelementptr inbounds float, float* %364, i64 %369
%371 = load float, float* %370
%372 = fadd float %363, %371
%373 = call float @llvm.fmuladd.f32(float %355, float %372, float %352)
%374 = load float*, float** %22
%375 = getelementptr inbounds float, float* %374, i64 2
%376 = load float, float* %375
%377 = load float*, float** %12
%378 = load i32, i32* %29
%379 = load i32, i32* %15
%380 = mul nsw i32 2, %379
%381 = sub nsw i32 %378, %380
%382 = sext i32 %381 to i64
%383 = getelementptr inbounds float, float* %377, i64 %382
%384 = load float, float* %383
%385 = load float*, float** %12
%386 = load i32, i32* %29
%387 = load i32, i32* %15
%388 = mul nsw i32 2, %387
%389 = add nsw i32 %386, %388
%390 = sext i32 %389 to i64
%391 = getelementptr inbounds float, float* %385, i64 %390
%392 = load float, float* %391
%393 = fadd float %384, %392
%394 = call float @llvm.fmuladd.f32(float %376, float %393, float %373)
%395 = load float*, float** %22
%396 = getelementptr inbounds float, float* %395, i64 1
%397 = load float, float* %396
%398 = load float*, float** %12
%399 = load i32, i32* %29
%400 = load i32, i32* %15
%401 = sub nsw i32 %399, %400
%402 = sext i32 %401 to i64
%403 = getelementptr inbounds float, float* %398, i64 %402
%404 = load float, float* %403
%405 = load float*, float** %12
%406 = load i32, i32* %29
%407 = load i32, i32* %15
%408 = add nsw i32 %406, %407
%409 = sext i32 %408 to i64
%410 = getelementptr inbounds float, float* %405, i64 %409
%411 = load float, float* %410
%412 = fadd float %404, %411
%413 = call float @llvm.fmuladd.f32(float %397, float %412, float %394)
%414 = load float*, float** %22
%415 = getelementptr inbounds float, float* %414, i64 0
%416 = load float, float* %415
%417 = load float*, float** %12
%418 = load i32, i32* %29
%419 = sext i32 %418 to i64
%420 = getelementptr inbounds float, float* %417, i64 %419
%421 = load float, float* %420
%422 = call float @llvm.fmuladd.f32(float %416, float %421, float %413)
%423 = call float @llvm.fmuladd.f32(float %289, float %422, float %276)
%424 = load float, float* %21
%425 = load float*, float** %14
%426 = load i32, i32* %29
%427 = sext i32 %426 to i64
%428 = getelementptr inbounds float, float* %425, i64 %427
%429 = load float, float* %428
%430 = fmul float %424, %429
%431 = load float*, float** %14
%432 = load i32, i32* %29
%433 = sext i32 %432 to i64
%434 = getelementptr inbounds float, float* %431, i64 %433
%435 = load float, float* %434
%436 = fmul float %430, %435
%437 = load float*, float** %22
%438 = getelementptr inbounds float, float* %437, i64 6
%439 = load float, float* %438
%440 = load float*, float** %12
%441 = load i32, i32* %29
%442 = load i32, i32* %28
%443 = mul nsw i32 6, %442
%444 = add nsw i32 %441, %443
%445 = sext i32 %444 to i64
%446 = getelementptr inbounds float, float* %440, i64 %445
%447 = load float, float* %446
%448 = load float*, float** %12
%449 = load i32, i32* %29
%450 = load i32, i32* %28
%451 = mul nsw i32 6, %450
%452 = sub nsw i32 %449, %451
%453 = sext i32 %452 to i64
%454 = getelementptr inbounds float, float* %448, i64 %453
%455 = load float, float* %454
%456 = fadd float %447, %455
%457 = load float*, float** %22
%458 = getelementptr inbounds float, float* %457, i64 5
%459 = load float, float* %458
%460 = load float*, float** %12
%461 = load i32, i32* %29
%462 = load i32, i32* %28
%463 = mul nsw i32 5, %462
%464 = add nsw i32 %461, %463
%465 = sext i32 %464 to i64
%466 = getelementptr inbounds float, float* %460, i64 %465
%467 = load float, float* %466
%468 = load float*, float** %12
%469 = load i32, i32* %29
%470 = load i32, i32* %28
%471 = mul nsw i32 5, %470
%472 = sub nsw i32 %469, %471
%473 = sext i32 %472 to i64
%474 = getelementptr inbounds float, float* %468, i64 %473
%475 = load float, float* %474
%476 = fadd float %467, %475
%477 = fmul float %459, %476
%478 = call float @llvm.fmuladd.f32(float %439, float %456, float %477)
%479 = load float*, float** %22
%480 = getelementptr inbounds float, float* %479, i64 4
%481 = load float, float* %480
%482 = load float*, float** %12
%483 = load i32, i32* %29
%484 = load i32, i32* %28
%485 = mul nsw i32 4, %484
%486 = add nsw i32 %483, %485
%487 = sext i32 %486 to i64
%488 = getelementptr inbounds float, float* %482, i64 %487
%489 = load float, float* %488
%490 = load float*, float** %12
%491 = load i32, i32* %29
%492 = load i32, i32* %28
%493 = mul nsw i32 4, %492
%494 = sub nsw i32 %491, %493
%495 = sext i32 %494 to i64
%496 = getelementptr inbounds float, float* %490, i64 %495
%497 = load float, float* %496
%498 = fadd float %489, %497
%499 = call float @llvm.fmuladd.f32(float %481, float %498, float %478)
%500 = load float*, float** %22
%501 = getelementptr inbounds float, float* %500, i64 3
%502 = load float, float* %501
%503 = load float*, float** %12
%504 = load i32, i32* %29
%505 = load i32, i32* %28
%506 = mul nsw i32 3, %505
%507 = add nsw i32 %504, %506
%508 = sext i32 %507 to i64
%509 = getelementptr inbounds float, float* %503, i64 %508
%510 = load float, float* %509
%511 = load float*, float** %12
%512 = load i32, i32* %29
%513 = load i32, i32* %28
%514 = mul nsw i32 3, %513
%515 = sub nsw i32 %512, %514
%516 = sext i32 %515 to i64
%517 = getelementptr inbounds float, float* %511, i64 %516
%518 = load float, float* %517
%519 = fadd float %510, %518
%520 = call float @llvm.fmuladd.f32(float %502, float %519, float %499)
%521 = load float*, float** %22
%522 = getelementptr inbounds float, float* %521, i64 2
%523 = load float, float* %522
%524 = load float*, float** %12
%525 = load i32, i32* %29
%526 = load i32, i32* %28
%527 = mul nsw i32 2, %526
%528 = add nsw i32 %525, %527
%529 = sext i32 %528 to i64
%530 = getelementptr inbounds float, float* %524, i64 %529
%531 = load float, float* %530
%532 = load float*, float** %12
%533 = load i32, i32* %29
%534 = load i32, i32* %28
%535 = mul nsw i32 2, %534
%536 = sub nsw i32 %533, %535
%537 = sext i32 %536 to i64
%538 = getelementptr inbounds float, float* %532, i64 %537
%539 = load float, float* %538
%540 = fadd float %531, %539
%541 = call float @llvm.fmuladd.f32(float %523, float %540, float %520)
%542 = load float*, float** %22
%543 = getelementptr inbounds float, float* %542, i64 1
%544 = load float, float* %543
%545 = load float*, float** %12
%546 = load i32, i32* %29
%547 = load i32, i32* %28
%548 = add nsw i32 %546, %547
%549 = sext i32 %548 to i64
%550 = getelementptr inbounds float, float* %545, i64 %549
%551 = load float, float* %550
%552 = load float*, float** %12
%553 = load i32, i32* %29
%554 = load i32, i32* %28
%555 = sub nsw i32 %553, %554
%556 = sext i32 %555 to i64
%557 = getelementptr inbounds float, float* %552, i64 %556
%558 = load float, float* %557
%559 = fadd float %551, %558
%560 = call float @llvm.fmuladd.f32(float %544, float %559, float %541)
%561 = load float*, float** %22
%562 = getelementptr inbounds float, float* %561, i64 0
%563 = load float, float* %562
%564 = load float*, float** %12
%565 = load i32, i32* %29
%566 = sext i32 %565 to i64
%567 = getelementptr inbounds float, float* %564, i64 %566
%568 = load float, float* %567
%569 = call float @llvm.fmuladd.f32(float %563, float %568, float %560)
%570 = call float @llvm.fmuladd.f32(float %436, float %569, float %423)
%571 = load float*, float** %13
%572 = load i32, i32* %29
%573 = sext i32 %572 to i64
%574 = getelementptr inbounds float, float* %571, i64 %573
store float %570, float* %574
br label %575
575: ; preds = %139, %121
br label %576
576: ; preds = %575
%577 = load i32, i32* %25
%578 = add nsw i32 %577, 1
store i32 %578, i32* %25
br label %103
579: ; preds = %117
br label %580
580: ; preds = %579
%581 = load i32, i32* %27
%582 = add nsw i32 %581, 1
store i32 %582, i32* %27
br label %81
583: ; preds = %97
br label %584
584: ; preds = %583
%585 = load i32, i32* %26
%586 = add nsw i32 %585, 1
store i32 %586, i32* %26
br label %61
587: ; preds = %75
br label %588
588: ; preds = %587
%589 = load i32, i32* %23
%590 = add nsw i32 %589, 2
store i32 %590, i32* %23
br label %55
591: ; preds = %55
br label %592
592: ; preds = %591
%593 = load i32, i32* %30
%594 = add nsw i32 %593, 2
store i32 %594, i32* %30
br label %48
595: ; preds = %48
br label %596
596: ; preds = %595
%597 = load i32, i32* %24
%598 = add nsw i32 %597, 2
store i32 %598, i32* %24
br label %43
599: ; preds = %43
ret void
}

LLVM IR (-O2):
define void @kernel_CPU_06_mod_3DRhoCte(float* %0, float* nocapture %1, float* nocapture %2, i32 %3, i32 %4, i32 %5, i32 %6, float %7, float %8, float %9, float* nocapture %10) {
%12 = mul nsw i32 %4, %3
%13 = icmp sgt i32 %4, 0
br i1 %13, label %14, label %304
14: ; preds = %11
%15 = sub i32 %6, %5
%16 = icmp sgt i32 %15, 0
%17 = icmp sgt i32 %3, 0
%18 = getelementptr inbounds float, float* %10, i64 6
%19 = getelementptr inbounds float, float* %10, i64 5
%20 = getelementptr inbounds float, float* %10, i64 4
%21 = getelementptr inbounds float, float* %10, i64 3
%22 = getelementptr inbounds float, float* %10, i64 2
%23 = getelementptr inbounds float, float* %10, i64 1
%24 = mul nsw i32 %3, 6
%25 = mul nsw i32 %3, 5
%26 = shl nsw i32 %3, 2
%27 = mul nsw i32 %3, 3
%28 = shl nsw i32 %3, 1
%29 = mul nsw i32 %12, 6
%30 = mul nsw i32 %12, 5
%31 = shl nsw i32 %12, 2
%32 = mul nsw i32 %12, 3
%33 = shl nsw i32 %12, 1
br label %34
34: ; preds = %14, %301
%35 = phi i32 [ 2, %14 ], [ %303, %301 ]
%36 = phi i32 [ 0, %14 ], [ %38, %301 ]
%37 = call i32 @llvm.smin.i32(i32 %4, i32 %35)
%38 = add nuw nsw i32 %36, 2
br i1 %16, label %39, label %301
39: ; preds = %34
%40 = icmp sgt i32 %38, %4
%41 = select i1 %40, i32 %4, i32 %38
%42 = icmp slt i32 %36, %41
br label %43
43: ; preds = %39, %298
%44 = phi i32 [ 2, %39 ], [ %300, %298 ]
%45 = phi i32 [ 0, %39 ], [ %47, %298 ]
%46 = call i32 @llvm.smin.i32(i32 %44, i32 %15)
%47 = add nuw nsw i32 %45, 2
br i1 %17, label %48, label %298
48: ; preds = %43
%49 = icmp slt i32 %15, %47
%50 = select i1 %49, i32 %15, i32 %47
%51 = icmp slt i32 %45, %50
br label %52
52: ; preds = %48, %294
%53 = phi i64 [ 0, %48 ], [ %295, %294 ]
%54 = trunc i64 %53 to i32
br i1 %42, label %55, label %294
55: ; preds = %52
%56 = add nuw nsw i32 %54, 2
%57 = icmp sgt i32 %56, %3
%58 = select i1 %57, i32 %3, i32 %56
%59 = icmp sgt i32 %58, %54
%60 = sext i32 %58 to i64
br label %61
61: ; preds = %55, %291
%62 = phi i32 [ %36, %55 ], [ %292, %291 ]
br i1 %51, label %63, label %291
63: ; preds = %61
%64 = mul nsw i32 %62, %3
br label %65
65: ; preds = %63, %288
%66 = phi i32 [ %45, %63 ], [ %289, %288 ]
br i1 %59, label %67, label %288
67: ; preds = %65
%68 = add nsw i32 %66, %5
%69 = mul nsw i32 %68, %12
%70 = add i32 %69, %64
br label %71
71: ; preds = %67, %285
%72 = phi i64 [ %53, %67 ], [ %286, %285 ]
%73 = trunc i64 %72 to i32
%74 = add i32 %70, %73
%75 = sext i32 %74 to i64
%76 = getelementptr inbounds float, float* %2, i64 %75
%77 = load float, float* %76
%78 = fcmp ogt float %77, 0.000000e+00
br i1 %78, label %79, label %285
79: ; preds = %71
%80 = getelementptr inbounds float, float* %0, i64 %75
%81 = load float, float* %80
%82 = getelementptr inbounds float, float* %1, i64 %75
%83 = load float, float* %82
%84 = fneg float %83
%85 = tail call float @llvm.fmuladd.f32(float %81, float 2.000000e+00, float %84)
%86 = fmul float %77, %7
%87 = fmul float %77, %86
%88 = load float, float* %18
%89 = add nsw i32 %74, -6
%90 = sext i32 %89 to i64
%91 = getelementptr inbounds float, float* %0, i64 %90
%92 = load float, float* %91
%93 = add nsw i32 %74, 6
%94 = sext i32 %93 to i64
%95 = getelementptr inbounds float, float* %0, i64 %94
%96 = load float, float* %95
%97 = fadd float %92, %96
%98 = load float, float* %19
%99 = add nsw i32 %74, -5
%100 = sext i32 %99 to i64
%101 = getelementptr inbounds float, float* %0, i64 %100
%102 = load float, float* %101
%103 = add nsw i32 %74, 5
%104 = sext i32 %103 to i64
%105 = getelementptr inbounds float, float* %0, i64 %104
%106 = load float, float* %105
%107 = fadd float %102, %106
%108 = fmul float %98, %107
%109 = tail call float @llvm.fmuladd.f32(float %88, float %97, float %108)
%110 = load float, float* %20
%111 = add nsw i32 %74, -4
%112 = sext i32 %111 to i64
%113 = getelementptr inbounds float, float* %0, i64 %112
%114 = load float, float* %113
%115 = add nsw i32 %74, 4
%116 = sext i32 %115 to i64
%117 = getelementptr inbounds float, float* %0, i64 %116
%118 = load float, float* %117
%119 = fadd float %114, %118
%120 = tail call float @llvm.fmuladd.f32(float %110, float %119, float %109)
%121 = load float, float* %21
%122 = add nsw i32 %74, -3
%123 = sext i32 %122 to i64
%124 = getelementptr inbounds float, float* %0, i64 %123
%125 = load float, float* %124
%126 = add nsw i32 %74, 3
%127 = sext i32 %126 to i64
%128 = getelementptr inbounds float, float* %0, i64 %127
%129 = load float, float* %128
%130 = fadd float %125, %129
%131 = tail call float @llvm.fmuladd.f32(float %121, float %130, float %120)
%132 = load float, float* %22
%133 = add nsw i32 %74, -2
%134 = sext i32 %133 to i64
%135 = getelementptr inbounds float, float* %0, i64 %134
%136 = load float, float* %135
%137 = add nsw i32 %74, 2
%138 = sext i32 %137 to i64
%139 = getelementptr inbounds float, float* %0, i64 %138
%140 = load float, float* %139
%141 = fadd float %136, %140
%142 = tail call float @llvm.fmuladd.f32(float %132, float %141, float %131)
%143 = load float, float* %23
%144 = add nsw i32 %74, -1
%145 = sext i32 %144 to i64
%146 = getelementptr inbounds float, float* %0, i64 %145
%147 = load float, float* %146
%148 = add nsw i32 %74, 1
%149 = sext i32 %148 to i64
%150 = getelementptr inbounds float, float* %0, i64 %149
%151 = load float, float* %150
%152 = fadd float %147, %151
%153 = tail call float @llvm.fmuladd.f32(float %143, float %152, float %142)
%154 = load float, float* %10
%155 = tail call float @llvm.fmuladd.f32(float %154, float %81, float %153)
%156 = tail call float @llvm.fmuladd.f32(float %87, float %155, float %85)
%157 = fmul float %77, %8
%158 = fmul float %77, %157
%159 = sub nsw i32 %74, %24
%160 = sext i32 %159 to i64
%161 = getelementptr inbounds float, float* %0, i64 %160
%162 = load float, float* %161
%163 = add nsw i32 %74, %24
%164 = sext i32 %163 to i64
%165 = getelementptr inbounds float, float* %0, i64 %164
%166 = load float, float* %165
%167 = fadd float %162, %166
%168 = sub nsw i32 %74, %25
%169 = sext i32 %168 to i64
%170 = getelementptr inbounds float, float* %0, i64 %169
%171 = load float, float* %170
%172 = add nsw i32 %74, %25
%173 = sext i32 %172 to i64
%174 = getelementptr inbounds float, float* %0, i64 %173
%175 = load float, float* %174
%176 = fadd float %171, %175
%177 = fmul float %98, %176
%178 = tail call float @llvm.fmuladd.f32(float %88, float %167, float %177)
%179 = sub nsw i32 %74, %26
%180 = sext i32 %179 to i64
%181 = getelementptr inbounds float, float* %0, i64 %180
%182 = load float, float* %181
%183 = add nsw i32 %74, %26
%184 = sext i32 %183 to i64
%185 = getelementptr inbounds float, float* %0, i64 %184
%186 = load float, float* %185
%187 = fadd float %182, %186
%188 = tail call float @llvm.fmuladd.f32(float %110, float %187, float %178)
%189 = sub nsw i32 %74, %27
%190 = sext i32 %189 to i64
%191 = getelementptr inbounds float, float* %0, i64 %190
%192 = load float, float* %191
%193 = add nsw i32 %74, %27
%194 = sext i32 %193 to i64
%195 = getelementptr inbounds float, float* %0, i64 %194
%196 = load float, float* %195
%197 = fadd float %192, %196
%198 = tail call float @llvm.fmuladd.f32(float %121, float %197, float %188)
%199 = sub nsw i32 %74, %28
%200 = sext i32 %199 to i64
%201 = getelementptr inbounds float, float* %0, i64 %200
%202 = load float, float* %201
%203 = add nsw i32 %74, %28
%204 = sext i32 %203 to i64
%205 = getelementptr inbounds float, float* %0, i64 %204
%206 = load float, float* %205
%207 = fadd float %202, %206
%208 = tail call float @llvm.fmuladd.f32(float %132, float %207, float %198)
%209 = sub nsw i32 %74, %3
%210 = sext i32 %209 to i64
%211 = getelementptr inbounds float, float* %0, i64 %210
%212 = load float, float* %211
%213 = add nsw i32 %74, %3
%214 = sext i32 %213 to i64
%215 = getelementptr inbounds float, float* %0, i64 %214
%216 = load float, float* %215
%217 = fadd float %212, %216
%218 = tail call float @llvm.fmuladd.f32(float %143, float %217, float %208)
%219 = tail call float @llvm.fmuladd.f32(float %154, float %81, float %218)
%220 = tail call float @llvm.fmuladd.f32(float %158, float %219, float %156)
%221 = fmul float %77, %9
%222 = fmul float %77, %221
%223 = add nsw i32 %74, %29
%224 = sext i32 %223 to i64
%225 = getelementptr inbounds float, float* %0, i64 %224
%226 = load float, float* %225
%227 = sub nsw i32 %74, %29
%228 = sext i32 %227 to i64
%229 = getelementptr inbounds float, float* %0, i64 %228
%230 = load float, float* %229
%231 = fadd float %226, %230
%232 = add nsw i32 %74, %30
%233 = sext i32 %232 to i64
%234 = getelementptr inbounds float, float* %0, i64 %233
%235 = load float, float* %234
%236 = sub nsw i32 %74, %30
%237 = sext i32 %236 to i64
%238 = getelementptr inbounds float, float* %0, i64 %237
%239 = load float, float* %238
%240 = fadd float %235, %239
%241 = fmul float %98, %240
%242 = tail call float @llvm.fmuladd.f32(float %88, float %231, float %241)
%243 = add nsw i32 %74, %31
%244 = sext i32 %243 to i64
%245 = getelementptr inbounds float, float* %0, i64 %244
%246 = load float, float* %245
%247 = sub nsw i32 %74, %31
%248 = sext i32 %247 to i64
%249 = getelementptr inbounds float, float* %0, i64 %248
%250 = load float, float* %249
%251 = fadd float %246, %250
%252 = tail call float @llvm.fmuladd.f32(float %110, float %251, float %242)
%253 = add nsw i32 %74, %32
%254 = sext i32 %253 to i64
%255 = getelementptr inbounds float, float* %0, i64 %254
%256 = load float, float* %255
%257 = sub nsw i32 %74, %32
%258 = sext i32 %257 to i64
%259 = getelementptr inbounds float, float* %0, i64 %258
%260 = load float, float* %259
%261 = fadd float %256, %260
%262 = tail call float @llvm.fmuladd.f32(float %121, float %261, float %252)
%263 = add nsw i32 %74, %33
%264 = sext i32 %263 to i64
%265 = getelementptr inbounds float, float* %0, i64 %264
%266 = load float, float* %265
%267 = sub nsw i32 %74, %33
%268 = sext i32 %267 to i64
%269 = getelementptr inbounds float, float* %0, i64 %268
%270 = load float, float* %269
%271 = fadd float %266, %270
%272 = tail call float @llvm.fmuladd.f32(float %132, float %271, float %262)
%273 = add nsw i32 %74, %12
%274 = sext i32 %273 to i64
%275 = getelementptr inbounds float, float* %0, i64 %274
%276 = load float, float* %275
%277 = sub nsw i32 %74, %12
%278 = sext i32 %277 to i64
%279 = getelementptr inbounds float, float* %0, i64 %278
%280 = load float, float* %279
%281 = fadd float %276, %280
%282 = tail call float @llvm.fmuladd.f32(float %143, float %281, float %272)
%283 = tail call float @llvm.fmuladd.f32(float %154, float %81, float %282)
%284 = tail call float @llvm.fmuladd.f32(float %222, float %283, float %220)
store float %284, float* %82
br label %285
285: ; preds = %71, %79
%286 = add nuw nsw i64 %72, 1
%287 = icmp slt i64 %286, %60
br i1 %287, label %71, label %288
288: ; preds = %285, %65
%289 = add nuw nsw i32 %66, 1
%290 = icmp eq i32 %289, %46
br i1 %290, label %291, label %65
291: ; preds = %288, %61
%292 = add nuw nsw i32 %62, 1
%293 = icmp eq i32 %292, %37
br i1 %293, label %294, label %61
294: ; preds = %291, %52
%295 = add nuw nsw i64 %53, 2
%296 = trunc i64 %295 to i32
%297 = icmp slt i32 %296, %3
br i1 %297, label %52, label %298
298: ; preds = %294, %43
%299 = icmp slt i32 %47, %15
%300 = add nuw i32 %44, 2
br i1 %299, label %43, label %301
301: ; preds = %298, %34
%302 = icmp slt i32 %38, %4
%303 = add nuw i32 %35, 2
br i1 %302, label %34, label %304
304: ; preds = %301, %11
ret void
}