xunge/DecIR huggingface dataset:
int ft_isspace(int c) {
  if (c == ' ' || (c >= 9 && c <= 13))
    return (1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<ft_isspace>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x20,-0x8(%rbp)
je     1125 <ft_isspace+0x25>
cmpl   $0x9,-0x8(%rbp)
jl     1131 <ft_isspace+0x31>
cmpl   $0xd,-0x8(%rbp)
jg     1131 <ft_isspace+0x31>
movl   $0x1,-0x4(%rbp)
jmp    1138 <ft_isspace+0x38>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isspace>:
cmp    $0x20,%edi
sete   %al
add    $0xfffffff7,%edi
cmp    $0x5,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @ft_isspace(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 32
br i1 %5, label %12, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sge i32 %7, 9
br i1 %8, label %9, label %13
9: ; preds = %6
%10 = load i32, i32* %3
%11 = icmp sle i32 %10, 13
br i1 %11, label %12, label %13
12: ; preds = %9, %1
store i32 1, i32* %2
br label %14
13: ; preds = %9, %6
store i32 0, i32* %2
br label %14
14: ; preds = %13, %12
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @ft_isspace(i32 %0) {
%2 = icmp eq i32 %0, 32
%3 = add i32 %0, -9
%4 = icmp ult i32 %3, 5
%5 = or i1 %2, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
__attribute__((unused)) void fio_ary____test(void) {}


x86 assembly (clang, -O0):
<fio_ary____test>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fio_ary____test>:
ret

LLVM IR (-O0):
define void @fio_ary____test() {
ret void
}

LLVM IR (-O2):
define void @fio_ary____test() {
ret void
}
/* Variables and functions */
int compare_default(void const *, void const *);
int compare_value_search(void const *, void const *);
int compare_value_sort(const void *a, const void *b) {
  int r = compare_value_search(a, b);
  if (r == 0)
    return compare_default(a, b);
  else
    return r;
}


x86 assembly (clang, -O0):
<compare_value_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <compare_value_search@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jne    115f <compare_value_sort+0x3f>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <compare_default@plt>
mov    %eax,-0x4(%rbp)
jmp    1165 <compare_value_sort+0x45>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_value_sort>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <compare_value_search@plt>
test   %eax,%eax
je     113b <compare_value_sort+0x1b>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <compare_default@plt>

LLVM IR (-O0):
define i32 @compare_value_sort(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = call i32 @compare_value_search(i8* %7, i8* %8)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %2
%13 = load i8*, i8** %4
%14 = load i8*, i8** %5
%15 = call i32 @compare_default(i8* %13, i8* %14)
store i32 %15, i32* %3
br label %18
16: ; preds = %2
%17 = load i32, i32* %6
store i32 %17, i32* %3
br label %18
18: ; preds = %16, %12
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @compare_value_sort(i8* %0, i8* %1) {
%3 = tail call i32 @compare_value_search(i8* %0, i8* %1)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @compare_default(i8* %0, i8* %1)
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ %6, %5 ], [ %3, %2 ]
ret i32 %8
}
/* Type definitions */
struct qlcnic_dcb {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ qlcnic_clear_dcb_ops(struct qlcnic_dcb *);
scalar_t__ qlcnic_dcb_attach(struct qlcnic_dcb *);
void qlcnic_dcb_enable(struct qlcnic_dcb *dcb) {
  if (dcb && qlcnic_dcb_attach(dcb))
    qlcnic_clear_dcb_ops(dcb);
}


x86 assembly (clang, -O0):
<qlcnic_dcb_enable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1153 <qlcnic_dcb_enable+0x33>
mov    -0x8(%rbp),%rdi
call   1030 <qlcnic_dcb_attach@plt>
cmp    $0x0,%rax
je     1153 <qlcnic_dcb_enable+0x33>
mov    -0x8(%rbp),%rdi
call   1040 <qlcnic_clear_dcb_ops@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qlcnic_dcb_enable>:
push   %rbx
test   %rdi,%rdi
je     113c <qlcnic_dcb_enable+0x1c>
mov    %rdi,%rbx
call   1030 <qlcnic_dcb_attach@plt>
test   %rax,%rax
je     113c <qlcnic_dcb_enable+0x1c>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <qlcnic_clear_dcb_ops@plt>
pop    %rbx
ret

LLVM IR (-O0):
%struct.qlcnic_dcb = type { i32 }
define void @qlcnic_dcb_enable(%struct.qlcnic_dcb* %0) {
%2 = alloca %struct.qlcnic_dcb*
store %struct.qlcnic_dcb* %0, %struct.qlcnic_dcb** %2
%3 = load %struct.qlcnic_dcb*, %struct.qlcnic_dcb** %2
%4 = icmp ne %struct.qlcnic_dcb* %3, null
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = load %struct.qlcnic_dcb*, %struct.qlcnic_dcb** %2
%7 = call i64 @qlcnic_dcb_attach(%struct.qlcnic_dcb* %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = load %struct.qlcnic_dcb*, %struct.qlcnic_dcb** %2
%11 = call i32 @qlcnic_clear_dcb_ops(%struct.qlcnic_dcb* %10)
br label %12
12: ; preds = %9, %5, %1
ret void
}

LLVM IR (-O2):
%struct.qlcnic_dcb = type { i32 }
define void @qlcnic_dcb_enable(%struct.qlcnic_dcb* %0) {
%2 = icmp eq %struct.qlcnic_dcb* %0, null
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = tail call i64 @qlcnic_dcb_attach(%struct.qlcnic_dcb* %0)
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @qlcnic_clear_dcb_ops(%struct.qlcnic_dcb* %0)
br label %8
8: ; preds = %6, %3, %1
ret void
}
void gdk_region_polygon() {}


x86 assembly (clang, -O0):
<gdk_region_polygon>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_region_polygon>:
ret

LLVM IR (-O0):
define void @gdk_region_polygon() {
ret void
}

LLVM IR (-O2):
define void @gdk_region_polygon() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
int _CANBaseValid(int);
void CANIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags) {
  ASSERT(_CANBaseValid(ui32Base));
  ASSERT((ui32IntFlags & ~(0x00000008 | 0x00000004 | 0x00000002)) == 0);
  (*((volatile uint32_t *)(ui32Base + 0x00000000))) |= ui32IntFlags;
}


x86 assembly (clang, -O0):
<CANIntEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_CANBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
mov    -0x8(%rbp),%eax
and    $0xfffffff1,%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <ASSERT@plt>
mov    -0x8(%rbp),%edx
mov    -0x4(%rbp),%eax
add    $0x0,%eax
cltq
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CANIntEnable>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <_CANBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
xor    %edi,%edi
test   $0xfffffff1,%ebx
sete   %dil
call   1040 <ASSERT@plt>
movslq %ebp,%rax
or     %ebx,(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @CANIntEnable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @_CANBaseValid(i32 %5)
%7 = call i32 @ASSERT(i32 %6)
%8 = load i32, i32* %4
%9 = and i32 %8, -15
%10 = icmp eq i32 %9, 0
%11 = zext i1 %10 to i32
%12 = call i32 @ASSERT(i32 %11)
%13 = load i32, i32* %4
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 0
%16 = sext i32 %15 to i64
%17 = inttoptr i64 %16 to i32*
%18 = load volatile i32, i32* %17
%19 = or i32 %18, %13
store volatile i32 %19, i32* %17
ret void
}

LLVM IR (-O2):
define void @CANIntEnable(i32 %0, i32 %1) {
%3 = tail call i32 @_CANBaseValid(i32 %0)
%4 = tail call i32 @ASSERT(i32 %3)
%5 = and i32 %1, -15
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
%8 = tail call i32 @ASSERT(i32 %7)
%9 = sext i32 %0 to i64
%10 = inttoptr i64 %9 to i32*
%11 = load volatile i32, i32* %10
%12 = or i32 %11, %1
store volatile i32 %12, i32* %10
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;

/* Variables and functions */
int __setxid(int, int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/);
int setreuid(uid_t ruid, uid_t euid) { return __setxid(203, ruid, euid, 0); }


x86 assembly (clang, -O0):
<setreuid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    $0xcb,%edi
xor    %ecx,%ecx
call   1030 <__setxid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setreuid>:
mov    %esi,%edx
mov    %edi,%esi
mov    $0xcb,%edi
xor    %ecx,%ecx
jmp    1030 <__setxid@plt>

LLVM IR (-O0):
define i32 @setreuid(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @__setxid(i32 203, i32 %5, i32 %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @setreuid(i32 %0, i32 %1) {
%3 = tail call i32 @__setxid(i32 203, i32 %0, i32 %1, i32 0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ link_error();
void f15(unsigned long long int s) {
  if ((unsigned long long int)s == 0)
    return;
  if (s == 0)
    link_error();
}


x86 assembly (clang, -O0):
<f15>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    112c <f15+0x1c>
jmp    113e <f15+0x2e>
cmpq   $0x0,-0x8(%rbp)
jne    113e <f15+0x2e>
mov    $0x0,%al
call   1030 <link_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f15>:
ret

LLVM IR (-O0):
define void @f15(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %11
6: ; preds = %1
%7 = load i64, i64* %2
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = call i32 (...) @link_error()
br label %11
11: ; preds = %5, %9, %6
ret void
}

LLVM IR (-O2):
define void @f15(i64 %0) {
ret void
}
/* Type definitions */
typedef int socklen_t;

/* Variables and functions */
int /*<<< orphan*/ SOL_SOCKET;
int /*<<< orphan*/ SO_ERROR;
int errno;
scalar_t__ getsockopt(int, int /*<<< orphan*/, int /*<<< orphan*/, void *,
                      int *);
int sockgetstatus(int sock) {
  socklen_t arglen = sizeof(int);
  int rc = 0;
  if (getsockopt(sock, SOL_SOCKET, SO_ERROR, (void *)&rc, &arglen) < 0) {
    rc = errno;
  }
  errno = rc;
  return rc;
}


x86 assembly (clang, -O0):
<sockgetstatus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x4,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eb5(%rip),%rax
mov    (%rax),%esi
mov    0x2e94(%rip),%rax
mov    (%rax),%edx
lea    -0xc(%rbp),%rcx
lea    -0x8(%rbp),%r8
call   1030 <getsockopt@plt>
cmp    $0x0,%rax
jge    1161 <sockgetstatus+0x51>
mov    0x2e7c(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    0x2e6d(%rip),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sockgetstatus>:
push   %rbx
sub    $0x10,%rsp
movl   $0x4,0xc(%rsp)
movl   $0x0,0x8(%rsp)
mov    0x2ebc(%rip),%rax
mov    (%rax),%esi
mov    0x2e9b(%rip),%rax
mov    (%rax),%edx
lea    0x8(%rsp),%rbx
lea    0xc(%rsp),%r8
mov    %rbx,%rcx
call   1030 <getsockopt@plt>
test   %rax,%rax
mov    0x2e85(%rip),%rcx
cmovs  %rcx,%rbx
mov    (%rbx),%eax
mov    %eax,(%rcx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@SOL_SOCKET = global i32 0
@SO_ERROR = global i32 0
@errno = global i32 0
define i32 @sockgetstatus(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 4, i32* %3
store i32 0, i32* %4
%5 = load i32, i32* %2
%6 = load i32, i32* @SOL_SOCKET
%7 = load i32, i32* @SO_ERROR
%8 = bitcast i32* %4 to i8*
%9 = call i64 @getsockopt(i32 %5, i32 %6, i32 %7, i8* %8, i32* %3)
%10 = icmp slt i64 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %1
%12 = load i32, i32* @errno
store i32 %12, i32* %4
br label %13
13: ; preds = %11, %1
%14 = load i32, i32* %4
store i32 %14, i32* @errno
%15 = load i32, i32* %4
ret i32 %15
}

LLVM IR (-O2):
@SOL_SOCKET = global i32 0
@SO_ERROR = global i32 0
@errno = global i32 0
define i32 @sockgetstatus(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = bitcast i32* %2 to i8*
store i32 4, i32* %2
%5 = bitcast i32* %3 to i8*
store i32 0, i32* %3
%6 = load i32, i32* @SOL_SOCKET
%7 = load i32, i32* @SO_ERROR
%8 = call i64 @getsockopt(i32 %0, i32 %6, i32 %7, i8* %5, i32* %2)
%9 = icmp slt i64 %8, 0
%10 = load i32, i32* %3
%11 = load i32, i32* @errno
%12 = select i1 %9, i32 %11, i32 %10
store i32 %12, i32* @errno
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void sig_int(int signo) { exit(0); }


x86 assembly (clang, -O0):
<sig_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<sig_int>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @sig_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @sig_int(i32 %0) {
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
typedef char *va_list;

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ snprintf(char *, int, char *);
void die(va_list args) {
  char str[256];
  snprintf(str, 256, args);
  perror(str);
  exit(4);
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x110(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    $0x100,%esi
call   1030 <snprintf@plt>
lea    -0x110(%rbp),%rdi
call   1040 <perror@plt>
mov    $0x4,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<die>:
push   %rbx
sub    $0x100,%rsp
mov    %rdi,%rdx
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x100,%esi
call   1030 <snprintf@plt>
mov    %rbx,%rdi
call   1040 <perror@plt>
mov    $0x4,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define void @die(i8* %0) {
%2 = alloca i8*
%3 = alloca [256 x i8]
store i8* %0, i8** %2
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%5 = load i8*, i8** %2
%6 = call i32 @snprintf(i8* %4, i32 256, i8* %5)
%7 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%8 = call i32 @perror(i8* %7)
%9 = call i32 @exit(i32 4)
unreachable
}

LLVM IR (-O2):
define void @die(i8* %0) {
%2 = alloca [256 x i8]
%3 = getelementptr inbounds [256 x i8], [256 x i8]* %2, i64 0, i64 0
%4 = call i32 @snprintf(i8* %3, i32 256, i8* %0)
%5 = call i32 @perror(i8* %3)
%6 = call i32 @exit(i32 4)
unreachable
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int __semihost(int, int **);
int semihost_uid(char *uid) {
  uint32_t args[2];
  args[0] = (uint32_t)uid;
  args[1] = 4 + 1;
  return __semihost(((0x100) + 1), &args);
}


x86 assembly (clang, -O0):
<semihost_uid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,-0x10(%rbp)
movl   $0x5,-0xc(%rbp)
lea    -0x10(%rbp),%rsi
mov    $0x101,%edi
call   1030 <__semihost@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<semihost_uid>:
push   %rax
mov    %edi,(%rsp)
movl   $0x5,0x4(%rsp)
mov    %rsp,%rsi
mov    $0x101,%edi
call   1030 <__semihost@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @semihost_uid(i8* %0) {
%2 = alloca i8*
%3 = alloca [2 x i32]
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = ptrtoint i8* %4 to i32
%6 = getelementptr inbounds [2 x i32], [2 x i32]* %3, i64 0, i64 0
store i32 %5, i32* %6
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %3, i64 0, i64 1
store i32 5, i32* %7
%8 = bitcast [2 x i32]* %3 to i32**
%9 = call i32 @__semihost(i32 257, i32** %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @semihost_uid(i8* %0) {
%2 = alloca i32*
%3 = bitcast i32** %2 to [2 x i32]*
%4 = bitcast i32** %2 to i8*
%5 = ptrtoint i8* %0 to i64
%6 = trunc i64 %5 to i32
%7 = bitcast i32** %2 to i32*
store i32 %6, i32* %7
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %3, i64 0, i64 1
store i32 5, i32* %8
%9 = call i32 @__semihost(i32 257, i32** %2)
ret i32 %9
}
/* Type definitions */
struct ecgif_ast {
  int dummy;
};

/* Variables and functions */
struct ecgif_ast *ast_cons(struct ecgif_ast *first, struct ecgif_ast *last) {
  return NULL;
}


x86 assembly (clang, -O0):
<ast_cons>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ast_cons>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ecgif_ast = type { i32 }
define %struct.ecgif_ast* @ast_cons(%struct.ecgif_ast* %0, %struct.ecgif_ast* %1) {
%3 = alloca %struct.ecgif_ast*
%4 = alloca %struct.ecgif_ast*
store %struct.ecgif_ast* %0, %struct.ecgif_ast** %3
store %struct.ecgif_ast* %1, %struct.ecgif_ast** %4
ret %struct.ecgif_ast* null
}

LLVM IR (-O2):
%struct.ecgif_ast = type { i32 }
define noalias %struct.ecgif_ast* @ast_cons(%struct.ecgif_ast* nocapture readnone %0, %struct.ecgif_ast* nocapture readnone %1) {
ret %struct.ecgif_ast* null
}
/* Variables and functions */
int atoi(char *);
char *ext_arg(char *, char *);
int m_n_rand(int, int);
int cal_rand(char *S) {
  char *tmp = S;
  char arg[50];
  int arg1 = 0, arg2 = 0;
  tmp = ext_arg(tmp, arg);
  arg1 = (atoi(arg));
  tmp = ext_arg(tmp, arg);
  arg2 = (atoi(arg));
  return m_n_rand(arg1, arg2);
}


x86 assembly (clang, -O0):
<cal_rand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x54(%rbp)
movl   $0x0,-0x58(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x50(%rbp),%rsi
call   1030 <ext_arg@plt>
mov    %rax,-0x10(%rbp)
lea    -0x50(%rbp),%rdi
call   1050 <atoi@plt>
mov    %eax,-0x54(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x50(%rbp),%rsi
call   1030 <ext_arg@plt>
mov    %rax,-0x10(%rbp)
lea    -0x50(%rbp),%rdi
call   1050 <atoi@plt>
mov    %eax,-0x58(%rbp)
mov    -0x54(%rbp),%edi
mov    -0x58(%rbp),%esi
call   1040 <m_n_rand@plt>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cal_rand>:
push   %rbp
push   %r14
push   %rbx
sub    $0x40,%rsp
mov    %rsp,%r14
mov    %r14,%rsi
call   1030 <ext_arg@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1050 <atoi@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <ext_arg@plt>
mov    %r14,%rdi
call   1050 <atoi@plt>
mov    %ebp,%edi
mov    %eax,%esi
call   1040 <m_n_rand@plt>
add    $0x40,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @cal_rand(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca [50 x i8]
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %2
%7 = load i8*, i8** %2
store i8* %7, i8** %3
store i32 0, i32* %5
store i32 0, i32* %6
%8 = load i8*, i8** %3
%9 = getelementptr inbounds [50 x i8], [50 x i8]* %4, i64 0, i64 0
%10 = call i8* @ext_arg(i8* %8, i8* %9)
store i8* %10, i8** %3
%11 = getelementptr inbounds [50 x i8], [50 x i8]* %4, i64 0, i64 0
%12 = call i32 @atoi(i8* %11)
store i32 %12, i32* %5
%13 = load i8*, i8** %3
%14 = getelementptr inbounds [50 x i8], [50 x i8]* %4, i64 0, i64 0
%15 = call i8* @ext_arg(i8* %13, i8* %14)
store i8* %15, i8** %3
%16 = getelementptr inbounds [50 x i8], [50 x i8]* %4, i64 0, i64 0
%17 = call i32 @atoi(i8* %16)
store i32 %17, i32* %6
%18 = load i32, i32* %5
%19 = load i32, i32* %6
%20 = call i32 @m_n_rand(i32 %18, i32 %19)
ret i32 %20
}

LLVM IR (-O2):
define i32 @cal_rand(i8* %0) {
%2 = alloca [50 x i8]
%3 = getelementptr inbounds [50 x i8], [50 x i8]* %2, i64 0, i64 0
%4 = call i8* @ext_arg(i8* %0, i8* %3)
%5 = call i32 @atoi(i8* %3)
%6 = call i8* @ext_arg(i8* %4, i8* %3)
%7 = call i32 @atoi(i8* %3)
%8 = call i32 @m_n_rand(i32 %5, i32 %7)
ret i32 %8
}
int empeg_hardwarerevision(void) {
  unsigned int *id = (unsigned int *)(0xd0000000 + 0x2000);
  return (id[0]);
}


x86 assembly (clang, -O0):
<empeg_hardwarerevision>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd0002000,%eax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<empeg_hardwarerevision>:
mov    $0xd0002000,%eax
mov    (%rax),%eax
ret

LLVM IR (-O0):
define i32 @empeg_hardwarerevision() {
%1 = alloca i32*
store i32* inttoptr (i64 3489669120 to i32*), i32** %1
%2 = load i32*, i32** %1
%3 = getelementptr inbounds i32, i32* %2, i64 0
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @empeg_hardwarerevision() {
%1 = load i32, i32* inttoptr (i64 3489669120 to i32*)
ret i32 %1
}
/* Variables and functions */
scalar_t__ is_in(int, char *);
int isdelim(int c) {
  if (is_in(c, " +-/*%^<>=[]~&|") || c == '\t' || c == '\n' || c == 0)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isdelim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
lea    0xedb(%rip),%rsi
call   1030 <is_in@plt>
cmp    $0x0,%rax
jne    1152 <isdelim+0x42>
cmpl   $0x9,-0x8(%rbp)
je     1152 <isdelim+0x42>
cmpl   $0xa,-0x8(%rbp)
je     1152 <isdelim+0x42>
cmpl   $0x0,-0x8(%rbp)
jne    115e <isdelim+0x4e>
movl   $0x1,-0x4(%rbp)
jmp    1165 <isdelim+0x55>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isdelim>:
push   %rbx
mov    %edi,%ebx
lea    0xee6(%rip),%rsi
call   1030 <is_in@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     112e <isdelim+0x1e>
pop    %rbx
ret
cmp    $0xa,%ebx
ja     113d <isdelim+0x2d>
mov    $0x601,%ecx
bt     %ebx,%ecx
jb     112c <isdelim+0x1c>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [16 x i8] c" +-/*%^<>=[]~&|\00"
define i32 @isdelim(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @is_in(i32 %4, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%6 = icmp ne i64 %5, 0
br i1 %6, label %16, label %7
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 9
br i1 %9, label %16, label %10
10: ; preds = %7
%11 = load i32, i32* %3
%12 = icmp eq i32 %11, 10
br i1 %12, label %16, label %13
13: ; preds = %10
%14 = load i32, i32* %3
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %13, %10, %7, %1
store i32 1, i32* %2
br label %18
17: ; preds = %13
store i32 0, i32* %2
br label %18
18: ; preds = %17, %16
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
@.str = [16 x i8] c" +-/*%^<>=[]~&|\00"
define i32 @isdelim(i32 %0) {
%2 = tail call i64 @is_in(i32 %0, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%3 = freeze i64 %2
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
switch i32 %0, label %6 [
i32 10, label %7
i32 9, label %7
i32 0, label %7
]
6: ; preds = %5
br label %7
7: ; preds = %1, %5, %5, %5, %6
%8 = phi i32 [ 0, %6 ], [ 1, %5 ], [ 1, %5 ], [ 1, %5 ], [ 1, %1 ]
ret i32 %8
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void BITBAND_SRAM(uint32_t *addr, uint32_t bit, uint32_t val) {
  uint32_t tmp = ((uint32_t)0x22000000UL) +
                 (((uint32_t)addr - ((uint32_t)0x20000000UL)) << 5) +
                 (bit << 2);
  *((volatile uint32_t *)tmp) = (uint32_t)val;
}


x86 assembly (clang, -O0):
<BITBAND_SRAM>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sub    $0x20000000,%eax
shl    $0x5,%eax
add    $0x22000000,%eax
mov    -0xc(%rbp),%ecx
shl    $0x2,%ecx
add    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%ecx
movslq -0x14(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<BITBAND_SRAM>:
shl    $0x5,%edi
lea    (%rdi,%rsi,4),%eax
add    $0x22000000,%eax
cltq
mov    %edx,(%rax)
ret

LLVM IR (-O0):
define void @BITBAND_SRAM(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = ptrtoint i32* %8 to i32
%10 = sub nsw i32 %9, 536870912
%11 = shl i32 %10, 5
%12 = add nsw i32 570425344, %11
%13 = load i32, i32* %5
%14 = shl i32 %13, 2
%15 = add nsw i32 %12, %14
store i32 %15, i32* %7
%16 = load i32, i32* %6
%17 = load i32, i32* %7
%18 = sext i32 %17 to i64
%19 = inttoptr i64 %18 to i32*
store volatile i32 %16, i32* %19
ret void
}

LLVM IR (-O2):
define void @BITBAND_SRAM(i32* %0, i32 %1, i32 %2) {
%4 = ptrtoint i32* %0 to i64
%5 = trunc i64 %4 to i32
%6 = shl i32 %5, 5
%7 = shl i32 %1, 2
%8 = add i32 %7, 570425344
%9 = add i32 %8, %6
%10 = sext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
store volatile i32 %2, i32* %11
ret void
}
int CRYPTO_num_locks(void) { return 1; }


x86 assembly (clang, -O0):
<CRYPTO_num_locks>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CRYPTO_num_locks>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @CRYPTO_num_locks() {
ret i32 1
}

LLVM IR (-O2):
define i32 @CRYPTO_num_locks() {
ret i32 1
}
/* Variables and functions */
float sqrt(float);
float D(float x) {
  if (x > 0.000000001f)
    return sqrt(x);
  else if (x < -0.000000001f)
    return sqrt(-x);
  else
    return 0.0f;
}


x86 assembly (clang, -O0):
<D>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
movss  0xed6(%rip),%xmm1
ucomiss %xmm1,%xmm0
jbe    1147 <D+0x37>
movss  -0x8(%rbp),%xmm0
call   1030 <sqrt@plt>
movss  %xmm0,-0x4(%rbp)
jmp    1182 <D+0x72>
movss  0xeb5(%rip),%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    117a <D+0x6a>
movss  -0x8(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
call   1030 <sqrt@plt>
movss  %xmm0,-0x4(%rbp)
jmp    1182 <D+0x72>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<D>:
ucomiss 0xee9(%rip),%xmm0
ja     1130 <D+0x20>
xorps  %xmm1,%xmm1
movss  0xee0(%rip),%xmm2
ucomiss %xmm0,%xmm2
jbe    113f <D+0x2f>
xorps  0xee0(%rip),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     1143 <D+0x33>
xorps  %xmm1,%xmm1
sqrtss %xmm0,%xmm1
movaps %xmm1,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define float @D(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = fcmp ogt float %4, 0x3E112E0BE0000000
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load float, float* %3
%8 = call float @sqrt(float %7)
store float %8, float* %2
br label %17
9: ; preds = %1
%10 = load float, float* %3
%11 = fcmp olt float %10, 0xBE112E0BE0000000
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = load float, float* %3
%14 = fneg float %13
%15 = call float @sqrt(float %14)
store float %15, float* %2
br label %17
16: ; preds = %9
store float 0.000000e+00, float* %2
br label %17
17: ; preds = %16, %12, %6
%18 = load float, float* %2
ret float %18
}

LLVM IR (-O2):
define float @D(float %0) {
%2 = fcmp ogt float %0, 0x3E112E0BE0000000
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = fcmp olt float %0, 0xBE112E0BE0000000
br i1 %4, label %5, label %10
5: ; preds = %3
%6 = fneg float %0
br label %7
7: ; preds = %1, %5
%8 = phi float [ %6, %5 ], [ %0, %1 ]
%9 = tail call float @sqrt(float %8)
br label %10
10: ; preds = %7, %3
%11 = phi float [ 0.000000e+00, %3 ], [ %9, %7 ]
ret float %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void __attribute__((cdecl)) foo(int x, int y) { printf("a=%d, b=%d\n", x, y); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    %esi,%edx
mov    %edi,%esi
lea    0xee5(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"a=%d, b=%d\0A\00"
define void @foo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"a=%d, b=%d\0A\00"
define void @foo(i32 %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_format_info_copy() {
  printf("NOT IMPLEMENTED:"
         "pa_format_info_copy"
         "\n");
}


x86 assembly (clang, -O0):
<pa_format_info_copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_format_info_copy>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"NOT IMPLEMENTED:pa_format_info_copy\0A\00"
define i32 @pa_format_info_copy() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [36 x i8] c"NOT IMPLEMENTED:pa_format_info_copy\00"
define i32 @pa_format_info_copy() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
int msb_opt(unsigned int v) {
  unsigned int r;
  while (v >>= 1) {
    r++;
  }
  return v;
}


x86 assembly (clang, -O0):
<msb_opt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
je     1127 <msb_opt+0x27>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1107 <msb_opt+0x7>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<msb_opt>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @msb_opt(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %2
%6 = lshr i32 %5, 1
store i32 %6, i32* %2
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32, i32* %3
%10 = add i32 %9, 1
store i32 %10, i32* %3
br label %4
11: ; preds = %4
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @msb_opt(i32 %0) {
ret i32 0
}
unsigned int regulator_get_mode(struct regulator *regulator) { return 0x2; }


x86 assembly (clang, -O0):
<regulator_get_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<regulator_get_mode>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
%struct.regulator = type opaque
define i32 @regulator_get_mode(%struct.regulator* %0) {
%2 = alloca %struct.regulator*
store %struct.regulator* %0, %struct.regulator** %2
ret i32 2
}

LLVM IR (-O2):
%struct.regulator = type opaque
define i32 @regulator_get_mode(%struct.regulator* nocapture readnone %0) {
ret i32 2
}
int always_equal(const void *unused1, const void *unused2,
                 const void *unused3) {
  return 0;
}


x86 assembly (clang, -O0):
<always_equal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<always_equal>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @always_equal(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
ret i32 0
}

LLVM IR (-O2):
define i32 @always_equal(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
ret i32 0
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
double pow2_u64(int);
double from_msr_eu_default(uint64_t msrval) {
  return 1.0 / pow2_u64((msrval >> 8) & 0x1F);
}


x86 assembly (clang, -O0):
<from_msr_eu_default>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
sar    $0x8,%edi
and    $0x1f,%edi
call   1030 <pow2_u64@plt>
movaps %xmm0,%xmm1
movsd  0xecc(%rip),%xmm0
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<from_msr_eu_default>:
push   %rax
shr    $0x8,%edi
and    $0x1f,%edi
call   1030 <pow2_u64@plt>
movsd  0xedc(%rip),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @from_msr_eu_default(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 8
%5 = and i32 %4, 31
%6 = call double @pow2_u64(i32 %5)
%7 = fdiv double 1.000000e+00, %6
ret double %7
}

LLVM IR (-O2):
define double @from_msr_eu_default(i32 %0) {
%2 = lshr i32 %0, 8
%3 = and i32 %2, 31
%4 = tail call double @pow2_u64(i32 %3)
%5 = fdiv double 1.000000e+00, %4
ret double %5
}
/* Type definitions */
struct wl_shm_pool {
  int dummy;
};
struct wl_proxy {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ wl_proxy_marshal(struct wl_proxy *, int, int /*<<< orphan*/);
void wl_shm_pool_resize(struct wl_shm_pool *wl_shm_pool, int32_t size) {
  wl_proxy_marshal((struct wl_proxy *)wl_shm_pool, 2, size);
}


x86 assembly (clang, -O0):
<wl_shm_pool_resize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    $0x2,%esi
call   1030 <wl_proxy_marshal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wl_shm_pool_resize>:
mov    %esi,%edx
mov    $0x2,%esi
jmp    1030 <wl_proxy_marshal@plt>

LLVM IR (-O0):
%struct.wl_shm_pool = type { i32 }
%struct.wl_proxy = type { i32 }
define void @wl_shm_pool_resize(%struct.wl_shm_pool* %0, i32 %1) {
%3 = alloca %struct.wl_shm_pool*
%4 = alloca i32
store %struct.wl_shm_pool* %0, %struct.wl_shm_pool** %3
store i32 %1, i32* %4
%5 = load %struct.wl_shm_pool*, %struct.wl_shm_pool** %3
%6 = bitcast %struct.wl_shm_pool* %5 to %struct.wl_proxy*
%7 = load i32, i32* %4
%8 = call i32 @wl_proxy_marshal(%struct.wl_proxy* %6, i32 2, i32 %7)
ret void
}

LLVM IR (-O2):
%struct.wl_shm_pool = type { i32 }
%struct.wl_proxy = type { i32 }
define void @wl_shm_pool_resize(%struct.wl_shm_pool* %0, i32 %1) {
%3 = bitcast %struct.wl_shm_pool* %0 to %struct.wl_proxy*
%4 = tail call i32 @wl_proxy_marshal(%struct.wl_proxy* %3, i32 2, i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ extract(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int main(int argc, char *argv[]) {
  FILE *in = fopen(argv[1], "rb");
  FILE *out = fopen(argv[2], "wb");
  extract(in, out);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
lea    0xebb(%rip),%rsi
call   1030 <fopen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    0x10(%rax),%rdi
lea    0xea6(%rip),%rsi
call   1030 <fopen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1040 <extract@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    0x8(%rsi),%rdi
lea    0xece(%rip),%rsi
call   1030 <fopen@plt>
mov    %rax,%r14
mov    0x10(%rbx),%rdi
lea    0xebe(%rip),%rsi
call   1030 <fopen@plt>
mov    %r14,%rdi
mov    %rax,%rsi
call   1040 <extract@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"rb\00"
@.str.1 = [3 x i8] c"wb\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32*
%7 = alloca i32*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = load i8**, i8*** %5
%9 = getelementptr inbounds i8*, i8** %8, i64 1
%10 = load i8*, i8** %9
%11 = call i32* @fopen(i8* %10, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
store i32* %11, i32** %6
%12 = load i8**, i8*** %5
%13 = getelementptr inbounds i8*, i8** %12, i64 2
%14 = load i8*, i8** %13
%15 = call i32* @fopen(i8* %14, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
store i32* %15, i32** %7
%16 = load i32*, i32** %6
%17 = load i32*, i32** %7
%18 = call i32 @extract(i32* %16, i32* %17)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"rb\00"
@.str.1 = [3 x i8] c"wb\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32* @fopen(i8* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%6 = getelementptr inbounds i8*, i8** %1, i64 2
%7 = load i8*, i8** %6
%8 = tail call i32* @fopen(i8* %7, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%9 = tail call i32 @extract(i32* %5, i32* %8)
ret i32 0
}
/* Variables and functions */
scalar_t__ sleep(int);
void deepSleep1() {
  while (sleep(1))
    ;
}


x86 assembly (clang, -O0):
<deepSleep1>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <deepSleep1+0x9>
mov    $0x1,%edi
call   1030 <sleep@plt>
cmp    $0x0,%rax
je     1132 <deepSleep1+0x22>
jmp    1119 <deepSleep1+0x9>
pop    %rbp
ret

x86 assembly (clang, -O2):
<deepSleep1>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x1,%edi
call   1030 <sleep@plt>
test   %rax,%rax
jne    1120 <deepSleep1+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @deepSleep1() {
br label %1
1: ; preds = %4, %0
%2 = call i64 @sleep(i32 1)
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %1
br label %1
5: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @deepSleep1() {
br label %1
1: ; preds = %1, %0
%2 = tail call i64 @sleep(i32 1)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %1
4: ; preds = %1
ret void
}
void MessageAppend() {}


x86 assembly (clang, -O0):
<MessageAppend>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MessageAppend>:
ret

LLVM IR (-O0):
define void @MessageAppend() {
ret void
}

LLVM IR (-O2):
define void @MessageAppend() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ O_WRONLY;
int open(char *, int /*<<< orphan*/);
int open_for_writing(char *name) { return open(name, O_WRONLY); }


x86 assembly (clang, -O0):
<open_for_writing>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
call   1030 <open@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_for_writing>:
mov    0x2ec1(%rip),%rax
mov    (%rax),%esi
jmp    1030 <open@plt>

LLVM IR (-O0):
@O_WRONLY = global i32 0
define i32 @open_for_writing(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @O_WRONLY
%5 = call i32 @open(i8* %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@O_WRONLY = global i32 0
define i32 @open_for_writing(i8* nocapture %0) {
%2 = load i32, i32* @O_WRONLY
%3 = tail call i32 @open(i8* %0, i32 %2)
ret i32 %3
}
/* Variables and functions */
scalar_t__ check(int);
int /*<<< orphan*/ usleep(int);
void loop(void) {
  int a = 0;
  while (check(a)) {
    usleep(1000);
  }
}


x86 assembly (clang, -O0):
<loop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <check@plt>
cmp    $0x0,%rax
je     1150 <loop+0x30>
mov    $0x3e8,%edi
call   1040 <usleep@plt>
jmp    112f <loop+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loop>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %edi,%edi
call   1030 <check@plt>
test   %rax,%rax
je     1148 <loop+0x28>
mov    $0x3e8,%edi
call   1040 <usleep@plt>
jmp    1130 <loop+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @loop() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %6, %0
%3 = load i32, i32* %1
%4 = call i64 @check(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = call i32 @usleep(i32 1000)
br label %2
8: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @loop() {
%1 = tail call i64 @check(i32 0)
%2 = icmp eq i64 %1, 0
br i1 %2, label %7, label %3
3: ; preds = %0, %3
%4 = tail call i32 @usleep(i32 1000)
%5 = tail call i64 @check(i32 0)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %3
7: ; preds = %3, %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bm_get_rgb(unsigned int, unsigned char *, unsigned char *,
                              unsigned char *);
unsigned int bm_graypixel(unsigned int c) {
  unsigned char R, G, B;
  bm_get_rgb(c, &R, &G, &B);
  return (2126 * R + 7152 * G + 722 * B) / 10000;
}


x86 assembly (clang, -O0):
<bm_graypixel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x5(%rbp),%rsi
lea    -0x6(%rbp),%rdx
lea    -0x7(%rbp),%rcx
call   1030 <bm_get_rgb@plt>
movzbl -0x5(%rbp),%eax
imul   $0x84e,%eax,%eax
movzbl -0x6(%rbp),%ecx
imul   $0x1bf0,%ecx,%ecx
add    %ecx,%eax
movzbl -0x7(%rbp),%ecx
imul   $0x2d2,%ecx,%ecx
add    %ecx,%eax
mov    $0x2710,%ecx
cltd
idiv   %ecx
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bm_graypixel>:
push   %rax
lea    0x7(%rsp),%rsi
lea    0x6(%rsp),%rdx
lea    0x5(%rsp),%rcx
call   1030 <bm_get_rgb@plt>
movzbl 0x7(%rsp),%eax
imul   $0x84e,%eax,%eax
movzbl 0x6(%rsp),%ecx
imul   $0x1bf0,%ecx,%ecx
add    %eax,%ecx
movzbl 0x5(%rsp),%eax
imul   $0x2d2,%eax,%edx
add    %ecx,%edx
mov    $0xd1b71759,%eax
imul   %rdx,%rax
shr    $0x2d,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @bm_graypixel(i32 %0) {
%2 = alloca i32
%3 = alloca i8
%4 = alloca i8
%5 = alloca i8
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = call i32 @bm_get_rgb(i32 %6, i8* %3, i8* %4, i8* %5)
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = mul nsw i32 2126, %9
%11 = load i8, i8* %4
%12 = zext i8 %11 to i32
%13 = mul nsw i32 7152, %12
%14 = add nsw i32 %10, %13
%15 = load i8, i8* %5
%16 = zext i8 %15 to i32
%17 = mul nsw i32 722, %16
%18 = add nsw i32 %14, %17
%19 = sdiv i32 %18, 10000
ret i32 %19
}

LLVM IR (-O2):
define i32 @bm_graypixel(i32 %0) {
%2 = alloca i8
%3 = alloca i8
%4 = alloca i8
%5 = call i32 @bm_get_rgb(i32 %0, i8* %2, i8* %3, i8* %4)
%6 = load i8, i8* %2
%7 = zext i8 %6 to i32
%8 = mul nuw nsw i32 %7, 2126
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = mul nuw nsw i32 %10, 7152
%12 = add nuw nsw i32 %11, %8
%13 = load i8, i8* %4
%14 = zext i8 %13 to i32
%15 = mul nuw nsw i32 %14, 722
%16 = add nuw nsw i32 %12, %15
%17 = udiv i32 %16, 10000
ret i32 %17
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
uint32_t EEPROMBlockProtectSet(uint32_t ui32Block, uint32_t ui32Protect) {
  ;
  (*((volatile unsigned long *)(0x400AF004))) = ui32Block;
  (*((volatile unsigned long *)(0x400AF030))) = ui32Protect;
  while ((*((volatile unsigned long *)(0x400AF018))) & 0x00000001) {
  }
  return ((*((volatile unsigned long *)(0x400AF018))));
}


x86 assembly (clang, -O0):
<EEPROMBlockProtectSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x400af004,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rcx
mov    $0x400af030,%eax
mov    %rcx,(%rax)
mov    $0x400af018,%eax
mov    (%rax),%rax
and    $0x1,%rax
cmp    $0x0,%rax
je     113f <EEPROMBlockProtectSet+0x3f>
jmp    1124 <EEPROMBlockProtectSet+0x24>
mov    $0x400af018,%eax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<EEPROMBlockProtectSet>:
mov    %rdi,-0x8(%rsp)
mov    %rsi,-0x10(%rsp)
mov    -0x8(%rsp),%rax
mov    %rax,0x400af004
40
mov    -0x10(%rsp),%rax
mov    %rax,0x400af030
40
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    0x400af018,%rax
40
test   $0x1,%al
jne    1130 <EEPROMBlockProtectSet+0x30>
mov    0x400af018,%rax
40
ret

LLVM IR (-O0):
define i64 @EEPROMBlockProtectSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %3
store volatile i64 %5, i64* inttoptr (i64 1074458628 to i64*)
%6 = load volatile i64, i64* %4
store volatile i64 %6, i64* inttoptr (i64 1074458672 to i64*)
br label %7
7: ; preds = %11, %2
%8 = load volatile i64, i64* inttoptr (i64 1074458648 to i64*)
%9 = and i64 %8, 1
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7
br label %7
12: ; preds = %7
%13 = load volatile i64, i64* inttoptr (i64 1074458648 to i64*)
ret i64 %13
}

LLVM IR (-O2):
define i64 @EEPROMBlockProtectSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %3
store volatile i64 %5, i64* inttoptr (i64 1074458628 to i64*)
%6 = load volatile i64, i64* %4
store volatile i64 %6, i64* inttoptr (i64 1074458672 to i64*)
br label %7
7: ; preds = %7, %2
%8 = load volatile i64, i64* inttoptr (i64 1074458648 to i64*)
%9 = and i64 %8, 1
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %7
11: ; preds = %7
%12 = load volatile i64, i64* inttoptr (i64 1074458648 to i64*)
ret i64 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, int);
void ps_linewidth(FILE *ps, int lw) { fprintf(ps, "%d setlinewidth\n", lw); }


x86 assembly (clang, -O0):
<ps_linewidth>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
lea    0xed3(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps_linewidth>:
mov    %esi,%edx
lea    0xee7(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"%d setlinewidth\0A\00"
define void @ps_linewidth(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"%d setlinewidth\0A\00"
define void @ps_linewidth(i32* nocapture %0, i32 %1) {
%3 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
int test_imm_78uint8_mem(unsigned char *val) {
  return ((*val) & (-0x78 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_78uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffff88,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_78uint8_mem>:
testb  $0x88,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_78uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -120
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_78uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -120
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void wpas_dbus_signal_p2p_group_removed(struct wpa_supplicant *wpa_s,
                                        const char *role) {}


x86 assembly (clang, -O0):
<wpas_dbus_signal_p2p_group_removed>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpas_dbus_signal_p2p_group_removed>:
ret

LLVM IR (-O0):
%struct.wpa_supplicant = type opaque
define void @wpas_dbus_signal_p2p_group_removed(%struct.wpa_supplicant* %0, i8* %1) {
%3 = alloca %struct.wpa_supplicant*
%4 = alloca i8*
store %struct.wpa_supplicant* %0, %struct.wpa_supplicant** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
%struct.wpa_supplicant = type opaque
define void @wpas_dbus_signal_p2p_group_removed(%struct.wpa_supplicant* nocapture %0, i8* nocapture %1) {
ret void
}