int parse_displayid_detailed_timing(const unsigned char *x) {
  int ha, hbl, hso, hspw;
  int va, vbl, vso, vspw;
  char phsync, pvsync, *stereo;
  int pix_clock;
  char *aspect;
  switch (x[3] & 0xf) {
  case 0:
    aspect = "1:1";
    break;
  case 1:
    aspect = "5:4";
    break;
  case 2:
    aspect = "4:3";
    break;
  case 3:
    aspect = "15:9";
    break;
  case 4:
    aspect = "16:9";
    break;
  case 5:
    aspect = "16:10";
    break;
  case 6:
    aspect = "64:27";
    break;
  case 7:
    aspect = "256:135";
    break;
  default:
    aspect = "undefined";
    break;
  }
  switch ((x[3] >> 5) & 0x3) {
  case 0:
    stereo = "";
    break;
  case 1:
    stereo = "stereo";
    break;
  case 2:
    stereo = "user action";
    break;
  case 3:
    stereo = "reserved";
    break;
  }
  (void)("Type 1 detailed timing: aspect: %s, %s %s\n", aspect,
         x[3] & 0x80 ? "Preferred " : "", stereo);
  pix_clock = x[0] + (x[1] << 8) + (x[2] << 16);
  ha = x[4] | (x[5] << 8);
  hbl = x[6] | (x[7] << 8);
  hso = x[8] | ((x[9] & 0x7f) << 8);
  phsync = ((x[9] >> 7) & 0x1) ? '+' : '-';
  hspw = x[10] | (x[11] << 8);
  va = x[12] | (x[13] << 8);
  vbl = x[14] | (x[15] << 8);
  vso = x[16] | ((x[17] & 0x7f) << 8);
  vspw = x[18] | (x[19] << 8);
  pvsync = ((x[17] >> 7) & 0x1) ? '+' : '-';
  (void)("Detailed mode: Clock %.3f MHz, %d mm x %d mm\n"
         "               %4d %4d %4d %4d\n"
         "               %4d %4d %4d %4d\n"
         "               %chsync %cvsync\n",
         (float)pix_clock / 100.0, 0, 0, ha, ha + hso, ha + hso + hspw,
         ha + hbl, va, va + vso, va + vso + vspw, va + vbl, phsync, pvsync);
  return 1;
}


x86 assembly (clang, -O0):
<parse_displayid_detailed_timing>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x3(%rax),%eax
and    $0xf,%eax
mov    %eax,%ecx
mov    %rcx,-0x50(%rbp)
sub    $0x7,%eax
ja     11b6 <parse_displayid_detailed_timing+0xb6>
mov    -0x50(%rbp),%rax
lea    0xed3(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
lea    0xef3(%rip),%rax
mov    %rax,-0x48(%rbp)
jmp    11c1 <parse_displayid_detailed_timing+0xc1>
lea    0xee7(%rip),%rax
mov    %rax,-0x48(%rbp)
jmp    11c1 <parse_displayid_detailed_timing+0xc1>
lea    0xedb(%rip),%rax
mov    %rax,-0x48(%rbp)
jmp    11c1 <parse_displayid_detailed_timing+0xc1>
lea    0xecf(%rip),%rax
mov    %rax,-0x48(%rbp)
jmp    11c1 <parse_displayid_detailed_timing+0xc1>
lea    0xec4(%rip),%rax
mov    %rax,-0x48(%rbp)
jmp    11c1 <parse_displayid_detailed_timing+0xc1>
lea    0xeb9(%rip),%rax
mov    %rax,-0x48(%rbp)
jmp    11c1 <parse_displayid_detailed_timing+0xc1>
lea    0xeaf(%rip),%rax
mov    %rax,-0x48(%rbp)
jmp    11c1 <parse_displayid_detailed_timing+0xc1>
lea    0xea5(%rip),%rax
mov    %rax,-0x48(%rbp)
jmp    11c1 <parse_displayid_detailed_timing+0xc1>
lea    0xe9d(%rip),%rax
mov    %rax,-0x48(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x3(%rax),%eax
shr    $0x5,%eax
and    $0x3,%eax
mov    %eax,%ecx
mov    %rcx,-0x58(%rbp)
sub    $0x3,%eax
ja     122d <parse_displayid_detailed_timing+0x12d>
mov    -0x58(%rbp),%rax
lea    0xe37(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
lea    0xf47(%rip),%rax
mov    %rax,-0x38(%rbp)
jmp    122d <parse_displayid_detailed_timing+0x12d>
lea    0xe5b(%rip),%rax
mov    %rax,-0x38(%rbp)
jmp    122d <parse_displayid_detailed_timing+0x12d>
lea    0xe52(%rip),%rax
mov    %rax,-0x38(%rbp)
jmp    122d <parse_displayid_detailed_timing+0x12d>
lea    0xe4e(%rip),%rax
mov    %rax,-0x38(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
add    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x10,%ecx
add    %ecx,%eax
mov    %eax,-0x3c(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x4(%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0x5(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x6(%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0x7(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x8(%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0x9(%rcx),%ecx
and    $0x7f,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x9(%rax),%edx
sar    $0x7,%edx
and    $0x1,%edx
mov    $0x2d,%eax
mov    $0x2b,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %al,-0x29(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0xa(%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0xb(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0xc(%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0xd(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0xe(%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0xf(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x10(%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0x11(%rcx),%ecx
and    $0x7f,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0x24(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x12(%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0x13(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0x28(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x11(%rax),%edx
sar    $0x7,%edx
and    $0x1,%edx
mov    $0x2d,%eax
mov    $0x2b,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %al,-0x2a(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_displayid_detailed_timing>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"1:1\00"
@.str.1 = [4 x i8] c"5:4\00"
@.str.2 = [4 x i8] c"4:3\00"
@.str.3 = [5 x i8] c"15:9\00"
@.str.4 = [5 x i8] c"16:9\00"
@.str.5 = [6 x i8] c"16:10\00"
@.str.6 = [6 x i8] c"64:27\00"
@.str.7 = [8 x i8] c"256:135\00"
@.str.8 = [10 x i8] c"undefined\00"
@.str.9 = [1 x i8] zeroinitializer
@.str.10 = [7 x i8] c"stereo\00"
@.str.11 = [12 x i8] c"user action\00"
@.str.12 = [9 x i8] c"reserved\00"
@.str.13 = [43 x i8] c"Type 1 detailed timing: aspect: %s, %s %s\0A\00"
@.str.14 = [11 x i8] c"Preferred \00"
@.str.15 = [139 x i8] c"Detailed mode: Clock %.3f MHz, %d mm x %d mm\0A %4d %4d %4d %4d\0A %4d %4d %4d %4d\0A %chsync %cvsync\0A\00"
define i32 @parse_displayid_detailed_timing(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i8
%12 = alloca i8
%13 = alloca i8*
%14 = alloca i32
%15 = alloca i8*
store i8* %0, i8** %2
%16 = load i8*, i8** %2
%17 = getelementptr inbounds i8, i8* %16, i64 3
%18 = load i8, i8* %17
%19 = zext i8 %18 to i32
%20 = and i32 %19, 15
switch i32 %20, label %29 [
i32 0, label %21
i32 1, label %22
i32 2, label %23
i32 3, label %24
i32 4, label %25
i32 5, label %26
i32 6, label %27
i32 7, label %28
]
21: ; preds = %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %15
br label %30
22: ; preds = %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8** %15
br label %30
23: ; preds = %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i8** %15
br label %30
24: ; preds = %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.3, i64 0, i64 0), i8** %15
br label %30
25: ; preds = %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.4, i64 0, i64 0), i8** %15
br label %30
26: ; preds = %1
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.5, i64 0, i64 0), i8** %15
br label %30
27: ; preds = %1
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.6, i64 0, i64 0), i8** %15
br label %30
28: ; preds = %1
store i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.7, i64 0, i64 0), i8** %15
br label %30
29: ; preds = %1
store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.8, i64 0, i64 0), i8** %15
br label %30
30: ; preds = %29, %28, %27, %26, %25, %24, %23, %22, %21
%31 = load i8*, i8** %2
%32 = getelementptr inbounds i8, i8* %31, i64 3
%33 = load i8, i8* %32
%34 = zext i8 %33 to i32
%35 = ashr i32 %34, 5
%36 = and i32 %35, 3
switch i32 %36, label %41 [
i32 0, label %37
i32 1, label %38
i32 2, label %39
i32 3, label %40
]
37: ; preds = %30
store i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.9, i64 0, i64 0), i8** %13
br label %41
38: ; preds = %30
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.10, i64 0, i64 0), i8** %13
br label %41
39: ; preds = %30
store i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.11, i64 0, i64 0), i8** %13
br label %41
40: ; preds = %30
store i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.12, i64 0, i64 0), i8** %13
br label %41
41: ; preds = %30, %40, %39, %38, %37
%42 = load i8*, i8** %15
%43 = load i8*, i8** %2
%44 = getelementptr inbounds i8, i8* %43, i64 3
%45 = load i8, i8* %44
%46 = zext i8 %45 to i32
%47 = and i32 %46, 128
%48 = icmp ne i32 %47, 0
%49 = zext i1 %48 to i64
%50 = select i1 %48, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.14, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.9, i64 0, i64 0)
%51 = load i8*, i8** %13
%52 = load i8*, i8** %2
%53 = getelementptr inbounds i8, i8* %52, i64 0
%54 = load i8, i8* %53
%55 = zext i8 %54 to i32
%56 = load i8*, i8** %2
%57 = getelementptr inbounds i8, i8* %56, i64 1
%58 = load i8, i8* %57
%59 = zext i8 %58 to i32
%60 = shl i32 %59, 8
%61 = add nsw i32 %55, %60
%62 = load i8*, i8** %2
%63 = getelementptr inbounds i8, i8* %62, i64 2
%64 = load i8, i8* %63
%65 = zext i8 %64 to i32
%66 = shl i32 %65, 16
%67 = add nsw i32 %61, %66
store i32 %67, i32* %14
%68 = load i8*, i8** %2
%69 = getelementptr inbounds i8, i8* %68, i64 4
%70 = load i8, i8* %69
%71 = zext i8 %70 to i32
%72 = load i8*, i8** %2
%73 = getelementptr inbounds i8, i8* %72, i64 5
%74 = load i8, i8* %73
%75 = zext i8 %74 to i32
%76 = shl i32 %75, 8
%77 = or i32 %71, %76
store i32 %77, i32* %3
%78 = load i8*, i8** %2
%79 = getelementptr inbounds i8, i8* %78, i64 6
%80 = load i8, i8* %79
%81 = zext i8 %80 to i32
%82 = load i8*, i8** %2
%83 = getelementptr inbounds i8, i8* %82, i64 7
%84 = load i8, i8* %83
%85 = zext i8 %84 to i32
%86 = shl i32 %85, 8
%87 = or i32 %81, %86
store i32 %87, i32* %4
%88 = load i8*, i8** %2
%89 = getelementptr inbounds i8, i8* %88, i64 8
%90 = load i8, i8* %89
%91 = zext i8 %90 to i32
%92 = load i8*, i8** %2
%93 = getelementptr inbounds i8, i8* %92, i64 9
%94 = load i8, i8* %93
%95 = zext i8 %94 to i32
%96 = and i32 %95, 127
%97 = shl i32 %96, 8
%98 = or i32 %91, %97
store i32 %98, i32* %5
%99 = load i8*, i8** %2
%100 = getelementptr inbounds i8, i8* %99, i64 9
%101 = load i8, i8* %100
%102 = zext i8 %101 to i32
%103 = ashr i32 %102, 7
%104 = and i32 %103, 1
%105 = icmp ne i32 %104, 0
%106 = zext i1 %105 to i64
%107 = select i1 %105, i32 43, i32 45
%108 = trunc i32 %107 to i8
store i8 %108, i8* %11
%109 = load i8*, i8** %2
%110 = getelementptr inbounds i8, i8* %109, i64 10
%111 = load i8, i8* %110
%112 = zext i8 %111 to i32
%113 = load i8*, i8** %2
%114 = getelementptr inbounds i8, i8* %113, i64 11
%115 = load i8, i8* %114
%116 = zext i8 %115 to i32
%117 = shl i32 %116, 8
%118 = or i32 %112, %117
store i32 %118, i32* %6
%119 = load i8*, i8** %2
%120 = getelementptr inbounds i8, i8* %119, i64 12
%121 = load i8, i8* %120
%122 = zext i8 %121 to i32
%123 = load i8*, i8** %2
%124 = getelementptr inbounds i8, i8* %123, i64 13
%125 = load i8, i8* %124
%126 = zext i8 %125 to i32
%127 = shl i32 %126, 8
%128 = or i32 %122, %127
store i32 %128, i32* %7
%129 = load i8*, i8** %2
%130 = getelementptr inbounds i8, i8* %129, i64 14
%131 = load i8, i8* %130
%132 = zext i8 %131 to i32
%133 = load i8*, i8** %2
%134 = getelementptr inbounds i8, i8* %133, i64 15
%135 = load i8, i8* %134
%136 = zext i8 %135 to i32
%137 = shl i32 %136, 8
%138 = or i32 %132, %137
store i32 %138, i32* %8
%139 = load i8*, i8** %2
%140 = getelementptr inbounds i8, i8* %139, i64 16
%141 = load i8, i8* %140
%142 = zext i8 %141 to i32
%143 = load i8*, i8** %2
%144 = getelementptr inbounds i8, i8* %143, i64 17
%145 = load i8, i8* %144
%146 = zext i8 %145 to i32
%147 = and i32 %146, 127
%148 = shl i32 %147, 8
%149 = or i32 %142, %148
store i32 %149, i32* %9
%150 = load i8*, i8** %2
%151 = getelementptr inbounds i8, i8* %150, i64 18
%152 = load i8, i8* %151
%153 = zext i8 %152 to i32
%154 = load i8*, i8** %2
%155 = getelementptr inbounds i8, i8* %154, i64 19
%156 = load i8, i8* %155
%157 = zext i8 %156 to i32
%158 = shl i32 %157, 8
%159 = or i32 %153, %158
store i32 %159, i32* %10
%160 = load i8*, i8** %2
%161 = getelementptr inbounds i8, i8* %160, i64 17
%162 = load i8, i8* %161
%163 = zext i8 %162 to i32
%164 = ashr i32 %163, 7
%165 = and i32 %164, 1
%166 = icmp ne i32 %165, 0
%167 = zext i1 %166 to i64
%168 = select i1 %166, i32 43, i32 45
%169 = trunc i32 %168 to i8
store i8 %169, i8* %12
%170 = load i32, i32* %14
%171 = sitofp i32 %170 to float
%172 = fpext float %171 to double
%173 = fdiv double %172, 1.000000e+02
%174 = load i32, i32* %3
%175 = load i32, i32* %3
%176 = load i32, i32* %5
%177 = add nsw i32 %175, %176
%178 = load i32, i32* %3
%179 = load i32, i32* %5
%180 = add nsw i32 %178, %179
%181 = load i32, i32* %6
%182 = add nsw i32 %180, %181
%183 = load i32, i32* %3
%184 = load i32, i32* %4
%185 = add nsw i32 %183, %184
%186 = load i32, i32* %7
%187 = load i32, i32* %7
%188 = load i32, i32* %9
%189 = add nsw i32 %187, %188
%190 = load i32, i32* %7
%191 = load i32, i32* %9
%192 = add nsw i32 %190, %191
%193 = load i32, i32* %10
%194 = add nsw i32 %192, %193
%195 = load i32, i32* %7
%196 = load i32, i32* %8
%197 = add nsw i32 %195, %196
%198 = load i8, i8* %11
%199 = load i8, i8* %12
ret i32 1
}

LLVM IR (-O2):
define i32 @parse_displayid_detailed_timing(i8* nocapture %0) {
ret i32 1
}