xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void lsx_free(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<lsx_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lsx_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @lsx_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @lsx_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int fib(int);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char *argv[]) {
  printf("%d\n", fib(40));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x28,%edi
call   1040 <fib@plt>
mov    %eax,%esi
lea    0xeb7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x28,%edi
call   1040 <fib@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @fib(i32 40)
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @fib(i32 40)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
int f(int n) {
  int i;
  int x = 1;
  for (i = 1; i < n; i++) {
    x += f(i);
  }
  return x;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0xc(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1151 <f+0x41>
mov    -0x8(%rbp),%edi
call   1030 <f@plt>
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1129 <f+0x19>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rbp
push   %r14
push   %rbx
mov    $0x1,%ebp
cmp    $0x2,%edi
jl     1141 <f+0x31>
mov    %edi,%r14d
mov    $0x1,%ebp
mov    $0x1,%ebx
nopl   0x0(%rax,%rax,1)
mov    %ebx,%edi
call   1030 <f@plt>
add    %eax,%ebp
add    $0x1,%ebx
cmp    %ebx,%r14d
jne    1130 <f+0x20>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %4
store i32 1, i32* %3
br label %5
5: ; preds = %14, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %17
9: ; preds = %5
%10 = load i32, i32* %3
%11 = call i32 @f(i32 %10)
%12 = load i32, i32* %4
%13 = add nsw i32 %12, %11
store i32 %13, i32* %4
br label %14
14: ; preds = %9
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %5
17: ; preds = %5
%18 = load i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = icmp sgt i32 %0, 1
br i1 %2, label %3, label %10
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 1, %1 ]
%5 = phi i32 [ %8, %3 ], [ 1, %1 ]
%6 = tail call i32 @f(i32 %5)
%7 = add nsw i32 %6, %4
%8 = add nuw nsw i32 %5, 1
%9 = icmp eq i32 %8, %0
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 1, %1 ], [ %7, %3 ]
ret i32 %11
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
double stdlib_strided_dmidrange(int, double *, int);
int main() {
  double x[] = {1.0, -2.0, -3.0, 4.0, -5.0, -6.0, 7.0, 8.0};
  int64_t N = 4;
  int64_t stride = 2;
  double v = stdlib_strided_dmidrange(N, x, stride);
  printf("mid-range: %lf\n", v);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
lea    -0x40(%rbp),%rdi
lea    0xebd(%rip),%rsi
mov    $0x40,%edx
call   1040 <memcpy@plt>
movl   $0x4,-0x44(%rbp)
movl   $0x2,-0x48(%rbp)
mov    -0x44(%rbp),%edi
lea    -0x40(%rbp),%rsi
mov    -0x48(%rbp),%edx
call   1050 <stdlib_strided_dmidrange@plt>
movsd  %xmm0,-0x50(%rbp)
movsd  -0x50(%rbp),%xmm0
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x48,%rsp
movaps 0xf05(%rip),%xmm0
movaps %xmm0,0x30(%rsp)
movaps 0xee9(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xecd(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xeb1(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rsi
mov    $0x4,%edi
mov    $0x2,%edx
call   1040 <stdlib_strided_dmidrange@plt>
lea    0xed4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x48,%rsp
ret

LLVM IR (-O0):
@__const.main.x = [8 x double] [double 1.000000e+00, double -2.000000e+00, double -3.000000e+00, double 4.000000e+00, double -5.000000e+00, double -6.000000e+00, double 7.000000e+00, double 8.000000e+00]
@.str = [16 x i8] c"mid-range: %lf\0A\00"
define i32 @main() {
%1 = alloca [8 x double]
%2 = alloca i32
%3 = alloca i32
%4 = alloca double
%5 = bitcast [8 x double]* %1 to i8*
store i32 4, i32* %2
store i32 2, i32* %3
%6 = load i32, i32* %2
%7 = getelementptr inbounds [8 x double], [8 x double]* %1, i64 0, i64 0
%8 = load i32, i32* %3
%9 = call double @stdlib_strided_dmidrange(i32 %6, double* %7, i32 %8)
store double %9, double* %4
%10 = load double, double* %4
%11 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), double %10)
ret i32 0
}

LLVM IR (-O2):
@__const.main.x = [8 x double] [double 1.000000e+00, double -2.000000e+00, double -3.000000e+00, double 4.000000e+00, double -5.000000e+00, double -6.000000e+00, double 7.000000e+00, double 8.000000e+00]
@.str = [16 x i8] c"mid-range: %lf\0A\00"
define i32 @main() {
%1 = alloca [8 x double]
%2 = bitcast [8 x double]* %1 to i8*
%3 = getelementptr inbounds [8 x double], [8 x double]* %1, i64 0, i64 0
%4 = call double @stdlib_strided_dmidrange(i32 4, double* %3, i32 2)
%5 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), double %4)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ GPIODirModeSet(int /*<<< orphan*/, int /*<<< orphan*/, int);
int /*<<< orphan*/ GPIOPadConfigSet(int /*<<< orphan*/, int /*<<< orphan*/, int,
                                    int);
void GPIOPinTypeQEI(uint32_t ui32Port, uint8_t ui8Pins) {
  ;
  GPIODirModeSet(ui32Port, ui8Pins, 0x00000002);
  GPIOPadConfigSet(ui32Port, ui8Pins, 0x00000001, 0x0000000A);
}


x86 assembly (clang, -O0):
<GPIOPinTypeQEI>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x1,%edx
mov    $0xa,%ecx
call   1030 <GPIOPadConfigSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinTypeQEI>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    %ebp,%edi
mov    %ebx,%esi
mov    $0x1,%edx
mov    $0xa,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <GPIOPadConfigSet@plt>

LLVM IR (-O0):
define void @GPIOPinTypeQEI(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @GPIODirModeSet(i32 %5, i32 %6, i32 2)
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @GPIOPadConfigSet(i32 %8, i32 %9, i32 1, i32 10)
ret void
}

LLVM IR (-O2):
define void @GPIOPinTypeQEI(i32 %0, i32 %1) {
%3 = tail call i32 @GPIODirModeSet(i32 %0, i32 %1, i32 2)
%4 = tail call i32 @GPIOPadConfigSet(i32 %0, i32 %1, i32 1, i32 10)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t next_power_2(uint32_t n) {
  n |= (n >> 16);
  n |= (n >> 8);
  n |= (n >> 4);
  n |= (n >> 2);
  n |= (n >> 1);
  return n + 1;
}


x86 assembly (clang, -O0):
<next_power_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x2,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_power_2>:
mov    %edi,%eax
sar    $0x10,%eax
or     %edi,%eax
mov    %eax,%ecx
sar    $0x8,%ecx
or     %eax,%ecx
mov    %ecx,%eax
sar    $0x4,%eax
or     %ecx,%eax
mov    %eax,%ecx
sar    $0x2,%ecx
or     %eax,%ecx
mov    %ecx,%eax
sar    %eax
or     %ecx,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @next_power_2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 16
%5 = load i32, i32* %2
%6 = or i32 %5, %4
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = ashr i32 %7, 8
%9 = load i32, i32* %2
%10 = or i32 %9, %8
store i32 %10, i32* %2
%11 = load i32, i32* %2
%12 = ashr i32 %11, 4
%13 = load i32, i32* %2
%14 = or i32 %13, %12
store i32 %14, i32* %2
%15 = load i32, i32* %2
%16 = ashr i32 %15, 2
%17 = load i32, i32* %2
%18 = or i32 %17, %16
store i32 %18, i32* %2
%19 = load i32, i32* %2
%20 = ashr i32 %19, 1
%21 = load i32, i32* %2
%22 = or i32 %21, %20
store i32 %22, i32* %2
%23 = load i32, i32* %2
%24 = add nsw i32 %23, 1
ret i32 %24
}

LLVM IR (-O2):
define i32 @next_power_2(i32 %0) {
%2 = ashr i32 %0, 16
%3 = or i32 %2, %0
%4 = ashr i32 %3, 8
%5 = or i32 %4, %3
%6 = ashr i32 %5, 4
%7 = or i32 %6, %5
%8 = ashr i32 %7, 2
%9 = or i32 %8, %7
%10 = ashr i32 %9, 1
%11 = or i32 %10, %9
%12 = add nsw i32 %11, 1
ret i32 %12
}
int main(void) {
  int i;
  int i___0;
  int a;
  {
    i = 0;
    {
      while (1) {
      while_continue:;
        if (i) {
        } else {
          goto while_break;
        }
        i___0 = 5;
      }
    while_break:;
    }
    a = 0;
    return (0);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
jmp    1117 <main+0x17>
cmpl   $0x0,-0x8(%rbp)
je     1126 <main+0x26>
jmp    112b <main+0x2b>
jmp    1137 <main+0x37>
movl   $0x5,-0xc(%rbp)
jmp    1112 <main+0x12>
movl   $0x0,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %5
5: ; preds = %0, %11
br label %6
6: ; preds = %5
%7 = load i32, i32* %2
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %6
br label %11
10: ; preds = %6
br label %12
11: ; preds = %9
store i32 5, i32* %3
br label %5
12: ; preds = %10
store i32 0, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ GIF_framewrite();
void GIF_frame(void) { GIF_framewrite(); }


x86 assembly (clang, -O0):
<GIF_frame>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GIF_framewrite@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GIF_frame>:
xor    %eax,%eax
jmp    1030 <GIF_framewrite@plt>

LLVM IR (-O0):
define void @GIF_frame() {
%1 = call i32 (...) @GIF_framewrite()
ret void
}

LLVM IR (-O2):
define void @GIF_frame() {
%1 = tail call i32 (...) @GIF_framewrite()
ret void
}
double ls_costN_nm10_sq(double x) { return x * x; }


x86 assembly (clang, -O0):
<ls_costN_nm10_sq>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_costN_nm10_sq>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @ls_costN_nm10_sq(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @ls_costN_nm10_sq(double %0) {
%2 = fmul double %0, %0
ret double %2
}
vbstmp() {}


x86 assembly (clang, -O0):
<vbstmp>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vbstmp>:
ret

LLVM IR (-O0):
define i32 @vbstmp() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @vbstmp() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ write_imm(int);
int /*<<< orphan*/ write_instr(int);
int rgui_handler(char **save) {
  write_instr(0x00);
  write_imm(0xE7);
  write_instr(0x28);
  return 0;
}


x86 assembly (clang, -O0):
<rgui_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
call   1040 <write_instr@plt>
mov    $0xe7,%edi
call   1030 <write_imm@plt>
mov    $0x28,%edi
call   1040 <write_instr@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgui_handler>:
push   %rax
xor    %edi,%edi
call   1040 <write_instr@plt>
mov    $0xe7,%edi
call   1030 <write_imm@plt>
mov    $0x28,%edi
call   1040 <write_instr@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @rgui_handler(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = call i32 @write_instr(i32 0)
%4 = call i32 @write_imm(i32 231)
%5 = call i32 @write_instr(i32 40)
ret i32 0
}

LLVM IR (-O2):
define i32 @rgui_handler(i8** nocapture readnone %0) {
%2 = tail call i32 @write_instr(i32 0)
%3 = tail call i32 @write_imm(i32 231)
%4 = tail call i32 @write_instr(i32 40)
ret i32 0
}
int ldprec(void) { return 0; }


x86 assembly (clang, -O0):
<ldprec>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ldprec>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ldprec() {
ret i32 0
}

LLVM IR (-O2):
define i32 @ldprec() {
ret i32 0
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t swap64(uint64_t val) {
  return ((val >> 56) & 0x00000000000000ffULL) |
         ((val >> 40) & 0x000000000000ff00ULL) |
         ((val >> 24) & 0x0000000000ff0000ULL) |
         ((val >> 8) & 0x00000000ff000000ULL) |
         ((val << 8) & 0x000000ff00000000ULL) |
         ((val << 24) & 0x0000ff0000000000ULL) |
         ((val << 40) & 0x00ff000000000000ULL) |
         ((val << 56) & 0xff00000000000000ULL);
}


x86 assembly (clang, -O0):
<swap64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x38,%ecx
sar    %cl,%eax
cltq
and    $0xff,%rax
mov    -0x4(%rbp),%edx
mov    $0x28,%ecx
sar    %cl,%edx
mov    %edx,%ecx
movslq %ecx,%rcx
and    $0xff00,%rcx
or     %rcx,%rax
mov    -0x4(%rbp),%ecx
sar    $0x18,%ecx
movslq %ecx,%rcx
and    $0xff0000,%rcx
or     %rcx,%rax
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
movslq %ecx,%rcx
movabs $0xff000000,%rdx
and    %rdx,%rcx
or     %rcx,%rax
mov    -0x4(%rbp),%ecx
shl    $0x8,%ecx
movslq %ecx,%rcx
movabs $0xff00000000,%rdx
and    %rdx,%rcx
or     %rcx,%rax
mov    -0x4(%rbp),%ecx
shl    $0x18,%ecx
movslq %ecx,%rcx
movabs $0xff0000000000,%rdx
and    %rdx,%rcx
or     %rcx,%rax
mov    -0x4(%rbp),%edx
mov    $0x28,%ecx
shl    %cl,%edx
mov    %edx,%ecx
movslq %ecx,%rcx
movabs $0xff000000000000,%rdx
and    %rdx,%rcx
or     %rcx,%rax
mov    -0x4(%rbp),%edx
mov    $0x38,%ecx
shl    %cl,%edx
mov    %edx,%ecx
movslq %ecx,%rcx
movabs $0xff00000000000000,%rdx
and    %rdx,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap64>:
ret

LLVM IR (-O0):
define i32 @swap64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 56
%5 = sext i32 %4 to i64
%6 = and i64 %5, 255
%7 = load i32, i32* %2
%8 = ashr i32 %7, 40
%9 = sext i32 %8 to i64
%10 = and i64 %9, 65280
%11 = or i64 %6, %10
%12 = load i32, i32* %2
%13 = ashr i32 %12, 24
%14 = sext i32 %13 to i64
%15 = and i64 %14, 16711680
%16 = or i64 %11, %15
%17 = load i32, i32* %2
%18 = ashr i32 %17, 8
%19 = sext i32 %18 to i64
%20 = and i64 %19, 4278190080
%21 = or i64 %16, %20
%22 = load i32, i32* %2
%23 = shl i32 %22, 8
%24 = sext i32 %23 to i64
%25 = and i64 %24, 1095216660480
%26 = or i64 %21, %25
%27 = load i32, i32* %2
%28 = shl i32 %27, 24
%29 = sext i32 %28 to i64
%30 = and i64 %29, 280375465082880
%31 = or i64 %26, %30
%32 = load i32, i32* %2
%33 = shl i32 %32, 40
%34 = sext i32 %33 to i64
%35 = and i64 %34, 71776119061217280
%36 = or i64 %31, %35
%37 = load i32, i32* %2
%38 = shl i32 %37, 56
%39 = sext i32 %38 to i64
%40 = and i64 %39, -72057594037927936
%41 = or i64 %36, %40
%42 = trunc i64 %41 to i32
ret i32 %42
}

LLVM IR (-O2):
define i32 @swap64(i32 %0) {
ret i32 poison
}
int test_uninitialized() {
  int sum;
  int values[] = {1, 2, 3, 4};
  int i;
  for (i = 0; i < 4; ++i) {
    sum += values[i];
  }
  return sum;
}


x86 assembly (clang, -O0):
<test_uninitialized>:
push   %rbp
mov    %rsp,%rbp
mov    0xef5(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xef2(%rip),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x24(%rbp)
cmpl   $0x4,-0x24(%rbp)
jge    1147 <test_uninitialized+0x47>
movslq -0x24(%rbp),%rax
mov    -0x20(%rbp,%rax,4),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    1121 <test_uninitialized+0x21>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_uninitialized>:
ret

LLVM IR (-O0):
@__const.test_uninitialized.values = [4 x i32] [i32 1, i32 2, i32 3, i32 4]
define i32 @test_uninitialized() {
%1 = alloca i32
%2 = alloca [4 x i32]
%3 = alloca i32
%4 = bitcast [4 x i32]* %2 to i8*
store i32 0, i32* %3
br label %5
5: ; preds = %15, %0
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 4
br i1 %7, label %8, label %18
8: ; preds = %5
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 0, i64 %10
%12 = load i32, i32* %11
%13 = load i32, i32* %1
%14 = add nsw i32 %13, %12
store i32 %14, i32* %1
br label %15
15: ; preds = %8
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
store i32 %17, i32* %3
br label %5
18: ; preds = %5
%19 = load i32, i32* %1
ret i32 %19
}

LLVM IR (-O2):
define i32 @test_uninitialized() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int main() {
  printf("%s\n", "12");
  printf("%s\n", "f(1,2)");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
lea    0xed7(%rip),%rsi
call   1030 <printf@plt>
lea    0xec7(%rip),%rdi
lea    0xec7(%rip),%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
lea    0xee5(%rip),%rsi
mov    %rbx,%rdi
call   1030 <printf@plt>
lea    0xed9(%rip),%rsi
mov    %rbx,%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [3 x i8] c"12\00"
@.str.2 = [7 x i8] c"f(1,2)\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [3 x i8] c"12\00"
@.str.2 = [7 x i8] c"f(1,2)\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ foo10(float, int);
void bar10(float y, int x) { foo10(y, x); }


x86 assembly (clang, -O0):
<bar10>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
mov    -0x8(%rbp),%edi
call   1030 <foo10@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar10>:
jmp    1030 <foo10@plt>

LLVM IR (-O0):
define void @bar10(float %0, i32 %1) {
%3 = alloca float
%4 = alloca i32
store float %0, float* %3
store i32 %1, i32* %4
%5 = load float, float* %3
%6 = load i32, i32* %4
%7 = call i32 @foo10(float %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @bar10(float %0, i32 %1) {
%3 = tail call i32 @foo10(float %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *, int);
int sumOfNumber(char *, char *);
int main(void) {
  char array1[4] = "123";
  char array2[4] = "459";
  printf("%s+%s=%d", array1, array2, sumOfNumber(array1, array2));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xecb(%rip),%eax
mov    %eax,-0x8(%rbp)
mov    0xec6(%rip),%eax
mov    %eax,-0xc(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
lea    -0xc(%rbp),%rax
mov    %rax,-0x18(%rbp)
lea    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1040 <sumOfNumber@plt>
mov    -0x20(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    %eax,%ecx
lea    0xe99(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
movl   $0x333231,0x4(%rsp)
movl   $0x393534,(%rsp)
lea    0x4(%rsp),%rbx
mov    %rsp,%r14
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <sumOfNumber@plt>
lea    0xeb3(%rip),%rdi
mov    %rbx,%rsi
mov    %r14,%rdx
mov    %eax,%ecx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@__const.main.array1 = [4 x i8] c"123\00"
@__const.main.array2 = [4 x i8] c"459\00"
@.str = [9 x i8] c"%s+%s=%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [4 x i8]
%3 = alloca [4 x i8]
store i32 0, i32* %1
%4 = bitcast [4 x i8]* %2 to i8*
%5 = bitcast [4 x i8]* %3 to i8*
%6 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%7 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%8 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%9 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%10 = call i32 @sumOfNumber(i8* %8, i8* %9)
%11 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %6, i8* %7, i32 %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"%s+%s=%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
store i32 3355185, i32* %1
%4 = bitcast i32* %2 to i8*
store i32 3749172, i32* %2
%5 = call i32 @sumOfNumber(i8* %3, i8* %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %3, i8* %4, i32 %5)
ret i32 0
}
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
int readlink(char const *, char *, size_t);
ssize_t xreadlink(const char *pathname, char *buf, size_t bufsiz) {
  ssize_t ret = readlink(pathname, buf, bufsiz);
  if (ret == -1) {
    ;
  } else {
    buf[ret] = '\0';
  }
  return ret;
}


x86 assembly (clang, -O0):
<xreadlink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <readlink@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0xffffffff,-0x1c(%rbp)
jne    1147 <xreadlink+0x37>
jmp    1153 <xreadlink+0x43>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xreadlink>:
push   %rbx
mov    %rsi,%rbx
call   1030 <readlink@plt>
cmp    $0xffffffff,%eax
je     1125 <xreadlink+0x15>
movslq %eax,%rcx
movb   $0x0,(%rbx,%rcx,1)
pop    %rbx
ret

LLVM IR (-O0):
define i32 @xreadlink(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i8*, i8** %4
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = call i32 @readlink(i8* %8, i8* %9, i64 %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = icmp eq i32 %12, -1
br i1 %13, label %14, label %15
14: ; preds = %3
br label %20
15: ; preds = %3
%16 = load i8*, i8** %5
%17 = load i32, i32* %7
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
store i8 0, i8* %19
br label %20
20: ; preds = %15, %14
%21 = load i32, i32* %7
ret i32 %21
}

LLVM IR (-O2):
define i32 @xreadlink(i8* nocapture %0, i8* nocapture %1, i64 %2) {
%4 = tail call i32 @readlink(i8* %0, i8* %1, i64 %2)
%5 = icmp eq i32 %4, -1
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = sext i32 %4 to i64
%8 = getelementptr inbounds i8, i8* %1, i64 %7
store i8 0, i8* %8
br label %9
9: ; preds = %3, %6
ret i32 %4
}
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_REALTIME;
int clock_nanosleep(int /*<<< orphan*/, int /*<<< orphan*/,
                    struct timespec const *, struct timespec *);
int errno;
int nanosleep(const struct timespec *rqtp, struct timespec *rem) {
  int error = clock_nanosleep(CLOCK_REALTIME, 0, rqtp, rem);
  if (error != 0) {
    errno = error;
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<nanosleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
xor    %esi,%esi
call   1030 <clock_nanosleep@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
je     115d <nanosleep+0x4d>
mov    -0x1c(%rbp),%ecx
mov    0x2e91(%rip),%rax
mov    %ecx,(%rax)
movl   $0xffffffff,-0x4(%rbp)
jmp    1164 <nanosleep+0x54>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nanosleep>:
push   %rbx
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
xor    %ebx,%ebx
xor    %esi,%esi
call   1030 <clock_nanosleep@plt>
test   %eax,%eax
je     113b <nanosleep+0x2b>
mov    0x2eac(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
@CLOCK_REALTIME = global i32 0
@errno = global i32 0
define i32 @nanosleep(%struct.timespec* %0, %struct.timespec* %1) {
%3 = alloca i32
%4 = alloca %struct.timespec*
%5 = alloca %struct.timespec*
%6 = alloca i32
store %struct.timespec* %0, %struct.timespec** %4
store %struct.timespec* %1, %struct.timespec** %5
%7 = load i32, i32* @CLOCK_REALTIME
%8 = load %struct.timespec*, %struct.timespec** %4
%9 = load %struct.timespec*, %struct.timespec** %5
%10 = call i32 @clock_nanosleep(i32 %7, i32 0, %struct.timespec* %8, %struct.timespec* %9)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %2
%14 = load i32, i32* %6
store i32 %14, i32* @errno
store i32 -1, i32* %3
br label %16
15: ; preds = %2
store i32 0, i32* %3
br label %16
16: ; preds = %15, %13
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@CLOCK_REALTIME = global i32 0
@errno = global i32 0
define i32 @nanosleep(%struct.timespec* %0, %struct.timespec* %1) {
%3 = load i32, i32* @CLOCK_REALTIME
%4 = tail call i32 @clock_nanosleep(i32 %3, i32 0, %struct.timespec* %0, %struct.timespec* %1)
%5 = icmp eq i32 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %2
store i32 %4, i32* @errno
br label %7
7: ; preds = %2, %6
%8 = phi i32 [ -1, %6 ], [ 0, %2 ]
ret i32 %8
}
/* Variables and functions */
int O_APPEND;
int O_CREAT;
int O_RDWR;
int S_IRGRP;
int S_IROTH;
int S_IRUSR;
int S_IWGRP;
int S_IWUSR;
int open(char *, int, int);
int open_rdwr(char *filename) {
  return open(filename, O_RDWR | O_CREAT | O_APPEND,
              S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP | S_IROTH);
}


x86 assembly (clang, -O0):
<open_rdwr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rax
mov    (%rax),%esi
mov    0x2ec8(%rip),%rax
or     (%rax),%esi
mov    0x2e67(%rip),%rax
or     (%rax),%esi
mov    0x2e6e(%rip),%rax
mov    (%rax),%edx
mov    0x2e85(%rip),%rax
or     (%rax),%edx
mov    0x2e6c(%rip),%rax
or     (%rax),%edx
mov    0x2e7b(%rip),%rax
or     (%rax),%edx
mov    0x2e52(%rip),%rax
or     (%rax),%edx
call   1030 <open@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_rdwr>:
mov    0x2ec9(%rip),%rax
mov    0x2eda(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
mov    0x2e77(%rip),%rax
or     (%rax),%esi
mov    0x2e7e(%rip),%rax
mov    0x2e97(%rip),%rcx
mov    (%rcx),%edx
or     (%rax),%edx
mov    0x2e7c(%rip),%rax
or     (%rax),%edx
mov    0x2e8b(%rip),%rax
or     (%rax),%edx
mov    0x2e62(%rip),%rax
or     (%rax),%edx
jmp    1030 <open@plt>

LLVM IR (-O0):
@O_RDWR = global i32 0
@O_CREAT = global i32 0
@O_APPEND = global i32 0
@S_IRUSR = global i32 0
@S_IWUSR = global i32 0
@S_IRGRP = global i32 0
@S_IWGRP = global i32 0
@S_IROTH = global i32 0
define i32 @open_rdwr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @O_RDWR
%5 = load i32, i32* @O_CREAT
%6 = or i32 %4, %5
%7 = load i32, i32* @O_APPEND
%8 = or i32 %6, %7
%9 = load i32, i32* @S_IRUSR
%10 = load i32, i32* @S_IWUSR
%11 = or i32 %9, %10
%12 = load i32, i32* @S_IRGRP
%13 = or i32 %11, %12
%14 = load i32, i32* @S_IWGRP
%15 = or i32 %13, %14
%16 = load i32, i32* @S_IROTH
%17 = or i32 %15, %16
%18 = call i32 @open(i8* %3, i32 %8, i32 %17)
ret i32 %18
}

LLVM IR (-O2):
@O_RDWR = global i32 0
@O_CREAT = global i32 0
@O_APPEND = global i32 0
@S_IRUSR = global i32 0
@S_IWUSR = global i32 0
@S_IRGRP = global i32 0
@S_IWGRP = global i32 0
@S_IROTH = global i32 0
define i32 @open_rdwr(i8* nocapture %0) {
%2 = load i32, i32* @O_RDWR
%3 = load i32, i32* @O_CREAT
%4 = or i32 %3, %2
%5 = load i32, i32* @O_APPEND
%6 = or i32 %4, %5
%7 = load i32, i32* @S_IRUSR
%8 = load i32, i32* @S_IWUSR
%9 = or i32 %8, %7
%10 = load i32, i32* @S_IRGRP
%11 = or i32 %9, %10
%12 = load i32, i32* @S_IWGRP
%13 = or i32 %11, %12
%14 = load i32, i32* @S_IROTH
%15 = or i32 %13, %14
%16 = tail call i32 @open(i8* %0, i32 %6, i32 %15)
ret i32 %16
}
unsigned long long swapBytes64(unsigned long long x) {
  return __builtin_bswap64(x);
}


x86 assembly (clang, -O0):
<swapBytes64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
bswap  %rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swapBytes64>:
mov    %rdi,%rax
bswap  %rax
ret

LLVM IR (-O0):
define i64 @swapBytes64(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @llvm.bswap.i64(i64 %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @swapBytes64(i64 %0) {
%2 = tail call i64 @llvm.bswap.i64(i64 %0)
ret i64 %2
}
void output_planner_info(void) {}


x86 assembly (clang, -O0):
<output_planner_info>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<output_planner_info>:
ret

LLVM IR (-O0):
define void @output_planner_info() {
ret void
}

LLVM IR (-O2):
define void @output_planner_info() {
ret void
}
int gs1_compliant(const int symbology) {
  int result = 0;
  switch (symbology) {
  case 16:
  case 31:
  case 81:
  case 130:
  case 131:
  case 132:
  case 133:
  case 134:
  case 135:
  case 136:
  case 137:
  case 138:
  case 139:
  case 23:
  case 92:
  case 71:
  case 141:
  case 24:
  case 58:
  case 115:
    result = 1;
    break;
  }
  return result;
}


x86 assembly (clang, -O0):
<gs1_compliant>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0xfffffff0,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x7d,%eax
ja     113e <gs1_compliant+0x3e>
mov    -0x10(%rbp),%rax
lea    0xed2(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gs1_compliant>:
xor    %eax,%eax
add    $0xfffffff0,%edi
cmp    $0x7d,%edi
ja     111f <gs1_compliant+0x1f>
lea    0xeef(%rip),%rcx
movslq (%rcx,%rdi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @gs1_compliant(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
switch i32 %4, label %6 [
i32 16, label %5
i32 31, label %5
i32 81, label %5
i32 130, label %5
i32 131, label %5
i32 132, label %5
i32 133, label %5
i32 134, label %5
i32 135, label %5
i32 136, label %5
i32 137, label %5
i32 138, label %5
i32 139, label %5
i32 23, label %5
i32 92, label %5
i32 71, label %5
i32 141, label %5
i32 24, label %5
i32 58, label %5
i32 115, label %5
]
5: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
store i32 1, i32* %3
br label %6
6: ; preds = %1, %5
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @gs1_compliant(i32 %0) {
switch i32 %0, label %3 [
i32 16, label %2
i32 31, label %2
i32 81, label %2
i32 130, label %2
i32 131, label %2
i32 132, label %2
i32 133, label %2
i32 134, label %2
i32 135, label %2
i32 136, label %2
i32 137, label %2
i32 138, label %2
i32 139, label %2
i32 23, label %2
i32 92, label %2
i32 71, label %2
i32 141, label %2
i32 24, label %2
i32 58, label %2
i32 115, label %2
]
2: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
br label %3
3: ; preds = %1, %2
%4 = phi i32 [ 0, %1 ], [ 1, %2 ]
ret i32 %4
}
__attribute__((always_)) void __DSB(void) {}


x86 assembly (clang, -O0):
<__DSB>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__DSB>:
ret

LLVM IR (-O0):
define void @__DSB() {
ret void
}

LLVM IR (-O2):
define void @__DSB() {
ret void
}
int rmdir(const char *path) {
  anvil_syslog(0, "%s unimplemented\n", __FUNCTION__);
  return -1;
}


x86 assembly (clang, -O0):
<rmdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
lea    0xedb(%rip),%rsi
lea    0xee6(%rip),%rdx
mov    $0x0,%al
call   1030 <anvil_syslog@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rmdir>:
push   %rax
lea    0xee8(%rip),%rsi
lea    0xef3(%rip),%rdx
xor    %edi,%edi
xor    %eax,%eax
call   1030 <anvil_syslog@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"%s unimplemented\0A\00"
@__FUNCTION__.rmdir = [6 x i8] c"rmdir\00"
define i32 @rmdir(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @__FUNCTION__.rmdir, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@.str = [18 x i8] c"%s unimplemented\0A\00"
@__FUNCTION__.rmdir = [6 x i8] c"rmdir\00"
define i32 @rmdir(i8* nocapture readnone %0) {
%2 = tail call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @__FUNCTION__.rmdir, i64 0, i64 0))
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ outb(int, int);
void pic_init(void) {
  outb(0x20, 0x11);
  outb(0x21, 0x20);
  outb(0x21, 0x04);
  outb(0x21, 0x01);
  outb(0xa0, 0x11);
  outb(0xa1, 0x28);
  outb(0xa1, 0x02);
  outb(0xa1, 0x01);
  outb(0x20, 0x0);
  outb(0xa0, 0x0);
}


x86 assembly (clang, -O0):
<pic_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20,%edi
mov    $0x11,%esi
call   1030 <outb@plt>
mov    $0x21,%edi
mov    $0x20,%esi
call   1030 <outb@plt>
mov    $0x21,%edi
mov    $0x4,%esi
call   1030 <outb@plt>
mov    $0x21,%edi
mov    $0x1,%esi
call   1030 <outb@plt>
mov    $0xa0,%edi
mov    $0x11,%esi
call   1030 <outb@plt>
mov    $0xa1,%edi
mov    $0x28,%esi
call   1030 <outb@plt>
mov    $0xa1,%edi
mov    $0x2,%esi
call   1030 <outb@plt>
mov    $0xa1,%edi
mov    $0x1,%esi
call   1030 <outb@plt>
mov    $0x20,%edi
xor    %esi,%esi
call   1030 <outb@plt>
mov    $0xa0,%edi
xor    %esi,%esi
call   1030 <outb@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pic_init>:
push   %rax
mov    $0x20,%edi
mov    $0x11,%esi
call   1030 <outb@plt>
mov    $0x21,%edi
mov    $0x20,%esi
call   1030 <outb@plt>
mov    $0x21,%edi
mov    $0x4,%esi
call   1030 <outb@plt>
mov    $0x21,%edi
mov    $0x1,%esi
call   1030 <outb@plt>
mov    $0xa0,%edi
mov    $0x11,%esi
call   1030 <outb@plt>
mov    $0xa1,%edi
mov    $0x28,%esi
call   1030 <outb@plt>
mov    $0xa1,%edi
mov    $0x2,%esi
call   1030 <outb@plt>
mov    $0xa1,%edi
mov    $0x1,%esi
call   1030 <outb@plt>
mov    $0x20,%edi
xor    %esi,%esi
call   1030 <outb@plt>
mov    $0xa0,%edi
xor    %esi,%esi
pop    %rax
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @pic_init() {
%1 = call i32 @outb(i32 32, i32 17)
%2 = call i32 @outb(i32 33, i32 32)
%3 = call i32 @outb(i32 33, i32 4)
%4 = call i32 @outb(i32 33, i32 1)
%5 = call i32 @outb(i32 160, i32 17)
%6 = call i32 @outb(i32 161, i32 40)
%7 = call i32 @outb(i32 161, i32 2)
%8 = call i32 @outb(i32 161, i32 1)
%9 = call i32 @outb(i32 32, i32 0)
%10 = call i32 @outb(i32 160, i32 0)
ret void
}

LLVM IR (-O2):
define void @pic_init() {
%1 = tail call i32 @outb(i32 32, i32 17)
%2 = tail call i32 @outb(i32 33, i32 32)
%3 = tail call i32 @outb(i32 33, i32 4)
%4 = tail call i32 @outb(i32 33, i32 1)
%5 = tail call i32 @outb(i32 160, i32 17)
%6 = tail call i32 @outb(i32 161, i32 40)
%7 = tail call i32 @outb(i32 161, i32 2)
%8 = tail call i32 @outb(i32 161, i32 1)
%9 = tail call i32 @outb(i32 32, i32 0)
%10 = tail call i32 @outb(i32 160, i32 0)
ret void
}
/* Variables and functions */
void *calloc(int, size_t);
int /*<<< orphan*/ fatal(char *);
void *safe_zalloc(size_t size) {
  void *mymem;
  if ((int)size < 0)
    fatal("Tried to malloc negative amount of memory!!!");
  mymem = calloc(1, size);
  if (mymem == NULL)
    fatal("Malloc Failed! Probably out of space.");
  return mymem;
}


x86 assembly (clang, -O0):
<safe_zalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmp    $0x0,%eax
jge    1145 <safe_zalloc+0x25>
lea    0xec0(%rip),%rdi
call   1040 <fatal@plt>
mov    -0x8(%rbp),%rsi
mov    $0x1,%edi
call   1030 <calloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    116e <safe_zalloc+0x4e>
lea    0xec4(%rip),%rdi
call   1040 <fatal@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_zalloc>:
push   %rbx
mov    %rdi,%rbx
test   $0x80000000,%ebx
je     1138 <safe_zalloc+0x18>
lea    0xecd(%rip),%rdi
call   1040 <fatal@plt>
mov    $0x1,%edi
mov    %rbx,%rsi
call   1030 <calloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1159 <safe_zalloc+0x39>
lea    0xed9(%rip),%rdi
call   1040 <fatal@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [45 x i8] c"Tried to malloc negative amount of memory!!!\00"
@.str.1 = [38 x i8] c"Malloc Failed! Probably out of space.\00"
define i8* @safe_zalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = trunc i64 %4 to i32
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @fatal(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %1
%10 = load i64, i64* %2
%11 = call i8* @calloc(i32 1, i64 %10)
store i8* %11, i8** %3
%12 = load i8*, i8** %3
%13 = icmp eq i8* %12, null
br i1 %13, label %14, label %16
14: ; preds = %9
%15 = call i32 @fatal(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0))
br label %16
16: ; preds = %14, %9
%17 = load i8*, i8** %3
ret i8* %17
}

LLVM IR (-O2):
@.str = [45 x i8] c"Tried to malloc negative amount of memory!!!\00"
@.str.1 = [38 x i8] c"Malloc Failed! Probably out of space.\00"
define i8* @safe_zalloc(i64 %0) {
%2 = and i64 %0, 2147483648
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @fatal(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
%7 = tail call i8* @calloc(i32 1, i64 %0)
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = tail call i32 @fatal(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0))
br label %11
11: ; preds = %9, %6
ret i8* %7
}
/* Variables and functions */
int /*<<< orphan*/ FE_INVALID;
int /*<<< orphan*/ feenableexcept(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ testnan(char *);
int main(int argc, char *argv[]) {
  printf("1..1\n");
  feenableexcept(FE_INVALID);
  testnan("0x1234");
  testnan("");
  printf("ok 1 - nan\n");
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeb3(%rip),%rdi
call   1040 <printf@plt>
mov    0x2e97(%rip),%rax
mov    (%rax),%edi
call   1050 <feenableexcept@plt>
lea    0xe9f(%rip),%rdi
call   1030 <testnan@plt>
lea    0xe92(%rip),%rdi
call   1030 <testnan@plt>
lea    0xe8e(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xecf(%rip),%rdi
call   1030 <puts@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
call   1050 <feenableexcept@plt>
lea    0xeae(%rip),%rdi
call   1040 <testnan@plt>
lea    0xead(%rip),%rdi
call   1040 <testnan@plt>
lea    0xea2(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"1..1\0A\00"
@FE_INVALID = global i32 0
@.str.1 = [7 x i8] c"0x1234\00"
@.str.2 = [1 x i8] zeroinitializer
@.str.3 = [12 x i8] c"ok 1 - nan\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%7 = load i32, i32* @FE_INVALID
%8 = call i32 @feenableexcept(i32 %7)
%9 = call i32 @testnan(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%10 = call i32 @testnan(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0))
%11 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.3, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@FE_INVALID = global i32 0
@.str.1 = [7 x i8] c"0x1234\00"
@.str.2 = [1 x i8] zeroinitializer
@str = [5 x i8] c"1..1\00"
@str.4 = [11 x i8] c"ok 1 - nan\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0))
%4 = load i32, i32* @FE_INVALID
%5 = tail call i32 @feenableexcept(i32 %4)
%6 = tail call i32 @testnan(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%7 = tail call i32 @testnan(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0))
%8 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str.4, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fprint_uhex(int, unsigned int);
int /*<<< orphan*/ fputc(char, unsigned int);
void fprint_hex(int hex, unsigned handle) {
  if (hex >= 0) {
    fprint_uhex(hex, handle);
  } else {
    fputc('-', handle);
    fprint_uhex(-hex, handle);
  }
}


x86 assembly (clang, -O0):
<fprint_hex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     1148 <fprint_hex+0x28>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <fprint_uhex@plt>
jmp    1162 <fprint_hex+0x42>
mov    -0x8(%rbp),%esi
mov    $0x2d,%edi
call   1040 <fputc@plt>
xor    %edi,%edi
sub    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <fprint_uhex@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fprint_hex>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
test   %edi,%edi
jns    1139 <fprint_hex+0x19>
mov    $0x2d,%edi
mov    %ebx,%esi
call   1040 <fputc@plt>
neg    %ebp
mov    %ebp,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <fprint_uhex@plt>

LLVM IR (-O0):
define void @fprint_hex(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp sge i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @fprint_uhex(i32 %8, i32 %9)
br label %18
11: ; preds = %2
%12 = load i32, i32* %4
%13 = call i32 @fputc(i8 signext 45, i32 %12)
%14 = load i32, i32* %3
%15 = sub nsw i32 0, %14
%16 = load i32, i32* %4
%17 = call i32 @fprint_uhex(i32 %15, i32 %16)
br label %18
18: ; preds = %11, %7
ret void
}

LLVM IR (-O2):
define void @fprint_hex(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, -1
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = tail call i32 @fputc(i8 signext 45, i32 %1)
%6 = sub nsw i32 0, %0
br label %7
7: ; preds = %2, %4
%8 = phi i32 [ %6, %4 ], [ %0, %2 ]
%9 = tail call i32 @fprint_uhex(i32 %8, i32 %1)
ret void
}
/* Variables and functions */
int fetchIndexableByte(int, int);
int primitiveObject_ByteAt_(int receiver, int *arguments) {
  int index = ((arguments[0] & 0x80000000) ? (((-1 << 31) | arguments[0]) >> 1)
                                           : (arguments[0] >> 1)) -
              1;
  return ((fetchIndexableByte(receiver, index) << 1) | 1);
}


x86 assembly (clang, -O0):
<primitiveObject_ByteAt_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
and    $0x80000000,%eax
cmp    $0x0,%eax
je     1149 <primitiveObject_ByteAt_+0x39>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
or     $0x80000000,%eax
sar    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1155 <primitiveObject_ByteAt_+0x45>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
sar    $0x1,%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x14(%rbp),%esi
call   1030 <fetchIndexableByte@plt>
shl    $0x1,%eax
or     $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<primitiveObject_ByteAt_>:
push   %rax
mov    (%rsi),%esi
sar    %esi
add    $0xffffffff,%esi
call   1030 <fetchIndexableByte@plt>
add    %eax,%eax
add    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @primitiveObject_ByteAt_(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
%6 = load i32*, i32** %4
%7 = getelementptr inbounds i32, i32* %6, i64 0
%8 = load i32, i32* %7
%9 = and i32 %8, -2147483648
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %2
%12 = load i32*, i32** %4
%13 = getelementptr inbounds i32, i32* %12, i64 0
%14 = load i32, i32* %13
%15 = or i32 -2147483648, %14
%16 = ashr i32 %15, 1
br label %22
17: ; preds = %2
%18 = load i32*, i32** %4
%19 = getelementptr inbounds i32, i32* %18, i64 0
%20 = load i32, i32* %19
%21 = ashr i32 %20, 1
br label %22
22: ; preds = %17, %11
%23 = phi i32 [ %16, %11 ], [ %21, %17 ]
%24 = sub nsw i32 %23, 1
store i32 %24, i32* %5
%25 = load i32, i32* %3
%26 = load i32, i32* %5
%27 = call i32 @fetchIndexableByte(i32 %25, i32 %26)
%28 = shl i32 %27, 1
%29 = or i32 %28, 1
ret i32 %29
}

LLVM IR (-O2):
define i32 @primitiveObject_ByteAt_(i32 %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = ashr i32 %3, 1
%5 = add nsw i32 %4, -1
%6 = tail call i32 @fetchIndexableByte(i32 %0, i32 %5)
%7 = shl i32 %6, 1
%8 = or i32 %7, 1
ret i32 %8
}