xunge/DecIR huggingface dataset:
void bar() {
  int i;
  int array[5];
  for (i = 0; i < 5; ++i) {
    array[i] = i;
  }
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0x5,-0x4(%rbp)
jge    112e <bar+0x2e>
mov    -0x4(%rbp),%ecx
movslq -0x4(%rbp),%rax
mov    %ecx,-0x20(%rbp,%rax,4)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <bar+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
ret

LLVM IR (-O0):
define void @bar() {
%1 = alloca i32
%2 = alloca [5 x i32]
store i32 0, i32* %1
br label %3
3: ; preds = %11, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 5
br i1 %5, label %6, label %14
6: ; preds = %3
%7 = load i32, i32* %1
%8 = load i32, i32* %1
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 %9
store i32 %7, i32* %10
br label %11
11: ; preds = %6
%12 = load i32, i32* %1
%13 = add nsw i32 %12, 1
store i32 %13, i32* %1
br label %3
14: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @bar() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gmjpost2l_(float *, float *, float *, int *, int *, int *,
                              int *);
void cgmjpost2l(float part[], float amu[], float qm, int nop, int idimp,
                int nxv, int nyv) {
  gmjpost2l_(part, amu, &qm, &nop, &idimp, &nxv, &nyv);
  return;
}


x86 assembly (clang, -O0):
<cgmjpost2l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    %r9d,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x14(%rbp),%rdx
lea    -0x18(%rbp),%rcx
lea    -0x1c(%rbp),%r8
lea    -0x20(%rbp),%r9
lea    -0x24(%rbp),%rax
mov    %rax,(%rsp)
call   1030 <gmjpost2l_@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgmjpost2l>:
sub    $0x28,%rsp
movss  %xmm0,0x24(%rsp)
mov    %edx,0x20(%rsp)
mov    %ecx,0x1c(%rsp)
mov    %r8d,0x18(%rsp)
mov    %r9d,0x14(%rsp)
lea    0x14(%rsp),%rax
mov    %rax,(%rsp)
lea    0x24(%rsp),%rdx
lea    0x20(%rsp),%rcx
lea    0x1c(%rsp),%r8
lea    0x18(%rsp),%r9
call   1030 <gmjpost2l_@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
define void @cgmjpost2l(float* %0, float* %1, float %2, i32 %3, i32 %4, i32 %5, i32 %6) {
%8 = alloca float*
%9 = alloca float*
%10 = alloca float
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
store float* %0, float** %8
store float* %1, float** %9
store float %2, float* %10
store i32 %3, i32* %11
store i32 %4, i32* %12
store i32 %5, i32* %13
store i32 %6, i32* %14
%15 = load float*, float** %8
%16 = load float*, float** %9
%17 = call i32 @gmjpost2l_(float* %15, float* %16, float* %10, i32* %11, i32* %12, i32* %13, i32* %14)
ret void
}

LLVM IR (-O2):
define void @cgmjpost2l(float* %0, float* %1, float %2, i32 %3, i32 %4, i32 %5, i32 %6) {
%8 = alloca float
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store float %2, float* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
store i32 %5, i32* %11
store i32 %6, i32* %12
%13 = call i32 @gmjpost2l_(float* %0, float* %1, float* %8, i32* %9, i32* %10, i32* %11, i32* %12)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ is_evenly_divisible_by(int, int);
bool all_divisible(int p, int n) {
  int i;
  for (i = 2; i <= p; i++) {
    if (!is_evenly_divisible_by(n, i)) {
      return false;
    }
  }
  return true;
}


x86 assembly (clang, -O0):
<all_divisible>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x2,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1164 <all_divisible+0x54>
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1030 <is_evenly_divisible_by@plt>
cmp    $0x0,%eax
jne    1151 <all_divisible+0x41>
movl   $0x0,-0x4(%rbp)
jmp    116b <all_divisible+0x5b>
jmp    1156 <all_divisible+0x46>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1125 <all_divisible+0x15>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<all_divisible>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    $0x1,%r14d
cmp    $0x2,%edi
jl     1155 <all_divisible+0x45>
mov    %esi,%r15d
mov    %edi,%ebx
neg    %ebx
mov    $0x2,%ebp
xchg   %ax,%ax
mov    %r15d,%edi
mov    %ebp,%esi
call   1030 <is_evenly_divisible_by@plt>
test   %eax,%eax
je     1152 <all_divisible+0x42>
lea    (%rbx,%rbp,1),%eax
add    $0x1,%eax
mov    %ebp,%ecx
add    $0x1,%ecx
mov    %ecx,%ebp
cmp    $0x1,%eax
jne    1130 <all_divisible+0x20>
jmp    1155 <all_divisible+0x45>
xor    %r14d,%r14d
mov    %r14d,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @all_divisible(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 2, i32* %6
br label %7
7: ; preds = %18, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp sle i32 %8, %9
br i1 %10, label %11, label %21
11: ; preds = %7
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = call i32 @is_evenly_divisible_by(i32 %12, i32 %13)
%15 = icmp ne i32 %14, 0
br i1 %15, label %17, label %16
16: ; preds = %11
store i32 0, i32* %3
br label %22
17: ; preds = %11
br label %18
18: ; preds = %17
%19 = load i32, i32* %6
%20 = add nsw i32 %19, 1
store i32 %20, i32* %6
br label %7
21: ; preds = %7
store i32 1, i32* %3
br label %22
22: ; preds = %21, %16
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @all_divisible(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %11, label %7
4: ; preds = %7
%5 = add nuw i32 %8, 1
%6 = icmp eq i32 %8, %0
br i1 %6, label %11, label %7
7: ; preds = %2, %4
%8 = phi i32 [ %5, %4 ], [ 2, %2 ]
%9 = tail call i32 @is_evenly_divisible_by(i32 %1, i32 %8)
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %7, %4, %2
%12 = phi i32 [ 1, %2 ], [ 1, %4 ], [ 0, %7 ]
ret i32 %12
}
void xytest(int *x, int *y, int pixel) {
  const int max = 100;
  (*x) = pixel;
  if ((*x) >= max) {
    (*y) = (*x) / max;
    (*x) = (*x) - (max * (*y));
  }
}


x86 assembly (clang, -O0):
<xytest>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x64,-0x18(%rbp)
mov    -0x14(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
cmpl   $0x64,(%rax)
jl     1157 <xytest+0x57>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
imul   $0x64,(%rax),%eax
sub    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<xytest>:
mov    %edx,(%rdi)
cmp    $0x64,%edx
jl     111b <xytest+0x1b>
mov    %edx,%eax
imul   $0x51eb851f,%rax,%rax
shr    $0x25,%rax
mov    %eax,(%rsi)
imul   $0xffffff9c,%eax,%eax
add    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @xytest(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
store i32 100, i32* %7
%8 = load i32, i32* %6
%9 = load i32*, i32** %4
store i32 %8, i32* %9
%10 = load i32*, i32** %4
%11 = load i32, i32* %10
%12 = icmp sge i32 %11, 100
br i1 %12, label %13, label %25
13: ; preds = %3
%14 = load i32*, i32** %4
%15 = load i32, i32* %14
%16 = sdiv i32 %15, 100
%17 = load i32*, i32** %5
store i32 %16, i32* %17
%18 = load i32*, i32** %4
%19 = load i32, i32* %18
%20 = load i32*, i32** %5
%21 = load i32, i32* %20
%22 = mul nsw i32 100, %21
%23 = sub nsw i32 %19, %22
%24 = load i32*, i32** %4
store i32 %23, i32* %24
br label %25
25: ; preds = %13, %3
ret void
}

LLVM IR (-O2):
define void @xytest(i32* nocapture %0, i32* nocapture writeonly %1, i32 %2) {
store i32 %2, i32* %0
%4 = icmp sgt i32 %2, 99
br i1 %4, label %5, label %10
5: ; preds = %3
%6 = udiv i32 %2, 100
store i32 %6, i32* %1
%7 = load i32, i32* %0
%8 = mul nsw i32 %6, -100
%9 = add i32 %7, %8
store i32 %9, i32* %0
br label %10
10: ; preds = %5, %3
ret void
}
/* Type definitions */
struct teredo_packet {
  int dummy;
};

/* Variables and functions */
int teredo_recv_inner(int, struct teredo_packet *, int /*<<< orphan*/);
int teredo_wait_recv(int fd, struct teredo_packet *p) {
  return teredo_recv_inner(fd, p, 0);
}


x86 assembly (clang, -O0):
<teredo_wait_recv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <teredo_recv_inner@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<teredo_wait_recv>:
xor    %edx,%edx
jmp    1030 <teredo_recv_inner@plt>

LLVM IR (-O0):
%struct.teredo_packet = type { i32 }
define i32 @teredo_wait_recv(i32 %0, %struct.teredo_packet* %1) {
%3 = alloca i32
%4 = alloca %struct.teredo_packet*
store i32 %0, i32* %3
store %struct.teredo_packet* %1, %struct.teredo_packet** %4
%5 = load i32, i32* %3
%6 = load %struct.teredo_packet*, %struct.teredo_packet** %4
%7 = call i32 @teredo_recv_inner(i32 %5, %struct.teredo_packet* %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
%struct.teredo_packet = type { i32 }
define i32 @teredo_wait_recv(i32 %0, %struct.teredo_packet* %1) {
%3 = tail call i32 @teredo_recv_inner(i32 %0, %struct.teredo_packet* %1, i32 0)
ret i32 %3
}
/* Variables and functions */
int partition(long long *, int const, int const);
void quickSort(long long *v, const int left, const int right) {
  if (left < right) {
    int i = partition(v, left, right);
    quickSort(v, left, i - 1);
    quickSort(v, i + 1, right);
  }
}


x86 assembly (clang, -O0):
<quickSort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <quickSort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quickSort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quickSort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quickSort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quickSort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quickSort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quickSort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quickSort(i64* %0, i32 %1, i32 %2) {
%4 = alloca i64*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i64* %0, i64** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i64*, i64** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partition(i64* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i64*, i64** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i64*, i64** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @quickSort(i64* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i64* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quickSort(i64* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
int f1(int x, int y) { return (x < 0) == (y < 0); }


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%eax
cmpl   $0x0,-0x8(%rbp)
setl   %cl
and    $0x1,%cl
movzbl %cl,%ecx
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
mov    %edi,%eax
xor    %esi,%eax
not    %eax
shr    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @f1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 0
%7 = zext i1 %6 to i32
%8 = load i32, i32* %4
%9 = icmp slt i32 %8, 0
%10 = zext i1 %9 to i32
%11 = icmp eq i32 %7, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @f1(i32 %0, i32 %1) {
%3 = xor i32 %0, %1
%4 = xor i32 %3, -1
%5 = lshr i32 %4, 31
ret i32 %5
}
void *clrmem6(void *s) { return __builtin_memset(s, 0, 768); }


x86 assembly (clang, -O0):
<clrmem6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    %rdi,-0x10(%rbp)
xor    %esi,%esi
mov    $0x300,%edx
call   1030 <memset@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clrmem6>:
mov    $0x300,%edx
xor    %esi,%esi
jmp    1030 <memset@plt>

LLVM IR (-O0):
define i8* @clrmem6(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @clrmem6(i8* returned writeonly %0) {
tail call void @llvm.memset.p0i8.i64(i8* align 1 dereferenceable(768) %0, i8 0, i64 768, i1 false)
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ PerfCounterHandle();
int /*<<< orphan*/ UAVObjRequestUpdate(int /*<<< orphan*/);
void PerfCounterRequestUpdate() { UAVObjRequestUpdate(PerfCounterHandle()); }


x86 assembly (clang, -O0):
<PerfCounterRequestUpdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <PerfCounterHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjRequestUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PerfCounterRequestUpdate>:
push   %rax
xor    %eax,%eax
call   1030 <PerfCounterHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjRequestUpdate@plt>

LLVM IR (-O0):
define void @PerfCounterRequestUpdate() {
%1 = call i32 (...) @PerfCounterHandle()
%2 = call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}

LLVM IR (-O2):
define void @PerfCounterRequestUpdate() {
%1 = tail call i32 (...) @PerfCounterHandle()
%2 = tail call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t float_as_uint(float f) {
  static union {
    uint32_t i;
    float f;
  } _box;
  _box.f = f;
  return _box.i;
}


x86 assembly (clang, -O0):
<float_as_uint>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,0x2f0e(%rip)
mov    0x2f08(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<float_as_uint>:
movd   %xmm0,%eax
ret

LLVM IR (-O0):
%union.anon = type { i32 }
@float_as_uint._box = internal global %union.anon zeroinitializer
define i32 @float_as_uint(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
store float %3, float* bitcast (%union.anon* @float_as_uint._box to float*)
%4 = load i32, i32* getelementptr inbounds (%union.anon, %union.anon* @float_as_uint._box, i32 0, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @float_as_uint(float %0) {
%2 = bitcast float %0 to i32
ret i32 %2
}
void ADC_DelSig_ISR4(void) {}


x86 assembly (clang, -O0):
<ADC_DelSig_ISR4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADC_DelSig_ISR4>:
ret

LLVM IR (-O0):
define void @ADC_DelSig_ISR4() {
ret void
}

LLVM IR (-O2):
define void @ADC_DelSig_ISR4() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int EOF;
int fprintf(int /*<<< orphan*/ *, char *, int);
int fputc(int c, FILE *stream) {
  if (fprintf(stream, "%c", c) >= 1)
    return (int)c;
  else
    return EOF;
}


x86 assembly (clang, -O0):
<fputc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%edx
lea    0xed3(%rip),%rsi
call   1030 <fprintf@plt>
cmp    $0x1,%eax
jl     1146 <fputc+0x36>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1152 <fputc+0x42>
mov    0x2e9b(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fputc>:
push   %rbx
mov    %rsi,%rax
mov    %edi,%ebx
lea    0xee3(%rip),%rsi
mov    %rax,%rdi
mov    %ebx,%edx
call   1030 <fprintf@plt>
test   %eax,%eax
jg     1134 <fputc+0x24>
mov    0x2eb6(%rip),%rax
mov    (%rax),%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
@EOF = global i32 0
define i32 @fputc(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
%6 = load i32*, i32** %5
%7 = load i32, i32* %4
%8 = call i32 @fprintf(i32* %6, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = icmp sge i32 %8, 1
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = load i32, i32* %4
store i32 %11, i32* %3
br label %14
12: ; preds = %2
%13 = load i32, i32* @EOF
store i32 %13, i32* %3
br label %14
14: ; preds = %12, %10
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
@EOF = global i32 0
define i32 @fputc(i32 %0, i32* nocapture %1) {
%3 = tail call i32 @fprintf(i32* %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %0)
%4 = icmp sgt i32 %3, 0
%5 = load i32, i32* @EOF
%6 = select i1 %4, i32 %0, i32 %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ STDIN_FILENO;
int read(int /*<<< orphan*/, char *, int);
void CON_FlushIn(void) {
  char key;
  while (read(STDIN_FILENO, &key, 1) != -1)
    ;
}


x86 assembly (clang, -O0):
<CON_FlushIn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec1(%rip),%rax
mov    (%rax),%edi
lea    -0x1(%rbp),%rsi
mov    $0x1,%edx
call   1030 <read@plt>
cmp    $0xffffffff,%eax
je     113d <CON_FlushIn+0x2d>
jmp    1118 <CON_FlushIn+0x8>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CON_FlushIn>:
push   %r14
push   %rbx
push   %rax
mov    0x2ec5(%rip),%r14
lea    0x7(%rsp),%rbx
mov    (%r14),%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1030 <read@plt>
cmp    $0xffffffff,%eax
jne    1120 <CON_FlushIn+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@STDIN_FILENO = global i32 0
define void @CON_FlushIn() {
%1 = alloca i8
br label %2
2: ; preds = %6, %0
%3 = load i32, i32* @STDIN_FILENO
%4 = call i32 @read(i32 %3, i8* %1, i32 1)
%5 = icmp ne i32 %4, -1
br i1 %5, label %6, label %7
6: ; preds = %2
br label %2
7: ; preds = %2
ret void
}

LLVM IR (-O2):
@STDIN_FILENO = global i32 0
define void @CON_FlushIn() {
%1 = alloca i8
br label %2
2: ; preds = %2, %0
%3 = load i32, i32* @STDIN_FILENO
%4 = call i32 @read(i32 %3, i8* %1, i32 1)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %2
6: ; preds = %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int32_t dbg_segbase(int32_t segment) { return segment; }


x86 assembly (clang, -O0):
<dbg_segbase>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbg_segbase>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @dbg_segbase(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @dbg_segbase(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
size_t inputRead(unsigned char *, int);
int inputGetc(void) {
  unsigned char c;
  size_t length;
  unsigned long result = 0;
  length = inputRead(&c, 1);
  result = c;
  if (length == 1)
    return (result);
  else
    return (-1);
}


x86 assembly (clang, -O0):
<inputGetc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movq   $0x0,-0x18(%rbp)
lea    -0x5(%rbp),%rdi
mov    $0x1,%esi
call   1030 <inputRead@plt>
mov    %rax,-0x10(%rbp)
movzbl -0x5(%rbp),%eax
mov    %rax,-0x18(%rbp)
cmpq   $0x1,-0x10(%rbp)
jne    1151 <inputGetc+0x41>
mov    -0x18(%rbp),%rax
mov    %eax,-0x4(%rbp)
jmp    1158 <inputGetc+0x48>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inputGetc>:
push   %rax
lea    0x7(%rsp),%rdi
mov    $0x1,%esi
call   1030 <inputRead@plt>
cmp    $0x1,%rax
movzbl 0x7(%rsp),%ecx
mov    $0xffffffff,%eax
cmove  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @inputGetc() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i64
%4 = alloca i64
store i64 0, i64* %4
%5 = call i64 @inputRead(i8* %2, i32 1)
store i64 %5, i64* %3
%6 = load i8, i8* %2
%7 = zext i8 %6 to i64
store i64 %7, i64* %4
%8 = load i64, i64* %3
%9 = icmp eq i64 %8, 1
br i1 %9, label %10, label %13
10: ; preds = %0
%11 = load i64, i64* %4
%12 = trunc i64 %11 to i32
store i32 %12, i32* %1
br label %14
13: ; preds = %0
store i32 -1, i32* %1
br label %14
14: ; preds = %13, %10
%15 = load i32, i32* %1
ret i32 %15
}

LLVM IR (-O2):
define i32 @inputGetc() {
%1 = alloca i8
%2 = call i64 @inputRead(i8* %1, i32 1)
%3 = icmp eq i64 %2, 1
%4 = load i8, i8* %1
%5 = zext i8 %4 to i32
%6 = select i1 %3, i32 %5, i32 -1
ret i32 %6
}
/* Variables and functions */
size_t strlen(char const *);
size_t st_strsize(const void *s) { return strlen((const char *)s) + 1; }


x86 assembly (clang, -O0):
<st_strsize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<st_strsize>:
push   %rax
call   1030 <strlen@plt>
add    $0x1,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @st_strsize(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @strlen(i8* %3)
%5 = add i64 %4, 1
ret i64 %5
}

LLVM IR (-O2):
define i64 @st_strsize(i8* nocapture %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add i64 %2, 1
ret i64 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char const *);
void show_usage(FILE *stream, const char *arg0) {
  fprintf(stream, "Usage: %s <file>\n", arg0);
}


x86 assembly (clang, -O0):
<show_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_usage>:
mov    %rsi,%rdx
lea    0xee6(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"Usage: %s <file>\0A\00"
define void @show_usage(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"Usage: %s <file>\0A\00"
define void @show_usage(i32* nocapture %0, i8* %1) {
%3 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ die(char const *, int);
void close_and_die(int fd, const char *msg, int exit_code) {
  close(fd);
  die(msg, exit_code);
}


x86 assembly (clang, -O0):
<close_and_die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <die@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_and_die>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebp
mov    %rsi,%rbx
call   1030 <close@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <die@plt>

LLVM IR (-O0):
define void @close_and_die(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = call i32 @close(i32 %7)
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 @die(i8* %9, i32 %10)
ret void
}

LLVM IR (-O2):
define void @close_and_die(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @close(i32 %0)
%5 = tail call i32 @die(i8* %1, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int solve(int);
int main() {
  int num;
  scanf("%d", &num);
  int ans = solve(num);
  if (ans == 1) {
    printf("It is a mystery number");
  } else {
    printf("It is not a mystery number");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1030 <solve@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jne    1175 <main+0x45>
lea    0xe98(%rip),%rdi
call   1040 <printf@plt>
jmp    1181 <main+0x51>
lea    0xe9e(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
call   1030 <solve@plt>
cmp    $0x1,%eax
lea    0xeae(%rip),%rax
lea    0xebe(%rip),%rdi
cmove  %rax,%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [23 x i8] c"It is a mystery number\00"
@.str.2 = [27 x i8] c"It is not a mystery number\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = call i32 @solve(i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %11
9: ; preds = %0
%10 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0))
br label %13
11: ; preds = %0
%12 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.2, i64 0, i64 0))
br label %13
13: ; preds = %11, %9
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [23 x i8] c"It is a mystery number\00"
@.str.2 = [27 x i8] c"It is not a mystery number\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @solve(i32 %4)
%6 = icmp eq i32 %5, 1
%7 = select i1 %6, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.2, i64 0, i64 0)
%8 = call i32 @printf(i8* dereferenceable(1) %7)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ vulnerable();
int main(void) {
  vulnerable();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <vulnerable@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <vulnerable@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @vulnerable()
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @vulnerable()
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ appendCODE(int /*<<< orphan*/);
int /*<<< orphan*/ makeCODEswap(int /*<<< orphan*/ *);
void code_swap() { appendCODE(makeCODEswap(NULL)); }


x86 assembly (clang, -O0):
<code_swap>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <makeCODEswap@plt>
mov    %eax,%edi
call   1030 <appendCODE@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<code_swap>:
push   %rax
xor    %edi,%edi
call   1040 <makeCODEswap@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <appendCODE@plt>

LLVM IR (-O0):
define void @code_swap() {
%1 = call i32 @makeCODEswap(i32* null)
%2 = call i32 @appendCODE(i32 %1)
ret void
}

LLVM IR (-O2):
define void @code_swap() {
%1 = tail call i32 @makeCODEswap(i32* null)
%2 = tail call i32 @appendCODE(i32 %1)
ret void
}
int test_imm_35uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x35 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_35uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x35,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_35uint64_midword_reg>:
test   $0x350000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_35uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 53
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_35uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 3473408
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void simple_gpiochip_init(const char *compatible) {}


x86 assembly (clang, -O0):
<simple_gpiochip_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<simple_gpiochip_init>:
ret

LLVM IR (-O0):
define void @simple_gpiochip_init(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @simple_gpiochip_init(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bit_dump(int);
int main(int argc, char **argv) {
  int i = 0;
  for (i = 0; i < 512; i++)
    bit_dump(i);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x200,-0x14(%rbp)
jge    1157 <main+0x47>
mov    -0x14(%rbp),%edi
call   1030 <bit_dump@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1134 <main+0x24>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %ebx,%edi
call   1030 <bit_dump@plt>
add    $0x1,%ebx
cmp    $0x200,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
store i32 0, i32* %6
br label %7
7: ; preds = %13, %2
%8 = load i32, i32* %6
%9 = icmp slt i32 %8, 512
br i1 %9, label %10, label %16
10: ; preds = %7
%11 = load i32, i32* %6
%12 = call i32 @bit_dump(i32 %11)
br label %13
13: ; preds = %10
%14 = load i32, i32* %6
%15 = add nsw i32 %14, 1
store i32 %15, i32* %6
br label %7
16: ; preds = %7
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
br label %3
3: ; preds = %2, %3
%4 = phi i32 [ 0, %2 ], [ %6, %3 ]
%5 = tail call i32 @bit_dump(i32 %4)
%6 = add nuw nsw i32 %4, 1
%7 = icmp eq i32 %6, 512
br i1 %7, label %8, label %3
8: ; preds = %3
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ imprimeVetor();
int /*<<< orphan*/ preencheVetorAleatorio();
int /*<<< orphan*/ printf(char *);
int main() {
  printf("\n\nCriando vetor de pontos aleatorios....");
  preencheVetorAleatorio();
  printf("Vetor criado! \n\n\n");
  imprimeVetor();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <preencheVetorAleatorio@plt>
lea    0xed0(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <imprimeVetor@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeb8(%rip),%rdi
call   1050 <printf@plt>
xor    %eax,%eax
call   1040 <preencheVetorAleatorio@plt>
lea    0xece(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1060 <imprimeVetor@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [41 x i8] c"\0A\0ACriando vetor de pontos aleatorios....\00"
@.str.1 = [18 x i8] c"Vetor criado! \0A\0A\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @preencheVetorAleatorio()
%4 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
%5 = call i32 (...) @imprimeVetor()
ret i32 0
}

LLVM IR (-O2):
@.str = [41 x i8] c"\0A\0ACriando vetor de pontos aleatorios....\00"
@str = [17 x i8] c"Vetor criado! \0A\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @preencheVetorAleatorio()
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 (...) @imprimeVetor()
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ little_endian_read_16(int /*<<< orphan*/ const *, int);
uint16_t l2cap_event_incoming_connection_get_psm(const uint8_t *event) {
  return little_endian_read_16(event, 10);
}


x86 assembly (clang, -O0):
<l2cap_event_incoming_connection_get_psm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xa,%esi
call   1030 <little_endian_read_16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<l2cap_event_incoming_connection_get_psm>:
mov    $0xa,%esi
jmp    1030 <little_endian_read_16@plt>

LLVM IR (-O0):
define i32 @l2cap_event_incoming_connection_get_psm(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @little_endian_read_16(i32* %3, i32 10)
ret i32 %4
}

LLVM IR (-O2):
define i32 @l2cap_event_incoming_connection_get_psm(i32* %0) {
%2 = tail call i32 @little_endian_read_16(i32* %0, i32 10)
ret i32 %2
}
/* Variables and functions */
int S_IRGRP;
int S_IROTH;
int S_IRUSR;
int S_IWGRP;
int S_IWOTH;
int S_IWUSR;
int fileCreateMode(char *, int);
int fileCreateRW(char *name) {
  int mode = S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP | S_IROTH | S_IWOTH;
  return (fileCreateMode(name, mode));
}


x86 assembly (clang, -O0):
<fileCreateRW>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e9d(%rip),%rax
mov    (%rax),%eax
mov    0x2eb4(%rip),%rcx
or     (%rcx),%eax
mov    0x2e9b(%rip),%rcx
or     (%rcx),%eax
mov    0x2eaa(%rip),%rcx
or     (%rcx),%eax
mov    0x2e81(%rip),%rcx
or     (%rcx),%eax
mov    0x2e60(%rip),%rcx
or     (%rcx),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <fileCreateMode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fileCreateRW>:
mov    0x2ea9(%rip),%rax
mov    0x2ec2(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
mov    0x2ea7(%rip),%rax
or     (%rax),%esi
mov    0x2eb6(%rip),%rax
or     (%rax),%esi
mov    0x2e8d(%rip),%rax
or     (%rax),%esi
mov    0x2e6c(%rip),%rax
or     (%rax),%esi
jmp    1030 <fileCreateMode@plt>

LLVM IR (-O0):
@S_IRUSR = global i32 0
@S_IWUSR = global i32 0
@S_IRGRP = global i32 0
@S_IWGRP = global i32 0
@S_IROTH = global i32 0
@S_IWOTH = global i32 0
define i32 @fileCreateRW(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i32, i32* @S_IRUSR
%5 = load i32, i32* @S_IWUSR
%6 = or i32 %4, %5
%7 = load i32, i32* @S_IRGRP
%8 = or i32 %6, %7
%9 = load i32, i32* @S_IWGRP
%10 = or i32 %8, %9
%11 = load i32, i32* @S_IROTH
%12 = or i32 %10, %11
%13 = load i32, i32* @S_IWOTH
%14 = or i32 %12, %13
store i32 %14, i32* %3
%15 = load i8*, i8** %2
%16 = load i32, i32* %3
%17 = call i32 @fileCreateMode(i8* %15, i32 %16)
ret i32 %17
}

LLVM IR (-O2):
@S_IRUSR = global i32 0
@S_IWUSR = global i32 0
@S_IRGRP = global i32 0
@S_IWGRP = global i32 0
@S_IROTH = global i32 0
@S_IWOTH = global i32 0
define i32 @fileCreateRW(i8* %0) {
%2 = load i32, i32* @S_IRUSR
%3 = load i32, i32* @S_IWUSR
%4 = or i32 %3, %2
%5 = load i32, i32* @S_IRGRP
%6 = or i32 %4, %5
%7 = load i32, i32* @S_IWGRP
%8 = or i32 %6, %7
%9 = load i32, i32* @S_IROTH
%10 = or i32 %8, %9
%11 = load i32, i32* @S_IWOTH
%12 = or i32 %10, %11
%13 = tail call i32 @fileCreateMode(i8* %0, i32 %12)
ret i32 %13
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
uint8_t mask_u8(uint32_t x, uint32_t y) {
  uint32_t diff = x ^ y;
  uint8_t diff_is_zero = ~diff & (diff - 1);
  return -(diff_is_zero >> 7);
}


x86 assembly (clang, -O0):
<mask_u8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%ecx
sar    $0x7,%ecx
xor    %eax,%eax
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mask_u8>:
xor    %esi,%edi
lea    -0x1(%rdi),%eax
mov    %edi,%ecx
not    %ecx
and    %ecx,%eax
sar    $0x7,%eax
neg    %eax
ret

LLVM IR (-O0):
define i32 @mask_u8(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = xor i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = xor i32 %10, -1
%12 = load i32, i32* %5
%13 = sub nsw i32 %12, 1
%14 = and i32 %11, %13
store i32 %14, i32* %6
%15 = load i32, i32* %6
%16 = ashr i32 %15, 7
%17 = sub nsw i32 0, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @mask_u8(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
%4 = xor i32 %3, -1
%5 = add nsw i32 %3, -1
%6 = and i32 %5, %4
%7 = ashr i32 %6, 7
%8 = sub nsw i32 0, %7
ret i32 %8
}
/* Type definitions */
typedef char *uint64_t;

/* Variables and functions */
uint64_t ROL64_55(uint64_t x) {
  __asm__("rolq $55, %0" : "=r"(x) : "0"(x));
  return x;
}


x86 assembly (clang, -O0):
<ROL64_55>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
rol    $0x37,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ROL64_55>:
mov    %rdi,%rax
rol    $0x37,%rax
ret

LLVM IR (-O0):
define i8* @ROL64_55(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* asm "rolq $$55, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define i8* @ROL64_55(i8* readnone %0) {
%2 = tail call i8* asm "rolq $$55, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret i8* %2
}
/* Variables and functions */
int EXIT_SUCCESS;
int any(char *, char *);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  char *s1 = "hello";
  char *s2 = "world";
  printf("%d\n", any(s1, s2));
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    0xec5(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <any@plt>
mov    %eax,%esi
lea    0xeb1(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e79(%rip),%rax
mov    (%rax),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xed7(%rip),%rsi
call   1040 <any@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
mov    0x2e97(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"hello\00"
@.str.1 = [6 x i8] c"world\00"
@.str.2 = [4 x i8] c"%d\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %2
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8** %3
%4 = load i8*, i8** %2
%5 = load i8*, i8** %3
%6 = call i32 @any(i8* %4, i8* %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %6)
%8 = load i32, i32* @EXIT_SUCCESS
ret i32 %8
}

LLVM IR (-O2):
@.str = [6 x i8] c"hello\00"
@.str.1 = [6 x i8] c"world\00"
@.str.2 = [4 x i8] c"%d\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 @any(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %1)
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ array;

/* Variables and functions */
int /*<<< orphan*/ strncpy(char *, char *, int);
char *raff() {
  char array[25];
  strncpy(array, "Hola, ¿qué hace?", sizeof(array));
  return array;
}


x86 assembly (clang, -O0):
<raff>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x20(%rbp),%rdi
lea    0xedd(%rip),%rsi
mov    $0x19,%edx
call   1030 <strncpy@plt>
lea    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<raff>:
push   %rbx
sub    $0x20,%rsp
lea    0xee4(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x19,%edx
call   1030 <strncpy@plt>
mov    %rbx,%rax
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"Hola, \C2\BFqu\C3\A9 hace?\00"
define i8* @raff() {
%1 = alloca [25 x i8]
%2 = getelementptr inbounds [25 x i8], [25 x i8]* %1, i64 0, i64 0
%3 = call i32 @strncpy(i8* %2, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 25)
%4 = getelementptr inbounds [25 x i8], [25 x i8]* %1, i64 0, i64 0
ret i8* %4
}

LLVM IR (-O2):
@.str = [19 x i8] c"Hola, \C2\BFqu\C3\A9 hace?\00"
define i8* @raff() {
%1 = alloca [25 x i8]
%2 = getelementptr inbounds [25 x i8], [25 x i8]* %1, i64 0, i64 0
%3 = call i32 @strncpy(i8* %2, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 25)
ret i8* %2
}
int Bematech_FI_MonitoramentoPapel(Var, Retorno) {
  return Formata("\x1b|62|54|\x1b", Var, Retorno);
}


x86 assembly (clang, -O0):
<Bematech_FI_MonitoramentoPapel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xed5(%rip),%rdi
mov    $0x0,%al
call   1030 <Formata@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Bematech_FI_MonitoramentoPapel>:
mov    %esi,%edx
mov    %edi,%esi
lea    0xee5(%rip),%rdi
xor    %eax,%eax
jmp    1030 <Formata@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"\1B|62|54|\1B\00"
define i32 @Bematech_FI_MonitoramentoPapel(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 (i8*, i32, i32, ...) bitcast (i32 (...)* @Formata to i32 (i8*, i32, i32, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
@.str = [10 x i8] c"\1B|62|54|\1B\00"
define i32 @Bematech_FI_MonitoramentoPapel(i32 %0, i32 %1) {
%3 = tail call i32 (i8*, i32, i32, ...) bitcast (i32 (...)* @Formata to i32 (i8*, i32, i32, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1)
ret i32 %3
}
int test_imm_85int64_highword_mem(long long *val) {
  return ((*val >> 32) & (0x85 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_85int64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x20,%rdx
and    $0x85,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_85int64_highword_mem>:
testb  $0x85,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_85int64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 32
%6 = and i64 %5, 133
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_85int64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 571230650368
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
const char *str_stmt_continue() { return "continue"; }


x86 assembly (clang, -O0):
<str_stmt_continue>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_stmt_continue>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [9 x i8] c"continue\00"
define i8* @str_stmt_continue() {
ret i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [9 x i8] c"continue\00"
define i8* @str_stmt_continue() {
ret i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *, int, int);
int /*<<< orphan*/ stderr;
void usage(const char *name) {
  fprintf(stderr,
          "usage: %s common_args [[sweeps] samples]\n"
          "\n"
          "  common args:  [-p power] [-P profile] [-t trim_tx [-t trim_rx]]\n"
          "                [-T offset] driver_tx[:arg] driver_rx[:arg]\n\n"
          "  -p power    transmit power, 0 to 15 (default %d)\n"
          "  -P profile  load profile for pass/fail decisions\n"
          "  -t trim     trim capacitor, 0 to 15 (default %d)\n"
          "  -T offset   constant wave offset in MHz, -0.5 or +0.5 (default: "
          "scan both)\n",
          name, 15, 8);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
mov    $0xf,%ecx
mov    $0x8,%r8d
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
mov    $0xf,%ecx
mov    $0x8,%r8d
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [400 x i8] c"usage: %s common_args [[sweeps] samples]\0A\0A common args: [-p power] [-P profile] [-t trim_tx [-t trim_rx]]\0A [-T offset] driver_tx[:arg] driver_rx[:arg]\0A\0A -p power transmit power, 0 to 15 (default %d)\0A -P profile load profile for pass/fail decisions\0A -t trim trim capacitor, 0 to 15 (default %d)\0A -T offset constant wave offset in MHz, -0.5 or +0.5 (default: scan both)\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([400 x i8], [400 x i8]* @.str, i64 0, i64 0), i8* %4, i32 15, i32 8)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [400 x i8] c"usage: %s common_args [[sweeps] samples]\0A\0A common args: [-p power] [-P profile] [-t trim_tx [-t trim_rx]]\0A [-T offset] driver_tx[:arg] driver_rx[:arg]\0A\0A -p power transmit power, 0 to 15 (default %d)\0A -P profile load profile for pass/fail decisions\0A -t trim trim capacitor, 0 to 15 (default %d)\0A -T offset constant wave offset in MHz, -0.5 or +0.5 (default: scan both)\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([400 x i8], [400 x i8]* @.str, i64 0, i64 0), i8* %0, i32 15, i32 8)
%4 = tail call i32 @exit(i32 1)
unreachable
}