#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
void uDMAChannelAttributeEnable(unsigned long ulChannelNum,
                                unsigned long ulAttr) {
  DEBUG_ASSERT((ulChannelNum & 0xffff) < 32);
  DEBUG_ASSERT(
      (ulAttr & ~(0x00000001 | 0x00000002 | 0x00000004 | 0x00000008)) == 0);
  ulChannelNum &= 0x1f;
  if (ulAttr & 0x00000001) {
    (*((volatile unsigned long *)(0x400FF018))) = 1 << ulChannelNum;
  }
  if (ulAttr & 0x00000002) {
    (*((volatile unsigned long *)(0x400FF030))) = 1 << ulChannelNum;
  }
  if (ulAttr & 0x00000004) {
    (*((volatile unsigned long *)(0x400FF038))) = 1 << ulChannelNum;
  }
  if (ulAttr & 0x00000008) {
    (*((volatile unsigned long *)(0x400FF020))) = 1 << ulChannelNum;
  }
}


x86 assembly (clang, -O0):
<uDMAChannelAttributeEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
and    $0xffff,%rax
cmp    $0x20,%rax
setb   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rax
and    $0xfffffffffffffff0,%rax
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
and    $0x1f,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
je     118a <uDMAChannelAttributeEnable+0x7a>
mov    -0x8(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rcx
mov    $0x400ff018,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
and    $0x2,%rax
cmp    $0x0,%rax
je     11b4 <uDMAChannelAttributeEnable+0xa4>
mov    -0x8(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rcx
mov    $0x400ff030,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
and    $0x4,%rax
cmp    $0x0,%rax
je     11de <uDMAChannelAttributeEnable+0xce>
mov    -0x8(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rcx
mov    $0x400ff038,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
and    $0x8,%rax
cmp    $0x0,%rax
je     1208 <uDMAChannelAttributeEnable+0xf8>
mov    -0x8(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rcx
mov    $0x400ff020,%eax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uDMAChannelAttributeEnable>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
xor    %edi,%edi
test   $0xffe0,%r14d
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
xor    %edi,%edi
cmp    $0x10,%rbx
setb   %dil
call   1030 <DEBUG_ASSERT@plt>
and    $0x1f,%r14d
test   $0x1,%bl
jne    116f <uDMAChannelAttributeEnable+0x5f>
test   $0x2,%bl
jne    1188 <uDMAChannelAttributeEnable+0x78>
test   $0x4,%bl
jne    11a1 <uDMAChannelAttributeEnable+0x91>
test   $0x8,%bl
je     1167 <uDMAChannelAttributeEnable+0x57>
mov    $0x1,%eax
mov    %r14d,%ecx
shl    %cl,%eax
cltq
mov    %rax,0x400ff020
40
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
mov    $0x1,%eax
mov    %r14d,%ecx
shl    %cl,%eax
cltq
mov    %rax,0x400ff018
40
test   $0x2,%bl
je     1149 <uDMAChannelAttributeEnable+0x39>
mov    $0x1,%eax
mov    %r14d,%ecx
shl    %cl,%eax
cltq
mov    %rax,0x400ff030
40
test   $0x4,%bl
je     114e <uDMAChannelAttributeEnable+0x3e>
mov    $0x1,%eax
mov    %r14d,%ecx
shl    %cl,%eax
cltq
mov    %rax,0x400ff038
40
test   $0x8,%bl
jne    1153 <uDMAChannelAttributeEnable+0x43>
jmp    1167 <uDMAChannelAttributeEnable+0x57>

LLVM IR (-O0):
define void @uDMAChannelAttributeEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = and i64 %5, 65535
%7 = icmp ult i64 %6, 32
%8 = zext i1 %7 to i32
%9 = call i32 @DEBUG_ASSERT(i32 %8)
%10 = load i64, i64* %4
%11 = and i64 %10, -16
%12 = icmp eq i64 %11, 0
%13 = zext i1 %12 to i32
%14 = call i32 @DEBUG_ASSERT(i32 %13)
%15 = load i64, i64* %3
%16 = and i64 %15, 31
store i64 %16, i64* %3
%17 = load i64, i64* %4
%18 = and i64 %17, 1
%19 = icmp ne i64 %18, 0
br i1 %19, label %20, label %25
20: ; preds = %2
%21 = load i64, i64* %3
%22 = trunc i64 %21 to i32
%23 = shl i32 1, %22
%24 = sext i32 %23 to i64
store volatile i64 %24, i64* inttoptr (i64 1074786328 to i64*)
br label %25
25: ; preds = %20, %2
%26 = load i64, i64* %4
%27 = and i64 %26, 2
%28 = icmp ne i64 %27, 0
br i1 %28, label %29, label %34
29: ; preds = %25
%30 = load i64, i64* %3
%31 = trunc i64 %30 to i32
%32 = shl i32 1, %31
%33 = sext i32 %32 to i64
store volatile i64 %33, i64* inttoptr (i64 1074786352 to i64*)
br label %34
34: ; preds = %29, %25
%35 = load i64, i64* %4
%36 = and i64 %35, 4
%37 = icmp ne i64 %36, 0
br i1 %37, label %38, label %43
38: ; preds = %34
%39 = load i64, i64* %3
%40 = trunc i64 %39 to i32
%41 = shl i32 1, %40
%42 = sext i32 %41 to i64
store volatile i64 %42, i64* inttoptr (i64 1074786360 to i64*)
br label %43
43: ; preds = %38, %34
%44 = load i64, i64* %4
%45 = and i64 %44, 8
%46 = icmp ne i64 %45, 0
br i1 %46, label %47, label %52
47: ; preds = %43
%48 = load i64, i64* %3
%49 = trunc i64 %48 to i32
%50 = shl i32 1, %49
%51 = sext i32 %50 to i64
store volatile i64 %51, i64* inttoptr (i64 1074786336 to i64*)
br label %52
52: ; preds = %47, %43
ret void
}

LLVM IR (-O2):
define void @uDMAChannelAttributeEnable(i64 %0, i64 %1) {
%3 = and i64 %0, 65504
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 @DEBUG_ASSERT(i32 %5)
%7 = icmp ult i64 %1, 16
%8 = zext i1 %7 to i32
%9 = tail call i32 @DEBUG_ASSERT(i32 %8)
%10 = and i64 %0, 31
%11 = and i64 %1, 1
%12 = icmp eq i64 %11, 0
br i1 %12, label %17, label %13
13: ; preds = %2
%14 = trunc i64 %10 to i32
%15 = shl nuw i32 1, %14
%16 = sext i32 %15 to i64
store volatile i64 %16, i64* inttoptr (i64 1074786328 to i64*)
br label %17
17: ; preds = %13, %2
%18 = and i64 %1, 2
%19 = icmp eq i64 %18, 0
br i1 %19, label %24, label %20
20: ; preds = %17
%21 = trunc i64 %10 to i32
%22 = shl nuw i32 1, %21
%23 = sext i32 %22 to i64
store volatile i64 %23, i64* inttoptr (i64 1074786352 to i64*)
br label %24
24: ; preds = %20, %17
%25 = and i64 %1, 4
%26 = icmp eq i64 %25, 0
br i1 %26, label %31, label %27
27: ; preds = %24
%28 = trunc i64 %10 to i32
%29 = shl nuw i32 1, %28
%30 = sext i32 %29 to i64
store volatile i64 %30, i64* inttoptr (i64 1074786360 to i64*)
br label %31
31: ; preds = %27, %24
%32 = and i64 %1, 8
%33 = icmp eq i64 %32, 0
br i1 %33, label %38, label %34
34: ; preds = %31
%35 = trunc i64 %10 to i32
%36 = shl nuw i32 1, %35
%37 = sext i32 %36 to i64
store volatile i64 %37, i64* inttoptr (i64 1074786336 to i64*)
br label %38
38: ; preds = %34, %31
ret void
}