xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ strcpy(char *, char *);
void sample2() {
  int b;
  char s[] = "abc";
  char *p1;
  char *p2;
  char *p3 = "123456";
  static int c = 0;
  p1 = (char *)malloc(10);
  p2 = (char *)malloc(20);
  strcpy(p1, "123456");
}


x86 assembly (clang, -O0):
<sample2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0xed2(%rip),%eax
mov    %eax,-0x8(%rbp)
lea    0xecc(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    $0xa,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    $0x14,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xea1(%rip),%rsi
call   1030 <strcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sample2>:
push   %rbx
mov    $0xa,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    $0x14,%edi
call   1040 <malloc@plt>
lea    0xec1(%rip),%rsi
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
@__const.sample2.s = [4 x i8] c"abc\00"
@.str = [7 x i8] c"123456\00"
@sample2.c = internal global i32 0
define void @sample2() {
%1 = alloca i32
%2 = alloca [4 x i8]
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = bitcast [4 x i8]* %2 to i8*
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8** %5
%7 = call i64 @malloc(i32 10)
%8 = inttoptr i64 %7 to i8*
store i8* %8, i8** %3
%9 = call i64 @malloc(i32 20)
%10 = inttoptr i64 %9 to i8*
store i8* %10, i8** %4
%11 = load i8*, i8** %3
%12 = call i32 @strcpy(i8* %11, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"123456\00"
define void @sample2() {
%1 = tail call i64 @malloc(i32 10)
%2 = inttoptr i64 %1 to i8*
%3 = tail call i64 @malloc(i32 20)
%4 = tail call i32 @strcpy(i8* %2, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct statement {
  int dummy;
};

/* Variables and functions */
struct statement *stmt_void();
struct statement *stmt_continue() {
  return stmt_void();
}


x86 assembly (clang, -O0):
<stmt_continue>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <stmt_void@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<stmt_continue>:
xor    %eax,%eax
jmp    1030 <stmt_void@plt>

LLVM IR (-O0):
%struct.statement = type { i32 }
define %struct.statement* @stmt_continue() {
%1 = call %struct.statement* (...) @stmt_void()
ret %struct.statement* %1
}

LLVM IR (-O2):
%struct.statement = type { i32 }
define %struct.statement* @stmt_continue() {
%1 = tail call %struct.statement* (...) @stmt_void()
ret %struct.statement* %1
}
int MAIN__() {
  int s_stop();
  s_stop("", 0L);
  return (0);
}


x86 assembly (clang, -O0):
<MAIN__>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
xor    %eax,%eax
mov    %eax,%esi
mov    $0x0,%al
call   1030 <s_stop@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<MAIN__>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %esi,%esi
xor    %eax,%eax
call   1030 <s_stop@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i32 @MAIN__() {
%1 = call i32 (i8*, i64, ...) bitcast (i32 (...)* @s_stop to i32 (i8*, i64, ...)*)(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i64 0)
ret i32 0
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i32 @MAIN__() {
%1 = tail call i32 (i8*, i64, ...) bitcast (i32 (...)* @s_stop to i32 (i8*, i64, ...)*)(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i64 0)
ret i32 0
}
int min(int x, int y) { return x > y ? y : x; }


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <min+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <min+0x27>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %edi,%eax
cmp    %esi,%edi
cmovg  %esi,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %4
br label %12
10: ; preds = %2
%11 = load i32, i32* %3
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void ts_null_packet(uint8_t *packet, unsigned packet_len) {
  packet[0] = 0x47;
  packet[1] = (0x1fff >> 8) & 0x1f;
  packet[2] = 0x1fff & 0xff;
  packet[3] = (packet[3] & 0xcf) | 0x10;
}


x86 assembly (clang, -O0):
<ts_null_packet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x47,(%rax)
mov    -0x8(%rbp),%rax
movl   $0x1f,0x4(%rax)
mov    -0x8(%rbp),%rax
movl   $0xff,0x8(%rax)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%ecx
and    $0xcf,%ecx
or     $0x10,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ts_null_packet>:
movabs $0x1f00000047,%rax
mov    %rax,(%rdi)
movl   $0xff,0x8(%rdi)
mov    $0xcf,%eax
and    0xc(%rdi),%eax
or     $0x10,%eax
mov    %eax,0xc(%rdi)
ret

LLVM IR (-O0):
define void @ts_null_packet(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 0
store i32 71, i32* %6
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 1
store i32 31, i32* %8
%9 = load i32*, i32** %3
%10 = getelementptr inbounds i32, i32* %9, i64 2
store i32 255, i32* %10
%11 = load i32*, i32** %3
%12 = getelementptr inbounds i32, i32* %11, i64 3
%13 = load i32, i32* %12
%14 = and i32 %13, 207
%15 = or i32 %14, 16
%16 = load i32*, i32** %3
%17 = getelementptr inbounds i32, i32* %16, i64 3
store i32 %15, i32* %17
ret void
}

LLVM IR (-O2):
define void @ts_null_packet(i32* nocapture %0, i32 %1) {
store i32 71, i32* %0
%3 = getelementptr inbounds i32, i32* %0, i64 1
store i32 31, i32* %3
%4 = getelementptr inbounds i32, i32* %0, i64 2
store i32 255, i32* %4
%5 = getelementptr inbounds i32, i32* %0, i64 3
%6 = load i32, i32* %5
%7 = and i32 %6, 207
%8 = or i32 %7, 16
store i32 %8, i32* %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ MasterStateMachine();
int /*<<< orphan*/ StartMasterStateMachine();
int /*<<< orphan*/ TMR_Init(int /*<<< orphan*/);
void main(void) {
  TMR_Init((0));
  StartMasterStateMachine();
  while (1) {
    MasterStateMachine();
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <TMR_Init@plt>
mov    $0x0,%al
call   1040 <StartMasterStateMachine@plt>
mov    $0x0,%al
call   1050 <MasterStateMachine@plt>
jmp    1142 <main+0x12>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <TMR_Init@plt>
xor    %eax,%eax
call   1040 <StartMasterStateMachine@plt>
nop
xor    %eax,%eax
call   1050 <MasterStateMachine@plt>
jmp    1140 <main+0x10>

LLVM IR (-O0):
define void @main() {
%1 = call i32 @TMR_Init(i32 0)
%2 = call i32 (...) @StartMasterStateMachine()
br label %3
3: ; preds = %0, %3
%4 = call i32 (...) @MasterStateMachine()
br label %3
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @TMR_Init(i32 0)
%2 = tail call i32 (...) @StartMasterStateMachine()
br label %3
3: ; preds = %0, %3
%4 = tail call i32 (...) @MasterStateMachine()
br label %3
}
/* Variables and functions */
float powf(float, int);
float quartic_out(float step, float max_steps, float max_val) {
  float ratio = (step / max_steps) - 1;
  return max_val + max_val * powf(ratio, 5);
}


x86 assembly (clang, -O0):
<quartic_out>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
divss  -0x8(%rbp),%xmm0
movss  0xec7(%rip),%xmm1
subss  %xmm1,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x10(%rbp),%xmm0
mov    $0x5,%edi
call   1030 <powf@plt>
movss  -0x18(%rbp),%xmm1
movaps %xmm0,%xmm2
movss  -0x14(%rbp),%xmm0
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quartic_out>:
push   %rax
movss  %xmm2,0x4(%rsp)
divss  %xmm1,%xmm0
addss  0xedd(%rip),%xmm0
mov    $0x5,%edi
call   1030 <powf@plt>
movss  0x4(%rsp),%xmm1
mulss  %xmm1,%xmm0
addss  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @quartic_out(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%8 = load float, float* %4
%9 = load float, float* %5
%10 = fdiv float %8, %9
%11 = fsub float %10, 1.000000e+00
store float %11, float* %7
%12 = load float, float* %6
%13 = load float, float* %6
%14 = load float, float* %7
%15 = call float @powf(float %14, i32 5)
%16 = call float @llvm.fmuladd.f32(float %13, float %15, float %12)
ret float %16
}

LLVM IR (-O2):
define float @quartic_out(float %0, float %1, float %2) {
%4 = fdiv float %0, %1
%5 = fadd float %4, -1.000000e+00
%6 = tail call float @powf(float %5, i32 5)
%7 = tail call float @llvm.fmuladd.f32(float %2, float %6, float %2)
ret float %7
}
char *langEnumControlsJoyNone() { return "None"; }


x86 assembly (clang, -O0):
<langEnumControlsJoyNone>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langEnumControlsJoyNone>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"None\00"
define i8* @langEnumControlsJoyNone() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [5 x i8] c"None\00"
define i8* @langEnumControlsJoyNone() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}
int disp_open(struct inode *inode, struct file *file) { return 0; }


x86 assembly (clang, -O0):
<disp_open>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<disp_open>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.inode = type opaque
%struct.file = type opaque
define i32 @disp_open(%struct.inode* %0, %struct.file* %1) {
%3 = alloca %struct.inode*
%4 = alloca %struct.file*
store %struct.inode* %0, %struct.inode** %3
store %struct.file* %1, %struct.file** %4
ret i32 0
}

LLVM IR (-O2):
%struct.inode = type opaque
%struct.file = type opaque
define i32 @disp_open(%struct.inode* nocapture readnone %0, %struct.file* nocapture readnone %1) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ siginfo_t;

/* Variables and functions */
int /*<<< orphan*/ SIGALRM;
int /*<<< orphan*/ raise(int /*<<< orphan*/);
void action(int sig, siginfo_t *info, void *uc) { raise(SIGALRM); }


x86 assembly (clang, -O0):
<action>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
call   1030 <raise@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<action>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <raise@plt>

LLVM IR (-O0):
@SIGALRM = global i32 0
define void @action(i32 %0, i32* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i8*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i8* %2, i8** %6
%7 = load i32, i32* @SIGALRM
%8 = call i32 @raise(i32 %7)
ret void
}

LLVM IR (-O2):
@SIGALRM = global i32 0
define void @action(i32 %0, i32* nocapture readnone %1, i8* nocapture readnone %2) {
%4 = load i32, i32* @SIGALRM
%5 = tail call i32 @raise(i32 %4)
ret void
}
void mdp4_overlay_dtv_wait4vsync(void) {}


x86 assembly (clang, -O0):
<mdp4_overlay_dtv_wait4vsync>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdp4_overlay_dtv_wait4vsync>:
ret

LLVM IR (-O0):
define void @mdp4_overlay_dtv_wait4vsync() {
ret void
}

LLVM IR (-O2):
define void @mdp4_overlay_dtv_wait4vsync() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ UpdatePSG();
unsigned int ppi_read_port(int /*<<< orphan*/);
unsigned int PPI_ReadPortA(void) {
  UpdatePSG();
  return ppi_read_port(0);
}


x86 assembly (clang, -O0):
<PPI_ReadPortA>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <UpdatePSG@plt>
xor    %edi,%edi
call   1030 <ppi_read_port@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PPI_ReadPortA>:
push   %rax
xor    %eax,%eax
call   1040 <UpdatePSG@plt>
xor    %edi,%edi
pop    %rax
jmp    1030 <ppi_read_port@plt>

LLVM IR (-O0):
define i32 @PPI_ReadPortA() {
%1 = call i32 (...) @UpdatePSG()
%2 = call i32 @ppi_read_port(i32 0)
ret i32 %2
}

LLVM IR (-O2):
define i32 @PPI_ReadPortA() {
%1 = tail call i32 (...) @UpdatePSG()
%2 = tail call i32 @ppi_read_port(i32 0)
ret i32 %2
}
int check_username(const char *user) { return 0; }


x86 assembly (clang, -O0):
<check_username>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_username>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @check_username(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @check_username(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int truncate(char *, int);
void truncateFile(char *fname, int newLen) {
  int ret;
  ret = truncate(fname, newLen);
  if (ret == -1) {
    printf("Error truncating file \n");
  }
}


x86 assembly (clang, -O0):
<truncateFile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <truncate@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0xffffffff,-0x10(%rbp)
jne    1154 <truncateFile+0x34>
lea    0xeb1(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<truncateFile>:
push   %rax
call   1040 <truncate@plt>
cmp    $0xffffffff,%eax
je     112d <truncateFile+0xd>
pop    %rax
ret
lea    0xecc(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"Error truncating file \0A\00"
define void @truncateFile(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @truncate(i8* %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp eq i32 %9, -1
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %2
ret void
}

LLVM IR (-O2):
@str = [23 x i8] c"Error truncating file \00"
define void @truncateFile(i8* %0, i32 %1) {
%3 = tail call i32 @truncate(i8* %0, i32 %1)
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret void
}
/* Variables and functions */
void *spudec_new_scaled(unsigned int *, int /*<<< orphan*/, int /*<<< orphan*/,
                        int /*<<< orphan*/ *, int /*<<< orphan*/, unsigned int);
void *spudec_new(unsigned int *palette, unsigned int y_threshold) {
  return spudec_new_scaled(palette, 0, 0, NULL, 0, y_threshold);
}


x86 assembly (clang, -O0):
<spudec_new>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%r9d
xor    %r8d,%r8d
xor    %eax,%eax
mov    %eax,%ecx
mov    %r8d,%esi
mov    %r8d,%edx
call   1030 <spudec_new_scaled@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spudec_new>:
mov    %esi,%r9d
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <spudec_new_scaled@plt>

LLVM IR (-O0):
define i8* @spudec_new(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i8* @spudec_new_scaled(i32* %5, i32 0, i32 0, i32* null, i32 0, i32 %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @spudec_new(i32* %0, i32 %1) {
%3 = tail call i8* @spudec_new_scaled(i32* %0, i32 0, i32 0, i32* null, i32 0, i32 %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_eval(int);
scalar_t__ strncasecmp(char *, char *, int);
void strncasecmp_diff_length_4() {
  char *x = "abcde";
  char *y = "aBc";
  clang_analyzer_eval(strncasecmp(x, y, 3) == 0);
}


x86 assembly (clang, -O0):
<strncasecmp_diff_length_4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xecc(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x3,%edx
call   1030 <strncasecmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <clang_analyzer_eval@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncasecmp_diff_length_4>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xed7(%rip),%rsi
mov    $0x3,%edx
call   1030 <strncasecmp@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
pop    %rax
jmp    1040 <clang_analyzer_eval@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"abcde\00"
@.str.1 = [4 x i8] c"aBc\00"
define void @strncasecmp_diff_length_4() {
%1 = alloca i8*
%2 = alloca i8*
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %1
%4 = load i8*, i8** %2
%5 = call i64 @strncasecmp(i8* %3, i8* %4, i32 3)
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
%8 = call i32 @clang_analyzer_eval(i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"abcde\00"
@.str.1 = [4 x i8] c"aBc\00"
define void @strncasecmp_diff_length_4() {
%1 = tail call i64 @strncasecmp(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 3)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @clang_analyzer_eval(i32 %3)
ret void
}
/* Variables and functions */
double strtod(char const *, char **);
double c_strtod(const char *nptr, char **endptr) {
  return strtod(nptr, endptr);
}


x86 assembly (clang, -O0):
<c_strtod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strtod@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_strtod>:
jmp    1030 <strtod@plt>

LLVM IR (-O0):
define double @c_strtod(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
%5 = load i8*, i8** %3
%6 = load i8**, i8*** %4
%7 = call double @strtod(i8* %5, i8** %6)
ret double %7
}

LLVM IR (-O2):
define double @c_strtod(i8* %0, i8** nocapture %1) {
%3 = tail call double @strtod(i8* %0, i8** %1)
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ GroundTruthHandle();
int /*<<< orphan*/ UAVObjLogging(int /*<<< orphan*/);
void GroundTruthLogging() { UAVObjLogging(GroundTruthHandle()); }


x86 assembly (clang, -O0):
<GroundTruthLogging>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <GroundTruthHandle@plt>
mov    %eax,%edi
call   1030 <UAVObjLogging@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GroundTruthLogging>:
push   %rax
xor    %eax,%eax
call   1040 <GroundTruthHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <UAVObjLogging@plt>

LLVM IR (-O0):
define void @GroundTruthLogging() {
%1 = call i32 (...) @GroundTruthHandle()
%2 = call i32 @UAVObjLogging(i32 %1)
ret void
}

LLVM IR (-O2):
define void @GroundTruthLogging() {
%1 = tail call i32 (...) @GroundTruthHandle()
%2 = tail call i32 @UAVObjLogging(i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int parseReal(FILE *stream, char *str, int which, size_t n, int n_is_valid,
              va_list *arg, size_t *count, char spec, char flags, int width,
              int precision, int length) {}


x86 assembly (clang, -O0):
<parseReal>:
push   %rbp
mov    %rsp,%rbp
mov    0x38(%rbp),%eax
mov    0x30(%rbp),%eax
mov    0x28(%rbp),%eax
mov    0x20(%rbp),%al
mov    0x18(%rbp),%al
mov    0x10(%rbp),%rax
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    %rcx,-0x28(%rbp)
mov    %r8d,-0x2c(%rbp)
mov    %r9,-0x38(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parseReal>:
ret

LLVM IR (-O0):
define i32 @parseReal(i32* %0, i8* %1, i32 %2, i64 %3, i32 %4, i32* %5, i64* %6, i8 signext %7, i8 signext %8, i32 %9, i32 %10, i32 %11) {
%13 = alloca i32
%14 = alloca i32*
%15 = alloca i8*
%16 = alloca i32
%17 = alloca i64
%18 = alloca i32
%19 = alloca i32*
%20 = alloca i64*
%21 = alloca i8
%22 = alloca i8
%23 = alloca i32
%24 = alloca i32
%25 = alloca i32
store i32* %0, i32** %14
store i8* %1, i8** %15
store i32 %2, i32* %16
store i64 %3, i64* %17
store i32 %4, i32* %18
store i32* %5, i32** %19
store i64* %6, i64** %20
store i8 %7, i8* %21
store i8 %8, i8* %22
store i32 %9, i32* %23
store i32 %10, i32* %24
store i32 %11, i32* %25
%26 = load i32, i32* %13
ret i32 %26
}

LLVM IR (-O2):
define i32 @parseReal(i32* nocapture readnone %0, i8* nocapture readnone %1, i32 %2, i64 %3, i32 %4, i32* nocapture readnone %5, i64* nocapture readnone %6, i8 signext %7, i8 signext %8, i32 %9, i32 %10, i32 %11) {
ret i32 undef
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ memset(void **, int /*<<< orphan*/, int);
void **arr_create(int size) {
  void **arr = (void **)malloc(sizeof(void *) * (size + 1));
  memset(arr, 0, sizeof(void *) * (size + 1));
  return arr;
}


x86 assembly (clang, -O0):
<arr_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
cltq
shl    $0x3,%rax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%eax
add    $0x1,%eax
cltq
shl    $0x3,%rax
mov    %eax,%edx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arr_create>:
push   %rbp
push   %rbx
push   %rax
lea    0x8(,%rdi,8),%ebp
mov    %ebp,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %esi,%esi
mov    %ebp,%edx
call   1030 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8** @arr_create(i32 %0) {
%2 = alloca i32
%3 = alloca i8**
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
%6 = sext i32 %5 to i64
%7 = mul i64 8, %6
%8 = trunc i64 %7 to i32
%9 = call i64 @malloc(i32 %8)
%10 = inttoptr i64 %9 to i8**
store i8** %10, i8*** %3
%11 = load i8**, i8*** %3
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 1
%14 = sext i32 %13 to i64
%15 = mul i64 8, %14
%16 = trunc i64 %15 to i32
%17 = call i32 @memset(i8** %11, i32 0, i32 %16)
%18 = load i8**, i8*** %3
ret i8** %18
}

LLVM IR (-O2):
define i8** @arr_create(i32 %0) {
%2 = shl i32 %0, 3
%3 = add i32 %2, 8
%4 = tail call i64 @malloc(i32 %3)
%5 = inttoptr i64 %4 to i8**
%6 = tail call i32 @memset(i8** %5, i32 0, i32 %3)
ret i8** %5
}
int ph_ftp_deinit(void *handler) { return 0; }


x86 assembly (clang, -O0):
<ph_ftp_deinit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ph_ftp_deinit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ph_ftp_deinit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @ph_ftp_deinit(i8* nocapture readnone %0) {
ret i32 0
}
void init_hw_perf_events(void) {}


x86 assembly (clang, -O0):
<init_hw_perf_events>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_hw_perf_events>:
ret

LLVM IR (-O0):
define void @init_hw_perf_events() {
ret void
}

LLVM IR (-O2):
define void @init_hw_perf_events() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FlightBatterySettingsHandle();
int /*<<< orphan*/ UAVObjLogging(int /*<<< orphan*/);
void FlightBatterySettingsLogging() {
  UAVObjLogging(FlightBatterySettingsHandle());
}


x86 assembly (clang, -O0):
<FlightBatterySettingsLogging>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <FlightBatterySettingsHandle@plt>
mov    %eax,%edi
call   1030 <UAVObjLogging@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FlightBatterySettingsLogging>:
push   %rax
xor    %eax,%eax
call   1040 <FlightBatterySettingsHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <UAVObjLogging@plt>

LLVM IR (-O0):
define void @FlightBatterySettingsLogging() {
%1 = call i32 (...) @FlightBatterySettingsHandle()
%2 = call i32 @UAVObjLogging(i32 %1)
ret void
}

LLVM IR (-O2):
define void @FlightBatterySettingsLogging() {
%1 = tail call i32 (...) @FlightBatterySettingsHandle()
%2 = tail call i32 @UAVObjLogging(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ds_set_boolean(int /*<<< orphan*/, int, int);
void snmp_set_mib_parse_label(int save) { ds_set_boolean(0, 3, save); }


x86 assembly (clang, -O0):
<snmp_set_mib_parse_label>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
xor    %edi,%edi
mov    $0x3,%esi
call   1030 <ds_set_boolean@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<snmp_set_mib_parse_label>:
mov    %edi,%edx
xor    %edi,%edi
mov    $0x3,%esi
jmp    1030 <ds_set_boolean@plt>

LLVM IR (-O0):
define void @snmp_set_mib_parse_label(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ds_set_boolean(i32 0, i32 3, i32 %3)
ret void
}

LLVM IR (-O2):
define void @snmp_set_mib_parse_label(i32 %0) {
%2 = tail call i32 @ds_set_boolean(i32 0, i32 3, i32 %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fread(void *, int, int, int /*<<< orphan*/ *);
int xfread(void *p, int size, int num, FILE *fp) {
  int block;
  block = fread(p, size, num, fp);
  return block;
}


x86 assembly (clang, -O0):
<xfread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x18(%rbp),%rcx
call   1030 <fread@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfread>:
jmp    1030 <fread@plt>

LLVM IR (-O0):
define i32 @xfread(i8* %0, i32 %1, i32 %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32*
%9 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32* %3, i32** %8
%10 = load i8*, i8** %5
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32*, i32** %8
%14 = call i32 @fread(i8* %10, i32 %11, i32 %12, i32* %13)
store i32 %14, i32* %9
%15 = load i32, i32* %9
ret i32 %15
}

LLVM IR (-O2):
define i32 @xfread(i8* nocapture %0, i32 %1, i32 %2, i32* nocapture %3) {
%5 = tail call i32 @fread(i8* %0, i32 %1, i32 %2, i32* %3)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ expr_log(char *);
void expr_log_match(int match) {
  if (match)
    expr_log("=True");
  else
    expr_log("=False");
}


x86 assembly (clang, -O0):
<expr_log_match>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1136 <expr_log_match+0x26>
lea    0xed4(%rip),%rdi
call   1030 <expr_log@plt>
jmp    1142 <expr_log_match+0x32>
lea    0xec9(%rip),%rdi
call   1030 <expr_log@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expr_log_match>:
test   %edi,%edi
lea    0xeed(%rip),%rax
lea    0xee0(%rip),%rdi
cmove  %rax,%rdi
jmp    1030 <expr_log@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"=True\00"
@.str.1 = [7 x i8] c"=False\00"
define void @expr_log_match(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @expr_log(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %9
7: ; preds = %1
%8 = call i32 @expr_log(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"=True\00"
@.str.1 = [7 x i8] c"=False\00"
define void @expr_log_match(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
%4 = tail call i32 @expr_log(i8* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ op_mkdir(int /*<<< orphan*/);
int /*<<< orphan*/ op_rename(int /*<<< orphan*/, int);
int /*<<< orphan*/ op_sync();
int /*<<< orphan*/ writeemptyfile(int);
void wl_renamedir(void) {
  op_mkdir(0);
  writeemptyfile(2);
  op_sync();
  op_rename(0, 1);
}


x86 assembly (clang, -O0):
<wl_renamedir>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1040 <op_mkdir@plt>
mov    $0x2,%edi
call   1030 <writeemptyfile@plt>
mov    $0x0,%al
call   1050 <op_sync@plt>
xor    %edi,%edi
mov    $0x1,%esi
call   1060 <op_rename@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wl_renamedir>:
push   %rax
xor    %edi,%edi
call   1040 <op_mkdir@plt>
mov    $0x2,%edi
call   1030 <writeemptyfile@plt>
xor    %eax,%eax
call   1050 <op_sync@plt>
xor    %edi,%edi
mov    $0x1,%esi
pop    %rax
jmp    1060 <op_rename@plt>

LLVM IR (-O0):
define void @wl_renamedir() {
%1 = call i32 @op_mkdir(i32 0)
%2 = call i32 @writeemptyfile(i32 2)
%3 = call i32 (...) @op_sync()
%4 = call i32 @op_rename(i32 0, i32 1)
ret void
}

LLVM IR (-O2):
define void @wl_renamedir() {
%1 = tail call i32 @op_mkdir(i32 0)
%2 = tail call i32 @writeemptyfile(i32 2)
%3 = tail call i32 (...) @op_sync()
%4 = tail call i32 @op_rename(i32 0, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GPIODirModeSet(unsigned long, unsigned char, int);
int /*<<< orphan*/ GPIOPadConfigSet(unsigned long, unsigned char, int, int);
void GPIOPinTypeEPI(unsigned long ulPort, unsigned char ucPins) {
  ;
  GPIODirModeSet(ulPort, ucPins, 0x00000002);
  GPIOPadConfigSet(ulPort, ucPins, 0x00000004, 0x00000008);
}


x86 assembly (clang, -O0):
<GPIOPinTypeEPI>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2,%edx
movzbl -0x9(%rbp),%esi
call   1040 <GPIODirModeSet@plt>
mov    -0x8(%rbp),%rdi
mov    $0x4,%edx
mov    $0x8,%ecx
movzbl -0x9(%rbp),%esi
call   1030 <GPIOPadConfigSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinTypeEPI>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    $0x4,%edx
mov    $0x8,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <GPIOPadConfigSet@plt>

LLVM IR (-O0):
define void @GPIOPinTypeEPI(i64 %0, i8 zeroext %1) {
%3 = alloca i64
%4 = alloca i8
store i64 %0, i64* %3
store i8 %1, i8* %4
%5 = load i64, i64* %3
%6 = load i8, i8* %4
%7 = call i32 @GPIODirModeSet(i64 %5, i8 zeroext %6, i32 2)
%8 = load i64, i64* %3
%9 = load i8, i8* %4
%10 = call i32 @GPIOPadConfigSet(i64 %8, i8 zeroext %9, i32 4, i32 8)
ret void
}

LLVM IR (-O2):
define void @GPIOPinTypeEPI(i64 %0, i8 zeroext %1) {
%3 = tail call i32 @GPIODirModeSet(i64 %0, i8 zeroext %1, i32 2)
%4 = tail call i32 @GPIOPadConfigSet(i64 %0, i8 zeroext %1, i32 4, i32 8)
ret void
}
/* Variables and functions */
scalar_t__ RAND_MAX;
scalar_t__ rand();
int randomInteger(int low, int high) {
  int k;
  double d;
  d = (double)rand() / ((double)RAND_MAX + 1);
  k = (int)(d * (high - low + 1));
  return (low + k);
}


x86 assembly (clang, -O0):
<randomInteger>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2eb7(%rip),%rax
cvtsi2sdq (%rax),%xmm1
movsd  0xec2(%rip),%xmm2
addsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
add    $0x1,%eax
cvtsi2sd %eax,%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randomInteger>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ebe(%rip),%rax
cvtsi2sdq (%rax),%xmm1
addsd  0xec9(%rip),%xmm1
divsd  %xmm1,%xmm0
sub    %ebp,%ebx
add    $0x1,%ebx
xorps  %xmm1,%xmm1
cvtsi2sd %ebx,%xmm1
mulsd  %xmm0,%xmm1
cvttsd2si %xmm1,%eax
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define i32 @randomInteger(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca double
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = call i64 (...) @rand()
%8 = sitofp i64 %7 to double
%9 = load i64, i64* @RAND_MAX
%10 = sitofp i64 %9 to double
%11 = fadd double %10, 1.000000e+00
%12 = fdiv double %8, %11
store double %12, double* %6
%13 = load double, double* %6
%14 = load i32, i32* %4
%15 = load i32, i32* %3
%16 = sub nsw i32 %14, %15
%17 = add nsw i32 %16, 1
%18 = sitofp i32 %17 to double
%19 = fmul double %13, %18
%20 = fptosi double %19 to i32
store i32 %20, i32* %5
%21 = load i32, i32* %3
%22 = load i32, i32* %5
%23 = add nsw i32 %21, %22
ret i32 %23
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define i32 @randomInteger(i32 %0, i32 %1) {
%3 = tail call i64 (...) @rand()
%4 = sitofp i64 %3 to double
%5 = load i64, i64* @RAND_MAX
%6 = sitofp i64 %5 to double
%7 = fadd double %6, 1.000000e+00
%8 = fdiv double %4, %7
%9 = sub i32 1, %0
%10 = add i32 %9, %1
%11 = sitofp i32 %10 to double
%12 = fmul double %8, %11
%13 = fptosi double %12 to i32
%14 = add nsw i32 %13, %0
ret i32 %14
}
void catch_alrm(int x) { ((void)(x)); }


x86 assembly (clang, -O0):
<catch_alrm>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<catch_alrm>:
ret

LLVM IR (-O0):
define void @catch_alrm(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret void
}

LLVM IR (-O2):
define void @catch_alrm(i32 %0) {
ret void
}
void __clear_bit(int nr, volatile unsigned long *addr) {
  unsigned long mask = (1UL << ((nr) % (4 * 8)));
  unsigned long *p = ((unsigned long *)addr) + ((nr) / (4 * 8));
  *p &= ~mask;
}


x86 assembly (clang, -O0):
<__clear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x28(%rbp),%rax
movslq %ecx,%rcx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rcx
xor    $0xffffffffffffffff,%rcx
mov    -0x20(%rbp),%rax
and    (%rax),%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__clear_bit>:
mov    %edi,%ecx
lea    0x1f(%rcx),%eax
test   %edi,%edi
cmovns %edi,%eax
mov    %eax,%edx
and    $0xffffffe0,%edx
sub    %edx,%ecx
sar    $0x5,%eax
mov    $0xfffffffffffffffe,%rdx
rol    %cl,%rdx
cltq
and    %rdx,(%rsi,%rax,8)
ret

LLVM IR (-O0):
define void @__clear_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%7 = load i32, i32* %3
%8 = srem i32 %7, 32
%9 = zext i32 %8 to i64
%10 = shl i64 1, %9
store i64 %10, i64* %5
%11 = load i64*, i64** %4
%12 = load i32, i32* %3
%13 = sdiv i32 %12, 32
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i64, i64* %11, i64 %14
store i64* %15, i64** %6
%16 = load i64, i64* %5
%17 = xor i64 %16, -1
%18 = load i64*, i64** %6
%19 = load i64, i64* %18
%20 = and i64 %19, %17
store i64 %20, i64* %18
ret void
}

LLVM IR (-O2):
define void @__clear_bit(i32 %0, i64* nocapture %1) {
%3 = srem i32 %0, 32
%4 = zext i32 %3 to i64
%5 = shl nuw i64 1, %4
%6 = sdiv i32 %0, 32
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i64, i64* %1, i64 %7
%9 = xor i64 %5, -1
%10 = load i64, i64* %8
%11 = and i64 %10, %9
store i64 %11, i64* %8
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sqlite3;

/* Variables and functions */
void enableDoubleQuotedStringLiterals(sqlite3 *db) {}


x86 assembly (clang, -O0):
<enableDoubleQuotedStringLiterals>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<enableDoubleQuotedStringLiterals>:
ret

LLVM IR (-O0):
define void @enableDoubleQuotedStringLiterals(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @enableDoubleQuotedStringLiterals(i32* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, int);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ stdout;
void __attribute__((noreturn)) __attribute__((unused))
jhc_case_fell_off(int n) {
  fflush(stdout);
  fprintf(stderr, "\n%s:%i: case fell off\n",
          "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
          "2022-01-22/02-19-57/repos/dec9ue/jhc_copygc/refs/heads/master/rts/"
          "rts/rts_support.c",
          n);
  abort();
}


x86 assembly (clang, -O0):
<jhc_case_fell_off>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2e96(%rip),%rax
mov    (%rax),%edi
call   1050 <fflush@plt>
mov    0x2e90(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%ecx
lea    0xea4(%rip),%rsi
lea    0xeb4(%rip),%rdx
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<jhc_case_fell_off>:
push   %rbx
mov    %edi,%ebx
mov    0x2e9e(%rip),%rax
mov    (%rax),%edi
call   1050 <fflush@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
lea    0xeaf(%rip),%rsi
lea    0xebf(%rip),%rdx
mov    %ebx,%ecx
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stdout = global i32 0
@stderr = global i32 0
@.str = [23 x i8] c"\0A%s:%i: case fell off\0A\00"
@.str.1 = [148 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/dec9ue/jhc_copygc/refs/heads/master/rts/rts/rts_support.c\00"
define void @jhc_case_fell_off(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @stdout
%4 = call i32 @fflush(i32 %3)
%5 = load i32, i32* @stderr
%6 = load i32, i32* %2
%7 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([148 x i8], [148 x i8]* @.str.1, i64 0, i64 0), i32 %6)
%8 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stdout = global i32 0
@stderr = global i32 0
@.str = [23 x i8] c"\0A%s:%i: case fell off\0A\00"
@.str.1 = [148 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/dec9ue/jhc_copygc/refs/heads/master/rts/rts/rts_support.c\00"
define void @jhc_case_fell_off(i32 %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @fflush(i32 %2)
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([148 x i8], [148 x i8]* @.str.1, i64 0, i64 0), i32 %0)
%6 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ orgfx_enable_tex0(int /*<<< orphan*/);
int /*<<< orphan*/ orgfx_line(int, int, int, int);
int /*<<< orphan*/ orgfx_set_color(unsigned int);
void orgfxplus_line(int x0, int y0, int x1, int y1, unsigned int color) {
  orgfx_enable_tex0(0);
  orgfx_set_color(color);
  orgfx_line(x0, y0, x1, y1);
}


x86 assembly (clang, -O0):
<orgfxplus_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
xor    %edi,%edi
call   1050 <orgfx_enable_tex0@plt>
mov    -0x14(%rbp),%edi
call   1040 <orgfx_set_color@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1030 <orgfx_line@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<orgfxplus_line>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %r8d,%ebx
mov    %ecx,%r14d
mov    %edx,%r15d
mov    %esi,%r12d
mov    %edi,%ebp
xor    %edi,%edi
call   1050 <orgfx_enable_tex0@plt>
mov    %ebx,%edi
call   1040 <orgfx_set_color@plt>
mov    %ebp,%edi
mov    %r12d,%esi
mov    %r15d,%edx
mov    %r14d,%ecx
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <orgfx_line@plt>

LLVM IR (-O0):
define void @orgfxplus_line(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = call i32 @orgfx_enable_tex0(i32 0)
%12 = load i32, i32* %10
%13 = call i32 @orgfx_set_color(i32 %12)
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = load i32, i32* %8
%17 = load i32, i32* %9
%18 = call i32 @orgfx_line(i32 %14, i32 %15, i32 %16, i32 %17)
ret void
}

LLVM IR (-O2):
define void @orgfxplus_line(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @orgfx_enable_tex0(i32 0)
%7 = tail call i32 @orgfx_set_color(i32 %4)
%8 = tail call i32 @orgfx_line(i32 %0, i32 %1, i32 %2, i32 %3)
ret void
}
double cbrt_5d(double d) {
  const unsigned int B1 = 715094163;
  double t = 0.0;
  unsigned int *pt = (unsigned int *)&t;
  unsigned int *px = (unsigned int *)&d;
  pt[1] = px[1] / 3 + B1;
  return t;
}


x86 assembly (clang, -O0):
<cbrt_5d>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movl   $0x2a9f7893,-0xc(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x18(%rbp)
lea    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    0x4(%rax),%eax
mov    $0x3,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,%ecx
add    $0x2a9f7893,%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,0x4(%rax)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbrt_5d>:
movq   %xmm0,%rax
shr    $0x20,%rax
mov    $0xaaaaaaab,%ecx
imul   %rax,%rcx
shr    $0x21,%rcx
add    $0x2a9f7893,%ecx
shl    $0x20,%rcx
movq   %rcx,%xmm0
ret

LLVM IR (-O0):
define double @cbrt_5d(double %0) {
%2 = alloca double
%3 = alloca i32
%4 = alloca double
%5 = alloca i32*
%6 = alloca i32*
store double %0, double* %2
store i32 715094163, i32* %3
store double 0.000000e+00, double* %4
%7 = bitcast double* %4 to i32*
store i32* %7, i32** %5
%8 = bitcast double* %2 to i32*
store i32* %8, i32** %6
%9 = load i32*, i32** %6
%10 = getelementptr inbounds i32, i32* %9, i64 1
%11 = load i32, i32* %10
%12 = udiv i32 %11, 3
%13 = add i32 %12, 715094163
%14 = load i32*, i32** %5
%15 = getelementptr inbounds i32, i32* %14, i64 1
store i32 %13, i32* %15
%16 = load double, double* %4
ret double %16
}

LLVM IR (-O2):
define double @cbrt_5d(double %0) {
%2 = bitcast double %0 to i64
%3 = lshr i64 %2, 32
%4 = trunc i64 %3 to i32
%5 = udiv i32 %4, 3
%6 = add nuw nsw i32 %5, 715094163
%7 = zext i32 %6 to i64
%8 = shl nuw nsw i64 %7, 32
%9 = bitcast i64 %8 to double
ret double %9
}
int __attribute__((target("arch=tigerlake"))) foo(void) { return 9; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    $0x9,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    $0x9,%eax
ret

LLVM IR (-O0):
define i32 @foo() {
ret i32 9
}

LLVM IR (-O2):
define i32 @foo() {
ret i32 9
}
/* Variables and functions */
char *GetCvar(char const *);
float atof(char *);
int /*<<< orphan*/ strcmp(char *, char *);
int /*<<< orphan*/ xfree(char *);
float GetCvarFloat(const char *var_name) {
  float ret;
  char *buff = GetCvar(var_name);
  if (!strcmp(buff, ""))
    ret = 0.0;
  else
    ret = atof(buff);
  xfree(buff);
  return ret;
}


x86 assembly (clang, -O0):
<GetCvarFloat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1060 <GetCvar@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
lea    0xe9c(%rip),%rsi
call   1050 <strcmp@plt>
cmp    $0x0,%eax
jne    117f <GetCvarFloat+0x3f>
xorps  %xmm0,%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    118d <GetCvarFloat+0x4d>
mov    -0x18(%rbp),%rdi
call   1030 <atof@plt>
movss  %xmm0,-0xc(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <xfree@plt>
movss  -0xc(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetCvarFloat>:
push   %rbx
sub    $0x10,%rsp
call   1050 <GetCvar@plt>
mov    %rax,%rbx
cmpb   $0x0,(%rax)
je     114c <GetCvarFloat+0x1c>
mov    %rbx,%rdi
call   1030 <atof@plt>
jmp    114f <GetCvarFloat+0x1f>
xorps  %xmm0,%xmm0
movss  %xmm0,0xc(%rsp)
mov    %rbx,%rdi
call   1040 <xfree@plt>
movss  0xc(%rsp),%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define float @GetCvarFloat(i8* %0) {
%2 = alloca i8*
%3 = alloca float
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i8* @GetCvar(i8* %5)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strcmp(i8* %7, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%9 = icmp ne i32 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %1
store float 0.000000e+00, float* %3
br label %14
11: ; preds = %1
%12 = load i8*, i8** %4
%13 = call float @atof(i8* %12)
store float %13, float* %3
br label %14
14: ; preds = %11, %10
%15 = load i8*, i8** %4
%16 = call i32 @xfree(i8* %15)
%17 = load float, float* %3
ret float %17
}

LLVM IR (-O2):
define float @GetCvarFloat(i8* %0) {
%2 = tail call i8* @GetCvar(i8* %0)
%3 = load i8, i8* %2
%4 = icmp eq i8 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call float @atof(i8* %2)
br label %7
7: ; preds = %1, %5
%8 = phi float [ %6, %5 ], [ 0.000000e+00, %1 ]
%9 = tail call i32 @xfree(i8* %2)
ret float %8
}
/* Type definitions */
typedef int /*<<< orphan*/ s;

/* Variables and functions */
int /*<<< orphan*/ getchar();
int /*<<< orphan*/ printMaxActivities(int *, int *, int);
int main() {
  int s[] = {1, 3, 0, 5, 8, 5};
  int f[] = {2, 4, 6, 7, 9, 9};
  int n = sizeof(s) / sizeof(s[0]);
  printMaxActivities(s, f, n);
  getchar();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xec4(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xec9(%rip),%rax
mov    %rax,-0x40(%rbp)
mov    0xec6(%rip),%rax
mov    %rax,-0x38(%rbp)
mov    0xec3(%rip),%rax
mov    %rax,-0x30(%rbp)
movl   $0x6,-0x44(%rbp)
lea    -0x20(%rbp),%rdi
lea    -0x40(%rbp),%rsi
mov    -0x44(%rbp),%edx
call   1040 <printMaxActivities@plt>
mov    $0x0,%al
call   1030 <getchar@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x38,%rsp
mov    0xee5(%rip),%rax
mov    %rax,0x30(%rsp)
movaps 0xec9(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
mov    0xeed(%rip),%rax
mov    %rax,0x10(%rsp)
movaps 0xed1(%rip),%xmm0
movaps %xmm0,(%rsp)
lea    0x20(%rsp),%rdi
mov    %rsp,%rsi
mov    $0x6,%edx
call   1040 <printMaxActivities@plt>
xor    %eax,%eax
call   1030 <getchar@plt>
xor    %eax,%eax
add    $0x38,%rsp
ret

LLVM IR (-O0):
@__const.main.s = [6 x i32] [i32 1, i32 3, i32 0, i32 5, i32 8, i32 5]
@__const.main.f = [6 x i32] [i32 2, i32 4, i32 6, i32 7, i32 9, i32 9]
define i32 @main() {
%1 = alloca i32
%2 = alloca [6 x i32]
%3 = alloca [6 x i32]
%4 = alloca i32
store i32 0, i32* %1
%5 = bitcast [6 x i32]* %2 to i8*
%6 = bitcast [6 x i32]* %3 to i8*
store i32 6, i32* %4
%7 = getelementptr inbounds [6 x i32], [6 x i32]* %2, i64 0, i64 0
%8 = getelementptr inbounds [6 x i32], [6 x i32]* %3, i64 0, i64 0
%9 = load i32, i32* %4
%10 = call i32 @printMaxActivities(i32* %7, i32* %8, i32 %9)
%11 = call i32 (...) @getchar()
ret i32 0
}

LLVM IR (-O2):
@__const.main.s = [6 x i32] [i32 1, i32 3, i32 0, i32 5, i32 8, i32 5]
@__const.main.f = [6 x i32] [i32 2, i32 4, i32 6, i32 7, i32 9, i32 9]
define i32 @main() {
%1 = alloca [6 x i32]
%2 = alloca [6 x i32]
%3 = bitcast [6 x i32]* %1 to i8*
%4 = bitcast [6 x i32]* %2 to i8*
%5 = getelementptr inbounds [6 x i32], [6 x i32]* %1, i64 0, i64 0
%6 = getelementptr inbounds [6 x i32], [6 x i32]* %2, i64 0, i64 0
%7 = call i32 @printMaxActivities(i32* %5, i32* %6, i32 6)
%8 = call i32 (...) @getchar()
ret i32 0
}