xunge/DecIR huggingface dataset:
/* Variables and functions */
int e(int);
int /*<<< orphan*/ printf(char *, int);
int d(int param1) {
  int g1;
  printf("d(%d)\n", param1);
  g1 = param1;
  if (param1 > 1) {
    g1 = e(param1 - 1);
  }
  return g1;
}


x86 assembly (clang, -O0):
<d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x1,-0x4(%rbp)
jle    1158 <d+0x38>
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1040 <e@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
cmp    $0x2,%ebx
jl     1141 <d+0x21>
add    $0xffffffff,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1040 <e@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"d(%d)\0A\00"
define i32 @d(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = load i32, i32* %2
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = icmp sgt i32 %7, 1
br i1 %8, label %9, label %13
9: ; preds = %1
%10 = load i32, i32* %2
%11 = sub nsw i32 %10, 1
%12 = call i32 @e(i32 %11)
store i32 %12, i32* %3
br label %13
13: ; preds = %9, %1
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
@.str = [7 x i8] c"d(%d)\0A\00"
define i32 @d(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = add nsw i32 %0, -1
%6 = tail call i32 @e(i32 %5)
br label %7
7: ; preds = %4, %1
%8 = phi i32 [ %6, %4 ], [ %0, %1 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ cli();
int /*<<< orphan*/ sleep_on(void *);
int /*<<< orphan*/ sti();
void sleep_on1(void *p) {
  cli();
  sleep_on(p);
  sti();
}


x86 assembly (clang, -O0):
<sleep_on1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1050 <cli@plt>
mov    -0x8(%rbp),%rdi
call   1030 <sleep_on@plt>
mov    $0x0,%al
call   1040 <sti@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleep_on1>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1050 <cli@plt>
mov    %rbx,%rdi
call   1030 <sleep_on@plt>
xor    %eax,%eax
pop    %rbx
jmp    1040 <sti@plt>

LLVM IR (-O0):
define void @sleep_on1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @cli()
%4 = load i8*, i8** %2
%5 = call i32 @sleep_on(i8* %4)
%6 = call i32 (...) @sti()
ret void
}

LLVM IR (-O2):
define void @sleep_on1(i8* %0) {
%2 = tail call i32 (...) @cli()
%3 = tail call i32 @sleep_on(i8* %0)
%4 = tail call i32 (...) @sti()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ write(int, char *, int);
void memory_out() {
  write(2, "virtual memory exhausted\n", 25);
  exit(1);
}


x86 assembly (clang, -O0):
<memory_out>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
lea    0xed0(%rip),%rsi
mov    $0x19,%edx
call   1030 <write@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<memory_out>:
push   %rax
lea    0xed8(%rip),%rsi
mov    $0x2,%edi
mov    $0x19,%edx
call   1030 <write@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [26 x i8] c"virtual memory exhausted\0A\00"
define void @memory_out() {
%1 = call i32 @write(i32 2, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 25)
%2 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [26 x i8] c"virtual memory exhausted\0A\00"
define void @memory_out() {
%1 = tail call i32 @write(i32 2, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 25)
%2 = tail call i32 @exit(i32 1)
unreachable
}
int test_imm_56uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x56 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_56uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x56,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_56uint64_lowword_reg>:
test   $0x56,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_56uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 86
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_56uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 86
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void foo() {
  char str[10];
  str[10 - 1] = 'd';
  str[10] = 'd';
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
movb   $0x64,-0x1(%rbp)
movb   $0x64,0x0(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo() {
%1 = alloca [10 x i8]
%2 = getelementptr inbounds [10 x i8], [10 x i8]* %1, i64 0, i64 9
store i8 100, i8* %2
%3 = getelementptr inbounds [10 x i8], [10 x i8]* %1, i64 0, i64 10
store i8 100, i8* %3
ret void
}

LLVM IR (-O2):
define void @foo() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void priv_alloc_begin(FILE *outfile) { fprintf(outfile, "_PRIV_ALLOC("); }


x86 assembly (clang, -O0):
<priv_alloc_begin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<priv_alloc_begin>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
mov    $0xc,%esi
mov    $0x1,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"_PRIV_ALLOC(\00"
define void @priv_alloc_begin(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"_PRIV_ALLOC(\00"
define void @priv_alloc_begin(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i64 12, i64 1, i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ busy_loop(void *);
void test2(void *userdata) { busy_loop(userdata); }


x86 assembly (clang, -O0):
<test2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <busy_loop@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test2>:
jmp    1030 <busy_loop@plt>

LLVM IR (-O0):
define void @test2(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @busy_loop(i8* %3)
ret void
}

LLVM IR (-O2):
define void @test2(i8* %0) {
%2 = tail call i32 @busy_loop(i8* %0)
ret void
}
double power(double dx, int no) {
  double tmp = 1.0;
  while (no-- > 0)
    tmp *= dx;
  return (tmp);
}


x86 assembly (clang, -O0):
<power>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
movsd  0xeec(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
jle    1141 <power+0x41>
movsd  -0x8(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1119 <power+0x19>
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<power>:
test   %edi,%edi
jle    1134 <power+0x34>
lea    -0x1(%rdi),%eax
mov    %edi,%ecx
and    $0x7,%ecx
je     113d <power+0x3d>
xor    %edx,%edx
movsd  0xee8(%rip),%xmm1
nopl   0x0(%rax,%rax,1)
mulsd  %xmm0,%xmm1
add    $0x1,%edx
cmp    %edx,%ecx
jne    1120 <power+0x20>
sub    %edx,%edi
cmp    $0x7,%eax
jae    114a <power+0x4a>
jmp    1178 <power+0x78>
movsd  0xec4(%rip),%xmm0
ret
movsd  0xebb(%rip),%xmm1
cmp    $0x7,%eax
jb     1178 <power+0x78>
add    $0xffffffff,%edi
nopl   (%rax)
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
add    $0xfffffff8,%edi
cmp    $0xfffffffe,%edi
jb     1150 <power+0x50>
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @power(double %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
%5 = alloca double
store double %0, double* %3
store i32 %1, i32* %4
store double 1.000000e+00, double* %5
br label %6
6: ; preds = %10, %2
%7 = load i32, i32* %4
%8 = add nsw i32 %7, -1
store i32 %8, i32* %4
%9 = icmp sgt i32 %7, 0
br i1 %9, label %10, label %14
10: ; preds = %6
%11 = load double, double* %3
%12 = load double, double* %5
%13 = fmul double %12, %11
store double %13, double* %5
br label %6
14: ; preds = %6
%15 = load double, double* %5
ret double %15
}

LLVM IR (-O2):
define double @power(double %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %35
4: ; preds = %2
%5 = add i32 %1, -1
%6 = and i32 %1, 7
%7 = icmp eq i32 %6, 0
br i1 %7, label %16, label %8
8: ; preds = %4, %8
%9 = phi double [ %13, %8 ], [ 1.000000e+00, %4 ]
%10 = phi i32 [ %12, %8 ], [ %1, %4 ]
%11 = phi i32 [ %14, %8 ], [ 0, %4 ]
%12 = add nsw i32 %10, -1
%13 = fmul double %9, %0
%14 = add i32 %11, 1
%15 = icmp eq i32 %14, %6
br i1 %15, label %16, label %8
16: ; preds = %8, %4
%17 = phi double [ 1.000000e+00, %4 ], [ %13, %8 ]
%18 = phi i32 [ %1, %4 ], [ %12, %8 ]
%19 = phi double [ undef, %4 ], [ %13, %8 ]
%20 = icmp ult i32 %5, 7
br i1 %20, label %35, label %21
21: ; preds = %16, %21
%22 = phi double [ %32, %21 ], [ %17, %16 ]
%23 = phi i32 [ %31, %21 ], [ %18, %16 ]
%24 = fmul double %22, %0
%25 = fmul double %24, %0
%26 = fmul double %25, %0
%27 = fmul double %26, %0
%28 = fmul double %27, %0
%29 = fmul double %28, %0
%30 = fmul double %29, %0
%31 = add nsw i32 %23, -8
%32 = fmul double %30, %0
%33 = add i32 %23, -9
%34 = icmp ult i32 %33, -2
br i1 %34, label %21, label %35
35: ; preds = %16, %21, %2
%36 = phi double [ 1.000000e+00, %2 ], [ %19, %16 ], [ %32, %21 ]
ret double %36
}
void setCSum(unsigned char *packet, unsigned char csum) {
  packet[9] &= 0xf0;
  packet[9] |= csum;
}


x86 assembly (clang, -O0):
<setCSum>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x9(%rax),%ecx
and    $0xf0,%ecx
mov    %cl,0x9(%rax)
movzbl -0x9(%rbp),%edx
mov    -0x8(%rbp),%rax
movzbl 0x9(%rax),%ecx
or     %edx,%ecx
mov    %cl,0x9(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<setCSum>:
mov    0x9(%rdi),%al
and    $0xf0,%al
or     %sil,%al
mov    %al,0x9(%rdi)
ret

LLVM IR (-O0):
define void @setCSum(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 9
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = and i32 %8, 240
%10 = trunc i32 %9 to i8
store i8 %10, i8* %6
%11 = load i8, i8* %4
%12 = zext i8 %11 to i32
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i64 9
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = or i32 %16, %12
%18 = trunc i32 %17 to i8
store i8 %18, i8* %14
ret void
}

LLVM IR (-O2):
define void @setCSum(i8* nocapture %0, i8 zeroext %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 9
%4 = load i8, i8* %3
%5 = and i8 %4, -16
%6 = or i8 %5, %1
store i8 %6, i8* %3
ret void
}
/* Type definitions */
struct rw_semaphore {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __down_write(struct rw_semaphore *);
__attribute__((always_)) void down_write(struct rw_semaphore *sem) {
  do {
    do {
    } while (0);
  } while (0);
  ;
  __down_write(sem);
  ;
}


x86 assembly (clang, -O0):
<down_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
jmp    1121 <down_write+0x11>
jmp    1126 <down_write+0x16>
jmp    112b <down_write+0x1b>
mov    -0x8(%rbp),%rdi
call   1030 <__down_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<down_write>:
jmp    1030 <__down_write@plt>

LLVM IR (-O0):
%struct.rw_semaphore = type { i32 }
define void @down_write(%struct.rw_semaphore* %0) {
%2 = alloca %struct.rw_semaphore*
store %struct.rw_semaphore* %0, %struct.rw_semaphore** %2
br label %3
3: ; preds = %1
br label %4
4: ; preds = %3
br label %5
5: ; preds = %4
br label %6
6: ; preds = %5
%7 = load %struct.rw_semaphore*, %struct.rw_semaphore** %2
%8 = call i32 @__down_write(%struct.rw_semaphore* %7)
ret void
}

LLVM IR (-O2):
%struct.rw_semaphore = type { i32 }
define void @down_write(%struct.rw_semaphore* %0) {
%2 = tail call i32 @__down_write(%struct.rw_semaphore* %0)
ret void
}
int cnss_logger_nl_bcast(struct sk_buff *skb, int portid, int flag) {
  return 0;
}


x86 assembly (clang, -O0):
<cnss_logger_nl_bcast>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cnss_logger_nl_bcast>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.sk_buff = type opaque
define i32 @cnss_logger_nl_bcast(%struct.sk_buff* %0, i32 %1, i32 %2) {
%4 = alloca %struct.sk_buff*
%5 = alloca i32
%6 = alloca i32
store %struct.sk_buff* %0, %struct.sk_buff** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
%struct.sk_buff = type opaque
define i32 @cnss_logger_nl_bcast(%struct.sk_buff* nocapture readnone %0, i32 %1, i32 %2) {
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int same_screen;
};
struct TYPE_4__ {
  TYPE_1__ xcrossing;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xcrossing_same_screen(void *_p, int _v) {
  ((XEvent *)_p)->xcrossing.same_screen = (int)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xcrossing_same_screen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xcrossing_same_screen>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xcrossing_same_screen(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xcrossing_same_screen(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _IONBF;
int /*<<< orphan*/ setvbuf(int /*<<< orphan*/, int /*<<< orphan*/ *,
                           int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
int RunTests(int (*test_func)(void)) {
  setvbuf(stdout, NULL, _IONBF, 0);
  return test_func();
}


x86 assembly (clang, -O0):
<RunTests>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
mov    0x2ebc(%rip),%rax
mov    (%rax),%edx
xor    %eax,%eax
mov    %eax,%esi
xor    %ecx,%ecx
call   1030 <setvbuf@plt>
call   *-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RunTests>:
push   %rbx
mov    %rdi,%rbx
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    0x2ec4(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
xor    %ecx,%ecx
call   1030 <setvbuf@plt>
mov    %rbx,%rax
pop    %rbx
jmp    *%rax

LLVM IR (-O0):
@stdout = global i32 0
@_IONBF = global i32 0
define i32 @RunTests(i32 ()* %0) {
%2 = alloca i32 ()*
store i32 ()* %0, i32 ()** %2
%3 = load i32, i32* @stdout
%4 = load i32, i32* @_IONBF
%5 = call i32 @setvbuf(i32 %3, i32* null, i32 %4, i32 0)
%6 = load i32 ()*, i32 ()** %2
%7 = call i32 %6()
ret i32 %7
}

LLVM IR (-O2):
@stdout = global i32 0
@_IONBF = global i32 0
define i32 @RunTests(i32 ()* nocapture %0) {
%2 = load i32, i32* @stdout
%3 = load i32, i32* @_IONBF
%4 = tail call i32 @setvbuf(i32 %2, i32* null, i32 %3, i32 0)
%5 = tail call i32 %0()
ret i32 %5
}
/* Variables and functions */
double interp2_k_sinc(double);
double interp2_k_tsinc6(double x) {
  double result = 0.0;
  if ((x >= 0.0) && (x < 3.0)) {
    result = interp2_k_sinc(x);
  }
  return result;
}


x86 assembly (clang, -O0):
<interp2_k_tsinc6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1159 <interp2_k_tsinc6+0x49>
movsd  0xec1(%rip),%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    1159 <interp2_k_tsinc6+0x49>
movsd  -0x8(%rbp),%xmm0
call   1030 <interp2_k_sinc@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<interp2_k_tsinc6>:
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     112d <interp2_k_tsinc6+0x1d>
movsd  0xede(%rip),%xmm1
ucomisd %xmm0,%xmm1
jbe    112d <interp2_k_tsinc6+0x1d>
jmp    1030 <interp2_k_sinc@plt>
xorpd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @interp2_k_tsinc6(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
store double 0.000000e+00, double* %3
%4 = load double, double* %2
%5 = fcmp oge double %4, 0.000000e+00
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load double, double* %2
%8 = fcmp olt double %7, 3.000000e+00
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load double, double* %2
%11 = call double @interp2_k_sinc(double %10)
store double %11, double* %3
br label %12
12: ; preds = %9, %6, %1
%13 = load double, double* %3
ret double %13
}

LLVM IR (-O2):
define double @interp2_k_tsinc6(double %0) {
%2 = fcmp oge double %0, 0.000000e+00
%3 = fcmp olt double %0, 3.000000e+00
%4 = and i1 %2, %3
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call double @interp2_k_sinc(double %0)
br label %7
7: ; preds = %5, %1
%8 = phi double [ %6, %5 ], [ 0.000000e+00, %1 ]
ret double %8
}
int mam_get_pos_weight(int pos) {
  int weight = 1;
  while (pos-- > 0) {
    weight *= 2;
  }
  return weight;
}


x86 assembly (clang, -O0):
<mam_get_pos_weight>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
jle    1130 <mam_get_pos_weight+0x30>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <mam_get_pos_weight+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mam_get_pos_weight>:
test   %edi,%edi
jle    1118 <mam_get_pos_weight+0x18>
lea    -0x1(%rdi),%eax
mov    %edi,%ecx
and    $0x7,%ecx
cmp    $0x7,%eax
jae    111e <mam_get_pos_weight+0x1e>
mov    $0x1,%eax
jmp    1138 <mam_get_pos_weight+0x38>
mov    $0x1,%eax
ret
and    $0xfffffff8,%edi
mov    $0x1,%eax
cs nopw 0x0(%rax,%rax,1)
shl    $0x8,%eax
add    $0xfffffff8,%edi
jne    1130 <mam_get_pos_weight+0x30>
test   %ecx,%ecx
je     1147 <mam_get_pos_weight+0x47>
nopl   0x0(%rax)
add    %eax,%eax
add    $0xffffffff,%ecx
jne    1140 <mam_get_pos_weight+0x40>
ret

LLVM IR (-O0):
define i32 @mam_get_pos_weight(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %2
%6 = add nsw i32 %5, -1
store i32 %6, i32* %2
%7 = icmp sgt i32 %5, 0
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32, i32* %3
%10 = mul nsw i32 %9, 2
store i32 %10, i32* %3
br label %4
11: ; preds = %4
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @mam_get_pos_weight(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %25
3: ; preds = %1
%4 = add i32 %0, -1
%5 = and i32 %0, 7
%6 = icmp ult i32 %4, 7
br i1 %6, label %15, label %7
7: ; preds = %3
%8 = and i32 %0, -8
br label %9
9: ; preds = %9, %7
%10 = phi i32 [ 1, %7 ], [ %12, %9 ]
%11 = phi i32 [ 0, %7 ], [ %13, %9 ]
%12 = shl i32 %10, 8
%13 = add i32 %11, 8
%14 = icmp eq i32 %13, %8
br i1 %14, label %15, label %9
15: ; preds = %9, %3
%16 = phi i32 [ undef, %3 ], [ %12, %9 ]
%17 = phi i32 [ 1, %3 ], [ %12, %9 ]
%18 = icmp eq i32 %5, 0
br i1 %18, label %25, label %19
19: ; preds = %15, %19
%20 = phi i32 [ %22, %19 ], [ %17, %15 ]
%21 = phi i32 [ %23, %19 ], [ 0, %15 ]
%22 = shl nsw i32 %20, 1
%23 = add i32 %21, 1
%24 = icmp eq i32 %23, %5
br i1 %24, label %25, label %19
25: ; preds = %15, %19, %1
%26 = phi i32 [ 1, %1 ], [ %16, %15 ], [ %22, %19 ]
ret i32 %26
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
int send(int, char const *, int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char const *);
int sendMessage(int sockfd, const char *content) {
  if (send(sockfd, content, strlen(content), 0) == -1) {
    printf("send \"%s\" eror\n", content);
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<sendMessage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
xor    %ecx,%ecx
call   1040 <send@plt>
cmp    $0xffffffff,%eax
jne    118b <sendMessage+0x5b>
mov    -0x10(%rbp),%rsi
lea    0xe86(%rip),%rdi
call   1050 <printf@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1192 <sendMessage+0x62>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sendMessage>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1030 <strlen@plt>
xor    %r14d,%r14d
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
xor    %ecx,%ecx
call   1040 <send@plt>
cmp    $0xffffffff,%eax
jne    116c <sendMessage+0x3c>
lea    0xea2(%rip),%rdi
mov    %rbx,%rsi
call   1050 <printf@plt>
mov    $0xffffffff,%r14d
mov    %r14d,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [16 x i8] c"send \22%s\22 eror\0A\00"
define i32 @sendMessage(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
%6 = load i32, i32* %4
%7 = load i8*, i8** %5
%8 = load i8*, i8** %5
%9 = call i32 @strlen(i8* %8)
%10 = call i32 @send(i32 %6, i8* %7, i32 %9, i32 0)
%11 = icmp eq i32 %10, -1
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = load i8*, i8** %5
%14 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %13)
store i32 -1, i32* %3
br label %16
15: ; preds = %2
store i32 0, i32* %3
br label %16
16: ; preds = %15, %12
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
@.str = [16 x i8] c"send \22%s\22 eror\0A\00"
define i32 @sendMessage(i32 %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @send(i32 %0, i8* %1, i32 %3, i32 0)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %1)
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ -1, %6 ], [ 0, %2 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ one_complement(char *);
void op_not_a(char rega[], char regb[], char accumulator[], char flags[]) {
  one_complement(rega);
}


x86 assembly (clang, -O0):
<op_not_a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <one_complement@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_not_a>:
jmp    1030 <one_complement@plt>

LLVM IR (-O0):
define void @op_not_a(i8* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %5
%10 = call i32 @one_complement(i8* %9)
ret void
}

LLVM IR (-O2):
define void @op_not_a(i8* %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i8* nocapture readnone %3) {
%5 = tail call i32 @one_complement(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char const *,
                           int /*<<< orphan*/);
int /*<<< orphan*/ opt_err_pfx();
int /*<<< orphan*/ opt_err_sfx();
int /*<<< orphan*/ opt_name();
int /*<<< orphan*/ stderr;
void opt_err(const char *msg) {
  opt_err_pfx();
  fprintf(stderr, msg, opt_name());
  opt_err_sfx();
}


x86 assembly (clang, -O0):
<opt_err>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1050 <opt_err_pfx@plt>
mov    0x2e86(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <opt_name@plt>
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    %eax,%edx
call   1060 <fprintf@plt>
mov    $0x0,%al
call   1040 <opt_err_sfx@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<opt_err>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %eax,%eax
call   1050 <opt_err_pfx@plt>
mov    0x2e8c(%rip),%rax
mov    (%rax),%ebp
xor    %eax,%eax
call   1030 <opt_name@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
call   1060 <fprintf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <opt_err_sfx@plt>

LLVM IR (-O0):
@stderr = global i32 0
define void @opt_err(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @opt_err_pfx()
%4 = load i32, i32* @stderr
%5 = load i8*, i8** %2
%6 = call i32 (...) @opt_name()
%7 = call i32 @fprintf(i32 %4, i8* %5, i32 %6)
%8 = call i32 (...) @opt_err_sfx()
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
define void @opt_err(i8* %0) {
%2 = tail call i32 (...) @opt_err_pfx()
%3 = load i32, i32* @stderr
%4 = tail call i32 (...) @opt_name()
%5 = tail call i32 @fprintf(i32 %3, i8* %0, i32 %4)
%6 = tail call i32 (...) @opt_err_sfx()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assume(int);
int /*<<< orphan*/ bound_var(int);
int /*<<< orphan*/ bounding_var(int);
void main() {
  int n, h;
  int i, j, k, m;
  bound_var(h);
  bounding_var(n);
  assume(n >= 0);
  assume(n <= 200);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%edi
call   1030 <bound_var@plt>
mov    -0x4(%rbp),%edi
call   1040 <bounding_var@plt>
cmpl   $0x0,-0x4(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assume@plt>
cmpl   $0xc8,-0x4(%rbp)
setle  %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assume@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <bound_var@plt>
call   1040 <bounding_var@plt>
mov    $0x1,%edi
call   1050 <assume@plt>
mov    $0x1,%edi
pop    %rax
jmp    1050 <assume@plt>

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = load i32, i32* %2
%8 = call i32 @bound_var(i32 %7)
%9 = load i32, i32* %1
%10 = call i32 @bounding_var(i32 %9)
%11 = load i32, i32* %1
%12 = icmp sge i32 %11, 0
%13 = zext i1 %12 to i32
%14 = call i32 @assume(i32 %13)
%15 = load i32, i32* %1
%16 = icmp sle i32 %15, 200
%17 = zext i1 %16 to i32
%18 = call i32 @assume(i32 %17)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @bound_var(i32 undef)
%2 = tail call i32 @bounding_var(i32 undef)
%3 = tail call i32 @assume(i32 1)
%4 = tail call i32 @assume(i32 1)
ret void
}
int peek(const char **pp) {
  while (**pp == ' ')
    (*pp)++;
  return **pp;
}


x86 assembly (clang, -O0):
<peek>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
jne    112e <peek+0x2e>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
jmp    1108 <peek+0x8>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<peek>:
mov    (%rdi),%rax
mov    (%rax),%cl
cmp    $0x20,%cl
jne    111f <peek+0x1f>
add    $0x1,%rax
xchg   %ax,%ax
mov    %rax,(%rdi)
movzbl (%rax),%ecx
add    $0x1,%rax
cmp    $0x20,%cl
je     1110 <peek+0x10>
movsbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @peek(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
br label %3
3: ; preds = %9, %1
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 32
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = load i8**, i8*** %2
%11 = load i8*, i8** %10
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %10
br label %3
13: ; preds = %3
%14 = load i8**, i8*** %2
%15 = load i8*, i8** %14
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
define i32 @peek(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = load i8, i8* %2
%4 = icmp eq i8 %3, 32
br i1 %4, label %5, label %10
5: ; preds = %1, %5
%6 = phi i8* [ %7, %5 ], [ %2, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
store i8* %7, i8** %0
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, 32
br i1 %9, label %5, label %10
10: ; preds = %5, %1
%11 = phi i8 [ %3, %1 ], [ %8, %5 ]
%12 = sext i8 %11 to i32
ret i32 %12
}
int pdb_get_version_release(void) { return 0; }


x86 assembly (clang, -O0):
<pdb_get_version_release>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pdb_get_version_release>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pdb_get_version_release() {
ret i32 0
}

LLVM IR (-O2):
define i32 @pdb_get_version_release() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ FP_OP_MEM(int);
int /*<<< orphan*/ addbyte(int);
void FP_OP_S(int op) {
  addbyte(0x66);
  addbyte(0x0f);
  addbyte(0x6e);
  addbyte(0xc8);
  addbyte(0xf3);
  addbyte(0x0f);
  addbyte(0x5a);
  addbyte(0xc9);
  FP_OP_MEM(op);
}


x86 assembly (clang, -O0):
<FP_OP_S>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x66,%edi
call   1040 <addbyte@plt>
mov    $0xf,%edi
call   1040 <addbyte@plt>
mov    $0x6e,%edi
call   1040 <addbyte@plt>
mov    $0xc8,%edi
call   1040 <addbyte@plt>
mov    $0xf3,%edi
call   1040 <addbyte@plt>
mov    $0xf,%edi
call   1040 <addbyte@plt>
mov    $0x5a,%edi
call   1040 <addbyte@plt>
mov    $0xc9,%edi
call   1040 <addbyte@plt>
mov    -0x4(%rbp),%edi
call   1030 <FP_OP_MEM@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FP_OP_S>:
push   %rbx
mov    %edi,%ebx
mov    $0x66,%edi
call   1040 <addbyte@plt>
mov    $0xf,%edi
call   1040 <addbyte@plt>
mov    $0x6e,%edi
call   1040 <addbyte@plt>
mov    $0xc8,%edi
call   1040 <addbyte@plt>
mov    $0xf3,%edi
call   1040 <addbyte@plt>
mov    $0xf,%edi
call   1040 <addbyte@plt>
mov    $0x5a,%edi
call   1040 <addbyte@plt>
mov    $0xc9,%edi
call   1040 <addbyte@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <FP_OP_MEM@plt>

LLVM IR (-O0):
define void @FP_OP_S(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @addbyte(i32 102)
%4 = call i32 @addbyte(i32 15)
%5 = call i32 @addbyte(i32 110)
%6 = call i32 @addbyte(i32 200)
%7 = call i32 @addbyte(i32 243)
%8 = call i32 @addbyte(i32 15)
%9 = call i32 @addbyte(i32 90)
%10 = call i32 @addbyte(i32 201)
%11 = load i32, i32* %2
%12 = call i32 @FP_OP_MEM(i32 %11)
ret void
}

LLVM IR (-O2):
define void @FP_OP_S(i32 %0) {
%2 = tail call i32 @addbyte(i32 102)
%3 = tail call i32 @addbyte(i32 15)
%4 = tail call i32 @addbyte(i32 110)
%5 = tail call i32 @addbyte(i32 200)
%6 = tail call i32 @addbyte(i32 243)
%7 = tail call i32 @addbyte(i32 15)
%8 = tail call i32 @addbyte(i32 90)
%9 = tail call i32 @addbyte(i32 201)
%10 = tail call i32 @FP_OP_MEM(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ port_outb(int, int /*<<< orphan*/);
void port_wait() { port_outb(0x80, 0); }


x86 assembly (clang, -O0):
<port_wait>:
push   %rbp
mov    %rsp,%rbp
mov    $0x80,%edi
xor    %esi,%esi
call   1030 <port_outb@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<port_wait>:
mov    $0x80,%edi
xor    %esi,%esi
jmp    1030 <port_outb@plt>

LLVM IR (-O0):
define void @port_wait() {
%1 = call i32 @port_outb(i32 128, i32 0)
ret void
}

LLVM IR (-O2):
define void @port_wait() {
%1 = tail call i32 @port_outb(i32 128, i32 0)
ret void
}
void PiComs_DisableInt(void) {}


x86 assembly (clang, -O0):
<PiComs_DisableInt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PiComs_DisableInt>:
ret

LLVM IR (-O0):
define void @PiComs_DisableInt() {
ret void
}

LLVM IR (-O2):
define void @PiComs_DisableInt() {
ret void
}
__attribute__((type_annotate("tainted"))) int i(int p) { return p; }


x86 assembly (clang, -O0):
<i>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<i>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @i(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @i(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage() {
  fprintf(stderr, "Usage:\n"
                  "  fleet <file> [arg...]\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [32 x i8] c"Usage:\0A fleet <file> [arg...]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [32 x i8] c"Usage:\0A fleet <file> [arg...]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ emit_cmovl_imm(int /*<<< orphan*/, int);
int /*<<< orphan*/ emit_cmpimm(int, int);
int /*<<< orphan*/ emit_movimm(int, int);
void emit_set_gz32(int rs, int rt) {
  emit_cmpimm(rs, 1);
  emit_movimm(1, rt);
  emit_cmovl_imm(0, rt);
}


x86 assembly (clang, -O0):
<emit_set_gz32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <emit_cmpimm@plt>
mov    -0x8(%rbp),%esi
mov    $0x1,%edi
call   1050 <emit_movimm@plt>
mov    -0x8(%rbp),%esi
xor    %edi,%edi
call   1040 <emit_cmovl_imm@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_set_gz32>:
push   %rbx
mov    %esi,%ebx
mov    $0x1,%esi
call   1030 <emit_cmpimm@plt>
mov    $0x1,%edi
mov    %ebx,%esi
call   1050 <emit_movimm@plt>
xor    %edi,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1040 <emit_cmovl_imm@plt>

LLVM IR (-O0):
define void @emit_set_gz32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @emit_cmpimm(i32 %5, i32 1)
%7 = load i32, i32* %4
%8 = call i32 @emit_movimm(i32 1, i32 %7)
%9 = load i32, i32* %4
%10 = call i32 @emit_cmovl_imm(i32 0, i32 %9)
ret void
}

LLVM IR (-O2):
define void @emit_set_gz32(i32 %0, i32 %1) {
%3 = tail call i32 @emit_cmpimm(i32 %0, i32 1)
%4 = tail call i32 @emit_movimm(i32 1, i32 %1)
%5 = tail call i32 @emit_cmovl_imm(i32 0, i32 %1)
ret void
}
unsigned char *cs_toArray(unsigned short value) {
  static unsigned char result[2];
  result[0] = (unsigned short)(value >> 8);
  result[1] = (unsigned short)(value >> 0);
  return result;
}


x86 assembly (clang, -O0):
<cs_toArray>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
sar    $0x8,%eax
mov    %al,0x2f09(%rip)
movzwl -0x2(%rbp),%eax
sar    $0x0,%eax
mov    %al,0x2efd(%rip)
lea    0x2ef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cs_toArray>:
lea    0x2f1a(%rip),%rax
rol    $0x8,%di
mov    %di,0x2f0f(%rip)
ret

LLVM IR (-O0):
@cs_toArray.result = internal global [2 x i8] zeroinitializer
define i8* @cs_toArray(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = ashr i32 %4, 8
%6 = trunc i32 %5 to i16
%7 = trunc i16 %6 to i8
store i8 %7, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @cs_toArray.result, i64 0, i64 0)
%8 = load i16, i16* %2
%9 = zext i16 %8 to i32
%10 = ashr i32 %9, 0
%11 = trunc i32 %10 to i16
%12 = trunc i16 %11 to i8
store i8 %12, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @cs_toArray.result, i64 0, i64 1)
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @cs_toArray.result, i64 0, i64 0)
}

LLVM IR (-O2):
@cs_toArray.result = internal global [2 x i8] zeroinitializer
define i8* @cs_toArray(i16 zeroext %0) {
%2 = lshr i16 %0, 8
%3 = trunc i16 %2 to i8
store i8 %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @cs_toArray.result, i64 0, i64 0)
%4 = trunc i16 %0 to i8
store i8 %4, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @cs_toArray.result, i64 0, i64 1)
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @cs_toArray.result, i64 0, i64 0)
}
char *tmpnam(char *ptr) {
  printf("tmpnam error");
  return ((void *)0);
}


x86 assembly (clang, -O0):
<tmpnam>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tmpnam>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"tmpnam error\00"
define i8* @tmpnam(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i8* null
}

LLVM IR (-O2):
@.str = [13 x i8] c"tmpnam error\00"
define noalias i8* @tmpnam(i8* nocapture readnone %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ test_parser_sourcefile(char *, char *);
int /*<<< orphan*/ test_parser_verify_entity(int /*<<< orphan*/, char *,
                                             char *);
void test_eiffel_comment_entities() {
  test_parser_verify_entity(test_parser_sourcefile("eiffel", " --comment"),
                            "comment", "--comment");
}


x86 assembly (clang, -O0):
<test_eiffel_comment_entities>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xed5(%rip),%rsi
call   1030 <test_parser_sourcefile@plt>
mov    %eax,%edi
lea    0xeca(%rip),%rsi
lea    0xec1(%rip),%rdx
call   1040 <test_parser_verify_entity@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_eiffel_comment_entities>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xed8(%rip),%rsi
call   1030 <test_parser_sourcefile@plt>
lea    0xecf(%rip),%rsi
lea    0xec6(%rip),%rdx
mov    %eax,%edi
pop    %rax
jmp    1040 <test_parser_verify_entity@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"eiffel\00"
@.str.1 = [11 x i8] c" --comment\00"
@.str.2 = [8 x i8] c"comment\00"
@.str.3 = [10 x i8] c"--comment\00"
define void @test_eiffel_comment_entities() {
%1 = call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%2 = call i32 @test_parser_verify_entity(i32 %1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"eiffel\00"
@.str.1 = [11 x i8] c" --comment\00"
@.str.2 = [8 x i8] c"comment\00"
@.str.3 = [10 x i8] c"--comment\00"
define void @test_eiffel_comment_entities() {
%1 = tail call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @test_parser_verify_entity(i32 %1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0))
ret void
}
/* Variables and functions */
int test();
void main() { volatile int res = test(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <test@plt>
mov    %eax,-0x4(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test@plt>
mov    %eax,0x4(%rsp)
pop    %rax
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = call i32 (...) @test()
store volatile i32 %2, i32* %1
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 (...) @test()
store volatile i32 %3, i32* %1
ret void
}
int D(int x) { return (x << 4) - (x << 7); }


x86 assembly (clang, -O0):
<D>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x4,%eax
mov    -0x4(%rbp),%ecx
shl    $0x7,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<D>:
imul   $0xffffff90,%edi,%eax
ret

LLVM IR (-O0):
define i32 @D(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 4
%5 = load i32, i32* %2
%6 = shl i32 %5, 7
%7 = sub nsw i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @D(i32 %0) {
%2 = mul i32 %0, -112
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ test_hello_world_fail();
int /*<<< orphan*/ test_hello_world_success();
int main() {
  test_hello_world_success();
  test_hello_world_fail();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <test_hello_world_success@plt>
mov    $0x0,%al
call   1030 <test_hello_world_fail@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <test_hello_world_success@plt>
xor    %eax,%eax
call   1030 <test_hello_world_fail@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_hello_world_success()
%3 = call i32 (...) @test_hello_world_fail()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_hello_world_success()
%2 = tail call i32 (...) @test_hello_world_fail()
ret i32 0
}
void glmCopyQuaternionf(const float source[4], float target[4]) {
  target[0] = source[0];
  target[1] = source[1];
  target[2] = source[2];
  target[3] = source[3];
}


x86 assembly (clang, -O0):
<glmCopyQuaternionf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,0x4(%rax)
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
movss  0xc(%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmCopyQuaternionf>:
movss  (%rdi),%xmm0
movss  %xmm0,(%rsi)
movss  0x4(%rdi),%xmm0
movss  %xmm0,0x4(%rsi)
movss  0x8(%rdi),%xmm0
movss  %xmm0,0x8(%rsi)
movss  0xc(%rdi),%xmm0
movss  %xmm0,0xc(%rsi)
ret

LLVM IR (-O0):
define void @glmCopyQuaternionf(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = getelementptr inbounds float, float* %5, i64 0
%7 = load float, float* %6
%8 = load float*, float** %4
%9 = getelementptr inbounds float, float* %8, i64 0
store float %7, float* %9
%10 = load float*, float** %3
%11 = getelementptr inbounds float, float* %10, i64 1
%12 = load float, float* %11
%13 = load float*, float** %4
%14 = getelementptr inbounds float, float* %13, i64 1
store float %12, float* %14
%15 = load float*, float** %3
%16 = getelementptr inbounds float, float* %15, i64 2
%17 = load float, float* %16
%18 = load float*, float** %4
%19 = getelementptr inbounds float, float* %18, i64 2
store float %17, float* %19
%20 = load float*, float** %3
%21 = getelementptr inbounds float, float* %20, i64 3
%22 = load float, float* %21
%23 = load float*, float** %4
%24 = getelementptr inbounds float, float* %23, i64 3
store float %22, float* %24
ret void
}

LLVM IR (-O2):
define void @glmCopyQuaternionf(float* nocapture %0, float* nocapture writeonly %1) {
%3 = load float, float* %0
store float %3, float* %1
%4 = getelementptr inbounds float, float* %0, i64 1
%5 = load float, float* %4
%6 = getelementptr inbounds float, float* %1, i64 1
store float %5, float* %6
%7 = getelementptr inbounds float, float* %0, i64 2
%8 = load float, float* %7
%9 = getelementptr inbounds float, float* %1, i64 2
store float %8, float* %9
%10 = getelementptr inbounds float, float* %0, i64 3
%11 = load float, float* %10
%12 = getelementptr inbounds float, float* %1, i64 3
store float %11, float* %12
ret void
}
/* Variables and functions */
size_t round_to_multiple(size_t n, size_t multiple) {
  if (n % multiple != 0) {
    n += multiple - (n % multiple);
  }
  return n;
}


x86 assembly (clang, -O0):
<round_to_multiple>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
cmp    $0x0,%rdx
je     1145 <round_to_multiple+0x45>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
mov    -0x18(%rbp),%rax
sub    %rdx,%rax
add    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_to_multiple>:
mov    %rdi,%rax
or     %rsi,%rax
shr    $0x20,%rax
je     1116 <round_to_multiple+0x16>
mov    %rdi,%rax
xor    %edx,%edx
div    %rsi
jmp    111c <round_to_multiple+0x1c>
mov    %edi,%eax
xor    %edx,%edx
div    %esi
sub    %rdx,%rsi
test   %rdx,%rdx
cmove  %rdx,%rsi
add    %rdi,%rsi
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @round_to_multiple(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = urem i64 %5, %6
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %2
%10 = load i64, i64* %4
%11 = load i64, i64* %3
%12 = load i64, i64* %4
%13 = urem i64 %11, %12
%14 = sub i64 %10, %13
%15 = load i64, i64* %3
%16 = add i64 %15, %14
store i64 %16, i64* %3
br label %17
17: ; preds = %9, %2
%18 = load i64, i64* %3
ret i64 %18
}

LLVM IR (-O2):
define i64 @round_to_multiple(i64 %0, i64 %1) {
%3 = urem i64 %0, %1
%4 = icmp eq i64 %3, 0
%5 = sub i64 %1, %3
%6 = select i1 %4, i64 0, i64 %5
%7 = add i64 %6, %0
ret i64 %7
}