unsigned int
adcEnable(const unsigned int sample_time, const unsigned int conversion_mode,
          const unsigned int data_reduction,
          const unsigned int result_interrupt, const unsigned int result_node,
          const unsigned int source_interrupt, const unsigned int source_node,
          const unsigned int trigger_level, const unsigned int trigger_input,
          const unsigned int gate_enable, const unsigned int gate_input) {
  scuUngatePeripheralClock((1 << 0));
  if ((*((volatile unsigned int *const)(0x48034000 + 0x008))) >> 8 !=
      0x000099c0) {
    return 1;
  }
  (*((volatile unsigned int *const)(0x48034000 + 0x040))) =
      (1 << 15) | (1 << 1);
  while ((*((volatile unsigned int *const)(0x48034000 + 0x040))) & (1 << 14)) {
  }
  (*((volatile unsigned int *const)(0x48030000 + 0x000))) = (1 << 3);
  unsigned int brsctrl =
      ((1 << 23) | gate_input | (1 << 15) | trigger_level | trigger_input);
  (*((volatile unsigned int *const)(0x48030000 + 0x200))) = brsctrl;
  unsigned int brsmr = ((1 << 8) | source_interrupt | gate_enable);
  if (trigger_level != (0x00 << 13)) {
    brsmr |= (1 << 2);
  }
  (*((volatile unsigned int *const)(0x48030000 + 0x204))) = brsmr;
  (*((volatile unsigned int *const)(0x48030000 + 0x280))) =
      data_reduction | result_interrupt;
  (*((volatile unsigned int *const)(0x48030000 + 0x140))) =
      (result_node << 16) | source_node;
  unsigned int globiclass = conversion_mode | sample_time;
  (*((volatile unsigned int *const)(0x48030000 + 0x0a0))) = globiclass;
  (*((volatile unsigned int *const)(0x48030000 + 0x0a4))) = globiclass;
  adcCalibrate(1);
  return 0;
}


x86 assembly (clang, -O0):
<adcEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0x30(%rbp),%eax
mov    0x28(%rbp),%eax
mov    0x20(%rbp),%eax
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    %r9d,-0x1c(%rbp)
mov    $0x1,%edi
mov    $0x0,%al
call   1040 <scuUngatePeripheralClock@plt>
mov    $0x48034008,%eax
mov    (%rax),%eax
shr    $0x8,%eax
cmp    $0x99c0,%eax
je     1178 <adcEnable+0x58>
movl   $0x1,-0x4(%rbp)
jmp    1240 <adcEnable+0x120>
mov    $0x48034040,%eax
movl   $0x8002,(%rax)
mov    $0x48034040,%eax
mov    (%rax),%eax
and    $0x4000,%eax
cmp    $0x0,%eax
je     119d <adcEnable+0x7d>
jmp    1183 <adcEnable+0x63>
mov    $0x48030000,%eax
movl   $0x8,(%rax)
mov    0x30(%rbp),%eax
or     $0x800000,%eax
or     $0x8000,%eax
or     0x18(%rbp),%eax
or     0x20(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%ecx
mov    $0x48030200,%eax
mov    %ecx,(%rax)
mov    -0x1c(%rbp),%eax
or     $0x100,%eax
or     0x28(%rbp),%eax
mov    %eax,-0x24(%rbp)
cmpl   $0x0,0x18(%rbp)
je     11e9 <adcEnable+0xc9>
mov    -0x24(%rbp),%eax
or     $0x4,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%ecx
mov    $0x48030204,%eax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%ecx
or     -0x14(%rbp),%ecx
mov    $0x48030280,%eax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%ecx
shl    $0x10,%ecx
or     0x10(%rbp),%ecx
mov    $0x48030140,%eax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x28(%rbp),%ecx
mov    $0x480300a0,%eax
mov    %ecx,(%rax)
mov    -0x28(%rbp),%ecx
mov    $0x480300a4,%eax
mov    %ecx,(%rax)
mov    $0x1,%edi
mov    $0x0,%al
call   1030 <adcCalibrate@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<adcEnable>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
mov    %r9d,%r13d
mov    %r8d,%ebp
mov    %ecx,%r15d
mov    %edx,%r12d
mov    %esi,%ebx
mov    %edi,0x4(%rsp)
mov    $0x1,%r14d
mov    $0x1,%edi
xor    %eax,%eax
call   1040 <scuUngatePeripheralClock@plt>
mov    $0xffffff00,%eax
and    0x48034008,%eax
cmp    $0x99c000,%eax
jne    120e <adcEnable+0xee>
mov    0x60(%rsp),%edi
mov    0x58(%rsp),%ecx
mov    0x50(%rsp),%esi
mov    0x48(%rsp),%edx
mov    0x40(%rsp),%eax
movl   $0x8002,0x48034040
cs nopw 0x0(%rax,%rax,1)
nop
testl  $0x4000,0x48034040
jne    1190 <adcEnable+0x70>
movl   $0x8,0x48030000
or     %edx,%esi
or     %edi,%esi
or     $0x808000,%esi
mov    %esi,0x48030200
or     %r13d,%ecx
xor    %esi,%esi
test   %edx,%edx
setne  %sil
shl    $0x2,%esi
or     %ecx,%esi
or     $0x100,%esi
mov    %esi,0x48030204
or     %r12d,%r15d
mov    %r15d,0x48030280
48
shl    $0x10,%ebp
or     %eax,%ebp
mov    %ebp,0x48030140
or     0x4(%rsp),%ebx
mov    %ebx,0x480300a0
mov    %ebx,0x480300a4
xor    %r14d,%r14d
mov    $0x1,%edi
xor    %eax,%eax
call   1030 <adcCalibrate@plt>
mov    %r14d,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @adcEnable(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9, i32 %10) {
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
%17 = alloca i32
%18 = alloca i32
%19 = alloca i32
%20 = alloca i32
%21 = alloca i32
%22 = alloca i32
%23 = alloca i32
%24 = alloca i32
%25 = alloca i32
%26 = alloca i32
store i32 %0, i32* %13
store i32 %1, i32* %14
store i32 %2, i32* %15
store i32 %3, i32* %16
store i32 %4, i32* %17
store i32 %5, i32* %18
store i32 %6, i32* %19
store i32 %7, i32* %20
store i32 %8, i32* %21
store i32 %9, i32* %22
store i32 %10, i32* %23
%27 = call i32 (i32, ...) bitcast (i32 (...)* @scuUngatePeripheralClock to i32 (i32, ...)*)(i32 1)
%28 = load volatile i32, i32* inttoptr (i64 1208172552 to i32*)
%29 = lshr i32 %28, 8
%30 = icmp ne i32 %29, 39360
br i1 %30, label %31, label %32
31: ; preds = %11
store i32 1, i32* %12
br label %71
32: ; preds = %11
store volatile i32 32770, i32* inttoptr (i64 1208172608 to i32*)
br label %33
33: ; preds = %37, %32
%34 = load volatile i32, i32* inttoptr (i64 1208172608 to i32*)
%35 = and i32 %34, 16384
%36 = icmp ne i32 %35, 0
br i1 %36, label %37, label %38
37: ; preds = %33
br label %33
38: ; preds = %33
store volatile i32 8, i32* inttoptr (i64 1208156160 to i32*)
%39 = load i32, i32* %23
%40 = or i32 8388608, %39
%41 = or i32 %40, 32768
%42 = load i32, i32* %20
%43 = or i32 %41, %42
%44 = load i32, i32* %21
%45 = or i32 %43, %44
store i32 %45, i32* %24
%46 = load i32, i32* %24
store volatile i32 %46, i32* inttoptr (i64 1208156672 to i32*)
%47 = load i32, i32* %18
%48 = or i32 256, %47
%49 = load i32, i32* %22
%50 = or i32 %48, %49
store i32 %50, i32* %25
%51 = load i32, i32* %20
%52 = icmp ne i32 %51, 0
br i1 %52, label %53, label %56
53: ; preds = %38
%54 = load i32, i32* %25
%55 = or i32 %54, 4
store i32 %55, i32* %25
br label %56
56: ; preds = %53, %38
%57 = load i32, i32* %25
store volatile i32 %57, i32* inttoptr (i64 1208156676 to i32*)
%58 = load i32, i32* %15
%59 = load i32, i32* %16
%60 = or i32 %58, %59
store volatile i32 %60, i32* inttoptr (i64 1208156800 to i32*)
%61 = load i32, i32* %17
%62 = shl i32 %61, 16
%63 = load i32, i32* %19
%64 = or i32 %62, %63
store volatile i32 %64, i32* inttoptr (i64 1208156480 to i32*)
%65 = load i32, i32* %14
%66 = load i32, i32* %13
%67 = or i32 %65, %66
store i32 %67, i32* %26
%68 = load i32, i32* %26
store volatile i32 %68, i32* inttoptr (i64 1208156320 to i32*)
%69 = load i32, i32* %26
store volatile i32 %69, i32* inttoptr (i64 1208156324 to i32*)
%70 = call i32 (i32, ...) bitcast (i32 (...)* @adcCalibrate to i32 (i32, ...)*)(i32 1)
store i32 0, i32* %12
br label %71
71: ; preds = %56, %31
%72 = load i32, i32* %12
ret i32 %72
}

LLVM IR (-O2):
define i32 @adcEnable(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9, i32 %10) {
%12 = tail call i32 (i32, ...) bitcast (i32 (...)* @scuUngatePeripheralClock to i32 (i32, ...)*)(i32 1)
%13 = load volatile i32, i32* inttoptr (i64 1208172552 to i32*)
%14 = and i32 %13, -256
%15 = icmp eq i32 %14, 10076160
br i1 %15, label %16, label %34
16: ; preds = %11
store volatile i32 32770, i32* inttoptr (i64 1208172608 to i32*)
br label %17
17: ; preds = %17, %16
%18 = load volatile i32, i32* inttoptr (i64 1208172608 to i32*)
%19 = and i32 %18, 16384
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %17
21: ; preds = %17
store volatile i32 8, i32* inttoptr (i64 1208156160 to i32*)
%22 = or i32 %7, %8
%23 = or i32 %22, %10
%24 = or i32 %23, 8421376
store volatile i32 %24, i32* inttoptr (i64 1208156672 to i32*)
%25 = or i32 %9, %5
%26 = icmp eq i32 %7, 0
%27 = select i1 %26, i32 256, i32 260
%28 = or i32 %25, %27
store volatile i32 %28, i32* inttoptr (i64 1208156676 to i32*)
%29 = or i32 %3, %2
store volatile i32 %29, i32* inttoptr (i64 1208156800 to i32*)
%30 = shl i32 %4, 16
%31 = or i32 %30, %6
store volatile i32 %31, i32* inttoptr (i64 1208156480 to i32*)
%32 = or i32 %1, %0
store volatile i32 %32, i32* inttoptr (i64 1208156320 to i32*)
store volatile i32 %32, i32* inttoptr (i64 1208156324 to i32*)
%33 = tail call i32 (i32, ...) bitcast (i32 (...)* @adcCalibrate to i32 (i32, ...)*)(i32 1)
br label %34
34: ; preds = %11, %21
%35 = phi i32 [ 0, %21 ], [ 1, %11 ]
ret i32 %35
}