xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ sys_print(char *);
int main(void) {
  unsigned int i;
  while (1) {
    sys_print("Hello, I'm dummy2!\n");
    for (i = 0; i < 9999999; i++)
      ;
  }
  return 4;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <sys_print@plt>
movl   $0x0,-0x8(%rbp)
cmpl   $0x98967f,-0x8(%rbp)
jae    1152 <main+0x42>
jmp    1144 <main+0x34>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1132 <main+0x22>
jmp    111f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <sys_print@plt>
jmp    1120 <main+0x10>

LLVM IR (-O0):
@.str = [20 x i8] c"Hello, I'm dummy2!\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %0, %12
%4 = call i32 @sys_print(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
store i32 0, i32* %2
br label %5
5: ; preds = %9, %3
%6 = load i32, i32* %2
%7 = icmp ult i32 %6, 9999999
br i1 %7, label %8, label %12
8: ; preds = %5
br label %9
9: ; preds = %8
%10 = load i32, i32* %2
%11 = add i32 %10, 1
store i32 %11, i32* %2
br label %5
12: ; preds = %5
br label %3
}

LLVM IR (-O2):
@.str = [20 x i8] c"Hello, I'm dummy2!\0A\00"
define i32 @main() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @sys_print(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
br label %1
}
void skipChar(const char **source, char c) {
  while (**source == c)
    ++*source;
}


x86 assembly (clang, -O0):
<skipChar>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jne    1137 <skipChar+0x37>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
jmp    110e <skipChar+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<skipChar>:
mov    (%rdi),%rax
cmp    %sil,(%rax)
jne    111f <skipChar+0x1f>
add    $0x1,%rax
nopl   0x0(%rax)
mov    %rax,(%rdi)
lea    0x1(%rax),%rcx
cmp    %sil,(%rax)
mov    %rcx,%rax
je     1110 <skipChar+0x10>
ret

LLVM IR (-O0):
define void @skipChar(i8** %0, i8 signext %1) {
%3 = alloca i8**
%4 = alloca i8
store i8** %0, i8*** %3
store i8 %1, i8* %4
br label %5
5: ; preds = %13, %2
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %6
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i8, i8* %4
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %9, %11
br i1 %12, label %13, label %17
13: ; preds = %5
%14 = load i8**, i8*** %3
%15 = load i8*, i8** %14
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %14
br label %5
17: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @skipChar(i8** nocapture %0, i8 signext %1) {
%3 = load i8*, i8** %0
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, %1
br i1 %5, label %6, label %11
6: ; preds = %2, %6
%7 = phi i8* [ %8, %6 ], [ %3, %2 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
store i8* %8, i8** %0
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, %1
br i1 %10, label %6, label %11
11: ; preds = %6, %2
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ _UARTBaseValid(int);
void UARTCharPut(uint32_t ui32Base, unsigned char ucData) {
  ASSERT(_UARTBaseValid(ui32Base));
  while ((*((volatile uint32_t *)(ui32Base + 0x00000018))) & 0x00000020) {
  }
  (*((volatile uint32_t *)(ui32Base + 0x00000000))) = ucData;
}


x86 assembly (clang, -O0):
<UARTCharPut>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x18,%eax
cltq
mov    (%rax),%eax
and    $0x20,%eax
cmp    $0x0,%eax
je     115b <UARTCharPut+0x3b>
jmp    1140 <UARTCharPut+0x20>
movzbl -0x5(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x0,%eax
cltq
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTCharPut>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
movslq %ebp,%rax
cs nopw 0x0(%rax,%rax,1)
testl  $0x20,0x18(%rax)
jne    1140 <UARTCharPut+0x20>
movzbl %bl,%ecx
mov    %ecx,(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @UARTCharPut(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
%5 = load i32, i32* %3
%6 = call i32 @_UARTBaseValid(i32 %5)
%7 = call i32 @ASSERT(i32 %6)
br label %8
8: ; preds = %16, %2
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 24
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
%13 = load volatile i32, i32* %12
%14 = and i32 %13, 32
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %8
br label %8
17: ; preds = %8
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 0
%22 = sext i32 %21 to i64
%23 = inttoptr i64 %22 to i32*
store volatile i32 %19, i32* %23
ret void
}

LLVM IR (-O2):
define void @UARTCharPut(i32 %0, i8 zeroext %1) {
%3 = tail call i32 @_UARTBaseValid(i32 %0)
%4 = tail call i32 @ASSERT(i32 %3)
%5 = add nsw i32 %0, 24
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
br label %8
8: ; preds = %8, %2
%9 = load volatile i32, i32* %7
%10 = and i32 %9, 32
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %8
12: ; preds = %8
%13 = zext i8 %1 to i32
%14 = sext i32 %0 to i64
%15 = inttoptr i64 %14 to i32*
store volatile i32 %13, i32* %15
ret void
}
void board_putc(int ch) {
  while (((*(volatile unsigned int *)(0xb0000c00 + 4 * (7))) & 0x20) == 0)
    ;
  *(volatile unsigned int *)(0xb0000c00 + 4 * (1)) = (ch);
  while (((*(volatile unsigned int *)(0xb0000c00 + 4 * (7))) & 0x20) == 0)
    ;
}


x86 assembly (clang, -O0):
<board_putc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xb0000c1c,%eax
mov    (%rax),%eax
and    $0x20,%eax
cmp    $0x0,%eax
jne    111f <board_putc+0x1f>
jmp    1107 <board_putc+0x7>
mov    -0x4(%rbp),%ecx
mov    $0xb0000c04,%eax
mov    %ecx,(%rax)
mov    $0xb0000c1c,%eax
mov    (%rax),%eax
and    $0x20,%eax
cmp    $0x0,%eax
jne    1141 <board_putc+0x41>
jmp    1129 <board_putc+0x29>
pop    %rbp
ret

x86 assembly (clang, -O2):
<board_putc>:
mov    $0xb0000c1c,%eax
cs nopw 0x0(%rax,%rax,1)
nop
testl  $0x20,(%rax)
je     1110 <board_putc+0x10>
mov    %edi,-0x18(%rax)
nopl   0x0(%rax,%rax,1)
testl  $0x20,(%rax)
je     1120 <board_putc+0x20>
ret

LLVM IR (-O0):
define void @board_putc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load volatile i32, i32* inttoptr (i64 2952793116 to i32*)
%5 = and i32 %4, 32
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
%9 = load i32, i32* %2
store volatile i32 %9, i32* inttoptr (i64 2952793092 to i32*)
br label %10
10: ; preds = %14, %8
%11 = load volatile i32, i32* inttoptr (i64 2952793116 to i32*)
%12 = and i32 %11, 32
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %10
br label %10
15: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @board_putc(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = load volatile i32, i32* inttoptr (i64 2952793116 to i32*)
%4 = and i32 %3, 32
%5 = icmp eq i32 %4, 0
br i1 %5, label %2, label %6
6: ; preds = %2
store volatile i32 %0, i32* inttoptr (i64 2952793092 to i32*)
br label %7
7: ; preds = %7, %6
%8 = load volatile i32, i32* inttoptr (i64 2952793116 to i32*)
%9 = and i32 %8, 32
%10 = icmp eq i32 %9, 0
br i1 %10, label %7, label %11
11: ; preds = %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ errorf(char *, int, char *, char *);
scalar_t__ strcmp(char *, char *);
void parse_m_arg(char *s) {
  if (strcmp(s, "64"))
    errorf("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
           "2022-01-22/02-19-57/repos/zhuzhaoyuan/8cc/refs/heads/master/main.c",
           114, "Only 64 is allowed for -m, but got %s", s);
}


x86 assembly (clang, -O0):
<parse_m_arg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec9(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
je     1162 <parse_m_arg+0x42>
mov    -0x8(%rbp),%rcx
lea    0xeb2(%rip),%rdi
mov    $0x72,%esi
lea    0xf29(%rip),%rdx
call   1040 <errorf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_m_arg>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rsi
call   1030 <strcmp@plt>
test   %rax,%rax
je     1151 <parse_m_arg+0x31>
lea    0xec7(%rip),%rdi
lea    0xf43(%rip),%rdx
mov    $0x72,%esi
mov    %rbx,%rcx
pop    %rbx
jmp    1040 <errorf@plt>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"64\00"
@.str.1 = [131 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/zhuzhaoyuan/8cc/refs/heads/master/main.c\00"
@.str.2 = [38 x i8] c"Only 64 is allowed for -m, but got %s\00"
define void @parse_m_arg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @strcmp(i8* %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i32 @errorf(i8* getelementptr inbounds ([131 x i8], [131 x i8]* @.str.1, i64 0, i64 0), i32 114, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.2, i64 0, i64 0), i8* %7)
br label %9
9: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"64\00"
@.str.1 = [131 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/zhuzhaoyuan/8cc/refs/heads/master/main.c\00"
@.str.2 = [38 x i8] c"Only 64 is allowed for -m, but got %s\00"
define void @parse_m_arg(i8* %0) {
%2 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @errorf(i8* getelementptr inbounds ([131 x i8], [131 x i8]* @.str.1, i64 0, i64 0), i32 114, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.2, i64 0, i64 0), i8* %0)
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ i430lx_write(int /*<<< orphan*/, int, int,
                                int /*<<< orphan*/ *);
void i430lx_pci_reset(void) { i430lx_write(0, 0x59, 0xf, NULL); }


x86 assembly (clang, -O0):
<i430lx_pci_reset>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0x59,%esi
mov    $0xf,%edx
xor    %eax,%eax
mov    %eax,%ecx
call   1030 <i430lx_write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<i430lx_pci_reset>:
xor    %edi,%edi
mov    $0x59,%esi
mov    $0xf,%edx
xor    %ecx,%ecx
jmp    1030 <i430lx_write@plt>

LLVM IR (-O0):
define void @i430lx_pci_reset() {
%1 = call i32 @i430lx_write(i32 0, i32 89, i32 15, i32* null)
ret void
}

LLVM IR (-O2):
define void @i430lx_pci_reset() {
%1 = tail call i32 @i430lx_write(i32 0, i32 89, i32 15, i32* null)
ret void
}
int *ivector(nl, nh)
int nl, nh;
{
  int *v;
  v = (int *)malloc((unsigned)(nh - nl + 1) * sizeof(int));
  if (!v)
    nrerror("allocation failure in ivector()");
  return v - nl;
}


x86 assembly (clang, -O0):
<ivector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,%eax
mov    %eax,%edi
shl    $0x2,%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1161 <ivector+0x41>
lea    0xea6(%rip),%rdi
mov    $0x0,%al
call   1030 <nrerror@plt>
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rdx
xor    %ecx,%ecx
sub    %rdx,%rcx
shl    $0x2,%rcx
add    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ivector>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
sub    %edi,%esi
lea    0x1(%rsi),%edi
shl    $0x2,%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1149 <ivector+0x29>
lea    0xebe(%rip),%rdi
xor    %eax,%eax
call   1030 <nrerror@plt>
movslq %ebp,%rax
shl    $0x2,%rax
sub    %rax,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [32 x i8] c"allocation failure in ivector()\00"
define i32* @ivector(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = add nsw i32 %8, 1
%10 = zext i32 %9 to i64
%11 = mul i64 %10, 4
%12 = call i8* @malloc(i64 %11)
%13 = bitcast i8* %12 to i32*
store i32* %13, i32** %5
%14 = load i32*, i32** %5
%15 = icmp ne i32* %14, null
br i1 %15, label %18, label %16
16: ; preds = %2
%17 = call i32 (i8*, ...) bitcast (i32 (...)* @nrerror to i32 (i8*, ...)*)(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %18
18: ; preds = %16, %2
%19 = load i32*, i32** %5
%20 = load i32, i32* %3
%21 = sext i32 %20 to i64
%22 = sub i64 0, %21
%23 = getelementptr inbounds i32, i32* %19, i64 %22
ret i32* %23
}

LLVM IR (-O2):
@.str = [32 x i8] c"allocation failure in ivector()\00"
define i32* @ivector(i32 %0, i32 %1) {
%3 = sub i32 1, %0
%4 = add i32 %3, %1
%5 = zext i32 %4 to i64
%6 = shl nuw nsw i64 %5, 2
%7 = tail call i8* @malloc(i64 %6)
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = tail call i32 (i8*, ...) bitcast (i32 (...)* @nrerror to i32 (i8*, ...)*)(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %2
%12 = bitcast i8* %7 to i32*
%13 = sext i32 %0 to i64
%14 = sub nsw i64 0, %13
%15 = getelementptr inbounds i32, i32* %12, i64 %14
ret i32* %15
}
void hugo_stopvideo(void) {}


x86 assembly (clang, -O0):
<hugo_stopvideo>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hugo_stopvideo>:
ret

LLVM IR (-O0):
define void @hugo_stopvideo() {
ret void
}

LLVM IR (-O2):
define void @hugo_stopvideo() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
void print_star(const int size) {
  for (int index = 0; index <= size; index++) {
    putchar('*');
  }
  putchar('\n');
}


x86 assembly (clang, -O0):
<print_star>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     1146 <print_star+0x36>
mov    $0x2a,%edi
call   1030 <putchar@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <print_star+0x12>
mov    $0xa,%edi
call   1030 <putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_star>:
push   %rbx
test   %edi,%edi
js     112f <print_star+0x1f>
mov    %edi,%ebx
add    $0x1,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0x2a,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebx
jne    1120 <print_star+0x10>
mov    $0xa,%edi
pop    %rbx
jmp    1030 <putchar@plt>

LLVM IR (-O0):
define void @print_star(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp sle i32 %5, %6
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = call i32 @putchar(i8 signext 42)
br label %10
10: ; preds = %8
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
%14 = call i32 @putchar(i8 signext 10)
ret void
}

LLVM IR (-O2):
define void @print_star(i32 %0) {
%2 = icmp slt i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %5, %1
%4 = tail call i32 @putchar(i8 signext 10)
ret void
5: ; preds = %1, %5
%6 = phi i32 [ %8, %5 ], [ 0, %1 ]
%7 = tail call i32 @putchar(i8 signext 42)
%8 = add nuw i32 %6, 1
%9 = icmp eq i32 %6, %0
br i1 %9, label %3, label %5
}
void print_fct(const char *fmt, ...) { return; }


x86 assembly (clang, -O0):
<print_fct>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_fct>:
ret

LLVM IR (-O0):
define void @print_fct(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @print_fct(i8* nocapture %0, ...) {
ret void
}
int remove(filename) const char *filename;
{ return __send_to_ppe(0x2100, 26, &filename); }


x86 assembly (clang, -O0):
<remove>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x2100,%edi
mov    $0x1a,%esi
lea    -0x8(%rbp),%rdx
mov    $0x0,%al
call   1030 <__send_to_ppe@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove>:
push   %rax
mov    %rdi,(%rsp)
mov    %rsp,%rdx
mov    $0x2100,%edi
mov    $0x1a,%esi
xor    %eax,%eax
call   1030 <__send_to_ppe@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @remove(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i32, i32, i8**, ...) bitcast (i32 (...)* @__send_to_ppe to i32 (i32, i32, i8**, ...)*)(i32 8448, i32 26, i8** %2)
ret i32 %3
}

LLVM IR (-O2):
define i32 @remove(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i32, i32, i8**, ...) bitcast (i32 (...)* @__send_to_ppe to i32 (i32, i32, i8**, ...)*)(i32 8448, i32 26, i8** %2)
ret i32 %3
}
/* Type definitions */
struct hash {
  int dummy;
};
struct chain {
  int dummy;
};
typedef int /*<<< orphan*/ nameBuf;

/* Variables and functions */
struct chain *hashMustFindVal(struct hash *, char *);
int /*<<< orphan*/ safef(char *, int, char *, int);
struct chain *chainLookup(struct hash *hash, int id) {
  char nameBuf[16];
  safef(nameBuf, sizeof(nameBuf), "%x", id);
  return hashMustFindVal(hash, nameBuf);
}


x86 assembly (clang, -O0):
<chainLookup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0xc(%rbp),%ecx
mov    $0x10,%esi
lea    0xebe(%rip),%rdx
call   1030 <safef@plt>
mov    -0x8(%rbp),%rdi
lea    -0x20(%rbp),%rsi
call   1040 <hashMustFindVal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chainLookup>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %esi,%ecx
mov    %rdi,%rbx
lea    0xecd(%rip),%rdx
mov    %rsp,%r14
mov    %r14,%rdi
mov    $0x10,%esi
call   1030 <safef@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <hashMustFindVal@plt>
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.chain = type { i32 }
%struct.hash = type { i32 }
@.str = [3 x i8] c"%x\00"
define %struct.chain* @chainLookup(%struct.hash* %0, i32 %1) {
%3 = alloca %struct.hash*
%4 = alloca i32
%5 = alloca [16 x i8]
store %struct.hash* %0, %struct.hash** %3
store i32 %1, i32* %4
%6 = getelementptr inbounds [16 x i8], [16 x i8]* %5, i64 0, i64 0
%7 = load i32, i32* %4
%8 = call i32 @safef(i8* %6, i32 16, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = load %struct.hash*, %struct.hash** %3
%10 = getelementptr inbounds [16 x i8], [16 x i8]* %5, i64 0, i64 0
%11 = call %struct.chain* @hashMustFindVal(%struct.hash* %9, i8* %10)
ret %struct.chain* %11
}

LLVM IR (-O2):
%struct.chain = type { i32 }
%struct.hash = type { i32 }
@.str = [3 x i8] c"%x\00"
define %struct.chain* @chainLookup(%struct.hash* %0, i32 %1) {
%3 = alloca [16 x i8]
%4 = getelementptr inbounds [16 x i8], [16 x i8]* %3, i64 0, i64 0
%5 = call i32 @safef(i8* %4, i32 16, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %1)
%6 = call %struct.chain* @hashMustFindVal(%struct.hash* %0, i8* %4)
ret %struct.chain* %6
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ fd_nrf8001_set_application_latency_error(int);
int /*<<< orphan*/ fd_nrf8001_set_application_latency_success();
void fd_nrf8001_dispatch_set_application_latency_response(
    uint8_t status, uint8_t *response_data __attribute__((unused)),
    uint32_t response_data_length __attribute__((unused))) {
  if (status != 0x00) {
    fd_nrf8001_set_application_latency_error(status);
    return;
  }
  fd_nrf8001_set_application_latency_success();
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1149 <fd_nrf8001_dispatch_set_application_latency_response+0x29>
mov    -0x4(%rbp),%edi
call   1030 <fd_nrf8001_set_application_latency_error@plt>
jmp    1150 <fd_nrf8001_dispatch_set_application_latency_response+0x30>
mov    $0x0,%al
call   1040 <fd_nrf8001_set_application_latency_success@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
test   %edi,%edi
je     1129 <fd_nrf8001_dispatch_set_application_latency_response+0x9>
jmp    1030 <fd_nrf8001_set_application_latency_error@plt>
xor    %eax,%eax
jmp    1040 <fd_nrf8001_set_application_latency_success@plt>

LLVM IR (-O0):
define void @fd_nrf8001_dispatch_set_application_latency_response(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = load i32, i32* %4
%11 = call i32 @fd_nrf8001_set_application_latency_error(i32 %10)
br label %14
12: ; preds = %3
%13 = call i32 (...) @fd_nrf8001_set_application_latency_success()
br label %14
14: ; preds = %12, %9
ret void
}

LLVM IR (-O2):
define void @fd_nrf8001_dispatch_set_application_latency_response(i32 %0, i32* nocapture readnone %1, i32 %2) {
%4 = icmp eq i32 %0, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @fd_nrf8001_set_application_latency_error(i32 %0)
br label %9
7: ; preds = %3
%8 = tail call i32 (...) @fd_nrf8001_set_application_latency_success()
br label %9
9: ; preds = %7, %5
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fgetwc(int /*<<< orphan*/ *);
void uninitvar_fgetwc(void) {
  FILE *stream;
  (void)fgetwc(stream);
}


x86 assembly (clang, -O0):
<uninitvar_fgetwc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x8(%rbp),%rdi
call   1030 <fgetwc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_fgetwc>:
jmp    1030 <fgetwc@plt>

LLVM IR (-O0):
define void @uninitvar_fgetwc() {
%1 = alloca i32*
%2 = load i32*, i32** %1
%3 = call i32 @fgetwc(i32* %2)
ret void
}

LLVM IR (-O2):
define void @uninitvar_fgetwc() {
%1 = tail call i32 @fgetwc(i32* undef)
ret void
}
void ff_hevc_put_hevc_bi_qpel_hv24_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_qpel_hv24_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_qpel_hv24_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_qpel_hv24_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_qpel_hv24_8_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ parse_cmdline(int, char **);
int procit();
int main(int argc, char **argp, char **envp) {
  parse_cmdline(argc, argp);
  return procit();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <parse_cmdline@plt>
mov    $0x0,%al
call   1040 <procit@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <parse_cmdline@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <procit@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1, i8** %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8**
%7 = alloca i8**
store i32 0, i32* %4
store i32 %0, i32* %5
store i8** %1, i8*** %6
store i8** %2, i8*** %7
%8 = load i32, i32* %5
%9 = load i8**, i8*** %6
%10 = call i32 @parse_cmdline(i32 %8, i8** %9)
%11 = call i32 (...) @procit()
ret i32 %11
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1, i8** nocapture readnone %2) {
%4 = tail call i32 @parse_cmdline(i32 %0, i8** %1)
%5 = tail call i32 (...) @procit()
ret i32 %5
}
int isWhitespace(int c) {
  return c == ' ' || c == '\t' || c == '\n' || c == '\r';
}


x86 assembly (clang, -O0):
<isWhitespace>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <isWhitespace+0x3e>
mov    $0x1,%al
cmpl   $0x9,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <isWhitespace+0x3e>
mov    $0x1,%al
cmpl   $0xa,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <isWhitespace+0x3e>
cmpl   $0xd,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isWhitespace>:
cmp    $0x20,%edi
ja     111d <isWhitespace+0x1d>
mov    $0x1,%eax
mov    %edi,%ecx
movabs $0x100000600,%rdx
bt     %rcx,%rdx
jae    111d <isWhitespace+0x1d>
ret
xor    %eax,%eax
cmp    $0xd,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @isWhitespace(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 32
br i1 %4, label %14, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 9
br i1 %7, label %14, label %8
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 10
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 13
br label %14
14: ; preds = %11, %8, %5, %1
%15 = phi i1 [ true, %8 ], [ true, %5 ], [ true, %1 ], [ %13, %11 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @isWhitespace(i32 %0) {
switch i32 %0, label %2 [
i32 32, label %5
i32 10, label %5
i32 9, label %5
]
2: ; preds = %1
%3 = icmp eq i32 %0, 13
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
int mvpstb_get_aud_stc(unsigned long long *astc) { return 0; }


x86 assembly (clang, -O0):
<mvpstb_get_aud_stc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mvpstb_get_aud_stc>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mvpstb_get_aud_stc(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @mvpstb_get_aud_stc(i64* nocapture readnone %0) {
ret i32 0
}
int bit_set_or_not(unsigned char *bitmap, int bit) {
  return bitmap[bit >> 3] & (1 << (bit & 7));
}


x86 assembly (clang, -O0):
<bit_set_or_not>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sar    $0x3,%ecx
movslq %ecx,%rcx
movzbl (%rax,%rcx,1),%eax
mov    -0xc(%rbp),%ecx
and    $0x7,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit_set_or_not>:
mov    %esi,%ecx
mov    %esi,%eax
sar    $0x3,%eax
cltq
movzbl (%rdi,%rax,1),%edx
and    $0x7,%cl
mov    $0x1,%eax
shl    %cl,%eax
and    %edx,%eax
ret

LLVM IR (-O0):
define i32 @bit_set_or_not(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = ashr i32 %6, 3
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %5, i64 %8
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i32, i32* %4
%13 = and i32 %12, 7
%14 = shl i32 1, %13
%15 = and i32 %11, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @bit_set_or_not(i8* nocapture %0, i32 %1) {
%3 = ashr i32 %1, 3
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = and i32 %1, 7
%9 = shl nuw nsw i32 1, %8
%10 = and i32 %9, %7
ret i32 %10
}
/* Variables and functions */
void __main(void) {}


x86 assembly (clang, -O0):
<__main>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__main>:
ret

LLVM IR (-O0):
define void @__main() {
ret void
}

LLVM IR (-O2):
define void @__main() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ slog(char *);
void _via_poweroff(void) { slog("Poweroff!\n"); }


x86 assembly (clang, -O0):
<_via_poweroff>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <slog@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_via_poweroff>:
lea    0xee9(%rip),%rdi
jmp    1030 <slog@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"Poweroff!\0A\00"
define void @_via_poweroff() {
%1 = call i32 @slog(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"Poweroff!\0A\00"
define void @_via_poweroff() {
%1 = tail call i32 @slog(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ writeide(int /*<<< orphan*/, int /*<<< orphan*/,
                            int /*<<< orphan*/);
void ide_write_pri(uint16_t addr, uint8_t val, void *priv) {
  writeide(0, addr, val);
}


x86 assembly (clang, -O0):
<ide_write_pri>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
xor    %edi,%edi
call   1030 <writeide@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ide_write_pri>:
mov    %esi,%edx
mov    %edi,%esi
xor    %edi,%edi
jmp    1030 <writeide@plt>

LLVM IR (-O0):
define void @ide_write_pri(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = call i32 @writeide(i32 0, i32 %7, i32 %8)
ret void
}

LLVM IR (-O2):
define void @ide_write_pri(i32 %0, i32 %1, i8* nocapture readnone %2) {
%4 = tail call i32 @writeide(i32 0, i32 %0, i32 %1)
ret void
}
/* Variables and functions */
int Pop();
int /*<<< orphan*/ Push(int);
int CmdModulus(void) {
  int operand2;
  operand2 = Pop();
  Push(Pop() % operand2);
  return 0;
}


x86 assembly (clang, -O0):
<CmdModulus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <Pop@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <Pop@plt>
cltd
idivl  -0x4(%rbp)
mov    %edx,%edi
call   1040 <Push@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CmdModulus>:
push   %rbx
xor    %eax,%eax
call   1030 <Pop@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <Pop@plt>
cltd
idiv   %ebx
mov    %edx,%edi
call   1040 <Push@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @CmdModulus() {
%1 = alloca i32
%2 = call i32 (...) @Pop()
store i32 %2, i32* %1
%3 = call i32 (...) @Pop()
%4 = load i32, i32* %1
%5 = srem i32 %3, %4
%6 = call i32 @Push(i32 %5)
ret i32 0
}

LLVM IR (-O2):
define i32 @CmdModulus() {
%1 = tail call i32 (...) @Pop()
%2 = tail call i32 (...) @Pop()
%3 = srem i32 %2, %1
%4 = tail call i32 @Push(i32 %3)
ret i32 0
}
void __set_bit(int nr, volatile unsigned long *addr) {
  unsigned long mask = (1UL << ((nr) % (sizeof(long) * 8)));
  unsigned long *p = ((unsigned long *)addr) + ((nr) / (sizeof(long) * 8));
  *p |= mask;
}


x86 assembly (clang, -O0):
<__set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movslq -0x4(%rbp),%rcx
and    $0x3f,%rcx
mov    $0x1,%eax
shl    %cl,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rcx
shr    $0x6,%rcx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%rax
or     (%rax),%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__set_bit>:
movslq %edi,%rcx
mov    $0x1,%eax
shl    %cl,%rax
shr    $0x6,%rcx
or     %rax,(%rsi,%rcx,8)
ret

LLVM IR (-O0):
define void @__set_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%7 = load i32, i32* %3
%8 = sext i32 %7 to i64
%9 = urem i64 %8, 64
%10 = shl i64 1, %9
store i64 %10, i64* %5
%11 = load i64*, i64** %4
%12 = load i32, i32* %3
%13 = sext i32 %12 to i64
%14 = udiv i64 %13, 64
%15 = getelementptr inbounds i64, i64* %11, i64 %14
store i64* %15, i64** %6
%16 = load i64, i64* %5
%17 = load i64*, i64** %6
%18 = load i64, i64* %17
%19 = or i64 %18, %16
store i64 %19, i64* %17
ret void
}

LLVM IR (-O2):
define void @__set_bit(i32 %0, i64* nocapture %1) {
%3 = sext i32 %0 to i64
%4 = and i64 %3, 63
%5 = shl nuw i64 1, %4
%6 = lshr i64 %3, 6
%7 = getelementptr inbounds i64, i64* %1, i64 %6
%8 = load i64, i64* %7
%9 = or i64 %8, %5
store i64 %9, i64* %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ oosmos_DelayMS(int);
int /*<<< orphan*/ oosmos_RunStateMachines();
int /*<<< orphan*/ orthoNew();
extern int main(void) {
  (void)orthoNew();
  for (;;) {
    oosmos_RunStateMachines();
    oosmos_DelayMS(1);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <orthoNew@plt>
mov    $0x0,%al
call   1050 <oosmos_RunStateMachines@plt>
mov    $0x1,%edi
call   1040 <oosmos_DelayMS@plt>
jmp    1146 <main+0x16>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <orthoNew@plt>
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1050 <oosmos_RunStateMachines@plt>
mov    $0x1,%edi
call   1040 <oosmos_DelayMS@plt>
jmp    1140 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @orthoNew()
br label %3
3: ; preds = %3, %0
%4 = call i32 (...) @oosmos_RunStateMachines()
%5 = call i32 @oosmos_DelayMS(i32 1)
br label %3
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @orthoNew()
br label %2
2: ; preds = %2, %0
%3 = tail call i32 (...) @oosmos_RunStateMachines()
%4 = tail call i32 @oosmos_DelayMS(i32 1)
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ putMessage(unsigned char *, int);
void nrf_setrx() {
  unsigned char cmd;
  cmd = 0x11;
  putMessage(&cmd, 1);
}


x86 assembly (clang, -O0):
<nrf_setrx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x11,-0x1(%rbp)
lea    -0x1(%rbp),%rdi
mov    $0x1,%esi
call   1030 <putMessage@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf_setrx>:
push   %rax
movb   $0x11,0x7(%rsp)
lea    0x7(%rsp),%rdi
mov    $0x1,%esi
call   1030 <putMessage@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @nrf_setrx() {
%1 = alloca i8
store i8 17, i8* %1
%2 = call i32 @putMessage(i8* %1, i32 1)
ret void
}

LLVM IR (-O2):
define void @nrf_setrx() {
%1 = alloca i8
store i8 17, i8* %1
%2 = call i32 @putMessage(i8* %1, i32 1)
ret void
}
void writeu4(unsigned char *p, unsigned int x) {
  *p++ = x;
  *p++ = x >> 8;
  *p++ = x >> 16;
  *p++ = x >> 24;
}


x86 assembly (clang, -O0):
<writeu4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
mov    -0xc(%rbp),%eax
shr    $0x8,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
mov    -0xc(%rbp),%eax
shr    $0x10,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
mov    -0xc(%rbp),%eax
shr    $0x18,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<writeu4>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @writeu4(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = trunc i32 %5 to i8
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i32 1
store i8* %8, i8** %3
store i8 %6, i8* %7
%9 = load i32, i32* %4
%10 = lshr i32 %9, 8
%11 = trunc i32 %10 to i8
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %3
store i8 %11, i8* %12
%14 = load i32, i32* %4
%15 = lshr i32 %14, 16
%16 = trunc i32 %15 to i8
%17 = load i8*, i8** %3
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %3
store i8 %16, i8* %17
%19 = load i32, i32* %4
%20 = lshr i32 %19, 24
%21 = trunc i32 %20 to i8
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %3
store i8 %21, i8* %22
ret void
}

LLVM IR (-O2):
define void @writeu4(i8* nocapture writeonly %0, i32 %1) {
%3 = trunc i32 %1 to i8
%4 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %3, i8* %0
%5 = lshr i32 %1, 8
%6 = trunc i32 %5 to i8
%7 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %6, i8* %4
%8 = lshr i32 %1, 16
%9 = trunc i32 %8 to i8
%10 = getelementptr inbounds i8, i8* %0, i64 3
store i8 %9, i8* %7
%11 = lshr i32 %1, 24
%12 = trunc i32 %11 to i8
store i8 %12, i8* %10
ret void
}
void iostat_update_and_unbind_ctx(struct bio *bio, int rw) {}


x86 assembly (clang, -O0):
<iostat_update_and_unbind_ctx>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<iostat_update_and_unbind_ctx>:
ret

LLVM IR (-O0):
%struct.bio = type opaque
define void @iostat_update_and_unbind_ctx(%struct.bio* %0, i32 %1) {
%3 = alloca %struct.bio*
%4 = alloca i32
store %struct.bio* %0, %struct.bio** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.bio = type opaque
define void @iostat_update_and_unbind_ctx(%struct.bio* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print_usage();
int main(int argc, char *argv[]) {
  if (1) {
    print_usage();
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <print_usage@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <print_usage@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @print_usage()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @print_usage()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ test_basic();
int /*<<< orphan*/ test_bool();
int /*<<< orphan*/ test_comma();
int /*<<< orphan*/ test_inc_dec();
int /*<<< orphan*/ test_relative();
int /*<<< orphan*/ test_ternary();
int /*<<< orphan*/ test_unary();
int main() {
  test_basic();
  test_relative();
  test_inc_dec();
  test_bool();
  test_unary();
  test_ternary();
  test_comma();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1090 <test_basic@plt>
mov    $0x0,%al
call   1030 <test_relative@plt>
mov    $0x0,%al
call   1060 <test_inc_dec@plt>
mov    $0x0,%al
call   1050 <test_bool@plt>
mov    $0x0,%al
call   1070 <test_unary@plt>
mov    $0x0,%al
call   1080 <test_ternary@plt>
mov    $0x0,%al
call   1040 <test_comma@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1090 <test_basic@plt>
xor    %eax,%eax
call   1030 <test_relative@plt>
xor    %eax,%eax
call   1060 <test_inc_dec@plt>
xor    %eax,%eax
call   1050 <test_bool@plt>
xor    %eax,%eax
call   1070 <test_unary@plt>
xor    %eax,%eax
call   1080 <test_ternary@plt>
xor    %eax,%eax
call   1040 <test_comma@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_basic()
%3 = call i32 (...) @test_relative()
%4 = call i32 (...) @test_inc_dec()
%5 = call i32 (...) @test_bool()
%6 = call i32 (...) @test_unary()
%7 = call i32 (...) @test_ternary()
%8 = call i32 (...) @test_comma()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_basic()
%2 = tail call i32 (...) @test_relative()
%3 = tail call i32 (...) @test_inc_dec()
%4 = tail call i32 (...) @test_bool()
%5 = tail call i32 (...) @test_unary()
%6 = tail call i32 (...) @test_ternary()
%7 = tail call i32 (...) @test_comma()
ret i32 0
}
/* Variables and functions */
int THRandom_bernoulli(double);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, double);
int /*<<< orphan*/ stderr;
unsigned Random_bernoulli(double p) {
  const char trace = 0;
  if (trace)
    fprintf(stderr, "Random_bernoulli: p=%20.16f\n", p);
  return THRandom_bernoulli(p);
}


x86 assembly (clang, -O0):
<Random_bernoulli>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movb   $0x0,-0x9(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <THRandom_bernoulli@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Random_bernoulli>:
jmp    1030 <THRandom_bernoulli@plt>

LLVM IR (-O0):
@stderr = global i32 0
define i32 @Random_bernoulli(double %0) {
%2 = alloca double
%3 = alloca i8
store double %0, double* %2
store i8 0, i8* %3
%4 = load double, double* %2
%5 = call i32 @THRandom_bernoulli(double %4)
ret i32 %5
}

LLVM IR (-O2):
@stderr = global i32 0
define i32 @Random_bernoulli(double %0) {
%2 = tail call i32 @THRandom_bernoulli(double %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ __CRAB_assert(int);
void check(int *s, int flag) {
  if (flag > 0) {
    __CRAB_assert(s[4] >= 0);
    __CRAB_assert(s[4] <= 1);
  } else {
    __CRAB_assert(s[8] >= 0);
    __CRAB_assert(s[8] <= 1);
  }
}


x86 assembly (clang, -O0):
<check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    1158 <check+0x48>
mov    -0x8(%rbp),%rax
cmpl   $0x0,0x10(%rax)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__CRAB_assert@plt>
mov    -0x8(%rbp),%rax
cmpl   $0x1,0x10(%rax)
setle  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__CRAB_assert@plt>
jmp    1182 <check+0x72>
mov    -0x8(%rbp),%rax
cmpl   $0x0,0x20(%rax)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__CRAB_assert@plt>
mov    -0x8(%rbp),%rax
cmpl   $0x1,0x20(%rax)
setle  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__CRAB_assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %ebx,%ebx
test   %esi,%esi
setle  %bl
shl    $0x4,%rbx
mov    0x10(%rbx,%rdi,1),%edi
not    %edi
shr    $0x1f,%edi
call   1030 <__CRAB_assert@plt>
xor    %edi,%edi
cmpl   $0x2,0x10(%rbx,%r14,1)
setl   %dil
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <__CRAB_assert@plt>

LLVM IR (-O0):
define void @check(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %20
7: ; preds = %2
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 4
%10 = load i32, i32* %9
%11 = icmp sge i32 %10, 0
%12 = zext i1 %11 to i32
%13 = call i32 @__CRAB_assert(i32 %12)
%14 = load i32*, i32** %3
%15 = getelementptr inbounds i32, i32* %14, i64 4
%16 = load i32, i32* %15
%17 = icmp sle i32 %16, 1
%18 = zext i1 %17 to i32
%19 = call i32 @__CRAB_assert(i32 %18)
br label %33
20: ; preds = %2
%21 = load i32*, i32** %3
%22 = getelementptr inbounds i32, i32* %21, i64 8
%23 = load i32, i32* %22
%24 = icmp sge i32 %23, 0
%25 = zext i1 %24 to i32
%26 = call i32 @__CRAB_assert(i32 %25)
%27 = load i32*, i32** %3
%28 = getelementptr inbounds i32, i32* %27, i64 8
%29 = load i32, i32* %28
%30 = icmp sle i32 %29, 1
%31 = zext i1 %30 to i32
%32 = call i32 @__CRAB_assert(i32 %31)
br label %33
33: ; preds = %20, %7
ret void
}

LLVM IR (-O2):
define void @check(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
%4 = select i1 %3, i64 4, i64 8
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = xor i32 %6, -1
%8 = lshr i32 %7, 31
%9 = tail call i32 @__CRAB_assert(i32 %8)
%10 = load i32, i32* %5
%11 = icmp slt i32 %10, 2
%12 = zext i1 %11 to i32
%13 = tail call i32 @__CRAB_assert(i32 %12)
ret void
}
int do_938() { return 938; }


x86 assembly (clang, -O0):
<do_938>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3aa,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_938>:
mov    $0x3aa,%eax
ret

LLVM IR (-O0):
define i32 @do_938() {
ret i32 938
}

LLVM IR (-O2):
define i32 @do_938() {
ret i32 938
}
/* Type definitions */
typedef scalar_t__ uint64_t;

/* Variables and functions */
unsigned int calc_percent(uint64_t num, uint64_t dem) {
  double percent = ((double)num) / ((double)dem);
  return (unsigned int)((100.0 * percent) + 0.5);
}


x86 assembly (clang, -O0):
<calc_percent>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cvtsi2sdq -0x8(%rbp),%xmm0
cvtsi2sdq -0x10(%rbp),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  0xed2(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xece(%rip),%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc_percent>:
cvtsi2sd %rdi,%xmm0
cvtsi2sd %rsi,%xmm1
divsd  %xmm1,%xmm0
mulsd  0xeea(%rip),%xmm0
addsd  0xeea(%rip),%xmm0
cvttsd2si %xmm0,%rax
ret

LLVM IR (-O0):
define i32 @calc_percent(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca double
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = sitofp i64 %6 to double
%8 = load i64, i64* %4
%9 = sitofp i64 %8 to double
%10 = fdiv double %7, %9
store double %10, double* %5
%11 = load double, double* %5
%12 = call double @llvm.fmuladd.f64(double 1.000000e+02, double %11, double 5.000000e-01)
%13 = fptoui double %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @calc_percent(i64 %0, i64 %1) {
%3 = sitofp i64 %0 to double
%4 = sitofp i64 %1 to double
%5 = fdiv double %3, %4
%6 = tail call double @llvm.fmuladd.f64(double %5, double 1.000000e+02, double 5.000000e-01)
%7 = fptoui double %6 to i32
ret i32 %7
}
unsigned int enable_uint(void) { return (1); }


x86 assembly (clang, -O0):
<enable_uint>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<enable_uint>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @enable_uint() {
ret i32 1
}

LLVM IR (-O2):
define i32 @enable_uint() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void LSystem_Exit() { exit(1); }


x86 assembly (clang, -O0):
<LSystem_Exit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<LSystem_Exit>:
push   %rax
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @LSystem_Exit() {
%1 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @LSystem_Exit() {
%1 = tail call i32 @exit(i32 1)
unreachable
}
void *test_anti_range_61(signed char n) {
  extern void *alloc_anti_range_61(signed char) __attribute__((alloc_size(1)));
  if (0 <= n && n <= 0)
    n = 0 - 1;
  return alloc_anti_range_61(n);
}


x86 assembly (clang, -O0):
<test_anti_range_61>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    %ecx,%eax
jg     113d <test_anti_range_61+0x2d>
movsbl -0x1(%rbp),%eax
cmp    $0x0,%eax
jg     113d <test_anti_range_61+0x2d>
movb   $0xff,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <alloc_anti_range_61@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_anti_range_61>:
cmp    $0x1,%dil
sbb    %eax,%eax
or     %dil,%al
movsbl %al,%edi
jmp    1030 <alloc_anti_range_61@plt>

LLVM IR (-O0):
define i8* @test_anti_range_61(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sle i32 0, %4
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %6
store i8 -1, i8* %2
br label %11
11: ; preds = %10, %6, %1
%12 = load i8, i8* %2
%13 = call i8* @alloc_anti_range_61(i8 signext %12)
ret i8* %13
}

LLVM IR (-O2):
define i8* @test_anti_range_61(i8 signext %0) {
%2 = icmp eq i8 %0, 0
%3 = select i1 %2, i8 -1, i8 %0
%4 = tail call i8* @alloc_anti_range_61(i8 signext %3)
ret i8* %4
}