xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ Write_LCD(int, char *, int);
void Disable_Cursor(int fd) {
  char cmd[] = {254, 72, 253};
  Write_LCD(fd, cmd, 3);
}


x86 assembly (clang, -O0):
<Disable_Cursor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0xede(%rip),%ax
mov    %ax,-0x7(%rbp)
mov    0xed6(%rip),%al
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x7(%rbp),%rsi
mov    $0x3,%edx
call   1030 <Write_LCD@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Disable_Cursor>:
push   %rax
movb   $0xfd,0x6(%rsp)
movw   $0x48fe,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x3,%edx
call   1030 <Write_LCD@plt>
pop    %rax
ret

LLVM IR (-O0):
@__const.Disable_Cursor.cmd = [3 x i8] c"\FEH\FD"
define void @Disable_Cursor(i32 %0) {
%2 = alloca i32
%3 = alloca [3 x i8]
store i32 %0, i32* %2
%4 = bitcast [3 x i8]* %3 to i8*
%5 = load i32, i32* %2
%6 = getelementptr inbounds [3 x i8], [3 x i8]* %3, i64 0, i64 0
%7 = call i32 @Write_LCD(i32 %5, i8* %6, i32 3)
ret void
}

LLVM IR (-O2):
@__const.Disable_Cursor.cmd = [3 x i8] c"\FEH\FD"
define void @Disable_Cursor(i32 %0) {
%2 = alloca [3 x i8]
%3 = getelementptr inbounds [3 x i8], [3 x i8]* %2, i64 0, i64 0
%4 = call i32 @Write_LCD(i32 %0, i8* %3, i32 3)
ret void
}
int test_imm_D9int8_mem(signed char *val) {
  return ((*val) & (0xD9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D9int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xd9,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D9int8_mem>:
testb  $0xd9,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D9int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 217
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_D9int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -39
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ free(char **);
void free_vec(char **vec) {
  if (vec) {
    char **p = vec;
    while (*p)
      free(*p++);
    free(vec);
  }
}


x86 assembly (clang, -O0):
<free_vec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1162 <free_vec+0x52>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
je     1159 <free_vec+0x49>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x8,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%rdi
call   1030 <free@plt>
jmp    112f <free_vec+0x1f>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_vec>:
test   %rdi,%rdi
je     1150 <free_vec+0x40>
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1141 <free_vec+0x31>
lea    0x8(%r14),%rbx
nopl   0x0(%rax,%rax,1)
call   1030 <free@plt>
mov    (%rbx),%rdi
add    $0x8,%rbx
test   %rdi,%rdi
jne    1130 <free_vec+0x20>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @free_vec(i8** %0) {
%2 = alloca i8**
%3 = alloca i8**
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = icmp ne i8** %4, null
br i1 %5, label %6, label %21
6: ; preds = %1
%7 = load i8**, i8*** %2
store i8** %7, i8*** %3
br label %8
8: ; preds = %12, %6
%9 = load i8**, i8*** %3
%10 = load i8*, i8** %9
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %18
12: ; preds = %8
%13 = load i8**, i8*** %3
%14 = getelementptr inbounds i8*, i8** %13, i32 1
store i8** %14, i8*** %3
%15 = load i8*, i8** %13
%16 = bitcast i8* %15 to i8**
%17 = call i32 @free(i8** %16)
br label %8
18: ; preds = %8
%19 = load i8**, i8*** %2
%20 = call i32 @free(i8** %19)
br label %21
21: ; preds = %18, %1
ret void
}

LLVM IR (-O2):
define void @free_vec(i8** %0) {
%2 = icmp eq i8** %0, null
br i1 %2, label %16, label %3
3: ; preds = %1
%4 = load i8*, i8** %0
%5 = icmp eq i8* %4, null
br i1 %5, label %14, label %6
6: ; preds = %3, %6
%7 = phi i8* [ %12, %6 ], [ %4, %3 ]
%8 = phi i8** [ %9, %6 ], [ %0, %3 ]
%9 = getelementptr inbounds i8*, i8** %8, i64 1
%10 = bitcast i8* %7 to i8**
%11 = tail call i32 @free(i8** %10)
%12 = load i8*, i8** %9
%13 = icmp eq i8* %12, null
br i1 %13, label %14, label %6
14: ; preds = %6, %3
%15 = tail call i32 @free(i8** %0)
br label %16
16: ; preds = %14, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void Section4Seconds(int seconds) { printf("%d seconds\n", seconds % 60); }


x86 assembly (clang, -O0):
<Section4Seconds>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3c,%ecx
cltd
idiv   %ecx
mov    %edx,%esi
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Section4Seconds>:
movslq %edi,%rsi
imul   $0xffffffff88888889,%rsi,%rax
shr    $0x20,%rax
add    %esi,%eax
mov    %eax,%ecx
shr    $0x1f,%ecx
sar    $0x5,%eax
add    %ecx,%eax
imul   $0x3c,%eax,%eax
sub    %eax,%esi
lea    0xeca(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"%d seconds\0A\00"
define void @Section4Seconds(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 60
%5 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"%d seconds\0A\00"
define void @Section4Seconds(i32 %0) {
%2 = srem i32 %0, 60
%3 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %2)
ret void
}
/* Type definitions */
struct dummy_tracepoint_args {
  int dummy;
};

/* Variables and functions */
int test_long_fname_2(struct dummy_tracepoint_args *);
__attribute__((no)) int test_long_fname_1(struct dummy_tracepoint_args *arg) {
  return test_long_fname_2(arg);
}


x86 assembly (clang, -O0):
<test_long_fname_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <test_long_fname_2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_long_fname_1>:
jmp    1030 <test_long_fname_2@plt>

LLVM IR (-O0):
%struct.dummy_tracepoint_args = type { i32 }
define i32 @test_long_fname_1(%struct.dummy_tracepoint_args* %0) {
%2 = alloca %struct.dummy_tracepoint_args*
store %struct.dummy_tracepoint_args* %0, %struct.dummy_tracepoint_args** %2
%3 = load %struct.dummy_tracepoint_args*, %struct.dummy_tracepoint_args** %2
%4 = call i32 @test_long_fname_2(%struct.dummy_tracepoint_args* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.dummy_tracepoint_args = type { i32 }
define i32 @test_long_fname_1(%struct.dummy_tracepoint_args* %0) {
%2 = tail call i32 @test_long_fname_2(%struct.dummy_tracepoint_args* %0)
ret i32 %2
}
int mount_devfs(void) { return (0); }


x86 assembly (clang, -O0):
<mount_devfs>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mount_devfs>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mount_devfs() {
ret i32 0
}

LLVM IR (-O2):
define i32 @mount_devfs() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ utl_charisvalid(int /*<<< orphan*/, char *);
int utl_strisvalid(char *str, char *valids) {
  while (*str) {
    if (!utl_charisvalid(*str++, valids))
      return (0);
  }
  return (1);
}


x86 assembly (clang, -O0):
<utl_strisvalid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1162 <utl_strisvalid+0x52>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%edi
mov    -0x18(%rbp),%rsi
call   1030 <utl_charisvalid@plt>
cmp    $0x0,%eax
jne    115d <utl_strisvalid+0x4d>
movl   $0x0,-0x4(%rbp)
jmp    1169 <utl_strisvalid+0x59>
jmp    1120 <utl_strisvalid+0x10>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<utl_strisvalid>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
nopw   0x0(%rax,%rax,1)
movsbl (%rbx),%edi
test   %edi,%edi
je     113b <utl_strisvalid+0x2b>
add    $0x1,%rbx
mov    %r14,%rsi
call   1030 <utl_charisvalid@plt>
test   %eax,%eax
jne    1120 <utl_strisvalid+0x10>
xor    %eax,%eax
jmp    1140 <utl_strisvalid+0x30>
mov    $0x1,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @utl_strisvalid(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
br label %6
6: ; preds = %19, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %4
%13 = load i8, i8* %11
%14 = sext i8 %13 to i32
%15 = load i8*, i8** %5
%16 = call i32 @utl_charisvalid(i32 %14, i8* %15)
%17 = icmp ne i32 %16, 0
br i1 %17, label %19, label %18
18: ; preds = %10
store i32 0, i32* %3
br label %21
19: ; preds = %10
br label %6
20: ; preds = %6
store i32 1, i32* %3
br label %21
21: ; preds = %20, %18
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @utl_strisvalid(i8* nocapture %0, i8* %1) {
br label %3
3: ; preds = %7, %2
%4 = phi i8* [ %0, %2 ], [ %8, %7 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %3
%8 = getelementptr inbounds i8, i8* %4, i64 1
%9 = sext i8 %5 to i32
%10 = tail call i32 @utl_charisvalid(i32 %9, i8* %1)
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %3
12: ; preds = %3, %7
%13 = phi i32 [ 0, %7 ], [ 1, %3 ]
ret i32 %13
}
int ft_min3order(float n1, float n2, float n3) {
  if (n3 <= n2) {
    if (n3 <= n1)
      return (3);
    else
      return (1);
  } else {
    if (n2 <= n1)
      return (2);
    else
      return (1);
  }
}


x86 assembly (clang, -O0):
<ft_min3order>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  %xmm2,-0x10(%rbp)
movss  -0x10(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jb     1151 <ft_min3order+0x51>
movss  -0x10(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jb     1145 <ft_min3order+0x45>
movl   $0x3,-0x4(%rbp)
jmp    1177 <ft_min3order+0x77>
movl   $0x1,-0x4(%rbp)
jmp    1177 <ft_min3order+0x77>
movss  -0xc(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jb     1170 <ft_min3order+0x70>
movl   $0x2,-0x4(%rbp)
jmp    1177 <ft_min3order+0x77>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_min3order>:
xor    %eax,%eax
ucomiss %xmm2,%xmm0
setae  %al
ucomiss %xmm1,%xmm0
mov    $0x2,%ecx
sbb    $0x0,%ecx
ucomiss %xmm2,%xmm1
lea    0x1(%rax,%rax,1),%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ft_min3order(float %0, float %1, float %2) {
%4 = alloca i32
%5 = alloca float
%6 = alloca float
%7 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
%8 = load float, float* %7
%9 = load float, float* %6
%10 = fcmp ole float %8, %9
br i1 %10, label %11, label %17
11: ; preds = %3
%12 = load float, float* %7
%13 = load float, float* %5
%14 = fcmp ole float %12, %13
br i1 %14, label %15, label %16
15: ; preds = %11
store i32 3, i32* %4
br label %23
16: ; preds = %11
store i32 1, i32* %4
br label %23
17: ; preds = %3
%18 = load float, float* %6
%19 = load float, float* %5
%20 = fcmp ole float %18, %19
br i1 %20, label %21, label %22
21: ; preds = %17
store i32 2, i32* %4
br label %23
22: ; preds = %17
store i32 1, i32* %4
br label %23
23: ; preds = %22, %21, %16, %15
%24 = load i32, i32* %4
ret i32 %24
}

LLVM IR (-O2):
define i32 @ft_min3order(float %0, float %1, float %2) {
%4 = fcmp ugt float %2, %1
%5 = fcmp ugt float %2, %0
%6 = select i1 %5, i32 1, i32 3
%7 = fcmp ugt float %1, %0
%8 = select i1 %7, i32 1, i32 2
%9 = select i1 %4, i32 %8, i32 %6
ret i32 %9
}
void XrmQGetSearchResource() {}


x86 assembly (clang, -O0):
<XrmQGetSearchResource>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XrmQGetSearchResource>:
ret

LLVM IR (-O0):
define void @XrmQGetSearchResource() {
ret void
}

LLVM IR (-O2):
define void @XrmQGetSearchResource() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void Cfree(void *p) {
  if (p != NULL) {
    free(p);
  } else {
  }
}


x86 assembly (clang, -O0):
<Cfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1135 <Cfree+0x25>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
jmp    113a <Cfree+0x2a>
jmp    113a <Cfree+0x2a>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cfree>:
test   %rdi,%rdi
je     111a <Cfree+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @Cfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %9
8: ; preds = %1
br label %9
9: ; preds = %8, %5
ret void
}

LLVM IR (-O2):
define void @Cfree(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %1, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char const *);
scalar_t__ strncmp(char const *, char const *, int /*<<< orphan*/);
int streql(const char *a, const char *b) {
  return (strncmp(a, b, strlen(b)) == 0);
}


x86 assembly (clang, -O0):
<streql>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<streql>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <strncmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @streql(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i64 @strncmp(i8* %5, i8* %6, i32 %8)
%10 = icmp eq i64 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @streql(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i64 @strncmp(i8* %0, i8* %1, i32 %3)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
void IN_Shutdown(void) {}


x86 assembly (clang, -O0):
<IN_Shutdown>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IN_Shutdown>:
ret

LLVM IR (-O0):
define void @IN_Shutdown() {
ret void
}

LLVM IR (-O2):
define void @IN_Shutdown() {
ret void
}
/* Variables and functions */
char cos(char);
char internal_cos_b(char value) { return cos(value); }


x86 assembly (clang, -O0):
<internal_cos_b>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
movsbl %al,%edi
call   1030 <cos@plt>
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<internal_cos_b>:
jmp    1030 <cos@plt>

LLVM IR (-O0):
define signext i8 @internal_cos_b(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call signext i8 @cos(i8 signext %3)
ret i8 %4
}

LLVM IR (-O2):
define signext i8 @internal_cos_b(i8 signext %0) {
%2 = tail call signext i8 @cos(i8 signext %0)
ret i8 %2
}
/* Variables and functions */
int munlock(const void *addr, size_t len) { return 0; }


x86 assembly (clang, -O0):
<munlock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<munlock>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @munlock(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @munlock(i8* nocapture readnone %0, i64 %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ GUI_Mouse_Show_InRegion();
void GUI_Mouse_Show_InWidget(void) { GUI_Mouse_Show_InRegion(); }


x86 assembly (clang, -O0):
<GUI_Mouse_Show_InWidget>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GUI_Mouse_Show_InRegion@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GUI_Mouse_Show_InWidget>:
xor    %eax,%eax
jmp    1030 <GUI_Mouse_Show_InRegion@plt>

LLVM IR (-O0):
define void @GUI_Mouse_Show_InWidget() {
%1 = call i32 (...) @GUI_Mouse_Show_InRegion()
ret void
}

LLVM IR (-O2):
define void @GUI_Mouse_Show_InWidget() {
%1 = tail call i32 (...) @GUI_Mouse_Show_InRegion()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isxdigit(int);
void t_isxdigit_0xf7() {
  Assert_real((isxdigit(247) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              1240, ("isxdigit should be 0 for 0xf7"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0xf7>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf7,%edi
call   1030 <isxdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4d8,%edx
lea    0xf5c(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0xf7>:
push   %rax
mov    $0xf7,%edi
call   1030 <isxdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x4d8,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0xf7\00"
define void @t_isxdigit_0xf7() {
%1 = call i64 @isxdigit(i32 247)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1240, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0xf7\00"
define void @t_isxdigit_0xf7() {
%1 = tail call i64 @isxdigit(i32 247)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1240, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "Usage: v09 [-t tracefile [-tl addr] "
                  "[-th addr] ]\n[-e escchar] \n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [64 x i8] c"Usage: v09 [-t tracefile [-tl addr] [-th addr] ]\0A[-e escchar] \0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [64 x i8] c"Usage: v09 [-t tracefile [-tl addr] [-th addr] ]\0A[-e escchar] \0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
int fibo1(int n) {
  if (n <= 0)
    return (-1);
  else if (n <= 2) {
    return (1);
  } else {
    return (fibo1(n - 1) + fibo1(n - 2));
  }
  return (-2);
}


x86 assembly (clang, -O0):
<fibo1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jg     1131 <fibo1+0x21>
movl   $0xffffffff,-0x4(%rbp)
jmp    116a <fibo1+0x5a>
cmpl   $0x2,-0x8(%rbp)
jg     1147 <fibo1+0x37>
movl   $0x1,-0x4(%rbp)
jmp    116a <fibo1+0x5a>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fibo1@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fibo1@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibo1>:
push   %rbp
push   %rbx
push   %rax
test   %edi,%edi
jle    1147 <fibo1+0x37>
mov    %edi,%ebx
mov    $0x1,%ebp
cmp    $0x3,%edi
jb     114c <fibo1+0x3c>
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nop
lea    -0x1(%rbx),%edi
call   1030 <fibo1@plt>
add    $0xfffffffe,%ebx
add    %eax,%ebp
cmp    $0x2,%ebx
ja     1130 <fibo1+0x20>
add    $0x1,%ebp
jmp    114c <fibo1+0x3c>
mov    $0xffffffff,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fibo1(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 -1, i32* %2
br label %19
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp sle i32 %8, 2
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 1, i32* %2
br label %19
11: ; preds = %7
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 1
%14 = call i32 @fibo1(i32 %13)
%15 = load i32, i32* %3
%16 = sub nsw i32 %15, 2
%17 = call i32 @fibo1(i32 %16)
%18 = add nsw i32 %14, %17
store i32 %18, i32* %2
br label %19
19: ; preds = %11, %10, %6
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @fibo1(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %15, label %3
3: ; preds = %1
%4 = icmp ult i32 %0, 3
br i1 %4, label %15, label %5
5: ; preds = %3, %5
%6 = phi i32 [ %11, %5 ], [ 0, %3 ]
%7 = phi i32 [ %10, %5 ], [ %0, %3 ]
%8 = add nsw i32 %7, -1
%9 = tail call i32 @fibo1(i32 %8)
%10 = add nsw i32 %7, -2
%11 = add nsw i32 %9, %6
%12 = icmp ult i32 %10, 3
br i1 %12, label %13, label %5
13: ; preds = %5
%14 = add i32 %11, 1
br label %15
15: ; preds = %3, %13, %1
%16 = phi i32 [ -1, %1 ], [ %14, %13 ], [ 1, %3 ]
ret i32 %16
}
unsigned long hash_pointer(const void *ptr) {
  unsigned long key = (unsigned long)ptr;
  key += (key << 12);
  key ^= (key >> 22);
  key += (key << 4);
  key ^= (key >> 9);
  key += (key << 10);
  key ^= (key >> 2);
  key += (key << 7);
  key ^= (key >> 12);
  return key;
}


x86 assembly (clang, -O0):
<hash_pointer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shl    $0xc,%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x16,%rax
xor    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shl    $0x4,%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x9,%rax
xor    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shl    $0xa,%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x2,%rax
xor    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shl    $0x7,%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shr    $0xc,%rax
xor    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_pointer>:
mov    %rdi,%rax
shl    $0xc,%rax
add    %rdi,%rax
mov    %rax,%rcx
shr    $0x16,%rcx
xor    %rax,%rcx
mov    %rcx,%rax
shl    $0x4,%rax
add    %rcx,%rax
mov    %rax,%rcx
shr    $0x9,%rcx
xor    %rax,%rcx
mov    %rcx,%rax
shl    $0xa,%rax
add    %rcx,%rax
mov    %rax,%rcx
shr    $0x2,%rcx
xor    %rax,%rcx
mov    %rcx,%rdx
shl    $0x7,%rdx
add    %rcx,%rdx
mov    %rdx,%rax
shr    $0xc,%rax
xor    %rdx,%rax
ret

LLVM IR (-O0):
define i64 @hash_pointer(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = ptrtoint i8* %4 to i64
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = shl i64 %6, 12
%8 = load i64, i64* %3
%9 = add i64 %8, %7
store i64 %9, i64* %3
%10 = load i64, i64* %3
%11 = lshr i64 %10, 22
%12 = load i64, i64* %3
%13 = xor i64 %12, %11
store i64 %13, i64* %3
%14 = load i64, i64* %3
%15 = shl i64 %14, 4
%16 = load i64, i64* %3
%17 = add i64 %16, %15
store i64 %17, i64* %3
%18 = load i64, i64* %3
%19 = lshr i64 %18, 9
%20 = load i64, i64* %3
%21 = xor i64 %20, %19
store i64 %21, i64* %3
%22 = load i64, i64* %3
%23 = shl i64 %22, 10
%24 = load i64, i64* %3
%25 = add i64 %24, %23
store i64 %25, i64* %3
%26 = load i64, i64* %3
%27 = lshr i64 %26, 2
%28 = load i64, i64* %3
%29 = xor i64 %28, %27
store i64 %29, i64* %3
%30 = load i64, i64* %3
%31 = shl i64 %30, 7
%32 = load i64, i64* %3
%33 = add i64 %32, %31
store i64 %33, i64* %3
%34 = load i64, i64* %3
%35 = lshr i64 %34, 12
%36 = load i64, i64* %3
%37 = xor i64 %36, %35
store i64 %37, i64* %3
%38 = load i64, i64* %3
ret i64 %38
}

LLVM IR (-O2):
define i64 @hash_pointer(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = mul i64 %2, 4097
%4 = lshr i64 %3, 22
%5 = xor i64 %4, %3
%6 = mul i64 %5, 17
%7 = lshr i64 %6, 9
%8 = xor i64 %7, %6
%9 = mul i64 %8, 1025
%10 = lshr i64 %9, 2
%11 = xor i64 %10, %9
%12 = mul i64 %11, 129
%13 = lshr i64 %12, 12
%14 = xor i64 %13, %12
ret i64 %14
}
double ls_costN_nm5_sq(double x) { return x * x; }


x86 assembly (clang, -O0):
<ls_costN_nm5_sq>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_costN_nm5_sq>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @ls_costN_nm5_sq(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @ls_costN_nm5_sq(double %0) {
%2 = fmul double %0, %0
ret double %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ expected_pk_fault(int /*<<< orphan*/);
int /*<<< orphan*/ fflush(int /*<<< orphan*/ *);
int /*<<< orphan*/ pkey_write_deny(int /*<<< orphan*/);
int /*<<< orphan*/ sigsafe_printf(char *, int /*<<< orphan*/);
void test_write_of_write_disabled_region(int *ptr, uint16_t pkey) {
  do {
    if (1 <= 0)
      sigsafe_printf("disabling write access to PKEY[%02d], doing write\n",
                     pkey);
    fflush(NULL);
  } while (0);
  pkey_write_deny(pkey);
  *ptr = 1028;
  expected_pk_fault(pkey);
}


x86 assembly (clang, -O0):
<test_write_of_write_disabled_region>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <fflush@plt>
mov    -0xc(%rbp),%edi
call   1030 <pkey_write_deny@plt>
mov    -0x8(%rbp),%rax
movl   $0x404,(%rax)
mov    -0xc(%rbp),%edi
call   1050 <expected_pk_fault@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_write_of_write_disabled_region>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
xor    %edi,%edi
call   1040 <fflush@plt>
mov    %ebx,%edi
call   1030 <pkey_write_deny@plt>
movl   $0x404,(%r14)
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1050 <expected_pk_fault@plt>

LLVM IR (-O0):
define void @test_write_of_write_disabled_region(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %2
%6 = call i32 @fflush(i32* null)
br label %7
7: ; preds = %5
%8 = load i32, i32* %4
%9 = call i32 @pkey_write_deny(i32 %8)
%10 = load i32*, i32** %3
store i32 1028, i32* %10
%11 = load i32, i32* %4
%12 = call i32 @expected_pk_fault(i32 %11)
ret void
}

LLVM IR (-O2):
define void @test_write_of_write_disabled_region(i32* nocapture writeonly %0, i32 %1) {
%3 = tail call i32 @fflush(i32* null)
%4 = tail call i32 @pkey_write_deny(i32 %1)
store i32 1028, i32* %0
%5 = tail call i32 @expected_pk_fault(i32 %1)
ret void
}
int video_init(void) { return 0; }


x86 assembly (clang, -O0):
<video_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<video_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @video_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @video_init() {
ret i32 0
}
int check_sse2_support(void) { return 1; }


x86 assembly (clang, -O0):
<check_sse2_support>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_sse2_support>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @check_sse2_support() {
ret i32 1
}

LLVM IR (-O2):
define i32 @check_sse2_support() {
ret i32 1
}
int isDigit(char c) { return c >= '0' && c <= '9'; }


x86 assembly (clang, -O0):
<isDigit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <isDigit+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isDigit>:
add    $0xd0,%dil
xor    %eax,%eax
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @isDigit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 57
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @isDigit(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ fd_nrf8001_error();
__attribute__((weak)) void fd_nrf8001_dtm_command_event_error(void) {
  fd_nrf8001_error();
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <fd_nrf8001_error@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
xor    %eax,%eax
jmp    1030 <fd_nrf8001_error@plt>

LLVM IR (-O0):
define weak void @fd_nrf8001_dtm_command_event_error() {
%1 = call i32 (...) @fd_nrf8001_error()
ret void
}

LLVM IR (-O2):
define weak void @fd_nrf8001_dtm_command_event_error() {
%1 = tail call i32 (...) @fd_nrf8001_error()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ learn_token(unsigned char *, int);
void learn_symbol(unsigned char *symbol, int len) {
  int i;
  for (i = 0; i < len - 1; i++)
    learn_token(symbol + i, len - i);
}


x86 assembly (clang, -O0):
<learn_symbol>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
cmp    %ecx,%eax
jge    115b <learn_symbol+0x4b>
mov    -0x8(%rbp),%rdi
movslq -0x10(%rbp),%rax
add    %rax,%rdi
mov    -0xc(%rbp),%esi
sub    -0x10(%rbp),%esi
call   1030 <learn_token@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <learn_symbol+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<learn_symbol>:
push   %r15
push   %r14
push   %rbx
cmp    $0x2,%esi
jl     1149 <learn_symbol+0x39>
mov    %esi,%r14d
mov    %rdi,%rbx
lea    -0x1(%r14),%r15d
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rbx,%rdi
mov    %r14d,%esi
call   1030 <learn_token@plt>
add    $0xffffffff,%r14d
add    $0x1,%rbx
add    $0xffffffffffffffff,%r15
jne    1130 <learn_symbol+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @learn_symbol(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %20, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = sub nsw i32 %8, 1
%10 = icmp slt i32 %7, %9
br i1 %10, label %11, label %23
11: ; preds = %6
%12 = load i8*, i8** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i32, i32* %4
%17 = load i32, i32* %5
%18 = sub nsw i32 %16, %17
%19 = call i32 @learn_token(i8* %15, i32 %18)
br label %20
20: ; preds = %11
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
store i32 %22, i32* %5
br label %6
23: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @learn_symbol(i8* %0, i32 %1) {
%3 = icmp sgt i32 %1, 1
br i1 %3, label %4, label %15
4: ; preds = %2
%5 = add nsw i32 %1, -1
%6 = zext i32 %5 to i64
br label %7
7: ; preds = %4, %7
%8 = phi i64 [ 0, %4 ], [ %13, %7 ]
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = trunc i64 %8 to i32
%11 = sub nsw i32 %1, %10
%12 = tail call i32 @learn_token(i8* %9, i32 %11)
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %6
br i1 %14, label %15, label %7
15: ; preds = %7, %2
ret void
}
void print_swline(char *msg, struct swline *word_list) {}


x86 assembly (clang, -O0):
<print_swline>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_swline>:
ret

LLVM IR (-O0):
%struct.swline = type opaque
define void @print_swline(i8* %0, %struct.swline* %1) {
%3 = alloca i8*
%4 = alloca %struct.swline*
store i8* %0, i8** %3
store %struct.swline* %1, %struct.swline** %4
ret void
}

LLVM IR (-O2):
%struct.swline = type opaque
define void @print_swline(i8* nocapture %0, %struct.swline* nocapture %1) {
ret void
}
int fun507() { return 507; }


x86 assembly (clang, -O0):
<fun507>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1fb,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun507>:
mov    $0x1fb,%eax
ret

LLVM IR (-O0):
define i32 @fun507() {
ret i32 507
}

LLVM IR (-O2):
define i32 @fun507() {
ret i32 507
}
/* Variables and functions */
long strtol(char const *, char **, int);
int is_positive_int(const char *s) {
  char *end = 0;
  long v = strtol(s, &end, 10);
  if (*s != '\0' && *end == '\0' && v >= 0)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<is_positive_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
mov    $0xa,%edx
call   1030 <strtol@plt>
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1171 <is_positive_int+0x61>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1171 <is_positive_int+0x61>
cmpq   $0x0,-0x20(%rbp)
jl     1171 <is_positive_int+0x61>
movl   $0x1,-0x4(%rbp)
jmp    1178 <is_positive_int+0x68>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_positive_int>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movq   $0x0,0x8(%rsp)
lea    0x8(%rsp),%rsi
mov    $0xa,%edx
call   1030 <strtol@plt>
cmpb   $0x0,(%rbx)
je     1149 <is_positive_int+0x39>
mov    0x8(%rsp),%rcx
cmpb   $0x0,(%rcx)
jne    1149 <is_positive_int+0x39>
mov    $0x1,%ecx
test   %rax,%rax
jns    114b <is_positive_int+0x3b>
xor    %ecx,%ecx
mov    %ecx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @is_positive_int(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
store i8* %0, i8** %3
store i8* null, i8** %4
%6 = load i8*, i8** %3
%7 = call i64 @strtol(i8* %6, i8** %4, i32 10)
store i64 %7, i64* %5
%8 = load i8*, i8** %3
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %21
12: ; preds = %1
%13 = load i8*, i8** %4
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %21
17: ; preds = %12
%18 = load i64, i64* %5
%19 = icmp sge i64 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %17
store i32 1, i32* %2
br label %22
21: ; preds = %17, %12, %1
store i32 0, i32* %2
br label %22
22: ; preds = %21, %20
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @is_positive_int(i8* %0) {
%2 = alloca i8*
%3 = bitcast i8** %2 to i8*
store i8* null, i8** %2
%4 = call i64 @strtol(i8* %0, i8** %2, i32 10)
%5 = load i8, i8* %0
%6 = icmp eq i8 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
%11 = icmp sgt i64 %4, -1
%12 = select i1 %10, i1 %11, i1 false
br i1 %12, label %14, label %13
13: ; preds = %7, %1
br label %14
14: ; preds = %7, %13
%15 = phi i32 [ 0, %13 ], [ 1, %7 ]
ret i32 %15
}
void test_five(int x, int y, int z) {
#pragma omp target
#pragma omp teams distribute simd collapse(2)
  for (int i = 0; i < x; i++)
    for (int i = 0; i < y; i++)
      for (int i = 0; i < z; i++)
        ;
}


x86 assembly (clang, -O0):
<test_five>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    117f <test_five+0x7f>
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    116c <test_five+0x6c>
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1159 <test_five+0x59>
jmp    114b <test_five+0x4b>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    113a <test_five+0x3a>
jmp    115e <test_five+0x5e>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1127 <test_five+0x27>
jmp    1171 <test_five+0x71>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1114 <test_five+0x14>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_five>:
ret

LLVM IR (-O0):
define void @test_five(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %10
10: ; preds = %33, %3
%11 = load i32, i32* %7
%12 = load i32, i32* %4
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %36
14: ; preds = %10
store i32 0, i32* %8
br label %15
15: ; preds = %29, %14
%16 = load i32, i32* %8
%17 = load i32, i32* %5
%18 = icmp slt i32 %16, %17
br i1 %18, label %19, label %32
19: ; preds = %15
store i32 0, i32* %9
br label %20
20: ; preds = %25, %19
%21 = load i32, i32* %9
%22 = load i32, i32* %6
%23 = icmp slt i32 %21, %22
br i1 %23, label %24, label %28
24: ; preds = %20
br label %25
25: ; preds = %24
%26 = load i32, i32* %9
%27 = add nsw i32 %26, 1
store i32 %27, i32* %9
br label %20
28: ; preds = %20
br label %29
29: ; preds = %28
%30 = load i32, i32* %8
%31 = add nsw i32 %30, 1
store i32 %31, i32* %8
br label %15
32: ; preds = %15
br label %33
33: ; preds = %32
%34 = load i32, i32* %7
%35 = add nsw i32 %34, 1
store i32 %35, i32* %7
br label %10
36: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @test_five(i32 %0, i32 %1, i32 %2) {
ret void
}
int fib(int n) {
  if (n < 3)
    return 1;
  else
    return fib(n - 1) + fib(n - 2);
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x3,-0x8(%rbp)
jge    1131 <fib+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1154 <fib+0x44>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x3,%edi
jl     1145 <fib+0x35>
mov    %edi,%ebx
add    $0x2,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    -0x3(%rbx),%edi
call   1030 <fib@plt>
add    %eax,%ebp
add    $0xfffffffe,%ebx
cmp    $0x4,%ebx
ja     1130 <fib+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 3
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %15
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i32 @fib(i32 %9)
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 2
%13 = call i32 @fib(i32 %12)
%14 = add nsw i32 %10, %13
store i32 %14, i32* %2
br label %15
15: ; preds = %7, %6
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp slt i32 %0, 3
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 5
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
unsigned umax(unsigned a, unsigned b) { return a > b ? a : b; }


x86 assembly (clang, -O0):
<umax>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jbe    1121 <umax+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <umax+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<umax>:
mov    %esi,%eax
cmp    %esi,%edi
cmova  %edi,%eax
ret

LLVM IR (-O0):
define i32 @umax(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ugt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @umax(i32 %0, i32 %1) {
%3 = icmp ugt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
__attribute__((weak)) void SysTick_Handler(void) {}


x86 assembly (clang, -O0):
<SysTick_Handler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysTick_Handler>:
ret

LLVM IR (-O0):
define weak void @SysTick_Handler() {
ret void
}

LLVM IR (-O2):
define weak void @SysTick_Handler() {
ret void
}
int _intarray_indexOf(int *array, int count, int val) {
  int n;
  for (n = 0; n < count; ++n) {
    if (array[n] == val)
      return n;
  }
  return -1;
}


x86 assembly (clang, -O0):
<_intarray_indexOf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1153 <_intarray_indexOf+0x53>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x18(%rbp),%eax
jne    1140 <_intarray_indexOf+0x40>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115a <_intarray_indexOf+0x5a>
jmp    1145 <_intarray_indexOf+0x45>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1115 <_intarray_indexOf+0x15>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_intarray_indexOf>:
mov    $0xffffffff,%eax
test   %esi,%esi
jle    111e <_intarray_indexOf+0x1e>
mov    %esi,%esi
xor    %ecx,%ecx
nopl   (%rax)
cmp    %edx,(%rdi,%rcx,4)
je     111f <_intarray_indexOf+0x1f>
add    $0x1,%rcx
cmp    %rcx,%rsi
jne    1110 <_intarray_indexOf+0x10>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @_intarray_indexOf(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %24, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %27
13: ; preds = %9
%14 = load i32*, i32** %5
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %7
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %23
21: ; preds = %13
%22 = load i32, i32* %8
store i32 %22, i32* %4
br label %28
23: ; preds = %13
br label %24
24: ; preds = %23
%25 = load i32, i32* %8
%26 = add nsw i32 %25, 1
store i32 %26, i32* %8
br label %9
27: ; preds = %9
store i32 -1, i32* %4
br label %28
28: ; preds = %27, %21
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @_intarray_indexOf(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = zext i32 %1 to i64
br label %7
7: ; preds = %5, %12
%8 = phi i64 [ 0, %5 ], [ %13, %12 ]
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = icmp eq i32 %10, %2
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %6
br i1 %14, label %17, label %7
15: ; preds = %7
%16 = trunc i64 %8 to i32
br label %17
17: ; preds = %12, %15, %3
%18 = phi i32 [ -1, %3 ], [ %16, %15 ], [ -1, %12 ]
ret i32 %18
}
/* Variables and functions */
int floatcmp(float, float);
int my_numcmp(float num1, float num2) {
  if (floatcmp(num2, -1) == 0)
    return 0;
  else
    return floatcmp(num1, num2);
}


x86 assembly (clang, -O0):
<my_numcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movss  0xed1(%rip),%xmm1
call   1030 <floatcmp@plt>
cmp    $0x0,%eax
jne    1149 <my_numcmp+0x39>
movl   $0x0,-0x4(%rbp)
jmp    115b <my_numcmp+0x4b>
movss  -0x8(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
call   1030 <floatcmp@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_numcmp>:
push   %rax
movaps %xmm1,%xmm2
movss  %xmm0,(%rsp)
movss  0xedf(%rip),%xmm1
movss  %xmm2,0x4(%rsp)
movaps %xmm2,%xmm0
call   1030 <floatcmp@plt>
test   %eax,%eax
je     1144 <my_numcmp+0x34>
movss  (%rsp),%xmm0
movss  0x4(%rsp),%xmm1
pop    %rax
jmp    1030 <floatcmp@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @my_numcmp(float %0, float %1) {
%3 = alloca i32
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %5
%7 = call i32 @floatcmp(float %6, float -1.000000e+00)
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 0, i32* %3
br label %14
10: ; preds = %2
%11 = load float, float* %4
%12 = load float, float* %5
%13 = call i32 @floatcmp(float %11, float %12)
store i32 %13, i32* %3
br label %14
14: ; preds = %10, %9
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @my_numcmp(float %0, float %1) {
%3 = tail call i32 @floatcmp(float %1, float -1.000000e+00)
%4 = icmp eq i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @floatcmp(float %0, float %1)
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ %6, %5 ], [ 0, %2 ]
ret i32 %8
}
int test_imm_B1uint16_reg(unsigned short val) {
  return ((val) & (0xB1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B1uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xb1,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B1uint16_reg>:
test   $0xb1,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B1uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 177
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_B1uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 177
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}