xunge/DecIR huggingface dataset:
unsigned int GPMCNANDDataRead(unsigned int baseAddr, unsigned int csNum) {
  unsigned int data;
  data = (*((volatile unsigned int *)(baseAddr + (0x84 + (csNum * (0x30))))));
  return (data);
}


x86 assembly (clang, -O0):
<GPMCNANDDataRead>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   $0x30,-0x8(%rbp),%ecx
add    $0x84,%ecx
add    %ecx,%eax
mov    %eax,%eax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPMCNANDDataRead>:
lea    (%rsi,%rsi,2),%eax
shl    $0x4,%eax
add    %edi,%eax
add    $0x84,%eax
mov    (%rax),%eax
ret

LLVM IR (-O0):
define i32 @GPMCNANDDataRead(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = mul i32 %7, 48
%9 = add i32 132, %8
%10 = add i32 %6, %9
%11 = zext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
%13 = load volatile i32, i32* %12
store i32 %13, i32* %5
%14 = load i32, i32* %5
ret i32 %14
}

LLVM IR (-O2):
define i32 @GPMCNANDDataRead(i32 %0, i32 %1) {
%3 = mul i32 %1, 48
%4 = add i32 %0, 132
%5 = add i32 %4, %3
%6 = zext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
%8 = load volatile i32, i32* %7
ret i32 %8
}
void glmMatrixFromVectors2f(float m[4], const float v1[2], const float v2[2]) {
  m[0] = v1[0];
  m[2] = v2[0];
  m[1] = v1[1];
  m[3] = v2[1];
}


x86 assembly (clang, -O0):
<glmMatrixFromVectors2f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x18(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x8(%rax)
mov    -0x10(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
mov    -0x18(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmMatrixFromVectors2f>:
movss  (%rsi),%xmm0
movss  %xmm0,(%rdi)
movss  (%rdx),%xmm0
movss  %xmm0,0x8(%rdi)
movss  0x4(%rsi),%xmm0
movss  %xmm0,0x4(%rdi)
movss  0x4(%rdx),%xmm0
movss  %xmm0,0xc(%rdi)
ret

LLVM IR (-O0):
define void @glmMatrixFromVectors2f(float* %0, float* %1, float* %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float*
store float* %0, float** %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float*, float** %5
%8 = getelementptr inbounds float, float* %7, i64 0
%9 = load float, float* %8
%10 = load float*, float** %4
%11 = getelementptr inbounds float, float* %10, i64 0
store float %9, float* %11
%12 = load float*, float** %6
%13 = getelementptr inbounds float, float* %12, i64 0
%14 = load float, float* %13
%15 = load float*, float** %4
%16 = getelementptr inbounds float, float* %15, i64 2
store float %14, float* %16
%17 = load float*, float** %5
%18 = getelementptr inbounds float, float* %17, i64 1
%19 = load float, float* %18
%20 = load float*, float** %4
%21 = getelementptr inbounds float, float* %20, i64 1
store float %19, float* %21
%22 = load float*, float** %6
%23 = getelementptr inbounds float, float* %22, i64 1
%24 = load float, float* %23
%25 = load float*, float** %4
%26 = getelementptr inbounds float, float* %25, i64 3
store float %24, float* %26
ret void
}

LLVM IR (-O2):
define void @glmMatrixFromVectors2f(float* nocapture writeonly %0, float* nocapture %1, float* nocapture %2) {
%4 = load float, float* %1
store float %4, float* %0
%5 = load float, float* %2
%6 = getelementptr inbounds float, float* %0, i64 2
store float %5, float* %6
%7 = getelementptr inbounds float, float* %1, i64 1
%8 = load float, float* %7
%9 = getelementptr inbounds float, float* %0, i64 1
store float %8, float* %9
%10 = getelementptr inbounds float, float* %2, i64 1
%11 = load float, float* %10
%12 = getelementptr inbounds float, float* %0, i64 3
store float %11, float* %12
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ ascii_to_unicode(int /*<<< orphan*/);
int /*<<< orphan*/ print_unicode_to_utf8(int /*<<< orphan*/);
void print_cp437_code(uint8_t ascii_code) {
  print_unicode_to_utf8(ascii_to_unicode(ascii_code));
}


x86 assembly (clang, -O0):
<print_cp437_code>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ascii_to_unicode@plt>
mov    %eax,%edi
call   1040 <print_unicode_to_utf8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_cp437_code>:
push   %rax
call   1030 <ascii_to_unicode@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <print_unicode_to_utf8@plt>

LLVM IR (-O0):
define void @print_cp437_code(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ascii_to_unicode(i32 %3)
%5 = call i32 @print_unicode_to_utf8(i32 %4)
ret void
}

LLVM IR (-O2):
define void @print_cp437_code(i32 %0) {
%2 = tail call i32 @ascii_to_unicode(i32 %0)
%3 = tail call i32 @print_unicode_to_utf8(i32 %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ ucontext_t;
typedef int /*<<< orphan*/ siginfo_t;

/* Variables and functions */
int /*<<< orphan*/ chx_sigmask(int /*<<< orphan*/ *);
void sigalrm_handler(int sig, siginfo_t *siginfo, void *arg) {
  extern void chx_timer_expired(void);
  ucontext_t *uc = arg;
  (void)sig;
  (void)siginfo;
  chx_timer_expired();
  chx_sigmask(uc);
}


x86 assembly (clang, -O0):
<sigalrm_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
call   1040 <chx_timer_expired@plt>
mov    -0x20(%rbp),%rdi
call   1030 <chx_sigmask@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigalrm_handler>:
push   %rbx
mov    %rdx,%rbx
call   1040 <chx_timer_expired@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <chx_sigmask@plt>

LLVM IR (-O0):
define void @sigalrm_handler(i32 %0, i32* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i8*
%7 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i8* %2, i8** %6
%8 = load i8*, i8** %6
%9 = bitcast i8* %8 to i32*
store i32* %9, i32** %7
%10 = load i32, i32* %4
%11 = load i32*, i32** %5
%12 = load i32*, i32** %7
%13 = call i32 @chx_sigmask(i32* %12)
ret void
}

LLVM IR (-O2):
define void @sigalrm_handler(i32 %0, i32* nocapture readnone %1, i8* %2) {
%4 = bitcast i8* %2 to i32*
tail call void @chx_timer_expired()
%5 = tail call i32 @chx_sigmask(i32* %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ SEEK_END;
int /*<<< orphan*/ exit(int);
scalar_t__ fseek(int /*<<< orphan*/ *, long, int /*<<< orphan*/);
int /*<<< orphan*/ puts(char *);
void FseekEnd(FILE *fp, long o) {
  if (fseek(fp, o, SEEK_END) != 0) {
    puts("fseek() error!\n");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<FseekEnd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2e99(%rip),%rax
mov    (%rax),%edx
call   1040 <fseek@plt>
cmp    $0x0,%rax
je     1176 <FseekEnd+0x46>
lea    0xe99(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FseekEnd>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%edx
call   1040 <fseek@plt>
test   %rax,%rax
jne    1146 <FseekEnd+0x16>
pop    %rax
ret
lea    0xeb3(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@SEEK_END = global i32 0
@.str = [16 x i8] c"fseek() error!\0A\00"
define void @FseekEnd(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
store i32* %0, i32** %3
store i64 %1, i64* %4
%5 = load i32*, i32** %3
%6 = load i64, i64* %4
%7 = load i32, i32* @SEEK_END
%8 = call i64 @fseek(i32* %5, i64 %6, i32 %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %2
%11 = call i32 @puts(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%12 = call i32 @exit(i32 1)
unreachable
13: ; preds = %2
ret void
}

LLVM IR (-O2):
@SEEK_END = global i32 0
@.str = [16 x i8] c"fseek() error!\0A\00"
define void @FseekEnd(i32* nocapture %0, i64 %1) {
%3 = load i32, i32* @SEEK_END
%4 = tail call i64 @fseek(i32* %0, i64 %1, i32 %3)
%5 = icmp eq i64 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %2
%7 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%8 = tail call i32 @exit(i32 1)
unreachable
9: ; preds = %2
ret void
}
void *spin(void *volatile *p) {
  int patience = 100;
  void *v = *p;
  while (!v && patience-- > 0) {
    v = *p;
    __asm__("pause");
  }
  return v;
}


x86 assembly (clang, -O0):
<spin>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x64,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x18(%rbp)
mov    %al,-0x19(%rbp)
jne    113e <spin+0x3e>
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
setg   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
test   $0x1,%al
jne    114e <spin+0x4e>
jmp    1160 <spin+0x60>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
pause
jmp    111a <spin+0x1a>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spin>:
mov    (%rdi),%rax
test   %rax,%rax
jne    1124 <spin+0x24>
mov    $0x64,%ecx
nopl   (%rax)
mov    (%rdi),%rax
pause
test   %rax,%rax
jne    1124 <spin+0x24>
lea    -0x1(%rcx),%edx
cmp    $0x1,%ecx
mov    %edx,%ecx
ja     1110 <spin+0x10>
ret

LLVM IR (-O0):
define i8* @spin(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
%4 = alloca i8*
store i8** %0, i8*** %2
store i32 100, i32* %3
%5 = load i8**, i8*** %2
%6 = load volatile i8*, i8** %5
store i8* %6, i8** %4
br label %7
7: ; preds = %16, %1
%8 = load i8*, i8** %4
%9 = icmp ne i8* %8, null
br i1 %9, label %14, label %10
10: ; preds = %7
%11 = load i32, i32* %3
%12 = add nsw i32 %11, -1
store i32 %12, i32* %3
%13 = icmp sgt i32 %11, 0
br label %14
14: ; preds = %10, %7
%15 = phi i1 [ false, %7 ], [ %13, %10 ]
br i1 %15, label %16, label %19
16: ; preds = %14
%17 = load i8**, i8*** %2
%18 = load volatile i8*, i8** %17
store i8* %18, i8** %4
br label %7
19: ; preds = %14
%20 = load i8*, i8** %4
ret i8* %20
}

LLVM IR (-O2):
define i8* @spin(i8** %0) {
%2 = load volatile i8*, i8** %0
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %11
4: ; preds = %1, %4
%5 = phi i32 [ %6, %4 ], [ 100, %1 ]
%6 = add nsw i32 %5, -1
%7 = load volatile i8*, i8** %0
tail call void asm sideeffect "pause", "~{dirflag},~{fpsr},~{flags}"()
%8 = icmp eq i8* %7, null
%9 = icmp ugt i32 %5, 1
%10 = select i1 %8, i1 %9, i1 false
br i1 %10, label %4, label %11
11: ; preds = %4, %1
%12 = phi i8* [ %2, %1 ], [ %7, %4 ]
ret i8* %12
}
/* Variables and functions */
int *malloc(int);
int main(void) {
  volatile int *a = malloc(1000);
  a[0] = 0;
  return a[0];
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x3e8,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x3e8,%edi
call   1030 <malloc@plt>
movl   $0x0,(%rax)
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32 0, i32* %1
%3 = call i32* @malloc(i32 1000)
store i32* %3, i32** %2
%4 = load i32*, i32** %2
%5 = getelementptr inbounds i32, i32* %4, i64 0
store volatile i32 0, i32* %5
%6 = load i32*, i32** %2
%7 = getelementptr inbounds i32, i32* %6, i64 0
%8 = load volatile i32, i32* %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32* @malloc(i32 1000)
store volatile i32 0, i32* %1
%2 = load volatile i32, i32* %1
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ Z_BEST_COMPRESSION;
int /*<<< orphan*/ png_write_palette_based2(char const *, unsigned char *,
                                            unsigned int, unsigned int, int,
                                            int /*<<< orphan*/);
void png_write_palette_based(const char *filename, unsigned char *data,
                             unsigned width, unsigned height, int numcolors) {
  png_write_palette_based2(filename, data, width, height, numcolors,
                           Z_BEST_COMPRESSION);
}


x86 assembly (clang, -O0):
<png_write_palette_based>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
mov    -0x1c(%rbp),%r8d
mov    0x2ea5(%rip),%rax
mov    (%rax),%r9d
call   1030 <png_write_palette_based2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<png_write_palette_based>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%r9d
jmp    1030 <png_write_palette_based2@plt>

LLVM IR (-O0):
@Z_BEST_COMPRESSION = global i32 0
define void @png_write_palette_based(i8* %0, i8* %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i8*, i8** %6
%12 = load i8*, i8** %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = load i32, i32* @Z_BEST_COMPRESSION
%17 = call i32 @png_write_palette_based2(i8* %11, i8* %12, i32 %13, i32 %14, i32 %15, i32 %16)
ret void
}

LLVM IR (-O2):
@Z_BEST_COMPRESSION = global i32 0
define void @png_write_palette_based(i8* %0, i8* %1, i32 %2, i32 %3, i32 %4) {
%6 = load i32, i32* @Z_BEST_COMPRESSION
%7 = tail call i32 @png_write_palette_based2(i8* %0, i8* %1, i32 %2, i32 %3, i32 %4, i32 %6)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ __builtin_rdctl(int);
uint32_t _Nios2_Get_ctlreg_ienable(void) {
  return (uint32_t)__builtin_rdctl(3);
}


x86 assembly (clang, -O0):
<_Nios2_Get_ctlreg_ienable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <__builtin_rdctl@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Nios2_Get_ctlreg_ienable>:
mov    $0x3,%edi
jmp    1030 <__builtin_rdctl@plt>

LLVM IR (-O0):
define i32 @_Nios2_Get_ctlreg_ienable() {
%1 = call i32 @__builtin_rdctl(i32 3)
ret i32 %1
}

LLVM IR (-O2):
define i32 @_Nios2_Get_ctlreg_ienable() {
%1 = tail call i32 @__builtin_rdctl(i32 3)
ret i32 %1
}
/* Variables and functions */
double DBL_EPSILON;
int doubles_equal(double a, double b) {
  double error_b = b * DBL_EPSILON;
  return (a >= b - error_b) && (a <= b + error_b);
}


x86 assembly (clang, -O0):
<doubles_equal>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    0x2ece(%rip),%rax
mulsd  (%rax),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
subsd  -0x18(%rbp),%xmm1
xor    %eax,%eax
ucomisd %xmm1,%xmm0
mov    %al,-0x19(%rbp)
jb     115a <doubles_equal+0x5a>
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
addsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
setae  %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<doubles_equal>:
mov    0x2ee1(%rip),%rax
movsd  (%rax),%xmm2
mulsd  %xmm1,%xmm2
movapd %xmm1,%xmm3
subsd  %xmm2,%xmm3
ucomisd %xmm3,%xmm0
setae  %al
addsd  %xmm1,%xmm2
ucomisd %xmm0,%xmm2
setae  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
@DBL_EPSILON = global double 0.000000e+00
define i32 @doubles_equal(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %4
%7 = load double, double* @DBL_EPSILON
%8 = fmul double %6, %7
store double %8, double* %5
%9 = load double, double* %3
%10 = load double, double* %4
%11 = load double, double* %5
%12 = fsub double %10, %11
%13 = fcmp oge double %9, %12
br i1 %13, label %14, label %20
14: ; preds = %2
%15 = load double, double* %3
%16 = load double, double* %4
%17 = load double, double* %5
%18 = fadd double %16, %17
%19 = fcmp ole double %15, %18
br label %20
20: ; preds = %14, %2
%21 = phi i1 [ false, %2 ], [ %19, %14 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
@DBL_EPSILON = global double 0.000000e+00
define i32 @doubles_equal(double %0, double %1) {
%3 = load double, double* @DBL_EPSILON
%4 = fmul double %3, %1
%5 = fsub double %1, %4
%6 = fcmp ole double %5, %0
%7 = fadd double %4, %1
%8 = fcmp oge double %7, %0
%9 = and i1 %6, %8
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Variables and functions */
void *realloc(void *, size_t);
void *m_try_realloc(void *ptr, size_t size) { return realloc(ptr, size); }


x86 assembly (clang, -O0):
<m_try_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <realloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m_try_realloc>:
jmp    1030 <realloc@plt>

LLVM IR (-O0):
define i8* @m_try_realloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i8* @realloc(i8* %5, i64 %6)
ret i8* %7
}

LLVM IR (-O2):
define noalias i8* @m_try_realloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ invoked_tests();
void all_tests(void) { invoked_tests(); }


x86 assembly (clang, -O0):
<all_tests>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <invoked_tests@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<all_tests>:
xor    %eax,%eax
jmp    1030 <invoked_tests@plt>

LLVM IR (-O0):
define void @all_tests() {
%1 = call i32 (...) @invoked_tests()
ret void
}

LLVM IR (-O2):
define void @all_tests() {
%1 = tail call i32 (...) @invoked_tests()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ol(char *);
bnot() { ol("notl %eax"); }


x86 assembly (clang, -O0):
<bnot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <ol@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bnot>:
lea    0xee9(%rip),%rdi
jmp    1030 <ol@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"notl %eax\00"
define i32 @bnot() {
%1 = alloca i32
%2 = call i32 @ol(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [10 x i8] c"notl %eax\00"
define i32 @bnot() {
%1 = tail call i32 @ol(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ print_error(char *, unsigned long long const,
                               unsigned long long const);
int values_equal_display_error(const unsigned long long left,
                               const unsigned long long right) {
  const int equal = left == right;
  if (!equal) {
    print_error("%llx"
                " != "
                "%llx"
                "\n",
                left, right);
  }
  return equal;
}


x86 assembly (clang, -O0):
<values_equal_display_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    1151 <values_equal_display_error+0x41>
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xeb4(%rip),%rdi
call   1030 <print_error@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<values_equal_display_error>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
cmp    %rsi,%rdi
je     1131 <values_equal_display_error+0x21>
lea    0xeda(%rip),%rdi
mov    %rbx,%rsi
mov    %r14,%rdx
call   1030 <print_error@plt>
xor    %eax,%eax
cmp    %r14,%rbx
sete   %al
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [14 x i8] c"%llx != %llx\0A\00"
define i32 @values_equal_display_error(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i32
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = icmp eq i64 %6, %7
%9 = zext i1 %8 to i32
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = icmp ne i32 %10, 0
br i1 %11, label %16, label %12
12: ; preds = %2
%13 = load i64, i64* %3
%14 = load i64, i64* %4
%15 = call i32 @print_error(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i64 %13, i64 %14)
br label %16
16: ; preds = %12, %2
%17 = load i32, i32* %5
ret i32 %17
}

LLVM IR (-O2):
@.str = [14 x i8] c"%llx != %llx\0A\00"
define i32 @values_equal_display_error(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 @print_error(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i64 %0, i64 %1)
br label %6
6: ; preds = %4, %2
%7 = zext i1 %3 to i32
ret i32 %7
}
int il_times(int value, int index, int x) { return value * x; }


x86 assembly (clang, -O0):
<il_times>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
imul   -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<il_times>:
mov    %edi,%eax
imul   %edx,%eax
ret

LLVM IR (-O0):
define i32 @il_times(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %6
%9 = mul nsw i32 %7, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @il_times(i32 %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %2, %0
ret i32 %4
}
/* Variables and functions */
int execl(char *, char *, int /*<<< orphan*/ *);
int /*<<< orphan*/ perror(char *);
int main() {
  int ret;
  ret = execl("/bin/vi2", "vi", NULL);
  if (ret == -1) {
    perror("execl");
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    0xecc(%rip),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1040 <execl@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0xffffffff,-0x8(%rbp)
jne    115f <main+0x3f>
lea    0xeb2(%rip),%rdi
call   1030 <perror@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xeda(%rip),%rsi
xor    %edx,%edx
call   1040 <execl@plt>
cmp    $0xffffffff,%eax
je     113f <main+0x1f>
xor    %eax,%eax
pop    %rcx
ret
lea    0xec6(%rip),%rdi
call   1030 <perror@plt>
jmp    113b <main+0x1b>

LLVM IR (-O0):
@.str = [9 x i8] c"/bin/vi2\00"
@.str.1 = [3 x i8] c"vi\00"
@.str.2 = [6 x i8] c"execl\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @execl(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* null)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @perror(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0))
br label %8
8: ; preds = %6, %0
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
@.str = [9 x i8] c"/bin/vi2\00"
@.str.1 = [3 x i8] c"vi\00"
@.str.2 = [6 x i8] c"execl\00"
define i32 @main() {
%1 = tail call i32 @execl(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* null)
%2 = icmp eq i32 %1, -1
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @perror(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
ret i32 0
}
int wakeup_sysfs_add(struct device *dev) { return 0; }


x86 assembly (clang, -O0):
<wakeup_sysfs_add>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wakeup_sysfs_add>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.device = type opaque
define i32 @wakeup_sysfs_add(%struct.device* %0) {
%2 = alloca %struct.device*
store %struct.device* %0, %struct.device** %2
ret i32 0
}

LLVM IR (-O2):
%struct.device = type opaque
define i32 @wakeup_sysfs_add(%struct.device* nocapture readnone %0) {
ret i32 0
}
char *hash_plugin_summary(void) { return ("apr1 \t\tApache apr1 plugin"); }


x86 assembly (clang, -O0):
<hash_plugin_summary>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_plugin_summary>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [26 x i8] c"apr1 \09\09Apache apr1 plugin\00"
define i8* @hash_plugin_summary() {
ret i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [26 x i8] c"apr1 \09\09Apache apr1 plugin\00"
define i8* @hash_plugin_summary() {
ret i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int Division(int, int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ puts(char *);
void DivisionCall(int a, int b) {
  if (b != 0)
    printf("%d", Division(a, b));
  else
    puts("Division by zero is not allowed");
}


x86 assembly (clang, -O0):
<DivisionCall>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1166 <DivisionCall+0x36>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <Division@plt>
mov    %eax,%esi
lea    0xea4(%rip),%rdi
call   1050 <printf@plt>
jmp    1172 <DivisionCall+0x42>
lea    0xe96(%rip),%rdi
call   1030 <puts@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DivisionCall>:
test   %esi,%esi
je     1149 <DivisionCall+0x19>
push   %rax
call   1040 <Division@plt>
lea    0xebf(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1050 <printf@plt>
lea    0xeb3(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [32 x i8] c"Division by zero is not allowed\00"
define void @DivisionCall(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %2
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @Division(i32 %8, i32 %9)
%11 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %10)
br label %14
12: ; preds = %2
%13 = call i32 @puts(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.1, i64 0, i64 0))
br label %14
14: ; preds = %12, %7
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [32 x i8] c"Division by zero is not allowed\00"
define void @DivisionCall(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = tail call i32 @Division(i32 %0, i32 %1)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %5)
br label %9
7: ; preds = %2
%8 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @.str.1, i64 0, i64 0))
br label %9
9: ; preds = %7, %4
ret void
}
/* Variables and functions */
int O_CREAT;
int O_WRONLY;
int /*<<< orphan*/ close(int);
int open(char *, int, int);
int /*<<< orphan*/ write(int, char *, int);
void wrt(char *name, char *ptr, int len) {
  int ofd = open(name, O_WRONLY | O_CREAT, 0660);
  write(ofd, ptr, len);
  close(ofd);
}


x86 assembly (clang, -O0):
<wrt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e82(%rip),%rax
mov    (%rax),%esi
mov    0x2ea1(%rip),%rax
or     (%rax),%esi
mov    $0x1b0,%edx
call   1050 <open@plt>
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <write@plt>
mov    -0x18(%rbp),%edi
call   1040 <close@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrt>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    0x2e8f(%rip),%rax
mov    0x2eb0(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
mov    $0x1b0,%edx
call   1050 <open@plt>
mov    %eax,%ebp
mov    %eax,%edi
mov    %rbx,%rsi
mov    %r14d,%edx
call   1030 <write@plt>
mov    %ebp,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <close@plt>

LLVM IR (-O0):
@O_WRONLY = global i32 0
@O_CREAT = global i32 0
define void @wrt(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
%9 = load i32, i32* @O_WRONLY
%10 = load i32, i32* @O_CREAT
%11 = or i32 %9, %10
%12 = call i32 @open(i8* %8, i32 %11, i32 432)
store i32 %12, i32* %7
%13 = load i32, i32* %7
%14 = load i8*, i8** %5
%15 = load i32, i32* %6
%16 = call i32 @write(i32 %13, i8* %14, i32 %15)
%17 = load i32, i32* %7
%18 = call i32 @close(i32 %17)
ret void
}

LLVM IR (-O2):
@O_WRONLY = global i32 0
@O_CREAT = global i32 0
define void @wrt(i8* nocapture %0, i8* nocapture %1, i32 %2) {
%4 = load i32, i32* @O_WRONLY
%5 = load i32, i32* @O_CREAT
%6 = or i32 %5, %4
%7 = tail call i32 @open(i8* %0, i32 %6, i32 432)
%8 = tail call i32 @write(i32 %7, i8* %1, i32 %2)
%9 = tail call i32 @close(i32 %7)
ret void
}
void test_23_0(char *mem) { __atomic_fetch_add(mem, 1, 4); }


x86 assembly (clang, -O0):
<test_23_0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
movb   $0x1,-0x9(%rbp)
mov    -0x9(%rbp),%al
lock xadd %al,(%rcx)
mov    %al,-0xa(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_23_0>:
lock addb $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @test_23_0(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
%4 = alloca i8
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8 1, i8* %3
%6 = load i8, i8* %3
%7 = atomicrmw add i8* %5, i8 %6 acq_rel
store i8 %7, i8* %4
%8 = load i8, i8* %4
ret void
}

LLVM IR (-O2):
define void @test_23_0(i8* nocapture %0) {
%2 = atomicrmw add i8* %0, i8 1 acq_rel
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, int /*<<< orphan*/ *, int);
void bitstream_write_uint32(char **b, uint32_t value) {
  memcpy(*b, &value, sizeof(uint32_t));
  *b += sizeof(uint32_t);
}


x86 assembly (clang, -O0):
<bitstream_write_uint32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
lea    -0xc(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x4,%rcx
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitstream_write_uint32>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %esi,0xc(%rsp)
mov    (%rdi),%rdi
lea    0xc(%rsp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
addq   $0x4,(%rbx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @bitstream_write_uint32(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
%5 = load i8**, i8*** %3
%6 = load i8*, i8** %5
%7 = call i32 @memcpy(i8* %6, i32* %4, i32 4)
%8 = load i8**, i8*** %3
%9 = load i8*, i8** %8
%10 = getelementptr inbounds i8, i8* %9, i64 4
store i8* %10, i8** %8
ret void
}

LLVM IR (-O2):
define void @bitstream_write_uint32(i8** nocapture %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = load i8*, i8** %0
%5 = call i32 @memcpy(i8* %4, i32* %3, i32 4)
%6 = load i8*, i8** %0
%7 = getelementptr inbounds i8, i8* %6, i64 4
store i8* %7, i8** %0
ret void
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int initialize_dobldobl_homotopy(int fixed_gamma) {
  int fail, *b;
  double *c;
  fail = _ada_use_c2phc(501, &fixed_gamma, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<initialize_dobldobl_homotopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x1f5,%edi
lea    -0x4(%rbp),%rsi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_dobldobl_homotopy>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x1f5,%edi
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @initialize_dobldobl_homotopy(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32*
%5 = alloca double*
store i32 %0, i32* %2
%6 = load i32*, i32** %4
%7 = load double*, double** %5
%8 = call i32 @_ada_use_c2phc(i32 501, i32* %2, i32* %6, double* %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @initialize_dobldobl_homotopy(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @_ada_use_c2phc(i32 501, i32* %2, i32* undef, double* undef)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ pipe(int *);
void fill_first_3_handles() {
  int tmp_pipe1[2];
  int tmp_pipe2[2];
  pipe(tmp_pipe1);
  pipe(tmp_pipe2);
  close(tmp_pipe2[1]);
}


x86 assembly (clang, -O0):
<fill_first_3_handles>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
call   1040 <pipe@plt>
lea    -0x10(%rbp),%rdi
call   1040 <pipe@plt>
mov    -0xc(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fill_first_3_handles>:
sub    $0x18,%rsp
lea    0x10(%rsp),%rdi
call   1040 <pipe@plt>
lea    0x8(%rsp),%rdi
call   1040 <pipe@plt>
mov    0xc(%rsp),%edi
call   1030 <close@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @fill_first_3_handles() {
%1 = alloca [2 x i32]
%2 = alloca [2 x i32]
%3 = getelementptr inbounds [2 x i32], [2 x i32]* %1, i64 0, i64 0
%4 = call i32 @pipe(i32* %3)
%5 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 0
%6 = call i32 @pipe(i32* %5)
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 1
%8 = load i32, i32* %7
%9 = call i32 @close(i32 %8)
ret void
}

LLVM IR (-O2):
define void @fill_first_3_handles() {
%1 = alloca [2 x i32]
%2 = alloca [2 x i32]
%3 = bitcast [2 x i32]* %1 to i8*
%4 = bitcast [2 x i32]* %2 to i8*
%5 = getelementptr inbounds [2 x i32], [2 x i32]* %1, i64 0, i64 0
%6 = call i32 @pipe(i32* %5)
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 0
%8 = call i32 @pipe(i32* %7)
%9 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 1
%10 = load i32, i32* %9
%11 = call i32 @close(i32 %10)
ret void
}
void wifi_rsp_hardware_rtc_set_time(
    const struct wifi_msg_hardware_rtc_set_time_rsp_t *msg) {}


x86 assembly (clang, -O0):
<wifi_rsp_hardware_rtc_set_time>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifi_rsp_hardware_rtc_set_time>:
ret

LLVM IR (-O0):
%struct.wifi_msg_hardware_rtc_set_time_rsp_t = type opaque
define void @wifi_rsp_hardware_rtc_set_time(%struct.wifi_msg_hardware_rtc_set_time_rsp_t* %0) {
%2 = alloca %struct.wifi_msg_hardware_rtc_set_time_rsp_t*
store %struct.wifi_msg_hardware_rtc_set_time_rsp_t* %0, %struct.wifi_msg_hardware_rtc_set_time_rsp_t** %2
ret void
}

LLVM IR (-O2):
%struct.wifi_msg_hardware_rtc_set_time_rsp_t = type opaque
define void @wifi_rsp_hardware_rtc_set_time(%struct.wifi_msg_hardware_rtc_set_time_rsp_t* nocapture %0) {
ret void
}
/* Variables and functions */
int read(int, char *, int);
long long du(int fd) {
  char c;
  long long ll = 0;
  while (read(fd, &c, 1) == 1) {
    ll++;
  }
  return (ll);
}


x86 assembly (clang, -O0):
<du>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x5(%rbp),%rsi
mov    $0x1,%edx
call   1030 <read@plt>
cmp    $0x1,%eax
jne    114e <du+0x3e>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1123 <du+0x13>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<du>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebp
mov    $0xffffffffffffffff,%rbx
lea    0xf(%rsp),%r14
cs nopw 0x0(%rax,%rax,1)
mov    %ebp,%edi
mov    %r14,%rsi
mov    $0x1,%edx
call   1030 <read@plt>
add    $0x1,%rbx
cmp    $0x1,%eax
je     1130 <du+0x20>
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i64 @du(i32 %0) {
%2 = alloca i32
%3 = alloca i8
%4 = alloca i64
store i32 %0, i32* %2
store i64 0, i64* %4
br label %5
5: ; preds = %9, %1
%6 = load i32, i32* %2
%7 = call i32 @read(i32 %6, i8* %3, i32 1)
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = load i64, i64* %4
%11 = add nsw i64 %10, 1
store i64 %11, i64* %4
br label %5
12: ; preds = %5
%13 = load i64, i64* %4
ret i64 %13
}

LLVM IR (-O2):
define i64 @du(i32 %0) {
%2 = alloca i8
br label %3
3: ; preds = %3, %1
%4 = phi i64 [ 0, %1 ], [ %7, %3 ]
%5 = call i32 @read(i32 %0, i8* %2, i32 1)
%6 = icmp eq i32 %5, 1
%7 = add nuw nsw i64 %4, 1
br i1 %6, label %3, label %8
8: ; preds = %3
ret i64 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
size_t fread(void *, size_t, size_t, int /*<<< orphan*/ *);
size_t hoof_hook_fread(void *ptr, size_t size, size_t nmemb, FILE *stream) {
  return fread(ptr, size, nmemb, stream);
}


x86 assembly (clang, -O0):
<hoof_hook_fread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <fread@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hoof_hook_fread>:
jmp    1030 <fread@plt>

LLVM IR (-O0):
define i64 @hoof_hook_fread(i8* %0, i64 %1, i64 %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i32*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i32* %3, i32** %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = load i64, i64* %7
%12 = load i32*, i32** %8
%13 = call i64 @fread(i8* %9, i64 %10, i64 %11, i32* %12)
ret i64 %13
}

LLVM IR (-O2):
define i64 @hoof_hook_fread(i8* nocapture %0, i64 %1, i64 %2, i32* nocapture %3) {
%5 = tail call i64 @fread(i8* %0, i64 %1, i64 %2, i32* %3)
ret i64 %5
}
int strcmp(const char *a, const char *b) {
  while ((*a) == (*b)) {
    if (*a == 0)
      return 0;
    a++;
    b++;
  };
  return 1;
}


x86 assembly (clang, -O0):
<strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    -0x18(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jne    115b <strcmp+0x5b>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    113e <strcmp+0x3e>
movl   $0x0,-0x4(%rbp)
jmp    1162 <strcmp+0x62>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    110c <strcmp+0xc>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp>:
mov    (%rdi),%cl
mov    $0x1,%eax
cmp    (%rsi),%cl
jne    1124 <strcmp+0x24>
mov    $0x1,%edx
test   %cl,%cl
je     1125 <strcmp+0x25>
movzbl (%rdi,%rdx,1),%ecx
lea    0x1(%rdx),%r8
cmp    (%rsi,%rdx,1),%cl
mov    %r8,%rdx
je     1110 <strcmp+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
br label %6
6: ; preds = %20, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i8*, i8** %5
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %9, %12
br i1 %13, label %14, label %25
14: ; preds = %6
%15 = load i8*, i8** %4
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %14
store i32 0, i32* %3
br label %26
20: ; preds = %14
%21 = load i8*, i8** %4
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %4
%23 = load i8*, i8** %5
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %5
br label %6
25: ; preds = %6
store i32 1, i32* %3
br label %26
26: ; preds = %25, %19
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @strcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
%5 = icmp eq i8 %3, %4
br i1 %5, label %6, label %17
6: ; preds = %2, %11
%7 = phi i8 [ %14, %11 ], [ %3, %2 ]
%8 = phi i8* [ %13, %11 ], [ %1, %2 ]
%9 = phi i8* [ %12, %11 ], [ %0, %2 ]
%10 = icmp eq i8 %7, 0
br i1 %10, label %17, label %11
11: ; preds = %6
%12 = getelementptr inbounds i8, i8* %9, i64 1
%13 = getelementptr inbounds i8, i8* %8, i64 1
%14 = load i8, i8* %12
%15 = load i8, i8* %13
%16 = icmp eq i8 %14, %15
br i1 %16, label %6, label %17
17: ; preds = %6, %11, %2
%18 = phi i32 [ 1, %2 ], [ 1, %11 ], [ 0, %6 ]
ret i32 %18
}
int Media_Stop() { return 1; }


x86 assembly (clang, -O0):
<Media_Stop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Media_Stop>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @Media_Stop() {
ret i32 1
}

LLVM IR (-O2):
define i32 @Media_Stop() {
ret i32 1
}
void WriteROM4K(void) {}


x86 assembly (clang, -O0):
<WriteROM4K>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WriteROM4K>:
ret

LLVM IR (-O0):
define void @WriteROM4K() {
ret void
}

LLVM IR (-O2):
define void @WriteROM4K() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ *, int);
void memcpy_wrapper(int64_t *dst, int64_t *src, int size) {
  memcpy(dst, src, size);
}


x86 assembly (clang, -O0):
<memcpy_wrapper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcpy_wrapper>:
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @memcpy_wrapper(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32*, i32** %5
%9 = load i32, i32* %6
%10 = call i32 @memcpy(i32* %7, i32* %8, i32 %9)
ret void
}

LLVM IR (-O2):
define void @memcpy_wrapper(i32* %0, i32* %1, i32 %2) {
%4 = tail call i32 @memcpy(i32* %0, i32* %1, i32 %2)
ret void
}
/* Variables and functions */
unsigned char *sha256_buffer(unsigned char *, unsigned char const *, size_t);
unsigned char *hash_buffer_sha256(unsigned char *out, const unsigned char *in,
                                  size_t in_len) {
  return sha256_buffer(out, in, in_len);
}


x86 assembly (clang, -O0):
<hash_buffer_sha256>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <sha256_buffer@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_buffer_sha256>:
jmp    1030 <sha256_buffer@plt>

LLVM IR (-O0):
define i8* @hash_buffer_sha256(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i8* @sha256_buffer(i8* %7, i8* %8, i64 %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @hash_buffer_sha256(i8* %0, i8* %1, i64 %2) {
%4 = tail call i8* @sha256_buffer(i8* %0, i8* %1, i64 %2)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ _I8080_DAA();
void do0x27() { _I8080_DAA(); }


x86 assembly (clang, -O0):
<do0x27>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_I8080_DAA@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<do0x27>:
xor    %eax,%eax
jmp    1030 <_I8080_DAA@plt>

LLVM IR (-O0):
define void @do0x27() {
%1 = call i32 (...) @_I8080_DAA()
ret void
}

LLVM IR (-O2):
define void @do0x27() {
%1 = tail call i32 (...) @_I8080_DAA()
ret void
}
/* Variables and functions */
int get_symmetric_letter(char);
char getchar();
int /*<<< orphan*/ printf(char *, int);
int main() {
  char input_letter = getchar();
  printf("%c\n", get_symmetric_letter(input_letter));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <getchar@plt>
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%edi
call   1030 <get_symmetric_letter@plt>
mov    %eax,%esi
lea    0xea5(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <getchar@plt>
movsbl %al,%edi
call   1030 <get_symmetric_letter@plt>
lea    0xeb9(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%c\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
%3 = call signext i8 (...) @getchar()
store i8 %3, i8* %2
%4 = load i8, i8* %2
%5 = call i32 @get_symmetric_letter(i8 signext %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%c\0A\00"
define i32 @main() {
%1 = tail call signext i8 (...) @getchar()
%2 = tail call i32 @get_symmetric_letter(i8 signext %1)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}
int main(int n) {
  for (int n = 0; n < 1; n++) {
    int n;
    return 0;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jge    1126 <main+0x26>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %2
store i32 %0, i32* %3
store i32 0, i32* %4
br label %6
6: ; preds = %10, %1
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 1
br i1 %8, label %9, label %13
9: ; preds = %6
store i32 0, i32* %2
br label %13
10: ; No predecessors!
%11 = load i32, i32* %4
%12 = add nsw i32 %11, 1
store i32 %12, i32* %4
br label %6
13: ; preds = %9, %6
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @main(i32 %0) {
ret i32 0
}
double test1(double x) {
  return __real __builtin_cexp(x * (__extension__ 1.0iF));
}


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm2,%xmm2
movaps %xmm0,%xmm1
mulsd  %xmm2,%xmm1
movsd  0xecc(%rip),%xmm2
mulsd  %xmm2,%xmm0
movsd  %xmm1,-0x18(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <cexp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
movapd %xmm0,%xmm1
xorpd  %xmm0,%xmm0
mulsd  %xmm1,%xmm0
jmp    1030 <cexp@plt>

LLVM IR (-O0):
define double @test1(double %0) {
%2 = alloca double
%3 = alloca { double, double }
store double %0, double* %2
%4 = load double, double* %2
%5 = fmul double %4, 0.000000e+00
%6 = fmul double %4, 1.000000e+00
%7 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 0
%8 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 1
store double %5, double* %7
store double %6, double* %8
%9 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 0
%10 = load double, double* %9
%11 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 1
%12 = load double, double* %11
%13 = call { double, double } @cexp(double %10, double %12)
%14 = extractvalue { double, double } %13, 0
%15 = extractvalue { double, double } %13, 1
ret double %14
}

LLVM IR (-O2):
define double @test1(double %0) {
%2 = fmul double %0, 0.000000e+00
%3 = tail call { double, double } @cexp(double %2, double %0)
%4 = extractvalue { double, double } %3, 0
ret double %4
}