xunge/DecIR huggingface dataset:
/* Variables and functions */
int Separa(int, int, int *);
void Quicksort(int p, int r, int v[]) {
  int j;
  if (p < r) {
    j = Separa(p, r, v);
    Quicksort(p, j - 1, v);
    Quicksort(j + 1, r, v);
  }
}


x86 assembly (clang, -O0):
<Quicksort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1174 <Quicksort+0x54>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1040 <Separa@plt>
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x14(%rbp),%esi
sub    $0x1,%esi
mov    -0x10(%rbp),%rdx
call   1030 <Quicksort@plt>
mov    -0x14(%rbp),%edi
add    $0x1,%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1030 <Quicksort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Quicksort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %esi,%edi
jge    1166 <Quicksort+0x46>
mov    %rdx,%r14
mov    %esi,%r15d
mov    %edi,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %ebx,%edi
mov    %r15d,%esi
mov    %r14,%rdx
call   1040 <Separa@plt>
mov    %eax,%ebp
lea    -0x1(%rbp),%esi
mov    %ebx,%edi
mov    %r14,%rdx
call   1030 <Quicksort@plt>
add    $0x1,%ebp
mov    %ebp,%ebx
cmp    %r15d,%ebp
jl     1140 <Quicksort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @Quicksort(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = load i32*, i32** %6
%15 = call i32 @Separa(i32 %12, i32 %13, i32* %14)
store i32 %15, i32* %7
%16 = load i32, i32* %4
%17 = load i32, i32* %7
%18 = sub nsw i32 %17, 1
%19 = load i32*, i32** %6
%20 = load i32, i32* %7
%21 = add nsw i32 %20, 1
%22 = load i32, i32* %5
%23 = load i32*, i32** %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @Quicksort(i32 %0, i32 %1, i32* %2) {
%4 = icmp slt i32 %0, %1
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %0, %3 ]
%7 = tail call i32 @Separa(i32 %6, i32 %1, i32* %2)
%8 = add nsw i32 %7, -1
tail call void @Quicksort(i32 %6, i32 %8, i32* %2)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %1
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo(int /*<<< orphan*/, int /*<<< orphan*/,
                       int /*<<< orphan*/, int /*<<< orphan*/,
                       int /*<<< orphan*/);
int main() {
  foo(0, 0, 0, 0, 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %r8d,%r8d
mov    %r8d,%edi
mov    %r8d,%esi
mov    %r8d,%edx
mov    %r8d,%ecx
call   1030 <foo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @foo(i32 0, i32 0, i32 0, i32 0, i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @foo(i32 0, i32 0, i32 0, i32 0, i32 0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ cleanUpAndExit(int);
void handleSocketClose() { cleanUpAndExit((227)); }


x86 assembly (clang, -O0):
<handleSocketClose>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe3,%edi
call   1030 <cleanUpAndExit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<handleSocketClose>:
mov    $0xe3,%edi
jmp    1030 <cleanUpAndExit@plt>

LLVM IR (-O0):
define void @handleSocketClose() {
%1 = call i32 @cleanUpAndExit(i32 227)
ret void
}

LLVM IR (-O2):
define void @handleSocketClose() {
%1 = tail call i32 @cleanUpAndExit(i32 227)
ret void
}
int is_armstrong(unsigned n) {
  unsigned bk, tmp, cube;
  bk = n, cube = 0;
  do
    tmp = bk % 10, cube += tmp * tmp * tmp;
  while (bk /= 10);
  return n == cube;
}


x86 assembly (clang, -O0):
<is_armstrong>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
jne    1114 <is_armstrong+0x14>
mov    -0x4(%rbp),%eax
cmp    -0x10(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_armstrong>:
xor    %r9d,%r9d
mov    $0xcccccccd,%r8d
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
mov    %ecx,%esi
imul   %r8,%rsi
shr    $0x23,%rsi
lea    (%rsi,%rsi,1),%eax
lea    (%rax,%rax,4),%eax
mov    %ecx,%edx
sub    %eax,%edx
mov    %edx,%eax
imul   %edx,%eax
imul   %edx,%eax
add    %eax,%r9d
cmp    $0x9,%ecx
mov    %esi,%ecx
ja     1110 <is_armstrong+0x10>
xor    %eax,%eax
cmp    %edi,%r9d
sete   %al
ret

LLVM IR (-O0):
define i32 @is_armstrong(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
store i32 %6, i32* %3
store i32 0, i32* %5
br label %7
7: ; preds = %17, %1
%8 = load i32, i32* %3
%9 = urem i32 %8, 10
store i32 %9, i32* %4
%10 = load i32, i32* %4
%11 = load i32, i32* %4
%12 = mul i32 %10, %11
%13 = load i32, i32* %4
%14 = mul i32 %12, %13
%15 = load i32, i32* %5
%16 = add i32 %15, %14
store i32 %16, i32* %5
br label %17
17: ; preds = %7
%18 = load i32, i32* %3
%19 = udiv i32 %18, 10
store i32 %19, i32* %3
%20 = icmp ne i32 %19, 0
br i1 %20, label %7, label %21
21: ; preds = %17
%22 = load i32, i32* %2
%23 = load i32, i32* %5
%24 = icmp eq i32 %22, %23
%25 = zext i1 %24 to i32
ret i32 %25
}

LLVM IR (-O2):
define i32 @is_armstrong(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ %0, %1 ], [ %9, %2 ]
%4 = phi i32 [ 0, %1 ], [ %8, %2 ]
%5 = urem i32 %3, 10
%6 = mul nuw nsw i32 %5, %5
%7 = mul nuw nsw i32 %6, %5
%8 = add i32 %7, %4
%9 = udiv i32 %3, 10
%10 = icmp ult i32 %3, 10
br i1 %10, label %11, label %2
11: ; preds = %2
%12 = icmp eq i32 %8, %0
%13 = zext i1 %12 to i32
ret i32 %13
}
/* Variables and functions */
scalar_t__ ispunct(char);
scalar_t__ isspace(char);
int word_boundary(char c) { return isspace(c) || ispunct(c); }


x86 assembly (clang, -O0):
<word_boundary>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1040 <isspace@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x2(%rbp)
jne    115c <word_boundary+0x3c>
movsbl -0x1(%rbp),%edi
call   1030 <ispunct@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<word_boundary>:
push   %rbx
mov    %edi,%ebx
call   1040 <isspace@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <word_boundary+0x17>
pop    %rbx
ret
movsbl %bl,%edi
call   1030 <ispunct@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @word_boundary(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @isspace(i8 signext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = call i64 @ispunct(i8 signext %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @word_boundary(i8 signext %0) {
%2 = tail call i64 @isspace(i8 signext %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @ispunct(i8 signext %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ gen(char *);
void cgnot(void) { gen("notq\t%rax"); }


x86 assembly (clang, -O0):
<cgnot>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <gen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgnot>:
lea    0xee9(%rip),%rdi
jmp    1030 <gen@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"notq\09%rax\00"
define void @cgnot() {
%1 = call i32 @gen(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"notq\09%rax\00"
define void @cgnot() {
%1 = tail call i32 @gen(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int f478(int *);
int f479(int *p) { return f478(p); }


x86 assembly (clang, -O0):
<f479>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f478@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f479>:
jmp    1030 <f478@plt>

LLVM IR (-O0):
define i32 @f479(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f478(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f479(i32* %0) {
%2 = tail call i32 @f478(i32* %0)
ret i32 %2
}
void rop3_19_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = *D & T;
  stk1 = S | stk2;
  stk1 = ~stk1;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_19_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xa(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_19_0_0>:
and    (%rdi),%dl
or     %sil,%dl
not    %dl
mov    %dl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_19_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i8, i8* %6
%13 = zext i8 %12 to i32
%14 = and i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %8
%16 = load i8, i8* %5
%17 = zext i8 %16 to i32
%18 = load i8, i8* %8
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
%21 = trunc i32 %20 to i8
store i8 %21, i8* %7
%22 = load i8, i8* %7
%23 = zext i8 %22 to i32
%24 = xor i32 %23, -1
%25 = trunc i32 %24 to i8
store i8 %25, i8* %7
%26 = load i8, i8* %7
%27 = load i8*, i8** %4
store i8 %26, i8* %27
ret void
}

LLVM IR (-O2):
define void @rop3_19_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = and i8 %4, %2
%6 = or i8 %5, %1
%7 = xor i8 %6, -1
store i8 %7, i8* %0
ret void
}
const char *C_Int_Brief(void) { return "Interpret as C Integer"; }


x86 assembly (clang, -O0):
<C_Int_Brief>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<C_Int_Brief>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [23 x i8] c"Interpret as C Integer\00"
define i8* @C_Int_Brief() {
ret i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [23 x i8] c"Interpret as C Integer\00"
define i8* @C_Int_Brief() {
ret i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0)
}
void *test_anti_range_99(unsigned char n) {
  extern void *alloc_anti_range_99(unsigned char)
      __attribute__((alloc_size(1)));
  if (0 <= n && n <= 2)
    n = 0 - 1;
  return alloc_anti_range_99(n);
}


x86 assembly (clang, -O0):
<test_anti_range_99>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    %ecx,%eax
jg     113d <test_anti_range_99+0x2d>
movzbl -0x1(%rbp),%eax
cmp    $0x2,%eax
jg     113d <test_anti_range_99+0x2d>
movb   $0xff,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <alloc_anti_range_99@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_anti_range_99>:
cmp    $0x3,%dil
mov    $0xff,%eax
cmovb  %eax,%edi
jmp    1030 <alloc_anti_range_99@plt>

LLVM IR (-O0):
define i8* @test_anti_range_99(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = icmp sle i32 0, %4
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i8, i8* %2
%8 = zext i8 %7 to i32
%9 = icmp sle i32 %8, 2
br i1 %9, label %10, label %11
10: ; preds = %6
store i8 -1, i8* %2
br label %11
11: ; preds = %10, %6, %1
%12 = load i8, i8* %2
%13 = call i8* @alloc_anti_range_99(i8 zeroext %12)
ret i8* %13
}

LLVM IR (-O2):
define i8* @test_anti_range_99(i8 zeroext %0) {
%2 = icmp ult i8 %0, 3
%3 = select i1 %2, i8 -1, i8 %0
%4 = tail call i8* @alloc_anti_range_99(i8 zeroext %3)
ret i8* %4
}
/* Type definitions */
struct eembed_log {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ eembed_fprintf_context(struct eembed_log *);
int /*<<< orphan*/ eembed_system_fprintf(int /*<<< orphan*/, char *, char);
void eembed_fprintf_append_c(struct eembed_log *log, char c) {
  eembed_system_fprintf(eembed_fprintf_context(log), "%c", c);
}


x86 assembly (clang, -O0):
<eembed_fprintf_append_c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <eembed_fprintf_context@plt>
mov    %eax,%edi
lea    0xebc(%rip),%rsi
movsbl -0x9(%rbp),%edx
call   1030 <eembed_system_fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eembed_fprintf_append_c>:
push   %rbx
mov    %esi,%ebx
call   1040 <eembed_fprintf_context@plt>
lea    0xed1(%rip),%rsi
mov    %eax,%edi
mov    %ebx,%edx
pop    %rbx
jmp    1030 <eembed_system_fprintf@plt>

LLVM IR (-O0):
%struct.eembed_log = type { i32 }
@.str = [3 x i8] c"%c\00"
define void @eembed_fprintf_append_c(%struct.eembed_log* %0, i8 signext %1) {
%3 = alloca %struct.eembed_log*
%4 = alloca i8
store %struct.eembed_log* %0, %struct.eembed_log** %3
store i8 %1, i8* %4
%5 = load %struct.eembed_log*, %struct.eembed_log** %3
%6 = call i32 @eembed_fprintf_context(%struct.eembed_log* %5)
%7 = load i8, i8* %4
%8 = call i32 @eembed_system_fprintf(i32 %6, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %7)
ret void
}

LLVM IR (-O2):
%struct.eembed_log = type { i32 }
@.str = [3 x i8] c"%c\00"
define void @eembed_fprintf_append_c(%struct.eembed_log* %0, i8 signext %1) {
%3 = tail call i32 @eembed_fprintf_context(%struct.eembed_log* %0)
%4 = tail call i32 @eembed_system_fprintf(i32 %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ matrix_copy(double **, double **, int, int);
double **new_matrix2(int, int);
double **matrix_clone(double **X, int n, int m) {
  double **Y = new_matrix2(n, m);
  matrix_copy(Y, X, n, m);
  return Y;
}


x86 assembly (clang, -O0):
<matrix_clone>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1040 <new_matrix2@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1030 <matrix_copy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<matrix_clone>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r15d
mov    %esi,%ebp
mov    %rdi,%r14
mov    %esi,%edi
mov    %edx,%esi
call   1040 <new_matrix2@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %ebp,%edx
mov    %r15d,%ecx
call   1030 <matrix_copy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define double** @matrix_clone(double** %0, i32 %1, i32 %2) {
%4 = alloca double**
%5 = alloca i32
%6 = alloca i32
%7 = alloca double**
store double** %0, double*** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call double** @new_matrix2(i32 %8, i32 %9)
store double** %10, double*** %7
%11 = load double**, double*** %7
%12 = load double**, double*** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @matrix_copy(double** %11, double** %12, i32 %13, i32 %14)
%16 = load double**, double*** %7
ret double** %16
}

LLVM IR (-O2):
define double** @matrix_clone(double** %0, i32 %1, i32 %2) {
%4 = tail call double** @new_matrix2(i32 %1, i32 %2)
%5 = tail call i32 @matrix_copy(double** %4, double** %0, i32 %1, i32 %2)
ret double** %4
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int /*<<< orphan*/ sigemptyset(int /*<<< orphan*/ *);
int sigwait(int /*<<< orphan*/ *, int *);
int test(void) {
  sigset_t set;
  int sig;
  int result;
  (void)sigemptyset(&set);
  result = sigwait(&set, &sig);
  return result;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
call   1030 <sigemptyset@plt>
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <sigwait@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
call   1030 <sigemptyset@plt>
lea    0x8(%rsp),%rsi
mov    %rbx,%rdi
call   1040 <sigwait@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @test() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = call i32 @sigemptyset(i32* %1)
%5 = call i32 @sigwait(i32* %1, i32* %2)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @test() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @sigemptyset(i32* %1)
%6 = call i32 @sigwait(i32* %1, i32* %2)
ret i32 %6
}
/* Type definitions */
typedef int wint_t;

/* Variables and functions */
wint_t btowc(int c) { return c; }


x86 assembly (clang, -O0):
<btowc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<btowc>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @btowc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @btowc(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int main(void) {
  while (true) {
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
jmp    110b <main+0xb>

x86 assembly (clang, -O2):
<main>:
jmp    1100 <main>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int syscon_quaddobl_multi_homogenization(int n, int m, int *idz, int lintype) {
  int fail;
  int pars[3];
  double *c;
  pars[0] = n;
  pars[1] = m;
  pars[2] = lintype;
  fail = _ada_use_c2phc4c(906, pars, idz, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<syscon_quaddobl_multi_homogenization>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x1c(%rbp)
lea    -0x24(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x30(%rbp),%rcx
mov    $0x38a,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscon_quaddobl_multi_homogenization>:
sub    $0x18,%rsp
mov    %edi,0xc(%rsp)
mov    %esi,0x10(%rsp)
mov    %ecx,0x14(%rsp)
lea    0xc(%rsp),%rsi
mov    $0x38a,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @syscon_quaddobl_multi_homogenization(i32 %0, i32 %1, i32* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32
%9 = alloca i32
%10 = alloca [3 x i32]
%11 = alloca double*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32 %3, i32* %8
%12 = load i32, i32* %5
%13 = getelementptr inbounds [3 x i32], [3 x i32]* %10, i64 0, i64 0
store i32 %12, i32* %13
%14 = load i32, i32* %6
%15 = getelementptr inbounds [3 x i32], [3 x i32]* %10, i64 0, i64 1
store i32 %14, i32* %15
%16 = load i32, i32* %8
%17 = getelementptr inbounds [3 x i32], [3 x i32]* %10, i64 0, i64 2
store i32 %16, i32* %17
%18 = getelementptr inbounds [3 x i32], [3 x i32]* %10, i64 0, i64 0
%19 = load i32*, i32** %7
%20 = load double*, double** %11
%21 = call i32 @_ada_use_c2phc4c(i32 906, i32* %18, i32* %19, double* %20, i32 0)
store i32 %21, i32* %9
%22 = load i32, i32* %9
ret i32 %22
}

LLVM IR (-O2):
define i32 @syscon_quaddobl_multi_homogenization(i32 %0, i32 %1, i32* %2, i32 %3) {
%5 = alloca [3 x i32]
%6 = bitcast [3 x i32]* %5 to i8*
%7 = getelementptr inbounds [3 x i32], [3 x i32]* %5, i64 0, i64 0
store i32 %0, i32* %7
%8 = getelementptr inbounds [3 x i32], [3 x i32]* %5, i64 0, i64 1
store i32 %1, i32* %8
%9 = getelementptr inbounds [3 x i32], [3 x i32]* %5, i64 0, i64 2
store i32 %3, i32* %9
%10 = call i32 @_ada_use_c2phc4c(i32 906, i32* %7, i32* %2, double* undef, i32 0)
ret i32 %10
}
/* Variables and functions */
void *my_realloc(int /*<<< orphan*/, size_t);
void *my_alloc(size_t size) { return my_realloc(0, size); }


x86 assembly (clang, -O0):
<my_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
xor    %edi,%edi
call   1030 <my_realloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_alloc>:
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <my_realloc@plt>

LLVM IR (-O0):
define i8* @my_alloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @my_realloc(i32 0, i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @my_alloc(i64 %0) {
%2 = tail call i8* @my_realloc(i32 0, i64 %0)
ret i8* %2
}
int ima_inode_alloc(struct inode *inode) { return 0; }


x86 assembly (clang, -O0):
<ima_inode_alloc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ima_inode_alloc>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.inode = type opaque
define i32 @ima_inode_alloc(%struct.inode* %0) {
%2 = alloca %struct.inode*
store %struct.inode* %0, %struct.inode** %2
ret i32 0
}

LLVM IR (-O2):
%struct.inode = type opaque
define i32 @ima_inode_alloc(%struct.inode* nocapture readnone %0) {
ret i32 0
}
int h(int a) { return -a; }


x86 assembly (clang, -O0):
<h>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
sub    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<h>:
mov    %edi,%eax
neg    %eax
ret

LLVM IR (-O0):
define i32 @h(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 0, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @h(i32 %0) {
%2 = sub nsw i32 0, %0
ret i32 %2
}
int is_vext(struct kvm_vcpu *vcpu) { return 0; }


x86 assembly (clang, -O0):
<is_vext>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_vext>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.kvm_vcpu = type opaque
define i32 @is_vext(%struct.kvm_vcpu* %0) {
%2 = alloca %struct.kvm_vcpu*
store %struct.kvm_vcpu* %0, %struct.kvm_vcpu** %2
ret i32 0
}

LLVM IR (-O2):
%struct.kvm_vcpu = type opaque
define i32 @is_vext(%struct.kvm_vcpu* nocapture readnone %0) {
ret i32 0
}
void YieldProcessor(void) {
  __asm__ __volatile__("rep\n"
                       "nop");
}


x86 assembly (clang, -O0):
<YieldProcessor>:
push   %rbp
mov    %rsp,%rbp
pause
pop    %rbp
ret

x86 assembly (clang, -O2):
<YieldProcessor>:
pause
ret

LLVM IR (-O0):
define void @YieldProcessor() {
ret void
}

LLVM IR (-O2):
define void @YieldProcessor() {
tail call void asm sideeffect "rep\0Anop", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
struct list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ internal_warning(char *);
int check_declaration_specifiers(struct list *declarator_specifiers) {
  internal_warning("check_declaration_specifiers not implemented\n");
  return 0;
}


x86 assembly (clang, -O0):
<check_declaration_specifiers>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <internal_warning@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_declaration_specifiers>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <internal_warning@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.list = type { i32 }
@.str = [46 x i8] c"check_declaration_specifiers not implemented\0A\00"
define i32 @check_declaration_specifiers(%struct.list* %0) {
%2 = alloca %struct.list*
store %struct.list* %0, %struct.list** %2
%3 = call i32 @internal_warning(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
%struct.list = type { i32 }
@.str = [46 x i8] c"check_declaration_specifiers not implemented\0A\00"
define i32 @check_declaration_specifiers(%struct.list* nocapture readnone %0) {
%2 = tail call i32 @internal_warning(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
char *quote_char(char c) {
  switch (c) {
  case 'e':
    return (char *)"\e";
  default:
    return (char *)"?";
  }
}


x86 assembly (clang, -O0):
<quote_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
sub    $0x65,%al
jne    112a <quote_char+0x2a>
jmp    111a <quote_char+0x1a>
lea    0xedf(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1135 <quote_char+0x35>
lea    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<quote_char>:
cmp    $0x65,%dil
lea    0xef5(%rip),%rcx
lea    0xef0(%rip),%rax
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\1B\00"
@.str.1 = [2 x i8] c"?\00"
define i8* @quote_char(i8 signext %0) {
%2 = alloca i8*
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %7 [
i32 101, label %6
]
6: ; preds = %1
store i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8** %2
br label %8
7: ; preds = %1
store i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %8
8: ; preds = %7, %6
%9 = load i8*, i8** %2
ret i8* %9
}

LLVM IR (-O2):
@.str = [2 x i8] c"\1B\00"
@.str.1 = [2 x i8] c"?\00"
define i8* @quote_char(i8 signext %0) {
%2 = icmp eq i8 %0, 101
%3 = select i1 %2, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0)
ret i8* %3
}
/* Variables and functions */
char *malloc(int);
int rand();
char *realloc(char *, int);
int /*<<< orphan*/ strcpy(char *, char *);
char *fn81() {
  char *result;
  result = malloc(20 + rand() % 20);
  result = realloc(result, 30 + rand() % 20);
  strcpy((char *)result, "fn81");
  return result;
}


x86 assembly (clang, -O0):
<fn81>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1060 <rand@plt>
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    %edx,%edi
add    $0x14,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1060 <rand@plt>
mov    -0x10(%rbp),%rdi
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    %edx,%esi
add    $0x1e,%esi
call   1050 <realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xe67(%rip),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn81>:
push   %rbx
xor    %eax,%eax
call   1060 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%edi
add    $0x14,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1060 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%esi
add    $0x1e,%esi
mov    %rbx,%rdi
call   1050 <realloc@plt>
mov    %rax,%rbx
lea    0xe4f(%rip),%rsi
mov    %rax,%rdi
call   1030 <strcpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"fn81\00"
define i8* @fn81() {
%1 = alloca i8*
%2 = call i32 (...) @rand()
%3 = srem i32 %2, 20
%4 = add nsw i32 20, %3
%5 = call i8* @malloc(i32 %4)
store i8* %5, i8** %1
%6 = load i8*, i8** %1
%7 = call i32 (...) @rand()
%8 = srem i32 %7, 20
%9 = add nsw i32 30, %8
%10 = call i8* @realloc(i8* %6, i32 %9)
store i8* %10, i8** %1
%11 = load i8*, i8** %1
%12 = call i32 @strcpy(i8* %11, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%13 = load i8*, i8** %1
ret i8* %13
}

LLVM IR (-O2):
@.str = [5 x i8] c"fn81\00"
define i8* @fn81() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 20
%3 = add nsw i32 %2, 20
%4 = tail call i8* @malloc(i32 %3)
%5 = tail call i32 (...) @rand()
%6 = srem i32 %5, 20
%7 = add nsw i32 %6, 30
%8 = tail call i8* @realloc(i8* %4, i32 %7)
%9 = tail call i32 @strcpy(i8* %8, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i8* %8
}
int test_imm_A6uint32_mem(unsigned int *val) {
  return ((*val) & (0xA6 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A6uint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xa6,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A6uint32_mem>:
testb  $0xa6,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A6uint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 166
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A6uint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 166
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x90() {
  Assert_real((isspace(144) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              725, ("isspace should be 0 for 0x90"));
}


x86 assembly (clang, -O0):
<t_isspace_0x90>:
push   %rbp
mov    %rsp,%rbp
mov    $0x90,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2d5,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x90>:
push   %rax
mov    $0x90,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2d5,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0x90\00"
define void @t_isspace_0x90() {
%1 = call i64 @isspace(i32 144)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 725, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0x90\00"
define void @t_isspace_0x90() {
%1 = tail call i64 @isspace(i32 144)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 725, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int error(int, char *);
int b_endif(int argc, char *argv[]) {
  if (argc > 1)
    return error(1, argv[0]);
  return 0;
}


x86 assembly (clang, -O0):
<b_endif>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    1142 <b_endif+0x32>
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
mov    $0x1,%edi
call   1030 <error@plt>
mov    %eax,-0x4(%rbp)
jmp    1149 <b_endif+0x39>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_endif>:
cmp    $0x2,%edi
jl     1122 <b_endif+0x12>
mov    (%rsi),%rsi
mov    $0x1,%edi
jmp    1030 <error@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @b_endif(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 1
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 0
%11 = load i8*, i8** %10
%12 = call i32 @error(i32 1, i8* %11)
store i32 %12, i32* %3
br label %14
13: ; preds = %2
store i32 0, i32* %3
br label %14
14: ; preds = %13, %8
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @b_endif(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = load i8*, i8** %1
%6 = tail call i32 @error(i32 1, i8* %5)
br label %7
7: ; preds = %2, %4
%8 = phi i32 [ %6, %4 ], [ 0, %2 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ SIGKILL;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ kill(int /*<<< orphan*/, int /*<<< orphan*/);
void int_exit(int sig) {
  kill(0, SIGKILL);
  exit(0);
}


x86 assembly (clang, -O0):
<int_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2eae(%rip),%rax
mov    (%rax),%esi
xor    %edi,%edi
call   1030 <kill@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<int_exit>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
xor    %edi,%edi
call   1030 <kill@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@SIGKILL = global i32 0
define void @int_exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @SIGKILL
%4 = call i32 @kill(i32 0, i32 %3)
%5 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@SIGKILL = global i32 0
define void @int_exit(i32 %0) {
%2 = load i32, i32* @SIGKILL
%3 = tail call i32 @kill(i32 0, i32 %2)
%4 = tail call i32 @exit(i32 0)
unreachable
}
void func(int p, int *q) {
  int j = p, k = 1, i;
  for (i = 0; i <= p; i++)
    j--, k = k * 2;
  *q = k;
}


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
movl   $0x1,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     114b <func+0x4b>
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x18(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    111f <func+0x1f>
mov    -0x18(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
test   %edi,%edi
js     1118 <func+0x18>
lea    0x1(%rdi),%edx
mov    %edx,%eax
and    $0x7,%eax
cmp    $0x7,%edi
jae    1120 <func+0x20>
mov    $0x1,%ecx
jmp    1138 <func+0x38>
mov    $0x1,%ecx
mov    %ecx,(%rsi)
ret
and    $0xfffffff8,%edx
mov    $0x1,%ecx
nopl   0x0(%rax,%rax,1)
shl    $0x8,%ecx
add    $0xfffffff8,%edx
jne    1130 <func+0x30>
test   %eax,%eax
je     1147 <func+0x47>
nopl   0x0(%rax)
add    %ecx,%ecx
add    $0xffffffff,%eax
jne    1140 <func+0x40>
mov    %ecx,(%rsi)
ret

LLVM IR (-O0):
define void @func(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
%8 = load i32, i32* %3
store i32 %8, i32* %5
store i32 1, i32* %6
store i32 0, i32* %7
br label %9
9: ; preds = %18, %2
%10 = load i32, i32* %7
%11 = load i32, i32* %3
%12 = icmp sle i32 %10, %11
br i1 %12, label %13, label %21
13: ; preds = %9
%14 = load i32, i32* %5
%15 = add nsw i32 %14, -1
store i32 %15, i32* %5
%16 = load i32, i32* %6
%17 = mul nsw i32 %16, 2
store i32 %17, i32* %6
br label %18
18: ; preds = %13
%19 = load i32, i32* %7
%20 = add nsw i32 %19, 1
store i32 %20, i32* %7
br label %9
21: ; preds = %9
%22 = load i32, i32* %6
%23 = load i32*, i32** %4
store i32 %22, i32* %23
ret void
}

LLVM IR (-O2):
define void @func(i32 %0, i32* nocapture writeonly %1) {
%3 = icmp slt i32 %0, 0
br i1 %3, label %26, label %4
4: ; preds = %2
%5 = add i32 %0, 1
%6 = and i32 %5, 7
%7 = icmp ult i32 %0, 7
br i1 %7, label %16, label %8
8: ; preds = %4
%9 = and i32 %5, -8
br label %10
10: ; preds = %10, %8
%11 = phi i32 [ 1, %8 ], [ %13, %10 ]
%12 = phi i32 [ 0, %8 ], [ %14, %10 ]
%13 = shl i32 %11, 8
%14 = add i32 %12, 8
%15 = icmp eq i32 %14, %9
br i1 %15, label %16, label %10
16: ; preds = %10, %4
%17 = phi i32 [ undef, %4 ], [ %13, %10 ]
%18 = phi i32 [ 1, %4 ], [ %13, %10 ]
%19 = icmp eq i32 %6, 0
br i1 %19, label %26, label %20
20: ; preds = %16, %20
%21 = phi i32 [ %23, %20 ], [ %18, %16 ]
%22 = phi i32 [ %24, %20 ], [ 0, %16 ]
%23 = shl nsw i32 %21, 1
%24 = add i32 %22, 1
%25 = icmp eq i32 %24, %6
br i1 %25, label %26, label %20
26: ; preds = %16, %20, %2
%27 = phi i32 [ 1, %2 ], [ %17, %16 ], [ %23, %20 ]
store i32 %27, i32* %1
ret void
}
int test_imm_74int16_mem(short *val) {
  return ((*val) & (-0x74 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_74int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffff8c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_74int16_mem>:
movzwl (%rdi),%eax
test   $0xff8c,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_74int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -116
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_74int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -116
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int nIndirections(int **, int);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int a = 3;
  int *a1 = &a;
  int **a2 = &a1;
  int result = nIndirections(a2, 2);
  printf("The value stored in memory is: %d\n", result);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
lea    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    $0x2,%esi
call   1040 <nIndirections@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%esi
lea    0xe9f(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movl   $0x3,0xc(%rsp)
lea    0xc(%rsp),%rax
mov    %rax,0x10(%rsp)
lea    0x10(%rsp),%rdi
mov    $0x2,%esi
call   1040 <nIndirections@plt>
lea    0xeb4(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [35 x i8] c"The value stored in memory is: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32**
%5 = alloca i32
store i32 0, i32* %1
store i32 3, i32* %2
store i32* %2, i32** %3
store i32** %3, i32*** %4
%6 = load i32**, i32*** %4
%7 = call i32 @nIndirections(i32** %6, i32 2)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [35 x i8] c"The value stored in memory is: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = bitcast i32* %1 to i8*
store i32 3, i32* %1
%4 = bitcast i32** %2 to i8*
store i32* %1, i32** %2
%5 = call i32 @nIndirections(i32** %2, i32 2)
%6 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Variables and functions */
unsigned int register_read(int);
int /*<<< orphan*/ register_write(int, unsigned int);
unsigned int register_read_rs690(unsigned int key) {
  register_write(0x78, key & 0x1ff);
  return register_read(0x7c);
}


x86 assembly (clang, -O0):
<register_read_rs690>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
and    $0x1ff,%esi
mov    $0x78,%edi
call   1030 <register_write@plt>
mov    $0x7c,%edi
call   1040 <register_read@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<register_read_rs690>:
push   %rax
mov    %edi,%esi
and    $0x1ff,%esi
mov    $0x78,%edi
call   1030 <register_write@plt>
mov    $0x7c,%edi
pop    %rax
jmp    1040 <register_read@plt>

LLVM IR (-O0):
define i32 @register_read_rs690(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 511
%5 = call i32 @register_write(i32 120, i32 %4)
%6 = call i32 @register_read(i32 124)
ret i32 %6
}

LLVM IR (-O2):
define i32 @register_read_rs690(i32 %0) {
%2 = and i32 %0, 511
%3 = tail call i32 @register_write(i32 120, i32 %2)
%4 = tail call i32 @register_read(i32 124)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int string_bro(char *, char *);
void main() {
  char *str0 = "test";
  char *str1 = "astt";
  printf("%d\n", string_bro(str0, str1));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xecb(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <string_bro@plt>
mov    %eax,%esi
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xed6(%rip),%rsi
call   1040 <string_bro@plt>
lea    0xecf(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"test\00"
@.str.1 = [5 x i8] c"astt\00"
@.str.2 = [4 x i8] c"%d\0A\00"
define void @main() {
%1 = alloca i8*
%2 = alloca i8*
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %1
%4 = load i8*, i8** %2
%5 = call i32 @string_bro(i8* %3, i8* %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %5)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"test\00"
@.str.1 = [5 x i8] c"astt\00"
@.str.2 = [4 x i8] c"%d\0A\00"
define void @main() {
%1 = tail call i32 @string_bro(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %1)
ret void
}
int test_imm_C8uint8_mem(unsigned char *val) {
  return ((*val) & (-0xC8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C8uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffff38,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C8uint8_mem>:
testb  $0x38,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C8uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -200
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C8uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 56
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int x, y, n;
  x = __VERIFIER_nondet_int();
  y = __VERIFIER_nondet_int();
  n = __VERIFIER_nondet_int();
  while (x > 0 && x < n) {
    x = -x + y - 5;
    y = 2 * y;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x10(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0x11(%rbp)
jle    1158 <main+0x48>
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
setl   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    1168 <main+0x58>
jmp    1184 <main+0x74>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
sub    $0x5,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    113d <main+0x2d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %5, i32* %2
%6 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %6, i32* %3
%7 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %7, i32* %4
br label %8
8: ; preds = %17, %0
%9 = load i32, i32* %2
%10 = icmp sgt i32 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %8
%12 = load i32, i32* %2
%13 = load i32, i32* %4
%14 = icmp slt i32 %12, %13
br label %15
15: ; preds = %11, %8
%16 = phi i1 [ false, %8 ], [ %14, %11 ]
br i1 %16, label %17, label %25
17: ; preds = %15
%18 = load i32, i32* %2
%19 = sub nsw i32 0, %18
%20 = load i32, i32* %3
%21 = add nsw i32 %19, %20
%22 = sub nsw i32 %21, 5
store i32 %22, i32* %2
%23 = load i32, i32* %3
%24 = mul nsw i32 2, %23
store i32 %24, i32* %3
br label %8
25: ; preds = %15
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 (...) @__VERIFIER_nondet_int()
%3 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}