xunge/DecIR huggingface dataset:
void I2CDMATxEventEnable(unsigned int baseAdd) {
  (*((volatile unsigned int *)(baseAdd + (0x94)))) |= ((0x00000080u));
  (*((volatile unsigned int *)(baseAdd + (0x3C)))) = ((0x00000001u));
}


x86 assembly (clang, -O0):
<I2CDMATxEventEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x94,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     $0x80,%ecx
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
add    $0x3c,%eax
mov    %eax,%eax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CDMATxEventEnable>:
lea    0x94(%rdi),%eax
orl    $0x80,(%rax)
add    $0x3c,%edi
movl   $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @I2CDMATxEventEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 148
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = or i32 %7, 128
store volatile i32 %8, i32* %6
%9 = load i32, i32* %2
%10 = add i32 %9, 60
%11 = zext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
store volatile i32 1, i32* %12
ret void
}

LLVM IR (-O2):
define void @I2CDMATxEventEnable(i32 %0) {
%2 = add i32 %0, 148
%3 = zext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = or i32 %5, 128
store volatile i32 %6, i32* %4
%7 = add i32 %0, 60
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store volatile i32 1, i32* %9
ret void
}
/* Type definitions */
typedef unsigned int uint32_t;

/* Variables and functions */
uint32_t crc32c_shift_reflex(unsigned bit, uint32_t bcc) {
  unsigned val = (bcc ^ bit) & 1;
  if (val != 0) {
    bcc >>= 1;
    bcc ^= 0x82f63b78;
  } else {
    bcc >>= 1;
  }
  return bcc;
}


x86 assembly (clang, -O0):
<crc32c_shift_reflex>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x4(%rbp),%eax
and    $0x1,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1139 <crc32c_shift_reflex+0x39>
mov    -0x8(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x82f63b78,%eax
mov    %eax,-0x8(%rbp)
jmp    1142 <crc32c_shift_reflex+0x42>
mov    -0x8(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<crc32c_shift_reflex>:
xor    %esi,%edi
shr    %esi
mov    %esi,%eax
xor    $0x82f63b78,%eax
test   $0x1,%dil
cmove  %esi,%eax
ret

LLVM IR (-O0):
define i32 @crc32c_shift_reflex(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = xor i32 %6, %7
%9 = and i32 %8, 1
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %17
12: ; preds = %2
%13 = load i32, i32* %4
%14 = lshr i32 %13, 1
store i32 %14, i32* %4
%15 = load i32, i32* %4
%16 = xor i32 %15, -2097792136
store i32 %16, i32* %4
br label %20
17: ; preds = %2
%18 = load i32, i32* %4
%19 = lshr i32 %18, 1
store i32 %19, i32* %4
br label %20
20: ; preds = %17, %12
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @crc32c_shift_reflex(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
%4 = and i32 %3, 1
%5 = icmp eq i32 %4, 0
%6 = lshr i32 %1, 1
%7 = xor i32 %6, -2097792136
%8 = select i1 %5, i32 %6, i32 %7
ret i32 %8
}
/* Variables and functions */
int cos(float);
float f(float x) { return cos(x) / 3; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <cos@plt>
mov    $0x3,%ecx
cltd
idiv   %ecx
cvtsi2ss %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rax
call   1030 <cos@plt>
cltq
imul   $0x55555556,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
shr    $0x20,%rax
add    %ecx,%eax
xorps  %xmm0,%xmm0
cvtsi2ss %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @f(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 @cos(float %3)
%5 = sdiv i32 %4, 3
%6 = sitofp i32 %5 to float
ret float %6
}

LLVM IR (-O2):
define float @f(float %0) {
%2 = tail call i32 @cos(float %0)
%3 = sdiv i32 %2, 3
%4 = sitofp i32 %3 to float
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int /*<<< orphan*/ times2(int, int *);
int main(int argc, char *argv[]) {
  int x, y;
  x = 3;
  y = 4;
  times2(x, &y);
  printf("x = %d, y = %d\n", x, y);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x3,-0x14(%rbp)
movl   $0x4,-0x18(%rbp)
mov    -0x14(%rbp),%edi
lea    -0x18(%rbp),%rsi
call   1040 <times2@plt>
mov    -0x14(%rbp),%esi
mov    -0x18(%rbp),%edx
lea    0xeaa(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x4,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x3,%edi
call   1040 <times2@plt>
mov    0x4(%rsp),%edx
lea    0xebd(%rip),%rdi
mov    $0x3,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"x = %d, y = %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
store i32 3, i32* %5
store i32 4, i32* %6
%7 = load i32, i32* %5
%8 = call i32 @times2(i32 %7, i32* %6)
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %9, i32 %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"x = %d, y = %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
store i32 4, i32* %3
%5 = call i32 @times2(i32 3, i32* %3)
%6 = load i32, i32* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 3, i32 %6)
ret i32 0
}
int max(int a, int b) {
  if (a < b)
    return b;
  else
    return a;
}


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1121 <max+0x21>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <max+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
mov    %edi,%eax
cmp    %esi,%edi
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define i32 @max(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %5
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %4
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @max(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
double pathconN_nm3_sign(double x) { return x < 0 ? -1 : x > 0 ? 1 : x; }


x86 assembly (clang, -O0):
<pathconN_nm3_sign>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    1129 <pathconN_nm3_sign+0x29>
movsd  0xee9(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    1161 <pathconN_nm3_sign+0x61>
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    114d <pathconN_nm3_sign+0x4d>
movsd  0xebd(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1157 <pathconN_nm3_sign+0x57>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathconN_nm3_sign>:
xorpd  %xmm1,%xmm1
xorpd  %xmm2,%xmm2
cmpltsd %xmm0,%xmm2
movsd  0xeeb(%rip),%xmm3
andpd  %xmm2,%xmm3
andnpd %xmm0,%xmm2
orpd   %xmm3,%xmm2
cmpltsd %xmm1,%xmm0
movapd %xmm0,%xmm1
andnpd %xmm2,%xmm1
movsd  0xed2(%rip),%xmm2
andpd  %xmm2,%xmm0
orpd   %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @pathconN_nm3_sign(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp olt double %3, 0.000000e+00
br i1 %4, label %5, label %6
5: ; preds = %1
br label %14
6: ; preds = %1
%7 = load double, double* %2
%8 = fcmp ogt double %7, 0.000000e+00
br i1 %8, label %9, label %10
9: ; preds = %6
br label %12
10: ; preds = %6
%11 = load double, double* %2
br label %12
12: ; preds = %10, %9
%13 = phi double [ 1.000000e+00, %9 ], [ %11, %10 ]
br label %14
14: ; preds = %12, %5
%15 = phi double [ -1.000000e+00, %5 ], [ %13, %12 ]
ret double %15
}

LLVM IR (-O2):
define double @pathconN_nm3_sign(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
%3 = fcmp ogt double %0, 0.000000e+00
%4 = select i1 %3, double 1.000000e+00, double %0
%5 = select i1 %2, double -1.000000e+00, double %4
ret double %5
}
int MIN(int a, int b) { return a < b ? a : b; }


x86 assembly (clang, -O0):
<MIN>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <MIN+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <MIN+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<MIN>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @MIN(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @MIN(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
unsigned long xlib_get_shift_from_mask(unsigned long val) {
  unsigned long cur_bit = 0;
  while (cur_bit < (sizeof(unsigned long) * 8)) {
    if ((val >> cur_bit) & 0x1) {
      return cur_bit;
    }
    cur_bit++;
  }
  return cur_bit;
}


x86 assembly (clang, -O0):
<xlib_get_shift_from_mask>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
cmpq   $0x40,-0x18(%rbp)
jae    1152 <xlib_get_shift_from_mask+0x52>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
shr    %cl,%rax
and    $0x1,%rax
cmp    $0x0,%rax
je     1141 <xlib_get_shift_from_mask+0x41>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    115a <xlib_get_shift_from_mask+0x5a>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1110 <xlib_get_shift_from_mask+0x10>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xlib_get_shift_from_mask>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
bt     %rax,%rdi
jb     1153 <xlib_get_shift_from_mask+0x53>
lea    0x1(%rax),%ecx
movzbl %cl,%ecx
bt     %rcx,%rdi
jb     114a <xlib_get_shift_from_mask+0x4a>
lea    0x2(%rax),%ecx
movzbl %cl,%ecx
bt     %rcx,%rdi
jb     114f <xlib_get_shift_from_mask+0x4f>
lea    0x3(%rax),%ecx
movzbl %cl,%ecx
bt     %rcx,%rdi
jb     1154 <xlib_get_shift_from_mask+0x54>
add    $0x4,%rax
cmp    $0x40,%rax
jne    1110 <xlib_get_shift_from_mask+0x10>
mov    $0x40,%eax
ret
add    $0x1,%rax
ret
add    $0x2,%rax
ret
add    $0x3,%rax
ret

LLVM IR (-O0):
define i64 @xlib_get_shift_from_mask(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 0, i64* %4
br label %5
5: ; preds = %16, %1
%6 = load i64, i64* %4
%7 = icmp ult i64 %6, 64
br i1 %7, label %8, label %19
8: ; preds = %5
%9 = load i64, i64* %3
%10 = load i64, i64* %4
%11 = lshr i64 %9, %10
%12 = and i64 %11, 1
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %8
%15 = load i64, i64* %4
store i64 %15, i64* %2
br label %21
16: ; preds = %8
%17 = load i64, i64* %4
%18 = add i64 %17, 1
store i64 %18, i64* %4
br label %5
19: ; preds = %5
%20 = load i64, i64* %4
store i64 %20, i64* %2
br label %21
21: ; preds = %19, %14
%22 = load i64, i64* %2
ret i64 %22
}

LLVM IR (-O2):
define i64 @xlib_get_shift_from_mask(i64 %0) {
br label %2
2: ; preds = %22, %1
%3 = phi i64 [ 0, %1 ], [ %23, %22 ]
%4 = shl nuw i64 1, %3
%5 = and i64 %4, %0
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %25
7: ; preds = %2
%8 = or i64 %3, 1
%9 = shl nuw i64 1, %8
%10 = and i64 %9, %0
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %25
12: ; preds = %7
%13 = or i64 %3, 2
%14 = shl nuw i64 1, %13
%15 = and i64 %14, %0
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %25
17: ; preds = %12
%18 = or i64 %3, 3
%19 = shl nuw i64 1, %18
%20 = and i64 %19, %0
%21 = icmp eq i64 %20, 0
br i1 %21, label %22, label %25
22: ; preds = %17
%23 = add nuw nsw i64 %3, 4
%24 = icmp eq i64 %23, 64
br i1 %24, label %25, label %2
25: ; preds = %22, %17, %12, %7, %2
%26 = phi i64 [ %3, %2 ], [ %8, %7 ], [ %13, %12 ], [ %18, %17 ], [ 64, %22 ]
ret i64 %26
}
/* Type definitions */
struct in_addr {
  int /*<<< orphan*/ s_addr;
};

/* Variables and functions */
char *inet_ntoa(struct in_addr);
int /*<<< orphan*/ random_lip();
char *random_cip(void) {
  struct in_addr hax0r;
  hax0r.s_addr = random_lip();
  return (inet_ntoa(hax0r));
}


x86 assembly (clang, -O0):
<random_cip>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <random_lip@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <inet_ntoa@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_cip>:
push   %rax
xor    %eax,%eax
call   1030 <random_lip@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <inet_ntoa@plt>

LLVM IR (-O0):
%struct.in_addr = type { i32 }
define i8* @random_cip() {
%1 = alloca %struct.in_addr
%2 = call i32 (...) @random_lip()
%3 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %1, i32 0, i32 0
store i32 %2, i32* %3
%4 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %1, i32 0, i32 0
%5 = load i32, i32* %4
%6 = call i8* @inet_ntoa(i32 %5)
ret i8* %6
}

LLVM IR (-O2):
define i8* @random_cip() {
%1 = tail call i32 (...) @random_lip()
%2 = tail call i8* @inet_ntoa(i32 %1)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("This is \t a thing \t that has a bunch of \b dumb characters \n      "
         "      in it that need to be \t\t escaped! \\ \\ \\ \\\n");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [114 x i8] c"This is \09 a thing \09 that has a bunch of \08 dumb characters \0A in it that need to be \09\09 escaped! \\ \\ \\ \\\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([114 x i8], [114 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [113 x i8] c"This is \09 a thing \09 that has a bunch of \08 dumb characters \0A in it that need to be \09\09 escaped! \\ \\ \\ \\\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([113 x i8], [113 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ strcat(char *, char *);
int strlen(char *);
void strcat_overflow_1(char *y) {
  char x[4] = "12";
  if (strlen(y) == 3)
    strcat(x, y);
}


x86 assembly (clang, -O0):
<strcat_overflow_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0xece(%rip),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
cmp    $0x3,%eax
jne    1154 <strcat_overflow_1+0x34>
lea    -0xc(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <strcat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcat_overflow_1>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movl   $0x3231,0xc(%rsp)
call   1030 <strlen@plt>
cmp    $0x3,%eax
jne    1147 <strcat_overflow_1+0x27>
lea    0xc(%rsp),%rdi
mov    %rbx,%rsi
call   1040 <strcat@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.strcat_overflow_1.x = [4 x i8] c"12\00\00"
define void @strcat_overflow_1(i8* %0) {
%2 = alloca i8*
%3 = alloca [4 x i8]
store i8* %0, i8** %2
%4 = bitcast [4 x i8]* %3 to i8*
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = icmp eq i32 %6, 3
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%10 = load i8*, i8** %2
%11 = call i32 @strcat(i8* %9, i8* %10)
br label %12
12: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @strcat_overflow_1(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 12849, i32* %2
%4 = tail call i32 @strlen(i8* %0)
%5 = icmp eq i32 %4, 3
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @strcat(i8* %3, i8* %0)
br label %8
8: ; preds = %6, %1
ret void
}
void av_blowfish_init() {}


x86 assembly (clang, -O0):
<av_blowfish_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_blowfish_init>:
ret

LLVM IR (-O0):
define void @av_blowfish_init() {
ret void
}

LLVM IR (-O2):
define void @av_blowfish_init() {
ret void
}
int kth_bit_from_right(int n, int k) { return (n & (1 << k)) >> k; }


x86 assembly (clang, -O0):
<kth_bit_from_right>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kth_bit_from_right>:
mov    %esi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
and    %edi,%eax
sar    %cl,%eax
ret

LLVM IR (-O0):
define i32 @kth_bit_from_right(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 1, %6
%8 = and i32 %5, %7
%9 = load i32, i32* %4
%10 = ashr i32 %8, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @kth_bit_from_right(i32 %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = and i32 %3, %0
%5 = ashr i32 %4, %1
ret i32 %5
}
/* Variables and functions */
int iter(int);
int /*<<< orphan*/ printf(char *, int, int);
int rek(int);
int main() { printf("%d %d\n", iter(4), rek(4)); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1050 <iter@plt>
mov    %eax,-0x4(%rbp)
mov    $0x4,%edi
call   1040 <rek@plt>
mov    -0x4(%rbp),%esi
mov    %eax,%edx
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x4,%edi
call   1050 <iter@plt>
mov    %eax,%ebx
mov    $0x4,%edi
call   1040 <rek@plt>
lea    0xeb2(%rip),%rdi
mov    %ebx,%esi
mov    %eax,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%d %d\0A\00"
define i32 @main() {
%1 = call i32 @iter(i32 4)
%2 = call i32 @rek(i32 4)
%3 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %1, i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%d %d\0A\00"
define i32 @main() {
%1 = tail call i32 @iter(i32 4)
%2 = tail call i32 @rek(i32 4)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %1, i32 %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isprint(int);
void t_isprint_0x78() {
  Assert_real((isprint(120)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              605, ("isprint should be 1 for x"));
}


x86 assembly (clang, -O0):
<t_isprint_0x78>:
push   %rbp
mov    %rsp,%rbp
mov    $0x78,%edi
call   1030 <isprint@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x25d,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0x78>:
push   %rax
mov    $0x78,%edi
call   1030 <isprint@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x25d,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [26 x i8] c"isprint should be 1 for x\00"
define void @t_isprint_0x78() {
%1 = call i32 @isprint(i32 120)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 605, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [26 x i8] c"isprint should be 1 for x\00"
define void @t_isprint_0x78() {
%1 = tail call i32 @isprint(i32 120)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 605, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gang();
int /*<<< orphan*/ vector();
int /*<<< orphan*/ worker();
void seq(void) {
  gang();
  worker();
  vector();
  seq();
}


x86 assembly (clang, -O0):
<seq>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <gang@plt>
mov    $0x0,%al
call   1040 <worker@plt>
mov    $0x0,%al
call   1060 <vector@plt>
call   1050 <seq@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<seq>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <gang@plt>
xor    %eax,%eax
call   1040 <worker@plt>
xor    %eax,%eax
call   1050 <vector@plt>
jmp    1140 <seq+0x10>

LLVM IR (-O0):
define void @seq() {
%1 = call i32 (...) @gang()
%2 = call i32 (...) @worker()
%3 = call i32 (...) @vector()
ret void
}

LLVM IR (-O2):
define void @seq() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @gang()
%3 = tail call i32 (...) @worker()
%4 = tail call i32 (...) @vector()
br label %1
}
char *strrchr(const char *s, int c) {
  char *fnd = 0;
  while (*s) {
    if (*s == c)
      fnd = (char *)s;
    s++;
  }
  return fnd;
}


x86 assembly (clang, -O0):
<strrchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1149 <strrchr+0x49>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    -0xc(%rbp),%eax
jne    1138 <strrchr+0x38>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1113 <strrchr+0x13>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strrchr>:
mov    (%rdi),%cl
xor    %eax,%eax
test   %cl,%cl
je     1125 <strrchr+0x25>
nopl   0x0(%rax,%rax,1)
movsbl %cl,%ecx
cmp    %esi,%ecx
cmove  %rdi,%rax
movzbl 0x1(%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <strrchr+0x10>
ret

LLVM IR (-O0):
define i8* @strrchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
store i8* null, i8** %5
br label %6
6: ; preds = %18, %2
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = load i32, i32* %4
%15 = icmp eq i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %10
%17 = load i8*, i8** %3
store i8* %17, i8** %5
br label %18
18: ; preds = %16, %10
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %3
br label %6
21: ; preds = %6
%22 = load i8*, i8** %5
ret i8* %22
}

LLVM IR (-O2):
define i8* @strrchr(i8* %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %13, %5 ], [ %3, %2 ]
%7 = phi i8* [ %11, %5 ], [ null, %2 ]
%8 = phi i8* [ %12, %5 ], [ %0, %2 ]
%9 = sext i8 %6 to i32
%10 = icmp eq i32 %9, %1
%11 = select i1 %10, i8* %8, i8* %7
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %2
%16 = phi i8* [ null, %2 ], [ %11, %5 ]
ret i8* %16
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_socket_set_sndbuf() {
  printf("NOT IMPLEMENTED:"
         "pa_socket_set_sndbuf"
         "\n");
}


x86 assembly (clang, -O0):
<pa_socket_set_sndbuf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_socket_set_sndbuf>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [38 x i8] c"NOT IMPLEMENTED:pa_socket_set_sndbuf\0A\00"
define i32 @pa_socket_set_sndbuf() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [37 x i8] c"NOT IMPLEMENTED:pa_socket_set_sndbuf\00"
define i32 @pa_socket_set_sndbuf() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
int test_imm_E8uint16_reg(unsigned short val) {
  return ((val) & (-0xE8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E8uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff18,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E8uint16_reg>:
test   $0xff18,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E8uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -232
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E8uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -232
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void SteamAPI_ISteamHTMLSurface_SetVerticalScroll(void *self) {
  xlogf("%s(self = %p)\n", __func__, self);
}


x86 assembly (clang, -O0):
<SteamAPI_ISteamHTMLSurface_SetVerticalScroll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xee1(%rip),%rsi
mov    $0x0,%al
call   1030 <xlogf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SteamAPI_ISteamHTMLSurface_SetVerticalScroll>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xeee(%rip),%rsi
xor    %eax,%eax
jmp    1030 <xlogf@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"%s(self = %p)\0A\00"
@__func__.SteamAPI_ISteamHTMLSurface_SetVerticalScroll = [45 x i8] c"SteamAPI_ISteamHTMLSurface_SetVerticalScroll\00"
define void @SteamAPI_ISteamHTMLSurface_SetVerticalScroll(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @xlogf to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([45 x i8], [45 x i8]* @__func__.SteamAPI_ISteamHTMLSurface_SetVerticalScroll, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"%s(self = %p)\0A\00"
@__func__.SteamAPI_ISteamHTMLSurface_SetVerticalScroll = [45 x i8] c"SteamAPI_ISteamHTMLSurface_SetVerticalScroll\00"
define void @SteamAPI_ISteamHTMLSurface_SetVerticalScroll(i8* %0) {
%2 = tail call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @xlogf to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([45 x i8], [45 x i8]* @__func__.SteamAPI_ISteamHTMLSurface_SetVerticalScroll, i64 0, i64 0), i8* %0)
ret void
}
void gf8mul_11010010(void) {
  __asm__ __volatile__("\tpxor    %xmm7, %xmm6\n"
                       "\tpxor    %xmm7, %xmm5\n"
                       "\tpxor    %xmm6, %xmm5\n"
                       "\tpxor    %xmm6, %xmm4\n"
                       "\tpxor    %xmm5, %xmm4\n"
                       "\tpxor    %xmm5, %xmm3\n"
                       "\tpxor    %xmm4, %xmm3\n"
                       "\tpxor    %xmm4, %xmm2\n"
                       "\tpxor    %xmm3, %xmm2\n"
                       "\tpxor    %xmm3, %xmm1\n"
                       "\tpxor    %xmm2, %xmm1\n"
                       "\tpxor    %xmm2, %xmm0\n"
                       "\tpxor    %xmm1, %xmm6\n"
                       "\tpxor    %xmm1, %xmm5\n"
                       "\tpxor    %xmm1, %xmm3\n"
                       "\tpxor    %xmm1, %xmm0\n"
                       "\tpxor    %xmm0, %xmm7\n"
                       "\tpxor    %xmm0, %xmm6\n"
                       "\tpxor    %xmm0, %xmm4\n"
                       "\tpxor    %xmm0, %xmm1\n"
                       "\tpxor    %xmm1, %xmm0\n");
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pxor   %xmm7,%xmm6
pxor   %xmm7,%xmm5
pxor   %xmm6,%xmm5
pxor   %xmm6,%xmm4
pxor   %xmm5,%xmm4
pxor   %xmm5,%xmm3
pxor   %xmm4,%xmm3
pxor   %xmm4,%xmm2
pxor   %xmm3,%xmm2
pxor   %xmm3,%xmm1
pxor   %xmm2,%xmm1
pxor   %xmm2,%xmm0
pxor   %xmm1,%xmm6
pxor   %xmm1,%xmm5
pxor   %xmm1,%xmm3
pxor   %xmm1,%xmm0
pxor   %xmm0,%xmm7
pxor   %xmm0,%xmm6
pxor   %xmm0,%xmm4
pxor   %xmm0,%xmm1
pxor   %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
pxor   %xmm7,%xmm6
pxor   %xmm7,%xmm5
pxor   %xmm6,%xmm5
pxor   %xmm6,%xmm4
pxor   %xmm5,%xmm4
pxor   %xmm5,%xmm3
pxor   %xmm4,%xmm3
pxor   %xmm4,%xmm2
pxor   %xmm3,%xmm2
pxor   %xmm3,%xmm1
pxor   %xmm2,%xmm1
pxor   %xmm2,%xmm0
pxor   %xmm1,%xmm6
pxor   %xmm1,%xmm5
pxor   %xmm1,%xmm3
pxor   %xmm1,%xmm0
pxor   %xmm0,%xmm7
pxor   %xmm0,%xmm6
pxor   %xmm0,%xmm4
pxor   %xmm0,%xmm1
pxor   %xmm1,%xmm0
ret

LLVM IR (-O0):
define void @gf8mul_11010010() {
ret void
}

LLVM IR (-O2):
define void @gf8mul_11010010() {
tail call void asm sideeffect "\09pxor %xmm7, %xmm6\0A\09pxor %xmm7, %xmm5\0A\09pxor %xmm6, %xmm5\0A\09pxor %xmm6, %xmm4\0A\09pxor %xmm5, %xmm4\0A\09pxor %xmm5, %xmm3\0A\09pxor %xmm4, %xmm3\0A\09pxor %xmm4, %xmm2\0A\09pxor %xmm3, %xmm2\0A\09pxor %xmm3, %xmm1\0A\09pxor %xmm2, %xmm1\0A\09pxor %xmm2, %xmm0\0A\09pxor %xmm1, %xmm6\0A\09pxor %xmm1, %xmm5\0A\09pxor %xmm1, %xmm3\0A\09pxor %xmm1, %xmm0\0A\09pxor %xmm0, %xmm7\0A\09pxor %xmm0, %xmm6\0A\09pxor %xmm0, %xmm4\0A\09pxor %xmm0, %xmm1\0A\09pxor %xmm1, %xmm0\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
void strcpy(char *pDst, char *pSrc) {
  while ((*pDst++ = *pSrc++) != '\0')
    continue;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %al,(%rcx)
movsbl %al,%eax
cmp    $0x0,%eax
je     113f <strcpy+0x3f>
jmp    110c <strcpy+0xc>
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%rsi,%rax,1),%ecx
mov    %cl,(%rdi,%rax,1)
add    $0x1,%rax
test   %cl,%cl
jne    1110 <strcpy+0x10>
ret

LLVM IR (-O0):
define void @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %13, %2
%6 = load i8*, i8** %4
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %4
%8 = load i8, i8* %6
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %3
store i8 %8, i8* %9
%11 = sext i8 %8 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %5
br label %5
14: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @strcpy(i8* nocapture writeonly %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %8, %3 ]
%5 = phi i8* [ %1, %2 ], [ %6, %3 ]
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %5
%8 = getelementptr inbounds i8, i8* %4, i64 1
store i8 %7, i8* %4
%9 = icmp eq i8 %7, 0
br i1 %9, label %10, label %3
10: ; preds = %3
ret void
}
void foo(double *output) {
  int i = 0;
  for (i = 0; i < 32; i++)
    output[i] = 0.0;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x20,-0xc(%rbp)
jge    113e <foo+0x3e>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
xorps  %xmm0,%xmm0
movsd  %xmm0,(%rax,%rcx,8)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <foo+0x16>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xorps  %xmm0,%xmm0
movups %xmm0,0xf0(%rdi)
movups %xmm0,0xe0(%rdi)
movups %xmm0,0xd0(%rdi)
movups %xmm0,0xc0(%rdi)
movups %xmm0,0xb0(%rdi)
movups %xmm0,0xa0(%rdi)
movups %xmm0,0x90(%rdi)
movups %xmm0,0x80(%rdi)
movups %xmm0,0x70(%rdi)
movups %xmm0,0x60(%rdi)
movups %xmm0,0x50(%rdi)
movups %xmm0,0x40(%rdi)
movups %xmm0,0x30(%rdi)
movups %xmm0,0x20(%rdi)
movups %xmm0,0x10(%rdi)
movups %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @foo(double* %0) {
%2 = alloca double*
%3 = alloca i32
store double* %0, double** %2
store i32 0, i32* %3
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 32
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load double*, double** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds double, double* %8, i64 %10
store double 0.000000e+00, double* %11
br label %12
12: ; preds = %7
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @foo(double* nocapture writeonly %0) {
%2 = bitcast double* %0 to i8*
ret void
}
/* Variables and functions */
int f48(int *);
int f49(int *p) { return f48(p); }


x86 assembly (clang, -O0):
<f49>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f48@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f49>:
jmp    1030 <f48@plt>

LLVM IR (-O0):
define i32 @f49(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f48(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f49(i32* %0) {
%2 = tail call i32 @f48(i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ trap_SendConsoleCommand(char *);
void CG_TauntTaunt_f(void) { trap_SendConsoleCommand("cmd vtaunt\n"); }


x86 assembly (clang, -O0):
<CG_TauntTaunt_f>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <trap_SendConsoleCommand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_TauntTaunt_f>:
lea    0xee9(%rip),%rdi
jmp    1030 <trap_SendConsoleCommand@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"cmd vtaunt\0A\00"
define void @CG_TauntTaunt_f() {
%1 = call i32 @trap_SendConsoleCommand(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"cmd vtaunt\0A\00"
define void @CG_TauntTaunt_f() {
%1 = tail call i32 @trap_SendConsoleCommand(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_parser_sourcefile(char *, char *);
int /*<<< orphan*/ test_parser_verify_entity(int /*<<< orphan*/, char *,
                                             char *);
void test_bfpp_comment_entities() {
  test_parser_verify_entity(test_parser_sourcefile("bfpp", " = comment"),
                            " comment", "= comment");
}


x86 assembly (clang, -O0):
<test_bfpp_comment_entities>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xed3(%rip),%rsi
call   1030 <test_parser_sourcefile@plt>
mov    %eax,%edi
lea    0xec7(%rip),%rsi
lea    0xebf(%rip),%rdx
call   1040 <test_parser_verify_entity@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_bfpp_comment_entities>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xed6(%rip),%rsi
call   1030 <test_parser_sourcefile@plt>
lea    0xecc(%rip),%rsi
lea    0xec4(%rip),%rdx
mov    %eax,%edi
pop    %rax
jmp    1040 <test_parser_verify_entity@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"bfpp\00"
@.str.1 = [11 x i8] c" = comment\00"
@.str.2 = [9 x i8] c" comment\00"
@.str.3 = [10 x i8] c"= comment\00"
define void @test_bfpp_comment_entities() {
%1 = call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%2 = call i32 @test_parser_verify_entity(i32 %1, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"bfpp\00"
@.str.1 = [11 x i8] c" = comment\00"
@.str.2 = [9 x i8] c" comment\00"
@.str.3 = [10 x i8] c"= comment\00"
define void @test_bfpp_comment_entities() {
%1 = tail call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @test_parser_verify_entity(i32 %1, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0))
ret void
}
int gcd(int a, int b) {
  if (b != 0)
    return gcd(b, a % b);
  else
    return a;
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1141 <gcd+0x31>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%esi
call   1030 <gcd@plt>
mov    %eax,-0x4(%rbp)
jmp    1147 <gcd+0x37>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %edi,%eax
test   %esi,%esi
je     111d <gcd+0x1d>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = srem i32 %10, %11
%13 = call i32 @gcd(i32 %9, i32 %12)
store i32 %13, i32* %3
br label %16
14: ; preds = %2
%15 = load i32, i32* %4
store i32 %15, i32* %3
br label %16
16: ; preds = %14, %8
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = phi i32 [ %5, %4 ], [ %0, %2 ]
%7 = srem i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %5, %4 ]
ret i32 %10
}
/* Variables and functions */
void *large_block_allocate(size_t);
void *large_malloc(size_t size) { return large_block_allocate(size); }


x86 assembly (clang, -O0):
<large_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <large_block_allocate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<large_malloc>:
jmp    1030 <large_block_allocate@plt>

LLVM IR (-O0):
define i8* @large_malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @large_block_allocate(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @large_malloc(i64 %0) {
%2 = tail call i8* @large_block_allocate(i64 %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ handle_QUIT(int /*<<< orphan*/);
int gen_QUIT() { handle_QUIT(0); }


x86 assembly (clang, -O0):
<gen_QUIT>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
call   1030 <handle_QUIT@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_QUIT>:
xor    %edi,%edi
jmp    1030 <handle_QUIT@plt>

LLVM IR (-O0):
define i32 @gen_QUIT() {
%1 = alloca i32
%2 = call i32 @handle_QUIT(i32 0)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @gen_QUIT() {
%1 = tail call i32 @handle_QUIT(i32 0)
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ I2C_WrData(int, int /*<<< orphan*/, int /*<<< orphan*/ *,
                              int);
uint32_t TSC_WrReg(uint8_t reg, uint8_t val) {
  return I2C_WrData(0x41, reg, &val, 1);
}


x86 assembly (clang, -O0):
<TSC_WrReg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x41,%edi
lea    -0x8(%rbp),%rdx
mov    $0x1,%ecx
call   1030 <I2C_WrData@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TSC_WrReg>:
push   %rax
mov    %edi,%eax
mov    %esi,0x4(%rsp)
lea    0x4(%rsp),%rdx
mov    $0x41,%edi
mov    %eax,%esi
mov    $0x1,%ecx
call   1030 <I2C_WrData@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @TSC_WrReg(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @I2C_WrData(i32 65, i32 %5, i32* %4, i32 1)
ret i32 %6
}

LLVM IR (-O2):
define i32 @TSC_WrReg(i32 %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = call i32 @I2C_WrData(i32 65, i32 %0, i32* %3, i32 1)
ret i32 %4
}
int div(int a, int b) { return a / b; }


x86 assembly (clang, -O0):
<div>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<div>:
mov    %edi,%eax
cltd
idiv   %esi
ret

LLVM IR (-O0):
define i32 @div(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sdiv i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @div(i32 %0, i32 %1) {
%3 = sdiv i32 %0, %1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ WNOHANG;
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ waitpid(int, int *, int /*<<< orphan*/);
void traitement_signal(int sig) {
  printf("Signal %d reçu \n", sig);
  waitpid(-1, &sig, WNOHANG);
}


x86 assembly (clang, -O0):
<traitement_signal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea7(%rip),%rax
mov    (%rax),%edx
mov    $0xffffffff,%edi
lea    -0x4(%rbp),%rsi
call   1040 <waitpid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<traitement_signal>:
push   %rax
mov    %edi,%esi
mov    %edi,0x4(%rsp)
lea    0xed2(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eae(%rip),%rax
mov    (%rax),%edx
lea    0x4(%rsp),%rsi
mov    $0xffffffff,%edi
call   1040 <waitpid@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [18 x i8] c"Signal %d re\C3\A7u \0A\00"
@WNOHANG = global i32 0
define void @traitement_signal(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* @WNOHANG
%6 = call i32 @waitpid(i32 -1, i32* %2, i32 %5)
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"Signal %d re\C3\A7u \0A\00"
@WNOHANG = global i32 0
define void @traitement_signal(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %0)
%4 = load i32, i32* @WNOHANG
%5 = call i32 @waitpid(i32 -1, i32* %2, i32 %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ chtype;

/* Variables and functions */
int /*<<< orphan*/ mvaddch(int, int, int /*<<< orphan*/);
void plot(int x, int y, char col) { mvaddch(y, x, (chtype)col); }


x86 assembly (clang, -O0):
<plot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x4(%rbp),%esi
movsbl -0x9(%rbp),%edx
call   1030 <mvaddch@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<plot>:
mov    %edi,%eax
mov    %esi,%edi
mov    %eax,%esi
jmp    1030 <mvaddch@plt>

LLVM IR (-O0):
define void @plot(i32 %0, i32 %1, i8 signext %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8 %2, i8* %6
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = load i8, i8* %6
%10 = sext i8 %9 to i32
%11 = call i32 @mvaddch(i32 %7, i32 %8, i32 %10)
ret void
}

LLVM IR (-O2):
define void @plot(i32 %0, i32 %1, i8 signext %2) {
%4 = sext i8 %2 to i32
%5 = tail call i32 @mvaddch(i32 %1, i32 %0, i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRNOTIMPLEMENTED_swap(char *, int);
void U_WMR5B_swap(char *record, int torev) {
  U_WMRNOTIMPLEMENTED_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMR5B_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRNOTIMPLEMENTED_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR5B_swap>:
jmp    1030 <U_WMRNOTIMPLEMENTED_swap@plt>

LLVM IR (-O0):
define void @U_WMR5B_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMR5B_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %0, i32 %1)
ret void
}
void ceph_fscache_unregister_inode_cookie(struct ceph_inode_info *ci) {}


x86 assembly (clang, -O0):
<ceph_fscache_unregister_inode_cookie>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceph_fscache_unregister_inode_cookie>:
ret

LLVM IR (-O0):
%struct.ceph_inode_info = type opaque
define void @ceph_fscache_unregister_inode_cookie(%struct.ceph_inode_info* %0) {
%2 = alloca %struct.ceph_inode_info*
store %struct.ceph_inode_info* %0, %struct.ceph_inode_info** %2
ret void
}

LLVM IR (-O2):
%struct.ceph_inode_info = type opaque
define void @ceph_fscache_unregister_inode_cookie(%struct.ceph_inode_info* nocapture %0) {
ret void
}
void wifi_rsp_sme_set_ap_password(
    const struct wifi_msg_sme_set_ap_password_rsp_t *msg) {}


x86 assembly (clang, -O0):
<wifi_rsp_sme_set_ap_password>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifi_rsp_sme_set_ap_password>:
ret

LLVM IR (-O0):
%struct.wifi_msg_sme_set_ap_password_rsp_t = type opaque
define void @wifi_rsp_sme_set_ap_password(%struct.wifi_msg_sme_set_ap_password_rsp_t* %0) {
%2 = alloca %struct.wifi_msg_sme_set_ap_password_rsp_t*
store %struct.wifi_msg_sme_set_ap_password_rsp_t* %0, %struct.wifi_msg_sme_set_ap_password_rsp_t** %2
ret void
}

LLVM IR (-O2):
%struct.wifi_msg_sme_set_ap_password_rsp_t = type opaque
define void @wifi_rsp_sme_set_ap_password(%struct.wifi_msg_sme_set_ap_password_rsp_t* nocapture %0) {
ret void
}