float Bounce__easeOut(float t, float b, float c, float d, float p0, float p1) {
  if ((t /= d) < (1 / 2.75f)) {
    return c * (7.5625f * t * t) + b;
  } else if (t < (2 / 2.75f)) {
    float postFix = t -= (1.5f / 2.75f);
    return c * (7.5625f * (postFix)*t + .75f) + b;
  } else if (t < (2.5 / 2.75)) {
    float postFix = t -= (2.25f / 2.75f);
    return c * (7.5625f * (postFix)*t + .9375f) + b;
  } else {
    float postFix = t -= (2.625f / 2.75f);
    return c * (7.5625f * (postFix)*t + .984375f) + b;
  }
}


x86 assembly (clang, -O0):
<Bounce__easeOut>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  %xmm2,-0x10(%rbp)
movss  %xmm3,-0x14(%rbp)
movss  %xmm4,-0x18(%rbp)
movss  %xmm5,-0x1c(%rbp)
movss  -0x14(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
divss  %xmm0,%xmm1
movss  %xmm1,-0x8(%rbp)
movss  0xec3(%rip),%xmm0
ucomiss %xmm1,%xmm0
jbe    1174 <Bounce__easeOut+0x74>
movss  -0x10(%rbp),%xmm0
movss  0xeb9(%rip),%xmm2
mulss  -0x8(%rbp),%xmm2
mulss  -0x8(%rbp),%xmm2
movss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    12a7 <Bounce__easeOut+0x1a7>
movss  0xe88(%rip),%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    11df <Bounce__easeOut+0xdf>
movss  -0x8(%rbp),%xmm0
movss  0xe8d(%rip),%xmm1
subss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  %xmm0,-0x20(%rbp)
movss  -0x10(%rbp),%xmm0
movss  0xe5e(%rip),%xmm2
mulss  -0x20(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  %xmm1,%xmm2
movss  0xe58(%rip),%xmm1
addss  %xmm1,%xmm2
movss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    12a7 <Bounce__easeOut+0x1a7>
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xe38(%rip),%xmm0
ucomisd %xmm1,%xmm0
jbe    1253 <Bounce__easeOut+0x153>
movss  -0x8(%rbp),%xmm0
movss  0xe11(%rip),%xmm1
subss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  %xmm0,-0x24(%rbp)
movss  -0x10(%rbp),%xmm0
movss  0xdea(%rip),%xmm2
mulss  -0x24(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  %xmm1,%xmm2
movss  0xddc(%rip),%xmm1
addss  %xmm1,%xmm2
movss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    12a7 <Bounce__easeOut+0x1a7>
movss  -0x8(%rbp),%xmm0
movss  0xdb0(%rip),%xmm1
subss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  %xmm0,-0x28(%rbp)
movss  -0x10(%rbp),%xmm0
movss  0xd91(%rip),%xmm2
mulss  -0x28(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  %xmm1,%xmm2
movss  0xd77(%rip),%xmm1
addss  %xmm1,%xmm2
movss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Bounce__easeOut>:
divss  %xmm3,%xmm0
movss  0xef4(%rip),%xmm3
ucomiss %xmm0,%xmm3
jbe    1126 <Bounce__easeOut+0x26>
movss  0xef3(%rip),%xmm3
mulss  %xmm0,%xmm3
mulss  %xmm0,%xmm3
jmp    11ac <Bounce__easeOut+0xac>
movss  0xed6(%rip),%xmm3
ucomiss %xmm0,%xmm3
jbe    1155 <Bounce__easeOut+0x55>
addss  0xee1(%rip),%xmm0
movss  0xec9(%rip),%xmm3
mulss  %xmm0,%xmm3
mulss  %xmm0,%xmm3
addss  0xecd(%rip),%xmm3
jmp    11ac <Bounce__easeOut+0xac>
xorps  %xmm3,%xmm3
cvtss2sd %xmm0,%xmm3
movsd  0xec4(%rip),%xmm4
ucomisd %xmm3,%xmm4
jbe    118c <Bounce__easeOut+0x8c>
addss  0xea2(%rip),%xmm0
movss  0xe92(%rip),%xmm3
mulss  %xmm0,%xmm3
mulss  %xmm0,%xmm3
addss  0xe8e(%rip),%xmm3
jmp    11ac <Bounce__easeOut+0xac>
addss  0xe74(%rip),%xmm0
movss  0xe70(%rip),%xmm3
mulss  %xmm0,%xmm3
mulss  %xmm0,%xmm3
addss  0xe64(%rip),%xmm3
mulss  %xmm3,%xmm2
addss  %xmm1,%xmm2
movaps %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @Bounce__easeOut(float %0, float %1, float %2, float %3, float %4, float %5) {
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
%11 = alloca float
%12 = alloca float
%13 = alloca float
%14 = alloca float
%15 = alloca float
%16 = alloca float
store float %0, float* %8
store float %1, float* %9
store float %2, float* %10
store float %3, float* %11
store float %4, float* %12
store float %5, float* %13
%17 = load float, float* %11
%18 = load float, float* %8
%19 = fdiv float %18, %17
store float %19, float* %8
%20 = fcmp olt float %19, 0x3FD745D180000000
br i1 %20, label %21, label %29
21: ; preds = %6
%22 = load float, float* %10
%23 = load float, float* %8
%24 = fmul float 7.562500e+00, %23
%25 = load float, float* %8
%26 = fmul float %24, %25
%27 = load float, float* %9
%28 = call float @llvm.fmuladd.f32(float %22, float %26, float %27)
store float %28, float* %7
br label %66
29: ; preds = %6
%30 = load float, float* %8
%31 = fcmp olt float %30, 0x3FE745D180000000
br i1 %31, label %32, label %42
32: ; preds = %29
%33 = load float, float* %8
%34 = fsub float %33, 0x3FE1745D20000000
store float %34, float* %8
store float %34, float* %14
%35 = load float, float* %10
%36 = load float, float* %14
%37 = fmul float 7.562500e+00, %36
%38 = load float, float* %8
%39 = call float @llvm.fmuladd.f32(float %37, float %38, float 7.500000e-01)
%40 = load float, float* %9
%41 = call float @llvm.fmuladd.f32(float %35, float %39, float %40)
store float %41, float* %7
br label %66
42: ; preds = %29
%43 = load float, float* %8
%44 = fpext float %43 to double
%45 = fcmp olt double %44, 0x3FED1745D1745D17
br i1 %45, label %46, label %56
46: ; preds = %42
%47 = load float, float* %8
%48 = fsub float %47, 0x3FEA2E8BA0000000
store float %48, float* %8
store float %48, float* %15
%49 = load float, float* %10
%50 = load float, float* %15
%51 = fmul float 7.562500e+00, %50
%52 = load float, float* %8
%53 = call float @llvm.fmuladd.f32(float %51, float %52, float 9.375000e-01)
%54 = load float, float* %9
%55 = call float @llvm.fmuladd.f32(float %49, float %53, float %54)
store float %55, float* %7
br label %66
56: ; preds = %42
%57 = load float, float* %8
%58 = fsub float %57, 0x3FEE8BA2E0000000
store float %58, float* %8
store float %58, float* %16
%59 = load float, float* %10
%60 = load float, float* %16
%61 = fmul float 7.562500e+00, %60
%62 = load float, float* %8
%63 = call float @llvm.fmuladd.f32(float %61, float %62, float 9.843750e-01)
%64 = load float, float* %9
%65 = call float @llvm.fmuladd.f32(float %59, float %63, float %64)
store float %65, float* %7
br label %66
66: ; preds = %56, %46, %32, %21
%67 = load float, float* %7
ret float %67
}

LLVM IR (-O2):
define float @Bounce__easeOut(float %0, float %1, float %2, float %3, float %4, float %5) {
%7 = fdiv float %0, %3
%8 = fcmp olt float %7, 0x3FD745D180000000
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = fmul float %7, 7.562500e+00
%11 = fmul float %7, %10
br label %29
12: ; preds = %6
%13 = fcmp olt float %7, 0x3FE745D180000000
br i1 %13, label %14, label %18
14: ; preds = %12
%15 = fadd float %7, 0xBFE1745D20000000
%16 = fmul float %15, 7.562500e+00
%17 = tail call float @llvm.fmuladd.f32(float %16, float %15, float 7.500000e-01)
br label %29
18: ; preds = %12
%19 = fpext float %7 to double
%20 = fcmp olt double %19, 0x3FED1745D1745D17
br i1 %20, label %21, label %25
21: ; preds = %18
%22 = fadd float %7, 0xBFEA2E8BA0000000
%23 = fmul float %22, 7.562500e+00
%24 = tail call float @llvm.fmuladd.f32(float %23, float %22, float 9.375000e-01)
br label %29
25: ; preds = %18
%26 = fadd float %7, 0xBFEE8BA2E0000000
%27 = fmul float %26, 7.562500e+00
%28 = tail call float @llvm.fmuladd.f32(float %27, float %26, float 9.843750e-01)
br label %29
29: ; preds = %25, %21, %14, %9
%30 = phi float [ %28, %25 ], [ %24, %21 ], [ %17, %14 ], [ %11, %9 ]
%31 = tail call float @llvm.fmuladd.f32(float %2, float %30, float %1)
ret float %31
}