xunge/DecIR huggingface dataset:
int compare_double_p(const void *p, const void *q) {
  double pd = *(const double *)p;
  double qd = *(const double *)q;
  if (pd > qd) {
    return 1;
  } else if (pd < qd) {
    return -1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<compare_double_p>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x20(%rbp)
mov    -0x18(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x20(%rbp),%xmm0
ucomisd -0x28(%rbp),%xmm0
jbe    1142 <compare_double_p+0x42>
movl   $0x1,-0x4(%rbp)
jmp    1169 <compare_double_p+0x69>
movsd  -0x20(%rbp),%xmm1
movsd  -0x28(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1162 <compare_double_p+0x62>
movl   $0xffffffff,-0x4(%rbp)
jmp    1169 <compare_double_p+0x69>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_double_p>:
movsd  (%rdi),%xmm0
movsd  (%rsi),%xmm1
xor    %ecx,%ecx
ucomisd %xmm0,%xmm1
seta   %cl
neg    %ecx
ucomisd %xmm1,%xmm0
mov    $0x1,%eax
cmovbe %ecx,%eax
ret

LLVM IR (-O0):
define i32 @compare_double_p(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca double
%7 = alloca double
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to double*
%10 = load double, double* %9
store double %10, double* %6
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to double*
%13 = load double, double* %12
store double %13, double* %7
%14 = load double, double* %6
%15 = load double, double* %7
%16 = fcmp ogt double %14, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 1, i32* %3
br label %24
18: ; preds = %2
%19 = load double, double* %6
%20 = load double, double* %7
%21 = fcmp olt double %19, %20
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 -1, i32* %3
br label %24
23: ; preds = %18
store i32 0, i32* %3
br label %24
24: ; preds = %23, %22, %17
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @compare_double_p(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to double*
%4 = load double, double* %3
%5 = bitcast i8* %1 to double*
%6 = load double, double* %5
%7 = fcmp ogt double %4, %6
%8 = fcmp olt double %4, %6
%9 = sext i1 %8 to i32
%10 = select i1 %7, i32 1, i32 %9
ret i32 %10
}
__attribute((always_)) float glm_rad(float deg) {
  return deg * ((float)3.14159265358979323846264338327950288) / 180.0f;
}


x86 assembly (clang, -O0):
<glm_rad>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xef3(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  0xee2(%rip),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<glm_rad>:
mulss  0xef8(%rip),%xmm0
divss  0xef4(%rip),%xmm0
ret

LLVM IR (-O0):
define float @glm_rad(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float %3, 0x400921FB60000000
%5 = fdiv float %4, 1.800000e+02
ret float %5
}

LLVM IR (-O2):
define float @glm_rad(float %0) {
%2 = fmul float %0, 0x400921FB60000000
%3 = fdiv float %2, 1.800000e+02
ret float %3
}
void byteReverse(unsigned char *buf, unsigned longs) {
  (void)buf;
  (void)longs;
}


x86 assembly (clang, -O0):
<byteReverse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<byteReverse>:
ret

LLVM IR (-O0):
define void @byteReverse(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
define void @byteReverse(i8* nocapture %0, i32 %1) {
ret void
}
void fdmi_dtype_op_SUM_double(void *a, void *b) {
  (*(double *)a = (*(double *)a) + (*(double *)b));
}


x86 assembly (clang, -O0):
<fdmi_dtype_op_SUM_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rax
addsd  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdmi_dtype_op_SUM_double>:
movsd  (%rdi),%xmm0
addsd  (%rsi),%xmm0
movsd  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @fdmi_dtype_op_SUM_double(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to double*
%7 = load double, double* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to double*
%10 = load double, double* %9
%11 = fadd double %7, %10
%12 = load i8*, i8** %3
%13 = bitcast i8* %12 to double*
store double %11, double* %13
ret void
}

LLVM IR (-O2):
define void @fdmi_dtype_op_SUM_double(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to double*
%4 = load double, double* %3
%5 = bitcast i8* %1 to double*
%6 = load double, double* %5
%7 = fadd double %4, %6
store double %7, double* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ thread_print_all();
void _ps_handler(char *unnused) { thread_print_all(); }


x86 assembly (clang, -O0):
<_ps_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <thread_print_all@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ps_handler>:
xor    %eax,%eax
jmp    1030 <thread_print_all@plt>

LLVM IR (-O0):
define void @_ps_handler(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @thread_print_all()
ret void
}

LLVM IR (-O2):
define void @_ps_handler(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @thread_print_all()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int /*<<< orphan*/ close(int);
scalar_t__ errno;
int open(char const *, int /*<<< orphan*/);
int test_file_open(const char *path, mode_t mode) {
  int fd = open(path, mode);
  if (fd < 0)
    return -1;
  close(fd);
  errno = 0;
  return 0;
}


x86 assembly (clang, -O0):
<test_file_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <open@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jge    1154 <test_file_open+0x34>
movl   $0xffffffff,-0x4(%rbp)
jmp    1171 <test_file_open+0x51>
mov    -0x18(%rbp),%edi
call   1030 <close@plt>
mov    0x2e7d(%rip),%rax
movq   $0x0,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_file_open>:
push   %rax
call   1040 <open@plt>
test   %eax,%eax
js     1143 <test_file_open+0x23>
mov    %eax,%edi
call   1030 <close@plt>
mov    0x2ea8(%rip),%rax
movq   $0x0,(%rax)
xor    %eax,%eax
pop    %rcx
ret
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@errno = global i64 0
define i32 @test_file_open(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = call i32 @open(i8* %7, i32 %8)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp slt i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %2
store i32 -1, i32* %3
br label %16
13: ; preds = %2
%14 = load i32, i32* %6
%15 = call i32 @close(i32 %14)
store i64 0, i64* @errno
store i32 0, i32* %3
br label %16
16: ; preds = %13, %12
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
@errno = global i64 0
define i32 @test_file_open(i8* nocapture %0, i32 %1) {
%3 = tail call i32 @open(i8* %0, i32 %1)
%4 = icmp slt i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @close(i32 %3)
store i64 0, i64* @errno
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ 0, %5 ], [ -1, %2 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ puts(char const *);
void log_write(unsigned level, const char *format, ...) {
  (void)level;
  puts(format);
}


x86 assembly (clang, -O0):
<log_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <puts@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_write>:
mov    %rsi,%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
define void @log_write(i32 %0, i8* %1, ...) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i32 @puts(i8* %6)
ret void
}

LLVM IR (-O2):
define void @log_write(i32 %0, i8* nocapture %1, ...) {
%3 = tail call i32 @puts(i8* dereferenceable(1) %1)
ret void
}
void gdk_draw_gray_image() {}


x86 assembly (clang, -O0):
<gdk_draw_gray_image>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_draw_gray_image>:
ret

LLVM IR (-O0):
define void @gdk_draw_gray_image() {
ret void
}

LLVM IR (-O2):
define void @gdk_draw_gray_image() {
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void uDMAControlBaseSet(void *psControlTable) {

  ;
  ;
  (*((volatile uint32_t *)(0x400FF008))) = (uint32_t)psControlTable;
}


x86 assembly (clang, -O0):
<uDMAControlBaseSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x400ff008,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<uDMAControlBaseSet>:
mov    %rdi,0x400ff008
40
ret

LLVM IR (-O0):
define void @uDMAControlBaseSet(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
store volatile i64 %4, i64* inttoptr (i64 1074786312 to i64*)
ret void
}

LLVM IR (-O2):
define void @uDMAControlBaseSet(i8* %0) {
%2 = ptrtoint i8* %0 to i64
store volatile i64 %2, i64* inttoptr (i64 1074786312 to i64*)
ret void
}
int main(void) {
  int counter = 0;
  while (counter < 5) {
    counter++;
  }
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jge    112a <main+0x2a>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 5
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
store i32 %8, i32* %2
br label %3
9: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ islower(int);
void t_islower_0xc2() {
  Assert_real((islower(194) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              975, ("islower should be 0 for 0xc2"));
}


x86 assembly (clang, -O0):
<t_islower_0xc2>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc2,%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3cf,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0xc2>:
push   %rax
mov    $0xc2,%edi
call   1030 <islower@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3cf,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xc2\00"
define void @t_islower_0xc2() {
%1 = call i64 @islower(i32 194)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 975, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xc2\00"
define void @t_islower_0xc2() {
%1 = tail call i64 @islower(i32 194)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 975, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t remove_31(uint8_t a) {
  int qq = a;
  qq -= 31;
  return (a & (qq >> 5));
}


x86 assembly (clang, -O0):
<remove_31>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1f,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    $0x5,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_31>:
lea    -0x1f(%rdi),%eax
sar    $0x5,%eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @remove_31(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = sub nsw i32 %5, 31
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = ashr i32 %8, 5
%10 = and i32 %7, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @remove_31(i32 %0) {
%2 = add nsw i32 %0, -31
%3 = ashr i32 %2, 5
%4 = and i32 %3, %0
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ decode_u32le(int /*<<< orphan*/ **);
int32_t decode_s32le(uint8_t **cursor) { return (int32_t)decode_u32le(cursor); }


x86 assembly (clang, -O0):
<decode_s32le>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <decode_u32le@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode_s32le>:
jmp    1030 <decode_u32le@plt>

LLVM IR (-O0):
define i32 @decode_s32le(i32** %0) {
%2 = alloca i32**
store i32** %0, i32*** %2
%3 = load i32**, i32*** %2
%4 = call i32 @decode_u32le(i32** %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @decode_s32le(i32** %0) {
%2 = tail call i32 @decode_u32le(i32** %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int);
int main() {
  int i;
  int power_down, power_index;
  int result;
  result = 1;
  power_down = 2;
  power_index = 20;
  for (i = 1; i <= power_index; i++) {
    result = result * power_down;
  }
  printf("%d^%d=%d", power_down, power_index, result);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x14(%rbp)
movl   $0x2,-0xc(%rbp)
movl   $0x14,-0x10(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
jg     115f <main+0x4f>
mov    -0x14(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    113b <main+0x2b>
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x14(%rbp),%ecx
lea    0xe91(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x2,%esi
mov    $0x14,%edx
mov    $0x100000,%ecx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"%d^%d=%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %5
store i32 2, i32* %3
store i32 20, i32* %4
store i32 1, i32* %2
br label %6
6: ; preds = %14, %0
%7 = load i32, i32* %2
%8 = load i32, i32* %4
%9 = icmp sle i32 %7, %8
br i1 %9, label %10, label %17
10: ; preds = %6
%11 = load i32, i32* %5
%12 = load i32, i32* %3
%13 = mul nsw i32 %11, %12
store i32 %13, i32* %5
br label %14
14: ; preds = %10
%15 = load i32, i32* %2
%16 = add nsw i32 %15, 1
store i32 %16, i32* %2
br label %6
17: ; preds = %6
%18 = load i32, i32* %3
%19 = load i32, i32* %4
%20 = load i32, i32* %5
%21 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %18, i32 %19, i32 %20)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"%d^%d=%d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 2, i32 20, i32 1048576)
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ place;
};
struct TYPE_4__ {
  TYPE_1__ xcirculate;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
int get_XEvent_xcirculate_place(void *_p) {
  return (int)((XEvent *)_p)->xcirculate.place;
}


x86 assembly (clang, -O0):
<get_XEvent_xcirculate_place>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xcirculate_place>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i32 @get_XEvent_xcirculate_place(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_XEvent_xcirculate_place(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
int strequal(char *s1, char *s2) {
  while (*s1 == *s2++)
    if (*s1++ == '\0') {
      return (0);
    }
  return 1;
}


x86 assembly (clang, -O0):
<strequal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jne    1159 <strequal+0x59>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1154 <strequal+0x54>
movl   $0x0,-0x4(%rbp)
jmp    1160 <strequal+0x60>
jmp    110c <strequal+0xc>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strequal>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%rdi,%rax,1),%ecx
cmp    (%rsi,%rax,1),%cl
jne    1124 <strequal+0x24>
add    $0x1,%rax
test   %cl,%cl
jne    1110 <strequal+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @strequal(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
br label %6
6: ; preds = %22, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i8*, i8** %5
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %5
%12 = load i8, i8* %10
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %9, %13
br i1 %14, label %15, label %23
15: ; preds = %6
%16 = load i8*, i8** %4
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %4
%18 = load i8, i8* %16
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %15
store i32 0, i32* %3
br label %24
22: ; preds = %15
br label %6
23: ; preds = %6
store i32 1, i32* %3
br label %24
24: ; preds = %23, %21
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @strequal(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %9, %2
%4 = phi i8* [ %0, %2 ], [ %11, %9 ]
%5 = phi i8* [ %1, %2 ], [ %10, %9 ]
%6 = load i8, i8* %4
%7 = load i8, i8* %5
%8 = icmp eq i8 %6, %7
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = getelementptr inbounds i8, i8* %5, i64 1
%11 = getelementptr inbounds i8, i8* %4, i64 1
%12 = icmp eq i8 %6, 0
br i1 %12, label %13, label %3
13: ; preds = %3, %9
%14 = phi i32 [ 0, %9 ], [ 1, %3 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usageErr(char *arg) {
  fprintf(stderr,
          "\n\nUsage: %s [OPTION(S)] <hostname>\n\nChoose 1(ONE) or BOTH "
          "option(s) to run server in the desired mode\n  -r     perform "
          "registration commands with\n            Directory Server : "
          "apollo.cselabs.umn.edu:9080\n  -f     recieve file(s) sent by "
          "client(s)\n\nTHANK YOU TRY AGAIN:)\n",
          arg);
}


x86 assembly (clang, -O0):
<usageErr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usageErr>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [272 x i8] c"\0A\0AUsage: %s [OPTION(S)] <hostname>\0A\0AChoose 1(ONE) or BOTH option(s) to run server in the desired mode\0A -r perform registration commands with\0A Directory Server : apollo.cselabs.umn.edu:9080\0A -f recieve file(s) sent by client(s)\0A\0ATHANK YOU TRY AGAIN:)\0A\00"
define void @usageErr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([272 x i8], [272 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [272 x i8] c"\0A\0AUsage: %s [OPTION(S)] <hostname>\0A\0AChoose 1(ONE) or BOTH option(s) to run server in the desired mode\0A -r perform registration commands with\0A Directory Server : apollo.cselabs.umn.edu:9080\0A -f recieve file(s) sent by client(s)\0A\0ATHANK YOU TRY AGAIN:)\0A\00"
define void @usageErr(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([272 x i8], [272 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
unsigned long invoke_psci_fn(unsigned long a0, unsigned long a1,
                             unsigned long a2, unsigned long a3) {
  return -8;
}


x86 assembly (clang, -O0):
<invoke_psci_fn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    $0xfffffffffffffff8,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<invoke_psci_fn>:
mov    $0xfffffffffffffff8,%rax
ret

LLVM IR (-O0):
define i64 @invoke_psci_fn(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
ret i64 -8
}

LLVM IR (-O2):
define i64 @invoke_psci_fn(i64 %0, i64 %1, i64 %2, i64 %3) {
ret i64 -8
}
/* Type definitions */
struct i2c_adapter {
  int dummy;
};

/* Variables and functions */
int inv_i2c_write(struct i2c_adapter *, unsigned char, int, unsigned char *);
int inv_i2c_write_register(struct i2c_adapter *i2c_adap, unsigned char address,
                           unsigned char reg, unsigned char value) {
  unsigned char data[2];
  data[0] = reg;
  data[1] = value;
  return inv_i2c_write(i2c_adap, address, 2, data);
}


x86 assembly (clang, -O0):
<inv_i2c_write_register>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %cl,%al
mov    %dl,%cl
mov    %sil,%dl
mov    %rdi,-0x8(%rbp)
mov    %dl,-0x9(%rbp)
mov    %cl,-0xa(%rbp)
mov    %al,-0xb(%rbp)
mov    -0xa(%rbp),%al
mov    %al,-0xd(%rbp)
mov    -0xb(%rbp),%al
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x9(%rbp),%al
lea    -0xd(%rbp),%rcx
mov    $0x2,%edx
movzbl %al,%esi
call   1030 <inv_i2c_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inv_i2c_write_register>:
push   %rax
mov    %dl,0x6(%rsp)
mov    %cl,0x7(%rsp)
lea    0x6(%rsp),%rcx
mov    $0x2,%edx
call   1030 <inv_i2c_write@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.i2c_adapter = type { i32 }
define i32 @inv_i2c_write_register(%struct.i2c_adapter* %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = alloca %struct.i2c_adapter*
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca [2 x i8]
store %struct.i2c_adapter* %0, %struct.i2c_adapter** %5
store i8 %1, i8* %6
store i8 %2, i8* %7
store i8 %3, i8* %8
%10 = load i8, i8* %7
%11 = getelementptr inbounds [2 x i8], [2 x i8]* %9, i64 0, i64 0
store i8 %10, i8* %11
%12 = load i8, i8* %8
%13 = getelementptr inbounds [2 x i8], [2 x i8]* %9, i64 0, i64 1
store i8 %12, i8* %13
%14 = load %struct.i2c_adapter*, %struct.i2c_adapter** %5
%15 = load i8, i8* %6
%16 = getelementptr inbounds [2 x i8], [2 x i8]* %9, i64 0, i64 0
%17 = call i32 @inv_i2c_write(%struct.i2c_adapter* %14, i8 zeroext %15, i32 2, i8* %16)
ret i32 %17
}

LLVM IR (-O2):
%struct.i2c_adapter = type { i32 }
define i32 @inv_i2c_write_register(%struct.i2c_adapter* %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = alloca [2 x i8]
%6 = getelementptr inbounds [2 x i8], [2 x i8]* %5, i64 0, i64 0
store i8 %2, i8* %6
%7 = getelementptr inbounds [2 x i8], [2 x i8]* %5, i64 0, i64 1
store i8 %3, i8* %7
%8 = call i32 @inv_i2c_write(%struct.i2c_adapter* %0, i8 zeroext %1, i32 2, i8* %6)
ret i32 %8
}
void RSA_print(void) {}


x86 assembly (clang, -O0):
<RSA_print>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RSA_print>:
ret

LLVM IR (-O0):
define void @RSA_print() {
ret void
}

LLVM IR (-O2):
define void @RSA_print() {
ret void
}
/* Variables and functions */
int shim_enosys(int /*<<< orphan*/, int, char const *, int, char const *,
                unsigned int);
int shim_move_mount(int from_dfd, const char *from_pathname, int to_dfd,
                    const char *to_pathname, unsigned int flags) {
  return shim_enosys(0, from_dfd, from_pathname, to_dfd, to_pathname, flags);
}


x86 assembly (clang, -O0):
<shim_move_mount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x20(%rbp),%r8
mov    -0x24(%rbp),%r9d
xor    %edi,%edi
call   1030 <shim_enosys@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shim_move_mount>:
mov    %r8d,%r9d
mov    %rcx,%r8
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%esi
xor    %edi,%edi
jmp    1030 <shim_enosys@plt>

LLVM IR (-O0):
define i32 @shim_move_mount(i32 %0, i8* %1, i32 %2, i8* %3, i32 %4) {
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i32
store i32 %0, i32* %6
store i8* %1, i8** %7
store i32 %2, i32* %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i8*, i8** %7
%13 = load i32, i32* %8
%14 = load i8*, i8** %9
%15 = load i32, i32* %10
%16 = call i32 @shim_enosys(i32 0, i32 %11, i8* %12, i32 %13, i8* %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @shim_move_mount(i32 %0, i8* %1, i32 %2, i8* %3, i32 %4) {
%6 = tail call i32 @shim_enosys(i32 0, i32 %0, i8* %1, i32 %2, i8* %3, i32 %4)
ret i32 %6
}
const char *tech_getMonth(unsigned char month) {
  const char __MONTHS[][12] = {{"January"}, {"February"}, {"March"},
                               {"April"},   {"May"},      {"June"},
                               {"July"},    {"August"},   {"September"},
                               {"October"}, {"November"}, {"December"}};
  if (month >= 12)
    return 0;
  return __MONTHS[month];
}


x86 assembly (clang, -O0):
<tech_getMonth>:
push   %rbp
mov    %rsp,%rbp
sub    $0xa0,%rsp
mov    %dil,%al
mov    %al,-0x9(%rbp)
lea    -0xa0(%rbp),%rdi
lea    0xed1(%rip),%rsi
mov    $0x90,%edx
call   1030 <memcpy@plt>
movzbl -0x9(%rbp),%eax
cmp    $0xc,%eax
jl     1153 <tech_getMonth+0x43>
movq   $0x0,-0x8(%rbp)
jmp    116b <tech_getMonth+0x5b>
movzbl -0x9(%rbp),%eax
mov    %eax,%ecx
lea    -0xa0(%rbp),%rax
imul   $0xc,%rcx,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0xa0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tech_getMonth>:
sub    $0x18,%rsp
xor    %eax,%eax
cmp    $0xc,%dil
mov    %edi,%ecx
lea    (%rcx,%rcx,2),%rcx
lea    -0x80(%rsp,%rcx,4),%rcx
cmovb  %rcx,%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.tech_getMonth.__MONTHS = [12 x [12 x i8]] [[12 x i8] c"January\00\00\00\00\00", [12 x i8] c"February\00\00\00\00", [12 x i8] c"March\00\00\00\00\00\00\00", [12 x i8] c"April\00\00\00\00\00\00\00", [12 x i8] c"May\00\00\00\00\00\00\00\00\00", [12 x i8] c"June\00\00\00\00\00\00\00\00", [12 x i8] c"July\00\00\00\00\00\00\00\00", [12 x i8] c"August\00\00\00\00\00\00", [12 x i8] c"September\00\00\00", [12 x i8] c"October\00\00\00\00\00", [12 x i8] c"November\00\00\00\00", [12 x i8] c"December\00\00\00\00"]
define i8* @tech_getMonth(i8 zeroext %0) {
%2 = alloca i8*
%3 = alloca i8
%4 = alloca [12 x [12 x i8]]
store i8 %0, i8* %3
%5 = bitcast [12 x [12 x i8]]* %4 to i8*
%6 = load i8, i8* %3
%7 = zext i8 %6 to i32
%8 = icmp sge i32 %7, 12
br i1 %8, label %9, label %10
9: ; preds = %1
store i8* null, i8** %2
br label %15
10: ; preds = %1
%11 = load i8, i8* %3
%12 = zext i8 %11 to i64
%13 = getelementptr inbounds [12 x [12 x i8]], [12 x [12 x i8]]* %4, i64 0, i64 %12
%14 = getelementptr inbounds [12 x i8], [12 x i8]* %13, i64 0, i64 0
store i8* %14, i8** %2
br label %15
15: ; preds = %10, %9
%16 = load i8*, i8** %2
ret i8* %16
}

LLVM IR (-O2):
define noalias i8* @tech_getMonth(i8 zeroext %0) {
%2 = alloca [12 x [12 x i8]]
%3 = getelementptr inbounds [12 x [12 x i8]], [12 x [12 x i8]]* %2, i64 0, i64 0, i64 0
%4 = icmp ugt i8 %0, 11
%5 = zext i8 %0 to i64
%6 = getelementptr inbounds [12 x [12 x i8]], [12 x [12 x i8]]* %2, i64 0, i64 %5, i64 0
%7 = select i1 %4, i8* null, i8* %6
ret i8* %7
}
/* Variables and functions */
int write(int, int const *, int);
int write_int4_array(int f, const int *i, int n) {
  return write(f, i, 4 * n) / 4;
}


x86 assembly (clang, -O0):
<write_int4_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
shl    $0x2,%edx
call   1030 <write@plt>
mov    $0x4,%ecx
cltd
idiv   %ecx
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_int4_array>:
push   %rax
shl    $0x2,%edx
call   1030 <write@plt>
lea    0x3(%rax),%ecx
test   %eax,%eax
cmovs  %ecx,%eax
sar    $0x2,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @write_int4_array(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32*, i32** %5
%9 = load i32, i32* %6
%10 = mul nsw i32 4, %9
%11 = call i32 @write(i32 %7, i32* %8, i32 %10)
%12 = sdiv i32 %11, 4
ret i32 %12
}

LLVM IR (-O2):
define i32 @write_int4_array(i32 %0, i32* nocapture %1, i32 %2) {
%4 = shl nsw i32 %2, 2
%5 = tail call i32 @write(i32 %0, i32* %1, i32 %4)
%6 = sdiv i32 %5, 4
ret i32 %6
}
int dim_map(int i) {
  static int map[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32, 48, 64, 128, 256};
  return (map[i]);
}


x86 assembly (clang, -O0):
<dim_map>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rcx
lea    0x2f1e(%rip),%rax
mov    (%rax,%rcx,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dim_map>:
movslq %edi,%rax
lea    0xef6(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
@dim_map.map = internal global [14 x i32] [i32 1, i32 2, i32 3, i32 4, i32 6, i32 8, i32 12, i32 16, i32 24, i32 32, i32 48, i32 64, i32 128, i32 256]
define i32 @dim_map(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds [14 x i32], [14 x i32]* @dim_map.map, i64 0, i64 %4
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
@dim_map.map = internal unnamed_addr constant [14 x i32] [i32 1, i32 2, i32 3, i32 4, i32 6, i32 8, i32 12, i32 16, i32 24, i32 32, i32 48, i32 64, i32 128, i32 256]
define i32 @dim_map(i32 %0) {
%2 = sext i32 %0 to i64
%3 = getelementptr inbounds [14 x i32], [14 x i32]* @dim_map.map, i64 0, i64 %2
%4 = load i32, i32* %3
ret i32 %4
}
void emit_maybe_nothing(struct processor_explicatory_state *process_state,
                        struct modern_stream *stream, void *stream_state,
                        struct modern_vfile *vfile, void *vfile_state) {}


x86 assembly (clang, -O0):
<emit_maybe_nothing>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_maybe_nothing>:
ret

LLVM IR (-O0):
%struct.processor_explicatory_state = type opaque
%struct.modern_stream = type opaque
%struct.modern_vfile = type opaque
define void @emit_maybe_nothing(%struct.processor_explicatory_state* %0, %struct.modern_stream* %1, i8* %2, %struct.modern_vfile* %3, i8* %4) {
%6 = alloca %struct.processor_explicatory_state*
%7 = alloca %struct.modern_stream*
%8 = alloca i8*
%9 = alloca %struct.modern_vfile*
%10 = alloca i8*
store %struct.processor_explicatory_state* %0, %struct.processor_explicatory_state** %6
store %struct.modern_stream* %1, %struct.modern_stream** %7
store i8* %2, i8** %8
store %struct.modern_vfile* %3, %struct.modern_vfile** %9
store i8* %4, i8** %10
ret void
}

LLVM IR (-O2):
%struct.processor_explicatory_state = type opaque
%struct.modern_stream = type opaque
%struct.modern_vfile = type opaque
define void @emit_maybe_nothing(%struct.processor_explicatory_state* nocapture %0, %struct.modern_stream* nocapture %1, i8* nocapture %2, %struct.modern_vfile* nocapture %3, i8* nocapture %4) {
ret void
}
/* Variables and functions */
void *align16(void *ptr) { return (void *)(((uintptr_t)ptr + 15) & -16L); }


x86 assembly (clang, -O0):
<align16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0xf,%rax
and    $0xfffffffffffffff0,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<align16>:
lea    0xf(%rdi),%rax
and    $0xfffffffffffffff0,%rax
ret

LLVM IR (-O0):
define i8* @align16(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
%5 = add i64 %4, 15
%6 = and i64 %5, -16
%7 = inttoptr i64 %6 to i8*
ret i8* %7
}

LLVM IR (-O2):
define i8* @align16(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = add i64 %2, 15
%4 = and i64 %3, -16
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}
void foo635(int p) {}


x86 assembly (clang, -O0):
<foo635>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo635>:
ret

LLVM IR (-O0):
define void @foo635(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo635(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ writeCommand(char *);
void stop(void) { writeCommand("STP"); }


x86 assembly (clang, -O0):
<stop>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <writeCommand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<stop>:
lea    0xee9(%rip),%rdi
jmp    1030 <writeCommand@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"STP\00"
define void @stop() {
%1 = call i32 @writeCommand(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"STP\00"
define void @stop() {
%1 = tail call i32 @writeCommand(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __builtin_arc_mulu64(int, int);
void foo(int x, int y) { __builtin_arc_mulu64(x, y); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <__builtin_arc_mulu64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
jmp    1030 <__builtin_arc_mulu64@plt>

LLVM IR (-O0):
define void @foo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @__builtin_arc_mulu64(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0, i32 %1) {
%3 = tail call i32 @__builtin_arc_mulu64(i32 %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, void **, void *);
void printptrs(void *ign, void **ptr) {
  printf("  live pointer addr=%p, val=%p\n", ptr, *ptr);
}


x86 assembly (clang, -O0):
<printptrs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x10(%rbp),%rax
mov    (%rax),%rdx
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printptrs>:
mov    (%rsi),%rdx
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [32 x i8] c" live pointer addr=%p, val=%p\0A\00"
define void @printptrs(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
%5 = load i8**, i8*** %4
%6 = load i8**, i8*** %4
%7 = load i8*, i8** %6
%8 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i8** %5, i8* %7)
ret void
}

LLVM IR (-O2):
@.str = [32 x i8] c" live pointer addr=%p, val=%p\0A\00"
define void @printptrs(i8* nocapture readnone %0, i8** %1) {
%3 = load i8*, i8** %1
%4 = tail call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i8** %1, i8* %3)
ret void
}
char *langRomTypeSdSnatcher() { return "SD Snatcher"; }


x86 assembly (clang, -O0):
<langRomTypeSdSnatcher>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langRomTypeSdSnatcher>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [12 x i8] c"SD Snatcher\00"
define i8* @langRomTypeSdSnatcher() {
ret i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [12 x i8] c"SD Snatcher\00"
define i8* @langRomTypeSdSnatcher() {
ret i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ pcibios_write_config_word(int /*<<< orphan*/, scalar_t__,
                                             int, int);
void set_pgpol(void) {
  pcibios_write_config_word(0, ((0x00 << 3) + 0), 0x78, 0xff07);
}


x86 assembly (clang, -O0):
<set_pgpol>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
xor    %eax,%eax
mov    %eax,%esi
mov    $0x78,%edx
mov    $0xff07,%ecx
call   1030 <pcibios_write_config_word@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_pgpol>:
xor    %edi,%edi
xor    %esi,%esi
mov    $0x78,%edx
mov    $0xff07,%ecx
jmp    1030 <pcibios_write_config_word@plt>

LLVM IR (-O0):
define void @set_pgpol() {
%1 = call i32 @pcibios_write_config_word(i32 0, i64 0, i32 120, i32 65287)
ret void
}

LLVM IR (-O2):
define void @set_pgpol() {
%1 = tail call i32 @pcibios_write_config_word(i32 0, i64 0, i32 120, i32 65287)
ret void
}
void __flush_tlb_one(unsigned long addr) {}


x86 assembly (clang, -O0):
<__flush_tlb_one>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__flush_tlb_one>:
ret

LLVM IR (-O0):
define void @__flush_tlb_one(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret void
}

LLVM IR (-O2):
define void @__flush_tlb_one(i64 %0) {
ret void
}
int psy_charger_throttle_charger(struct power_supply *psy,
                                 unsigned long state) {
  return 0;
}


x86 assembly (clang, -O0):
<psy_charger_throttle_charger>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<psy_charger_throttle_charger>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.power_supply = type opaque
define i32 @psy_charger_throttle_charger(%struct.power_supply* %0, i64 %1) {
%3 = alloca %struct.power_supply*
%4 = alloca i64
store %struct.power_supply* %0, %struct.power_supply** %3
store i64 %1, i64* %4
ret i32 0
}

LLVM IR (-O2):
%struct.power_supply = type opaque
define i32 @psy_charger_throttle_charger(%struct.power_supply* nocapture readnone %0, i64 %1) {
ret i32 0
}
/* Variables and functions */
char *strdup2(char *);
char *get_config_path() { return strdup2("/lick"); }


x86 assembly (clang, -O0):
<get_config_path>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <strdup2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_config_path>:
lea    0xee9(%rip),%rdi
jmp    1030 <strdup2@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"/lick\00"
define i8* @get_config_path() {
%1 = call i8* @strdup2(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [6 x i8] c"/lick\00"
define i8* @get_config_path() {
%1 = tail call i8* @strdup2(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
int varint_packed_size(unsigned long value) {
  if ((value & (0xffffffff << 7)) == 0)
    return 1;
  if ((value & (0xffffffff << 14)) == 0)
    return 2;
  if ((value & (0xffffffff << 21)) == 0)
    return 3;
  if ((value & (0xffffffff << 28)) == 0)
    return 4;
  return 5;
}


x86 assembly (clang, -O0):
<varint_packed_size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movabs $0xffffff80,%rax
and    -0x10(%rbp),%rax
cmp    $0x0,%rax
jne    112c <varint_packed_size+0x2c>
movl   $0x1,-0x4(%rbp)
jmp    119f <varint_packed_size+0x9f>
movabs $0xffffc000,%rax
and    -0x10(%rbp),%rax
cmp    $0x0,%rax
jne    1150 <varint_packed_size+0x50>
movl   $0x2,-0x4(%rbp)
jmp    119f <varint_packed_size+0x9f>
movabs $0xffe00000,%rax
and    -0x10(%rbp),%rax
cmp    $0x0,%rax
jne    1174 <varint_packed_size+0x74>
movl   $0x3,-0x4(%rbp)
jmp    119f <varint_packed_size+0x9f>
movabs $0xf0000000,%rax
and    -0x10(%rbp),%rax
cmp    $0x0,%rax
jne    1198 <varint_packed_size+0x98>
movl   $0x4,-0x4(%rbp)
jmp    119f <varint_packed_size+0x9f>
movl   $0x5,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<varint_packed_size>:
test   $0xffffff80,%edi
je     112b <varint_packed_size+0x2b>
test   $0xffffc000,%edi
je     1131 <varint_packed_size+0x31>
test   $0xffe00000,%edi
je     1137 <varint_packed_size+0x37>
and    $0xf0000000,%edi
cmp    $0x1,%rdi
mov    $0x5,%eax
sbb    $0x0,%eax
ret
mov    $0x1,%eax
ret
mov    $0x2,%eax
ret
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @varint_packed_size(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = and i64 %4, 4294967168
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %24
8: ; preds = %1
%9 = load i64, i64* %3
%10 = and i64 %9, 4294950912
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 2, i32* %2
br label %24
13: ; preds = %8
%14 = load i64, i64* %3
%15 = and i64 %14, 4292870144
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 3, i32* %2
br label %24
18: ; preds = %13
%19 = load i64, i64* %3
%20 = and i64 %19, 4026531840
%21 = icmp eq i64 %20, 0
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 4, i32* %2
br label %24
23: ; preds = %18
store i32 5, i32* %2
br label %24
24: ; preds = %23, %22, %17, %12, %7
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @varint_packed_size(i64 %0) {
%2 = and i64 %0, 4294967168
%3 = icmp eq i64 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1
%5 = and i64 %0, 4294950912
%6 = icmp eq i64 %5, 0
br i1 %6, label %14, label %7
7: ; preds = %4
%8 = and i64 %0, 4292870144
%9 = icmp eq i64 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %7
%11 = and i64 %0, 4026531840
%12 = icmp eq i64 %11, 0
%13 = select i1 %12, i32 4, i32 5
br label %14
14: ; preds = %10, %7, %4, %1
%15 = phi i32 [ 1, %1 ], [ 2, %4 ], [ 3, %7 ], [ %13, %10 ]
ret i32 %15
}
void RandomFunc(unsigned long input[1], unsigned long output[1]) {
  unsigned long state[1];
  {
    state[0UL] = input[0UL] ^ 700325083UL;
    if ((state[0UL] >> 4UL) & 1UL) {
      state[0UL] <<= ((state[0UL] >> 3UL) & 7UL) | 1UL;
    }
    output[0UL] = state[0UL] | 293908934UL;
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
xor    $0x29be1cdb,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
shr    $0x4,%rax
and    $0x1,%rax
cmp    $0x0,%rax
je     114e <RandomFunc+0x4e>
mov    -0x18(%rbp),%rcx
shr    $0x3,%rcx
and    $0x7,%rcx
or     $0x1,%rcx
mov    -0x18(%rbp),%rax
shl    %cl,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
or     $0x1184b1c6,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
mov    $0x29be1cdb,%eax
xor    (%rdi),%rax
mov    %eax,%ecx
shr    $0x3,%cl
and    $0x6,%cl
or     $0x1,%cl
xor    %edx,%edx
test   $0x10,%al
movzbl %cl,%ecx
cmove  %edx,%ecx
shl    %cl,%rax
or     $0x1184b1c6,%rax
mov    %rax,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i64* %0, i64* %1) {
%3 = alloca i64*
%4 = alloca i64*
%5 = alloca [1 x i64]
store i64* %0, i64** %3
store i64* %1, i64** %4
%6 = load i64*, i64** %3
%7 = getelementptr inbounds i64, i64* %6, i64 0
%8 = load i64, i64* %7
%9 = xor i64 %8, 700325083
%10 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
store i64 %9, i64* %10
%11 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%12 = load i64, i64* %11
%13 = lshr i64 %12, 4
%14 = and i64 %13, 1
%15 = icmp ne i64 %14, 0
br i1 %15, label %16, label %25
16: ; preds = %2
%17 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%18 = load i64, i64* %17
%19 = lshr i64 %18, 3
%20 = and i64 %19, 7
%21 = or i64 %20, 1
%22 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%23 = load i64, i64* %22
%24 = shl i64 %23, %21
store i64 %24, i64* %22
br label %25
25: ; preds = %16, %2
%26 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%27 = load i64, i64* %26
%28 = or i64 %27, 293908934
%29 = load i64*, i64** %4
%30 = getelementptr inbounds i64, i64* %29, i64 0
store i64 %28, i64* %30
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i64* nocapture %0, i64* nocapture writeonly %1) {
%3 = load i64, i64* %0
%4 = xor i64 %3, 700325083
%5 = and i64 %4, 16
%6 = icmp eq i64 %5, 0
%7 = lshr i64 %4, 3
%8 = and i64 %7, 6
%9 = or i64 %8, 1
%10 = select i1 %6, i64 0, i64 %9
%11 = shl i64 %4, %10
%12 = or i64 %11, 293908934
store i64 %12, i64* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ WriteToSMBus(int, int, int, int);
void I2CRebootQuick(void) {
  WriteToSMBus(0x10, 0x02, 1, 0x01);
  while (1)
    ;
}


x86 assembly (clang, -O0):
<I2CRebootQuick>:
push   %rbp
mov    %rsp,%rbp
mov    $0x10,%edi
mov    $0x2,%esi
mov    $0x1,%ecx
mov    %ecx,%edx
call   1030 <WriteToSMBus@plt>
jmp    112a <I2CRebootQuick+0x1a>

x86 assembly (clang, -O2):
<I2CRebootQuick>:
push   %rax
mov    $0x10,%edi
mov    $0x2,%esi
mov    $0x1,%edx
mov    $0x1,%ecx
call   1030 <WriteToSMBus@plt>
nopw   0x0(%rax,%rax,1)
jmp    1130 <I2CRebootQuick+0x20>

LLVM IR (-O0):
define void @I2CRebootQuick() {
%1 = call i32 @WriteToSMBus(i32 16, i32 2, i32 1, i32 1)
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
define void @I2CRebootQuick() {
%1 = tail call i32 @WriteToSMBus(i32 16, i32 2, i32 1, i32 1)
br label %2
2: ; preds = %0, %2
br label %2
}