#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int FS460_set_input_mode(int, int);
int sio_read_reg(int, unsigned long *);
int sio_write_reg(int, unsigned long);
int FS460_set_input_mux(int channel, int input) {
  int err;
  unsigned long mux1;
  err = sio_read_reg(0x3C, &mux1);
  if (err)
    return err;
  switch (channel) {
  default:
    return 0x1000;
  case 1: {
    switch (input) {
    default:
      return 0x1000;
    case 1: {
      err = FS460_set_input_mode(1, 0);
      if (err)
        return err;
      mux1 |= (1 << 0);
      mux1 |= (1 << 7);
      mux1 &= ~(1 << 6);
    } break;
    case 2: {
      err = FS460_set_input_mode(2, 0);
      if (err)
        return err;
      mux1 &= ~(1 << 0);
      mux1 |= (1 << 7);
      mux1 |= (1 << 6);
    } break;
    }
  } break;
  case 3: {
    switch (input) {
    default:
      return 0x1000;
    case 1: {
      err = FS460_set_input_mode(1, 1);
      if (err)
        return err;
      mux1 |= (1 << 1);
    } break;
    case 2: {
      err = FS460_set_input_mode(2, 1);
      if (err)
        return err;
      mux1 &= ~(1 << 1);
    } break;
    }
  }
  }
  err = sio_write_reg(0x3C, mux1);
  if (err)
    return err;
  return 0;
}


x86 assembly (clang, -O0):
<FS460_set_input_mux>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x3c,%edi
lea    -0x18(%rbp),%rsi
call   1050 <sio_read_reg@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     1164 <FS460_set_input_mux+0x34>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    132f <FS460_set_input_mux+0x1ff>
mov    -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
sub    $0x1,%eax
je     1195 <FS460_set_input_mux+0x65>
jmp    1178 <FS460_set_input_mux+0x48>
mov    -0x1c(%rbp),%eax
sub    $0x3,%eax
je     1264 <FS460_set_input_mux+0x134>
jmp    1189 <FS460_set_input_mux+0x59>
movl   $0x1000,-0x4(%rbp)
jmp    132f <FS460_set_input_mux+0x1ff>
mov    -0xc(%rbp),%eax
mov    %eax,-0x20(%rbp)
sub    $0x1,%eax
je     11c6 <FS460_set_input_mux+0x96>
jmp    11a9 <FS460_set_input_mux+0x79>
mov    -0x20(%rbp),%eax
sub    $0x2,%eax
je     1215 <FS460_set_input_mux+0xe5>
jmp    11ba <FS460_set_input_mux+0x8a>
movl   $0x1000,-0x4(%rbp)
jmp    132f <FS460_set_input_mux+0x1ff>
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <FS460_set_input_mode@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     11ea <FS460_set_input_mux+0xba>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    132f <FS460_set_input_mux+0x1ff>
mov    -0x18(%rbp),%rax
or     $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
or     $0x80,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
and    $0xffffffffffffffbf,%rax
mov    %rax,-0x18(%rbp)
jmp    125f <FS460_set_input_mux+0x12f>
mov    $0x2,%edi
xor    %esi,%esi
call   1030 <FS460_set_input_mode@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     1239 <FS460_set_input_mux+0x109>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    132f <FS460_set_input_mux+0x1ff>
mov    -0x18(%rbp),%rax
and    $0xfffffffffffffffe,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
or     $0x80,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
or     $0x40,%rax
mov    %rax,-0x18(%rbp)
jmp    1302 <FS460_set_input_mux+0x1d2>
mov    -0xc(%rbp),%eax
mov    %eax,-0x24(%rbp)
sub    $0x1,%eax
je     1295 <FS460_set_input_mux+0x165>
jmp    1278 <FS460_set_input_mux+0x148>
mov    -0x24(%rbp),%eax
sub    $0x2,%eax
je     12ca <FS460_set_input_mux+0x19a>
jmp    1289 <FS460_set_input_mux+0x159>
movl   $0x1000,-0x4(%rbp)
jmp    132f <FS460_set_input_mux+0x1ff>
mov    $0x1,%esi
mov    %esi,%edi
call   1030 <FS460_set_input_mode@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     12b9 <FS460_set_input_mux+0x189>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    132f <FS460_set_input_mux+0x1ff>
mov    -0x18(%rbp),%rax
or     $0x2,%rax
mov    %rax,-0x18(%rbp)
jmp    12fd <FS460_set_input_mux+0x1cd>
mov    $0x2,%edi
mov    $0x1,%esi
call   1030 <FS460_set_input_mode@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     12f1 <FS460_set_input_mux+0x1c1>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    132f <FS460_set_input_mux+0x1ff>
mov    -0x18(%rbp),%rax
and    $0xfffffffffffffffd,%rax
mov    %rax,-0x18(%rbp)
jmp    1302 <FS460_set_input_mux+0x1d2>
mov    -0x18(%rbp),%rsi
mov    $0x3c,%edi
call   1040 <sio_write_reg@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     1328 <FS460_set_input_mux+0x1f8>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    132f <FS460_set_input_mux+0x1ff>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FS460_set_input_mux>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %rsp,%rsi
mov    $0x3c,%edi
call   1050 <sio_read_reg@plt>
test   %eax,%eax
je     114f <FS460_set_input_mux+0x1f>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    $0x1000,%eax
cmp    $0x3,%ebp
je     118c <FS460_set_input_mux+0x5c>
cmp    $0x1,%ebp
jne    1148 <FS460_set_input_mux+0x18>
cmp    $0x2,%ebx
je     11b3 <FS460_set_input_mux+0x83>
cmp    $0x1,%ebx
jne    1148 <FS460_set_input_mux+0x18>
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <FS460_set_input_mode@plt>
test   %eax,%eax
jne    1148 <FS460_set_input_mux+0x18>
mov    $0xffffffffffffff3e,%rsi
and    (%rsp),%rsi
or     $0x81,%rsi
jmp    11f6 <FS460_set_input_mux+0xc6>
cmp    $0x2,%ebx
je     11d7 <FS460_set_input_mux+0xa7>
cmp    $0x1,%ebx
jne    1148 <FS460_set_input_mux+0x18>
mov    $0x1,%edi
mov    $0x1,%esi
call   1030 <FS460_set_input_mode@plt>
test   %eax,%eax
jne    1148 <FS460_set_input_mux+0x18>
mov    (%rsp),%rsi
or     $0x2,%rsi
jmp    11f6 <FS460_set_input_mux+0xc6>
mov    $0x2,%edi
xor    %esi,%esi
call   1030 <FS460_set_input_mode@plt>
test   %eax,%eax
jne    1148 <FS460_set_input_mux+0x18>
mov    $0xffffffffffffff3e,%rsi
and    (%rsp),%rsi
or     $0xc0,%rsi
jmp    11f6 <FS460_set_input_mux+0xc6>
mov    $0x2,%edi
mov    $0x1,%esi
call   1030 <FS460_set_input_mode@plt>
test   %eax,%eax
jne    1148 <FS460_set_input_mux+0x18>
mov    (%rsp),%rsi
and    $0xfffffffffffffffd,%rsi
mov    %rsi,(%rsp)
mov    $0x3c,%edi
call   1040 <sio_write_reg@plt>
jmp    1148 <FS460_set_input_mux+0x18>

LLVM IR (-O0):
define i32 @FS460_set_input_mux(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i64
store i32 %0, i32* %4
store i32 %1, i32* %5
%8 = call i32 @sio_read_reg(i32 60, i64* %7)
store i32 %8, i32* %6
%9 = load i32, i32* %6
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = load i32, i32* %6
store i32 %12, i32* %3
br label %76
13: ; preds = %2
%14 = load i32, i32* %4
switch i32 %14, label %15 [
i32 1, label %16
i32 3, label %46
]
15: ; preds = %13
store i32 4096, i32* %3
br label %76
16: ; preds = %13
%17 = load i32, i32* %5
switch i32 %17, label %18 [
i32 1, label %19
i32 2, label %32
]
18: ; preds = %16
store i32 4096, i32* %3
br label %76
19: ; preds = %16
%20 = call i32 @FS460_set_input_mode(i32 1, i32 0)
store i32 %20, i32* %6
%21 = load i32, i32* %6
%22 = icmp ne i32 %21, 0
br i1 %22, label %23, label %25
23: ; preds = %19
%24 = load i32, i32* %6
store i32 %24, i32* %3
br label %76
25: ; preds = %19
%26 = load i64, i64* %7
%27 = or i64 %26, 1
store i64 %27, i64* %7
%28 = load i64, i64* %7
%29 = or i64 %28, 128
store i64 %29, i64* %7
%30 = load i64, i64* %7
%31 = and i64 %30, -65
store i64 %31, i64* %7
br label %45
32: ; preds = %16
%33 = call i32 @FS460_set_input_mode(i32 2, i32 0)
store i32 %33, i32* %6
%34 = load i32, i32* %6
%35 = icmp ne i32 %34, 0
br i1 %35, label %36, label %38
36: ; preds = %32
%37 = load i32, i32* %6
store i32 %37, i32* %3
br label %76
38: ; preds = %32
%39 = load i64, i64* %7
%40 = and i64 %39, -2
store i64 %40, i64* %7
%41 = load i64, i64* %7
%42 = or i64 %41, 128
store i64 %42, i64* %7
%43 = load i64, i64* %7
%44 = or i64 %43, 64
store i64 %44, i64* %7
br label %45
45: ; preds = %38, %25
br label %68
46: ; preds = %13
%47 = load i32, i32* %5
switch i32 %47, label %48 [
i32 1, label %49
i32 2, label %58
]
48: ; preds = %46
store i32 4096, i32* %3
br label %76
49: ; preds = %46
%50 = call i32 @FS460_set_input_mode(i32 1, i32 1)
store i32 %50, i32* %6
%51 = load i32, i32* %6
%52 = icmp ne i32 %51, 0
br i1 %52, label %53, label %55
53: ; preds = %49
%54 = load i32, i32* %6
store i32 %54, i32* %3
br label %76
55: ; preds = %49
%56 = load i64, i64* %7
%57 = or i64 %56, 2
store i64 %57, i64* %7
br label %67
58: ; preds = %46
%59 = call i32 @FS460_set_input_mode(i32 2, i32 1)
store i32 %59, i32* %6
%60 = load i32, i32* %6
%61 = icmp ne i32 %60, 0
br i1 %61, label %62, label %64
62: ; preds = %58
%63 = load i32, i32* %6
store i32 %63, i32* %3
br label %76
64: ; preds = %58
%65 = load i64, i64* %7
%66 = and i64 %65, -3
store i64 %66, i64* %7
br label %67
67: ; preds = %64, %55
br label %68
68: ; preds = %67, %45
%69 = load i64, i64* %7
%70 = call i32 @sio_write_reg(i32 60, i64 %69)
store i32 %70, i32* %6
%71 = load i32, i32* %6
%72 = icmp ne i32 %71, 0
br i1 %72, label %73, label %75
73: ; preds = %68
%74 = load i32, i32* %6
store i32 %74, i32* %3
br label %76
75: ; preds = %68
store i32 0, i32* %3
br label %76
76: ; preds = %75, %73, %62, %53, %48, %36, %23, %18, %15, %11
%77 = load i32, i32* %3
ret i32 %77
}

LLVM IR (-O2):
define i32 @FS460_set_input_mux(i32 %0, i32 %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
%5 = call i32 @sio_read_reg(i32 60, i64* %3)
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %39
7: ; preds = %2
switch i32 %0, label %39 [
i32 1, label %8
i32 3, label %23
]
8: ; preds = %7
switch i32 %1, label %39 [
i32 1, label %9
i32 2, label %16
]
9: ; preds = %8
%10 = call i32 @FS460_set_input_mode(i32 1, i32 0)
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %39
12: ; preds = %9
%13 = load i64, i64* %3
%14 = and i64 %13, -194
%15 = or i64 %14, 129
store i64 %15, i64* %3
br label %36
16: ; preds = %8
%17 = call i32 @FS460_set_input_mode(i32 2, i32 0)
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %39
19: ; preds = %16
%20 = load i64, i64* %3
%21 = and i64 %20, -194
%22 = or i64 %21, 192
store i64 %22, i64* %3
br label %36
23: ; preds = %7
switch i32 %1, label %39 [
i32 1, label %24
i32 2, label %30
]
24: ; preds = %23
%25 = call i32 @FS460_set_input_mode(i32 1, i32 1)
%26 = icmp eq i32 %25, 0
br i1 %26, label %27, label %39
27: ; preds = %24
%28 = load i64, i64* %3
%29 = or i64 %28, 2
store i64 %29, i64* %3
br label %36
30: ; preds = %23
%31 = call i32 @FS460_set_input_mode(i32 2, i32 1)
%32 = icmp eq i32 %31, 0
br i1 %32, label %33, label %39
33: ; preds = %30
%34 = load i64, i64* %3
%35 = and i64 %34, -3
store i64 %35, i64* %3
br label %36
36: ; preds = %27, %33, %12, %19
%37 = phi i64 [ %29, %27 ], [ %35, %33 ], [ %15, %12 ], [ %22, %19 ]
%38 = call i32 @sio_write_reg(i32 60, i64 %37)
br label %39
39: ; preds = %36, %30, %24, %23, %16, %9, %8, %7, %2
%40 = phi i32 [ %5, %2 ], [ 4096, %7 ], [ 4096, %8 ], [ %10, %9 ], [ %17, %16 ], [ 4096, %23 ], [ %25, %24 ], [ %31, %30 ], [ %38, %36 ]
ret i32 %40
}