xunge/DecIR huggingface dataset:
double casoUno(double a, double b, double c) {
  double f;
  double d = (a * b) + 5;
  f = a + (d * c);
  double r = b * b;
  double k = r - f;
  return k * k;
}


x86 assembly (clang, -O0):
<casoUno>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xed7(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x28(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  -0x30(%rbp),%xmm0
subsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x38(%rbp)
movsd  -0x38(%rbp),%xmm0
mulsd  -0x38(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<casoUno>:
movapd %xmm0,%xmm3
mulsd  %xmm1,%xmm3
addsd  0xef0(%rip),%xmm3
mulsd  %xmm2,%xmm3
addsd  %xmm0,%xmm3
mulsd  %xmm1,%xmm1
subsd  %xmm3,%xmm1
mulsd  %xmm1,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @casoUno(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
%9 = alloca double
%10 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%11 = load double, double* %4
%12 = load double, double* %5
%13 = call double @llvm.fmuladd.f64(double %11, double %12, double 5.000000e+00)
store double %13, double* %8
%14 = load double, double* %4
%15 = load double, double* %8
%16 = load double, double* %6
%17 = call double @llvm.fmuladd.f64(double %15, double %16, double %14)
store double %17, double* %7
%18 = load double, double* %5
%19 = load double, double* %5
%20 = fmul double %18, %19
store double %20, double* %9
%21 = load double, double* %9
%22 = load double, double* %7
%23 = fsub double %21, %22
store double %23, double* %10
%24 = load double, double* %10
%25 = load double, double* %10
%26 = fmul double %24, %25
ret double %26
}

LLVM IR (-O2):
define double @casoUno(double %0, double %1, double %2) {
%4 = tail call double @llvm.fmuladd.f64(double %0, double %1, double 5.000000e+00)
%5 = tail call double @llvm.fmuladd.f64(double %4, double %2, double %0)
%6 = fmul double %1, %1
%7 = fsub double %6, %5
%8 = fmul double %7, %7
ret double %8
}
/* Variables and functions */
int euler_problem_78();
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("%d\n", euler_problem_78());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <euler_problem_78@plt>
mov    %eax,%esi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <euler_problem_78@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @euler_problem_78()
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @euler_problem_78()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
unsigned long map_rgb(unsigned char r, unsigned char g, unsigned char b) {
  return ((unsigned long)(((unsigned char)(r) |
                           ((unsigned int)((unsigned char)(g)) << 8)) |
                          (((unsigned long)(unsigned char)(b)) << 16)));
}


x86 assembly (clang, -O0):
<map_rgb>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %dil,%dl
mov    %dl,-0x1(%rbp)
mov    %cl,-0x2(%rbp)
mov    %al,-0x3(%rbp)
movzbl -0x1(%rbp),%eax
movzbl -0x2(%rbp),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,%eax
movzbl -0x3(%rbp),%ecx
shl    $0x10,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<map_rgb>:
mov    %edi,%eax
mov    %esi,%ecx
shl    $0x8,%rcx
or     %rax,%rcx
mov    %edx,%eax
shl    $0x10,%rax
or     %rcx,%rax
ret

LLVM IR (-O0):
define i64 @map_rgb(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
%9 = load i8, i8* %5
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = or i32 %8, %11
%13 = zext i32 %12 to i64
%14 = load i8, i8* %6
%15 = zext i8 %14 to i64
%16 = shl i64 %15, 16
%17 = or i64 %13, %16
ret i64 %17
}

LLVM IR (-O2):
define i64 @map_rgb(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2) {
%4 = zext i8 %0 to i64
%5 = zext i8 %1 to i64
%6 = shl nuw nsw i64 %5, 8
%7 = or i64 %6, %4
%8 = zext i8 %2 to i64
%9 = shl nuw nsw i64 %8, 16
%10 = or i64 %7, %9
ret i64 %10
}
void XFilterEvent() {}


x86 assembly (clang, -O0):
<XFilterEvent>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XFilterEvent>:
ret

LLVM IR (-O0):
define void @XFilterEvent() {
ret void
}

LLVM IR (-O2):
define void @XFilterEvent() {
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ serial;
};
typedef TYPE_1__ XSelectionClearEvent;

/* Variables and functions */
unsigned long get_XSelectionClearEvent_serial(void *_p) {
  return (unsigned long)((XSelectionClearEvent *)_p)->serial;
}


x86 assembly (clang, -O0):
<get_XSelectionClearEvent_serial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XSelectionClearEvent_serial>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XSelectionClearEvent_serial(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XSelectionClearEvent_serial(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
int atoi(const char *str) {
  return ({
    extern __typeof__(atoi) module_libc_atoi;
    &module_libc_atoi;
  })(str);
}


x86 assembly (clang, -O0):
<atoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ecd(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdi
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atoi>:
jmp    1030 <module_libc_atoi@plt>

LLVM IR (-O0):
define i32 @atoi(i8* %0) {
%2 = alloca i8*
%3 = alloca i32 (i8*)*
store i8* %0, i8** %2
store i32 (i8*)* @module_libc_atoi, i32 (i8*)** %3
%4 = load i32 (i8*)*, i32 (i8*)** %3
%5 = load i8*, i8** %2
%6 = call i32 %4(i8* %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @atoi(i8* %0) {
%2 = tail call i32 @module_libc_atoi(i8* %0)
ret i32 %2
}
/* Variables and functions */
int main() {
  void *pt = NULL;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
store i8* null, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ HplCC2420SpiP__Resource__granted();
int /*<<< orphan*/ HplCC2420SpiP__SS__clr();
int /*<<< orphan*/ HplCC2420SpiP__SS__makeOutput();
void HplCC2420SpiP__SubResource__granted(void) {
  HplCC2420SpiP__SS__makeOutput();
  HplCC2420SpiP__SS__clr();
  HplCC2420SpiP__Resource__granted();
}


x86 assembly (clang, -O0):
<HplCC2420SpiP__SubResource__granted>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <HplCC2420SpiP__SS__makeOutput@plt>
mov    $0x0,%al
call   1050 <HplCC2420SpiP__SS__clr@plt>
mov    $0x0,%al
call   1030 <HplCC2420SpiP__Resource__granted@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HplCC2420SpiP__SubResource__granted>:
push   %rax
xor    %eax,%eax
call   1040 <HplCC2420SpiP__SS__makeOutput@plt>
xor    %eax,%eax
call   1050 <HplCC2420SpiP__SS__clr@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <HplCC2420SpiP__Resource__granted@plt>

LLVM IR (-O0):
define void @HplCC2420SpiP__SubResource__granted() {
%1 = call i32 (...) @HplCC2420SpiP__SS__makeOutput()
%2 = call i32 (...) @HplCC2420SpiP__SS__clr()
%3 = call i32 (...) @HplCC2420SpiP__Resource__granted()
ret void
}

LLVM IR (-O2):
define void @HplCC2420SpiP__SubResource__granted() {
%1 = tail call i32 (...) @HplCC2420SpiP__SS__makeOutput()
%2 = tail call i32 (...) @HplCC2420SpiP__SS__clr()
%3 = tail call i32 (...) @HplCC2420SpiP__Resource__granted()
ret void
}
/* Type definitions */
struct evemu_device {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
struct evemu_device *create_device(int /*<<< orphan*/ *);
int /*<<< orphan*/ evemu_delete(struct evemu_device *);
int /*<<< orphan*/ open_and_hold_device(struct evemu_device *);
int evemu_device(FILE *fp) {
  struct evemu_device *dev;
  dev = create_device(fp);
  if (dev == NULL)
    return -1;
  open_and_hold_device(dev);
  evemu_delete(dev);
  return 0;
}


x86 assembly (clang, -O0):
<evemu_device>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <create_device@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1160 <evemu_device+0x30>
movl   $0xffffffff,-0x4(%rbp)
jmp    1179 <evemu_device+0x49>
mov    -0x18(%rbp),%rdi
call   1050 <open_and_hold_device@plt>
mov    -0x18(%rbp),%rdi
call   1040 <evemu_delete@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<evemu_device>:
push   %rbx
call   1030 <create_device@plt>
test   %rax,%rax
je     1152 <evemu_device+0x22>
mov    %rax,%rbx
mov    %rax,%rdi
call   1050 <open_and_hold_device@plt>
mov    %rbx,%rdi
call   1040 <evemu_delete@plt>
xor    %eax,%eax
pop    %rbx
ret
mov    $0xffffffff,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.evemu_device = type { i32 }
define i32 @evemu_device(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca %struct.evemu_device*
store i32* %0, i32** %3
%5 = load i32*, i32** %3
%6 = call %struct.evemu_device* @create_device(i32* %5)
store %struct.evemu_device* %6, %struct.evemu_device** %4
%7 = load %struct.evemu_device*, %struct.evemu_device** %4
%8 = icmp eq %struct.evemu_device* %7, null
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 -1, i32* %2
br label %15
10: ; preds = %1
%11 = load %struct.evemu_device*, %struct.evemu_device** %4
%12 = call i32 @open_and_hold_device(%struct.evemu_device* %11)
%13 = load %struct.evemu_device*, %struct.evemu_device** %4
%14 = call i32 @evemu_delete(%struct.evemu_device* %13)
store i32 0, i32* %2
br label %15
15: ; preds = %10, %9
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
%struct.evemu_device = type { i32 }
define i32 @evemu_device(i32* %0) {
%2 = tail call %struct.evemu_device* @create_device(i32* %0)
%3 = icmp eq %struct.evemu_device* %2, null
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @open_and_hold_device(%struct.evemu_device* %2)
%6 = tail call i32 @evemu_delete(%struct.evemu_device* %2)
br label %7
7: ; preds = %1, %4
%8 = phi i32 [ 0, %4 ], [ -1, %1 ]
ret i32 %8
}
float floatFunc() {}


x86 assembly (clang, -O0):
<floatFunc>:
push   %rbp
mov    %rsp,%rbp
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<floatFunc>:
ret

LLVM IR (-O0):
define float @floatFunc() {
%1 = alloca float
%2 = load float, float* %1
ret float %2
}

LLVM IR (-O2):
define float @floatFunc() {
ret float undef
}
float int_float_no_overflow(__int128 n) { return n; }


x86 assembly (clang, -O0):
<int_float_no_overflow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x8(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
mov    %rcx,-0x18(%rbp)
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1140 <__floattisf>
add    $0x20,%rsp
pop    %rbp
ret
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)

x86 assembly (clang, -O2):
<int_float_no_overflow>:
push   %rax
call   1110 <__floattisf>
pop    %rax
ret
nopl   0x0(%rax,%rax,1)

LLVM IR (-O0):
define float @int_float_no_overflow(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = bitcast i128* %3 to { i64, i64 }*
%6 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %5, i32 0, i32 0
store i64 %0, i64* %6
%7 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %5, i32 0, i32 1
store i64 %1, i64* %7
%8 = load i128, i128* %3
store i128 %8, i128* %4
%9 = load i128, i128* %4
%10 = sitofp i128 %9 to float
ret float %10
}

LLVM IR (-O2):
define float @int_float_no_overflow(i64 %0, i64 %1) {
%3 = zext i64 %1 to i128
%4 = shl nuw i128 %3, 64
%5 = zext i64 %0 to i128
%6 = or i128 %4, %5
%7 = sitofp i128 %6 to float
ret float %7
}
void ft_swap(int *a, int *b) {
  int tmp;
  tmp = *a;
  *a = *b;
  *b = tmp;
}


x86 assembly (clang, -O0):
<ft_swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_swap>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @ft_swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @ft_swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
/* Variables and functions */
char *getenv(char *);
char *configure_resolve_var(char *var) {
  char *v;
  if (var[0] == '$') {
    if ((v = getenv(&var[1])) == NULL)
      return (NULL);
  } else {
    v = var;
  }
  return (v);
}


x86 assembly (clang, -O0):
<configure_resolve_var>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x24,%eax
jne    1159 <configure_resolve_var+0x49>
mov    -0x10(%rbp),%rdi
add    $0x1,%rdi
call   1030 <getenv@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    1154 <configure_resolve_var+0x44>
movq   $0x0,-0x8(%rbp)
jmp    1169 <configure_resolve_var+0x59>
jmp    1161 <configure_resolve_var+0x51>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<configure_resolve_var>:
push   %rax
mov    %rdi,%rax
cmpb   $0x24,(%rdi)
jne    112a <configure_resolve_var+0x1a>
add    $0x1,%rax
mov    %rax,%rdi
call   1030 <getenv@plt>
test   %rax,%rax
je     112c <configure_resolve_var+0x1c>
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @configure_resolve_var(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 0
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 36
br i1 %9, label %10, label %17
10: ; preds = %1
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i64 1
%13 = call i8* @getenv(i8* %12)
store i8* %13, i8** %4
%14 = icmp eq i8* %13, null
br i1 %14, label %15, label %16
15: ; preds = %10
store i8* null, i8** %2
br label %21
16: ; preds = %10
br label %19
17: ; preds = %1
%18 = load i8*, i8** %3
store i8* %18, i8** %4
br label %19
19: ; preds = %17, %16
%20 = load i8*, i8** %4
store i8* %20, i8** %2
br label %21
21: ; preds = %19, %15
%22 = load i8*, i8** %2
ret i8* %22
}

LLVM IR (-O2):
define i8* @configure_resolve_var(i8* %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 36
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = tail call i8* @getenv(i8* %5)
%7 = icmp eq i8* %6, null
br i1 %7, label %10, label %8
8: ; preds = %1, %4
%9 = phi i8* [ %6, %4 ], [ %0, %1 ]
br label %10
10: ; preds = %4, %8
%11 = phi i8* [ %9, %8 ], [ null, %4 ]
ret i8* %11
}
/* Variables and functions */
int /*<<< orphan*/ endwin();
void end_ncurses() { endwin(); }


x86 assembly (clang, -O0):
<end_ncurses>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <endwin@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<end_ncurses>:
xor    %eax,%eax
jmp    1030 <endwin@plt>

LLVM IR (-O0):
define void @end_ncurses() {
%1 = call i32 (...) @endwin()
ret void
}

LLVM IR (-O2):
define void @end_ncurses() {
%1 = tail call i32 (...) @endwin()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ btrans(int /*<<< orphan*/ *, int /*<<< orphan*/ *, int, int);
void bit_rotate_std(uint8_t input[8 * 64], uint64_t output[64]) {
  btrans(input, (uint8_t *)output, 64, 64);
}


x86 assembly (clang, -O0):
<bit_rotate_std>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x40,%ecx
mov    %ecx,%edx
call   1030 <btrans@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit_rotate_std>:
mov    $0x40,%edx
mov    $0x40,%ecx
jmp    1030 <btrans@plt>

LLVM IR (-O0):
define void @bit_rotate_std(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @btrans(i32* %5, i32* %6, i32 64, i32 64)
ret void
}

LLVM IR (-O2):
define void @bit_rotate_std(i32* %0, i32* %1) {
%3 = tail call i32 @btrans(i32* %0, i32* %1, i32 64, i32 64)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo(int);
int main(int argc, char *argv[]) {
  foo(argc);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <foo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = call i32 @foo(i32 %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @foo(i32 %0)
ret i32 0
}
int xmlUCSIsCatCo(int code) {
  return ((code == 0xe000) || (code == 0xf8ff) || (code == 0xf0000) ||
          (code == 0xffffd) || (code == 0x100000) || (code == 0x10fffd));
}


x86 assembly (clang, -O0):
<xmlUCSIsCatCo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0xe000,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     116e <xmlUCSIsCatCo+0x6e>
mov    $0x1,%al
cmpl   $0xf8ff,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     116e <xmlUCSIsCatCo+0x6e>
mov    $0x1,%al
cmpl   $0xf0000,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     116e <xmlUCSIsCatCo+0x6e>
mov    $0x1,%al
cmpl   $0xffffd,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     116e <xmlUCSIsCatCo+0x6e>
mov    $0x1,%al
cmpl   $0x100000,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     116e <xmlUCSIsCatCo+0x6e>
cmpl   $0x10fffd,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmlUCSIsCatCo>:
mov    $0x1,%eax
cmp    $0xeffff,%edi
jle    1126 <xmlUCSIsCatCo+0x26>
cmp    $0xf0000,%edi
je     1125 <xmlUCSIsCatCo+0x25>
cmp    $0xffffd,%edi
je     1125 <xmlUCSIsCatCo+0x25>
cmp    $0x100000,%edi
jne    1136 <xmlUCSIsCatCo+0x36>
ret
cmp    $0xe000,%edi
je     1125 <xmlUCSIsCatCo+0x25>
cmp    $0xf8ff,%edi
je     1125 <xmlUCSIsCatCo+0x25>
xor    %eax,%eax
cmp    $0x10fffd,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @xmlUCSIsCatCo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 57344
br i1 %4, label %20, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 63743
br i1 %7, label %20, label %8
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 983040
br i1 %10, label %20, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 1048573
br i1 %13, label %20, label %14
14: ; preds = %11
%15 = load i32, i32* %2
%16 = icmp eq i32 %15, 1048576
br i1 %16, label %20, label %17
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp eq i32 %18, 1114109
br label %20
20: ; preds = %17, %14, %11, %8, %5, %1
%21 = phi i1 [ true, %14 ], [ true, %11 ], [ true, %8 ], [ true, %5 ], [ true, %1 ], [ %19, %17 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @xmlUCSIsCatCo(i32 %0) {
switch i32 %0, label %2 [
i32 1048576, label %5
i32 1048573, label %5
i32 983040, label %5
i32 63743, label %5
i32 57344, label %5
]
2: ; preds = %1
%3 = icmp eq i32 %0, 1114109
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
void ADC0Seq3_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<ADC0Seq3_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <ADC0Seq3_Handler+0x9>
jmp    1109 <ADC0Seq3_Handler+0x9>

x86 assembly (clang, -O2):
<ADC0Seq3_Handler>:
jmp    1100 <ADC0Seq3_Handler>

LLVM IR (-O0):
define void @ADC0Seq3_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @ADC0Seq3_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
void gtk_action_group_get_action() {}


x86 assembly (clang, -O0):
<gtk_action_group_get_action>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_action_group_get_action>:
ret

LLVM IR (-O0):
define void @gtk_action_group_get_action() {
ret void
}

LLVM IR (-O2):
define void @gtk_action_group_get_action() {
ret void
}
int foo_Foo(int bar) { return bar * 42; }


x86 assembly (clang, -O0):
<foo_Foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0x2a,-0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_Foo>:
imul   $0x2a,%edi,%eax
ret

LLVM IR (-O0):
define i32 @foo_Foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 42
ret i32 %4
}

LLVM IR (-O2):
define i32 @foo_Foo(i32 %0) {
%2 = mul nsw i32 %0, 42
ret i32 %2
}
void compat_init_setproctitle(int argc, char *argv[]) {}


x86 assembly (clang, -O0):
<compat_init_setproctitle>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<compat_init_setproctitle>:
ret

LLVM IR (-O0):
define void @compat_init_setproctitle(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret void
}

LLVM IR (-O2):
define void @compat_init_setproctitle(i32 %0, i8** nocapture %1) {
ret void
}
void instruction_fetch_odd_address(void) {
  int (*foo)(void);
  foo = (void *)(((int)&instruction_fetch_odd_address + 1));
  (*foo)();
}


x86 assembly (clang, -O0):
<instruction_fetch_odd_address>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ed9(%rip),%rax
add    $0x1,%eax
cltq
mov    %rax,-0x8(%rbp)
call   *-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<instruction_fetch_odd_address>:
mov    0x2ee2(%rip),%eax
add    $0x1,%eax
cltq
jmp    *%rax

LLVM IR (-O0):
define void @instruction_fetch_odd_address() {
%1 = alloca i32 ()*
store i32 ()* inttoptr (i64 sext (i32 add nsw (i32 ptrtoint (void ()* @instruction_fetch_odd_address to i32), i32 1) to i64) to i32 ()*), i32 ()** %1
%2 = load i32 ()*, i32 ()** %1
%3 = call i32 %2()
ret void
}

LLVM IR (-O2):
define void @instruction_fetch_odd_address() {
%1 = tail call i32 inttoptr (i64 sext (i32 add (i32 ptrtoint (void ()* @instruction_fetch_odd_address to i32), i32 1) to i64) to i32 ()*)()
ret void
}
short shortrand(maxs)
short maxs;
{
  int s = CCutil_lprand() % maxs;
  if (CCutil_lprand() % 1)
    s = -s;
  return (short)s;
}


x86 assembly (clang, -O0):
<shortrand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    $0x0,%al
call   1030 <CCutil_lprand@plt>
movswl -0x2(%rbp),%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    $0x0,%al
call   1030 <CCutil_lprand@plt>
mov    $0x1,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     1150 <shortrand+0x40>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cwtl
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shortrand>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <CCutil_lprand@plt>
mov    %eax,%ebp
xor    %eax,%eax
call   1030 <CCutil_lprand@plt>
movswl %bx,%ecx
mov    %ebp,%eax
cltd
idiv   %ecx
mov    %edx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define signext i16 @shortrand(i32 %0) {
%2 = alloca i16
%3 = alloca i32
%4 = trunc i32 %0 to i16
store i16 %4, i16* %2
%5 = call i32 (...) @CCutil_lprand()
%6 = load i16, i16* %2
%7 = sext i16 %6 to i32
%8 = srem i32 %5, %7
store i32 %8, i32* %3
%9 = call i32 (...) @CCutil_lprand()
%10 = srem i32 %9, 1
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %1
%13 = load i32, i32* %3
%14 = sub nsw i32 0, %13
store i32 %14, i32* %3
br label %15
15: ; preds = %12, %1
%16 = load i32, i32* %3
%17 = trunc i32 %16 to i16
ret i16 %17
}

LLVM IR (-O2):
define signext i16 @shortrand(i32 %0) {
%2 = tail call i32 (...) @CCutil_lprand()
%3 = tail call i32 (...) @CCutil_lprand()
%4 = shl i32 %0, 16
%5 = ashr exact i32 %4, 16
%6 = srem i32 %2, %5
%7 = trunc i32 %6 to i16
ret i16 %7
}
char Q_toupper(const char in) {
  char out;
  if (in >= 'a' && in <= 'z')
    out = in + 'A' - 'a';
  else
    out = in;
  return out;
}


x86 assembly (clang, -O0):
<Q_toupper>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x61,%eax
jl     1136 <Q_toupper+0x36>
movsbl -0x1(%rbp),%eax
cmp    $0x7a,%eax
jg     1136 <Q_toupper+0x36>
movsbl -0x1(%rbp),%eax
add    $0x41,%eax
sub    $0x61,%eax
mov    %al,-0x2(%rbp)
jmp    113c <Q_toupper+0x3c>
mov    -0x1(%rbp),%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Q_toupper>:
lea    -0x61(%rdi),%eax
lea    -0x20(%rdi),%ecx
cmp    $0x1a,%al
movzbl %cl,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @Q_toupper(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 97
br i1 %6, label %7, label %17
7: ; preds = %1
%8 = load i8, i8* %2
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 122
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i8, i8* %2
%13 = sext i8 %12 to i32
%14 = add nsw i32 %13, 65
%15 = sub nsw i32 %14, 97
%16 = trunc i32 %15 to i8
store i8 %16, i8* %3
br label %19
17: ; preds = %7, %1
%18 = load i8, i8* %2
store i8 %18, i8* %3
br label %19
19: ; preds = %17, %11
%20 = load i8, i8* %3
ret i8 %20
}

LLVM IR (-O2):
define signext i8 @Q_toupper(i8 signext %0) {
%2 = add i8 %0, -97
%3 = icmp ult i8 %2, 26
%4 = add i8 %0, -32
%5 = select i1 %3, i8 %4, i8 %0
ret i8 %5
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void USBHostRequestIN(uint32_t ui32Base, uint32_t ui32Endpoint) {
  uint32_t ui32Register;
  ;

  ;
  if (ui32Endpoint == 0x00000000) {
    ui32Register = 0x00000102;
  } else {
    ui32Register = 0x00000116 + (ui32Endpoint - 0x10);
  }
  (*((volatile unsigned char *)(ui32Base + ui32Register))) = 0x00000020;
}


x86 assembly (clang, -O0):
<USBHostRequestIN>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1120 <USBHostRequestIN+0x20>
movl   $0x102,-0xc(%rbp)
jmp    112e <USBHostRequestIN+0x2e>
mov    -0x8(%rbp),%eax
sub    $0x10,%eax
add    $0x116,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0xc(%rbp),%eax
cltq
movb   $0x20,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBHostRequestIN>:
lea    0x106(%rsi),%eax
test   %esi,%esi
mov    $0x102,%ecx
cmovne %eax,%ecx
movslq %ecx,%rax
movslq %edi,%rcx
movb   $0x20,(%rax,%rcx,1)
ret

LLVM IR (-O0):
define void @USBHostRequestIN(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 258, i32* %5
br label %13
9: ; preds = %2
%10 = load i32, i32* %4
%11 = sub nsw i32 %10, 16
%12 = add nsw i32 278, %11
store i32 %12, i32* %5
br label %13
13: ; preds = %9, %8
%14 = load i32, i32* %3
%15 = load i32, i32* %5
%16 = add nsw i32 %14, %15
%17 = sext i32 %16 to i64
%18 = inttoptr i64 %17 to i8*
store volatile i8 32, i8* %18
ret void
}

LLVM IR (-O2):
define void @USBHostRequestIN(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = add nsw i32 %1, 262
%5 = select i1 %3, i32 258, i32 %4
%6 = add nsw i32 %5, %0
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i8*
store volatile i8 32, i8* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int i = 0x7FEA;
  printf("%i\n", i);
  printf("%x\n", i);
  printf("%X\n", i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x7fea,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xed0(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%esi
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%esi
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x7fea,%esi
call   1030 <printf@plt>
lea    0xedb(%rip),%rdi
mov    $0x7fea,%esi
call   1030 <printf@plt>
lea    0xece(%rip),%rdi
mov    $0x7fea,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%i\0A\00"
@.str.1 = [4 x i8] c"%x\0A\00"
@.str.2 = [4 x i8] c"%X\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 32746, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %5)
%7 = load i32, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%i\0A\00"
@.str.1 = [4 x i8] c"%x\0A\00"
@.str.2 = [4 x i8] c"%X\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 32746)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 32746)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 32746)
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int send_event;
};
struct TYPE_4__ {
  TYPE_1__ xcrossing;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xcrossing_send_event(void *_p, int _v) {
  ((XEvent *)_p)->xcrossing.send_event = (int)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xcrossing_send_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xcrossing_send_event>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xcrossing_send_event(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xcrossing_send_event(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
int test_imm_4Cint64_highword_reg(long long val) {
  return ((val >> 32) & (0x4C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_4Cint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0x4c,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_4Cint64_highword_reg>:
movabs $0x4c00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_4Cint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 76
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_4Cint64_highword_reg(i64 %0) {
%2 = and i64 %0, 326417514496
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ err(int, char *, char const *);
int open(char const *, int);
int xopen(const char *fn, int flags) {
  int fd = open(fn, flags);
  if (fd < 0)
    err(1, "open: %s", fn);
  return fd;
}


x86 assembly (clang, -O0):
<xopen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <open@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jge    115d <xopen+0x3d>
mov    -0x8(%rbp),%rdx
mov    $0x1,%edi
lea    0xea8(%rip),%rsi
call   1030 <err@plt>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xopen>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <open@plt>
mov    %eax,%ebp
test   %eax,%eax
jns    1145 <xopen+0x25>
lea    0xec8(%rip),%rsi
mov    $0x1,%edi
mov    %rbx,%rdx
call   1030 <err@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [9 x i8] c"open: %s\00"
define i32 @xopen(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @open(i8* %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp slt i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = load i8*, i8** %3
%13 = call i32 @err(i32 1, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %12)
br label %14
14: ; preds = %11, %2
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
@.str = [9 x i8] c"open: %s\00"
define i32 @xopen(i8* %0, i32 %1) {
%3 = tail call i32 @open(i8* %0, i32 %1)
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @err(i32 1, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %7
7: ; preds = %5, %2
ret i32 %3
}
/* Variables and functions */
int truncate(char *, int);
int bad_truncate(void *addr) { return truncate((char *)addr, 8192); }


x86 assembly (clang, -O0):
<bad_truncate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2000,%esi
call   1030 <truncate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bad_truncate>:
mov    $0x2000,%esi
jmp    1030 <truncate@plt>

LLVM IR (-O0):
define i32 @bad_truncate(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @truncate(i8* %3, i32 8192)
ret i32 %4
}

LLVM IR (-O2):
define i32 @bad_truncate(i8* %0) {
%2 = tail call i32 @truncate(i8* %0, i32 8192)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ fexpect(char *, int, int, int);
void subtract() {
  char *p = "abcdefg";
  char *q = p + 5;
  fexpect("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
          "2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/input/8cc/"
          "pointer.c",
          59, 8, sizeof(q - p));
  ;
  fexpect("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
          "2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/input/8cc/"
          "pointer.c",
          60, 5, q - p);
  ;
}


x86 assembly (clang, -O0):
<subtract>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x5,%rax
mov    %rax,-0x10(%rbp)
lea    0xed2(%rip),%rdi
mov    $0x3b,%esi
mov    $0x8,%ecx
mov    %ecx,%edx
call   1030 <fexpect@plt>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
mov    %eax,%ecx
lea    0xead(%rip),%rdi
mov    $0x3c,%esi
mov    $0x5,%edx
call   1030 <fexpect@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<subtract>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0x3b,%esi
mov    $0x8,%edx
mov    $0x8,%ecx
call   1030 <fexpect@plt>
mov    %rbx,%rdi
mov    $0x3c,%esi
mov    $0x5,%edx
mov    $0x5,%ecx
pop    %rbx
jmp    1030 <fexpect@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"abcdefg\00"
@.str.1 = [140 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/input/8cc/pointer.c\00"
define void @subtract() {
%1 = alloca i8*
%2 = alloca i8*
store i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8** %1
%3 = load i8*, i8** %1
%4 = getelementptr inbounds i8, i8* %3, i64 5
store i8* %4, i8** %2
%5 = call i32 @fexpect(i8* getelementptr inbounds ([140 x i8], [140 x i8]* @.str.1, i64 0, i64 0), i32 59, i32 8, i32 8)
%6 = load i8*, i8** %2
%7 = load i8*, i8** %1
%8 = ptrtoint i8* %6 to i64
%9 = ptrtoint i8* %7 to i64
%10 = sub i64 %8, %9
%11 = trunc i64 %10 to i32
%12 = call i32 @fexpect(i8* getelementptr inbounds ([140 x i8], [140 x i8]* @.str.1, i64 0, i64 0), i32 60, i32 5, i32 %11)
ret void
}

LLVM IR (-O2):
@.str.1 = [140 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/input/8cc/pointer.c\00"
define void @subtract() {
%1 = tail call i32 @fexpect(i8* getelementptr inbounds ([140 x i8], [140 x i8]* @.str.1, i64 0, i64 0), i32 59, i32 8, i32 8)
%2 = tail call i32 @fexpect(i8* getelementptr inbounds ([140 x i8], [140 x i8]* @.str.1, i64 0, i64 0), i32 60, i32 5, i32 5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ AltitudeFilterSettingsHandle();
int /*<<< orphan*/ UAVObjLogging(int /*<<< orphan*/);
void AltitudeFilterSettingsLogging() {
  UAVObjLogging(AltitudeFilterSettingsHandle());
}


x86 assembly (clang, -O0):
<AltitudeFilterSettingsLogging>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <AltitudeFilterSettingsHandle@plt>
mov    %eax,%edi
call   1030 <UAVObjLogging@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AltitudeFilterSettingsLogging>:
push   %rax
xor    %eax,%eax
call   1040 <AltitudeFilterSettingsHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <UAVObjLogging@plt>

LLVM IR (-O0):
define void @AltitudeFilterSettingsLogging() {
%1 = call i32 (...) @AltitudeFilterSettingsHandle()
%2 = call i32 @UAVObjLogging(i32 %1)
ret void
}

LLVM IR (-O2):
define void @AltitudeFilterSettingsLogging() {
%1 = tail call i32 (...) @AltitudeFilterSettingsHandle()
%2 = tail call i32 @UAVObjLogging(i32 %1)
ret void
}
int even(int x1) { return x1 & 1; }


x86 assembly (clang, -O0):
<even>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<even>:
mov    %edi,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @even(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 1
ret i32 %4
}

LLVM IR (-O2):
define i32 @even(i32 %0) {
%2 = and i32 %0, 1
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ getpgrp();
int killpg(int /*<<< orphan*/, int);
int ppm_kill_group(int sig) { return killpg(getpgrp(), sig); }


x86 assembly (clang, -O0):
<ppm_kill_group>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getpgrp@plt>
mov    %eax,%edi
mov    -0x4(%rbp),%esi
call   1030 <killpg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ppm_kill_group>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <getpgrp@plt>
mov    %eax,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <killpg@plt>

LLVM IR (-O0):
define i32 @ppm_kill_group(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @getpgrp()
%4 = load i32, i32* %2
%5 = call i32 @killpg(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @ppm_kill_group(i32 %0) {
%2 = tail call i32 (...) @getpgrp()
%3 = tail call i32 @killpg(i32 %2, i32 %0)
ret i32 %3
}
void g_strchug() {}


x86 assembly (clang, -O0):
<g_strchug>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_strchug>:
ret

LLVM IR (-O0):
define void @g_strchug() {
ret void
}

LLVM IR (-O2):
define void @g_strchug() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ rm_filetypeext(char *, char const *);
int /*<<< orphan*/ strcat(char *, char const *);
void repl_filetypeext(char file[], const char *oldext, const char *newext) {
  rm_filetypeext(file, oldext);
  strcat(file, newext);
}


x86 assembly (clang, -O0):
<repl_filetypeext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <rm_filetypeext@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <strcat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<repl_filetypeext>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rdi,%rbx
call   1030 <rm_filetypeext@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <strcat@plt>

LLVM IR (-O0):
define void @repl_filetypeext(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = call i32 @rm_filetypeext(i8* %7, i8* %8)
%10 = load i8*, i8** %4
%11 = load i8*, i8** %6
%12 = call i32 @strcat(i8* %10, i8* %11)
ret void
}

LLVM IR (-O2):
define void @repl_filetypeext(i8* %0, i8* %1, i8* %2) {
%4 = tail call i32 @rm_filetypeext(i8* %0, i8* %1)
%5 = tail call i32 @strcat(i8* %0, i8* %2)
ret void
}
unsigned int directionable_in_bytes(unsigned int width) {
  switch (width) {
  case 1:
    return 0xFF;
  case 2:
    return 0xFFFF;
  case 3:
    return 0xFFFFFF;
  case 4:
    return 0xFFFFFFFF;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<directionable_in_bytes>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x3,%eax
ja     1160 <directionable_in_bytes+0x60>
mov    -0x10(%rbp),%rax
lea    0xed9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0xff,-0x4(%rbp)
jmp    1167 <directionable_in_bytes+0x67>
movl   $0xffff,-0x4(%rbp)
jmp    1167 <directionable_in_bytes+0x67>
movl   $0xffffff,-0x4(%rbp)
jmp    1167 <directionable_in_bytes+0x67>
movl   $0xffffffff,-0x4(%rbp)
jmp    1167 <directionable_in_bytes+0x67>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<directionable_in_bytes>:
add    $0xffffffff,%edi
xor    %eax,%eax
cmp    $0x3,%edi
ja     1117 <directionable_in_bytes+0x17>
movslq %edi,%rax
lea    0xeec(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @directionable_in_bytes(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 1, label %5
i32 2, label %6
i32 3, label %7
i32 4, label %8
]
5: ; preds = %1
store i32 255, i32* %2
br label %10
6: ; preds = %1
store i32 65535, i32* %2
br label %10
7: ; preds = %1
store i32 16777215, i32* %2
br label %10
8: ; preds = %1
store i32 -1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %8, %7, %6, %5
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@switch.table.directionable_in_bytes = [4 x i32] [i32 255, i32 65535, i32 16777215, i32 -1]
define i32 @directionable_in_bytes(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 4
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [4 x i32], [4 x i32]* @switch.table.directionable_in_bytes, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 0, %1 ]
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
const char *hfp_subevent_transmit_dtmf_codes_get_dtmf(const uint8_t *event) {
  return (const char *)&event[3];
}


x86 assembly (clang, -O0):
<hfp_subevent_transmit_dtmf_codes_get_dtmf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0xc,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hfp_subevent_transmit_dtmf_codes_get_dtmf>:
lea    0xc(%rdi),%rax
ret

LLVM IR (-O0):
define i8* @hfp_subevent_transmit_dtmf_codes_get_dtmf(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 3
%5 = bitcast i32* %4 to i8*
ret i8* %5
}

LLVM IR (-O2):
define i8* @hfp_subevent_transmit_dtmf_codes_get_dtmf(i32* readnone %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 3
%3 = bitcast i32* %2 to i8*
ret i8* %3
}
int sub(int a, int b) { return a - b; }


x86 assembly (clang, -O0):
<sub>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub>:
mov    %edi,%eax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @sub(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @sub(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ io_hlt();
void task_b_main(void) {
  for (;;)
    io_hlt();
}


x86 assembly (clang, -O0):
<task_b_main>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <task_b_main+0x9>
mov    $0x0,%al
call   1030 <io_hlt@plt>
jmp    1119 <task_b_main+0x9>

x86 assembly (clang, -O2):
<task_b_main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <io_hlt@plt>
jmp    1120 <task_b_main+0x10>

LLVM IR (-O0):
define void @task_b_main() {
br label %1
1: ; preds = %1, %0
%2 = call i32 (...) @io_hlt()
br label %1
}

LLVM IR (-O2):
define void @task_b_main() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @io_hlt()
br label %1
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int sigprocmask(int _how, const sigset_t *_set, sigset_t *_oset) { return 0; }


x86 assembly (clang, -O0):
<sigprocmask>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigprocmask>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sigprocmask(i32 %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32* %2, i32** %6
ret i32 0
}

LLVM IR (-O2):
define i32 @sigprocmask(i32 %0, i32* nocapture readnone %1, i32* nocapture readnone %2) {
ret i32 0
}