xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ sqrt(double);
int isPerfectSquare(double n) {
  int s = (int)sqrt(n);
  return s * s == n ? 1 : 0;
}


x86 assembly (clang, -O0):
<isPerfectSquare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <sqrt@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
cvtsi2sd %eax,%xmm0
movsd  -0x8(%rbp),%xmm1
xor    %eax,%eax
mov    $0x1,%ecx
ucomisd %xmm1,%xmm0
setnp  %sil
sete   %dl
test   %sil,%dl
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPerfectSquare>:
push   %rax
movsd  %xmm0,(%rsp)
call   1030 <sqrt@plt>
imul   %eax,%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
cmpeqsd (%rsp),%xmm0
movq   %xmm0,%rax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @isPerfectSquare(double %0) {
%2 = alloca double
%3 = alloca i32
store double %0, double* %2
%4 = load double, double* %2
%5 = call i64 @sqrt(double %4)
%6 = trunc i64 %5 to i32
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = load i32, i32* %3
%9 = mul nsw i32 %7, %8
%10 = sitofp i32 %9 to double
%11 = load double, double* %2
%12 = fcmp oeq double %10, %11
%13 = zext i1 %12 to i64
%14 = select i1 %12, i32 1, i32 0
ret i32 %14
}

LLVM IR (-O2):
define i32 @isPerfectSquare(double %0) {
%2 = tail call i64 @sqrt(double %0)
%3 = trunc i64 %2 to i32
%4 = mul nsw i32 %3, %3
%5 = sitofp i32 %4 to double
%6 = fcmp oeq double %5, %0
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
scalar_t__ readlink(char *, char *, size_t);
bool get_self(char *path, size_t pathsz) {
  if (readlink("/proc/self/exe", path, pathsz) < 0) {
    return false;
  }
  return true;
}


x86 assembly (clang, -O0):
<get_self>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
lea    0xed1(%rip),%rdi
call   1030 <readlink@plt>
cmp    $0x0,%rax
jge    114a <get_self+0x3a>
movl   $0x0,-0x4(%rbp)
jmp    1151 <get_self+0x41>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_self>:
push   %rax
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee2(%rip),%rdi
call   1030 <readlink@plt>
shr    $0x3f,%rax
xor    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"/proc/self/exe\00"
define i32 @get_self(i8* %0, i64 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
%6 = load i8*, i8** %4
%7 = load i64, i64* %5
%8 = call i64 @readlink(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %6, i64 %7)
%9 = icmp slt i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 0, i32* %3
br label %12
11: ; preds = %2
store i32 1, i32* %3
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
@.str = [15 x i8] c"/proc/self/exe\00"
define i32 @get_self(i8* nocapture %0, i64 %1) {
%3 = tail call i64 @readlink(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %0, i64 %1)
%4 = lshr i64 %3, 63
%5 = trunc i64 %4 to i32
%6 = xor i32 %5, 1
ret i32 %6
}
int atooi(char *cp) {
  int i, base;
  i = 0;
  base = 8;
  while (*cp >= '0' && *cp <= '7') {
    i *= base;
    i += *cp++ - '0';
  }
  return i;
}


x86 assembly (clang, -O0):
<atooi>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x8,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x11(%rbp)
jl     113b <atooi+0x3b>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x37,%eax
setle  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    114b <atooi+0x4b>
jmp    1175 <atooi+0x75>
mov    -0x10(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
sub    $0x30,%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <atooi+0x16>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atooi>:
mov    (%rdi),%cl
mov    %ecx,%edx
and    $0xf8,%dl
xor    %eax,%eax
cmp    $0x30,%dl
jne    113a <atooi+0x3a>
add    $0x1,%rdi
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movzbl %cl,%ecx
lea    (%rcx,%rax,8),%eax
add    $0xffffffd0,%eax
movzbl (%rdi),%ecx
mov    %ecx,%edx
and    $0xf8,%dl
add    $0x1,%rdi
cmp    $0x30,%dl
je     1120 <atooi+0x20>
ret

LLVM IR (-O0):
define i32 @atooi(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
store i32 8, i32* %4
br label %5
5: ; preds = %17, %1
%6 = load i8*, i8** %2
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp sge i32 %8, 48
br i1 %9, label %10, label %15
10: ; preds = %5
%11 = load i8*, i8** %2
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp sle i32 %13, 55
br label %15
15: ; preds = %10, %5
%16 = phi i1 [ false, %5 ], [ %14, %10 ]
br i1 %16, label %17, label %28
17: ; preds = %15
%18 = load i32, i32* %4
%19 = load i32, i32* %3
%20 = mul nsw i32 %19, %18
store i32 %20, i32* %3
%21 = load i8*, i8** %2
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %2
%23 = load i8, i8* %21
%24 = sext i8 %23 to i32
%25 = sub nsw i32 %24, 48
%26 = load i32, i32* %3
%27 = add nsw i32 %26, %25
store i32 %27, i32* %3
br label %5
28: ; preds = %15
%29 = load i32, i32* %3
ret i32 %29
}

LLVM IR (-O2):
define i32 @atooi(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -8
%4 = icmp eq i8 %3, 48
br i1 %4, label %5, label %17
5: ; preds = %1, %5
%6 = phi i8 [ %14, %5 ], [ %2, %1 ]
%7 = phi i8* [ %11, %5 ], [ %0, %1 ]
%8 = phi i32 [ %13, %5 ], [ 0, %1 ]
%9 = zext i8 %6 to i32
%10 = shl nsw i32 %8, 3
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = add i32 %10, -48
%13 = add i32 %12, %9
%14 = load i8, i8* %11
%15 = and i8 %14, -8
%16 = icmp eq i8 %15, 48
br i1 %16, label %5, label %17
17: ; preds = %5, %1
%18 = phi i32 [ 0, %1 ], [ %13, %5 ]
ret i32 %18
}
unsigned short P5RGBA(unsigned short BGR) {
  if (!BGR)
    return 0;
  return ((((BGR << 11)) | ((BGR >> 9) & 0x3e) | ((BGR << 1) & 0x7c0))) | 1;
}


x86 assembly (clang, -O0):
<P5RGBA>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x4(%rbp)
cmpw   $0x0,-0x4(%rbp)
jne    1121 <P5RGBA+0x21>
movw   $0x0,-0x2(%rbp)
jmp    114a <P5RGBA+0x4a>
movzwl -0x4(%rbp),%eax
shl    $0xb,%eax
movzwl -0x4(%rbp),%ecx
sar    $0x9,%ecx
and    $0x3e,%ecx
or     %ecx,%eax
movzwl -0x4(%rbp),%ecx
shl    $0x1,%ecx
and    $0x7c0,%ecx
or     %ecx,%eax
or     $0x1,%eax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<P5RGBA>:
test   %edi,%edi
je     1120 <P5RGBA+0x20>
mov    %edi,%eax
shl    $0xb,%eax
mov    %edi,%ecx
shr    $0x9,%ecx
and    $0x3e,%ecx
or     %eax,%ecx
and    $0x3e0,%edi
lea    (%rcx,%rdi,2),%eax
add    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i16 @P5RGBA(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %3
%4 = load i16, i16* %3
%5 = icmp ne i16 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %1
store i16 0, i16* %2
br label %23
7: ; preds = %1
%8 = load i16, i16* %3
%9 = zext i16 %8 to i32
%10 = shl i32 %9, 11
%11 = load i16, i16* %3
%12 = zext i16 %11 to i32
%13 = ashr i32 %12, 9
%14 = and i32 %13, 62
%15 = or i32 %10, %14
%16 = load i16, i16* %3
%17 = zext i16 %16 to i32
%18 = shl i32 %17, 1
%19 = and i32 %18, 1984
%20 = or i32 %15, %19
%21 = or i32 %20, 1
%22 = trunc i32 %21 to i16
store i16 %22, i16* %2
br label %23
23: ; preds = %7, %6
%24 = load i16, i16* %2
ret i16 %24
}

LLVM IR (-O2):
define zeroext i16 @P5RGBA(i16 zeroext %0) {
%2 = icmp eq i16 %0, 0
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = shl i16 %0, 11
%5 = lshr i16 %0, 9
%6 = and i16 %5, 62
%7 = or i16 %6, %4
%8 = shl i16 %0, 1
%9 = and i16 %8, 1984
%10 = or i16 %7, %9
%11 = or i16 %10, 1
br label %12
12: ; preds = %1, %3
%13 = phi i16 [ %11, %3 ], [ 0, %1 ]
ret i16 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void show_bytes(unsigned char *start, int len) {
  return;
  int i;
  for (i = len - 1; i >= 0; i--)
    printf("%.2x", start[i]);
  printf("\n");
}


x86 assembly (clang, -O0):
<show_bytes>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_bytes>:
ret

LLVM IR (-O0):
define void @show_bytes(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @show_bytes(i8* nocapture %0, i32 %1) {
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
char hex_char(uint8_t x) {
  if (x > 9)
    return 'a' + x - 10;
  return '0' + x;
}


x86 assembly (clang, -O0):
<hex_char>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x9,-0x8(%rbp)
jle    1122 <hex_char+0x22>
mov    -0x8(%rbp),%eax
add    $0x61,%eax
sub    $0xa,%eax
mov    %al,-0x1(%rbp)
jmp    112b <hex_char+0x2b>
mov    -0x8(%rbp),%eax
add    $0x30,%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hex_char>:
cmp    $0xa,%edi
mov    $0x57,%ecx
mov    $0x30,%eax
cmovge %ecx,%eax
add    %dil,%al
ret

LLVM IR (-O0):
define signext i8 @hex_char(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 9
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %3
%8 = add nsw i32 97, %7
%9 = sub nsw i32 %8, 10
%10 = trunc i32 %9 to i8
store i8 %10, i8* %2
br label %15
11: ; preds = %1
%12 = load i32, i32* %3
%13 = add nsw i32 48, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %2
br label %15
15: ; preds = %11, %6
%16 = load i8, i8* %2
ret i8 %16
}

LLVM IR (-O2):
define signext i8 @hex_char(i32 %0) {
%2 = icmp sgt i32 %0, 9
%3 = trunc i32 %0 to i8
%4 = select i1 %2, i8 87, i8 48
%5 = add i8 %4, %3
ret i8 %5
}
void dbOverwrite(void) {
  _serverPanic("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/"
               "heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c",
               59, "Function '%s' is disabled.", __func__);
}


x86 assembly (clang, -O0):
<dbOverwrite>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x3b,%esi
lea    0xf79(%rip),%rdx
lea    0xf8d(%rip),%rcx
mov    $0x0,%al
call   1030 <_serverPanic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbOverwrite>:
lea    0xee9(%rip),%rdi
lea    0xf82(%rip),%rdx
lea    0xf96(%rip),%rcx
mov    $0x3b,%esi
xor    %eax,%eax
jmp    1030 <_serverPanic@plt>

LLVM IR (-O0):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.dbOverwrite = [12 x i8] c"dbOverwrite\00"
define void @dbOverwrite() {
%1 = call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 59, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @__func__.dbOverwrite, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.dbOverwrite = [12 x i8] c"dbOverwrite\00"
define void @dbOverwrite() {
%1 = tail call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 59, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @__func__.dbOverwrite, i64 0, i64 0))
ret void
}
/* Variables and functions */
int cpuid_ecx(int);
bool apic2_check_support(void) { return (cpuid_ecx(1) & (1 << 21)) != 0; }


x86 assembly (clang, -O0):
<apic2_check_support>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <cpuid_ecx@plt>
and    $0x200000,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<apic2_check_support>:
push   %rax
mov    $0x1,%edi
call   1030 <cpuid_ecx@plt>
shr    $0x15,%eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @apic2_check_support() {
%1 = call i32 @cpuid_ecx(i32 1)
%2 = and i32 %1, 2097152
%3 = icmp ne i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @apic2_check_support() {
%1 = tail call i32 @cpuid_ecx(i32 1)
%2 = lshr i32 %1, 21
%3 = and i32 %2, 1
ret i32 %3
}
int func(int mult) { return 42 * mult; }


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0x2a,-0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
imul   $0x2a,%edi,%eax
ret

LLVM IR (-O0):
define i32 @func(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 42, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @func(i32 %0) {
%2 = mul nsw i32 %0, 42
ret i32 %2
}
int oauth_verify_rsa_sha1(const char *m, const char *c, const char *sig) {
  return -1;
}


x86 assembly (clang, -O0):
<oauth_verify_rsa_sha1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<oauth_verify_rsa_sha1>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @oauth_verify_rsa_sha1(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
ret i32 -1
}

LLVM IR (-O2):
define i32 @oauth_verify_rsa_sha1(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
ret i32 -1
}
void ls_costN_nm8_decref(void) {}


x86 assembly (clang, -O0):
<ls_costN_nm8_decref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_costN_nm8_decref>:
ret

LLVM IR (-O0):
define void @ls_costN_nm8_decref() {
ret void
}

LLVM IR (-O2):
define void @ls_costN_nm8_decref() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, unsigned char);
char *get_sensor_type_desc(unsigned char stype) {
  static char tstr[12];
  sprintf(tstr, "%02x", stype);
  return (tstr);
}


x86 assembly (clang, -O0):
<get_sensor_type_desc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
lea    0x2f04(%rip),%rdi
lea    0xed4(%rip),%rsi
movzbl -0x1(%rbp),%edx
call   1030 <sprintf@plt>
lea    0x2eed(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_sensor_type_desc>:
push   %rbx
mov    %edi,%edx
lea    0x2f0f(%rip),%rbx
lea    0xedf(%rip),%rsi
mov    %rbx,%rdi
call   1030 <sprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@get_sensor_type_desc.tstr = internal global [12 x i8] zeroinitializer
@.str = [5 x i8] c"%02x\00"
define i8* @get_sensor_type_desc(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @sprintf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @get_sensor_type_desc.tstr, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8 zeroext %3)
ret i8* getelementptr inbounds ([12 x i8], [12 x i8]* @get_sensor_type_desc.tstr, i64 0, i64 0)
}

LLVM IR (-O2):
@get_sensor_type_desc.tstr = internal global [12 x i8] zeroinitializer
@.str = [5 x i8] c"%02x\00"
define i8* @get_sensor_type_desc(i8 zeroext %0) {
%2 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @get_sensor_type_desc.tstr, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8 zeroext %0)
ret i8* getelementptr inbounds ([12 x i8], [12 x i8]* @get_sensor_type_desc.tstr, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0x06() {
  Assert_real((isdigit(6) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              35, ("isdigit should be 0 for 0x06"));
}


x86 assembly (clang, -O0):
<t_isdigit_0x06>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x23,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0x06>:
push   %rax
mov    $0x6,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x23,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0x06\00"
define void @t_isdigit_0x06() {
%1 = call i64 @isdigit(i32 6)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 35, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0x06\00"
define void @t_isdigit_0x06() {
%1 = tail call i64 @isdigit(i32 6)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 35, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int close(int fd) { return (0); }


x86 assembly (clang, -O0):
<close>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<close>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @close(i32 %0) {
ret i32 0
}
int bits(unsigned int d) {
  int cnt = 1;
  while (d >= 10) {
    d /= 10;
    cnt++;
  }
  return cnt;
}


x86 assembly (clang, -O0):
<bits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0xa,-0x4(%rbp)
jb     1135 <bits+0x35>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <bits+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bits>:
mov    $0x1,%eax
cmp    $0xa,%edi
jb     1134 <bits+0x34>
mov    $0x1,%eax
mov    $0xcccccccd,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %edi,%edx
imul   %rcx,%rdx
shr    $0x23,%rdx
add    $0x1,%eax
cmp    $0x63,%edi
mov    %edx,%edi
ja     1120 <bits+0x20>
ret

LLVM IR (-O0):
define i32 @bits(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp uge i32 %5, 10
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %2
%9 = udiv i32 %8, 10
store i32 %9, i32* %2
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @bits(i32 %0) {
%2 = icmp ugt i32 %0, 9
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 1, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = udiv i32 %5, 10
%7 = add nuw nsw i32 %4, 1
%8 = icmp ugt i32 %5, 99
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi i32 [ 1, %1 ], [ %7, %3 ]
ret i32 %10
}
/* Variables and functions */
int write(int, void const *, int);
int Write(int fd, char *buf, int c) {
  int i = 0, r;
  while (i < c) {
    r = write(fd, (const void *)(buf + i), c - i);
    i += r;
  }
  return i;
}


x86 assembly (clang, -O0):
<Write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    115f <Write+0x4f>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
movslq -0x18(%rbp),%rax
add    %rax,%rsi
mov    -0x14(%rbp),%edx
sub    -0x18(%rbp),%edx
call   1030 <write@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    -0x18(%rbp),%eax
mov    %eax,-0x18(%rbp)
jmp    1129 <Write+0x19>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Write>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
test   %edx,%edx
jle    114b <Write+0x3b>
mov    %edx,%ebx
mov    %rsi,%r14
mov    %edi,%r15d
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nop
movslq %eax,%rbp
lea    (%r14,%rbp,1),%rsi
mov    %ebx,%edx
sub    %ebp,%edx
mov    %r15d,%edi
call   1030 <write@plt>
add    %ebp,%eax
cmp    %ebx,%eax
jl     1130 <Write+0x20>
jmp    114d <Write+0x3d>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @Write(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %9
9: ; preds = %13, %3
%10 = load i32, i32* %7
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %26
13: ; preds = %9
%14 = load i32, i32* %4
%15 = load i8*, i8** %5
%16 = load i32, i32* %7
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i32, i32* %6
%20 = load i32, i32* %7
%21 = sub nsw i32 %19, %20
%22 = call i32 @write(i32 %14, i8* %18, i32 %21)
store i32 %22, i32* %8
%23 = load i32, i32* %8
%24 = load i32, i32* %7
%25 = add nsw i32 %24, %23
store i32 %25, i32* %7
br label %9
26: ; preds = %9
%27 = load i32, i32* %7
ret i32 %27
}

LLVM IR (-O2):
define i32 @Write(i32 %0, i8* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %13
5: ; preds = %3, %5
%6 = phi i32 [ %11, %5 ], [ 0, %3 ]
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %1, i64 %7
%9 = sub nsw i32 %2, %6
%10 = tail call i32 @write(i32 %0, i8* %8, i32 %9)
%11 = add nsw i32 %10, %6
%12 = icmp slt i32 %11, %2
br i1 %12, label %5, label %13
13: ; preds = %5, %3
%14 = phi i32 [ 0, %3 ], [ %11, %5 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ M_ADD(int /*<<< orphan*/);
int /*<<< orphan*/ M_RDMEM_OPCODE();
void add_a_n(void) { M_ADD(M_RDMEM_OPCODE()); }


x86 assembly (clang, -O0):
<add_a_n>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <M_RDMEM_OPCODE@plt>
mov    %eax,%edi
call   1030 <M_ADD@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_a_n>:
push   %rax
xor    %eax,%eax
call   1040 <M_RDMEM_OPCODE@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <M_ADD@plt>

LLVM IR (-O0):
define void @add_a_n() {
%1 = call i32 (...) @M_RDMEM_OPCODE()
%2 = call i32 @M_ADD(i32 %1)
ret void
}

LLVM IR (-O2):
define void @add_a_n() {
%1 = tail call i32 (...) @M_RDMEM_OPCODE()
%2 = tail call i32 @M_ADD(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ERR_print_errors_fp(int /*<<< orphan*/);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char const *);
int /*<<< orphan*/ stderr;
void report_and_exit(const char *msg) {
  perror(msg);
  ERR_print_errors_fp(stderr);
  exit(-1);
}


x86 assembly (clang, -O0):
<report_and_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    0x2e94(%rip),%rax
mov    (%rax),%edi
call   1050 <ERR_print_errors_fp@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<report_and_exit>:
push   %rax
call   1030 <perror@plt>
mov    0x2ea3(%rip),%rax
mov    (%rax),%edi
call   1050 <ERR_print_errors_fp@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
define void @report_and_exit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = load i32, i32* @stderr
%6 = call i32 @ERR_print_errors_fp(i32 %5)
%7 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
define void @report_and_exit(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = load i32, i32* @stderr
%4 = tail call i32 @ERR_print_errors_fp(i32 %3)
%5 = tail call i32 @exit(i32 -1)
unreachable
}
int pthread_sched_init(void) { return 0; }


x86 assembly (clang, -O0):
<pthread_sched_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_sched_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pthread_sched_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @pthread_sched_init() {
ret i32 0
}
/* Variables and functions */
int fibo(int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int i;
  for (i = 1; i <= 10; i++) {
    printf("%d", fibo(i));
    return 0;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jg     115d <main+0x3d>
mov    -0x8(%rbp),%edi
call   1040 <fibo@plt>
mov    %eax,%esi
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1040 <fibo@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
br label %3
3: ; preds = %10, %0
%4 = load i32, i32* %2
%5 = icmp sle i32 %4, 10
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = load i32, i32* %2
%8 = call i32 @fibo(i32 %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %8)
store i32 0, i32* %1
br label %13
10: ; No predecessors!
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %3
13: ; preds = %6, %3
%14 = load i32, i32* %1
ret i32 %14
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @fibo(i32 1)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
unsigned xrop3_117_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~T;
  stk2 = S | stk3;
  stk1 = D & stk2;
  stk1 = ~stk1;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_117_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_117_1_0>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
not    %sil
or     %dil,%sil
movzbl %sil,%eax
or     %ecx,%eax
not    %eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_117_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %6
%26 = load i32, i32* %10
%27 = or i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %5
%29 = load i32, i32* %9
%30 = and i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = xor i32 %31, -1
store i32 %32, i32* %8
%33 = load i32, i32* %8
%34 = load i32, i32* %6
%35 = xor i32 %34, -1
%36 = and i32 %33, %35
%37 = load i32, i32* %5
%38 = load i32, i32* %6
%39 = and i32 %37, %38
%40 = or i32 %36, %39
ret i32 %40
}

LLVM IR (-O2):
define i32 @xrop3_117_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = xor i8 %1, -1
%6 = or i8 %5, %0
%7 = zext i8 %6 to i32
%8 = or i32 %4, %7
%9 = xor i32 %8, -1
%10 = or i32 %9, %3
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ WINDOW;

/* Variables and functions */
int /*<<< orphan*/ COLOR_BLACK;
int /*<<< orphan*/ COLOR_PAIR(int);
int /*<<< orphan*/ COLOR_YELLOW;
int /*<<< orphan*/ init_pair(int, int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ wattron(int /*<<< orphan*/ *, int /*<<< orphan*/);
void before_mention(WINDOW *win) {
  init_pair(1, COLOR_YELLOW, COLOR_BLACK);
  wattron(win, COLOR_PAIR(1));
}


x86 assembly (clang, -O0):
<before_mention>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e95(%rip),%rax
mov    (%rax),%esi
mov    0x2e9c(%rip),%rax
mov    (%rax),%edx
mov    $0x1,%edi
call   1030 <init_pair@plt>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x1,%edi
call   1040 <COLOR_PAIR@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1050 <wattron@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<before_mention>:
push   %rbx
mov    %rdi,%rbx
mov    0x2e9d(%rip),%rax
mov    (%rax),%esi
mov    0x2ea4(%rip),%rax
mov    (%rax),%edx
mov    $0x1,%edi
call   1030 <init_pair@plt>
mov    $0x1,%edi
call   1040 <COLOR_PAIR@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1050 <wattron@plt>

LLVM IR (-O0):
@COLOR_YELLOW = global i32 0
@COLOR_BLACK = global i32 0
define void @before_mention(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32, i32* @COLOR_YELLOW
%4 = load i32, i32* @COLOR_BLACK
%5 = call i32 @init_pair(i32 1, i32 %3, i32 %4)
%6 = load i32*, i32** %2
%7 = call i32 @COLOR_PAIR(i32 1)
%8 = call i32 @wattron(i32* %6, i32 %7)
ret void
}

LLVM IR (-O2):
@COLOR_YELLOW = global i32 0
@COLOR_BLACK = global i32 0
define void @before_mention(i32* %0) {
%2 = load i32, i32* @COLOR_YELLOW
%3 = load i32, i32* @COLOR_BLACK
%4 = tail call i32 @init_pair(i32 1, i32 %2, i32 %3)
%5 = tail call i32 @COLOR_PAIR(i32 1)
%6 = tail call i32 @wattron(i32* %0, i32 %5)
ret void
}
int Prime(int num) {
  int i;
  for (i = 2; i * i < num; i++) {
    if (!(num % i))
      return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<Prime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    114d <Prime+0x4d>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    113a <Prime+0x3a>
movl   $0x0,-0x4(%rbp)
jmp    1154 <Prime+0x54>
jmp    113f <Prime+0x3f>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <Prime+0xe>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Prime>:
mov    $0x1,%ecx
cmp    $0x5,%edi
jl     1125 <Prime+0x25>
mov    $0x2,%esi
nop
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1128 <Prime+0x28>
add    $0x1,%esi
mov    %esi,%eax
imul   %esi,%eax
cmp    %edi,%eax
jl     1110 <Prime+0x10>
mov    %ecx,%eax
ret
xor    %ecx,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @Prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 2, i32* %4
br label %5
5: ; preds = %18, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %4
%8 = mul nsw i32 %6, %7
%9 = load i32, i32* %3
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %21
11: ; preds = %5
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = srem i32 %12, %13
%15 = icmp ne i32 %14, 0
br i1 %15, label %17, label %16
16: ; preds = %11
store i32 0, i32* %2
br label %22
17: ; preds = %11
br label %18
18: ; preds = %17
%19 = load i32, i32* %4
%20 = add nsw i32 %19, 1
store i32 %20, i32* %4
br label %5
21: ; preds = %5
store i32 1, i32* %2
br label %22
22: ; preds = %21, %16
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @Prime(i32 %0) {
%2 = icmp sgt i32 %0, 4
br i1 %2, label %6, label %11
3: ; preds = %6
%4 = mul nsw i32 %10, %10
%5 = icmp slt i32 %4, %0
br i1 %5, label %6, label %11
6: ; preds = %1, %3
%7 = phi i32 [ %10, %3 ], [ 2, %1 ]
%8 = srem i32 %0, %7
%9 = icmp eq i32 %8, 0
%10 = add nuw nsw i32 %7, 1
br i1 %9, label %11, label %3
11: ; preds = %6, %3, %1
%12 = phi i32 [ 1, %1 ], [ 1, %3 ], [ 0, %6 ]
ret i32 %12
}
/* Type definitions */
struct mmap_window {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct mmap_window *);
void mmap_window_delete(struct mmap_window *self) { free(self); }


x86 assembly (clang, -O0):
<mmap_window_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmap_window_delete>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.mmap_window = type { i32 }
define void @mmap_window_delete(%struct.mmap_window* %0) {
%2 = alloca %struct.mmap_window*
store %struct.mmap_window* %0, %struct.mmap_window** %2
%3 = load %struct.mmap_window*, %struct.mmap_window** %2
%4 = call i32 @free(%struct.mmap_window* %3)
ret void
}

LLVM IR (-O2):
%struct.mmap_window = type { i32 }
define void @mmap_window_delete(%struct.mmap_window* nocapture %0) {
%2 = tail call i32 @free(%struct.mmap_window* %0)
ret void
}
int __ompc_cas(volatile int *ptr, int ag, int x) {
  return __sync_bool_compare_and_swap(ptr, ag, x);
}


x86 assembly (clang, -O0):
<__ompc_cas>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%eax
mov    -0x10(%rbp),%edx
lock cmpxchg %edx,(%rcx)
mov    %eax,%ecx
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ompc_cas>:
mov    %esi,%eax
xor    %ecx,%ecx
lock cmpxchg %edx,(%rdi)
sete   %cl
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @__ompc_cas(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = cmpxchg i32* %7, i32 %8, i32 %9 seq_cst seq_cst
%11 = extractvalue { i32, i1 } %10, 1
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @__ompc_cas(i32* nocapture %0, i32 %1, i32 %2) {
%4 = cmpxchg i32* %0, i32 %1, i32 %2 seq_cst seq_cst
%5 = extractvalue { i32, i1 } %4, 1
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
char *strchr(char *, int);
char *split_at(char *string, int delimiter) {
  char *cp;
  if ((cp = strchr(string, delimiter)) != 0)
    *cp++ = 0;
  return (cp);
}


x86 assembly (clang, -O0):
<split_at>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <strchr@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
je     114b <split_at+0x3b>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
movb   $0x0,(%rax)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<split_at>:
push   %rax
call   1030 <strchr@plt>
test   %rax,%rax
je     1127 <split_at+0x17>
mov    %rax,%rcx
add    $0x1,%rax
movb   $0x0,(%rcx)
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @split_at(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i8* @strchr(i8* %6, i32 %7)
store i8* %8, i8** %5
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %13
10: ; preds = %2
%11 = load i8*, i8** %5
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %5
store i8 0, i8* %11
br label %13
13: ; preds = %10, %2
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
define i8* @split_at(i8* %0, i32 %1) {
%3 = tail call i8* @strchr(i8* dereferenceable(1) %0, i32 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = getelementptr inbounds i8, i8* %3, i64 1
store i8 0, i8* %3
br label %7
7: ; preds = %5, %2
%8 = phi i8* [ %6, %5 ], [ null, %2 ]
ret i8* %8
}
void cpuplace(ss) struct _ships *ss;
{
  int c, d;
  do {
    c = rnd(100);
    d = rnd(2);
  } while (!checkplace(ss, c, d));
  placeship(ss, c, d);
}


x86 assembly (clang, -O0):
<cpuplace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x64,%edi
mov    $0x0,%al
call   1040 <rnd@plt>
mov    %eax,-0xc(%rbp)
mov    $0x2,%edi
mov    $0x0,%al
call   1040 <rnd@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    $0x0,%al
call   1050 <checkplace@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    113c <cpuplace+0xc>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    $0x0,%al
call   1030 <placeship@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuplace>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
nopw   0x0(%rax,%rax,1)
mov    $0x64,%edi
xor    %eax,%eax
call   1040 <rnd@plt>
mov    %eax,%ebp
mov    $0x2,%edi
xor    %eax,%eax
call   1040 <rnd@plt>
mov    %eax,%ebx
mov    %r14,%rdi
mov    %ebp,%esi
mov    %eax,%edx
xor    %eax,%eax
call   1050 <checkplace@plt>
test   %eax,%eax
je     1140 <cpuplace+0x10>
mov    %r14,%rdi
mov    %ebp,%esi
mov    %ebx,%edx
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <placeship@plt>

LLVM IR (-O0):
%struct._ships = type opaque
define void @cpuplace(%struct._ships* %0) {
%2 = alloca %struct._ships*
%3 = alloca i32
%4 = alloca i32
store %struct._ships* %0, %struct._ships** %2
br label %5
5: ; preds = %8, %1
%6 = call i32 (i32, ...) bitcast (i32 (...)* @rnd to i32 (i32, ...)*)(i32 100)
store i32 %6, i32* %3
%7 = call i32 (i32, ...) bitcast (i32 (...)* @rnd to i32 (i32, ...)*)(i32 2)
store i32 %7, i32* %4
br label %8
8: ; preds = %5
%9 = load %struct._ships*, %struct._ships** %2
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = call i32 (%struct._ships*, i32, i32, ...) bitcast (i32 (...)* @checkplace to i32 (%struct._ships*, i32, i32, ...)*)(%struct._ships* %9, i32 %10, i32 %11)
%13 = icmp ne i32 %12, 0
%14 = xor i1 %13, true
br i1 %14, label %5, label %15
15: ; preds = %8
%16 = load %struct._ships*, %struct._ships** %2
%17 = load i32, i32* %3
%18 = load i32, i32* %4
%19 = call i32 (%struct._ships*, i32, i32, ...) bitcast (i32 (...)* @placeship to i32 (%struct._ships*, i32, i32, ...)*)(%struct._ships* %16, i32 %17, i32 %18)
ret void
}

LLVM IR (-O2):
%struct._ships = type opaque
define void @cpuplace(%struct._ships* %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @rnd to i32 (i32, ...)*)(i32 100)
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @rnd to i32 (i32, ...)*)(i32 2)
%5 = tail call i32 (%struct._ships*, i32, i32, ...) bitcast (i32 (...)* @checkplace to i32 (%struct._ships*, i32, i32, ...)*)(%struct._ships* %0, i32 %3, i32 %4)
%6 = icmp eq i32 %5, 0
br i1 %6, label %2, label %7
7: ; preds = %2
%8 = tail call i32 (%struct._ships*, i32, i32, ...) bitcast (i32 (...)* @placeship to i32 (%struct._ships*, i32, i32, ...)*)(%struct._ships* %0, i32 %3, i32 %4)
ret void
}
/* Type definitions */
typedef unsigned int uint8_t;

/* Variables and functions */
uint8_t skipjack_get_preferred_block_size(void) { return (8U); }


x86 assembly (clang, -O0):
<skipjack_get_preferred_block_size>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<skipjack_get_preferred_block_size>:
mov    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @skipjack_get_preferred_block_size() {
ret i32 8
}

LLVM IR (-O2):
define i32 @skipjack_get_preferred_block_size() {
ret i32 8
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, ...);
int main() {
  int x = -(unsigned char)1;
  printf("%d\n", x);
  if (x != -1) {
    printf("Error %d\n", (int)1);
    exit(1);
  };
  {
    printf("Success\n");
    exit(0);
  };
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xffffffff,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xec6(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
cmpl   $0xffffffff,-0x8(%rbp)
je     116e <main+0x4e>
lea    0xea8(%rip),%rdi
mov    $0x1,%esi
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>
lea    0xe95(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
mov    $0xffffffff,%esi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xeb9(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
@.str.1 = [10 x i8] c"Error %d\0A\00"
@.str.2 = [9 x i8] c"Success\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 -1, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, -1
br i1 %6, label %7, label %10
7: ; preds = %0
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i32 1)
%9 = call i32 @exit(i32 1)
unreachable
10: ; preds = %0
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i64 0, i64 0))
%12 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
@str = [8 x i8] c"Success\00"
define i32 @main() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 -1)
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 0)
unreachable
}
void UYVYToUVRow_SSE2() {}


x86 assembly (clang, -O0):
<UYVYToUVRow_SSE2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UYVYToUVRow_SSE2>:
ret

LLVM IR (-O0):
define void @UYVYToUVRow_SSE2() {
ret void
}

LLVM IR (-O2):
define void @UYVYToUVRow_SSE2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void _gk_ga_free(void *dna) { free(dna); }


x86 assembly (clang, -O0):
<_gk_ga_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_gk_ga_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @_gk_ga_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @_gk_ga_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Type definitions */
struct NotifyData {
  int dummy;
};

/* Variables and functions */
int _notif_send_notification(struct NotifyData *);
int notif_send_notification(struct NotifyData *data) {
  return _notif_send_notification(data);
}


x86 assembly (clang, -O0):
<notif_send_notification>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_notif_send_notification@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<notif_send_notification>:
jmp    1030 <_notif_send_notification@plt>

LLVM IR (-O0):
%struct.NotifyData = type { i32 }
define i32 @notif_send_notification(%struct.NotifyData* %0) {
%2 = alloca %struct.NotifyData*
store %struct.NotifyData* %0, %struct.NotifyData** %2
%3 = load %struct.NotifyData*, %struct.NotifyData** %2
%4 = call i32 @_notif_send_notification(%struct.NotifyData* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.NotifyData = type { i32 }
define i32 @notif_send_notification(%struct.NotifyData* %0) {
%2 = tail call i32 @_notif_send_notification(%struct.NotifyData* %0)
ret i32 %2
}
/* Variables and functions */
void ui_bell(void) {}


x86 assembly (clang, -O0):
<ui_bell>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ui_bell>:
ret

LLVM IR (-O0):
define void @ui_bell() {
ret void
}

LLVM IR (-O2):
define void @ui_bell() {
ret void
}
/* Variables and functions */
void *__memalign(int, size_t);
void *__valloc(size_t bytes) { return __memalign((0x1000), bytes); }


x86 assembly (clang, -O0):
<__valloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x1000,%edi
call   1030 <__memalign@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__valloc>:
mov    %rdi,%rsi
mov    $0x1000,%edi
jmp    1030 <__memalign@plt>

LLVM IR (-O0):
define i8* @__valloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @__memalign(i32 4096, i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @__valloc(i64 %0) {
%2 = tail call i8* @__memalign(i32 4096, i64 %0)
ret i8* %2
}
/* Variables and functions */
int CLOCKS_PER_SEC;
int c_clk_tck_() { return CLOCKS_PER_SEC; }


x86 assembly (clang, -O0):
<c_clk_tck_>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_clk_tck_>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@CLOCKS_PER_SEC = global i32 0
define i32 @c_clk_tck_() {
%1 = load i32, i32* @CLOCKS_PER_SEC
ret i32 %1
}

LLVM IR (-O2):
@CLOCKS_PER_SEC = global i32 0
define i32 @c_clk_tck_() {
%1 = load i32, i32* @CLOCKS_PER_SEC
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void I2CSlaveEnable(uint32_t ui32Base) {
  ;
  (*((volatile unsigned long
          *)(((unsigned long)(0x40002000 + 0x00000820) & 0xF0000000) |
             0x02000000 |
             (((unsigned long)(0x40002000 + 0x00000820) & 0x000FFFFF) << 5) |
             ((5) << 2)))) = 1;
  (*((volatile unsigned long *)(0x40002000 + 0x00000004))) = 0x00000001;
}


x86 assembly (clang, -O0):
<I2CSlaveEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x42050414,%eax
movq   $0x1,(%rax)
mov    $0x40002004,%eax
movq   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CSlaveEnable>:
movq   $0x1,0x42050414
movq   $0x1,0x40002004
ret

LLVM IR (-O0):
define void @I2CSlaveEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
store volatile i64 1, i64* inttoptr (i64 1107624980 to i64*)
store volatile i64 1, i64* inttoptr (i64 1073750020 to i64*)
ret void
}

LLVM IR (-O2):
define void @I2CSlaveEnable(i32 %0) {
store volatile i64 1, i64* inttoptr (i64 1107624980 to i64*)
store volatile i64 1, i64* inttoptr (i64 1073750020 to i64*)
ret void
}