xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ test_assert(int, char const *);
void test_assert_equal(int val1, int val2, const char *msg) {
  test_assert(val1 == val2, msg);
}


x86 assembly (clang, -O0):
<test_assert_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
mov    -0x10(%rbp),%rsi
call   1030 <test_assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_assert_equal>:
xor    %eax,%eax
cmp    %esi,%edi
sete   %al
mov    %eax,%edi
mov    %rdx,%rsi
jmp    1030 <test_assert@plt>

LLVM IR (-O0):
define void @test_assert_equal(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = icmp eq i32 %7, %8
%10 = zext i1 %9 to i32
%11 = load i8*, i8** %6
%12 = call i32 @test_assert(i32 %10, i8* %11)
ret void
}

LLVM IR (-O2):
define void @test_assert_equal(i32 %0, i32 %1, i8* %2) {
%4 = icmp eq i32 %0, %1
%5 = zext i1 %4 to i32
%6 = tail call i32 @test_assert(i32 %5, i8* %2)
ret void
}
/* Variables and functions */
int regmatchInsensitive(char *, char *);
int islog(char *string) { return regmatchInsensitive(string, "^log="); }


x86 assembly (clang, -O0):
<islog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <regmatchInsensitive@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<islog>:
lea    0xee9(%rip),%rsi
jmp    1030 <regmatchInsensitive@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"^log=\00"
define i32 @islog(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @regmatchInsensitive(i8* %3, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [6 x i8] c"^log=\00"
define i32 @islog(i8* %0) {
%2 = tail call i32 @regmatchInsensitive(i8* %0, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ SIGWINCH;
int /*<<< orphan*/ SIG_IGN;
int /*<<< orphan*/ apue_signal(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ sleep(int);
void test_winch() {
  apue_signal(SIGWINCH, SIG_IGN);
  sleep(5);
}


x86 assembly (clang, -O0):
<test_winch>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    0x2eac(%rip),%rax
mov    (%rax),%esi
call   1030 <apue_signal@plt>
mov    $0x5,%edi
call   1040 <sleep@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_winch>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
mov    0x2eaf(%rip),%rax
mov    (%rax),%esi
call   1030 <apue_signal@plt>
mov    $0x5,%edi
pop    %rax
jmp    1040 <sleep@plt>

LLVM IR (-O0):
@SIGWINCH = global i32 0
@SIG_IGN = global i32 0
define void @test_winch() {
%1 = load i32, i32* @SIGWINCH
%2 = load i32, i32* @SIG_IGN
%3 = call i32 @apue_signal(i32 %1, i32 %2)
%4 = call i32 @sleep(i32 5)
ret void
}

LLVM IR (-O2):
@SIGWINCH = global i32 0
@SIG_IGN = global i32 0
define void @test_winch() {
%1 = load i32, i32* @SIGWINCH
%2 = load i32, i32* @SIG_IGN
%3 = tail call i32 @apue_signal(i32 %1, i32 %2)
%4 = tail call i32 @sleep(i32 5)
ret void
}
long cachelineboundary(long addr) {
  if (addr & 63) {
    return addr + (64 - (addr & 63));
  } else
    return addr;
}


x86 assembly (clang, -O0):
<cachelineboundary>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x3f,%rax
cmp    $0x0,%rax
je     113a <cachelineboundary+0x3a>
mov    -0x10(%rbp),%rax
mov    -0x10(%rbp),%rdx
and    $0x3f,%rdx
mov    $0x40,%ecx
sub    %rdx,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
jmp    1142 <cachelineboundary+0x42>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cachelineboundary>:
mov    %edi,%ecx
and    $0x3f,%ecx
mov    $0x40,%eax
sub    %rcx,%rax
test   %rcx,%rcx
cmove  %rcx,%rax
add    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @cachelineboundary(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = and i64 %4, 63
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %1
%8 = load i64, i64* %3
%9 = load i64, i64* %3
%10 = and i64 %9, 63
%11 = sub nsw i64 64, %10
%12 = add nsw i64 %8, %11
store i64 %12, i64* %2
br label %15
13: ; preds = %1
%14 = load i64, i64* %3
store i64 %14, i64* %2
br label %15
15: ; preds = %13, %7
%16 = load i64, i64* %2
ret i64 %16
}

LLVM IR (-O2):
define i64 @cachelineboundary(i64 %0) {
%2 = and i64 %0, 63
%3 = icmp eq i64 %2, 0
%4 = sub nuw nsw i64 64, %2
%5 = select i1 %3, i64 0, i64 %4
%6 = add nsw i64 %5, %0
ret i64 %6
}
void strdown(char *s) {
  while (*s) {
    if (*s >= 65 && *s <= 90)
      *s += 32;
    s++;
  }
}


x86 assembly (clang, -O0):
<strdown>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1152 <strdown+0x52>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x41,%eax
jl     1141 <strdown+0x41>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x5a,%eax
jg     1141 <strdown+0x41>
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
add    $0x20,%ecx
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <strdown+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdown>:
mov    (%rdi),%al
test   %al,%al
je     112a <strdown+0x2a>
add    $0x1,%rdi
jmp    111b <strdown+0x1b>
nopl   0x0(%rax)
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
je     112a <strdown+0x2a>
lea    -0x41(%rax),%ecx
cmp    $0x19,%cl
ja     1110 <strdown+0x10>
add    $0x20,%al
mov    %al,-0x1(%rdi)
jmp    1110 <strdown+0x10>
ret

LLVM IR (-O0):
define void @strdown(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %23, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %26
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp sge i32 %10, 65
br i1 %11, label %12, label %23
12: ; preds = %7
%13 = load i8*, i8** %2
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp sle i32 %15, 90
br i1 %16, label %17, label %23
17: ; preds = %12
%18 = load i8*, i8** %2
%19 = load i8, i8* %18
%20 = sext i8 %19 to i32
%21 = add nsw i32 %20, 32
%22 = trunc i32 %21 to i8
store i8 %22, i8* %18
br label %23
23: ; preds = %17, %12, %7
%24 = load i8*, i8** %2
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %2
br label %3
26: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @strdown(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %11
%5 = phi i8 [ %13, %11 ], [ %2, %1 ]
%6 = phi i8* [ %12, %11 ], [ %0, %1 ]
%7 = add i8 %5, -65
%8 = icmp ult i8 %7, 26
br i1 %8, label %9, label %11
9: ; preds = %4
%10 = add nuw nsw i8 %5, 32
store i8 %10, i8* %6
br label %11
11: ; preds = %9, %4
%12 = getelementptr inbounds i8, i8* %6, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %11, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_230() {
  Assert_real((isqrt(230) == 15),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              1155, ("Integer square root of 230 should be 15"));
}


x86 assembly (clang, -O0):
<t_sqrt_230>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe6,%edi
call   1030 <isqrt@plt>
cmp    $0xf,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0x483,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_230>:
push   %rax
mov    $0xe6,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0xf,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0x483,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [40 x i8] c"Integer square root of 230 should be 15\00"
define void @t_sqrt_230() {
%1 = call i32 @isqrt(i32 230)
%2 = icmp eq i32 %1, 15
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1155, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [40 x i8] c"Integer square root of 230 should be 15\00"
define void @t_sqrt_230() {
%1 = tail call i32 @isqrt(i32 230)
%2 = icmp eq i32 %1, 15
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1155, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int init_pgtable() { return 0; }


x86 assembly (clang, -O0):
<init_pgtable>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_pgtable>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @init_pgtable() {
ret i32 0
}

LLVM IR (-O2):
define i32 @init_pgtable() {
ret i32 0
}
int get_salt_size(void) { return 21; }


x86 assembly (clang, -O0):
<get_salt_size>:
push   %rbp
mov    %rsp,%rbp
mov    $0x15,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_salt_size>:
mov    $0x15,%eax
ret

LLVM IR (-O0):
define i32 @get_salt_size() {
ret i32 21
}

LLVM IR (-O2):
define i32 @get_salt_size() {
ret i32 21
}
/* Variables and functions */
int /*<<< orphan*/ find(int);
void fuck(int size) {
  int i;
  for (i = 1; i <= size; i++)
    find(i);
}


x86 assembly (clang, -O0):
<fuck>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     1144 <fuck+0x34>
mov    -0x8(%rbp),%edi
call   1030 <find@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <fuck+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fuck>:
push   %r14
push   %rbx
push   %rax
test   %edi,%edi
jle    114a <fuck+0x3a>
mov    %edi,%r14d
neg    %r14d
mov    $0x1,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %ebx,%edi
call   1030 <find@plt>
lea    (%r14,%rbx,1),%eax
add    $0x1,%eax
mov    %ebx,%ecx
add    $0x1,%ecx
mov    %ecx,%ebx
cmp    $0x1,%eax
jne    1130 <fuck+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @fuck(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp sle i32 %5, %6
br i1 %7, label %8, label %14
8: ; preds = %4
%9 = load i32, i32* %3
%10 = call i32 @find(i32 %9)
br label %11
11: ; preds = %8
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @fuck(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %8, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 1, %1 ]
%5 = tail call i32 @find(i32 %4)
%6 = add nuw i32 %4, 1
%7 = icmp eq i32 %4, %0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ EVP_MD_CTX;

/* Variables and functions */
void rand_hw_seed(EVP_MD_CTX *ctx) { return; }


x86 assembly (clang, -O0):
<rand_hw_seed>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_hw_seed>:
ret

LLVM IR (-O0):
define void @rand_hw_seed(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @rand_hw_seed(i32* nocapture %0) {
ret void
}
/* Variables and functions */
int foo();
int bar() { return 1 + foo(); }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <foo@plt>
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
push   %rax
xor    %eax,%eax
call   1030 <foo@plt>
add    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @bar() {
%1 = call i32 (...) @foo()
%2 = add nsw i32 1, %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @bar() {
%1 = tail call i32 (...) @foo()
%2 = add nsw i32 %1, 1
ret i32 %2
}
unsigned long mdrv_sd_get_opptstatus(void) { return 0; }


x86 assembly (clang, -O0):
<mdrv_sd_get_opptstatus>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdrv_sd_get_opptstatus>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @mdrv_sd_get_opptstatus() {
ret i64 0
}

LLVM IR (-O2):
define i64 @mdrv_sd_get_opptstatus() {
ret i64 0
}
void point_char(char *ptr) { *(ptr + 1) = '2'; }


x86 assembly (clang, -O0):
<point_char>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x32,0x1(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<point_char>:
movb   $0x32,0x1(%rdi)
ret

LLVM IR (-O0):
define void @point_char(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 1
store i8 50, i8* %4
ret void
}

LLVM IR (-O2):
define void @point_char(i8* nocapture writeonly %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 1
store i8 50, i8* %2
ret void
}
/* Type definitions */
struct msg_queue {
  int dummy;
};

/* Variables and functions */
int itc_wr_msgqueue(int, struct msg_queue *, int, int /*<<< orphan*/);
int itc_readfrom(int src, struct msg_queue *q, int prio) {
  return itc_wr_msgqueue(src, q, prio, 0);
}


x86 assembly (clang, -O0):
<itc_readfrom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
xor    %ecx,%ecx
call   1030 <itc_wr_msgqueue@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<itc_readfrom>:
xor    %ecx,%ecx
jmp    1030 <itc_wr_msgqueue@plt>

LLVM IR (-O0):
%struct.msg_queue = type { i32 }
define i32 @itc_readfrom(i32 %0, %struct.msg_queue* %1, i32 %2) {
%4 = alloca i32
%5 = alloca %struct.msg_queue*
%6 = alloca i32
store i32 %0, i32* %4
store %struct.msg_queue* %1, %struct.msg_queue** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load %struct.msg_queue*, %struct.msg_queue** %5
%9 = load i32, i32* %6
%10 = call i32 @itc_wr_msgqueue(i32 %7, %struct.msg_queue* %8, i32 %9, i32 0)
ret i32 %10
}

LLVM IR (-O2):
%struct.msg_queue = type { i32 }
define i32 @itc_readfrom(i32 %0, %struct.msg_queue* %1, i32 %2) {
%4 = tail call i32 @itc_wr_msgqueue(i32 %0, %struct.msg_queue* %1, i32 %2, i32 0)
ret i32 %4
}
/* Variables and functions */
scalar_t__ coshf(float);
int /*<<< orphan*/ link_failure_coshf();
void test_coshf(float f) {
  if (coshf(f) != coshf(f))
    link_failure_coshf();
}


x86 assembly (clang, -O0):
<test_coshf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <coshf@plt>
mov    %rax,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <coshf@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
je     115c <test_coshf+0x3c>
mov    $0x0,%al
call   1040 <link_failure_coshf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_coshf>:
push   %rbx
sub    $0x10,%rsp
movss  %xmm0,0xc(%rsp)
call   1030 <coshf@plt>
mov    %rax,%rbx
movss  0xc(%rsp),%xmm0
call   1030 <coshf@plt>
cmp    %rax,%rbx
jne    1149 <test_coshf+0x29>
add    $0x10,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1040 <link_failure_coshf@plt>

LLVM IR (-O0):
define void @test_coshf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i64 @coshf(float %3)
%5 = load float, float* %2
%6 = call i64 @coshf(float %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_coshf()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_coshf(float %0) {
%2 = tail call i64 @coshf(float %0)
%3 = tail call i64 @coshf(float %0)
%4 = icmp eq i64 %2, %3
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @link_failure_coshf()
br label %7
7: ; preds = %5, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _M7_Handler(unsigned int, unsigned int, int /*<<< orphan*/,
                               int);
void Build_Mode7_Background(unsigned output_surface_offset, unsigned lines) {
  _M7_Handler(output_surface_offset, lines, 0, 256);
}


x86 assembly (clang, -O0):
<Build_Mode7_Background>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
xor    %edx,%edx
mov    $0x100,%ecx
call   1030 <_M7_Handler@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Build_Mode7_Background>:
xor    %edx,%edx
mov    $0x100,%ecx
jmp    1030 <_M7_Handler@plt>

LLVM IR (-O0):
define void @Build_Mode7_Background(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_M7_Handler(i32 %5, i32 %6, i32 0, i32 256)
ret void
}

LLVM IR (-O2):
define void @Build_Mode7_Background(i32 %0, i32 %1) {
%3 = tail call i32 @_M7_Handler(i32 %0, i32 %1, i32 0, i32 256)
ret void
}
long main() {
  long c;
  c = 'a';
  c = 5.3;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movq   $0x61,-0x10(%rbp)
movq   $0x5,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define i64 @main() {
%1 = alloca i64
%2 = alloca i64
store i64 97, i64* %2
store i64 5, i64* %2
%3 = load i64, i64* %1
ret i64 %3
}

LLVM IR (-O2):
define i64 @main() {
ret i64 undef
}
/* Variables and functions */
int /*<<< orphan*/ api_end();
void HariMain(void) {
  *((char *)0x00102600) = 0;
  api_end();
}


x86 assembly (clang, -O0):
<HariMain>:
push   %rbp
mov    %rsp,%rbp
mov    $0x102600,%eax
movb   $0x0,(%rax)
mov    $0x0,%al
call   1030 <api_end@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HariMain>:
movb   $0x0,0x102600
xor    %eax,%eax
jmp    1030 <api_end@plt>

LLVM IR (-O0):
define void @HariMain() {
store i8 0, i8* inttoptr (i64 1058304 to i8*)
%1 = call i32 (...) @api_end()
ret void
}

LLVM IR (-O2):
define void @HariMain() {
store i8 0, i8* inttoptr (i64 1058304 to i8*)
%1 = tail call i32 (...) @api_end()
ret void
}
int tfa98xx_top_i2c_remove(struct i2c_client *client) { return 0; }


x86 assembly (clang, -O0):
<tfa98xx_top_i2c_remove>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tfa98xx_top_i2c_remove>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.i2c_client = type opaque
define i32 @tfa98xx_top_i2c_remove(%struct.i2c_client* %0) {
%2 = alloca %struct.i2c_client*
store %struct.i2c_client* %0, %struct.i2c_client** %2
ret i32 0
}

LLVM IR (-O2):
%struct.i2c_client = type opaque
define i32 @tfa98xx_top_i2c_remove(%struct.i2c_client* nocapture readnone %0) {
ret i32 0
}
int is_ws_fragment(unsigned char flags) {
  return (flags & 0x80) == 0 || (flags & 0x0f) == 0;
}


x86 assembly (clang, -O0):
<is_ws_fragment>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%ecx
and    $0x80,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x2(%rbp)
je     1132 <is_ws_fragment+0x32>
movzbl -0x1(%rbp),%eax
and    $0xf,%eax
cmp    $0x0,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_ws_fragment>:
test   $0x80,%dil
sete   %al
test   $0xf,%dil
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_ws_fragment(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 128
%6 = icmp eq i32 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %1
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = and i32 %9, 15
%11 = icmp eq i32 %10, 0
br label %12
12: ; preds = %7, %1
%13 = phi i1 [ true, %1 ], [ %11, %7 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @is_ws_fragment(i8 zeroext %0) {
%2 = zext i8 %0 to i32
%3 = and i32 %2, 128
%4 = icmp eq i32 %3, 0
%5 = and i32 %2, 15
%6 = icmp eq i32 %5, 0
%7 = or i1 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
void mach_init_routine() {}


x86 assembly (clang, -O0):
<mach_init_routine>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mach_init_routine>:
ret

LLVM IR (-O0):
define void @mach_init_routine() {
ret void
}

LLVM IR (-O2):
define void @mach_init_routine() {
ret void
}
/* Variables and functions */
scalar_t__ HZ;
int /*<<< orphan*/ __delay(long long);
void __ndelay(unsigned long long nsecs, unsigned long lpj) {
  nsecs *= (((unsigned long long)HZ << 32) / 1000000000) * lpj;
  __delay((long long)nsecs >> 32);
}


x86 assembly (clang, -O0):
<__ndelay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb9(%rip),%rax
mov    (%rax),%rax
shl    $0x20,%rax
mov    $0x3b9aca00,%ecx
xor    %edx,%edx
div    %rcx
imul   -0x10(%rbp),%rax
imul   -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
sar    $0x20,%rdi
call   1030 <__delay@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ndelay>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%rax
shl    $0x20,%rax
shr    $0x9,%rax
movabs $0x44b82fa09b5a53,%rcx
mul    %rcx
shr    $0xb,%rdx
imul   %rsi,%rdi
imul   %rdx,%rdi
sar    $0x20,%rdi
jmp    1030 <__delay@plt>

LLVM IR (-O0):
@HZ = global i64 0
define void @__ndelay(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* @HZ
%6 = shl i64 %5, 32
%7 = udiv i64 %6, 1000000000
%8 = load i64, i64* %4
%9 = mul i64 %7, %8
%10 = load i64, i64* %3
%11 = mul i64 %10, %9
store i64 %11, i64* %3
%12 = load i64, i64* %3
%13 = ashr i64 %12, 32
%14 = call i32 @__delay(i64 %13)
ret void
}

LLVM IR (-O2):
@HZ = global i64 0
define void @__ndelay(i64 %0, i64 %1) {
%3 = load i64, i64* @HZ
%4 = shl i64 %3, 32
%5 = udiv i64 %4, 1000000000
%6 = mul i64 %1, %0
%7 = mul i64 %6, %5
%8 = ashr i64 %7, 32
%9 = tail call i32 @__delay(i64 %8)
ret void
}
int _mvd(int src2) { return src2; }


x86 assembly (clang, -O0):
<_mvd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mvd>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @_mvd(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @_mvd(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void die(const char *msg) {
  fprintf(stderr, "%s", msg);
  exit(1);
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<die>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [3 x i8] c"%s\00"
define void @die(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [3 x i8] c"%s\00"
define void @die(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ btree_infix_traversal(int /*<<< orphan*/);
int /*<<< orphan*/ exp_parser(char *);
int /*<<< orphan*/ ft_putchar(char);
int /*<<< orphan*/ ft_putnbr(int /*<<< orphan*/);
int main(int ac, char **av) {
  if (ac > 1) {
    ft_putnbr(btree_infix_traversal(exp_parser(av[1])));
    ft_putchar('\n');
  }
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    1185 <main+0x45>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1050 <exp_parser@plt>
mov    %eax,%edi
call   1030 <btree_infix_traversal@plt>
mov    %eax,%edi
call   1060 <ft_putnbr@plt>
mov    $0xa,%edi
call   1040 <ft_putchar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
cmp    $0x2,%edi
jl     116b <main+0x2b>
push   %rax
mov    0x8(%rsi),%rdi
call   1050 <exp_parser@plt>
mov    %eax,%edi
call   1030 <btree_infix_traversal@plt>
mov    %eax,%edi
call   1060 <ft_putnbr@plt>
mov    $0xa,%edi
call   1040 <ft_putchar@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 1
br i1 %7, label %8, label %16
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 1
%11 = load i8*, i8** %10
%12 = call i32 @exp_parser(i8* %11)
%13 = call i32 @btree_infix_traversal(i32 %12)
%14 = call i32 @ft_putnbr(i32 %13)
%15 = call i32 @ft_putchar(i8 signext 10)
br label %16
16: ; preds = %8, %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %11
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = tail call i32 @exp_parser(i8* %6)
%8 = tail call i32 @btree_infix_traversal(i32 %7)
%9 = tail call i32 @ft_putnbr(i32 %8)
%10 = tail call i32 @ft_putchar(i8 signext 10)
br label %11
11: ; preds = %4, %2
ret i32 0
}
int check_prime(int num) {
  int i;
  for (i = 2; i < num; i++) {
    if (num % i != 0)
      continue;
    else
      break;
  }
  i = i - 1;
  if (num % i != 0)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<check_prime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1142 <check_prime+0x42>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
je     112f <check_prime+0x2f>
jmp    1134 <check_prime+0x34>
jmp    1142 <check_prime+0x42>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <check_prime+0xe>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
je     1167 <check_prime+0x67>
movl   $0x1,-0x4(%rbp)
jmp    116e <check_prime+0x6e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_prime>:
mov    $0x2,%ecx
cmp    $0x3,%edi
jl     1122 <check_prime+0x22>
mov    $0x2,%ecx
nop
mov    %edi,%eax
cltd
idiv   %ecx
test   %edx,%edx
je     1122 <check_prime+0x22>
add    $0x1,%ecx
cmp    %ecx,%edi
jne    1110 <check_prime+0x10>
mov    %edi,%ecx
add    $0xffffffff,%ecx
mov    %edi,%eax
cltd
idiv   %ecx
xor    %eax,%eax
test   %edx,%edx
setne  %al
ret

LLVM IR (-O0):
define i32 @check_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 2, i32* %4
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %19
9: ; preds = %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = srem i32 %10, %11
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %9
br label %16
15: ; preds = %9
br label %19
16: ; preds = %14
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 1
store i32 %18, i32* %4
br label %5
19: ; preds = %15, %5
%20 = load i32, i32* %4
%21 = sub nsw i32 %20, 1
store i32 %21, i32* %4
%22 = load i32, i32* %3
%23 = load i32, i32* %4
%24 = srem i32 %22, %23
%25 = icmp ne i32 %24, 0
br i1 %25, label %26, label %27
26: ; preds = %19
store i32 1, i32* %2
br label %28
27: ; preds = %19
store i32 0, i32* %2
br label %28
28: ; preds = %27, %26
%29 = load i32, i32* %2
ret i32 %29
}

LLVM IR (-O2):
define i32 @check_prime(i32 %0) {
%2 = icmp sgt i32 %0, 2
br i1 %2, label %3, label %10
3: ; preds = %1, %7
%4 = phi i32 [ %8, %7 ], [ 2, %1 ]
%5 = srem i32 %0, %4
%6 = icmp eq i32 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %3
%8 = add nuw nsw i32 %4, 1
%9 = icmp eq i32 %8, %0
br i1 %9, label %10, label %3
10: ; preds = %7, %3, %1
%11 = phi i32 [ 2, %1 ], [ %4, %3 ], [ %0, %7 ]
%12 = add nsw i32 %11, -1
%13 = srem i32 %0, %12
%14 = icmp ne i32 %13, 0
%15 = zext i1 %14 to i32
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ arm_mrs_op();
int /*<<< orphan*/ arm_psr_to_reg(int /*<<< orphan*/);
void arm_mrs() { arm_psr_to_reg(arm_mrs_op()); }


x86 assembly (clang, -O0):
<arm_mrs>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <arm_mrs_op@plt>
mov    %eax,%edi
call   1030 <arm_psr_to_reg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm_mrs>:
push   %rax
xor    %eax,%eax
call   1040 <arm_mrs_op@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <arm_psr_to_reg@plt>

LLVM IR (-O0):
define void @arm_mrs() {
%1 = call i32 (...) @arm_mrs_op()
%2 = call i32 @arm_psr_to_reg(i32 %1)
ret void
}

LLVM IR (-O2):
define void @arm_mrs() {
%1 = tail call i32 (...) @arm_mrs_op()
%2 = tail call i32 @arm_psr_to_reg(i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
size_t fwrite(void const *, size_t, size_t, int /*<<< orphan*/ *);
size_t hwrite(const void *ptr, size_t size, size_t count, FILE *stream) {
  return fwrite(ptr, size, count, stream);
}


x86 assembly (clang, -O0):
<hwrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <fwrite@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hwrite>:
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
define i64 @hwrite(i8* %0, i64 %1, i64 %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i32*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i32* %3, i32** %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = load i64, i64* %7
%12 = load i32*, i32** %8
%13 = call i64 @fwrite(i8* %9, i64 %10, i64 %11, i32* %12)
ret i64 %13
}

LLVM IR (-O2):
define i64 @hwrite(i8* nocapture %0, i64 %1, i64 %2, i32* nocapture %3) {
%5 = tail call i64 @fwrite(i8* %0, i64 %1, i64 %2, i32* %3)
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void create_title(void) {
  printf("/*\n");
  printf(" * kernel/gitinfo.S\n");
  printf(" * Automatically generated by cgitinfo tool, don't edit\n");
  printf(" */\n");
  printf("\n");
}


x86 assembly (clang, -O0):
<create_title>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
lea    0xee6(%rip),%rdi
call   1030 <printf@plt>
lea    0xf13(%rip),%rdi
call   1030 <printf@plt>
lea    0xeb7(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_title>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <puts@plt>
lea    0xecf(%rip),%rdi
call   1040 <puts@plt>
lea    0xed7(%rip),%rdi
call   1040 <puts@plt>
lea    0xf03(%rip),%rdi
call   1040 <puts@plt>
mov    $0xa,%edi
pop    %rax
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"/*\0A\00"
@.str.1 = [21 x i8] c" * kernel/gitinfo.S\0A\00"
@.str.2 = [57 x i8] c" * Automatically generated by cgitinfo tool, don't edit\0A\00"
@.str.3 = [5 x i8] c" */\0A\00"
@.str.4 = [2 x i8] c"\0A\00"
define void @create_title() {
%1 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.3, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.4, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [3 x i8] c"/*\00"
@str.5 = [20 x i8] c" * kernel/gitinfo.S\00"
@str.6 = [56 x i8] c" * Automatically generated by cgitinfo tool, don't edit\00"
@str.7 = [4 x i8] c" */\00"
define void @create_title() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str.5, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([56 x i8], [56 x i8]* @str.6, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @str.7, i64 0, i64 0))
%5 = tail call i32 @putchar(i32 10)
ret void
}
int check_min(char *str) {
  if (*str == '-')
    return (-1);
  return (1);
}


x86 assembly (clang, -O0):
<check_min>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2d,%eax
jne    1124 <check_min+0x24>
movl   $0xffffffff,-0x4(%rbp)
jmp    112b <check_min+0x2b>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_min>:
xor    %eax,%eax
cmpb   $0x2d,(%rdi)
setne  %al
add    %eax,%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @check_min(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, 45
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 -1, i32* %2
br label %10
9: ; preds = %1
store i32 1, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @check_min(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 45
%4 = select i1 %3, i32 -1, i32 1
ret i32 %4
}
long _syscall2(long cnum, long a1, long a2) {
  register long ret __asm__("rax");
  register long r0 __asm__("rax") = cnum;
  register long r1 __asm__("rdi") = a1;
  register long r2 __asm__("rsi") = a2;
  __asm__ __volatile__("syscall"
                       : "=r"(ret)
                       : "r"(r0), "r"(r1), "r"(r2)
                       : "rcx", "r11", "memory");
  return ret;
}


x86 assembly (clang, -O0):
<_syscall2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x28(%rbp),%rax
mov    -0x30(%rbp),%rdi
mov    -0x38(%rbp),%rsi
syscall
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_syscall2>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rdx,%rsi
syscall
ret

LLVM IR (-O0):
define i64 @_syscall2(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%11 = load i64, i64* %4
store i64 %11, i64* %8
%12 = load i64, i64* %5
store i64 %12, i64* %9
%13 = load i64, i64* %6
store i64 %13, i64* %10
%14 = load i64, i64* %8
%15 = load i64, i64* %9
%16 = load i64, i64* %10
%17 = call i64 asm sideeffect "syscall", "={rax},{rax},{rdi},{rsi},~{rcx},~{r11},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %14, i64 %15, i64 %16)
store i64 %17, i64* %7
%18 = load i64, i64* %7
ret i64 %18
}

LLVM IR (-O2):
define i64 @_syscall2(i64 %0, i64 %1, i64 %2) {
%4 = tail call i64 asm sideeffect "syscall", "={rax},{rax},{rdi},{rsi},~{rcx},~{r11},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %0, i64 %1, i64 %2)
ret i64 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ MC_avg_y_mmx(int, int, int /*<<< orphan*/ *,
                                int /*<<< orphan*/ const *, int);
void MC_avg_y_16_mmx(uint8_t *dest, const uint8_t *ref, int stride,
                     int height) {
  MC_avg_y_mmx(16, height, dest, ref, stride);
}


x86 assembly (clang, -O0):
<MC_avg_y_16_mmx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x18(%rbp),%esi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%r8d
mov    $0x10,%edi
call   1030 <MC_avg_y_mmx@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MC_avg_y_16_mmx>:
mov    %edx,%r8d
mov    %rsi,%rax
mov    %rdi,%rdx
mov    $0x10,%edi
mov    %ecx,%esi
mov    %rax,%rcx
jmp    1030 <MC_avg_y_mmx@plt>

LLVM IR (-O0):
define void @MC_avg_y_16_mmx(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %8
%10 = load i32*, i32** %5
%11 = load i32*, i32** %6
%12 = load i32, i32* %7
%13 = call i32 @MC_avg_y_mmx(i32 16, i32 %9, i32* %10, i32* %11, i32 %12)
ret void
}

LLVM IR (-O2):
define void @MC_avg_y_16_mmx(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = tail call i32 @MC_avg_y_mmx(i32 16, i32 %3, i32* %0, i32* %1, i32 %2)
ret void
}
void sys_sleep(unsigned int dwMilliseconds) { return; }


x86 assembly (clang, -O0):
<sys_sleep>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_sleep>:
ret

LLVM IR (-O0):
define void @sys_sleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @sys_sleep(i32 %0) {
ret void
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t getGreen0(int32_t const rgb1) { return ((rgb1 & 65280) >> 8); }


x86 assembly (clang, -O0):
<getGreen0>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
sar    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getGreen0>:
mov    %edi,%eax
movzbl %ah,%eax
ret

LLVM IR (-O0):
define i32 @getGreen0(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 65280
%5 = ashr i32 %4, 8
ret i32 %5
}

LLVM IR (-O2):
define i32 @getGreen0(i32 %0) {
%2 = lshr i32 %0, 8
%3 = and i32 %2, 255
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ led_blink(int);
int /*<<< orphan*/ led_init();
int /*<<< orphan*/ mydelay();
void led_test() {
  led_init();
  while (1) {
    led_blink(1);
    mydelay();
    led_blink(0);
    mydelay();
  }
}


x86 assembly (clang, -O0):
<led_test>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <led_init@plt>
mov    $0x1,%edi
call   1030 <led_blink@plt>
mov    $0x0,%al
call   1050 <mydelay@plt>
xor    %edi,%edi
call   1030 <led_blink@plt>
mov    $0x0,%al
call   1050 <mydelay@plt>
jmp    113b <led_test+0xb>

x86 assembly (clang, -O2):
<led_test>:
push   %rax
xor    %eax,%eax
call   1040 <led_init@plt>
nopl   0x0(%rax,%rax,1)
mov    $0x1,%edi
call   1030 <led_blink@plt>
xor    %eax,%eax
call   1050 <mydelay@plt>
xor    %edi,%edi
call   1030 <led_blink@plt>
xor    %eax,%eax
call   1050 <mydelay@plt>
jmp    1140 <led_test+0x10>

LLVM IR (-O0):
define void @led_test() {
%1 = call i32 (...) @led_init()
br label %2
2: ; preds = %0, %2
%3 = call i32 @led_blink(i32 1)
%4 = call i32 (...) @mydelay()
%5 = call i32 @led_blink(i32 0)
%6 = call i32 (...) @mydelay()
br label %2
}

LLVM IR (-O2):
define void @led_test() {
%1 = tail call i32 (...) @led_init()
br label %2
2: ; preds = %0, %2
%3 = tail call i32 @led_blink(i32 1)
%4 = tail call i32 (...) @mydelay()
%5 = tail call i32 @led_blink(i32 0)
%6 = tail call i32 (...) @mydelay()
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ tremaux_exploring(int, int);
int /*<<< orphan*/ tremaux_solving(int, int);
int main() {
  int i = 0, j = 0;
  tremaux_exploring(i, j);
  tremaux_solving(7 - 1, 7 - 1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1040 <tremaux_exploring@plt>
mov    $0x6,%esi
mov    %esi,%edi
call   1030 <tremaux_solving@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
call   1040 <tremaux_exploring@plt>
mov    $0x6,%edi
mov    $0x6,%esi
call   1030 <tremaux_solving@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = call i32 @tremaux_exploring(i32 %4, i32 %5)
%7 = call i32 @tremaux_solving(i32 6, i32 6)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @tremaux_exploring(i32 0, i32 0)
%2 = tail call i32 @tremaux_solving(i32 6, i32 6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ wNotYet(char *);
void wBuiltinMkDir() { wNotYet("MkDir"); }


x86 assembly (clang, -O0):
<wBuiltinMkDir>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <wNotYet@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wBuiltinMkDir>:
lea    0xee9(%rip),%rdi
jmp    1030 <wNotYet@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"MkDir\00"
define void @wBuiltinMkDir() {
%1 = call i32 @wNotYet(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"MkDir\00"
define void @wBuiltinMkDir() {
%1 = tail call i32 @wNotYet(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
unsigned long long fix_bcd_digits(unsigned long long x) {
  unsigned long long add =
      ((x & 0x8888888888888888ULL) >> 2) |
      (((x & 0x4444444444444444ULL) >> 1) &
       ((x & 0x2222222222222222ULL) | ((x & 0x1111111111111111ULL) << 1)));
  add |= add >> 1;
  return x + add;
}


x86 assembly (clang, -O0):
<fix_bcd_digits>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movabs $0x8888888888888888,%rax
88 88 88
and    -0x8(%rbp),%rax
shr    $0x2,%rax
movabs $0x4444444444444444,%rcx
44 44 44
and    -0x8(%rbp),%rcx
shr    $0x1,%rcx
movabs $0x2222222222222222,%rdx
22 22 22
and    -0x8(%rbp),%rdx
movabs $0x1111111111111111,%rsi
11 11 11
and    -0x8(%rbp),%rsi
shl    $0x1,%rsi
or     %rsi,%rdx
and    %rdx,%rcx
or     %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x1,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fix_bcd_digits>:
mov    %rdi,%rax
shr    $0x2,%rax
mov    %rdi,%rcx
shr    %rcx
lea    (%rdi,%rdi,1),%rdx
or     %rdi,%rdx
and    %rcx,%rdx
or     %rax,%rdx
movabs $0x2222222222222222,%rax
22 22 22
and    %rdx,%rax
mov    %rax,%rcx
shr    %rcx
add    %rdi,%rax
add    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @fix_bcd_digits(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = and i64 %4, -8608480567731124088
%6 = lshr i64 %5, 2
%7 = load i64, i64* %2
%8 = and i64 %7, 4919131752989213764
%9 = lshr i64 %8, 1
%10 = load i64, i64* %2
%11 = and i64 %10, 2459565876494606882
%12 = load i64, i64* %2
%13 = and i64 %12, 1229782938247303441
%14 = shl i64 %13, 1
%15 = or i64 %11, %14
%16 = and i64 %9, %15
%17 = or i64 %6, %16
store i64 %17, i64* %3
%18 = load i64, i64* %3
%19 = lshr i64 %18, 1
%20 = load i64, i64* %3
%21 = or i64 %20, %19
store i64 %21, i64* %3
%22 = load i64, i64* %2
%23 = load i64, i64* %3
%24 = add i64 %22, %23
ret i64 %24
}

LLVM IR (-O2):
define i64 @fix_bcd_digits(i64 %0) {
%2 = lshr i64 %0, 2
%3 = and i64 %2, 2459565876494606882
%4 = lshr i64 %0, 1
%5 = shl i64 %0, 1
%6 = or i64 %5, %0
%7 = and i64 %4, 2459565876494606882
%8 = and i64 %7, %6
%9 = or i64 %8, %3
%10 = lshr exact i64 %9, 1
%11 = add i64 %9, %0
%12 = add i64 %11, %10
ret i64 %12
}
int pagesize(void) { return ((int)4096); }


x86 assembly (clang, -O0):
<pagesize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pagesize>:
mov    $0x1000,%eax
ret

LLVM IR (-O0):
define i32 @pagesize() {
ret i32 4096
}

LLVM IR (-O2):
define i32 @pagesize() {
ret i32 4096
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char const *);
void print_error(const char *s) {
  printf("%s\n", s);
  exit(1);
}


x86 assembly (clang, -O0):
<print_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<print_error>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @print_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @print_error(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ LC_CTYPE;
char *build_url(char *, char *);
int /*<<< orphan*/ free(char *);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ setlocale(int /*<<< orphan*/, char *);
int main(void) {
  setlocale(LC_CTYPE, "");
  char *url = build_url("gateway.lan", "/login_sid.lua");
  printf("%s\n", url);
  free(url);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2e92(%rip),%rax
mov    (%rax),%edi
lea    0xebf(%rip),%rsi
call   1060 <setlocale@plt>
lea    0xe95(%rip),%rdi
lea    0xe9a(%rip),%rsi
call   1050 <build_url@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xe95(%rip),%rdi
call   1040 <printf@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    0x2ea0(%rip),%rax
mov    (%rax),%edi
lea    0xecd(%rip),%rsi
call   1060 <setlocale@plt>
lea    0xea3(%rip),%rdi
lea    0xea8(%rip),%rsi
call   1050 <build_url@plt>
mov    %rax,%rbx
lea    0xea8(%rip),%rdi
mov    %rax,%rsi
call   1040 <printf@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@LC_CTYPE = global i32 0
@.str = [1 x i8] zeroinitializer
@.str.1 = [12 x i8] c"gateway.lan\00"
@.str.2 = [15 x i8] c"/login_sid.lua\00"
@.str.3 = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = load i32, i32* @LC_CTYPE
%4 = call i32 @setlocale(i32 %3, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%5 = call i8* @build_url(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.2, i64 0, i64 0))
store i8* %5, i8** %2
%6 = load i8*, i8** %2
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.3, i64 0, i64 0), i8* %6)
%8 = load i8*, i8** %2
%9 = call i32 @free(i8* %8)
ret i32 0
}

LLVM IR (-O2):
@LC_CTYPE = global i32 0
@.str = [1 x i8] zeroinitializer
@.str.1 = [12 x i8] c"gateway.lan\00"
@.str.2 = [15 x i8] c"/login_sid.lua\00"
@.str.3 = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = load i32, i32* @LC_CTYPE
%2 = tail call i32 @setlocale(i32 %1, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%3 = tail call i8* @build_url(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.3, i64 0, i64 0), i8* %3)
%5 = tail call i32 @free(i8* %3)
ret i32 0
}