const char *get_bfin_boot_mode(int bfin_boot) {
  switch (bfin_boot) {
  case 1:
    return "bypass";
  case 2:
    return "parallel flash";
  case 3:
    return "spi flash";
  case 4:
    return "spi slave";
  case 5:
    return "i2c flash";
  case 6:
    return "i2c slave";
  case 7:
    return "uart";
  case 8:
    return "idle";
  case 9:
    return "fifo";
  case 10:
    return "memory";
  case 11:
    return "16bit dma";
  case 12:
    return "8bit dma";
  case 13:
    return "nand flash";
  default:
    return "INVALID";
  }
}


x86 assembly (clang, -O0):
<get_bfin_boot_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x18(%rbp)
sub    $0xc,%eax
ja     1200 <get_bfin_boot_mode+0x100>
mov    -0x18(%rbp),%rax
lea    0xed9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
lea    0xefd(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    120b <get_bfin_boot_mode+0x10b>
lea    0xef4(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    120b <get_bfin_boot_mode+0x10b>
lea    0xef3(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    120b <get_bfin_boot_mode+0x10b>
lea    0xeed(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    120b <get_bfin_boot_mode+0x10b>
lea    0xee7(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    120b <get_bfin_boot_mode+0x10b>
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    120b <get_bfin_boot_mode+0x10b>
lea    0xedb(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    120b <get_bfin_boot_mode+0x10b>
lea    0xed0(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    120b <get_bfin_boot_mode+0x10b>
lea    0xec5(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    120b <get_bfin_boot_mode+0x10b>
lea    0xeba(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    120b <get_bfin_boot_mode+0x10b>
lea    0xeb1(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    120b <get_bfin_boot_mode+0x10b>
lea    0xeab(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    120b <get_bfin_boot_mode+0x10b>
lea    0xea4(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    120b <get_bfin_boot_mode+0x10b>
lea    0xe9f(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_bfin_boot_mode>:
add    $0xffffffff,%edi
cmp    $0xc,%edi
ja     111a <get_bfin_boot_mode+0x1a>
movslq %edi,%rax
lea    0xf6a(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
ret
lea    0xf51(%rip),%rax
ret

LLVM IR (-O0):
@.str = [7 x i8] c"bypass\00"
@.str.1 = [15 x i8] c"parallel flash\00"
@.str.2 = [10 x i8] c"spi flash\00"
@.str.3 = [10 x i8] c"spi slave\00"
@.str.4 = [10 x i8] c"i2c flash\00"
@.str.5 = [10 x i8] c"i2c slave\00"
@.str.6 = [5 x i8] c"uart\00"
@.str.7 = [5 x i8] c"idle\00"
@.str.8 = [5 x i8] c"fifo\00"
@.str.9 = [7 x i8] c"memory\00"
@.str.10 = [10 x i8] c"16bit dma\00"
@.str.11 = [9 x i8] c"8bit dma\00"
@.str.12 = [11 x i8] c"nand flash\00"
@.str.13 = [8 x i8] c"INVALID\00"
define i8* @get_bfin_boot_mode(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %18 [
i32 1, label %5
i32 2, label %6
i32 3, label %7
i32 4, label %8
i32 5, label %9
i32 6, label %10
i32 7, label %11
i32 8, label %12
i32 9, label %13
i32 10, label %14
i32 11, label %15
i32 12, label %16
i32 13, label %17
]
5: ; preds = %1
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8** %2
br label %19
6: ; preds = %1
store i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %19
7: ; preds = %1
store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0), i8** %2
br label %19
8: ; preds = %1
store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0), i8** %2
br label %19
9: ; preds = %1
store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.4, i64 0, i64 0), i8** %2
br label %19
10: ; preds = %1
store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.5, i64 0, i64 0), i8** %2
br label %19
11: ; preds = %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.6, i64 0, i64 0), i8** %2
br label %19
12: ; preds = %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.7, i64 0, i64 0), i8** %2
br label %19
13: ; preds = %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.8, i64 0, i64 0), i8** %2
br label %19
14: ; preds = %1
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.9, i64 0, i64 0), i8** %2
br label %19
15: ; preds = %1
store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.10, i64 0, i64 0), i8** %2
br label %19
16: ; preds = %1
store i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.11, i64 0, i64 0), i8** %2
br label %19
17: ; preds = %1
store i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.12, i64 0, i64 0), i8** %2
br label %19
18: ; preds = %1
store i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.13, i64 0, i64 0), i8** %2
br label %19
19: ; preds = %18, %17, %16, %15, %14, %13, %12, %11, %10, %9, %8, %7, %6, %5
%20 = load i8*, i8** %2
ret i8* %20
}

LLVM IR (-O2):
@.str = [7 x i8] c"bypass\00"
@.str.1 = [15 x i8] c"parallel flash\00"
@.str.2 = [10 x i8] c"spi flash\00"
@.str.3 = [10 x i8] c"spi slave\00"
@.str.4 = [10 x i8] c"i2c flash\00"
@.str.5 = [10 x i8] c"i2c slave\00"
@.str.6 = [5 x i8] c"uart\00"
@.str.7 = [5 x i8] c"idle\00"
@.str.8 = [5 x i8] c"fifo\00"
@.str.9 = [7 x i8] c"memory\00"
@.str.10 = [10 x i8] c"16bit dma\00"
@.str.11 = [9 x i8] c"8bit dma\00"
@.str.12 = [11 x i8] c"nand flash\00"
@.str.13 = [8 x i8] c"INVALID\00"
@reltable.get_bfin_boot_mode = [13 x i32] [i32 trunc (i64 sub (i64 ptrtoint ([7 x i8]* @.str to i64), i64 ptrtoint ([13 x i32]* @reltable.get_bfin_boot_mode to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([15 x i8]* @.str.1 to i64), i64 ptrtoint ([13 x i32]* @reltable.get_bfin_boot_mode to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([10 x i8]* @.str.2 to i64), i64 ptrtoint ([13 x i32]* @reltable.get_bfin_boot_mode to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([10 x i8]* @.str.3 to i64), i64 ptrtoint ([13 x i32]* @reltable.get_bfin_boot_mode to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([10 x i8]* @.str.4 to i64), i64 ptrtoint ([13 x i32]* @reltable.get_bfin_boot_mode to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([10 x i8]* @.str.5 to i64), i64 ptrtoint ([13 x i32]* @reltable.get_bfin_boot_mode to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([5 x i8]* @.str.6 to i64), i64 ptrtoint ([13 x i32]* @reltable.get_bfin_boot_mode to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([5 x i8]* @.str.7 to i64), i64 ptrtoint ([13 x i32]* @reltable.get_bfin_boot_mode to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([5 x i8]* @.str.8 to i64), i64 ptrtoint ([13 x i32]* @reltable.get_bfin_boot_mode to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([7 x i8]* @.str.9 to i64), i64 ptrtoint ([13 x i32]* @reltable.get_bfin_boot_mode to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([10 x i8]* @.str.10 to i64), i64 ptrtoint ([13 x i32]* @reltable.get_bfin_boot_mode to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([9 x i8]* @.str.11 to i64), i64 ptrtoint ([13 x i32]* @reltable.get_bfin_boot_mode to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([11 x i8]* @.str.12 to i64), i64 ptrtoint ([13 x i32]* @reltable.get_bfin_boot_mode to i64)) to i32)]
define i8* @get_bfin_boot_mode(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 13
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = shl i64 %5, 2
%7 = call i8* @llvm.load.relative.i64(i8* bitcast ([13 x i32]* @reltable.get_bfin_boot_mode to i8*), i64 %6)
br label %8
8: ; preds = %1, %4
%9 = phi i8* [ %7, %4 ], [ getelementptr inbounds ([8 x i8], [8 x i8]* @.str.13, i64 0, i64 0), %1 ]
ret i8* %9
}