int slow_clock() {
  int slow_chks = 0;
  long old_pres;
  int i;
  old_pres =
      *(volatile unsigned long *)((void *)0xfffffc00 + 0x30) & (((7) & 7) << 2);
  *(volatile unsigned long *)((void *)0xfffffc00 + 0x30) = 0x00 | old_pres;
  for (i = 1000; i--;) {
  }
  *(volatile unsigned long *)((void *)0xfffffc00 + 0x30) =
      0x00 | (((0) & 7) << 2);
  while ((*(volatile unsigned long *)((void *)0xfffffc00 + 0x68) & 0x08) == 0) {
    if (slow_chks++ > 1000)
      break;
  }
  {
    int i;
    for (i = (1) * 6; i--;) {
    }
  };
  return (slow_chks);
}


x86 assembly (clang, -O0):
<slow_clock>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0xfffffc00,%eax
mov    0x30(%rax),%rax
and    $0x1c,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
or     $0x0,%rcx
mov    $0xfffffc00,%eax
mov    %rcx,0x30(%rax)
movl   $0x3e8,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x14(%rbp)
cmp    $0x0,%eax
je     114d <slow_clock+0x4d>
jmp    1134 <slow_clock+0x34>
mov    $0xfffffc00,%eax
movq   $0x0,0x30(%rax)
mov    $0xfffffc00,%eax
mov    0x68(%rax),%rax
and    $0x8,%rax
cmp    $0x0,%rax
jne    1191 <slow_clock+0x91>
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x3e8,%eax
jle    118c <slow_clock+0x8c>
jmp    1191 <slow_clock+0x91>
jmp    115a <slow_clock+0x5a>
movl   $0x6,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x18(%rbp)
cmp    $0x0,%eax
je     11b1 <slow_clock+0xb1>
jmp    1198 <slow_clock+0x98>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<slow_clock>:
mov    $0xfffffc30,%ecx
andq   $0x1c,(%rcx)
movq   $0x0,(%rcx)
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
testq  $0x8,0x38(%rcx)
jne    1151 <slow_clock+0x51>
testq  $0x8,0x38(%rcx)
jne    114e <slow_clock+0x4e>
testq  $0x8,0x38(%rcx)
jne    1152 <slow_clock+0x52>
add    $0x3,%eax
cmp    $0x3ea,%eax
jne    1120 <slow_clock+0x20>
mov    $0x3ea,%eax
ret
add    $0x1,%eax
ret
add    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @slow_clock() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = load volatile i64, i64* bitcast (i8* getelementptr (i8, i8* inttoptr (i64 4294966272 to i8*), i64 48) to i64*)
%6 = and i64 %5, 28
store i64 %6, i64* %2
%7 = load i64, i64* %2
%8 = or i64 0, %7
store volatile i64 %8, i64* bitcast (i8* getelementptr (i8, i8* inttoptr (i64 4294966272 to i8*), i64 48) to i64*)
store i32 1000, i32* %3
br label %9
9: ; preds = %13, %0
%10 = load i32, i32* %3
%11 = add nsw i32 %10, -1
store i32 %11, i32* %3
%12 = icmp ne i32 %10, 0
br i1 %12, label %13, label %14
13: ; preds = %9
br label %9
14: ; preds = %9
store volatile i64 0, i64* bitcast (i8* getelementptr (i8, i8* inttoptr (i64 4294966272 to i8*), i64 48) to i64*)
br label %15
15: ; preds = %24, %14
%16 = load volatile i64, i64* bitcast (i8* getelementptr (i8, i8* inttoptr (i64 4294966272 to i8*), i64 104) to i64*)
%17 = and i64 %16, 8
%18 = icmp eq i64 %17, 0
br i1 %18, label %19, label %25
19: ; preds = %15
%20 = load i32, i32* %1
%21 = add nsw i32 %20, 1
store i32 %21, i32* %1
%22 = icmp sgt i32 %20, 1000
br i1 %22, label %23, label %24
23: ; preds = %19
br label %25
24: ; preds = %19
br label %15
25: ; preds = %23, %15
store i32 6, i32* %4
br label %26
26: ; preds = %30, %25
%27 = load i32, i32* %4
%28 = add nsw i32 %27, -1
store i32 %28, i32* %4
%29 = icmp ne i32 %27, 0
br i1 %29, label %30, label %31
30: ; preds = %26
br label %26
31: ; preds = %26
%32 = load i32, i32* %1
ret i32 %32
}

LLVM IR (-O2):
define i32 @slow_clock() {
%1 = load volatile i64, i64* inttoptr (i64 4294966320 to i64*)
%2 = and i64 %1, 28
store volatile i64 %2, i64* inttoptr (i64 4294966320 to i64*)
store volatile i64 0, i64* inttoptr (i64 4294966320 to i64*)
br label %3
3: ; preds = %16, %0
%4 = phi i32 [ 0, %0 ], [ %17, %16 ]
%5 = load volatile i64, i64* inttoptr (i64 4294966376 to i64*)
%6 = and i64 %5, 8
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %23
8: ; preds = %3
%9 = load volatile i64, i64* inttoptr (i64 4294966376 to i64*)
%10 = and i64 %9, 8
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %21
12: ; preds = %8
%13 = load volatile i64, i64* inttoptr (i64 4294966376 to i64*)
%14 = and i64 %13, 8
%15 = icmp eq i64 %14, 0
br i1 %15, label %16, label %19
16: ; preds = %12
%17 = add nuw nsw i32 %4, 3
%18 = icmp eq i32 %17, 1002
br i1 %18, label %23, label %3
19: ; preds = %12
%20 = add nuw nsw i32 %4, 2
br label %23
21: ; preds = %8
%22 = add nuw nsw i32 %4, 1
br label %23
23: ; preds = %3, %16, %21, %19
%24 = phi i32 [ %20, %19 ], [ %22, %21 ], [ 1002, %16 ], [ %4, %3 ]
ret i32 %24
}