xunge/DecIR huggingface dataset:
void UARTDMADisable(unsigned long ulBase, unsigned long ulDMAFlags) {

  ;

  ;
  (*((volatile unsigned long *)(ulBase + 0x00000014))) &= ~ulDMAFlags;
}


x86 assembly (clang, -O0):
<UARTDMADisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
xor    $0xffffffffffffffff,%rdx
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x14(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTDMADisable>:
not    %rsi
and    %rsi,0x14(%rdi)
ret

LLVM IR (-O0):
define void @UARTDMADisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = xor i64 %5, -1
%7 = load i64, i64* %3
%8 = add i64 %7, 20
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = and i64 %10, %6
store volatile i64 %11, i64* %9
ret void
}

LLVM IR (-O2):
define void @UARTDMADisable(i64 %0, i64 %1) {
%3 = xor i64 %1, -1
%4 = add i64 %0, 20
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, %3
store volatile i64 %7, i64* %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ MD5_digest(unsigned char *, unsigned int);
char *MD5_tohex(int /*<<< orphan*/);
char *MD5_hash(unsigned char *str, unsigned int len) {
  return (MD5_tohex(MD5_digest(str, len)));
}


x86 assembly (clang, -O0):
<MD5_hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <MD5_digest@plt>
mov    %eax,%edi
call   1040 <MD5_tohex@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MD5_hash>:
push   %rax
call   1030 <MD5_digest@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <MD5_tohex@plt>

LLVM IR (-O0):
define i8* @MD5_hash(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @MD5_digest(i8* %5, i32 %6)
%8 = call i8* @MD5_tohex(i32 %7)
ret i8* %8
}

LLVM IR (-O2):
define i8* @MD5_hash(i8* %0, i32 %1) {
%3 = tail call i32 @MD5_digest(i8* %0, i32 %1)
%4 = tail call i8* @MD5_tohex(i32 %3)
ret i8* %4
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ *malloc(uintptr_t);
int32_t *mallocInt(uintptr_t numInts) {
  int32_t *temp = NULL;
  temp = malloc(numInts * sizeof(int32_t));
  return temp;
}


x86 assembly (clang, -O0):
<mallocInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
shl    $0x2,%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mallocInt>:
shl    $0x2,%rdi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i32* @mallocInt(i64 %0) {
%2 = alloca i64
%3 = alloca i32*
store i64 %0, i64* %2
store i32* null, i32** %3
%4 = load i64, i64* %2
%5 = mul i64 %4, 4
%6 = call i32* @malloc(i64 %5)
store i32* %6, i32** %3
%7 = load i32*, i32** %3
ret i32* %7
}

LLVM IR (-O2):
define noalias i32* @mallocInt(i64 %0) {
%2 = shl i64 %0, 2
%3 = tail call i32* @malloc(i64 %2)
ret i32* %3
}
void rockchip_suspend_init(void) {}


x86 assembly (clang, -O0):
<rockchip_suspend_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rockchip_suspend_init>:
ret

LLVM IR (-O0):
define void @rockchip_suspend_init() {
ret void
}

LLVM IR (-O2):
define void @rockchip_suspend_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fusione();
int main() {
  fusione();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <fusione@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <fusione@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @fusione()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @fusione()
ret i32 0
}
RX0AX1(r0, r1, x0, x1, p0, p1) signed char r0, r1;
signed char *p0, *p1;
{
  if ((p0[x0]) <= (((signed char *)11111111)[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<RX0AX1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %dil,%sil
mov    %sil,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
movslq -0x10(%rbp),%rdx
mov    $0xa98ac7,%ecx
movsbl (%rcx,%rdx,1),%ecx
cmp    %ecx,%eax
jg     114b <RX0AX1+0x4b>
movl   $0x1,-0x4(%rbp)
jmp    1152 <RX0AX1+0x52>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RX0AX1>:
movslq %edx,%rax
mov    (%r8,%rax,1),%dl
movslq %ecx,%rcx
xor    %eax,%eax
cmp    0xa98ac7(%rcx),%dl
setle  %al
ret

LLVM IR (-O0):
define i32 @RX0AX1(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4, i8* %5) {
%7 = alloca i32
%8 = alloca i8
%9 = alloca i8
%10 = alloca i32
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i8*
%14 = trunc i32 %0 to i8
%15 = trunc i32 %1 to i8
store i8 %14, i8* %8
store i8 %15, i8* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i8* %4, i8** %12
store i8* %5, i8** %13
%16 = load i8*, i8** %12
%17 = load i32, i32* %10
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = load i32, i32* %11
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* inttoptr (i64 11111111 to i8*), i64 %23
%25 = load i8, i8* %24
%26 = sext i8 %25 to i32
%27 = icmp sle i32 %21, %26
br i1 %27, label %28, label %29
28: ; preds = %6
store i32 1, i32* %7
br label %30
29: ; preds = %6
store i32 0, i32* %7
br label %30
30: ; preds = %29, %28
%31 = load i32, i32* %7
ret i32 %31
}

LLVM IR (-O2):
define i32 @RX0AX1(i32 %0, i32 %1, i32 %2, i32 %3, i8* nocapture %4, i8* nocapture readnone %5) {
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i8, i8* %4, i64 %7
%9 = load i8, i8* %8
%10 = sext i32 %3 to i64
%11 = getelementptr inbounds i8, i8* inttoptr (i64 11111111 to i8*), i64 %10
%12 = load i8, i8* %11
%13 = icmp sle i8 %9, %12
%14 = zext i1 %13 to i32
ret i32 %14
}
int make_8023_client(void) { return 1; }


x86 assembly (clang, -O0):
<make_8023_client>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_8023_client>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @make_8023_client() {
ret i32 1
}

LLVM IR (-O2):
define i32 @make_8023_client() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
void check_cell(int cell) { assert(cell >= 0 && cell < 64000000); }


x86 assembly (clang, -O0):
<check_cell>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1137 <check_cell+0x27>
cmpl   $0x3d09000,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_cell>:
xor    %eax,%eax
cmp    $0x3d09000,%edi
setb   %al
mov    %eax,%edi
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @check_cell(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 64000000
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = call i32 @assert(i32 %10)
ret void
}

LLVM IR (-O2):
define void @check_cell(i32 %0) {
%2 = icmp ult i32 %0, 64000000
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
ret void
}
/* Variables and functions */
int isspace(char c) { return (c == 32) || (c >= 9 && c <= 13); }


x86 assembly (clang, -O0):
<isspace>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x2(%rbp)
je     1141 <isspace+0x41>
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x9,%ecx
mov    %al,-0x3(%rbp)
jl     113b <isspace+0x3b>
movsbl -0x1(%rbp),%eax
cmp    $0xd,%eax
setle  %al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isspace>:
cmp    $0x20,%dil
sete   %al
add    $0xf7,%dil
cmp    $0x5,%dil
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @isspace(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 32
br i1 %5, label %16, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sge i32 %8, 9
br i1 %9, label %10, label %14
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp sle i32 %12, 13
br label %14
14: ; preds = %10, %6
%15 = phi i1 [ false, %6 ], [ %13, %10 ]
br label %16
16: ; preds = %14, %1
%17 = phi i1 [ true, %1 ], [ %15, %14 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @isspace(i8 signext %0) {
%2 = icmp eq i8 %0, 32
%3 = add i8 %0, -9
%4 = icmp ult i8 %3, 5
%5 = or i1 %2, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ __rcu_read_lock_bh();
__attribute__((always_)) void rcu_read_lock_bh(void) {
  __rcu_read_lock_bh();
  (void)0;
  do {
  } while (0);
}


x86 assembly (clang, -O0):
<rcu_read_lock_bh>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__rcu_read_lock_bh@plt>
jmp    1120 <rcu_read_lock_bh+0x10>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcu_read_lock_bh>:
xor    %eax,%eax
jmp    1030 <__rcu_read_lock_bh@plt>

LLVM IR (-O0):
define void @rcu_read_lock_bh() {
%1 = call i32 (...) @__rcu_read_lock_bh()
br label %2
2: ; preds = %0
br label %3
3: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @rcu_read_lock_bh() {
%1 = tail call i32 (...) @__rcu_read_lock_bh()
ret void
}
float int_to_float(int i) {
  union {
    int i;
    float f;
  } u;
  u.i = i;
  return u.f;
}


x86 assembly (clang, -O0):
<int_to_float>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_to_float>:
movd   %edi,%xmm0
ret

LLVM IR (-O0):
%union.anon = type { i32 }
define float @int_to_float(i32 %0) {
%2 = alloca i32
%3 = alloca %union.anon
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = bitcast %union.anon* %3 to i32*
store i32 %4, i32* %5
%6 = bitcast %union.anon* %3 to float*
%7 = load float, float* %6
ret float %7
}

LLVM IR (-O2):
define float @int_to_float(i32 %0) {
%2 = bitcast i32 %0 to float
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void func() { printf("Hey, I'm foo!\n"); }


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"Hey, I'm foo!\0A\00"
define void @func() {
%1 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [14 x i8] c"Hey, I'm foo!\00"
define void @func() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ exit_handler();
void sig_hanlder(int sig) {
  exit_handler();
  exit(1);
}


x86 assembly (clang, -O0):
<sig_hanlder>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <exit_handler@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<sig_hanlder>:
push   %rax
xor    %eax,%eax
call   1030 <exit_handler@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @sig_hanlder(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @exit_handler()
%4 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @sig_hanlder(i32 %0) {
%2 = tail call i32 (...) @exit_handler()
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
struct list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ list_append_(struct list *, int /*<<< orphan*/);
int /*<<< orphan*/ object_copy(void const *);
void list_append(struct list *list, const void *obj) {
  list_append_(list, object_copy(obj));
}


x86 assembly (clang, -O0):
<list_append>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <object_copy@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
call   1030 <list_append_@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_append>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1040 <object_copy@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1030 <list_append_@plt>

LLVM IR (-O0):
%struct.list = type { i32 }
define void @list_append(%struct.list* %0, i8* %1) {
%3 = alloca %struct.list*
%4 = alloca i8*
store %struct.list* %0, %struct.list** %3
store i8* %1, i8** %4
%5 = load %struct.list*, %struct.list** %3
%6 = load i8*, i8** %4
%7 = call i32 @object_copy(i8* %6)
%8 = call i32 @list_append_(%struct.list* %5, i32 %7)
ret void
}

LLVM IR (-O2):
%struct.list = type { i32 }
define void @list_append(%struct.list* %0, i8* %1) {
%3 = tail call i32 @object_copy(i8* %1)
%4 = tail call i32 @list_append_(%struct.list* %0, i32 %3)
ret void
}
int kdb_printf(const char *fmt, ...) { return 0; }


x86 assembly (clang, -O0):
<kdb_printf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kdb_printf>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @kdb_printf(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @kdb_printf(i8* nocapture readnone %0, ...) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ check_byte_array(unsigned char *, unsigned int,
                                    int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ get_idiv_ops();
int /*<<< orphan*/ get_idiv_ops_len();
int /*<<< orphan*/ output_divide(unsigned char *, int, unsigned int *);
void test_output_divide() {
  unsigned char buffer[128];
  unsigned int bytes_written = 0;
  output_divide(buffer, 128, &bytes_written);
  check_byte_array(buffer, bytes_written, get_idiv_ops(), get_idiv_ops_len());
}


x86 assembly (clang, -O0):
<test_output_divide>:
push   %rbp
mov    %rsp,%rbp
sub    $0xa0,%rsp
movl   $0x0,-0x84(%rbp)
lea    -0x80(%rbp),%rdi
mov    $0x80,%esi
lea    -0x84(%rbp),%rdx
call   1030 <output_divide@plt>
lea    -0x80(%rbp),%rax
mov    %rax,-0x98(%rbp)
mov    -0x84(%rbp),%eax
mov    %eax,-0x8c(%rbp)
mov    $0x0,%al
call   1060 <get_idiv_ops@plt>
mov    %eax,-0x88(%rbp)
mov    $0x0,%al
call   1040 <get_idiv_ops_len@plt>
mov    -0x98(%rbp),%rdi
mov    -0x8c(%rbp),%esi
mov    -0x88(%rbp),%edx
mov    %eax,%ecx
call   1050 <check_byte_array@plt>
add    $0xa0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_output_divide>:
push   %rbp
push   %r14
push   %rbx
sub    $0x90,%rsp
movl   $0x0,0xc(%rsp)
lea    0x10(%rsp),%r14
lea    0xc(%rsp),%rdx
mov    %r14,%rdi
mov    $0x80,%esi
call   1030 <output_divide@plt>
mov    0xc(%rsp),%ebp
xor    %eax,%eax
call   1060 <get_idiv_ops@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <get_idiv_ops_len@plt>
mov    %r14,%rdi
mov    %ebp,%esi
mov    %ebx,%edx
mov    %eax,%ecx
call   1050 <check_byte_array@plt>
add    $0x90,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @test_output_divide() {
%1 = alloca [128 x i8]
%2 = alloca i32
store i32 0, i32* %2
%3 = getelementptr inbounds [128 x i8], [128 x i8]* %1, i64 0, i64 0
%4 = call i32 @output_divide(i8* %3, i32 128, i32* %2)
%5 = getelementptr inbounds [128 x i8], [128 x i8]* %1, i64 0, i64 0
%6 = load i32, i32* %2
%7 = call i32 (...) @get_idiv_ops()
%8 = call i32 (...) @get_idiv_ops_len()
%9 = call i32 @check_byte_array(i8* %5, i32 %6, i32 %7, i32 %8)
ret void
}

LLVM IR (-O2):
define void @test_output_divide() {
%1 = alloca [128 x i8]
%2 = alloca i32
%3 = getelementptr inbounds [128 x i8], [128 x i8]* %1, i64 0, i64 0
%4 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%5 = call i32 @output_divide(i8* %3, i32 128, i32* %2)
%6 = load i32, i32* %2
%7 = call i32 (...) @get_idiv_ops()
%8 = call i32 (...) @get_idiv_ops_len()
%9 = call i32 @check_byte_array(i8* %3, i32 %6, i32 %7, i32 %8)
ret void
}
/* Variables and functions */
scalar_t__ full_map(int, int);
int same_island(int x1, int y1, int x2, int y2) {
  return (full_map(x1, y1) == full_map(x2, y2));
}


x86 assembly (clang, -O0):
<same_island>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <full_map@plt>
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1030 <full_map@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<same_island>:
push   %rbp
push   %r14
push   %rbx
mov    %ecx,%r14d
mov    %edx,%ebp
call   1030 <full_map@plt>
mov    %rax,%rbx
mov    %ebp,%edi
mov    %r14d,%esi
call   1030 <full_map@plt>
xor    %ecx,%ecx
cmp    %rax,%rbx
sete   %cl
mov    %ecx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @same_island(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i64 @full_map(i32 %9, i32 %10)
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = call i64 @full_map(i32 %12, i32 %13)
%15 = icmp eq i64 %11, %14
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @same_island(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i64 @full_map(i32 %0, i32 %1)
%6 = tail call i64 @full_map(i32 %2, i32 %3)
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
void simtec_memory_setup_defaults() {}


x86 assembly (clang, -O0):
<simtec_memory_setup_defaults>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<simtec_memory_setup_defaults>:
ret

LLVM IR (-O0):
define void @simtec_memory_setup_defaults() {
ret void
}

LLVM IR (-O2):
define void @simtec_memory_setup_defaults() {
ret void
}
/* Type definitions */
struct webidl_node {
  int dummy;
};
struct genbind_node {
  int dummy;
};

/* Variables and functions */
char *genbind_node_gettext(struct genbind_node *);
int webidl_parsefile(char *, struct webidl_node **);
int webidl_file_cb(struct genbind_node *node, void *ctx) {
  struct webidl_node **webidl_ast = ctx;
  char *filename;
  filename = genbind_node_gettext(node);
  return webidl_parsefile(filename, webidl_ast);
}


x86 assembly (clang, -O0):
<webidl_file_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <genbind_node_gettext@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <webidl_parsefile@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<webidl_file_cb>:
push   %rbx
mov    %rsi,%rbx
call   1040 <genbind_node_gettext@plt>
mov    %rax,%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <webidl_parsefile@plt>

LLVM IR (-O0):
%struct.genbind_node = type { i32 }
%struct.webidl_node = type { i32 }
define i32 @webidl_file_cb(%struct.genbind_node* %0, i8* %1) {
%3 = alloca %struct.genbind_node*
%4 = alloca i8*
%5 = alloca %struct.webidl_node**
%6 = alloca i8*
store %struct.genbind_node* %0, %struct.genbind_node** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %4
%8 = bitcast i8* %7 to %struct.webidl_node**
store %struct.webidl_node** %8, %struct.webidl_node*** %5
%9 = load %struct.genbind_node*, %struct.genbind_node** %3
%10 = call i8* @genbind_node_gettext(%struct.genbind_node* %9)
store i8* %10, i8** %6
%11 = load i8*, i8** %6
%12 = load %struct.webidl_node**, %struct.webidl_node*** %5
%13 = call i32 @webidl_parsefile(i8* %11, %struct.webidl_node** %12)
ret i32 %13
}

LLVM IR (-O2):
%struct.genbind_node = type { i32 }
%struct.webidl_node = type { i32 }
define i32 @webidl_file_cb(%struct.genbind_node* %0, i8* %1) {
%3 = bitcast i8* %1 to %struct.webidl_node**
%4 = tail call i8* @genbind_node_gettext(%struct.genbind_node* %0)
%5 = tail call i32 @webidl_parsefile(i8* %4, %struct.webidl_node** %3)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ htonl(unsigned int);
int /*<<< orphan*/ htons(unsigned int);
int /*<<< orphan*/ putbuf2(int /*<<< orphan*/);
int /*<<< orphan*/ putbuf4(int /*<<< orphan*/);
void putbufas(unsigned int i, int asn32) {
  if (asn32)
    putbuf4(htonl(i));
  else
    putbuf2(htons(i));
}


x86 assembly (clang, -O0):
<putbufas>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     116c <putbufas+0x2c>
mov    -0x4(%rbp),%edi
call   1040 <htonl@plt>
mov    %eax,%edi
call   1060 <putbuf4@plt>
jmp    117b <putbufas+0x3b>
mov    -0x4(%rbp),%edi
call   1030 <htons@plt>
mov    %eax,%edi
call   1050 <putbuf2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putbufas>:
push   %rax
test   %esi,%esi
je     1152 <putbufas+0x12>
call   1040 <htonl@plt>
mov    %eax,%edi
pop    %rax
jmp    1060 <putbuf4@plt>
call   1030 <htons@plt>
mov    %eax,%edi
pop    %rax
jmp    1050 <putbuf2@plt>

LLVM IR (-O0):
define void @putbufas(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i32, i32* %3
%9 = call i32 @htonl(i32 %8)
%10 = call i32 @putbuf4(i32 %9)
br label %15
11: ; preds = %2
%12 = load i32, i32* %3
%13 = call i32 @htons(i32 %12)
%14 = call i32 @putbuf2(i32 %13)
br label %15
15: ; preds = %11, %7
ret void
}

LLVM IR (-O2):
define void @putbufas(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = tail call i32 @htonl(i32 %0)
%6 = tail call i32 @putbuf4(i32 %5)
br label %10
7: ; preds = %2
%8 = tail call i32 @htons(i32 %0)
%9 = tail call i32 @putbuf2(i32 %8)
br label %10
10: ; preds = %7, %4
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ bcopy(int /*<<< orphan*/ *, char *, size_t);
char *malloc(size_t);
char *cstring_from_buf(uint8_t *buf, size_t len) {
  char *val = malloc(len + 1);
  bcopy(buf, val, len);
  val[len] = '\0';
  return (val);
}


x86 assembly (clang, -O0):
<cstring_from_buf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
add    $0x1,%rdi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1040 <bcopy@plt>
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cstring_from_buf>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
lea    0x1(%rsi),%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1030 <memcpy@plt>
movb   $0x0,(%rbx,%r15,1)
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @cstring_from_buf(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = alloca i8*
store i32* %0, i32** %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = add i64 %6, 1
%8 = call i8* @malloc(i64 %7)
store i8* %8, i8** %5
%9 = load i32*, i32** %3
%10 = load i8*, i8** %5
%11 = load i64, i64* %4
%12 = call i32 @bcopy(i32* %9, i8* %10, i64 %11)
%13 = load i8*, i8** %5
%14 = load i64, i64* %4
%15 = getelementptr inbounds i8, i8* %13, i64 %14
store i8 0, i8* %15
%16 = load i8*, i8** %5
ret i8* %16
}

LLVM IR (-O2):
define noalias i8* @cstring_from_buf(i32* nocapture %0, i64 %1) {
%3 = add i64 %1, 1
%4 = tail call i8* @malloc(i64 %3)
%5 = bitcast i32* %0 to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %4, i8* align 1 %5, i64 %1, i1 false)
%6 = getelementptr inbounds i8, i8* %4, i64 %1
store i8 0, i8* %6
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
int _usage(void) {
  fputs("Usage: "
        "link"
        " file1 file2\n",
        stderr);
  return 1;
}


x86 assembly (clang, -O0):
<_usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <fputs@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_usage>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
lea    0xedf(%rip),%rdi
call   1030 <fputs@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"Usage: link file1 file2\0A\00"
@stderr = global i32 0
define i32 @_usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 1
}

LLVM IR (-O2):
@.str = [25 x i8] c"Usage: link file1 file2\0A\00"
@stderr = global i32 0
define i32 @_usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 1
}
void codemain() {}


x86 assembly (clang, -O0):
<codemain>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<codemain>:
ret

LLVM IR (-O0):
define void @codemain() {
ret void
}

LLVM IR (-O2):
define void @codemain() {
ret void
}
int ack(int x, int y) {
  if (x == 0) {
    return y + 1;
  }
  return ack(x - 1, ((y | 0) ? ack(x, y - 1) : 1));
}


x86 assembly (clang, -O0):
<ack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1136 <ack+0x26>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    117f <ack+0x6f>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
or     $0x0,%eax
cmp    $0x0,%eax
je     1164 <ack+0x54>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
sub    $0x1,%esi
call   1030 <ack@plt>
mov    %eax,-0x14(%rbp)
jmp    1171 <ack+0x61>
mov    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1171 <ack+0x61>
mov    -0x10(%rbp),%edi
mov    -0x14(%rbp),%esi
call   1030 <ack@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ack>:
push   %rbx
mov    %esi,%eax
test   %edi,%edi
jne    1130 <ack+0x20>
add    $0x1,%eax
pop    %rbx
ret
nopl   0x0(%rax)
add    $0xffffffff,%eax
mov    %eax,%esi
call   1030 <ack@plt>
mov    %ebx,%edi
test   %ebx,%ebx
je     1117 <ack+0x7>
lea    -0x1(%rdi),%ebx
test   %eax,%eax
jne    1120 <ack+0x10>
mov    $0x1,%eax
jmp    112a <ack+0x1a>

LLVM IR (-O0):
define i32 @ack(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* %5
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
br label %26
11: ; preds = %2
%12 = load i32, i32* %4
%13 = sub nsw i32 %12, 1
%14 = load i32, i32* %5
%15 = or i32 %14, 0
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %22
17: ; preds = %11
%18 = load i32, i32* %4
%19 = load i32, i32* %5
%20 = sub nsw i32 %19, 1
%21 = call i32 @ack(i32 %18, i32 %20)
br label %23
22: ; preds = %11
br label %23
23: ; preds = %22, %17
%24 = phi i32 [ %21, %17 ], [ 1, %22 ]
%25 = call i32 @ack(i32 %13, i32 %24)
store i32 %25, i32* %3
br label %26
26: ; preds = %23, %8
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @ack(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %4, label %7
4: ; preds = %15, %2
%5 = phi i32 [ %1, %2 ], [ %16, %15 ]
%6 = add nsw i32 %5, 1
ret i32 %6
7: ; preds = %2, %15
%8 = phi i32 [ %16, %15 ], [ %1, %2 ]
%9 = phi i32 [ %10, %15 ], [ %0, %2 ]
%10 = add nsw i32 %9, -1
%11 = icmp eq i32 %8, 0
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = add nsw i32 %8, -1
%14 = tail call i32 @ack(i32 %9, i32 %13)
br label %15
15: ; preds = %7, %12
%16 = phi i32 [ %14, %12 ], [ 1, %7 ]
%17 = icmp eq i32 %10, 0
br i1 %17, label %4, label %7
}
float lerp(float a, float b, float b_interp) {
  return a * (1.0F - b_interp) + b * b_interp;
}


x86 assembly (clang, -O0):
<lerp>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xee0(%rip),%xmm2
subss  -0xc(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<lerp>:
movss  0xef8(%rip),%xmm3
subss  %xmm2,%xmm3
mulss  %xmm2,%xmm1
mulss  %xmm3,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @lerp(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %6
%9 = fsub float 1.000000e+00, %8
%10 = load float, float* %5
%11 = load float, float* %6
%12 = fmul float %10, %11
%13 = call float @llvm.fmuladd.f32(float %7, float %9, float %12)
ret float %13
}

LLVM IR (-O2):
define float @lerp(float %0, float %1, float %2) {
%4 = fsub float 1.000000e+00, %2
%5 = fmul float %1, %2
%6 = tail call float @llvm.fmuladd.f32(float %0, float %4, float %5)
ret float %6
}
/* Variables and functions */
int /*<<< orphan*/ set_io_bit(int, int);
void TOSH_MAKE_RFM_RXD_OUTPUT() { set_io_bit(0x39, 2); }


x86 assembly (clang, -O0):
<TOSH_MAKE_RFM_RXD_OUTPUT>:
push   %rbp
mov    %rsp,%rbp
mov    $0x39,%edi
mov    $0x2,%esi
call   1030 <set_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_MAKE_RFM_RXD_OUTPUT>:
mov    $0x39,%edi
mov    $0x2,%esi
jmp    1030 <set_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_MAKE_RFM_RXD_OUTPUT() {
%1 = call i32 @set_io_bit(i32 57, i32 2)
ret void
}

LLVM IR (-O2):
define void @TOSH_MAKE_RFM_RXD_OUTPUT() {
%1 = tail call i32 @set_io_bit(i32 57, i32 2)
ret void
}
/* Variables and functions */
int lrand48();
void fill(int *dst, const size_t size) {
  size_t i;
  for (i = 0; i < size; i++) {
    dst[i] = lrand48();
  }
}


x86 assembly (clang, -O0):
<fill>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    115b <fill+0x4b>
mov    $0x0,%al
call   1030 <lrand48@plt>
mov    %eax,%edx
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1128 <fill+0x18>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fill>:
push   %r15
push   %r14
push   %rbx
test   %rsi,%rsi
je     1144 <fill+0x34>
mov    %rsi,%r15
mov    %rdi,%r14
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
xor    %eax,%eax
call   1030 <lrand48@plt>
mov    %eax,(%r14,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <fill+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @fill(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = alloca i64
store i32* %0, i32** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %15, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = call i32 (...) @lrand48()
%12 = load i32*, i32** %3
%13 = load i64, i64* %5
%14 = getelementptr inbounds i32, i32* %12, i64 %13
store i32 %11, i32* %14
br label %15
15: ; preds = %10
%16 = load i64, i64* %5
%17 = add i64 %16, 1
store i64 %17, i64* %5
br label %6
18: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @fill(i32* nocapture writeonly %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %10, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %8, %4 ], [ 0, %2 ]
%6 = tail call i32 (...) @lrand48()
%7 = getelementptr inbounds i32, i32* %0, i64 %5
store i32 %6, i32* %7
%8 = add nuw i64 %5, 1
%9 = icmp eq i64 %8, %1
br i1 %9, label %10, label %4
10: ; preds = %4, %2
ret void
}
/* Variables and functions */
int rand();
int intrand(int low, int high) {
  if (high - low <= 0)
    return 0;
  return (rand() % (high - low)) + low;
}


x86 assembly (clang, -O0):
<intrand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    -0x8(%rbp),%eax
cmp    $0x0,%eax
jg     1139 <intrand+0x29>
movl   $0x0,-0x4(%rbp)
jmp    114f <intrand+0x3f>
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0xc(%rbp),%ecx
sub    -0x8(%rbp),%ecx
cltd
idiv   %ecx
add    -0x8(%rbp),%edx
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intrand>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
sub    %edi,%ebp
jle    112b <intrand+0x1b>
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %ebp
mov    %edx,%eax
add    %ebx,%eax
jmp    112d <intrand+0x1d>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @intrand(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = load i32, i32* %4
%8 = sub nsw i32 %6, %7
%9 = icmp sle i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 0, i32* %3
br label %19
11: ; preds = %2
%12 = call i32 (...) @rand()
%13 = load i32, i32* %5
%14 = load i32, i32* %4
%15 = sub nsw i32 %13, %14
%16 = srem i32 %12, %15
%17 = load i32, i32* %4
%18 = add nsw i32 %16, %17
store i32 %18, i32* %3
br label %19
19: ; preds = %11, %10
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @intrand(i32 %0, i32 %1) {
%3 = sub nsw i32 %1, %0
%4 = icmp slt i32 %3, 1
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i32 (...) @rand()
%7 = srem i32 %6, %3
%8 = add nsw i32 %7, %0
br label %9
9: ; preds = %2, %5
%10 = phi i32 [ %8, %5 ], [ 0, %2 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int b() { printf("b()\n"); }


x86 assembly (clang, -O0):
<b>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"b()\0A\00"
define i32 @b() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [4 x i8] c"b()\00"
define i32 @b() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ write_x8_internal(int /*<<< orphan*/, int /*<<< orphan*/);
void dbg_memwrite(uint32_t addr, uint32_t value) {
  write_x8_internal(addr, value);
}


x86 assembly (clang, -O0):
<dbg_memwrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <write_x8_internal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbg_memwrite>:
jmp    1030 <write_x8_internal@plt>

LLVM IR (-O0):
define void @dbg_memwrite(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @write_x8_internal(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @dbg_memwrite(i32 %0, i32 %1) {
%3 = tail call i32 @write_x8_internal(i32 %0, i32 %1)
ret void
}
int __get_number_of_cpus(void) { return 1; }


x86 assembly (clang, -O0):
<__get_number_of_cpus>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__get_number_of_cpus>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @__get_number_of_cpus() {
ret i32 1
}

LLVM IR (-O2):
define i32 @__get_number_of_cpus() {
ret i32 1
}
void exit(int rv) {
  while (1)
    asm volatile("");
}


x86 assembly (clang, -O0):
<exit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <exit+0x7>

x86 assembly (clang, -O2):
<exit>:
jmp    1100 <exit>

LLVM IR (-O0):
define void @exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %1, %3
br label %3
}

LLVM IR (-O2):
define void @exit(i32 %0) {
br label %2
2: ; preds = %1, %2
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
br label %2
}
int test_035(int a, int b, int c, int d) { return a + ((d >> 31) & 1) + a; }


x86 assembly (clang, -O0):
<test_035>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x10(%rbp),%ecx
sar    $0x1f,%ecx
and    $0x1,%ecx
add    %ecx,%eax
add    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_035>:
mov    %edi,%eax
shld   $0x1,%ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_035(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %8
%11 = ashr i32 %10, 31
%12 = and i32 %11, 1
%13 = add nsw i32 %9, %12
%14 = load i32, i32* %5
%15 = add nsw i32 %13, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @test_035(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @llvm.fshl.i32(i32 %0, i32 %3, i32 1)
ret i32 %5
}
void main(void) { asm("hlt"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
hlt
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
hlt
ret

LLVM IR (-O0):
define void @main() {
ret void
}

LLVM IR (-O2):
define void @main() {
tail call void asm sideeffect "hlt", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
SP_CASE(imacro, imetamacro_head) {
  int total = __ii_idx_i(0, 10, 100);
  SP_TRUE(total == 110);
}


x86 assembly (clang, -O0):
<SP_CASE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %edi,%edi
mov    $0xa,%esi
mov    $0x64,%edx
mov    $0x0,%al
call   1040 <__ii_idx_i@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x6e,-0x10(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
mov    $0x0,%al
call   1030 <SP_TRUE@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SP_CASE>:
push   %rax
xor    %edi,%edi
mov    $0xa,%esi
mov    $0x64,%edx
xor    %eax,%eax
call   1040 <__ii_idx_i@plt>
xor    %edi,%edi
cmp    $0x6e,%eax
sete   %dil
xor    %eax,%eax
pop    %rcx
jmp    1030 <SP_TRUE@plt>

LLVM IR (-O0):
define i32 @SP_CASE(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = call i32 (i32, i32, i32, ...) bitcast (i32 (...)* @__ii_idx_i to i32 (i32, i32, i32, ...)*)(i32 0, i32 10, i32 100)
store i32 %7, i32* %6
%8 = load i32, i32* %6
%9 = icmp eq i32 %8, 110
%10 = zext i1 %9 to i32
%11 = call i32 (i32, ...) bitcast (i32 (...)* @SP_TRUE to i32 (i32, ...)*)(i32 %10)
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @SP_CASE(i32 %0, i32 %1) {
%3 = tail call i32 (i32, i32, i32, ...) bitcast (i32 (...)* @__ii_idx_i to i32 (i32, i32, i32, ...)*)(i32 0, i32 10, i32 100)
%4 = icmp eq i32 %3, 110
%5 = zext i1 %4 to i32
%6 = tail call i32 (i32, ...) bitcast (i32 (...)* @SP_TRUE to i32 (i32, ...)*)(i32 %5)
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
__attribute__((always_)) uint64_t detexPack64R16(uint32_t r16) { return r16; }


x86 assembly (clang, -O0):
<detexPack64R16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<detexPack64R16>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @detexPack64R16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @detexPack64R16(i32 returned %0) {
ret i32 %0
}
int collatz(int n) {
  int length = 0;
  while (n != 1) {
    if (n % 2 == 0) {
      n = n / 2;
    } else {
      n = 3 * n + 1;
    }
    length++;
  }
  return length;
}


x86 assembly (clang, -O0):
<collatz>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x1,-0x4(%rbp)
je     1157 <collatz+0x57>
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    113f <collatz+0x3f>
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    1149 <collatz+0x49>
imul   $0x3,-0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <collatz+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<collatz>:
xor    %eax,%eax
cmp    $0x1,%edi
jne    1108 <collatz+0x8>
ret
xor    %eax,%eax
jmp    111e <collatz+0x1e>
nopl   0x0(%rax)
lea    (%rdi,%rdi,2),%edi
add    $0x1,%edi
add    $0x1,%eax
cmp    $0x1,%edi
je     1107 <collatz+0x7>
test   $0x1,%dil
jne    1110 <collatz+0x10>
mov    %edi,%ecx
shr    $0x1f,%ecx
add    %edi,%ecx
sar    %ecx
mov    %ecx,%edi
jmp    1116 <collatz+0x16>

LLVM IR (-O0):
define i32 @collatz(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %18, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 1
br i1 %6, label %7, label %21
7: ; preds = %4
%8 = load i32, i32* %2
%9 = srem i32 %8, 2
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, i32* %2
%13 = sdiv i32 %12, 2
store i32 %13, i32* %2
br label %18
14: ; preds = %7
%15 = load i32, i32* %2
%16 = mul nsw i32 3, %15
%17 = add nsw i32 %16, 1
store i32 %17, i32* %2
br label %18
18: ; preds = %14, %11
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %4
21: ; preds = %4
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @collatz(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %17, label %3
3: ; preds = %1, %13
%4 = phi i32 [ %15, %13 ], [ 0, %1 ]
%5 = phi i32 [ %14, %13 ], [ %0, %1 ]
%6 = and i32 %5, 1
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %3
%9 = sdiv i32 %5, 2
br label %13
10: ; preds = %3
%11 = mul nsw i32 %5, 3
%12 = add nsw i32 %11, 1
br label %13
13: ; preds = %10, %8
%14 = phi i32 [ %9, %8 ], [ %12, %10 ]
%15 = add nuw nsw i32 %4, 1
%16 = icmp eq i32 %14, 1
br i1 %16, label %17, label %3
17: ; preds = %13, %1
%18 = phi i32 [ 0, %1 ], [ %15, %13 ]
ret i32 %18
}
void foo291(int p) {}


x86 assembly (clang, -O0):
<foo291>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo291>:
ret

LLVM IR (-O0):
define void @foo291(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo291(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void do_xit() { exit(EXIT_SUCCESS); }


x86 assembly (clang, -O0):
<do_xit>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<do_xit>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
call   1030 <exit@plt>

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define void @do_xit() {
%1 = load i32, i32* @EXIT_SUCCESS
%2 = call i32 @exit(i32 %1)
unreachable
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define void @do_xit() {
%1 = load i32, i32* @EXIT_SUCCESS
%2 = tail call i32 @exit(i32 %1)
unreachable
}
void exynos4_default_sdhci2(void) {}


x86 assembly (clang, -O0):
<exynos4_default_sdhci2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exynos4_default_sdhci2>:
ret

LLVM IR (-O0):
define void @exynos4_default_sdhci2() {
ret void
}

LLVM IR (-O2):
define void @exynos4_default_sdhci2() {
ret void
}
void calculate_sec(int input_sec, int *sec, int *min, int *hr) {
  *hr = input_sec / 3600;
  *min = (input_sec % 3600) / 60;
  *sec = (input_sec % 3600) % 60;
}


x86 assembly (clang, -O0):
<calculate_sec>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xe10,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
mov    $0xe10,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
mov    $0x3c,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
mov    $0xe10,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
mov    $0x3c,%ecx
cltd
idiv   %ecx
mov    -0x10(%rbp),%rax
mov    %edx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculate_sec>:
movslq %edi,%rax
imul   $0xffffffff91a2b3c5,%rax,%rdi
shr    $0x20,%rdi
add    %eax,%edi
mov    %edi,%r8d
shr    $0x1f,%r8d
sar    $0xb,%edi
add    %r8d,%edi
mov    %edi,(%rcx)
imul   $0xe10,%edi,%ecx
sub    %ecx,%eax
movswl %ax,%ecx
imul   $0xffff8889,%ecx,%ecx
shr    $0x10,%ecx
add    %eax,%ecx
movzwl %cx,%ecx
movswl %cx,%edi
shr    $0xf,%ecx
sar    $0x5,%edi
add    %ecx,%edi
movswl %di,%ecx
mov    %ecx,(%rdx)
imul   $0x3c,%edi,%ecx
sub    %ecx,%eax
cwtl
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @calculate_sec(i32 %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32, i32* %5
%10 = sdiv i32 %9, 3600
%11 = load i32*, i32** %8
store i32 %10, i32* %11
%12 = load i32, i32* %5
%13 = srem i32 %12, 3600
%14 = sdiv i32 %13, 60
%15 = load i32*, i32** %7
store i32 %14, i32* %15
%16 = load i32, i32* %5
%17 = srem i32 %16, 3600
%18 = srem i32 %17, 60
%19 = load i32*, i32** %6
store i32 %18, i32* %19
ret void
}

LLVM IR (-O2):
define void @calculate_sec(i32 %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3) {
%5 = sdiv i32 %0, 3600
store i32 %5, i32* %3
%6 = srem i32 %0, 3600
%7 = trunc i32 %6 to i16
%8 = sdiv i16 %7, 60
%9 = sext i16 %8 to i32
store i32 %9, i32* %2
%10 = srem i16 %7, 60
%11 = sext i16 %10 to i32
store i32 %11, i32* %1
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t dmsafe(uint32_t addr) { return addr & 0x0fffffff; }


x86 assembly (clang, -O0):
<dmsafe>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xfffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dmsafe>:
mov    %edi,%eax
and    $0xfffffff,%eax
ret

LLVM IR (-O0):
define i32 @dmsafe(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 268435455
ret i32 %4
}

LLVM IR (-O2):
define i32 @dmsafe(i32 %0) {
%2 = and i32 %0, 268435455
ret i32 %2
}
void DSdbEnter(void) {}


x86 assembly (clang, -O0):
<DSdbEnter>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DSdbEnter>:
ret

LLVM IR (-O0):
define void @DSdbEnter() {
ret void
}

LLVM IR (-O2):
define void @DSdbEnter() {
ret void
}
/* Variables and functions */
int fetchFromMemory(int);
int fetchData(int address) { return fetchFromMemory(address); }


x86 assembly (clang, -O0):
<fetchData>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <fetchFromMemory@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fetchData>:
jmp    1030 <fetchFromMemory@plt>

LLVM IR (-O0):
define i32 @fetchData(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @fetchFromMemory(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @fetchData(i32 %0) {
%2 = tail call i32 @fetchFromMemory(i32 %0)
ret i32 %2
}