xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ O_RDWR;
int /*<<< orphan*/ close(int);
int open(char *, int /*<<< orphan*/);
int vibrator_exists() {
  int fd;
  fd = open("/dev/tspdrv", O_RDWR);
  if (fd < 0)
    return 0;
  close(fd);
  return 1;
}


x86 assembly (clang, -O0):
<vibrator_exists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2eb9(%rip),%rax
mov    (%rax),%esi
lea    0xec8(%rip),%rdi
call   1040 <open@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1156 <vibrator_exists+0x36>
movl   $0x0,-0x4(%rbp)
jmp    1165 <vibrator_exists+0x45>
mov    -0x8(%rbp),%edi
call   1030 <close@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vibrator_exists>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
lea    0xecf(%rip),%rdi
call   1040 <open@plt>
test   %eax,%eax
js     1148 <vibrator_exists+0x28>
mov    %eax,%edi
call   1030 <close@plt>
mov    $0x1,%eax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"/dev/tspdrv\00"
@O_RDWR = global i32 0
define i32 @vibrator_exists() {
%1 = alloca i32
%2 = alloca i32
%3 = load i32, i32* @O_RDWR
%4 = call i32 @open(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %3)
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %0
store i32 0, i32* %1
br label %11
8: ; preds = %0
%9 = load i32, i32* %2
%10 = call i32 @close(i32 %9)
store i32 1, i32* %1
br label %11
11: ; preds = %8, %7
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
@.str = [12 x i8] c"/dev/tspdrv\00"
@O_RDWR = global i32 0
define i32 @vibrator_exists() {
%1 = load i32, i32* @O_RDWR
%2 = tail call i32 @open(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = icmp slt i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %0
%5 = tail call i32 @close(i32 %2)
br label %6
6: ; preds = %0, %4
%7 = phi i32 [ 1, %4 ], [ 0, %0 ]
ret i32 %7
}
void rop3_206_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = ~T;
  stk2 = *D & stk3;
  stk1 = S | stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_206_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_206_1_1>:
ret

LLVM IR (-O0):
define void @rop3_206_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %6
%11 = zext i8 %10 to i32
%12 = xor i32 %11, -1
%13 = trunc i32 %12 to i8
store i8 %13, i8* %9
%14 = load i8*, i8** %4
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = load i8, i8* %9
%18 = zext i8 %17 to i32
%19 = and i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %8
%21 = load i8, i8* %5
%22 = zext i8 %21 to i32
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = or i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %7
%27 = load i8, i8* %7
%28 = zext i8 %27 to i32
%29 = load i8, i8* %5
%30 = zext i8 %29 to i32
%31 = xor i32 %30, -1
%32 = and i32 %28, %31
%33 = load i8, i8* %6
%34 = zext i8 %33 to i32
%35 = xor i32 %34, -1
%36 = and i32 %32, %35
%37 = load i8*, i8** %4
%38 = load i8, i8* %37
%39 = zext i8 %38 to i32
%40 = load i8, i8* %5
%41 = zext i8 %40 to i32
%42 = and i32 %39, %41
%43 = or i32 %36, %42
%44 = load i8*, i8** %4
%45 = load i8, i8* %44
%46 = zext i8 %45 to i32
%47 = load i8, i8* %6
%48 = zext i8 %47 to i32
%49 = and i32 %46, %48
%50 = or i32 %43, %49
%51 = trunc i32 %50 to i8
%52 = load i8*, i8** %4
store i8 %51, i8* %52
ret void
}

LLVM IR (-O2):
define void @rop3_206_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
ret void
}
int f6(int x) { return (x % -5) % -6; }


x86 assembly (clang, -O0):
<f6>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xfffffffb,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
mov    $0xfffffffa,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f6>:
movslq %edi,%rax
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x21,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @f6(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, -5
%5 = srem i32 %4, -6
ret i32 %5
}

LLVM IR (-O2):
define i32 @f6(i32 %0) {
%2 = srem i32 %0, 5
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ nss_macsec_reg_read(unsigned int, unsigned int,
                                       unsigned int *);
int dal_reg_read(unsigned int dev_id, unsigned int reg_addr,
                 unsigned int *pvalue) {
  if ((dev_id >= 3) || (reg_addr >= 0x200000)) {
    return -1;
  }
  nss_macsec_reg_read(dev_id, reg_addr, pvalue);
  return 0;
}


x86 assembly (clang, -O0):
<dal_reg_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
cmpl   $0x3,-0x8(%rbp)
jae    1139 <dal_reg_read+0x29>
cmpl   $0x200000,-0xc(%rbp)
jb     1145 <dal_reg_read+0x35>
movl   $0xffffffff,-0x4(%rbp)
jmp    115b <dal_reg_read+0x4b>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1030 <nss_macsec_reg_read@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dal_reg_read>:
mov    $0xffffffff,%eax
cmp    $0x2,%edi
ja     112e <dal_reg_read+0x1e>
cmp    $0x1fffff,%esi
ja     112e <dal_reg_read+0x1e>
push   %rax
call   1030 <nss_macsec_reg_read@plt>
xor    %eax,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @dal_reg_read(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
%8 = load i32, i32* %5
%9 = icmp uge i32 %8, 3
br i1 %9, label %13, label %10
10: ; preds = %3
%11 = load i32, i32* %6
%12 = icmp uge i32 %11, 2097152
br i1 %12, label %13, label %14
13: ; preds = %10, %3
store i32 -1, i32* %4
br label %19
14: ; preds = %10
%15 = load i32, i32* %5
%16 = load i32, i32* %6
%17 = load i32*, i32** %7
%18 = call i32 @nss_macsec_reg_read(i32 %15, i32 %16, i32* %17)
store i32 0, i32* %4
br label %19
19: ; preds = %14, %13
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @dal_reg_read(i32 %0, i32 %1, i32* %2) {
%4 = icmp ugt i32 %0, 2
%5 = icmp ugt i32 %1, 2097151
%6 = or i1 %4, %5
br i1 %6, label %9, label %7
7: ; preds = %3
%8 = tail call i32 @nss_macsec_reg_read(i32 %0, i32 %1, i32* %2)
br label %9
9: ; preds = %3, %7
%10 = phi i32 [ 0, %7 ], [ -1, %3 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void log_debug(const char *message) { printf("DEBUG: %s\n", message); }


x86 assembly (clang, -O0):
<log_debug>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_debug>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"DEBUG: %s\0A\00"
define void @log_debug(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"DEBUG: %s\0A\00"
define void @log_debug(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void av_format_get_metadata_header_padding() {}


x86 assembly (clang, -O0):
<av_format_get_metadata_header_padding>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_format_get_metadata_header_padding>:
ret

LLVM IR (-O0):
define void @av_format_get_metadata_header_padding() {
ret void
}

LLVM IR (-O2):
define void @av_format_get_metadata_header_padding() {
ret void
}
/* Type definitions */
struct json_writer {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ json_emitc(struct json_writer *, char);
void json_emits(struct json_writer *writer, const char *s) {
  char c;
  while ((c = *s++) != '\0')
    json_emitc(writer, c);
}


x86 assembly (clang, -O0):
<json_emits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    %al,-0x11(%rbp)
movsbl %al,%eax
cmp    $0x0,%eax
je     1152 <json_emits+0x42>
mov    -0x8(%rbp),%rdi
movsbl -0x11(%rbp),%esi
call   1030 <json_emitc@plt>
jmp    1120 <json_emits+0x10>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<json_emits>:
push   %r14
push   %rbx
push   %rax
mov    (%rsi),%al
test   %al,%al
je     1146 <json_emits+0x36>
mov    %rsi,%rbx
mov    %rdi,%r14
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movsbl %al,%esi
mov    %r14,%rdi
call   1030 <json_emitc@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <json_emits+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.json_writer = type { i32 }
define void @json_emits(%struct.json_writer* %0, i8* %1) {
%3 = alloca %struct.json_writer*
%4 = alloca i8*
%5 = alloca i8
store %struct.json_writer* %0, %struct.json_writer** %3
store i8* %1, i8** %4
br label %6
6: ; preds = %12, %2
%7 = load i8*, i8** %4
%8 = getelementptr inbounds i8, i8* %7, i32 1
store i8* %8, i8** %4
%9 = load i8, i8* %7
store i8 %9, i8* %5
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %6
%13 = load %struct.json_writer*, %struct.json_writer** %3
%14 = load i8, i8* %5
%15 = call i32 @json_emitc(%struct.json_writer* %13, i8 signext %14)
br label %6
16: ; preds = %6
ret void
}

LLVM IR (-O2):
%struct.json_writer = type { i32 }
define void @json_emits(%struct.json_writer* %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %12, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %10, %5 ], [ %3, %2 ]
%7 = phi i8* [ %8, %5 ], [ %1, %2 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = tail call i32 @json_emitc(%struct.json_writer* %0, i8 signext %6)
%10 = load i8, i8* %8
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %5
12: ; preds = %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ brace();
int /*<<< orphan*/ exit(int);
void handler(int sig) {
  brace();
  exit(1);
}


x86 assembly (clang, -O0):
<handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <brace@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<handler>:
push   %rax
xor    %eax,%eax
call   1030 <brace@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @brace()
%4 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @handler(i32 %0) {
%2 = tail call i32 (...) @brace()
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ print(char *, char);
void b_defstring(int len, char *str) {
  char *s;
  for (s = str; s < str + len; s++)
    print("byte 1 %d\n", (*s) & 0377);
}


x86 assembly (clang, -O0):
<b_defstring>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
movslq -0x4(%rbp),%rdx
add    %rdx,%rcx
cmp    %rcx,%rax
jae    116b <b_defstring+0x5b>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
and    $0xff,%eax
lea    0xeae(%rip),%rdi
movsbl %al,%esi
call   1030 <print@plt>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1127 <b_defstring+0x17>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_defstring>:
push   %r15
push   %r14
push   %rbx
test   %edi,%edi
jle    1144 <b_defstring+0x34>
mov    %rsi,%rbx
movslq %edi,%r15
add    %rsi,%r15
lea    0xed7(%rip),%r14
nopl   0x0(%rax)
movsbl (%rbx),%esi
mov    %r14,%rdi
call   1030 <print@plt>
add    $0x1,%rbx
cmp    %r15,%rbx
jb     1130 <b_defstring+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [11 x i8] c"byte 1 %d\0A\00"
define void @b_defstring(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
store i8* %6, i8** %5
br label %7
7: ; preds = %21, %2
%8 = load i8*, i8** %5
%9 = load i8*, i8** %4
%10 = load i32, i32* %3
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %9, i64 %11
%13 = icmp ult i8* %8, %12
br i1 %13, label %14, label %24
14: ; preds = %7
%15 = load i8*, i8** %5
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = and i32 %17, 255
%19 = trunc i32 %18 to i8
%20 = call i32 @print(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8 signext %19)
br label %21
21: ; preds = %14
%22 = load i8*, i8** %5
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %5
br label %7
24: ; preds = %7
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"byte 1 %d\0A\00"
define void @b_defstring(i32 %0, i8* %1) {
%3 = sext i32 %0 to i64
%4 = getelementptr inbounds i8, i8* %1, i64 %3
%5 = icmp sgt i32 %0, 0
br i1 %5, label %6, label %12
6: ; preds = %2, %6
%7 = phi i8* [ %10, %6 ], [ %1, %2 ]
%8 = load i8, i8* %7
%9 = tail call i32 @print(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8 signext %8)
%10 = getelementptr inbounds i8, i8* %7, i64 1
%11 = icmp ult i8* %10, %4
br i1 %11, label %6, label %12
12: ; preds = %6, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void PrintHello() { printf("Hello From C"); }


x86 assembly (clang, -O0):
<PrintHello>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PrintHello>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"Hello From C\00"
define void @PrintHello() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hello From C\00"
define void @PrintHello() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int bench_main(int, char **);
int aligned_main(int argc, char *argv[]) { return bench_main(argc, argv); }


x86 assembly (clang, -O0):
<aligned_main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <bench_main@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aligned_main>:
jmp    1030 <bench_main@plt>

LLVM IR (-O0):
define i32 @aligned_main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i8**, i8*** %4
%7 = call i32 @bench_main(i32 %5, i8** %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @aligned_main(i32 %0, i8** %1) {
%3 = tail call i32 @bench_main(i32 %0, i8** %1)
ret i32 %3
}
int test_imm_AAint64_highword_reg(long long val) {
  return ((val >> 32) & (0xAA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_AAint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xaa,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_AAint64_highword_reg>:
movabs $0xaa00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_AAint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 170
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_AAint64_highword_reg(i64 %0) {
%2 = and i64 %0, 730144440320
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ bochsApiDeviceStop();
void deviceStop() { bochsApiDeviceStop(); }


x86 assembly (clang, -O0):
<deviceStop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <bochsApiDeviceStop@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<deviceStop>:
xor    %eax,%eax
jmp    1030 <bochsApiDeviceStop@plt>

LLVM IR (-O0):
define void @deviceStop() {
%1 = call i32 (...) @bochsApiDeviceStop()
ret void
}

LLVM IR (-O2):
define void @deviceStop() {
%1 = tail call i32 (...) @bochsApiDeviceStop()
ret void
}
void print_hello_world() {
  do {
    printf("###INFO: at File = %s, Func = %s, Line = %d\r\n",
           "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
           "2022-01-22/02-19-57/repos/xOpenLee/c/refs/heads/master/"
           "TheCprogrammingLanguage/chapter1/hello.c",
           __func__, 20);
  } while (0);
  printf("hello, world\r\n");
}


x86 assembly (clang, -O0):
<print_hello_world>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <print_hello_world+0x9>
lea    0xee0(%rip),%rdi
lea    0xf07(%rip),%rsi
lea    0xfa0(%rip),%rdx
mov    $0x14,%ecx
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xf9f(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_hello_world>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xeff(%rip),%rsi
lea    0xf98(%rip),%rdx
mov    $0x14,%ecx
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xf97(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [46 x i8] c"###INFO: at File = %s, Func = %s, Line = %d\0D\0A\00"
@.str.1 = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/xOpenLee/c/refs/heads/master/TheCprogrammingLanguage/chapter1/hello.c\00"
@__func__.print_hello_world = [18 x i8] c"print_hello_world\00"
@.str.2 = [15 x i8] c"hello, world\0D\0A\00"
define void @print_hello_world() {
br label %1
1: ; preds = %0
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([18 x i8], [18 x i8]* @__func__.print_hello_world, i64 0, i64 0), i32 20)
br label %3
3: ; preds = %1
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [46 x i8] c"###INFO: at File = %s, Func = %s, Line = %d\0D\0A\00"
@.str.1 = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/xOpenLee/c/refs/heads/master/TheCprogrammingLanguage/chapter1/hello.c\00"
@__func__.print_hello_world = [18 x i8] c"print_hello_world\00"
@str = [14 x i8] c"hello, world\0D\00"
define void @print_hello_world() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([18 x i8], [18 x i8]* @__func__.print_hello_world, i64 0, i64 0), i32 20)
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ COND_PL();
int /*<<< orphan*/ EA_AY_DI_8();
int /*<<< orphan*/ m68ki_write_8(int /*<<< orphan*/, int);
void m68k_op_spl_8_di(void) {
  m68ki_write_8(EA_AY_DI_8(), COND_PL() ? 0xff : 0);
}


x86 assembly (clang, -O0):
<m68k_op_spl_8_di>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <EA_AY_DI_8@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <COND_PL@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rcx
xor    %esi,%esi
mov    $0xff,%eax
cmp    $0x0,%rcx
cmovne %eax,%esi
call   1050 <m68ki_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_spl_8_di>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %eax,%eax
call   1030 <EA_AY_DI_8@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <COND_PL@plt>
test   %rax,%rax
mov    $0xff,%esi
cmove  %ebp,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <m68ki_write_8@plt>

LLVM IR (-O0):
define void @m68k_op_spl_8_di() {
%1 = call i32 (...) @EA_AY_DI_8()
%2 = call i64 (...) @COND_PL()
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 255, i32 0
%6 = call i32 @m68ki_write_8(i32 %1, i32 %5)
ret void
}

LLVM IR (-O2):
define void @m68k_op_spl_8_di() {
%1 = tail call i32 (...) @EA_AY_DI_8()
%2 = tail call i64 (...) @COND_PL()
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 0, i32 255
%5 = tail call i32 @m68ki_write_8(i32 %1, i32 %4)
ret void
}
/* Variables and functions */
unsigned int MoveDoor(int);
unsigned int GetDoorState() { return MoveDoor((1 << 8)); }


x86 assembly (clang, -O0):
<GetDoorState>:
push   %rbp
mov    %rsp,%rbp
mov    $0x100,%edi
call   1030 <MoveDoor@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetDoorState>:
mov    $0x100,%edi
jmp    1030 <MoveDoor@plt>

LLVM IR (-O0):
define i32 @GetDoorState() {
%1 = call i32 @MoveDoor(i32 256)
ret i32 %1
}

LLVM IR (-O2):
define i32 @GetDoorState() {
%1 = tail call i32 @MoveDoor(i32 256)
ret i32 %1
}
char *CopyConst2Ram(char *dest, const char *src) {
  char *d;
  d = dest;
  for (; *dest++ = *src++;)
    ;
  return d;
}


x86 assembly (clang, -O0):
<CopyConst2Ram>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %al,(%rcx)
cmp    $0x0,%al
je     1143 <CopyConst2Ram+0x43>
jmp    1114 <CopyConst2Ram+0x14>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CopyConst2Ram>:
mov    %rdi,%rax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
movzbl (%rsi,%rcx,1),%edx
mov    %dl,(%rax,%rcx,1)
add    $0x1,%rcx
test   %dl,%dl
jne    1110 <CopyConst2Ram+0x10>
ret

LLVM IR (-O0):
define i8* @CopyConst2Ram(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %14, %2
%8 = load i8*, i8** %4
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %4
%10 = load i8, i8* %8
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %3
store i8 %10, i8* %11
%13 = icmp ne i8 %10, 0
br i1 %13, label %14, label %15
14: ; preds = %7
br label %7
15: ; preds = %7
%16 = load i8*, i8** %5
ret i8* %16
}

LLVM IR (-O2):
define i8* @CopyConst2Ram(i8* returned writeonly %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %1, %2 ], [ %6, %3 ]
%5 = phi i8* [ %0, %2 ], [ %8, %3 ]
%6 = getelementptr inbounds i8, i8* %4, i64 1
%7 = load i8, i8* %4
%8 = getelementptr inbounds i8, i8* %5, i64 1
store i8 %7, i8* %5
%9 = icmp eq i8 %7, 0
br i1 %9, label %10, label %3
10: ; preds = %3
ret i8* %0
}
void DLResolveSymbols(void *mod) { return; }


x86 assembly (clang, -O0):
<DLResolveSymbols>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<DLResolveSymbols>:
ret

LLVM IR (-O0):
define void @DLResolveSymbols(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @DLResolveSymbols(i8* nocapture %0) {
ret void
}
void gtk_font_button_set_use_size() {}


x86 assembly (clang, -O0):
<gtk_font_button_set_use_size>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_font_button_set_use_size>:
ret

LLVM IR (-O0):
define void @gtk_font_button_set_use_size() {
ret void
}

LLVM IR (-O2):
define void @gtk_font_button_set_use_size() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void CatchInt(int sig) { exit(0); }


x86 assembly (clang, -O0):
<CatchInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<CatchInt>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @CatchInt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @CatchInt(i32 %0) {
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
double rand_beebs();
long TestingJittered(long index, long total) {
  return (rand_beebs() * 1.0 / ((1U << 15) - 1) <= 0.9) ? index : (index - 2);
}


x86 assembly (clang, -O0):
<TestingJittered>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand_beebs@plt>
movaps %xmm0,%xmm1
movsd  0xede(%rip),%xmm0
mulsd  %xmm0,%xmm1
movsd  0xeca(%rip),%xmm0
divsd  %xmm0,%xmm1
movsd  0xeb6(%rip),%xmm0
ucomisd %xmm1,%xmm0
jb     1161 <TestingJittered+0x51>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    116d <TestingJittered+0x5d>
mov    -0x8(%rbp),%rax
sub    $0x2,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TestingJittered>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <rand_beebs@plt>
divsd  0xedd(%rip),%xmm0
lea    -0x2(%rbx),%rax
movsd  0xed9(%rip),%xmm1
ucomisd %xmm0,%xmm1
cmovae %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @TestingJittered(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = call double (...) @rand_beebs()
%6 = fmul double %5, 1.000000e+00
%7 = fdiv double %6, 3.276700e+04
%8 = fcmp ole double %7, 9.000000e-01
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i64, i64* %3
br label %14
11: ; preds = %2
%12 = load i64, i64* %3
%13 = sub nsw i64 %12, 2
br label %14
14: ; preds = %11, %9
%15 = phi i64 [ %10, %9 ], [ %13, %11 ]
ret i64 %15
}

LLVM IR (-O2):
define i64 @TestingJittered(i64 %0, i64 %1) {
%3 = tail call double (...) @rand_beebs()
%4 = fdiv double %3, 3.276700e+04
%5 = fcmp ole double %4, 9.000000e-01
%6 = add nsw i64 %0, -2
%7 = select i1 %5, i64 %0, i64 %6
ret i64 %7
}
/* Variables and functions */
double newton(double, int);
int /*<<< orphan*/ printf(char *);
double sqrt(double n) {
  if (n < 0) {
    printf("  Error. This application cannot calculate\n");
    printf("         square roots of negative numbers.\n\n");
    return -1;
  }
  return newton(n, 1);
}


x86 assembly (clang, -O0):
<sqrt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1165 <sqrt+0x45>
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
lea    0xee6(%rip),%rdi
call   1030 <printf@plt>
movsd  0xea5(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1179 <sqrt+0x59>
movsd  -0x10(%rbp),%xmm0
mov    $0x1,%edi
call   1040 <newton@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqrt>:
xorpd  %xmm1,%xmm1
ucomisd %xmm0,%xmm1
jbe    114d <sqrt+0x2d>
push   %rax
lea    0xed6(%rip),%rdi
call   1030 <puts@plt>
lea    0xef5(%rip),%rdi
call   1030 <puts@plt>
movsd  0xeb5(%rip),%xmm0
pop    %rax
ret
mov    $0x1,%edi
jmp    1040 <newton@plt>

LLVM IR (-O0):
@.str = [44 x i8] c" Error. This application cannot calculate\0A\00"
@.str.1 = [45 x i8] c" square roots of negative numbers.\0A\0A\00"
define double @sqrt(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp olt double %4, 0.000000e+00
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str.1, i64 0, i64 0))
store double -1.000000e+00, double* %2
br label %12
9: ; preds = %1
%10 = load double, double* %3
%11 = call double @newton(double %10, i32 1)
store double %11, double* %2
br label %12
12: ; preds = %9, %6
%13 = load double, double* %2
ret double %13
}

LLVM IR (-O2):
@str = [43 x i8] c" Error. This application cannot calculate\00"
@str.2 = [44 x i8] c" square roots of negative numbers.\0A\00"
define double @sqrt(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([43 x i8], [43 x i8]* @str, i64 0, i64 0))
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @str.2, i64 0, i64 0))
br label %8
6: ; preds = %1
%7 = tail call double @newton(double %0, i32 1)
br label %8
8: ; preds = %6, %3
%9 = phi double [ -1.000000e+00, %3 ], [ %7, %6 ]
ret double %9
}
void adis16350_unconfigure_ring(struct iio_dev *indio_dev) {}


x86 assembly (clang, -O0):
<adis16350_unconfigure_ring>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<adis16350_unconfigure_ring>:
ret

LLVM IR (-O0):
%struct.iio_dev = type opaque
define void @adis16350_unconfigure_ring(%struct.iio_dev* %0) {
%2 = alloca %struct.iio_dev*
store %struct.iio_dev* %0, %struct.iio_dev** %2
ret void
}

LLVM IR (-O2):
%struct.iio_dev = type opaque
define void @adis16350_unconfigure_ring(%struct.iio_dev* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ arr;

/* Variables and functions */
int /*<<< orphan*/ shuffle_array(int *, int);
int main() {
  int arr[] = {1, 2, 3, 4, 5, 6, 7, 8};
  int n = sizeof(arr) / sizeof(arr[0]);
  shuffle_array(arr, n);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xed7(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xed4(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xed1(%rip),%rax
mov    %rax,-0x18(%rbp)
movl   $0x8,-0x34(%rbp)
lea    -0x30(%rbp),%rdi
mov    -0x34(%rbp),%esi
call   1030 <shuffle_array@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
movaps 0xef5(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xed9(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x8,%esi
call   1030 <shuffle_array@plt>
xor    %eax,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.main.arr = [8 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8]
define i32 @main() {
%1 = alloca i32
%2 = alloca [8 x i32]
%3 = alloca i32
store i32 0, i32* %1
%4 = bitcast [8 x i32]* %2 to i8*
store i32 8, i32* %3
%5 = getelementptr inbounds [8 x i32], [8 x i32]* %2, i64 0, i64 0
%6 = load i32, i32* %3
%7 = call i32 @shuffle_array(i32* %5, i32 %6)
ret i32 0
}

LLVM IR (-O2):
@__const.main.arr = [8 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8]
define i32 @main() {
%1 = alloca [8 x i32]
%2 = bitcast [8 x i32]* %1 to i8*
%3 = getelementptr inbounds [8 x i32], [8 x i32]* %1, i64 0, i64 0
%4 = call i32 @shuffle_array(i32* %3, i32 8)
ret i32 0
}
void perf_push(int type) {}


x86 assembly (clang, -O0):
<perf_push>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<perf_push>:
ret

LLVM IR (-O0):
define void @perf_push(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @perf_push(i32 %0) {
ret void
}
/* Variables and functions */
void *ssl_initfd(int fd, int type) { return NULL; }


x86 assembly (clang, -O0):
<ssl_initfd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssl_initfd>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @ssl_initfd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @ssl_initfd(i32 %0, i32 %1) {
ret i8* null
}
unsigned long getHashIndex(const char *key, int nTableLength) {
  unsigned long nHash = 0;
  while (*key) {
    nHash = (nHash << 5) + nHash + *key++;
  }
  return (nHash % nTableLength);
}


x86 assembly (clang, -O0):
<getHashIndex>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     114b <getHashIndex+0x4b>
mov    -0x18(%rbp),%rax
shl    $0x5,%rax
add    -0x18(%rbp),%rax
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movsbq (%rcx),%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
jmp    1113 <getHashIndex+0x13>
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
xor    %edx,%edx
div    %rcx
mov    %rdx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getHashIndex>:
mov    (%rdi),%cl
test   %cl,%cl
je     112e <getHashIndex+0x2e>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
mov    %rax,%rdx
shl    $0x5,%rdx
add    %rax,%rdx
movsbq %cl,%rax
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <getHashIndex+0x10>
jmp    1130 <getHashIndex+0x30>
xor    %eax,%eax
movslq %esi,%rcx
mov    %rax,%rdx
or     %rcx,%rdx
shr    $0x20,%rdx
je     1148 <getHashIndex+0x48>
xor    %edx,%edx
div    %rcx
mov    %rdx,%rax
ret
xor    %edx,%edx
div    %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i64 @getHashIndex(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i64
store i8* %0, i8** %3
store i32 %1, i32* %4
store i64 0, i64* %5
br label %6
6: ; preds = %10, %2
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i64, i64* %5
%12 = shl i64 %11, 5
%13 = load i64, i64* %5
%14 = add i64 %12, %13
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
%17 = load i8, i8* %15
%18 = sext i8 %17 to i64
%19 = add i64 %14, %18
store i64 %19, i64* %5
br label %6
20: ; preds = %6
%21 = load i64, i64* %5
%22 = load i32, i32* %4
%23 = sext i32 %22 to i64
%24 = urem i64 %21, %23
ret i64 %24
}

LLVM IR (-O2):
define i64 @getHashIndex(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %13, %5 ], [ %3, %2 ]
%7 = phi i64 [ %12, %5 ], [ 0, %2 ]
%8 = phi i8* [ %10, %5 ], [ %0, %2 ]
%9 = mul i64 %7, 33
%10 = getelementptr inbounds i8, i8* %8, i64 1
%11 = sext i8 %6 to i64
%12 = add i64 %9, %11
%13 = load i8, i8* %10
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %2
%16 = phi i64 [ 0, %2 ], [ %12, %5 ]
%17 = sext i32 %1 to i64
%18 = urem i64 %16, %17
ret i64 %18
}
void PDMCritSectIsOwner(void) {}


x86 assembly (clang, -O0):
<PDMCritSectIsOwner>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PDMCritSectIsOwner>:
ret

LLVM IR (-O0):
define void @PDMCritSectIsOwner() {
ret void
}

LLVM IR (-O2):
define void @PDMCritSectIsOwner() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t wanghash32(uint32_t key) {
  key += ~(key << 15);
  key ^= (key >> 10);
  key += (key << 3);
  key ^= (key >> 6);
  key += ~(key << 11);
  key ^= (key >> 16);
  return key;
}


x86 assembly (clang, -O0):
<wanghash32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0xf,%eax
xor    $0xffffffff,%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0xa,%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x3,%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x6,%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0xb,%eax
xor    $0xffffffff,%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wanghash32>:
mov    %edi,%eax
shl    $0xf,%eax
not    %eax
add    %edi,%eax
mov    %eax,%ecx
sar    $0xa,%ecx
xor    %eax,%ecx
lea    (%rcx,%rcx,8),%eax
mov    %eax,%ecx
sar    $0x6,%ecx
xor    %eax,%ecx
mov    %ecx,%edx
shl    $0xb,%edx
not    %edx
add    %ecx,%edx
mov    %edx,%eax
sar    $0x10,%eax
xor    %edx,%eax
ret

LLVM IR (-O0):
define i32 @wanghash32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 15
%5 = xor i32 %4, -1
%6 = load i32, i32* %2
%7 = add nsw i32 %6, %5
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = ashr i32 %8, 10
%10 = load i32, i32* %2
%11 = xor i32 %10, %9
store i32 %11, i32* %2
%12 = load i32, i32* %2
%13 = shl i32 %12, 3
%14 = load i32, i32* %2
%15 = add nsw i32 %14, %13
store i32 %15, i32* %2
%16 = load i32, i32* %2
%17 = ashr i32 %16, 6
%18 = load i32, i32* %2
%19 = xor i32 %18, %17
store i32 %19, i32* %2
%20 = load i32, i32* %2
%21 = shl i32 %20, 11
%22 = xor i32 %21, -1
%23 = load i32, i32* %2
%24 = add nsw i32 %23, %22
store i32 %24, i32* %2
%25 = load i32, i32* %2
%26 = ashr i32 %25, 16
%27 = load i32, i32* %2
%28 = xor i32 %27, %26
store i32 %28, i32* %2
%29 = load i32, i32* %2
ret i32 %29
}

LLVM IR (-O2):
define i32 @wanghash32(i32 %0) {
%2 = shl i32 %0, 15
%3 = xor i32 %2, -1
%4 = add nsw i32 %3, %0
%5 = ashr i32 %4, 10
%6 = xor i32 %5, %4
%7 = mul i32 %6, 9
%8 = ashr i32 %7, 6
%9 = xor i32 %8, %7
%10 = shl i32 %9, 11
%11 = xor i32 %10, -1
%12 = add nsw i32 %9, %11
%13 = ashr i32 %12, 16
%14 = xor i32 %13, %12
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ errx(int, char *);
void nomem(void) { errx(1, "not enough memory."); }


x86 assembly (clang, -O0):
<nomem>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
lea    0xee0(%rip),%rsi
call   1030 <errx@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nomem>:
lea    0xee9(%rip),%rsi
mov    $0x1,%edi
jmp    1030 <errx@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"not enough memory.\00"
define void @nomem() {
%1 = call i32 @errx(i32 1, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"not enough memory.\00"
define void @nomem() {
%1 = tail call i32 @errx(i32 1, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DirectIndexedYE0(int);
int /*<<< orphan*/ STX8(int /*<<< orphan*/);
void Op96E0X1(void) { STX8(DirectIndexedYE0(2)); }


x86 assembly (clang, -O0):
<Op96E0X1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1040 <DirectIndexedYE0@plt>
mov    %eax,%edi
call   1030 <STX8@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Op96E0X1>:
push   %rax
mov    $0x2,%edi
call   1040 <DirectIndexedYE0@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <STX8@plt>

LLVM IR (-O0):
define void @Op96E0X1() {
%1 = call i32 @DirectIndexedYE0(i32 2)
%2 = call i32 @STX8(i32 %1)
ret void
}

LLVM IR (-O2):
define void @Op96E0X1() {
%1 = tail call i32 @DirectIndexedYE0(i32 2)
%2 = tail call i32 @STX8(i32 %1)
ret void
}
/* Variables and functions */
long long factorial(int);
int num(int x, int y) {
  long long int m = factorial(x);
  long long int n = factorial(y);
  long long int o = factorial(x - y);
  int p = m / (n * o);
  return (p);
}


x86 assembly (clang, -O0):
<num>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <factorial@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <factorial@plt>
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%edi
sub    -0x8(%rbp),%edi
call   1030 <factorial@plt>
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
imul   -0x20(%rbp),%rcx
cqto
idiv   %rcx
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<num>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %edi,%ebx
call   1030 <factorial@plt>
mov    %rax,%r14
mov    %ebp,%edi
call   1030 <factorial@plt>
mov    %rax,%r15
sub    %ebp,%ebx
mov    %ebx,%edi
call   1030 <factorial@plt>
mov    %rax,%rcx
imul   %r15,%rcx
mov    %r14,%rax
or     %rcx,%rax
shr    $0x20,%rax
je     1153 <num+0x43>
mov    %r14,%rax
cqto
idiv   %rcx
jmp    115a <num+0x4a>
mov    %r14d,%eax
xor    %edx,%edx
div    %ecx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @num(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%9 = load i32, i32* %3
%10 = call i64 @factorial(i32 %9)
store i64 %10, i64* %5
%11 = load i32, i32* %4
%12 = call i64 @factorial(i32 %11)
store i64 %12, i64* %6
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = sub nsw i32 %13, %14
%16 = call i64 @factorial(i32 %15)
store i64 %16, i64* %7
%17 = load i64, i64* %5
%18 = load i64, i64* %6
%19 = load i64, i64* %7
%20 = mul nsw i64 %18, %19
%21 = sdiv i64 %17, %20
%22 = trunc i64 %21 to i32
store i32 %22, i32* %8
%23 = load i32, i32* %8
ret i32 %23
}

LLVM IR (-O2):
define i32 @num(i32 %0, i32 %1) {
%3 = tail call i64 @factorial(i32 %0)
%4 = tail call i64 @factorial(i32 %1)
%5 = sub nsw i32 %0, %1
%6 = tail call i64 @factorial(i32 %5)
%7 = mul nsw i64 %6, %4
%8 = sdiv i64 %3, %7
%9 = trunc i64 %8 to i32
ret i32 %9
}
char *strcpy(char *dest, const char *src) {
  char *ret = dest;
  while (*src) {
    *dest++ = *src;
  }
  *dest = '\0';
  return ret;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     113d <strcpy+0x3d>
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
jmp    1114 <strcpy+0x14>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
mov    (%rsi),%dl
mov    %rdi,%rcx
test   %dl,%dl
je     111d <strcpy+0x1d>
mov    %rax,%rcx
nop
mov    %dl,(%rcx)
add    $0x1,%rcx
movzbl (%rsi),%edx
test   %dl,%dl
jne    1110 <strcpy+0x10>
movb   $0x0,(%rcx)
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %11, %2
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %16
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %3
store i8 %13, i8* %14
br label %7
16: ; preds = %7
%17 = load i8*, i8** %3
store i8 0, i8* %17
%18 = load i8*, i8** %5
ret i8* %18
}

LLVM IR (-O2):
define i8* @strcpy(i8* returned writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %11, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %9, %5 ], [ %3, %2 ]
%7 = phi i8* [ %8, %5 ], [ %0, %2 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
store i8 %6, i8* %7
%9 = load i8, i8* %1
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %5
11: ; preds = %5, %2
%12 = phi i8* [ %0, %2 ], [ %8, %5 ]
store i8 0, i8* %12
ret i8* %0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ const *packer_uint32_unpack(int /*<<< orphan*/ const *,
                                               int /*<<< orphan*/ *);
const uint8_t *packer_float_unpack(const uint8_t *buffer, float *value) {
  return packer_uint32_unpack(buffer, (uint32_t *)value);
}


x86 assembly (clang, -O0):
<packer_float_unpack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <packer_uint32_unpack@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<packer_float_unpack>:
jmp    1030 <packer_uint32_unpack@plt>

LLVM IR (-O0):
define i32* @packer_float_unpack(i32* %0, float* %1) {
%3 = alloca i32*
%4 = alloca float*
store i32* %0, i32** %3
store float* %1, float** %4
%5 = load i32*, i32** %3
%6 = load float*, float** %4
%7 = bitcast float* %6 to i32*
%8 = call i32* @packer_uint32_unpack(i32* %5, i32* %7)
ret i32* %8
}

LLVM IR (-O2):
define i32* @packer_float_unpack(i32* %0, float* %1) {
%3 = bitcast float* %1 to i32*
%4 = tail call i32* @packer_uint32_unpack(i32* %0, i32* %3)
ret i32* %4
}
signed long long f29(signed long long v_foo) {
  signed long long v_and = v_foo & 32766;
  signed long long v_shl = v_and << 49;
  return v_shl;
}


x86 assembly (clang, -O0):
<f29>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x7ffe,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shl    $0x31,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f29>:
mov    %rdi,%rax
and    $0x7ffe,%eax
shl    $0x31,%rax
ret

LLVM IR (-O0):
define i64 @f29(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %2
%5 = load i64, i64* %2
%6 = and i64 %5, 32766
store i64 %6, i64* %3
%7 = load i64, i64* %3
%8 = shl i64 %7, 49
store i64 %8, i64* %4
%9 = load i64, i64* %4
ret i64 %9
}

LLVM IR (-O2):
define i64 @f29(i64 %0) {
%2 = shl i64 %0, 49
%3 = and i64 %2, -1125899906842624
ret i64 %3
}
/* Variables and functions */
void *realloc(void *, size_t);
int try_realloc(void **ptr, size_t new_size) {
  void *reallocated_ptr = realloc(*ptr, new_size);
  if (!reallocated_ptr)
    return 0;
  *ptr = reallocated_ptr;
  return 1;
}


x86 assembly (clang, -O0):
<try_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <realloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    114b <try_realloc+0x3b>
movl   $0x0,-0x4(%rbp)
jmp    115d <try_realloc+0x4d>
mov    -0x20(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<try_realloc>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <realloc@plt>
test   %rax,%rax
je     112b <try_realloc+0x1b>
mov    %rax,(%rbx)
mov    $0x1,%eax
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @try_realloc(i8** %0, i64 %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i64
%6 = alloca i8*
store i8** %0, i8*** %4
store i64 %1, i64* %5
%7 = load i8**, i8*** %4
%8 = load i8*, i8** %7
%9 = load i64, i64* %5
%10 = call i8* @realloc(i8* %8, i64 %9)
store i8* %10, i8** %6
%11 = load i8*, i8** %6
%12 = icmp ne i8* %11, null
br i1 %12, label %14, label %13
13: ; preds = %2
store i32 0, i32* %3
br label %17
14: ; preds = %2
%15 = load i8*, i8** %6
%16 = load i8**, i8*** %4
store i8* %15, i8** %16
store i32 1, i32* %3
br label %17
17: ; preds = %14, %13
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @try_realloc(i8** nocapture %0, i64 %1) {
%3 = load i8*, i8** %0
%4 = tail call i8* @realloc(i8* %3, i64 %1)
%5 = icmp eq i8* %4, null
br i1 %5, label %7, label %6
6: ; preds = %2
store i8* %4, i8** %0
br label %7
7: ; preds = %2, %6
%8 = phi i32 [ 1, %6 ], [ 0, %2 ]
ret i32 %8
}