xunge/DecIR huggingface dataset:
/* Variables and functions */
int is_valid_in_Logout(size_t __tag) {
  switch (__tag) {
  case 49:
  case 56:
  case 34:
  case 347:
  case 58:
  case 354:
  case 355:
    return 1;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<is_valid_in_Logout>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
sub    $0x22,%rax
je     1186 <is_valid_in_Logout+0x86>
jmp    111f <is_valid_in_Logout+0x1f>
mov    -0x18(%rbp),%rax
sub    $0x31,%rax
je     1186 <is_valid_in_Logout+0x86>
jmp    1132 <is_valid_in_Logout+0x32>
mov    -0x18(%rbp),%rax
sub    $0x38,%rax
je     1186 <is_valid_in_Logout+0x86>
jmp    1145 <is_valid_in_Logout+0x45>
mov    -0x18(%rbp),%rax
sub    $0x3a,%rax
je     1186 <is_valid_in_Logout+0x86>
jmp    1158 <is_valid_in_Logout+0x58>
mov    -0x18(%rbp),%rax
sub    $0x15b,%rax
je     1186 <is_valid_in_Logout+0x86>
jmp    116d <is_valid_in_Logout+0x6d>
mov    -0x18(%rbp),%rax
add    $0xfffffffffffffe9e,%rax
sub    $0x1,%rax
ja     1192 <is_valid_in_Logout+0x92>
jmp    1186 <is_valid_in_Logout+0x86>
movl   $0x1,-0x4(%rbp)
jmp    1199 <is_valid_in_Logout+0x99>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_valid_in_Logout>:
mov    $0x1,%eax
cmp    $0x3a,%rdi
ja     111b <is_valid_in_Logout+0x1b>
movabs $0x502000400000000,%rcx
bt     %rdi,%rcx
jb     1133 <is_valid_in_Logout+0x33>
add    $0xfffffffffffffea5,%rdi
cmp    $0x8,%rdi
ja     1134 <is_valid_in_Logout+0x34>
mov    $0x181,%ecx
bt     %rdi,%rcx
jae    1134 <is_valid_in_Logout+0x34>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_valid_in_Logout(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
switch i64 %4, label %6 [
i64 49, label %5
i64 56, label %5
i64 34, label %5
i64 347, label %5
i64 58, label %5
i64 354, label %5
i64 355, label %5
]
5: ; preds = %1, %1, %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @is_valid_in_Logout(i64 %0) {
switch i64 %0, label %2 [
i64 49, label %3
i64 56, label %3
i64 34, label %3
i64 347, label %3
i64 58, label %3
i64 354, label %3
i64 355, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %1, %1, %2
%4 = phi i32 [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}
unsigned long foo(unsigned long long x, unsigned long y) {
  unsigned long a;
  x += y;
  asm("" : "=a"(a) : "A"(x), "rm"(y));
  return a;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    %rcx,-0x20(%rbp)
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
lea    (%rdi,%rsi,1),%rax
mov    %rsi,-0x8(%rsp)
ret

LLVM IR (-O0):
define i64 @foo(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = load i64, i64* %3
%8 = add i64 %7, %6
store i64 %8, i64* %3
%9 = load i64, i64* %3
%10 = load i64, i64* %4
%11 = call i64 asm "", "={ax},A,rm,~{dirflag},~{fpsr},~{flags}"(i64 %9, i64 %10)
store i64 %11, i64* %5
%12 = load i64, i64* %5
ret i64 %12
}

LLVM IR (-O2):
define i64 @foo(i64 %0, i64 %1) {
%3 = add i64 %1, %0
%4 = tail call i64 asm "", "={ax},A,rm,~{dirflag},~{fpsr},~{flags}"(i64 %3, i64 %1)
ret i64 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
scalar_t__ __rdrand32(int /*<<< orphan*/ *);
uint32_t rdrand32(void) {
  uint32_t val;
  while (__rdrand32(&val) == 0)
    ;
  return val;
}


x86 assembly (clang, -O0):
<rdrand32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
call   1030 <__rdrand32@plt>
cmp    $0x0,%rax
jne    1130 <rdrand32+0x20>
jmp    1118 <rdrand32+0x8>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rdrand32>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
nopw   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <__rdrand32@plt>
test   %rax,%rax
je     1120 <rdrand32+0x10>
mov    0xc(%rsp),%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @rdrand32() {
%1 = alloca i32
br label %2
2: ; preds = %5, %0
%3 = call i64 @__rdrand32(i32* %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %2
br label %2
6: ; preds = %2
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
define i32 @rdrand32() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
br label %3
3: ; preds = %3, %0
%4 = call i64 @__rdrand32(i32* %1)
%5 = icmp eq i64 %4, 0
br i1 %5, label %3, label %6
6: ; preds = %3
%7 = load i32, i32* %1
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ i();
int /*<<< orphan*/ j();
main() {
  i();
  j();
  abort();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <i@plt>
mov    $0x0,%al
call   1040 <j@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <i@plt>
xor    %eax,%eax
call   1040 <j@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @i()
%3 = call i32 (...) @j()
%4 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @i()
%2 = tail call i32 (...) @j()
%3 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
double rndu();
int rndBinomial(int n, double p) {
  int i, x = 0;
  for (i = 0; i < n; i++)
    if (rndu() < p)
      x++;
  return (x);
}


x86 assembly (clang, -O0):
<rndBinomial>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movsd  %xmm0,-0x10(%rbp)
movl   $0x0,-0x18(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    116f <rndBinomial+0x5f>
mov    $0x0,%al
call   1030 <rndu@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    115c <rndBinomial+0x4c>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1161 <rndBinomial+0x51>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112e <rndBinomial+0x1e>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rndBinomial>:
push   %rbp
push   %rbx
push   %rax
test   %edi,%edi
jle    113e <rndBinomial+0x2e>
mov    %edi,%ebx
xor    %ebp,%ebp
movsd  %xmm0,(%rsp)
xor    %eax,%eax
call   1030 <rndu@plt>
xor    %eax,%eax
movsd  (%rsp),%xmm1
ucomisd %xmm0,%xmm1
seta   %al
add    %eax,%ebp
add    $0xffffffff,%ebx
jne    1120 <rndBinomial+0x10>
jmp    1140 <rndBinomial+0x30>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @rndBinomial(i32 %0, double %1) {
%3 = alloca i32
%4 = alloca double
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store double %1, double* %4
store i32 0, i32* %6
store i32 0, i32* %5
br label %7
7: ; preds = %19, %2
%8 = load i32, i32* %5
%9 = load i32, i32* %3
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %22
11: ; preds = %7
%12 = call double (...) @rndu()
%13 = load double, double* %4
%14 = fcmp olt double %12, %13
br i1 %14, label %15, label %18
15: ; preds = %11
%16 = load i32, i32* %6
%17 = add nsw i32 %16, 1
store i32 %17, i32* %6
br label %18
18: ; preds = %15, %11
br label %19
19: ; preds = %18
%20 = load i32, i32* %5
%21 = add nsw i32 %20, 1
store i32 %21, i32* %5
br label %7
22: ; preds = %7
%23 = load i32, i32* %6
ret i32 %23
}

LLVM IR (-O2):
define i32 @rndBinomial(i32 %0, double %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %13
4: ; preds = %2, %4
%5 = phi i32 [ %10, %4 ], [ 0, %2 ]
%6 = phi i32 [ %11, %4 ], [ 0, %2 ]
%7 = tail call double (...) @rndu()
%8 = fcmp olt double %7, %1
%9 = zext i1 %8 to i32
%10 = add nuw nsw i32 %5, %9
%11 = add nuw nsw i32 %6, 1
%12 = icmp eq i32 %11, %0
br i1 %12, label %13, label %4
13: ; preds = %4, %2
%14 = phi i32 [ 0, %2 ], [ %10, %4 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char **argv) {
  printf("PASS\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"PASS\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [5 x i8] c"PASS\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
float copysignf(float x, float y) {
  union {
    float f;
    uint32_t i;
  } ux = {x}, uy = {y};
  ux.i &= 0x7fffffff;
  ux.i |= uy.i & 0x80000000;
  return ux.f;
}


x86 assembly (clang, -O0):
<copysignf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
mov    -0x10(%rbp),%eax
and    $0x7fffffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x18(%rbp),%eax
and    $0x80000000,%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<copysignf>:
movd   %xmm0,%eax
and    $0x7fffffff,%eax
movmskps %xmm1,%ecx
shl    $0x1f,%ecx
or     %eax,%ecx
movd   %ecx,%xmm0
ret

LLVM IR (-O0):
%union.anon = type { float }
define float @copysignf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca %union.anon
%6 = alloca %union.anon
store float %0, float* %3
store float %1, float* %4
%7 = bitcast %union.anon* %5 to float*
%8 = load float, float* %3
store float %8, float* %7
%9 = bitcast %union.anon* %6 to float*
%10 = load float, float* %4
store float %10, float* %9
%11 = bitcast %union.anon* %5 to i32*
%12 = load i32, i32* %11
%13 = and i32 %12, 2147483647
store i32 %13, i32* %11
%14 = bitcast %union.anon* %6 to i32*
%15 = load i32, i32* %14
%16 = and i32 %15, -2147483648
%17 = bitcast %union.anon* %5 to i32*
%18 = load i32, i32* %17
%19 = or i32 %18, %16
store i32 %19, i32* %17
%20 = bitcast %union.anon* %5 to float*
%21 = load float, float* %20
ret float %21
}

LLVM IR (-O2):
define float @copysignf(float %0, float %1) {
%3 = bitcast float %0 to i32
%4 = and i32 %3, 2147483647
%5 = bitcast float %1 to i32
%6 = and i32 %5, -2147483648
%7 = or i32 %6, %4
%8 = bitcast i32 %7 to float
ret float %8
}
/* Variables and functions */
scalar_t__ fminl(long double, long double);
int /*<<< orphan*/ link_failure_fminl();
void test_fminl(long double ld1, long double ld2) {
  if (fminl(ld1, ld2) != fminl(ld1, ld2))
    link_failure_fminl();
}


x86 assembly (clang, -O0):
<test_fminl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
call   1040 <fminl@plt>
mov    %rax,-0x28(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
call   1040 <fminl@plt>
mov    %rax,%rcx
mov    -0x28(%rbp),%rax
cmp    %rcx,%rax
je     1175 <test_fminl+0x55>
mov    $0x0,%al
call   1030 <link_failure_fminl@plt>
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_fminl>:
push   %rbx
sub    $0x40,%rsp
fldt   0x50(%rsp)
fld    %st(0)
fstpt  0x34(%rsp)
fldt   0x60(%rsp)
fld    %st(0)
fstpt  0x28(%rsp)
fstpt  0x10(%rsp)
fstpt  (%rsp)
call   1040 <fminl@plt>
mov    %rax,%rbx
fldt   0x28(%rsp)
fstpt  0x10(%rsp)
fldt   0x34(%rsp)
fstpt  (%rsp)
call   1040 <fminl@plt>
cmp    %rax,%rbx
jne    1167 <test_fminl+0x47>
add    $0x40,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbx
jmp    1030 <link_failure_fminl@plt>

LLVM IR (-O0):
define void @test_fminl(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %4
%7 = call i64 @fminl(x86_fp80 %5, x86_fp80 %6)
%8 = load x86_fp80, x86_fp80* %3
%9 = load x86_fp80, x86_fp80* %4
%10 = call i64 @fminl(x86_fp80 %8, x86_fp80 %9)
%11 = icmp ne i64 %7, %10
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = call i32 (...) @link_failure_fminl()
br label %14
14: ; preds = %12, %2
ret void
}

LLVM IR (-O2):
define void @test_fminl(x86_fp80 %0, x86_fp80 %1) {
%3 = tail call i64 @fminl(x86_fp80 %0, x86_fp80 %1)
%4 = tail call i64 @fminl(x86_fp80 %0, x86_fp80 %1)
%5 = icmp eq i64 %3, %4
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 (...) @link_failure_fminl()
br label %8
8: ; preds = %6, %2
ret void
}
int test_imm_0Auint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0x0A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Auint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0xa,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Auint64_highword_reg>:
movabs $0xa00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Auint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 10
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_0Auint64_highword_reg(i64 %0) {
%2 = and i64 %0, 42949672960
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
float __ocml_fma_f32(float, float, float);
float fmaf(float x, float y, float z) { return __ocml_fma_f32(x, y, z); }


x86 assembly (clang, -O0):
<fmaf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm2
call   1030 <__ocml_fma_f32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmaf>:
jmp    1030 <__ocml_fma_f32@plt>

LLVM IR (-O0):
define float @fmaf(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = load float, float* %6
%10 = call float @__ocml_fma_f32(float %7, float %8, float %9)
ret float %10
}

LLVM IR (-O2):
define float @fmaf(float %0, float %1, float %2) {
%4 = tail call float @__ocml_fma_f32(float %0, float %1, float %2)
ret float %4
}
/* Variables and functions */
size_t _memory_usable_size(void *);
size_t rpmalloc_usable_size(void *ptr) {
  return (ptr ? _memory_usable_size(ptr) : 0);
}


x86 assembly (clang, -O0):
<rpmalloc_usable_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1139 <rpmalloc_usable_size+0x29>
mov    -0x8(%rbp),%rdi
call   1030 <_memory_usable_size@plt>
mov    %rax,-0x10(%rbp)
jmp    1144 <rpmalloc_usable_size+0x34>
xor    %eax,%eax
mov    %rax,-0x10(%rbp)
jmp    1144 <rpmalloc_usable_size+0x34>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpmalloc_usable_size>:
test   %rdi,%rdi
je     111a <rpmalloc_usable_size+0xa>
jmp    1030 <_memory_usable_size@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @rpmalloc_usable_size(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i64 @_memory_usable_size(i8* %6)
br label %9
8: ; preds = %1
br label %9
9: ; preds = %8, %5
%10 = phi i64 [ %7, %5 ], [ 0, %8 ]
ret i64 %10
}

LLVM IR (-O2):
define i64 @rpmalloc_usable_size(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i64 @_memory_usable_size(i8* %0)
br label %5
5: ; preds = %1, %3
%6 = phi i64 [ %4, %3 ], [ 0, %1 ]
ret i64 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ val;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ SEEK_SET;
int /*<<< orphan*/ lseek(int, int, int /*<<< orphan*/);
int write(int, int /*<<< orphan*/ *, int);
int pci_config_write_dword(int fd, int reg, uint32_t val) {
  int ret;
  lseek(fd, reg << 2, SEEK_SET);
  ret = write(fd, &val, sizeof(val));
  return ret;
}


x86 assembly (clang, -O0):
<pci_config_write_dword>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
shl    $0x2,%esi
mov    0x2e9f(%rip),%rax
mov    (%rax),%edx
call   1040 <lseek@plt>
mov    -0x4(%rbp),%edi
lea    -0xc(%rbp),%rsi
mov    $0x4,%edx
call   1030 <write@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_config_write_dword>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
mov    %edx,0xc(%rsp)
shl    $0x2,%esi
mov    0x2eab(%rip),%rax
mov    (%rax),%edx
call   1040 <lseek@plt>
lea    0xc(%rsp),%rsi
mov    %ebx,%edi
mov    $0x4,%edx
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@SEEK_SET = global i32 0
define i32 @pci_config_write_dword(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = shl i32 %9, 2
%11 = load i32, i32* @SEEK_SET
%12 = call i32 @lseek(i32 %8, i32 %10, i32 %11)
%13 = load i32, i32* %4
%14 = call i32 @write(i32 %13, i32* %6, i32 4)
store i32 %14, i32* %7
%15 = load i32, i32* %7
ret i32 %15
}

LLVM IR (-O2):
@SEEK_SET = global i32 0
define i32 @pci_config_write_dword(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
store i32 %2, i32* %4
%5 = shl i32 %1, 2
%6 = load i32, i32* @SEEK_SET
%7 = tail call i32 @lseek(i32 %0, i32 %5, i32 %6)
%8 = call i32 @write(i32 %0, i32* %4, i32 4)
ret i32 %8
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void AnsiTerm_cursor_fwd(uint16_t cells) { printf("\x1B[%dC", cells); }


x86 assembly (clang, -O0):
<AnsiTerm_cursor_fwd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AnsiTerm_cursor_fwd>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"\1B[%dC\00"
define void @AnsiTerm_cursor_fwd(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"\1B[%dC\00"
define void @AnsiTerm_cursor_fwd(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
int pathcon_nm7_n_in(void) { return 2; }


x86 assembly (clang, -O0):
<pathcon_nm7_n_in>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm7_n_in>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @pathcon_nm7_n_in() {
ret i32 2
}

LLVM IR (-O2):
define i32 @pathcon_nm7_n_in() {
ret i32 2
}
int test_imm_B7int32_mem(int *val) {
  return ((*val) & (0xB7 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B7int32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xb7,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B7int32_mem>:
testb  $0xb7,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B7int32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 183
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_B7int32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 183
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ back_sub();
int /*<<< orphan*/ guass_pthreads2();
int /*<<< orphan*/ print_data();
int /*<<< orphan*/ print_result();
int /*<<< orphan*/ printf(char *);
void parallel_pthreads() {
  printf("\tExecuting in Parallel using Pthreads.\n");
  guass_pthreads2();
  print_data();
  back_sub();
  print_result();
}


x86 assembly (clang, -O0):
<parallel_pthreads>:
push   %rbp
mov    %rsp,%rbp
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1060 <guass_pthreads2@plt>
mov    $0x0,%al
call   1050 <print_data@plt>
mov    $0x0,%al
call   1070 <back_sub@plt>
mov    $0x0,%al
call   1040 <print_result@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<parallel_pthreads>:
push   %rax
lea    0xea8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1060 <guass_pthreads2@plt>
xor    %eax,%eax
call   1050 <print_data@plt>
xor    %eax,%eax
call   1070 <back_sub@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <print_result@plt>

LLVM IR (-O0):
@.str = [40 x i8] c"\09Executing in Parallel using Pthreads.\0A\00"
define void @parallel_pthreads() {
%1 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @guass_pthreads2()
%3 = call i32 (...) @print_data()
%4 = call i32 (...) @back_sub()
%5 = call i32 (...) @print_result()
ret void
}

LLVM IR (-O2):
@str = [39 x i8] c"\09Executing in Parallel using Pthreads.\00"
define void @parallel_pthreads() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @guass_pthreads2()
%3 = tail call i32 (...) @print_data()
%4 = tail call i32 (...) @back_sub()
%5 = tail call i32 (...) @print_result()
ret void
}
/* Variables and functions */
scalar_t__ angle_normalize(float);
scalar_t__ atan2(double const, double const);
float TransformPoint(const double Point1X, const double Point1Y,
                     const double Point2X, const double Point2Y) {
  return (float)angle_normalize(
      (float)atan2(Point1Y - Point2Y, Point1X - Point2X));
}


x86 assembly (clang, -O0):
<TransformPoint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
subsd  -0x20(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
subsd  -0x18(%rbp),%xmm1
call   1030 <atan2@plt>
cvtsi2ss %rax,%xmm0
call   1040 <angle_normalize@plt>
cvtsi2ss %rax,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TransformPoint>:
push   %rax
movapd %xmm0,%xmm4
subsd  %xmm3,%xmm1
subsd  %xmm2,%xmm4
movapd %xmm1,%xmm0
movapd %xmm4,%xmm1
call   1030 <atan2@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
call   1040 <angle_normalize@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @TransformPoint(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%9 = load double, double* %6
%10 = load double, double* %8
%11 = fsub double %9, %10
%12 = load double, double* %5
%13 = load double, double* %7
%14 = fsub double %12, %13
%15 = call i64 @atan2(double %11, double %14)
%16 = sitofp i64 %15 to float
%17 = call i64 @angle_normalize(float %16)
%18 = sitofp i64 %17 to float
ret float %18
}

LLVM IR (-O2):
define float @TransformPoint(double %0, double %1, double %2, double %3) {
%5 = fsub double %1, %3
%6 = fsub double %0, %2
%7 = tail call i64 @atan2(double %5, double %6)
%8 = sitofp i64 %7 to float
%9 = tail call i64 @angle_normalize(float %8)
%10 = sitofp i64 %9 to float
ret float %10
}
int main(void) {
  struct test *a;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.test = type opaque
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.test*
store i32 0, i32* %1
ret i32 0
}

LLVM IR (-O2):
%struct.test = type opaque
define i32 @main() {
ret i32 0
}
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
int /*<<< orphan*/ flip2(unsigned short *, unsigned short *, int);
int read(int, unsigned short *, size_t);
ssize_t read_uint2_array(int f, unsigned short *iarray, size_t n) {
  ssize_t nread = read(f, iarray, n * 2);
  if (nread <= 0)
    return 0;
  flip2(iarray, iarray, nread / 2);
  return nread / 2;
}


x86 assembly (clang, -O0):
<read_uint2_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
shl    $0x1,%rdx
call   1030 <read@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jg     1160 <read_uint2_array+0x40>
movl   $0x0,-0x4(%rbp)
jmp    1188 <read_uint2_array+0x68>
mov    -0x10(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x1c(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%edx
call   1040 <flip2@plt>
mov    -0x1c(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_uint2_array>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
add    %rdx,%rdx
call   1030 <read@plt>
test   %eax,%eax
jle    1145 <read_uint2_array+0x25>
mov    %eax,%ebp
shr    %ebp
mov    %rbx,%rdi
mov    %rbx,%rsi
mov    %ebp,%edx
call   1040 <flip2@plt>
jmp    1147 <read_uint2_array+0x27>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @read_uint2_array(i32 %0, i16* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i16*
%7 = alloca i64
%8 = alloca i32
store i32 %0, i32* %5
store i16* %1, i16** %6
store i64 %2, i64* %7
%9 = load i32, i32* %5
%10 = load i16*, i16** %6
%11 = load i64, i64* %7
%12 = mul i64 %11, 2
%13 = call i32 @read(i32 %9, i16* %10, i64 %12)
store i32 %13, i32* %8
%14 = load i32, i32* %8
%15 = icmp sle i32 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %3
store i32 0, i32* %4
br label %25
17: ; preds = %3
%18 = load i16*, i16** %6
%19 = load i16*, i16** %6
%20 = load i32, i32* %8
%21 = sdiv i32 %20, 2
%22 = call i32 @flip2(i16* %18, i16* %19, i32 %21)
%23 = load i32, i32* %8
%24 = sdiv i32 %23, 2
store i32 %24, i32* %4
br label %25
25: ; preds = %17, %16
%26 = load i32, i32* %4
ret i32 %26
}

LLVM IR (-O2):
define i32 @read_uint2_array(i32 %0, i16* %1, i64 %2) {
%4 = shl i64 %2, 1
%5 = tail call i32 @read(i32 %0, i16* %1, i64 %4)
%6 = icmp slt i32 %5, 1
br i1 %6, label %10, label %7
7: ; preds = %3
%8 = lshr i32 %5, 1
%9 = tail call i32 @flip2(i16* %1, i16* %1, i32 %8)
br label %10
10: ; preds = %3, %7
%11 = phi i32 [ %8, %7 ], [ 0, %3 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void help(const char *program) {
  printf("Usage: %s [-B | -H | -L | -S] [-hpvx] [-b cdglmpu] [-s n[,m]] "
         "directory...\n",
         program);
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<help>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [76 x i8] c"Usage: %s [-B | -H | -L | -S] [-hpvx] [-b cdglmpu] [-s n[,m]] directory...\0A\00"
define void @help(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([76 x i8], [76 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [76 x i8] c"Usage: %s [-B | -H | -L | -S] [-hpvx] [-b cdglmpu] [-s n[,m]] directory...\0A\00"
define void @help(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([76 x i8], [76 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ WDIOC_GETTIMEOUT;
int /*<<< orphan*/ ioctl(int, int /*<<< orphan*/, int *);
int get_timeout_watchdog(int fd) {
  int timeout;
  ioctl(fd, WDIOC_GETTIMEOUT, &timeout);
  return timeout;
}


x86 assembly (clang, -O0):
<get_timeout_watchdog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ecb(%rip),%rax
mov    (%rax),%esi
lea    -0x8(%rbp),%rdx
call   1030 <ioctl@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_timeout_watchdog>:
push   %rax
mov    0x2ed8(%rip),%rax
mov    (%rax),%esi
lea    0x4(%rsp),%rdx
call   1030 <ioctl@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@WDIOC_GETTIMEOUT = global i32 0
define i32 @get_timeout_watchdog(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @WDIOC_GETTIMEOUT
%6 = call i32 @ioctl(i32 %4, i32 %5, i32* %3)
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
@WDIOC_GETTIMEOUT = global i32 0
define i32 @get_timeout_watchdog(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = load i32, i32* @WDIOC_GETTIMEOUT
%5 = call i32 @ioctl(i32 %0, i32 %4, i32* %2)
%6 = load i32, i32* %2
ret i32 %6
}
void task_semaphore_post(void) {}


x86 assembly (clang, -O0):
<task_semaphore_post>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<task_semaphore_post>:
ret

LLVM IR (-O0):
define void @task_semaphore_post() {
ret void
}

LLVM IR (-O2):
define void @task_semaphore_post() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sqlite3_vfs;

/* Variables and functions */
int SQLITE_OK;
int wrap_Access(sqlite3_vfs *pVfs, const char *zPath, int flags, int *pResOut) {
  *pResOut = 0;
  return SQLITE_OK;
}


x86 assembly (clang, -O0):
<wrap_Access>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movl   $0x0,(%rax)
mov    0x2ec4(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrap_Access>:
movl   $0x0,(%rcx)
mov    0x2edb(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@SQLITE_OK = global i32 0
define i32 @wrap_Access(i32* %0, i8* %1, i32 %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32*
store i32* %0, i32** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32* %3, i32** %8
%9 = load i32*, i32** %8
store i32 0, i32* %9
%10 = load i32, i32* @SQLITE_OK
ret i32 %10
}

LLVM IR (-O2):
@SQLITE_OK = global i32 0
define i32 @wrap_Access(i32* nocapture readnone %0, i8* nocapture readnone %1, i32 %2, i32* nocapture writeonly %3) {
store i32 0, i32* %3
%5 = load i32, i32* @SQLITE_OK
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint8_t *ld_amem(uint8_t *dst, uint16_t address) {
  *(dst++) = 0x32;
  *(dst++) = address & 0xFF;
  *(dst++) = address >> 8;
  return dst;
}


x86 assembly (clang, -O0):
<ld_amem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x4,%rcx
mov    %rcx,-0x8(%rbp)
movl   $0x32,(%rax)
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ld_amem>:
movl   $0x32,(%rdi)
movzbl %sil,%eax
mov    %eax,0x4(%rdi)
sar    $0x8,%esi
mov    %esi,0x8(%rdi)
lea    0xc(%rdi),%rax
ret

LLVM IR (-O0):
define i32* @ld_amem(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i32 1
store i32* %6, i32** %3
store i32 50, i32* %5
%7 = load i32, i32* %4
%8 = and i32 %7, 255
%9 = load i32*, i32** %3
%10 = getelementptr inbounds i32, i32* %9, i32 1
store i32* %10, i32** %3
store i32 %8, i32* %9
%11 = load i32, i32* %4
%12 = ashr i32 %11, 8
%13 = load i32*, i32** %3
%14 = getelementptr inbounds i32, i32* %13, i32 1
store i32* %14, i32** %3
store i32 %12, i32* %13
%15 = load i32*, i32** %3
ret i32* %15
}

LLVM IR (-O2):
define i32* @ld_amem(i32* writeonly %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 1
store i32 50, i32* %0
%4 = and i32 %1, 255
%5 = getelementptr inbounds i32, i32* %0, i64 2
store i32 %4, i32* %3
%6 = ashr i32 %1, 8
%7 = getelementptr inbounds i32, i32* %0, i64 3
store i32 %6, i32* %5
ret i32* %7
}
/* Variables and functions */
int /*<<< orphan*/ test_atomic_add();
int /*<<< orphan*/ test_spinlock();
int /*<<< orphan*/ test_workqueue();
void test_thread(void) {
  test_atomic_add();
  test_spinlock();
  test_workqueue();
}


x86 assembly (clang, -O0):
<test_thread>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <test_atomic_add@plt>
mov    $0x0,%al
call   1030 <test_spinlock@plt>
mov    $0x0,%al
call   1050 <test_workqueue@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_thread>:
push   %rax
xor    %eax,%eax
call   1040 <test_atomic_add@plt>
xor    %eax,%eax
call   1030 <test_spinlock@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <test_workqueue@plt>

LLVM IR (-O0):
define void @test_thread() {
%1 = call i32 (...) @test_atomic_add()
%2 = call i32 (...) @test_spinlock()
%3 = call i32 (...) @test_workqueue()
ret void
}

LLVM IR (-O2):
define void @test_thread() {
%1 = tail call i32 (...) @test_atomic_add()
%2 = tail call i32 (...) @test_spinlock()
%3 = tail call i32 (...) @test_workqueue()
ret void
}
void close_session_ocall() {}


x86 assembly (clang, -O0):
<close_session_ocall>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_session_ocall>:
ret

LLVM IR (-O0):
define void @close_session_ocall() {
ret void
}

LLVM IR (-O2):
define void @close_session_ocall() {
ret void
}
/* Type definitions */
struct hdhomerun_pkt_t {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct hdhomerun_pkt_t *);
void hdhomerun_pkt_destroy(struct hdhomerun_pkt_t *pkt) { free(pkt); }


x86 assembly (clang, -O0):
<hdhomerun_pkt_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdhomerun_pkt_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.hdhomerun_pkt_t = type { i32 }
define void @hdhomerun_pkt_destroy(%struct.hdhomerun_pkt_t* %0) {
%2 = alloca %struct.hdhomerun_pkt_t*
store %struct.hdhomerun_pkt_t* %0, %struct.hdhomerun_pkt_t** %2
%3 = load %struct.hdhomerun_pkt_t*, %struct.hdhomerun_pkt_t** %2
%4 = call i32 @free(%struct.hdhomerun_pkt_t* %3)
ret void
}

LLVM IR (-O2):
%struct.hdhomerun_pkt_t = type { i32 }
define void @hdhomerun_pkt_destroy(%struct.hdhomerun_pkt_t* nocapture %0) {
%2 = tail call i32 @free(%struct.hdhomerun_pkt_t* %0)
ret void
}
double idd(double x) { return (x); }


x86 assembly (clang, -O0):
<idd>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<idd>:
ret

LLVM IR (-O0):
define double @idd(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
ret double %3
}

LLVM IR (-O2):
define double @idd(double returned %0) {
ret double %0
}
/* Variables and functions */
int /*<<< orphan*/ funcao(int *);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int b = 0;
  funcao(&b);
  printf("%d", b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
call   1040 <funcao@plt>
mov    -0x8(%rbp),%esi
lea    0xeb7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1040 <funcao@plt>
mov    0x4(%rsp),%esi
lea    0xec2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = call i32 @funcao(i32* %2)
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%3 = call i32 @funcao(i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}
/* Variables and functions */
int heap_Walk(int /*<<< orphan*/, unsigned int const, float);
int heap_Malloc(const unsigned int size, float initialValue) {
  return heap_Walk(0, size, initialValue);
}


x86 assembly (clang, -O0):
<heap_Malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
mov    -0x4(%rbp),%esi
movss  -0x8(%rbp),%xmm0
xor    %edi,%edi
call   1030 <heap_Walk@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<heap_Malloc>:
mov    %edi,%esi
xor    %edi,%edi
jmp    1030 <heap_Walk@plt>

LLVM IR (-O0):
define i32 @heap_Malloc(i32 %0, float %1) {
%3 = alloca i32
%4 = alloca float
store i32 %0, i32* %3
store float %1, float* %4
%5 = load i32, i32* %3
%6 = load float, float* %4
%7 = call i32 @heap_Walk(i32 0, i32 %5, float %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @heap_Malloc(i32 %0, float %1) {
%3 = tail call i32 @heap_Walk(i32 0, i32 %0, float %1)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ rlim_t;

/* Variables and functions */
int fdlim_set(rlim_t lim, int hard) { return -1; }


x86 assembly (clang, -O0):
<fdlim_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdlim_set>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @fdlim_set(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 -1
}

LLVM IR (-O2):
define i32 @fdlim_set(i32 %0, i32 %1) {
ret i32 -1
}
/* Type definitions */
typedef int /*<<< orphan*/ X509;

/* Variables and functions */
scalar_t__ X509_cmp_current_time(int /*<<< orphan*/);
int /*<<< orphan*/ X509_get_notAfter(int /*<<< orphan*/ *);
int /*<<< orphan*/ X509_get_notBefore(int /*<<< orphan*/ *);
int ssl_x509_is_valid(X509 *crt) {
  if (X509_cmp_current_time(X509_get_notAfter(crt)) <= 0)
    return 0;
  if (X509_cmp_current_time(X509_get_notBefore(crt)) > 0)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<ssl_x509_is_valid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <X509_get_notAfter@plt>
mov    %eax,%edi
call   1050 <X509_cmp_current_time@plt>
cmp    $0x0,%rax
jg     1162 <ssl_x509_is_valid+0x32>
movl   $0x0,-0x4(%rbp)
jmp    118f <ssl_x509_is_valid+0x5f>
mov    -0x10(%rbp),%rdi
call   1040 <X509_get_notBefore@plt>
mov    %eax,%edi
call   1050 <X509_cmp_current_time@plt>
cmp    $0x0,%rax
jle    1188 <ssl_x509_is_valid+0x58>
movl   $0x0,-0x4(%rbp)
jmp    118f <ssl_x509_is_valid+0x5f>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssl_x509_is_valid>:
push   %rbx
mov    %rdi,%rbx
call   1030 <X509_get_notAfter@plt>
mov    %eax,%edi
call   1050 <X509_cmp_current_time@plt>
test   %rax,%rax
jle    1161 <ssl_x509_is_valid+0x31>
mov    %rbx,%rdi
call   1040 <X509_get_notBefore@plt>
mov    %eax,%edi
call   1050 <X509_cmp_current_time@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setle  %al
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ssl_x509_is_valid(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = call i32 @X509_get_notAfter(i32* %4)
%6 = call i64 @X509_cmp_current_time(i32 %5)
%7 = icmp sle i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %16
9: ; preds = %1
%10 = load i32*, i32** %3
%11 = call i32 @X509_get_notBefore(i32* %10)
%12 = call i64 @X509_cmp_current_time(i32 %11)
%13 = icmp sgt i64 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %9
store i32 0, i32* %2
br label %16
15: ; preds = %9
store i32 1, i32* %2
br label %16
16: ; preds = %15, %14, %8
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @ssl_x509_is_valid(i32* %0) {
%2 = tail call i32 @X509_get_notAfter(i32* %0)
%3 = tail call i64 @X509_cmp_current_time(i32 %2)
%4 = icmp slt i64 %3, 1
br i1 %4, label %10, label %5
5: ; preds = %1
%6 = tail call i32 @X509_get_notBefore(i32* %0)
%7 = tail call i64 @X509_cmp_current_time(i32 %6)
%8 = icmp slt i64 %7, 1
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %5, %1
%11 = phi i32 [ 0, %1 ], [ %9, %5 ]
ret i32 %11
}
void XtAppLock() {}


x86 assembly (clang, -O0):
<XtAppLock>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XtAppLock>:
ret

LLVM IR (-O0):
define void @XtAppLock() {
ret void
}

LLVM IR (-O2):
define void @XtAppLock() {
ret void
}
/* Variables and functions */
scalar_t__ round(double const);
long __Round(const double number) { return (long)round(number); }


x86 assembly (clang, -O0):
<__Round>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <round@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__Round>:
jmp    1030 <round@plt>

LLVM IR (-O0):
define i64 @__Round(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i64 @round(double %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @__Round(double %0) {
%2 = tail call i64 @round(double %0)
ret i64 %2
}
int add_auth_lct_he(void) {
  int len = 0;
  return len;
}


x86 assembly (clang, -O0):
<add_auth_lct_he>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_auth_lct_he>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @add_auth_lct_he() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @add_auth_lct_he() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;

/* Variables and functions */
int /*<<< orphan*/ timeByMoonphase(unsigned int, int);
time_t lunphi_next(const unsigned int lun, const int phi,
                   unsigned int *next_lun, int *next_phi) {
  unsigned int lunphi_next = ((lun << 2) | (phi & 3)) + 1;
  *next_lun = (lunphi_next >> 2);
  *next_phi = lunphi_next & 3;
  return timeByMoonphase(*next_lun, *next_phi);
}


x86 assembly (clang, -O0):
<lunphi_next>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x2,%eax
mov    -0x8(%rbp),%ecx
and    $0x3,%ecx
or     %ecx,%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%ecx
shr    $0x2,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x1c(%rbp),%ecx
and    $0x3,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
mov    -0x18(%rbp),%rax
mov    (%rax),%esi
call   1030 <timeByMoonphase@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lunphi_next>:
and    $0x3,%esi
lea    (%rsi,%rdi,4),%esi
add    $0x1,%esi
mov    %esi,%eax
shr    $0x2,%eax
mov    %eax,(%rdx)
and    $0x3,%esi
mov    %esi,(%rcx)
mov    (%rdx),%edi
jmp    1030 <timeByMoonphase@plt>

LLVM IR (-O0):
define i32 @lunphi_next(i32 %0, i32 %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%10 = load i32, i32* %5
%11 = shl i32 %10, 2
%12 = load i32, i32* %6
%13 = and i32 %12, 3
%14 = or i32 %11, %13
%15 = add i32 %14, 1
store i32 %15, i32* %9
%16 = load i32, i32* %9
%17 = lshr i32 %16, 2
%18 = load i32*, i32** %7
store i32 %17, i32* %18
%19 = load i32, i32* %9
%20 = and i32 %19, 3
%21 = load i32*, i32** %8
store i32 %20, i32* %21
%22 = load i32*, i32** %7
%23 = load i32, i32* %22
%24 = load i32*, i32** %8
%25 = load i32, i32* %24
%26 = call i32 @timeByMoonphase(i32 %23, i32 %25)
ret i32 %26
}

LLVM IR (-O2):
define i32 @lunphi_next(i32 %0, i32 %1, i32* nocapture %2, i32* nocapture writeonly %3) {
%5 = shl i32 %0, 2
%6 = and i32 %1, 3
%7 = or i32 %5, 1
%8 = add i32 %7, %6
%9 = lshr i32 %8, 2
store i32 %9, i32* %2
%10 = and i32 %8, 3
store i32 %10, i32* %3
%11 = load i32, i32* %2
%12 = tail call i32 @timeByMoonphase(i32 %11, i32 %10)
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ PPRELEASE;
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ ioctl(int, int /*<<< orphan*/);
void Parport_Close(int Device) {
  ioctl(Device, PPRELEASE);
  close(Device);
}


x86 assembly (clang, -O0):
<Parport_Close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
call   1030 <ioctl@plt>
mov    -0x4(%rbp),%edi
call   1040 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Parport_Close>:
push   %rbx
mov    %edi,%ebx
mov    0x2ec6(%rip),%rax
mov    (%rax),%esi
call   1030 <ioctl@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <close@plt>

LLVM IR (-O0):
@PPRELEASE = global i32 0
define void @Parport_Close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @PPRELEASE
%5 = call i32 @ioctl(i32 %3, i32 %4)
%6 = load i32, i32* %2
%7 = call i32 @close(i32 %6)
ret void
}

LLVM IR (-O2):
@PPRELEASE = global i32 0
define void @Parport_Close(i32 %0) {
%2 = load i32, i32* @PPRELEASE
%3 = tail call i32 @ioctl(i32 %0, i32 %2)
%4 = tail call i32 @close(i32 %0)
ret void
}
char *baseLib_GetMessage() { return "FromBaseLib"; }


x86 assembly (clang, -O0):
<baseLib_GetMessage>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<baseLib_GetMessage>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [12 x i8] c"FromBaseLib\00"
define i8* @baseLib_GetMessage() {
ret i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [12 x i8] c"FromBaseLib\00"
define i8* @baseLib_GetMessage() {
ret i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0)
}