xunge/DecIR huggingface dataset:
float AC_getRayleighPhase(float fCos2) { return 0.75 + 0.75 * fCos2; }


x86 assembly (clang, -O0):
<AC_getRayleighPhase>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xee6(%rip),%xmm1
mulsd  %xmm1,%xmm0
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<AC_getRayleighPhase>:
cvtss2sd %xmm0,%xmm0
movsd  0xef4(%rip),%xmm1
mulsd  %xmm1,%xmm0
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @AC_getRayleighPhase(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = call double @llvm.fmuladd.f64(double 7.500000e-01, double %4, double 7.500000e-01)
%6 = fptrunc double %5 to float
ret float %6
}

LLVM IR (-O2):
define float @AC_getRayleighPhase(float %0) {
%2 = fpext float %0 to double
%3 = tail call double @llvm.fmuladd.f64(double %2, double 7.500000e-01, double 7.500000e-01)
%4 = fptrunc double %3 to float
ret float %4
}
void mlx5_fpga_cleanup(struct mlx5_core_dev *mdev) {}


x86 assembly (clang, -O0):
<mlx5_fpga_cleanup>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mlx5_fpga_cleanup>:
ret

LLVM IR (-O0):
%struct.mlx5_core_dev = type opaque
define void @mlx5_fpga_cleanup(%struct.mlx5_core_dev* %0) {
%2 = alloca %struct.mlx5_core_dev*
store %struct.mlx5_core_dev* %0, %struct.mlx5_core_dev** %2
ret void
}

LLVM IR (-O2):
%struct.mlx5_core_dev = type opaque
define void @mlx5_fpga_cleanup(%struct.mlx5_core_dev* nocapture %0) {
ret void
}
void sol_modules_clear_cache(void) {}


x86 assembly (clang, -O0):
<sol_modules_clear_cache>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sol_modules_clear_cache>:
ret

LLVM IR (-O0):
define void @sol_modules_clear_cache() {
ret void
}

LLVM IR (-O2):
define void @sol_modules_clear_cache() {
ret void
}
/* Type definitions */
struct tl880_dev {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ tl880_write_register(struct tl880_dev *, int,
                                        unsigned short);
void tl880_init_mif_pll_eq(struct tl880_dev *tl880dev,
                           unsigned short reference) {
  tl880_write_register(tl880dev, 0x5400,
                       ((reference & 0x3ff) << 0x11) - 0x1e6e0);
}


x86 assembly (clang, -O0):
<tl880_init_mif_pll_eq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
movzwl -0xa(%rbp),%eax
and    $0x3ff,%eax
shl    $0x11,%eax
sub    $0x1e6e0,%eax
mov    $0x5400,%esi
movzwl %ax,%edx
call   1030 <tl880_write_register@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tl880_init_mif_pll_eq>:
mov    $0x5400,%esi
mov    $0x1920,%edx
jmp    1030 <tl880_write_register@plt>

LLVM IR (-O0):
%struct.tl880_dev = type { i32 }
define void @tl880_init_mif_pll_eq(%struct.tl880_dev* %0, i16 zeroext %1) {
%3 = alloca %struct.tl880_dev*
%4 = alloca i16
store %struct.tl880_dev* %0, %struct.tl880_dev** %3
store i16 %1, i16* %4
%5 = load %struct.tl880_dev*, %struct.tl880_dev** %3
%6 = load i16, i16* %4
%7 = zext i16 %6 to i32
%8 = and i32 %7, 1023
%9 = shl i32 %8, 17
%10 = sub nsw i32 %9, 124640
%11 = trunc i32 %10 to i16
%12 = call i32 @tl880_write_register(%struct.tl880_dev* %5, i32 21504, i16 zeroext %11)
ret void
}

LLVM IR (-O2):
%struct.tl880_dev = type { i32 }
define void @tl880_init_mif_pll_eq(%struct.tl880_dev* %0, i16 zeroext %1) {
%3 = tail call i32 @tl880_write_register(%struct.tl880_dev* %0, i32 21504, i16 zeroext 6432)
ret void
}
/* Variables and functions */
scalar_t__ get_next_input_from_fuzzer();
unsigned long map2check_non_det_sector_t() {
  return (unsigned long)get_next_input_from_fuzzer();
}


x86 assembly (clang, -O0):
<map2check_non_det_sector_t>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <get_next_input_from_fuzzer@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<map2check_non_det_sector_t>:
xor    %eax,%eax
jmp    1030 <get_next_input_from_fuzzer@plt>

LLVM IR (-O0):
define i64 @map2check_non_det_sector_t() {
%1 = call i64 (...) @get_next_input_from_fuzzer()
ret i64 %1
}

LLVM IR (-O2):
define i64 @map2check_non_det_sector_t() {
%1 = tail call i64 (...) @get_next_input_from_fuzzer()
ret i64 %1
}
unsigned char f8(unsigned char x, long int y) {
  return (x << y) | (x >> ((-y) & (8 - 1)));
}


x86 assembly (clang, -O0):
<f8>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movzbl -0x1(%rbp),%eax
mov    -0x10(%rbp),%rcx
shl    %cl,%eax
movzbl -0x1(%rbp),%edx
xor    %ecx,%ecx
sub    -0x10(%rbp),%rcx
and    $0x7,%rcx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f8>:
mov    %rsi,%rcx
mov    %edi,%eax
shl    %cl,%eax
neg    %cl
and    $0x7,%cl
shr    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @f8(i8 zeroext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
store i8 %0, i8* %3
store i64 %1, i64* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i64, i64* %4
%8 = trunc i64 %7 to i32
%9 = shl i32 %6, %8
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = load i64, i64* %4
%13 = sub nsw i64 0, %12
%14 = and i64 %13, 7
%15 = trunc i64 %14 to i32
%16 = ashr i32 %11, %15
%17 = or i32 %9, %16
%18 = trunc i32 %17 to i8
ret i8 %18
}

LLVM IR (-O2):
define zeroext i8 @f8(i8 zeroext %0, i64 %1) {
%3 = zext i8 %0 to i32
%4 = trunc i64 %1 to i32
%5 = shl i32 %3, %4
%6 = sub i32 0, %4
%7 = and i32 %6, 7
%8 = lshr i32 %3, %7
%9 = or i32 %8, %5
%10 = trunc i32 %9 to i8
ret i8 %10
}
/* Type definitions */
struct fdpack_s {
  int dummy;
};

/* Variables and functions */
int fd_close(struct fdpack_s *);
int fd_dtor_(struct fdpack_s *fd) { return fd_close(fd); }


x86 assembly (clang, -O0):
<fd_dtor_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fd_close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fd_dtor_>:
jmp    1030 <fd_close@plt>

LLVM IR (-O0):
%struct.fdpack_s = type { i32 }
define i32 @fd_dtor_(%struct.fdpack_s* %0) {
%2 = alloca %struct.fdpack_s*
store %struct.fdpack_s* %0, %struct.fdpack_s** %2
%3 = load %struct.fdpack_s*, %struct.fdpack_s** %2
%4 = call i32 @fd_close(%struct.fdpack_s* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.fdpack_s = type { i32 }
define i32 @fd_dtor_(%struct.fdpack_s* %0) {
%2 = tail call i32 @fd_close(%struct.fdpack_s* %0)
ret i32 %2
}
/* Type definitions */
struct ct_testsuite {
  int dummy;
};

/* Variables and functions */
size_t ct_runcount_withargs(int, struct ct_testsuite const *, int, char **);
size_t ct_runsuite_withargs(const struct ct_testsuite *suite, int argc,
                            char *argv[argc + 1]) {
  return ct_runcount_withargs(1, suite, argc, argv);
}


x86 assembly (clang, -O0):
<ct_runsuite_withargs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    $0x1,%edi
call   1030 <ct_runcount_withargs@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ct_runsuite_withargs>:
mov    %rdx,%rcx
mov    %esi,%edx
mov    %rdi,%rsi
mov    $0x1,%edi
jmp    1030 <ct_runcount_withargs@plt>

LLVM IR (-O0):
%struct.ct_testsuite = type { i32 }
define i64 @ct_runsuite_withargs(%struct.ct_testsuite* %0, i32 %1, i8** %2) {
%4 = alloca %struct.ct_testsuite*
%5 = alloca i32
%6 = alloca i8**
store %struct.ct_testsuite* %0, %struct.ct_testsuite** %4
store i32 %1, i32* %5
store i8** %2, i8*** %6
%7 = load i32, i32* %5
%8 = add nsw i32 %7, 1
%9 = zext i32 %8 to i64
%10 = load %struct.ct_testsuite*, %struct.ct_testsuite** %4
%11 = load i32, i32* %5
%12 = load i8**, i8*** %6
%13 = call i64 @ct_runcount_withargs(i32 1, %struct.ct_testsuite* %10, i32 %11, i8** %12)
ret i64 %13
}

LLVM IR (-O2):
%struct.ct_testsuite = type { i32 }
define i64 @ct_runsuite_withargs(%struct.ct_testsuite* %0, i32 %1, i8** %2) {
%4 = tail call i64 @ct_runcount_withargs(i32 1, %struct.ct_testsuite* %0, i32 %1, i8** %2)
ret i64 %4
}
void dfn_all(long long ll) {}


x86 assembly (clang, -O0):
<dfn_all>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dfn_all>:
ret

LLVM IR (-O0):
define void @dfn_all(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret void
}

LLVM IR (-O2):
define void @dfn_all(i64 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ trainer_dp_5(int /*<<< orphan*/);
void trainer_dp_5_launcher(void) { trainer_dp_5(0); }


x86 assembly (clang, -O0):
<trainer_dp_5_launcher>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <trainer_dp_5@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<trainer_dp_5_launcher>:
xor    %edi,%edi
jmp    1030 <trainer_dp_5@plt>

LLVM IR (-O0):
define void @trainer_dp_5_launcher() {
%1 = call i32 @trainer_dp_5(i32 0)
ret void
}

LLVM IR (-O2):
define void @trainer_dp_5_launcher() {
%1 = tail call i32 @trainer_dp_5(i32 0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wint_t;
typedef int /*<<< orphan*/ locale_t;

/* Variables and functions */
int iswprint(int /*<<< orphan*/);
int __iswprint_l(wint_t c, locale_t l) { return iswprint(c); }


x86 assembly (clang, -O0):
<__iswprint_l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <iswprint@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__iswprint_l>:
jmp    1030 <iswprint@plt>

LLVM IR (-O0):
define i32 @__iswprint_l(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @iswprint(i32 %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @__iswprint_l(i32 %0, i32 %1) {
%3 = tail call i32 @iswprint(i32 %0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char const *);
void err_dump(const char *x) {
  perror(x);
  exit(1);
}


x86 assembly (clang, -O0):
<err_dump>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<err_dump>:
push   %rax
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @err_dump(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @err_dump(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ test_avl_tree_child();
int /*<<< orphan*/ test_avl_tree_free();
int /*<<< orphan*/ test_avl_tree_insert_lookup();
int /*<<< orphan*/ test_avl_tree_lookup();
int /*<<< orphan*/ test_avl_tree_remove();
int /*<<< orphan*/ test_avl_tree_to_array();
int main(int argc, char *argv[]) {
  test_avl_tree_free();
  test_avl_tree_child();
  test_avl_tree_insert_lookup();
  test_avl_tree_lookup();
  test_avl_tree_remove();
  test_avl_tree_to_array();
  printf("PASS\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1090 <test_avl_tree_free@plt>
mov    $0x0,%al
call   1030 <test_avl_tree_child@plt>
mov    $0x0,%al
call   1060 <test_avl_tree_insert_lookup@plt>
mov    $0x0,%al
call   1070 <test_avl_tree_lookup@plt>
mov    $0x0,%al
call   1080 <test_avl_tree_remove@plt>
mov    $0x0,%al
call   1050 <test_avl_tree_to_array@plt>
lea    0xe49(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1090 <test_avl_tree_free@plt>
xor    %eax,%eax
call   1040 <test_avl_tree_child@plt>
xor    %eax,%eax
call   1060 <test_avl_tree_insert_lookup@plt>
xor    %eax,%eax
call   1070 <test_avl_tree_lookup@plt>
xor    %eax,%eax
call   1080 <test_avl_tree_remove@plt>
xor    %eax,%eax
call   1050 <test_avl_tree_to_array@plt>
lea    0xe5e(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"PASS\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @test_avl_tree_free()
%7 = call i32 (...) @test_avl_tree_child()
%8 = call i32 (...) @test_avl_tree_insert_lookup()
%9 = call i32 (...) @test_avl_tree_lookup()
%10 = call i32 (...) @test_avl_tree_remove()
%11 = call i32 (...) @test_avl_tree_to_array()
%12 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [5 x i8] c"PASS\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @test_avl_tree_free()
%4 = tail call i32 (...) @test_avl_tree_child()
%5 = tail call i32 (...) @test_avl_tree_insert_lookup()
%6 = tail call i32 (...) @test_avl_tree_lookup()
%7 = tail call i32 (...) @test_avl_tree_remove()
%8 = tail call i32 (...) @test_avl_tree_to_array()
%9 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ func2(void *);
void func1(void *ptr) { func2(ptr); }


x86 assembly (clang, -O0):
<func1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <func2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func1>:
jmp    1030 <func2@plt>

LLVM IR (-O0):
define void @func1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @func2(i8* %3)
ret void
}

LLVM IR (-O2):
define void @func1(i8* %0) {
%2 = tail call i32 @func2(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void print_int(int n) { printf("%d", n); }


x86 assembly (clang, -O0):
<print_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_int>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @print_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @print_int(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
bool SMPHTryAcquire(uint32_t ui32Semaphore) {
  uint32_t ui32SemaReg;

  ;
  ui32SemaReg = (*(
      (volatile unsigned long *)(0x40084000 + 0x00000000 + 4 * ui32Semaphore)));
  return (ui32SemaReg == 0x00000001);
}


x86 assembly (clang, -O0):
<SMPHTryAcquire>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x2,%eax
add    $0x40084000,%eax
cltq
mov    (%rax),%rax
mov    %eax,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SMPHTryAcquire>:
movslq %edi,%rax
mov    0x40084000(,%rax,4),%rcx
40
xor    %eax,%eax
cmp    $0x1,%ecx
sete   %al
ret

LLVM IR (-O0):
define i32 @SMPHTryAcquire(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 4, %4
%6 = add nsw i32 1074282496, %5
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = trunc i64 %9 to i32
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = icmp eq i32 %11, 1
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @SMPHTryAcquire(i32 %0) {
%2 = shl nsw i32 %0, 2
%3 = add nsw i32 %2, 1074282496
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = trunc i64 %6 to i32
%8 = icmp eq i32 %7, 1
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Type definitions */
typedef char const wchar_t;
typedef int /*<<< orphan*/ wc;

/* Variables and functions */
int mbstowcs(char const *, char const *, int);
wchar_t get_first_wchar(const char str[]) {
  wchar_t wc[2];
  return (mbstowcs(wc, str, (sizeof(wc) / sizeof((wc)[0]))) >= 1) ? wc[0]
                                                                  : str[0];
}


x86 assembly (clang, -O0):
<get_first_wchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0xa(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    $0x2,%edx
call   1030 <mbstowcs@plt>
cmp    $0x1,%eax
jl     1143 <get_first_wchar+0x33>
movsbl -0xa(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    114d <get_first_wchar+0x3d>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_first_wchar>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0xe(%rsp),%rdi
mov    %rbx,%rsi
mov    $0x2,%edx
call   1030 <mbstowcs@plt>
test   %eax,%eax
jle    1134 <get_first_wchar+0x24>
mov    0xe(%rsp),%al
jmp    1136 <get_first_wchar+0x26>
mov    (%rbx),%al
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define signext i8 @get_first_wchar(i8* %0) {
%2 = alloca i8*
%3 = alloca [2 x i8]
store i8* %0, i8** %2
%4 = getelementptr inbounds [2 x i8], [2 x i8]* %3, i64 0, i64 0
%5 = load i8*, i8** %2
%6 = call i32 @mbstowcs(i8* %4, i8* %5, i32 2)
%7 = icmp sge i32 %6, 1
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = getelementptr inbounds [2 x i8], [2 x i8]* %3, i64 0, i64 0
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
br label %17
12: ; preds = %1
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i64 0
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
br label %17
17: ; preds = %12, %8
%18 = phi i32 [ %11, %8 ], [ %16, %12 ]
%19 = trunc i32 %18 to i8
ret i8 %19
}

LLVM IR (-O2):
define signext i8 @get_first_wchar(i8* %0) {
%2 = alloca [2 x i8]
%3 = getelementptr inbounds [2 x i8], [2 x i8]* %2, i64 0, i64 0
%4 = call i32 @mbstowcs(i8* %3, i8* %0, i32 2)
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i8, i8* %3
br label %10
8: ; preds = %1
%9 = load i8, i8* %0
br label %10
10: ; preds = %8, %6
%11 = phi i8 [ %7, %6 ], [ %9, %8 ]
ret i8 %11
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isupper(int);
void t_isupper_0x52() {
  Assert_real((isupper(82)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              415, ("isupper should be 1 for R"));
}


x86 assembly (clang, -O0):
<t_isupper_0x52>:
push   %rbp
mov    %rsp,%rbp
mov    $0x52,%edi
call   1030 <isupper@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x19f,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0x52>:
push   %rax
mov    $0x52,%edi
call   1030 <isupper@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x19f,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [26 x i8] c"isupper should be 1 for R\00"
define void @t_isupper_0x52() {
%1 = call i32 @isupper(i32 82)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 415, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [26 x i8] c"isupper should be 1 for R\00"
define void @t_isupper_0x52() {
%1 = tail call i32 @isupper(i32 82)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 415, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ rgb2yuv(int /*<<< orphan*/);
int yuv_diff(int /*<<< orphan*/, int /*<<< orphan*/);
int Diff(uint32_t c1, uint32_t c2) {
  return yuv_diff(rgb2yuv(c1), rgb2yuv(c2));
}


x86 assembly (clang, -O0):
<Diff>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <rgb2yuv@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <rgb2yuv@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%esi
call   1040 <yuv_diff@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Diff>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
call   1030 <rgb2yuv@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1030 <rgb2yuv@plt>
mov    %ebp,%edi
mov    %eax,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <yuv_diff@plt>

LLVM IR (-O0):
define i32 @Diff(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @rgb2yuv(i32 %5)
%7 = load i32, i32* %4
%8 = call i32 @rgb2yuv(i32 %7)
%9 = call i32 @yuv_diff(i32 %6, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @Diff(i32 %0, i32 %1) {
%3 = tail call i32 @rgb2yuv(i32 %0)
%4 = tail call i32 @rgb2yuv(i32 %1)
%5 = tail call i32 @yuv_diff(i32 %3, i32 %4)
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;

/* Variables and functions */
int /*<<< orphan*/ __syscall(int);
uid_t geteuid(void) { return __syscall(201); }


x86 assembly (clang, -O0):
<geteuid>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc9,%edi
call   1030 <__syscall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<geteuid>:
mov    $0xc9,%edi
jmp    1030 <__syscall@plt>

LLVM IR (-O0):
define i32 @geteuid() {
%1 = call i32 @__syscall(i32 201)
ret i32 %1
}

LLVM IR (-O2):
define i32 @geteuid() {
%1 = tail call i32 @__syscall(i32 201)
ret i32 %1
}
/* Variables and functions */
scalar_t__ bitc_exiting();
int /*<<< orphan*/ peergroup_refill(int /*<<< orphan*/);
void peergroup_notify_destroy(void) {
  if (bitc_exiting()) {
    return;
  }
  peergroup_refill(0);
}


x86 assembly (clang, -O0):
<peergroup_notify_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <bitc_exiting@plt>
cmp    $0x0,%rax
je     113a <peergroup_notify_destroy+0x1a>
jmp    1141 <peergroup_notify_destroy+0x21>
xor    %edi,%edi
call   1030 <peergroup_refill@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<peergroup_notify_destroy>:
push   %rax
xor    %eax,%eax
call   1040 <bitc_exiting@plt>
test   %rax,%rax
je     112f <peergroup_notify_destroy+0xf>
pop    %rax
ret
xor    %edi,%edi
pop    %rax
jmp    1030 <peergroup_refill@plt>

LLVM IR (-O0):
define void @peergroup_notify_destroy() {
%1 = call i64 (...) @bitc_exiting()
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %4
3: ; preds = %0
br label %6
4: ; preds = %0
%5 = call i32 @peergroup_refill(i32 0)
br label %6
6: ; preds = %4, %3
ret void
}

LLVM IR (-O2):
define void @peergroup_notify_destroy() {
%1 = tail call i64 (...) @bitc_exiting()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @peergroup_refill(i32 0)
br label %5
5: ; preds = %0, %3
ret void
}
void ExitKeyHandler(void) {}


x86 assembly (clang, -O0):
<ExitKeyHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ExitKeyHandler>:
ret

LLVM IR (-O0):
define void @ExitKeyHandler() {
ret void
}

LLVM IR (-O2):
define void @ExitKeyHandler() {
ret void
}
/* Variables and functions */
scalar_t__ test_bad_unlock_helper1();
void *test_bad_unlock_helper1_wrap(void *v __attribute__((unused))) {
  return (void *)(intptr_t)test_bad_unlock_helper1();
}


x86 assembly (clang, -O0):
<test_bad_unlock_helper1_wrap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <test_bad_unlock_helper1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_bad_unlock_helper1_wrap>:
xor    %eax,%eax
jmp    1030 <test_bad_unlock_helper1@plt>

LLVM IR (-O0):
define i8* @test_bad_unlock_helper1_wrap(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i64 (...) @test_bad_unlock_helper1()
%4 = inttoptr i64 %3 to i8*
ret i8* %4
}

LLVM IR (-O2):
define i8* @test_bad_unlock_helper1_wrap(i8* nocapture readnone %0) {
%2 = tail call i64 (...) @test_bad_unlock_helper1()
%3 = inttoptr i64 %2 to i8*
ret i8* %3
}
void BN_rshift1(void) {}


x86 assembly (clang, -O0):
<BN_rshift1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_rshift1>:
ret

LLVM IR (-O0):
define void @BN_rshift1() {
ret void
}

LLVM IR (-O2):
define void @BN_rshift1() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int r;
  if (r) {
    r = 2;
  } else {
    r = 7;
  }
  int k = r;
  if (k >= 3) {
    assert(k < 7);
  }
  int l;
  if (l) {
    l = 37;
  } else {
    l = 42;
  }
  if (l <= 41) {
    assert(l > 37);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1135 <main+0x25>
movl   $0x2,-0x8(%rbp)
jmp    113c <main+0x2c>
movl   $0x7,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x3,-0xc(%rbp)
jl     115d <main+0x4d>
cmpl   $0x7,-0xc(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
cmpl   $0x0,-0x10(%rbp)
je     1173 <main+0x63>
movl   $0x25,-0x10(%rbp)
jmp    117a <main+0x6a>
movl   $0x2a,-0x10(%rbp)
cmpl   $0x29,-0x10(%rbp)
jg     1195 <main+0x85>
cmpl   $0x25,-0x10(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %0
store i32 2, i32* %2
br label %9
8: ; preds = %0
store i32 7, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = icmp sge i32 %11, 3
br i1 %12, label %13, label %18
13: ; preds = %9
%14 = load i32, i32* %3
%15 = icmp slt i32 %14, 7
%16 = zext i1 %15 to i32
%17 = call i32 @assert(i32 %16)
br label %18
18: ; preds = %13, %9
%19 = load i32, i32* %4
%20 = icmp ne i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %18
store i32 37, i32* %4
br label %23
22: ; preds = %18
store i32 42, i32* %4
br label %23
23: ; preds = %22, %21
%24 = load i32, i32* %4
%25 = icmp sle i32 %24, 41
br i1 %25, label %26, label %31
26: ; preds = %23
%27 = load i32, i32* %4
%28 = icmp sgt i32 %27, 37
%29 = zext i1 %28 to i32
%30 = call i32 @assert(i32 %29)
br label %31
31: ; preds = %26, %23
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 0)
ret i32 0
}
/* Variables and functions */
int O_CREAT;
int O_RDWR;
int O_TRUNC;
int rw_test(char const *, int, int, int, int);
int test_rw_short_trunc(const char *file) {
  return rw_test(file, 7, 26, O_CREAT | O_TRUNC | O_RDWR, 0777);
}


x86 assembly (clang, -O0):
<test_rw_short_trunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ed1(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec0(%rip),%rax
or     (%rax),%ecx
mov    0x2e9f(%rip),%rax
or     (%rax),%ecx
mov    $0x7,%esi
mov    $0x1a,%edx
mov    $0x1ff,%r8d
call   1030 <rw_test@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_rw_short_trunc>:
mov    0x2ee1(%rip),%rax
mov    0x2ed2(%rip),%rcx
mov    (%rcx),%ecx
or     (%rax),%ecx
mov    0x2eaf(%rip),%rax
or     (%rax),%ecx
mov    $0x7,%esi
mov    $0x1a,%edx
mov    $0x1ff,%r8d
jmp    1030 <rw_test@plt>

LLVM IR (-O0):
@O_CREAT = global i32 0
@O_TRUNC = global i32 0
@O_RDWR = global i32 0
define i32 @test_rw_short_trunc(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @O_CREAT
%5 = load i32, i32* @O_TRUNC
%6 = or i32 %4, %5
%7 = load i32, i32* @O_RDWR
%8 = or i32 %6, %7
%9 = call i32 @rw_test(i8* %3, i32 7, i32 26, i32 %8, i32 511)
ret i32 %9
}

LLVM IR (-O2):
@O_CREAT = global i32 0
@O_TRUNC = global i32 0
@O_RDWR = global i32 0
define i32 @test_rw_short_trunc(i8* %0) {
%2 = load i32, i32* @O_CREAT
%3 = load i32, i32* @O_TRUNC
%4 = or i32 %3, %2
%5 = load i32, i32* @O_RDWR
%6 = or i32 %4, %5
%7 = tail call i32 @rw_test(i8* %0, i32 7, i32 26, i32 %6, i32 511)
ret i32 %7
}
/* Type definitions */
struct stat {
  int st_size;
};

/* Variables and functions */
scalar_t__ stat(char const *, struct stat *);
int filesize(char const *filename) {
  struct stat st;
  if (stat(filename, &st) == 0)
    return st.st_size;
  else
    return (-1);
}


x86 assembly (clang, -O0):
<filesize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <stat@plt>
cmp    $0x0,%rax
jne    113e <filesize+0x2e>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1145 <filesize+0x35>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<filesize>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
neg    %rax
sbb    %eax,%eax
or     (%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @filesize(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.stat
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @stat(i8* %5, %struct.stat* %4)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%10 = load i32, i32* %9
store i32 %10, i32* %2
br label %12
11: ; preds = %1
store i32 -1, i32* %2
br label %12
12: ; preds = %11, %8
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @filesize(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i64 %4, 0
%6 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%7 = load i32, i32* %6
%8 = select i1 %5, i32 %7, i32 -1
ret i32 %8
}
/* Variables and functions */
scalar_t__ ft_islowercase(int);
int ft_toupper(int c) {
  if (ft_islowercase(c))
    c -= 32;
  return (c);
}


x86 assembly (clang, -O0):
<ft_toupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ft_islowercase@plt>
cmp    $0x0,%rax
je     1136 <ft_toupper+0x26>
mov    -0x4(%rbp),%eax
sub    $0x20,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_toupper>:
push   %rbx
mov    %edi,%ebx
call   1030 <ft_islowercase@plt>
lea    -0x20(%rbx),%ecx
test   %rax,%rax
cmove  %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ft_toupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @ft_islowercase(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 32
store i32 %8, i32* %2
br label %9
9: ; preds = %6, %1
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @ft_toupper(i32 %0) {
%2 = tail call i64 @ft_islowercase(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = add nsw i32 %0, -32
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
int ld_blt_rm2(long double a1, long double *a2) {
  return !(__builtin_isless(a1, *a2));
}


x86 assembly (clang, -O0):
<ld_blt_rm2>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
mov    %rdi,-0x18(%rbp)
fldt   -0x10(%rbp)
mov    -0x18(%rbp),%rax
fldt   (%rax)
fucomip %st(1),%st
fstp   %st(0)
seta   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ld_blt_rm2>:
fldt   0x8(%rsp)
fldt   (%rdi)
xor    %eax,%eax
fucomip %st(1),%st
fstp   %st(0)
setbe  %al
ret

LLVM IR (-O0):
define i32 @ld_blt_rm2(x86_fp80 %0, x86_fp80* %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80*
store x86_fp80 %0, x86_fp80* %3
store x86_fp80* %1, x86_fp80** %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load x86_fp80*, x86_fp80** %4
%7 = load x86_fp80, x86_fp80* %6
%8 = fcmp olt x86_fp80 %5, %7
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @ld_blt_rm2(x86_fp80 %0, x86_fp80* nocapture %1) {
%3 = load x86_fp80, x86_fp80* %1
%4 = fcmp ule x86_fp80 %3, %0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
void eeprom_write_int16(int, int);
void settings_set_motor_driver(int val) { return eeprom_write_int16(36, val); }


x86 assembly (clang, -O0):
<settings_set_motor_driver>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x24,%edi
call   1030 <eeprom_write_int16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<settings_set_motor_driver>:
mov    %edi,%esi
mov    $0x24,%edi
jmp    1030 <eeprom_write_int16@plt>

LLVM IR (-O0):
define void @settings_set_motor_driver(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret void
}

LLVM IR (-O2):
define void @settings_set_motor_driver(i32 %0) {
tail call void @eeprom_write_int16(i32 36, i32 %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *fopen(char const *, char const *);
FILE *hoof_hook_fopen(const char *path, const char *mode) {
  return fopen(path, mode);
}


x86 assembly (clang, -O0):
<hoof_hook_fopen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <fopen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hoof_hook_fopen>:
jmp    1030 <fopen@plt>

LLVM IR (-O0):
define i32* @hoof_hook_fopen(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32* @fopen(i8* %5, i8* %6)
ret i32* %7
}

LLVM IR (-O2):
define noalias i32* @hoof_hook_fopen(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32* @fopen(i8* %0, i8* %1)
ret i32* %3
}
/* Type definitions */
struct conf_sect {
  int dummy;
};

/* Variables and functions */
struct conf_sect *find_sect(char const *);
struct conf_sect *conf_get_sect(const char *name) {
  return find_sect(name);
}


x86 assembly (clang, -O0):
<conf_get_sect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <find_sect@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<conf_get_sect>:
jmp    1030 <find_sect@plt>

LLVM IR (-O0):
%struct.conf_sect = type { i32 }
define %struct.conf_sect* @conf_get_sect(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call %struct.conf_sect* @find_sect(i8* %3)
ret %struct.conf_sect* %4
}

LLVM IR (-O2):
%struct.conf_sect = type { i32 }
define %struct.conf_sect* @conf_get_sect(i8* %0) {
%2 = tail call %struct.conf_sect* @find_sect(i8* %0)
ret %struct.conf_sect* %2
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ is_hint;
};
typedef TYPE_1__ XMotionEvent;

/* Variables and functions */
char get_XMotionEvent_is_hint(void *_p) {
  return (char)((XMotionEvent *)_p)->is_hint;
}


x86 assembly (clang, -O0):
<get_XMotionEvent_is_hint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XMotionEvent_is_hint>:
mov    (%rdi),%al
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define signext i8 @get_XMotionEvent_is_hint(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i8
ret i8 %7
}

LLVM IR (-O2):
define signext i8 @get_XMotionEvent_is_hint(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i8
ret i8 %4
}
/* Variables and functions */
int /*<<< orphan*/ EX_USAGE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(char *progname) {
  fprintf(stderr, "Usage: %s [-p] [-d yyyy.mm.dd] [-t hh:mm:ss]\n", progname);
  exit(EX_USAGE);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [46 x i8] c"Usage: %s [-p] [-d yyyy.mm.dd] [-t hh:mm:ss]\0A\00"
@EX_USAGE = global i32 0
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @EX_USAGE
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [46 x i8] c"Usage: %s [-p] [-d yyyy.mm.dd] [-t hh:mm:ss]\0A\00"
@EX_USAGE = global i32 0
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @EX_USAGE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
float const intBitsToFloat(int);
__attribute__((always_)) const float pow2if(int q) {
  return intBitsToFloat(((int32_t)(q + 0x7f)) << 23);
}


x86 assembly (clang, -O0):
<pow2if>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
add    $0x7f,%edi
shl    $0x17,%edi
call   1030 <intBitsToFloat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pow2if>:
shl    $0x17,%edi
add    $0x3f800000,%edi
jmp    1030 <intBitsToFloat@plt>

LLVM IR (-O0):
define float @pow2if(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 127
%5 = shl i32 %4, 23
%6 = call float @intBitsToFloat(i32 %5)
ret float %6
}

LLVM IR (-O2):
define float @pow2if(i32 %0) {
%2 = shl i32 %0, 23
%3 = add i32 %2, 1065353216
%4 = tail call float @intBitsToFloat(i32 %3)
ret float %4
}
void os_show_bitmap(int pic, int x, int y) {}


x86 assembly (clang, -O0):
<os_show_bitmap>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_show_bitmap>:
ret

LLVM IR (-O0):
define void @os_show_bitmap(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
define void @os_show_bitmap(i32 %0, i32 %1, i32 %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char **argv) {
  int i;
  for (i = 0; i < 100; i++)
    printf(">>> %d\n", i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x64,-0x14(%rbp)
jge    1154 <main+0x44>
mov    -0x14(%rbp),%esi
lea    0xebf(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112d <main+0x1d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xee3(%rip),%r14
nopl   (%rax)
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x64,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [8 x i8] c">>> %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
br label %7
7: ; preds = %13, %2
%8 = load i32, i32* %6
%9 = icmp slt i32 %8, 100
br i1 %9, label %10, label %16
10: ; preds = %7
%11 = load i32, i32* %6
%12 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %11)
br label %13
13: ; preds = %10
%14 = load i32, i32* %6
%15 = add nsw i32 %14, 1
store i32 %15, i32* %6
br label %7
16: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c">>> %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
br label %3
3: ; preds = %2, %3
%4 = phi i32 [ 0, %2 ], [ %6, %3 ]
%5 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = add nuw nsw i32 %4, 1
%7 = icmp eq i32 %6, 100
br i1 %7, label %8, label %3
8: ; preds = %3
ret i32 0
}
void Msp430AlarmC__0__Msp430Timer__overflow(void) {}


x86 assembly (clang, -O0):
<Msp430AlarmC__0__Msp430Timer__overflow>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430AlarmC__0__Msp430Timer__overflow>:
ret

LLVM IR (-O0):
define void @Msp430AlarmC__0__Msp430Timer__overflow() {
ret void
}

LLVM IR (-O2):
define void @Msp430AlarmC__0__Msp430Timer__overflow() {
ret void
}
void dd_pbl_ios_tapjoy_show_offers(void *viewcontroller) {}


x86 assembly (clang, -O0):
<dd_pbl_ios_tapjoy_show_offers>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dd_pbl_ios_tapjoy_show_offers>:
ret

LLVM IR (-O0):
define void @dd_pbl_ios_tapjoy_show_offers(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @dd_pbl_ios_tapjoy_show_offers(i8* nocapture %0) {
ret void
}
int kpt_max(const int a, const int b) { return a > b ? a : b; }


x86 assembly (clang, -O0):
<kpt_max>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <kpt_max+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <kpt_max+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kpt_max>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @kpt_max(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @kpt_max(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
void SteamAPI_ISteamMatchmakingPlayersResponse_PlayersRefreshComplete(
    void *self) {
  xlogf("%s(self = %p)\n", __func__, self);
}


x86 assembly (clang, -O0):
<SteamAPI_ISteamMatchmakingPlayersResponse_PlayersRefreshComplete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xee1(%rip),%rsi
mov    $0x0,%al
call   1030 <xlogf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SteamAPI_ISteamMatchmakingPlayersResponse_PlayersRefreshComplete>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xeee(%rip),%rsi
xor    %eax,%eax
jmp    1030 <xlogf@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"%s(self = %p)\0A\00"
@__func__.SteamAPI_ISteamMatchmakingPlayersResponse_PlayersRefreshComplete = [65 x i8] c"SteamAPI_ISteamMatchmakingPlayersResponse_PlayersRefreshComplete\00"
define void @SteamAPI_ISteamMatchmakingPlayersResponse_PlayersRefreshComplete(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @xlogf to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([65 x i8], [65 x i8]* @__func__.SteamAPI_ISteamMatchmakingPlayersResponse_PlayersRefreshComplete, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"%s(self = %p)\0A\00"
@__func__.SteamAPI_ISteamMatchmakingPlayersResponse_PlayersRefreshComplete = [65 x i8] c"SteamAPI_ISteamMatchmakingPlayersResponse_PlayersRefreshComplete\00"
define void @SteamAPI_ISteamMatchmakingPlayersResponse_PlayersRefreshComplete(i8* %0) {
%2 = tail call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @xlogf to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([65 x i8], [65 x i8]* @__func__.SteamAPI_ISteamMatchmakingPlayersResponse_PlayersRefreshComplete, i64 0, i64 0), i8* %0)
ret void
}
int ioprio2prio(int ioprio) { return ioprio & ((1 << 13) - 1); }


x86 assembly (clang, -O0):
<ioprio2prio>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1fff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ioprio2prio>:
mov    %edi,%eax
and    $0x1fff,%eax
ret

LLVM IR (-O0):
define i32 @ioprio2prio(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 8191
ret i32 %4
}

LLVM IR (-O2):
define i32 @ioprio2prio(i32 %0) {
%2 = and i32 %0, 8191
ret i32 %2
}
void ft_str_swap(char **s1, char **s2) {
  char *str;
  str = *s1;
  *s1 = *s2;
  *s2 = str;
}


x86 assembly (clang, -O0):
<ft_str_swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_str_swap>:
mov    (%rdi),%rax
mov    (%rsi),%rcx
mov    %rcx,(%rdi)
mov    %rax,(%rsi)
ret

LLVM IR (-O0):
define void @ft_str_swap(i8** %0, i8** %1) {
%3 = alloca i8**
%4 = alloca i8**
%5 = alloca i8*
store i8** %0, i8*** %3
store i8** %1, i8*** %4
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %6
store i8* %7, i8** %5
%8 = load i8**, i8*** %4
%9 = load i8*, i8** %8
%10 = load i8**, i8*** %3
store i8* %9, i8** %10
%11 = load i8*, i8** %5
%12 = load i8**, i8*** %4
store i8* %11, i8** %12
ret void
}

LLVM IR (-O2):
define void @ft_str_swap(i8** nocapture %0, i8** nocapture %1) {
%3 = load i8*, i8** %0
%4 = load i8*, i8** %1
store i8* %4, i8** %0
store i8* %3, i8** %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __you_should_not_call_printf_from_wrpc_sw();
int printf(const char *fmt, ...) {
  __you_should_not_call_printf_from_wrpc_sw();
  return 0;
}


x86 assembly (clang, -O0):
<printf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    %eax,-0xc(%rbp)
call   1030 <__you_should_not_call_printf_from_wrpc_sw@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printf>:
push   %rax
xor    %eax,%eax
call   1030 <__you_should_not_call_printf_from_wrpc_sw@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @printf(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @__you_should_not_call_printf_from_wrpc_sw()
ret i32 0
}

LLVM IR (-O2):
define i32 @printf(i8* nocapture readnone %0, ...) {
%2 = tail call i32 (...) @__you_should_not_call_printf_from_wrpc_sw()
ret i32 0
}