xunge/DecIR huggingface dataset:
char *test_myAdd_bigBrother(const char **_ja_name) {
  do {
    *_ja_name = __func__;
    if (!(myAdd(2, 2) == 5))
      return "2 + 2 == 5";
  } while (0);
  return 0;
}


x86 assembly (clang, -O0):
<test_myAdd_bigBrother>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
lea    0xed9(%rip),%rcx
mov    %rcx,(%rax)
mov    $0x2,%esi
mov    %esi,%edi
mov    $0x0,%al
call   1030 <myAdd@plt>
cmp    $0x5,%eax
je     1151 <test_myAdd_bigBrother+0x41>
lea    0xece(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    115e <test_myAdd_bigBrother+0x4e>
jmp    1156 <test_myAdd_bigBrother+0x46>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_myAdd_bigBrother>:
push   %rbx
lea    0xee8(%rip),%rax
mov    %rax,(%rdi)
xor    %ebx,%ebx
mov    $0x2,%edi
mov    $0x2,%esi
xor    %eax,%eax
call   1030 <myAdd@plt>
cmp    $0x5,%eax
lea    0xede(%rip),%rax
cmovne %rax,%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@__func__.test_myAdd_bigBrother = [22 x i8] c"test_myAdd_bigBrother\00"
@.str = [11 x i8] c"2 + 2 == 5\00"
define i8* @test_myAdd_bigBrother(i8** %0) {
%2 = alloca i8*
%3 = alloca i8**
store i8** %0, i8*** %3
br label %4
4: ; preds = %1
%5 = load i8**, i8*** %3
store i8* getelementptr inbounds ([22 x i8], [22 x i8]* @__func__.test_myAdd_bigBrother, i64 0, i64 0), i8** %5
%6 = call i32 (i32, i32, ...) bitcast (i32 (...)* @myAdd to i32 (i32, i32, ...)*)(i32 2, i32 2)
%7 = icmp eq i32 %6, 5
br i1 %7, label %9, label %8
8: ; preds = %4
store i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8** %2
br label %11
9: ; preds = %4
br label %10
10: ; preds = %9
store i8* null, i8** %2
br label %11
11: ; preds = %10, %8
%12 = load i8*, i8** %2
ret i8* %12
}

LLVM IR (-O2):
@__func__.test_myAdd_bigBrother = [22 x i8] c"test_myAdd_bigBrother\00"
@.str = [11 x i8] c"2 + 2 == 5\00"
define i8* @test_myAdd_bigBrother(i8** nocapture writeonly %0) {
store i8* getelementptr inbounds ([22 x i8], [22 x i8]* @__func__.test_myAdd_bigBrother, i64 0, i64 0), i8** %0
%2 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @myAdd to i32 (i32, i32, ...)*)(i32 2, i32 2)
%3 = icmp eq i32 %2, 5
%4 = select i1 %3, i8* null, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0)
ret i8* %4
}
void irq_null_dis(void) {}


x86 assembly (clang, -O0):
<irq_null_dis>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irq_null_dis>:
ret

LLVM IR (-O0):
define void @irq_null_dis() {
ret void
}

LLVM IR (-O2):
define void @irq_null_dis() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void error(const char *msg) { fprintf(stderr, "Error: %s\n", msg); }


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<error>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [11 x i8] c"Error: %s\0A\00"
define void @error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [11 x i8] c"Error: %s\0A\00"
define void @error(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DisableInterrupts();
int /*<<< orphan*/ clockGpioConfig();
int /*<<< orphan*/ i2cPowerOn();
void initializeTagPins() {
  clockGpioConfig();
  DisableInterrupts();
  i2cPowerOn();
}


x86 assembly (clang, -O0):
<initializeTagPins>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <clockGpioConfig@plt>
mov    $0x0,%al
call   1030 <DisableInterrupts@plt>
mov    $0x0,%al
call   1040 <i2cPowerOn@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<initializeTagPins>:
push   %rax
xor    %eax,%eax
call   1050 <clockGpioConfig@plt>
xor    %eax,%eax
call   1030 <DisableInterrupts@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <i2cPowerOn@plt>

LLVM IR (-O0):
define void @initializeTagPins() {
%1 = call i32 (...) @clockGpioConfig()
%2 = call i32 (...) @DisableInterrupts()
%3 = call i32 (...) @i2cPowerOn()
ret void
}

LLVM IR (-O2):
define void @initializeTagPins() {
%1 = tail call i32 (...) @clockGpioConfig()
%2 = tail call i32 (...) @DisableInterrupts()
%3 = tail call i32 (...) @i2cPowerOn()
ret void
}
void drawFPS(void) {}


x86 assembly (clang, -O0):
<drawFPS>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawFPS>:
ret

LLVM IR (-O0):
define void @drawFPS() {
ret void
}

LLVM IR (-O2):
define void @drawFPS() {
ret void
}
short test_60_2(short *mem) { return __atomic_fetch_xor(mem + 4, 1, 4); }


x86 assembly (clang, -O0):
<test_60_2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x8,%rcx
mov    %rcx,-0x18(%rbp)
movw   $0x1,-0xa(%rbp)
mov    -0xa(%rbp),%cx
mov    %cx,-0x10(%rbp)
mov    0x8(%rax),%ax
mov    %ax,-0xe(%rbp)
mov    -0xe(%rbp),%ax
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%dx
mov    %dx,%si
mov    %ax,%dx
mov    %edx,-0x24(%rbp)
xor    %esi,%edx
mov    %edx,-0x20(%rbp)
lock cmpxchg %dx,(%rcx)
sete   %cl
mov    %ax,-0x1a(%rbp)
test   $0x1,%cl
mov    %ax,-0xe(%rbp)
jne    1165 <test_60_2+0x65>
jmp    112d <test_60_2+0x2d>
mov    -0x1a(%rbp),%ax
mov    %ax,-0xc(%rbp)
movswl -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_60_2>:
movzwl 0x8(%rdi),%eax
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %eax,%ecx
xor    $0x1,%ecx
lock cmpxchg %cx,0x8(%rdi)
jne    1110 <test_60_2+0x10>
ret

LLVM IR (-O0):
define signext i16 @test_60_2(i16* %0) {
%2 = alloca i16*
%3 = alloca i16
%4 = alloca i16
store i16* %0, i16** %2
%5 = load i16*, i16** %2
%6 = getelementptr inbounds i16, i16* %5, i64 4
store i16 1, i16* %3
%7 = load i16, i16* %3
%8 = atomicrmw xor i16* %6, i16 %7 acq_rel
store i16 %8, i16* %4
%9 = load i16, i16* %4
ret i16 %9
}

LLVM IR (-O2):
define signext i16 @test_60_2(i16* nocapture %0) {
%2 = getelementptr inbounds i16, i16* %0, i64 4
%3 = atomicrmw xor i16* %2, i16 1 acq_rel
ret i16 %3
}
/* Variables and functions */
double log(double);
__attribute__((__weak__, __always___)) double softboundmpx_log(double x) {
  return log(x);
}


x86 assembly (clang, -O0):
<softboundmpx_log>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <log@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_log>:
jmp    1030 <log@plt>

LLVM IR (-O0):
define weak double @softboundmpx_log(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @log(double %3)
ret double %4
}

LLVM IR (-O2):
define weak double @softboundmpx_log(double %0) {
%2 = tail call double @log(double %0)
ret double %2
}
int test_imm_4Bint16_reg(short val) {
  return ((val) & (0x4B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_4Bint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x4b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_4Bint16_reg>:
test   $0x4b,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_4Bint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 75
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_4Bint16_reg(i16 signext %0) {
%2 = and i16 %0, 75
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void DAC_Init(void) {
  unsigned long volatile delay;
  (*((volatile uint32_t *)0x400FE108)) |= 0x00000002;
  delay = (*((volatile uint32_t *)0x400FE108));
  (*((volatile uint32_t *)0x40005508)) |= 0x0F;
  (*((volatile uint32_t *)0x40005400)) |= 0x0F;
  (*((volatile uint32_t *)0x4000551C)) |= 0x0F;
}


x86 assembly (clang, -O0):
<DAC_Init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400fe108,%eax
mov    (%rax),%ecx
or     $0x2,%ecx
mov    $0x400fe108,%eax
mov    %ecx,(%rax)
mov    $0x400fe108,%eax
mov    (%rax),%eax
cltq
mov    %rax,-0x8(%rbp)
mov    $0x40005508,%eax
mov    (%rax),%ecx
or     $0xf,%ecx
mov    $0x40005508,%eax
mov    %ecx,(%rax)
mov    $0x40005400,%eax
mov    (%rax),%ecx
or     $0xf,%ecx
mov    $0x40005400,%eax
mov    %ecx,(%rax)
mov    $0x4000551c,%eax
mov    (%rax),%ecx
or     $0xf,%ecx
mov    $0x4000551c,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<DAC_Init>:
orl    $0x2,0x400fe108
02
movslq 0x400fe108,%rax
40
mov    %rax,-0x8(%rsp)
orl    $0xf,0x40005508
0f
orl    $0xf,0x40005400
0f
orl    $0xf,0x4000551c
0f
ret

LLVM IR (-O0):
define void @DAC_Init() {
%1 = alloca i64
%2 = load volatile i32, i32* inttoptr (i64 1074782472 to i32*)
%3 = or i32 %2, 2
store volatile i32 %3, i32* inttoptr (i64 1074782472 to i32*)
%4 = load volatile i32, i32* inttoptr (i64 1074782472 to i32*)
%5 = sext i32 %4 to i64
store volatile i64 %5, i64* %1
%6 = load volatile i32, i32* inttoptr (i64 1073763592 to i32*)
%7 = or i32 %6, 15
store volatile i32 %7, i32* inttoptr (i64 1073763592 to i32*)
%8 = load volatile i32, i32* inttoptr (i64 1073763328 to i32*)
%9 = or i32 %8, 15
store volatile i32 %9, i32* inttoptr (i64 1073763328 to i32*)
%10 = load volatile i32, i32* inttoptr (i64 1073763612 to i32*)
%11 = or i32 %10, 15
store volatile i32 %11, i32* inttoptr (i64 1073763612 to i32*)
ret void
}

LLVM IR (-O2):
define void @DAC_Init() {
%1 = alloca i64
%2 = bitcast i64* %1 to i8*
%3 = load volatile i32, i32* inttoptr (i64 1074782472 to i32*)
%4 = or i32 %3, 2
store volatile i32 %4, i32* inttoptr (i64 1074782472 to i32*)
%5 = load volatile i32, i32* inttoptr (i64 1074782472 to i32*)
%6 = sext i32 %5 to i64
store volatile i64 %6, i64* %1
%7 = load volatile i32, i32* inttoptr (i64 1073763592 to i32*)
%8 = or i32 %7, 15
store volatile i32 %8, i32* inttoptr (i64 1073763592 to i32*)
%9 = load volatile i32, i32* inttoptr (i64 1073763328 to i32*)
%10 = or i32 %9, 15
store volatile i32 %10, i32* inttoptr (i64 1073763328 to i32*)
%11 = load volatile i32, i32* inttoptr (i64 1073763612 to i32*)
%12 = or i32 %11, 15
store volatile i32 %12, i32* inttoptr (i64 1073763612 to i32*)
ret void
}
/* Variables and functions */
int uStrLen(char *);
void uStrAppendChar(char *dest, char appChar) {
  int len = uStrLen(dest);
  dest[len] = appChar;
  dest[len + 1] = '\0';
}


x86 assembly (clang, -O0):
<uStrAppendChar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <uStrLen@plt>
mov    %eax,-0x10(%rbp)
mov    -0x9(%rbp),%dl
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uStrAppendChar>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <uStrLen@plt>
cltq
mov    %bpl,(%rbx,%rax,1)
movb   $0x0,0x1(%rbx,%rax,1)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @uStrAppendChar(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i32
store i8* %0, i8** %3
store i8 %1, i8* %4
%6 = load i8*, i8** %3
%7 = call i32 @uStrLen(i8* %6)
store i32 %7, i32* %5
%8 = load i8, i8* %4
%9 = load i8*, i8** %3
%10 = load i32, i32* %5
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %9, i64 %11
store i8 %8, i8* %12
%13 = load i8*, i8** %3
%14 = load i32, i32* %5
%15 = add nsw i32 %14, 1
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %13, i64 %16
store i8 0, i8* %17
ret void
}

LLVM IR (-O2):
define void @uStrAppendChar(i8* %0, i8 signext %1) {
%3 = tail call i32 @uStrLen(i8* %0)
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
store i8 %1, i8* %5
%6 = add nsw i32 %3, 1
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %0, i64 %7
store i8 0, i8* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int Help() { exit(1); }


x86 assembly (clang, -O0):
<Help>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<Help>:
push   %rax
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @Help() {
%1 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define i32 @Help() {
%1 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ _close_readw();
void uclose() { _close_readw(); }


x86 assembly (clang, -O0):
<uclose>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_close_readw@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<uclose>:
xor    %eax,%eax
jmp    1030 <_close_readw@plt>

LLVM IR (-O0):
define void @uclose() {
%1 = call i32 (...) @_close_readw()
ret void
}

LLVM IR (-O2):
define void @uclose() {
%1 = tail call i32 (...) @_close_readw()
ret void
}
/* Type definitions */
typedef scalar_t__ gid_t;

/* Variables and functions */
int /*<<< orphan*/ EPERM;
int /*<<< orphan*/ errno;
scalar_t__ getgid();
int setgid(gid_t _gid) {
  if (_gid != getgid()) {
    errno = EPERM;
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<setgid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    $0x0,%al
call   1030 <getgid@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
je     1159 <setgid+0x49>
mov    0x2e8e(%rip),%rax
mov    (%rax),%ecx
mov    0x2e95(%rip),%rax
mov    %ecx,(%rax)
movl   $0xffffffff,-0x4(%rbp)
jmp    1160 <setgid+0x50>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setgid>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <getgid@plt>
cmp    %r14,%rax
je     113c <setgid+0x2c>
mov    0x2ea4(%rip),%rax
mov    (%rax),%eax
mov    0x2eab(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@EPERM = global i32 0
@errno = global i32 0
define i32 @setgid(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = call i64 (...) @getgid()
%6 = icmp ne i64 %4, %5
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i32, i32* @EPERM
store i32 %8, i32* @errno
store i32 -1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %7
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@EPERM = global i32 0
@errno = global i32 0
define i32 @setgid(i64 %0) {
%2 = tail call i64 (...) @getgid()
%3 = icmp eq i64 %2, %0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = load i32, i32* @EPERM
store i32 %5, i32* @errno
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ -1, %4 ], [ 0, %1 ]
ret i32 %7
}
void g_get_user_name() {}


x86 assembly (clang, -O0):
<g_get_user_name>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_get_user_name>:
ret

LLVM IR (-O0):
define void @g_get_user_name() {
ret void
}

LLVM IR (-O2):
define void @g_get_user_name() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ readidew(int);
uint16_t ide_read_sec_w(uint16_t addr, void *priv) { return readidew(1); }


x86 assembly (clang, -O0):
<ide_read_sec_w>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%edi
call   1030 <readidew@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ide_read_sec_w>:
mov    $0x1,%edi
jmp    1030 <readidew@plt>

LLVM IR (-O0):
define i32 @ide_read_sec_w(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = call i32 @readidew(i32 1)
ret i32 %5
}

LLVM IR (-O2):
define i32 @ide_read_sec_w(i32 %0, i8* nocapture readnone %1) {
%3 = tail call i32 @readidew(i32 1)
ret i32 %3
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int, int, int, int, int);
void mesh_packet(uint32_t wait_cycles, uint32_t ctrlmode_data_mode_write,
                 uint32_t dstaddr_lo, uint32_t data_lo, uint32_t data_hi,
                 uint32_t src_hi, uint32_t dstadr_hi) {
  printf("%08x_%08x_%08x_%08x_%08x_%02x_%04x\n", dstadr_hi, src_hi, data_hi,
         data_lo, dstaddr_lo, ctrlmode_data_mode_write, wait_cycles);
}


x86 assembly (clang, -O0):
<mesh_packet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0x10(%rbp),%eax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    0x10(%rbp),%esi
mov    -0x18(%rbp),%edx
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%r8d
mov    -0xc(%rbp),%r9d
mov    -0x8(%rbp),%r10d
mov    -0x4(%rbp),%eax
lea    0xeb2(%rip),%rdi
mov    %r10d,(%rsp)
mov    %eax,0x8(%rsp)
call   1030 <printf@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mesh_packet>:
push   %rbx
mov    %ecx,%eax
mov    %edx,%r10d
mov    %esi,%r11d
mov    %edi,%ebx
mov    0x10(%rsp),%esi
lea    0xeda(%rip),%rdi
mov    %r9d,%edx
mov    %r8d,%ecx
mov    %eax,%r8d
mov    %r10d,%r9d
push   %rbx
push   %r11
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [36 x i8] c"%08x_%08x_%08x_%08x_%08x_%02x_%04x\0A\00"
define void @mesh_packet(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6) {
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32 %4, i32* %12
store i32 %5, i32* %13
store i32 %6, i32* %14
%15 = load i32, i32* %14
%16 = load i32, i32* %13
%17 = load i32, i32* %12
%18 = load i32, i32* %11
%19 = load i32, i32* %10
%20 = load i32, i32* %9
%21 = load i32, i32* %8
%22 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %15, i32 %16, i32 %17, i32 %18, i32 %19, i32 %20, i32 %21)
ret void
}

LLVM IR (-O2):
@.str = [36 x i8] c"%08x_%08x_%08x_%08x_%08x_%02x_%04x\0A\00"
define void @mesh_packet(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6) {
%8 = tail call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %6, i32 %5, i32 %4, i32 %3, i32 %2, i32 %1, i32 %0)
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long s_addr;
};
struct sockaddr_in {
  TYPE_1__ sin_addr;
};

/* Variables and functions */
scalar_t__ inet_aton(char *, TYPE_1__ *);
unsigned long StrtoIP(char *Str) {
  struct sockaddr_in sa;
  if (inet_aton(Str, &sa.sin_addr))
    return (sa.sin_addr.s_addr);
  return (0);
}


x86 assembly (clang, -O0):
<StrtoIP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <inet_aton@plt>
cmp    $0x0,%rax
je     1140 <StrtoIP+0x30>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1148 <StrtoIP+0x38>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<StrtoIP>:
push   %rax
mov    %rsp,%rsi
call   1030 <inet_aton@plt>
test   %rax,%rax
je     1122 <StrtoIP+0x12>
mov    (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.sockaddr_in = type { %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i64 }
define i64 @StrtoIP(i8* %0) {
%2 = alloca i64
%3 = alloca i8*
%4 = alloca %struct.sockaddr_in
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %4, i32 0, i32 0
%7 = call i64 @inet_aton(i8* %5, %struct.TYPE_2__* %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %1
%10 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %4, i32 0, i32 0
%11 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %10, i32 0, i32 0
%12 = load i64, i64* %11
store i64 %12, i64* %2
br label %14
13: ; preds = %1
store i64 0, i64* %2
br label %14
14: ; preds = %13, %9
%15 = load i64, i64* %2
ret i64 %15
}

LLVM IR (-O2):
%struct.sockaddr_in = type { %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i64 }
define i64 @StrtoIP(i8* %0) {
%2 = alloca %struct.sockaddr_in
%3 = bitcast %struct.sockaddr_in* %2 to i8*
%4 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %2, i64 0, i32 0
%5 = call i64 @inet_aton(i8* %0, %struct.TYPE_2__* %4)
%6 = icmp eq i64 %5, 0
%7 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %2, i64 0, i32 0, i32 0
%8 = load i64, i64* %7
%9 = select i1 %6, i64 0, i64 %8
ret i64 %9
}
/* Variables and functions */
int /*<<< orphan*/ fn(unsigned long long *);
void f3(void) {
  typedef unsigned long long L __attribute__((aligned(8)));
  L a;
  fn(&a);
}


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
call   1030 <fn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
push   %rax
mov    %rsp,%rdi
call   1030 <fn@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @f3() {
%1 = alloca i64
%2 = call i32 @fn(i64* %1)
ret void
}

LLVM IR (-O2):
define void @f3() {
%1 = alloca i64
%2 = bitcast i64* %1 to i8*
%3 = call i32 @fn(i64* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ islower(int);
void uninitvar_islower(void) {
  int i;
  (void)islower(i);
}


x86 assembly (clang, -O0):
<uninitvar_islower>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_islower>:
ret

LLVM IR (-O0):
define void @uninitvar_islower() {
%1 = alloca i32
%2 = load i32, i32* %1
%3 = call i32 @islower(i32 %2)
ret void
}

LLVM IR (-O2):
define void @uninitvar_islower() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ jul2greg(double, int *, int *, int *, int *, int *,
                            double *);
int julian_get_half_hour_number(double current) {
  int year, month, day, hour, minute;
  double seconds;
  jul2greg(current, &month, &day, &year, &hour, &minute, &seconds);
  if (minute >= 0 && minute <= 29)
    return 0;
  else
    return 30;
}


x86 assembly (clang, -O0):
<julian_get_half_hour_number>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
lea    -0x18(%rbp),%rdi
lea    -0x1c(%rbp),%rsi
lea    -0x14(%rbp),%rdx
lea    -0x20(%rbp),%rcx
lea    -0x24(%rbp),%r8
lea    -0x30(%rbp),%r9
call   1030 <jul2greg@plt>
cmpl   $0x0,-0x24(%rbp)
jl     115f <julian_get_half_hour_number+0x4f>
cmpl   $0x1d,-0x24(%rbp)
jg     115f <julian_get_half_hour_number+0x4f>
movl   $0x0,-0x4(%rbp)
jmp    1166 <julian_get_half_hour_number+0x56>
movl   $0x1e,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<julian_get_half_hour_number>:
sub    $0x28,%rsp
lea    0x18(%rsp),%rdi
lea    0x14(%rsp),%rsi
lea    0x1c(%rsp),%rdx
lea    0x10(%rsp),%rcx
lea    0xc(%rsp),%r8
lea    0x20(%rsp),%r9
call   1030 <jul2greg@plt>
xor    %ecx,%ecx
cmpl   $0x1e,0xc(%rsp)
mov    $0x1e,%eax
cmovb  %ecx,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
define i32 @julian_get_half_hour_number(double %0) {
%2 = alloca i32
%3 = alloca double
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca double
store double %0, double* %3
%10 = load double, double* %3
%11 = call i32 @jul2greg(double %10, i32* %5, i32* %6, i32* %4, i32* %7, i32* %8, double* %9)
%12 = load i32, i32* %8
%13 = icmp sge i32 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %1
%15 = load i32, i32* %8
%16 = icmp sle i32 %15, 29
br i1 %16, label %17, label %18
17: ; preds = %14
store i32 0, i32* %2
br label %19
18: ; preds = %14, %1
store i32 30, i32* %2
br label %19
19: ; preds = %18, %17
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @julian_get_half_hour_number(double %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca double
%8 = bitcast i32* %2 to i8*
%9 = bitcast i32* %3 to i8*
%10 = bitcast i32* %4 to i8*
%11 = bitcast i32* %5 to i8*
%12 = bitcast i32* %6 to i8*
%13 = bitcast double* %7 to i8*
%14 = call i32 @jul2greg(double %0, i32* %3, i32* %4, i32* %2, i32* %5, i32* %6, double* %7)
%15 = load i32, i32* %6
%16 = icmp ult i32 %15, 30
%17 = select i1 %16, i32 0, i32 30
ret i32 %17
}
void mdea_file_input_destroy(void *ptr) {}


x86 assembly (clang, -O0):
<mdea_file_input_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdea_file_input_destroy>:
ret

LLVM IR (-O0):
define void @mdea_file_input_destroy(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @mdea_file_input_destroy(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void voce1(int x) { printf("voce1: %d\n", x); }


x86 assembly (clang, -O0):
<voce1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<voce1>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"voce1: %d\0A\00"
define void @voce1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"voce1: %d\0A\00"
define void @voce1(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Type definitions */
typedef int const u_int32_t;
typedef int u_char;

/* Variables and functions */
u_int32_t __get_unaligned_be32(const u_char *p) {
  return p[0] << 24 | p[1] << 16 | p[2] << 8 | p[3];
}


x86 assembly (clang, -O0):
<__get_unaligned_be32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
mov    0x4(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
or     0xc(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__get_unaligned_be32>:
mov    (%rdi),%eax
mov    0x4(%rdi),%ecx
shl    $0x18,%eax
shl    $0x10,%ecx
or     %eax,%ecx
mov    0x8(%rdi),%eax
shl    $0x8,%eax
or     %ecx,%eax
or     0xc(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @__get_unaligned_be32(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = shl i32 %5, 24
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = shl i32 %9, 16
%11 = or i32 %6, %10
%12 = load i32*, i32** %2
%13 = getelementptr inbounds i32, i32* %12, i64 2
%14 = load i32, i32* %13
%15 = shl i32 %14, 8
%16 = or i32 %11, %15
%17 = load i32*, i32** %2
%18 = getelementptr inbounds i32, i32* %17, i64 3
%19 = load i32, i32* %18
%20 = or i32 %16, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @__get_unaligned_be32(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 24
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = shl i32 %5, 16
%7 = or i32 %6, %3
%8 = getelementptr inbounds i32, i32* %0, i64 2
%9 = load i32, i32* %8
%10 = shl i32 %9, 8
%11 = or i32 %7, %10
%12 = getelementptr inbounds i32, i32* %0, i64 3
%13 = load i32, i32* %12
%14 = or i32 %11, %13
ret i32 %14
}
int do_810() { return 810; }


x86 assembly (clang, -O0):
<do_810>:
push   %rbp
mov    %rsp,%rbp
mov    $0x32a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_810>:
mov    $0x32a,%eax
ret

LLVM IR (-O0):
define i32 @do_810() {
ret i32 810
}

LLVM IR (-O2):
define i32 @do_810() {
ret i32 810
}
/* Variables and functions */
int /*<<< orphan*/ error_handler(char *);
int /*<<< orphan*/ free(void *);
void xfree(void *p) {
  if (p == NULL)
    error_handler("free on NULL.");
  free(p);
}


x86 assembly (clang, -O0):
<xfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1143 <xfree+0x23>
lea    0xec2(%rip),%rdi
call   1040 <error_handler@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfree>:
push   %rbx
mov    %rdi,%rbx
test   %rdi,%rdi
jne    1135 <xfree+0x15>
lea    0xed0(%rip),%rdi
call   1040 <error_handler@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"free on NULL.\00"
define void @xfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @error_handler(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %1
%8 = load i8*, i8** %2
%9 = call i32 @free(i8* %8)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"free on NULL.\00"
define void @xfree(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @error_handler(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %1
%6 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mintaka_thread_end();
void mintaka_thread_end_() { mintaka_thread_end(); }


x86 assembly (clang, -O0):
<mintaka_thread_end_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <mintaka_thread_end@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mintaka_thread_end_>:
xor    %eax,%eax
jmp    1030 <mintaka_thread_end@plt>

LLVM IR (-O0):
define void @mintaka_thread_end_() {
%1 = call i32 (...) @mintaka_thread_end()
ret void
}

LLVM IR (-O2):
define void @mintaka_thread_end_() {
%1 = tail call i32 (...) @mintaka_thread_end()
ret void
}
int S_Lowpass2pole(int sample, int *history, int coeff) {
  int output = sample;
  output += ((history[0] - output) * coeff) >> 16;
  history[0] = output;
  output += ((history[1] - output) * coeff) >> 16;
  history[1] = output;
  return output;
}


x86 assembly (clang, -O0):
<S_Lowpass2pole>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
sub    -0x18(%rbp),%eax
imul   -0x14(%rbp),%eax
sar    $0x10,%eax
add    -0x18(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%eax
sub    -0x18(%rbp),%eax
imul   -0x14(%rbp),%eax
sar    $0x10,%eax
add    -0x18(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<S_Lowpass2pole>:
mov    (%rsi),%ecx
mov    0x4(%rsi),%eax
sub    %edi,%ecx
imul   %edx,%ecx
sar    $0x10,%ecx
add    %edi,%ecx
mov    %ecx,(%rsi)
sub    %ecx,%eax
imul   %edx,%eax
sar    $0x10,%eax
add    %ecx,%eax
mov    %eax,0x4(%rsi)
ret

LLVM IR (-O0):
define i32 @S_Lowpass2pole(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
store i32 %8, i32* %7
%9 = load i32*, i32** %5
%10 = getelementptr inbounds i32, i32* %9, i64 0
%11 = load i32, i32* %10
%12 = load i32, i32* %7
%13 = sub nsw i32 %11, %12
%14 = load i32, i32* %6
%15 = mul nsw i32 %13, %14
%16 = ashr i32 %15, 16
%17 = load i32, i32* %7
%18 = add nsw i32 %17, %16
store i32 %18, i32* %7
%19 = load i32, i32* %7
%20 = load i32*, i32** %5
%21 = getelementptr inbounds i32, i32* %20, i64 0
store i32 %19, i32* %21
%22 = load i32*, i32** %5
%23 = getelementptr inbounds i32, i32* %22, i64 1
%24 = load i32, i32* %23
%25 = load i32, i32* %7
%26 = sub nsw i32 %24, %25
%27 = load i32, i32* %6
%28 = mul nsw i32 %26, %27
%29 = ashr i32 %28, 16
%30 = load i32, i32* %7
%31 = add nsw i32 %30, %29
store i32 %31, i32* %7
%32 = load i32, i32* %7
%33 = load i32*, i32** %5
%34 = getelementptr inbounds i32, i32* %33, i64 1
store i32 %32, i32* %34
%35 = load i32, i32* %7
ret i32 %35
}

LLVM IR (-O2):
define i32 @S_Lowpass2pole(i32 %0, i32* nocapture %1, i32 %2) {
%4 = load i32, i32* %1
%5 = sub nsw i32 %4, %0
%6 = mul nsw i32 %5, %2
%7 = ashr i32 %6, 16
%8 = add nsw i32 %7, %0
store i32 %8, i32* %1
%9 = getelementptr inbounds i32, i32* %1, i64 1
%10 = load i32, i32* %9
%11 = sub nsw i32 %10, %8
%12 = mul nsw i32 %11, %2
%13 = ashr i32 %12, 16
%14 = add nsw i32 %13, %8
store i32 %14, i32* %9
ret i32 %14
}
/* Variables and functions */
int parse_unsigned(char const *, int /*<<< orphan*/, int *);
int parse_umask(const char *string, int *value_r) {
  return parse_unsigned(string, 0, value_r);
}


x86 assembly (clang, -O0):
<parse_umask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <parse_unsigned@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_umask>:
mov    %rsi,%rdx
xor    %esi,%esi
jmp    1030 <parse_unsigned@plt>

LLVM IR (-O0):
define i32 @parse_umask(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i32*, i32** %4
%7 = call i32 @parse_unsigned(i8* %5, i32 0, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @parse_umask(i8* %0, i32* %1) {
%3 = tail call i32 @parse_unsigned(i8* %0, i32 0, i32* %1)
ret i32 %3
}
long foo(int x) { return __builtin_popcountl(x); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rcx
mov    %rcx,%rax
shr    %rax
movabs $0x5555555555555555,%rdx
55 55 55
and    %rdx,%rax
sub    %rax,%rcx
movabs $0x3333333333333333,%rdx
33 33 33
mov    %rcx,%rax
and    %rdx,%rax
shr    $0x2,%rcx
and    %rdx,%rcx
add    %rcx,%rax
mov    %rax,%rcx
shr    $0x4,%rcx
add    %rcx,%rax
movabs $0xf0f0f0f0f0f0f0f,%rcx
0f 0f 0f
and    %rcx,%rax
movabs $0x101010101010101,%rcx
01 01 01
imul   %rcx,%rax
shr    $0x38,%rax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
movslq %edi,%rax
mov    %rax,%rcx
shr    %rcx
movabs $0x5555555555555555,%rdx
55 55 55
and    %rcx,%rdx
sub    %rdx,%rax
movabs $0x3333333333333333,%rcx
33 33 33
mov    %rax,%rdx
and    %rcx,%rdx
shr    $0x2,%rax
and    %rcx,%rax
add    %rdx,%rax
mov    %rax,%rcx
shr    $0x4,%rcx
add    %rax,%rcx
movabs $0xf0f0f0f0f0f0f0f,%rdx
0f 0f 0f
and    %rcx,%rdx
movabs $0x101010101010101,%rax
01 01 01
imul   %rdx,%rax
shr    $0x38,%rax
ret

LLVM IR (-O0):
define i64 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = trunc i64 %5 to i32
%7 = sext i32 %6 to i64
ret i64 %7
}

LLVM IR (-O2):
define i64 @foo(i32 %0) {
%2 = sext i32 %0 to i64
%3 = tail call i64 @llvm.ctpop.i64(i64 %2)
ret i64 %3
}
/* Type definitions */
struct altera_spi_device {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ spi_reg_write(struct altera_spi_device *, int,
                                 int /*<<< orphan*/);
void spi_cs_deactivate(struct altera_spi_device *dev) {
  spi_reg_write(dev, 12, 0);
}


x86 assembly (clang, -O0):
<spi_cs_deactivate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xc,%esi
xor    %edx,%edx
call   1030 <spi_reg_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_cs_deactivate>:
mov    $0xc,%esi
xor    %edx,%edx
jmp    1030 <spi_reg_write@plt>

LLVM IR (-O0):
%struct.altera_spi_device = type { i32 }
define void @spi_cs_deactivate(%struct.altera_spi_device* %0) {
%2 = alloca %struct.altera_spi_device*
store %struct.altera_spi_device* %0, %struct.altera_spi_device** %2
%3 = load %struct.altera_spi_device*, %struct.altera_spi_device** %2
%4 = call i32 @spi_reg_write(%struct.altera_spi_device* %3, i32 12, i32 0)
ret void
}

LLVM IR (-O2):
%struct.altera_spi_device = type { i32 }
define void @spi_cs_deactivate(%struct.altera_spi_device* %0) {
%2 = tail call i32 @spi_reg_write(%struct.altera_spi_device* %0, i32 12, i32 0)
ret void
}
int test_imm_30uint32_reg(unsigned int val) {
  return ((val) & (0x30 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_30uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x30,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_30uint32_reg>:
test   $0x30,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_30uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 48
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_30uint32_reg(i32 %0) {
%2 = and i32 %0, 48
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
char *strchr(const char *string, int ch) {
  while (*string && *string != ch)
    string++;
  if (*string == ch)
    return (string);
  return ((void *)0);
}


x86 assembly (clang, -O0):
<strchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x15(%rbp)
je     1130 <strchr+0x30>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    -0x14(%rbp),%eax
setne  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
test   $0x1,%al
jne    1140 <strchr+0x40>
jmp    1151 <strchr+0x51>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110b <strchr+0xb>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    -0x14(%rbp),%eax
jne    116e <strchr+0x6e>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1176 <strchr+0x76>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strchr>:
add    $0xffffffffffffffff,%rdi
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movsbl 0x1(%rdi),%ecx
add    $0x1,%rdi
test   %ecx,%ecx
je     1120 <strchr+0x20>
cmp    %esi,%ecx
jne    1110 <strchr+0x10>
xor    %eax,%eax
cmp    %esi,%ecx
cmove  %rdi,%rax
ret

LLVM IR (-O0):
define i8* @strchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
br label %6
6: ; preds = %19, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %6
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = load i32, i32* %5
%16 = icmp ne i32 %14, %15
br label %17
17: ; preds = %11, %6
%18 = phi i1 [ false, %6 ], [ %16, %11 ]
br i1 %18, label %19, label %22
19: ; preds = %17
%20 = load i8*, i8** %4
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %4
br label %6
22: ; preds = %17
%23 = load i8*, i8** %4
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
%26 = load i32, i32* %5
%27 = icmp eq i32 %25, %26
br i1 %27, label %28, label %30
28: ; preds = %22
%29 = load i8*, i8** %4
store i8* %29, i8** %3
br label %31
30: ; preds = %22
store i8* null, i8** %3
br label %31
31: ; preds = %30, %28
%32 = load i8*, i8** %3
ret i8* %32
}

LLVM IR (-O2):
define i8* @strchr(i8* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %10, %3 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = sext i8 %5 to i32
%8 = icmp eq i32 %7, %1
%9 = or i1 %6, %8
%10 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %9, label %11, label %3
11: ; preds = %3
%12 = select i1 %8, i8* %4, i8* null
ret i8* %12
}
int _add(str, pt, ptlim) const char *str;
char **pt;
const char *const ptlim;
{
  for (;; ++(*pt)) {
    if (*pt == ptlim)
      return (0);
    if ((**pt = *str++) == '\0')
      return (1);
  }
}


x86 assembly (clang, -O0):
<_add>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
cmp    -0x20(%rbp),%rax
jne    112d <_add+0x2d>
movl   $0x0,-0x4(%rbp)
jmp    1177 <_add+0x77>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x18(%rbp),%rcx
mov    (%rcx),%rcx
mov    %al,(%rcx)
movsbl %al,%eax
cmp    $0x0,%eax
jne    115f <_add+0x5f>
movl   $0x1,-0x4(%rbp)
jmp    1177 <_add+0x77>
jmp    1164 <_add+0x64>
mov    -0x18(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
jmp    1110 <_add+0x10>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_add>:
mov    (%rsi),%rcx
xor    %eax,%eax
cmp    %rdx,%rcx
je     112f <_add+0x2f>
nopw   0x0(%rax,%rax,1)
movzbl (%rdi),%r8d
mov    %r8b,(%rcx)
test   %r8b,%r8b
je     1130 <_add+0x30>
add    $0x1,%rdi
mov    (%rsi),%rcx
add    $0x1,%rcx
mov    %rcx,(%rsi)
cmp    %rdx,%rcx
jne    1110 <_add+0x10>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @_add(i8* %0, i8** %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8**
%7 = alloca i8*
store i8* %0, i8** %5
store i8** %1, i8*** %6
store i8* %2, i8** %7
br label %8
8: ; preds = %24, %3
%9 = load i8**, i8*** %6
%10 = load i8*, i8** %9
%11 = load i8*, i8** %7
%12 = icmp eq i8* %10, %11
br i1 %12, label %13, label %14
13: ; preds = %8
store i32 0, i32* %4
br label %28
14: ; preds = %8
%15 = load i8*, i8** %5
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %5
%17 = load i8, i8* %15
%18 = load i8**, i8*** %6
%19 = load i8*, i8** %18
store i8 %17, i8* %19
%20 = sext i8 %17 to i32
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %23
22: ; preds = %14
store i32 1, i32* %4
br label %28
23: ; preds = %14
br label %24
24: ; preds = %23
%25 = load i8**, i8*** %6
%26 = load i8*, i8** %25
%27 = getelementptr inbounds i8, i8* %26, i32 1
store i8* %27, i8** %25
br label %8
28: ; preds = %22, %13
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @_add(i8* nocapture %0, i8** nocapture %1, i8* readnone %2) {
%4 = load i8*, i8** %1
%5 = icmp eq i8* %4, %2
br i1 %5, label %16, label %6
6: ; preds = %3, %11
%7 = phi i8* [ %14, %11 ], [ %4, %3 ]
%8 = phi i8* [ %12, %11 ], [ %0, %3 ]
%9 = load i8, i8* %8
store i8 %9, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %16, label %11
11: ; preds = %6
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = load i8*, i8** %1
%14 = getelementptr inbounds i8, i8* %13, i64 1
store i8* %14, i8** %1
%15 = icmp eq i8* %14, %2
br i1 %15, label %16, label %6
16: ; preds = %11, %6, %3
%17 = phi i32 [ 0, %3 ], [ 1, %6 ], [ 0, %11 ]
ret i32 %17
}
struct b6_dref *__b6_splay_from_thread(const struct b6_dref *dref) {
  return (struct b6_dref *)((unsigned long int)dref & ~1);
}


x86 assembly (clang, -O0):
<__b6_splay_from_thread>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0xfffffffffffffffe,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__b6_splay_from_thread>:
mov    %rdi,%rax
and    $0xfffffffffffffffe,%rax
ret

LLVM IR (-O0):
%struct.b6_dref = type opaque
define %struct.b6_dref* @__b6_splay_from_thread(%struct.b6_dref* %0) {
%2 = alloca %struct.b6_dref*
store %struct.b6_dref* %0, %struct.b6_dref** %2
%3 = load %struct.b6_dref*, %struct.b6_dref** %2
%4 = ptrtoint %struct.b6_dref* %3 to i64
%5 = and i64 %4, -2
%6 = inttoptr i64 %5 to %struct.b6_dref*
ret %struct.b6_dref* %6
}

LLVM IR (-O2):
%struct.b6_dref = type opaque
define %struct.b6_dref* @__b6_splay_from_thread(%struct.b6_dref* %0) {
%2 = ptrtoint %struct.b6_dref* %0 to i64
%3 = and i64 %2, -2
%4 = inttoptr i64 %3 to %struct.b6_dref*
ret %struct.b6_dref* %4
}
extern void func1(void) { static int i; }


x86 assembly (clang, -O0):
<func1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func1>:
ret

LLVM IR (-O0):
@func1.i = internal global i32 0
define void @func1() {
ret void
}

LLVM IR (-O2):
define void @func1() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ setuid(int /*<<< orphan*/);
int /*<<< orphan*/ system(char *);
int main() {
  setuid(0);
  system("DASHVEND_DIRECTORY/bin/trigger_relay.sh");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1040 <setuid@plt>
lea    0xec3(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <setuid@plt>
lea    0xed1(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [40 x i8] c"DASHVEND_DIRECTORY/bin/trigger_relay.sh\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @setuid(i32 0)
%3 = call i32 @system(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [40 x i8] c"DASHVEND_DIRECTORY/bin/trigger_relay.sh\00"
define i32 @main() {
%1 = tail call i32 @setuid(i32 0)
%2 = tail call i32 @system(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void platform_sleep(int milliseconds) { usleep(milliseconds * 1000); }


x86 assembly (clang, -O0):
<platform_sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<platform_sleep>:
imul   $0x3e8,%edi,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @platform_sleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 1000
%5 = call i32 @usleep(i32 %4)
ret void
}

LLVM IR (-O2):
define void @platform_sleep(i32 %0) {
%2 = mul nsw i32 %0, 1000
%3 = tail call i32 @usleep(i32 %2)
ret void
}