xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_eval(int);
void loopWithCall() {
  void *arr[2];
  for (int i = 0; i < 2; ++i) {
    int x;
    arr[i] = &x;
  }
  clang_analyzer_eval(arr[0] == arr[1]);
}


x86 assembly (clang, -O0):
<loopWithCall>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x14(%rbp)
cmpl   $0x2,-0x14(%rbp)
jge    1144 <loopWithCall+0x34>
lea    -0x18(%rbp),%rcx
movslq -0x14(%rbp),%rax
mov    %rcx,-0x10(%rbp,%rax,8)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    111f <loopWithCall+0xf>
mov    -0x10(%rbp),%rax
cmp    -0x8(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <clang_analyzer_eval@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loopWithCall>:
push   %rax
mov    $0x1,%edi
call   1030 <clang_analyzer_eval@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @loopWithCall() {
%1 = alloca [2 x i8*]
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %2
br label %4
4: ; preds = %12, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 2
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = bitcast i32* %3 to i8*
%9 = load i32, i32* %2
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds [2 x i8*], [2 x i8*]* %1, i64 0, i64 %10
store i8* %8, i8** %11
br label %12
12: ; preds = %7
%13 = load i32, i32* %2
%14 = add nsw i32 %13, 1
store i32 %14, i32* %2
br label %4
15: ; preds = %4
%16 = getelementptr inbounds [2 x i8*], [2 x i8*]* %1, i64 0, i64 0
%17 = load i8*, i8** %16
%18 = getelementptr inbounds [2 x i8*], [2 x i8*]* %1, i64 0, i64 1
%19 = load i8*, i8** %18
%20 = icmp eq i8* %17, %19
%21 = zext i1 %20 to i32
%22 = call i32 @clang_analyzer_eval(i32 %21)
ret void
}

LLVM IR (-O2):
define void @loopWithCall() {
%1 = call i32 @clang_analyzer_eval(i32 1)
ret void
}
/* Variables and functions */
char const *strstr(char const *, char const *);
int strisprefix(char const *str, char const *prefix) {
  return strstr(str, prefix) == str;
}


x86 assembly (clang, -O0):
<strisprefix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strstr@plt>
cmp    -0x8(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strisprefix>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %rax,%rdx
call   1030 <strncmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @strisprefix(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @strstr(i8* %5, i8* %6)
%8 = load i8*, i8** %3
%9 = icmp eq i8* %7, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @strisprefix(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = tail call i32 @strncmp(i8* %0, i8* %1, i64 %3)
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ interrupt_handler_register(int, void (*)());
void switch_handler_register(void (*handler)(void)) {
  interrupt_handler_register(32, handler);
}


x86 assembly (clang, -O0):
<switch_handler_register>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x20,%edi
call   1030 <interrupt_handler_register@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<switch_handler_register>:
mov    %rdi,%rsi
mov    $0x20,%edi
jmp    1030 <interrupt_handler_register@plt>

LLVM IR (-O0):
define void @switch_handler_register(void ()* %0) {
%2 = alloca void ()*
store void ()* %0, void ()** %2
%3 = load void ()*, void ()** %2
%4 = bitcast void ()* %3 to void (...)*
%5 = call i32 @interrupt_handler_register(i32 32, void (...)* %4)
ret void
}

LLVM IR (-O2):
define void @switch_handler_register(void ()* %0) {
%2 = bitcast void ()* %0 to void (...)*
%3 = tail call i32 @interrupt_handler_register(i32 32, void (...)* %2)
ret void
}
char *add_vectag(char *p) { return (p + 0x05); }


x86 assembly (clang, -O0):
<add_vectag>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x5,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_vectag>:
lea    0x5(%rdi),%rax
ret

LLVM IR (-O0):
define i8* @add_vectag(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 5
ret i8* %4
}

LLVM IR (-O2):
define i8* @add_vectag(i8* readnone %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 5
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
void *calloc(size_t, size_t);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
void *__memAllocate(size_t numelem, size_t elemsize) {
  void *chunk = calloc(numelem, elemsize);
  assert(chunk != NULL);
  memset(chunk, 0, elemsize);
  return chunk;
}


x86 assembly (clang, -O0):
<__memAllocate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__memAllocate>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
call   1040 <calloc@plt>
mov    %rax,%rbx
xor    %edi,%edi
test   %rax,%rax
setne  %dil
call   1050 <assert@plt>
mov    %rbx,%rdi
xor    %esi,%esi
mov    %r14,%rdx
call   1030 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @__memAllocate(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i8* @calloc(i64 %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i8*, i8** %5
%14 = load i64, i64* %4
%15 = call i32 @memset(i8* %13, i32 0, i64 %14)
%16 = load i8*, i8** %5
ret i8* %16
}

LLVM IR (-O2):
define i8* @__memAllocate(i64 %0, i64 %1) {
%3 = tail call i8* @calloc(i64 %0, i64 %1)
%4 = icmp ne i8* %3, null
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
%7 = tail call i32 @memset(i8* %3, i32 0, i64 %1)
ret i8* %3
}
/* Variables and functions */
unsigned long gfx_get_display_video_offset();
unsigned long cs5530_get_video_offset(void) {
  return (gfx_get_display_video_offset());
}


x86 assembly (clang, -O0):
<cs5530_get_video_offset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <gfx_get_display_video_offset@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cs5530_get_video_offset>:
xor    %eax,%eax
jmp    1030 <gfx_get_display_video_offset@plt>

LLVM IR (-O0):
define i64 @cs5530_get_video_offset() {
%1 = call i64 (...) @gfx_get_display_video_offset()
ret i64 %1
}

LLVM IR (-O2):
define i64 @cs5530_get_video_offset() {
%1 = tail call i64 (...) @gfx_get_display_video_offset()
ret i64 %1
}
/* Variables and functions */
int /*<<< orphan*/ mcfioC_PrintDictionary();
void mcfio_printdictionary_(void) { mcfioC_PrintDictionary(); }


x86 assembly (clang, -O0):
<mcfio_printdictionary_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <mcfioC_PrintDictionary@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mcfio_printdictionary_>:
xor    %eax,%eax
jmp    1030 <mcfioC_PrintDictionary@plt>

LLVM IR (-O0):
define void @mcfio_printdictionary_() {
%1 = call i32 (...) @mcfioC_PrintDictionary()
ret void
}

LLVM IR (-O2):
define void @mcfio_printdictionary_() {
%1 = tail call i32 (...) @mcfioC_PrintDictionary()
ret void
}
const char *str_expr_val() { return "value"; }


x86 assembly (clang, -O0):
<str_expr_val>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_expr_val>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"value\00"
define i8* @str_expr_val() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"value\00"
define i8* @str_expr_val() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
void no_reuse(int fd) {}


x86 assembly (clang, -O0):
<no_reuse>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<no_reuse>:
ret

LLVM IR (-O0):
define void @no_reuse(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @no_reuse(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ range_equals_test();
int /*<<< orphan*/ range_expand_test();
int /*<<< orphan*/ range_extend_to_include_value_test();
int /*<<< orphan*/ range_length_test();
void range_test(void) {
  range_equals_test();
  range_expand_test();
  range_extend_to_include_value_test();
  range_length_test();
}


x86 assembly (clang, -O0):
<range_test>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <range_equals_test@plt>
mov    $0x0,%al
call   1060 <range_expand_test@plt>
mov    $0x0,%al
call   1050 <range_extend_to_include_value_test@plt>
mov    $0x0,%al
call   1040 <range_length_test@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<range_test>:
push   %rax
xor    %eax,%eax
call   1030 <range_equals_test@plt>
xor    %eax,%eax
call   1060 <range_expand_test@plt>
xor    %eax,%eax
call   1050 <range_extend_to_include_value_test@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <range_length_test@plt>

LLVM IR (-O0):
define void @range_test() {
%1 = call i32 (...) @range_equals_test()
%2 = call i32 (...) @range_expand_test()
%3 = call i32 (...) @range_extend_to_include_value_test()
%4 = call i32 (...) @range_length_test()
ret void
}

LLVM IR (-O2):
define void @range_test() {
%1 = tail call i32 (...) @range_equals_test()
%2 = tail call i32 (...) @range_expand_test()
%3 = tail call i32 (...) @range_extend_to_include_value_test()
%4 = tail call i32 (...) @range_length_test()
ret void
}
/* Variables and functions */
scalar_t__ sqrt(float);
float pythag(float a, float b) { return (float)sqrt(a * a + b * b); }


x86 assembly (clang, -O0):
<pythag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  -0x8(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
call   1030 <sqrt@plt>
cvtsi2ss %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pythag>:
push   %rax
mulss  %xmm1,%xmm1
mulss  %xmm0,%xmm0
addss  %xmm1,%xmm0
call   1030 <sqrt@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @pythag(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %3
%7 = load float, float* %4
%8 = load float, float* %4
%9 = fmul float %7, %8
%10 = call float @llvm.fmuladd.f32(float %5, float %6, float %9)
%11 = call i64 @sqrt(float %10)
%12 = sitofp i64 %11 to float
ret float %12
}

LLVM IR (-O2):
define float @pythag(float %0, float %1) {
%3 = fmul float %1, %1
%4 = tail call float @llvm.fmuladd.f32(float %0, float %0, float %3)
%5 = tail call i64 @sqrt(float %4)
%6 = sitofp i64 %5 to float
ret float %6
}
void hdd_ndp_print_ini_config(struct hdd_context_s *hdd_ctx) {}


x86 assembly (clang, -O0):
<hdd_ndp_print_ini_config>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdd_ndp_print_ini_config>:
ret

LLVM IR (-O0):
%struct.hdd_context_s = type opaque
define void @hdd_ndp_print_ini_config(%struct.hdd_context_s* %0) {
%2 = alloca %struct.hdd_context_s*
store %struct.hdd_context_s* %0, %struct.hdd_context_s** %2
ret void
}

LLVM IR (-O2):
%struct.hdd_context_s = type opaque
define void @hdd_ndp_print_ini_config(%struct.hdd_context_s* nocapture %0) {
ret void
}
/* Type definitions */
struct timespec {
  int tv_sec;
  int tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, int /*<<< orphan*/ *);
void ct_delay(int ms) {
  struct timespec tv;
  tv.tv_sec = ms / 1000;
  tv.tv_nsec = (ms % 1000) * 1000000;
  nanosleep(&tv, NULL);
}


x86 assembly (clang, -O0):
<ct_delay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
imul   $0xf4240,%edx,%eax
mov    %eax,-0xc(%rbp)
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <nanosleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ct_delay>:
push   %rax
movslq %edi,%rax
imul   $0x10624dd3,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rcx
add    %edx,%ecx
mov    %ecx,(%rsp)
imul   $0x3e8,%ecx,%ecx
sub    %ecx,%eax
imul   $0xf4240,%eax,%eax
mov    %eax,0x4(%rsp)
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <nanosleep@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
define void @ct_delay(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.timespec
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sdiv i32 %4, 1000
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
store i32 %5, i32* %6
%7 = load i32, i32* %2
%8 = srem i32 %7, 1000
%9 = mul nsw i32 %8, 1000000
%10 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
store i32 %9, i32* %10
%11 = call i32 @nanosleep(%struct.timespec* %3, i32* null)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
define void @ct_delay(i32 %0) {
%2 = alloca %struct.timespec
%3 = bitcast %struct.timespec* %2 to i8*
%4 = sdiv i32 %0, 1000
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 0
store i32 %4, i32* %5
%6 = srem i32 %0, 1000
%7 = mul nsw i32 %6, 1000000
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 1
store i32 %7, i32* %8
%9 = call i32 @nanosleep(%struct.timespec* %2, i32* null)
ret void
}
int reverseNumberByRecursion(int number, int *result) {
  if (number == 0) {
    return 1;
  } else {
    *result = *result * 10 + number % 10;
    return reverseNumberByRecursion(number / 10, result);
  }
}


x86 assembly (clang, -O0):
<reverseNumberByRecursion>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1135 <reverseNumberByRecursion+0x25>
movl   $0x1,-0x4(%rbp)
jmp    1168 <reverseNumberByRecursion+0x58>
mov    -0x10(%rbp),%rax
imul   $0xa,(%rax),%ecx
mov    -0x8(%rbp),%eax
mov    $0xa,%esi
cltd
idiv   %esi
add    %edx,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
call   1030 <reverseNumberByRecursion@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverseNumberByRecursion>:
test   %edi,%edi
je     1143 <reverseNumberByRecursion+0x43>
mov    (%rsi),%ecx
cs nopw 0x0(%rax,%rax,1)
lea    (%rcx,%rcx,4),%r8d
movslq %edi,%rax
imul   $0x66666667,%rax,%rdi
mov    %rdi,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rdi
add    %edx,%edi
lea    (%rdi,%rdi,1),%edx
lea    (%rdx,%rdx,4),%edx
mov    %eax,%ecx
sub    %edx,%ecx
lea    (%rcx,%r8,2),%ecx
add    $0x9,%eax
cmp    $0x12,%eax
ja     1110 <reverseNumberByRecursion+0x10>
mov    %ecx,(%rsi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @reverseNumberByRecursion(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 1, i32* %3
br label %21
9: ; preds = %2
%10 = load i32*, i32** %5
%11 = load i32, i32* %10
%12 = mul nsw i32 %11, 10
%13 = load i32, i32* %4
%14 = srem i32 %13, 10
%15 = add nsw i32 %12, %14
%16 = load i32*, i32** %5
store i32 %15, i32* %16
%17 = load i32, i32* %4
%18 = sdiv i32 %17, 10
%19 = load i32*, i32** %5
%20 = call i32 @reverseNumberByRecursion(i32 %18, i32* %19)
store i32 %20, i32* %3
br label %21
21: ; preds = %9, %8
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @reverseNumberByRecursion(i32 %0, i32* nocapture %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %16, label %4
4: ; preds = %2
%5 = load i32, i32* %1
br label %6
6: ; preds = %4, %6
%7 = phi i32 [ %5, %4 ], [ %11, %6 ]
%8 = phi i32 [ %0, %4 ], [ %12, %6 ]
%9 = mul nsw i32 %7, 10
%10 = srem i32 %8, 10
%11 = add nsw i32 %9, %10
%12 = sdiv i32 %8, 10
%13 = add i32 %8, 9
%14 = icmp ult i32 %13, 19
br i1 %14, label %15, label %6
15: ; preds = %6
store i32 %11, i32* %1
br label %16
16: ; preds = %15, %2
ret i32 1
}
int test_imm_0Duint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x0D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Duint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0xd,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Duint64_midword_reg>:
test   $0xd0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Duint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 13
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_0Duint64_midword_reg(i64 %0) {
%2 = and i64 %0, 851968
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void foo288(int p) {}


x86 assembly (clang, -O0):
<foo288>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo288>:
ret

LLVM IR (-O0):
define void @foo288(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo288(i32 %0) {
ret void
}
/* Variables and functions */
int GPTLerror(char *, char const *);
int init_nanotime() {
  static const char *thisfunc = "init_nanotime";
  return GPTLerror("%s: not enabled\n", thisfunc);
}


x86 assembly (clang, -O0):
<init_nanotime>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f0d(%rip),%rsi
lea    0xeec(%rip),%rdi
call   1030 <GPTLerror@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_nanotime>:
lea    0xef7(%rip),%rdi
lea    0xee2(%rip),%rsi
jmp    1030 <GPTLerror@plt>

LLVM IR (-O0):
@init_nanotime.thisfunc = internal global i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i32 0, i32 0)
@.str = [14 x i8] c"init_nanotime\00"
@.str.1 = [17 x i8] c"%s: not enabled\0A\00"
define i32 @init_nanotime() {
%1 = load i8*, i8** @init_nanotime.thisfunc
%2 = call i32 @GPTLerror(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i8* %1)
ret i32 %2
}

LLVM IR (-O2):
@.str = [14 x i8] c"init_nanotime\00"
@.str.1 = [17 x i8] c"%s: not enabled\0A\00"
define i32 @init_nanotime() {
%1 = tail call i32 @GPTLerror(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ say(char *, int);
void hit(void) { say("WATER MUST DIE!", 1); }


x86 assembly (clang, -O0):
<hit>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x1,%esi
call   1030 <say@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hit>:
lea    0xee9(%rip),%rdi
mov    $0x1,%esi
jmp    1030 <say@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"WATER MUST DIE!\00"
define void @hit() {
%1 = call i32 @say(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"WATER MUST DIE!\00"
define void @hit() {
%1 = tail call i32 @say(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ReadADchip(int);
int /*<<< orphan*/ ReadIOchip(int);
void ReadCard(int card_no) {
  int chip_no;
  chip_no = card_no * 2;
  ReadIOchip(chip_no);
  ReadIOchip(chip_no + 1);
  ReadADchip(card_no);
}


x86 assembly (clang, -O0):
<ReadCard>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <ReadIOchip@plt>
mov    -0x8(%rbp),%edi
add    $0x1,%edi
call   1040 <ReadIOchip@plt>
mov    -0x4(%rbp),%edi
call   1030 <ReadADchip@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReadCard>:
push   %rbx
mov    %edi,%ebx
lea    (%rbx,%rbx,1),%edi
call   1040 <ReadIOchip@plt>
lea    (%rbx,%rbx,1),%edi
add    $0x1,%edi
call   1040 <ReadIOchip@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <ReadADchip@plt>

LLVM IR (-O0):
define void @ReadCard(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %4, 2
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @ReadIOchip(i32 %6)
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
%10 = call i32 @ReadIOchip(i32 %9)
%11 = load i32, i32* %2
%12 = call i32 @ReadADchip(i32 %11)
ret void
}

LLVM IR (-O2):
define void @ReadCard(i32 %0) {
%2 = shl nsw i32 %0, 1
%3 = tail call i32 @ReadIOchip(i32 %2)
%4 = or i32 %2, 1
%5 = tail call i32 @ReadIOchip(i32 %4)
%6 = tail call i32 @ReadADchip(i32 %0)
ret void
}
void CG_NextItem_f(void) {}


x86 assembly (clang, -O0):
<CG_NextItem_f>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_NextItem_f>:
ret

LLVM IR (-O0):
define void @CG_NextItem_f() {
ret void
}

LLVM IR (-O2):
define void @CG_NextItem_f() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fill_srgb_lut();
int f0r_init() {
  fill_srgb_lut();
  return 1;
}


x86 assembly (clang, -O0):
<f0r_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <fill_srgb_lut@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f0r_init>:
push   %rax
xor    %eax,%eax
call   1030 <fill_srgb_lut@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @f0r_init() {
%1 = call i32 (...) @fill_srgb_lut()
ret i32 1
}

LLVM IR (-O2):
define i32 @f0r_init() {
%1 = tail call i32 (...) @fill_srgb_lut()
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ __svgalib_driver8_copybox(int, int, int, int, int, int);
void __svgalib_driver16_copybox(int x1, int y1, int w, int h, int x2, int y2) {
  __svgalib_driver8_copybox(x1 * 2, y1, w * 2, h, x2 * 2, y2);
}


x86 assembly (clang, -O0):
<__svgalib_driver16_copybox>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x4(%rbp),%edi
shl    $0x1,%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
shl    $0x1,%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
shl    $0x1,%r8d
mov    -0x18(%rbp),%r9d
call   1030 <__svgalib_driver8_copybox@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__svgalib_driver16_copybox>:
add    %edi,%edi
add    %edx,%edx
add    %r8d,%r8d
jmp    1030 <__svgalib_driver8_copybox@plt>

LLVM IR (-O0):
define void @__svgalib_driver16_copybox(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = load i32, i32* %7
%14 = mul nsw i32 %13, 2
%15 = load i32, i32* %8
%16 = load i32, i32* %9
%17 = mul nsw i32 %16, 2
%18 = load i32, i32* %10
%19 = load i32, i32* %11
%20 = mul nsw i32 %19, 2
%21 = load i32, i32* %12
%22 = call i32 @__svgalib_driver8_copybox(i32 %14, i32 %15, i32 %17, i32 %18, i32 %20, i32 %21)
ret void
}

LLVM IR (-O2):
define void @__svgalib_driver16_copybox(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = shl nsw i32 %0, 1
%8 = shl nsw i32 %2, 1
%9 = shl nsw i32 %4, 1
%10 = tail call i32 @__svgalib_driver8_copybox(i32 %7, i32 %1, i32 %8, i32 %3, i32 %9, i32 %5)
ret void
}
int foo(int a) {
  int i, result;
  result = 0;
  i = 1;
  while (i <= a) {
    result = result + i;
    i = i + 1;
  }
  return result;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     1138 <foo+0x38>
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1115 <foo+0x15>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
test   %edi,%edi
jle    1118 <foo+0x18>
lea    -0x1(%rdi),%eax
lea    -0x2(%rdi),%ecx
imul   %rax,%rcx
shr    %rcx
lea    (%rcx,%rdi,2),%eax
add    $0xffffffff,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
store i32 1, i32* %3
br label %5
5: ; preds = %9, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp sle i32 %6, %7
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i32, i32* %4
%11 = load i32, i32* %3
%12 = add nsw i32 %10, %11
store i32 %12, i32* %4
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %5
15: ; preds = %5
%16 = load i32, i32* %4
ret i32 %16
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %14, label %3
3: ; preds = %1
%4 = shl nuw i32 %0, 1
%5 = add nsw i32 %0, -1
%6 = zext i32 %5 to i33
%7 = add nsw i32 %0, -2
%8 = zext i32 %7 to i33
%9 = mul i33 %6, %8
%10 = lshr i33 %9, 1
%11 = trunc i33 %10 to i32
%12 = add i32 %4, %11
%13 = add i32 %12, -1
br label %14
14: ; preds = %3, %1
%15 = phi i32 [ 0, %1 ], [ %13, %3 ]
ret i32 %15
}
long long ssus() { return 0xffffffff7fffffffLL; }


x86 assembly (clang, -O0):
<ssus>:
push   %rbp
mov    %rsp,%rbp
movabs $0xffffffff7fffffff,%rax
ff ff ff
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssus>:
movabs $0xffffffff7fffffff,%rax
ff ff ff
ret

LLVM IR (-O0):
define i64 @ssus() {
ret i64 -2147483649
}

LLVM IR (-O2):
define i64 @ssus() {
ret i64 -2147483649
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0xf7() {
  Assert_real((isspace(247) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              1240, ("isspace should be 0 for 0xf7"));
}


x86 assembly (clang, -O0):
<t_isspace_0xf7>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf7,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4d8,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0xf7>:
push   %rax
mov    $0xf7,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4d8,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0xf7\00"
define void @t_isspace_0xf7() {
%1 = call i64 @isspace(i32 247)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1240, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0xf7\00"
define void @t_isspace_0xf7() {
%1 = tail call i64 @isspace(i32 247)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1240, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void foo514() {}


x86 assembly (clang, -O0):
<foo514>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo514>:
ret

LLVM IR (-O0):
define void @foo514() {
ret void
}

LLVM IR (-O2):
define void @foo514() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fs_fnwrite(int /*<<< orphan*/ *, char *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
int fs_fwrite(FILE *file, char *buffer) {
  return fs_fnwrite(file, buffer, strlen(buffer));
}


x86 assembly (clang, -O0):
<fs_fwrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <fs_fnwrite@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fs_fwrite>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fs_fnwrite@plt>

LLVM IR (-O0):
define i32 @fs_fwrite(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i32 @fs_fnwrite(i32* %5, i8* %6, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @fs_fwrite(i32* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @fs_fnwrite(i32* %0, i8* %1, i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void print_usage(char *argv0) {
  fprintf(stderr,
          "Usage: %s <address>\n"
          "\taddress must be a string containing "
          "an IP dotted address\n",
          argv0);
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [79 x i8] c"Usage: %s <address>\0A\09address must be a string containing an IP dotted address\0A\00"
define void @print_usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([79 x i8], [79 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [79 x i8] c"Usage: %s <address>\0A\09address must be a string containing an IP dotted address\0A\00"
define void @print_usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([79 x i8], [79 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void vec3_sub2(double *v1, const double *v2) {
  v1[0] -= v2[0];
  v1[1] -= v2[1];
  v1[2] -= v2[2];
}


x86 assembly (clang, -O0):
<vec3_sub2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
subsd  %xmm1,%xmm0
movsd  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
movsd  0x8(%rax),%xmm1
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
subsd  %xmm1,%xmm0
movsd  %xmm0,0x8(%rax)
mov    -0x10(%rbp),%rax
movsd  0x10(%rax),%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
subsd  %xmm1,%xmm0
movsd  %xmm0,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec3_sub2>:
movsd  (%rdi),%xmm0
movsd  0x8(%rdi),%xmm1
subsd  (%rsi),%xmm0
movsd  %xmm0,(%rdi)
subsd  0x8(%rsi),%xmm1
movsd  %xmm1,0x8(%rdi)
movsd  0x10(%rdi),%xmm0
subsd  0x10(%rsi),%xmm0
movsd  %xmm0,0x10(%rdi)
ret

LLVM IR (-O0):
define void @vec3_sub2(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %4
%6 = getelementptr inbounds double, double* %5, i64 0
%7 = load double, double* %6
%8 = load double*, double** %3
%9 = getelementptr inbounds double, double* %8, i64 0
%10 = load double, double* %9
%11 = fsub double %10, %7
store double %11, double* %9
%12 = load double*, double** %4
%13 = getelementptr inbounds double, double* %12, i64 1
%14 = load double, double* %13
%15 = load double*, double** %3
%16 = getelementptr inbounds double, double* %15, i64 1
%17 = load double, double* %16
%18 = fsub double %17, %14
store double %18, double* %16
%19 = load double*, double** %4
%20 = getelementptr inbounds double, double* %19, i64 2
%21 = load double, double* %20
%22 = load double*, double** %3
%23 = getelementptr inbounds double, double* %22, i64 2
%24 = load double, double* %23
%25 = fsub double %24, %21
store double %25, double* %23
ret void
}

LLVM IR (-O2):
define void @vec3_sub2(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %1
%4 = load double, double* %0
%5 = fsub double %4, %3
store double %5, double* %0
%6 = getelementptr inbounds double, double* %1, i64 1
%7 = load double, double* %6
%8 = getelementptr inbounds double, double* %0, i64 1
%9 = load double, double* %8
%10 = fsub double %9, %7
store double %10, double* %8
%11 = getelementptr inbounds double, double* %1, i64 2
%12 = load double, double* %11
%13 = getelementptr inbounds double, double* %0, i64 2
%14 = load double, double* %13
%15 = fsub double %14, %12
store double %15, double* %13
ret void
}
void RTLogWriteStdErr(void) {}


x86 assembly (clang, -O0):
<RTLogWriteStdErr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTLogWriteStdErr>:
ret

LLVM IR (-O0):
define void @RTLogWriteStdErr() {
ret void
}

LLVM IR (-O2):
define void @RTLogWriteStdErr() {
ret void
}
char getPubCity() {
  char city[50];
  printf("What city was this book was published in?\n");
  scanf("%s", city);
  return city;
}


x86 assembly (clang, -O0):
<getPubCity>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
lea    0xed1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    -0x40(%rbp),%rsi
lea    0xeea(%rip),%rdi
mov    $0x0,%al
call   1040 <scanf@plt>
lea    -0x40(%rbp),%rax
movsbl %al,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getPubCity>:
push   %rbx
sub    $0x40,%rsp
lea    0xed7(%rip),%rdi
call   1030 <puts@plt>
lea    0xec8(%rip),%rdi
mov    %rsp,%rbx
mov    %rbx,%rsi
xor    %eax,%eax
call   1040 <scanf@plt>
mov    %ebx,%eax
add    $0x40,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [43 x i8] c"What city was this book was published in?\0A\00"
@.str.1 = [3 x i8] c"%s\00"
define signext i8 @getPubCity() {
%1 = alloca [50 x i8]
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%3 = getelementptr inbounds [50 x i8], [50 x i8]* %1, i64 0, i64 0
%4 = call i32 (i8*, ...) @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %3)
%5 = getelementptr inbounds [50 x i8], [50 x i8]* %1, i64 0, i64 0
%6 = ptrtoint i8* %5 to i8
ret i8 %6
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"%s\00"
@str = [42 x i8] c"What city was this book was published in?\00"
define signext i8 @getPubCity() {
%1 = alloca [50 x i8]
%2 = getelementptr inbounds [50 x i8], [50 x i8]* %1, i64 0, i64 0
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @str, i64 0, i64 0))
%4 = call i32 (i8*, ...) @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %2)
%5 = ptrtoint [50 x i8]* %1 to i64
%6 = trunc i64 %5 to i8
ret i8 %6
}
/* Type definitions */
struct gendisk {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct gendisk *);
void HsFreeGendisk(struct gendisk *disk) {
  free(disk);
  return;
}


x86 assembly (clang, -O0):
<HsFreeGendisk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HsFreeGendisk>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.gendisk = type { i32 }
define void @HsFreeGendisk(%struct.gendisk* %0) {
%2 = alloca %struct.gendisk*
store %struct.gendisk* %0, %struct.gendisk** %2
%3 = load %struct.gendisk*, %struct.gendisk** %2
%4 = call i32 @free(%struct.gendisk* %3)
ret void
}

LLVM IR (-O2):
%struct.gendisk = type { i32 }
define void @HsFreeGendisk(%struct.gendisk* nocapture %0) {
%2 = tail call i32 @free(%struct.gendisk* %0)
ret void
}
int getValue(char c) {
  return (c >= '0' && c <= '9') ? (c - '0') : (c - 'A') + 10;
}


x86 assembly (clang, -O0):
<getValue>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x30,%eax
jl     1133 <getValue+0x33>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
jg     1133 <getValue+0x33>
movsbl -0x1(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x8(%rbp)
jmp    1140 <getValue+0x40>
movsbl -0x1(%rbp),%eax
sub    $0x41,%eax
add    $0xa,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getValue>:
lea    -0x30(%rdi),%ecx
lea    -0x37(%rdi),%edx
lea    -0x30(%rdi),%eax
cmp    $0xa,%cl
cmovae %edx,%eax
ret

LLVM IR (-O0):
define i32 @getValue(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 57
br i1 %9, label %10, label %14
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = sub nsw i32 %12, 48
br label %19
14: ; preds = %6, %1
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = sub nsw i32 %16, 65
%18 = add nsw i32 %17, 10
br label %19
19: ; preds = %14, %10
%20 = phi i32 [ %13, %10 ], [ %18, %14 ]
ret i32 %20
}

LLVM IR (-O2):
define i32 @getValue(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add i8 %0, -48
%4 = icmp ult i8 %3, 10
%5 = select i1 %4, i32 -48, i32 -55
%6 = add nsw i32 %5, %2
ret i32 %6
}
int do_296() { return 296; }


x86 assembly (clang, -O0):
<do_296>:
push   %rbp
mov    %rsp,%rbp
mov    $0x128,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_296>:
mov    $0x128,%eax
ret

LLVM IR (-O0):
define i32 @do_296() {
ret i32 296
}

LLVM IR (-O2):
define i32 @do_296() {
ret i32 296
}
/* Variables and functions */
int f96(int *);
int f97(int *p) { return f96(p); }


x86 assembly (clang, -O0):
<f97>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f96@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f97>:
jmp    1030 <f96@plt>

LLVM IR (-O0):
define i32 @f97(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f96(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f97(i32* %0) {
%2 = tail call i32 @f96(i32* %0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/ *);
int /*<<< orphan*/ putb(int /*<<< orphan*/ *, char const);
void putsym(FILE *out, int sym, char const *charv) {
  if (sym)
    putb(out, charv[sym]);
  else
    fputs("--", out);
}


x86 assembly (clang, -O0):
<putsym>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1157 <putsym+0x37>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%esi
call   1030 <putb@plt>
jmp    1167 <putsym+0x47>
mov    -0x8(%rbp),%rsi
lea    0xe9e(%rip),%rdi
call   1040 <fputs@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putsym>:
mov    %rdi,%rcx
test   %esi,%esi
je     1136 <putsym+0x16>
movslq %esi,%rax
movsbl (%rdx,%rax,1),%esi
mov    %rcx,%rdi
jmp    1030 <putb@plt>
lea    0xec3(%rip),%rdi
mov    $0x2,%esi
mov    $0x1,%edx
jmp    1040 <fwrite@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"--\00"
define void @putsym(i32* %0, i32 %1, i8* %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i8*
store i32* %0, i32** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %5
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %3
%10 = load i32*, i32** %4
%11 = load i8*, i8** %6
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i8, i8* %14
%16 = call i32 @putb(i32* %10, i8 signext %15)
br label %20
17: ; preds = %3
%18 = load i32*, i32** %4
%19 = call i32 @fputs(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %18)
br label %20
20: ; preds = %17, %9
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"--\00"
define void @putsym(i32* %0, i32 %1, i8* nocapture %2) {
%4 = icmp eq i32 %1, 0
br i1 %4, label %10, label %5
5: ; preds = %3
%6 = sext i32 %1 to i64
%7 = getelementptr inbounds i8, i8* %2, i64 %6
%8 = load i8, i8* %7
%9 = tail call i32 @putb(i32* %0, i8 signext %8)
br label %12
10: ; preds = %3
%11 = tail call i64 @fwrite(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i64 2, i64 1, i32* %0)
br label %12
12: ; preds = %10, %5
ret void
}
void g_key_file_get_comment() {}


x86 assembly (clang, -O0):
<g_key_file_get_comment>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_key_file_get_comment>:
ret

LLVM IR (-O0):
define void @g_key_file_get_comment() {
ret void
}

LLVM IR (-O2):
define void @g_key_file_get_comment() {
ret void
}
void GPIO1Pin23PinMuxSetup(void) {
  (*((volatile unsigned int *)((0x44E10000) + (0x840 + (7 * 4))))) = (7);
}


x86 assembly (clang, -O0):
<GPIO1Pin23PinMuxSetup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x44e1085c,%eax
movl   $0x7,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIO1Pin23PinMuxSetup>:
movl   $0x7,0x44e1085c
ret

LLVM IR (-O0):
define void @GPIO1Pin23PinMuxSetup() {
store volatile i32 7, i32* inttoptr (i64 1155598428 to i32*)
ret void
}

LLVM IR (-O2):
define void @GPIO1Pin23PinMuxSetup() {
store volatile i32 7, i32* inttoptr (i64 1155598428 to i32*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ scanf(char *, int *);
int /*<<< orphan*/ solve();
int main(void) {
  int T;
  scanf("%d", &T);
  while (T--) {
    solve();
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x8(%rbp)
cmp    $0x0,%eax
je     115f <main+0x3f>
mov    $0x0,%al
call   1030 <solve@plt>
jmp    113f <main+0x1f>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
subl   $0x1,0x4(%rsp)
jb     114e <main+0x2e>
nopl   0x0(%rax)
xor    %eax,%eax
call   1030 <solve@plt>
subl   $0x1,0x4(%rsp)
jae    1140 <main+0x20>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
br label %4
4: ; preds = %8, %0
%5 = load i32, i32* %2
%6 = add nsw i32 %5, -1
store i32 %6, i32* %2
%7 = icmp ne i32 %5, 0
br i1 %7, label %8, label %10
8: ; preds = %4
%9 = call i32 (...) @solve()
br label %4
10: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = add nsw i32 %4, -1
store i32 %5, i32* %1
%6 = icmp eq i32 %4, 0
br i1 %6, label %12, label %7
7: ; preds = %0, %7
%8 = call i32 (...) @solve()
%9 = load i32, i32* %1
%10 = add nsw i32 %9, -1
store i32 %10, i32* %1
%11 = icmp eq i32 %9, 0
br i1 %11, label %12, label %7
12: ; preds = %7, %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __analyzer_eval(int);
void test_range_float_gt_lt(float f) {
  if (f > 3)
    if (f < 5)
      __analyzer_eval(f == 4);
}


x86 assembly (clang, -O0):
<test_range_float_gt_lt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xed6(%rip),%xmm1
ucomiss %xmm1,%xmm0
jbe    116c <test_range_float_gt_lt+0x5c>
movss  0xec9(%rip),%xmm0
ucomiss -0x4(%rbp),%xmm0
jbe    1167 <test_range_float_gt_lt+0x57>
movss  -0x4(%rbp),%xmm0
movss  0xeb6(%rip),%xmm1
ucomiss %xmm1,%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__analyzer_eval@plt>
jmp    116c <test_range_float_gt_lt+0x5c>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_range_float_gt_lt>:
ucomiss 0xee9(%rip),%xmm0
jbe    113b <test_range_float_gt_lt+0x2b>
movss  0xee3(%rip),%xmm1
ucomiss %xmm0,%xmm1
jbe    113b <test_range_float_gt_lt+0x2b>
cmpeqss 0xed9(%rip),%xmm0
movd   %xmm0,%edi
and    $0x1,%edi
jmp    1030 <__analyzer_eval@plt>
ret

LLVM IR (-O0):
define void @test_range_float_gt_lt(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp ogt float %3, 3.000000e+00
br i1 %4, label %5, label %14
5: ; preds = %1
%6 = load float, float* %2
%7 = fcmp olt float %6, 5.000000e+00
br i1 %7, label %8, label %13
8: ; preds = %5
%9 = load float, float* %2
%10 = fcmp oeq float %9, 4.000000e+00
%11 = zext i1 %10 to i32
%12 = call i32 @__analyzer_eval(i32 %11)
br label %13
13: ; preds = %8, %5
br label %14
14: ; preds = %13, %1
ret void
}

LLVM IR (-O2):
define void @test_range_float_gt_lt(float %0) {
%2 = fcmp ogt float %0, 3.000000e+00
%3 = fcmp olt float %0, 5.000000e+00
%4 = and i1 %2, %3
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = fcmp oeq float %0, 4.000000e+00
%7 = zext i1 %6 to i32
%8 = tail call i32 @__analyzer_eval(i32 %7)
br label %9
9: ; preds = %5, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ tambah_data_mhs();
int /*<<< orphan*/ tampil();
int main() {
  tambah_data_mhs();
  tampil();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <tambah_data_mhs@plt>
mov    $0x0,%al
call   1030 <tampil@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <tambah_data_mhs@plt>
xor    %eax,%eax
call   1030 <tampil@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @tambah_data_mhs()
%3 = call i32 (...) @tampil()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @tambah_data_mhs()
%2 = tail call i32 (...) @tampil()
ret i32 0
}
int test_imm_87int8_mem(signed char *val) {
  return ((*val) & (0x87 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_87int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0x87,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_87int8_mem>:
testb  $0x87,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_87int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 135
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_87int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -121
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}