xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int main(void) {
  char side_a[] = "SIDE A";
  char dont[] = {'W', 'O', 'W', '!'};
  char side_b[] = "SIDE B";
  puts(dont);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xedb(%rip),%eax
mov    %eax,-0xb(%rbp)
mov    0xed5(%rip),%ax
mov    %ax,-0x7(%rbp)
mov    0xecd(%rip),%al
mov    %al,-0x5(%rbp)
mov    0xecc(%rip),%eax
mov    %eax,-0xf(%rbp)
mov    0xebc(%rip),%eax
mov    %eax,-0x16(%rbp)
mov    0xeb6(%rip),%ax
mov    %ax,-0x12(%rbp)
mov    0xeae(%rip),%al
mov    %al,-0x10(%rbp)
lea    -0xf(%rbp),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x21574f57,0x4(%rsp)
21
lea    0x4(%rsp),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.main.side_a = [7 x i8] c"SIDE A\00"
@__const.main.dont = [4 x i8] c"WOW!"
@__const.main.side_b = [7 x i8] c"SIDE B\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [7 x i8]
%3 = alloca [4 x i8]
%4 = alloca [7 x i8]
store i32 0, i32* %1
%5 = bitcast [7 x i8]* %2 to i8*
%6 = bitcast [4 x i8]* %3 to i8*
%7 = bitcast [7 x i8]* %4 to i8*
%8 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%9 = call i32 @puts(i8* %8)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 559370071, i32* %1
%3 = call i32 @puts(i8* %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, long, long);
int main(int argc, char **argv) {
  long j;
  long f1 = 1, f2 = 1;
  for (j = 3; j <= 1000000000; ++j) {
    long t;
    t = f1;
    f1 = f2;
    f2 = t + f2;
  }
  printf("%ld %ld\n", j, f2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x1,-0x20(%rbp)
movq   $0x1,-0x28(%rbp)
movq   $0x3,-0x18(%rbp)
cmpq   $0x3b9aca00,-0x18(%rbp)
3b
jg     1179 <main+0x69>
mov    -0x20(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x30(%rbp),%rax
add    -0x28(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    113e <main+0x2e>
mov    -0x18(%rbp),%rsi
mov    -0x28(%rbp),%rdx
lea    0xe78(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%edx
mov    $0x3b9ac9fe,%eax
mov    $0x1,%ecx
nop
add    %rdx,%rcx
add    %rcx,%rdx
add    $0xfffffffffffffffe,%rax
jne    1120 <main+0x10>
push   %rax
lea    0xecc(%rip),%rdi
mov    $0x3b9aca01,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"%ld %ld\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i64 1, i64* %7
store i64 1, i64* %8
store i64 3, i64* %6
br label %10
10: ; preds = %19, %2
%11 = load i64, i64* %6
%12 = icmp sle i64 %11, 1000000000
br i1 %12, label %13, label %22
13: ; preds = %10
%14 = load i64, i64* %7
store i64 %14, i64* %9
%15 = load i64, i64* %8
store i64 %15, i64* %7
%16 = load i64, i64* %9
%17 = load i64, i64* %8
%18 = add nsw i64 %16, %17
store i64 %18, i64* %8
br label %19
19: ; preds = %13
%20 = load i64, i64* %6
%21 = add nsw i64 %20, 1
store i64 %21, i64* %6
br label %10
22: ; preds = %10
%23 = load i64, i64* %6
%24 = load i64, i64* %8
%25 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 %23, i64 %24)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"%ld %ld\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i64 [ 3, %2 ], [ %9, %3 ]
%5 = phi i64 [ 1, %2 ], [ %8, %3 ]
%6 = phi i64 [ 1, %2 ], [ %7, %3 ]
%7 = add nsw i64 %5, %6
%8 = add nsw i64 %7, %5
%9 = add nuw nsw i64 %4, 2
%10 = icmp eq i64 %9, 1000000001
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 1000000001, i64 %8)
ret i32 0
}
/* Variables and functions */
void puts(const char *s) {
  while (*s != '\0')
    *((volatile char *)(0xf0000000)) = *s++;
}


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1135 <puts+0x35>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
mov    (%rax),%cl
mov    $0xf0000000,%eax
mov    %cl,(%rax)
jmp    1108 <puts+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
mov    (%rdi),%al
test   %al,%al
je     111d <puts+0x1d>
add    $0x1,%rdi
mov    $0xf0000000,%ecx
nop
mov    %al,(%rcx)
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
jne    1110 <puts+0x10>
ret

LLVM IR (-O0):
define void @puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
%11 = load i8, i8* %9
store volatile i8 %11, i8* inttoptr (i64 4026531840 to i8*)
br label %3
12: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @puts(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %10, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %8, %4 ], [ %2, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
store volatile i8 %5, i8* inttoptr (i64 4026531840 to i8*)
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, 0
br i1 %9, label %10, label %4
10: ; preds = %4, %1
ret void
}
int main() {
  int tmp[5] = {1, 2, 3};
  for (int i = 0; i < 10; i++) {
    tmp[i] = 0;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    0xeee(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xeeb(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xee9(%rip),%eax
mov    %eax,-0x10(%rbp)
movl   $0x0,-0x24(%rbp)
cmpl   $0xa,-0x24(%rbp)
jge    1155 <main+0x55>
movslq -0x24(%rbp),%rax
movl   $0x0,-0x20(%rbp,%rax,4)
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    1131 <main+0x31>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@__const.main.tmp = [5 x i32] [i32 1, i32 2, i32 3, i32 0, i32 0]
define i32 @main() {
%1 = alloca i32
%2 = alloca [5 x i32]
%3 = alloca i32
store i32 0, i32* %1
%4 = bitcast [5 x i32]* %2 to i8*
store i32 0, i32* %3
br label %5
5: ; preds = %12, %0
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 10
br i1 %7, label %8, label %15
8: ; preds = %5
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 %10
store i32 0, i32* %11
br label %12
12: ; preds = %8
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %5
15: ; preds = %5
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
unsigned long long shift_52_bit_feedback_register() {
  static unsigned long long register_52 = 1;
  unsigned long long new_bit;
  new_bit = ((register_52 & 0x01) ^ ((register_52 & 0x08) >> 3));
  register_52 = register_52 >> 1;
  register_52 = register_52 | (new_bit << 51);
  return (register_52);
}


x86 assembly (clang, -O0):
<shift_52_bit_feedback_register>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f15(%rip),%rax
and    $0x1,%rax
mov    0x2f0a(%rip),%rcx
and    $0x8,%rcx
shr    $0x3,%rcx
xor    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    0x2ef4(%rip),%rax
shr    $0x1,%rax
mov    %rax,0x2ee9(%rip)
mov    0x2ee2(%rip),%rax
mov    -0x8(%rbp),%rcx
shl    $0x33,%rcx
or     %rcx,%rax
mov    %rax,0x2ed0(%rip)
mov    0x2ec9(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shift_52_bit_feedback_register>:
mov    0x2f19(%rip),%rcx
mov    %ecx,%eax
shr    $0x3,%eax
xor    %ecx,%eax
shr    %rcx
and    $0x1,%eax
shl    $0x33,%rax
or     %rcx,%rax
mov    %rax,0x2efe(%rip)
ret

LLVM IR (-O0):
@shift_52_bit_feedback_register.register_52 = internal global i64 1
define i64 @shift_52_bit_feedback_register() {
%1 = alloca i64
%2 = load i64, i64* @shift_52_bit_feedback_register.register_52
%3 = and i64 %2, 1
%4 = load i64, i64* @shift_52_bit_feedback_register.register_52
%5 = and i64 %4, 8
%6 = lshr i64 %5, 3
%7 = xor i64 %3, %6
store i64 %7, i64* %1
%8 = load i64, i64* @shift_52_bit_feedback_register.register_52
%9 = lshr i64 %8, 1
store i64 %9, i64* @shift_52_bit_feedback_register.register_52
%10 = load i64, i64* @shift_52_bit_feedback_register.register_52
%11 = load i64, i64* %1
%12 = shl i64 %11, 51
%13 = or i64 %10, %12
store i64 %13, i64* @shift_52_bit_feedback_register.register_52
%14 = load i64, i64* @shift_52_bit_feedback_register.register_52
ret i64 %14
}

LLVM IR (-O2):
@shift_52_bit_feedback_register.register_52 = internal unnamed_addr global i64 1
define i64 @shift_52_bit_feedback_register() {
%1 = load i64, i64* @shift_52_bit_feedback_register.register_52
%2 = lshr i64 %1, 3
%3 = xor i64 %2, %1
%4 = lshr i64 %1, 1
%5 = shl i64 %3, 51
%6 = and i64 %5, 2251799813685248
%7 = or i64 %6, %4
store i64 %7, i64* @shift_52_bit_feedback_register.register_52
ret i64 %7
}
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ dispatch_and_return(struct __test_metadata *);
void wrapper_dispatch_and_return(struct __test_metadata *_metadata,
                                 struct __fixture_variant_metadata *variant) {
  dispatch_and_return(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_dispatch_and_return>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dispatch_and_return@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_dispatch_and_return>:
jmp    1030 <dispatch_and_return@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_dispatch_and_return(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @dispatch_and_return(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_dispatch_and_return(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @dispatch_and_return(%struct.__test_metadata* %0)
ret void
}
/* Variables and functions */
float ANTweenTimingFunctionExpoOut(float, int /*<<< orphan*/, int, float);
float ANTweenProgressTimingFunctionExpoOut(float time, float duration) {
  return ANTweenTimingFunctionExpoOut(time, 0, 1, duration);
}


x86 assembly (clang, -O0):
<ANTweenProgressTimingFunctionExpoOut>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <ANTweenTimingFunctionExpoOut@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ANTweenProgressTimingFunctionExpoOut>:
xor    %edi,%edi
mov    $0x1,%esi
jmp    1030 <ANTweenTimingFunctionExpoOut@plt>

LLVM IR (-O0):
define float @ANTweenProgressTimingFunctionExpoOut(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call float @ANTweenTimingFunctionExpoOut(float %5, i32 0, i32 1, float %6)
ret float %7
}

LLVM IR (-O2):
define float @ANTweenProgressTimingFunctionExpoOut(float %0, float %1) {
%3 = tail call float @ANTweenTimingFunctionExpoOut(float %0, i32 0, i32 1, float %1)
ret float %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
int main() {
  FILE *arquivo;
  arquivo = fopen("saida.txt", "w");
  fprintf(arquivo, "Oi, mundo!\n");
  fclose(arquivo);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    0xebd(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xeab(%rip),%rsi
call   1040 <fprintf@plt>
mov    -0x10(%rbp),%rdi
call   1030 <fclose@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xec8(%rip),%rdi
lea    0xecb(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,%rbx
lea    0xebe(%rip),%rdi
mov    $0xb,%esi
mov    $0x1,%edx
mov    %rax,%rcx
call   1050 <fwrite@plt>
mov    %rbx,%rdi
call   1030 <fclose@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"saida.txt\00"
@.str.1 = [2 x i8] c"w\00"
@.str.2 = [12 x i8] c"Oi, mundo!\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32 0, i32* %1
%3 = call i32* @fopen(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %3, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @fprintf(i32* %4, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0))
%6 = load i32*, i32** %2
%7 = call i32 @fclose(i32* %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"saida.txt\00"
@.str.1 = [2 x i8] c"w\00"
@.str.2 = [12 x i8] c"Oi, mundo!\0A\00"
define i32 @main() {
%1 = tail call i32* @fopen(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0), i64 11, i64 1, i32* %1)
%3 = tail call i32 @fclose(i32* %1)
ret i32 0
}
int uread(fd, b, n)
char *b;
int fd, n;
{ return (read(fd, b, n)); }


x86 assembly (clang, -O0):
<uread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    $0x0,%al
call   1030 <read@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uread>:
xor    %eax,%eax
jmp    1030 <read@plt>

LLVM IR (-O0):
define i32 @uread(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @read to i32 (i32, i8*, i32, ...)*)(i32 %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @uread(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @read to i32 (i32, i8*, i32, ...)*)(i32 %0, i8* %1, i32 %2)
ret i32 %4
}
int EFlash_IdCheck() {
  unsigned int eflash_id;
  eflash_id = *(volatile unsigned int *)(0x40009000 + 0xFE8) & (0x7 | 0x8);
  if (*(volatile unsigned int *)(0x40009000 + 0xFE0) != 0x30 ||
      *(volatile unsigned int *)(0x40009000 + 0xFE4) != 0xB8 ||
      eflash_id != 0x0B)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<EFlash_IdCheck>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40009fe8,%eax
mov    (%rax),%eax
and    $0xf,%eax
mov    %eax,-0x8(%rbp)
mov    $0x40009fe0,%eax
mov    (%rax),%eax
cmp    $0x30,%eax
jne    113d <EFlash_IdCheck+0x3d>
mov    $0x40009fe4,%eax
mov    (%rax),%eax
cmp    $0xb8,%eax
jne    113d <EFlash_IdCheck+0x3d>
cmpl   $0xb,-0x8(%rbp)
je     1149 <EFlash_IdCheck+0x49>
movl   $0x1,-0x4(%rbp)
jmp    1150 <EFlash_IdCheck+0x50>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<EFlash_IdCheck>:
mov    0x40009fe8,%ecx
mov    0x40009fe0,%edx
mov    $0x1,%eax
cmp    $0x30,%edx
jne    1131 <EFlash_IdCheck+0x31>
and    $0xf,%ecx
mov    $0xb8,%edx
xor    0x40009fe4,%edx
xor    $0xb,%ecx
xor    %eax,%eax
or     %edx,%ecx
setne  %al
ret

LLVM IR (-O0):
define i32 @EFlash_IdCheck() {
%1 = alloca i32
%2 = alloca i32
%3 = load volatile i32, i32* inttoptr (i64 1073782760 to i32*)
%4 = and i32 %3, 15
store i32 %4, i32* %2
%5 = load volatile i32, i32* inttoptr (i64 1073782752 to i32*)
%6 = icmp ne i32 %5, 48
br i1 %6, label %13, label %7
7: ; preds = %0
%8 = load volatile i32, i32* inttoptr (i64 1073782756 to i32*)
%9 = icmp ne i32 %8, 184
br i1 %9, label %13, label %10
10: ; preds = %7
%11 = load i32, i32* %2
%12 = icmp ne i32 %11, 11
br i1 %12, label %13, label %14
13: ; preds = %10, %7, %0
store i32 1, i32* %1
br label %15
14: ; preds = %10
store i32 0, i32* %1
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %1
ret i32 %16
}

LLVM IR (-O2):
define i32 @EFlash_IdCheck() {
%1 = load volatile i32, i32* inttoptr (i64 1073782760 to i32*)
%2 = load volatile i32, i32* inttoptr (i64 1073782752 to i32*)
%3 = icmp eq i32 %2, 48
br i1 %3, label %4, label %11
4: ; preds = %0
%5 = and i32 %1, 15
%6 = load volatile i32, i32* inttoptr (i64 1073782756 to i32*)
%7 = icmp ne i32 %6, 184
%8 = icmp ne i32 %5, 11
%9 = select i1 %7, i1 true, i1 %8
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %4, %0
%12 = phi i32 [ 1, %0 ], [ %10, %4 ]
ret i32 %12
}
int test_imm_0Euint16_mem(unsigned short *val) {
  return ((*val) & (0x0E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Euint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xe,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Euint16_mem>:
testb  $0xe,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Euint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 14
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_0Euint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 14
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef scalar_t__ uint64_t;
struct timespec {
  int dummy;
};
typedef scalar_t__ int64_t;

/* Variables and functions */
scalar_t__ __pfcq_timespec_to_ns(struct timespec);
int64_t __pfcq_timespec_diff_ns(struct timespec _timestamp1,
                                struct timespec _timestamp2) {
  uint64_t ns1 = __pfcq_timespec_to_ns(_timestamp1);
  uint64_t ns2 = __pfcq_timespec_to_ns(_timestamp2);
  return ns2 - ns1;
}


x86 assembly (clang, -O0):
<__pfcq_timespec_diff_ns>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <__pfcq_timespec_to_ns@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%edi
call   1030 <__pfcq_timespec_to_ns@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
sub    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__pfcq_timespec_diff_ns>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
call   1030 <__pfcq_timespec_to_ns@plt>
mov    %rax,%rbx
mov    %ebp,%edi
call   1030 <__pfcq_timespec_to_ns@plt>
sub    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
define i64 @__pfcq_timespec_diff_ns(i32 %0, i32 %1) {
%3 = alloca %struct.timespec
%4 = alloca %struct.timespec
%5 = alloca i64
%6 = alloca i64
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
store i32 %0, i32* %7
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %4, i32 0, i32 0
store i32 %1, i32* %8
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
%10 = load i32, i32* %9
%11 = call i64 @__pfcq_timespec_to_ns(i32 %10)
store i64 %11, i64* %5
%12 = getelementptr inbounds %struct.timespec, %struct.timespec* %4, i32 0, i32 0
%13 = load i32, i32* %12
%14 = call i64 @__pfcq_timespec_to_ns(i32 %13)
store i64 %14, i64* %6
%15 = load i64, i64* %6
%16 = load i64, i64* %5
%17 = sub nsw i64 %15, %16
ret i64 %17
}

LLVM IR (-O2):
define i64 @__pfcq_timespec_diff_ns(i32 %0, i32 %1) {
%3 = tail call i64 @__pfcq_timespec_to_ns(i32 %0)
%4 = tail call i64 @__pfcq_timespec_to_ns(i32 %1)
%5 = sub nsw i64 %4, %3
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ evaluate_branch(int);
void opcode_piracy(void) {
  ;
  ;
  evaluate_branch(1);
}


x86 assembly (clang, -O0):
<opcode_piracy>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <evaluate_branch@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<opcode_piracy>:
mov    $0x1,%edi
jmp    1030 <evaluate_branch@plt>

LLVM IR (-O0):
define void @opcode_piracy() {
%1 = call i32 @evaluate_branch(i32 1)
ret void
}

LLVM IR (-O2):
define void @opcode_piracy() {
%1 = tail call i32 @evaluate_branch(i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ F_OK;
int /*<<< orphan*/ access(char *, int /*<<< orphan*/);
int unary_e(char *s) { return !access(s, F_OK); }


x86 assembly (clang, -O0):
<unary_e>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
call   1030 <access@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unary_e>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
call   1030 <access@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@F_OK = global i32 0
define i32 @unary_e(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @F_OK
%5 = call i32 @access(i8* %3, i32 %4)
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
@F_OK = global i32 0
define i32 @unary_e(i8* nocapture %0) {
%2 = load i32, i32* @F_OK
%3 = tail call i32 @access(i8* %0, i32 %2)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void c() { printf("lower c();\n"); }


x86 assembly (clang, -O0):
<c>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<c>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"lower c();\0A\00"
define void @c() {
%1 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [11 x i8] c"lower c();\00"
define void @c() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
long get_mempolicy(int *policy, unsigned long *nmask, unsigned long maxnode,
                   void *addr, int flags) {
  errno = ENOSYS;
  return 0;
}


x86 assembly (clang, -O0):
<get_mempolicy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    0x2ec9(%rip),%rax
mov    (%rax),%ecx
mov    0x2eb0(%rip),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_mempolicy>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i64 @get_mempolicy(i32* %0, i64* %1, i64 %2, i8* %3, i32 %4) {
%6 = alloca i32*
%7 = alloca i64*
%8 = alloca i64
%9 = alloca i8*
%10 = alloca i32
store i32* %0, i32** %6
store i64* %1, i64** %7
store i64 %2, i64* %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%11 = load i32, i32* @ENOSYS
store i32 %11, i32* @errno
ret i64 0
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i64 @get_mempolicy(i32* nocapture readnone %0, i64* nocapture readnone %1, i64 %2, i8* nocapture readnone %3, i32 %4) {
%6 = load i32, i32* @ENOSYS
store i32 %6, i32* @errno
ret i64 0
}
/* Variables and functions */
int /*<<< orphan*/ executeRawApplescriptAsync(char *);
int /*<<< orphan*/ sprintf(char *, char *, char const *, char const *);
void executeApplescriptAsync(const char *application, const char *command) {
  char toExec[1024];
  sprintf(toExec, "tell application \"%s\" to %s", application, command);
  executeRawApplescriptAsync(toExec);
}


x86 assembly (clang, -O0):
<executeApplescriptAsync>:
push   %rbp
mov    %rsp,%rbp
sub    $0x410,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x410(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xeb7(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x410(%rbp),%rdi
call   1030 <executeRawApplescriptAsync@plt>
add    $0x410,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<executeApplescriptAsync>:
push   %rbx
sub    $0x400,%rsp
mov    %rsi,%rcx
mov    %rdi,%rdx
lea    0xecb(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <executeRawApplescriptAsync@plt>
add    $0x400,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"tell application \22%s\22 to %s\00"
define void @executeApplescriptAsync(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca [1024 x i8]
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = getelementptr inbounds [1024 x i8], [1024 x i8]* %5, i64 0, i64 0
%7 = load i8*, i8** %3
%8 = load i8*, i8** %4
%9 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %7, i8* %8)
%10 = getelementptr inbounds [1024 x i8], [1024 x i8]* %5, i64 0, i64 0
%11 = call i32 @executeRawApplescriptAsync(i8* %10)
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c"tell application \22%s\22 to %s\00"
define void @executeApplescriptAsync(i8* %0, i8* %1) {
%3 = alloca [1024 x i8]
%4 = getelementptr inbounds [1024 x i8], [1024 x i8]* %3, i64 0, i64 0
%5 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%6 = call i32 @executeRawApplescriptAsync(i8* %4)
ret void
}
extern __attribute__((__gnu___)) long double __attribute__((__const__))
cimagl(long double _Complex _Z) {
  return __imag__ _Z;
}


x86 assembly (clang, -O0):
<cimagl>:
push   %rbp
mov    %rsp,%rbp
lea    0x10(%rbp),%rax
fldt   0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cimagl>:
fldt   0x18(%rsp)
ret

LLVM IR (-O0):
define x86_fp80 @cimagl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16 %0) {
%2 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i32 0, i32 1
%3 = load x86_fp80, x86_fp80* %2
ret x86_fp80 %3
}

LLVM IR (-O2):
define x86_fp80 @cimagl({ x86_fp80, x86_fp80 }* nocapture byval({ x86_fp80, x86_fp80 }) align 16 %0) {
%2 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i64 0, i32 1
%3 = load x86_fp80, x86_fp80* %2
ret x86_fp80 %3
}
void swap_ints(int *i1, int *i2) {
  int tmp = *i1;
  *i1 = *i2;
  *i2 = tmp;
}


x86 assembly (clang, -O0):
<swap_ints>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_ints>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @swap_ints(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @swap_ints(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int in;
  while (1) {
    scanf("%d\n", &in);
    if (in == 42) {
      break;
    } else {
      printf("%d\n", in);
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
cmpl   $0x2a,-0x8(%rbp)
jne    114e <main+0x2e>
jmp    1162 <main+0x42>
mov    -0x8(%rbp),%esi
lea    0xea8(%rip),%rdi
call   1030 <printf@plt>
jmp    112f <main+0xf>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0xed5(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%esi
cmp    $0x2a,%esi
je     116c <main+0x4c>
lea    0xebb(%rip),%rbx
lea    0x4(%rsp),%r14
nopw   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%esi
cmp    $0x2a,%esi
jne    1150 <main+0x30>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %0, %11
%4 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = icmp eq i32 %5, 42
br i1 %6, label %7, label %8
7: ; preds = %3
br label %12
8: ; preds = %3
%9 = load i32, i32* %2
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
br label %11
11: ; preds = %8
br label %3
12: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = icmp eq i32 %4, 42
br i1 %5, label %12, label %6
6: ; preds = %0, %6
%7 = phi i32 [ %10, %6 ], [ %4, %0 ]
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32* %1)
%10 = load i32, i32* %1
%11 = icmp eq i32 %10, 42
br i1 %11, label %12, label %6
12: ; preds = %6, %0
ret i32 0
}
/* Variables and functions */
void *malloc(long);
void *_jx_core_malloc(long in_size, int in_zone) { return malloc(in_size); }


x86 assembly (clang, -O0):
<_jx_core_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_jx_core_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @_jx_core_malloc(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i64, i64* %3
%6 = call i8* @malloc(i64 %5)
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @_jx_core_malloc(i64 %0, i32 %1) {
%3 = tail call i8* @malloc(i64 %0)
ret i8* %3
}
void foo482(int p) {}


x86 assembly (clang, -O0):
<foo482>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo482>:
ret

LLVM IR (-O0):
define void @foo482(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo482(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int /*<<< orphan*/ fproduct(int /*<<< orphan*/ *, int /*<<< orphan*/ const *,
                            int /*<<< orphan*/ const *);
int /*<<< orphan*/ freduce_coefficients(int /*<<< orphan*/ *);
int /*<<< orphan*/ freduce_degree(int /*<<< orphan*/ *);
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ *, int);
void fmul(int64_t *output, const int64_t *in, const int64_t *in2) {
  int64_t t[19];
  fproduct(t, in, in2);
  freduce_degree(t);
  freduce_coefficients(t);
  memcpy(output, t, sizeof(int64_t) * 10);
}


x86 assembly (clang, -O0):
<fmul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    -0x70(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <fproduct@plt>
lea    -0x70(%rbp),%rdi
call   1060 <freduce_degree@plt>
lea    -0x70(%rbp),%rdi
call   1040 <freduce_coefficients@plt>
mov    -0x8(%rbp),%rdi
lea    -0x70(%rbp),%rsi
mov    $0x28,%edx
call   1050 <memcpy@plt>
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmul>:
push   %r14
push   %rbx
sub    $0x58,%rsp
mov    %rdi,%r14
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1030 <fproduct@plt>
mov    %rbx,%rdi
call   1060 <freduce_degree@plt>
mov    %rbx,%rdi
call   1040 <freduce_coefficients@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    $0x28,%edx
call   1050 <memcpy@plt>
add    $0x58,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @fmul(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca [19 x i32]
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%8 = getelementptr inbounds [19 x i32], [19 x i32]* %7, i64 0, i64 0
%9 = load i32*, i32** %5
%10 = load i32*, i32** %6
%11 = call i32 @fproduct(i32* %8, i32* %9, i32* %10)
%12 = getelementptr inbounds [19 x i32], [19 x i32]* %7, i64 0, i64 0
%13 = call i32 @freduce_degree(i32* %12)
%14 = getelementptr inbounds [19 x i32], [19 x i32]* %7, i64 0, i64 0
%15 = call i32 @freduce_coefficients(i32* %14)
%16 = load i32*, i32** %4
%17 = getelementptr inbounds [19 x i32], [19 x i32]* %7, i64 0, i64 0
%18 = call i32 @memcpy(i32* %16, i32* %17, i32 40)
ret void
}

LLVM IR (-O2):
define void @fmul(i32* %0, i32* %1, i32* %2) {
%4 = alloca [19 x i32]
%5 = bitcast [19 x i32]* %4 to i8*
%6 = getelementptr inbounds [19 x i32], [19 x i32]* %4, i64 0, i64 0
%7 = call i32 @fproduct(i32* %6, i32* %1, i32* %2)
%8 = call i32 @freduce_degree(i32* %6)
%9 = call i32 @freduce_coefficients(i32* %6)
%10 = call i32 @memcpy(i32* %0, i32* %6, i32 40)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delay_ms(int);
void delay_s(unsigned char s) {
  for (unsigned char i = 0; i < s; i++) {
    delay_ms(250);
    delay_ms(250);
    delay_ms(250);
    delay_ms(250);
  }
}


x86 assembly (clang, -O0):
<delay_s>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movb   $0x0,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
movzbl -0x1(%rbp),%ecx
cmp    %ecx,%eax
jge    1167 <delay_s+0x57>
mov    $0xfa,%edi
call   1030 <delay_ms@plt>
mov    $0xfa,%edi
call   1030 <delay_ms@plt>
mov    $0xfa,%edi
call   1030 <delay_ms@plt>
mov    $0xfa,%edi
call   1030 <delay_ms@plt>
mov    -0x2(%rbp),%al
add    $0x1,%al
mov    %al,-0x2(%rbp)
jmp    1122 <delay_s+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay_s>:
push   %rbx
test   %edi,%edi
je     114d <delay_s+0x3d>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0xfa,%edi
call   1030 <delay_ms@plt>
mov    $0xfa,%edi
call   1030 <delay_ms@plt>
mov    $0xfa,%edi
call   1030 <delay_ms@plt>
mov    $0xfa,%edi
call   1030 <delay_ms@plt>
add    $0xff,%bl
jne    1120 <delay_s+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @delay_s(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %2
store i8 0, i8* %3
br label %4
4: ; preds = %15, %1
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i8, i8* %2
%8 = zext i8 %7 to i32
%9 = icmp slt i32 %6, %8
br i1 %9, label %10, label %18
10: ; preds = %4
%11 = call i32 @delay_ms(i32 250)
%12 = call i32 @delay_ms(i32 250)
%13 = call i32 @delay_ms(i32 250)
%14 = call i32 @delay_ms(i32 250)
br label %15
15: ; preds = %10
%16 = load i8, i8* %3
%17 = add i8 %16, 1
store i8 %17, i8* %3
br label %4
18: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @delay_s(i8 zeroext %0) {
%2 = icmp eq i8 %0, 0
br i1 %2, label %3, label %4
3: ; preds = %4, %1
ret void
4: ; preds = %1, %4
%5 = phi i8 [ %10, %4 ], [ 0, %1 ]
%6 = tail call i32 @delay_ms(i32 250)
%7 = tail call i32 @delay_ms(i32 250)
%8 = tail call i32 @delay_ms(i32 250)
%9 = tail call i32 @delay_ms(i32 250)
%10 = add nuw i8 %5, 1
%11 = icmp eq i8 %10, %0
br i1 %11, label %3, label %4
}
unsigned average(unsigned a, unsigned b) {
  unsigned sum = a + b;
  unsigned result = sum / 2;
  return result;
}


x86 assembly (clang, -O0):
<average>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<average>:
lea    (%rdi,%rsi,1),%eax
shr    %eax
ret

LLVM IR (-O0):
define i32 @average(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = add i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = udiv i32 %10, 2
store i32 %11, i32* %6
%12 = load i32, i32* %6
ret i32 %12
}

LLVM IR (-O2):
define i32 @average(i32 %0, i32 %1) {
%3 = add i32 %1, %0
%4 = lshr i32 %3, 1
ret i32 %4
}
unsigned long umin(unsigned long a, unsigned long b) { return (a < b) ? a : b; }


x86 assembly (clang, -O0):
<umin>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1127 <umin+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <umin+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<umin>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovb  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @umin(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp ult i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @umin(i64 %0, i64 %1) {
%3 = icmp ult i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void *printThreadCount(void *arg) {
  printf("%d\n", *(int *)arg);
  return arg;
}


x86 assembly (clang, -O0):
<printThreadCount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printThreadCount>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%esi
lea    0xee3(%rip),%rdi
call   1030 <printf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i8* @printThreadCount(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i8*, i8** %2
ret i8* %7
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i8* @printThreadCount(i8* returned %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i8* %0
}
XSetWindowBorder() {}


x86 assembly (clang, -O0):
<XSetWindowBorder>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XSetWindowBorder>:
ret

LLVM IR (-O0):
define i32 @XSetWindowBorder() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @XSetWindowBorder() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
int /*<<< orphan*/ reader(int);
int /*<<< orphan*/ writer(int);
void *start_thread(void *arg) {
  int u = 0;
  if (NULL != arg) {
    u = *(int *)arg;
    free(arg);
  }
  if (0 == u) {
    writer(u);
  } else {
    reader(u);
  }
  return NULL;
}


x86 assembly (clang, -O0):
<start_thread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
xor    %eax,%eax
cmp    -0x8(%rbp),%rax
je     1161 <start_thread+0x31>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
cmp    -0xc(%rbp),%eax
jne    1179 <start_thread+0x49>
mov    -0xc(%rbp),%edi
call   1050 <writer@plt>
jmp    1181 <start_thread+0x51>
mov    -0xc(%rbp),%edi
call   1040 <reader@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<start_thread>:
push   %rbx
test   %rdi,%rdi
je     114a <start_thread+0x1a>
mov    (%rdi),%ebx
call   1030 <free@plt>
test   %ebx,%ebx
je     114a <start_thread+0x1a>
mov    %ebx,%edi
call   1040 <reader@plt>
jmp    1151 <start_thread+0x21>
xor    %edi,%edi
call   1050 <writer@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @start_thread(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%4 = load i8*, i8** %2
%5 = icmp ne i8* null, %4
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = bitcast i8* %7 to i32*
%9 = load i32, i32* %8
store i32 %9, i32* %3
%10 = load i8*, i8** %2
%11 = call i32 @free(i8* %10)
br label %12
12: ; preds = %6, %1
%13 = load i32, i32* %3
%14 = icmp eq i32 0, %13
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i32, i32* %3
%17 = call i32 @writer(i32 %16)
br label %21
18: ; preds = %12
%19 = load i32, i32* %3
%20 = call i32 @reader(i32 %19)
br label %21
21: ; preds = %18, %15
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @start_thread(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = bitcast i8* %0 to i32*
%5 = load i32, i32* %4
%6 = tail call i32 @free(i8* %0)
%7 = icmp eq i32 %5, 0
br i1 %7, label %8, label %10
8: ; preds = %1, %3
%9 = tail call i32 @writer(i32 0)
br label %12
10: ; preds = %3
%11 = tail call i32 @reader(i32 %5)
br label %12
12: ; preds = %10, %8
ret i8* null
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_VALUE;
typedef int /*<<< orphan*/ ACCESS_DESCRIPTION;

/* Variables and functions */
int /*<<< orphan*/ ACCESS_DESCRIPTION_it;
int ASN1_item_i2d(int /*<<< orphan*/ *, unsigned char **, int /*<<< orphan*/ *);
int i2d_ACCESS_DESCRIPTION(ACCESS_DESCRIPTION *a, unsigned char **out) {
  return ASN1_item_i2d((ASN1_VALUE *)a, out, &ACCESS_DESCRIPTION_it);
}


x86 assembly (clang, -O0):
<i2d_ACCESS_DESCRIPTION>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2eb1(%rip),%rdx
call   1030 <ASN1_item_i2d@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_ACCESS_DESCRIPTION>:
mov    0x2ec9(%rip),%rdx
jmp    1030 <ASN1_item_i2d@plt>

LLVM IR (-O0):
@ACCESS_DESCRIPTION_it = global i32 0
define i32 @i2d_ACCESS_DESCRIPTION(i32* %0, i8** %1) {
%3 = alloca i32*
%4 = alloca i8**
store i32* %0, i32** %3
store i8** %1, i8*** %4
%5 = load i32*, i32** %3
%6 = load i8**, i8*** %4
%7 = call i32 @ASN1_item_i2d(i32* %5, i8** %6, i32* @ACCESS_DESCRIPTION_it)
ret i32 %7
}

LLVM IR (-O2):
@ACCESS_DESCRIPTION_it = global i32 0
define i32 @i2d_ACCESS_DESCRIPTION(i32* %0, i8** %1) {
%3 = tail call i32 @ASN1_item_i2d(i32* %0, i8** %1, i32* @ACCESS_DESCRIPTION_it)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
extern void shmem_long_or_to_all(long *target, long *source, int nreduce,
                                 int PE_start, int logPE_stride, int PE_size,
                                 long *pWrk, long *pSync) {
  printf("\nOpenSHMEM Analyzer\n");
}


x86 assembly (clang, -O0):
<shmem_long_or_to_all>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9d,-0x20(%rbp)
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmem_long_or_to_all>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"\0AOpenSHMEM Analyzer\0A\00"
define void @shmem_long_or_to_all(i64* %0, i64* %1, i32 %2, i32 %3, i32 %4, i32 %5, i64* %6, i64* %7) {
%9 = alloca i64*
%10 = alloca i64*
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i64*
%16 = alloca i64*
store i64* %0, i64** %9
store i64* %1, i64** %10
store i32 %2, i32* %11
store i32 %3, i32* %12
store i32 %4, i32* %13
store i32 %5, i32* %14
store i64* %6, i64** %15
store i64* %7, i64** %16
%17 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [20 x i8] c"\0AOpenSHMEM Analyzer\00"
define void @shmem_long_or_to_all(i64* nocapture readnone %0, i64* nocapture readnone %1, i32 %2, i32 %3, i32 %4, i32 %5, i64* nocapture readnone %6, i64* nocapture readnone %7) {
%9 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret void
}
float opt_barrier_float(float x) {
  volatile float y = x;
  return y;
}


x86 assembly (clang, -O0):
<opt_barrier_float>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<opt_barrier_float>:
movss  %xmm0,-0x4(%rsp)
movss  -0x4(%rsp),%xmm0
ret

LLVM IR (-O0):
define float @opt_barrier_float(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
store volatile float %4, float* %3
%5 = load volatile float, float* %3
ret float %5
}

LLVM IR (-O2):
define float @opt_barrier_float(float %0) {
%2 = alloca float
%3 = bitcast float* %2 to i8*
store volatile float %0, float* %2
%4 = load volatile float, float* %2
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ bar();
void func3() {
  bar();
  bar();
}


x86 assembly (clang, -O0):
<func3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <bar@plt>
mov    $0x0,%al
call   1030 <bar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<func3>:
push   %rax
xor    %eax,%eax
call   1030 <bar@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <bar@plt>

LLVM IR (-O0):
define void @func3() {
%1 = call i32 (...) @bar()
%2 = call i32 (...) @bar()
ret void
}

LLVM IR (-O2):
define void @func3() {
%1 = tail call i32 (...) @bar()
%2 = tail call i32 (...) @bar()
ret void
}
void nsvg__content(void *ud, const char *s) {
  do {
    (void)(1 ? (void)0 : ((void)(ud)));
  } while (0);
  do {
    (void)(1 ? (void)0 : ((void)(s)));
  } while (0);
}


x86 assembly (clang, -O0):
<nsvg__content>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
jmp    1111 <nsvg__content+0x11>
jmp    1116 <nsvg__content+0x16>
jmp    111b <nsvg__content+0x1b>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nsvg__content>:
ret

LLVM IR (-O0):
define void @nsvg__content(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %2
br label %6
6: ; preds = %5
br label %7
7: ; preds = %6
br label %8
8: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @nsvg__content(i8* nocapture %0, i8* nocapture %1) {
ret void
}
void RTDbgAsFirstAddr(void) {}


x86 assembly (clang, -O0):
<RTDbgAsFirstAddr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTDbgAsFirstAddr>:
ret

LLVM IR (-O0):
define void @RTDbgAsFirstAddr() {
ret void
}

LLVM IR (-O2):
define void @RTDbgAsFirstAddr() {
ret void
}