xunge/DecIR huggingface dataset:
/* Variables and functions */
char *strstr(char const *, char *);
const char *check_funcptr(const char *type) {
  const char *str = strstr(type, "(*)");
  if (str) {
    return str + 2;
  }
  return NULL;
}


x86 assembly (clang, -O0):
<check_funcptr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strstr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     114c <check_funcptr+0x3c>
mov    -0x18(%rbp),%rax
add    $0x2,%rax
mov    %rax,-0x8(%rbp)
jmp    1154 <check_funcptr+0x44>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_funcptr>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <strstr@plt>
lea    0x2(%rax),%rcx
test   %rax,%rax
cmovne %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"(*)\00"
define i8* @check_funcptr(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i8* @strstr(i8* %5, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i64 2
store i8* %11, i8** %2
br label %13
12: ; preds = %1
store i8* null, i8** %2
br label %13
13: ; preds = %12, %9
%14 = load i8*, i8** %2
ret i8* %14
}

LLVM IR (-O2):
@.str = [4 x i8] c"(*)\00"
define i8* @check_funcptr(i8* %0) {
%2 = tail call i8* @strstr(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i8* %2, null
%4 = getelementptr inbounds i8, i8* %2, i64 2
%5 = select i1 %3, i8* null, i8* %4
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void create_booking() { printf("Dodawanie rezerwacji\n"); }


x86 assembly (clang, -O0):
<create_booking>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_booking>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"Dodawanie rezerwacji\0A\00"
define void @create_booking() {
%1 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [21 x i8] c"Dodawanie rezerwacji\00"
define void @create_booking() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ die(char *);
void *malloc(size_t);
void *nmalloc(size_t howmuch) {
  void *r = malloc(howmuch);
  if (howmuch == 0)
    die("Allocating zero bytes.  Please report a bug.\n");
  if (r == NULL)
    die(("Nano is out of memory!\n"));
  return r;
}


x86 assembly (clang, -O0):
<nmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1150 <nmalloc+0x30>
lea    0xeb5(%rip),%rdi
call   1040 <die@plt>
cmpq   $0x0,-0x10(%rbp)
jne    1167 <nmalloc+0x47>
lea    0xecc(%rip),%rdi
call   1040 <die@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nmalloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <malloc@plt>
mov    %rax,%r14
test   %rbx,%rbx
je     1144 <nmalloc+0x24>
test   %r14,%r14
je     1155 <nmalloc+0x35>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
lea    0xeb5(%rip),%rdi
call   1040 <die@plt>
test   %r14,%r14
jne    1139 <nmalloc+0x19>
lea    0xed2(%rip),%rdi
call   1040 <die@plt>
jmp    1139 <nmalloc+0x19>

LLVM IR (-O0):
@.str = [46 x i8] c"Allocating zero bytes. Please report a bug.\0A\00"
@.str.1 = [24 x i8] c"Nano is out of memory!\0A\00"
define i8* @nmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i64, i64* %2
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @die(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
%12 = icmp eq i8* %11, null
br i1 %12, label %13, label %15
13: ; preds = %10
%14 = call i32 @die(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0))
br label %15
15: ; preds = %13, %10
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
@.str = [46 x i8] c"Allocating zero bytes. Please report a bug.\0A\00"
@.str.1 = [24 x i8] c"Nano is out of memory!\0A\00"
define noalias i8* @nmalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i64 %0, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @die(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
%7 = icmp eq i8* %2, null
br i1 %7, label %8, label %10
8: ; preds = %6
%9 = tail call i32 @die(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %8, %6
ret i8* %2
}
int do_redraw(cnt)
long cnt;
{ redraw(1); }


x86 assembly (clang, -O0):
<do_redraw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x1,%edi
mov    $0x0,%al
call   1030 <redraw@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_redraw>:
mov    $0x1,%edi
xor    %eax,%eax
jmp    1030 <redraw@plt>

LLVM IR (-O0):
define i32 @do_redraw(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = call i32 (i32, ...) bitcast (i32 (...)* @redraw to i32 (i32, ...)*)(i32 1)
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
define i32 @do_redraw(i64 %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @redraw to i32 (i32, ...)*)(i32 1)
ret i32 undef
}
/* Variables and functions */
int dcc_x_token_int(int, char *, unsigned int);
int dcc_x_cc_status(int ofd, int status) {
  return dcc_x_token_int(ofd, "STAT", (unsigned)status);
}


x86 assembly (clang, -O0):
<dcc_x_cc_status>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
lea    0xed5(%rip),%rsi
call   1030 <dcc_x_token_int@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dcc_x_cc_status>:
mov    %esi,%edx
lea    0xee7(%rip),%rsi
jmp    1030 <dcc_x_token_int@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"STAT\00"
define i32 @dcc_x_cc_status(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @dcc_x_token_int(i32 %5, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 %7
}

LLVM IR (-O2):
@.str = [5 x i8] c"STAT\00"
define i32 @dcc_x_cc_status(i32 %0, i32 %1) {
%3 = tail call i32 @dcc_x_token_int(i32 %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
void SysTickPeriodSet(unsigned long ulPeriod) {
  DEBUG_ASSERT((ulPeriod > 0) && (ulPeriod <= 16777216));
  (*((volatile unsigned long *)(0xE000E014))) = ulPeriod - 1;
}


x86 assembly (clang, -O0):
<SysTickPeriodSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x9(%rbp)
jbe    113a <SysTickPeriodSet+0x2a>
cmpq   $0x1000000,-0x8(%rbp)
01
setbe  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rcx
sub    $0x1,%rcx
mov    $0xe000e014,%eax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysTickPeriodSet>:
push   %rbx
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rbx
xor    %edi,%edi
cmp    $0x1000000,%rbx
setb   %dil
call   1030 <DEBUG_ASSERT@plt>
mov    $0xe000e014,%eax
mov    %rbx,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @SysTickPeriodSet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp ugt i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i64, i64* %2
%7 = icmp ule i64 %6, 16777216
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = call i32 @DEBUG_ASSERT(i32 %10)
%12 = load i64, i64* %2
%13 = sub i64 %12, 1
store volatile i64 %13, i64* inttoptr (i64 3758153748 to i64*)
ret void
}

LLVM IR (-O2):
define void @SysTickPeriodSet(i64 %0) {
%2 = add i64 %0, -1
%3 = icmp ult i64 %2, 16777216
%4 = zext i1 %3 to i32
%5 = tail call i32 @DEBUG_ASSERT(i32 %4)
store volatile i64 %2, i64* inttoptr (i64 3758153748 to i64*)
ret void
}
void foo185(int p) {}


x86 assembly (clang, -O0):
<foo185>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo185>:
ret

LLVM IR (-O0):
define void @foo185(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo185(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isgraph(int);
void t_isgraph_0x94() {
  Assert_real((isgraph(148) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              745, ("isgraph should be 0 for 0x94"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x94>:
push   %rbp
mov    %rsp,%rbp
mov    $0x94,%edi
call   1040 <isgraph@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2e9,%edx
lea    0xf5b(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x94>:
push   %rax
mov    $0x94,%edi
call   1040 <isgraph@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2e9,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0x94\00"
define void @t_isgraph_0x94() {
%1 = call i64 @isgraph(i32 148)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 745, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0x94\00"
define void @t_isgraph_0x94() {
%1 = tail call i64 @isgraph(i32 148)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 745, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int MUSIC_FadeVolume(int tovolume, int milliseconds) { return 0; }


x86 assembly (clang, -O0):
<MUSIC_FadeVolume>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<MUSIC_FadeVolume>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @MUSIC_FadeVolume(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @MUSIC_FadeVolume(i32 %0, i32 %1) {
ret i32 0
}
int __svgalib_rendition_inatt(int index) { return 0; }


x86 assembly (clang, -O0):
<__svgalib_rendition_inatt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__svgalib_rendition_inatt>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__svgalib_rendition_inatt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @__svgalib_rendition_inatt(i32 %0) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
void noop_callback(uint16_t **eip) {
  (void)eip;
  ((void)0);
  return;
}


x86 assembly (clang, -O0):
<noop_callback>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<noop_callback>:
ret

LLVM IR (-O0):
define void @noop_callback(i32** %0) {
%2 = alloca i32**
store i32** %0, i32*** %2
%3 = load i32**, i32*** %2
ret void
}

LLVM IR (-O2):
define void @noop_callback(i32** nocapture %0) {
ret void
}
int addUser(const char *username) { return 0; }


x86 assembly (clang, -O0):
<addUser>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<addUser>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @addUser(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @addUser(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int is_prime(int);
int next_prime(int x) {
  while (is_prime(x) != 1) {
    x++;
  }
  return x;
}


x86 assembly (clang, -O0):
<next_prime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <is_prime@plt>
cmp    $0x1,%eax
je     113a <next_prime+0x2a>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111b <next_prime+0xb>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_prime>:
push   %rbx
mov    %edi,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %ebx,%edi
call   1030 <is_prime@plt>
add    $0x1,%ebx
cmp    $0x1,%eax
jne    1120 <next_prime+0x10>
add    $0xffffffff,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @next_prime(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load i32, i32* %2
%5 = call i32 @is_prime(i32 %4)
%6 = icmp ne i32 %5, 1
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
store i32 %9, i32* %2
br label %3
10: ; preds = %3
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @next_prime(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ %0, %1 ], [ %6, %2 ]
%4 = tail call i32 @is_prime(i32 %3)
%5 = icmp eq i32 %4, 1
%6 = add nsw i32 %3, 1
br i1 %5, label %7, label %2
7: ; preds = %2
ret i32 %3
}
void nseel_asm_below_end(void) {}


x86 assembly (clang, -O0):
<nseel_asm_below_end>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nseel_asm_below_end>:
ret

LLVM IR (-O0):
define void @nseel_asm_below_end() {
ret void
}

LLVM IR (-O2):
define void @nseel_asm_below_end() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ pthread_exit(int /*<<< orphan*/);
void *a_thread_func(void *num) {
  intptr_t i = (intptr_t)num;
  printf("Passed argument for thread: %d\n", (int)i);
  pthread_exit(0);
  return NULL;
}


x86 assembly (clang, -O0):
<a_thread_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,%esi
lea    0xebf(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <pthread_exit@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_thread_func>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <pthread_exit@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [32 x i8] c"Passed argument for thread: %d\0A\00"
define i8* @a_thread_func(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = ptrtoint i8* %4 to i64
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = trunc i64 %6 to i32
%8 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = call i32 @pthread_exit(i32 0)
ret i8* null
}

LLVM IR (-O2):
@.str = [32 x i8] c"Passed argument for thread: %d\0A\00"
define noalias i8* @a_thread_func(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i32
%4 = tail call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = tail call i32 @pthread_exit(i32 0)
ret i8* null
}
void rational_div_n(int n, long double *x) { (*x) /= n; }


x86 assembly (clang, -O0):
<rational_div_n>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
fildl  -0x14(%rbp)
mov    -0x10(%rbp),%rax
fldt   (%rax)
fdivp  %st,%st(1)
fstpt  (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rational_div_n>:
mov    %edi,-0x4(%rsp)
fldt   (%rsi)
fidivl -0x4(%rsp)
fstpt  (%rsi)
ret

LLVM IR (-O0):
define void @rational_div_n(i32 %0, x86_fp80* %1) {
%3 = alloca i32
%4 = alloca x86_fp80*
store i32 %0, i32* %3
store x86_fp80* %1, x86_fp80** %4
%5 = load i32, i32* %3
%6 = sitofp i32 %5 to x86_fp80
%7 = load x86_fp80*, x86_fp80** %4
%8 = load x86_fp80, x86_fp80* %7
%9 = fdiv x86_fp80 %8, %6
store x86_fp80 %9, x86_fp80* %7
ret void
}

LLVM IR (-O2):
define void @rational_div_n(i32 %0, x86_fp80* nocapture %1) {
%3 = sitofp i32 %0 to x86_fp80
%4 = load x86_fp80, x86_fp80* %1
%5 = fdiv x86_fp80 %4, %3
store x86_fp80 %5, x86_fp80* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_seg_desc(int, int /*<<< orphan*/, int, int, int,
                                int /*<<< orphan*/, int);
void init_gdt(void) {
  unsigned long i;
  char *potr = (char)0;
  for (i = 0; i < 0x800; i++) {
    *(potr + i) = 0;
  }
  set_seg_desc(1, 0, 0xFFFFF, 1, 1, 0, 0xA);
  set_seg_desc(2, 0, 0xFFFFF, 1, 1, 0, 0x2);
  return;
}


x86 assembly (clang, -O0):
<init_gdt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movq   $0x0,-0x10(%rbp)
movq   $0x0,-0x8(%rbp)
cmpq   $0x800,-0x8(%rbp)
jae    1153 <init_gdt+0x43>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1128 <init_gdt+0x18>
mov    $0x1,%r8d
xor    %r9d,%r9d
mov    $0xfffff,%edx
mov    %r8d,%edi
mov    %r9d,%esi
mov    %r8d,%ecx
movl   $0xa,(%rsp)
call   1030 <set_seg_desc@plt>
mov    $0x2,%edi
xor    %r9d,%r9d
mov    $0xfffff,%edx
mov    $0x1,%r8d
mov    %r9d,%esi
mov    %r8d,%ecx
movl   $0x2,(%rsp)
call   1030 <set_seg_desc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_gdt>:
push   %rax
movl   $0xa,(%rsp)
mov    $0x1,%edi
xor    %esi,%esi
mov    $0xfffff,%edx
mov    $0x1,%ecx
mov    $0x1,%r8d
xor    %r9d,%r9d
call   1030 <set_seg_desc@plt>
movl   $0x2,(%rsp)
mov    $0x2,%edi
xor    %esi,%esi
mov    $0xfffff,%edx
mov    $0x1,%ecx
mov    $0x1,%r8d
xor    %r9d,%r9d
call   1030 <set_seg_desc@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @init_gdt() {
%1 = alloca i64
%2 = alloca i8*
store i8* null, i8** %2
store i64 0, i64* %1
br label %3
3: ; preds = %10, %0
%4 = load i64, i64* %1
%5 = icmp ult i64 %4, 2048
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = load i8*, i8** %2
%8 = load i64, i64* %1
%9 = getelementptr inbounds i8, i8* %7, i64 %8
store i8 0, i8* %9
br label %10
10: ; preds = %6
%11 = load i64, i64* %1
%12 = add i64 %11, 1
store i64 %12, i64* %1
br label %3
13: ; preds = %3
%14 = call i32 @set_seg_desc(i32 1, i32 0, i32 1048575, i32 1, i32 1, i32 0, i32 10)
%15 = call i32 @set_seg_desc(i32 2, i32 0, i32 1048575, i32 1, i32 1, i32 0, i32 2)
ret void
}

LLVM IR (-O2):
define void @init_gdt() {
%1 = tail call i32 @set_seg_desc(i32 1, i32 0, i32 1048575, i32 1, i32 1, i32 0, i32 10)
%2 = tail call i32 @set_seg_desc(i32 2, i32 0, i32 1048575, i32 1, i32 1, i32 0, i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bcopy(void const *, void *, size_t);
void *memmove(void *p1, const void *p2, size_t n) {
  bcopy(p2, p1, n);
  return p1;
}


x86 assembly (clang, -O0):
<memmove>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <bcopy@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memmove>:
jmp    1030 <memmove@plt>

LLVM IR (-O0):
define i8* @memmove(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i8*, i8** %4
%9 = load i64, i64* %6
%10 = call i32 @bcopy(i8* %7, i8* %8, i64 %9)
%11 = load i8*, i8** %4
ret i8* %11
}

LLVM IR (-O2):
define i8* @memmove(i8* returned writeonly %0, i8* nocapture %1, i64 %2) {
tail call void @llvm.memmove.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 %2, i1 false)
ret i8* %0
}
int test_imm_53int64_highword_mem(long long *val) {
  return ((*val >> 32) & (0x53 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_53int64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x20,%rdx
and    $0x53,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_53int64_highword_mem>:
testb  $0x53,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_53int64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 32
%6 = and i64 %5, 83
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_53int64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 356482285568
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int checkValidBuf(char *buf, int size) {
  int i;
  for (i = 0; i < size; i++) {
    if (buf[i] == 3) {
      buf[i] = 0;
      return 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<checkValidBuf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    115e <checkValidBuf+0x5e>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x3,%eax
jne    114b <checkValidBuf+0x4b>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
movl   $0x1,-0x4(%rbp)
jmp    1165 <checkValidBuf+0x65>
jmp    1150 <checkValidBuf+0x50>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1112 <checkValidBuf+0x12>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkValidBuf>:
test   %esi,%esi
jle    111f <checkValidBuf+0x1f>
mov    %esi,%eax
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
cmpb   $0x3,(%rdi,%rcx,1)
je     1122 <checkValidBuf+0x22>
add    $0x1,%rcx
cmp    %rcx,%rax
jne    1110 <checkValidBuf+0x10>
xor    %eax,%eax
ret
movb   $0x0,(%rdi,%rcx,1)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @checkValidBuf(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %25, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %28
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 3
br i1 %18, label %19, label %24
19: ; preds = %11
%20 = load i8*, i8** %4
%21 = load i32, i32* %6
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %20, i64 %22
store i8 0, i8* %23
store i32 1, i32* %3
br label %29
24: ; preds = %11
br label %25
25: ; preds = %24
%26 = load i32, i32* %6
%27 = add nsw i32 %26, 1
store i32 %27, i32* %6
br label %7
28: ; preds = %7
store i32 0, i32* %3
br label %29
29: ; preds = %28, %19
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @checkValidBuf(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %17
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %14
%7 = phi i64 [ 0, %4 ], [ %15, %14 ]
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 3
br i1 %10, label %11, label %14
11: ; preds = %6
%12 = and i64 %7, 4294967295
%13 = getelementptr inbounds i8, i8* %0, i64 %12
store i8 0, i8* %13
br label %17
14: ; preds = %6
%15 = add nuw nsw i64 %7, 1
%16 = icmp eq i64 %15, %5
br i1 %16, label %17, label %6
17: ; preds = %14, %2, %11
%18 = phi i32 [ 1, %11 ], [ 0, %2 ], [ 0, %14 ]
ret i32 %18
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t u32_from_le(const unsigned char *x) {
  return (uint32_t)(x[0]) | (((uint32_t)(x[1])) << 8) |
         (((uint32_t)(x[2])) << 16) | (((uint32_t)(x[3])) << 24);
}


x86 assembly (clang, -O0):
<u32_from_le>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%ecx
shl    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<u32_from_le>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @u32_from_le(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = or i32 %6, %11
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i64 2
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 16
%18 = or i32 %12, %17
%19 = load i8*, i8** %2
%20 = getelementptr inbounds i8, i8* %19, i64 3
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = shl i32 %22, 24
%24 = or i32 %18, %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @u32_from_le(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = or i32 %7, %3
%9 = getelementptr inbounds i8, i8* %0, i64 2
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = shl nuw nsw i32 %11, 16
%13 = or i32 %8, %12
%14 = getelementptr inbounds i8, i8* %0, i64 3
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = shl nuw i32 %16, 24
%18 = or i32 %13, %17
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ dscross(double *, double *, double *);
double dsdot(double *, double *);
double dstrip(double a[3], double b[3], double c[3]) {
  double t;
  double ab[3];
  dscross(a, b, ab);
  t = dsdot(ab, c);
  return (t);
}


x86 assembly (clang, -O0):
<dstrip>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x40(%rbp),%rdx
call   1030 <dscross@plt>
lea    -0x40(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <dsdot@plt>
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dstrip>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %rdx,%rbx
mov    %rsp,%r14
mov    %r14,%rdx
call   1030 <dscross@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <dsdot@plt>
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define double @dstrip(double* %0, double* %1, double* %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca double*
%7 = alloca double
%8 = alloca [3 x double]
store double* %0, double** %4
store double* %1, double** %5
store double* %2, double** %6
%9 = load double*, double** %4
%10 = load double*, double** %5
%11 = getelementptr inbounds [3 x double], [3 x double]* %8, i64 0, i64 0
%12 = call i32 @dscross(double* %9, double* %10, double* %11)
%13 = getelementptr inbounds [3 x double], [3 x double]* %8, i64 0, i64 0
%14 = load double*, double** %6
%15 = call double @dsdot(double* %13, double* %14)
store double %15, double* %7
%16 = load double, double* %7
ret double %16
}

LLVM IR (-O2):
define double @dstrip(double* %0, double* %1, double* %2) {
%4 = alloca [3 x double]
%5 = bitcast [3 x double]* %4 to i8*
%6 = getelementptr inbounds [3 x double], [3 x double]* %4, i64 0, i64 0
%7 = call i32 @dscross(double* %0, double* %1, double* %6)
%8 = call double @dsdot(double* %6, double* %2)
ret double %8
}
int even(int value) { return !(value & 1); }


x86 assembly (clang, -O0):
<even>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<even>:
mov    %edi,%eax
not    %eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @even(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 1
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @even(i32 %0) {
%2 = and i32 %0, 1
%3 = xor i32 %2, 1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void main() {
  printf("Hello, world\n");
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"Hello, world\0A\00"
define void @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [13 x i8] c"Hello, world\00"
define void @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 0)
unreachable
}
double py_zero(double x) {
  (void)x;
  return 0.0;
}


x86 assembly (clang, -O0):
<py_zero>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<py_zero>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @py_zero(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
ret double 0.000000e+00
}

LLVM IR (-O2):
define double @py_zero(double %0) {
ret double 0.000000e+00
}
void ct_free() {}


x86 assembly (clang, -O0):
<ct_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ct_free>:
ret

LLVM IR (-O0):
define void @ct_free() {
ret void
}

LLVM IR (-O2):
define void @ct_free() {
ret void
}
void av_probe_input_format2() {}


x86 assembly (clang, -O0):
<av_probe_input_format2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_probe_input_format2>:
ret

LLVM IR (-O0):
define void @av_probe_input_format2() {
ret void
}

LLVM IR (-O2):
define void @av_probe_input_format2() {
ret void
}
int test_imm_9Fuint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x9F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Fuint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x9f,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Fuint64_highword_mem>:
testb  $0x9f,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Fuint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 159
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_9Fuint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 682899800064
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage() {
  printf("ndsend sends an unsolicited Neighbor Advertisement ICMPv6 multicast "
         "packet\n"
         "announcing a given IPv6 address to all IPv6 nodes as per RFC4861.\n\n"
         "Usage: ndsend <address> <interface> (example: ndsend 2001:DB8::1 "
         "eth0)\n\n"
         "Note: ndsend is called by arpsend -U -i, see arpsend(8) man page.\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [281 x i8] c"ndsend sends an unsolicited Neighbor Advertisement ICMPv6 multicast packet\0Aannouncing a given IPv6 address to all IPv6 nodes as per RFC4861.\0A\0AUsage: ndsend <address> <interface> (example: ndsend 2001:DB8::1 eth0)\0A\0ANote: ndsend is called by arpsend -U -i, see arpsend(8) man page.\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([281 x i8], [281 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [280 x i8] c"ndsend sends an unsolicited Neighbor Advertisement ICMPv6 multicast packet\0Aannouncing a given IPv6 address to all IPv6 nodes as per RFC4861.\0A\0AUsage: ndsend <address> <interface> (example: ndsend 2001:DB8::1 eth0)\0A\0ANote: ndsend is called by arpsend -U -i, see arpsend(8) man page.\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([280 x i8], [280 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ srand(unsigned int);
scalar_t__ time(int /*<<< orphan*/ *);
void randomize(void) { srand((unsigned)time(NULL)); }


x86 assembly (clang, -O0):
<randomize>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<randomize>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @randomize() {
%1 = call i64 @time(i32* null)
%2 = trunc i64 %1 to i32
%3 = call i32 @srand(i32 %2)
ret void
}

LLVM IR (-O2):
define void @randomize() {
%1 = tail call i64 @time(i32* null)
%2 = trunc i64 %1 to i32
%3 = tail call i32 @srand(i32 %2)
ret void
}
/* Variables and functions */
char toupper(char);
void toupper_string(char **s) {
  for (char *p = *s; *p; p++)
    *p = toupper(*p);
}


x86 assembly (clang, -O0):
<toupper_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1159 <toupper_string+0x49>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <toupper@plt>
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1127 <toupper_string+0x17>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toupper_string>:
push   %rbx
mov    (%rdi),%rbx
mov    (%rbx),%al
test   %al,%al
je     1136 <toupper_string+0x26>
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <toupper@plt>
mov    %al,-0x1(%rbx)
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <toupper_string+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @toupper_string(i8** %0) {
%2 = alloca i8**
%3 = alloca i8*
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
store i8* %5, i8** %3
br label %6
6: ; preds = %15, %1
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = call signext i8 @toupper(i8 signext %12)
%14 = load i8*, i8** %3
store i8 %13, i8* %14
br label %15
15: ; preds = %10
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %3
br label %6
18: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @toupper_string(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = load i8, i8* %2
%4 = icmp eq i8 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %6, %1
ret void
6: ; preds = %1, %6
%7 = phi i8 [ %11, %6 ], [ %3, %1 ]
%8 = phi i8* [ %10, %6 ], [ %2, %1 ]
%9 = tail call signext i8 @toupper(i8 signext %7)
store i8 %9, i8* %8
%10 = getelementptr inbounds i8, i8* %8, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %5, label %6
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMR9A_get(void) { return U_WMRCORENONE_get("U_WMR9A"); }


x86 assembly (clang, -O0):
<U_WMR9A_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR9A_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR9A\00"
define i32 @U_WMR9A_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR9A\00"
define i32 @U_WMR9A_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
int fchdir(int des) {}


x86 assembly (clang, -O0):
<fchdir>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fchdir>:
ret

LLVM IR (-O0):
define i32 @fchdir(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @fchdir(i32 %0) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ islower(int);
void t_islower_0x76() {
  Assert_real((islower(118)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              595, ("islower should be 1 for v"));
}


x86 assembly (clang, -O0):
<t_islower_0x76>:
push   %rbp
mov    %rsp,%rbp
mov    $0x76,%edi
call   1030 <islower@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x253,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0x76>:
push   %rax
mov    $0x76,%edi
call   1030 <islower@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x253,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [26 x i8] c"islower should be 1 for v\00"
define void @t_islower_0x76() {
%1 = call i32 @islower(i32 118)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 595, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [26 x i8] c"islower should be 1 for v\00"
define void @t_islower_0x76() {
%1 = tail call i32 @islower(i32 118)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 595, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void icmpv6head(int osvers, int osrel, int ossub) {
  printf("intot/s outtot/s inerr/s innsol/s innadv/s "
         "otnsol/s otnadv/s  _icmp6_");
}


x86 assembly (clang, -O0):
<icmpv6head>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<icmpv6head>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [70 x i8] c"intot/s outtot/s inerr/s innsol/s innadv/s otnsol/s otnadv/s _icmp6_\00"
define void @icmpv6head(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = call i32 @printf(i8* getelementptr inbounds ([70 x i8], [70 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [70 x i8] c"intot/s outtot/s inerr/s innsol/s innadv/s otnsol/s otnadv/s _icmp6_\00"
define void @icmpv6head(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([70 x i8], [70 x i8]* @.str, i64 0, i64 0))
ret void
}
void lcd_update(void) {}


x86 assembly (clang, -O0):
<lcd_update>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcd_update>:
ret

LLVM IR (-O0):
define void @lcd_update() {
ret void
}

LLVM IR (-O2):
define void @lcd_update() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
float sqrtf(int /*<<< orphan*/);
int /*<<< orphan*/ stdlib_strided_svariancech(int /*<<< orphan*/ const,
                                              float const, float const *,
                                              int /*<<< orphan*/ const);
float stdlib_strided_sstdevch(const int64_t N, const float correction,
                              const float *X, const int64_t stride) {
  return sqrtf(stdlib_strided_svariancech(N, correction, X, stride));
}


x86 assembly (clang, -O0):
<stdlib_strided_sstdevch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
movss  -0x8(%rbp),%xmm0
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <stdlib_strided_svariancech@plt>
mov    %eax,%edi
call   1030 <sqrtf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stdlib_strided_sstdevch>:
push   %rax
call   1040 <stdlib_strided_svariancech@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <sqrtf@plt>

LLVM IR (-O0):
define float @stdlib_strided_sstdevch(i32 %0, float %1, float* %2, i32 %3) {
%5 = alloca i32
%6 = alloca float
%7 = alloca float*
%8 = alloca i32
store i32 %0, i32* %5
store float %1, float* %6
store float* %2, float** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load float, float* %6
%11 = load float*, float** %7
%12 = load i32, i32* %8
%13 = call i32 @stdlib_strided_svariancech(i32 %9, float %10, float* %11, i32 %12)
%14 = call float @sqrtf(i32 %13)
ret float %14
}

LLVM IR (-O2):
define float @stdlib_strided_sstdevch(i32 %0, float %1, float* %2, i32 %3) {
%5 = tail call i32 @stdlib_strided_svariancech(i32 %0, float %1, float* %2, i32 %3)
%6 = tail call float @sqrtf(i32 %5)
ret float %6
}
/* Variables and functions */
char *print_vfpu_reg(int, int /*<<< orphan*/, char, char, char *);
char *print_vfpuquad(int reg, char *output) {
  return print_vfpu_reg(reg, 0, 'C', 'R', output);
}


x86 assembly (clang, -O0):
<print_vfpuquad>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%r8
xor    %esi,%esi
mov    $0x43,%edx
mov    $0x52,%ecx
call   1030 <print_vfpu_reg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_vfpuquad>:
mov    %rsi,%r8
xor    %esi,%esi
mov    $0x43,%edx
mov    $0x52,%ecx
jmp    1030 <print_vfpu_reg@plt>

LLVM IR (-O0):
define i8* @print_vfpuquad(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i8* @print_vfpu_reg(i32 %5, i32 0, i8 signext 67, i8 signext 82, i8* %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @print_vfpuquad(i32 %0, i8* %1) {
%3 = tail call i8* @print_vfpu_reg(i32 %0, i32 0, i8 signext 67, i8 signext 82, i8* %1)
ret i8* %3
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, ...);
void pr_SL(FILE *fp, uint8_t SL) {
  if (SL == 0)
    fprintf(fp, "SL:ACAS inoperative\n");
  else
    fprintf(fp, "SL:ACAS operating at sensitivity level:%d\n", SL);
}


x86 assembly (clang, -O0):
<pr_SL>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1142 <pr_SL+0x32>
mov    -0x8(%rbp),%rdi
lea    0xeca(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
jmp    1158 <pr_SL+0x48>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xec4(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pr_SL>:
mov    %rdi,%rcx
test   %rsi,%rsi
je     113c <pr_SL+0x1c>
mov    %rsi,%rdx
lea    0xee3(%rip),%rsi
mov    %rcx,%rdi
xor    %eax,%eax
jmp    1030 <fprintf@plt>
lea    0xebd(%rip),%rdi
mov    $0x14,%esi
mov    $0x1,%edx
jmp    1040 <fwrite@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"SL:ACAS inoperative\0A\00"
@.str.1 = [43 x i8] c"SL:ACAS operating at sensitivity level:%d\0A\00"
define void @pr_SL(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
store i32* %0, i32** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32*, i32** %3
%9 = call i32 (i32*, i8*, ...) @fprintf(i32* %8, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
br label %14
10: ; preds = %2
%11 = load i32*, i32** %3
%12 = load i64, i64* %4
%13 = call i32 (i32*, i8*, ...) @fprintf(i32* %11, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.1, i64 0, i64 0), i64 %12)
br label %14
14: ; preds = %10, %7
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"SL:ACAS inoperative\0A\00"
@.str.1 = [43 x i8] c"SL:ACAS operating at sensitivity level:%d\0A\00"
define void @pr_SL(i32* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i64 @fwrite(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i64 20, i64 1, i32* %0)
br label %8
6: ; preds = %2
%7 = tail call i32 (i32*, i8*, ...) @fprintf(i32* %0, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.1, i64 0, i64 0), i64 %1)
br label %8
8: ; preds = %6, %4
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint8_t;

/* Variables and functions */
uint8_t read_ble8(const void *src) {
  const uint8_t *s = src;
  return *s;
}


x86 assembly (clang, -O0):
<read_ble8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_ble8>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @read_ble8(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @read_ble8(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int64_t;

/* Variables and functions */
void roam_set_bytes(u_int64_t sent, u_int64_t recvd) {}


x86 assembly (clang, -O0):
<roam_set_bytes>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<roam_set_bytes>:
ret

LLVM IR (-O0):
define void @roam_set_bytes(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @roam_set_bytes(i32 %0, i32 %1) {
ret void
}