xunge/DecIR huggingface dataset:
int test_73_4(int *mem) { return __atomic_nand_fetch(mem + 4, -1, 4); }


x86 assembly (clang, -O0):
<test_73_4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x10,%rcx
mov    %rcx,-0x20(%rbp)
movl   $0xffffffff,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    %ecx,-0x18(%rbp)
mov    0x10(%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%esi
mov    %eax,%edx
and    %esi,%edx
mov    %edx,-0x28(%rbp)
not    %edx
lock cmpxchg %edx,(%rcx)
sete   %cl
mov    %eax,-0x24(%rbp)
test   $0x1,%cl
mov    %eax,-0x14(%rbp)
jne    1158 <test_73_4+0x58>
jmp    112a <test_73_4+0x2a>
mov    -0x18(%rbp),%ecx
mov    -0x24(%rbp),%eax
and    %ecx,%eax
xor    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_73_4>:
mov    0x10(%rdi),%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %eax,%ecx
not    %ecx
lock cmpxchg %ecx,0x10(%rdi)
jne    1110 <test_73_4+0x10>
not    %eax
ret

LLVM IR (-O0):
define i32 @test_73_4(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 4
store i32 -1, i32* %3
%7 = load i32, i32* %3
%8 = atomicrmw nand i32* %6, i32 %7 acq_rel
%9 = and i32 %8, %7
%10 = xor i32 %9, -1
store i32 %10, i32* %4
%11 = load i32, i32* %4
ret i32 %11
}

LLVM IR (-O2):
define i32 @test_73_4(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 4
%3 = atomicrmw nand i32* %2, i32 -1 acq_rel
%4 = xor i32 %3, -1
ret i32 %4
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int __fxstat(int /*<<< orphan*/, int, struct stat *);
int fstat(int fd, struct stat *buf) { return __fxstat(0, fd, buf); }


x86 assembly (clang, -O0):
<fstat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
xor    %edi,%edi
call   1030 <__fxstat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fstat>:
mov    %rsi,%rdx
mov    %edi,%esi
xor    %edi,%edi
jmp    1030 <__fxstat@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @fstat(i32 %0, %struct.stat* %1) {
%3 = alloca i32
%4 = alloca %struct.stat*
store i32 %0, i32* %3
store %struct.stat* %1, %struct.stat** %4
%5 = load i32, i32* %3
%6 = load %struct.stat*, %struct.stat** %4
%7 = call i32 @__fxstat(i32 0, i32 %5, %struct.stat* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @fstat(i32 %0, %struct.stat* %1) {
%3 = tail call i32 @__fxstat(i32 0, i32 %0, %struct.stat* %1)
ret i32 %3
}
void g2p(double *in, double *out) { *out = *in * 0.002205; }


x86 assembly (clang, -O0):
<g2p>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  0xee8(%rip),%xmm0
mulsd  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<g2p>:
movsd  (%rdi),%xmm0
mulsd  0xef4(%rip),%xmm0
movsd  %xmm0,(%rsi)
ret

LLVM IR (-O0):
define void @g2p(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = load double, double* %5
%7 = fmul double %6, 2.205000e-03
%8 = load double*, double** %4
store double %7, double* %8
ret void
}

LLVM IR (-O2):
define void @g2p(double* nocapture %0, double* nocapture writeonly %1) {
%3 = load double, double* %0
%4 = fmul double %3, 2.205000e-03
store double %4, double* %1
ret void
}
/* Type definitions */
struct in6_addr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ AF_INET6;
int inet_pton(int /*<<< orphan*/, char const *, struct in6_addr *);
struct in6_addr *numeric_to_addr(const char *num) {
  static struct in6_addr ap;
  int err;
  if ((err = inet_pton(AF_INET6, num, &ap)) == 1)
    return &ap;
  return (struct in6_addr *)NULL;
}


x86 assembly (clang, -O0):
<numeric_to_addr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
lea    0x2efc(%rip),%rdx
call   1030 <inet_pton@plt>
mov    %eax,-0x14(%rbp)
cmp    $0x1,%eax
jne    1151 <numeric_to_addr+0x41>
lea    0x2ee4(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1159 <numeric_to_addr+0x49>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<numeric_to_addr>:
push   %rbx
mov    %rdi,%rsi
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
lea    0x2f08(%rip),%rbx
mov    %rbx,%rdx
call   1030 <inet_pton@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
cmove  %rbx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.in6_addr = type { i32 }
@numeric_to_addr.ap = internal global %struct.in6_addr zeroinitializer
@AF_INET6 = global i32 0
define %struct.in6_addr* @numeric_to_addr(i8* %0) {
%2 = alloca %struct.in6_addr*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i32, i32* @AF_INET6
%6 = load i8*, i8** %3
%7 = call i32 @inet_pton(i32 %5, i8* %6, %struct.in6_addr* @numeric_to_addr.ap)
store i32 %7, i32* %4
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %1
store %struct.in6_addr* @numeric_to_addr.ap, %struct.in6_addr** %2
br label %11
10: ; preds = %1
store %struct.in6_addr* null, %struct.in6_addr** %2
br label %11
11: ; preds = %10, %9
%12 = load %struct.in6_addr*, %struct.in6_addr** %2
ret %struct.in6_addr* %12
}

LLVM IR (-O2):
%struct.in6_addr = type { i32 }
@numeric_to_addr.ap = internal global %struct.in6_addr zeroinitializer
@AF_INET6 = global i32 0
define %struct.in6_addr* @numeric_to_addr(i8* %0) {
%2 = load i32, i32* @AF_INET6
%3 = tail call i32 @inet_pton(i32 %2, i8* %0, %struct.in6_addr* @numeric_to_addr.ap)
%4 = icmp eq i32 %3, 1
%5 = select i1 %4, %struct.in6_addr* @numeric_to_addr.ap, %struct.in6_addr* null
ret %struct.in6_addr* %5
}
/* Variables and functions */
void *malloc(size_t);
void *shds_alloc(size_t size) { return malloc(size); }


x86 assembly (clang, -O0):
<shds_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shds_alloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @shds_alloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @shds_alloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
double min(double x, double y) {
  if (x < y)
    return x;
  else
    return y;
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1131 <min+0x31>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    113b <min+0x3b>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
minsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @min(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %4
%7 = load double, double* %5
%8 = fcmp olt double %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load double, double* %4
store double %10, double* %3
br label %13
11: ; preds = %2
%12 = load double, double* %5
store double %12, double* %3
br label %13
13: ; preds = %11, %9
%14 = load double, double* %3
ret double %14
}

LLVM IR (-O2):
define double @min(double %0, double %1) {
%3 = fcmp olt double %0, %1
%4 = select i1 %3, double %0, double %1
ret double %4
}
int test_imm_08int64_highword_reg(long long val) {
  return ((val >> 32) & (0x08 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_08int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0x8,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_08int64_highword_reg>:
bt     $0x23,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_08int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 8
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_08int64_highword_reg(i64 %0) {
%2 = and i64 %0, 34359738368
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void fatal(char *s) {
  fprintf(stderr, s);
  fprintf(stderr, "\n");
  exit(-1);
}


x86 assembly (clang, -O0):
<fatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <fprintf@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
lea    0xeb2(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<fatal>:
push   %rbx
mov    %rdi,%rsi
mov    0x2eb5(%rip),%rbx
mov    (%rbx),%edi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xec5(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [2 x i8] c"\0A\00"
define void @fatal(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* %4)
%6 = load i32, i32* @stderr
%7 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [2 x i8] c"\0A\00"
define void @fatal(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* %0)
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 @exit(i32 -1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ VIM_SIF_I2cReadByte(int, unsigned char *);
int /*<<< orphan*/ VIM_SIF_I2cWriteByte(int, int);
unsigned char CheckId_MC501CB(void) {
  unsigned char temp;
  VIM_SIF_I2cWriteByte(0x03, 0x00);
  VIM_SIF_I2cReadByte(0x04, &temp);
  if (temp == 0x62)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<CheckId_MC501CB>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x3,%edi
xor    %esi,%esi
call   1040 <VIM_SIF_I2cWriteByte@plt>
mov    $0x4,%edi
lea    -0x2(%rbp),%rsi
call   1030 <VIM_SIF_I2cReadByte@plt>
movzbl -0x2(%rbp),%eax
cmp    $0x62,%eax
jne    1158 <CheckId_MC501CB+0x38>
movb   $0x1,-0x1(%rbp)
jmp    115c <CheckId_MC501CB+0x3c>
movb   $0x0,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CheckId_MC501CB>:
push   %rax
mov    $0x3,%edi
xor    %esi,%esi
call   1040 <VIM_SIF_I2cWriteByte@plt>
lea    0x7(%rsp),%rsi
mov    $0x4,%edi
call   1030 <VIM_SIF_I2cReadByte@plt>
cmpb   $0x62,0x7(%rsp)
sete   %al
pop    %rcx
ret

LLVM IR (-O0):
define zeroext i8 @CheckId_MC501CB() {
%1 = alloca i8
%2 = alloca i8
%3 = call i32 @VIM_SIF_I2cWriteByte(i32 3, i32 0)
%4 = call i32 @VIM_SIF_I2cReadByte(i32 4, i8* %2)
%5 = load i8, i8* %2
%6 = zext i8 %5 to i32
%7 = icmp eq i32 %6, 98
br i1 %7, label %8, label %9
8: ; preds = %0
store i8 1, i8* %1
br label %10
9: ; preds = %0
store i8 0, i8* %1
br label %10
10: ; preds = %9, %8
%11 = load i8, i8* %1
ret i8 %11
}

LLVM IR (-O2):
define zeroext i8 @CheckId_MC501CB() {
%1 = alloca i8
%2 = tail call i32 @VIM_SIF_I2cWriteByte(i32 3, i32 0)
%3 = call i32 @VIM_SIF_I2cReadByte(i32 4, i8* %1)
%4 = load i8, i8* %1
%5 = icmp eq i8 %4, 98
%6 = zext i1 %5 to i8
ret i8 %6
}
void RTPipeFromNative(void) {}


x86 assembly (clang, -O0):
<RTPipeFromNative>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTPipeFromNative>:
ret

LLVM IR (-O0):
define void @RTPipeFromNative() {
ret void
}

LLVM IR (-O2):
define void @RTPipeFromNative() {
ret void
}
const char *ccnxNotifyAPIAbout_ShortNotice(void) {
  return "Copyright (c) 2017 Cisco and/or its affiliates.\n";
}


x86 assembly (clang, -O0):
<ccnxNotifyAPIAbout_ShortNotice>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccnxNotifyAPIAbout_ShortNotice>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [49 x i8] c"Copyright (c) 2017 Cisco and/or its affiliates.\0A\00"
define i8* @ccnxNotifyAPIAbout_ShortNotice() {
ret i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [49 x i8] c"Copyright (c) 2017 Cisco and/or its affiliates.\0A\00"
define i8* @ccnxNotifyAPIAbout_ShortNotice() {
ret i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0)
}
int compareInt(const void *x, const void *y) {
  return ((*(int *)x) - (*(int *)y));
}


x86 assembly (clang, -O0):
<compareInt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compareInt>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @compareInt(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @compareInt(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}
/* Variables and functions */
int LimitSym(int, int);
int DirSmooth(int dirCmdClk, int rbtDirClk) {
  int dirMotorCmd;
  dirMotorCmd = LimitSym((dirCmdClk - rbtDirClk) / 25, 15);
  return (dirMotorCmd);
}


x86 assembly (clang, -O0):
<DirSmooth>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    $0x19,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
mov    $0xf,%esi
call   1030 <LimitSym@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DirSmooth>:
sub    %esi,%edi
movslq %edi,%rax
imul   $0x51eb851f,%rax,%rdi
mov    %rdi,%rax
shr    $0x3f,%rax
sar    $0x23,%rdi
add    %eax,%edi
mov    $0xf,%esi
jmp    1030 <LimitSym@plt>

LLVM IR (-O0):
define i32 @DirSmooth(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = sub nsw i32 %6, %7
%9 = sdiv i32 %8, 25
%10 = call i32 @LimitSym(i32 %9, i32 15)
store i32 %10, i32* %5
%11 = load i32, i32* %5
ret i32 %11
}

LLVM IR (-O2):
define i32 @DirSmooth(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
%4 = sdiv i32 %3, 25
%5 = tail call i32 @LimitSym(i32 %4, i32 15)
ret i32 %5
}
char *Py_GetProgramFullPath() { return "/python"; }


x86 assembly (clang, -O0):
<Py_GetProgramFullPath>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Py_GetProgramFullPath>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [8 x i8] c"/python\00"
define i8* @Py_GetProgramFullPath() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [8 x i8] c"/python\00"
define i8* @Py_GetProgramFullPath() {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int ENOSYS;
int sysfs_get_hardware_limits(unsigned int cpu, unsigned long *min,
                              unsigned long *max) {
  return -ENOSYS;
}


x86 assembly (clang, -O0):
<sysfs_get_hardware_limits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
mov    0x2ed0(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sysfs_get_hardware_limits>:
mov    0x2ee1(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @sysfs_get_hardware_limits(i32 %0, i64* %1, i64* %2) {
%4 = alloca i32
%5 = alloca i64*
%6 = alloca i64*
store i32 %0, i32* %4
store i64* %1, i64** %5
store i64* %2, i64** %6
%7 = load i32, i32* @ENOSYS
%8 = sub nsw i32 0, %7
ret i32 %8
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @sysfs_get_hardware_limits(i32 %0, i64* nocapture readnone %1, i64* nocapture readnone %2) {
%4 = load i32, i32* @ENOSYS
%5 = sub nsw i32 0, %4
ret i32 %5
}
int HostGetDevicePointer(void **pDevice, void *pHost, unsigned int flags) {
  *pDevice = pHost;
  return 0;
}


x86 assembly (clang, -O0):
<HostGetDevicePointer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HostGetDevicePointer>:
mov    %rsi,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HostGetDevicePointer(i8** %0, i8* %1, i32 %2) {
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca i32
store i8** %0, i8*** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %5
%8 = load i8**, i8*** %4
store i8* %7, i8** %8
ret i32 0
}

LLVM IR (-O2):
define i32 @HostGetDevicePointer(i8** nocapture writeonly %0, i8* %1, i32 %2) {
store i8* %1, i8** %0
ret i32 0
}
int __seed(unsigned int x, unsigned int m) { return (x < m) ? x + m : x; }


x86 assembly (clang, -O0):
<__seed>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jae    1124 <__seed+0x24>
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    112a <__seed+0x2a>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__seed>:
xor    %eax,%eax
cmp    %esi,%edi
cmovb  %esi,%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @__seed(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ult i32 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = add i32 %9, %10
br label %14
12: ; preds = %2
%13 = load i32, i32* %3
br label %14
14: ; preds = %12, %8
%15 = phi i32 [ %11, %8 ], [ %13, %12 ]
ret i32 %15
}

LLVM IR (-O2):
define i32 @__seed(i32 %0, i32 %1) {
%3 = icmp ult i32 %0, %1
%4 = select i1 %3, i32 %1, i32 0
%5 = add i32 %4, %0
ret i32 %5
}
off_obstructed(a, b) char a, b;
{
  char row, col;
  to_xy(a, b, &row, &col);
  if (col < 10 || col > 38 || row < 0 || row > 14)
    return (1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<off_obstructed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%cl
mov    %sil,%al
mov    %cl,-0x5(%rbp)
mov    %al,-0x6(%rbp)
movsbl -0x5(%rbp),%edi
movsbl -0x6(%rbp),%esi
lea    -0x7(%rbp),%rdx
lea    -0x8(%rbp),%rcx
mov    $0x0,%al
call   1030 <to_xy@plt>
movsbl -0x8(%rbp),%eax
cmp    $0xa,%eax
jl     116f <off_obstructed+0x5f>
movsbl -0x8(%rbp),%eax
cmp    $0x26,%eax
jg     116f <off_obstructed+0x5f>
movsbl -0x7(%rbp),%eax
cmp    $0x0,%eax
jl     116f <off_obstructed+0x5f>
movsbl -0x7(%rbp),%eax
cmp    $0xe,%eax
jle    117b <off_obstructed+0x6b>
movl   $0x1,-0x4(%rbp)
jmp    1182 <off_obstructed+0x72>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<off_obstructed>:
push   %rax
movsbl %dil,%edi
movsbl %sil,%esi
lea    0x7(%rsp),%rdx
lea    0x6(%rsp),%rcx
xor    %eax,%eax
call   1030 <to_xy@plt>
mov    0x6(%rsp),%al
add    $0xd9,%al
cmp    $0xe3,%al
setb   %al
mov    0x7(%rsp),%cl
test   %cl,%cl
sets   %dl
cmp    $0xf,%cl
setge  %cl
or     %dl,%cl
or     %al,%cl
movzbl %cl,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @off_obstructed(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = trunc i32 %0 to i8
%9 = trunc i32 %1 to i8
store i8 %8, i8* %4
store i8 %9, i8* %5
%10 = load i8, i8* %4
%11 = sext i8 %10 to i32
%12 = load i8, i8* %5
%13 = sext i8 %12 to i32
%14 = call i32 (i32, i32, i8*, i8*, ...) bitcast (i32 (...)* @to_xy to i32 (i32, i32, i8*, i8*, ...)*)(i32 %11, i32 %13, i8* %6, i8* %7)
%15 = load i8, i8* %7
%16 = sext i8 %15 to i32
%17 = icmp slt i32 %16, 10
br i1 %17, label %30, label %18
18: ; preds = %2
%19 = load i8, i8* %7
%20 = sext i8 %19 to i32
%21 = icmp sgt i32 %20, 38
br i1 %21, label %30, label %22
22: ; preds = %18
%23 = load i8, i8* %6
%24 = sext i8 %23 to i32
%25 = icmp slt i32 %24, 0
br i1 %25, label %30, label %26
26: ; preds = %22
%27 = load i8, i8* %6
%28 = sext i8 %27 to i32
%29 = icmp sgt i32 %28, 14
br i1 %29, label %30, label %31
30: ; preds = %26, %22, %18, %2
store i32 1, i32* %3
br label %32
31: ; preds = %26
store i32 0, i32* %3
br label %32
32: ; preds = %31, %30
%33 = load i32, i32* %3
ret i32 %33
}

LLVM IR (-O2):
define i32 @off_obstructed(i32 %0, i32 %1) {
%3 = alloca i8
%4 = alloca i8
%5 = shl i32 %0, 24
%6 = ashr exact i32 %5, 24
%7 = shl i32 %1, 24
%8 = ashr exact i32 %7, 24
%9 = call i32 (i32, i32, i8*, i8*, ...) bitcast (i32 (...)* @to_xy to i32 (i32, i32, i8*, i8*, ...)*)(i32 %6, i32 %8, i8* %3, i8* %4)
%10 = load i8, i8* %4
%11 = add i8 %10, -39
%12 = icmp ult i8 %11, -29
%13 = load i8, i8* %3
%14 = icmp slt i8 %13, 0
%15 = select i1 %12, i1 true, i1 %14
%16 = icmp sgt i8 %13, 14
%17 = select i1 %15, i1 true, i1 %16
%18 = zext i1 %17 to i32
ret i32 %18
}
/* Type definitions */
typedef int uint16_t;
struct alarm {
  int dummy;
};
typedef int int16_t;

/* Variables and functions */
int alarm_to_min(struct alarm *);
int /*<<< orphan*/ min_to_alarm(int, struct alarm *);
struct alarm *increment_alarm(struct alarm *a, int16_t adj) {
  uint16_t mins = alarm_to_min(a);
  mins = (mins + adj) % (24 * 60);
  min_to_alarm(mins, a);
  return a;
}


x86 assembly (clang, -O0):
<increment_alarm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <alarm_to_min@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    -0xc(%rbp),%eax
mov    $0x5a0,%ecx
cltd
idiv   %ecx
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%edi
mov    -0x8(%rbp),%rsi
call   1040 <min_to_alarm@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<increment_alarm>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <alarm_to_min@plt>
add    %ebp,%eax
movslq %eax,%rdi
imul   $0xffffffffb60b60b7,%rdi,%rax
shr    $0x20,%rax
add    %edi,%eax
mov    %eax,%ecx
shr    $0x1f,%ecx
sar    $0xa,%eax
add    %ecx,%eax
imul   $0x5a0,%eax,%eax
sub    %eax,%edi
mov    %rbx,%rsi
call   1040 <min_to_alarm@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.alarm = type { i32 }
define %struct.alarm* @increment_alarm(%struct.alarm* %0, i32 %1) {
%3 = alloca %struct.alarm*
%4 = alloca i32
%5 = alloca i32
store %struct.alarm* %0, %struct.alarm** %3
store i32 %1, i32* %4
%6 = load %struct.alarm*, %struct.alarm** %3
%7 = call i32 @alarm_to_min(%struct.alarm* %6)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = load i32, i32* %4
%10 = add nsw i32 %8, %9
%11 = srem i32 %10, 1440
store i32 %11, i32* %5
%12 = load i32, i32* %5
%13 = load %struct.alarm*, %struct.alarm** %3
%14 = call i32 @min_to_alarm(i32 %12, %struct.alarm* %13)
%15 = load %struct.alarm*, %struct.alarm** %3
ret %struct.alarm* %15
}

LLVM IR (-O2):
%struct.alarm = type { i32 }
define %struct.alarm* @increment_alarm(%struct.alarm* returned %0, i32 %1) {
%3 = tail call i32 @alarm_to_min(%struct.alarm* %0)
%4 = add nsw i32 %3, %1
%5 = srem i32 %4, 1440
%6 = tail call i32 @min_to_alarm(i32 %5, %struct.alarm* %0)
ret %struct.alarm* %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int ac, char **av) {
  printf("Hello\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"Hello\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [6 x i8] c"Hello\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
ret i32 0
}
void gtk_file_chooser_get_select_multiple() {}


x86 assembly (clang, -O0):
<gtk_file_chooser_get_select_multiple>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_file_chooser_get_select_multiple>:
ret

LLVM IR (-O0):
define void @gtk_file_chooser_get_select_multiple() {
ret void
}

LLVM IR (-O2):
define void @gtk_file_chooser_get_select_multiple() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ libCompDNAFunc(char *);
int /*<<< orphan*/ libReverseFunc(char *);
void libCompRevFunc(char *seq) {
  libReverseFunc(seq);
  libCompDNAFunc(seq);
}


x86 assembly (clang, -O0):
<libCompRevFunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <libReverseFunc@plt>
mov    -0x8(%rbp),%rdi
call   1030 <libCompDNAFunc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libCompRevFunc>:
push   %rbx
mov    %rdi,%rbx
call   1040 <libReverseFunc@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <libCompDNAFunc@plt>

LLVM IR (-O0):
define void @libCompRevFunc(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @libReverseFunc(i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @libCompDNAFunc(i8* %5)
ret void
}

LLVM IR (-O2):
define void @libCompRevFunc(i8* %0) {
%2 = tail call i32 @libReverseFunc(i8* %0)
%3 = tail call i32 @libCompDNAFunc(i8* %0)
ret void
}
/* Variables and functions */
int strcmp(char const *, char const *);
int jw_strcmp(const char *a, const char *b) {
  if (a == b) {
    return 0;
  }
  if (a == NULL) {
    return -1;
  }
  if (b == NULL) {
    return 1;
  }
  return strcmp(a, b);
}


x86 assembly (clang, -O0):
<jw_strcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jne    113a <jw_strcmp+0x2a>
movl   $0x0,-0x4(%rbp)
jmp    1178 <jw_strcmp+0x68>
cmpq   $0x0,-0x10(%rbp)
jne    1151 <jw_strcmp+0x41>
movl   $0xffffffff,-0x4(%rbp)
jmp    1178 <jw_strcmp+0x68>
cmpq   $0x0,-0x18(%rbp)
jne    1168 <jw_strcmp+0x58>
movl   $0x1,-0x4(%rbp)
jmp    1178 <jw_strcmp+0x68>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <strcmp@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jw_strcmp>:
cmp    %rsi,%rdi
je     1124 <jw_strcmp+0x14>
test   %rdi,%rdi
je     1127 <jw_strcmp+0x17>
test   %rsi,%rsi
je     112d <jw_strcmp+0x1d>
jmp    1030 <strcmp@plt>
xor    %eax,%eax
ret
mov    $0xffffffff,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @jw_strcmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = load i8*, i8** %5
%8 = icmp eq i8* %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 0, i32* %3
br label %22
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = icmp eq i8* %11, null
br i1 %12, label %13, label %14
13: ; preds = %10
store i32 -1, i32* %3
br label %22
14: ; preds = %10
%15 = load i8*, i8** %5
%16 = icmp eq i8* %15, null
br i1 %16, label %17, label %18
17: ; preds = %14
store i32 1, i32* %3
br label %22
18: ; preds = %14
%19 = load i8*, i8** %4
%20 = load i8*, i8** %5
%21 = call i32 @strcmp(i8* %19, i8* %20)
store i32 %21, i32* %3
br label %22
22: ; preds = %18, %17, %13, %9
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @jw_strcmp(i8* %0, i8* %1) {
%3 = icmp eq i8* %0, %1
br i1 %3, label %10, label %4
4: ; preds = %2
%5 = icmp eq i8* %0, null
br i1 %5, label %10, label %6
6: ; preds = %4
%7 = icmp eq i8* %1, null
br i1 %7, label %10, label %8
8: ; preds = %6
%9 = tail call i32 @strcmp(i8* %0, i8* %1)
br label %10
10: ; preds = %6, %4, %2, %8
%11 = phi i32 [ %9, %8 ], [ 0, %2 ], [ -1, %4 ], [ 1, %6 ]
ret i32 %11
}
/* Variables and functions */
double FLT_MAX;
int /*<<< orphan*/ printf(char *, double);
int main() {
  printf("sizeof(float) = %lu\n", sizeof(float));
  printf("sizeof(double) = %lu\n", sizeof(double));
  printf("sizeof(long double) = %lu\n", sizeof(long double));
  printf("Max of float = %f\n", FLT_MAX);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xef2(%rip),%rdi
movsd  0xee2(%rip),%xmm0
call   1030 <printf@plt>
lea    0xef3(%rip),%rdi
movsd  0xec6(%rip),%xmm0
call   1030 <printf@plt>
lea    0xef5(%rip),%rdi
movsd  0xeaa(%rip),%xmm0
call   1030 <printf@plt>
mov    0x2e86(%rip),%rax
movsd  (%rax),%xmm0
lea    0xef1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xf00(%rip),%rdi
movsd  0xee0(%rip),%xmm0
call   1030 <printf@plt>
lea    0xf01(%rip),%rdi
movsd  0xed4(%rip),%xmm0
call   1030 <printf@plt>
lea    0xf03(%rip),%rdi
movsd  0xec8(%rip),%xmm0
call   1030 <printf@plt>
mov    0x2e94(%rip),%rax
movsd  (%rax),%xmm0
lea    0xeff(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"sizeof(float) = %lu\0A\00"
@.str.1 = [22 x i8] c"sizeof(double) = %lu\0A\00"
@.str.2 = [27 x i8] c"sizeof(long double) = %lu\0A\00"
@.str.3 = [19 x i8] c"Max of float = %f\0A\00"
@FLT_MAX = global double 0.000000e+00
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), double 4.000000e+00)
%3 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), double 8.000000e+00)
%4 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.2, i64 0, i64 0), double 1.600000e+01)
%5 = load double, double* @FLT_MAX
%6 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.3, i64 0, i64 0), double %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [21 x i8] c"sizeof(float) = %lu\0A\00"
@.str.1 = [22 x i8] c"sizeof(double) = %lu\0A\00"
@.str.2 = [27 x i8] c"sizeof(long double) = %lu\0A\00"
@.str.3 = [19 x i8] c"Max of float = %f\0A\00"
@FLT_MAX = global double 0.000000e+00
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), double 4.000000e+00)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), double 8.000000e+00)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.2, i64 0, i64 0), double 1.600000e+01)
%4 = load double, double* @FLT_MAX
%5 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.3, i64 0, i64 0), double %4)
ret i32 0
}
/* Type definitions */
struct uv__mmsghdr {
  int dummy;
};
struct timespec {
  int dummy;
};

/* Variables and functions */
int syscall(int, int, struct uv__mmsghdr *, unsigned int, unsigned int,
            struct timespec *);
int uv__recvmmsg(int fd, struct uv__mmsghdr *mmsg, unsigned int vlen,
                 unsigned int flags, struct timespec *timeout) {
  return syscall(299, fd, mmsg, vlen, flags, timeout);
}


x86 assembly (clang, -O0):
<uv__recvmmsg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
mov    -0x20(%rbp),%r9
mov    $0x12b,%edi
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uv__recvmmsg>:
mov    %r8,%r9
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0x12b,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.uv__mmsghdr = type { i32 }
%struct.timespec = type { i32 }
define i32 @uv__recvmmsg(i32 %0, %struct.uv__mmsghdr* %1, i32 %2, i32 %3, %struct.timespec* %4) {
%6 = alloca i32
%7 = alloca %struct.uv__mmsghdr*
%8 = alloca i32
%9 = alloca i32
%10 = alloca %struct.timespec*
store i32 %0, i32* %6
store %struct.uv__mmsghdr* %1, %struct.uv__mmsghdr** %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store %struct.timespec* %4, %struct.timespec** %10
%11 = load i32, i32* %6
%12 = load %struct.uv__mmsghdr*, %struct.uv__mmsghdr** %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load %struct.timespec*, %struct.timespec** %10
%16 = call i32 @syscall(i32 299, i32 %11, %struct.uv__mmsghdr* %12, i32 %13, i32 %14, %struct.timespec* %15)
ret i32 %16
}

LLVM IR (-O2):
%struct.uv__mmsghdr = type { i32 }
%struct.timespec = type { i32 }
define i32 @uv__recvmmsg(i32 %0, %struct.uv__mmsghdr* %1, i32 %2, i32 %3, %struct.timespec* %4) {
%6 = tail call i32 @syscall(i32 299, i32 %0, %struct.uv__mmsghdr* %1, i32 %2, i32 %3, %struct.timespec* %4)
ret i32 %6
}
main() {
  const int x = 5;
  const int y = x + 2;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x5,-0x4(%rbp)
movl   $0x7,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 5, i32* %1
store i32 7, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
reg0imm1_set(r0, r1, x0, x1, p0, p1) float r0, r1;
float *p0, *p1;
{ r0 = 33; }


x86 assembly (clang, -O0):
<reg0imm1_set>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm1,-0x30(%rbp)
movaps %xmm0,%xmm1
movsd  -0x30(%rbp),%xmm0
cvtsd2ss %xmm1,%xmm1
cvtsd2ss %xmm0,%xmm0
movss  %xmm1,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    %edi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
movss  0xec7(%rip),%xmm0
movss  %xmm0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg0imm1_set>:
ret

LLVM IR (-O0):
define i32 @reg0imm1_set(double %0, double %1, i32 %2, i32 %3, float* %4, float* %5) {
%7 = alloca i32
%8 = alloca float
%9 = alloca float
%10 = alloca i32
%11 = alloca i32
%12 = alloca float*
%13 = alloca float*
%14 = fptrunc double %0 to float
%15 = fptrunc double %1 to float
store float %14, float* %8
store float %15, float* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store float* %4, float** %12
store float* %5, float** %13
store float 3.300000e+01, float* %8
%16 = load i32, i32* %7
ret i32 %16
}

LLVM IR (-O2):
define i32 @reg0imm1_set(double %0, double %1, i32 %2, i32 %3, float* nocapture readnone %4, float* nocapture readnone %5) {
ret i32 undef
}
void GPIOPortQ5_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<GPIOPortQ5_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <GPIOPortQ5_Handler+0x9>
jmp    1109 <GPIOPortQ5_Handler+0x9>

x86 assembly (clang, -O2):
<GPIOPortQ5_Handler>:
jmp    1100 <GPIOPortQ5_Handler>

LLVM IR (-O0):
define void @GPIOPortQ5_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @GPIOPortQ5_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
double sq(const double x[]) {
  return (double)x[0] * x[0] + x[1] * x[1] + x[2] * x[2];
}


x86 assembly (clang, -O0):
<sq>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
mulsd  0x8(%rax),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sq>:
movsd  (%rdi),%xmm1
movsd  0x8(%rdi),%xmm0
mulsd  %xmm0,%xmm0
mulsd  %xmm1,%xmm1
addsd  %xmm0,%xmm1
movsd  0x10(%rdi),%xmm0
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @sq(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = load double*, double** %2
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = load double*, double** %2
%10 = getelementptr inbounds double, double* %9, i64 1
%11 = load double, double* %10
%12 = load double*, double** %2
%13 = getelementptr inbounds double, double* %12, i64 1
%14 = load double, double* %13
%15 = fmul double %11, %14
%16 = call double @llvm.fmuladd.f64(double %5, double %8, double %15)
%17 = load double*, double** %2
%18 = getelementptr inbounds double, double* %17, i64 2
%19 = load double, double* %18
%20 = load double*, double** %2
%21 = getelementptr inbounds double, double* %20, i64 2
%22 = load double, double* %21
%23 = call double @llvm.fmuladd.f64(double %19, double %22, double %16)
ret double %23
}

LLVM IR (-O2):
define double @sq(double* nocapture %0) {
%2 = load double, double* %0
%3 = getelementptr inbounds double, double* %0, i64 1
%4 = load double, double* %3
%5 = fmul double %4, %4
%6 = tail call double @llvm.fmuladd.f64(double %2, double %2, double %5)
%7 = getelementptr inbounds double, double* %0, i64 2
%8 = load double, double* %7
%9 = tail call double @llvm.fmuladd.f64(double %8, double %8, double %6)
ret double %9
}
/* Variables and functions */
int putchar(int);
int fputchar(int c) { return putchar(c); }


x86 assembly (clang, -O0):
<fputchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fputchar>:
jmp    1030 <putchar@plt>

LLVM IR (-O0):
define i32 @fputchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @putchar(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @fputchar(i32 %0) {
%2 = tail call i32 @putchar(i32 %0)
ret i32 %2
}
int lm_prepare_lockspace_sanlock(struct lockspace *ls) { return -1; }


x86 assembly (clang, -O0):
<lm_prepare_lockspace_sanlock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lm_prepare_lockspace_sanlock>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.lockspace = type opaque
define i32 @lm_prepare_lockspace_sanlock(%struct.lockspace* %0) {
%2 = alloca %struct.lockspace*
store %struct.lockspace* %0, %struct.lockspace** %2
ret i32 -1
}

LLVM IR (-O2):
%struct.lockspace = type opaque
define i32 @lm_prepare_lockspace_sanlock(%struct.lockspace* nocapture readnone %0) {
ret i32 -1
}
unsigned int swapBytes32(unsigned int x) { return __builtin_bswap32(x); }


x86 assembly (clang, -O0):
<swapBytes32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
bswap  %eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swapBytes32>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @swapBytes32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @llvm.bswap.i32(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @swapBytes32(i32 %0) {
%2 = tail call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
int verificaTelefone(int telefone) {
  if (telefone < 0)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<verificaTelefone>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    111d <verificaTelefone+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    1124 <verificaTelefone+0x24>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<verificaTelefone>:
mov    %edi,%eax
not    %eax
shr    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @verificaTelefone(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %8
7: ; preds = %1
store i32 1, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @verificaTelefone(i32 %0) {
%2 = xor i32 %0, -1
%3 = lshr i32 %2, 31
ret i32 %3
}
/* Type definitions */
typedef char uint8_t;

/* Variables and functions */
uint8_t fixup(uint8_t code) {
  if (code == '$')
    code = ' ';
  if (code == '*')
    code = '.';
  return code;
}


x86 assembly (clang, -O0):
<fixup>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x24,%eax
jne    111b <fixup+0x1b>
movb   $0x20,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x2a,%eax
jne    112c <fixup+0x2c>
movb   $0x2e,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fixup>:
cmp    $0x24,%dil
mov    $0x20,%ecx
cmovne %edi,%ecx
cmp    $0x2a,%cl
mov    $0x2e,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @fixup(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 36
br i1 %5, label %6, label %7
6: ; preds = %1
store i8 32, i8* %2
br label %7
7: ; preds = %6, %1
%8 = load i8, i8* %2
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 42
br i1 %10, label %11, label %12
11: ; preds = %7
store i8 46, i8* %2
br label %12
12: ; preds = %11, %7
%13 = load i8, i8* %2
ret i8 %13
}

LLVM IR (-O2):
define signext i8 @fixup(i8 signext %0) {
%2 = icmp eq i8 %0, 36
%3 = select i1 %2, i8 32, i8 %0
%4 = icmp eq i8 %3, 42
%5 = select i1 %4, i8 46, i8 %3
ret i8 %5
}
/* Variables and functions */
int /*<<< orphan*/ panic(char *);
void init() { panic("testing init out with panic()"); }


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <panic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
lea    0xee9(%rip),%rdi
jmp    1030 <panic@plt>

LLVM IR (-O0):
@.str = [30 x i8] c"testing init out with panic()\00"
define void @init() {
%1 = call i32 @panic(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [30 x i8] c"testing init out with panic()\00"
define void @init() {
%1 = tail call i32 @panic(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ rightTri(int, int);
int main() {
  int i;
  for (i = 1; i != 51; i++) {
    printf("%d %zu\n", i, rightTri(i + 1, i + 1));
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x33,-0x8(%rbp)
je     1176 <main+0x56>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
add    $0x1,%edi
mov    -0x8(%rbp),%esi
add    $0x1,%esi
call   1040 <rightTri@plt>
mov    -0xc(%rbp),%esi
mov    %eax,%edx
lea    0xe9d(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1136 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r14
push   %rbx
mov    $0x2,%ebx
lea    0xed0(%rip),%r14
lea    -0x1(%rbx),%ebp
mov    %ebx,%edi
mov    %ebx,%esi
call   1040 <rightTri@plt>
mov    %r14,%rdi
mov    %ebp,%esi
mov    %eax,%edx
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x34,%ebx
jne    1130 <main+0x10>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [8 x i8] c"%d %zu\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
br label %3
3: ; preds = %14, %0
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 51
br i1 %5, label %6, label %17
6: ; preds = %3
%7 = load i32, i32* %2
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
%12 = call i32 @rightTri(i32 %9, i32 %11)
%13 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %12)
br label %14
14: ; preds = %6
%15 = load i32, i32* %2
%16 = add nsw i32 %15, 1
store i32 %16, i32* %2
br label %3
17: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"%d %zu\0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 1, %0 ], [ %3, %1 ]
%3 = add nuw nsw i32 %2, 1
%4 = tail call i32 @rightTri(i32 %3, i32 %3)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %4)
%6 = icmp eq i32 %3, 51
br i1 %6, label %7, label %1
7: ; preds = %1
ret i32 0
}
void numlock_toggle() {}


x86 assembly (clang, -O0):
<numlock_toggle>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<numlock_toggle>:
ret

LLVM IR (-O0):
define void @numlock_toggle() {
ret void
}

LLVM IR (-O2):
define void @numlock_toggle() {
ret void
}
void foo(int A, int B) {}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
void foo(char *s) {
  strcpy(s, "1234567890abcdef123456abcdef5678123456abcdef567abcdef678"
            "1234567");
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
lea    0xee9(%rip),%rsi
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
@.str = [64 x i8] c"1234567890abcdef123456abcdef5678123456abcdef567abcdef6781234567\00"
define void @foo(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strcpy(i8* %3, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [64 x i8] c"1234567890abcdef123456abcdef5678123456abcdef567abcdef6781234567\00"
define void @foo(i8* %0) {
%2 = tail call i32 @strcpy(i8* %0, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int descnonblock(int);
int udpnonblock(int sock) { return descnonblock(sock); }


x86 assembly (clang, -O0):
<udpnonblock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <descnonblock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<udpnonblock>:
jmp    1030 <descnonblock@plt>

LLVM IR (-O0):
define i32 @udpnonblock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @descnonblock(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @udpnonblock(i32 %0) {
%2 = tail call i32 @descnonblock(i32 %0)
ret i32 %2
}