xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void delete_assignment_type_cast(char *type_cast) { free(type_cast); }


x86 assembly (clang, -O0):
<delete_assignment_type_cast>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delete_assignment_type_cast>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @delete_assignment_type_cast(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @delete_assignment_type_cast(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Type definitions */
struct kxTok {
  int dummy;
};

/* Variables and functions */
struct kxTok *kxTokenizeFancy(char *, int, int /*<<< orphan*/,
                              int /*<<< orphan*/);
struct kxTok *kxTokenize(char *text, int wildAst) {
  return kxTokenizeFancy(text, wildAst, 0, 0);
}


x86 assembly (clang, -O0):
<kxTokenize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %ecx,%ecx
mov    %ecx,%edx
call   1030 <kxTokenizeFancy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kxTokenize>:
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <kxTokenizeFancy@plt>

LLVM IR (-O0):
%struct.kxTok = type { i32 }
define %struct.kxTok* @kxTokenize(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call %struct.kxTok* @kxTokenizeFancy(i8* %5, i32 %6, i32 0, i32 0)
ret %struct.kxTok* %7
}

LLVM IR (-O2):
%struct.kxTok = type { i32 }
define %struct.kxTok* @kxTokenize(i8* %0, i32 %1) {
%3 = tail call %struct.kxTok* @kxTokenizeFancy(i8* %0, i32 %1, i32 0, i32 0)
ret %struct.kxTok* %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0xf1() {
  Assert_real((isalnum(241) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              1210, ("isalnum should be 0 for 0xf1"));
}


x86 assembly (clang, -O0):
<t_isalnum_0xf1>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf1,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4ba,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0xf1>:
push   %rax
mov    $0xf1,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4ba,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xf1\00"
define void @t_isalnum_0xf1() {
%1 = call i64 @isalnum(i32 241)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1210, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xf1\00"
define void @t_isalnum_0xf1() {
%1 = tail call i64 @isalnum(i32 241)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1210, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int __attribute__((const)) my_cos(unsigned char i) {
  return (i * 39 + 61) % 245 > 122;
}


x86 assembly (clang, -O0):
<my_cos>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
imul   $0x27,%eax,%eax
add    $0x3d,%eax
mov    $0xf5,%ecx
cltd
idiv   %ecx
cmp    $0x7a,%edx
setg   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_cos>:
imul   $0x27,%edi,%ecx
add    $0x3d,%ecx
imul   $0xb7f,%ecx,%eax
shr    $0x10,%eax
mov    %ecx,%edx
sub    %eax,%edx
movzwl %dx,%edx
shr    %edx
add    %eax,%edx
shr    $0x7,%edx
imul   $0xf5,%edx,%eax
sub    %eax,%ecx
xor    %eax,%eax
cmp    $0x7b,%cx
setae  %al
ret

LLVM IR (-O0):
define i32 @my_cos(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = mul nsw i32 %4, 39
%6 = add nsw i32 %5, 61
%7 = srem i32 %6, 245
%8 = icmp sgt i32 %7, 122
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @my_cos(i8 zeroext %0) {
%2 = zext i8 %0 to i16
%3 = mul nuw nsw i16 %2, 39
%4 = add nuw nsw i16 %3, 61
%5 = urem i16 %4, 245
%6 = icmp ugt i16 %5, 122
%7 = zext i1 %6 to i32
ret i32 %7
}
void BSP_PrefetchBufferInvalid(void) {
  unsigned long tmp;
  tmp = 0x1;
  ({
    unsigned long __v = tmp;
    (*(volatile unsigned long *)(0x08000300) = (__v));
    __v;
  });
}


x86 assembly (clang, -O0):
<BSP_PrefetchBufferInvalid>:
push   %rbp
mov    %rsp,%rbp
movq   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    $0x8000300,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<BSP_PrefetchBufferInvalid>:
movq   $0x1,0x8000300
ret

LLVM IR (-O0):
define void @BSP_PrefetchBufferInvalid() {
%1 = alloca i64
%2 = alloca i64
%3 = alloca i64
store i64 1, i64* %1
%4 = load i64, i64* %1
store i64 %4, i64* %2
%5 = load i64, i64* %2
store volatile i64 %5, i64* inttoptr (i64 134218496 to i64*)
%6 = load i64, i64* %2
store i64 %6, i64* %3
%7 = load i64, i64* %3
ret void
}

LLVM IR (-O2):
define void @BSP_PrefetchBufferInvalid() {
store volatile i64 1, i64* inttoptr (i64 134218496 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_options() {
  printf("You can set different options for the cmidid device:\n"
         "[1] Calibrate last hit as minimal key velocity\n"
         "[2] Calibrate last hit as maximal key velocity\n"
         "[3] Set velocity curve to linear\n"
         "[4] Set velocity curve to concave\n"
         "[5] Set velocity curve to convex\n"
         "[6] Set velocity curve to saturated\n"
         "[7] Transpose\nOption:");
}


x86 assembly (clang, -O0):
<print_options>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_options>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [305 x i8] c"You can set different options for the cmidid device:\0A[1] Calibrate last hit as minimal key velocity\0A[2] Calibrate last hit as maximal key velocity\0A[3] Set velocity curve to linear\0A[4] Set velocity curve to concave\0A[5] Set velocity curve to convex\0A[6] Set velocity curve to saturated\0A[7] Transpose\0AOption:\00"
define void @print_options() {
%1 = call i32 @printf(i8* getelementptr inbounds ([305 x i8], [305 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [305 x i8] c"You can set different options for the cmidid device:\0A[1] Calibrate last hit as minimal key velocity\0A[2] Calibrate last hit as maximal key velocity\0A[3] Set velocity curve to linear\0A[4] Set velocity curve to concave\0A[5] Set velocity curve to convex\0A[6] Set velocity curve to saturated\0A[7] Transpose\0AOption:\00"
define void @print_options() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([305 x i8], [305 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int is_prime(int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
void main() {
  int a, rez;
  scanf("%d", &a);
  rez = is_prime(a);
  printf("%d", rez);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x4(%rbp),%edi
call   1040 <is_prime@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xea3(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xec4(%rip),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1050 <scanf@plt>
mov    0xc(%rsp),%edi
call   1040 <is_prime@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @main() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @is_prime(i32 %4)
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @is_prime(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %5)
ret void
}
char *strcpy(char *dest, const char *src) {
  unsigned int i = 0;
  while ((dest[i] = src[i]) != '\0') {
    i++;
  }
  return dest;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
mov    (%rax,%rcx,1),%al
mov    -0x8(%rbp),%rcx
mov    -0x14(%rbp),%edx
mov    %al,(%rcx,%rdx,1)
movsbl %al,%eax
cmp    $0x0,%eax
je     1141 <strcpy+0x41>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <strcpy+0x13>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
mov    %ecx,%edx
movzbl (%rsi,%rdx,1),%edi
mov    %dil,(%rax,%rdx,1)
add    $0x1,%ecx
test   %dil,%dil
jne    1110 <strcpy+0x10>
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = zext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = load i8*, i8** %3
%13 = load i32, i32* %5
%14 = zext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
store i8 %11, i8* %15
%16 = sext i8 %11 to i32
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %21
18: ; preds = %6
%19 = load i32, i32* %5
%20 = add i32 %19, 1
store i32 %20, i32* %5
br label %6
21: ; preds = %6
%22 = load i8*, i8** %3
ret i8* %22
}

LLVM IR (-O2):
define i8* @strcpy(i8* returned writeonly %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ 0, %2 ], [ %10, %3 ]
%5 = zext i32 %4 to i64
%6 = getelementptr inbounds i8, i8* %1, i64 %5
%7 = load i8, i8* %6
%8 = getelementptr inbounds i8, i8* %0, i64 %5
store i8 %7, i8* %8
%9 = icmp eq i8 %7, 0
%10 = add i32 %4, 1
br i1 %9, label %11, label %3
11: ; preds = %3
ret i8* %0
}
/* Variables and functions */
bool size_t_will_overflow_mult(size_t a, size_t b) { return a * b < a; }


x86 assembly (clang, -O0):
<size_t_will_overflow_mult>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
imul   -0x10(%rbp),%rax
cmp    -0x8(%rbp),%rax
setb   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<size_t_will_overflow_mult>:
imul   %rdi,%rsi
xor    %eax,%eax
cmp    %rdi,%rsi
setb   %al
ret

LLVM IR (-O0):
define i32 @size_t_will_overflow_mult(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = mul i64 %5, %6
%8 = load i64, i64* %3
%9 = icmp ult i64 %7, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @size_t_will_overflow_mult(i64 %0, i64 %1) {
%3 = mul i64 %1, %0
%4 = icmp ult i64 %3, %0
%5 = zext i1 %4 to i32
ret i32 %5
}
int ui_init_vendorcmds(void) { return 0; }


x86 assembly (clang, -O0):
<ui_init_vendorcmds>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ui_init_vendorcmds>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ui_init_vendorcmds() {
ret i32 0
}

LLVM IR (-O2):
define i32 @ui_init_vendorcmds() {
ret i32 0
}
void fs_scandir(char *dir, char *name) {}


x86 assembly (clang, -O0):
<fs_scandir>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fs_scandir>:
ret

LLVM IR (-O0):
define void @fs_scandir(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @fs_scandir(i8* nocapture %0, i8* nocapture %1) {
ret void
}
int test_imm_A1uint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0xA1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A1uint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0xa1,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A1uint64_midword_mem>:
testb  $0xa1,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A1uint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 161
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_A1uint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 10551296
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void fb_hBlit_code_end(void) {}


x86 assembly (clang, -O0):
<fb_hBlit_code_end>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb_hBlit_code_end>:
ret

LLVM IR (-O0):
define void @fb_hBlit_code_end() {
ret void
}

LLVM IR (-O2):
define void @fb_hBlit_code_end() {
ret void
}
void outsb(unsigned short port, const void *addr, unsigned long count) {
  __asm__ __volatile__("rep ; outs"
                       "b"
                       : "=S"(addr), "=c"(count)
                       : "d"(port), "0"(addr), "1"(count));
}


x86 assembly (clang, -O0):
<outsb>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x2(%rbp),%dx
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
rep outsb %ds:(%rsi),(%dx)
mov    %rsi,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outsb>:
mov    %rdx,%rcx
mov    %edi,%edx
rep outsb %ds:(%rsi),(%dx)
ret

LLVM IR (-O0):
define void @outsb(i16 zeroext %0, i8* %1, i64 %2) {
%4 = alloca i16
%5 = alloca i8*
%6 = alloca i64
store i16 %0, i16* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i16, i16* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call { i8*, i64 } asm sideeffect "rep ; outsb", "={si},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i16 %7, i8* %8, i64 %9)
%11 = extractvalue { i8*, i64 } %10, 0
%12 = extractvalue { i8*, i64 } %10, 1
store i8* %11, i8** %5
store i64 %12, i64* %6
ret void
}

LLVM IR (-O2):
define void @outsb(i16 zeroext %0, i8* %1, i64 %2) {
%4 = tail call { i8*, i64 } asm sideeffect "rep ; outsb", "={si},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i16 %0, i8* %1, i64 %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ OCSP_SINGLERESP;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
int /*<<< orphan*/ ASN1_item_free(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ OCSP_SINGLERESP_it;
void OCSP_SINGLERESP_free(OCSP_SINGLERESP *a) {
  ASN1_item_free((ASN1_VALUE *)a, &OCSP_SINGLERESP_it);
}


x86 assembly (clang, -O0):
<OCSP_SINGLERESP_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rsi
call   1030 <ASN1_item_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OCSP_SINGLERESP_free>:
mov    0x2ec9(%rip),%rsi
jmp    1030 <ASN1_item_free@plt>

LLVM IR (-O0):
@OCSP_SINGLERESP_it = global i32 0
define void @OCSP_SINGLERESP_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @ASN1_item_free(i32* %3, i32* @OCSP_SINGLERESP_it)
ret void
}

LLVM IR (-O2):
@OCSP_SINGLERESP_it = global i32 0
define void @OCSP_SINGLERESP_free(i32* %0) {
%2 = tail call i32 @ASN1_item_free(i32* %0, i32* @OCSP_SINGLERESP_it)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ sprintf(char *, char *, char *);
int /*<<< orphan*/ system(char *);
void uv100() {
  printf("\nLowering CPU VDD Voltage by 100mV\n");
  char buf[256];
  sprintf(
      buf, "/system/bin/sh -c %s",
      "'echo -100000 > /sys/devices/system/cpu/cpufreq/vdd_table/vdd_levels'");
  system(buf);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x100,%rsp
lea    0xebe(%rip),%rdi
call   1040 <printf@plt>
lea    -0x100(%rbp),%rdi
lea    0xecf(%rip),%rsi
lea    0xedd(%rip),%rdx
call   1050 <sprintf@plt>
lea    -0x100(%rbp),%rdi
call   1030 <system@plt>
add    $0x100,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rbx
sub    $0x100,%rsp
lea    0xf1c(%rip),%rdi
call   1030 <puts@plt>
lea    0xeb5(%rip),%rsi
lea    0xec3(%rip),%rdx
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1050 <sprintf@plt>
mov    %rbx,%rdi
call   1040 <system@plt>
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [36 x i8] c"\0ALowering CPU VDD Voltage by 100mV\0A\00"
@.str.1 = [21 x i8] c"/system/bin/sh -c %s\00"
@.str.2 = [70 x i8] c"'echo -100000 > /sys/devices/system/cpu/cpufreq/vdd_table/vdd_levels'\00"
define void @uv100() {
%1 = alloca [256 x i8]
%2 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%3 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%4 = call i32 @sprintf(i8* %3, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([70 x i8], [70 x i8]* @.str.2, i64 0, i64 0))
%5 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%6 = call i32 @system(i8* %5)
ret void
}

LLVM IR (-O2):
@.str.1 = [21 x i8] c"/system/bin/sh -c %s\00"
@.str.2 = [70 x i8] c"'echo -100000 > /sys/devices/system/cpu/cpufreq/vdd_table/vdd_levels'\00"
@str = [35 x i8] c"\0ALowering CPU VDD Voltage by 100mV\00"
define void @uv100() {
%1 = alloca [256 x i8]
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
%3 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%4 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([70 x i8], [70 x i8]* @.str.2, i64 0, i64 0))
%5 = call i32 @system(i8* %3)
ret void
}
void foo007(int p) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @foo007(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo007(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_io_bit(int, int /*<<< orphan*/);
void TOSH_MAKE_YELLOW_LED_OUTPUT() { set_io_bit(0x36, 0); }


x86 assembly (clang, -O0):
<TOSH_MAKE_YELLOW_LED_OUTPUT>:
push   %rbp
mov    %rsp,%rbp
mov    $0x36,%edi
xor    %esi,%esi
call   1030 <set_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_MAKE_YELLOW_LED_OUTPUT>:
mov    $0x36,%edi
xor    %esi,%esi
jmp    1030 <set_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_MAKE_YELLOW_LED_OUTPUT() {
%1 = call i32 @set_io_bit(i32 54, i32 0)
ret void
}

LLVM IR (-O2):
define void @TOSH_MAKE_YELLOW_LED_OUTPUT() {
%1 = tail call i32 @set_io_bit(i32 54, i32 0)
ret void
}
int cl_dev_open(const void *cfg) { return 0; }


x86 assembly (clang, -O0):
<cl_dev_open>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cl_dev_open>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @cl_dev_open(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @cl_dev_open(i8* nocapture readnone %0) {
ret i32 0
}
void dpx_main() {}


x86 assembly (clang, -O0):
<dpx_main>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dpx_main>:
ret

LLVM IR (-O0):
define void @dpx_main() {
ret void
}

LLVM IR (-O2):
define void @dpx_main() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int main(void) {
  puts("SUCCESS: NHDP compiled!");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [24 x i8] c"SUCCESS: NHDP compiled!\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @puts(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [24 x i8] c"SUCCESS: NHDP compiled!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ CLOCK_REALTIME;
int /*<<< orphan*/ TFD_NONBLOCK;
int timerfd_create(int /*<<< orphan*/, int /*<<< orphan*/);
int libtimechange_makefd(void) {
  return timerfd_create(CLOCK_REALTIME, TFD_NONBLOCK);
}


x86 assembly (clang, -O0):
<libtimechange_makefd>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
mov    0x2eb4(%rip),%rax
mov    (%rax),%esi
call   1030 <timerfd_create@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<libtimechange_makefd>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
jmp    1030 <timerfd_create@plt>

LLVM IR (-O0):
@CLOCK_REALTIME = global i32 0
@TFD_NONBLOCK = global i32 0
define i32 @libtimechange_makefd() {
%1 = load i32, i32* @CLOCK_REALTIME
%2 = load i32, i32* @TFD_NONBLOCK
%3 = call i32 @timerfd_create(i32 %1, i32 %2)
ret i32 %3
}

LLVM IR (-O2):
@CLOCK_REALTIME = global i32 0
@TFD_NONBLOCK = global i32 0
define i32 @libtimechange_makefd() {
%1 = load i32, i32* @CLOCK_REALTIME
%2 = load i32, i32* @TFD_NONBLOCK
%3 = tail call i32 @timerfd_create(i32 %1, i32 %2)
ret i32 %3
}
signed short int signedshortint_ignoring_shortint(signed short int x,
                                                  short int y) {
  return x;
}


x86 assembly (clang, -O0):
<signedshortint_ignoring_shortint>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movswl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signedshortint_ignoring_shortint>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i16 @signedshortint_ignoring_shortint(i16 signext %0, i16 signext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
ret i16 %5
}

LLVM IR (-O2):
define signext i16 @signedshortint_ignoring_shortint(i16 returned signext %0, i16 signext %1) {
ret i16 %0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void sigcrash(int sig) { exit(sig); }


x86 assembly (clang, -O0):
<sigcrash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<sigcrash>:
push   %rax
call   1030 <exit@plt>

LLVM IR (-O0):
define void @sigcrash(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
define void @sigcrash(i32 %0) {
%2 = tail call i32 @exit(i32 %0)
unreachable
}
/* Variables and functions */
short USBSTK5515_LED_off(int /*<<< orphan*/);
short USBSTK5515_LED_init() { return USBSTK5515_LED_off(0); }


x86 assembly (clang, -O0):
<USBSTK5515_LED_init>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <USBSTK5515_LED_off@plt>
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBSTK5515_LED_init>:
xor    %edi,%edi
jmp    1030 <USBSTK5515_LED_off@plt>

LLVM IR (-O0):
define signext i16 @USBSTK5515_LED_init() {
%1 = call signext i16 @USBSTK5515_LED_off(i32 0)
ret i16 %1
}

LLVM IR (-O2):
define signext i16 @USBSTK5515_LED_init() {
%1 = tail call signext i16 @USBSTK5515_LED_off(i32 0)
ret i16 %1
}
float lerpf(float x, float y, float t) { return x * (1 - t) + y * t; }


x86 assembly (clang, -O0):
<lerpf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xee0(%rip),%xmm2
subss  -0xc(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<lerpf>:
movss  0xef8(%rip),%xmm3
subss  %xmm2,%xmm3
mulss  %xmm2,%xmm1
mulss  %xmm3,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @lerpf(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %6
%9 = fsub float 1.000000e+00, %8
%10 = load float, float* %5
%11 = load float, float* %6
%12 = fmul float %10, %11
%13 = call float @llvm.fmuladd.f32(float %7, float %9, float %12)
ret float %13
}

LLVM IR (-O2):
define float @lerpf(float %0, float %1, float %2) {
%4 = fsub float 1.000000e+00, %2
%5 = fmul float %1, %2
%6 = tail call float @llvm.fmuladd.f32(float %0, float %4, float %5)
ret float %6
}
int fn2(int x) { return (x & 1) + x; }


x86 assembly (clang, -O0):
<fn2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
add    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn2>:
mov    %edi,%eax
and    $0x1,%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @fn2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 1
%5 = load i32, i32* %2
%6 = add nsw i32 %4, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @fn2(i32 %0) {
%2 = and i32 %0, 1
%3 = add nsw i32 %2, %0
ret i32 %3
}
char g(void) {
  unsigned i = 0xffffffff;
  return i & 0xca;
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xca,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    $0xca,%al
ret

LLVM IR (-O0):
define signext i8 @g() {
%1 = alloca i32
store i32 -1, i32* %1
%2 = load i32, i32* %1
%3 = and i32 %2, 202
%4 = trunc i32 %3 to i8
ret i8 %4
}

LLVM IR (-O2):
define signext i8 @g() {
ret i8 -54
}
PosToLineNumber(Pos, N) long Pos;
long *N;
{ *N = GetLine(Pos); }


x86 assembly (clang, -O0):
<PosToLineNumber>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1030 <GetLine@plt>
movslq %eax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PosToLineNumber>:
push   %rbx
mov    %rsi,%rbx
xor    %eax,%eax
call   1030 <GetLine@plt>
cltq
mov    %rax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define i32 @PosToLineNumber(i64 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64*
store i64 %0, i64* %4
store i64* %1, i64** %5
%6 = load i64, i64* %4
%7 = call i32 (i64, ...) bitcast (i32 (...)* @GetLine to i32 (i64, ...)*)(i64 %6)
%8 = sext i32 %7 to i64
%9 = load i64*, i64** %5
store i64 %8, i64* %9
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @PosToLineNumber(i64 %0, i64* nocapture writeonly %1) {
%3 = tail call i32 (i64, ...) bitcast (i32 (...)* @GetLine to i32 (i64, ...)*)(i64 %0)
%4 = sext i32 %3 to i64
store i64 %4, i64* %1
ret i32 undef
}
/* Variables and functions */
char toupper(char);
char *toUpperS(char *str) {
  register char *s = str;
  while (*s = toupper(*s))
    ++s;
  return (str);
}


x86 assembly (clang, -O0):
<toUpperS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <toupper@plt>
mov    -0x10(%rbp),%rcx
mov    %al,(%rcx)
cmp    $0x0,%al
je     114f <toUpperS+0x3f>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1124 <toUpperS+0x14>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toUpperS>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    %rdi,%rbx
nopw   0x0(%rax,%rax,1)
movsbl (%rbx),%edi
call   1030 <toupper@plt>
mov    %al,(%rbx)
add    $0x1,%rbx
test   %al,%al
jne    1120 <toUpperS+0x10>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @toUpperS(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %11, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = call signext i8 @toupper(i8 signext %7)
%9 = load i8*, i8** %3
store i8 %8, i8* %9
%10 = icmp ne i8 %8, 0
br i1 %10, label %11, label %14
11: ; preds = %5
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %3
br label %5
14: ; preds = %5
%15 = load i8*, i8** %2
ret i8* %15
}

LLVM IR (-O2):
define i8* @toUpperS(i8* returned %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %7, %2 ]
%4 = load i8, i8* %3
%5 = tail call signext i8 @toupper(i8 signext %4)
store i8 %5, i8* %3
%6 = icmp eq i8 %5, 0
%7 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ getch();
int /*<<< orphan*/ skip_white();
void init(void) {
  getch();
  skip_white();
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getch@plt>
mov    $0x0,%al
call   1040 <skip_white@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
push   %rax
xor    %eax,%eax
call   1030 <getch@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <skip_white@plt>

LLVM IR (-O0):
define void @init() {
%1 = call i32 (...) @getch()
%2 = call i32 (...) @skip_white()
ret void
}

LLVM IR (-O2):
define void @init() {
%1 = tail call i32 (...) @getch()
%2 = tail call i32 (...) @skip_white()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ newline();
int /*<<< orphan*/ write(int, char *, int);
void puts(char *string) {
  while (*string) {
    write(0xfffffffe, string, 1);
    string++;
  }
  newline();
}


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     115d <puts+0x3d>
mov    -0x8(%rbp),%rsi
mov    $0xfffffffe,%edi
mov    $0x1,%edx
call   1040 <write@plt>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    112c <puts+0xc>
mov    $0x0,%al
call   1030 <newline@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
push   %rbx
cmpb   $0x0,(%rdi)
je     114c <puts+0x2c>
mov    %rdi,%rbx
nopl   0x0(%rax)
mov    $0xfffffffe,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1040 <write@plt>
cmpb   $0x0,0x1(%rbx)
lea    0x1(%rbx),%rbx
jne    1130 <puts+0x10>
xor    %eax,%eax
pop    %rbx
jmp    1030 <newline@plt>

LLVM IR (-O0):
define void @puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = call i32 @write(i32 -2, i8* %8, i32 1)
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %2
br label %3
12: ; preds = %3
%13 = call i32 (...) @newline()
ret void
}

LLVM IR (-O2):
define void @puts(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %10, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %7, %4 ], [ %0, %1 ]
%6 = tail call i32 @write(i32 -2, i8* %5, i32 1)
%7 = getelementptr inbounds i8, i8* %5, i64 1
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, 0
br i1 %9, label %10, label %4
10: ; preds = %4, %1
%11 = tail call i32 (...) @newline()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ waitmicrosec(int);
void waitmillisec(int n) { waitmicrosec(n * 1000); }


x86 assembly (clang, -O0):
<waitmillisec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%edi
call   1030 <waitmicrosec@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<waitmillisec>:
imul   $0x3e8,%edi,%edi
jmp    1030 <waitmicrosec@plt>

LLVM IR (-O0):
define void @waitmillisec(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 1000
%5 = call i32 @waitmicrosec(i32 %4)
ret void
}

LLVM IR (-O2):
define void @waitmillisec(i32 %0) {
%2 = mul nsw i32 %0, 1000
%3 = tail call i32 @waitmicrosec(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void quit(int argc, char *argv[]) { exit(0); }


x86 assembly (clang, -O0):
<quit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<quit>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @quit(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @quit(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
__attribute__((always_)) void B_BUF16(void *const buf, uint16_t const x) {
  *(uint16_t *)buf = x;
}


x86 assembly (clang, -O0):
<B_BUF16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<B_BUF16>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @B_BUF16(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
store i32 %5, i32* %7
ret void
}

LLVM IR (-O2):
define void @B_BUF16(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
void foo110(int p) {}


x86 assembly (clang, -O0):
<foo110>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo110>:
ret

LLVM IR (-O0):
define void @foo110(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo110(i32 %0) {
ret void
}
unsigned int hardware_concurrency() { return 0; }


x86 assembly (clang, -O0):
<hardware_concurrency>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hardware_concurrency>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hardware_concurrency() {
ret i32 0
}

LLVM IR (-O2):
define i32 @hardware_concurrency() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int sl_register_linux();
int /*<<< orphan*/ utc_security_main(int, char **);
int main(int argc, char *argv[]) {
  int res = sl_register_linux();
  if (res < 0) {
    printf("register driver fail\n");
    return -1;
  }
  utc_security_main(argc, argv);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <sl_register_linux@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jge    1172 <main+0x42>
lea    0xe9f(%rip),%rdi
call   1030 <printf@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1185 <main+0x55>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1050 <utc_security_main@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %edi,%ebp
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <sl_register_linux@plt>
test   %eax,%eax
js     1152 <main+0x22>
mov    %ebp,%edi
mov    %r14,%rsi
call   1050 <utc_security_main@plt>
jmp    1163 <main+0x33>
lea    0xea7(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%ebx
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [22 x i8] c"register driver fail\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 (...) @sl_register_linux()
store i32 %7, i32* %6
%8 = load i32, i32* %6
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %3
br label %16
12: ; preds = %2
%13 = load i32, i32* %4
%14 = load i8**, i8*** %5
%15 = call i32 @utc_security_main(i32 %13, i8** %14)
store i32 0, i32* %3
br label %16
16: ; preds = %12, %10
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
@str = [21 x i8] c"register driver fail\00"
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 (...) @sl_register_linux()
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
br label %9
7: ; preds = %2
%8 = tail call i32 @utc_security_main(i32 %0, i8** %1)
br label %9
9: ; preds = %7, %5
%10 = phi i32 [ -1, %5 ], [ 0, %7 ]
ret i32 %10
}
/* Variables and functions */
double erf(double);
double cnormdist(double x, double mean, double stdev) {
  return 0.5 + 0.5 * erf((x - mean) / stdev / 1.4142135623731);
}


x86 assembly (clang, -O0):
<cnormdist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
divsd  -0x18(%rbp),%xmm0
movsd  0xeca(%rip),%xmm1
divsd  %xmm1,%xmm0
call   1030 <erf@plt>
movsd  0xeb1(%rip),%xmm1
mulsd  %xmm1,%xmm0
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cnormdist>:
push   %rax
subsd  %xmm1,%xmm0
divsd  %xmm2,%xmm0
divsd  0xedf(%rip),%xmm0
call   1030 <erf@plt>
movsd  0xeda(%rip),%xmm1
mulsd  %xmm1,%xmm0
addsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @cnormdist(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = fsub double %7, %8
%10 = load double, double* %6
%11 = fdiv double %9, %10
%12 = fdiv double %11, 0x3FF6A09E667F3BE3
%13 = call double @erf(double %12)
%14 = call double @llvm.fmuladd.f64(double 5.000000e-01, double %13, double 5.000000e-01)
ret double %14
}

LLVM IR (-O2):
define double @cnormdist(double %0, double %1, double %2) {
%4 = fsub double %0, %1
%5 = fdiv double %4, %2
%6 = fdiv double %5, 0x3FF6A09E667F3BE3
%7 = tail call double @erf(double %6)
%8 = tail call double @llvm.fmuladd.f64(double %7, double 5.000000e-01, double 5.000000e-01)
ret double %8
}
int _kb_signal_alarm_pause(void) { return -1; }


x86 assembly (clang, -O0):
<_kb_signal_alarm_pause>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_kb_signal_alarm_pause>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @_kb_signal_alarm_pause() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @_kb_signal_alarm_pause() {
ret i32 -1
}
/* Variables and functions */
int rand();
void check(int x) {
  if (x < 0) {
    int n = 0;
    int m = rand();
    int p = m;
    if (m < 0) {
      m = m * m;
      m = m / p;
    }
    n = m + 1;
  ERROR:
    return;
  } else {
    x += 42;
  }
}


x86 assembly (clang, -O0):
<check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1168 <check+0x58>
movl   $0x0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    115a <check+0x4a>
mov    -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cltd
idivl  -0x10(%rbp)
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1171 <check+0x61>
mov    -0x4(%rbp),%eax
add    $0x2a,%eax
mov    %eax,-0x4(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check>:
test   %edi,%edi
js     1115 <check+0x5>
ret
xor    %eax,%eax
jmp    1030 <rand@plt>

LLVM IR (-O0):
define void @check(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %24
8: ; preds = %1
store i32 0, i32* %3
%9 = call i32 (...) @rand()
store i32 %9, i32* %4
%10 = load i32, i32* %4
store i32 %10, i32* %5
%11 = load i32, i32* %4
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %20
13: ; preds = %8
%14 = load i32, i32* %4
%15 = load i32, i32* %4
%16 = mul nsw i32 %14, %15
store i32 %16, i32* %4
%17 = load i32, i32* %4
%18 = load i32, i32* %5
%19 = sdiv i32 %17, %18
store i32 %19, i32* %4
br label %20
20: ; preds = %13, %8
%21 = load i32, i32* %4
%22 = add nsw i32 %21, 1
store i32 %22, i32* %3
br label %23
23: ; preds = %20
br label %27
24: ; preds = %1
%25 = load i32, i32* %2
%26 = add nsw i32 %25, 42
store i32 %26, i32* %2
br label %27
27: ; preds = %23, %24
ret void
}

LLVM IR (-O2):
define void @check(i32 %0) {
%2 = icmp slt i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @rand()
br label %5
5: ; preds = %1, %3
ret void
}
void BN_uadd(void) {}


x86 assembly (clang, -O0):
<BN_uadd>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_uadd>:
ret

LLVM IR (-O0):
define void @BN_uadd() {
ret void
}

LLVM IR (-O2):
define void @BN_uadd() {
ret void
}
void copy_double(void *elem1, void *elem2) {
  *((long double *)elem2) = *((long double *)elem1);
}


x86 assembly (clang, -O0):
<copy_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
fldt   (%rax)
mov    -0x10(%rbp),%rax
fstpt  (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_double>:
fldt   (%rdi)
fstpt  (%rsi)
ret

LLVM IR (-O0):
define void @copy_double(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to x86_fp80*
%7 = load x86_fp80, x86_fp80* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to x86_fp80*
store x86_fp80 %7, x86_fp80* %9
ret void
}

LLVM IR (-O2):
define void @copy_double(i8* nocapture %0, i8* nocapture writeonly %1) {
%3 = bitcast i8* %0 to x86_fp80*
%4 = load x86_fp80, x86_fp80* %3
%5 = bitcast i8* %1 to x86_fp80*
store x86_fp80 %4, x86_fp80* %5
ret void
}
int test_imm_A5uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0xA5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A5uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0xa5,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A5uint64_midword_reg>:
test   $0xa50000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A5uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 165
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A5uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 10813440
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_log_target_new() {
  printf("NOT IMPLEMENTED:"
         "pa_log_target_new"
         "\n");
}


x86 assembly (clang, -O0):
<pa_log_target_new>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_log_target_new>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"NOT IMPLEMENTED:pa_log_target_new\0A\00"
define i32 @pa_log_target_new() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [34 x i8] c"NOT IMPLEMENTED:pa_log_target_new\00"
define i32 @pa_log_target_new() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
char *sha256base64(bitstr, bitcnt)
unsigned char *bitstr;
unsigned long bitcnt;
{ return ((char *)shacomp(256, 3, bitstr, bitcnt)); }


x86 assembly (clang, -O0):
<sha256base64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    $0x100,%edi
mov    $0x3,%esi
mov    $0x0,%al
call   1030 <shacomp@plt>
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sha256base64>:
push   %rax
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    $0x100,%edi
mov    $0x3,%esi
xor    %eax,%eax
call   1030 <shacomp@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i8* @sha256base64(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 (i32, i32, i8*, i64, ...) bitcast (i32 (...)* @shacomp to i32 (i32, i32, i8*, i64, ...)*)(i32 256, i32 3, i8* %5, i64 %6)
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i8*
ret i8* %9
}

LLVM IR (-O2):
define i8* @sha256base64(i8* %0, i64 %1) {
%3 = tail call i32 (i32, i32, i8*, i64, ...) bitcast (i32 (...)* @shacomp to i32 (i32, i32, i8*, i64, ...)*)(i32 256, i32 3, i8* %0, i64 %1)
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}
float __fdividef(float x, float y) { return x / y; }


x86 assembly (clang, -O0):
<__fdividef>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
divss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<__fdividef>:
divss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @__fdividef(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fdiv float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @__fdividef(float %0, float %1) {
%3 = fdiv float %0, %1
ret float %3
}