xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ IF_netGetVal(char);
void IF_netDt(void) { IF_netGetVal('G'); }


x86 assembly (clang, -O0):
<IF_netDt>:
push   %rbp
mov    %rsp,%rbp
mov    $0x47,%edi
call   1030 <IF_netGetVal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<IF_netDt>:
mov    $0x47,%edi
jmp    1030 <IF_netGetVal@plt>

LLVM IR (-O0):
define void @IF_netDt() {
%1 = call i32 @IF_netGetVal(i8 signext 71)
ret void
}

LLVM IR (-O2):
define void @IF_netDt() {
%1 = tail call i32 @IF_netGetVal(i8 signext 71)
ret void
}
long test_long_8(long a, long b, long c, long d, long e, long f, long g,
                 long h) {
  return 0;
}


x86 assembly (clang, -O0):
<test_long_8>:
push   %rbp
mov    %rsp,%rbp
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_long_8>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @test_long_8(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5, i64 %6, i64 %7) {
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
%12 = alloca i64
%13 = alloca i64
%14 = alloca i64
%15 = alloca i64
%16 = alloca i64
store i64 %0, i64* %9
store i64 %1, i64* %10
store i64 %2, i64* %11
store i64 %3, i64* %12
store i64 %4, i64* %13
store i64 %5, i64* %14
store i64 %6, i64* %15
store i64 %7, i64* %16
ret i64 0
}

LLVM IR (-O2):
define i64 @test_long_8(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5, i64 %6, i64 %7) {
ret i64 0
}
/* Variables and functions */
int /*<<< orphan*/ fatal(char *);
rd_fatal() { fatal("read error"); }


x86 assembly (clang, -O0):
<rd_fatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <fatal@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rd_fatal>:
lea    0xee9(%rip),%rdi
jmp    1030 <fatal@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"read error\00"
define i32 @rd_fatal() {
%1 = alloca i32
%2 = call i32 @fatal(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [11 x i8] c"read error\00"
define i32 @rd_fatal() {
%1 = tail call i32 @fatal(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
int nor(int a, int b) { return not(or (a, b)); }


x86 assembly (clang, -O0):
<nor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x0,%al
call   1040 <or@plt>
mov    %eax,%edi
mov    $0x0,%al
call   1030 <not@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nor>:
push   %rax
xor    %eax,%eax
call   1040 <or@plt>
mov    %eax,%edi
xor    %eax,%eax
pop    %rcx
jmp    1030 <not@plt>

LLVM IR (-O0):
define i32 @nor(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 (i32, i32, ...) bitcast (i32 (...)* @or to i32 (i32, i32, ...)*)(i32 %5, i32 %6)
%8 = call i32 (i32, ...) bitcast (i32 (...)* @not to i32 (i32, ...)*)(i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @nor(i32 %0, i32 %1) {
%3 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @or to i32 (i32, i32, ...)*)(i32 %0, i32 %1)
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @not to i32 (i32, ...)*)(i32 %3)
ret i32 %4
}
void mock_cache_fini(struct da_cloud_cache_cfg *cfg) { (void)cfg; }


x86 assembly (clang, -O0):
<mock_cache_fini>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mock_cache_fini>:
ret

LLVM IR (-O0):
%struct.da_cloud_cache_cfg = type opaque
define void @mock_cache_fini(%struct.da_cloud_cache_cfg* %0) {
%2 = alloca %struct.da_cloud_cache_cfg*
store %struct.da_cloud_cache_cfg* %0, %struct.da_cloud_cache_cfg** %2
%3 = load %struct.da_cloud_cache_cfg*, %struct.da_cloud_cache_cfg** %2
ret void
}

LLVM IR (-O2):
%struct.da_cloud_cache_cfg = type opaque
define void @mock_cache_fini(%struct.da_cloud_cache_cfg* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ leaky(int, int);
int main(void) {
  leaky(0x10, 0);
  leaky(0x10, 1);
  leaky(0x100, 0);
  leaky(0x100, 1);
  leaky(0x1000, 0);
  leaky(0x1000, 1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x10,%edi
xor    %esi,%esi
call   1030 <leaky@plt>
mov    $0x10,%edi
mov    $0x1,%esi
call   1030 <leaky@plt>
mov    $0x100,%edi
xor    %esi,%esi
call   1030 <leaky@plt>
mov    $0x100,%edi
mov    $0x1,%esi
call   1030 <leaky@plt>
mov    $0x1000,%edi
xor    %esi,%esi
call   1030 <leaky@plt>
mov    $0x1000,%edi
mov    $0x1,%esi
call   1030 <leaky@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x10,%edi
xor    %esi,%esi
call   1030 <leaky@plt>
mov    $0x10,%edi
mov    $0x1,%esi
call   1030 <leaky@plt>
mov    $0x100,%edi
xor    %esi,%esi
call   1030 <leaky@plt>
mov    $0x100,%edi
mov    $0x1,%esi
call   1030 <leaky@plt>
mov    $0x1000,%edi
xor    %esi,%esi
call   1030 <leaky@plt>
mov    $0x1000,%edi
mov    $0x1,%esi
call   1030 <leaky@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @leaky(i32 16, i32 0)
%2 = call i32 @leaky(i32 16, i32 1)
%3 = call i32 @leaky(i32 256, i32 0)
%4 = call i32 @leaky(i32 256, i32 1)
%5 = call i32 @leaky(i32 4096, i32 0)
%6 = call i32 @leaky(i32 4096, i32 1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @leaky(i32 16, i32 0)
%2 = tail call i32 @leaky(i32 16, i32 1)
%3 = tail call i32 @leaky(i32 256, i32 0)
%4 = tail call i32 @leaky(i32 256, i32 1)
%5 = tail call i32 @leaky(i32 4096, i32 0)
%6 = tail call i32 @leaky(i32 4096, i32 1)
ret i32 0
}
int dummy_filter(const struct simple_track *track) { return 1; }


x86 assembly (clang, -O0):
<dummy_filter>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy_filter>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.simple_track = type opaque
define i32 @dummy_filter(%struct.simple_track* %0) {
%2 = alloca %struct.simple_track*
store %struct.simple_track* %0, %struct.simple_track** %2
ret i32 1
}

LLVM IR (-O2):
%struct.simple_track = type opaque
define i32 @dummy_filter(%struct.simple_track* nocapture readnone %0) {
ret i32 1
}
/* Type definitions */
typedef int /*<<< orphan*/ dev_t;

/* Variables and functions */
unsigned int kdev_major(unsigned int);
unsigned int kdev_minor(unsigned int);
int /*<<< orphan*/ makedev(unsigned int, unsigned int);
dev_t kdev_to_odev(unsigned int kdev) {
  unsigned major = kdev_major(kdev);
  unsigned minor = kdev_minor(kdev);
  return makedev(major, minor);
}


x86 assembly (clang, -O0):
<kdev_to_odev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <kdev_major@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <kdev_minor@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1050 <makedev@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kdev_to_odev>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
call   1040 <kdev_major@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1030 <kdev_minor@plt>
mov    %ebp,%edi
mov    %eax,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <makedev@plt>

LLVM IR (-O0):
define i32 @kdev_to_odev(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @kdev_major(i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = call i32 @kdev_minor(i32 %7)
store i32 %8, i32* %4
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = call i32 @makedev(i32 %9, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @kdev_to_odev(i32 %0) {
%2 = tail call i32 @kdev_major(i32 %0)
%3 = tail call i32 @kdev_minor(i32 %0)
%4 = tail call i32 @makedev(i32 %2, i32 %3)
ret i32 %4
}
/* Variables and functions */
int abs(int);
int sgn(int);
int square(int);
int curve(int n) {
  int outputPower = (square(n)) / 127;
  int minPower = 20;
  if (abs(n) > 3 && abs(outputPower) <= minPower) {
    return sgn(n) * minPower;
  } else {
    return outputPower;
  }
}


x86 assembly (clang, -O0):
<curve>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <square@plt>
mov    $0x7f,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
movl   $0x14,-0x10(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <abs@plt>
cmp    $0x3,%eax
jle    118b <curve+0x5b>
mov    -0xc(%rbp),%edi
call   1030 <abs@plt>
cmp    -0x10(%rbp),%eax
jg     118b <curve+0x5b>
mov    -0x8(%rbp),%edi
call   1050 <sgn@plt>
imul   -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1191 <curve+0x61>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<curve>:
push   %rbx
mov    %edi,%ebx
call   1030 <square@plt>
cltq
imul   $0xffffffff81020409,%rax,%rcx
shr    $0x20,%rcx
add    %ecx,%eax
mov    %eax,%ecx
shr    $0x1f,%ecx
sar    $0x6,%eax
add    %ecx,%eax
mov    %ebx,%edx
neg    %edx
cmovs  %ebx,%edx
mov    %eax,%ecx
neg    %ecx
cmovs  %eax,%ecx
cmp    $0x4,%edx
jb     1166 <curve+0x46>
cmp    $0x14,%ecx
ja     1166 <curve+0x46>
mov    %ebx,%edi
call   1040 <sgn@plt>
shl    $0x2,%eax
lea    (%rax,%rax,4),%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @curve(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @square(i32 %6)
%8 = sdiv i32 %7, 127
store i32 %8, i32* %4
store i32 20, i32* %5
%9 = load i32, i32* %3
%10 = call i32 @abs(i32 %9)
%11 = icmp sgt i32 %10, 3
br i1 %11, label %12, label %22
12: ; preds = %1
%13 = load i32, i32* %4
%14 = call i32 @abs(i32 %13)
%15 = load i32, i32* %5
%16 = icmp sle i32 %14, %15
br i1 %16, label %17, label %22
17: ; preds = %12
%18 = load i32, i32* %3
%19 = call i32 @sgn(i32 %18)
%20 = load i32, i32* %5
%21 = mul nsw i32 %19, %20
store i32 %21, i32* %2
br label %24
22: ; preds = %12, %1
%23 = load i32, i32* %4
store i32 %23, i32* %2
br label %24
24: ; preds = %22, %17
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @curve(i32 %0) {
%2 = tail call i32 @square(i32 %0)
%3 = sdiv i32 %2, 127
%4 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
%5 = icmp ugt i32 %4, 3
%6 = tail call i32 @llvm.abs.i32(i32 %3, i1 true)
%7 = icmp ult i32 %6, 21
%8 = select i1 %5, i1 %7, i1 false
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = tail call i32 @sgn(i32 %0)
%11 = mul nsw i32 %10, 20
br label %12
12: ; preds = %1, %9
%13 = phi i32 [ %11, %9 ], [ %3, %1 ]
ret i32 %13
}
int f(long long a, long long b, int c) {
  int d = a == b;
  return d + c;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
add    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @f(i64 %0, i64 %1, i32 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i32
%7 = alloca i32
store i64 %0, i64* %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%8 = load i64, i64* %4
%9 = load i64, i64* %5
%10 = icmp eq i64 %8, %9
%11 = zext i1 %10 to i32
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = load i32, i32* %6
%14 = add nsw i32 %12, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @f(i64 %0, i64 %1, i32 %2) {
%4 = icmp eq i64 %0, %1
%5 = zext i1 %4 to i32
%6 = add nsw i32 %5, %2
ret i32 %6
}
int test_imm_B5uint32_reg(unsigned int val) {
  return ((val) & (0xB5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B5uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xb5,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B5uint32_reg>:
test   $0xb5,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B5uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 181
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_B5uint32_reg(i32 %0) {
%2 = and i32 %0, 181
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
signed long mod5(signed long x, signed long y) { return x % y; }


x86 assembly (clang, -O0):
<mod5>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cqto
idivq  -0x10(%rbp)
mov    %rdx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod5>:
mov    %rdi,%rax
mov    %rdi,%rcx
or     %rsi,%rcx
shr    $0x20,%rcx
je     1118 <mod5+0x18>
cqto
idiv   %rsi
mov    %rdx,%rax
ret
xor    %edx,%edx
div    %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i64 @mod5(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = srem i64 %5, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @mod5(i64 %0, i64 %1) {
%3 = srem i64 %0, %1
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ kprintc(char);
void kprint(char *str) {
  for (int i = 0; str[i] != 0; i++) {
    kprintc(str[i]);
  }
}


x86 assembly (clang, -O0):
<kprint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1157 <kprint+0x47>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <kprintc@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <kprint+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kprint>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <kprint+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <kprintc@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <kprint+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @kprint(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %19, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %22
12: ; preds = %4
%13 = load i8*, i8** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = call i32 @kprintc(i8 signext %17)
br label %19
19: ; preds = %12
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 1
store i32 %21, i32* %3
br label %4
22: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @kprint(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %5, %1
ret void
5: ; preds = %1, %5
%6 = phi i64 [ %9, %5 ], [ 0, %1 ]
%7 = phi i8 [ %11, %5 ], [ %2, %1 ]
%8 = tail call i32 @kprintc(i8 signext %7)
%9 = add nuw i64 %6, 1
%10 = getelementptr inbounds i8, i8* %0, i64 %9
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %4, label %5
}
void dummyvideo_ViStatusChanged(void) {}


x86 assembly (clang, -O0):
<dummyvideo_ViStatusChanged>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummyvideo_ViStatusChanged>:
ret

LLVM IR (-O0):
define void @dummyvideo_ViStatusChanged() {
ret void
}

LLVM IR (-O2):
define void @dummyvideo_ViStatusChanged() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void printLine(char c, int n) {
  while (n-- > 0) {
    printf("%c", c);
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<printLine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x8(%rbp)
cmp    $0x0,%eax
jle    114c <printLine+0x3c>
movsbl -0x1(%rbp),%esi
lea    0xec0(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
jmp    1121 <printLine+0x11>
lea    0xeb0(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printLine>:
push   %rbp
push   %rbx
push   %rax
test   %esi,%esi
jle    112f <printLine+0x1f>
mov    %esi,%ebx
movsbl %dil,%ebp
add    $0x1,%ebx
mov    %ebp,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebx
cmp    $0x1,%ebx
ja     1120 <printLine+0x10>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @printLine(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
br label %5
5: ; preds = %9, %2
%6 = load i32, i32* %4
%7 = add nsw i32 %6, -1
store i32 %7, i32* %4
%8 = icmp sgt i32 %6, 0
br i1 %8, label %9, label %13
9: ; preds = %5
%10 = load i8, i8* %3
%11 = sext i8 %10 to i32
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %11)
br label %5
13: ; preds = %5
%14 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
define void @printLine(i8 signext %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %11
4: ; preds = %2
%5 = sext i8 %0 to i32
br label %6
6: ; preds = %4, %6
%7 = phi i32 [ %1, %4 ], [ %8, %6 ]
%8 = add nsw i32 %7, -1
%9 = tail call i32 @putchar(i32 %5)
%10 = icmp ugt i32 %7, 1
br i1 %10, label %6, label %11
11: ; preds = %6, %2
%12 = tail call i32 @putchar(i32 10)
ret void
}
int translate(char nucl) {
  switch (nucl) {
  case 'A':
  case 'a':
    return 0;
  case 'C':
  case 'c':
    return 1;
  case 'G':
  case 'g':
    return 2;
  case 'T':
  case 't':
    return 3;
  case '\n':
  case '\t':
  case ' ':
  case '-':
    return -2;
  default:
    return -1;
  }
}


x86 assembly (clang, -O0):
<translate>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
add    $0xfffffff7,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x6b,%eax
ja     1170 <translate+0x70>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x0,-0x4(%rbp)
jmp    1177 <translate+0x77>
movl   $0x1,-0x4(%rbp)
jmp    1177 <translate+0x77>
movl   $0x2,-0x4(%rbp)
jmp    1177 <translate+0x77>
movl   $0x3,-0x4(%rbp)
jmp    1177 <translate+0x77>
movl   $0xfffffffe,-0x4(%rbp)
jmp    1177 <translate+0x77>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<translate>:
add    $0xfffffff7,%edi
cmp    $0x6b,%edi
ja     1132 <translate+0x32>
xor    %eax,%eax
lea    0xeef(%rip),%rcx
movslq (%rcx,%rdi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
mov    $0xfffffffe,%eax
ret
mov    $0x1,%eax
ret
mov    $0x2,%eax
ret
mov    $0x3,%eax
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @translate(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %11 [
i32 65, label %6
i32 97, label %6
i32 67, label %7
i32 99, label %7
i32 71, label %8
i32 103, label %8
i32 84, label %9
i32 116, label %9
i32 10, label %10
i32 9, label %10
i32 32, label %10
i32 45, label %10
]
6: ; preds = %1, %1
store i32 0, i32* %2
br label %12
7: ; preds = %1, %1
store i32 1, i32* %2
br label %12
8: ; preds = %1, %1
store i32 2, i32* %2
br label %12
9: ; preds = %1, %1
store i32 3, i32* %2
br label %12
10: ; preds = %1, %1, %1, %1
store i32 -2, i32* %2
br label %12
11: ; preds = %1
store i32 -1, i32* %2
br label %12
12: ; preds = %11, %10, %9, %8, %7, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @translate(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %7 [
i32 65, label %8
i32 97, label %8
i32 67, label %3
i32 99, label %3
i32 71, label %4
i32 103, label %4
i32 84, label %5
i32 116, label %5
i32 10, label %6
i32 9, label %6
i32 32, label %6
i32 45, label %6
]
3: ; preds = %1, %1
br label %8
4: ; preds = %1, %1
br label %8
5: ; preds = %1, %1
br label %8
6: ; preds = %1, %1, %1, %1
br label %8
7: ; preds = %1
br label %8
8: ; preds = %1, %1, %7, %6, %5, %4, %3
%9 = phi i32 [ -1, %7 ], [ -2, %6 ], [ 3, %5 ], [ 2, %4 ], [ 1, %3 ], [ 0, %1 ], [ 0, %1 ]
ret i32 %9
}
/* Variables and functions */
int i2cmaster_ReadN(int);
unsigned i2c1master_ReadN(void) { return i2cmaster_ReadN(1); }


x86 assembly (clang, -O0):
<i2c1master_ReadN>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <i2cmaster_ReadN@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c1master_ReadN>:
mov    $0x1,%edi
jmp    1030 <i2cmaster_ReadN@plt>

LLVM IR (-O0):
define i32 @i2c1master_ReadN() {
%1 = call i32 @i2cmaster_ReadN(i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @i2c1master_ReadN() {
%1 = tail call i32 @i2cmaster_ReadN(i32 1)
ret i32 %1
}
void ARGBMultiplyRow_Any_NEON() {}


x86 assembly (clang, -O0):
<ARGBMultiplyRow_Any_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBMultiplyRow_Any_NEON>:
ret

LLVM IR (-O0):
define void @ARGBMultiplyRow_Any_NEON() {
ret void
}

LLVM IR (-O2):
define void @ARGBMultiplyRow_Any_NEON() {
ret void
}
/* Type definitions */
typedef int volatile uint32_t;

/* Variables and functions */
void reg32_write_masked(volatile uint32_t *reg, uint32_t mask, uint32_t value) {
  *reg = (*reg & (~mask)) | (value & mask);
}


x86 assembly (clang, -O0):
<reg32_write_masked>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0xc(%rbp),%eax
xor    $0xffffffff,%eax
and    %eax,%ecx
mov    -0x10(%rbp),%eax
mov    -0xc(%rbp),%edx
and    %edx,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg32_write_masked>:
mov    %esi,-0x8(%rsp)
mov    %edx,-0x4(%rsp)
mov    (%rdi),%eax
mov    -0x8(%rsp),%ecx
not    %ecx
and    %eax,%ecx
mov    -0x4(%rsp),%eax
and    -0x8(%rsp),%eax
or     %ecx,%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @reg32_write_masked(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store volatile i32 %1, i32* %5
store volatile i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load volatile i32, i32* %7
%9 = load volatile i32, i32* %5
%10 = xor i32 %9, -1
%11 = and i32 %8, %10
%12 = load volatile i32, i32* %6
%13 = load volatile i32, i32* %5
%14 = and i32 %12, %13
%15 = or i32 %11, %14
%16 = load i32*, i32** %4
store volatile i32 %15, i32* %16
ret void
}

LLVM IR (-O2):
define void @reg32_write_masked(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
store volatile i32 %1, i32* %4
store volatile i32 %2, i32* %5
%6 = load volatile i32, i32* %0
%7 = load volatile i32, i32* %4
%8 = xor i32 %7, -1
%9 = and i32 %6, %8
%10 = load volatile i32, i32* %5
%11 = load volatile i32, i32* %4
%12 = and i32 %11, %10
%13 = or i32 %12, %9
store volatile i32 %13, i32* %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint;

/* Variables and functions */
void *malloc(int /*<<< orphan*/);
void *mmalloc(uint size) { return malloc(size); }


x86 assembly (clang, -O0):
<mmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmalloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @mmalloc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @malloc(i32 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @mmalloc(i32 %0) {
%2 = tail call i8* @malloc(i32 %0)
ret i8* %2
}
void efuse_debug_enable(int enable) { ; }


x86 assembly (clang, -O0):
<efuse_debug_enable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<efuse_debug_enable>:
ret

LLVM IR (-O0):
define void @efuse_debug_enable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @efuse_debug_enable(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ histogram(int);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int a;
  printf("Enter range: \n");
  do {
    scanf("%d", &a);
  } while (a < 0);
  histogram(a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
call   1040 <printf@plt>
lea    0xebd(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
cmpl   $0x0,-0x8(%rbp)
jl     114b <main+0x1b>
mov    -0x8(%rbp),%edi
call   1030 <histogram@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0xec8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeb9(%rip),%r14
lea    0x4(%rsp),%rbx
nopl   0x0(%rax)
mov    %r14,%rdi
mov    %rbx,%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
test   %edi,%edi
js     1150 <main+0x20>
call   1040 <histogram@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Enter range: \0A\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
br label %4
4: ; preds = %6, %0
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
br label %6
6: ; preds = %4
%7 = load i32, i32* %2
%8 = icmp slt i32 %7, 0
br i1 %8, label %4, label %9
9: ; preds = %6
%10 = load i32, i32* %2
%11 = call i32 @histogram(i32 %10)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"%d\00"
@str = [14 x i8] c"Enter range: \00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
br label %4
4: ; preds = %4, %0
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%6 = load i32, i32* %1
%7 = icmp slt i32 %6, 0
br i1 %7, label %4, label %8
8: ; preds = %4
%9 = call i32 @histogram(i32 %6)
ret i32 0
}
void DEC(char ch) {
  switch (ch) {
  case '3':
  case '4':
  case '5':
  case '6':
  case '8':
    break;
  }
}


x86 assembly (clang, -O0):
<DEC>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
mov    %eax,-0x8(%rbp)
add    $0xffffffcd,%eax
sub    $0x4,%eax
jb     1133 <DEC+0x33>
jmp    1122 <DEC+0x22>
mov    -0x8(%rbp),%eax
sub    $0x38,%eax
jne    1138 <DEC+0x38>
jmp    1133 <DEC+0x33>
jmp    1138 <DEC+0x38>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DEC>:
ret

LLVM IR (-O0):
define void @DEC(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
switch i32 %4, label %6 [
i32 51, label %5
i32 52, label %5
i32 53, label %5
i32 54, label %5
i32 56, label %5
]
5: ; preds = %1, %1, %1, %1, %1
br label %6
6: ; preds = %1, %5
ret void
}

LLVM IR (-O2):
define void @DEC(i8 signext %0) {
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
bool smpte_hbrmt_check_video_source_format(const uint8_t *p_hbrmt) {
  return !!(p_hbrmt[0] & 0x8);
}


x86 assembly (clang, -O0):
<smpte_hbrmt_check_video_source_format>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0x8,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<smpte_hbrmt_check_video_source_format>:
mov    (%rdi),%eax
shr    $0x3,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @smpte_hbrmt_check_video_source_format(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = and i32 %5, 8
%7 = icmp ne i32 %6, 0
%8 = xor i1 %7, true
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @smpte_hbrmt_check_video_source_format(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = lshr i32 %2, 3
%4 = and i32 %3, 1
ret i32 %4
}
int main(void) {
  'c' * 5.9;
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
/* Variables and functions */
scalar_t__ random();
unsigned char *crypt_rand(unsigned char *s, int len) {
  unsigned char *x = s;
  while (len-- > 0) {
    *x = (unsigned char)random();
    x++;
  }
  return s;
}


x86 assembly (clang, -O0):
<crypt_rand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
jle    115b <crypt_rand+0x4b>
mov    $0x0,%al
call   1030 <random@plt>
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1127 <crypt_rand+0x17>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crypt_rand>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
test   %esi,%esi
jle    1145 <crypt_rand+0x35>
mov    %esi,%ebp
add    $0x1,%ebp
mov    %r14,%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
xor    %eax,%eax
call   1030 <random@plt>
mov    %al,(%rbx)
add    $0x1,%rbx
add    $0xffffffff,%ebp
cmp    $0x1,%ebp
ja     1130 <crypt_rand+0x20>
mov    %r14,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @crypt_rand(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %11, %2
%8 = load i32, i32* %4
%9 = add nsw i32 %8, -1
store i32 %9, i32* %4
%10 = icmp sgt i32 %8, 0
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = call i64 (...) @random()
%13 = trunc i64 %12 to i8
%14 = load i8*, i8** %5
store i8 %13, i8* %14
%15 = load i8*, i8** %5
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %5
br label %7
17: ; preds = %7
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
define i8* @crypt_rand(i8* returned writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %12
4: ; preds = %2, %4
%5 = phi i8* [ %10, %4 ], [ %0, %2 ]
%6 = phi i32 [ %7, %4 ], [ %1, %2 ]
%7 = add nsw i32 %6, -1
%8 = tail call i64 (...) @random()
%9 = trunc i64 %8 to i8
store i8 %9, i8* %5
%10 = getelementptr inbounds i8, i8* %5, i64 1
%11 = icmp ugt i32 %6, 1
br i1 %11, label %4, label %12
12: ; preds = %4, %2
ret i8* %0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void LCDIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags) {
  ASSERT(ui32Base == 0x44050000);
  ASSERT(
      !(ui32IntFlags & ~(0x00000001 | 0x00000004 | 0x00000008 | 0x00000020 |
                         0x00000040 | 0x00000100 | 0x00000200 | 0x00000002)));
  (*((volatile uint32_t *)(ui32Base + 0x00000060))) = ui32IntFlags;
}


x86 assembly (clang, -O0):
<LCDIntEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x44050000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%eax
and    $0xfffffc90,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x60,%eax
cltq
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCDIntEnable>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
cmp    $0x44050000,%ebp
sete   %dil
call   1030 <ASSERT@plt>
xor    %edi,%edi
test   $0xfffffc90,%ebx
sete   %dil
call   1030 <ASSERT@plt>
movslq %ebp,%rax
mov    %ebx,0x60(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @LCDIntEnable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1141178368
%7 = zext i1 %6 to i32
%8 = call i32 @ASSERT(i32 %7)
%9 = load i32, i32* %4
%10 = and i32 %9, -880
%11 = icmp ne i32 %10, 0
%12 = xor i1 %11, true
%13 = zext i1 %12 to i32
%14 = call i32 @ASSERT(i32 %13)
%15 = load i32, i32* %4
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 96
%18 = sext i32 %17 to i64
%19 = inttoptr i64 %18 to i32*
store volatile i32 %15, i32* %19
ret void
}

LLVM IR (-O2):
define void @LCDIntEnable(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 1141178368
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = and i32 %1, -880
%7 = icmp eq i32 %6, 0
%8 = zext i1 %7 to i32
%9 = tail call i32 @ASSERT(i32 %8)
%10 = add nsw i32 %0, 96
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
store volatile i32 %1, i32* %12
ret void
}
/* Type definitions */
struct node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ getch();
int /*<<< orphan*/ printf(char *);
void MemChk(struct node *newp) {
  if (!newp) {
    printf("\nout of memory\n");
    printf("press any key to exit");
    getch();
    exit(1);
  } else {
    printf("\nmemory allocated successfully\n");
  }
}


x86 assembly (clang, -O0):
<MemChk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1170 <MemChk+0x40>
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <getch@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MemChk>:
test   %rdi,%rdi
je     1151 <MemChk+0x11>
lea    0xed9(%rip),%rdi
jmp    1030 <puts@plt>
push   %rax
lea    0xebd(%rip),%rdi
call   1030 <puts@plt>
lea    0xe9b(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
call   1050 <getch@plt>
mov    $0x1,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
%struct.node = type { i32 }
@.str = [16 x i8] c"\0Aout of memory\0A\00"
@.str.1 = [22 x i8] c"press any key to exit\00"
@.str.2 = [32 x i8] c"\0Amemory allocated successfully\0A\00"
define void @MemChk(%struct.node* %0) {
%2 = alloca %struct.node*
store %struct.node* %0, %struct.node** %2
%3 = load %struct.node*, %struct.node** %2
%4 = icmp ne %struct.node* %3, null
br i1 %4, label %10, label %5
5: ; preds = %1
%6 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0))
%8 = call i32 (...) @getch()
%9 = call i32 @exit(i32 1)
unreachable
10: ; preds = %1
%11 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.2, i64 0, i64 0))
br label %12
12: ; preds = %10
ret void
}

LLVM IR (-O2):
%struct.node = type { i32 }
@.str.1 = [22 x i8] c"press any key to exit\00"
@str = [15 x i8] c"\0Aout of memory\00"
@str.3 = [31 x i8] c"\0Amemory allocated successfully\00"
define void @MemChk(%struct.node* readnone %0) {
%2 = icmp eq %struct.node* %0, null
br i1 %2, label %3, label %8
3: ; preds = %1
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str, i64 0, i64 0))
%5 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0))
%6 = tail call i32 (...) @getch()
%7 = tail call i32 @exit(i32 1)
unreachable
8: ; preds = %1
%9 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str.3, i64 0, i64 0))
ret void
}
void __cxa_pure_virtual() {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<__cxa_pure_virtual>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <__cxa_pure_virtual+0x9>
jmp    1109 <__cxa_pure_virtual+0x9>

x86 assembly (clang, -O2):
<__cxa_pure_virtual>:
jmp    1100 <__cxa_pure_virtual>

LLVM IR (-O0):
define void @__cxa_pure_virtual() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @__cxa_pure_virtual() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ init_arrays();
int /*<<< orphan*/ release_arrays();
void nanocalc_addons_resetarrays() {
  release_arrays();
  init_arrays();
}


x86 assembly (clang, -O0):
<nanocalc_addons_resetarrays>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <release_arrays@plt>
mov    $0x0,%al
call   1030 <init_arrays@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nanocalc_addons_resetarrays>:
push   %rax
xor    %eax,%eax
call   1040 <release_arrays@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <init_arrays@plt>

LLVM IR (-O0):
define void @nanocalc_addons_resetarrays() {
%1 = call i32 (...) @release_arrays()
%2 = call i32 (...) @init_arrays()
ret void
}

LLVM IR (-O2):
define void @nanocalc_addons_resetarrays() {
%1 = tail call i32 (...) @release_arrays()
%2 = tail call i32 (...) @init_arrays()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ephDegToRad(double);
double tan(int /*<<< orphan*/);
double ephTan(double theta) { return tan(ephDegToRad(theta)); }


x86 assembly (clang, -O0):
<ephTan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <ephDegToRad@plt>
mov    %eax,%edi
call   1040 <tan@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ephTan>:
push   %rax
call   1030 <ephDegToRad@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <tan@plt>

LLVM IR (-O0):
define double @ephTan(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @ephDegToRad(double %3)
%5 = call double @tan(i32 %4)
ret double %5
}

LLVM IR (-O2):
define double @ephTan(double %0) {
%2 = tail call i32 @ephDegToRad(double %0)
%3 = tail call double @tan(i32 %2)
ret double %3
}
/* Variables and functions */
double floor(double);
double RoundTwo(double num) {
  double tmp = num;
  tmp *= 100;
  tmp = floor(tmp);
  tmp /= 100;
  if ((num - tmp) >= .005)
    tmp += 0.01;
  return tmp;
}


x86 assembly (clang, -O0):
<RoundTwo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xed9(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <floor@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xeb3(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
movsd  0xe90(%rip),%xmm1
ucomisd %xmm1,%xmm0
jb     118c <RoundTwo+0x7c>
movsd  0xe8e(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RoundTwo>:
push   %rax
movsd  %xmm0,(%rsp)
mulsd  0xee2(%rip),%xmm0
call   1030 <floor@plt>
divsd  0xed5(%rip),%xmm0
movsd  (%rsp),%xmm3
subsd  %xmm0,%xmm3
movsd  0xecc(%rip),%xmm1
addsd  %xmm0,%xmm1
movsd  0xec8(%rip),%xmm2
cmpnlesd %xmm3,%xmm2
andpd  %xmm2,%xmm0
andnpd %xmm1,%xmm2
orpd   %xmm2,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @RoundTwo(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
store double %4, double* %3
%5 = load double, double* %3
%6 = fmul double %5, 1.000000e+02
store double %6, double* %3
%7 = load double, double* %3
%8 = call double @llvm.floor.f64(double %7)
store double %8, double* %3
%9 = load double, double* %3
%10 = fdiv double %9, 1.000000e+02
store double %10, double* %3
%11 = load double, double* %2
%12 = load double, double* %3
%13 = fsub double %11, %12
%14 = fcmp oge double %13, 5.000000e-03
br i1 %14, label %15, label %18
15: ; preds = %1
%16 = load double, double* %3
%17 = fadd double %16, 1.000000e-02
store double %17, double* %3
br label %18
18: ; preds = %15, %1
%19 = load double, double* %3
ret double %19
}

LLVM IR (-O2):
define double @RoundTwo(double %0) {
%2 = fmul double %0, 1.000000e+02
%3 = tail call double @llvm.floor.f64(double %2)
%4 = fdiv double %3, 1.000000e+02
%5 = fsub double %0, %4
%6 = fcmp ult double %5, 5.000000e-03
%7 = fadd double %4, 1.000000e-02
%8 = select i1 %6, double %4, double %7
ret double %8
}
int fun1097() { return 1097; }


x86 assembly (clang, -O0):
<fun1097>:
push   %rbp
mov    %rsp,%rbp
mov    $0x449,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1097>:
mov    $0x449,%eax
ret

LLVM IR (-O0):
define i32 @fun1097() {
ret i32 1097
}

LLVM IR (-O2):
define i32 @fun1097() {
ret i32 1097
}
/* Variables and functions */
int var2m1();
int varp1();
int bar(void) { return varp1() + var2m1() + 1; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <varp1@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <var2m1@plt>
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
add    %ecx,%eax
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
push   %rbx
xor    %eax,%eax
call   1040 <varp1@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <var2m1@plt>
add    %ebx,%eax
add    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @bar() {
%1 = call i32 (...) @varp1()
%2 = call i32 (...) @var2m1()
%3 = add nsw i32 %1, %2
%4 = add nsw i32 %3, 1
ret i32 %4
}

LLVM IR (-O2):
define i32 @bar() {
%1 = tail call i32 (...) @varp1()
%2 = tail call i32 (...) @var2m1()
%3 = add i32 %1, 1
%4 = add i32 %3, %2
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char const *, int /*<<< orphan*/);
int /*<<< orphan*/ putc(char, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void Warning(const char *cp) {
  fputs(cp, stderr);
  putc('\n', stderr);
  return;
}


x86 assembly (clang, -O0):
<Warning>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ea9(%rip),%rax
mov    (%rax),%esi
call   1030 <fputs@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%esi
mov    $0xa,%edi
call   1040 <putc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Warning>:
push   %rbx
mov    0x2eb8(%rip),%rbx
mov    (%rbx),%esi
call   1030 <fputs@plt>
mov    (%rbx),%esi
mov    $0xa,%edi
pop    %rbx
jmp    1040 <putc@plt>

LLVM IR (-O0):
@stderr = global i32 0
define void @Warning(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @stderr
%5 = call i32 @fputs(i8* %3, i32 %4)
%6 = load i32, i32* @stderr
%7 = call i32 @putc(i8 signext 10, i32 %6)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
define void @Warning(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fputs(i8* %0, i32 %2)
%4 = load i32, i32* @stderr
%5 = tail call i32 @putc(i8 signext 10, i32 %4)
ret void
}
/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ sprintf(char *, char *, int);
char *_inttostr(int a) {
  char *str = malloc(sizeof(char) * 20);
  sprintf(str, "%d", a);
  return str;
}


x86 assembly (clang, -O0):
<_inttostr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x14,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%edx
lea    0xeb9(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_inttostr>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
mov    $0x14,%edi
call   1030 <malloc@plt>
mov    %rax,%rbx
lea    0xec7(%rip),%rsi
mov    %rax,%rdi
mov    %ebp,%edx
call   1040 <sprintf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i8* @_inttostr(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = call i8* @malloc(i32 20)
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = load i32, i32* %2
%7 = call i32 @sprintf(i8* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = load i8*, i8** %3
ret i8* %8
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define noalias i8* @_inttostr(i32 %0) {
%2 = tail call dereferenceable_or_null(20) i8* @malloc(i32 20)
%3 = tail call i32 @sprintf(i8* dereferenceable(1) %2, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i8* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_VALUE;
typedef int /*<<< orphan*/ ASN1_ITEM;

/* Variables and functions */
int asn1_item_embed_new(int /*<<< orphan*/ **, int /*<<< orphan*/ const *,
                        int /*<<< orphan*/, int /*<<< orphan*/ *,
                        int /*<<< orphan*/ *);
int ASN1_item_ex_new(ASN1_VALUE **pval, const ASN1_ITEM *it) {
  return asn1_item_embed_new(pval, it, 0, NULL, NULL);
}


x86 assembly (clang, -O0):
<ASN1_item_ex_new>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
xor    %eax,%eax
mov    %eax,%r8d
mov    %r8,%rcx
call   1030 <asn1_item_embed_new@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_item_ex_new>:
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <asn1_item_embed_new@plt>

LLVM IR (-O0):
define i32 @ASN1_item_ex_new(i32** %0, i32* %1) {
%3 = alloca i32**
%4 = alloca i32*
store i32** %0, i32*** %3
store i32* %1, i32** %4
%5 = load i32**, i32*** %3
%6 = load i32*, i32** %4
%7 = call i32 @asn1_item_embed_new(i32** %5, i32* %6, i32 0, i32* null, i32* null)
ret i32 %7
}

LLVM IR (-O2):
define i32 @ASN1_item_ex_new(i32** %0, i32* %1) {
%3 = tail call i32 @asn1_item_embed_new(i32** %0, i32* %1, i32 0, i32* null, i32* null)
ret i32 %3
}
int test_1(int a, int b, int c, int d) { return (a != b) + c + d; }


x86 assembly (clang, -O0):
<test_1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_1>:
xor    %eax,%eax
cmp    %esi,%edi
setne  %al
add    %edx,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_1(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = icmp ne i32 %9, %10
%12 = zext i1 %11 to i32
%13 = load i32, i32* %7
%14 = add nsw i32 %12, %13
%15 = load i32, i32* %8
%16 = add nsw i32 %14, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @test_1(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp ne i32 %0, %1
%6 = zext i1 %5 to i32
%7 = add nsw i32 %6, %2
%8 = add nsw i32 %7, %3
ret i32 %8
}