xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
char *strrchr(char *, char);
void file_basename(char *dest, char *src) {
  char *p;
  p = strrchr(src, '/');
  if (p) {
    ++p;
    strcpy(dest, p);
  } else {
    strcpy(dest, "");
  }
}


x86 assembly (clang, -O0):
<file_basename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x2f,%esi
call   1040 <strrchr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     116b <file_basename+0x4b>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <strcpy@plt>
jmp    117b <file_basename+0x5b>
mov    -0x8(%rbp),%rdi
lea    0xe8a(%rip),%rsi
call   1030 <strcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_basename>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
mov    $0x2f,%esi
call   1040 <strrchr@plt>
test   %rax,%rax
je     1146 <file_basename+0x26>
add    $0x1,%rax
mov    %rbx,%rdi
mov    %rax,%rsi
pop    %rbx
jmp    1030 <strcpy@plt>
lea    0xeb3(%rip),%rsi
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define void @file_basename(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = call i8* @strrchr(i8* %6, i8 signext 47)
store i8* %7, i8** %5
%8 = load i8*, i8** %5
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %16
10: ; preds = %2
%11 = load i8*, i8** %5
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %5
%13 = load i8*, i8** %3
%14 = load i8*, i8** %5
%15 = call i32 @strcpy(i8* %13, i8* %14)
br label %19
16: ; preds = %2
%17 = load i8*, i8** %3
%18 = call i32 @strcpy(i8* %17, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
br label %19
19: ; preds = %16, %10
ret void
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define void @file_basename(i8* %0, i8* %1) {
%3 = tail call i8* @strrchr(i8* dereferenceable(1) %1, i8 signext 47)
%4 = icmp eq i8* %3, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = getelementptr inbounds i8, i8* %3, i64 1
%7 = tail call i32 @strcpy(i8* %0, i8* %6)
br label %10
8: ; preds = %2
%9 = tail call i32 @strcpy(i8* %0, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %5
ret void
}
int toColMajor(int i, int j, int rows) { return i + j * rows; }


x86 assembly (clang, -O0):
<toColMajor>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   -0xc(%rbp),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<toColMajor>:
imul   %edx,%esi
lea    (%rsi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @toColMajor(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = mul nsw i32 %8, %9
%11 = add nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @toColMajor(i32 %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %2, %1
%5 = add nsw i32 %4, %0
ret i32 %5
}
void USBHostPwrDisable(unsigned long ulBase) {
  ;
  (*((volatile unsigned short *)(ulBase + 0x00000400))) &= ~0x00000004;
}


x86 assembly (clang, -O0):
<USBHostPwrDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x400(%rax),%cx
movzwl %cx,%ecx
and    $0xfffffffb,%ecx
mov    %cx,0x400(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBHostPwrDisable>:
andw   $0xfffb,0x400(%rdi)
fb
ret

LLVM IR (-O0):
define void @USBHostPwrDisable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 1024
%5 = inttoptr i64 %4 to i16*
%6 = load volatile i16, i16* %5
%7 = zext i16 %6 to i32
%8 = and i32 %7, -5
%9 = trunc i32 %8 to i16
store volatile i16 %9, i16* %5
ret void
}

LLVM IR (-O2):
define void @USBHostPwrDisable(i64 %0) {
%2 = add i64 %0, 1024
%3 = inttoptr i64 %2 to i16*
%4 = load volatile i16, i16* %3
%5 = and i16 %4, -5
store volatile i16 %5, i16* %3
ret void
}
/* Type definitions */
typedef size_t uint64_t;

/* Variables and functions */
uint64_t fhc_bit_permute_step(uint64_t x, uint64_t m, size_t shift) {
  uint64_t t;
  t = ((x >> shift) ^ x) & m;
  x = (x ^ t) ^ (t << shift);
  return x;
}


x86 assembly (clang, -O0):
<fhc_bit_permute_step>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
shr    %cl,%rax
xor    -0x8(%rbp),%rax
and    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
xor    -0x20(%rbp),%rax
mov    -0x20(%rbp),%rdx
mov    -0x18(%rbp),%rcx
shl    %cl,%rdx
mov    %rdx,%rcx
xor    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fhc_bit_permute_step>:
mov    %rdx,%rcx
mov    %rdi,%rax
shr    %cl,%rax
xor    %rdi,%rax
and    %rsi,%rax
xor    %rax,%rdi
shl    %cl,%rax
xor    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @fhc_bit_permute_step(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%8 = load i64, i64* %4
%9 = load i64, i64* %6
%10 = lshr i64 %8, %9
%11 = load i64, i64* %4
%12 = xor i64 %10, %11
%13 = load i64, i64* %5
%14 = and i64 %12, %13
store i64 %14, i64* %7
%15 = load i64, i64* %4
%16 = load i64, i64* %7
%17 = xor i64 %15, %16
%18 = load i64, i64* %7
%19 = load i64, i64* %6
%20 = shl i64 %18, %19
%21 = xor i64 %17, %20
store i64 %21, i64* %4
%22 = load i64, i64* %4
ret i64 %22
}

LLVM IR (-O2):
define i64 @fhc_bit_permute_step(i64 %0, i64 %1, i64 %2) {
%4 = lshr i64 %0, %2
%5 = xor i64 %4, %0
%6 = and i64 %5, %1
%7 = xor i64 %6, %0
%8 = shl i64 %6, %2
%9 = xor i64 %7, %8
ret i64 %9
}
/* Variables and functions */
int /*<<< orphan*/ say(char *, int);
void hit(void) { say("Die thread user.", 1); }


x86 assembly (clang, -O0):
<hit>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x1,%esi
call   1030 <say@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hit>:
lea    0xee9(%rip),%rdi
mov    $0x1,%esi
jmp    1030 <say@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"Die thread user.\00"
define void @hit() {
%1 = call i32 @say(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"Die thread user.\00"
define void @hit() {
%1 = tail call i32 @say(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}
void foo606(int p) {}


x86 assembly (clang, -O0):
<foo606>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo606>:
ret

LLVM IR (-O0):
define void @foo606(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo606(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *fopen(char *, char *);
int main() {
  int i;
  FILE *input = fopen("output.bin", "rb");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
lea    0xede(%rip),%rsi
call   1030 <fopen@plt>
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xeec(%rip),%rsi
call   1030 <fopen@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"output.bin\00"
@.str.1 = [3 x i8] c"rb\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
store i32 0, i32* %1
%4 = call i32* @fopen(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
store i32* %4, i32** %3
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"output.bin\00"
@.str.1 = [3 x i8] c"rb\00"
define i32 @main() {
%1 = tail call i32* @fopen(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void ltspfs_quit(int sockfd) {
  close(sockfd);
  exit(0);
}


x86 assembly (clang, -O0):
<ltspfs_quit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<ltspfs_quit>:
push   %rax
call   1030 <close@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @ltspfs_quit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
%5 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @ltspfs_quit(i32 %0) {
%2 = tail call i32 @close(i32 %0)
%3 = tail call i32 @exit(i32 0)
unreachable
}
int is_in_bound(int *arr, int size, int *ptr) {
  return ((ptr - arr) / (sizeof(int))) < size;
}


x86 assembly (clang, -O0):
<is_in_bound>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
sar    $0x2,%rax
shr    $0x2,%rax
movslq -0xc(%rbp),%rcx
cmp    %rcx,%rax
setb   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_in_bound>:
sub    %rdi,%rdx
sar    $0x2,%rdx
shr    $0x2,%rdx
movslq %esi,%rcx
xor    %eax,%eax
cmp    %rcx,%rdx
setb   %al
ret

LLVM IR (-O0):
define i32 @is_in_bound(i32* %0, i32 %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32*
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32*, i32** %6
%8 = load i32*, i32** %4
%9 = ptrtoint i32* %7 to i64
%10 = ptrtoint i32* %8 to i64
%11 = sub i64 %9, %10
%12 = sdiv exact i64 %11, 4
%13 = udiv i64 %12, 4
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = icmp ult i64 %13, %15
%17 = zext i1 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
define i32 @is_in_bound(i32* %0, i32 %1, i32* %2) {
%4 = ptrtoint i32* %2 to i64
%5 = ptrtoint i32* %0 to i64
%6 = sub i64 %4, %5
%7 = ashr exact i64 %6, 2
%8 = lshr i64 %7, 2
%9 = sext i32 %1 to i64
%10 = icmp ult i64 %8, %9
%11 = zext i1 %10 to i32
ret i32 %11
}
void ScaleRowDown2Linear_NEON() {}


x86 assembly (clang, -O0):
<ScaleRowDown2Linear_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ScaleRowDown2Linear_NEON>:
ret

LLVM IR (-O0):
define void @ScaleRowDown2Linear_NEON() {
ret void
}

LLVM IR (-O2):
define void @ScaleRowDown2Linear_NEON() {
ret void
}
void avio_read_partial() {}


x86 assembly (clang, -O0):
<avio_read_partial>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avio_read_partial>:
ret

LLVM IR (-O0):
define void @avio_read_partial() {
ret void
}

LLVM IR (-O2):
define void @avio_read_partial() {
ret void
}
/* Type definitions */
typedef scalar_t__ pthread_t;

/* Variables and functions */
int __pthread_equal(pthread_t a, pthread_t b) { return a == b; }


x86 assembly (clang, -O0):
<__pthread_equal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__pthread_equal>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @__pthread_equal(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @__pthread_equal(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
double pow(double, double);
double lsrgb(double linear) {
  if (linear <= 0.0031308)
    return linear * 12.92;
  else
    return 1.055 * pow(linear, 1.0 / 2.4) - 0.055;
}


x86 assembly (clang, -O0):
<lsrgb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  0xedb(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
jb     1147 <lsrgb+0x37>
movsd  0xee8(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1176 <lsrgb+0x66>
movsd  -0x10(%rbp),%xmm0
movsd  0xec4(%rip),%xmm1
call   1030 <pow@plt>
movsd  0xea7(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xea3(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lsrgb>:
push   %rax
movsd  0xee7(%rip),%xmm1
ucomisd %xmm0,%xmm1
jae    113e <lsrgb+0x2e>
movsd  0xee9(%rip),%xmm1
call   1030 <pow@plt>
mulsd  0xee4(%rip),%xmm0
addsd  0xee4(%rip),%xmm0
pop    %rax
ret
mulsd  0xec2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @lsrgb(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp ole double %4, 3.130800e-03
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load double, double* %3
%8 = fmul double %7, 1.292000e+01
store double %8, double* %2
br label %13
9: ; preds = %1
%10 = load double, double* %3
%11 = call double @pow(double %10, double 0x3FDAAAAAAAAAAAAB)
%12 = call double @llvm.fmuladd.f64(double 1.055000e+00, double %11, double -5.500000e-02)
store double %12, double* %2
br label %13
13: ; preds = %9, %6
%14 = load double, double* %2
ret double %14
}

LLVM IR (-O2):
define double @lsrgb(double %0) {
%2 = fcmp ugt double %0, 3.130800e-03
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = fmul double %0, 1.292000e+01
br label %8
5: ; preds = %1
%6 = tail call double @pow(double %0, double 0x3FDAAAAAAAAAAAAB)
%7 = tail call double @llvm.fmuladd.f64(double %6, double 1.055000e+00, double -5.500000e-02)
br label %8
8: ; preds = %5, %3
%9 = phi double [ %4, %3 ], [ %7, %5 ]
ret double %9
}
/* Variables and functions */
int strlen(char *);
scalar_t__ strncmp(char *, char *, int);
int isDirRef(char *string) {
  return strlen(string) > 6 && (strncmp(string, "dir(", 4) == 0);
}


x86 assembly (clang, -O0):
<isDirRef>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x6,%ecx
mov    %al,-0x9(%rbp)
jle    1164 <isDirRef+0x44>
mov    -0x8(%rbp),%rdi
lea    0xeb0(%rip),%rsi
mov    $0x4,%edx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isDirRef>:
push   %rbx
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x7,%ecx
jl     1151 <isDirRef+0x31>
lea    0xec7(%rip),%rsi
mov    %rbx,%rdi
mov    $0x4,%edx
call   1030 <strncmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"dir(\00"
define i32 @isDirRef(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strlen(i8* %3)
%5 = icmp sgt i32 %4, 6
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i64 @strncmp(i8* %7, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 4)
%9 = icmp eq i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
@.str = [5 x i8] c"dir(\00"
define i32 @isDirRef(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 6
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @strncmp(i8* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 4)
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %9
}
int hosts_fclose(struct fopen_info *info) { return 0; }


x86 assembly (clang, -O0):
<hosts_fclose>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hosts_fclose>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.fopen_info = type opaque
define i32 @hosts_fclose(%struct.fopen_info* %0) {
%2 = alloca %struct.fopen_info*
store %struct.fopen_info* %0, %struct.fopen_info** %2
ret i32 0
}

LLVM IR (-O2):
%struct.fopen_info = type opaque
define i32 @hosts_fclose(%struct.fopen_info* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int power2(int x) {
  fprintf(stderr, "slow power2()\n");
  return x * x;
}


x86 assembly (clang, -O0):
<power2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
lea    0xed5(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<power2>:
push   %rbx
mov    %edi,%ebx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
call   1030 <fprintf@plt>
imul   %ebx,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [15 x i8] c"slow power2()\0A\00"
define i32 @power2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* %2
%6 = load i32, i32* %2
%7 = mul nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [15 x i8] c"slow power2()\0A\00"
define i32 @power2(i32 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%4 = mul nsw i32 %0, %0
ret i32 %4
}
int words(char input[]) {
  int i = 0;
  char *inputPtr = input;
  int words = 0;
  int count = sizeof(input);
  for (i = 0; i <= count; i++) {
    if (input[i] == 0x20) {
      words++;
    }
  }
  return words;
}


x86 assembly (clang, -O0):
<words>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
movl   $0x8,-0x20(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x20(%rbp),%eax
jg     1169 <words+0x69>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x20,%eax
jne    1156 <words+0x56>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    115b <words+0x5b>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112c <words+0x2c>
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<words>:
movq   (%rdi),%xmm0
xor    %ecx,%ecx
cmpb   $0x20,0x8(%rdi)
sete   %cl
pcmpeqb 0xeeb(%rip),%xmm0
pmovmskb %xmm0,%eax
mov    %eax,%edx
shr    %dl
and    $0x55,%dl
sub    %dl,%al
mov    %eax,%edx
and    $0x33,%dl
shr    $0x2,%al
and    $0x33,%al
add    %dl,%al
mov    %eax,%edx
shr    $0x4,%dl
add    %al,%dl
and    $0xf,%dl
movzbl %dl,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @words(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%7 = load i8*, i8** %2
store i8* %7, i8** %4
store i32 0, i32* %5
store i32 8, i32* %6
store i32 0, i32* %3
br label %8
8: ; preds = %24, %1
%9 = load i32, i32* %3
%10 = load i32, i32* %6
%11 = icmp sle i32 %9, %10
br i1 %11, label %12, label %27
12: ; preds = %8
%13 = load i8*, i8** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 32
br i1 %19, label %20, label %23
20: ; preds = %12
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
store i32 %22, i32* %5
br label %23
23: ; preds = %20, %12
br label %24
24: ; preds = %23
%25 = load i32, i32* %3
%26 = add nsw i32 %25, 1
store i32 %26, i32* %3
br label %8
27: ; preds = %8
%28 = load i32, i32* %5
ret i32 %28
}

LLVM IR (-O2):
define i32 @words(i8* nocapture %0) {
%2 = bitcast i8* %0 to <8 x i8>*
%3 = load <8 x i8>, <8 x i8>* %2
%4 = icmp eq <8 x i8> %3, <i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32>
%5 = getelementptr inbounds i8, i8* %0, i64 8
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 32
%8 = zext i1 %7 to i32
%9 = bitcast <8 x i1> %4 to i8
%10 = call i8 @llvm.ctpop.i8(i8 %9)
%11 = zext i8 %10 to i32
%12 = add nuw nsw i32 %11, %8
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ extiInit();
int /*<<< orphan*/ nvicInit();
int platformInit(void) {
  nvicInit();
  extiInit();
  return 0;
}


x86 assembly (clang, -O0):
<platformInit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <nvicInit@plt>
mov    $0x0,%al
call   1040 <extiInit@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<platformInit>:
push   %rax
xor    %eax,%eax
call   1030 <nvicInit@plt>
xor    %eax,%eax
call   1040 <extiInit@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @platformInit() {
%1 = call i32 (...) @nvicInit()
%2 = call i32 (...) @extiInit()
ret i32 0
}

LLVM IR (-O2):
define i32 @platformInit() {
%1 = tail call i32 (...) @nvicInit()
%2 = tail call i32 (...) @extiInit()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_stream_get_device_name() {
  printf("NOT IMPLEMENTED:"
         "pa_stream_get_device_name"
         "\n");
}


x86 assembly (clang, -O0):
<pa_stream_get_device_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_stream_get_device_name>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [43 x i8] c"NOT IMPLEMENTED:pa_stream_get_device_name\0A\00"
define i32 @pa_stream_get_device_name() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [42 x i8] c"NOT IMPLEMENTED:pa_stream_get_device_name\00"
define i32 @pa_stream_get_device_name() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  bool val1, val2;
  val1 = true;
  val2 = false;
  printf("true = %x\n", val1);
  printf("false = %x\n", val2);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%esi
lea    0xed0(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%esi
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
lea    0xee2(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"true = %x\0A\00"
@.str.1 = [12 x i8] c"false = %x\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 1, i32* %1
store i32 0, i32* %2
%3 = load i32, i32* %1
%4 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"true = %x\0A\00"
@.str.1 = [12 x i8] c"false = %x\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 1)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 0)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ URegularExpression;

/* Variables and functions */
int /*<<< orphan*/ uregex_close(int /*<<< orphan*/ *);
void icuRegexpDelete(void *p) {
  URegularExpression *pExpr = (URegularExpression *)p;
  uregex_close(pExpr);
}


x86 assembly (clang, -O0):
<icuRegexpDelete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <uregex_close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<icuRegexpDelete>:
jmp    1030 <uregex_close@plt>

LLVM IR (-O0):
define void @icuRegexpDelete(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = call i32 @uregex_close(i32* %6)
ret void
}

LLVM IR (-O2):
define void @icuRegexpDelete(i8* %0) {
%2 = bitcast i8* %0 to i32*
%3 = tail call i32 @uregex_close(i32* %2)
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;
typedef scalar_t__ int32_t;

/* Variables and functions */
bool RingCompareGe(uint32_t a, uint32_t b) { return (int32_t)(a - b) >= 0; }


x86 assembly (clang, -O0):
<RingCompareGe>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sub    -0x10(%rbp),%rax
cmp    $0x0,%rax
setge  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RingCompareGe>:
xor    %eax,%eax
cmp    %rsi,%rdi
setge  %al
ret

LLVM IR (-O0):
define i32 @RingCompareGe(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = sub nsw i64 %5, %6
%8 = icmp sge i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @RingCompareGe(i64 %0, i64 %1) {
%3 = icmp sge i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
int HelpItem40(void) { return 0; }


x86 assembly (clang, -O0):
<HelpItem40>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelpItem40>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HelpItem40() {
ret i32 0
}

LLVM IR (-O2):
define i32 @HelpItem40() {
ret i32 0
}
void gtk_icon_source_get_state() {}


x86 assembly (clang, -O0):
<gtk_icon_source_get_state>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_icon_source_get_state>:
ret

LLVM IR (-O0):
define void @gtk_icon_source_get_state() {
ret void
}

LLVM IR (-O2):
define void @gtk_icon_source_get_state() {
ret void
}
void do_segfault() {
  char *deadbeef = (char *)0xdeadbeef;
  *deadbeef = 0;
}


x86 assembly (clang, -O0):
<do_segfault>:
push   %rbp
mov    %rsp,%rbp
mov    $0xdeadbeef,%eax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_segfault>:
mov    $0xdeadbeef,%eax
movb   $0x0,(%rax)
ret

LLVM IR (-O0):
define void @do_segfault() {
%1 = alloca i8*
store i8* inttoptr (i64 3735928559 to i8*), i8** %1
%2 = load i8*, i8** %1
store i8 0, i8* %2
ret void
}

LLVM IR (-O2):
define void @do_segfault() {
store i8 0, i8* inttoptr (i64 3735928559 to i8*)
ret void
}
int param_get_short(char *buffer, struct kernel_param *kp) { return 0; }


x86 assembly (clang, -O0):
<param_get_short>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<param_get_short>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.kernel_param = type opaque
define i32 @param_get_short(i8* %0, %struct.kernel_param* %1) {
%3 = alloca i8*
%4 = alloca %struct.kernel_param*
store i8* %0, i8** %3
store %struct.kernel_param* %1, %struct.kernel_param** %4
ret i32 0
}

LLVM IR (-O2):
%struct.kernel_param = type opaque
define i32 @param_get_short(i8* nocapture readnone %0, %struct.kernel_param* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isxdigit(int);
void t_isxdigit_0x18() {
  Assert_real((isxdigit(24) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              125, ("isxdigit should be 0 for 0x18"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0x18>:
push   %rbp
mov    %rsp,%rbp
mov    $0x18,%edi
call   1030 <isxdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x7d,%edx
lea    0xf5c(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0x18>:
push   %rax
mov    $0x18,%edi
call   1030 <isxdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x7d,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0x18\00"
define void @t_isxdigit_0x18() {
%1 = call i64 @isxdigit(i32 24)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 125, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0x18\00"
define void @t_isxdigit_0x18() {
%1 = tail call i64 @isxdigit(i32 24)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 125, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *const, int,
                           int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ stderr;
int main(int argc, char *argv[]) {
  const char *const me = argv[0];
  const float zero = 0.0F;
  union {
    float flt32bit;
    int int32bit;
  } qnan;
  if (sizeof(float) != sizeof(int)) {
    fprintf(stderr, "%s: MADNESS:  sizeof(float)=%d != sizeof(int)=%d\n", me,
            (int)sizeof(float), (int)sizeof(int));
    return -1;
  }
  qnan.flt32bit = zero / zero;
  printf("-DTEEM_QNANHIBIT=%d\n", (qnan.int32bit >> 22) & 1);
  return (int)((qnan.int32bit >> 22) & 1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
xorps  %xmm0,%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  0xebf(%rip),%xmm0
movss  %xmm0,-0x20(%rbp)
mov    -0x20(%rbp),%esi
sar    $0x16,%esi
and    $0x1,%esi
lea    0xeae(%rip),%rdi
call   1030 <printf@plt>
mov    -0x20(%rbp),%eax
sar    $0x16,%eax
and    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
%union.anon = type { float }
@.str = [21 x i8] c"-DTEEM_QNANHIBIT=%d\0A\00"
@stderr = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
%7 = alloca float
%8 = alloca %union.anon
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 0
%11 = load i8*, i8** %10
store i8* %11, i8** %6
store float 0.000000e+00, float* %7
%12 = bitcast %union.anon* %8 to float*
store float 0x7FF8000000000000, float* %12
%13 = bitcast %union.anon* %8 to i32*
%14 = load i32, i32* %13
%15 = ashr i32 %14, 22
%16 = and i32 %15, 1
%17 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %16)
%18 = bitcast %union.anon* %8 to i32*
%19 = load i32, i32* %18
%20 = ashr i32 %19, 22
%21 = and i32 %20, 1
ret i32 %21
}

LLVM IR (-O2):
@.str = [21 x i8] c"-DTEEM_QNANHIBIT=%d\0A\00"
@stderr = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 1)
ret i32 1
}
unsigned float_twice(unsigned uf) { return 2; }


x86 assembly (clang, -O0):
<float_twice>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<float_twice>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @float_twice(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 2
}

LLVM IR (-O2):
define i32 @float_twice(i32 %0) {
ret i32 2
}
/* Type definitions */
typedef scalar_t__ int64_t;

/* Variables and functions */
double int_to_double(int64_t val) { return (double)val; }


x86 assembly (clang, -O0):
<int_to_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cvtsi2sdq -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_to_double>:
cvtsi2sd %rdi,%xmm0
ret

LLVM IR (-O0):
define double @int_to_double(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sitofp i64 %3 to double
ret double %4
}

LLVM IR (-O2):
define double @int_to_double(i64 %0) {
%2 = sitofp i64 %0 to double
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char const *);
void fatal(const char *msg) {
  printf("%s\n", msg);
  exit(1);
}


x86 assembly (clang, -O0):
<fatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<fatal>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @fatal(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @fatal(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int openat(int, char const *, int, int /*<<< orphan*/);
extern int _swift_Platform_openat(int fd, const char *path, int oflag,
                                  mode_t mode) {
  return openat(fd, path, oflag, mode);
}


x86 assembly (clang, -O0):
<_swift_Platform_openat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
call   1030 <openat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_swift_Platform_openat>:
jmp    1030 <openat@plt>

LLVM IR (-O0):
define i32 @_swift_Platform_openat(i32 %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @openat(i32 %9, i8* %10, i32 %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @_swift_Platform_openat(i32 %0, i8* %1, i32 %2, i32 %3) {
%5 = tail call i32 @openat(i32 %0, i8* %1, i32 %2, i32 %3)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int main() {
  int t[1025] = {1024}, d;
  d = 0;
  d = t[d]++;
  if (t[0] != 1025)
    abort();
  if (d != 1024)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x1020,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x1010(%rbp),%rdi
xor    %esi,%esi
mov    $0x1004,%edx
call   1040 <memset@plt>
movl   $0x400,-0x1010(%rbp)
movl   $0x0,-0x1014(%rbp)
movslq -0x1014(%rbp),%rcx
mov    -0x1010(%rbp,%rcx,4),%eax
mov    %eax,%edx
add    $0x1,%edx
mov    %edx,-0x1010(%rbp,%rcx,4)
mov    %eax,-0x1014(%rbp)
cmpl   $0x401,-0x1010(%rbp)
je     1190 <main+0x70>
mov    $0x0,%al
call   1030 <abort@plt>
cmpl   $0x400,-0x1014(%rbp)
je     11a7 <main+0x87>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x1020,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [1025 x i32]
%3 = alloca i32
store i32 0, i32* %1
%4 = bitcast [1025 x i32]* %2 to i8*
%5 = bitcast i8* %4 to <{ i32, [1024 x i32] }>*
%6 = getelementptr inbounds <{ i32, [1024 x i32] }>, <{ i32, [1024 x i32] }>* %5, i32 0, i32 0
store i32 1024, i32* %6
store i32 0, i32* %3
%7 = load i32, i32* %3
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds [1025 x i32], [1025 x i32]* %2, i64 0, i64 %8
%10 = load i32, i32* %9
%11 = add nsw i32 %10, 1
store i32 %11, i32* %9
store i32 %10, i32* %3
%12 = getelementptr inbounds [1025 x i32], [1025 x i32]* %2, i64 0, i64 0
%13 = load i32, i32* %12
%14 = icmp ne i32 %13, 1025
br i1 %14, label %15, label %17
15: ; preds = %0
%16 = call i32 (...) @abort()
unreachable
17: ; preds = %0
%18 = load i32, i32* %3
%19 = icmp ne i32 %18, 1024
br i1 %19, label %20, label %22
20: ; preds = %17
%21 = call i32 (...) @abort()
unreachable
22: ; preds = %17
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t generate_upc_channel_twg850(uint32_t *sn) {
  switch (sn[4] % 3) {
  case 0:
    return 1;
  case 1:
    return 11;
  case 2:
    return 6;
  }
}


x86 assembly (clang, -O0):
<generate_upc_channel_twg850>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movslq 0x10(%rax),%rcx
mov    %ecx,%eax
imul   $0x55555556,%rcx,%rdx
mov    %rdx,%rcx
shr    $0x3f,%rcx
shr    $0x20,%rdx
add    %ecx,%edx
mov    %edx,%ecx
lea    (%rcx,%rcx,2),%ecx
sub    %ecx,%eax
mov    %eax,-0x14(%rbp)
je     115d <generate_upc_channel_twg850+0x5d>
jmp    113b <generate_upc_channel_twg850+0x3b>
mov    -0x14(%rbp),%eax
sub    $0x1,%eax
je     1169 <generate_upc_channel_twg850+0x69>
jmp    114c <generate_upc_channel_twg850+0x4c>
mov    -0x14(%rbp),%eax
sub    $0x2,%eax
je     1175 <generate_upc_channel_twg850+0x75>
jmp    117c <generate_upc_channel_twg850+0x7c>
movl   $0x1,-0x4(%rbp)
jmp    117c <generate_upc_channel_twg850+0x7c>
movl   $0xb,-0x4(%rbp)
jmp    117c <generate_upc_channel_twg850+0x7c>
movl   $0x6,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_upc_channel_twg850>:
movslq 0x10(%rdi),%rax
imul   $0x55555556,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,2),%ecx
sub    %ecx,%eax
cmp    $0x1,%eax
mov    $0xb,%ecx
mov    $0x1,%edx
cmove  %ecx,%edx
cmp    $0x2,%eax
mov    $0x6,%eax
cmovne %edx,%eax
ret

LLVM IR (-O0):
define i32 @generate_upc_channel_twg850(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = getelementptr inbounds i32, i32* %4, i64 4
%6 = load i32, i32* %5
%7 = srem i32 %6, 3
switch i32 %7, label %11 [
i32 0, label %8
i32 1, label %9
i32 2, label %10
]
8: ; preds = %1
store i32 1, i32* %2
br label %11
9: ; preds = %1
store i32 11, i32* %2
br label %11
10: ; preds = %1
store i32 6, i32* %2
br label %11
11: ; preds = %8, %9, %10, %1
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @generate_upc_channel_twg850(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 4
%3 = load i32, i32* %2
%4 = srem i32 %3, 3
%5 = icmp eq i32 %4, 1
%6 = select i1 %5, i32 11, i32 1
%7 = icmp eq i32 %4, 2
%8 = select i1 %7, i32 6, i32 %6
ret i32 %8
}
/* Variables and functions */
int RAND_MAX;
scalar_t__ rand();
float rand_float(float min, float max) {
  return ((float)rand() / (float)(RAND_MAX - 1)) * (max - min) + min;
}


x86 assembly (clang, -O0):
<rand_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2ss %rax,%xmm0
mov    0x2eb3(%rip),%rax
mov    (%rax),%eax
sub    $0x1,%eax
cvtsi2ss %eax,%xmm1
divss  %xmm1,%xmm0
movss  -0x8(%rbp),%xmm2
subss  -0x4(%rbp),%xmm2
movss  -0x4(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_float>:
push   %rax
movss  %xmm1,0x4(%rsp)
movss  %xmm0,(%rsp)
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2ss %rax,%xmm2
mov    0x2eb9(%rip),%rax
mov    (%rax),%eax
add    $0xffffffff,%eax
xorps  %xmm1,%xmm1
cvtsi2ss %eax,%xmm1
divss  %xmm1,%xmm2
movss  0x4(%rsp),%xmm0
movss  (%rsp),%xmm1
subss  %xmm1,%xmm0
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global i32 0
define float @rand_float(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = call i64 (...) @rand()
%6 = sitofp i64 %5 to float
%7 = load i32, i32* @RAND_MAX
%8 = sub nsw i32 %7, 1
%9 = sitofp i32 %8 to float
%10 = fdiv float %6, %9
%11 = load float, float* %4
%12 = load float, float* %3
%13 = fsub float %11, %12
%14 = load float, float* %3
%15 = call float @llvm.fmuladd.f32(float %10, float %13, float %14)
ret float %15
}

LLVM IR (-O2):
@RAND_MAX = global i32 0
define float @rand_float(float %0, float %1) {
%3 = tail call i64 (...) @rand()
%4 = sitofp i64 %3 to float
%5 = load i32, i32* @RAND_MAX
%6 = add nsw i32 %5, -1
%7 = sitofp i32 %6 to float
%8 = fdiv float %4, %7
%9 = fsub float %1, %0
%10 = tail call float @llvm.fmuladd.f32(float %8, float %9, float %0)
ret float %10
}
/* Variables and functions */
int /*<<< orphan*/ reg_addrange(char, char);
void reg_addranges_w(void) {
  reg_addrange('0', '9');
  reg_addrange('A', 'Z');
  reg_addrange('_', '_');
  reg_addrange('a', 'z');
}


x86 assembly (clang, -O0):
<reg_addranges_w>:
push   %rbp
mov    %rsp,%rbp
mov    $0x30,%edi
mov    $0x39,%esi
call   1030 <reg_addrange@plt>
mov    $0x41,%edi
mov    $0x5a,%esi
call   1030 <reg_addrange@plt>
mov    $0x5f,%esi
mov    %esi,%edi
call   1030 <reg_addrange@plt>
mov    $0x61,%edi
mov    $0x7a,%esi
call   1030 <reg_addrange@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg_addranges_w>:
push   %rax
mov    $0x30,%edi
mov    $0x39,%esi
call   1030 <reg_addrange@plt>
mov    $0x41,%edi
mov    $0x5a,%esi
call   1030 <reg_addrange@plt>
mov    $0x5f,%edi
mov    $0x5f,%esi
call   1030 <reg_addrange@plt>
mov    $0x61,%edi
mov    $0x7a,%esi
pop    %rax
jmp    1030 <reg_addrange@plt>

LLVM IR (-O0):
define void @reg_addranges_w() {
%1 = call i32 @reg_addrange(i8 signext 48, i8 signext 57)
%2 = call i32 @reg_addrange(i8 signext 65, i8 signext 90)
%3 = call i32 @reg_addrange(i8 signext 95, i8 signext 95)
%4 = call i32 @reg_addrange(i8 signext 97, i8 signext 122)
ret void
}

LLVM IR (-O2):
define void @reg_addranges_w() {
%1 = tail call i32 @reg_addrange(i8 signext 48, i8 signext 57)
%2 = tail call i32 @reg_addrange(i8 signext 65, i8 signext 90)
%3 = tail call i32 @reg_addrange(i8 signext 95, i8 signext 95)
%4 = tail call i32 @reg_addrange(i8 signext 97, i8 signext 122)
ret void
}
void ARGBToYJRow_Any_AVX2() {}


x86 assembly (clang, -O0):
<ARGBToYJRow_Any_AVX2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBToYJRow_Any_AVX2>:
ret

LLVM IR (-O0):
define void @ARGBToYJRow_Any_AVX2() {
ret void
}

LLVM IR (-O2):
define void @ARGBToYJRow_Any_AVX2() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
size_t read_FP_BE(int /*<<< orphan*/ *, int /*<<< orphan*/ *, int);
size_t uint64ReadFromFP(FILE *fp, uint64_t *data) {
  return read_FP_BE(fp, data, sizeof(uint64_t));
}


x86 assembly (clang, -O0):
<uint64ReadFromFP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x4,%edx
call   1030 <read_FP_BE@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uint64ReadFromFP>:
mov    $0x4,%edx
jmp    1030 <read_FP_BE@plt>

LLVM IR (-O0):
define i64 @uint64ReadFromFP(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i64 @read_FP_BE(i32* %5, i32* %6, i32 4)
ret i64 %7
}

LLVM IR (-O2):
define i64 @uint64ReadFromFP(i32* %0, i32* %1) {
%3 = tail call i64 @read_FP_BE(i32* %0, i32* %1, i32 4)
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ copia();
int obtenlinea();
int /*<<< orphan*/ voltea();
int main(void) {
  int longitud;
  extern int max;
  extern char linea_max[1000];
  max = 0;
  while ((longitud = obtenlinea()) > 0) {
    max = longitud;
    copia();
    voltea();
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2e9a(%rip),%rax
movl   $0x0,(%rax)
mov    $0x0,%al
call   1030 <obtenlinea@plt>
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
jle    117e <main+0x4e>
mov    -0x8(%rbp),%ecx
mov    0x2e77(%rip),%rax
mov    %ecx,(%rax)
mov    $0x0,%al
call   1040 <copia@plt>
mov    $0x0,%al
call   1050 <voltea@plt>
jmp    114c <main+0x1c>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    0x2ea8(%rip),%rbx
movl   $0x0,(%rbx)
xchg   %ax,%ax
xor    %eax,%eax
call   1030 <obtenlinea@plt>
test   %eax,%eax
jle    115d <main+0x2d>
mov    %eax,(%rbx)
xor    %eax,%eax
call   1040 <copia@plt>
xor    %eax,%eax
call   1050 <voltea@plt>
jmp    1140 <main+0x10>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@max = external global i32
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* @max
br label %3
3: ; preds = %6, %0
%4 = call i32 (...) @obtenlinea()
store i32 %4, i32* %2
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %3
%7 = load i32, i32* %2
store i32 %7, i32* @max
%8 = call i32 (...) @copia()
%9 = call i32 (...) @voltea()
br label %3
10: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@max = external global i32
define i32 @main() {
store i32 0, i32* @max
%1 = tail call i32 (...) @obtenlinea()
%2 = icmp sgt i32 %1, 0
br i1 %2, label %3, label %9
3: ; preds = %0, %3
%4 = phi i32 [ %7, %3 ], [ %1, %0 ]
store i32 %4, i32* @max
%5 = tail call i32 (...) @copia()
%6 = tail call i32 (...) @voltea()
%7 = tail call i32 (...) @obtenlinea()
%8 = icmp sgt i32 %7, 0
br i1 %8, label %3, label %9
9: ; preds = %3, %0
ret i32 0
}
/* Type definitions */
struct sip_msg {
  int dummy;
};
struct fis_param {
  int dummy;
};

/* Variables and functions */
int ops_delete_avp(struct sip_msg *, struct fis_param *);
int w_delete_avps(struct sip_msg *msg, char *param, char *foo) {
  return ops_delete_avp(msg, (struct fis_param *)param);
}


x86 assembly (clang, -O0):
<w_delete_avps>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <ops_delete_avp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<w_delete_avps>:
jmp    1030 <ops_delete_avp@plt>

LLVM IR (-O0):
%struct.sip_msg = type { i32 }
%struct.fis_param = type { i32 }
define i32 @w_delete_avps(%struct.sip_msg* %0, i8* %1, i8* %2) {
%4 = alloca %struct.sip_msg*
%5 = alloca i8*
%6 = alloca i8*
store %struct.sip_msg* %0, %struct.sip_msg** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load %struct.sip_msg*, %struct.sip_msg** %4
%8 = load i8*, i8** %5
%9 = bitcast i8* %8 to %struct.fis_param*
%10 = call i32 @ops_delete_avp(%struct.sip_msg* %7, %struct.fis_param* %9)
ret i32 %10
}

LLVM IR (-O2):
%struct.sip_msg = type { i32 }
%struct.fis_param = type { i32 }
define i32 @w_delete_avps(%struct.sip_msg* %0, i8* %1, i8* nocapture readnone %2) {
%4 = bitcast i8* %1 to %struct.fis_param*
%5 = tail call i32 @ops_delete_avp(%struct.sip_msg* %0, %struct.fis_param* %4)
ret i32 %5
}