xunge/DecIR huggingface dataset:
bzero(b, l) register char *b;
{
  while (l-- > 0)
    *b++ = 0;
}


x86 assembly (clang, -O0):
<bzero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x14(%rbp)
cmp    $0x0,%eax
jle    1136 <bzero+0x36>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movb   $0x0,(%rax)
jmp    110b <bzero+0xb>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bzero>:
test   %esi,%esi
jle    1122 <bzero+0x12>
push   %rax
mov    %esi,%edx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @bzero(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
br label %6
6: ; preds = %10, %2
%7 = load i32, i32* %5
%8 = add nsw i32 %7, -1
store i32 %8, i32* %5
%9 = icmp sgt i32 %7, 0
br i1 %9, label %10, label %13
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %4
store i8 0, i8* %11
br label %6
13: ; preds = %6
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @bzero(i8* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %2
ret i32 undef
}
int _getpid(void) { return 1; }


x86 assembly (clang, -O0):
<_getpid>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_getpid>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @_getpid() {
ret i32 1
}

LLVM IR (-O2):
define i32 @_getpid() {
ret i32 1
}
int sfmt_idxof(int i) { return i; }


x86 assembly (clang, -O0):
<sfmt_idxof>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sfmt_idxof>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @sfmt_idxof(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @sfmt_idxof(i32 returned %0) {
ret i32 %0
}
int do_555() { return 555; }


x86 assembly (clang, -O0):
<do_555>:
push   %rbp
mov    %rsp,%rbp
mov    $0x22b,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_555>:
mov    $0x22b,%eax
ret

LLVM IR (-O0):
define i32 @do_555() {
ret i32 555
}

LLVM IR (-O2):
define i32 @do_555() {
ret i32 555
}
/* Variables and functions */
int strlen(char *);
char toupper(char);
void CD_stoupper(char *s) {
  int x;
  for (x = 0; x < strlen(s); x++)
    s[x] = toupper(s[x]);
}


x86 assembly (clang, -O0):
<CD_stoupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
cmp    %ecx,%eax
jge    117b <CD_stoupper+0x5b>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <toupper@plt>
mov    %al,%dl
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1133 <CD_stoupper+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CD_stoupper>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
test   %eax,%eax
jle    1161 <CD_stoupper+0x41>
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbl (%r14,%rbx,1),%edi
call   1030 <toupper@plt>
mov    %al,(%r14,%rbx,1)
add    $0x1,%rbx
mov    %r14,%rdi
call   1040 <strlen@plt>
cltq
cmp    %rax,%rbx
jl     1140 <CD_stoupper+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @CD_stoupper(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %20, %1
%5 = load i32, i32* %3
%6 = load i8*, i8** %2
%7 = call i32 @strlen(i8* %6)
%8 = icmp slt i32 %5, %7
br i1 %8, label %9, label %23
9: ; preds = %4
%10 = load i8*, i8** %2
%11 = load i32, i32* %3
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i8, i8* %13
%15 = call signext i8 @toupper(i8 signext %14)
%16 = load i8*, i8** %2
%17 = load i32, i32* %3
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
store i8 %15, i8* %19
br label %20
20: ; preds = %9
%21 = load i32, i32* %3
%22 = add nsw i32 %21, 1
store i32 %22, i32* %3
br label %4
23: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @CD_stoupper(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %13
4: ; preds = %1, %4
%5 = phi i64 [ %9, %4 ], [ 0, %1 ]
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = load i8, i8* %6
%8 = tail call signext i8 @toupper(i8 signext %7)
store i8 %8, i8* %6
%9 = add nuw nsw i64 %5, 1
%10 = tail call i32 @strlen(i8* %0)
%11 = sext i32 %10 to i64
%12 = icmp slt i64 %9, %11
br i1 %12, label %4, label %13
13: ; preds = %4, %1
ret void
}
int test_imm_FEuint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0xFE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FEuint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0xfe,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FEuint64_highword_reg>:
movabs $0xfe00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FEuint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 254
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_FEuint64_highword_reg(i64 %0) {
%2 = and i64 %0, 1090921693184
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ msg;

/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ write(int, char *, int);
void _Unwind_SetGR() {
  char msg[] = "Aborting: "
               "_Unwind_SetGR"
               " called "
               "(C++ exception handling is disabled)\n";
  write(2, msg, sizeof(msg) - 1);
  abort();
}


x86 assembly (clang, -O0):
<_Unwind_SetGR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
lea    -0x50(%rbp),%rdi
lea    0xebd(%rip),%rsi
mov    $0x45,%edx
call   1050 <memcpy@plt>
lea    -0x50(%rbp),%rsi
mov    $0x2,%edi
mov    $0x44,%edx
call   1040 <write@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<_Unwind_SetGR>:
sub    $0x48,%rsp
movaps 0xf05(%rip),%xmm0
movaps %xmm0,0x30(%rsp)
movaps 0xee9(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xecd(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xeb1(%rip),%xmm0
movaps %xmm0,(%rsp)
movabs $0xa2964656c6261,%rax
mov    %rax,0x3d(%rsp)
mov    %rsp,%rsi
mov    $0x2,%edi
mov    $0x44,%edx
call   1040 <write@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@__const._Unwind_SetGR.msg = [69 x i8] c"Aborting: _Unwind_SetGR called (C++ exception handling is disabled)\0A\00"
define void @_Unwind_SetGR() {
%1 = alloca [69 x i8]
%2 = bitcast [69 x i8]* %1 to i8*
%3 = getelementptr inbounds [69 x i8], [69 x i8]* %1, i64 0, i64 0
%4 = call i32 @write(i32 2, i8* %3, i32 68)
%5 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@__const._Unwind_SetGR.msg = [69 x i8] c"Aborting: _Unwind_SetGR called (C++ exception handling is disabled)\0A\00"
define void @_Unwind_SetGR() {
%1 = alloca [69 x i8]
%2 = getelementptr inbounds [69 x i8], [69 x i8]* %1, i64 0, i64 0
%3 = call i32 @write(i32 2, i8* %2, i32 68)
%4 = tail call i32 (...) @abort()
unreachable
}
char *hash_plugin_detailed(void) {
  return ("nsldap - nsldap plugin\n"
          "------------------------\n"
          "Use this module to crack LDAP SHA passwords\n"
          "Input should be in form: \'user:hash\' or just \'hash\'\n"
          "Known software that uses this password hashing method:\n"
          "OpenLDAP, various LDAP implementations\n"
          "\nAuthor: Milen Rangelov <gat3way@gat3way.eu>\n");
}


x86 assembly (clang, -O0):
<hash_plugin_detailed>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_plugin_detailed>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [284 x i8] c"nsldap - nsldap plugin\0A------------------------\0AUse this module to crack LDAP SHA passwords\0AInput should be in form: 'user:hash' or just 'hash'\0AKnown software that uses this password hashing method:\0AOpenLDAP, various LDAP implementations\0A\0AAuthor: Milen Rangelov <gat3way@gat3way.eu>\0A\00"
define i8* @hash_plugin_detailed() {
ret i8* getelementptr inbounds ([284 x i8], [284 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [284 x i8] c"nsldap - nsldap plugin\0A------------------------\0AUse this module to crack LDAP SHA passwords\0AInput should be in form: 'user:hash' or just 'hash'\0AKnown software that uses this password hashing method:\0AOpenLDAP, various LDAP implementations\0A\0AAuthor: Milen Rangelov <gat3way@gat3way.eu>\0A\00"
define i8* @hash_plugin_detailed() {
ret i8* getelementptr inbounds ([284 x i8], [284 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ test_int_no1(int, int);
int nearly_nothing() { test_int_no1(1, 2); }


x86 assembly (clang, -O0):
<nearly_nothing>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
mov    $0x2,%esi
call   1030 <test_int_no1@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nearly_nothing>:
mov    $0x1,%edi
mov    $0x2,%esi
jmp    1030 <test_int_no1@plt>

LLVM IR (-O0):
define i32 @nearly_nothing() {
%1 = alloca i32
%2 = call i32 @test_int_no1(i32 1, i32 2)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @nearly_nothing() {
%1 = tail call i32 @test_int_no1(i32 1, i32 2)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, double);
const char *double_to_string(double in_double) {
  static char buffer[100];
  snprintf(buffer, 100, "%lf", in_double);
  return buffer;
}


x86 assembly (clang, -O0):
<double_to_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
lea    0x2f17(%rip),%rdi
mov    $0x64,%esi
lea    0xecb(%rip),%rdx
call   1030 <snprintf@plt>
lea    0x2eff(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<double_to_string>:
push   %rbx
lea    0x2f28(%rip),%rbx
lea    0xee1(%rip),%rdx
mov    %rbx,%rdi
mov    $0x64,%esi
call   1030 <snprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@double_to_string.buffer = internal global [100 x i8] zeroinitializer
@.str = [4 x i8] c"%lf\00"
define i8* @double_to_string(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @snprintf(i8* getelementptr inbounds ([100 x i8], [100 x i8]* @double_to_string.buffer, i64 0, i64 0), i32 100, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %3)
ret i8* getelementptr inbounds ([100 x i8], [100 x i8]* @double_to_string.buffer, i64 0, i64 0)
}

LLVM IR (-O2):
@double_to_string.buffer = internal global [100 x i8] zeroinitializer
@.str = [4 x i8] c"%lf\00"
define i8* @double_to_string(double %0) {
%2 = tail call i32 @snprintf(i8* getelementptr inbounds ([100 x i8], [100 x i8]* @double_to_string.buffer, i64 0, i64 0), i32 100, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %0)
ret i8* getelementptr inbounds ([100 x i8], [100 x i8]* @double_to_string.buffer, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/ *);
void drm_print_help(FILE *f) {
  fputs("Adjust gamma ramps with Direct Rendering Manager.\n", f);
  fputs("\n", f);
  fputs("  card=N\tGraphics card to apply adjustments to\n"
        "  crtc=N\tCRTC to apply adjustments to\n",
        f);
  fputs("\n", f);
}


x86 assembly (clang, -O0):
<drm_print_help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <fputs@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
call   1030 <fputs@plt>
mov    -0x8(%rbp),%rsi
lea    0xeec(%rip),%rdi
call   1030 <fputs@plt>
mov    -0x8(%rbp),%rsi
lea    0xeda(%rip),%rdi
call   1030 <fputs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drm_print_help>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
mov    $0x32,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1040 <fwrite@plt>
mov    $0xa,%edi
mov    %rbx,%rsi
call   1030 <fputc@plt>
lea    0xee2(%rip),%rdi
mov    $0x55,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1040 <fwrite@plt>
mov    $0xa,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <fputc@plt>

LLVM IR (-O0):
@.str = [51 x i8] c"Adjust gamma ramps with Direct Rendering Manager.\0A\00"
@.str.1 = [2 x i8] c"\0A\00"
@.str.2 = [86 x i8] c" card=N\09Graphics card to apply adjustments to\0A crtc=N\09CRTC to apply adjustments to\0A\00"
define void @drm_print_help(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fputs(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0), i32* %3)
%5 = load i32*, i32** %2
%6 = call i32 @fputs(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32* %5)
%7 = load i32*, i32** %2
%8 = call i32 @fputs(i8* getelementptr inbounds ([86 x i8], [86 x i8]* @.str.2, i64 0, i64 0), i32* %7)
%9 = load i32*, i32** %2
%10 = call i32 @fputs(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32* %9)
ret void
}

LLVM IR (-O2):
@.str = [51 x i8] c"Adjust gamma ramps with Direct Rendering Manager.\0A\00"
@.str.2 = [86 x i8] c" card=N\09Graphics card to apply adjustments to\0A crtc=N\09CRTC to apply adjustments to\0A\00"
define void @drm_print_help(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0), i64 50, i64 1, i32* %0)
%3 = tail call i32 @fputc(i32 10, i32* %0)
%4 = tail call i64 @fwrite(i8* getelementptr inbounds ([86 x i8], [86 x i8]* @.str.2, i64 0, i64 0), i64 85, i64 1, i32* %0)
%5 = tail call i32 @fputc(i32 10, i32* %0)
ret void
}
int test_imm_CDint64_highword_mem(long long *val) {
  return ((*val >> 32) & (0xCD << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CDint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x20,%rdx
and    $0xcd,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CDint64_highword_mem>:
testb  $0xcd,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CDint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 32
%6 = and i64 %5, 205
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_CDint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 880468295680
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int mls_type_set_short(unsigned char *buf, unsigned int *len, short src) {
  int size = 2;
  assert(2 <= *len);
  buf[0] = (unsigned char)((src >> 8) & 0xff);
  buf[1] = (unsigned char)(src & 0xff);
  *len -= size;
  return size;
}


x86 assembly (clang, -O0):
<mls_type_set_short>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dx,%ax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %ax,-0x12(%rbp)
movl   $0x2,-0x18(%rbp)
mov    -0x10(%rbp),%rcx
mov    $0x2,%eax
cmp    (%rcx),%eax
setbe  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
movswl -0x12(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
movswl -0x12(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x18(%rbp),%edx
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
sub    %edx,%ecx
mov    %ecx,(%rax)
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mls_type_set_short>:
push   %r15
push   %r14
push   %rbx
mov    %edx,%ebx
mov    %rsi,%r14
mov    %rdi,%r15
xor    %edi,%edi
cmpl   $0x2,(%rsi)
setae  %dil
call   1030 <assert@plt>
rol    $0x8,%bx
mov    %bx,(%r15)
addl   $0xfffffffe,(%r14)
mov    $0x2,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @mls_type_set_short(i8* %0, i32* %1, i16 signext %2) {
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i16
%7 = alloca i32
store i8* %0, i8** %4
store i32* %1, i32** %5
store i16 %2, i16* %6
store i32 2, i32* %7
%8 = load i32*, i32** %5
%9 = load i32, i32* %8
%10 = icmp ule i32 2, %9
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i16, i16* %6
%14 = sext i16 %13 to i32
%15 = ashr i32 %14, 8
%16 = and i32 %15, 255
%17 = trunc i32 %16 to i8
%18 = load i8*, i8** %4
%19 = getelementptr inbounds i8, i8* %18, i64 0
store i8 %17, i8* %19
%20 = load i16, i16* %6
%21 = sext i16 %20 to i32
%22 = and i32 %21, 255
%23 = trunc i32 %22 to i8
%24 = load i8*, i8** %4
%25 = getelementptr inbounds i8, i8* %24, i64 1
store i8 %23, i8* %25
%26 = load i32, i32* %7
%27 = load i32*, i32** %5
%28 = load i32, i32* %27
%29 = sub i32 %28, %26
store i32 %29, i32* %27
%30 = load i32, i32* %7
ret i32 %30
}

LLVM IR (-O2):
define i32 @mls_type_set_short(i8* nocapture writeonly %0, i32* nocapture %1, i16 signext %2) {
%4 = load i32, i32* %1
%5 = icmp ugt i32 %4, 1
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
%8 = lshr i16 %2, 8
%9 = trunc i16 %8 to i8
store i8 %9, i8* %0
%10 = trunc i16 %2 to i8
%11 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %10, i8* %11
%12 = load i32, i32* %1
%13 = add i32 %12, -2
store i32 %13, i32* %1
ret i32 2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
char fgetc(int /*<<< orphan*/ *);
int /*<<< orphan*/ ungetc(char, int /*<<< orphan*/ *);
char peek(FILE *f) {
  char c = fgetc(f);
  ungetc(c, f);
  return c;
}


x86 assembly (clang, -O0):
<peek>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
mov    -0x8(%rbp),%rsi
movsbl %al,%edi
call   1040 <ungetc@plt>
movsbl -0x9(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<peek>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <fgetc@plt>
movsbl %al,%ebp
mov    %ebp,%edi
mov    %rbx,%rsi
call   1040 <ungetc@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define signext i8 @peek(i32* %0) {
%2 = alloca i32*
%3 = alloca i8
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call signext i8 @fgetc(i32* %4)
store i8 %5, i8* %3
%6 = load i8, i8* %3
%7 = load i32*, i32** %2
%8 = call i32 @ungetc(i8 signext %6, i32* %7)
%9 = load i8, i8* %3
ret i8 %9
}

LLVM IR (-O2):
define signext i8 @peek(i32* nocapture %0) {
%2 = tail call signext i8 @fgetc(i32* %0)
%3 = tail call i32 @ungetc(i8 signext %2, i32* %0)
ret i8 %2
}
/* Variables and functions */
int __udivsi3(int, int);
int __divsi3(int n, int d) {
  int minus = 0;
  if (n < 0) {
    n = -n;
    minus++;
  }
  if (d < 0) {
    d = -d;
    minus++;
  }
  int q = __udivsi3(n, d);
  if (minus == 1)
    q = -q;
  return q;
}


x86 assembly (clang, -O0):
<__divsi3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1140 <__divsi3+0x30>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    115b <__divsi3+0x4b>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <__udivsi3@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x1,-0xc(%rbp)
jne    117b <__divsi3+0x6b>
xor    %eax,%eax
sub    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__divsi3>:
push   %rbx
mov    %esi,%ebx
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
shr    $0x1f,%edi
neg    %esi
cmovs  %ebx,%esi
shr    $0x1f,%ebx
add    %edi,%ebx
mov    %eax,%edi
call   1030 <__udivsi3@plt>
mov    %eax,%ecx
neg    %ecx
cmp    $0x1,%ebx
cmove  %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @__divsi3(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
%7 = load i32, i32* %3
%8 = icmp slt i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %2
%10 = load i32, i32* %3
%11 = sub nsw i32 0, %10
store i32 %11, i32* %3
%12 = load i32, i32* %5
%13 = add nsw i32 %12, 1
store i32 %13, i32* %5
br label %14
14: ; preds = %9, %2
%15 = load i32, i32* %4
%16 = icmp slt i32 %15, 0
br i1 %16, label %17, label %22
17: ; preds = %14
%18 = load i32, i32* %4
%19 = sub nsw i32 0, %18
store i32 %19, i32* %4
%20 = load i32, i32* %5
%21 = add nsw i32 %20, 1
store i32 %21, i32* %5
br label %22
22: ; preds = %17, %14
%23 = load i32, i32* %3
%24 = load i32, i32* %4
%25 = call i32 @__udivsi3(i32 %23, i32 %24)
store i32 %25, i32* %6
%26 = load i32, i32* %5
%27 = icmp eq i32 %26, 1
br i1 %27, label %28, label %31
28: ; preds = %22
%29 = load i32, i32* %6
%30 = sub nsw i32 0, %29
store i32 %30, i32* %6
br label %31
31: ; preds = %28, %22
%32 = load i32, i32* %6
ret i32 %32
}

LLVM IR (-O2):
define i32 @__divsi3(i32 %0, i32 %1) {
%3 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
%4 = lshr i32 %0, 31
%5 = tail call i32 @llvm.abs.i32(i32 %1, i1 true)
%6 = lshr i32 %1, 31
%7 = add nuw nsw i32 %6, %4
%8 = tail call i32 @__udivsi3(i32 %3, i32 %5)
%9 = icmp eq i32 %7, 1
%10 = sub nsw i32 0, %8
%11 = select i1 %9, i32 %10, i32 %8
ret i32 %11
}
/* Variables and functions */
int Isleap(int);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int startyear = 4000, i;
  for (i = 0; i < 1; i++) {
    if (Isleap(startyear) == 1) {
      printf("The year %d is a leap year!\n", startyear);
    } else
      printf("The year %d is not a leap year!", startyear);
    startyear++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xfa0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jge    1192 <main+0x72>
mov    -0x8(%rbp),%edi
call   1040 <Isleap@plt>
cmp    $0x1,%eax
jne    116c <main+0x4c>
mov    -0x8(%rbp),%esi
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
jmp    117b <main+0x5b>
mov    -0x8(%rbp),%esi
lea    0xea7(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    113d <main+0x1d>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xfa0,%edi
call   1040 <Isleap@plt>
cmp    $0x1,%eax
lea    0xecb(%rip),%rax
lea    0xee1(%rip),%rdi
cmove  %rax,%rdi
mov    $0xfa0,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"The year %d is a leap year!\0A\00"
@.str.1 = [32 x i8] c"The year %d is not a leap year!\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 4000, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %20, %0
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 1
br i1 %6, label %7, label %23
7: ; preds = %4
%8 = load i32, i32* %2
%9 = call i32 @Isleap(i32 %8)
%10 = icmp eq i32 %9, 1
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, i32* %2
%13 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %12)
br label %17
14: ; preds = %7
%15 = load i32, i32* %2
%16 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.1, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %14, %11
%18 = load i32, i32* %2
%19 = add nsw i32 %18, 1
store i32 %19, i32* %2
br label %20
20: ; preds = %17
%21 = load i32, i32* %3
%22 = add nsw i32 %21, 1
store i32 %22, i32* %3
br label %4
23: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
@.str = [29 x i8] c"The year %d is a leap year!\0A\00"
@.str.1 = [32 x i8] c"The year %d is not a leap year!\00"
define i32 @main() {
%1 = tail call i32 @Isleap(i32 4000)
%2 = icmp eq i32 %1, 1
%3 = select i1 %2, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.1, i64 0, i64 0)
%4 = tail call i32 @printf(i8* %3, i32 4000)
ret i32 0
}
/* Variables and functions */
int rand();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int __VERIFIER_nondet_int() {
  srand(time(NULL));
  return rand();
}


x86 assembly (clang, -O0):
<__VERIFIER_nondet_int>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
mov    $0x0,%al
call   1050 <rand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__VERIFIER_nondet_int>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <rand@plt>

LLVM IR (-O0):
define i32 @__VERIFIER_nondet_int() {
%1 = call i32 @time(i32* null)
%2 = call i32 @srand(i32 %1)
%3 = call i32 (...) @rand()
ret i32 %3
}

LLVM IR (-O2):
define i32 @__VERIFIER_nondet_int() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 @srand(i32 %1)
%3 = tail call i32 (...) @rand()
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ _HibernateWriteComplete();
void HibernateTamperEventsClear(void) {
  (*((volatile unsigned long *)(0x400FC360))) = 0xA3359554;
  _HibernateWriteComplete();
  (*((volatile unsigned long *)(0x400FC400))) |= 0x00000010;
  _HibernateWriteComplete();
  (*((volatile unsigned long *)(0x400FC360))) = 0;
  _HibernateWriteComplete();
}


x86 assembly (clang, -O0):
<HibernateTamperEventsClear>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400fc360,%eax
mov    $0xa3359554,%ecx
mov    %rcx,(%rax)
mov    $0x0,%al
call   1030 <_HibernateWriteComplete@plt>
mov    $0x400fc400,%eax
mov    (%rax),%rcx
or     $0x10,%rcx
mov    $0x400fc400,%eax
mov    %rcx,(%rax)
mov    $0x0,%al
call   1030 <_HibernateWriteComplete@plt>
mov    $0x400fc360,%eax
movq   $0x0,(%rax)
mov    $0x0,%al
call   1030 <_HibernateWriteComplete@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateTamperEventsClear>:
push   %rax
mov    $0xa3359554,%eax
mov    %rax,0x400fc360
40
xor    %eax,%eax
call   1030 <_HibernateWriteComplete@plt>
orq    $0x10,0x400fc400
40 10
xor    %eax,%eax
call   1030 <_HibernateWriteComplete@plt>
movq   $0x0,0x400fc360
xor    %eax,%eax
pop    %rcx
jmp    1030 <_HibernateWriteComplete@plt>

LLVM IR (-O0):
define void @HibernateTamperEventsClear() {
store volatile i64 2738197844, i64* inttoptr (i64 1074774880 to i64*)
%1 = call i32 (...) @_HibernateWriteComplete()
%2 = load volatile i64, i64* inttoptr (i64 1074775040 to i64*)
%3 = or i64 %2, 16
store volatile i64 %3, i64* inttoptr (i64 1074775040 to i64*)
%4 = call i32 (...) @_HibernateWriteComplete()
store volatile i64 0, i64* inttoptr (i64 1074774880 to i64*)
%5 = call i32 (...) @_HibernateWriteComplete()
ret void
}

LLVM IR (-O2):
define void @HibernateTamperEventsClear() {
store volatile i64 2738197844, i64* inttoptr (i64 1074774880 to i64*)
%1 = tail call i32 (...) @_HibernateWriteComplete()
%2 = load volatile i64, i64* inttoptr (i64 1074775040 to i64*)
%3 = or i64 %2, 16
store volatile i64 %3, i64* inttoptr (i64 1074775040 to i64*)
%4 = tail call i32 (...) @_HibernateWriteComplete()
store volatile i64 0, i64* inttoptr (i64 1074774880 to i64*)
%5 = tail call i32 (...) @_HibernateWriteComplete()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Reserved39_DriverIRQHandler();
__attribute__((weak)) void Reserved39_IRQHandler(void) {
  Reserved39_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<Reserved39_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Reserved39_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Reserved39_IRQHandler>:
xor    %eax,%eax
jmp    1030 <Reserved39_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @Reserved39_IRQHandler() {
%1 = call i32 (...) @Reserved39_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @Reserved39_IRQHandler() {
%1 = tail call i32 (...) @Reserved39_DriverIRQHandler()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
void derror(char *text) {
  printf("  panic:%s\n", text);
  exit(1);
}


x86 assembly (clang, -O0):
<derror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<derror>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [12 x i8] c" panic:%s\0A\00"
define void @derror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [12 x i8] c" panic:%s\0A\00"
define void @derror(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
int sme_proc_obss_scan(struct wpa_supplicant *wpa_s) { return 0; }


x86 assembly (clang, -O0):
<sme_proc_obss_scan>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sme_proc_obss_scan>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.wpa_supplicant = type opaque
define i32 @sme_proc_obss_scan(%struct.wpa_supplicant* %0) {
%2 = alloca %struct.wpa_supplicant*
store %struct.wpa_supplicant* %0, %struct.wpa_supplicant** %2
ret i32 0
}

LLVM IR (-O2):
%struct.wpa_supplicant = type opaque
define i32 @sme_proc_obss_scan(%struct.wpa_supplicant* nocapture readnone %0) {
ret i32 0
}
int a(int temp) {
  temp += 1;
  printf("%s(0): %p\n", __func__, __builtin_return_address(0));
  b();
  return temp;
}


x86 assembly (clang, -O0):
<a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    0x8(%rbp),%rdx
lea    0xec1(%rip),%rdi
lea    0xec5(%rip),%rsi
mov    $0x0,%al
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <b@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<a>:
push   %rbx
lea    0x1(%rdi),%ebx
mov    0x8(%rsp),%rdx
lea    0xed0(%rip),%rdi
lea    0xed4(%rip),%rsi
xor    %eax,%eax
call   1040 <printf@plt>
xor    %eax,%eax
call   1030 <b@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"%s(0): %p\0A\00"
@__func__.a = [2 x i8] c"a\00"
define i32 @a(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
store i32 %4, i32* %2
%5 = call i8* @llvm.returnaddress(i32 0)
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @__func__.a, i64 0, i64 0), i8* %5)
%7 = call i32 (...) @b()
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
@.str = [11 x i8] c"%s(0): %p\0A\00"
@__func__.a = [2 x i8] c"a\00"
define i32 @a(i32 %0) {
%2 = add nsw i32 %0, 1
%3 = tail call i8* @llvm.returnaddress(i32 0)
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @__func__.a, i64 0, i64 0), i8* %3)
%5 = tail call i32 (...) @b()
ret i32 %2
}
int condition_m(char c) { return c == 'm'; }


x86 assembly (clang, -O0):
<condition_m>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x6d,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<condition_m>:
xor    %eax,%eax
cmp    $0x6d,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @condition_m(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 109
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @condition_m(i8 signext %0) {
%2 = icmp eq i8 %0, 109
%3 = zext i1 %2 to i32
ret i32 %3
}
void foo325(int p) {}


x86 assembly (clang, -O0):
<foo325>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo325>:
ret

LLVM IR (-O0):
define void @foo325(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo325(i32 %0) {
ret void
}
int test_imm_6Fuint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0x6F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Fuint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0x6f,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Fuint64_highword_reg>:
movabs $0x6f00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Fuint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 111
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_6Fuint64_highword_reg(i64 %0) {
%2 = and i64 %0, 476741369856
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int read16(int);
int /*<<< orphan*/ write16(int, int);
void dsp_reset(void) {
  write16(0x0c00500a, read16(0x0c00500a) & ~0x01f8);
  write16(0x0c00500a, read16(0x0c00500a) | 0x0010);
  write16(0x0c005036, 0);
}


x86 assembly (clang, -O0):
<dsp_reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc00500a,%edi
call   1030 <read16@plt>
mov    %eax,%esi
and    $0xfffffe07,%esi
mov    $0xc00500a,%edi
call   1040 <write16@plt>
mov    $0xc00500a,%edi
call   1030 <read16@plt>
mov    %eax,%esi
or     $0x10,%esi
mov    $0xc00500a,%edi
call   1040 <write16@plt>
mov    $0xc005036,%edi
xor    %esi,%esi
call   1040 <write16@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dsp_reset>:
push   %rax
mov    $0xc00500a,%edi
call   1030 <read16@plt>
and    $0xfffffe07,%eax
mov    $0xc00500a,%edi
mov    %eax,%esi
call   1040 <write16@plt>
mov    $0xc00500a,%edi
call   1030 <read16@plt>
or     $0x10,%eax
mov    $0xc00500a,%edi
mov    %eax,%esi
call   1040 <write16@plt>
mov    $0xc005036,%edi
xor    %esi,%esi
pop    %rax
jmp    1040 <write16@plt>

LLVM IR (-O0):
define void @dsp_reset() {
%1 = call i32 @read16(i32 201347082)
%2 = and i32 %1, -505
%3 = call i32 @write16(i32 201347082, i32 %2)
%4 = call i32 @read16(i32 201347082)
%5 = or i32 %4, 16
%6 = call i32 @write16(i32 201347082, i32 %5)
%7 = call i32 @write16(i32 201347126, i32 0)
ret void
}

LLVM IR (-O2):
define void @dsp_reset() {
%1 = tail call i32 @read16(i32 201347082)
%2 = and i32 %1, -505
%3 = tail call i32 @write16(i32 201347082, i32 %2)
%4 = tail call i32 @read16(i32 201347082)
%5 = or i32 %4, 16
%6 = tail call i32 @write16(i32 201347082, i32 %5)
%7 = tail call i32 @write16(i32 201347126, i32 0)
ret void
}
__attribute__((__naked__)) void SGVObjcMsgSendSuperTrampolineSwift(void) {
  asm volatile("addq $"
               "16"
               ", "
               "%%rdi"
               "\n\t"
               "jmp "
               "_objc_msgSendSuper"
               "\n\t"
               :
               :
               : "rsi", "rdi");
}


x86 assembly (clang, -O0):
<SGVObjcMsgSendSuperTrampolineSwift>:
add    $0x10,%rdi
jmp    1030 <_objc_msgSendSuper@plt>

x86 assembly (clang, -O2):
<SGVObjcMsgSendSuperTrampolineSwift>:
add    $0x10,%rdi
jmp    1030 <_objc_msgSendSuper@plt>

LLVM IR (-O0):
define void @SGVObjcMsgSendSuperTrampolineSwift() {
unreachable
}

LLVM IR (-O2):
define void @SGVObjcMsgSendSuperTrampolineSwift() {
tail call void asm sideeffect "addq $$16, %rdi\0A\09jmp _objc_msgSendSuper\0A\09", "~{rsi},~{rdi},~{dirflag},~{fpsr},~{flags}"()
unreachable
}
int ft_isalnum(int c) {
  if (((c >= 65 && c <= 90) || (c >= 97 && c <= 122)) || (c >= 48 && c <= 57))
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<ft_isalnum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x41,-0x8(%rbp)
jl     111b <ft_isalnum+0x1b>
cmpl   $0x5a,-0x8(%rbp)
jle    1143 <ft_isalnum+0x43>
cmpl   $0x61,-0x8(%rbp)
jl     112f <ft_isalnum+0x2f>
cmpl   $0x7a,-0x8(%rbp)
jle    1143 <ft_isalnum+0x43>
cmpl   $0x30,-0x8(%rbp)
jl     114f <ft_isalnum+0x4f>
cmpl   $0x39,-0x8(%rbp)
jg     114f <ft_isalnum+0x4f>
movl   $0x1,-0x4(%rbp)
jmp    1156 <ft_isalnum+0x56>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isalnum>:
mov    %edi,%eax
and    $0xffffffdf,%eax
add    $0xffffffbf,%eax
cmp    $0x1a,%eax
setb   %al
add    $0xffffffd0,%edi
cmp    $0xa,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @ft_isalnum(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 65
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 90
br i1 %8, label %21, label %9
9: ; preds = %6, %1
%10 = load i32, i32* %3
%11 = icmp sge i32 %10, 97
br i1 %11, label %12, label %15
12: ; preds = %9
%13 = load i32, i32* %3
%14 = icmp sle i32 %13, 122
br i1 %14, label %21, label %15
15: ; preds = %12, %9
%16 = load i32, i32* %3
%17 = icmp sge i32 %16, 48
br i1 %17, label %18, label %22
18: ; preds = %15
%19 = load i32, i32* %3
%20 = icmp sle i32 %19, 57
br i1 %20, label %21, label %22
21: ; preds = %18, %12, %6
store i32 1, i32* %2
br label %23
22: ; preds = %18, %15
store i32 0, i32* %2
br label %23
23: ; preds = %22, %21
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @ft_isalnum(i32 %0) {
%2 = and i32 %0, -33
%3 = add i32 %2, -65
%4 = icmp ult i32 %3, 26
%5 = add i32 %0, -48
%6 = icmp ult i32 %5, 10
%7 = or i1 %6, %4
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
scalar_t__ floor(double);
int GLRound(double x) { return ((int)floor(x + 0.5)); }


x86 assembly (clang, -O0):
<GLRound>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xedb(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
call   1030 <floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GLRound>:
addsd  0xee8(%rip),%xmm0
jmp    1030 <floor@plt>

LLVM IR (-O0):
define i32 @GLRound(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double %3, 5.000000e-01
%5 = call i64 @floor(double %4)
%6 = trunc i64 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @GLRound(double %0) {
%2 = fadd double %0, 5.000000e-01
%3 = tail call i64 @floor(double %2)
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
int strncmp(char const *, char const *, size_t);
int c_strncmp(const char *s1, const char *s2, size_t n) {
  return strncmp(s1, s2, n);
}


x86 assembly (clang, -O0):
<c_strncmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_strncmp>:
jmp    1030 <strncmp@plt>

LLVM IR (-O0):
define i32 @c_strncmp(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @strncmp(i8* %7, i8* %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @c_strncmp(i8* nocapture %0, i8* nocapture %1, i64 %2) {
%4 = tail call i32 @strncmp(i8* %0, i8* %1, i64 %2)
ret i32 %4
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ h265nal_init(int *);
int /*<<< orphan*/ h265nal_set_type(int *, int);
void h265sps_init(uint8_t *p_h265sps) {
  h265nal_init(p_h265sps);
  h265nal_set_type(p_h265sps, 33);
  p_h265sps[5] = 0x0;
}


x86 assembly (clang, -O0):
<h265sps_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <h265nal_init@plt>
mov    -0x8(%rbp),%rdi
mov    $0x21,%esi
call   1030 <h265nal_set_type@plt>
mov    -0x8(%rbp),%rax
movl   $0x0,0x14(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h265sps_init>:
push   %rbx
mov    %rdi,%rbx
call   1040 <h265nal_init@plt>
mov    %rbx,%rdi
mov    $0x21,%esi
call   1030 <h265nal_set_type@plt>
movl   $0x0,0x14(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @h265sps_init(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @h265nal_init(i32* %3)
%5 = load i32*, i32** %2
%6 = call i32 @h265nal_set_type(i32* %5, i32 33)
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 5
store i32 0, i32* %8
ret void
}

LLVM IR (-O2):
define void @h265sps_init(i32* %0) {
%2 = tail call i32 @h265nal_init(i32* %0)
%3 = tail call i32 @h265nal_set_type(i32* %0, i32 33)
%4 = getelementptr inbounds i32, i32* %0, i64 5
store i32 0, i32* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ rand();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
void ruspma_rand_init() {
  srand(time(NULL));
  rand();
}


x86 assembly (clang, -O0):
<ruspma_rand_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
mov    $0x0,%al
call   1050 <rand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ruspma_rand_init>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <rand@plt>

LLVM IR (-O0):
define void @ruspma_rand_init() {
%1 = call i32 @time(i32* null)
%2 = call i32 @srand(i32 %1)
%3 = call i32 (...) @rand()
ret void
}

LLVM IR (-O2):
define void @ruspma_rand_init() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 @srand(i32 %1)
%3 = tail call i32 (...) @rand()
ret void
}
int StringComparisonOutputChar(char first, char second,
                               int isSmallerOrGreater) {
  int output = 0;
  if (isSmallerOrGreater == 0) {
    output = (first < second ? 1 : 0);
  } else
    output = (first > second ? 1 : 0);
  return output;
}


x86 assembly (clang, -O0):
<StringComparisonOutputChar>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    %edx,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1140 <StringComparisonOutputChar+0x40>
movsbl -0x1(%rbp),%edx
movsbl -0x2(%rbp),%esi
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %esi,%edx
cmovl  %ecx,%eax
mov    %eax,-0xc(%rbp)
jmp    1157 <StringComparisonOutputChar+0x57>
movsbl -0x1(%rbp),%edx
movsbl -0x2(%rbp),%esi
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %esi,%edx
cmovg  %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<StringComparisonOutputChar>:
xor    %eax,%eax
xor    %ecx,%ecx
cmp    %sil,%dil
setl   %al
setg   %cl
test   %edx,%edx
cmove  %eax,%ecx
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @StringComparisonOutputChar(i8 signext %0, i8 signext %1, i32 %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i32
%7 = alloca i32
store i8 %0, i8* %4
store i8 %1, i8* %5
store i32 %2, i32* %6
store i32 0, i32* %7
%8 = load i32, i32* %6
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %3
%11 = load i8, i8* %4
%12 = sext i8 %11 to i32
%13 = load i8, i8* %5
%14 = sext i8 %13 to i32
%15 = icmp slt i32 %12, %14
%16 = zext i1 %15 to i64
%17 = select i1 %15, i32 1, i32 0
store i32 %17, i32* %7
br label %26
18: ; preds = %3
%19 = load i8, i8* %4
%20 = sext i8 %19 to i32
%21 = load i8, i8* %5
%22 = sext i8 %21 to i32
%23 = icmp sgt i32 %20, %22
%24 = zext i1 %23 to i64
%25 = select i1 %23, i32 1, i32 0
store i32 %25, i32* %7
br label %26
26: ; preds = %18, %10
%27 = load i32, i32* %7
ret i32 %27
}

LLVM IR (-O2):
define i32 @StringComparisonOutputChar(i8 signext %0, i8 signext %1, i32 %2) {
%4 = icmp eq i32 %2, 0
%5 = icmp slt i8 %0, %1
%6 = icmp sgt i8 %0, %1
%7 = select i1 %4, i1 %5, i1 %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ Py_Finalize();
int /*<<< orphan*/ Py_Initialize();
int /*<<< orphan*/ Py_Main(int, char **);
void mypython_main_interactive(int argc, char **argv) {
  Py_Initialize();
  Py_Main(argc, argv);
  Py_Finalize();
}


x86 assembly (clang, -O0):
<mypython_main_interactive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <Py_Initialize@plt>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <Py_Main@plt>
mov    $0x0,%al
call   1050 <Py_Finalize@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mypython_main_interactive>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <Py_Initialize@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
call   1040 <Py_Main@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <Py_Finalize@plt>

LLVM IR (-O0):
define void @mypython_main_interactive(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @Py_Initialize()
%6 = load i32, i32* %3
%7 = load i8**, i8*** %4
%8 = call i32 @Py_Main(i32 %6, i8** %7)
%9 = call i32 (...) @Py_Finalize()
ret void
}

LLVM IR (-O2):
define void @mypython_main_interactive(i32 %0, i8** %1) {
%3 = tail call i32 (...) @Py_Initialize()
%4 = tail call i32 @Py_Main(i32 %0, i8** %1)
%5 = tail call i32 (...) @Py_Finalize()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ swap_arr_test();
int /*<<< orphan*/ swap_int_test();
int main(void) {
  swap_int_test();
  swap_arr_test();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <swap_int_test@plt>
mov    $0x0,%al
call   1030 <swap_arr_test@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <swap_int_test@plt>
xor    %eax,%eax
call   1030 <swap_arr_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @swap_int_test()
%2 = call i32 (...) @swap_arr_test()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @swap_int_test()
%2 = tail call i32 (...) @swap_arr_test()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ japi_setsplitpaneleft(int, int);
void j_setsplitpaneleft(int arg0, int arg1) {
  japi_setsplitpaneleft(arg0, arg1);
}


x86 assembly (clang, -O0):
<j_setsplitpaneleft>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <japi_setsplitpaneleft@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<j_setsplitpaneleft>:
jmp    1030 <japi_setsplitpaneleft@plt>

LLVM IR (-O0):
define void @j_setsplitpaneleft(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @japi_setsplitpaneleft(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @j_setsplitpaneleft(i32 %0, i32 %1) {
%3 = tail call i32 @japi_setsplitpaneleft(i32 %0, i32 %1)
ret void
}