xunge/DecIR huggingface dataset:
double degRange(double d) {
  while (d >= 360.0)
    d -= 360.0;
  while (d < 0.0)
    d += 360.0;
  return d;
}


x86 assembly (clang, -O0):
<degRange>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
ucomisd %xmm1,%xmm0
jb     113b <degRange+0x3b>
movsd  -0x8(%rbp),%xmm0
movsd  0xed3(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1109 <degRange+0x9>
jmp    1140 <degRange+0x40>
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    1165 <degRange+0x65>
movsd  0xeaa(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1140 <degRange+0x40>
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<degRange>:
ucomisd 0xef8(%rip),%xmm0
jb     112a <degRange+0x2a>
movsd  0xef6(%rip),%xmm1
movsd  0xee6(%rip),%xmm2
nopw   0x0(%rax,%rax,1)
addsd  %xmm1,%xmm0
ucomisd %xmm2,%xmm0
jae    1120 <degRange+0x20>
xorpd  %xmm1,%xmm1
ucomisd %xmm0,%xmm1
jbe    114a <degRange+0x4a>
movsd  0xec4(%rip),%xmm2
nopl   0x0(%rax)
addsd  %xmm2,%xmm0
ucomisd %xmm0,%xmm1
ja     1140 <degRange+0x40>
ret

LLVM IR (-O0):
define double @degRange(double %0) {
%2 = alloca double
store double %0, double* %2
br label %3
3: ; preds = %6, %1
%4 = load double, double* %2
%5 = fcmp oge double %4, 3.600000e+02
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load double, double* %2
%8 = fsub double %7, 3.600000e+02
store double %8, double* %2
br label %3
9: ; preds = %3
br label %10
10: ; preds = %13, %9
%11 = load double, double* %2
%12 = fcmp olt double %11, 0.000000e+00
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load double, double* %2
%15 = fadd double %14, 3.600000e+02
store double %15, double* %2
br label %10
16: ; preds = %10
%17 = load double, double* %2
ret double %17
}

LLVM IR (-O2):
define double @degRange(double %0) {
%2 = fcmp ult double %0, 3.600000e+02
br i1 %2, label %3, label %6
3: ; preds = %6, %1
%4 = phi double [ %0, %1 ], [ %8, %6 ]
%5 = fcmp olt double %4, 0.000000e+00
br i1 %5, label %10, label %14
6: ; preds = %1, %6
%7 = phi double [ %8, %6 ], [ %0, %1 ]
%8 = fadd double %7, -3.600000e+02
%9 = fcmp ult double %8, 3.600000e+02
br i1 %9, label %3, label %6
10: ; preds = %3, %10
%11 = phi double [ %12, %10 ], [ %4, %3 ]
%12 = fadd double %11, 3.600000e+02
%13 = fcmp olt double %12, 0.000000e+00
br i1 %13, label %10, label %14
14: ; preds = %10, %3
%15 = phi double [ %4, %3 ], [ %12, %10 ]
ret double %15
}
int exact_square(num) {
  int i, sqr;
  i = num;
  while (i != 0) {
    sqr = i * i;
    if (sqr == num) {
      return 1;
    }
    i--;
  }
  return 0;
}


x86 assembly (clang, -O0):
<exact_square>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1147 <exact_square+0x47>
mov    -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jne    1139 <exact_square+0x39>
movl   $0x1,-0x4(%rbp)
jmp    114e <exact_square+0x4e>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    110d <exact_square+0xd>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<exact_square>:
xor    %eax,%eax
test   %edi,%edi
je     111e <exact_square+0x1e>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
mov    %ecx,%edx
imul   %ecx,%edx
cmp    %edi,%edx
je     111f <exact_square+0x1f>
add    $0xffffffff,%ecx
jne    1110 <exact_square+0x10>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @exact_square(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
%6 = load i32, i32* %3
store i32 %6, i32* %4
br label %7
7: ; preds = %18, %1
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %21
10: ; preds = %7
%11 = load i32, i32* %4
%12 = load i32, i32* %4
%13 = mul nsw i32 %11, %12
store i32 %13, i32* %5
%14 = load i32, i32* %5
%15 = load i32, i32* %3
%16 = icmp eq i32 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %10
store i32 1, i32* %2
br label %22
18: ; preds = %10
%19 = load i32, i32* %4
%20 = add nsw i32 %19, -1
store i32 %20, i32* %4
br label %7
21: ; preds = %7
store i32 0, i32* %2
br label %22
22: ; preds = %21, %17
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @exact_square(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %5
3: ; preds = %5
%4 = icmp eq i32 %9, 0
br i1 %4, label %10, label %5
5: ; preds = %1, %3
%6 = phi i32 [ %9, %3 ], [ %0, %1 ]
%7 = mul nsw i32 %6, %6
%8 = icmp eq i32 %7, %0
%9 = add nsw i32 %6, -1
br i1 %8, label %10, label %3
10: ; preds = %5, %3, %1
%11 = phi i32 [ 0, %1 ], [ 0, %3 ], [ 1, %5 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ cctools_debug(long long, char *);
int disk_alloc_delete(char *loc) {
  cctools_debug((1LL << 2), "Platform not supported by this library.\n");
  return 1;
}


x86 assembly (clang, -O0):
<disk_alloc_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x4,%edi
lea    0xed8(%rip),%rsi
call   1030 <cctools_debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disk_alloc_delete>:
push   %rax
lea    0xee8(%rip),%rsi
mov    $0x4,%edi
call   1030 <cctools_debug@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [41 x i8] c"Platform not supported by this library.\0A\00"
define i32 @disk_alloc_delete(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @cctools_debug(i64 4, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@.str = [41 x i8] c"Platform not supported by this library.\0A\00"
define i32 @disk_alloc_delete(i8* nocapture readnone %0) {
%2 = tail call i32 @cctools_debug(i64 4, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
ret i32 1
}
__typeof__(sscanf(1, (void *)1)) test_sscanf_226(void) {
  return sscanf(1, (void *)1);
}


x86 assembly (clang, -O0):
<test_sscanf_226>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%esi
mov    %rsi,%rdi
mov    $0x0,%al
call   1030 <sscanf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_sscanf_226>:
mov    $0x1,%edi
mov    $0x1,%esi
xor    %eax,%eax
jmp    1030 <sscanf@plt>

LLVM IR (-O0):
define i32 @test_sscanf_226() {
%1 = call i32 (i8*, i8*, ...) @sscanf(i8* inttoptr (i64 1 to i8*), i8* inttoptr (i64 1 to i8*))
ret i32 %1
}

LLVM IR (-O2):
define i32 @test_sscanf_226() {
%1 = tail call i32 (i8*, i8*, ...) @sscanf(i8* inttoptr (i64 1 to i8*), i8* inttoptr (i64 1 to i8*))
ret i32 %1
}
/* Variables and functions */
void *calloc(size_t, size_t);
void *mm_calloc(size_t nmemb, size_t size) { return calloc(nmemb, size); }


x86 assembly (clang, -O0):
<mm_calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <calloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mm_calloc>:
jmp    1030 <calloc@plt>

LLVM IR (-O0):
define i8* @mm_calloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i8* @calloc(i64 %5, i64 %6)
ret i8* %7
}

LLVM IR (-O2):
define noalias i8* @mm_calloc(i64 %0, i64 %1) {
%3 = tail call i8* @calloc(i64 %0, i64 %1)
ret i8* %3
}
const char *Errormsg(int err) {}


x86 assembly (clang, -O0):
<Errormsg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Errormsg>:
ret

LLVM IR (-O0):
define i8* @Errormsg(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i8*, i8** %2
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @Errormsg(i32 %0) {
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ kprintf(char *, int);
void isrHandle4() { kprintf("ISR %d.\n", 4); }


x86 assembly (clang, -O0):
<isrHandle4>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x4,%esi
call   1030 <kprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<isrHandle4>:
lea    0xee9(%rip),%rdi
mov    $0x4,%esi
jmp    1030 <kprintf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"ISR %d.\0A\00"
define void @isrHandle4() {
%1 = call i32 @kprintf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 4)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"ISR %d.\0A\00"
define void @isrHandle4() {
%1 = tail call i32 @kprintf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 4)
ret void
}
/* Variables and functions */
int partition(int *, int, int);
void quicksort(int a[], int l, int u) {
  int j;
  if (l < u) {
    j = partition(a, l, u);
    quicksort(a, l, j - 1);
    quicksort(a, j + 1, u);
  }
}


x86 assembly (clang, -O0):
<quicksort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <quicksort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quicksort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quicksort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quicksort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quicksort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quicksort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quicksort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quicksort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partition(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @quicksort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quicksort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stdout;
void usage(char *name) {
  fprintf(stdout,
          "Usage: %s infile.bin outfile.c outfile.h [BIN|BINSTR|STR] "
          "array_name [array_attribute [header_for_attribute]]\n",
          name);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [111 x i8] c"Usage: %s infile.bin outfile.c outfile.h [BIN|BINSTR|STR] array_name [array_attribute [header_for_attribute]]\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stdout
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([111 x i8], [111 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [111 x i8] c"Usage: %s infile.bin outfile.c outfile.h [BIN|BINSTR|STR] array_name [array_attribute [header_for_attribute]]\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([111 x i8], [111 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
int subtracao(int x, int y) { return x - y; }


x86 assembly (clang, -O0):
<subtracao>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<subtracao>:
mov    %edi,%eax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @subtracao(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @subtracao(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
ret i32 %3
}
int ModuloAdd(int f, int k) {
  int tmp;
  tmp = f + k;
  if (tmp >= 27)
    tmp -= 27;
  return (tmp);
}


x86 assembly (clang, -O0):
<ModuloAdd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x1b,-0xc(%rbp)
jl     1126 <ModuloAdd+0x26>
mov    -0xc(%rbp),%eax
sub    $0x1b,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ModuloAdd>:
lea    (%rsi,%rdi,1),%ecx
cmp    $0x1b,%ecx
lea    -0x1b(%rsi,%rdi,1),%eax
cmovl  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ModuloAdd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = add nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp sge i32 %9, 27
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = load i32, i32* %5
%13 = sub nsw i32 %12, 27
store i32 %13, i32* %5
br label %14
14: ; preds = %11, %2
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
define i32 @ModuloAdd(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
%4 = icmp sgt i32 %3, 26
%5 = add nsw i32 %3, -27
%6 = select i1 %4, i32 %5, i32 %3
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ spkey_textmode();
void close_spect_key(void) { spkey_textmode(); }


x86 assembly (clang, -O0):
<close_spect_key>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <spkey_textmode@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_spect_key>:
xor    %eax,%eax
jmp    1030 <spkey_textmode@plt>

LLVM IR (-O0):
define void @close_spect_key() {
%1 = call i32 (...) @spkey_textmode()
ret void
}

LLVM IR (-O2):
define void @close_spect_key() {
%1 = tail call i32 (...) @spkey_textmode()
ret void
}
int loop_count_too_long(unsigned long long loop_count) {
  return (loop_count > ((1ULL << (sizeof(unsigned long) * 8)) - 1));
}


x86 assembly (clang, -O0):
<loop_count_too_long>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmp    %rax,-0x8(%rbp)
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<loop_count_too_long>:
ret

LLVM IR (-O0):
define i32 @loop_count_too_long(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp ugt i64 %3, poison
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @loop_count_too_long(i64 %0) {
ret i32 poison
}
unsigned latin1_downcase(unsigned c) {
  if (c - (unsigned char)'A' <= (unsigned char)'Z' - (unsigned char)'A' ||
      (c - (unsigned char)'@' <= (unsigned char)'^' - (unsigned char)'@' &&
       c != (unsigned char)'W'))
    return c + (unsigned char)'a' - (unsigned char)'A';
  else
    return c;
}


x86 assembly (clang, -O0):
<latin1_downcase>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x41,%eax
cmp    $0x19,%eax
jbe    112f <latin1_downcase+0x2f>
mov    -0x8(%rbp),%eax
sub    $0x40,%eax
cmp    $0x1e,%eax
ja     1140 <latin1_downcase+0x40>
cmpl   $0x57,-0x8(%rbp)
je     1140 <latin1_downcase+0x40>
mov    -0x8(%rbp),%eax
add    $0x61,%eax
sub    $0x41,%eax
mov    %eax,-0x4(%rbp)
jmp    1146 <latin1_downcase+0x46>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<latin1_downcase>:
lea    -0x40(%rdi),%ecx
lea    0x20(%rdi),%eax
cmp    $0x1f,%ecx
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @latin1_downcase(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = sub i32 %4, 65
%6 = icmp ule i32 %5, 25
br i1 %6, label %14, label %7
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub i32 %8, 64
%10 = icmp ule i32 %9, 30
br i1 %10, label %11, label %18
11: ; preds = %7
%12 = load i32, i32* %3
%13 = icmp ne i32 %12, 87
br i1 %13, label %14, label %18
14: ; preds = %11, %1
%15 = load i32, i32* %3
%16 = add i32 %15, 97
%17 = sub i32 %16, 65
store i32 %17, i32* %2
br label %20
18: ; preds = %11, %7
%19 = load i32, i32* %3
store i32 %19, i32* %2
br label %20
20: ; preds = %18, %14
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @latin1_downcase(i32 %0) {
%2 = add i32 %0, -64
%3 = icmp ult i32 %2, 31
%4 = add nuw nsw i32 %0, 32
%5 = select i1 %3, i32 %4, i32 %0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ check_limits(char **);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ usage(char **);
int main(int argc, char **argv) {
  if (argc != 3)
    usage(argv);
  else
    check_limits(argv);
  printf("This app isn't complete yet and of now does nothing except check "
         "the\ninput arguments and their values for compliance\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x3,-0x8(%rbp)
je     115e <main+0x2e>
mov    -0x10(%rbp),%rdi
call   1050 <usage@plt>
jmp    1167 <main+0x37>
mov    -0x10(%rbp),%rdi
call   1030 <check_limits@plt>
lea    0xe92(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x3,%edi
jne    1140 <main+0x10>
mov    %rsi,%rdi
call   1040 <check_limits@plt>
jmp    1148 <main+0x18>
mov    %rsi,%rdi
call   1050 <usage@plt>
lea    0xeb1(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [118 x i8] c"This app isn't complete yet and of now does nothing except check the\0Ainput arguments and their values for compliance\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 3
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = call i32 @usage(i8** %9)
br label %14
11: ; preds = %2
%12 = load i8**, i8*** %5
%13 = call i32 @check_limits(i8** %12)
br label %14
14: ; preds = %11, %8
%15 = call i32 @printf(i8* getelementptr inbounds ([118 x i8], [118 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [117 x i8] c"This app isn't complete yet and of now does nothing except check the\0Ainput arguments and their values for compliance\00"
define i32 @main(i32 %0, i8** %1) {
%3 = icmp eq i32 %0, 3
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 @usage(i8** %1)
br label %8
6: ; preds = %2
%7 = tail call i32 @check_limits(i8** %1)
br label %8
8: ; preds = %6, %4
%9 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([117 x i8], [117 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ STDOUT_FILENO;
int /*<<< orphan*/ write(int /*<<< orphan*/, char *, int);
void init_2(void) { write(STDOUT_FILENO, "init array 2\n", 13); }


x86 assembly (clang, -O0):
<init_2>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
mov    $0xd,%edx
call   1030 <write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_2>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
mov    $0xd,%edx
jmp    1030 <write@plt>

LLVM IR (-O0):
@STDOUT_FILENO = global i32 0
@.str = [14 x i8] c"init array 2\0A\00"
define void @init_2() {
%1 = load i32, i32* @STDOUT_FILENO
%2 = call i32 @write(i32 %1, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 13)
ret void
}

LLVM IR (-O2):
@STDOUT_FILENO = global i32 0
@.str = [14 x i8] c"init array 2\0A\00"
define void @init_2() {
%1 = load i32, i32* @STDOUT_FILENO
%2 = tail call i32 @write(i32 %1, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 13)
ret void
}
int fun(int a, int b) {
  a = a + b;
  b = a - b;
  a = a + b;
}


x86 assembly (clang, -O0):
<fun>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun>:
ret

LLVM IR (-O0):
define i32 @fun(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = add nsw i32 %6, %7
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = sub nsw i32 %9, %10
store i32 %11, i32* %5
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = add nsw i32 %12, %13
store i32 %14, i32* %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @fun(i32 %0, i32 %1) {
ret i32 undef
}
/* Variables and functions */
double poidev(double);
double ranpoiss(double xm) { return poidev(xm); }


x86 assembly (clang, -O0):
<ranpoiss>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <poidev@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ranpoiss>:
jmp    1030 <poidev@plt>

LLVM IR (-O0):
define double @ranpoiss(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @poidev(double %3)
ret double %4
}

LLVM IR (-O2):
define double @ranpoiss(double %0) {
%2 = tail call double @poidev(double %0)
ret double %2
}
int test_imm_0Cint32_reg(int val) { return ((val) & (0x0C << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_0Cint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xc,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Cint32_reg>:
test   $0xc,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Cint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 12
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_0Cint32_reg(i32 %0) {
%2 = and i32 %0, 12
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void XRaySaveReport(const char *filename, float cutoff) {}


x86 assembly (clang, -O0):
<XRaySaveReport>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<XRaySaveReport>:
ret

LLVM IR (-O0):
define void @XRaySaveReport(i8* %0, float %1) {
%3 = alloca i8*
%4 = alloca float
store i8* %0, i8** %3
store float %1, float* %4
ret void
}

LLVM IR (-O2):
define void @XRaySaveReport(i8* nocapture %0, float %1) {
ret void
}
void gdk_display_add_client_message_filter() {}


x86 assembly (clang, -O0):
<gdk_display_add_client_message_filter>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_display_add_client_message_filter>:
ret

LLVM IR (-O0):
define void @gdk_display_add_client_message_filter() {
ret void
}

LLVM IR (-O2):
define void @gdk_display_add_client_message_filter() {
ret void
}
/* Type definitions */
struct dirent {
  int /*<<< orphan*/ *d_name;
};

/* Variables and functions */
scalar_t__ isdigit(int /*<<< orphan*/);
int dir_filter(const struct dirent *dirp) {
  if (isdigit(dirp->d_name[0]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<dir_filter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
je     1140 <dir_filter+0x30>
movl   $0x1,-0x4(%rbp)
jmp    1147 <dir_filter+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dir_filter>:
push   %rax
mov    (%rdi),%rax
mov    (%rax),%edi
call   1030 <isdigit@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.dirent = type { i32* }
define i32 @dir_filter(%struct.dirent* %0) {
%2 = alloca i32
%3 = alloca %struct.dirent*
store %struct.dirent* %0, %struct.dirent** %3
%4 = load %struct.dirent*, %struct.dirent** %3
%5 = getelementptr inbounds %struct.dirent, %struct.dirent* %4, i32 0, i32 0
%6 = load i32*, i32** %5
%7 = getelementptr inbounds i32, i32* %6, i64 0
%8 = load i32, i32* %7
%9 = call i64 @isdigit(i32 %8)
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %1
store i32 1, i32* %2
br label %13
12: ; preds = %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
%struct.dirent = type { i32* }
define i32 @dir_filter(%struct.dirent* nocapture %0) {
%2 = getelementptr inbounds %struct.dirent, %struct.dirent* %0, i64 0, i32 0
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = tail call i64 @isdigit(i32 %4)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
int UARTBaseValid(unsigned long);
void UARTTxIntModeSet(unsigned long ulBase, unsigned long ulMode) {
  DEBUG_ASSERT(UARTBaseValid(ulBase));
  DEBUG_ASSERT((ulMode == 0x00000010) || (ulMode == 0x00000000));
  (*((volatile unsigned long *)(ulBase + 0x00000030))) =
      (((*((volatile unsigned long *)(ulBase + 0x00000030))) &
        ~(0x00000010 | 0x00000000)) |
       ulMode);
}


x86 assembly (clang, -O0):
<UARTTxIntModeSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <UARTBaseValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    $0x1,%al
cmpq   $0x10,-0x10(%rbp)
mov    %al,-0x11(%rbp)
je     115b <UARTTxIntModeSet+0x3b>
cmpq   $0x0,-0x10(%rbp)
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
mov    0x30(%rax),%rcx
and    $0xffffffffffffffef,%rcx
or     -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x30(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTTxIntModeSet>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <UARTBaseValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
xor    %edi,%edi
test   $0xffffffffffffffef,%r14
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
mov    0x30(%rbx),%rax
and    $0xffffffffffffffef,%rax
or     %r14,%rax
mov    %rax,0x30(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @UARTTxIntModeSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = call i32 @UARTBaseValid(i64 %5)
%7 = call i32 @DEBUG_ASSERT(i32 %6)
%8 = load i64, i64* %4
%9 = icmp eq i64 %8, 16
br i1 %9, label %13, label %10
10: ; preds = %2
%11 = load i64, i64* %4
%12 = icmp eq i64 %11, 0
br label %13
13: ; preds = %10, %2
%14 = phi i1 [ true, %2 ], [ %12, %10 ]
%15 = zext i1 %14 to i32
%16 = call i32 @DEBUG_ASSERT(i32 %15)
%17 = load i64, i64* %3
%18 = add i64 %17, 48
%19 = inttoptr i64 %18 to i64*
%20 = load volatile i64, i64* %19
%21 = and i64 %20, -17
%22 = load i64, i64* %4
%23 = or i64 %21, %22
%24 = load i64, i64* %3
%25 = add i64 %24, 48
%26 = inttoptr i64 %25 to i64*
store volatile i64 %23, i64* %26
ret void
}

LLVM IR (-O2):
define void @UARTTxIntModeSet(i64 %0, i64 %1) {
%3 = tail call i32 @UARTBaseValid(i64 %0)
%4 = tail call i32 @DEBUG_ASSERT(i32 %3)
%5 = and i64 %1, -17
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
%8 = tail call i32 @DEBUG_ASSERT(i32 %7)
%9 = add i64 %0, 48
%10 = inttoptr i64 %9 to i64*
%11 = load volatile i64, i64* %10
%12 = and i64 %11, -17
%13 = or i64 %12, %1
store volatile i64 %13, i64* %10
ret void
}
/* Type definitions */
struct net_device {
  int dummy;
};

/* Variables and functions */
int cvm_oct_transmit_qos(struct net_device *, void *, int, int /*<<< orphan*/);
int cvm_oct_transmit(struct net_device *dev, void *work_queue_entry,
                     int do_free) {
  return cvm_oct_transmit_qos(dev, work_queue_entry, do_free, 0);
}


x86 assembly (clang, -O0):
<cvm_oct_transmit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
xor    %ecx,%ecx
call   1030 <cvm_oct_transmit_qos@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvm_oct_transmit>:
xor    %ecx,%ecx
jmp    1030 <cvm_oct_transmit_qos@plt>

LLVM IR (-O0):
%struct.net_device = type { i32 }
define i32 @cvm_oct_transmit(%struct.net_device* %0, i8* %1, i32 %2) {
%4 = alloca %struct.net_device*
%5 = alloca i8*
%6 = alloca i32
store %struct.net_device* %0, %struct.net_device** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load %struct.net_device*, %struct.net_device** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @cvm_oct_transmit_qos(%struct.net_device* %7, i8* %8, i32 %9, i32 0)
ret i32 %10
}

LLVM IR (-O2):
%struct.net_device = type { i32 }
define i32 @cvm_oct_transmit(%struct.net_device* %0, i8* %1, i32 %2) {
%4 = tail call i32 @cvm_oct_transmit_qos(%struct.net_device* %0, i8* %1, i32 %2, i32 0)
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
void __attribute__((weak)) usr_mlme_reset_conf(uint8_t status) {
  status = status;
}


x86 assembly (clang, -O0):
<usr_mlme_reset_conf>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<usr_mlme_reset_conf>:
ret

LLVM IR (-O0):
define weak void @usr_mlme_reset_conf(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store i32 %3, i32* %2
ret void
}

LLVM IR (-O2):
define weak void @usr_mlme_reset_conf(i32 %0) {
ret void
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
bool utf16_is_surrogate(uint16_t c) { return (0xd800 <= c && c <= 0xdfff); }


x86 assembly (clang, -O0):
<utf16_is_surrogate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
mov    $0xd800,%ecx
cmp    -0x4(%rbp),%ecx
mov    %al,-0x5(%rbp)
jg     1127 <utf16_is_surrogate+0x27>
cmpl   $0xdfff,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utf16_is_surrogate>:
and    $0xfffff800,%edi
xor    %eax,%eax
cmp    $0xd800,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @utf16_is_surrogate(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 55296, %3
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 57343
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @utf16_is_surrogate(i32 %0) {
%2 = and i32 %0, -2048
%3 = icmp eq i32 %2, 55296
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
char *strchr(char *, char);
char *ne_token(char **str, char separator) {
  char *ret = *str, *pnt = strchr(*str, separator);
  if (pnt) {
    *pnt = '\0';
    *str = pnt + 1;
  } else {
    *str = NULL;
  }
  return ret;
}


x86 assembly (clang, -O0):
<ne_token>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
movsbl -0x9(%rbp),%esi
call   1030 <strchr@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     1167 <ne_token+0x57>
mov    -0x20(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x20(%rbp),%rcx
add    $0x1,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
jmp    1172 <ne_token+0x62>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ne_token>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%rbx
mov    %rbx,%rdi
call   1030 <strchr@plt>
test   %rax,%rax
je     1130 <ne_token+0x20>
movb   $0x0,(%rax)
add    $0x1,%rax
jmp    1132 <ne_token+0x22>
xor    %eax,%eax
mov    %rax,(%r14)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @ne_token(i8** %0, i8 signext %1) {
%3 = alloca i8**
%4 = alloca i8
%5 = alloca i8*
%6 = alloca i8*
store i8** %0, i8*** %3
store i8 %1, i8* %4
%7 = load i8**, i8*** %3
%8 = load i8*, i8** %7
store i8* %8, i8** %5
%9 = load i8**, i8*** %3
%10 = load i8*, i8** %9
%11 = load i8, i8* %4
%12 = call i8* @strchr(i8* %10, i8 signext %11)
store i8* %12, i8** %6
%13 = load i8*, i8** %6
%14 = icmp ne i8* %13, null
br i1 %14, label %15, label %20
15: ; preds = %2
%16 = load i8*, i8** %6
store i8 0, i8* %16
%17 = load i8*, i8** %6
%18 = getelementptr inbounds i8, i8* %17, i64 1
%19 = load i8**, i8*** %3
store i8* %18, i8** %19
br label %22
20: ; preds = %2
%21 = load i8**, i8*** %3
store i8* null, i8** %21
br label %22
22: ; preds = %20, %15
%23 = load i8*, i8** %5
ret i8* %23
}

LLVM IR (-O2):
define i8* @ne_token(i8** nocapture %0, i8 signext %1) {
%3 = load i8*, i8** %0
%4 = tail call i8* @strchr(i8* dereferenceable(1) %3, i8 signext %1)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %2
store i8 0, i8* %4
%7 = getelementptr inbounds i8, i8* %4, i64 1
br label %8
8: ; preds = %2, %6
%9 = phi i8* [ %7, %6 ], [ null, %2 ]
store i8* %9, i8** %0
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ output_socket(unsigned int);
void put_socket(unsigned i) { output_socket(i); }


x86 assembly (clang, -O0):
<put_socket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <output_socket@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_socket>:
jmp    1030 <output_socket@plt>

LLVM IR (-O0):
define void @put_socket(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @output_socket(i32 %3)
ret void
}

LLVM IR (-O2):
define void @put_socket(i32 %0) {
%2 = tail call i32 @output_socket(i32 %0)
ret void
}
/* Variables and functions */
int EOF;
int getchar();
int /*<<< orphan*/ putchar(int);
int main() {
  int c;
  int lc;
  while ((c = getchar()) != EOF) {
    if (lc != ' ' || c != ' ') {
      putchar(c);
    }
    lc = c;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %eax,-0x8(%rbp)
mov    0x2ea8(%rip),%rcx
cmp    (%rcx),%eax
je     116f <main+0x4f>
cmpl   $0x20,-0xc(%rbp)
jne    115c <main+0x3c>
cmpl   $0x20,-0x8(%rbp)
je     1164 <main+0x44>
mov    -0x8(%rbp),%edi
call   1030 <putchar@plt>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    112f <main+0xf>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %eax,%eax
call   1040 <getchar@plt>
mov    0x2eb6(%rip),%r14
cmp    (%r14),%eax
jne    1141 <main+0x21>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
jmp    1163 <main+0x43>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %ebx,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
cmp    (%r14),%eax
je     1137 <main+0x17>
mov    %ebx,%ecx
mov    %eax,%ebx
cmp    $0x20,%ecx
jne    1150 <main+0x30>
cmp    $0x20,%ebx
je     1157 <main+0x37>
jmp    1150 <main+0x30>

LLVM IR (-O0):
@EOF = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
br label %4
4: ; preds = %17, %0
%5 = call i32 (...) @getchar()
store i32 %5, i32* %2
%6 = load i32, i32* @EOF
%7 = icmp ne i32 %5, %6
br i1 %7, label %8, label %19
8: ; preds = %4
%9 = load i32, i32* %3
%10 = icmp ne i32 %9, 32
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp ne i32 %12, 32
br i1 %13, label %14, label %17
14: ; preds = %11, %8
%15 = load i32, i32* %2
%16 = call i32 @putchar(i32 %15)
br label %17
17: ; preds = %14, %11
%18 = load i32, i32* %2
store i32 %18, i32* %3
br label %4
19: ; preds = %4
%20 = load i32, i32* %1
ret i32 %20
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @main() {
%1 = tail call i32 (...) @getchar()
%2 = load i32, i32* @EOF
%3 = icmp eq i32 %1, %2
br i1 %3, label %16, label %4
4: ; preds = %0, %12
%5 = phi i32 [ %13, %12 ], [ %1, %0 ]
%6 = phi i32 [ %5, %12 ], [ undef, %0 ]
%7 = icmp ne i32 %6, 32
%8 = icmp ne i32 %5, 32
%9 = or i1 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %4
%11 = tail call i32 @putchar(i32 %5)
br label %12
12: ; preds = %4, %10
%13 = tail call i32 (...) @getchar()
%14 = load i32, i32* @EOF
%15 = icmp eq i32 %13, %14
br i1 %15, label %16, label %4
16: ; preds = %12, %0
ret i32 0
}
void WebPInitUpsamplersMIPSdspR2(void) {}


x86 assembly (clang, -O0):
<WebPInitUpsamplersMIPSdspR2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WebPInitUpsamplersMIPSdspR2>:
ret

LLVM IR (-O0):
define void @WebPInitUpsamplersMIPSdspR2() {
ret void
}

LLVM IR (-O2):
define void @WebPInitUpsamplersMIPSdspR2() {
ret void
}
unsigned long rgba2c(unsigned char r, unsigned char g, unsigned char b,
                     unsigned char a) {
  return (a << 24) | (r << 16) | (g << 8) | b;
}


x86 assembly (clang, -O0):
<rgba2c>:
push   %rbp
mov    %rsp,%rbp
mov    %cl,%al
mov    %dl,%cl
mov    %sil,%dl
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %dl,-0x2(%rbp)
mov    %cl,-0x3(%rbp)
mov    %al,-0x4(%rbp)
movzbl -0x4(%rbp),%eax
shl    $0x18,%eax
movzbl -0x1(%rbp),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
movzbl -0x2(%rbp),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
movzbl -0x3(%rbp),%ecx
or     %ecx,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgba2c>:
shl    $0x18,%ecx
shl    $0x10,%edi
or     %ecx,%edi
shl    $0x8,%esi
or     %edi,%esi
or     %edx,%esi
movslq %esi,%rax
ret

LLVM IR (-O0):
define i64 @rgba2c(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8 %0, i8* %5
store i8 %1, i8* %6
store i8 %2, i8* %7
store i8 %3, i8* %8
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 24
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = shl i32 %13, 16
%15 = or i32 %11, %14
%16 = load i8, i8* %6
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = or i32 %15, %18
%20 = load i8, i8* %7
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
%23 = sext i32 %22 to i64
ret i64 %23
}

LLVM IR (-O2):
define i64 @rgba2c(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = zext i8 %3 to i32
%6 = shl nuw i32 %5, 24
%7 = zext i8 %0 to i32
%8 = shl nuw nsw i32 %7, 16
%9 = or i32 %6, %8
%10 = zext i8 %1 to i32
%11 = shl nuw nsw i32 %10, 8
%12 = or i32 %9, %11
%13 = zext i8 %2 to i32
%14 = or i32 %12, %13
%15 = sext i32 %14 to i64
ret i64 %15
}
void fakeTimerUserIRQRoutine() {}


x86 assembly (clang, -O0):
<fakeTimerUserIRQRoutine>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fakeTimerUserIRQRoutine>:
ret

LLVM IR (-O0):
define void @fakeTimerUserIRQRoutine() {
ret void
}

LLVM IR (-O2):
define void @fakeTimerUserIRQRoutine() {
ret void
}
/* Variables and functions */
char odd(int);
int /*<<< orphan*/ print_char(char);
int main(void) {
  char c;
  c = odd(1);
  print_char(c);
  c = odd(2);
  print_char(c);
  c = odd(0);
  print_char(c);
  c = odd(13);
  print_char(c);
  print_char('\n');
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <odd@plt>
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%edi
call   1040 <print_char@plt>
mov    $0x2,%edi
call   1030 <odd@plt>
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%edi
call   1040 <print_char@plt>
xor    %edi,%edi
call   1030 <odd@plt>
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%edi
call   1040 <print_char@plt>
mov    $0xd,%edi
call   1030 <odd@plt>
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%edi
call   1040 <print_char@plt>
mov    $0xa,%edi
call   1040 <print_char@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <odd@plt>
movsbl %al,%edi
call   1040 <print_char@plt>
mov    $0x2,%edi
call   1030 <odd@plt>
movsbl %al,%edi
call   1040 <print_char@plt>
xor    %edi,%edi
call   1030 <odd@plt>
movsbl %al,%edi
call   1040 <print_char@plt>
mov    $0xd,%edi
call   1030 <odd@plt>
movsbl %al,%edi
call   1040 <print_char@plt>
mov    $0xa,%edi
call   1040 <print_char@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
%3 = call signext i8 @odd(i32 1)
store i8 %3, i8* %2
%4 = load i8, i8* %2
%5 = call i32 @print_char(i8 signext %4)
%6 = call signext i8 @odd(i32 2)
store i8 %6, i8* %2
%7 = load i8, i8* %2
%8 = call i32 @print_char(i8 signext %7)
%9 = call signext i8 @odd(i32 0)
store i8 %9, i8* %2
%10 = load i8, i8* %2
%11 = call i32 @print_char(i8 signext %10)
%12 = call signext i8 @odd(i32 13)
store i8 %12, i8* %2
%13 = load i8, i8* %2
%14 = call i32 @print_char(i8 signext %13)
%15 = call i32 @print_char(i8 signext 10)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call signext i8 @odd(i32 1)
%2 = tail call i32 @print_char(i8 signext %1)
%3 = tail call signext i8 @odd(i32 2)
%4 = tail call i32 @print_char(i8 signext %3)
%5 = tail call signext i8 @odd(i32 0)
%6 = tail call i32 @print_char(i8 signext %5)
%7 = tail call signext i8 @odd(i32 13)
%8 = tail call i32 @print_char(i8 signext %7)
%9 = tail call i32 @print_char(i8 signext 10)
ret i32 0
}
/* Variables and functions */
scalar_t__ ceil(size_t);
size_t UVEstimateBas64EncodedDataSize(size_t inDataSize) {
  size_t theEncodedDataSize = (int)ceil(inDataSize / 3.0) * 4;
  theEncodedDataSize = theEncodedDataSize / 72 * 74 + theEncodedDataSize % 72;
  return (theEncodedDataSize);
}


x86 assembly (clang, -O0):
<UVEstimateBas64EncodedDataSize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movaps 0xedd(%rip),%xmm1
movq   -0x8(%rbp),%xmm0
punpckldq %xmm1,%xmm0
movapd 0xedc(%rip),%xmm1
subpd  %xmm1,%xmm0
movaps %xmm0,%xmm1
unpckhpd %xmm0,%xmm0
addsd  %xmm1,%xmm0
movsd  0xed5(%rip),%xmm1
divsd  %xmm1,%xmm0
movaps %xmm0,%xmm1
cvttsd2si %xmm1,%rdi
mov    %rdi,%rcx
sar    $0x3f,%rcx
movsd  0xec2(%rip),%xmm1
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rax
and    %rcx,%rax
or     %rax,%rdi
call   1030 <ceil@plt>
shl    $0x2,%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    $0x48,%ecx
xor    %edx,%edx
div    %rcx
imul   $0x4a,%rax,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    $0x48,%ecx
xor    %edx,%edx
div    %rcx
mov    -0x18(%rbp),%rax
add    %rdx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UVEstimateBas64EncodedDataSize>:
push   %rax
movq   %rdi,%xmm0
punpckldq 0xee2(%rip),%xmm0
subpd  0xeea(%rip),%xmm0
movapd %xmm0,%xmm1
unpckhpd %xmm0,%xmm1
addsd  %xmm0,%xmm1
divsd  0xee6(%rip),%xmm1
cvttsd2si %xmm1,%rax
mov    %rax,%rcx
sar    $0x3f,%rcx
subsd  0xeda(%rip),%xmm1
cvttsd2si %xmm1,%rdi
and    %rcx,%rdi
or     %rax,%rdi
call   1030 <ceil@plt>
shl    $0x2,%eax
movslq %eax,%rcx
movabs $0xe38e38e38e38e38f,%rdx
38 8e e3
mov    %rcx,%rax
mul    %rdx
shr    $0x6,%rdx
imul   $0x4a,%rdx,%rax
shl    $0x3,%rdx
lea    (%rdx,%rdx,8),%rdx
sub    %rdx,%rcx
add    %rax,%rcx
mov    %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @UVEstimateBas64EncodedDataSize(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = uitofp i64 %4 to double
%6 = fdiv double %5, 3.000000e+00
%7 = fptoui double %6 to i64
%8 = call i64 @ceil(i64 %7)
%9 = trunc i64 %8 to i32
%10 = mul nsw i32 %9, 4
%11 = sext i32 %10 to i64
store i64 %11, i64* %3
%12 = load i64, i64* %3
%13 = udiv i64 %12, 72
%14 = mul i64 %13, 74
%15 = load i64, i64* %3
%16 = urem i64 %15, 72
%17 = add i64 %14, %16
store i64 %17, i64* %3
%18 = load i64, i64* %3
ret i64 %18
}

LLVM IR (-O2):
define i64 @UVEstimateBas64EncodedDataSize(i64 %0) {
%2 = uitofp i64 %0 to double
%3 = fdiv double %2, 3.000000e+00
%4 = fptoui double %3 to i64
%5 = tail call i64 @ceil(i64 %4)
%6 = trunc i64 %5 to i32
%7 = shl nsw i32 %6, 2
%8 = sext i32 %7 to i64
%9 = udiv i64 %8, 72
%10 = mul i64 %9, 74
%11 = urem i64 %8, 72
%12 = add i64 %10, %11
ret i64 %12
}
int is_char_uppercase(char c) {
  if (c >= 0x41 && c <= 0x5A) {
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<is_char_uppercase>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     1130 <is_char_uppercase+0x30>
movsbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jg     1130 <is_char_uppercase+0x30>
movl   $0x0,-0x4(%rbp)
jmp    1137 <is_char_uppercase+0x37>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_char_uppercase>:
add    $0xa5,%dil
xor    %eax,%eax
cmp    $0xe6,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_char_uppercase(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 65
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 90
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 0, i32* %2
br label %13
12: ; preds = %7, %1
store i32 1, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @is_char_uppercase(i8 signext %0) {
%2 = add i8 %0, -91
%3 = icmp ult i8 %2, -26
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
scalar_t__ spdif_swab_u16(unsigned short);
short spdif_swab_s16(short i) {
  return (short)spdif_swab_u16((unsigned short)i);
}


x86 assembly (clang, -O0):
<spdif_swab_s16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edi
call   1030 <spdif_swab_u16@plt>
cwtl
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spdif_swab_s16>:
push   %rax
movzwl %di,%edi
call   1030 <spdif_swab_u16@plt>
pop    %rcx
ret

LLVM IR (-O0):
define signext i16 @spdif_swab_s16(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = call i64 @spdif_swab_u16(i16 zeroext %3)
%5 = trunc i64 %4 to i16
ret i16 %5
}

LLVM IR (-O2):
define signext i16 @spdif_swab_s16(i16 signext %0) {
%2 = tail call i64 @spdif_swab_u16(i16 zeroext %0)
%3 = trunc i64 %2 to i16
ret i16 %3
}