#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned char InPortb(int);
int /*<<< orphan*/ OutPortb(int, int);
unsigned char RegisterIn(int Controlador, char index) {
  unsigned char valor;
  switch (Controlador) {
  case 0x3c2:
    valor = InPortb(0x3cc);
    break;
  case 0x3c0:
    InPortb(0x3da);
    OutPortb(0x3c0, index);
    valor = InPortb(0x3c0 + 1);
    break;
  case 0x3c4:
  case 0x3ce:
  case 0x3d4:
  case 0x3d6:
    OutPortb(Controlador, index);
    valor = InPortb(Controlador + 1);
    break;
  case 0x3c3:
  default:
    valor = InPortb(Controlador);
    break;
  }
  InPortb(0x3da);
  OutPortb(0x3c0, 0x20);
  return (valor);
}


x86 assembly (clang, -O0):
<RegisterIn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%eax
add    $0xfffffc40,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x16,%eax
ja     11bc <RegisterIn+0x9c>
mov    -0x10(%rbp),%rax
lea    0xead(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x3cc,%edi
call   1040 <InPortb@plt>
mov    %al,-0x6(%rbp)
jmp    11c7 <RegisterIn+0xa7>
mov    $0x3da,%edi
call   1040 <InPortb@plt>
movsbl -0x5(%rbp),%esi
mov    $0x3c0,%edi
call   1030 <OutPortb@plt>
mov    $0x3c1,%edi
call   1040 <InPortb@plt>
mov    %al,-0x6(%rbp)
jmp    11c7 <RegisterIn+0xa7>
mov    -0x4(%rbp),%edi
movsbl -0x5(%rbp),%esi
call   1030 <OutPortb@plt>
mov    -0x4(%rbp),%edi
add    $0x1,%edi
call   1040 <InPortb@plt>
mov    %al,-0x6(%rbp)
jmp    11c7 <RegisterIn+0xa7>
jmp    11bc <RegisterIn+0x9c>
mov    -0x4(%rbp),%edi
call   1040 <InPortb@plt>
mov    %al,-0x6(%rbp)
mov    $0x3da,%edi
call   1040 <InPortb@plt>
mov    $0x3c0,%edi
mov    $0x20,%esi
call   1030 <OutPortb@plt>
movzbl -0x6(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RegisterIn>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
lea    -0x3c0(%rbx),%eax
ror    %eax
cmp    $0xb,%eax
ja     114c <RegisterIn+0x2c>
mov    %esi,%ebp
mov    $0xc84,%ecx
bt     %eax,%ecx
jae    1177 <RegisterIn+0x57>
movsbl %bpl,%esi
mov    %ebx,%edi
call   1030 <OutPortb@plt>
add    $0x1,%ebx
mov    %ebx,%edi
call   1040 <InPortb@plt>
mov    %eax,%ebx
mov    $0x3da,%edi
call   1040 <InPortb@plt>
mov    $0x3c0,%edi
mov    $0x20,%esi
call   1030 <OutPortb@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
test   %eax,%eax
je     1187 <RegisterIn+0x67>
mov    $0x3cc,%edi
cmp    $0x1,%eax
je     114e <RegisterIn+0x2e>
jmp    114c <RegisterIn+0x2c>
mov    $0x3da,%edi
call   1040 <InPortb@plt>
movsbl %bpl,%esi
mov    $0x3c0,%edi
call   1030 <OutPortb@plt>
mov    $0x3c1,%edi
jmp    114e <RegisterIn+0x2e>

LLVM IR (-O0):
define zeroext i8 @RegisterIn(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
%6 = load i32, i32* %3
switch i32 %6, label %24 [
i32 962, label %7
i32 960, label %9
i32 964, label %15
i32 974, label %15
i32 980, label %15
i32 982, label %15
i32 963, label %23
]
7: ; preds = %2
%8 = call zeroext i8 @InPortb(i32 972)
store i8 %8, i8* %5
br label %27
9: ; preds = %2
%10 = call zeroext i8 @InPortb(i32 986)
%11 = load i8, i8* %4
%12 = sext i8 %11 to i32
%13 = call i32 @OutPortb(i32 960, i32 %12)
%14 = call zeroext i8 @InPortb(i32 961)
store i8 %14, i8* %5
br label %27
15: ; preds = %2, %2, %2, %2
%16 = load i32, i32* %3
%17 = load i8, i8* %4
%18 = sext i8 %17 to i32
%19 = call i32 @OutPortb(i32 %16, i32 %18)
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 1
%22 = call zeroext i8 @InPortb(i32 %21)
store i8 %22, i8* %5
br label %27
23: ; preds = %2
br label %24
24: ; preds = %2, %23
%25 = load i32, i32* %3
%26 = call zeroext i8 @InPortb(i32 %25)
store i8 %26, i8* %5
br label %27
27: ; preds = %24, %15, %9, %7
%28 = call zeroext i8 @InPortb(i32 986)
%29 = call i32 @OutPortb(i32 960, i32 32)
%30 = load i8, i8* %5
ret i8 %30
}

LLVM IR (-O2):
define zeroext i8 @RegisterIn(i32 %0, i8 signext %1) {
%3 = add i32 %0, -960
%4 = tail call i32 @llvm.fshl.i32(i32 %3, i32 %3, i32 31)
switch i32 %4, label %13 [
i32 1, label %14
i32 0, label %5
i32 2, label %9
i32 7, label %9
i32 10, label %9
i32 11, label %9
]
5: ; preds = %2
%6 = tail call zeroext i8 @InPortb(i32 986)
%7 = sext i8 %1 to i32
%8 = tail call i32 @OutPortb(i32 960, i32 %7)
br label %14
9: ; preds = %2, %2, %2, %2
%10 = sext i8 %1 to i32
%11 = tail call i32 @OutPortb(i32 %0, i32 %10)
%12 = add nsw i32 %0, 1
br label %14
13: ; preds = %2
br label %14
14: ; preds = %2, %13, %9, %5
%15 = phi i32 [ %0, %13 ], [ %12, %9 ], [ 961, %5 ], [ 972, %2 ]
%16 = tail call zeroext i8 @InPortb(i32 %15)
%17 = tail call zeroext i8 @InPortb(i32 986)
%18 = tail call i32 @OutPortb(i32 960, i32 32)
ret i8 %16
}