xunge/DecIR huggingface dataset:
void delay(unsigned ticks) {
  unsigned i;
  for (i = 0; i < ticks; i++)
    asm("nop;");
}


x86 assembly (clang, -O0):
<delay>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jae    1129 <delay+0x29>
nop
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <delay+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay>:
test   %edi,%edi
je     1116 <delay+0x16>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
nop
add    $0xffffffff,%edi
jne    1110 <delay+0x10>
ret

LLVM IR (-O0):
define void @delay(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp ult i32 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %4
br label %9
9: ; preds = %8
%10 = load i32, i32* %3
%11 = add i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @delay(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %5, %3 ], [ 0, %1 ]
tail call void asm sideeffect "nop;", "~{dirflag},~{fpsr},~{flags}"()
%5 = add nuw i32 %4, 1
%6 = icmp eq i32 %5, %0
br i1 %6, label %7, label %3
7: ; preds = %3, %1
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int, int);
void print_mk_devsn(uint32_t devsn0, uint32_t devsn1, uint32_t devsn2,
                    uint32_t devsn3) {
  printf(" UUID: 0x%08x 0x%08x 0x%08x 0x%08x\n", devsn0, devsn1, devsn2,
         devsn3);
}


x86 assembly (clang, -O0):
<print_mk_devsn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    -0x10(%rbp),%r8d
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_mk_devsn>:
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
lea    0xee0(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [36 x i8] c" UUID: 0x%08x 0x%08x 0x%08x 0x%08x\0A\00"
define void @print_mk_devsn(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %9, i32 %10, i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
@.str = [36 x i8] c" UUID: 0x%08x 0x%08x 0x%08x 0x%08x\0A\00"
define void @print_mk_devsn(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1, i32 %2, i32 %3)
ret void
}
void foo_2_1_2_2_1_2_1_1_2() {}


x86 assembly (clang, -O0):
<foo_2_1_2_2_1_2_1_1_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_1_2_2_1_2_1_1_2>:
ret

LLVM IR (-O0):
define void @foo_2_1_2_2_1_2_1_1_2() {
ret void
}

LLVM IR (-O2):
define void @foo_2_1_2_2_1_2_1_1_2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ BlinkC__Boot__booted();
void RealMainP__Boot__booted(void) { BlinkC__Boot__booted(); }


x86 assembly (clang, -O0):
<RealMainP__Boot__booted>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <BlinkC__Boot__booted@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RealMainP__Boot__booted>:
xor    %eax,%eax
jmp    1030 <BlinkC__Boot__booted@plt>

LLVM IR (-O0):
define void @RealMainP__Boot__booted() {
%1 = call i32 (...) @BlinkC__Boot__booted()
ret void
}

LLVM IR (-O2):
define void @RealMainP__Boot__booted() {
%1 = tail call i32 (...) @BlinkC__Boot__booted()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, float *);
int main(void) {
  const float pi = 3.14;
  float r, a;
  printf("Radio: ");
  scanf("%f", &r);
  a = pi * r * r;
  printf("Area: %f\n", a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movss  0xec9(%rip),%xmm0
movss  %xmm0,-0x8(%rbp)
lea    0xec1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xebb(%rip),%rdi
lea    -0xc(%rbp),%rsi
call   1040 <scanf@plt>
movss  0xe9e(%rip),%xmm0
mulss  -0xc(%rbp),%xmm0
mulss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
lea    0xe8e(%rip),%rdi
mov    $0x1,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xedc(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xed6(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
movss  0x4(%rsp),%xmm0
movss  0xeb2(%rip),%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm0,%xmm1
xorps  %xmm0,%xmm0
cvtss2sd %xmm1,%xmm0
lea    0xeab(%rip),%rdi
mov    $0x1,%al
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"Radio: \00"
@.str.1 = [3 x i8] c"%f\00"
@.str.2 = [10 x i8] c"Area: %f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca float
%3 = alloca float
%4 = alloca float
store i32 0, i32* %1
store float 0x40091EB860000000, float* %2
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), float* %3)
%7 = load float, float* %3
%8 = fmul float 0x40091EB860000000, %7
%9 = load float, float* %3
%10 = fmul float %8, %9
store float %10, float* %4
%11 = load float, float* %4
%12 = fpext float %11 to double
%13 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0), double %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"Radio: \00"
@.str.1 = [3 x i8] c"%f\00"
@.str.2 = [10 x i8] c"Area: %f\0A\00"
define i32 @main() {
%1 = alloca float
%2 = bitcast float* %1 to i8*
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), float* %1)
%5 = load float, float* %1
%6 = fmul float %5, 0x40091EB860000000
%7 = fmul float %5, %6
%8 = fpext float %7 to double
%9 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0), double %8)
ret i32 0
}
void ft_swap(char **a, char **b) {
  char *tmp;
  tmp = *a;
  *a = *b;
  *b = tmp;
}


x86 assembly (clang, -O0):
<ft_swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_swap>:
mov    (%rdi),%rax
mov    (%rsi),%rcx
mov    %rcx,(%rdi)
mov    %rax,(%rsi)
ret

LLVM IR (-O0):
define void @ft_swap(i8** %0, i8** %1) {
%3 = alloca i8**
%4 = alloca i8**
%5 = alloca i8*
store i8** %0, i8*** %3
store i8** %1, i8*** %4
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %6
store i8* %7, i8** %5
%8 = load i8**, i8*** %4
%9 = load i8*, i8** %8
%10 = load i8**, i8*** %3
store i8* %9, i8** %10
%11 = load i8*, i8** %5
%12 = load i8**, i8*** %4
store i8* %11, i8** %12
ret void
}

LLVM IR (-O2):
define void @ft_swap(i8** nocapture %0, i8** nocapture %1) {
%3 = load i8*, i8** %0
%4 = load i8*, i8** %1
store i8* %4, i8** %0
store i8* %3, i8** %1
ret void
}
/* Variables and functions */
char *malloc(int);
char *repeat_char(char c, int times) {
  char *string = malloc(sizeof(char) * (times + 1));
  int i;
  for (i = 0; i < times; i++) {
    string[i] = c;
  }
  return string;
}


x86 assembly (clang, -O0):
<repeat_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
cltq
shl    $0x0,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1167 <repeat_char+0x57>
mov    -0x1(%rbp),%dl
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    113f <repeat_char+0x2f>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<repeat_char>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebp
mov    %edi,%r14d
lea    0x1(%rbp),%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %ebp,%ebp
jle    1146 <repeat_char+0x26>
mov    %ebp,%edx
movzbl %r14b,%esi
mov    %rbx,%rdi
call   1030 <memset@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @repeat_char(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = add nsw i32 %7, 1
%9 = sext i32 %8 to i64
%10 = mul i64 1, %9
%11 = trunc i64 %10 to i32
%12 = call i8* @malloc(i32 %11)
store i8* %12, i8** %5
store i32 0, i32* %6
br label %13
13: ; preds = %23, %2
%14 = load i32, i32* %6
%15 = load i32, i32* %4
%16 = icmp slt i32 %14, %15
br i1 %16, label %17, label %26
17: ; preds = %13
%18 = load i8, i8* %3
%19 = load i8*, i8** %5
%20 = load i32, i32* %6
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i8, i8* %19, i64 %21
store i8 %18, i8* %22
br label %23
23: ; preds = %17
%24 = load i32, i32* %6
%25 = add nsw i32 %24, 1
store i32 %25, i32* %6
br label %13
26: ; preds = %13
%27 = load i8*, i8** %5
ret i8* %27
}

LLVM IR (-O2):
define noalias i8* @repeat_char(i8 signext %0, i32 %1) {
%3 = add nsw i32 %1, 1
%4 = tail call i8* @malloc(i32 %3)
%5 = icmp sgt i32 %1, 0
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = zext i32 %1 to i64
br label %8
8: ; preds = %6, %2
ret i8* %4
}
void X509_CRL_get_ext(void) {}


x86 assembly (clang, -O0):
<X509_CRL_get_ext>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_CRL_get_ext>:
ret

LLVM IR (-O0):
define void @X509_CRL_get_ext() {
ret void
}

LLVM IR (-O2):
define void @X509_CRL_get_ext() {
ret void
}
void led_off() { *(volatile unsigned long *)0x56000014 = 0x7ff; }


x86 assembly (clang, -O0):
<led_off>:
push   %rbp
mov    %rsp,%rbp
mov    $0x56000014,%eax
movq   $0x7ff,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<led_off>:
movq   $0x7ff,0x56000014
ret

LLVM IR (-O0):
define void @led_off() {
store volatile i64 2047, i64* inttoptr (i64 1442840596 to i64*)
ret void
}

LLVM IR (-O2):
define void @led_off() {
store volatile i64 2047, i64* inttoptr (i64 1442840596 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ isNum(char);
char *goNum(char *str) {
  for (; *str != '\0'; ++str) {
    if (!isNum(*str))
      return str;
  }
  return 0;
}


x86 assembly (clang, -O0):
<goNum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1164 <goNum+0x54>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isNum@plt>
cmp    $0x0,%eax
jne    114e <goNum+0x3e>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    116c <goNum+0x5c>
jmp    1153 <goNum+0x43>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    111c <goNum+0xc>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<goNum>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1138 <goNum+0x28>
mov    %rdi,%rbx
nopw   0x0(%rax,%rax,1)
movsbl %al,%edi
call   1030 <isNum@plt>
test   %eax,%eax
je     113a <goNum+0x2a>
movzbl 0x1(%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <goNum+0x10>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @goNum(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %17, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %20
9: ; preds = %4
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = call i32 @isNum(i8 signext %11)
%13 = icmp ne i32 %12, 0
br i1 %13, label %16, label %14
14: ; preds = %9
%15 = load i8*, i8** %3
store i8* %15, i8** %2
br label %21
16: ; preds = %9
br label %17
17: ; preds = %16
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
br label %4
20: ; preds = %4
store i8* null, i8** %2
br label %21
21: ; preds = %20, %14
%22 = load i8*, i8** %2
ret i8* %22
}

LLVM IR (-O2):
define i8* @goNum(i8* %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1, %9
%5 = phi i8 [ %11, %9 ], [ %2, %1 ]
%6 = phi i8* [ %10, %9 ], [ %0, %1 ]
%7 = tail call i32 @isNum(i8 signext %5)
%8 = icmp eq i32 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %4
%10 = getelementptr inbounds i8, i8* %6, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %9, %1
%14 = phi i8* [ null, %1 ], [ null, %9 ], [ %6, %4 ]
ret i8* %14
}
/* Variables and functions */
double iceSubRateVacuum(double);
double iceSubRate(double t, double z) {
  return (1.0 * iceSubRateVacuum(t) / z);
}


x86 assembly (clang, -O0):
<iceSubRate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <iceSubRateVacuum@plt>
movaps %xmm0,%xmm1
movsd  0xec9(%rip),%xmm0
mulsd  %xmm1,%xmm0
divsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iceSubRate>:
push   %rax
movsd  %xmm1,(%rsp)
call   1030 <iceSubRateVacuum@plt>
divsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @iceSubRate(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = call double @iceSubRateVacuum(double %5)
%7 = fmul double 1.000000e+00, %6
%8 = load double, double* %4
%9 = fdiv double %7, %8
ret double %9
}

LLVM IR (-O2):
define double @iceSubRate(double %0, double %1) {
%3 = tail call double @iceSubRateVacuum(double %0)
%4 = fdiv double %3, %1
ret double %4
}
/* Type definitions */
struct timeval {
  int tv_sec;
  int tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/);
long timeOfDayinMS() {
  struct timeval t;
  gettimeofday(&t, 0);
  return t.tv_sec * 1000 + t.tv_usec / 1000;
}


x86 assembly (clang, -O0):
<timeOfDayinMS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
imul   $0x3e8,-0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timeOfDayinMS>:
push   %rax
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
movslq (%rsp),%rax
imul   $0x3e8,%rax,%rcx
movslq 0x4(%rsp),%rax
imul   $0x10624dd3,%rax,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rax
add    %edx,%eax
cltq
add    %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define i64 @timeOfDayinMS() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32 0)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load i32, i32* %3
%5 = mul nsw i32 %4, 1000
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%7 = load i32, i32* %6
%8 = sdiv i32 %7, 1000
%9 = add nsw i32 %5, %8
%10 = sext i32 %9 to i64
ret i64 %10
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define i64 @timeOfDayinMS() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32 0)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load i32, i32* %4
%6 = mul nsw i32 %5, 1000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%8 = load i32, i32* %7
%9 = sdiv i32 %8, 1000
%10 = add nsw i32 %9, %6
%11 = sext i32 %10 to i64
ret i64 %11
}
int test_imm_99int16_reg(short val) {
  return ((val) & (0x99 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_99int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x99,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_99int16_reg>:
test   $0x99,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_99int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 153
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_99int16_reg(i16 signext %0) {
%2 = and i16 %0, 153
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ time_t;
struct timespec {
  long tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, struct timespec *);
void delay(unsigned int howLong) {
  struct timespec sleeper, dummy;
  sleeper.tv_sec = (time_t)(howLong / 1000);
  sleeper.tv_nsec = (long)(howLong % 1000) * 1000000;
  nanosleep(&sleeper, &dummy);
}


x86 assembly (clang, -O0):
<delay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,%eax
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%eax
imul   $0xf4240,%rax,%rax
mov    %rax,-0x18(%rbp)
lea    -0x18(%rbp),%rdi
lea    -0x28(%rbp),%rsi
call   1030 <nanosleep@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay>:
sub    $0x28,%rsp
mov    %edi,%eax
imul   $0x10624dd3,%rax,%rax
shr    $0x26,%rax
mov    %rax,0x10(%rsp)
imul   $0x3e8,%eax,%eax
sub    %eax,%edi
imul   $0xf4240,%edi,%eax
mov    %rax,0x8(%rsp)
lea    0x8(%rsp),%rdi
lea    0x18(%rsp),%rsi
call   1030 <nanosleep@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
define void @delay(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.timespec
%4 = alloca %struct.timespec
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = udiv i32 %5, 1000
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
store i64 %7, i64* %8
%9 = load i32, i32* %2
%10 = urem i32 %9, 1000
%11 = zext i32 %10 to i64
%12 = mul nsw i64 %11, 1000000
%13 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
store i64 %12, i64* %13
%14 = call i32 @nanosleep(%struct.timespec* %3, %struct.timespec* %4)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i64, i64 }
define void @delay(i32 %0) {
%2 = alloca %struct.timespec
%3 = alloca %struct.timespec
%4 = bitcast %struct.timespec* %2 to i8*
%5 = bitcast %struct.timespec* %3 to i8*
%6 = udiv i32 %0, 1000
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 1
store i64 %7, i64* %8
%9 = urem i32 %0, 1000
%10 = mul nuw nsw i32 %9, 1000000
%11 = zext i32 %10 to i64
%12 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 0
store i64 %11, i64* %12
%13 = call i32 @nanosleep(%struct.timespec* %2, %struct.timespec* %3)
ret void
}
void encodeDmaGo(void) {}


x86 assembly (clang, -O0):
<encodeDmaGo>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<encodeDmaGo>:
ret

LLVM IR (-O0):
define void @encodeDmaGo() {
ret void
}

LLVM IR (-O2):
define void @encodeDmaGo() {
ret void
}
int test_imm_BBuint16_mem(unsigned short *val) {
  return ((*val) & (-0xBB << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_BBuint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffff45,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_BBuint16_mem>:
movzwl (%rdi),%eax
test   $0xff45,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_BBuint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -187
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_BBuint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -187
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int getchar();
int VM_getchar(void) { return getchar(); }


x86 assembly (clang, -O0):
<VM_getchar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getchar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<VM_getchar>:
xor    %eax,%eax
jmp    1030 <getchar@plt>

LLVM IR (-O0):
define i32 @VM_getchar() {
%1 = call i32 (...) @getchar()
ret i32 %1
}

LLVM IR (-O2):
define i32 @VM_getchar() {
%1 = tail call i32 (...) @getchar()
ret i32 %1
}
void esvaziastring(char *s, int t) {
  int i = 0;
  for (i = 0; i < t; i++) {
    s[i] = 0;
  }
}


x86 assembly (clang, -O0):
<esvaziastring>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    113f <esvaziastring+0x3f>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1119 <esvaziastring+0x19>
pop    %rbp
ret

x86 assembly (clang, -O2):
<esvaziastring>:
test   %esi,%esi
jle    1122 <esvaziastring+0x12>
push   %rax
mov    %esi,%edx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @esvaziastring(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %5
br label %6
6: ; preds = %15, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
store i8 0, i8* %14
br label %15
15: ; preds = %10
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
br label %6
18: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @esvaziastring(i8* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %2
ret void
}
/* Variables and functions */
int inb(int);
int /*<<< orphan*/ outb(int, int);
void enable_irq(unsigned char channel) {
  if (channel > 7) {
    outb(0xA1, inb(0xA1) & ~(1 << (channel - 8)));
    enable_irq(2);
  } else {
    outb(0x21, inb(0x21) & ~(1 << channel));
  }
}


x86 assembly (clang, -O0):
<enable_irq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0x7,%eax
jle    1183 <enable_irq+0x53>
mov    $0xa1,%edi
call   1050 <inb@plt>
mov    %eax,%esi
movzbl -0x1(%rbp),%ecx
sub    $0x8,%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
and    %eax,%esi
mov    $0xa1,%edi
call   1030 <outb@plt>
mov    $0x2,%edi
call   1040 <enable_irq@plt>
jmp    11a9 <enable_irq+0x79>
mov    $0x21,%edi
call   1050 <inb@plt>
mov    %eax,%esi
movzbl -0x1(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
and    %eax,%esi
mov    $0x21,%edi
call   1030 <outb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<enable_irq>:
push   %rbx
mov    %edi,%ebx
cmp    $0x8,%bl
jb     1153 <enable_irq+0x33>
mov    $0xa1,%edi
call   1040 <inb@plt>
add    $0xf8,%bl
btr    %ebx,%eax
mov    $0xa1,%edi
mov    %eax,%esi
call   1030 <outb@plt>
mov    $0x21,%edi
call   1040 <inb@plt>
and    $0xfffffffb,%eax
jmp    1160 <enable_irq+0x40>
mov    $0x21,%edi
call   1040 <inb@plt>
btr    %ebx,%eax
mov    $0x21,%edi
mov    %eax,%esi
pop    %rbx
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @enable_irq(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = icmp sgt i32 %4, 7
br i1 %5, label %6, label %15
6: ; preds = %1
%7 = call i32 @inb(i32 161)
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = sub nsw i32 %9, 8
%11 = shl i32 1, %10
%12 = xor i32 %11, -1
%13 = and i32 %7, %12
%14 = call i32 @outb(i32 161, i32 %13)
br label %23
15: ; preds = %1
%16 = call i32 @inb(i32 33)
%17 = load i8, i8* %2
%18 = zext i8 %17 to i32
%19 = shl i32 1, %18
%20 = xor i32 %19, -1
%21 = and i32 %16, %20
%22 = call i32 @outb(i32 33, i32 %21)
br label %23
23: ; preds = %15, %6
ret void
}

LLVM IR (-O2):
define void @enable_irq(i8 zeroext %0) {
%2 = zext i8 %0 to i32
%3 = icmp ugt i8 %0, 7
br i1 %3, label %4, label %13
4: ; preds = %1
%5 = tail call i32 @inb(i32 161)
%6 = add nsw i32 %2, -8
%7 = shl nuw i32 1, %6
%8 = xor i32 %7, -1
%9 = and i32 %5, %8
%10 = tail call i32 @outb(i32 161, i32 %9)
%11 = tail call i32 @inb(i32 33)
%12 = and i32 %11, -5
br label %18
13: ; preds = %1
%14 = tail call i32 @inb(i32 33)
%15 = shl nuw i32 1, %2
%16 = xor i32 %15, -1
%17 = and i32 %14, %16
br label %18
18: ; preds = %13, %4
%19 = phi i32 [ %17, %13 ], [ %12, %4 ]
%20 = tail call i32 @outb(i32 33, i32 %19)
ret void
}
int bcd2dec(int v) { return (v % 10) + 10 * (v / 16); }


x86 assembly (clang, -O0):
<bcd2dec>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x10,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
imul   $0xa,%ecx,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcd2dec>:
movslq %edi,%rax
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
add    %edx,%ecx
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
mov    %eax,%edx
sub    %ecx,%edx
lea    0xf(%rax),%ecx
test   %eax,%eax
cmovns %eax,%ecx
sar    $0x4,%ecx
lea    (%rcx,%rcx,4),%eax
lea    (%rdx,%rax,2),%eax
ret

LLVM IR (-O0):
define i32 @bcd2dec(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 10
%5 = load i32, i32* %2
%6 = sdiv i32 %5, 16
%7 = mul nsw i32 10, %6
%8 = add nsw i32 %4, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @bcd2dec(i32 %0) {
%2 = srem i32 %0, 10
%3 = sdiv i32 %0, 16
%4 = mul nsw i32 %3, 10
%5 = add nsw i32 %4, %2
ret i32 %5
}
unsigned int f50(unsigned int x, long int y) {
  return (x << ((-y) & (8 * 4 - 1))) ^ (x >> y);
}


x86 assembly (clang, -O0):
<f50>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
xor    %ecx,%ecx
sub    -0x10(%rbp),%rcx
and    $0x1f,%rcx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
mov    -0x10(%rbp),%rcx
shr    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f50>:
mov    %esi,%ecx
neg    %cl
mov    %edi,%eax
shl    %cl,%eax
mov    %esi,%ecx
shr    %cl,%edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f50(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = load i32, i32* %3
%6 = load i64, i64* %4
%7 = sub nsw i64 0, %6
%8 = and i64 %7, 31
%9 = trunc i64 %8 to i32
%10 = shl i32 %5, %9
%11 = load i32, i32* %3
%12 = load i64, i64* %4
%13 = trunc i64 %12 to i32
%14 = lshr i32 %11, %13
%15 = xor i32 %10, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @f50(i32 %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = sub i32 0, %3
%5 = and i32 %4, 31
%6 = shl i32 %0, %5
%7 = lshr i32 %0, %3
%8 = xor i32 %6, %7
ret i32 %8
}
/* Variables and functions */
scalar_t__ my_malloc(int);
int *create_int_vector(int n) {
  int *v;
  v = (int *)my_malloc(n * sizeof(int));
  return v;
}


x86 assembly (clang, -O0):
<create_int_vector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edi
call   1030 <my_malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_int_vector>:
shl    $0x2,%edi
jmp    1030 <my_malloc@plt>

LLVM IR (-O0):
define i32* @create_int_vector(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sext i32 %4 to i64
%6 = mul i64 %5, 4
%7 = trunc i64 %6 to i32
%8 = call i64 @my_malloc(i32 %7)
%9 = inttoptr i64 %8 to i32*
store i32* %9, i32** %3
%10 = load i32*, i32** %3
ret i32* %10
}

LLVM IR (-O2):
define i32* @create_int_vector(i32 %0) {
%2 = shl i32 %0, 2
%3 = tail call i64 @my_malloc(i32 %2)
%4 = inttoptr i64 %3 to i32*
ret i32* %4
}
/* Type definitions */
struct ao_log_mega {
  int dummy;
};

/* Variables and functions */
scalar_t__ parse_config(char const *, struct ao_log_mega *);
scalar_t__ parse_eeprom(char const *, struct ao_log_mega *);
int cc_mega_parse(const char *input_line, struct ao_log_mega *l) {
  return parse_eeprom(input_line, l) || parse_config(input_line, l);
}


x86 assembly (clang, -O0):
<cc_mega_parse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <parse_eeprom@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x11(%rbp)
jne    1166 <cc_mega_parse+0x46>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <parse_config@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cc_mega_parse>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <parse_eeprom@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
jne    1152 <cc_mega_parse+0x32>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <parse_config@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.ao_log_mega = type { i32 }
define i32 @cc_mega_parse(i8* %0, %struct.ao_log_mega* %1) {
%3 = alloca i8*
%4 = alloca %struct.ao_log_mega*
store i8* %0, i8** %3
store %struct.ao_log_mega* %1, %struct.ao_log_mega** %4
%5 = load i8*, i8** %3
%6 = load %struct.ao_log_mega*, %struct.ao_log_mega** %4
%7 = call i64 @parse_eeprom(i8* %5, %struct.ao_log_mega* %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %2
%10 = load i8*, i8** %3
%11 = load %struct.ao_log_mega*, %struct.ao_log_mega** %4
%12 = call i64 @parse_config(i8* %10, %struct.ao_log_mega* %11)
%13 = icmp ne i64 %12, 0
br label %14
14: ; preds = %9, %2
%15 = phi i1 [ true, %2 ], [ %13, %9 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
%struct.ao_log_mega = type { i32 }
define i32 @cc_mega_parse(i8* %0, %struct.ao_log_mega* %1) {
%3 = tail call i64 @parse_eeprom(i8* %0, %struct.ao_log_mega* %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = tail call i64 @parse_config(i8* %0, %struct.ao_log_mega* %1)
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %5, %2
%10 = phi i32 [ 1, %2 ], [ %8, %5 ]
ret i32 %10
}
void rop3_103_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = T | S;
  stk3 = ~stk3;
  stk2 = *D | stk3;
  stk1 = S ^ stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_103_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0x9(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xd(%rbp)
movzbl -0xd(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_103_1_1>:
mov    %edx,%eax
or     %sil,%al
not    %al
mov    (%rdi),%cl
and    %cl,%sil
or     %al,%sil
and    %dl,%cl
or     %sil,%cl
mov    %cl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_103_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %6
%11 = zext i8 %10 to i32
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %9
%16 = load i8, i8* %9
%17 = zext i8 %16 to i32
%18 = xor i32 %17, -1
%19 = trunc i32 %18 to i8
store i8 %19, i8* %9
%20 = load i8*, i8** %4
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = load i8, i8* %9
%24 = zext i8 %23 to i32
%25 = or i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %8
%27 = load i8, i8* %5
%28 = zext i8 %27 to i32
%29 = load i8, i8* %8
%30 = zext i8 %29 to i32
%31 = xor i32 %28, %30
%32 = trunc i32 %31 to i8
store i8 %32, i8* %7
%33 = load i8, i8* %7
%34 = zext i8 %33 to i32
%35 = load i8, i8* %5
%36 = zext i8 %35 to i32
%37 = xor i32 %36, -1
%38 = and i32 %34, %37
%39 = load i8, i8* %6
%40 = zext i8 %39 to i32
%41 = xor i32 %40, -1
%42 = and i32 %38, %41
%43 = load i8*, i8** %4
%44 = load i8, i8* %43
%45 = zext i8 %44 to i32
%46 = load i8, i8* %5
%47 = zext i8 %46 to i32
%48 = and i32 %45, %47
%49 = or i32 %42, %48
%50 = load i8*, i8** %4
%51 = load i8, i8* %50
%52 = zext i8 %51 to i32
%53 = load i8, i8* %6
%54 = zext i8 %53 to i32
%55 = and i32 %52, %54
%56 = or i32 %49, %55
%57 = trunc i32 %56 to i8
%58 = load i8*, i8** %4
store i8 %57, i8* %58
ret void
}

LLVM IR (-O2):
define void @rop3_103_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = or i8 %2, %1
%5 = xor i8 %4, -1
%6 = load i8, i8* %0
%7 = and i8 %6, %1
%8 = or i8 %7, %5
%9 = and i8 %6, %2
%10 = or i8 %8, %9
store i8 %10, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ i2cmaster_WriteAddrREG(int /*<<< orphan*/, unsigned char,
                                          unsigned char);
void i2c0master_WriteAddrREG(unsigned char addr, unsigned char rwbit) {
  i2cmaster_WriteAddrREG(0, addr, rwbit);
}


x86 assembly (clang, -O0):
<i2c0master_WriteAddrREG>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    -0x1(%rbp),%al
xor    %edi,%edi
movzbl %al,%esi
movzbl -0x2(%rbp),%edx
call   1030 <i2cmaster_WriteAddrREG@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c0master_WriteAddrREG>:
mov    %esi,%edx
mov    %edi,%esi
xor    %edi,%edi
jmp    1030 <i2cmaster_WriteAddrREG@plt>

LLVM IR (-O0):
define void @i2c0master_WriteAddrREG(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = load i8, i8* %4
%7 = call i32 @i2cmaster_WriteAddrREG(i32 0, i8 zeroext %5, i8 zeroext %6)
ret void
}

LLVM IR (-O2):
define void @i2c0master_WriteAddrREG(i8 zeroext %0, i8 zeroext %1) {
%3 = tail call i32 @i2cmaster_WriteAddrREG(i32 0, i8 zeroext %0, i8 zeroext %1)
ret void
}
void rwsem_clear_owner(struct rw_semaphore *sem) {}


x86 assembly (clang, -O0):
<rwsem_clear_owner>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rwsem_clear_owner>:
ret

LLVM IR (-O0):
%struct.rw_semaphore = type opaque
define void @rwsem_clear_owner(%struct.rw_semaphore* %0) {
%2 = alloca %struct.rw_semaphore*
store %struct.rw_semaphore* %0, %struct.rw_semaphore** %2
ret void
}

LLVM IR (-O2):
%struct.rw_semaphore = type opaque
define void @rwsem_clear_owner(%struct.rw_semaphore* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ outb(int, int);
void eoi_pic1(void) { outb(0x20, 0x0020); }


x86 assembly (clang, -O0):
<eoi_pic1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20,%esi
mov    %esi,%edi
call   1030 <outb@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<eoi_pic1>:
mov    $0x20,%edi
mov    $0x20,%esi
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @eoi_pic1() {
%1 = call i32 @outb(i32 32, i32 32)
ret void
}

LLVM IR (-O2):
define void @eoi_pic1() {
%1 = tail call i32 @outb(i32 32, i32 32)
ret void
}
/* Type definitions */
typedef int const u_int8_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int const *);
unsigned fat12_last_half(u_int8_t *buf) {
  unsigned retval;
  static const int LAST_HALF_MASK = 0xF0;
  assert(buf);
  retval = (buf[1] & LAST_HALF_MASK) >> 4;
  retval += buf[2] << 4;
  return retval;
}


x86 assembly (clang, -O0):
<fat12_last_half>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
and    $0xf0,%eax
sar    $0x4,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%eax
shl    $0x4,%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fat12_last_half>:
push   %rbx
mov    %rdi,%rbx
call   1030 <assert@plt>
mov    0x4(%rbx),%ecx
mov    0x8(%rbx),%eax
shr    $0x4,%ecx
and    $0xf,%ecx
shl    $0x4,%eax
or     %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@fat12_last_half.LAST_HALF_MASK = internal constant i32 240
define i32 @fat12_last_half(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @assert(i32* %4)
%6 = load i32*, i32** %2
%7 = getelementptr inbounds i32, i32* %6, i64 1
%8 = load i32, i32* %7
%9 = and i32 %8, 240
%10 = ashr i32 %9, 4
store i32 %10, i32* %3
%11 = load i32*, i32** %2
%12 = getelementptr inbounds i32, i32* %11, i64 2
%13 = load i32, i32* %12
%14 = shl i32 %13, 4
%15 = load i32, i32* %3
%16 = add i32 %15, %14
store i32 %16, i32* %3
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @fat12_last_half(i32* %0) {
%2 = tail call i32 @assert(i32* %0)
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = load i32, i32* %3
%5 = lshr i32 %4, 4
%6 = and i32 %5, 15
%7 = getelementptr inbounds i32, i32* %0, i64 2
%8 = load i32, i32* %7
%9 = shl i32 %8, 4
%10 = or i32 %6, %9
ret i32 %10
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t prv_gte_real_fn(double a, double b) { return a >= b ? -1 : 0; }


x86 assembly (clang, -O0):
<prv_gte_real_fn>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
xor    %eax,%eax
mov    $0xffffffff,%ecx
ucomisd %xmm1,%xmm0
cmovae %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<prv_gte_real_fn>:
xor    %eax,%eax
ucomisd %xmm1,%xmm0
adc    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @prv_gte_real_fn(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp oge double %5, %6
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -1, i32 0
ret i32 %9
}

LLVM IR (-O2):
define i32 @prv_gte_real_fn(double %0, double %1) {
%3 = fcmp oge double %0, %1
%4 = sext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int hostap_ioctl_readmif(char const *, int);
int /*<<< orphan*/ printf(char *, int, char const *, char, char const *);
void show_bbp_cr_signed(const char *dev, int cr, const char *desc,
                        const char *extra) {
  int res;
  res = hostap_ioctl_readmif(dev, cr);
  if (res >= 0)
    printf("CR%d (%s): %d%s\n", cr, desc, (signed char)res, extra);
}


x86 assembly (clang, -O0):
<show_bbp_cr_signed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <hostap_ioctl_readmif@plt>
mov    %eax,-0x24(%rbp)
cmpl   $0x0,-0x24(%rbp)
jl     116d <show_bbp_cr_signed+0x4d>
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x24(%rbp),%eax
mov    -0x20(%rbp),%r8
lea    0xe9b(%rip),%rdi
movsbl %al,%ecx
call   1030 <printf@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_bbp_cr_signed>:
push   %rbp
push   %r14
push   %rbx
mov    %rcx,%r14
mov    %rdx,%rbx
mov    %esi,%ebp
call   1040 <hostap_ioctl_readmif@plt>
test   %eax,%eax
js     1150 <show_bbp_cr_signed+0x30>
movsbl %al,%ecx
lea    0xec1(%rip),%rdi
mov    %ebp,%esi
mov    %rbx,%rdx
mov    %r14,%r8
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <printf@plt>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [17 x i8] c"CR%d (%s): %d%s\0A\00"
define void @show_bbp_cr_signed(i8* %0, i32 %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%10 = load i8*, i8** %5
%11 = load i32, i32* %6
%12 = call i32 @hostap_ioctl_readmif(i8* %10, i32 %11)
store i32 %12, i32* %9
%13 = load i32, i32* %9
%14 = icmp sge i32 %13, 0
br i1 %14, label %15, label %22
15: ; preds = %4
%16 = load i32, i32* %6
%17 = load i8*, i8** %7
%18 = load i32, i32* %9
%19 = trunc i32 %18 to i8
%20 = load i8*, i8** %8
%21 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %16, i8* %17, i8 signext %19, i8* %20)
br label %22
22: ; preds = %15, %4
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"CR%d (%s): %d%s\0A\00"
define void @show_bbp_cr_signed(i8* %0, i32 %1, i8* %2, i8* %3) {
%5 = tail call i32 @hostap_ioctl_readmif(i8* %0, i32 %1)
%6 = icmp sgt i32 %5, -1
br i1 %6, label %7, label %10
7: ; preds = %4
%8 = trunc i32 %5 to i8
%9 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %1, i8* %2, i8 signext %8, i8* %3)
br label %10
10: ; preds = %7, %4
ret void
}
/* Variables and functions */
scalar_t__ RAND_MAX;
scalar_t__ rand();
float energyProduction() {
  float r = (float)(rand()) / (float)(RAND_MAX);
  return r;
}


x86 assembly (clang, -O0):
<energyProduction>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2ss %rax,%xmm0
mov    0x2ebd(%rip),%rax
cvtsi2ssq (%rax),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<energyProduction>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2ss %rax,%xmm0
mov    0x2ec4(%rip),%rax
cvtsi2ssq (%rax),%xmm1
divss  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define float @energyProduction() {
%1 = alloca float
%2 = call i64 (...) @rand()
%3 = sitofp i64 %2 to float
%4 = load i64, i64* @RAND_MAX
%5 = sitofp i64 %4 to float
%6 = fdiv float %3, %5
store float %6, float* %1
%7 = load float, float* %1
ret float %7
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define float @energyProduction() {
%1 = tail call i64 (...) @rand()
%2 = sitofp i64 %1 to float
%3 = load i64, i64* @RAND_MAX
%4 = sitofp i64 %3 to float
%5 = fdiv float %2, %4
ret float %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ off_t;

/* Variables and functions */
int /*<<< orphan*/ SYS_ftruncate;
int errno;
int syscall(int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/);
int usfs_ftruncate(uint64_t fh, off_t offset) {
  int ret = syscall(SYS_ftruncate, fh, offset);
  if (-1 == ret) {
    ret = errno;
  }
  return ret;
}


x86 assembly (clang, -O0):
<usfs_ftruncate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    0x2ebb(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
call   1030 <syscall@plt>
mov    %eax,-0xc(%rbp)
mov    $0xffffffff,%eax
cmp    -0xc(%rbp),%eax
jne    114f <usfs_ftruncate+0x3f>
mov    0x2e8e(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usfs_ftruncate>:
push   %rax
mov    %esi,%edx
mov    %edi,%esi
mov    0x2ec4(%rip),%rax
mov    (%rax),%edi
call   1030 <syscall@plt>
cmp    $0xffffffff,%eax
jne    1131 <usfs_ftruncate+0x21>
mov    0x2ea9(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@SYS_ftruncate = global i32 0
@errno = global i32 0
define i32 @usfs_ftruncate(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* @SYS_ftruncate
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = call i32 @syscall(i32 %6, i32 %7, i32 %8)
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = icmp eq i32 -1, %10
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = load i32, i32* @errno
store i32 %13, i32* %5
br label %14
14: ; preds = %12, %2
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
@SYS_ftruncate = global i32 0
@errno = global i32 0
define i32 @usfs_ftruncate(i32 %0, i32 %1) {
%3 = load i32, i32* @SYS_ftruncate
%4 = tail call i32 @syscall(i32 %3, i32 %0, i32 %1)
%5 = icmp eq i32 %4, -1
%6 = load i32, i32* @errno
%7 = select i1 %5, i32 %6, i32 %4
ret i32 %7
}
float Normalize(float value, float start, float end) {
  return (value - start) / (end - start);
}


x86 assembly (clang, -O0):
<Normalize>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
subss  -0x8(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
subss  -0x8(%rbp),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Normalize>:
subss  %xmm1,%xmm0
subss  %xmm1,%xmm2
divss  %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @Normalize(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = fsub float %7, %8
%10 = load float, float* %6
%11 = load float, float* %5
%12 = fsub float %10, %11
%13 = fdiv float %9, %12
ret float %13
}

LLVM IR (-O2):
define float @Normalize(float %0, float %1, float %2) {
%4 = fsub float %0, %1
%5 = fsub float %2, %1
%6 = fdiv float %4, %5
ret float %6
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
void ibm_555_to_big_5(FILE *infilefp, FILE *outfilefp) {
  int char1, char2;
  int outchar1, outchar2;
  return;
}


x86 assembly (clang, -O0):
<ibm_555_to_big_5>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ibm_555_to_big_5>:
ret

LLVM IR (-O0):
define void @ibm_555_to_big_5(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
ret void
}

LLVM IR (-O2):
define void @ibm_555_to_big_5(i32* nocapture %0, i32* nocapture %1) {
ret void
}
/* Variables and functions */
int strncmp(char const *, char const *, size_t);
int strnoscmp(const char *s, const char *t, size_t n) {
  return strncmp(s, t, n);
}


x86 assembly (clang, -O0):
<strnoscmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strnoscmp>:
jmp    1030 <strncmp@plt>

LLVM IR (-O0):
define i32 @strnoscmp(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @strncmp(i8* %7, i8* %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @strnoscmp(i8* nocapture %0, i8* nocapture %1, i64 %2) {
%4 = tail call i32 @strncmp(i8* %0, i8* %1, i64 %2)
ret i32 %4
}