xunge/DecIR huggingface dataset:
unsigned short int f22(unsigned short int x, unsigned long int y) {
  return (x >> ((-y) & (8 * 2 - 1))) ^ (x << y);
}


x86 assembly (clang, -O0):
<f22>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
movzwl -0x2(%rbp),%eax
xor    %ecx,%ecx
sub    -0x10(%rbp),%rcx
and    $0xf,%rcx
sar    %cl,%eax
movzwl -0x2(%rbp),%edx
mov    -0x10(%rbp),%rcx
shl    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f22>:
mov    %esi,%ecx
neg    %cl
and    $0xf,%cl
mov    %edi,%eax
shr    %cl,%eax
mov    %esi,%ecx
shl    %cl,%edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @f22(i16 zeroext %0, i64 %1) {
%3 = alloca i16
%4 = alloca i64
store i16 %0, i16* %3
store i64 %1, i64* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = load i64, i64* %4
%8 = sub i64 0, %7
%9 = and i64 %8, 15
%10 = trunc i64 %9 to i32
%11 = ashr i32 %6, %10
%12 = load i16, i16* %3
%13 = zext i16 %12 to i32
%14 = load i64, i64* %4
%15 = trunc i64 %14 to i32
%16 = shl i32 %13, %15
%17 = xor i32 %11, %16
%18 = trunc i32 %17 to i16
ret i16 %18
}

LLVM IR (-O2):
define zeroext i16 @f22(i16 zeroext %0, i64 %1) {
%3 = zext i16 %0 to i32
%4 = trunc i64 %1 to i32
%5 = sub i32 0, %4
%6 = and i32 %5, 15
%7 = lshr i32 %3, %6
%8 = shl i32 %3, %4
%9 = xor i32 %7, %8
%10 = trunc i32 %9 to i16
ret i16 %10
}
unsigned int date_to_unique_id(int y, int m, int d) {
  return ((unsigned int)y - 1800) * 10000000 + (unsigned int)m * 625000 +
         (unsigned int)d * 15625;
}


x86 assembly (clang, -O0):
<date_to_unique_id>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x708,%eax
imul   $0x989680,%eax,%eax
imul   $0x98968,-0x8(%rbp),%ecx
add    %ecx,%eax
imul   $0x3d09,-0xc(%rbp),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<date_to_unique_id>:
imul   $0x989680,%edi,%eax
imul   $0x98968,%esi,%ecx
add    %eax,%ecx
imul   $0x3d09,%edx,%eax
add    %ecx,%eax
add    $0xcf1dcc00,%eax
ret

LLVM IR (-O0):
define i32 @date_to_unique_id(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = sub i32 %7, 1800
%9 = mul i32 %8, 10000000
%10 = load i32, i32* %5
%11 = mul i32 %10, 625000
%12 = add i32 %9, %11
%13 = load i32, i32* %6
%14 = mul i32 %13, 15625
%15 = add i32 %12, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @date_to_unique_id(i32 %0, i32 %1, i32 %2) {
%4 = mul i32 %0, 10000000
%5 = add i32 %4, -820130816
%6 = mul i32 %1, 625000
%7 = add i32 %5, %6
%8 = mul i32 %2, 15625
%9 = add i32 %7, %8
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ __ppm_module_map_part_MOD_ppm_map_part_send(int *, int *,
                                                               int *);
void ppm_map_part_send(int *npart, int *mpart, int *info) {
  __ppm_module_map_part_MOD_ppm_map_part_send(npart, mpart, info);
}


x86 assembly (clang, -O0):
<ppm_map_part_send>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <__ppm_module_map_part_MOD_ppm_map_part_send@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ppm_map_part_send>:
jmp    1030 <__ppm_module_map_part_MOD_ppm_map_part_send@plt>

LLVM IR (-O0):
define void @ppm_map_part_send(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = load i32*, i32** %5
%9 = load i32*, i32** %6
%10 = call i32 @__ppm_module_map_part_MOD_ppm_map_part_send(i32* %7, i32* %8, i32* %9)
ret void
}

LLVM IR (-O2):
define void @ppm_map_part_send(i32* %0, i32* %1, i32* %2) {
%4 = tail call i32 @__ppm_module_map_part_MOD_ppm_map_part_send(i32* %0, i32* %1, i32* %2)
ret void
}
void RTThreadPoke(void) {}


x86 assembly (clang, -O0):
<RTThreadPoke>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTThreadPoke>:
ret

LLVM IR (-O0):
define void @RTThreadPoke() {
ret void
}

LLVM IR (-O2):
define void @RTThreadPoke() {
ret void
}
void ep93xx_keypad_release_gpio(struct platform_device *pdev) {}


x86 assembly (clang, -O0):
<ep93xx_keypad_release_gpio>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ep93xx_keypad_release_gpio>:
ret

LLVM IR (-O0):
%struct.platform_device = type opaque
define void @ep93xx_keypad_release_gpio(%struct.platform_device* %0) {
%2 = alloca %struct.platform_device*
store %struct.platform_device* %0, %struct.platform_device** %2
ret void
}

LLVM IR (-O2):
%struct.platform_device = type opaque
define void @ep93xx_keypad_release_gpio(%struct.platform_device* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_receive_sigurg();
void sigurg(int signo) { set_receive_sigurg(); }


x86 assembly (clang, -O0):
<sigurg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <set_receive_sigurg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigurg>:
xor    %eax,%eax
jmp    1030 <set_receive_sigurg@plt>

LLVM IR (-O0):
define void @sigurg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @set_receive_sigurg()
ret void
}

LLVM IR (-O2):
define void @sigurg(i32 %0) {
%2 = tail call i32 (...) @set_receive_sigurg()
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void EMACTimestampTargetSet(uint32_t ui32Base, uint32_t ui32Seconds,
                            uint32_t ui32SubSeconds) {
  ;
  while ((*((volatile uint32_t *)(ui32Base + 0x00000720))) & 0x80000000) {
  }
  (*((volatile uint32_t *)(ui32Base + 0x0000071C))) = ui32Seconds;
  (*((volatile uint32_t *)(ui32Base + 0x00000720))) = ui32SubSeconds;
}


x86 assembly (clang, -O0):
<EMACTimestampTargetSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    $0x720,%eax
cltq
mov    (%rax),%eax
and    $0x80000000,%eax
cmp    $0x0,%eax
je     112c <EMACTimestampTargetSet+0x2c>
jmp    110d <EMACTimestampTargetSet+0xd>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x71c,%eax
cltq
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x720,%eax
cltq
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<EMACTimestampTargetSet>:
movslq %edi,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
cmpl   $0x0,0x720(%rax)
js     1110 <EMACTimestampTargetSet+0x10>
mov    %esi,0x71c(%rax)
mov    %edx,0x720(%rax)
ret

LLVM IR (-O0):
define void @EMACTimestampTargetSet(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
br label %7
7: ; preds = %15, %3
%8 = load i32, i32* %4
%9 = add nsw i32 %8, 1824
%10 = sext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
%12 = load volatile i32, i32* %11
%13 = and i32 %12, -2147483648
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %7
br label %7
16: ; preds = %7
%17 = load i32, i32* %5
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1820
%20 = sext i32 %19 to i64
%21 = inttoptr i64 %20 to i32*
store volatile i32 %17, i32* %21
%22 = load i32, i32* %6
%23 = load i32, i32* %4
%24 = add nsw i32 %23, 1824
%25 = sext i32 %24 to i64
%26 = inttoptr i64 %25 to i32*
store volatile i32 %22, i32* %26
ret void
}

LLVM IR (-O2):
define void @EMACTimestampTargetSet(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %0, 1824
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
br label %7
7: ; preds = %7, %3
%8 = load volatile i32, i32* %6
%9 = icmp sgt i32 %8, -1
br i1 %9, label %10, label %7
10: ; preds = %7
%11 = add nsw i32 %0, 1820
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i32*
store volatile i32 %1, i32* %13
store volatile i32 %2, i32* %6
ret void
}
int pathcon_nm7_n_out(void) { return 2; }


x86 assembly (clang, -O0):
<pathcon_nm7_n_out>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm7_n_out>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @pathcon_nm7_n_out() {
ret i32 2
}

LLVM IR (-O2):
define i32 @pathcon_nm7_n_out() {
ret i32 2
}
/* Variables and functions */
double RAND_MAX;
double uniform_deviate(int seed) { return seed * (1.0 / (RAND_MAX + 1.0)); }


x86 assembly (clang, -O0):
<uniform_deviate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
movsd  0xeec(%rip),%xmm2
mov    0x2ecd(%rip),%rax
addsd  (%rax),%xmm2
movsd  0xed9(%rip),%xmm1
divsd  %xmm2,%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<uniform_deviate>:
cvtsi2sd %edi,%xmm1
mov    0x2edd(%rip),%rax
movsd  0xeed(%rip),%xmm0
movsd  (%rax),%xmm2
addsd  %xmm0,%xmm2
divsd  %xmm2,%xmm0
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
@RAND_MAX = global double 0.000000e+00
define double @uniform_deviate(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sitofp i32 %3 to double
%5 = load double, double* @RAND_MAX
%6 = fadd double %5, 1.000000e+00
%7 = fdiv double 1.000000e+00, %6
%8 = fmul double %4, %7
ret double %8
}

LLVM IR (-O2):
@RAND_MAX = global double 0.000000e+00
define double @uniform_deviate(i32 %0) {
%2 = sitofp i32 %0 to double
%3 = load double, double* @RAND_MAX
%4 = fadd double %3, 1.000000e+00
%5 = fdiv double 1.000000e+00, %4
%6 = fmul double %5, %2
ret double %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
void double2c(double d) { printf("%f\n", d); }


x86 assembly (clang, -O0):
<double2c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<double2c>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%f\0A\00"
define void @double2c(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%f\0A\00"
define void @double2c(double %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ test_strongly_connected_components();
int /*<<< orphan*/ test_topological_sort();
int main(int argc, char *argv[]) {
  test_topological_sort();
  test_strongly_connected_components();
  printf("everything is fine!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <test_topological_sort@plt>
mov    $0x0,%al
call   1050 <test_strongly_connected_components@plt>
lea    0xea5(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <test_topological_sort@plt>
xor    %eax,%eax
call   1050 <test_strongly_connected_components@plt>
lea    0xeba(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"everything is fine!\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @test_topological_sort()
%7 = call i32 (...) @test_strongly_connected_components()
%8 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [20 x i8] c"everything is fine!\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @test_topological_sort()
%4 = tail call i32 (...) @test_strongly_connected_components()
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int M_PI;
float atanf(float);
float costas_discriminator(float I, float Q) {
  if (I == 0) {
    return 0;
  }
  return atanf(Q / I) * (float)(1 / (2 * M_PI));
}


x86 assembly (clang, -O0):
<costas_discriminator>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jne    1146 <costas_discriminator+0x36>
jp     1146 <costas_discriminator+0x36>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1176 <costas_discriminator+0x66>
movss  -0xc(%rbp),%xmm0
divss  -0x8(%rbp),%xmm0
call   1030 <atanf@plt>
mov    0x2e8c(%rip),%rax
mov    (%rax),%ecx
shl    $0x1,%ecx
mov    $0x1,%eax
cltd
idiv   %ecx
cvtsi2ss %eax,%xmm1
mulss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<costas_discriminator>:
movaps %xmm0,%xmm2
xorps  %xmm0,%xmm0
ucomiss %xmm0,%xmm2
jne    111e <costas_discriminator+0xe>
jp     111e <costas_discriminator+0xe>
ret
push   %rax
divss  %xmm2,%xmm1
movaps %xmm1,%xmm0
call   1030 <atanf@plt>
movaps %xmm0,%xmm1
mov    0x2eb3(%rip),%rax
mov    (%rax),%eax
lea    (%rax,%rax,1),%ecx
add    $0x1,%ecx
add    %eax,%eax
xor    %edx,%edx
cmp    $0x3,%ecx
cmovb  %eax,%edx
xorps  %xmm0,%xmm0
cvtsi2ss %edx,%xmm0
mulss  %xmm1,%xmm0
add    $0x8,%rsp
ret

LLVM IR (-O0):
@M_PI = global i32 0
define float @costas_discriminator(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %4
%7 = fcmp oeq float %6, 0.000000e+00
br i1 %7, label %8, label %9
8: ; preds = %2
store float 0.000000e+00, float* %3
br label %19
9: ; preds = %2
%10 = load float, float* %5
%11 = load float, float* %4
%12 = fdiv float %10, %11
%13 = call float @atanf(float %12)
%14 = load i32, i32* @M_PI
%15 = mul nsw i32 2, %14
%16 = sdiv i32 1, %15
%17 = sitofp i32 %16 to float
%18 = fmul float %13, %17
store float %18, float* %3
br label %19
19: ; preds = %9, %8
%20 = load float, float* %3
ret float %20
}

LLVM IR (-O2):
@M_PI = global i32 0
define float @costas_discriminator(float %0, float %1) {
%3 = fcmp oeq float %0, 0.000000e+00
br i1 %3, label %14, label %4
4: ; preds = %2
%5 = fdiv float %1, %0
%6 = tail call float @atanf(float %5)
%7 = load i32, i32* @M_PI
%8 = shl nsw i32 %7, 1
%9 = or i32 %8, 1
%10 = icmp ult i32 %9, 3
%11 = select i1 %10, i32 %8, i32 0
%12 = sitofp i32 %11 to float
%13 = fmul float %6, %12
br label %14
14: ; preds = %2, %4
%15 = phi float [ %13, %4 ], [ 0.000000e+00, %2 ]
ret float %15
}
/* Variables and functions */
int /*<<< orphan*/ stringLength(unsigned char const *);
int /*<<< orphan*/ uart_write(unsigned char const *, int /*<<< orphan*/);
void uart_puts(const unsigned char *str) {
  uart_write((const unsigned char *)str, stringLength(str));
}


x86 assembly (clang, -O0):
<uart_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <stringLength@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1030 <uart_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_puts>:
push   %rbx
mov    %rdi,%rbx
call   1040 <stringLength@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1030 <uart_write@plt>

LLVM IR (-O0):
define void @uart_puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @stringLength(i8* %4)
%6 = call i32 @uart_write(i8* %3, i32 %5)
ret void
}

LLVM IR (-O2):
define void @uart_puts(i8* %0) {
%2 = tail call i32 @stringLength(i8* %0)
%3 = tail call i32 @uart_write(i8* %0, i32 %2)
ret void
}
int SDL_imageFilterShiftRightMMX(unsigned char *Src1, unsigned char *Dest,
                                 unsigned int SrcLength, unsigned char N,
                                 unsigned char *Mask) {
  return (-1);
}


x86 assembly (clang, -O0):
<SDL_imageFilterShiftRightMMX>:
push   %rbp
mov    %rsp,%rbp
mov    %cl,%al
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %al,-0x15(%rbp)
mov    %r8,-0x20(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SDL_imageFilterShiftRightMMX>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @SDL_imageFilterShiftRightMMX(i8* %0, i8* %1, i32 %2, i8 zeroext %3, i8* %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i8
%10 = alloca i8*
store i8* %0, i8** %6
store i8* %1, i8** %7
store i32 %2, i32* %8
store i8 %3, i8* %9
store i8* %4, i8** %10
ret i32 -1
}

LLVM IR (-O2):
define i32 @SDL_imageFilterShiftRightMMX(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2, i8 zeroext %3, i8* nocapture readnone %4) {
ret i32 -1
}
IOinit() {}


x86 assembly (clang, -O0):
<IOinit>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IOinit>:
ret

LLVM IR (-O0):
define i32 @IOinit() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @IOinit() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ cache_wait(int, int);
void l2x0_inv_line(unsigned long addr) {
  cache_wait((0xC4200000 + 0x770), 1);
  (*((volatile unsigned *)(0xC4200000 + 0x770)) = addr);
}


x86 assembly (clang, -O0):
<l2x0_inv_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xc4200770,%edi
mov    $0x1,%esi
call   1030 <cache_wait@plt>
mov    -0x8(%rbp),%rax
mov    %eax,%ecx
mov    $0xc4200770,%eax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<l2x0_inv_line>:
push   %rbx
mov    %rdi,%rbx
mov    $0xc4200770,%edi
mov    $0x1,%esi
call   1030 <cache_wait@plt>
mov    $0xc4200770,%eax
mov    %ebx,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @l2x0_inv_line(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = call i32 @cache_wait(i32 -1004533904, i32 1)
%4 = load i64, i64* %2
%5 = trunc i64 %4 to i32
store volatile i32 %5, i32* inttoptr (i64 3290433392 to i32*)
ret void
}

LLVM IR (-O2):
define void @l2x0_inv_line(i64 %0) {
%2 = tail call i32 @cache_wait(i32 -1004533904, i32 1)
%3 = trunc i64 %0 to i32
store volatile i32 %3, i32* inttoptr (i64 3290433392 to i32*)
ret void
}
/* Type definitions */
struct analyser {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ error2(struct analyser *, int, int /*<<< orphan*/);
void error(struct analyser *a, int n) { error2(a, n, 0); }


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %edx,%edx
call   1030 <error2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<error>:
xor    %edx,%edx
jmp    1030 <error2@plt>

LLVM IR (-O0):
%struct.analyser = type { i32 }
define void @error(%struct.analyser* %0, i32 %1) {
%3 = alloca %struct.analyser*
%4 = alloca i32
store %struct.analyser* %0, %struct.analyser** %3
store i32 %1, i32* %4
%5 = load %struct.analyser*, %struct.analyser** %3
%6 = load i32, i32* %4
%7 = call i32 @error2(%struct.analyser* %5, i32 %6, i32 0)
ret void
}

LLVM IR (-O2):
%struct.analyser = type { i32 }
define void @error(%struct.analyser* %0, i32 %1) {
%3 = tail call i32 @error2(%struct.analyser* %0, i32 %1, i32 0)
ret void
}
/* Variables and functions */
int atoi(char *);
char *cfg_get_str(char *, char *, char *);
signed int cfg_get_signed_int(char *dname, char *sname, char *ename,
                              signed int def) {
  char *val;
  val = cfg_get_str(dname, sname, ename);
  if (NULL == val)
    return def;
  return atoi(val);
}


x86 assembly (clang, -O0):
<cfg_get_signed_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %ecx,-0x24(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <cfg_get_str@plt>
mov    %rax,-0x30(%rbp)
xor    %eax,%eax
cmp    -0x30(%rbp),%rax
jne    1163 <cfg_get_signed_int+0x43>
mov    -0x24(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    116f <cfg_get_signed_int+0x4f>
mov    -0x30(%rbp),%rdi
call   1040 <atoi@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfg_get_signed_int>:
push   %rbx
mov    %ecx,%ebx
call   1030 <cfg_get_str@plt>
test   %rax,%rax
je     1136 <cfg_get_signed_int+0x16>
mov    %rax,%rdi
pop    %rbx
jmp    1040 <atoi@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @cfg_get_signed_int(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i8*
store i8* %0, i8** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i32 %3, i32* %9
%11 = load i8*, i8** %6
%12 = load i8*, i8** %7
%13 = load i8*, i8** %8
%14 = call i8* @cfg_get_str(i8* %11, i8* %12, i8* %13)
store i8* %14, i8** %10
%15 = load i8*, i8** %10
%16 = icmp eq i8* null, %15
br i1 %16, label %17, label %19
17: ; preds = %4
%18 = load i32, i32* %9
store i32 %18, i32* %5
br label %22
19: ; preds = %4
%20 = load i8*, i8** %10
%21 = call i32 @atoi(i8* %20)
store i32 %21, i32* %5
br label %22
22: ; preds = %19, %17
%23 = load i32, i32* %5
ret i32 %23
}

LLVM IR (-O2):
define i32 @cfg_get_signed_int(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = tail call i8* @cfg_get_str(i8* %0, i8* %1, i8* %2)
%6 = icmp eq i8* %5, null
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = tail call i32 @atoi(i8* %5)
br label %9
9: ; preds = %4, %7
%10 = phi i32 [ %8, %7 ], [ %3, %4 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void main_syntax() {
  printf("NELMA, Numerical ElectroMagnetics. DRC checker version %s\n", "3.2");
  printf("Copyright (c) 2006 Tomaz Solc\n\n");
  printf("SYNTAX: nelma-drc layer.png\n\n");
  printf("Bug reports to <tomaz.solc@tablix.org>\n");
  return;
}


x86 assembly (clang, -O0):
<main_syntax>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xf19(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xf0f(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xf21(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xf31(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main_syntax>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xf0c(%rip),%rsi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xf02(%rip),%rdi
call   1030 <puts@plt>
lea    0xf15(%rip),%rdi
call   1030 <puts@plt>
lea    0xf26(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [59 x i8] c"NELMA, Numerical ElectroMagnetics. DRC checker version %s\0A\00"
@.str.1 = [4 x i8] c"3.2\00"
@.str.2 = [32 x i8] c"Copyright (c) 2006 Tomaz Solc\0A\0A\00"
@.str.3 = [30 x i8] c"SYNTAX: nelma-drc layer.png\0A\0A\00"
@.str.4 = [40 x i8] c"Bug reports to <tomaz.solc@tablix.org>\0A\00"
define void @main_syntax() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.2, i64 0, i64 0))
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.3, i64 0, i64 0))
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.4, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [59 x i8] c"NELMA, Numerical ElectroMagnetics. DRC checker version %s\0A\00"
@.str.1 = [4 x i8] c"3.2\00"
@str = [31 x i8] c"Copyright (c) 2006 Tomaz Solc\0A\00"
@str.5 = [29 x i8] c"SYNTAX: nelma-drc layer.png\0A\00"
@str.6 = [39 x i8] c"Bug reports to <tomaz.solc@tablix.org>\00"
define void @main_syntax() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @str.5, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @str.6, i64 0, i64 0))
ret void
}
int test_imm_EFuint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0xEF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_EFuint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0xef,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_EFuint64_midword_reg>:
test   $0xef0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_EFuint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 239
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_EFuint64_midword_reg(i64 %0) {
%2 = and i64 %0, 15663104
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct kill {
  int dummy;
};

/* Variables and functions */
struct kill *kill_new_with_arg(int /*<<< orphan*/ *);
struct kill *kill_new(void) {
  return kill_new_with_arg(NULL);
}


x86 assembly (clang, -O0):
<kill_new>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1030 <kill_new_with_arg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<kill_new>:
xor    %edi,%edi
jmp    1030 <kill_new_with_arg@plt>

LLVM IR (-O0):
%struct.kill = type { i32 }
define %struct.kill* @kill_new() {
%1 = call %struct.kill* @kill_new_with_arg(i32* null)
ret %struct.kill* %1
}

LLVM IR (-O2):
%struct.kill = type { i32 }
define %struct.kill* @kill_new() {
%1 = tail call %struct.kill* @kill_new_with_arg(i32* null)
ret %struct.kill* %1
}
/* Type definitions */
struct catmc_atomic_signed_int {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct catmc_atomic_signed_int *);
void catmc_atomic_signed_int_destroy(struct catmc_atomic_signed_int *wrapper) {
  free(wrapper);
}


x86 assembly (clang, -O0):
<catmc_atomic_signed_int_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<catmc_atomic_signed_int_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.catmc_atomic_signed_int = type { i32 }
define void @catmc_atomic_signed_int_destroy(%struct.catmc_atomic_signed_int* %0) {
%2 = alloca %struct.catmc_atomic_signed_int*
store %struct.catmc_atomic_signed_int* %0, %struct.catmc_atomic_signed_int** %2
%3 = load %struct.catmc_atomic_signed_int*, %struct.catmc_atomic_signed_int** %2
%4 = call i32 @free(%struct.catmc_atomic_signed_int* %3)
ret void
}

LLVM IR (-O2):
%struct.catmc_atomic_signed_int = type { i32 }
define void @catmc_atomic_signed_int_destroy(%struct.catmc_atomic_signed_int* nocapture %0) {
%2 = tail call i32 @free(%struct.catmc_atomic_signed_int* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ wcschr(int /*<<< orphan*/ *, int /*<<< orphan*/);
void uninitvar_wcschr(void) {
  wchar_t *cs;
  wchar_t c;
  (void)wcschr(cs, c);
}


x86 assembly (clang, -O0):
<uninitvar_wcschr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <wcschr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_wcschr>:
jmp    1030 <wcschr@plt>

LLVM IR (-O0):
define void @uninitvar_wcschr() {
%1 = alloca i32*
%2 = alloca i32
%3 = load i32*, i32** %1
%4 = load i32, i32* %2
%5 = call i32 @wcschr(i32* %3, i32 %4)
ret void
}

LLVM IR (-O2):
define void @uninitvar_wcschr() {
%1 = tail call i32 @wcschr(i32* undef, i32 undef)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
char *strdup(char const *);
char *xstrdup(const char *str) {
  char *c;
  c = strdup(str);
  if (!c) {
    fprintf(stderr, "Out of memory\n");
    exit(1);
  }
  return c;
}


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <strdup@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1173 <xstrdup+0x43>
mov    0x2e85(%rip),%rax
mov    (%rax),%edi
lea    0xe9c(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
push   %rax
call   1050 <strdup@plt>
test   %rax,%rax
je     113d <xstrdup+0xd>
pop    %rcx
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [15 x i8] c"Out of memory\0A\00"
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strdup(i8* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%11 = call i32 @exit(i32 1)
unreachable
12: ; preds = %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [15 x i8] c"Out of memory\0A\00"
define noalias i8* @xstrdup(i8* nocapture %0) {
%2 = tail call i8* @strdup(i8* %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 @exit(i32 1)
unreachable
8: ; preds = %1
ret i8* %2
}
void exit(int exitCode) {
  asm("movl %0,%%ebx \n\t"
      "movl $1,%%eax \n\t"
      "int $0x80		\n\t"
      "hlt    \n\t" ::"m"(exitCode));
}


x86 assembly (clang, -O0):
<exit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ebx
mov    $0x1,%eax
int    $0x80
hlt

x86 assembly (clang, -O2):
<exit>:
mov    %edi,-0x4(%rsp)
mov    -0x4(%rsp),%ebx
mov    $0x1,%eax
int    $0x80
hlt

LLVM IR (-O0):
define void @exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
unreachable
}

LLVM IR (-O2):
define void @exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
unreachable
}
/* Type definitions */
struct statement_list {
  int dummy;
};
struct ptr_list {
  int dummy;
};

/* Variables and functions */
int ptr_list_size(struct ptr_list *);
int statement_list_size(struct statement_list *list) {
  return ptr_list_size((struct ptr_list *)(list));
}


x86 assembly (clang, -O0):
<statement_list_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ptr_list_size@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<statement_list_size>:
jmp    1030 <ptr_list_size@plt>

LLVM IR (-O0):
%struct.statement_list = type { i32 }
%struct.ptr_list = type { i32 }
define i32 @statement_list_size(%struct.statement_list* %0) {
%2 = alloca %struct.statement_list*
store %struct.statement_list* %0, %struct.statement_list** %2
%3 = load %struct.statement_list*, %struct.statement_list** %2
%4 = bitcast %struct.statement_list* %3 to %struct.ptr_list*
%5 = call i32 @ptr_list_size(%struct.ptr_list* %4)
ret i32 %5
}

LLVM IR (-O2):
%struct.statement_list = type { i32 }
%struct.ptr_list = type { i32 }
define i32 @statement_list_size(%struct.statement_list* %0) {
%2 = bitcast %struct.statement_list* %0 to %struct.ptr_list*
%3 = tail call i32 @ptr_list_size(%struct.ptr_list* %2)
ret i32 %3
}
/* Variables and functions */
int sprintf(char *, char *);
int add_title(char *buf) {
  return sprintf(buf, "   A B C D E F G H J K L M N O P Q R S T   ");
}


x86 assembly (clang, -O0):
<add_title>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_title>:
movups 0xf15(%rip),%xmm0
movups %xmm0,0x1c(%rdi)
movups 0xefe(%rip),%xmm0
movups %xmm0,0x10(%rdi)
movups 0xee3(%rip),%xmm0
movups %xmm0,(%rdi)
mov    $0x2b,%eax
ret

LLVM IR (-O0):
@.str = [44 x i8] c" A B C D E F G H J K L M N O P Q R S T \00"
define i32 @add_title(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @sprintf(i8* %3, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [44 x i8] c" A B C D E F G H J K L M N O P Q R S T \00"
define i32 @add_title(i8* nocapture writeonly %0) {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 dereferenceable(44) %0, i8* align 1 dereferenceable(44) getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i64 44, i1 false)
ret i32 43
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ memset(int *, int, int);
void test_memset() {
  int n = 0;
  memset(&n, 1, sizeof(int));
  assert(n == 0);
}


x86 assembly (clang, -O0):
<test_memset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x4(%rbp),%rdi
mov    $0x1,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
cmpl   $0x0,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_memset>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rdi
mov    $0x1,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
xor    %edi,%edi
cmpl   $0x0,0x4(%rsp)
sete   %dil
call   1040 <assert@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @test_memset() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @memset(i32* %1, i32 1, i32 4)
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
ret void
}

LLVM IR (-O2):
define void @test_memset() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%3 = call i32 @memset(i32* %1, i32 1, i32 4)
%4 = load i32, i32* %1
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cm_accent_generic(int, int, int, char *, char, int, char *);
void cm_accent_acute(int arg, int start, int end) {
  cm_accent_generic(arg, start, end, "AEIOUYaeiouy", '\'', 1, "acute");
}


x86 assembly (clang, -O0):
<cm_accent_acute>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xecf(%rip),%rcx
mov    $0x27,%r8d
mov    $0x1,%r9d
lea    0xec9(%rip),%rax
mov    %rax,(%rsp)
call   1030 <cm_accent_generic@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cm_accent_acute>:
push   %rax
lea    0xef5(%rip),%rax
mov    %rax,(%rsp)
lea    0xedd(%rip),%rcx
mov    $0x27,%r8d
mov    $0x1,%r9d
call   1030 <cm_accent_generic@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [13 x i8] c"AEIOUYaeiouy\00"
@.str.1 = [6 x i8] c"acute\00"
define void @cm_accent_acute(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @cm_accent_generic(i32 %7, i32 %8, i32 %9, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8 signext 39, i32 1, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"AEIOUYaeiouy\00"
@.str.1 = [6 x i8] c"acute\00"
define void @cm_accent_acute(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @cm_accent_generic(i32 %0, i32 %1, i32 %2, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8 signext 39, i32 1, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}
inverbuf(p, n) register *p;
{
  for (; --n >= 0; ++p)
    *p = inverword(*p);
}


x86 assembly (clang, -O0):
<inverbuf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
jl     1157 <inverbuf+0x47>
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
mov    $0x0,%al
call   1030 <inverword@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x10(%rbp)
jmp    111f <inverbuf+0xf>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inverbuf>:
push   %rbp
push   %rbx
push   %rax
test   %esi,%esi
jle    1137 <inverbuf+0x27>
mov    %esi,%ebp
mov    %rdi,%rbx
add    $0x1,%ebp
nop
mov    (%rbx),%edi
xor    %eax,%eax
call   1030 <inverword@plt>
mov    %eax,(%rbx)
add    $0x4,%rbx
add    $0xffffffff,%ebp
cmp    $0x1,%ebp
ja     1120 <inverbuf+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @inverbuf(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
br label %6
6: ; preds = %15, %2
%7 = load i32, i32* %5
%8 = add nsw i32 %7, -1
store i32 %8, i32* %5
%9 = icmp sge i32 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load i32*, i32** %4
%12 = load i32, i32* %11
%13 = call i32 (i32, ...) bitcast (i32 (...)* @inverword to i32 (i32, ...)*)(i32 %12)
%14 = load i32*, i32** %4
store i32 %13, i32* %14
br label %15
15: ; preds = %10
%16 = load i32*, i32** %4
%17 = getelementptr inbounds i32, i32* %16, i32 1
store i32* %17, i32** %4
br label %6
18: ; preds = %6
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @inverbuf(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %12
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = phi i32* [ %10, %4 ], [ %0, %2 ]
%7 = add nsw i32 %5, -1
%8 = load i32, i32* %6
%9 = tail call i32 (i32, ...) bitcast (i32 (...)* @inverword to i32 (i32, ...)*)(i32 %8)
store i32 %9, i32* %6
%10 = getelementptr inbounds i32, i32* %6, i64 1
%11 = icmp ugt i32 %5, 1
br i1 %11, label %4, label %12
12: ; preds = %4, %2
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void printfDivLine(char *desc) { printf("********%s*******\n", desc); }


x86 assembly (clang, -O0):
<printfDivLine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printfDivLine>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"********%s*******\0A\00"
define void @printfDivLine(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"********%s*******\0A\00"
define void @printfDivLine(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ input(int /*<<< orphan*/);
int /*<<< orphan*/ output(int /*<<< orphan*/);
int /*<<< orphan*/ ref(char *, int);
int /*<<< orphan*/ run(char *, int /*<<< orphan*/, int /*<<< orphan*/, char **);
void indexes() {
  char *args[] = {NULL};
  run("./md", input(ref("./nav.md", 8)),
      output(ref("./www/dloh.org/index.html", 25)), args);
}


x86 assembly (clang, -O0):
<indexes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x8,%edx
call   1070 <memset@plt>
lea    0xe96(%rip),%rdi
mov    $0x8,%esi
call   1060 <ref@plt>
mov    %eax,%edi
call   1030 <input@plt>
mov    %eax,-0xc(%rbp)
lea    0xe84(%rip),%rdi
mov    $0x19,%esi
call   1060 <ref@plt>
mov    %eax,%edi
call   1040 <output@plt>
mov    -0xc(%rbp),%esi
mov    %eax,%edx
lea    -0x8(%rbp),%rcx
lea    0xe55(%rip),%rdi
call   1050 <run@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<indexes>:
push   %rbx
sub    $0x10,%rsp
movq   $0x0,0x8(%rsp)
lea    0xeb0(%rip),%rdi
mov    $0x8,%esi
call   1060 <ref@plt>
mov    %eax,%edi
call   1030 <input@plt>
mov    %eax,%ebx
lea    0xe9f(%rip),%rdi
mov    $0x19,%esi
call   1060 <ref@plt>
mov    %eax,%edi
call   1040 <output@plt>
lea    0xe79(%rip),%rdi
lea    0x8(%rsp),%rcx
mov    %ebx,%esi
mov    %eax,%edx
call   1050 <run@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"./md\00"
@.str.1 = [9 x i8] c"./nav.md\00"
@.str.2 = [26 x i8] c"./www/dloh.org/index.html\00"
define void @indexes() {
%1 = alloca [1 x i8*]
%2 = bitcast [1 x i8*]* %1 to i8*
%3 = call i32 @ref(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32 8)
%4 = call i32 @input(i32 %3)
%5 = call i32 @ref(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i64 0, i64 0), i32 25)
%6 = call i32 @output(i32 %5)
%7 = getelementptr inbounds [1 x i8*], [1 x i8*]* %1, i64 0, i64 0
%8 = call i32 @run(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %6, i8** %7)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"./md\00"
@.str.1 = [9 x i8] c"./nav.md\00"
@.str.2 = [26 x i8] c"./www/dloh.org/index.html\00"
define void @indexes() {
%1 = alloca [1 x i8*]
%2 = bitcast [1 x i8*]* %1 to i8*
%3 = bitcast [1 x i8*]* %1 to i64*
store i64 0, i64* %3
%4 = tail call i32 @ref(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32 8)
%5 = tail call i32 @input(i32 %4)
%6 = tail call i32 @ref(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i64 0, i64 0), i32 25)
%7 = tail call i32 @output(i32 %6)
%8 = getelementptr inbounds [1 x i8*], [1 x i8*]* %1, i64 0, i64 0
%9 = call i32 @run(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %7, i8** %8)
ret void
}
char *zgperm(f)
char *f;
{ return ("----------"); }


x86 assembly (clang, -O0):
<zgperm>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    0xef1(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zgperm>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [11 x i8] c"----------\00"
define i8* @zgperm(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [11 x i8] c"----------\00"
define i8* @zgperm(i8* nocapture readnone %0) {
ret i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0)
}
int test_imm_99int8_reg(signed char val) {
  return ((val) & (0x99 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_99int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0x99,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_99int8_reg>:
test   $0x99,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_99int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 153
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_99int8_reg(i8 signext %0) {
%2 = and i8 %0, -103
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ jmp_buf;

/* Variables and functions */
int /*<<< orphan*/ longjmp(int /*<<< orphan*/, int);
void uninitvar_longjmp(void) {
  jmp_buf env;
  int val;
  (void)longjmp(env, val);
}


x86 assembly (clang, -O0):
<uninitvar_longjmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <longjmp@plt>

x86 assembly (clang, -O2):
<uninitvar_longjmp>:
push   %rax
call   1030 <longjmp@plt>

LLVM IR (-O0):
define void @uninitvar_longjmp() {
%1 = alloca i32
%2 = alloca i32
%3 = load i32, i32* %1
%4 = load i32, i32* %2
%5 = call i32 @longjmp(i32 %3, i32 %4)
unreachable
}

LLVM IR (-O2):
define void @uninitvar_longjmp() {
%1 = tail call i32 @longjmp(i32 undef, i32 undef)
unreachable
}
int test_imm_ADuint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0xAD << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_ADuint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0xad,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_ADuint64_highword_reg>:
movabs $0xad00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_ADuint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 173
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_ADuint64_highword_reg(i64 %0) {
%2 = and i64 %0, 743029342208
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
long double reducl(x)
long double x;
{
  long double t;
  t = ldexpl(x, 5);
  t = floorl(t);
  t = ldexpl(t, -5);
  return (t);
}


x86 assembly (clang, -O0):
<reducl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
mov    $0x5,%edi
call   1030 <ldexpl@plt>
fstpt  -0x20(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1040 <floorl@plt>
fstpt  -0x20(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
mov    $0xfffffffb,%edi
call   1030 <ldexpl@plt>
fstpt  -0x20(%rbp)
fldt   -0x20(%rbp)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reducl>:
sub    $0x18,%rsp
fldt   0x20(%rsp)
fstpt  (%rsp)
mov    $0x5,%edi
call   1030 <ldexpl@plt>
fstpt  (%rsp)
call   1040 <floorl@plt>
fstpt  (%rsp)
mov    $0xfffffffb,%edi
call   1030 <ldexpl@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @reducl(x86_fp80 %0) {
%2 = alloca x86_fp80
%3 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%4 = load x86_fp80, x86_fp80* %2
%5 = call x86_fp80 @ldexpl(x86_fp80 %4, i32 5)
store x86_fp80 %5, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %3
%7 = call x86_fp80 @llvm.floor.f80(x86_fp80 %6)
store x86_fp80 %7, x86_fp80* %3
%8 = load x86_fp80, x86_fp80* %3
%9 = call x86_fp80 @ldexpl(x86_fp80 %8, i32 -5)
store x86_fp80 %9, x86_fp80* %3
%10 = load x86_fp80, x86_fp80* %3
ret x86_fp80 %10
}

LLVM IR (-O2):
define x86_fp80 @reducl(x86_fp80 %0) {
%2 = tail call x86_fp80 @ldexpl(x86_fp80 %0, i32 5)
%3 = tail call x86_fp80 @llvm.floor.f80(x86_fp80 %2)
%4 = tail call x86_fp80 @ldexpl(x86_fp80 %3, i32 -5)
ret x86_fp80 %4
}
/* Variables and functions */
int /*<<< orphan*/ ngen(char *, char *, int);
void cginclb(int a) { ngen("%s\t%d(%%rbp)", "incb", a); }


x86 assembly (clang, -O0):
<cginclb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xedb(%rip),%rdi
lea    0xee1(%rip),%rsi
call   1030 <ngen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cginclb>:
mov    %edi,%edx
lea    0xee7(%rip),%rdi
lea    0xeed(%rip),%rsi
jmp    1030 <ngen@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"%s\09%d(%%rbp)\00"
@.str.1 = [5 x i8] c"incb\00"
define void @cginclb(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ngen(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"%s\09%d(%%rbp)\00"
@.str.1 = [5 x i8] c"incb\00"
define void @cginclb(i32 %0) {
%2 = tail call i32 @ngen(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %0)
ret void
}