xunge/DecIR huggingface dataset:
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  short lbearing;
};
typedef TYPE_1__ XCharStruct;

/* Variables and functions */
void set_XCharStruct_lbearing(void *_p, short _v) {
  ((XCharStruct *)_p)->lbearing = (short)_v;
}


x86 assembly (clang, -O0):
<set_XCharStruct_lbearing>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0xa(%rbp),%cx
mov    -0x8(%rbp),%rax
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XCharStruct_lbearing>:
mov    %si,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i16 }
define void @set_XCharStruct_lbearing(i8* %0, i16 signext %1) {
%3 = alloca i8*
%4 = alloca i16
store i8* %0, i8** %3
store i16 %1, i16* %4
%5 = load i16, i16* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i16 %5, i16* %8
ret void
}

LLVM IR (-O2):
define void @set_XCharStruct_lbearing(i8* nocapture writeonly %0, i16 signext %1) {
%3 = bitcast i8* %0 to i16*
store i16 %1, i16* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LZ4_compressBound(int);
int LZ4_compress_HC(char const *, char *, int, int /*<<< orphan*/, int);
int LZ4_compressHC2(const char *src, char *dst, int srcSize, int cLevel) {
  return LZ4_compress_HC(src, dst, srcSize, LZ4_compressBound(srcSize), cLevel);
}


x86 assembly (clang, -O0):
<LZ4_compressHC2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x14(%rbp),%edi
call   1040 <LZ4_compressBound@plt>
mov    -0x30(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    -0x1c(%rbp),%edx
mov    %eax,%ecx
mov    -0x18(%rbp),%r8d
call   1030 <LZ4_compress_HC@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZ4_compressHC2>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%r14d
mov    %edx,%ebp
mov    %rsi,%r15
mov    %rdi,%rbx
mov    %edx,%edi
call   1040 <LZ4_compressBound@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %ebp,%edx
mov    %eax,%ecx
mov    %r14d,%r8d
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <LZ4_compress_HC@plt>

LLVM IR (-O0):
define i32 @LZ4_compressHC2(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = load i32, i32* %7
%13 = call i32 @LZ4_compressBound(i32 %12)
%14 = load i32, i32* %8
%15 = call i32 @LZ4_compress_HC(i8* %9, i8* %10, i32 %11, i32 %13, i32 %14)
ret i32 %15
}

LLVM IR (-O2):
define i32 @LZ4_compressHC2(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = tail call i32 @LZ4_compressBound(i32 %2)
%6 = tail call i32 @LZ4_compress_HC(i8* %0, i8* %1, i32 %2, i32 %5, i32 %3)
ret i32 %6
}
int DRV_GET_CDROM_VERSION(char *pVersionInfo, unsigned int ulLength) {
  return 0;
}


x86 assembly (clang, -O0):
<DRV_GET_CDROM_VERSION>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DRV_GET_CDROM_VERSION>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @DRV_GET_CDROM_VERSION(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @DRV_GET_CDROM_VERSION(i8* nocapture readnone %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
void _cmm_mark(const void *p) {
  extern const bool cmm_debug_enabled;
  extern void _cmm_check_managed(const void *);
  extern void _cmm_push(const void *);
  if (cmm_debug_enabled)
    _cmm_check_managed(p);
  _cmm_push(p);
}


x86 assembly (clang, -O0):
<_cmm_mark>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2eb5(%rip),%rax
cmpl   $0x0,(%rax)
je     1145 <_cmm_mark+0x25>
mov    -0x8(%rbp),%rdi
call   1040 <_cmm_check_managed@plt>
mov    -0x8(%rbp),%rdi
call   1030 <_cmm_push@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_cmm_mark>:
push   %rbx
mov    %rdi,%rbx
mov    0x2ebd(%rip),%rax
cmpl   $0x0,(%rax)
je     1138 <_cmm_mark+0x18>
mov    %rbx,%rdi
call   1040 <_cmm_check_managed@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <_cmm_push@plt>

LLVM IR (-O0):
@cmm_debug_enabled = external constant i32
define void @_cmm_mark(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @cmm_debug_enabled
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i8*, i8** %2
br label %7
7: ; preds = %5, %1
%8 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
@cmm_debug_enabled = external constant i32
define void @_cmm_mark(i8* %0) {
%2 = load i32, i32* @cmm_debug_enabled
%3 = icmp eq i32 %2, 0
br i1 %3, label %5, label %4
4: ; preds = %1
tail call void @_cmm_check_managed(i8* %0)
br label %5
5: ; preds = %4, %1
tail call void @_cmm_push(i8* %0)
ret void
}
/* Variables and functions */
int rom_present(char *);
int xtide_available() { return rom_present("roms/ide_xt.bin"); }


x86 assembly (clang, -O0):
<xtide_available>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <rom_present@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xtide_available>:
lea    0xee9(%rip),%rdi
jmp    1030 <rom_present@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"roms/ide_xt.bin\00"
define i32 @xtide_available() {
%1 = call i32 @rom_present(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [16 x i8] c"roms/ide_xt.bin\00"
define i32 @xtide_available() {
%1 = tail call i32 @rom_present(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
/* Variables and functions */
int h(int);
int i(int x, int y) {
  int z;
  z = h(x);
  return z + y;
}


x86 assembly (clang, -O0):
<i>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <h@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i>:
push   %rbx
mov    %esi,%ebx
call   1030 <h@plt>
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @i(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = call i32 @h(i32 %6)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = load i32, i32* %4
%10 = add nsw i32 %8, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @i(i32 %0, i32 %1) {
%3 = tail call i32 @h(i32 %0)
%4 = add nsw i32 %3, %1
ret i32 %4
}
/* Type definitions */
struct sockaddr_storage {
  int dummy;
};

/* Variables and functions */
scalar_t__ _is_domain_socket(struct sockaddr_storage *);
scalar_t__ _is_stream_socket(int);
int _is_domain_and_stream_socket(int fd, struct sockaddr_storage *address) {
  return _is_domain_socket(address) && _is_stream_socket(fd);
}


x86 assembly (clang, -O0):
<_is_domain_and_stream_socket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <_is_domain_socket@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x11(%rbp)
je     115c <_is_domain_and_stream_socket+0x3c>
mov    -0x4(%rbp),%edi
call   1040 <_is_stream_socket@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_is_domain_and_stream_socket>:
push   %rbx
mov    %edi,%ebx
mov    %rsi,%rdi
call   1030 <_is_domain_socket@plt>
test   %rax,%rax
je     1144 <_is_domain_and_stream_socket+0x24>
mov    %ebx,%edi
call   1040 <_is_stream_socket@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.sockaddr_storage = type { i32 }
define i32 @_is_domain_and_stream_socket(i32 %0, %struct.sockaddr_storage* %1) {
%3 = alloca i32
%4 = alloca %struct.sockaddr_storage*
store i32 %0, i32* %3
store %struct.sockaddr_storage* %1, %struct.sockaddr_storage** %4
%5 = load %struct.sockaddr_storage*, %struct.sockaddr_storage** %4
%6 = call i64 @_is_domain_socket(%struct.sockaddr_storage* %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i32, i32* %3
%10 = call i64 @_is_stream_socket(i32 %9)
%11 = icmp ne i64 %10, 0
br label %12
12: ; preds = %8, %2
%13 = phi i1 [ false, %2 ], [ %11, %8 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
%struct.sockaddr_storage = type { i32 }
define i32 @_is_domain_and_stream_socket(i32 %0, %struct.sockaddr_storage* %1) {
%3 = tail call i64 @_is_domain_socket(%struct.sockaddr_storage* %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i64 @_is_stream_socket(i32 %0)
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %5, %2
%10 = phi i32 [ 0, %2 ], [ %8, %5 ]
ret i32 %10
}
int f0() { return 17; }


x86 assembly (clang, -O0):
<f0>:
push   %rbp
mov    %rsp,%rbp
mov    $0x11,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f0>:
mov    $0x11,%eax
ret

LLVM IR (-O0):
define i32 @f0() {
ret i32 17
}

LLVM IR (-O2):
define i32 @f0() {
ret i32 17
}
void ff_hevc_put_hevc_uni_epel_h16_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_epel_h16_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_epel_h16_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_epel_h16_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_epel_h16_12_sse4() {
ret void
}
int g(int c) {
  for (unsigned int j = 10; 0 < j; j--) {
    c = c + j;
  }
  return c;
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
xor    %eax,%eax
cmp    -0x8(%rbp),%eax
jae    1130 <g+0x30>
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <g+0xe>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
lea    0x37(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @g(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 10, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i32, i32* %3
%6 = icmp ult i32 0, %5
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = add i32 %8, %9
store i32 %10, i32* %2
br label %11
11: ; preds = %7
%12 = load i32, i32* %3
%13 = add i32 %12, -1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @g(i32 %0) {
%2 = add i32 %0, 55
ret i32 %2
}
int intlog2(int x) {
  int out = 1;
  while (x > 0) {
    out++;
    x >>= 1;
  }
  return out;
}


x86 assembly (clang, -O0):
<intlog2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    112f <intlog2+0x2f>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <intlog2+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intlog2>:
mov    $0x1,%eax
test   %edi,%edi
jle    111c <intlog2+0x1c>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
add    $0x1,%eax
shr    %ecx
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <intlog2+0x10>
ret

LLVM IR (-O0):
define i32 @intlog2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
%10 = load i32, i32* %2
%11 = ashr i32 %10, 1
store i32 %11, i32* %2
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @intlog2(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 1, %1 ]
%5 = phi i32 [ %7, %3 ], [ %0, %1 ]
%6 = add nuw nsw i32 %4, 1
%7 = lshr i32 %5, 1
%8 = icmp ult i32 %5, 2
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ 1, %1 ], [ %6, %3 ]
ret i32 %10
}
float fclampf(float x, float minval, float maxval) {
  if (x < minval)
    return minval;
  if (x > maxval)
    return maxval;
  return x;
}


x86 assembly (clang, -O0):
<fclampf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  %xmm2,-0x10(%rbp)
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1135 <fclampf+0x35>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    115d <fclampf+0x5d>
movss  -0x8(%rbp),%xmm0
ucomiss -0x10(%rbp),%xmm0
jbe    1153 <fclampf+0x53>
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    115d <fclampf+0x5d>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fclampf>:
minss  %xmm0,%xmm2
cmpltss %xmm1,%xmm0
movaps %xmm0,%xmm3
andnps %xmm2,%xmm3
andps  %xmm1,%xmm0
orps   %xmm3,%xmm0
ret

LLVM IR (-O0):
define float @fclampf(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
%8 = load float, float* %5
%9 = load float, float* %6
%10 = fcmp olt float %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load float, float* %6
store float %12, float* %4
br label %21
13: ; preds = %3
%14 = load float, float* %5
%15 = load float, float* %7
%16 = fcmp ogt float %14, %15
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = load float, float* %7
store float %18, float* %4
br label %21
19: ; preds = %13
%20 = load float, float* %5
store float %20, float* %4
br label %21
21: ; preds = %19, %17, %11
%22 = load float, float* %4
ret float %22
}

LLVM IR (-O2):
define float @fclampf(float %0, float %1, float %2) {
%4 = fcmp olt float %0, %1
%5 = fcmp ogt float %0, %2
%6 = select i1 %5, float %2, float %0
%7 = select i1 %4, float %1, float %6
ret float %7
}
/* Variables and functions */
int /*<<< orphan*/ putc(char);
void mprintc(char c) { putc(c); }


x86 assembly (clang, -O0):
<mprintc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <putc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mprintc>:
jmp    1030 <putc@plt>

LLVM IR (-O0):
define void @mprintc(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @putc(i8 signext %3)
ret void
}

LLVM IR (-O2):
define void @mprintc(i8 signext %0) {
%2 = tail call i32 @putc(i8 signext %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int32_t;

/* Variables and functions */
int /*<<< orphan*/ arc4random();
u_int32_t GenerateMagic(void) {
  ;
  return arc4random();
}


x86 assembly (clang, -O0):
<GenerateMagic>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <arc4random@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GenerateMagic>:
xor    %eax,%eax
jmp    1030 <arc4random@plt>

LLVM IR (-O0):
define i32 @GenerateMagic() {
%1 = call i32 (...) @arc4random()
ret i32 %1
}

LLVM IR (-O2):
define i32 @GenerateMagic() {
%1 = tail call i32 (...) @arc4random()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void delay_s(unsigned int tempo) {
  for (int cont = 0; cont < tempo; cont++)
    usleep(1000000);
}


x86 assembly (clang, -O0):
<delay_s>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jae    1146 <delay_s+0x36>
mov    $0xf4240,%edi
call   1030 <usleep@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <delay_s+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay_s>:
push   %rbx
test   %edi,%edi
je     112f <delay_s+0x1f>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0xf4240,%edi
call   1030 <usleep@plt>
add    $0xffffffff,%ebx
jne    1120 <delay_s+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @delay_s(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp ult i32 %5, %6
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = call i32 @usleep(i32 1000000)
br label %10
10: ; preds = %8
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @delay_s(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %3, label %4
3: ; preds = %4, %1
ret void
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = tail call i32 @usleep(i32 1000000)
%7 = add nuw i32 %5, 1
%8 = icmp eq i32 %7, %0
br i1 %8, label %3, label %4
}
/* Type definitions */
typedef int /*<<< orphan*/ fd_set;

/* Variables and functions */
int /*<<< orphan*/ FD_ZERO(int /*<<< orphan*/ *);
int /*<<< orphan*/ close(int);
void close_pipe(int fd, fd_set *p_rset) {
  (void)close(fd);
  FD_ZERO(p_rset);
}


x86 assembly (clang, -O0):
<close_pipe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
mov    -0x10(%rbp),%rdi
call   1040 <FD_ZERO@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_pipe>:
push   %rbx
mov    %rsi,%rbx
call   1030 <close@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <FD_ZERO@plt>

LLVM IR (-O0):
define void @close_pipe(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = call i32 @close(i32 %5)
%7 = load i32*, i32** %4
%8 = call i32 @FD_ZERO(i32* %7)
ret void
}

LLVM IR (-O2):
define void @close_pipe(i32 %0, i32* %1) {
%3 = tail call i32 @close(i32 %0)
%4 = tail call i32 @FD_ZERO(i32* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void usage(const char *prog) {
  fprintf(stderr, "Usage: %s iv input output\n", prog);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [27 x i8] c"Usage: %s iv input output\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [27 x i8] c"Usage: %s iv input output\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void add_E_phi(double *phiL, double *phiR, double *phiD, double *phiU,
               double Edldt) {
  *phiL -= Edldt;
  *phiR += Edldt;
  *phiU -= Edldt;
  *phiD += Edldt;
}


x86 assembly (clang, -O0):
<add_E_phi>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm1
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
subsd  %xmm1,%xmm0
movsd  %xmm0,(%rax)
movsd  -0x28(%rbp),%xmm0
mov    -0x10(%rbp),%rax
addsd  (%rax),%xmm0
movsd  %xmm0,(%rax)
movsd  -0x28(%rbp),%xmm1
mov    -0x20(%rbp),%rax
movsd  (%rax),%xmm0
subsd  %xmm1,%xmm0
movsd  %xmm0,(%rax)
movsd  -0x28(%rbp),%xmm0
mov    -0x18(%rbp),%rax
addsd  (%rax),%xmm0
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_E_phi>:
movsd  (%rdi),%xmm1
subsd  %xmm0,%xmm1
movsd  %xmm1,(%rdi)
movsd  (%rsi),%xmm1
addsd  %xmm0,%xmm1
movsd  %xmm1,(%rsi)
movsd  (%rcx),%xmm1
subsd  %xmm0,%xmm1
movsd  %xmm1,(%rcx)
addsd  (%rdx),%xmm0
movsd  %xmm0,(%rdx)
ret

LLVM IR (-O0):
define void @add_E_phi(double* %0, double* %1, double* %2, double* %3, double %4) {
%6 = alloca double*
%7 = alloca double*
%8 = alloca double*
%9 = alloca double*
%10 = alloca double
store double* %0, double** %6
store double* %1, double** %7
store double* %2, double** %8
store double* %3, double** %9
store double %4, double* %10
%11 = load double, double* %10
%12 = load double*, double** %6
%13 = load double, double* %12
%14 = fsub double %13, %11
store double %14, double* %12
%15 = load double, double* %10
%16 = load double*, double** %7
%17 = load double, double* %16
%18 = fadd double %17, %15
store double %18, double* %16
%19 = load double, double* %10
%20 = load double*, double** %9
%21 = load double, double* %20
%22 = fsub double %21, %19
store double %22, double* %20
%23 = load double, double* %10
%24 = load double*, double** %8
%25 = load double, double* %24
%26 = fadd double %25, %23
store double %26, double* %24
ret void
}

LLVM IR (-O2):
define void @add_E_phi(double* nocapture %0, double* nocapture %1, double* nocapture %2, double* nocapture %3, double %4) {
%6 = load double, double* %0
%7 = fsub double %6, %4
store double %7, double* %0
%8 = load double, double* %1
%9 = fadd double %8, %4
store double %9, double* %1
%10 = load double, double* %3
%11 = fsub double %10, %4
store double %11, double* %3
%12 = load double, double* %2
%13 = fadd double %12, %4
store double %13, double* %2
ret void
}
int log_console_callback_uninit(void *args) { return 0; }


x86 assembly (clang, -O0):
<log_console_callback_uninit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_console_callback_uninit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @log_console_callback_uninit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @log_console_callback_uninit(i8* nocapture readnone %0) {
ret i32 0
}
OP(dd, f4) { op_f4(); }


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <op_f4@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
xor    %eax,%eax
jmp    1030 <op_f4@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @op_f4()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @op_f4()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void const *, size_t);
__attribute__((unused)) void CYCONFIGCPYCODE(void *dest, const void *src,
                                             size_t n) {
  (void)memcpy(dest, src, n);
}


x86 assembly (clang, -O0):
<CYCONFIGCPYCODE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CYCONFIGCPYCODE>:
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @CYCONFIGCPYCODE(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @memcpy(i8* %7, i8* %8, i64 %9)
ret void
}

LLVM IR (-O2):
define void @CYCONFIGCPYCODE(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @memcpy(i8* %0, i8* %1, i64 %2)
ret void
}
long H(int n) {
  int i;
  long res = 0;
  for (i = 1; i <= n; i++) {
    res = (res + n / i);
  }
  return res;
}


x86 assembly (clang, -O0):
<H>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     114f <H+0x4f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1116 <H+0x16>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<H>:
test   %edi,%edi
jle    1115 <H+0x15>
mov    %edi,%r9d
cmp    $0x1,%edi
jne    111b <H+0x1b>
mov    $0x1,%esi
xor    %ecx,%ecx
jmp    1155 <H+0x55>
xor    %ecx,%ecx
mov    %rcx,%rax
ret
mov    %r9d,%r8d
and    $0xfffffffe,%r8d
mov    $0x1,%esi
xor    %ecx,%ecx
nopl   0x0(%rax)
mov    %r9d,%eax
cltd
idiv   %esi
movslq %eax,%rdi
lea    0x1(%rsi),%r10d
mov    %r9d,%eax
cltd
idiv   %r10d
add    %rcx,%rdi
movslq %eax,%rcx
add    %rdi,%rcx
add    $0x2,%esi
cmp    %r8d,%r10d
jne    1130 <H+0x30>
test   $0x1,%r9b
je     1166 <H+0x66>
mov    %r9d,%eax
cltd
idiv   %esi
cltq
add    %rax,%rcx
mov    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @H(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %2
store i64 0, i64* %4
store i32 1, i32* %3
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp sle i32 %6, %7
br i1 %8, label %9, label %19
9: ; preds = %5
%10 = load i64, i64* %4
%11 = load i32, i32* %2
%12 = load i32, i32* %3
%13 = sdiv i32 %11, %12
%14 = sext i32 %13 to i64
%15 = add nsw i64 %10, %14
store i64 %15, i64* %4
br label %16
16: ; preds = %9
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 1
store i32 %18, i32* %3
br label %5
19: ; preds = %5
%20 = load i64, i64* %4
ret i64 %20
}

LLVM IR (-O2):
define i64 @H(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %31, label %3
3: ; preds = %1
%4 = and i32 %0, 1
%5 = icmp eq i32 %0, 1
br i1 %5, label %22, label %6
6: ; preds = %3
%7 = and i32 %0, -2
br label %8
8: ; preds = %8, %6
%9 = phi i64 [ 0, %6 ], [ %18, %8 ]
%10 = phi i32 [ 1, %6 ], [ %19, %8 ]
%11 = phi i32 [ 0, %6 ], [ %20, %8 ]
%12 = sdiv i32 %0, %10
%13 = sext i32 %12 to i64
%14 = add nsw i64 %9, %13
%15 = add nuw i32 %10, 1
%16 = sdiv i32 %0, %15
%17 = sext i32 %16 to i64
%18 = add nsw i64 %14, %17
%19 = add nuw i32 %10, 2
%20 = add i32 %11, 2
%21 = icmp eq i32 %20, %7
br i1 %21, label %22, label %8
22: ; preds = %8, %3
%23 = phi i64 [ undef, %3 ], [ %18, %8 ]
%24 = phi i64 [ 0, %3 ], [ %18, %8 ]
%25 = phi i32 [ 1, %3 ], [ %19, %8 ]
%26 = icmp eq i32 %4, 0
br i1 %26, label %31, label %27
27: ; preds = %22
%28 = sdiv i32 %0, %25
%29 = sext i32 %28 to i64
%30 = add nsw i64 %24, %29
br label %31
31: ; preds = %27, %22, %1
%32 = phi i64 [ 0, %1 ], [ %23, %22 ], [ %30, %27 ]
ret i64 %32
}
/* Type definitions */
typedef int /*<<< orphan*/ temps;
struct cb_hostreference_list {
  int dummy;
};

/* Variables and functions */
int cb_search_list(char *);
int /*<<< orphan*/ com_sprintf(char *, int, char *, int);
char *com_strdup(char *);
char *cb_host_list_add(struct cb_hostreference_list *list, char *text) {
  int hostno;
  char temps[256];
  hostno = cb_search_list(text);
  com_sprintf(temps, sizeof(temps), "$%d", hostno);
  return com_strdup(temps);
}


x86 assembly (clang, -O0):
<cb_host_list_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x120,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <cb_search_list@plt>
mov    %eax,-0x14(%rbp)
lea    -0x120(%rbp),%rdi
mov    -0x14(%rbp),%ecx
mov    $0x100,%esi
lea    0xe9b(%rip),%rdx
call   1040 <com_sprintf@plt>
lea    -0x120(%rbp),%rdi
call   1030 <com_strdup@plt>
add    $0x120,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cb_host_list_add>:
push   %rbx
sub    $0x100,%rsp
mov    %rsi,%rdi
call   1050 <cb_search_list@plt>
lea    0xeb9(%rip),%rdx
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x100,%esi
mov    %eax,%ecx
call   1040 <com_sprintf@plt>
mov    %rbx,%rdi
call   1030 <com_strdup@plt>
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.cb_hostreference_list = type { i32 }
@.str = [4 x i8] c"$%d\00"
define i8* @cb_host_list_add(%struct.cb_hostreference_list* %0, i8* %1) {
%3 = alloca %struct.cb_hostreference_list*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca [256 x i8]
store %struct.cb_hostreference_list* %0, %struct.cb_hostreference_list** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @cb_search_list(i8* %7)
store i32 %8, i32* %5
%9 = getelementptr inbounds [256 x i8], [256 x i8]* %6, i64 0, i64 0
%10 = load i32, i32* %5
%11 = call i32 @com_sprintf(i8* %9, i32 256, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %10)
%12 = getelementptr inbounds [256 x i8], [256 x i8]* %6, i64 0, i64 0
%13 = call i8* @com_strdup(i8* %12)
ret i8* %13
}

LLVM IR (-O2):
%struct.cb_hostreference_list = type { i32 }
@.str = [4 x i8] c"$%d\00"
define i8* @cb_host_list_add(%struct.cb_hostreference_list* nocapture readnone %0, i8* %1) {
%3 = alloca [256 x i8]
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%5 = tail call i32 @cb_search_list(i8* %1)
%6 = call i32 @com_sprintf(i8* %4, i32 256, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = call i8* @com_strdup(i8* %4)
ret i8* %7
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char const *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void diag(const char *s, const char *t) {
  fputs("sort: ", stderr);
  fputs(s, stderr);
  fputs(t, stderr);
  fputs("\n", stderr);
}


x86 assembly (clang, -O0):
<diag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb9(%rip),%rax
mov    (%rax),%esi
lea    0xed0(%rip),%rdi
call   1030 <fputs@plt>
mov    -0x8(%rbp),%rdi
mov    0x2ea0(%rip),%rax
mov    (%rax),%esi
call   1030 <fputs@plt>
mov    -0x10(%rbp),%rdi
mov    0x2e8e(%rip),%rax
mov    (%rax),%esi
call   1030 <fputs@plt>
mov    0x2e80(%rip),%rax
mov    (%rax),%esi
lea    0xe9e(%rip),%rdi
call   1030 <fputs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<diag>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
mov    0x2ebe(%rip),%r15
mov    (%r15),%esi
lea    0xed4(%rip),%rdi
call   1030 <fputs@plt>
mov    (%r15),%esi
mov    %rbx,%rdi
call   1030 <fputs@plt>
mov    (%r15),%esi
mov    %r14,%rdi
call   1030 <fputs@plt>
mov    (%r15),%esi
lea    0xeb6(%rip),%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <fputs@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"sort: \00"
@stderr = global i32 0
@.str.1 = [2 x i8] c"\0A\00"
define void @diag(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i32, i32* @stderr
%6 = call i32 @fputs(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i8*, i8** %3
%8 = load i32, i32* @stderr
%9 = call i32 @fputs(i8* %7, i32 %8)
%10 = load i8*, i8** %4
%11 = load i32, i32* @stderr
%12 = call i32 @fputs(i8* %10, i32 %11)
%13 = load i32, i32* @stderr
%14 = call i32 @fputs(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32 %13)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"sort: \00"
@stderr = global i32 0
@.str.1 = [2 x i8] c"\0A\00"
define void @diag(i8* %0, i8* %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fputs(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* @stderr
%6 = tail call i32 @fputs(i8* %0, i32 %5)
%7 = load i32, i32* @stderr
%8 = tail call i32 @fputs(i8* %1, i32 %7)
%9 = load i32, i32* @stderr
%10 = tail call i32 @fputs(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32 %9)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void Usage(void) {
  printf("knowsizes <file>\n"
         "\t<file> contains list of valid malloc sizes\n");
}


x86 assembly (clang, -O0):
<Usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [62 x i8] c"knowsizes <file>\0A\09<file> contains list of valid malloc sizes\0A\00"
define void @Usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [61 x i8] c"knowsizes <file>\0A\09<file> contains list of valid malloc sizes\00"
define void @Usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([61 x i8], [61 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct event {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ event_del(struct event *);
int /*<<< orphan*/ free(struct event *);
void rdns_libevent_del_write(void *priv_data, void *ev_data) {
  struct event *ev = ev_data;
  if (ev != NULL) {
    event_del(ev);
    free(ev);
  }
}


x86 assembly (clang, -O0):
<rdns_libevent_del_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1155 <rdns_libevent_del_write+0x35>
mov    -0x18(%rbp),%rdi
call   1040 <event_del@plt>
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rdns_libevent_del_write>:
test   %rsi,%rsi
je     113a <rdns_libevent_del_write+0x1a>
push   %rbx
mov    %rsi,%rbx
mov    %rsi,%rdi
call   1040 <event_del@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
%struct.event = type { i32 }
define void @rdns_libevent_del_write(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca %struct.event*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to %struct.event*
store %struct.event* %7, %struct.event** %5
%8 = load %struct.event*, %struct.event** %5
%9 = icmp ne %struct.event* %8, null
br i1 %9, label %10, label %15
10: ; preds = %2
%11 = load %struct.event*, %struct.event** %5
%12 = call i32 @event_del(%struct.event* %11)
%13 = load %struct.event*, %struct.event** %5
%14 = call i32 @free(%struct.event* %13)
br label %15
15: ; preds = %10, %2
ret void
}

LLVM IR (-O2):
%struct.event = type { i32 }
define void @rdns_libevent_del_write(i8* nocapture readnone %0, i8* %1) {
%3 = bitcast i8* %1 to %struct.event*
%4 = icmp eq i8* %1, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @event_del(%struct.event* %3)
%7 = tail call i32 @free(%struct.event* %3)
br label %8
8: ; preds = %5, %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
void openxcas_set_sid(uint16_t UNUSED__sid __attribute__((unused))) {}


x86 assembly (clang, -O0):
<openxcas_set_sid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<openxcas_set_sid>:
ret

LLVM IR (-O0):
define void @openxcas_set_sid(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @openxcas_set_sid(i32 %0) {
ret void
}
RX0AX1(r0, r1, x0, x1, p0, p1) double r0, r1;
double *p0, *p1;
{
  if ((p0[x0]) <= (((double *)11111111)[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<RX0AX1>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
mov    %edi,-0x1c(%rbp)
mov    %esi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
mov    -0x28(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm1
movslq -0x20(%rbp),%rcx
mov    $0xa98ac7,%eax
movsd  (%rax,%rcx,8),%xmm0
ucomisd %xmm1,%xmm0
jb     114d <RX0AX1+0x4d>
movl   $0x1,-0x4(%rbp)
jmp    1154 <RX0AX1+0x54>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RX0AX1>:
movslq %edi,%rcx
movslq %esi,%rax
movsd  0xa98ac7(,%rax,8),%xmm0
xor    %eax,%eax
ucomisd (%rdx,%rcx,8),%xmm0
setae  %al
ret

LLVM IR (-O0):
define i32 @RX0AX1(double %0, double %1, i32 %2, i32 %3, double* %4, double* %5) {
%7 = alloca i32
%8 = alloca double
%9 = alloca double
%10 = alloca i32
%11 = alloca i32
%12 = alloca double*
%13 = alloca double*
store double %0, double* %8
store double %1, double* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store double* %4, double** %12
store double* %5, double** %13
%14 = load double*, double** %12
%15 = load i32, i32* %10
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds double, double* %14, i64 %16
%18 = load double, double* %17
%19 = load i32, i32* %11
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds double, double* inttoptr (i64 11111111 to double*), i64 %20
%22 = load double, double* %21
%23 = fcmp ole double %18, %22
br i1 %23, label %24, label %25
24: ; preds = %6
store i32 1, i32* %7
br label %26
25: ; preds = %6
store i32 0, i32* %7
br label %26
26: ; preds = %25, %24
%27 = load i32, i32* %7
ret i32 %27
}

LLVM IR (-O2):
define i32 @RX0AX1(double %0, double %1, i32 %2, i32 %3, double* nocapture %4, double* nocapture readnone %5) {
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds double, double* %4, i64 %7
%9 = load double, double* %8
%10 = sext i32 %3 to i64
%11 = getelementptr inbounds double, double* inttoptr (i64 11111111 to double*), i64 %10
%12 = load double, double* %11
%13 = fcmp ole double %9, %12
%14 = zext i1 %13 to i32
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("AES 256 Key Expansion\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"AES 256 Key Expansion\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [22 x i8] c"AES 256 Key Expansion\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
main() {
  int a = 10, b;
  b = a >= 5 ? 100 : 200;
  printf("%d\n", b);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xa,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0xc8,%eax
mov    $0x64,%ecx
cmp    $0x5,%edx
cmovge %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x64,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 10, i32* %1
%3 = load i32, i32* %1
%4 = icmp sge i32 %3, 5
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 100, i32 200
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 100)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ SerialWriteChar(int);
void iRobot_Dock() { SerialWriteChar(143); }


x86 assembly (clang, -O0):
<iRobot_Dock>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8f,%edi
call   1030 <SerialWriteChar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<iRobot_Dock>:
mov    $0x8f,%edi
jmp    1030 <SerialWriteChar@plt>

LLVM IR (-O0):
define void @iRobot_Dock() {
%1 = call i32 @SerialWriteChar(i32 143)
ret void
}

LLVM IR (-O2):
define void @iRobot_Dock() {
%1 = tail call i32 @SerialWriteChar(i32 143)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memoryChunkPrint(char *, void *);
void memoryChunkTraverse(char *leader, void *data) {
  memoryChunkPrint("  ", data);
}


x86 assembly (clang, -O0):
<memoryChunkTraverse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xed5(%rip),%rdi
call   1030 <memoryChunkPrint@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memoryChunkTraverse>:
lea    0xee9(%rip),%rdi
jmp    1030 <memoryChunkPrint@plt>

LLVM IR (-O0):
@.str = [3 x i8] c" \00"
define void @memoryChunkTraverse(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @memoryChunkPrint(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c" \00"
define void @memoryChunkTraverse(i8* nocapture readnone %0, i8* %1) {
%3 = tail call i32 @memoryChunkPrint(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %1)
ret void
}
/* Variables and functions */
long double exp2l(unsigned char);
long double t4(unsigned char x) { return exp2l(x); }


x86 assembly (clang, -O0):
<t4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <exp2l@plt>
fld    %st(0)
fstp   %st(0)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t4>:
jmp    1030 <exp2l@plt>

LLVM IR (-O0):
define x86_fp80 @t4(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call x86_fp80 @exp2l(i8 zeroext %3)
ret x86_fp80 %4
}

LLVM IR (-O2):
define x86_fp80 @t4(i8 zeroext %0) {
%2 = tail call x86_fp80 @exp2l(i8 zeroext %0)
ret x86_fp80 %2
}
int mysql_connect(char *user, char *password) {
  int connected = 0;
  int i = -1;
  unsigned int count = 0;
  return 0;
}


x86 assembly (clang, -O0):
<mysql_connect>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0xffffffff,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mysql_connect>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mysql_connect(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
store i32 -1, i32* %6
store i32 0, i32* %7
ret i32 0
}

LLVM IR (-O2):
define i32 @mysql_connect(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ SOMAXCONN;
int listen(int const, int /*<<< orphan*/);
bool setSocketListening(const int socket) {
  return (listen(socket, SOMAXCONN) != -1);
}


x86 assembly (clang, -O0):
<setSocketListening>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
call   1030 <listen@plt>
cmp    $0xffffffff,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setSocketListening>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
call   1030 <listen@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@SOMAXCONN = global i32 0
define i32 @setSocketListening(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SOMAXCONN
%5 = call i32 @listen(i32 %3, i32 %4)
%6 = icmp ne i32 %5, -1
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
@SOMAXCONN = global i32 0
define i32 @setSocketListening(i32 %0) {
%2 = load i32, i32* @SOMAXCONN
%3 = tail call i32 @listen(i32 %0, i32 %2)
%4 = icmp ne i32 %3, -1
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int ILibString_EndsWithEx(char const *, int, char const *, int, int);
int ILibString_EndsWith(const char *inString, int inStringLength,
                        const char *endWithString, int endWithStringLength) {
  return (ILibString_EndsWithEx(inString, inStringLength, endWithString,
                                endWithStringLength, 1));
}


x86 assembly (clang, -O0):
<ILibString_EndsWith>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    $0x1,%r8d
call   1030 <ILibString_EndsWithEx@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ILibString_EndsWith>:
mov    $0x1,%r8d
jmp    1030 <ILibString_EndsWithEx@plt>

LLVM IR (-O0):
define i32 @ILibString_EndsWith(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = load i8*, i8** %7
%12 = load i32, i32* %8
%13 = call i32 @ILibString_EndsWithEx(i8* %9, i32 %10, i8* %11, i32 %12, i32 1)
ret i32 %13
}

LLVM IR (-O2):
define i32 @ILibString_EndsWith(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = tail call i32 @ILibString_EndsWithEx(i8* %0, i32 %1, i8* %2, i32 %3, i32 1)
ret i32 %5
}
/* Variables and functions */
char *strdup(char *);
char *CopyStr(char *AStr) { return (AStr) ? strdup(AStr) : NULL; }


x86 assembly (clang, -O0):
<CopyStr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1139 <CopyStr+0x29>
mov    -0x8(%rbp),%rdi
call   1030 <strdup@plt>
mov    %rax,-0x10(%rbp)
jmp    1144 <CopyStr+0x34>
xor    %eax,%eax
mov    %rax,-0x10(%rbp)
jmp    1144 <CopyStr+0x34>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CopyStr>:
test   %rdi,%rdi
je     111a <CopyStr+0xa>
jmp    1030 <strdup@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @CopyStr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i8* @strdup(i8* %6)
br label %9
8: ; preds = %1
br label %9
9: ; preds = %8, %5
%10 = phi i8* [ %7, %5 ], [ null, %8 ]
ret i8* %10
}

LLVM IR (-O2):
define noalias i8* @CopyStr(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i8* @strdup(i8* %0)
br label %5
5: ; preds = %1, %3
%6 = phi i8* [ %4, %3 ], [ null, %1 ]
ret i8* %6
}
unsigned short int unsignedshortint_ignoring_unsignedshort(unsigned short int x,
                                                           unsigned short y) {
  return x;
}


x86 assembly (clang, -O0):
<unsignedshortint_ignoring_unsignedshort>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsignedshortint_ignoring_unsignedshort>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @unsignedshortint_ignoring_unsignedshort(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
ret i16 %5
}

LLVM IR (-O2):
define zeroext i16 @unsignedshortint_ignoring_unsignedshort(i16 returned zeroext %0, i16 zeroext %1) {
ret i16 %0
}
unsigned int set_bit_uint(unsigned int pos, unsigned int bit,
                          unsigned int val) {
  return ((val) ^ ((((((((val))) >> (((pos)))) & 1)) ^ ((bit)&1)) << (pos)));
}


x86 assembly (clang, -O0):
<set_bit_uint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0xc(%rbp),%edx
mov    -0x4(%rbp),%ecx
shr    %cl,%edx
and    $0x1,%edx
mov    -0x8(%rbp),%ecx
and    $0x1,%ecx
xor    %ecx,%edx
mov    -0x4(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_bit_uint>:
mov    %edi,%ecx
mov    %edx,%eax
shr    %cl,%eax
xor    %esi,%eax
and    $0x1,%eax
shl    %cl,%eax
xor    %edx,%eax
ret

LLVM IR (-O0):
define i32 @set_bit_uint(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = lshr i32 %8, %9
%11 = and i32 %10, 1
%12 = load i32, i32* %5
%13 = and i32 %12, 1
%14 = xor i32 %11, %13
%15 = load i32, i32* %4
%16 = shl i32 %14, %15
%17 = xor i32 %7, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @set_bit_uint(i32 %0, i32 %1, i32 %2) {
%4 = lshr i32 %2, %0
%5 = xor i32 %4, %1
%6 = and i32 %5, 1
%7 = shl nuw i32 %6, %0
%8 = xor i32 %7, %2
ret i32 %8
}