xunge/DecIR huggingface dataset:
adr0adr1_set(r0, r1, x0, x1, p0, p1) short r0, r1;
short *p0, *p1;
{ (*((short *)10000000)) = (*((short *)11111111)); }


x86 assembly (clang, -O0):
<adr0adr1_set>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    $0xa98ac7,%eax
mov    (%rax),%cx
mov    $0x989680,%eax
mov    %cx,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adr0adr1_set>:
movzwl 0xa98ac7,%eax
mov    %ax,0x989680
ret

LLVM IR (-O0):
define i32 @adr0adr1_set(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16, i16* inttoptr (i64 11111111 to i16*)
store i16 %16, i16* inttoptr (i64 10000000 to i16*)
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
define i32 @adr0adr1_set(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture readnone %5) {
%7 = load i16, i16* inttoptr (i64 11111111 to i16*)
store i16 %7, i16* inttoptr (i64 10000000 to i16*)
ret i32 undef
}
/* Type definitions */
struct pidfh {
  int dummy;
};

/* Variables and functions */
int _pidfile_remove(struct pidfh *, int);
int pidfile_remove(struct pidfh *pfh) { return (_pidfile_remove(pfh, 1)); }


x86 assembly (clang, -O0):
<pidfile_remove>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <_pidfile_remove@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pidfile_remove>:
mov    $0x1,%esi
jmp    1030 <_pidfile_remove@plt>

LLVM IR (-O0):
%struct.pidfh = type { i32 }
define i32 @pidfile_remove(%struct.pidfh* %0) {
%2 = alloca %struct.pidfh*
store %struct.pidfh* %0, %struct.pidfh** %2
%3 = load %struct.pidfh*, %struct.pidfh** %2
%4 = call i32 @_pidfile_remove(%struct.pidfh* %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
%struct.pidfh = type { i32 }
define i32 @pidfile_remove(%struct.pidfh* %0) {
%2 = tail call i32 @_pidfile_remove(%struct.pidfh* %0, i32 1)
ret i32 %2
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ do_convert();
int /*<<< orphan*/ select_parameter(int, char **);
int main(int argc, char **argv) {
  select_parameter(argc, argv);
  do_convert();
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <select_parameter@plt>
mov    $0x0,%al
call   1030 <do_convert@plt>
mov    0x2e90(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1040 <select_parameter@plt>
xor    %eax,%eax
call   1030 <do_convert@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @select_parameter(i32 %6, i8** %7)
%9 = call i32 (...) @do_convert()
%10 = load i32, i32* @EXIT_SUCCESS
ret i32 %10
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @select_parameter(i32 %0, i8** %1)
%4 = tail call i32 (...) @do_convert()
%5 = load i32, i32* @EXIT_SUCCESS
ret i32 %5
}
int size_row(char *str) {
  int i;
  int j;
  i = 0;
  j = 0;
  while (str[i] != '\0') {
    if (str[i] == '\n')
      j++;
    i++;
  }
  j -= 1;
  return (j);
}


x86 assembly (clang, -O0):
<size_row>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1157 <size_row+0x57>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0xa,%eax
jne    1149 <size_row+0x49>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <size_row+0x16>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<size_row>:
xor    %eax,%eax
jmp    1117 <size_row+0x17>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
add    $0x1,%eax
add    $0x1,%rdi
movzbl (%rdi),%ecx
cmp    $0xa,%cl
je     1110 <size_row+0x10>
test   %cl,%cl
jne    1113 <size_row+0x13>
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @size_row(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %24, %1
%6 = load i8*, i8** %2
%7 = load i32, i32* %3
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %27
13: ; preds = %5
%14 = load i8*, i8** %2
%15 = load i32, i32* %3
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 10
br i1 %20, label %21, label %24
21: ; preds = %13
%22 = load i32, i32* %4
%23 = add nsw i32 %22, 1
store i32 %23, i32* %4
br label %24
24: ; preds = %21, %13
%25 = load i32, i32* %3
%26 = add nsw i32 %25, 1
store i32 %26, i32* %3
br label %5
27: ; preds = %5
%28 = load i32, i32* %4
%29 = sub nsw i32 %28, 1
store i32 %29, i32* %4
%30 = load i32, i32* %4
ret i32 %30
}

LLVM IR (-O2):
define i32 @size_row(i8* nocapture %0) {
br label %2
2: ; preds = %9, %1
%3 = phi i64 [ %11, %9 ], [ 0, %1 ]
%4 = phi i32 [ %10, %9 ], [ 0, %1 ]
%5 = getelementptr inbounds i8, i8* %0, i64 %3
%6 = load i8, i8* %5
switch i8 %6, label %9 [
i8 0, label %12
i8 10, label %7
]
7: ; preds = %2
%8 = add nsw i32 %4, 1
br label %9
9: ; preds = %2, %7
%10 = phi i32 [ %8, %7 ], [ %4, %2 ]
%11 = add nuw i64 %3, 1
br label %2
12: ; preds = %2
%13 = add nsw i32 %4, -1
ret i32 %13
}
/* Variables and functions */
int fastio_write(int, int *, int);
int fastio_write_int(int fd, int val) {
  return fastio_write(fd, &val, sizeof(int));
}


x86 assembly (clang, -O0):
<fastio_write_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1030 <fastio_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fastio_write_int>:
push   %rax
mov    %esi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
call   1030 <fastio_write@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fastio_write_int(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @fastio_write(i32 %5, i32* %4, i32 4)
ret i32 %6
}

LLVM IR (-O2):
define i32 @fastio_write_int(i32 %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = call i32 @fastio_write(i32 %0, i32* %3, i32 4)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ panos_pin_function(int, int);
int /*<<< orphan*/ panos_pin_set(int);
void panos_uart_init(void) {
  panos_pin_function(14, 0x1);
  panos_pin_set(14);
}


x86 assembly (clang, -O0):
<panos_uart_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe,%edi
mov    $0x1,%esi
call   1030 <panos_pin_function@plt>
mov    $0xe,%edi
call   1040 <panos_pin_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<panos_uart_init>:
push   %rax
mov    $0xe,%edi
mov    $0x1,%esi
call   1030 <panos_pin_function@plt>
mov    $0xe,%edi
pop    %rax
jmp    1040 <panos_pin_set@plt>

LLVM IR (-O0):
define void @panos_uart_init() {
%1 = call i32 @panos_pin_function(i32 14, i32 1)
%2 = call i32 @panos_pin_set(i32 14)
ret void
}

LLVM IR (-O2):
define void @panos_uart_init() {
%1 = tail call i32 @panos_pin_function(i32 14, i32 1)
%2 = tail call i32 @panos_pin_set(i32 14)
ret void
}
int ldprec() { return 0; }


x86 assembly (clang, -O0):
<ldprec>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ldprec>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ldprec() {
ret i32 0
}

LLVM IR (-O2):
define i32 @ldprec() {
ret i32 0
}
/* Variables and functions */
unsigned int exynos_5410_gpio_read(unsigned int);
unsigned int odroid_xu_gpio_read_17() {
  unsigned int bank_offset = 0x0C20;
  unsigned int bit_index = 6;
  return (exynos_5410_gpio_read(bank_offset) >> bit_index) & 0x1;
}


x86 assembly (clang, -O0):
<odroid_xu_gpio_read_17>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xc20,-0x4(%rbp)
movl   $0x6,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <exynos_5410_gpio_read@plt>
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
and    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<odroid_xu_gpio_read_17>:
push   %rax
mov    $0xc20,%edi
call   1030 <exynos_5410_gpio_read@plt>
shr    $0x6,%eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @odroid_xu_gpio_read_17() {
%1 = alloca i32
%2 = alloca i32
store i32 3104, i32* %1
store i32 6, i32* %2
%3 = load i32, i32* %1
%4 = call i32 @exynos_5410_gpio_read(i32 %3)
%5 = load i32, i32* %2
%6 = lshr i32 %4, %5
%7 = and i32 %6, 1
ret i32 %7
}

LLVM IR (-O2):
define i32 @odroid_xu_gpio_read_17() {
%1 = tail call i32 @exynos_5410_gpio_read(i32 3104)
%2 = lshr i32 %1, 6
%3 = and i32 %2, 1
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_key_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
void *pthread_getspecific(int /*<<< orphan*/);
scalar_t__ pthread_setspecific(int /*<<< orphan*/, void *);
void f1(pthread_key_t *key) {
  void *val = pthread_getspecific(*key);
  *((size_t *)val) += 1;
  assert(0 == pthread_setspecific(*key, val));
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <pthread_getspecific@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
call   1050 <pthread_setspecific@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%edi
call   1030 <pthread_getspecific@plt>
addq   $0x1,(%rax)
mov    (%rbx),%edi
mov    %rax,%rsi
call   1050 <pthread_setspecific@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
pop    %rbx
jmp    1040 <assert@plt>

LLVM IR (-O0):
define void @f1(i32* %0) {
%2 = alloca i32*
%3 = alloca i8*
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
%6 = call i8* @pthread_getspecific(i32 %5)
store i8* %6, i8** %3
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i64*
%9 = load i64, i64* %8
%10 = add i64 %9, 1
store i64 %10, i64* %8
%11 = load i32*, i32** %2
%12 = load i32, i32* %11
%13 = load i8*, i8** %3
%14 = call i64 @pthread_setspecific(i32 %12, i8* %13)
%15 = icmp eq i64 0, %14
%16 = zext i1 %15 to i32
%17 = call i32 @assert(i32 %16)
ret void
}

LLVM IR (-O2):
define void @f1(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i8* @pthread_getspecific(i32 %2)
%4 = bitcast i8* %3 to i64*
%5 = load i64, i64* %4
%6 = add i64 %5, 1
store i64 %6, i64* %4
%7 = load i32, i32* %0
%8 = tail call i64 @pthread_setspecific(i32 %7, i8* %3)
%9 = icmp eq i64 %8, 0
%10 = zext i1 %9 to i32
%11 = tail call i32 @assert(i32 %10)
ret void
}
int fb_ConsoleIsRedirected(int is_input) { return 1; }


x86 assembly (clang, -O0):
<fb_ConsoleIsRedirected>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb_ConsoleIsRedirected>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @fb_ConsoleIsRedirected(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @fb_ConsoleIsRedirected(i32 %0) {
ret i32 1
}
/* Variables and functions */
int _positive_solver_rec(double **, double *, double *, int);
int posdef_positive_solver_fast(double **A, double *x, double *b, int n) {
  return _positive_solver_rec(A, x, b, n);
}


x86 assembly (clang, -O0):
<posdef_positive_solver_fast>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <_positive_solver_rec@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<posdef_positive_solver_fast>:
jmp    1030 <_positive_solver_rec@plt>

LLVM IR (-O0):
define i32 @posdef_positive_solver_fast(double** %0, double* %1, double* %2, i32 %3) {
%5 = alloca double**
%6 = alloca double*
%7 = alloca double*
%8 = alloca i32
store double** %0, double*** %5
store double* %1, double** %6
store double* %2, double** %7
store i32 %3, i32* %8
%9 = load double**, double*** %5
%10 = load double*, double** %6
%11 = load double*, double** %7
%12 = load i32, i32* %8
%13 = call i32 @_positive_solver_rec(double** %9, double* %10, double* %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @posdef_positive_solver_fast(double** %0, double* %1, double* %2, i32 %3) {
%5 = tail call i32 @_positive_solver_rec(double** %0, double* %1, double* %2, i32 %3)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
int log_fail(char *msg) {
  perror(msg);
  return 0;
}


x86 assembly (clang, -O0):
<log_fail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_fail>:
push   %rax
call   1030 <perror@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @log_fail(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @log_fail(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
ret i32 0
}
/* Variables and functions */
int any_decrqss(char const *, char *);
int rpt_DECSPRTT(const char *the_title) { return any_decrqss(the_title, "$s"); }


x86 assembly (clang, -O0):
<rpt_DECSPRTT>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <any_decrqss@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpt_DECSPRTT>:
lea    0xee9(%rip),%rsi
jmp    1030 <any_decrqss@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"$s\00"
define i32 @rpt_DECSPRTT(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @any_decrqss(i8* %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [3 x i8] c"$s\00"
define i32 @rpt_DECSPRTT(i8* %0) {
%2 = tail call i32 @any_decrqss(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ input_dirname();
int /*<<< orphan*/ input_ext();
int /*<<< orphan*/ input_name();
int /*<<< orphan*/ input_path();
int /*<<< orphan*/ input_root();
int main() {
  input_root();
  input_dirname();
  input_path();
  input_ext();
  input_name();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <input_root@plt>
mov    $0x0,%al
call   1060 <input_dirname@plt>
mov    $0x0,%al
call   1030 <input_path@plt>
mov    $0x0,%al
call   1070 <input_ext@plt>
mov    $0x0,%al
call   1040 <input_name@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <input_root@plt>
xor    %eax,%eax
call   1060 <input_dirname@plt>
xor    %eax,%eax
call   1030 <input_path@plt>
xor    %eax,%eax
call   1070 <input_ext@plt>
xor    %eax,%eax
call   1040 <input_name@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @input_root()
%3 = call i32 (...) @input_dirname()
%4 = call i32 (...) @input_path()
%5 = call i32 (...) @input_ext()
%6 = call i32 (...) @input_name()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @input_root()
%2 = tail call i32 (...) @input_dirname()
%3 = tail call i32 (...) @input_path()
%4 = tail call i32 (...) @input_ext()
%5 = tail call i32 (...) @input_name()
ret i32 0
}
int is_not_printable(const unsigned short c) {
  return (c < 32 || (c >= 0x80 && c <= 0x9f));
}


x86 assembly (clang, -O0):
<is_not_printable>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x3(%rbp)
jl     1147 <is_not_printable+0x47>
movzwl -0x2(%rbp),%ecx
xor    %eax,%eax
cmp    $0x80,%ecx
mov    %al,-0x4(%rbp)
jl     1141 <is_not_printable+0x41>
movzwl -0x2(%rbp),%eax
cmp    $0x9f,%eax
setle  %al
mov    %al,-0x4(%rbp)
mov    -0x4(%rbp),%al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_not_printable>:
cmp    $0x20,%di
setb   %al
and    $0xffffffe0,%edi
cmp    $0x80,%edi
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_not_printable(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = icmp slt i32 %4, 32
br i1 %5, label %16, label %6
6: ; preds = %1
%7 = load i16, i16* %2
%8 = zext i16 %7 to i32
%9 = icmp sge i32 %8, 128
br i1 %9, label %10, label %14
10: ; preds = %6
%11 = load i16, i16* %2
%12 = zext i16 %11 to i32
%13 = icmp sle i32 %12, 159
br label %14
14: ; preds = %10, %6
%15 = phi i1 [ false, %6 ], [ %13, %10 ]
br label %16
16: ; preds = %14, %1
%17 = phi i1 [ true, %1 ], [ %15, %14 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @is_not_printable(i16 zeroext %0) {
%2 = icmp ult i16 %0, 32
%3 = and i16 %0, -32
%4 = icmp eq i16 %3, 128
%5 = or i1 %2, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void say_hi(void) { printf("B: hi\n"); }


x86 assembly (clang, -O0):
<say_hi>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<say_hi>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"B: hi\0A\00"
define void @say_hi() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [6 x i8] c"B: hi\00"
define void @say_hi() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
ret void
}
char *strcat(char *str1, const char *str2) {
  register char *p1 = str1;
  register const char *p2 = str2;
  while (*p1++)
    ;
  while ((*p1++ = *p2++))
    ;
  *p1 = '\0';
  return str1;
}


x86 assembly (clang, -O0):
<strcat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
cmpb   $0x0,(%rax)
je     1139 <strcat+0x39>
jmp    111c <strcat+0x1c>
jmp    113e <strcat+0x3e>
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x20(%rbp)
mov    (%rax),%al
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %al,(%rcx)
cmp    $0x0,%al
je     116d <strcat+0x6d>
jmp    113e <strcat+0x3e>
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcat>:
mov    %rdi,%rax
mov    %rdi,%rcx
cs nopw 0x0(%rax,%rax,1)
cmpb   $0x0,(%rcx)
lea    0x1(%rcx),%rcx
jne    1110 <strcat+0x10>
xor    %edx,%edx
nopl   0x0(%rax,%rax,1)
movzbl (%rsi,%rdx,1),%edi
mov    %dil,(%rcx,%rdx,1)
add    $0x1,%rdx
test   %dil,%dil
jne    1120 <strcat+0x20>
movb   $0x0,(%rcx,%rdx,1)
ret

LLVM IR (-O0):
define i8* @strcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
%8 = load i8*, i8** %4
store i8* %8, i8** %6
br label %9
9: ; preds = %14, %2
%10 = load i8*, i8** %5
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %5
%12 = load i8, i8* %10
%13 = icmp ne i8 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %9
br label %9
15: ; preds = %9
br label %16
16: ; preds = %23, %15
%17 = load i8*, i8** %6
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %6
%19 = load i8, i8* %17
%20 = load i8*, i8** %5
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %5
store i8 %19, i8* %20
%22 = icmp ne i8 %19, 0
br i1 %22, label %23, label %24
23: ; preds = %16
br label %16
24: ; preds = %16
%25 = load i8*, i8** %5
store i8 0, i8* %25
%26 = load i8*, i8** %3
ret i8* %26
}

LLVM IR (-O2):
define i8* @strcat(i8* returned %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %5, %3 ]
%5 = getelementptr inbounds i8, i8* %4, i64 1
%6 = load i8, i8* %4
%7 = icmp eq i8 %6, 0
br i1 %7, label %8, label %3
8: ; preds = %3, %8
%9 = phi i8* [ %13, %8 ], [ %5, %3 ]
%10 = phi i8* [ %11, %8 ], [ %1, %3 ]
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %10
%13 = getelementptr inbounds i8, i8* %9, i64 1
store i8 %12, i8* %9
%14 = icmp eq i8 %12, 0
br i1 %14, label %15, label %8
15: ; preds = %8
store i8 0, i8* %13
ret i8* %0
}
void XChangeProperty() {}


x86 assembly (clang, -O0):
<XChangeProperty>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XChangeProperty>:
ret

LLVM IR (-O0):
define void @XChangeProperty() {
ret void
}

LLVM IR (-O2):
define void @XChangeProperty() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ uwsgi_cron_add(char *);
void uwsgi_opt_add_cron(char *opt, char *value, void *foobar) {
  uwsgi_cron_add(value);
}


x86 assembly (clang, -O0):
<uwsgi_opt_add_cron>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <uwsgi_cron_add@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uwsgi_opt_add_cron>:
mov    %rsi,%rdi
jmp    1030 <uwsgi_cron_add@plt>

LLVM IR (-O0):
define void @uwsgi_opt_add_cron(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %5
%8 = call i32 @uwsgi_cron_add(i8* %7)
ret void
}

LLVM IR (-O2):
define void @uwsgi_opt_add_cron(i8* nocapture readnone %0, i8* %1, i8* nocapture readnone %2) {
%4 = tail call i32 @uwsgi_cron_add(i8* %1)
ret void
}
void putc(const char c) {
  while (*(volatile unsigned char *)(0xd8200000 + 0x1c) & 0x2)
    ;
  *(volatile unsigned char *)(0xd8200000 + 0) = c;
}


x86 assembly (clang, -O0):
<putc>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0xd820001c,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     1125 <putc+0x25>
jmp    110a <putc+0xa>
mov    -0x1(%rbp),%cl
mov    $0xd8200000,%eax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<putc>:
mov    $0xd8200000,%eax
cs nopw 0x0(%rax,%rax,1)
nop
testb  $0x2,0x1c(%rax)
jne    1110 <putc+0x10>
mov    %dil,(%rax)
ret

LLVM IR (-O0):
define void @putc(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
br label %3
3: ; preds = %8, %1
%4 = load volatile i8, i8* inttoptr (i64 3625975836 to i8*)
%5 = zext i8 %4 to i32
%6 = and i32 %5, 2
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %3
br label %3
9: ; preds = %3
%10 = load i8, i8* %2
store volatile i8 %10, i8* inttoptr (i64 3625975808 to i8*)
ret void
}

LLVM IR (-O2):
define void @putc(i8 signext %0) {
br label %2
2: ; preds = %2, %1
%3 = load volatile i8, i8* inttoptr (i64 3625975836 to i8*)
%4 = and i8 %3, 2
%5 = icmp eq i8 %4, 0
br i1 %5, label %6, label %2
6: ; preds = %2
store volatile i8 %0, i8* inttoptr (i64 3625975808 to i8*)
ret void
}
void set_transports() {}


x86 assembly (clang, -O0):
<set_transports>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_transports>:
ret

LLVM IR (-O0):
define void @set_transports() {
ret void
}

LLVM IR (-O2):
define void @set_transports() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
scalar_t__ fork();
int /*<<< orphan*/ sleep(int);
int main(void) {
  if (fork() > 0)
    sleep(5);
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <fork@plt>
cmp    $0x0,%rax
jle    115a <main+0x2a>
mov    $0x5,%edi
call   1040 <sleep@plt>
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <fork@plt>
test   %rax,%rax
jle    1147 <main+0x17>
mov    $0x5,%edi
call   1040 <sleep@plt>
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 (...) @fork()
%3 = icmp sgt i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @sleep(i32 5)
br label %6
6: ; preds = %4, %0
%7 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 (...) @fork()
%2 = icmp sgt i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @sleep(i32 5)
br label %5
5: ; preds = %3, %0
%6 = tail call i32 @exit(i32 0)
unreachable
}
int get_fpu_underflow_mode(void) { return 0; }


x86 assembly (clang, -O0):
<get_fpu_underflow_mode>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_fpu_underflow_mode>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_fpu_underflow_mode() {
ret i32 0
}

LLVM IR (-O2):
define i32 @get_fpu_underflow_mode() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
char *strrchr(char *, char);
char *__progname(char *nargv0) {
  char *tmp;
  assert(nargv0 != NULL);
  tmp = strrchr(nargv0, '/');
  if (tmp)
    tmp++;
  else
    tmp = nargv0;
  return (tmp);
}


x86 assembly (clang, -O0):
<__progname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rdi
mov    $0x2f,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     116c <__progname+0x4c>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1174 <__progname+0x54>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__progname>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1040 <assert@plt>
mov    %rbx,%rdi
mov    $0x2f,%esi
call   1030 <strrchr@plt>
lea    0x1(%rax),%rcx
test   %rax,%rax
cmove  %rbx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @__progname(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = icmp ne i8* %4, null
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
%8 = load i8*, i8** %2
%9 = call i8* @strrchr(i8* %8, i8 signext 47)
store i8* %9, i8** %3
%10 = load i8*, i8** %3
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %15
12: ; preds = %1
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %3
br label %17
15: ; preds = %1
%16 = load i8*, i8** %2
store i8* %16, i8** %3
br label %17
17: ; preds = %15, %12
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
define i8* @__progname(i8* %0) {
%2 = icmp ne i8* %0, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 47)
%6 = icmp eq i8* %5, null
%7 = getelementptr inbounds i8, i8* %5, i64 1
%8 = select i1 %6, i8* %0, i8* %7
ret i8* %8
}
int test_imm_5Cint8_mem(signed char *val) {
  return ((*val) & (-0x5C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Cint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xffffffa4,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Cint8_mem>:
testb  $0xa4,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Cint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, -92
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_5Cint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -92
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint8_t;

/* Variables and functions */
int /*<<< orphan*/ log_openssl_error(char const *, int);
uint8_t check_openssl_pointer(void *pointer, const char *file, int line) {
  const uint8_t ret = pointer != NULL;
  if (!ret)
    log_openssl_error(file, line);
  return ret;
}


x86 assembly (clang, -O0):
<check_openssl_pointer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jne    1149 <check_openssl_pointer+0x39>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <log_openssl_error@plt>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_openssl_pointer>:
push   %rbx
mov    %rdi,%rbx
test   %rdi,%rdi
jne    1123 <check_openssl_pointer+0x13>
mov    %rsi,%rdi
mov    %edx,%esi
call   1030 <log_openssl_error@plt>
xor    %eax,%eax
test   %rbx,%rbx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @check_openssl_pointer(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
%9 = icmp ne i8* %8, null
%10 = zext i1 %9 to i32
store i32 %10, i32* %7
%11 = load i32, i32* %7
%12 = icmp ne i32 %11, 0
br i1 %12, label %17, label %13
13: ; preds = %3
%14 = load i8*, i8** %5
%15 = load i32, i32* %6
%16 = call i32 @log_openssl_error(i8* %14, i32 %15)
br label %17
17: ; preds = %13, %3
%18 = load i32, i32* %7
ret i32 %18
}

LLVM IR (-O2):
define i32 @check_openssl_pointer(i8* readnone %0, i8* %1, i32 %2) {
%4 = icmp ne i8* %0, null
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @log_openssl_error(i8* %1, i32 %2)
br label %7
7: ; preds = %5, %3
%8 = zext i1 %4 to i32
ret i32 %8
}
/* Variables and functions */
char *_pico_alloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
char *_pico_clone_alloc(const char *str) {
  char *cloned;
  if (str == NULL) {
    return NULL;
  }
  cloned = _pico_alloc(strlen(str) + 1);
  if (cloned == NULL) {
    return NULL;
  }
  strcpy(cloned, str);
  return cloned;
}


x86 assembly (clang, -O0):
<_pico_clone_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1154 <_pico_clone_alloc+0x24>
movq   $0x0,-0x8(%rbp)
jmp    119a <_pico_clone_alloc+0x6a>
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <_pico_alloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1185 <_pico_clone_alloc+0x55>
movq   $0x0,-0x8(%rbp)
jmp    119a <_pico_clone_alloc+0x6a>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_pico_clone_alloc>:
push   %r14
push   %rbx
push   %rax
test   %rdi,%rdi
je     115f <_pico_clone_alloc+0x2f>
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <_pico_alloc@plt>
test   %rax,%rax
je     115f <_pico_clone_alloc+0x2f>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
jmp    1161 <_pico_clone_alloc+0x31>
xor    %ebx,%ebx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @_pico_clone_alloc(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %1
store i8* null, i8** %2
br label %21
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i64 @strlen(i8* %9)
%11 = add nsw i64 %10, 1
%12 = call i8* @_pico_alloc(i64 %11)
store i8* %12, i8** %4
%13 = load i8*, i8** %4
%14 = icmp eq i8* %13, null
br i1 %14, label %15, label %16
15: ; preds = %8
store i8* null, i8** %2
br label %21
16: ; preds = %8
%17 = load i8*, i8** %4
%18 = load i8*, i8** %3
%19 = call i32 @strcpy(i8* %17, i8* %18)
%20 = load i8*, i8** %4
store i8* %20, i8** %2
br label %21
21: ; preds = %16, %15, %7
%22 = load i8*, i8** %2
ret i8* %22
}

LLVM IR (-O2):
define i8* @_pico_clone_alloc(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = tail call i64 @strlen(i8* %0)
%5 = add nsw i64 %4, 1
%6 = tail call i8* @_pico_alloc(i64 %5)
%7 = icmp eq i8* %6, null
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = tail call i32 @strcpy(i8* %6, i8* %0)
br label %10
10: ; preds = %3, %1, %8
%11 = phi i8* [ %6, %8 ], [ null, %1 ], [ null, %3 ]
ret i8* %11
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int wcscmp(int /*<<< orphan*/ const *, int /*<<< orphan*/ const *);
int wcscoll(const wchar_t *scan1, const wchar_t *scan2) {
  return wcscmp(scan1, scan2);
}


x86 assembly (clang, -O0):
<wcscoll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <wcscmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcscoll>:
jmp    1030 <wcscmp@plt>

LLVM IR (-O0):
define i32 @wcscoll(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @wcscmp(i32* %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @wcscoll(i32* %0, i32* %1) {
%3 = tail call i32 @wcscmp(i32* %0, i32* %1)
ret i32 %3
}
/* Variables and functions */
double exp(double);
double betaM(double v) { return 4.0 * exp(-v / 18.0); }


x86 assembly (clang, -O0):
<betaM>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  0xec7(%rip),%xmm1
divsd  %xmm1,%xmm0
call   1030 <exp@plt>
movaps %xmm0,%xmm1
movsd  0xeab(%rip),%xmm0
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<betaM>:
push   %rax
divsd  0xee7(%rip),%xmm0
call   1030 <exp@plt>
mulsd  0xee2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @betaM(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fneg double %3
%5 = fdiv double %4, 1.800000e+01
%6 = call double @exp(double %5)
%7 = fmul double 4.000000e+00, %6
ret double %7
}

LLVM IR (-O2):
define double @betaM(double %0) {
%2 = fdiv double %0, -1.800000e+01
%3 = tail call double @exp(double %2)
%4 = fmul double %3, 4.000000e+00
ret double %4
}
/* Variables and functions */
int f(long long *);
int main(void) {
  long long int x = 5;
  return f(&x);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x5,-0x10(%rbp)
lea    -0x10(%rbp),%rdi
call   1030 <f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movq   $0x5,(%rsp)
mov    %rsp,%rdi
call   1030 <f@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
store i32 0, i32* %1
store i64 5, i64* %2
%3 = call i32 @f(i64* %2)
ret i32 %3
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i64
%2 = bitcast i64* %1 to i8*
store i64 5, i64* %1
%3 = call i32 @f(i64* %1)
ret i32 %3
}
/* Type definitions */
struct Cyc_Absyn_Exp {
  int dummy;
};

/* Variables and functions */
struct Cyc_Absyn_Exp *Cyc_Absyn_prim2_exp(unsigned int, struct Cyc_Absyn_Exp *,
                                          struct Cyc_Absyn_Exp *, unsigned int);
struct Cyc_Absyn_Exp *Cyc_Absyn_lte_exp(struct Cyc_Absyn_Exp *e1,
                                        struct Cyc_Absyn_Exp *e2,
                                        unsigned loc) {
  struct Cyc_Absyn_Exp *_T0;
  _T0 = Cyc_Absyn_prim2_exp(10U, e1, e2, loc);
  return _T0;
}


x86 assembly (clang, -O0):
<Cyc_Absyn_lte_exp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0xa,%edi
call   1030 <Cyc_Absyn_prim2_exp@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_Absyn_lte_exp>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0xa,%edi
jmp    1030 <Cyc_Absyn_prim2_exp@plt>

LLVM IR (-O0):
%struct.Cyc_Absyn_Exp = type { i32 }
define %struct.Cyc_Absyn_Exp* @Cyc_Absyn_lte_exp(%struct.Cyc_Absyn_Exp* %0, %struct.Cyc_Absyn_Exp* %1, i32 %2) {
%4 = alloca %struct.Cyc_Absyn_Exp*
%5 = alloca %struct.Cyc_Absyn_Exp*
%6 = alloca i32
%7 = alloca %struct.Cyc_Absyn_Exp*
store %struct.Cyc_Absyn_Exp* %0, %struct.Cyc_Absyn_Exp** %4
store %struct.Cyc_Absyn_Exp* %1, %struct.Cyc_Absyn_Exp** %5
store i32 %2, i32* %6
%8 = load %struct.Cyc_Absyn_Exp*, %struct.Cyc_Absyn_Exp** %4
%9 = load %struct.Cyc_Absyn_Exp*, %struct.Cyc_Absyn_Exp** %5
%10 = load i32, i32* %6
%11 = call %struct.Cyc_Absyn_Exp* @Cyc_Absyn_prim2_exp(i32 10, %struct.Cyc_Absyn_Exp* %8, %struct.Cyc_Absyn_Exp* %9, i32 %10)
store %struct.Cyc_Absyn_Exp* %11, %struct.Cyc_Absyn_Exp** %7
%12 = load %struct.Cyc_Absyn_Exp*, %struct.Cyc_Absyn_Exp** %7
ret %struct.Cyc_Absyn_Exp* %12
}

LLVM IR (-O2):
%struct.Cyc_Absyn_Exp = type { i32 }
define %struct.Cyc_Absyn_Exp* @Cyc_Absyn_lte_exp(%struct.Cyc_Absyn_Exp* %0, %struct.Cyc_Absyn_Exp* %1, i32 %2) {
%4 = tail call %struct.Cyc_Absyn_Exp* @Cyc_Absyn_prim2_exp(i32 10, %struct.Cyc_Absyn_Exp* %0, %struct.Cyc_Absyn_Exp* %1, i32 %2)
ret %struct.Cyc_Absyn_Exp* %4
}
void remap_numa_kva(void) {}


x86 assembly (clang, -O0):
<remap_numa_kva>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remap_numa_kva>:
ret

LLVM IR (-O0):
define void @remap_numa_kva() {
ret void
}

LLVM IR (-O2):
define void @remap_numa_kva() {
ret void
}
unsigned char int_ycb_to_b(unsigned char y, unsigned char cb) {
  int _y = y;
  int _cb = cb - 128;
  int b;
  b = (_y << 5) + 57 * _cb;
  if (b <= 0)
    b = 0;
  else if (b >= 32 * 255)
    b = 255;
  else
    b = b >> 5;
  return (unsigned char)b;
}


x86 assembly (clang, -O0):
<int_ycb_to_b>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x1(%rbp),%eax
mov    %eax,-0x8(%rbp)
movzbl -0x2(%rbp),%eax
sub    $0x80,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x5,%eax
imul   $0x39,-0xc(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jg     1148 <int_ycb_to_b+0x48>
movl   $0x0,-0x10(%rbp)
jmp    116f <int_ycb_to_b+0x6f>
cmpl   $0x1fe0,-0x10(%rbp)
jl     1161 <int_ycb_to_b+0x61>
movl   $0xff,-0x10(%rbp)
jmp    116a <int_ycb_to_b+0x6a>
mov    -0x10(%rbp),%eax
sar    $0x5,%eax
mov    %eax,-0x10(%rbp)
jmp    116f <int_ycb_to_b+0x6f>
mov    -0x10(%rbp),%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_ycb_to_b>:
shl    $0x5,%edi
imul   $0x39,%esi,%eax
lea    (%rdi,%rax,1),%ecx
add    $0xffffe380,%ecx
test   %ecx,%ecx
jle    1123 <int_ycb_to_b+0x23>
mov    $0xff,%al
cmp    $0x1fdf,%ecx
ja     1122 <int_ycb_to_b+0x22>
shr    $0x5,%ecx
mov    %ecx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i8 @int_ycb_to_b(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
store i32 %9, i32* %5
%10 = load i8, i8* %4
%11 = zext i8 %10 to i32
%12 = sub nsw i32 %11, 128
store i32 %12, i32* %6
%13 = load i32, i32* %5
%14 = shl i32 %13, 5
%15 = load i32, i32* %6
%16 = mul nsw i32 57, %15
%17 = add nsw i32 %14, %16
store i32 %17, i32* %7
%18 = load i32, i32* %7
%19 = icmp sle i32 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %2
store i32 0, i32* %7
br label %29
21: ; preds = %2
%22 = load i32, i32* %7
%23 = icmp sge i32 %22, 8160
br i1 %23, label %24, label %25
24: ; preds = %21
store i32 255, i32* %7
br label %28
25: ; preds = %21
%26 = load i32, i32* %7
%27 = ashr i32 %26, 5
store i32 %27, i32* %7
br label %28
28: ; preds = %25, %24
br label %29
29: ; preds = %28, %20
%30 = load i32, i32* %7
%31 = trunc i32 %30 to i8
ret i8 %31
}

LLVM IR (-O2):
define zeroext i8 @int_ycb_to_b(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = zext i8 %1 to i32
%5 = shl nuw nsw i32 %3, 5
%6 = mul nuw nsw i32 %4, 57
%7 = add nsw i32 %5, -7296
%8 = add nsw i32 %7, %6
%9 = icmp slt i32 %8, 1
br i1 %9, label %15, label %10
10: ; preds = %2
%11 = icmp ugt i32 %8, 8159
br i1 %11, label %15, label %12
12: ; preds = %10
%13 = lshr i32 %8, 5
%14 = trunc i32 %13 to i8
br label %15
15: ; preds = %10, %2, %12
%16 = phi i8 [ %14, %12 ], [ 0, %2 ], [ -1, %10 ]
ret i8 %16
}
/* Type definitions */
struct net_device {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ LOG_MSG(char *);
int rtl8169_open(struct net_device *dev) {
  LOG_MSG("rtl8169_open is called\n");
  return 0;
}


x86 assembly (clang, -O0):
<rtl8169_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <LOG_MSG@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtl8169_open>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <LOG_MSG@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.net_device = type { i32 }
@.str = [24 x i8] c"rtl8169_open is called\0A\00"
define i32 @rtl8169_open(%struct.net_device* %0) {
%2 = alloca %struct.net_device*
store %struct.net_device* %0, %struct.net_device** %2
%3 = call i32 @LOG_MSG(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
%struct.net_device = type { i32 }
@.str = [24 x i8] c"rtl8169_open is called\0A\00"
define i32 @rtl8169_open(%struct.net_device* nocapture readnone %0) {
%2 = tail call i32 @LOG_MSG(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __free_cf(void *);
void CGBitmapContextRelease(void *item) { __free_cf(item); }


x86 assembly (clang, -O0):
<CGBitmapContextRelease>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__free_cf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CGBitmapContextRelease>:
jmp    1030 <__free_cf@plt>

LLVM IR (-O0):
define void @CGBitmapContextRelease(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @__free_cf(i8* %3)
ret void
}

LLVM IR (-O2):
define void @CGBitmapContextRelease(i8* %0) {
%2 = tail call i32 @__free_cf(i8* %0)
ret void
}
/* Variables and functions */
__attribute__((always_)) size_t round_up_allocation(size_t num_bytes) {
  return ((num_bytes + 7) >> 3) << 3;
}


x86 assembly (clang, -O0):
<round_up_allocation>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x7,%rax
shr    $0x3,%rax
shl    $0x3,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_up_allocation>:
lea    0x7(%rdi),%rax
and    $0xfffffffffffffff8,%rax
ret

LLVM IR (-O0):
define i64 @round_up_allocation(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 7
%5 = lshr i64 %4, 3
%6 = shl i64 %5, 3
ret i64 %6
}

LLVM IR (-O2):
define i64 @round_up_allocation(i64 %0) {
%2 = add i64 %0, 7
%3 = and i64 %2, -8
ret i64 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ dev_t;

/* Variables and functions */
int /*<<< orphan*/ O_RDWR;
int /*<<< orphan*/ S_IFCHR;
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ makedev(int, int);
int /*<<< orphan*/ mknod(char *, int /*<<< orphan*/, int /*<<< orphan*/);
int open(char *, int /*<<< orphan*/);
int main(int argc, char **argv) {
  dev_t dev = makedev(500, 127);
  mknod("/dev/kyouko3", S_IFCHR, dev);
  int fd = open("/dev/kyouko3", O_RDWR);
  close(fd);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1f4,%edi
mov    $0x7f,%esi
call   1060 <makedev@plt>
mov    %eax,-0x14(%rbp)
mov    0x2e69(%rip),%rax
mov    (%rax),%esi
mov    -0x14(%rbp),%edx
lea    0xe85(%rip),%rdi
call   1040 <mknod@plt>
mov    0x2e61(%rip),%rax
mov    (%rax),%esi
lea    0xe70(%rip),%rdi
call   1050 <open@plt>
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%edi
call   1030 <close@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x1f4,%edi
mov    $0x7f,%esi
call   1060 <makedev@plt>
mov    0x2e81(%rip),%rcx
mov    (%rcx),%esi
lea    0xea0(%rip),%rbx
mov    %rbx,%rdi
mov    %eax,%edx
call   1040 <mknod@plt>
mov    0x2e77(%rip),%rax
mov    (%rax),%esi
mov    %rbx,%rdi
call   1050 <open@plt>
mov    %eax,%edi
call   1030 <close@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"/dev/kyouko3\00"
@S_IFCHR = global i32 0
@O_RDWR = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = call i32 @makedev(i32 500, i32 127)
store i32 %8, i32* %6
%9 = load i32, i32* @S_IFCHR
%10 = load i32, i32* %6
%11 = call i32 @mknod(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %9, i32 %10)
%12 = load i32, i32* @O_RDWR
%13 = call i32 @open(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %12)
store i32 %13, i32* %7
%14 = load i32, i32* %7
%15 = call i32 @close(i32 %14)
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"/dev/kyouko3\00"
@S_IFCHR = global i32 0
@O_RDWR = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @makedev(i32 500, i32 127)
%4 = load i32, i32* @S_IFCHR
%5 = tail call i32 @mknod(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %3)
%6 = load i32, i32* @O_RDWR
%7 = tail call i32 @open(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = tail call i32 @close(i32 %7)
ret i32 0
}
/* Variables and functions */
scalar_t__ match_num(char);
int m_break_num(char a) {
  int i = 0;
  if (match_num(a) != 0)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<m_break_num>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movl   $0x0,-0xc(%rbp)
movsbl -0x5(%rbp),%edi
call   1030 <match_num@plt>
cmp    $0x0,%rax
je     1144 <m_break_num+0x34>
movl   $0x0,-0x4(%rbp)
jmp    114b <m_break_num+0x3b>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m_break_num>:
push   %rax
call   1030 <match_num@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @m_break_num(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 0, i32* %4
%5 = load i8, i8* %3
%6 = call i64 @match_num(i8 signext %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %10
9: ; preds = %1
store i32 1, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @m_break_num(i8 signext %0) {
%2 = tail call i64 @match_num(i8 signext %0)
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}