xunge/DecIR huggingface dataset:
int ebob_bul(int buyuk_sayi, int kucuk_sayi) {
  if (kucuk_sayi == 0) {
    return buyuk_sayi;
  } else {
    return ebob_bul(kucuk_sayi, buyuk_sayi % kucuk_sayi);
  }
}


x86 assembly (clang, -O0):
<ebob_bul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1133 <ebob_bul+0x23>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1147 <ebob_bul+0x37>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%esi
call   1030 <ebob_bul@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ebob_bul>:
mov    %edi,%eax
test   %esi,%esi
je     111d <ebob_bul+0x1d>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <ebob_bul+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ebob_bul(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %4
store i32 %9, i32* %3
br label %16
10: ; preds = %2
%11 = load i32, i32* %5
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = srem i32 %12, %13
%15 = call i32 @ebob_bul(i32 %11, i32 %14)
store i32 %15, i32* %3
br label %16
16: ; preds = %10, %8
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @ebob_bul(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = phi i32 [ %5, %4 ], [ %0, %2 ]
%7 = srem i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %5, %4 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ impl();
int main() {
  impl();
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <impl@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <impl@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @impl()
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @impl()
ret i32 1
}
regx0adrx1(r0, r1, x0, x1, p0, p1) unsigned int r0, r1;
unsigned int *p0, *p1;
{
  if ((p0[x0]) <= (((unsigned int *)11111111)[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<regx0adrx1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x20(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
movslq -0x14(%rbp),%rdx
mov    $0xa98ac7,%ecx
cmp    (%rcx,%rdx,4),%eax
ja     1141 <regx0adrx1+0x41>
movl   $0x1,-0x4(%rbp)
jmp    1148 <regx0adrx1+0x48>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<regx0adrx1>:
movslq %edx,%rax
mov    (%r8,%rax,4),%edx
movslq %ecx,%rcx
xor    %eax,%eax
cmp    0xa98ac7(,%rcx,4),%edx
setbe  %al
ret

LLVM IR (-O0):
define i32 @regx0adrx1(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32*, i32** %12
%15 = load i32, i32* %10
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %11
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* inttoptr (i64 11111111 to i32*), i64 %20
%22 = load i32, i32* %21
%23 = icmp ule i32 %18, %22
br i1 %23, label %24, label %25
24: ; preds = %6
store i32 1, i32* %7
br label %26
25: ; preds = %6
store i32 0, i32* %7
br label %26
26: ; preds = %25, %24
%27 = load i32, i32* %7
ret i32 %27
}

LLVM IR (-O2):
define i32 @regx0adrx1(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture %4, i32* nocapture readnone %5) {
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %4, i64 %7
%9 = load i32, i32* %8
%10 = sext i32 %3 to i64
%11 = getelementptr inbounds i32, i32* inttoptr (i64 11111111 to i32*), i64 %10
%12 = load i32, i32* %11
%13 = icmp ule i32 %9, %12
%14 = zext i1 %13 to i32
ret i32 %14
}
/* Variables and functions */
char *mktemp(char *);
int /*<<< orphan*/ mpkg_copy(char const *, char *);
void mpkg_copy_tmp(char *dst, const char *src) {
  dst = mktemp(dst);
  mpkg_copy(src, dst);
}


x86 assembly (clang, -O0):
<mpkg_copy_tmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <mktemp@plt>
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <mpkg_copy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpkg_copy_tmp>:
push   %rbx
mov    %rsi,%rbx
call   1040 <mktemp@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
pop    %rbx
jmp    1030 <mpkg_copy@plt>

LLVM IR (-O0):
define void @mpkg_copy_tmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i8* @mktemp(i8* %5)
store i8* %6, i8** %3
%7 = load i8*, i8** %4
%8 = load i8*, i8** %3
%9 = call i32 @mpkg_copy(i8* %7, i8* %8)
ret void
}

LLVM IR (-O2):
define void @mpkg_copy_tmp(i8* %0, i8* %1) {
%3 = tail call i8* @mktemp(i8* %0)
%4 = tail call i32 @mpkg_copy(i8* %1, i8* %3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
scalar_t__ fopen(char *, char *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, float);
int main(void) {
  FILE *file;
  file = (FILE *)fopen("test.txt", "w+");
  fprintf(file, "%f\n", 2.567f);
  fclose(file);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xebe(%rip),%rdi
lea    0xec0(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xeaf(%rip),%rsi
movss  0xe97(%rip),%xmm0
call   1040 <fprintf@plt>
mov    -0x10(%rbp),%rdi
call   1030 <fclose@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xecc(%rip),%rdi
lea    0xece(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,%rbx
lea    0xec2(%rip),%rsi
movss  0xeaa(%rip),%xmm0
mov    %rax,%rdi
call   1040 <fprintf@plt>
mov    %rbx,%rdi
call   1030 <fclose@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"test.txt\00"
@.str.1 = [3 x i8] c"w+\00"
@.str.2 = [4 x i8] c"%f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32 0, i32* %1
%3 = call i64 @fopen(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%4 = inttoptr i64 %3 to i32*
store i32* %4, i32** %2
%5 = load i32*, i32** %2
%6 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), float 0x4004893740000000)
%7 = load i32*, i32** %2
%8 = call i32 @fclose(i32* %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"test.txt\00"
@.str.1 = [3 x i8] c"w+\00"
@.str.2 = [4 x i8] c"%f\0A\00"
define i32 @main() {
%1 = tail call i64 @fopen(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%2 = inttoptr i64 %1 to i32*
%3 = tail call i32 @fprintf(i32* %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), float 0x4004893740000000)
%4 = tail call i32 @fclose(i32* %2)
ret i32 0
}
/* Variables and functions */
int BIT(int);
unsigned mcuio_devs_per_bus(void) { return BIT(4); }


x86 assembly (clang, -O0):
<mcuio_devs_per_bus>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
call   1030 <BIT@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mcuio_devs_per_bus>:
mov    $0x4,%edi
jmp    1030 <BIT@plt>

LLVM IR (-O0):
define i32 @mcuio_devs_per_bus() {
%1 = call i32 @BIT(i32 4)
ret i32 %1
}

LLVM IR (-O2):
define i32 @mcuio_devs_per_bus() {
%1 = tail call i32 @BIT(i32 4)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, void *, void *);
void process_pointer(void **Root, void *Meta) {
  printf("process_root[0x%p] = 0x%p\n", (void *)Root, (void *)*Root);
}


x86 assembly (clang, -O0):
<process_pointer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<process_pointer>:
mov    %rdi,%rsi
mov    (%rdi),%rdx
lea    0xee3(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"process_root[0x%p] = 0x%p\0A\00"
define void @process_pointer(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
store i8** %0, i8*** %3
store i8* %1, i8** %4
%5 = load i8**, i8*** %3
%6 = bitcast i8** %5 to i8*
%7 = load i8**, i8*** %3
%8 = load i8*, i8** %7
%9 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %6, i8* %8)
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"process_root[0x%p] = 0x%p\0A\00"
define void @process_pointer(i8** %0, i8* nocapture readnone %1) {
%3 = bitcast i8** %0 to i8*
%4 = load i8*, i8** %0
%5 = tail call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %3, i8* %4)
ret void
}
void test2_TT_targetInit__I() {}


x86 assembly (clang, -O0):
<test2_TT_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test2_TT_targetInit__I>:
ret

LLVM IR (-O0):
define void @test2_TT_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test2_TT_targetInit__I() {
ret void
}
int nw(char c) {
  if (c < 0x30 || (c > 0x39 && c < 0x41) || (c > 0x5a && c < 0x5f) ||
      c == 0x60 || c > 0x7a) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<nw>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1165 <nw+0x65>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jle    1131 <nw+0x31>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     1165 <nw+0x65>
movsbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jle    114b <nw+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x5f,%eax
jl     1165 <nw+0x65>
movsbl -0x5(%rbp),%eax
cmp    $0x60,%eax
je     1165 <nw+0x65>
movsbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
jle    1171 <nw+0x71>
movl   $0x1,-0x4(%rbp)
jmp    1178 <nw+0x78>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nw>:
mov    $0x1,%eax
cmp    $0x30,%dil
jl     1131 <nw+0x31>
lea    -0x3a(%rdi),%ecx
cmp    $0x7,%cl
jb     1131 <nw+0x31>
add    $0xa5,%dil
cmp    $0x24,%dil
ja     1132 <nw+0x32>
movzbl %dil,%ecx
movabs $0x1f0000002f,%rdx
bt     %rcx,%rdx
jae    1132 <nw+0x32>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nw(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp slt i32 %5, 48
br i1 %6, label %31, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sgt i32 %9, 57
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp slt i32 %13, 65
br i1 %14, label %31, label %15
15: ; preds = %11, %7
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp sgt i32 %17, 90
br i1 %18, label %19, label %23
19: ; preds = %15
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp slt i32 %21, 95
br i1 %22, label %31, label %23
23: ; preds = %19, %15
%24 = load i8, i8* %3
%25 = sext i8 %24 to i32
%26 = icmp eq i32 %25, 96
br i1 %26, label %31, label %27
27: ; preds = %23
%28 = load i8, i8* %3
%29 = sext i8 %28 to i32
%30 = icmp sgt i32 %29, 122
br i1 %30, label %31, label %32
31: ; preds = %27, %23, %19, %11, %1
store i32 1, i32* %2
br label %33
32: ; preds = %27
store i32 0, i32* %2
br label %33
33: ; preds = %32, %31
%34 = load i32, i32* %2
ret i32 %34
}

LLVM IR (-O2):
define i32 @nw(i8 signext %0) {
%2 = icmp slt i8 %0, 48
%3 = add i8 %0, -58
%4 = icmp ult i8 %3, 7
%5 = or i1 %2, %4
br i1 %5, label %8, label %6
6: ; preds = %1
switch i8 %0, label %7 [
i8 127, label %8
i8 126, label %8
i8 125, label %8
i8 124, label %8
i8 123, label %8
i8 96, label %8
i8 94, label %8
i8 93, label %8
i8 92, label %8
i8 91, label %8
]
7: ; preds = %6
br label %8
8: ; preds = %1, %6, %6, %6, %6, %6, %6, %6, %6, %6, %6, %7
%9 = phi i32 [ 0, %7 ], [ 1, %6 ], [ 1, %6 ], [ 1, %6 ], [ 1, %6 ], [ 1, %6 ], [ 1, %6 ], [ 1, %6 ], [ 1, %6 ], [ 1, %6 ], [ 1, %6 ], [ 1, %1 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M38_f(char *s) {
  debug("M38_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M38_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xef9(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M38_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf05(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [46 x i8] c"M38_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M38_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [46 x i8] c"M38_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M38_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;

/* Variables and functions */
int _ttime_century(char **p, time_t *time) { return 1; }


x86 assembly (clang, -O0):
<_ttime_century>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ttime_century>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @_ttime_century(i8** %0, i32* %1) {
%3 = alloca i8**
%4 = alloca i32*
store i8** %0, i8*** %3
store i32* %1, i32** %4
ret i32 1
}

LLVM IR (-O2):
define i32 @_ttime_century(i8** nocapture readnone %0, i32* nocapture readnone %1) {
ret i32 1
}
/* Variables and functions */
scalar_t__ ft_strncmp(char const *, char const *, size_t);
int ft_strnequ(char const *s1, char const *s2, size_t n) {
  if (s1 == NULL || s2 == NULL)
    return (0);
  if (ft_strncmp(s1, s2, n) == 0)
    return (1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<ft_strnequ>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     113a <ft_strnequ+0x2a>
cmpq   $0x0,-0x18(%rbp)
jne    1146 <ft_strnequ+0x36>
movl   $0x0,-0x4(%rbp)
jmp    1174 <ft_strnequ+0x64>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <ft_strncmp@plt>
cmp    $0x0,%rax
jne    116d <ft_strnequ+0x5d>
movl   $0x1,-0x4(%rbp)
jmp    1174 <ft_strnequ+0x64>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strnequ>:
xor    %eax,%eax
test   %rdi,%rdi
je     1131 <ft_strnequ+0x21>
test   %rsi,%rsi
je     1131 <ft_strnequ+0x21>
push   %rax
call   1030 <ft_strncmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @ft_strnequ(i8* %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
%8 = load i8*, i8** %5
%9 = icmp eq i8* %8, null
br i1 %9, label %13, label %10
10: ; preds = %3
%11 = load i8*, i8** %6
%12 = icmp eq i8* %11, null
br i1 %12, label %13, label %14
13: ; preds = %10, %3
store i32 0, i32* %4
br label %22
14: ; preds = %10
%15 = load i8*, i8** %5
%16 = load i8*, i8** %6
%17 = load i64, i64* %7
%18 = call i64 @ft_strncmp(i8* %15, i8* %16, i64 %17)
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %14
store i32 1, i32* %4
br label %22
21: ; preds = %14
store i32 0, i32* %4
br label %22
22: ; preds = %21, %20, %13
%23 = load i32, i32* %4
ret i32 %23
}

LLVM IR (-O2):
define i32 @ft_strnequ(i8* %0, i8* %1, i64 %2) {
%4 = icmp eq i8* %0, null
%5 = icmp eq i8* %1, null
%6 = or i1 %4, %5
br i1 %6, label %11, label %7
7: ; preds = %3
%8 = tail call i64 @ft_strncmp(i8* %0, i8* %1, i64 %2)
%9 = icmp eq i64 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %7, %3
%12 = phi i32 [ 0, %3 ], [ %10, %7 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ shell();
int main(void) {
  while (1) {
    shell();
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <shell@plt>
jmp    111f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <shell@plt>
jmp    1120 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0, %2
%3 = call i32 (...) @shell()
br label %2
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 (...) @shell()
br label %1
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t mp2vseqx_get_profilelevel(const uint8_t *p_mp2vseqx) {
  return ((p_mp2vseqx[4] & 0x0f) << 4) | (p_mp2vseqx[5] >> 4);
}


x86 assembly (clang, -O0):
<mp2vseqx_get_profilelevel>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%eax
and    $0xf,%eax
shl    $0x4,%eax
mov    -0x8(%rbp),%rcx
mov    0x14(%rcx),%ecx
sar    $0x4,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp2vseqx_get_profilelevel>:
mov    0x10(%rdi),%ecx
mov    0x14(%rdi),%eax
shl    $0x4,%ecx
movzbl %cl,%ecx
sar    $0x4,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @mp2vseqx_get_profilelevel(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 4
%5 = load i32, i32* %4
%6 = and i32 %5, 15
%7 = shl i32 %6, 4
%8 = load i32*, i32** %2
%9 = getelementptr inbounds i32, i32* %8, i64 5
%10 = load i32, i32* %9
%11 = ashr i32 %10, 4
%12 = or i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @mp2vseqx_get_profilelevel(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 4
%3 = load i32, i32* %2
%4 = shl i32 %3, 4
%5 = and i32 %4, 240
%6 = getelementptr inbounds i32, i32* %0, i64 5
%7 = load i32, i32* %6
%8 = ashr i32 %7, 4
%9 = or i32 %5, %8
ret i32 %9
}
void ff_hevc_put_hevc_pel_pixels12_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_pel_pixels12_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_pel_pixels12_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_pel_pixels12_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_pel_pixels12_10_sse4() {
ret void
}
/* Type definitions */
typedef int u_int32_t;

/* Variables and functions */
int hash(void *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
u_int32_t hashkey(char *key) {
  if (key == NULL)
    return (-1);
  return (hash((void *)key, strlen(key)) & 0x000000FF);
}


x86 assembly (clang, -O0):
<hashkey>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1143 <hashkey+0x23>
movl   $0xffffffff,-0x4(%rbp)
jmp    1167 <hashkey+0x47>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
call   1040 <hash@plt>
and    $0xff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashkey>:
test   %rdi,%rdi
je     113d <hashkey+0x1d>
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1040 <hash@plt>
movzbl %al,%eax
pop    %rbx
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @hashkey(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 -1, i32* %2
br label %13
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = load i8*, i8** %3
%10 = call i32 @strlen(i8* %9)
%11 = call i32 @hash(i8* %8, i32 %10)
%12 = and i32 %11, 255
store i32 %12, i32* %2
br label %13
13: ; preds = %7, %6
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @hashkey(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i32 @strlen(i8* %0)
%5 = tail call i32 @hash(i8* %0, i32 %4)
%6 = and i32 %5, 255
br label %7
7: ; preds = %1, %3
%8 = phi i32 [ %6, %3 ], [ -1, %1 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int, char const *);
int /*<<< orphan*/ stderr;
void error(const char *msg, int line) {
  fprintf(stderr, "ERROR [line: %d] %s\n", line, msg);
  exit(-1);
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%rcx
lea    0xeba(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<error>:
push   %rax
mov    %esi,%edx
mov    %rdi,%rcx
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
lea    0xeca(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [21 x i8] c"ERROR [line: %d] %s\0A\00"
define void @error(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = load i32, i32* %4
%7 = load i8*, i8** %3
%8 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %6, i8* %7)
%9 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [21 x i8] c"ERROR [line: %d] %s\0A\00"
define void @error(i8* %0, i32 %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %1, i8* %0)
%5 = tail call i32 @exit(i32 -1)
unreachable
}
int test_imm_CFuint64_lowword_reg(unsigned long long val) {
  return ((val) & (0xCF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CFuint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xcf,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CFuint64_lowword_reg>:
test   $0xcf,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CFuint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 207
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_CFuint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 207
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int rand();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
void aleatorio(int *vector, int N) {
  int i;
  srand(time(NULL));
  for (i = 0; i < N; i++) {
    *(vector + i) = rand() % 3;
  }
}


x86 assembly (clang, -O0):
<aleatorio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    118a <aleatorio+0x5a>
mov    $0x0,%al
call   1050 <rand@plt>
mov    $0x3,%ecx
cltd
idiv   %ecx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1156 <aleatorio+0x26>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aleatorio>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebp
mov    %rdi,%r14
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
test   %ebp,%ebp
jle    117f <aleatorio+0x4f>
mov    %ebp,%ebp
xor    %ebx,%ebx
nop
xor    %eax,%eax
call   1050 <rand@plt>
cltq
imul   $0x55555556,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,2),%ecx
sub    %ecx,%eax
mov    %eax,(%r14,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%rbp
jne    1150 <aleatorio+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @aleatorio(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = call i32 @time(i32* null)
%7 = call i32 @srand(i32 %6)
store i32 0, i32* %5
br label %8
8: ; preds = %19, %2
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %22
12: ; preds = %8
%13 = call i32 (...) @rand()
%14 = srem i32 %13, 3
%15 = load i32*, i32** %3
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %15, i64 %17
store i32 %14, i32* %18
br label %19
19: ; preds = %12
%20 = load i32, i32* %5
%21 = add nsw i32 %20, 1
store i32 %21, i32* %5
br label %8
22: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @aleatorio(i32* nocapture writeonly %0, i32 %1) {
%3 = tail call i32 @time(i32* null)
%4 = tail call i32 @srand(i32 %3)
%5 = icmp sgt i32 %1, 0
br i1 %5, label %6, label %15
6: ; preds = %2
%7 = zext i32 %1 to i64
br label %8
8: ; preds = %6, %8
%9 = phi i64 [ 0, %6 ], [ %13, %8 ]
%10 = tail call i32 (...) @rand()
%11 = srem i32 %10, 3
%12 = getelementptr inbounds i32, i32* %0, i64 %9
store i32 %11, i32* %12
%13 = add nuw nsw i64 %9, 1
%14 = icmp eq i64 %13, %7
br i1 %14, label %15, label %8
15: ; preds = %8, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ etp_set_max_idle(unsigned int);
void eio_set_max_idle(unsigned int nthreads) { etp_set_max_idle(nthreads); }


x86 assembly (clang, -O0):
<eio_set_max_idle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <etp_set_max_idle@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eio_set_max_idle>:
jmp    1030 <etp_set_max_idle@plt>

LLVM IR (-O0):
define void @eio_set_max_idle(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @etp_set_max_idle(i32 %3)
ret void
}

LLVM IR (-O2):
define void @eio_set_max_idle(i32 %0) {
%2 = tail call i32 @etp_set_max_idle(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int bench_usage() {
  fprintf(stderr, "no options\n");
  ;
}


x86 assembly (clang, -O0):
<bench_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec1(%rip),%rax
mov    (%rax),%edi
lea    0xed8(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bench_usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [12 x i8] c"no options\0A\00"
define i32 @bench_usage() {
%1 = alloca i32
%2 = load i32, i32* @stderr
%3 = call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [12 x i8] c"no options\0A\00"
define i32 @bench_usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int de_register_generic_scalers();
int scale_machine_specific_de_config() { return de_register_generic_scalers(); }


x86 assembly (clang, -O0):
<scale_machine_specific_de_config>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <de_register_generic_scalers@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<scale_machine_specific_de_config>:
xor    %eax,%eax
jmp    1030 <de_register_generic_scalers@plt>

LLVM IR (-O0):
define i32 @scale_machine_specific_de_config() {
%1 = call i32 (...) @de_register_generic_scalers()
ret i32 %1
}

LLVM IR (-O2):
define i32 @scale_machine_specific_de_config() {
%1 = tail call i32 (...) @de_register_generic_scalers()
ret i32 %1
}
long loop2(long x, int n) {
  long result = 0;
  long mask;
  for (mask = 1; mask != 0; mask <<= n) {
    result |= (x & mask);
  }
  return result;
}


x86 assembly (clang, -O0):
<loop2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movq   $0x0,-0x18(%rbp)
movq   $0x1,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     114b <loop2+0x4b>
mov    -0x8(%rbp),%rax
and    -0x20(%rbp),%rax
or     -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,%ecx
shl    %cl,%rax
mov    %rax,-0x20(%rbp)
jmp    111b <loop2+0x1b>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<loop2>:
mov    %esi,%ecx
mov    $0x1,%edx
xor    %eax,%eax
nopl   0x0(%rax)
mov    %rdx,%rsi
and    %rdi,%rsi
or     %rsi,%rax
shl    %cl,%rdx
test   %rdx,%rdx
jne    1110 <loop2+0x10>
ret

LLVM IR (-O0):
define i64 @loop2(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %3
store i32 %1, i32* %4
store i64 0, i64* %5
store i64 1, i64* %6
br label %7
7: ; preds = %16, %2
%8 = load i64, i64* %6
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %21
10: ; preds = %7
%11 = load i64, i64* %3
%12 = load i64, i64* %6
%13 = and i64 %11, %12
%14 = load i64, i64* %5
%15 = or i64 %14, %13
store i64 %15, i64* %5
br label %16
16: ; preds = %10
%17 = load i32, i32* %4
%18 = load i64, i64* %6
%19 = zext i32 %17 to i64
%20 = shl i64 %18, %19
store i64 %20, i64* %6
br label %7
21: ; preds = %7
%22 = load i64, i64* %5
ret i64 %22
}

LLVM IR (-O2):
define i64 @loop2(i64 %0, i32 %1) {
%3 = zext i32 %1 to i64
br label %4
4: ; preds = %2, %4
%5 = phi i64 [ 1, %2 ], [ %9, %4 ]
%6 = phi i64 [ 0, %2 ], [ %8, %4 ]
%7 = and i64 %5, %0
%8 = or i64 %7, %6
%9 = shl i64 %5, %3
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4
ret i64 %8
}
int bitcount(unsigned x) {
  int len = 0;
  for (; x; x &= x - 1) {
    len++;
  }
  return len;
}


x86 assembly (clang, -O0):
<bitcount>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1132 <bitcount+0x32>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
and    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    110e <bitcount+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitcount>:
xor    %eax,%eax
test   %edi,%edi
je     111c <bitcount+0x1c>
cs nopw 0x0(%rax,%rax,1)
add    $0x1,%eax
lea    -0x1(%rdi),%ecx
and    %edi,%ecx
mov    %ecx,%edi
jne    1110 <bitcount+0x10>
ret

LLVM IR (-O0):
define i32 @bitcount(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
br label %10
10: ; preds = %7
%11 = load i32, i32* %2
%12 = sub i32 %11, 1
%13 = load i32, i32* %2
%14 = and i32 %13, %12
store i32 %14, i32* %2
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @bitcount(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = add nuw nsw i32 %4, 1
%7 = add i32 %5, -1
%8 = and i32 %7, %5
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %11
}
double frexp(double x, int *exponent) {
  if (x != 0) {
    exponent = 1 / 2;
    return x * x;
  }
  exponent = 0;
  return 0;
}


x86 assembly (clang, -O0):
<frexp>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    112a <frexp+0x2a>
jp     112a <frexp+0x2a>
jmp    1146 <frexp+0x46>
movq   $0x0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1156 <frexp+0x56>
movq   $0x0,-0x18(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<frexp>:
movapd %xmm0,%xmm1
mulsd  %xmm0,%xmm1
xorpd  %xmm2,%xmm2
cmpneqsd %xmm2,%xmm0
andpd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @frexp(double %0, i32* %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca i32*
store double %0, double* %4
store i32* %1, i32** %5
%6 = load double, double* %4
%7 = fcmp une double %6, 0.000000e+00
br i1 %7, label %8, label %12
8: ; preds = %2
store i32* null, i32** %5
%9 = load double, double* %4
%10 = load double, double* %4
%11 = fmul double %9, %10
store double %11, double* %3
br label %13
12: ; preds = %2
store i32* null, i32** %5
store double 0.000000e+00, double* %3
br label %13
13: ; preds = %12, %8
%14 = load double, double* %3
ret double %14
}

LLVM IR (-O2):
define double @frexp(double %0, i32* nocapture readnone %1) {
%3 = fcmp une double %0, 0.000000e+00
%4 = fmul double %0, %0
%5 = select i1 %3, double %4, double 0.000000e+00
ret double %5
}
void sna_vertex_lock(struct sna_render *r) {}


x86 assembly (clang, -O0):
<sna_vertex_lock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sna_vertex_lock>:
ret

LLVM IR (-O0):
%struct.sna_render = type opaque
define void @sna_vertex_lock(%struct.sna_render* %0) {
%2 = alloca %struct.sna_render*
store %struct.sna_render* %0, %struct.sna_render** %2
ret void
}

LLVM IR (-O2):
%struct.sna_render = type opaque
define void @sna_vertex_lock(%struct.sna_render* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ count_characters(char, char *);
char *piece(char *, char, char *, int /*<<< orphan*/);
char *piece_last(char *destination, char delimiter, char *source) {
  return piece(destination, delimiter, source,
               count_characters(delimiter, source));
}


x86 assembly (clang, -O0):
<piece_last>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x9(%rbp),%al
mov    %al,-0x19(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x9(%rbp),%al
mov    -0x18(%rbp),%rsi
movsbl %al,%edi
call   1040 <count_characters@plt>
mov    -0x30(%rbp),%rdi
mov    -0x28(%rbp),%rdx
mov    %eax,%ecx
mov    -0x19(%rbp),%al
movsbl %al,%esi
call   1030 <piece@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<piece_last>:
push   %rbp
push   %r14
push   %rbx
mov    %rdx,%rbx
mov    %esi,%ebp
mov    %rdi,%r14
mov    %esi,%edi
mov    %rdx,%rsi
call   1040 <count_characters@plt>
mov    %r14,%rdi
mov    %ebp,%esi
mov    %rbx,%rdx
mov    %eax,%ecx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <piece@plt>

LLVM IR (-O0):
define i8* @piece_last(i8* %0, i8 signext %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8*
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8, i8* %5
%9 = load i8*, i8** %6
%10 = load i8, i8* %5
%11 = load i8*, i8** %6
%12 = call i32 @count_characters(i8 signext %10, i8* %11)
%13 = call i8* @piece(i8* %7, i8 signext %8, i8* %9, i32 %12)
ret i8* %13
}

LLVM IR (-O2):
define i8* @piece_last(i8* %0, i8 signext %1, i8* %2) {
%4 = tail call i32 @count_characters(i8 signext %1, i8* %2)
%5 = tail call i8* @piece(i8* %0, i8 signext %1, i8* %2, i32 %4)
ret i8* %5
}
/* Variables and functions */
int string_hash(char *, int);
unsigned bighash(char *s) { return string_hash(s, 10001); }


x86 assembly (clang, -O0):
<bighash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2711,%esi
call   1030 <string_hash@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bighash>:
mov    $0x2711,%esi
jmp    1030 <string_hash@plt>

LLVM IR (-O0):
define i32 @bighash(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @string_hash(i8* %3, i32 10001)
ret i32 %4
}

LLVM IR (-O2):
define i32 @bighash(i8* %0) {
%2 = tail call i32 @string_hash(i8* %0, i32 10001)
ret i32 %2
}
const char *CFilterName(void *arg) { return "foo"; }


x86 assembly (clang, -O0):
<CFilterName>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    0xef1(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CFilterName>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"foo\00"
define i8* @CFilterName(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [4 x i8] c"foo\00"
define i8* @CFilterName(i8* nocapture readnone %0) {
ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
}
void gtk_drag_get_data() {}


x86 assembly (clang, -O0):
<gtk_drag_get_data>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_drag_get_data>:
ret

LLVM IR (-O0):
define void @gtk_drag_get_data() {
ret void
}

LLVM IR (-O2):
define void @gtk_drag_get_data() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pushmatrix();
void pushmatrix_() { pushmatrix(); }


x86 assembly (clang, -O0):
<pushmatrix_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <pushmatrix@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pushmatrix_>:
xor    %eax,%eax
jmp    1030 <pushmatrix@plt>

LLVM IR (-O0):
define void @pushmatrix_() {
%1 = call i32 (...) @pushmatrix()
ret void
}

LLVM IR (-O2):
define void @pushmatrix_() {
%1 = tail call i32 (...) @pushmatrix()
ret void
}
/* Variables and functions */
scalar_t__ __isnanf(float);
scalar_t__ islessequal(float, float);
float fminf(float _x, float _y) {
  return ((islessequal(_x, _y) || __isnanf(_y)) ? _x : _y);
}


x86 assembly (clang, -O0):
<fminf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <islessequal@plt>
cmp    $0x0,%rax
jne    115f <fminf+0x3f>
movss  -0x8(%rbp),%xmm0
call   1040 <__isnanf@plt>
cmp    $0x0,%rax
je     116e <fminf+0x4e>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    1178 <fminf+0x58>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fminf>:
push   %rax
movss  %xmm0,0x4(%rsp)
movss  %xmm1,(%rsp)
call   1030 <islessequal@plt>
test   %rax,%rax
je     113e <fminf+0x1e>
movss  0x4(%rsp),%xmm0
pop    %rax
ret
movss  (%rsp),%xmm0
call   1040 <__isnanf@plt>
test   %rax,%rax
je     1158 <fminf+0x38>
movss  0x4(%rsp),%xmm0
movss  %xmm0,(%rsp)
movss  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @fminf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call i64 @islessequal(float %5, float %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %2
%10 = load float, float* %4
%11 = call i64 @__isnanf(float %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %9, %2
%14 = load float, float* %3
br label %17
15: ; preds = %9
%16 = load float, float* %4
br label %17
17: ; preds = %15, %13
%18 = phi float [ %14, %13 ], [ %16, %15 ]
ret float %18
}

LLVM IR (-O2):
define float @fminf(float %0, float %1) {
%3 = tail call i64 @islessequal(float %0, float %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = tail call i64 @__isnanf(float %1)
%7 = icmp eq i64 %6, 0
%8 = select i1 %7, float %1, float %0
br label %9
9: ; preds = %5, %2
%10 = phi float [ %0, %2 ], [ %8, %5 ]
ret float %10
}
unsigned getval_462() { return 2428995904U; }


x86 assembly (clang, -O0):
<getval_462>:
push   %rbp
mov    %rsp,%rbp
mov    $0x90c78940,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getval_462>:
mov    $0x90c78940,%eax
ret

LLVM IR (-O0):
define i32 @getval_462() {
ret i32 -1865971392
}

LLVM IR (-O2):
define i32 @getval_462() {
ret i32 -1865971392
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
uint16_t btom_w(const uint16_t in) {
  return (in & 0xFF00 >> 8) + (in & 0x00FF << 8);
}


x86 assembly (clang, -O0):
<btom_w>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<btom_w>:
movzwl %di,%eax
ret

LLVM IR (-O0):
define i32 @btom_w(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
%5 = load i32, i32* %2
%6 = and i32 %5, 65280
%7 = add nsw i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @btom_w(i32 %0) {
%2 = and i32 %0, 65535
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ glMatrixMode(unsigned int);
void MatrixMode(unsigned int m) { glMatrixMode(m); }


x86 assembly (clang, -O0):
<MatrixMode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <glMatrixMode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MatrixMode>:
jmp    1030 <glMatrixMode@plt>

LLVM IR (-O0):
define void @MatrixMode(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @glMatrixMode(i32 %3)
ret void
}

LLVM IR (-O2):
define void @MatrixMode(i32 %0) {
%2 = tail call i32 @glMatrixMode(i32 %0)
ret void
}
/* Variables and functions */
int setfsgid(int);
int main(void) { return setfsgid(-1); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xffffffff,%edi
call   1030 <setfsgid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0xffffffff,%edi
jmp    1030 <setfsgid@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @setfsgid(i32 -1)
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @setfsgid(i32 -1)
ret i32 %1
}
/* Type definitions */
struct obj {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cintern(char *);
int /*<<< orphan*/ setvar(int /*<<< orphan*/, int /*<<< orphan*/, struct obj *);
void init_trace_version(void) {
  setvar(cintern("*trace-version*"),
         cintern("$Id: trace.c,v 1.4 2001/06/06 23:02:59 stephanr Exp $"),
         ((struct obj *)0));
}


x86 assembly (clang, -O0):
<init_trace_version>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1040 <cintern@plt>
mov    %eax,-0x4(%rbp)
lea    0xed2(%rip),%rdi
call   1040 <cintern@plt>
mov    -0x4(%rbp),%edi
mov    %eax,%esi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <setvar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_trace_version>:
push   %rbx
lea    0xed8(%rip),%rdi
call   1040 <cintern@plt>
mov    %eax,%ebx
lea    0xeda(%rip),%rdi
call   1040 <cintern@plt>
mov    %ebx,%edi
mov    %eax,%esi
xor    %edx,%edx
pop    %rbx
jmp    1030 <setvar@plt>

LLVM IR (-O0):
%struct.obj = type { i32 }
@.str = [16 x i8] c"*trace-version*\00"
@.str.1 = [54 x i8] c"$Id: trace.c,v 1.4 2001/06/06 23:02:59 stephanr Exp $\00"
define void @init_trace_version() {
%1 = call i32 @cintern(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @cintern(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @setvar(i32 %1, i32 %2, %struct.obj* null)
ret void
}

LLVM IR (-O2):
%struct.obj = type { i32 }
@.str = [16 x i8] c"*trace-version*\00"
@.str.1 = [54 x i8] c"$Id: trace.c,v 1.4 2001/06/06 23:02:59 stephanr Exp $\00"
define void @init_trace_version() {
%1 = tail call i32 @cintern(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @cintern(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @setvar(i32 %1, i32 %2, %struct.obj* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LNat_Print_Internal_Error(int);
void LNat_Print_Error(int error) { LNat_Print_Internal_Error(error); }


x86 assembly (clang, -O0):
<LNat_Print_Error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <LNat_Print_Internal_Error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LNat_Print_Error>:
jmp    1030 <LNat_Print_Internal_Error@plt>

LLVM IR (-O0):
define void @LNat_Print_Error(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @LNat_Print_Internal_Error(i32 %3)
ret void
}

LLVM IR (-O2):
define void @LNat_Print_Error(i32 %0) {
%2 = tail call i32 @LNat_Print_Internal_Error(i32 %0)
ret void
}
void iSeries_pci_final_fixup(void) {}


x86 assembly (clang, -O0):
<iSeries_pci_final_fixup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iSeries_pci_final_fixup>:
ret

LLVM IR (-O0):
define void @iSeries_pci_final_fixup() {
ret void
}

LLVM IR (-O2):
define void @iSeries_pci_final_fixup() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ refresh();
void display_refresh(void) { refresh(); }


x86 assembly (clang, -O0):
<display_refresh>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <refresh@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_refresh>:
xor    %eax,%eax
jmp    1030 <refresh@plt>

LLVM IR (-O0):
define void @display_refresh() {
%1 = call i32 (...) @refresh()
ret void
}

LLVM IR (-O2):
define void @display_refresh() {
%1 = tail call i32 (...) @refresh()
ret void
}
/* Variables and functions */
scalar_t__ floor(double);
int range2swst(double range, double pri) {
  return ((int)floor((2.0 * range / 299792456.0 + 6.6E-6 - 9.0 * pri) /
                     210.94e-09));
}


x86 assembly (clang, -O0):
<range2swst>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  0xef6(%rip),%xmm1
mulsd  -0x8(%rbp),%xmm1
movsd  0xee1(%rip),%xmm0
divsd  %xmm0,%xmm1
movsd  0xecd(%rip),%xmm0
addsd  %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
movsd  0xeb4(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xe9c(%rip),%xmm1
divsd  %xmm1,%xmm0
call   1030 <floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<range2swst>:
addsd  %xmm0,%xmm0
divsd  0xee4(%rip),%xmm0
addsd  0xee4(%rip),%xmm0
mulsd  0xee4(%rip),%xmm1
addsd  %xmm1,%xmm0
divsd  0xee0(%rip),%xmm0
jmp    1030 <floor@plt>

LLVM IR (-O0):
define i32 @range2swst(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = fmul double 2.000000e+00, %5
%7 = fdiv double %6, 0x41B1DE7848000000
%8 = fadd double %7, 6.600000e-06
%9 = load double, double* %4
%10 = call double @llvm.fmuladd.f64(double -9.000000e+00, double %9, double %8)
%11 = fdiv double %10, 2.109400e-07
%12 = call i64 @floor(double %11)
%13 = trunc i64 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @range2swst(double %0, double %1) {
%3 = fmul double %0, 2.000000e+00
%4 = fdiv double %3, 0x41B1DE7848000000
%5 = fadd double %4, 6.600000e-06
%6 = tail call double @llvm.fmuladd.f64(double %1, double -9.000000e+00, double %5)
%7 = fdiv double %6, 2.109400e-07
%8 = tail call i64 @floor(double %7)
%9 = trunc i64 %8 to i32
ret i32 %9
}