xunge/DecIR huggingface dataset:
ginc(lval) int lval[];
{
  if (lval[2] == (2 << 2))
    ol("addq.l\t&4,%d0");
  else
    ol("addq.l\t&1,%d0");
}


x86 assembly (clang, -O0):
<ginc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpl   $0x8,0x8(%rax)
jne    113d <ginc+0x2d>
lea    0xecf(%rip),%rdi
mov    $0x0,%al
call   1030 <ol@plt>
jmp    114b <ginc+0x3b>
lea    0xeca(%rip),%rdi
mov    $0x0,%al
call   1030 <ol@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ginc>:
cmpl   $0x8,0x8(%rdi)
lea    0xee5(%rip),%rax
lea    0xeec(%rip),%rdi
cmove  %rax,%rdi
xor    %eax,%eax
jmp    1030 <ol@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"addq.l\09&4,%d0\00"
@.str.1 = [14 x i8] c"addq.l\09&1,%d0\00"
define i32 @ginc(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = getelementptr inbounds i32, i32* %4, i64 2
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 8
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (i8*, ...) bitcast (i32 (...)* @ol to i32 (i8*, ...)*)(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %12
10: ; preds = %1
%11 = call i32 (i8*, ...) bitcast (i32 (...)* @ol to i32 (i8*, ...)*)(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
br label %12
12: ; preds = %10, %8
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@.str = [14 x i8] c"addq.l\09&4,%d0\00"
@.str.1 = [14 x i8] c"addq.l\09&1,%d0\00"
define i32 @ginc(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 8
%5 = select i1 %4, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0)
%6 = tail call i32 (i8*, ...) bitcast (i32 (...)* @ol to i32 (i8*, ...)*)(i8* %5)
ret i32 undef
}
/* Variables and functions */
int GL_COLOR_BUFFER_BIT;
int GL_DEPTH_BUFFER_BIT;
int /*<<< orphan*/ glClear(int);
int /*<<< orphan*/ glFlush();
int /*<<< orphan*/ glPopMatrix();
int /*<<< orphan*/ glPushMatrix();
int /*<<< orphan*/ glRotatef(double, double, double, double);
int /*<<< orphan*/ glutSolidTeapot(double);
void display(void) {
  glClear(GL_COLOR_BUFFER_BIT | GL_DEPTH_BUFFER_BIT);
  glPushMatrix();
  glRotatef(45.0, 0.0, 0.0, 1.0);
  glutSolidTeapot(2.0);
  glPopMatrix();
  glFlush();
}


x86 assembly (clang, -O0):
<display>:
push   %rbp
mov    %rsp,%rbp
mov    0x2e6d(%rip),%rax
mov    (%rax),%edi
mov    0x2e74(%rip),%rax
or     (%rax),%edi
call   1040 <glClear@plt>
mov    $0x0,%al
call   1070 <glPushMatrix@plt>
movsd  0xe7e(%rip),%xmm0
xorps  %xmm2,%xmm2
movsd  0xe7b(%rip),%xmm3
movaps %xmm2,%xmm1
call   1080 <glRotatef@plt>
movsd  0xe5b(%rip),%xmm0
call   1030 <glutSolidTeapot@plt>
mov    $0x0,%al
call   1050 <glPopMatrix@plt>
mov    $0x0,%al
call   1060 <glFlush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display>:
push   %rax
mov    0x2e70(%rip),%rax
mov    0x2e79(%rip),%rcx
mov    (%rcx),%edi
or     (%rax),%edi
call   1040 <glClear@plt>
xor    %eax,%eax
call   1070 <glPushMatrix@plt>
movsd  0xe79(%rip),%xmm0
movsd  0xe79(%rip),%xmm3
xorps  %xmm1,%xmm1
xorps  %xmm2,%xmm2
call   1080 <glRotatef@plt>
movsd  0xe6e(%rip),%xmm0
call   1030 <glutSolidTeapot@plt>
xor    %eax,%eax
call   1050 <glPopMatrix@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <glFlush@plt>

LLVM IR (-O0):
@GL_COLOR_BUFFER_BIT = global i32 0
@GL_DEPTH_BUFFER_BIT = global i32 0
define void @display() {
%1 = load i32, i32* @GL_COLOR_BUFFER_BIT
%2 = load i32, i32* @GL_DEPTH_BUFFER_BIT
%3 = or i32 %1, %2
%4 = call i32 @glClear(i32 %3)
%5 = call i32 (...) @glPushMatrix()
%6 = call i32 @glRotatef(double 4.500000e+01, double 0.000000e+00, double 0.000000e+00, double 1.000000e+00)
%7 = call i32 @glutSolidTeapot(double 2.000000e+00)
%8 = call i32 (...) @glPopMatrix()
%9 = call i32 (...) @glFlush()
ret void
}

LLVM IR (-O2):
@GL_COLOR_BUFFER_BIT = global i32 0
@GL_DEPTH_BUFFER_BIT = global i32 0
define void @display() {
%1 = load i32, i32* @GL_COLOR_BUFFER_BIT
%2 = load i32, i32* @GL_DEPTH_BUFFER_BIT
%3 = or i32 %2, %1
%4 = tail call i32 @glClear(i32 %3)
%5 = tail call i32 (...) @glPushMatrix()
%6 = tail call i32 @glRotatef(double 4.500000e+01, double 0.000000e+00, double 0.000000e+00, double 1.000000e+00)
%7 = tail call i32 @glutSolidTeapot(double 2.000000e+00)
%8 = tail call i32 (...) @glPopMatrix()
%9 = tail call i32 (...) @glFlush()
ret void
}
void caller_1_2_2_2_2_1_1() {}


x86 assembly (clang, -O0):
<caller_1_2_2_2_2_1_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<caller_1_2_2_2_2_1_1>:
ret

LLVM IR (-O0):
define void @caller_1_2_2_2_2_1_1() {
ret void
}

LLVM IR (-O2):
define void @caller_1_2_2_2_2_1_1() {
ret void
}
void XUninstallColormap() {}


x86 assembly (clang, -O0):
<XUninstallColormap>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XUninstallColormap>:
ret

LLVM IR (-O0):
define void @XUninstallColormap() {
ret void
}

LLVM IR (-O2):
define void @XUninstallColormap() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ little_endian_read_16(int /*<<< orphan*/ const *, int);
uint16_t att_event_mtu_exchange_complete_get_MTU(const uint8_t *event) {
  return little_endian_read_16(event, 4);
}


x86 assembly (clang, -O0):
<att_event_mtu_exchange_complete_get_MTU>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x4,%esi
call   1030 <little_endian_read_16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<att_event_mtu_exchange_complete_get_MTU>:
mov    $0x4,%esi
jmp    1030 <little_endian_read_16@plt>

LLVM IR (-O0):
define i32 @att_event_mtu_exchange_complete_get_MTU(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @little_endian_read_16(i32* %3, i32 4)
ret i32 %4
}

LLVM IR (-O2):
define i32 @att_event_mtu_exchange_complete_get_MTU(i32* %0) {
%2 = tail call i32 @little_endian_read_16(i32* %0, i32 4)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ _conformance_check_bitset();
int /*<<< orphan*/ _conformance_check_nfa();
int /*<<< orphan*/ test_nfa_accept_sample();
int /*<<< orphan*/ test_nfa_accept_samples_generic_hw();
int /*<<< orphan*/ test_nfa_file_io();
int /*<<< orphan*/ test_oil();
int main(void) {
  _conformance_check_bitset();
  _conformance_check_nfa();
  test_oil();
  test_nfa_file_io();
  test_nfa_accept_sample();
  test_nfa_accept_samples_generic_hw();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1070 <_conformance_check_bitset@plt>
mov    $0x0,%al
call   1080 <_conformance_check_nfa@plt>
mov    $0x0,%al
call   1040 <test_oil@plt>
mov    $0x0,%al
call   1050 <test_nfa_file_io@plt>
mov    $0x0,%al
call   1060 <test_nfa_accept_sample@plt>
mov    $0x0,%al
call   1030 <test_nfa_accept_samples_generic_hw@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1070 <_conformance_check_bitset@plt>
xor    %eax,%eax
call   1080 <_conformance_check_nfa@plt>
xor    %eax,%eax
call   1040 <test_oil@plt>
xor    %eax,%eax
call   1050 <test_nfa_file_io@plt>
xor    %eax,%eax
call   1060 <test_nfa_accept_sample@plt>
xor    %eax,%eax
call   1030 <test_nfa_accept_samples_generic_hw@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @_conformance_check_bitset()
%3 = call i32 (...) @_conformance_check_nfa()
%4 = call i32 (...) @test_oil()
%5 = call i32 (...) @test_nfa_file_io()
%6 = call i32 (...) @test_nfa_accept_sample()
%7 = call i32 (...) @test_nfa_accept_samples_generic_hw()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @_conformance_check_bitset()
%2 = tail call i32 (...) @_conformance_check_nfa()
%3 = tail call i32 (...) @test_oil()
%4 = tail call i32 (...) @test_nfa_file_io()
%5 = tail call i32 (...) @test_nfa_accept_sample()
%6 = tail call i32 (...) @test_nfa_accept_samples_generic_hw()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
void InitRandom() { srand(time(NULL)); }


x86 assembly (clang, -O0):
<InitRandom>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<InitRandom>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @InitRandom() {
%1 = call i32 @time(i32* null)
%2 = call i32 @srand(i32 %1)
ret void
}

LLVM IR (-O2):
define void @InitRandom() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 @srand(i32 %1)
ret void
}
char *const_cast_string(const char *s) { return (char *)s; }


x86 assembly (clang, -O0):
<const_cast_string>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<const_cast_string>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @const_cast_string(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @const_cast_string(i8* readnone returned %0) {
ret i8* %0
}
int security_task_wait(struct task_struct *p) { return 0; }


x86 assembly (clang, -O0):
<security_task_wait>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<security_task_wait>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.task_struct = type opaque
define i32 @security_task_wait(%struct.task_struct* %0) {
%2 = alloca %struct.task_struct*
store %struct.task_struct* %0, %struct.task_struct** %2
ret i32 0
}

LLVM IR (-O2):
%struct.task_struct = type opaque
define i32 @security_task_wait(%struct.task_struct* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ xsi_driver_first_trans_fast_port(char *);
void simprim_a_3395610110_2220797900_p_0(char *t0) {
  char *t1;
  char *t2;
  char *t3;
  char *t4;
  char *t5;
LAB0:
LAB3:
  t1 = (t0 + 2704);
  t2 = (t1 + 56U);
  t3 = *((char **)t2);
  t4 = (t3 + 56U);
  t5 = *((char **)t4);
  *((unsigned char *)t5) = (unsigned char)2;
  xsi_driver_first_trans_fast_port(t1);
LAB2:
LAB1:
  return;
LAB4:
  goto LAB2;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
jmp    1121 <simprim_a_3395610110_2220797900_p_0+0x11>
mov    -0x8(%rbp),%rax
add    $0xa90,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x38,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x38,%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
movb   $0x2,(%rax)
mov    -0x10(%rbp),%rdi
call   1030 <xsi_driver_first_trans_fast_port@plt>
jmp    1172 <simprim_a_3395610110_2220797900_p_0+0x62>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    0xac8(%rdi),%rax
add    $0xa90,%rdi
mov    0x38(%rax),%rax
movb   $0x2,(%rax)
jmp    1030 <xsi_driver_first_trans_fast_port@plt>

LLVM IR (-O0):
define void @simprim_a_3395610110_2220797900_p_0(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
store i8* %0, i8** %2
br label %8
8: ; preds = %1
br label %9
9: ; preds = %8
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i64 2704
store i8* %11, i8** %3
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i64 56
store i8* %13, i8** %4
%14 = load i8*, i8** %4
%15 = bitcast i8* %14 to i8**
%16 = load i8*, i8** %15
store i8* %16, i8** %5
%17 = load i8*, i8** %5
%18 = getelementptr inbounds i8, i8* %17, i64 56
store i8* %18, i8** %6
%19 = load i8*, i8** %6
%20 = bitcast i8* %19 to i8**
%21 = load i8*, i8** %20
store i8* %21, i8** %7
%22 = load i8*, i8** %7
store i8 2, i8* %22
%23 = load i8*, i8** %3
%24 = call i32 @xsi_driver_first_trans_fast_port(i8* %23)
br label %25
25: ; preds = %27, %9
br label %26
26: ; preds = %25
ret void
27: ; No predecessors!
br label %25
}

LLVM IR (-O2):
define void @simprim_a_3395610110_2220797900_p_0(i8* %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 2704
%3 = getelementptr inbounds i8, i8* %0, i64 2760
%4 = bitcast i8* %3 to i8**
%5 = load i8*, i8** %4
%6 = getelementptr inbounds i8, i8* %5, i64 56
%7 = bitcast i8* %6 to i8**
%8 = load i8*, i8** %7
store i8 2, i8* %8
%9 = tail call i32 @xsi_driver_first_trans_fast_port(i8* %2)
ret void
}
unsigned int UARTTxFIFOFullStatusGet(unsigned int baseAdd) {
  return ((*((volatile unsigned int *)(baseAdd + (0x44)))) & (0x00000001u));
}


x86 assembly (clang, -O0):
<UARTTxFIFOFullStatusGet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x44,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTTxFIFOFullStatusGet>:
add    $0x44,%edi
mov    (%rdi),%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @UARTTxFIFOFullStatusGet(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 68
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, 1
ret i32 %8
}

LLVM IR (-O2):
define i32 @UARTTxFIFOFullStatusGet(i32 %0) {
%2 = add i32 %0, 68
%3 = zext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = and i32 %5, 1
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ hits(int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n;
  scanf("%d", &n);
  hits(n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1030 <hits@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%edi
call   1030 <hits@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = call i32 @hits(i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @hits(i32 %4)
ret i32 0
}
long int cast_short_long_fast(short int x) { return (long int)x; }


x86 assembly (clang, -O0):
<cast_short_long_fast>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswq -0x2(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cast_short_long_fast>:
movslq %edi,%rax
ret

LLVM IR (-O0):
define i64 @cast_short_long_fast(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i64
ret i64 %4
}

LLVM IR (-O2):
define i64 @cast_short_long_fast(i16 signext %0) {
%2 = sext i16 %0 to i64
ret i64 %2
}
/* Variables and functions */
int execl(void *, void *, int /*<<< orphan*/ *);
int /*<<< orphan*/ perror(char *);
int child_func(void *arg) {
  int status;
  char *cmd = (char *)arg;
  if ((status = execl(arg, arg, NULL))) {
    perror("exec");
    return status;
  }
}


x86 assembly (clang, -O0):
<child_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1040 <execl@plt>
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     1163 <child_func+0x43>
lea    0xea8(%rip),%rdi
call   1030 <perror@plt>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<child_func>:
push   %rbx
mov    %rdi,%rsi
xor    %edx,%edx
call   1040 <execl@plt>
mov    %eax,%ebx
test   %eax,%eax
jne    1135 <child_func+0x15>
mov    %ebx,%eax
pop    %rbx
ret
lea    0xec4(%rip),%rdi
call   1030 <perror@plt>
jmp    1131 <child_func+0x11>

LLVM IR (-O0):
@.str = [5 x i8] c"exec\00"
define i32 @child_func(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
%6 = load i8*, i8** %3
store i8* %6, i8** %5
%7 = load i8*, i8** %3
%8 = load i8*, i8** %3
%9 = call i32 @execl(i8* %7, i8* %8, i32* null)
store i32 %9, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %1
%12 = call i32 @perror(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%13 = load i32, i32* %4
store i32 %13, i32* %2
br label %14
14: ; preds = %11, %1
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
@.str = [5 x i8] c"exec\00"
define i32 @child_func(i8* %0) {
%2 = tail call i32 @execl(i8* %0, i8* %0, i32* null)
%3 = icmp eq i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @perror(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %1, %4
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ HplMsp430GeneralIOP__34__IO__selectIOFunc();
void HplMsp430Usart1P__SOMI__selectIOFunc(void) {
  HplMsp430GeneralIOP__34__IO__selectIOFunc();
}


x86 assembly (clang, -O0):
<HplMsp430Usart1P__SOMI__selectIOFunc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMsp430GeneralIOP__34__IO__selectIOFunc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HplMsp430Usart1P__SOMI__selectIOFunc>:
xor    %eax,%eax
jmp    1030 <HplMsp430GeneralIOP__34__IO__selectIOFunc@plt>

LLVM IR (-O0):
define void @HplMsp430Usart1P__SOMI__selectIOFunc() {
%1 = call i32 (...) @HplMsp430GeneralIOP__34__IO__selectIOFunc()
ret void
}

LLVM IR (-O2):
define void @HplMsp430Usart1P__SOMI__selectIOFunc() {
%1 = tail call i32 (...) @HplMsp430GeneralIOP__34__IO__selectIOFunc()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
struct packet {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ *find_option(struct packet *, int);
uint8_t parse_msg_type(struct packet *pckt) {
  uint8_t *options = find_option(pckt, 53);
  return *options;
}


x86 assembly (clang, -O0):
<parse_msg_type>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x35,%esi
call   1030 <find_option@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_msg_type>:
push   %rax
mov    $0x35,%esi
call   1030 <find_option@plt>
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.packet = type { i32 }
define i32 @parse_msg_type(%struct.packet* %0) {
%2 = alloca %struct.packet*
%3 = alloca i32*
store %struct.packet* %0, %struct.packet** %2
%4 = load %struct.packet*, %struct.packet** %2
%5 = call i32* @find_option(%struct.packet* %4, i32 53)
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
%struct.packet = type { i32 }
define i32 @parse_msg_type(%struct.packet* %0) {
%2 = tail call i32* @find_option(%struct.packet* %0, i32 53)
%3 = load i32, i32* %2
ret i32 %3
}
void test_34_1(short *mem) { __atomic_xor_fetch(mem, 1, 4); }


x86 assembly (clang, -O0):
<test_34_1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movw   $0x1,-0xa(%rbp)
mov    -0xa(%rbp),%cx
mov    %cx,-0x10(%rbp)
mov    (%rax),%ax
mov    %ax,-0xe(%rbp)
mov    -0xe(%rbp),%ax
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%dx
mov    %dx,%si
mov    %ax,%dx
mov    %edx,-0x24(%rbp)
xor    %esi,%edx
mov    %edx,-0x20(%rbp)
lock cmpxchg %dx,(%rcx)
sete   %cl
mov    %ax,-0x1a(%rbp)
test   $0x1,%cl
mov    %ax,-0xe(%rbp)
jne    115d <test_34_1+0x5d>
jmp    1125 <test_34_1+0x25>
mov    -0x10(%rbp),%cx
mov    -0x1a(%rbp),%ax
xor    %cx,%ax
mov    %ax,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_34_1>:
lock xorw $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @test_34_1(i16* %0) {
%2 = alloca i16*
%3 = alloca i16
%4 = alloca i16
store i16* %0, i16** %2
%5 = load i16*, i16** %2
store i16 1, i16* %3
%6 = load i16, i16* %3
%7 = atomicrmw xor i16* %5, i16 %6 acq_rel
%8 = xor i16 %7, %6
store i16 %8, i16* %4
%9 = load i16, i16* %4
ret void
}

LLVM IR (-O2):
define void @test_34_1(i16* nocapture %0) {
%2 = atomicrmw xor i16* %0, i16 1 acq_rel
ret void
}
__attribute__((section(".after_vectors"))) void M0_SysTick_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<M0_SysTick_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <M0_SysTick_Handler+0x9>
jmp    1109 <M0_SysTick_Handler+0x9>

x86 assembly (clang, -O2):
<M0_SysTick_Handler>:
jmp    1100 <M0_SysTick_Handler>

LLVM IR (-O0):
define void @M0_SysTick_Handler() section ".after_vectors" {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @M0_SysTick_Handler() section ".after_vectors" {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int rand();
randGen(int range) { return (rand() % range); }


x86 assembly (clang, -O0):
<randGen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cltd
idivl  -0x4(%rbp)
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randGen>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %ebx
mov    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @randGen(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @rand()
%4 = load i32, i32* %2
%5 = srem i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @randGen(i32 %0) {
%2 = tail call i32 (...) @rand()
%3 = srem i32 %2, %0
ret i32 %3
}
unsigned int _check_times(unsigned x, unsigned y) {
  unsigned long long whole_ans =
      ((unsigned long long)x) * ((unsigned long long)y);
  unsigned word_ans = (unsigned)whole_ans;
  if (word_ans < whole_ans || word_ans > (1 << 28))
    (_throw_badalloc_fn(
        "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
        "2022-01-22/02-19-57/repos/pippijn/cyclone/refs/heads/master/library/"
        "std/cyc-lib/cyc_include.h",
        287));
  return word_ans;
}


x86 assembly (clang, -O0):
<_check_times>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%rax
jb     114d <_check_times+0x3d>
cmpl   $0x10000000,-0x14(%rbp)
jbe    1160 <_check_times+0x50>
lea    0xeac(%rip),%rdi
mov    $0x11f,%esi
mov    $0x0,%al
call   1030 <_throw_badalloc_fn@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_check_times>:
push   %rbx
mov    %edi,%eax
mul    %esi
mov    %eax,%ebx
jo     1121 <_check_times+0x11>
cmp    $0x10000001,%ebx
jb     1134 <_check_times+0x24>
lea    0xed8(%rip),%rdi
mov    $0x11f,%esi
xor    %eax,%eax
call   1030 <_throw_badalloc_fn@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [158 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/pippijn/cyclone/refs/heads/master/library/std/cyc-lib/cyc_include.h\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = zext i32 %7 to i64
%9 = load i32, i32* %4
%10 = zext i32 %9 to i64
%11 = mul i64 %8, %10
store i64 %11, i64* %5
%12 = load i64, i64* %5
%13 = trunc i64 %12 to i32
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = zext i32 %14 to i64
%16 = load i64, i64* %5
%17 = icmp ult i64 %15, %16
br i1 %17, label %21, label %18
18: ; preds = %2
%19 = load i32, i32* %6
%20 = icmp ugt i32 %19, 268435456
br i1 %20, label %21, label %23
21: ; preds = %18, %2
%22 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([158 x i8], [158 x i8]* @.str, i64 0, i64 0), i32 287)
br label %23
23: ; preds = %21, %18
%24 = load i32, i32* %6
ret i32 %24
}

LLVM IR (-O2):
@.str = [158 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/pippijn/cyclone/refs/heads/master/library/std/cyc-lib/cyc_include.h\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %0, i32 %1)
%4 = extractvalue { i32, i1 } %3, 0
%5 = extractvalue { i32, i1 } %3, 1
%6 = icmp ugt i32 %4, 268435456
%7 = or i1 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([158 x i8], [158 x i8]* @.str, i64 0, i64 0), i32 287)
br label %10
10: ; preds = %2, %8
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(void *, char *);
int main(int argc, char *argv[]) {
  void *ptr = NULL;
  strcpy(ptr, "segfault");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
lea    0xec7(%rip),%rsi
call   1030 <strcpy@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rsi
xor    %edi,%edi
call   1030 <strcpy@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"segfault\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* null, i8** %6
%7 = load i8*, i8** %6
%8 = call i32 @strcpy(i8* %7, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"segfault\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @strcpy(i8* null, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
void iter_str(const char *str, void (*callback)(char c)) {
  for (; *str != '\0'; ++str)
    callback(*str);
}


x86 assembly (clang, -O0):
<iter_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     113e <iter_str+0x3e>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
movsbl (%rcx),%edi
call   *%rax
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1110 <iter_str+0x10>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iter_str>:
push   %r14
push   %rbx
push   %rax
mov    (%rdi),%al
test   %al,%al
je     1131 <iter_str+0x31>
mov    %rsi,%r14
mov    %rdi,%rbx
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movsbl %al,%edi
call   *%r14
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <iter_str+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @iter_str(i8* %0, void (i8)* %1) {
%3 = alloca i8*
%4 = alloca void (i8)*
store i8* %0, i8** %3
store void (i8)* %1, void (i8)** %4
br label %5
5: ; preds = %14, %2
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %5
%11 = load void (i8)*, void (i8)** %4
%12 = load i8*, i8** %3
%13 = load i8, i8* %12
br label %14
14: ; preds = %10
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
br label %5
17: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @iter_str(i8* nocapture %0, void (i8)* nocapture %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %11, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %9, %5 ], [ %3, %2 ]
%7 = phi i8* [ %8, %5 ], [ %0, %2 ]
tail call void %1(i8 signext %6)
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %5
11: ; preds = %5, %2
ret void
}
/* Type definitions */
struct l_class_OC_Subsmall_X {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _ZN10Subsmall_XD1Ev(struct l_class_OC_Subsmall_X *);
int /*<<< orphan*/ _ZdlPv(unsigned char *);
void _ZN10Subsmall_XD0Ev(struct l_class_OC_Subsmall_X *llvm_cbe_this) {
  struct l_class_OC_Subsmall_X *llvm_cbe_this_2e_addr;
  struct l_class_OC_Subsmall_X *llvm_cbe_this1;
  *(&llvm_cbe_this_2e_addr) = llvm_cbe_this;
  llvm_cbe_this1 = *(&llvm_cbe_this_2e_addr);
  _ZN10Subsmall_XD1Ev(llvm_cbe_this1);
  _ZdlPv((((unsigned char *)llvm_cbe_this1)));
  return;
}


x86 assembly (clang, -O0):
<_ZN10Subsmall_XD0Ev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <_ZN10Subsmall_XD1Ev@plt>
mov    -0x18(%rbp),%rdi
call   1030 <_ZdlPv@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ZN10Subsmall_XD0Ev>:
push   %rbx
mov    %rdi,%rbx
call   1040 <_ZN10Subsmall_XD1Ev@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <_ZdlPv@plt>

LLVM IR (-O0):
%struct.l_class_OC_Subsmall_X = type { i32 }
define void @_ZN10Subsmall_XD0Ev(%struct.l_class_OC_Subsmall_X* %0) {
%2 = alloca %struct.l_class_OC_Subsmall_X*
%3 = alloca %struct.l_class_OC_Subsmall_X*
%4 = alloca %struct.l_class_OC_Subsmall_X*
store %struct.l_class_OC_Subsmall_X* %0, %struct.l_class_OC_Subsmall_X** %2
%5 = load %struct.l_class_OC_Subsmall_X*, %struct.l_class_OC_Subsmall_X** %2
store %struct.l_class_OC_Subsmall_X* %5, %struct.l_class_OC_Subsmall_X** %3
%6 = load %struct.l_class_OC_Subsmall_X*, %struct.l_class_OC_Subsmall_X** %3
store %struct.l_class_OC_Subsmall_X* %6, %struct.l_class_OC_Subsmall_X** %4
%7 = load %struct.l_class_OC_Subsmall_X*, %struct.l_class_OC_Subsmall_X** %4
%8 = call i32 @_ZN10Subsmall_XD1Ev(%struct.l_class_OC_Subsmall_X* %7)
%9 = load %struct.l_class_OC_Subsmall_X*, %struct.l_class_OC_Subsmall_X** %4
%10 = bitcast %struct.l_class_OC_Subsmall_X* %9 to i8*
%11 = call i32 @_ZdlPv(i8* %10)
ret void
}

LLVM IR (-O2):
%struct.l_class_OC_Subsmall_X = type { i32 }
define void @_ZN10Subsmall_XD0Ev(%struct.l_class_OC_Subsmall_X* %0) {
%2 = tail call i32 @_ZN10Subsmall_XD1Ev(%struct.l_class_OC_Subsmall_X* %0)
%3 = bitcast %struct.l_class_OC_Subsmall_X* %0 to i8*
%4 = tail call i32 @_ZdlPv(i8* %3)
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ internal_fiat_p256_selectznz(uintptr_t, uintptr_t, uintptr_t,
                                                uintptr_t);
void fiat_p256_selectznz(uint32_t out1[8], uint8_t arg1, const uint32_t arg2[8],
                         const uint32_t arg3[8]) {
  internal_fiat_p256_selectznz((uintptr_t)out1, (uintptr_t)arg1,
                               (uintptr_t)arg2, (uintptr_t)arg3);
}


x86 assembly (clang, -O0):
<fiat_p256_selectznz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <internal_fiat_p256_selectznz@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiat_p256_selectznz>:
jmp    1030 <internal_fiat_p256_selectznz@plt>

LLVM IR (-O0):
define void @fiat_p256_selectznz(i32* %0, i64 %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i64
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i64 %1, i64* %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = ptrtoint i32* %9 to i64
%11 = load i64, i64* %6
%12 = load i32*, i32** %7
%13 = ptrtoint i32* %12 to i64
%14 = load i32*, i32** %8
%15 = ptrtoint i32* %14 to i64
%16 = call i32 @internal_fiat_p256_selectznz(i64 %10, i64 %11, i64 %13, i64 %15)
ret void
}

LLVM IR (-O2):
define void @fiat_p256_selectznz(i32* %0, i64 %1, i32* %2, i32* %3) {
%5 = ptrtoint i32* %0 to i64
%6 = ptrtoint i32* %2 to i64
%7 = ptrtoint i32* %3 to i64
%8 = tail call i32 @internal_fiat_p256_selectznz(i64 %5, i64 %1, i64 %6, i64 %7)
ret void
}
void free_redirect(struct hash_table *table) {}


x86 assembly (clang, -O0):
<free_redirect>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_redirect>:
ret

LLVM IR (-O0):
%struct.hash_table = type opaque
define void @free_redirect(%struct.hash_table* %0) {
%2 = alloca %struct.hash_table*
store %struct.hash_table* %0, %struct.hash_table** %2
ret void
}

LLVM IR (-O2):
%struct.hash_table = type opaque
define void @free_redirect(%struct.hash_table* nocapture %0) {
ret void
}
int fun1297() { return 1297; }


x86 assembly (clang, -O0):
<fun1297>:
push   %rbp
mov    %rsp,%rbp
mov    $0x511,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1297>:
mov    $0x511,%eax
ret

LLVM IR (-O0):
define i32 @fun1297() {
ret i32 1297
}

LLVM IR (-O2):
define i32 @fun1297() {
ret i32 1297
}
double min(double a, double b) {
  if (a < b)
    return a;
  return b;
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1131 <min+0x31>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    113b <min+0x3b>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
minsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @min(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %4
%7 = load double, double* %5
%8 = fcmp olt double %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load double, double* %4
store double %10, double* %3
br label %13
11: ; preds = %2
%12 = load double, double* %5
store double %12, double* %3
br label %13
13: ; preds = %11, %9
%14 = load double, double* %3
ret double %14
}

LLVM IR (-O2):
define double @min(double %0, double %1) {
%3 = fcmp olt double %0, %1
%4 = select i1 %3, double %0, double %1
ret double %4
}
int test_imm_D1int16_reg(short val) {
  return ((val) & (-0xD1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D1int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffff2f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D1int16_reg>:
test   $0xff2f,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D1int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -209
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D1int16_reg(i16 signext %0) {
%2 = and i16 %0, -209
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int __be_u24(void const *);
int32_t __be_s24(const void *p) { return ((int32_t)(__be_u24(p) << 8)) >> 8; }


x86 assembly (clang, -O0):
<__be_s24>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__be_u24@plt>
shl    $0x8,%eax
sar    $0x8,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__be_s24>:
push   %rax
call   1030 <__be_u24@plt>
shl    $0x8,%eax
sar    $0x8,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @__be_s24(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @__be_u24(i8* %3)
%5 = shl i32 %4, 8
%6 = ashr i32 %5, 8
ret i32 %6
}

LLVM IR (-O2):
define i32 @__be_s24(i8* %0) {
%2 = tail call i32 @__be_u24(i8* %0)
%3 = shl i32 %2, 8
%4 = ashr exact i32 %3, 8
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ newline();
int /*<<< orphan*/ print(char);
int /*<<< orphan*/ prints(char *);
void space(int indent) {
  if (indent > 0) {
    newline();
    while (--indent > 0) {
      prints("  ");
    }
  } else {
    print(' ');
  }
}


x86 assembly (clang, -O0):
<space>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1174 <space+0x44>
mov    $0x0,%al
call   1030 <newline@plt>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
jle    116f <space+0x3f>
lea    0xe9b(%rip),%rdi
call   1050 <prints@plt>
jmp    114c <space+0x1c>
jmp    117e <space+0x4e>
mov    $0x20,%edi
call   1040 <print@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<space>:
test   %edi,%edi
jle    1168 <space+0x38>
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <newline@plt>
cmp    $0x1,%ebx
je     1160 <space+0x30>
add    $0x1,%ebx
lea    0xeb0(%rip),%r14
mov    %r14,%rdi
call   1050 <prints@plt>
add    $0xffffffff,%ebx
cmp    $0x2,%ebx
ja     1150 <space+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
mov    $0x20,%edi
jmp    1040 <print@plt>

LLVM IR (-O0):
@.str = [3 x i8] c" \00"
define void @space(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %14
5: ; preds = %1
%6 = call i32 (...) @newline()
br label %7
7: ; preds = %11, %5
%8 = load i32, i32* %2
%9 = add nsw i32 %8, -1
store i32 %9, i32* %2
%10 = icmp sgt i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %7
%12 = call i32 @prints(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
br label %7
13: ; preds = %7
br label %16
14: ; preds = %1
%15 = call i32 @print(i8 signext 32)
br label %16
16: ; preds = %14, %13
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c" \00"
define void @space(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %11
3: ; preds = %1
%4 = tail call i32 (...) @newline()
%5 = icmp eq i32 %0, 1
br i1 %5, label %13, label %6
6: ; preds = %3, %6
%7 = phi i32 [ %8, %6 ], [ %0, %3 ]
%8 = add nsw i32 %7, -1
%9 = tail call i32 @prints(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%10 = icmp ugt i32 %7, 2
br i1 %10, label %6, label %13
11: ; preds = %1
%12 = tail call i32 @print(i8 signext 32)
br label %13
13: ; preds = %6, %3, %11
ret void
}
int write(int fd, const void *buffer, unsigned size) {
  int ret = 0;
  asm("movl $4,%%eax  \n\t"
      "movl %1,%%ebx \n\t"
      "movl %2,%%ecx  \n\t"
      "movl %3,%%edx \n\t"
      "int $0x80  \n\t"
      "movl %%eax,%0 \n\t"
      : "=m"(ret)
      : "m"(fd), "m"(buffer), "m"(size));
  return ret;
}


x86 assembly (clang, -O0):
<write>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    $0x4,%eax
mov    -0x4(%rbp),%ebx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%edx
int    $0x80
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<write>:
mov    %edi,-0xc(%rsp)
mov    %rsi,-0x8(%rsp)
mov    %edx,-0x10(%rsp)
movl   $0x0,-0x14(%rsp)
mov    $0x4,%eax
mov    -0xc(%rsp),%ebx
mov    -0x8(%rsp),%ecx
mov    -0x10(%rsp),%edx
int    $0x80
mov    %eax,-0x14(%rsp)
mov    -0x14(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @write(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
store i32 0, i32* %7
%8 = load i32, i32* %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @write(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = bitcast i32* %7 to i8*
store i32 0, i32* %7
%9 = load i32, i32* %7
ret i32 %9
}
/* Variables and functions */
int ceil(float);
int parent(int i) {
  float p;
  p = ((float)i / 2.0) - 1.0;
  return ceil(p);
}


x86 assembly (clang, -O0):
<parent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xedc(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  0xec8(%rip),%xmm1
subsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
call   1030 <ceil@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parent>:
cvtsi2ss %edi,%xmm0
cvtss2sd %xmm0,%xmm0
mulsd  0xee0(%rip),%xmm0
addsd  0xee0(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
jmp    1030 <ceil@plt>

LLVM IR (-O0):
define i32 @parent(i32 %0) {
%2 = alloca i32
%3 = alloca float
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sitofp i32 %4 to float
%6 = fpext float %5 to double
%7 = fdiv double %6, 2.000000e+00
%8 = fsub double %7, 1.000000e+00
%9 = fptrunc double %8 to float
store float %9, float* %3
%10 = load float, float* %3
%11 = call i32 @ceil(float %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @parent(i32 %0) {
%2 = sitofp i32 %0 to float
%3 = fpext float %2 to double
%4 = fmul double %3, 5.000000e-01
%5 = fadd double %4, -1.000000e+00
%6 = fptrunc double %5 to float
%7 = tail call i32 @ceil(float %6)
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ ENGINE;

/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int simple_engine_ctrl(ENGINE *e, int cmd, long i, void *p, void (*f)()) {
  printf("Currently: do nothing ;)\n");
  switch (cmd) {
  default:
    break;
  }
  return 0;
}


x86 assembly (clang, -O0):
<simple_engine_ctrl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
jmp    113c <simple_engine_ctrl+0x2c>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<simple_engine_ctrl>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"Currently: do nothing ;)\0A\00"
define i32 @simple_engine_ctrl(i32* %0, i32 %1, i64 %2, i8* %3, void (...)* %4) {
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i64
%9 = alloca i8*
%10 = alloca void (...)*
store i32* %0, i32** %6
store i32 %1, i32* %7
store i64 %2, i64* %8
store i8* %3, i8** %9
store void (...)* %4, void (...)** %10
%11 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%12 = load i32, i32* %7
switch i32 %12, label %13 [
]
13: ; preds = %5
br label %14
14: ; preds = %13
ret i32 0
}

LLVM IR (-O2):
@str = [25 x i8] c"Currently: do nothing ;)\00"
define i32 @simple_engine_ctrl(i32* nocapture readnone %0, i32 %1, i64 %2, i8* nocapture readnone %3, void (...)* nocapture readnone %4) {
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ LOG_ERR;
int /*<<< orphan*/ errno;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int listen(int, int);
int /*<<< orphan*/ strerror(int /*<<< orphan*/);
int /*<<< orphan*/ syslog(int /*<<< orphan*/, char *, int /*<<< orphan*/);
void Listen(int sockfd, int backlog) {
  if (listen(sockfd, backlog) == -1) {
    syslog(LOG_ERR, "listen: %s", strerror(errno));
    exit(EXIT_FAILURE);
  }
}


x86 assembly (clang, -O0):
<Listen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <listen@plt>
cmp    $0xffffffff,%eax
jne    119b <Listen+0x5b>
mov    0x2e5f(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    0x2e6b(%rip),%rax
mov    (%rax),%edi
call   1060 <strerror@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%edx
lea    0xe78(%rip),%rsi
call   1030 <syslog@plt>
mov    0x2e44(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Listen>:
push   %rbx
call   1040 <listen@plt>
cmp    $0xffffffff,%eax
je     114d <Listen+0xd>
pop    %rbx
ret
mov    0x2e74(%rip),%rax
mov    (%rax),%ebx
mov    0x2e83(%rip),%rax
mov    (%rax),%edi
call   1060 <strerror@plt>
lea    0xe95(%rip),%rsi
mov    %ebx,%edi
mov    %eax,%edx
call   1030 <syslog@plt>
mov    0x2e5d(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@LOG_ERR = global i32 0
@.str = [11 x i8] c"listen: %s\00"
@errno = global i32 0
@EXIT_FAILURE = global i32 0
define void @Listen(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @listen(i32 %5, i32 %6)
%8 = icmp eq i32 %7, -1
br i1 %8, label %9, label %16
9: ; preds = %2
%10 = load i32, i32* @LOG_ERR
%11 = load i32, i32* @errno
%12 = call i32 @strerror(i32 %11)
%13 = call i32 @syslog(i32 %10, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %12)
%14 = load i32, i32* @EXIT_FAILURE
%15 = call i32 @exit(i32 %14)
unreachable
16: ; preds = %2
ret void
}

LLVM IR (-O2):
@LOG_ERR = global i32 0
@.str = [11 x i8] c"listen: %s\00"
@errno = global i32 0
@EXIT_FAILURE = global i32 0
define void @Listen(i32 %0, i32 %1) {
%3 = tail call i32 @listen(i32 %0, i32 %1)
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %12
5: ; preds = %2
%6 = load i32, i32* @LOG_ERR
%7 = load i32, i32* @errno
%8 = tail call i32 @strerror(i32 %7)
%9 = tail call i32 @syslog(i32 %6, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %8)
%10 = load i32, i32* @EXIT_FAILURE
%11 = tail call i32 @exit(i32 %10)
unreachable
12: ; preds = %2
ret void
}
void outl_p(unsigned int value, unsigned short port) {
  __asm__ __volatile__("out"
                       "l"
                       " %"
                       "0,%"
                       "w"
                       "1"
                       :
                       : "a"(value), "Nd"(port));
  slow_down_io();
}


x86 assembly (clang, -O0):
<outl_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %edi,-0x4(%rbp)
mov    %ax,-0x6(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x6(%rbp),%dx
out    %eax,(%dx)
mov    $0x0,%al
call   1030 <slow_down_io@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outl_p>:
mov    %esi,%edx
mov    %edi,%eax
out    %eax,(%dx)
xor    %eax,%eax
jmp    1030 <slow_down_io@plt>

LLVM IR (-O0):
define void @outl_p(i32 %0, i16 zeroext %1) {
%3 = alloca i32
%4 = alloca i16
store i32 %0, i32* %3
store i16 %1, i16* %4
%5 = load i32, i32* %3
%6 = load i16, i16* %4
%7 = call i32 (...) @slow_down_io()
ret void
}

LLVM IR (-O2):
define void @outl_p(i32 %0, i16 zeroext %1) {
tail call void asm sideeffect "outl $0,${1:w}", "{ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i32 %0, i16 %1)
%3 = tail call i32 (...) @slow_down_io()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pwm_init();
void PWM_start(int pin) { pwm_init(); }


x86 assembly (clang, -O0):
<PWM_start>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <pwm_init@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWM_start>:
xor    %eax,%eax
jmp    1030 <pwm_init@plt>

LLVM IR (-O0):
define void @PWM_start(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @pwm_init()
ret void
}

LLVM IR (-O2):
define void @PWM_start(i32 %0) {
%2 = tail call i32 (...) @pwm_init()
ret void
}