int esc_tran(c)
char c;
{
  switch (c) {
  case 'r':
    return '\r';
  case 'n':
    return '\n';
  case '7':
    return '\7';
  case '?':
    return '\033';
  case 't':
    return '\t';
  case '\"':
    return '\"';
  case '\'':
    return '\'';
  case '\\':
    return '\\';
  default:
    return c;
  }
}


x86 assembly (clang, -O0):
<esc_tran>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x22,%eax
je     11d2 <esc_tran+0xd2>
jmp    111f <esc_tran+0x1f>
mov    -0xc(%rbp),%eax
sub    $0x27,%eax
je     11de <esc_tran+0xde>
jmp    1130 <esc_tran+0x30>
mov    -0xc(%rbp),%eax
sub    $0x37,%eax
je     11ae <esc_tran+0xae>
jmp    1141 <esc_tran+0x41>
mov    -0xc(%rbp),%eax
sub    $0x3f,%eax
je     11ba <esc_tran+0xba>
jmp    1152 <esc_tran+0x52>
mov    -0xc(%rbp),%eax
sub    $0x5c,%eax
je     11ea <esc_tran+0xea>
jmp    1163 <esc_tran+0x63>
mov    -0xc(%rbp),%eax
sub    $0x6e,%eax
je     11a2 <esc_tran+0xa2>
jmp    1174 <esc_tran+0x74>
mov    -0xc(%rbp),%eax
sub    $0x72,%eax
je     1196 <esc_tran+0x96>
jmp    1185 <esc_tran+0x85>
mov    -0xc(%rbp),%eax
sub    $0x74,%eax
je     11c6 <esc_tran+0xc6>
jmp    11f6 <esc_tran+0xf6>
movl   $0xd,-0x4(%rbp)
jmp    11fd <esc_tran+0xfd>
movl   $0xa,-0x4(%rbp)
jmp    11fd <esc_tran+0xfd>
movl   $0x7,-0x4(%rbp)
jmp    11fd <esc_tran+0xfd>
movl   $0x1b,-0x4(%rbp)
jmp    11fd <esc_tran+0xfd>
movl   $0x9,-0x4(%rbp)
jmp    11fd <esc_tran+0xfd>
movl   $0x22,-0x4(%rbp)
jmp    11fd <esc_tran+0xfd>
movl   $0x27,-0x4(%rbp)
jmp    11fd <esc_tran+0xfd>
movl   $0x5c,-0x4(%rbp)
jmp    11fd <esc_tran+0xfd>
movsbl -0x5(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<esc_tran>:
movsbl %dil,%ecx
lea    -0x22(%rcx),%eax
cmp    $0x1d,%eax
jbe    112f <esc_tran+0x2f>
lea    -0x5c(%rcx),%edx
cmp    $0x18,%edx
ja     113f <esc_tran+0x3f>
mov    $0xd,%eax
lea    0xf58(%rip),%rsi
movslq (%rsi,%rdx,4),%rdx
add    %rsi,%rdx
jmp    *%rdx
mov    $0xa,%eax
ret
lea    0xeca(%rip),%rdx
movslq (%rdx,%rax,4),%rax
add    %rdx,%rax
jmp    *%rax
mov    %ecx,%eax
ret
mov    $0x9,%eax
ret
mov    $0x7,%eax
ret
mov    $0x1b,%eax
ret

LLVM IR (-O0):
define i32 @esc_tran(i32 %0) {
%2 = alloca i32
%3 = alloca i8
%4 = trunc i32 %0 to i8
store i8 %4, i8* %3
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
switch i32 %6, label %15 [
i32 114, label %7
i32 110, label %8
i32 55, label %9
i32 63, label %10
i32 116, label %11
i32 34, label %12
i32 39, label %13
i32 92, label %14
]
7: ; preds = %1
store i32 13, i32* %2
br label %18
8: ; preds = %1
store i32 10, i32* %2
br label %18
9: ; preds = %1
store i32 7, i32* %2
br label %18
10: ; preds = %1
store i32 27, i32* %2
br label %18
11: ; preds = %1
store i32 9, i32* %2
br label %18
12: ; preds = %1
store i32 34, i32* %2
br label %18
13: ; preds = %1
store i32 39, i32* %2
br label %18
14: ; preds = %1
store i32 92, i32* %2
br label %18
15: ; preds = %1
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
store i32 %17, i32* %2
br label %18
18: ; preds = %15, %14, %13, %12, %11, %10, %9, %8, %7
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @esc_tran(i32 %0) {
%2 = shl i32 %0, 24
%3 = ashr exact i32 %2, 24
switch i32 %3, label %11 [
i32 114, label %12
i32 110, label %4
i32 55, label %5
i32 63, label %6
i32 116, label %7
i32 34, label %8
i32 39, label %9
i32 92, label %10
]
4: ; preds = %1
br label %12
5: ; preds = %1
br label %12
6: ; preds = %1
br label %12
7: ; preds = %1
br label %12
8: ; preds = %1
br label %12
9: ; preds = %1
br label %12
10: ; preds = %1
br label %12
11: ; preds = %1
br label %12
12: ; preds = %1, %11, %10, %9, %8, %7, %6, %5, %4
%13 = phi i32 [ %3, %11 ], [ %3, %10 ], [ %3, %9 ], [ %3, %8 ], [ 9, %7 ], [ 27, %6 ], [ 7, %5 ], [ 10, %4 ], [ 13, %1 ]
ret i32 %13
}