xunge/DecIR huggingface dataset:
double R8(unsigned char *p) {
  double value;
  unsigned char *q = (unsigned char *)&value + 7;
  int i;
  for (i = 0; i < 8; i++)
    *q-- = *p++;
  return value;
}


x86 assembly (clang, -O0):
<R8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    -0x10(%rbp),%rax
add    $0x7,%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
cmpl   $0x8,-0x1c(%rbp)
jge    1155 <R8+0x55>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0xffffffffffffffff,%rdx
mov    %rdx,-0x18(%rbp)
mov    %cl,(%rax)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    111b <R8+0x1b>
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<R8>:
mov    (%rdi),%rax
bswap  %rax
movq   %rax,%xmm0
ret

LLVM IR (-O0):
define double @R8(i8* %0) {
%2 = alloca i8*
%3 = alloca double
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %2
%6 = bitcast double* %3 to i8*
%7 = getelementptr inbounds i8, i8* %6, i64 7
store i8* %7, i8** %4
store i32 0, i32* %5
br label %8
8: ; preds = %17, %1
%9 = load i32, i32* %5
%10 = icmp slt i32 %9, 8
br i1 %10, label %11, label %20
11: ; preds = %8
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %2
%14 = load i8, i8* %12
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i32 -1
store i8* %16, i8** %4
store i8 %14, i8* %15
br label %17
17: ; preds = %11
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %8
20: ; preds = %8
%21 = load double, double* %3
ret double %21
}

LLVM IR (-O2):
define double @R8(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 1
%3 = load i8, i8* %0
%4 = zext i8 %3 to i64
%5 = shl nuw i64 %4, 56
%6 = getelementptr inbounds i8, i8* %0, i64 2
%7 = load i8, i8* %2
%8 = zext i8 %7 to i64
%9 = shl nuw nsw i64 %8, 48
%10 = or i64 %5, %9
%11 = getelementptr inbounds i8, i8* %0, i64 3
%12 = load i8, i8* %6
%13 = zext i8 %12 to i64
%14 = shl nuw nsw i64 %13, 40
%15 = or i64 %10, %14
%16 = getelementptr inbounds i8, i8* %0, i64 4
%17 = load i8, i8* %11
%18 = zext i8 %17 to i64
%19 = shl nuw nsw i64 %18, 32
%20 = or i64 %15, %19
%21 = getelementptr inbounds i8, i8* %0, i64 5
%22 = load i8, i8* %16
%23 = zext i8 %22 to i64
%24 = shl nuw nsw i64 %23, 24
%25 = or i64 %20, %24
%26 = getelementptr inbounds i8, i8* %0, i64 6
%27 = load i8, i8* %21
%28 = zext i8 %27 to i64
%29 = shl nuw nsw i64 %28, 16
%30 = getelementptr inbounds i8, i8* %0, i64 7
%31 = load i8, i8* %26
%32 = zext i8 %31 to i64
%33 = shl nuw nsw i64 %32, 8
%34 = or i64 %25, %29
%35 = load i8, i8* %30
%36 = zext i8 %35 to i64
%37 = or i64 %34, %33
%38 = or i64 %37, %36
%39 = bitcast i64 %38 to double
ret double %39
}
/* Variables and functions */
int /*<<< orphan*/ hybris_device_als_quit();
void mce_hybris_als_quit(void) { hybris_device_als_quit(); }


x86 assembly (clang, -O0):
<mce_hybris_als_quit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <hybris_device_als_quit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mce_hybris_als_quit>:
xor    %eax,%eax
jmp    1030 <hybris_device_als_quit@plt>

LLVM IR (-O0):
define void @mce_hybris_als_quit() {
%1 = call i32 (...) @hybris_device_als_quit()
ret void
}

LLVM IR (-O2):
define void @mce_hybris_als_quit() {
%1 = tail call i32 (...) @hybris_device_als_quit()
ret void
}
void LPCChannelConfigMBSet(unsigned long ulBase, unsigned long ulChannel,
                           unsigned long ulConfig, unsigned long ulAddress,
                           unsigned long ulOffset) {
  ;
  ;

  ;
  ;

  ;
  ulConfig |= (((ulOffset >> 1) << 5) & 0x00007FE0);
  ulConfig |= 0x00000001;
  (*((volatile unsigned long *)(ulBase + 0x00000010 + (ulChannel * 0x10)))) =
      ulConfig;
  (*((volatile unsigned long *)(ulBase + 0x00000018 + (ulChannel * 0x10)))) =
      ulAddress;
}


x86 assembly (clang, -O0):
<LPCChannelConfigMBSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x28(%rbp),%rax
shr    $0x1,%rax
shl    $0x5,%rax
and    $0x7fe0,%rax
or     -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
or     $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
add    $0x10,%rax
mov    -0x10(%rbp),%rdx
shl    $0x4,%rdx
add    %rdx,%rax
mov    %rcx,(%rax)
mov    -0x20(%rbp),%rcx
mov    -0x8(%rbp),%rax
add    $0x18,%rax
mov    -0x10(%rbp),%rdx
shl    $0x4,%rdx
add    %rdx,%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<LPCChannelConfigMBSet>:
shl    $0x4,%r8d
and    $0x7fe0,%r8d
or     %rdx,%r8
or     $0x1,%r8
shl    $0x4,%rsi
mov    %r8,0x10(%rsi,%rdi,1)
mov    %rcx,0x18(%rsi,%rdi,1)
ret

LLVM IR (-O0):
define void @LPCChannelConfigMBSet(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4) {
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
store i64 %0, i64* %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i64 %3, i64* %9
store i64 %4, i64* %10
%11 = load i64, i64* %10
%12 = lshr i64 %11, 1
%13 = shl i64 %12, 5
%14 = and i64 %13, 32736
%15 = load i64, i64* %8
%16 = or i64 %15, %14
store i64 %16, i64* %8
%17 = load i64, i64* %8
%18 = or i64 %17, 1
store i64 %18, i64* %8
%19 = load i64, i64* %8
%20 = load i64, i64* %6
%21 = add i64 %20, 16
%22 = load i64, i64* %7
%23 = mul i64 %22, 16
%24 = add i64 %21, %23
%25 = inttoptr i64 %24 to i64*
store volatile i64 %19, i64* %25
%26 = load i64, i64* %9
%27 = load i64, i64* %6
%28 = add i64 %27, 24
%29 = load i64, i64* %7
%30 = mul i64 %29, 16
%31 = add i64 %28, %30
%32 = inttoptr i64 %31 to i64*
store volatile i64 %26, i64* %32
ret void
}

LLVM IR (-O2):
define void @LPCChannelConfigMBSet(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4) {
%6 = shl i64 %4, 4
%7 = and i64 %6, 32736
%8 = or i64 %7, %2
%9 = or i64 %8, 1
%10 = shl i64 %1, 4
%11 = add i64 %10, %0
%12 = add i64 %11, 16
%13 = inttoptr i64 %12 to i64*
store volatile i64 %9, i64* %13
%14 = add i64 %11, 24
%15 = inttoptr i64 %14 to i64*
store volatile i64 %3, i64* %15
ret void
}
/* Variables and functions */
int strcmp(char *, char *);
int streq(const void *a, const void *b) {
  char *a2 = (char *)a;
  char *b2 = (char *)b;
  return strcmp(a2, b2);
}


x86 assembly (clang, -O0):
<streq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<streq>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @streq(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
%8 = load i8*, i8** %4
store i8* %8, i8** %6
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = call i32 @strcmp(i8* %9, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @streq(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
void index_file_name(s, i) char *s;
int i;
{ sprintf(s, "yeposidx.%i", i); }


x86 assembly (clang, -O0):
<index_file_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
lea    0xed3(%rip),%rsi
mov    $0x0,%al
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<index_file_name>:
mov    %esi,%edx
lea    0xee7(%rip),%rsi
xor    %eax,%eax
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"yeposidx.%i\00"
define void @index_file_name(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 (i8*, i8*, ...) @sprintf(i8* %5, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"yeposidx.%i\00"
define void @index_file_name(i8* nocapture writeonly %0, i32 %1) {
%3 = tail call i32 (i8*, i8*, ...) @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
void av_crc_init() {}


x86 assembly (clang, -O0):
<av_crc_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_crc_init>:
ret

LLVM IR (-O0):
define void @av_crc_init() {
ret void
}

LLVM IR (-O2):
define void @av_crc_init() {
ret void
}
int __spawnvpe(mode, cmdname, argv, envp)
int mode;
const char *cmdname;
char **argv;
const char *const *envp;
{ _spawnvpe(mode, cmdname, fix_argv(argv), envp); }


x86 assembly (clang, -O0):
<__spawnvpe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x2c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rdi
mov    $0x0,%al
call   1040 <fix_argv@plt>
mov    -0x2c(%rbp),%edi
mov    -0x28(%rbp),%rsi
mov    %eax,%edx
mov    -0x20(%rbp),%rcx
mov    $0x0,%al
call   1030 <_spawnvpe@plt>
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__spawnvpe>:
push   %rbp
push   %r14
push   %rbx
mov    %rcx,%r14
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rdx,%rdi
xor    %eax,%eax
call   1040 <fix_argv@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
mov    %r14,%rcx
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <_spawnvpe@plt>

LLVM IR (-O0):
define i32 @__spawnvpe(i32 %0, i8* %1, i8** %2, i8** %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8**
%9 = alloca i8**
store i32 %0, i32* %6
store i8* %1, i8** %7
store i8** %2, i8*** %8
store i8** %3, i8*** %9
%10 = load i32, i32* %6
%11 = load i8*, i8** %7
%12 = load i8**, i8*** %8
%13 = call i32 (i8**, ...) bitcast (i32 (...)* @fix_argv to i32 (i8**, ...)*)(i8** %12)
%14 = load i8**, i8*** %9
%15 = call i32 (i32, i8*, i32, i8**, ...) bitcast (i32 (...)* @_spawnvpe to i32 (i32, i8*, i32, i8**, ...)*)(i32 %10, i8* %11, i32 %13, i8** %14)
%16 = load i32, i32* %5
ret i32 %16
}

LLVM IR (-O2):
define i32 @__spawnvpe(i32 %0, i8* %1, i8** %2, i8** %3) {
%5 = tail call i32 (i8**, ...) bitcast (i32 (...)* @fix_argv to i32 (i8**, ...)*)(i8** %2)
%6 = tail call i32 (i32, i8*, i32, i8**, ...) bitcast (i32 (...)* @_spawnvpe to i32 (i32, i8*, i32, i8**, ...)*)(i32 %0, i8* %1, i32 %5, i8** %3)
ret i32 undef
}
/* Type definitions */
typedef scalar_t__ volatile uint32_t;

/* Variables and functions */
uint32_t volatile_fetch_add_u32(volatile uint32_t *dest, uint32_t val) {
  uint32_t result = *dest;
  *dest = result + val;
  return result;
}


x86 assembly (clang, -O0):
<volatile_fetch_add_u32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%rax
add    %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<volatile_fetch_add_u32>:
mov    %rsi,-0x8(%rsp)
mov    (%rdi),%rax
mov    %rax,-0x10(%rsp)
mov    -0x10(%rsp),%rax
add    -0x8(%rsp),%rax
mov    %rax,(%rdi)
mov    -0x10(%rsp),%rax
ret

LLVM IR (-O0):
define i64 @volatile_fetch_add_u32(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64
%5 = alloca i64
store i64* %0, i64** %3
store volatile i64 %1, i64* %4
%6 = load i64*, i64** %3
%7 = load volatile i64, i64* %6
store volatile i64 %7, i64* %5
%8 = load volatile i64, i64* %5
%9 = load volatile i64, i64* %4
%10 = add nsw i64 %8, %9
%11 = load i64*, i64** %3
store volatile i64 %10, i64* %11
%12 = load volatile i64, i64* %5
ret i64 %12
}

LLVM IR (-O2):
define i64 @volatile_fetch_add_u32(i64* %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %1, i64* %3
%5 = bitcast i64* %4 to i8*
%6 = load volatile i64, i64* %0
store volatile i64 %6, i64* %4
%7 = load volatile i64, i64* %4
%8 = load volatile i64, i64* %3
%9 = add nsw i64 %8, %7
store volatile i64 %9, i64* %0
%10 = load volatile i64, i64* %4
ret i64 %10
}
/* Variables and functions */
int /*<<< orphan*/ Msp430GpioC__4__GeneralIO__makeOutput();
void CC2420ControlP__CSN__makeOutput(void) {
  Msp430GpioC__4__GeneralIO__makeOutput();
}


x86 assembly (clang, -O0):
<CC2420ControlP__CSN__makeOutput>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Msp430GpioC__4__GeneralIO__makeOutput@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC2420ControlP__CSN__makeOutput>:
xor    %eax,%eax
jmp    1030 <Msp430GpioC__4__GeneralIO__makeOutput@plt>

LLVM IR (-O0):
define void @CC2420ControlP__CSN__makeOutput() {
%1 = call i32 (...) @Msp430GpioC__4__GeneralIO__makeOutput()
ret void
}

LLVM IR (-O2):
define void @CC2420ControlP__CSN__makeOutput() {
%1 = tail call i32 (...) @Msp430GpioC__4__GeneralIO__makeOutput()
ret void
}
unsigned long hash_djb2(unsigned char *str) {
  unsigned long hash = 5381;
  int c;
  while (c = *str++)
    hash = ((hash << 5) + hash) + c;
  return hash;
}


x86 assembly (clang, -O0):
<hash_djb2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1505,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     114a <hash_djb2+0x4a>
mov    -0x10(%rbp),%rax
shl    $0x5,%rax
add    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <hash_djb2+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_djb2>:
mov    (%rdi),%cl
test   %cl,%cl
je     112c <hash_djb2+0x2c>
add    $0x1,%rdi
mov    $0x1505,%eax
nop
mov    %rax,%rdx
shl    $0x5,%rdx
add    %rax,%rdx
movzbl %cl,%eax
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash_djb2+0x10>
ret
mov    $0x1505,%eax
ret

LLVM IR (-O0):
define i64 @hash_djb2(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
store i64 5381, i64* %3
br label %5
5: ; preds = %11, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
%9 = zext i8 %8 to i32
store i32 %9, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %5
%12 = load i64, i64* %3
%13 = shl i64 %12, 5
%14 = load i64, i64* %3
%15 = add i64 %13, %14
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = add i64 %15, %17
store i64 %18, i64* %3
br label %5
19: ; preds = %5
%20 = load i64, i64* %3
ret i64 %20
}

LLVM IR (-O2):
define i64 @hash_djb2(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = phi i64 [ %11, %4 ], [ 5381, %1 ]
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = mul i64 %7, 33
%10 = zext i8 %5 to i64
%11 = add i64 %9, %10
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ 5381, %1 ], [ %11, %4 ]
ret i64 %15
}
int zstring_search_chr(const char *token, char s) {
  if (s == '\0')
    return 0;
  for (; *token; token++)
    if (*token == s)
      return 1;
  return 0;
}


x86 assembly (clang, -O0):
<zstring_search_chr>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
movsbl -0x11(%rbp),%eax
cmp    $0x0,%eax
jne    1127 <zstring_search_chr+0x27>
movl   $0x0,-0x4(%rbp)
jmp    1175 <zstring_search_chr+0x75>
jmp    112c <zstring_search_chr+0x2c>
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     116e <zstring_search_chr+0x6e>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x11(%rbp),%ecx
cmp    %ecx,%eax
jne    1158 <zstring_search_chr+0x58>
movl   $0x1,-0x4(%rbp)
jmp    1175 <zstring_search_chr+0x75>
jmp    115d <zstring_search_chr+0x5d>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    112c <zstring_search_chr+0x2c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zstring_search_chr>:
xor    %eax,%eax
test   %sil,%sil
je     1130 <zstring_search_chr+0x30>
mov    (%rdi),%cl
test   %cl,%cl
je     1130 <zstring_search_chr+0x30>
add    $0x1,%rdi
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
cmp    %sil,%cl
je     1131 <zstring_search_chr+0x31>
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1120 <zstring_search_chr+0x20>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @zstring_search_chr(i8* %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 0, i32* %3
br label %28
10: ; preds = %2
br label %11
11: ; preds = %24, %10
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = icmp ne i8 %13, 0
br i1 %14, label %15, label %27
15: ; preds = %11
%16 = load i8*, i8** %4
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = load i8, i8* %5
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %18, %20
br i1 %21, label %22, label %23
22: ; preds = %15
store i32 1, i32* %3
br label %28
23: ; preds = %15
br label %24
24: ; preds = %23
%25 = load i8*, i8** %4
%26 = getelementptr inbounds i8, i8* %25, i32 1
store i8* %26, i8** %4
br label %11
27: ; preds = %11
store i32 0, i32* %3
br label %28
28: ; preds = %27, %22, %9
%29 = load i32, i32* %3
ret i32 %29
}

LLVM IR (-O2):
define i32 @zstring_search_chr(i8* nocapture %0, i8 signext %1) {
%3 = icmp eq i8 %1, 0
br i1 %3, label %15, label %4
4: ; preds = %2
%5 = load i8, i8* %0
%6 = icmp eq i8 %5, 0
br i1 %6, label %15, label %10
7: ; preds = %10
%8 = load i8, i8* %14
%9 = icmp eq i8 %8, 0
br i1 %9, label %15, label %10
10: ; preds = %4, %7
%11 = phi i8 [ %8, %7 ], [ %5, %4 ]
%12 = phi i8* [ %14, %7 ], [ %0, %4 ]
%13 = icmp eq i8 %11, %1
%14 = getelementptr inbounds i8, i8* %12, i64 1
br i1 %13, label %15, label %7
15: ; preds = %10, %7, %4, %2
%16 = phi i32 [ 0, %2 ], [ 0, %4 ], [ 1, %10 ], [ 0, %7 ]
ret i32 %16
}
void ff_hevc_put_hevc_uni_w_epel_h6_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_epel_h6_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_epel_h6_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_epel_h6_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_epel_h6_10_sse4() {
ret void
}
int f(struct s *p) { return sizeof(p); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0x8,%eax
ret

LLVM IR (-O0):
%struct.s = type opaque
define i32 @f(%struct.s* %0) {
%2 = alloca %struct.s*
store %struct.s* %0, %struct.s** %2
ret i32 8
}

LLVM IR (-O2):
%struct.s = type opaque
define i32 @f(%struct.s* nocapture readnone %0) {
ret i32 8
}
unsigned short test4(unsigned short a) {
  a ^= 0x8002;
  a >>= 1;
  a |= 0x8000;
  return a;
}


x86 assembly (clang, -O0):
<test4>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
xor    $0x8002,%eax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
sar    $0x1,%eax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
or     $0x8000,%eax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test4>:
mov    %edi,%eax
shr    %eax
xor    $0xc001,%eax
ret

LLVM IR (-O0):
define zeroext i16 @test4(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = xor i32 %4, 32770
%6 = trunc i32 %5 to i16
store i16 %6, i16* %2
%7 = load i16, i16* %2
%8 = zext i16 %7 to i32
%9 = ashr i32 %8, 1
%10 = trunc i32 %9 to i16
store i16 %10, i16* %2
%11 = load i16, i16* %2
%12 = zext i16 %11 to i32
%13 = or i32 %12, 32768
%14 = trunc i32 %13 to i16
store i16 %14, i16* %2
%15 = load i16, i16* %2
ret i16 %15
}

LLVM IR (-O2):
define zeroext i16 @test4(i16 zeroext %0) {
%2 = lshr i16 %0, 1
%3 = xor i16 %2, -16383
ret i16 %3
}
/* Variables and functions */
double log(int);
double boltzmannAnnealing(double T0, double t) { return T0 / log(1 + t); }


x86 assembly (clang, -O0):
<boltzmannAnnealing>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xecc(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
cvttsd2si %xmm0,%edi
call   1030 <log@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<boltzmannAnnealing>:
push   %rax
movsd  %xmm0,(%rsp)
addsd  0xee2(%rip),%xmm1
cvttsd2si %xmm1,%edi
call   1030 <log@plt>
movsd  (%rsp),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @boltzmannAnnealing(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fadd double 1.000000e+00, %6
%8 = fptosi double %7 to i32
%9 = call double @log(i32 %8)
%10 = fdiv double %5, %9
ret double %10
}

LLVM IR (-O2):
define double @boltzmannAnnealing(double %0, double %1) {
%3 = fadd double %1, 1.000000e+00
%4 = fptosi double %3 to i32
%5 = tail call double @log(i32 %4)
%6 = fdiv double %0, %5
ret double %6
}
int input_map_b2(char c) {
  if (c == 'c')
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<input_map_b2>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x63,%eax
jne    1123 <input_map_b2+0x23>
movl   $0x1,-0x4(%rbp)
jmp    112a <input_map_b2+0x2a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<input_map_b2>:
xor    %eax,%eax
cmp    $0x63,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @input_map_b2(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 99
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @input_map_b2(i8 signext %0) {
%2 = icmp eq i8 %0, 99
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int atoi(char *);
int map_value(int, int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ write_file(char *, char *);
int main(int argc, char **argv) {
  int value = atoi(argv[1]);
  int result = map_value(value, 3);
  printf("%d\n", result);
  write_file("/proc/sys/vm/laptop_mode", "5");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1060 <atoi@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    $0x3,%esi
call   1050 <map_value@plt>
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%esi
lea    0xe80(%rip),%rdi
call   1030 <printf@plt>
lea    0xe78(%rip),%rdi
lea    0xe8a(%rip),%rsi
call   1040 <write_file@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rdi
call   1060 <atoi@plt>
mov    %eax,%edi
mov    $0x3,%esi
call   1050 <map_value@plt>
lea    0xea3(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
lea    0xe99(%rip),%rdi
lea    0xeab(%rip),%rsi
call   1040 <write_file@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
@.str.1 = [25 x i8] c"/proc/sys/vm/laptop_mode\00"
@.str.2 = [2 x i8] c"5\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = load i8**, i8*** %5
%9 = getelementptr inbounds i8*, i8** %8, i64 1
%10 = load i8*, i8** %9
%11 = call i32 @atoi(i8* %10)
store i32 %11, i32* %6
%12 = load i32, i32* %6
%13 = call i32 @map_value(i32 %12, i32 3)
store i32 %13, i32* %7
%14 = load i32, i32* %7
%15 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %14)
%16 = call i32 @write_file(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
@.str.1 = [25 x i8] c"/proc/sys/vm/laptop_mode\00"
@.str.2 = [2 x i8] c"5\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @atoi(i8* %4)
%6 = tail call i32 @map_value(i32 %5, i32 3)
%7 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = tail call i32 @write_file(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Error(int, char *, char *);
scalar_t__ malloc(size_t);
void *Pmalloc(size_t Bytes) {
  void *p = 0;
  if (!Bytes || (p = (void *)malloc(Bytes))) {
    return p;
  }
  Error(11, "", "");
  return 0;
}


x86 assembly (clang, -O0):
<Pmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1156 <Pmalloc+0x36>
mov    -0x10(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
je     1163 <Pmalloc+0x43>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    117f <Pmalloc+0x5f>
mov    $0xb,%edi
lea    0xe91(%rip),%rdx
mov    %rdx,%rsi
call   1030 <Error@plt>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Pmalloc>:
push   %rax
test   %rdi,%rdi
je     1146 <Pmalloc+0x26>
call   1040 <malloc@plt>
test   %rax,%rax
je     1132 <Pmalloc+0x12>
pop    %rcx
ret
lea    0xec7(%rip),%rdx
mov    $0xb,%edi
mov    %rdx,%rsi
call   1030 <Error@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @Pmalloc(i64 %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
store i8* null, i8** %4
%5 = load i64, i64* %3
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i64, i64* %3
%9 = call i64 @malloc(i64 %8)
%10 = inttoptr i64 %9 to i8*
store i8* %10, i8** %4
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %14
12: ; preds = %7, %1
%13 = load i8*, i8** %4
store i8* %13, i8** %2
br label %16
14: ; preds = %7
%15 = call i32 @Error(i32 11, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
store i8* null, i8** %2
br label %16
16: ; preds = %14, %12
%17 = load i8*, i8** %2
ret i8* %17
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @Pmalloc(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = tail call i64 @malloc(i64 %0)
%5 = inttoptr i64 %4 to i8*
%6 = icmp eq i64 %4, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = tail call i32 @Error(i32 11, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %1, %3, %7
%10 = phi i8* [ null, %7 ], [ %5, %3 ], [ null, %1 ]
ret i8* %10
}
/* Variables and functions */
int f69(int *);
int f70(int *p) { return f69(p); }


x86 assembly (clang, -O0):
<f70>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f69@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f70>:
jmp    1030 <f69@plt>

LLVM IR (-O0):
define i32 @f70(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f69(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f70(i32* %0) {
%2 = tail call i32 @f69(i32* %0)
ret i32 %2
}
const char *vpx_codec_version_extra_str(void) { return "125-g667138e1f"; }


x86 assembly (clang, -O0):
<vpx_codec_version_extra_str>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vpx_codec_version_extra_str>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [15 x i8] c"125-g667138e1f\00"
define i8* @vpx_codec_version_extra_str() {
ret i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [15 x i8] c"125-g667138e1f\00"
define i8* @vpx_codec_version_extra_str() {
ret i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
scalar_t__ test_all_lexer_f64();
int main(int argc, char **argv) {
  int err = 0;
  (void)argc;
  (void)argv;
  err = err || test_all_lexer_f64();
  return err;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    $0x1,%al
cmpl   $0x0,-0x14(%rbp)
mov    %al,-0x15(%rbp)
jne    114d <main+0x3d>
mov    $0x0,%al
call   1030 <test_all_lexer_f64@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_all_lexer_f64@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
%7 = load i32, i32* %4
%8 = load i8**, i8*** %5
%9 = load i32, i32* %6
%10 = icmp ne i32 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %2
%12 = call i64 (...) @test_all_lexer_f64()
%13 = icmp ne i64 %12, 0
br label %14
14: ; preds = %11, %2
%15 = phi i1 [ true, %2 ], [ %13, %11 ]
%16 = zext i1 %15 to i32
store i32 %16, i32* %6
%17 = load i32, i32* %6
ret i32 %17
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 (...) @test_all_lexer_f64()
%4 = icmp ne i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
unsigned long long hashit(char *str) {
  unsigned long long hash = 0;
  int c;
  while ((c = *str++))
    hash = c + (hash << 6) + (hash << 16) - hash;
  return (hash);
}


x86 assembly (clang, -O0):
<hashit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     1155 <hashit+0x55>
movslq -0x14(%rbp),%rax
mov    -0x10(%rbp),%rcx
shl    $0x6,%rcx
add    %rcx,%rax
mov    -0x10(%rbp),%rcx
shl    $0x10,%rcx
add    %rcx,%rax
sub    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <hashit+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashit>:
mov    (%rdi),%cl
test   %cl,%cl
je     112a <hashit+0x2a>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
movsbq %cl,%rcx
imul   $0x1003f,%rax,%rax
add    %rcx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hashit+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @hashit(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
store i64 0, i64* %3
br label %5
5: ; preds = %11, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
store i32 %9, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %22
11: ; preds = %5
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = load i64, i64* %3
%15 = shl i64 %14, 6
%16 = add i64 %13, %15
%17 = load i64, i64* %3
%18 = shl i64 %17, 16
%19 = add i64 %16, %18
%20 = load i64, i64* %3
%21 = sub i64 %19, %20
store i64 %21, i64* %3
br label %5
22: ; preds = %5
%23 = load i64, i64* %3
ret i64 %23
}

LLVM IR (-O2):
define i64 @hashit(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = phi i64 [ %11, %4 ], [ 0, %1 ]
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = sext i8 %5 to i64
%10 = mul i64 %7, 65599
%11 = add i64 %10, %9
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ 0, %1 ], [ %11, %4 ]
ret i64 %15
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int x = 0;
  int y = 234;
  assert(!x);
  assert(!!y);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0xea,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
cmpl   $0x0,-0xc(%rbp)
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 234, i32* %3
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i32, i32* %3
%10 = icmp ne i32 %9, 0
%11 = xor i1 %10, true
%12 = xor i1 %11, true
%13 = zext i1 %12 to i32
%14 = call i32 @assert(i32 %13)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
%2 = tail call i32 @assert(i32 1)
ret i32 0
}
void seedRand(unsigned int bytes) {}


x86 assembly (clang, -O0):
<seedRand>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<seedRand>:
ret

LLVM IR (-O0):
define void @seedRand(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @seedRand(i32 %0) {
ret void
}
/* Type definitions */
typedef scalar_t__ gid_t;

/* Variables and functions */
int setgid(scalar_t__);
int test(void) {
  gid_t gid;
  int result;
  gid = 0;
  result = setgid(gid);
  return result;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <setgid@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
xor    %edi,%edi
jmp    1030 <setgid@plt>

LLVM IR (-O0):
define i32 @test() {
%1 = alloca i64
%2 = alloca i32
store i64 0, i64* %1
%3 = load i64, i64* %1
%4 = call i32 @setgid(i64 %3)
store i32 %4, i32* %2
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
define i32 @test() {
%1 = tail call i32 @setgid(i64 0)
ret i32 %1
}
void test32_Blink2_targetInit__I() {}


x86 assembly (clang, -O0):
<test32_Blink2_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test32_Blink2_targetInit__I>:
ret

LLVM IR (-O0):
define void @test32_Blink2_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test32_Blink2_targetInit__I() {
ret void
}
/* Type definitions */
typedef int __u8;

/* Variables and functions */
unsigned int get_sector_count(__u8 *ext_csd) {
  return (ext_csd[215] << 24) | (ext_csd[214] << 16) | (ext_csd[213] << 8) |
         ext_csd[212];
}


x86 assembly (clang, -O0):
<get_sector_count>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x35c(%rax),%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
mov    0x358(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x354(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
or     0x350(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_sector_count>:
mov    0x35c(%rdi),%ecx
shl    $0x18,%ecx
mov    0x354(%rdi),%eax
mov    0x358(%rdi),%edx
shl    $0x10,%edx
or     %ecx,%edx
shl    $0x8,%eax
or     %edx,%eax
or     0x350(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @get_sector_count(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 215
%5 = load i32, i32* %4
%6 = shl i32 %5, 24
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 214
%9 = load i32, i32* %8
%10 = shl i32 %9, 16
%11 = or i32 %6, %10
%12 = load i32*, i32** %2
%13 = getelementptr inbounds i32, i32* %12, i64 213
%14 = load i32, i32* %13
%15 = shl i32 %14, 8
%16 = or i32 %11, %15
%17 = load i32*, i32** %2
%18 = getelementptr inbounds i32, i32* %17, i64 212
%19 = load i32, i32* %18
%20 = or i32 %16, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @get_sector_count(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 215
%3 = load i32, i32* %2
%4 = shl i32 %3, 24
%5 = getelementptr inbounds i32, i32* %0, i64 214
%6 = load i32, i32* %5
%7 = shl i32 %6, 16
%8 = or i32 %7, %4
%9 = getelementptr inbounds i32, i32* %0, i64 213
%10 = load i32, i32* %9
%11 = shl i32 %10, 8
%12 = or i32 %8, %11
%13 = getelementptr inbounds i32, i32* %0, i64 212
%14 = load i32, i32* %13
%15 = or i32 %12, %14
ret i32 %15
}
/* Variables and functions */
long udivmodsi4(long, long, int /*<<< orphan*/);
long __udivsi3(long a, long b) { return udivmodsi4(a, b, 0); }


x86 assembly (clang, -O0):
<__udivsi3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <udivmodsi4@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__udivsi3>:
xor    %edx,%edx
jmp    1030 <udivmodsi4@plt>

LLVM IR (-O0):
define i64 @__udivsi3(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i64 @udivmodsi4(i64 %5, i64 %6, i32 0)
ret i64 %7
}

LLVM IR (-O2):
define i64 @__udivsi3(i64 %0, i64 %1) {
%3 = tail call i64 @udivmodsi4(i64 %0, i64 %1, i32 0)
ret i64 %3
}
double Lflat_lim(const double dp, const double dm) { return 0.0; }


x86 assembly (clang, -O0):
<Lflat_lim>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Lflat_lim>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @Lflat_lim(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
ret double 0.000000e+00
}

LLVM IR (-O2):
define double @Lflat_lim(double %0, double %1) {
ret double 0.000000e+00
}
char readChar(char **pptr) {
  char c = **pptr;
  (*pptr)++;
  return c;
}


x86 assembly (clang, -O0):
<readChar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%al
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
movsbl -0x9(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readChar>:
mov    (%rdi),%rcx
mov    (%rcx),%al
add    $0x1,%rcx
mov    %rcx,(%rdi)
ret

LLVM IR (-O0):
define signext i8 @readChar(i8** %0) {
%2 = alloca i8**
%3 = alloca i8
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
%6 = load i8, i8* %5
store i8 %6, i8* %3
%7 = load i8**, i8*** %2
%8 = load i8*, i8** %7
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %7
%10 = load i8, i8* %3
ret i8 %10
}

LLVM IR (-O2):
define signext i8 @readChar(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = load i8, i8* %2
%4 = getelementptr inbounds i8, i8* %2, i64 1
store i8* %4, i8** %0
ret i8 %3
}
int Operand_xt_wbr15_label_encode(unsigned int *valp) {
  unsigned xt_wbr15_imm_0, xt_wbr15_label_0;
  xt_wbr15_label_0 = *valp;
  xt_wbr15_imm_0 = (xt_wbr15_label_0 - 0x4) & 0x7fff;
  *valp = xt_wbr15_imm_0;
  return 0;
}


x86 assembly (clang, -O0):
<Operand_xt_wbr15_label_encode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
sub    $0x4,%eax
and    $0x7fff,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Operand_xt_wbr15_label_encode>:
mov    $0x7ffc,%eax
add    (%rdi),%eax
and    $0x7fff,%eax
mov    %eax,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Operand_xt_wbr15_label_encode(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = sub i32 %7, 4
%9 = and i32 %8, 32767
store i32 %9, i32* %3
%10 = load i32, i32* %3
%11 = load i32*, i32** %2
store i32 %10, i32* %11
ret i32 0
}

LLVM IR (-O2):
define i32 @Operand_xt_wbr15_label_encode(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = add i32 %2, 32764
%4 = and i32 %3, 32767
store i32 %4, i32* %0
ret i32 0
}
/* Variables and functions */
unsigned char hex_get(unsigned char);
unsigned char hex_get_from_bcd(unsigned char bcd_data[2]) {
  unsigned char ret;
  ret = hex_get(bcd_data[0]);
  ret = ret << 4;
  ret += hex_get(bcd_data[1]);
  return ret;
}


x86 assembly (clang, -O0):
<hex_get_from_bcd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edi
call   1030 <hex_get@plt>
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
shl    $0x4,%eax
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x1(%rax),%edi
call   1030 <hex_get@plt>
movzbl %al,%ecx
movzbl -0x9(%rbp),%eax
add    %ecx,%eax
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hex_get_from_bcd>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
movzbl (%rdi),%edi
call   1030 <hex_get@plt>
mov    %eax,%ebx
shl    $0x4,%bl
movzbl 0x1(%r14),%edi
call   1030 <hex_get@plt>
add    %bl,%al
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define zeroext i8 @hex_get_from_bcd(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = call zeroext i8 @hex_get(i8 zeroext %6)
store i8 %7, i8* %3
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = shl i32 %9, 4
%11 = trunc i32 %10 to i8
store i8 %11, i8* %3
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i64 1
%14 = load i8, i8* %13
%15 = call zeroext i8 @hex_get(i8 zeroext %14)
%16 = zext i8 %15 to i32
%17 = load i8, i8* %3
%18 = zext i8 %17 to i32
%19 = add nsw i32 %18, %16
%20 = trunc i32 %19 to i8
store i8 %20, i8* %3
%21 = load i8, i8* %3
ret i8 %21
}

LLVM IR (-O2):
define zeroext i8 @hex_get_from_bcd(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = tail call zeroext i8 @hex_get(i8 zeroext %2)
%4 = shl i8 %3, 4
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = tail call zeroext i8 @hex_get(i8 zeroext %6)
%8 = add i8 %7, %4
ret i8 %8
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *,
                           char const *);
int /*<<< orphan*/ stderr;
void usage(char const *progname) {
  fprintf(
      stderr,
      "[ERROR] %s: Usage: %s /sysfs/path/to/device | /path/to/device/node\n",
      progname, progname);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x8(%rbp),%rcx
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rcx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
mov    %rcx,%rdx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [68 x i8] c"[ERROR] %s: Usage: %s /sysfs/path/to/device | /path/to/device/node\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([68 x i8], [68 x i8]* @.str, i64 0, i64 0), i8* %4, i8* %5)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [68 x i8] c"[ERROR] %s: Usage: %s /sysfs/path/to/device | /path/to/device/node\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([68 x i8], [68 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_help_ce() {
  printf(
      "\nHELP: ./crossEntropy options \n\n"
      "mandatory:\n"
      "        -x genotype_file      -- genotype file (in .geno format)\n"
      "        -K K                  -- the number of ancestral populations\n\n"
      "optional:\n"
      "        -h                    -- help\n"
      "        -m ploidy             -- 1 if haploid, 2 if diploid     	 "
      "(default: 2)\n"
      "        -q input_file_I.Q     -- individual admixture coefficient file "
      "(default: genotype_file_I.K.Q)\n"
      "        -g input_file_I.F     -- ancestral genotype frequency file "
      "	 (default: genotype_file_I.K.G)\n"
      "        -i input_file_I.geno  -- genotype file with masked genotypes "
      "	 (default: genotype_file_I.geno)\n\n");
}


x86 assembly (clang, -O0):
<print_help_ce>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_help_ce>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [613 x i8] c"\0AHELP: ./crossEntropy\C2\A0options \0A\0Amandatory:\0A -x genotype_file -- genotype file (in .geno format)\0A -K K -- the number of ancestral populations\0A\0Aoptional:\0A -h -- help\0A -m ploidy -- 1 if haploid, 2 if diploid \09 (default: 2)\0A -q input_file_I.Q -- individual admixture coefficient file (default: genotype_file_I.K.Q)\0A -g input_file_I.F -- ancestral genotype frequency file \09 (default: genotype_file_I.K.G)\0A -i input_file_I.geno -- genotype file with masked genotypes \09 (default: genotype_file_I.geno)\0A\0A\00"
define void @print_help_ce() {
%1 = call i32 @printf(i8* getelementptr inbounds ([613 x i8], [613 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [612 x i8] c"\0AHELP: ./crossEntropy\C2\A0options \0A\0Amandatory:\0A -x genotype_file -- genotype file (in .geno format)\0A -K K -- the number of ancestral populations\0A\0Aoptional:\0A -h -- help\0A -m ploidy -- 1 if haploid, 2 if diploid \09 (default: 2)\0A -q input_file_I.Q -- individual admixture coefficient file (default: genotype_file_I.K.Q)\0A -g input_file_I.F -- ancestral genotype frequency file \09 (default: genotype_file_I.K.G)\0A -i input_file_I.geno -- genotype file with masked genotypes \09 (default: genotype_file_I.geno)\0A\00"
define void @print_help_ce() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([612 x i8], [612 x i8]* @str, i64 0, i64 0))
ret void
}
void reg2value(unsigned char b1, unsigned char b2, int *val) {
  *val = (b1 << 2) | (b2 >> 6);
}


x86 assembly (clang, -O0):
<reg2value>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    %rdx,-0x10(%rbp)
movzbl -0x1(%rbp),%ecx
shl    $0x2,%ecx
movzbl -0x2(%rbp),%eax
sar    $0x6,%eax
or     %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg2value>:
shr    $0x6,%sil
movzbl %sil,%eax
lea    (%rax,%rdi,4),%eax
mov    %eax,(%rdx)
ret

LLVM IR (-O0):
define void @reg2value(i8 zeroext %0, i8 zeroext %1, i32* %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i32*
store i8 %0, i8* %4
store i8 %1, i8* %5
store i32* %2, i32** %6
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
%9 = shl i32 %8, 2
%10 = load i8, i8* %5
%11 = zext i8 %10 to i32
%12 = ashr i32 %11, 6
%13 = or i32 %9, %12
%14 = load i32*, i32** %6
store i32 %13, i32* %14
ret void
}

LLVM IR (-O2):
define void @reg2value(i8 zeroext %0, i8 zeroext %1, i32* nocapture writeonly %2) {
%4 = zext i8 %0 to i32
%5 = shl nuw nsw i32 %4, 2
%6 = lshr i8 %1, 6
%7 = zext i8 %6 to i32
%8 = or i32 %5, %7
store i32 %8, i32* %2
ret void
}