char *specialregister(unsigned short int code) {
  switch (code & 0xFFF) {
  case 0x000:
    return ("sfc");
  case 0x001:
    return ("dfc");
  case 0x800:
    return ("usp");
  case 0x801:
    return ("vbr");
  }
  return ("???");
}


x86 assembly (clang, -O0):
<specialregister>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0xa(%rbp)
movzwl -0xa(%rbp),%eax
and    $0xfff,%eax
mov    %eax,-0x10(%rbp)
je     1159 <specialregister+0x59>
jmp    1122 <specialregister+0x22>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
je     1169 <specialregister+0x69>
jmp    1133 <specialregister+0x33>
mov    -0x10(%rbp),%eax
sub    $0x800,%eax
je     1179 <specialregister+0x79>
jmp    1146 <specialregister+0x46>
mov    -0x10(%rbp),%eax
sub    $0x801,%eax
je     1189 <specialregister+0x89>
jmp    1199 <specialregister+0x99>
lea    0xea0(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    11a4 <specialregister+0xa4>
lea    0xe94(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    11a4 <specialregister+0xa4>
lea    0xe88(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    11a4 <specialregister+0xa4>
lea    0xe7c(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    11a4 <specialregister+0xa4>
lea    0xe70(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<specialregister>:
and    $0xfff,%edi
cmp    $0x7ff,%edi
jg     111f <specialregister+0x1f>
test   %edi,%edi
je     113f <specialregister+0x3f>
cmp    $0x1,%edi
jne    1137 <specialregister+0x37>
lea    0xee6(%rip),%rax
ret
cmp    $0x800,%edi
je     1147 <specialregister+0x47>
cmp    $0x801,%edi
jne    1137 <specialregister+0x37>
lea    0xed6(%rip),%rax
ret
lea    0xed2(%rip),%rax
ret
lea    0xeba(%rip),%rax
ret
lea    0xeba(%rip),%rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"sfc\00"
@.str.1 = [4 x i8] c"dfc\00"
@.str.2 = [4 x i8] c"usp\00"
@.str.3 = [4 x i8] c"vbr\00"
@.str.4 = [4 x i8] c"???\00"
define i8* @specialregister(i16 zeroext %0) {
%2 = alloca i8*
%3 = alloca i16
store i16 %0, i16* %3
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 4095
switch i32 %6, label %11 [
i32 0, label %7
i32 1, label %8
i32 2048, label %9
i32 2049, label %10
]
7: ; preds = %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %2
br label %12
8: ; preds = %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %12
9: ; preds = %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i8** %2
br label %12
10: ; preds = %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.3, i64 0, i64 0), i8** %2
br label %12
11: ; preds = %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.4, i64 0, i64 0), i8** %2
br label %12
12: ; preds = %11, %10, %9, %8, %7
%13 = load i8*, i8** %2
ret i8* %13
}

LLVM IR (-O2):
@.str = [4 x i8] c"sfc\00"
@.str.1 = [4 x i8] c"dfc\00"
@.str.2 = [4 x i8] c"usp\00"
@.str.3 = [4 x i8] c"vbr\00"
@.str.4 = [4 x i8] c"???\00"
define i8* @specialregister(i16 zeroext %0) {
%2 = and i16 %0, 4095
%3 = zext i16 %2 to i32
switch i32 %3, label %7 [
i32 0, label %8
i32 1, label %4
i32 2048, label %5
i32 2049, label %6
]
4: ; preds = %1
br label %8
5: ; preds = %1
br label %8
6: ; preds = %1
br label %8
7: ; preds = %1
br label %8
8: ; preds = %1, %7, %6, %5, %4
%9 = phi i8* [ getelementptr inbounds ([4 x i8], [4 x i8]* @.str.4, i64 0, i64 0), %7 ], [ getelementptr inbounds ([4 x i8], [4 x i8]* @.str.3, i64 0, i64 0), %6 ], [ getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), %5 ], [ getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), %4 ], [ getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), %1 ]
ret i8* %9
}