xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ perror(char const *);
int /*<<< orphan*/ stderr;
void report_error_and_exit(int errno, const char *msg) {
  fprintf(stderr, "Runtime error\n");
  perror(msg);
  exit(errno);
}


x86 assembly (clang, -O0):
<report_error_and_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2e9a(%rip),%rax
mov    (%rax),%edi
lea    0xeb1(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x10(%rbp),%rdi
call   1040 <perror@plt>
mov    -0x4(%rbp),%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<report_error_and_exit>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    0x2ea1(%rip),%rax
mov    (%rax),%edi
lea    0xeb8(%rip),%rsi
call   1030 <fprintf@plt>
mov    %rbx,%rdi
call   1040 <perror@plt>
mov    %ebp,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [15 x i8] c"Runtime error\0A\00"
define void @report_error_and_exit(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* @stderr
%6 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%7 = load i8*, i8** %4
%8 = call i32 @perror(i8* %7)
%9 = load i32, i32* %3
%10 = call i32 @exit(i32 %9)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [15 x i8] c"Runtime error\0A\00"
define void @report_error_and_exit(i32 %0, i8* nocapture %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 @perror(i8* %1)
%6 = tail call i32 @exit(i32 %0)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ fexcept_t;

/* Variables and functions */
int fesetexceptflag(const fexcept_t *flagp, int excepts) {
  if (excepts == 0)
    return 0;
  return -1;
}


x86 assembly (clang, -O0):
<fesetexceptflag>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    1121 <fesetexceptflag+0x21>
movl   $0x0,-0x4(%rbp)
jmp    1128 <fesetexceptflag+0x28>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fesetexceptflag>:
neg    %esi
sbb    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fesetexceptflag(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 0, i32* %3
br label %10
9: ; preds = %2
store i32 -1, i32* %3
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @fesetexceptflag(i32* nocapture readnone %0, i32 %1) {
%3 = icmp ne i32 %1, 0
%4 = sext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
char *av_malloc(int);
int /*<<< orphan*/ memcpy(char *, char const *, int);
int strlen(char const *);
char *av_strdup(const char *s) {
  char *ptr;
  int len;
  len = strlen(s) + 1;
  ptr = av_malloc(len);
  if (ptr)
    memcpy(ptr, s, len);
  return ptr;
}


x86 assembly (clang, -O0):
<av_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1030 <av_malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1172 <av_strdup+0x42>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1050 <memcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_strdup>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
call   1040 <strlen@plt>
mov    %eax,%ebp
add    $0x1,%ebp
mov    %ebp,%edi
call   1030 <av_malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     115d <av_strdup+0x2d>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %ebp,%edx
call   1050 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @av_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = add nsw i32 %6, 1
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = call i8* @av_malloc(i32 %8)
store i8* %9, i8** %3
%10 = load i8*, i8** %3
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %17
12: ; preds = %1
%13 = load i8*, i8** %3
%14 = load i8*, i8** %2
%15 = load i32, i32* %4
%16 = call i32 @memcpy(i8* %13, i8* %14, i32 %15)
br label %17
17: ; preds = %12, %1
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
define i8* @av_strdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = tail call i8* @av_malloc(i32 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @memcpy(i8* %4, i8* %0, i32 %3)
br label %8
8: ; preds = %6, %1
ret i8* %4
}
/* Variables and functions */
int getpid();
int /*<<< orphan*/ printf(char *, int, int);
void sig_handler(int signo) {
  printf("signal #%d trapped. To quit, use `kill -9 %u`\n", signo, getpid());
}


x86 assembly (clang, -O0):
<sig_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    -0x8(%rbp),%esi
mov    %eax,%edx
lea    0xebc(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_handler>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xecf(%rip),%rdi
mov    %ebx,%esi
mov    %eax,%edx
pop    %rbx
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [47 x i8] c"signal #%d trapped. To quit, use `kill -9 %u`\0A\00"
define void @sig_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (...) @getpid()
%5 = call i32 @printf(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %4)
ret void
}

LLVM IR (-O2):
@.str = [47 x i8] c"signal #%d trapped. To quit, use `kill -9 %u`\0A\00"
define void @sig_handler(i32 %0) {
%2 = tail call i32 (...) @getpid()
%3 = tail call i32 @printf(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %2)
ret void
}
putstr(str) { printf("%s", str); }


x86 assembly (clang, -O0):
<putstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xedb(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putstr>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i32 @putstr(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i32 @putstr(i32 %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ syscall(int, char const *, char *, size_t);
ssize_t readlink(const char *path, char *buf, size_t bufsize) {
  return syscall(89, path, buf, bufsize);
}


x86 assembly (clang, -O0):
<readlink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x59,%edi
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readlink>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x59,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @readlink(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @syscall(i32 89, i8* %7, i8* %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @readlink(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @syscall(i32 89, i8* %0, i8* %1, i64 %2)
ret i32 %4
}
void GC_used_heap_size_after_full(void) {}


x86 assembly (clang, -O0):
<GC_used_heap_size_after_full>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GC_used_heap_size_after_full>:
ret

LLVM IR (-O0):
define void @GC_used_heap_size_after_full() {
ret void
}

LLVM IR (-O2):
define void @GC_used_heap_size_after_full() {
ret void
}
/* Variables and functions */
long double fmax(long double x, long double y) {
  if (x > y)
    return x;
  else
    return y;
}


x86 assembly (clang, -O0):
<fmax>:
push   %rbp
mov    %rsp,%rbp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x20(%rbp)
fstpt  -0x30(%rbp)
fldt   -0x20(%rbp)
fldt   -0x30(%rbp)
fxch   %st(1)
fucomip %st(1),%st
fstp   %st(0)
jbe    1132 <fmax+0x32>
jmp    1127 <fmax+0x27>
fldt   -0x20(%rbp)
fstpt  -0x10(%rbp)
jmp    1138 <fmax+0x38>
fldt   -0x30(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmax>:
fldt   0x18(%rsp)
fldt   0x8(%rsp)
fucomi %st(1),%st
fxch   %st(1)
fcmovnbe %st(1),%st
fstp   %st(1)
ret

LLVM IR (-O0):
define x86_fp80 @fmax(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
%5 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %4
store x86_fp80 %1, x86_fp80* %5
%6 = load x86_fp80, x86_fp80* %4
%7 = load x86_fp80, x86_fp80* %5
%8 = fcmp ogt x86_fp80 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load x86_fp80, x86_fp80* %4
store x86_fp80 %10, x86_fp80* %3
br label %13
11: ; preds = %2
%12 = load x86_fp80, x86_fp80* %5
store x86_fp80 %12, x86_fp80* %3
br label %13
13: ; preds = %11, %9
%14 = load x86_fp80, x86_fp80* %3
ret x86_fp80 %14
}

LLVM IR (-O2):
define x86_fp80 @fmax(x86_fp80 %0, x86_fp80 %1) {
%3 = fcmp ogt x86_fp80 %0, %1
%4 = select i1 %3, x86_fp80 %0, x86_fp80 %1
ret x86_fp80 %4
}
/* Variables and functions */
char toupper(char);
int ToNucleo(char c) {
  c = toupper(c);
  switch (c) {
  case 'A':
    return 0;
  case 'C':
    return 1;
  case 'G':
    return 2;
  case 'T':
    return 3;
  case '-':
    return 4;
  }
  return -1;
}


x86 assembly (clang, -O0):
<ToNucleo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%edi
call   1030 <toupper@plt>
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
add    $0xffffffd3,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x27,%eax
ja     1190 <ToNucleo+0x80>
mov    -0x10(%rbp),%rax
lea    0xeb5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x0,-0x4(%rbp)
jmp    1197 <ToNucleo+0x87>
movl   $0x1,-0x4(%rbp)
jmp    1197 <ToNucleo+0x87>
movl   $0x2,-0x4(%rbp)
jmp    1197 <ToNucleo+0x87>
movl   $0x3,-0x4(%rbp)
jmp    1197 <ToNucleo+0x87>
movl   $0x4,-0x4(%rbp)
jmp    1197 <ToNucleo+0x87>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ToNucleo>:
push   %rax
call   1030 <toupper@plt>
movsbl %al,%ecx
add    $0xffffffd3,%ecx
cmp    $0x27,%ecx
ja     113a <ToNucleo+0x2a>
xor    %eax,%eax
lea    0xed6(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
mov    $0x4,%eax
pop    %rcx
ret
mov    $0xffffffff,%eax
pop    %rcx
ret
mov    $0x1,%eax
pop    %rcx
ret
mov    $0x2,%eax
pop    %rcx
ret
mov    $0x3,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ToNucleo(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = call signext i8 @toupper(i8 signext %4)
store i8 %5, i8* %3
%6 = load i8, i8* %3
%7 = sext i8 %6 to i32
switch i32 %7, label %13 [
i32 65, label %8
i32 67, label %9
i32 71, label %10
i32 84, label %11
i32 45, label %12
]
8: ; preds = %1
store i32 0, i32* %2
br label %14
9: ; preds = %1
store i32 1, i32* %2
br label %14
10: ; preds = %1
store i32 2, i32* %2
br label %14
11: ; preds = %1
store i32 3, i32* %2
br label %14
12: ; preds = %1
store i32 4, i32* %2
br label %14
13: ; preds = %1
store i32 -1, i32* %2
br label %14
14: ; preds = %13, %12, %11, %10, %9, %8
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @ToNucleo(i8 signext %0) {
%2 = tail call signext i8 @toupper(i8 signext %0)
%3 = sext i8 %2 to i32
switch i32 %3, label %8 [
i32 65, label %9
i32 67, label %4
i32 71, label %5
i32 84, label %6
i32 45, label %7
]
4: ; preds = %1
br label %9
5: ; preds = %1
br label %9
6: ; preds = %1
br label %9
7: ; preds = %1
br label %9
8: ; preds = %1
br label %9
9: ; preds = %1, %8, %7, %6, %5, %4
%10 = phi i32 [ -1, %8 ], [ 4, %7 ], [ 3, %6 ], [ 2, %5 ], [ 1, %4 ], [ 0, %1 ]
ret i32 %10
}
void printTransmissionBuffer(const char *buffer, const char *msg_info,
                             char *msg_color_seq, int msg_fd, int buf_len) {
  int i;
  ;
  ;
  for (i = 0; i < buf_len; i++) {
    char ch = buffer[i];
    if (ch == '\0' || ch == '\t' || ch == '\r' || ch == '\n' || ch == '\a')
      ch = '.';
    ;
  };
  ;
}


x86 assembly (clang, -O0):
<printTransmissionBuffer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
movl   $0x0,-0x24(%rbp)
mov    -0x24(%rbp),%eax
cmp    -0x20(%rbp),%eax
jge    1190 <printTransmissionBuffer+0x90>
mov    -0x8(%rbp),%rax
movslq -0x24(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x25(%rbp)
movsbl -0x25(%rbp),%eax
cmp    $0x0,%eax
je     1179 <printTransmissionBuffer+0x79>
movsbl -0x25(%rbp),%eax
cmp    $0x9,%eax
je     1179 <printTransmissionBuffer+0x79>
movsbl -0x25(%rbp),%eax
cmp    $0xd,%eax
je     1179 <printTransmissionBuffer+0x79>
movsbl -0x25(%rbp),%eax
cmp    $0xa,%eax
je     1179 <printTransmissionBuffer+0x79>
movsbl -0x25(%rbp),%eax
cmp    $0x7,%eax
jne    117d <printTransmissionBuffer+0x7d>
movb   $0x2e,-0x25(%rbp)
jmp    1182 <printTransmissionBuffer+0x82>
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    111e <printTransmissionBuffer+0x1e>
pop    %rbp
ret

x86 assembly (clang, -O2):
<printTransmissionBuffer>:
ret

LLVM IR (-O0):
define void @printTransmissionBuffer(i8* %0, i8* %1, i8* %2, i32 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i8
store i8* %0, i8** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
store i32 0, i32* %11
br label %13
13: ; preds = %44, %5
%14 = load i32, i32* %11
%15 = load i32, i32* %10
%16 = icmp slt i32 %14, %15
br i1 %16, label %17, label %47
17: ; preds = %13
%18 = load i8*, i8** %6
%19 = load i32, i32* %11
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
%22 = load i8, i8* %21
store i8 %22, i8* %12
%23 = load i8, i8* %12
%24 = sext i8 %23 to i32
%25 = icmp eq i32 %24, 0
br i1 %25, label %42, label %26
26: ; preds = %17
%27 = load i8, i8* %12
%28 = sext i8 %27 to i32
%29 = icmp eq i32 %28, 9
br i1 %29, label %42, label %30
30: ; preds = %26
%31 = load i8, i8* %12
%32 = sext i8 %31 to i32
%33 = icmp eq i32 %32, 13
br i1 %33, label %42, label %34
34: ; preds = %30
%35 = load i8, i8* %12
%36 = sext i8 %35 to i32
%37 = icmp eq i32 %36, 10
br i1 %37, label %42, label %38
38: ; preds = %34
%39 = load i8, i8* %12
%40 = sext i8 %39 to i32
%41 = icmp eq i32 %40, 7
br i1 %41, label %42, label %43
42: ; preds = %38, %34, %30, %26, %17
store i8 46, i8* %12
br label %43
43: ; preds = %42, %38
br label %44
44: ; preds = %43
%45 = load i32, i32* %11
%46 = add nsw i32 %45, 1
store i32 %46, i32* %11
br label %13
47: ; preds = %13
ret void
}

LLVM IR (-O2):
define void @printTransmissionBuffer(i8* nocapture %0, i8* nocapture %1, i8* nocapture %2, i32 %3, i32 %4) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputc(char, int /*<<< orphan*/ *);
int /*<<< orphan*/ show_(int, int /*<<< orphan*/ *);
void show(int cell, FILE *stream) {
  show_(cell, stream);
  fputc('\n', stream);
}


x86 assembly (clang, -O0):
<show>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <show_@plt>
mov    -0x10(%rbp),%rsi
mov    $0xa,%edi
call   1030 <fputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show>:
push   %rbx
mov    %rsi,%rbx
call   1040 <show_@plt>
mov    $0xa,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <fputc@plt>

LLVM IR (-O0):
define void @show(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = call i32 @show_(i32 %5, i32* %6)
%8 = load i32*, i32** %4
%9 = call i32 @fputc(i8 signext 10, i32* %8)
ret void
}

LLVM IR (-O2):
define void @show(i32 %0, i32* %1) {
%3 = tail call i32 @show_(i32 %0, i32* %1)
%4 = tail call i32 @fputc(i8 signext 10, i32* %1)
ret void
}
void avgGrade() {}


x86 assembly (clang, -O0):
<avgGrade>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avgGrade>:
ret

LLVM IR (-O0):
define void @avgGrade() {
ret void
}

LLVM IR (-O2):
define void @avgGrade() {
ret void
}
void ufs_debugfs_init(void) {}


x86 assembly (clang, -O0):
<ufs_debugfs_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ufs_debugfs_init>:
ret

LLVM IR (-O0):
define void @ufs_debugfs_init() {
ret void
}

LLVM IR (-O2):
define void @ufs_debugfs_init() {
ret void
}
/* Type definitions */
struct twlist_head {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __twlist_del_entry(struct twlist_head *);
int /*<<< orphan*/ twlist_add(struct twlist_head *, struct twlist_head *);
void twlist_move(struct twlist_head *twlist, struct twlist_head *head) {
  __twlist_del_entry(twlist);
  twlist_add(twlist, head);
}


x86 assembly (clang, -O0):
<twlist_move>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__twlist_del_entry@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <twlist_add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<twlist_move>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <__twlist_del_entry@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <twlist_add@plt>

LLVM IR (-O0):
%struct.twlist_head = type { i32 }
define void @twlist_move(%struct.twlist_head* %0, %struct.twlist_head* %1) {
%3 = alloca %struct.twlist_head*
%4 = alloca %struct.twlist_head*
store %struct.twlist_head* %0, %struct.twlist_head** %3
store %struct.twlist_head* %1, %struct.twlist_head** %4
%5 = load %struct.twlist_head*, %struct.twlist_head** %3
%6 = call i32 @__twlist_del_entry(%struct.twlist_head* %5)
%7 = load %struct.twlist_head*, %struct.twlist_head** %3
%8 = load %struct.twlist_head*, %struct.twlist_head** %4
%9 = call i32 @twlist_add(%struct.twlist_head* %7, %struct.twlist_head* %8)
ret void
}

LLVM IR (-O2):
%struct.twlist_head = type { i32 }
define void @twlist_move(%struct.twlist_head* %0, %struct.twlist_head* %1) {
%3 = tail call i32 @__twlist_del_entry(%struct.twlist_head* %0)
%4 = tail call i32 @twlist_add(%struct.twlist_head* %0, %struct.twlist_head* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_and_clear_bit(unsigned int, void volatile *);
__attribute__((always_)) void clear_bit(unsigned int bit, volatile void *bits) {
  test_and_clear_bit(bit, bits);
}


x86 assembly (clang, -O0):
<clear_bit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <test_and_clear_bit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_bit>:
jmp    1030 <test_and_clear_bit@plt>

LLVM IR (-O0):
define void @clear_bit(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i32 @test_and_clear_bit(i32 %5, i8* %6)
ret void
}

LLVM IR (-O2):
define void @clear_bit(i32 %0, i8* %1) {
%3 = tail call i32 @test_and_clear_bit(i32 %0, i8* %1)
ret void
}
void foo601(int p) {}


x86 assembly (clang, -O0):
<foo601>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo601>:
ret

LLVM IR (-O0):
define void @foo601(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo601(i32 %0) {
ret void
}
/* Variables and functions */
scalar_t__ strtod(char const *, char **);
float strtof(const char *s, char **endptr) { return (float)strtod(s, endptr); }


x86 assembly (clang, -O0):
<strtof>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strtod@plt>
cvtsi2ss %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtof>:
push   %rax
call   1030 <strtod@plt>
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @strtof(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
%5 = load i8*, i8** %3
%6 = load i8**, i8*** %4
%7 = call i64 @strtod(i8* %5, i8** %6)
%8 = sitofp i64 %7 to float
ret float %8
}

LLVM IR (-O2):
define float @strtof(i8* %0, i8** nocapture %1) {
%3 = tail call i64 @strtod(i8* %0, i8** %1)
%4 = sitofp i64 %3 to float
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x21() {
  Assert_real((isspace(33) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              170, ("isspace should be 0 for !"));
}


x86 assembly (clang, -O0):
<t_isspace_0x21>:
push   %rbp
mov    %rsp,%rbp
mov    $0x21,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xaa,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x21>:
push   %rax
mov    $0x21,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0xaa,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for !\00"
define void @t_isspace_0x21() {
%1 = call i64 @isspace(i32 33)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 170, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for !\00"
define void @t_isspace_0x21() {
%1 = tail call i64 @isspace(i32 33)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 170, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int cfs_size_round16(int val) { return (val + 0xf) & (~0xf); }


x86 assembly (clang, -O0):
<cfs_size_round16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xf,%eax
and    $0xfffffff0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfs_size_round16>:
lea    0xf(%rdi),%eax
and    $0xfffffff0,%eax
ret

LLVM IR (-O0):
define i32 @cfs_size_round16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 15
%5 = and i32 %4, -16
ret i32 %5
}

LLVM IR (-O2):
define i32 @cfs_size_round16(i32 %0) {
%2 = add nsw i32 %0, 15
%3 = and i32 %2, -16
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ arm_enable_dcache();
int /*<<< orphan*/ arm_enable_icache();
void arm_enable_caches(void) {
  arm_enable_icache();
  arm_enable_dcache();
}


x86 assembly (clang, -O0):
<arm_enable_caches>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <arm_enable_icache@plt>
mov    $0x0,%al
call   1040 <arm_enable_dcache@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm_enable_caches>:
push   %rax
xor    %eax,%eax
call   1030 <arm_enable_icache@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <arm_enable_dcache@plt>

LLVM IR (-O0):
define void @arm_enable_caches() {
%1 = call i32 (...) @arm_enable_icache()
%2 = call i32 (...) @arm_enable_dcache()
ret void
}

LLVM IR (-O2):
define void @arm_enable_caches() {
%1 = tail call i32 (...) @arm_enable_icache()
%2 = tail call i32 (...) @arm_enable_dcache()
ret void
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
int scale16(int, int);
uint16_t ease16InOutQuad(uint16_t i) {
  uint16_t j = i;
  if (j & 0x8000) {
    j = 65535 - j;
  }
  uint16_t jj = scale16(j, j);
  uint16_t jj2 = jj << 1;
  if (i & 0x8000) {
    jj2 = 65535 - jj2;
  }
  return jj2;
}


x86 assembly (clang, -O0):
<ease16InOutQuad>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x8000,%eax
cmp    $0x0,%eax
je     113d <ease16InOutQuad+0x2d>
mov    $0xffff,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <scale16@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x8000,%eax
cmp    $0x0,%eax
je     1170 <ease16InOutQuad+0x60>
mov    $0xffff,%eax
sub    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ease16InOutQuad>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    $0xffff,%ebp
mov    $0xffff,%edi
sub    %ebx,%edi
test   $0x8000,%ebx
cmove  %ebx,%edi
mov    %edi,%esi
call   1030 <scale16@plt>
add    %eax,%eax
sub    %eax,%ebp
test   $0x8000,%ebx
cmovne %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @ease16InOutQuad(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = and i32 %7, 32768
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load i32, i32* %3
%12 = sub nsw i32 65535, %11
store i32 %12, i32* %3
br label %13
13: ; preds = %10, %1
%14 = load i32, i32* %3
%15 = load i32, i32* %3
%16 = call i32 @scale16(i32 %14, i32 %15)
store i32 %16, i32* %4
%17 = load i32, i32* %4
%18 = shl i32 %17, 1
store i32 %18, i32* %5
%19 = load i32, i32* %2
%20 = and i32 %19, 32768
%21 = icmp ne i32 %20, 0
br i1 %21, label %22, label %25
22: ; preds = %13
%23 = load i32, i32* %5
%24 = sub nsw i32 65535, %23
store i32 %24, i32* %5
br label %25
25: ; preds = %22, %13
%26 = load i32, i32* %5
ret i32 %26
}

LLVM IR (-O2):
define i32 @ease16InOutQuad(i32 %0) {
%2 = and i32 %0, 32768
%3 = icmp eq i32 %2, 0
%4 = sub nsw i32 65535, %0
%5 = select i1 %3, i32 %0, i32 %4
%6 = tail call i32 @scale16(i32 %5, i32 %5)
%7 = shl i32 %6, 1
%8 = sub nsw i32 65535, %7
%9 = select i1 %3, i32 %7, i32 %8
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ e_sty();
int /*<<< orphan*/ e_writeback();
int /*<<< orphan*/ e_zp();
void e_sty_zp() {
  e_zp();
  e_sty();
  e_writeback();
}


x86 assembly (clang, -O0):
<e_sty_zp>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <e_zp@plt>
mov    $0x0,%al
call   1050 <e_sty@plt>
mov    $0x0,%al
call   1030 <e_writeback@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_sty_zp>:
push   %rax
xor    %eax,%eax
call   1040 <e_zp@plt>
xor    %eax,%eax
call   1050 <e_sty@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <e_writeback@plt>

LLVM IR (-O0):
define void @e_sty_zp() {
%1 = call i32 (...) @e_zp()
%2 = call i32 (...) @e_sty()
%3 = call i32 (...) @e_writeback()
ret void
}

LLVM IR (-O2):
define void @e_sty_zp() {
%1 = tail call i32 (...) @e_zp()
%2 = tail call i32 (...) @e_sty()
%3 = tail call i32 (...) @e_writeback()
ret void
}
/* Variables and functions */
scalar_t__ strlen(char *);
scalar_t__ strnlen(char *, int);
void strnlen_is_not_strlen(char *x) {
  if (strnlen(x, 10) != strlen(x))
    (void)*(char *)0;
}


x86 assembly (clang, -O0):
<strnlen_is_not_strlen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xa,%esi
call   1040 <strnlen@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
je     1157 <strnlen_is_not_strlen+0x37>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strnlen_is_not_strlen>:
mov    $0xa,%esi
jmp    1030 <strnlen@plt>

LLVM IR (-O0):
define void @strnlen_is_not_strlen(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @strnlen(i8* %3, i32 10)
%5 = load i8*, i8** %2
%6 = call i64 @strlen(i8* %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i8, i8* null
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @strnlen_is_not_strlen(i8* %0) {
%2 = tail call i64 @strnlen(i8* %0, i32 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ ispunct(int);
void t_ispunct_0xfe() {
  Assert_real((ispunct(254) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_ispunct.c",
              1275, ("ispunct should be 0 for 0xfe"));
}


x86 assembly (clang, -O0):
<t_ispunct_0xfe>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfe,%edi
call   1030 <ispunct@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4fb,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_ispunct_0xfe>:
push   %rax
mov    $0xfe,%edi
call   1030 <ispunct@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4fb,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0xfe\00"
define void @t_ispunct_0xfe() {
%1 = call i64 @ispunct(i32 254)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1275, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0xfe\00"
define void @t_ispunct_0xfe() {
%1 = tail call i64 @ispunct(i32 254)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1275, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int main() {
  int foo;
  foo = 1000;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x3e8,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1000, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void bad() { abort(); }


x86 assembly (clang, -O0):
<bad>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<bad>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @bad() {
%1 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define void @bad() {
%1 = tail call i32 (...) @abort()
unreachable
}
void f(void) {
  if (0 & 1 == 1) {
  }
  if (1 == 0 & 1) {
  }
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
ret

LLVM IR (-O0):
define void @f() {
ret void
}

LLVM IR (-O2):
define void @f() {
ret void
}
int dd_geq(const double *a, const double *b) {
  return (a[0] > b[0] || (a[0] == b[0] && a[1] >= b[1])) ? 1 : 0;
}


x86 assembly (clang, -O0):
<dd_geq>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rcx
mov    $0x1,%al
ucomisd (%rcx),%xmm0
mov    %al,-0x11(%rbp)
ja     1166 <dd_geq+0x66>
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rcx
xor    %eax,%eax
ucomisd (%rcx),%xmm0
mov    %al,-0x12(%rbp)
jne    1160 <dd_geq+0x60>
jp     1160 <dd_geq+0x60>
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x10(%rbp),%rax
ucomisd 0x8(%rax),%xmm0
setae  %al
mov    %al,-0x12(%rbp)
mov    -0x12(%rbp),%al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%dl
xor    %eax,%eax
mov    $0x1,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dd_geq>:
movsd  (%rdi),%xmm0
movsd  (%rsi),%xmm1
mov    $0x1,%eax
ucomisd %xmm1,%xmm0
ja     112a <dd_geq+0x2a>
ucomisd %xmm1,%xmm0
jne    112b <dd_geq+0x2b>
jp     112b <dd_geq+0x2b>
movsd  0x8(%rdi),%xmm0
xor    %eax,%eax
ucomisd 0x8(%rsi),%xmm0
setae  %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dd_geq(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = getelementptr inbounds double, double* %5, i64 0
%7 = load double, double* %6
%8 = load double*, double** %4
%9 = getelementptr inbounds double, double* %8, i64 0
%10 = load double, double* %9
%11 = fcmp ogt double %7, %10
br i1 %11, label %30, label %12
12: ; preds = %2
%13 = load double*, double** %3
%14 = getelementptr inbounds double, double* %13, i64 0
%15 = load double, double* %14
%16 = load double*, double** %4
%17 = getelementptr inbounds double, double* %16, i64 0
%18 = load double, double* %17
%19 = fcmp oeq double %15, %18
br i1 %19, label %20, label %28
20: ; preds = %12
%21 = load double*, double** %3
%22 = getelementptr inbounds double, double* %21, i64 1
%23 = load double, double* %22
%24 = load double*, double** %4
%25 = getelementptr inbounds double, double* %24, i64 1
%26 = load double, double* %25
%27 = fcmp oge double %23, %26
br label %28
28: ; preds = %20, %12
%29 = phi i1 [ false, %12 ], [ %27, %20 ]
br label %30
30: ; preds = %28, %2
%31 = phi i1 [ true, %2 ], [ %29, %28 ]
%32 = zext i1 %31 to i64
%33 = select i1 %31, i32 1, i32 0
ret i32 %33
}

LLVM IR (-O2):
define i32 @dd_geq(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %0
%4 = load double, double* %1
%5 = fcmp ogt double %3, %4
br i1 %5, label %15, label %6
6: ; preds = %2
%7 = fcmp oeq double %3, %4
br i1 %7, label %8, label %15
8: ; preds = %6
%9 = getelementptr inbounds double, double* %0, i64 1
%10 = load double, double* %9
%11 = getelementptr inbounds double, double* %1, i64 1
%12 = load double, double* %11
%13 = fcmp oge double %10, %12
%14 = zext i1 %13 to i32
br label %15
15: ; preds = %6, %8, %2
%16 = phi i32 [ 1, %2 ], [ 0, %6 ], [ %14, %8 ]
ret i32 %16
}
void INT_Excep_SCI4_TXI4(void) {}


x86 assembly (clang, -O0):
<INT_Excep_SCI4_TXI4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_SCI4_TXI4>:
ret

LLVM IR (-O0):
define void @INT_Excep_SCI4_TXI4() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_SCI4_TXI4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ put32(unsigned long);
int /*<<< orphan*/ put8(int);
void mov_reg32_preg32x4preg32pimm32(int reg1, int reg2, int reg3,
                                    unsigned long imm32) {
  put8(0x8B);
  put8((reg1 << 3) | 0x84);
  put8(0x80 | (reg2 << 3) | reg3);
  put32(imm32);
}


x86 assembly (clang, -O0):
<mov_reg32_preg32x4preg32pimm32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    $0x8b,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     $0x84,%edi
call   1030 <put8@plt>
mov    -0x8(%rbp),%edi
shl    $0x3,%edi
or     $0x80,%edi
or     -0xc(%rbp),%edi
call   1030 <put8@plt>
mov    -0x18(%rbp),%rdi
call   1040 <put32@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mov_reg32_preg32x4preg32pimm32>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rcx,%r14
mov    %edx,%r15d
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x8b,%edi
call   1030 <put8@plt>
shl    $0x3,%ebp
or     $0x84,%ebp
mov    %ebp,%edi
call   1030 <put8@plt>
shl    $0x3,%ebx
or     %r15d,%ebx
or     $0x80,%ebx
mov    %ebx,%edi
call   1030 <put8@plt>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1040 <put32@plt>

LLVM IR (-O0):
define void @mov_reg32_preg32x4preg32pimm32(i32 %0, i32 %1, i32 %2, i64 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i64
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i64 %3, i64* %8
%9 = call i32 @put8(i32 139)
%10 = load i32, i32* %5
%11 = shl i32 %10, 3
%12 = or i32 %11, 132
%13 = call i32 @put8(i32 %12)
%14 = load i32, i32* %6
%15 = shl i32 %14, 3
%16 = or i32 128, %15
%17 = load i32, i32* %7
%18 = or i32 %16, %17
%19 = call i32 @put8(i32 %18)
%20 = load i64, i64* %8
%21 = call i32 @put32(i64 %20)
ret void
}

LLVM IR (-O2):
define void @mov_reg32_preg32x4preg32pimm32(i32 %0, i32 %1, i32 %2, i64 %3) {
%5 = tail call i32 @put8(i32 139)
%6 = shl i32 %0, 3
%7 = or i32 %6, 132
%8 = tail call i32 @put8(i32 %7)
%9 = shl i32 %1, 3
%10 = or i32 %9, %2
%11 = or i32 %10, 128
%12 = tail call i32 @put8(i32 %11)
%13 = tail call i32 @put32(i64 %3)
ret void
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
bool issurrogate(uint16_t c) { return (c >= 0xd800 && c <= 0xdfff); }


x86 assembly (clang, -O0):
<issurrogate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0xd800,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1126 <issurrogate+0x26>
cmpl   $0xdfff,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<issurrogate>:
and    $0xfffff800,%edi
xor    %eax,%eax
cmp    $0xd800,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @issurrogate(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 55296
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 57343
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @issurrogate(i32 %0) {
%2 = and i32 %0, -2048
%3 = icmp eq i32 %2, 55296
%4 = zext i1 %3 to i32
ret i32 %4
}
int pathconN_nm6_f0(const double **arg, double **res, int *iw, double *w,
                    int mem) {
  return 0;
}


x86 assembly (clang, -O0):
<pathconN_nm6_f0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathconN_nm6_f0>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pathconN_nm6_f0(double** %0, double** %1, i32* %2, double* %3, i32 %4) {
%6 = alloca double**
%7 = alloca double**
%8 = alloca i32*
%9 = alloca double*
%10 = alloca i32
store double** %0, double*** %6
store double** %1, double*** %7
store i32* %2, i32** %8
store double* %3, double** %9
store i32 %4, i32* %10
ret i32 0
}

LLVM IR (-O2):
define i32 @pathconN_nm6_f0(double** nocapture readnone %0, double** nocapture readnone %1, i32* nocapture readnone %2, double* nocapture readnone %3, i32 %4) {
ret i32 0
}
unsigned int f67(unsigned int x, int y __attribute__((unused))) {
  return (x << 1) + (x >> ((-1) & (8 * 4 - 1)));
}


x86 assembly (clang, -O0):
<f67>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    -0x4(%rbp),%ecx
shr    $0x1f,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f67>:
mov    %edi,%eax
rol    %eax
ret

LLVM IR (-O0):
define i32 @f67(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = shl i32 %5, 1
%7 = load i32, i32* %3
%8 = lshr i32 %7, 31
%9 = add i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @f67(i32 %0, i32 %1) {
%3 = tail call i32 @llvm.fshl.i32(i32 %0, i32 %0, i32 1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int ok(void) {
  printf("Everything is OK in here.\n");
  return 0;
}


x86 assembly (clang, -O0):
<ok>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ok>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"Everything is OK in here.\0A\00"
define i32 @ok() {
%1 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [26 x i8] c"Everything is OK in here.\00"
define i32 @ok() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str, i64 0, i64 0))
ret i32 0
}
void foo696() {}


x86 assembly (clang, -O0):
<foo696>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo696>:
ret

LLVM IR (-O0):
define void @foo696() {
ret void
}

LLVM IR (-O2):
define void @foo696() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_usage(void) {
  printf("Usage: ./ledctl <mask>, where mask is between 0x0-0x7\nExample: "
         "./ledctl 0x5\n");
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [77 x i8] c"Usage: ./ledctl <mask>, where mask is between 0x0-0x7\0AExample: ./ledctl 0x5\0A\00"
define void @print_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([77 x i8], [77 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [76 x i8] c"Usage: ./ledctl <mask>, where mask is between 0x0-0x7\0AExample: ./ledctl 0x5\00"
define void @print_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([76 x i8], [76 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ strcmp(char const *, char *);
int isLOAD(const char *comm) { return strcmp(comm, "load") == 0; }


x86 assembly (clang, -O0):
<isLOAD>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isLOAD>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"load\00"
define i32 @isLOAD(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @strcmp(i8* %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
@.str = [5 x i8] c"load\00"
define i32 @isLOAD(i8* %0) {
%2 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ qprintf(char *, int);
int q_GUI_Control(int hex) {
  qprintf("*** "
          "GUI_Control"
          "(%x)\n",
          hex);
  return 0;
}


x86 assembly (clang, -O0):
<q_GUI_Control>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <qprintf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<q_GUI_Control>:
push   %rax
mov    %edi,%esi
lea    0xee6(%rip),%rdi
call   1030 <qprintf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"*** GUI_Control(%x)\0A\00"
define i32 @q_GUI_Control(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @qprintf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [21 x i8] c"*** GUI_Control(%x)\0A\00"
define i32 @q_GUI_Control(i32 %0) {
%2 = tail call i32 @qprintf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i32 0
}
void free_all_registers() {}


x86 assembly (clang, -O0):
<free_all_registers>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_all_registers>:
ret

LLVM IR (-O0):
define void @free_all_registers() {
ret void
}

LLVM IR (-O2):
define void @free_all_registers() {
ret void
}
int test_imm_4Bint8_mem(signed char *val) {
  return ((*val) & (-0x4B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_4Bint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xffffffb5,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_4Bint8_mem>:
testb  $0xb5,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_4Bint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, -75
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_4Bint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -75
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}