xunge/DecIR huggingface dataset:
int test_imm_42uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x42 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_42uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x42,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_42uint64_highword_mem>:
testb  $0x42,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_42uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 66
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_42uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 283467841536
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ byteorder();
int main(int argc, char *argv[]) {
  byteorder();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <byteorder@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <byteorder@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @byteorder()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @byteorder()
ret i32 0
}
void PIRAmplifierStage1_SaveConfig(void) {}


x86 assembly (clang, -O0):
<PIRAmplifierStage1_SaveConfig>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PIRAmplifierStage1_SaveConfig>:
ret

LLVM IR (-O0):
define void @PIRAmplifierStage1_SaveConfig() {
ret void
}

LLVM IR (-O2):
define void @PIRAmplifierStage1_SaveConfig() {
ret void
}
long double logl(long double x) { return __builtin_logl(x); }


x86 assembly (clang, -O0):
<logl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <logl@plt>
fld    %st(0)
fstp   %st(0)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<logl>:
fldt   0x8(%rsp)
fldz
fucomi %st(1),%st
fstp   %st(1)
jae    110d <logl+0xd>
ret
fstp   %st(0)
nop
jmp    1110 <logl+0x10>

LLVM IR (-O0):
define x86_fp80 @logl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call x86_fp80 @logl(x86_fp80 %3)
ret x86_fp80 %4
}

LLVM IR (-O2):
define x86_fp80 @logl(x86_fp80 %0) {
%2 = fcmp ugt x86_fp80 %0, 0xK00000000000000000000
br i1 %2, label %4, label %3
3: ; preds = %1, %3
br label %3
4: ; preds = %1
ret x86_fp80 undef
}
double cpu_get_frequency() { return 3579545.0 / 2; }


x86 assembly (clang, -O0):
<cpu_get_frequency>:
push   %rbp
mov    %rsp,%rbp
movsd  0xef4(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_get_frequency>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @cpu_get_frequency() {
ret double 0x413B4F4C80000000
}

LLVM IR (-O2):
define double @cpu_get_frequency() {
ret double 0x413B4F4C80000000
}
int pshell_exit(char **args) { return 0; }


x86 assembly (clang, -O0):
<pshell_exit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pshell_exit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pshell_exit(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @pshell_exit(i8** nocapture readnone %0) {
ret i32 0
}
void ff_compute(struct ff *ff, int do_grad) {
  (void)ff;
  (void)do_grad;
}


x86 assembly (clang, -O0):
<ff_compute>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_compute>:
ret

LLVM IR (-O0):
%struct.ff = type opaque
define void @ff_compute(%struct.ff* %0, i32 %1) {
%3 = alloca %struct.ff*
%4 = alloca i32
store %struct.ff* %0, %struct.ff** %3
store i32 %1, i32* %4
%5 = load %struct.ff*, %struct.ff** %3
%6 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
%struct.ff = type opaque
define void @ff_compute(%struct.ff* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int myexec(char *, char *, int /*<<< orphan*/ *);
int check_predepends(void) {
  return myexec("/usr/bin/dpkg", "--assert-support-predepends", NULL);
}


x86 assembly (clang, -O0):
<check_predepends>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xeec(%rip),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <myexec@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_predepends>:
lea    0xee9(%rip),%rdi
lea    0xef0(%rip),%rsi
xor    %edx,%edx
jmp    1030 <myexec@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"/usr/bin/dpkg\00"
@.str.1 = [28 x i8] c"--assert-support-predepends\00"
define i32 @check_predepends() {
%1 = call i32 @myexec(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i64 0, i64 0), i32* null)
ret i32 %1
}

LLVM IR (-O2):
@.str = [14 x i8] c"/usr/bin/dpkg\00"
@.str.1 = [28 x i8] c"--assert-support-predepends\00"
define i32 @check_predepends() {
%1 = tail call i32 @myexec(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i64 0, i64 0), i32* null)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ __test_print_vasp_strain(unsigned int);
void test_print_vasp_biaxial_strain() { __test_print_vasp_strain((unsigned)0); }


x86 assembly (clang, -O0):
<test_print_vasp_biaxial_strain>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <__test_print_vasp_strain@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_print_vasp_biaxial_strain>:
xor    %edi,%edi
jmp    1030 <__test_print_vasp_strain@plt>

LLVM IR (-O0):
define void @test_print_vasp_biaxial_strain() {
%1 = call i32 @__test_print_vasp_strain(i32 0)
ret void
}

LLVM IR (-O2):
define void @test_print_vasp_biaxial_strain() {
%1 = tail call i32 @__test_print_vasp_strain(i32 0)
ret void
}
int even_ones(unsigned x) {
  unsigned p16 = (x >> 16) ^ x;
  unsigned p8 = (p16 >> 8) ^ p16;
  unsigned p4 = (p8 >> 4) ^ p8;
  unsigned p2 = (p4 >> 2) ^ p4;
  unsigned p1 = (p2 >> 1) ^ p2;
  return !(p1 & 1);
}


x86 assembly (clang, -O0):
<even_ones>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x10,%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x8,%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shr    $0x4,%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
shr    $0x2,%eax
xor    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
shr    $0x1,%eax
xor    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<even_ones>:
mov    %edi,%eax
shr    $0x10,%eax
xor    %edi,%eax
mov    %eax,%ecx
shr    $0x8,%ecx
xor    %eax,%ecx
mov    %ecx,%eax
shr    $0x4,%eax
xor    %ecx,%eax
mov    %eax,%ecx
shr    $0x2,%ecx
xor    %eax,%ecx
mov    %ecx,%eax
shr    %eax
xor    %ecx,%eax
not    %eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @even_ones(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %2
%8 = load i32, i32* %2
%9 = lshr i32 %8, 16
%10 = load i32, i32* %2
%11 = xor i32 %9, %10
store i32 %11, i32* %3
%12 = load i32, i32* %3
%13 = lshr i32 %12, 8
%14 = load i32, i32* %3
%15 = xor i32 %13, %14
store i32 %15, i32* %4
%16 = load i32, i32* %4
%17 = lshr i32 %16, 4
%18 = load i32, i32* %4
%19 = xor i32 %17, %18
store i32 %19, i32* %5
%20 = load i32, i32* %5
%21 = lshr i32 %20, 2
%22 = load i32, i32* %5
%23 = xor i32 %21, %22
store i32 %23, i32* %6
%24 = load i32, i32* %6
%25 = lshr i32 %24, 1
%26 = load i32, i32* %6
%27 = xor i32 %25, %26
store i32 %27, i32* %7
%28 = load i32, i32* %7
%29 = and i32 %28, 1
%30 = icmp ne i32 %29, 0
%31 = xor i1 %30, true
%32 = zext i1 %31 to i32
ret i32 %32
}

LLVM IR (-O2):
define i32 @even_ones(i32 %0) {
%2 = lshr i32 %0, 16
%3 = xor i32 %2, %0
%4 = lshr i32 %3, 8
%5 = xor i32 %4, %3
%6 = lshr i32 %5, 4
%7 = xor i32 %6, %5
%8 = lshr i32 %7, 2
%9 = xor i32 %8, %7
%10 = lshr i32 %9, 1
%11 = xor i32 %10, %9
%12 = and i32 %11, 1
%13 = xor i32 %12, 1
ret i32 %13
}
void gdk_pango_renderer_set_gc() {}


x86 assembly (clang, -O0):
<gdk_pango_renderer_set_gc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_pango_renderer_set_gc>:
ret

LLVM IR (-O0):
define void @gdk_pango_renderer_set_gc() {
ret void
}

LLVM IR (-O2):
define void @gdk_pango_renderer_set_gc() {
ret void
}
/* Variables and functions */
unsigned long LONG_MAX;
unsigned long _dictNextPower(unsigned long size) {
  unsigned long i = 4;
  if (size >= LONG_MAX)
    return LONG_MAX;
  while (1) {
    if (i >= size)
      return i;
    i *= 2;
  }
}


x86 assembly (clang, -O0):
<_dictNextPower>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movq   $0x4,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    0x2ec5(%rip),%rcx
cmp    (%rcx),%rax
jb     1137 <_dictNextPower+0x37>
mov    0x2eb5(%rip),%rax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
jmp    1168 <_dictNextPower+0x68>
jmp    113c <_dictNextPower+0x3c>
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jb     1157 <_dictNextPower+0x57>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1168 <_dictNextPower+0x68>
mov    -0x18(%rbp),%rax
shl    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    113c <_dictNextPower+0x3c>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dictNextPower>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%rax
cmp    %rdi,%rax
jbe    112b <_dictNextPower+0x2b>
mov    $0x4,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rcx,%rax
add    %rcx,%rcx
cmp    %rdi,%rax
jb     1120 <_dictNextPower+0x20>
ret

LLVM IR (-O0):
@LONG_MAX = global i64 0
define i64 @_dictNextPower(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 4, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* @LONG_MAX
%7 = icmp uge i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i64, i64* @LONG_MAX
store i64 %9, i64* %2
br label %20
10: ; preds = %1
br label %11
11: ; preds = %10, %17
%12 = load i64, i64* %4
%13 = load i64, i64* %3
%14 = icmp uge i64 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = load i64, i64* %4
store i64 %16, i64* %2
br label %20
17: ; preds = %11
%18 = load i64, i64* %4
%19 = mul i64 %18, 2
store i64 %19, i64* %4
br label %11
20: ; preds = %15, %8
%21 = load i64, i64* %2
ret i64 %21
}

LLVM IR (-O2):
@LONG_MAX = global i64 0
define i64 @_dictNextPower(i64 %0) {
%2 = load i64, i64* @LONG_MAX
%3 = icmp ugt i64 %2, %0
br i1 %3, label %4, label %8
4: ; preds = %1, %4
%5 = phi i64 [ %7, %4 ], [ 4, %1 ]
%6 = icmp ult i64 %5, %0
%7 = shl i64 %5, 1
br i1 %6, label %4, label %8
8: ; preds = %4, %1
%9 = phi i64 [ %2, %1 ], [ %5, %4 ]
ret i64 %9
}
const char *__malidrv_build_info(void) {
  return "malidrv:  API_VERSION=19 REPO_URL= REVISION= CHANGED_REVISION= "
         "CHANGE_DATE= BUILD_DATE=Fri Dec 13 12:54:12 CST 2013 BUILD=release "
         "TARGET_PLATFORM= MALI_PLATFORM= KDIR= "
         "OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING= "
         "USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 "
         "MALI_UPPER_HALF_SCHEDULING=1";
}


x86 assembly (clang, -O0):
<__malidrv_build_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__malidrv_build_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [313 x i8] c"malidrv: API_VERSION=19 REPO_URL= REVISION= CHANGED_REVISION= CHANGE_DATE= BUILD_DATE=Fri Dec 13 12:54:12 CST 2013 BUILD=release TARGET_PLATFORM= MALI_PLATFORM= KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING= USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([313 x i8], [313 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [313 x i8] c"malidrv: API_VERSION=19 REPO_URL= REVISION= CHANGED_REVISION= CHANGE_DATE= BUILD_DATE=Fri Dec 13 12:54:12 CST 2013 BUILD=release TARGET_PLATFORM= MALI_PLATFORM= KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING= USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([313 x i8], [313 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ timer_t;

/* Variables and functions */
int /*<<< orphan*/ perror(char *);
int timer_delete(int /*<<< orphan*/);
void clear_alarm(timer_t timer) {
  if (timer_delete(timer) == -1) {
    perror("timer_delete");
  }
}


x86 assembly (clang, -O0):
<clear_alarm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <timer_delete@plt>
cmp    $0xffffffff,%eax
jne    1148 <clear_alarm+0x28>
lea    0xebd(%rip),%rdi
call   1040 <perror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_alarm>:
push   %rax
call   1030 <timer_delete@plt>
cmp    $0xffffffff,%eax
je     112d <clear_alarm+0xd>
pop    %rax
ret
lea    0xecc(%rip),%rdi
pop    %rax
jmp    1040 <perror@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"timer_delete\00"
define void @clear_alarm(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @timer_delete(i32 %3)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @perror(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"timer_delete\00"
define void @clear_alarm(i32 %0) {
%2 = tail call i32 @timer_delete(i32 %0)
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @perror(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret void
}
int energymon_is_exclusive_cray_pm_accel_energy(void) { return 0; }


x86 assembly (clang, -O0):
<energymon_is_exclusive_cray_pm_accel_energy>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<energymon_is_exclusive_cray_pm_accel_energy>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @energymon_is_exclusive_cray_pm_accel_energy() {
ret i32 0
}

LLVM IR (-O2):
define i32 @energymon_is_exclusive_cray_pm_accel_energy() {
ret i32 0
}
lds() {}


x86 assembly (clang, -O0):
<lds>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lds>:
ret

LLVM IR (-O0):
define i32 @lds() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @lds() {
ret i32 undef
}
int bar(int *restrict *const restrict p) { return **p; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
mov    (%rdi),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
define i32 @bar(i32** noalias %0) {
%2 = alloca i32**
store i32** %0, i32*** %2
%3 = load i32**, i32*** %2
%4 = load i32*, i32** %3
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @bar(i32** noalias nocapture %0) {
%2 = load i32*, i32** %0
%3 = load i32, i32* %2
ret i32 %3
}
int test_imm_B2int64_highword_reg(long long val) {
  return ((val >> 32) & (0xB2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B2int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xb2,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B2int64_highword_reg>:
movabs $0xb200000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B2int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 178
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_B2int64_highword_reg(i64 %0) {
%2 = and i64 %0, 764504178688
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void Tcl_Free(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<Tcl_Free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Tcl_Free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @Tcl_Free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @Tcl_Free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
void delay(int i) {
  while (i-- > 0)
    ;
}


x86 assembly (clang, -O0):
<delay>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
jle    1120 <delay+0x20>
jmp    1107 <delay+0x7>
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay>:
ret

LLVM IR (-O0):
define void @delay(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load i32, i32* %2
%5 = add nsw i32 %4, -1
store i32 %5, i32* %2
%6 = icmp sgt i32 %4, 0
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @delay(i32 %0) {
ret void
}
void ocl_sw_barrier() {}


x86 assembly (clang, -O0):
<ocl_sw_barrier>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ocl_sw_barrier>:
ret

LLVM IR (-O0):
define void @ocl_sw_barrier() {
ret void
}

LLVM IR (-O2):
define void @ocl_sw_barrier() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void __assert(const char *file, int line, const char *func,
              const char *failedexpr) {
  (void)(file);
  (void)(line);
  (void)(func);
  (void)(failedexpr);
  abort();
}


x86 assembly (clang, -O0):
<__assert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<__assert>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @__assert(i8* %0, i32 %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = load i8*, i8** %7
%12 = load i8*, i8** %8
%13 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define void @__assert(i8* nocapture readnone %0, i32 %1, i8* nocapture readnone %2, i8* nocapture readnone %3) {
%5 = tail call i32 (...) @abort()
unreachable
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void USBHostRequestStatus(uint32_t ui32Base) {
  ASSERT(ui32Base == 0x40050000);
  (*((volatile uint8_t *)(ui32Base + 0x00000102))) = 0x00000020 | 0x00000040;
}


x86 assembly (clang, -O0):
<USBHostRequestStatus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x40050000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x102,%eax
cltq
movl   $0x60,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBHostRequestStatus>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
cmp    $0x40050000,%ebx
sete   %dil
call   1030 <ASSERT@plt>
movslq %ebx,%rax
movl   $0x60,0x102(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @USBHostRequestStatus(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1074069504
%5 = zext i1 %4 to i32
%6 = call i32 @ASSERT(i32 %5)
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 258
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
store volatile i32 96, i32* %10
ret void
}

LLVM IR (-O2):
define void @USBHostRequestStatus(i32 %0) {
%2 = icmp eq i32 %0, 1074069504
%3 = zext i1 %2 to i32
%4 = tail call i32 @ASSERT(i32 %3)
%5 = add nsw i32 %0, 258
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
store volatile i32 96, i32* %7
ret void
}
int cmp_fun(void *a, void *b) { return *(int *)a <= *(int *)b; }


x86 assembly (clang, -O0):
<cmp_fun>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%eax
setle  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp_fun>:
mov    (%rdi),%ecx
xor    %eax,%eax
cmp    (%rsi),%ecx
setle  %al
ret

LLVM IR (-O0):
define i32 @cmp_fun(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = icmp sle i32 %7, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @cmp_fun(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp sle i32 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ pthread_exit(int /*<<< orphan*/ *);
int main(void) {
  pthread_exit(NULL);
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1030 <pthread_exit@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <pthread_exit@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @pthread_exit(i32* null)
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @pthread_exit(i32* null)
ret i32 1
}
/* Type definitions */
typedef int /*<<< orphan*/ mbstate_t;

/* Variables and functions */
int mbsinit(const mbstate_t *ps) {
  ps = ps;
  return 1;
}


x86 assembly (clang, -O0):
<mbsinit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mbsinit>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @mbsinit(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
store i32* %3, i32** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @mbsinit(i32* nocapture readnone %0) {
ret i32 1
}
void soundcard_set_ring(struct lm_interface_state *s, int v) {}


x86 assembly (clang, -O0):
<soundcard_set_ring>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<soundcard_set_ring>:
ret

LLVM IR (-O0):
%struct.lm_interface_state = type opaque
define void @soundcard_set_ring(%struct.lm_interface_state* %0, i32 %1) {
%3 = alloca %struct.lm_interface_state*
%4 = alloca i32
store %struct.lm_interface_state* %0, %struct.lm_interface_state** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.lm_interface_state = type opaque
define void @soundcard_set_ring(%struct.lm_interface_state* nocapture %0, i32 %1) {
ret void
}
int cmpint(const void *p, const void *q) { return *(int *)p - *(int *)q; }


x86 assembly (clang, -O0):
<cmpint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmpint>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @cmpint(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @cmpint(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}
int isalnum(int ch) {
  return (((ch >= '0') && (ch <= '9')) || ((ch >= 'A') && (ch <= 'Z')) ||
          ((ch >= 'a') && (ch <= 'z')));
}


x86 assembly (clang, -O0):
<isalnum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x30,-0x4(%rbp)
jl     1120 <isalnum+0x20>
mov    $0x1,%al
cmpl   $0x39,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1158 <isalnum+0x58>
cmpl   $0x41,-0x4(%rbp)
jl     1139 <isalnum+0x39>
mov    $0x1,%al
cmpl   $0x5a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1158 <isalnum+0x58>
xor    %eax,%eax
cmpl   $0x61,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     1152 <isalnum+0x52>
cmpl   $0x7a,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isalnum>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%eax
setb   %al
and    $0xffffffdf,%edi
add    $0xffffffbf,%edi
cmp    $0x1a,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @isalnum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 48
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 57
br i1 %7, label %22, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 65
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 90
br i1 %13, label %22, label %14
14: ; preds = %11, %8
%15 = load i32, i32* %2
%16 = icmp sge i32 %15, 97
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp sle i32 %18, 122
br label %20
20: ; preds = %17, %14
%21 = phi i1 [ false, %14 ], [ %19, %17 ]
br label %22
22: ; preds = %20, %11, %5
%23 = phi i1 [ true, %11 ], [ true, %5 ], [ %21, %20 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @isalnum(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = and i32 %0, -33
%5 = add i32 %4, -65
%6 = icmp ult i32 %5, 26
%7 = or i1 %3, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
unsigned lfr_getcpuflags(void) {
  unsigned a, b, c, d;
  __asm__("cpuid" : "=a"(a), "=b"(b), "=c"(c), "=d"(d) : "0"(1));
  return lfr_getcpuflags_x86(d, c);
}


x86 assembly (clang, -O0):
<lfr_getcpuflags>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
sub    $0x18,%rsp
mov    $0x1,%eax
cpuid
mov    %eax,-0xc(%rbp)
mov    %ebx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x18(%rbp),%edi
mov    -0x14(%rbp),%esi
mov    $0x0,%al
call   1030 <lfr_getcpuflags_x86@plt>
add    $0x18,%rsp
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<lfr_getcpuflags>:
push   %rbx
mov    $0x1,%eax
cpuid
mov    %edx,%edi
mov    %ecx,%esi
xor    %eax,%eax
pop    %rbx
jmp    1030 <lfr_getcpuflags_x86@plt>

LLVM IR (-O0):
define i32 @lfr_getcpuflags() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = call { i32, i32, i32, i32 } asm "cpuid", "={ax},={bx},={cx},={dx},0,~{dirflag},~{fpsr},~{flags}"(i32 1)
%6 = extractvalue { i32, i32, i32, i32 } %5, 0
%7 = extractvalue { i32, i32, i32, i32 } %5, 1
%8 = extractvalue { i32, i32, i32, i32 } %5, 2
%9 = extractvalue { i32, i32, i32, i32 } %5, 3
store i32 %6, i32* %1
store i32 %7, i32* %2
store i32 %8, i32* %3
store i32 %9, i32* %4
%10 = load i32, i32* %4
%11 = load i32, i32* %3
%12 = call i32 (i32, i32, ...) bitcast (i32 (...)* @lfr_getcpuflags_x86 to i32 (i32, i32, ...)*)(i32 %10, i32 %11)
ret i32 %12
}

LLVM IR (-O2):
define i32 @lfr_getcpuflags() {
%1 = tail call { i32, i32, i32, i32 } asm "cpuid", "={ax},={bx},={cx},={dx},0,~{dirflag},~{fpsr},~{flags}"(i32 1)
%2 = extractvalue { i32, i32, i32, i32 } %1, 2
%3 = extractvalue { i32, i32, i32, i32 } %1, 3
%4 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @lfr_getcpuflags_x86 to i32 (i32, i32, ...)*)(i32 %3, i32 %2)
ret i32 %4
}
int to_p_string(char *cstr, char *new_pstr) {
  char c;
  char size;
  int index = 1;
  while (c = cstr[(index++) - 1], c != 0) {
    new_pstr[index] = c;
    size += 1;
  }
  new_pstr[0] = size;
  return 0;
}


x86 assembly (clang, -O0):
<to_p_string>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0x18(%rbp)
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x11(%rbp)
movsbl -0x11(%rbp),%eax
cmp    $0x0,%eax
je     1158 <to_p_string+0x58>
mov    -0x11(%rbp),%dl
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
movsbl -0x12(%rbp),%eax
add    $0x1,%eax
mov    %al,-0x12(%rbp)
jmp    1113 <to_p_string+0x13>
mov    -0x12(%rbp),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<to_p_string>:
mov    (%rdi),%cl
test   %cl,%cl
je     1123 <to_p_string+0x23>
xor    %eax,%eax
nopl   0x0(%rax,%rax,1)
mov    %cl,0x2(%rsi,%rax,1)
movzbl 0x1(%rdi,%rax,1),%ecx
add    $0x1,%rax
test   %cl,%cl
jne    1110 <to_p_string+0x10>
jmp    1123 <to_p_string+0x23>
mov    %al,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @to_p_string(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 1, i32* %7
br label %8
8: ; preds = %19, %2
%9 = load i8*, i8** %3
%10 = load i32, i32* %7
%11 = add nsw i32 %10, 1
store i32 %11, i32* %7
%12 = sub nsw i32 %10, 1
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %9, i64 %13
%15 = load i8, i8* %14
store i8 %15, i8* %5
%16 = load i8, i8* %5
%17 = sext i8 %16 to i32
%18 = icmp ne i32 %17, 0
br i1 %18, label %19, label %29
19: ; preds = %8
%20 = load i8, i8* %5
%21 = load i8*, i8** %4
%22 = load i32, i32* %7
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
store i8 %20, i8* %24
%25 = load i8, i8* %6
%26 = sext i8 %25 to i32
%27 = add nsw i32 %26, 1
%28 = trunc i32 %27 to i8
store i8 %28, i8* %6
br label %8
29: ; preds = %8
%30 = load i8, i8* %6
%31 = load i8*, i8** %4
%32 = getelementptr inbounds i8, i8* %31, i64 0
store i8 %30, i8* %32
ret i32 0
}

LLVM IR (-O2):
define i32 @to_p_string(i8* nocapture %0, i8* nocapture writeonly %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %16, label %5
5: ; preds = %2, %5
%6 = phi i64 [ %11, %5 ], [ 2, %2 ]
%7 = phi i8 [ %14, %5 ], [ %3, %2 ]
%8 = phi i8 [ %10, %5 ], [ undef, %2 ]
%9 = getelementptr inbounds i8, i8* %1, i64 %6
store i8 %7, i8* %9
%10 = add i8 %8, 1
%11 = add nuw i64 %6, 1
%12 = add nsw i64 %6, -1
%13 = getelementptr inbounds i8, i8* %0, i64 %12
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %5
16: ; preds = %5, %2
%17 = phi i8 [ undef, %2 ], [ %10, %5 ]
store i8 %17, i8* %1
ret i32 0
}
double deg2rad(double deg) { return (deg * 3.14159265358979323846 / 180); }


x86 assembly (clang, -O0):
<deg2rad>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xee2(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<deg2rad>:
mulsd  0xef8(%rip),%xmm0
divsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @deg2rad(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 0x400921FB54442D18
%5 = fdiv double %4, 1.800000e+02
ret double %5
}

LLVM IR (-O2):
define double @deg2rad(double %0) {
%2 = fmul double %0, 0x400921FB54442D18
%3 = fdiv double %2, 1.800000e+02
ret double %3
}
void CMUTIL_UnusedP(void *p, ...) { (void)(p); }


x86 assembly (clang, -O0):
<CMUTIL_UnusedP>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<CMUTIL_UnusedP>:
ret

LLVM IR (-O0):
define void @CMUTIL_UnusedP(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @CMUTIL_UnusedP(i8* nocapture %0, ...) {
ret void
}
unsigned int f17(unsigned int x, int y) {
  return (x >> ((-y) & (8 * 4 - 1))) ^ (x << y);
}


x86 assembly (clang, -O0):
<f17>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
and    $0x1f,%ecx
shr    %cl,%eax
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f17>:
mov    %esi,%ecx
neg    %cl
mov    %edi,%eax
shr    %cl,%eax
mov    %esi,%ecx
shl    %cl,%edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f17(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 0, %6
%8 = and i32 %7, 31
%9 = lshr i32 %5, %8
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = shl i32 %10, %11
%13 = xor i32 %9, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @f17(i32 %0, i32 %1) {
%3 = sub nsw i32 0, %1
%4 = and i32 %3, 31
%5 = lshr i32 %0, %4
%6 = shl i32 %0, %1
%7 = xor i32 %5, %6
ret i32 %7
}
int verify_benchmark(int r) {
  int expected = 1000000;
  if (r != expected)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<verify_benchmark>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0xf4240,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
je     1126 <verify_benchmark+0x26>
movl   $0x0,-0x4(%rbp)
jmp    112d <verify_benchmark+0x2d>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<verify_benchmark>:
xor    %eax,%eax
cmp    $0xf4240,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @verify_benchmark(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 1000000, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ne i32 %5, %6
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %10
9: ; preds = %1
store i32 1, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @verify_benchmark(i32 %0) {
%2 = icmp eq i32 %0, 1000000
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
struct iommu_domain {
  int dummy;
};

/* Variables and functions */
int ENODEV;
int iommu_unmap(struct iommu_domain *domain, unsigned long iova,
                int gfp_order) {
  return -ENODEV;
}


x86 assembly (clang, -O0):
<iommu_unmap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
mov    0x2ec8(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iommu_unmap>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
%struct.iommu_domain = type { i32 }
@ENODEV = global i32 0
define i32 @iommu_unmap(%struct.iommu_domain* %0, i64 %1, i32 %2) {
%4 = alloca %struct.iommu_domain*
%5 = alloca i64
%6 = alloca i32
store %struct.iommu_domain* %0, %struct.iommu_domain** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i32, i32* @ENODEV
%8 = sub nsw i32 0, %7
ret i32 %8
}

LLVM IR (-O2):
%struct.iommu_domain = type { i32 }
@ENODEV = global i32 0
define i32 @iommu_unmap(%struct.iommu_domain* nocapture readnone %0, i64 %1, i32 %2) {
%4 = load i32, i32* @ENODEV
%5 = sub nsw i32 0, %4
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fwrite(unsigned char *, int, int, int /*<<< orphan*/ *);
int write_dword(FILE *f, int value) {
  unsigned char buff[4];
  buff[0] = (unsigned char)value;
  buff[1] = (unsigned char)(value >> 8);
  buff[2] = (unsigned char)(value >> 16);
  buff[3] = (unsigned char)(value >> 24);
  return fwrite(buff, 1, 4, f);
}


x86 assembly (clang, -O0):
<write_dword>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %al,-0x10(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
mov    %al,-0xf(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x10,%eax
mov    %al,-0xe(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x18,%eax
mov    %al,-0xd(%rbp)
lea    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rcx
mov    $0x1,%esi
mov    $0x4,%edx
call   1030 <fwrite@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_dword>:
push   %rax
mov    %rdi,%rcx
mov    %esi,0x4(%rsp)
lea    0x4(%rsp),%rdi
mov    $0x1,%esi
mov    $0x4,%edx
call   1030 <fwrite@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @write_dword(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca [4 x i8]
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = trunc i32 %6 to i8
%8 = getelementptr inbounds [4 x i8], [4 x i8]* %5, i64 0, i64 0
store i8 %7, i8* %8
%9 = load i32, i32* %4
%10 = ashr i32 %9, 8
%11 = trunc i32 %10 to i8
%12 = getelementptr inbounds [4 x i8], [4 x i8]* %5, i64 0, i64 1
store i8 %11, i8* %12
%13 = load i32, i32* %4
%14 = ashr i32 %13, 16
%15 = trunc i32 %14 to i8
%16 = getelementptr inbounds [4 x i8], [4 x i8]* %5, i64 0, i64 2
store i8 %15, i8* %16
%17 = load i32, i32* %4
%18 = ashr i32 %17, 24
%19 = trunc i32 %18 to i8
%20 = getelementptr inbounds [4 x i8], [4 x i8]* %5, i64 0, i64 3
store i8 %19, i8* %20
%21 = getelementptr inbounds [4 x i8], [4 x i8]* %5, i64 0, i64 0
%22 = load i32*, i32** %3
%23 = call i32 @fwrite(i8* %21, i32 1, i32 4, i32* %22)
ret i32 %23
}

LLVM IR (-O2):
define i32 @write_dword(i32* nocapture %0, i32 %1) {
%3 = alloca [4 x i8]
%4 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%5 = trunc i32 %1 to i8
store i8 %5, i8* %4
%6 = lshr i32 %1, 8
%7 = trunc i32 %6 to i8
%8 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 1
store i8 %7, i8* %8
%9 = lshr i32 %1, 16
%10 = trunc i32 %9 to i8
%11 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 2
store i8 %10, i8* %11
%12 = lshr i32 %1, 24
%13 = trunc i32 %12 to i8
%14 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 3
store i8 %13, i8* %14
%15 = call i32 @fwrite(i8* %4, i32 1, i32 4, i32* %0)
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int nums[3];
  nums[0] = 50;
  nums[1] = 51;
  nums[2] = 52;
  int newNums[] = {50, 51, 52};
  for (int i = 0; i < 3; i++) {
    printf("%i\n", newNums[i]);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x32,-0x10(%rbp)
movl   $0x33,-0xc(%rbp)
movl   $0x34,-0x8(%rbp)
mov    0xec5(%rip),%rax
mov    %rax,-0x1c(%rbp)
mov    0xec3(%rip),%eax
mov    %eax,-0x14(%rbp)
movl   $0x0,-0x20(%rbp)
cmpl   $0x3,-0x20(%rbp)
jge    117b <main+0x6b>
movslq -0x20(%rbp),%rax
mov    -0x1c(%rbp,%rax,4),%esi
lea    0xea4(%rip),%rdi
call   1030 <printf@plt>
mov    -0x20(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    114f <main+0x3f>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0x32,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x33,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x34,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.newNums = [3 x i32] [i32 50, i32 51, i32 52]
@.str = [4 x i8] c"%i\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [3 x i32]
%3 = alloca [3 x i32]
%4 = alloca i32
store i32 0, i32* %1
%5 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 0
store i32 50, i32* %5
%6 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 1
store i32 51, i32* %6
%7 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 2
store i32 52, i32* %7
%8 = bitcast [3 x i32]* %3 to i8*
store i32 0, i32* %4
br label %9
9: ; preds = %18, %0
%10 = load i32, i32* %4
%11 = icmp slt i32 %10, 3
br i1 %11, label %12, label %21
12: ; preds = %9
%13 = load i32, i32* %4
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds [3 x i32], [3 x i32]* %3, i64 0, i64 %14
%16 = load i32, i32* %15
%17 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %16)
br label %18
18: ; preds = %12
%19 = load i32, i32* %4
%20 = add nsw i32 %19, 1
store i32 %20, i32* %4
br label %9
21: ; preds = %9
%22 = load i32, i32* %1
ret i32 %22
}

LLVM IR (-O2):
@.str = [4 x i8] c"%i\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 50)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 51)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 52)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
uint16_t sancus_u16ll(long long v) {
  assert((v >= 0) && (v <= 0xffff));
  return (uint16_t)v;
}


x86 assembly (clang, -O0):
<sancus_u16ll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x9(%rbp)
jl     113a <sancus_u16ll+0x2a>
cmpq   $0xffff,-0x8(%rbp)
setle  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sancus_u16ll>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
cmp    $0x10000,%rbx
setb   %dil
call   1030 <assert@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @sancus_u16ll(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp sge i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i64, i64* %2
%7 = icmp sle i64 %6, 65535
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = call i32 @assert(i32 %10)
%12 = load i64, i64* %2
%13 = trunc i64 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @sancus_u16ll(i64 %0) {
%2 = icmp ult i64 %0, 65536
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = trunc i64 %0 to i32
ret i32 %5
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void retx_set_num(uint8_t *p_retx, uint16_t i_num) {
  p_retx[6] = i_num >> 8;
  p_retx[7] = i_num & 0xff;
}


x86 assembly (clang, -O0):
<retx_set_num>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x18(%rax)
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x1c(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<retx_set_num>:
movzbl %sil,%eax
sar    $0x8,%esi
mov    %esi,0x18(%rdi)
mov    %eax,0x1c(%rdi)
ret

LLVM IR (-O0):
define void @retx_set_num(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 8
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 6
store i32 %6, i32* %8
%9 = load i32, i32* %4
%10 = and i32 %9, 255
%11 = load i32*, i32** %3
%12 = getelementptr inbounds i32, i32* %11, i64 7
store i32 %10, i32* %12
ret void
}

LLVM IR (-O2):
define void @retx_set_num(i32* nocapture writeonly %0, i32 %1) {
%3 = ashr i32 %1, 8
%4 = getelementptr inbounds i32, i32* %0, i64 6
store i32 %3, i32* %4
%5 = and i32 %1, 255
%6 = getelementptr inbounds i32, i32* %0, i64 7
store i32 %5, i32* %6
ret void
}
unsigned int arrlen(const char **arr) {
  unsigned int len = 0;
  while (*arr++)
    len++;
  return len;
}


x86 assembly (clang, -O0):
<arrlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x8,%rcx
mov    %rcx,-0x8(%rbp)
cmpq   $0x0,(%rax)
je     1136 <arrlen+0x36>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <arrlen+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<arrlen>:
cmpq   $0x0,(%rdi)
je     111d <arrlen+0x1d>
xor    %eax,%eax
nopl   0x0(%rax,%rax,1)
cmpq   $0x0,0x8(%rdi,%rax,8)
lea    0x1(%rax),%rax
jne    1110 <arrlen+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @arrlen(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i8**, i8*** %2
%6 = getelementptr inbounds i8*, i8** %5, i32 1
store i8** %6, i8*** %2
%7 = load i8*, i8** %5
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = load i32, i32* %3
%11 = add i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @arrlen(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = icmp eq i8* %2, null
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8** [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8*, i8** %6, i64 1
%8 = add i32 %5, 1
%9 = load i8*, i8** %7
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ msleep(int);
void sleep(int s) { msleep(s * 1000); }


x86 assembly (clang, -O0):
<sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%edi
call   1030 <msleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleep>:
imul   $0x3e8,%edi,%edi
jmp    1030 <msleep@plt>

LLVM IR (-O0):
define void @sleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 1000
%5 = call i32 @msleep(i32 %4)
ret void
}

LLVM IR (-O2):
define void @sleep(i32 %0) {
%2 = mul nsw i32 %0, 1000
%3 = tail call i32 @msleep(i32 %2)
ret void
}