#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int sio_read_reg(int, unsigned long *);
int FS460_get_sync_mode(int channel, int *p_sync_mode) {
  int err;
  unsigned long mux1, mux2;
  if (!p_sync_mode)
    return 0x1000;
  err = sio_read_reg(0x3C, &mux1);
  if (err)
    return err;
  err = sio_read_reg(0x3E, &mux2);
  if (err)
    return err;
  switch (channel) {
  default:
    return 0x1000;
  case 1: {
    if ((1 << 3) & mux1) {
      if ((1 << 8) & mux2)
        *p_sync_mode = 3;
      else
        *p_sync_mode = 2;
    } else {
      if ((1 << 2) & mux1)
        *p_sync_mode = 1;
      else
        *p_sync_mode = 0;
    }
  } break;
  case 3: {
    if ((1 << 4) & mux1)
      *p_sync_mode = 2;
    else
      *p_sync_mode = 1;
  } break;
  }
  return 0;
}


x86 assembly (clang, -O0):
<FS460_get_sync_mode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1136 <FS460_get_sync_mode+0x26>
movl   $0x1000,-0x4(%rbp)
jmp    1263 <FS460_get_sync_mode+0x153>
mov    $0x3c,%edi
lea    -0x20(%rbp),%rsi
call   1030 <sio_read_reg@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     115c <FS460_get_sync_mode+0x4c>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1263 <FS460_get_sync_mode+0x153>
mov    $0x3e,%edi
lea    -0x28(%rbp),%rsi
call   1030 <sio_read_reg@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1182 <FS460_get_sync_mode+0x72>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1263 <FS460_get_sync_mode+0x153>
mov    -0x8(%rbp),%eax
mov    %eax,-0x2c(%rbp)
sub    $0x1,%eax
je     11b3 <FS460_get_sync_mode+0xa3>
jmp    1196 <FS460_get_sync_mode+0x86>
mov    -0x2c(%rbp),%eax
sub    $0x3,%eax
je     122c <FS460_get_sync_mode+0x11c>
jmp    11a7 <FS460_get_sync_mode+0x97>
movl   $0x1000,-0x4(%rbp)
jmp    1263 <FS460_get_sync_mode+0x153>
mov    -0x20(%rbp),%rax
and    $0x8,%rax
cmp    $0x0,%rax
je     11f7 <FS460_get_sync_mode+0xe7>
mov    -0x28(%rbp),%rax
and    $0x100,%rax
cmp    $0x0,%rax
je     11e8 <FS460_get_sync_mode+0xd8>
mov    -0x10(%rbp),%rax
movl   $0x3,(%rax)
jmp    11f2 <FS460_get_sync_mode+0xe2>
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
jmp    1227 <FS460_get_sync_mode+0x117>
mov    -0x20(%rbp),%rax
and    $0x4,%rax
cmp    $0x0,%rax
je     1218 <FS460_get_sync_mode+0x108>
mov    -0x10(%rbp),%rax
movl   $0x1,(%rax)
jmp    1222 <FS460_get_sync_mode+0x112>
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
jmp    1227 <FS460_get_sync_mode+0x117>
jmp    125c <FS460_get_sync_mode+0x14c>
mov    -0x20(%rbp),%rax
and    $0x10,%rax
cmp    $0x0,%rax
je     124d <FS460_get_sync_mode+0x13d>
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
jmp    1257 <FS460_get_sync_mode+0x147>
mov    -0x10(%rbp),%rax
movl   $0x1,(%rax)
jmp    125c <FS460_get_sync_mode+0x14c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FS460_get_sync_mode>:
push   %rbp
push   %rbx
sub    $0x18,%rsp
mov    $0x1000,%eax
test   %rsi,%rsi
je     118e <FS460_get_sync_mode+0x7e>
mov    %rsi,%rbx
mov    %edi,%ebp
lea    0x8(%rsp),%rsi
mov    $0x3c,%edi
call   1030 <sio_read_reg@plt>
test   %eax,%eax
jne    118e <FS460_get_sync_mode+0x7e>
lea    0x10(%rsp),%rsi
mov    $0x3e,%edi
call   1030 <sio_read_reg@plt>
test   %eax,%eax
jne    118e <FS460_get_sync_mode+0x7e>
cmp    $0x3,%ebp
je     116b <FS460_get_sync_mode+0x5b>
mov    $0x1000,%eax
cmp    $0x1,%ebp
jne    118e <FS460_get_sync_mode+0x7e>
mov    0x8(%rsp),%rax
test   $0x8,%al
jne    117a <FS460_get_sync_mode+0x6a>
shr    $0x2,%eax
and    $0x1,%eax
jmp    118a <FS460_get_sync_mode+0x7a>
mov    0x8(%rsp),%al
and    $0x10,%al
cmp    $0x1,%al
mov    $0x2,%eax
jmp    1187 <FS460_get_sync_mode+0x77>
mov    0x11(%rsp),%al
and    $0x1,%al
cmp    $0x1,%al
mov    $0x3,%eax
sbb    $0x0,%eax
mov    %eax,(%rbx)
xor    %eax,%eax
add    $0x18,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @FS460_get_sync_mode(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i64
%8 = alloca i64
store i32 %0, i32* %4
store i32* %1, i32** %5
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %12, label %11
11: ; preds = %2
store i32 4096, i32* %3
br label %60
12: ; preds = %2
%13 = call i32 @sio_read_reg(i32 60, i64* %7)
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load i32, i32* %6
store i32 %17, i32* %3
br label %60
18: ; preds = %12
%19 = call i32 @sio_read_reg(i32 62, i64* %8)
store i32 %19, i32* %6
%20 = load i32, i32* %6
%21 = icmp ne i32 %20, 0
br i1 %21, label %22, label %24
22: ; preds = %18
%23 = load i32, i32* %6
store i32 %23, i32* %3
br label %60
24: ; preds = %18
%25 = load i32, i32* %4
switch i32 %25, label %26 [
i32 1, label %27
i32 3, label %50
]
26: ; preds = %24
store i32 4096, i32* %3
br label %60
27: ; preds = %24
%28 = load i64, i64* %7
%29 = and i64 8, %28
%30 = icmp ne i64 %29, 0
br i1 %30, label %31, label %40
31: ; preds = %27
%32 = load i64, i64* %8
%33 = and i64 256, %32
%34 = icmp ne i64 %33, 0
br i1 %34, label %35, label %37
35: ; preds = %31
%36 = load i32*, i32** %5
store i32 3, i32* %36
br label %39
37: ; preds = %31
%38 = load i32*, i32** %5
store i32 2, i32* %38
br label %39
39: ; preds = %37, %35
br label %49
40: ; preds = %27
%41 = load i64, i64* %7
%42 = and i64 4, %41
%43 = icmp ne i64 %42, 0
br i1 %43, label %44, label %46
44: ; preds = %40
%45 = load i32*, i32** %5
store i32 1, i32* %45
br label %48
46: ; preds = %40
%47 = load i32*, i32** %5
store i32 0, i32* %47
br label %48
48: ; preds = %46, %44
br label %49
49: ; preds = %48, %39
br label %59
50: ; preds = %24
%51 = load i64, i64* %7
%52 = and i64 16, %51
%53 = icmp ne i64 %52, 0
br i1 %53, label %54, label %56
54: ; preds = %50
%55 = load i32*, i32** %5
store i32 2, i32* %55
br label %58
56: ; preds = %50
%57 = load i32*, i32** %5
store i32 1, i32* %57
br label %58
58: ; preds = %56, %54
br label %59
59: ; preds = %58, %49
store i32 0, i32* %3
br label %60
60: ; preds = %59, %26, %22, %16, %11
%61 = load i32, i32* %3
ret i32 %61
}

LLVM IR (-O2):
define i32 @FS460_get_sync_mode(i32 %0, i32* writeonly %1) {
%3 = alloca i64
%4 = alloca i64
%5 = bitcast i64* %3 to i8*
%6 = bitcast i64* %4 to i8*
%7 = icmp eq i32* %1, null
br i1 %7, label %35, label %8
8: ; preds = %2
%9 = call i32 @sio_read_reg(i32 60, i64* %3)
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %35
11: ; preds = %8
%12 = call i32 @sio_read_reg(i32 62, i64* %4)
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %35
14: ; preds = %11
switch i32 %0, label %35 [
i32 1, label %15
i32 3, label %28
]
15: ; preds = %14
%16 = load i64, i64* %3
%17 = and i64 %16, 8
%18 = icmp eq i64 %17, 0
br i1 %18, label %24, label %19
19: ; preds = %15
%20 = load i64, i64* %4
%21 = and i64 %20, 256
%22 = icmp eq i64 %21, 0
%23 = select i1 %22, i32 2, i32 3
br label %33
24: ; preds = %15
%25 = trunc i64 %16 to i32
%26 = lshr i32 %25, 2
%27 = and i32 %26, 1
br label %33
28: ; preds = %14
%29 = load i64, i64* %3
%30 = and i64 %29, 16
%31 = icmp eq i64 %30, 0
%32 = select i1 %31, i32 1, i32 2
br label %33
33: ; preds = %28, %24, %19
%34 = phi i32 [ %23, %19 ], [ %27, %24 ], [ %32, %28 ]
store i32 %34, i32* %1
br label %35
35: ; preds = %33, %14, %11, %8, %2
%36 = phi i32 [ 4096, %2 ], [ %9, %8 ], [ %12, %11 ], [ 4096, %14 ], [ 0, %33 ]
ret i32 %36
}