xunge/DecIR huggingface dataset:
/* Type definitions */
struct traversal_algorithm {
  int dummy;
};
struct statement_list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ast_safe_free_sl(struct statement_list *,
                                    struct traversal_algorithm *);
void optimize_safe_free_sl(struct statement_list *ptr,
                           struct traversal_algorithm *algo) {
  (void)(algo);
  ast_safe_free_sl(ptr, algo);
}


x86 assembly (clang, -O0):
<optimize_safe_free_sl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <ast_safe_free_sl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<optimize_safe_free_sl>:
jmp    1030 <ast_safe_free_sl@plt>

LLVM IR (-O0):
%struct.statement_list = type { i32 }
%struct.traversal_algorithm = type { i32 }
define void @optimize_safe_free_sl(%struct.statement_list* %0, %struct.traversal_algorithm* %1) {
%3 = alloca %struct.statement_list*
%4 = alloca %struct.traversal_algorithm*
store %struct.statement_list* %0, %struct.statement_list** %3
store %struct.traversal_algorithm* %1, %struct.traversal_algorithm** %4
%5 = load %struct.traversal_algorithm*, %struct.traversal_algorithm** %4
%6 = load %struct.statement_list*, %struct.statement_list** %3
%7 = load %struct.traversal_algorithm*, %struct.traversal_algorithm** %4
%8 = call i32 @ast_safe_free_sl(%struct.statement_list* %6, %struct.traversal_algorithm* %7)
ret void
}

LLVM IR (-O2):
%struct.statement_list = type { i32 }
%struct.traversal_algorithm = type { i32 }
define void @optimize_safe_free_sl(%struct.statement_list* %0, %struct.traversal_algorithm* %1) {
%3 = tail call i32 @ast_safe_free_sl(%struct.statement_list* %0, %struct.traversal_algorithm* %1)
ret void
}
int foo(void) {
  printf("%s:%s\n",
         "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
         "2022-01-22/02-19-57/repos/Boshin/workspace/refs/heads/baseline/"
         "ARMToolChain/source/glibc-2.21/elf/tst-deep1mod1.c",
         __func__);
  return 1;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee5(%rip),%rsi
lea    0xf90(%rip),%rdx
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xee8(%rip),%rsi
lea    0xf93(%rip),%rdx
xor    %eax,%eax
call   1030 <printf@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%s:%s\0A\00"
@.str.1 = [178 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Boshin/workspace/refs/heads/baseline/ARMToolChain/source/glibc-2.21/elf/tst-deep1mod1.c\00"
@__func__.foo = [4 x i8] c"foo\00"
define i32 @foo() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([178 x i8], [178 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @__func__.foo, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@.str = [7 x i8] c"%s:%s\0A\00"
@.str.1 = [178 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Boshin/workspace/refs/heads/baseline/ARMToolChain/source/glibc-2.21/elf/tst-deep1mod1.c\00"
@__func__.foo = [4 x i8] c"foo\00"
define i32 @foo() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([178 x i8], [178 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @__func__.foo, i64 0, i64 0))
ret i32 1
}
int ungetc() {}


x86 assembly (clang, -O0):
<ungetc>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ungetc>:
ret

LLVM IR (-O0):
define i32 @ungetc() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @ungetc() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ pacer_to_heart_systolic_pulse();
void heart_out_to_body_systolic_pulse() { pacer_to_heart_systolic_pulse(); }


x86 assembly (clang, -O0):
<heart_out_to_body_systolic_pulse>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <pacer_to_heart_systolic_pulse@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<heart_out_to_body_systolic_pulse>:
xor    %eax,%eax
jmp    1030 <pacer_to_heart_systolic_pulse@plt>

LLVM IR (-O0):
define void @heart_out_to_body_systolic_pulse() {
%1 = call i32 (...) @pacer_to_heart_systolic_pulse()
ret void
}

LLVM IR (-O2):
define void @heart_out_to_body_systolic_pulse() {
%1 = tail call i32 (...) @pacer_to_heart_systolic_pulse()
ret void
}
/* Type definitions */
typedef int pid_t;

/* Variables and functions */
int /*<<< orphan*/ exec_daemon(int, char **);
int fork();
int /*<<< orphan*/ unused(char *);
pid_t fork_daemon(int argc, char **argv) {
  pid_t pid = fork();
  if (pid == -1) {
    do {
      unused("fork() failed");
    } while (0);
    goto _out;
  }
  if (pid == 0)
    exec_daemon(argc, argv);
_out:
  return pid;
}


x86 assembly (clang, -O0):
<fork_daemon>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1050 <fork@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xffffffff,-0x14(%rbp)
jne    1169 <fork_daemon+0x39>
jmp    1158 <fork_daemon+0x28>
lea    0xea1(%rip),%rdi
call   1030 <unused@plt>
jmp    1184 <fork_daemon+0x54>
cmpl   $0x0,-0x14(%rbp)
jne    117f <fork_daemon+0x4f>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <exec_daemon@plt>
jmp    1184 <fork_daemon+0x54>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fork_daemon>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %edi,%ebp
xor    %eax,%eax
call   1050 <fork@plt>
mov    %eax,%ebx
test   %eax,%eax
je     1159 <fork_daemon+0x29>
cmp    $0xffffffff,%ebx
jne    1163 <fork_daemon+0x33>
lea    0xeae(%rip),%rdi
call   1030 <unused@plt>
jmp    1163 <fork_daemon+0x33>
mov    %ebp,%edi
mov    %r14,%rsi
call   1040 <exec_daemon@plt>
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [14 x i8] c"fork() failed\00"
define i32 @fork_daemon(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
%6 = call i32 (...) @fork()
store i32 %6, i32* %5
%7 = load i32, i32* %5
%8 = icmp eq i32 %7, -1
br i1 %8, label %9, label %13
9: ; preds = %2
br label %10
10: ; preds = %9
%11 = call i32 @unused(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %10
br label %21
13: ; preds = %2
%14 = load i32, i32* %5
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %20
16: ; preds = %13
%17 = load i32, i32* %3
%18 = load i8**, i8*** %4
%19 = call i32 @exec_daemon(i32 %17, i8** %18)
br label %20
20: ; preds = %16, %13
br label %21
21: ; preds = %20, %12
%22 = load i32, i32* %5
ret i32 %22
}

LLVM IR (-O2):
@.str = [14 x i8] c"fork() failed\00"
define i32 @fork_daemon(i32 %0, i8** %1) {
%3 = tail call i32 (...) @fork()
switch i32 %3, label %8 [
i32 -1, label %4
i32 0, label %6
]
4: ; preds = %2
%5 = tail call i32 @unused(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %8
6: ; preds = %2
%7 = tail call i32 @exec_daemon(i32 %0, i8** %1)
br label %8
8: ; preds = %2, %6, %4
ret i32 %3
}
void ARGBAttenuateRow_Any_AVX2() {}


x86 assembly (clang, -O0):
<ARGBAttenuateRow_Any_AVX2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBAttenuateRow_Any_AVX2>:
ret

LLVM IR (-O0):
define void @ARGBAttenuateRow_Any_AVX2() {
ret void
}

LLVM IR (-O2):
define void @ARGBAttenuateRow_Any_AVX2() {
ret void
}
__attribute__((weak)) void RSTC_IrqHandler(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<RSTC_IrqHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <RSTC_IrqHandler+0x9>
jmp    1109 <RSTC_IrqHandler+0x9>

x86 assembly (clang, -O2):
<RSTC_IrqHandler>:
jmp    1100 <RSTC_IrqHandler>

LLVM IR (-O0):
define weak void @RSTC_IrqHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define weak void @RSTC_IrqHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
void fill_array(char *arr, size_t arrlen) {
  for (size_t i = 0; i < arrlen; i++) {
    arr[i] = 'a';
  }
}


x86 assembly (clang, -O0):
<fill_array>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    113f <fill_array+0x3f>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
movb   $0x61,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1114 <fill_array+0x14>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fill_array>:
test   %rsi,%rsi
je     1127 <fill_array+0x17>
push   %rax
mov    %rsi,%rdx
mov    $0x61,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @fill_array(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %14, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %17
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i64, i64* %5
%13 = getelementptr inbounds i8, i8* %11, i64 %12
store i8 97, i8* %13
br label %14
14: ; preds = %10
%15 = load i64, i64* %5
%16 = add i64 %15, 1
store i64 %16, i64* %5
br label %6
17: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @fill_array(i8* nocapture writeonly %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %5, label %4
4: ; preds = %2
br label %5
5: ; preds = %4, %2
ret void
}
/* Variables and functions */
int tuner_get_rssi(void *, int *);
signed int bbm_com_tuner_get_rssi(void *handle, signed int *rssi) {
  signed int res;
  res = tuner_get_rssi(handle, rssi);
  return res;
}


x86 assembly (clang, -O0):
<bbm_com_tuner_get_rssi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <tuner_get_rssi@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bbm_com_tuner_get_rssi>:
jmp    1030 <tuner_get_rssi@plt>

LLVM IR (-O0):
define i32 @bbm_com_tuner_get_rssi(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i32
store i8* %0, i8** %3
store i32* %1, i32** %4
%6 = load i8*, i8** %3
%7 = load i32*, i32** %4
%8 = call i32 @tuner_get_rssi(i8* %6, i32* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @bbm_com_tuner_get_rssi(i8* %0, i32* %1) {
%3 = tail call i32 @tuner_get_rssi(i8* %0, i32* %1)
ret i32 %3
}
int float_round_int(double d) {
  if (d >= 0.0)
    return (int)(d + 0.5);
  else
    return (int)(d - 0.5);
}


x86 assembly (clang, -O0):
<float_round_int>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1134 <float_round_int+0x34>
movsd  0xedd(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x4(%rbp)
jmp    114c <float_round_int+0x4c>
movsd  -0x10(%rbp),%xmm0
movsd  0xebf(%rip),%xmm1
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<float_round_int>:
xorpd  %xmm1,%xmm1
xor    %eax,%eax
ucomisd %xmm1,%xmm0
setb   %al
lea    0xeec(%rip),%rcx
addsd  (%rcx,%rax,8),%xmm0
cvttsd2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @float_round_int(double %0) {
%2 = alloca i32
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp oge double %4, 0.000000e+00
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load double, double* %3
%8 = fadd double %7, 5.000000e-01
%9 = fptosi double %8 to i32
store i32 %9, i32* %2
br label %14
10: ; preds = %1
%11 = load double, double* %3
%12 = fsub double %11, 5.000000e-01
%13 = fptosi double %12 to i32
store i32 %13, i32* %2
br label %14
14: ; preds = %10, %6
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @float_round_int(double %0) {
%2 = fcmp ult double %0, 0.000000e+00
%3 = select i1 %2, double -5.000000e-01, double 5.000000e-01
%4 = fadd double %3, %0
%5 = fptosi double %4 to i32
ret i32 %5
}
unsigned GetMemoryLength(unsigned char *atr, unsigned length) {
  if (length < 2)
    return 0;
  return (1 << (((int)(atr[1] & 120) >> 3) + 6) * 1 << (int)(atr[1] & 7) / 8);
}


x86 assembly (clang, -O0):
<GetMemoryLength>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x2,-0x14(%rbp)
jae    1121 <GetMemoryLength+0x21>
movl   $0x0,-0x4(%rbp)
jmp    115c <GetMemoryLength+0x5c>
mov    -0x10(%rbp),%rax
movzbl 0x1(%rax),%ecx
and    $0x78,%ecx
sar    $0x3,%ecx
add    $0x6,%ecx
shl    $0x0,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movzbl 0x1(%rax),%eax
and    $0x7,%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
shl    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetMemoryLength>:
xor    %eax,%eax
cmp    $0x2,%esi
jb     111a <GetMemoryLength+0x1a>
mov    0x1(%rdi),%cl
shr    $0x3,%cl
and    $0xf,%cl
add    $0x6,%cl
mov    $0x1,%eax
shl    %cl,%eax
ret

LLVM IR (-O0):
define i32 @GetMemoryLength(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ult i32 %6, 2
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 0, i32* %3
br label %26
9: ; preds = %2
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = and i32 %13, 120
%15 = ashr i32 %14, 3
%16 = add nsw i32 %15, 6
%17 = mul nsw i32 %16, 1
%18 = shl i32 1, %17
%19 = load i8*, i8** %4
%20 = getelementptr inbounds i8, i8* %19, i64 1
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = and i32 %22, 7
%24 = sdiv i32 %23, 8
%25 = shl i32 %18, %24
store i32 %25, i32* %3
br label %26
26: ; preds = %9, %8
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @GetMemoryLength(i8* nocapture %0, i32 %1) {
%3 = icmp ult i32 %1, 2
br i1 %3, label %12, label %4
4: ; preds = %2
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = lshr i8 %6, 3
%8 = and i8 %7, 15
%9 = add nuw nsw i8 %8, 6
%10 = zext i8 %9 to i32
%11 = shl nuw nsw i32 1, %10
br label %12
12: ; preds = %2, %4
%13 = phi i32 [ %11, %4 ], [ 0, %2 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ rul___emit_newline();
int /*<<< orphan*/ rul___emit_string(char *);
int /*<<< orphan*/ rul___emit_verify_newline();
void rul__emit_comment(char *arbitrary_str) {
  rul___emit_verify_newline();
  rul___emit_string("/* ");
  rul___emit_string(arbitrary_str);
  rul___emit_string(" */");
  rul___emit_newline();
}


x86 assembly (clang, -O0):
<rul__emit_comment>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <rul___emit_verify_newline@plt>
lea    0xeb6(%rip),%rdi
call   1030 <rul___emit_string@plt>
mov    -0x8(%rbp),%rdi
call   1030 <rul___emit_string@plt>
lea    0xea5(%rip),%rdi
call   1030 <rul___emit_string@plt>
mov    $0x0,%al
call   1050 <rul___emit_newline@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rul__emit_comment>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <rul___emit_verify_newline@plt>
lea    0xebe(%rip),%rdi
call   1030 <rul___emit_string@plt>
mov    %rbx,%rdi
call   1030 <rul___emit_string@plt>
lea    0xeae(%rip),%rdi
call   1030 <rul___emit_string@plt>
xor    %eax,%eax
pop    %rbx
jmp    1050 <rul___emit_newline@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"/* \00"
@.str.1 = [4 x i8] c" */\00"
define void @rul__emit_comment(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @rul___emit_verify_newline()
%4 = call i32 @rul___emit_string(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%5 = load i8*, i8** %2
%6 = call i32 @rul___emit_string(i8* %5)
%7 = call i32 @rul___emit_string(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%8 = call i32 (...) @rul___emit_newline()
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"/* \00"
@.str.1 = [4 x i8] c" */\00"
define void @rul__emit_comment(i8* %0) {
%2 = tail call i32 (...) @rul___emit_verify_newline()
%3 = tail call i32 @rul___emit_string(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @rul___emit_string(i8* %0)
%5 = tail call i32 @rul___emit_string(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%6 = tail call i32 (...) @rul___emit_newline()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
void printText(char array[], int size) {
  int i;
  for (i = 0; i < size; i++) {
    printf("%c ", array[i]);
  }
}


x86 assembly (clang, -O0):
<printText>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1158 <printText+0x48>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
lea    0xebf(%rip),%rdi
movsbl (%rax,%rcx,1),%esi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <printText+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printText>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1146 <printText+0x36>
mov    %rdi,%r15
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r14
nopl   0x0(%rax,%rax,1)
movsbl (%r15,%rbx,1),%esi
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <printText+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%c \00"
define void @printText(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i8, i8* %14
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 signext %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%c \00"
define void @printText(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
%10 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 signext %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
/* Variables and functions */
bool SHAREMIND_MAP_KEY_LESS_signed_char(signed char const k1,
                                        signed char const k2) {
  return k1 < k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_LESS_signed_char>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%eax
movsbl -0x2(%rbp),%ecx
cmp    %ecx,%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_LESS_signed_char>:
xor    %eax,%eax
cmp    %sil,%dil
setl   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_MAP_KEY_LESS_signed_char(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
%7 = load i8, i8* %4
%8 = sext i8 %7 to i32
%9 = icmp slt i32 %6, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @SHAREMIND_MAP_KEY_LESS_signed_char(i8 signext %0, i8 signext %1) {
%3 = icmp slt i8 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
extern int id(int x) { return x; }


x86 assembly (clang, -O0):
<id>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<id>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @id(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @id(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
double const exp(double const);
double dsnaf(double const x) {
  if (x > 0) {
    double const y = 1 / x;
    return y * y * exp(-y);
  }
  return (double)0;
}


x86 assembly (clang, -O0):
<dsnaf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    1187 <dsnaf+0x77>
movsd  0xec9(%rip),%xmm0
divsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
call   1030 <exp@plt>
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    118f <dsnaf+0x7f>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dsnaf>:
movapd %xmm0,%xmm1
xorpd  %xmm0,%xmm0
ucomisd %xmm0,%xmm1
jbe    1151 <dsnaf+0x41>
sub    $0x18,%rsp
movsd  0xed6(%rip),%xmm0
divsd  %xmm1,%xmm0
movapd %xmm0,%xmm1
mulsd  %xmm0,%xmm1
movapd %xmm1,(%rsp)
xorpd  0xecd(%rip),%xmm0
call   1030 <exp@plt>
mulsd  (%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @dsnaf(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %3
%5 = load double, double* %3
%6 = fcmp ogt double %5, 0.000000e+00
br i1 %6, label %7, label %17
7: ; preds = %1
%8 = load double, double* %3
%9 = fdiv double 1.000000e+00, %8
store double %9, double* %4
%10 = load double, double* %4
%11 = load double, double* %4
%12 = fmul double %10, %11
%13 = load double, double* %4
%14 = fneg double %13
%15 = call double @exp(double %14)
%16 = fmul double %12, %15
store double %16, double* %2
br label %18
17: ; preds = %1
store double 0.000000e+00, double* %2
br label %18
18: ; preds = %17, %7
%19 = load double, double* %2
ret double %19
}

LLVM IR (-O2):
define double @dsnaf(double %0) {
%2 = fcmp ogt double %0, 0.000000e+00
br i1 %2, label %3, label %9
3: ; preds = %1
%4 = fdiv double 1.000000e+00, %0
%5 = fmul double %4, %4
%6 = fneg double %4
%7 = tail call double @exp(double %6)
%8 = fmul double %5, %7
br label %9
9: ; preds = %1, %3
%10 = phi double [ %8, %3 ], [ 0.000000e+00, %1 ]
ret double %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_greetings2(void) { printf("Hello from thread2 (UNPATCHED)\n"); }


x86 assembly (clang, -O0):
<print_greetings2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_greetings2>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"Hello from thread2 (UNPATCHED)\0A\00"
define void @print_greetings2() {
%1 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [31 x i8] c"Hello from thread2 (UNPATCHED)\00"
define void @print_greetings2() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ h2o__fatal(char *);
void *realloc(void *, size_t);
void *h2o_mem_realloc(void *oldp, size_t sz) {
  void *newp = realloc(oldp, sz);
  if (newp == NULL) {
    h2o__fatal("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/cubicdaiya/h2o/refs/heads/"
               "master/include/h2o/memory.h"
               ":"
               "338"
               ":"
               "no memory");
    return oldp;
  }
  return newp;
}


x86 assembly (clang, -O0):
<h2o_mem_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1165 <h2o_mem_realloc+0x45>
lea    0xead(%rip),%rdi
call   1030 <h2o__fatal@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    116d <h2o_mem_realloc+0x4d>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h2o_mem_realloc>:
push   %rbx
mov    %rdi,%rbx
call   1040 <realloc@plt>
test   %rax,%rax
je     1130 <h2o_mem_realloc+0x10>
pop    %rbx
ret
lea    0xec9(%rip),%rdi
call   1030 <h2o__fatal@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [158 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/cubicdaiya/h2o/refs/heads/master/include/h2o/memory.h:338:no memory\00"
define i8* @h2o_mem_realloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = call i8* @realloc(i8* %7, i64 %8)
store i8* %9, i8** %6
%10 = load i8*, i8** %6
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = call i32 @h2o__fatal(i8* getelementptr inbounds ([158 x i8], [158 x i8]* @.str, i64 0, i64 0))
%14 = load i8*, i8** %4
store i8* %14, i8** %3
br label %17
15: ; preds = %2
%16 = load i8*, i8** %6
store i8* %16, i8** %3
br label %17
17: ; preds = %15, %12
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
@.str = [158 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/cubicdaiya/h2o/refs/heads/master/include/h2o/memory.h:338:no memory\00"
define i8* @h2o_mem_realloc(i8* %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @h2o__fatal(i8* getelementptr inbounds ([158 x i8], [158 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %2, %5
%8 = phi i8* [ %0, %5 ], [ %3, %2 ]
ret i8* %8
}
int boot_stats_init(void) { return 0; }


x86 assembly (clang, -O0):
<boot_stats_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<boot_stats_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @boot_stats_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @boot_stats_init() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void alarm_handler(int sig) { exit(8); }


x86 assembly (clang, -O0):
<alarm_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x8,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<alarm_handler>:
push   %rax
mov    $0x8,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @alarm_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @exit(i32 8)
unreachable
}

LLVM IR (-O2):
define void @alarm_handler(i32 %0) {
%2 = tail call i32 @exit(i32 8)
unreachable
}
const char *__malidrv_build_info(void) {
  return "malidrv:  API_VERSION=19 REPO_URL=r3p2-01rel0 REVISION=r3p2-01rel0 "
         "CHANGED_REVISION= CHANGE_DATE= BUILD_DATE=Mon Dec 17 14:01:05 KST "
         "2012 BUILD=release TARGET_PLATFORM=pegasus-m400 "
         "MALI_PLATFORM=pegasus-m400 KDIR= "
         "OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP=y USING_PROFILING= "
         "USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 "
         "MALI_UPPER_HALF_SCHEDULING=1";
}


x86 assembly (clang, -O0):
<__malidrv_build_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__malidrv_build_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [360 x i8] c"malidrv: API_VERSION=19 REPO_URL=r3p2-01rel0 REVISION=r3p2-01rel0 CHANGED_REVISION= CHANGE_DATE= BUILD_DATE=Mon Dec 17 14:01:05 KST 2012 BUILD=release TARGET_PLATFORM=pegasus-m400 MALI_PLATFORM=pegasus-m400 KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP=y USING_PROFILING= USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([360 x i8], [360 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [360 x i8] c"malidrv: API_VERSION=19 REPO_URL=r3p2-01rel0 REVISION=r3p2-01rel0 CHANGED_REVISION= CHANGE_DATE= BUILD_DATE=Mon Dec 17 14:01:05 KST 2012 BUILD=release TARGET_PLATFORM=pegasus-m400 MALI_PLATFORM=pegasus-m400 KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP=y USING_PROFILING= USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([360 x i8], [360 x i8]* @.str, i64 0, i64 0)
}
void psp_per_deinit(void) {}


x86 assembly (clang, -O0):
<psp_per_deinit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psp_per_deinit>:
ret

LLVM IR (-O0):
define void @psp_per_deinit() {
ret void
}

LLVM IR (-O2):
define void @psp_per_deinit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void programDescription() {
  printf("The following C program opens a binary file called myfile");
  printf(", reads five bytes from it, and then closes the file.");
}


x86 assembly (clang, -O0):
<programDescription>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf13(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<programDescription>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
lea    0xf16(%rip),%rdi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [58 x i8] c"The following C program opens a binary file called myfile\00"
@.str.1 = [54 x i8] c", reads five bytes from it, and then closes the file.\00"
define void @programDescription() {
%1 = call i32 @printf(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [58 x i8] c"The following C program opens a binary file called myfile\00"
@.str.1 = [54 x i8] c", reads five bytes from it, and then closes the file.\00"
define void @programDescription() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([58 x i8], [58 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([54 x i8], [54 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assem_debug(char *);
int /*<<< orphan*/ output_byte(int);
void emit_fpop() {
  assem_debug("fpop\n");
  output_byte(0xdd);
  output_byte(0xd8);
}


x86 assembly (clang, -O0):
<emit_fpop>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <assem_debug@plt>
mov    $0xdd,%edi
call   1040 <output_byte@plt>
mov    $0xd8,%edi
call   1040 <output_byte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_fpop>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <assem_debug@plt>
mov    $0xdd,%edi
call   1040 <output_byte@plt>
mov    $0xd8,%edi
pop    %rax
jmp    1040 <output_byte@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"fpop\0A\00"
define void @emit_fpop() {
%1 = call i32 @assem_debug(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @output_byte(i32 221)
%3 = call i32 @output_byte(i32 216)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"fpop\0A\00"
define void @emit_fpop() {
%1 = tail call i32 @assem_debug(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @output_byte(i32 221)
%3 = tail call i32 @output_byte(i32 216)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delay_one_ms();
void delay_ms(int ms) {
  while (ms--)
    delay_one_ms();
}


x86 assembly (clang, -O0):
<delay_ms>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
je     113b <delay_ms+0x2b>
mov    $0x0,%al
call   1030 <delay_one_ms@plt>
jmp    111b <delay_ms+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay_ms>:
push   %rbx
test   %edi,%edi
je     112c <delay_ms+0x1c>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <delay_one_ms@plt>
add    $0xffffffff,%ebx
jne    1120 <delay_ms+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @delay_ms(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load i32, i32* %2
%5 = add nsw i32 %4, -1
store i32 %5, i32* %2
%6 = icmp ne i32 %4, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = call i32 (...) @delay_one_ms()
br label %3
9: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @delay_ms(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %8, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %5, %3 ], [ %0, %1 ]
%5 = add nsw i32 %4, -1
%6 = tail call i32 (...) @delay_one_ms()
%7 = icmp eq i32 %5, 0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}
/* Type definitions */
struct sockaddr_storage {
  int ss_family;
};
struct sockaddr_in {
  int /*<<< orphan*/ sin_port;
};

/* Variables and functions */
#define AF_INET 128
int ntohs(int /*<<< orphan*/);
int get_port(struct sockaddr_storage *addr) {
  switch (addr->ss_family) {
  case AF_INET:
    return ntohs(((struct sockaddr_in *)addr)->sin_port);
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<get_port>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
sub    $0x80,%eax
jne    1145 <get_port+0x35>
jmp    1132 <get_port+0x22>
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
call   1030 <ntohs@plt>
mov    %eax,-0x4(%rbp)
jmp    114c <get_port+0x3c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_port>:
cmpl   $0x80,(%rdi)
jne    1122 <get_port+0x12>
mov    $0x80,%edi
jmp    1030 <ntohs@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.sockaddr_storage = type { i32 }
%struct.sockaddr_in = type { i32 }
define i32 @get_port(%struct.sockaddr_storage* %0) {
%2 = alloca i32
%3 = alloca %struct.sockaddr_storage*
store %struct.sockaddr_storage* %0, %struct.sockaddr_storage** %3
%4 = load %struct.sockaddr_storage*, %struct.sockaddr_storage** %3
%5 = getelementptr inbounds %struct.sockaddr_storage, %struct.sockaddr_storage* %4, i32 0, i32 0
%6 = load i32, i32* %5
switch i32 %6, label %13 [
i32 128, label %7
]
7: ; preds = %1
%8 = load %struct.sockaddr_storage*, %struct.sockaddr_storage** %3
%9 = bitcast %struct.sockaddr_storage* %8 to %struct.sockaddr_in*
%10 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %9, i32 0, i32 0
%11 = load i32, i32* %10
%12 = call i32 @ntohs(i32 %11)
store i32 %12, i32* %2
br label %14
13: ; preds = %1
store i32 0, i32* %2
br label %14
14: ; preds = %13, %7
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
%struct.sockaddr_storage = type { i32 }
define i32 @get_port(%struct.sockaddr_storage* nocapture %0) {
%2 = getelementptr inbounds %struct.sockaddr_storage, %struct.sockaddr_storage* %0, i64 0, i32 0
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 128
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @ntohs(i32 128)
br label %7
7: ; preds = %1, %5
%8 = phi i32 [ %6, %5 ], [ 0, %1 ]
ret i32 %8
}
void __sys_appexit(void) {}


x86 assembly (clang, -O0):
<__sys_appexit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sys_appexit>:
ret

LLVM IR (-O0):
define void @__sys_appexit() {
ret void
}

LLVM IR (-O2):
define void @__sys_appexit() {
ret void
}
/* Variables and functions */
short VendorCmd(int, int, unsigned short, int /*<<< orphan*/,
                int /*<<< orphan*/, int /*<<< orphan*/);
short SetAddress(unsigned short addr) {
  return VendorCmd(0x00, 5, addr, 0, 0, 0);
}


x86 assembly (clang, -O0):
<SetAddress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
xor    %r9d,%r9d
mov    $0x5,%esi
mov    %r9d,%edi
movzwl -0x2(%rbp),%edx
mov    %r9d,%ecx
mov    %r9d,%r8d
call   1030 <VendorCmd@plt>
cwtl
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetAddress>:
mov    %edi,%edx
xor    %edi,%edi
mov    $0x5,%esi
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <VendorCmd@plt>

LLVM IR (-O0):
define signext i16 @SetAddress(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = call signext i16 @VendorCmd(i32 0, i32 5, i16 zeroext %3, i32 0, i32 0, i32 0)
ret i16 %4
}

LLVM IR (-O2):
define signext i16 @SetAddress(i16 zeroext %0) {
%2 = tail call signext i16 @VendorCmd(i32 0, i32 5, i16 zeroext %0, i32 0, i32 0, i32 0)
ret i16 %2
}
/* Variables and functions */
scalar_t__ time(int /*<<< orphan*/);
double CCutil_real_zeit() { return (double)time(0); }


x86 assembly (clang, -O0):
<CCutil_real_zeit>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <time@plt>
cvtsi2sd %rax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<CCutil_real_zeit>:
push   %rax
xor    %edi,%edi
call   1030 <time@plt>
cvtsi2sd %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @CCutil_real_zeit() {
%1 = call i64 @time(i32 0)
%2 = sitofp i64 %1 to double
ret double %2
}

LLVM IR (-O2):
define double @CCutil_real_zeit() {
%1 = tail call i64 @time(i32 0)
%2 = sitofp i64 %1 to double
ret double %2
}
void RandomFunc(unsigned short input[1], unsigned short output[1]) {
  unsigned short state[1];
  unsigned short local1;
  {
    state[0UL] = input[0UL] + (unsigned short)11483;
    local1 = 0UL;
    while (local1 < input[1UL]) {
      local1++;
    }
    output[0UL] = (state[0UL] + 255873917UL) << (unsigned short)1;
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%eax
add    $0x2cdb,%eax
mov    %ax,-0x12(%rbp)
movw   $0x0,-0x14(%rbp)
movzwl -0x14(%rbp),%eax
mov    -0x8(%rbp),%rcx
movzwl 0x2(%rcx),%ecx
cmp    %ecx,%eax
jge    1147 <RandomFunc+0x47>
mov    -0x14(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0x14(%rbp)
jmp    1122 <RandomFunc+0x22>
movzwl -0x12(%rbp),%eax
add    $0xf40537d,%rax
shl    $0x1,%rax
mov    %ax,%cx
mov    -0x10(%rbp),%rax
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
movzwl (%rdi),%eax
add    %eax,%eax
add    $0xb0,%eax
mov    %ax,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i16* %0, i16* %1) {
%3 = alloca i16*
%4 = alloca i16*
%5 = alloca [1 x i16]
%6 = alloca i16
store i16* %0, i16** %3
store i16* %1, i16** %4
%7 = load i16*, i16** %3
%8 = getelementptr inbounds i16, i16* %7, i64 0
%9 = load i16, i16* %8
%10 = zext i16 %9 to i32
%11 = add nsw i32 %10, 11483
%12 = trunc i32 %11 to i16
%13 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 0
store i16 %12, i16* %13
store i16 0, i16* %6
br label %14
14: ; preds = %22, %2
%15 = load i16, i16* %6
%16 = zext i16 %15 to i32
%17 = load i16*, i16** %3
%18 = getelementptr inbounds i16, i16* %17, i64 1
%19 = load i16, i16* %18
%20 = zext i16 %19 to i32
%21 = icmp slt i32 %16, %20
br i1 %21, label %22, label %25
22: ; preds = %14
%23 = load i16, i16* %6
%24 = add i16 %23, 1
store i16 %24, i16* %6
br label %14
25: ; preds = %14
%26 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 0
%27 = load i16, i16* %26
%28 = zext i16 %27 to i64
%29 = add i64 %28, 255873917
%30 = shl i64 %29, 1
%31 = trunc i64 %30 to i16
%32 = load i16*, i16** %4
%33 = getelementptr inbounds i16, i16* %32, i64 0
store i16 %31, i16* %33
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i16* nocapture %0, i16* nocapture writeonly %1) {
%3 = load i16, i16* %0
%4 = shl i16 %3, 1
%5 = add i16 %4, 176
store i16 %5, i16* %1
ret void
}
unsigned int hash(const char *s, int bitmask) {
  unsigned int h;
  for (h = 5381; *s; s++) {
    h *= 33;
    h += *s;
  }
  return (h & bitmask);
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x1505,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1144 <hash+0x44>
imul   $0x21,-0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1112 <hash+0x12>
mov    -0x10(%rbp),%eax
and    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     112a <hash+0x2a>
add    $0x1,%rdi
mov    $0x1505,%eax
nop
mov    %eax,%edx
shl    $0x5,%edx
add    %eax,%edx
movsbl %cl,%eax
add    %edx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash+0x10>
and    %esi,%eax
ret
mov    $0x1505,%eax
and    %esi,%eax
ret

LLVM IR (-O0):
define i32 @hash(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 5381, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = load i32, i32* %5
%12 = mul i32 %11, 33
store i32 %12, i32* %5
%13 = load i8*, i8** %3
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = load i32, i32* %5
%17 = add i32 %16, %15
store i32 %17, i32* %5
br label %18
18: ; preds = %10
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %3
br label %6
21: ; preds = %6
%22 = load i32, i32* %5
%23 = load i32, i32* %4
%24 = and i32 %22, %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @hash(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %13, %5 ], [ %3, %2 ]
%7 = phi i32 [ %11, %5 ], [ 5381, %2 ]
%8 = phi i8* [ %12, %5 ], [ %0, %2 ]
%9 = mul i32 %7, 33
%10 = sext i8 %6 to i32
%11 = add i32 %9, %10
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %2
%16 = phi i32 [ 5381, %2 ], [ %11, %5 ]
%17 = and i32 %16, %1
ret i32 %17
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0x9b() {
  Assert_real((isdigit(155) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              780, ("isdigit should be 0 for 0x9b"));
}


x86 assembly (clang, -O0):
<t_isdigit_0x9b>:
push   %rbp
mov    %rsp,%rbp
mov    $0x9b,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x30c,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0x9b>:
push   %rax
mov    $0x9b,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x30c,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0x9b\00"
define void @t_isdigit_0x9b() {
%1 = call i64 @isdigit(i32 155)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 780, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0x9b\00"
define void @t_isdigit_0x9b() {
%1 = tail call i64 @isdigit(i32 155)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 780, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fftss_init_threads();
void dfftss_init_threads__(void) { fftss_init_threads(); }


x86 assembly (clang, -O0):
<dfftss_init_threads__>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <fftss_init_threads@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dfftss_init_threads__>:
xor    %eax,%eax
jmp    1030 <fftss_init_threads@plt>

LLVM IR (-O0):
define void @dfftss_init_threads__() {
%1 = call i32 (...) @fftss_init_threads()
ret void
}

LLVM IR (-O2):
define void @dfftss_init_threads__() {
%1 = tail call i32 (...) @fftss_init_threads()
ret void
}
int hash(double x) {}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
ret

LLVM IR (-O0):
define i32 @hash(double %0) {
%2 = alloca i32
%3 = alloca double
store double %0, double* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @hash(double %0) {
ret i32 undef
}
int ata_acpi_on_devcfg(struct ata_device *dev) { return 0; }


x86 assembly (clang, -O0):
<ata_acpi_on_devcfg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ata_acpi_on_devcfg>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ata_device = type opaque
define i32 @ata_acpi_on_devcfg(%struct.ata_device* %0) {
%2 = alloca %struct.ata_device*
store %struct.ata_device* %0, %struct.ata_device** %2
ret i32 0
}

LLVM IR (-O2):
%struct.ata_device = type opaque
define i32 @ata_acpi_on_devcfg(%struct.ata_device* nocapture readnone %0) {
ret i32 0
}
int main(void) {
  char a;
  char *b = "char";
  a == b[0];
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
lea    0xeee(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"char\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %3
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %5, %9
%11 = zext i1 %10 to i32
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
/* Variables and functions */
int gob_encode_array_type(char *, size_t, char const *, int, int,
                          int /*<<< orphan*/);
int gob_encode_slice_type(char *buf, size_t buf_size, const char *name, int id,
                          int elem_type) {
  return gob_encode_array_type(buf, buf_size, name, id, elem_type, 0);
}


x86 assembly (clang, -O0):
<gob_encode_slice_type>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    -0x20(%rbp),%r8d
xor    %r9d,%r9d
call   1030 <gob_encode_array_type@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gob_encode_slice_type>:
xor    %r9d,%r9d
jmp    1030 <gob_encode_array_type@plt>

LLVM IR (-O0):
define i32 @gob_encode_slice_type(i8* %0, i64 %1, i8* %2, i32 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %6
store i64 %1, i64* %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i8*, i8** %6
%12 = load i64, i64* %7
%13 = load i8*, i8** %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i32 @gob_encode_array_type(i8* %11, i64 %12, i8* %13, i32 %14, i32 %15, i32 0)
ret i32 %16
}

LLVM IR (-O2):
define i32 @gob_encode_slice_type(i8* %0, i64 %1, i8* %2, i32 %3, i32 %4) {
%6 = tail call i32 @gob_encode_array_type(i8* %0, i64 %1, i8* %2, i32 %3, i32 %4, i32 0)
ret i32 %6
}