xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ BNCIO(int);
int BNC_4() {
  int ii, stat = 99;
  char com1, data;
  BNCIO(4);
  return (stat);
}


x86 assembly (clang, -O0):
<BNC_4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x63,-0x8(%rbp)
mov    $0x4,%edi
call   1030 <BNCIO@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BNC_4>:
push   %rax
mov    $0x4,%edi
call   1030 <BNCIO@plt>
mov    $0x63,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @BNC_4() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8
%4 = alloca i8
store i32 99, i32* %2
%5 = call i32 @BNCIO(i32 4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @BNC_4() {
%1 = tail call i32 @BNCIO(i32 4)
ret i32 99
}
void mdp4_mddi_blt_start(struct msm_fb_data_type *mfd) {}


x86 assembly (clang, -O0):
<mdp4_mddi_blt_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdp4_mddi_blt_start>:
ret

LLVM IR (-O0):
%struct.msm_fb_data_type = type opaque
define void @mdp4_mddi_blt_start(%struct.msm_fb_data_type* %0) {
%2 = alloca %struct.msm_fb_data_type*
store %struct.msm_fb_data_type* %0, %struct.msm_fb_data_type** %2
ret void
}

LLVM IR (-O2):
%struct.msm_fb_data_type = type opaque
define void @mdp4_mddi_blt_start(%struct.msm_fb_data_type* nocapture %0) {
ret void
}
void memleak_ignore(const void *ptr) {}


x86 assembly (clang, -O0):
<memleak_ignore>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<memleak_ignore>:
ret

LLVM IR (-O0):
define void @memleak_ignore(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @memleak_ignore(i8* nocapture %0) {
ret void
}
const char *GetDirSeparator() {
  static const char *SEPARATOR = "/";
  return SEPARATOR;
}


x86 assembly (clang, -O0):
<GetDirSeparator>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f15(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetDirSeparator>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@GetDirSeparator.SEPARATOR = internal global i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i32 0, i32 0)
@.str = [2 x i8] c"/\00"
define i8* @GetDirSeparator() {
%1 = load i8*, i8** @GetDirSeparator.SEPARATOR
ret i8* %1
}

LLVM IR (-O2):
@.str = [2 x i8] c"/\00"
define i8* @GetDirSeparator() {
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct gconv_glb {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
int GCONV_show_version(struct gconv_glb *glb) {
  fprintf(stderr, "%s\n", "0.0.1");
  return 0;
}


x86 assembly (clang, -O0):
<GCONV_show_version>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
lea    0xed4(%rip),%rsi
lea    0xed1(%rip),%rdx
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GCONV_show_version>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
lea    0xedc(%rip),%rdx
call   1030 <fprintf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.gconv_glb = type { i32 }
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [6 x i8] c"0.0.1\00"
define i32 @GCONV_show_version(%struct.gconv_glb* %0) {
%2 = alloca %struct.gconv_glb*
store %struct.gconv_glb* %0, %struct.gconv_glb** %2
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
%struct.gconv_glb = type { i32 }
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [6 x i8] c"0.0.1\00"
define i32 @GCONV_show_version(%struct.gconv_glb* nocapture readnone %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
int raw_n_truerand(n)
int n;
{
  int slop, v;
  slop = 0x7FFFFFFF % n;
  do {
    v = raw_truerand() >> 1;
  } while (v <= slop);
  return v % n;
}


x86 assembly (clang, -O0):
<raw_n_truerand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x7fffffff,%eax
cltd
idivl  -0x4(%rbp)
mov    %edx,-0x8(%rbp)
mov    $0x0,%al
call   1030 <raw_truerand@plt>
sar    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1127 <raw_n_truerand+0x17>
mov    -0xc(%rbp),%eax
cltd
idivl  -0x4(%rbp)
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<raw_n_truerand>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    $0x7fffffff,%eax
xor    %edx,%edx
idiv   %edi
mov    %edx,%ebp
xor    %eax,%eax
call   1030 <raw_truerand@plt>
sar    %eax
cmp    %ebp,%eax
jle    1120 <raw_n_truerand+0x10>
cltd
idiv   %ebx
mov    %edx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @raw_n_truerand(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = srem i32 2147483647, %5
store i32 %6, i32* %3
br label %7
7: ; preds = %10, %1
%8 = call i32 (...) @raw_truerand()
%9 = ashr i32 %8, 1
store i32 %9, i32* %4
br label %10
10: ; preds = %7
%11 = load i32, i32* %4
%12 = load i32, i32* %3
%13 = icmp sle i32 %11, %12
br i1 %13, label %7, label %14
14: ; preds = %10
%15 = load i32, i32* %4
%16 = load i32, i32* %2
%17 = srem i32 %15, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @raw_n_truerand(i32 %0) {
%2 = srem i32 2147483647, %0
br label %3
3: ; preds = %3, %1
%4 = tail call i32 (...) @raw_truerand()
%5 = ashr i32 %4, 1
%6 = icmp sgt i32 %5, %2
br i1 %6, label %7, label %3
7: ; preds = %3
%8 = srem i32 %5, %0
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ clear_io_bit(int, int);
void TOSH_CLR_PW2_PIN() { clear_io_bit(0x40, 2); }


x86 assembly (clang, -O0):
<TOSH_CLR_PW2_PIN>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40,%edi
mov    $0x2,%esi
call   1030 <clear_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_CLR_PW2_PIN>:
mov    $0x40,%edi
mov    $0x2,%esi
jmp    1030 <clear_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_CLR_PW2_PIN() {
%1 = call i32 @clear_io_bit(i32 64, i32 2)
ret void
}

LLVM IR (-O2):
define void @TOSH_CLR_PW2_PIN() {
%1 = tail call i32 @clear_io_bit(i32 64, i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ serial_putc(char);
void putDebugChar(char a) { serial_putc(a); }


x86 assembly (clang, -O0):
<putDebugChar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <serial_putc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putDebugChar>:
jmp    1030 <serial_putc@plt>

LLVM IR (-O0):
define void @putDebugChar(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @serial_putc(i8 signext %3)
ret void
}

LLVM IR (-O2):
define void @putDebugChar(i8 signext %0) {
%2 = tail call i32 @serial_putc(i8 signext %0)
ret void
}
void init_icmp(void) { return; }


x86 assembly (clang, -O0):
<init_icmp>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_icmp>:
ret

LLVM IR (-O0):
define void @init_icmp() {
ret void
}

LLVM IR (-O2):
define void @init_icmp() {
ret void
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
uint32_t UARTRxErrorGet(uint32_t ui32Base) {
  ;
  return ((*((volatile unsigned long *)(ui32Base + 0x00000004))) & 0x0000000F);
}


x86 assembly (clang, -O0):
<UARTRxErrorGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rax
and    $0xf,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTRxErrorGet>:
mov    %rdi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
mov    0x4(%rax),%rax
and    $0xf,%eax
ret

LLVM IR (-O0):
define i64 @UARTRxErrorGet(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = add i64 %3, 4
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, 15
ret i64 %7
}

LLVM IR (-O2):
define i64 @UARTRxErrorGet(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = add i64 %3, 4
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, 15
ret i64 %7
}
__attribute__((visibility("default"))) char short_in_byte_out(short int arg,
                                                              ...) {
  return (char)arg;
}


x86 assembly (clang, -O0):
<short_in_byte_out>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%al
pop    %rbp
ret

x86 assembly (clang, -O2):
<short_in_byte_out>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @short_in_byte_out(i16 signext %0, ...) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = trunc i16 %3 to i8
ret i8 %4
}

LLVM IR (-O2):
define signext i8 @short_in_byte_out(i16 signext %0, ...) {
%2 = trunc i16 %0 to i8
ret i8 %2
}
/* Variables and functions */
int /*<<< orphan*/ VimEnableIrq();
void TestSetupFunc(void) { VimEnableIrq(); }


x86 assembly (clang, -O0):
<TestSetupFunc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <VimEnableIrq@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TestSetupFunc>:
xor    %eax,%eax
jmp    1030 <VimEnableIrq@plt>

LLVM IR (-O0):
define void @TestSetupFunc() {
%1 = call i32 (...) @VimEnableIrq()
ret void
}

LLVM IR (-O2):
define void @TestSetupFunc() {
%1 = tail call i32 (...) @VimEnableIrq()
ret void
}
void wifi_evt_sme_ap_mode_stopped(
    const struct wifi_msg_sme_ap_mode_stopped_evt_t *msg) {}


x86 assembly (clang, -O0):
<wifi_evt_sme_ap_mode_stopped>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifi_evt_sme_ap_mode_stopped>:
ret

LLVM IR (-O0):
%struct.wifi_msg_sme_ap_mode_stopped_evt_t = type opaque
define void @wifi_evt_sme_ap_mode_stopped(%struct.wifi_msg_sme_ap_mode_stopped_evt_t* %0) {
%2 = alloca %struct.wifi_msg_sme_ap_mode_stopped_evt_t*
store %struct.wifi_msg_sme_ap_mode_stopped_evt_t* %0, %struct.wifi_msg_sme_ap_mode_stopped_evt_t** %2
ret void
}

LLVM IR (-O2):
%struct.wifi_msg_sme_ap_mode_stopped_evt_t = type opaque
define void @wifi_evt_sme_ap_mode_stopped(%struct.wifi_msg_sme_ap_mode_stopped_evt_t* nocapture %0) {
ret void
}
int trieindex(int d1, int d2) {
  return 27 * (d1 == '.' ? 0 : d1 - 'a' + 1) + (d2 == '.' ? 0 : d2 - 'a' + 1);
}


x86 assembly (clang, -O0):
<trieindex>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x2e,-0x4(%rbp)
jne    111e <trieindex+0x1e>
xor    %eax,%eax
mov    %eax,-0xc(%rbp)
jmp    112a <trieindex+0x2a>
mov    -0x4(%rbp),%eax
sub    $0x61,%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
imul   $0x1b,%eax,%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x2e,-0x8(%rbp)
jne    1147 <trieindex+0x47>
xor    %eax,%eax
mov    %eax,-0x14(%rbp)
jmp    1153 <trieindex+0x53>
mov    -0x8(%rbp),%eax
sub    $0x61,%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
mov    -0x14(%rbp),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<trieindex>:
xor    %ecx,%ecx
cmp    $0x2e,%edi
lea    (%rdi,%rdi,8),%eax
lea    -0xa20(%rax,%rax,2),%edx
cmove  %ecx,%edx
lea    -0x60(%rsi),%eax
cmp    $0x2e,%esi
cmove  %ecx,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @trieindex(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 46
br i1 %6, label %7, label %8
7: ; preds = %2
br label %12
8: ; preds = %2
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 97
%11 = add nsw i32 %10, 1
br label %12
12: ; preds = %8, %7
%13 = phi i32 [ 0, %7 ], [ %11, %8 ]
%14 = mul nsw i32 27, %13
%15 = load i32, i32* %4
%16 = icmp eq i32 %15, 46
br i1 %16, label %17, label %18
17: ; preds = %12
br label %22
18: ; preds = %12
%19 = load i32, i32* %4
%20 = sub nsw i32 %19, 97
%21 = add nsw i32 %20, 1
br label %22
22: ; preds = %18, %17
%23 = phi i32 [ 0, %17 ], [ %21, %18 ]
%24 = add nsw i32 %14, %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @trieindex(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 46
%4 = mul i32 %0, 27
%5 = add i32 %4, -2592
%6 = select i1 %3, i32 0, i32 %5
%7 = icmp eq i32 %1, 46
%8 = add nsw i32 %1, -96
%9 = select i1 %7, i32 0, i32 %8
%10 = add nsw i32 %6, %9
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ at_init();
int /*<<< orphan*/ dells200_chipset_init();
void dells200_init() {
  at_init();
  dells200_chipset_init();
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <at_init@plt>
mov    $0x0,%al
call   1030 <dells200_chipset_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
xor    %eax,%eax
call   1040 <at_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <dells200_chipset_init@plt>

LLVM IR (-O0):
define void @dells200_init() {
%1 = call i32 (...) @at_init()
%2 = call i32 (...) @dells200_chipset_init()
ret void
}

LLVM IR (-O2):
define void @dells200_init() {
%1 = tail call i32 (...) @at_init()
%2 = tail call i32 (...) @dells200_chipset_init()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Msp430GpioC__4__GeneralIO__makeOutput();
void CC2420TransmitP__CSN__makeOutput(void) {
  Msp430GpioC__4__GeneralIO__makeOutput();
}


x86 assembly (clang, -O0):
<CC2420TransmitP__CSN__makeOutput>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Msp430GpioC__4__GeneralIO__makeOutput@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC2420TransmitP__CSN__makeOutput>:
xor    %eax,%eax
jmp    1030 <Msp430GpioC__4__GeneralIO__makeOutput@plt>

LLVM IR (-O0):
define void @CC2420TransmitP__CSN__makeOutput() {
%1 = call i32 (...) @Msp430GpioC__4__GeneralIO__makeOutput()
ret void
}

LLVM IR (-O2):
define void @CC2420TransmitP__CSN__makeOutput() {
%1 = tail call i32 (...) @Msp430GpioC__4__GeneralIO__makeOutput()
ret void
}
float length(float a, float b, int n) { return ((b - a) / n); }


x86 assembly (clang, -O0):
<length>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
subss  -0x4(%rbp),%xmm0
cvtsi2ssl -0xc(%rbp),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<length>:
subss  %xmm0,%xmm1
xorps  %xmm0,%xmm0
cvtsi2ss %edi,%xmm0
divss  %xmm0,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @length(float %0, float %1, i32 %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca i32
store float %0, float* %4
store float %1, float* %5
store i32 %2, i32* %6
%7 = load float, float* %5
%8 = load float, float* %4
%9 = fsub float %7, %8
%10 = load i32, i32* %6
%11 = sitofp i32 %10 to float
%12 = fdiv float %9, %11
ret float %12
}

LLVM IR (-O2):
define float @length(float %0, float %1, i32 %2) {
%4 = fsub float %1, %0
%5 = sitofp i32 %2 to float
%6 = fdiv float %4, %5
ret float %6
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ chr1setBank0(int);
int /*<<< orphan*/ chr1setBank1(int);
void m33setParams8XX2(uint16_t addr, uint8_t val) {
  (void)addr;
  chr1setBank0((val << 11) | 0x000);
  chr1setBank1((val << 11) | 0x400);
}


x86 assembly (clang, -O0):
<m33setParams8XX2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
shl    $0xb,%edi
or     $0x0,%edi
call   1030 <chr1setBank0@plt>
mov    -0x8(%rbp),%edi
shl    $0xb,%edi
or     $0x400,%edi
call   1040 <chr1setBank1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m33setParams8XX2>:
push   %rbx
mov    %esi,%ebx
shl    $0xb,%ebx
mov    %ebx,%edi
call   1030 <chr1setBank0@plt>
or     $0x400,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1040 <chr1setBank1@plt>

LLVM IR (-O0):
define void @m33setParams8XX2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %6, 11
%8 = or i32 %7, 0
%9 = call i32 @chr1setBank0(i32 %8)
%10 = load i32, i32* %4
%11 = shl i32 %10, 11
%12 = or i32 %11, 1024
%13 = call i32 @chr1setBank1(i32 %12)
ret void
}

LLVM IR (-O2):
define void @m33setParams8XX2(i32 %0, i32 %1) {
%3 = shl i32 %1, 11
%4 = tail call i32 @chr1setBank0(i32 %3)
%5 = or i32 %3, 1024
%6 = tail call i32 @chr1setBank1(i32 %5)
ret void
}
void unsupported(struct nandsim_private *ns) {}


x86 assembly (clang, -O0):
<unsupported>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsupported>:
ret

LLVM IR (-O0):
%struct.nandsim_private = type opaque
define void @unsupported(%struct.nandsim_private* %0) {
%2 = alloca %struct.nandsim_private*
store %struct.nandsim_private* %0, %struct.nandsim_private** %2
ret void
}

LLVM IR (-O2):
%struct.nandsim_private = type opaque
define void @unsupported(%struct.nandsim_private* nocapture %0) {
ret void
}
/* Variables and functions */
int rand();
int rand_rangei(int min, int max) { return rand() % (max - min) + min; }


x86 assembly (clang, -O0):
<rand_rangei>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_rangei>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
sub    %ebp,%ebx
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @rand_rangei(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @rand()
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = srem i32 %5, %8
%10 = load i32, i32* %3
%11 = add nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @rand_rangei(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = sub nsw i32 %1, %0
%5 = srem i32 %3, %4
%6 = add nsw i32 %5, %0
ret i32 %6
}
int digit(c)
register char c;
{ return (c >= '0' && c <= '9'); }


x86 assembly (clang, -O0):
<digit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <digit+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<digit>:
shl    $0x18,%edi
add    $0xd0ffffff,%edi
xor    %eax,%eax
cmp    $0xaffffff,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @digit(i32 %0) {
%2 = alloca i8
%3 = trunc i32 %0 to i8
store i8 %3, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %2
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br label %11
11: ; preds = %7, %1
%12 = phi i1 [ false, %1 ], [ %10, %7 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @digit(i32 %0) {
%2 = shl i32 %0, 24
%3 = add i32 %2, -788529153
%4 = icmp ult i32 %3, 184549375
%5 = zext i1 %4 to i32
ret i32 %5
}
int filter_record(struct tracecmd_input *handle, struct record *record) {
  return 0;
}


x86 assembly (clang, -O0):
<filter_record>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<filter_record>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.tracecmd_input = type opaque
%struct.record = type opaque
define i32 @filter_record(%struct.tracecmd_input* %0, %struct.record* %1) {
%3 = alloca %struct.tracecmd_input*
%4 = alloca %struct.record*
store %struct.tracecmd_input* %0, %struct.tracecmd_input** %3
store %struct.record* %1, %struct.record** %4
ret i32 0
}

LLVM IR (-O2):
%struct.tracecmd_input = type opaque
%struct.record = type opaque
define i32 @filter_record(%struct.tracecmd_input* nocapture readnone %0, %struct.record* nocapture readnone %1) {
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ from_configure;
};
struct TYPE_4__ {
  TYPE_1__ xunmap;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
int get_XEvent_xunmap_from_configure(void *_p) {
  return (int)((XEvent *)_p)->xunmap.from_configure;
}


x86 assembly (clang, -O0):
<get_XEvent_xunmap_from_configure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xunmap_from_configure>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i32 @get_XEvent_xunmap_from_configure(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_XEvent_xunmap_from_configure(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
int fetch_and_dec(int *val) {
  int ret = -1;
  __asm__ __volatile__("lock; xaddl %0, %1"
                       : "+r"(ret), "+m"(*val)
                       :
                       : "memory");
  return ret;
}


x86 assembly (clang, -O0):
<fetch_and_dec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0xffffffff,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
lock xadd %eax,(%rcx)
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fetch_and_dec>:
mov    $0xffffffff,%eax
lock xadd %eax,(%rdi)
ret

LLVM IR (-O0):
define i32 @fetch_and_dec(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 -1, i32* %3
%4 = load i32, i32* %3
%5 = load i32*, i32** %2
%6 = call i32 asm sideeffect "lock; xaddl $0, $1", "=r,=*m,0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %5, i32 %4, i32* elementtype(i32) %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @fetch_and_dec(i32* %0) {
%2 = tail call i32 asm sideeffect "lock; xaddl $0, $1", "=r,=*m,0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %0, i32 -1, i32* elementtype(i32) %0)
ret i32 %2
}
int div1(int a, int b) { return a / b; }


x86 assembly (clang, -O0):
<div1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<div1>:
mov    %edi,%eax
cltd
idiv   %esi
ret

LLVM IR (-O0):
define i32 @div1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sdiv i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @div1(i32 %0, i32 %1) {
%3 = sdiv i32 %0, %1
ret i32 %3
}
/* Type definitions */
struct cstate {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ addrange(struct cstate *, char, int);
void addranges_W(struct cstate *g) {
  addrange(g, 0, '0' - 1);
  addrange(g, '9' + 1, 'A' - 1);
  addrange(g, 'Z' + 1, '_' - 1);
  addrange(g, '_' + 1, 'a' - 1);
  addrange(g, 'z' + 1, 0xFFFF);
}


x86 assembly (clang, -O0):
<addranges_W>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x2f,%edx
call   1030 <addrange@plt>
mov    -0x8(%rbp),%rdi
mov    $0x3a,%esi
mov    $0x40,%edx
call   1030 <addrange@plt>
mov    -0x8(%rbp),%rdi
mov    $0x5b,%esi
mov    $0x5e,%edx
call   1030 <addrange@plt>
mov    -0x8(%rbp),%rdi
mov    $0x60,%edx
mov    %edx,%esi
call   1030 <addrange@plt>
mov    -0x8(%rbp),%rdi
mov    $0x7b,%esi
mov    $0xffff,%edx
call   1030 <addrange@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<addranges_W>:
push   %rbx
mov    %rdi,%rbx
xor    %esi,%esi
mov    $0x2f,%edx
call   1030 <addrange@plt>
mov    %rbx,%rdi
mov    $0x3a,%esi
mov    $0x40,%edx
call   1030 <addrange@plt>
mov    %rbx,%rdi
mov    $0x5b,%esi
mov    $0x5e,%edx
call   1030 <addrange@plt>
mov    %rbx,%rdi
mov    $0x60,%esi
mov    $0x60,%edx
call   1030 <addrange@plt>
mov    %rbx,%rdi
mov    $0x7b,%esi
mov    $0xffff,%edx
pop    %rbx
jmp    1030 <addrange@plt>

LLVM IR (-O0):
%struct.cstate = type { i32 }
define void @addranges_W(%struct.cstate* %0) {
%2 = alloca %struct.cstate*
store %struct.cstate* %0, %struct.cstate** %2
%3 = load %struct.cstate*, %struct.cstate** %2
%4 = call i32 @addrange(%struct.cstate* %3, i8 signext 0, i32 47)
%5 = load %struct.cstate*, %struct.cstate** %2
%6 = call i32 @addrange(%struct.cstate* %5, i8 signext 58, i32 64)
%7 = load %struct.cstate*, %struct.cstate** %2
%8 = call i32 @addrange(%struct.cstate* %7, i8 signext 91, i32 94)
%9 = load %struct.cstate*, %struct.cstate** %2
%10 = call i32 @addrange(%struct.cstate* %9, i8 signext 96, i32 96)
%11 = load %struct.cstate*, %struct.cstate** %2
%12 = call i32 @addrange(%struct.cstate* %11, i8 signext 123, i32 65535)
ret void
}

LLVM IR (-O2):
%struct.cstate = type { i32 }
define void @addranges_W(%struct.cstate* %0) {
%2 = tail call i32 @addrange(%struct.cstate* %0, i8 signext 0, i32 47)
%3 = tail call i32 @addrange(%struct.cstate* %0, i8 signext 58, i32 64)
%4 = tail call i32 @addrange(%struct.cstate* %0, i8 signext 91, i32 94)
%5 = tail call i32 @addrange(%struct.cstate* %0, i8 signext 96, i32 96)
%6 = tail call i32 @addrange(%struct.cstate* %0, i8 signext 123, i32 65535)
ret void
}
/* Variables and functions */
int fork();
int sys_fork(void) { return fork(); }


x86 assembly (clang, -O0):
<sys_fork>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <fork@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_fork>:
xor    %eax,%eax
jmp    1030 <fork@plt>

LLVM IR (-O0):
define i32 @sys_fork() {
%1 = call i32 (...) @fork()
ret i32 %1
}

LLVM IR (-O2):
define i32 @sys_fork() {
%1 = tail call i32 (...) @fork()
ret i32 %1
}
void default_instr_hook_callback(unsigned int pc) {}


x86 assembly (clang, -O0):
<default_instr_hook_callback>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_instr_hook_callback>:
ret

LLVM IR (-O0):
define void @default_instr_hook_callback(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @default_instr_hook_callback(i32 %0) {
ret void
}
void BN_nist_mod_384(void) {}


x86 assembly (clang, -O0):
<BN_nist_mod_384>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_nist_mod_384>:
ret

LLVM IR (-O0):
define void @BN_nist_mod_384() {
ret void
}

LLVM IR (-O2):
define void @BN_nist_mod_384() {
ret void
}
/* Variables and functions */
int leLinha(char *);
int /*<<< orphan*/ printf(char *, ...);
int main() {
  char buffer[80];
  int length;
  length = leLinha(buffer);
  if (length > 0)
    printf("%s\n", buffer);
  else
    printf("A string estava vazia\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x60(%rbp),%rdi
call   1030 <leLinha@plt>
mov    %eax,-0x64(%rbp)
cmpl   $0x0,-0x64(%rbp)
jle    115c <main+0x3c>
lea    -0x60(%rbp),%rsi
lea    0xeb0(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
jmp    116a <main+0x4a>
lea    0xea1(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x58,%rsp
mov    %rsp,%rdi
call   1040 <leLinha@plt>
test   %eax,%eax
jle    1135 <main+0x15>
mov    %rsp,%rdi
jmp    113c <main+0x1c>
lea    0xec4(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x58,%rsp
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [23 x i8] c"A string estava vazia\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [80 x i8]
%3 = alloca i32
store i32 0, i32* %1
%4 = getelementptr inbounds [80 x i8], [80 x i8]* %2, i64 0, i64 0
%5 = call i32 @leLinha(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %0
%9 = getelementptr inbounds [80 x i8], [80 x i8]* %2, i64 0, i64 0
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %9)
br label %13
11: ; preds = %0
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0))
br label %13
13: ; preds = %11, %8
ret i32 0
}

LLVM IR (-O2):
@str = [22 x i8] c"A string estava vazia\00"
define i32 @main() {
%1 = alloca [80 x i8]
%2 = getelementptr inbounds [80 x i8], [80 x i8]* %1, i64 0, i64 0
%3 = call i32 @leLinha(i8* %2)
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 @puts(i8* %2)
br label %9
7: ; preds = %0
%8 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
br label %9
9: ; preds = %7, %5
ret i32 0
}
/* Variables and functions */
int calculate(int, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, int, int);
int main(void) {
  int count = 1000;
  printf("The sum of all 3/5-multiples below %d is: %d\n", count,
         calculate(count, 0));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x3e8,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
xor    %esi,%esi
call   1040 <calculate@plt>
mov    -0xc(%rbp),%esi
mov    %eax,%edx
lea    0xeae(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x3e8,%edi
xor    %esi,%esi
call   1040 <calculate@plt>
lea    0xecc(%rip),%rdi
mov    $0x3e8,%esi
mov    %eax,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [46 x i8] c"The sum of all 3/5-multiples below %d is: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1000, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @calculate(i32 %4, i32 0)
%6 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [46 x i8] c"The sum of all 3/5-multiples below %d is: %d\0A\00"
define i32 @main() {
%1 = tail call i32 @calculate(i32 1000, i32 0)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i32 1000, i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ bb_error_msg_and_die(char *, char const *);
void on_off(const char *msg) {
  bb_error_msg_and_die("error: argument of \"%s\" must be \"on\" or \"off\"",
                       msg);
}


x86 assembly (clang, -O0):
<on_off>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <bb_error_msg_and_die@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<on_off>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <bb_error_msg_and_die@plt>

LLVM IR (-O0):
@.str = [46 x i8] c"error: argument of \22%s\22 must be \22on\22 or \22off\22\00"
define void @on_off(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @bb_error_msg_and_die(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [46 x i8] c"error: argument of \22%s\22 must be \22on\22 or \22off\22\00"
define void @on_off(i8* %0) {
%2 = tail call i32 @bb_error_msg_and_die(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_usage() {
  printf("usage: nis <option> <input>\n"
         "\t-h\thelp\n"
         "\t-v\tversion\n"
         "\t-i\tshow file information\n"
         "\t-l\tlist all symbols\n"
         "\t-s<name>\tshow symbol\n");
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [119 x i8] c"usage: nis <option> <input>\0A\09-h\09help\0A\09-v\09version\0A\09-i\09show file information\0A\09-l\09list all symbols\0A\09-s<name>\09show symbol\0A\00"
define void @print_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([119 x i8], [119 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [118 x i8] c"usage: nis <option> <input>\0A\09-h\09help\0A\09-v\09version\0A\09-i\09show file information\0A\09-l\09list all symbols\0A\09-s<name>\09show symbol\00"
define void @print_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([118 x i8], [118 x i8]* @str, i64 0, i64 0))
ret void
}
void cache_sync_instructions(void) {}


x86 assembly (clang, -O0):
<cache_sync_instructions>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cache_sync_instructions>:
ret

LLVM IR (-O0):
define void @cache_sync_instructions() {
ret void
}

LLVM IR (-O2):
define void @cache_sync_instructions() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isascii(int);
void t_isascii_0xf2() {
  Assert_real((isascii(242) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              1215, ("isascii should be 0 for 0xf2"));
}


x86 assembly (clang, -O0):
<t_isascii_0xf2>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf2,%edi
call   1030 <isascii@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4bf,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0xf2>:
push   %rax
mov    $0xf2,%edi
call   1030 <isascii@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4bf,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xf2\00"
define void @t_isascii_0xf2() {
%1 = call i64 @isascii(i32 242)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1215, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xf2\00"
define void @t_isascii_0xf2() {
%1 = tail call i64 @isascii(i32 242)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1215, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ A_audioclose();
int /*<<< orphan*/ L_logicclose();
int /*<<< orphan*/ M_memoryclose();
int /*<<< orphan*/ P_physicclose();
int /*<<< orphan*/ V_visualclose();
void M_systemsclose() {
  A_audioclose();
  L_logicclose();
  P_physicclose();
  V_visualclose();
  M_memoryclose();
}


x86 assembly (clang, -O0):
<M_systemsclose>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1070 <A_audioclose@plt>
mov    $0x0,%al
call   1030 <L_logicclose@plt>
mov    $0x0,%al
call   1040 <P_physicclose@plt>
mov    $0x0,%al
call   1050 <V_visualclose@plt>
mov    $0x0,%al
call   1060 <M_memoryclose@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<M_systemsclose>:
push   %rax
xor    %eax,%eax
call   1070 <A_audioclose@plt>
xor    %eax,%eax
call   1030 <L_logicclose@plt>
xor    %eax,%eax
call   1040 <P_physicclose@plt>
xor    %eax,%eax
call   1050 <V_visualclose@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <M_memoryclose@plt>

LLVM IR (-O0):
define void @M_systemsclose() {
%1 = call i32 (...) @A_audioclose()
%2 = call i32 (...) @L_logicclose()
%3 = call i32 (...) @P_physicclose()
%4 = call i32 (...) @V_visualclose()
%5 = call i32 (...) @M_memoryclose()
ret void
}

LLVM IR (-O2):
define void @M_systemsclose() {
%1 = tail call i32 (...) @A_audioclose()
%2 = tail call i32 (...) @L_logicclose()
%3 = tail call i32 (...) @P_physicclose()
%4 = tail call i32 (...) @V_visualclose()
%5 = tail call i32 (...) @M_memoryclose()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIGALRM;
int /*<<< orphan*/ sig_unblock(int /*<<< orphan*/);
void sig_alarmunblock() { sig_unblock(SIGALRM); }


x86 assembly (clang, -O0):
<sig_alarmunblock>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <sig_unblock@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_alarmunblock>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <sig_unblock@plt>

LLVM IR (-O0):
@SIGALRM = global i32 0
define void @sig_alarmunblock() {
%1 = load i32, i32* @SIGALRM
%2 = call i32 @sig_unblock(i32 %1)
ret void
}

LLVM IR (-O2):
@SIGALRM = global i32 0
define void @sig_alarmunblock() {
%1 = load i32, i32* @SIGALRM
%2 = tail call i32 @sig_unblock(i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ nl_catd;

/* Variables and functions */
int /*<<< orphan*/ EOPNOTSUPP;
int /*<<< orphan*/ errno;
nl_catd catopen(const char *name, int oflag) {
  errno = EOPNOTSUPP;
  return (nl_catd)-1;
}


x86 assembly (clang, -O0):
<catopen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2ece(%rip),%rax
mov    (%rax),%ecx
mov    0x2ebd(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<catopen>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@EOPNOTSUPP = global i32 0
@errno = global i32 0
define i32 @catopen(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @EOPNOTSUPP
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@EOPNOTSUPP = global i32 0
@errno = global i32 0
define i32 @catopen(i8* nocapture readnone %0, i32 %1) {
%3 = load i32, i32* @EOPNOTSUPP
store i32 %3, i32* @errno
ret i32 -1
}
long long int strtoll(nptr, endptr, base) const char *nptr;
char **endptr;
int base;
{ return __strtoll_internal(nptr, endptr, base, 0); }


x86 assembly (clang, -O0):
<strtoll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
xor    %ecx,%ecx
mov    $0x0,%al
call   1030 <__strtoll_internal@plt>
cltq
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtoll>:
push   %rax
xor    %ecx,%ecx
xor    %eax,%eax
call   1030 <__strtoll_internal@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i64 @strtoll(i8* %0, i8** %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i32
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8**, i8*** %5
%9 = load i32, i32* %6
%10 = call i32 (i8*, i8**, i32, i32, ...) bitcast (i32 (...)* @__strtoll_internal to i32 (i8*, i8**, i32, i32, ...)*)(i8* %7, i8** %8, i32 %9, i32 0)
%11 = sext i32 %10 to i64
ret i64 %11
}

LLVM IR (-O2):
define i64 @strtoll(i8* %0, i8** %1, i32 %2) {
%4 = tail call i32 (i8*, i8**, i32, i32, ...) bitcast (i32 (...)* @__strtoll_internal to i32 (i8*, i8**, i32, i32, ...)*)(i8* %0, i8** %1, i32 %2, i32 0)
%5 = sext i32 %4 to i64
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ twoDsim_getEventBuffer(void **, int *, unsigned int *);
void get_ebuf(void **start, unsigned int *used) {
  int length;
  twoDsim_getEventBuffer(start, &length, used);
}


x86 assembly (clang, -O0):
<get_ebuf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    -0x14(%rbp),%rsi
call   1030 <twoDsim_getEventBuffer@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_ebuf>:
push   %rax
mov    %rsi,%rdx
lea    0x4(%rsp),%rsi
call   1030 <twoDsim_getEventBuffer@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @get_ebuf(i8** %0, i32* %1) {
%3 = alloca i8**
%4 = alloca i32*
%5 = alloca i32
store i8** %0, i8*** %3
store i32* %1, i32** %4
%6 = load i8**, i8*** %3
%7 = load i32*, i32** %4
%8 = call i32 @twoDsim_getEventBuffer(i8** %6, i32* %5, i32* %7)
ret void
}

LLVM IR (-O2):
define void @get_ebuf(i8** %0, i32* %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @twoDsim_getEventBuffer(i8** %0, i32* %3, i32* %1)
ret void
}
int main(void) {
  int a = 4;
  int b = 0;
  if (a > 1 || b)
    a = 8;
  else
    a = 1;
  return a;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x4,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x1,-0x8(%rbp)
jg     112d <main+0x2d>
cmpl   $0x0,-0xc(%rbp)
je     1139 <main+0x39>
movl   $0x8,-0x8(%rbp)
jmp    1140 <main+0x40>
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 4, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = icmp sgt i32 %4, 1
br i1 %5, label %9, label %6
6: ; preds = %0
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %6, %0
store i32 8, i32* %2
br label %11
10: ; preds = %6
store i32 1, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @main() {
ret i32 8
}
/* Variables and functions */
int /*<<< orphan*/ k(int);
int /*<<< orphan*/ printf(char *, int);
int j(int param1) {
  printf("j(%d)\n", param1);
  if (param1 > 1) {
    k(param1);
  }
  return param1;
}


x86 assembly (clang, -O0):
<j>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
cmpl   $0x1,-0x4(%rbp)
jle    114c <j+0x2c>
mov    -0x4(%rbp),%edi
call   1040 <k@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<j>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
cmp    $0x2,%ebx
jl     113d <j+0x1d>
mov    %ebx,%edi
call   1040 <k@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"j(%d)\0A\00"
define i32 @j(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 1
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = call i32 @k(i32 %8)
br label %10
10: ; preds = %7, %1
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@.str = [7 x i8] c"j(%d)\0A\00"
define i32 @j(i32 returned %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @k(i32 %0)
br label %6
6: ; preds = %4, %1
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ rsa_matematica_euclidiano_extendido_test();
int /*<<< orphan*/ rsa_matematica_mdc_test();
int /*<<< orphan*/ rsa_matematica_mmc_test();
int /*<<< orphan*/ rsa_matematica_pow_test();
int /*<<< orphan*/ rsa_matematica_validar_possivel_primo_test();
int main(int argc, char *argv[]) {
  rsa_matematica_mdc_test();
  rsa_matematica_mmc_test();
  rsa_matematica_pow_test();
  rsa_matematica_euclidiano_extendido_test();
  rsa_matematica_validar_possivel_primo_test();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rsa_matematica_mdc_test@plt>
mov    $0x0,%al
call   1050 <rsa_matematica_mmc_test@plt>
mov    $0x0,%al
call   1070 <rsa_matematica_pow_test@plt>
mov    $0x0,%al
call   1040 <rsa_matematica_euclidiano_extendido_test@plt>
mov    $0x0,%al
call   1060 <rsa_matematica_validar_possivel_primo_test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <rsa_matematica_mdc_test@plt>
xor    %eax,%eax
call   1050 <rsa_matematica_mmc_test@plt>
xor    %eax,%eax
call   1070 <rsa_matematica_pow_test@plt>
xor    %eax,%eax
call   1040 <rsa_matematica_euclidiano_extendido_test@plt>
xor    %eax,%eax
call   1060 <rsa_matematica_validar_possivel_primo_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @rsa_matematica_mdc_test()
%7 = call i32 (...) @rsa_matematica_mmc_test()
%8 = call i32 (...) @rsa_matematica_pow_test()
%9 = call i32 (...) @rsa_matematica_euclidiano_extendido_test()
%10 = call i32 (...) @rsa_matematica_validar_possivel_primo_test()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @rsa_matematica_mdc_test()
%4 = tail call i32 (...) @rsa_matematica_mmc_test()
%5 = tail call i32 (...) @rsa_matematica_pow_test()
%6 = tail call i32 (...) @rsa_matematica_euclidiano_extendido_test()
%7 = tail call i32 (...) @rsa_matematica_validar_possivel_primo_test()
ret i32 0
}
/* Variables and functions */
int get_char(char *addr) { return *addr; }


x86 assembly (clang, -O0):
<get_char>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_char>:
movsbl (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @get_char(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @get_char(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
ret i32 %3
}