xunge/DecIR huggingface dataset:
/* Variables and functions */
int CHAR_BIT;
int ld(size_t number) {
  size_t i;
  for (i = 0; i < sizeof(size_t) * CHAR_BIT; i++)
    if (((size_t)1 << i) == number)
      return i;
  return -1;
}


x86 assembly (clang, -O0):
<ld>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    0x2ec5(%rip),%rcx
movslq (%rcx),%rcx
shl    $0x3,%rcx
cmp    %rcx,%rax
jae    1163 <ld+0x63>
mov    -0x18(%rbp),%rcx
mov    $0x1,%eax
shl    %cl,%rax
cmp    -0x10(%rbp),%rax
jne    114d <ld+0x4d>
mov    -0x18(%rbp),%rax
mov    %eax,-0x4(%rbp)
jmp    116a <ld+0x6a>
jmp    1152 <ld+0x52>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1110 <ld+0x10>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ld>:
mov    0x2ed9(%rip),%rax
movslq (%rax),%rdx
mov    $0xffffffff,%eax
test   %rdx,%rdx
je     1146 <ld+0x46>
shl    $0x3,%rdx
cmp    $0x2,%rdx
mov    $0x1,%ecx
cmovb  %rcx,%rdx
xor    %ecx,%ecx
nopw   0x0(%rax,%rax,1)
mov    $0x1,%esi
shl    %cl,%rsi
cmp    %rdi,%rsi
je     1147 <ld+0x47>
add    $0x1,%rcx
cmp    %rcx,%rdx
jne    1130 <ld+0x30>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
@CHAR_BIT = global i32 0
define i32 @ld(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 0, i64* %4
br label %5
5: ; preds = %20, %1
%6 = load i64, i64* %4
%7 = load i32, i32* @CHAR_BIT
%8 = sext i32 %7 to i64
%9 = mul i64 8, %8
%10 = icmp ult i64 %6, %9
br i1 %10, label %11, label %23
11: ; preds = %5
%12 = load i64, i64* %4
%13 = shl i64 1, %12
%14 = load i64, i64* %3
%15 = icmp eq i64 %13, %14
br i1 %15, label %16, label %19
16: ; preds = %11
%17 = load i64, i64* %4
%18 = trunc i64 %17 to i32
store i32 %18, i32* %2
br label %24
19: ; preds = %11
br label %20
20: ; preds = %19
%21 = load i64, i64* %4
%22 = add i64 %21, 1
store i64 %22, i64* %4
br label %5
23: ; preds = %5
store i32 -1, i32* %2
br label %24
24: ; preds = %23, %16
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
@CHAR_BIT = global i32 0
define i32 @ld(i64 %0) {
%2 = load i32, i32* @CHAR_BIT
%3 = icmp eq i32 %2, 0
br i1 %3, label %17, label %4
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = shl nsw i64 %5, 3
%7 = call i64 @llvm.umax.i64(i64 %6, i64 1)
br label %8
8: ; preds = %4, %14
%9 = phi i64 [ %15, %14 ], [ 0, %4 ]
%10 = shl nuw i64 1, %9
%11 = icmp eq i64 %10, %0
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = trunc i64 %9 to i32
br label %17
14: ; preds = %8
%15 = add nuw i64 %9, 1
%16 = icmp eq i64 %15, %7
br i1 %16, label %17, label %8
17: ; preds = %14, %1, %12
%18 = phi i32 [ %13, %12 ], [ -1, %1 ], [ -1, %14 ]
ret i32 %18
}
/* Type definitions */
struct darr {
  int dummy;
};

/* Variables and functions */
int darr_resize(struct darr *, scalar_t__);
scalar_t__ darr_size(struct darr *);
int darr_shrink(struct darr *d, size_t size) {
  return darr_resize(d, darr_size(d) - size);
}


x86 assembly (clang, -O0):
<darr_shrink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <darr_size@plt>
mov    -0x18(%rbp),%rdi
mov    %rax,%rsi
sub    -0x10(%rbp),%rsi
call   1040 <darr_resize@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<darr_shrink>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <darr_size@plt>
sub    %r14,%rax
mov    %rbx,%rdi
mov    %rax,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <darr_resize@plt>

LLVM IR (-O0):
%struct.darr = type { i32 }
define i32 @darr_shrink(%struct.darr* %0, i64 %1) {
%3 = alloca %struct.darr*
%4 = alloca i64
store %struct.darr* %0, %struct.darr** %3
store i64 %1, i64* %4
%5 = load %struct.darr*, %struct.darr** %3
%6 = load %struct.darr*, %struct.darr** %3
%7 = call i64 @darr_size(%struct.darr* %6)
%8 = load i64, i64* %4
%9 = sub i64 %7, %8
%10 = call i32 @darr_resize(%struct.darr* %5, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
%struct.darr = type { i32 }
define i32 @darr_shrink(%struct.darr* %0, i64 %1) {
%3 = tail call i64 @darr_size(%struct.darr* %0)
%4 = sub i64 %3, %1
%5 = tail call i32 @darr_resize(%struct.darr* %0, i64 %4)
ret i32 %5
}
int ne_hash_int_comp(const void *a, const void *b) {
  if (a == b)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<ne_hash_int_comp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jne    1126 <ne_hash_int_comp+0x26>
movl   $0x1,-0x4(%rbp)
jmp    112d <ne_hash_int_comp+0x2d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ne_hash_int_comp>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @ne_hash_int_comp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = load i8*, i8** %5
%8 = icmp eq i8* %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, i32* %3
br label %11
10: ; preds = %2
store i32 0, i32* %3
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @ne_hash_int_comp(i8* readnone %0, i8* readnone %1) {
%3 = icmp eq i8* %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
void ECAPOperatingModeSelect(unsigned int baseAdd, unsigned int modeSelect) {
  if (modeSelect) {
    (*((volatile unsigned short *)(baseAdd + (0x2A)))) &= ~(0x0200u);
  } else {
    (*((volatile unsigned short *)(baseAdd + (0x2A)))) |= (0x0200u);
  }
}


x86 assembly (clang, -O0):
<ECAPOperatingModeSelect>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1130 <ECAPOperatingModeSelect+0x30>
mov    -0x4(%rbp),%eax
add    $0x2a,%eax
mov    %eax,%eax
mov    (%rax),%cx
movzwl %cx,%ecx
and    $0xfffffdff,%ecx
mov    %cx,(%rax)
jmp    1147 <ECAPOperatingModeSelect+0x47>
mov    -0x4(%rbp),%eax
add    $0x2a,%eax
mov    %eax,%eax
mov    (%rax),%cx
movzwl %cx,%ecx
or     $0x200,%ecx
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ECAPOperatingModeSelect>:
xor    %eax,%eax
test   %esi,%esi
sete   %al
add    $0x2a,%edi
movzwl (%rdi),%ecx
and    $0xfffffdff,%ecx
shl    $0x9,%eax
or     %ecx,%eax
mov    %ax,(%rdi)
ret

LLVM IR (-O0):
define void @ECAPOperatingModeSelect(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %16
7: ; preds = %2
%8 = load i32, i32* %3
%9 = add i32 %8, 42
%10 = zext i32 %9 to i64
%11 = inttoptr i64 %10 to i16*
%12 = load volatile i16, i16* %11
%13 = zext i16 %12 to i32
%14 = and i32 %13, -513
%15 = trunc i32 %14 to i16
store volatile i16 %15, i16* %11
br label %25
16: ; preds = %2
%17 = load i32, i32* %3
%18 = add i32 %17, 42
%19 = zext i32 %18 to i64
%20 = inttoptr i64 %19 to i16*
%21 = load volatile i16, i16* %20
%22 = zext i16 %21 to i32
%23 = or i32 %22, 512
%24 = trunc i32 %23 to i16
store volatile i16 %24, i16* %20
br label %25
25: ; preds = %16, %7
ret void
}

LLVM IR (-O2):
define void @ECAPOperatingModeSelect(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = add i32 %0, 42
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i16*
%7 = load volatile i16, i16* %6
%8 = and i16 %7, -513
%9 = select i1 %3, i16 512, i16 0
%10 = or i16 %8, %9
store volatile i16 %10, i16* %6
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ putc(unsigned char, int /*<<< orphan*/ *);
int write_midi_meta(int val, FILE *fp) {
  unsigned char c = val;
  putc(0xff, fp);
  putc(c, fp);
  return 2;
}


x86 assembly (clang, -O0):
<write_midi_meta>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rsi
mov    $0xff,%edi
call   1030 <putc@plt>
mov    -0x11(%rbp),%al
mov    -0x10(%rbp),%rsi
movzbl %al,%edi
call   1030 <putc@plt>
mov    $0x2,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_midi_meta>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    $0xff,%edi
call   1030 <putc@plt>
movzbl %bpl,%edi
mov    %rbx,%rsi
call   1030 <putc@plt>
mov    $0x2,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @write_midi_meta(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i8
store i32 %0, i32* %3
store i32* %1, i32** %4
%6 = load i32, i32* %3
%7 = trunc i32 %6 to i8
store i8 %7, i8* %5
%8 = load i32*, i32** %4
%9 = call i32 @putc(i8 zeroext -1, i32* %8)
%10 = load i8, i8* %5
%11 = load i32*, i32** %4
%12 = call i32 @putc(i8 zeroext %10, i32* %11)
ret i32 2
}

LLVM IR (-O2):
define i32 @write_midi_meta(i32 %0, i32* nocapture %1) {
%3 = trunc i32 %0 to i8
%4 = tail call i32 @putc(i8 zeroext -1, i32* %1)
%5 = tail call i32 @putc(i8 zeroext %3, i32* %1)
ret i32 2
}
char *strcpy(char *dest, const char *src) {
  const char *s = src;
  char *d = dest;
  while (*s != '\0') {
    *(d++) = *(s++);
  }
  return dest;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1153 <strcpy+0x53>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
mov    (%rax),%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
jmp    111c <strcpy+0x1c>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
mov    (%rsi),%cl
test   %cl,%cl
je     1120 <strcpy+0x20>
xor    %edx,%edx
nopl   0x0(%rax,%rax,1)
mov    %cl,(%rax,%rdx,1)
movzbl 0x1(%rsi,%rdx,1),%ecx
add    $0x1,%rdx
test   %cl,%cl
jne    1110 <strcpy+0x10>
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %4
store i8* %7, i8** %5
%8 = load i8*, i8** %3
store i8* %8, i8** %6
br label %9
9: ; preds = %14, %2
%10 = load i8*, i8** %5
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %20
14: ; preds = %9
%15 = load i8*, i8** %5
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %5
%17 = load i8, i8* %15
%18 = load i8*, i8** %6
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %6
store i8 %17, i8* %18
br label %9
20: ; preds = %9
%21 = load i8*, i8** %3
ret i8* %21
}

LLVM IR (-O2):
define i8* @strcpy(i8* returned writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %11, %5 ], [ %3, %2 ]
%7 = phi i8* [ %10, %5 ], [ %0, %2 ]
%8 = phi i8* [ %9, %5 ], [ %1, %2 ]
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = getelementptr inbounds i8, i8* %7, i64 1
store i8 %6, i8* %7
%11 = load i8, i8* %9
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
ret i8* %0
}
long int lrf(float x) { return __builtin_lroundf(x); }


x86 assembly (clang, -O0):
<lrf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <lroundf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lrf>:
jmp    1030 <lroundf@plt>

LLVM IR (-O0):
define i64 @lrf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i64 @lroundf(float %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @lrf(float %0) {
%2 = tail call i64 @lroundf(float %0)
ret i64 %2
}
/* Variables and functions */
float sqrt(int /*<<< orphan*/);
int /*<<< orphan*/ vectors_norm_sqr(float const *);
float vectors_norm(const float u[3]) { return sqrt(vectors_norm_sqr(u)); }


x86 assembly (clang, -O0):
<vectors_norm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <vectors_norm_sqr@plt>
mov    %eax,%edi
call   1040 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vectors_norm>:
push   %rax
call   1030 <vectors_norm_sqr@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <sqrt@plt>

LLVM IR (-O0):
define float @vectors_norm(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = call i32 @vectors_norm_sqr(float* %3)
%5 = call float @sqrt(i32 %4)
ret float %5
}

LLVM IR (-O2):
define float @vectors_norm(float* %0) {
%2 = tail call i32 @vectors_norm_sqr(float* %0)
%3 = tail call float @sqrt(i32 %2)
ret float %3
}
void nmi() {
  __asm__ __volatile__("cli");
  SetTextColor(0x04 | 0x08, 0x00);
  kprintf("\nERROR: nmi\n");
  do {
    __asm__ __volatile__("cli  \n\t"
                         "hlt");
  } while (1 == 1);
}


x86 assembly (clang, -O0):
<nmi>:
push   %rbp
mov    %rsp,%rbp
cli
mov    $0xc,%edi
xor    %esi,%esi
mov    $0x0,%al
call   1030 <SetTextColor@plt>
lea    0xec6(%rip),%rdi
mov    $0x0,%al
call   1040 <kprintf@plt>
cli
hlt
mov    $0x1,%al
test   $0x1,%al
jne    1141 <nmi+0x21>
jmp    1152 <nmi+0x32>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nmi>:
push   %rax
cli
mov    $0xc,%edi
xor    %esi,%esi
xor    %eax,%eax
call   1030 <SetTextColor@plt>
lea    0xec9(%rip),%rdi
xor    %eax,%eax
call   1040 <kprintf@plt>
xchg   %ax,%ax
cli
hlt
jmp    1140 <nmi+0x20>

LLVM IR (-O0):
@.str = [13 x i8] c"\0AERROR: nmi\0A\00"
define void @nmi() {
%1 = call i32 (i32, i32, ...) bitcast (i32 (...)* @SetTextColor to i32 (i32, i32, ...)*)(i32 12, i32 0)
%2 = call i32 (i8*, ...) bitcast (i32 (...)* @kprintf to i32 (i8*, ...)*)(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
br label %3
3: ; preds = %4, %0
br label %4
4: ; preds = %3
br i1 true, label %3, label %5
5: ; preds = %4
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"\0AERROR: nmi\0A\00"
define void @nmi() {
tail call void asm sideeffect "cli", "~{dirflag},~{fpsr},~{flags}"()
%1 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @SetTextColor to i32 (i32, i32, ...)*)(i32 12, i32 0)
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @kprintf to i32 (i8*, ...)*)(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
br label %3
3: ; preds = %3, %0
tail call void asm sideeffect "cli \0A\09hlt", "~{dirflag},~{fpsr},~{flags}"()
br label %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
int exampleProgram();
int shutdown(int);
scalar_t__ startup();
int main() {
  assert(sizeof(uint32_t) == 4);
  assert(startup() == 0);
  int excode = exampleProgram();
  return shutdown(excode);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
call   1050 <assert@plt>
mov    $0x0,%al
call   1060 <startup@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
mov    $0x0,%al
call   1030 <exampleProgram@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <shutdown@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1050 <assert@plt>
xor    %eax,%eax
call   1060 <startup@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
call   1050 <assert@plt>
xor    %eax,%eax
call   1030 <exampleProgram@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <shutdown@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @assert(i32 1)
%4 = call i64 (...) @startup()
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
%8 = call i32 (...) @exampleProgram()
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = call i32 @shutdown(i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
%2 = tail call i64 (...) @startup()
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = tail call i32 (...) @exampleProgram()
%7 = tail call i32 @shutdown(i32 %6)
ret i32 %7
}
int match(char A, char B) {
  if (A == '(' && B == ')')
    return 1;
  else if (A == '[' && B == ']')
    return 1;
  else if (A == '{' && B == '}')
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<match>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x5(%rbp)
mov    %al,-0x6(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x28,%eax
jne    1136 <match+0x36>
movsbl -0x6(%rbp),%eax
cmp    $0x29,%eax
jne    1136 <match+0x36>
movl   $0x1,-0x4(%rbp)
jmp    1189 <match+0x89>
movsbl -0x5(%rbp),%eax
cmp    $0x5b,%eax
jne    115c <match+0x5c>
movsbl -0x6(%rbp),%eax
cmp    $0x5d,%eax
jne    115c <match+0x5c>
movl   $0x1,-0x4(%rbp)
jmp    1189 <match+0x89>
movsbl -0x5(%rbp),%eax
cmp    $0x7b,%eax
jne    1182 <match+0x82>
movsbl -0x6(%rbp),%eax
cmp    $0x7d,%eax
jne    1182 <match+0x82>
movl   $0x1,-0x4(%rbp)
jmp    1189 <match+0x89>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<match>:
mov    $0x1,%eax
cmp    $0x28,%dil
jne    1112 <match+0x12>
cmp    $0x29,%sil
jne    1112 <match+0x12>
ret
cmp    $0x5b,%dil
jne    111e <match+0x1e>
cmp    $0x5d,%sil
je     1111 <match+0x11>
xor    $0x7b,%dil
xor    $0x7d,%sil
xor    %eax,%eax
or     %dil,%sil
sete   %al
ret

LLVM IR (-O0):
define i32 @match(i8 signext %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
%6 = load i8, i8* %4
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 40
br i1 %8, label %9, label %14
9: ; preds = %2
%10 = load i8, i8* %5
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 41
br i1 %12, label %13, label %14
13: ; preds = %9
store i32 1, i32* %3
br label %33
14: ; preds = %9, %2
%15 = load i8, i8* %4
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 91
br i1 %17, label %18, label %23
18: ; preds = %14
%19 = load i8, i8* %5
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 93
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 1, i32* %3
br label %33
23: ; preds = %18, %14
%24 = load i8, i8* %4
%25 = sext i8 %24 to i32
%26 = icmp eq i32 %25, 123
br i1 %26, label %27, label %32
27: ; preds = %23
%28 = load i8, i8* %5
%29 = sext i8 %28 to i32
%30 = icmp eq i32 %29, 125
br i1 %30, label %31, label %32
31: ; preds = %27
store i32 1, i32* %3
br label %33
32: ; preds = %27, %23
store i32 0, i32* %3
br label %33
33: ; preds = %32, %31, %22, %13
%34 = load i32, i32* %3
ret i32 %34
}

LLVM IR (-O2):
define i32 @match(i8 signext %0, i8 signext %1) {
%3 = icmp eq i8 %0, 40
%4 = icmp eq i8 %1, 41
%5 = and i1 %3, %4
br i1 %5, label %15, label %6
6: ; preds = %2
%7 = icmp eq i8 %0, 91
%8 = icmp eq i8 %1, 93
%9 = and i1 %7, %8
br i1 %9, label %15, label %10
10: ; preds = %6
%11 = icmp eq i8 %0, 123
%12 = icmp eq i8 %1, 125
%13 = and i1 %11, %12
%14 = zext i1 %13 to i32
br label %15
15: ; preds = %10, %6, %2
%16 = phi i32 [ 1, %2 ], [ 1, %6 ], [ %14, %10 ]
ret i32 %16
}
unsigned dot_matrix_4x_generic_input_fmts(void) { return (1 << 0) | (1 << 1); }


x86 assembly (clang, -O0):
<dot_matrix_4x_generic_input_fmts>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dot_matrix_4x_generic_input_fmts>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @dot_matrix_4x_generic_input_fmts() {
ret i32 3
}

LLVM IR (-O2):
define i32 @dot_matrix_4x_generic_input_fmts() {
ret i32 3
}
/* Variables and functions */
int /*<<< orphan*/ general_uintformat(char *, unsigned long, int, int);
void oct_str(char *buf, unsigned long value, int num_chr) {
  general_uintformat(buf, value, 8, (num_chr - 1) ? num_chr : 4);
}


x86 assembly (clang, -O0):
<oct_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
sub    $0x1,%eax
cmp    $0x0,%eax
je     114d <oct_str+0x3d>
mov    -0x14(%rbp),%eax
mov    %eax,-0x2c(%rbp)
jmp    115a <oct_str+0x4a>
mov    $0x4,%eax
mov    %eax,-0x2c(%rbp)
jmp    115a <oct_str+0x4a>
mov    -0x20(%rbp),%rsi
mov    -0x28(%rbp),%rdi
mov    -0x2c(%rbp),%ecx
mov    $0x8,%edx
call   1030 <general_uintformat@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<oct_str>:
cmp    $0x1,%edx
mov    $0x4,%ecx
cmovne %edx,%ecx
mov    $0x8,%edx
jmp    1030 <general_uintformat@plt>

LLVM IR (-O0):
define void @oct_str(i8* %0, i64 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32
store i8* %0, i8** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load i32, i32* %6
%10 = sub nsw i32 %9, 1
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %3
%13 = load i32, i32* %6
br label %15
14: ; preds = %3
br label %15
15: ; preds = %14, %12
%16 = phi i32 [ %13, %12 ], [ 4, %14 ]
%17 = call i32 @general_uintformat(i8* %7, i64 %8, i32 8, i32 %16)
ret void
}

LLVM IR (-O2):
define void @oct_str(i8* %0, i64 %1, i32 %2) {
%4 = icmp eq i32 %2, 1
%5 = select i1 %4, i32 4, i32 %2
%6 = tail call i32 @general_uintformat(i8* %0, i64 %1, i32 8, i32 %5)
ret void
}
int fun1177() { return 1177; }


x86 assembly (clang, -O0):
<fun1177>:
push   %rbp
mov    %rsp,%rbp
mov    $0x499,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1177>:
mov    $0x499,%eax
ret

LLVM IR (-O0):
define i32 @fun1177() {
ret i32 1177
}

LLVM IR (-O2):
define i32 @fun1177() {
ret i32 1177
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void success(void *v, int s) { printf("SUCCESS\n"); }


x86 assembly (clang, -O0):
<success>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<success>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"SUCCESS\0A\00"
define void @success(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [8 x i8] c"SUCCESS\00"
define void @success(i8* nocapture readnone %0, i32 %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ fmt;

/* Variables and functions */
int /*<<< orphan*/ scanf(char *, char *);
int /*<<< orphan*/ snprintf(char *, int, char *, size_t);
char *scanstr(char *buf, size_t len) {
  char fmt[256];
  if (len == 0)
    return buf;
  snprintf(fmt, sizeof(fmt), "%%%zus", len - 1);
  scanf(fmt, buf);
  return buf;
}


x86 assembly (clang, -O0):
<scanstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x120,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    114b <scanstr+0x2b>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1183 <scanstr+0x63>
lea    -0x120(%rbp),%rdi
mov    -0x18(%rbp),%rcx
sub    $0x1,%rcx
mov    $0x100,%esi
lea    0xe9a(%rip),%rdx
call   1030 <snprintf@plt>
lea    -0x120(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x120,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scanstr>:
push   %r14
push   %rbx
sub    $0x108,%rsp
mov    %rdi,%rbx
test   %rsi,%rsi
je     115b <scanstr+0x3b>
mov    %rsi,%rcx
add    $0xffffffffffffffff,%rcx
lea    0xec0(%rip),%rdx
mov    %rsp,%r14
mov    %r14,%rdi
mov    $0x100,%esi
call   1030 <snprintf@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <scanf@plt>
mov    %rbx,%rax
add    $0x108,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%%%zus\00"
define i8* @scanstr(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca [256 x i8]
store i8* %0, i8** %4
store i64 %1, i64* %5
%7 = load i64, i64* %5
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i8*, i8** %4
store i8* %10, i8** %3
br label %20
11: ; preds = %2
%12 = getelementptr inbounds [256 x i8], [256 x i8]* %6, i64 0, i64 0
%13 = load i64, i64* %5
%14 = sub i64 %13, 1
%15 = call i32 @snprintf(i8* %12, i32 256, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i64 %14)
%16 = getelementptr inbounds [256 x i8], [256 x i8]* %6, i64 0, i64 0
%17 = load i8*, i8** %4
%18 = call i32 @scanf(i8* %16, i8* %17)
%19 = load i8*, i8** %4
store i8* %19, i8** %3
br label %20
20: ; preds = %11, %9
%21 = load i8*, i8** %3
ret i8* %21
}

LLVM IR (-O2):
@.str = [7 x i8] c"%%%zus\00"
define i8* @scanstr(i8* returned %0, i64 %1) {
%3 = alloca [256 x i8]
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%5 = icmp eq i64 %1, 0
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = add i64 %1, -1
%8 = call i32 @snprintf(i8* %4, i32 256, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i64 %7)
%9 = call i32 @scanf(i8* %4, i8* %0)
br label %10
10: ; preds = %2, %6
ret i8* %0
}
void gtk_menu_attach() {}


x86 assembly (clang, -O0):
<gtk_menu_attach>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_menu_attach>:
ret

LLVM IR (-O0):
define void @gtk_menu_attach() {
ret void
}

LLVM IR (-O2):
define void @gtk_menu_attach() {
ret void
}
/* Type definitions */
struct evbuffer {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ evbuffer_add(struct evbuffer *, void *, unsigned long);
int /*<<< orphan*/ evtag_encode_int(struct evbuffer *, unsigned long);
int /*<<< orphan*/ evtag_encode_tag(struct evbuffer *, unsigned long);
void evtag_marshal(struct evbuffer *evbuf, unsigned long tag, const void *data,
                   unsigned long len) {
  evtag_encode_tag(evbuf, tag);
  evtag_encode_int(evbuf, len);
  evbuffer_add(evbuf, (void *)data, len);
}


x86 assembly (clang, -O0):
<evtag_marshal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <evtag_encode_tag@plt>
mov    -0x8(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <evtag_encode_int@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1050 <evbuffer_add@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<evtag_marshal>:
push   %r15
push   %r14
push   %rbx
mov    %rcx,%r15
mov    %rdx,%r14
mov    %rdi,%rbx
call   1040 <evtag_encode_tag@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
call   1030 <evtag_encode_int@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
pop    %rbx
pop    %r14
pop    %r15
jmp    1050 <evbuffer_add@plt>

LLVM IR (-O0):
%struct.evbuffer = type { i32 }
define void @evtag_marshal(%struct.evbuffer* %0, i64 %1, i8* %2, i64 %3) {
%5 = alloca %struct.evbuffer*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
store %struct.evbuffer* %0, %struct.evbuffer** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%9 = load %struct.evbuffer*, %struct.evbuffer** %5
%10 = load i64, i64* %6
%11 = call i32 @evtag_encode_tag(%struct.evbuffer* %9, i64 %10)
%12 = load %struct.evbuffer*, %struct.evbuffer** %5
%13 = load i64, i64* %8
%14 = call i32 @evtag_encode_int(%struct.evbuffer* %12, i64 %13)
%15 = load %struct.evbuffer*, %struct.evbuffer** %5
%16 = load i8*, i8** %7
%17 = load i64, i64* %8
%18 = call i32 @evbuffer_add(%struct.evbuffer* %15, i8* %16, i64 %17)
ret void
}

LLVM IR (-O2):
%struct.evbuffer = type { i32 }
define void @evtag_marshal(%struct.evbuffer* %0, i64 %1, i8* %2, i64 %3) {
%5 = tail call i32 @evtag_encode_tag(%struct.evbuffer* %0, i64 %1)
%6 = tail call i32 @evtag_encode_int(%struct.evbuffer* %0, i64 %3)
%7 = tail call i32 @evbuffer_add(%struct.evbuffer* %0, i8* %2, i64 %3)
ret void
}
double MMHGtoATM(double MMHG) {
  double ATM = 0.0013157894 * MMHG;
  return ATM;
}


x86 assembly (clang, -O0):
<MMHGtoATM>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<MMHGtoATM>:
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @MMHGtoATM(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fmul double 0x3F558ED21C404832, %4
store double %5, double* %3
%6 = load double, double* %3
ret double %6
}

LLVM IR (-O2):
define double @MMHGtoATM(double %0) {
%2 = fmul double %0, 0x3F558ED21C404832
ret double %2
}
void user_idle() {
  while (1) {
    asm volatile("nop\n");
  }
}


x86 assembly (clang, -O0):
<user_idle>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <user_idle+0x9>
nop
jmp    1109 <user_idle+0x9>

x86 assembly (clang, -O2):
<user_idle>:
nop
jmp    1100 <user_idle>

LLVM IR (-O0):
define void @user_idle() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @user_idle() {
br label %1
1: ; preds = %0, %1
tail call void asm sideeffect "nop\0A", "~{dirflag},~{fpsr},~{flags}"()
br label %1
}
int fun297() { return 297; }


x86 assembly (clang, -O0):
<fun297>:
push   %rbp
mov    %rsp,%rbp
mov    $0x129,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun297>:
mov    $0x129,%eax
ret

LLVM IR (-O0):
define i32 @fun297() {
ret i32 297
}

LLVM IR (-O2):
define i32 @fun297() {
ret i32 297
}
/* Variables and functions */
scalar_t__ gen_tempname(char *);
char *egg_mkdtemp(char *template) {
  if (gen_tempname(template))
    return NULL;
  else
    return template;
}


x86 assembly (clang, -O0):
<egg_mkdtemp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <gen_tempname@plt>
cmp    $0x0,%rax
je     113c <egg_mkdtemp+0x2c>
movq   $0x0,-0x8(%rbp)
jmp    1144 <egg_mkdtemp+0x34>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<egg_mkdtemp>:
push   %rbx
mov    %rdi,%rbx
call   1030 <gen_tempname@plt>
xor    %ecx,%ecx
test   %rax,%rax
cmove  %rbx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @egg_mkdtemp(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @gen_tempname(i8* %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i8* null, i8** %2
br label %10
8: ; preds = %1
%9 = load i8*, i8** %3
store i8* %9, i8** %2
br label %10
10: ; preds = %8, %7
%11 = load i8*, i8** %2
ret i8* %11
}

LLVM IR (-O2):
define i8* @egg_mkdtemp(i8* %0) {
%2 = tail call i64 @gen_tempname(i8* %0)
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i8* %0, i8* null
ret i8* %4
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ minor_code;
};
struct TYPE_4__ {
  TYPE_1__ xerror;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
unsigned char get_XEvent_xerror_minor_code(void *_p) {
  return (unsigned char)((XEvent *)_p)->xerror.minor_code;
}


x86 assembly (clang, -O0):
<get_XEvent_xerror_minor_code>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xerror_minor_code>:
mov    (%rdi),%al
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define zeroext i8 @get_XEvent_xerror_minor_code(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i8
ret i8 %8
}

LLVM IR (-O2):
define zeroext i8 @get_XEvent_xerror_minor_code(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i8
ret i8 %4
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, ...);
int /*<<< orphan*/ stderr;
void usage(const char *name) {
  fprintf(stderr, "Usage:\n");
  fprintf(stderr, "\t%s <string> <delimiter>\n", name);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
lea    0xed4(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec1(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2ec2(%rip),%r14
mov    (%r14),%edi
lea    0xed8(%rip),%rsi
xor    %eax,%eax
call   1030 <fprintf@plt>
mov    (%r14),%edi
lea    0xecf(%rip),%rsi
mov    %rbx,%rdx
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [8 x i8] c"Usage:\0A\00"
@.str.1 = [26 x i8] c"\09%s <string> <delimiter>\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = call i32 (i32, i8*, ...) @fprintf(i32 %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %2
%7 = call i32 (i32, i8*, ...) @fprintf(i32 %5, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0), i8* %6)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [8 x i8] c"Usage:\0A\00"
@.str.1 = [26 x i8] c"\09%s <string> <delimiter>\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 (i32, i8*, ...) @fprintf(i32 %2, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* @stderr
%5 = tail call i32 (i32, i8*, ...) @fprintf(i32 %4, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
unsigned int get_TM_max_frequency() { return 250000000; }


x86 assembly (clang, -O0):
<get_TM_max_frequency>:
push   %rbp
mov    %rsp,%rbp
mov    $0xee6b280,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_TM_max_frequency>:
mov    $0xee6b280,%eax
ret

LLVM IR (-O0):
define i32 @get_TM_max_frequency() {
ret i32 250000000
}

LLVM IR (-O2):
define i32 @get_TM_max_frequency() {
ret i32 250000000
}
int cc_common_cmp_ptr(const void *ptr1, const void *ptr2) {
  if (ptr1 < ptr2)
    return -1;
  else if (ptr1 > ptr2)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<cc_common_cmp_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1126 <cc_common_cmp_ptr+0x26>
movl   $0xffffffff,-0x4(%rbp)
jmp    114c <cc_common_cmp_ptr+0x4c>
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jbe    1140 <cc_common_cmp_ptr+0x40>
movl   $0x1,-0x4(%rbp)
jmp    114c <cc_common_cmp_ptr+0x4c>
jmp    1145 <cc_common_cmp_ptr+0x45>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cc_common_cmp_ptr>:
xor    %ecx,%ecx
cmp    %rsi,%rdi
seta   %cl
mov    $0xffffffff,%eax
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define i32 @cc_common_cmp_ptr(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = load i8*, i8** %5
%8 = icmp ult i8* %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 -1, i32* %3
br label %17
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = load i8*, i8** %5
%13 = icmp ugt i8* %11, %12
br i1 %13, label %14, label %15
14: ; preds = %10
store i32 1, i32* %3
br label %17
15: ; preds = %10
br label %16
16: ; preds = %15
store i32 0, i32* %3
br label %17
17: ; preds = %16, %14, %9
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @cc_common_cmp_ptr(i8* readnone %0, i8* readnone %1) {
%3 = icmp ult i8* %0, %1
%4 = icmp ugt i8* %0, %1
%5 = zext i1 %4 to i32
%6 = select i1 %3, i32 -1, i32 %5
ret i32 %6
}
/* Type definitions */
typedef scalar_t__ volatile uint32_t;

/* Variables and functions */
uint32_t EMACTimestampIntStatus(uint32_t ui32Base) {
  ;
  return ((*((volatile uint32_t *)(ui32Base + 0x00000728))));
}


x86 assembly (clang, -O0):
<EMACTimestampIntStatus>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x728(%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<EMACTimestampIntStatus>:
mov    %rdi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
mov    0x728(%rax),%rax
ret

LLVM IR (-O0):
define i64 @EMACTimestampIntStatus(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = add nsw i64 %3, 1832
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @EMACTimestampIntStatus(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = add nsw i64 %3, 1832
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}
/* Variables and functions */
int /*<<< orphan*/ Moto_AB(int /*<<< orphan*/, int /*<<< orphan*/);
void Moto_Stop() { Moto_AB(0, 0); }


x86 assembly (clang, -O0):
<Moto_Stop>:
push   %rbp
mov    %rsp,%rbp
xor    %esi,%esi
mov    %esi,%edi
call   1030 <Moto_AB@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Moto_Stop>:
xor    %edi,%edi
xor    %esi,%esi
jmp    1030 <Moto_AB@plt>

LLVM IR (-O0):
define void @Moto_Stop() {
%1 = call i32 @Moto_AB(i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @Moto_Stop() {
%1 = tail call i32 @Moto_AB(i32 0, i32 0)
ret void
}
void ROM_IntMasterEnable() {}


x86 assembly (clang, -O0):
<ROM_IntMasterEnable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ROM_IntMasterEnable>:
ret

LLVM IR (-O0):
define void @ROM_IntMasterEnable() {
ret void
}

LLVM IR (-O2):
define void @ROM_IntMasterEnable() {
ret void
}
/* Variables and functions */
char *call_and_write_to_red(char *const *, char *);
char *call_red(char *const *args) { return call_and_write_to_red(args, ""); }


x86 assembly (clang, -O0):
<call_red>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <call_and_write_to_red@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_red>:
lea    0xee9(%rip),%rsi
jmp    1030 <call_and_write_to_red@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @call_red(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = call i8* @call_and_write_to_red(i8** %3, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
ret i8* %4
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @call_red(i8** %0) {
%2 = tail call i8* @call_and_write_to_red(i8** %0, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
ret i8* %2
}
int test27() {
  struct test_27 {
    int x;
  } * y;
  return sizeof(y->x);
}


x86 assembly (clang, -O0):
<test27>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test27>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
%struct.test_27 = type { i32 }
define i32 @test27() {
%1 = alloca %struct.test_27*
ret i32 4
}

LLVM IR (-O2):
%struct.test_27 = type { i32 }
define i32 @test27() {
ret i32 4
}
long gt(unsigned long a, unsigned long b) { return a > b; }


x86 assembly (clang, -O0):
<gt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
seta   %al
and    $0x1,%al
movzbl %al,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<gt>:
xor    %eax,%eax
cmp    %rsi,%rdi
seta   %al
ret

LLVM IR (-O0):
define i64 @gt(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp ugt i64 %5, %6
%8 = zext i1 %7 to i32
%9 = sext i32 %8 to i64
ret i64 %9
}

LLVM IR (-O2):
define i64 @gt(i64 %0, i64 %1) {
%3 = icmp ugt i64 %0, %1
%4 = zext i1 %3 to i64
ret i64 %4
}
int tty_term_probe(void) { return 1; }


x86 assembly (clang, -O0):
<tty_term_probe>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tty_term_probe>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @tty_term_probe() {
ret i32 1
}

LLVM IR (-O2):
define i32 @tty_term_probe() {
ret i32 1
}
void ruby_init_setproctitle(int argc, char *argv[]) {}


x86 assembly (clang, -O0):
<ruby_init_setproctitle>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ruby_init_setproctitle>:
ret

LLVM IR (-O0):
define void @ruby_init_setproctitle(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret void
}

LLVM IR (-O2):
define void @ruby_init_setproctitle(i32 %0, i8** nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void print_usage(void) {
  printf("Usage: mod2gbt modfile.mod label_name [N]\n");
  printf(
      "       N: Set output to ROM bank N (defaults to %d, use 0 for unbanked)",
      (2));
  printf("\n\n");
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xf02(%rip),%rdi
mov    $0x2,%esi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xf37(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
push   %rax
lea    0xf20(%rip),%rdi
call   1030 <puts@plt>
lea    0xecc(%rip),%rdi
mov    $0x2,%esi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xf2b(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [43 x i8] c"Usage: mod2gbt modfile.mod label_name [N]\0A\00"
@.str.1 = [72 x i8] c" N: Set output to ROM bank N (defaults to %d, use 0 for unbanked)\00"
@.str.2 = [3 x i8] c"\0A\0A\00"
define void @print_usage() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([72 x i8], [72 x i8]* @.str.1, i64 0, i64 0), i32 2)
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str.1 = [72 x i8] c" N: Set output to ROM bank N (defaults to %d, use 0 for unbanked)\00"
@str = [42 x i8] c"Usage: mod2gbt modfile.mod label_name [N]\00"
@str.3 = [2 x i8] c"\0A\00"
define void @print_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([72 x i8], [72 x i8]* @.str.1, i64 0, i64 0), i32 2)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str.3, i64 0, i64 0))
ret void
}
int lower(int c) {
  if (c >= 'A' && c <= 'Z')
    return c - 'A' + 'a';
  return c;
}


x86 assembly (clang, -O0):
<lower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x41,-0x8(%rbp)
jl     112c <lower+0x2c>
cmpl   $0x5a,-0x8(%rbp)
jg     112c <lower+0x2c>
mov    -0x8(%rbp),%eax
sub    $0x41,%eax
add    $0x61,%eax
mov    %eax,-0x4(%rbp)
jmp    1132 <lower+0x32>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lower>:
lea    -0x41(%rdi),%ecx
lea    0x20(%rdi),%eax
cmp    $0x1a,%ecx
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @lower(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 65
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 90
br i1 %8, label %9, label %13
9: ; preds = %6
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 65
%12 = add nsw i32 %11, 97
store i32 %12, i32* %2
br label %15
13: ; preds = %6, %1
%14 = load i32, i32* %3
store i32 %14, i32* %2
br label %15
15: ; preds = %13, %9
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @lower(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = add nsw i32 %0, 32
%5 = select i1 %3, i32 %4, i32 %0
ret i32 %5
}
void encode_artnet_uint32_lohi(unsigned short n, unsigned char *data) {
  data[0] = (n >> 0) & 0xFF;
  data[1] = (n >> 8) & 0xFF;
  data[2] = (n >> 16) & 0xFF;
  data[3] = (n >> 24) & 0xFF;
}


x86 assembly (clang, -O0):
<encode_artnet_uint32_lohi>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
movzwl -0x2(%rbp),%eax
sar    $0x0,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
movzwl -0x2(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x1(%rax)
movzwl -0x2(%rbp),%eax
sar    $0x10,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x2(%rax)
movzwl -0x2(%rbp),%eax
sar    $0x18,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<encode_artnet_uint32_lohi>:
mov    %edi,%eax
mov    %al,(%rsi)
mov    %ah,0x1(%rsi)
movw   $0x0,0x2(%rsi)
ret

LLVM IR (-O0):
define void @encode_artnet_uint32_lohi(i16 zeroext %0, i8* %1) {
%3 = alloca i16
%4 = alloca i8*
store i16 %0, i16* %3
store i8* %1, i8** %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = ashr i32 %6, 0
%8 = and i32 %7, 255
%9 = trunc i32 %8 to i8
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i64 0
store i8 %9, i8* %11
%12 = load i16, i16* %3
%13 = zext i16 %12 to i32
%14 = ashr i32 %13, 8
%15 = and i32 %14, 255
%16 = trunc i32 %15 to i8
%17 = load i8*, i8** %4
%18 = getelementptr inbounds i8, i8* %17, i64 1
store i8 %16, i8* %18
%19 = load i16, i16* %3
%20 = zext i16 %19 to i32
%21 = ashr i32 %20, 16
%22 = and i32 %21, 255
%23 = trunc i32 %22 to i8
%24 = load i8*, i8** %4
%25 = getelementptr inbounds i8, i8* %24, i64 2
store i8 %23, i8* %25
%26 = load i16, i16* %3
%27 = zext i16 %26 to i32
%28 = ashr i32 %27, 24
%29 = and i32 %28, 255
%30 = trunc i32 %29 to i8
%31 = load i8*, i8** %4
%32 = getelementptr inbounds i8, i8* %31, i64 3
store i8 %30, i8* %32
ret void
}

LLVM IR (-O2):
define void @encode_artnet_uint32_lohi(i16 zeroext %0, i8* nocapture writeonly %1) {
%3 = trunc i16 %0 to i8
store i8 %3, i8* %1
%4 = lshr i16 %0, 8
%5 = trunc i16 %4 to i8
%6 = getelementptr inbounds i8, i8* %1, i64 1
store i8 %5, i8* %6
%7 = getelementptr inbounds i8, i8* %1, i64 2
store i8 0, i8* %7
%8 = getelementptr inbounds i8, i8* %1, i64 3
store i8 0, i8* %8
ret void
}