xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ errAbort(char *, char *);
void notGoodSubnetCidr(char *sns) {
  errAbort("'%s' is not a properly formatted subnet.\n"
           "Subnets in IPv4 must consist of one to four dot-separated numbers "
           "between 0 and 255 \n"
           "optionally followed by a CIDR slash and subnet bit length integer "
           "between 1 and 32, and trailing dot is not allowed.\n"
           "Subnets in IPv6 must consist of an IPv6 address followed by a CIDR "
           "slash and 1 and 128 for IPv6 addresses.\n"
           "Multiple subnets may be provided in a comma-separated list.",
           sns);
}


x86 assembly (clang, -O0):
<notGoodSubnetCidr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <errAbort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<notGoodSubnetCidr>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <errAbort@plt>

LLVM IR (-O0):
@.str = [410 x i8] c"'%s' is not a properly formatted subnet.\0ASubnets in IPv4 must consist of one to four dot-separated numbers between 0 and 255 \0Aoptionally followed by a CIDR slash and subnet bit length integer between 1 and 32, and trailing dot is not allowed.\0ASubnets in IPv6 must consist of an IPv6 address followed by a CIDR slash and 1 and 128 for IPv6 addresses.\0AMultiple subnets may be provided in a comma-separated list.\00"
define void @notGoodSubnetCidr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @errAbort(i8* getelementptr inbounds ([410 x i8], [410 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [410 x i8] c"'%s' is not a properly formatted subnet.\0ASubnets in IPv4 must consist of one to four dot-separated numbers between 0 and 255 \0Aoptionally followed by a CIDR slash and subnet bit length integer between 1 and 32, and trailing dot is not allowed.\0ASubnets in IPv6 must consist of an IPv6 address followed by a CIDR slash and 1 and 128 for IPv6 addresses.\0AMultiple subnets may be provided in a comma-separated list.\00"
define void @notGoodSubnetCidr(i8* %0) {
%2 = tail call i32 @errAbort(i8* getelementptr inbounds ([410 x i8], [410 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dummywrite(char *, int);
__attribute__((no)) void arraywrite(char *arr) {
  int i = 1024 * 1024 * 1024 - 1, r = 0;
  for (; i >= 0; i--) {
    dummywrite(arr, i);
  }
}


x86 assembly (clang, -O0):
<arraywrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x3fffffff,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
jl     114e <arraywrite+0x3e>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <dummywrite@plt>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    112a <arraywrite+0x1a>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arraywrite>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    $0x3fffffff,%ebp
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
mov    %ebp,%esi
call   1030 <dummywrite@plt>
add    $0xffffffff,%ebp
jb     1120 <arraywrite+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @arraywrite(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 1073741823, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %12, %1
%6 = load i32, i32* %3
%7 = icmp sge i32 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %5
%9 = load i8*, i8** %2
%10 = load i32, i32* %3
%11 = call i32 @dummywrite(i8* %9, i32 %10)
br label %12
12: ; preds = %8
%13 = load i32, i32* %3
%14 = add nsw i32 %13, -1
store i32 %14, i32* %3
br label %5
15: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @arraywrite(i8* %0) {
br label %2
2: ; preds = %1, %2
%3 = phi i32 [ 1073741823, %1 ], [ %5, %2 ]
%4 = tail call i32 @dummywrite(i8* %0, i32 %3)
%5 = add nsw i32 %3, -1
%6 = icmp eq i32 %3, 0
br i1 %6, label %7, label %2
7: ; preds = %2
ret void
}
int Round(double x) { return (int)(x + 0.5); }


x86 assembly (clang, -O0):
<Round>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
cvttsd2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Round>:
addsd  0xef8(%rip),%xmm0
cvttsd2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @Round(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double %3, 5.000000e-01
%5 = fptosi double %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @Round(double %0) {
%2 = fadd double %0, 5.000000e-01
%3 = fptosi double %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int get_bits(int value, int start, int end) {
  int result;
  assert(start >= end);
  result = value >> end;
  result = result % (1 << (start - end + 1));
  return result;
}


x86 assembly (clang, -O0):
<get_bits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    %cl,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    -0xc(%rbp),%ecx
add    $0x1,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_bits>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %edi,%ebx
xor    %edi,%edi
sub    %edx,%ebp
setge  %dil
call   1030 <assert@plt>
mov    %r14d,%ecx
sar    %cl,%ebx
add    $0x1,%bpl
mov    $0x1,%esi
mov    %ebp,%ecx
shl    %cl,%esi
mov    %ebx,%eax
cltd
idiv   %esi
mov    %edx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @get_bits(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp sge i32 %8, %9
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i32, i32* %4
%14 = load i32, i32* %6
%15 = ashr i32 %13, %14
store i32 %15, i32* %7
%16 = load i32, i32* %7
%17 = load i32, i32* %5
%18 = load i32, i32* %6
%19 = sub nsw i32 %17, %18
%20 = add nsw i32 %19, 1
%21 = shl i32 1, %20
%22 = srem i32 %16, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
ret i32 %23
}

LLVM IR (-O2):
define i32 @get_bits(i32 %0, i32 %1, i32 %2) {
%4 = icmp sge i32 %1, %2
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
%7 = ashr i32 %0, %2
%8 = add i32 %1, 1
%9 = sub i32 %8, %2
%10 = shl nuw i32 1, %9
%11 = srem i32 %7, %10
ret i32 %11
}
void SDHostBlockCountSet(unsigned long ulBase, unsigned short ulBlkCount) {
  unsigned long ulRegVal;
  ulRegVal = (*((volatile unsigned long *)(ulBase + 0x00000204)));
  (*((volatile unsigned long *)(ulBase + 0x00000204))) =
      ((ulRegVal & 0x0000FFFF) | (ulBlkCount << 16));
}


x86 assembly (clang, -O0):
<SDHostBlockCountSet>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rax
mov    0x204(%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
and    $0xffff,%rcx
movzwl -0xa(%rbp),%eax
shl    $0x10,%eax
cltq
or     %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x204(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SDHostBlockCountSet>:
mov    0x204(%rdi),%rax
movzwl %ax,%eax
shl    $0x10,%esi
movslq %esi,%rcx
or     %rax,%rcx
mov    %rcx,0x204(%rdi)
ret

LLVM IR (-O0):
define void @SDHostBlockCountSet(i64 %0, i16 zeroext %1) {
%3 = alloca i64
%4 = alloca i16
%5 = alloca i64
store i64 %0, i64* %3
store i16 %1, i16* %4
%6 = load i64, i64* %3
%7 = add i64 %6, 516
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
store i64 %9, i64* %5
%10 = load i64, i64* %5
%11 = and i64 %10, 65535
%12 = load i16, i16* %4
%13 = zext i16 %12 to i32
%14 = shl i32 %13, 16
%15 = sext i32 %14 to i64
%16 = or i64 %11, %15
%17 = load i64, i64* %3
%18 = add i64 %17, 516
%19 = inttoptr i64 %18 to i64*
store volatile i64 %16, i64* %19
ret void
}

LLVM IR (-O2):
define void @SDHostBlockCountSet(i64 %0, i16 zeroext %1) {
%3 = add i64 %0, 516
%4 = inttoptr i64 %3 to i64*
%5 = load volatile i64, i64* %4
%6 = and i64 %5, 65535
%7 = zext i16 %1 to i32
%8 = shl nuw i32 %7, 16
%9 = sext i32 %8 to i64
%10 = or i64 %6, %9
store volatile i64 %10, i64* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ ispunct(int);
void t_ispunct_0x05() {
  Assert_real((ispunct(5) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_ispunct.c",
              30, ("ispunct should be 0 for 0x05"));
}


x86 assembly (clang, -O0):
<t_ispunct_0x05>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%edi
call   1030 <ispunct@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x1e,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_ispunct_0x05>:
push   %rax
mov    $0x5,%edi
call   1030 <ispunct@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x1e,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0x05\00"
define void @t_ispunct_0x05() {
%1 = call i64 @ispunct(i32 5)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 30, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0x05\00"
define void @t_ispunct_0x05() {
%1 = tail call i64 @ispunct(i32 5)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 30, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sem_t;

/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
scalar_t__ sem_post(int /*<<< orphan*/ *);
void sem_epost(sem_t *sem) {
  if (sem_post(sem))
    do {
      perror("sem_post failed");
      exit(EXIT_FAILURE);
    } while (0);
}


x86 assembly (clang, -O0):
<sem_epost>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <sem_post@plt>
cmp    $0x0,%rax
je     116e <sem_epost+0x3e>
jmp    1154 <sem_epost+0x24>
lea    0xea5(%rip),%rdi
call   1040 <perror@plt>
mov    0x2e79(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sem_epost>:
push   %rax
call   1030 <sem_post@plt>
test   %rax,%rax
jne    113d <sem_epost+0xd>
pop    %rax
ret
lea    0xebc(%rip),%rdi
call   1040 <perror@plt>
mov    0x2e90(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"sem_post failed\00"
@EXIT_FAILURE = global i32 0
define void @sem_epost(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i64 @sem_post(i32* %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %1
br label %7
7: ; preds = %6
%8 = call i32 @perror(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%9 = load i32, i32* @EXIT_FAILURE
%10 = call i32 @exit(i32 %9)
unreachable
11: ; No predecessors!
br label %12
12: ; preds = %11, %1
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"sem_post failed\00"
@EXIT_FAILURE = global i32 0
define void @sem_epost(i32* %0) {
%2 = tail call i64 @sem_post(i32* %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = tail call i32 @perror(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* @EXIT_FAILURE
%7 = tail call i32 @exit(i32 %6)
unreachable
8: ; preds = %1
ret void
}
/* Variables and functions */
scalar_t__ EOF;
int /*<<< orphan*/ printf(char *, int);
scalar_t__ scanf(char *, int *);
int main() {
  for (int a; scanf("%d", &a) != EOF; printf("%d\n", a))
    ;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    0x2ea2(%rip),%rcx
cmp    (%rcx),%rax
je     1168 <main+0x48>
jmp    1154 <main+0x34>
mov    -0x8(%rbp),%esi
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
jmp    112f <main+0xf>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
lea    0xed1(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x2ea8(%rip),%r12
cmp    (%r12),%rax
je     117d <main+0x5d>
lea    0xeb6(%rip),%r14
lea    0xeac(%rip),%r15
lea    0x4(%rsp),%rbx
nopl   0x0(%rax)
mov    0x4(%rsp),%esi
mov    %r14,%rdi
call   1030 <printf@plt>
mov    %r15,%rdi
mov    %rbx,%rsi
call   1040 <scanf@plt>
cmp    (%r12),%rax
jne    1160 <main+0x40>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@EOF = global i64 0
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %8, %0
%4 = call i64 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = load i64, i64* @EOF
%6 = icmp ne i64 %4, %5
br i1 %6, label %7, label %11
7: ; preds = %3
br label %8
8: ; preds = %7
%9 = load i32, i32* %2
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %9)
br label %3
11: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@EOF = global i64 0
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i64 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i64, i64* @EOF
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %7
6: ; preds = %7, %0
ret i32 0
7: ; preds = %0, %7
%8 = load i32, i32* %1
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %8)
%10 = call i64 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%11 = load i64, i64* @EOF
%12 = icmp eq i64 %10, %11
br i1 %12, label %6, label %7
}
void gtk_file_chooser_get_uri() {}


x86 assembly (clang, -O0):
<gtk_file_chooser_get_uri>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_file_chooser_get_uri>:
ret

LLVM IR (-O0):
define void @gtk_file_chooser_get_uri() {
ret void
}

LLVM IR (-O2):
define void @gtk_file_chooser_get_uri() {
ret void
}
const void *test(const struct dummy *t) {
  const struct dummy *tt;
  enum dummy_enum *e;
  tt = t;
  return t;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
%struct.dummy = type opaque
define i8* @test(%struct.dummy* %0) {
%2 = alloca %struct.dummy*
%3 = alloca %struct.dummy*
%4 = alloca i32*
store %struct.dummy* %0, %struct.dummy** %2
%5 = load %struct.dummy*, %struct.dummy** %2
store %struct.dummy* %5, %struct.dummy** %3
%6 = load %struct.dummy*, %struct.dummy** %2
%7 = bitcast %struct.dummy* %6 to i8*
ret i8* %7
}

LLVM IR (-O2):
%struct.dummy = type opaque
define i8* @test(%struct.dummy* readnone %0) {
%2 = bitcast %struct.dummy* %0 to i8*
ret i8* %2
}
long convert_long(long v) { return (long)v; }


x86 assembly (clang, -O0):
<convert_long>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<convert_long>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @convert_long(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
ret i64 %3
}

LLVM IR (-O2):
define i64 @convert_long(i64 returned %0) {
ret i64 %0
}
/* Variables and functions */
int /*<<< orphan*/ acc_device_host;
int /*<<< orphan*/ expect_device_properties(int /*<<< orphan*/,
                                            int /*<<< orphan*/,
                                            int /*<<< orphan*/, char *, char *,
                                            char *);
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Checking acc_device_host device properties\n");
  expect_device_properties(acc_device_host, 0, 0, "GNU", "GOMP", "1.0");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
xor    %edx,%edx
lea    0xeea(%rip),%rcx
lea    0xee7(%rip),%r8
lea    0xee5(%rip),%r9
mov    %edx,%esi
call   1040 <expect_device_properties@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
lea    0xec3(%rip),%rcx
lea    0xec0(%rip),%r8
lea    0xebe(%rip),%r9
xor    %esi,%esi
xor    %edx,%edx
call   1040 <expect_device_properties@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [44 x i8] c"Checking acc_device_host device properties\0A\00"
@acc_device_host = global i32 0
@.str.1 = [4 x i8] c"GNU\00"
@.str.2 = [5 x i8] c"GOMP\00"
@.str.3 = [4 x i8] c"1.0\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @acc_device_host
%3 = call i32 @expect_device_properties(i32 %2, i32 0, i32 0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.3, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@acc_device_host = global i32 0
@.str.1 = [4 x i8] c"GNU\00"
@.str.2 = [5 x i8] c"GOMP\00"
@.str.3 = [4 x i8] c"1.0\00"
@str = [43 x i8] c"Checking acc_device_host device properties\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([43 x i8], [43 x i8]* @str, i64 0, i64 0))
%2 = load i32, i32* @acc_device_host
%3 = tail call i32 @expect_device_properties(i32 %2, i32 0, i32 0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.3, i64 0, i64 0))
ret i32 0
}
int test_imm_55uint16_reg(unsigned short val) {
  return ((val) & (0x55 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_55uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x55,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_55uint16_reg>:
test   $0x55,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_55uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 85
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_55uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 85
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ clear();
void window_clear() { clear(); }


x86 assembly (clang, -O0):
<window_clear>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <clear@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<window_clear>:
xor    %eax,%eax
jmp    1030 <clear@plt>

LLVM IR (-O0):
define void @window_clear() {
%1 = call i32 (...) @clear()
ret void
}

LLVM IR (-O2):
define void @window_clear() {
%1 = tail call i32 (...) @clear()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(char const *, char *);
int fstype_swap_p(const char *fstype) { return !strcmp(fstype, "swap"); }


x86 assembly (clang, -O0):
<fstype_swap_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fstype_swap_p>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"swap\00"
define i32 @fstype_swap_p(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strcmp(i8* %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
@.str = [5 x i8] c"swap\00"
define i32 @fstype_swap_p(i8* nocapture %0) {
%2 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(5) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
void cleanUpIncPrune() {}


x86 assembly (clang, -O0):
<cleanUpIncPrune>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cleanUpIncPrune>:
ret

LLVM IR (-O0):
define void @cleanUpIncPrune() {
ret void
}

LLVM IR (-O2):
define void @cleanUpIncPrune() {
ret void
}
unsigned xrop3_251_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~S;
  stk2 = T | stk3;
  stk1 = D | stk2;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_251_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_251_1_0>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
shl    $0x8,%esi
not    %eax
or     %eax,%esi
or     $0xff,%esi
and    %esi,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_251_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %6
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %7
%26 = load i32, i32* %10
%27 = or i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %5
%29 = load i32, i32* %9
%30 = or i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = load i32, i32* %6
%33 = xor i32 %32, -1
%34 = and i32 %31, %33
%35 = load i32, i32* %5
%36 = load i32, i32* %6
%37 = and i32 %35, %36
%38 = or i32 %34, %37
ret i32 %38
}

LLVM IR (-O2):
define i32 @xrop3_251_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = shl nuw nsw i32 %5, 8
%7 = xor i32 %4, -1
%8 = or i32 %6, %7
%9 = or i32 %8, 255
%10 = and i32 %9, %7
%11 = or i32 %10, %3
ret i32 %11
}
void agt_tone(int hz, int ms) { return; }


x86 assembly (clang, -O0):
<agt_tone>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<agt_tone>:
ret

LLVM IR (-O0):
define void @agt_tone(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @agt_tone(i32 %0, i32 %1) {
ret void
}
void ASN1_NULL_free(void) {}


x86 assembly (clang, -O0):
<ASN1_NULL_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_NULL_free>:
ret

LLVM IR (-O0):
define void @ASN1_NULL_free() {
ret void
}

LLVM IR (-O2):
define void @ASN1_NULL_free() {
ret void
}
unsigned short int unsignedshortint_ignoring_longint(unsigned short int x,
                                                     long int y) {
  return x;
}


x86 assembly (clang, -O0):
<unsignedshortint_ignoring_longint>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsignedshortint_ignoring_longint>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @unsignedshortint_ignoring_longint(i16 zeroext %0, i64 %1) {
%3 = alloca i16
%4 = alloca i64
store i16 %0, i16* %3
store i64 %1, i64* %4
%5 = load i16, i16* %3
ret i16 %5
}

LLVM IR (-O2):
define zeroext i16 @unsignedshortint_ignoring_longint(i16 returned zeroext %0, i64 %1) {
ret i16 %0
}
/* Variables and functions */
int /*<<< orphan*/ xip_fpo_condcode_flt(int *, float, float);
int xil_fpo_condcode_flt(float a, float b) {
  int res_int;
  xip_fpo_condcode_flt(&res_int, a, b);
  return res_int;
}


x86 assembly (clang, -O0):
<xil_fpo_condcode_flt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
lea    -0xc(%rbp),%rdi
call   1030 <xip_fpo_condcode_flt@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xil_fpo_condcode_flt>:
push   %rax
lea    0x4(%rsp),%rdi
call   1030 <xip_fpo_condcode_flt@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @xil_fpo_condcode_flt(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca i32
store float %0, float* %3
store float %1, float* %4
%6 = load float, float* %3
%7 = load float, float* %4
%8 = call i32 @xip_fpo_condcode_flt(i32* %5, float %6, float %7)
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @xil_fpo_condcode_flt(float %0, float %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @xip_fpo_condcode_flt(i32* %3, float %0, float %1)
%6 = load i32, i32* %3
ret i32 %6
}
/* Variables and functions */
scalar_t__ UINT32_MAX;
double pow(double, long double);
scalar_t__ util_rndGet(int, scalar_t__);
double mangle_ExpDist(void) {
  double rnd = (double)util_rndGet(1, UINT32_MAX) / (double)(UINT32_MAX);
  return pow(rnd, 4.0L);
}


x86 assembly (clang, -O0):
<mangle_ExpDist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x2ec9(%rip),%rax
mov    (%rax),%rsi
mov    $0x1,%edi
call   1030 <util_rndGet@plt>
cvtsi2sd %rax,%xmm0
mov    0x2eb0(%rip),%rax
cvtsi2sdq (%rax),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    %rsp,%rax
flds   0xe9c(%rip)
fstpt  (%rax)
call   1040 <pow@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mangle_ExpDist>:
push   %rbx
sub    $0x10,%rsp
mov    0x2ecc(%rip),%rbx
mov    (%rbx),%rsi
mov    $0x1,%edi
call   1030 <util_rndGet@plt>
cvtsi2sd %rax,%xmm0
cvtsi2sdq (%rbx),%xmm1
divsd  %xmm1,%xmm0
flds   0xeb3(%rip)
fstpt  (%rsp)
call   1040 <pow@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@UINT32_MAX = global i64 0
define double @mangle_ExpDist() {
%1 = alloca double
%2 = load i64, i64* @UINT32_MAX
%3 = call i64 @util_rndGet(i32 1, i64 %2)
%4 = sitofp i64 %3 to double
%5 = load i64, i64* @UINT32_MAX
%6 = sitofp i64 %5 to double
%7 = fdiv double %4, %6
store double %7, double* %1
%8 = load double, double* %1
%9 = call double @pow(double %8, x86_fp80 0xK40018000000000000000)
ret double %9
}

LLVM IR (-O2):
@UINT32_MAX = global i64 0
define double @mangle_ExpDist() {
%1 = load i64, i64* @UINT32_MAX
%2 = tail call i64 @util_rndGet(i32 1, i64 %1)
%3 = sitofp i64 %2 to double
%4 = load i64, i64* @UINT32_MAX
%5 = sitofp i64 %4 to double
%6 = fdiv double %3, %5
%7 = tail call double @pow(double %6, x86_fp80 0xK40018000000000000000)
ret double %7
}
unsigned long hshstrhash(const char *string) {
  unsigned long h;
  h = 0;
  while (*string) {
    h = h * 31UL + (unsigned char)*string++;
  }
  return h;
}


x86 assembly (clang, -O0):
<hshstrhash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1140 <hshstrhash+0x40>
imul   $0x1f,-0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movzbl (%rcx),%ecx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <hshstrhash+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hshstrhash>:
mov    (%rdi),%cl
test   %cl,%cl
je     112c <hshstrhash+0x2c>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
mov    %rax,%rdx
shl    $0x5,%rdx
sub    %rax,%rdx
movzbl %cl,%eax
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hshstrhash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @hshstrhash(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %16
8: ; preds = %4
%9 = load i64, i64* %3
%10 = mul i64 %9, 31
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
%13 = load i8, i8* %11
%14 = zext i8 %13 to i64
%15 = add i64 %10, %14
store i64 %15, i64* %3
br label %4
16: ; preds = %4
%17 = load i64, i64* %3
ret i64 %17
}

LLVM IR (-O2):
define i64 @hshstrhash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i64 [ %11, %4 ], [ 0, %1 ]
%7 = phi i8* [ %9, %4 ], [ %0, %1 ]
%8 = mul i64 %6, 31
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = zext i8 %5 to i64
%11 = add i64 %8, %10
%12 = load i8, i8* %9
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ 0, %1 ], [ %11, %4 ]
ret i64 %15
}
int add(float a, float b) { return a + b; }


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
addss  -0x8(%rbp),%xmm0
cvttss2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
addss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @add(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fadd float %5, %6
%8 = fptosi float %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @add(float %0, float %1) {
%3 = fadd float %0, %1
%4 = fptosi float %3 to i32
ret i32 %4
}
/* Variables and functions */
int is_water(int, int);
int is_obstructed(int x, int y) { return is_water(x, y); }


x86 assembly (clang, -O0):
<is_obstructed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <is_water@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_obstructed>:
jmp    1030 <is_water@plt>

LLVM IR (-O0):
define i32 @is_obstructed(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @is_water(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @is_obstructed(i32 %0, i32 %1) {
%3 = tail call i32 @is_water(i32 %0, i32 %1)
ret i32 %3
}
void print_all_arrays(array_i, array_c, array_f, array_d) int array_i[];
char array_c[];
float array_f[];
double array_d[];
{
  print_int_array(array_i);
  print_char_array(array_c);
  print_float_array(array_f);
  print_double_array(array_d);
}


x86 assembly (clang, -O0):
<print_all_arrays>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1060 <print_int_array@plt>
mov    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1050 <print_char_array@plt>
mov    -0x18(%rbp),%rdi
mov    $0x0,%al
call   1030 <print_float_array@plt>
mov    -0x20(%rbp),%rdi
mov    $0x0,%al
call   1040 <print_double_array@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_all_arrays>:
push   %r15
push   %r14
push   %rbx
mov    %rcx,%r14
mov    %rdx,%r15
mov    %rsi,%rbx
xor    %eax,%eax
call   1060 <print_int_array@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1050 <print_char_array@plt>
mov    %r15,%rdi
xor    %eax,%eax
call   1030 <print_float_array@plt>
mov    %r14,%rdi
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <print_double_array@plt>

LLVM IR (-O0):
define void @print_all_arrays(i32* %0, i8* %1, float* %2, double* %3) {
%5 = alloca i32*
%6 = alloca i8*
%7 = alloca float*
%8 = alloca double*
store i32* %0, i32** %5
store i8* %1, i8** %6
store float* %2, float** %7
store double* %3, double** %8
%9 = load i32*, i32** %5
%10 = call i32 (i32*, ...) bitcast (i32 (...)* @print_int_array to i32 (i32*, ...)*)(i32* %9)
%11 = load i8*, i8** %6
%12 = call i32 (i8*, ...) bitcast (i32 (...)* @print_char_array to i32 (i8*, ...)*)(i8* %11)
%13 = load float*, float** %7
%14 = call i32 (float*, ...) bitcast (i32 (...)* @print_float_array to i32 (float*, ...)*)(float* %13)
%15 = load double*, double** %8
%16 = call i32 (double*, ...) bitcast (i32 (...)* @print_double_array to i32 (double*, ...)*)(double* %15)
ret void
}

LLVM IR (-O2):
define void @print_all_arrays(i32* %0, i8* %1, float* %2, double* %3) {
%5 = tail call i32 (i32*, ...) bitcast (i32 (...)* @print_int_array to i32 (i32*, ...)*)(i32* %0)
%6 = tail call i32 (i8*, ...) bitcast (i32 (...)* @print_char_array to i32 (i8*, ...)*)(i8* %1)
%7 = tail call i32 (float*, ...) bitcast (i32 (...)* @print_float_array to i32 (float*, ...)*)(float* %2)
%8 = tail call i32 (double*, ...) bitcast (i32 (...)* @print_double_array to i32 (double*, ...)*)(double* %3)
ret void
}
int hex2dec(char c) {
  if (c >= '0' && c <= '9') {
    return c - '0';
  } else {
    return c - 'a' + 10;
  }
}


x86 assembly (clang, -O0):
<hex2dec>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1133 <hex2dec+0x33>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jg     1133 <hex2dec+0x33>
movsbl -0x5(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    1140 <hex2dec+0x40>
movsbl -0x5(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hex2dec>:
lea    -0x30(%rdi),%ecx
lea    -0x57(%rdi),%edx
lea    -0x30(%rdi),%eax
cmp    $0xa,%cl
cmovae %edx,%eax
ret

LLVM IR (-O0):
define i32 @hex2dec(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %15
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %13, 48
store i32 %14, i32* %2
br label %20
15: ; preds = %7, %1
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = sub nsw i32 %17, 97
%19 = add nsw i32 %18, 10
store i32 %19, i32* %2
br label %20
20: ; preds = %15, %11
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @hex2dec(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add i8 %0, -48
%4 = icmp ult i8 %3, 10
%5 = select i1 %4, i32 -48, i32 -87
%6 = add nsw i32 %5, %2
ret i32 %6
}
void __attribute__((
    warning("curl_easy_setopt expects a CURLSH* argument for this option")))
__attribute__((unused)) __attribute__((no)) _curl_easy_setopt_err_CURLSH(void) {
  __asm__("");
}


x86 assembly (clang, -O0):
<_curl_easy_setopt_err_CURLSH>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_curl_easy_setopt_err_CURLSH>:
ret

LLVM IR (-O0):
define void @_curl_easy_setopt_err_CURLSH() {
ret void
}

LLVM IR (-O2):
define void @_curl_easy_setopt_err_CURLSH() {
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
void initialisation_uart() {}


x86 assembly (clang, -O0):
<initialisation_uart>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialisation_uart>:
ret

LLVM IR (-O0):
define void @initialisation_uart() {
ret void
}

LLVM IR (-O2):
define void @initialisation_uart() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, unsigned int);
void sprint_byte(char *s, unsigned int v) { sprintf(s, "%02x", (v & 0377)); }


x86 assembly (clang, -O0):
<sprint_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
and    $0xff,%edx
lea    0xecd(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sprint_byte>:
movzbl %sil,%edx
lea    0xee5(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%02x\00"
define void @sprint_byte(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = and i32 %6, 255
%8 = call i32 @sprintf(i8* %5, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%02x\00"
define void @sprint_byte(i8* nocapture writeonly %0, i32 %1) {
%3 = and i32 %1, 255
%4 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}
/* Type definitions */
struct node_description {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ dst_filter1_reset(struct node_description *);
void dst_rcfilterN_reset(struct node_description *node) {
  dst_filter1_reset(node);
}


x86 assembly (clang, -O0):
<dst_rcfilterN_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dst_filter1_reset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dst_rcfilterN_reset>:
jmp    1030 <dst_filter1_reset@plt>

LLVM IR (-O0):
%struct.node_description = type { i32 }
define void @dst_rcfilterN_reset(%struct.node_description* %0) {
%2 = alloca %struct.node_description*
store %struct.node_description* %0, %struct.node_description** %2
%3 = load %struct.node_description*, %struct.node_description** %2
%4 = call i32 @dst_filter1_reset(%struct.node_description* %3)
ret void
}

LLVM IR (-O2):
%struct.node_description = type { i32 }
define void @dst_rcfilterN_reset(%struct.node_description* %0) {
%2 = tail call i32 @dst_filter1_reset(%struct.node_description* %0)
ret void
}
void f3(int i) {}


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
ret

LLVM IR (-O0):
define void @f3(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @f3(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isxdigit(int);
void t_isxdigit_0x37() {
  Assert_real((isxdigit(55)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              280, ("isxdigit should be 1 for 7"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0x37>:
push   %rbp
mov    %rsp,%rbp
mov    $0x37,%edi
call   1030 <isxdigit@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x118,%edx
lea    0xf66(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0x37>:
push   %rax
mov    $0x37,%edi
call   1030 <isxdigit@plt>
lea    0xece(%rip),%rsi
lea    0xf70(%rip),%rcx
mov    %eax,%edi
mov    $0x118,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [27 x i8] c"isxdigit should be 1 for 7\00"
define void @t_isxdigit_0x37() {
%1 = call i32 @isxdigit(i32 55)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 280, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [27 x i8] c"isxdigit should be 1 for 7\00"
define void @t_isxdigit_0x37() {
%1 = tail call i32 @isxdigit(i32 55)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 280, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int compare1(char *, char *);
int /*<<< orphan*/ printf(char *, int);
int main() {
  char *str1 = "hello123", *str2 = "hello123";
  printf("%d\n", compare1(str1, str2));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    0xebf(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <compare1@plt>
mov    %eax,%esi
lea    0xeae(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
mov    %rdi,%rsi
call   1030 <compare1@plt>
lea    0xed2(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"hello123\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8** %2
store i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8** %3
%4 = load i8*, i8** %2
%5 = load i8*, i8** %3
%6 = call i32 @compare1(i8* %4, i8* %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"hello123\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @compare1(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ _m_empty();
void M_EMPTY(void) { _m_empty(); }


x86 assembly (clang, -O0):
<M_EMPTY>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_m_empty@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<M_EMPTY>:
xor    %eax,%eax
jmp    1030 <_m_empty@plt>

LLVM IR (-O0):
define void @M_EMPTY() {
%1 = call i32 (...) @_m_empty()
ret void
}

LLVM IR (-O2):
define void @M_EMPTY() {
%1 = tail call i32 (...) @_m_empty()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ s_blit_test();
int /*<<< orphan*/ s_concat_test();
int /*<<< orphan*/ s_last_index_test();
int /*<<< orphan*/ s_range_test();
int /*<<< orphan*/ s_replace_all_test();
int /*<<< orphan*/ s_replace_test();
int /*<<< orphan*/ s_sub_test();
int /*<<< orphan*/ s_trim_test();
void s_test_all(void) {
  s_range_test();
  s_sub_test();
  s_blit_test();
  s_concat_test();
  s_last_index_test();
  s_trim_test();
  s_replace_test();
  s_replace_all_test();
}


x86 assembly (clang, -O0):
<s_test_all>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1080 <s_range_test@plt>
mov    $0x0,%al
call   10a0 <s_sub_test@plt>
mov    $0x0,%al
call   1030 <s_blit_test@plt>
mov    $0x0,%al
call   1050 <s_concat_test@plt>
mov    $0x0,%al
call   1070 <s_last_index_test@plt>
mov    $0x0,%al
call   1040 <s_trim_test@plt>
mov    $0x0,%al
call   1060 <s_replace_test@plt>
mov    $0x0,%al
call   1090 <s_replace_all_test@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_test_all>:
push   %rax
xor    %eax,%eax
call   1080 <s_range_test@plt>
xor    %eax,%eax
call   10a0 <s_sub_test@plt>
xor    %eax,%eax
call   1030 <s_blit_test@plt>
xor    %eax,%eax
call   1050 <s_concat_test@plt>
xor    %eax,%eax
call   1070 <s_last_index_test@plt>
xor    %eax,%eax
call   1040 <s_trim_test@plt>
xor    %eax,%eax
call   1060 <s_replace_test@plt>
xor    %eax,%eax
pop    %rcx
jmp    1090 <s_replace_all_test@plt>

LLVM IR (-O0):
define void @s_test_all() {
%1 = call i32 (...) @s_range_test()
%2 = call i32 (...) @s_sub_test()
%3 = call i32 (...) @s_blit_test()
%4 = call i32 (...) @s_concat_test()
%5 = call i32 (...) @s_last_index_test()
%6 = call i32 (...) @s_trim_test()
%7 = call i32 (...) @s_replace_test()
%8 = call i32 (...) @s_replace_all_test()
ret void
}

LLVM IR (-O2):
define void @s_test_all() {
%1 = tail call i32 (...) @s_range_test()
%2 = tail call i32 (...) @s_sub_test()
%3 = tail call i32 (...) @s_blit_test()
%4 = tail call i32 (...) @s_concat_test()
%5 = tail call i32 (...) @s_last_index_test()
%6 = tail call i32 (...) @s_trim_test()
%7 = tail call i32 (...) @s_replace_test()
%8 = tail call i32 (...) @s_replace_all_test()
ret void
}
int _papi_hwd_init() {}


x86 assembly (clang, -O0):
<_papi_hwd_init>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_papi_hwd_init>:
ret

LLVM IR (-O0):
define i32 @_papi_hwd_init() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @_papi_hwd_init() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ disp_set_pixel(int, int, int);
void font_put_pixel(int x, int y, int c) { disp_set_pixel(x, y, c); }


x86 assembly (clang, -O0):
<font_put_pixel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <disp_set_pixel@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<font_put_pixel>:
jmp    1030 <disp_set_pixel@plt>

LLVM IR (-O0):
define void @font_put_pixel(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @disp_set_pixel(i32 %7, i32 %8, i32 %9)
ret void
}

LLVM IR (-O2):
define void @font_put_pixel(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @disp_set_pixel(i32 %0, i32 %1, i32 %2)
ret void
}
void scard_deinit(struct scard_data *scard) {}


x86 assembly (clang, -O0):
<scard_deinit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<scard_deinit>:
ret

LLVM IR (-O0):
%struct.scard_data = type opaque
define void @scard_deinit(%struct.scard_data* %0) {
%2 = alloca %struct.scard_data*
store %struct.scard_data* %0, %struct.scard_data** %2
ret void
}

LLVM IR (-O2):
%struct.scard_data = type opaque
define void @scard_deinit(%struct.scard_data* nocapture %0) {
ret void
}