double gsw_specvol_sso_0_p(double p) {
  double v01 = 9.998420897506056e+2, v05 = -6.698001071123802e0,
         v08 = -3.988822378968490e-2, v12 = -2.233269627352527e-2,
         v15 = -1.806789763745328e-4, v17 = -3.087032500374211e-7,
         v20 = 1.550932729220080e-10, v21 = 1.0e0, v26 = -7.521448093615448e-3,
         v31 = -3.303308871386421e-5, v36 = 5.419326551148740e-6,
         v37 = -2.742185394906099e-5, v41 = -1.105097577149576e-7,
         v43 = -1.119011592875110e-10, v47 = -1.200507748551599e-15;
  double sso, sqrtsso, return_value;
  sso = 35.16504;
  sqrtsso = 5.930011804372737;
  return_value = (v21 + sso * (v26 + v36 * sso + v31 * sqrtsso) +
                  p * (v37 + v41 * sso + p * (v43 + v47 * p))) /
                 (v01 + sso * (v05 + v08 * sqrtsso) +
                  p * (v12 + v15 * sso + p * (v17 + v20 * sso)));
  return (return_value);
}


x86 assembly (clang, -O0):
<gsw_specvol_sso_0_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x18,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xf6b(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xf56(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xf41(%rip),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  0xf2c(%rip),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  0xf17(%rip),%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  0xf02(%rip),%xmm0
movsd  %xmm0,-0x38(%rbp)
movsd  0xeed(%rip),%xmm0
movsd  %xmm0,-0x40(%rbp)
movsd  0xed8(%rip),%xmm0
movsd  %xmm0,-0x48(%rbp)
movsd  0xec3(%rip),%xmm0
movsd  %xmm0,-0x50(%rbp)
movsd  0xeae(%rip),%xmm0
movsd  %xmm0,-0x58(%rbp)
movsd  0xe99(%rip),%xmm0
movsd  %xmm0,-0x60(%rbp)
movsd  0xe84(%rip),%xmm0
movsd  %xmm0,-0x68(%rbp)
movsd  0xe6f(%rip),%xmm0
movsd  %xmm0,-0x70(%rbp)
movsd  0xe5a(%rip),%xmm0
movsd  %xmm0,-0x78(%rbp)
movsd  0xe45(%rip),%xmm0
movsd  %xmm0,-0x80(%rbp)
movsd  0xe30(%rip),%xmm0
movsd  %xmm0,-0x88(%rbp)
ff
movsd  0xe18(%rip),%xmm0
movsd  %xmm0,-0x90(%rbp)
ff
movsd  -0x48(%rbp),%xmm0
movsd  -0x88(%rbp),%xmm1
ff
movsd  -0x50(%rbp),%xmm2
movsd  -0x60(%rbp),%xmm3
movsd  -0x88(%rbp),%xmm4
ff
mulsd  %xmm4,%xmm3
addsd  %xmm2,%xmm3
movsd  -0x58(%rbp),%xmm2
movsd  -0x90(%rbp),%xmm4
ff
mulsd  %xmm4,%xmm2
addsd  %xmm3,%xmm2
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
movsd  -0x8(%rbp),%xmm0
movsd  -0x68(%rbp),%xmm2
movsd  -0x70(%rbp),%xmm3
movsd  -0x88(%rbp),%xmm4
ff
mulsd  %xmm4,%xmm3
addsd  %xmm2,%xmm3
movsd  -0x8(%rbp),%xmm2
movsd  -0x78(%rbp),%xmm5
movsd  -0x80(%rbp),%xmm4
movsd  -0x8(%rbp),%xmm6
mulsd  %xmm6,%xmm4
addsd  %xmm5,%xmm4
mulsd  %xmm4,%xmm2
addsd  %xmm3,%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x88(%rbp),%xmm2
ff
movsd  -0x18(%rbp),%xmm4
movsd  -0x20(%rbp),%xmm3
movsd  -0x90(%rbp),%xmm5
ff
mulsd  %xmm5,%xmm3
addsd  %xmm4,%xmm3
mulsd  %xmm3,%xmm2
addsd  %xmm1,%xmm2
movsd  -0x8(%rbp),%xmm1
movsd  -0x28(%rbp),%xmm3
movsd  -0x30(%rbp),%xmm4
movsd  -0x88(%rbp),%xmm5
ff
mulsd  %xmm5,%xmm4
addsd  %xmm3,%xmm4
movsd  -0x8(%rbp),%xmm3
movsd  -0x38(%rbp),%xmm6
movsd  -0x40(%rbp),%xmm5
movsd  -0x88(%rbp),%xmm7
ff
mulsd  %xmm7,%xmm5
addsd  %xmm6,%xmm5
mulsd  %xmm5,%xmm3
addsd  %xmm4,%xmm3
mulsd  %xmm3,%xmm1
addsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x98(%rbp)
ff
movsd  -0x98(%rbp),%xmm0
ff
add    $0x18,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gsw_specvol_sso_0_p>:
movsd  0xef8(%rip),%xmm1
mulsd  %xmm0,%xmm1
addsd  0xef4(%rip),%xmm1
unpcklpd %xmm0,%xmm0
shufpd $0x2,0xeef(%rip),%xmm1
mulpd  %xmm0,%xmm1
addpd  0xef3(%rip),%xmm1
mulpd  %xmm1,%xmm0
addpd  0xef7(%rip),%xmm0
movapd %xmm0,%xmm1
unpckhpd %xmm0,%xmm1
divsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @gsw_specvol_sso_0_p(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
%9 = alloca double
%10 = alloca double
%11 = alloca double
%12 = alloca double
%13 = alloca double
%14 = alloca double
%15 = alloca double
%16 = alloca double
%17 = alloca double
%18 = alloca double
%19 = alloca double
%20 = alloca double
store double %0, double* %2
store double 0x408F3EBC998D192F, double* %3
store double 0xC01ACAC0CAF432E4, double* %4
store double 0xBFA46C3AB1582DFC, double* %5
store double 0xBF96DE61E08152B8, double* %6
store double 0xBF27AE9496D640EA, double* %7
store double 0xBE94B77B40758AB4, double* %8
store double 0x3DE550DC0324AE3D, double* %9
store double 1.000000e+00, double* %10
store double 0xBF7ECECF594A4D0F, double* %11
store double 0xBF0151A0492353E4, double* %12
store double 0x3ED6BAF523B168F6, double* %13
store double 0xBEFCC0FF745ACC9B, double* %14
store double 0xBE7DAA2C37AA778F, double* %15
store double 0xBDDEC25813BB665A, double* %16
store double 0xBCD5A05D6377C5EB, double* %17
store double 0x4041952007DD4413, double* %18
store double 0x4017B85503B2B30D, double* %19
%21 = load double, double* %10
%22 = load double, double* %18
%23 = load double, double* %11
%24 = load double, double* %13
%25 = load double, double* %18
%26 = call double @llvm.fmuladd.f64(double %24, double %25, double %23)
%27 = load double, double* %12
%28 = load double, double* %19
%29 = call double @llvm.fmuladd.f64(double %27, double %28, double %26)
%30 = call double @llvm.fmuladd.f64(double %22, double %29, double %21)
%31 = load double, double* %2
%32 = load double, double* %14
%33 = load double, double* %15
%34 = load double, double* %18
%35 = call double @llvm.fmuladd.f64(double %33, double %34, double %32)
%36 = load double, double* %2
%37 = load double, double* %16
%38 = load double, double* %17
%39 = load double, double* %2
%40 = call double @llvm.fmuladd.f64(double %38, double %39, double %37)
%41 = call double @llvm.fmuladd.f64(double %36, double %40, double %35)
%42 = call double @llvm.fmuladd.f64(double %31, double %41, double %30)
%43 = load double, double* %3
%44 = load double, double* %18
%45 = load double, double* %4
%46 = load double, double* %5
%47 = load double, double* %19
%48 = call double @llvm.fmuladd.f64(double %46, double %47, double %45)
%49 = call double @llvm.fmuladd.f64(double %44, double %48, double %43)
%50 = load double, double* %2
%51 = load double, double* %6
%52 = load double, double* %7
%53 = load double, double* %18
%54 = call double @llvm.fmuladd.f64(double %52, double %53, double %51)
%55 = load double, double* %2
%56 = load double, double* %8
%57 = load double, double* %9
%58 = load double, double* %18
%59 = call double @llvm.fmuladd.f64(double %57, double %58, double %56)
%60 = call double @llvm.fmuladd.f64(double %55, double %59, double %54)
%61 = call double @llvm.fmuladd.f64(double %50, double %60, double %49)
%62 = fdiv double %42, %61
store double %62, double* %20
%63 = load double, double* %20
ret double %63
}

LLVM IR (-O2):
define double @gsw_specvol_sso_0_p(double %0) {
%2 = tail call double @llvm.fmuladd.f64(double %0, double 0xBCD5A05D6377C5EB, double 0xBDDEC25813BB665A)
%3 = insertelement <2 x double> poison, double %0, i64 0
%4 = shufflevector <2 x double> %3, <2 x double> poison, <2 x i32> zeroinitializer
%5 = insertelement <2 x double> <double poison, double 0xBE9459C8EAB3F101>, double %2, i64 0
%6 = call <2 x double> @llvm.fmuladd.v2f64(<2 x double> %4, <2 x double> %5, <2 x double> <double 0xBF006A146BCAF06C, double 0xBF9D5FEFA4B4AA7B>)
%7 = call <2 x double> @llvm.fmuladd.v2f64(<2 x double> %4, <2 x double> %6, <2 x double> <double 0x3FE787C00173ED2D, double 0x40879FE8FA4D96C1>)
%8 = extractelement <2 x double> %7, i64 0
%9 = extractelement <2 x double> %7, i64 1
%10 = fdiv double %8, %9
ret double %10
}