xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void LCDIDDDMADisable(uint32_t ui32Base) {
  ;
  (*((volatile uint32_t *)(ui32Base + 0x0000000C))) &= ~0x00000100;
}


x86 assembly (clang, -O0):
<LCDIDDDMADisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xc,%eax
cltq
mov    (%rax),%ecx
and    $0xfffffeff,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCDIDDDMADisable>:
movslq %edi,%rax
andl   $0xfffffeff,0xc(%rax)
ret

LLVM IR (-O0):
define void @LCDIDDDMADisable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 12
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, -257
store volatile i32 %8, i32* %6
ret void
}

LLVM IR (-O2):
define void @LCDIDDDMADisable(i32 %0) {
%2 = add nsw i32 %0, 12
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = and i32 %5, -257
store volatile i32 %6, i32* %4
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __u32;

/* Variables and functions */
int /*<<< orphan*/ SPI_IOC_WR_MAX_SPEED_HZ;
int ioctl(int, int /*<<< orphan*/, int /*<<< orphan*/ *);
int spi_set_max_speed_hz(int fd, __u32 speed) {
  return ioctl(fd, SPI_IOC_WR_MAX_SPEED_HZ, &speed);
}


x86 assembly (clang, -O0):
<spi_set_max_speed_hz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
lea    -0x8(%rbp),%rdx
call   1030 <ioctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_set_max_speed_hz>:
push   %rax
mov    %esi,0x4(%rsp)
mov    0x2ec4(%rip),%rax
mov    (%rax),%esi
lea    0x4(%rsp),%rdx
call   1030 <ioctl@plt>
pop    %rcx
ret

LLVM IR (-O0):
@SPI_IOC_WR_MAX_SPEED_HZ = global i32 0
define i32 @spi_set_max_speed_hz(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* @SPI_IOC_WR_MAX_SPEED_HZ
%7 = call i32 @ioctl(i32 %5, i32 %6, i32* %4)
ret i32 %7
}

LLVM IR (-O2):
@SPI_IOC_WR_MAX_SPEED_HZ = global i32 0
define i32 @spi_set_max_speed_hz(i32 %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = load i32, i32* @SPI_IOC_WR_MAX_SPEED_HZ
%5 = call i32 @ioctl(i32 %0, i32 %4, i32* %3)
ret i32 %5
}
int ti_psar_start(double const *options) {
  (void)options;
  return 1;
}


x86 assembly (clang, -O0):
<ti_psar_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ti_psar_start>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ti_psar_start(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @ti_psar_start(double* nocapture readnone %0) {
ret i32 1
}
void visws_early_detect(void) {}


x86 assembly (clang, -O0):
<visws_early_detect>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<visws_early_detect>:
ret

LLVM IR (-O0):
define void @visws_early_detect() {
ret void
}

LLVM IR (-O2):
define void @visws_early_detect() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_head(void) {
  printf("---utilization--- -----------main area-------- ---balancing async-- "
         "-gc- ---alloc---\n");
  printf("util  node   data   free  valid  dirty prefree node  dent meta sit   "
         "gc    ssr    lfs\n");
}


x86 assembly (clang, -O0):
<print_head>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf2f(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_head>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf31(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [86 x i8] c"---utilization--- -----------main area-------- ---balancing async-- -gc- ---alloc---\0A\00"
@.str.1 = [87 x i8] c"util node data free valid dirty prefree node dent meta sit gc ssr lfs\0A\00"
define void @print_head() {
%1 = call i32 @printf(i8* getelementptr inbounds ([86 x i8], [86 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([87 x i8], [87 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [85 x i8] c"---utilization--- -----------main area-------- ---balancing async-- -gc- ---alloc---\00"
@str.2 = [86 x i8] c"util node data free valid dirty prefree node dent meta sit gc ssr lfs\00"
define void @print_head() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([85 x i8], [85 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([86 x i8], [86 x i8]* @str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ stdout;
void handler(int signo) {
  printf("signal: %d\n", signo);
  fflush(stdout);
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xebb(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e8f(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
mov    0x2e79(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<handler>:
push   %rax
mov    %edi,%esi
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e9a(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
mov    0x2e84(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"signal: %d\0A\00"
@stdout = global i32 0
@EXIT_SUCCESS = global i32 0
define void @handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* @stdout
%6 = call i32 @fflush(i32 %5)
%7 = load i32, i32* @EXIT_SUCCESS
%8 = call i32 @exit(i32 %7)
unreachable
}

LLVM IR (-O2):
@.str = [12 x i8] c"signal: %d\0A\00"
@stdout = global i32 0
@EXIT_SUCCESS = global i32 0
define void @handler(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = load i32, i32* @stdout
%4 = tail call i32 @fflush(i32 %3)
%5 = load i32, i32* @EXIT_SUCCESS
%6 = tail call i32 @exit(i32 %5)
unreachable
}
int BPQSerialClrDCD(unsigned int hDevice) { return 0; }


x86 assembly (clang, -O0):
<BPQSerialClrDCD>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BPQSerialClrDCD>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @BPQSerialClrDCD(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @BPQSerialClrDCD(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ getRows();
int /*<<< orphan*/ printPattern(int /*<<< orphan*/);
int main() {
  printPattern(getRows());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getRows@plt>
mov    %eax,%edi
call   1030 <printPattern@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <getRows@plt>
mov    %eax,%edi
call   1030 <printPattern@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @getRows()
%3 = call i32 @printPattern(i32 %2)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @getRows()
%2 = tail call i32 @printPattern(i32 %1)
ret i32 0
}
int pr31366(struct { enum { a = 1 } b; } c) { return a; }


x86 assembly (clang, -O0):
<pr31366>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pr31366>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.anon = type { i32 }
define i32 @pr31366(i32 %0) {
%2 = alloca %struct.anon
%3 = getelementptr inbounds %struct.anon, %struct.anon* %2, i32 0, i32 0
store i32 %0, i32* %3
ret i32 1
}

LLVM IR (-O2):
define i32 @pr31366(i32 %0) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void bookNameDeleted(char bookName[]) {
  printf("\nDeleting book with name <%s> from the bookstore inventory.\n",
         bookName);
}


x86 assembly (clang, -O0):
<bookNameDeleted>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bookNameDeleted>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [61 x i8] c"\0ADeleting book with name <%s> from the bookstore inventory.\0A\00"
define void @bookNameDeleted(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [61 x i8] c"\0ADeleting book with name <%s> from the bookstore inventory.\0A\00"
define void @bookNameDeleted(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void initDigitalOutputPins(void) {}


x86 assembly (clang, -O0):
<initDigitalOutputPins>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initDigitalOutputPins>:
ret

LLVM IR (-O0):
define void @initDigitalOutputPins() {
ret void
}

LLVM IR (-O2):
define void @initDigitalOutputPins() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ F_OK;
int access(char *, int /*<<< orphan*/);
char *extendfile(char const *, char const *);
const char *file_name(const char *file, const char *ext) {
  char *temp;
  temp = extendfile(file, ext);
  if (access(temp, F_OK) != -1)
    return (temp);
  else
    return (" ");
}


x86 assembly (clang, -O0):
<file_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <extendfile@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    0x2e8c(%rip),%rax
mov    (%rax),%esi
call   1040 <access@plt>
cmp    $0xffffffff,%eax
je     1169 <file_name+0x49>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1174 <file_name+0x54>
lea    0xe90(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_name>:
push   %rbx
call   1030 <extendfile@plt>
mov    %rax,%rbx
mov    0x2ea8(%rip),%rax
mov    (%rax),%esi
mov    %rbx,%rdi
call   1040 <access@plt>
cmp    $0xffffffff,%eax
lea    0xebc(%rip),%rax
cmovne %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@F_OK = global i32 0
@.str = [2 x i8] c" \00"
define i8* @file_name(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = call i8* @extendfile(i8* %7, i8* %8)
store i8* %9, i8** %6
%10 = load i8*, i8** %6
%11 = load i32, i32* @F_OK
%12 = call i32 @access(i8* %10, i32 %11)
%13 = icmp ne i32 %12, -1
br i1 %13, label %14, label %16
14: ; preds = %2
%15 = load i8*, i8** %6
store i8* %15, i8** %3
br label %17
16: ; preds = %2
store i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8** %3
br label %17
17: ; preds = %16, %14
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
@F_OK = global i32 0
@.str = [2 x i8] c" \00"
define i8* @file_name(i8* %0, i8* %1) {
%3 = tail call i8* @extendfile(i8* %0, i8* %1)
%4 = load i32, i32* @F_OK
%5 = tail call i32 @access(i8* %3, i32 %4)
%6 = icmp eq i32 %5, -1
%7 = select i1 %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* %3
ret i8* %7
}
/* Variables and functions */
int LCM(int, int);
int LCMNums(int *A, int n) {
  if (n == 1)
    return *A;
  return LCM(A[n - 1], LCMNums(A, n - 1));
}


x86 assembly (clang, -O0):
<LCMNums>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x1,-0x14(%rbp)
jne    1147 <LCMNums+0x27>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    1176 <LCMNums+0x56>
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
sub    $0x1,%esi
call   1040 <LCMNums@plt>
mov    -0x18(%rbp),%edi
mov    %eax,%esi
call   1030 <LCM@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCMNums>:
push   %rbx
cmp    $0x1,%esi
jne    112a <LCMNums+0xa>
mov    (%rdi),%eax
pop    %rbx
ret
movslq %esi,%rax
add    $0xffffffff,%esi
mov    -0x4(%rdi,%rax,4),%ebx
call   1040 <LCMNums@plt>
mov    %ebx,%edi
mov    %eax,%esi
pop    %rbx
jmp    1030 <LCM@plt>

LLVM IR (-O0):
define i32 @LCMNums(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32*, i32** %4
%10 = load i32, i32* %9
store i32 %10, i32* %3
br label %23
11: ; preds = %2
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = sub nsw i32 %13, 1
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %12, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %5
%20 = sub nsw i32 %19, 1
%21 = call i32 @LCMNums(i32* %18, i32 %20)
%22 = call i32 @LCM(i32 %17, i32 %21)
store i32 %22, i32* %3
br label %23
23: ; preds = %11, %8
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @LCMNums(i32* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 1
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = load i32, i32* %0
br label %6
6: ; preds = %4, %8
%7 = phi i32 [ %14, %8 ], [ %5, %4 ]
ret i32 %7
8: ; preds = %2
%9 = add nsw i32 %1, -1
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %0, i64 %10
%12 = load i32, i32* %11
%13 = tail call i32 @LCMNums(i32* %0, i32 %9)
%14 = tail call i32 @LCM(i32 %12, i32 %13)
br label %6
}
unsigned rgb_shift(unsigned value, int shift) {
  if (shift >= 0)
    return value >> shift;
  else
    return value << -shift;
}


x86 assembly (clang, -O0):
<rgb_shift>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jl     1124 <rgb_shift+0x24>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
shr    %cl,%eax
mov    %eax,-0x4(%rbp)
jmp    1131 <rgb_shift+0x31>
mov    -0x8(%rbp),%eax
xor    %ecx,%ecx
sub    -0xc(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgb_shift>:
mov    %edi,%eax
mov    %esi,%ecx
shr    %cl,%eax
neg    %cl
shl    %cl,%edi
test   %esi,%esi
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @rgb_shift(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp sge i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = lshr i32 %9, %10
store i32 %11, i32* %3
br label %17
12: ; preds = %2
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = sub nsw i32 0, %14
%16 = shl i32 %13, %15
store i32 %16, i32* %3
br label %17
17: ; preds = %12, %8
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @rgb_shift(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, -1
%4 = lshr i32 %0, %1
%5 = sub nsw i32 0, %1
%6 = shl i32 %0, %5
%7 = select i1 %3, i32 %4, i32 %6
ret i32 %7
}
long g(long a, long b) {
  volatile long c;
  c = a + b;
  return c;
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
add    %rsi,%rdi
mov    %rdi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
ret

LLVM IR (-O0):
define i64 @g(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = add nsw i64 %6, %7
store volatile i64 %8, i64* %5
%9 = load volatile i64, i64* %5
ret i64 %9
}

LLVM IR (-O2):
define i64 @g(i64 %0, i64 %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
%5 = add nsw i64 %1, %0
store volatile i64 %5, i64* %3
%6 = load volatile i64, i64* %3
ret i64 %6
}
/* Variables and functions */
int /*<<< orphan*/ MINIZIP_UNUSED_ARG(unsigned long const *);
int decrypt_byte(unsigned long *pkeys, const unsigned long *pcrc_32_tab) {
  unsigned temp;
  MINIZIP_UNUSED_ARG(pcrc_32_tab);
  temp = ((unsigned)(*(pkeys + 2)) & 0xffff) | 2;
  return (int)(((temp * (temp ^ 1)) >> 8) & 0xff);
}


x86 assembly (clang, -O0):
<decrypt_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <MINIZIP_UNUSED_ARG@plt>
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%rax
and    $0xffff,%eax
or     $0x2,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x14(%rbp),%ecx
xor    $0x1,%ecx
imul   %ecx,%eax
shr    $0x8,%eax
and    $0xff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<decrypt_byte>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <MINIZIP_UNUSED_ARG@plt>
mov    $0xfffd,%eax
and    0x10(%rbx),%eax
lea    0x2(%rax),%ecx
xor    $0x3,%eax
imul   %ecx,%eax
movzbl %ah,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @decrypt_byte(i64* %0, i64* %1) {
%3 = alloca i64*
%4 = alloca i64*
%5 = alloca i32
store i64* %0, i64** %3
store i64* %1, i64** %4
%6 = load i64*, i64** %4
%7 = call i32 @MINIZIP_UNUSED_ARG(i64* %6)
%8 = load i64*, i64** %3
%9 = getelementptr inbounds i64, i64* %8, i64 2
%10 = load i64, i64* %9
%11 = trunc i64 %10 to i32
%12 = and i32 %11, 65535
%13 = or i32 %12, 2
store i32 %13, i32* %5
%14 = load i32, i32* %5
%15 = load i32, i32* %5
%16 = xor i32 %15, 1
%17 = mul i32 %14, %16
%18 = lshr i32 %17, 8
%19 = and i32 %18, 255
ret i32 %19
}

LLVM IR (-O2):
define i32 @decrypt_byte(i64* nocapture %0, i64* %1) {
%3 = tail call i32 @MINIZIP_UNUSED_ARG(i64* %1)
%4 = getelementptr inbounds i64, i64* %0, i64 2
%5 = load i64, i64* %4
%6 = trunc i64 %5 to i32
%7 = and i32 %6, 65533
%8 = or i32 %7, 2
%9 = xor i32 %7, 3
%10 = mul nuw i32 %8, %9
%11 = lshr i32 %10, 8
%12 = and i32 %11, 255
ret i32 %12
}
void autonomous10() {}


x86 assembly (clang, -O0):
<autonomous10>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<autonomous10>:
ret

LLVM IR (-O0):
define void @autonomous10() {
ret void
}

LLVM IR (-O2):
define void @autonomous10() {
ret void
}
int ret2(int a0, int a1, int a2, int a3, int a4, int a5) { return a2; }


x86 assembly (clang, -O0):
<ret2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ret2>:
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @ret2(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = load i32, i32* %9
ret i32 %13
}

LLVM IR (-O2):
define i32 @ret2(i32 %0, i32 %1, i32 returned %2, i32 %3, i32 %4, i32 %5) {
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_eval(int);
int /*<<< orphan*/ free(char *);
scalar_t__ malloc(int);
int /*<<< orphan*/ memset(char *, char, int);
scalar_t__ strlen(char *);
void memset4_char_malloc_null() {
  char *str = (char *)malloc(10 * sizeof(char));
  memset(str, '\0', 10);
  clang_analyzer_eval(str[1] == 0);
  clang_analyzer_eval(strlen(str) == 0);
  free(str);
}


x86 assembly (clang, -O0):
<memset4_char_malloc_null>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xa,%edi
call   1060 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0xa,%edx
call   1050 <memset@plt>
mov    -0x8(%rbp),%rax
movsbl 0x1(%rax),%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1070 <clang_analyzer_eval@plt>
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1070 <clang_analyzer_eval@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memset4_char_malloc_null>:
push   %rbx
mov    $0xa,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %esi,%esi
mov    $0xa,%edx
call   1040 <memset@plt>
xor    %edi,%edi
cmpb   $0x0,0x1(%rbx)
sete   %dil
call   1060 <clang_analyzer_eval@plt>
xor    %edi,%edi
cmpb   $0x0,(%rbx)
sete   %dil
call   1060 <clang_analyzer_eval@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @memset4_char_malloc_null() {
%1 = alloca i8*
%2 = call i64 @malloc(i32 10)
%3 = inttoptr i64 %2 to i8*
store i8* %3, i8** %1
%4 = load i8*, i8** %1
%5 = call i32 @memset(i8* %4, i8 signext 0, i32 10)
%6 = load i8*, i8** %1
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 0
%11 = zext i1 %10 to i32
%12 = call i32 @clang_analyzer_eval(i32 %11)
%13 = load i8*, i8** %1
%14 = call i64 @strlen(i8* %13)
%15 = icmp eq i64 %14, 0
%16 = zext i1 %15 to i32
%17 = call i32 @clang_analyzer_eval(i32 %16)
%18 = load i8*, i8** %1
%19 = call i32 @free(i8* %18)
ret void
}

LLVM IR (-O2):
define void @memset4_char_malloc_null() {
%1 = tail call i64 @malloc(i32 10)
%2 = inttoptr i64 %1 to i8*
%3 = tail call i32 @memset(i8* %2, i8 signext 0, i32 10)
%4 = getelementptr inbounds i8, i8* %2, i64 1
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = zext i1 %6 to i32
%8 = tail call i32 @clang_analyzer_eval(i32 %7)
%9 = load i8, i8* %2
%10 = icmp eq i8 %9, 0
%11 = zext i1 %10 to i32
%12 = tail call i32 @clang_analyzer_eval(i32 %11)
%13 = tail call i32 @free(i8* %2)
ret void
}
int execute_sched_setscheduler() { return 0; }


x86 assembly (clang, -O0):
<execute_sched_setscheduler>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_sched_setscheduler>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_sched_setscheduler() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_sched_setscheduler() {
ret i32 0
}
int my_gcd(int p, int q) {
  int temp;
  if (p < q) {
    temp = p;
    p = q;
    q = temp;
  }
  p -= q;
  if (p == 0)
    return q;
  else
    return my_gcd(p, q);
}


x86 assembly (clang, -O0):
<my_gcd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    113c <my_gcd+0x2c>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    115c <my_gcd+0x4c>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    116a <my_gcd+0x5a>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <my_gcd@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_gcd>:
mov    %esi,%eax
mov    %edi,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
cmp    %eax,%edi
cmovl  %eax,%ecx
cmovl  %edi,%eax
sub    %eax,%ecx
mov    %ecx,%edi
jne    1110 <my_gcd+0x10>
ret

LLVM IR (-O0):
define i32 @my_gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = load i32, i32* %4
store i32 %11, i32* %6
%12 = load i32, i32* %5
store i32 %12, i32* %4
%13 = load i32, i32* %6
store i32 %13, i32* %5
br label %14
14: ; preds = %10, %2
%15 = load i32, i32* %5
%16 = load i32, i32* %4
%17 = sub nsw i32 %16, %15
store i32 %17, i32* %4
%18 = load i32, i32* %4
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %22
20: ; preds = %14
%21 = load i32, i32* %5
store i32 %21, i32* %3
br label %26
22: ; preds = %14
%23 = load i32, i32* %4
%24 = load i32, i32* %5
%25 = call i32 @my_gcd(i32 %23, i32 %24)
store i32 %25, i32* %3
br label %26
26: ; preds = %22, %20
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @my_gcd(i32 %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ %0, %2 ], [ %9, %3 ]
%5 = phi i32 [ %1, %2 ], [ %8, %3 ]
%6 = icmp slt i32 %4, %5
%7 = select i1 %6, i32 %5, i32 %4
%8 = select i1 %6, i32 %4, i32 %5
%9 = sub nsw i32 %7, %8
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %3
11: ; preds = %3
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ endwin();
int /*<<< orphan*/ exit(int);
void quit(int ret_code) {
  endwin();
  exit(ret_code);
}


x86 assembly (clang, -O0):
<quit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <endwin@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<quit>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <endwin@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @quit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @endwin()
%4 = load i32, i32* %2
%5 = call i32 @exit(i32 %4)
unreachable
}

LLVM IR (-O2):
define void @quit(i32 %0) {
%2 = tail call i32 (...) @endwin()
%3 = tail call i32 @exit(i32 %0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ time_dec_cbc_fantomas_sse();
int /*<<< orphan*/ time_enc_cbc_fantomas_sse();
int /*<<< orphan*/ time_enc_dec_ctr_fantomas_sse();
int /*<<< orphan*/ time_enc_dec_fantomas16CTR_sse();
int main() {
  time_enc_cbc_fantomas_sse();
  time_dec_cbc_fantomas_sse();
  time_enc_dec_ctr_fantomas_sse();
  time_enc_dec_fantomas16CTR_sse();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <time_enc_cbc_fantomas_sse@plt>
mov    $0x0,%al
call   1040 <time_dec_cbc_fantomas_sse@plt>
mov    $0x0,%al
call   1060 <time_enc_dec_ctr_fantomas_sse@plt>
mov    $0x0,%al
call   1030 <time_enc_dec_fantomas16CTR_sse@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <time_enc_cbc_fantomas_sse@plt>
xor    %eax,%eax
call   1040 <time_dec_cbc_fantomas_sse@plt>
xor    %eax,%eax
call   1060 <time_enc_dec_ctr_fantomas_sse@plt>
xor    %eax,%eax
call   1030 <time_enc_dec_fantomas16CTR_sse@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @time_enc_cbc_fantomas_sse()
%3 = call i32 (...) @time_dec_cbc_fantomas_sse()
%4 = call i32 (...) @time_enc_dec_ctr_fantomas_sse()
%5 = call i32 (...) @time_enc_dec_fantomas16CTR_sse()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @time_enc_cbc_fantomas_sse()
%2 = tail call i32 (...) @time_dec_cbc_fantomas_sse()
%3 = tail call i32 (...) @time_enc_dec_ctr_fantomas_sse()
%4 = tail call i32 (...) @time_enc_dec_fantomas16CTR_sse()
ret i32 0
}
unsigned long fib(unsigned long n) {
  if (n < 2)
    return (1);
  else
    return (fib(n - 2) + fib(n - 1));
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x2,-0x10(%rbp)
jae    1134 <fib+0x24>
movq   $0x1,-0x8(%rbp)
jmp    1160 <fib+0x50>
mov    -0x10(%rbp),%rdi
sub    $0x2,%rdi
call   1030 <fib@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
sub    $0x1,%rdi
call   1030 <fib@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %r14
push   %rbx
push   %rax
mov    $0x1,%r14d
cmp    $0x2,%rdi
jb     114a <fib+0x3a>
mov    %rdi,%rbx
xor    %r14d,%r14d
cs nopw 0x0(%rax,%rax,1)
lea    -0x2(%rbx),%rdi
call   1030 <fib@plt>
add    $0xffffffffffffffff,%rbx
add    %rax,%r14
cmp    $0x1,%rbx
ja     1130 <fib+0x20>
add    $0x1,%r14
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @fib(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp ult i64 %4, 2
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 1, i64* %2
br label %15
7: ; preds = %1
%8 = load i64, i64* %3
%9 = sub i64 %8, 2
%10 = call i64 @fib(i64 %9)
%11 = load i64, i64* %3
%12 = sub i64 %11, 1
%13 = call i64 @fib(i64 %12)
%14 = add i64 %10, %13
store i64 %14, i64* %2
br label %15
15: ; preds = %7, %6
%16 = load i64, i64* %2
ret i64 %16
}

LLVM IR (-O2):
define i64 @fib(i64 %0) {
%2 = icmp ult i64 %0, 2
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %8, %3 ], [ %0, %1 ]
%5 = phi i64 [ %9, %3 ], [ 0, %1 ]
%6 = add i64 %4, -2
%7 = tail call i64 @fib(i64 %6)
%8 = add i64 %4, -1
%9 = add i64 %7, %5
%10 = icmp ult i64 %8, 2
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i64 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i64 [ 1, %1 ], [ %12, %11 ]
ret i64 %14
}
int test_imm_1Cuint16_reg(unsigned short val) {
  return ((val) & (0x1C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Cuint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x1c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Cuint16_reg>:
test   $0x1c,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Cuint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 28
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_1Cuint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 28
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void intPtrPrint(void *it) { printf(" %d", it == NULL ? 0 : *(int *)it); }


x86 assembly (clang, -O0):
<intPtrPrint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1131 <intPtrPrint+0x21>
xor    %eax,%eax
mov    %eax,-0xc(%rbp)
jmp    113a <intPtrPrint+0x2a>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intPtrPrint>:
test   %rdi,%rdi
je     1123 <intPtrPrint+0x13>
mov    (%rdi),%esi
lea    0xee2(%rip),%rdi
jmp    1030 <printf@plt>
xor    %esi,%esi
lea    0xed4(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c" %d\00"
define void @intPtrPrint(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %6
5: ; preds = %1
br label %10
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = bitcast i8* %7 to i32*
%9 = load i32, i32* %8
br label %10
10: ; preds = %6, %5
%11 = phi i32 [ 0, %5 ], [ %9, %6 ]
%12 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %11)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c" %d\00"
define void @intPtrPrint(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = bitcast i8* %0 to i32*
%5 = load i32, i32* %4
br label %6
6: ; preds = %1, %3
%7 = phi i32 [ %5, %3 ], [ 0, %1 ]
%8 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "%s\n%s\n", "usage: fsck_msdosfs -p [-f] filesystem ...",
          "       fsck_msdosfs [-ny] filesystem ...");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
lea    0xecc(%rip),%rdx
lea    0xef0(%rip),%rcx
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
lea    0xecf(%rip),%rdx
lea    0xef3(%rip),%rcx
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [7 x i8] c"%s\0A%s\0A\00"
@.str.1 = [43 x i8] c"usage: fsck_msdosfs -p [-f] filesystem ...\00"
@.str.2 = [41 x i8] c" fsck_msdosfs [-ny] filesystem ...\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.2, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [7 x i8] c"%s\0A%s\0A\00"
@.str.1 = [43 x i8] c"usage: fsck_msdosfs -p [-f] filesystem ...\00"
@.str.2 = [41 x i8] c" fsck_msdosfs [-ny] filesystem ...\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.2, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
void so_signal_management() {}


x86 assembly (clang, -O0):
<so_signal_management>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<so_signal_management>:
ret

LLVM IR (-O0):
define void @so_signal_management() {
ret void
}

LLVM IR (-O2):
define void @so_signal_management() {
ret void
}
int logOf(int n) {
  int i = 0;
  for (i = -1; n > 0; i++) {
    n >>= 1;
  }
  return i;
}


x86 assembly (clang, -O0):
<logOf>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0xffffffff,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1136 <logOf+0x36>
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1115 <logOf+0x15>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<logOf>:
mov    $0xffffffff,%eax
test   %edi,%edi
jle    111c <logOf+0x1c>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
shr    %ecx
add    $0x1,%eax
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <logOf+0x10>
ret

LLVM IR (-O0):
define i32 @logOf(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 -1, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i32, i32* %2
%9 = ashr i32 %8, 1
store i32 %9, i32* %2
br label %10
10: ; preds = %7
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @logOf(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ -1, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = lshr i32 %5, 1
%7 = add nsw i32 %4, 1
%8 = icmp ult i32 %5, 2
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ -1, %1 ], [ %7, %3 ]
ret i32 %10
}
/* Type definitions */
struct timeval {
  long tv_sec;
  long tv_usec;
};

/* Variables and functions */
long timediff(struct timeval before, struct timeval after) {
  long sec = after.tv_sec - before.tv_sec;
  long microsec = after.tv_usec - before.tv_usec;
  return 1000000 * sec + microsec;
}


x86 assembly (clang, -O0):
<timediff>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x8(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x20(%rbp),%rax
sub    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
sub    -0x8(%rbp),%rax
mov    %rax,-0x30(%rbp)
imul   $0xf4240,-0x28(%rbp),%rax
add    -0x30(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<timediff>:
sub    %rdi,%rdx
sub    %rsi,%rcx
imul   $0xf4240,%rdx,%rax
add    %rcx,%rax
ret

LLVM IR (-O0):
%struct.timeval = type { i64, i64 }
define i64 @timediff(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca %struct.timeval
%6 = alloca %struct.timeval
%7 = alloca i64
%8 = alloca i64
%9 = bitcast %struct.timeval* %5 to { i64, i64 }*
%10 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %9, i32 0, i32 0
store i64 %0, i64* %10
%11 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %9, i32 0, i32 1
store i64 %1, i64* %11
%12 = bitcast %struct.timeval* %6 to { i64, i64 }*
%13 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %12, i32 0, i32 0
store i64 %2, i64* %13
%14 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %12, i32 0, i32 1
store i64 %3, i64* %14
%15 = getelementptr inbounds %struct.timeval, %struct.timeval* %6, i32 0, i32 0
%16 = load i64, i64* %15
%17 = getelementptr inbounds %struct.timeval, %struct.timeval* %5, i32 0, i32 0
%18 = load i64, i64* %17
%19 = sub nsw i64 %16, %18
store i64 %19, i64* %7
%20 = getelementptr inbounds %struct.timeval, %struct.timeval* %6, i32 0, i32 1
%21 = load i64, i64* %20
%22 = getelementptr inbounds %struct.timeval, %struct.timeval* %5, i32 0, i32 1
%23 = load i64, i64* %22
%24 = sub nsw i64 %21, %23
store i64 %24, i64* %8
%25 = load i64, i64* %7
%26 = mul nsw i64 1000000, %25
%27 = load i64, i64* %8
%28 = add nsw i64 %26, %27
ret i64 %28
}

LLVM IR (-O2):
define i64 @timediff(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = sub nsw i64 %2, %0
%6 = sub i64 %3, %1
%7 = mul nsw i64 %5, 1000000
%8 = add nsw i64 %6, %7
ret i64 %8
}
void RAND_seed(void) {}


x86 assembly (clang, -O0):
<RAND_seed>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RAND_seed>:
ret

LLVM IR (-O0):
define void @RAND_seed() {
ret void
}

LLVM IR (-O2):
define void @RAND_seed() {
ret void
}
/* Variables and functions */
int strlen(char *);
float strtof(char *, char **);
float libbun_s2f(char *x) {
  char *end = x + strlen(x);
  return strtof(x, &end);
}


x86 assembly (clang, -O0):
<libbun_s2f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1040 <strtof@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libbun_s2f>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
call   1030 <strlen@plt>
cltq
add    %rbx,%rax
mov    %rax,0x8(%rsp)
lea    0x8(%rsp),%rsi
mov    %rbx,%rdi
call   1040 <strtof@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define float @libbun_s2f(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %4, i64 %7
store i8* %8, i8** %3
%9 = load i8*, i8** %2
%10 = call float @strtof(i8* %9, i8** %3)
ret float %10
}

LLVM IR (-O2):
define float @libbun_s2f(i8* %0) {
%2 = alloca i8*
%3 = bitcast i8** %2 to i8*
%4 = tail call i32 @strlen(i8* %0)
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 %5
store i8* %6, i8** %2
%7 = call float @strtof(i8* %0, i8** %2)
ret float %7
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void f(int i) {
  if (i != 2)
    abort();
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x2,-0x4(%rbp)
je     112c <f+0x1c>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
cmp    $0x2,%edi
jne    1116 <f+0x6>
ret
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 2
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @abort()
unreachable
7: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @f(i32 %0) {
%2 = icmp eq i32 %0, 2
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sputc(unsigned char, int);
int /*<<< orphan*/ usleep(int);
void sendcmd(unsigned char cmd, int s) {
  usleep(100);
  sputc('D', s);
  sputc('C', s);
  sputc(cmd, s);
}


x86 assembly (clang, -O0):
<sendcmd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x64,%edi
call   1040 <usleep@plt>
mov    -0x8(%rbp),%esi
mov    $0x44,%edi
call   1030 <sputc@plt>
mov    -0x8(%rbp),%esi
mov    $0x43,%edi
call   1030 <sputc@plt>
mov    -0x1(%rbp),%al
mov    -0x8(%rbp),%esi
movzbl %al,%edi
call   1030 <sputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sendcmd>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x64,%edi
call   1040 <usleep@plt>
mov    $0x44,%edi
mov    %ebx,%esi
call   1030 <sputc@plt>
mov    $0x43,%edi
mov    %ebx,%esi
call   1030 <sputc@plt>
mov    %ebp,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <sputc@plt>

LLVM IR (-O0):
define void @sendcmd(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = call i32 @usleep(i32 100)
%6 = load i32, i32* %4
%7 = call i32 @sputc(i8 zeroext 68, i32 %6)
%8 = load i32, i32* %4
%9 = call i32 @sputc(i8 zeroext 67, i32 %8)
%10 = load i8, i8* %3
%11 = load i32, i32* %4
%12 = call i32 @sputc(i8 zeroext %10, i32 %11)
ret void
}

LLVM IR (-O2):
define void @sendcmd(i8 zeroext %0, i32 %1) {
%3 = tail call i32 @usleep(i32 100)
%4 = tail call i32 @sputc(i8 zeroext 68, i32 %1)
%5 = tail call i32 @sputc(i8 zeroext 67, i32 %1)
%6 = tail call i32 @sputc(i8 zeroext %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isascii(int);
void t_isascii_0x77() {
  Assert_real((isascii(119)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              600, ("isascii should be 1 for w"));
}


x86 assembly (clang, -O0):
<t_isascii_0x77>:
push   %rbp
mov    %rsp,%rbp
mov    $0x77,%edi
call   1030 <isascii@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x258,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0x77>:
lea    0xee9(%rip),%rsi
lea    0xf8a(%rip),%rcx
mov    $0x1,%edi
mov    $0x258,%edx
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for w\00"
define void @t_isascii_0x77() {
%1 = call i32 @isascii(i32 119)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 600, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for w\00"
define void @t_isascii_0x77() {
%1 = tail call i32 @Assert_real(i32 1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 600, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
long Pa_TriangularDither(void) {
  static unsigned long previous = 0;
  static unsigned long randSeed1 = 22222;
  static unsigned long randSeed2 = 5555555;
  long current, highPass;
  randSeed1 = (randSeed1 * 196314165) + 907633515;
  randSeed2 = (randSeed2 * 196314165) + 907633515;
  current =
      (((long)randSeed1) >> (32 - (15))) + (((long)randSeed2) >> (32 - (15)));
  highPass = current - previous;
  previous = current;
  return highPass;
}


x86 assembly (clang, -O0):
<Pa_TriangularDither>:
push   %rbp
mov    %rsp,%rbp
imul   $0xbb38435,0x2f11(%rip),%rax
35 84 b3 0b
add    $0x3619636b,%rax
mov    %rax,0x2f04(%rip)
imul   $0xbb38435,0x2f01(%rip),%rax
35 84 b3 0b
add    $0x3619636b,%rax
mov    %rax,0x2ef4(%rip)
mov    0x2ee5(%rip),%rax
sar    $0x11,%rax
mov    0x2ee2(%rip),%rcx
sar    $0x11,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
sub    0x2edc(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,0x2ecd(%rip)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Pa_TriangularDither>:
imul   $0xbb38435,0x2f15(%rip),%rax
35 84 b3 0b
add    $0x3619636b,%rax
mov    %rax,0x2f08(%rip)
imul   $0xbb38435,0x2f05(%rip),%rcx
35 84 b3 0b
add    $0x3619636b,%rcx
mov    %rcx,0x2ef7(%rip)
sar    $0x11,%rax
sar    $0x11,%rcx
add    %rax,%rcx
mov    %rcx,%rax
sub    0x2ef2(%rip),%rax
mov    %rcx,0x2eeb(%rip)
ret

LLVM IR (-O0):
@Pa_TriangularDither.previous = internal global i64 0
@Pa_TriangularDither.randSeed1 = internal global i64 22222
@Pa_TriangularDither.randSeed2 = internal global i64 5555555
define i64 @Pa_TriangularDither() {
%1 = alloca i64
%2 = alloca i64
%3 = load i64, i64* @Pa_TriangularDither.randSeed1
%4 = mul i64 %3, 196314165
%5 = add i64 %4, 907633515
store i64 %5, i64* @Pa_TriangularDither.randSeed1
%6 = load i64, i64* @Pa_TriangularDither.randSeed2
%7 = mul i64 %6, 196314165
%8 = add i64 %7, 907633515
store i64 %8, i64* @Pa_TriangularDither.randSeed2
%9 = load i64, i64* @Pa_TriangularDither.randSeed1
%10 = ashr i64 %9, 17
%11 = load i64, i64* @Pa_TriangularDither.randSeed2
%12 = ashr i64 %11, 17
%13 = add nsw i64 %10, %12
store i64 %13, i64* %1
%14 = load i64, i64* %1
%15 = load i64, i64* @Pa_TriangularDither.previous
%16 = sub i64 %14, %15
store i64 %16, i64* %2
%17 = load i64, i64* %1
store i64 %17, i64* @Pa_TriangularDither.previous
%18 = load i64, i64* %2
ret i64 %18
}

LLVM IR (-O2):
@Pa_TriangularDither.previous = internal unnamed_addr global i64 0
@Pa_TriangularDither.randSeed1 = internal unnamed_addr global i64 22222
@Pa_TriangularDither.randSeed2 = internal unnamed_addr global i64 5555555
define i64 @Pa_TriangularDither() {
%1 = load i64, i64* @Pa_TriangularDither.randSeed1
%2 = mul i64 %1, 196314165
%3 = add i64 %2, 907633515
store i64 %3, i64* @Pa_TriangularDither.randSeed1
%4 = load i64, i64* @Pa_TriangularDither.randSeed2
%5 = mul i64 %4, 196314165
%6 = add i64 %5, 907633515
store i64 %6, i64* @Pa_TriangularDither.randSeed2
%7 = ashr i64 %3, 17
%8 = ashr i64 %6, 17
%9 = add nsw i64 %8, %7
%10 = load i64, i64* @Pa_TriangularDither.previous
%11 = sub i64 %9, %10
store i64 %9, i64* @Pa_TriangularDither.previous
ret i64 %11
}
void spike() {}


x86 assembly (clang, -O0):
<spike>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spike>:
ret

LLVM IR (-O0):
define void @spike() {
ret void
}

LLVM IR (-O2):
define void @spike() {
ret void
}
void vberrh() {}


x86 assembly (clang, -O0):
<vberrh>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vberrh>:
ret

LLVM IR (-O0):
define void @vberrh() {
ret void
}

LLVM IR (-O2):
define void @vberrh() {
ret void
}
int basic(void) {
  int a;
  int *b = &a;
  *b = 2;
  a = *b;
  return a + *b;
}


x86 assembly (clang, -O0):
<basic>:
push   %rbp
mov    %rsp,%rbp
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x10(%rbp),%rcx
add    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<basic>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @basic() {
%1 = alloca i32
%2 = alloca i32*
store i32* %1, i32** %2
%3 = load i32*, i32** %2
store i32 2, i32* %3
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
store i32 %5, i32* %1
%6 = load i32, i32* %1
%7 = load i32*, i32** %2
%8 = load i32, i32* %7
%9 = add nsw i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @basic() {
ret i32 4
}