xunge/DecIR huggingface dataset:
void putcc(char c) {
  while (!((*((volatile unsigned long *)0xE2900010)) & (1 << 2)))
    ;
  (*((volatile unsigned long *)0xE2900020)) = c;
}


x86 assembly (clang, -O0):
<putcc>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0xe2900010,%eax
mov    (%rax),%rax
and    $0x4,%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    112c <putcc+0x2c>
jmp    1131 <putcc+0x31>
jmp    110a <putcc+0xa>
movsbq -0x1(%rbp),%rcx
mov    $0xe2900020,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<putcc>:
mov    $0xe2900010,%eax
cs nopw 0x0(%rax,%rax,1)
nop
testq  $0x4,(%rax)
je     1110 <putcc+0x10>
movsbq %dil,%rcx
mov    %rcx,0x10(%rax)
ret

LLVM IR (-O0):
define void @putcc(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
br label %3
3: ; preds = %8, %1
%4 = load volatile i64, i64* inttoptr (i64 3801088016 to i64*)
%5 = and i64 %4, 4
%6 = icmp ne i64 %5, 0
%7 = xor i1 %6, true
br i1 %7, label %8, label %9
8: ; preds = %3
br label %3
9: ; preds = %3
%10 = load i8, i8* %2
%11 = sext i8 %10 to i64
store volatile i64 %11, i64* inttoptr (i64 3801088032 to i64*)
ret void
}

LLVM IR (-O2):
define void @putcc(i8 signext %0) {
br label %2
2: ; preds = %2, %1
%3 = load volatile i64, i64* inttoptr (i64 3801088016 to i64*)
%4 = and i64 %3, 4
%5 = icmp eq i64 %4, 0
br i1 %5, label %2, label %6
6: ; preds = %2
%7 = sext i8 %0 to i64
store volatile i64 %7, i64* inttoptr (i64 3801088032 to i64*)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ XErrorEvent;
typedef int /*<<< orphan*/ Display;

/* Variables and functions */
int ignore_xerror(Display *dpy, XErrorEvent *e) { return 0; }


x86 assembly (clang, -O0):
<ignore_xerror>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ignore_xerror>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ignore_xerror(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @ignore_xerror(i32* nocapture readnone %0, i32* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ foo();
void test_no_clause() {
  int i;
#pragma omp parallel sections
  { foo(); }
#pragma omp parallel sections
  ++i;
#pragma omp parallel sections
  {
    foo();
    foo();
  }
}


x86 assembly (clang, -O0):
<test_no_clause>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <foo@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_no_clause>:
push   %rax
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <foo@plt>

LLVM IR (-O0):
define void @test_no_clause() {
%1 = alloca i32
%2 = call i32 (...) @foo()
%3 = load i32, i32* %1
%4 = add nsw i32 %3, 1
store i32 %4, i32* %1
%5 = call i32 (...) @foo()
%6 = call i32 (...) @foo()
ret void
}

LLVM IR (-O2):
define void @test_no_clause() {
%1 = tail call i32 (...) @foo()
%2 = tail call i32 (...) @foo()
%3 = tail call i32 (...) @foo()
ret void
}
/* Variables and functions */
double nan(char *);
double foo() {
  double ok2 = nan("");
  return ok2;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <nan@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
lea    0xee9(%rip),%rdi
jmp    1030 <nan@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define double @foo() {
%1 = alloca double
%2 = call double @nan(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
store double %2, double* %1
%3 = load double, double* %1
ret double %3
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define double @foo() {
%1 = tail call double @nan(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
ret double %1
}
/* Variables and functions */
int rom_present(char *);
int s3_virge_375_1_available(void) {
  return rom_present(L"roms/video/s3virge/86c375_1.bin");
}


x86 assembly (clang, -O0):
<s3_virge_375_1_available>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <rom_present@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<s3_virge_375_1_available>:
lea    0xee9(%rip),%rdi
jmp    1030 <rom_present@plt>

LLVM IR (-O0):
@.str = [32 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 115, i32 51, i32 118, i32 105, i32 114, i32 103, i32 101, i32 47, i32 56, i32 54, i32 99, i32 51, i32 55, i32 53, i32 95, i32 49, i32 46, i32 98, i32 105, i32 110, i32 0]
define i32 @s3_virge_375_1_available() {
%1 = call i32 @rom_present(i8* bitcast ([32 x i32]* @.str to i8*))
ret i32 %1
}

LLVM IR (-O2):
@.str = [32 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 115, i32 51, i32 118, i32 105, i32 114, i32 103, i32 101, i32 47, i32 56, i32 54, i32 99, i32 51, i32 55, i32 53, i32 95, i32 49, i32 46, i32 98, i32 105, i32 110, i32 0]
define i32 @s3_virge_375_1_available() {
%1 = tail call i32 @rom_present(i8* bitcast ([32 x i32]* @.str to i8*))
ret i32 %1
}
/* Variables and functions */
void *malloc(int);
void *malloc_fn(void *self, int size) { return malloc(size); }


x86 assembly (clang, -O0):
<malloc_fn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<malloc_fn>:
mov    %esi,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @malloc_fn(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i8* @malloc(i32 %5)
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @malloc_fn(i8* nocapture readnone %0, i32 %1) {
%3 = tail call i8* @malloc(i32 %1)
ret i8* %3
}
/* Variables and functions */
char *getenv(char *);
char *os_cmdshell(void) {
  char *shell = getenv("SHELL");
  if (shell == NULL)
    shell = "/bin/sh";
  return (shell);
}


x86 assembly (clang, -O0):
<os_cmdshell>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <getenv@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113e <os_cmdshell+0x2e>
lea    0xecc(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_cmdshell>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <getenv@plt>
test   %rax,%rax
lea    0xedf(%rip),%rcx
cmove  %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"SHELL\00"
@.str.1 = [8 x i8] c"/bin/sh\00"
define i8* @os_cmdshell() {
%1 = alloca i8*
%2 = call i8* @getenv(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %6
5: ; preds = %0
store i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i8** %1
br label %6
6: ; preds = %5, %0
%7 = load i8*, i8** %1
ret i8* %7
}

LLVM IR (-O2):
@.str = [6 x i8] c"SHELL\00"
@.str.1 = [8 x i8] c"/bin/sh\00"
define i8* @os_cmdshell() {
%1 = tail call i8* @getenv(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i8* %1, null
%3 = select i1 %2, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i8* %1
ret i8* %3
}
/* Variables and functions */
void *memset_timec(void *, int, size_t);
void *tc_memset(void *s, int c, size_t n) { return memset_timec(s, c, n); }


x86 assembly (clang, -O0):
<tc_memset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1030 <memset_timec@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tc_memset>:
jmp    1030 <memset_timec@plt>

LLVM IR (-O0):
define i8* @tc_memset(i8* %0, i32 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64
store i8* %0, i8** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i64, i64* %6
%10 = call i8* @memset_timec(i8* %7, i32 %8, i64 %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @tc_memset(i8* %0, i32 %1, i64 %2) {
%4 = tail call i8* @memset_timec(i8* %0, i32 %1, i64 %2)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ snis_typefaces_init_with_scaling(double, double);
void snis_typefaces_init(void) { snis_typefaces_init_with_scaling(1.0, 1.0); }


x86 assembly (clang, -O0):
<snis_typefaces_init>:
push   %rbp
mov    %rsp,%rbp
movsd  0xee4(%rip),%xmm1
movaps %xmm1,%xmm0
call   1030 <snis_typefaces_init_with_scaling@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<snis_typefaces_init>:
movsd  0xee8(%rip),%xmm0
movaps %xmm0,%xmm1
jmp    1030 <snis_typefaces_init_with_scaling@plt>

LLVM IR (-O0):
define void @snis_typefaces_init() {
%1 = call i32 @snis_typefaces_init_with_scaling(double 1.000000e+00, double 1.000000e+00)
ret void
}

LLVM IR (-O2):
define void @snis_typefaces_init() {
%1 = tail call i32 @snis_typefaces_init_with_scaling(double 1.000000e+00, double 1.000000e+00)
ret void
}
int test_imm_16int16_reg(short val) {
  return ((val) & (0x16 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_16int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x16,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_16int16_reg>:
test   $0x16,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_16int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 22
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_16int16_reg(i16 signext %0) {
%2 = and i16 %0, 22
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fgetc(FILE *stream) {
  unsigned char c;
  int rc;
  return (int)c;
}


x86 assembly (clang, -O0):
<fgetc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movzbl -0x9(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgetc>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fgetc(i32* %0) {
%2 = alloca i32*
%3 = alloca i8
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @fgetc(i32* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
void *f(void *x) { return (void *)((size_t)x + 34); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x22,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    0x22(%rdi),%rax
ret

LLVM IR (-O0):
define i8* @f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
%5 = add i64 %4, 34
%6 = inttoptr i64 %5 to i8*
ret i8* %6
}

LLVM IR (-O2):
define i8* @f(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = add i64 %2, 34
%4 = inttoptr i64 %3 to i8*
ret i8* %4
}
void code_else(struct code_t *s) {}


x86 assembly (clang, -O0):
<code_else>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<code_else>:
ret

LLVM IR (-O0):
%struct.code_t = type opaque
define void @code_else(%struct.code_t* %0) {
%2 = alloca %struct.code_t*
store %struct.code_t* %0, %struct.code_t** %2
ret void
}

LLVM IR (-O2):
%struct.code_t = type opaque
define void @code_else(%struct.code_t* nocapture %0) {
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
int /*<<< orphan*/ _HibernateWriteComplete();
void HibernateRTCMatchSet(uint32_t ui32Match, uint32_t ui32Value) {
  ASSERT(ui32Match == 0);
  (*((volatile uint32_t *)(0x400FC004))) = ui32Value;
  _HibernateWriteComplete();
}


x86 assembly (clang, -O0):
<HibernateRTCMatchSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <ASSERT@plt>
mov    -0x10(%rbp),%rcx
mov    $0x400fc004,%eax
mov    %rcx,(%rax)
mov    $0x0,%al
call   1030 <_HibernateWriteComplete@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateRTCMatchSet>:
push   %rbx
mov    %rsi,%rbx
xor    %eax,%eax
test   %rdi,%rdi
sete   %al
mov    %eax,%edi
call   1040 <ASSERT@plt>
mov    %rbx,0x400fc004
40
xor    %eax,%eax
pop    %rbx
jmp    1030 <_HibernateWriteComplete@plt>

LLVM IR (-O0):
define void @HibernateRTCMatchSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
%8 = call i32 @ASSERT(i32 %7)
%9 = load i64, i64* %4
store volatile i64 %9, i64* inttoptr (i64 1074774020 to i64*)
%10 = call i32 (...) @_HibernateWriteComplete()
ret void
}

LLVM IR (-O2):
define void @HibernateRTCMatchSet(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, 0
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
store volatile i64 %1, i64* inttoptr (i64 1074774020 to i64*)
%6 = tail call i32 (...) @_HibernateWriteComplete()
ret void
}
void clear_bit(int nr, volatile void *addr) {
  asm volatile("btrl %1, %0" : "=m"(*(volatile long *)addr) : "Ir"(nr));
}


x86 assembly (clang, -O0):
<clear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
btr    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_bit>:
btr    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @clear_bit(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i64*
%7 = load i32, i32* %3
ret void
}

LLVM IR (-O2):
define void @clear_bit(i32 %0, i8* %1) {
%3 = bitcast i8* %1 to i64*
tail call void asm sideeffect "btrl $1, $0", "=*m,Ir,~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %3, i32 %0)
ret void
}
/* Variables and functions */
void x_strncpy(char *dst, const char *src, size_t size) {
  while (size-- > 0 && (*dst++ = *src++) != '\0')
    ;
}


x86 assembly (clang, -O0):
<x_strncpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
mov    %rcx,%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x18(%rbp)
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x19(%rbp)
jbe    115c <x_strncpy+0x5c>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %al,(%rcx)
movsbl %al,%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
test   $0x1,%al
jne    116c <x_strncpy+0x6c>
jmp    1171 <x_strncpy+0x71>
jmp    1110 <x_strncpy+0x10>
pop    %rbp
ret

x86 assembly (clang, -O2):
<x_strncpy>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
cmp    %rax,%rdx
je     1124 <x_strncpy+0x24>
movzbl (%rsi,%rax,1),%ecx
mov    %cl,(%rdi,%rax,1)
add    $0x1,%rax
test   %cl,%cl
jne    1110 <x_strncpy+0x10>
ret

LLVM IR (-O0):
define void @x_strncpy(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
br label %7
7: ; preds = %21, %3
%8 = load i64, i64* %6
%9 = add i64 %8, -1
store i64 %9, i64* %6
%10 = icmp ugt i64 %8, 0
br i1 %10, label %11, label %19
11: ; preds = %7
%12 = load i8*, i8** %5
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %5
%14 = load i8, i8* %12
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %4
store i8 %14, i8* %15
%17 = sext i8 %14 to i32
%18 = icmp ne i32 %17, 0
br label %19
19: ; preds = %11, %7
%20 = phi i1 [ false, %7 ], [ %18, %11 ]
br i1 %20, label %21, label %22
21: ; preds = %19
br label %7
22: ; preds = %19
ret void
}

LLVM IR (-O2):
define void @x_strncpy(i8* nocapture writeonly %0, i8* nocapture %1, i64 %2) {
br label %4
4: ; preds = %9, %3
%5 = phi i8* [ %0, %3 ], [ %13, %9 ]
%6 = phi i8* [ %1, %3 ], [ %11, %9 ]
%7 = phi i64 [ %2, %3 ], [ %10, %9 ]
%8 = icmp eq i64 %7, 0
br i1 %8, label %15, label %9
9: ; preds = %4
%10 = add i64 %7, -1
%11 = getelementptr inbounds i8, i8* %6, i64 1
%12 = load i8, i8* %6
%13 = getelementptr inbounds i8, i8* %5, i64 1
store i8 %12, i8* %5
%14 = icmp eq i8 %12, 0
br i1 %14, label %15, label %4
15: ; preds = %4, %9
ret void
}
vbiqdv(dev) char dev[];
{}


x86 assembly (clang, -O0):
<vbiqdv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vbiqdv>:
ret

LLVM IR (-O0):
define i32 @vbiqdv(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @vbiqdv(i8* nocapture readnone %0) {
ret i32 undef
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int rand();
uint64_t getRand64() {
  return (((uint64_t)rand() << 32) + rand()) ^
         (((uint64_t)rand() << 32) + rand());
}


x86 assembly (clang, -O0):
<getRand64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x20,%ecx
shl    %cl,%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x20,%ecx
shl    %cl,%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x8(%rbp),%ecx
mov    %eax,%edx
mov    -0x4(%rbp),%eax
add    %edx,%ecx
xor    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getRand64>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
xor    %eax,%eax
call   1030 <rand@plt>
xor    %eax,%eax
call   1030 <rand@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <rand@plt>

LLVM IR (-O0):
define i32 @getRand64() {
%1 = call i32 (...) @rand()
%2 = shl i32 %1, 32
%3 = call i32 (...) @rand()
%4 = add nsw i32 %2, %3
%5 = call i32 (...) @rand()
%6 = shl i32 %5, 32
%7 = call i32 (...) @rand()
%8 = add nsw i32 %6, %7
%9 = xor i32 %4, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @getRand64() {
%1 = tail call i32 (...) @rand()
%2 = tail call i32 (...) @rand()
%3 = tail call i32 (...) @rand()
%4 = tail call i32 (...) @rand()
ret i32 poison
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ MC_avg4_8(int, int /*<<< orphan*/ *,
                             int /*<<< orphan*/ const *, int, int);
void MC_avg_xy_8_3dnow(uint8_t *dest, const uint8_t *ref, int stride,
                       int height) {
  MC_avg4_8(height, dest, ref, stride, 1);
}


x86 assembly (clang, -O0):
<MC_avg_xy_8_3dnow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x18(%rbp),%edi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0x1,%r8d
call   1030 <MC_avg4_8@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MC_avg_xy_8_3dnow>:
mov    %edx,%eax
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    %ecx,%edi
mov    %eax,%ecx
mov    $0x1,%r8d
jmp    1030 <MC_avg4_8@plt>

LLVM IR (-O0):
define void @MC_avg_xy_8_3dnow(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %8
%10 = load i32*, i32** %5
%11 = load i32*, i32** %6
%12 = load i32, i32* %7
%13 = call i32 @MC_avg4_8(i32 %9, i32* %10, i32* %11, i32 %12, i32 1)
ret void
}

LLVM IR (-O2):
define void @MC_avg_xy_8_3dnow(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = tail call i32 @MC_avg4_8(i32 %3, i32* %0, i32* %1, i32 %2, i32 1)
ret void
}
int get_ind(int i, int j, int Nx) { return j * Nx + i; }


x86 assembly (clang, -O0):
<get_ind>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
imul   -0xc(%rbp),%eax
add    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_ind>:
imul   %edx,%esi
lea    (%rsi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @get_ind(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = load i32, i32* %6
%9 = mul nsw i32 %7, %8
%10 = load i32, i32* %4
%11 = add nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @get_ind(i32 %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %2, %1
%5 = add nsw i32 %4, %0
ret i32 %5
}
/* Variables and functions */
int EXIT_FAILURE;
int EXIT_SUCCESS;
scalar_t__ strncmp(char *, char *, int);
int inter_unit_ck_str_eq(char *first_test_string, char *second_test_string) {
  int truth = EXIT_FAILURE;
  if (strncmp(first_test_string, second_test_string, 50) == 0) {
    truth = EXIT_SUCCESS;
  }
  return truth;
}


x86 assembly (clang, -O0):
<inter_unit_ck_str_eq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb9(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x32,%edx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
jne    1154 <inter_unit_ck_str_eq+0x44>
mov    0x2e89(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inter_unit_ck_str_eq>:
push   %rbx
mov    0x2ec8(%rip),%rax
mov    (%rax),%ebx
mov    $0x32,%edx
call   1030 <strncmp@plt>
test   %rax,%rax
jne    1132 <inter_unit_ck_str_eq+0x22>
mov    0x2ea8(%rip),%rax
mov    (%rax),%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
@EXIT_SUCCESS = global i32 0
define i32 @inter_unit_ck_str_eq(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i32, i32* @EXIT_FAILURE
store i32 %6, i32* %5
%7 = load i8*, i8** %3
%8 = load i8*, i8** %4
%9 = call i64 @strncmp(i8* %7, i8* %8, i32 50)
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = load i32, i32* @EXIT_SUCCESS
store i32 %12, i32* %5
br label %13
13: ; preds = %11, %2
%14 = load i32, i32* %5
ret i32 %14
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
@EXIT_SUCCESS = global i32 0
define i32 @inter_unit_ck_str_eq(i8* %0, i8* %1) {
%3 = load i32, i32* @EXIT_FAILURE
%4 = tail call i64 @strncmp(i8* %0, i8* %1, i32 50)
%5 = icmp eq i64 %4, 0
%6 = load i32, i32* @EXIT_SUCCESS
%7 = select i1 %5, i32 %6, i32 %3
ret i32 %7
}
void msm_spm_dump_regs(unsigned int cpu) { return; }


x86 assembly (clang, -O0):
<msm_spm_dump_regs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<msm_spm_dump_regs>:
ret

LLVM IR (-O0):
define void @msm_spm_dump_regs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @msm_spm_dump_regs(i32 %0) {
ret void
}
/* Variables and functions */
double exp(double);
double log(double);
double pow(double base, double exponent) { return exp(exponent * log(base)); }


x86 assembly (clang, -O0):
<pow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <log@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
mulsd  %xmm1,%xmm0
call   1030 <exp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pow>:
push   %rax
movsd  %xmm1,(%rsp)
call   1040 <log@plt>
mulsd  (%rsp),%xmm0
pop    %rax
jmp    1030 <exp@plt>

LLVM IR (-O0):
define double @pow(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %4
%6 = load double, double* %3
%7 = call double @log(double %6)
%8 = fmul double %5, %7
%9 = call double @exp(double %8)
ret double %9
}

LLVM IR (-O2):
define double @pow(double %0, double %1) {
%3 = tail call double @log(double %0)
%4 = fmul double %3, %1
%5 = tail call double @exp(double %4)
ret double %5
}
/* Type definitions */
struct list_iter {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct list_iter *);
void list_iter_free(struct list_iter *iter) {
  if (iter != NULL)
    free(iter);
}


x86 assembly (clang, -O0):
<list_iter_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <list_iter_free+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_iter_free>:
test   %rdi,%rdi
je     111a <list_iter_free+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
%struct.list_iter = type { i32 }
define void @list_iter_free(%struct.list_iter* %0) {
%2 = alloca %struct.list_iter*
store %struct.list_iter* %0, %struct.list_iter** %2
%3 = load %struct.list_iter*, %struct.list_iter** %2
%4 = icmp ne %struct.list_iter* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load %struct.list_iter*, %struct.list_iter** %2
%7 = call i32 @free(%struct.list_iter* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
%struct.list_iter = type { i32 }
define void @list_iter_free(%struct.list_iter* %0) {
%2 = icmp eq %struct.list_iter* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(%struct.list_iter* %0)
br label %5
5: ; preds = %3, %1
ret void
}
int test_imm_47int16_reg(short val) {
  return ((val) & (0x47 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_47int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x47,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_47int16_reg>:
test   $0x47,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_47int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 71
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_47int16_reg(i16 signext %0) {
%2 = and i16 %0, 71
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void _QWERTY() {
  char *x = "ANSI C requires something here. This is never really used.";
  printf("%s\n", x);
}


x86 assembly (clang, -O0):
<_QWERTY>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xf0d(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_QWERTY>:
lea    0xf24(%rip),%rdi
lea    0xee2(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [59 x i8] c"ANSI C requires something here. This is never really used.\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define void @_QWERTY() {
%1 = alloca i8*
store i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %2)
ret void
}

LLVM IR (-O2):
@.str = [59 x i8] c"ANSI C requires something here. This is never really used.\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define void @_QWERTY() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
char *xstrdup(char *);
char *perf_counters_to_string(void) {
  return xstrdup("Not Supported on this platform. Only available on Linux "
                 "(version >= 2.6.32)");
}


x86 assembly (clang, -O0):
<perf_counters_to_string>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <xstrdup@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<perf_counters_to_string>:
lea    0xee9(%rip),%rdi
jmp    1030 <xstrdup@plt>

LLVM IR (-O0):
@.str = [76 x i8] c"Not Supported on this platform. Only available on Linux (version >= 2.6.32)\00"
define i8* @perf_counters_to_string() {
%1 = call i8* @xstrdup(i8* getelementptr inbounds ([76 x i8], [76 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [76 x i8] c"Not Supported on this platform. Only available on Linux (version >= 2.6.32)\00"
define i8* @perf_counters_to_string() {
%1 = tail call i8* @xstrdup(i8* getelementptr inbounds ([76 x i8], [76 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
int mod(int a, const int b) {
  int c_modulus = a % b;
  if (c_modulus < 0)
    return c_modulus + b;
  else
    return c_modulus;
}


x86 assembly (clang, -O0):
<mod>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jge    112c <mod+0x2c>
mov    -0x10(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1132 <mod+0x32>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod>:
mov    %edi,%eax
cltd
idiv   %esi
mov    %edx,%eax
sar    $0x1f,%eax
and    %esi,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @mod(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = srem i32 %7, %8
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp slt i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %2
%13 = load i32, i32* %6
%14 = load i32, i32* %5
%15 = add nsw i32 %13, %14
store i32 %15, i32* %3
br label %18
16: ; preds = %2
%17 = load i32, i32* %6
store i32 %17, i32* %3
br label %18
18: ; preds = %16, %12
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @mod(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
%4 = icmp slt i32 %3, 0
%5 = select i1 %4, i32 %1, i32 0
%6 = add nsw i32 %5, %3
ret i32 %6
}
__attribute__((noipa)) int f1(int a, int b) {
  return __builtin_clz(a - b) != 0;
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
bsr    %eax,%eax
xor    $0x1f,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
xor    %eax,%eax
cmp    %esi,%edi
setge  %al
ret

LLVM IR (-O0):
define i32 @f1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
%8 = call i32 @llvm.ctlz.i32(i32 %7, i1 true)
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @f1(i32 %0, i32 %1) {
%3 = icmp sge i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ EEPROM_R_Enable();
void EEPROM_R_Start(void) { EEPROM_R_Enable(); }


x86 assembly (clang, -O0):
<EEPROM_R_Start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <EEPROM_R_Enable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<EEPROM_R_Start>:
xor    %eax,%eax
jmp    1030 <EEPROM_R_Enable@plt>

LLVM IR (-O0):
define void @EEPROM_R_Start() {
%1 = call i32 (...) @EEPROM_R_Enable()
ret void
}

LLVM IR (-O2):
define void @EEPROM_R_Start() {
%1 = tail call i32 (...) @EEPROM_R_Enable()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ signed_comparison_reg_imm();
int /*<<< orphan*/ signed_comparison_reg_mem();
int /*<<< orphan*/ signed_comparison_reg_reg();
int main(void) {
  signed_comparison_reg_reg();
  signed_comparison_reg_mem();
  signed_comparison_reg_imm();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <signed_comparison_reg_reg@plt>
mov    $0x0,%al
call   1030 <signed_comparison_reg_mem@plt>
mov    $0x0,%al
call   1040 <signed_comparison_reg_imm@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <signed_comparison_reg_reg@plt>
xor    %eax,%eax
call   1030 <signed_comparison_reg_mem@plt>
xor    %eax,%eax
call   1040 <signed_comparison_reg_imm@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @signed_comparison_reg_reg()
%3 = call i32 (...) @signed_comparison_reg_mem()
%4 = call i32 (...) @signed_comparison_reg_imm()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @signed_comparison_reg_reg()
%2 = tail call i32 (...) @signed_comparison_reg_mem()
%3 = tail call i32 (...) @signed_comparison_reg_imm()
ret i32 0
}
/* Variables and functions */
int is_scheduler_disabled(int argc, char **argv) {
  return argc < 2 || argv[1] == NULL;
}


x86 assembly (clang, -O0):
<is_scheduler_disabled>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%al
cmpl   $0x2,-0x4(%rbp)
mov    %al,-0x11(%rbp)
jl     1129 <is_scheduler_disabled+0x29>
mov    -0x10(%rbp),%rax
cmpq   $0x0,0x8(%rax)
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_scheduler_disabled>:
mov    $0x1,%eax
cmp    $0x2,%edi
jl     1114 <is_scheduler_disabled+0x14>
xor    %eax,%eax
cmpq   $0x0,0x8(%rsi)
sete   %al
ret

LLVM IR (-O0):
define i32 @is_scheduler_disabled(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 2
br i1 %6, label %12, label %7
7: ; preds = %2
%8 = load i8**, i8*** %4
%9 = getelementptr inbounds i8*, i8** %8, i64 1
%10 = load i8*, i8** %9
%11 = icmp eq i8* %10, null
br label %12
12: ; preds = %7, %2
%13 = phi i1 [ true, %2 ], [ %11, %7 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @is_scheduler_disabled(i32 %0, i8** nocapture %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = icmp eq i8* %6, null
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %4, %2
%10 = phi i32 [ 1, %2 ], [ %8, %4 ]
ret i32 %10
}
int isupper(int c) { return (c >= 'A') && (c <= 'Z'); }


x86 assembly (clang, -O0):
<isupper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x41,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <isupper+0x20>
cmpl   $0x5a,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isupper>:
add    $0xffffffbf,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 65
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 90
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isupper(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
struct darray {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ darray_erase(size_t const, struct darray *, size_t);
size_t darray_find(size_t const, struct darray *, void const *,
                   int /*<<< orphan*/);
void darray_erase_item(const size_t element_size, struct darray *dst,
                       const void *item) {
  size_t idx = darray_find(element_size, dst, item, 0);
  if (idx != ((size_t)-1))
    darray_erase(element_size, dst, idx);
}


x86 assembly (clang, -O0):
<darray_erase_item>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
call   1040 <darray_find@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0xffffffffffffffff,-0x20(%rbp)
je     1167 <darray_erase_item+0x47>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <darray_erase@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<darray_erase_item>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %ecx,%ecx
call   1040 <darray_find@plt>
cmp    $0xffffffffffffffff,%rax
je     114c <darray_erase_item+0x2c>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %rax,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <darray_erase@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.darray = type { i32 }
define void @darray_erase_item(i64 %0, %struct.darray* %1, i8* %2) {
%4 = alloca i64
%5 = alloca %struct.darray*
%6 = alloca i8*
%7 = alloca i64
store i64 %0, i64* %4
store %struct.darray* %1, %struct.darray** %5
store i8* %2, i8** %6
%8 = load i64, i64* %4
%9 = load %struct.darray*, %struct.darray** %5
%10 = load i8*, i8** %6
%11 = call i64 @darray_find(i64 %8, %struct.darray* %9, i8* %10, i32 0)
store i64 %11, i64* %7
%12 = load i64, i64* %7
%13 = icmp ne i64 %12, -1
br i1 %13, label %14, label %19
14: ; preds = %3
%15 = load i64, i64* %4
%16 = load %struct.darray*, %struct.darray** %5
%17 = load i64, i64* %7
%18 = call i32 @darray_erase(i64 %15, %struct.darray* %16, i64 %17)
br label %19
19: ; preds = %14, %3
ret void
}

LLVM IR (-O2):
%struct.darray = type { i32 }
define void @darray_erase_item(i64 %0, %struct.darray* %1, i8* %2) {
%4 = tail call i64 @darray_find(i64 %0, %struct.darray* %1, i8* %2, i32 0)
%5 = icmp eq i64 %4, -1
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @darray_erase(i64 %0, %struct.darray* %1, i64 %4)
br label %8
8: ; preds = %6, %3
ret void
}
double _nearest_diff(double x) { return 0; }


x86 assembly (clang, -O0):
<_nearest_diff>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_nearest_diff>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @_nearest_diff(double %0) {
%2 = alloca double
store double %0, double* %2
ret double 0.000000e+00
}

LLVM IR (-O2):
define double @_nearest_diff(double %0) {
ret double 0.000000e+00
}
char wordchar(void) { return 0x17; }


x86 assembly (clang, -O0):
<wordchar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x17,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wordchar>:
mov    $0x17,%al
ret

LLVM IR (-O0):
define signext i8 @wordchar() {
ret i8 23
}

LLVM IR (-O2):
define signext i8 @wordchar() {
ret i8 23
}
int strcmp(const char *s1, const char *s2) {
  while (*s1 == *s2) {
    if (*s1 == 0)
      return 0;
    s1++;
    s2++;
  }
  return *(unsigned const char *)s1 - *(unsigned const char *)(s2);
}


x86 assembly (clang, -O0):
<strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    -0x18(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jne    115b <strcmp+0x5b>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    113e <strcmp+0x3e>
movl   $0x0,-0x4(%rbp)
jmp    116e <strcmp+0x6e>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    110c <strcmp+0xc>
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
mov    -0x18(%rbp),%rcx
movzbl (%rcx),%ecx
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp>:
mov    (%rdi),%al
mov    (%rsi),%cl
cmp    %cl,%al
jne    1124 <strcmp+0x24>
mov    $0x1,%edx
nopl   (%rax)
test   %al,%al
je     112d <strcmp+0x2d>
movzbl (%rdi,%rdx,1),%eax
movzbl (%rsi,%rdx,1),%ecx
add    $0x1,%rdx
cmp    %cl,%al
je     1110 <strcmp+0x10>
movzbl %al,%eax
movzbl %cl,%ecx
sub    %ecx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
br label %6
6: ; preds = %20, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i8*, i8** %5
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %9, %12
br i1 %13, label %14, label %25
14: ; preds = %6
%15 = load i8*, i8** %4
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %14
store i32 0, i32* %3
br label %33
20: ; preds = %14
%21 = load i8*, i8** %4
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %4
%23 = load i8*, i8** %5
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %5
br label %6
25: ; preds = %6
%26 = load i8*, i8** %4
%27 = load i8, i8* %26
%28 = zext i8 %27 to i32
%29 = load i8*, i8** %5
%30 = load i8, i8* %29
%31 = zext i8 %30 to i32
%32 = sub nsw i32 %28, %31
store i32 %32, i32* %3
br label %33
33: ; preds = %25, %19
%34 = load i32, i32* %3
ret i32 %34
}

LLVM IR (-O2):
define i32 @strcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
%5 = icmp eq i8 %3, %4
br i1 %5, label %6, label %17
6: ; preds = %2, %11
%7 = phi i8 [ %14, %11 ], [ %3, %2 ]
%8 = phi i8* [ %13, %11 ], [ %1, %2 ]
%9 = phi i8* [ %12, %11 ], [ %0, %2 ]
%10 = icmp eq i8 %7, 0
br i1 %10, label %23, label %11
11: ; preds = %6
%12 = getelementptr inbounds i8, i8* %9, i64 1
%13 = getelementptr inbounds i8, i8* %8, i64 1
%14 = load i8, i8* %12
%15 = load i8, i8* %13
%16 = icmp eq i8 %14, %15
br i1 %16, label %6, label %17
17: ; preds = %11, %2
%18 = phi i8 [ %3, %2 ], [ %14, %11 ]
%19 = phi i8 [ %4, %2 ], [ %15, %11 ]
%20 = zext i8 %18 to i32
%21 = zext i8 %19 to i32
%22 = sub nsw i32 %20, %21
br label %23
23: ; preds = %6, %17
%24 = phi i32 [ %22, %17 ], [ 0, %6 ]
ret i32 %24
}
int ns_function() { return 1; }


x86 assembly (clang, -O0):
<ns_function>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ns_function>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ns_function() {
ret i32 1
}

LLVM IR (-O2):
define i32 @ns_function() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int sum = 0;
  for (int i = 0; i < 1000; i++) {
    sum++;
  }
  assert(sum == 1000);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x3e8,-0xc(%rbp)
jge    1151 <main+0x41>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112d <main+0x1d>
cmpl   $0x3e8,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %0
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 1000
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
store i32 %9, i32* %2
br label %10
10: ; preds = %7
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
%14 = load i32, i32* %2
%15 = icmp eq i32 %14, 1000
%16 = zext i1 %15 to i32
%17 = call i32 @assert(i32 %16)
%18 = load i32, i32* %1
ret i32 %18
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
ret i32 0
}
unsigned int hash_func(const char *str) {
  const char *p = str;
  unsigned long h = *p;
  if (h) {
    for (p += 1; *p != '\0'; p++) {
      h = (h << 5) - h + *p;
    }
  }
  return h;
}


x86 assembly (clang, -O0):
<hash_func>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbq (%rax),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1174 <hash_func+0x74>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     116f <hash_func+0x6f>
mov    -0x18(%rbp),%rax
shl    $0x5,%rax
sub    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
movsbq (%rcx),%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1133 <hash_func+0x33>
jmp    1174 <hash_func+0x74>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_func>:
movsbq (%rdi),%rax
test   %rax,%rax
je     113d <hash_func+0x3d>
mov    0x1(%rdi),%cl
test   %cl,%cl
je     113c <hash_func+0x3c>
add    $0x2,%rdi
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rax,%rdx
shl    $0x5,%rdx
sub    %rax,%rdx
movsbq %cl,%rax
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1120 <hash_func+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hash_func(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i64
store i64 %8, i64* %4
%9 = load i64, i64* %4
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %32
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i64 1
store i8* %13, i8** %3
br label %14
14: ; preds = %28, %11
%15 = load i8*, i8** %3
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp ne i32 %17, 0
br i1 %18, label %19, label %31
19: ; preds = %14
%20 = load i64, i64* %4
%21 = shl i64 %20, 5
%22 = load i64, i64* %4
%23 = sub i64 %21, %22
%24 = load i8*, i8** %3
%25 = load i8, i8* %24
%26 = sext i8 %25 to i64
%27 = add i64 %23, %26
store i64 %27, i64* %4
br label %28
28: ; preds = %19
%29 = load i8*, i8** %3
%30 = getelementptr inbounds i8, i8* %29, i32 1
store i8* %30, i8** %3
br label %14
31: ; preds = %14
br label %32
32: ; preds = %31, %1
%33 = load i64, i64* %4
%34 = trunc i64 %33 to i32
ret i32 %34
}

LLVM IR (-O2):
define i32 @hash_func(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %19, label %4
4: ; preds = %1
%5 = sext i8 %2 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 1
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
br i1 %8, label %19, label %9
9: ; preds = %4, %9
%10 = phi i8 [ %17, %9 ], [ %7, %4 ]
%11 = phi i8* [ %16, %9 ], [ %6, %4 ]
%12 = phi i64 [ %15, %9 ], [ %5, %4 ]
%13 = mul i64 %12, 31
%14 = sext i8 %10 to i64
%15 = add i64 %13, %14
%16 = getelementptr inbounds i8, i8* %11, i64 1
%17 = load i8, i8* %16
%18 = icmp eq i8 %17, 0
br i1 %18, label %19, label %9
19: ; preds = %9, %4, %1
%20 = phi i64 [ 0, %1 ], [ %5, %4 ], [ %15, %9 ]
%21 = trunc i64 %20 to i32
ret i32 %21
}