xunge/DecIR huggingface dataset:
/* Variables and functions */
int rand();
void some_calc(int a) { a = a % 2 ? rand() : -a; }


x86 assembly (clang, -O0):
<some_calc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     113e <some_calc+0x2e>
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x8(%rbp)
jmp    1146 <some_calc+0x36>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<some_calc>:
test   $0x1,%dil
jne    1117 <some_calc+0x7>
ret
xor    %eax,%eax
jmp    1030 <rand@plt>

LLVM IR (-O0):
define void @some_calc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 2
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 (...) @rand()
br label %11
8: ; preds = %1
%9 = load i32, i32* %2
%10 = sub nsw i32 0, %9
br label %11
11: ; preds = %8, %6
%12 = phi i32 [ %7, %6 ], [ %10, %8 ]
store i32 %12, i32* %2
ret void
}

LLVM IR (-O2):
define void @some_calc(i32 %0) {
%2 = and i32 %0, 1
%3 = icmp eq i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 (...) @rand()
br label %6
6: ; preds = %1, %4
ret void
}
void foo164(int p) {}


x86 assembly (clang, -O0):
<foo164>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo164>:
ret

LLVM IR (-O0):
define void @foo164(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo164(i32 %0) {
ret void
}
/* Variables and functions */
int _semop(int, int);
int semaphoreReserve(int semid) { return _semop(semid, -1); }


x86 assembly (clang, -O0):
<semaphoreReserve>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xffffffff,%esi
call   1030 <_semop@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<semaphoreReserve>:
mov    $0xffffffff,%esi
jmp    1030 <_semop@plt>

LLVM IR (-O0):
define i32 @semaphoreReserve(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_semop(i32 %3, i32 -1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @semaphoreReserve(i32 %0) {
%2 = tail call i32 @_semop(i32 %0, i32 -1)
ret i32 %2
}
unsigned char gs_shell_alive(long display) { return 0; }


x86 assembly (clang, -O0):
<gs_shell_alive>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gs_shell_alive>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i8 @gs_shell_alive(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret i8 0
}

LLVM IR (-O2):
define zeroext i8 @gs_shell_alive(i64 %0) {
ret i8 0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
double rational_func_x_1(double x, void *params) {
  (void)params;
  assert(x != 0.0);
  return 1 / x;
}


x86 assembly (clang, -O0):
<rational_func_x_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
setne  %al
setp   %cl
or     %cl,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
movsd  0xeb9(%rip),%xmm0
divsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rational_func_x_1>:
push   %rax
movsd  %xmm0,(%rsp)
xorpd  %xmm1,%xmm1
cmpneqsd %xmm0,%xmm1
movq   %xmm1,%rdi
and    $0x1,%edi
call   1030 <assert@plt>
movsd  0xecc(%rip),%xmm0
divsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @rational_func_x_1(double %0, i8* %1) {
%3 = alloca double
%4 = alloca i8*
store double %0, double* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load double, double* %3
%7 = fcmp une double %6, 0.000000e+00
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
%10 = load double, double* %3
%11 = fdiv double 1.000000e+00, %10
ret double %11
}

LLVM IR (-O2):
define double @rational_func_x_1(double %0, i8* nocapture readnone %1) {
%3 = fcmp une double %0, 0.000000e+00
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = fdiv double 1.000000e+00, %0
ret double %6
}
int test_imm_5Fuint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x5F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Fuint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0x5f,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Fuint64_midword_mem>:
testb  $0x5f,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Fuint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 95
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_5Fuint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 6225920
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void hlt(void) { __asm volatile("hlt"); }


x86 assembly (clang, -O0):
<hlt>:
push   %rbp
mov    %rsp,%rbp
hlt
pop    %rbp
ret

x86 assembly (clang, -O2):
<hlt>:
hlt
ret

LLVM IR (-O0):
define void @hlt() {
ret void
}

LLVM IR (-O2):
define void @hlt() {
tail call void asm sideeffect "hlt", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
int soma_alga(int);
int main(void) {
  int num;
  printf("Informe o número: ");
  scanf("%d", &num);
  printf("A soma dos algarismos é %d\n", soma_alga(num));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
lea    0xec0(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1030 <soma_alga@plt>
mov    %eax,%esi
lea    0xea9(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xece(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
call   1030 <soma_alga@plt>
lea    0xeb7(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"Informe o n\C3\BAmero: \00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [29 x i8] c"A soma dos algarismos \C3\A9 %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = call i32 @soma_alga(i32 %5)
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.2, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [20 x i8] c"Informe o n\C3\BAmero: \00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [29 x i8] c"A soma dos algarismos \C3\A9 %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @soma_alga(i32 %5)
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @.str.2, i64 0, i64 0), i32 %6)
ret i32 0
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t get_spi_control_byte(uint8_t rw_cmd, uint8_t hw_addr) {
  hw_addr = (hw_addr << 1) & 0xE;
  rw_cmd &= 1;
  return 0x40 | hw_addr | rw_cmd;
}


x86 assembly (clang, -O0):
<get_spi_control_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
and    $0xe,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
or     $0x40,%eax
or     -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_spi_control_byte>:
and    $0x7,%esi
and    $0x1,%edi
lea    (%rdi,%rsi,2),%eax
add    $0x40,%eax
ret

LLVM IR (-O0):
define i32 @get_spi_control_byte(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 %5, 1
%7 = and i32 %6, 14
store i32 %7, i32* %4
%8 = load i32, i32* %3
%9 = and i32 %8, 1
store i32 %9, i32* %3
%10 = load i32, i32* %4
%11 = or i32 64, %10
%12 = load i32, i32* %3
%13 = or i32 %11, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @get_spi_control_byte(i32 %0, i32 %1) {
%3 = shl i32 %1, 1
%4 = and i32 %3, 14
%5 = and i32 %0, 1
%6 = or i32 %5, %4
%7 = or i32 %6, 64
ret i32 %7
}
void aaa(void) {}


x86 assembly (clang, -O0):
<aaa>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aaa>:
ret

LLVM IR (-O0):
define void @aaa() {
ret void
}

LLVM IR (-O2):
define void @aaa() {
ret void
}
void inNsrUnit2ASCII(char c) {}


x86 assembly (clang, -O0):
<inNsrUnit2ASCII>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<inNsrUnit2ASCII>:
ret

LLVM IR (-O0):
define void @inNsrUnit2ASCII(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
ret void
}

LLVM IR (-O2):
define void @inNsrUnit2ASCII(i8 signext %0) {
ret void
}
/* Variables and functions */
long long Fibonacci(size_t N) {
  if (N == 0) {
    return 0;
  }
  if (N <= 2) {
    return 1;
  }
  return Fibonacci(N - 1) + Fibonacci(N - 2);
}


x86 assembly (clang, -O0):
<Fibonacci>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1134 <Fibonacci+0x24>
movq   $0x0,-0x8(%rbp)
jmp    1178 <Fibonacci+0x68>
cmpq   $0x2,-0x10(%rbp)
ja     114c <Fibonacci+0x3c>
movq   $0x1,-0x8(%rbp)
jmp    1178 <Fibonacci+0x68>
mov    -0x10(%rbp),%rdi
sub    $0x1,%rdi
call   1030 <Fibonacci@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
sub    $0x2,%rdi
call   1030 <Fibonacci@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Fibonacci>:
push   %r14
push   %rbx
push   %rax
test   %rdi,%rdi
je     114c <Fibonacci+0x3c>
mov    %rdi,%rbx
mov    $0x1,%r14d
cmp    $0x3,%rdi
jb     114f <Fibonacci+0x3f>
xor    %r14d,%r14d
nopl   0x0(%rax,%rax,1)
lea    -0x1(%rbx),%rdi
call   1030 <Fibonacci@plt>
add    $0xfffffffffffffffe,%rbx
add    %rax,%r14
cmp    $0x2,%rbx
ja     1130 <Fibonacci+0x20>
add    $0x1,%r14
jmp    114f <Fibonacci+0x3f>
xor    %r14d,%r14d
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @Fibonacci(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 0, i64* %2
br label %19
7: ; preds = %1
%8 = load i64, i64* %3
%9 = icmp ule i64 %8, 2
br i1 %9, label %10, label %11
10: ; preds = %7
store i64 1, i64* %2
br label %19
11: ; preds = %7
%12 = load i64, i64* %3
%13 = sub i64 %12, 1
%14 = call i64 @Fibonacci(i64 %13)
%15 = load i64, i64* %3
%16 = sub i64 %15, 2
%17 = call i64 @Fibonacci(i64 %16)
%18 = add nsw i64 %14, %17
store i64 %18, i64* %2
br label %19
19: ; preds = %11, %10, %6
%20 = load i64, i64* %2
ret i64 %20
}

LLVM IR (-O2):
define i64 @Fibonacci(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %15, label %3
3: ; preds = %1
%4 = icmp ult i64 %0, 3
br i1 %4, label %15, label %5
5: ; preds = %3, %5
%6 = phi i64 [ %11, %5 ], [ 0, %3 ]
%7 = phi i64 [ %10, %5 ], [ %0, %3 ]
%8 = add i64 %7, -1
%9 = tail call i64 @Fibonacci(i64 %8)
%10 = add i64 %7, -2
%11 = add nsw i64 %9, %6
%12 = icmp ult i64 %10, 3
br i1 %12, label %13, label %5
13: ; preds = %5
%14 = add i64 %11, 1
br label %15
15: ; preds = %3, %13, %1
%16 = phi i64 [ 0, %1 ], [ %14, %13 ], [ 1, %3 ]
ret i64 %16
}
/* Variables and functions */
double Melder_round_tieDown(double);
double Melder_round_tieUp(double);
double Melder_round_tieAwayFromZero(double x) {
  return x >= 0.0 ? Melder_round_tieUp(x) : Melder_round_tieDown(x);
}


x86 assembly (clang, -O0):
<Melder_round_tieAwayFromZero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1153 <Melder_round_tieAwayFromZero+0x33>
movsd  -0x8(%rbp),%xmm0
call   1040 <Melder_round_tieUp@plt>
movsd  %xmm0,-0x10(%rbp)
jmp    1162 <Melder_round_tieAwayFromZero+0x42>
movsd  -0x8(%rbp),%xmm0
call   1030 <Melder_round_tieDown@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Melder_round_tieAwayFromZero>:
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jae    112f <Melder_round_tieAwayFromZero+0xf>
jmp    1030 <Melder_round_tieDown@plt>
jmp    1040 <Melder_round_tieUp@plt>

LLVM IR (-O0):
define double @Melder_round_tieAwayFromZero(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp oge double %3, 0.000000e+00
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load double, double* %2
%7 = call double @Melder_round_tieUp(double %6)
br label %11
8: ; preds = %1
%9 = load double, double* %2
%10 = call double @Melder_round_tieDown(double %9)
br label %11
11: ; preds = %8, %5
%12 = phi double [ %7, %5 ], [ %10, %8 ]
ret double %12
}

LLVM IR (-O2):
define double @Melder_round_tieAwayFromZero(double %0) {
%2 = fcmp ult double %0, 0.000000e+00
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call double @Melder_round_tieUp(double %0)
br label %7
5: ; preds = %1
%6 = tail call double @Melder_round_tieDown(double %0)
br label %7
7: ; preds = %5, %3
%8 = phi double [ %4, %3 ], [ %6, %5 ]
ret double %8
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int);
void sigsegv_handler(int signum) { _exit(77); }


x86 assembly (clang, -O0):
<sigsegv_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x4d,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<sigsegv_handler>:
push   %rax
mov    $0x4d,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
define void @sigsegv_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @_exit(i32 77)
unreachable
}

LLVM IR (-O2):
define void @sigsegv_handler(i32 %0) {
%2 = tail call i32 @_exit(i32 77)
unreachable
}
double vec3d_dot(const double A[3], const double B[3]) {
  return A[0] * B[0] + A[1] * B[1] + A[2] * B[2];
}


x86 assembly (clang, -O0):
<vec3d_dot>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x10(%rbp),%rax
mulsd  0x8(%rax),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x10(%rbp),%rax
movsd  0x10(%rax),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec3d_dot>:
movsd  0x8(%rdi),%xmm0
mulsd  0x8(%rsi),%xmm0
movsd  (%rdi),%xmm1
mulsd  (%rsi),%xmm1
addsd  %xmm0,%xmm1
movsd  0x10(%rdi),%xmm0
mulsd  0x10(%rsi),%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @vec3d_dot(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = getelementptr inbounds double, double* %5, i64 0
%7 = load double, double* %6
%8 = load double*, double** %4
%9 = getelementptr inbounds double, double* %8, i64 0
%10 = load double, double* %9
%11 = load double*, double** %3
%12 = getelementptr inbounds double, double* %11, i64 1
%13 = load double, double* %12
%14 = load double*, double** %4
%15 = getelementptr inbounds double, double* %14, i64 1
%16 = load double, double* %15
%17 = fmul double %13, %16
%18 = call double @llvm.fmuladd.f64(double %7, double %10, double %17)
%19 = load double*, double** %3
%20 = getelementptr inbounds double, double* %19, i64 2
%21 = load double, double* %20
%22 = load double*, double** %4
%23 = getelementptr inbounds double, double* %22, i64 2
%24 = load double, double* %23
%25 = call double @llvm.fmuladd.f64(double %21, double %24, double %18)
ret double %25
}

LLVM IR (-O2):
define double @vec3d_dot(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %0
%4 = load double, double* %1
%5 = getelementptr inbounds double, double* %0, i64 1
%6 = load double, double* %5
%7 = getelementptr inbounds double, double* %1, i64 1
%8 = load double, double* %7
%9 = fmul double %6, %8
%10 = tail call double @llvm.fmuladd.f64(double %3, double %4, double %9)
%11 = getelementptr inbounds double, double* %0, i64 2
%12 = load double, double* %11
%13 = getelementptr inbounds double, double* %1, i64 2
%14 = load double, double* %13
%15 = tail call double @llvm.fmuladd.f64(double %12, double %14, double %10)
ret double %15
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0xd9() {
  Assert_real((isalpha(217) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              1090, ("isalpha should be 0 for 0xd9"));
}


x86 assembly (clang, -O0):
<t_isalpha_0xd9>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd9,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x442,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0xd9>:
push   %rax
mov    $0xd9,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x442,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xd9\00"
define void @t_isalpha_0xd9() {
%1 = call i64 @isalpha(i32 217)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1090, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xd9\00"
define void @t_isalpha_0xd9() {
%1 = tail call i64 @isalpha(i32 217)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1090, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void INT_Excep_RIIC1_ICTEI1(void) {}


x86 assembly (clang, -O0):
<INT_Excep_RIIC1_ICTEI1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_RIIC1_ICTEI1>:
ret

LLVM IR (-O0):
define void @INT_Excep_RIIC1_ICTEI1() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_RIIC1_ICTEI1() {
ret void
}
/* Type definitions */
struct sockaddr {
  int dummy;
};
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
int ___sane_accept(int, struct sockaddr *, int /*<<< orphan*/ *);
int zunix_accept(int fd) {
  return (___sane_accept(fd, (struct sockaddr *)0, (socklen_t *)0));
}


x86 assembly (clang, -O0):
<zunix_accept>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %eax,%eax
mov    %eax,%edx
mov    %rdx,%rsi
call   1030 <___sane_accept@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zunix_accept>:
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <___sane_accept@plt>

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
define i32 @zunix_accept(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @___sane_accept(i32 %3, %struct.sockaddr* null, i32* null)
ret i32 %4
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
define i32 @zunix_accept(i32 %0) {
%2 = tail call i32 @___sane_accept(i32 %0, %struct.sockaddr* null, i32* null)
ret i32 %2
}
int _ds_pow(int base, unsigned int exp) {
  int result = 1;
  while (exp > 0) {
    if (exp & 1)
      result *= base;
    base *= base;
    exp /= 2;
  }
  return result;
}


x86 assembly (clang, -O0):
<_ds_pow>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jbe    114c <_ds_pow+0x4c>
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1134 <_ds_pow+0x34>
mov    -0x4(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1111 <_ds_pow+0x11>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ds_pow>:
test   %esi,%esi
je     113a <_ds_pow+0x3a>
mov    $0x1,%r8d
mov    $0x1,%eax
mov    %esi,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
test   $0x1,%sil
mov    %edi,%ecx
cmove  %r8d,%ecx
imul   %ecx,%eax
imul   %edi,%edi
shr    %edx
cmp    $0x1,%esi
mov    %edx,%esi
ja     1120 <_ds_pow+0x20>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @_ds_pow(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 1, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %4
%8 = icmp ugt i32 %7, 0
br i1 %8, label %9, label %23
9: ; preds = %6
%10 = load i32, i32* %4
%11 = and i32 %10, 1
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %9
%14 = load i32, i32* %3
%15 = load i32, i32* %5
%16 = mul nsw i32 %15, %14
store i32 %16, i32* %5
br label %17
17: ; preds = %13, %9
%18 = load i32, i32* %3
%19 = load i32, i32* %3
%20 = mul nsw i32 %19, %18
store i32 %20, i32* %3
%21 = load i32, i32* %4
%22 = udiv i32 %21, 2
store i32 %22, i32* %4
br label %6
23: ; preds = %6
%24 = load i32, i32* %5
ret i32 %24
}

LLVM IR (-O2):
define i32 @_ds_pow(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %15, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %11, %4 ], [ 1, %2 ]
%6 = phi i32 [ %13, %4 ], [ %1, %2 ]
%7 = phi i32 [ %12, %4 ], [ %0, %2 ]
%8 = and i32 %6, 1
%9 = icmp eq i32 %8, 0
%10 = select i1 %9, i32 1, i32 %7
%11 = mul nsw i32 %10, %5
%12 = mul nsw i32 %7, %7
%13 = lshr i32 %6, 1
%14 = icmp ult i32 %6, 2
br i1 %14, label %15, label %4
15: ; preds = %4, %2
%16 = phi i32 [ 1, %2 ], [ %11, %4 ]
ret i32 %16
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
scalar_t__ memcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ const *, size_t);
wchar_t *wmemcpy(wchar_t *d, const wchar_t *s, size_t n) {
  assert(d != NULL);
  assert(s != NULL);
  return (wchar_t *)memcpy(d, s, n * sizeof(wchar_t));
}


x86 assembly (clang, -O0):
<wmemcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
shl    $0x2,%rdx
call   1040 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wmemcpy>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%rbx
mov    %rsi,%r14
mov    %rdi,%r15
xor    %edi,%edi
test   %r15,%r15
setne  %dil
call   1030 <assert@plt>
xor    %edi,%edi
test   %r14,%r14
setne  %dil
call   1030 <assert@plt>
shl    $0x2,%rbx
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <memcpy@plt>

LLVM IR (-O0):
define i32* @wmemcpy(i32* %0, i32* %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i64
store i32* %0, i32** %4
store i32* %1, i32** %5
store i64 %2, i64* %6
%7 = load i32*, i32** %4
%8 = icmp ne i32* %7, null
%9 = zext i1 %8 to i32
%10 = call i32 @assert(i32 %9)
%11 = load i32*, i32** %5
%12 = icmp ne i32* %11, null
%13 = zext i1 %12 to i32
%14 = call i32 @assert(i32 %13)
%15 = load i32*, i32** %4
%16 = load i32*, i32** %5
%17 = load i64, i64* %6
%18 = mul i64 %17, 4
%19 = call i64 @memcpy(i32* %15, i32* %16, i64 %18)
%20 = inttoptr i64 %19 to i32*
ret i32* %20
}

LLVM IR (-O2):
define i32* @wmemcpy(i32* %0, i32* %1, i64 %2) {
%4 = icmp ne i32* %0, null
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
%7 = icmp ne i32* %1, null
%8 = zext i1 %7 to i32
%9 = tail call i32 @assert(i32 %8)
%10 = shl i64 %2, 2
%11 = tail call i64 @memcpy(i32* %0, i32* %1, i64 %10)
%12 = inttoptr i64 %11 to i32*
ret i32* %12
}
void ff_hevc_put_hevc_uni_w_epel_h24_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_epel_h24_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_epel_h24_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_epel_h24_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_epel_h24_12_sse4() {
ret void
}
unsigned any_less_than_zero(const float *const __restrict v, const unsigned n) {
  const float *c = v + n;
  while (c-- > v)
    if (*c < -(1e-5f))
      return 1;
  return 0;
}


x86 assembly (clang, -O0):
<any_less_than_zero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
shl    $0x2,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0xfffffffffffffffc,%rcx
mov    %rcx,-0x20(%rbp)
cmp    -0x10(%rbp),%rax
jbe    115c <any_less_than_zero+0x5c>
mov    -0x20(%rbp),%rax
movss  0xebe(%rip),%xmm0
ucomiss (%rax),%xmm0
jbe    1157 <any_less_than_zero+0x57>
movl   $0x1,-0x4(%rbp)
jmp    1163 <any_less_than_zero+0x63>
jmp    111d <any_less_than_zero+0x1d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<any_less_than_zero>:
mov    %esi,%eax
lea    (%rdi,%rax,4),%rax
movss  0xef2(%rip),%xmm0
xchg   %ax,%ax
cmp    %rdi,%rax
jbe    1125 <any_less_than_zero+0x25>
ucomiss -0x4(%rax),%xmm0
lea    -0x4(%rax),%rax
jbe    1110 <any_less_than_zero+0x10>
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @any_less_than_zero(float* noalias %0, i32 %1) {
%3 = alloca i32
%4 = alloca float*
%5 = alloca i32
%6 = alloca float*
store float* %0, float** %4
store i32 %1, i32* %5
%7 = load float*, float** %4
%8 = load i32, i32* %5
%9 = zext i32 %8 to i64
%10 = getelementptr inbounds float, float* %7, i64 %9
store float* %10, float** %6
br label %11
11: ; preds = %21, %2
%12 = load float*, float** %6
%13 = getelementptr inbounds float, float* %12, i32 -1
store float* %13, float** %6
%14 = load float*, float** %4
%15 = icmp ugt float* %12, %14
br i1 %15, label %16, label %22
16: ; preds = %11
%17 = load float*, float** %6
%18 = load float, float* %17
%19 = fcmp olt float %18, 0xBEE4F8B580000000
br i1 %19, label %20, label %21
20: ; preds = %16
store i32 1, i32* %3
br label %23
21: ; preds = %16
br label %11
22: ; preds = %11
store i32 0, i32* %3
br label %23
23: ; preds = %22, %20
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @any_less_than_zero(float* noalias %0, i32 %1) {
%3 = zext i32 %1 to i64
%4 = getelementptr inbounds float, float* %0, i64 %3
br label %5
5: ; preds = %9, %2
%6 = phi float* [ %4, %2 ], [ %7, %9 ]
%7 = getelementptr inbounds float, float* %6, i64 -1
%8 = icmp ugt float* %6, %0
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = load float, float* %7
%11 = fcmp olt float %10, 0xBEE4F8B580000000
br i1 %11, label %12, label %5
12: ; preds = %5, %9
%13 = phi i32 [ 1, %9 ], [ 0, %5 ]
ret i32 %13
}
/* Variables and functions */
void *calloc(size_t, size_t);
int /*<<< orphan*/ heron_setmem(void *, size_t);
void *heron_calloc(size_t num, size_t size) {
  void *p = calloc(num, size);
  heron_setmem(p, num * size);
  return p;
}


x86 assembly (clang, -O0):
<heron_calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <calloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
imul   -0x10(%rbp),%rsi
call   1030 <heron_setmem@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<heron_calloc>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%r14
call   1040 <calloc@plt>
mov    %rax,%r15
imul   %r14,%rbx
mov    %rax,%rdi
mov    %rbx,%rsi
call   1030 <heron_setmem@plt>
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @heron_calloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i8* @calloc(i64 %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = load i64, i64* %3
%11 = load i64, i64* %4
%12 = mul i64 %10, %11
%13 = call i32 @heron_setmem(i8* %9, i64 %12)
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
define i8* @heron_calloc(i64 %0, i64 %1) {
%3 = tail call i8* @calloc(i64 %0, i64 %1)
%4 = mul i64 %1, %0
%5 = tail call i32 @heron_setmem(i8* %3, i64 %4)
ret i8* %3
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int *a6;
};
typedef TYPE_1__ xfrm_address_t;

/* Variables and functions */
unsigned int ntohl(int);
unsigned int __xfrm6_addr_hash(xfrm_address_t *addr) {
  return ntohl(addr->a6[2] ^ addr->a6[3]);
}


x86 assembly (clang, -O0):
<__xfrm6_addr_hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    0x8(%rax),%edi
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
xor    0xc(%rax),%edi
call   1030 <ntohl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__xfrm6_addr_hash>:
mov    (%rdi),%rax
mov    0xc(%rax),%edi
xor    0x8(%rax),%edi
jmp    1030 <ntohl@plt>

LLVM IR (-O0):
%struct.TYPE_3__ = type { i32* }
define i32 @__xfrm6_addr_hash(%struct.TYPE_3__* %0) {
%2 = alloca %struct.TYPE_3__*
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %2
%3 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2
%4 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %3, i32 0, i32 0
%5 = load i32*, i32** %4
%6 = getelementptr inbounds i32, i32* %5, i64 2
%7 = load i32, i32* %6
%8 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
%10 = load i32*, i32** %9
%11 = getelementptr inbounds i32, i32* %10, i64 3
%12 = load i32, i32* %11
%13 = xor i32 %7, %12
%14 = call i32 @ntohl(i32 %13)
ret i32 %14
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i32* }
define i32 @__xfrm6_addr_hash(%struct.TYPE_3__* nocapture %0) {
%2 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i64 0, i32 0
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 2
%5 = load i32, i32* %4
%6 = getelementptr inbounds i32, i32* %3, i64 3
%7 = load i32, i32* %6
%8 = xor i32 %7, %5
%9 = tail call i32 @ntohl(i32 %8)
ret i32 %9
}
void g_DUMMY_popup_replace_item(int cont_id, int item_id, int pos,
                                char *label) {
  cont_id = cont_id;
  item_id = item_id;
  pos = pos;
  label = label;
}


x86 assembly (clang, -O0):
<g_DUMMY_popup_replace_item>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_DUMMY_popup_replace_item>:
ret

LLVM IR (-O0):
define void @g_DUMMY_popup_replace_item(i32 %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%9 = load i32, i32* %5
store i32 %9, i32* %5
%10 = load i32, i32* %6
store i32 %10, i32* %6
%11 = load i32, i32* %7
store i32 %11, i32* %7
%12 = load i8*, i8** %8
store i8* %12, i8** %8
ret void
}

LLVM IR (-O2):
define void @g_DUMMY_popup_replace_item(i32 %0, i32 %1, i32 %2, i8* nocapture %3) {
ret void
}
void make16bit(unsigned char *p, unsigned short i) {
  p[1] = i;
  p[0] = i >> 8;
}


x86 assembly (clang, -O0):
<make16bit>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0xa(%rbp),%ax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1(%rax)
movzwl -0xa(%rbp),%eax
sar    $0x8,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<make16bit>:
rol    $0x8,%si
mov    %si,(%rdi)
ret

LLVM IR (-O0):
define void @make16bit(i8* %0, i16 zeroext %1) {
%3 = alloca i8*
%4 = alloca i16
store i8* %0, i8** %3
store i16 %1, i16* %4
%5 = load i16, i16* %4
%6 = trunc i16 %5 to i8
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i64 1
store i8 %6, i8* %8
%9 = load i16, i16* %4
%10 = zext i16 %9 to i32
%11 = ashr i32 %10, 8
%12 = trunc i32 %11 to i8
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i64 0
store i8 %12, i8* %14
ret void
}

LLVM IR (-O2):
define void @make16bit(i8* nocapture writeonly %0, i16 zeroext %1) {
%3 = trunc i16 %1 to i8
%4 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %3, i8* %4
%5 = lshr i16 %1, 8
%6 = trunc i16 %5 to i8
store i8 %6, i8* %0
ret void
}
/* Variables and functions */
int _dfix(int /*<<< orphan*/);
int /*<<< orphan*/ _f2d(int);
int _ffix(int a) { return _dfix(_f2d(a)); }


x86 assembly (clang, -O0):
<_ffix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <_f2d@plt>
mov    %eax,%edi
call   1030 <_dfix@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ffix>:
push   %rax
call   1040 <_f2d@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <_dfix@plt>

LLVM IR (-O0):
define i32 @_ffix(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_f2d(i32 %3)
%5 = call i32 @_dfix(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @_ffix(i32 %0) {
%2 = tail call i32 @_f2d(i32 %0)
%3 = tail call i32 @_dfix(i32 %2)
ret i32 %3
}
unsigned mult(unsigned a, unsigned b) {
  unsigned s = 0;
  for (int i = 0; i < a; ++i) {
    s += b;
  }
  return s;
}


x86 assembly (clang, -O0):
<mult>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x4(%rbp),%eax
jae    113b <mult+0x3b>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1118 <mult+0x18>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mult>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @mult(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %15, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %3
%10 = icmp ult i32 %8, %9
br i1 %10, label %11, label %18
11: ; preds = %7
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = add i32 %13, %12
store i32 %14, i32* %5
br label %15
15: ; preds = %11
%16 = load i32, i32* %6
%17 = add nsw i32 %16, 1
store i32 %17, i32* %6
br label %7
18: ; preds = %7
%19 = load i32, i32* %5
ret i32 %19
}

LLVM IR (-O2):
define i32 @mult(i32 %0, i32 %1) {
%3 = mul i32 %1, %0
ret i32 %3
}
void gapped_extend_zero_stats(void) {
  ;
  ;
}


x86 assembly (clang, -O0):
<gapped_extend_zero_stats>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gapped_extend_zero_stats>:
ret

LLVM IR (-O0):
define void @gapped_extend_zero_stats() {
ret void
}

LLVM IR (-O2):
define void @gapped_extend_zero_stats() {
ret void
}
int main() {
  int i = 1, j = 6, k, l = 0;
  k = ((i + j && l) - j * 2 % j) || i ? j < j % i + 1 : j - i * -1;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x6,-0xc(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%ecx
add    -0xc(%rbp),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x15(%rbp)
je     113e <main+0x3e>
cmpl   $0x0,-0x14(%rbp)
setne  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
cltd
idivl  -0xc(%rbp)
mov    -0x1c(%rbp),%eax
sub    %edx,%eax
cmp    $0x0,%eax
jne    116b <main+0x6b>
cmpl   $0x0,-0x8(%rbp)
je     1190 <main+0x90>
mov    -0xc(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0xc(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    -0x24(%rbp),%eax
add    $0x1,%edx
cmp    %edx,%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x20(%rbp)
jmp    119c <main+0x9c>
mov    -0xc(%rbp),%eax
imul   $0xffffffff,-0x8(%rbp),%ecx
sub    %ecx,%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
mov    %eax,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
store i32 6, i32* %3
store i32 0, i32* %5
%6 = load i32, i32* %2
%7 = load i32, i32* %3
%8 = add nsw i32 %6, %7
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %0
%11 = load i32, i32* %5
%12 = icmp ne i32 %11, 0
br label %13
13: ; preds = %10, %0
%14 = phi i1 [ false, %0 ], [ %12, %10 ]
%15 = zext i1 %14 to i32
%16 = load i32, i32* %3
%17 = mul nsw i32 %16, 2
%18 = load i32, i32* %3
%19 = srem i32 %17, %18
%20 = sub nsw i32 %15, %19
%21 = icmp ne i32 %20, 0
br i1 %21, label %25, label %22
22: ; preds = %13
%23 = load i32, i32* %2
%24 = icmp ne i32 %23, 0
br i1 %24, label %25, label %33
25: ; preds = %22, %13
%26 = load i32, i32* %3
%27 = load i32, i32* %3
%28 = load i32, i32* %2
%29 = srem i32 %27, %28
%30 = add nsw i32 %29, 1
%31 = icmp slt i32 %26, %30
%32 = zext i1 %31 to i32
br label %38
33: ; preds = %22
%34 = load i32, i32* %3
%35 = load i32, i32* %2
%36 = mul nsw i32 %35, -1
%37 = sub nsw i32 %34, %36
br label %38
38: ; preds = %33, %25
%39 = phi i32 [ %32, %25 ], [ %37, %33 ]
store i32 %39, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
scalar_t__ memcmp(char *, char *, size_t);
__attribute__((hot)) int sr_cmpstring_prefix(char *prefix, size_t prefixsz,
                                             char *key, size_t keysz,
                                             void *arg
                                             __attribute__((unused))) {
  if (keysz < prefixsz)
    return 0;
  return (memcmp(prefix, key, prefixsz) == 0) ? 1 : 0;
}


x86 assembly (clang, -O0):
<sr_cmpstring_prefix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    %r8,-0x30(%rbp)
mov    -0x28(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1146 <sr_cmpstring_prefix+0x36>
movl   $0x0,-0x4(%rbp)
jmp    116b <sr_cmpstring_prefix+0x5b>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcmp@plt>
mov    %rax,%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmove  %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sr_cmpstring_prefix>:
xor    %eax,%eax
cmp    %rsi,%rcx
jb     1075 <sr_cmpstring_prefix+0x25>
push   %rax
mov    %rsi,%r8
mov    %rdx,%rsi
mov    %r8,%rdx
call   1030 <memcmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
add    $0x8,%rsp
ret
cs nopw 0x0(%rax,%rax,1)

LLVM IR (-O0):
define i32 @sr_cmpstring_prefix(i8* %0, i64 %1, i8* %2, i64 %3, i8* %4) {
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i8*
%10 = alloca i64
%11 = alloca i8*
store i8* %0, i8** %7
store i64 %1, i64* %8
store i8* %2, i8** %9
store i64 %3, i64* %10
store i8* %4, i8** %11
%12 = load i64, i64* %10
%13 = load i64, i64* %8
%14 = icmp ult i64 %12, %13
br i1 %14, label %15, label %16
15: ; preds = %5
store i32 0, i32* %6
br label %24
16: ; preds = %5
%17 = load i8*, i8** %7
%18 = load i8*, i8** %9
%19 = load i64, i64* %8
%20 = call i64 @memcmp(i8* %17, i8* %18, i64 %19)
%21 = icmp eq i64 %20, 0
%22 = zext i1 %21 to i64
%23 = select i1 %21, i32 1, i32 0
store i32 %23, i32* %6
br label %24
24: ; preds = %16, %15
%25 = load i32, i32* %6
ret i32 %25
}

LLVM IR (-O2):
define i32 @sr_cmpstring_prefix(i8* %0, i64 %1, i8* %2, i64 %3, i8* nocapture readnone %4) {
%6 = icmp ult i64 %3, %1
br i1 %6, label %11, label %7
7: ; preds = %5
%8 = tail call i64 @memcmp(i8* %0, i8* %2, i64 %1)
%9 = icmp eq i64 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %5, %7
%12 = phi i32 [ %10, %7 ], [ 0, %5 ]
ret i32 %12
}
void free_tablefiles(char **tables) {
  char **table;
  if (!tables)
    return;
  for (table = tables; *table; table++)
    free(*table);
  free(tables);
}


x86 assembly (clang, -O0):
<free_tablefiles>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    112c <free_tablefiles+0x1c>
jmp    1168 <free_tablefiles+0x58>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
je     115f <free_tablefiles+0x4f>
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x10(%rbp)
jmp    1134 <free_tablefiles+0x24>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_tablefiles>:
test   %rdi,%rdi
je     1150 <free_tablefiles+0x40>
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1141 <free_tablefiles+0x31>
lea    0x8(%r14),%rbx
nopl   0x0(%rax,%rax,1)
call   1030 <free@plt>
mov    (%rbx),%rdi
add    $0x8,%rbx
test   %rdi,%rdi
jne    1130 <free_tablefiles+0x20>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @free_tablefiles(i8** %0) {
%2 = alloca i8**
%3 = alloca i8**
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = icmp ne i8** %4, null
br i1 %5, label %7, label %6
6: ; preds = %1
br label %22
7: ; preds = %1
%8 = load i8**, i8*** %2
store i8** %8, i8*** %3
br label %9
9: ; preds = %16, %7
%10 = load i8**, i8*** %3
%11 = load i8*, i8** %10
%12 = icmp ne i8* %11, null
br i1 %12, label %13, label %19
13: ; preds = %9
%14 = load i8**, i8*** %3
%15 = load i8*, i8** %14
br label %16
16: ; preds = %13
%17 = load i8**, i8*** %3
%18 = getelementptr inbounds i8*, i8** %17, i32 1
store i8** %18, i8*** %3
br label %9
19: ; preds = %9
%20 = load i8**, i8*** %2
%21 = bitcast i8** %20 to i8*
br label %22
22: ; preds = %19, %6
ret void
}

LLVM IR (-O2):
define void @free_tablefiles(i8** %0) {
%2 = icmp eq i8** %0, null
br i1 %2, label %14, label %3
3: ; preds = %1
%4 = load i8*, i8** %0
%5 = icmp eq i8* %4, null
br i1 %5, label %12, label %6
6: ; preds = %3, %6
%7 = phi i8* [ %10, %6 ], [ %4, %3 ]
%8 = phi i8** [ %9, %6 ], [ %0, %3 ]
tail call void @free(i8* %7)
%9 = getelementptr inbounds i8*, i8** %8, i64 1
%10 = load i8*, i8** %9
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %6
12: ; preds = %6, %3
%13 = bitcast i8** %0 to i8*
tail call void @free(i8* %13)
br label %14
14: ; preds = %1, %12
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int function_two(int a, int b) {
  printf("This is function 2\n");
  return a + b;
}


x86 assembly (clang, -O0):
<function_two>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<function_two>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
lea    0xee2(%rip),%rdi
call   1030 <puts@plt>
add    %ebx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [20 x i8] c"This is function 2\0A\00"
define i32 @function_two(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = add nsw i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
@str = [19 x i8] c"This is function 2\00"
define i32 @function_two(i32 %0, i32 %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
%4 = add nsw i32 %1, %0
ret i32 %4
}
int c092(void) { return 0; }


x86 assembly (clang, -O0):
<c092>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c092>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @c092() {
ret i32 0
}

LLVM IR (-O2):
define i32 @c092() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ test1();
int /*<<< orphan*/ test2();
int /*<<< orphan*/ test3();
int main() {
  test1();
  test2();
  test3();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <test1@plt>
mov    $0x0,%al
call   1050 <test2@plt>
mov    $0x0,%al
call   1030 <test3@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <test1@plt>
xor    %eax,%eax
call   1050 <test2@plt>
xor    %eax,%eax
call   1030 <test3@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test1()
%3 = call i32 (...) @test2()
%4 = call i32 (...) @test3()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test1()
%2 = tail call i32 (...) @test2()
%3 = tail call i32 (...) @test3()
ret i32 0
}
int test_imm_37uint16_reg(unsigned short val) {
  return ((val) & (0x37 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_37uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x37,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_37uint16_reg>:
test   $0x37,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_37uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 55
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_37uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 55
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
void cleanScreen(void) { system("cls"); }


x86 assembly (clang, -O0):
<cleanScreen>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <system@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cleanScreen>:
lea    0xee9(%rip),%rdi
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"cls\00"
define void @cleanScreen() {
%1 = call i32 @system(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"cls\00"
define void @cleanScreen() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}
void destroy_half(int *i) {}


x86 assembly (clang, -O0):
<destroy_half>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<destroy_half>:
ret

LLVM IR (-O0):
define void @destroy_half(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @destroy_half(i32* nocapture %0) {
ret void
}