xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ check_write(unsigned short, int /*<<< orphan*/, char *);
void outsb(unsigned short int port, const void *addr, unsigned long int count) {
  for (unsigned long int i = 0; i < count; i++) {
    check_write(port + i, 0, "insb");
  }
}


x86 assembly (clang, -O0):
<outsb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1167 <outsb+0x57>
movzwl -0x2(%rbp),%eax
add    -0x20(%rbp),%rax
xor    %esi,%esi
lea    0xeb2(%rip),%rdx
movzwl %ax,%edi
call   1030 <check_write@plt>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    112f <outsb+0x1f>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outsb>:
push   %rbp
push   %r14
push   %rbx
test   %rdx,%rdx
je     1148 <outsb+0x38>
mov    %rdx,%rbx
mov    %edi,%ebp
lea    0xedb(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nop
movzwl %bp,%ebp
mov    %ebp,%edi
xor    %esi,%esi
mov    %r14,%rdx
call   1030 <check_write@plt>
add    $0x1,%ebp
add    $0xffffffffffffffff,%rbx
jne    1130 <outsb+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [5 x i8] c"insb\00"
define void @outsb(i16 zeroext %0, i8* %1, i64 %2) {
%4 = alloca i16
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i16 %0, i16* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
store i64 0, i64* %7
br label %8
8: ; preds = %19, %3
%9 = load i64, i64* %7
%10 = load i64, i64* %6
%11 = icmp ult i64 %9, %10
br i1 %11, label %12, label %22
12: ; preds = %8
%13 = load i16, i16* %4
%14 = zext i16 %13 to i64
%15 = load i64, i64* %7
%16 = add i64 %14, %15
%17 = trunc i64 %16 to i16
%18 = call i32 @check_write(i16 zeroext %17, i32 0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %19
19: ; preds = %12
%20 = load i64, i64* %7
%21 = add i64 %20, 1
store i64 %21, i64* %7
br label %8
22: ; preds = %8
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"insb\00"
define void @outsb(i16 zeroext %0, i8* nocapture readnone %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %5, label %6
5: ; preds = %6, %3
ret void
6: ; preds = %3, %6
%7 = phi i64 [ %11, %6 ], [ 0, %3 ]
%8 = trunc i64 %7 to i16
%9 = add i16 %8, %0
%10 = tail call i32 @check_write(i16 zeroext %9, i32 0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%11 = add nuw i64 %7, 1
%12 = icmp eq i64 %11, %2
br i1 %12, label %5, label %6
}
unsigned int imul_lo_op_16(short a, short b) { return a * b; }


x86 assembly (clang, -O0):
<imul_lo_op_16>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movswl -0x2(%rbp),%eax
movswl -0x4(%rbp),%ecx
imul   %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<imul_lo_op_16>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @imul_lo_op_16(i16 signext %0, i16 signext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = sext i16 %5 to i32
%7 = load i16, i16* %4
%8 = sext i16 %7 to i32
%9 = mul nsw i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @imul_lo_op_16(i16 signext %0, i16 signext %1) {
%3 = sext i16 %0 to i32
%4 = sext i16 %1 to i32
%5 = mul nsw i32 %4, %3
ret i32 %5
}
double f_seal_ClampDegrees(double p) {
  while (p < 0)
    p += 360;
  while (p >= 360)
    p -= 360;
  return p;
}


x86 assembly (clang, -O0):
<f_seal_ClampDegrees>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    112e <f_seal_ClampDegrees+0x2e>
movsd  0xee1(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1109 <f_seal_ClampDegrees+0x9>
jmp    1133 <f_seal_ClampDegrees+0x33>
movsd  -0x8(%rbp),%xmm0
movsd  0xec0(%rip),%xmm1
ucomisd %xmm1,%xmm0
jb     1165 <f_seal_ClampDegrees+0x65>
movsd  -0x8(%rbp),%xmm0
movsd  0xea9(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1133 <f_seal_ClampDegrees+0x33>
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_seal_ClampDegrees>:
xorpd  %xmm1,%xmm1
ucomisd %xmm0,%xmm1
jbe    112a <f_seal_ClampDegrees+0x2a>
movsd  0xeee(%rip),%xmm2
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
addsd  %xmm2,%xmm0
ucomisd %xmm0,%xmm1
ja     1120 <f_seal_ClampDegrees+0x20>
ucomisd 0xece(%rip),%xmm0
jb     115a <f_seal_ClampDegrees+0x5a>
movsd  0xecc(%rip),%xmm1
movsd  0xebc(%rip),%xmm2
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
addsd  %xmm1,%xmm0
ucomisd %xmm2,%xmm0
jae    1150 <f_seal_ClampDegrees+0x50>
ret

LLVM IR (-O0):
define double @f_seal_ClampDegrees(double %0) {
%2 = alloca double
store double %0, double* %2
br label %3
3: ; preds = %6, %1
%4 = load double, double* %2
%5 = fcmp olt double %4, 0.000000e+00
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load double, double* %2
%8 = fadd double %7, 3.600000e+02
store double %8, double* %2
br label %3
9: ; preds = %3
br label %10
10: ; preds = %13, %9
%11 = load double, double* %2
%12 = fcmp oge double %11, 3.600000e+02
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load double, double* %2
%15 = fsub double %14, 3.600000e+02
store double %15, double* %2
br label %10
16: ; preds = %10
%17 = load double, double* %2
ret double %17
}

LLVM IR (-O2):
define double @f_seal_ClampDegrees(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
br i1 %2, label %6, label %3
3: ; preds = %6, %1
%4 = phi double [ %0, %1 ], [ %8, %6 ]
%5 = fcmp ult double %4, 3.600000e+02
br i1 %5, label %14, label %10
6: ; preds = %1, %6
%7 = phi double [ %8, %6 ], [ %0, %1 ]
%8 = fadd double %7, 3.600000e+02
%9 = fcmp olt double %8, 0.000000e+00
br i1 %9, label %6, label %3
10: ; preds = %3, %10
%11 = phi double [ %12, %10 ], [ %4, %3 ]
%12 = fadd double %11, -3.600000e+02
%13 = fcmp ult double %12, 3.600000e+02
br i1 %13, label %14, label %10
14: ; preds = %10, %3
%15 = phi double [ %4, %3 ], [ %12, %10 ]
ret double %15
}
/* Variables and functions */
int /*<<< orphan*/ s2sch(float);
void s2sch_(float *size) { s2sch(*size); }


x86 assembly (clang, -O0):
<s2sch_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
call   1030 <s2sch@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s2sch_>:
movss  (%rdi),%xmm0
jmp    1030 <s2sch@plt>

LLVM IR (-O0):
define void @s2sch_(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = load float, float* %3
%5 = call i32 @s2sch(float %4)
ret void
}

LLVM IR (-O2):
define void @s2sch_(float* nocapture %0) {
%2 = load float, float* %0
%3 = tail call i32 @s2sch(float %2)
ret void
}
main() {}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, char const *);
int /*<<< orphan*/ stderr;
void usage(const char *cmd) {
  fprintf(stderr, "%s: %s [-h] [-V] [-q] [-r] [-s] task_name\n", ((("Usage"))),
          cmd);
  exit(-1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rcx
lea    0xec0(%rip),%rsi
lea    0xee4(%rip),%rdx
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rcx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
lea    0xef0(%rip),%rdx
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [43 x i8] c"%s: %s [-h] [-V] [-q] [-r] [-s] task_name\0A\00"
@.str.1 = [6 x i8] c"Usage\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [43 x i8] c"%s: %s [-h] [-V] [-q] [-r] [-s] task_name\0A\00"
@.str.1 = [6 x i8] c"Usage\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 -1)
unreachable
}
void btrfs_set_buffer_lockdep_class(struct extent_buffer *eb, int level) {}


x86 assembly (clang, -O0):
<btrfs_set_buffer_lockdep_class>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<btrfs_set_buffer_lockdep_class>:
ret

LLVM IR (-O0):
%struct.extent_buffer = type opaque
define void @btrfs_set_buffer_lockdep_class(%struct.extent_buffer* %0, i32 %1) {
%3 = alloca %struct.extent_buffer*
%4 = alloca i32
store %struct.extent_buffer* %0, %struct.extent_buffer** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.extent_buffer = type opaque
define void @btrfs_set_buffer_lockdep_class(%struct.extent_buffer* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __llvm_profile_initialize_file();
int /*<<< orphan*/ __llvm_profile_write_file();
int foo(int /*<<< orphan*/);
int main(int argc, const char *argv[]) {
  if (argc > 1)
    return 1;
  __llvm_profile_initialize_file();
  __llvm_profile_write_file();
  return foo(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    115c <main+0x2c>
movl   $0x1,-0x4(%rbp)
jmp    1174 <main+0x44>
mov    $0x0,%al
call   1030 <__llvm_profile_initialize_file@plt>
mov    $0x0,%al
call   1050 <__llvm_profile_write_file@plt>
xor    %edi,%edi
call   1040 <foo@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
cmp    $0x1,%edi
jle    113b <main+0xb>
mov    $0x1,%eax
ret
push   %rax
xor    %eax,%eax
call   1030 <__llvm_profile_initialize_file@plt>
xor    %eax,%eax
call   1050 <__llvm_profile_write_file@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <foo@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 1, i32* %3
br label %13
9: ; preds = %2
%10 = call i32 (...) @__llvm_profile_initialize_file()
%11 = call i32 (...) @__llvm_profile_write_file()
%12 = call i32 @foo(i32 0)
store i32 %12, i32* %3
br label %13
13: ; preds = %9, %8
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = tail call i32 (...) @__llvm_profile_initialize_file()
%6 = tail call i32 (...) @__llvm_profile_write_file()
%7 = tail call i32 @foo(i32 0)
br label %8
8: ; preds = %2, %4
%9 = phi i32 [ %7, %4 ], [ 1, %2 ]
ret i32 %9
}
__attribute__((always_)) void native_set_iopl_mask(unsigned mask) {}


x86 assembly (clang, -O0):
<native_set_iopl_mask>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<native_set_iopl_mask>:
ret

LLVM IR (-O0):
define void @native_set_iopl_mask(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @native_set_iopl_mask(i32 %0) {
ret void
}
AR0A1(r0, r1, x0, x1, p0, p1) unsigned char r0, r1;
unsigned char *p0, *p1;
{
  if ((p0[10000000]) <= (*((unsigned char *)11111111)))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<AR0A1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %dil,%sil
mov    %sil,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x18(%rbp),%rax
movzbl 0x989680(%rax),%eax
mov    $0xa98ac7,%ecx
movzbl (%rcx),%ecx
cmp    %ecx,%eax
jg     1145 <AR0A1+0x45>
movl   $0x1,-0x4(%rbp)
jmp    114c <AR0A1+0x4c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<AR0A1>:
mov    0x989680(%r8),%cl
xor    %eax,%eax
cmp    0xa98ac7,%cl
setbe  %al
ret

LLVM IR (-O0):
define i32 @AR0A1(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4, i8* %5) {
%7 = alloca i32
%8 = alloca i8
%9 = alloca i8
%10 = alloca i32
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i8*
%14 = trunc i32 %0 to i8
%15 = trunc i32 %1 to i8
store i8 %14, i8* %8
store i8 %15, i8* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i8* %4, i8** %12
store i8* %5, i8** %13
%16 = load i8*, i8** %12
%17 = getelementptr inbounds i8, i8* %16, i64 10000000
%18 = load i8, i8* %17
%19 = zext i8 %18 to i32
%20 = load i8, i8* inttoptr (i64 11111111 to i8*)
%21 = zext i8 %20 to i32
%22 = icmp sle i32 %19, %21
br i1 %22, label %23, label %24
23: ; preds = %6
store i32 1, i32* %7
br label %25
24: ; preds = %6
store i32 0, i32* %7
br label %25
25: ; preds = %24, %23
%26 = load i32, i32* %7
ret i32 %26
}

LLVM IR (-O2):
define i32 @AR0A1(i32 %0, i32 %1, i32 %2, i32 %3, i8* nocapture %4, i8* nocapture readnone %5) {
%7 = getelementptr inbounds i8, i8* %4, i64 10000000
%8 = load i8, i8* %7
%9 = load i8, i8* inttoptr (i64 11111111 to i8*)
%10 = icmp ule i8 %8, %9
%11 = zext i1 %10 to i32
ret i32 %11
}
int multiset_list_size() { return sizeof(void *); }


x86 assembly (clang, -O0):
<multiset_list_size>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<multiset_list_size>:
mov    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @multiset_list_size() {
ret i32 8
}

LLVM IR (-O2):
define i32 @multiset_list_size() {
ret i32 8
}
int test_imm_86int8_reg(signed char val) {
  return ((val) & (0x86 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_86int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0x86,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_86int8_reg>:
test   $0x86,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_86int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 134
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_86int8_reg(i8 signext %0) {
%2 = and i8 %0, -122
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int sg_get_command_size(unsigned char opcode) {
  switch ((opcode >> 5) & 0x7) {
  case 0:
    return 6;
  case 1:
  case 2:
  case 6:
  case 7:
    return 10;
  case 3:
  case 5:
    return 12;
    break;
  case 4:
    return 16;
  default:
    return 10;
  }
}


x86 assembly (clang, -O0):
<sg_get_command_size>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
shr    $0x5,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x7,%eax
ja     1164 <sg_get_command_size+0x64>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x6,-0x4(%rbp)
jmp    116b <sg_get_command_size+0x6b>
movl   $0xa,-0x4(%rbp)
jmp    116b <sg_get_command_size+0x6b>
movl   $0xc,-0x4(%rbp)
jmp    116b <sg_get_command_size+0x6b>
movl   $0x10,-0x4(%rbp)
jmp    116b <sg_get_command_size+0x6b>
movl   $0xa,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sg_get_command_size>:
shr    $0x5,%dil
movzbl %dil,%eax
lea    0xef1(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @sg_get_command_size(i8 zeroext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = ashr i32 %5, 5
%7 = and i32 %6, 7
switch i32 %7, label %12 [
i32 0, label %8
i32 1, label %9
i32 2, label %9
i32 6, label %9
i32 7, label %9
i32 3, label %10
i32 5, label %10
i32 4, label %11
]
8: ; preds = %1
store i32 6, i32* %2
br label %13
9: ; preds = %1, %1, %1, %1
store i32 10, i32* %2
br label %13
10: ; preds = %1, %1
store i32 12, i32* %2
br label %13
11: ; preds = %1
store i32 16, i32* %2
br label %13
12: ; preds = %1
store i32 10, i32* %2
br label %13
13: ; preds = %12, %11, %10, %9, %8
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
@switch.table.sg_get_command_size = [8 x i32] [i32 6, i32 10, i32 10, i32 12, i32 16, i32 12, i32 10, i32 10]
define i32 @sg_get_command_size(i8 zeroext %0) {
%2 = lshr i8 %0, 5
%3 = zext i8 %2 to i64
%4 = getelementptr inbounds [8 x i32], [8 x i32]* @switch.table.sg_get_command_size, i64 0, i64 %3
%5 = load i32, i32* %4
ret i32 %5
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t highest_set_bit(uint32_t val) {
  int counter = 0;
  while (val >>= 1)
    counter++;
  return counter;
}


x86 assembly (clang, -O0):
<highest_set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
je     112e <highest_set_bit+0x2e>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <highest_set_bit+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<highest_set_bit>:
xor    %eax,%eax
cmp    $0x2,%edi
jb     111c <highest_set_bit+0x1c>
xor    %eax,%eax
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
sar    %ecx
add    $0x1,%eax
cmp    $0x3,%edi
mov    %ecx,%edi
ja     1110 <highest_set_bit+0x10>
ret

LLVM IR (-O0):
define i32 @highest_set_bit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %2
%6 = ashr i32 %5, 1
store i32 %6, i32* %2
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
br label %4
11: ; preds = %4
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @highest_set_bit(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = ashr i32 %5, 1
%7 = add nuw nsw i32 %4, 1
%8 = icmp ult i32 %5, 4
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %10
}
void PKCS7_ENCRYPT_new(void) {}


x86 assembly (clang, -O0):
<PKCS7_ENCRYPT_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PKCS7_ENCRYPT_new>:
ret

LLVM IR (-O0):
define void @PKCS7_ENCRYPT_new() {
ret void
}

LLVM IR (-O2):
define void @PKCS7_ENCRYPT_new() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ srandom(unsigned int);
void platform_random_seed(int seed) { srandom((unsigned int)seed); }


x86 assembly (clang, -O0):
<platform_random_seed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <srandom@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<platform_random_seed>:
jmp    1030 <srandom@plt>

LLVM IR (-O0):
define void @platform_random_seed(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @srandom(i32 %3)
ret void
}

LLVM IR (-O2):
define void @platform_random_seed(i32 %0) {
%2 = tail call i32 @srandom(i32 %0)
ret void
}
void outb(short int port, char val) {
  __asm volatile("outb %0, %1" : : "a"(val), "d"(port));
}


x86 assembly (clang, -O0):
<outb>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    -0x2(%rbp),%dx
out    %al,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outb>:
mov    %esi,%eax
mov    %edi,%edx
out    %al,(%dx)
ret

LLVM IR (-O0):
define void @outb(i16 signext %0, i8 signext %1) {
%3 = alloca i16
%4 = alloca i8
store i16 %0, i16* %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i16, i16* %3
ret void
}

LLVM IR (-O2):
define void @outb(i16 signext %0, i8 signext %1) {
tail call void asm sideeffect "outb $0, $1", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i8 %1, i16 %0)
ret void
}
void succeed(void) {
  assert(1);
  assert('a');
  assert("hello");
  assert(1.0);
}


x86 assembly (clang, -O0):
<succeed>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
mov    $0x0,%al
call   1030 <assert@plt>
mov    $0x61,%edi
mov    $0x0,%al
call   1030 <assert@plt>
lea    0xed5(%rip),%rdi
mov    $0x0,%al
call   1030 <assert@plt>
movsd  0xebe(%rip),%xmm0
mov    $0x1,%al
call   1030 <assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<succeed>:
push   %rax
mov    $0x1,%edi
xor    %eax,%eax
call   1030 <assert@plt>
mov    $0x61,%edi
xor    %eax,%eax
call   1030 <assert@plt>
lea    0xed8(%rip),%rdi
xor    %eax,%eax
call   1030 <assert@plt>
movsd  0xec1(%rip),%xmm0
mov    $0x1,%al
pop    %rcx
jmp    1030 <assert@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"hello\00"
define void @succeed() {
%1 = call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 1)
%2 = call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 97)
%3 = call i32 (i8*, ...) bitcast (i32 (...)* @assert to i32 (i8*, ...)*)(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%4 = call i32 (double, ...) bitcast (i32 (...)* @assert to i32 (double, ...)*)(double 1.000000e+00)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"hello\00"
define void @succeed() {
%1 = tail call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 1)
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 97)
%3 = tail call i32 (i8*, ...) bitcast (i32 (...)* @assert to i32 (i8*, ...)*)(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 (double, ...) bitcast (i32 (...)* @assert to i32 (double, ...)*)(double 1.000000e+00)
ret void
}
void test8(char *c) {}


x86 assembly (clang, -O0):
<test8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test8>:
ret

LLVM IR (-O0):
define void @test8(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @test8(i8* nocapture %0) {
ret void
}
int plus1_mod(int i, int m) { return (i + 1) % m; }


x86 assembly (clang, -O0):
<plus1_mod>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<plus1_mod>:
lea    0x1(%rdi),%eax
cltd
idiv   %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @plus1_mod(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add nsw i32 %5, 1
%7 = load i32, i32* %4
%8 = srem i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @plus1_mod(i32 %0, i32 %1) {
%3 = add nsw i32 %0, 1
%4 = srem i32 %3, %1
ret i32 %4
}
int lm_is_running_sanlock(void) { return 0; }


x86 assembly (clang, -O0):
<lm_is_running_sanlock>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lm_is_running_sanlock>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @lm_is_running_sanlock() {
ret i32 0
}

LLVM IR (-O2):
define i32 @lm_is_running_sanlock() {
ret i32 0
}
void primFinalise(void *f, void *a) { ((void (*)(void *))f)(a); }


x86 assembly (clang, -O0):
<primFinalise>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rdi
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<primFinalise>:
mov    %rdi,%rax
mov    %rsi,%rdi
jmp    *%rax

LLVM IR (-O0):
define void @primFinalise(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to void (i8*)*
%7 = load i8*, i8** %4
ret void
}

LLVM IR (-O2):
define void @primFinalise(i8* nocapture %0, i8* %1) {
%3 = bitcast i8* %0 to void (i8*)*
tail call void %3(i8* %1)
ret void
}
int __signbitf(float x) { return __builtin_signbitf(x); }


x86 assembly (clang, -O0):
<__signbitf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movd   %xmm0,%eax
cmp    $0x0,%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__signbitf>:
movmskps %xmm0,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @__signbitf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = bitcast float %3 to i32
%5 = icmp slt i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @__signbitf(float %0) {
%2 = bitcast float %0 to i32
%3 = lshr i32 %2, 31
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int total_peach(int);
void main() {
  int peach = 0;
  int day = 0;
  peach = total_peach(1);
  printf("Total peach is:%d\n", peach);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    $0x1,%edi
call   1040 <total_peach@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1040 <total_peach@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"Total peach is:%d\0A\00"
define void @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = call i32 @total_peach(i32 1)
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"Total peach is:%d\0A\00"
define void @main() {
%1 = tail call i32 @total_peach(i32 1)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
/* Variables and functions */
scalar_t__ WiFiNetworkLeave();
int /*<<< orphan*/ printf(char *);
int wifi_leave(void) {
  int result = -1;
  printf("Leaving selected network...\n");
  if (WiFiNetworkLeave()) {
    printf("WiFiNetworkLeave failed!\n");
  } else {
    result = 0;
  }
  return result;
}


x86 assembly (clang, -O0):
<wifi_leave>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xffffffff,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <WiFiNetworkLeave@plt>
cmp    $0x0,%rax
je     115d <wifi_leave+0x3d>
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
jmp    1164 <wifi_leave+0x44>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifi_leave>:
push   %rbx
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <WiFiNetworkLeave@plt>
test   %rax,%rax
je     114c <wifi_leave+0x2c>
lea    0xeda(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"Leaving selected network...\0A\00"
@.str.1 = [26 x i8] c"WiFiNetworkLeave failed!\0A\00"
define i32 @wifi_leave() {
%1 = alloca i32
store i32 -1, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%3 = call i64 (...) @WiFiNetworkLeave()
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
br label %8
7: ; preds = %0
store i32 0, i32* %1
br label %8
8: ; preds = %7, %5
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
@str = [28 x i8] c"Leaving selected network...\00"
@str.2 = [25 x i8] c"WiFiNetworkLeave failed!\00"
define i32 @wifi_leave() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
%2 = tail call i64 (...) @WiFiNetworkLeave()
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %0
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str.2, i64 0, i64 0))
br label %6
6: ; preds = %0, %4
%7 = phi i32 [ -1, %4 ], [ 0, %0 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int suzerain_inorder_wavenumber_nyquist_index(const int N, const int i) {
  assert(0 <= i && i < N);
  return (i == N / 2) * (1 - (N % 2));
}


x86 assembly (clang, -O0):
<suzerain_inorder_wavenumber_nyquist_index>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
xor    %ecx,%ecx
cmp    -0x8(%rbp),%ecx
mov    %al,-0x9(%rbp)
jg     113a <suzerain_inorder_wavenumber_nyquist_index+0x2a>
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
setl   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    -0x10(%rbp),%eax
mov    $0x1,%ecx
sub    %edx,%ecx
imul   %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<suzerain_inorder_wavenumber_nyquist_index>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
test   %esi,%esi
setns  %al
cmp    %edi,%esi
setl   %cl
and    %al,%cl
movzbl %cl,%edi
call   1030 <assert@plt>
mov    %ebp,%ecx
shr    $0x1f,%ecx
add    %ebp,%ecx
mov    %ecx,%edx
sar    %edx
and    $0xfffffffe,%ecx
sub    %ebp,%ecx
add    $0x1,%ecx
xor    %eax,%eax
cmp    %ebx,%edx
cmove  %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @suzerain_inorder_wavenumber_nyquist_index(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp sle i32 0, %5
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i32, i32* %4
%9 = load i32, i32* %3
%10 = icmp slt i32 %8, %9
br label %11
11: ; preds = %7, %2
%12 = phi i1 [ false, %2 ], [ %10, %7 ]
%13 = zext i1 %12 to i32
%14 = call i32 @assert(i32 %13)
%15 = load i32, i32* %4
%16 = load i32, i32* %3
%17 = sdiv i32 %16, 2
%18 = icmp eq i32 %15, %17
%19 = zext i1 %18 to i32
%20 = load i32, i32* %3
%21 = srem i32 %20, 2
%22 = sub nsw i32 1, %21
%23 = mul nsw i32 %19, %22
ret i32 %23
}

LLVM IR (-O2):
define i32 @suzerain_inorder_wavenumber_nyquist_index(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, -1
%4 = icmp slt i32 %1, %0
%5 = and i1 %3, %4
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
%8 = sdiv i32 %0, 2
%9 = icmp eq i32 %8, %1
%10 = srem i32 %0, 2
%11 = sub nsw i32 1, %10
%12 = select i1 %9, i32 %11, i32 0
ret i32 %12
}
int default_hash(void *data, int num_buckets) {
  int h = 0, a = 127;
  for (char *v = data; *v != 0; v++)
    h = (a * h + *v) % num_buckets;
  return h;
}


x86 assembly (clang, -O0):
<default_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x7f,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1159 <default_hash+0x59>
mov    -0x14(%rbp),%eax
imul   -0x10(%rbp),%eax
mov    -0x20(%rbp),%rcx
movsbl (%rcx),%ecx
add    %ecx,%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1121 <default_hash+0x21>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_hash>:
mov    (%rdi),%al
test   %al,%al
je     112d <default_hash+0x2d>
add    $0x1,%rdi
xor    %edx,%edx
nopl   0x0(%rax)
movsbl %al,%ecx
mov    %edx,%eax
shl    $0x7,%eax
sub    %edx,%eax
add    %ecx,%eax
cltd
idiv   %esi
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
jne    1110 <default_hash+0x10>
mov    %edx,%eax
ret
xor    %edx,%edx
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @default_hash(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 127, i32* %6
%8 = load i8*, i8** %3
store i8* %8, i8** %7
br label %9
9: ; preds = %24, %2
%10 = load i8*, i8** %7
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %27
14: ; preds = %9
%15 = load i32, i32* %6
%16 = load i32, i32* %5
%17 = mul nsw i32 %15, %16
%18 = load i8*, i8** %7
%19 = load i8, i8* %18
%20 = sext i8 %19 to i32
%21 = add nsw i32 %17, %20
%22 = load i32, i32* %4
%23 = srem i32 %21, %22
store i32 %23, i32* %5
br label %24
24: ; preds = %14
%25 = load i8*, i8** %7
%26 = getelementptr inbounds i8, i8* %25, i32 1
store i8* %26, i8** %7
br label %9
27: ; preds = %9
%28 = load i32, i32* %5
ret i32 %28
}

LLVM IR (-O2):
define i32 @default_hash(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %7, %2
%6 = phi i32 [ 0, %2 ], [ %14, %7 ]
ret i32 %6
7: ; preds = %2, %7
%8 = phi i8 [ %16, %7 ], [ %3, %2 ]
%9 = phi i8* [ %15, %7 ], [ %0, %2 ]
%10 = phi i32 [ %14, %7 ], [ 0, %2 ]
%11 = sext i8 %8 to i32
%12 = mul nsw i32 %10, 127
%13 = add nsw i32 %12, %11
%14 = srem i32 %13, %1
%15 = getelementptr inbounds i8, i8* %9, i64 1
%16 = load i8, i8* %15
%17 = icmp eq i8 %16, 0
br i1 %17, label %5, label %7
}
/* Variables and functions */
int /*<<< orphan*/ gen(char *);
int /*<<< orphan*/ ngen(char *, char *, int);
void cgscale2by(int v) {
  gen("push\tax");
  ngen("%s\tax,%d", "mov", v);
  gen("mul\tcx");
  gen("mov\tcx,ax");
  gen("pop\tax");
}


x86 assembly (clang, -O0):
<cgscale2by>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1040 <gen@plt>
mov    -0x4(%rbp),%edx
lea    0xec7(%rip),%rdi
lea    0xec9(%rip),%rsi
call   1030 <ngen@plt>
lea    0xec1(%rip),%rdi
call   1040 <gen@plt>
lea    0xebc(%rip),%rdi
call   1040 <gen@plt>
lea    0xeba(%rip),%rdi
call   1040 <gen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgscale2by>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
call   1040 <gen@plt>
lea    0xed2(%rip),%rdi
lea    0xed4(%rip),%rsi
mov    %ebx,%edx
call   1030 <ngen@plt>
lea    0xeca(%rip),%rdi
call   1040 <gen@plt>
lea    0xec5(%rip),%rdi
call   1040 <gen@plt>
lea    0xec3(%rip),%rdi
pop    %rbx
jmp    1040 <gen@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"push\09ax\00"
@.str.1 = [9 x i8] c"%s\09ax,%d\00"
@.str.2 = [4 x i8] c"mov\00"
@.str.3 = [7 x i8] c"mul\09cx\00"
@.str.4 = [10 x i8] c"mov\09cx,ax\00"
@.str.5 = [7 x i8] c"pop\09ax\00"
define void @cgscale2by(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @gen(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* %2
%5 = call i32 @ngen(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %4)
%6 = call i32 @gen(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.3, i64 0, i64 0))
%7 = call i32 @gen(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.4, i64 0, i64 0))
%8 = call i32 @gen(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.5, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"push\09ax\00"
@.str.1 = [9 x i8] c"%s\09ax,%d\00"
@.str.2 = [4 x i8] c"mov\00"
@.str.3 = [7 x i8] c"mul\09cx\00"
@.str.4 = [10 x i8] c"mov\09cx,ax\00"
@.str.5 = [7 x i8] c"pop\09ax\00"
define void @cgscale2by(i32 %0) {
%2 = tail call i32 @gen(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @ngen(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %0)
%4 = tail call i32 @gen(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.3, i64 0, i64 0))
%5 = tail call i32 @gen(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.4, i64 0, i64 0))
%6 = tail call i32 @gen(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.5, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ llog(int, char *, char *);
char *strdup(char const *);
int /*<<< orphan*/ strlen(char const *);
int /*<<< orphan*/ xmalloc_fatal(char *, int, int /*<<< orphan*/);
char *xstrdup(const char *s) {
  char *p;
  if (!(p = strdup(s)))
    xmalloc_fatal("xstrdup", 1, strlen(s));
  llog(9, "xstrdup(): %p\n", p);
  return p;
}


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1060 <strdup@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    117f <xstrdup+0x3f>
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%edx
lea    0xe8b(%rip),%rdi
mov    $0x1,%esi
call   1050 <xmalloc_fatal@plt>
mov    -0x10(%rbp),%rdx
mov    $0x9,%edi
lea    0xe79(%rip),%rsi
call   1040 <llog@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1060 <strdup@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    116f <xstrdup+0x2f>
mov    %r14,%rdi
call   1030 <strlen@plt>
lea    0xe9d(%rip),%rdi
mov    $0x1,%esi
mov    %eax,%edx
call   1050 <xmalloc_fatal@plt>
lea    0xe92(%rip),%rsi
mov    $0x9,%edi
mov    %rbx,%rdx
call   1040 <llog@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [8 x i8] c"xstrdup\00"
@.str.1 = [15 x i8] c"xstrdup(): %p\0A\00"
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strdup(i8* %4)
store i8* %5, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = call i32 @strlen(i8* %8)
%10 = call i32 @xmalloc_fatal(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 1, i32 %9)
br label %11
11: ; preds = %7, %1
%12 = load i8*, i8** %3
%13 = call i32 @llog(i32 9, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i8* %12)
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
@.str = [8 x i8] c"xstrdup\00"
@.str.1 = [15 x i8] c"xstrdup(): %p\0A\00"
define i8* @xstrdup(i8* %0) {
%2 = tail call i8* @strdup(i8* %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 @strlen(i8* %0)
%6 = tail call i32 @xmalloc_fatal(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 1, i32 %5)
br label %7
7: ; preds = %4, %1
%8 = tail call i32 @llog(i32 9, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i8* %2)
ret i8* %2
}
/* Variables and functions */
int is_category_P(unsigned int);
bool is_property_punctuation(unsigned int ch) { return is_category_P(ch); }


x86 assembly (clang, -O0):
<is_property_punctuation>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <is_category_P@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_property_punctuation>:
jmp    1030 <is_category_P@plt>

LLVM IR (-O0):
define i32 @is_property_punctuation(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @is_category_P(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @is_property_punctuation(i32 %0) {
%2 = tail call i32 @is_category_P(i32 %0)
ret i32 %2
}
void TIM0_UP_IRQHandler(void) {}


x86 assembly (clang, -O0):
<TIM0_UP_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TIM0_UP_IRQHandler>:
ret

LLVM IR (-O0):
define void @TIM0_UP_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @TIM0_UP_IRQHandler() {
ret void
}
int _getpid(int n) { return -1; }


x86 assembly (clang, -O0):
<_getpid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_getpid>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @_getpid(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @_getpid(i32 %0) {
ret i32 -1
}
/* Type definitions */
typedef int uint8_t;
struct pcg_state_16 {
  int dummy;
};

/* Variables and functions */
int pcg_unique_16_xsh_rr_8_random_r(struct pcg_state_16 *);
uint8_t pcg_unique_16_xsh_rr_8_boundedrand_r(struct pcg_state_16 *rng,
                                             uint8_t bound) {
  uint8_t threshold = ((uint8_t)(-bound)) % bound;
  for (;;) {
    uint8_t r = pcg_unique_16_xsh_rr_8_random_r(rng);
    if (r >= threshold)
      return r % bound;
  }
}


x86 assembly (clang, -O0):
<pcg_unique_16_xsh_rr_8_boundedrand_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
sub    -0xc(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pcg_unique_16_xsh_rr_8_random_r@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jl     1152 <pcg_unique_16_xsh_rr_8_boundedrand_r+0x42>
mov    -0x14(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%eax
add    $0x20,%rsp
pop    %rbp
ret
jmp    112b <pcg_unique_16_xsh_rr_8_boundedrand_r+0x1b>

x86 assembly (clang, -O2):
<pcg_unique_16_xsh_rr_8_boundedrand_r>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <pcg_unique_16_xsh_rr_8_random_r@plt>
test   %eax,%eax
js     1120 <pcg_unique_16_xsh_rr_8_boundedrand_r+0x10>
cltd
idiv   %ebp
mov    %edx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.pcg_state_16 = type { i32 }
define i32 @pcg_unique_16_xsh_rr_8_boundedrand_r(%struct.pcg_state_16* %0, i32 %1) {
%3 = alloca %struct.pcg_state_16*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store %struct.pcg_state_16* %0, %struct.pcg_state_16** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = sub nsw i32 0, %7
%9 = load i32, i32* %4
%10 = srem i32 %8, %9
store i32 %10, i32* %5
br label %11
11: ; preds = %21, %2
%12 = load %struct.pcg_state_16*, %struct.pcg_state_16** %3
%13 = call i32 @pcg_unique_16_xsh_rr_8_random_r(%struct.pcg_state_16* %12)
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = load i32, i32* %5
%16 = icmp sge i32 %14, %15
br i1 %16, label %17, label %21
17: ; preds = %11
%18 = load i32, i32* %6
%19 = load i32, i32* %4
%20 = srem i32 %18, %19
ret i32 %20
21: ; preds = %11
br label %11
}

LLVM IR (-O2):
%struct.pcg_state_16 = type { i32 }
define i32 @pcg_unique_16_xsh_rr_8_boundedrand_r(%struct.pcg_state_16* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = tail call i32 @pcg_unique_16_xsh_rr_8_random_r(%struct.pcg_state_16* %0)
%5 = icmp sgt i32 %4, -1
br i1 %5, label %6, label %3
6: ; preds = %3
%7 = srem i32 %4, %1
ret i32 %7
}
void flush(void) {}


x86 assembly (clang, -O0):
<flush>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flush>:
ret

LLVM IR (-O0):
define void @flush() {
ret void
}

LLVM IR (-O2):
define void @flush() {
ret void
}
int pdf_aes_read(void *ctx, char *in, char *out, int req) {
  int tmplen = 0;
  int e;
  return 0;
}


x86 assembly (clang, -O0):
<pdf_aes_read>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
movl   $0x0,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pdf_aes_read>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pdf_aes_read(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
store i32 0, i32* %9
ret i32 0
}

LLVM IR (-O2):
define i32 @pdf_aes_read(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i32 %3) {
ret i32 0
}
int bugswrap() { return 1; }


x86 assembly (clang, -O0):
<bugswrap>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bugswrap>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @bugswrap() {
ret i32 1
}

LLVM IR (-O2):
define i32 @bugswrap() {
ret i32 1
}
int test_5() {

#pragma GCC diagnostic ignored "-Wunused-variable"
  int x;
  ;
  return 0;
}


x86 assembly (clang, -O0):
<test_5>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_5>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test_5() {
%1 = alloca i32
ret i32 0
}

LLVM IR (-O2):
define i32 @test_5() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ set_scroll_page();
void init_var_main_menu(void) { set_scroll_page(); }


x86 assembly (clang, -O0):
<init_var_main_menu>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <set_scroll_page@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_var_main_menu>:
xor    %eax,%eax
jmp    1030 <set_scroll_page@plt>

LLVM IR (-O0):
define void @init_var_main_menu() {
%1 = call i32 (...) @set_scroll_page()
ret void
}

LLVM IR (-O2):
define void @init_var_main_menu() {
%1 = tail call i32 (...) @set_scroll_page()
ret void
}
int round_up(int x, int round) {
  int remainder = x % round;
  int rounded = (remainder == 0) ? x : ((x - remainder) + round);
  return rounded;
}


x86 assembly (clang, -O0):
<round_up>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1129 <round_up+0x29>
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1135 <round_up+0x35>
mov    -0x4(%rbp),%eax
sub    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_up>:
mov    %edi,%eax
cltd
idiv   %esi
lea    (%rsi,%rdi,1),%eax
sub    %edx,%eax
test   %edx,%edx
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @round_up(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = srem i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = load i32, i32* %3
br label %20
14: ; preds = %2
%15 = load i32, i32* %3
%16 = load i32, i32* %5
%17 = sub nsw i32 %15, %16
%18 = load i32, i32* %4
%19 = add nsw i32 %17, %18
br label %20
20: ; preds = %14, %12
%21 = phi i32 [ %13, %12 ], [ %19, %14 ]
store i32 %21, i32* %6
%22 = load i32, i32* %6
ret i32 %22
}

LLVM IR (-O2):
define i32 @round_up(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
%4 = icmp eq i32 %3, 0
%5 = add i32 %1, %0
%6 = sub i32 %5, %3
%7 = select i1 %4, i32 %0, i32 %6
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void decodeFourthByte(uint8_t *src, uint32_t *p32_dest) {
  uint8_t *p8_dest = (uint8_t *)p32_dest;
  *(p8_dest + 3) = *(src + 3);
}


x86 assembly (clang, -O0):
<decodeFourthByte>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<decodeFourthByte>:
mov    0xc(%rdi),%eax
mov    %eax,0xc(%rsi)
ret

LLVM IR (-O0):
define void @decodeFourthByte(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %4
store i32* %6, i32** %5
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 3
%9 = load i32, i32* %8
%10 = load i32*, i32** %5
%11 = getelementptr inbounds i32, i32* %10, i64 3
store i32 %9, i32* %11
ret void
}

LLVM IR (-O2):
define void @decodeFourthByte(i32* nocapture %0, i32* nocapture writeonly %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 3
%4 = load i32, i32* %3
%5 = getelementptr inbounds i32, i32* %1, i64 3
store i32 %4, i32* %5
ret void
}