xunge/DecIR huggingface dataset:
/* Variables and functions */
int map(int, int /*<<< orphan*/, int, int /*<<< orphan*/, int);
int unmap(int val) { return map(val, 0, 4094, 0, 255); }


x86 assembly (clang, -O0):
<unmap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %ecx,%ecx
mov    $0xffe,%edx
mov    $0xff,%r8d
mov    %ecx,%esi
call   1030 <map@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unmap>:
xor    %esi,%esi
mov    $0xffe,%edx
xor    %ecx,%ecx
mov    $0xff,%r8d
jmp    1030 <map@plt>

LLVM IR (-O0):
define i32 @unmap(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @map(i32 %3, i32 0, i32 4094, i32 0, i32 255)
ret i32 %4
}

LLVM IR (-O2):
define i32 @unmap(i32 %0) {
%2 = tail call i32 @map(i32 %0, i32 0, i32 4094, i32 0, i32 255)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ mpz_t;

/* Variables and functions */
int /*<<< orphan*/ mpz_clear(int /*<<< orphan*/);
extern void ZCLEAR(mpz_t *z, char *format, ...) {
  mpz_clear(*z);
  ;
}


x86 assembly (clang, -O0):
<ZCLEAR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <mpz_clear@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZCLEAR>:
mov    (%rdi),%edi
jmp    1030 <mpz_clear@plt>

LLVM IR (-O0):
define void @ZCLEAR(i32* %0, i8* %1, ...) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = call i32 @mpz_clear(i32 %6)
ret void
}

LLVM IR (-O2):
define void @ZCLEAR(i32* nocapture %0, i8* nocapture readnone %1, ...) {
%3 = load i32, i32* %0
%4 = tail call i32 @mpz_clear(i32 %3)
ret void
}
int Index(int N, int x, int y, int z) { return x * N * N + y * N + z; }


x86 assembly (clang, -O0):
<Index>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
imul   -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
mov    -0xc(%rbp),%ecx
imul   -0x4(%rbp),%ecx
add    %ecx,%eax
add    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Index>:
imul   %edi,%esi
lea    (%rsi,%rdx,1),%eax
imul   %edi,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @Index(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %6
%10 = load i32, i32* %5
%11 = mul nsw i32 %9, %10
%12 = load i32, i32* %5
%13 = mul nsw i32 %11, %12
%14 = load i32, i32* %7
%15 = load i32, i32* %5
%16 = mul nsw i32 %14, %15
%17 = add nsw i32 %13, %16
%18 = load i32, i32* %8
%19 = add nsw i32 %17, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @Index(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = mul nsw i32 %1, %0
%6 = add i32 %5, %2
%7 = mul i32 %6, %0
%8 = add nsw i32 %7, %3
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ *strcasestr(char const *, char const *);
int strcasefind(const char *s, const char *find) {
  if (strcasestr(s, find) != NULL) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<strcasefind>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <strcasestr@plt>
cmp    $0x0,%rax
je     1143 <strcasefind+0x33>
movl   $0x1,-0x4(%rbp)
jmp    114a <strcasefind+0x3a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcasefind>:
push   %rax
call   1030 <strcasestr@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @strcasefind(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = load i8*, i8** %5
%8 = call i32* @strcasestr(i8* %6, i8* %7)
%9 = icmp ne i32* %8, null
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 1, i32* %3
br label %12
11: ; preds = %2
store i32 0, i32* %3
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @strcasefind(i8* %0, i8* %1) {
%3 = tail call i32* @strcasestr(i8* %0, i8* %1)
%4 = icmp ne i32* %3, null
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ vfprintf(int /*<<< orphan*/, char *, int /*<<< orphan*/);
void vwarn(char *fmt, va_list ap) {
  fputs("warning: ", stderr);
  vfprintf(stderr, fmt, ap);
  fputs("\n", stderr);
}


x86 assembly (clang, -O0):
<vwarn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%esi
lea    0xec1(%rip),%rdi
call   1030 <fputs@plt>
mov    0x2e95(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1040 <vfprintf@plt>
mov    0x2e80(%rip),%rax
mov    (%rax),%esi
lea    0xea1(%rip),%rdi
call   1030 <fputs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vwarn>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebp
mov    %rdi,%rbx
mov    0x2eb0(%rip),%r14
mov    (%r14),%esi
lea    0xec6(%rip),%rdi
call   1030 <fputs@plt>
mov    (%r14),%edi
mov    %rbx,%rsi
mov    %ebp,%edx
call   1040 <vfprintf@plt>
mov    (%r14),%esi
lea    0xeb4(%rip),%rdi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <fputs@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"warning: \00"
@stderr = global i32 0
@.str.1 = [2 x i8] c"\0A\00"
define void @vwarn(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = call i32 @fputs(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i32, i32* @stderr
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = call i32 @vfprintf(i32 %7, i8* %8, i32 %9)
%11 = load i32, i32* @stderr
%12 = call i32 @fputs(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32 %11)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"warning: \00"
@stderr = global i32 0
@.str.1 = [2 x i8] c"\0A\00"
define void @vwarn(i8* %0, i32 %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fputs(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* @stderr
%6 = tail call i32 @vfprintf(i32 %5, i8* %0, i32 %1)
%7 = load i32, i32* @stderr
%8 = tail call i32 @fputs(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cortexm_sleep(int /*<<< orphan*/);
void pm_set_lowest(void) { cortexm_sleep(0); }


x86 assembly (clang, -O0):
<pm_set_lowest>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <cortexm_sleep@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pm_set_lowest>:
xor    %edi,%edi
jmp    1030 <cortexm_sleep@plt>

LLVM IR (-O0):
define void @pm_set_lowest() {
%1 = call i32 @cortexm_sleep(i32 0)
ret void
}

LLVM IR (-O2):
define void @pm_set_lowest() {
%1 = tail call i32 @cortexm_sleep(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lcdinit();
void d2x24_init_screen(void) { lcdinit(); }


x86 assembly (clang, -O0):
<d2x24_init_screen>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <lcdinit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2x24_init_screen>:
xor    %eax,%eax
jmp    1030 <lcdinit@plt>

LLVM IR (-O0):
define void @d2x24_init_screen() {
%1 = call i32 (...) @lcdinit()
ret void
}

LLVM IR (-O2):
define void @d2x24_init_screen() {
%1 = tail call i32 (...) @lcdinit()
ret void
}
/* Variables and functions */
int fgtx(double *, int /*<<< orphan*/, int, double);
int firstgtx(double val, double *tab, int n) {
  return fgtx(tab, 0, n - 1, val);
}


x86 assembly (clang, -O0):
<firstgtx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
movsd  -0x8(%rbp),%xmm0
xor    %esi,%esi
call   1030 <fgtx@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<firstgtx>:
lea    -0x1(%rsi),%edx
xor    %esi,%esi
jmp    1030 <fgtx@plt>

LLVM IR (-O0):
define i32 @firstgtx(double %0, double* %1, i32 %2) {
%4 = alloca double
%5 = alloca double*
%6 = alloca i32
store double %0, double* %4
store double* %1, double** %5
store i32 %2, i32* %6
%7 = load double*, double** %5
%8 = load i32, i32* %6
%9 = sub nsw i32 %8, 1
%10 = load double, double* %4
%11 = call i32 @fgtx(double* %7, i32 0, i32 %9, double %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @firstgtx(double %0, double* %1, i32 %2) {
%4 = add nsw i32 %2, -1
%5 = tail call i32 @fgtx(double* %1, i32 0, i32 %4, double %0)
ret i32 %5
}
/* Variables and functions */
__attribute__((const)) size_t size_to_page_number(size_t size) {
  return ((size - 1) / (1 << 12)) + 1;
}


x86 assembly (clang, -O0):
<size_to_page_number>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
sub    $0x1,%rax
shr    $0xc,%rax
add    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<size_to_page_number>:
lea    -0x1(%rdi),%rax
shr    $0xc,%rax
add    $0x1,%rax
ret

LLVM IR (-O0):
define i64 @size_to_page_number(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sub i64 %3, 1
%5 = udiv i64 %4, 4096
%6 = add i64 %5, 1
ret i64 %6
}

LLVM IR (-O2):
define i64 @size_to_page_number(i64 %0) {
%2 = add i64 %0, -1
%3 = lshr i64 %2, 12
%4 = add nuw nsw i64 %3, 1
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ execute(char *, char *);
char *malloc(int);
int /*<<< orphan*/ snprintf(char *, int, char *, char *, char *);
void timestomp(char *sfile, char *dfile) {
  char cmd[100];
  snprintf(cmd, 100, "/usr/bin/touch %s -r %s", dfile, sfile);
  char *output = malloc(1024);
  execute(cmd, output);
}


x86 assembly (clang, -O0):
<timestomp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x90,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x80(%rbp),%rdi
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%r8
mov    $0x64,%esi
lea    0xea5(%rip),%rdx
call   1030 <snprintf@plt>
mov    $0x400,%edi
call   1050 <malloc@plt>
mov    %rax,-0x88(%rbp)
lea    -0x80(%rbp),%rdi
mov    -0x88(%rbp),%rsi
call   1040 <execute@plt>
add    $0x90,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timestomp>:
push   %rbx
sub    $0x70,%rsp
mov    %rsi,%rcx
mov    %rdi,%r8
lea    0xebe(%rip),%rdx
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x64,%esi
call   1030 <snprintf@plt>
mov    $0x400,%edi
call   1050 <malloc@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
call   1040 <execute@plt>
add    $0x70,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [24 x i8] c"/usr/bin/touch %s -r %s\00"
define void @timestomp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca [100 x i8]
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = getelementptr inbounds [100 x i8], [100 x i8]* %5, i64 0, i64 0
%8 = load i8*, i8** %4
%9 = load i8*, i8** %3
%10 = call i32 @snprintf(i8* %7, i32 100, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* %8, i8* %9)
%11 = call i8* @malloc(i32 1024)
store i8* %11, i8** %6
%12 = getelementptr inbounds [100 x i8], [100 x i8]* %5, i64 0, i64 0
%13 = load i8*, i8** %6
%14 = call i32 @execute(i8* %12, i8* %13)
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"/usr/bin/touch %s -r %s\00"
define void @timestomp(i8* %0, i8* %1) {
%3 = alloca [100 x i8]
%4 = getelementptr inbounds [100 x i8], [100 x i8]* %3, i64 0, i64 0
%5 = call i32 @snprintf(i8* %4, i32 100, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* %1, i8* %0)
%6 = call dereferenceable_or_null(1024) i8* @malloc(i32 1024)
%7 = call i32 @execute(i8* %4, i8* %6)
ret void
}
void CFGMR3QueryStringDef(void) {}


x86 assembly (clang, -O0):
<CFGMR3QueryStringDef>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CFGMR3QueryStringDef>:
ret

LLVM IR (-O0):
define void @CFGMR3QueryStringDef() {
ret void
}

LLVM IR (-O2):
define void @CFGMR3QueryStringDef() {
ret void
}
unsigned int modexp(unsigned int base, int exp, unsigned int mod) {
  unsigned int result = 1;
  while (exp > 0) {
    if (exp & 1 == 1)
      result = (result * base) % mod;
    exp = exp >> 1;
    base = (base * base) % mod;
  }
  return result;
}


x86 assembly (clang, -O0):
<modexp>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1159 <modexp+0x59>
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     113c <modexp+0x3c>
mov    -0x10(%rbp),%eax
imul   -0x4(%rbp),%eax
xor    %edx,%edx
divl   -0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
xor    %edx,%edx
divl   -0xc(%rbp)
mov    %edx,-0x4(%rbp)
jmp    1114 <modexp+0x14>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<modexp>:
test   %esi,%esi
jle    1142 <modexp+0x42>
mov    %edx,%r8d
mov    $0x1,%r9d
jmp    1127 <modexp+0x27>
nop
mov    %esi,%ecx
shr    %ecx
imul   %edi,%edi
mov    %edi,%eax
xor    %edx,%edx
div    %r8d
mov    %edx,%edi
cmp    $0x1,%esi
mov    %ecx,%esi
jbe    113e <modexp+0x3e>
test   $0x1,%sil
je     1110 <modexp+0x10>
imul   %edi,%r9d
mov    %r9d,%eax
xor    %edx,%edx
div    %r8d
mov    %edx,%r9d
jmp    1110 <modexp+0x10>
mov    %r9d,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @modexp(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 1, i32* %7
br label %8
8: ; preds = %21, %3
%9 = load i32, i32* %5
%10 = icmp sgt i32 %9, 0
br i1 %10, label %11, label %29
11: ; preds = %8
%12 = load i32, i32* %5
%13 = and i32 %12, 1
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %21
15: ; preds = %11
%16 = load i32, i32* %7
%17 = load i32, i32* %4
%18 = mul i32 %16, %17
%19 = load i32, i32* %6
%20 = urem i32 %18, %19
store i32 %20, i32* %7
br label %21
21: ; preds = %15, %11
%22 = load i32, i32* %5
%23 = ashr i32 %22, 1
store i32 %23, i32* %5
%24 = load i32, i32* %4
%25 = load i32, i32* %4
%26 = mul i32 %24, %25
%27 = load i32, i32* %6
%28 = urem i32 %26, %27
store i32 %28, i32* %4
br label %8
29: ; preds = %8
%30 = load i32, i32* %7
ret i32 %30
}

LLVM IR (-O2):
define i32 @modexp(i32 %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %20
5: ; preds = %3, %14
%6 = phi i32 [ %15, %14 ], [ 1, %3 ]
%7 = phi i32 [ %18, %14 ], [ %0, %3 ]
%8 = phi i32 [ %16, %14 ], [ %1, %3 ]
%9 = and i32 %8, 1
%10 = icmp eq i32 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %5
%12 = mul i32 %6, %7
%13 = urem i32 %12, %2
br label %14
14: ; preds = %11, %5
%15 = phi i32 [ %13, %11 ], [ %6, %5 ]
%16 = lshr i32 %8, 1
%17 = mul i32 %7, %7
%18 = urem i32 %17, %2
%19 = icmp ult i32 %8, 2
br i1 %19, label %20, label %5
20: ; preds = %14, %3
%21 = phi i32 [ 1, %3 ], [ %15, %14 ]
ret i32 %21
}
/* Variables and functions */
int /*<<< orphan*/ add128(long long *);
int /*<<< orphan*/ shift128Right(int, long long *);
float128_rem() {
  signed int expDiff;
  long long int aSig1;
  long long int sigMean1;
  if (-64 < expDiff)
    shift128Right(-expDiff, &aSig1);
  add128(&sigMean1);
}


x86 assembly (clang, -O0):
<float128_rem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0xffffffc0,%eax
cmp    -0x8(%rbp),%eax
jge    1144 <float128_rem+0x24>
xor    %edi,%edi
sub    -0x8(%rbp),%edi
lea    -0x10(%rbp),%rsi
call   1040 <shift128Right@plt>
lea    -0x18(%rbp),%rdi
call   1030 <add128@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<float128_rem>:
push   %rax
mov    %rsp,%rdi
call   1030 <add128@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @float128_rem() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i64
%4 = alloca i64
%5 = load i32, i32* %2
%6 = icmp slt i32 -64, %5
br i1 %6, label %7, label %11
7: ; preds = %0
%8 = load i32, i32* %2
%9 = sub nsw i32 0, %8
%10 = call i32 @shift128Right(i32 %9, i64* %3)
br label %11
11: ; preds = %7, %0
%12 = call i32 @add128(i64* %4)
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @float128_rem() {
%1 = alloca i64
%2 = bitcast i64* %1 to i8*
%3 = call i32 @add128(i64* %1)
ret i32 undef
}
int tolower(int c) { return (c >= 'A' && c <= 'Z') ? (c + 0x20) : c; }


x86 assembly (clang, -O0):
<tolower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x41,-0x4(%rbp)
jl     1129 <tolower+0x29>
cmpl   $0x5a,-0x4(%rbp)
jg     1129 <tolower+0x29>
mov    -0x4(%rbp),%eax
add    $0x20,%eax
mov    %eax,-0x8(%rbp)
jmp    112f <tolower+0x2f>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tolower>:
lea    -0x41(%rdi),%ecx
lea    0x20(%rdi),%eax
cmp    $0x1a,%ecx
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @tolower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 65
br i1 %4, label %5, label %11
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 90
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 32
br label %13
11: ; preds = %5, %1
%12 = load i32, i32* %2
br label %13
13: ; preds = %11, %8
%14 = phi i32 [ %10, %8 ], [ %12, %11 ]
ret i32 %14
}

LLVM IR (-O2):
define i32 @tolower(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = add nsw i32 %0, 32
%5 = select i1 %3, i32 %4, i32 %0
ret i32 %5
}
void YUY2ToYRow_C() {}


x86 assembly (clang, -O0):
<YUY2ToYRow_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<YUY2ToYRow_C>:
ret

LLVM IR (-O0):
define void @YUY2ToYRow_C() {
ret void
}

LLVM IR (-O2):
define void @YUY2ToYRow_C() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ motor_set_speed_xytheta(int, int, int);
void recharger_act(int x, int y, int theta) {
  motor_set_speed_xytheta(x, y, theta);
}


x86 assembly (clang, -O0):
<recharger_act>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <motor_set_speed_xytheta@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<recharger_act>:
jmp    1030 <motor_set_speed_xytheta@plt>

LLVM IR (-O0):
define void @recharger_act(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @motor_set_speed_xytheta(i32 %7, i32 %8, i32 %9)
ret void
}

LLVM IR (-O2):
define void @recharger_act(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @motor_set_speed_xytheta(i32 %0, i32 %1, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ notify_pvcall(char *);
int pvEnableMultiChannelROI(char byBoardNum, short wNumChannels, short *pLefts,
                            short *pRights, short *pBottoms, short *pTops) {
  notify_pvcall("f");
  return (0);
}


x86 assembly (clang, -O0):
<pvEnableMultiChannelROI>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %si,%ax
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %ax,-0x4(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
lea    0xec3(%rip),%rdi
call   1030 <notify_pvcall@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pvEnableMultiChannelROI>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <notify_pvcall@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"f\00"
define i32 @pvEnableMultiChannelROI(i8 signext %0, i16 signext %1, i16* %2, i16* %3, i16* %4, i16* %5) {
%7 = alloca i8
%8 = alloca i16
%9 = alloca i16*
%10 = alloca i16*
%11 = alloca i16*
%12 = alloca i16*
store i8 %0, i8* %7
store i16 %1, i16* %8
store i16* %2, i16** %9
store i16* %3, i16** %10
store i16* %4, i16** %11
store i16* %5, i16** %12
%13 = call i32 @notify_pvcall(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [2 x i8] c"f\00"
define i32 @pvEnableMultiChannelROI(i8 signext %0, i16 signext %1, i16* nocapture readnone %2, i16* nocapture readnone %3, i16* nocapture readnone %4, i16* nocapture readnone %5) {
%7 = tail call i32 @notify_pvcall(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
void test_28_0(char *mem) { __atomic_and_fetch(mem, 1, 4); }


x86 assembly (clang, -O0):
<test_28_0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movb   $0x1,-0x9(%rbp)
mov    -0x9(%rbp),%cl
mov    %cl,-0xc(%rbp)
mov    (%rax),%al
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%al
mov    -0x18(%rbp),%rcx
mov    -0xc(%rbp),%sil
mov    %al,%dl
and    %sil,%dl
lock cmpxchg %dl,(%rcx)
sete   %cl
mov    %al,-0x19(%rbp)
test   $0x1,%cl
mov    %al,-0xb(%rbp)
jne    114a <test_28_0+0x4a>
jmp    111f <test_28_0+0x1f>
mov    -0xc(%rbp),%cl
mov    -0x19(%rbp),%al
and    %cl,%al
mov    %al,-0xa(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_28_0>:
lock andb $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @test_28_0(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
%4 = alloca i8
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8 1, i8* %3
%6 = load i8, i8* %3
%7 = atomicrmw and i8* %5, i8 %6 acq_rel
%8 = and i8 %7, %6
store i8 %8, i8* %4
%9 = load i8, i8* %4
ret void
}

LLVM IR (-O2):
define void @test_28_0(i8* nocapture %0) {
%2 = atomicrmw and i8* %0, i8 1 acq_rel
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Myprintf(char *, int);
int main() {
  Myprintf(" WWW.FIRMCODES.COM \n %d", 9);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x9,%esi
call   1030 <Myprintf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x9,%esi
call   1030 <Myprintf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [24 x i8] c" WWW.FIRMCODES.COM \0A %d\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @Myprintf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 9)
ret i32 0
}

LLVM IR (-O2):
@.str = [24 x i8] c" WWW.FIRMCODES.COM \0A %d\00"
define i32 @main() {
%1 = tail call i32 @Myprintf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 9)
ret i32 0
}
int tuncompressible_fp() { return 0; }


x86 assembly (clang, -O0):
<tuncompressible_fp>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tuncompressible_fp>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @tuncompressible_fp() {
ret i32 0
}

LLVM IR (-O2):
define i32 @tuncompressible_fp() {
ret i32 0
}
/* Variables and functions */
int LZ4_isAligned(const void *ptr, size_t alignment) {
  return ((size_t)ptr & (alignment - 1)) == 0;
}


x86 assembly (clang, -O0):
<LZ4_isAligned>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    $0x1,%rcx
and    %rcx,%rax
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZ4_isAligned>:
add    $0xffffffffffffffff,%rsi
xor    %eax,%eax
test   %rdi,%rsi
sete   %al
ret

LLVM IR (-O0):
define i32 @LZ4_isAligned(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = ptrtoint i8* %5 to i64
%7 = load i64, i64* %4
%8 = sub i64 %7, 1
%9 = and i64 %6, %8
%10 = icmp eq i64 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @LZ4_isAligned(i8* %0, i64 %1) {
%3 = ptrtoint i8* %0 to i64
%4 = add i64 %1, -1
%5 = and i64 %4, %3
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
char ptToChar(void *pt) {
  char *a = NULL, *b = pt;
  return b - a;
}


x86 assembly (clang, -O0):
<ptToChar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptToChar>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define signext i8 @ptToChar(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
store i8* null, i8** %3
%5 = load i8*, i8** %2
store i8* %5, i8** %4
%6 = load i8*, i8** %4
%7 = load i8*, i8** %3
%8 = ptrtoint i8* %6 to i64
%9 = ptrtoint i8* %7 to i64
%10 = sub i64 %8, %9
%11 = trunc i64 %10 to i8
ret i8 %11
}

LLVM IR (-O2):
define signext i8 @ptToChar(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i8
ret i8 %3
}
/* Variables and functions */
int LR();
int /*<<< orphan*/ close_source();
int /*<<< orphan*/ init_ff_index();
int /*<<< orphan*/ init_tb_index();
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ read_source(char *);
int main(int argc, char *argv[]) {
  init_tb_index();
  init_ff_index();
  read_source(argv[1]);
  printf("ret: %d\n", LR());
  close_source();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1070 <init_tb_index@plt>
mov    $0x0,%al
call   1030 <init_ff_index@plt>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1060 <read_source@plt>
mov    $0x0,%al
call   1050 <LR@plt>
mov    %eax,%esi
lea    0xe5f(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1080 <close_source@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    %rsi,%rbx
xor    %eax,%eax
call   1070 <init_tb_index@plt>
xor    %eax,%eax
call   1030 <init_ff_index@plt>
mov    0x8(%rbx),%rdi
call   1060 <read_source@plt>
xor    %eax,%eax
call   1050 <LR@plt>
lea    0xe77(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
call   1080 <close_source@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"ret: %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @init_tb_index()
%7 = call i32 (...) @init_ff_index()
%8 = load i8**, i8*** %5
%9 = getelementptr inbounds i8*, i8** %8, i64 1
%10 = load i8*, i8** %9
%11 = call i32 @read_source(i8* %10)
%12 = call i32 (...) @LR()
%13 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %12)
%14 = call i32 (...) @close_source()
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"ret: %d\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = tail call i32 (...) @init_tb_index()
%4 = tail call i32 (...) @init_ff_index()
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = tail call i32 @read_source(i8* %6)
%8 = tail call i32 (...) @LR()
%9 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %8)
%10 = tail call i32 (...) @close_source()
ret i32 0
}
/* Variables and functions */
int dbar(double, double);
int dv(double, double);
int sb(double, double);
int ubar(double, double);
double F3_cc_anu_n(double xx, double Q2) {
  return 2 * (dv(xx, Q2) + sb(xx, Q2) + dbar(xx, Q2) - ubar(xx, Q2)) / xx;
}


x86 assembly (clang, -O0):
<F3_cc_anu_n>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1050 <dv@plt>
mov    %eax,-0x1c(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <sb@plt>
mov    %eax,%ecx
mov    -0x1c(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1060 <dbar@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x14(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1040 <ubar@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
sub    %ecx,%eax
shl    $0x1,%eax
cvtsi2sd %eax,%xmm0
divsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<F3_cc_anu_n>:
push   %rbp
push   %rbx
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
movsd  %xmm0,0x8(%rsp)
call   1050 <dv@plt>
mov    %eax,%ebx
movsd  0x8(%rsp),%xmm0
movsd  0x10(%rsp),%xmm1
call   1030 <sb@plt>
mov    %eax,%ebp
add    %ebx,%ebp
movsd  0x8(%rsp),%xmm0
movsd  0x10(%rsp),%xmm1
call   1060 <dbar@plt>
mov    %eax,%ebx
add    %ebp,%ebx
movsd  0x8(%rsp),%xmm0
movsd  0x10(%rsp),%xmm1
call   1040 <ubar@plt>
sub    %eax,%ebx
add    %ebx,%ebx
xorps  %xmm0,%xmm0
cvtsi2sd %ebx,%xmm0
divsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define double @F3_cc_anu_n(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call i32 @dv(double %5, double %6)
%8 = load double, double* %3
%9 = load double, double* %4
%10 = call i32 @sb(double %8, double %9)
%11 = add nsw i32 %7, %10
%12 = load double, double* %3
%13 = load double, double* %4
%14 = call i32 @dbar(double %12, double %13)
%15 = add nsw i32 %11, %14
%16 = load double, double* %3
%17 = load double, double* %4
%18 = call i32 @ubar(double %16, double %17)
%19 = sub nsw i32 %15, %18
%20 = mul nsw i32 2, %19
%21 = sitofp i32 %20 to double
%22 = load double, double* %3
%23 = fdiv double %21, %22
ret double %23
}

LLVM IR (-O2):
define double @F3_cc_anu_n(double %0, double %1) {
%3 = tail call i32 @dv(double %0, double %1)
%4 = tail call i32 @sb(double %0, double %1)
%5 = add nsw i32 %4, %3
%6 = tail call i32 @dbar(double %0, double %1)
%7 = add nsw i32 %5, %6
%8 = tail call i32 @ubar(double %0, double %1)
%9 = sub i32 %7, %8
%10 = shl nsw i32 %9, 1
%11 = sitofp i32 %10 to double
%12 = fdiv double %11, %0
ret double %12
}
/* Variables and functions */
int /*<<< orphan*/ computeSigs(char *);
int main(int argc, char **argv) {
  int i;
  for (i = 1; i < argc; i++)
    computeSigs(argv[i]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1158 <main+0x48>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <computeSigs@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112d <main+0x1d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
cmp    $0x2,%edi
jl     1142 <main+0x32>
mov    %rsi,%r14
mov    %edi,%r15d
mov    $0x1,%ebx
cs nopw 0x0(%rax,%rax,1)
nop
mov    (%r14,%rbx,8),%rdi
call   1030 <computeSigs@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <main+0x20>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %6
br label %7
7: ; preds = %18, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %21
11: ; preds = %7
%12 = load i8**, i8*** %5
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8*, i8** %12, i64 %14
%16 = load i8*, i8** %15
%17 = call i32 @computeSigs(i8* %16)
br label %18
18: ; preds = %11
%19 = load i32, i32* %6
%20 = add nsw i32 %19, 1
store i32 %20, i32* %6
br label %7
21: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 1, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i8*, i8** %1, i64 %7
%9 = load i8*, i8** %8
%10 = tail call i32 @computeSigs(i8* %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret i32 0
}
adrreg0reg1_set(r0, r1, x0, x1, p0, p1) short r0, r1;
short *p0, *p1;
{ (p0[10000000]) = r1; }


x86 assembly (clang, -O0):
<adrreg0reg1_set>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x8(%rbp),%cx
mov    -0x18(%rbp),%rax
mov    %cx,0x1312d00(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adrreg0reg1_set>:
mov    %si,0x1312d00(%r8)
01
ret

LLVM IR (-O0):
define i32 @adrreg0reg1_set(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16, i16* %9
%17 = load i16*, i16** %12
%18 = getelementptr inbounds i16, i16* %17, i64 10000000
store i16 %16, i16* %18
%19 = load i32, i32* %7
ret i32 %19
}

LLVM IR (-O2):
define i32 @adrreg0reg1_set(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture writeonly %4, i16* nocapture readnone %5) {
%7 = trunc i32 %1 to i16
%8 = getelementptr inbounds i16, i16* %4, i64 10000000
store i16 %7, i16* %8
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int /*<<< orphan*/);
void platform_terminal_move(int row) { printf("\x1b[%d;%df", row + 1, 0); }


x86 assembly (clang, -O0):
<platform_terminal_move>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
add    $0x1,%esi
lea    0xed8(%rip),%rdi
xor    %edx,%edx
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<platform_terminal_move>:
lea    0x1(%rdi),%esi
lea    0xee6(%rip),%rdi
xor    %edx,%edx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"\1B[%d;%df\00"
define void @platform_terminal_move(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
%5 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %4, i32 0)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"\1B[%d;%df\00"
define void @platform_terminal_move(i32 %0) {
%2 = add nsw i32 %0, 1
%3 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %2, i32 0)
ret void
}
float getSNBmultiplier(void) {
  unsigned int msr_lo, msr_hi;
  float coef;
  __asm__ __volatile__("rdmsr" : "=a"(msr_lo), "=d"(msr_hi) : "c"(0x198));
  coef = (msr_lo >> 8) & 0xFF;
  if (coef < 4) {
    __asm__ __volatile__("rdmsr" : "=a"(msr_lo), "=d"(msr_hi) : "c"(0xCE));
    coef = (msr_lo >> 16) & 0xFF;
  }
  return coef;
}


x86 assembly (clang, -O0):
<getSNBmultiplier>:
push   %rbp
mov    %rsp,%rbp
mov    $0x198,%ecx
rdmsr
mov    %eax,-0x4(%rbp)
mov    %edx,-0x8(%rbp)
movzbl -0x3(%rbp),%eax
cvtsi2ss %eax,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  0xeda(%rip),%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    114a <getSNBmultiplier+0x4a>
mov    $0xce,%ecx
rdmsr
mov    %eax,-0x4(%rbp)
mov    %edx,-0x8(%rbp)
movzbl -0x2(%rbp),%eax
cvtsi2ss %eax,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<getSNBmultiplier>:
mov    $0x198,%ecx
rdmsr
movzbl %ah,%eax
cmp    $0x3,%eax
ja     111c <getSNBmultiplier+0x1c>
mov    $0xce,%ecx
rdmsr
shr    $0x10,%eax
movzbl %al,%eax
cvtsi2ss %eax,%xmm0
ret

LLVM IR (-O0):
define float @getSNBmultiplier() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca float
%4 = call { i32, i32 } asm sideeffect "rdmsr", "={ax},={dx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 408)
%5 = extractvalue { i32, i32 } %4, 0
%6 = extractvalue { i32, i32 } %4, 1
store i32 %5, i32* %1
store i32 %6, i32* %2
%7 = load i32, i32* %1
%8 = lshr i32 %7, 8
%9 = and i32 %8, 255
%10 = uitofp i32 %9 to float
store float %10, float* %3
%11 = load float, float* %3
%12 = fcmp olt float %11, 4.000000e+00
br i1 %12, label %13, label %21
13: ; preds = %0
%14 = call { i32, i32 } asm sideeffect "rdmsr", "={ax},={dx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 206)
%15 = extractvalue { i32, i32 } %14, 0
%16 = extractvalue { i32, i32 } %14, 1
store i32 %15, i32* %1
store i32 %16, i32* %2
%17 = load i32, i32* %1
%18 = lshr i32 %17, 16
%19 = and i32 %18, 255
%20 = uitofp i32 %19 to float
store float %20, float* %3
br label %21
21: ; preds = %13, %0
%22 = load float, float* %3
ret float %22
}

LLVM IR (-O2):
define float @getSNBmultiplier() {
%1 = tail call { i32, i32 } asm sideeffect "rdmsr", "={ax},={dx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 408)
%2 = extractvalue { i32, i32 } %1, 0
%3 = lshr i32 %2, 8
%4 = and i32 %3, 255
%5 = icmp ult i32 %4, 4
br i1 %5, label %6, label %11
6: ; preds = %0
%7 = tail call { i32, i32 } asm sideeffect "rdmsr", "={ax},={dx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 206)
%8 = extractvalue { i32, i32 } %7, 0
%9 = lshr i32 %8, 16
%10 = and i32 %9, 255
br label %11
11: ; preds = %6, %0
%12 = phi i32 [ %10, %6 ], [ %4, %0 ]
%13 = uitofp i32 %12 to float
ret float %13
}
void paused_passive_mouse_handler(int x, int y) { return; }


x86 assembly (clang, -O0):
<paused_passive_mouse_handler>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<paused_passive_mouse_handler>:
ret

LLVM IR (-O0):
define void @paused_passive_mouse_handler(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @paused_passive_mouse_handler(i32 %0, i32 %1) {
ret void
}
/* Type definitions */
struct nl_msg {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ nlmsg_free(struct nl_msg *);
void _nl_auto_nl_msg_fcn(struct nl_msg **v) {
  if (*v)
    nlmsg_free(*v);
}


x86 assembly (clang, -O0):
<_nl_auto_nl_msg_fcn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     1136 <_nl_auto_nl_msg_fcn+0x26>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <nlmsg_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_nl_auto_nl_msg_fcn>:
mov    (%rdi),%rdi
test   %rdi,%rdi
je     111d <_nl_auto_nl_msg_fcn+0xd>
jmp    1030 <nlmsg_free@plt>
ret

LLVM IR (-O0):
%struct.nl_msg = type { i32 }
define void @_nl_auto_nl_msg_fcn(%struct.nl_msg** %0) {
%2 = alloca %struct.nl_msg**
store %struct.nl_msg** %0, %struct.nl_msg*** %2
%3 = load %struct.nl_msg**, %struct.nl_msg*** %2
%4 = load %struct.nl_msg*, %struct.nl_msg** %3
%5 = icmp ne %struct.nl_msg* %4, null
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load %struct.nl_msg**, %struct.nl_msg*** %2
%8 = load %struct.nl_msg*, %struct.nl_msg** %7
%9 = call i32 @nlmsg_free(%struct.nl_msg* %8)
br label %10
10: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
%struct.nl_msg = type { i32 }
define void @_nl_auto_nl_msg_fcn(%struct.nl_msg** nocapture %0) {
%2 = load %struct.nl_msg*, %struct.nl_msg** %0
%3 = icmp eq %struct.nl_msg* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @nlmsg_free(%struct.nl_msg* %2)
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar_fd(char, int);
int /*<<< orphan*/ ft_putnbr_fd(int, int);
void ft_putnbrl_fd(int n, int fd) {
  ft_putnbr_fd(n, fd);
  ft_putchar_fd('\n', fd);
}


x86 assembly (clang, -O0):
<ft_putnbrl_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <ft_putnbr_fd@plt>
mov    -0x8(%rbp),%esi
mov    $0xa,%edi
call   1040 <ft_putchar_fd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putnbrl_fd>:
push   %rbx
mov    %esi,%ebx
call   1030 <ft_putnbr_fd@plt>
mov    $0xa,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1040 <ft_putchar_fd@plt>

LLVM IR (-O0):
define void @ft_putnbrl_fd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @ft_putnbr_fd(i32 %5, i32 %6)
%8 = load i32, i32* %4
%9 = call i32 @ft_putchar_fd(i8 signext 10, i32 %8)
ret void
}

LLVM IR (-O2):
define void @ft_putnbrl_fd(i32 %0, i32 %1) {
%3 = tail call i32 @ft_putnbr_fd(i32 %0, i32 %1)
%4 = tail call i32 @ft_putchar_fd(i8 signext 10, i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void fprint_inc_DPTR(FILE *stream) {
  fprintf(stream, "INC   DPTR                      ");
}


x86 assembly (clang, -O0):
<fprint_inc_DPTR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fprint_inc_DPTR>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
mov    $0x20,%esi
mov    $0x1,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"INC DPTR \00"
define void @fprint_inc_DPTR(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"INC DPTR \00"
define void @fprint_inc_DPTR(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i64 32, i64 1, i32* %0)
ret void
}
int gcd(int x, int y) {
  if (y == 0) {
    return x;
  } else {
    return gcd(y, (x % y));
  }
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1133 <gcd+0x23>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1147 <gcd+0x37>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%esi
call   1030 <gcd@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %edi,%eax
test   %esi,%esi
je     111d <gcd+0x1d>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %4
store i32 %9, i32* %3
br label %16
10: ; preds = %2
%11 = load i32, i32* %5
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = srem i32 %12, %13
%15 = call i32 @gcd(i32 %11, i32 %14)
store i32 %15, i32* %3
br label %16
16: ; preds = %10, %8
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = phi i32 [ %5, %4 ], [ %0, %2 ]
%7 = srem i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %5, %4 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ GL_BLEND;
int /*<<< orphan*/ glDisable(int /*<<< orphan*/);
int /*<<< orphan*/ glEnable(int /*<<< orphan*/);
void bfunc(void) {
  static int state;
  if (state ^= 1)
    glEnable(GL_BLEND);
  else
    glDisable(GL_BLEND);
}


x86 assembly (clang, -O0):
<bfunc>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f0a(%rip),%eax
xor    $0x1,%eax
mov    %eax,0x2f01(%rip)
cmp    $0x0,%eax
je     114f <bfunc+0x2f>
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
call   1030 <glEnable@plt>
jmp    115d <bfunc+0x3d>
mov    0x2e92(%rip),%rax
mov    (%rax),%edi
call   1040 <glDisable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bfunc>:
xorl   $0x1,0x2f0d(%rip)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
je     1137 <bfunc+0x17>
jmp    1030 <glEnable@plt>
jmp    1040 <glDisable@plt>

LLVM IR (-O0):
@bfunc.state = internal global i32 0
@GL_BLEND = global i32 0
define void @bfunc() {
%1 = load i32, i32* @bfunc.state
%2 = xor i32 %1, 1
store i32 %2, i32* @bfunc.state
%3 = icmp ne i32 %2, 0
br i1 %3, label %4, label %7
4: ; preds = %0
%5 = load i32, i32* @GL_BLEND
%6 = call i32 @glEnable(i32 %5)
br label %10
7: ; preds = %0
%8 = load i32, i32* @GL_BLEND
%9 = call i32 @glDisable(i32 %8)
br label %10
10: ; preds = %7, %4
ret void
}

LLVM IR (-O2):
@bfunc.state = internal unnamed_addr global i32 0
@GL_BLEND = global i32 0
define void @bfunc() {
%1 = load i32, i32* @bfunc.state
%2 = xor i32 %1, 1
store i32 %2, i32* @bfunc.state
%3 = icmp eq i32 %2, 0
%4 = load i32, i32* @GL_BLEND
br i1 %3, label %7, label %5
5: ; preds = %0
%6 = tail call i32 @glEnable(i32 %4)
br label %9
7: ; preds = %0
%8 = tail call i32 @glDisable(i32 %4)
br label %9
9: ; preds = %7, %5
ret void
}
/* Variables and functions */
int determinerNbTourFocusEnnemi(unsigned int const);
void focusJoueurIAEnnemi(unsigned int *modeFocus, int *nbTourFocus,
                         int *nbTourAttendreFocus,
                         const unsigned int niveauIA) {
  *modeFocus = 1;
  *nbTourFocus = determinerNbTourFocusEnnemi(niveauIA);
  *nbTourAttendreFocus = -1;
}


x86 assembly (clang, -O0):
<focusJoueurIAEnnemi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x1c(%rbp),%edi
call   1030 <determinerNbTourFocusEnnemi@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
movl   $0xffffffff,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<focusJoueurIAEnnemi>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%rbx
movl   $0x1,(%rdi)
mov    %ecx,%edi
call   1030 <determinerNbTourFocusEnnemi@plt>
mov    %eax,(%rbx)
movl   $0xffffffff,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @focusJoueurIAEnnemi(i32* %0, i32* %1, i32* %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32 %3, i32* %8
%9 = load i32*, i32** %5
store i32 1, i32* %9
%10 = load i32, i32* %8
%11 = call i32 @determinerNbTourFocusEnnemi(i32 %10)
%12 = load i32*, i32** %6
store i32 %11, i32* %12
%13 = load i32*, i32** %7
store i32 -1, i32* %13
ret void
}

LLVM IR (-O2):
define void @focusJoueurIAEnnemi(i32* nocapture writeonly %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2, i32 %3) {
store i32 1, i32* %0
%5 = tail call i32 @determinerNbTourFocusEnnemi(i32 %3)
store i32 %5, i32* %1
store i32 -1, i32* %2
ret void
}
/* Variables and functions */
scalar_t__ sched_yield();
int jimi_yield() { return (sched_yield() ? 0 : 1); }


x86 assembly (clang, -O0):
<jimi_yield>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sched_yield@plt>
mov    %rax,%rdx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<jimi_yield>:
push   %rax
xor    %eax,%eax
call   1030 <sched_yield@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @jimi_yield() {
%1 = call i64 (...) @sched_yield()
%2 = icmp ne i64 %1, 0
%3 = zext i1 %2 to i64
%4 = select i1 %2, i32 0, i32 1
ret i32 %4
}

LLVM IR (-O2):
define i32 @jimi_yield() {
%1 = tail call i64 (...) @sched_yield()
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}