int computeSignal(int exceptionVector) {
  int sigval;
  switch (exceptionVector) {
  case 0:
    sigval = 8;
    break;
  case 1:
    sigval = 5;
    break;
  case 3:
    sigval = 5;
    break;
  case 4:
    sigval = 16;
    break;
  case 5:
    sigval = 16;
    break;
  case 6:
    sigval = 4;
    break;
  case 7:
    sigval = 8;
    break;
  case 8:
    sigval = 7;
    break;
  case 9:
    sigval = 11;
    break;
  case 10:
    sigval = 11;
    break;
  case 11:
    sigval = 11;
    break;
  case 12:
    sigval = 11;
    break;
  case 13:
    sigval = 11;
    break;
  case 14:
    sigval = 11;
    break;
  case 16:
    sigval = 7;
    break;
  default:
    sigval = 7;
  }
  return (sigval);
}


x86 assembly (clang, -O0):
<computeSignal>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %rax,-0x10(%rbp)
sub    $0x10,%rax
ja     11e0 <computeSignal+0xe0>
mov    -0x10(%rbp),%rax
lea    0xedd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x8,-0x8(%rbp)
jmp    11e7 <computeSignal+0xe7>
movl   $0x5,-0x8(%rbp)
jmp    11e7 <computeSignal+0xe7>
movl   $0x5,-0x8(%rbp)
jmp    11e7 <computeSignal+0xe7>
movl   $0x10,-0x8(%rbp)
jmp    11e7 <computeSignal+0xe7>
movl   $0x10,-0x8(%rbp)
jmp    11e7 <computeSignal+0xe7>
movl   $0x4,-0x8(%rbp)
jmp    11e7 <computeSignal+0xe7>
movl   $0x8,-0x8(%rbp)
jmp    11e7 <computeSignal+0xe7>
movl   $0x7,-0x8(%rbp)
jmp    11e7 <computeSignal+0xe7>
movl   $0xb,-0x8(%rbp)
jmp    11e7 <computeSignal+0xe7>
movl   $0xb,-0x8(%rbp)
jmp    11e7 <computeSignal+0xe7>
movl   $0xb,-0x8(%rbp)
jmp    11e7 <computeSignal+0xe7>
movl   $0xb,-0x8(%rbp)
jmp    11e7 <computeSignal+0xe7>
movl   $0xb,-0x8(%rbp)
jmp    11e7 <computeSignal+0xe7>
movl   $0xb,-0x8(%rbp)
jmp    11e7 <computeSignal+0xe7>
movl   $0x7,-0x8(%rbp)
jmp    11e7 <computeSignal+0xe7>
movl   $0x7,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<computeSignal>:
mov    $0x7,%eax
cmp    $0x10,%edi
ja     1117 <computeSignal+0x17>
movslq %edi,%rax
lea    0xeec(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @computeSignal(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
switch i32 %4, label %20 [
i32 0, label %5
i32 1, label %6
i32 3, label %7
i32 4, label %8
i32 5, label %9
i32 6, label %10
i32 7, label %11
i32 8, label %12
i32 9, label %13
i32 10, label %14
i32 11, label %15
i32 12, label %16
i32 13, label %17
i32 14, label %18
i32 16, label %19
]
5: ; preds = %1
store i32 8, i32* %3
br label %21
6: ; preds = %1
store i32 5, i32* %3
br label %21
7: ; preds = %1
store i32 5, i32* %3
br label %21
8: ; preds = %1
store i32 16, i32* %3
br label %21
9: ; preds = %1
store i32 16, i32* %3
br label %21
10: ; preds = %1
store i32 4, i32* %3
br label %21
11: ; preds = %1
store i32 8, i32* %3
br label %21
12: ; preds = %1
store i32 7, i32* %3
br label %21
13: ; preds = %1
store i32 11, i32* %3
br label %21
14: ; preds = %1
store i32 11, i32* %3
br label %21
15: ; preds = %1
store i32 11, i32* %3
br label %21
16: ; preds = %1
store i32 11, i32* %3
br label %21
17: ; preds = %1
store i32 11, i32* %3
br label %21
18: ; preds = %1
store i32 11, i32* %3
br label %21
19: ; preds = %1
store i32 7, i32* %3
br label %21
20: ; preds = %1
store i32 7, i32* %3
br label %21
21: ; preds = %20, %19, %18, %17, %16, %15, %14, %13, %12, %11, %10, %9, %8, %7, %6, %5
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
@switch.table.computeSignal = [17 x i32] [i32 8, i32 5, i32 7, i32 5, i32 16, i32 16, i32 4, i32 8, i32 7, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 7, i32 7]
define i32 @computeSignal(i32 %0) {
%2 = icmp ult i32 %0, 17
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = sext i32 %0 to i64
%5 = getelementptr inbounds [17 x i32], [17 x i32]* @switch.table.computeSignal, i64 0, i64 %4
%6 = load i32, i32* %5
br label %7
7: ; preds = %1, %3
%8 = phi i32 [ %6, %3 ], [ 7, %1 ]
ret i32 %8
}