xunge/DecIR huggingface dataset:
/* Variables and functions */
int foo(int);
int TEST_FOO(int vector_input, int vector_output) {
  if (foo(vector_input) != vector_output) {
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<TEST_FOO>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <foo@plt>
cmp    -0xc(%rbp),%eax
je     113b <TEST_FOO+0x2b>
movl   $0xffffffff,-0x4(%rbp)
jmp    1142 <TEST_FOO+0x32>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TEST_FOO>:
push   %rbx
mov    %esi,%ebx
call   1030 <foo@plt>
xor    %ecx,%ecx
cmp    %ebx,%eax
setne  %cl
neg    %ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @TEST_FOO(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = call i32 @foo(i32 %6)
%8 = load i32, i32* %5
%9 = icmp ne i32 %7, %8
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 -1, i32* %3
br label %12
11: ; preds = %2
store i32 0, i32* %3
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @TEST_FOO(i32 %0, i32 %1) {
%3 = tail call i32 @foo(i32 %0)
%4 = icmp ne i32 %3, %1
%5 = sext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ rul___emit_string(char *);
void rul__emit_embedded_comment(char *arbitrary_str) {
  rul___emit_string("/* ");
  rul___emit_string(arbitrary_str);
  rul___emit_string(" */");
}


x86 assembly (clang, -O0):
<rul__emit_embedded_comment>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <rul___emit_string@plt>
mov    -0x8(%rbp),%rdi
call   1030 <rul___emit_string@plt>
lea    0xecc(%rip),%rdi
call   1030 <rul___emit_string@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rul__emit_embedded_comment>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
call   1030 <rul___emit_string@plt>
mov    %rbx,%rdi
call   1030 <rul___emit_string@plt>
lea    0xed5(%rip),%rdi
pop    %rbx
jmp    1030 <rul___emit_string@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"/* \00"
@.str.1 = [4 x i8] c" */\00"
define void @rul__emit_embedded_comment(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @rul___emit_string(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 @rul___emit_string(i8* %4)
%6 = call i32 @rul___emit_string(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"/* \00"
@.str.1 = [4 x i8] c" */\00"
define void @rul__emit_embedded_comment(i8* %0) {
%2 = tail call i32 @rul___emit_string(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @rul___emit_string(i8* %0)
%4 = tail call i32 @rul___emit_string(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bif_register_arity1(char const *, float (*)(float));
void nanocalc_register_bif_arity1(const char *name, float (*fun)(float)) {
  bif_register_arity1(name, fun);
}


x86 assembly (clang, -O0):
<nanocalc_register_bif_arity1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <bif_register_arity1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nanocalc_register_bif_arity1>:
jmp    1030 <bif_register_arity1@plt>

LLVM IR (-O0):
define void @nanocalc_register_bif_arity1(i8* %0, float (float)* %1) {
%3 = alloca i8*
%4 = alloca float (float)*
store i8* %0, i8** %3
store float (float)* %1, float (float)** %4
%5 = load i8*, i8** %3
%6 = load float (float)*, float (float)** %4
%7 = call i32 @bif_register_arity1(i8* %5, float (float)* %6)
ret void
}

LLVM IR (-O2):
define void @nanocalc_register_bif_arity1(i8* %0, float (float)* %1) {
%3 = tail call i32 @bif_register_arity1(i8* %0, float (float)* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void sig_handler() {
  printf("Interrupted by SIGALRM\n");
  printf("Test FAILED: main blocked on barrier wait\n");
  exit(1);
}


x86 assembly (clang, -O0):
<sig_handler>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<sig_handler>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
lea    0xee3(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"Interrupted by SIGALRM\0A\00"
@.str.1 = [43 x i8] c"Test FAILED: main blocked on barrier wait\0A\00"
define void @sig_handler() {
%1 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@str = [23 x i8] c"Interrupted by SIGALRM\00"
@str.2 = [42 x i8] c"Test FAILED: main blocked on barrier wait\00"
define void @sig_handler() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @str.2, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
size_t fread(void *, int, size_t, int /*<<< orphan*/ *);
size_t FILEread(void *fp, void *buffer, size_t size) {
  FILE *f = (FILE *)(fp);
  return fread(buffer, 1, size, f);
}


x86 assembly (clang, -O0):
<FILEread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x1,%esi
call   1030 <fread@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FILEread>:
mov    %rdi,%rcx
mov    %rsi,%rdi
mov    $0x1,%esi
jmp    1030 <fread@plt>

LLVM IR (-O0):
define i64 @FILEread(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
store i32* %9, i32** %7
%10 = load i8*, i8** %5
%11 = load i64, i64* %6
%12 = load i32*, i32** %7
%13 = call i64 @fread(i8* %10, i32 1, i64 %11, i32* %12)
ret i64 %13
}

LLVM IR (-O2):
define i64 @FILEread(i8* nocapture %0, i8* nocapture %1, i64 %2) {
%4 = bitcast i8* %0 to i32*
%5 = tail call i64 @fread(i8* %1, i32 1, i64 %2, i32* %4)
ret i64 %5
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ chr8setBank0(int);
void m36_setParams42XX(uint16_t addr, uint8_t val) {
  (void)addr;
  chr8setBank0((val & 0xF) << 13);
}


x86 assembly (clang, -O0):
<m36_setParams42XX>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
and    $0xf,%edi
shl    $0xd,%edi
call   1030 <chr8setBank0@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m36_setParams42XX>:
mov    %esi,%edi
and    $0xf,%edi
shl    $0xd,%edi
jmp    1030 <chr8setBank0@plt>

LLVM IR (-O0):
define void @m36_setParams42XX(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = and i32 %6, 15
%8 = shl i32 %7, 13
%9 = call i32 @chr8setBank0(i32 %8)
ret void
}

LLVM IR (-O2):
define void @m36_setParams42XX(i32 %0, i32 %1) {
%3 = shl i32 %1, 13
%4 = and i32 %3, 122880
%5 = tail call i32 @chr8setBank0(i32 %4)
ret void
}
/* Type definitions */
struct flashrom_chipset_info {
  int dummy;
};

/* Variables and functions */
struct flashrom_chipset_info *flashrom_supported_chipsets(void) {
  return NULL;
}


x86 assembly (clang, -O0):
<flashrom_supported_chipsets>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flashrom_supported_chipsets>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.flashrom_chipset_info = type { i32 }
define %struct.flashrom_chipset_info* @flashrom_supported_chipsets() {
ret %struct.flashrom_chipset_info* null
}

LLVM IR (-O2):
%struct.flashrom_chipset_info = type { i32 }
define noalias %struct.flashrom_chipset_info* @flashrom_supported_chipsets() {
ret %struct.flashrom_chipset_info* null
}
const char *String_Description(void) {
  return "The `String` type is a wrapper around the native C string type. This "
         "includes strings that are allocated on either the Stack or the Heap."
         "\n\n"
         "For strings allocated on the heap a number of extra operations are "
         "provided overs standard C strings such as concatenation.";
}


x86 assembly (clang, -O0):
<String_Description>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<String_Description>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [263 x i8] c"The `String` type is a wrapper around the native C string type. This includes strings that are allocated on either the Stack or the Heap.\0A\0AFor strings allocated on the heap a number of extra operations are provided overs standard C strings such as concatenation.\00"
define i8* @String_Description() {
ret i8* getelementptr inbounds ([263 x i8], [263 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [263 x i8] c"The `String` type is a wrapper around the native C string type. This includes strings that are allocated on either the Stack or the Heap.\0A\0AFor strings allocated on the heap a number of extra operations are provided overs standard C strings such as concatenation.\00"
define i8* @String_Description() {
ret i8* getelementptr inbounds ([263 x i8], [263 x i8]* @.str, i64 0, i64 0)
}
int execute_ioprio_set() { return 0; }


x86 assembly (clang, -O0):
<execute_ioprio_set>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_ioprio_set>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_ioprio_set() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_ioprio_set() {
ret i32 0
}
int compare(const void *op1, const void *op2) {
  int *l;
  int *r;
  l = (int *)op1;
  r = (int *)op2;
  return *l - *r;
}


x86 assembly (clang, -O0):
<compare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @compare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %5
%12 = load i32, i32* %11
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = sub nsw i32 %12, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @compare(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}
/* Variables and functions */
char *UTIL_appendStr(char *, char *);
char *OC_mkIsKindFuncName(char *name) { return UTIL_appendStr("is", name); }


x86 assembly (clang, -O0):
<OC_mkIsKindFuncName>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <UTIL_appendStr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OC_mkIsKindFuncName>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <UTIL_appendStr@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"is\00"
define i8* @OC_mkIsKindFuncName(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @UTIL_appendStr(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i8* %4
}

LLVM IR (-O2):
@.str = [3 x i8] c"is\00"
define i8* @OC_mkIsKindFuncName(i8* %0) {
%2 = tail call i8* @UTIL_appendStr(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i8* %2
}
void setup_nanosleep_sems(struct sem_wakeup_info **wi, int num_semids) {
  return;
}


x86 assembly (clang, -O0):
<setup_nanosleep_sems>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup_nanosleep_sems>:
ret

LLVM IR (-O0):
%struct.sem_wakeup_info = type opaque
define void @setup_nanosleep_sems(%struct.sem_wakeup_info** %0, i32 %1) {
%3 = alloca %struct.sem_wakeup_info**
%4 = alloca i32
store %struct.sem_wakeup_info** %0, %struct.sem_wakeup_info*** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.sem_wakeup_info = type opaque
define void @setup_nanosleep_sems(%struct.sem_wakeup_info** nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *, int /*<<< orphan*/);
int clear_multprec_data(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc(498, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<clear_multprec_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x1f2,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_multprec_data>:
mov    $0x1f2,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @clear_multprec_data() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 498, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @clear_multprec_data() {
%1 = tail call i32 @_ada_use_c2phc(i32 498, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
int hash_close(int handle) { return -1; }


x86 assembly (clang, -O0):
<hash_close>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_close>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @hash_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @hash_close(i32 %0) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ errprintf(char *, char const *, int);
void lprintf_file_and_line(const char *file, int line) {
  errprintf("%s(%d): ", file, line);
}


x86 assembly (clang, -O0):
<lprintf_file_and_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
lea    0xed3(%rip),%rdi
call   1030 <errprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lprintf_file_and_line>:
mov    %esi,%edx
mov    %rdi,%rsi
lea    0xee4(%rip),%rdi
jmp    1030 <errprintf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"%s(%d): \00"
define void @lprintf_file_and_line(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @errprintf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"%s(%d): \00"
define void @lprintf_file_and_line(i8* %0, i32 %1) {
%3 = tail call i32 @errprintf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ addstr(char *);
int /*<<< orphan*/ move(int, int /*<<< orphan*/);
clearbottom() {
  move(20, 0);
  addstr("                                                                     "
         "       \n");
  addstr("                                                                     "
         "       \n");
  addstr("                                                                     "
         "       ");
}


x86 assembly (clang, -O0):
<clearbottom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x14,%edi
xor    %esi,%esi
call   1040 <move@plt>
lea    0xec5(%rip),%rdi
call   1030 <addstr@plt>
lea    0xeb9(%rip),%rdi
call   1030 <addstr@plt>
lea    0xefb(%rip),%rdi
call   1030 <addstr@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clearbottom>:
push   %rbx
mov    $0x14,%edi
xor    %esi,%esi
call   1040 <move@plt>
lea    0xecc(%rip),%rbx
mov    %rbx,%rdi
call   1030 <addstr@plt>
mov    %rbx,%rdi
call   1030 <addstr@plt>
lea    0xf03(%rip),%rdi
pop    %rbx
jmp    1030 <addstr@plt>

LLVM IR (-O0):
@.str = [78 x i8] c" \0A\00"
@.str.1 = [77 x i8] c" \00"
define i32 @clearbottom() {
%1 = alloca i32
%2 = call i32 @move(i32 20, i32 0)
%3 = call i32 @addstr(i8* getelementptr inbounds ([78 x i8], [78 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @addstr(i8* getelementptr inbounds ([78 x i8], [78 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @addstr(i8* getelementptr inbounds ([77 x i8], [77 x i8]* @.str.1, i64 0, i64 0))
%6 = load i32, i32* %1
ret i32 %6
}

LLVM IR (-O2):
@.str = [78 x i8] c" \0A\00"
@.str.1 = [77 x i8] c" \00"
define i32 @clearbottom() {
%1 = tail call i32 @move(i32 20, i32 0)
%2 = tail call i32 @addstr(i8* getelementptr inbounds ([78 x i8], [78 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @addstr(i8* getelementptr inbounds ([78 x i8], [78 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @addstr(i8* getelementptr inbounds ([77 x i8], [77 x i8]* @.str.1, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ IntDisable(int /*<<< orphan*/);
int /*<<< orphan*/ IntUnregister(int /*<<< orphan*/);
int /*<<< orphan*/ _I2CIntNumberGet(int /*<<< orphan*/);
void I2CIntUnregister(uint32_t ui32Base) {
  uint32_t ui32Int;
  ;
  ui32Int = _I2CIntNumberGet(ui32Base);
  ;
  IntDisable(ui32Int);
  IntUnregister(ui32Int);
}


x86 assembly (clang, -O0):
<I2CIntUnregister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <_I2CIntNumberGet@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <IntDisable@plt>
mov    -0x8(%rbp),%edi
call   1040 <IntUnregister@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CIntUnregister>:
push   %rbx
call   1050 <_I2CIntNumberGet@plt>
mov    %eax,%ebx
mov    %eax,%edi
call   1030 <IntDisable@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <IntUnregister@plt>

LLVM IR (-O0):
define void @I2CIntUnregister(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @_I2CIntNumberGet(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @IntDisable(i32 %6)
%8 = load i32, i32* %3
%9 = call i32 @IntUnregister(i32 %8)
ret void
}

LLVM IR (-O2):
define void @I2CIntUnregister(i32 %0) {
%2 = tail call i32 @_I2CIntNumberGet(i32 %0)
%3 = tail call i32 @IntDisable(i32 %2)
%4 = tail call i32 @IntUnregister(i32 %2)
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
void I2CSlaveDataPut(uint32_t ui32Base, uint8_t ui8Data) {
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000808))) = ui8Data;
}


x86 assembly (clang, -O0):
<I2CSlaveDataPut>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x808(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CSlaveDataPut>:
mov    %rsi,0x808(%rdi)
ret

LLVM IR (-O0):
define void @I2CSlaveDataPut(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add nsw i64 %6, 2056
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @I2CSlaveDataPut(i64 %0, i64 %1) {
%3 = add nsw i64 %0, 2056
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
void *malloc(int);
int /*<<< orphan*/ stderr;
void *fmalloc(int size) {
  void *p = malloc(size);
  if (!p) {
    fputs("giftoc: Out of memory!\n", stderr);
    exit(1);
  }
  return p;
}


x86 assembly (clang, -O0):
<fmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1171 <fmalloc+0x41>
mov    0x2e87(%rip),%rax
mov    (%rax),%esi
lea    0xe9e(%rip),%rdi
call   1030 <fputs@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmalloc>:
push   %rax
call   1040 <malloc@plt>
test   %rax,%rax
je     113d <fmalloc+0xd>
pop    %rcx
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%esi
lea    0xeb3(%rip),%rdi
call   1030 <fputs@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"giftoc: Out of memory!\0A\00"
@stderr = global i32 0
define i8* @fmalloc(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8* @malloc(i32 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = load i32, i32* @stderr
%10 = call i32 @fputs(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = call i32 @exit(i32 1)
unreachable
12: ; preds = %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@.str = [24 x i8] c"giftoc: Out of memory!\0A\00"
@stderr = global i32 0
define noalias i8* @fmalloc(i32 %0) {
%2 = tail call i8* @malloc(i32 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fputs(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = tail call i32 @exit(i32 1)
unreachable
8: ; preds = %1
ret i8* %2
}
ISR(TIMER2_COMPA_vect) {
  DEBUG("ISR "
        "TIMER2_COMPA"
        " occured");
}


x86 assembly (clang, -O0):
<ISR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
lea    0xede(%rip),%rdi
mov    $0x0,%al
call   1030 <DEBUG@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ISR>:
lea    0xee9(%rip),%rdi
xor    %eax,%eax
jmp    1030 <DEBUG@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"ISR TIMER2_COMPA occured\00"
define i32 @ISR(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 (i8*, ...) bitcast (i32 (...)* @DEBUG to i32 (i8*, ...)*)(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
@.str = [25 x i8] c"ISR TIMER2_COMPA occured\00"
define i32 @ISR(i32 %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @DEBUG to i32 (i8*, ...)*)(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
const int func(const int x) { return x * x; }


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
mov    %edi,%eax
imul   %edi,%eax
ret

LLVM IR (-O0):
define i32 @func(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @func(i32 %0) {
%2 = mul nsw i32 %0, %0
ret i32 %2
}
/* Variables and functions */
float tanh(float);
float call_tanhf(float x) { return tanh((float)x); }


x86 assembly (clang, -O0):
<call_tanhf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <tanh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_tanhf>:
jmp    1030 <tanh@plt>

LLVM IR (-O0):
define float @call_tanhf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @tanh(float %3)
ret float %4
}

LLVM IR (-O2):
define float @call_tanhf(float %0) {
%2 = tail call float @tanh(float %0)
ret float %2
}
double r13(void *x) { return *(double *)(x + 32755); }


x86 assembly (clang, -O0):
<r13>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  0x7ff3(%rax),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<r13>:
movsd  0x7ff3(%rdi),%xmm0
ret

LLVM IR (-O0):
define double @r13(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr i8, i8* %3, i64 32755
%5 = bitcast i8* %4 to double*
%6 = load double, double* %5
ret double %6
}

LLVM IR (-O2):
define double @r13(i8* nocapture %0) {
%2 = getelementptr i8, i8* %0, i64 32755
%3 = bitcast i8* %2 to double*
%4 = load double, double* %3
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ delete_dsm();
int /*<<< orphan*/ delete_runner();
int /*<<< orphan*/ init_dsm();
int /*<<< orphan*/ init_runner();
int /*<<< orphan*/ init_states();
int main() {
  init_states();
  init_dsm();
  init_runner();
  delete_runner();
  delete_dsm();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <init_states@plt>
mov    $0x0,%al
call   1060 <init_dsm@plt>
mov    $0x0,%al
call   1050 <init_runner@plt>
mov    $0x0,%al
call   1070 <delete_runner@plt>
mov    $0x0,%al
call   1040 <delete_dsm@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <init_states@plt>
xor    %eax,%eax
call   1060 <init_dsm@plt>
xor    %eax,%eax
call   1050 <init_runner@plt>
xor    %eax,%eax
call   1070 <delete_runner@plt>
xor    %eax,%eax
call   1040 <delete_dsm@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @init_states()
%2 = call i32 (...) @init_dsm()
%3 = call i32 (...) @init_runner()
%4 = call i32 (...) @delete_runner()
%5 = call i32 (...) @delete_dsm()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @init_states()
%2 = tail call i32 (...) @init_dsm()
%3 = tail call i32 (...) @init_runner()
%4 = tail call i32 (...) @delete_runner()
%5 = tail call i32 (...) @delete_dsm()
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int x_root;
};
typedef TYPE_1__ XMotionEvent;

/* Variables and functions */
void set_XMotionEvent_x_root(void *_p, int _v) {
  ((XMotionEvent *)_p)->x_root = (int)_v;
}


x86 assembly (clang, -O0):
<set_XMotionEvent_x_root>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XMotionEvent_x_root>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XMotionEvent_x_root(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XMotionEvent_x_root(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void list_att_supported_models() {
  printf("Supported AT&T targets:\n"
         "SSID pattern: ATTXXXXXXX\n"
         "[+] nvg589\n"
         "[+] nvg599\n");
}


x86 assembly (clang, -O0):
<list_att_supported_models>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_att_supported_models>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [72 x i8] c"Supported AT&T targets:\0ASSID pattern: ATTXXXXXXX\0A[+] nvg589\0A[+] nvg599\0A\00"
define void @list_att_supported_models() {
%1 = call i32 @printf(i8* getelementptr inbounds ([72 x i8], [72 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [71 x i8] c"Supported AT&T targets:\0ASSID pattern: ATTXXXXXXX\0A[+] nvg589\0A[+] nvg599\00"
define void @list_att_supported_models() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([71 x i8], [71 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int printf(char *, char *);
int print_usage(char *prog) {
  return printf("Usage: %s -mode\nWhere mode is [l]cd, [n]tsc, or [p]al\n",
                prog);
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [55 x i8] c"Usage: %s -mode\0AWhere mode is [l]cd, [n]tsc, or [p]al\0A\00"
define i32 @print_usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 %4
}

LLVM IR (-O2):
@.str = [55 x i8] c"Usage: %s -mode\0AWhere mode is [l]cd, [n]tsc, or [p]al\0A\00"
define i32 @print_usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 %2
}
int fun1394() { return 1394; }


x86 assembly (clang, -O0):
<fun1394>:
push   %rbp
mov    %rsp,%rbp
mov    $0x572,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1394>:
mov    $0x572,%eax
ret

LLVM IR (-O0):
define i32 @fun1394() {
ret i32 1394
}

LLVM IR (-O2):
define i32 @fun1394() {
ret i32 1394
}
/* Type definitions */
struct timezone {
  int dummy;
};
struct timeval {
  double tv_sec;
  double tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, struct timezone *);
double dtime() {
  double tseconds = 0.0;
  struct timeval mytime;
  gettimeofday(&mytime, (struct timezone *)0);
  tseconds = (double)(mytime.tv_sec * 1.0e3 + mytime.tv_usec * 1.0e-3);
  return (tseconds);
}


x86 assembly (clang, -O0):
<dtime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
lea    -0x18(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
movsd  -0x18(%rbp),%xmm0
movsd  0xece(%rip),%xmm1
mulsd  -0x10(%rbp),%xmm1
movsd  0xeb9(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dtime>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
movsd  0x10(%rsp),%xmm1
mulsd  0xed2(%rip),%xmm1
movsd  0x8(%rsp),%xmm0
mulsd  0xecc(%rip),%xmm0
addsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { double, double }
%struct.timezone = type { i32 }
define double @dtime() {
%1 = alloca double
%2 = alloca %struct.timeval
store double 0.000000e+00, double* %1
%3 = call i32 @gettimeofday(%struct.timeval* %2, %struct.timezone* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i32 0, i32 0
%5 = load double, double* %4
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i32 0, i32 1
%7 = load double, double* %6
%8 = fmul double %7, 1.000000e-03
%9 = call double @llvm.fmuladd.f64(double %5, double 1.000000e+03, double %8)
store double %9, double* %1
%10 = load double, double* %1
ret double %10
}

LLVM IR (-O2):
%struct.timeval = type { double, double }
%struct.timezone = type { i32 }
define double @dtime() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, %struct.timezone* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load double, double* %4
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%7 = load double, double* %6
%8 = fmul double %7, 1.000000e-03
%9 = tail call double @llvm.fmuladd.f64(double %5, double 1.000000e+03, double %8)
ret double %9
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void usage(void) {
  puts("usage: minibz2 [-d] [-{1,2,..9}] [[srcfilename] destfilename]");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [62 x i8] c"usage: minibz2 [-d] [-{1,2,..9}] [[srcfilename] destfilename]\00"
define void @usage() {
%1 = call i32 @puts(i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [62 x i8] c"usage: minibz2 [-d] [-{1,2,..9}] [[srcfilename] destfilename]\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int O_CREAT;
int O_TRUNC;
int O_WRONLY;
int _open(char const *, int, int /*<<< orphan*/);
int __creat(const char *path, mode_t mode) {
  return (_open(path, O_WRONLY | O_CREAT | O_TRUNC, mode));
}


x86 assembly (clang, -O0):
<__creat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e9e(%rip),%rax
mov    (%rax),%esi
mov    0x2ec5(%rip),%rax
or     (%rax),%esi
mov    0x2eb4(%rip),%rax
or     (%rax),%esi
mov    -0xc(%rbp),%edx
call   1030 <_open@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__creat>:
mov    0x2eb1(%rip),%rcx
mov    0x2eda(%rip),%rax
mov    (%rax),%eax
or     (%rcx),%eax
mov    %esi,%edx
mov    0x2ec5(%rip),%rcx
or     (%rcx),%eax
mov    %eax,%esi
jmp    1030 <_open@plt>

LLVM IR (-O0):
@O_WRONLY = global i32 0
@O_CREAT = global i32 0
@O_TRUNC = global i32 0
define i32 @__creat(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* @O_WRONLY
%7 = load i32, i32* @O_CREAT
%8 = or i32 %6, %7
%9 = load i32, i32* @O_TRUNC
%10 = or i32 %8, %9
%11 = load i32, i32* %4
%12 = call i32 @_open(i8* %5, i32 %10, i32 %11)
ret i32 %12
}

LLVM IR (-O2):
@O_WRONLY = global i32 0
@O_CREAT = global i32 0
@O_TRUNC = global i32 0
define i32 @__creat(i8* %0, i32 %1) {
%3 = load i32, i32* @O_WRONLY
%4 = load i32, i32* @O_CREAT
%5 = or i32 %4, %3
%6 = load i32, i32* @O_TRUNC
%7 = or i32 %5, %6
%8 = tail call i32 @_open(i8* %0, i32 %7, i32 %1)
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
struct spi_sdcard {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ read_data(struct spi_sdcard *, int /*<<< orphan*/);
int /*<<< orphan*/ set_next_state(struct spi_sdcard *);
void spi_sdcard_next_byte_to_slave(struct spi_sdcard *sd, uint8_t v) {
  read_data(sd, v);
  set_next_state(sd);
}


x86 assembly (clang, -O0):
<spi_sdcard_next_byte_to_slave>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <read_data@plt>
mov    -0x8(%rbp),%rdi
call   1040 <set_next_state@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_sdcard_next_byte_to_slave>:
push   %rbx
mov    %rdi,%rbx
call   1030 <read_data@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <set_next_state@plt>

LLVM IR (-O0):
%struct.spi_sdcard = type { i32 }
define void @spi_sdcard_next_byte_to_slave(%struct.spi_sdcard* %0, i32 %1) {
%3 = alloca %struct.spi_sdcard*
%4 = alloca i32
store %struct.spi_sdcard* %0, %struct.spi_sdcard** %3
store i32 %1, i32* %4
%5 = load %struct.spi_sdcard*, %struct.spi_sdcard** %3
%6 = load i32, i32* %4
%7 = call i32 @read_data(%struct.spi_sdcard* %5, i32 %6)
%8 = load %struct.spi_sdcard*, %struct.spi_sdcard** %3
%9 = call i32 @set_next_state(%struct.spi_sdcard* %8)
ret void
}

LLVM IR (-O2):
%struct.spi_sdcard = type { i32 }
define void @spi_sdcard_next_byte_to_slave(%struct.spi_sdcard* %0, i32 %1) {
%3 = tail call i32 @read_data(%struct.spi_sdcard* %0, i32 %1)
%4 = tail call i32 @set_next_state(%struct.spi_sdcard* %0)
ret void
}
signed long cturn(signed long angle0, signed long angle1) {
  signed long de = (angle1 - angle0);
  if (de > 2048) {
    de = -4096 + de;
  } else if (de < -2048) {
    de = 4096 + de;
  }
  return de;
}


x86 assembly (clang, -O0):
<cturn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
sub    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x800,-0x18(%rbp)
jle    1139 <cturn+0x39>
mov    -0x18(%rbp),%rax
add    $0xfffffffffffff000,%rax
mov    %rax,-0x18(%rbp)
jmp    115a <cturn+0x5a>
cmpq   $0xfffffffffffff800,-0x18(%rbp)
ff
jge    1155 <cturn+0x55>
mov    -0x18(%rbp),%rax
add    $0x1000,%rax
mov    %rax,-0x18(%rbp)
jmp    115a <cturn+0x5a>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cturn>:
sub    %rdi,%rsi
lea    0x1000(%rsi),%rax
cmp    $0xfffffffffffff800,%rsi
cmovge %rsi,%rax
lea    -0x1000(%rsi),%rcx
cmp    $0x801,%rsi
cmovge %rcx,%rax
ret

LLVM IR (-O0):
define i64 @cturn(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = load i64, i64* %3
%8 = sub nsw i64 %6, %7
store i64 %8, i64* %5
%9 = load i64, i64* %5
%10 = icmp sgt i64 %9, 2048
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = load i64, i64* %5
%13 = add nsw i64 -4096, %12
store i64 %13, i64* %5
br label %21
14: ; preds = %2
%15 = load i64, i64* %5
%16 = icmp slt i64 %15, -2048
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i64, i64* %5
%19 = add nsw i64 4096, %18
store i64 %19, i64* %5
br label %20
20: ; preds = %17, %14
br label %21
21: ; preds = %20, %11
%22 = load i64, i64* %5
ret i64 %22
}

LLVM IR (-O2):
define i64 @cturn(i64 %0, i64 %1) {
%3 = sub nsw i64 %1, %0
%4 = icmp sgt i64 %3, 2048
%5 = add nsw i64 %3, -4096
%6 = icmp slt i64 %3, -2048
%7 = add nsw i64 %3, 4096
%8 = select i1 %6, i64 %7, i64 %3
%9 = select i1 %4, i64 %5, i64 %8
ret i64 %9
}
void Huff_DeleteNode(void **tree1, void **tree2) {
  tree2[0] = tree1[262];
  tree1[262] = tree2;
}


x86 assembly (clang, -O0):
<Huff_DeleteNode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0x830(%rax),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x830(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Huff_DeleteNode>:
mov    0x830(%rdi),%rax
mov    %rax,(%rsi)
mov    %rsi,0x830(%rdi)
ret

LLVM IR (-O0):
define void @Huff_DeleteNode(i8** %0, i8** %1) {
%3 = alloca i8**
%4 = alloca i8**
store i8** %0, i8*** %3
store i8** %1, i8*** %4
%5 = load i8**, i8*** %3
%6 = getelementptr inbounds i8*, i8** %5, i64 262
%7 = load i8*, i8** %6
%8 = load i8**, i8*** %4
%9 = getelementptr inbounds i8*, i8** %8, i64 0
store i8* %7, i8** %9
%10 = load i8**, i8*** %4
%11 = bitcast i8** %10 to i8*
%12 = load i8**, i8*** %3
%13 = getelementptr inbounds i8*, i8** %12, i64 262
store i8* %11, i8** %13
ret void
}

LLVM IR (-O2):
define void @Huff_DeleteNode(i8** nocapture %0, i8** %1) {
%3 = getelementptr inbounds i8*, i8** %0, i64 262
%4 = load i8*, i8** %3
store i8* %4, i8** %1
%5 = bitcast i8** %3 to i8***
store i8** %1, i8*** %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void println(char *msg) {
  printf(msg);
  printf("\n");
}


x86 assembly (clang, -O0):
<println>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <printf@plt>
lea    0xed4(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<println>:
push   %rax
call   1040 <printf@plt>
mov    $0xa,%edi
pop    %rax
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @println(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
define void @println(i8* nocapture %0) {
%2 = tail call i32 @printf(i8* dereferenceable(1) %0)
%3 = tail call i32 @putchar(i32 10)
ret void
}
/* Type definitions */
struct obj {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cintern(char *);
int /*<<< orphan*/ setvar(int /*<<< orphan*/, int /*<<< orphan*/, struct obj *);
void init_ss_version(void) {
  setvar(cintern("*ss-version*"),
         cintern("$Id: ss.c,v 1.7 1998/03/05 13:26:47 gjc Exp $"),
         ((struct obj *)0));
}


x86 assembly (clang, -O0):
<init_ss_version>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1040 <cintern@plt>
mov    %eax,-0x4(%rbp)
lea    0xecf(%rip),%rdi
call   1040 <cintern@plt>
mov    -0x4(%rbp),%edi
mov    %eax,%esi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <setvar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_ss_version>:
push   %rbx
lea    0xed8(%rip),%rdi
call   1040 <cintern@plt>
mov    %eax,%ebx
lea    0xed7(%rip),%rdi
call   1040 <cintern@plt>
mov    %ebx,%edi
mov    %eax,%esi
xor    %edx,%edx
pop    %rbx
jmp    1030 <setvar@plt>

LLVM IR (-O0):
%struct.obj = type { i32 }
@.str = [13 x i8] c"*ss-version*\00"
@.str.1 = [46 x i8] c"$Id: ss.c,v 1.7 1998/03/05 13:26:47 gjc Exp $\00"
define void @init_ss_version() {
%1 = call i32 @cintern(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @cintern(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @setvar(i32 %1, i32 %2, %struct.obj* null)
ret void
}

LLVM IR (-O2):
%struct.obj = type { i32 }
@.str = [13 x i8] c"*ss-version*\00"
@.str.1 = [46 x i8] c"$Id: ss.c,v 1.7 1998/03/05 13:26:47 gjc Exp $\00"
define void @init_ss_version() {
%1 = tail call i32 @cintern(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @cintern(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @setvar(i32 %1, i32 %2, %struct.obj* null)
ret void
}
int checknum(int m) {
  int len;
  if (m == 2)
    return 1;
  for (len = 2; len * len <= m; len++)
    if (m % len == 0)
      return 0;
  return 1;
}


x86 assembly (clang, -O0):
<checknum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jne    111d <checknum+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    116a <checknum+0x6a>
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1163 <checknum+0x63>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1150 <checknum+0x50>
movl   $0x0,-0x4(%rbp)
jmp    116a <checknum+0x6a>
jmp    1155 <checknum+0x55>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1124 <checknum+0x24>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checknum>:
mov    $0x1,%ecx
cmp    $0x4,%edi
jl     1125 <checknum+0x25>
mov    $0x2,%esi
nop
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1128 <checknum+0x28>
add    $0x1,%esi
mov    %esi,%eax
imul   %esi,%eax
cmp    %edi,%eax
jle    1110 <checknum+0x10>
mov    %ecx,%eax
ret
xor    %ecx,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @checknum(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 2
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %26
8: ; preds = %1
store i32 2, i32* %4
br label %9
9: ; preds = %22, %8
%10 = load i32, i32* %4
%11 = load i32, i32* %4
%12 = mul nsw i32 %10, %11
%13 = load i32, i32* %3
%14 = icmp sle i32 %12, %13
br i1 %14, label %15, label %25
15: ; preds = %9
%16 = load i32, i32* %3
%17 = load i32, i32* %4
%18 = srem i32 %16, %17
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %15
store i32 0, i32* %2
br label %26
21: ; preds = %15
br label %22
22: ; preds = %21
%23 = load i32, i32* %4
%24 = add nsw i32 %23, 1
store i32 %24, i32* %4
br label %9
25: ; preds = %9
store i32 1, i32* %2
br label %26
26: ; preds = %25, %20, %7
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @checknum(i32 %0) {
%2 = icmp slt i32 %0, 4
br i1 %2, label %11, label %6
3: ; preds = %6
%4 = mul nsw i32 %10, %10
%5 = icmp sgt i32 %4, %0
br i1 %5, label %11, label %6
6: ; preds = %1, %3
%7 = phi i32 [ %10, %3 ], [ 2, %1 ]
%8 = srem i32 %0, %7
%9 = icmp eq i32 %8, 0
%10 = add nuw nsw i32 %7, 1
br i1 %9, label %11, label %3
11: ; preds = %6, %3, %1
%12 = phi i32 [ 1, %1 ], [ 0, %6 ], [ 1, %3 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ g();
f(long long i) {
  if ((i ^ (1LL << 34)) == 0)
    g();
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
movabs $0x400000000,%rax
xor    -0x10(%rbp),%rax
cmp    $0x0,%rax
jne    113b <f+0x2b>
mov    $0x0,%al
call   1030 <g@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
movabs $0x400000000,%rax
cmp    %rax,%rdi
jne    112b <f+0x1b>
push   %rax
xor    %eax,%eax
call   1030 <g@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @f(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = xor i64 %4, 17179869184
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 (...) @g()
br label %9
9: ; preds = %7, %1
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @f(i64 %0) {
%2 = icmp eq i64 %0, 17179869184
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @g()
br label %5
5: ; preds = %3, %1
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ write_code_PIC24(unsigned long, unsigned char *, char, char,
                                    int, int);
void write_code_P24KA(unsigned long address, unsigned char *data,
                      char blocksize, char lastblock) {
  write_code_PIC24(address, data, blocksize, lastblock, 0x4004, 32 * 3);
}


x86 assembly (clang, -O0):
<write_code_P24KA>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %cl,%al
mov    %dl,%cl
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %cl,-0x11(%rbp)
mov    %al,-0x12(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x11(%rbp),%al
mov    $0x4004,%r8d
mov    $0x60,%r9d
movsbl %al,%edx
movsbl -0x12(%rbp),%ecx
call   1030 <write_code_PIC24@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_code_P24KA>:
mov    $0x4004,%r8d
mov    $0x60,%r9d
jmp    1030 <write_code_PIC24@plt>

LLVM IR (-O0):
define void @write_code_P24KA(i64 %0, i8* %1, i8 signext %2, i8 signext %3) {
%5 = alloca i64
%6 = alloca i8*
%7 = alloca i8
%8 = alloca i8
store i64 %0, i64* %5
store i8* %1, i8** %6
store i8 %2, i8* %7
store i8 %3, i8* %8
%9 = load i64, i64* %5
%10 = load i8*, i8** %6
%11 = load i8, i8* %7
%12 = load i8, i8* %8
%13 = call i32 @write_code_PIC24(i64 %9, i8* %10, i8 signext %11, i8 signext %12, i32 16388, i32 96)
ret void
}

LLVM IR (-O2):
define void @write_code_P24KA(i64 %0, i8* %1, i8 signext %2, i8 signext %3) {
%5 = tail call i32 @write_code_PIC24(i64 %0, i8* %1, i8 signext %2, i8 signext %3, i32 16388, i32 96)
ret void
}