xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ bits_float(int /*<<< orphan*/);
int /*<<< orphan*/ box_float(int /*<<< orphan*/);
int /*<<< orphan*/ dpop();
int /*<<< orphan*/ to_cell(int /*<<< orphan*/);
void primitive_bits_float_impl(void) { box_float(bits_float(to_cell(dpop()))); }


x86 assembly (clang, -O0):
<primitive_bits_float_impl>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <dpop@plt>
mov    %eax,%edi
call   1050 <to_cell@plt>
mov    %eax,%edi
call   1040 <bits_float@plt>
mov    %eax,%edi
call   1060 <box_float@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<primitive_bits_float_impl>:
push   %rax
xor    %eax,%eax
call   1030 <dpop@plt>
mov    %eax,%edi
call   1050 <to_cell@plt>
mov    %eax,%edi
call   1040 <bits_float@plt>
mov    %eax,%edi
pop    %rax
jmp    1060 <box_float@plt>

LLVM IR (-O0):
define void @primitive_bits_float_impl() {
%1 = call i32 (...) @dpop()
%2 = call i32 @to_cell(i32 %1)
%3 = call i32 @bits_float(i32 %2)
%4 = call i32 @box_float(i32 %3)
ret void
}

LLVM IR (-O2):
define void @primitive_bits_float_impl() {
%1 = tail call i32 (...) @dpop()
%2 = tail call i32 @to_cell(i32 %1)
%3 = tail call i32 @bits_float(i32 %2)
%4 = tail call i32 @box_float(i32 %3)
ret void
}
void initialize_renderer(struct renderer *renderer, struct error *err) {}


x86 assembly (clang, -O0):
<initialize_renderer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_renderer>:
ret

LLVM IR (-O0):
%struct.renderer = type opaque
%struct.error = type opaque
define void @initialize_renderer(%struct.renderer* %0, %struct.error* %1) {
%3 = alloca %struct.renderer*
%4 = alloca %struct.error*
store %struct.renderer* %0, %struct.renderer** %3
store %struct.error* %1, %struct.error** %4
ret void
}

LLVM IR (-O2):
%struct.renderer = type opaque
%struct.error = type opaque
define void @initialize_renderer(%struct.renderer* nocapture %0, %struct.error* nocapture %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ fpu_control_t;

/* Variables and functions */
int /*<<< orphan*/ _FPU_GETCW(int /*<<< orphan*/);
fpu_control_t __mips_fpu_getcw(void) {
  fpu_control_t cw;
  _FPU_GETCW(cw);
  return cw;
}


x86 assembly (clang, -O0):
<__mips_fpu_getcw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x4(%rbp),%edi
call   1030 <_FPU_GETCW@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__mips_fpu_getcw>:
jmp    1030 <_FPU_GETCW@plt>

LLVM IR (-O0):
define i32 @__mips_fpu_getcw() {
%1 = alloca i32
%2 = load i32, i32* %1
%3 = call i32 @_FPU_GETCW(i32 %2)
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @__mips_fpu_getcw() {
%1 = tail call i32 @_FPU_GETCW(i32 undef)
ret i32 undef
}
long double cimagl(long double _Complex z) { abort(); }


x86 assembly (clang, -O0):
<cimagl>:
push   %rbp
mov    %rsp,%rbp
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<cimagl>:
push   %rax
call   1030 <abort@plt>

LLVM IR (-O0):
define x86_fp80 @cimagl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16 %0) {
unreachable
}

LLVM IR (-O2):
define x86_fp80 @cimagl({ x86_fp80, x86_fp80 }* nocapture readnone byval({ x86_fp80, x86_fp80 }) align 16 %0) {
tail call void @abort()
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int sm_del_friend(void *data, int len) {
  printf("del user:%s\n", (char *)data);
  return 0;
}


x86 assembly (clang, -O0):
<sm_del_friend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sm_del_friend>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"del user:%s\0A\00"
define i32 @sm_del_friend(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"del user:%s\0A\00"
define i32 @sm_del_friend(i8* %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 0
}
/* Variables and functions */
void tzset(void) {}


x86 assembly (clang, -O0):
<tzset>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tzset>:
ret

LLVM IR (-O0):
define void @tzset() {
ret void
}

LLVM IR (-O2):
define void @tzset() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, ...);
void print_help(char *device_file_name, unsigned long update_period,
                unsigned long total_time) {
  printf("Usage: %s /dev/input/eventXX [updatePeriodMicros (default=%d) "
         "[totalTimeMicros (default=%d)]]\n",
         device_file_name, update_period, total_time);
  printf("Tests the force feedback driver\n");
  exit(1);
}


x86 assembly (clang, -O0):
<print_help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
lea    0xeb9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xf0a(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<print_help>:
push   %rax
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xebf(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xf10(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [95 x i8] c"Usage: %s /dev/input/eventXX [updatePeriodMicros (default=%d) [totalTimeMicros (default=%d)]]\0A\00"
@.str.1 = [33 x i8] c"Tests the force feedback driver\0A\00"
define void @print_help(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([95 x i8], [95 x i8]* @.str, i64 0, i64 0), i8* %7, i64 %8, i64 %9)
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.1, i64 0, i64 0))
%12 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [95 x i8] c"Usage: %s /dev/input/eventXX [updatePeriodMicros (default=%d) [totalTimeMicros (default=%d)]]\0A\00"
@str = [32 x i8] c"Tests the force feedback driver\00"
define void @print_help(i8* %0, i64 %1, i64 %2) {
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([95 x i8], [95 x i8]* @.str, i64 0, i64 0), i8* %0, i64 %1, i64 %2)
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @str, i64 0, i64 0))
%6 = tail call i32 @exit(i32 1)
unreachable
}
Q(a) { return (a | -a) >> 31; }


x86 assembly (clang, -O0):
<Q>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    %ecx,%ecx
sub    -0x4(%rbp),%ecx
or     %ecx,%eax
sar    $0x1f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Q>:
neg    %edi
sbb    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Q(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 0, %4
%6 = or i32 %3, %5
%7 = ashr i32 %6, 31
ret i32 %7
}

LLVM IR (-O2):
define i32 @Q(i32 %0) {
%2 = icmp ne i32 %0, 0
%3 = sext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ islower(int);
void t_islower_0x5c() {
  Assert_real((islower(92) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              465, ("islower should be 0 for 0x5c"));
}


x86 assembly (clang, -O0):
<t_islower_0x5c>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5c,%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x1d1,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0x5c>:
push   %rax
mov    $0x5c,%edi
call   1030 <islower@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x1d1,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0x5c\00"
define void @t_islower_0x5c() {
%1 = call i64 @islower(i32 92)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 465, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0x5c\00"
define void @t_islower_0x5c() {
%1 = tail call i64 @islower(i32 92)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 465, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
unsigned int CompressAnimationTypes(unsigned short);
float WeaponAndAttackTypeToPoiseDamage(unsigned int);
float PoiseDamageForAttack(unsigned int weapon_id,
                           unsigned short animationType_id) {
  unsigned int weaponType = weapon_id / 1000;
  unsigned int Weapon_AnimationType_hash =
      (weaponType * 1000) + CompressAnimationTypes(animationType_id);
  return WeaponAndAttackTypeToPoiseDamage(Weapon_AnimationType_hash);
}


x86 assembly (clang, -O0):
<PoiseDamageForAttack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %si,%ax
mov    %edi,-0x4(%rbp)
mov    %ax,-0x6(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0xc(%rbp)
imul   $0x3e8,-0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
movzwl -0x6(%rbp),%edi
call   1040 <CompressAnimationTypes@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%edi
call   1030 <WeaponAndAttackTypeToPoiseDamage@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PoiseDamageForAttack>:
push   %rbx
mov    %edi,%eax
imul   $0x10624dd3,%rax,%rax
shr    $0x26,%rax
imul   $0x3e8,%eax,%ebx
mov    %esi,%edi
call   1040 <CompressAnimationTypes@plt>
add    %eax,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <WeaponAndAttackTypeToPoiseDamage@plt>

LLVM IR (-O0):
define float @PoiseDamageForAttack(i32 %0, i16 zeroext %1) {
%3 = alloca i32
%4 = alloca i16
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i16 %1, i16* %4
%7 = load i32, i32* %3
%8 = udiv i32 %7, 1000
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = mul i32 %9, 1000
%11 = load i16, i16* %4
%12 = call i32 @CompressAnimationTypes(i16 zeroext %11)
%13 = add i32 %10, %12
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = call float @WeaponAndAttackTypeToPoiseDamage(i32 %14)
ret float %15
}

LLVM IR (-O2):
define float @PoiseDamageForAttack(i32 %0, i16 zeroext %1) {
%3 = urem i32 %0, 1000
%4 = sub i32 %0, %3
%5 = tail call i32 @CompressAnimationTypes(i16 zeroext %1)
%6 = add i32 %4, %5
%7 = tail call float @WeaponAndAttackTypeToPoiseDamage(i32 %6)
ret float %7
}
/* Type definitions */
typedef int /*<<< orphan*/ val;
typedef int socklen_t;

/* Variables and functions */
int /*<<< orphan*/ SOL_SOCKET;
int getsockopt(int, int /*<<< orphan*/, int, int *, int *);
int BMI_sockio_get_sockopt(int s, int optname) {
  int val;
  socklen_t len = sizeof(val);
  if (getsockopt(s, SOL_SOCKET, optname, &val, &len) == -1)
    return (-1);
  else
    return (val);
}


x86 assembly (clang, -O0):
<BMI_sockio_get_sockopt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x4,-0x14(%rbp)
mov    -0x8(%rbp),%edi
mov    0x2eb9(%rip),%rax
mov    (%rax),%esi
mov    -0xc(%rbp),%edx
lea    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%r8
call   1030 <getsockopt@plt>
cmp    $0xffffffff,%eax
jne    1156 <BMI_sockio_get_sockopt+0x46>
movl   $0xffffffff,-0x4(%rbp)
jmp    115c <BMI_sockio_get_sockopt+0x4c>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BMI_sockio_get_sockopt>:
push   %rax
mov    %esi,%edx
movl   $0x4,(%rsp)
mov    0x2ec7(%rip),%rax
mov    (%rax),%esi
lea    0x4(%rsp),%rcx
mov    %rsp,%r8
call   1030 <getsockopt@plt>
cmp    $0xffffffff,%eax
je     1139 <BMI_sockio_get_sockopt+0x29>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@SOL_SOCKET = global i32 0
define i32 @BMI_sockio_get_sockopt(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 4, i32* %7
%8 = load i32, i32* %4
%9 = load i32, i32* @SOL_SOCKET
%10 = load i32, i32* %5
%11 = call i32 @getsockopt(i32 %8, i32 %9, i32 %10, i32* %6, i32* %7)
%12 = icmp eq i32 %11, -1
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 -1, i32* %3
br label %16
14: ; preds = %2
%15 = load i32, i32* %6
store i32 %15, i32* %3
br label %16
16: ; preds = %14, %13
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
@SOL_SOCKET = global i32 0
define i32 @BMI_sockio_get_sockopt(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %3 to i8*
%6 = bitcast i32* %4 to i8*
store i32 4, i32* %4
%7 = load i32, i32* @SOL_SOCKET
%8 = call i32 @getsockopt(i32 %0, i32 %7, i32 %1, i32* %3, i32* %4)
%9 = icmp eq i32 %8, -1
%10 = load i32, i32* %3
%11 = select i1 %9, i32 -1, i32 %10
ret i32 %11
}
void Rename_SRT_DSC_NSEQ(ii, jj) int ii, jj;
{
  int i, j;
  i = ii;
  while (i < jj) {
    Rename_MAX_IDX_NSEQ(&j, i, jj);
    Rename_SWP_NSEQ(i, j);
    i = i + 1;
  };
}


x86 assembly (clang, -O0):
<Rename_SRT_DSC_NSEQ>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    116c <Rename_SRT_DSC_NSEQ+0x4c>
mov    -0xc(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1040 <Rename_MAX_IDX_NSEQ@plt>
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
mov    $0x0,%al
call   1030 <Rename_SWP_NSEQ@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1134 <Rename_SRT_DSC_NSEQ+0x14>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Rename_SRT_DSC_NSEQ>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
cmp    %esi,%edi
jge    1162 <Rename_SRT_DSC_NSEQ+0x42>
mov    %esi,%ebx
mov    %edi,%ebp
lea    0xc(%rsp),%r14
cs nopw 0x0(%rax,%rax,1)
nop
mov    %r14,%rdi
mov    %ebp,%esi
mov    %ebx,%edx
xor    %eax,%eax
call   1040 <Rename_MAX_IDX_NSEQ@plt>
mov    0xc(%rsp),%esi
mov    %ebp,%edi
xor    %eax,%eax
call   1030 <Rename_SWP_NSEQ@plt>
add    $0x1,%ebp
cmp    %ebp,%ebx
jne    1140 <Rename_SRT_DSC_NSEQ+0x20>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @Rename_SRT_DSC_NSEQ(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
store i32 %7, i32* %5
br label %8
8: ; preds = %12, %2
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %21
12: ; preds = %8
%13 = load i32, i32* %5
%14 = load i32, i32* %4
%15 = call i32 (i32*, i32, i32, ...) bitcast (i32 (...)* @Rename_MAX_IDX_NSEQ to i32 (i32*, i32, i32, ...)*)(i32* %6, i32 %13, i32 %14)
%16 = load i32, i32* %5
%17 = load i32, i32* %6
%18 = call i32 (i32, i32, ...) bitcast (i32 (...)* @Rename_SWP_NSEQ to i32 (i32, i32, ...)*)(i32 %16, i32 %17)
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %8
21: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @Rename_SRT_DSC_NSEQ(i32 %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = icmp slt i32 %0, %1
br i1 %5, label %6, label %13
6: ; preds = %2, %6
%7 = phi i32 [ %11, %6 ], [ %0, %2 ]
%8 = call i32 (i32*, i32, i32, ...) bitcast (i32 (...)* @Rename_MAX_IDX_NSEQ to i32 (i32*, i32, i32, ...)*)(i32* %3, i32 %7, i32 %1)
%9 = load i32, i32* %3
%10 = call i32 (i32, i32, ...) bitcast (i32 (...)* @Rename_SWP_NSEQ to i32 (i32, i32, ...)*)(i32 %7, i32 %9)
%11 = add i32 %7, 1
%12 = icmp eq i32 %11, %1
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void version(void) {
  puts("tail - output the last part of files");
  puts("Version 1.0");
  puts("Written by Gregory Pietsch");
}


x86 assembly (clang, -O0):
<version>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
lea    0xefe(%rip),%rdi
call   1030 <puts@plt>
lea    0xefe(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<version>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf01(%rip),%rdi
call   1030 <puts@plt>
lea    0xf01(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"tail - output the last part of files\00"
@.str.1 = [12 x i8] c"Version 1.0\00"
@.str.2 = [27 x i8] c"Written by Gregory Pietsch\00"
define void @version() {
%1 = call i32 @puts(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @puts(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @puts(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [37 x i8] c"tail - output the last part of files\00"
@.str.1 = [12 x i8] c"Version 1.0\00"
@.str.2 = [27 x i8] c"Written by Gregory Pietsch\00"
define void @version() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EX_USAGE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void emit_help(void) {
  fputs("Usage: setsid cmd [cmdarg ..]\n", stderr);
  exit(EX_USAGE);
}


x86 assembly (clang, -O0):
<emit_help>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ead(%rip),%rax
mov    (%rax),%esi
lea    0xecc(%rip),%rdi
call   1030 <fputs@plt>
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<emit_help>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%esi
lea    0xecf(%rip),%rdi
call   1030 <fputs@plt>
mov    0x2eab(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"Usage: setsid cmd [cmdarg ..]\0A\00"
@stderr = global i32 0
@EX_USAGE = global i32 0
define void @emit_help() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = load i32, i32* @EX_USAGE
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
@.str = [31 x i8] c"Usage: setsid cmd [cmdarg ..]\0A\00"
@stderr = global i32 0
@EX_USAGE = global i32 0
define void @emit_help() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = load i32, i32* @EX_USAGE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
/* Variables and functions */
scalar_t__ cc_user_send_msg_to_kernel();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *, int);
void cc_user_sync_configure() {
  if (cc_user_send_msg_to_kernel() < 0) {
    printf("%s:%d, user netlink send failed \r\n",
           "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
           "2022-01-22/02-19-57/repos/O-P-E-N/CC-ROUTER/refs/heads/master/"
           "package/cc_edu_test/cc_edu_u/cc_edu_u.c",
           281);
    exit(0);
  }
}


x86 assembly (clang, -O0):
<cc_user_sync_configure>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <cc_user_send_msg_to_kernel@plt>
cmp    $0x0,%rax
jge    1164 <cc_user_sync_configure+0x34>
lea    0xeb4(%rip),%rdi
lea    0xed0(%rip),%rsi
mov    $0x119,%edx
call   1040 <printf@plt>
xor    %edi,%edi
call   1050 <exit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cc_user_sync_configure>:
push   %rax
xor    %eax,%eax
call   1030 <cc_user_send_msg_to_kernel@plt>
test   %rax,%rax
js     113f <cc_user_sync_configure+0xf>
pop    %rax
ret
lea    0xeba(%rip),%rdi
lea    0xed6(%rip),%rsi
mov    $0x119,%edx
call   1040 <printf@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"%s:%d, user netlink send failed \0D\0A\00"
@.str.1 = [166 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/O-P-E-N/CC-ROUTER/refs/heads/master/package/cc_edu_test/cc_edu_u/cc_edu_u.c\00"
define void @cc_user_sync_configure() {
%1 = call i64 (...) @cc_user_send_msg_to_kernel()
%2 = icmp slt i64 %1, 0
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([166 x i8], [166 x i8]* @.str.1, i64 0, i64 0), i32 281)
%5 = call i32 @exit(i32 0)
unreachable
6: ; preds = %0
ret void
}

LLVM IR (-O2):
@.str = [35 x i8] c"%s:%d, user netlink send failed \0D\0A\00"
@.str.1 = [166 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/O-P-E-N/CC-ROUTER/refs/heads/master/package/cc_edu_test/cc_edu_u/cc_edu_u.c\00"
define void @cc_user_sync_configure() {
%1 = tail call i64 (...) @cc_user_send_msg_to_kernel()
%2 = icmp slt i64 %1, 0
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = tail call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([166 x i8], [166 x i8]* @.str.1, i64 0, i64 0), i32 281)
%5 = tail call i32 @exit(i32 0)
unreachable
6: ; preds = %0
ret void
}
/* Type definitions */
struct t_hashtable_item {
  int dummy;
};
struct t_hashtable {
  int dummy;
};

/* Variables and functions */
struct t_hashtable_item *
hashtable_set_with_size(struct t_hashtable *, void const *, int /*<<< orphan*/,
                        void const *, int /*<<< orphan*/);
struct t_hashtable_item *hashtable_set(struct t_hashtable *hashtable,
                                       const void *key, const void *value) {
  return hashtable_set_with_size(hashtable, key, 0, value, 0);
}


x86 assembly (clang, -O0):
<hashtable_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
xor    %r8d,%r8d
mov    %r8d,%edx
call   1030 <hashtable_set_with_size@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashtable_set>:
mov    %rdx,%rcx
xor    %edx,%edx
xor    %r8d,%r8d
jmp    1030 <hashtable_set_with_size@plt>

LLVM IR (-O0):
%struct.t_hashtable_item = type { i32 }
%struct.t_hashtable = type { i32 }
define %struct.t_hashtable_item* @hashtable_set(%struct.t_hashtable* %0, i8* %1, i8* %2) {
%4 = alloca %struct.t_hashtable*
%5 = alloca i8*
%6 = alloca i8*
store %struct.t_hashtable* %0, %struct.t_hashtable** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load %struct.t_hashtable*, %struct.t_hashtable** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = call %struct.t_hashtable_item* @hashtable_set_with_size(%struct.t_hashtable* %7, i8* %8, i32 0, i8* %9, i32 0)
ret %struct.t_hashtable_item* %10
}

LLVM IR (-O2):
%struct.t_hashtable_item = type { i32 }
%struct.t_hashtable = type { i32 }
define %struct.t_hashtable_item* @hashtable_set(%struct.t_hashtable* %0, i8* %1, i8* %2) {
%4 = tail call %struct.t_hashtable_item* @hashtable_set_with_size(%struct.t_hashtable* %0, i8* %1, i32 0, i8* %2, i32 0)
ret %struct.t_hashtable_item* %4
}
/* Variables and functions */
int /*<<< orphan*/ mmp_str_ltrim(char *);
char *mmp_str_rtrim(int /*<<< orphan*/);
char *mmp_str_trim(char *str) { return mmp_str_rtrim(mmp_str_ltrim(str)); }


x86 assembly (clang, -O0):
<mmp_str_trim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mmp_str_ltrim@plt>
mov    %eax,%edi
call   1040 <mmp_str_rtrim@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmp_str_trim>:
push   %rax
call   1030 <mmp_str_ltrim@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <mmp_str_rtrim@plt>

LLVM IR (-O0):
define i8* @mmp_str_trim(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @mmp_str_ltrim(i8* %3)
%5 = call i8* @mmp_str_rtrim(i32 %4)
ret i8* %5
}

LLVM IR (-O2):
define i8* @mmp_str_trim(i8* %0) {
%2 = tail call i32 @mmp_str_ltrim(i8* %0)
%3 = tail call i8* @mmp_str_rtrim(i32 %2)
ret i8* %3
}
/* Type definitions */
struct backing_dev_info {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ bdi_update_bandwidth(struct backing_dev_info *,
                                        unsigned long, int /*<<< orphan*/,
                                        int /*<<< orphan*/);
void bdi_update_write_bandwidth(struct backing_dev_info *bdi,
                                unsigned long start_time) {
  bdi_update_bandwidth(bdi, start_time, 0, 0);
}


x86 assembly (clang, -O0):
<bdi_update_write_bandwidth>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %ecx,%ecx
mov    %ecx,%edx
call   1030 <bdi_update_bandwidth@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bdi_update_write_bandwidth>:
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <bdi_update_bandwidth@plt>

LLVM IR (-O0):
%struct.backing_dev_info = type { i32 }
define void @bdi_update_write_bandwidth(%struct.backing_dev_info* %0, i64 %1) {
%3 = alloca %struct.backing_dev_info*
%4 = alloca i64
store %struct.backing_dev_info* %0, %struct.backing_dev_info** %3
store i64 %1, i64* %4
%5 = load %struct.backing_dev_info*, %struct.backing_dev_info** %3
%6 = load i64, i64* %4
%7 = call i32 @bdi_update_bandwidth(%struct.backing_dev_info* %5, i64 %6, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
%struct.backing_dev_info = type { i32 }
define void @bdi_update_write_bandwidth(%struct.backing_dev_info* %0, i64 %1) {
%3 = tail call i32 @bdi_update_bandwidth(%struct.backing_dev_info* %0, i64 %1, i32 0, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ func1();
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  printf("Hello from prog1.c\n");
  func1();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <func1@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
call   1030 <func1@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"Hello from prog1.c\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%7 = call i32 (...) @func1()
ret i32 0
}

LLVM IR (-O2):
@str = [19 x i8] c"Hello from prog1.c\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 (...) @func1()
ret i32 0
}
/* Variables and functions */
double sqrt(double);
double norm(double r[2]) {
  double sqnorm = 0;
  for (int i = 0; i < 2; i++)
    sqnorm += r[i] * r[i];
  return sqrt(sqnorm);
}


x86 assembly (clang, -O0):
<norm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x2,-0x14(%rbp)
jge    116f <norm+0x5f>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm2
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112b <norm+0x1b>
movsd  -0x10(%rbp),%xmm0
call   1030 <sqrt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<norm>:
movsd  (%rdi),%xmm1
movsd  0x8(%rdi),%xmm0
mulsd  %xmm1,%xmm1
xorpd  %xmm2,%xmm2
addsd  %xmm2,%xmm1
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
ucomisd %xmm2,%xmm0
jb     1138 <norm+0x28>
sqrtsd %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @norm(double* %0) {
%2 = alloca double*
%3 = alloca double
%4 = alloca i32
store double* %0, double** %2
store double 0.000000e+00, double* %3
store i32 0, i32* %4
br label %5
5: ; preds = %21, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 2
br i1 %7, label %8, label %24
8: ; preds = %5
%9 = load double*, double** %2
%10 = load i32, i32* %4
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds double, double* %9, i64 %11
%13 = load double, double* %12
%14 = load double*, double** %2
%15 = load i32, i32* %4
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds double, double* %14, i64 %16
%18 = load double, double* %17
%19 = load double, double* %3
%20 = call double @llvm.fmuladd.f64(double %13, double %18, double %19)
store double %20, double* %3
br label %21
21: ; preds = %8
%22 = load i32, i32* %4
%23 = add nsw i32 %22, 1
store i32 %23, i32* %4
br label %5
24: ; preds = %5
%25 = load double, double* %3
%26 = call double @sqrt(double %25)
ret double %26
}

LLVM IR (-O2):
define double @norm(double* nocapture %0) {
%2 = load double, double* %0
%3 = tail call double @llvm.fmuladd.f64(double %2, double %2, double 0.000000e+00)
%4 = getelementptr inbounds double, double* %0, i64 1
%5 = load double, double* %4
%6 = tail call double @llvm.fmuladd.f64(double %5, double %5, double %3)
%7 = tail call double @sqrt(double %6)
ret double %7
}
int min(a, b, c) {
  int tmp;
  if (a <= b)
    tmp = a;
  else
    tmp = b;
  if (tmp <= c)
    return tmp;
  else
    return c;
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     1124 <min+0x24>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    112a <min+0x2a>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jg     1141 <min+0x41>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1147 <min+0x47>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %edi,%eax
cmp    %esi,%edi
cmovg  %esi,%eax
cmp    %edx,%eax
cmovg  %edx,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = icmp sle i32 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %3
%13 = load i32, i32* %5
store i32 %13, i32* %8
br label %16
14: ; preds = %3
%15 = load i32, i32* %6
store i32 %15, i32* %8
br label %16
16: ; preds = %14, %12
%17 = load i32, i32* %8
%18 = load i32, i32* %7
%19 = icmp sle i32 %17, %18
br i1 %19, label %20, label %22
20: ; preds = %16
%21 = load i32, i32* %8
store i32 %21, i32* %4
br label %24
22: ; preds = %16
%23 = load i32, i32* %7
store i32 %23, i32* %4
br label %24
24: ; preds = %22, %20
%25 = load i32, i32* %4
ret i32 %25
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %0, %1
%5 = select i1 %4, i32 %1, i32 %0
%6 = icmp sgt i32 %5, %2
%7 = select i1 %6, i32 %2, i32 %5
ret i32 %7
}
int min(int n1, int n2) { return n1 <= n2 ? n1 : n2; }


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1121 <min+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <min+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %edi,%eax
cmp    %esi,%edi
cmovg  %esi,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sle i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
void thermo_enter_powersave(void) { ; }


x86 assembly (clang, -O0):
<thermo_enter_powersave>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thermo_enter_powersave>:
ret

LLVM IR (-O0):
define void @thermo_enter_powersave() {
ret void
}

LLVM IR (-O2):
define void @thermo_enter_powersave() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_log_parse_target() {
  printf("NOT IMPLEMENTED:"
         "pa_log_parse_target"
         "\n");
}


x86 assembly (clang, -O0):
<pa_log_parse_target>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_log_parse_target>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"NOT IMPLEMENTED:pa_log_parse_target\0A\00"
define i32 @pa_log_parse_target() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [36 x i8] c"NOT IMPLEMENTED:pa_log_parse_target\00"
define i32 @pa_log_parse_target() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
unsigned long pte_bitop(unsigned long value, unsigned int rightshift,
                        unsigned long mask, unsigned int leftshift) {
  return ((value >> rightshift) & mask) << leftshift;
}


x86 assembly (clang, -O0):
<pte_bitop>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
shr    %cl,%rax
and    -0x18(%rbp),%rax
mov    -0x1c(%rbp),%ecx
shl    %cl,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pte_bitop>:
mov    %ecx,%eax
mov    %esi,%ecx
shr    %cl,%rdi
and    %rdx,%rdi
mov    %eax,%ecx
shl    %cl,%rdi
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @pte_bitop(i64 %0, i32 %1, i64 %2, i32 %3) {
%5 = alloca i64
%6 = alloca i32
%7 = alloca i64
%8 = alloca i32
store i64 %0, i64* %5
store i32 %1, i32* %6
store i64 %2, i64* %7
store i32 %3, i32* %8
%9 = load i64, i64* %5
%10 = load i32, i32* %6
%11 = zext i32 %10 to i64
%12 = lshr i64 %9, %11
%13 = load i64, i64* %7
%14 = and i64 %12, %13
%15 = load i32, i32* %8
%16 = zext i32 %15 to i64
%17 = shl i64 %14, %16
ret i64 %17
}

LLVM IR (-O2):
define i64 @pte_bitop(i64 %0, i32 %1, i64 %2, i32 %3) {
%5 = zext i32 %1 to i64
%6 = lshr i64 %0, %5
%7 = and i64 %6, %2
%8 = zext i32 %3 to i64
%9 = shl i64 %7, %8
ret i64 %9
}
int test_imm_5Buint32_reg(unsigned int val) {
  return ((val) & (0x5B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Buint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x5b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Buint32_reg>:
test   $0x5b,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Buint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 91
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_5Buint32_reg(i32 %0) {
%2 = and i32 %0, 91
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int test_imm_B6uint8_reg(unsigned char val) {
  return ((val) & (0xB6 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B6uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xb6,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B6uint8_reg>:
test   $0xb6,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B6uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 182
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_B6uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -74
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
unsigned long CANIntNumberGet(unsigned long);
int /*<<< orphan*/ IntEnable(unsigned long);
int /*<<< orphan*/ IntRegister(unsigned long, void (*)());
void CANIntRegister(unsigned long ulBase, void (*pfnHandler)(void)) {
  unsigned long ulIntNumber;
  ;
  ulIntNumber = CANIntNumberGet(ulBase);
  IntRegister(ulIntNumber, pfnHandler);
  IntEnable(ulIntNumber);
}


x86 assembly (clang, -O0):
<CANIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <CANIntNumberGet@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <IntRegister@plt>
mov    -0x18(%rbp),%rdi
call   1030 <IntEnable@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CANIntRegister>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
call   1050 <CANIntNumberGet@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1040 <IntRegister@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @CANIntRegister(i64 %0, void ()* %1) {
%3 = alloca i64
%4 = alloca void ()*
%5 = alloca i64
store i64 %0, i64* %3
store void ()* %1, void ()** %4
%6 = load i64, i64* %3
%7 = call i64 @CANIntNumberGet(i64 %6)
store i64 %7, i64* %5
%8 = load i64, i64* %5
%9 = load void ()*, void ()** %4
%10 = bitcast void ()* %9 to void (...)*
%11 = call i32 @IntRegister(i64 %8, void (...)* %10)
%12 = load i64, i64* %5
%13 = call i32 @IntEnable(i64 %12)
ret void
}

LLVM IR (-O2):
define void @CANIntRegister(i64 %0, void ()* %1) {
%3 = tail call i64 @CANIntNumberGet(i64 %0)
%4 = bitcast void ()* %1 to void (...)*
%5 = tail call i32 @IntRegister(i64 %3, void (...)* %4)
%6 = tail call i32 @IntEnable(i64 %3)
ret void
}
float cbrta_halleyf(const float a, const float R) {
  const float a3 = a * a * a;
  const float b = a * (a3 + R + R) / (a3 + a3 + R);
  return b;
}


x86 assembly (clang, -O0):
<cbrta_halleyf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
addss  -0x8(%rbp),%xmm1
addss  -0x8(%rbp),%xmm1
mulss  %xmm1,%xmm0
movss  -0xc(%rbp),%xmm1
addss  -0xc(%rbp),%xmm1
addss  -0x8(%rbp),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbrta_halleyf>:
movaps %xmm0,%xmm2
mulss  %xmm0,%xmm2
mulss  %xmm0,%xmm2
movaps %xmm2,%xmm3
addss  %xmm1,%xmm3
addss  %xmm1,%xmm3
mulss  %xmm3,%xmm0
addss  %xmm2,%xmm2
addss  %xmm1,%xmm2
divss  %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @cbrta_halleyf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %3
store float %1, float* %4
%7 = load float, float* %3
%8 = load float, float* %3
%9 = fmul float %7, %8
%10 = load float, float* %3
%11 = fmul float %9, %10
store float %11, float* %5
%12 = load float, float* %3
%13 = load float, float* %5
%14 = load float, float* %4
%15 = fadd float %13, %14
%16 = load float, float* %4
%17 = fadd float %15, %16
%18 = fmul float %12, %17
%19 = load float, float* %5
%20 = load float, float* %5
%21 = fadd float %19, %20
%22 = load float, float* %4
%23 = fadd float %21, %22
%24 = fdiv float %18, %23
store float %24, float* %6
%25 = load float, float* %6
ret float %25
}

LLVM IR (-O2):
define float @cbrta_halleyf(float %0, float %1) {
%3 = fmul float %0, %0
%4 = fmul float %3, %0
%5 = fadd float %4, %1
%6 = fadd float %5, %1
%7 = fmul float %6, %0
%8 = fadd float %4, %4
%9 = fadd float %8, %1
%10 = fdiv float %7, %9
ret float %10
}
/* Variables and functions */
int /*<<< orphan*/ angle_rotate(unsigned int);
int /*<<< orphan*/ soft_right();
void soft_right_degrees(unsigned int Degrees) {
  soft_right();
  Degrees = Degrees * 2;
  angle_rotate(Degrees);
}


x86 assembly (clang, -O0):
<soft_right_degrees>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <soft_right@plt>
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <angle_rotate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<soft_right_degrees>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <soft_right@plt>
add    %ebx,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <angle_rotate@plt>

LLVM IR (-O0):
define void @soft_right_degrees(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @soft_right()
%4 = load i32, i32* %2
%5 = mul i32 %4, 2
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = call i32 @angle_rotate(i32 %6)
ret void
}

LLVM IR (-O2):
define void @soft_right_degrees(i32 %0) {
%2 = tail call i32 (...) @soft_right()
%3 = shl i32 %0, 1
%4 = tail call i32 @angle_rotate(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mcal_cpu_nop();
void __svc_handler() {
  for (;;) {
    mcal_cpu_nop();
  }
}


x86 assembly (clang, -O0):
<__svc_handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <__svc_handler+0x9>
mov    $0x0,%al
call   1030 <mcal_cpu_nop@plt>
jmp    1119 <__svc_handler+0x9>

x86 assembly (clang, -O2):
<__svc_handler>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <mcal_cpu_nop@plt>
jmp    1120 <__svc_handler+0x10>

LLVM IR (-O0):
define void @__svc_handler() {
br label %1
1: ; preds = %1, %0
%2 = call i32 (...) @mcal_cpu_nop()
br label %1
}

LLVM IR (-O2):
define void @__svc_handler() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @mcal_cpu_nop()
br label %1
}
void ff_hevc_put_hevc_epel_h16_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_epel_h16_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_epel_h16_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_epel_h16_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_epel_h16_12_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fatal(char *);
void aw_bdb_commit_transaction(void *v_txn) {
  fatal("BerkeleyDB support not compiled");
}


x86 assembly (clang, -O0):
<aw_bdb_commit_transaction>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <fatal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aw_bdb_commit_transaction>:
lea    0xee9(%rip),%rdi
jmp    1030 <fatal@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"BerkeleyDB support not compiled\00"
define void @aw_bdb_commit_transaction(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @fatal(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [32 x i8] c"BerkeleyDB support not compiled\00"
define void @aw_bdb_commit_transaction(i8* nocapture readnone %0) {
%2 = tail call i32 @fatal(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int SocketAndSendto(int /*<<< orphan*/, int /*<<< orphan*/, char const *);
int sendAlivePacket(const char *dest) { return SocketAndSendto(0, 0, dest); }


x86 assembly (clang, -O0):
<sendAlivePacket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
xor    %esi,%esi
mov    %esi,%edi
call   1030 <SocketAndSendto@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sendAlivePacket>:
mov    %rdi,%rdx
xor    %edi,%edi
xor    %esi,%esi
jmp    1030 <SocketAndSendto@plt>

LLVM IR (-O0):
define i32 @sendAlivePacket(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @SocketAndSendto(i32 0, i32 0, i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @sendAlivePacket(i8* %0) {
%2 = tail call i32 @SocketAndSendto(i32 0, i32 0, i8* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ abstract_text___Int_native_int_to_s___impl(long, char *,
                                                              long);
void core__abstract_text___Int___native_int_to_s(long self, char *p0, long p1) {
  abstract_text___Int_native_int_to_s___impl(self, p0, p1);
RET_LABEL:;
}


x86 assembly (clang, -O0):
<core__abstract_text___Int___native_int_to_s>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <abstract_text___Int_native_int_to_s___impl@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<core__abstract_text___Int___native_int_to_s>:
jmp    1030 <abstract_text___Int_native_int_to_s___impl@plt>

LLVM IR (-O0):
define void @core__abstract_text___Int___native_int_to_s(i64 %0, i8* %1, i64 %2) {
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
store i64 %0, i64* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @abstract_text___Int_native_int_to_s___impl(i64 %7, i8* %8, i64 %9)
br label %11
11: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @core__abstract_text___Int___native_int_to_s(i64 %0, i8* %1, i64 %2) {
%4 = tail call i32 @abstract_text___Int_native_int_to_s___impl(i64 %0, i8* %1, i64 %2)
ret void
}