int checkCompatibleInstruction(int opcode) {
  switch (opcode) {
  case 0xB4:
  case 0x28:
  case 0xA0:
  case 0x3C:
  case 0x30:
  case 0x38:
  case 0x48:
  case 0x00:
  case 0x68:
  case 0x50:
  case 0x74:
  case 0xD8:
  case 0x4C:
  case 0x0C:
  case 0x54:
  case 0x14:
  case 0x10:
  case 0xE0:
  case 0xB8:
  case 0xDC:
    return 1;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<checkCompatibleInstruction>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
test   %eax,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    111a <checkCompatibleInstruction+0x1a>
mov    -0xc(%rbp),%eax
sub    $0xc,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    112b <checkCompatibleInstruction+0x2b>
mov    -0xc(%rbp),%eax
sub    $0x10,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    113c <checkCompatibleInstruction+0x3c>
mov    -0xc(%rbp),%eax
sub    $0x14,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    114d <checkCompatibleInstruction+0x4d>
mov    -0xc(%rbp),%eax
sub    $0x28,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    115e <checkCompatibleInstruction+0x5e>
mov    -0xc(%rbp),%eax
sub    $0x30,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    116f <checkCompatibleInstruction+0x6f>
mov    -0xc(%rbp),%eax
sub    $0x38,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    1180 <checkCompatibleInstruction+0x80>
mov    -0xc(%rbp),%eax
sub    $0x3c,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    1191 <checkCompatibleInstruction+0x91>
mov    -0xc(%rbp),%eax
sub    $0x48,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    11a2 <checkCompatibleInstruction+0xa2>
mov    -0xc(%rbp),%eax
sub    $0x4c,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    11b3 <checkCompatibleInstruction+0xb3>
mov    -0xc(%rbp),%eax
sub    $0x50,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    11c4 <checkCompatibleInstruction+0xc4>
mov    -0xc(%rbp),%eax
sub    $0x54,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    11d5 <checkCompatibleInstruction+0xd5>
mov    -0xc(%rbp),%eax
sub    $0x68,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    11e6 <checkCompatibleInstruction+0xe6>
mov    -0xc(%rbp),%eax
sub    $0x74,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    11f7 <checkCompatibleInstruction+0xf7>
mov    -0xc(%rbp),%eax
sub    $0xa0,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    120a <checkCompatibleInstruction+0x10a>
mov    -0xc(%rbp),%eax
sub    $0xb4,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    121d <checkCompatibleInstruction+0x11d>
mov    -0xc(%rbp),%eax
sub    $0xb8,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    1230 <checkCompatibleInstruction+0x130>
mov    -0xc(%rbp),%eax
sub    $0xd8,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    1243 <checkCompatibleInstruction+0x143>
mov    -0xc(%rbp),%eax
sub    $0xdc,%eax
je     1269 <checkCompatibleInstruction+0x169>
jmp    1256 <checkCompatibleInstruction+0x156>
mov    -0xc(%rbp),%eax
sub    $0xe0,%eax
jne    1275 <checkCompatibleInstruction+0x175>
jmp    1269 <checkCompatibleInstruction+0x169>
movl   $0x1,-0x4(%rbp)
jmp    127c <checkCompatibleInstruction+0x17c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkCompatibleInstruction>:
mov    $0x1,%eax
cmp    $0x74,%edi
ja     111c <checkCompatibleInstruction+0x1c>
mov    %edi,%ecx
lea    0xeed(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
lea    -0xb4(%rdi),%ecx
cmp    $0x2c,%ecx
ja     1138 <checkCompatibleInstruction+0x38>
movabs $0x111000000011,%rdx
bt     %rcx,%rdx
jae    1138 <checkCompatibleInstruction+0x38>
ret
cmp    $0xa0,%edi
je     1137 <checkCompatibleInstruction+0x37>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @checkCompatibleInstruction(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 180, label %5
i32 40, label %5
i32 160, label %5
i32 60, label %5
i32 48, label %5
i32 56, label %5
i32 72, label %5
i32 0, label %5
i32 104, label %5
i32 80, label %5
i32 116, label %5
i32 216, label %5
i32 76, label %5
i32 12, label %5
i32 84, label %5
i32 20, label %5
i32 16, label %5
i32 224, label %5
i32 184, label %5
i32 220, label %5
]
5: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @checkCompatibleInstruction(i32 %0) {
switch i32 %0, label %2 [
i32 180, label %3
i32 40, label %3
i32 160, label %3
i32 60, label %3
i32 48, label %3
i32 56, label %3
i32 72, label %3
i32 0, label %3
i32 104, label %3
i32 80, label %3
i32 116, label %3
i32 216, label %3
i32 76, label %3
i32 12, label %3
i32 84, label %3
i32 20, label %3
i32 16, label %3
i32 224, label %3
i32 184, label %3
i32 220, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %2
%4 = phi i32 [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}