xunge/DecIR huggingface dataset:
char *replace_char(char c1, char c2, char *data, unsigned int *size) {
  unsigned int i;
  for (i = 0; i < (*size); i++) {
    if (data[i] == c1)
      data[i] = c2;
  }
  return data;
}


x86 assembly (clang, -O0):
<replace_char>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
jae    1166 <replace_char+0x66>
mov    -0x10(%rbp),%rax
mov    -0x1c(%rbp),%ecx
movsbl (%rax,%rcx,1),%eax
movsbl -0x1(%rbp),%ecx
cmp    %ecx,%eax
jne    1153 <replace_char+0x53>
mov    -0x2(%rbp),%dl
mov    -0x10(%rbp),%rax
mov    -0x1c(%rbp),%ecx
mov    %dl,(%rax,%rcx,1)
jmp    1158 <replace_char+0x58>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1120 <replace_char+0x20>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<replace_char>:
mov    %rdx,%rax
mov    (%rcx),%r8d
test   %r8d,%r8d
je     112b <replace_char+0x2b>
xor    %r9d,%r9d
jmp    111c <replace_char+0x1c>
add    $0x1,%r9
mov    %r8d,%edx
cmp    %rdx,%r9
jae    112b <replace_char+0x2b>
cmp    %dil,(%rax,%r9,1)
jne    1110 <replace_char+0x10>
mov    %sil,(%rax,%r9,1)
mov    (%rcx),%r8d
jmp    1110 <replace_char+0x10>
ret

LLVM IR (-O0):
define i8* @replace_char(i8 signext %0, i8 signext %1, i8* %2, i32* %3) {
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8*
%8 = alloca i32*
%9 = alloca i32
store i8 %0, i8* %5
store i8 %1, i8* %6
store i8* %2, i8** %7
store i32* %3, i32** %8
store i32 0, i32* %9
br label %10
10: ; preds = %32, %4
%11 = load i32, i32* %9
%12 = load i32*, i32** %8
%13 = load i32, i32* %12
%14 = icmp ult i32 %11, %13
br i1 %14, label %15, label %35
15: ; preds = %10
%16 = load i8*, i8** %7
%17 = load i32, i32* %9
%18 = zext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = load i8, i8* %5
%23 = sext i8 %22 to i32
%24 = icmp eq i32 %21, %23
br i1 %24, label %25, label %31
25: ; preds = %15
%26 = load i8, i8* %6
%27 = load i8*, i8** %7
%28 = load i32, i32* %9
%29 = zext i32 %28 to i64
%30 = getelementptr inbounds i8, i8* %27, i64 %29
store i8 %26, i8* %30
br label %31
31: ; preds = %25, %15
br label %32
32: ; preds = %31
%33 = load i32, i32* %9
%34 = add i32 %33, 1
store i32 %34, i32* %9
br label %10
35: ; preds = %10
%36 = load i8*, i8** %7
ret i8* %36
}

LLVM IR (-O2):
define i8* @replace_char(i8 signext %0, i8 signext %1, i8* returned %2, i32* nocapture %3) {
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %20, label %7
7: ; preds = %4, %15
%8 = phi i32 [ %16, %15 ], [ %5, %4 ]
%9 = phi i64 [ %17, %15 ], [ 0, %4 ]
%10 = getelementptr inbounds i8, i8* %2, i64 %9
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, %0
br i1 %12, label %13, label %15
13: ; preds = %7
store i8 %1, i8* %10
%14 = load i32, i32* %3
br label %15
15: ; preds = %7, %13
%16 = phi i32 [ %8, %7 ], [ %14, %13 ]
%17 = add nuw nsw i64 %9, 1
%18 = zext i32 %16 to i64
%19 = icmp ult i64 %17, %18
br i1 %19, label %7, label %20
20: ; preds = %15, %4
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ cache_addw(int);
void dyn_mmx_emms() { cache_addw(0x770F); }


x86 assembly (clang, -O0):
<dyn_mmx_emms>:
push   %rbp
mov    %rsp,%rbp
mov    $0x770f,%edi
call   1030 <cache_addw@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dyn_mmx_emms>:
mov    $0x770f,%edi
jmp    1030 <cache_addw@plt>

LLVM IR (-O0):
define void @dyn_mmx_emms() {
%1 = call i32 @cache_addw(i32 30479)
ret void
}

LLVM IR (-O2):
define void @dyn_mmx_emms() {
%1 = tail call i32 @cache_addw(i32 30479)
ret void
}
/* Variables and functions */
double rand_double();
double rand_double_range(double low, double high) {
  return (low + (high - low) * rand_double());
}


x86 assembly (clang, -O0):
<rand_double_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
subsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    $0x0,%al
call   1030 <rand_double@plt>
movsd  -0x20(%rbp),%xmm1
movaps %xmm0,%xmm2
movsd  -0x18(%rbp),%xmm0
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_double_range>:
sub    $0x18,%rsp
movsd  %xmm0,0x10(%rsp)
subsd  %xmm0,%xmm1
movsd  %xmm1,0x8(%rsp)
xor    %eax,%eax
call   1030 <rand_double@plt>
mulsd  0x8(%rsp),%xmm0
addsd  0x10(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @rand_double_range(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = load double, double* %3
%8 = fsub double %6, %7
%9 = call double (...) @rand_double()
%10 = call double @llvm.fmuladd.f64(double %8, double %9, double %5)
ret double %10
}

LLVM IR (-O2):
define double @rand_double_range(double %0, double %1) {
%3 = fsub double %1, %0
%4 = tail call double (...) @rand_double()
%5 = tail call double @llvm.fmuladd.f64(double %3, double %4, double %0)
ret double %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void display() {
  printf("Student ID : 20113343 \n");
  printf("Name : Hyun Jae Young \n");
}


x86 assembly (clang, -O0):
<display>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xef1(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xef3(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"Student ID : 20113343 \0A\00"
@.str.1 = [24 x i8] c"Name : Hyun Jae Young \0A\00"
define void @display() {
%1 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [23 x i8] c"Student ID : 20113343 \00"
@str.2 = [23 x i8] c"Name : Hyun Jae Young \00"
define void @display() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
double cc_barometer_to_altitude(double);
double barometer_to_altitude(double b, double pad_alt) {
  return cc_barometer_to_altitude(b) - pad_alt;
}


x86 assembly (clang, -O0):
<barometer_to_altitude>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <cc_barometer_to_altitude@plt>
subsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<barometer_to_altitude>:
push   %rax
movsd  %xmm1,(%rsp)
call   1030 <cc_barometer_to_altitude@plt>
subsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @barometer_to_altitude(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = call double @cc_barometer_to_altitude(double %5)
%7 = load double, double* %4
%8 = fsub double %6, %7
ret double %8
}

LLVM IR (-O2):
define double @barometer_to_altitude(double %0, double %1) {
%3 = tail call double @cc_barometer_to_altitude(double %0)
%4 = fsub double %3, %1
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ islower(int);
void t_islower_0x16() {
  Assert_real((islower(22) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              115, ("islower should be 0 for 0x16"));
}


x86 assembly (clang, -O0):
<t_islower_0x16>:
push   %rbp
mov    %rsp,%rbp
mov    $0x16,%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x73,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0x16>:
push   %rax
mov    $0x16,%edi
call   1030 <islower@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x73,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0x16\00"
define void @t_islower_0x16() {
%1 = call i64 @islower(i32 22)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 115, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0x16\00"
define void @t_islower_0x16() {
%1 = tail call i64 @islower(i32 22)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 115, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void vector_delete(char **data, unsigned int *size, unsigned int *capacity) {
  free(*data);
  *data = NULL;
  *size = 0;
  *capacity = 0;
}


x86 assembly (clang, -O0):
<vector_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vector_delete>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <free@plt>
movq   $0x0,(%rbx)
movl   $0x0,(%r15)
movl   $0x0,(%r14)
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @vector_delete(i8** %0, i32* %1, i32* %2) {
%4 = alloca i8**
%5 = alloca i32*
%6 = alloca i32*
store i8** %0, i8*** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i8**, i8*** %4
%8 = load i8*, i8** %7
%9 = call i32 @free(i8* %8)
%10 = load i8**, i8*** %4
store i8* null, i8** %10
%11 = load i32*, i32** %5
store i32 0, i32* %11
%12 = load i32*, i32** %6
store i32 0, i32* %12
ret void
}

LLVM IR (-O2):
define void @vector_delete(i8** nocapture %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2) {
%4 = load i8*, i8** %0
%5 = tail call i32 @free(i8* %4)
store i8* null, i8** %0
store i32 0, i32* %1
store i32 0, i32* %2
ret void
}
unsigned int IntCurrIrqPriorityGet(void) {
  return ((*((volatile unsigned int *)((0x48200000) + (0x60)))) &
          (0x0000003Fu));
}


x86 assembly (clang, -O0):
<IntCurrIrqPriorityGet>:
push   %rbp
mov    %rsp,%rbp
mov    $0x48200060,%eax
mov    (%rax),%eax
and    $0x3f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IntCurrIrqPriorityGet>:
mov    0x48200060,%eax
and    $0x3f,%eax
ret

LLVM IR (-O0):
define i32 @IntCurrIrqPriorityGet() {
%1 = load volatile i32, i32* inttoptr (i64 1210056800 to i32*)
%2 = and i32 %1, 63
ret i32 %2
}

LLVM IR (-O2):
define i32 @IntCurrIrqPriorityGet() {
%1 = load volatile i32, i32* inttoptr (i64 1210056800 to i32*)
%2 = and i32 %1, 63
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ link_error();
void f12(int a, int b) {
  if (a >= -6 && a <= 4)
    if ((a / b) == -7 || (a / b) == 7)
      link_error();
}


x86 assembly (clang, -O0):
<f12>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0xfffffffa,-0x4(%rbp)
jl     115e <f12+0x4e>
cmpl   $0x4,-0x4(%rbp)
jg     115e <f12+0x4e>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
cmp    $0xfffffff9,%eax
je     1152 <f12+0x42>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
cmp    $0x7,%eax
jne    1159 <f12+0x49>
mov    $0x0,%al
call   1030 <link_error@plt>
jmp    115e <f12+0x4e>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f12>:
ret

LLVM IR (-O0):
define void @f12(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp sge i32 %5, -6
br i1 %6, label %7, label %23
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp sle i32 %8, 4
br i1 %9, label %10, label %23
10: ; preds = %7
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = sdiv i32 %11, %12
%14 = icmp eq i32 %13, -7
br i1 %14, label %20, label %15
15: ; preds = %10
%16 = load i32, i32* %3
%17 = load i32, i32* %4
%18 = sdiv i32 %16, %17
%19 = icmp eq i32 %18, 7
br i1 %19, label %20, label %22
20: ; preds = %15, %10
%21 = call i32 (...) @link_error()
br label %22
22: ; preds = %20, %15
br label %23
23: ; preds = %22, %7, %2
ret void
}

LLVM IR (-O2):
define void @f12(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
int rand();
rand_x_y(int x, int y) { return (rand() % (y - x) + x); }


x86 assembly (clang, -O0):
<rand_x_y>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_x_y>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
sub    %ebp,%ebx
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @rand_x_y(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @rand()
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = srem i32 %5, %8
%10 = load i32, i32* %3
%11 = add nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @rand_x_y(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = sub nsw i32 %1, %0
%5 = srem i32 %3, %4
%6 = add nsw i32 %5, %0
ret i32 %6
}
/* Type definitions */
struct svc_req {
  int dummy;
};

/* Variables and functions */
int l2tp_peer_profile_get_1_svc(char *, void *, struct svc_req *);
int _l2tp_peer_profile_get_1(char **argp, void *result, struct svc_req *rqstp) {
  return (l2tp_peer_profile_get_1_svc(*argp, result, rqstp));
}


x86 assembly (clang, -O0):
<_l2tp_peer_profile_get_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <l2tp_peer_profile_get_1_svc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_l2tp_peer_profile_get_1>:
mov    (%rdi),%rdi
jmp    1030 <l2tp_peer_profile_get_1_svc@plt>

LLVM IR (-O0):
%struct.svc_req = type { i32 }
define i32 @_l2tp_peer_profile_get_1(i8** %0, i8* %1, %struct.svc_req* %2) {
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca %struct.svc_req*
store i8** %0, i8*** %4
store i8* %1, i8** %5
store %struct.svc_req* %2, %struct.svc_req** %6
%7 = load i8**, i8*** %4
%8 = load i8*, i8** %7
%9 = load i8*, i8** %5
%10 = load %struct.svc_req*, %struct.svc_req** %6
%11 = call i32 @l2tp_peer_profile_get_1_svc(i8* %8, i8* %9, %struct.svc_req* %10)
ret i32 %11
}

LLVM IR (-O2):
%struct.svc_req = type { i32 }
define i32 @_l2tp_peer_profile_get_1(i8** nocapture %0, i8* %1, %struct.svc_req* %2) {
%4 = load i8*, i8** %0
%5 = tail call i32 @l2tp_peer_profile_get_1_svc(i8* %4, i8* %1, %struct.svc_req* %2)
ret i32 %5
}
/* Type definitions */
struct mxt_platform_data {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ disable_irq(unsigned int);
void board_disable_irq(const struct mxt_platform_data *pdata,
                       unsigned int irq) {
  disable_irq(irq);
}


x86 assembly (clang, -O0):
<board_disable_irq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <disable_irq@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<board_disable_irq>:
mov    %esi,%edi
jmp    1030 <disable_irq@plt>

LLVM IR (-O0):
%struct.mxt_platform_data = type { i32 }
define void @board_disable_irq(%struct.mxt_platform_data* %0, i32 %1) {
%3 = alloca %struct.mxt_platform_data*
%4 = alloca i32
store %struct.mxt_platform_data* %0, %struct.mxt_platform_data** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i32 @disable_irq(i32 %5)
ret void
}

LLVM IR (-O2):
%struct.mxt_platform_data = type { i32 }
define void @board_disable_irq(%struct.mxt_platform_data* nocapture readnone %0, i32 %1) {
%3 = tail call i32 @disable_irq(i32 %1)
ret void
}
void hangout_loop(void) {}


x86 assembly (clang, -O0):
<hangout_loop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hangout_loop>:
ret

LLVM IR (-O0):
define void @hangout_loop() {
ret void
}

LLVM IR (-O2):
define void @hangout_loop() {
ret void
}
/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ strcpy(char *, char const *);
int strlen(char const *);
char *cag_strdup(const char *s) {
  size_t len = strlen(s) + 1;
  char *output = malloc(sizeof(char) * len);
  strcpy(output, s);
  return output;
}


x86 assembly (clang, -O0):
<cag_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shl    $0x0,%rax
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cag_strdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @cag_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = add nsw i32 %6, 1
%8 = sext i32 %7 to i64
store i64 %8, i64* %3
%9 = load i64, i64* %3
%10 = mul i64 1, %9
%11 = trunc i64 %10 to i32
%12 = call i8* @malloc(i32 %11)
store i8* %12, i8** %4
%13 = load i8*, i8** %4
%14 = load i8*, i8** %2
%15 = call i32 @strcpy(i8* %13, i8* %14)
%16 = load i8*, i8** %4
ret i8* %16
}

LLVM IR (-O2):
define i8* @cag_strdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = tail call i8* @malloc(i32 %3)
%5 = tail call i32 @strcpy(i8* %4, i8* %0)
ret i8* %4
}
int fun819() { return 819; }


x86 assembly (clang, -O0):
<fun819>:
push   %rbp
mov    %rsp,%rbp
mov    $0x333,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun819>:
mov    $0x333,%eax
ret

LLVM IR (-O0):
define i32 @fun819() {
ret i32 819
}

LLVM IR (-O2):
define i32 @fun819() {
ret i32 819
}
void integrity_load_keys(void) {}


x86 assembly (clang, -O0):
<integrity_load_keys>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<integrity_load_keys>:
ret

LLVM IR (-O0):
define void @integrity_load_keys() {
ret void
}

LLVM IR (-O2):
define void @integrity_load_keys() {
ret void
}
/* Variables and functions */
int get_grid_point_double_mesh(int const *, int const *);
int kpt_get_grid_point_double_mesh(const int address_double[3],
                                   const int mesh[3]) {
  return get_grid_point_double_mesh(address_double, mesh);
}


x86 assembly (clang, -O0):
<kpt_get_grid_point_double_mesh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <get_grid_point_double_mesh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kpt_get_grid_point_double_mesh>:
jmp    1030 <get_grid_point_double_mesh@plt>

LLVM IR (-O0):
define i32 @kpt_get_grid_point_double_mesh(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @get_grid_point_double_mesh(i32* %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @kpt_get_grid_point_double_mesh(i32* %0, i32* %1) {
%3 = tail call i32 @get_grid_point_double_mesh(i32* %0, i32* %1)
ret i32 %3
}
int carrega_polinomio(float coeficiente, int grau, float **polinomio) {
  *(*polinomio + grau) = coeficiente;
  return 0;
}


x86 assembly (clang, -O0):
<carrega_polinomio>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
movslq -0x8(%rbp),%rcx
movss  %xmm0,(%rax,%rcx,4)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<carrega_polinomio>:
mov    (%rsi),%rax
movslq %edi,%rcx
movss  %xmm0,(%rax,%rcx,4)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @carrega_polinomio(float %0, i32 %1, float** %2) {
%4 = alloca float
%5 = alloca i32
%6 = alloca float**
store float %0, float* %4
store i32 %1, i32* %5
store float** %2, float*** %6
%7 = load float, float* %4
%8 = load float**, float*** %6
%9 = load float*, float** %8
%10 = load i32, i32* %5
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds float, float* %9, i64 %11
store float %7, float* %12
ret i32 0
}

LLVM IR (-O2):
define i32 @carrega_polinomio(float %0, i32 %1, float** nocapture %2) {
%4 = load float*, float** %2
%5 = sext i32 %1 to i64
%6 = getelementptr inbounds float, float* %4, i64 %5
store float %0, float* %6
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ my_putchar(char);
void my_putnchar(char c, int nb) {
  int i;
  i = -1;
  while (++i < nb)
    my_putchar(c);
}


x86 assembly (clang, -O0):
<my_putnchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0xffffffff,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
cmp    -0x8(%rbp),%eax
jge    1148 <my_putnchar+0x38>
movsbl -0x1(%rbp),%edi
call   1030 <my_putchar@plt>
jmp    1128 <my_putnchar+0x18>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_putnchar>:
push   %rbp
push   %rbx
push   %rax
test   %esi,%esi
jle    112c <my_putnchar+0x1c>
mov    %esi,%ebx
movsbl %dil,%ebp
nopl   (%rax)
mov    %ebp,%edi
call   1030 <my_putchar@plt>
add    $0xffffffff,%ebx
jne    1120 <my_putnchar+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @my_putnchar(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
%5 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
store i32 -1, i32* %5
br label %6
6: ; preds = %11, %2
%7 = load i32, i32* %5
%8 = add nsw i32 %7, 1
store i32 %8, i32* %5
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %14
11: ; preds = %6
%12 = load i8, i8* %3
%13 = call i32 @my_putchar(i8 signext %12)
br label %6
14: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @my_putnchar(i8 signext %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %9
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ 0, %2 ]
%6 = tail call i32 @my_putchar(i8 signext %0)
%7 = add nuw nsw i32 %5, 1
%8 = icmp eq i32 %7, %1
br i1 %8, label %9, label %4
9: ; preds = %4, %2
ret void
}
void Rename_REV_SEQ(ii, jj) int ii, jj;
{
  int i, j;
  i = ii;
  j = jj;
  while (i < j) {
    Rename_SWP_SEQ(i, j);
    i = i + 1;
    j = j - 1;
  };
}


x86 assembly (clang, -O0):
<Rename_REV_SEQ>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    115a <Rename_REV_SEQ+0x4a>
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
mov    $0x0,%al
call   1030 <Rename_SWP_SEQ@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    112a <Rename_REV_SEQ+0x1a>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Rename_REV_SEQ>:
push   %rbp
push   %rbx
push   %rax
cmp    %esi,%edi
jge    1135 <Rename_REV_SEQ+0x25>
mov    %esi,%ebx
mov    %edi,%ebp
nopl   0x0(%rax,%rax,1)
mov    %ebp,%edi
mov    %ebx,%esi
xor    %eax,%eax
call   1030 <Rename_SWP_SEQ@plt>
add    $0x1,%ebp
add    $0xffffffff,%ebx
cmp    %ebx,%ebp
jl     1120 <Rename_REV_SEQ+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @Rename_REV_SEQ(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
store i32 %7, i32* %5
%8 = load i32, i32* %4
store i32 %8, i32* %6
br label %9
9: ; preds = %13, %2
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %21
13: ; preds = %9
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = call i32 (i32, i32, ...) bitcast (i32 (...)* @Rename_SWP_SEQ to i32 (i32, i32, ...)*)(i32 %14, i32 %15)
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 1
store i32 %18, i32* %5
%19 = load i32, i32* %6
%20 = sub nsw i32 %19, 1
store i32 %20, i32* %6
br label %9
21: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @Rename_REV_SEQ(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
br i1 %3, label %4, label %11
4: ; preds = %2, %4
%5 = phi i32 [ %9, %4 ], [ %1, %2 ]
%6 = phi i32 [ %8, %4 ], [ %0, %2 ]
%7 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @Rename_SWP_SEQ to i32 (i32, i32, ...)*)(i32 %6, i32 %5)
%8 = add nsw i32 %6, 1
%9 = add nsw i32 %5, -1
%10 = icmp slt i32 %8, %9
br i1 %10, label %4, label %11
11: ; preds = %4, %2
ret void
}
void spma_init_privileged(void) {}


x86 assembly (clang, -O0):
<spma_init_privileged>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spma_init_privileged>:
ret

LLVM IR (-O0):
define void @spma_init_privileged() {
ret void
}

LLVM IR (-O2):
define void @spma_init_privileged() {
ret void
}
/* Variables and functions */
double acos(double);
int /*<<< orphan*/ pix2ang_nest_z_phi(long, long, double *, double *);
void pix2ang_nest(long nside, long ipix, double *theta, double *phi) {
  double z;
  pix2ang_nest_z_phi(nside, ipix, &z, phi);
  *theta = acos(z);
}


x86 assembly (clang, -O0):
<pix2ang_nest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rcx
lea    -0x28(%rbp),%rdx
call   1040 <pix2ang_nest_z_phi@plt>
movsd  -0x28(%rbp),%xmm0
call   1030 <acos@plt>
mov    -0x18(%rbp),%rax
movsd  %xmm0,(%rax)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pix2ang_nest>:
push   %rbx
sub    $0x10,%rsp
mov    %rdx,%rbx
lea    0x8(%rsp),%rdx
call   1040 <pix2ang_nest_z_phi@plt>
movsd  0x8(%rsp),%xmm0
call   1030 <acos@plt>
movsd  %xmm0,(%rbx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @pix2ang_nest(i64 %0, i64 %1, double* %2, double* %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca double*
%8 = alloca double*
%9 = alloca double
store i64 %0, i64* %5
store i64 %1, i64* %6
store double* %2, double** %7
store double* %3, double** %8
%10 = load i64, i64* %5
%11 = load i64, i64* %6
%12 = load double*, double** %8
%13 = call i32 @pix2ang_nest_z_phi(i64 %10, i64 %11, double* %9, double* %12)
%14 = load double, double* %9
%15 = call double @acos(double %14)
%16 = load double*, double** %7
store double %15, double* %16
ret void
}

LLVM IR (-O2):
define void @pix2ang_nest(i64 %0, i64 %1, double* nocapture writeonly %2, double* %3) {
%5 = alloca double
%6 = bitcast double* %5 to i8*
%7 = call i32 @pix2ang_nest_z_phi(i64 %0, i64 %1, double* %5, double* %3)
%8 = load double, double* %5
%9 = call double @acos(double %8)
store double %9, double* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar_fd(long, int);
void putlong(long n, int fd) {
  if (n >= 10)
    putlong(n / 10, fd);
  ft_putchar_fd(n % 10 + '0', fd);
}


x86 assembly (clang, -O0):
<putlong>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0xa,-0x8(%rbp)
jl     1153 <putlong+0x33>
mov    -0x8(%rbp),%rax
mov    $0xa,%ecx
cqto
idiv   %rcx
mov    %rax,%rdi
mov    -0xc(%rbp),%esi
call   1030 <putlong@plt>
mov    -0x8(%rbp),%rax
mov    $0xa,%ecx
cqto
idiv   %rcx
mov    %rdx,%rdi
add    $0x30,%rdi
mov    -0xc(%rbp),%esi
call   1040 <ft_putchar_fd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putlong>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
cmp    $0xa,%rdi
jl     114c <putlong+0x2c>
movabs $0xcccccccccccccccd,%rcx
cc cc cc
mov    %rbx,%rax
mul    %rcx
mov    %rdx,%rdi
shr    $0x3,%rdi
mov    %ebp,%esi
call   1030 <putlong@plt>
movabs $0x6666666666666667,%rcx
66 66 66
mov    %rbx,%rax
imul   %rcx
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x2,%rdx
add    %rax,%rdx
add    %rdx,%rdx
lea    (%rdx,%rdx,4),%rax
neg    %rax
lea    (%rbx,%rax,1),%rdi
add    $0x30,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <ft_putchar_fd@plt>

LLVM IR (-O0):
define void @putlong(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i64, i64* %3
%6 = icmp sge i64 %5, 10
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i64, i64* %3
%9 = sdiv i64 %8, 10
%10 = load i32, i32* %4
br label %11
11: ; preds = %7, %2
%12 = load i64, i64* %3
%13 = srem i64 %12, 10
%14 = add nsw i64 %13, 48
%15 = load i32, i32* %4
%16 = call i32 @ft_putchar_fd(i64 %14, i32 %15)
ret void
}

LLVM IR (-O2):
define void @putlong(i64 %0, i32 %1) {
%3 = icmp sgt i64 %0, 9
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = udiv i64 %0, 10
tail call void @putlong(i64 %5, i32 %1)
br label %6
6: ; preds = %4, %2
%7 = srem i64 %0, 10
%8 = add nsw i64 %7, 48
%9 = tail call i32 @ft_putchar_fd(i64 %8, i32 %1)
ret void
}
cbuf40(f, n) int f, n;
{ cbuf(f, n, 40); }


x86 assembly (clang, -O0):
<cbuf40>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    $0x28,%edx
mov    $0x0,%al
call   1030 <cbuf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbuf40>:
mov    $0x28,%edx
xor    %eax,%eax
jmp    1030 <cbuf@plt>

LLVM IR (-O0):
define i32 @cbuf40(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = call i32 (i32, i32, i32, ...) bitcast (i32 (...)* @cbuf to i32 (i32, i32, i32, ...)*)(i32 %6, i32 %7, i32 40)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @cbuf40(i32 %0, i32 %1) {
%3 = tail call i32 (i32, i32, i32, ...) bitcast (i32 (...)* @cbuf to i32 (i32, i32, i32, ...)*)(i32 %0, i32 %1, i32 40)
ret i32 undef
}
char *true_or_false(int flag) {
  if (flag) {
    return ("True");
  } else {
    return ("False");
  }
}


x86 assembly (clang, -O0):
<true_or_false>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1121 <true_or_false+0x21>
lea    0xee8(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    112c <true_or_false+0x2c>
lea    0xedd(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<true_or_false>:
test   %edi,%edi
lea    0xefc(%rip),%rcx
lea    0xef0(%rip),%rax
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"True\00"
@.str.1 = [6 x i8] c"False\00"
define i8* @true_or_false(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %2
br label %8
7: ; preds = %1
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %8
8: ; preds = %7, %6
%9 = load i8*, i8** %2
ret i8* %9
}

LLVM IR (-O2):
@.str = [5 x i8] c"True\00"
@.str.1 = [6 x i8] c"False\00"
define i8* @true_or_false(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
ret i8* %3
}
/* Variables and functions */
int dbar(double, double);
int dv(double, double);
int sb(double, double);
int ubar(double, double);
double F3_cc_nu_p(double xx, double Q2) {
  return 2 * (dv(xx, Q2) + sb(xx, Q2) + dbar(xx, Q2) - ubar(xx, Q2)) / xx;
}


x86 assembly (clang, -O0):
<F3_cc_nu_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1050 <dv@plt>
mov    %eax,-0x1c(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <sb@plt>
mov    %eax,%ecx
mov    -0x1c(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1060 <dbar@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x14(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1040 <ubar@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
sub    %ecx,%eax
shl    $0x1,%eax
cvtsi2sd %eax,%xmm0
divsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<F3_cc_nu_p>:
push   %rbp
push   %rbx
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
movsd  %xmm0,0x8(%rsp)
call   1050 <dv@plt>
mov    %eax,%ebx
movsd  0x8(%rsp),%xmm0
movsd  0x10(%rsp),%xmm1
call   1030 <sb@plt>
mov    %eax,%ebp
add    %ebx,%ebp
movsd  0x8(%rsp),%xmm0
movsd  0x10(%rsp),%xmm1
call   1060 <dbar@plt>
mov    %eax,%ebx
add    %ebp,%ebx
movsd  0x8(%rsp),%xmm0
movsd  0x10(%rsp),%xmm1
call   1040 <ubar@plt>
sub    %eax,%ebx
add    %ebx,%ebx
xorps  %xmm0,%xmm0
cvtsi2sd %ebx,%xmm0
divsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define double @F3_cc_nu_p(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call i32 @dv(double %5, double %6)
%8 = load double, double* %3
%9 = load double, double* %4
%10 = call i32 @sb(double %8, double %9)
%11 = add nsw i32 %7, %10
%12 = load double, double* %3
%13 = load double, double* %4
%14 = call i32 @dbar(double %12, double %13)
%15 = add nsw i32 %11, %14
%16 = load double, double* %3
%17 = load double, double* %4
%18 = call i32 @ubar(double %16, double %17)
%19 = sub nsw i32 %15, %18
%20 = mul nsw i32 2, %19
%21 = sitofp i32 %20 to double
%22 = load double, double* %3
%23 = fdiv double %21, %22
ret double %23
}

LLVM IR (-O2):
define double @F3_cc_nu_p(double %0, double %1) {
%3 = tail call i32 @dv(double %0, double %1)
%4 = tail call i32 @sb(double %0, double %1)
%5 = add nsw i32 %4, %3
%6 = tail call i32 @dbar(double %0, double %1)
%7 = add nsw i32 %5, %6
%8 = tail call i32 @ubar(double %0, double %1)
%9 = sub i32 %7, %8
%10 = shl nsw i32 %9, 1
%11 = sitofp i32 %10 to double
%12 = fdiv double %11, %0
ret double %12
}
int get_letter_idx(char letter) {
  if (letter >= 'a' && letter <= 'z')
    return letter - 'a';
  if (letter >= '0' && letter <= '9')
    return letter - '0';
  return 0;
}


x86 assembly (clang, -O0):
<get_letter_idx>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1133 <get_letter_idx+0x33>
movsbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
jg     1133 <get_letter_idx+0x33>
movsbl -0x5(%rbp),%eax
sub    $0x61,%eax
mov    %eax,-0x4(%rbp)
jmp    1163 <get_letter_idx+0x63>
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     115c <get_letter_idx+0x5c>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jg     115c <get_letter_idx+0x5c>
movsbl -0x5(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    1163 <get_letter_idx+0x63>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_letter_idx>:
mov    %edi,%eax
lea    -0x61(%rax),%ecx
cmp    $0x19,%cl
ja     110e <get_letter_idx+0xe>
add    $0xffffff9f,%eax
ret
lea    -0x30(%rax),%ecx
add    $0xffffffd0,%eax
xor    %edx,%edx
cmp    $0xa,%cl
cmovb  %eax,%edx
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @get_letter_idx(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 97
br i1 %6, label %7, label %15
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 122
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %13, 97
store i32 %14, i32* %2
br label %28
15: ; preds = %7, %1
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp sge i32 %17, 48
br i1 %18, label %19, label %27
19: ; preds = %15
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp sle i32 %21, 57
br i1 %22, label %23, label %27
23: ; preds = %19
%24 = load i8, i8* %3
%25 = sext i8 %24 to i32
%26 = sub nsw i32 %25, 48
store i32 %26, i32* %2
br label %28
27: ; preds = %19, %15
store i32 0, i32* %2
br label %28
28: ; preds = %27, %23, %11
%29 = load i32, i32* %2
ret i32 %29
}

LLVM IR (-O2):
define i32 @get_letter_idx(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add i8 %0, -97
%4 = icmp ult i8 %3, 26
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = add nsw i32 %2, -97
br label %12
7: ; preds = %1
%8 = add i8 %0, -48
%9 = icmp ult i8 %8, 10
%10 = add nsw i32 %2, -48
%11 = select i1 %9, i32 %10, i32 0
br label %12
12: ; preds = %7, %5
%13 = phi i32 [ %6, %5 ], [ %11, %7 ]
ret i32 %13
}
main() {
  if (!L'\400' != 0)
    ;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void *calloc(size_t, size_t);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void *xcalloc(size_t nobj, size_t size) {
  void *p = calloc(nobj, size);
  if (p == NULL) {
    fprintf(stderr, "allocation failed\n");
    abort();
  }
  return p;
}


x86 assembly (clang, -O0):
<xcalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1178 <xcalloc+0x48>
mov    0x2e7d(%rip),%rax
mov    (%rax),%edi
lea    0xe94(%rip),%rsi
call   1050 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xcalloc>:
push   %rax
call   1040 <calloc@plt>
test   %rax,%rax
je     113d <xcalloc+0xd>
pop    %rcx
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
call   1050 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [19 x i8] c"allocation failed\0A\00"
define i8* @xcalloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i8* @calloc(i64 %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i32, i32* @stderr
%13 = call i32 @fprintf(i32 %12, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%14 = call i32 (...) @abort()
unreachable
15: ; preds = %2
%16 = load i8*, i8** %5
ret i8* %16
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [19 x i8] c"allocation failed\0A\00"
define noalias i8* @xcalloc(i64 %0, i64 %1) {
%3 = tail call i8* @calloc(i64 %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%8 = tail call i32 (...) @abort()
unreachable
9: ; preds = %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ write_frame_buf8(int, unsigned char);
void write_frame_buf32(int t, unsigned int data) {
  {
    write_frame_buf8(t, (unsigned char)(data >> 24));
    write_frame_buf8(t, (unsigned char)(data >> 16));
    write_frame_buf8(t, (unsigned char)(data >> 8));
    write_frame_buf8(t, (unsigned char)data);
    return;
  }
}


x86 assembly (clang, -O0):
<write_frame_buf32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%eax
shr    $0x18,%eax
movzbl %al,%esi
call   1030 <write_frame_buf8@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%eax
shr    $0x10,%eax
movzbl %al,%esi
call   1030 <write_frame_buf8@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%eax
shr    $0x8,%eax
movzbl %al,%esi
call   1030 <write_frame_buf8@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%eax
movzbl %al,%esi
call   1030 <write_frame_buf8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_frame_buf32>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %esi,%eax
shr    $0x18,%eax
mov    %eax,%esi
call   1030 <write_frame_buf8@plt>
mov    %ebx,%eax
shr    $0x10,%eax
movzbl %al,%esi
mov    %ebp,%edi
call   1030 <write_frame_buf8@plt>
movzbl %bh,%esi
mov    %ebp,%edi
call   1030 <write_frame_buf8@plt>
movzbl %bl,%esi
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <write_frame_buf8@plt>

LLVM IR (-O0):
define void @write_frame_buf32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = lshr i32 %6, 24
%8 = trunc i32 %7 to i8
%9 = call i32 @write_frame_buf8(i32 %5, i8 zeroext %8)
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = lshr i32 %11, 16
%13 = trunc i32 %12 to i8
%14 = call i32 @write_frame_buf8(i32 %10, i8 zeroext %13)
%15 = load i32, i32* %3
%16 = load i32, i32* %4
%17 = lshr i32 %16, 8
%18 = trunc i32 %17 to i8
%19 = call i32 @write_frame_buf8(i32 %15, i8 zeroext %18)
%20 = load i32, i32* %3
%21 = load i32, i32* %4
%22 = trunc i32 %21 to i8
%23 = call i32 @write_frame_buf8(i32 %20, i8 zeroext %22)
ret void
}

LLVM IR (-O2):
define void @write_frame_buf32(i32 %0, i32 %1) {
%3 = lshr i32 %1, 24
%4 = trunc i32 %3 to i8
%5 = tail call i32 @write_frame_buf8(i32 %0, i8 zeroext %4)
%6 = lshr i32 %1, 16
%7 = trunc i32 %6 to i8
%8 = tail call i32 @write_frame_buf8(i32 %0, i8 zeroext %7)
%9 = lshr i32 %1, 8
%10 = trunc i32 %9 to i8
%11 = tail call i32 @write_frame_buf8(i32 %0, i8 zeroext %10)
%12 = trunc i32 %1 to i8
%13 = tail call i32 @write_frame_buf8(i32 %0, i8 zeroext %12)
ret void
}
/* Variables and functions */
float fclamp(float, int /*<<< orphan*/, int);
float inchToTicks(int);
float scale(int scaleDistance, int distance) {
  return fclamp((float)distance / inchToTicks(scaleDistance), 0, 1);
}


x86 assembly (clang, -O0):
<scale>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cvtsi2ssl -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <inchToTicks@plt>
movaps %xmm0,%xmm1
movss  -0xc(%rbp),%xmm0
divss  %xmm1,%xmm0
xor    %edi,%edi
mov    $0x1,%esi
call   1040 <fclamp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scale>:
push   %rax
cvtsi2ss %esi,%xmm0
movss  %xmm0,0x4(%rsp)
call   1030 <inchToTicks@plt>
movss  0x4(%rsp),%xmm1
divss  %xmm0,%xmm1
movaps %xmm1,%xmm0
xor    %edi,%edi
mov    $0x1,%esi
pop    %rax
jmp    1040 <fclamp@plt>

LLVM IR (-O0):
define float @scale(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = sitofp i32 %5 to float
%7 = load i32, i32* %3
%8 = call float @inchToTicks(i32 %7)
%9 = fdiv float %6, %8
%10 = call float @fclamp(float %9, i32 0, i32 1)
ret float %10
}

LLVM IR (-O2):
define float @scale(i32 %0, i32 %1) {
%3 = sitofp i32 %1 to float
%4 = tail call float @inchToTicks(i32 %0)
%5 = fdiv float %3, %4
%6 = tail call float @fclamp(float %5, i32 0, i32 1)
ret float %6
}
/* Variables and functions */
int /*<<< orphan*/ CRYPTO_cleanup_all_ex_data();
int /*<<< orphan*/ EVP_cleanup();
void ecqv_cleanup(void) {
  EVP_cleanup();
  CRYPTO_cleanup_all_ex_data();
}


x86 assembly (clang, -O0):
<ecqv_cleanup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <EVP_cleanup@plt>
mov    $0x0,%al
call   1030 <CRYPTO_cleanup_all_ex_data@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ecqv_cleanup>:
push   %rax
xor    %eax,%eax
call   1040 <EVP_cleanup@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <CRYPTO_cleanup_all_ex_data@plt>

LLVM IR (-O0):
define void @ecqv_cleanup() {
%1 = call i32 (...) @EVP_cleanup()
%2 = call i32 (...) @CRYPTO_cleanup_all_ex_data()
ret void
}

LLVM IR (-O2):
define void @ecqv_cleanup() {
%1 = tail call i32 (...) @EVP_cleanup()
%2 = tail call i32 (...) @CRYPTO_cleanup_all_ex_data()
ret void
}
void foo_impl() {}


x86 assembly (clang, -O0):
<foo_impl>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_impl>:
ret

LLVM IR (-O0):
define void @foo_impl() {
ret void
}

LLVM IR (-O2):
define void @foo_impl() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ load_directory();
int /*<<< orphan*/ load_headers();
int /*<<< orphan*/ set_disk_type();
void load_disk(void) {
  set_disk_type();
  load_headers();
  load_directory();
}


x86 assembly (clang, -O0):
<load_disk>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <set_disk_type@plt>
mov    $0x0,%al
call   1030 <load_headers@plt>
mov    $0x0,%al
call   1050 <load_directory@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_disk>:
push   %rax
xor    %eax,%eax
call   1040 <set_disk_type@plt>
xor    %eax,%eax
call   1030 <load_headers@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <load_directory@plt>

LLVM IR (-O0):
define void @load_disk() {
%1 = call i32 (...) @set_disk_type()
%2 = call i32 (...) @load_headers()
%3 = call i32 (...) @load_directory()
ret void
}

LLVM IR (-O2):
define void @load_disk() {
%1 = tail call i32 (...) @set_disk_type()
%2 = tail call i32 (...) @load_headers()
%3 = tail call i32 (...) @load_directory()
ret void
}
void INT_Excep_MTU0_TGIA0(void) {}


x86 assembly (clang, -O0):
<INT_Excep_MTU0_TGIA0>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_MTU0_TGIA0>:
ret

LLVM IR (-O0):
define void @INT_Excep_MTU0_TGIA0() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_MTU0_TGIA0() {
ret void
}