xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ outb(int, int);
void xbus_en(void) {
  outb(0x07, 0x2e);
  outb(0x0f, 0x2f);
  outb(0x30, 0x2e);
  outb(0x01, 0x2f);
  return;
}


x86 assembly (clang, -O0):
<xbus_en>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7,%edi
mov    $0x2e,%esi
call   1030 <outb@plt>
mov    $0xf,%edi
mov    $0x2f,%esi
call   1030 <outb@plt>
mov    $0x30,%edi
mov    $0x2e,%esi
call   1030 <outb@plt>
mov    $0x1,%edi
mov    $0x2f,%esi
call   1030 <outb@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xbus_en>:
push   %rax
mov    $0x7,%edi
mov    $0x2e,%esi
call   1030 <outb@plt>
mov    $0xf,%edi
mov    $0x2f,%esi
call   1030 <outb@plt>
mov    $0x30,%edi
mov    $0x2e,%esi
call   1030 <outb@plt>
mov    $0x1,%edi
mov    $0x2f,%esi
pop    %rax
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @xbus_en() {
%1 = call i32 @outb(i32 7, i32 46)
%2 = call i32 @outb(i32 15, i32 47)
%3 = call i32 @outb(i32 48, i32 46)
%4 = call i32 @outb(i32 1, i32 47)
ret void
}

LLVM IR (-O2):
define void @xbus_en() {
%1 = tail call i32 @outb(i32 7, i32 46)
%2 = tail call i32 @outb(i32 15, i32 47)
%3 = tail call i32 @outb(i32 48, i32 46)
%4 = tail call i32 @outb(i32 1, i32 47)
ret void
}
void rop3_224_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = *D | S;
  stk1 = T & stk2;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_224_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_224_0_0>:
or     (%rdi),%sil
and    %dl,%sil
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_224_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %8
%16 = load i8, i8* %6
%17 = zext i8 %16 to i32
%18 = load i8, i8* %8
%19 = zext i8 %18 to i32
%20 = and i32 %17, %19
%21 = trunc i32 %20 to i8
store i8 %21, i8* %7
%22 = load i8, i8* %7
%23 = load i8*, i8** %4
store i8 %22, i8* %23
ret void
}

LLVM IR (-O2):
define void @rop3_224_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %4, %1
%6 = and i8 %5, %2
store i8 %6, i8* %0
ret void
}
void DMTimerReloadSet(unsigned int baseAdd, unsigned int reload) {
  (*((volatile unsigned int *)(baseAdd + (0x40)))) = reload;
}


x86 assembly (clang, -O0):
<DMTimerReloadSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x40,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMTimerReloadSet>:
add    $0x40,%edi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @DMTimerReloadSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = add i32 %6, 64
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store volatile i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @DMTimerReloadSet(i32 %0, i32 %1) {
%3 = add i32 %0, 64
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
store volatile i32 %1, i32* %5
ret void
}
/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ parse(char *);
int /*<<< orphan*/ snprintf(char *, int, char *);
int main(void) {
  char *s = malloc(512);
  snprintf(s, 512, "The quick brown fox jumps over the lazy dog.");
  parse(s);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x200,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x200,%esi
lea    0xea3(%rip),%rdx
call   1030 <snprintf@plt>
mov    -0x10(%rbp),%rdi
call   1050 <parse@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x200,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
lea    0xebb(%rip),%rdx
mov    %rax,%rdi
mov    $0x200,%esi
call   1030 <snprintf@plt>
mov    %rbx,%rdi
call   1050 <parse@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [45 x i8] c"The quick brown fox jumps over the lazy dog.\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = call i8* @malloc(i32 512)
store i8* %3, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @snprintf(i8* %4, i32 512, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%6 = load i8*, i8** %2
%7 = call i32 @parse(i8* %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [45 x i8] c"The quick brown fox jumps over the lazy dog.\00"
define i32 @main() {
%1 = tail call dereferenceable_or_null(512) i8* @malloc(i32 512)
%2 = tail call i32 @snprintf(i8* %1, i32 512, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @parse(i8* %1)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
void mmc2_4initPPUSet8(uint16_t addr) { (void)addr; }


x86 assembly (clang, -O0):
<mmc2_4initPPUSet8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmc2_4initPPUSet8>:
ret

LLVM IR (-O0):
define void @mmc2_4initPPUSet8(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret void
}

LLVM IR (-O2):
define void @mmc2_4initPPUSet8(i32 %0) {
ret void
}
/* Type definitions */
struct ps_process_event {
  int dummy;
};

/* Variables and functions */
int obus_event_commit(int /*<<< orphan*/);
int /*<<< orphan*/ ps_process_obus_event(struct ps_process_event *);
int ps_process_event_commit(struct ps_process_event *event) {
  return obus_event_commit(ps_process_obus_event(event));
}


x86 assembly (clang, -O0):
<ps_process_event_commit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <ps_process_obus_event@plt>
mov    %eax,%edi
call   1030 <obus_event_commit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps_process_event_commit>:
push   %rax
call   1040 <ps_process_obus_event@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <obus_event_commit@plt>

LLVM IR (-O0):
%struct.ps_process_event = type { i32 }
define i32 @ps_process_event_commit(%struct.ps_process_event* %0) {
%2 = alloca %struct.ps_process_event*
store %struct.ps_process_event* %0, %struct.ps_process_event** %2
%3 = load %struct.ps_process_event*, %struct.ps_process_event** %2
%4 = call i32 @ps_process_obus_event(%struct.ps_process_event* %3)
%5 = call i32 @obus_event_commit(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
%struct.ps_process_event = type { i32 }
define i32 @ps_process_event_commit(%struct.ps_process_event* %0) {
%2 = tail call i32 @ps_process_obus_event(%struct.ps_process_event* %0)
%3 = tail call i32 @obus_event_commit(i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ gets(char *);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ puts(char *);
int main() {
  char str[100] = {
      0,
  };
  printf("input : ");
  gets(str);
  printf("output : ");
  puts(str);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x70(%rbp),%rdi
xor    %esi,%esi
mov    $0x64,%edx
call   1050 <memset@plt>
lea    0xe9a(%rip),%rdi
call   1040 <printf@plt>
lea    -0x70(%rbp),%rdi
call   1060 <gets@plt>
lea    0xe8e(%rip),%rdi
call   1040 <printf@plt>
lea    -0x70(%rbp),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x70,%rsp
xorps  %xmm0,%xmm0
movaps %xmm0,0x50(%rsp)
movaps %xmm0,0x40(%rsp)
movaps %xmm0,0x30(%rsp)
movaps %xmm0,0x20(%rsp)
movaps %xmm0,0x10(%rsp)
movaps %xmm0,(%rsp)
movl   $0x0,0x60(%rsp)
lea    0xe9c(%rip),%rdi
call   1040 <printf@plt>
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1050 <gets@plt>
lea    0xe8e(%rip),%rdi
call   1040 <printf@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"input : \00"
@.str.1 = [10 x i8] c"output : \00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [100 x i8]
store i32 0, i32* %1
%3 = bitcast [100 x i8]* %2 to i8*
%4 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%5 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%6 = call i32 @gets(i8* %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%8 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%9 = call i32 @puts(i8* %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"input : \00"
@.str.1 = [10 x i8] c"output : \00"
define i32 @main() {
%1 = alloca [100 x i8]
%2 = getelementptr inbounds [100 x i8], [100 x i8]* %1, i64 0, i64 0
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @gets(i8* %2)
%5 = call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%6 = call i32 @puts(i8* %2)
ret i32 0
}
void security_sk_free(struct sock *sk) {}


x86 assembly (clang, -O0):
<security_sk_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<security_sk_free>:
ret

LLVM IR (-O0):
%struct.sock = type opaque
define void @security_sk_free(%struct.sock* %0) {
%2 = alloca %struct.sock*
store %struct.sock* %0, %struct.sock** %2
ret void
}

LLVM IR (-O2):
%struct.sock = type opaque
define void @security_sk_free(%struct.sock* nocapture %0) {
ret void
}
/* Type definitions */
struct vector {
  int dummy;
};

/* Variables and functions */
unsigned int vector_index_of(struct vector const *, void const *);
bool vector_contains(const struct vector *__restrict vec, const void *data) {
  return vector_index_of(vec, data) != (unsigned int)-1;
}


x86 assembly (clang, -O0):
<vector_contains>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <vector_index_of@plt>
cmp    $0xffffffff,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vector_contains>:
push   %rax
call   1030 <vector_index_of@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.vector = type { i32 }
define i32 @vector_contains(%struct.vector* noalias %0, i8* %1) {
%3 = alloca %struct.vector*
%4 = alloca i8*
store %struct.vector* %0, %struct.vector** %3
store i8* %1, i8** %4
%5 = load %struct.vector*, %struct.vector** %3
%6 = load i8*, i8** %4
%7 = call i32 @vector_index_of(%struct.vector* %5, i8* %6)
%8 = icmp ne i32 %7, -1
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
%struct.vector = type { i32 }
define i32 @vector_contains(%struct.vector* noalias %0, i8* %1) {
%3 = tail call i32 @vector_index_of(%struct.vector* %0, i8* %1)
%4 = icmp ne i32 %3, -1
%5 = zext i1 %4 to i32
ret i32 %5
}
int bic(int x, int m) {
  int z = m ^ (x | m);
  return z;
}


x86 assembly (clang, -O0):
<bic>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
or     -0x8(%rbp),%ecx
xor    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bic>:
mov    %esi,%eax
not    %eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @bic(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = or i32 %7, %8
%10 = xor i32 %6, %9
store i32 %10, i32* %5
%11 = load i32, i32* %5
ret i32 %11
}

LLVM IR (-O2):
define i32 @bic(i32 %0, i32 %1) {
%3 = xor i32 %1, -1
%4 = and i32 %3, %0
ret i32 %4
}
void swap(char *x, char *y) {
  *x += *y;
  *y = *x - *y;
  *x -= *y;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%edx
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
add    %edx,%ecx
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
sub    %ecx,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
movsbl (%rax),%edx
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
sub    %edx,%ecx
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi),%al
add    (%rsi),%al
mov    %al,(%rdi)
sub    (%rsi),%al
mov    %al,(%rsi)
sub    %al,(%rdi)
ret

LLVM IR (-O0):
define void @swap(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = load i8*, i8** %3
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = add nsw i32 %10, %7
%12 = trunc i32 %11 to i8
store i8 %12, i8* %8
%13 = load i8*, i8** %3
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = load i8*, i8** %4
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = sub nsw i32 %15, %18
%20 = trunc i32 %19 to i8
%21 = load i8*, i8** %4
store i8 %20, i8* %21
%22 = load i8*, i8** %4
%23 = load i8, i8* %22
%24 = sext i8 %23 to i32
%25 = load i8*, i8** %3
%26 = load i8, i8* %25
%27 = sext i8 %26 to i32
%28 = sub nsw i32 %27, %24
%29 = trunc i32 %28 to i8
store i8 %29, i8* %25
ret void
}

LLVM IR (-O2):
define void @swap(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = load i8, i8* %0
%5 = add i8 %4, %3
store i8 %5, i8* %0
%6 = load i8, i8* %1
%7 = sub i8 %5, %6
store i8 %7, i8* %1
%8 = load i8, i8* %0
%9 = sub i8 %8, %7
store i8 %9, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
void RngInit() { srand(time(NULL)); }


x86 assembly (clang, -O0):
<RngInit>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RngInit>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @RngInit() {
%1 = call i32 @time(i32* null)
%2 = call i32 @srand(i32 %1)
ret void
}

LLVM IR (-O2):
define void @RngInit() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 @srand(i32 %1)
ret void
}
/* Variables and functions */
int wait_for_key();
void wait_for_select(void) {
  int KeyPressed;
  do {
    KeyPressed = wait_for_key();
  } while ((KeyPressed != '\n') && (KeyPressed != '5') && (KeyPressed != ' '));
}


x86 assembly (clang, -O0):
<wait_for_select>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <wait_for_key@plt>
mov    %eax,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0xa,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     114a <wait_for_select+0x3a>
xor    %eax,%eax
cmpl   $0x35,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     114a <wait_for_select+0x3a>
cmpl   $0x20,-0x4(%rbp)
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
test   $0x1,%al
jne    1118 <wait_for_select+0x8>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait_for_select>:
push   %rbx
movabs $0x20000100000400,%rbx
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <wait_for_key@plt>
cmp    $0x35,%eax
ja     1120 <wait_for_select+0x10>
mov    %eax,%eax
bt     %rax,%rbx
jae    1120 <wait_for_select+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @wait_for_select() {
%1 = alloca i32
br label %2
2: ; preds = %13, %0
%3 = call i32 (...) @wait_for_key()
store i32 %3, i32* %1
br label %4
4: ; preds = %2
%5 = load i32, i32* %1
%6 = icmp ne i32 %5, 10
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i32, i32* %1
%9 = icmp ne i32 %8, 53
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = load i32, i32* %1
%12 = icmp ne i32 %11, 32
br label %13
13: ; preds = %10, %7, %4
%14 = phi i1 [ false, %7 ], [ false, %4 ], [ %12, %10 ]
br i1 %14, label %2, label %15
15: ; preds = %13
ret void
}

LLVM IR (-O2):
define void @wait_for_select() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @wait_for_key()
switch i32 %2, label %1 [
i32 53, label %3
i32 32, label %3
i32 10, label %3
]
3: ; preds = %1, %1, %1
ret void
}
void system_open(const char *path) {}


x86 assembly (clang, -O0):
<system_open>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<system_open>:
ret

LLVM IR (-O0):
define void @system_open(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @system_open(i8* nocapture %0) {
ret void
}
void tdefault_find_new_threads(struct target_ops *self) {}


x86 assembly (clang, -O0):
<tdefault_find_new_threads>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tdefault_find_new_threads>:
ret

LLVM IR (-O0):
%struct.target_ops = type opaque
define void @tdefault_find_new_threads(%struct.target_ops* %0) {
%2 = alloca %struct.target_ops*
store %struct.target_ops* %0, %struct.target_ops** %2
ret void
}

LLVM IR (-O2):
%struct.target_ops = type opaque
define void @tdefault_find_new_threads(%struct.target_ops* nocapture %0) {
ret void
}
/* Variables and functions */
char *strrchr(char *, char);
void cutext(char *fid) {
  char *p;
  if ((p = strrchr(fid, '/')) == 0)
    p = fid;
  if ((p = strrchr(p, '.')) != 0)
    *p = '\0';
}


x86 assembly (clang, -O0):
<cutext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2f,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    1140 <cutext+0x30>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x2e,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
je     1163 <cutext+0x53>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cutext>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2f,%esi
call   1030 <strrchr@plt>
test   %rax,%rax
cmovne %rax,%rbx
mov    %rbx,%rdi
mov    $0x2e,%esi
call   1030 <strrchr@plt>
test   %rax,%rax
je     113a <cutext+0x2a>
movb   $0x0,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @cutext(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strrchr(i8* %4, i8 signext 47)
store i8* %5, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i8*, i8** %2
store i8* %8, i8** %3
br label %9
9: ; preds = %7, %1
%10 = load i8*, i8** %3
%11 = call i8* @strrchr(i8* %10, i8 signext 46)
store i8* %11, i8** %3
%12 = icmp ne i8* %11, null
br i1 %12, label %13, label %15
13: ; preds = %9
%14 = load i8*, i8** %3
store i8 0, i8* %14
br label %15
15: ; preds = %13, %9
ret void
}

LLVM IR (-O2):
define void @cutext(i8* %0) {
%2 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 47)
%3 = icmp eq i8* %2, null
%4 = select i1 %3, i8* %0, i8* %2
%5 = tail call i8* @strrchr(i8* dereferenceable(1) %4, i8 signext 46)
%6 = icmp eq i8* %5, null
br i1 %6, label %8, label %7
7: ; preds = %1
store i8 0, i8* %5
br label %8
8: ; preds = %7, %1
ret void
}
int fun286() { return 286; }


x86 assembly (clang, -O0):
<fun286>:
push   %rbp
mov    %rsp,%rbp
mov    $0x11e,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun286>:
mov    $0x11e,%eax
ret

LLVM IR (-O0):
define i32 @fun286() {
ret i32 286
}

LLVM IR (-O2):
define i32 @fun286() {
ret i32 286
}
void EXTI3_IRQHandler(void) {}


x86 assembly (clang, -O0):
<EXTI3_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EXTI3_IRQHandler>:
ret

LLVM IR (-O0):
define void @EXTI3_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @EXTI3_IRQHandler() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
unsigned long metal_log2(unsigned long in) {
  unsigned long result;
  assert((in & (in - 1)) == 0);
  for (result = 0; (1UL << result) < in; result++)
    ;
  return result;
}


x86 assembly (clang, -O0):
<metal_log2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    $0x1,%rcx
and    %rcx,%rax
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    $0x1,%eax
shl    %cl,%rax
cmp    -0x8(%rbp),%rax
jae    1170 <metal_log2+0x60>
jmp    115f <metal_log2+0x4f>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1144 <metal_log2+0x34>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<metal_log2>:
push   %rbx
mov    %rdi,%rbx
lea    -0x1(%rdi),%rax
xor    %edi,%edi
test   %rax,%rbx
sete   %dil
call   1030 <assert@plt>
mov    $0xffffffffffffffff,%rcx
nopl   (%rax)
add    $0x1,%rcx
mov    $0x1,%eax
shl    %cl,%rax
cmp    %rbx,%rax
jb     1130 <metal_log2+0x20>
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @metal_log2(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = load i64, i64* %2
%6 = sub i64 %5, 1
%7 = and i64 %4, %6
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
%10 = call i32 @assert(i32 %9)
store i64 0, i64* %3
br label %11
11: ; preds = %17, %1
%12 = load i64, i64* %3
%13 = shl i64 1, %12
%14 = load i64, i64* %2
%15 = icmp ult i64 %13, %14
br i1 %15, label %16, label %20
16: ; preds = %11
br label %17
17: ; preds = %16
%18 = load i64, i64* %3
%19 = add i64 %18, 1
store i64 %19, i64* %3
br label %11
20: ; preds = %11
%21 = load i64, i64* %3
ret i64 %21
}

LLVM IR (-O2):
define i64 @metal_log2(i64 %0) {
%2 = tail call i64 @llvm.ctpop.i64(i64 %0)
%3 = icmp ult i64 %2, 2
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
br label %6
6: ; preds = %6, %1
%7 = phi i64 [ 0, %1 ], [ %10, %6 ]
%8 = shl nuw i64 1, %7
%9 = icmp ult i64 %8, %0
%10 = add i64 %7, 1
br i1 %9, label %6, label %11
11: ; preds = %6
ret i64 %7
}
unsigned long stw(unsigned char rs, unsigned short d, unsigned char ra) {
  return (37 << 26) | (rs << 21) | (ra << 16) | d;
}


x86 assembly (clang, -O0):
<stw>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %si,%cx
mov    %dil,%dl
mov    %dl,-0x1(%rbp)
mov    %cx,-0x4(%rbp)
mov    %al,-0x5(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x15,%eax
or     $0x94000000,%eax
movzbl -0x5(%rbp),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
movzwl -0x4(%rbp),%ecx
or     %ecx,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<stw>:
shl    $0x15,%edi
shl    $0x10,%edx
or     %esi,%edi
or     %edx,%edi
or     $0x94000000,%edi
movslq %edi,%rax
ret

LLVM IR (-O0):
define i64 @stw(i8 zeroext %0, i16 zeroext %1, i8 zeroext %2) {
%4 = alloca i8
%5 = alloca i16
%6 = alloca i8
store i8 %0, i8* %4
store i16 %1, i16* %5
store i8 %2, i8* %6
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
%9 = shl i32 %8, 21
%10 = or i32 -1811939328, %9
%11 = load i8, i8* %6
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 16
%14 = or i32 %10, %13
%15 = load i16, i16* %5
%16 = zext i16 %15 to i32
%17 = or i32 %14, %16
%18 = sext i32 %17 to i64
ret i64 %18
}

LLVM IR (-O2):
define i64 @stw(i8 zeroext %0, i16 zeroext %1, i8 zeroext %2) {
%4 = zext i8 %0 to i32
%5 = shl nuw nsw i32 %4, 21
%6 = zext i8 %2 to i32
%7 = shl nuw nsw i32 %6, 16
%8 = zext i16 %1 to i32
%9 = or i32 %5, %8
%10 = or i32 %9, %7
%11 = or i32 %10, -1811939328
%12 = sext i32 %11 to i64
ret i64 %12
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t andlm1(uint64_t x) { return x & -1; }


x86 assembly (clang, -O0):
<andlm1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<andlm1>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @andlm1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -1
ret i32 %4
}

LLVM IR (-O2):
define i32 @andlm1(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Hello, Tokyo!\n");
  printf("obs-worksohp for openSUSE.Asia Summit 2017\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeea(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Hello, Tokyo!\0A\00"
@.str.1 = [44 x i8] c"obs-worksohp for openSUSE.Asia Summit 2017\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [14 x i8] c"Hello, Tokyo!\00"
@str.2 = [43 x i8] c"obs-worksohp for openSUSE.Asia Summit 2017\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([43 x i8], [43 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
float invf(float x) { return 1.0f / x; }


x86 assembly (clang, -O0):
<invf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
divss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<invf>:
movss  0xef8(%rip),%xmm1
divss  %xmm0,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @invf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fdiv float 1.000000e+00, %3
ret float %4
}

LLVM IR (-O2):
define float @invf(float %0) {
%2 = fdiv float 1.000000e+00, %0
ret float %2
}
int setrunlevels(unsigned short *rlvl, char *runlevels) { return -1; }


x86 assembly (clang, -O0):
<setrunlevels>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setrunlevels>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @setrunlevels(i16* %0, i8* %1) {
%3 = alloca i16*
%4 = alloca i8*
store i16* %0, i16** %3
store i8* %1, i8** %4
ret i32 -1
}

LLVM IR (-O2):
define i32 @setrunlevels(i16* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ ot(char *);
defbyte() { ot(".byte\t"); }


x86 assembly (clang, -O0):
<defbyte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <ot@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<defbyte>:
lea    0xee9(%rip),%rdi
jmp    1030 <ot@plt>

LLVM IR (-O0):
@.str = [7 x i8] c".byte\09\00"
define i32 @defbyte() {
%1 = alloca i32
%2 = call i32 @ot(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [7 x i8] c".byte\09\00"
define i32 @defbyte() {
%1 = tail call i32 @ot(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
void *calloc(size_t, size_t);
void *rpl_calloc(size_t n, size_t s) {
  size_t bytes;
  if (n == 0 || s == 0)
    return calloc(1, 1);
  bytes = n * s;
  if (bytes / s != n)
    return NULL;
  return calloc(n, s);
}


x86 assembly (clang, -O0):
<rpl_calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1136 <rpl_calloc+0x26>
cmpq   $0x0,-0x18(%rbp)
jne    114c <rpl_calloc+0x3c>
mov    $0x1,%esi
mov    %rsi,%rdi
call   1030 <calloc@plt>
mov    %rax,-0x8(%rbp)
jmp    118d <rpl_calloc+0x7d>
mov    -0x10(%rbp),%rax
imul   -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x18(%rbp)
cmp    -0x10(%rbp),%rax
je     117c <rpl_calloc+0x6c>
movq   $0x0,-0x8(%rbp)
jmp    118d <rpl_calloc+0x7d>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <calloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpl_calloc>:
test   %rdi,%rdi
je     1125 <rpl_calloc+0x15>
test   %rsi,%rsi
je     1125 <rpl_calloc+0x15>
mov    %rsi,%rax
mul    %rdi
jno    112f <rpl_calloc+0x1f>
xor    %eax,%eax
ret
mov    $0x1,%edi
mov    $0x1,%esi
jmp    1030 <calloc@plt>

LLVM IR (-O0):
define i8* @rpl_calloc(i64 %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%7 = load i64, i64* %4
%8 = icmp eq i64 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %2
%10 = load i64, i64* %5
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %9, %2
%13 = call i8* @calloc(i64 1, i64 1)
store i8* %13, i8** %3
br label %28
14: ; preds = %9
%15 = load i64, i64* %4
%16 = load i64, i64* %5
%17 = mul i64 %15, %16
store i64 %17, i64* %6
%18 = load i64, i64* %6
%19 = load i64, i64* %5
%20 = udiv i64 %18, %19
%21 = load i64, i64* %4
%22 = icmp ne i64 %20, %21
br i1 %22, label %23, label %24
23: ; preds = %14
store i8* null, i8** %3
br label %28
24: ; preds = %14
%25 = load i64, i64* %4
%26 = load i64, i64* %5
%27 = call i8* @calloc(i64 %25, i64 %26)
store i8* %27, i8** %3
br label %28
28: ; preds = %24, %23, %12
%29 = load i8*, i8** %3
ret i8* %29
}

LLVM IR (-O2):
define noalias i8* @rpl_calloc(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, 0
%4 = icmp eq i64 %1, 0
%5 = or i1 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call dereferenceable_or_null(1) i8* @calloc(i64 1, i64 1)
br label %13
8: ; preds = %2
%9 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %1, i64 %0)
%10 = extractvalue { i64, i1 } %9, 1
br i1 %10, label %13, label %11
11: ; preds = %8
%12 = tail call i8* @calloc(i64 %0, i64 %1)
br label %13
13: ; preds = %8, %11, %6
%14 = phi i8* [ %7, %6 ], [ %12, %11 ], [ null, %8 ]
ret i8* %14
}
/* Variables and functions */
int idx_lsb(unsigned int);
unsigned int clr_lv_lsb(unsigned int x) {
  unsigned int ret = 0;
  if (x > 0) {
    ret = (1 << (idx_lsb(x) - 1));
  }
  return ret;
}


x86 assembly (clang, -O0):
<clr_lv_lsb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jbe    1143 <clr_lv_lsb+0x33>
mov    -0x4(%rbp),%edi
call   1030 <idx_lsb@plt>
mov    %eax,%ecx
sub    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clr_lv_lsb>:
test   %edi,%edi
je     1129 <clr_lv_lsb+0x19>
push   %rax
call   1030 <idx_lsb@plt>
lea    -0x1(%rax),%ecx
mov    $0x1,%eax
shl    %cl,%eax
add    $0x8,%rsp
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @clr_lv_lsb(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = icmp ugt i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i32 @idx_lsb(i32 %7)
%9 = sub nsw i32 %8, 1
%10 = shl i32 1, %9
store i32 %10, i32* %3
br label %11
11: ; preds = %6, %1
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @clr_lv_lsb(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i32 @idx_lsb(i32 %0)
%5 = add nsw i32 %4, -1
%6 = shl nuw i32 1, %5
br label %7
7: ; preds = %3, %1
%8 = phi i32 [ %6, %3 ], [ 0, %1 ]
ret i32 %8
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t ntohll(uint64_t val) {
  uint64_t ret = 0;
  ret = ((val & 0x00000000000000FF) << 56) |
        ((val & 0x000000000000FF00) << 40) |
        ((val & 0x0000000000FF0000) << 24) | ((val & 0x00000000FF000000) << 8) |
        ((val & 0x000000FF00000000) >> 8) | ((val & 0x0000FF0000000000) >> 24) |
        ((val & 0x00FF000000000000) >> 40) | ((val & 0xFF00000000000000) >> 56);
  return ret;
}


x86 assembly (clang, -O0):
<ntohll>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    $0x38,%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
and    $0xff00,%edx
mov    $0x28,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff0000,%ecx
shl    $0x18,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff000000,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,%eax
movslq -0x4(%rbp),%rcx
movabs $0xff00000000,%rdx
and    %rdx,%rcx
sar    $0x8,%rcx
or     %rcx,%rax
movslq -0x4(%rbp),%rcx
movabs $0xff0000000000,%rdx
and    %rdx,%rcx
sar    $0x18,%rcx
or     %rcx,%rax
movslq -0x4(%rbp),%rcx
movabs $0xff000000000000,%rdx
and    %rdx,%rcx
sar    $0x28,%rcx
or     %rcx,%rax
movslq -0x4(%rbp),%rcx
movabs $0xff00000000000000,%rdx
and    %rdx,%rcx
shr    $0x38,%rcx
or     %rcx,%rax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ntohll>:
ret

LLVM IR (-O0):
define i32 @ntohll(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = and i32 %4, 255
%6 = shl i32 %5, 56
%7 = load i32, i32* %2
%8 = and i32 %7, 65280
%9 = shl i32 %8, 40
%10 = or i32 %6, %9
%11 = load i32, i32* %2
%12 = and i32 %11, 16711680
%13 = shl i32 %12, 24
%14 = or i32 %10, %13
%15 = load i32, i32* %2
%16 = and i32 %15, -16777216
%17 = shl i32 %16, 8
%18 = or i32 %14, %17
%19 = zext i32 %18 to i64
%20 = load i32, i32* %2
%21 = sext i32 %20 to i64
%22 = and i64 %21, 1095216660480
%23 = ashr i64 %22, 8
%24 = or i64 %19, %23
%25 = load i32, i32* %2
%26 = sext i32 %25 to i64
%27 = and i64 %26, 280375465082880
%28 = ashr i64 %27, 24
%29 = or i64 %24, %28
%30 = load i32, i32* %2
%31 = sext i32 %30 to i64
%32 = and i64 %31, 71776119061217280
%33 = ashr i64 %32, 40
%34 = or i64 %29, %33
%35 = load i32, i32* %2
%36 = sext i32 %35 to i64
%37 = and i64 %36, -72057594037927936
%38 = lshr i64 %37, 56
%39 = or i64 %34, %38
%40 = trunc i64 %39 to i32
store i32 %40, i32* %3
%41 = load i32, i32* %3
ret i32 %41
}

LLVM IR (-O2):
define i32 @ntohll(i32 %0) {
ret i32 poison
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ err(int /*<<< orphan*/, char *);
void *malloc(size_t);
void *xmalloc(size_t size) {
  void *result = malloc(size);
  if (!result)
    err(EXIT_FAILURE, "out of memory");
  return result;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1159 <xmalloc+0x39>
mov    0x2e95(%rip),%rax
mov    (%rax),%edi
lea    0xeac(%rip),%rsi
call   1030 <err@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rbx
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1143 <xmalloc+0x23>
mov    0x2eab(%rip),%rax
mov    (%rax),%edi
lea    0xec2(%rip),%rsi
call   1030 <err@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
@.str = [14 x i8] c"out of memory\00"
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %11, label %8
8: ; preds = %1
%9 = load i32, i32* @EXIT_FAILURE
%10 = call i32 @err(i32 %9, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %8, %1
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
@.str = [14 x i8] c"out of memory\00"
define noalias i8* @xmalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = load i32, i32* @EXIT_FAILURE
%6 = tail call i32 @err(i32 %5, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %4, %1
ret i8* %2
}
void nop(void) {}


x86 assembly (clang, -O0):
<nop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nop>:
ret

LLVM IR (-O0):
define void @nop() {
ret void
}

LLVM IR (-O2):
define void @nop() {
ret void
}
int ab8500_fg_inst_curr(struct ab8500_fg *di) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
%struct.ab8500_fg = type opaque
define i32 @ab8500_fg_inst_curr(%struct.ab8500_fg* %0) {
%2 = alloca i32
%3 = alloca %struct.ab8500_fg*
store %struct.ab8500_fg* %0, %struct.ab8500_fg** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
%struct.ab8500_fg = type opaque
define i32 @ab8500_fg_inst_curr(%struct.ab8500_fg* nocapture readnone %0) {
ret i32 undef
}
char const *_Locale_numeric_name(const void *__DUMMY_PAR1, char *__DUMMY_PAR) {
  return 0;
}


x86 assembly (clang, -O0):
<_Locale_numeric_name>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Locale_numeric_name>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @_Locale_numeric_name(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @_Locale_numeric_name(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stdout;
void usage(const char *p) {
  fprintf(stdout,
          "Usage: %s -c <config-file>\n\nOptions:\n -c <file> load a "
          "configuration file\n -v        show version information\n -h        "
          "show usage information\n",
          p);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [145 x i8] c"Usage: %s -c <config-file>\0A\0AOptions:\0A -c <file> load a configuration file\0A -v show version information\0A -h show usage information\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stdout
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([145 x i8], [145 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [145 x i8] c"Usage: %s -c <config-file>\0A\0AOptions:\0A -c <file> load a configuration file\0A -v show version information\0A -h show usage information\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([145 x i8], [145 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void *ptr_return_array_element(void **ptrArray, int arrayIndex) {
  return ptrArray[arrayIndex];
}


x86 assembly (clang, -O0):
<ptr_return_array_element>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptr_return_array_element>:
movslq %esi,%rax
mov    (%rdi,%rax,8),%rax
ret

LLVM IR (-O0):
define i8* @ptr_return_array_element(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
%5 = load i8**, i8*** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8*, i8** %5, i64 %7
%9 = load i8*, i8** %8
ret i8* %9
}

LLVM IR (-O2):
define i8* @ptr_return_array_element(i8** nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i8*, i8** %0, i64 %3
%5 = load i8*, i8** %4
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
void repeat(char symbol, int times) {
  for (int i = 0; i < times; i++) {
    printf("%c", symbol);
  }
}


x86 assembly (clang, -O0):
<repeat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1152 <repeat+0x42>
lea    0xec5(%rip),%rdi
movsbl -0x1(%rbp),%esi
call   1030 <printf@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1128 <repeat+0x18>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<repeat>:
push   %rbp
push   %r14
push   %rbx
test   %esi,%esi
jle    113f <repeat+0x2f>
mov    %esi,%ebx
movsbl %dil,%ebp
lea    0xedb(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nop
mov    %r14,%rdi
mov    %ebp,%esi
call   1030 <printf@plt>
add    $0xffffffff,%ebx
jne    1130 <repeat+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define void @repeat(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
%5 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %13, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i8, i8* %3
%12 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %11)
br label %13
13: ; preds = %10
%14 = load i32, i32* %5
%15 = add nsw i32 %14, 1
store i32 %15, i32* %5
br label %6
16: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
define void @repeat(i8 signext %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %5, label %4
4: ; preds = %5, %2
ret void
5: ; preds = %2, %5
%6 = phi i32 [ %8, %5 ], [ 0, %2 ]
%7 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %0)
%8 = add nuw nsw i32 %6, 1
%9 = icmp eq i32 %8, %1
br i1 %9, label %4, label %5
}
/* Variables and functions */
int /*<<< orphan*/ addbyte(int);
void MMX_PSRAW(int dst_reg, int src_reg) {
  addbyte(0x66);
  addbyte(0x0f);
  addbyte(0xe1);
  addbyte(0xc0 | (dst_reg << 3) | src_reg);
}


x86 assembly (clang, -O0):
<MMX_PSRAW>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x66,%edi
call   1030 <addbyte@plt>
mov    $0xf,%edi
call   1030 <addbyte@plt>
mov    $0xe1,%edi
call   1030 <addbyte@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     $0xc0,%edi
or     -0x8(%rbp),%edi
call   1030 <addbyte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MMX_PSRAW>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x66,%edi
call   1030 <addbyte@plt>
mov    $0xf,%edi
call   1030 <addbyte@plt>
mov    $0xe1,%edi
call   1030 <addbyte@plt>
shl    $0x3,%ebp
or     %ebx,%ebp
or     $0xc0,%ebp
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <addbyte@plt>

LLVM IR (-O0):
define void @MMX_PSRAW(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @addbyte(i32 102)
%6 = call i32 @addbyte(i32 15)
%7 = call i32 @addbyte(i32 225)
%8 = load i32, i32* %3
%9 = shl i32 %8, 3
%10 = or i32 192, %9
%11 = load i32, i32* %4
%12 = or i32 %10, %11
%13 = call i32 @addbyte(i32 %12)
ret void
}

LLVM IR (-O2):
define void @MMX_PSRAW(i32 %0, i32 %1) {
%3 = tail call i32 @addbyte(i32 102)
%4 = tail call i32 @addbyte(i32 15)
%5 = tail call i32 @addbyte(i32 225)
%6 = shl i32 %0, 3
%7 = or i32 %6, %1
%8 = or i32 %7, 192
%9 = tail call i32 @addbyte(i32 %8)
ret void
}
/* Variables and functions */
int close(int);
int /*<<< orphan*/ perror(char *);
int dsm_client_close(int s) {
  int ret;
  if (ret = close(s))
    perror("close error");
  return (ret);
}


x86 assembly (clang, -O0):
<dsm_client_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
je     114b <dsm_client_close+0x2b>
lea    0xeba(%rip),%rdi
call   1040 <perror@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dsm_client_close>:
push   %rbx
call   1030 <close@plt>
mov    %eax,%ebx
test   %eax,%eax
jne    1130 <dsm_client_close+0x10>
mov    %ebx,%eax
pop    %rbx
ret
lea    0xec9(%rip),%rdi
call   1040 <perror@plt>
jmp    112c <dsm_client_close+0xc>

LLVM IR (-O0):
@.str = [12 x i8] c"close error\00"
define i32 @dsm_client_close(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @close(i32 %4)
store i32 %5, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @perror(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %1
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
@.str = [12 x i8] c"close error\00"
define i32 @dsm_client_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @perror(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ *ptls_encode_quicint(int /*<<< orphan*/ *,
                                        int /*<<< orphan*/);
uint8_t *quicly_encode_max_streams_frame(uint8_t *dst, int uni,
                                         uint64_t count) {
  *dst++ = uni ? 19 : 18;
  dst = ptls_encode_quicint(dst, count);
  return dst;
}


x86 assembly (clang, -O0):
<quicly_encode_max_streams_frame>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%edx
mov    $0x12,%ecx
mov    $0x13,%eax
cmp    $0x0,%edx
cmovne %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
call   1030 <ptls_encode_quicint@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quicly_encode_max_streams_frame>:
cmp    $0x1,%esi
mov    $0x13,%eax
sbb    $0x0,%eax
mov    %eax,(%rdi)
add    $0x4,%rdi
mov    %edx,%esi
jmp    1030 <ptls_encode_quicint@plt>

LLVM IR (-O0):
define i32* @quicly_encode_max_streams_frame(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = icmp ne i32 %7, 0
%9 = zext i1 %8 to i64
%10 = select i1 %8, i32 19, i32 18
%11 = load i32*, i32** %4
%12 = getelementptr inbounds i32, i32* %11, i32 1
store i32* %12, i32** %4
store i32 %10, i32* %11
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = call i32* @ptls_encode_quicint(i32* %13, i32 %14)
store i32* %15, i32** %4
%16 = load i32*, i32** %4
ret i32* %16
}

LLVM IR (-O2):
define i32* @quicly_encode_max_streams_frame(i32* %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %1, 0
%5 = select i1 %4, i32 18, i32 19
%6 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %5, i32* %0
%7 = tail call i32* @ptls_encode_quicint(i32* %6, i32 %2)
ret i32* %7
}
void __ipipe_init_early(void) {}


x86 assembly (clang, -O0):
<__ipipe_init_early>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ipipe_init_early>:
ret

LLVM IR (-O0):
define void @__ipipe_init_early() {
ret void
}

LLVM IR (-O2):
define void @__ipipe_init_early() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ IP2Location_DB_del_shm();
void IP2Location_delete_shm() { IP2Location_DB_del_shm(); }


x86 assembly (clang, -O0):
<IP2Location_delete_shm>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <IP2Location_DB_del_shm@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<IP2Location_delete_shm>:
xor    %eax,%eax
jmp    1030 <IP2Location_DB_del_shm@plt>

LLVM IR (-O0):
define void @IP2Location_delete_shm() {
%1 = call i32 (...) @IP2Location_DB_del_shm()
ret void
}

LLVM IR (-O2):
define void @IP2Location_delete_shm() {
%1 = tail call i32 (...) @IP2Location_DB_del_shm()
ret void
}