#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ stdout;
void uart_recv(unsigned int curr_cycle, uint8_t curr_bit) {
  static int init = 1;
  static unsigned int prev_cycle;
  static uint8_t prev_bit;
  const float BAUD_TIME = (41.66666666666666666666666666);
  static enum { ST_IDLE, ST_STRT, ST_BITS, ST_STOP } state;
  static int uart_cycles;
  static int bitcount;
  static int word;
  unsigned int cycle;
  uint8_t bit;
  if (init) {
    prev_cycle = curr_cycle;
    init = 0;
    state = ST_IDLE;
  }
  if (curr_cycle == prev_cycle) {
    prev_bit = curr_bit;
    return;
  }
  cycle = init ? 0 : 1;
  init = 0;
  while (cycle <= (curr_cycle - prev_cycle)) {
    bit = (cycle == (curr_cycle - prev_cycle)) ? curr_bit : prev_bit;
    switch (state) {
    case ST_IDLE:
      if (!bit) {
        uart_cycles = 0;
        state = ST_STRT;
      }
      break;
    case ST_STRT:
      uart_cycles++;
      if (uart_cycles >= (BAUD_TIME / 2.0)) {
        if (bit) {
          state = ST_IDLE;
        } else {
          state = ST_BITS;
          bitcount = 1;
          word = 0;
        }
      }
      break;
    case ST_BITS:
      uart_cycles++;
      if (uart_cycles >= (BAUD_TIME * (0.5 + bitcount))) {
        bitcount++;
        word >>= 1;
        word |= bit ? 0x80 : 0;
        if (bitcount >= 9) {
          state = ST_STOP;
        }
      }
      break;
    case ST_STOP:
      uart_cycles++;
      if (uart_cycles >= (BAUD_TIME * 9.5)) {
        if (bit) {
          fprintf(stdout, "%c", word);
          fflush(stdout);
        }
        state = ST_IDLE;
      }
      break;
    default:
      break;
    }
    cycle++;
  }
  prev_cycle = curr_cycle;
  prev_bit = curr_bit;
}


x86 assembly (clang, -O0):
<uart_recv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movss  0xeca(%rip),%xmm0
movss  %xmm0,-0xc(%rbp)
cmpl   $0x0,0x2eee(%rip)
je     1165 <uart_recv+0x45>
mov    -0x4(%rbp),%eax
mov    %eax,0x2ee7(%rip)
movl   $0x0,0x2ed5(%rip)
movl   $0x0,0x2edb(%rip)
mov    -0x4(%rbp),%eax
cmp    0x2eca(%rip),%eax
jne    1182 <uart_recv+0x62>
mov    -0x8(%rbp),%eax
mov    %eax,0x2ebf(%rip)
jmp    13c5 <uart_recv+0x2a5>
mov    0x2ea8(%rip),%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %eax,-0x10(%rbp)
movl   $0x0,0x2e8e(%rip)
mov    -0x10(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    0x2e8a(%rip),%ecx
cmp    %ecx,%eax
ja     13b3 <uart_recv+0x293>
mov    -0x10(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    0x2e76(%rip),%ecx
cmp    %ecx,%eax
jne    11d5 <uart_recv+0xb5>
mov    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
jmp    11de <uart_recv+0xbe>
mov    0x2e61(%rip),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    0x2e56(%rip),%eax
mov    %rax,-0x20(%rbp)
sub    $0x3,%rax
ja     13a0 <uart_recv+0x280>
mov    -0x20(%rbp),%rax
lea    0xe25(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
cmpl   $0x0,-0x14(%rbp)
jne    122a <uart_recv+0x10a>
movl   $0x0,0x2e24(%rip)
movl   $0x1,0x2e16(%rip)
jmp    13a5 <uart_recv+0x285>
mov    0x2e0f(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2e06(%rip)
cvtsi2sdl 0x2dfe(%rip),%xmm0
movsd  0xdd2(%rip),%xmm1
ucomisd %xmm1,%xmm0
jb     1294 <uart_recv+0x174>
cmpl   $0x0,-0x14(%rbp)
je     1271 <uart_recv+0x151>
movl   $0x0,0x2dd4(%rip)
jmp    128f <uart_recv+0x16f>
movl   $0x2,0x2dc5(%rip)
movl   $0x1,0x2dc3(%rip)
movl   $0x0,0x2dbd(%rip)
jmp    1294 <uart_recv+0x174>
jmp    13a5 <uart_recv+0x285>
mov    0x2da5(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2d9c(%rip)
cvtsi2sdl 0x2d94(%rip),%xmm0
cvtsi2sdl 0x2d90(%rip),%xmm1
movsd  0xd58(%rip),%xmm2
addsd  %xmm1,%xmm2
movsd  0xd44(%rip),%xmm1
mulsd  %xmm2,%xmm1
ucomisd %xmm1,%xmm0
jb     1330 <uart_recv+0x210>
mov    0x2d68(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2d5f(%rip)
mov    0x2d5d(%rip),%eax
sar    $0x1,%eax
mov    %eax,0x2d54(%rip)
mov    -0x14(%rbp),%edx
xor    %eax,%eax
mov    $0x80,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
or     0x2d3e(%rip),%eax
mov    %eax,0x2d38(%rip)
cmpl   $0x9,0x2d2d(%rip)
jl     132b <uart_recv+0x20b>
movl   $0x3,0x2d15(%rip)
jmp    1330 <uart_recv+0x210>
jmp    13a5 <uart_recv+0x285>
mov    0x2d09(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2d00(%rip)
cvtsi2sdl 0x2cf8(%rip),%xmm0
movsd  0xcb4(%rip),%xmm1
ucomisd %xmm1,%xmm0
jb     139b <uart_recv+0x27b>
cmpl   $0x0,-0x14(%rbp)
je     1391 <uart_recv+0x271>
mov    0x2c71(%rip),%rax
mov    (%rax),%edi
mov    0x2cd5(%rip),%edx
lea    0xcba(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2c56(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
movl   $0x0,0x2ca5(%rip)
jmp    13a5 <uart_recv+0x285>
jmp    13a5 <uart_recv+0x285>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    11a2 <uart_recv+0x82>
mov    -0x4(%rbp),%eax
mov    %eax,0x2c7c(%rip)
mov    -0x8(%rbp),%eax
mov    %eax,0x2c77(%rip)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_recv>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
mov    %esi,%r15d
mov    %edi,%ebp
cmpb   $0x0,0x2efd(%rip)
je     1335 <uart_recv+0x215>
mov    0x2ef4(%rip),%r9d
cmp    %ebp,%r9d
je     1354 <uart_recv+0x234>
movb   $0x1,0x2ee0(%rip)
mov    %ebp,%esi
sub    %r9d,%esi
je     134e <uart_recv+0x22e>
mov    0x2ed6(%rip),%r8d
mov    $0x1,%ebx
mov    0x2ecf(%rip),%edx
lea    0xe98(%rip),%r12
movsd  0xe80(%rip),%xmm2
movsd  0xe80(%rip),%xmm3
mov    0x2e51(%rip),%r13
lea    0xe8a(%rip),%r14
jmp    11c0 <uart_recv+0xa0>
movl   $0x0,0x2e9e(%rip)
xor    %edx,%edx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
add    $0x1,%ebx
mov    %ebp,%esi
sub    %r9d,%esi
cmp    %esi,%ebx
ja     134e <uart_recv+0x22e>
cmp    %esi,%ebx
mov    %r8d,%esi
cmove  %r15d,%esi
cmp    $0x3,%edx
ja     11b0 <uart_recv+0x90>
mov    %edx,%edx
movslq (%r12,%rdx,4),%rdx
add    %r12,%rdx
jmp    *%rdx
xor    %edx,%edx
test   %esi,%esi
jne    11b0 <uart_recv+0x90>
movl   $0x0,0x2e5b(%rip)
movl   $0x1,0x2e4d(%rip)
mov    $0x1,%edx
jmp    11b0 <uart_recv+0x90>
nopw   0x0(%rax,%rax,1)
mov    0x2e3e(%rip),%edi
lea    0x1(%rdi),%edx
mov    %edx,0x2e35(%rip)
mov    $0x1,%edx
cmp    $0x14,%edi
jl     11b0 <uart_recv+0x90>
test   %esi,%esi
jne    1198 <uart_recv+0x78>
movl   $0x2,0x2e15(%rip)
movl   $0x1,0x2e13(%rip)
movl   $0x0,0x2e0d(%rip)
mov    $0x2,%edx
jmp    11b0 <uart_recv+0x90>
nopl   0x0(%rax)
mov    0x2dee(%rip),%edx
add    $0x1,%edx
mov    %edx,0x2de5(%rip)
xorps  %xmm0,%xmm0
cvtsi2sd %edx,%xmm0
mov    0x2ddc(%rip),%edi
xorps  %xmm1,%xmm1
cvtsi2sd %edi,%xmm1
addsd  %xmm2,%xmm1
mulsd  %xmm3,%xmm1
mov    $0x2,%edx
ucomisd %xmm1,%xmm0
jb     11b0 <uart_recv+0x90>
lea    0x1(%rdi),%ecx
mov    %ecx,0x2db5(%rip)
mov    0x2db3(%rip),%ecx
sar    %ecx
xor    %eax,%eax
test   %esi,%esi
setne  %al
shl    $0x7,%eax
or     %ecx,%eax
mov    %eax,0x2d9f(%rip)
cmp    $0x8,%edi
jl     11b0 <uart_recv+0x90>
movl   $0x3,0x2d80(%rip)
mov    $0x3,%edx
jmp    11b0 <uart_recv+0x90>
nopw   0x0(%rax,%rax,1)
mov    0x2d6e(%rip),%eax
lea    0x1(%rax),%ecx
mov    %ecx,0x2d65(%rip)
mov    $0x3,%edx
cmp    $0x18b,%eax
jl     11b0 <uart_recv+0x90>
test   %esi,%esi
je     1198 <uart_recv+0x78>
mov    0x0(%r13),%edi
mov    0x2d4b(%rip),%edx
mov    %r14,%rsi
call   1030 <fprintf@plt>
mov    0x0(%r13),%edi
call   1040 <fflush@plt>
movsd  0xcee(%rip),%xmm3
movsd  0xcde(%rip),%xmm2
mov    0x2d13(%rip),%r8d
mov    0x2d08(%rip),%r9d
jmp    1198 <uart_recv+0x78>
mov    %ebp,0x2cfd(%rip)
movb   $0x1,0x2cf2(%rip)
movl   $0x0,0x2cf4(%rip)
jmp    1354 <uart_recv+0x234>
mov    %ebp,0x2ce4(%rip)
mov    %r15d,0x2ce1(%rip)
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@uart_recv.init = internal global i32 1
@uart_recv.prev_cycle = internal global i32 0
@uart_recv.prev_bit = internal global i32 0
@uart_recv.state = internal global i32 0
@uart_recv.uart_cycles = internal global i32 0
@uart_recv.bitcount = internal global i32 0
@uart_recv.word = internal global i32 0
@stdout = global i32 0
@.str = [3 x i8] c"%c\00"
define void @uart_recv(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca float
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store float 0x4044D55560000000, float* %5
%8 = load i32, i32* @uart_recv.init
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = load i32, i32* %3
store i32 %11, i32* @uart_recv.prev_cycle
store i32 0, i32* @uart_recv.init
store i32 0, i32* @uart_recv.state
br label %12
12: ; preds = %10, %2
%13 = load i32, i32* %3
%14 = load i32, i32* @uart_recv.prev_cycle
%15 = icmp eq i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load i32, i32* %4
store i32 %17, i32* @uart_recv.prev_bit
br label %110
18: ; preds = %12
%19 = load i32, i32* @uart_recv.init
%20 = icmp ne i32 %19, 0
%21 = zext i1 %20 to i64
%22 = select i1 %20, i32 0, i32 1
store i32 %22, i32* %6
store i32 0, i32* @uart_recv.init
br label %23
23: ; preds = %104, %18
%24 = load i32, i32* %6
%25 = load i32, i32* %3
%26 = load i32, i32* @uart_recv.prev_cycle
%27 = sub i32 %25, %26
%28 = icmp ule i32 %24, %27
br i1 %28, label %29, label %107
29: ; preds = %23
%30 = load i32, i32* %6
%31 = load i32, i32* %3
%32 = load i32, i32* @uart_recv.prev_cycle
%33 = sub i32 %31, %32
%34 = icmp eq i32 %30, %33
br i1 %34, label %35, label %37
35: ; preds = %29
%36 = load i32, i32* %4
br label %39
37: ; preds = %29
%38 = load i32, i32* @uart_recv.prev_bit
br label %39
39: ; preds = %37, %35
%40 = phi i32 [ %36, %35 ], [ %38, %37 ]
store i32 %40, i32* %7
%41 = load i32, i32* @uart_recv.state
switch i32 %41, label %103 [
i32 0, label %42
i32 1, label %47
i32 2, label %60
i32 3, label %86
]
42: ; preds = %39
%43 = load i32, i32* %7
%44 = icmp ne i32 %43, 0
br i1 %44, label %46, label %45
45: ; preds = %42
store i32 0, i32* @uart_recv.uart_cycles
store i32 1, i32* @uart_recv.state
br label %46
46: ; preds = %45, %42
br label %104
47: ; preds = %39
%48 = load i32, i32* @uart_recv.uart_cycles
%49 = add nsw i32 %48, 1
store i32 %49, i32* @uart_recv.uart_cycles
%50 = load i32, i32* @uart_recv.uart_cycles
%51 = sitofp i32 %50 to double
%52 = fcmp oge double %51, 0x4034D55560000000
br i1 %52, label %53, label %59
53: ; preds = %47
%54 = load i32, i32* %7
%55 = icmp ne i32 %54, 0
br i1 %55, label %56, label %57
56: ; preds = %53
store i32 0, i32* @uart_recv.state
br label %58
57: ; preds = %53
store i32 2, i32* @uart_recv.state
store i32 1, i32* @uart_recv.bitcount
store i32 0, i32* @uart_recv.word
br label %58
58: ; preds = %57, %56
br label %59
59: ; preds = %58, %47
br label %104
60: ; preds = %39
%61 = load i32, i32* @uart_recv.uart_cycles
%62 = add nsw i32 %61, 1
store i32 %62, i32* @uart_recv.uart_cycles
%63 = load i32, i32* @uart_recv.uart_cycles
%64 = sitofp i32 %63 to double
%65 = load i32, i32* @uart_recv.bitcount
%66 = sitofp i32 %65 to double
%67 = fadd double 5.000000e-01, %66
%68 = fmul double 0x4044D55560000000, %67
%69 = fcmp oge double %64, %68
br i1 %69, label %70, label %85
70: ; preds = %60
%71 = load i32, i32* @uart_recv.bitcount
%72 = add nsw i32 %71, 1
store i32 %72, i32* @uart_recv.bitcount
%73 = load i32, i32* @uart_recv.word
%74 = ashr i32 %73, 1
store i32 %74, i32* @uart_recv.word
%75 = load i32, i32* %7
%76 = icmp ne i32 %75, 0
%77 = zext i1 %76 to i64
%78 = select i1 %76, i32 128, i32 0
%79 = load i32, i32* @uart_recv.word
%80 = or i32 %79, %78
store i32 %80, i32* @uart_recv.word
%81 = load i32, i32* @uart_recv.bitcount
%82 = icmp sge i32 %81, 9
br i1 %82, label %83, label %84
83: ; preds = %70
store i32 3, i32* @uart_recv.state
br label %84
84: ; preds = %83, %70
br label %85
85: ; preds = %84, %60
br label %104
86: ; preds = %39
%87 = load i32, i32* @uart_recv.uart_cycles
%88 = add nsw i32 %87, 1
store i32 %88, i32* @uart_recv.uart_cycles
%89 = load i32, i32* @uart_recv.uart_cycles
%90 = sitofp i32 %89 to double
%91 = fcmp oge double %90, 0x4078BD5562000000
br i1 %91, label %92, label %102
92: ; preds = %86
%93 = load i32, i32* %7
%94 = icmp ne i32 %93, 0
br i1 %94, label %95, label %101
95: ; preds = %92
%96 = load i32, i32* @stdout
%97 = load i32, i32* @uart_recv.word
%98 = call i32 @fprintf(i32 %96, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %97)
%99 = load i32, i32* @stdout
%100 = call i32 @fflush(i32 %99)
br label %101
101: ; preds = %95, %92
store i32 0, i32* @uart_recv.state
br label %102
102: ; preds = %101, %86
br label %104
103: ; preds = %39
br label %104
104: ; preds = %103, %102, %85, %59, %46
%105 = load i32, i32* %6
%106 = add i32 %105, 1
store i32 %106, i32* %6
br label %23
107: ; preds = %23
%108 = load i32, i32* %3
store i32 %108, i32* @uart_recv.prev_cycle
%109 = load i32, i32* %4
store i32 %109, i32* @uart_recv.prev_bit
br label %110
110: ; preds = %107, %16
ret void
}

LLVM IR (-O2):
@uart_recv.init = internal unnamed_addr global i1 false
@uart_recv.prev_cycle = internal unnamed_addr global i32 0
@uart_recv.prev_bit = internal unnamed_addr global i32 0
@uart_recv.state = internal unnamed_addr global i32 0
@uart_recv.uart_cycles = internal unnamed_addr global i32 0
@uart_recv.bitcount = internal unnamed_addr global i32 0
@uart_recv.word = internal unnamed_addr global i32 0
@stdout = global i32 0
@.str = [3 x i8] c"%c\00"
define void @uart_recv(i32 %0, i32 %1) {
%3 = load i1, i1* @uart_recv.init
br i1 %3, label %5, label %4
4: ; preds = %2
store i32 %0, i32* @uart_recv.prev_cycle
store i1 true, i1* @uart_recv.init
store i32 0, i32* @uart_recv.state
br label %78
5: ; preds = %2
%6 = load i32, i32* @uart_recv.prev_cycle
%7 = icmp eq i32 %6, %0
br i1 %7, label %78, label %8
8: ; preds = %5
store i1 true, i1* @uart_recv.init
%9 = sub i32 %0, %6
%10 = icmp eq i32 %9, 0
br i1 %10, label %77, label %11
11: ; preds = %8
%12 = load i32, i32* @uart_recv.prev_bit
%13 = load i32, i32* @uart_recv.state
br label %14
14: ; preds = %11, %69
%15 = phi i32 [ %70, %69 ], [ %6, %11 ]
%16 = phi i32 [ %71, %69 ], [ %6, %11 ]
%17 = phi i32 [ %72, %69 ], [ %13, %11 ]
%18 = phi i32 [ %73, %69 ], [ %12, %11 ]
%19 = phi i32 [ %75, %69 ], [ %9, %11 ]
%20 = phi i32 [ %74, %69 ], [ 1, %11 ]
%21 = icmp eq i32 %20, %19
%22 = select i1 %21, i32 %1, i32 %18
switch i32 %17, label %69 [
i32 0, label %23
i32 1, label %26
i32 2, label %34
i32 3, label %52
]
23: ; preds = %14
%24 = icmp eq i32 %22, 0
br i1 %24, label %25, label %69
25: ; preds = %23
store i32 0, i32* @uart_recv.uart_cycles
store i32 1, i32* @uart_recv.state
br label %69
26: ; preds = %14
%27 = load i32, i32* @uart_recv.uart_cycles
%28 = add nsw i32 %27, 1
store i32 %28, i32* @uart_recv.uart_cycles
%29 = icmp sgt i32 %27, 19
br i1 %29, label %30, label %69
30: ; preds = %26
%31 = icmp eq i32 %22, 0
br i1 %31, label %33, label %32
32: ; preds = %30
store i32 0, i32* @uart_recv.state
br label %69
33: ; preds = %30
store i32 2, i32* @uart_recv.state
store i32 1, i32* @uart_recv.bitcount
store i32 0, i32* @uart_recv.word
br label %69
34: ; preds = %14
%35 = load i32, i32* @uart_recv.uart_cycles
%36 = add nsw i32 %35, 1
store i32 %36, i32* @uart_recv.uart_cycles
%37 = sitofp i32 %36 to double
%38 = load i32, i32* @uart_recv.bitcount
%39 = sitofp i32 %38 to double
%40 = fadd double %39, 5.000000e-01
%41 = fmul double %40, 0x4044D55560000000
%42 = fcmp ugt double %41, %37
br i1 %42, label %69, label %43
43: ; preds = %34
%44 = add nsw i32 %38, 1
store i32 %44, i32* @uart_recv.bitcount
%45 = load i32, i32* @uart_recv.word
%46 = ashr i32 %45, 1
%47 = icmp eq i32 %22, 0
%48 = select i1 %47, i32 0, i32 128
%49 = or i32 %46, %48
store i32 %49, i32* @uart_recv.word
%50 = icmp sgt i32 %38, 7
br i1 %50, label %51, label %69
51: ; preds = %43
store i32 3, i32* @uart_recv.state
br label %69
52: ; preds = %14
%53 = load i32, i32* @uart_recv.uart_cycles
%54 = add nsw i32 %53, 1
store i32 %54, i32* @uart_recv.uart_cycles
%55 = icmp sgt i32 %53, 394
br i1 %55, label %56, label %69
56: ; preds = %52
%57 = icmp eq i32 %22, 0
br i1 %57, label %66, label %58
58: ; preds = %56
%59 = load i32, i32* @stdout
%60 = load i32, i32* @uart_recv.word
%61 = tail call i32 @fprintf(i32 %59, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %60)
%62 = load i32, i32* @stdout
%63 = tail call i32 @fflush(i32 %62)
%64 = load i32, i32* @uart_recv.prev_bit
%65 = load i32, i32* @uart_recv.prev_cycle
br label %66
66: ; preds = %58, %56
%67 = phi i32 [ %65, %58 ], [ %15, %56 ]
%68 = phi i32 [ %64, %58 ], [ %18, %56 ]
store i32 0, i32* @uart_recv.state
br label %69
69: ; preds = %14, %52, %66, %34, %51, %43, %26, %33, %32, %23, %25
%70 = phi i32 [ %15, %14 ], [ %15, %52 ], [ %67, %66 ], [ %15, %34 ], [ %15, %51 ], [ %15, %43 ], [ %15, %26 ], [ %15, %33 ], [ %15, %32 ], [ %15, %23 ], [ %15, %25 ]
%71 = phi i32 [ %16, %14 ], [ %16, %52 ], [ %67, %66 ], [ %16, %34 ], [ %16, %51 ], [ %16, %43 ], [ %16, %26 ], [ %16, %33 ], [ %16, %32 ], [ %16, %23 ], [ %16, %25 ]
%72 = phi i32 [ %17, %14 ], [ 3, %52 ], [ 0, %66 ], [ 2, %34 ], [ 3, %51 ], [ 2, %43 ], [ 1, %26 ], [ 2, %33 ], [ 0, %32 ], [ 0, %23 ], [ 1, %25 ]
%73 = phi i32 [ %18, %14 ], [ %18, %52 ], [ %68, %66 ], [ %18, %34 ], [ %18, %51 ], [ %18, %43 ], [ %18, %26 ], [ %18, %33 ], [ %18, %32 ], [ %18, %23 ], [ %18, %25 ]
%74 = add i32 %20, 1
%75 = sub i32 %0, %71
%76 = icmp ugt i32 %74, %75
br i1 %76, label %77, label %14
77: ; preds = %69, %8
store i32 %0, i32* @uart_recv.prev_cycle
br label %78
78: ; preds = %4, %5, %77
store i32 %1, i32* @uart_recv.prev_bit
ret void
}