xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void SysCtlPeripheralSleepEnable(uint32_t ui32Peripheral) {
  ;
  (*((volatile uint32_t
          *)(((uint32_t)(0x400fe700 + ((ui32Peripheral & 0xff00) >> 8)) &
              0xF0000000) |
             0x02000000 |
             (((uint32_t)(0x400fe700 + ((ui32Peripheral & 0xff00) >> 8)) &
               0x000FFFFF)
              << 5) |
             ((ui32Peripheral & 0xff) << 2)))) = 1;
}


x86 assembly (clang, -O0):
<SysCtlPeripheralSleepEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
sar    $0x8,%eax
add    $0x400fe700,%eax
and    $0xf0000000,%eax
or     $0x2000000,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
sar    $0x8,%ecx
add    $0x400fe700,%ecx
and    $0xfffff,%ecx
shl    $0x5,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
shl    $0x2,%ecx
or     %ecx,%eax
mov    %eax,%eax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlPeripheralSleepEnable>:
movzbl %dil,%eax
shr    $0x3,%edi
and    $0x1fe0,%edi
shl    $0x2,%eax
or     %edi,%eax
movl   $0x1,0x43fce000(%rax)
ret

LLVM IR (-O0):
define void @SysCtlPeripheralSleepEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 65280
%5 = ashr i32 %4, 8
%6 = add nsw i32 1074784000, %5
%7 = and i32 %6, -268435456
%8 = or i32 %7, 33554432
%9 = load i32, i32* %2
%10 = and i32 %9, 65280
%11 = ashr i32 %10, 8
%12 = add nsw i32 1074784000, %11
%13 = and i32 %12, 1048575
%14 = shl i32 %13, 5
%15 = or i32 %8, %14
%16 = load i32, i32* %2
%17 = and i32 %16, 255
%18 = shl i32 %17, 2
%19 = or i32 %15, %18
%20 = zext i32 %19 to i64
%21 = inttoptr i64 %20 to i32*
store volatile i32 1, i32* %21
ret void
}

LLVM IR (-O2):
define void @SysCtlPeripheralSleepEnable(i32 %0) {
%2 = lshr i32 %0, 3
%3 = and i32 %2, 8160
%4 = shl i32 %0, 2
%5 = and i32 %4, 1020
%6 = or i32 %5, %3
%7 = or i32 %6, 1140645888
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store volatile i32 1, i32* %9
ret void
}
void msm_iommu_unmap_contig_buffer(unsigned long iova, unsigned int domain_no,
                                   unsigned int partition_no,
                                   unsigned long size) {
  return;
}


x86 assembly (clang, -O0):
<msm_iommu_unmap_contig_buffer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<msm_iommu_unmap_contig_buffer>:
ret

LLVM IR (-O0):
define void @msm_iommu_unmap_contig_buffer(i64 %0, i32 %1, i32 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i32
%7 = alloca i32
%8 = alloca i64
store i64 %0, i64* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i64 %3, i64* %8
ret void
}

LLVM IR (-O2):
define void @msm_iommu_unmap_contig_buffer(i64 %0, i32 %1, i32 %2, i64 %3) {
ret void
}
/* Variables and functions */
int YabSockDeInit() { return -1; }


x86 assembly (clang, -O0):
<YabSockDeInit>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<YabSockDeInit>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @YabSockDeInit() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @YabSockDeInit() {
ret i32 -1
}
/* Type definitions */
struct delayed_work {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cancel_delayed_work_sync(struct delayed_work *);
__attribute__((always_)) void
cancel_rearming_delayed_work(struct delayed_work *work) {
  cancel_delayed_work_sync(work);
}


x86 assembly (clang, -O0):
<cancel_rearming_delayed_work>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <cancel_delayed_work_sync@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cancel_rearming_delayed_work>:
jmp    1030 <cancel_delayed_work_sync@plt>

LLVM IR (-O0):
%struct.delayed_work = type { i32 }
define void @cancel_rearming_delayed_work(%struct.delayed_work* %0) {
%2 = alloca %struct.delayed_work*
store %struct.delayed_work* %0, %struct.delayed_work** %2
%3 = load %struct.delayed_work*, %struct.delayed_work** %2
%4 = call i32 @cancel_delayed_work_sync(%struct.delayed_work* %3)
ret void
}

LLVM IR (-O2):
%struct.delayed_work = type { i32 }
define void @cancel_rearming_delayed_work(%struct.delayed_work* %0) {
%2 = tail call i32 @cancel_delayed_work_sync(%struct.delayed_work* %0)
ret void
}
void pathcon_nm10_incref(void) {}


x86 assembly (clang, -O0):
<pathcon_nm10_incref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm10_incref>:
ret

LLVM IR (-O0):
define void @pathcon_nm10_incref() {
ret void
}

LLVM IR (-O2):
define void @pathcon_nm10_incref() {
ret void
}
const char *db_list_jesrcs_report_sql(void) {
  static const char *query = "SELECT"
                             "  name AS 'Name',"
                             "  description as 'Description'"
                             "  FROM jesrcs"
                             "  ORDER BY name";
  return query;
}


x86 assembly (clang, -O0):
<db_list_jesrcs_report_sql>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f15(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<db_list_jesrcs_report_sql>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@db_list_jesrcs_report_sql.query = internal global i8* getelementptr inbounds ([82 x i8], [82 x i8]* @.str, i32 0, i32 0)
@.str = [82 x i8] c"SELECT name AS 'Name', description as 'Description' FROM jesrcs ORDER BY name\00"
define i8* @db_list_jesrcs_report_sql() {
%1 = load i8*, i8** @db_list_jesrcs_report_sql.query
ret i8* %1
}

LLVM IR (-O2):
@.str = [82 x i8] c"SELECT name AS 'Name', description as 'Description' FROM jesrcs ORDER BY name\00"
define i8* @db_list_jesrcs_report_sql() {
ret i8* getelementptr inbounds ([82 x i8], [82 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ _HibernateWriteComplete();
void HibernateDisable(void) {
  (*((volatile uint32_t *)(0x400FC010))) &= ~0x00000040;
  _HibernateWriteComplete();
}


x86 assembly (clang, -O0):
<HibernateDisable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400fc010,%eax
mov    (%rax),%ecx
and    $0xffffffbf,%ecx
mov    $0x400fc010,%eax
mov    %ecx,(%rax)
mov    $0x0,%al
call   1030 <_HibernateWriteComplete@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateDisable>:
andl   $0xffffffbf,0x400fc010
bf
xor    %eax,%eax
jmp    1030 <_HibernateWriteComplete@plt>

LLVM IR (-O0):
define void @HibernateDisable() {
%1 = load volatile i32, i32* inttoptr (i64 1074774032 to i32*)
%2 = and i32 %1, -65
store volatile i32 %2, i32* inttoptr (i64 1074774032 to i32*)
%3 = call i32 (...) @_HibernateWriteComplete()
ret void
}

LLVM IR (-O2):
define void @HibernateDisable() {
%1 = load volatile i32, i32* inttoptr (i64 1074774032 to i32*)
%2 = and i32 %1, -65
store volatile i32 %2, i32* inttoptr (i64 1074774032 to i32*)
%3 = tail call i32 (...) @_HibernateWriteComplete()
ret void
}
float max(float a, float b) { return ((a > b) ? a : b); }


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    112c <max+0x2c>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    1136 <max+0x36>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
maxss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @max(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp ogt float %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load float, float* %3
br label %12
10: ; preds = %2
%11 = load float, float* %4
br label %12
12: ; preds = %10, %8
%13 = phi float [ %9, %8 ], [ %11, %10 ]
ret float %13
}

LLVM IR (-O2):
define float @max(float %0, float %1) {
%3 = fcmp ogt float %0, %1
%4 = select i1 %3, float %0, float %1
ret float %4
}
/* Variables and functions */
char *commas_in_money(double);
char *timlib_place_commas_in_money(double d) { return commas_in_money(d); }


x86 assembly (clang, -O0):
<timlib_place_commas_in_money>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <commas_in_money@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timlib_place_commas_in_money>:
jmp    1030 <commas_in_money@plt>

LLVM IR (-O0):
define i8* @timlib_place_commas_in_money(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i8* @commas_in_money(double %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @timlib_place_commas_in_money(double %0) {
%2 = tail call i8* @commas_in_money(double %0)
ret i8* %2
}
/* Variables and functions */
char *strchr(char *, char);
void usrgrp(char *name, char **usr, char **grp) {
  *usr = name;
  char *group = strchr(name, ':');
  if (group)
    *group++ = '\0';
  *grp = group;
}


x86 assembly (clang, -O0):
<usrgrp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rdi
mov    $0x3a,%esi
call   1030 <strchr@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     115e <usrgrp+0x4e>
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x20(%rbp)
movb   $0x0,(%rax)
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usrgrp>:
push   %rbx
mov    %rdx,%rbx
mov    %rdi,(%rsi)
mov    $0x3a,%esi
call   1030 <strchr@plt>
test   %rax,%rax
je     1132 <usrgrp+0x22>
mov    %rax,%rcx
add    $0x1,%rcx
movb   $0x0,(%rax)
jmp    1134 <usrgrp+0x24>
xor    %ecx,%ecx
mov    %rcx,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @usrgrp(i8* %0, i8** %1, i8** %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
%7 = alloca i8*
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i8** %2, i8*** %6
%8 = load i8*, i8** %4
%9 = load i8**, i8*** %5
store i8* %8, i8** %9
%10 = load i8*, i8** %4
%11 = call i8* @strchr(i8* %10, i8 signext 58)
store i8* %11, i8** %7
%12 = load i8*, i8** %7
%13 = icmp ne i8* %12, null
br i1 %13, label %14, label %17
14: ; preds = %3
%15 = load i8*, i8** %7
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %7
store i8 0, i8* %15
br label %17
17: ; preds = %14, %3
%18 = load i8*, i8** %7
%19 = load i8**, i8*** %6
store i8* %18, i8** %19
ret void
}

LLVM IR (-O2):
define void @usrgrp(i8* %0, i8** nocapture writeonly %1, i8** nocapture writeonly %2) {
store i8* %0, i8** %1
%4 = tail call i8* @strchr(i8* dereferenceable(1) %0, i8 signext 58)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = getelementptr inbounds i8, i8* %4, i64 1
store i8 0, i8* %4
br label %8
8: ; preds = %6, %3
%9 = phi i8* [ %7, %6 ], [ null, %3 ]
store i8* %9, i8** %2
ret void
}
int FmoEndPicture() { return 0; }


x86 assembly (clang, -O0):
<FmoEndPicture>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FmoEndPicture>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @FmoEndPicture() {
ret i32 0
}

LLVM IR (-O2):
define i32 @FmoEndPicture() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void close_bmp(char **pDib) { free(*pDib); }


x86 assembly (clang, -O0):
<close_bmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_bmp>:
mov    (%rdi),%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @close_bmp(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
%5 = call i32 @free(i8* %4)
ret void
}

LLVM IR (-O2):
define void @close_bmp(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = tail call i32 @free(i8* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ is_valid_atom(char const);
int str_is_valid_atom(const char *atom) {
  while (*atom) {
    if (!is_valid_atom(*atom))
      return 0;
    ++atom;
  }
  return 1;
}


x86 assembly (clang, -O0):
<str_is_valid_atom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     115b <str_is_valid_atom+0x4b>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <is_valid_atom@plt>
cmp    $0x0,%eax
jne    114a <str_is_valid_atom+0x3a>
movl   $0x0,-0x4(%rbp)
jmp    1162 <str_is_valid_atom+0x52>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    111c <str_is_valid_atom+0xc>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_is_valid_atom>:
push   %rbp
push   %rbx
push   %rax
mov    (%rdi),%al
mov    $0x1,%ebp
test   %al,%al
je     114b <str_is_valid_atom+0x3b>
mov    %rdi,%rbx
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
nop
movsbl %al,%edi
call   1030 <is_valid_atom@plt>
test   %eax,%eax
je     1149 <str_is_valid_atom+0x39>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <str_is_valid_atom+0x20>
jmp    114b <str_is_valid_atom+0x3b>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @str_is_valid_atom(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %14, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %4
%9 = load i8*, i8** %3
%10 = load i8, i8* %9
%11 = call i32 @is_valid_atom(i8 signext %10)
%12 = icmp ne i32 %11, 0
br i1 %12, label %14, label %13
13: ; preds = %8
store i32 0, i32* %2
br label %18
14: ; preds = %8
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
br label %4
17: ; preds = %4
store i32 1, i32* %2
br label %18
18: ; preds = %17, %13
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @str_is_valid_atom(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %7
4: ; preds = %7
%5 = load i8, i8* %12
%6 = icmp eq i8 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %1, %4
%8 = phi i8 [ %5, %4 ], [ %2, %1 ]
%9 = phi i8* [ %12, %4 ], [ %0, %1 ]
%10 = tail call i32 @is_valid_atom(i8 signext %8)
%11 = icmp eq i32 %10, 0
%12 = getelementptr inbounds i8, i8* %9, i64 1
br i1 %11, label %13, label %4
13: ; preds = %7, %4, %1
%14 = phi i32 [ 1, %1 ], [ 1, %4 ], [ 0, %7 ]
ret i32 %14
}
void printlen(a, b) int a, b;
{
  if (a != 1) {
    emit_int(a);
  };
  if (b != 1) {
    emit_int_sprintf("/%d", b);
  };
}


x86 assembly (clang, -O0):
<printlen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x1,-0x4(%rbp)
je     1142 <printlen+0x22>
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1030 <emit_int@plt>
cmpl   $0x1,-0x8(%rbp)
je     115d <printlen+0x3d>
mov    -0x8(%rbp),%esi
lea    0xeaa(%rip),%rdi
mov    $0x0,%al
call   1040 <emit_int_sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printlen>:
push   %rbx
mov    %esi,%ebx
cmp    $0x1,%edi
je     112f <printlen+0xf>
xor    %eax,%eax
call   1030 <emit_int@plt>
cmp    $0x1,%ebx
jne    1136 <printlen+0x16>
pop    %rbx
ret
lea    0xec3(%rip),%rdi
mov    %ebx,%esi
xor    %eax,%eax
pop    %rbx
jmp    1040 <emit_int_sprintf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"/%d\00"
define void @printlen(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 1
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %3
%9 = call i32 (i32, ...) bitcast (i32 (...)* @emit_int to i32 (i32, ...)*)(i32 %8)
br label %10
10: ; preds = %7, %2
%11 = load i32, i32* %4
%12 = icmp ne i32 %11, 1
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %4
%15 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @emit_int_sprintf to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %14)
br label %16
16: ; preds = %13, %10
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"/%d\00"
define void @printlen(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 1
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 (i32, ...) bitcast (i32 (...)* @emit_int to i32 (i32, ...)*)(i32 %0)
br label %6
6: ; preds = %4, %2
%7 = icmp eq i32 %1, 1
br i1 %7, label %10, label %8
8: ; preds = %6
%9 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @emit_int_sprintf to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
br label %10
10: ; preds = %8, %6
ret void
}
void rop3_228_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = T ^ S;
  stk2 = *D & stk3;
  stk1 = S ^ stk2;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_228_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_228_1_0>:
or     %edx,%esi
and    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_228_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %6
%11 = zext i8 %10 to i32
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = xor i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %9
%16 = load i8*, i8** %4
%17 = load i8, i8* %16
%18 = zext i8 %17 to i32
%19 = load i8, i8* %9
%20 = zext i8 %19 to i32
%21 = and i32 %18, %20
%22 = trunc i32 %21 to i8
store i8 %22, i8* %8
%23 = load i8, i8* %5
%24 = zext i8 %23 to i32
%25 = load i8, i8* %8
%26 = zext i8 %25 to i32
%27 = xor i32 %24, %26
%28 = trunc i32 %27 to i8
store i8 %28, i8* %7
%29 = load i8, i8* %7
%30 = zext i8 %29 to i32
%31 = load i8, i8* %5
%32 = zext i8 %31 to i32
%33 = xor i32 %32, -1
%34 = and i32 %30, %33
%35 = load i8*, i8** %4
%36 = load i8, i8* %35
%37 = zext i8 %36 to i32
%38 = load i8, i8* %5
%39 = zext i8 %38 to i32
%40 = and i32 %37, %39
%41 = or i32 %34, %40
%42 = trunc i32 %41 to i8
%43 = load i8*, i8** %4
store i8 %42, i8* %43
ret void
}

LLVM IR (-O2):
define void @rop3_228_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %2, %1
%6 = and i8 %5, %4
store i8 %6, i8* %0
ret void
}
/* Variables and functions */
int cealtestperf_main(int, char **);
int main(int argc, char **argv) { return cealtestperf_main(argc, argv); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <cealtestperf_main@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
jmp    1030 <cealtestperf_main@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @cealtestperf_main(i32 %6, i8** %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @cealtestperf_main(i32 %0, i8** %1)
ret i32 %3
}
int idadedias(int anos, int meses, int dias) {
  int m, m1, d, d1;
  m = anos * 12;
  m1 = m + meses;
  d = m1 * 30;
  d1 = d + dias;
  return d1;
}


x86 assembly (clang, -O0):
<idadedias>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
imul   $0xc,-0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
imul   $0x1e,-0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<idadedias>:
lea    (%rdi,%rdi,2),%eax
lea    (%rsi,%rax,4),%ecx
mov    %ecx,%eax
shl    $0x5,%eax
sub    %ecx,%eax
sub    %ecx,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @idadedias(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%11 = load i32, i32* %4
%12 = mul nsw i32 %11, 12
store i32 %12, i32* %7
%13 = load i32, i32* %7
%14 = load i32, i32* %5
%15 = add nsw i32 %13, %14
store i32 %15, i32* %8
%16 = load i32, i32* %8
%17 = mul nsw i32 %16, 30
store i32 %17, i32* %9
%18 = load i32, i32* %9
%19 = load i32, i32* %6
%20 = add nsw i32 %18, %19
store i32 %20, i32* %10
%21 = load i32, i32* %10
ret i32 %21
}

LLVM IR (-O2):
define i32 @idadedias(i32 %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %0, 12
%5 = add nsw i32 %4, %1
%6 = mul nsw i32 %5, 30
%7 = add nsw i32 %6, %2
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ nibble_sort_word(int /*<<< orphan*/);
void nibble_sort_hans(uint64_t *buf) {
  for (int i = 0; i < 1024; i++) {
    buf[i] = nibble_sort_word(buf[i]);
  }
}


x86 assembly (clang, -O0):
<nibble_sort_hans>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x400,-0xc(%rbp)
jge    115b <nibble_sort_hans+0x4b>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%edi
call   1030 <nibble_sort_word@plt>
mov    %eax,%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <nibble_sort_hans+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nibble_sort_hans>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %ebx,%ebx
nopl   0x0(%rax)
mov    (%r14,%rbx,4),%edi
call   1030 <nibble_sort_word@plt>
mov    %eax,(%r14,%rbx,4)
add    $0x1,%rbx
cmp    $0x400,%rbx
jne    1120 <nibble_sort_hans+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @nibble_sort_hans(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
br label %4
4: ; preds = %18, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 1024
br i1 %6, label %7, label %21
7: ; preds = %4
%8 = load i32*, i32** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
%13 = call i32 @nibble_sort_word(i32 %12)
%14 = load i32*, i32** %2
%15 = load i32, i32* %3
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
store i32 %13, i32* %17
br label %18
18: ; preds = %7
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %4
21: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @nibble_sort_hans(i32* nocapture %0) {
br label %3
2: ; preds = %3
ret void
3: ; preds = %1, %3
%4 = phi i64 [ 0, %1 ], [ %8, %3 ]
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = tail call i32 @nibble_sort_word(i32 %6)
store i32 %7, i32* %5
%8 = add nuw nsw i64 %4, 1
%9 = icmp eq i64 %8, 1024
br i1 %9, label %2, label %3
}
/* Variables and functions */
scalar_t__ isDiff20Lower(int);
scalar_t__ isEvenOddLower(int);
int toUpper(int cr) {
  if (isDiff20Lower(cr)) {
    cr -= 0x20;
  } else if (isEvenOddLower(cr)) {
    --cr;
  } else if (cr == 0xFF) {
    cr = 0x178;
  }
  return cr;
}


x86 assembly (clang, -O0):
<toUpper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <isDiff20Lower@plt>
cmp    $0x0,%rax
je     114b <toUpper+0x2b>
mov    -0x4(%rbp),%eax
sub    $0x20,%eax
mov    %eax,-0x4(%rbp)
jmp    1189 <toUpper+0x69>
mov    -0x4(%rbp),%edi
call   1040 <isEvenOddLower@plt>
cmp    $0x0,%rax
je     116b <toUpper+0x4b>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    1184 <toUpper+0x64>
cmpl   $0xff,-0x4(%rbp)
jne    117f <toUpper+0x5f>
movl   $0x178,-0x4(%rbp)
jmp    1184 <toUpper+0x64>
jmp    1189 <toUpper+0x69>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toUpper>:
push   %rbx
mov    %edi,%ebx
call   1030 <isDiff20Lower@plt>
test   %rax,%rax
je     1132 <toUpper+0x12>
add    $0xffffffe0,%ebx
jmp    1151 <toUpper+0x31>
mov    %ebx,%edi
call   1040 <isEvenOddLower@plt>
test   %rax,%rax
je     1143 <toUpper+0x23>
add    $0xffffffff,%ebx
jmp    1151 <toUpper+0x31>
cmp    $0xff,%ebx
mov    $0x178,%eax
cmove  %eax,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @toUpper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @isDiff20Lower(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 32
store i32 %8, i32* %2
br label %22
9: ; preds = %1
%10 = load i32, i32* %2
%11 = call i64 @isEvenOddLower(i32 %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = load i32, i32* %2
%15 = add nsw i32 %14, -1
store i32 %15, i32* %2
br label %21
16: ; preds = %9
%17 = load i32, i32* %2
%18 = icmp eq i32 %17, 255
br i1 %18, label %19, label %20
19: ; preds = %16
store i32 376, i32* %2
br label %20
20: ; preds = %19, %16
br label %21
21: ; preds = %20, %13
br label %22
22: ; preds = %21, %6
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @toUpper(i32 %0) {
%2 = tail call i64 @isDiff20Lower(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = add nsw i32 %0, -32
br label %14
6: ; preds = %1
%7 = tail call i64 @isEvenOddLower(i32 %0)
%8 = icmp eq i64 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %6
%10 = add nsw i32 %0, -1
br label %14
11: ; preds = %6
%12 = icmp eq i32 %0, 255
%13 = select i1 %12, i32 376, i32 %0
br label %14
14: ; preds = %9, %11, %4
%15 = phi i32 [ %5, %4 ], [ %10, %9 ], [ %13, %11 ]
ret i32 %15
}
void add_record(struct page *page, struct record *record) {}


x86 assembly (clang, -O0):
<add_record>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_record>:
ret

LLVM IR (-O0):
%struct.page = type opaque
%struct.record = type opaque
define void @add_record(%struct.page* %0, %struct.record* %1) {
%3 = alloca %struct.page*
%4 = alloca %struct.record*
store %struct.page* %0, %struct.page** %3
store %struct.record* %1, %struct.record** %4
ret void
}

LLVM IR (-O2):
%struct.page = type opaque
%struct.record = type opaque
define void @add_record(%struct.page* nocapture %0, %struct.record* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
int /*<<< orphan*/ pthread_mutex_destroy(void *);
void LockDelete(void *p) {
  if (p) {
    pthread_mutex_destroy(p);
    free(p);
  }
}


x86 assembly (clang, -O0):
<LockDelete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1149 <LockDelete+0x29>
mov    -0x8(%rbp),%rdi
call   1040 <pthread_mutex_destroy@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LockDelete>:
test   %rdi,%rdi
je     1137 <LockDelete+0x17>
push   %rbx
mov    %rdi,%rbx
call   1040 <pthread_mutex_destroy@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @LockDelete(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @pthread_mutex_destroy(i8* %6)
%8 = load i8*, i8** %2
%9 = call i32 @free(i8* %8)
br label %10
10: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @LockDelete(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i32 @pthread_mutex_destroy(i8* %0)
%5 = tail call i32 @free(i8* %0)
br label %6
6: ; preds = %3, %1
ret void
}
/* Variables and functions */
double log(double);
double math__Float__log(double self) {
  double var;
  double var1;
  var1 = log(self);
  var = var1;
  goto RET_LABEL;
RET_LABEL:;
  return var;
}


x86 assembly (clang, -O0):
<math__Float__log>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <log@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<math__Float__log>:
jmp    1030 <log@plt>

LLVM IR (-O0):
define double @math__Float__log(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %2
%5 = load double, double* %2
%6 = call double @log(double %5)
store double %6, double* %4
%7 = load double, double* %4
store double %7, double* %3
br label %8
8: ; preds = %1
%9 = load double, double* %3
ret double %9
}

LLVM IR (-O2):
define double @math__Float__log(double %0) {
%2 = tail call double @log(double %0)
ret double %2
}
void deallocate_CreateSessionTxn(struct CreateSessionTxn *v) {}


x86 assembly (clang, -O0):
<deallocate_CreateSessionTxn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<deallocate_CreateSessionTxn>:
ret

LLVM IR (-O0):
%struct.CreateSessionTxn = type opaque
define void @deallocate_CreateSessionTxn(%struct.CreateSessionTxn* %0) {
%2 = alloca %struct.CreateSessionTxn*
store %struct.CreateSessionTxn* %0, %struct.CreateSessionTxn** %2
ret void
}

LLVM IR (-O2):
%struct.CreateSessionTxn = type opaque
define void @deallocate_CreateSessionTxn(%struct.CreateSessionTxn* nocapture %0) {
ret void
}
/* Type definitions */
typedef scalar_t__ int16_t;

/* Variables and functions */
int cmp_func_int16_t(void *p1, void *p2) {
  int16_t v1 = *((int16_t *)p1);
  int16_t v2 = *((int16_t *)p2);
  return (v1 > v2) - (v1 < v2);
}


x86 assembly (clang, -O0):
<cmp_func_int16_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x20(%rbp),%rax
setg   %al
and    $0x1,%al
movzbl %al,%eax
mov    -0x18(%rbp),%rcx
cmp    -0x20(%rbp),%rcx
setl   %cl
and    $0x1,%cl
movzbl %cl,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp_func_int16_t>:
mov    (%rdi),%rcx
xor    %eax,%eax
xor    %edx,%edx
cmp    (%rsi),%rcx
setg   %al
setl   %dl
sub    %edx,%eax
ret

LLVM IR (-O0):
define i32 @cmp_func_int16_t(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i64*
%9 = load i64, i64* %8
store i64 %9, i64* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i64*
%12 = load i64, i64* %11
store i64 %12, i64* %6
%13 = load i64, i64* %5
%14 = load i64, i64* %6
%15 = icmp sgt i64 %13, %14
%16 = zext i1 %15 to i32
%17 = load i64, i64* %5
%18 = load i64, i64* %6
%19 = icmp slt i64 %17, %18
%20 = zext i1 %19 to i32
%21 = sub nsw i32 %16, %20
ret i32 %21
}

LLVM IR (-O2):
define i32 @cmp_func_int16_t(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = load i64, i64* %3
%5 = bitcast i8* %1 to i64*
%6 = load i64, i64* %5
%7 = icmp sgt i64 %4, %6
%8 = zext i1 %7 to i32
%9 = icmp slt i64 %4, %6
%10 = sext i1 %9 to i32
%11 = add nsw i32 %10, %8
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void badfmt(const char *fmt) {
  (void)fprintf(stderr, ("hexdump: bad format {%s}\n"), fmt);
  exit(1);
}


x86 assembly (clang, -O0):
<badfmt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<badfmt>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [26 x i8] c"hexdump: bad format {%s}\0A\00"
define void @badfmt(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [26 x i8] c"hexdump: bad format {%s}\0A\00"
define void @badfmt(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
int Operand_soffset_decode(unsigned int *valp) {
  unsigned soffset_0, offset_0;
  offset_0 = *valp & 0x3ffff;
  soffset_0 = 0x4 + (((int)offset_0 << 14) >> 14);
  *valp = soffset_0;
  return 0;
}


x86 assembly (clang, -O0):
<Operand_soffset_decode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0x3ffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
shl    $0xe,%eax
sar    $0xe,%eax
add    $0x4,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Operand_soffset_decode>:
mov    (%rdi),%eax
shl    $0xe,%eax
sar    $0xe,%eax
add    $0x4,%eax
mov    %eax,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Operand_soffset_decode(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
%7 = and i32 %6, 262143
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = shl i32 %8, 14
%10 = ashr i32 %9, 14
%11 = add nsw i32 4, %10
store i32 %11, i32* %3
%12 = load i32, i32* %3
%13 = load i32*, i32** %2
store i32 %12, i32* %13
ret i32 0
}

LLVM IR (-O2):
define i32 @Operand_soffset_decode(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 14
%4 = ashr exact i32 %3, 14
%5 = add nsw i32 %4, 4
store i32 %5, i32* %0
ret i32 0
}
void test45_Test6_targetInit__I() {}


x86 assembly (clang, -O0):
<test45_Test6_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test45_Test6_targetInit__I>:
ret

LLVM IR (-O0):
define void @test45_Test6_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test45_Test6_targetInit__I() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ my_malloc1(int);
int /*<<< orphan*/ my_malloc2(int);
void a7550(void) {
  my_malloc1(24000);
  my_malloc2(3600);
}


x86 assembly (clang, -O0):
<a7550>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5dc0,%edi
call   1030 <my_malloc1@plt>
mov    $0xe10,%edi
call   1040 <my_malloc2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<a7550>:
push   %rax
mov    $0x5dc0,%edi
call   1030 <my_malloc1@plt>
mov    $0xe10,%edi
pop    %rax
jmp    1040 <my_malloc2@plt>

LLVM IR (-O0):
define void @a7550() {
%1 = call i32 @my_malloc1(i32 24000)
%2 = call i32 @my_malloc2(i32 3600)
ret void
}

LLVM IR (-O2):
define void @a7550() {
%1 = tail call i32 @my_malloc1(i32 24000)
%2 = tail call i32 @my_malloc2(i32 3600)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strncat(char *, char const *, int);
char *my_strcat(char *StringOne, const char *StringTwo, int Size, int temp) {
  strncat(StringOne, StringTwo, Size);
  StringOne[temp - 1] = '\0';
  return StringOne;
}


x86 assembly (clang, -O0):
<my_strcat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <strncat@plt>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_strcat>:
push   %rbp
push   %rbx
push   %rax
mov    %ecx,%ebp
mov    %rdi,%rbx
call   1030 <strncat@plt>
movslq %ebp,%rax
movb   $0x0,-0x1(%rax,%rbx,1)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @my_strcat(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = call i32 @strncat(i8* %9, i8* %10, i32 %11)
%13 = load i8*, i8** %5
%14 = load i32, i32* %8
%15 = sub nsw i32 %14, 1
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %13, i64 %16
store i8 0, i8* %17
%18 = load i8*, i8** %5
ret i8* %18
}

LLVM IR (-O2):
define i8* @my_strcat(i8* returned %0, i8* %1, i32 %2, i32 %3) {
%5 = tail call i32 @strncat(i8* %0, i8* %1, i32 %2)
%6 = add nsw i32 %3, -1
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %0, i64 %7
store i8 0, i8* %8
ret i8* %0
}
/* Type definitions */
struct mv88fx_snd_chip {
  int dummy;
};

/* Variables and functions */
unsigned int readl(int);
unsigned int mv88fx_snd_readl(struct mv88fx_snd_chip *chip, unsigned int offs) {
  unsigned int val = readl((0xf1000000 + offs));
  return (val);
}


x86 assembly (clang, -O0):
<mv88fx_snd_readl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
add    $0xf1000000,%edi
call   1030 <readl@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mv88fx_snd_readl>:
lea    -0xf000000(%rsi),%edi
jmp    1030 <readl@plt>

LLVM IR (-O0):
%struct.mv88fx_snd_chip = type { i32 }
define i32 @mv88fx_snd_readl(%struct.mv88fx_snd_chip* %0, i32 %1) {
%3 = alloca %struct.mv88fx_snd_chip*
%4 = alloca i32
%5 = alloca i32
store %struct.mv88fx_snd_chip* %0, %struct.mv88fx_snd_chip** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = add i32 -251658240, %6
%8 = call i32 @readl(i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
%struct.mv88fx_snd_chip = type { i32 }
define i32 @mv88fx_snd_readl(%struct.mv88fx_snd_chip* nocapture readnone %0, i32 %1) {
%3 = add i32 %1, -251658240
%4 = tail call i32 @readl(i32 %3)
ret i32 %4
}
void pause(void) { __asm__ __volatile__("pause"); }


x86 assembly (clang, -O0):
<pause>:
push   %rbp
mov    %rsp,%rbp
pause
pop    %rbp
ret

x86 assembly (clang, -O2):
<pause>:
pause
ret

LLVM IR (-O0):
define void @pause() {
ret void
}

LLVM IR (-O2):
define void @pause() {
tail call void asm sideeffect "pause", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int it87_gpio_set(int, int);
int it8718f_gpio63_raise(void) { return it87_gpio_set(63, 1); }


x86 assembly (clang, -O0):
<it8718f_gpio63_raise>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3f,%edi
mov    $0x1,%esi
call   1030 <it87_gpio_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<it8718f_gpio63_raise>:
mov    $0x3f,%edi
mov    $0x1,%esi
jmp    1030 <it87_gpio_set@plt>

LLVM IR (-O0):
define i32 @it8718f_gpio63_raise() {
%1 = call i32 @it87_gpio_set(i32 63, i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @it8718f_gpio63_raise() {
%1 = tail call i32 @it87_gpio_set(i32 63, i32 1)
ret i32 %1
}
int sgn(const double real) {
  int sgn = 0;
  if (real > 0)
    sgn = 1;
  if (real < 0)
    sgn = -1;
  return sgn;
}


x86 assembly (clang, -O0):
<sgn>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    1129 <sgn+0x29>
movl   $0x1,-0xc(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    113e <sgn+0x3e>
movl   $0xffffffff,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sgn>:
xorpd  %xmm1,%xmm1
xor    %ecx,%ecx
ucomisd %xmm1,%xmm0
seta   %cl
ucomisd %xmm0,%xmm1
mov    $0xffffffff,%eax
cmovbe %ecx,%eax
ret

LLVM IR (-O0):
define i32 @sgn(double %0) {
%2 = alloca double
%3 = alloca i32
store double %0, double* %2
store i32 0, i32* %3
%4 = load double, double* %2
%5 = fcmp ogt double %4, 0.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %3
br label %7
7: ; preds = %6, %1
%8 = load double, double* %2
%9 = fcmp olt double %8, 0.000000e+00
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 -1, i32* %3
br label %11
11: ; preds = %10, %7
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @sgn(double %0) {
%2 = fcmp ogt double %0, 0.000000e+00
%3 = zext i1 %2 to i32
%4 = fcmp olt double %0, 0.000000e+00
%5 = select i1 %4, i32 -1, i32 %3
ret i32 %5
}
/* Type definitions */
struct shairbuffer {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ addNToShairBuffer(struct shairbuffer *, char *,
                                     int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
void addToShairBuffer(struct shairbuffer *pBuf, char *pNewBuf) {
  addNToShairBuffer(pBuf, pNewBuf, strlen(pNewBuf));
}


x86 assembly (clang, -O0):
<addToShairBuffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <addNToShairBuffer@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<addToShairBuffer>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <addNToShairBuffer@plt>

LLVM IR (-O0):
%struct.shairbuffer = type { i32 }
define void @addToShairBuffer(%struct.shairbuffer* %0, i8* %1) {
%3 = alloca %struct.shairbuffer*
%4 = alloca i8*
store %struct.shairbuffer* %0, %struct.shairbuffer** %3
store i8* %1, i8** %4
%5 = load %struct.shairbuffer*, %struct.shairbuffer** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i32 @addNToShairBuffer(%struct.shairbuffer* %5, i8* %6, i32 %8)
ret void
}

LLVM IR (-O2):
%struct.shairbuffer = type { i32 }
define void @addToShairBuffer(%struct.shairbuffer* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @addNToShairBuffer(%struct.shairbuffer* %0, i8* %1, i32 %3)
ret void
}
void chaz_ConfWriterPerl_add_local_include(const char *header) { (void)header; }


x86 assembly (clang, -O0):
<chaz_ConfWriterPerl_add_local_include>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<chaz_ConfWriterPerl_add_local_include>:
ret

LLVM IR (-O0):
define void @chaz_ConfWriterPerl_add_local_include(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @chaz_ConfWriterPerl_add_local_include(i8* nocapture %0) {
ret void
}
int test_imm_0Duint16_reg(unsigned short val) {
  return ((val) & (-0x0D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Duint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xfffffff3,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Duint16_reg>:
test   $0xfff3,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Duint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -13
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_0Duint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -13
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int ary_cb_cmpdouble(const void *a, const void *b) {
  double x = *(const double *)a, y = *(const double *)b;
  return x > y ? 1 : x < y ? -1 : 0;
}


x86 assembly (clang, -O0):
<ary_cb_cmpdouble>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
ucomisd -0x20(%rbp),%xmm0
jbe    1143 <ary_cb_cmpdouble+0x43>
mov    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    115e <ary_cb_cmpdouble+0x5e>
movsd  -0x18(%rbp),%xmm1
movsd  -0x20(%rbp),%xmm0
xor    %eax,%eax
mov    $0xffffffff,%ecx
ucomisd %xmm1,%xmm0
cmova  %ecx,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ary_cb_cmpdouble>:
movsd  (%rdi),%xmm0
movsd  (%rsi),%xmm1
xor    %ecx,%ecx
ucomisd %xmm0,%xmm1
seta   %cl
neg    %ecx
ucomisd %xmm1,%xmm0
mov    $0x1,%eax
cmovbe %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ary_cb_cmpdouble(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca double
%6 = alloca double
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to double*
%9 = load double, double* %8
store double %9, double* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to double*
%12 = load double, double* %11
store double %12, double* %6
%13 = load double, double* %5
%14 = load double, double* %6
%15 = fcmp ogt double %13, %14
br i1 %15, label %16, label %17
16: ; preds = %2
br label %23
17: ; preds = %2
%18 = load double, double* %5
%19 = load double, double* %6
%20 = fcmp olt double %18, %19
%21 = zext i1 %20 to i64
%22 = select i1 %20, i32 -1, i32 0
br label %23
23: ; preds = %17, %16
%24 = phi i32 [ 1, %16 ], [ %22, %17 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @ary_cb_cmpdouble(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to double*
%4 = load double, double* %3
%5 = bitcast i8* %1 to double*
%6 = load double, double* %5
%7 = fcmp ogt double %4, %6
%8 = fcmp olt double %4, %6
%9 = sext i1 %8 to i32
%10 = select i1 %7, i32 1, i32 %9
ret i32 %10
}
/* Type definitions */
typedef scalar_t__ ssize_t;
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ STDIN_FILENO;
scalar_t__ read(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ send_unencrypted_bytes(char *, size_t);
void do_stdin_read() {
  char buf[64];
  ssize_t n = read(STDIN_FILENO, buf, sizeof(buf));
  if (n > 0)
    send_unencrypted_bytes(buf, (size_t)n);
}


x86 assembly (clang, -O0):
<do_stdin_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
lea    -0x40(%rbp),%rsi
mov    $0x40,%edx
call   1030 <read@plt>
mov    %rax,-0x48(%rbp)
cmpq   $0x0,-0x48(%rbp)
jle    115b <do_stdin_read+0x3b>
lea    -0x40(%rbp),%rdi
mov    -0x48(%rbp),%rsi
call   1040 <send_unencrypted_bytes@plt>
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_stdin_read>:
sub    $0x48,%rsp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
mov    $0x40,%edx
call   1030 <read@plt>
test   %rax,%rax
jle    114a <do_stdin_read+0x2a>
mov    %rsp,%rdi
mov    %rax,%rsi
call   1040 <send_unencrypted_bytes@plt>
add    $0x48,%rsp
ret

LLVM IR (-O0):
@STDIN_FILENO = global i32 0
define void @do_stdin_read() {
%1 = alloca [64 x i8]
%2 = alloca i64
%3 = load i32, i32* @STDIN_FILENO
%4 = getelementptr inbounds [64 x i8], [64 x i8]* %1, i64 0, i64 0
%5 = call i64 @read(i32 %3, i8* %4, i32 64)
store i64 %5, i64* %2
%6 = load i64, i64* %2
%7 = icmp sgt i64 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %0
%9 = getelementptr inbounds [64 x i8], [64 x i8]* %1, i64 0, i64 0
%10 = load i64, i64* %2
%11 = call i32 @send_unencrypted_bytes(i8* %9, i64 %10)
br label %12
12: ; preds = %8, %0
ret void
}

LLVM IR (-O2):
@STDIN_FILENO = global i32 0
define void @do_stdin_read() {
%1 = alloca [64 x i8]
%2 = getelementptr inbounds [64 x i8], [64 x i8]* %1, i64 0, i64 0
%3 = load i32, i32* @STDIN_FILENO
%4 = call i64 @read(i32 %3, i8* %2, i32 64)
%5 = icmp sgt i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @send_unencrypted_bytes(i8* %2, i64 %4)
br label %8
8: ; preds = %6, %0
ret void
}