xunge/DecIR huggingface dataset:
int SQUARE_FLIP(int sq) { return 254 - sq; }


x86 assembly (clang, -O0):
<SQUARE_FLIP>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xfe,%eax
sub    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SQUARE_FLIP>:
mov    $0xfe,%eax
sub    %edi,%eax
ret

LLVM IR (-O0):
define i32 @SQUARE_FLIP(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 254, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @SQUARE_FLIP(i32 %0) {
%2 = sub nsw i32 254, %0
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ chdir(char const *);
int os_chdir(const char *p) { return !chdir(p); }


x86 assembly (clang, -O0):
<os_chdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <chdir@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_chdir>:
push   %rax
call   1030 <chdir@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @os_chdir(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @chdir(i8* %3)
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @os_chdir(i8* %0) {
%2 = tail call i32 @chdir(i8* %0)
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
int _bits_set(unsigned char *bytes, unsigned int bit) {
  int r = !!(bytes[bit >> 3] & (1 << (bit & 7)));
  bytes[bit >> 3] |= (1 << (bit & 7));
  return r;
}


x86 assembly (clang, -O0):
<_bits_set>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
shr    $0x3,%ecx
mov    %ecx,%ecx
movzbl (%rax,%rcx,1),%eax
mov    -0xc(%rbp),%ecx
and    $0x7,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
and    $0x7,%ecx
mov    $0x1,%esi
shl    %cl,%esi
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
shr    $0x3,%ecx
mov    %ecx,%ecx
movzbl (%rax,%rcx,1),%edx
or     %esi,%edx
mov    %dl,(%rax,%rcx,1)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_bits_set>:
mov    %esi,%ecx
mov    %esi,%edx
shr    $0x3,%rdx
movzbl (%rdi,%rdx,1),%esi
and    $0x7,%cl
mov    %esi,%eax
shr    %cl,%eax
and    $0x1,%eax
bts    %ecx,%esi
mov    %sil,(%rdi,%rdx,1)
ret

LLVM IR (-O0):
define i32 @_bits_set(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = lshr i32 %7, 3
%9 = zext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %6, i64 %9
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = load i32, i32* %4
%14 = and i32 %13, 7
%15 = shl i32 1, %14
%16 = and i32 %12, %15
%17 = icmp ne i32 %16, 0
%18 = xor i1 %17, true
%19 = xor i1 %18, true
%20 = zext i1 %19 to i32
store i32 %20, i32* %5
%21 = load i32, i32* %4
%22 = and i32 %21, 7
%23 = shl i32 1, %22
%24 = load i8*, i8** %3
%25 = load i32, i32* %4
%26 = lshr i32 %25, 3
%27 = zext i32 %26 to i64
%28 = getelementptr inbounds i8, i8* %24, i64 %27
%29 = load i8, i8* %28
%30 = zext i8 %29 to i32
%31 = or i32 %30, %23
%32 = trunc i32 %31 to i8
store i8 %32, i8* %28
%33 = load i32, i32* %5
ret i32 %33
}

LLVM IR (-O2):
define i32 @_bits_set(i8* nocapture %0, i32 %1) {
%3 = lshr i32 %1, 3
%4 = zext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = and i32 %1, 7
%9 = shl nuw nsw i32 1, %8
%10 = lshr i32 %7, %8
%11 = and i32 %10, 1
%12 = trunc i32 %9 to i8
%13 = or i8 %6, %12
store i8 %13, i8* %5
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ uart_puts(char *);
void test_print() { uart_puts(" __test_print__ \n"); }


x86 assembly (clang, -O0):
<test_print>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <uart_puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_print>:
lea    0xee9(%rip),%rdi
jmp    1030 <uart_puts@plt>

LLVM IR (-O0):
@.str = [18 x i8] c" __test_print__ \0A\00"
define void @test_print() {
%1 = call i32 @uart_puts(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c" __test_print__ \0A\00"
define void @test_print() {
%1 = tail call i32 @uart_puts(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret void
}
const char *strchrnul(const char *s, int c) {
  while (*s) {
    if (*s == c) {
      return s;
    }
    s++;
  }
  return s;
}


x86 assembly (clang, -O0):
<strchrnul>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1146 <strchrnul+0x46>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    -0x14(%rbp),%eax
jne    1135 <strchrnul+0x35>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    114e <strchrnul+0x4e>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110b <strchrnul+0xb>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strchrnul>:
mov    %rdi,%rax
add    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
movsbl 0x1(%rax),%ecx
add    $0x1,%rax
test   %ecx,%ecx
je     1120 <strchrnul+0x20>
cmp    %esi,%ecx
jne    1110 <strchrnul+0x10>
ret

LLVM IR (-O0):
define i8* @strchrnul(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = load i32, i32* %5
%15 = icmp eq i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %10
%17 = load i8*, i8** %4
store i8* %17, i8** %3
br label %23
18: ; preds = %10
%19 = load i8*, i8** %4
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %4
br label %6
21: ; preds = %6
%22 = load i8*, i8** %4
store i8* %22, i8** %3
br label %23
23: ; preds = %21, %16
%24 = load i8*, i8** %3
ret i8* %24
}

LLVM IR (-O2):
define i8* @strchrnul(i8* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %10, %3 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = sext i8 %5 to i32
%8 = icmp eq i32 %7, %1
%9 = or i1 %6, %8
%10 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %9, label %11, label %3
11: ; preds = %3
ret i8* %4
}
/* Variables and functions */
int divideByTen(int);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  printf("after divsion: %d\n", divideByTen(200));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xc8,%edi
call   1030 <divideByTen@plt>
mov    %eax,%esi
lea    0xebe(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xc8,%edi
call   1030 <divideByTen@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"after divsion: %d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @divideByTen(i32 200)
%3 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [19 x i8] c"after divsion: %d\0A\00"
define i32 @main() {
%1 = tail call i32 @divideByTen(i32 200)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
size_t get_data_tag_in_Hop(size_t __tag) {
  (void)__tag;
  return 0;
}


x86 assembly (clang, -O0):
<get_data_tag_in_Hop>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_data_tag_in_Hop>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @get_data_tag_in_Hop(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
ret i64 0
}

LLVM IR (-O2):
define i64 @get_data_tag_in_Hop(i64 %0) {
ret i64 0
}
void os_flush(void) {}


x86 assembly (clang, -O0):
<os_flush>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_flush>:
ret

LLVM IR (-O0):
define void @os_flush() {
ret void
}

LLVM IR (-O2):
define void @os_flush() {
ret void
}
void TM04_intr(void) {}


x86 assembly (clang, -O0):
<TM04_intr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TM04_intr>:
ret

LLVM IR (-O0):
define void @TM04_intr() {
ret void
}

LLVM IR (-O2):
define void @TM04_intr() {
ret void
}
/* Type definitions */
struct UPnPService {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void RNDResponseSink_AVTransport_Next(struct UPnPService *Service,
                                      int ErrorCode, void *User) {
  printf("RND Invoke Response: AVTransport/Next[ErrorCode:%d]()\r\n",
         ErrorCode);
}


x86 assembly (clang, -O0):
<RNDResponseSink_AVTransport_Next>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0xc(%rbp),%esi
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNDResponseSink_AVTransport_Next>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
%struct.UPnPService = type { i32 }
@.str = [56 x i8] c"RND Invoke Response: AVTransport/Next[ErrorCode:%d]()\0D\0A\00"
define void @RNDResponseSink_AVTransport_Next(%struct.UPnPService* %0, i32 %1, i8* %2) {
%4 = alloca %struct.UPnPService*
%5 = alloca i32
%6 = alloca i8*
store %struct.UPnPService* %0, %struct.UPnPService** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %5
%8 = call i32 @printf(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
%struct.UPnPService = type { i32 }
@.str = [56 x i8] c"RND Invoke Response: AVTransport/Next[ErrorCode:%d]()\0D\0A\00"
define void @RNDResponseSink_AVTransport_Next(%struct.UPnPService* nocapture readnone %0, i32 %1, i8* nocapture readnone %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
int _tolower(int c) { return (c - 'A' + 'a'); }


x86 assembly (clang, -O0):
<_tolower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x41,%eax
add    $0x61,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_tolower>:
lea    0x20(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @_tolower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 %3, 65
%5 = add nsw i32 %4, 97
ret i32 %5
}

LLVM IR (-O2):
define i32 @_tolower(i32 %0) {
%2 = add nsw i32 %0, 32
ret i32 %2
}
void swresample_license() {}


x86 assembly (clang, -O0):
<swresample_license>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swresample_license>:
ret

LLVM IR (-O0):
define void @swresample_license() {
ret void
}

LLVM IR (-O2):
define void @swresample_license() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
scalar_t__ EOF;
int /*<<< orphan*/ error(char *);
scalar_t__ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void fclose_svg(FILE *svg) {
  fprintf(svg, "</svg>\n");
  if (fclose(svg) == EOF)
    error("Error: unable to close file while writing SVG file.");
}


x86 assembly (clang, -O0):
<fclose_svg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xeb9(%rip),%rsi
call   1040 <fprintf@plt>
mov    -0x8(%rbp),%rdi
call   1030 <fclose@plt>
mov    0x2e8c(%rip),%rcx
cmp    (%rcx),%rax
jne    1171 <fclose_svg+0x41>
lea    0xe9c(%rip),%rdi
call   1050 <error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fclose_svg>:
push   %rbx
mov    %rdi,%rbx
lea    0xec5(%rip),%rdi
mov    $0x7,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1050 <fwrite@plt>
mov    %rbx,%rdi
call   1030 <fclose@plt>
mov    0x2e8c(%rip),%rcx
cmp    (%rcx),%rax
jne    116e <fclose_svg+0x3e>
lea    0xea0(%rip),%rdi
pop    %rbx
jmp    1040 <error@plt>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"</svg>\0A\00"
@EOF = global i64 0
@.str.1 = [52 x i8] c"Error: unable to close file while writing SVG file.\00"
define void @fclose_svg(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%5 = load i32*, i32** %2
%6 = call i64 @fclose(i32* %5)
%7 = load i64, i64* @EOF
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = call i32 @error(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str.1, i64 0, i64 0))
br label %11
11: ; preds = %9, %1
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"</svg>\0A\00"
@EOF = global i64 0
@.str.1 = [52 x i8] c"Error: unable to close file while writing SVG file.\00"
define void @fclose_svg(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i64 7, i64 1, i32* %0)
%3 = tail call i64 @fclose(i32* %0)
%4 = load i64, i64* @EOF
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 @error(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str.1, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ data;

/* Variables and functions */
int /*<<< orphan*/ kernel_write(unsigned long, unsigned long *, int);
void kernel_write_ulong(unsigned long kaddr, unsigned long data) {
  kernel_write(kaddr, &data, sizeof(data));
}


x86 assembly (clang, -O0):
<kernel_write_ulong>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
mov    $0x8,%edx
call   1030 <kernel_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kernel_write_ulong>:
push   %rax
mov    %rsi,(%rsp)
mov    %rsp,%rsi
mov    $0x8,%edx
call   1030 <kernel_write@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @kernel_write_ulong(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = call i32 @kernel_write(i64 %5, i64* %4, i32 8)
ret void
}

LLVM IR (-O2):
define void @kernel_write_ulong(i64 %0, i64 %1) {
%3 = alloca i64
store i64 %1, i64* %3
%4 = call i32 @kernel_write(i64 %0, i64* %3, i32 8)
ret void
}
/* Variables and functions */
scalar_t__ pow(double, int);
double sqrt(scalar_t__);
double pt_dist(double x0, double y0, double x1, double y1) {
  return sqrt(pow(x1 - x0, 2) + pow(y1 - y0, 2));
}


x86 assembly (clang, -O0):
<pt_dist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
subsd  -0x8(%rbp),%xmm0
mov    $0x2,%edi
call   1030 <pow@plt>
mov    %rax,-0x28(%rbp)
movsd  -0x20(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
mov    $0x2,%edi
call   1030 <pow@plt>
mov    -0x28(%rbp),%rdi
add    %rax,%rdi
call   1040 <sqrt@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pt_dist>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm3,0x8(%rsp)
movsd  %xmm1,(%rsp)
subsd  %xmm0,%xmm2
movapd %xmm2,%xmm0
mov    $0x2,%edi
call   1030 <pow@plt>
mov    %rax,%rbx
movsd  0x8(%rsp),%xmm0
subsd  (%rsp),%xmm0
mov    $0x2,%edi
call   1030 <pow@plt>
add    %rax,%rbx
mov    %rbx,%rdi
add    $0x10,%rsp
pop    %rbx
jmp    1040 <sqrt@plt>

LLVM IR (-O0):
define double @pt_dist(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%9 = load double, double* %7
%10 = load double, double* %5
%11 = fsub double %9, %10
%12 = call i64 @pow(double %11, i32 2)
%13 = load double, double* %8
%14 = load double, double* %6
%15 = fsub double %13, %14
%16 = call i64 @pow(double %15, i32 2)
%17 = add nsw i64 %12, %16
%18 = call double @sqrt(i64 %17)
ret double %18
}

LLVM IR (-O2):
define double @pt_dist(double %0, double %1, double %2, double %3) {
%5 = fsub double %2, %0
%6 = tail call i64 @pow(double %5, i32 2)
%7 = fsub double %3, %1
%8 = tail call i64 @pow(double %7, i32 2)
%9 = add nsw i64 %8, %6
%10 = tail call double @sqrt(i64 %9)
ret double %10
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
scalar_t__ net_get_rack(int /*<<< orphan*/);
int net_is_same_rack(uint32_t ip1, uint32_t ip2) {
  return net_get_rack(ip1) == net_get_rack(ip2);
}


x86 assembly (clang, -O0):
<net_is_same_rack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <net_get_rack@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <net_get_rack@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<net_is_same_rack>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
call   1030 <net_get_rack@plt>
mov    %rax,%rbx
mov    %ebp,%edi
call   1030 <net_get_rack@plt>
xor    %ecx,%ecx
cmp    %rax,%rbx
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @net_is_same_rack(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i64 @net_get_rack(i32 %5)
%7 = load i32, i32* %4
%8 = call i64 @net_get_rack(i32 %7)
%9 = icmp eq i64 %6, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @net_is_same_rack(i32 %0, i32 %1) {
%3 = tail call i64 @net_get_rack(i32 %0)
%4 = tail call i64 @net_get_rack(i32 %1)
%5 = icmp eq i64 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
void g_set_error(int e, void *p) {}


x86 assembly (clang, -O0):
<g_set_error>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_set_error>:
ret

LLVM IR (-O0):
define void @g_set_error(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @g_set_error(i32 %0, i8* nocapture %1) {
ret void
}
int aliascheck_init(void) { return 0; }


x86 assembly (clang, -O0):
<aliascheck_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aliascheck_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @aliascheck_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @aliascheck_init() {
ret i32 0
}
void QEIConfigure(unsigned long ulBase, unsigned long ulConfig,
                  unsigned long ulMaxPosition) {
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000000))) =
      (((*((volatile unsigned long *)(ulBase + 0x00000000))) &
        ~(0x00000008 | 0x00000010 | 0x00000004 | 0x00000002)) |
       ulConfig);
  (*((volatile unsigned long *)(ulBase + 0x0000000C))) = ulMaxPosition;
}


x86 assembly (clang, -O0):
<QEIConfigure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
and    $0xffffffffffffffe1,%rcx
or     -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<QEIConfigure>:
mov    (%rdi),%rax
and    $0xffffffffffffffe1,%rax
or     %rsi,%rax
mov    %rax,(%rdi)
mov    %rdx,0xc(%rdi)
ret

LLVM IR (-O0):
define void @QEIConfigure(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = add i64 %7, 0
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = and i64 %10, -31
%12 = load i64, i64* %5
%13 = or i64 %11, %12
%14 = load i64, i64* %4
%15 = add i64 %14, 0
%16 = inttoptr i64 %15 to i64*
store volatile i64 %13, i64* %16
%17 = load i64, i64* %6
%18 = load i64, i64* %4
%19 = add i64 %18, 12
%20 = inttoptr i64 %19 to i64*
store volatile i64 %17, i64* %20
ret void
}

LLVM IR (-O2):
define void @QEIConfigure(i64 %0, i64 %1, i64 %2) {
%4 = inttoptr i64 %0 to i64*
%5 = load volatile i64, i64* %4
%6 = and i64 %5, -31
%7 = or i64 %6, %1
store volatile i64 %7, i64* %4
%8 = add i64 %0, 12
%9 = inttoptr i64 %8 to i64*
store volatile i64 %2, i64* %9
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ wiznetRegReadByte(int /*<<< orphan*/, int);
uint8_t wiznetGetSocketCommand(uint8_t socket) {
  return wiznetRegReadByte(socket, (0x0000 + 0x0001));
}


x86 assembly (clang, -O0):
<wiznetGetSocketCommand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <wiznetRegReadByte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wiznetGetSocketCommand>:
mov    $0x1,%esi
jmp    1030 <wiznetRegReadByte@plt>

LLVM IR (-O0):
define i32 @wiznetGetSocketCommand(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @wiznetRegReadByte(i32 %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @wiznetGetSocketCommand(i32 %0) {
%2 = tail call i32 @wiznetRegReadByte(i32 %0, i32 1)
ret i32 %2
}
__attribute__((no)) int f2(int i, int j) {
  j += i;
  int i1 = 2 * i;
  int i2 = 3 * i;
  return j;
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
imul   $0x3,-0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @f2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = add nsw i32 %8, %7
store i32 %9, i32* %4
%10 = load i32, i32* %3
%11 = mul nsw i32 2, %10
store i32 %11, i32* %5
%12 = load i32, i32* %3
%13 = mul nsw i32 3, %12
store i32 %13, i32* %6
%14 = load i32, i32* %4
ret i32 %14
}

LLVM IR (-O2):
define i32 @f2(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int conv_rand();
int time(int /*<<< orphan*/);
int conv_random(int num, int base) {
  return (((long)(conv_rand() * time(0)) & 0x7fffffff) % num + base);
}


x86 assembly (clang, -O0):
<conv_random>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <conv_rand@plt>
mov    %eax,-0xc(%rbp)
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
imul   %ecx,%eax
cltq
and    $0x7fffffff,%rax
movslq -0x4(%rbp),%rcx
cqto
idiv   %rcx
movslq -0x8(%rbp),%rax
add    %rax,%rdx
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<conv_random>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebx
mov    %edi,%r14d
xor    %eax,%eax
call   1030 <conv_rand@plt>
mov    %eax,%ebp
xor    %edi,%edi
call   1040 <time@plt>
imul   %ebp,%eax
and    $0x7fffffff,%eax
xor    %edx,%edx
idiv   %r14d
add    %edx,%ebx
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @conv_random(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @conv_rand()
%6 = call i32 @time(i32 0)
%7 = mul nsw i32 %5, %6
%8 = sext i32 %7 to i64
%9 = and i64 %8, 2147483647
%10 = load i32, i32* %3
%11 = sext i32 %10 to i64
%12 = srem i64 %9, %11
%13 = load i32, i32* %4
%14 = sext i32 %13 to i64
%15 = add nsw i64 %12, %14
%16 = trunc i64 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @conv_random(i32 %0, i32 %1) {
%3 = tail call i32 (...) @conv_rand()
%4 = tail call i32 @time(i32 0)
%5 = mul nsw i32 %4, %3
%6 = and i32 %5, 2147483647
%7 = srem i32 %6, %0
%8 = add i32 %7, %1
ret i32 %8
}
int _is_quotation_mark(char c) { return ('"' == c); }


x86 assembly (clang, -O0):
<_is_quotation_mark>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x22,%eax
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_is_quotation_mark>:
xor    %eax,%eax
cmp    $0x22,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @_is_quotation_mark(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 34, %4
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @_is_quotation_mark(i8 signext %0) {
%2 = icmp eq i8 %0, 34
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
struct vec3i {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
float vec3i_distance(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
__attribute__((always_)) float psvec3i_distance(struct vec3i *a,
                                                struct vec3i *b) {
  return vec3i_distance((int32_t *)a, (int32_t *)b);
}


x86 assembly (clang, -O0):
<psvec3i_distance>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <vec3i_distance@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec3i_distance>:
jmp    1030 <vec3i_distance@plt>

LLVM IR (-O0):
%struct.vec3i = type { i32 }
define float @psvec3i_distance(%struct.vec3i* %0, %struct.vec3i* %1) {
%3 = alloca %struct.vec3i*
%4 = alloca %struct.vec3i*
store %struct.vec3i* %0, %struct.vec3i** %3
store %struct.vec3i* %1, %struct.vec3i** %4
%5 = load %struct.vec3i*, %struct.vec3i** %3
%6 = bitcast %struct.vec3i* %5 to i32*
%7 = load %struct.vec3i*, %struct.vec3i** %4
%8 = bitcast %struct.vec3i* %7 to i32*
%9 = call float @vec3i_distance(i32* %6, i32* %8)
ret float %9
}

LLVM IR (-O2):
%struct.vec3i = type { i32 }
define float @psvec3i_distance(%struct.vec3i* %0, %struct.vec3i* %1) {
%3 = getelementptr %struct.vec3i, %struct.vec3i* %0, i64 0, i32 0
%4 = getelementptr %struct.vec3i, %struct.vec3i* %1, i64 0, i32 0
%5 = tail call float @vec3i_distance(i32* %3, i32* %4)
ret float %5
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
scalar_t__ is_little_endian();
uint16_t swap_if_big16(uint16_t val) {
  if (is_little_endian())
    return val;
  else
    return (val >> 8) | (val << 8);
}


x86 assembly (clang, -O0):
<swap_if_big16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <is_little_endian@plt>
cmp    $0x0,%rax
je     1137 <swap_if_big16+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1148 <swap_if_big16+0x38>
mov    -0x8(%rbp),%eax
sar    $0x8,%eax
mov    -0x8(%rbp),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_if_big16>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <is_little_endian@plt>
mov    %ebx,%edx
sar    $0x8,%edx
mov    %ebx,%ecx
shl    $0x8,%ecx
or     %edx,%ecx
test   %rax,%rax
cmovne %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @swap_if_big16(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i64 (...) @is_little_endian()
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %14
8: ; preds = %1
%9 = load i32, i32* %3
%10 = ashr i32 %9, 8
%11 = load i32, i32* %3
%12 = shl i32 %11, 8
%13 = or i32 %10, %12
store i32 %13, i32* %2
br label %14
14: ; preds = %8, %6
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @swap_if_big16(i32 %0) {
%2 = tail call i64 (...) @is_little_endian()
%3 = icmp eq i64 %2, 0
%4 = ashr i32 %0, 8
%5 = shl i32 %0, 8
%6 = or i32 %4, %5
%7 = select i1 %3, i32 %6, i32 %0
ret i32 %7
}
unsigned short fn1(unsigned short p1, unsigned int p2) {
  return p2 > 1 || p1 >> p2 ? p1 : p1 << p2;
}


x86 assembly (clang, -O0):
<fn1>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
ja     112a <fn1+0x2a>
movzwl -0x2(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
cmp    $0x0,%eax
je     1136 <fn1+0x36>
movzwl -0x2(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1142 <fn1+0x42>
movzwl -0x2(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn1>:
mov    %esi,%ecx
mov    %edi,%eax
mov    %edi,%edx
shr    %cl,%edx
xor    %esi,%esi
test   %edx,%edx
mov    $0x0,%edx
cmove  %ecx,%edx
cmp    $0x2,%ecx
cmovae %esi,%edx
mov    %edx,%ecx
shl    %cl,%eax
ret

LLVM IR (-O0):
define zeroext i16 @fn1(i16 zeroext %0, i32 %1) {
%3 = alloca i16
%4 = alloca i32
store i16 %0, i16* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ugt i32 %5, 1
br i1 %6, label %13, label %7
7: ; preds = %2
%8 = load i16, i16* %3
%9 = zext i16 %8 to i32
%10 = load i32, i32* %4
%11 = ashr i32 %9, %10
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %7, %2
%14 = load i16, i16* %3
%15 = zext i16 %14 to i32
br label %21
16: ; preds = %7
%17 = load i16, i16* %3
%18 = zext i16 %17 to i32
%19 = load i32, i32* %4
%20 = shl i32 %18, %19
br label %21
21: ; preds = %16, %13
%22 = phi i32 [ %15, %13 ], [ %20, %16 ]
%23 = trunc i32 %22 to i16
ret i16 %23
}

LLVM IR (-O2):
define zeroext i16 @fn1(i16 zeroext %0, i32 %1) {
%3 = icmp ult i32 %1, 2
%4 = zext i16 %0 to i32
%5 = lshr i32 %4, %1
%6 = icmp eq i32 %5, 0
%7 = select i1 %3, i1 %6, i1 false
%8 = select i1 %7, i32 %1, i32 0
%9 = shl nuw nsw i32 %4, %8
%10 = trunc i32 %9 to i16
ret i16 %10
}
int compute_signed_dec_width(int value) {
  int width = 0;
  if (value < 0) {
    width++;
  }
  do {
    width++;
    value /= 10;
  } while (value);
  return width;
}


x86 assembly (clang, -O0):
<compute_signed_dec_width>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1121 <compute_signed_dec_width+0x21>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <compute_signed_dec_width+0x26>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1126 <compute_signed_dec_width+0x26>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compute_signed_dec_width>:
mov    %edi,%eax
shr    $0x1f,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
movslq %edi,%rcx
imul   $0x66666667,%rcx,%rdi
mov    %rdi,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rdi
add    %edx,%edi
add    $0x9,%ecx
cmp    $0x12,%ecx
ja     1110 <compute_signed_dec_width+0x10>
ret

LLVM IR (-O0):
define i32 @compute_signed_dec_width(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 1
store i32 %8, i32* %3
br label %9
9: ; preds = %6, %1
br label %10
10: ; preds = %15, %9
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
%13 = load i32, i32* %2
%14 = sdiv i32 %13, 10
store i32 %14, i32* %2
br label %15
15: ; preds = %10
%16 = load i32, i32* %2
%17 = icmp ne i32 %16, 0
br i1 %17, label %10, label %18
18: ; preds = %15
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @compute_signed_dec_width(i32 %0) {
%2 = lshr i32 %0, 31
br label %3
3: ; preds = %3, %1
%4 = phi i32 [ %0, %1 ], [ %7, %3 ]
%5 = phi i32 [ %2, %1 ], [ %6, %3 ]
%6 = add nuw nsw i32 %5, 1
%7 = sdiv i32 %4, 10
%8 = add i32 %4, 9
%9 = icmp ult i32 %8, 19
br i1 %9, label %10, label %3
10: ; preds = %3
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int func2() { printf("func2\n"); }


x86 assembly (clang, -O0):
<func2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func2>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"func2\0A\00"
define i32 @func2() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [6 x i8] c"func2\00"
define i32 @func2() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
unsigned long long _bzhi_u64(unsigned long long, int);
unsigned long long f28(unsigned long long x) { return _bzhi_u64(x, 64); }


x86 assembly (clang, -O0):
<f28>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x40,%esi
call   1030 <_bzhi_u64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f28>:
mov    $0x40,%esi
jmp    1030 <_bzhi_u64@plt>

LLVM IR (-O0):
define i64 @f28(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @_bzhi_u64(i64 %3, i32 64)
ret i64 %4
}

LLVM IR (-O2):
define i64 @f28(i64 %0) {
%2 = tail call i64 @_bzhi_u64(i64 %0, i32 64)
ret i64 %2
}
void _reverse(char *codon) {
  char one = codon[0];
  char three = codon[2];
  codon[0] = three;
  codon[2] = one;
}


x86 assembly (clang, -O0):
<_reverse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2(%rax),%al
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x9(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x2(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_reverse>:
mov    (%rdi),%al
mov    0x2(%rdi),%cl
mov    %cl,(%rdi)
mov    %al,0x2(%rdi)
ret

LLVM IR (-O0):
define void @_reverse(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
%4 = alloca i8
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i64 0
%7 = load i8, i8* %6
store i8 %7, i8* %3
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 2
%10 = load i8, i8* %9
store i8 %10, i8* %4
%11 = load i8, i8* %4
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i64 0
store i8 %11, i8* %13
%14 = load i8, i8* %3
%15 = load i8*, i8** %2
%16 = getelementptr inbounds i8, i8* %15, i64 2
store i8 %14, i8* %16
ret void
}

LLVM IR (-O2):
define void @_reverse(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = getelementptr inbounds i8, i8* %0, i64 2
%4 = load i8, i8* %3
store i8 %4, i8* %0
store i8 %2, i8* %3
ret void
}
char const *skip(const char *p, char c) {
  while (*p == ' ')
    p++;
  if (*p == c) {
    p++;
  }
  while (*p == ' ')
    p++;
  return p;
}


x86 assembly (clang, -O0):
<skip>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
jne    112f <skip+0x2f>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110e <skip+0xe>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jne    114e <skip+0x4e>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <skip+0x53>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
jne    1174 <skip+0x74>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <skip+0x53>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip>:
mov    %rdi,%rax
add    $0xfffffffffffffffe,%rax
nopw   0x0(%rax,%rax,1)
movzbl 0x2(%rax),%edx
add    $0x1,%rax
cmp    $0x20,%dl
je     1110 <skip+0x10>
xor    %ecx,%ecx
cmp    %sil,%dl
sete   %cl
cs nopw 0x0(%rax,%rax,1)
nop
cmpb   $0x20,0x1(%rax,%rcx,1)
lea    0x1(%rax),%rax
je     1130 <skip+0x30>
add    %rcx,%rax
ret

LLVM IR (-O0):
define i8* @skip(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
br label %5
5: ; preds = %10, %2
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 32
br i1 %9, label %10, label %13
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %3
br label %5
13: ; preds = %5
%14 = load i8*, i8** %3
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = load i8, i8* %4
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %16, %18
br i1 %19, label %20, label %23
20: ; preds = %13
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %3
br label %23
23: ; preds = %20, %13
br label %24
24: ; preds = %29, %23
%25 = load i8*, i8** %3
%26 = load i8, i8* %25
%27 = sext i8 %26 to i32
%28 = icmp eq i32 %27, 32
br i1 %28, label %29, label %32
29: ; preds = %24
%30 = load i8*, i8** %3
%31 = getelementptr inbounds i8, i8* %30, i32 1
store i8* %31, i8** %3
br label %24
32: ; preds = %24
%33 = load i8*, i8** %3
ret i8* %33
}

LLVM IR (-O2):
define i8* @skip(i8* %0, i8 signext %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %7, %3 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 32
%7 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %6, label %3, label %8
8: ; preds = %3
%9 = icmp eq i8 %5, %1
%10 = zext i1 %9 to i64
%11 = getelementptr i8, i8* %4, i64 %10
br label %12
12: ; preds = %12, %8
%13 = phi i8* [ %11, %8 ], [ %16, %12 ]
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 32
%16 = getelementptr inbounds i8, i8* %13, i64 1
br i1 %15, label %12, label %17
17: ; preds = %12
ret i8* %13
}
/* Type definitions */
struct ioctl_entry {
  int dummy;
};
struct ioctl_args {
  int dummy;
};

/* Variables and functions */
int do_set_ioctl_int(struct ioctl_args *, struct ioctl_entry *);
int set_fullscan_period(struct ioctl_args *args, struct ioctl_entry *entry) {
  return do_set_ioctl_int(args, entry);
}


x86 assembly (clang, -O0):
<set_fullscan_period>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <do_set_ioctl_int@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_fullscan_period>:
jmp    1030 <do_set_ioctl_int@plt>

LLVM IR (-O0):
%struct.ioctl_args = type { i32 }
%struct.ioctl_entry = type { i32 }
define i32 @set_fullscan_period(%struct.ioctl_args* %0, %struct.ioctl_entry* %1) {
%3 = alloca %struct.ioctl_args*
%4 = alloca %struct.ioctl_entry*
store %struct.ioctl_args* %0, %struct.ioctl_args** %3
store %struct.ioctl_entry* %1, %struct.ioctl_entry** %4
%5 = load %struct.ioctl_args*, %struct.ioctl_args** %3
%6 = load %struct.ioctl_entry*, %struct.ioctl_entry** %4
%7 = call i32 @do_set_ioctl_int(%struct.ioctl_args* %5, %struct.ioctl_entry* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.ioctl_args = type { i32 }
%struct.ioctl_entry = type { i32 }
define i32 @set_fullscan_period(%struct.ioctl_args* %0, %struct.ioctl_entry* %1) {
%3 = tail call i32 @do_set_ioctl_int(%struct.ioctl_args* %0, %struct.ioctl_entry* %1)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ wmemcmp(int /*<<< orphan*/ *, int /*<<< orphan*/ *, size_t);
void uninitvar_wmemcmp(void) {
  wchar_t *s1;
  wchar_t *s2;
  size_t n;
  (void)wmemcmp(s1, s2, n);
}


x86 assembly (clang, -O0):
<uninitvar_wmemcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <wmemcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_wmemcmp>:
jmp    1030 <wmemcmp@plt>

LLVM IR (-O0):
define void @uninitvar_wmemcmp() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i64
%4 = load i32*, i32** %1
%5 = load i32*, i32** %2
%6 = load i64, i64* %3
%7 = call i32 @wmemcmp(i32* %4, i32* %5, i64 %6)
ret void
}

LLVM IR (-O2):
define void @uninitvar_wmemcmp() {
%1 = tail call i32 @wmemcmp(i32* undef, i32* undef, i64 undef)
ret void
}
void mhl_bist_release(void) {}


x86 assembly (clang, -O0):
<mhl_bist_release>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mhl_bist_release>:
ret

LLVM IR (-O0):
define void @mhl_bist_release() {
ret void
}

LLVM IR (-O2):
define void @mhl_bist_release() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
scalar_t__ strlen(char const *);
int writelv(int /*<<< orphan*/ *, int /*<<< orphan*/, char const *);
bool writestrlv(FILE *fp, const char *str) {
  return writelv(fp, (uint16_t)strlen(str), str);
}


x86 assembly (clang, -O0):
<writestrlv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
mov    -0x10(%rbp),%rdx
call   1040 <writelv@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<writestrlv>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %r14,%rdi
mov    %eax,%esi
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <writelv@plt>

LLVM IR (-O0):
define i32 @writestrlv(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = call i64 @strlen(i8* %6)
%8 = trunc i64 %7 to i32
%9 = load i8*, i8** %4
%10 = call i32 @writelv(i32* %5, i32 %8, i8* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @writestrlv(i32* %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = trunc i64 %3 to i32
%5 = tail call i32 @writelv(i32* %0, i32 %4, i8* %1)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_eval(int);
scalar_t__ strncmp(char *, char *, int);
void strncmp_1() {
  char *x = "234";
  char *y = "123";
  clang_analyzer_eval(strncmp(x, y, 3) > 0);
}


x86 assembly (clang, -O0):
<strncmp_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x3,%edx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
setg   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <clang_analyzer_eval@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncmp_1>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xed5(%rip),%rsi
mov    $0x3,%edx
call   1030 <strncmp@plt>
xor    %edi,%edi
test   %rax,%rax
setg   %dil
pop    %rax
jmp    1040 <clang_analyzer_eval@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"234\00"
@.str.1 = [4 x i8] c"123\00"
define void @strncmp_1() {
%1 = alloca i8*
%2 = alloca i8*
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %1
%4 = load i8*, i8** %2
%5 = call i64 @strncmp(i8* %3, i8* %4, i32 3)
%6 = icmp sgt i64 %5, 0
%7 = zext i1 %6 to i32
%8 = call i32 @clang_analyzer_eval(i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"234\00"
@.str.1 = [4 x i8] c"123\00"
define void @strncmp_1() {
%1 = tail call i64 @strncmp(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 3)
%2 = icmp sgt i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @clang_analyzer_eval(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ luaL_check_string(int);
int /*<<< orphan*/ lua_pushnumber(int /*<<< orphan*/);
int /*<<< orphan*/ strlen(int /*<<< orphan*/);
void str_len(void) { lua_pushnumber(strlen(luaL_check_string(1))); }


x86 assembly (clang, -O0):
<str_len>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1040 <luaL_check_string@plt>
mov    %eax,%edi
call   1030 <strlen@plt>
mov    %eax,%edi
call   1050 <lua_pushnumber@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_len>:
push   %rax
mov    $0x1,%edi
call   1040 <luaL_check_string@plt>
mov    %eax,%edi
call   1030 <strlen@plt>
mov    %eax,%edi
pop    %rax
jmp    1050 <lua_pushnumber@plt>

LLVM IR (-O0):
define void @str_len() {
%1 = call i32 @luaL_check_string(i32 1)
%2 = call i32 @strlen(i32 %1)
%3 = call i32 @lua_pushnumber(i32 %2)
ret void
}

LLVM IR (-O2):
define void @str_len() {
%1 = tail call i32 @luaL_check_string(i32 1)
%2 = tail call i32 @strlen(i32 %1)
%3 = tail call i32 @lua_pushnumber(i32 %2)
ret void
}
int __PHYSFS_platformInit(void) { return (1); }


x86 assembly (clang, -O0):
<__PHYSFS_platformInit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__PHYSFS_platformInit>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @__PHYSFS_platformInit() {
ret i32 1
}

LLVM IR (-O2):
define i32 @__PHYSFS_platformInit() {
ret i32 1
}
unsigned int of_get_watchdog_priority(struct device_node *node) { return 0; }


x86 assembly (clang, -O0):
<of_get_watchdog_priority>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<of_get_watchdog_priority>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.device_node = type opaque
define i32 @of_get_watchdog_priority(%struct.device_node* %0) {
%2 = alloca %struct.device_node*
store %struct.device_node* %0, %struct.device_node** %2
ret i32 0
}

LLVM IR (-O2):
%struct.device_node = type opaque
define i32 @of_get_watchdog_priority(%struct.device_node* nocapture readnone %0) {
ret i32 0
}
__attribute__((no, noclone)) unsigned __int128 t162_2sub(unsigned __int128 y) {
  unsigned __int128 x = (-1);
  unsigned __int128 r;
  if (__builtin_sub_overflow(x, y, &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t162_2sub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
movq   $0xffffffffffffffff,-0x38(%rbp)
ff
movq   $0xffffffffffffffff,-0x40(%rbp)
ff
mov    -0x40(%rbp),%rdx
mov    -0x38(%rbp),%rcx
mov    -0x30(%rbp),%rsi
mov    -0x28(%rbp),%rax
sub    %rsi,%rdx
sbb    %rax,%rcx
setb   %al
mov    %rdx,-0x50(%rbp)
mov    %rcx,-0x48(%rbp)
test   $0x1,%al
jne    116e <t162_2sub+0x5e>
jmp    1175 <t162_2sub+0x65>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x50(%rbp),%rax
mov    -0x48(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t162_2sub>:
mov    %rsi,%rdx
mov    %rdi,%rax
not    %rax
not    %rdx
ret

LLVM IR (-O0):
define { i64, i64 } @t162_2sub(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = alloca i128
%8 = bitcast i128* %4 to { i64, i64 }*
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %8, i32 0, i32 0
store i64 %0, i64* %9
%10 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %8, i32 0, i32 1
store i64 %1, i64* %10
%11 = load i128, i128* %4
store i128 %11, i128* %5
store i128 -1, i128* %6
%12 = load i128, i128* %6
%13 = load i128, i128* %5
%14 = call { i128, i1 } @llvm.usub.with.overflow.i128(i128 %12, i128 %13)
%15 = extractvalue { i128, i1 } %14, 1
%16 = extractvalue { i128, i1 } %14, 0
store i128 %16, i128* %7
br i1 %15, label %17, label %19
17: ; preds = %2
%18 = call i32 (...) @bar()
br label %19
19: ; preds = %17, %2
%20 = load i128, i128* %7
store i128 %20, i128* %3
%21 = bitcast i128* %3 to { i64, i64 }*
%22 = load { i64, i64 }, { i64, i64 }* %21
ret { i64, i64 } %22
}

LLVM IR (-O2):
define { i64, i64 } @t162_2sub(i64 %0, i64 %1) {
%3 = zext i64 %1 to i128
%4 = shl nuw i128 %3, 64
%5 = zext i64 %0 to i128
%6 = or i128 %4, %5
%7 = xor i128 %6, -1
%8 = trunc i128 %7 to i64
%9 = lshr i128 %7, 64
%10 = trunc i128 %9 to i64
%11 = insertvalue { i64, i64 } poison, i64 %8, 0
%12 = insertvalue { i64, i64 } %11, i64 %10, 1
ret { i64, i64 } %12
}