xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ PCI_DEV(int /*<<< orphan*/, int /*<<< orphan*/,
                           int /*<<< orphan*/);
int /*<<< orphan*/ set_nbmisc_enable_bits(int /*<<< orphan*/, int, int, int);
void enable_rs780_dev8(void) {
  set_nbmisc_enable_bits(PCI_DEV(0, 0, 0), 0x00, 1 << 6, 1 << 6);
}


x86 assembly (clang, -O0):
<enable_rs780_dev8>:
push   %rbp
mov    %rsp,%rbp
xor    %edx,%edx
mov    %edx,%edi
mov    %edx,%esi
call   1040 <PCI_DEV@plt>
mov    %eax,%edi
xor    %esi,%esi
mov    $0x40,%ecx
mov    %ecx,%edx
call   1030 <set_nbmisc_enable_bits@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<enable_rs780_dev8>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
call   1040 <PCI_DEV@plt>
mov    %eax,%edi
xor    %esi,%esi
mov    $0x40,%edx
mov    $0x40,%ecx
pop    %rax
jmp    1030 <set_nbmisc_enable_bits@plt>

LLVM IR (-O0):
define void @enable_rs780_dev8() {
%1 = call i32 @PCI_DEV(i32 0, i32 0, i32 0)
%2 = call i32 @set_nbmisc_enable_bits(i32 %1, i32 0, i32 64, i32 64)
ret void
}

LLVM IR (-O2):
define void @enable_rs780_dev8() {
%1 = tail call i32 @PCI_DEV(i32 0, i32 0, i32 0)
%2 = tail call i32 @set_nbmisc_enable_bits(i32 %1, i32 0, i32 64, i32 64)
ret void
}
/* Variables and functions */
int strcmp(char const *, char const *);
int string_compare(const void *a, const void *b) {
  const char *s1 = *(char *const *)a;
  const char *s2 = *(char *const *)b;
  return strcmp(s1, s2);
}


x86 assembly (clang, -O0):
<string_compare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_compare>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @string_compare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i8**
%9 = load i8*, i8** %8
store i8* %9, i8** %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i8**
%12 = load i8*, i8** %11
store i8* %12, i8** %6
%13 = load i8*, i8** %5
%14 = load i8*, i8** %6
%15 = call i32 @strcmp(i8* %13, i8* %14)
ret i32 %15
}

LLVM IR (-O2):
define i32 @string_compare(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %4, i8* dereferenceable(1) %6)
ret i32 %7
}
int recursiveSum(int number) {
  if (number == 0) {
    return 0;
  } else {
    return number + recursiveSum(number - 1);
  }
}


x86 assembly (clang, -O0):
<recursiveSum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1131 <recursiveSum+0x21>
movl   $0x0,-0x4(%rbp)
jmp    114c <recursiveSum+0x3c>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <recursiveSum@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<recursiveSum>:
test   %edi,%edi
je     1119 <recursiveSum+0x19>
lea    -0x1(%rdi),%eax
lea    -0x2(%rdi),%ecx
imul   %rax,%rcx
imul   %eax,%eax
shr    %rcx
add    %edi,%eax
sub    %ecx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @recursiveSum(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %13
7: ; preds = %1
%8 = load i32, i32* %3
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 1
%11 = call i32 @recursiveSum(i32 %10)
%12 = add nsw i32 %8, %11
store i32 %12, i32* %2
br label %13
13: ; preds = %7, %6
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @recursiveSum(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %14, label %3
3: ; preds = %1
%4 = add i32 %0, -1
%5 = mul i32 %4, %4
%6 = zext i32 %4 to i33
%7 = add i32 %0, -2
%8 = zext i32 %7 to i33
%9 = mul i33 %6, %8
%10 = lshr i33 %9, 1
%11 = trunc i33 %10 to i32
%12 = add i32 %5, %0
%13 = sub i32 %12, %11
br label %14
14: ; preds = %3, %1
%15 = phi i32 [ 0, %1 ], [ %13, %3 ]
ret i32 %15
}
/* Variables and functions */
int printReply(int);
int sendRequest(int, char *, char *, int);
int registerf(int sd, char argv[]) {
  int status = sendRequest(sd, "REGISTER", argv, 3);
  if (status > 0) {
    status = printReply(sd);
  }
  return status;
}


x86 assembly (clang, -O0):
<registerf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rdx
lea    0xec3(%rip),%rsi
mov    $0x3,%ecx
call   1040 <sendRequest@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jle    115f <registerf+0x3f>
mov    -0x4(%rbp),%edi
call   1030 <printReply@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<registerf>:
push   %rbx
mov    %rsi,%rdx
mov    %edi,%ebx
lea    0xed3(%rip),%rsi
mov    $0x3,%ecx
call   1040 <sendRequest@plt>
test   %eax,%eax
jle    1143 <registerf+0x23>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <printReply@plt>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"REGISTER\00"
define i32 @registerf(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i32, i32* %3
%7 = load i8*, i8** %4
%8 = call i32 @sendRequest(i32 %6, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %7, i32 3)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp sgt i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = load i32, i32* %3
%13 = call i32 @printReply(i32 %12)
store i32 %13, i32* %5
br label %14
14: ; preds = %11, %2
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
@.str = [9 x i8] c"REGISTER\00"
define i32 @registerf(i32 %0, i8* %1) {
%3 = tail call i32 @sendRequest(i32 %0, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %1, i32 3)
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @printReply(i32 %0)
br label %7
7: ; preds = %5, %2
%8 = phi i32 [ %6, %5 ], [ %3, %2 ]
ret i32 %8
}
f4(a) long a;
{
  int i;
  for (i = 0; i < 10; i++) {
    if (--a != 0)
      return i;
  }
  return -1;
}


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0xa,-0x14(%rbp)
jge    114d <f4+0x4d>
mov    -0x10(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
je     113a <f4+0x3a>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1154 <f4+0x54>
jmp    113f <f4+0x3f>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    110f <f4+0xf>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
xor    %eax,%eax
cmp    $0x1,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @f4(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 0, i32* %4
br label %5
5: ; preds = %15, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 10
br i1 %7, label %8, label %18
8: ; preds = %5
%9 = load i64, i64* %3
%10 = add nsw i64 %9, -1
store i64 %10, i64* %3
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = load i32, i32* %4
store i32 %13, i32* %2
br label %19
14: ; preds = %8
br label %15
15: ; preds = %14
%16 = load i32, i32* %4
%17 = add nsw i32 %16, 1
store i32 %17, i32* %4
br label %5
18: ; preds = %5
store i32 -1, i32* %2
br label %19
19: ; preds = %18, %12
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @f4(i64 %0) {
%2 = icmp eq i64 %0, 1
%3 = zext i1 %2 to i32
ret i32 %3
}
void rop3_196_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = ~*D;
  stk2 = T | stk3;
  stk1 = S & stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_196_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_196_1_1>:
or     %edx,%esi
and    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_196_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = xor i32 %12, -1
%14 = trunc i32 %13 to i8
store i8 %14, i8* %9
%15 = load i8, i8* %6
%16 = zext i8 %15 to i32
%17 = load i8, i8* %9
%18 = zext i8 %17 to i32
%19 = or i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %8
%21 = load i8, i8* %5
%22 = zext i8 %21 to i32
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = and i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %7
%27 = load i8, i8* %7
%28 = zext i8 %27 to i32
%29 = load i8, i8* %5
%30 = zext i8 %29 to i32
%31 = xor i32 %30, -1
%32 = and i32 %28, %31
%33 = load i8, i8* %6
%34 = zext i8 %33 to i32
%35 = xor i32 %34, -1
%36 = and i32 %32, %35
%37 = load i8*, i8** %4
%38 = load i8, i8* %37
%39 = zext i8 %38 to i32
%40 = load i8, i8* %5
%41 = zext i8 %40 to i32
%42 = and i32 %39, %41
%43 = or i32 %36, %42
%44 = load i8*, i8** %4
%45 = load i8, i8* %44
%46 = zext i8 %45 to i32
%47 = load i8, i8* %6
%48 = zext i8 %47 to i32
%49 = and i32 %46, %48
%50 = or i32 %43, %49
%51 = trunc i32 %50 to i8
%52 = load i8*, i8** %4
store i8 %51, i8* %52
ret void
}

LLVM IR (-O2):
define void @rop3_196_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %2, %1
%6 = and i8 %4, %5
store i8 %6, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
char *strstr(char *, char *);
int main() {
  char str[] = "This is a simple string";
  char *pch, *pch2;
  pch = strstr(str, "simple");
  pch2 = strstr(str, "a");
  puts(pch);
  puts(pch2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xec4(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    -0x20(%rbp),%rdi
lea    0xebd(%rip),%rsi
call   1040 <strstr@plt>
mov    %rax,-0x28(%rbp)
lea    -0x20(%rbp),%rdi
lea    0xeb0(%rip),%rsi
call   1040 <strstr@plt>
mov    %rax,-0x30(%rbp)
mov    -0x28(%rbp),%rdi
call   1030 <puts@plt>
mov    -0x30(%rbp),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
sub    $0x20,%rsp
movaps 0xec0(%rip),%xmm0
movaps %xmm0,(%rsp)
movabs $0x676e6972747320,%rax
mov    %rax,0x10(%rsp)
lea    0xebe(%rip),%rsi
mov    %rsp,%r14
mov    %r14,%rdi
call   1050 <strstr@plt>
mov    %rax,%r15
mov    %r14,%rdi
mov    $0x61,%esi
call   1040 <strchr@plt>
mov    %rax,%rbx
mov    %r15,%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@__const.main.str = [24 x i8] c"This is a simple string\00"
@.str = [7 x i8] c"simple\00"
@.str.1 = [2 x i8] c"a\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [24 x i8]
%3 = alloca i8*
%4 = alloca i8*
store i32 0, i32* %1
%5 = bitcast [24 x i8]* %2 to i8*
%6 = getelementptr inbounds [24 x i8], [24 x i8]* %2, i64 0, i64 0
%7 = call i8* @strstr(i8* %6, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
store i8* %7, i8** %3
%8 = getelementptr inbounds [24 x i8], [24 x i8]* %2, i64 0, i64 0
%9 = call i8* @strstr(i8* %8, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i8* %9, i8** %4
%10 = load i8*, i8** %3
%11 = call i32 @puts(i8* %10)
%12 = load i8*, i8** %4
%13 = call i32 @puts(i8* %12)
ret i32 0
}

LLVM IR (-O2):
@__const.main.str = [24 x i8] c"This is a simple string\00"
@.str = [7 x i8] c"simple\00"
define i32 @main() {
%1 = alloca [24 x i8]
%2 = getelementptr inbounds [24 x i8], [24 x i8]* %1, i64 0, i64 0
%3 = call i8* @strstr(i8* %2, i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%4 = call i8* @strchr(i8* %2, i32 97)
%5 = call i32 @puts(i8* dereferenceable(1) %3)
%6 = call i32 @puts(i8* dereferenceable(1) %4)
ret i32 0
}
int test_imm_8Dint64_lowword_mem(long long *val) {
  return ((*val) & (0x8D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Dint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x8d,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Dint64_lowword_mem>:
testb  $0x8d,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Dint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 141
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_8Dint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 141
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ ublox_mdm_init();
void mbed_sdk_init() { ublox_mdm_init(); }


x86 assembly (clang, -O0):
<mbed_sdk_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ublox_mdm_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mbed_sdk_init>:
xor    %eax,%eax
jmp    1030 <ublox_mdm_init@plt>

LLVM IR (-O0):
define void @mbed_sdk_init() {
%1 = call i32 (...) @ublox_mdm_init()
ret void
}

LLVM IR (-O2):
define void @mbed_sdk_init() {
%1 = tail call i32 (...) @ublox_mdm_init()
ret void
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ puts(char *);
int main(void) {
  puts("Hello World!");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <puts@plt>
mov    0x2eae(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2ebc(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello World!\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @puts(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hello World!\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
long QEIDirectionGet(unsigned long ulBase) {
  DEBUG_ASSERT((ulBase == 0x4002C000) || (ulBase == 0x4002D000));
  return (((*((volatile unsigned long *)(ulBase + 0x00000004))) & 0x00000002)
              ? -1
              : 1);
}


x86 assembly (clang, -O0):
<QEIDirectionGet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%al
cmpq   $0x4002c000,-0x8(%rbp)
40
mov    %al,-0x9(%rbp)
je     113d <QEIDirectionGet+0x2d>
cmpq   $0x4002d000,-0x8(%rbp)
40
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rdx
and    $0x2,%rdx
mov    $0x1,%eax
mov    $0xffffffff,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<QEIDirectionGet>:
push   %rbx
mov    %rdi,%rbx
mov    %rdi,%rax
and    $0xffffffffffffefff,%rax
xor    %edi,%edi
cmp    $0x4002c000,%rax
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
mov    0x4(%rbx),%rax
and    $0x2,%eax
neg    %rax
sbb    %rax,%rax
or     $0x1,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @QEIDirectionGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp eq i64 %3, 1073922048
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i64, i64* %2
%7 = icmp eq i64 %6, 1073926144
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = call i32 @DEBUG_ASSERT(i32 %10)
%12 = load i64, i64* %2
%13 = add i64 %12, 4
%14 = inttoptr i64 %13 to i64*
%15 = load volatile i64, i64* %14
%16 = and i64 %15, 2
%17 = icmp ne i64 %16, 0
%18 = zext i1 %17 to i64
%19 = select i1 %17, i32 -1, i32 1
%20 = sext i32 %19 to i64
ret i64 %20
}

LLVM IR (-O2):
define i64 @QEIDirectionGet(i64 %0) {
%2 = and i64 %0, -4097
%3 = icmp eq i64 %2, 1073922048
%4 = zext i1 %3 to i32
%5 = tail call i32 @DEBUG_ASSERT(i32 %4)
%6 = add i64 %0, 4
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = and i64 %8, 2
%10 = icmp eq i64 %9, 0
%11 = select i1 %10, i64 1, i64 -1
ret i64 %11
}
void usage(const char *p) {}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
ret

LLVM IR (-O0):
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @usage(i8* nocapture %0) {
ret void
}
void op_code_normal_case0x00(void) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @op_code_normal_case0x00() {
ret void
}

LLVM IR (-O2):
define void @op_code_normal_case0x00() {
ret void
}
void fd109(int n) {
P0A:
  goto P0A;
  {
    typedef int(*b)[n];
  P01A:
    goto P01A;
    {
      typedef int(*c)[n];
    P012A:
      goto P012A;
      0;
    }
  P01B:
    goto P01B;
    {
      typedef int(*d)[n];
    P013A:
      goto P013A;
      0;
    }
  P01C:
    goto P01C;
    ;
    typedef int(*e)[n];
  p014A:
    goto p014A;
    goto a;
  P014A:
    goto P014A;
    0;
  };
a : {
  typedef int(*f)[n];
P02A:
  goto P02A;
  {
    typedef int(*g)[n];
  P024A:
    goto P024A;
    0;
  };
P02B:
  goto P02B;
  {
    typedef int(*h)[n];
  P025A:
    goto P025A;
    0;
  };
P02C:
  goto P02C;
  ;
  typedef int(*i)[n];
P026A:
  goto P026A;
  0;
};
P0C:
  goto P0C;
  ;
  typedef int(*j)[n];
P03A:
  goto P03A;
  0;
P03B:
  goto P03B;
}


x86 assembly (clang, -O0):
<fd109>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fd109+0x7>

x86 assembly (clang, -O2):
<fd109>:
jmp    1100 <fd109>

LLVM IR (-O0):
define void @fd109(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %3, %1
br label %3
4: ; No predecessors!
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
br label %7
7: ; preds = %7, %4
br label %7
8: ; No predecessors!
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
br label %11
11: ; preds = %11, %8
br label %11
12: ; preds = %12
br label %12
13: ; No predecessors!
%14 = load i32, i32* %2
%15 = zext i32 %14 to i64
br label %16
16: ; preds = %16, %13
br label %16
17: ; preds = %17
br label %17
18: ; No predecessors!
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
br label %21
21: ; preds = %21, %18
br label %21
22: ; preds = %22
br label %22
23: ; No predecessors!
%24 = load i32, i32* %2
%25 = zext i32 %24 to i64
br label %26
26: ; preds = %26, %23
br label %26
27: ; No predecessors!
%28 = load i32, i32* %2
%29 = zext i32 %28 to i64
br label %30
30: ; preds = %30, %27
br label %30
31: ; preds = %31
br label %31
32: ; No predecessors!
%33 = load i32, i32* %2
%34 = zext i32 %33 to i64
br label %35
35: ; preds = %35, %32
br label %35
36: ; preds = %36
br label %36
37: ; No predecessors!
%38 = load i32, i32* %2
%39 = zext i32 %38 to i64
br label %40
40: ; preds = %40, %37
br label %40
41: ; preds = %41
br label %41
42: ; No predecessors!
%43 = load i32, i32* %2
%44 = zext i32 %43 to i64
br label %45
45: ; preds = %45, %42
br label %45
46: ; preds = %46
br label %46
}

LLVM IR (-O2):
define void @fd109(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
unsigned int min(unsigned int x, unsigned int y) {
  if (x < y)
    return x;
  return y;
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jae    1121 <min+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <min+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %esi,%eax
cmp    %esi,%edi
cmovb  %edi,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp ult i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1) {
%3 = icmp ult i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ rt_set_oneshot_mode();
int /*<<< orphan*/ start_rt_timer(int /*<<< orphan*/);
int rtos_timer_start(void) {
  rt_set_oneshot_mode();
  start_rt_timer(0);
  return 0;
}


x86 assembly (clang, -O0):
<rtos_timer_start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <rt_set_oneshot_mode@plt>
xor    %edi,%edi
call   1030 <start_rt_timer@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtos_timer_start>:
push   %rax
xor    %eax,%eax
call   1040 <rt_set_oneshot_mode@plt>
xor    %edi,%edi
call   1030 <start_rt_timer@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @rtos_timer_start() {
%1 = call i32 (...) @rt_set_oneshot_mode()
%2 = call i32 @start_rt_timer(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @rtos_timer_start() {
%1 = tail call i32 (...) @rt_set_oneshot_mode()
%2 = tail call i32 @start_rt_timer(i32 0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ gfx_set_display_video_vertical_downscale_enable(int);
void gfx_set_video_vertical_downscale_enable(int enable) {
  gfx_set_display_video_vertical_downscale_enable(enable);
}


x86 assembly (clang, -O0):
<gfx_set_video_vertical_downscale_enable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <gfx_set_display_video_vertical_downscale_enable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfx_set_video_vertical_downscale_enable>:
jmp    1030 <gfx_set_display_video_vertical_downscale_enable@plt>

LLVM IR (-O0):
define void @gfx_set_video_vertical_downscale_enable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @gfx_set_display_video_vertical_downscale_enable(i32 %3)
ret void
}

LLVM IR (-O2):
define void @gfx_set_video_vertical_downscale_enable(i32 %0) {
%2 = tail call i32 @gfx_set_display_video_vertical_downscale_enable(i32 %0)
ret void
}
int ehnlc_islower(int c) { return (c >= 'a' && c <= 'z') ? 512 : 0; }


x86 assembly (clang, -O0):
<ehnlc_islower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x61,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <ehnlc_islower+0x20>
cmpl   $0x7a,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%dl
xor    %eax,%eax
mov    $0x200,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ehnlc_islower>:
add    $0xffffff9f,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
shl    $0x9,%eax
ret

LLVM IR (-O0):
define i32 @ehnlc_islower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 97
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 122
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i64
%11 = select i1 %9, i32 512, i32 0
ret i32 %11
}

LLVM IR (-O2):
define i32 @ehnlc_islower(i32 %0) {
%2 = add i32 %0, -97
%3 = icmp ult i32 %2, 26
%4 = select i1 %3, i32 512, i32 0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage() { printf("Usage:  examine -bw|<addr> ...\n"); }


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"Usage: examine -bw|<addr> ...\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [31 x i8] c"Usage: examine -bw|<addr> ...\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
uint64_t dev_get_size(int fd) { return 0; }


x86 assembly (clang, -O0):
<dev_get_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dev_get_size>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dev_get_size(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @dev_get_size(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ MAP_SHARED;
int PROT_READ;
int PROT_WRITE;
void *mmap(int /*<<< orphan*/, int, int, int /*<<< orphan*/, int, int);
void *msvd_map_buffer(int fd) {
  return mmap(0, (4 * 1024 * 1024), PROT_READ | PROT_WRITE, MAP_SHARED, fd,
              0x100000);
}


x86 assembly (clang, -O0):
<msvd_map_buffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ed6(%rip),%rax
mov    (%rax),%edx
mov    0x2ea5(%rip),%rax
or     (%rax),%edx
mov    0x2eb4(%rip),%rax
mov    (%rax),%ecx
mov    -0x4(%rbp),%r8d
xor    %edi,%edi
mov    $0x400000,%esi
mov    $0x100000,%r9d
call   1030 <mmap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msvd_map_buffer>:
mov    %edi,%r8d
mov    0x2ede(%rip),%rax
mov    0x2eaf(%rip),%rcx
mov    (%rcx),%edx
or     (%rax),%edx
mov    0x2ebc(%rip),%rax
mov    (%rax),%ecx
xor    %edi,%edi
mov    $0x400000,%esi
mov    $0x100000,%r9d
jmp    1030 <mmap@plt>

LLVM IR (-O0):
@PROT_READ = global i32 0
@PROT_WRITE = global i32 0
@MAP_SHARED = global i32 0
define i8* @msvd_map_buffer(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @PROT_READ
%4 = load i32, i32* @PROT_WRITE
%5 = or i32 %3, %4
%6 = load i32, i32* @MAP_SHARED
%7 = load i32, i32* %2
%8 = call i8* @mmap(i32 0, i32 4194304, i32 %5, i32 %6, i32 %7, i32 1048576)
ret i8* %8
}

LLVM IR (-O2):
@PROT_READ = global i32 0
@PROT_WRITE = global i32 0
@MAP_SHARED = global i32 0
define i8* @msvd_map_buffer(i32 %0) {
%2 = load i32, i32* @PROT_READ
%3 = load i32, i32* @PROT_WRITE
%4 = or i32 %3, %2
%5 = load i32, i32* @MAP_SHARED
%6 = tail call i8* @mmap(i32 0, i32 4194304, i32 %4, i32 %5, i32 %0, i32 1048576)
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ echoAsPointer(int, char **);
char *monthName(int);
int /*<<< orphan*/ printf(char *, char *, char *, char *);
int main(int argc, char *argv[]) {
  printf("%s -> %s -> %s\n", monthName(6), monthName(7), monthName(8));
  echoAsPointer(argc, argv);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x6,%edi
call   1040 <monthName@plt>
mov    %rax,-0x20(%rbp)
mov    $0x7,%edi
call   1040 <monthName@plt>
mov    %rax,-0x18(%rbp)
mov    $0x8,%edi
call   1040 <monthName@plt>
mov    -0x20(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    %rax,%rcx
lea    0xe82(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1050 <echoAsPointer@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %edi,%r15d
mov    $0x6,%edi
call   1040 <monthName@plt>
mov    %rax,%rbx
mov    $0x7,%edi
call   1040 <monthName@plt>
mov    %rax,%rbp
mov    $0x8,%edi
call   1040 <monthName@plt>
lea    0xe98(%rip),%rdi
mov    %rbx,%rsi
mov    %rbp,%rdx
mov    %rax,%rcx
call   1030 <printf@plt>
mov    %r15d,%edi
mov    %r14,%rsi
call   1050 <echoAsPointer@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@.str = [16 x i8] c"%s -> %s -> %s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i8* @monthName(i32 6)
%7 = call i8* @monthName(i32 7)
%8 = call i8* @monthName(i32 8)
%9 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %6, i8* %7, i8* %8)
%10 = load i32, i32* %4
%11 = load i8**, i8*** %5
%12 = call i32 @echoAsPointer(i32 %10, i8** %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"%s -> %s -> %s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i8* @monthName(i32 6)
%4 = tail call i8* @monthName(i32 7)
%5 = tail call i8* @monthName(i32 8)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %3, i8* %4, i8* %5)
%7 = tail call i32 @echoAsPointer(i32 %0, i8** %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void amaret_local_Mcu_shutdown__E() { printf("Mcu.shutdown\n"); }


x86 assembly (clang, -O0):
<amaret_local_Mcu_shutdown__E>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<amaret_local_Mcu_shutdown__E>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"Mcu.shutdown\0A\00"
define void @amaret_local_Mcu_shutdown__E() {
%1 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [13 x i8] c"Mcu.shutdown\00"
define void @amaret_local_Mcu_shutdown__E() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret void
}
int ffs(int x) { asm("" : : "rm"(x)); }


x86 assembly (clang, -O0):
<ffs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffs>:
mov    %edi,-0x4(%rsp)
ret

LLVM IR (-O0):
define i32 @ffs(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
define i32 @ffs(i32 %0) {
tail call void asm sideeffect "", "rm,~{dirflag},~{fpsr},~{flags}"(i32 %0)
ret i32 undef
}
float EaseBackOut(float t, float b, float c, float d) {
  float s = 1.70158f;
  t = t / d - 1.0f;
  return (c * (t * t * ((s + 1.0f) * t + s) + 1.0f) + b);
}


x86 assembly (clang, -O0):
<EaseBackOut>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  0xee4(%rip),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x4(%rbp),%xmm0
divss  -0x10(%rbp),%xmm0
movss  0xec9(%rip),%xmm1
subss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0xc(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
mulss  -0x4(%rbp),%xmm2
movss  0xea9(%rip),%xmm1
addss  -0x14(%rbp),%xmm1
movss  -0x4(%rbp),%xmm4
movss  -0x14(%rbp),%xmm3
mulss  %xmm4,%xmm1
addss  %xmm3,%xmm1
mulss  %xmm1,%xmm2
movss  0xe86(%rip),%xmm1
addss  %xmm1,%xmm2
movss  -0x8(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<EaseBackOut>:
divss  %xmm3,%xmm0
addss  0xef4(%rip),%xmm0
movaps %xmm0,%xmm3
mulss  0xeed(%rip),%xmm0
mulss  %xmm3,%xmm3
addss  0xee5(%rip),%xmm0
mulss  %xmm3,%xmm0
addss  0xedd(%rip),%xmm0
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @EaseBackOut(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
%9 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
store float 0x3FFB39AC00000000, float* %9
%10 = load float, float* %5
%11 = load float, float* %8
%12 = fdiv float %10, %11
%13 = fsub float %12, 1.000000e+00
store float %13, float* %5
%14 = load float, float* %7
%15 = load float, float* %5
%16 = load float, float* %5
%17 = fmul float %15, %16
%18 = load float, float* %9
%19 = fadd float %18, 1.000000e+00
%20 = load float, float* %5
%21 = load float, float* %9
%22 = call float @llvm.fmuladd.f32(float %19, float %20, float %21)
%23 = call float @llvm.fmuladd.f32(float %17, float %22, float 1.000000e+00)
%24 = load float, float* %6
%25 = call float @llvm.fmuladd.f32(float %14, float %23, float %24)
ret float %25
}

LLVM IR (-O2):
define float @EaseBackOut(float %0, float %1, float %2, float %3) {
%5 = fdiv float %0, %3
%6 = fadd float %5, -1.000000e+00
%7 = fmul float %6, %6
%8 = tail call float @llvm.fmuladd.f32(float %6, float 0x40059CD600000000, float 0x3FFB39AC00000000)
%9 = tail call float @llvm.fmuladd.f32(float %7, float %8, float 1.000000e+00)
%10 = tail call float @llvm.fmuladd.f32(float %2, float %9, float %1)
ret float %10
}
int test_imm_D5uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0xD5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D5uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0xd5,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D5uint64_midword_reg>:
test   $0xd50000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D5uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 213
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D5uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 13959168
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
char *malloc(int const);
int /*<<< orphan*/ memset(char *, char const, int const);
char *build_separator_string(const int length, const char character) {
  char *string = malloc(length + 1);
  memset(string, character, length);
  string[length] = '\0';
  return string;
}


x86 assembly (clang, -O0):
<build_separator_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%edi
add    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x5(%rbp),%al
mov    -0x4(%rbp),%edx
movsbl %al,%esi
call   1030 <memset@plt>
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<build_separator_string>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %edi,%ebx
lea    0x1(%rbx),%edi
call   1040 <malloc@plt>
mov    %rax,%rbp
mov    %rax,%rdi
mov    %r14d,%esi
mov    %ebx,%edx
call   1030 <memset@plt>
movslq %ebx,%rax
movb   $0x0,0x0(%rbp,%rax,1)
mov    %rbp,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @build_separator_string(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i8*
store i32 %0, i32* %3
store i8 %1, i8* %4
%6 = load i32, i32* %3
%7 = add nsw i32 %6, 1
%8 = call i8* @malloc(i32 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = load i8, i8* %4
%11 = load i32, i32* %3
%12 = call i32 @memset(i8* %9, i8 signext %10, i32 %11)
%13 = load i8*, i8** %5
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
store i8 0, i8* %16
%17 = load i8*, i8** %5
ret i8* %17
}

LLVM IR (-O2):
define i8* @build_separator_string(i32 %0, i8 signext %1) {
%3 = add nsw i32 %0, 1
%4 = tail call i8* @malloc(i32 %3)
%5 = tail call i32 @memset(i8* %4, i8 signext %1, i32 %0)
%6 = sext i32 %0 to i64
%7 = getelementptr inbounds i8, i8* %4, i64 %6
store i8 0, i8* %7
ret i8* %4
}
/* Variables and functions */
char *strrchr(char *, char);
char *x_basename(char *name) {
  char *cp;
  cp = strrchr(name, '/');
  return (cp ? cp + 1 : name);
}


x86 assembly (clang, -O0):
<x_basename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2f,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     114a <x_basename+0x3a>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1152 <x_basename+0x42>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x_basename>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2f,%esi
call   1030 <strrchr@plt>
lea    0x1(%rax),%rcx
test   %rax,%rax
cmove  %rbx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @x_basename(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strrchr(i8* %4, i8 signext 47)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 1
br label %13
11: ; preds = %1
%12 = load i8*, i8** %2
br label %13
13: ; preds = %11, %8
%14 = phi i8* [ %10, %8 ], [ %12, %11 ]
ret i8* %14
}

LLVM IR (-O2):
define i8* @x_basename(i8* %0) {
%2 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 47)
%3 = icmp eq i8* %2, null
%4 = getelementptr inbounds i8, i8* %2, i64 1
%5 = select i1 %3, i8* %0, i8* %4
ret i8* %5
}
/* Variables and functions */
scalar_t__ floor(double);
double ranno();
int i_rand(int min, int max) {
  double tt;
  tt = ranno();
  return min + (int)floor(0.5 + ((double)(max - min)) * tt);
}


x86 assembly (clang, -O0):
<i_rand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <ranno@plt>
movsd  %xmm0,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
cvtsi2sd %eax,%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xea5(%rip),%xmm1
addsd  %xmm1,%xmm0
call   1040 <floor@plt>
mov    %rax,%rcx
mov    -0x14(%rbp),%eax
add    %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i_rand>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <ranno@plt>
sub    %ebp,%ebx
cvtsi2sd %ebx,%xmm1
mulsd  %xmm1,%xmm0
addsd  0xec0(%rip),%xmm0
call   1040 <floor@plt>
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @i_rand(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca double
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = call double (...) @ranno()
store double %6, double* %5
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = load i32, i32* %3
%10 = sub nsw i32 %8, %9
%11 = sitofp i32 %10 to double
%12 = load double, double* %5
%13 = call double @llvm.fmuladd.f64(double %11, double %12, double 5.000000e-01)
%14 = call i64 @floor(double %13)
%15 = trunc i64 %14 to i32
%16 = add nsw i32 %7, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @i_rand(i32 %0, i32 %1) {
%3 = tail call double (...) @ranno()
%4 = sub nsw i32 %1, %0
%5 = sitofp i32 %4 to double
%6 = tail call double @llvm.fmuladd.f64(double %5, double %3, double 5.000000e-01)
%7 = tail call i64 @floor(double %6)
%8 = trunc i64 %7 to i32
%9 = add nsw i32 %8, %0
ret i32 %9
}
/* Variables and functions */
scalar_t__ malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char *);
scalar_t__ strlen(char *);
char *strcopy(char *src) {
  char *cpy = (char *)malloc(strlen(src) + 1);
  if (cpy)
    strcpy(cpy, src);
  return cpy;
}


x86 assembly (clang, -O0):
<strcopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     116d <strcopy+0x3d>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcopy>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1158 <strcopy+0x28>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strcopy(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i64 @malloc(i64 %6)
%8 = inttoptr i64 %7 to i8*
store i8* %8, i8** %3
%9 = load i8*, i8** %3
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = load i8*, i8** %2
%14 = call i32 @strcpy(i8* %12, i8* %13)
br label %15
15: ; preds = %11, %1
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
define i8* @strcopy(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i64 @malloc(i64 %3)
%5 = inttoptr i64 %4 to i8*
%6 = icmp eq i64 %4, 0
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @strcpy(i8* %5, i8* %0)
br label %9
9: ; preds = %7, %1
ret i8* %5
}
int main() {
  int i = -1;
  int j = 10;
  return i & j;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0xffffffff,-0x8(%rbp)
movl   $0xa,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 -1, i32* %2
store i32 10, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = and i32 %4, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @main() {
ret i32 10
}
/* Type definitions */
typedef int /*<<< orphan*/ ypstat;
typedef int /*<<< orphan*/ enum_t;
typedef int /*<<< orphan*/ bool_t;
typedef int /*<<< orphan*/ XDR;

/* Variables and functions */
int /*<<< orphan*/ xdr_enum(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
bool_t xdr_ypstat(XDR *xdrs, ypstat *objp) {
  return xdr_enum(xdrs, (enum_t *)objp);
}


x86 assembly (clang, -O0):
<xdr_ypstat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <xdr_enum@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xdr_ypstat>:
jmp    1030 <xdr_enum@plt>

LLVM IR (-O0):
define i32 @xdr_ypstat(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @xdr_enum(i32* %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @xdr_ypstat(i32* %0, i32* %1) {
%3 = tail call i32 @xdr_enum(i32* %0, i32* %1)
ret i32 %3
}
int ishexa(char c) {
  if (c >= '0' && c <= '9')
    return 1;
  if (c >= 'a' && c <= 'f')
    return 1;
  if (c >= 'A' && c <= 'F')
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<ishexa>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1130 <ishexa+0x30>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jg     1130 <ishexa+0x30>
movl   $0x1,-0x4(%rbp)
jmp    1183 <ishexa+0x83>
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1156 <ishexa+0x56>
movsbl -0x5(%rbp),%eax
cmp    $0x66,%eax
jg     1156 <ishexa+0x56>
movl   $0x1,-0x4(%rbp)
jmp    1183 <ishexa+0x83>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     117c <ishexa+0x7c>
movsbl -0x5(%rbp),%eax
cmp    $0x46,%eax
jg     117c <ishexa+0x7c>
movl   $0x1,-0x4(%rbp)
jmp    1183 <ishexa+0x83>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ishexa>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%al
setb   %al
and    $0xdf,%dil
add    $0xbf,%dil
cmp    $0x6,%dil
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @ishexa(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %31
12: ; preds = %7, %1
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = icmp sge i32 %14, 97
br i1 %15, label %16, label %21
16: ; preds = %12
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = icmp sle i32 %18, 102
br i1 %19, label %20, label %21
20: ; preds = %16
store i32 1, i32* %2
br label %31
21: ; preds = %16, %12
%22 = load i8, i8* %3
%23 = sext i8 %22 to i32
%24 = icmp sge i32 %23, 65
br i1 %24, label %25, label %30
25: ; preds = %21
%26 = load i8, i8* %3
%27 = sext i8 %26 to i32
%28 = icmp sle i32 %27, 70
br i1 %28, label %29, label %30
29: ; preds = %25
store i32 1, i32* %2
br label %31
30: ; preds = %25, %21
store i32 0, i32* %2
br label %31
31: ; preds = %30, %29, %20, %11
%32 = load i32, i32* %2
ret i32 %32
}

LLVM IR (-O2):
define i32 @ishexa(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = and i8 %0, -33
%5 = add i8 %4, -65
%6 = icmp ult i8 %5, 6
%7 = or i1 %3, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0xf1() {
  Assert_real((isalpha(241) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              1210, ("isalpha should be 0 for 0xf1"));
}


x86 assembly (clang, -O0):
<t_isalpha_0xf1>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf1,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4ba,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0xf1>:
push   %rax
mov    $0xf1,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4ba,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xf1\00"
define void @t_isalpha_0xf1() {
%1 = call i64 @isalpha(i32 241)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1210, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xf1\00"
define void @t_isalpha_0xf1() {
%1 = tail call i64 @isalpha(i32 241)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1210, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}