xunge/DecIR huggingface dataset:
/* Variables and functions */
int get_fsel_bank_no(int);
int mmio_read(int);
int /*<<< orphan*/ mmio_write(int, int);
void gpioSetOutput(int no) {
  int pinno = no % 10;
  int bankno = get_fsel_bank_no(pinno);
  int ireg = mmio_read(bankno);
  ireg |= 1 << (pinno * 3);
  mmio_write(bankno, ireg);
}


x86 assembly (clang, -O0):
<gpioSetOutput>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <get_fsel_bank_no@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <mmio_read@plt>
mov    %eax,-0x10(%rbp)
imul   $0x3,-0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1050 <mmio_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpioSetOutput>:
push   %rbp
push   %rbx
push   %rax
movslq %edi,%rbx
imul   $0x66666667,%rbx,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x22,%rax
add    %ecx,%eax
add    %eax,%eax
lea    (%rax,%rax,4),%eax
sub    %eax,%ebx
mov    %ebx,%edi
call   1030 <get_fsel_bank_no@plt>
mov    %eax,%ebp
mov    %eax,%edi
call   1040 <mmio_read@plt>
lea    (%rbx,%rbx,2),%ecx
bts    %ecx,%eax
mov    %ebp,%edi
mov    %eax,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <mmio_write@plt>

LLVM IR (-O0):
define void @gpioSetOutput(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = srem i32 %6, 10
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = call i32 @get_fsel_bank_no(i32 %8)
store i32 %9, i32* %4
%10 = load i32, i32* %4
%11 = call i32 @mmio_read(i32 %10)
store i32 %11, i32* %5
%12 = load i32, i32* %3
%13 = mul nsw i32 %12, 3
%14 = shl i32 1, %13
%15 = load i32, i32* %5
%16 = or i32 %15, %14
store i32 %16, i32* %5
%17 = load i32, i32* %4
%18 = load i32, i32* %5
%19 = call i32 @mmio_write(i32 %17, i32 %18)
ret void
}

LLVM IR (-O2):
define void @gpioSetOutput(i32 %0) {
%2 = srem i32 %0, 10
%3 = tail call i32 @get_fsel_bank_no(i32 %2)
%4 = tail call i32 @mmio_read(i32 %3)
%5 = mul nsw i32 %2, 3
%6 = shl nuw nsw i32 1, %5
%7 = or i32 %4, %6
%8 = tail call i32 @mmio_write(i32 %3, i32 %7)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int EXIT_SUCCESS;
int main() {
  int32_t me32;
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    0x2ece(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = load i32, i32* @EXIT_SUCCESS
ret i32 %1
}
/* Variables and functions */
int *malloc(int);
int /*<<< orphan*/ mergeSortInternal(int *, int *, int /*<<< orphan*/, int);
void mergeSort(int data[], int size) {
  int *temp = malloc(sizeof(int) * size);
  mergeSortInternal(data, temp, 0, size);
}


x86 assembly (clang, -O0):
<mergeSort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movslq -0xc(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0xc(%rbp),%ecx
xor    %edx,%edx
call   1040 <mergeSortInternal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mergeSort>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
lea    0x0(,%rbx,4),%edi
call   1030 <malloc@plt>
mov    %r14,%rdi
mov    %rax,%rsi
xor    %edx,%edx
mov    %ebx,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <mergeSortInternal@plt>

LLVM IR (-O0):
define void @mergeSort(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32*
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = mul i64 4, %7
%9 = trunc i64 %8 to i32
%10 = call i32* @malloc(i32 %9)
store i32* %10, i32** %5
%11 = load i32*, i32** %3
%12 = load i32*, i32** %5
%13 = load i32, i32* %4
%14 = call i32 @mergeSortInternal(i32* %11, i32* %12, i32 0, i32 %13)
ret void
}

LLVM IR (-O2):
define void @mergeSort(i32* %0, i32 %1) {
%3 = shl i32 %1, 2
%4 = tail call i32* @malloc(i32 %3)
%5 = tail call i32 @mergeSortInternal(i32* %0, i32* %4, i32 0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lock_atom_add();
int /*<<< orphan*/ unlock_atom_add();
int atomicCAS(int *addr, int compare, int set) {
  int ret;
  lock_atom_add();
  ret = *addr;
  if (ret == compare)
    *addr = set;
  unlock_atom_add();
  return ret;
}


x86 assembly (clang, -O0):
<atomicCAS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    $0x0,%al
call   1030 <lock_atom_add@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    1157 <atomicCAS+0x37>
mov    -0x10(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    $0x0,%al
call   1040 <unlock_atom_add@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomicCAS>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %esi,%r15d
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <lock_atom_add@plt>
mov    (%rbx),%ebp
cmp    %r15d,%ebp
jne    1141 <atomicCAS+0x21>
mov    %r14d,(%rbx)
xor    %eax,%eax
call   1040 <unlock_atom_add@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @atomicCAS(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = call i32 (...) @lock_atom_add()
%9 = load i32*, i32** %4
%10 = load i32, i32* %9
store i32 %10, i32* %7
%11 = load i32, i32* %7
%12 = load i32, i32* %5
%13 = icmp eq i32 %11, %12
br i1 %13, label %14, label %17
14: ; preds = %3
%15 = load i32, i32* %6
%16 = load i32*, i32** %4
store i32 %15, i32* %16
br label %17
17: ; preds = %14, %3
%18 = call i32 (...) @unlock_atom_add()
%19 = load i32, i32* %7
ret i32 %19
}

LLVM IR (-O2):
define i32 @atomicCAS(i32* nocapture %0, i32 %1, i32 %2) {
%4 = tail call i32 (...) @lock_atom_add()
%5 = load i32, i32* %0
%6 = icmp eq i32 %5, %1
br i1 %6, label %7, label %8
7: ; preds = %3
store i32 %2, i32* %0
br label %8
8: ; preds = %7, %3
%9 = tail call i32 (...) @unlock_atom_add()
ret i32 %5
}
unsigned xrop3_153_0_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  stk1 = D ^ S;
  stk1 = ~stk1;
  return (stk1 & S) | (stk1 & (~T)) | (T & (~S) & D);
}


x86 assembly (clang, -O0):
<xrop3_153_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_153_0_1>:
mov    %edi,%eax
shl    $0x8,%eax
lea    (%rax,%rdi,1),%ecx
mov    %esi,%edx
shl    $0x8,%edx
or     %esi,%edx
xor    %ecx,%eax
xor    $0xffffff00,%ecx
not    %edx
and    %ecx,%edx
not    %edi
and    %esi,%edi
or     %edi,%eax
or     %edx,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_153_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
store i32 %14, i32* %6
%15 = load i8, i8* %4
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 8
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
store i32 %20, i32* %7
%21 = load i32, i32* %5
%22 = load i32, i32* %6
%23 = xor i32 %21, %22
store i32 %23, i32* %8
%24 = load i32, i32* %8
%25 = xor i32 %24, -1
store i32 %25, i32* %8
%26 = load i32, i32* %8
%27 = load i32, i32* %6
%28 = and i32 %26, %27
%29 = load i32, i32* %8
%30 = load i32, i32* %7
%31 = xor i32 %30, -1
%32 = and i32 %29, %31
%33 = or i32 %28, %32
%34 = load i32, i32* %7
%35 = load i32, i32* %6
%36 = xor i32 %35, -1
%37 = and i32 %34, %36
%38 = load i32, i32* %5
%39 = and i32 %37, %38
%40 = or i32 %33, %39
ret i32 %40
}

LLVM IR (-O2):
define i32 @xrop3_153_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = or i32 %4, %3
%6 = zext i8 %1 to i32
%7 = mul nuw nsw i32 %6, 257
%8 = xor i32 %5, -256
%9 = xor i32 %5, %4
%10 = xor i32 %7, -1
%11 = and i32 %8, %10
%12 = xor i32 %3, -1
%13 = and i32 %12, %6
%14 = or i32 %13, %9
%15 = or i32 %14, %11
ret i32 %15
}
/* Type definitions */
typedef int /*<<< orphan*/ siginfo_t;

/* Variables and functions */
int syscall(int, int, int, int /*<<< orphan*/ *, unsigned int);
int sys_pidfd_send_signal(int pidfd, int sig, siginfo_t *info,
                          unsigned int flags) {
  return syscall(-1, pidfd, sig, info, flags);
}


x86 assembly (clang, -O0):
<sys_pidfd_send_signal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%r8d
mov    $0xffffffff,%edi
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_pidfd_send_signal>:
mov    %ecx,%r8d
mov    %rdx,%rcx
mov    %esi,%edx
mov    %edi,%esi
mov    $0xffffffff,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @sys_pidfd_send_signal(i32 %0, i32 %1, i32* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32*, i32** %7
%12 = load i32, i32* %8
%13 = call i32 @syscall(i32 -1, i32 %9, i32 %10, i32* %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @sys_pidfd_send_signal(i32 %0, i32 %1, i32* %2, i32 %3) {
%5 = tail call i32 @syscall(i32 -1, i32 %0, i32 %1, i32* %2, i32 %3)
ret i32 %5
}
int int_mul(long long a, int b) { return a * b; }


x86 assembly (clang, -O0):
<int_mul>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
imul   %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_mul>:
mov    %rdi,%rax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @int_mul(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i64, i64* %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = mul nsw i64 %5, %7
%9 = trunc i64 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @int_mul(i64 %0, i32 %1) {
%3 = trunc i64 %0 to i32
%4 = mul i32 %3, %1
ret i32 %4
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ fd_nrf8001_bond_security_request_error(int);
int /*<<< orphan*/ fd_nrf8001_bond_security_request_success();
void fd_nrf8001_dispatch_bond_security_request_response(
    uint8_t status, uint8_t *response_data __attribute__((unused)),
    uint32_t response_data_length __attribute__((unused))) {
  if (status != 0x00) {
    fd_nrf8001_bond_security_request_error(status);
    return;
  }
  fd_nrf8001_bond_security_request_success();
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1149 <fd_nrf8001_dispatch_bond_security_request_response+0x29>
mov    -0x4(%rbp),%edi
call   1040 <fd_nrf8001_bond_security_request_error@plt>
jmp    1150 <fd_nrf8001_dispatch_bond_security_request_response+0x30>
mov    $0x0,%al
call   1030 <fd_nrf8001_bond_security_request_success@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
test   %edi,%edi
je     1129 <fd_nrf8001_dispatch_bond_security_request_response+0x9>
jmp    1040 <fd_nrf8001_bond_security_request_error@plt>
xor    %eax,%eax
jmp    1030 <fd_nrf8001_bond_security_request_success@plt>

LLVM IR (-O0):
define void @fd_nrf8001_dispatch_bond_security_request_response(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = load i32, i32* %4
%11 = call i32 @fd_nrf8001_bond_security_request_error(i32 %10)
br label %14
12: ; preds = %3
%13 = call i32 (...) @fd_nrf8001_bond_security_request_success()
br label %14
14: ; preds = %12, %9
ret void
}

LLVM IR (-O2):
define void @fd_nrf8001_dispatch_bond_security_request_response(i32 %0, i32* nocapture readnone %1, i32 %2) {
%4 = icmp eq i32 %0, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @fd_nrf8001_bond_security_request_error(i32 %0)
br label %9
7: ; preds = %3
%8 = tail call i32 (...) @fd_nrf8001_bond_security_request_success()
br label %9
9: ; preds = %7, %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, void *);
int /*<<< orphan*/ stderr;
void rtpp_stream_prefill_addr_fin(void *pub) {
  fprintf(stderr,
          "Method rtpp_stream@%p::prefill_addr (rtpp_stream_prefill_addr) is "
          "invoked after destruction\x0a",
          pub);
  abort();
}


x86 assembly (clang, -O0):
<rtpp_stream_prefill_addr_fin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<rtpp_stream_prefill_addr_fin>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [93 x i8] c"Method rtpp_stream@%p::prefill_addr (rtpp_stream_prefill_addr) is invoked after destruction\0A\00"
define void @rtpp_stream_prefill_addr_fin(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([93 x i8], [93 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [93 x i8] c"Method rtpp_stream@%p::prefill_addr (rtpp_stream_prefill_addr) is invoked after destruction\0A\00"
define void @rtpp_stream_prefill_addr_fin(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([93 x i8], [93 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 (...) @abort()
unreachable
}
/* Type definitions */
struct sockaddr_un {
  int dummy;
};
struct sockaddr_in {
  int dummy;
};
typedef int sa_family_t;

/* Variables and functions */
#define AF_INET 129
#define AF_LOCAL 128
int __libc_sa_len(sa_family_t af) {
  switch (af) {
  case AF_INET:
    return sizeof(struct sockaddr_in);
  case AF_LOCAL:
    return sizeof(struct sockaddr_un);
  }
  return 0;
}


x86 assembly (clang, -O0):
<__libc_sa_len>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x80,%eax
je     113c <__libc_sa_len+0x3c>
jmp    111d <__libc_sa_len+0x1d>
mov    -0xc(%rbp),%eax
sub    $0x81,%eax
jne    1148 <__libc_sa_len+0x48>
jmp    1130 <__libc_sa_len+0x30>
movl   $0x4,-0x4(%rbp)
jmp    114f <__libc_sa_len+0x4f>
movl   $0x4,-0x4(%rbp)
jmp    114f <__libc_sa_len+0x4f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__libc_sa_len>:
and    $0xfffffffe,%edi
xor    %eax,%eax
cmp    $0x80,%edi
sete   %al
shl    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @__libc_sa_len(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %7 [
i32 129, label %5
i32 128, label %6
]
5: ; preds = %1
store i32 4, i32* %2
br label %8
6: ; preds = %1
store i32 4, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6, %5
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @__libc_sa_len(i32 %0) {
%2 = and i32 %0, -2
%3 = icmp eq i32 %2, 128
%4 = select i1 %3, i32 4, i32 0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void foo(unsigned int x) {
  if (x != 0x800 && x != 0x810)
    abort();
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x800,-0x4(%rbp)
je     113c <foo+0x2c>
cmpl   $0x810,-0x4(%rbp)
je     113c <foo+0x2c>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
and    $0xffffffef,%edi
cmp    $0x800,%edi
jne    111c <foo+0xc>
ret
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 2048
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp ne i32 %6, 2064
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = call i32 (...) @abort()
unreachable
10: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0) {
%2 = and i32 %0, -17
%3 = icmp eq i32 %2, 2048
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 (...) @abort()
unreachable
6: ; preds = %1
ret void
}
void XOffsetRegion() {}


x86 assembly (clang, -O0):
<XOffsetRegion>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XOffsetRegion>:
ret

LLVM IR (-O0):
define void @XOffsetRegion() {
ret void
}

LLVM IR (-O2):
define void @XOffsetRegion() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ASL16(int /*<<< orphan*/, int);
int /*<<< orphan*/ AbsoluteIndexedXX1(int);
void Op1EM0X1(void) { ASL16(AbsoluteIndexedXX1(3), 0xFFFFFF); }


x86 assembly (clang, -O0):
<Op1EM0X1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <AbsoluteIndexedXX1@plt>
mov    %eax,%edi
mov    $0xffffff,%esi
call   1040 <ASL16@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Op1EM0X1>:
push   %rax
mov    $0x3,%edi
call   1030 <AbsoluteIndexedXX1@plt>
mov    %eax,%edi
mov    $0xffffff,%esi
pop    %rax
jmp    1040 <ASL16@plt>

LLVM IR (-O0):
define void @Op1EM0X1() {
%1 = call i32 @AbsoluteIndexedXX1(i32 3)
%2 = call i32 @ASL16(i32 %1, i32 16777215)
ret void
}

LLVM IR (-O2):
define void @Op1EM0X1() {
%1 = tail call i32 @AbsoluteIndexedXX1(i32 3)
%2 = tail call i32 @ASL16(i32 %1, i32 16777215)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
int put_system_in_got() { system("/bin/ls"); }


x86 assembly (clang, -O0):
<put_system_in_got>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <system@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_system_in_got>:
lea    0xee9(%rip),%rdi
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"/bin/ls\00"
define i32 @put_system_in_got() {
%1 = alloca i32
%2 = call i32 @system(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [8 x i8] c"/bin/ls\00"
define i32 @put_system_in_got() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
int parent(int x) { return x & (x - 1); }


x86 assembly (clang, -O0):
<parent>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parent>:
lea    -0x1(%rdi),%eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @parent(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 %4, 1
%6 = and i32 %3, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @parent(i32 %0) {
%2 = add nsw i32 %0, -1
%3 = and i32 %2, %0
ret i32 %3
}
int CG_API(void) { return 61; }


x86 assembly (clang, -O0):
<CG_API>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3d,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_API>:
mov    $0x3d,%eax
ret

LLVM IR (-O0):
define i32 @CG_API() {
ret i32 61
}

LLVM IR (-O2):
define i32 @CG_API() {
ret i32 61
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  int i = 123, j = 5;
  while (i < 100 && i < 50 && i < 20 && i < 10) {
    if (i == 5)
      printf("1\n");
    i++;
  }
  printf("2\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x7b,-0x8(%rbp)
movl   $0x5,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x64,-0x8(%rbp)
mov    %al,-0xd(%rbp)
jge    1164 <main+0x54>
xor    %eax,%eax
cmpl   $0x32,-0x8(%rbp)
mov    %al,-0xd(%rbp)
jge    1164 <main+0x54>
xor    %eax,%eax
cmpl   $0x14,-0x8(%rbp)
mov    %al,-0xd(%rbp)
jge    1164 <main+0x54>
cmpl   $0xa,-0x8(%rbp)
setl   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1174 <main+0x64>
jmp    1198 <main+0x88>
cmpl   $0x5,-0x8(%rbp)
jne    118a <main+0x7a>
lea    0xe7b(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    112d <main+0x1d>
lea    0xe64(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"1\0A\00"
@.str.1 = [3 x i8] c"2\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 123, i32* %2
store i32 5, i32* %3
br label %4
4: ; preds = %23, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 100
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = load i32, i32* %2
%9 = icmp slt i32 %8, 50
br i1 %9, label %10, label %16
10: ; preds = %7
%11 = load i32, i32* %2
%12 = icmp slt i32 %11, 20
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %2
%15 = icmp slt i32 %14, 10
br label %16
16: ; preds = %13, %10, %7, %4
%17 = phi i1 [ false, %10 ], [ false, %7 ], [ false, %4 ], [ %15, %13 ]
br i1 %17, label %18, label %26
18: ; preds = %16
%19 = load i32, i32* %2
%20 = icmp eq i32 %19, 5
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
br label %23
23: ; preds = %21, %18
%24 = load i32, i32* %2
%25 = add nsw i32 %24, 1
store i32 %25, i32* %2
br label %4
26: ; preds = %16
%27 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [2 x i8] c"2\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ lirerr(int);
void set_region_envelope(void) { lirerr(8888005); }


x86 assembly (clang, -O0):
<set_region_envelope>:
push   %rbp
mov    %rsp,%rbp
mov    $0x879ec5,%edi
call   1030 <lirerr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_region_envelope>:
mov    $0x879ec5,%edi
jmp    1030 <lirerr@plt>

LLVM IR (-O0):
define void @set_region_envelope() {
%1 = call i32 @lirerr(i32 8888005)
ret void
}

LLVM IR (-O2):
define void @set_region_envelope() {
%1 = tail call i32 @lirerr(i32 8888005)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ *fopen(char const *, char const *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
FILE *OpenFileAndCheck(const char *filename, const char *mode) {
  FILE *fp;
  if ((fp = fopen(filename, mode)) == NULL) {
    fprintf(stderr, "[ERROR] Cannot open %s. Now exit to system...\n",
            filename);
    exit(-1);
  }
  return fp;
}


x86 assembly (clang, -O0):
<OpenFileAndCheck>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    117e <OpenFileAndCheck+0x4e>
mov    0x2e7e(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xe91(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OpenFileAndCheck>:
push   %rbx
mov    %rdi,%rbx
call   1040 <fopen@plt>
test   %rax,%rax
je     1140 <OpenFileAndCheck+0x10>
pop    %rbx
ret
mov    0x2e99(%rip),%rax
mov    (%rax),%edi
lea    0xeb0(%rip),%rsi
mov    %rbx,%rdx
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [47 x i8] c"[ERROR] Cannot open %s. Now exit to system...\0A\00"
define i32* @OpenFileAndCheck(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i32* @fopen(i8* %6, i8* %7)
store i32* %8, i32** %5
%9 = icmp eq i32* %8, null
br i1 %9, label %10, label %15
10: ; preds = %2
%11 = load i32, i32* @stderr
%12 = load i8*, i8** %3
%13 = call i32 @fprintf(i32 %11, i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i8* %12)
%14 = call i32 @exit(i32 -1)
unreachable
15: ; preds = %2
%16 = load i32*, i32** %5
ret i32* %16
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [47 x i8] c"[ERROR] Cannot open %s. Now exit to system...\0A\00"
define noalias i32* @OpenFileAndCheck(i8* %0, i8* nocapture %1) {
%3 = tail call i32* @fopen(i8* %0, i8* %1)
%4 = icmp eq i32* %3, null
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i8* %0)
%8 = tail call i32 @exit(i32 -1)
unreachable
9: ; preds = %2
ret i32* %3
}
/* Variables and functions */
int /*<<< orphan*/ varargs_test(char *, char *, char *);
main(int argc, char *argv[]) { varargs_test("%s %s\n", "stdarg.h", "works"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rdi
lea    0xeda(%rip),%rsi
lea    0xedc(%rip),%rdx
call   1030 <varargs_test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xee8(%rip),%rsi
lea    0xeea(%rip),%rdx
call   1030 <varargs_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%s %s\0A\00"
@.str.1 = [9 x i8] c"stdarg.h\00"
@.str.2 = [6 x i8] c"works\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @varargs_test(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%s %s\0A\00"
@.str.1 = [9 x i8] c"stdarg.h\00"
@.str.2 = [6 x i8] c"works\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @varargs_test(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
scalar_t__ in_range(int const, char, float);
scalar_t__ is_digit(int const);
bool is_hexdig(const int c) { return is_digit(c) || in_range(c, 'A', 'F'); }


x86 assembly (clang, -O0):
<is_hexdig>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <is_digit@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1164 <is_hexdig+0x44>
mov    -0x4(%rbp),%edi
mov    $0x41,%esi
movss  0xeab(%rip),%xmm0
call   1040 <in_range@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_hexdig>:
push   %rbx
mov    %edi,%ebx
call   1030 <is_digit@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <is_hexdig+0x17>
pop    %rbx
ret
movss  0xec1(%rip),%xmm0
mov    %ebx,%edi
mov    $0x41,%esi
call   1040 <in_range@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @is_hexdig(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @is_digit(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i64 @in_range(i32 %7, i8 signext 65, float 7.000000e+01)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_hexdig(i32 %0) {
%2 = tail call i64 @is_digit(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @in_range(i32 %0, i8 signext 65, float 7.000000e+01)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
void ScaleRowDown4Box_16_C() {}


x86 assembly (clang, -O0):
<ScaleRowDown4Box_16_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ScaleRowDown4Box_16_C>:
ret

LLVM IR (-O0):
define void @ScaleRowDown4Box_16_C() {
ret void
}

LLVM IR (-O2):
define void @ScaleRowDown4Box_16_C() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_assert(int);
int __VERIFIER_nondet_int();
int main() {
  int i, sn = 0;
  int SIZE = __VERIFIER_nondet_int();
  for (i = 1; i <= SIZE; i++) {
    sn = sn + (1);
  }
  __VERIFIER_assert(sn == SIZE * (1) || sn == 0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x10(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
jg     116a <main+0x4a>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1147 <main+0x27>
mov    -0xc(%rbp),%ecx
mov    -0x10(%rbp),%edx
shl    $0x0,%edx
mov    $0x1,%al
cmp    %edx,%ecx
mov    %al,-0x11(%rbp)
je     118a <main+0x6a>
cmpl   $0x0,-0xc(%rbp)
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <__VERIFIER_assert@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
mov    $0x1,%edi
call   1040 <__VERIFIER_assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %3
%5 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %5, i32* %4
store i32 1, i32* %2
br label %6
6: ; preds = %13, %0
%7 = load i32, i32* %2
%8 = load i32, i32* %4
%9 = icmp sle i32 %7, %8
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %13
13: ; preds = %10
%14 = load i32, i32* %2
%15 = add nsw i32 %14, 1
store i32 %15, i32* %2
br label %6
16: ; preds = %6
%17 = load i32, i32* %3
%18 = load i32, i32* %4
%19 = mul nsw i32 %18, 1
%20 = icmp eq i32 %17, %19
br i1 %20, label %24, label %21
21: ; preds = %16
%22 = load i32, i32* %3
%23 = icmp eq i32 %22, 0
br label %24
24: ; preds = %21, %16
%25 = phi i1 [ true, %16 ], [ %23, %21 ]
%26 = zext i1 %25 to i32
%27 = call i32 @__VERIFIER_assert(i32 %26)
%28 = load i32, i32* %1
ret i32 %28
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 @__VERIFIER_assert(i32 1)
ret i32 0
}
void v7_cpu_resume(void) {}


x86 assembly (clang, -O0):
<v7_cpu_resume>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<v7_cpu_resume>:
ret

LLVM IR (-O0):
define void @v7_cpu_resume() {
ret void
}

LLVM IR (-O2):
define void @v7_cpu_resume() {
ret void
}
float test_expm1f(float x) { return __builtin_expm1f(x); }


x86 assembly (clang, -O0):
<test_expm1f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <expm1f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_expm1f>:
jmp    1030 <expm1f@plt>

LLVM IR (-O0):
define float @test_expm1f(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @expm1f(float %3)
ret float %4
}

LLVM IR (-O2):
define float @test_expm1f(float %0) {
%2 = tail call float @expm1f(float %0)
ret float %2
}
int bitAnd(int a, int b) { return ~((~a) | (~b)); }


x86 assembly (clang, -O0):
<bitAnd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
mov    -0x8(%rbp),%ecx
xor    $0xffffffff,%ecx
or     %ecx,%eax
xor    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitAnd>:
mov    %edi,%eax
and    %esi,%eax
ret

LLVM IR (-O0):
define i32 @bitAnd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = xor i32 %5, -1
%7 = load i32, i32* %4
%8 = xor i32 %7, -1
%9 = or i32 %6, %8
%10 = xor i32 %9, -1
ret i32 %10
}

LLVM IR (-O2):
define i32 @bitAnd(i32 %0, i32 %1) {
%3 = and i32 %1, %0
ret i32 %3
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;
struct TYPE_3__ {
  int /*<<< orphan*/ member_0;
};
typedef TYPE_1__ mbstate_t;

/* Variables and functions */
size_t mbsrtowcs(int /*<<< orphan*/ *, void *, size_t, TYPE_1__ *);
size_t mbstowcs(wchar_t *ws, const char *s, size_t wn) {
  mbstate_t st = {0};
  return mbsrtowcs(ws, (void *)&s, wn, &st);
}


x86 assembly (clang, -O0):
<mbstowcs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    -0x20(%rbp),%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
lea    -0x20(%rbp),%rcx
call   1040 <mbsrtowcs@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mbstowcs>:
sub    $0x18,%rsp
mov    %rsi,0x10(%rsp)
movl   $0x0,0x8(%rsp)
lea    0x10(%rsp),%rsi
lea    0x8(%rsp),%rcx
call   1030 <mbsrtowcs@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.TYPE_3__ = type { i32 }
define i64 @mbstowcs(i32* %0, i8* %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca %struct.TYPE_3__
store i32* %0, i32** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = bitcast %struct.TYPE_3__* %7 to i8*
%9 = load i32*, i32** %4
%10 = bitcast i8** %5 to i8*
%11 = load i64, i64* %6
%12 = call i64 @mbsrtowcs(i32* %9, i8* %10, i64 %11, %struct.TYPE_3__* %7)
ret i64 %12
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i32 }
define i64 @mbstowcs(i32* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca %struct.TYPE_3__
store i8* %1, i8** %4
%6 = bitcast %struct.TYPE_3__* %5 to i8*
%7 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i64 0, i32 0
store i32 0, i32* %7
%8 = bitcast i8** %4 to i8*
%9 = call i64 @mbsrtowcs(i32* %0, i8* %8, i64 %2, %struct.TYPE_3__* %5)
ret i64 %9
}
/* Variables and functions */
int /*<<< orphan*/ outbyte(char);
void outindleft() { outbyte('['); }


x86 assembly (clang, -O0):
<outindleft>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5b,%edi
call   1030 <outbyte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<outindleft>:
mov    $0x5b,%edi
jmp    1030 <outbyte@plt>

LLVM IR (-O0):
define void @outindleft() {
%1 = call i32 @outbyte(i8 signext 91)
ret void
}

LLVM IR (-O2):
define void @outindleft() {
%1 = tail call i32 @outbyte(i8 signext 91)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ PICA_debug3(char *, unsigned char, void *);
unsigned int procmsg_dummy_multi_c2n(unsigned char *buf, unsigned int size,
                                     void *ptr) {
  PICA_debug3("message %X from %p is handled by dummy procmsg", buf[0], ptr);
  return 1;
}


x86 assembly (clang, -O0):
<procmsg_dummy_multi_c2n>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    -0x18(%rbp),%rdx
lea    0xecc(%rip),%rdi
movzbl %al,%esi
call   1030 <PICA_debug3@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<procmsg_dummy_multi_c2n>:
push   %rax
movzbl (%rdi),%esi
lea    0xee5(%rip),%rdi
call   1030 <PICA_debug3@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"message %X from %p is handled by dummy procmsg\00"
define i32 @procmsg_dummy_multi_c2n(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = getelementptr inbounds i8, i8* %7, i64 0
%9 = load i8, i8* %8
%10 = load i8*, i8** %6
%11 = call i32 @PICA_debug3(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i8 zeroext %9, i8* %10)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"message %X from %p is handled by dummy procmsg\00"
define i32 @procmsg_dummy_multi_c2n(i8* nocapture %0, i32 %1, i8* %2) {
%4 = load i8, i8* %0
%5 = tail call i32 @PICA_debug3(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i8 zeroext %4, i8* %2)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ initAnalogPins();
int /*<<< orphan*/ initDigitalInputPins();
int /*<<< orphan*/ initDigitalOutputPins();
void hwInitPins(void) {
  initAnalogPins();
  initDigitalInputPins();
  initDigitalOutputPins();
}


x86 assembly (clang, -O0):
<hwInitPins>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <initAnalogPins@plt>
mov    $0x0,%al
call   1030 <initDigitalInputPins@plt>
mov    $0x0,%al
call   1040 <initDigitalOutputPins@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hwInitPins>:
push   %rax
xor    %eax,%eax
call   1050 <initAnalogPins@plt>
xor    %eax,%eax
call   1030 <initDigitalInputPins@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <initDigitalOutputPins@plt>

LLVM IR (-O0):
define void @hwInitPins() {
%1 = call i32 (...) @initAnalogPins()
%2 = call i32 (...) @initDigitalInputPins()
%3 = call i32 (...) @initDigitalOutputPins()
ret void
}

LLVM IR (-O2):
define void @hwInitPins() {
%1 = tail call i32 (...) @initAnalogPins()
%2 = tail call i32 (...) @initDigitalInputPins()
%3 = tail call i32 (...) @initDigitalOutputPins()
ret void
}
/* Type definitions */
struct timeb {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ftime(struct timeb *);
void touchatag_time_begin_count(struct timeb *time_data) { ftime(time_data); }


x86 assembly (clang, -O0):
<touchatag_time_begin_count>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ftime@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<touchatag_time_begin_count>:
jmp    1030 <ftime@plt>

LLVM IR (-O0):
%struct.timeb = type { i32 }
define void @touchatag_time_begin_count(%struct.timeb* %0) {
%2 = alloca %struct.timeb*
store %struct.timeb* %0, %struct.timeb** %2
%3 = load %struct.timeb*, %struct.timeb** %2
%4 = call i32 @ftime(%struct.timeb* %3)
ret void
}

LLVM IR (-O2):
%struct.timeb = type { i32 }
define void @touchatag_time_begin_count(%struct.timeb* %0) {
%2 = tail call i32 @ftime(%struct.timeb* %0)
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *sys_malloc_wrapper(size_t size, void *pvt) { return malloc(size); }


x86 assembly (clang, -O0):
<sys_malloc_wrapper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_malloc_wrapper>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @sys_malloc_wrapper(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
%5 = load i64, i64* %3
%6 = call i8* @malloc(i64 %5)
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @sys_malloc_wrapper(i64 %0, i8* nocapture readnone %1) {
%3 = tail call i8* @malloc(i64 %0)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ E();
int /*<<< orphan*/ QP();
int /*<<< orphan*/ printf(char *);
void Q() {
  printf("Q -> EQ'\n");
  E();
  QP();
}


x86 assembly (clang, -O0):
<Q>:
push   %rbp
mov    %rsp,%rbp
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <E@plt>
mov    $0x0,%al
call   1050 <QP@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Q>:
push   %rax
lea    0xec8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <E@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <QP@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"Q -> EQ'\0A\00"
define void @Q() {
%1 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @E()
%3 = call i32 (...) @QP()
ret void
}

LLVM IR (-O2):
@str = [9 x i8] c"Q -> EQ'\00"
define void @Q() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @E()
%3 = tail call i32 (...) @QP()
ret void
}
__attribute__((no, noclone)) unsigned __int128 t154_3sub(signed __int128 y) {
  unsigned __int128 r;
  if (__builtin_sub_overflow((unsigned __int128)(5), y, &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t154_3sub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    %rsi,%rax
sar    $0x3f,%rax
xor    %ecx,%ecx
mov    $0x5,%edx
sub    %rdi,%rdx
mov    %ecx,%r9d
mov    %r9,%rcx
sbb    %rsi,%rcx
mov    %r9,%r8
sbb    %rax,%r8
sbb    %rax,%r9
mov    %r8d,%eax
and    $0x1,%eax
mov    %eax,%esi
mov    %rsi,%rax
neg    %rax
mov    %rax,%rdi
xor    %r9,%rdi
xor    %r8,%rax
or     %rdi,%rax
or     %rsi,%rax
setne  %al
mov    %rdx,-0x40(%rbp)
mov    %rcx,-0x38(%rbp)
test   $0x1,%al
jne    1190 <t154_3sub+0x80>
jmp    1197 <t154_3sub+0x87>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t154_3sub>:
push   %r14
push   %rbx
push   %rax
xor    %r14d,%r14d
mov    $0x5,%ebx
sub    %rdi,%rbx
sbb    %rsi,%r14
cmp    $0x6,%rdi
sbb    $0x0,%rsi
jl     1133 <t154_3sub+0x23>
xor    %eax,%eax
call   1030 <bar@plt>
mov    %rbx,%rax
mov    %r14,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define { i64, i64 } @t154_3sub(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = bitcast i128* %4 to { i64, i64 }*
%8 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 0
store i64 %0, i64* %8
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 1
store i64 %1, i64* %9
%10 = load i128, i128* %4
store i128 %10, i128* %5
%11 = load i128, i128* %5
%12 = sext i128 %11 to i129
%13 = call { i129, i1 } @llvm.ssub.with.overflow.i129(i129 5, i129 %12)
%14 = extractvalue { i129, i1 } %13, 1
%15 = extractvalue { i129, i1 } %13, 0
%16 = trunc i129 %15 to i128
%17 = zext i128 %16 to i129
%18 = icmp ne i129 %15, %17
%19 = or i1 %14, %18
store i128 %16, i128* %6
br i1 %19, label %20, label %22
20: ; preds = %2
%21 = call i32 (...) @bar()
br label %22
22: ; preds = %20, %2
%23 = load i128, i128* %6
store i128 %23, i128* %3
%24 = bitcast i128* %3 to { i64, i64 }*
%25 = load { i64, i64 }, { i64, i64 }* %24
ret { i64, i64 } %25
}

LLVM IR (-O2):
define { i64, i64 } @t154_3sub(i64 %0, i64 %1) {
%3 = zext i64 %1 to i128
%4 = shl nuw i128 %3, 64
%5 = zext i64 %0 to i128
%6 = or i128 %4, %5
%7 = zext i128 %6 to i129
%8 = sub nsw i129 5, %7
%9 = icmp sgt i128 %6, 5
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = tail call i32 (...) @bar()
br label %12
12: ; preds = %10, %2
%13 = trunc i129 %8 to i64
%14 = lshr i129 %8, 64
%15 = trunc i129 %14 to i64
%16 = insertvalue { i64, i64 } poison, i64 %13, 0
%17 = insertvalue { i64, i64 } %16, i64 %15, 1
ret { i64, i64 } %17
}
void device_not_available() {
  __asm__ __volatile__("cli");
  SetTextColor(0x04 | 0x08, 0x00);
  kprintf("\nERROR: device_not_available\n");
  do {
    __asm__ __volatile__("cli  \n\t"
                         "hlt");
  } while (1 == 1);
}


x86 assembly (clang, -O0):
<device_not_available>:
push   %rbp
mov    %rsp,%rbp
cli
mov    $0xc,%edi
xor    %esi,%esi
mov    $0x0,%al
call   1030 <SetTextColor@plt>
lea    0xec6(%rip),%rdi
mov    $0x0,%al
call   1040 <kprintf@plt>
cli
hlt
mov    $0x1,%al
test   $0x1,%al
jne    1141 <device_not_available+0x21>
jmp    1152 <device_not_available+0x32>
pop    %rbp
ret

x86 assembly (clang, -O2):
<device_not_available>:
push   %rax
cli
mov    $0xc,%edi
xor    %esi,%esi
xor    %eax,%eax
call   1030 <SetTextColor@plt>
lea    0xec9(%rip),%rdi
xor    %eax,%eax
call   1040 <kprintf@plt>
xchg   %ax,%ax
cli
hlt
jmp    1140 <device_not_available+0x20>

LLVM IR (-O0):
@.str = [30 x i8] c"\0AERROR: device_not_available\0A\00"
define void @device_not_available() {
%1 = call i32 (i32, i32, ...) bitcast (i32 (...)* @SetTextColor to i32 (i32, i32, ...)*)(i32 12, i32 0)
%2 = call i32 (i8*, ...) bitcast (i32 (...)* @kprintf to i32 (i8*, ...)*)(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
br label %3
3: ; preds = %4, %0
br label %4
4: ; preds = %3
br i1 true, label %3, label %5
5: ; preds = %4
ret void
}

LLVM IR (-O2):
@.str = [30 x i8] c"\0AERROR: device_not_available\0A\00"
define void @device_not_available() {
tail call void asm sideeffect "cli", "~{dirflag},~{fpsr},~{flags}"()
%1 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @SetTextColor to i32 (i32, i32, ...)*)(i32 12, i32 0)
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @kprintf to i32 (i8*, ...)*)(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
br label %3
3: ; preds = %3, %0
tail call void asm sideeffect "cli \0A\09hlt", "~{dirflag},~{fpsr},~{flags}"()
br label %3
}
/* Variables and functions */
int /*<<< orphan*/ __gnat_decode(char const *, char *, int /*<<< orphan*/);
char *xstrdup(char *);
char *ada_demangle(const char *coded_name) {
  char ada_name[2048];
  __gnat_decode(coded_name, ada_name, 0);
  return xstrdup(ada_name);
}


x86 assembly (clang, -O0):
<ada_demangle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x810,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x810(%rbp),%rsi
xor    %edx,%edx
call   1030 <__gnat_decode@plt>
lea    -0x810(%rbp),%rdi
call   1040 <xstrdup@plt>
add    $0x810,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ada_demangle>:
push   %rbx
sub    $0x800,%rsp
mov    %rsp,%rbx
mov    %rbx,%rsi
xor    %edx,%edx
call   1030 <__gnat_decode@plt>
mov    %rbx,%rdi
call   1040 <xstrdup@plt>
add    $0x800,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i8* @ada_demangle(i8* %0) {
%2 = alloca i8*
%3 = alloca [2048 x i8]
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds [2048 x i8], [2048 x i8]* %3, i64 0, i64 0
%6 = call i32 @__gnat_decode(i8* %4, i8* %5, i32 0)
%7 = getelementptr inbounds [2048 x i8], [2048 x i8]* %3, i64 0, i64 0
%8 = call i8* @xstrdup(i8* %7)
ret i8* %8
}

LLVM IR (-O2):
define i8* @ada_demangle(i8* %0) {
%2 = alloca [2048 x i8]
%3 = getelementptr inbounds [2048 x i8], [2048 x i8]* %2, i64 0, i64 0
%4 = call i32 @__gnat_decode(i8* %0, i8* %3, i32 0)
%5 = call i8* @xstrdup(i8* %3)
ret i8* %5
}