#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
int /*<<< orphan*/ UARTDisable(int);
int /*<<< orphan*/ UARTEnable(int);
int _UARTBaseValid(int);
void UARTConfigSetExpClk(uint32_t ui32Base, uint32_t ui32UARTClk,
                         uint32_t ui32Baud, uint32_t ui32Config) {
  uint32_t ui32Div;
  ASSERT(_UARTBaseValid(ui32Base));
  ASSERT(ui32Baud != 0);
  ASSERT(ui32UARTClk >= (ui32Baud * 8));
  UARTDisable(ui32Base);
  if ((ui32Baud * 16) > ui32UARTClk) {
    (*((volatile uint32_t *)(ui32Base + 0x00000030))) |= 0x00000020;
    ui32Baud /= 2;
  } else {
    (*((volatile uint32_t *)(ui32Base + 0x00000030))) &= ~(0x00000020);
  }
  ui32Div = (((ui32UARTClk * 8) / ui32Baud) + 1) / 2;
  (*((volatile uint32_t *)(ui32Base + 0x00000024))) = ui32Div / 64;
  (*((volatile uint32_t *)(ui32Base + 0x00000028))) = ui32Div % 64;
  (*((volatile uint32_t *)(ui32Base + 0x0000002C))) = ui32Config;
  (*((volatile uint32_t *)(ui32Base + 0x00000018))) = 0;
  UARTEnable(ui32Base);
}


x86 assembly (clang, -O0):
<UARTConfigSetExpClk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1060 <ASSERT@plt>
cmpl   $0x0,-0xc(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1060 <ASSERT@plt>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    $0x3,%ecx
cmp    %ecx,%eax
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1060 <ASSERT@plt>
mov    -0x4(%rbp),%edi
call   1040 <UARTDisable@plt>
mov    -0xc(%rbp),%eax
shl    $0x4,%eax
cmp    -0x8(%rbp),%eax
jle    11c5 <UARTConfigSetExpClk+0x85>
mov    -0x4(%rbp),%eax
add    $0x30,%eax
cltq
mov    (%rax),%ecx
or     $0x20,%ecx
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
jmp    11d4 <UARTConfigSetExpClk+0x94>
mov    -0x4(%rbp),%eax
add    $0x30,%eax
cltq
mov    (%rax),%ecx
and    $0xffffffdf,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%eax
shl    $0x3,%eax
cltd
idivl  -0xc(%rbp)
add    $0x1,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    $0x40,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
add    $0x24,%eax
cltq
mov    %ecx,(%rax)
mov    -0x14(%rbp),%eax
mov    $0x40,%ecx
cltd
idiv   %ecx
mov    -0x4(%rbp),%eax
add    $0x28,%eax
cltq
mov    %edx,(%rax)
mov    -0x10(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x2c,%eax
cltq
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
add    $0x18,%eax
cltq
movl   $0x0,(%rax)
mov    -0x4(%rbp),%edi
call   1050 <UARTEnable@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTConfigSetExpClk>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%r14d
mov    %edx,%ebx
mov    %esi,%ebp
mov    %edi,%r15d
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1060 <ASSERT@plt>
xor    %edi,%edi
test   %ebx,%ebx
setne  %dil
call   1060 <ASSERT@plt>
lea    0x0(,%rbx,8),%eax
xor    %edi,%edi
cmp    %ebp,%eax
setle  %dil
call   1060 <ASSERT@plt>
mov    %r15d,%edi
call   1040 <UARTDisable@plt>
mov    %ebx,%ecx
shl    $0x4,%ecx
movslq %r15d,%rdi
mov    0x30(%rdi),%eax
cmp    %ebp,%ecx
jle    11a8 <UARTConfigSetExpClk+0x68>
or     $0x20,%eax
mov    %eax,0x30(%rdi)
mov    %ebx,%eax
shr    $0x1f,%eax
add    %ebx,%eax
sar    %eax
mov    %eax,%ebx
jmp    11ae <UARTConfigSetExpClk+0x6e>
and    $0xffffffdf,%eax
mov    %eax,0x30(%rdi)
shl    $0x3,%ebp
mov    %ebp,%eax
cltd
idiv   %ebx
lea    0x1(%rax),%ecx
mov    %ecx,%edx
shr    $0x1f,%edx
add    %eax,%edx
add    $0x1,%edx
sar    %edx
sub    $0xffffff80,%eax
test   %ecx,%ecx
cmovns %ecx,%eax
sar    $0x7,%eax
mov    %eax,0x24(%rdi)
lea    0x3f(%rdx),%eax
test   %edx,%edx
cmovns %edx,%eax
and    $0xffffffc0,%eax
sub    %eax,%edx
mov    %edx,0x28(%rdi)
mov    %r14d,0x2c(%rdi)
movl   $0x0,0x18(%rdi)
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1050 <UARTEnable@plt>

LLVM IR (-O0):
define void @UARTConfigSetExpClk(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %5
%11 = call i32 @_UARTBaseValid(i32 %10)
%12 = call i32 @ASSERT(i32 %11)
%13 = load i32, i32* %7
%14 = icmp ne i32 %13, 0
%15 = zext i1 %14 to i32
%16 = call i32 @ASSERT(i32 %15)
%17 = load i32, i32* %6
%18 = load i32, i32* %7
%19 = mul nsw i32 %18, 8
%20 = icmp sge i32 %17, %19
%21 = zext i1 %20 to i32
%22 = call i32 @ASSERT(i32 %21)
%23 = load i32, i32* %5
%24 = call i32 @UARTDisable(i32 %23)
%25 = load i32, i32* %7
%26 = mul nsw i32 %25, 16
%27 = load i32, i32* %6
%28 = icmp sgt i32 %26, %27
br i1 %28, label %29, label %38
29: ; preds = %4
%30 = load i32, i32* %5
%31 = add nsw i32 %30, 48
%32 = sext i32 %31 to i64
%33 = inttoptr i64 %32 to i32*
%34 = load volatile i32, i32* %33
%35 = or i32 %34, 32
store volatile i32 %35, i32* %33
%36 = load i32, i32* %7
%37 = sdiv i32 %36, 2
store i32 %37, i32* %7
br label %45
38: ; preds = %4
%39 = load i32, i32* %5
%40 = add nsw i32 %39, 48
%41 = sext i32 %40 to i64
%42 = inttoptr i64 %41 to i32*
%43 = load volatile i32, i32* %42
%44 = and i32 %43, -33
store volatile i32 %44, i32* %42
br label %45
45: ; preds = %38, %29
%46 = load i32, i32* %6
%47 = mul nsw i32 %46, 8
%48 = load i32, i32* %7
%49 = sdiv i32 %47, %48
%50 = add nsw i32 %49, 1
%51 = sdiv i32 %50, 2
store i32 %51, i32* %9
%52 = load i32, i32* %9
%53 = sdiv i32 %52, 64
%54 = load i32, i32* %5
%55 = add nsw i32 %54, 36
%56 = sext i32 %55 to i64
%57 = inttoptr i64 %56 to i32*
store volatile i32 %53, i32* %57
%58 = load i32, i32* %9
%59 = srem i32 %58, 64
%60 = load i32, i32* %5
%61 = add nsw i32 %60, 40
%62 = sext i32 %61 to i64
%63 = inttoptr i64 %62 to i32*
store volatile i32 %59, i32* %63
%64 = load i32, i32* %8
%65 = load i32, i32* %5
%66 = add nsw i32 %65, 44
%67 = sext i32 %66 to i64
%68 = inttoptr i64 %67 to i32*
store volatile i32 %64, i32* %68
%69 = load i32, i32* %5
%70 = add nsw i32 %69, 24
%71 = sext i32 %70 to i64
%72 = inttoptr i64 %71 to i32*
store volatile i32 0, i32* %72
%73 = load i32, i32* %5
%74 = call i32 @UARTEnable(i32 %73)
ret void
}

LLVM IR (-O2):
define void @UARTConfigSetExpClk(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @_UARTBaseValid(i32 %0)
%6 = tail call i32 @ASSERT(i32 %5)
%7 = icmp ne i32 %2, 0
%8 = zext i1 %7 to i32
%9 = tail call i32 @ASSERT(i32 %8)
%10 = shl nsw i32 %2, 3
%11 = icmp sle i32 %10, %1
%12 = zext i1 %11 to i32
%13 = tail call i32 @ASSERT(i32 %12)
%14 = tail call i32 @UARTDisable(i32 %0)
%15 = shl nsw i32 %2, 4
%16 = icmp sgt i32 %15, %1
%17 = add nsw i32 %0, 48
%18 = sext i32 %17 to i64
%19 = inttoptr i64 %18 to i32*
%20 = load volatile i32, i32* %19
br i1 %16, label %21, label %24
21: ; preds = %4
%22 = or i32 %20, 32
store volatile i32 %22, i32* %19
%23 = sdiv i32 %2, 2
br label %26
24: ; preds = %4
%25 = and i32 %20, -33
store volatile i32 %25, i32* %19
br label %26
26: ; preds = %24, %21
%27 = phi i32 [ %23, %21 ], [ %2, %24 ]
%28 = shl nsw i32 %1, 3
%29 = sdiv i32 %28, %27
%30 = add nsw i32 %29, 1
%31 = sdiv i32 %30, 2
%32 = sdiv i32 %30, 128
%33 = add nsw i32 %0, 36
%34 = sext i32 %33 to i64
%35 = inttoptr i64 %34 to i32*
store volatile i32 %32, i32* %35
%36 = srem i32 %31, 64
%37 = add nsw i32 %0, 40
%38 = sext i32 %37 to i64
%39 = inttoptr i64 %38 to i32*
store volatile i32 %36, i32* %39
%40 = add nsw i32 %0, 44
%41 = sext i32 %40 to i64
%42 = inttoptr i64 %41 to i32*
store volatile i32 %3, i32* %42
%43 = add nsw i32 %0, 24
%44 = sext i32 %43 to i64
%45 = inttoptr i64 %44 to i32*
store volatile i32 0, i32* %45
%46 = tail call i32 @UARTEnable(i32 %0)
ret void
}