xunge/DecIR huggingface dataset:
/* Variables and functions */
char m2_parser_get_c();
int /*<<< orphan*/ m2_parser_inc_str();
void m2_parser_skip_space(void) {
  register char c;
  for (;;) {
    c = m2_parser_get_c();
    if (c == '\0')
      break;
    if (c > ' ')
      break;
    m2_parser_inc_str();
  }
}


x86 assembly (clang, -O0):
<m2_parser_skip_space>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <m2_parser_get_c@plt>
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x0,%eax
jne    1144 <m2_parser_skip_space+0x24>
jmp    1162 <m2_parser_skip_space+0x42>
movsbl -0x1(%rbp),%eax
cmp    $0x20,%eax
jle    1156 <m2_parser_skip_space+0x36>
jmp    1162 <m2_parser_skip_space+0x42>
mov    $0x0,%al
call   1040 <m2_parser_inc_str@plt>
jmp    1128 <m2_parser_skip_space+0x8>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m2_parser_skip_space>:
push   %rax
xor    %eax,%eax
call   1030 <m2_parser_get_c@plt>
test   %al,%al
je     1146 <m2_parser_skip_space+0x26>
cmp    $0x20,%al
jg     1146 <m2_parser_skip_space+0x26>
xor    %eax,%eax
call   1040 <m2_parser_inc_str@plt>
xor    %eax,%eax
call   1030 <m2_parser_get_c@plt>
test   %al,%al
je     1146 <m2_parser_skip_space+0x26>
cmp    $0x21,%al
jl     1130 <m2_parser_skip_space+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @m2_parser_skip_space() {
%1 = alloca i8
br label %2
2: ; preds = %13, %0
%3 = call signext i8 (...) @m2_parser_get_c()
store i8 %3, i8* %1
%4 = load i8, i8* %1
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %2
br label %15
8: ; preds = %2
%9 = load i8, i8* %1
%10 = sext i8 %9 to i32
%11 = icmp sgt i32 %10, 32
br i1 %11, label %12, label %13
12: ; preds = %8
br label %15
13: ; preds = %8
%14 = call i32 (...) @m2_parser_inc_str()
br label %2
15: ; preds = %12, %7
ret void
}

LLVM IR (-O2):
define void @m2_parser_skip_space() {
%1 = tail call signext i8 (...) @m2_parser_get_c()
%2 = icmp eq i8 %1, 0
%3 = icmp sgt i8 %1, 32
%4 = or i1 %2, %3
br i1 %4, label %11, label %5
5: ; preds = %0, %5
%6 = tail call i32 (...) @m2_parser_inc_str()
%7 = tail call signext i8 (...) @m2_parser_get_c()
%8 = icmp eq i8 %7, 0
%9 = icmp sgt i8 %7, 32
%10 = or i1 %8, %9
br i1 %10, label %11, label %5
11: ; preds = %5, %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dis_term_unix();
void dis_term(void) { dis_term_unix(); }


x86 assembly (clang, -O0):
<dis_term>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <dis_term_unix@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dis_term>:
xor    %eax,%eax
jmp    1030 <dis_term_unix@plt>

LLVM IR (-O0):
define void @dis_term() {
%1 = call i32 (...) @dis_term_unix()
ret void
}

LLVM IR (-O2):
define void @dis_term() {
%1 = tail call i32 (...) @dis_term_unix()
ret void
}
/* Variables and functions */
double sqrt(double);
double get_fade_out_volume(double t0, double t, double t1) {
  t = (t / ((t1 - t0) / 2.0)) - 1.0;
  return sqrt(0.5 * (1.0 - t));
}


x86 assembly (clang, -O0):
<get_fade_out_volume>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
subsd  -0x8(%rbp),%xmm1
movsd  0xed2(%rip),%xmm2
divsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
movsd  0xeba(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xea9(%rip),%xmm1
subsd  -0x10(%rbp),%xmm1
movsd  0xe94(%rip),%xmm0
mulsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_fade_out_volume>:
subsd  %xmm0,%xmm2
movsd  0xee4(%rip),%xmm3
mulsd  %xmm3,%xmm2
divsd  %xmm2,%xmm1
addsd  0xedc(%rip),%xmm1
movsd  0xedc(%rip),%xmm0
subsd  %xmm1,%xmm0
mulsd  %xmm3,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     114b <get_fade_out_volume+0x3b>
sqrtsd %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @get_fade_out_volume(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %5
%8 = load double, double* %6
%9 = load double, double* %4
%10 = fsub double %8, %9
%11 = fdiv double %10, 2.000000e+00
%12 = fdiv double %7, %11
%13 = fsub double %12, 1.000000e+00
store double %13, double* %5
%14 = load double, double* %5
%15 = fsub double 1.000000e+00, %14
%16 = fmul double 5.000000e-01, %15
%17 = call double @sqrt(double %16)
ret double %17
}

LLVM IR (-O2):
define double @get_fade_out_volume(double %0, double %1, double %2) {
%4 = fsub double %2, %0
%5 = fmul double %4, 5.000000e-01
%6 = fdiv double %1, %5
%7 = fadd double %6, -1.000000e+00
%8 = fsub double 1.000000e+00, %7
%9 = fmul double %8, 5.000000e-01
%10 = tail call double @sqrt(double %9)
ret double %10
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *, int /*<<< orphan*/);
int create_quaddobl_homotopy(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc(182, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<create_quaddobl_homotopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0xb6,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_quaddobl_homotopy>:
mov    $0xb6,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @create_quaddobl_homotopy() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 182, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @create_quaddobl_homotopy() {
%1 = tail call i32 @_ada_use_c2phc(i32 182, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ ASL16(int /*<<< orphan*/, int);
int /*<<< orphan*/ SA1Direct(int);
void Op06M0(void) { ASL16(SA1Direct(3), 0xFFFF); }


x86 assembly (clang, -O0):
<Op06M0>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <SA1Direct@plt>
mov    %eax,%edi
mov    $0xffff,%esi
call   1040 <ASL16@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Op06M0>:
push   %rax
mov    $0x3,%edi
call   1030 <SA1Direct@plt>
mov    %eax,%edi
mov    $0xffff,%esi
pop    %rax
jmp    1040 <ASL16@plt>

LLVM IR (-O0):
define void @Op06M0() {
%1 = call i32 @SA1Direct(i32 3)
%2 = call i32 @ASL16(i32 %1, i32 65535)
ret void
}

LLVM IR (-O2):
define void @Op06M0() {
%1 = tail call i32 @SA1Direct(i32 3)
%2 = tail call i32 @ASL16(i32 %1, i32 65535)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ notify_pvcall(char *);
int pvCaptureFrameWithTimeStamp(char byBoardNum, void **hEvent,
                                char bContinuous, char byInterruptMode,
                                char byNumFrames, long dwPhysAddr,
                                long dwLinAddr, long *pTimeStampLo,
                                long *pTimeStampHi) {
  notify_pvcall("f");
  return (0);
}


x86 assembly (clang, -O0):
<pvCaptureFrameWithTimeStamp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %r8b,%al
mov    0x20(%rbp),%r8
mov    0x18(%rbp),%r8
mov    0x10(%rbp),%r8
mov    %dil,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %dl,-0x11(%rbp)
mov    %cl,-0x12(%rbp)
mov    %al,-0x13(%rbp)
mov    %r9,-0x20(%rbp)
lea    0xebd(%rip),%rdi
call   1030 <notify_pvcall@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pvCaptureFrameWithTimeStamp>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <notify_pvcall@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"f\00"
define i32 @pvCaptureFrameWithTimeStamp(i8 signext %0, i8** %1, i8 signext %2, i8 signext %3, i8 signext %4, i64 %5, i64 %6, i64* %7, i64* %8) {
%10 = alloca i8
%11 = alloca i8**
%12 = alloca i8
%13 = alloca i8
%14 = alloca i8
%15 = alloca i64
%16 = alloca i64
%17 = alloca i64*
%18 = alloca i64*
store i8 %0, i8* %10
store i8** %1, i8*** %11
store i8 %2, i8* %12
store i8 %3, i8* %13
store i8 %4, i8* %14
store i64 %5, i64* %15
store i64 %6, i64* %16
store i64* %7, i64** %17
store i64* %8, i64** %18
%19 = call i32 @notify_pvcall(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [2 x i8] c"f\00"
define i32 @pvCaptureFrameWithTimeStamp(i8 signext %0, i8** nocapture readnone %1, i8 signext %2, i8 signext %3, i8 signext %4, i64 %5, i64 %6, i64* nocapture readnone %7, i64* nocapture readnone %8) {
%10 = tail call i32 @notify_pvcall(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0x7f() {
  Assert_real((isalnum(127) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              640, ("isalnum should be 0 for 0x7f"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x7f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7f,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x280,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x7f>:
push   %rax
mov    $0x7f,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x280,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x7f\00"
define void @t_isalnum_0x7f() {
%1 = call i64 @isalnum(i32 127)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 640, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x7f\00"
define void @t_isalnum_0x7f() {
%1 = tail call i64 @isalnum(i32 127)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 640, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int isAlpha(char c) {
  return (('a' <= c && c <= 'z') || ('A' <= c && c <= 'Z'));
}


x86 assembly (clang, -O0):
<isAlpha>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x61,%eax
cmp    %ecx,%eax
jg     112d <isAlpha+0x2d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x7a,%ecx
mov    %al,-0x2(%rbp)
jle    1156 <isAlpha+0x56>
movsbl -0x1(%rbp),%edx
xor    %eax,%eax
mov    $0x41,%ecx
cmp    %edx,%ecx
mov    %al,-0x3(%rbp)
jg     1150 <isAlpha+0x50>
movsbl -0x1(%rbp),%eax
cmp    $0x5a,%eax
setle  %al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isAlpha>:
and    $0xdf,%dil
add    $0xbf,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @isAlpha(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sle i32 97, %4
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 122
br i1 %9, label %20, label %10
10: ; preds = %6, %1
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp sle i32 65, %12
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp sle i32 %16, 90
br label %18
18: ; preds = %14, %10
%19 = phi i1 [ false, %10 ], [ %17, %14 ]
br label %20
20: ; preds = %18, %6
%21 = phi i1 [ true, %6 ], [ %19, %18 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @isAlpha(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ watch_dir_setbusy();
void child_SIGUSR1(__attribute__((unused)) int sig) { watch_dir_setbusy(); }


x86 assembly (clang, -O0):
<child_SIGUSR1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <watch_dir_setbusy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<child_SIGUSR1>:
xor    %eax,%eax
jmp    1030 <watch_dir_setbusy@plt>

LLVM IR (-O0):
define void @child_SIGUSR1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @watch_dir_setbusy()
ret void
}

LLVM IR (-O2):
define void @child_SIGUSR1(i32 %0) {
%2 = tail call i32 (...) @watch_dir_setbusy()
ret void
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int U_PMF_IE_TINT_get(char const *, int *, int *, char const *);
int /*<<< orphan*/ printf(char *, int, int);
int U_PMF_IE_TINT_print(const char *contents, const char *blimit) {
  int32_t Hue, Amount;
  int status = U_PMF_IE_TINT_get(contents, &Hue, &Amount, blimit);
  if (status) {
    printf("TintEffect Hue:%d Amount:%d\n", Hue, Amount);
  }
  return (status);
}


x86 assembly (clang, -O0):
<U_PMF_IE_TINT_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1040 <U_PMF_IE_TINT_get@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
je     1164 <U_PMF_IE_TINT_print+0x44>
mov    -0x14(%rbp),%esi
mov    -0x18(%rbp),%edx
lea    0xea1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_PMF_IE_TINT_print>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rcx
lea    0xc(%rsp),%rsi
lea    0x8(%rsp),%rdx
call   1040 <U_PMF_IE_TINT_get@plt>
mov    %eax,%ebx
test   %eax,%eax
je     1151 <U_PMF_IE_TINT_print+0x31>
mov    0xc(%rsp),%esi
mov    0x8(%rsp),%edx
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"TintEffect Hue:%d Amount:%d\0A\00"
define i32 @U_PMF_IE_TINT_print(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%8 = load i8*, i8** %3
%9 = load i8*, i8** %4
%10 = call i32 @U_PMF_IE_TINT_get(i8* %8, i32* %5, i32* %6, i8* %9)
store i32 %10, i32* %7
%11 = load i32, i32* %7
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %2
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %14, i32 %15)
br label %17
17: ; preds = %13, %2
%18 = load i32, i32* %7
ret i32 %18
}

LLVM IR (-O2):
@.str = [29 x i8] c"TintEffect Hue:%d Amount:%d\0A\00"
define i32 @U_PMF_IE_TINT_print(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %3 to i8*
%6 = bitcast i32* %4 to i8*
%7 = call i32 @U_PMF_IE_TINT_get(i8* %0, i32* %3, i32* %4, i8* %1)
%8 = icmp eq i32 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %2
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %10, i32 %11)
br label %13
13: ; preds = %9, %2
ret i32 %7
}
/* Type definitions */
struct itstree_node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ do_record_new_rule(struct itstree_node *, int const *,
                                      size_t, int /*<<< orphan*/, size_t,
                                      size_t, size_t);
void record_its(struct itstree_node *itst, const int *its, size_t sz,
                size_t rc30, size_t rc50, size_t rc70) {
  do_record_new_rule(itst, its, sz, 0, rc30, rc50, rc70);
}


x86 assembly (clang, -O0):
<record_its>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%r8
mov    -0x28(%rbp),%r9
mov    -0x30(%rbp),%rax
xor    %ecx,%ecx
mov    %rax,(%rsp)
call   1030 <do_record_new_rule@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<record_its>:
push   %rax
mov    %r8,%rax
mov    %rcx,%r8
mov    %r9,(%rsp)
xor    %ecx,%ecx
mov    %rax,%r9
call   1030 <do_record_new_rule@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.itstree_node = type { i32 }
define void @record_its(%struct.itstree_node* %0, i32* %1, i64 %2, i64 %3, i64 %4, i64 %5) {
%7 = alloca %struct.itstree_node*
%8 = alloca i32*
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
%12 = alloca i64
store %struct.itstree_node* %0, %struct.itstree_node** %7
store i32* %1, i32** %8
store i64 %2, i64* %9
store i64 %3, i64* %10
store i64 %4, i64* %11
store i64 %5, i64* %12
%13 = load %struct.itstree_node*, %struct.itstree_node** %7
%14 = load i32*, i32** %8
%15 = load i64, i64* %9
%16 = load i64, i64* %10
%17 = load i64, i64* %11
%18 = load i64, i64* %12
%19 = call i32 @do_record_new_rule(%struct.itstree_node* %13, i32* %14, i64 %15, i32 0, i64 %16, i64 %17, i64 %18)
ret void
}

LLVM IR (-O2):
%struct.itstree_node = type { i32 }
define void @record_its(%struct.itstree_node* %0, i32* %1, i64 %2, i64 %3, i64 %4, i64 %5) {
%7 = tail call i32 @do_record_new_rule(%struct.itstree_node* %0, i32* %1, i64 %2, i32 0, i64 %3, i64 %4, i64 %5)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ getline(char **, size_t *, int /*<<< orphan*/ *);
char *utils_get_line(FILE *input) {
  char *lineptr = NULL;
  size_t len = 0;
  getline(&lineptr, &len, input);
  return lineptr;
}


x86 assembly (clang, -O0):
<utils_get_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rdx
lea    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <getline@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<utils_get_line>:
sub    $0x18,%rsp
mov    %rdi,%rdx
movq   $0x0,0x8(%rsp)
movq   $0x0,0x10(%rsp)
lea    0x8(%rsp),%rdi
lea    0x10(%rsp),%rsi
call   1030 <getline@plt>
mov    0x8(%rsp),%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i8* @utils_get_line(i32* %0) {
%2 = alloca i32*
%3 = alloca i8*
%4 = alloca i64
store i32* %0, i32** %2
store i8* null, i8** %3
store i64 0, i64* %4
%5 = load i32*, i32** %2
%6 = call i32 @getline(i8** %3, i64* %4, i32* %5)
%7 = load i8*, i8** %3
ret i8* %7
}

LLVM IR (-O2):
define i8* @utils_get_line(i32* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = bitcast i8** %2 to i8*
store i8* null, i8** %2
%5 = bitcast i64* %3 to i8*
store i64 0, i64* %3
%6 = call i32 @getline(i8** %2, i64* %3, i32* %0)
%7 = load i8*, i8** %2
ret i8* %7
}
/* Type definitions */
struct sock {
  int dummy;
};
typedef int /*<<< orphan*/ SSL_CTX;

/* Variables and functions */
int /*<<< orphan*/ smtp_get_msg(struct sock *, int);
int /*<<< orphan*/ sock_sendmsg(struct sock *, char *);
int /*<<< orphan*/ sock_starttls(struct sock *, int /*<<< orphan*/ *);
int smtp_starttls(struct sock *sock, SSL_CTX *ctx) {
  sock_sendmsg(sock, "STARTTLS");
  smtp_get_msg(sock, 1);
  sock_starttls(sock, ctx);
  return 0;
}


x86 assembly (clang, -O0):
<smtp_starttls>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xeb5(%rip),%rsi
call   1050 <sock_sendmsg@plt>
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1040 <smtp_get_msg@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <sock_starttls@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smtp_starttls>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0xebf(%rip),%rsi
call   1050 <sock_sendmsg@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
call   1040 <smtp_get_msg@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <sock_starttls@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.sock = type { i32 }
@.str = [9 x i8] c"STARTTLS\00"
define i32 @smtp_starttls(%struct.sock* %0, i32* %1) {
%3 = alloca %struct.sock*
%4 = alloca i32*
store %struct.sock* %0, %struct.sock** %3
store i32* %1, i32** %4
%5 = load %struct.sock*, %struct.sock** %3
%6 = call i32 @sock_sendmsg(%struct.sock* %5, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%7 = load %struct.sock*, %struct.sock** %3
%8 = call i32 @smtp_get_msg(%struct.sock* %7, i32 1)
%9 = load %struct.sock*, %struct.sock** %3
%10 = load i32*, i32** %4
%11 = call i32 @sock_starttls(%struct.sock* %9, i32* %10)
ret i32 0
}

LLVM IR (-O2):
%struct.sock = type { i32 }
@.str = [9 x i8] c"STARTTLS\00"
define i32 @smtp_starttls(%struct.sock* %0, i32* %1) {
%3 = tail call i32 @sock_sendmsg(%struct.sock* %0, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @smtp_get_msg(%struct.sock* %0, i32 1)
%5 = tail call i32 @sock_starttls(%struct.sock* %0, i32* %1)
ret i32 0
}
/* Variables and functions */
int d22(int);
int d23(int a) { return d22(d22(a)); }


x86 assembly (clang, -O0):
<d23>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <d22@plt>
mov    %eax,%edi
call   1030 <d22@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d23>:
push   %rax
call   1030 <d22@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <d22@plt>

LLVM IR (-O0):
define i32 @d23(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @d22(i32 %3)
%5 = call i32 @d22(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @d23(i32 %0) {
%2 = tail call i32 @d22(i32 %0)
%3 = tail call i32 @d22(i32 %2)
ret i32 %3
}
void sgx_destroy_enclave() {}


x86 assembly (clang, -O0):
<sgx_destroy_enclave>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sgx_destroy_enclave>:
ret

LLVM IR (-O0):
define void @sgx_destroy_enclave() {
ret void
}

LLVM IR (-O2):
define void @sgx_destroy_enclave() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_format_info_get_prop_type() {
  printf("NOT IMPLEMENTED:"
         "pa_format_info_get_prop_type"
         "\n");
}


x86 assembly (clang, -O0):
<pa_format_info_get_prop_type>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_format_info_get_prop_type>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [46 x i8] c"NOT IMPLEMENTED:pa_format_info_get_prop_type\0A\00"
define i32 @pa_format_info_get_prop_type() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [45 x i8] c"NOT IMPLEMENTED:pa_format_info_get_prop_type\00"
define i32 @pa_format_info_get_prop_type() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([45 x i8], [45 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
const char *__malidrv_build_info(void) {
  return "malidrv:  API_VERSION=19 REPO_URL= REVISION= CHANGED_REVISION= "
         "CHANGE_DATE= BUILD_DATE=Thu Mar 14 17:18:13 IST 2013 BUILD=release "
         "TARGET_PLATFORM= MALI_PLATFORM= KDIR= "
         "OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING=y "
         "USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 "
         "MALI_UPPER_HALF_SCHEDULING=1";
}


x86 assembly (clang, -O0):
<__malidrv_build_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__malidrv_build_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [314 x i8] c"malidrv: API_VERSION=19 REPO_URL= REVISION= CHANGED_REVISION= CHANGE_DATE= BUILD_DATE=Thu Mar 14 17:18:13 IST 2013 BUILD=release TARGET_PLATFORM= MALI_PLATFORM= KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING=y USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([314 x i8], [314 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [314 x i8] c"malidrv: API_VERSION=19 REPO_URL= REVISION= CHANGED_REVISION= CHANGE_DATE= BUILD_DATE=Thu Mar 14 17:18:13 IST 2013 BUILD=release TARGET_PLATFORM= MALI_PLATFORM= KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING=y USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([314 x i8], [314 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct timezone {
  int /*<<< orphan*/ member_1;
  int /*<<< orphan*/ member_0;
};
struct timeval {
  unsigned int tv_usec;
  int tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, struct timezone *);
unsigned int sys_get_clock_usec() {
  struct timezone tz = {0, 0};
  struct timeval tv;
  gettimeofday(&tv, &tz);
  return tv.tv_usec + tv.tv_sec * 1000000;
}


x86 assembly (clang, -O0):
<sys_get_clock_usec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x8,%edx
call   1040 <memset@plt>
lea    -0x10(%rbp),%rdi
lea    -0x8(%rbp),%rsi
call   1030 <gettimeofday@plt>
mov    -0x10(%rbp),%eax
imul   $0xf4240,-0xc(%rbp),%ecx
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_get_clock_usec>:
sub    $0x18,%rsp
movq   $0x0,0x10(%rsp)
lea    0x8(%rsp),%rdi
lea    0x10(%rsp),%rsi
call   1030 <gettimeofday@plt>
imul   $0xf4240,0xc(%rsp),%eax
add    0x8(%rsp),%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timezone = type { i32, i32 }
%struct.timeval = type { i32, i32 }
define i32 @sys_get_clock_usec() {
%1 = alloca %struct.timezone
%2 = alloca %struct.timeval
%3 = bitcast %struct.timezone* %1 to i8*
%4 = call i32 @gettimeofday(%struct.timeval* %2, %struct.timezone* %1)
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i32 0, i32 0
%6 = load i32, i32* %5
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i32 0, i32 1
%8 = load i32, i32* %7
%9 = mul nsw i32 %8, 1000000
%10 = add i32 %6, %9
ret i32 %10
}

LLVM IR (-O2):
%struct.timezone = type { i32, i32 }
%struct.timeval = type { i32, i32 }
define i32 @sys_get_clock_usec() {
%1 = alloca i64
%2 = bitcast i64* %1 to %struct.timezone*
%3 = alloca %struct.timeval
%4 = bitcast i64* %1 to i8*
store i64 0, i64* %1
%5 = bitcast %struct.timeval* %3 to i8*
%6 = call i32 @gettimeofday(%struct.timeval* %3, %struct.timezone* %2)
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i64 0, i32 0
%8 = load i32, i32* %7
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i64 0, i32 1
%10 = load i32, i32* %9
%11 = mul nsw i32 %10, 1000000
%12 = add i32 %11, %8
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ Test_TimerIntervalCalculation();
void Aux_Testing_Instances(void) {
  Test_TimerIntervalCalculation();
  return;
}


x86 assembly (clang, -O0):
<Aux_Testing_Instances>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Test_TimerIntervalCalculation@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Aux_Testing_Instances>:
xor    %eax,%eax
jmp    1030 <Test_TimerIntervalCalculation@plt>

LLVM IR (-O0):
define void @Aux_Testing_Instances() {
%1 = call i32 (...) @Test_TimerIntervalCalculation()
ret void
}

LLVM IR (-O2):
define void @Aux_Testing_Instances() {
%1 = tail call i32 (...) @Test_TimerIntervalCalculation()
ret void
}
/* Type definitions */
struct sd_locker_state_t {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ sd_locker_posix_lock_file_open(struct sd_locker_state_t *);
void sd_locker_lock_file_open(struct sd_locker_state_t *state) {
  assert(state != NULL);
  sd_locker_posix_lock_file_open(state);
}


x86 assembly (clang, -O0):
<sd_locker_lock_file_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rdi
call   1040 <sd_locker_posix_lock_file_open@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_locker_lock_file_open>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1030 <assert@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <sd_locker_posix_lock_file_open@plt>

LLVM IR (-O0):
%struct.sd_locker_state_t = type { i32 }
define void @sd_locker_lock_file_open(%struct.sd_locker_state_t* %0) {
%2 = alloca %struct.sd_locker_state_t*
store %struct.sd_locker_state_t* %0, %struct.sd_locker_state_t** %2
%3 = load %struct.sd_locker_state_t*, %struct.sd_locker_state_t** %2
%4 = icmp ne %struct.sd_locker_state_t* %3, null
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
%7 = load %struct.sd_locker_state_t*, %struct.sd_locker_state_t** %2
%8 = call i32 @sd_locker_posix_lock_file_open(%struct.sd_locker_state_t* %7)
ret void
}

LLVM IR (-O2):
%struct.sd_locker_state_t = type { i32 }
define void @sd_locker_lock_file_open(%struct.sd_locker_state_t* %0) {
%2 = icmp ne %struct.sd_locker_state_t* %0, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = tail call i32 @sd_locker_posix_lock_file_open(%struct.sd_locker_state_t* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
uint16_t _le_16(uint16_t s) {
  uint16_t ret = s;
  return ret;
}


x86 assembly (clang, -O0):
<_le_16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_le_16>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @_le_16(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
%5 = load i32, i32* %3
ret i32 %5
}

LLVM IR (-O2):
define i32 @_le_16(i32 returned %0) {
ret i32 %0
}
int BPQSerialSetDCD(unsigned int hDevice) { return 0; }


x86 assembly (clang, -O0):
<BPQSerialSetDCD>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BPQSerialSetDCD>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @BPQSerialSetDCD(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @BPQSerialSetDCD(i32 %0) {
ret i32 0
}
/* Type definitions */
typedef size_t int64_t;

/* Variables and functions */
int /*<<< orphan*/ __egl_decr_ptr(void *);
void __egl_array_decr_ptrs(void **arr, int64_t ct) {
  int64_t i;
  for (i = 0; i < ct; i++)
    __egl_decr_ptr(arr[i]);
}


x86 assembly (clang, -O0):
<__egl_array_decr_ptrs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1158 <__egl_array_decr_ptrs+0x48>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <__egl_decr_ptr@plt>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1128 <__egl_array_decr_ptrs+0x18>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__egl_array_decr_ptrs>:
push   %r15
push   %r14
push   %rbx
test   %rsi,%rsi
je     1142 <__egl_array_decr_ptrs+0x32>
mov    %rsi,%r15
mov    %rdi,%r14
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    (%r14,%rbx,8),%rdi
call   1030 <__egl_decr_ptr@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <__egl_array_decr_ptrs+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @__egl_array_decr_ptrs(i8** %0, i64 %1) {
%3 = alloca i8**
%4 = alloca i64
%5 = alloca i64
store i8** %0, i8*** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %16, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i8**, i8*** %3
%12 = load i64, i64* %5
%13 = getelementptr inbounds i8*, i8** %11, i64 %12
%14 = load i8*, i8** %13
%15 = call i32 @__egl_decr_ptr(i8* %14)
br label %16
16: ; preds = %10
%17 = load i64, i64* %5
%18 = add i64 %17, 1
store i64 %18, i64* %5
br label %6
19: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @__egl_array_decr_ptrs(i8** nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %11, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %9, %4 ], [ 0, %2 ]
%6 = getelementptr inbounds i8*, i8** %0, i64 %5
%7 = load i8*, i8** %6
%8 = tail call i32 @__egl_decr_ptr(i8* %7)
%9 = add nuw i64 %5, 1
%10 = icmp eq i64 %9, %1
br i1 %10, label %11, label %4
11: ; preds = %4, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *, int *);
main() {
  int a1, a2;
  printf("podaj liczbe\n");
  scanf("%d%d", &a1, &a2);
  if (a1 == a2)
    printf("liczby są równe\n");
  else
    printf("liczby nie są równe\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
lea    0xecc(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1040 <scanf@plt>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    116c <main+0x4c>
lea    0xeb1(%rip),%rdi
call   1030 <printf@plt>
jmp    1178 <main+0x58>
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xedd(%rip),%rdi
call   1030 <puts@plt>
lea    0xecc(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <scanf@plt>
mov    0x4(%rsp),%eax
cmp    (%rsp),%eax
lea    0xed9(%rip),%rax
lea    0xebc(%rip),%rdi
cmove  %rax,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"podaj liczbe\0A\00"
@.str.1 = [5 x i8] c"%d%d\00"
@.str.2 = [19 x i8] c"liczby s\C4\85 r\C3\B3wne\0A\00"
@.str.3 = [23 x i8] c"liczby nie s\C4\85 r\C3\B3wne\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32* %2, i32* %3)
%6 = load i32, i32* %2
%7 = load i32, i32* %3
%8 = icmp eq i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %0
%10 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.2, i64 0, i64 0))
br label %13
11: ; preds = %0
%12 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.3, i64 0, i64 0))
br label %13
13: ; preds = %11, %9
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [5 x i8] c"%d%d\00"
@str = [13 x i8] c"podaj liczbe\00"
@str.4 = [22 x i8] c"liczby nie s\C4\85 r\C3\B3wne\00"
@str.5 = [18 x i8] c"liczby s\C4\85 r\C3\B3wne\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
%6 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32* %1, i32* %2)
%7 = load i32, i32* %1
%8 = load i32, i32* %2
%9 = icmp eq i32 %7, %8
%10 = select i1 %9, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @str.5, i64 0, i64 0), i8* getelementptr inbounds ([22 x i8], [22 x i8]* @str.4, i64 0, i64 0)
%11 = call i32 @puts(i8* dereferenceable(1) %10)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ GPIODirModeSet(int /*<<< orphan*/, int /*<<< orphan*/, int);
int /*<<< orphan*/ GPIOPadConfigSet(int /*<<< orphan*/, int /*<<< orphan*/, int,
                                    int);
void GPIOPinTypeGPIOOutput(uint32_t ui32Port, uint8_t ui8Pins) {
  ;
  GPIOPadConfigSet(ui32Port, ui8Pins, 0x00000001, 0x00000008);
  GPIODirModeSet(ui32Port, ui8Pins, 0x00000001);
}


x86 assembly (clang, -O0):
<GPIOPinTypeGPIOOutput>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x1,%edx
mov    $0x8,%ecx
call   1030 <GPIOPadConfigSet@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x1,%edx
call   1040 <GPIODirModeSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinTypeGPIOOutput>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x1,%edx
mov    $0x8,%ecx
call   1030 <GPIOPadConfigSet@plt>
mov    %ebp,%edi
mov    %ebx,%esi
mov    $0x1,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <GPIODirModeSet@plt>

LLVM IR (-O0):
define void @GPIOPinTypeGPIOOutput(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @GPIOPadConfigSet(i32 %5, i32 %6, i32 1, i32 8)
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @GPIODirModeSet(i32 %8, i32 %9, i32 1)
ret void
}

LLVM IR (-O2):
define void @GPIOPinTypeGPIOOutput(i32 %0, i32 %1) {
%3 = tail call i32 @GPIOPadConfigSet(i32 %0, i32 %1, i32 1, i32 8)
%4 = tail call i32 @GPIODirModeSet(i32 %0, i32 %1, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void fail_stream() {
  fprintf(stderr, "Something went wrong with the input stream.\n\n");
  exit(2);
}


x86 assembly (clang, -O0):
<fail_stream>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<fail_stream>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [46 x i8] c"Something went wrong with the input stream.\0A\0A\00"
define void @fail_stream() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 2)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [46 x i8] c"Something went wrong with the input stream.\0A\0A\00"
define void @fail_stream() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 2)
unreachable
}
void perf_ptInit(void) { return; }


x86 assembly (clang, -O0):
<perf_ptInit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perf_ptInit>:
ret

LLVM IR (-O0):
define void @perf_ptInit() {
ret void
}

LLVM IR (-O2):
define void @perf_ptInit() {
ret void
}
int sequenceSimilarity(unsigned char *tipJ, unsigned char *tipK, int n) {
  int i;
  for (i = 0; i < n; i++)
    if (*tipJ++ != *tipK++)
      return 0;
  return 1;
}


x86 assembly (clang, -O0):
<sequenceSimilarity>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
movl   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%eax
cmp    -0x1c(%rbp),%eax
jge    116d <sequenceSimilarity+0x6d>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movzbl (%rax),%eax
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
movzbl (%rcx),%ecx
cmp    %ecx,%eax
je     115a <sequenceSimilarity+0x5a>
movl   $0x0,-0x4(%rbp)
jmp    1174 <sequenceSimilarity+0x74>
jmp    115f <sequenceSimilarity+0x5f>
mov    -0x20(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    1116 <sequenceSimilarity+0x16>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sequenceSimilarity>:
mov    $0x1,%eax
test   %edx,%edx
jle    1122 <sequenceSimilarity+0x22>
mov    %edx,%r8d
xor    %edx,%edx
xchg   %ax,%ax
movzbl (%rdi,%rdx,1),%ecx
cmp    (%rsi,%rdx,1),%cl
jne    1123 <sequenceSimilarity+0x23>
add    $0x1,%rdx
cmp    %edx,%r8d
jne    1110 <sequenceSimilarity+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sequenceSimilarity(i8* %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %25, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %7
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %28
13: ; preds = %9
%14 = load i8*, i8** %5
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %5
%16 = load i8, i8* %14
%17 = zext i8 %16 to i32
%18 = load i8*, i8** %6
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %6
%20 = load i8, i8* %18
%21 = zext i8 %20 to i32
%22 = icmp ne i32 %17, %21
br i1 %22, label %23, label %24
23: ; preds = %13
store i32 0, i32* %4
br label %29
24: ; preds = %13
br label %25
25: ; preds = %24
%26 = load i32, i32* %8
%27 = add nsw i32 %26, 1
store i32 %27, i32* %8
br label %9
28: ; preds = %9
store i32 1, i32* %4
br label %29
29: ; preds = %28, %23
%30 = load i32, i32* %4
ret i32 %30
}

LLVM IR (-O2):
define i32 @sequenceSimilarity(i8* nocapture %0, i8* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %17
5: ; preds = %3, %12
%6 = phi i32 [ %15, %12 ], [ 0, %3 ]
%7 = phi i8* [ %13, %12 ], [ %1, %3 ]
%8 = phi i8* [ %14, %12 ], [ %0, %3 ]
%9 = load i8, i8* %8
%10 = load i8, i8* %7
%11 = icmp eq i8 %9, %10
br i1 %11, label %12, label %17
12: ; preds = %5
%13 = getelementptr inbounds i8, i8* %7, i64 1
%14 = getelementptr inbounds i8, i8* %8, i64 1
%15 = add nuw nsw i32 %6, 1
%16 = icmp eq i32 %15, %2
br i1 %16, label %17, label %5
17: ; preds = %5, %12, %3
%18 = phi i32 [ 1, %3 ], [ 1, %12 ], [ 0, %5 ]
ret i32 %18
}
void doneline(char *input, char **vec) {
  free(input);
  free(vec);
}


x86 assembly (clang, -O0):
<doneline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<doneline>:
push   %rbx
mov    %rsi,%rbx
call   1030 <free@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @doneline(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
%5 = load i8*, i8** %3
%6 = load i8**, i8*** %4
%7 = bitcast i8** %6 to i8*
ret void
}

LLVM IR (-O2):
define void @doneline(i8* nocapture %0, i8** nocapture %1) {
tail call void @free(i8* %0)
%3 = bitcast i8** %1 to i8*
tail call void @free(i8* %3)
ret void
}
int is_prime(int number) {
  int i, digit;
  i = 2;
  digit = 1;
  while (i < number) {
    if (number % i == 0) {
      digit = 0;
      break;
    }
    i++;
  }
  return digit;
}


x86 assembly (clang, -O0):
<is_prime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    114b <is_prime+0x4b>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
cmp    $0x0,%edx
jne    113d <is_prime+0x3d>
movl   $0x0,-0xc(%rbp)
jmp    114b <is_prime+0x4b>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1115 <is_prime+0x15>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_prime>:
mov    $0x1,%ecx
cmp    $0x3,%edi
jl     1120 <is_prime+0x20>
mov    $0x2,%esi
nop
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1123 <is_prime+0x23>
add    $0x1,%esi
cmp    %esi,%edi
jne    1110 <is_prime+0x10>
mov    %ecx,%eax
ret
xor    %ecx,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @is_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 2, i32* %3
store i32 1, i32* %4
br label %5
5: ; preds = %15, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %18
9: ; preds = %5
%10 = load i32, i32* %2
%11 = load i32, i32* %3
%12 = srem i32 %10, %11
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %9
store i32 0, i32* %4
br label %18
15: ; preds = %9
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
store i32 %17, i32* %3
br label %5
18: ; preds = %14, %5
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
define i32 @is_prime(i32 %0) {
%2 = icmp sgt i32 %0, 2
br i1 %2, label %5, label %10
3: ; preds = %5
%4 = icmp eq i32 %9, %0
br i1 %4, label %10, label %5
5: ; preds = %1, %3
%6 = phi i32 [ %9, %3 ], [ 2, %1 ]
%7 = srem i32 %0, %6
%8 = icmp eq i32 %7, 0
%9 = add nuw nsw i32 %6, 1
br i1 %8, label %10, label %3
10: ; preds = %3, %5, %1
%11 = phi i32 [ 1, %1 ], [ 0, %5 ], [ 1, %3 ]
ret i32 %11
}
/* Variables and functions */
int strlen(char const *);
int /*<<< orphan*/ strncpy(char *, char const *, size_t);
char *xmalloc(size_t);
char *xstrdup(const char *s) {
  char *ptr;
  size_t len;
  len = strlen(s) + 1;
  ptr = xmalloc(len);
  strncpy(ptr, s, len);
  return (ptr);
}


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1050 <xmalloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncpy@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1040 <strlen@plt>
add    $0x1,%eax
movslq %eax,%r15
mov    %r15,%rdi
call   1050 <xmalloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1030 <strncpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = add nsw i32 %6, 1
%8 = sext i32 %7 to i64
store i64 %8, i64* %4
%9 = load i64, i64* %4
%10 = call i8* @xmalloc(i64 %9)
store i8* %10, i8** %3
%11 = load i8*, i8** %3
%12 = load i8*, i8** %2
%13 = load i64, i64* %4
%14 = call i32 @strncpy(i8* %11, i8* %12, i64 %13)
%15 = load i8*, i8** %3
ret i8* %15
}

LLVM IR (-O2):
define i8* @xstrdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = sext i32 %3 to i64
%5 = tail call i8* @xmalloc(i64 %4)
%6 = tail call i32 @strncpy(i8* %5, i8* %0, i64 %4)
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void __mingw_aligned_free(void *memblock) {
  if (memblock)
    free((*(
        ((void **)(((size_t)(memblock)) & (~((size_t)(sizeof(void *) - 1))))) -
        1)));
}


x86 assembly (clang, -O0):
<__mingw_aligned_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1138 <__mingw_aligned_free+0x28>
mov    -0x8(%rbp),%rax
and    $0xfffffffffffffff8,%rax
mov    -0x8(%rax),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__mingw_aligned_free>:
test   %rdi,%rdi
je     1122 <__mingw_aligned_free+0x12>
and    $0xfffffffffffffff8,%rdi
mov    -0x8(%rdi),%rdi
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @__mingw_aligned_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %13
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = ptrtoint i8* %6 to i64
%8 = and i64 %7, -8
%9 = inttoptr i64 %8 to i8**
%10 = getelementptr inbounds i8*, i8** %9, i64 -1
%11 = load i8*, i8** %10
%12 = call i32 @free(i8* %11)
br label %13
13: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @__mingw_aligned_free(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = ptrtoint i8* %0 to i64
%5 = and i64 %4, -8
%6 = inttoptr i64 %5 to i8**
%7 = getelementptr inbounds i8*, i8** %6, i64 -1
%8 = load i8*, i8** %7
%9 = tail call i32 @free(i8* %8)
br label %10
10: ; preds = %3, %1
ret void
}