xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ write_reg(int, int);
void clear_fifo_flag(void) { write_reg(0x04, 0x01); }


x86 assembly (clang, -O0):
<clear_fifo_flag>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
mov    $0x1,%esi
call   1030 <write_reg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_fifo_flag>:
mov    $0x4,%edi
mov    $0x1,%esi
jmp    1030 <write_reg@plt>

LLVM IR (-O0):
define void @clear_fifo_flag() {
%1 = call i32 @write_reg(i32 4, i32 1)
ret void
}

LLVM IR (-O2):
define void @clear_fifo_flag() {
%1 = tail call i32 @write_reg(i32 4, i32 1)
ret void
}
double CSPL_Stats_percent_rank(long n, long N) {
  return ((100. / (double)N) * (n + 0.5));
}


x86 assembly (clang, -O0):
<CSPL_Stats_percent_rank>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cvtsi2sdq -0x10(%rbp),%xmm1
movsd  0xeee(%rip),%xmm0
divsd  %xmm1,%xmm0
cvtsi2sdq -0x8(%rbp),%xmm1
movsd  0xed4(%rip),%xmm2
addsd  %xmm2,%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<CSPL_Stats_percent_rank>:
cvtsi2sd %rsi,%xmm1
movsd  0xef3(%rip),%xmm2
cvtsi2sd %rdi,%xmm0
divsd  %xmm1,%xmm2
addsd  0xeea(%rip),%xmm0
mulsd  %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @CSPL_Stats_percent_rank(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = sitofp i64 %5 to double
%7 = fdiv double 1.000000e+02, %6
%8 = load i64, i64* %3
%9 = sitofp i64 %8 to double
%10 = fadd double %9, 5.000000e-01
%11 = fmul double %7, %10
ret double %11
}

LLVM IR (-O2):
define double @CSPL_Stats_percent_rank(i64 %0, i64 %1) {
%3 = sitofp i64 %1 to double
%4 = fdiv double 1.000000e+02, %3
%5 = sitofp i64 %0 to double
%6 = fadd double %5, 5.000000e-01
%7 = fmul double %6, %4
ret double %7
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128d;

/* Variables and functions */
int /*<<< orphan*/ _mm_load_pd(double const *);
__m128d test_mm_load_pd(double const *A) { return _mm_load_pd(A); }


x86 assembly (clang, -O0):
<test_mm_load_pd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_mm_load_pd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_load_pd>:
jmp    1030 <_mm_load_pd@plt>

LLVM IR (-O0):
define i32 @test_mm_load_pd(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = call i32 @_mm_load_pd(double* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test_mm_load_pd(double* %0) {
%2 = tail call i32 @_mm_load_pd(double* %0)
ret i32 %2
}
int length(char *s) {
  int i, len = 0;
  for (i = 0; s[i] != '\0'; i++)
    len++;
  return len;
}


x86 assembly (clang, -O0):
<length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1142 <length+0x42>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <length+0x16>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<length>:
cmpb   $0x0,(%rdi)
je     111c <length+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <length+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @length(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %16, %1
%6 = load i8*, i8** %2
%7 = load i32, i32* %3
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %19
13: ; preds = %5
%14 = load i32, i32* %4
%15 = add nsw i32 %14, 1
store i32 %15, i32* %4
br label %16
16: ; preds = %13
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 1
store i32 %18, i32* %3
br label %5
19: ; preds = %5
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @length(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %6, %4 ], [ 0, %1 ]
%6 = add nuw nsw i64 %5, 1
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, 0
br i1 %9, label %10, label %4
10: ; preds = %4
%11 = trunc i64 %6 to i32
br label %12
12: ; preds = %10, %1
%13 = phi i32 [ 0, %1 ], [ %11, %10 ]
ret i32 %13
}
extern unsigned int __inlc(unsigned short port) {
  unsigned int _v;
  __asm__ __volatile__("in"
                       "l"
                       " %"
                       ""
                       "1,%"
                       ""
                       "0"
                       : "=a"(_v)
                       : "id"(port));
  return _v;
}


x86 assembly (clang, -O0):
<__inlc>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__inlc>:
mov    %edi,%edx
in     (%dx),%eax
ret

LLVM IR (-O0):
define i32 @__inlc(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i32
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i32 asm sideeffect "inl $1,$0", "={ax},i{dx},~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @__inlc(i16 zeroext %0) {
%2 = tail call i32 asm sideeffect "inl $1,$0", "={ax},i{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i32 %2
}
int NextEDistList2(Schema, A)
struct univStruct *Schema;
struct EnrolledIn **A;
{
  (*A) = AccessEnrolledInEDistList2Next(*A);
  if ((*A) == 0)
    return (0);
  return (1);
}


x86 assembly (clang, -O0):
<NextEDistList2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rdi
mov    $0x0,%al
call   1030 <AccessEnrolledInEDistList2Next@plt>
movslq %eax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rax
cmpq   $0x0,(%rax)
jne    1152 <NextEDistList2+0x42>
movl   $0x0,-0x4(%rbp)
jmp    1159 <NextEDistList2+0x49>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NextEDistList2>:
push   %rbx
mov    %rsi,%rbx
mov    (%rsi),%rdi
xor    %eax,%eax
call   1030 <AccessEnrolledInEDistList2Next@plt>
movslq %eax,%rcx
mov    %rcx,(%rbx)
xor    %eax,%eax
test   %ecx,%ecx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
%struct.univStruct = type opaque
%struct.EnrolledIn = type opaque
define i32 @NextEDistList2(%struct.univStruct* %0, %struct.EnrolledIn** %1) {
%3 = alloca i32
%4 = alloca %struct.univStruct*
%5 = alloca %struct.EnrolledIn**
store %struct.univStruct* %0, %struct.univStruct** %4
store %struct.EnrolledIn** %1, %struct.EnrolledIn*** %5
%6 = load %struct.EnrolledIn**, %struct.EnrolledIn*** %5
%7 = load %struct.EnrolledIn*, %struct.EnrolledIn** %6
%8 = call i32 (%struct.EnrolledIn*, ...) bitcast (i32 (...)* @AccessEnrolledInEDistList2Next to i32 (%struct.EnrolledIn*, ...)*)(%struct.EnrolledIn* %7)
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to %struct.EnrolledIn*
%11 = load %struct.EnrolledIn**, %struct.EnrolledIn*** %5
store %struct.EnrolledIn* %10, %struct.EnrolledIn** %11
%12 = load %struct.EnrolledIn**, %struct.EnrolledIn*** %5
%13 = load %struct.EnrolledIn*, %struct.EnrolledIn** %12
%14 = icmp eq %struct.EnrolledIn* %13, null
br i1 %14, label %15, label %16
15: ; preds = %2
store i32 0, i32* %3
br label %17
16: ; preds = %2
store i32 1, i32* %3
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
%struct.univStruct = type opaque
%struct.EnrolledIn = type opaque
define i32 @NextEDistList2(%struct.univStruct* nocapture readnone %0, %struct.EnrolledIn** nocapture %1) {
%3 = load %struct.EnrolledIn*, %struct.EnrolledIn** %1
%4 = tail call i32 (%struct.EnrolledIn*, ...) bitcast (i32 (...)* @AccessEnrolledInEDistList2Next to i32 (%struct.EnrolledIn*, ...)*)(%struct.EnrolledIn* %3)
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to %struct.EnrolledIn*
store %struct.EnrolledIn* %6, %struct.EnrolledIn** %1
%7 = icmp ne i32 %4, 0
%8 = zext i1 %7 to i32
ret i32 %8
}
void handle_63(int sig) {}


x86 assembly (clang, -O0):
<handle_63>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_63>:
ret

LLVM IR (-O0):
define void @handle_63(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @handle_63(i32 %0) {
ret void
}
/* Variables and functions */
int atoi(char *);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main(int argc, char *argv[]) {
  int x, y;
  x = atoi(argv[1]);
  scanf("%d", &y);
  printf("%d\n", y - x);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1050 <atoi@plt>
mov    %eax,-0x14(%rbp)
lea    0xea3(%rip),%rdi
lea    -0x18(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x18(%rbp),%esi
sub    -0x14(%rbp),%esi
lea    0xe90(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
mov    0x8(%rsi),%rdi
call   1050 <atoi@plt>
mov    %eax,%ebx
lea    0xeb9(%rip),%rdi
lea    0xc(%rsp),%rsi
call   1040 <scanf@plt>
mov    0xc(%rsp),%esi
sub    %ebx,%esi
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = load i8**, i8*** %5
%9 = getelementptr inbounds i8*, i8** %8, i64 1
%10 = load i8*, i8** %9
%11 = call i32 @atoi(i8* %10)
store i32 %11, i32* %6
%12 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %7)
%13 = load i32, i32* %7
%14 = load i32, i32* %6
%15 = sub nsw i32 %13, %14
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %15)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = tail call i32 @atoi(i8* %6)
%8 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %3)
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, %7
%11 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %10)
ret i32 0
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ memreg(void *);
void *rmalloc(size_t size) {
  void *mem = malloc(size);
  memreg(mem);
  return mem;
}


x86 assembly (clang, -O0):
<rmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <memreg@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rmalloc>:
push   %rbx
call   1030 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <memreg@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @rmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @memreg(i8* %6)
%8 = load i8*, i8** %3
ret i8* %8
}

LLVM IR (-O2):
define i8* @rmalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = tail call i32 @memreg(i8* %2)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ tty_gwinsz();
int /*<<< orphan*/ tty_swinsz();
void tty__sigwinch(int sig) {
  tty_gwinsz();
  tty_swinsz();
}


x86 assembly (clang, -O0):
<tty__sigwinch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <tty_gwinsz@plt>
mov    $0x0,%al
call   1040 <tty_swinsz@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tty__sigwinch>:
push   %rax
xor    %eax,%eax
call   1030 <tty_gwinsz@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <tty_swinsz@plt>

LLVM IR (-O0):
define void @tty__sigwinch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @tty_gwinsz()
%4 = call i32 (...) @tty_swinsz()
ret void
}

LLVM IR (-O2):
define void @tty__sigwinch(i32 %0) {
%2 = tail call i32 (...) @tty_gwinsz()
%3 = tail call i32 (...) @tty_swinsz()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ xip_fpo_equal_flt(int *, float, float);
int xil_fpo_equal_flt(float a, float b) {
  int res_int;
  xip_fpo_equal_flt(&res_int, a, b);
  return res_int;
}


x86 assembly (clang, -O0):
<xil_fpo_equal_flt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
lea    -0xc(%rbp),%rdi
call   1030 <xip_fpo_equal_flt@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xil_fpo_equal_flt>:
push   %rax
lea    0x4(%rsp),%rdi
call   1030 <xip_fpo_equal_flt@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @xil_fpo_equal_flt(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca i32
store float %0, float* %3
store float %1, float* %4
%6 = load float, float* %3
%7 = load float, float* %4
%8 = call i32 @xip_fpo_equal_flt(i32* %5, float %6, float %7)
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @xil_fpo_equal_flt(float %0, float %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @xip_fpo_equal_flt(i32* %3, float %0, float %1)
%6 = load i32, i32* %3
ret i32 %6
}
/* Type definitions */
typedef char *uint32_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
uint32_t csum32(uint32_t initval, const uint16_t *buf, size_t nwords) {
  while (nwords-- > 0) {
    initval += *buf++;
    asm volatile("" ::: "memory");
  }
  return initval;
}


x86 assembly (clang, -O0):
<csum32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x18(%rbp)
cmp    $0x0,%rax
jbe    114d <csum32+0x4d>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x4,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
jmp    1110 <csum32+0x10>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<csum32>:
mov    %rdi,%rax
test   %rdx,%rdx
je     1120 <csum32+0x20>
xor    %ecx,%ecx
nopw   0x0(%rax,%rax,1)
movslq (%rsi,%rcx,4),%rdi
add    %rdi,%rax
add    $0x1,%rcx
cmp    %rcx,%rdx
jne    1110 <csum32+0x10>
ret

LLVM IR (-O0):
define i8* @csum32(i8* %0, i32* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i64
store i8* %0, i8** %4
store i32* %1, i32** %5
store i64 %2, i64* %6
br label %7
7: ; preds = %11, %3
%8 = load i64, i64* %6
%9 = add i64 %8, -1
store i64 %9, i64* %6
%10 = icmp ugt i64 %8, 0
br i1 %10, label %11, label %18
11: ; preds = %7
%12 = load i32*, i32** %5
%13 = getelementptr inbounds i32, i32* %12, i32 1
store i32* %13, i32** %5
%14 = load i32, i32* %12
%15 = load i8*, i8** %4
%16 = sext i32 %14 to i64
%17 = getelementptr inbounds i8, i8* %15, i64 %16
store i8* %17, i8** %4
br label %7
18: ; preds = %7
%19 = load i8*, i8** %4
ret i8* %19
}

LLVM IR (-O2):
define i8* @csum32(i8* readnone %0, i32* nocapture %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %15, label %5
5: ; preds = %3, %5
%6 = phi i64 [ %9, %5 ], [ %2, %3 ]
%7 = phi i32* [ %10, %5 ], [ %1, %3 ]
%8 = phi i8* [ %13, %5 ], [ %0, %3 ]
%9 = add i64 %6, -1
%10 = getelementptr inbounds i32, i32* %7, i64 1
%11 = load i32, i32* %7
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %8, i64 %12
tail call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
%14 = icmp eq i64 %9, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %3
%16 = phi i8* [ %0, %3 ], [ %13, %5 ]
ret i8* %16
}
void gtk_toggle_action_set_active() {}


x86 assembly (clang, -O0):
<gtk_toggle_action_set_active>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_toggle_action_set_active>:
ret

LLVM IR (-O0):
define void @gtk_toggle_action_set_active() {
ret void
}

LLVM IR (-O2):
define void @gtk_toggle_action_set_active() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ flash_LED();
int /*<<< orphan*/ init_app();
void main(void) {
  init_app();
  while (1) {
    flash_LED();
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <init_app@plt>
mov    $0x0,%al
call   1030 <flash_LED@plt>
jmp    112b <main+0xb>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <init_app@plt>
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <flash_LED@plt>
jmp    1130 <main+0x10>

LLVM IR (-O0):
define void @main() {
%1 = call i32 (...) @init_app()
br label %2
2: ; preds = %0, %2
%3 = call i32 (...) @flash_LED()
br label %2
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 (...) @init_app()
br label %2
2: ; preds = %0, %2
%3 = tail call i32 (...) @flash_LED()
br label %2
}
/* Variables and functions */
int rename(char const *, char const *);
int fb_lfs_rename(const char *old, const char *new) {
  return (rename(old, new));
}


x86 assembly (clang, -O0):
<fb_lfs_rename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <rename@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb_lfs_rename>:
jmp    1030 <rename@plt>

LLVM IR (-O0):
define i32 @fb_lfs_rename(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @rename(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @fb_lfs_rename(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @rename(i8* %0, i8* %1)
ret i32 %3
}
int sdps_fill_status(unsigned char *buf) { return 0; }


x86 assembly (clang, -O0):
<sdps_fill_status>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sdps_fill_status>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sdps_fill_status(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @sdps_fill_status(i8* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ __builtin_rdctl(int);
uint32_t _Nios2_Get_ctlreg_mpubase(void) {
  return (uint32_t)__builtin_rdctl(14);
}


x86 assembly (clang, -O0):
<_Nios2_Get_ctlreg_mpubase>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe,%edi
call   1030 <__builtin_rdctl@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Nios2_Get_ctlreg_mpubase>:
mov    $0xe,%edi
jmp    1030 <__builtin_rdctl@plt>

LLVM IR (-O0):
define i32 @_Nios2_Get_ctlreg_mpubase() {
%1 = call i32 @__builtin_rdctl(i32 14)
ret i32 %1
}

LLVM IR (-O2):
define i32 @_Nios2_Get_ctlreg_mpubase() {
%1 = tail call i32 @__builtin_rdctl(i32 14)
ret i32 %1
}
char test6_i(const char *x) { return x[1]; }


x86 assembly (clang, -O0):
<test6_i>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl 0x1(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test6_i>:
mov    0x1(%rdi),%al
ret

LLVM IR (-O0):
define signext i8 @test6_i(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 1
%5 = load i8, i8* %4
ret i8 %5
}

LLVM IR (-O2):
define signext i8 @test6_i(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 1
%3 = load i8, i8* %2
ret i8 %3
}
unsigned int fnv1a(const char *string) {
  unsigned int hash;
  for (hash = 0; *string; ++string) {
    hash ^= *string;
    hash +=
        (hash << 1) + (hash << 4) + (hash << 7) + (hash << 8) + (hash << 24);
  }
  return hash;
}


x86 assembly (clang, -O0):
<fnv1a>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1166 <fnv1a+0x66>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    -0xc(%rbp),%ecx
shl    $0x4,%ecx
add    %ecx,%eax
mov    -0xc(%rbp),%ecx
shl    $0x7,%ecx
add    %ecx,%eax
mov    -0xc(%rbp),%ecx
shl    $0x8,%ecx
add    %ecx,%eax
mov    -0xc(%rbp),%ecx
shl    $0x18,%ecx
add    %ecx,%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <fnv1a+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fnv1a>:
mov    (%rdi),%cl
test   %cl,%cl
je     1127 <fnv1a+0x27>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
movsbl %cl,%ecx
xor    %eax,%ecx
imul   $0x1000193,%ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <fnv1a+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fnv1a(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %30, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %33
8: ; preds = %4
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = load i32, i32* %3
%13 = xor i32 %12, %11
store i32 %13, i32* %3
%14 = load i32, i32* %3
%15 = shl i32 %14, 1
%16 = load i32, i32* %3
%17 = shl i32 %16, 4
%18 = add i32 %15, %17
%19 = load i32, i32* %3
%20 = shl i32 %19, 7
%21 = add i32 %18, %20
%22 = load i32, i32* %3
%23 = shl i32 %22, 8
%24 = add i32 %21, %23
%25 = load i32, i32* %3
%26 = shl i32 %25, 24
%27 = add i32 %24, %26
%28 = load i32, i32* %3
%29 = add i32 %28, %27
store i32 %29, i32* %3
br label %30
30: ; preds = %8
%31 = load i8*, i8** %2
%32 = getelementptr inbounds i8, i8* %31, i32 1
store i8* %32, i8** %2
br label %4
33: ; preds = %4
%34 = load i32, i32* %3
ret i32 %34
}

LLVM IR (-O2):
define i32 @fnv1a(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %10, %4 ], [ 0, %1 ]
%7 = phi i8* [ %11, %4 ], [ %0, %1 ]
%8 = sext i8 %5 to i32
%9 = xor i32 %6, %8
%10 = mul i32 %9, 16777619
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i32 [ 0, %1 ], [ %10, %4 ]
ret i32 %15
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int type;
};
struct TYPE_4__ {
  TYPE_1__ xcirculate;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xcirculate_type(void *_p, int _v) {
  ((XEvent *)_p)->xcirculate.type = (int)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xcirculate_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xcirculate_type>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xcirculate_type(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xcirculate_type(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
unsigned ht_improve_hash(unsigned h) {
  h += ~(h << 9);
  h ^= ((h >> 14) | (h << 18));
  h += (h << 4);
  h ^= ((h >> 10) | (h << 22));
  return h;
}


x86 assembly (clang, -O0):
<ht_improve_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x9,%eax
xor    $0xffffffff,%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0xe,%eax
mov    -0x4(%rbp),%ecx
shl    $0x12,%ecx
or     %ecx,%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x4,%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0xa,%eax
mov    -0x4(%rbp),%ecx
shl    $0x16,%ecx
or     %ecx,%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ht_improve_hash>:
mov    %edi,%eax
shl    $0x9,%eax
not    %eax
add    %edi,%eax
mov    %eax,%ecx
rol    $0x12,%ecx
xor    %eax,%ecx
mov    %ecx,%edx
shl    $0x4,%edx
add    %ecx,%edx
mov    %edx,%eax
rol    $0x16,%eax
xor    %edx,%eax
ret

LLVM IR (-O0):
define i32 @ht_improve_hash(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 9
%5 = xor i32 %4, -1
%6 = load i32, i32* %2
%7 = add i32 %6, %5
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = lshr i32 %8, 14
%10 = load i32, i32* %2
%11 = shl i32 %10, 18
%12 = or i32 %9, %11
%13 = load i32, i32* %2
%14 = xor i32 %13, %12
store i32 %14, i32* %2
%15 = load i32, i32* %2
%16 = shl i32 %15, 4
%17 = load i32, i32* %2
%18 = add i32 %17, %16
store i32 %18, i32* %2
%19 = load i32, i32* %2
%20 = lshr i32 %19, 10
%21 = load i32, i32* %2
%22 = shl i32 %21, 22
%23 = or i32 %20, %22
%24 = load i32, i32* %2
%25 = xor i32 %24, %23
store i32 %25, i32* %2
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @ht_improve_hash(i32 %0) {
%2 = shl i32 %0, 9
%3 = xor i32 %2, -1
%4 = add i32 %3, %0
%5 = tail call i32 @llvm.fshl.i32(i32 %4, i32 %4, i32 18)
%6 = xor i32 %5, %4
%7 = mul i32 %6, 17
%8 = lshr i32 %7, 10
%9 = mul i32 %6, 71303168
%10 = or i32 %8, %9
%11 = xor i32 %10, %7
ret i32 %11
}
int int_log2(int n) {
  int tmp1 = n;
  int tmp2 = 0;
  while (tmp1 >>= 1) {
    tmp2++;
  }
  return tmp2;
}


x86 assembly (clang, -O0):
<int_log2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
je     1134 <int_log2+0x34>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1114 <int_log2+0x14>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_log2>:
xor    %eax,%eax
cmp    $0x2,%edi
jb     111c <int_log2+0x1c>
xor    %eax,%eax
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
sar    %ecx
add    $0x1,%eax
cmp    $0x3,%edi
mov    %ecx,%edi
ja     1110 <int_log2+0x10>
ret

LLVM IR (-O0):
define i32 @int_log2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
store i32 %5, i32* %3
store i32 0, i32* %4
br label %6
6: ; preds = %10, %1
%7 = load i32, i32* %3
%8 = ashr i32 %7, 1
store i32 %8, i32* %3
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %6
%11 = load i32, i32* %4
%12 = add nsw i32 %11, 1
store i32 %12, i32* %4
br label %6
13: ; preds = %6
%14 = load i32, i32* %4
ret i32 %14
}

LLVM IR (-O2):
define i32 @int_log2(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = ashr i32 %5, 1
%7 = add nuw nsw i32 %4, 1
%8 = icmp ult i32 %5, 4
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %10
}
void tukar(char *elemen1, char *elemen2) {
  char hold;
  hold = *elemen1;
  *elemen1 = *elemen2;
  *elemen2 = hold;
}


x86 assembly (clang, -O0):
<tukar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x11(%rbp),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tukar>:
mov    (%rdi),%al
mov    (%rsi),%cl
mov    %cl,(%rdi)
mov    %al,(%rsi)
ret

LLVM IR (-O0):
define void @tukar(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
store i8 %7, i8* %5
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = load i8*, i8** %3
store i8 %9, i8* %10
%11 = load i8, i8* %5
%12 = load i8*, i8** %4
store i8 %11, i8* %12
ret void
}

LLVM IR (-O2):
define void @tukar(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
store i8 %4, i8* %0
store i8 %3, i8* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  printf("Helloworld\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"Helloworld\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [11 x i8] c"Helloworld\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct timeval {
  long long tv_sec;
  int tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
long long get_current_time(void) {
  struct timeval te;
  gettimeofday(&te, NULL);
  long long milliseconds = te.tv_sec * 1000LL + te.tv_usec / 1000;
  return milliseconds;
}


x86 assembly (clang, -O0):
<get_current_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
imul   $0x3e8,-0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x20(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_current_time>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
imul   $0x3e8,0x8(%rsp),%rcx
movslq 0x10(%rsp),%rax
imul   $0x10624dd3,%rax,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rax
add    %edx,%eax
cltq
add    %rcx,%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { i64, i32 }
define i64 @get_current_time() {
%1 = alloca %struct.timeval
%2 = alloca i64
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%5 = load i64, i64* %4
%6 = mul nsw i64 %5, 1000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%8 = load i32, i32* %7
%9 = sdiv i32 %8, 1000
%10 = sext i32 %9 to i64
%11 = add nsw i64 %6, %10
store i64 %11, i64* %2
%12 = load i64, i64* %2
ret i64 %12
}

LLVM IR (-O2):
%struct.timeval = type { i64, i32 }
define i64 @get_current_time() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load i64, i64* %4
%6 = mul nsw i64 %5, 1000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%8 = load i32, i32* %7
%9 = sdiv i32 %8, 1000
%10 = sext i32 %9 to i64
%11 = add nsw i64 %6, %10
ret i64 %11
}
/* Variables and functions */
int readPos(char *, char **, int);
int readOne(char *s, int *ip) {
  int d;
  char *next;
  d = readPos(s, &next, 1);
  if (d > 0) {
    *ip = d;
    return 0;
  } else
    return d;
}


x86 assembly (clang, -O0):
<readOne>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x28(%rbp),%rsi
mov    $0x1,%edx
call   1030 <readPos@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jle    1154 <readOne+0x44>
mov    -0x1c(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
movl   $0x0,-0x4(%rbp)
jmp    115a <readOne+0x4a>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readOne>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
lea    0x8(%rsp),%rsi
mov    $0x1,%edx
call   1030 <readPos@plt>
test   %eax,%eax
jle    112f <readOne+0x1f>
mov    %eax,(%rbx)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @readOne(i8* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i8*
store i8* %0, i8** %4
store i32* %1, i32** %5
%8 = load i8*, i8** %4
%9 = call i32 @readPos(i8* %8, i8** %7, i32 1)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = load i32, i32* %6
%14 = load i32*, i32** %5
store i32 %13, i32* %14
store i32 0, i32* %3
br label %17
15: ; preds = %2
%16 = load i32, i32* %6
store i32 %16, i32* %3
br label %17
17: ; preds = %15, %12
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @readOne(i8* %0, i32* nocapture writeonly %1) {
%3 = alloca i8*
%4 = bitcast i8** %3 to i8*
%5 = call i32 @readPos(i8* %0, i8** %3, i32 1)
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %2
store i32 %5, i32* %1
br label %8
8: ; preds = %2, %7
%9 = phi i32 [ 0, %7 ], [ %5, %2 ]
ret i32 %9
}
void dump_scannums() {}


x86 assembly (clang, -O0):
<dump_scannums>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dump_scannums>:
ret

LLVM IR (-O0):
define void @dump_scannums() {
ret void
}

LLVM IR (-O2):
define void @dump_scannums() {
ret void
}
/* Variables and functions */
void *QSDK_alloc_memory_region();
int /*<<< orphan*/ qsdk_set_mr(void *, void *);
void *alias_init(void *dev, void *init_data) {
  void *alias_dev = QSDK_alloc_memory_region();
  qsdk_set_mr(dev, alias_dev);
  return alias_dev;
}


x86 assembly (clang, -O0):
<alias_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <QSDK_alloc_memory_region@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <qsdk_set_mr@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alias_init>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %eax,%eax
call   1040 <QSDK_alloc_memory_region@plt>
mov    %rax,%rbx
mov    %r14,%rdi
mov    %rax,%rsi
call   1030 <qsdk_set_mr@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @alias_init(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = call i8* (...) @QSDK_alloc_memory_region()
store i8* %6, i8** %5
%7 = load i8*, i8** %3
%8 = load i8*, i8** %5
%9 = call i32 @qsdk_set_mr(i8* %7, i8* %8)
%10 = load i8*, i8** %5
ret i8* %10
}

LLVM IR (-O2):
define i8* @alias_init(i8* %0, i8* nocapture readnone %1) {
%3 = tail call i8* (...) @QSDK_alloc_memory_region()
%4 = tail call i32 @qsdk_set_mr(i8* %0, i8* %3)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ stderr;
void oops(char *err, char *err2) {
  fprintf(stderr, "Error: %s", err);
  perror(err2);
  exit(1);
}


x86 assembly (clang, -O0):
<oops>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2e99(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xeac(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x10(%rbp),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<oops>:
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%rdx
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
lea    0xeb9(%rip),%rsi
call   1030 <fprintf@plt>
mov    %rbx,%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [10 x i8] c"Error: %s\00"
define void @oops(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = load i8*, i8** %4
%9 = call i32 @perror(i8* %8)
%10 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [10 x i8] c"Error: %s\00"
define void @oops(i8* %0, i8* nocapture %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %0)
%5 = tail call i32 @perror(i8* %1)
%6 = tail call i32 @exit(i32 1)
unreachable
}
void g_set_print_handler() {}


x86 assembly (clang, -O0):
<g_set_print_handler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_set_print_handler>:
ret

LLVM IR (-O0):
define void @g_set_print_handler() {
ret void
}

LLVM IR (-O2):
define void @g_set_print_handler() {
ret void
}
unsigned xrop3_250_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  stk1 = D | T;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_250_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_250_1_0>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
shl    $0x8,%esi
lea    0xff(%rsi),%ecx
not    %eax
and    %ecx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_250_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
store i32 %14, i32* %6
%15 = load i8, i8* %4
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 8
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
store i32 %20, i32* %7
%21 = load i32, i32* %5
%22 = load i32, i32* %7
%23 = or i32 %21, %22
store i32 %23, i32* %8
%24 = load i32, i32* %8
%25 = load i32, i32* %6
%26 = xor i32 %25, -1
%27 = and i32 %24, %26
%28 = load i32, i32* %5
%29 = load i32, i32* %6
%30 = and i32 %28, %29
%31 = or i32 %27, %30
ret i32 %31
}

LLVM IR (-O2):
define i32 @xrop3_250_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = shl nuw nsw i32 %5, 8
%7 = or i32 %6, 255
%8 = xor i32 %4, -1
%9 = and i32 %7, %8
%10 = or i32 %9, %3
ret i32 %10
}
/* Type definitions */
typedef union vec3 {
  int dummy;
} vec3;

/* Variables and functions */
union vec3 *vec3_div(union vec3 *, union vec3 *, float);
union vec3 *vec3_div_self(union vec3 *vi, float scalar) {
  return vec3_div(vi, vi, scalar);
}


x86 assembly (clang, -O0):
<vec3_div_self>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
movss  -0xc(%rbp),%xmm0
call   1030 <vec3_div@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec3_div_self>:
mov    %rdi,%rsi
jmp    1030 <vec3_div@plt>

LLVM IR (-O0):
%union.vec3 = type { i32 }
define %union.vec3* @vec3_div_self(%union.vec3* %0, float %1) {
%3 = alloca %union.vec3*
%4 = alloca float
store %union.vec3* %0, %union.vec3** %3
store float %1, float* %4
%5 = load %union.vec3*, %union.vec3** %3
%6 = load %union.vec3*, %union.vec3** %3
%7 = load float, float* %4
%8 = call %union.vec3* @vec3_div(%union.vec3* %5, %union.vec3* %6, float %7)
ret %union.vec3* %8
}

LLVM IR (-O2):
%union.vec3 = type { i32 }
define %union.vec3* @vec3_div_self(%union.vec3* %0, float %1) {
%3 = tail call %union.vec3* @vec3_div(%union.vec3* %0, %union.vec3* %0, float %1)
ret %union.vec3* %3
}
double comm_time(void) { return 0; }


x86 assembly (clang, -O0):
<comm_time>:
push   %rbp
mov    %rsp,%rbp
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<comm_time>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @comm_time() {
ret double 0.000000e+00
}

LLVM IR (-O2):
define double @comm_time() {
ret double 0.000000e+00
}
int getProgramBits() { return sizeof(int *) * 8; }


x86 assembly (clang, -O0):
<getProgramBits>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getProgramBits>:
mov    $0x40,%eax
ret

LLVM IR (-O0):
define i32 @getProgramBits() {
ret i32 64
}

LLVM IR (-O2):
define i32 @getProgramBits() {
ret i32 64
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(__attribute__((__unused__)) __attribute__((deprecated)) int argc,
         __attribute__((__unused__)) __attribute__((deprecated)) char **argv) {
  printf("boilerplate.c v0.0.1\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"boilerplate.c v0.0.1\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [21 x i8] c"boilerplate.c v0.0.1\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int isdigit(int ch) {
  if (ch >= 0x30 && ch <= 0x39)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x30,-0x8(%rbp)
jl     1127 <isdigit+0x27>
cmpl   $0x39,-0x8(%rbp)
jg     1127 <isdigit+0x27>
movl   $0x1,-0x4(%rbp)
jmp    112e <isdigit+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isdigit>:
add    $0xffffffd0,%edi
xor    %eax,%eax
cmp    $0xa,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isdigit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 57
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %2
br label %11
10: ; preds = %6, %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @isdigit(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
int net_init(void) { return 0; }


x86 assembly (clang, -O0):
<net_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<net_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @net_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @net_init() {
ret i32 0
}
/* Type definitions */
struct ConnectionNode {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int quit_func(struct ConnectionNode *conn, int argc, char **argv) {
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<quit_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<quit_func>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
call   1030 <exit@plt>

LLVM IR (-O0):
%struct.ConnectionNode = type { i32 }
@EXIT_SUCCESS = global i32 0
define i32 @quit_func(%struct.ConnectionNode* %0, i32 %1, i8** %2) {
%4 = alloca %struct.ConnectionNode*
%5 = alloca i32
%6 = alloca i8**
store %struct.ConnectionNode* %0, %struct.ConnectionNode** %4
store i32 %1, i32* %5
store i8** %2, i8*** %6
%7 = load i32, i32* @EXIT_SUCCESS
%8 = call i32 @exit(i32 %7)
unreachable
}

LLVM IR (-O2):
%struct.ConnectionNode = type { i32 }
@EXIT_SUCCESS = global i32 0
define i32 @quit_func(%struct.ConnectionNode* nocapture readnone %0, i32 %1, i8** nocapture readnone %2) {
%4 = load i32, i32* @EXIT_SUCCESS
%5 = tail call i32 @exit(i32 %4)
unreachable
}
unsigned char port_byte_in(unsigned short port) {
  unsigned char result;
  __asm__("in %%dx, %%al" : "=a"(result) : "d"(port));
  return result;
}


x86 assembly (clang, -O0):
<port_byte_in>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%al
mov    %al,-0x3(%rbp)
movzbl -0x3(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<port_byte_in>:
mov    %edi,%edx
in     (%dx),%al
ret

LLVM IR (-O0):
define zeroext i8 @port_byte_in(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i8
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i8 asm "in %dx, %al", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i8 %5, i8* %3
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @port_byte_in(i16 zeroext %0) {
%2 = tail call i8 asm "in %dx, %al", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i8 %2
}
int f1(int x, int y) {
  if (x == -0x7fffffff - 1)
    __builtin_unreachable();
  return x % -y;
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x80000000,-0x4(%rbp)
jne    1117 <f1+0x17>
mov    -0x4(%rbp),%eax
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
mov    %edi,%eax
neg    %esi
cltd
idiv   %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @f1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, -2147483648
br i1 %6, label %7, label %8
7: ; preds = %2
unreachable
8: ; preds = %2
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = sub nsw i32 0, %10
%12 = srem i32 %9, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @f1(i32 %0, i32 %1) {
%3 = icmp ne i32 %0, -2147483648
tail call void @llvm.assume(i1 %3)
%4 = sub nsw i32 0, %1
%5 = srem i32 %0, %4
ret i32 %5
}