xunge/DecIR huggingface dataset:
/* Variables and functions */
int strlen(char *);
char tolower(char);
void lowercase_string(char *str) {
  int len;
  int i;
  len = strlen(str);
  for (i = 0; i < len; i++) {
    str[i] = tolower(str[i]);
  }
}


x86 assembly (clang, -O0):
<lowercase_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1177 <lowercase_string+0x57>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1040 <tolower@plt>
mov    %al,%dl
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    113f <lowercase_string+0x1f>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lowercase_string>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r15
call   1030 <strlen@plt>
test   %eax,%eax
jle    1157 <lowercase_string+0x37>
mov    %eax,%r14d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
movsbl (%r15,%rbx,1),%edi
call   1040 <tolower@plt>
mov    %al,(%r15,%rbx,1)
add    $0x1,%rbx
cmp    %rbx,%r14
jne    1140 <lowercase_string+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @lowercase_string(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
store i32 %6, i32* %3
store i32 0, i32* %4
br label %7
7: ; preds = %22, %1
%8 = load i32, i32* %4
%9 = load i32, i32* %3
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %25
11: ; preds = %7
%12 = load i8*, i8** %2
%13 = load i32, i32* %4
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = call signext i8 @tolower(i8 signext %16)
%18 = load i8*, i8** %2
%19 = load i32, i32* %4
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
store i8 %17, i8* %21
br label %22
22: ; preds = %11
%23 = load i32, i32* %4
%24 = add nsw i32 %23, 1
store i32 %24, i32* %4
br label %7
25: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @lowercase_string(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %13
4: ; preds = %1
%5 = zext i32 %2 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
%10 = tail call signext i8 @tolower(i8 signext %9)
store i8 %10, i8* %8
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %1
ret void
}
void usr_output(void) {}


x86 assembly (clang, -O0):
<usr_output>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usr_output>:
ret

LLVM IR (-O0):
define void @usr_output() {
ret void
}

LLVM IR (-O2):
define void @usr_output() {
ret void
}
int test_imm_D9int16_reg(short val) {
  return ((val) & (0xD9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D9int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xd9,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D9int16_reg>:
test   $0xd9,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D9int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 217
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D9int16_reg(i16 signext %0) {
%2 = and i16 %0, 217
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int intcmp(void *a, void *b) {
  if (!a || !b)
    return 0;
  return *(int *)a - *(int *)b;
}


x86 assembly (clang, -O0):
<intcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1122 <intcmp+0x22>
cmpq   $0x0,-0x18(%rbp)
jne    112e <intcmp+0x2e>
movl   $0x0,-0x4(%rbp)
jmp    113d <intcmp+0x3d>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
sub    (%rcx),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intcmp>:
xor    %eax,%eax
test   %rdi,%rdi
je     1110 <intcmp+0x10>
test   %rsi,%rsi
je     1110 <intcmp+0x10>
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @intcmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %12, label %11
11: ; preds = %8, %2
store i32 0, i32* %3
br label %20
12: ; preds = %8
%13 = load i8*, i8** %4
%14 = bitcast i8* %13 to i32*
%15 = load i32, i32* %14
%16 = load i8*, i8** %5
%17 = bitcast i8* %16 to i32*
%18 = load i32, i32* %17
%19 = sub nsw i32 %15, %18
store i32 %19, i32* %3
br label %20
20: ; preds = %12, %11
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @intcmp(i8* %0, i8* %1) {
%3 = icmp ne i8* %0, null
%4 = icmp ne i8* %1, null
%5 = and i1 %3, %4
br i1 %5, label %6, label %12
6: ; preds = %2
%7 = bitcast i8* %0 to i32*
%8 = load i32, i32* %7
%9 = bitcast i8* %1 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %8, %10
br label %12
12: ; preds = %2, %6
%13 = phi i32 [ %11, %6 ], [ 0, %2 ]
ret i32 %13
}
int test_imm_30int64_lowword_reg(long long val) {
  return ((val) & (0x30 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_30int64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x30,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_30int64_lowword_reg>:
test   $0x30,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_30int64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 48
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_30int64_lowword_reg(i64 %0) {
%2 = and i64 %0, 48
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
struct lldp_tlv {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ validate_length_max_255(struct lldp_tlv *);
uint8_t validate_system_name_tlv(struct lldp_tlv *tlv) {
  return validate_length_max_255(tlv);
}


x86 assembly (clang, -O0):
<validate_system_name_tlv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <validate_length_max_255@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<validate_system_name_tlv>:
jmp    1030 <validate_length_max_255@plt>

LLVM IR (-O0):
%struct.lldp_tlv = type { i32 }
define i32 @validate_system_name_tlv(%struct.lldp_tlv* %0) {
%2 = alloca %struct.lldp_tlv*
store %struct.lldp_tlv* %0, %struct.lldp_tlv** %2
%3 = load %struct.lldp_tlv*, %struct.lldp_tlv** %2
%4 = call i32 @validate_length_max_255(%struct.lldp_tlv* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.lldp_tlv = type { i32 }
define i32 @validate_system_name_tlv(%struct.lldp_tlv* %0) {
%2 = tail call i32 @validate_length_max_255(%struct.lldp_tlv* %0)
ret i32 %2
}
unsigned int GPIORevisionInfoGet(unsigned int baseAdd) {
  return ((*((volatile unsigned int *)(baseAdd + (0x0)))));
}


x86 assembly (clang, -O0):
<GPIORevisionInfoGet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x0,%eax
mov    %eax,%eax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIORevisionInfoGet>:
mov    %edi,%eax
mov    (%rax),%eax
ret

LLVM IR (-O0):
define i32 @GPIORevisionInfoGet(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 0
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @GPIORevisionInfoGet(i32 %0) {
%2 = zext i32 %0 to i64
%3 = inttoptr i64 %2 to i32*
%4 = load volatile i32, i32* %3
ret i32 %4
}
int _wait_r(struct _reent *r, int *status) { return -1; }


x86 assembly (clang, -O0):
<_wait_r>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_wait_r>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct._reent = type opaque
define i32 @_wait_r(%struct._reent* %0, i32* %1) {
%3 = alloca %struct._reent*
%4 = alloca i32*
store %struct._reent* %0, %struct._reent** %3
store i32* %1, i32** %4
ret i32 -1
}

LLVM IR (-O2):
%struct._reent = type opaque
define i32 @_wait_r(%struct._reent* nocapture readnone %0, i32* nocapture readnone %1) {
ret i32 -1
}
void MergeRGBRow_SSSE3() {}


x86 assembly (clang, -O0):
<MergeRGBRow_SSSE3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MergeRGBRow_SSSE3>:
ret

LLVM IR (-O0):
define void @MergeRGBRow_SSSE3() {
ret void
}

LLVM IR (-O2):
define void @MergeRGBRow_SSSE3() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ die(char *);
void usage(void) {
  die("relocs [--abs-syms |--abs-relocs | --text] vmlinux\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <die@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <die@plt>

LLVM IR (-O0):
@.str = [52 x i8] c"relocs [--abs-syms |--abs-relocs | --text] vmlinux\0A\00"
define void @usage() {
%1 = call i32 @die(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [52 x i8] c"relocs [--abs-syms |--abs-relocs | --text] vmlinux\0A\00"
define void @usage() {
%1 = tail call i32 @die(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct tagStanza {
  int dummy;
};

/* Variables and functions */
char *tagFindVal(struct tagStanza *, char *);
char *tagStanzaRqlLookupField(void *record, char *key) {
  struct tagStanza *stanza = record;
  return tagFindVal(stanza, key);
}


x86 assembly (clang, -O0):
<tagStanzaRqlLookupField>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <tagFindVal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tagStanzaRqlLookupField>:
jmp    1030 <tagFindVal@plt>

LLVM IR (-O0):
%struct.tagStanza = type { i32 }
define i8* @tagStanzaRqlLookupField(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca %struct.tagStanza*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.tagStanza*
store %struct.tagStanza* %7, %struct.tagStanza** %5
%8 = load %struct.tagStanza*, %struct.tagStanza** %5
%9 = load i8*, i8** %4
%10 = call i8* @tagFindVal(%struct.tagStanza* %8, i8* %9)
ret i8* %10
}

LLVM IR (-O2):
%struct.tagStanza = type { i32 }
define i8* @tagStanzaRqlLookupField(i8* %0, i8* %1) {
%3 = bitcast i8* %0 to %struct.tagStanza*
%4 = tail call i8* @tagFindVal(%struct.tagStanza* %3, i8* %1)
ret i8* %4
}
/* Type definitions */
struct nfa {
  int dummy;
};

/* Variables and functions */
struct nfa *concat_nfas(struct nfa *, struct nfa *);
struct nfa *new_range_nfa(int, int);
struct nfa *whole_lines_nfa(struct nfa *nfa) {
  struct nfa *input_begin;
  struct nfa *input_end;
  input_begin = new_range_nfa((127 + 1), 1);
  input_end = new_range_nfa((127 + 1), 2);
  nfa = concat_nfas(input_begin, nfa);
  nfa = concat_nfas(nfa, input_end);
  return nfa;
}


x86 assembly (clang, -O0):
<whole_lines_nfa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x80,%edi
mov    $0x1,%esi
call   1030 <new_range_nfa@plt>
mov    %rax,-0x10(%rbp)
mov    $0x80,%edi
mov    $0x2,%esi
call   1030 <new_range_nfa@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <concat_nfas@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <concat_nfas@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<whole_lines_nfa>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
mov    $0x80,%edi
mov    $0x1,%esi
call   1030 <new_range_nfa@plt>
mov    %rax,%r15
mov    $0x80,%edi
mov    $0x2,%esi
call   1030 <new_range_nfa@plt>
mov    %rax,%rbx
mov    %r15,%rdi
mov    %r14,%rsi
call   1040 <concat_nfas@plt>
mov    %rax,%rdi
mov    %rbx,%rsi
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <concat_nfas@plt>

LLVM IR (-O0):
%struct.nfa = type { i32 }
define %struct.nfa* @whole_lines_nfa(%struct.nfa* %0) {
%2 = alloca %struct.nfa*
%3 = alloca %struct.nfa*
%4 = alloca %struct.nfa*
store %struct.nfa* %0, %struct.nfa** %2
%5 = call %struct.nfa* @new_range_nfa(i32 128, i32 1)
store %struct.nfa* %5, %struct.nfa** %3
%6 = call %struct.nfa* @new_range_nfa(i32 128, i32 2)
store %struct.nfa* %6, %struct.nfa** %4
%7 = load %struct.nfa*, %struct.nfa** %3
%8 = load %struct.nfa*, %struct.nfa** %2
%9 = call %struct.nfa* @concat_nfas(%struct.nfa* %7, %struct.nfa* %8)
store %struct.nfa* %9, %struct.nfa** %2
%10 = load %struct.nfa*, %struct.nfa** %2
%11 = load %struct.nfa*, %struct.nfa** %4
%12 = call %struct.nfa* @concat_nfas(%struct.nfa* %10, %struct.nfa* %11)
store %struct.nfa* %12, %struct.nfa** %2
%13 = load %struct.nfa*, %struct.nfa** %2
ret %struct.nfa* %13
}

LLVM IR (-O2):
%struct.nfa = type { i32 }
define %struct.nfa* @whole_lines_nfa(%struct.nfa* %0) {
%2 = tail call %struct.nfa* @new_range_nfa(i32 128, i32 1)
%3 = tail call %struct.nfa* @new_range_nfa(i32 128, i32 2)
%4 = tail call %struct.nfa* @concat_nfas(%struct.nfa* %2, %struct.nfa* %0)
%5 = tail call %struct.nfa* @concat_nfas(%struct.nfa* %4, %struct.nfa* %3)
ret %struct.nfa* %5
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "usage: imgsplit\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [17 x i8] c"usage: imgsplit\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [17 x i8] c"usage: imgsplit\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
char *meson_print();
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char **argv) {
  char *t = meson_print();
  printf("%s", t);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <meson_print@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <meson_print@plt>
lea    0xed1(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i8* (...) @meson_print()
store i8* %7, i8** %6
%8 = load i8*, i8** %6
%9 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i8* (...) @meson_print()
%4 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ paths_is_absolute(char *);
bool paths_is_relative(char *path) { return !paths_is_absolute(path); }


x86 assembly (clang, -O0):
<paths_is_relative>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <paths_is_absolute@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<paths_is_relative>:
push   %rax
call   1030 <paths_is_absolute@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @paths_is_relative(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @paths_is_absolute(i8* %3)
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @paths_is_relative(i8* %0) {
%2 = tail call i32 @paths_is_absolute(i8* %0)
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t Endian_byteSwap64_manual(uint64_t input) {
  input = ((input >> 8) & 0x00FF00FF00FF00FFull) |
          ((input & 0x00FF00FF00FF00FFull) << 8);
  input = ((input >> 16) & 0x0000FFFF0000FFFFull) |
          ((input & 0x0000FFFF0000FFFFull) << 16);
  return ((input >> 32) & 0x00000000FFFFFFFFull) |
         ((input & 0x00000000FFFFFFFFull) << 32);
}


x86 assembly (clang, -O0):
<Endian_byteSwap64_manual>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
cltq
movabs $0xff00ff00ff00ff,%rcx
and    %rcx,%rax
movslq -0x4(%rbp),%rcx
movabs $0xff00ff00ff00ff,%rdx
and    %rdx,%rcx
shl    $0x8,%rcx
or     %rcx,%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
cltq
movabs $0xffff0000ffff,%rcx
and    %rcx,%rax
movslq -0x4(%rbp),%rcx
movabs $0xffff0000ffff,%rdx
and    %rdx,%rcx
shl    $0x10,%rcx
or     %rcx,%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
sar    %cl,%eax
cltq
movabs $0xffffffff,%rcx
and    %rcx,%rax
movslq -0x4(%rbp),%rcx
movabs $0xffffffff,%rdx
and    %rdx,%rcx
shl    $0x20,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Endian_byteSwap64_manual>:
ret

LLVM IR (-O0):
define i32 @Endian_byteSwap64_manual(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 8
%5 = sext i32 %4 to i64
%6 = and i64 %5, 71777214294589695
%7 = load i32, i32* %2
%8 = sext i32 %7 to i64
%9 = and i64 %8, 71777214294589695
%10 = shl i64 %9, 8
%11 = or i64 %6, %10
%12 = trunc i64 %11 to i32
store i32 %12, i32* %2
%13 = load i32, i32* %2
%14 = ashr i32 %13, 16
%15 = sext i32 %14 to i64
%16 = and i64 %15, 281470681808895
%17 = load i32, i32* %2
%18 = sext i32 %17 to i64
%19 = and i64 %18, 281470681808895
%20 = shl i64 %19, 16
%21 = or i64 %16, %20
%22 = trunc i64 %21 to i32
store i32 %22, i32* %2
%23 = load i32, i32* %2
%24 = ashr i32 %23, 32
%25 = sext i32 %24 to i64
%26 = and i64 %25, 4294967295
%27 = load i32, i32* %2
%28 = sext i32 %27 to i64
%29 = and i64 %28, 4294967295
%30 = shl i64 %29, 32
%31 = or i64 %26, %30
%32 = trunc i64 %31 to i32
ret i32 %32
}

LLVM IR (-O2):
define i32 @Endian_byteSwap64_manual(i32 %0) {
ret i32 poison
}
/* Variables and functions */
int foo_answer();
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("%d\n", foo_answer());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <foo_answer@plt>
mov    %eax,%esi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <foo_answer@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @foo_answer()
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @foo_answer()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
int td_isdigit(c)
int c;
{ return (c >= '0' && c <= '9'); }


x86 assembly (clang, -O0):
<td_isdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x30,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <td_isdigit+0x20>
cmpl   $0x39,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<td_isdigit>:
add    $0xffffffd0,%edi
xor    %eax,%eax
cmp    $0xa,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @td_isdigit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 48
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 57
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @td_isdigit(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_rwlock_t;

/* Variables and functions */
int /*<<< orphan*/ pthread_rwlock_destroy(int /*<<< orphan*/ *);
void kl_pthread_rwlock_destroy(void *data) {
  pthread_rwlock_destroy((pthread_rwlock_t *)data);
}


x86 assembly (clang, -O0):
<kl_pthread_rwlock_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pthread_rwlock_destroy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kl_pthread_rwlock_destroy>:
jmp    1030 <pthread_rwlock_destroy@plt>

LLVM IR (-O0):
define void @kl_pthread_rwlock_destroy(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = call i32 @pthread_rwlock_destroy(i32* %4)
ret void
}

LLVM IR (-O2):
define void @kl_pthread_rwlock_destroy(i8* %0) {
%2 = bitcast i8* %0 to i32*
%3 = tail call i32 @pthread_rwlock_destroy(i32* %2)
ret void
}
/* Variables and functions */
double __floatsidf(long);
float __floatsisf(long l) {
  double foo = __floatsidf(l);
  return foo;
}


x86 assembly (clang, -O0):
<__floatsisf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__floatsidf@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__floatsisf>:
push   %rax
call   1030 <__floatsidf@plt>
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @__floatsisf(i64 %0) {
%2 = alloca i64
%3 = alloca double
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call double @__floatsidf(i64 %4)
store double %5, double* %3
%6 = load double, double* %3
%7 = fptrunc double %6 to float
ret float %7
}

LLVM IR (-O2):
define float @__floatsisf(i64 %0) {
%2 = tail call double @__floatsidf(i64 %0)
%3 = fptrunc double %2 to float
ret float %3
}
/* Type definitions */
struct Conn {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wlogf(int, char *);
void ssl_close(struct Conn *this) {
  wlogf(057, "ssl_close: Not implemented\n");
}


x86 assembly (clang, -O0):
<ssl_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x2f,%edi
lea    0xed8(%rip),%rsi
call   1030 <wlogf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssl_close>:
lea    0xee9(%rip),%rsi
mov    $0x2f,%edi
jmp    1030 <wlogf@plt>

LLVM IR (-O0):
%struct.Conn = type { i32 }
@.str = [28 x i8] c"ssl_close: Not implemented\0A\00"
define void @ssl_close(%struct.Conn* %0) {
%2 = alloca %struct.Conn*
store %struct.Conn* %0, %struct.Conn** %2
%3 = call i32 @wlogf(i32 47, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.Conn = type { i32 }
@.str = [28 x i8] c"ssl_close: Not implemented\0A\00"
define void @ssl_close(%struct.Conn* nocapture readnone %0) {
%2 = tail call i32 @wlogf(i32 47, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
ret void
}
__attribute__((always_)) void cl_prefetch_t0(void *p) {
  asm volatile("prefetcht0 (%0)\n\t" : : "r"(p) : "memory");
}


x86 assembly (clang, -O0):
<cl_prefetch_t0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
prefetcht0 (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cl_prefetch_t0>:
prefetcht0 (%rdi)
ret

LLVM IR (-O0):
define void @cl_prefetch_t0(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @cl_prefetch_t0(i8* %0) {
tail call void asm sideeffect "prefetcht0 ($0)\0A\09", "r,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ PKCS7_ISSUER_AND_SERIAL;
typedef int /*<<< orphan*/ EVP_MD;

/* Variables and functions */
int ASN1_item_digest(int /*<<< orphan*/ *, int /*<<< orphan*/ const *, char *,
                     unsigned char *, unsigned int *);
int /*<<< orphan*/ PKCS7_ISSUER_AND_SERIAL_it;
int PKCS7_ISSUER_AND_SERIAL_digest(PKCS7_ISSUER_AND_SERIAL *data,
                                   const EVP_MD *type, unsigned char *md,
                                   unsigned int *len) {
  return (ASN1_item_digest(&PKCS7_ISSUER_AND_SERIAL_it, type, (char *)data, md,
                           len));
}


x86 assembly (clang, -O0):
<PKCS7_ISSUER_AND_SERIAL_digest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
mov    0x2ea9(%rip),%rdi
call   1030 <ASN1_item_digest@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PKCS7_ISSUER_AND_SERIAL_digest>:
mov    %rcx,%r8
mov    %rdx,%rcx
mov    %rdi,%rdx
mov    0x2ec8(%rip),%rdi
jmp    1030 <ASN1_item_digest@plt>

LLVM IR (-O0):
@PKCS7_ISSUER_AND_SERIAL_it = global i32 0
define i32 @PKCS7_ISSUER_AND_SERIAL_digest(i32* %0, i32* %1, i8* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i8*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i8* %2, i8** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %6
%10 = load i32*, i32** %5
%11 = bitcast i32* %10 to i8*
%12 = load i8*, i8** %7
%13 = load i32*, i32** %8
%14 = call i32 @ASN1_item_digest(i32* @PKCS7_ISSUER_AND_SERIAL_it, i32* %9, i8* %11, i8* %12, i32* %13)
ret i32 %14
}

LLVM IR (-O2):
@PKCS7_ISSUER_AND_SERIAL_it = global i32 0
define i32 @PKCS7_ISSUER_AND_SERIAL_digest(i32* %0, i32* %1, i8* %2, i32* %3) {
%5 = bitcast i32* %0 to i8*
%6 = tail call i32 @ASN1_item_digest(i32* @PKCS7_ISSUER_AND_SERIAL_it, i32* %1, i8* %5, i8* %2, i32* %3)
ret i32 %6
}
long put_point(string)
char *string[];
{
  long level;
  if (sscanf(*string, "%d", &level) != 1)
    return (0);
  if (!char_putpoint(level))
    return (0);
  return (1);
}


x86 assembly (clang, -O0):
<put_point>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
lea    0xec6(%rip),%rsi
lea    -0x18(%rbp),%rdx
mov    $0x0,%al
call   1040 <sscanf@plt>
cmp    $0x1,%eax
je     115b <put_point+0x3b>
movq   $0x0,-0x8(%rbp)
jmp    1184 <put_point+0x64>
mov    -0x18(%rbp),%rdi
mov    $0x0,%al
call   1030 <char_putpoint@plt>
cmp    $0x0,%eax
jne    117c <put_point+0x5c>
movq   $0x0,-0x8(%rbp)
jmp    1184 <put_point+0x64>
movq   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_point>:
push   %rbx
sub    $0x10,%rsp
mov    (%rdi),%rdi
lea    0xed1(%rip),%rsi
xor    %ebx,%ebx
lea    0x8(%rsp),%rdx
xor    %eax,%eax
call   1040 <sscanf@plt>
cmp    $0x1,%eax
jne    1155 <put_point+0x35>
mov    0x8(%rsp),%rdi
xor    %eax,%eax
call   1030 <char_putpoint@plt>
xor    %ebx,%ebx
test   %eax,%eax
setne  %bl
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i64 @put_point(i8** %0) {
%2 = alloca i64
%3 = alloca i8**
%4 = alloca i64
store i8** %0, i8*** %3
%5 = load i8**, i8*** %3
%6 = load i8*, i8** %5
%7 = call i32 (i8*, i8*, ...) @sscanf(i8* %6, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i64* %4)
%8 = icmp ne i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %1
store i64 0, i64* %2
br label %16
10: ; preds = %1
%11 = load i64, i64* %4
%12 = call i32 (i64, ...) bitcast (i32 (...)* @char_putpoint to i32 (i64, ...)*)(i64 %11)
%13 = icmp ne i32 %12, 0
br i1 %13, label %15, label %14
14: ; preds = %10
store i64 0, i64* %2
br label %16
15: ; preds = %10
store i64 1, i64* %2
br label %16
16: ; preds = %15, %14, %9
%17 = load i64, i64* %2
ret i64 %17
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i64 @put_point(i8** nocapture %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = load i8*, i8** %0
%5 = call i32 (i8*, i8*, ...) @sscanf(i8* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i64* %2)
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i64, i64* %2
%9 = call i32 (i64, ...) bitcast (i32 (...)* @char_putpoint to i32 (i64, ...)*)(i64 %8)
%10 = icmp ne i32 %9, 0
%11 = zext i1 %10 to i64
br label %12
12: ; preds = %7, %1
%13 = phi i64 [ 0, %1 ], [ %11, %7 ]
ret i64 %13
}
/* Variables and functions */
int /*<<< orphan*/ free(float *);
float *malloc(int);
int /*<<< orphan*/ vectorisize(float *, size_t);
int main(int argc, char **argv) {
  size_t size = 20;
  float *tabFloat = malloc(sizeof(float) * size);
  vectorisize(tabFloat, size);
  free(tabFloat);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x14,-0x18(%rbp)
mov    -0x18(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1050 <vectorisize@plt>
mov    -0x20(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x50,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    $0x14,%esi
mov    %rax,%rdi
call   1050 <vectorisize@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i64
%7 = alloca float*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i64 20, i64* %6
%8 = load i64, i64* %6
%9 = mul i64 4, %8
%10 = trunc i64 %9 to i32
%11 = call float* @malloc(i32 %10)
store float* %11, float** %7
%12 = load float*, float** %7
%13 = load i64, i64* %6
%14 = call i32 @vectorisize(float* %12, i64 %13)
%15 = load float*, float** %7
%16 = call i32 @free(float* %15)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call float* @malloc(i32 80)
%4 = tail call i32 @vectorisize(float* %3, i64 20)
%5 = tail call i32 @free(float* %3)
ret i32 0
}
int alock_auth_none_init(const char *args) { return 1; }


x86 assembly (clang, -O0):
<alock_auth_none_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<alock_auth_none_init>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @alock_auth_none_init(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @alock_auth_none_init(i8* nocapture readnone %0) {
ret i32 1
}
unsigned short bitreverse1(unsigned short i) {
  return ((i & 0x5555) << 1) | ((i & 0xAAAA) >> 1);
}


x86 assembly (clang, -O0):
<bitreverse1>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
and    $0x5555,%eax
shl    $0x1,%eax
movzwl -0x2(%rbp),%ecx
and    $0xaaaa,%ecx
sar    $0x1,%ecx
or     %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitreverse1>:
mov    %edi,%eax
and    $0xd555,%eax
shr    %edi
and    $0x5555,%edi
lea    (%rdi,%rax,2),%eax
ret

LLVM IR (-O0):
define zeroext i16 @bitreverse1(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 21845
%6 = shl i32 %5, 1
%7 = load i16, i16* %2
%8 = zext i16 %7 to i32
%9 = and i32 %8, 43690
%10 = ashr i32 %9, 1
%11 = or i32 %6, %10
%12 = trunc i32 %11 to i16
ret i16 %12
}

LLVM IR (-O2):
define zeroext i16 @bitreverse1(i16 zeroext %0) {
%2 = shl i16 %0, 1
%3 = and i16 %2, -21846
%4 = lshr i16 %0, 1
%5 = and i16 %4, 21845
%6 = or i16 %3, %5
ret i16 %6
}
_Bool QuietLessEqual(float f1, float f2) {
  return __builtin_islessequal(f1, f2);
}


x86 assembly (clang, -O0):
<QuietLessEqual>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<QuietLessEqual>:
ucomiss %xmm0,%xmm1
setae  %al
ret

LLVM IR (-O0):
define zeroext i1 @QuietLessEqual(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp ole float %5, %6
ret i1 %7
}

LLVM IR (-O2):
define zeroext i1 @QuietLessEqual(float %0, float %1) {
%3 = fcmp ole float %0, %1
ret i1 %3
}
/* Variables and functions */
unsigned char clear_bitmask();
int /*<<< orphan*/ print_bits(unsigned char);
int /*<<< orphan*/ printf(char *, char *);
int main(void) {
  unsigned char result = clear_bitmask();
  printf("%s", "The result is ");
  print_bits(result);
  printf("%s", "\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <clear_bitmask@plt>
mov    %al,-0x5(%rbp)
lea    0xeb0(%rip),%rdi
lea    0xeac(%rip),%rsi
call   1030 <printf@plt>
movzbl -0x5(%rbp),%edi
call   1040 <print_bits@plt>
lea    0xe94(%rip),%rdi
lea    0xe9f(%rip),%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %eax,%eax
call   1050 <clear_bitmask@plt>
mov    %eax,%ebx
lea    0xebc(%rip),%r14
lea    0xeb8(%rip),%rsi
mov    %r14,%rdi
call   1030 <printf@plt>
movzbl %bl,%edi
call   1040 <print_bits@plt>
lea    0xeb0(%rip),%rsi
mov    %r14,%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [15 x i8] c"The result is \00"
@.str.2 = [2 x i8] c"\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
%3 = call zeroext i8 (...) @clear_bitmask()
store i8 %3, i8* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
%5 = load i8, i8* %2
%6 = call i32 @print_bits(i8 zeroext %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@.str.1 = [15 x i8] c"The result is \00"
@.str.2 = [2 x i8] c"\0A\00"
define i32 @main() {
%1 = tail call zeroext i8 (...) @clear_bitmask()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @print_bits(i8 zeroext %1)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct jrnl {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ LOG_INFO;
int /*<<< orphan*/ syslog(int /*<<< orphan*/, char *, int);
int jrnld_listen_handler(struct jrnl *j __attribute__((unused)), int sock) {
  syslog(LOG_INFO, "handler with %d!", sock);
  return 0;
}


x86 assembly (clang, -O0):
<jrnld_listen_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    -0xc(%rbp),%edx
lea    0xece(%rip),%rsi
call   1030 <syslog@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jrnld_listen_handler>:
push   %rax
mov    %esi,%edx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
call   1030 <syslog@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.jrnl = type { i32 }
@LOG_INFO = global i32 0
@.str = [17 x i8] c"handler with %d!\00"
define i32 @jrnld_listen_handler(%struct.jrnl* %0, i32 %1) {
%3 = alloca %struct.jrnl*
%4 = alloca i32
store %struct.jrnl* %0, %struct.jrnl** %3
store i32 %1, i32* %4
%5 = load i32, i32* @LOG_INFO
%6 = load i32, i32* %4
%7 = call i32 @syslog(i32 %5, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
%struct.jrnl = type { i32 }
@LOG_INFO = global i32 0
@.str = [17 x i8] c"handler with %d!\00"
define i32 @jrnld_listen_handler(%struct.jrnl* nocapture readnone %0, i32 %1) {
%3 = load i32, i32* @LOG_INFO
%4 = tail call i32 @syslog(i32 %3, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void PrintWelcome(void) {
  printf("\nmakefsfile - Generate a file containing a file system image.\n");
  printf("Copyright (c) 2008-2016 Texas Instruments Incorporated.  All rights "
         "reserved.\n\n");
}


x86 assembly (clang, -O0):
<PrintWelcome>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf18(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PrintWelcome>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf1a(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [63 x i8] c"\0Amakefsfile - Generate a file containing a file system image.\0A\00"
@.str.1 = [80 x i8] c"Copyright (c) 2008-2016 Texas Instruments Incorporated. All rights reserved.\0A\0A\00"
define void @PrintWelcome() {
%1 = call i32 @printf(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([80 x i8], [80 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [62 x i8] c"\0Amakefsfile - Generate a file containing a file system image.\00"
@str.2 = [79 x i8] c"Copyright (c) 2008-2016 Texas Instruments Incorporated. All rights reserved.\0A\00"
define void @PrintWelcome() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([62 x i8], [62 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([79 x i8], [79 x i8]* @str.2, i64 0, i64 0))
ret void
}
int test_imm_B6uint16_mem(unsigned short *val) {
  return ((*val) & (0xB6 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B6uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xb6,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B6uint16_mem>:
testb  $0xb6,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B6uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 182
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_B6uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 182
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void wifi_rsp_system_reset(const void *nul) {}


x86 assembly (clang, -O0):
<wifi_rsp_system_reset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifi_rsp_system_reset>:
ret

LLVM IR (-O0):
define void @wifi_rsp_system_reset(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @wifi_rsp_system_reset(i8* nocapture %0) {
ret void
}
void Int_ManTruthClear(unsigned *p, int nWords) {
  int i;
  for (i = nWords - 1; i >= 0; i--)
    p[i] = 0;
}


x86 assembly (clang, -O0):
<Int_ManTruthClear>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jl     113b <Int_ManTruthClear+0x3b>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movl   $0x0,(%rax,%rcx,4)
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    1114 <Int_ManTruthClear+0x14>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Int_ManTruthClear>:
test   %esi,%esi
jle    1126 <Int_ManTruthClear+0x16>
push   %rax
mov    %esi,%edx
shl    $0x2,%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @Int_ManTruthClear(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
store i32 %7, i32* %5
br label %8
8: ; preds = %16, %2
%9 = load i32, i32* %5
%10 = icmp sge i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %8
%12 = load i32*, i32** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
store i32 0, i32* %15
br label %16
16: ; preds = %11
%17 = load i32, i32* %5
%18 = add nsw i32 %17, -1
store i32 %18, i32* %5
br label %8
19: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @Int_ManTruthClear(i32* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = bitcast i32* %0 to i8*
%6 = zext i32 %1 to i64
%7 = shl nuw nsw i64 %6, 2
br label %8
8: ; preds = %4, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ str_copy(char *, char *);
void str_swap(char *ds, char *sr) {
  char ch[80];
  str_copy(ch, sr);
  str_copy(sr, ds);
  str_copy(ds, ch);
}


x86 assembly (clang, -O0):
<str_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x60(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <str_copy@plt>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <str_copy@plt>
mov    -0x8(%rbp),%rdi
lea    -0x60(%rbp),%rsi
call   1030 <str_copy@plt>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_swap>:
push   %r15
push   %r14
push   %rbx
sub    $0x50,%rsp
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsp,%r15
mov    %r15,%rdi
call   1030 <str_copy@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <str_copy@plt>
mov    %r14,%rdi
mov    %r15,%rsi
call   1030 <str_copy@plt>
add    $0x50,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @str_swap(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca [80 x i8]
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = getelementptr inbounds [80 x i8], [80 x i8]* %5, i64 0, i64 0
%7 = load i8*, i8** %4
%8 = call i32 @str_copy(i8* %6, i8* %7)
%9 = load i8*, i8** %4
%10 = load i8*, i8** %3
%11 = call i32 @str_copy(i8* %9, i8* %10)
%12 = load i8*, i8** %3
%13 = getelementptr inbounds [80 x i8], [80 x i8]* %5, i64 0, i64 0
%14 = call i32 @str_copy(i8* %12, i8* %13)
ret void
}

LLVM IR (-O2):
define void @str_swap(i8* %0, i8* %1) {
%3 = alloca [80 x i8]
%4 = getelementptr inbounds [80 x i8], [80 x i8]* %3, i64 0, i64 0
%5 = call i32 @str_copy(i8* %4, i8* %1)
%6 = call i32 @str_copy(i8* %1, i8* %0)
%7 = call i32 @str_copy(i8* %0, i8* %4)
ret void
}
int test_imm_D7uint16_mem(unsigned short *val) {
  return ((*val) & (0xD7 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D7uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xd7,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D7uint16_mem>:
testb  $0xd7,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D7uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 215
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_D7uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 215
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M120_f(char *s) {
  debug("M120_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M120_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M120_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M120_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M120_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M120_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M120_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ bfdutil_iprules(int, unsigned char *, unsigned char *,
                                   unsigned char *, unsigned char *, int);
void bfdutil_set_iprules(int debug, unsigned char *intfname,
                         unsigned char *localip, unsigned char *remoteip,
                         unsigned char *echoremoteip) {
  bfdutil_iprules(debug, intfname, localip, remoteip, echoremoteip, 1);
  return;
}


x86 assembly (clang, -O0):
<bfdutil_set_iprules>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    $0x1,%r9d
call   1030 <bfdutil_iprules@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bfdutil_set_iprules>:
mov    $0x1,%r9d
jmp    1030 <bfdutil_iprules@plt>

LLVM IR (-O0):
define void @bfdutil_set_iprules(i32 %0, i8* %1, i8* %2, i8* %3, i8* %4) {
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i8*
store i32 %0, i32* %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i8* %3, i8** %9
store i8* %4, i8** %10
%11 = load i32, i32* %6
%12 = load i8*, i8** %7
%13 = load i8*, i8** %8
%14 = load i8*, i8** %9
%15 = load i8*, i8** %10
%16 = call i32 @bfdutil_iprules(i32 %11, i8* %12, i8* %13, i8* %14, i8* %15, i32 1)
ret void
}

LLVM IR (-O2):
define void @bfdutil_set_iprules(i32 %0, i8* %1, i8* %2, i8* %3, i8* %4) {
%6 = tail call i32 @bfdutil_iprules(i32 %0, i8* %1, i8* %2, i8* %3, i8* %4, i32 1)
ret void
}