xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ format;

/* Variables and functions */
int /*<<< orphan*/ irq_0_timer_tick();
int /*<<< orphan*/ print_internal(char *, void *);
int /*<<< orphan*/ printf_vga(char *, int /*<<< orphan*/);
void printf_vga_tk(char *format, ...) {
  void *param;
  if (format && ('\0' != *format)) {
    printf_vga("[%x] ", irq_0_timer_tick());
    param = (void *)&format + sizeof(format);
    print_internal(format, param);
  }
}


x86 assembly (clang, -O0):
<printf_vga_tk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1186 <printf_vga_tk+0x56>
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    %ecx,%eax
je     1186 <printf_vga_tk+0x56>
mov    $0x0,%al
call   1030 <irq_0_timer_tick@plt>
mov    %eax,%esi
lea    0xe98(%rip),%rdi
call   1040 <printf_vga@plt>
lea    -0x8(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <print_internal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printf_vga_tk>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,0x8(%rsp)
test   %rdi,%rdi
je     1169 <printf_vga_tk+0x39>
mov    %rdi,%rbx
cmpb   $0x0,(%rdi)
je     1169 <printf_vga_tk+0x39>
xor    %eax,%eax
call   1030 <irq_0_timer_tick@plt>
lea    0xeab(%rip),%rdi
mov    %eax,%esi
call   1040 <printf_vga@plt>
lea    0x10(%rsp),%rsi
mov    %rbx,%rdi
call   1050 <print_internal@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"[%x] \00"
define void @printf_vga_tk(i8* %0, ...) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %19
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 0, %9
br i1 %10, label %11, label %19
11: ; preds = %6
%12 = call i32 (...) @irq_0_timer_tick()
%13 = call i32 @printf_vga(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %12)
%14 = bitcast i8** %2 to i8*
%15 = getelementptr i8, i8* %14, i64 8
store i8* %15, i8** %3
%16 = load i8*, i8** %2
%17 = load i8*, i8** %3
%18 = call i32 @print_internal(i8* %16, i8* %17)
br label %19
19: ; preds = %11, %6, %1
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"[%x] \00"
define void @printf_vga_tk(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = icmp eq i8* %0, null
br i1 %3, label %13, label %4
4: ; preds = %1
%5 = load i8, i8* %0
%6 = icmp eq i8 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %4
%8 = tail call i32 (...) @irq_0_timer_tick()
%9 = tail call i32 @printf_vga(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %8)
%10 = getelementptr inbounds i8*, i8** %2, i64 1
%11 = bitcast i8** %10 to i8*
%12 = call i32 @print_internal(i8* %0, i8* %11)
br label %13
13: ; preds = %7, %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void die(const char *str) {
  fprintf(stderr, "Error: %s\n", str);
  exit(1);
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<die>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [11 x i8] c"Error: %s\0A\00"
define void @die(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [11 x i8] c"Error: %s\0A\00"
define void @die(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
struct rt_rtmp_adapter {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ RTMP_MLME_RADIO_ON(struct rt_rtmp_adapter *);
void MlmeRadioOn(struct rt_rtmp_adapter *pAd) { RTMP_MLME_RADIO_ON(pAd); }


x86 assembly (clang, -O0):
<MlmeRadioOn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <RTMP_MLME_RADIO_ON@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MlmeRadioOn>:
jmp    1030 <RTMP_MLME_RADIO_ON@plt>

LLVM IR (-O0):
%struct.rt_rtmp_adapter = type { i32 }
define void @MlmeRadioOn(%struct.rt_rtmp_adapter* %0) {
%2 = alloca %struct.rt_rtmp_adapter*
store %struct.rt_rtmp_adapter* %0, %struct.rt_rtmp_adapter** %2
%3 = load %struct.rt_rtmp_adapter*, %struct.rt_rtmp_adapter** %2
%4 = call i32 @RTMP_MLME_RADIO_ON(%struct.rt_rtmp_adapter* %3)
ret void
}

LLVM IR (-O2):
%struct.rt_rtmp_adapter = type { i32 }
define void @MlmeRadioOn(%struct.rt_rtmp_adapter* %0) {
%2 = tail call i32 @RTMP_MLME_RADIO_ON(%struct.rt_rtmp_adapter* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void go_right(int n) { printf("%c[%dC", 0x1B, n); }


x86 assembly (clang, -O0):
<go_right>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xedb(%rip),%rdi
mov    $0x1b,%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<go_right>:
mov    %edi,%edx
lea    0xee7(%rip),%rdi
mov    $0x1b,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"%c[%dC\00"
define void @go_right(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 27, i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"%c[%dC\00"
define void @go_right(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 27, i32 %0)
ret void
}
/* Type definitions */
struct lifo {
  int dummy;
};

/* Variables and functions */
double pop(struct lifo *);
double opr_prd(struct lifo *stack) {
  double op1, op2;
  op1 = pop(stack);
  op2 = pop(stack);
  return op2 * op1;
}


x86 assembly (clang, -O0):
<opr_prd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pop@plt>
movsd  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pop@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<opr_prd>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
call   1030 <pop@plt>
movsd  %xmm0,0x8(%rsp)
mov    %rbx,%rdi
call   1030 <pop@plt>
mulsd  0x8(%rsp),%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.lifo = type { i32 }
define double @opr_prd(%struct.lifo* %0) {
%2 = alloca %struct.lifo*
%3 = alloca double
%4 = alloca double
store %struct.lifo* %0, %struct.lifo** %2
%5 = load %struct.lifo*, %struct.lifo** %2
%6 = call double @pop(%struct.lifo* %5)
store double %6, double* %3
%7 = load %struct.lifo*, %struct.lifo** %2
%8 = call double @pop(%struct.lifo* %7)
store double %8, double* %4
%9 = load double, double* %4
%10 = load double, double* %3
%11 = fmul double %9, %10
ret double %11
}

LLVM IR (-O2):
%struct.lifo = type { i32 }
define double @opr_prd(%struct.lifo* %0) {
%2 = tail call double @pop(%struct.lifo* %0)
%3 = tail call double @pop(%struct.lifo* %0)
%4 = fmul double %2, %3
ret double %4
}
/* Type definitions */
struct tml_stream {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ next_char(struct tml_stream *);
int peek_char(struct tml_stream *);
void skip_to_next_line(struct tml_stream *stream) {
  for (;;) {
    int ch = peek_char(stream);
    next_char(stream);
    if (ch == '\n' || ch == '\r' || ch == -1)
      return;
  }
}


x86 assembly (clang, -O0):
<skip_to_next_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <peek_char@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <next_char@plt>
cmpl   $0xa,-0xc(%rbp)
je     115f <skip_to_next_line+0x3f>
cmpl   $0xd,-0xc(%rbp)
je     115f <skip_to_next_line+0x3f>
cmpl   $0xffffffff,-0xc(%rbp)
jne    1165 <skip_to_next_line+0x45>
add    $0x10,%rsp
pop    %rbp
ret
jmp    112c <skip_to_next_line+0xc>

x86 assembly (clang, -O2):
<skip_to_next_line>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%rbx
mov    $0x4801,%r14d
nopl   (%rax)
mov    %rbx,%rdi
call   1040 <peek_char@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <next_char@plt>
add    $0x1,%ebp
cmp    $0xe,%ebp
ja     1130 <skip_to_next_line+0x10>
bt     %ebp,%r14d
jae    1130 <skip_to_next_line+0x10>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
%struct.tml_stream = type { i32 }
define void @skip_to_next_line(%struct.tml_stream* %0) {
%2 = alloca %struct.tml_stream*
%3 = alloca i32
store %struct.tml_stream* %0, %struct.tml_stream** %2
br label %4
4: ; preds = %18, %1
%5 = load %struct.tml_stream*, %struct.tml_stream** %2
%6 = call i32 @peek_char(%struct.tml_stream* %5)
store i32 %6, i32* %3
%7 = load %struct.tml_stream*, %struct.tml_stream** %2
%8 = call i32 @next_char(%struct.tml_stream* %7)
%9 = load i32, i32* %3
%10 = icmp eq i32 %9, 10
br i1 %10, label %17, label %11
11: ; preds = %4
%12 = load i32, i32* %3
%13 = icmp eq i32 %12, 13
br i1 %13, label %17, label %14
14: ; preds = %11
%15 = load i32, i32* %3
%16 = icmp eq i32 %15, -1
br i1 %16, label %17, label %18
17: ; preds = %14, %11, %4
ret void
18: ; preds = %14
br label %4
}

LLVM IR (-O2):
%struct.tml_stream = type { i32 }
define void @skip_to_next_line(%struct.tml_stream* %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 @peek_char(%struct.tml_stream* %0)
%4 = tail call i32 @next_char(%struct.tml_stream* %0)
switch i32 %3, label %2 [
i32 -1, label %5
i32 13, label %5
i32 10, label %5
]
5: ; preds = %2, %2, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ stdout;
void new_line(void) {
  printf("\n");
  fflush(stdout);
}


x86 assembly (clang, -O0):
<new_line>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<new_line>:
push   %rax
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
@stdout = global i32 0
define void @new_line() {
%1 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @stdout
%3 = call i32 @fflush(i32 %2)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @new_line() {
%1 = tail call i32 @putchar(i32 10)
%2 = load i32, i32* @stdout
%3 = tail call i32 @fflush(i32 %2)
ret void
}
/* Variables and functions */
unsigned int fastrand();
unsigned int rnd(unsigned int min, unsigned int max) {
  return fastrand() % (max - min + 1) + min;
}


x86 assembly (clang, -O0):
<rnd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <fastrand@plt>
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
add    $0x1,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rnd>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <fastrand@plt>
sub    %ebp,%ebx
add    $0x1,%ebx
xor    %edx,%edx
div    %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @rnd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @fastrand()
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub i32 %6, %7
%9 = add i32 %8, 1
%10 = urem i32 %5, %9
%11 = load i32, i32* %3
%12 = add i32 %10, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @rnd(i32 %0, i32 %1) {
%3 = tail call i32 (...) @fastrand()
%4 = sub i32 1, %0
%5 = add i32 %4, %1
%6 = urem i32 %3, %5
%7 = add i32 %6, %0
ret i32 %7
}
double square(x)
double x;
{ return (x * x); }


x86 assembly (clang, -O0):
<square>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<square>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @square(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @square(double %0) {
%2 = fmul double %0, %0
ret double %2
}
void gtk_icon_factory_add_default() {}


x86 assembly (clang, -O0):
<gtk_icon_factory_add_default>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_icon_factory_add_default>:
ret

LLVM IR (-O0):
define void @gtk_icon_factory_add_default() {
ret void
}

LLVM IR (-O2):
define void @gtk_icon_factory_add_default() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ __setCHRBank4Low(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ vrc2_4_SetChrROMBank4();
void vrc2_4_setParamsDXX0(uint16_t addr, uint8_t val) {
  __setCHRBank4Low(addr, val);
  vrc2_4_SetChrROMBank4();
}


x86 assembly (clang, -O0):
<vrc2_4_setParamsDXX0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <__setCHRBank4Low@plt>
mov    $0x0,%al
call   1040 <vrc2_4_SetChrROMBank4@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vrc2_4_setParamsDXX0>:
push   %rax
call   1030 <__setCHRBank4Low@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <vrc2_4_SetChrROMBank4@plt>

LLVM IR (-O0):
define void @vrc2_4_setParamsDXX0(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @__setCHRBank4Low(i32 %5, i32 %6)
%8 = call i32 (...) @vrc2_4_SetChrROMBank4()
ret void
}

LLVM IR (-O2):
define void @vrc2_4_setParamsDXX0(i32 %0, i32 %1) {
%3 = tail call i32 @__setCHRBank4Low(i32 %0, i32 %1)
%4 = tail call i32 (...) @vrc2_4_SetChrROMBank4()
ret void
}
double drand48(void) { return 0.0; }


x86 assembly (clang, -O0):
<drand48>:
push   %rbp
mov    %rsp,%rbp
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<drand48>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @drand48() {
ret double 0.000000e+00
}

LLVM IR (-O2):
define double @drand48() {
ret double 0.000000e+00
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_dynarray_new() {
  printf("NOT IMPLEMENTED:"
         "pa_dynarray_new"
         "\n");
}


x86 assembly (clang, -O0):
<pa_dynarray_new>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_dynarray_new>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"NOT IMPLEMENTED:pa_dynarray_new\0A\00"
define i32 @pa_dynarray_new() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [32 x i8] c"NOT IMPLEMENTED:pa_dynarray_new\00"
define i32 @pa_dynarray_new() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int feedrdm() { srand(time(NULL)); }


x86 assembly (clang, -O0):
<feedrdm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<feedrdm>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <srand@plt>

LLVM IR (-O0):
define i32 @feedrdm() {
%1 = alloca i32
%2 = call i32 @time(i32* null)
%3 = call i32 @srand(i32 %2)
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @feedrdm() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 @srand(i32 %1)
ret i32 undef
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int syscon_write_symbols(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(294, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<syscon_write_symbols>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x126,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscon_write_symbols>:
mov    $0x126,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @syscon_write_symbols() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 294, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @syscon_write_symbols() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 294, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
int test_imm_04uint16_mem(unsigned short *val) {
  return ((*val) & (0x04 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_04uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0x4,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_04uint16_mem>:
testb  $0x4,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_04uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 4
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_04uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 4
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
char *getstr(char *cp, char **cpp) {
  (void)cp;
  (void)cpp;
  return NULL;
}


x86 assembly (clang, -O0):
<getstr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getstr>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @getstr(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
%5 = load i8*, i8** %3
%6 = load i8**, i8*** %4
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @getstr(i8* nocapture readnone %0, i8** nocapture readnone %1) {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M363_f(char *s) {
  debug("M363_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M363_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M363_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M363_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M363_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M363_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M363_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
/* Type definitions */
struct triple {
  int dummy;
};
struct compile_state {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *cgdebug_fp(struct compile_state *);
int /*<<< orphan*/ loc(int /*<<< orphan*/ *, struct compile_state *,
                       struct triple *);
void cgdebug_loc(struct compile_state *state, struct triple *ins) {
  FILE *fp;
  fp = cgdebug_fp(state);
  if (fp) {
    loc(fp, state, ins);
  }
}


x86 assembly (clang, -O0):
<cgdebug_loc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <cgdebug_fp@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1159 <cgdebug_loc+0x39>
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <loc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgdebug_loc>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <cgdebug_fp@plt>
test   %rax,%rax
je     1149 <cgdebug_loc+0x29>
mov    %rax,%rdi
mov    %rbx,%rsi
mov    %r14,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <loc@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.compile_state = type { i32 }
%struct.triple = type { i32 }
define void @cgdebug_loc(%struct.compile_state* %0, %struct.triple* %1) {
%3 = alloca %struct.compile_state*
%4 = alloca %struct.triple*
%5 = alloca i32*
store %struct.compile_state* %0, %struct.compile_state** %3
store %struct.triple* %1, %struct.triple** %4
%6 = load %struct.compile_state*, %struct.compile_state** %3
%7 = call i32* @cgdebug_fp(%struct.compile_state* %6)
store i32* %7, i32** %5
%8 = load i32*, i32** %5
%9 = icmp ne i32* %8, null
br i1 %9, label %10, label %15
10: ; preds = %2
%11 = load i32*, i32** %5
%12 = load %struct.compile_state*, %struct.compile_state** %3
%13 = load %struct.triple*, %struct.triple** %4
%14 = call i32 @loc(i32* %11, %struct.compile_state* %12, %struct.triple* %13)
br label %15
15: ; preds = %10, %2
ret void
}

LLVM IR (-O2):
%struct.compile_state = type { i32 }
%struct.triple = type { i32 }
define void @cgdebug_loc(%struct.compile_state* %0, %struct.triple* %1) {
%3 = tail call i32* @cgdebug_fp(%struct.compile_state* %0)
%4 = icmp eq i32* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @loc(i32* %3, %struct.compile_state* %0, %struct.triple* %1)
br label %7
7: ; preds = %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void farr16() { printf("farr16 likes parmessan risotto.\n"); }


x86 assembly (clang, -O0):
<farr16>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<farr16>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"farr16 likes parmessan risotto.\0A\00"
define void @farr16() {
%1 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [32 x i8] c"farr16 likes parmessan risotto.\00"
define void @farr16() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ proc();
int main(int argc, char *argv[]) {
  proc();
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <proc@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <proc@plt>
mov    0x2ec1(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @proc()
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @proc()
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}
void func2(int x) {
  x++;
  return;
}


x86 assembly (clang, -O0):
<func2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<func2>:
ret

LLVM IR (-O0):
define void @func2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
store i32 %4, i32* %2
ret void
}

LLVM IR (-O2):
define void @func2(i32 %0) {
ret void
}
double
f4_cb_send_pre_double_double_double_double_double_double_double_double_float(
    double (*cb)(double, double, double, double, double, double, double, double,
                 float)) {
  float r = 55.0;
  return cb(8.25, 9.25, 10.25, 11.25, 12.25, 13.25, 14.25, 15.25, r) + 1.0;
}


x86 assembly (clang, -O0):
<f4_cb_send_pre_double_double_double_double_double_double_double_double_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movss  0xf34(%rip),%xmm0
movss  %xmm0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movss  -0xc(%rbp),%xmm8
movsd  0xedd(%rip),%xmm0
movsd  0xedd(%rip),%xmm1
movsd  0xedd(%rip),%xmm2
movsd  0xedd(%rip),%xmm3
movsd  0xedd(%rip),%xmm4
movsd  0xedd(%rip),%xmm5
movsd  0xedd(%rip),%xmm6
movsd  0xedd(%rip),%xmm7
movss  %xmm8,(%rsp)
call   *%rax
movsd  0xe8d(%rip),%xmm1
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4_cb_send_pre_double_double_double_double_double_double_double_double_float>:
push   %rax
movl   $0x425c0000,(%rsp)
movsd  0xef0(%rip),%xmm0
movsd  0xef0(%rip),%xmm1
movsd  0xef0(%rip),%xmm2
movsd  0xef0(%rip),%xmm3
movsd  0xef0(%rip),%xmm4
movsd  0xef0(%rip),%xmm5
movsd  0xef0(%rip),%xmm6
movsd  0xef0(%rip),%xmm7
call   *%rdi
addsd  0xeee(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @f4_cb_send_pre_double_double_double_double_double_double_double_double_float(double (double, double, double, double, double, double, double, double, float)* %0) {
%2 = alloca double (double, double, double, double, double, double, double, double, float)*
%3 = alloca float
store double (double, double, double, double, double, double, double, double, float)* %0, double (double, double, double, double, double, double, double, double, float)** %2
store float 5.500000e+01, float* %3
%4 = load double (double, double, double, double, double, double, double, double, float)*, double (double, double, double, double, double, double, double, double, float)** %2
%5 = load float, float* %3
%6 = call double %4(double 8.250000e+00, double 9.250000e+00, double 1.025000e+01, double 1.125000e+01, double 1.225000e+01, double 1.325000e+01, double 1.425000e+01, double 1.525000e+01, float %5)
%7 = fadd double %6, 1.000000e+00
ret double %7
}

LLVM IR (-O2):
define double @f4_cb_send_pre_double_double_double_double_double_double_double_double_float(double (double, double, double, double, double, double, double, double, float)* nocapture %0) {
%2 = tail call double %0(double 8.250000e+00, double 9.250000e+00, double 1.025000e+01, double 1.125000e+01, double 1.225000e+01, double 1.325000e+01, double 1.425000e+01, double 1.525000e+01, float 5.500000e+01)
%3 = fadd double %2, 1.000000e+00
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ putc(char, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void write_space(int count) {
  if (count < 0)
    count = 0;
  while (count--)
    putc(' ', stdout);
}


x86 assembly (clang, -O0):
<write_space>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    112c <write_space+0x1c>
movl   $0x0,-0x4(%rbp)
jmp    1131 <write_space+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
je     115d <write_space+0x4d>
mov    0x2e94(%rip),%rax
mov    (%rax),%esi
mov    $0x20,%edi
call   1030 <putc@plt>
jmp    1131 <write_space+0x21>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_space>:
push   %r14
push   %rbx
push   %rax
test   %edi,%edi
jle    1142 <write_space+0x32>
mov    %edi,%ebx
mov    0x2ebf(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14),%esi
mov    $0x20,%edi
call   1030 <putc@plt>
add    $0xffffffff,%ebx
jne    1130 <write_space+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@stdout = global i32 0
define void @write_space(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
store i32 0, i32* %2
br label %6
6: ; preds = %5, %1
br label %7
7: ; preds = %11, %6
%8 = load i32, i32* %2
%9 = add nsw i32 %8, -1
store i32 %9, i32* %2
%10 = icmp ne i32 %8, 0
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, i32* @stdout
%13 = call i32 @putc(i8 signext 32, i32 %12)
br label %7
14: ; preds = %7
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @write_space(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %5, %3 ], [ %0, %1 ]
%5 = add nsw i32 %4, -1
%6 = load i32, i32* @stdout
%7 = tail call i32 @putc(i8 signext 32, i32 %6)
%8 = icmp eq i32 %5, 0
br i1 %8, label %9, label %3
9: ; preds = %3, %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, int /*<<< orphan*/ *, int);
void ph_to_be8(void *v, uint8_t u) { memcpy(v, &u, sizeof(uint8_t)); }


x86 assembly (clang, -O0):
<ph_to_be8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ph_to_be8>:
push   %rax
mov    %esi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @ph_to_be8(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @memcpy(i8* %5, i32* %4, i32 4)
ret void
}

LLVM IR (-O2):
define void @ph_to_be8(i8* %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = call i32 @memcpy(i8* %0, i32* %3, i32 4)
ret void
}
/* Variables and functions */
int ENOSYS;
int proc_cpu_exists(unsigned int cpu) { return -ENOSYS; }


x86 assembly (clang, -O0):
<proc_cpu_exists>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
mov    0x2ed8(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<proc_cpu_exists>:
mov    0x2ee1(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @proc_cpu_exists(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @ENOSYS
%4 = sub nsw i32 0, %3
ret i32 %4
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @proc_cpu_exists(i32 %0) {
%2 = load i32, i32* @ENOSYS
%3 = sub nsw i32 0, %2
ret i32 %3
}
__attribute__((noipa, optimize("Ofast"))) int f3(float x) {
  return __builtin_sqrtf(x) >= 0x1.2dd3d0p-65f;
}


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sqrtf@plt>
movss  0xed1(%rip),%xmm1
ucomiss %xmm1,%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
push   %rax
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     111f <f3+0xf>
sqrtss %xmm0,%xmm0
jmp    1124 <f3+0x14>
call   1030 <sqrtf@plt>
xor    %eax,%eax
ucomiss 0xed3(%rip),%xmm0
setae  %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @f3(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @sqrtf(float %3)
%5 = fcmp oge float %4, 0x3BE2DD3D00000000
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @f3(float %0) {
%2 = tail call float @sqrtf(float %0)
%3 = fcmp oge float %2, 0x3BE2DD3D00000000
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
void ui_destroy_glyph(void *glyph) {}


x86 assembly (clang, -O0):
<ui_destroy_glyph>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ui_destroy_glyph>:
ret

LLVM IR (-O0):
define void @ui_destroy_glyph(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @ui_destroy_glyph(i8* nocapture %0) {
ret void
}
char bar(void) {
  static char ret = 0;
  if (!ret) {
    ret = 1;
    return (0);
  }
  return (1);
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
cmpb   $0x0,0x2f16(%rip)
jne    1121 <bar+0x21>
movb   $0x1,0x2f09(%rip)
movb   $0x0,-0x1(%rbp)
jmp    1125 <bar+0x25>
movb   $0x1,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
mov    $0x1,%al
cmpb   $0x0,0x2f18(%rip)
jne    1114 <bar+0x14>
movb   $0x1,0x2f0f(%rip)
xor    %eax,%eax
ret

LLVM IR (-O0):
@bar.ret = internal global i8 0
define signext i8 @bar() {
%1 = alloca i8
%2 = load i8, i8* @bar.ret
%3 = icmp ne i8 %2, 0
br i1 %3, label %5, label %4
4: ; preds = %0
store i8 1, i8* @bar.ret
store i8 0, i8* %1
br label %6
5: ; preds = %0
store i8 1, i8* %1
br label %6
6: ; preds = %5, %4
%7 = load i8, i8* %1
ret i8 %7
}

LLVM IR (-O2):
@bar.ret = internal unnamed_addr global i1 false
define signext i8 @bar() {
%1 = load i1, i1* @bar.ret
br i1 %1, label %3, label %2
2: ; preds = %0
store i1 true, i1* @bar.ret
br label %3
3: ; preds = %0, %2
%4 = phi i8 [ 0, %2 ], [ 1, %0 ]
ret i8 %4
}
unsigned t(unsigned *ptr, unsigned val) {
  return __sync_lock_test_and_set(ptr, val);
}


x86 assembly (clang, -O0):
<t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%eax
xchg   %eax,(%rcx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<t>:
mov    %esi,%eax
xchg   %eax,(%rdi)
ret

LLVM IR (-O0):
define i32 @t(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = atomicrmw xchg i32* %5, i32 %6 seq_cst
ret i32 %7
}

LLVM IR (-O2):
define i32 @t(i32* nocapture %0, i32 %1) {
%3 = atomicrmw xchg i32* %0, i32 %1 seq_cst
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void const *, size_t);
void *xmalloc(size_t);
void *xmemdup(const void *ptr, size_t size) {
  void *res = xmalloc(size);
  memcpy(res, ptr, size);
  return res;
}


x86 assembly (clang, -O0):
<xmemdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <xmalloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmemdup>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <xmalloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1040 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @xmemdup(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = call i8* @xmalloc(i64 %6)
store i8* %7, i8** %5
%8 = load i8*, i8** %5
%9 = load i8*, i8** %3
%10 = load i64, i64* %4
%11 = call i32 @memcpy(i8* %8, i8* %9, i64 %10)
%12 = load i8*, i8** %5
ret i8* %12
}

LLVM IR (-O2):
define i8* @xmemdup(i8* %0, i64 %1) {
%3 = tail call i8* @xmalloc(i64 %1)
%4 = tail call i32 @memcpy(i8* %3, i8* %0, i64 %1)
ret i8* %3
}
/* Variables and functions */
float max_ff(float, float);
float max_fff(float a, float b, float c) { return max_ff(max_ff(a, b), c); }


x86 assembly (clang, -O0):
<max_fff>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <max_ff@plt>
movss  -0xc(%rbp),%xmm1
call   1030 <max_ff@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<max_fff>:
push   %rax
movss  %xmm2,0x4(%rsp)
call   1030 <max_ff@plt>
movss  0x4(%rsp),%xmm1
pop    %rax
jmp    1030 <max_ff@plt>

LLVM IR (-O0):
define float @max_fff(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = call float @max_ff(float %7, float %8)
%10 = load float, float* %6
%11 = call float @max_ff(float %9, float %10)
ret float %11
}

LLVM IR (-O2):
define float @max_fff(float %0, float %1, float %2) {
%4 = tail call float @max_ff(float %0, float %1)
%5 = tail call float @max_ff(float %4, float %2)
ret float %5
}
RT(i) int i;
{ return (((i) >> 16) & 0x1f); }


x86 assembly (clang, -O0):
<RT>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
and    $0x1f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RT>:
mov    %edi,%eax
shr    $0x10,%eax
and    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @RT(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 16
%5 = and i32 %4, 31
ret i32 %5
}

LLVM IR (-O2):
define i32 @RT(i32 %0) {
%2 = lshr i32 %0, 16
%3 = and i32 %2, 31
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ uint16_t;
struct ipv4_hdr {
  int dummy;
};

/* Variables and functions */
uint16_t rte_ipv4_phdr_cksum(const struct ipv4_hdr *ipv4_hdr,
                             uint64_t ol_flags) {
  return (0);
}


x86 assembly (clang, -O0):
<rte_ipv4_phdr_cksum>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rte_ipv4_phdr_cksum>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ipv4_hdr = type { i32 }
define i32 @rte_ipv4_phdr_cksum(%struct.ipv4_hdr* %0, i32 %1) {
%3 = alloca %struct.ipv4_hdr*
%4 = alloca i32
store %struct.ipv4_hdr* %0, %struct.ipv4_hdr** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
%struct.ipv4_hdr = type { i32 }
define i32 @rte_ipv4_phdr_cksum(%struct.ipv4_hdr* nocapture readnone %0, i32 %1) {
ret i32 0
}
__attribute__((always_)) int LZ4HC_literalsPrice(int const litlen) {
  int price = litlen;
  if (litlen >= (int)((1U << (8 - 4)) - 1))
    price += 1 + (litlen - ((1U << (8 - 4)) - 1)) / 255;
  return price;
}


x86 assembly (clang, -O0):
<LZ4HC_literalsPrice>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0xf,-0x4(%rbp)
jl     112f <LZ4HC_literalsPrice+0x2f>
mov    -0x4(%rbp),%eax
sub    $0xf,%eax
mov    $0xff,%ecx
xor    %edx,%edx
div    %ecx
add    $0x1,%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZ4HC_literalsPrice>:
mov    %edi,%eax
cmp    $0xf,%edi
jl     111c <LZ4HC_literalsPrice+0x1c>
lea    -0xf(%rax),%ecx
mov    $0x80808081,%edx
imul   %rcx,%rdx
shr    $0x27,%rdx
add    %edx,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @LZ4HC_literalsPrice(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
%5 = load i32, i32* %2
%6 = icmp sge i32 %5, 15
br i1 %6, label %7, label %14
7: ; preds = %1
%8 = load i32, i32* %2
%9 = sub i32 %8, 15
%10 = udiv i32 %9, 255
%11 = add i32 1, %10
%12 = load i32, i32* %3
%13 = add i32 %12, %11
store i32 %13, i32* %3
br label %14
14: ; preds = %7, %1
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @LZ4HC_literalsPrice(i32 %0) {
%2 = icmp sgt i32 %0, 14
br i1 %2, label %3, label %8
3: ; preds = %1
%4 = add nsw i32 %0, -15
%5 = udiv i32 %4, 255
%6 = add nuw i32 %0, 1
%7 = add nuw i32 %6, %5
br label %8
8: ; preds = %3, %1
%9 = phi i32 [ %7, %3 ], [ %0, %1 ]
ret i32 %9
}
void foo() {}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo() {
ret void
}

LLVM IR (-O2):
define void @foo() {
ret void
}
void SplitRGBRow_NEON() {}


x86 assembly (clang, -O0):
<SplitRGBRow_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SplitRGBRow_NEON>:
ret

LLVM IR (-O0):
define void @SplitRGBRow_NEON() {
ret void
}

LLVM IR (-O2):
define void @SplitRGBRow_NEON() {
ret void
}
unsigned char rtc_cmos_read(unsigned char addr) {}


x86 assembly (clang, -O0):
<rtc_cmos_read>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtc_cmos_read>:
ret

LLVM IR (-O0):
define zeroext i8 @rtc_cmos_read(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %2
ret i8 %4
}

LLVM IR (-O2):
define zeroext i8 @rtc_cmos_read(i8 zeroext %0) {
ret i8 undef
}
/* Variables and functions */
char *if_indextoname(int, char *);
char *index_to_name(int index, char *name) {
  return if_indextoname(index, name);
}


x86 assembly (clang, -O0):
<index_to_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <if_indextoname@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<index_to_name>:
jmp    1030 <if_indextoname@plt>

LLVM IR (-O0):
define i8* @index_to_name(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i8* @if_indextoname(i32 %5, i8* %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @index_to_name(i32 %0, i8* %1) {
%3 = tail call i8* @if_indextoname(i32 %0, i8* %1)
ret i8* %3
}
int test_imm_B6uint16_reg(unsigned short val) {
  return ((val) & (-0xB6 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B6uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff4a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B6uint16_reg>:
test   $0xff4a,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B6uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -182
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_B6uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -182
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int main(int argc, const char *argv[]) {
  struct my_struct {
    int a;
    double b[2][2];
  };
  struct my_struct array[2] = {{1, {{3.5, 3.6}, {3.7, 3.8}}},
                               {2, {{4.5, 4.6}, {18.9, 18.95}}}};
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x60(%rbp),%rdi
lea    0xecf(%rip),%rsi
mov    $0x50,%edx
call   1030 <memcpy@plt>
xor    %eax,%eax
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.my_struct = type { i32, [2 x [2 x double]] }
@__const.main.array = [2 x %struct.my_struct] [%struct.my_struct { i32 1, [2 x [2 x double]] [[2 x double] [double 3.500000e+00, double 3.600000e+00], [2 x double] [double 3.700000e+00, double 3.800000e+00]] }, %struct.my_struct { i32 2, [2 x [2 x double]] [[2 x double] [double 4.500000e+00, double 4.600000e+00], [2 x double] [double 1.890000e+01, double 1.895000e+01]] }]
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [2 x %struct.my_struct]
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = bitcast [2 x %struct.my_struct]* %6 to i8*
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
void validateFile(char *filename) {}


x86 assembly (clang, -O0):
<validateFile>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<validateFile>:
ret

LLVM IR (-O0):
define void @validateFile(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @validateFile(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIOCATMARK;
int __ioctl(int, int /*<<< orphan*/, int *);
int sockatmark(int fd) {
  int answ;
  return __ioctl(fd, SIOCATMARK, &answ) == -1 ? -1 : answ;
}


x86 assembly (clang, -O0):
<sockatmark>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
lea    -0x8(%rbp),%rdx
call   1030 <__ioctl@plt>
cmp    $0xffffffff,%eax
jne    1146 <sockatmark+0x36>
mov    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    114c <sockatmark+0x3c>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sockatmark>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
lea    0x4(%rsp),%rdx
call   1030 <__ioctl@plt>
cmp    $0xffffffff,%eax
je     112d <sockatmark+0x1d>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@SIOCATMARK = global i32 0
define i32 @sockatmark(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @SIOCATMARK
%6 = call i32 @__ioctl(i32 %4, i32 %5, i32* %3)
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %9
8: ; preds = %1
br label %11
9: ; preds = %1
%10 = load i32, i32* %3
br label %11
11: ; preds = %9, %8
%12 = phi i32 [ -1, %8 ], [ %10, %9 ]
ret i32 %12
}

LLVM IR (-O2):
@SIOCATMARK = global i32 0
define i32 @sockatmark(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = load i32, i32* @SIOCATMARK
%5 = call i32 @__ioctl(i32 %0, i32 %4, i32* %2)
%6 = icmp eq i32 %5, -1
%7 = load i32, i32* %2
%8 = select i1 %6, i32 -1, i32 %7
ret i32 %8
}