xunge/DecIR huggingface dataset:
/* Variables and functions */
unsigned long long __blci_u64(unsigned long long);
unsigned long long test__blci_u64(unsigned long long a) {
  return __blci_u64(a);
}


x86 assembly (clang, -O0):
<test__blci_u64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__blci_u64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test__blci_u64>:
jmp    1030 <__blci_u64@plt>

LLVM IR (-O0):
define i64 @test__blci_u64(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @__blci_u64(i64 %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @test__blci_u64(i64 %0) {
%2 = tail call i64 @__blci_u64(i64 %0)
ret i64 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char const *, char *);
int /*<<< orphan*/ fputs(char const *, int /*<<< orphan*/ *);
int writeToPipe(const char *path, const char *string) {
  FILE *fp = NULL;
  fp = fopen(path, "w");
  if (fp == NULL) {
    return -1;
  }
  fputs(string, fp);
  fclose(fp);
  return 1;
}


x86 assembly (clang, -O0):
<writeToPipe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xead(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1173 <writeToPipe+0x43>
movl   $0xffffffff,-0x4(%rbp)
jmp    1190 <writeToPipe+0x60>
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1040 <fputs@plt>
mov    -0x20(%rbp),%rdi
call   1030 <fclose@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<writeToPipe>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
lea    0xec2(%rip),%rsi
call   1050 <fopen@plt>
test   %rax,%rax
je     1165 <writeToPipe+0x35>
mov    %rax,%rbx
mov    %r14,%rdi
mov    %rax,%rsi
call   1040 <fputs@plt>
mov    %rbx,%rdi
call   1030 <fclose@plt>
mov    $0x1,%eax
jmp    116a <writeToPipe+0x3a>
mov    $0xffffffff,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [2 x i8] c"w\00"
define i32 @writeToPipe(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32* null, i32** %6
%7 = load i8*, i8** %4
%8 = call i32* @fopen(i8* %7, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %8, i32** %6
%9 = load i32*, i32** %6
%10 = icmp eq i32* %9, null
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 -1, i32* %3
br label %18
12: ; preds = %2
%13 = load i8*, i8** %5
%14 = load i32*, i32** %6
%15 = call i32 @fputs(i8* %13, i32* %14)
%16 = load i32*, i32** %6
%17 = call i32 @fclose(i32* %16)
store i32 1, i32* %3
br label %18
18: ; preds = %12, %11
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
@.str = [2 x i8] c"w\00"
define i32 @writeToPipe(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i32* %3, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @fputs(i8* %1, i32* %3)
%7 = tail call i32 @fclose(i32* %3)
br label %8
8: ; preds = %2, %5
%9 = phi i32 [ 1, %5 ], [ -1, %2 ]
ret i32 %9
}
/* Variables and functions */
char const *with_prefix(char *);
const char *fie() { return with_prefix("trumpet"); }


x86 assembly (clang, -O0):
<fie>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <with_prefix@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fie>:
lea    0xee9(%rip),%rdi
jmp    1030 <with_prefix@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"trumpet\00"
define i8* @fie() {
%1 = call i8* @with_prefix(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"trumpet\00"
define i8* @fie() {
%1 = tail call i8* @with_prefix(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ f(int *, int *, int, int);
void g(int n, int m) {
  int r[m];
  f(r, r, n, m);
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x10(%rbp)
lea    0xf(,%rax,4),%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rsi
sub    %rcx,%rsi
mov    %rsi,%rsp
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
mov    %rsi,%rdi
call   1030 <f@plt>
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%ecx
mov    %edi,%edx
mov    %esi,%eax
mov    %rsp,%rdi
lea    0xf(,%rax,4),%rax
and    $0xfffffffffffffff0,%rax
sub    %rax,%rdi
mov    %rdi,%rsp
mov    %rdi,%rsi
call   1030 <f@plt>
mov    %rbp,%rsp
pop    %rbp
ret

LLVM IR (-O0):
define void @g(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = zext i32 %7 to i64
%9 = call i8* @llvm.stacksave()
store i8* %9, i8** %5
%10 = alloca i32, i64 %8
store i64 %8, i64* %6
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = call i32 @f(i32* %10, i32* %10, i32 %11, i32 %12)
%14 = load i8*, i8** %5
ret void
}

LLVM IR (-O2):
define void @g(i32 %0, i32 %1) {
%3 = zext i32 %1 to i64
%4 = alloca i32, i64 %3
%5 = call i32 @f(i32* %4, i32* %4, i32 %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int x = 3;
  printf("%d\n", ++x);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
mov    -0x8(%rbp),%esi
add    $0x1,%esi
mov    %esi,-0x8(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 3, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
store i32 %4, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 4)
ret i32 0
}
/* Variables and functions */
int NOROM_CPUcpsid();
bool IntMasterDisable(void) { return (NOROM_CPUcpsid()); }


x86 assembly (clang, -O0):
<IntMasterDisable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <NOROM_CPUcpsid@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<IntMasterDisable>:
xor    %eax,%eax
jmp    1030 <NOROM_CPUcpsid@plt>

LLVM IR (-O0):
define i32 @IntMasterDisable() {
%1 = call i32 (...) @NOROM_CPUcpsid()
ret i32 %1
}

LLVM IR (-O2):
define i32 @IntMasterDisable() {
%1 = tail call i32 (...) @NOROM_CPUcpsid()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/, char *);
int /*<<< orphan*/ strlen(char *);
void display_country_not_found_with_code(char *code) {
  printf("Country with ISO 3166-%lu code '%s' not found!\n", strlen(code),
         code);
}


x86 assembly (clang, -O0):
<display_country_not_found_with_code>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%esi
mov    -0x8(%rbp),%rdx
lea    0xebe(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_country_not_found_with_code>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
lea    0xed0(%rip),%rdi
mov    %eax,%esi
mov    %rbx,%rdx
pop    %rbx
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [48 x i8] c"Country with ISO 3166-%lu code '%s' not found!\0A\00"
define void @display_country_not_found_with_code(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strlen(i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @printf(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), i32 %4, i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [48 x i8] c"Country with ISO 3166-%lu code '%s' not found!\0A\00"
define void @display_country_not_found_with_code(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), i32 %2, i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int randf();
int irand(int bound) {
  int v = (int)(randf() * bound);
  assert(v >= 0);
  assert(v < bound);
  return v;
}


x86 assembly (clang, -O0):
<irand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <randf@plt>
imul   -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irand>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <randf@plt>
mov    %eax,%ebp
imul   %ebx,%ebp
mov    %ebp,%edi
not    %edi
shr    $0x1f,%edi
call   1030 <assert@plt>
xor    %edi,%edi
cmp    %ebx,%ebp
setl   %dil
call   1030 <assert@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @irand(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 (...) @randf()
%5 = load i32, i32* %2
%6 = mul nsw i32 %4, %5
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp sge i32 %7, 0
%9 = zext i1 %8 to i32
%10 = call i32 @assert(i32 %9)
%11 = load i32, i32* %3
%12 = load i32, i32* %2
%13 = icmp slt i32 %11, %12
%14 = zext i1 %13 to i32
%15 = call i32 @assert(i32 %14)
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @irand(i32 %0) {
%2 = tail call i32 (...) @randf()
%3 = mul nsw i32 %2, %0
%4 = xor i32 %3, -1
%5 = lshr i32 %4, 31
%6 = tail call i32 @assert(i32 %5)
%7 = icmp slt i32 %3, %0
%8 = zext i1 %7 to i32
%9 = tail call i32 @assert(i32 %8)
ret i32 %3
}
/* Variables and functions */
double atan(int /*<<< orphan*/);
int /*<<< orphan*/ sinh(double const);
double gudermannian_i1924(const double x) {
  const double norm_x = x / 6378388.0;
  return atan(sinh(norm_x)) * 180.0 / 3.14159265358979323846;
}


x86 assembly (clang, -O0):
<gudermannian_i1924>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xed6(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <sinh@plt>
mov    %eax,%edi
call   1040 <atan@plt>
movsd  0xeac(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xe98(%rip),%xmm1
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gudermannian_i1924>:
push   %rax
divsd  0xed7(%rip),%xmm0
call   1030 <sinh@plt>
mov    %eax,%edi
call   1040 <atan@plt>
mulsd  0xecb(%rip),%xmm0
divsd  0xecb(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @gudermannian_i1924(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fdiv double %4, 0x415854E500000000
store double %5, double* %3
%6 = load double, double* %3
%7 = call i32 @sinh(double %6)
%8 = call double @atan(i32 %7)
%9 = fmul double %8, 1.800000e+02
%10 = fdiv double %9, 0x400921FB54442D18
ret double %10
}

LLVM IR (-O2):
define double @gudermannian_i1924(double %0) {
%2 = fdiv double %0, 0x415854E500000000
%3 = tail call i32 @sinh(double %2)
%4 = tail call double @atan(i32 %3)
%5 = fmul double %4, 1.800000e+02
%6 = fdiv double %5, 0x400921FB54442D18
ret double %6
}
void rop3_78_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = S ^ T;
  stk2 = *D | stk3;
  stk1 = T ^ stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_78_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xa(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_78_1_1>:
ret

LLVM IR (-O0):
define void @rop3_78_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %5
%11 = zext i8 %10 to i32
%12 = load i8, i8* %6
%13 = zext i8 %12 to i32
%14 = xor i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %9
%16 = load i8*, i8** %4
%17 = load i8, i8* %16
%18 = zext i8 %17 to i32
%19 = load i8, i8* %9
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
%22 = trunc i32 %21 to i8
store i8 %22, i8* %8
%23 = load i8, i8* %6
%24 = zext i8 %23 to i32
%25 = load i8, i8* %8
%26 = zext i8 %25 to i32
%27 = xor i32 %24, %26
%28 = trunc i32 %27 to i8
store i8 %28, i8* %7
%29 = load i8, i8* %7
%30 = zext i8 %29 to i32
%31 = load i8, i8* %5
%32 = zext i8 %31 to i32
%33 = xor i32 %32, -1
%34 = and i32 %30, %33
%35 = load i8, i8* %6
%36 = zext i8 %35 to i32
%37 = xor i32 %36, -1
%38 = and i32 %34, %37
%39 = load i8*, i8** %4
%40 = load i8, i8* %39
%41 = zext i8 %40 to i32
%42 = load i8, i8* %5
%43 = zext i8 %42 to i32
%44 = and i32 %41, %43
%45 = or i32 %38, %44
%46 = load i8*, i8** %4
%47 = load i8, i8* %46
%48 = zext i8 %47 to i32
%49 = load i8, i8* %6
%50 = zext i8 %49 to i32
%51 = and i32 %48, %50
%52 = or i32 %45, %51
%53 = trunc i32 %52 to i8
%54 = load i8*, i8** %4
store i8 %53, i8* %54
ret void
}

LLVM IR (-O2):
define void @rop3_78_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIGINT;
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ signal(int /*<<< orphan*/, void (*)(int));
void catch_int(int sig_num) {
  signal(SIGINT, catch_int);
  printf("Don't press Ctrl-C  to stop me\n");
}


x86 assembly (clang, -O0):
<catch_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
mov    0x2e9d(%rip),%rsi
call   1040 <signal@plt>
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<catch_int>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
mov    0x2ea7(%rip),%rsi
call   1040 <signal@plt>
lea    0xec3(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@SIGINT = global i32 0
@.str = [32 x i8] c"Don't press Ctrl-C to stop me\0A\00"
define void @catch_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @SIGINT
%4 = call i32 @signal(i32 %3, void (i32)* @catch_int)
%5 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@SIGINT = global i32 0
@str = [31 x i8] c"Don't press Ctrl-C to stop me\00"
define void @catch_int(i32 %0) {
%2 = load i32, i32* @SIGINT
%3 = tail call i32 @signal(i32 %2, void (i32)* @catch_int)
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
ret void
}
void XSyncQueryAlarm() {}


x86 assembly (clang, -O0):
<XSyncQueryAlarm>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XSyncQueryAlarm>:
ret

LLVM IR (-O0):
define void @XSyncQueryAlarm() {
ret void
}

LLVM IR (-O2):
define void @XSyncQueryAlarm() {
ret void
}
/* Type definitions */
struct ast_sockaddr {
  int dummy;
};

/* Variables and functions */
char *ast_sockaddr_stringify_fmt(struct ast_sockaddr const *, int);
char *ast_sockaddr_stringify_remote(const struct ast_sockaddr *addr) {
  return ast_sockaddr_stringify_fmt(addr, (((1 << 0) | (1 << 1)) | (1 << 3)));
}


x86 assembly (clang, -O0):
<ast_sockaddr_stringify_remote>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xb,%esi
call   1030 <ast_sockaddr_stringify_fmt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ast_sockaddr_stringify_remote>:
mov    $0xb,%esi
jmp    1030 <ast_sockaddr_stringify_fmt@plt>

LLVM IR (-O0):
%struct.ast_sockaddr = type { i32 }
define i8* @ast_sockaddr_stringify_remote(%struct.ast_sockaddr* %0) {
%2 = alloca %struct.ast_sockaddr*
store %struct.ast_sockaddr* %0, %struct.ast_sockaddr** %2
%3 = load %struct.ast_sockaddr*, %struct.ast_sockaddr** %2
%4 = call i8* @ast_sockaddr_stringify_fmt(%struct.ast_sockaddr* %3, i32 11)
ret i8* %4
}

LLVM IR (-O2):
%struct.ast_sockaddr = type { i32 }
define i8* @ast_sockaddr_stringify_remote(%struct.ast_sockaddr* %0) {
%2 = tail call i8* @ast_sockaddr_stringify_fmt(%struct.ast_sockaddr* %0, i32 11)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ bottomhp();
int /*<<< orphan*/ losehp(int);
void checkloss(int x) {
  if (x > 0) {
    losehp(x);
    bottomhp();
  }
}


x86 assembly (clang, -O0):
<checkloss>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1144 <checkloss+0x24>
mov    -0x4(%rbp),%edi
call   1030 <losehp@plt>
mov    $0x0,%al
call   1040 <bottomhp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkloss>:
test   %edi,%edi
jle    1132 <checkloss+0x12>
push   %rax
call   1030 <losehp@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <bottomhp@plt>
ret

LLVM IR (-O0):
define void @checkloss(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* %2
%7 = call i32 @losehp(i32 %6)
%8 = call i32 (...) @bottomhp()
br label %9
9: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @checkloss(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = tail call i32 @losehp(i32 %0)
%5 = tail call i32 (...) @bottomhp()
br label %6
6: ; preds = %3, %1
ret void
}
void update_min_max(double *min, double *max, double x) {
  if (x < *min)
    *min = x;
  if (x > *max)
    *max = x;
}


x86 assembly (clang, -O0):
<update_min_max>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm1
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
ucomisd %xmm1,%xmm0
jbe    1135 <update_min_max+0x35>
movsd  -0x18(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
movsd  -0x18(%rbp),%xmm0
mov    -0x10(%rbp),%rax
ucomisd (%rax),%xmm0
jbe    1155 <update_min_max+0x55>
movsd  -0x18(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<update_min_max>:
movsd  (%rdi),%xmm1
ucomisd %xmm0,%xmm1
ja     1111 <update_min_max+0x11>
ucomisd (%rsi),%xmm0
ja     111b <update_min_max+0x1b>
ret
movsd  %xmm0,(%rdi)
ucomisd (%rsi),%xmm0
jbe    1110 <update_min_max+0x10>
movsd  %xmm0,(%rsi)
ret

LLVM IR (-O0):
define void @update_min_max(double* %0, double* %1, double %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca double
store double* %0, double** %4
store double* %1, double** %5
store double %2, double* %6
%7 = load double, double* %6
%8 = load double*, double** %4
%9 = load double, double* %8
%10 = fcmp olt double %7, %9
br i1 %10, label %11, label %14
11: ; preds = %3
%12 = load double, double* %6
%13 = load double*, double** %4
store double %12, double* %13
br label %14
14: ; preds = %11, %3
%15 = load double, double* %6
%16 = load double*, double** %5
%17 = load double, double* %16
%18 = fcmp ogt double %15, %17
br i1 %18, label %19, label %22
19: ; preds = %14
%20 = load double, double* %6
%21 = load double*, double** %5
store double %20, double* %21
br label %22
22: ; preds = %19, %14
ret void
}

LLVM IR (-O2):
define void @update_min_max(double* nocapture %0, double* nocapture %1, double %2) {
%4 = load double, double* %0
%5 = fcmp ogt double %4, %2
br i1 %5, label %6, label %7
6: ; preds = %3
store double %2, double* %0
br label %7
7: ; preds = %6, %3
%8 = load double, double* %1
%9 = fcmp olt double %8, %2
br i1 %9, label %10, label %11
10: ; preds = %7
store double %2, double* %1
br label %11
11: ; preds = %10, %7
ret void
}
int iam_lfix_node_init(struct iam_container *c, struct buffer_head *bh,
                       int root) {
  return 0;
}


x86 assembly (clang, -O0):
<iam_lfix_node_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iam_lfix_node_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.iam_container = type opaque
%struct.buffer_head = type opaque
define i32 @iam_lfix_node_init(%struct.iam_container* %0, %struct.buffer_head* %1, i32 %2) {
%4 = alloca %struct.iam_container*
%5 = alloca %struct.buffer_head*
%6 = alloca i32
store %struct.iam_container* %0, %struct.iam_container** %4
store %struct.buffer_head* %1, %struct.buffer_head** %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
%struct.iam_container = type opaque
%struct.buffer_head = type opaque
define i32 @iam_lfix_node_init(%struct.iam_container* nocapture readnone %0, %struct.buffer_head* nocapture readnone %1, i32 %2) {
ret i32 0
}
int yinc(int dir) {
  switch (dir) {
  case 'k':
  case 'u':
  case 'y':
    return -1;
  case 'b':
  case 'j':
  case 'n':
    return 1;
  case 'h':
  case 'l':
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<yinc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x62,%eax
je     119e <yinc+0x9e>
jmp    111b <yinc+0x1b>
mov    -0xc(%rbp),%eax
sub    $0x68,%eax
je     11aa <yinc+0xaa>
jmp    112c <yinc+0x2c>
mov    -0xc(%rbp),%eax
sub    $0x6a,%eax
je     119e <yinc+0x9e>
jmp    113d <yinc+0x3d>
mov    -0xc(%rbp),%eax
sub    $0x6b,%eax
je     1192 <yinc+0x92>
jmp    114e <yinc+0x4e>
mov    -0xc(%rbp),%eax
sub    $0x6c,%eax
je     11aa <yinc+0xaa>
jmp    115f <yinc+0x5f>
mov    -0xc(%rbp),%eax
sub    $0x6e,%eax
je     119e <yinc+0x9e>
jmp    1170 <yinc+0x70>
mov    -0xc(%rbp),%eax
sub    $0x75,%eax
je     1192 <yinc+0x92>
jmp    1181 <yinc+0x81>
mov    -0xc(%rbp),%eax
sub    $0x79,%eax
jne    11af <yinc+0xaf>
jmp    1192 <yinc+0x92>
movl   $0xffffffff,-0x4(%rbp)
jmp    11b6 <yinc+0xb6>
movl   $0x1,-0x4(%rbp)
jmp    11b6 <yinc+0xb6>
jmp    11af <yinc+0xaf>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<yinc>:
add    $0xffffff9e,%edi
cmp    $0x17,%edi
ja     1128 <yinc+0x28>
mov    $0x1101,%eax
bt     %edi,%eax
jb     1122 <yinc+0x22>
mov    $0xffffffff,%eax
mov    $0x880200,%ecx
bt     %edi,%ecx
jae    1128 <yinc+0x28>
ret
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @yinc(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %8 [
i32 107, label %5
i32 117, label %5
i32 121, label %5
i32 98, label %6
i32 106, label %6
i32 110, label %6
i32 104, label %7
i32 108, label %7
]
5: ; preds = %1, %1, %1
store i32 -1, i32* %2
br label %9
6: ; preds = %1, %1, %1
store i32 1, i32* %2
br label %9
7: ; preds = %1, %1
br label %8
8: ; preds = %1, %7
store i32 0, i32* %2
br label %9
9: ; preds = %8, %6, %5
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @yinc(i32 %0) {
switch i32 %0, label %3 [
i32 107, label %4
i32 117, label %4
i32 121, label %4
i32 98, label %2
i32 106, label %2
i32 110, label %2
]
2: ; preds = %1, %1, %1
br label %4
3: ; preds = %1
br label %4
4: ; preds = %1, %1, %1, %3, %2
%5 = phi i32 [ 0, %3 ], [ 1, %2 ], [ -1, %1 ], [ -1, %1 ], [ -1, %1 ]
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ DirectIndexedXE1(int);
int /*<<< orphan*/ LSR8(int /*<<< orphan*/);
void Op56E1(void) { LSR8(DirectIndexedXE1(3)); }


x86 assembly (clang, -O0):
<Op56E1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <DirectIndexedXE1@plt>
mov    %eax,%edi
call   1040 <LSR8@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Op56E1>:
push   %rax
mov    $0x3,%edi
call   1030 <DirectIndexedXE1@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <LSR8@plt>

LLVM IR (-O0):
define void @Op56E1() {
%1 = call i32 @DirectIndexedXE1(i32 3)
%2 = call i32 @LSR8(i32 %1)
ret void
}

LLVM IR (-O2):
define void @Op56E1() {
%1 = tail call i32 @DirectIndexedXE1(i32 3)
%2 = tail call i32 @LSR8(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ writeb_idx_mask(int, int, int, int);
int /*<<< orphan*/ writeb_idx_reg(int, int, int);
void unlock_registers(void) {
  writeb_idx_reg(0x3c5, 0x10, 0x01);
  writeb_idx_mask(0x3d5, 0x47, 0x00, 0x01);
  writeb_idx_mask(0x3d5, 0x03, 0x80, 0x80);
  writeb_idx_mask(0x3d5, 0x11, 0x00, 0x80);
}


x86 assembly (clang, -O0):
<unlock_registers>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3c5,%edi
mov    $0x10,%esi
mov    $0x1,%edx
call   1040 <writeb_idx_reg@plt>
mov    $0x3d5,%edi
mov    $0x47,%esi
xor    %edx,%edx
mov    $0x1,%ecx
call   1030 <writeb_idx_mask@plt>
mov    $0x3d5,%edi
mov    $0x3,%esi
mov    $0x80,%ecx
mov    %ecx,%edx
call   1030 <writeb_idx_mask@plt>
mov    $0x3d5,%edi
mov    $0x11,%esi
xor    %edx,%edx
mov    $0x80,%ecx
call   1030 <writeb_idx_mask@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<unlock_registers>:
push   %rax
mov    $0x3c5,%edi
mov    $0x10,%esi
mov    $0x1,%edx
call   1040 <writeb_idx_reg@plt>
mov    $0x3d5,%edi
mov    $0x47,%esi
xor    %edx,%edx
mov    $0x1,%ecx
call   1030 <writeb_idx_mask@plt>
mov    $0x3d5,%edi
mov    $0x3,%esi
mov    $0x80,%edx
mov    $0x80,%ecx
call   1030 <writeb_idx_mask@plt>
mov    $0x3d5,%edi
mov    $0x11,%esi
xor    %edx,%edx
mov    $0x80,%ecx
pop    %rax
jmp    1030 <writeb_idx_mask@plt>

LLVM IR (-O0):
define void @unlock_registers() {
%1 = call i32 @writeb_idx_reg(i32 965, i32 16, i32 1)
%2 = call i32 @writeb_idx_mask(i32 981, i32 71, i32 0, i32 1)
%3 = call i32 @writeb_idx_mask(i32 981, i32 3, i32 128, i32 128)
%4 = call i32 @writeb_idx_mask(i32 981, i32 17, i32 0, i32 128)
ret void
}

LLVM IR (-O2):
define void @unlock_registers() {
%1 = tail call i32 @writeb_idx_reg(i32 965, i32 16, i32 1)
%2 = tail call i32 @writeb_idx_mask(i32 981, i32 71, i32 0, i32 1)
%3 = tail call i32 @writeb_idx_mask(i32 981, i32 3, i32 128, i32 128)
%4 = tail call i32 @writeb_idx_mask(i32 981, i32 17, i32 0, i32 128)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ baz(int);
void bar(int i) { baz(i); }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <baz@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
jmp    1030 <baz@plt>

LLVM IR (-O0):
define void @bar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @baz(i32 %3)
ret void
}

LLVM IR (-O2):
define void @bar(i32 %0) {
%2 = tail call i32 @baz(i32 %0)
ret void
}
/* Variables and functions */
char *strdup(char *);
char *dup_str(char *s) {
  char *cpy = strdup(s);
  if (cpy == NULL)
    return (NULL);
  return cpy;
}


x86 assembly (clang, -O0):
<dup_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strdup@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1141 <dup_str+0x31>
movq   $0x0,-0x8(%rbp)
jmp    1149 <dup_str+0x39>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dup_str>:
jmp    1030 <strdup@plt>

LLVM IR (-O0):
define i8* @dup_str(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i8* @strdup(i8* %5)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %10
9: ; preds = %1
store i8* null, i8** %2
br label %12
10: ; preds = %1
%11 = load i8*, i8** %4
store i8* %11, i8** %2
br label %12
12: ; preds = %10, %9
%13 = load i8*, i8** %2
ret i8* %13
}

LLVM IR (-O2):
define noalias i8* @dup_str(i8* nocapture %0) {
%2 = tail call i8* @strdup(i8* %0)
ret i8* %2
}
/* Variables and functions */
int two_d_array_len(char **two_d_array) {
  int i = 0;
  for (; two_d_array[i] != NULL; i++)
    ;
  return i;
}


x86 assembly (clang, -O0):
<two_d_array_len>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     1135 <two_d_array_len+0x35>
jmp    1127 <two_d_array_len+0x27>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <two_d_array_len+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<two_d_array_len>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpq   $0x0,(%rdi)
lea    0x8(%rdi),%rdi
jne    1110 <two_d_array_len+0x10>
ret

LLVM IR (-O0):
define i32 @two_d_array_len(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8**, i8*** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8*, i8** %5, i64 %7
%9 = load i8*, i8** %8
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %4
br label %12
12: ; preds = %11
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @two_d_array_len(i8** nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8*, i8** %0, i64 %3
%5 = load i8*, i8** %4
%6 = icmp eq i8* %5, null
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isgraph(int);
void t_isgraph_0xb9() {
  Assert_real((isgraph(185) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              930, ("isgraph should be 0 for 0xb9"));
}


x86 assembly (clang, -O0):
<t_isgraph_0xb9>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb9,%edi
call   1040 <isgraph@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3a2,%edx
lea    0xf5b(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0xb9>:
push   %rax
mov    $0xb9,%edi
call   1040 <isgraph@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3a2,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0xb9\00"
define void @t_isgraph_0xb9() {
%1 = call i64 @isgraph(i32 185)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 930, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0xb9\00"
define void @t_isgraph_0xb9() {
%1 = tail call i64 @isgraph(i32 185)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 930, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int isCopyElemnt(int value, int arr[]) {
  int i = 0;
  for (i = 0; i < arr[-1]; i++) {
    if (arr[i] == value)
      return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<isCopyElemnt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x10(%rbp),%rcx
cmp    -0x4(%rcx),%eax
jge    115c <isCopyElemnt+0x5c>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x8(%rbp),%eax
jne    1149 <isCopyElemnt+0x49>
movl   $0x1,-0x4(%rbp)
jmp    1163 <isCopyElemnt+0x63>
jmp    114e <isCopyElemnt+0x4e>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1119 <isCopyElemnt+0x19>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isCopyElemnt>:
mov    -0x4(%rsi),%eax
test   %eax,%eax
jle    111e <isCopyElemnt+0x1e>
xor    %ecx,%ecx
nopl   0x0(%rax)
cmp    %edi,(%rsi,%rcx,4)
je     1121 <isCopyElemnt+0x21>
add    $0x1,%rcx
cmp    %rcx,%rax
jne    1110 <isCopyElemnt+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isCopyElemnt(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 0, i32* %6
store i32 0, i32* %6
br label %7
7: ; preds = %23, %2
%8 = load i32, i32* %6
%9 = load i32*, i32** %5
%10 = getelementptr inbounds i32, i32* %9, i64 -1
%11 = load i32, i32* %10
%12 = icmp slt i32 %8, %11
br i1 %12, label %13, label %26
13: ; preds = %7
%14 = load i32*, i32** %5
%15 = load i32, i32* %6
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %4
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %22
21: ; preds = %13
store i32 1, i32* %3
br label %27
22: ; preds = %13
br label %23
23: ; preds = %22
%24 = load i32, i32* %6
%25 = add nsw i32 %24, 1
store i32 %25, i32* %6
br label %7
26: ; preds = %7
store i32 0, i32* %3
br label %27
27: ; preds = %26, %21
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @isCopyElemnt(i32 %0, i32* nocapture %1) {
%3 = getelementptr inbounds i32, i32* %1, i64 -1
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %16
6: ; preds = %2
%7 = zext i32 %4 to i64
br label %10
8: ; preds = %10
%9 = icmp eq i64 %15, %7
br i1 %9, label %16, label %10
10: ; preds = %6, %8
%11 = phi i64 [ 0, %6 ], [ %15, %8 ]
%12 = getelementptr inbounds i32, i32* %1, i64 %11
%13 = load i32, i32* %12
%14 = icmp eq i32 %13, %0
%15 = add nuw nsw i64 %11, 1
br i1 %14, label %16, label %8
16: ; preds = %10, %8, %2
%17 = phi i32 [ 0, %2 ], [ 0, %8 ], [ 1, %10 ]
ret i32 %17
}
/* Variables and functions */
char const *LC_ltoa(int);
char const *LC_itoa(int n) { return LC_ltoa(n); }


x86 assembly (clang, -O0):
<LC_itoa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <LC_ltoa@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LC_itoa>:
jmp    1030 <LC_ltoa@plt>

LLVM IR (-O0):
define i8* @LC_itoa(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @LC_ltoa(i32 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @LC_itoa(i32 %0) {
%2 = tail call i8* @LC_ltoa(i32 %0)
ret i8* %2
}
R0RX1(r0, r1, x0, x1, p0, p1) short r0, r1;
short *p0, *p1;
{ r0 = (p1[x1]); }


x86 assembly (clang, -O0):
<R0RX1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,2),%ax
mov    %ax,-0x6(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<R0RX1>:
ret

LLVM IR (-O0):
define i32 @R0RX1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16*, i16** %13
%17 = load i32, i32* %11
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i16, i16* %16, i64 %18
%20 = load i16, i16* %19
store i16 %20, i16* %8
%21 = load i32, i32* %7
ret i32 %21
}

LLVM IR (-O2):
define i32 @R0RX1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture readnone %5) {
ret i32 undef
}
unsigned short int f78(unsigned short int x, unsigned long int y) {
  return (x << y) + (x >> ((-y) & (8 * sizeof(unsigned short) - 1)));
}


x86 assembly (clang, -O0):
<f78>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
movzwl -0x2(%rbp),%eax
mov    -0x10(%rbp),%rcx
shl    %cl,%eax
movzwl -0x2(%rbp),%edx
xor    %ecx,%ecx
sub    -0x10(%rbp),%rcx
and    $0xf,%rcx
sar    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f78>:
mov    %rsi,%rcx
mov    %edi,%eax
shl    %cl,%eax
neg    %cl
and    $0xf,%cl
shr    %cl,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @f78(i16 zeroext %0, i64 %1) {
%3 = alloca i16
%4 = alloca i64
store i16 %0, i16* %3
store i64 %1, i64* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = load i64, i64* %4
%8 = trunc i64 %7 to i32
%9 = shl i32 %6, %8
%10 = load i16, i16* %3
%11 = zext i16 %10 to i32
%12 = load i64, i64* %4
%13 = sub i64 0, %12
%14 = and i64 %13, 15
%15 = trunc i64 %14 to i32
%16 = ashr i32 %11, %15
%17 = add nsw i32 %9, %16
%18 = trunc i32 %17 to i16
ret i16 %18
}

LLVM IR (-O2):
define zeroext i16 @f78(i16 zeroext %0, i64 %1) {
%3 = zext i16 %0 to i32
%4 = trunc i64 %1 to i32
%5 = shl i32 %3, %4
%6 = sub i32 0, %4
%7 = and i32 %6, 15
%8 = lshr i32 %3, %7
%9 = add nsw i32 %8, %5
%10 = trunc i32 %9 to i16
ret i16 %10
}
/* Variables and functions */
void *calloc(int, int);
int /*<<< orphan*/ free(void *);
int /*<<< orphan*/ printf(char *, char);
int main() {
  void *p;
  p = calloc(1, 1024);
  *(char *)p = 0xac;
  printf("%x\n", *(char *)p);
  free(p);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
mov    $0x400,%esi
call   1050 <calloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movb   $0xac,(%rax)
mov    -0x10(%rbp),%rax
lea    0xe9c(%rip),%rdi
movsbl (%rax),%esi
call   1040 <printf@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x1,%edi
mov    $0x400,%esi
call   1050 <calloc@plt>
mov    %rax,%rbx
movb   $0xac,(%rax)
lea    0xeb3(%rip),%rdi
mov    $0xffffffac,%esi
call   1040 <printf@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%x\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = call i8* @calloc(i32 1, i32 1024)
store i8* %3, i8** %2
%4 = load i8*, i8** %2
store i8 -84, i8* %4
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 signext %6)
%8 = load i8*, i8** %2
%9 = call i32 @free(i8* %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%x\0A\00"
define i32 @main() {
%1 = tail call dereferenceable_or_null(1024) i8* @calloc(i32 1, i32 1024)
store i8 -84, i8* %1
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 signext -84)
%3 = tail call i32 @free(i8* %1)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
void randLIB_add_seed(uint64_t seed) { (void)seed; }


x86 assembly (clang, -O0):
<randLIB_add_seed>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<randLIB_add_seed>:
ret

LLVM IR (-O0):
define void @randLIB_add_seed(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret void
}

LLVM IR (-O2):
define void @randLIB_add_seed(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ BNCIO(int);
long int BNC_6() {
  long int stat = 99;
  BNCIO(6);
  return (stat);
}


x86 assembly (clang, -O0):
<BNC_6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x63,-0x8(%rbp)
mov    $0x6,%edi
call   1030 <BNCIO@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BNC_6>:
push   %rax
mov    $0x6,%edi
call   1030 <BNCIO@plt>
mov    $0x63,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @BNC_6() {
%1 = alloca i64
store i64 99, i64* %1
%2 = call i32 @BNCIO(i32 6)
%3 = load i64, i64* %1
ret i64 %3
}

LLVM IR (-O2):
define i64 @BNC_6() {
%1 = tail call i32 @BNCIO(i32 6)
ret i64 99
}
/* Variables and functions */
char const *card_strerror(int);
const char *_card_strerror(void *card_data __attribute__((unused)),
                           int card_rc) {
  return card_strerror(card_rc);
}


x86 assembly (clang, -O0):
<_card_strerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <card_strerror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_card_strerror>:
mov    %esi,%edi
jmp    1030 <card_strerror@plt>

LLVM IR (-O0):
define i8* @_card_strerror(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i8* @card_strerror(i32 %5)
ret i8* %6
}

LLVM IR (-O2):
define i8* @_card_strerror(i8* nocapture readnone %0, i32 %1) {
%3 = tail call i8* @card_strerror(i32 %1)
ret i8* %3
}
int fun814() { return 814; }


x86 assembly (clang, -O0):
<fun814>:
push   %rbp
mov    %rsp,%rbp
mov    $0x32e,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun814>:
mov    $0x32e,%eax
ret

LLVM IR (-O0):
define i32 @fun814() {
ret i32 814
}

LLVM IR (-O2):
define i32 @fun814() {
ret i32 814
}
/* Variables and functions */
int /*<<< orphan*/ swap_hl();
void opcb_36() { swap_hl(); }


x86 assembly (clang, -O0):
<opcb_36>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <swap_hl@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<opcb_36>:
xor    %eax,%eax
jmp    1030 <swap_hl@plt>

LLVM IR (-O0):
define void @opcb_36() {
%1 = call i32 (...) @swap_hl()
ret void
}

LLVM IR (-O2):
define void @opcb_36() {
%1 = tail call i32 (...) @swap_hl()
ret void
}
void OS_CPU_IRQ_ISR_Handler(void) {
  void (*the_isr)(void);
  if ((*(volatile unsigned int *)(0x71200000))) {
    the_isr = (void *)(*(volatile unsigned int *)(0x71200F00));
  } else if ((*(volatile unsigned int *)(0x71300000))) {
    the_isr = (void *)(*(volatile unsigned int *)(0x71300F00));
  }
  (*the_isr)();
  return;
}


x86 assembly (clang, -O0):
<OS_CPU_IRQ_ISR_Handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x71200000,%eax
mov    (%rax),%eax
cmp    $0x0,%eax
je     112a <OS_CPU_IRQ_ISR_Handler+0x2a>
mov    $0x71200f00,%eax
mov    (%rax),%eax
mov    %eax,%eax
mov    %rax,-0x8(%rbp)
jmp    114c <OS_CPU_IRQ_ISR_Handler+0x4c>
mov    $0x71300000,%eax
mov    (%rax),%eax
cmp    $0x0,%eax
je     1147 <OS_CPU_IRQ_ISR_Handler+0x47>
mov    $0x71300f00,%eax
mov    (%rax),%eax
mov    %eax,%eax
mov    %rax,-0x8(%rbp)
jmp    114c <OS_CPU_IRQ_ISR_Handler+0x4c>
call   *-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OS_CPU_IRQ_ISR_Handler>:
mov    $0x71200f00,%eax
cmpl   $0x0,0x71200000
je     1113 <OS_CPU_IRQ_ISR_Handler+0x13>
mov    (%rax),%eax
jmp    *%rax
mov    0x71300000,%eax
mov    $0x71300f00,%eax
mov    (%rax),%eax
jmp    *%rax

LLVM IR (-O0):
define void @OS_CPU_IRQ_ISR_Handler() {
%1 = alloca void ()*
%2 = load volatile i32, i32* inttoptr (i64 1897922560 to i32*)
%3 = icmp ne i32 %2, 0
br i1 %3, label %4, label %9
4: ; preds = %0
%5 = load volatile i32, i32* inttoptr (i64 1897926400 to i32*)
%6 = zext i32 %5 to i64
%7 = inttoptr i64 %6 to i8*
%8 = bitcast i8* %7 to void ()*
store void ()* %8, void ()** %1
br label %18
9: ; preds = %0
%10 = load volatile i32, i32* inttoptr (i64 1898971136 to i32*)
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %17
12: ; preds = %9
%13 = load volatile i32, i32* inttoptr (i64 1898974976 to i32*)
%14 = zext i32 %13 to i64
%15 = inttoptr i64 %14 to i8*
%16 = bitcast i8* %15 to void ()*
store void ()* %16, void ()** %1
br label %17
17: ; preds = %12, %9
br label %18
18: ; preds = %17, %4
%19 = load void ()*, void ()** %1
ret void
}

LLVM IR (-O2):
define void @OS_CPU_IRQ_ISR_Handler() {
%1 = load volatile i32, i32* inttoptr (i64 1897922560 to i32*)
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = load volatile i32, i32* inttoptr (i64 1898971136 to i32*)
%5 = icmp ne i32 %4, 0
tail call void @llvm.assume(i1 %5)
br label %6
6: ; preds = %0, %3
%7 = phi i32* [ inttoptr (i64 1898974976 to i32*), %3 ], [ inttoptr (i64 1897926400 to i32*), %0 ]
%8 = load volatile i32, i32* %7
%9 = zext i32 %8 to i64
%10 = inttoptr i64 %9 to void ()*
tail call void %10()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void process(char *c, int n) {
  int i = 0;
  while (i < n) {
    printf("%c", c[i]);
    i++;
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<process>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    115a <process+0x4a>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%esi
lea    0xebb(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <process+0x16>
lea    0xea2(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<process>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1143 <process+0x33>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movsbl (%r14,%rbx,1),%edi
call   1030 <putchar@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <process+0x20>
mov    $0xa,%edi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @process(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %10, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %16)
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
define void @process(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %14
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %12, %6 ]
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = tail call i32 @putchar(i32 %10)
%12 = add nuw nsw i64 %7, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %14, label %6
14: ; preds = %6, %2
%15 = tail call i32 @putchar(i32 10)
ret void
}