xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ gmvwrite_nodev_data(char *, char *, char *, char *);
void fgmvwrite_nodev_data_(char *nndes, char *x, char *y, char *z) {
  gmvwrite_nodev_data(nndes, x, y, z);
}


x86 assembly (clang, -O0):
<fgmvwrite_nodev_data_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <gmvwrite_nodev_data@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgmvwrite_nodev_data_>:
jmp    1030 <gmvwrite_nodev_data@plt>

LLVM IR (-O0):
define void @fgmvwrite_nodev_data_(i8* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = load i8*, i8** %8
%13 = call i32 @gmvwrite_nodev_data(i8* %9, i8* %10, i8* %11, i8* %12)
ret void
}

LLVM IR (-O2):
define void @fgmvwrite_nodev_data_(i8* %0, i8* %1, i8* %2, i8* %3) {
%5 = tail call i32 @gmvwrite_nodev_data(i8* %0, i8* %1, i8* %2, i8* %3)
ret void
}
/* Variables and functions */
int q();
int t(void) { return q(); }


x86 assembly (clang, -O0):
<t>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <q@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t>:
xor    %eax,%eax
jmp    1030 <q@plt>

LLVM IR (-O0):
define i32 @t() {
%1 = call i32 (...) @q()
ret i32 %1
}

LLVM IR (-O2):
define i32 @t() {
%1 = tail call i32 (...) @q()
ret i32 %1
}
/* Type definitions */
typedef scalar_t__ uint_fast64_t;

/* Variables and functions */
bool SHAREMIND_SET_KEY_LESS_THAN_uint_fast64_t(uint_fast64_t const k1,
                                               uint_fast64_t const k2) {
  return k1 < k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_SET_KEY_LESS_THAN_uint_fast64_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_SET_KEY_LESS_THAN_uint_fast64_t>:
xor    %eax,%eax
cmp    %rsi,%rdi
setl   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_SET_KEY_LESS_THAN_uint_fast64_t(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @SHAREMIND_SET_KEY_LESS_THAN_uint_fast64_t(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ _fail(char const *const, int const);
int /*<<< orphan*/ integer_not_in_range_display_error(unsigned long const,
                                                      unsigned long const,
                                                      unsigned long const);
void _assert_not_in_range(const unsigned long int value,
                          const unsigned long int minimum,
                          const unsigned long int maximum,
                          const char *const file, const int line) {
  if (!integer_not_in_range_display_error(value, minimum, maximum)) {
    _fail(file, line);
  }
}


x86 assembly (clang, -O0):
<_assert_not_in_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <integer_not_in_range_display_error@plt>
cmp    $0x0,%eax
jne    1162 <_assert_not_in_range+0x42>
mov    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%esi
call   1040 <_fail@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_assert_not_in_range>:
push   %rbp
push   %rbx
push   %rax
mov    %r8d,%ebp
mov    %rcx,%rbx
call   1030 <integer_not_in_range_display_error@plt>
test   %eax,%eax
je     1139 <_assert_not_in_range+0x19>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <_fail@plt>

LLVM IR (-O0):
define void @_assert_not_in_range(i64 %0, i64 %1, i64 %2, i8* %3, i32 %4) {
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i8*
%10 = alloca i32
store i64 %0, i64* %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%11 = load i64, i64* %6
%12 = load i64, i64* %7
%13 = load i64, i64* %8
%14 = call i32 @integer_not_in_range_display_error(i64 %11, i64 %12, i64 %13)
%15 = icmp ne i32 %14, 0
br i1 %15, label %20, label %16
16: ; preds = %5
%17 = load i8*, i8** %9
%18 = load i32, i32* %10
%19 = call i32 @_fail(i8* %17, i32 %18)
br label %20
20: ; preds = %16, %5
ret void
}

LLVM IR (-O2):
define void @_assert_not_in_range(i64 %0, i64 %1, i64 %2, i8* %3, i32 %4) {
%6 = tail call i32 @integer_not_in_range_display_error(i64 %0, i64 %1, i64 %2)
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = tail call i32 @_fail(i8* %3, i32 %4)
br label %10
10: ; preds = %8, %5
ret void
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
double stdlib_strided_dnansumpw(int, double *, int);
int main() {
  double x[] = {1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 0.0 / 0.0, 0.0 / 0.0};
  int64_t N = 5;
  int64_t stride = 2;
  double v = stdlib_strided_dnansumpw(N, x, stride);
  printf("sum: %lf\n", v);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
lea    -0x50(%rbp),%rdi
lea    0xebd(%rip),%rsi
mov    $0x50,%edx
call   1040 <memcpy@plt>
movl   $0x5,-0x54(%rbp)
movl   $0x2,-0x58(%rbp)
mov    -0x54(%rbp),%edi
lea    -0x50(%rbp),%rsi
mov    -0x58(%rbp),%edx
call   1050 <stdlib_strided_dnansumpw@plt>
movsd  %xmm0,-0x60(%rbp)
movsd  -0x60(%rbp),%xmm0
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x58,%rsp
movaps 0xf15(%rip),%xmm0
movaps %xmm0,0x40(%rsp)
movaps 0xef9(%rip),%xmm0
movaps %xmm0,0x30(%rsp)
movaps 0xedd(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xec1(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xea5(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rsi
mov    $0x5,%edi
mov    $0x2,%edx
call   1040 <stdlib_strided_dnansumpw@plt>
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x58,%rsp
ret

LLVM IR (-O0):
@__const.main.x = [10 x double] [double 1.000000e+00, double 2.000000e+00, double 3.000000e+00, double 4.000000e+00, double 5.000000e+00, double 6.000000e+00, double 7.000000e+00, double 8.000000e+00, double 0x7FF8000000000000, double 0x7FF8000000000000]
@.str = [10 x i8] c"sum: %lf\0A\00"
define i32 @main() {
%1 = alloca [10 x double]
%2 = alloca i32
%3 = alloca i32
%4 = alloca double
%5 = bitcast [10 x double]* %1 to i8*
store i32 5, i32* %2
store i32 2, i32* %3
%6 = load i32, i32* %2
%7 = getelementptr inbounds [10 x double], [10 x double]* %1, i64 0, i64 0
%8 = load i32, i32* %3
%9 = call double @stdlib_strided_dnansumpw(i32 %6, double* %7, i32 %8)
store double %9, double* %4
%10 = load double, double* %4
%11 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), double %10)
ret i32 0
}

LLVM IR (-O2):
@__const.main.x = [10 x double] [double 1.000000e+00, double 2.000000e+00, double 3.000000e+00, double 4.000000e+00, double 5.000000e+00, double 6.000000e+00, double 7.000000e+00, double 8.000000e+00, double 0x7FF8000000000000, double 0x7FF8000000000000]
@.str = [10 x i8] c"sum: %lf\0A\00"
define i32 @main() {
%1 = alloca [10 x double]
%2 = bitcast [10 x double]* %1 to i8*
%3 = getelementptr inbounds [10 x double], [10 x double]* %1, i64 0, i64 0
%4 = call double @stdlib_strided_dnansumpw(i32 5, double* %3, i32 2)
%5 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), double %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void ifyyfree(void *ptr) { free((char *)ptr); }


x86 assembly (clang, -O0):
<ifyyfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ifyyfree>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @ifyyfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @ifyyfree(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ non_det;

/* Variables and functions */
int /*<<< orphan*/ klee_make_symbolic(short *, int, char *);
short map2check_non_det_short() {
  short non_det;
  klee_make_symbolic(&non_det, sizeof(non_det), "non_det_#type");
  return non_det;
}


x86 assembly (clang, -O0):
<map2check_non_det_short>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x2(%rbp),%rdi
mov    $0x2,%esi
lea    0xed8(%rip),%rdx
call   1030 <klee_make_symbolic@plt>
movswl -0x2(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<map2check_non_det_short>:
push   %rax
lea    0xee8(%rip),%rdx
lea    0x6(%rsp),%rdi
mov    $0x2,%esi
call   1030 <klee_make_symbolic@plt>
movzwl 0x6(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"non_det_#type\00"
define signext i16 @map2check_non_det_short() {
%1 = alloca i16
%2 = call i32 @klee_make_symbolic(i16* %1, i32 2, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%3 = load i16, i16* %1
ret i16 %3
}

LLVM IR (-O2):
@.str = [14 x i8] c"non_det_#type\00"
define signext i16 @map2check_non_det_short() {
%1 = alloca i16
%2 = bitcast i16* %1 to i8*
%3 = call i32 @klee_make_symbolic(i16* %1, i32 2, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%4 = load i16, i16* %1
ret i16 %4
}
/* Variables and functions */
scalar_t__ isspace(char);
char *skip_wspace(char *text) {
  for (; isspace(*text) && *text != 0; ++text)
    ;
  return text;
}


x86 assembly (clang, -O0):
<skip_wspace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x9(%rbp)
je     114a <skip_wspace+0x3a>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    115a <skip_wspace+0x4a>
jmp    1170 <skip_wspace+0x60>
jmp    115f <skip_wspace+0x4f>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <skip_wspace+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_wspace>:
push   %rbx
mov    %rdi,%rbx
movsbl (%rdi),%edi
nopw   0x0(%rax,%rax,1)
call   1030 <isspace@plt>
test   %rax,%rax
je     1139 <skip_wspace+0x29>
cmpb   $0x0,(%rbx)
je     1139 <skip_wspace+0x29>
movsbl 0x1(%rbx),%edi
add    $0x1,%rbx
jmp    1120 <skip_wspace+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @skip_wspace(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %16, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = call i64 @isspace(i8 signext %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br label %13
13: ; preds = %8, %3
%14 = phi i1 [ false, %3 ], [ %12, %8 ]
br i1 %14, label %15, label %19
15: ; preds = %13
br label %16
16: ; preds = %15
%17 = load i8*, i8** %2
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %2
br label %3
19: ; preds = %13
%20 = load i8*, i8** %2
ret i8* %20
}

LLVM IR (-O2):
define i8* @skip_wspace(i8* %0) {
%2 = load i8, i8* %0
%3 = tail call i64 @isspace(i8 signext %2)
%4 = icmp eq i64 %3, 0
br i1 %4, label %14, label %5
5: ; preds = %1, %9
%6 = phi i8* [ %10, %9 ], [ %0, %1 ]
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %5
%10 = getelementptr inbounds i8, i8* %6, i64 1
%11 = load i8, i8* %10
%12 = tail call i64 @isspace(i8 signext %11)
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %5
14: ; preds = %5, %9, %1
%15 = phi i8* [ %0, %1 ], [ %10, %9 ], [ %6, %5 ]
ret i8* %15
}
double continuous_or(double x, double y) {
  return (x * (1.0 - y) + (1.0 - x) * y + x * y);
}


x86 assembly (clang, -O0):
<continuous_or>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  0xee5(%rip),%xmm2
subsd  -0x10(%rbp),%xmm2
movsd  0xed8(%rip),%xmm0
subsd  -0x8(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<continuous_or>:
movsd  0xef8(%rip),%xmm2
movapd %xmm2,%xmm3
subsd  %xmm1,%xmm3
subsd  %xmm0,%xmm2
mulsd  %xmm1,%xmm2
mulsd  %xmm0,%xmm3
addsd  %xmm2,%xmm3
mulsd  %xmm1,%xmm0
addsd  %xmm3,%xmm0
ret

LLVM IR (-O0):
define double @continuous_or(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fsub double 1.000000e+00, %6
%8 = load double, double* %3
%9 = fsub double 1.000000e+00, %8
%10 = load double, double* %4
%11 = fmul double %9, %10
%12 = call double @llvm.fmuladd.f64(double %5, double %7, double %11)
%13 = load double, double* %3
%14 = load double, double* %4
%15 = call double @llvm.fmuladd.f64(double %13, double %14, double %12)
ret double %15
}

LLVM IR (-O2):
define double @continuous_or(double %0, double %1) {
%3 = fsub double 1.000000e+00, %1
%4 = fsub double 1.000000e+00, %0
%5 = fmul double %4, %1
%6 = tail call double @llvm.fmuladd.f64(double %0, double %3, double %5)
%7 = tail call double @llvm.fmuladd.f64(double %0, double %1, double %6)
ret double %7
}
/* Variables and functions */
int i2c_smbus_read_word_data(int, unsigned char);
int i2cReadWord(int i2cAdapter, unsigned char address) {
  int value;
  if ((value = i2c_smbus_read_word_data(i2cAdapter, address)) < 0) {
    return -1;
  }
  return value;
}


x86 assembly (clang, -O0):
<i2cReadWord>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%edi
movzbl -0x9(%rbp),%esi
call   1030 <i2c_smbus_read_word_data@plt>
mov    %eax,-0x10(%rbp)
cmp    $0x0,%eax
jge    1145 <i2cReadWord+0x35>
movl   $0xffffffff,-0x4(%rbp)
jmp    114b <i2cReadWord+0x3b>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2cReadWord>:
push   %rax
call   1030 <i2c_smbus_read_word_data@plt>
test   %eax,%eax
mov    $0xffffffff,%ecx
cmovs  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @i2cReadWord(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8
%6 = alloca i32
store i32 %0, i32* %4
store i8 %1, i8* %5
%7 = load i32, i32* %4
%8 = load i8, i8* %5
%9 = call i32 @i2c_smbus_read_word_data(i32 %7, i8 zeroext %8)
store i32 %9, i32* %6
%10 = icmp slt i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 -1, i32* %3
br label %14
12: ; preds = %2
%13 = load i32, i32* %6
store i32 %13, i32* %3
br label %14
14: ; preds = %12, %11
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @i2cReadWord(i32 %0, i8 zeroext %1) {
%3 = tail call i32 @i2c_smbus_read_word_data(i32 %0, i8 zeroext %1)
%4 = icmp sgt i32 %3, -1
%5 = select i1 %4, i32 %3, i32 -1
ret i32 %5
}
/* Variables and functions */
int INT_MIN;
int test8(int x) {
  int y = 0x1234;
  int z = INT_MIN;
  return (x ^ y) ^ z;
}


x86 assembly (clang, -O0):
<test8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1234,-0x8(%rbp)
mov    0x2ed3(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
xor    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test8>:
mov    %edi,%eax
mov    0x2edf(%rip),%rcx
xor    (%rcx),%eax
xor    $0x1234,%eax
ret

LLVM IR (-O0):
@INT_MIN = global i32 0
define i32 @test8(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 4660, i32* %3
%5 = load i32, i32* @INT_MIN
store i32 %5, i32* %4
%6 = load i32, i32* %2
%7 = load i32, i32* %3
%8 = xor i32 %6, %7
%9 = load i32, i32* %4
%10 = xor i32 %8, %9
ret i32 %10
}

LLVM IR (-O2):
@INT_MIN = global i32 0
define i32 @test8(i32 %0) {
%2 = load i32, i32* @INT_MIN
%3 = xor i32 %2, %0
%4 = xor i32 %3, 4660
ret i32 %4
}
/* Type definitions */
struct cpu {
  int dummy;
};

/* Variables and functions */
unsigned char cpu_get_a(struct cpu *);
unsigned char cpu_get_f(struct cpu *);
unsigned short cpu_get_af(struct cpu *cpu) {
  unsigned char a = cpu_get_a(cpu);
  unsigned char f = cpu_get_f(cpu);
  return (((unsigned short)((unsigned char)(f))) |
          (((unsigned short)((unsigned char)(a))) << 8));
}


x86 assembly (clang, -O0):
<cpu_get_af>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <cpu_get_a@plt>
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <cpu_get_f@plt>
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
movzwl %ax,%eax
movzbl -0x9(%rbp),%ecx
movzwl %cx,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
movzwl %ax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_get_af>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <cpu_get_a@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <cpu_get_f@plt>
movzbl %al,%ecx
movzbl %bpl,%eax
shl    $0x8,%eax
or     %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.cpu = type { i32 }
define zeroext i16 @cpu_get_af(%struct.cpu* %0) {
%2 = alloca %struct.cpu*
%3 = alloca i8
%4 = alloca i8
store %struct.cpu* %0, %struct.cpu** %2
%5 = load %struct.cpu*, %struct.cpu** %2
%6 = call zeroext i8 @cpu_get_a(%struct.cpu* %5)
store i8 %6, i8* %3
%7 = load %struct.cpu*, %struct.cpu** %2
%8 = call zeroext i8 @cpu_get_f(%struct.cpu* %7)
store i8 %8, i8* %4
%9 = load i8, i8* %4
%10 = zext i8 %9 to i16
%11 = zext i16 %10 to i32
%12 = load i8, i8* %3
%13 = zext i8 %12 to i16
%14 = zext i16 %13 to i32
%15 = shl i32 %14, 8
%16 = or i32 %11, %15
%17 = trunc i32 %16 to i16
ret i16 %17
}

LLVM IR (-O2):
%struct.cpu = type { i32 }
define zeroext i16 @cpu_get_af(%struct.cpu* %0) {
%2 = tail call zeroext i8 @cpu_get_a(%struct.cpu* %0)
%3 = tail call zeroext i8 @cpu_get_f(%struct.cpu* %0)
%4 = zext i8 %3 to i16
%5 = zext i8 %2 to i16
%6 = shl nuw i16 %5, 8
%7 = or i16 %6, %4
ret i16 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void bar() { printf("this working? \n"); }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"this working? \0A\00"
define void @bar() {
%1 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [15 x i8] c"this working? \00"
define void @bar() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef scalar_t__ x;
typedef int uint64_t;

/* Variables and functions */
extern uint64_t __swab64(uint64_t x) {
  return (
      (uint64_t)((uint64_t)(((uint64_t)(x) & (uint64_t)0x00000000000000ff)
                            << 56) |
                 (uint64_t)(((uint64_t)(x) & (uint64_t)0x000000000000ff00)
                            << 40) |
                 (uint64_t)(((uint64_t)(x) & (uint64_t)0x0000000000ff0000)
                            << 24) |
                 (uint64_t)(((uint64_t)(x) & (uint64_t)0x00000000ff000000)
                            << 8) |
                 (uint64_t)(((uint64_t)(x) & (uint64_t)0x000000ff00000000) >>
                            8) |
                 (uint64_t)(((uint64_t)(x) & (uint64_t)0x0000ff0000000000) >>
                            24) |
                 (uint64_t)(((uint64_t)(x) & (uint64_t)0x00ff000000000000) >>
                            40) |
                 (uint64_t)(((uint64_t)(x) & (uint64_t)0xff00000000000000) >>
                            56)));
}


x86 assembly (clang, -O0):
<__swab64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    $0x38,%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
and    $0xff00,%edx
mov    $0x28,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff0000,%ecx
shl    $0x18,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff000000,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0x0,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0x0,%ecx
sar    $0x18,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%edx
and    $0x0,%edx
mov    $0x28,%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%edx
and    $0x0,%edx
mov    $0x38,%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__swab64>:
ret

LLVM IR (-O0):
define i32 @__swab64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
%5 = shl i32 %4, 56
%6 = load i32, i32* %2
%7 = and i32 %6, 65280
%8 = shl i32 %7, 40
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = and i32 %10, 16711680
%12 = shl i32 %11, 24
%13 = or i32 %9, %12
%14 = load i32, i32* %2
%15 = and i32 %14, -16777216
%16 = shl i32 %15, 8
%17 = or i32 %13, %16
%18 = load i32, i32* %2
%19 = and i32 %18, 0
%20 = ashr i32 %19, 8
%21 = or i32 %17, %20
%22 = load i32, i32* %2
%23 = and i32 %22, 0
%24 = ashr i32 %23, 24
%25 = or i32 %21, %24
%26 = load i32, i32* %2
%27 = and i32 %26, 0
%28 = ashr i32 %27, 40
%29 = or i32 %25, %28
%30 = load i32, i32* %2
%31 = and i32 %30, 0
%32 = ashr i32 %31, 56
%33 = or i32 %29, %32
ret i32 %33
}

LLVM IR (-O2):
define i32 @__swab64(i32 %0) {
ret i32 poison
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char const *, int);
void ft_putnbr_hex(int octet, int rem) {
  const char *base = "0123456789abcdef";
  if (rem > 1)
    ft_putnbr_hex(octet / 16, rem - 1);
  write(1, base + (octet % 16), 1);
}


x86 assembly (clang, -O0):
<ft_putnbr_hex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    0xecb(%rip),%rax
mov    %rax,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    115b <ft_putnbr_hex+0x3b>
mov    -0x4(%rbp),%eax
mov    $0x10,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
mov    -0x8(%rbp),%esi
sub    $0x1,%esi
call   1030 <ft_putnbr_hex@plt>
mov    -0x10(%rbp),%rsi
mov    -0x4(%rbp),%eax
mov    $0x10,%ecx
cltd
idiv   %ecx
movslq %edx,%rax
add    %rax,%rsi
mov    $0x1,%edx
mov    %edx,%edi
call   1040 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putnbr_hex>:
push   %rbx
mov    %edi,%ebx
cmp    $0x2,%esi
jl     113b <ft_putnbr_hex+0x1b>
lea    0xf(%rbx),%edi
test   %ebx,%ebx
cmovns %ebx,%edi
sar    $0x4,%edi
add    $0xffffffff,%esi
call   1030 <ft_putnbr_hex@plt>
lea    0xf(%rbx),%eax
test   %ebx,%ebx
cmovns %ebx,%eax
and    $0xfffffff0,%eax
sub    %eax,%ebx
movslq %ebx,%rax
lea    0xeae(%rip),%rsi
add    %rax,%rsi
mov    $0x1,%edi
mov    $0x1,%edx
pop    %rbx
jmp    1040 <write@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"0123456789abcdef\00"
define void @ft_putnbr_hex(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %3
store i32 %1, i32* %4
store i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8** %5
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 1
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load i32, i32* %3
%10 = sdiv i32 %9, 16
%11 = load i32, i32* %4
%12 = sub nsw i32 %11, 1
br label %13
13: ; preds = %8, %2
%14 = load i8*, i8** %5
%15 = load i32, i32* %3
%16 = srem i32 %15, 16
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %14, i64 %17
%19 = call i32 @write(i32 1, i8* %18, i32 1)
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"0123456789abcdef\00"
define void @ft_putnbr_hex(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, 1
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = sdiv i32 %0, 16
%6 = add nsw i32 %1, -1
tail call void @ft_putnbr_hex(i32 %5, i32 %6)
br label %7
7: ; preds = %4, %2
%8 = srem i32 %0, 16
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds [17 x i8], [17 x i8]* @.str, i64 0, i64 %9
%11 = tail call i32 @write(i32 1, i8* %10, i32 1)
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long serial;
};
typedef TYPE_1__ XExposeEvent;

/* Variables and functions */
void set_XExposeEvent_serial(void *_p, unsigned long _v) {
  ((XExposeEvent *)_p)->serial = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XExposeEvent_serial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XExposeEvent_serial>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define void @set_XExposeEvent_serial(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @set_XExposeEvent_serial(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
int /*<<< orphan*/ flip2(unsigned short const *, unsigned short *, int);
int read(int, short *, size_t);
ssize_t read_int2_array(int f, short *iarray, size_t n) {
  ssize_t nread = read(f, iarray, n * 2);
  if (nread <= 0)
    return 0;
  flip2((const unsigned short *)iarray, (unsigned short *)iarray, nread / 2);
  return nread / 2;
}


x86 assembly (clang, -O0):
<read_int2_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
shl    $0x1,%rdx
call   1030 <read@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jg     1160 <read_int2_array+0x40>
movl   $0x0,-0x4(%rbp)
jmp    1188 <read_int2_array+0x68>
mov    -0x10(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x1c(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%edx
call   1040 <flip2@plt>
mov    -0x1c(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_int2_array>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
add    %rdx,%rdx
call   1030 <read@plt>
test   %eax,%eax
jle    1145 <read_int2_array+0x25>
mov    %eax,%ebp
shr    %ebp
mov    %rbx,%rdi
mov    %rbx,%rsi
mov    %ebp,%edx
call   1040 <flip2@plt>
jmp    1147 <read_int2_array+0x27>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @read_int2_array(i32 %0, i16* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i16*
%7 = alloca i64
%8 = alloca i32
store i32 %0, i32* %5
store i16* %1, i16** %6
store i64 %2, i64* %7
%9 = load i32, i32* %5
%10 = load i16*, i16** %6
%11 = load i64, i64* %7
%12 = mul i64 %11, 2
%13 = call i32 @read(i32 %9, i16* %10, i64 %12)
store i32 %13, i32* %8
%14 = load i32, i32* %8
%15 = icmp sle i32 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %3
store i32 0, i32* %4
br label %25
17: ; preds = %3
%18 = load i16*, i16** %6
%19 = load i16*, i16** %6
%20 = load i32, i32* %8
%21 = sdiv i32 %20, 2
%22 = call i32 @flip2(i16* %18, i16* %19, i32 %21)
%23 = load i32, i32* %8
%24 = sdiv i32 %23, 2
store i32 %24, i32* %4
br label %25
25: ; preds = %17, %16
%26 = load i32, i32* %4
ret i32 %26
}

LLVM IR (-O2):
define i32 @read_int2_array(i32 %0, i16* %1, i64 %2) {
%4 = shl i64 %2, 1
%5 = tail call i32 @read(i32 %0, i16* %1, i64 %4)
%6 = icmp slt i32 %5, 1
br i1 %6, label %10, label %7
7: ; preds = %3
%8 = lshr i32 %5, 1
%9 = tail call i32 @flip2(i16* %1, i16* %1, i32 %8)
br label %10
10: ; preds = %3, %7
%11 = phi i32 [ %8, %7 ], [ 0, %3 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ Beep(int, int);
int /*<<< orphan*/ vTaskDelay(int);
void GPS_LockEnd(void) {
  Beep(18000, 128);
  vTaskDelay(100);
  Beep(18000, 0);
  vTaskDelay(50);
  Beep(20000, 128);
  vTaskDelay(100);
  Beep(20000, 0);
}


x86 assembly (clang, -O0):
<GPS_LockEnd>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4650,%edi
mov    $0x80,%esi
call   1030 <Beep@plt>
mov    $0x64,%edi
call   1040 <vTaskDelay@plt>
mov    $0x4650,%edi
xor    %esi,%esi
call   1030 <Beep@plt>
mov    $0x32,%edi
call   1040 <vTaskDelay@plt>
mov    $0x4e20,%edi
mov    $0x80,%esi
call   1030 <Beep@plt>
mov    $0x64,%edi
call   1040 <vTaskDelay@plt>
mov    $0x4e20,%edi
xor    %esi,%esi
call   1030 <Beep@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPS_LockEnd>:
push   %rax
mov    $0x4650,%edi
mov    $0x80,%esi
call   1030 <Beep@plt>
mov    $0x64,%edi
call   1040 <vTaskDelay@plt>
mov    $0x4650,%edi
xor    %esi,%esi
call   1030 <Beep@plt>
mov    $0x32,%edi
call   1040 <vTaskDelay@plt>
mov    $0x4e20,%edi
mov    $0x80,%esi
call   1030 <Beep@plt>
mov    $0x64,%edi
call   1040 <vTaskDelay@plt>
mov    $0x4e20,%edi
xor    %esi,%esi
pop    %rax
jmp    1030 <Beep@plt>

LLVM IR (-O0):
define void @GPS_LockEnd() {
%1 = call i32 @Beep(i32 18000, i32 128)
%2 = call i32 @vTaskDelay(i32 100)
%3 = call i32 @Beep(i32 18000, i32 0)
%4 = call i32 @vTaskDelay(i32 50)
%5 = call i32 @Beep(i32 20000, i32 128)
%6 = call i32 @vTaskDelay(i32 100)
%7 = call i32 @Beep(i32 20000, i32 0)
ret void
}

LLVM IR (-O2):
define void @GPS_LockEnd() {
%1 = tail call i32 @Beep(i32 18000, i32 128)
%2 = tail call i32 @vTaskDelay(i32 100)
%3 = tail call i32 @Beep(i32 18000, i32 0)
%4 = tail call i32 @vTaskDelay(i32 50)
%5 = tail call i32 @Beep(i32 20000, i32 128)
%6 = tail call i32 @vTaskDelay(i32 100)
%7 = tail call i32 @Beep(i32 20000, i32 0)
ret void
}
/* Variables and functions */
scalar_t__ isdigit(char);
int getop(char s[]) {
  if (isdigit(s[0]) || (s[0] == '-' && s[1] != '\0'))
    return '0';
  else
    return s[0];
}


x86 assembly (clang, -O0):
<getop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
jne    1153 <getop+0x43>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2d,%eax
jne    115f <getop+0x4f>
mov    -0x10(%rbp),%rax
movsbl 0x1(%rax),%eax
cmp    $0x0,%eax
je     115f <getop+0x4f>
movl   $0x30,-0x4(%rbp)
jmp    1169 <getop+0x59>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getop>:
push   %rbx
mov    %rdi,%rbx
movsbl (%rdi),%edi
call   1030 <isdigit@plt>
mov    %rax,%rcx
mov    $0x30,%eax
test   %rcx,%rcx
je     112b <getop+0x1b>
pop    %rbx
ret
movsbl (%rbx),%ecx
cmp    $0x2d,%ecx
jne    1139 <getop+0x29>
cmpb   $0x0,0x1(%rbx)
jne    1129 <getop+0x19>
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @getop(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = call i64 @isdigit(i8 signext %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %21, label %9
9: ; preds = %1
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 0
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 45
br i1 %14, label %15, label %22
15: ; preds = %9
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i64 1
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp ne i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %15, %1
store i32 48, i32* %2
br label %27
22: ; preds = %15, %9
%23 = load i8*, i8** %3
%24 = getelementptr inbounds i8, i8* %23, i64 0
%25 = load i8, i8* %24
%26 = sext i8 %25 to i32
store i32 %26, i32* %2
br label %27
27: ; preds = %22, %21
%28 = load i32, i32* %2
ret i32 %28
}

LLVM IR (-O2):
define i32 @getop(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = tail call i64 @isdigit(i8 signext %2)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %14
5: ; preds = %1
%6 = load i8, i8* %0
%7 = icmp eq i8 %6, 45
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = getelementptr inbounds i8, i8* %0, i64 1
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %8, %5
%13 = sext i8 %6 to i32
br label %14
14: ; preds = %1, %8, %12
%15 = phi i32 [ %13, %12 ], [ 48, %8 ], [ 48, %1 ]
ret i32 %15
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
bool eth_addr_is_zero(const uint8_t ea[6]) {
  return !(ea[0] | ea[1] | ea[2] | ea[3] | ea[4] | ea[5]);
}


x86 assembly (clang, -O0):
<eth_addr_is_zero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x8(%rbp),%rcx
or     0x4(%rcx),%eax
mov    -0x8(%rbp),%rcx
or     0x8(%rcx),%eax
mov    -0x8(%rbp),%rcx
or     0xc(%rcx),%eax
mov    -0x8(%rbp),%rcx
or     0x10(%rcx),%eax
mov    -0x8(%rbp),%rcx
or     0x14(%rcx),%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<eth_addr_is_zero>:
movdqu (%rdi),%xmm0
pshufd $0xee,%xmm0,%xmm1
por    %xmm0,%xmm1
pshufd $0x55,%xmm1,%xmm0
por    %xmm1,%xmm0
movd   %xmm0,%ecx
or     0x10(%rdi),%ecx
xor    %eax,%eax
or     0x14(%rdi),%ecx
sete   %al
ret

LLVM IR (-O0):
define i32 @eth_addr_is_zero(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = load i32*, i32** %2
%7 = getelementptr inbounds i32, i32* %6, i64 1
%8 = load i32, i32* %7
%9 = or i32 %5, %8
%10 = load i32*, i32** %2
%11 = getelementptr inbounds i32, i32* %10, i64 2
%12 = load i32, i32* %11
%13 = or i32 %9, %12
%14 = load i32*, i32** %2
%15 = getelementptr inbounds i32, i32* %14, i64 3
%16 = load i32, i32* %15
%17 = or i32 %13, %16
%18 = load i32*, i32** %2
%19 = getelementptr inbounds i32, i32* %18, i64 4
%20 = load i32, i32* %19
%21 = or i32 %17, %20
%22 = load i32*, i32** %2
%23 = getelementptr inbounds i32, i32* %22, i64 5
%24 = load i32, i32* %23
%25 = or i32 %21, %24
%26 = icmp ne i32 %25, 0
%27 = xor i1 %26, true
%28 = zext i1 %27 to i32
ret i32 %28
}

LLVM IR (-O2):
define i32 @eth_addr_is_zero(i32* nocapture %0) {
%2 = bitcast i32* %0 to <4 x i32>*
%3 = load <4 x i32>, <4 x i32>* %2
%4 = getelementptr inbounds i32, i32* %0, i64 4
%5 = load i32, i32* %4
%6 = getelementptr inbounds i32, i32* %0, i64 5
%7 = load i32, i32* %6
%8 = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %3)
%9 = or i32 %8, %5
%10 = or i32 %9, %7
%11 = icmp eq i32 %10, 0
%12 = zext i1 %11 to i32
ret i32 %12
}
int main(void) {
  char huge_block_1[5000 * 1000];
  char huge_block_2[5000 * 1000];
  char huge_block_3[5000 * 1000];
  char huge_block_4[5000 * 1000];
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x1312c90,%rsp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
add    $0x1312c90,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [5000000 x i8]
%3 = alloca [5000000 x i8]
%4 = alloca [5000000 x i8]
%5 = alloca [5000000 x i8]
store i32 0, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void gic_enable_interrupts(void) {
  (*((uint32_t *)((uintptr_t)(0x08010000 + 0x0))) = (1));
}


x86 assembly (clang, -O0):
<gic_enable_interrupts>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8010000,%eax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gic_enable_interrupts>:
movl   $0x1,0x8010000
ret

LLVM IR (-O0):
define void @gic_enable_interrupts() {
store i32 1, i32* inttoptr (i64 134283264 to i32*)
ret void
}

LLVM IR (-O2):
define void @gic_enable_interrupts() {
store i32 1, i32* inttoptr (i64 134283264 to i32*)
ret void
}
/* Type definitions */
struct pnmwriter {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct pnmwriter *const);
void pnmwriter_destroy(struct pnmwriter *const pw) { free(pw); }


x86 assembly (clang, -O0):
<pnmwriter_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pnmwriter_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.pnmwriter = type { i32 }
define void @pnmwriter_destroy(%struct.pnmwriter* %0) {
%2 = alloca %struct.pnmwriter*
store %struct.pnmwriter* %0, %struct.pnmwriter** %2
%3 = load %struct.pnmwriter*, %struct.pnmwriter** %2
%4 = call i32 @free(%struct.pnmwriter* %3)
ret void
}

LLVM IR (-O2):
%struct.pnmwriter = type { i32 }
define void @pnmwriter_destroy(%struct.pnmwriter* nocapture %0) {
%2 = tail call i32 @free(%struct.pnmwriter* %0)
ret void
}
/* Variables and functions */
double dfluxfun(double);
double dG(double s, void *data) {
  double *D = (double *)data;
  return 1.0 + D[0] * dfluxfun(s);
}


x86 assembly (clang, -O0):
<dG>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <dfluxfun@plt>
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  0xeac(%rip),%xmm1
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dG>:
push   %rax
movsd  (%rdi),%xmm1
movsd  %xmm1,(%rsp)
call   1030 <dfluxfun@plt>
mulsd  (%rsp),%xmm0
addsd  0xed4(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @dG(double %0, i8* %1) {
%3 = alloca double
%4 = alloca i8*
%5 = alloca double*
store double %0, double* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to double*
store double* %7, double** %5
%8 = load double*, double** %5
%9 = getelementptr inbounds double, double* %8, i64 0
%10 = load double, double* %9
%11 = load double, double* %3
%12 = call double @dfluxfun(double %11)
%13 = call double @llvm.fmuladd.f64(double %10, double %12, double 1.000000e+00)
ret double %13
}

LLVM IR (-O2):
define double @dG(double %0, i8* nocapture %1) {
%3 = bitcast i8* %1 to double*
%4 = load double, double* %3
%5 = tail call double @dfluxfun(double %0)
%6 = tail call double @llvm.fmuladd.f64(double %4, double %5, double 1.000000e+00)
ret double %6
}
char lower(char c) {
  if (c >= 'A' && c <= 'Z') {
    return c + ('a' - 'A');
  } else {
    return c;
  }
}


x86 assembly (clang, -O0):
<lower>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
cmp    $0x41,%eax
jl     1133 <lower+0x33>
movsbl -0x2(%rbp),%eax
cmp    $0x5a,%eax
jg     1133 <lower+0x33>
movsbl -0x2(%rbp),%eax
add    $0x20,%eax
mov    %al,-0x1(%rbp)
jmp    1139 <lower+0x39>
mov    -0x2(%rbp),%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lower>:
lea    -0x41(%rdi),%eax
lea    0x20(%rdi),%ecx
cmp    $0x1a,%al
movzbl %cl,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @lower(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 65
br i1 %6, label %7, label %16
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 90
br i1 %10, label %11, label %16
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = add nsw i32 %13, 32
%15 = trunc i32 %14 to i8
store i8 %15, i8* %2
br label %18
16: ; preds = %7, %1
%17 = load i8, i8* %3
store i8 %17, i8* %2
br label %18
18: ; preds = %16, %11
%19 = load i8, i8* %2
ret i8 %19
}

LLVM IR (-O2):
define signext i8 @lower(i8 signext %0) {
%2 = add i8 %0, -65
%3 = icmp ult i8 %2, 26
%4 = add i8 %0, 32
%5 = select i1 %3, i8 %4, i8 %0
ret i8 %5
}
void handler() { return; }


x86 assembly (clang, -O0):
<handler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handler>:
ret

LLVM IR (-O0):
define void @handler() {
ret void
}

LLVM IR (-O2):
define void @handler() {
ret void
}
/* Variables and functions */
int __libc_current_sigrtmin_private();
int __libc_current_sigrtmin(void) { return __libc_current_sigrtmin_private(); }


x86 assembly (clang, -O0):
<__libc_current_sigrtmin>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__libc_current_sigrtmin_private@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__libc_current_sigrtmin>:
xor    %eax,%eax
jmp    1030 <__libc_current_sigrtmin_private@plt>

LLVM IR (-O0):
define i32 @__libc_current_sigrtmin() {
%1 = call i32 (...) @__libc_current_sigrtmin_private()
ret i32 %1
}

LLVM IR (-O2):
define i32 @__libc_current_sigrtmin() {
%1 = tail call i32 (...) @__libc_current_sigrtmin_private()
ret i32 %1
}
double _kb(double n) { return (n / 1024.); }


x86 assembly (clang, -O0):
<_kb>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_kb>:
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @_kb(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 1.024000e+03
ret double %4
}

LLVM IR (-O2):
define double @_kb(double %0) {
%2 = fmul double %0, 0x3F50000000000000
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ baz();
__attribute__((assume("bar:def1,bar:def2"))) void bar(void) { baz(); }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <baz@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
xor    %eax,%eax
jmp    1030 <baz@plt>

LLVM IR (-O0):
define void @bar() {
%1 = call i32 (...) @baz()
ret void
}

LLVM IR (-O2):
define void @bar() {
%1 = tail call i32 (...) @baz()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ kprintHexWord(unsigned short);
void kprintHexDword(unsigned int dword) {
  kprintHexWord((unsigned short)((dword & 0xFFFF0000) >> 16));
  kprintHexWord((unsigned short)(dword & 0xFFFF));
}


x86 assembly (clang, -O0):
<kprintHexDword>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffff0000,%eax
shr    $0x10,%eax
movzwl %ax,%edi
call   1030 <kprintHexWord@plt>
mov    -0x4(%rbp),%eax
and    $0xffff,%eax
movzwl %ax,%edi
call   1030 <kprintHexWord@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kprintHexDword>:
push   %rbx
mov    %edi,%ebx
shr    $0x10,%edi
call   1030 <kprintHexWord@plt>
movzwl %bx,%edi
pop    %rbx
jmp    1030 <kprintHexWord@plt>

LLVM IR (-O0):
define void @kprintHexDword(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -65536
%5 = lshr i32 %4, 16
%6 = trunc i32 %5 to i16
%7 = call i32 @kprintHexWord(i16 zeroext %6)
%8 = load i32, i32* %2
%9 = and i32 %8, 65535
%10 = trunc i32 %9 to i16
%11 = call i32 @kprintHexWord(i16 zeroext %10)
ret void
}

LLVM IR (-O2):
define void @kprintHexDword(i32 %0) {
%2 = lshr i32 %0, 16
%3 = trunc i32 %2 to i16
%4 = tail call i32 @kprintHexWord(i16 zeroext %3)
%5 = trunc i32 %0 to i16
%6 = tail call i32 @kprintHexWord(i16 zeroext %5)
ret void
}
int HelpItem118(void) { return 0; }


x86 assembly (clang, -O0):
<HelpItem118>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelpItem118>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HelpItem118() {
ret i32 0
}

LLVM IR (-O2):
define i32 @HelpItem118() {
ret i32 0
}
/* Variables and functions */
double atof(char *);
int numcmp(char *string_source, char *string_target) {
  double value_source, value_target;
  value_source = atof(string_source);
  value_target = atof(string_target);
  if (value_source < value_target)
    return -1;
  else if (value_source > value_target)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<numcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <atof@plt>
movsd  %xmm0,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <atof@plt>
movsd  %xmm0,-0x28(%rbp)
movsd  -0x20(%rbp),%xmm1
movsd  -0x28(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    115c <numcmp+0x4c>
movl   $0xffffffff,-0x4(%rbp)
jmp    117f <numcmp+0x6f>
movsd  -0x20(%rbp),%xmm0
ucomisd -0x28(%rbp),%xmm0
jbe    1178 <numcmp+0x68>
movl   $0x1,-0x4(%rbp)
jmp    117f <numcmp+0x6f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<numcmp>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
call   1030 <atof@plt>
movsd  %xmm0,0x8(%rsp)
mov    %rbx,%rdi
call   1030 <atof@plt>
xor    %ecx,%ecx
movsd  0x8(%rsp),%xmm1
ucomisd %xmm0,%xmm1
seta   %cl
ucomisd %xmm1,%xmm0
mov    $0xffffffff,%eax
cmovbe %ecx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @numcmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca double
%7 = alloca double
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = call double @atof(i8* %8)
store double %9, double* %6
%10 = load i8*, i8** %5
%11 = call double @atof(i8* %10)
store double %11, double* %7
%12 = load double, double* %6
%13 = load double, double* %7
%14 = fcmp olt double %12, %13
br i1 %14, label %15, label %16
15: ; preds = %2
store i32 -1, i32* %3
br label %22
16: ; preds = %2
%17 = load double, double* %6
%18 = load double, double* %7
%19 = fcmp ogt double %17, %18
br i1 %19, label %20, label %21
20: ; preds = %16
store i32 1, i32* %3
br label %22
21: ; preds = %16
store i32 0, i32* %3
br label %22
22: ; preds = %21, %20, %15
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @numcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call double @atof(i8* %0)
%4 = tail call double @atof(i8* %1)
%5 = fcmp olt double %3, %4
%6 = fcmp ogt double %3, %4
%7 = zext i1 %6 to i32
%8 = select i1 %5, i32 -1, i32 %7
ret i32 %8
}
int test_imm_A5int8_reg(signed char val) {
  return ((val) & (-0xA5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A5int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff5b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A5int8_reg>:
test   $0xffffff5b,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A5int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -165
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A5int8_reg(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = and i32 %2, -165
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
OP(fd, e0) {
  illegal_1();
  op_e0();
}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <illegal_1@plt>
mov    $0x0,%al
call   1040 <op_e0@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
push   %rax
xor    %eax,%eax
call   1030 <illegal_1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <op_e0@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @illegal_1()
%7 = call i32 (...) @op_e0()
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @illegal_1()
%4 = tail call i32 (...) @op_e0()
ret i32 undef
}