xunge/DecIR huggingface dataset:
__attribute__((no, noclone)) signed __int128 t106_5mul(unsigned __int128 x) {
  signed __int128 r;
  if (__builtin_mul_overflow(x, (unsigned __int128)(0), &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t106_5mul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
xor    %eax,%eax
movq   $0x0,-0x38(%rbp)
movq   $0x0,-0x40(%rbp)
test   $0x1,%al
jne    114f <t106_5mul+0x3f>
jmp    1156 <t106_5mul+0x46>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t106_5mul>:
xor    %eax,%eax
xor    %edx,%edx
ret

LLVM IR (-O0):
define { i64, i64 } @t106_5mul(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = bitcast i128* %4 to { i64, i64 }*
%8 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 0
store i64 %0, i64* %8
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 1
store i64 %1, i64* %9
%10 = load i128, i128* %4
store i128 %10, i128* %5
%11 = load i128, i128* %5
%12 = call { i128, i1 } @llvm.umul.with.overflow.i128(i128 %11, i128 0)
%13 = extractvalue { i128, i1 } %12, 1
%14 = extractvalue { i128, i1 } %12, 0
%15 = icmp ugt i128 %14, 170141183460469231731687303715884105727
%16 = or i1 %13, %15
store i128 %14, i128* %6
br i1 %16, label %17, label %19
17: ; preds = %2
%18 = call i32 (...) @bar()
br label %19
19: ; preds = %17, %2
%20 = load i128, i128* %6
store i128 %20, i128* %3
%21 = bitcast i128* %3 to { i64, i64 }*
%22 = load { i64, i64 }, { i64, i64 }* %21
ret { i64, i64 } %22
}

LLVM IR (-O2):
define { i64, i64 } @t106_5mul(i64 %0, i64 %1) {
ret { i64, i64 } zeroinitializer
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ test_bwt_compare();
int /*<<< orphan*/ test_bwt_generate_rotations();
int /*<<< orphan*/ test_bwt_get_last_column();
int /*<<< orphan*/ test_bwt_sort_strings();
int /*<<< orphan*/ test_bwt_transform();
int main(void) {
  printf("Bwt module running tests\n");
  test_bwt_generate_rotations();
  test_bwt_compare();
  test_bwt_sort_strings();
  test_bwt_get_last_column();
  test_bwt_transform();
  printf("Bwt module all tests passed\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xe8a(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1060 <test_bwt_generate_rotations@plt>
mov    $0x0,%al
call   1080 <test_bwt_compare@plt>
mov    $0x0,%al
call   1030 <test_bwt_sort_strings@plt>
mov    $0x0,%al
call   1050 <test_bwt_get_last_column@plt>
mov    $0x0,%al
call   1070 <test_bwt_transform@plt>
lea    0xe75(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xe98(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1060 <test_bwt_generate_rotations@plt>
xor    %eax,%eax
call   1080 <test_bwt_compare@plt>
xor    %eax,%eax
call   1040 <test_bwt_sort_strings@plt>
xor    %eax,%eax
call   1050 <test_bwt_get_last_column@plt>
xor    %eax,%eax
call   1070 <test_bwt_transform@plt>
lea    0xe82(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"Bwt module running tests\0A\00"
@.str.1 = [29 x i8] c"Bwt module all tests passed\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @test_bwt_generate_rotations()
%4 = call i32 (...) @test_bwt_compare()
%5 = call i32 (...) @test_bwt_sort_strings()
%6 = call i32 (...) @test_bwt_get_last_column()
%7 = call i32 (...) @test_bwt_transform()
%8 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [25 x i8] c"Bwt module running tests\00"
@str.2 = [28 x i8] c"Bwt module all tests passed\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @test_bwt_generate_rotations()
%3 = tail call i32 (...) @test_bwt_compare()
%4 = tail call i32 (...) @test_bwt_sort_strings()
%5 = tail call i32 (...) @test_bwt_get_last_column()
%6 = tail call i32 (...) @test_bwt_transform()
%7 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ external(int *);
void test(int N) {
  int i;
  for (i = 0; i < N; ++i) {
    int VLA[i];
    external(VLA);
  }
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    116b <test+0x5b>
mov    -0x8(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x10(%rbp)
lea    0xf(,%rax,4),%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rdi
sub    %rcx,%rdi
mov    %rdi,%rsp
mov    %rax,-0x18(%rbp)
call   1030 <external@plt>
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <test+0x12>
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
push   %rbp
mov    %rsp,%rbp
push   %r15
push   %r14
push   %rbx
push   %rax
test   %edi,%edi
jle    1159 <test+0x49>
mov    %edi,%r14d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %rsp,%r15
mov    %rsp,%rdi
lea    0xf(,%rbx,4),%rax
and    $0xfffffffffffffff0,%rax
sub    %rax,%rdi
mov    %rdi,%rsp
call   1030 <external@plt>
mov    %r15,%rsp
add    $0x1,%rbx
cmp    %rbx,%r14
jne    1130 <test+0x20>
lea    -0x18(%rbp),%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @test(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i64
store i32 %0, i32* %2
store i32 0, i32* %3
br label %6
6: ; preds = %17, %1
%7 = load i32, i32* %3
%8 = load i32, i32* %2
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32, i32* %3
%12 = zext i32 %11 to i64
%13 = call i8* @llvm.stacksave()
store i8* %13, i8** %4
%14 = alloca i32, i64 %12
store i64 %12, i64* %5
%15 = call i32 @external(i32* %14)
%16 = load i8*, i8** %4
br label %17
17: ; preds = %10
%18 = load i32, i32* %3
%19 = add nsw i32 %18, 1
store i32 %19, i32* %3
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @test(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %12
3: ; preds = %1
%4 = zext i32 %0 to i64
br label %5
5: ; preds = %3, %5
%6 = phi i64 [ 0, %3 ], [ %10, %5 ]
%7 = call i8* @llvm.stacksave()
%8 = alloca i32, i64 %6
%9 = call i32 @external(i32* %8)
%10 = add nuw nsw i64 %6, 1
%11 = icmp eq i64 %10, %4
br i1 %11, label %12, label %5
12: ; preds = %5, %1
ret void
}
void do_fldenv(void *p) { asm("movl 8(%esp), %eax ; fldenv (%eax)"); }


x86 assembly (clang, -O0):
<do_fldenv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x8(%esp),%eax
fldenv (%eax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_fldenv>:
mov    0x8(%esp),%eax
fldenv (%eax)
ret

LLVM IR (-O0):
define void @do_fldenv(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @do_fldenv(i8* nocapture readnone %0) {
tail call void asm sideeffect "movl 8(%esp), %eax ; fldenv (%eax)", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int f(int);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int i = 1;
  i = f(i);
  printf("%d", i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <f@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeb5(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <f@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @f(i32 %3)
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @f(i32 1)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
float *malloc(int);
int main() {
  volatile float *arr = malloc(10 * sizeof(float));
  arr[5] = 1.3;
  arr[4] = 4.8;
  return arr[5] + arr[4];
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x28,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movss  0xecb(%rip),%xmm0
movss  %xmm0,0x14(%rax)
mov    -0x10(%rbp),%rax
movss  0xeb6(%rip),%xmm0
movss  %xmm0,0x10(%rax)
mov    -0x10(%rbp),%rax
movss  0x14(%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  0x10(%rax),%xmm1
addss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x28,%edi
call   1030 <malloc@plt>
movl   $0x3fa66666,0x14(%rax)
movl   $0x4099999a,0x10(%rax)
movss  0x14(%rax),%xmm0
addss  0x10(%rax),%xmm0
cvttss2si %xmm0,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca float*
store i32 0, i32* %1
%3 = call float* @malloc(i32 40)
store float* %3, float** %2
%4 = load float*, float** %2
%5 = getelementptr inbounds float, float* %4, i64 5
store volatile float 0x3FF4CCCCC0000000, float* %5
%6 = load float*, float** %2
%7 = getelementptr inbounds float, float* %6, i64 4
store volatile float 0x4013333340000000, float* %7
%8 = load float*, float** %2
%9 = getelementptr inbounds float, float* %8, i64 5
%10 = load volatile float, float* %9
%11 = load float*, float** %2
%12 = getelementptr inbounds float, float* %11, i64 4
%13 = load volatile float, float* %12
%14 = fadd float %10, %13
%15 = fptosi float %14 to i32
ret i32 %15
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call float* @malloc(i32 40)
%2 = getelementptr inbounds float, float* %1, i64 5
store volatile float 0x3FF4CCCCC0000000, float* %2
%3 = getelementptr inbounds float, float* %1, i64 4
store volatile float 0x4013333340000000, float* %3
%4 = load volatile float, float* %2
%5 = load volatile float, float* %3
%6 = fadd float %4, %5
%7 = fptosi float %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ assert_fail(char const *, int, char *, void *);
void assert_ptr_not_equal_(const char *file, int line, void *ex, void *ac) {
  if (ex == ac) {
    assert_fail(file, line, "Expected not <%p> but was", ex);
  }
}


x86 assembly (clang, -O0):
<assert_ptr_not_equal_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x20(%rbp),%rax
jne    114c <assert_ptr_not_equal_+0x3c>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rcx
lea    0xeb9(%rip),%rdx
call   1030 <assert_fail@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assert_ptr_not_equal_>:
cmp    %rcx,%rdx
je     1116 <assert_ptr_not_equal_+0x6>
ret
mov    %rdx,%rax
lea    0xee0(%rip),%rdx
mov    %rax,%rcx
jmp    1030 <assert_fail@plt>

LLVM IR (-O0):
@.str = [26 x i8] c"Expected not <%p> but was\00"
define void @assert_ptr_not_equal_(i8* %0, i32 %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %7
%10 = load i8*, i8** %8
%11 = icmp eq i8* %9, %10
br i1 %11, label %12, label %17
12: ; preds = %4
%13 = load i8*, i8** %5
%14 = load i32, i32* %6
%15 = load i8*, i8** %7
%16 = call i32 @assert_fail(i8* %13, i32 %14, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i8* %15)
br label %17
17: ; preds = %12, %4
ret void
}

LLVM IR (-O2):
@.str = [26 x i8] c"Expected not <%p> but was\00"
define void @assert_ptr_not_equal_(i8* %0, i32 %1, i8* %2, i8* readnone %3) {
%5 = icmp eq i8* %2, %3
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 @assert_fail(i8* %0, i32 %1, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i8* %2)
br label %8
8: ; preds = %6, %4
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void _be_dump_indent(ssize_t indent) {
  while (indent-- > 0)
    printf("    ");
}


x86 assembly (clang, -O0):
<_be_dump_indent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
jle    1140 <_be_dump_indent+0x30>
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
jmp    111b <_be_dump_indent+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_be_dump_indent>:
push   %r14
push   %rbx
push   %rax
test   %edi,%edi
jle    1140 <_be_dump_indent+0x30>
mov    %edi,%ebx
add    $0x1,%ebx
lea    0xedc(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0xffffffff,%ebx
cmp    $0x1,%ebx
ja     1130 <_be_dump_indent+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [5 x i8] c" \00"
define void @_be_dump_indent(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load i32, i32* %2
%5 = add nsw i32 %4, -1
store i32 %5, i32* %2
%6 = icmp sgt i32 %4, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %3
9: ; preds = %3
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c" \00"
define void @_be_dump_indent(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i32 [ %5, %3 ], [ %0, %1 ]
%5 = add nsw i32 %4, -1
%6 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%7 = icmp ugt i32 %4, 1
br i1 %7, label %3, label %8
8: ; preds = %3, %1
ret void
}
int test_imm_6Buint16_reg(unsigned short val) {
  return ((val) & (-0x6B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Buint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff95,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Buint16_reg>:
test   $0xff95,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Buint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -107
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_6Buint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -107
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
scalar_t__ uart_tx_is_full(int /*<<< orphan*/ *);
void uart_send(uint32_t *uart, uint8_t data) {
  while (uart_tx_is_full(uart))
    ;
  uart[0] = data;
}


x86 assembly (clang, -O0):
<uart_send>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <uart_tx_is_full@plt>
cmp    $0x0,%rax
je     1137 <uart_send+0x27>
jmp    111f <uart_send+0xf>
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_send>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <uart_tx_is_full@plt>
test   %rax,%rax
jne    1120 <uart_send+0x10>
mov    %ebp,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @uart_send(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %9, %2
%6 = load i32*, i32** %3
%7 = call i64 @uart_tx_is_full(i32* %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %5
br label %5
10: ; preds = %5
%11 = load i32, i32* %4
%12 = load i32*, i32** %3
%13 = getelementptr inbounds i32, i32* %12, i64 0
store i32 %11, i32* %13
ret void
}

LLVM IR (-O2):
define void @uart_send(i32* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = tail call i64 @uart_tx_is_full(i32* %0)
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %3
6: ; preds = %3
store i32 %1, i32* %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int16_t;

/* Variables and functions */
int /*<<< orphan*/ atomic_add_int16_t(int /*<<< orphan*/ *, int);
int16_t atomic_inc_int16_t(int16_t *var) { return atomic_add_int16_t(var, 1); }


x86 assembly (clang, -O0):
<atomic_inc_int16_t>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <atomic_add_int16_t@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_inc_int16_t>:
mov    $0x1,%esi
jmp    1030 <atomic_add_int16_t@plt>

LLVM IR (-O0):
define i32 @atomic_inc_int16_t(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @atomic_add_int16_t(i32* %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @atomic_inc_int16_t(i32* %0) {
%2 = tail call i32 @atomic_add_int16_t(i32* %0, i32 1)
ret i32 %2
}
/* Variables and functions */
int errno;
int /*<<< orphan*/ fputs(char const *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ warn(char const *);
void warn2(const char *msg1, const char *msg2) {
  int error = errno;
  fputs(msg1, stderr);
  fputs(": ", stderr);
  errno = error;
  warn(msg2);
}


x86 assembly (clang, -O0):
<warn2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ea1(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e99(%rip),%rax
mov    (%rax),%esi
call   1040 <fputs@plt>
mov    0x2e8b(%rip),%rax
mov    (%rax),%esi
lea    0xea2(%rip),%rdi
call   1040 <fputs@plt>
mov    -0x14(%rbp),%ecx
mov    0x2e6b(%rip),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rdi
call   1030 <warn@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<warn2>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r15
mov    0x2ea7(%rip),%r14
mov    (%r14),%ebp
mov    0x2ea5(%rip),%rbx
mov    (%rbx),%esi
call   1040 <fputs@plt>
mov    (%rbx),%esi
lea    0xeb5(%rip),%rdi
call   1040 <fputs@plt>
mov    %ebp,(%r14)
mov    %r15,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <warn@plt>

LLVM IR (-O0):
@errno = global i32 0
@stderr = global i32 0
@.str = [3 x i8] c": \00"
define void @warn2(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i32, i32* @errno
store i32 %6, i32* %5
%7 = load i8*, i8** %3
%8 = load i32, i32* @stderr
%9 = call i32 @fputs(i8* %7, i32 %8)
%10 = load i32, i32* @stderr
%11 = call i32 @fputs(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %10)
%12 = load i32, i32* %5
store i32 %12, i32* @errno
%13 = load i8*, i8** %4
%14 = call i32 @warn(i8* %13)
ret void
}

LLVM IR (-O2):
@errno = global i32 0
@stderr = global i32 0
@.str = [3 x i8] c": \00"
define void @warn2(i8* %0, i8* %1) {
%3 = load i32, i32* @errno
%4 = load i32, i32* @stderr
%5 = tail call i32 @fputs(i8* %0, i32 %4)
%6 = load i32, i32* @stderr
%7 = tail call i32 @fputs(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
store i32 %3, i32* @errno
%8 = tail call i32 @warn(i8* %1)
ret void
}
/* Variables and functions */
char EOF;
char getchar();
int /*<<< orphan*/ putchar(char);
int main(int argc, char const *argv[]) {
  char c;
  while ((c = getchar()) != EOF)
    putchar(c);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %al,-0x11(%rbp)
movsbl %al,%eax
mov    0x2e9e(%rip),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
je     1163 <main+0x43>
movsbl -0x11(%rbp),%edi
call   1030 <putchar@plt>
jmp    1136 <main+0x16>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <getchar@plt>
mov    0x2eb9(%rip),%rbx
cmp    (%rbx),%al
je     1153 <main+0x33>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movsbl %al,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
cmp    (%rbx),%al
jne    1140 <main+0x20>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@EOF = global i8 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
br label %7
7: ; preds = %13, %2
%8 = call signext i8 (...) @getchar()
store i8 %8, i8* %6
%9 = sext i8 %8 to i32
%10 = load i8, i8* @EOF
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %9, %11
br i1 %12, label %13, label %16
13: ; preds = %7
%14 = load i8, i8* %6
%15 = call i32 @putchar(i8 signext %14)
br label %7
16: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
@EOF = global i8 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call signext i8 (...) @getchar()
%4 = load i8, i8* @EOF
%5 = icmp eq i8 %3, %4
br i1 %5, label %12, label %6
6: ; preds = %2, %6
%7 = phi i8 [ %9, %6 ], [ %3, %2 ]
%8 = tail call i32 @putchar(i8 signext %7)
%9 = tail call signext i8 (...) @getchar()
%10 = load i8, i8* @EOF
%11 = icmp eq i8 %9, %10
br i1 %11, label %12, label %6
12: ; preds = %6, %2
ret i32 0
}
void kernel_evlog_init(void) {}


x86 assembly (clang, -O0):
<kernel_evlog_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kernel_evlog_init>:
ret

LLVM IR (-O0):
define void @kernel_evlog_init() {
ret void
}

LLVM IR (-O2):
define void @kernel_evlog_init() {
ret void
}
/* Variables and functions */
unsigned long __copy_to_user_inatomic(void *, void const *, unsigned long);
int /*<<< orphan*/ might_fault();
__attribute__((always_)) __attribute__((always_)) unsigned long
__copy_to_user(void *to, const void *from, unsigned long n) {
  might_fault();
  return __copy_to_user_inatomic(to, from, n);
}


x86 assembly (clang, -O0):
<__copy_to_user>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x0,%al
call   1040 <might_fault@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <__copy_to_user_inatomic@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__copy_to_user>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <might_fault@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <__copy_to_user_inatomic@plt>

LLVM IR (-O0):
define i64 @__copy_to_user(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = call i32 (...) @might_fault()
%8 = load i8*, i8** %4
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = call i64 @__copy_to_user_inatomic(i8* %8, i8* %9, i64 %10)
ret i64 %11
}

LLVM IR (-O2):
define i64 @__copy_to_user(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 (...) @might_fault()
%5 = tail call i64 @__copy_to_user_inatomic(i8* %0, i8* %1, i64 %2)
ret i64 %5
}
int timeslot(int timetaken) {
  int i;
  if (timetaken < 20)
    i = 0;
  else {
    i = timetaken / 100 + 1;
    i = (i > 20 - 1) ? 20 - 1 : i;
  }
  return i;
}


x86 assembly (clang, -O0):
<timeslot>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x14,-0x4(%rbp)
jge    111d <timeslot+0x1d>
movl   $0x0,-0x8(%rbp)
jmp    1151 <timeslot+0x51>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x13,-0x8(%rbp)
jle    1145 <timeslot+0x45>
mov    $0x13,%eax
mov    %eax,-0xc(%rbp)
jmp    114b <timeslot+0x4b>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<timeslot>:
xor    %eax,%eax
cmp    $0x14,%edi
jl     1122 <timeslot+0x22>
mov    %edi,%eax
imul   $0x51eb851f,%rax,%rcx
shr    $0x25,%rcx
cmp    $0x12,%ecx
mov    $0x12,%eax
cmovb  %ecx,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @timeslot(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 20
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %3
br label %18
7: ; preds = %1
%8 = load i32, i32* %2
%9 = sdiv i32 %8, 100
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = icmp sgt i32 %11, 19
br i1 %12, label %13, label %14
13: ; preds = %7
br label %16
14: ; preds = %7
%15 = load i32, i32* %3
br label %16
16: ; preds = %14, %13
%17 = phi i32 [ 19, %13 ], [ %15, %14 ]
store i32 %17, i32* %3
br label %18
18: ; preds = %16, %6
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @timeslot(i32 %0) {
%2 = icmp slt i32 %0, 20
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = udiv i32 %0, 100
%5 = icmp ult i32 %4, 18
%6 = select i1 %5, i32 %4, i32 18
%7 = add nuw nsw i32 %6, 1
br label %8
8: ; preds = %1, %3
%9 = phi i32 [ %7, %3 ], [ 0, %1 ]
ret i32 %9
}
/* Variables and functions */
int japi_connect(char *);
int j_connect(char *arg0) { return (japi_connect(arg0)); }


x86 assembly (clang, -O0):
<j_connect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <japi_connect@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<j_connect>:
jmp    1030 <japi_connect@plt>

LLVM IR (-O0):
define i32 @j_connect(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @japi_connect(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @j_connect(i8* %0) {
%2 = tail call i32 @japi_connect(i8* %0)
ret i32 %2
}
char *stpcpy(char *p_output, char *p_input) {
  char *first = p_output;
  while (*p_input)
    *p_output++ = *p_input++;
  *p_output = 0;
  return p_output;
}


x86 assembly (clang, -O0):
<stpcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1148 <stpcpy+0x48>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
jmp    1114 <stpcpy+0x14>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stpcpy>:
mov    %rdi,%rax
mov    (%rsi),%cl
test   %cl,%cl
je     1121 <stpcpy+0x21>
add    $0x1,%rsi
nopl   (%rax)
mov    %cl,(%rax)
add    $0x1,%rax
movzbl (%rsi),%ecx
add    $0x1,%rsi
test   %cl,%cl
jne    1110 <stpcpy+0x10>
movb   $0x0,(%rax)
ret

LLVM IR (-O0):
define i8* @stpcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %11, %2
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %4
%14 = load i8, i8* %12
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
store i8 %14, i8* %15
br label %7
17: ; preds = %7
%18 = load i8*, i8** %3
store i8 0, i8* %18
%19 = load i8*, i8** %3
ret i8* %19
}

LLVM IR (-O2):
define i8* @stpcpy(i8* writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %11, %5 ], [ %3, %2 ]
%7 = phi i8* [ %10, %5 ], [ %0, %2 ]
%8 = phi i8* [ %9, %5 ], [ %1, %2 ]
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = getelementptr inbounds i8, i8* %7, i64 1
store i8 %6, i8* %7
%11 = load i8, i8* %9
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
%14 = phi i8* [ %0, %2 ], [ %10, %5 ]
store i8 0, i8* %14
ret i8* %14
}
/* Variables and functions */
scalar_t__ ceil(double);
long ceil_long(double x) { return (long)ceil(x); }


x86 assembly (clang, -O0):
<ceil_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <ceil@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceil_long>:
jmp    1030 <ceil@plt>

LLVM IR (-O0):
define i64 @ceil_long(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i64 @ceil(double %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @ceil_long(double %0) {
%2 = tail call i64 @ceil(double %0)
ret i64 %2
}
void foo812() {}


x86 assembly (clang, -O0):
<foo812>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo812>:
ret

LLVM IR (-O0):
define void @foo812() {
ret void
}

LLVM IR (-O2):
define void @foo812() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ a();
int main(void) {
  a();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <a@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <a@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @a()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @a()
ret i32 0
}
/* Type definitions */
typedef size_t uint8_t;

/* Variables and functions */
unsigned get_bitset(void *bitset, size_t N) {
  size_t byte_idx = N / 8;
  size_t bit_idx = N % 8;
  uint8_t *byte = (uint8_t *)bitset + byte_idx;
  return (*byte >> bit_idx) & 1;
}


x86 assembly (clang, -O0):
<get_bitset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x3,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
and    $0x7,%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    (%rax),%rax
mov    -0x20(%rbp),%rcx
shr    %cl,%rax
and    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_bitset>:
mov    %rsi,%rcx
mov    %rsi,%rax
and    $0xfffffffffffffff8,%rax
mov    (%rdi,%rax,1),%rax
and    $0x7,%cl
shr    %cl,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @get_bitset(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64*
store i8* %0, i8** %3
store i64 %1, i64* %4
%8 = load i64, i64* %4
%9 = udiv i64 %8, 8
store i64 %9, i64* %5
%10 = load i64, i64* %4
%11 = urem i64 %10, 8
store i64 %11, i64* %6
%12 = load i8*, i8** %3
%13 = bitcast i8* %12 to i64*
%14 = load i64, i64* %5
%15 = getelementptr inbounds i64, i64* %13, i64 %14
store i64* %15, i64** %7
%16 = load i64*, i64** %7
%17 = load i64, i64* %16
%18 = load i64, i64* %6
%19 = lshr i64 %17, %18
%20 = and i64 %19, 1
%21 = trunc i64 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
define i32 @get_bitset(i8* nocapture %0, i64 %1) {
%3 = lshr i64 %1, 3
%4 = and i64 %1, 7
%5 = bitcast i8* %0 to i64*
%6 = getelementptr inbounds i64, i64* %5, i64 %3
%7 = load i64, i64* %6
%8 = lshr i64 %7, %4
%9 = trunc i64 %8 to i32
%10 = and i32 %9, 1
ret i32 %10
}
void makesilence() {}


x86 assembly (clang, -O0):
<makesilence>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<makesilence>:
ret

LLVM IR (-O0):
define void @makesilence() {
ret void
}

LLVM IR (-O2):
define void @makesilence() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIGINT;
int /*<<< orphan*/ SIGQUIT;
int /*<<< orphan*/ SIG_IGN;
int /*<<< orphan*/ isatty(int /*<<< orphan*/);
int /*<<< orphan*/ signal(int /*<<< orphan*/, int /*<<< orphan*/);
void sig_ign(void) {
  if (!isatty(0))
    return;
  signal(SIGINT, SIG_IGN);
  signal(SIGQUIT, SIG_IGN);
}


x86 assembly (clang, -O0):
<sig_ign>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <isatty@plt>
cmp    $0x0,%eax
jne    1139 <sig_ign+0x19>
jmp    1167 <sig_ign+0x47>
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
mov    0x2e8f(%rip),%rax
mov    (%rax),%esi
call   1040 <signal@plt>
mov    0x2e89(%rip),%rax
mov    (%rax),%edi
mov    0x2e78(%rip),%rax
mov    (%rax),%esi
call   1040 <signal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_ign>:
push   %rbx
xor    %edi,%edi
call   1030 <isatty@plt>
test   %eax,%eax
je     1154 <sig_ign+0x34>
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
mov    0x2e9c(%rip),%rbx
mov    (%rbx),%esi
call   1040 <signal@plt>
mov    0x2e96(%rip),%rax
mov    (%rax),%edi
mov    (%rbx),%esi
pop    %rbx
jmp    1040 <signal@plt>
pop    %rbx
ret

LLVM IR (-O0):
@SIGINT = global i32 0
@SIG_IGN = global i32 0
@SIGQUIT = global i32 0
define void @sig_ign() {
%1 = call i32 @isatty(i32 0)
%2 = icmp ne i32 %1, 0
br i1 %2, label %4, label %3
3: ; preds = %0
br label %11
4: ; preds = %0
%5 = load i32, i32* @SIGINT
%6 = load i32, i32* @SIG_IGN
%7 = call i32 @signal(i32 %5, i32 %6)
%8 = load i32, i32* @SIGQUIT
%9 = load i32, i32* @SIG_IGN
%10 = call i32 @signal(i32 %8, i32 %9)
br label %11
11: ; preds = %4, %3
ret void
}

LLVM IR (-O2):
@SIGINT = global i32 0
@SIG_IGN = global i32 0
@SIGQUIT = global i32 0
define void @sig_ign() {
%1 = tail call i32 @isatty(i32 0)
%2 = icmp eq i32 %1, 0
br i1 %2, label %10, label %3
3: ; preds = %0
%4 = load i32, i32* @SIGINT
%5 = load i32, i32* @SIG_IGN
%6 = tail call i32 @signal(i32 %4, i32 %5)
%7 = load i32, i32* @SIGQUIT
%8 = load i32, i32* @SIG_IGN
%9 = tail call i32 @signal(i32 %7, i32 %8)
br label %10
10: ; preds = %0, %3
ret void
}
/* Variables and functions */
int abs(int const);
int dist(const int sq_1, const int sq_2) {
  int file_dif = abs((sq_1 % 8) - (sq_2 % 8));
  int rank_dif = abs((sq_1 / 8) - (sq_2 / 8));
  return (file_dif >= rank_dif) ? file_dif : rank_dif;
}


x86 assembly (clang, -O0):
<dist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %edx,%edi
mov    -0x8(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
sub    %edx,%edi
call   1030 <abs@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
mov    -0x8(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
sub    %eax,%edi
call   1030 <abs@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jl     1179 <dist+0x69>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    117f <dist+0x6f>
mov    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dist>:
lea    0x7(%rsi),%eax
test   %esi,%esi
cmovns %esi,%eax
mov    %eax,%ecx
and    $0xfffffff8,%ecx
sub    %esi,%ecx
lea    0x7(%rdi),%edx
test   %edi,%edi
cmovns %edi,%edx
mov    %edx,%esi
and    $0xfffffff8,%esi
sub    %esi,%edi
add    %edi,%ecx
mov    %ecx,%esi
neg    %esi
cmovs  %ecx,%esi
sar    $0x3,%edx
sar    $0x3,%eax
sub    %eax,%edx
mov    %edx,%eax
neg    %eax
cmovs  %edx,%eax
cmp    %eax,%esi
cmovae %esi,%eax
ret

LLVM IR (-O0):
define i32 @dist(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = srem i32 %7, 8
%9 = load i32, i32* %4
%10 = srem i32 %9, 8
%11 = sub nsw i32 %8, %10
%12 = call i32 @abs(i32 %11)
store i32 %12, i32* %5
%13 = load i32, i32* %3
%14 = sdiv i32 %13, 8
%15 = load i32, i32* %4
%16 = sdiv i32 %15, 8
%17 = sub nsw i32 %14, %16
%18 = call i32 @abs(i32 %17)
store i32 %18, i32* %6
%19 = load i32, i32* %5
%20 = load i32, i32* %6
%21 = icmp sge i32 %19, %20
br i1 %21, label %22, label %24
22: ; preds = %2
%23 = load i32, i32* %5
br label %26
24: ; preds = %2
%25 = load i32, i32* %6
br label %26
26: ; preds = %24, %22
%27 = phi i32 [ %23, %22 ], [ %25, %24 ]
ret i32 %27
}

LLVM IR (-O2):
define i32 @dist(i32 %0, i32 %1) {
%3 = srem i32 %0, 8
%4 = srem i32 %1, 8
%5 = sub nsw i32 %3, %4
%6 = tail call i32 @llvm.abs.i32(i32 %5, i1 true)
%7 = sdiv i32 %0, 8
%8 = sdiv i32 %1, -8
%9 = add nsw i32 %8, %7
%10 = tail call i32 @llvm.abs.i32(i32 %9, i1 true)
%11 = icmp ult i32 %6, %10
%12 = select i1 %11, i32 %10, i32 %6
ret i32 %12
}
/* Variables and functions */
void foo5(intptr_t i1, intptr_t i2, intptr_t i3, intptr_t i4, intptr_t i5) {}


x86 assembly (clang, -O0):
<foo5>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo5>:
ret

LLVM IR (-O0):
define void @foo5(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4) {
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
store i64 %0, i64* %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i64 %3, i64* %9
store i64 %4, i64* %10
ret void
}

LLVM IR (-O2):
define void @foo5(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4) {
ret void
}
double track_percent_error(double error) {
  static double total_error = 0;
  total_error += error;
  return total_error;
}


x86 assembly (clang, -O0):
<track_percent_error>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  0x2f12(%rip),%xmm0
movsd  %xmm0,0x2f0a(%rip)
movsd  0x2f02(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<track_percent_error>:
addsd  0x2f20(%rip),%xmm0
movsd  %xmm0,0x2f18(%rip)
ret

LLVM IR (-O0):
@track_percent_error.total_error = internal global double 0.000000e+00
define double @track_percent_error(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* @track_percent_error.total_error
%5 = fadd double %4, %3
store double %5, double* @track_percent_error.total_error
%6 = load double, double* @track_percent_error.total_error
ret double %6
}

LLVM IR (-O2):
@track_percent_error.total_error = internal unnamed_addr global double 0.000000e+00
define double @track_percent_error(double %0) {
%2 = load double, double* @track_percent_error.total_error
%3 = fadd double %2, %0
store double %3, double* @track_percent_error.total_error
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ ssd1306_write_command(int);
void ssd1306_sleep_enable(void) { ssd1306_write_command(0xAE); }


x86 assembly (clang, -O0):
<ssd1306_sleep_enable>:
push   %rbp
mov    %rsp,%rbp
mov    $0xae,%edi
call   1030 <ssd1306_write_command@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssd1306_sleep_enable>:
mov    $0xae,%edi
jmp    1030 <ssd1306_write_command@plt>

LLVM IR (-O0):
define void @ssd1306_sleep_enable() {
%1 = call i32 @ssd1306_write_command(i32 174)
ret void
}

LLVM IR (-O2):
define void @ssd1306_sleep_enable() {
%1 = tail call i32 @ssd1306_write_command(i32 174)
ret void
}
/* Variables and functions */
long umfpack_zi_scale(double *, double *, double *, double *, void *);
void umf4zscal(double x[], double xz[], double b[], double bz[], void **Numeric,
               long *status) {
  *status = umfpack_zi_scale(x, xz, b, bz, *Numeric);
}


x86 assembly (clang, -O0):
<umf4zscal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%rax
mov    (%rax),%r8
call   1030 <umfpack_zi_scale@plt>
mov    %rax,%rcx
mov    -0x30(%rbp),%rax
mov    %rcx,(%rax)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<umf4zscal>:
push   %rbx
mov    %r9,%rbx
mov    (%r8),%r8
call   1030 <umfpack_zi_scale@plt>
mov    %rax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @umf4zscal(double* %0, double* %1, double* %2, double* %3, i8** %4, i64* %5) {
%7 = alloca double*
%8 = alloca double*
%9 = alloca double*
%10 = alloca double*
%11 = alloca i8**
%12 = alloca i64*
store double* %0, double** %7
store double* %1, double** %8
store double* %2, double** %9
store double* %3, double** %10
store i8** %4, i8*** %11
store i64* %5, i64** %12
%13 = load double*, double** %7
%14 = load double*, double** %8
%15 = load double*, double** %9
%16 = load double*, double** %10
%17 = load i8**, i8*** %11
%18 = load i8*, i8** %17
%19 = call i64 @umfpack_zi_scale(double* %13, double* %14, double* %15, double* %16, i8* %18)
%20 = load i64*, i64** %12
store i64 %19, i64* %20
ret void
}

LLVM IR (-O2):
define void @umf4zscal(double* %0, double* %1, double* %2, double* %3, i8** nocapture %4, i64* nocapture writeonly %5) {
%7 = load i8*, i8** %4
%8 = tail call i64 @umfpack_zi_scale(double* %0, double* %1, double* %2, double* %3, i8* %7)
store i64 %8, i64* %5
ret void
}
union {
  long double a;
  float b;
} f11() {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<f11>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <f11+0x9>
jmp    1109 <f11+0x9>

x86 assembly (clang, -O2):
<f11>:
jmp    1100 <f11>

LLVM IR (-O0):
%union.anon = type { x86_fp80 }
define void @f11(%union.anon* noalias sret(%union.anon) align 16 %0) {
br label %2
2: ; preds = %1, %2
br label %2
}

LLVM IR (-O2):
%union.anon = type { x86_fp80 }
define void @f11(%union.anon* noalias nocapture sret(%union.anon) align 16 %0) {
br label %2
2: ; preds = %1, %2
br label %2
}
int fibonacci(int a) {
  if (a == 0)
    return 0;
  else if (a == 1)
    return 1;
  else
    return fibonacci(a - 1) + fibonacci(a - 2);
}


x86 assembly (clang, -O0):
<fibonacci>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1131 <fibonacci+0x21>
movl   $0x0,-0x4(%rbp)
jmp    116a <fibonacci+0x5a>
cmpl   $0x1,-0x8(%rbp)
jne    1147 <fibonacci+0x37>
movl   $0x1,-0x4(%rbp)
jmp    116a <fibonacci+0x5a>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fibonacci@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fibonacci@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibonacci>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x2,%ebx
jb     1132 <fibonacci+0x22>
nopl   0x0(%rax)
lea    -0x1(%rbx),%edi
call   1030 <fibonacci@plt>
add    %eax,%ebp
add    $0xfffffffe,%ebx
cmp    $0x2,%ebx
jae    1120 <fibonacci+0x10>
add    %ebp,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fibonacci(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %19
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 1, i32* %2
br label %19
11: ; preds = %7
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 1
%14 = call i32 @fibonacci(i32 %13)
%15 = load i32, i32* %3
%16 = sub nsw i32 %15, 2
%17 = call i32 @fibonacci(i32 %16)
%18 = add nsw i32 %14, %17
store i32 %18, i32* %2
br label %19
19: ; preds = %11, %10, %6
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @fibonacci(i32 %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i32 [ 0, %1 ], [ %10, %6 ]
%4 = phi i32 [ %0, %1 ], [ %9, %6 ]
%5 = icmp ult i32 %4, 2
br i1 %5, label %11, label %6
6: ; preds = %2
%7 = add nsw i32 %4, -1
%8 = tail call i32 @fibonacci(i32 %7)
%9 = add nsw i32 %4, -2
%10 = add nsw i32 %8, %3
br label %2
11: ; preds = %2
%12 = add nsw i32 %4, %3
ret i32 %12
}
void linkedlisttest(struct list *l) {}


x86 assembly (clang, -O0):
<linkedlisttest>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<linkedlisttest>:
ret

LLVM IR (-O0):
%struct.list = type opaque
define void @linkedlisttest(%struct.list* %0) {
%2 = alloca %struct.list*
store %struct.list* %0, %struct.list** %2
ret void
}

LLVM IR (-O2):
%struct.list = type opaque
define void @linkedlisttest(%struct.list* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ freopen(char *, char *, int /*<<< orphan*/);
int /*<<< orphan*/ run();
int /*<<< orphan*/ setup();
int /*<<< orphan*/ stdin;
int main(int argc, char *argv[]) {
  if (argc > 1) {
    freopen(argv[1], "r", stdin);
  }
  setup();
  run();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    116d <main+0x3d>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
mov    0x2e89(%rip),%rax
mov    (%rax),%edx
lea    0xe98(%rip),%rsi
call   1040 <freopen@plt>
mov    $0x0,%al
call   1050 <setup@plt>
mov    $0x0,%al
call   1030 <run@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x2,%edi
jl     114f <main+0x1f>
mov    0x8(%rsi),%rdi
mov    0x2ea7(%rip),%rax
mov    (%rax),%edx
lea    0xeb6(%rip),%rsi
call   1040 <freopen@plt>
xor    %eax,%eax
call   1050 <setup@plt>
xor    %eax,%eax
call   1030 <run@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"r\00"
@stdin = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 1
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 1
%11 = load i8*, i8** %10
%12 = load i32, i32* @stdin
%13 = call i32 @freopen(i8* %11, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 %12)
br label %14
14: ; preds = %8, %2
%15 = call i32 (...) @setup()
%16 = call i32 (...) @run()
ret i32 0
}

LLVM IR (-O2):
@.str = [2 x i8] c"r\00"
@stdin = global i32 0
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %9
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = load i32, i32* @stdin
%8 = tail call i32 @freopen(i8* %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 %7)
br label %9
9: ; preds = %4, %2
%10 = tail call i32 (...) @setup()
%11 = tail call i32 (...) @run()
ret i32 0
}
/* Type definitions */
typedef int uint32_t;
typedef int irqn;

/* Variables and functions */
void nvic_disable_irq(int irqn) {
  *((volatile uint32_t *)(((0xe000e180) + (((irqn) >> 5)) * 4))) =
      ((1 << ((irqn)&0x1f)));
}


x86 assembly (clang, -O0):
<nvic_disable_irq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
and    $0x1f,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
sar    $0x5,%eax
shl    $0x2,%eax
add    $0xe000e180,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nvic_disable_irq>:
mov    %edi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
sar    $0x3,%ecx
add    $0xe000e180,%ecx
and    $0xfffffffc,%ecx
mov    %eax,(%rcx)
ret

LLVM IR (-O0):
define void @nvic_disable_irq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 31
%5 = shl i32 1, %4
%6 = load i32, i32* %2
%7 = ashr i32 %6, 5
%8 = mul nsw i32 %7, 4
%9 = add i32 -536813184, %8
%10 = zext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
store volatile i32 %5, i32* %11
ret void
}

LLVM IR (-O2):
define void @nvic_disable_irq(i32 %0) {
%2 = and i32 %0, 31
%3 = shl nuw i32 1, %2
%4 = ashr i32 %0, 3
%5 = add nsw i32 %4, -536813184
%6 = and i32 %5, -4
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
store volatile i32 %3, i32* %8
ret void
}