void usicConfigureASC(const unsigned int cbase) {
  (*((volatile unsigned int *const)(cbase + 0x010))) = 0x0000824E;
  (*((volatile unsigned int *const)(cbase + 0x014))) =
      (0x0004 << 16) | (15 << 10) | (1 << 8);
  (*((volatile unsigned int *const)(cbase + 0x034))) =
      ((8 - 1) << 24) | ((8 - 1) << 16) | (1 << 8) | (0 << 6) | (0 << 4) |
      (0 << 2) | (1 << 1) | (0 << 0);
  (*((volatile unsigned int *const)(cbase + 0x038))) = 0x00000500;
  (*((volatile unsigned int *const)(cbase + 0x03c))) = (9 << 8) | 1;
  (*((volatile unsigned int *const)(cbase + 0x028))) = 0x00000000;
  (*((volatile unsigned int *const)(cbase + 0x01c))) = 0x00000006;
}


x86 assembly (clang, -O0):
<usicConfigureASC>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%eax
mov    %eax,%eax
movl   $0x824e,(%rax)
mov    -0x4(%rbp),%eax
add    $0x14,%eax
mov    %eax,%eax
movl   $0x43d00,(%rax)
mov    -0x4(%rbp),%eax
add    $0x34,%eax
mov    %eax,%eax
movl   $0x7070102,(%rax)
mov    -0x4(%rbp),%eax
add    $0x38,%eax
mov    %eax,%eax
movl   $0x500,(%rax)
mov    -0x4(%rbp),%eax
add    $0x3c,%eax
mov    %eax,%eax
movl   $0x901,(%rax)
mov    -0x4(%rbp),%eax
add    $0x28,%eax
mov    %eax,%eax
movl   $0x0,(%rax)
mov    -0x4(%rbp),%eax
add    $0x1c,%eax
mov    %eax,%eax
movl   $0x6,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<usicConfigureASC>:
lea    0x10(%rdi),%eax
movl   $0x824e,(%rax)
lea    0x14(%rdi),%eax
movl   $0x43d00,(%rax)
lea    0x34(%rdi),%eax
movl   $0x7070102,(%rax)
lea    0x38(%rdi),%eax
movl   $0x500,(%rax)
lea    0x3c(%rdi),%eax
movl   $0x901,(%rax)
lea    0x28(%rdi),%eax
movl   $0x0,(%rax)
add    $0x1c,%edi
movl   $0x6,(%rdi)
ret

LLVM IR (-O0):
define void @usicConfigureASC(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 16
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
store volatile i32 33358, i32* %6
%7 = load i32, i32* %2
%8 = add i32 %7, 20
%9 = zext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
store volatile i32 277760, i32* %10
%11 = load i32, i32* %2
%12 = add i32 %11, 52
%13 = zext i32 %12 to i64
%14 = inttoptr i64 %13 to i32*
store volatile i32 117899522, i32* %14
%15 = load i32, i32* %2
%16 = add i32 %15, 56
%17 = zext i32 %16 to i64
%18 = inttoptr i64 %17 to i32*
store volatile i32 1280, i32* %18
%19 = load i32, i32* %2
%20 = add i32 %19, 60
%21 = zext i32 %20 to i64
%22 = inttoptr i64 %21 to i32*
store volatile i32 2305, i32* %22
%23 = load i32, i32* %2
%24 = add i32 %23, 40
%25 = zext i32 %24 to i64
%26 = inttoptr i64 %25 to i32*
store volatile i32 0, i32* %26
%27 = load i32, i32* %2
%28 = add i32 %27, 28
%29 = zext i32 %28 to i64
%30 = inttoptr i64 %29 to i32*
store volatile i32 6, i32* %30
ret void
}

LLVM IR (-O2):
define void @usicConfigureASC(i32 %0) {
%2 = add i32 %0, 16
%3 = zext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
store volatile i32 33358, i32* %4
%5 = add i32 %0, 20
%6 = zext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
store volatile i32 277760, i32* %7
%8 = add i32 %0, 52
%9 = zext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
store volatile i32 117899522, i32* %10
%11 = add i32 %0, 56
%12 = zext i32 %11 to i64
%13 = inttoptr i64 %12 to i32*
store volatile i32 1280, i32* %13
%14 = add i32 %0, 60
%15 = zext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
store volatile i32 2305, i32* %16
%17 = add i32 %0, 40
%18 = zext i32 %17 to i64
%19 = inttoptr i64 %18 to i32*
store volatile i32 0, i32* %19
%20 = add i32 %0, 28
%21 = zext i32 %20 to i64
%22 = inttoptr i64 %21 to i32*
store volatile i32 6, i32* %22
ret void
}