xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ abs(int);
int mina(int x, int y) { return abs(x) < abs(y) ? x : y; }


x86 assembly (clang, -O0):
<mina>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <abs@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <abs@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
jge    114d <mina+0x3d>
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1153 <mina+0x43>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mina>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <abs@plt>
mov    %rax,%r14
mov    %ebx,%edi
call   1030 <abs@plt>
cmp    %rax,%r14
cmovl  %ebp,%ebx
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @mina(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i64 @abs(i32 %5)
%7 = load i32, i32* %4
%8 = call i64 @abs(i32 %7)
%9 = icmp slt i64 %6, %8
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = load i32, i32* %3
br label %14
12: ; preds = %2
%13 = load i32, i32* %4
br label %14
14: ; preds = %12, %10
%15 = phi i32 [ %11, %10 ], [ %13, %12 ]
ret i32 %15
}

LLVM IR (-O2):
define i32 @mina(i32 %0, i32 %1) {
%3 = tail call i64 @abs(i32 %0)
%4 = tail call i64 @abs(i32 %1)
%5 = icmp slt i64 %3, %4
%6 = select i1 %5, i32 %0, i32 %1
ret i32 %6
}
char *emit_chesc(char *t, int v) {
  if (v == '\"') {
    *t++ = 'w';
    return (t);
  }
  if (v == '\\') {
    *t++ = 'x';
    return (t);
  }
  *t++ = v;
  return (t);
}


x86 assembly (clang, -O0):
<emit_chesc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x22,-0x14(%rbp)
jne    1134 <emit_chesc+0x34>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movb   $0x77,(%rax)
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    117b <emit_chesc+0x7b>
cmpl   $0x5c,-0x14(%rbp)
jne    115d <emit_chesc+0x5d>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movb   $0x78,(%rax)
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    117b <emit_chesc+0x7b>
mov    -0x14(%rbp),%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_chesc>:
mov    %rdi,%rax
cmp    $0x22,%esi
je     1112 <emit_chesc+0x12>
cmp    $0x5c,%esi
jne    1115 <emit_chesc+0x15>
mov    $0x78,%sil
jmp    1115 <emit_chesc+0x15>
mov    $0x77,%sil
mov    %sil,(%rax)
add    $0x1,%rax
ret

LLVM IR (-O0):
define i8* @emit_chesc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 34
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i8*, i8** %4
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %4
store i8 119, i8* %9
%11 = load i8*, i8** %4
store i8* %11, i8** %3
br label %25
12: ; preds = %2
%13 = load i32, i32* %5
%14 = icmp eq i32 %13, 92
br i1 %14, label %15, label %19
15: ; preds = %12
%16 = load i8*, i8** %4
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %4
store i8 120, i8* %16
%18 = load i8*, i8** %4
store i8* %18, i8** %3
br label %25
19: ; preds = %12
%20 = load i32, i32* %5
%21 = trunc i32 %20 to i8
%22 = load i8*, i8** %4
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %4
store i8 %21, i8* %22
%24 = load i8*, i8** %4
store i8* %24, i8** %3
br label %25
25: ; preds = %19, %15, %8
%26 = load i8*, i8** %3
ret i8* %26
}

LLVM IR (-O2):
define i8* @emit_chesc(i8* writeonly %0, i32 %1) {
switch i32 %1, label %4 [
i32 34, label %6
i32 92, label %3
]
3: ; preds = %2
br label %6
4: ; preds = %2
%5 = trunc i32 %1 to i8
br label %6
6: ; preds = %2, %4, %3
%7 = phi i8 [ %5, %4 ], [ 120, %3 ], [ 119, %2 ]
store i8 %7, i8* %0
%8 = getelementptr inbounds i8, i8* %0, i64 1
ret i8* %8
}
const char *f_greaterthan() { return ">"; }


x86 assembly (clang, -O0):
<f_greaterthan>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_greaterthan>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [2 x i8] c">\00"
define i8* @f_greaterthan() {
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [2 x i8] c">\00"
define i8* @f_greaterthan() {
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int pid_t;

/* Variables and functions */
int getpid();
int getppid();
int /*<<< orphan*/ printf(char *, int);
int main() {
  pid_t pid = getpid();
  printf("pid:%d\n", pid);
  pid_t ppid = getppid();
  printf("ppid:%d\n", ppid);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeae(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <getppid@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xe94(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xec2(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
call   1050 <getppid@plt>
lea    0xeac(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"pid:%d\0A\00"
@.str.1 = [9 x i8] c"ppid:%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @getpid()
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = call i32 (...) @getppid()
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"pid:%d\0A\00"
@.str.1 = [9 x i8] c"ppid:%d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @getpid()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 (...) @getppid()
%4 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void readerror(const char *s) {
  fprintf(stderr, "error reading from file %s\n", s);
  exit(4);
}


x86 assembly (clang, -O0):
<readerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x4,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<readerror>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x4,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [28 x i8] c"error reading from file %s\0A\00"
define void @readerror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 4)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [28 x i8] c"error reading from file %s\0A\00"
define void @readerror(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 4)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *, int);
int /*<<< orphan*/ perror(char const *);
int /*<<< orphan*/ stderr;
void puterrno(const char *file, int line, const char *msg) {
  (void)fprintf(stderr, "%s:%d: ", file, line);
  perror(msg);
}


x86 assembly (clang, -O0):
<puterrno>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
lea    0xeb6(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x18(%rbp),%rdi
call   1040 <perror@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puterrno>:
push   %rbx
mov    %rdx,%rbx
mov    %esi,%ecx
mov    %rdi,%rdx
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
lea    0xec7(%rip),%rsi
call   1030 <fprintf@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <perror@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [8 x i8] c"%s:%d: \00"
define void @puterrno(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* @stderr
%8 = load i8*, i8** %4
%9 = load i32, i32* %5
%10 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %8, i32 %9)
%11 = load i8*, i8** %6
%12 = call i32 @perror(i8* %11)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [8 x i8] c"%s:%d: \00"
define void @puterrno(i8* %0, i32 %1, i8* nocapture %2) {
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
%6 = tail call i32 @perror(i8* %2)
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ flush_push(scalar_t__);
void render_direct(uint8_t symbol, uint8_t times) {
  for (uint8_t i = 0; i < times; ++i)
    flush_push(symbol);
}


x86 assembly (clang, -O0):
<render_direct>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1150 <render_direct+0x40>
mov    -0x8(%rbp),%rdi
call   1030 <flush_push@plt>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1128 <render_direct+0x18>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<render_direct>:
push   %r14
push   %rbx
push   %rax
test   %rsi,%rsi
jle    112e <render_direct+0x1e>
mov    %rsi,%rbx
mov    %rdi,%r14
nop
mov    %r14,%rdi
call   1030 <flush_push@plt>
add    $0xffffffffffffffff,%rbx
jne    1120 <render_direct+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @render_direct(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %13, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp slt i64 %7, %8
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i64, i64* %3
%12 = call i32 @flush_push(i64 %11)
br label %13
13: ; preds = %10
%14 = load i64, i64* %5
%15 = add nsw i64 %14, 1
store i64 %15, i64* %5
br label %6
16: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @render_direct(i64 %0, i64 %1) {
%3 = icmp sgt i64 %1, 0
br i1 %3, label %5, label %4
4: ; preds = %5, %2
ret void
5: ; preds = %2, %5
%6 = phi i64 [ %8, %5 ], [ 0, %2 ]
%7 = tail call i32 @flush_push(i64 %0)
%8 = add nuw nsw i64 %6, 1
%9 = icmp eq i64 %8, %1
br i1 %9, label %4, label %5
}
/* Variables and functions */
int helper_func2(int);
int __attribute__((no)) helper_func(int arg) { return helper_func2(arg); }


x86 assembly (clang, -O0):
<helper_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <helper_func2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<helper_func>:
jmp    1030 <helper_func2@plt>

LLVM IR (-O0):
define i32 @helper_func(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @helper_func2(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @helper_func(i32 %0) {
%2 = tail call i32 @helper_func2(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
main() {
  assert('"' + '\"' == 68);
  assert('/*' == 12074);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <assert@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @assert(i32 1)
%3 = call i32 @assert(i32 1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
%2 = tail call i32 @assert(i32 1)
ret i32 0
}
void interrupts_stop() { asm("cli"); }


x86 assembly (clang, -O0):
<interrupts_stop>:
push   %rbp
mov    %rsp,%rbp
cli
pop    %rbp
ret

x86 assembly (clang, -O2):
<interrupts_stop>:
cli
ret

LLVM IR (-O0):
define void @interrupts_stop() {
ret void
}

LLVM IR (-O2):
define void @interrupts_stop() {
tail call void asm sideeffect "cli", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
void cl_flush(void *p) {
  asm volatile("clflush (%0)\n\t" : : "r"(p) : "memory");
}


x86 assembly (clang, -O0):
<cl_flush>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
clflush (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cl_flush>:
clflush (%rdi)
ret

LLVM IR (-O0):
define void @cl_flush(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @cl_flush(i8* %0) {
tail call void asm sideeffect "clflush ($0)\0A\09", "r,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret void
}
/* Variables and functions */
char rndchr(char *);
char randchar() {
  return rndchr("abcdefghijklmnopqrstuvwxyz"
                "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
                "0123456789"
                "!@#$%%^&*(_-)+=[]{}<>|\\;:'\",./?~` ");
}


x86 assembly (clang, -O0):
<randchar>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <rndchr@plt>
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<randchar>:
lea    0xee9(%rip),%rdi
jmp    1030 <rndchr@plt>

LLVM IR (-O0):
@.str = [97 x i8] c"abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@#$%%^&*(_-)+=[]{}<>|\\;:'\22,./?~` \00"
define signext i8 @randchar() {
%1 = call signext i8 @rndchr(i8* getelementptr inbounds ([97 x i8], [97 x i8]* @.str, i64 0, i64 0))
ret i8 %1
}

LLVM IR (-O2):
@.str = [97 x i8] c"abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@#$%%^&*(_-)+=[]{}<>|\\;:'\22,./?~` \00"
define signext i8 @randchar() {
%1 = tail call signext i8 @rndchr(i8* getelementptr inbounds ([97 x i8], [97 x i8]* @.str, i64 0, i64 0))
ret i8 %1
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void xfree_large(void *p) { free(p); }


x86 assembly (clang, -O0):
<xfree_large>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfree_large>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @xfree_large(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @xfree_large(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
void null_debug_output(int type, void *param) {
  (void)type;
  (void)param;
}


x86 assembly (clang, -O0):
<null_debug_output>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_debug_output>:
ret

LLVM IR (-O0):
define void @null_debug_output(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
ret void
}

LLVM IR (-O2):
define void @null_debug_output(i32 %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ func_k();
void func_j() { func_k(); }


x86 assembly (clang, -O0):
<func_j>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <func_k@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_j>:
xor    %eax,%eax
jmp    1030 <func_k@plt>

LLVM IR (-O0):
define void @func_j() {
%1 = call i32 (...) @func_k()
ret void
}

LLVM IR (-O2):
define void @func_j() {
%1 = tail call i32 (...) @func_k()
ret void
}
/* Variables and functions */
char *alocar_frase();
char *alocar_palavra();
int /*<<< orphan*/ printf(char *, char *);
int main() {
  char *frase = alocar_frase();
  char *palavra = alocar_palavra();
  printf("%s", frase);
  printf("%s", palavra);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <alocar_frase@plt>
mov    %rax,-0x8(%rbp)
mov    $0x0,%al
call   1040 <alocar_palavra@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xea7(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%rsi
lea    0xe97(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
xor    %eax,%eax
call   1050 <alocar_frase@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1040 <alocar_palavra@plt>
mov    %rax,%r14
lea    0xeb0(%rip),%r15
mov    %r15,%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
mov    %r15,%rdi
mov    %r14,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca i8*
%2 = alloca i8*
%3 = call i8* (...) @alocar_frase()
store i8* %3, i8** %1
%4 = call i8* (...) @alocar_palavra()
store i8* %4, i8** %2
%5 = load i8*, i8** %1
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = load i8*, i8** %2
%8 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i32 @main() {
%1 = tail call i8* (...) @alocar_frase()
%2 = tail call i8* (...) @alocar_palavra()
%3 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %1)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %2)
ret i32 0
}
int path_030_expected_6(int y) {
  int x = 0;
  switch (y) {
  case 10:
  case 9:
  case 0:
    x = 1;
  case 1:
    if (y) {
    }
    x++;
    break;
  case 2:
    x = 17;
  }
  return x;
}


x86 assembly (clang, -O0):
<path_030_expected_6>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %rax,-0x10(%rbp)
sub    $0xa,%rax
ja     115e <path_030_expected_6+0x5e>
mov    -0x10(%rbp),%rax
lea    0xed6(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1149 <path_030_expected_6+0x49>
jmp    1149 <path_030_expected_6+0x49>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    115e <path_030_expected_6+0x5e>
movl   $0x11,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<path_030_expected_6>:
xor    %eax,%eax
cmp    $0xa,%edi
ja     1126 <path_030_expected_6+0x26>
mov    %edi,%ecx
lea    0xef0(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
mov    $0x2,%edi
mov    %edi,%eax
ret
mov    $0x11,%eax
ret

LLVM IR (-O0):
define i32 @path_030_expected_6(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
switch i32 %4, label %14 [
i32 10, label %5
i32 9, label %5
i32 0, label %5
i32 1, label %6
i32 2, label %13
]
5: ; preds = %1, %1, %1
store i32 1, i32* %3
br label %6
6: ; preds = %1, %5
%7 = load i32, i32* %2
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %6
br label %10
10: ; preds = %9, %6
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %14
13: ; preds = %1
store i32 17, i32* %3
br label %14
14: ; preds = %13, %1, %10
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @path_030_expected_6(i32 %0) {
switch i32 %0, label %6 [
i32 10, label %2
i32 9, label %2
i32 0, label %2
i32 1, label %3
i32 2, label %5
]
2: ; preds = %1, %1, %1
br label %3
3: ; preds = %1, %2
%4 = phi i32 [ %0, %1 ], [ 2, %2 ]
br label %6
5: ; preds = %1
br label %6
6: ; preds = %5, %1, %3
%7 = phi i32 [ 0, %1 ], [ 17, %5 ], [ %4, %3 ]
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_t;
typedef int /*<<< orphan*/ pthread_attr_t;

/* Variables and functions */
int pthread_create(pthread_t *__restrict __newthread,
                   __const pthread_attr_t *__restrict __attr,
                   void *(*__start_routine)(void *), void *__restrict __arg) {
  ;
  return -1;
}


x86 assembly (clang, -O0):
<pthread_create>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_create>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @pthread_create(i32* noalias %0, i32* noalias %1, i8* (i8*)* %2, i8* noalias %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i8* (i8*)*
%8 = alloca i8*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i8* (i8*)* %2, i8* (i8*)** %7
store i8* %3, i8** %8
ret i32 -1
}

LLVM IR (-O2):
define i32 @pthread_create(i32* noalias nocapture readnone %0, i32* noalias nocapture readnone %1, i8* (i8*)* nocapture readnone %2, i8* noalias nocapture readnone %3) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char);
int main() {
  char arr[4];
  arr[0] = 'a';
  arr[1] = 'b';
  printf("%p\t%c\n", arr + 0, *(arr + 0));
  printf("%p\t%c\n", arr + 1, *(arr + 1));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movb   $0x61,-0x8(%rbp)
movb   $0x62,-0x7(%rbp)
lea    -0x8(%rbp),%rsi
lea    0xece(%rip),%rdi
movsbl -0x8(%rbp),%edx
call   1030 <printf@plt>
lea    -0x8(%rbp),%rsi
add    $0x1,%rsi
lea    0xeb6(%rip),%rdi
movsbl -0x7(%rbp),%edx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
movw   $0x6261,0x4(%rsp)
lea    0x5(%rsp),%r14
lea    0xed9(%rip),%rbx
lea    0x4(%rsp),%rsi
mov    %rbx,%rdi
mov    $0x61,%edx
call   1030 <printf@plt>
movsbl 0x5(%rsp),%edx
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%p\09%c\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [4 x i8]
store i32 0, i32* %1
%3 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
store i8 97, i8* %3
%4 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 1
store i8 98, i8* %4
%5 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%6 = getelementptr inbounds i8, i8* %5, i64 0
%7 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%8 = getelementptr inbounds i8, i8* %7, i64 0
%9 = load i8, i8* %8
%10 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %6, i8 signext %9)
%11 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%12 = getelementptr inbounds i8, i8* %11, i64 1
%13 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%14 = getelementptr inbounds i8, i8* %13, i64 1
%15 = load i8, i8* %14
%16 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %12, i8 signext %15)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%p\09%c\0A\00"
define i32 @main() {
%1 = alloca [4 x i8]
%2 = getelementptr inbounds [4 x i8], [4 x i8]* %1, i64 0, i64 0
store i8 97, i8* %2
%3 = getelementptr inbounds [4 x i8], [4 x i8]* %1, i64 0, i64 1
store i8 98, i8* %3
%4 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %2, i8 signext 97)
%5 = load i8, i8* %3
%6 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %3, i8 signext %5)
ret i32 0
}
/* Variables and functions */
unsigned int EEread(unsigned int);
unsigned int EEword_read(unsigned int addres) {
  unsigned int buff;
  buff = EEread(addres);
  buff = buff << 8;
  buff |= EEread(addres + 1);
  return buff;
}


x86 assembly (clang, -O0):
<EEword_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <EEread@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
add    $0x1,%edi
call   1030 <EEread@plt>
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EEword_read>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
call   1030 <EEread@plt>
mov    %eax,%ebp
shl    $0x8,%ebp
add    $0x1,%ebx
mov    %ebx,%edi
call   1030 <EEread@plt>
or     %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @EEword_read(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @EEread(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = shl i32 %6, 8
store i32 %7, i32* %3
%8 = load i32, i32* %2
%9 = add i32 %8, 1
%10 = call i32 @EEread(i32 %9)
%11 = load i32, i32* %3
%12 = or i32 %11, %10
store i32 %12, i32* %3
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @EEword_read(i32 %0) {
%2 = tail call i32 @EEread(i32 %0)
%3 = shl i32 %2, 8
%4 = add i32 %0, 1
%5 = tail call i32 @EEread(i32 %4)
%6 = or i32 %3, %5
ret i32 %6
}
long double foo(long double parameter_1) { return parameter_1; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
fldt   0x8(%rsp)
ret

LLVM IR (-O0):
define x86_fp80 @foo(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
ret x86_fp80 %3
}

LLVM IR (-O2):
define x86_fp80 @foo(x86_fp80 returned %0) {
ret x86_fp80 %0
}
void ADCAutoInjectedEnable(unsigned long ulBase) {
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000004))) |= 0x00000400;
}


x86 assembly (clang, -O0):
<ADCAutoInjectedEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rcx
or     $0x400,%rcx
mov    %rcx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCAutoInjectedEnable>:
orq    $0x400,0x4(%rdi)
ret

LLVM IR (-O0):
define void @ADCAutoInjectedEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 4
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = or i64 %6, 1024
store volatile i64 %7, i64* %5
ret void
}

LLVM IR (-O2):
define void @ADCAutoInjectedEnable(i64 %0) {
%2 = add i64 %0, 4
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = or i64 %4, 1024
store volatile i64 %5, i64* %3
ret void
}
void RTTimeNanoTSLFenceSync(void) {}


x86 assembly (clang, -O0):
<RTTimeNanoTSLFenceSync>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTTimeNanoTSLFenceSync>:
ret

LLVM IR (-O0):
define void @RTTimeNanoTSLFenceSync() {
ret void
}

LLVM IR (-O2):
define void @RTTimeNanoTSLFenceSync() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ PrintBigLetters();
int /*<<< orphan*/ PrintDigits();
int /*<<< orphan*/ PrintSmallLetters();
int main() {
  PrintSmallLetters();
  PrintBigLetters();
  PrintDigits();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <PrintSmallLetters@plt>
mov    $0x0,%al
call   1030 <PrintBigLetters@plt>
mov    $0x0,%al
call   1050 <PrintDigits@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <PrintSmallLetters@plt>
xor    %eax,%eax
call   1030 <PrintBigLetters@plt>
xor    %eax,%eax
call   1050 <PrintDigits@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @PrintSmallLetters()
%3 = call i32 (...) @PrintBigLetters()
%4 = call i32 (...) @PrintDigits()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @PrintSmallLetters()
%2 = tail call i32 (...) @PrintBigLetters()
%3 = tail call i32 (...) @PrintDigits()
ret i32 0
}
int test_imm_31int64_lowword_mem(long long *val) {
  return ((*val) & (0x31 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_31int64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x31,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_31int64_lowword_mem>:
testb  $0x31,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_31int64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 49
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_31int64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 49
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int serial_init(void) { return 0; }


x86 assembly (clang, -O0):
<serial_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @serial_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @serial_init() {
ret i32 0
}
long nr_blockdev_pages(void) { return 0; }


x86 assembly (clang, -O0):
<nr_blockdev_pages>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nr_blockdev_pages>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @nr_blockdev_pages() {
ret i64 0
}

LLVM IR (-O2):
define i64 @nr_blockdev_pages() {
ret i64 0
}
/* Variables and functions */
int /*<<< orphan*/ putCMD(int);
int /*<<< orphan*/ putPT(int);
int /*<<< orphan*/ putPT_L(int);
int _dos_exit(int retcode) {
  putCMD(0x83);
  putPT(0x1b);
  putPT_L(retcode);
  for (;;)
    ;
}


x86 assembly (clang, -O0):
<_dos_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x83,%edi
call   1050 <putCMD@plt>
mov    $0x1b,%edi
call   1030 <putPT@plt>
mov    -0x4(%rbp),%edi
call   1040 <putPT_L@plt>
jmp    1157 <_dos_exit+0x27>

x86 assembly (clang, -O2):
<_dos_exit>:
push   %rbx
mov    %edi,%ebx
mov    $0x83,%edi
call   1050 <putCMD@plt>
mov    $0x1b,%edi
call   1030 <putPT@plt>
mov    %ebx,%edi
call   1040 <putPT_L@plt>
xchg   %ax,%ax
jmp    1150 <_dos_exit+0x20>

LLVM IR (-O0):
define i32 @_dos_exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @putCMD(i32 131)
%4 = call i32 @putPT(i32 27)
%5 = load i32, i32* %2
%6 = call i32 @putPT_L(i32 %5)
br label %7
7: ; preds = %7, %1
br label %7
}

LLVM IR (-O2):
define i32 @_dos_exit(i32 %0) {
%2 = tail call i32 @putCMD(i32 131)
%3 = tail call i32 @putPT(i32 27)
%4 = tail call i32 @putPT_L(i32 %0)
br label %5
5: ; preds = %5, %1
br label %5
}
unsigned decode_char(unsigned char in) { return ((in) - ' ') & 63; }


x86 assembly (clang, -O0):
<decode_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
sub    $0x20,%eax
and    $0x3f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode_char>:
add    $0x20,%dil
and    $0x3f,%dil
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @decode_char(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = sub nsw i32 %4, 32
%6 = and i32 %5, 63
ret i32 %6
}

LLVM IR (-O2):
define i32 @decode_char(i8 zeroext %0) {
%2 = add i8 %0, 32
%3 = and i8 %2, 63
%4 = zext i8 %3 to i32
ret i32 %4
}
void Unlock() {}


x86 assembly (clang, -O0):
<Unlock>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Unlock>:
ret

LLVM IR (-O0):
define void @Unlock() {
ret void
}

LLVM IR (-O2):
define void @Unlock() {
ret void
}
signed int pthread_equal(unsigned long int __thread1,
                         unsigned long int __thread2) {
  return (signed int)(__thread1 == __thread2);
}


x86 assembly (clang, -O0):
<pthread_equal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_equal>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @pthread_equal(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @pthread_equal(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
double acos(double);
__attribute__((transaction_pure)) double tm_acos(double x) { return acos(x); }


x86 assembly (clang, -O0):
<tm_acos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <acos@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tm_acos>:
jmp    1030 <acos@plt>

LLVM IR (-O0):
define double @tm_acos(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @acos(double %3)
ret double %4
}

LLVM IR (-O2):
define double @tm_acos(double %0) {
%2 = tail call double @acos(double %0)
ret double %2
}
/* Variables and functions */
scalar_t__ strcmp(char *, char *);
int is_c_language(char *project_type) {
  if ((strcmp(project_type, "c") == 0) || (strcmp(project_type, "cpp") == 0)) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<is_c_language>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
je     1150 <is_c_language+0x40>
mov    -0x10(%rbp),%rdi
lea    0xec1(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
jne    115c <is_c_language+0x4c>
movl   $0x1,-0x4(%rbp)
jmp    1163 <is_c_language+0x53>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_c_language>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <strcmp@plt>
test   %rax,%rax
je     1141 <is_c_language+0x31>
lea    0xed6(%rip),%rsi
mov    %rbx,%rdi
call   1030 <strcmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
pop    %rbx
ret
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"c\00"
@.str.1 = [4 x i8] c"cpp\00"
define i32 @is_c_language(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @strcmp(i8* %4, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%6 = icmp eq i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = call i64 @strcmp(i8* %8, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7, %1
store i32 1, i32* %2
br label %13
12: ; preds = %7
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
@.str = [2 x i8] c"c\00"
@.str.1 = [4 x i8] c"cpp\00"
define i32 @is_c_language(i8* %0) {
%2 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ delete_user(void *);
void free_user_list_handler(void *ptr) { delete_user(ptr); }


x86 assembly (clang, -O0):
<free_user_list_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <delete_user@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_user_list_handler>:
jmp    1030 <delete_user@plt>

LLVM IR (-O0):
define void @free_user_list_handler(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @delete_user(i8* %3)
ret void
}

LLVM IR (-O2):
define void @free_user_list_handler(i8* %0) {
%2 = tail call i32 @delete_user(i8* %0)
ret void
}
void clear_bit(int nr, void *addr) {
  unsigned long mask = 1 << (nr & 0x1f);
  unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
  *p &= ~mask;
  return;
}


x86 assembly (clang, -O0):
<clear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
and    $0x1f,%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
sar    $0x5,%ecx
movslq %ecx,%rcx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rcx
xor    $0xffffffffffffffff,%rcx
mov    -0x20(%rbp),%rax
and    (%rax),%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_bit>:
mov    %edi,%ecx
mov    %edi,%eax
sar    $0x5,%eax
cltq
mov    $0xfffffffe,%edx
rol    %cl,%edx
movslq %edx,%rcx
and    %rcx,(%rsi,%rax,8)
ret

LLVM IR (-O0):
define void @clear_bit(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64*
store i32 %0, i32* %3
store i8* %1, i8** %4
%7 = load i32, i32* %3
%8 = and i32 %7, 31
%9 = shl i32 1, %8
%10 = sext i32 %9 to i64
store i64 %10, i64* %5
%11 = load i8*, i8** %4
%12 = bitcast i8* %11 to i64*
%13 = load i32, i32* %3
%14 = ashr i32 %13, 5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i64, i64* %12, i64 %15
store i64* %16, i64** %6
%17 = load i64, i64* %5
%18 = xor i64 %17, -1
%19 = load i64*, i64** %6
%20 = load i64, i64* %19
%21 = and i64 %20, %18
store i64 %21, i64* %19
ret void
}

LLVM IR (-O2):
define void @clear_bit(i32 %0, i8* nocapture %1) {
%3 = and i32 %0, 31
%4 = shl nuw i32 1, %3
%5 = bitcast i8* %1 to i64*
%6 = ashr i32 %0, 5
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i64, i64* %5, i64 %7
%9 = xor i32 %4, -1
%10 = sext i32 %9 to i64
%11 = load i64, i64* %8
%12 = and i64 %11, %10
store i64 %12, i64* %8
ret void
}
void LIB_LoRa_Timing_Init(void) {}


x86 assembly (clang, -O0):
<LIB_LoRa_Timing_Init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LIB_LoRa_Timing_Init>:
ret

LLVM IR (-O0):
define void @LIB_LoRa_Timing_Init() {
ret void
}

LLVM IR (-O2):
define void @LIB_LoRa_Timing_Init() {
ret void
}
velax_f2u(i, vf, cb, sht, flt, dub, intype, inmult, ubuf) int i, inmult, *vf;
char *cb, *ubuf, intype;
short *sht;
float *flt;
double *dub;
{}


x86 assembly (clang, -O0):
<velax_f2u>:
push   %rbp
mov    %rsp,%rbp
mov    0x20(%rbp),%rax
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    %al,-0x31(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<velax_f2u>:
ret

LLVM IR (-O0):
define i32 @velax_f2u(i32 %0, i32* %1, i8* %2, i16* %3, float* %4, double* %5, i32 %6, i32 %7, i8* %8) {
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i8*
%14 = alloca i16*
%15 = alloca float*
%16 = alloca double*
%17 = alloca i8
%18 = alloca i32
%19 = alloca i8*
%20 = trunc i32 %6 to i8
store i32 %0, i32* %11
store i32* %1, i32** %12
store i8* %2, i8** %13
store i16* %3, i16** %14
store float* %4, float** %15
store double* %5, double** %16
store i8 %20, i8* %17
store i32 %7, i32* %18
store i8* %8, i8** %19
%21 = load i32, i32* %10
ret i32 %21
}

LLVM IR (-O2):
define i32 @velax_f2u(i32 %0, i32* nocapture readnone %1, i8* nocapture readnone %2, i16* nocapture readnone %3, float* nocapture readnone %4, double* nocapture readnone %5, i32 %6, i32 %7, i8* nocapture readnone %8) {
ret i32 undef
}
int Coputer(int a, int b, int c) {
  switch ((char)c) {
  case '+':
    return b + a;
  case '-':
    return b - a;
  case '*':
    return b * a;
  case '/':
    return b / a;
  }
  return 0;
}


x86 assembly (clang, -O0):
<Coputer>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movsbl -0x10(%rbp),%eax
add    $0xffffffd6,%eax
mov    %eax,%ecx
mov    %rcx,-0x18(%rbp)
sub    $0x5,%eax
ja     1171 <Coputer+0x71>
mov    -0x18(%rbp),%rax
lea    0xed2(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1178 <Coputer+0x78>
mov    -0xc(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1178 <Coputer+0x78>
mov    -0xc(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1178 <Coputer+0x78>
mov    -0xc(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,-0x4(%rbp)
jmp    1178 <Coputer+0x78>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Coputer>:
movsbl %dl,%ecx
xor    %eax,%eax
add    $0xffffffd6,%ecx
cmp    $0x5,%ecx
ja     1132 <Coputer+0x32>
lea    0xeec(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
imul   %edi,%esi
mov    %esi,%eax
ret
add    %edi,%esi
mov    %esi,%eax
ret
sub    %edi,%esi
mov    %esi,%eax
ret
mov    %esi,%eax
cltd
idiv   %edi
ret

LLVM IR (-O0):
define i32 @Coputer(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %7
%9 = trunc i32 %8 to i8
%10 = sext i8 %9 to i32
switch i32 %10, label %27 [
i32 43, label %11
i32 45, label %15
i32 42, label %19
i32 47, label %23
]
11: ; preds = %3
%12 = load i32, i32* %6
%13 = load i32, i32* %5
%14 = add nsw i32 %12, %13
store i32 %14, i32* %4
br label %28
15: ; preds = %3
%16 = load i32, i32* %6
%17 = load i32, i32* %5
%18 = sub nsw i32 %16, %17
store i32 %18, i32* %4
br label %28
19: ; preds = %3
%20 = load i32, i32* %6
%21 = load i32, i32* %5
%22 = mul nsw i32 %20, %21
store i32 %22, i32* %4
br label %28
23: ; preds = %3
%24 = load i32, i32* %6
%25 = load i32, i32* %5
%26 = sdiv i32 %24, %25
store i32 %26, i32* %4
br label %28
27: ; preds = %3
store i32 0, i32* %4
br label %28
28: ; preds = %27, %23, %19, %15, %11
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @Coputer(i32 %0, i32 %1, i32 %2) {
%4 = shl i32 %2, 24
%5 = ashr exact i32 %4, 24
switch i32 %5, label %14 [
i32 43, label %6
i32 45, label %8
i32 42, label %10
i32 47, label %12
]
6: ; preds = %3
%7 = add nsw i32 %1, %0
br label %14
8: ; preds = %3
%9 = sub nsw i32 %1, %0
br label %14
10: ; preds = %3
%11 = mul nsw i32 %1, %0
br label %14
12: ; preds = %3
%13 = sdiv i32 %1, %0
br label %14
14: ; preds = %3, %12, %10, %8, %6
%15 = phi i32 [ %13, %12 ], [ %11, %10 ], [ %9, %8 ], [ %7, %6 ], [ 0, %3 ]
ret i32 %15
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t EEPROMIntStatus(bool bMasked) {
  if (bMasked) {
    return (((*((volatile unsigned long *)(0x400FD014))) & 0x00000004)
                ? 0x00000004
                : 0);
  } else {
    return (((*((volatile unsigned long *)(0x400AF018))) & 0x00000001)
                ? 0
                : 0x00000004);
  }
}


x86 assembly (clang, -O0):
<EEPROMIntStatus>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1133 <EEPROMIntStatus+0x33>
mov    $0x400fd014,%eax
mov    (%rax),%rdx
and    $0x4,%rdx
xor    %eax,%eax
mov    $0x4,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    1150 <EEPROMIntStatus+0x50>
mov    $0x400af018,%eax
mov    (%rax),%rdx
and    $0x1,%rdx
mov    $0x4,%eax
xor    %ecx,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<EEPROMIntStatus>:
test   %edi,%edi
je     1110 <EEPROMIntStatus+0x10>
mov    0x400fd014,%rax
40
and    $0x4,%eax
ret
mov    0x400af018,%rax
40
shl    $0x2,%eax
not    %eax
and    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @EEPROMIntStatus(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load volatile i64, i64* inttoptr (i64 1074778132 to i64*)
%8 = and i64 %7, 4
%9 = icmp ne i64 %8, 0
%10 = zext i1 %9 to i64
%11 = select i1 %9, i32 4, i32 0
store i32 %11, i32* %2
br label %18
12: ; preds = %1
%13 = load volatile i64, i64* inttoptr (i64 1074458648 to i64*)
%14 = and i64 %13, 1
%15 = icmp ne i64 %14, 0
%16 = zext i1 %15 to i64
%17 = select i1 %15, i32 0, i32 4
store i32 %17, i32* %2
br label %18
18: ; preds = %12, %6
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @EEPROMIntStatus(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = load volatile i64, i64* inttoptr (i64 1074778132 to i64*)
%5 = trunc i64 %4 to i32
%6 = and i32 %5, 4
br label %13
7: ; preds = %1
%8 = load volatile i64, i64* inttoptr (i64 1074458648 to i64*)
%9 = trunc i64 %8 to i32
%10 = shl i32 %9, 2
%11 = and i32 %10, 4
%12 = xor i32 %11, 4
br label %13
13: ; preds = %7, %3
%14 = phi i32 [ %6, %3 ], [ %12, %7 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ pr_inf(char *, char const *);
int /*<<< orphan*/ stress_check_capability(int /*<<< orphan*/);
int stress_physpage_supported(const char *name) {
  if (!stress_check_capability((0))) {
    pr_inf("%s stressor will be skipped, "
           "need to be running with CAP_SYS_ADMIN "
           "rights for this stressor\n",
           name);
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<stress_physpage_supported>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
xor    %edi,%edi
call   1030 <stress_check_capability@plt>
cmp    $0x0,%eax
jne    1158 <stress_physpage_supported+0x38>
mov    -0x10(%rbp),%rsi
lea    0xeb9(%rip),%rdi
call   1040 <pr_inf@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    115f <stress_physpage_supported+0x3f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stress_physpage_supported>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %ebp,%ebp
xor    %edi,%edi
call   1030 <stress_check_capability@plt>
test   %eax,%eax
jne    1147 <stress_physpage_supported+0x27>
lea    0xec6(%rip),%rdi
mov    %rbx,%rsi
call   1040 <pr_inf@plt>
mov    $0xffffffff,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [93 x i8] c"%s stressor will be skipped, need to be running with CAP_SYS_ADMIN rights for this stressor\0A\00"
define i32 @stress_physpage_supported(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = call i32 @stress_check_capability(i32 0)
%5 = icmp ne i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i8*, i8** %3
%8 = call i32 @pr_inf(i8* getelementptr inbounds ([93 x i8], [93 x i8]* @.str, i64 0, i64 0), i8* %7)
store i32 -1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@.str = [93 x i8] c"%s stressor will be skipped, need to be running with CAP_SYS_ADMIN rights for this stressor\0A\00"
define i32 @stress_physpage_supported(i8* %0) {
%2 = tail call i32 @stress_check_capability(i32 0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @pr_inf(i8* getelementptr inbounds ([93 x i8], [93 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ -1, %4 ], [ 0, %1 ]
ret i32 %7
}