xunge/DecIR huggingface dataset:
float proc_syngate1(float w, float alpha, float edt, float dt, float gate) {
  return gate * edt + w * alpha * dt;
}


x86 assembly (clang, -O0):
<proc_syngate1>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  %xmm4,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
movss  -0xc(%rbp),%xmm2
movss  -0x4(%rbp),%xmm1
mulss  -0x8(%rbp),%xmm1
mulss  -0x10(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<proc_syngate1>:
mulss  %xmm1,%xmm0
mulss  %xmm3,%xmm0
mulss  %xmm4,%xmm2
addss  %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @proc_syngate1(float %0, float %1, float %2, float %3, float %4) {
%6 = alloca float
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
store float %0, float* %6
store float %1, float* %7
store float %2, float* %8
store float %3, float* %9
store float %4, float* %10
%11 = load float, float* %10
%12 = load float, float* %8
%13 = load float, float* %6
%14 = load float, float* %7
%15 = fmul float %13, %14
%16 = load float, float* %9
%17 = fmul float %15, %16
%18 = call float @llvm.fmuladd.f32(float %11, float %12, float %17)
ret float %18
}

LLVM IR (-O2):
define float @proc_syngate1(float %0, float %1, float %2, float %3, float %4) {
%6 = fmul float %0, %1
%7 = fmul float %6, %3
%8 = tail call float @llvm.fmuladd.f32(float %4, float %2, float %7)
ret float %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, int, char *);
void listenner(int cid, char *from, int from_size, int *port, char *buffer,
               unsigned int buffer_size_returned) {
  printf("<RECV>%s[%d]:%s\n", from, *port, buffer);
}


x86 assembly (clang, -O0):
<listenner>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9d,-0x2c(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rax
mov    (%rax),%edx
mov    -0x28(%rbp),%rcx
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<listenner>:
mov    (%rcx),%edx
lea    0xee7(%rip),%rdi
mov    %r8,%rcx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"<RECV>%s[%d]:%s\0A\00"
define void @listenner(i32 %0, i8* %1, i32 %2, i32* %3, i8* %4, i32 %5) {
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32*
%11 = alloca i8*
%12 = alloca i32
store i32 %0, i32* %7
store i8* %1, i8** %8
store i32 %2, i32* %9
store i32* %3, i32** %10
store i8* %4, i8** %11
store i32 %5, i32* %12
%13 = load i8*, i8** %8
%14 = load i32*, i32** %10
%15 = load i32, i32* %14
%16 = load i8*, i8** %11
%17 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* %13, i32 %15, i8* %16)
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"<RECV>%s[%d]:%s\0A\00"
define void @listenner(i32 %0, i8* %1, i32 %2, i32* nocapture %3, i8* %4, i32 %5) {
%7 = load i32, i32* %3
%8 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* %1, i32 %7, i8* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char const *);
void traceFunction(const char *msg, void *data) { puts(msg); }


x86 assembly (clang, -O0):
<traceFunction>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <puts@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<traceFunction>:
jmp    1030 <puts@plt>

LLVM IR (-O0):
define void @traceFunction(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 @puts(i8* %5)
ret void
}

LLVM IR (-O2):
define void @traceFunction(i8* nocapture %0, i8* nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) %0)
ret void
}
int execute_sgetmask() { return 0; }


x86 assembly (clang, -O0):
<execute_sgetmask>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_sgetmask>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_sgetmask() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_sgetmask() {
ret i32 0
}
int qcs_max(int a, int b) { return a > b ? a : b; }


x86 assembly (clang, -O0):
<qcs_max>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <qcs_max+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <qcs_max+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<qcs_max>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @qcs_max(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @qcs_max(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
long long usss() { return 0x7fffffffffffffffLL; }


x86 assembly (clang, -O0):
<usss>:
push   %rbp
mov    %rsp,%rbp
movabs $0x7fffffffffffffff,%rax
ff ff 7f
pop    %rbp
ret

x86 assembly (clang, -O2):
<usss>:
movabs $0x7fffffffffffffff,%rax
ff ff 7f
ret

LLVM IR (-O0):
define i64 @usss() {
ret i64 9223372036854775807
}

LLVM IR (-O2):
define i64 @usss() {
ret i64 9223372036854775807
}
/* Variables and functions */
scalar_t__ lc_ADDRESS();
int Ada_lc_ADDRESS() {
  int jresult;
  int result;
  result = (int)lc_ADDRESS();
  jresult = result;
  return jresult;
}


x86 assembly (clang, -O0):
<Ada_lc_ADDRESS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <lc_ADDRESS@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Ada_lc_ADDRESS>:
xor    %eax,%eax
jmp    1030 <lc_ADDRESS@plt>

LLVM IR (-O0):
define i32 @Ada_lc_ADDRESS() {
%1 = alloca i32
%2 = alloca i32
%3 = call i64 (...) @lc_ADDRESS()
%4 = trunc i64 %3 to i32
store i32 %4, i32* %2
%5 = load i32, i32* %2
store i32 %5, i32* %1
%6 = load i32, i32* %1
ret i32 %6
}

LLVM IR (-O2):
define i32 @Ada_lc_ADDRESS() {
%1 = tail call i64 (...) @lc_ADDRESS()
%2 = trunc i64 %1 to i32
ret i32 %2
}
int HelpItem49(void) { return 0; }


x86 assembly (clang, -O0):
<HelpItem49>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelpItem49>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HelpItem49() {
ret i32 0
}

LLVM IR (-O2):
define i32 @HelpItem49() {
ret i32 0
}
void ff_hevc_put_hevc_uni_qpel_h12_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_qpel_h12_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_qpel_h12_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_qpel_h12_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_qpel_h12_10_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ BNCIO(int);
int BNCMinus() {
  int ii, stat = 99;
  char com1, data;
  BNCIO(17);
  return (stat);
}


x86 assembly (clang, -O0):
<BNCMinus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x63,-0x8(%rbp)
mov    $0x11,%edi
call   1030 <BNCIO@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BNCMinus>:
push   %rax
mov    $0x11,%edi
call   1030 <BNCIO@plt>
mov    $0x63,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @BNCMinus() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8
%4 = alloca i8
store i32 99, i32* %2
%5 = call i32 @BNCIO(i32 17)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @BNCMinus() {
%1 = tail call i32 @BNCIO(i32 17)
ret i32 99
}
/* Variables and functions */
int fib(int);
int /*<<< orphan*/ printf(char *, int);
int main() { printf("%i", fib(38)); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x26,%edi
call   1040 <fib@plt>
mov    %eax,%esi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x26,%edi
call   1040 <fib@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%i\00"
define i32 @main() {
%1 = call i32 @fib(i32 38)
%2 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%i\00"
define i32 @main() {
%1 = tail call i32 @fib(i32 38)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
long double rintl(long double x) {
  long double retval;
  __asm__("frndint;" : "=t"(retval) : "0"(x));
  return retval;
}


x86 assembly (clang, -O0):
<rintl>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
frndint
fstpt  -0x20(%rbp)
fldt   -0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rintl>:
fldt   0x8(%rsp)
frndint
ret

LLVM IR (-O0):
define x86_fp80 @rintl(x86_fp80 %0) {
%2 = alloca x86_fp80
%3 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%4 = load x86_fp80, x86_fp80* %2
%5 = call x86_fp80 asm "frndint;", "={st},0,~{dirflag},~{fpsr},~{flags}"(x86_fp80 %4)
store x86_fp80 %5, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %3
ret x86_fp80 %6
}

LLVM IR (-O2):
define x86_fp80 @rintl(x86_fp80 %0) {
%2 = tail call x86_fp80 asm "frndint;", "={st},0,~{dirflag},~{fpsr},~{flags}"(x86_fp80 %0)
ret x86_fp80 %2
}
/* Variables and functions */
int japi_isresizable(int);
int j_isresizable(int arg0) { return (japi_isresizable(arg0)); }


x86 assembly (clang, -O0):
<j_isresizable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <japi_isresizable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<j_isresizable>:
jmp    1030 <japi_isresizable@plt>

LLVM IR (-O0):
define i32 @j_isresizable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @japi_isresizable(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @j_isresizable(i32 %0) {
%2 = tail call i32 @japi_isresizable(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ scanf(char *, int *);
int /*<<< orphan*/ stderr;
int gcc_input() {
  int x;
  if (!scanf("%d", &x)) {
    fprintf(stderr, "The input is not an integer\n");
    exit(1);
  }
  return x;
}


x86 assembly (clang, -O0):
<gcc_input>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1040 <scanf@plt>
cmp    $0x0,%eax
jne    1170 <gcc_input+0x40>
mov    0x2e88(%rip),%rax
mov    (%rax),%edi
lea    0xea2(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcc_input>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
test   %eax,%eax
je     114c <gcc_input+0x1c>
mov    0x4(%rsp),%eax
pop    %rcx
ret
mov    0x2e8d(%rip),%rax
mov    (%rax),%edi
lea    0xea7(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@stderr = global i32 0
@.str.1 = [29 x i8] c"The input is not an integer\0A\00"
define i32 @gcc_input() {
%1 = alloca i32
%2 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%3 = icmp ne i32 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %0
%5 = load i32, i32* @stderr
%6 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
%7 = call i32 @exit(i32 1)
unreachable
8: ; preds = %0
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@stderr = global i32 0
@.str.1 = [29 x i8] c"The input is not an integer\0A\00"
define i32 @gcc_input() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %0
%6 = load i32, i32* @stderr
%7 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
%8 = call i32 @exit(i32 1)
unreachable
9: ; preds = %0
%10 = load i32, i32* %1
ret i32 %10
}
void SSIDMADisable(unsigned long ulBase, unsigned long ulDMAFlags) {
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000024))) &= ~ulDMAFlags;
}


x86 assembly (clang, -O0):
<SSIDMADisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
xor    $0xffffffffffffffff,%rdx
mov    -0x8(%rbp),%rax
mov    0x24(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x24(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSIDMADisable>:
not    %rsi
and    %rsi,0x24(%rdi)
ret

LLVM IR (-O0):
define void @SSIDMADisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = xor i64 %5, -1
%7 = load i64, i64* %3
%8 = add i64 %7, 36
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = and i64 %10, %6
store volatile i64 %11, i64* %9
ret void
}

LLVM IR (-O2):
define void @SSIDMADisable(i64 %0, i64 %1) {
%3 = xor i64 %1, -1
%4 = add i64 %0, 36
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, %3
store volatile i64 %7, i64* %5
ret void
}
int test_imm_66uint32_reg(unsigned int val) {
  return ((val) & (0x66 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_66uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x66,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_66uint32_reg>:
test   $0x66,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_66uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 102
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_66uint32_reg(i32 %0) {
%2 = and i32 %0, 102
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int find(char, char *, int /*<<< orphan*/);
int findFirst(char ch, char *s) { return find(ch, s, 0); }


x86 assembly (clang, -O0):
<findFirst>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x1(%rbp),%al
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
movsbl %al,%edi
call   1030 <find@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<findFirst>:
xor    %edx,%edx
jmp    1030 <find@plt>

LLVM IR (-O0):
define i32 @findFirst(i8 signext %0, i8* %1) {
%3 = alloca i8
%4 = alloca i8*
store i8 %0, i8* %3
store i8* %1, i8** %4
%5 = load i8, i8* %3
%6 = load i8*, i8** %4
%7 = call i32 @find(i8 signext %5, i8* %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @findFirst(i8 signext %0, i8* %1) {
%3 = tail call i32 @find(i8 signext %0, i8* %1, i32 0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ _p(int, char *, int /*<<< orphan*/ *);
int errno;
void _p_err(int line, int err) {
  errno = err;
  _p(line, "E", NULL);
}


x86 assembly (clang, -O0):
<_p_err>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    0x2eb8(%rip),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%edi
lea    0xecc(%rip),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <_p@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_p_err>:
mov    0x2ec9(%rip),%rax
mov    %esi,(%rax)
lea    0xee0(%rip),%rsi
xor    %edx,%edx
jmp    1030 <_p@plt>

LLVM IR (-O0):
@errno = global i32 0
@.str = [2 x i8] c"E\00"
define void @_p_err(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
store i32 %5, i32* @errno
%6 = load i32, i32* %3
%7 = call i32 @_p(i32 %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32* null)
ret void
}

LLVM IR (-O2):
@errno = global i32 0
@.str = [2 x i8] c"E\00"
define void @_p_err(i32 %0, i32 %1) {
store i32 %1, i32* @errno
%3 = tail call i32 @_p(i32 %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isgraph(int);
void t_isgraph_0x01() {
  Assert_real((isgraph(1) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              10, ("isgraph should be 0 for 0x01"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x01>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1040 <isgraph@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xa,%edx
lea    0xf5b(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x01>:
push   %rax
mov    $0x1,%edi
call   1040 <isgraph@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0xa,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0x01\00"
define void @t_isgraph_0x01() {
%1 = call i64 @isgraph(i32 1)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 10, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0x01\00"
define void @t_isgraph_0x01() {
%1 = tail call i64 @isgraph(i32 1)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 10, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
float modff(float x, float *y) {
  *y = ((int)x);
  return (x - *y);
}


x86 assembly (clang, -O0):
<modff>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
cvttss2si -0x4(%rbp),%eax
cvtsi2ss %eax,%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x4(%rbp),%xmm0
mov    -0x10(%rbp),%rax
subss  (%rax),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<modff>:
cvttps2dq %xmm0,%xmm1
cvtdq2ps %xmm1,%xmm1
movss  %xmm1,(%rdi)
subss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @modff(float %0, float* %1) {
%3 = alloca float
%4 = alloca float*
store float %0, float* %3
store float* %1, float** %4
%5 = load float, float* %3
%6 = fptosi float %5 to i32
%7 = sitofp i32 %6 to float
%8 = load float*, float** %4
store float %7, float* %8
%9 = load float, float* %3
%10 = load float*, float** %4
%11 = load float, float* %10
%12 = fsub float %9, %11
ret float %12
}

LLVM IR (-O2):
define float @modff(float %0, float* nocapture writeonly %1) {
%3 = fptosi float %0 to i32
%4 = sitofp i32 %3 to float
store float %4, float* %1
%5 = fsub float %0, %4
ret float %5
}
/* Variables and functions */
int /*<<< orphan*/ getchar();
int /*<<< orphan*/ incBy1(int);
int /*<<< orphan*/ printf(char *, ...);
int main() {
  int num = 1;
  printf("main(): num is %d\n", num);
  incBy1(num);
  printf("\nmain(): num is now %d\n", num);
  printf("\n[Press anykey to close]");
  getchar();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeb0(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
mov    -0x8(%rbp),%edi
call   1030 <incBy1@plt>
mov    -0x8(%rbp),%esi
lea    0xeaa(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
lea    0xeb4(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <getchar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
mov    $0x1,%esi
xor    %eax,%eax
call   1040 <printf@plt>
mov    $0x1,%edi
call   1030 <incBy1@plt>
lea    0xebe(%rip),%rdi
mov    $0x1,%esi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xec3(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
xor    %eax,%eax
call   1050 <getchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"main(): num is %d\0A\00"
@.str.1 = [24 x i8] c"\0Amain(): num is now %d\0A\00"
@.str.2 = [25 x i8] c"\0A[Press anykey to close]\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* %2
%6 = call i32 @incBy1(i32 %5)
%7 = load i32, i32* %2
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0), i32 %7)
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0))
%10 = call i32 (...) @getchar()
ret i32 0
}

LLVM IR (-O2):
@.str = [19 x i8] c"main(): num is %d\0A\00"
@.str.1 = [24 x i8] c"\0Amain(): num is now %d\0A\00"
@.str.2 = [25 x i8] c"\0A[Press anykey to close]\00"
define i32 @main() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 1)
%2 = tail call i32 @incBy1(i32 1)
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0), i32 1)
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0))
%5 = tail call i32 (...) @getchar()
ret i32 0
}
/* Variables and functions */
int support_fpu_flag(int);
int support_fpu_trap(int flag) { return support_fpu_flag(flag); }


x86 assembly (clang, -O0):
<support_fpu_trap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <support_fpu_flag@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<support_fpu_trap>:
jmp    1030 <support_fpu_flag@plt>

LLVM IR (-O0):
define i32 @support_fpu_trap(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @support_fpu_flag(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @support_fpu_trap(i32 %0) {
%2 = tail call i32 @support_fpu_flag(i32 %0)
ret i32 %2
}
void _M2_Indexing_finish(__attribute__((unused)) int argc,
                         __attribute__((unused)) char *argv[]) {}


x86 assembly (clang, -O0):
<_M2_Indexing_finish>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_M2_Indexing_finish>:
ret

LLVM IR (-O0):
define void @_M2_Indexing_finish(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret void
}

LLVM IR (-O2):
define void @_M2_Indexing_finish(i32 %0, i8** nocapture %1) {
ret void
}
int test_imm_5Bint16_reg(short val) {
  return ((val) & (0x5B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Bint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x5b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Bint16_reg>:
test   $0x5b,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Bint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 91
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_5Bint16_reg(i16 signext %0) {
%2 = and i16 %0, 91
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
long int limit_int(long int valeur, long int inf, long int sup) {
  if (valeur < inf)
    return inf;
  else if (valeur > sup)
    return sup;
  else
    return valeur;
}


x86 assembly (clang, -O0):
<limit_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jge    112b <limit_int+0x2b>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    114e <limit_int+0x4e>
mov    -0x10(%rbp),%rax
cmp    -0x20(%rbp),%rax
jle    1146 <limit_int+0x46>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    114e <limit_int+0x4e>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<limit_int>:
mov    %rdx,%rax
cmp    %rdx,%rdi
cmovle %rdi,%rax
cmp    %rsi,%rdi
cmovl  %rsi,%rax
ret

LLVM IR (-O0):
define i64 @limit_int(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = icmp slt i64 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load i64, i64* %6
store i64 %12, i64* %4
br label %21
13: ; preds = %3
%14 = load i64, i64* %5
%15 = load i64, i64* %7
%16 = icmp sgt i64 %14, %15
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = load i64, i64* %7
store i64 %18, i64* %4
br label %21
19: ; preds = %13
%20 = load i64, i64* %5
store i64 %20, i64* %4
br label %21
21: ; preds = %19, %17, %11
%22 = load i64, i64* %4
ret i64 %22
}

LLVM IR (-O2):
define i64 @limit_int(i64 %0, i64 %1, i64 %2) {
%4 = icmp slt i64 %0, %1
%5 = icmp sgt i64 %0, %2
%6 = select i1 %5, i64 %2, i64 %0
%7 = select i1 %4, i64 %1, i64 %6
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
main() {
  if (1.17549435e-38F <= 1.1)
    exit(0);
  abort();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @exit(i32 0)
unreachable
}
unsigned long long func(float a) {
  const float dfa = a;
  const unsigned int hi = dfa / 0x1p32f;
  const unsigned int lo = dfa - (float)hi * 0x1p32f;
  return ((unsigned long long)hi << (4 * 8)) | lo;
}


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
movss  0xee0(%rip),%xmm2
divss  %xmm2,%xmm0
cvttss2si %xmm0,%rax
mov    %eax,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
mov    -0xc(%rbp),%eax
cvtsi2ss %rax,%xmm1
mulss  %xmm2,%xmm1
subss  %xmm1,%xmm0
cvttss2si %xmm0,%rax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x20,%rax
mov    -0x10(%rbp),%ecx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
movss  0xef8(%rip),%xmm1
mulss  %xmm0,%xmm1
cvttss2si %xmm1,%rcx
mov    %ecx,%eax
xorps  %xmm1,%xmm1
cvtsi2ss %rax,%xmm1
mulss  0xee1(%rip),%xmm1
addss  %xmm0,%xmm1
cvttss2si %xmm1,%rax
shl    $0x20,%rcx
mov    %eax,%eax
or     %rcx,%rax
ret

LLVM IR (-O0):
define i64 @func(float %0) {
%2 = alloca float
%3 = alloca float
%4 = alloca i32
%5 = alloca i32
store float %0, float* %2
%6 = load float, float* %2
store float %6, float* %3
%7 = load float, float* %3
%8 = fdiv float %7, 0x41F0000000000000
%9 = fptoui float %8 to i32
store i32 %9, i32* %4
%10 = load float, float* %3
%11 = load i32, i32* %4
%12 = uitofp i32 %11 to float
%13 = fneg float %12
%14 = call float @llvm.fmuladd.f32(float %13, float 0x41F0000000000000, float %10)
%15 = fptoui float %14 to i32
store i32 %15, i32* %5
%16 = load i32, i32* %4
%17 = zext i32 %16 to i64
%18 = shl i64 %17, 32
%19 = load i32, i32* %5
%20 = zext i32 %19 to i64
%21 = or i64 %18, %20
ret i64 %21
}

LLVM IR (-O2):
define i64 @func(float %0) {
%2 = fmul float %0, 0x3DF0000000000000
%3 = fptoui float %2 to i32
%4 = uitofp i32 %3 to float
%5 = fneg float %4
%6 = tail call float @llvm.fmuladd.f32(float %5, float 0x41F0000000000000, float %0)
%7 = fptoui float %6 to i32
%8 = zext i32 %3 to i64
%9 = shl nuw i64 %8, 32
%10 = zext i32 %7 to i64
%11 = or i64 %9, %10
ret i64 %11
}
/* Variables and functions */
float fabsf(float);
float dist_Manhattan(float x, float y, float z, float e) {
  (void)e;
  return (fabsf(x) + fabsf(y) + fabsf(z));
}


x86 assembly (clang, -O0):
<dist_Manhattan>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
movaps 0xedc(%rip),%xmm1
pand   %xmm1,%xmm0
movss  -0x8(%rbp),%xmm1
movaps 0xecc(%rip),%xmm2
pand   %xmm2,%xmm1
addss  %xmm1,%xmm0
movss  -0xc(%rbp),%xmm1
movaps 0xeb8(%rip),%xmm2
pand   %xmm2,%xmm1
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dist_Manhattan>:
movaps 0xef9(%rip),%xmm3
andps  %xmm3,%xmm0
andps  %xmm3,%xmm1
addss  %xmm1,%xmm0
andps  %xmm2,%xmm3
addss  %xmm3,%xmm0
ret

LLVM IR (-O0):
define float @dist_Manhattan(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %8
%10 = load float, float* %5
%11 = call float @llvm.fabs.f32(float %10)
%12 = load float, float* %6
%13 = call float @llvm.fabs.f32(float %12)
%14 = fadd float %11, %13
%15 = load float, float* %7
%16 = call float @llvm.fabs.f32(float %15)
%17 = fadd float %14, %16
ret float %17
}

LLVM IR (-O2):
define float @dist_Manhattan(float %0, float %1, float %2, float %3) {
%5 = tail call float @llvm.fabs.f32(float %0)
%6 = tail call float @llvm.fabs.f32(float %1)
%7 = fadd float %5, %6
%8 = tail call float @llvm.fabs.f32(float %2)
%9 = fadd float %7, %8
ret float %9
}
void error_handle() {}


x86 assembly (clang, -O0):
<error_handle>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<error_handle>:
ret

LLVM IR (-O0):
define void @error_handle() {
ret void
}

LLVM IR (-O2):
define void @error_handle() {
ret void
}
void __cyg_profile_func_enter(void *this_fn, void *call_site) {}


x86 assembly (clang, -O0):
<__cyg_profile_func_enter>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__cyg_profile_func_enter>:
ret

LLVM IR (-O0):
define void @__cyg_profile_func_enter(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @__cyg_profile_func_enter(i8* nocapture %0, i8* nocapture %1) {
ret void
}
float func(float x, float y) { return 0.; }


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @func(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
ret float 0.000000e+00
}

LLVM IR (-O2):
define float @func(float %0, float %1) {
ret float 0.000000e+00
}
double e2f(double a1, double a2, double c2) {
  double e2;
  e2 = c2 / ((a1 * a1) + a2);
  return (e2);
}


x86 assembly (clang, -O0):
<e2f>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm3
movsd  -0x10(%rbp),%xmm2
mulsd  %xmm3,%xmm1
addsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<e2f>:
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
divsd  %xmm0,%xmm2
movapd %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @e2f(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%8 = load double, double* %6
%9 = load double, double* %4
%10 = load double, double* %4
%11 = load double, double* %5
%12 = call double @llvm.fmuladd.f64(double %9, double %10, double %11)
%13 = fdiv double %8, %12
store double %13, double* %7
%14 = load double, double* %7
ret double %14
}

LLVM IR (-O2):
define double @e2f(double %0, double %1, double %2) {
%4 = tail call double @llvm.fmuladd.f64(double %0, double %0, double %1)
%5 = fdiv double %2, %4
ret double %5
}
void *offset_to_ptr(const int *off) {
  return (void *)((unsigned long)off + *off);
}


x86 assembly (clang, -O0):
<offset_to_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
movslq (%rcx),%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<offset_to_ptr>:
movslq (%rdi),%rax
add    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @offset_to_ptr(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = ptrtoint i32* %3 to i64
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
%7 = sext i32 %6 to i64
%8 = add i64 %4, %7
%9 = inttoptr i64 %8 to i8*
ret i8* %9
}

LLVM IR (-O2):
define i8* @offset_to_ptr(i32* %0) {
%2 = ptrtoint i32* %0 to i64
%3 = load i32, i32* %0
%4 = sext i32 %3 to i64
%5 = add i64 %4, %2
%6 = inttoptr i64 %5 to i8*
ret i8* %6
}
/* Type definitions */
struct hashEl {
  int dummy;
};
struct hash {
  int dummy;
};

/* Variables and functions */
struct hashEl *hashAddN(struct hash *, char *, int /*<<< orphan*/, void *);
int /*<<< orphan*/ strlen(char *);
struct hashEl *hashAdd(struct hash *hash, char *name, void *val) {
  return hashAddN(hash, name, strlen(name), val);
}


x86 assembly (clang, -O0):
<hashAdd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x28(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    %eax,%edx
mov    -0x18(%rbp),%rcx
call   1040 <hashAddN@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashAdd>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %rdi,%r15
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %r15,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
mov    %r14,%rcx
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <hashAddN@plt>

LLVM IR (-O0):
%struct.hashEl = type { i32 }
%struct.hash = type { i32 }
define %struct.hashEl* @hashAdd(%struct.hash* %0, i8* %1, i8* %2) {
%4 = alloca %struct.hash*
%5 = alloca i8*
%6 = alloca i8*
store %struct.hash* %0, %struct.hash** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load %struct.hash*, %struct.hash** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %5
%10 = call i32 @strlen(i8* %9)
%11 = load i8*, i8** %6
%12 = call %struct.hashEl* @hashAddN(%struct.hash* %7, i8* %8, i32 %10, i8* %11)
ret %struct.hashEl* %12
}

LLVM IR (-O2):
%struct.hashEl = type { i32 }
%struct.hash = type { i32 }
define %struct.hashEl* @hashAdd(%struct.hash* %0, i8* %1, i8* %2) {
%4 = tail call i32 @strlen(i8* %1)
%5 = tail call %struct.hashEl* @hashAddN(%struct.hash* %0, i8* %1, i32 %4, i8* %2)
ret %struct.hashEl* %5
}
/* Variables and functions */
int /*<<< orphan*/ glutBitmap8By13;
unsigned glob_glutBitmap8By13(void) { return (unsigned)&glutBitmap8By13; }


x86 assembly (clang, -O0):
<glob_glutBitmap8By13>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<glob_glutBitmap8By13>:
mov    0x2ed2(%rip),%eax
ret

LLVM IR (-O0):
@glutBitmap8By13 = global i32 0
define i32 @glob_glutBitmap8By13() {
ret i32 ptrtoint (i32* @glutBitmap8By13 to i32)
}

LLVM IR (-O2):
@glutBitmap8By13 = global i32 0
define i32 @glob_glutBitmap8By13() {
ret i32 ptrtoint (i32* @glutBitmap8By13 to i32)
}
int WinShortToLongPath(char *shortPath, char *longPath, int maxPath) {
  return -1;
}


x86 assembly (clang, -O0):
<WinShortToLongPath>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<WinShortToLongPath>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @WinShortToLongPath(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 -1
}

LLVM IR (-O2):
define i32 @WinShortToLongPath(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
ret i32 -1
}
void BN_print(void) {}


x86 assembly (clang, -O0):
<BN_print>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_print>:
ret

LLVM IR (-O0):
define void @BN_print() {
ret void
}

LLVM IR (-O2):
define void @BN_print() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
char *smprintf(char *, char *);
char *usedram();
int main(int argc, char *argv[]) {
  char *mem;
  mem = usedram();
  char *status = smprintf("%s", mem);
  printf("%s\n", status);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <usedram@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
lea    0xea4(%rip),%rdi
call   1030 <smprintf@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rsi
lea    0xe93(%rip),%rdi
call   1050 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <usedram@plt>
lea    0xec1(%rip),%rdi
mov    %rax,%rsi
call   1030 <smprintf@plt>
lea    0xeb5(%rip),%rdi
mov    %rax,%rsi
call   1050 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
%7 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = call i8* (...) @usedram()
store i8* %8, i8** %6
%9 = load i8*, i8** %6
%10 = call i8* @smprintf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %9)
store i8* %10, i8** %7
%11 = load i8*, i8** %7
%12 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i8* (...) @usedram()
%4 = tail call i8* @smprintf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 0
}
int test_imm_ABuint32_reg(unsigned int val) {
  return ((val) & (0xAB << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_ABuint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xab,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_ABuint32_reg>:
test   $0xab,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_ABuint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 171
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_ABuint32_reg(i32 %0) {
%2 = and i32 %0, 171
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(char *, char *);
int isEndOrStop(char *buf) {
  return (!strcmp(buf, "end") || !strcmp(buf, "stop"));
}


x86 assembly (clang, -O0):
<isEndOrStop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
mov    %eax,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
je     1157 <isEndOrStop+0x47>
mov    -0x8(%rbp),%rdi
lea    0xebd(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isEndOrStop>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <strcmp@plt>
test   %eax,%eax
je     113e <isEndOrStop+0x2e>
lea    0xed9(%rip),%rsi
mov    %rbx,%rdi
call   1030 <strcmp@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
sete   %al
pop    %rbx
ret
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"end\00"
@.str.1 = [5 x i8] c"stop\00"
define i32 @isEndOrStop(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strcmp(i8* %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i32 @strcmp(i8* %7, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
br label %11
11: ; preds = %6, %1
%12 = phi i1 [ true, %1 ], [ %10, %6 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
@.str = [4 x i8] c"end\00"
@.str.1 = [5 x i8] c"stop\00"
define i32 @isEndOrStop(i8* nocapture %0) {
%2 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(4) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(5) getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ dvbc_connect(int);
int /*<<< orphan*/ prepare_streamer_data();
void setupConnect(int adaptornum) {
  prepare_streamer_data();
  dvbc_connect(adaptornum);
}


x86 assembly (clang, -O0):
<setupConnect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <prepare_streamer_data@plt>
mov    -0x4(%rbp),%edi
call   1040 <dvbc_connect@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setupConnect>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <prepare_streamer_data@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <dvbc_connect@plt>

LLVM IR (-O0):
define void @setupConnect(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @prepare_streamer_data()
%4 = load i32, i32* %2
%5 = call i32 @dvbc_connect(i32 %4)
ret void
}

LLVM IR (-O2):
define void @setupConnect(i32 %0) {
%2 = tail call i32 (...) @prepare_streamer_data()
%3 = tail call i32 @dvbc_connect(i32 %0)
ret void
}
/* Variables and functions */
unsigned int exynos_5410_gpio_read(unsigned int);
int /*<<< orphan*/ exynos_5410_gpio_write_mask(unsigned int, unsigned int,
                                               unsigned int);
int /*<<< orphan*/ odroid_xu_pin_lookup(unsigned int, unsigned int *,
                                        unsigned int *);
void odroid_xu_gpio_toggle(unsigned int pin_index) {
  unsigned int bank_offset, bit_index;
  odroid_xu_pin_lookup(pin_index, &bank_offset, &bit_index);
  unsigned int d = exynos_5410_gpio_read(bank_offset);
  d ^= (1U << bit_index);
  exynos_5410_gpio_write_mask(bank_offset, d, (1U << bit_index));
}


x86 assembly (clang, -O0):
<odroid_xu_gpio_toggle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1030 <odroid_xu_pin_lookup@plt>
mov    -0x8(%rbp),%edi
call   1050 <exynos_5410_gpio_read@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%esi
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
call   1040 <exynos_5410_gpio_write_mask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<odroid_xu_gpio_toggle>:
push   %rax
mov    %rsp,%rsi
lea    0x4(%rsp),%rdx
call   1030 <odroid_xu_pin_lookup@plt>
mov    (%rsp),%edi
call   1050 <exynos_5410_gpio_read@plt>
mov    0x4(%rsp),%cl
mov    $0x1,%edx
shl    %cl,%edx
btc    %ecx,%eax
mov    (%rsp),%edi
mov    %eax,%esi
call   1040 <exynos_5410_gpio_write_mask@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @odroid_xu_gpio_toggle(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = call i32 @odroid_xu_pin_lookup(i32 %6, i32* %3, i32* %4)
%8 = load i32, i32* %3
%9 = call i32 @exynos_5410_gpio_read(i32 %8)
store i32 %9, i32* %5
%10 = load i32, i32* %4
%11 = shl i32 1, %10
%12 = load i32, i32* %5
%13 = xor i32 %12, %11
store i32 %13, i32* %5
%14 = load i32, i32* %3
%15 = load i32, i32* %5
%16 = load i32, i32* %4
%17 = shl i32 1, %16
%18 = call i32 @exynos_5410_gpio_write_mask(i32 %14, i32 %15, i32 %17)
ret void
}

LLVM IR (-O2):
define void @odroid_xu_gpio_toggle(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = bitcast i32* %2 to i8*
%5 = bitcast i32* %3 to i8*
%6 = call i32 @odroid_xu_pin_lookup(i32 %0, i32* %2, i32* %3)
%7 = load i32, i32* %2
%8 = call i32 @exynos_5410_gpio_read(i32 %7)
%9 = load i32, i32* %3
%10 = shl nuw i32 1, %9
%11 = xor i32 %10, %8
%12 = load i32, i32* %2
%13 = call i32 @exynos_5410_gpio_write_mask(i32 %12, i32 %11, i32 %10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
int main(void) {
  char c;
  c = 'h';
  printf("c =[%c]\n", c);
  c = '\0';
  printf("c =[%c]\n", c);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movb   $0x68,-0x5(%rbp)
lea    0xed6(%rip),%rdi
movsbl -0x5(%rbp),%esi
call   1030 <printf@plt>
movb   $0x0,-0x5(%rbp)
lea    0xec2(%rip),%rdi
movsbl -0x5(%rbp),%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0x68,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"c =[%c]\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
store i8 104, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8 signext %3)
store i8 0, i8* %2
%5 = load i8, i8* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8 signext %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"c =[%c]\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8 signext 104)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8 signext 0)
ret i32 0
}