xunge/DecIR huggingface dataset:
/* Type definitions */
struct dirent {
  int /*<<< orphan*/ d_name;
};
typedef int /*<<< orphan*/ DIR;

/* Variables and functions */
int /*<<< orphan*/ inspect_bus_entry(int /*<<< orphan*/);
struct dirent *readdir(int /*<<< orphan*/ *);
void walk_usb_devices(DIR *sbud) {
  struct dirent *de;
  while ((de = readdir(sbud)))
    inspect_bus_entry(de->d_name);
}


x86 assembly (clang, -O0):
<walk_usb_devices>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <readdir@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
je     1153 <walk_usb_devices+0x33>
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
call   1040 <inspect_bus_entry@plt>
jmp    112c <walk_usb_devices+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<walk_usb_devices>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
call   1030 <readdir@plt>
test   %rax,%rax
je     1146 <walk_usb_devices+0x26>
mov    (%rax),%edi
call   1040 <inspect_bus_entry@plt>
mov    %rbx,%rdi
jmp    1130 <walk_usb_devices+0x10>
pop    %rbx
ret

LLVM IR (-O0):
%struct.dirent = type { i32 }
define void @walk_usb_devices(i32* %0) {
%2 = alloca i32*
%3 = alloca %struct.dirent*
store i32* %0, i32** %2
br label %4
4: ; preds = %8, %1
%5 = load i32*, i32** %2
%6 = call %struct.dirent* @readdir(i32* %5)
store %struct.dirent* %6, %struct.dirent** %3
%7 = icmp ne %struct.dirent* %6, null
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = load %struct.dirent*, %struct.dirent** %3
%10 = getelementptr inbounds %struct.dirent, %struct.dirent* %9, i32 0, i32 0
%11 = load i32, i32* %10
%12 = call i32 @inspect_bus_entry(i32 %11)
br label %4
13: ; preds = %4
ret void
}

LLVM IR (-O2):
%struct.dirent = type { i32 }
define void @walk_usb_devices(i32* %0) {
%2 = tail call %struct.dirent* @readdir(i32* %0)
%3 = icmp eq %struct.dirent* %2, null
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi %struct.dirent* [ %9, %4 ], [ %2, %1 ]
%6 = getelementptr inbounds %struct.dirent, %struct.dirent* %5, i64 0, i32 0
%7 = load i32, i32* %6
%8 = tail call i32 @inspect_bus_entry(i32 %7)
%9 = tail call %struct.dirent* @readdir(i32* %0)
%10 = icmp eq %struct.dirent* %9, null
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
void ff_hevc_put_hevc_bi_w_qpel_hv8_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_qpel_hv8_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_qpel_hv8_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_qpel_hv8_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_qpel_hv8_12_sse4() {
ret void
}
void ASN1_i2d_fp(void) {}


x86 assembly (clang, -O0):
<ASN1_i2d_fp>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_i2d_fp>:
ret

LLVM IR (-O0):
define void @ASN1_i2d_fp() {
ret void
}

LLVM IR (-O2):
define void @ASN1_i2d_fp() {
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t smpte_hbrmt_get_map(const uint8_t *p_hbrmt) { return p_hbrmt[4] >> 4; }


x86 assembly (clang, -O0):
<smpte_hbrmt_get_map>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%eax
sar    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<smpte_hbrmt_get_map>:
mov    0x10(%rdi),%eax
sar    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @smpte_hbrmt_get_map(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 4
ret i32 %6
}

LLVM IR (-O2):
define i32 @smpte_hbrmt_get_map(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 4
%3 = load i32, i32* %2
%4 = ashr i32 %3, 4
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ DrawTextw140(char const *);
void drawtextw(const char *s) { DrawTextw140(s); }


x86 assembly (clang, -O0):
<drawtextw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <DrawTextw140@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawtextw>:
jmp    1030 <DrawTextw140@plt>

LLVM IR (-O0):
define void @drawtextw(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @DrawTextw140(i8* %3)
ret void
}

LLVM IR (-O2):
define void @drawtextw(i8* %0) {
%2 = tail call i32 @DrawTextw140(i8* %0)
ret void
}
int to_sudoku_box(const int row, const int col) {
  return (row / 3 * 3) + (col / 3);
}


x86 assembly (clang, -O0):
<to_sudoku_box>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
imul   $0x3,%eax,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<to_sudoku_box>:
movslq %edi,%rax
imul   $0x55555556,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
shr    $0x20,%rax
add    %ecx,%eax
lea    (%rax,%rax,2),%ecx
movslq %esi,%rax
imul   $0x55555556,%rax,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rax
add    %edx,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @to_sudoku_box(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = sdiv i32 %5, 3
%7 = mul nsw i32 %6, 3
%8 = load i32, i32* %4
%9 = sdiv i32 %8, 3
%10 = add nsw i32 %7, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @to_sudoku_box(i32 %0, i32 %1) {
%3 = srem i32 %0, 3
%4 = sub i32 %0, %3
%5 = sdiv i32 %1, 3
%6 = add nsw i32 %4, %5
ret i32 %6
}
/* Type definitions */
struct battle_char {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ add_status(struct battle_char *, int);
scalar_t__ get_random(int /*<<< orphan*/, int);
scalar_t__ mod6(struct battle_char *, struct battle_char *, int);
void petrify(struct battle_char *origin, struct battle_char *target) {
  if (get_random(0, 100) < mod6(origin, target, 120)) {
    add_status(target, 9);
  }
}


x86 assembly (clang, -O0):
<petrify>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
mov    $0x64,%esi
call   1030 <get_random@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x78,%edx
call   1040 <mod6@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
jge    1180 <petrify+0x50>
mov    -0x10(%rbp),%rdi
mov    $0x9,%esi
call   1050 <add_status@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<petrify>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
xor    %edi,%edi
mov    $0x64,%esi
call   1030 <get_random@plt>
mov    %rax,%rbx
mov    %r15,%rdi
mov    %r14,%rsi
mov    $0x78,%edx
call   1040 <mod6@plt>
cmp    %rax,%rbx
jge    1171 <petrify+0x41>
mov    %r14,%rdi
mov    $0x9,%esi
pop    %rbx
pop    %r14
pop    %r15
jmp    1050 <add_status@plt>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.battle_char = type { i32 }
define void @petrify(%struct.battle_char* %0, %struct.battle_char* %1) {
%3 = alloca %struct.battle_char*
%4 = alloca %struct.battle_char*
store %struct.battle_char* %0, %struct.battle_char** %3
store %struct.battle_char* %1, %struct.battle_char** %4
%5 = call i64 @get_random(i32 0, i32 100)
%6 = load %struct.battle_char*, %struct.battle_char** %3
%7 = load %struct.battle_char*, %struct.battle_char** %4
%8 = call i64 @mod6(%struct.battle_char* %6, %struct.battle_char* %7, i32 120)
%9 = icmp slt i64 %5, %8
br i1 %9, label %10, label %13
10: ; preds = %2
%11 = load %struct.battle_char*, %struct.battle_char** %4
%12 = call i32 @add_status(%struct.battle_char* %11, i32 9)
br label %13
13: ; preds = %10, %2
ret void
}

LLVM IR (-O2):
%struct.battle_char = type { i32 }
define void @petrify(%struct.battle_char* %0, %struct.battle_char* %1) {
%3 = tail call i64 @get_random(i32 0, i32 100)
%4 = tail call i64 @mod6(%struct.battle_char* %0, %struct.battle_char* %1, i32 120)
%5 = icmp slt i64 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @add_status(%struct.battle_char* %1, i32 9)
br label %8
8: ; preds = %6, %2
ret void
}
/* Variables and functions */
int O_CREAT;
int O_TRUNC;
int O_WRONLY;
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ die(char *, char const *);
int open(char const *, int, int);
void touch_file(const char *file) {
  int fd;
  fd = open(file, O_WRONLY | O_CREAT | O_TRUNC, 0644);
  if (fd < 0)
    die("could not create file %s\n", file);
  close(fd);
}


x86 assembly (clang, -O0):
<touch_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e81(%rip),%rax
mov    (%rax),%esi
mov    0x2ea8(%rip),%rax
or     (%rax),%esi
mov    0x2e97(%rip),%rax
or     (%rax),%esi
mov    $0x1a4,%edx
call   1040 <open@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    1182 <touch_file+0x52>
mov    -0x8(%rbp),%rsi
lea    0xe83(%rip),%rdi
call   1050 <die@plt>
mov    -0xc(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<touch_file>:
push   %rbp
push   %rbx
push   %rax
mov    0x2e8e(%rip),%rax
mov    0x2eb7(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
mov    %rdi,%rbx
mov    0x2ea1(%rip),%rax
or     (%rax),%esi
mov    $0x1a4,%edx
call   1040 <open@plt>
mov    %eax,%ebp
test   %eax,%eax
jns    1170 <touch_file+0x40>
lea    0xe98(%rip),%rdi
mov    %rbx,%rsi
call   1050 <die@plt>
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <close@plt>

LLVM IR (-O0):
@O_WRONLY = global i32 0
@O_CREAT = global i32 0
@O_TRUNC = global i32 0
@.str = [26 x i8] c"could not create file %s\0A\00"
define void @touch_file(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = load i32, i32* @O_WRONLY
%6 = load i32, i32* @O_CREAT
%7 = or i32 %5, %6
%8 = load i32, i32* @O_TRUNC
%9 = or i32 %7, %8
%10 = call i32 @open(i8* %4, i32 %9, i32 420)
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %1
%14 = load i8*, i8** %2
%15 = call i32 @die(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i8* %14)
br label %16
16: ; preds = %13, %1
%17 = load i32, i32* %3
%18 = call i32 @close(i32 %17)
ret void
}

LLVM IR (-O2):
@O_WRONLY = global i32 0
@O_CREAT = global i32 0
@O_TRUNC = global i32 0
@.str = [26 x i8] c"could not create file %s\0A\00"
define void @touch_file(i8* %0) {
%2 = load i32, i32* @O_WRONLY
%3 = load i32, i32* @O_CREAT
%4 = or i32 %3, %2
%5 = load i32, i32* @O_TRUNC
%6 = or i32 %4, %5
%7 = tail call i32 @open(i8* %0, i32 %6, i32 420)
%8 = icmp slt i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = tail call i32 @die(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %11
11: ; preds = %9, %1
%12 = tail call i32 @close(i32 %7)
ret void
}
/* Type definitions */
struct pattern {
  int dummy;
};

/* Variables and functions */
int offset(int, int, int, int);
int play_attack_defend_n(int, int, int, int, int, int);
int autohelperowl_vital_apat17(struct pattern *patt, int transformation,
                               int move, int color, int action) {
  int a;
  (void)patt;
  (void)color;
  (void)action;
  a = offset(-1, 1, move, transformation);
  return play_attack_defend_n(color, 1, 2, move, a, a);
}


x86 assembly (clang, -O0):
<autohelperowl_vital_apat17>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x10(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    $0xffffffff,%edi
mov    $0x1,%esi
call   1040 <offset@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%ecx
mov    -0x1c(%rbp),%r8d
mov    -0x1c(%rbp),%r9d
mov    $0x1,%esi
mov    $0x2,%edx
call   1030 <play_attack_defend_n@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<autohelperowl_vital_apat17>:
push   %rbp
push   %rbx
push   %rax
mov    %ecx,%ebx
mov    %edx,%ebp
mov    %esi,%ecx
mov    $0xffffffff,%edi
mov    $0x1,%esi
call   1040 <offset@plt>
mov    %ebx,%edi
mov    $0x1,%esi
mov    $0x2,%edx
mov    %ebp,%ecx
mov    %eax,%r8d
mov    %eax,%r9d
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <play_attack_defend_n@plt>

LLVM IR (-O0):
%struct.pattern = type { i32 }
define i32 @autohelperowl_vital_apat17(%struct.pattern* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca %struct.pattern*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store %struct.pattern* %0, %struct.pattern** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%12 = load %struct.pattern*, %struct.pattern** %6
%13 = load i32, i32* %9
%14 = load i32, i32* %10
%15 = load i32, i32* %8
%16 = load i32, i32* %7
%17 = call i32 @offset(i32 -1, i32 1, i32 %15, i32 %16)
store i32 %17, i32* %11
%18 = load i32, i32* %9
%19 = load i32, i32* %8
%20 = load i32, i32* %11
%21 = load i32, i32* %11
%22 = call i32 @play_attack_defend_n(i32 %18, i32 1, i32 2, i32 %19, i32 %20, i32 %21)
ret i32 %22
}

LLVM IR (-O2):
%struct.pattern = type { i32 }
define i32 @autohelperowl_vital_apat17(%struct.pattern* nocapture readnone %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @offset(i32 -1, i32 1, i32 %2, i32 %1)
%7 = tail call i32 @play_attack_defend_n(i32 %3, i32 1, i32 2, i32 %2, i32 %6, i32 %6)
ret i32 %7
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ capture_event(void *, int, int /*<<< orphan*/,
                                 int /*<<< orphan*/);
uint8_t capture_read_codec(uint16_t port, void *p) {
  capture_event(p, (1 << 8), 0, port);
  return 0xff;
}


x86 assembly (clang, -O0):
<capture_read_codec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%ecx
mov    $0x100,%esi
xor    %edx,%edx
call   1030 <capture_event@plt>
mov    $0xff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<capture_read_codec>:
push   %rax
mov    %edi,%ecx
mov    %rsi,%rdi
mov    $0x100,%esi
xor    %edx,%edx
call   1030 <capture_event@plt>
mov    $0xff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @capture_read_codec(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i32, i32* %3
%7 = call i32 @capture_event(i8* %5, i32 256, i32 0, i32 %6)
ret i32 255
}

LLVM IR (-O2):
define i32 @capture_read_codec(i32 %0, i8* %1) {
%3 = tail call i32 @capture_event(i8* %1, i32 256, i32 0, i32 %0)
ret i32 255
}
int pil_boot(struct pil_desc *desc) { return 0; }


x86 assembly (clang, -O0):
<pil_boot>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pil_boot>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.pil_desc = type opaque
define i32 @pil_boot(%struct.pil_desc* %0) {
%2 = alloca %struct.pil_desc*
store %struct.pil_desc* %0, %struct.pil_desc** %2
ret i32 0
}

LLVM IR (-O2):
%struct.pil_desc = type opaque
define i32 @pil_boot(%struct.pil_desc* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assert_fail(char const *, int, char *, double);
double fabs(double);
void assert_dbl_not_equal_(const char *file, int line, double ex, double ac,
                           double dt) {
  if (fabs(ex - ac) <= dt) {
    assert_fail(file, line, "Expected not <%g> but was", ex);
  }
}


x86 assembly (clang, -O0):
<assert_dbl_not_equal_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movsd  %xmm0,-0x18(%rbp)
movsd  %xmm1,-0x20(%rbp)
movsd  %xmm2,-0x28(%rbp)
movsd  -0x18(%rbp),%xmm1
subsd  -0x20(%rbp),%xmm1
movaps 0xec1(%rip),%xmm0
pand   %xmm0,%xmm1
movsd  -0x28(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jb     116a <assert_dbl_not_equal_+0x5a>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
movsd  -0x18(%rbp),%xmm0
lea    0xeab(%rip),%rdx
call   1030 <assert_fail@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assert_dbl_not_equal_>:
movapd %xmm0,%xmm3
subsd  %xmm1,%xmm3
andpd  0xee0(%rip),%xmm3
ucomisd %xmm3,%xmm2
jae    1127 <assert_dbl_not_equal_+0x17>
ret
lea    0xee2(%rip),%rdx
jmp    1030 <assert_fail@plt>

LLVM IR (-O0):
@.str = [26 x i8] c"Expected not <%g> but was\00"
define void @assert_dbl_not_equal_(i8* %0, i32 %1, double %2, double %3, double %4) {
%6 = alloca i8*
%7 = alloca i32
%8 = alloca double
%9 = alloca double
%10 = alloca double
store i8* %0, i8** %6
store i32 %1, i32* %7
store double %2, double* %8
store double %3, double* %9
store double %4, double* %10
%11 = load double, double* %8
%12 = load double, double* %9
%13 = fsub double %11, %12
%14 = call double @llvm.fabs.f64(double %13)
%15 = load double, double* %10
%16 = fcmp ole double %14, %15
br i1 %16, label %17, label %22
17: ; preds = %5
%18 = load i8*, i8** %6
%19 = load i32, i32* %7
%20 = load double, double* %8
%21 = call i32 @assert_fail(i8* %18, i32 %19, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), double %20)
br label %22
22: ; preds = %17, %5
ret void
}

LLVM IR (-O2):
@.str = [26 x i8] c"Expected not <%g> but was\00"
define void @assert_dbl_not_equal_(i8* %0, i32 %1, double %2, double %3, double %4) {
%6 = fsub double %2, %3
%7 = tail call double @llvm.fabs.f64(double %6)
%8 = fcmp ugt double %7, %4
br i1 %8, label %11, label %9
9: ; preds = %5
%10 = tail call i32 @assert_fail(i8* %0, i32 %1, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), double %2)
br label %11
11: ; preds = %9, %5
ret void
}
int isascii(int c) { return ((c) >= 0) && ((c) <= 126); }


x86 assembly (clang, -O0):
<isascii>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <isascii+0x20>
cmpl   $0x7e,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isascii>:
xor    %eax,%eax
cmp    $0x7f,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isascii(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 126
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isascii(i32 %0) {
%2 = icmp ult i32 %0, 127
%3 = zext i1 %2 to i32
ret i32 %3
}
int compare_double(const void *a, const void *b) {
  return *(double *)a - *(double *)b;
}


x86 assembly (clang, -O0):
<compare_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rax
subsd  (%rax),%xmm0
cvttsd2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_double>:
movsd  (%rdi),%xmm0
subsd  (%rsi),%xmm0
cvttsd2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @compare_double(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to double*
%7 = load double, double* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to double*
%10 = load double, double* %9
%11 = fsub double %7, %10
%12 = fptosi double %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @compare_double(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to double*
%4 = load double, double* %3
%5 = bitcast i8* %1 to double*
%6 = load double, double* %5
%7 = fsub double %4, %6
%8 = fptosi double %7 to i32
ret i32 %8
}
/* Variables and functions */
int input_device_ack();
int nmi_device_ack();
int output_device_ack();
int cpu_irq_ack(int level) {
  switch (level) {
  case 7:
    return nmi_device_ack();
  case 2:
    return input_device_ack();
  case 1:
    return output_device_ack();
  }
  return 0xfffffffe;
}


x86 assembly (clang, -O0):
<cpu_irq_ack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x1,%eax
je     118f <cpu_irq_ack+0x5f>
jmp    114f <cpu_irq_ack+0x1f>
mov    -0xc(%rbp),%eax
sub    $0x2,%eax
je     1180 <cpu_irq_ack+0x50>
jmp    1160 <cpu_irq_ack+0x30>
mov    -0xc(%rbp),%eax
sub    $0x7,%eax
jne    119e <cpu_irq_ack+0x6e>
jmp    1171 <cpu_irq_ack+0x41>
mov    $0x0,%al
call   1050 <nmi_device_ack@plt>
mov    %eax,-0x4(%rbp)
jmp    11a5 <cpu_irq_ack+0x75>
mov    $0x0,%al
call   1030 <input_device_ack@plt>
mov    %eax,-0x4(%rbp)
jmp    11a5 <cpu_irq_ack+0x75>
mov    $0x0,%al
call   1040 <output_device_ack@plt>
mov    %eax,-0x4(%rbp)
jmp    11a5 <cpu_irq_ack+0x75>
movl   $0xfffffffe,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_irq_ack>:
cmp    $0x1,%edi
je     1146 <cpu_irq_ack+0x16>
cmp    $0x2,%edi
je     114d <cpu_irq_ack+0x1d>
cmp    $0x7,%edi
jne    1154 <cpu_irq_ack+0x24>
xor    %eax,%eax
jmp    1050 <nmi_device_ack@plt>
xor    %eax,%eax
jmp    1040 <output_device_ack@plt>
xor    %eax,%eax
jmp    1030 <input_device_ack@plt>
mov    $0xfffffffe,%eax
ret

LLVM IR (-O0):
define i32 @cpu_irq_ack(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %11 [
i32 7, label %5
i32 2, label %7
i32 1, label %9
]
5: ; preds = %1
%6 = call i32 (...) @nmi_device_ack()
store i32 %6, i32* %2
br label %12
7: ; preds = %1
%8 = call i32 (...) @input_device_ack()
store i32 %8, i32* %2
br label %12
9: ; preds = %1
%10 = call i32 (...) @output_device_ack()
store i32 %10, i32* %2
br label %12
11: ; preds = %1
store i32 -2, i32* %2
br label %12
12: ; preds = %11, %9, %7, %5
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @cpu_irq_ack(i32 %0) {
switch i32 %0, label %8 [
i32 7, label %2
i32 2, label %4
i32 1, label %6
]
2: ; preds = %1
%3 = tail call i32 (...) @nmi_device_ack()
br label %8
4: ; preds = %1
%5 = tail call i32 (...) @input_device_ack()
br label %8
6: ; preds = %1
%7 = tail call i32 (...) @output_device_ack()
br label %8
8: ; preds = %1, %6, %4, %2
%9 = phi i32 [ %7, %6 ], [ %5, %4 ], [ %3, %2 ], [ -2, %1 ]
ret i32 %9
}
int _fstat(int f, struct stat *s) { return 0; }


x86 assembly (clang, -O0):
<_fstat>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fstat>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.stat = type opaque
define i32 @_fstat(i32 %0, %struct.stat* %1) {
%3 = alloca i32
%4 = alloca %struct.stat*
store i32 %0, i32* %3
store %struct.stat* %1, %struct.stat** %4
ret i32 0
}

LLVM IR (-O2):
%struct.stat = type opaque
define i32 @_fstat(i32 %0, %struct.stat* nocapture readnone %1) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ value;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, unsigned char const *, int);
uint32_t unpackValueUint32(unsigned char const **data) {
  uint32_t value;
  memcpy(&value, *data, sizeof(value));
  assert(sizeof(value) == 4);
  *data += sizeof(value);
  return value;
}


x86 assembly (clang, -O0):
<unpackValueUint32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rsi
lea    -0xc(%rbp),%rdi
mov    $0x4,%edx
call   1040 <memcpy@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x4,%rcx
mov    %rcx,(%rax)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unpackValueUint32>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    (%rdi),%rsi
lea    0xc(%rsp),%rdi
mov    $0x4,%edx
call   1040 <memcpy@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
addq   $0x4,(%rbx)
mov    0xc(%rsp),%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @unpackValueUint32(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
%6 = call i32 @memcpy(i32* %3, i8* %5, i32 4)
%7 = call i32 @assert(i32 1)
%8 = load i8**, i8*** %2
%9 = load i8*, i8** %8
%10 = getelementptr inbounds i8, i8* %9, i64 4
store i8* %10, i8** %8
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @unpackValueUint32(i8** nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = load i8*, i8** %0
%5 = call i32 @memcpy(i32* %2, i8* %4, i32 4)
%6 = call i32 @assert(i32 1)
%7 = load i8*, i8** %0
%8 = getelementptr inbounds i8, i8* %7, i64 4
store i8* %8, i8** %0
%9 = load i32, i32* %2
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("This is a test code for uploading and downloading\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [51 x i8] c"This is a test code for uploading and downloading\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [50 x i8] c"This is a test code for uploading and downloading\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([50 x i8], [50 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ func(char *, char *);
void stricmp_less() {
  Assert_real((func("EQUAL", "equam") < 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/string/stricmp.c",
              27, ("Should be < 0"));
}


x86 assembly (clang, -O0):
<stricmp_less>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xed4(%rip),%rsi
call   1030 <func@plt>
cmp    $0x0,%rax
setl   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec2(%rip),%rsi
mov    $0x1b,%edx
lea    0xf5a(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<stricmp_less>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xed7(%rip),%rsi
call   1030 <func@plt>
shr    $0x3f,%rax
lea    0xecd(%rip),%rsi
lea    0xf6a(%rip),%rcx
mov    %eax,%edi
mov    $0x1b,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"EQUAL\00"
@.str.1 = [6 x i8] c"equam\00"
@.str.2 = [164 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/string/stricmp.c\00"
@.str.3 = [14 x i8] c"Should be < 0\00"
define void @stricmp_less() {
%1 = call i64 @func(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%2 = icmp slt i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([164 x i8], [164 x i8]* @.str.2, i64 0, i64 0), i32 27, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"EQUAL\00"
@.str.1 = [6 x i8] c"equam\00"
@.str.2 = [164 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/string/stricmp.c\00"
@.str.3 = [14 x i8] c"Should be < 0\00"
define void @stricmp_less() {
%1 = tail call i64 @func(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%2 = lshr i64 %1, 63
%3 = trunc i64 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([164 x i8], [164 x i8]* @.str.2, i64 0, i64 0), i32 27, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.3, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int divide(int a, int b) {
  if (b == 0) {
    fprintf(stderr, "Bad value, Second value can't be 0\n");
    return b;
  }
  return a / b;
}


x86 assembly (clang, -O0):
<divide>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1148 <divide+0x38>
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
lea    0xec8(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1152 <divide+0x42>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<divide>:
test   %esi,%esi
je     111a <divide+0xa>
mov    %edi,%eax
cltd
idiv   %esi
ret
push   %rax
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
lea    0xed5(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [36 x i8] c"Bad value, Second value can't be 0\0A\00"
define i32 @divide(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%11 = load i32, i32* %5
store i32 %11, i32* %3
br label %16
12: ; preds = %2
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = sdiv i32 %13, %14
store i32 %15, i32* %3
br label %16
16: ; preds = %12, %8
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [36 x i8] c"Bad value, Second value can't be 0\0A\00"
define i32 @divide(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
br label %9
7: ; preds = %2
%8 = sdiv i32 %0, %1
br label %9
9: ; preds = %7, %4
%10 = phi i32 [ 0, %4 ], [ %8, %7 ]
ret i32 %10
}
void XQueryTree() {}


x86 assembly (clang, -O0):
<XQueryTree>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XQueryTree>:
ret

LLVM IR (-O0):
define void @XQueryTree() {
ret void
}

LLVM IR (-O2):
define void @XQueryTree() {
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
uint16_t st103_get_rx_addr(uint8_t ep_num) {
  uint16_t *reg_p = (uint16_t *)((0x40006000UL) + (ep_num * 8 + 4) * 2);
  return *reg_p;
}


x86 assembly (clang, -O0):
<st103_get_rx_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x3,%eax
add    $0x4,%eax
shl    $0x1,%eax
cltq
add    $0x40006000,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<st103_get_rx_addr>:
shl    $0x4,%edi
movslq %edi,%rax
mov    0x40006008(%rax),%eax
ret

LLVM IR (-O0):
define i32 @st103_get_rx_addr(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %4, 8
%6 = add nsw i32 %5, 4
%7 = mul nsw i32 %6, 2
%8 = sext i32 %7 to i64
%9 = add i64 1073766400, %8
%10 = inttoptr i64 %9 to i32*
store i32* %10, i32** %3
%11 = load i32*, i32** %3
%12 = load i32, i32* %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @st103_get_rx_addr(i32 %0) {
%2 = shl i32 %0, 4
%3 = or i32 %2, 8
%4 = sext i32 %3 to i64
%5 = add nsw i64 %4, 1073766400
%6 = inttoptr i64 %5 to i32*
%7 = load i32, i32* %6
ret i32 %7
}
/* Type definitions */
struct mat3 {
  int dummy;
};
struct mat2 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mat2_assign_mat3(float *, float *);
__attribute__((always_)) struct mat2 *psmat2_assign_mat3(struct mat2 *result,
                                                         struct mat3 *m) {
  mat2_assign_mat3((float *)result, (float *)m);
  return result;
}


x86 assembly (clang, -O0):
<psmat2_assign_mat3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <mat2_assign_mat3@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psmat2_assign_mat3>:
push   %rbx
mov    %rdi,%rbx
call   1030 <mat2_assign_mat3@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.mat2 = type { i32 }
%struct.mat3 = type { i32 }
define %struct.mat2* @psmat2_assign_mat3(%struct.mat2* %0, %struct.mat3* %1) {
%3 = alloca %struct.mat2*
%4 = alloca %struct.mat3*
store %struct.mat2* %0, %struct.mat2** %3
store %struct.mat3* %1, %struct.mat3** %4
%5 = load %struct.mat2*, %struct.mat2** %3
%6 = bitcast %struct.mat2* %5 to float*
%7 = load %struct.mat3*, %struct.mat3** %4
%8 = bitcast %struct.mat3* %7 to float*
%9 = call i32 @mat2_assign_mat3(float* %6, float* %8)
%10 = load %struct.mat2*, %struct.mat2** %3
ret %struct.mat2* %10
}

LLVM IR (-O2):
%struct.mat2 = type { i32 }
%struct.mat3 = type { i32 }
define %struct.mat2* @psmat2_assign_mat3(%struct.mat2* returned %0, %struct.mat3* %1) {
%3 = bitcast %struct.mat2* %0 to float*
%4 = bitcast %struct.mat3* %1 to float*
%5 = tail call i32 @mat2_assign_mat3(float* %3, float* %4)
ret %struct.mat2* %0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
long roundUpDiv(long num, long den) {
  assert(den != 0);
  return (num + den - 1) / den;
}


x86 assembly (clang, -O0):
<roundUpDiv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
sub    $0x1,%rax
cqto
idivq  -0x10(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<roundUpDiv>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
xor    %edi,%edi
test   %rsi,%rsi
setne  %dil
call   1030 <assert@plt>
lea    (%r14,%rbx,1),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,%rcx
or     %rbx,%rcx
shr    $0x20,%rcx
je     1143 <roundUpDiv+0x33>
cqto
idiv   %rbx
jmp    1147 <roundUpDiv+0x37>
xor    %edx,%edx
div    %ebx
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @roundUpDiv(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i64, i64* %3
%10 = load i64, i64* %4
%11 = add nsw i64 %9, %10
%12 = sub nsw i64 %11, 1
%13 = load i64, i64* %4
%14 = sdiv i64 %12, %13
ret i64 %14
}

LLVM IR (-O2):
define i64 @roundUpDiv(i64 %0, i64 %1) {
%3 = icmp ne i64 %1, 0
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = add i64 %0, -1
%7 = add i64 %6, %1
%8 = sdiv i64 %7, %1
ret i64 %8
}
/* Variables and functions */
int /*<<< orphan*/ VIM_SIF_I2cWriteByte(unsigned char, unsigned char);
void SensorSetReg_SANYO(unsigned short uAddr, unsigned short uVal) {
  VIM_SIF_I2cWriteByte((unsigned char)uAddr, (unsigned char)uVal);
}


x86 assembly (clang, -O0):
<SensorSetReg_SANYO>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x2(%rbp),%ax
mov    %al,%cl
mov    -0x4(%rbp),%ax
movzbl %cl,%edi
movzbl %al,%esi
call   1030 <VIM_SIF_I2cWriteByte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SensorSetReg_SANYO>:
movzbl %dil,%edi
movzbl %sil,%esi
jmp    1030 <VIM_SIF_I2cWriteByte@plt>

LLVM IR (-O0):
define void @SensorSetReg_SANYO(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = trunc i16 %5 to i8
%7 = load i16, i16* %4
%8 = trunc i16 %7 to i8
%9 = call i32 @VIM_SIF_I2cWriteByte(i8 zeroext %6, i8 zeroext %8)
ret void
}

LLVM IR (-O2):
define void @SensorSetReg_SANYO(i16 zeroext %0, i16 zeroext %1) {
%3 = trunc i16 %0 to i8
%4 = trunc i16 %1 to i8
%5 = tail call i32 @VIM_SIF_I2cWriteByte(i8 zeroext %3, i8 zeroext %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _clear_error_stack();
int _count_ptr_chain(void *);
int count_ptr_chain(void *buf) {
  { _clear_error_stack(); };
  return (_count_ptr_chain(buf));
}


x86 assembly (clang, -O0):
<count_ptr_chain>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <_clear_error_stack@plt>
mov    -0x8(%rbp),%rdi
call   1040 <_count_ptr_chain@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_ptr_chain>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <_clear_error_stack@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <_count_ptr_chain@plt>

LLVM IR (-O0):
define i32 @count_ptr_chain(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @_clear_error_stack()
%4 = load i8*, i8** %2
%5 = call i32 @_count_ptr_chain(i8* %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @count_ptr_chain(i8* %0) {
%2 = tail call i32 (...) @_clear_error_stack()
%3 = tail call i32 @_count_ptr_chain(i8* %0)
ret i32 %3
}
/* Variables and functions */
char *malloc(int);
int rand();
char *realloc(char *, int);
int /*<<< orphan*/ strcpy(char *, char *);
char *fn2() {
  char *result;
  result = malloc(20 + rand() % 20);
  result = realloc(result, 30 + rand() % 20);
  strcpy((char *)result, "fn2");
  return result;
}


x86 assembly (clang, -O0):
<fn2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1060 <rand@plt>
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    %edx,%edi
add    $0x14,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1060 <rand@plt>
mov    -0x10(%rbp),%rdi
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    %edx,%esi
add    $0x1e,%esi
call   1050 <realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xe67(%rip),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn2>:
push   %rbx
xor    %eax,%eax
call   1060 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%edi
add    $0x14,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1060 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%esi
add    $0x1e,%esi
mov    %rbx,%rdi
call   1050 <realloc@plt>
mov    %rax,%rbx
lea    0xe4f(%rip),%rsi
mov    %rax,%rdi
call   1030 <strcpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"fn2\00"
define i8* @fn2() {
%1 = alloca i8*
%2 = call i32 (...) @rand()
%3 = srem i32 %2, 20
%4 = add nsw i32 20, %3
%5 = call i8* @malloc(i32 %4)
store i8* %5, i8** %1
%6 = load i8*, i8** %1
%7 = call i32 (...) @rand()
%8 = srem i32 %7, 20
%9 = add nsw i32 30, %8
%10 = call i8* @realloc(i8* %6, i32 %9)
store i8* %10, i8** %1
%11 = load i8*, i8** %1
%12 = call i32 @strcpy(i8* %11, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%13 = load i8*, i8** %1
ret i8* %13
}

LLVM IR (-O2):
@.str = [4 x i8] c"fn2\00"
define i8* @fn2() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 20
%3 = add nsw i32 %2, 20
%4 = tail call i8* @malloc(i32 %3)
%5 = tail call i32 (...) @rand()
%6 = srem i32 %5, 20
%7 = add nsw i32 %6, 30
%8 = tail call i8* @realloc(i8* %4, i32 %7)
%9 = tail call i32 @strcpy(i8* %8, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i8* %8
}
/* Variables and functions */
scalar_t__ helpw(int, char **);
int /*<<< orphan*/ printf(char *);
int help(int argc, char **argv) {
  if (helpw(argc, argv))
    return 42;
  printf("List of currently supported builtins:\n");
  printf("cd, chdir, dirs, echo, exec, exit, exitc, help, popd, pushd, pwd, "
         "runpipe, setpipe\n");
  return 0;
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <helpw@plt>
cmp    $0x0,%rax
je     1151 <help+0x31>
movl   $0x2a,-0x4(%rbp)
jmp    1170 <help+0x50>
lea    0xea8(%rip),%rdi
call   1030 <printf@plt>
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<help>:
push   %rax
call   1040 <helpw@plt>
mov    %rax,%rcx
mov    $0x2a,%eax
test   %rcx,%rcx
je     1135 <help+0x15>
pop    %rcx
ret
lea    0xec4(%rip),%rdi
call   1030 <puts@plt>
lea    0xede(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [39 x i8] c"List of currently supported builtins:\0A\00"
@.str.1 = [84 x i8] c"cd, chdir, dirs, echo, exec, exit, exitc, help, popd, pushd, pwd, runpipe, setpipe\0A\00"
define i32 @help(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i64 @helpw(i32 %6, i8** %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 42, i32* %3
br label %14
11: ; preds = %2
%12 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%13 = call i32 @printf(i8* getelementptr inbounds ([84 x i8], [84 x i8]* @.str.1, i64 0, i64 0))
store i32 0, i32* %3
br label %14
14: ; preds = %11, %10
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
@str = [38 x i8] c"List of currently supported builtins:\00"
@str.2 = [83 x i8] c"cd, chdir, dirs, echo, exec, exit, exitc, help, popd, pushd, pwd, runpipe, setpipe\00"
define i32 @help(i32 %0, i8** %1) {
%3 = tail call i64 @helpw(i32 %0, i8** %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @str, i64 0, i64 0))
%7 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([83 x i8], [83 x i8]* @str.2, i64 0, i64 0))
br label %8
8: ; preds = %2, %5
%9 = phi i32 [ 0, %5 ], [ 42, %2 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ transfer(int, int);
void f_return(void) { transfer(0x90000000, 1); }


x86 assembly (clang, -O0):
<f_return>:
push   %rbp
mov    %rsp,%rbp
mov    $0x90000000,%edi
mov    $0x1,%esi
call   1030 <transfer@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_return>:
mov    $0x90000000,%edi
mov    $0x1,%esi
jmp    1030 <transfer@plt>

LLVM IR (-O0):
define void @f_return() {
%1 = call i32 @transfer(i32 -1879048192, i32 1)
ret void
}

LLVM IR (-O2):
define void @f_return() {
%1 = tail call i32 @transfer(i32 -1879048192, i32 1)
ret void
}
/* Variables and functions */
scalar_t__ M_PI;
float expf(float);
float smenvgv(float y1, float x, float T) {
  return x - expf(((float)-M_PI) / T) * (x - y1);
}


x86 assembly (clang, -O0):
<smenvgv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
xor    %eax,%eax
mov    0x2eae(%rip),%rcx
sub    (%rcx),%rax
cvtsi2ss %rax,%xmm0
divss  -0xc(%rbp),%xmm0
call   1030 <expf@plt>
movss  -0x10(%rbp),%xmm1
movss  -0x8(%rbp),%xmm2
subss  -0x4(%rbp),%xmm2
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smenvgv>:
push   %rax
movss  %xmm1,(%rsp)
movss  %xmm0,0x4(%rsp)
mov    0x2ec5(%rip),%rax
xor    %ecx,%ecx
sub    (%rax),%rcx
xorps  %xmm0,%xmm0
cvtsi2ss %rcx,%xmm0
divss  %xmm2,%xmm0
call   1030 <expf@plt>
movss  (%rsp),%xmm2
movaps %xmm2,%xmm1
subss  0x4(%rsp),%xmm1
mulss  %xmm0,%xmm1
subss  %xmm1,%xmm2
movaps %xmm2,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@M_PI = global i64 0
define float @smenvgv(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %5
%8 = load i64, i64* @M_PI
%9 = sub nsw i64 0, %8
%10 = sitofp i64 %9 to float
%11 = load float, float* %6
%12 = fdiv float %10, %11
%13 = call float @expf(float %12)
%14 = load float, float* %5
%15 = load float, float* %4
%16 = fsub float %14, %15
%17 = fneg float %13
%18 = call float @llvm.fmuladd.f32(float %17, float %16, float %7)
ret float %18
}

LLVM IR (-O2):
@M_PI = global i64 0
define float @smenvgv(float %0, float %1, float %2) {
%4 = load i64, i64* @M_PI
%5 = sub nsw i64 0, %4
%6 = sitofp i64 %5 to float
%7 = fdiv float %6, %2
%8 = tail call float @expf(float %7)
%9 = fsub float %1, %0
%10 = fneg float %8
%11 = tail call float @llvm.fmuladd.f32(float %10, float %9, float %1)
ret float %11
}
/* Type definitions */
typedef scalar_t__ pid_t;

/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
scalar_t__ fork();
int /*<<< orphan*/ sleep(int);
int /*<<< orphan*/ waitpid(scalar_t__, int /*<<< orphan*/ *,
                           int /*<<< orphan*/);
int main(int argc, char *argv[]) {
  pid_t child_pid = 0;
  child_pid = fork();
  if (!child_pid) {
    sleep(10);
    exit(0);
  } else {
    waitpid(child_pid, NULL, 0);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    $0x0,%al
call   1060 <fork@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1185 <main+0x45>
mov    $0xa,%edi
call   1050 <sleep@plt>
xor    %edi,%edi
call   1040 <exit@plt>
mov    -0x18(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
xor    %edx,%edx
call   1030 <waitpid@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <fork@plt>
test   %rax,%rax
je     115d <main+0x1d>
mov    %rax,%rdi
xor    %esi,%esi
xor    %edx,%edx
call   1030 <waitpid@plt>
xor    %eax,%eax
pop    %rcx
ret
mov    $0xa,%edi
call   1050 <sleep@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i64
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i64 0, i64* %6
%7 = call i64 (...) @fork()
store i64 %7, i64* %6
%8 = load i64, i64* %6
%9 = icmp ne i64 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %2
%11 = call i32 @sleep(i32 10)
%12 = call i32 @exit(i32 0)
unreachable
13: ; preds = %2
%14 = load i64, i64* %6
%15 = call i32 @waitpid(i64 %14, i32* null, i32 0)
br label %16
16: ; preds = %13
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 (...) @fork()
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = tail call i32 @sleep(i32 10)
%7 = tail call i32 @exit(i32 0)
unreachable
8: ; preds = %2
%9 = tail call i32 @waitpid(i64 %3, i32* null, i32 0)
ret i32 0
}
/* Type definitions */
struct ether_addr {
  int dummy;
};

/* Variables and functions */
char *ether_ntoa_r(struct ether_addr const *, char *);
char *ether_ntoa(const struct ether_addr *p_a) {
  static char x[18];
  return ether_ntoa_r(p_a, x);
}


x86 assembly (clang, -O0):
<ether_ntoa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0x2f19(%rip),%rsi
call   1030 <ether_ntoa_r@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ether_ntoa>:
lea    0x2f29(%rip),%rsi
jmp    1030 <ether_ntoa_r@plt>

LLVM IR (-O0):
%struct.ether_addr = type { i32 }
@ether_ntoa.x = internal global [18 x i8] zeroinitializer
define i8* @ether_ntoa(%struct.ether_addr* %0) {
%2 = alloca %struct.ether_addr*
store %struct.ether_addr* %0, %struct.ether_addr** %2
%3 = load %struct.ether_addr*, %struct.ether_addr** %2
%4 = call i8* @ether_ntoa_r(%struct.ether_addr* %3, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @ether_ntoa.x, i64 0, i64 0))
ret i8* %4
}

LLVM IR (-O2):
%struct.ether_addr = type { i32 }
@ether_ntoa.x = internal global [18 x i8] zeroinitializer
define i8* @ether_ntoa(%struct.ether_addr* %0) {
%2 = tail call i8* @ether_ntoa_r(%struct.ether_addr* %0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @ether_ntoa.x, i64 0, i64 0))
ret i8* %2
}