xunge/DecIR huggingface dataset:
void gtk_font_selection_get_preview_text() {}


x86 assembly (clang, -O0):
<gtk_font_selection_get_preview_text>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_font_selection_get_preview_text>:
ret

LLVM IR (-O0):
define void @gtk_font_selection_get_preview_text() {
ret void
}

LLVM IR (-O2):
define void @gtk_font_selection_get_preview_text() {
ret void
}
int test_imm_19uint16_mem(unsigned short *val) {
  return ((*val) & (0x19 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_19uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0x19,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_19uint16_mem>:
testb  $0x19,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_19uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 25
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_19uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 25
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
uint64_t OptickAPI_CreateEventDescription(const char *inFunctionName,
                                          uint16_t inFunctionLength,
                                          const char *inFileName,
                                          uint16_t inFileNameLenght,
                                          uint32_t inFileLine) {}


x86 assembly (clang, -O0):
<OptickAPI_CreateEventDescription>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %ecx,-0x24(%rbp)
mov    %r8d,-0x28(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OptickAPI_CreateEventDescription>:
ret

LLVM IR (-O0):
define i32 @OptickAPI_CreateEventDescription(i8* %0, i32 %1, i8* %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i32
%11 = alloca i32
store i8* %0, i8** %7
store i32 %1, i32* %8
store i8* %2, i8** %9
store i32 %3, i32* %10
store i32 %4, i32* %11
%12 = load i32, i32* %6
ret i32 %12
}

LLVM IR (-O2):
define i32 @OptickAPI_CreateEventDescription(i8* nocapture readnone %0, i32 %1, i8* nocapture readnone %2, i32 %3, i32 %4) {
ret i32 undef
}
/* Variables and functions */
void *__builtin_arm_rsrp(char *);
void *rsrp_2() { return __builtin_arm_rsrp("0:1:2:3:4"); }


x86 assembly (clang, -O0):
<rsrp_2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <__builtin_arm_rsrp@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rsrp_2>:
lea    0xee9(%rip),%rdi
jmp    1030 <__builtin_arm_rsrp@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"0:1:2:3:4\00"
define i8* @rsrp_2() {
%1 = call i8* @__builtin_arm_rsrp(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [10 x i8] c"0:1:2:3:4\00"
define i8* @rsrp_2() {
%1 = tail call i8* @__builtin_arm_rsrp(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, ...);
void POMDP_TOOLS_OPTS_showUsageBrief(FILE *file, char *exec_name) {
  fprintf(file, "Usage: %s [opts...] [args...]\n", exec_name);
  fprintf(file, "Use '-h' for help.\n");
}


x86 assembly (clang, -O0):
<POMDP_TOOLS_OPTS_showUsageBrief>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    -0x8(%rbp),%rdi
lea    0xede(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<POMDP_TOOLS_OPTS_showUsageBrief>:
push   %rbx
mov    %rsi,%rdx
mov    %rdi,%rbx
lea    0xed2(%rip),%rsi
xor    %eax,%eax
call   1030 <fprintf@plt>
lea    0xee3(%rip),%rdi
mov    $0x13,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
pop    %rbx
jmp    1040 <fwrite@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"Usage: %s [opts...] [args...]\0A\00"
@.str.1 = [20 x i8] c"Use '-h' for help.\0A\00"
define void @POMDP_TOOLS_OPTS_showUsageBrief(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = call i32 (i32*, i8*, ...) @fprintf(i32* %5, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = load i32*, i32** %3
%9 = call i32 (i32*, i8*, ...) @fprintf(i32* %8, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"Usage: %s [opts...] [args...]\0A\00"
@.str.1 = [20 x i8] c"Use '-h' for help.\0A\00"
define void @POMDP_TOOLS_OPTS_showUsageBrief(i32* nocapture %0, i8* %1) {
%3 = tail call i32 (i32*, i8*, ...) @fprintf(i32* %0, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %1)
%4 = tail call i64 @fwrite(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0), i64 19, i64 1, i32* %0)
ret void
}
void evloop_do_on_socket_close(struct st_h2o_evloop_socket_t *sock) {}


x86 assembly (clang, -O0):
<evloop_do_on_socket_close>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<evloop_do_on_socket_close>:
ret

LLVM IR (-O0):
%struct.st_h2o_evloop_socket_t = type opaque
define void @evloop_do_on_socket_close(%struct.st_h2o_evloop_socket_t* %0) {
%2 = alloca %struct.st_h2o_evloop_socket_t*
store %struct.st_h2o_evloop_socket_t* %0, %struct.st_h2o_evloop_socket_t** %2
ret void
}

LLVM IR (-O2):
%struct.st_h2o_evloop_socket_t = type opaque
define void @evloop_do_on_socket_close(%struct.st_h2o_evloop_socket_t* nocapture %0) {
ret void
}
int isvar(y)
int y;
{ return (y == 3); }


x86 assembly (clang, -O0):
<isvar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x3,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isvar>:
xor    %eax,%eax
cmp    $0x3,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @isvar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 3
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @isvar(i32 %0) {
%2 = icmp eq i32 %0, 3
%3 = zext i1 %2 to i32
ret i32 %3
}
float obdConvert_47_4B(unsigned int A, unsigned int B, unsigned int C,
                       unsigned int D) {
  return (float)A * 100.0f / 255.0f;
}


x86 assembly (clang, -O0):
<obdConvert_47_4B>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
cvtsi2ss %rax,%xmm0
movss  0xee4(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xed4(%rip),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<obdConvert_47_4B>:
mov    %edi,%eax
cvtsi2ss %rax,%xmm0
mulss  0xef1(%rip),%xmm0
divss  0xeed(%rip),%xmm0
ret

LLVM IR (-O0):
define float @obdConvert_47_4B(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = uitofp i32 %9 to float
%11 = fmul float %10, 1.000000e+02
%12 = fdiv float %11, 2.550000e+02
ret float %12
}

LLVM IR (-O2):
define float @obdConvert_47_4B(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = uitofp i32 %0 to float
%6 = fmul float %5, 1.000000e+02
%7 = fdiv float %6, 2.550000e+02
ret float %7
}
/* Type definitions */
struct cmd {
  int dummy;
};

/* Variables and functions */
struct cmd *parsecomd(char **, char *);
struct cmd *parseline(char **ps, char *es) {
  struct cmd *cmd;
  cmd = parsecomd(ps, es);
  return cmd;
}


x86 assembly (clang, -O0):
<parseline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <parsecomd@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parseline>:
jmp    1030 <parsecomd@plt>

LLVM IR (-O0):
%struct.cmd = type { i32 }
define %struct.cmd* @parseline(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
%5 = alloca %struct.cmd*
store i8** %0, i8*** %3
store i8* %1, i8** %4
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %4
%8 = call %struct.cmd* @parsecomd(i8** %6, i8* %7)
store %struct.cmd* %8, %struct.cmd** %5
%9 = load %struct.cmd*, %struct.cmd** %5
ret %struct.cmd* %9
}

LLVM IR (-O2):
%struct.cmd = type { i32 }
define %struct.cmd* @parseline(i8** %0, i8* %1) {
%3 = tail call %struct.cmd* @parsecomd(i8** %0, i8* %1)
ret %struct.cmd* %3
}
/* Variables and functions */
int /*<<< orphan*/ OAL_OBTAIN_SEMAPHORE();
int /*<<< orphan*/ OAL_RELEASE_SEMAPHORE();
int spi_bulkwrite(void *, unsigned short, unsigned char, unsigned char *, int);
signed int fc8180_spib_wordwrite(void *handle, unsigned short addr,
                                 unsigned int data) {
  signed int res;
  unsigned char command = 0x00 | 0x80;
  OAL_OBTAIN_SEMAPHORE();
  res = spi_bulkwrite(handle, addr, command, (unsigned char *)&data, 2);
  OAL_RELEASE_SEMAPHORE();
  return res;
}


x86 assembly (clang, -O0):
<fc8180_spib_wordwrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    %edx,-0x10(%rbp)
movb   $0x80,-0x15(%rbp)
mov    $0x0,%al
call   1050 <OAL_OBTAIN_SEMAPHORE@plt>
mov    -0x8(%rbp),%rdi
mov    -0xa(%rbp),%dx
mov    -0x15(%rbp),%al
lea    -0x10(%rbp),%rcx
mov    $0x2,%r8d
movzwl %dx,%esi
movzbl %al,%edx
call   1040 <spi_bulkwrite@plt>
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1030 <OAL_RELEASE_SEMAPHORE@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc8180_spib_wordwrite>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    %edx,0x4(%rsp)
xor    %eax,%eax
call   1050 <OAL_OBTAIN_SEMAPHORE@plt>
lea    0x4(%rsp),%rcx
mov    %rbx,%rdi
mov    %ebp,%esi
mov    $0x80,%edx
mov    $0x2,%r8d
call   1040 <spi_bulkwrite@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <OAL_RELEASE_SEMAPHORE@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fc8180_spib_wordwrite(i8* %0, i16 zeroext %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i16
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8
store i8* %0, i8** %4
store i16 %1, i16* %5
store i32 %2, i32* %6
store i8 -128, i8* %8
%9 = call i32 (...) @OAL_OBTAIN_SEMAPHORE()
%10 = load i8*, i8** %4
%11 = load i16, i16* %5
%12 = load i8, i8* %8
%13 = bitcast i32* %6 to i8*
%14 = call i32 @spi_bulkwrite(i8* %10, i16 zeroext %11, i8 zeroext %12, i8* %13, i32 2)
store i32 %14, i32* %7
%15 = call i32 (...) @OAL_RELEASE_SEMAPHORE()
%16 = load i32, i32* %7
ret i32 %16
}

LLVM IR (-O2):
define i32 @fc8180_spib_wordwrite(i8* %0, i16 zeroext %1, i32 %2) {
%4 = alloca i32
store i32 %2, i32* %4
%5 = tail call i32 (...) @OAL_OBTAIN_SEMAPHORE()
%6 = bitcast i32* %4 to i8*
%7 = call i32 @spi_bulkwrite(i8* %0, i16 zeroext %1, i8 zeroext -128, i8* %6, i32 2)
%8 = call i32 (...) @OAL_RELEASE_SEMAPHORE()
ret i32 %7
}
/* Variables and functions */
int writeToCompassDevice(int, int);
int setCompassConfigurationRegisterB(int mode) {
  return writeToCompassDevice(0x01, mode);
}


x86 assembly (clang, -O0):
<setCompassConfigurationRegisterB>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x1,%edi
call   1030 <writeToCompassDevice@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setCompassConfigurationRegisterB>:
mov    %edi,%esi
mov    $0x1,%edi
jmp    1030 <writeToCompassDevice@plt>

LLVM IR (-O0):
define i32 @setCompassConfigurationRegisterB(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @writeToCompassDevice(i32 1, i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @setCompassConfigurationRegisterB(i32 %0) {
%2 = tail call i32 @writeToCompassDevice(i32 1, i32 %0)
ret i32 %2
}
void jz_writew(unsigned int address, unsigned short value) {
  *((volatile unsigned short *)address) = value;
}


x86 assembly (clang, -O0):
<jz_writew>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %edi,-0x4(%rbp)
mov    %ax,-0x6(%rbp)
mov    -0x6(%rbp),%cx
mov    -0x4(%rbp),%eax
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<jz_writew>:
mov    %edi,%eax
mov    %si,(%rax)
ret

LLVM IR (-O0):
define void @jz_writew(i32 %0, i16 zeroext %1) {
%3 = alloca i32
%4 = alloca i16
store i32 %0, i32* %3
store i16 %1, i16* %4
%5 = load i16, i16* %4
%6 = load i32, i32* %3
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i16*
store volatile i16 %5, i16* %8
ret void
}

LLVM IR (-O2):
define void @jz_writew(i32 %0, i16 zeroext %1) {
%3 = zext i32 %0 to i64
%4 = inttoptr i64 %3 to i16*
store volatile i16 %1, i16* %4
ret void
}
int isprint(int c) { return (c >= ' ') && (c <= '~'); }


x86 assembly (clang, -O0):
<isprint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <isprint+0x20>
cmpl   $0x7e,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isprint>:
add    $0xffffffe0,%edi
xor    %eax,%eax
cmp    $0x5f,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isprint(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 32
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 126
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isprint(i32 %0) {
%2 = add i32 %0, -32
%3 = icmp ult i32 %2, 95
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
double fmod(double, double);
double fmod_ieee(double x, double y) { return fmod(x, y); }


x86 assembly (clang, -O0):
<fmod_ieee>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <fmod@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmod_ieee>:
jmp    1030 <fmod@plt>

LLVM IR (-O0):
define double @fmod_ieee(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @fmod(double %5, double %6)
ret double %7
}

LLVM IR (-O2):
define double @fmod_ieee(double %0, double %1) {
%3 = tail call double @fmod(double %0, double %1)
ret double %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *fopen(char *, char *);
FILE *open_0(char *filename, void *unused) {
  FILE *this = fopen(filename, "r");
  return this;
}


x86 assembly (clang, -O0):
<open_0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed5(%rip),%rsi
call   1030 <fopen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_0>:
lea    0xee9(%rip),%rsi
jmp    1030 <fopen@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"r\00"
define i32* @open_0(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i32* @fopen(i8* %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %7, i32** %5
%8 = load i32*, i32** %5
ret i32* %8
}

LLVM IR (-O2):
@.str = [2 x i8] c"r\00"
define noalias i32* @open_0(i8* nocapture %0, i8* nocapture readnone %1) {
%3 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32* %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void good() { exit(0); }


x86 assembly (clang, -O0):
<good>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<good>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @good() {
%1 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @good() {
%1 = tail call i32 @exit(i32 0)
unreachable
}
double subfl(double a, double b) { return a - b; }


x86 assembly (clang, -O0):
<subfl>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<subfl>:
subsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @subfl(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fsub double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @subfl(double %0, double %1) {
%3 = fsub double %0, %1
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ pr_inf_skip(char *, char const *);
int stress_ipsec_mb_supported(const char *name) {
  pr_inf_skip("%s: stressor will be skipped, CPU "
              "needs to be an x86-64 and a recent IPSec MB library "
              "is required.\n",
              name);
  return -1;
}


x86 assembly (clang, -O0):
<stress_ipsec_mb_supported>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <pr_inf_skip@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stress_ipsec_mb_supported>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
call   1030 <pr_inf_skip@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [100 x i8] c"%s: stressor will be skipped, CPU needs to be an x86-64 and a recent IPSec MB library is required.\0A\00"
define i32 @stress_ipsec_mb_supported(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @pr_inf_skip(i8* getelementptr inbounds ([100 x i8], [100 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 -1
}

LLVM IR (-O2):
@.str = [100 x i8] c"%s: stressor will be skipped, CPU needs to be an x86-64 and a recent IPSec MB library is required.\0A\00"
define i32 @stress_ipsec_mb_supported(i8* %0) {
%2 = tail call i32 @pr_inf_skip(i8* getelementptr inbounds ([100 x i8], [100 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 -1
}
/* Variables and functions */
unsigned int atoi(char *);
int main(int argc, char **argv) {
  unsigned int i, j, n;
  n = atoi(argv[1]);
  for (i = 0; i < n; i++)
    for (j = 0; j < 1000 * 1000; j++)
      ;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <atoi@plt>
mov    %eax,-0x1c(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x1c(%rbp),%eax
jae    1183 <main+0x73>
movl   $0x0,-0x18(%rbp)
cmpl   $0xf4240,-0x18(%rbp)
jae    1170 <main+0x60>
jmp    1162 <main+0x52>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1150 <main+0x40>
jmp    1175 <main+0x65>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    113d <main+0x2d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 1
%11 = load i8*, i8** %10
%12 = call i32 @atoi(i8* %11)
store i32 %12, i32* %8
store i32 0, i32* %6
br label %13
13: ; preds = %26, %2
%14 = load i32, i32* %6
%15 = load i32, i32* %8
%16 = icmp ult i32 %14, %15
br i1 %16, label %17, label %29
17: ; preds = %13
store i32 0, i32* %7
br label %18
18: ; preds = %22, %17
%19 = load i32, i32* %7
%20 = icmp ult i32 %19, 1000000
br i1 %20, label %21, label %25
21: ; preds = %18
br label %22
22: ; preds = %21
%23 = load i32, i32* %7
%24 = add i32 %23, 1
store i32 %24, i32* %7
br label %18
25: ; preds = %18
br label %26
26: ; preds = %25
%27 = load i32, i32* %6
%28 = add i32 %27, 1
store i32 %28, i32* %6
br label %13
29: ; preds = %13
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *stdin;
void closeStream(FILE *stream) {
  if (stream != stdin && stream != NULL) {
    fclose(stream);
  }
}


x86 assembly (clang, -O0):
<closeStream>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2ec1(%rip),%rcx
cmp    (%rcx),%rax
je     1144 <closeStream+0x34>
cmpq   $0x0,-0x8(%rbp)
je     1144 <closeStream+0x34>
mov    -0x8(%rbp),%rdi
call   1030 <fclose@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<closeStream>:
test   %rdi,%rdi
je     1126 <closeStream+0x16>
mov    0x2ecc(%rip),%rax
cmp    %rdi,(%rax)
je     1126 <closeStream+0x16>
jmp    1030 <fclose@plt>
ret

LLVM IR (-O0):
@stdin = global i32* null
define void @closeStream(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32*, i32** @stdin
%5 = icmp ne i32* %3, %4
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i32*, i32** %2
%8 = icmp ne i32* %7, null
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32*, i32** %2
%11 = call i32 @fclose(i32* %10)
br label %12
12: ; preds = %9, %6, %1
ret void
}

LLVM IR (-O2):
@stdin = global i32* null
define void @closeStream(i32* %0) {
%2 = load i32*, i32** @stdin
%3 = icmp ne i32* %2, %0
%4 = icmp ne i32* %0, null
%5 = and i1 %4, %3
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 @fclose(i32* %0)
br label %8
8: ; preds = %6, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ change_color(int);
int /*<<< orphan*/ printch(char);
void printk(int color, char *str) {
  change_color(color);
  while (*str) {
    printch(*str);
    str++;
  }
}


x86 assembly (clang, -O0):
<printk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <change_color@plt>
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1161 <printk+0x41>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1040 <printch@plt>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1137 <printk+0x17>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printk>:
push   %rbx
mov    %rsi,%rbx
call   1030 <change_color@plt>
mov    (%rbx),%al
test   %al,%al
je     1153 <printk+0x33>
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movsbl %al,%edi
call   1040 <printch@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1140 <printk+0x20>
pop    %rbx
ret

LLVM IR (-O0):
define void @printk(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = call i32 @change_color(i32 %5)
br label %7
7: ; preds = %11, %2
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = call i32 @printch(i8 signext %13)
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %4
br label %7
17: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @printk(i32 %0, i8* nocapture %1) {
%3 = tail call i32 @change_color(i32 %0)
%4 = load i8, i8* %1
%5 = icmp eq i8 %4, 0
br i1 %5, label %13, label %6
6: ; preds = %2, %6
%7 = phi i8 [ %11, %6 ], [ %4, %2 ]
%8 = phi i8* [ %10, %6 ], [ %1, %2 ]
%9 = tail call i32 @printch(i8 signext %7)
%10 = getelementptr inbounds i8, i8* %8, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
/* Variables and functions */
size_t terminator_size(size_t total_size) {
  if (total_size <= 0)
    return 0;
  else
    return total_size - 1;
}


x86 assembly (clang, -O0):
<terminator_size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
ja     1120 <terminator_size+0x20>
movq   $0x0,-0x8(%rbp)
jmp    112c <terminator_size+0x2c>
mov    -0x10(%rbp),%rax
sub    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<terminator_size>:
xor    %eax,%eax
sub    $0x1,%rdi
cmovae %rdi,%rax
ret

LLVM IR (-O0):
define i64 @terminator_size(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp ule i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 0, i64* %2
br label %10
7: ; preds = %1
%8 = load i64, i64* %3
%9 = sub i64 %8, 1
store i64 %9, i64* %2
br label %10
10: ; preds = %7, %6
%11 = load i64, i64* %2
ret i64 %11
}

LLVM IR (-O2):
define i64 @terminator_size(i64 %0) {
%2 = icmp eq i64 %0, 0
%3 = add i64 %0, -1
%4 = select i1 %2, i64 0, i64 %3
ret i64 %4
}
void toto(int *(**tutu[8][16])(int (*main)(int, const char *const ***), int)) {
  ;
  ;
  ;
}


x86 assembly (clang, -O0):
<toto>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<toto>:
ret

LLVM IR (-O0):
define void @toto([16 x i32* (i32 (i32, i8****)*, i32)**]* %0) {
%2 = alloca [16 x i32* (i32 (i32, i8****)*, i32)**]*
store [16 x i32* (i32 (i32, i8****)*, i32)**]* %0, [16 x i32* (i32 (i32, i8****)*, i32)**]** %2
ret void
}

LLVM IR (-O2):
define void @toto([16 x i32* (i32 (i32, i8****)*, i32)**]* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
char __attribute__((visibility("default"))) func_b(void) {
  if ('c' != 'c') {
    exit(3);
  }
  return 'b';
}


x86 assembly (clang, -O0):
<func_b>:
push   %rbp
mov    %rsp,%rbp
mov    $0x62,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_b>:
mov    $0x62,%al
ret

LLVM IR (-O0):
define signext i8 @func_b() {
ret i8 98
}

LLVM IR (-O2):
define signext i8 @func_b() {
ret i8 98
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, double);
double ret_double(int, int);
double ret_double3(int, int);
int main() {
  double d;
  d = ret_double3(2, 3);
  printf("got %f\n", d);
  d = ret_double(2, 3);
  printf("got %f\n", d);
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x2,%edi
mov    $0x3,%esi
call   1050 <ret_double3@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
lea    0xe91(%rip),%rdi
call   1030 <printf@plt>
mov    $0x2,%edi
mov    $0x3,%esi
call   1040 <ret_double@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
lea    0xe6c(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1060 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x2,%edi
mov    $0x3,%esi
call   1050 <ret_double3@plt>
lea    0xea9(%rip),%rbx
mov    %rbx,%rdi
call   1030 <printf@plt>
mov    $0x2,%edi
mov    $0x3,%esi
call   1040 <ret_double@plt>
mov    %rbx,%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"got %f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
store i32 0, i32* %1
%3 = call double @ret_double3(i32 2, i32 3)
store double %3, double* %2
%4 = load double, double* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), double %4)
%6 = call double @ret_double(i32 2, i32 3)
store double %6, double* %2
%7 = load double, double* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), double %7)
%9 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [8 x i8] c"got %f\0A\00"
define i32 @main() {
%1 = tail call double @ret_double3(i32 2, i32 3)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), double %1)
%3 = tail call double @ret_double(i32 2, i32 3)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), double %3)
%5 = tail call i32 @exit(i32 0)
unreachable
}
void gl_puts(buf) char *buf;
{
  int len;
  if (buf) {
    len = strlen(buf);
    write(1, buf, len);
  }
}


x86 assembly (clang, -O0):
<gl_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1156 <gl_puts+0x36>
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    $0x1,%edi
mov    $0x0,%al
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gl_puts>:
test   %rdi,%rdi
je     1140 <gl_puts+0x20>
push   %rbx
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    $0x1,%edi
mov    %rbx,%rsi
mov    %eax,%edx
xor    %eax,%eax
pop    %rbx
jmp    1030 <write@plt>
ret

LLVM IR (-O0):
define void @gl_puts(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i64 @strlen(i8* %7)
%9 = trunc i64 %8 to i32
store i32 %9, i32* %3
%10 = load i8*, i8** %2
%11 = load i32, i32* %3
%12 = call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @write to i32 (i32, i8*, i32, ...)*)(i32 1, i8* %10, i32 %11)
br label %13
13: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
define void @gl_puts(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i64 @strlen(i8* %0)
%5 = trunc i64 %4 to i32
%6 = tail call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @write to i32 (i32, i8*, i32, ...)*)(i32 1, i8* %0, i32 %5)
br label %7
7: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_int(int *);
int /*<<< orphan*/ set_int_ref(int *, int *);
int /*<<< orphan*/ set_int_to(int *, int *);
int main() {
  int i;
  int j = 21;
  set_int(&i);
  set_int_to(&i, &j);
  set_int_ref(&i, &j);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x15,-0xc(%rbp)
lea    -0x8(%rbp),%rdi
call   1030 <set_int@plt>
lea    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1040 <set_int_to@plt>
lea    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1050 <set_int_ref@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
movl   $0x15,(%rsp)
lea    0x4(%rsp),%rbx
mov    %rbx,%rdi
call   1030 <set_int@plt>
mov    %rsp,%r14
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <set_int_to@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1050 <set_int_ref@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 21, i32* %3
%4 = call i32 @set_int(i32* %2)
%5 = call i32 @set_int_to(i32* %2, i32* %3)
%6 = call i32 @set_int_ref(i32* %2, i32* %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
store i32 21, i32* %2
%5 = call i32 @set_int(i32* %1)
%6 = call i32 @set_int_to(i32* %1, i32* %2)
%7 = call i32 @set_int_ref(i32* %1, i32* %2)
ret i32 0
}
int is_matrix(const int symbology) {
  int result = 0;
  switch (symbology) {
  case 58:
  case 71:
  case 97:
  case 102:
  case 92:
  case 104:
  case 112:
  case 128:
  case 141:
  case 142:
  case 116:
  case 115:
    result = 1;
    break;
  }
  return result;
}


x86 assembly (clang, -O0):
<is_matrix>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffc6,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x54,%eax
ja     113e <is_matrix+0x3e>
mov    -0x10(%rbp),%rax
lea    0xed2(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_matrix>:
xor    %eax,%eax
add    $0xffffffc6,%edi
cmp    $0x54,%edi
ja     111f <is_matrix+0x1f>
lea    0xeef(%rip),%rcx
movslq (%rcx,%rdi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_matrix(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
switch i32 %4, label %6 [
i32 58, label %5
i32 71, label %5
i32 97, label %5
i32 102, label %5
i32 92, label %5
i32 104, label %5
i32 112, label %5
i32 128, label %5
i32 141, label %5
i32 142, label %5
i32 116, label %5
i32 115, label %5
]
5: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
store i32 1, i32* %3
br label %6
6: ; preds = %1, %5
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @is_matrix(i32 %0) {
switch i32 %0, label %3 [
i32 58, label %2
i32 71, label %2
i32 97, label %2
i32 102, label %2
i32 92, label %2
i32 104, label %2
i32 112, label %2
i32 128, label %2
i32 141, label %2
i32 142, label %2
i32 116, label %2
i32 115, label %2
]
2: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
br label %3
3: ; preds = %1, %2
%4 = phi i32 [ 0, %1 ], [ 1, %2 ]
ret i32 %4
}
/* Variables and functions */
double __ieee754_log(double);
double log1(double x) { return __ieee754_log(x); }


x86 assembly (clang, -O0):
<log1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__ieee754_log@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log1>:
jmp    1030 <__ieee754_log@plt>

LLVM IR (-O0):
define double @log1(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @__ieee754_log(double %3)
ret double %4
}

LLVM IR (-O2):
define double @log1(double %0) {
%2 = tail call double @__ieee754_log(double %0)
ret double %2
}
/* Type definitions */
typedef scalar_t__ uint8_t;

/* Variables and functions */
unsigned int be2int(const uint8_t *be) {
  return ((unsigned int)be[0] << 24) | ((unsigned int)be[1] << 16) |
         ((unsigned int)be[2] << 8) | ((unsigned int)be[3] << 0);
}


x86 assembly (clang, -O0):
<be2int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%rcx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x10(%rcx),%rcx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x18(%rcx),%rcx
shl    $0x0,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<be2int>:
mov    (%rdi),%eax
mov    0x8(%rdi),%ecx
shl    $0x18,%eax
shl    $0x10,%ecx
or     %eax,%ecx
mov    0x10(%rdi),%eax
shl    $0x8,%eax
or     %ecx,%eax
or     0x18(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @be2int(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = getelementptr inbounds i64, i64* %3, i64 0
%5 = load i64, i64* %4
%6 = trunc i64 %5 to i32
%7 = shl i32 %6, 24
%8 = load i64*, i64** %2
%9 = getelementptr inbounds i64, i64* %8, i64 1
%10 = load i64, i64* %9
%11 = trunc i64 %10 to i32
%12 = shl i32 %11, 16
%13 = or i32 %7, %12
%14 = load i64*, i64** %2
%15 = getelementptr inbounds i64, i64* %14, i64 2
%16 = load i64, i64* %15
%17 = trunc i64 %16 to i32
%18 = shl i32 %17, 8
%19 = or i32 %13, %18
%20 = load i64*, i64** %2
%21 = getelementptr inbounds i64, i64* %20, i64 3
%22 = load i64, i64* %21
%23 = trunc i64 %22 to i32
%24 = shl i32 %23, 0
%25 = or i32 %19, %24
ret i32 %25
}

LLVM IR (-O2):
define i32 @be2int(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = trunc i64 %2 to i32
%4 = shl i32 %3, 24
%5 = getelementptr inbounds i64, i64* %0, i64 1
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
%8 = shl i32 %7, 16
%9 = or i32 %8, %4
%10 = getelementptr inbounds i64, i64* %0, i64 2
%11 = load i64, i64* %10
%12 = trunc i64 %11 to i32
%13 = shl i32 %12, 8
%14 = or i32 %9, %13
%15 = getelementptr inbounds i64, i64* %0, i64 3
%16 = load i64, i64* %15
%17 = trunc i64 %16 to i32
%18 = or i32 %14, %17
ret i32 %18
}
void delmode(f, n) int f, n;
{
  adjustmode(0, 0);
  return;
  f = f;
  n = n;
}


x86 assembly (clang, -O0):
<delmode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %esi,%esi
mov    %esi,%edi
mov    $0x0,%al
call   1030 <adjustmode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delmode>:
xor    %edi,%edi
xor    %esi,%esi
xor    %eax,%eax
jmp    1030 <adjustmode@plt>

LLVM IR (-O0):
define void @delmode(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (i32, i32, ...) bitcast (i32 (...)* @adjustmode to i32 (i32, i32, ...)*)(i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @delmode(i32 %0, i32 %1) {
%3 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @adjustmode to i32 (i32, i32, ...)*)(i32 0, i32 0)
ret void
}
int octeon_has_feature_OCTEON_FEATURE_DFA(void) { return 0; }


x86 assembly (clang, -O0):
<octeon_has_feature_OCTEON_FEATURE_DFA>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<octeon_has_feature_OCTEON_FEATURE_DFA>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @octeon_has_feature_OCTEON_FEATURE_DFA() {
ret i32 0
}

LLVM IR (-O2):
define i32 @octeon_has_feature_OCTEON_FEATURE_DFA() {
ret i32 0
}
const char *loader_BIN_get_type(void) { return "BIN"; }


x86 assembly (clang, -O0):
<loader_BIN_get_type>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<loader_BIN_get_type>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"BIN\00"
define i8* @loader_BIN_get_type() {
ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [4 x i8] c"BIN\00"
define i8* @loader_BIN_get_type() {
ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ wiznetRegWriteWord(int /*<<< orphan*/, int,
                                      int /*<<< orphan*/);
void wiznetSetSocketRXWritePointer(uint8_t socket, uint16_t addr) {
  wiznetRegWriteWord(socket, (0x0000 + 0x002A), addr);
}


x86 assembly (clang, -O0):
<wiznetSetSocketRXWritePointer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    $0x2a,%esi
call   1030 <wiznetRegWriteWord@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wiznetSetSocketRXWritePointer>:
mov    %esi,%edx
mov    $0x2a,%esi
jmp    1030 <wiznetRegWriteWord@plt>

LLVM IR (-O0):
define void @wiznetSetSocketRXWritePointer(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @wiznetRegWriteWord(i32 %5, i32 42, i32 %6)
ret void
}

LLVM IR (-O2):
define void @wiznetSetSocketRXWritePointer(i32 %0, i32 %1) {
%3 = tail call i32 @wiznetRegWriteWord(i32 %0, i32 42, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ retrieve_all_standard_solution_strings();
int solcon_read_standard_solutions();
void test_retrieve_all_standard_solution_strings(void) {
  int fail = solcon_read_standard_solutions();
  retrieve_all_standard_solution_strings();
}


x86 assembly (clang, -O0):
<test_retrieve_all_standard_solution_strings>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <solcon_read_standard_solutions@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <retrieve_all_standard_solution_strings@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_retrieve_all_standard_solution_strings>:
push   %rax
xor    %eax,%eax
call   1030 <solcon_read_standard_solutions@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <retrieve_all_standard_solution_strings@plt>

LLVM IR (-O0):
define void @test_retrieve_all_standard_solution_strings() {
%1 = alloca i32
%2 = call i32 (...) @solcon_read_standard_solutions()
store i32 %2, i32* %1
%3 = call i32 (...) @retrieve_all_standard_solution_strings()
ret void
}

LLVM IR (-O2):
define void @test_retrieve_all_standard_solution_strings() {
%1 = tail call i32 (...) @solcon_read_standard_solutions()
%2 = tail call i32 (...) @retrieve_all_standard_solution_strings()
ret void
}
void foo414() {}


x86 assembly (clang, -O0):
<foo414>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo414>:
ret

LLVM IR (-O0):
define void @foo414() {
ret void
}

LLVM IR (-O2):
define void @foo414() {
ret void
}
/* Type definitions */
typedef scalar_t__ uint64_t;

/* Variables and functions */
int Bits_log2x64(scalar_t__);
scalar_t__ Endian_byteSwap64_manual(scalar_t__);
int Bits_log2x64_be(uint64_t number) {
  return Bits_log2x64(
      ((uint64_t)Endian_byteSwap64_manual(((uint64_t)(number)))));
}


x86 assembly (clang, -O0):
<Bits_log2x64_be>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <Endian_byteSwap64_manual@plt>
mov    %rax,%rdi
call   1030 <Bits_log2x64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Bits_log2x64_be>:
push   %rax
call   1040 <Endian_byteSwap64_manual@plt>
mov    %rax,%rdi
pop    %rax
jmp    1030 <Bits_log2x64@plt>

LLVM IR (-O0):
define i32 @Bits_log2x64_be(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @Endian_byteSwap64_manual(i64 %3)
%5 = call i32 @Bits_log2x64(i64 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @Bits_log2x64_be(i64 %0) {
%2 = tail call i64 @Endian_byteSwap64_manual(i64 %0)
%3 = tail call i32 @Bits_log2x64(i64 %2)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t pwm_calc_resolution(int pwm_frequency, int clock_frequency) {
  float pwm_period = 1.0 / pwm_frequency;
  float clock_period = 1.0 / clock_frequency;
  return (uint32_t)(pwm_period / clock_period);
}


x86 assembly (clang, -O0):
<pwm_calc_resolution>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm1
movsd  0xee9(%rip),%xmm0
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0xc(%rbp)
cvtsi2sdl -0x8(%rbp),%xmm1
movsd  0xecf(%rip),%xmm0
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
divss  -0x10(%rbp),%xmm0
cvttss2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pwm_calc_resolution>:
movd   %esi,%xmm0
movd   %edi,%xmm1
punpckldq %xmm0,%xmm1
cvtdq2pd %xmm1,%xmm0
movapd 0xee8(%rip),%xmm1
divpd  %xmm0,%xmm1
cvtpd2ps %xmm1,%xmm0
movapd %xmm0,%xmm1
shufps $0x55,%xmm0,%xmm1
divss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @pwm_calc_resolution(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca float
%6 = alloca float
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = sitofp i32 %7 to double
%9 = fdiv double 1.000000e+00, %8
%10 = fptrunc double %9 to float
store float %10, float* %5
%11 = load i32, i32* %4
%12 = sitofp i32 %11 to double
%13 = fdiv double 1.000000e+00, %12
%14 = fptrunc double %13 to float
store float %14, float* %6
%15 = load float, float* %5
%16 = load float, float* %6
%17 = fdiv float %15, %16
%18 = fptosi float %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @pwm_calc_resolution(i32 %0, i32 %1) {
%3 = insertelement <2 x i32> poison, i32 %0, i64 0
%4 = insertelement <2 x i32> %3, i32 %1, i64 1
%5 = sitofp <2 x i32> %4 to <2 x double>
%6 = fdiv <2 x double> <double 1.000000e+00, double 1.000000e+00>, %5
%7 = fptrunc <2 x double> %6 to <2 x float>
%8 = extractelement <2 x float> %7, i64 0
%9 = extractelement <2 x float> %7, i64 1
%10 = fdiv float %8, %9
%11 = fptosi float %10 to i32
ret i32 %11
}
double dot(double a[3], double b[3]) {
  double output;
  output = (a[0] * b[0]) + (a[1] * b[1]) + (a[2] * b[2]);
  return (output);
}


x86 assembly (clang, -O0):
<dot>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x10(%rbp),%rax
mulsd  0x8(%rax),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x10(%rbp),%rax
movsd  0x10(%rax),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dot>:
movsd  0x8(%rdi),%xmm0
mulsd  0x8(%rsi),%xmm0
movsd  (%rdi),%xmm1
mulsd  (%rsi),%xmm1
addsd  %xmm0,%xmm1
movsd  0x10(%rdi),%xmm0
mulsd  0x10(%rsi),%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @dot(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
%5 = alloca double
store double* %0, double** %3
store double* %1, double** %4
%6 = load double*, double** %3
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = load double*, double** %4
%10 = getelementptr inbounds double, double* %9, i64 0
%11 = load double, double* %10
%12 = load double*, double** %3
%13 = getelementptr inbounds double, double* %12, i64 1
%14 = load double, double* %13
%15 = load double*, double** %4
%16 = getelementptr inbounds double, double* %15, i64 1
%17 = load double, double* %16
%18 = fmul double %14, %17
%19 = call double @llvm.fmuladd.f64(double %8, double %11, double %18)
%20 = load double*, double** %3
%21 = getelementptr inbounds double, double* %20, i64 2
%22 = load double, double* %21
%23 = load double*, double** %4
%24 = getelementptr inbounds double, double* %23, i64 2
%25 = load double, double* %24
%26 = call double @llvm.fmuladd.f64(double %22, double %25, double %19)
store double %26, double* %5
%27 = load double, double* %5
ret double %27
}

LLVM IR (-O2):
define double @dot(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %0
%4 = load double, double* %1
%5 = getelementptr inbounds double, double* %0, i64 1
%6 = load double, double* %5
%7 = getelementptr inbounds double, double* %1, i64 1
%8 = load double, double* %7
%9 = fmul double %6, %8
%10 = tail call double @llvm.fmuladd.f64(double %3, double %4, double %9)
%11 = getelementptr inbounds double, double* %0, i64 2
%12 = load double, double* %11
%13 = getelementptr inbounds double, double* %1, i64 2
%14 = load double, double* %13
%15 = tail call double @llvm.fmuladd.f64(double %12, double %14, double %10)
ret double %15
}
/* Type definitions */
struct userdel_args_info {
  int dummy;
};

/* Variables and functions */
int EXIT_SUCCESS;
int userdel_cmdline_parser_required(struct userdel_args_info *args_info,
                                    const char *prog_name) {
  (void)(args_info);
  (void)(prog_name);
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<userdel_cmdline_parser_required>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ecd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<userdel_cmdline_parser_required>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
%struct.userdel_args_info = type { i32 }
@EXIT_SUCCESS = global i32 0
define i32 @userdel_cmdline_parser_required(%struct.userdel_args_info* %0, i8* %1) {
%3 = alloca %struct.userdel_args_info*
%4 = alloca i8*
store %struct.userdel_args_info* %0, %struct.userdel_args_info** %3
store i8* %1, i8** %4
%5 = load %struct.userdel_args_info*, %struct.userdel_args_info** %3
%6 = load i8*, i8** %4
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}

LLVM IR (-O2):
%struct.userdel_args_info = type { i32 }
@EXIT_SUCCESS = global i32 0
define i32 @userdel_cmdline_parser_required(%struct.userdel_args_info* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}
void DivXFileSysSimInstrument(int action, int effect, ...) {}


x86 assembly (clang, -O0):
<DivXFileSysSimInstrument>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<DivXFileSysSimInstrument>:
ret

LLVM IR (-O0):
define void @DivXFileSysSimInstrument(i32 %0, i32 %1, ...) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @DivXFileSysSimInstrument(i32 %0, i32 %1, ...) {
ret void
}