#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int fn_sq_qtg_1_4_cl_48_57_65_70_91_91_97_102_ch_58_qtg_1_4_cl_48_57_65_70_91_91_97_102(
    char const *);
int fn_sq_qtg_3_3_sq_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57_cl_46_46_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57(
    char const *);
int fn_al_sq_qtg_1_4_cl_48_57_65_70_91_91_97_102_ch_58_qtg_1_4_cl_48_57_65_70_91_91_97_102_sq_qtg_3_3_sq_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57_cl_46_46_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57(
    const char *text) {
  int pos = 0;
  pos =
      fn_sq_qtg_1_4_cl_48_57_65_70_91_91_97_102_ch_58_qtg_1_4_cl_48_57_65_70_91_91_97_102(
          text);
  if (pos != -1)
    return pos;
  pos =
      fn_sq_qtg_3_3_sq_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57_cl_46_46_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57(
          text);
  if (pos != -1)
    return pos;
  return -1;
}


x86 assembly (clang, -O0):
<fn_al_sq_qtg_1_4_cl_48_57_65_70_91_91_97_102_ch_58_qtg_1_4_cl_48_57_65_70_91_91_97_102_sq_qtg_3_3_sq_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57_cl_46_46_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <fn_sq_qtg_1_4_cl_48_57_65_70_91_91_97_102_ch_58_qtg_1_4_cl_48_57_65_70_91_91_97_102@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xffffffff,-0x14(%rbp)
je     1154 <fn_al_sq_qtg_1_4_cl_48_57_65_70_91_91_97_102_ch_58_qtg_1_4_cl_48_57_65_70_91_91_97_102_sq_qtg_3_3_sq_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57_cl_46_46_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57+0x34>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    117c <fn_al_sq_qtg_1_4_cl_48_57_65_70_91_91_97_102_ch_58_qtg_1_4_cl_48_57_65_70_91_91_97_102_sq_qtg_3_3_sq_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57_cl_46_46_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57+0x5c>
mov    -0x10(%rbp),%rdi
call   1030 <fn_sq_qtg_3_3_sq_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57_cl_46_46_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xffffffff,-0x14(%rbp)
je     1175 <fn_al_sq_qtg_1_4_cl_48_57_65_70_91_91_97_102_ch_58_qtg_1_4_cl_48_57_65_70_91_91_97_102_sq_qtg_3_3_sq_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57_cl_46_46_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57+0x55>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    117c <fn_al_sq_qtg_1_4_cl_48_57_65_70_91_91_97_102_ch_58_qtg_1_4_cl_48_57_65_70_91_91_97_102_sq_qtg_3_3_sq_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57_cl_46_46_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57+0x5c>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_al_sq_qtg_1_4_cl_48_57_65_70_91_91_97_102_ch_58_qtg_1_4_cl_48_57_65_70_91_91_97_102_sq_qtg_3_3_sq_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57_cl_46_46_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57>:
push   %rbx
mov    %rdi,%rbx
call   1040 <fn_sq_qtg_1_4_cl_48_57_65_70_91_91_97_102_ch_58_qtg_1_4_cl_48_57_65_70_91_91_97_102@plt>
cmp    $0xffffffff,%eax
je     1130 <fn_al_sq_qtg_1_4_cl_48_57_65_70_91_91_97_102_ch_58_qtg_1_4_cl_48_57_65_70_91_91_97_102_sq_qtg_3_3_sq_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57_cl_46_46_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57+0x10>
pop    %rbx
ret
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <fn_sq_qtg_3_3_sq_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57_cl_46_46_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57@plt>

LLVM IR (-O0):
define i32 @fn_al_sq_qtg_1_4_cl_48_57_65_70_91_91_97_102_ch_58_qtg_1_4_cl_48_57_65_70_91_91_97_102_sq_qtg_3_3_sq_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57_cl_46_46_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @fn_sq_qtg_1_4_cl_48_57_65_70_91_91_97_102_ch_58_qtg_1_4_cl_48_57_65_70_91_91_97_102(i8* %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, -1
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i32, i32* %4
store i32 %10, i32* %2
br label %19
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = call i32 @fn_sq_qtg_3_3_sq_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57_cl_46_46_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57(i8* %12)
store i32 %13, i32* %4
%14 = load i32, i32* %4
%15 = icmp ne i32 %14, -1
br i1 %15, label %16, label %18
16: ; preds = %11
%17 = load i32, i32* %4
store i32 %17, i32* %2
br label %19
18: ; preds = %11
store i32 -1, i32* %2
br label %19
19: ; preds = %18, %16, %9
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @fn_al_sq_qtg_1_4_cl_48_57_65_70_91_91_97_102_ch_58_qtg_1_4_cl_48_57_65_70_91_91_97_102_sq_qtg_3_3_sq_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57_cl_46_46_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57(i8* %0) {
%2 = tail call i32 @fn_sq_qtg_1_4_cl_48_57_65_70_91_91_97_102_ch_58_qtg_1_4_cl_48_57_65_70_91_91_97_102(i8* %0)
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @fn_sq_qtg_3_3_sq_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57_cl_46_46_al_sq_ch_50_ch_53_cl_48_53_sq_ch_50_cl_48_52_cl_48_57_sq_ch_49_cl_48_57_cl_48_57_sq_cl_49_57_cl_48_57_sq_cl_48_57(i8* %0)
br label %6
6: ; preds = %4, %1
%7 = phi i32 [ %2, %1 ], [ %5, %4 ]
ret i32 %7
}