xunge/DecIR huggingface dataset:
/* Variables and functions */
int EOF;
int getchar();
int /*<<< orphan*/ putchar(int);
int main() {
  int c;
  while ((c = getchar()) != EOF)
    switch (c) {
    case '\\t':
    case '\\b':
    case '\\':
      putchar('\\\\');
      break;
    default:
      putchar(c);
      break;
    }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %eax,-0x8(%rbp)
mov    0x2ea8(%rip),%rcx
cmp    (%rcx),%eax
je     119e <main+0x7e>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x5c,%eax
je     1182 <main+0x62>
jmp    115c <main+0x3c>
mov    -0xc(%rbp),%eax
sub    $0x5c62,%eax
je     1182 <main+0x62>
jmp    116f <main+0x4f>
mov    -0xc(%rbp),%eax
sub    $0x5c74,%eax
jne    1191 <main+0x71>
jmp    1182 <main+0x62>
mov    $0x5c5c,%edi
call   1030 <putchar@plt>
jmp    1199 <main+0x79>
mov    -0x8(%rbp),%edi
call   1030 <putchar@plt>
jmp    112f <main+0xf>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <getchar@plt>
mov    0x2eb9(%rip),%rbx
jmp    114c <main+0x2c>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
call   1030 <putchar@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
cmp    (%rbx),%eax
je     116c <main+0x4c>
mov    $0x5c5c,%edi
cmp    $0x5c,%eax
je     1140 <main+0x20>
cmp    $0x5c62,%eax
je     1140 <main+0x20>
cmp    $0x5c74,%eax
je     1140 <main+0x20>
mov    %eax,%edi
jmp    1140 <main+0x20>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@EOF = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %14, %0
%4 = call i32 (...) @getchar()
store i32 %4, i32* %2
%5 = load i32, i32* @EOF
%6 = icmp ne i32 %4, %5
br i1 %6, label %7, label %15
7: ; preds = %3
%8 = load i32, i32* %2
switch i32 %8, label %11 [
i32 23668, label %9
i32 23650, label %9
i32 92, label %9
]
9: ; preds = %7, %7, %7
%10 = call i32 @putchar(i32 23644)
br label %14
11: ; preds = %7
%12 = load i32, i32* %2
%13 = call i32 @putchar(i32 %12)
br label %14
14: ; preds = %11, %9
br label %3
15: ; preds = %3
%16 = load i32, i32* %1
ret i32 %16
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @main() {
%1 = tail call i32 (...) @getchar()
%2 = load i32, i32* @EOF
%3 = icmp eq i32 %1, %2
br i1 %3, label %13, label %4
4: ; preds = %0, %7
%5 = phi i32 [ %10, %7 ], [ %1, %0 ]
switch i32 %5, label %6 [
i32 23668, label %7
i32 23650, label %7
i32 92, label %7
]
6: ; preds = %4
br label %7
7: ; preds = %4, %4, %4, %6
%8 = phi i32 [ %5, %6 ], [ 23644, %4 ], [ 23644, %4 ], [ 23644, %4 ]
%9 = tail call i32 @putchar(i32 %8)
%10 = tail call i32 (...) @getchar()
%11 = load i32, i32* @EOF
%12 = icmp eq i32 %10, %11
br i1 %12, label %13, label %4
13: ; preds = %7, %0
ret i32 0
}
/* Type definitions */
typedef scalar_t__ uint_least64_t;

/* Variables and functions */
bool SHAREMIND_SET_KEY_LESS_THAN_uint_least64_t(uint_least64_t const k1,
                                                uint_least64_t const k2) {
  return k1 < k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_SET_KEY_LESS_THAN_uint_least64_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_SET_KEY_LESS_THAN_uint_least64_t>:
xor    %eax,%eax
cmp    %rsi,%rdi
setl   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_SET_KEY_LESS_THAN_uint_least64_t(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @SHAREMIND_SET_KEY_LESS_THAN_uint_least64_t(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_min_ps(int /*<<< orphan*/, int /*<<< orphan*/);
__m128 __attribute__((no, unused)) test(__m128 s1, __m128 s2) {
  return _mm_min_ps(s1, s2);
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_min_ps@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
jmp    1030 <_mm_min_ps@plt>

LLVM IR (-O0):
define i32 @test(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_min_ps(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_min_ps(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ SSIBaseValid(unsigned long);
void SSIDMADisable(unsigned long ulBase, unsigned long ulDMAFlags) {
  DEBUG_ASSERT(SSIBaseValid(ulBase));
  (*((volatile unsigned long *)(ulBase + 0x00000024))) &= ~ulDMAFlags;
}


x86 assembly (clang, -O0):
<SSIDMADisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <SSIBaseValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rdx
xor    $0xffffffffffffffff,%rdx
mov    -0x8(%rbp),%rax
mov    0x24(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x24(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSIDMADisable>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
call   1040 <SSIBaseValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
not    %rbx
and    %rbx,0x24(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @SSIDMADisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = call i32 @SSIBaseValid(i64 %5)
%7 = call i32 @DEBUG_ASSERT(i32 %6)
%8 = load i64, i64* %4
%9 = xor i64 %8, -1
%10 = load i64, i64* %3
%11 = add i64 %10, 36
%12 = inttoptr i64 %11 to i64*
%13 = load volatile i64, i64* %12
%14 = and i64 %13, %9
store volatile i64 %14, i64* %12
ret void
}

LLVM IR (-O2):
define void @SSIDMADisable(i64 %0, i64 %1) {
%3 = tail call i32 @SSIBaseValid(i64 %0)
%4 = tail call i32 @DEBUG_ASSERT(i32 %3)
%5 = xor i64 %1, -1
%6 = add i64 %0, 36
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = and i64 %8, %5
store volatile i64 %9, i64* %7
ret void
}
/* Variables and functions */
int Factorial(int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("%d\n", Factorial(10));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xa,%edi
call   1040 <Factorial@plt>
mov    %eax,%esi
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
call   1040 <Factorial@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @Factorial(i32 10)
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @Factorial(i32 10)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  double x = 1.0 / 10.0;
  double y = x * 10.0;
  if (y != 1.0)
    printf("Oh ow!!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movsd  0xee9(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xed4(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  0xeb5(%rip),%xmm1
ucomisd %xmm1,%xmm0
jne    1160 <main+0x50>
jp     1160 <main+0x50>
jmp    116c <main+0x5c>
lea    0xeb1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [9 x i8] c"Oh ow!!\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca double
store i32 0, i32* %1
store double 1.000000e-01, double* %2
%4 = load double, double* %2
%5 = fmul double %4, 1.000000e+01
store double %5, double* %3
%6 = load double, double* %3
%7 = fcmp une double %6, 1.000000e+00
br i1 %7, label %8, label %10
8: ; preds = %0
%9 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
int cpuidle_enter_state_coupled(struct cpuidle_device *dev,
                                struct cpuidle_driver *drv, int next_state) {
  return -1;
}


x86 assembly (clang, -O0):
<cpuidle_enter_state_coupled>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuidle_enter_state_coupled>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.cpuidle_device = type opaque
%struct.cpuidle_driver = type opaque
define i32 @cpuidle_enter_state_coupled(%struct.cpuidle_device* %0, %struct.cpuidle_driver* %1, i32 %2) {
%4 = alloca %struct.cpuidle_device*
%5 = alloca %struct.cpuidle_driver*
%6 = alloca i32
store %struct.cpuidle_device* %0, %struct.cpuidle_device** %4
store %struct.cpuidle_driver* %1, %struct.cpuidle_driver** %5
store i32 %2, i32* %6
ret i32 -1
}

LLVM IR (-O2):
%struct.cpuidle_device = type opaque
%struct.cpuidle_driver = type opaque
define i32 @cpuidle_enter_state_coupled(%struct.cpuidle_device* nocapture readnone %0, %struct.cpuidle_driver* nocapture readnone %1, i32 %2) {
ret i32 -1
}
int test_imm_7Euint8_reg(unsigned char val) {
  return ((val) & (-0x7E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Euint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffff82,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Euint8_reg>:
test   $0x82,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Euint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -126
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_7Euint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -126
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
double string_score_impl(char const *, char const *, double);
double string_fuzzy_score(const char *a, const char *b, double fuzziness) {
  return string_score_impl(a, b, fuzziness);
}


x86 assembly (clang, -O0):
<string_fuzzy_score>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movsd  %xmm0,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movsd  -0x18(%rbp),%xmm0
call   1030 <string_score_impl@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_fuzzy_score>:
jmp    1030 <string_score_impl@plt>

LLVM IR (-O0):
define double @string_fuzzy_score(i8* %0, i8* %1, double %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca double
store i8* %0, i8** %4
store i8* %1, i8** %5
store double %2, double* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load double, double* %6
%10 = call double @string_score_impl(i8* %7, i8* %8, double %9)
ret double %10
}

LLVM IR (-O2):
define double @string_fuzzy_score(i8* %0, i8* %1, double %2) {
%4 = tail call double @string_score_impl(i8* %0, i8* %1, double %2)
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void nr_free_lvector(unsigned long *v, long nl, long nh) {
  free((char *)(v + nl - 1));
}


x86 assembly (clang, -O0):
<nr_free_lvector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
shl    $0x3,%rax
add    %rax,%rdi
add    $0xfffffffffffffff8,%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nr_free_lvector>:
lea    (%rdi,%rsi,8),%rdi
add    $0xfffffffffffffff8,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @nr_free_lvector(i64* %0, i64 %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64*, i64** %4
%8 = load i64, i64* %5
%9 = getelementptr inbounds i64, i64* %7, i64 %8
%10 = getelementptr inbounds i64, i64* %9, i64 -1
%11 = bitcast i64* %10 to i8*
%12 = call i32 @free(i8* %11)
ret void
}

LLVM IR (-O2):
define void @nr_free_lvector(i64* nocapture %0, i64 %1, i64 %2) {
%4 = getelementptr inbounds i64, i64* %0, i64 %1
%5 = getelementptr inbounds i64, i64* %4, i64 -1
%6 = bitcast i64* %5 to i8*
%7 = tail call i32 @free(i8* %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf("glftpd DIRLOG update utility v3.1\n\n");
  printf(
      "glupdate [-r /pathto/glftpd.conf] [-i ...] [-h] <full directory path>\n "
      "Options:\n"
      " -r /path/file : alternative path to config file\n"
      " -i ...        : unlimited number of dirs to skip\n"
      "                 \".\", \"..\" and \"groups\" are skipped by default\n"
      " -h            : this screen\n");
  exit(0);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
lea    0xeed(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeef(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"glftpd DIRLOG update utility v3.1\0A\0A\00"
@.str.1 = [272 x i8] c"glupdate [-r /pathto/glftpd.conf] [-i ...] [-h] <full directory path>\0A Options:\0A -r /path/file : alternative path to config file\0A -i ... : unlimited number of dirs to skip\0A \22.\22, \22..\22 and \22groups\22 are skipped by default\0A -h : this screen\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([272 x i8], [272 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [35 x i8] c"glftpd DIRLOG update utility v3.1\0A\00"
@str.2 = [271 x i8] c"glupdate [-r /pathto/glftpd.conf] [-i ...] [-h] <full directory path>\0A Options:\0A -r /path/file : alternative path to config file\0A -i ... : unlimited number of dirs to skip\0A \22.\22, \22..\22 and \22groups\22 are skipped by default\0A -h : this screen\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([271 x i8], [271 x i8]* @str.2, i64 0, i64 0))
%3 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int juniper_fpga_partition_read_flag(int, int, char *);
int juniper_fpga_partition_idle(int devNo, int partNo) {
  return juniper_fpga_partition_read_flag(devNo, partNo, "accel_idle");
}


x86 assembly (clang, -O0):
<juniper_fpga_partition_idle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
lea    0xed5(%rip),%rdx
call   1030 <juniper_fpga_partition_read_flag@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<juniper_fpga_partition_idle>:
lea    0xee9(%rip),%rdx
jmp    1030 <juniper_fpga_partition_read_flag@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"accel_idle\00"
define i32 @juniper_fpga_partition_idle(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @juniper_fpga_partition_read_flag(i32 %5, i32 %6, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 %7
}

LLVM IR (-O2):
@.str = [11 x i8] c"accel_idle\00"
define i32 @juniper_fpga_partition_idle(i32 %0, i32 %1) {
%3 = tail call i32 @juniper_fpga_partition_read_flag(i32 %0, i32 %1, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 %3
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int solcon_standard_multi_affinization(int n, int m, int *z) {
  int fail;
  int pars[2];
  double c;
  pars[0] = n;
  pars[1] = m;
  fail = _ada_use_c2phc4c(913, pars, z, &c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_standard_multi_affinization>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
lea    -0x1c(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0x391,%edi
lea    -0x28(%rbp),%rcx
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_standard_multi_affinization>:
sub    $0x18,%rsp
mov    %edi,0x8(%rsp)
mov    %esi,0xc(%rsp)
lea    0x8(%rsp),%rsi
lea    0x10(%rsp),%rcx
mov    $0x391,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @solcon_standard_multi_affinization(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
%8 = alloca [2 x i32]
%9 = alloca double
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%10 = load i32, i32* %4
%11 = getelementptr inbounds [2 x i32], [2 x i32]* %8, i64 0, i64 0
store i32 %10, i32* %11
%12 = load i32, i32* %5
%13 = getelementptr inbounds [2 x i32], [2 x i32]* %8, i64 0, i64 1
store i32 %12, i32* %13
%14 = getelementptr inbounds [2 x i32], [2 x i32]* %8, i64 0, i64 0
%15 = load i32*, i32** %6
%16 = call i32 @_ada_use_c2phc4c(i32 913, i32* %14, i32* %15, double* %9, i32 0)
store i32 %16, i32* %7
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
define i32 @solcon_standard_multi_affinization(i32 %0, i32 %1, i32* %2) {
%4 = alloca [2 x i32]
%5 = alloca double
%6 = bitcast [2 x i32]* %4 to i8*
%7 = bitcast double* %5 to i8*
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 0
store i32 %0, i32* %8
%9 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 1
store i32 %1, i32* %9
%10 = call i32 @_ada_use_c2phc4c(i32 913, i32* %8, i32* %2, double* %5, i32 0)
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void display_usage() {
  printf(
      "Usage：ls [options]... [file]...\n"
      "List information about the FILEs (the current directory by default).\n"
      "\n"
      "Options:\n"
      "-a			do not ignore entries starting with .\n"
      "-d			list directory entries instead of contents,\n"
      "			  and do not dereference symbolic links\n"
      "-h			display this help and exit\n"
      "-i			print the index number of each file\n"
      "-l			use a long listing format\n"
      "-r			reverse order while sorting\n"
      "-R			list subdirectories recursively\n"
      "-S			sort by file size\n");
}


x86 assembly (clang, -O0):
<display_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [446 x i8] c"Usage\EF\BC\9Als [options]... [file]...\0AList information about the FILEs (the current directory by default).\0A\0AOptions:\0A-a\09\09\09do not ignore entries starting with .\0A-d\09\09\09list directory entries instead of contents,\0A\09\09\09 and do not dereference symbolic links\0A-h\09\09\09display this help and exit\0A-i\09\09\09print the index number of each file\0A-l\09\09\09use a long listing format\0A-r\09\09\09reverse order while sorting\0A-R\09\09\09list subdirectories recursively\0A-S\09\09\09sort by file size\0A\00"
define void @display_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([446 x i8], [446 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [445 x i8] c"Usage\EF\BC\9Als [options]... [file]...\0AList information about the FILEs (the current directory by default).\0A\0AOptions:\0A-a\09\09\09do not ignore entries starting with .\0A-d\09\09\09list directory entries instead of contents,\0A\09\09\09 and do not dereference symbolic links\0A-h\09\09\09display this help and exit\0A-i\09\09\09print the index number of each file\0A-l\09\09\09use a long listing format\0A-r\09\09\09reverse order while sorting\0A-R\09\09\09list subdirectories recursively\0A-S\09\09\09sort by file size\00"
define void @display_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([445 x i8], [445 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, float *, float *);
int main(void) {
  float value1, value2;
  printf("enter value1 and value2: ");
  scanf("%f%f", &value1, &value2);
  printf("value1=%.2f, value2=%.2f\n", value1, value2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xed6(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1040 <scanf@plt>
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movss  -0xc(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
lea    0xeb5(%rip),%rdi
mov    $0x2,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xee4(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <scanf@plt>
movss  0x4(%rsp),%xmm0
cvtss2sd %xmm0,%xmm0
movss  (%rsp),%xmm1
cvtss2sd %xmm1,%xmm1
lea    0xec2(%rip),%rdi
mov    $0x2,%al
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"enter value1 and value2: \00"
@.str.1 = [5 x i8] c"%f%f\00"
@.str.2 = [26 x i8] c"value1=%.2f, value2=%.2f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca float
%3 = alloca float
store i32 0, i32* %1
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), float* %2, float* %3)
%6 = load float, float* %2
%7 = fpext float %6 to double
%8 = load float, float* %3
%9 = fpext float %8 to double
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i64 0, i64 0), double %7, double %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [26 x i8] c"enter value1 and value2: \00"
@.str.1 = [5 x i8] c"%f%f\00"
@.str.2 = [26 x i8] c"value1=%.2f, value2=%.2f\0A\00"
define i32 @main() {
%1 = alloca float
%2 = alloca float
%3 = bitcast float* %1 to i8*
%4 = bitcast float* %2 to i8*
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), float* %1, float* %2)
%7 = load float, float* %1
%8 = fpext float %7 to double
%9 = load float, float* %2
%10 = fpext float %9 to double
%11 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i64 0, i64 0), double %8, double %10)
ret i32 0
}
/* Variables and functions */
int summing(int);
int sra(int register2, int number) {
  return (register2 >> number + summing(number) * (register2 >> 31));
}


x86 assembly (clang, -O0):
<sra>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <summing@plt>
mov    -0x10(%rbp),%ecx
mov    %eax,%edx
mov    -0xc(%rbp),%eax
mov    -0x4(%rbp),%esi
sar    $0x1f,%esi
imul   %esi,%edx
add    %edx,%ecx
sar    %cl,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sra>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %esi,%edi
call   1030 <summing@plt>
mov    %ebp,%ecx
sar    $0x1f,%ecx
imul   %eax,%ecx
add    %ebx,%ecx
sar    %cl,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @sra(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = load i32, i32* %4
%8 = call i32 @summing(i32 %7)
%9 = load i32, i32* %3
%10 = ashr i32 %9, 31
%11 = mul nsw i32 %8, %10
%12 = add nsw i32 %6, %11
%13 = ashr i32 %5, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @sra(i32 %0, i32 %1) {
%3 = tail call i32 @summing(i32 %1)
%4 = ashr i32 %0, 31
%5 = mul nsw i32 %3, %4
%6 = add nsw i32 %5, %1
%7 = ashr i32 %0, %6
ret i32 %7
}
nullsys() {}


x86 assembly (clang, -O0):
<nullsys>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nullsys>:
ret

LLVM IR (-O0):
define i32 @nullsys() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @nullsys() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ kfree(void *);
scalar_t__ kmalloc(int);
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ read_mem2hd(char *, char *, int);
void command_cat(char *inputed_command) {
  char *src = (char *)kmalloc(200000);
  read_mem2hd(inputed_command + 4, src, 256);
  puts(src);
  kfree((void *)src);
}


x86 assembly (clang, -O0):
<command_cat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x30d40,%edi
call   1060 <kmalloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x4,%rdi
mov    -0x10(%rbp),%rsi
mov    $0x100,%edx
call   1040 <read_mem2hd@plt>
mov    -0x10(%rbp),%rdi
call   1030 <puts@plt>
mov    -0x10(%rbp),%rdi
call   1050 <kfree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<command_cat>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    $0x30d40,%edi
call   1060 <kmalloc@plt>
mov    %rax,%r14
add    $0x4,%rbx
mov    %rbx,%rdi
mov    %rax,%rsi
mov    $0x100,%edx
call   1040 <read_mem2hd@plt>
mov    %r14,%rdi
call   1030 <puts@plt>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1050 <kfree@plt>

LLVM IR (-O0):
define void @command_cat(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = call i64 @kmalloc(i32 200000)
%5 = inttoptr i64 %4 to i8*
store i8* %5, i8** %3
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i64 4
%8 = load i8*, i8** %3
%9 = call i32 @read_mem2hd(i8* %7, i8* %8, i32 256)
%10 = load i8*, i8** %3
%11 = call i32 @puts(i8* %10)
%12 = load i8*, i8** %3
%13 = call i32 @kfree(i8* %12)
ret void
}

LLVM IR (-O2):
define void @command_cat(i8* %0) {
%2 = tail call i64 @kmalloc(i32 200000)
%3 = inttoptr i64 %2 to i8*
%4 = getelementptr inbounds i8, i8* %0, i64 4
%5 = tail call i32 @read_mem2hd(i8* %4, i8* %3, i32 256)
%6 = tail call i32 @puts(i8* dereferenceable(1) %3)
%7 = tail call i32 @kfree(i8* %3)
ret void
}
/* Variables and functions */
double const CSPL_Special_Erf_inverse1(double);
double const sqrt(int);
double CSPL_Stats_Normal_Quantilefn(const double F, const double mean,
                                    const double stddev) {
  return (mean + stddev * sqrt(2) * CSPL_Special_Erf_inverse1(2.0 * F - 1.0));
}


x86 assembly (clang, -O0):
<CSPL_Stats_Normal_Quantilefn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x30(%rbp)
mov    $0x2,%edi
call   1040 <sqrt@plt>
movaps %xmm0,%xmm1
movsd  -0x30(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  %xmm0,%xmm0
movsd  0xe89(%rip),%xmm1
addsd  %xmm1,%xmm0
call   1030 <CSPL_Special_Erf_inverse1@plt>
movsd  -0x28(%rbp),%xmm1
movaps %xmm0,%xmm2
movsd  -0x20(%rbp),%xmm0
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CSPL_Stats_Normal_Quantilefn>:
sub    $0x18,%rsp
movsd  %xmm2,(%rsp)
movsd  %xmm1,0x10(%rsp)
movsd  %xmm0,0x8(%rsp)
mov    $0x2,%edi
call   1040 <sqrt@plt>
mulsd  (%rsp),%xmm0
movsd  %xmm0,(%rsp)
movsd  0x8(%rsp),%xmm0
addsd  %xmm0,%xmm0
addsd  0xea5(%rip),%xmm0
call   1030 <CSPL_Special_Erf_inverse1@plt>
mulsd  (%rsp),%xmm0
addsd  0x10(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @CSPL_Stats_Normal_Quantilefn(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %5
%8 = load double, double* %6
%9 = call double @sqrt(i32 2)
%10 = fmul double %8, %9
%11 = load double, double* %4
%12 = call double @llvm.fmuladd.f64(double 2.000000e+00, double %11, double -1.000000e+00)
%13 = call double @CSPL_Special_Erf_inverse1(double %12)
%14 = call double @llvm.fmuladd.f64(double %10, double %13, double %7)
ret double %14
}

LLVM IR (-O2):
define double @CSPL_Stats_Normal_Quantilefn(double %0, double %1, double %2) {
%4 = tail call double @sqrt(i32 2)
%5 = fmul double %4, %2
%6 = tail call double @llvm.fmuladd.f64(double %0, double 2.000000e+00, double -1.000000e+00)
%7 = tail call double @CSPL_Special_Erf_inverse1(double %6)
%8 = tail call double @llvm.fmuladd.f64(double %5, double %7, double %1)
ret double %8
}
int f91(int x) {
  if (x > 100)
    return x - 10;
  else {
    return f91(f91(x + 11));
  }
}


x86 assembly (clang, -O0):
<f91>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x64,-0x8(%rbp)
jle    1133 <f91+0x23>
mov    -0x8(%rbp),%eax
sub    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    1148 <f91+0x38>
mov    -0x8(%rbp),%edi
add    $0xb,%edi
call   1030 <f91@plt>
mov    %eax,%edi
call   1030 <f91@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f91>:
push   %rax
mov    %edi,%eax
cmp    $0x64,%edi
jg     112f <f91+0x1f>
nopl   0x0(%rax,%rax,1)
add    $0xb,%eax
mov    %eax,%edi
call   1030 <f91@plt>
cmp    $0x64,%eax
jbe    1120 <f91+0x10>
add    $0xfffffff6,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @f91(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 100
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sub nsw i32 %7, 10
store i32 %8, i32* %2
br label %14
9: ; preds = %1
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 11
%12 = call i32 @f91(i32 %11)
%13 = call i32 @f91(i32 %12)
store i32 %13, i32* %2
br label %14
14: ; preds = %9, %6
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @f91(i32 %0) {
%2 = icmp sgt i32 %0, 100
br i1 %2, label %3, label %6
3: ; preds = %6, %1
%4 = phi i32 [ %0, %1 ], [ %9, %6 ]
%5 = add nsw i32 %4, -10
ret i32 %5
6: ; preds = %1, %6
%7 = phi i32 [ %9, %6 ], [ %0, %1 ]
%8 = add nsw i32 %7, 11
%9 = tail call i32 @f91(i32 %8)
%10 = icmp ugt i32 %9, 100
br i1 %10, label %3, label %6
}
/* Variables and functions */
int rand();
int /*<<< orphan*/ swap(int *, int, int);
void shuffle(int nums[], int len) {
  for (int i = len - 1; i > 0; i--) {
    swap(nums, i, rand() % (i + 1));
  }
}


x86 assembly (clang, -O0):
<shuffle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jle    117a <shuffle+0x5a>
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1040 <rand@plt>
mov    -0x20(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x10(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
call   1030 <swap@plt>
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    1138 <shuffle+0x18>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shuffle>:
push   %rbp
push   %r14
push   %rbx
cmp    $0x2,%esi
jl     114e <shuffle+0x2e>
mov    %esi,%ebx
mov    %rdi,%r14
xchg   %ax,%ax
xor    %eax,%eax
call   1040 <rand@plt>
cltd
idiv   %ebx
lea    -0x1(%rbx),%ebp
mov    %r14,%rdi
mov    %ebp,%esi
call   1030 <swap@plt>
cmp    $0x2,%ebx
mov    %ebp,%ebx
ja     1130 <shuffle+0x10>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @shuffle(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
store i32 %7, i32* %5
br label %8
8: ; preds = %19, %2
%9 = load i32, i32* %5
%10 = icmp sgt i32 %9, 0
br i1 %10, label %11, label %22
11: ; preds = %8
%12 = load i32*, i32** %3
%13 = load i32, i32* %5
%14 = call i32 (...) @rand()
%15 = load i32, i32* %5
%16 = add nsw i32 %15, 1
%17 = srem i32 %14, %16
%18 = call i32 @swap(i32* %12, i32 %13, i32 %17)
br label %19
19: ; preds = %11
%20 = load i32, i32* %5
%21 = add nsw i32 %20, -1
store i32 %21, i32* %5
br label %8
22: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @shuffle(i32* %0, i32 %1) {
%3 = icmp sgt i32 %1, 1
br i1 %3, label %5, label %4
4: ; preds = %5, %2
ret void
5: ; preds = %2, %5
%6 = phi i32 [ %7, %5 ], [ %1, %2 ]
%7 = add nsw i32 %6, -1
%8 = tail call i32 (...) @rand()
%9 = srem i32 %8, %6
%10 = tail call i32 @swap(i32* %0, i32 %7, i32 %9)
%11 = icmp ugt i32 %6, 2
br i1 %11, label %5, label %4
}
/* Variables and functions */
float __nv_fast_expf(float);
float __expf(float __a) { return __nv_fast_expf(__a); }


x86 assembly (clang, -O0):
<__expf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <__nv_fast_expf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__expf>:
jmp    1030 <__nv_fast_expf@plt>

LLVM IR (-O0):
define float @__expf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @__nv_fast_expf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @__expf(float %0) {
%2 = tail call float @__nv_fast_expf(float %0)
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
void *realloc(void *, size_t);
int /*<<< orphan*/ stderr;
void *xrealloc(void *p, size_t size, char *myname) {
  p = realloc(p, size);
  if (p == NULL) {
    fprintf(stderr, "%s: out of memory\n", myname);
    exit(2);
  }
  return p;
}


x86 assembly (clang, -O0):
<xrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1183 <xrealloc+0x53>
mov    0x2e79(%rip),%rax
mov    (%rax),%edi
mov    -0x18(%rbp),%rdx
lea    0xe8c(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x2,%edi
call   1050 <exit@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrealloc>:
push   %rbx
mov    %rdx,%rbx
call   1040 <realloc@plt>
test   %rax,%rax
je     1140 <xrealloc+0x10>
pop    %rbx
ret
mov    0x2e99(%rip),%rax
mov    (%rax),%edi
lea    0xeb0(%rip),%rsi
mov    %rbx,%rdx
call   1030 <fprintf@plt>
mov    $0x2,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [19 x i8] c"%s: out of memory\0A\00"
define i8* @xrealloc(i8* %0, i64 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = call i8* @realloc(i8* %7, i64 %8)
store i8* %9, i8** %4
%10 = load i8*, i8** %4
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %17
12: ; preds = %3
%13 = load i32, i32* @stderr
%14 = load i8*, i8** %6
%15 = call i32 @fprintf(i32 %13, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %14)
%16 = call i32 @exit(i32 2)
unreachable
17: ; preds = %3
%18 = load i8*, i8** %4
ret i8* %18
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [19 x i8] c"%s: out of memory\0A\00"
define noalias i8* @xrealloc(i8* nocapture %0, i64 %1, i8* %2) {
%4 = tail call i8* @realloc(i8* %0, i64 %1)
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %10
6: ; preds = %3
%7 = load i32, i32* @stderr
%8 = tail call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %2)
%9 = tail call i32 @exit(i32 2)
unreachable
10: ; preds = %3
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_idxset_size() {
  printf("NOT IMPLEMENTED:"
         "pa_idxset_size"
         "\n");
}


x86 assembly (clang, -O0):
<pa_idxset_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_idxset_size>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"NOT IMPLEMENTED:pa_idxset_size\0A\00"
define i32 @pa_idxset_size() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [31 x i8] c"NOT IMPLEMENTED:pa_idxset_size\00"
define i32 @pa_idxset_size() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isxdigit(int);
void t_isxdigit_0xb2() {
  Assert_real((isxdigit(178) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              895, ("isxdigit should be 0 for 0xb2"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0xb2>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb2,%edi
call   1030 <isxdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x37f,%edx
lea    0xf5c(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0xb2>:
push   %rax
mov    $0xb2,%edi
call   1030 <isxdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x37f,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0xb2\00"
define void @t_isxdigit_0xb2() {
%1 = call i64 @isxdigit(i32 178)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 895, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0xb2\00"
define void @t_isxdigit_0xb2() {
%1 = tail call i64 @isxdigit(i32 178)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 895, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t hash(uint32_t h) {
  h ^= (h >> 20) ^ (h >> 12);
  return h ^ (h >> 7) ^ (h >> 4);
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x14,%eax
mov    -0x4(%rbp),%ecx
sar    $0xc,%ecx
xor    %ecx,%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x7,%ecx
xor    %ecx,%eax
mov    -0x4(%rbp),%ecx
sar    $0x4,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    %edi,%eax
sar    $0xc,%eax
xor    %edi,%eax
sar    $0x14,%edi
xor    %edi,%eax
mov    %eax,%ecx
sar    $0x7,%ecx
xor    %eax,%ecx
sar    $0x4,%eax
xor    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @hash(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 20
%5 = load i32, i32* %2
%6 = ashr i32 %5, 12
%7 = xor i32 %4, %6
%8 = load i32, i32* %2
%9 = xor i32 %8, %7
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = load i32, i32* %2
%12 = ashr i32 %11, 7
%13 = xor i32 %10, %12
%14 = load i32, i32* %2
%15 = ashr i32 %14, 4
%16 = xor i32 %13, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @hash(i32 %0) {
%2 = ashr i32 %0, 20
%3 = ashr i32 %0, 12
%4 = xor i32 %3, %0
%5 = xor i32 %4, %2
%6 = ashr i32 %5, 7
%7 = xor i32 %6, %5
%8 = ashr i32 %5, 4
%9 = xor i32 %7, %8
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
void parlcd_write_data(unsigned char *parlcd_mem_base, uint16_t data) {
  *(volatile uint16_t *)(parlcd_mem_base + 0x000C) = data;
}


x86 assembly (clang, -O0):
<parlcd_write_data>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<parlcd_write_data>:
mov    %esi,0xc(%rdi)
ret

LLVM IR (-O0):
define void @parlcd_write_data(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i64 12
%8 = bitcast i8* %7 to i32*
store volatile i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @parlcd_write_data(i8* %0, i32 %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 12
%4 = bitcast i8* %3 to i32*
store volatile i32 %1, i32* %4
ret void
}
int get_sr(int n) {
  int ret;
  return ret;
}


x86 assembly (clang, -O0):
<get_sr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_sr>:
ret

LLVM IR (-O0):
define i32 @get_sr(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @get_sr(i32 %0) {
ret i32 undef
}
/* Type definitions */
struct prng {
  int dummy;
};

/* Variables and functions */
unsigned int prng_bit(struct prng *);
unsigned int prng_rand(struct prng *prng) {
  unsigned int i, rv = 0;
  for (i = 0; i < 32; i++) {
    rv |= prng_bit(prng);
    rv <<= 1;
  }
  return rv;
}


x86 assembly (clang, -O0):
<prng_rand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x20,-0xc(%rbp)
jae    115a <prng_rand+0x4a>
mov    -0x8(%rbp),%rdi
call   1030 <prng_bit@plt>
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112a <prng_rand+0x1a>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prng_rand>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
xor    %ebx,%ebx
mov    $0x20,%ebp
xchg   %ax,%ax
mov    %r14,%rdi
call   1030 <prng_bit@plt>
or     %eax,%ebx
add    %ebx,%ebx
add    $0xffffffff,%ebp
jne    1120 <prng_rand+0x10>
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
%struct.prng = type { i32 }
define i32 @prng_rand(%struct.prng* %0) {
%2 = alloca %struct.prng*
%3 = alloca i32
%4 = alloca i32
store %struct.prng* %0, %struct.prng** %2
store i32 0, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %15, %1
%6 = load i32, i32* %3
%7 = icmp ult i32 %6, 32
br i1 %7, label %8, label %18
8: ; preds = %5
%9 = load %struct.prng*, %struct.prng** %2
%10 = call i32 @prng_bit(%struct.prng* %9)
%11 = load i32, i32* %4
%12 = or i32 %11, %10
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = shl i32 %13, 1
store i32 %14, i32* %4
br label %15
15: ; preds = %8
%16 = load i32, i32* %3
%17 = add i32 %16, 1
store i32 %17, i32* %3
br label %5
18: ; preds = %5
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
%struct.prng = type { i32 }
define i32 @prng_rand(%struct.prng* %0) {
br label %2
2: ; preds = %1, %2
%3 = phi i32 [ 0, %1 ], [ %7, %2 ]
%4 = phi i32 [ 0, %1 ], [ %8, %2 ]
%5 = tail call i32 @prng_bit(%struct.prng* %0)
%6 = or i32 %5, %3
%7 = shl i32 %6, 1
%8 = add nuw nsw i32 %4, 1
%9 = icmp eq i32 %8, 32
br i1 %9, label %10, label %2
10: ; preds = %2
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x82() {
  Assert_real((isspace(130) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              655, ("isspace should be 0 for 0x82"));
}


x86 assembly (clang, -O0):
<t_isspace_0x82>:
push   %rbp
mov    %rsp,%rbp
mov    $0x82,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x28f,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x82>:
push   %rax
mov    $0x82,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x28f,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0x82\00"
define void @t_isspace_0x82() {
%1 = call i64 @isspace(i32 130)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 655, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0x82\00"
define void @t_isspace_0x82() {
%1 = tail call i64 @isspace(i32 130)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 655, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ perm(int /*<<< orphan*/);
int main(void) { perm(0); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <perm@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <perm@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @perm(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @perm(i32 0)
ret i32 0
}
int Incrementa() {
  static int i;
  return ++i;
}


x86 assembly (clang, -O0):
<Incrementa>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f1a(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2f11(%rip)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Incrementa>:
mov    0x2f1e(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2f15(%rip)
ret

LLVM IR (-O0):
@Incrementa.i = internal global i32 0
define i32 @Incrementa() {
%1 = load i32, i32* @Incrementa.i
%2 = add nsw i32 %1, 1
store i32 %2, i32* @Incrementa.i
ret i32 %2
}

LLVM IR (-O2):
@Incrementa.i = internal unnamed_addr global i32 0
define i32 @Incrementa() {
%1 = load i32, i32* @Incrementa.i
%2 = add nsw i32 %1, 1
store i32 %2, i32* @Incrementa.i
ret i32 %2
}