xunge/DecIR huggingface dataset:
/* Variables and functions */
size_t strnlen(const char *s, size_t count) {
  const char *str = s;
  size_t c = 0;
  while (*str++ && count--)
    ++c;
  return c;
}


x86 assembly (clang, -O0):
<strnlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x21(%rbp)
je     1155 <strnlen+0x55>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x10(%rbp)
cmp    $0x0,%rax
setne  %al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%al
test   $0x1,%al
jne    1165 <strnlen+0x65>
jmp    1176 <strnlen+0x76>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    111c <strnlen+0x1c>
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strnlen>:
xor    %eax,%eax
cmpb   $0x0,(%rdi)
je     1133 <strnlen+0x33>
test   %rsi,%rsi
je     1133 <strnlen+0x33>
add    $0xffffffffffffffff,%rsi
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    0x1(%rcx),%rax
cmpb   $0x0,0x1(%rdi,%rcx,1)
je     1133 <strnlen+0x33>
cmp    %rcx,%rsi
mov    %rax,%rcx
jne    1120 <strnlen+0x20>
ret

LLVM IR (-O0):
define i64 @strnlen(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
store i64 0, i64* %6
br label %8
8: ; preds = %20, %2
%9 = load i8*, i8** %5
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %5
%11 = load i8, i8* %9
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %8
%15 = load i64, i64* %4
%16 = add i64 %15, -1
store i64 %16, i64* %4
%17 = icmp ne i64 %15, 0
br label %18
18: ; preds = %14, %8
%19 = phi i1 [ false, %8 ], [ %17, %14 ]
br i1 %19, label %20, label %23
20: ; preds = %18
%21 = load i64, i64* %6
%22 = add i64 %21, 1
store i64 %22, i64* %6
br label %8
23: ; preds = %18
%24 = load i64, i64* %6
ret i64 %24
}

LLVM IR (-O2):
define i64 @strnlen(i8* nocapture %0, i64 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
%5 = icmp eq i64 %1, 0
%6 = or i1 %4, %5
br i1 %6, label %18, label %7
7: ; preds = %2, %7
%8 = phi i64 [ %13, %7 ], [ 0, %2 ]
%9 = phi i8* [ %11, %7 ], [ %0, %2 ]
%10 = phi i64 [ %12, %7 ], [ %1, %2 ]
%11 = getelementptr inbounds i8, i8* %9, i64 1
%12 = add i64 %10, -1
%13 = add nuw i64 %8, 1
%14 = load i8, i8* %11
%15 = icmp eq i8 %14, 0
%16 = icmp eq i64 %12, 0
%17 = select i1 %15, i1 true, i1 %16
br i1 %17, label %18, label %7
18: ; preds = %7, %2
%19 = phi i64 [ 0, %2 ], [ %13, %7 ]
ret i64 %19
}
/* Variables and functions */
int strlen(char *);
char toupper(char);
int uppercase(char *s) {
  int i, nchar;
  nchar = strlen(s);
  for (i = 0; i < nchar; i++) {
    s[i] = toupper(s[i]);
  }
  return (0);
}


x86 assembly (clang, -O0):
<uppercase>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1177 <uppercase+0x57>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <toupper@plt>
mov    %al,%dl
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    113f <uppercase+0x1f>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uppercase>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r15
call   1040 <strlen@plt>
test   %eax,%eax
jle    1157 <uppercase+0x37>
mov    %eax,%r14d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
movsbl (%r15,%rbx,1),%edi
call   1030 <toupper@plt>
mov    %al,(%r15,%rbx,1)
add    $0x1,%rbx
cmp    %rbx,%r14
jne    1140 <uppercase+0x20>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @uppercase(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
store i32 %6, i32* %4
store i32 0, i32* %3
br label %7
7: ; preds = %22, %1
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %25
11: ; preds = %7
%12 = load i8*, i8** %2
%13 = load i32, i32* %3
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = call signext i8 @toupper(i8 signext %16)
%18 = load i8*, i8** %2
%19 = load i32, i32* %3
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
store i8 %17, i8* %21
br label %22
22: ; preds = %11
%23 = load i32, i32* %3
%24 = add nsw i32 %23, 1
store i32 %24, i32* %3
br label %7
25: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
define i32 @uppercase(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %13
4: ; preds = %1
%5 = zext i32 %2 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
%10 = tail call signext i8 @toupper(i8 signext %9)
store i8 %10, i8* %8
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %1
ret i32 0
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void delay(uint32_t ms) {
  volatile uint32_t i;
  volatile uint32_t j;
  for (i = ms; i > 0; i--) {
    for (j = 11850; j > 0; j--) {
    }
  }
}


x86 assembly (clang, -O0):
<delay>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmp    $0x0,%rax
jle    1160 <delay+0x60>
movq   $0x2e4a,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    $0x0,%rax
jle    114a <delay+0x4a>
jmp    1139 <delay+0x39>
mov    -0x18(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x18(%rbp)
jmp    1126 <delay+0x26>
jmp    114f <delay+0x4f>
mov    -0x10(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <delay+0x10>
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay>:
mov    %rdi,-0x8(%rsp)
jmp    1116 <delay+0x16>
nopw   0x0(%rax,%rax,1)
addq   $0xffffffffffffffff,-0x8(%rsp)
cmpq   $0x0,-0x8(%rsp)
jle    1140 <delay+0x40>
movq   $0x2e4a,-0x10(%rsp)
cmpq   $0x0,-0x10(%rsp)
jle    1110 <delay+0x10>
nop
addq   $0xffffffffffffffff,-0x10(%rsp)
cmpq   $0x0,-0x10(%rsp)
jg     1130 <delay+0x30>
jmp    1110 <delay+0x10>
ret

LLVM IR (-O0):
define void @delay(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %2
%5 = load i64, i64* %2
store volatile i64 %5, i64* %3
br label %6
6: ; preds = %18, %1
%7 = load volatile i64, i64* %3
%8 = icmp sgt i64 %7, 0
br i1 %8, label %9, label %21
9: ; preds = %6
store volatile i64 11850, i64* %4
br label %10
10: ; preds = %14, %9
%11 = load volatile i64, i64* %4
%12 = icmp sgt i64 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %10
br label %14
14: ; preds = %13
%15 = load volatile i64, i64* %4
%16 = add nsw i64 %15, -1
store volatile i64 %16, i64* %4
br label %10
17: ; preds = %10
br label %18
18: ; preds = %17
%19 = load volatile i64, i64* %3
%20 = add nsw i64 %19, -1
store volatile i64 %20, i64* %3
br label %6
21: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @delay(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = bitcast i64* %2 to i8*
%5 = bitcast i64* %3 to i8*
store volatile i64 %0, i64* %2
%6 = load volatile i64, i64* %2
%7 = icmp sgt i64 %6, 0
br i1 %7, label %8, label %21
8: ; preds = %1, %16
store volatile i64 11850, i64* %3
%9 = load volatile i64, i64* %3
%10 = icmp sgt i64 %9, 0
br i1 %10, label %11, label %16
11: ; preds = %8, %11
%12 = load volatile i64, i64* %3
%13 = add nsw i64 %12, -1
store volatile i64 %13, i64* %3
%14 = load volatile i64, i64* %3
%15 = icmp sgt i64 %14, 0
br i1 %15, label %11, label %16
16: ; preds = %11, %8
%17 = load volatile i64, i64* %2
%18 = add nsw i64 %17, -1
store volatile i64 %18, i64* %2
%19 = load volatile i64, i64* %2
%20 = icmp sgt i64 %19, 0
br i1 %20, label %8, label %21
21: ; preds = %16, %1
ret void
}
void Environment_Parameters(char *argv[]) { return; }


x86 assembly (clang, -O0):
<Environment_Parameters>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Environment_Parameters>:
ret

LLVM IR (-O0):
define void @Environment_Parameters(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
ret void
}

LLVM IR (-O2):
define void @Environment_Parameters(i8** nocapture %0) {
ret void
}
/* Variables and functions */
scalar_t__ tolower(int);
char *strlower(char *x) {
  char *result = x;
  for (; (*x = (char)tolower((int)*x)); x++)
    ;
  return result;
}


x86 assembly (clang, -O0):
<strlower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <tolower@plt>
mov    -0x8(%rbp),%rcx
mov    %al,(%rcx)
cmp    $0x0,%al
je     1154 <strlower+0x44>
jmp    1143 <strlower+0x33>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1124 <strlower+0x14>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlower>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    %rdi,%rbx
nopw   0x0(%rax,%rax,1)
movsbl (%rbx),%edi
call   1030 <tolower@plt>
mov    %al,(%rbx)
add    $0x1,%rbx
test   %al,%al
jne    1120 <strlower+0x10>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strlower(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %14, %1
%6 = load i8*, i8** %2
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = call i64 @tolower(i32 %8)
%10 = trunc i64 %9 to i8
%11 = load i8*, i8** %2
store i8 %10, i8* %11
%12 = icmp ne i8 %10, 0
br i1 %12, label %13, label %17
13: ; preds = %5
br label %14
14: ; preds = %13
%15 = load i8*, i8** %2
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %2
br label %5
17: ; preds = %5
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
define i8* @strlower(i8* returned %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %9, %2 ]
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = tail call i64 @tolower(i32 %5)
%7 = trunc i64 %6 to i8
store i8 %7, i8* %3
%8 = icmp eq i8 %7, 0
%9 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %8, label %10, label %2
10: ; preds = %2
ret i8* %0
}
/* Type definitions */
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
char *readpassphrase(char const *, char *, int, int);
char *getpass_x(const char *prompt) {
  static char buf[80 + 1] = {0};
  return readpassphrase(prompt, buf, sizeof(buf), 0x00);
}


x86 assembly (clang, -O0):
<getpass_x>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0x2f19(%rip),%rsi
mov    $0x51,%edx
xor    %ecx,%ecx
call   1030 <readpassphrase@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getpass_x>:
lea    0x2f29(%rip),%rsi
mov    $0x51,%edx
xor    %ecx,%ecx
jmp    1030 <readpassphrase@plt>

LLVM IR (-O0):
@getpass_x.buf = internal global [81 x i8] zeroinitializer
define i8* @getpass_x(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @readpassphrase(i8* %3, i8* getelementptr inbounds ([81 x i8], [81 x i8]* @getpass_x.buf, i64 0, i64 0), i32 81, i32 0)
ret i8* %4
}

LLVM IR (-O2):
@getpass_x.buf = internal global [81 x i8] zeroinitializer
define i8* @getpass_x(i8* %0) {
%2 = tail call i8* @readpassphrase(i8* %0, i8* getelementptr inbounds ([81 x i8], [81 x i8]* @getpass_x.buf, i64 0, i64 0), i32 81, i32 0)
ret i8* %2
}
/* Variables and functions */
int next_utf8(char const *, int *);
int fn_ch_58(const char *text) {
  int pos = 0;
  if (next_utf8(text, &pos) == 58)
    return pos;
  return -1;
}


x86 assembly (clang, -O0):
<fn_ch_58>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x14(%rbp),%rsi
call   1030 <next_utf8@plt>
cmp    $0x3a,%eax
jne    1144 <fn_ch_58+0x34>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114b <fn_ch_58+0x3b>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_ch_58>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rsi
call   1030 <next_utf8@plt>
mov    %eax,%ecx
mov    $0xffffffff,%eax
cmp    $0x3a,%ecx
jne    1133 <fn_ch_58+0x23>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fn_ch_58(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @next_utf8(i8* %5, i32* %4)
%7 = icmp eq i32 %6, 58
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i32, i32* %4
store i32 %9, i32* %2
br label %11
10: ; preds = %1
store i32 -1, i32* %2
br label %11
11: ; preds = %10, %8
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @fn_ch_58(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%4 = call i32 @next_utf8(i8* %0, i32* %2)
%5 = icmp eq i32 %4, 58
%6 = load i32, i32* %2
%7 = select i1 %5, i32 %6, i32 -1
ret i32 %7
}
int sample_has_event(int i) { return ((i % 12 == 5) || (i % 63 == 3)); }


x86 assembly (clang, -O0):
<sample_has_event>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xc,%ecx
cltd
idiv   %ecx
mov    $0x1,%al
cmp    $0x5,%edx
mov    %al,-0x5(%rbp)
je     1134 <sample_has_event+0x34>
mov    -0x4(%rbp),%eax
mov    $0x3f,%ecx
cltd
idiv   %ecx
cmp    $0x3,%edx
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sample_has_event>:
movslq %edi,%rcx
imul   $0x2aaaaaab,%rcx,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
shr    $0x21,%rax
add    %edx,%eax
shl    $0x2,%eax
lea    (%rax,%rax,2),%eax
mov    %ecx,%edx
sub    %eax,%edx
mov    $0x1,%eax
cmp    $0x5,%edx
je     1153 <sample_has_event+0x53>
imul   $0xffffffff82082083,%rcx,%rdx
shr    $0x20,%rdx
add    %ecx,%edx
mov    %edx,%eax
shr    $0x1f,%eax
sar    $0x5,%edx
add    %eax,%edx
mov    %edx,%eax
shl    $0x6,%eax
sub    %eax,%edx
add    %ecx,%edx
xor    %eax,%eax
cmp    $0x3,%edx
sete   %al
ret

LLVM IR (-O0):
define i32 @sample_has_event(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 12
%5 = icmp eq i32 %4, 5
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = srem i32 %7, 63
%9 = icmp eq i32 %8, 3
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @sample_has_event(i32 %0) {
%2 = srem i32 %0, 12
%3 = icmp eq i32 %2, 5
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = srem i32 %0, 63
%6 = icmp eq i32 %5, 3
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
void TimerForcedOC2Configure(unsigned long ulBase,
                             unsigned long ulForcedAction) {
  unsigned long ulTempccmr1 = 0;

  ;

  ;
  ulTempccmr1 = (*((volatile unsigned long *)(ulBase + 0x00000018)));
  ulTempccmr1 &= ~0x00007000;
  ulTempccmr1 |= (ulForcedAction << 8);
  (*((volatile unsigned long *)(ulBase + 0x00000018))) = ulTempccmr1;
}


x86 assembly (clang, -O0):
<TimerForcedOC2Configure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    0x18(%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
and    $0xffffffffffff8fff,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
shl    $0x8,%rax
or     -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x18(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerForcedOC2Configure>:
mov    $0xffffffffffff8fff,%rax
and    0x18(%rdi),%rax
shl    $0x8,%rsi
or     %rax,%rsi
mov    %rsi,0x18(%rdi)
ret

LLVM IR (-O0):
define void @TimerForcedOC2Configure(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
store i64 0, i64* %5
%6 = load i64, i64* %3
%7 = add i64 %6, 24
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
store i64 %9, i64* %5
%10 = load i64, i64* %5
%11 = and i64 %10, -28673
store i64 %11, i64* %5
%12 = load i64, i64* %4
%13 = shl i64 %12, 8
%14 = load i64, i64* %5
%15 = or i64 %14, %13
store i64 %15, i64* %5
%16 = load i64, i64* %5
%17 = load i64, i64* %3
%18 = add i64 %17, 24
%19 = inttoptr i64 %18 to i64*
store volatile i64 %16, i64* %19
ret void
}

LLVM IR (-O2):
define void @TimerForcedOC2Configure(i64 %0, i64 %1) {
%3 = add i64 %0, 24
%4 = inttoptr i64 %3 to i64*
%5 = load volatile i64, i64* %4
%6 = and i64 %5, -28673
%7 = shl i64 %1, 8
%8 = or i64 %6, %7
store volatile i64 %8, i64* %4
ret void
}
void test45_Test1_targetInit__I() {}


x86 assembly (clang, -O0):
<test45_Test1_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test45_Test1_targetInit__I>:
ret

LLVM IR (-O0):
define void @test45_Test1_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test45_Test1_targetInit__I() {
ret void
}
/* Variables and functions */
void strcat(char *s, char *t) {
  while (*s != '\0') {
    s++;
  }
  while ((*(s++) = *(t++)) != '\0') {
  }
}


x86 assembly (clang, -O0):
<strcat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     112d <strcat+0x2d>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110c <strcat+0xc>
jmp    1132 <strcat+0x32>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %al,(%rcx)
movsbl %al,%eax
cmp    $0x0,%eax
je     1165 <strcat+0x65>
jmp    1132 <strcat+0x32>
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcat>:
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1100 <strcat>
xor    %eax,%eax
nopl   0x0(%rax,%rax,1)
movzbl (%rsi,%rax,1),%ecx
mov    %cl,-0x1(%rdi,%rax,1)
add    $0x1,%rax
test   %cl,%cl
jne    1110 <strcat+0x10>
ret

LLVM IR (-O0):
define void @strcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %10, %2
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %3
br label %5
13: ; preds = %5
br label %14
14: ; preds = %22, %13
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %4
%17 = load i8, i8* %15
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
store i8 %17, i8* %18
%20 = sext i8 %17 to i32
%21 = icmp ne i32 %20, 0
br i1 %21, label %22, label %23
22: ; preds = %14
br label %14
23: ; preds = %14
ret void
}

LLVM IR (-O2):
define void @strcat(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %7, %3 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %6, label %8, label %3
8: ; preds = %3, %8
%9 = phi i8* [ %13, %8 ], [ %4, %3 ]
%10 = phi i8* [ %11, %8 ], [ %1, %3 ]
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %10
%13 = getelementptr inbounds i8, i8* %9, i64 1
store i8 %12, i8* %9
%14 = icmp eq i8 %12, 0
br i1 %14, label %15, label %8
15: ; preds = %8
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ x54x_out(int, int /*<<< orphan*/, void *);
void x54x_write(uint32_t port, uint8_t val, void *priv) {
  x54x_out(port & 3, val, priv);
}


x86 assembly (clang, -O0):
<x54x_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
and    $0x3,%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1030 <x54x_out@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x54x_write>:
and    $0x3,%edi
jmp    1030 <x54x_out@plt>

LLVM IR (-O0):
define void @x54x_write(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = and i32 %7, 3
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = call i32 @x54x_out(i32 %8, i32 %9, i8* %10)
ret void
}

LLVM IR (-O2):
define void @x54x_write(i32 %0, i32 %1, i8* %2) {
%4 = and i32 %0, 3
%5 = tail call i32 @x54x_out(i32 %4, i32 %1, i8* %2)
ret void
}
void RTS3KeysDestroy(void) {}


x86 assembly (clang, -O0):
<RTS3KeysDestroy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTS3KeysDestroy>:
ret

LLVM IR (-O0):
define void @RTS3KeysDestroy() {
ret void
}

LLVM IR (-O2):
define void @RTS3KeysDestroy() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
int strlen(char *);
rev(char *s) {
  int l = strlen(s);
  while (l) {
    printf("%c", *(s + l - 1));
    l--;
  }
}


x86 assembly (clang, -O0):
<rev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1169 <rev+0x49>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
lea    0xeaf(%rip),%rdi
movsbl -0x1(%rax,%rcx,1),%esi
call   1040 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
jmp    1138 <rev+0x18>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rev>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <strlen@plt>
test   %eax,%eax
je     1166 <rev+0x46>
mov    %eax,%r12d
cltq
lea    (%rax,%r14,1),%r15
add    $0xffffffffffffffff,%r15
neg    %r12d
xor    %ebx,%ebx
lea    0xeb3(%rip),%r14
nopl   (%rax)
movsbl (%r15,%rbx,1),%esi
mov    %r14,%rdi
call   1040 <printf@plt>
add    $0xffffffffffffffff,%rbx
cmp    %ebx,%r12d
jne    1150 <rev+0x30>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define i32 @rev(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i32 @strlen(i8* %5)
store i32 %6, i32* %4
br label %7
7: ; preds = %10, %1
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %20
10: ; preds = %7
%11 = load i8*, i8** %3
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = getelementptr inbounds i8, i8* %14, i64 -1
%16 = load i8, i8* %15
%17 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %16)
%18 = load i32, i32* %4
%19 = add nsw i32 %18, -1
store i32 %19, i32* %4
br label %7
20: ; preds = %7
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
define i32 @rev(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 -1
br label %7
7: ; preds = %4, %7
%8 = phi i64 [ %5, %4 ], [ %12, %7 ]
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %10)
%12 = add nsw i64 %8, -1
%13 = trunc i64 %12 to i32
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %7
15: ; preds = %7, %1
ret i32 undef
}
int init_camera() {}


x86 assembly (clang, -O0):
<init_camera>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_camera>:
ret

LLVM IR (-O0):
define i32 @init_camera() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @init_camera() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ getpeerinfo(int);
void *handle_client(void *arguments) {
  int client_sock = *(int *)arguments;
  int remote_sock;
  getpeerinfo(client_sock);
}


x86 assembly (clang, -O0):
<handle_client>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1030 <getpeerinfo@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_client>:
mov    (%rdi),%edi
jmp    1030 <getpeerinfo@plt>

LLVM IR (-O0):
define i8* @handle_client(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
%8 = load i32, i32* %7
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = call i32 @getpeerinfo(i32 %9)
%11 = load i8*, i8** %2
ret i8* %11
}

LLVM IR (-O2):
define noalias i8* @handle_client(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 @getpeerinfo(i32 %3)
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  extern char *__progname;
  fprintf(stderr,
          "usage: %s [-dlrsWF] [-b bind-address] [-n maxchild] "
          "[-w maxwait] [port]\n",
          __progname);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
mov    0x2e9c(%rip),%rax
mov    (%rax),%rdx
lea    0xec2(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
mov    0x2e9f(%rip),%rax
mov    (%rax),%rdx
lea    0xec5(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [73 x i8] c"usage: %s [-dlrsWF] [-b bind-address] [-n maxchild] [-w maxwait] [port]\0A\00"
@__progname = external global i8*
define void @usage() {
%1 = load i32, i32* @stderr
%2 = load i8*, i8** @__progname
%3 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([73 x i8], [73 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [73 x i8] c"usage: %s [-dlrsWF] [-b bind-address] [-n maxchild] [-w maxwait] [port]\0A\00"
@__progname = external global i8*
define void @usage() {
%1 = load i32, i32* @stderr
%2 = load i8*, i8** @__progname
%3 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([73 x i8], [73 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void print_line() { puts(""); }


x86 assembly (clang, -O0):
<print_line>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_line>:
mov    $0xa,%edi
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define void @print_line() {
%1 = call i32 @puts(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
define void @print_line() {
%1 = tail call i32 @putchar(i32 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bios_printf(int, char *);
void nmi_handler_msg() { bios_printf((2 | 4 | 1), "NMI Handler called\n"); }


x86 assembly (clang, -O0):
<nmi_handler_msg>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7,%edi
lea    0xee0(%rip),%rsi
call   1030 <bios_printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nmi_handler_msg>:
lea    0xee9(%rip),%rsi
mov    $0x7,%edi
jmp    1030 <bios_printf@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"NMI Handler called\0A\00"
define void @nmi_handler_msg() {
%1 = call i32 @bios_printf(i32 7, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [20 x i8] c"NMI Handler called\0A\00"
define void @nmi_handler_msg() {
%1 = tail call i32 @bios_printf(i32 7, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int poly1305_verify(unsigned char const *, unsigned char const *,
                    unsigned char const *, size_t);
int mac_poly1305_verify(const unsigned char *mac, const unsigned char *key,
                        const unsigned char *msg, size_t msg_len) {
  return poly1305_verify(mac, key, msg, msg_len);
}


x86 assembly (clang, -O0):
<mac_poly1305_verify>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <poly1305_verify@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mac_poly1305_verify>:
jmp    1030 <poly1305_verify@plt>

LLVM IR (-O0):
define i32 @mac_poly1305_verify(i8* %0, i8* %1, i8* %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i64
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = load i64, i64* %8
%13 = call i32 @poly1305_verify(i8* %9, i8* %10, i8* %11, i64 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @mac_poly1305_verify(i8* %0, i8* %1, i8* %2, i64 %3) {
%5 = tail call i32 @poly1305_verify(i8* %0, i8* %1, i8* %2, i64 %3)
ret i32 %5
}
extern __attribute__((visibility("default"))) const char *
call_s(const char *(*func)(const char *), const char *arg) {
  return func(arg);
}


x86 assembly (clang, -O0):
<call_s>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rdi
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_s>:
mov    %rdi,%rax
mov    %rsi,%rdi
jmp    *%rax

LLVM IR (-O0):
define i8* @call_s(i8* (i8*)* %0, i8* %1) {
%3 = alloca i8* (i8*)*
%4 = alloca i8*
store i8* (i8*)* %0, i8* (i8*)** %3
store i8* %1, i8** %4
%5 = load i8* (i8*)*, i8* (i8*)** %3
%6 = load i8*, i8** %4
%7 = call i8* %5(i8* %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @call_s(i8* (i8*)* nocapture %0, i8* %1) {
%3 = tail call i8* %0(i8* %1)
ret i8* %3
}
void gdk_image_type_get_type() {}


x86 assembly (clang, -O0):
<gdk_image_type_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_image_type_get_type>:
ret

LLVM IR (-O0):
define void @gdk_image_type_get_type() {
ret void
}

LLVM IR (-O2):
define void @gdk_image_type_get_type() {
ret void
}
int f(int x) { return x - 5; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    -0x5(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 %3, 5
ret i32 %4
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = add nsw i32 %0, -5
ret i32 %2
}
checksize(sz, bits) {
  if ((bits & (1 << (sz >> 6))) == 0)
    serror("bad size");
}


x86 assembly (clang, -O0):
<checksize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    $0x6,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
jne    1149 <checksize+0x39>
lea    0xebe(%rip),%rdi
mov    $0x0,%al
call   1030 <serror@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<checksize>:
shr    $0x6,%edi
bt     %edi,%esi
jae    1119 <checksize+0x9>
ret
push   %rax
lea    0xedf(%rip),%rdi
xor    %eax,%eax
call   1030 <serror@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
@.str = [9 x i8] c"bad size\00"
define i32 @checksize(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = load i32, i32* %4
%8 = ashr i32 %7, 6
%9 = shl i32 1, %8
%10 = and i32 %6, %9
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = call i32 (i8*, ...) bitcast (i32 (...)* @serror to i32 (i8*, ...)*)(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
br label %14
14: ; preds = %12, %2
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
@.str = [9 x i8] c"bad size\00"
define i32 @checksize(i32 %0, i32 %1) {
%3 = ashr i32 %0, 6
%4 = shl nuw i32 1, %3
%5 = and i32 %4, %1
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = tail call i32 (i8*, ...) bitcast (i32 (...)* @serror to i32 (i8*, ...)*)(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %2
ret i32 undef
}
/* Variables and functions */
int __builtin_arm_rsr(char *);
unsigned rsr_2() { return __builtin_arm_rsr("0:1:2:3:4"); }


x86 assembly (clang, -O0):
<rsr_2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <__builtin_arm_rsr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rsr_2>:
lea    0xee9(%rip),%rdi
jmp    1030 <__builtin_arm_rsr@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"0:1:2:3:4\00"
define i32 @rsr_2() {
%1 = call i32 @__builtin_arm_rsr(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [10 x i8] c"0:1:2:3:4\00"
define i32 @rsr_2() {
%1 = tail call i32 @__builtin_arm_rsr(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
/* Variables and functions */
int port_inb(int);
int sw_is_on(void) { return (port_inb((2)) & (1 << 2)); }


x86 assembly (clang, -O0):
<sw_is_on>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <port_inb@plt>
and    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sw_is_on>:
push   %rax
mov    $0x2,%edi
call   1030 <port_inb@plt>
and    $0x4,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @sw_is_on() {
%1 = call i32 @port_inb(i32 2)
%2 = and i32 %1, 4
ret i32 %2
}

LLVM IR (-O2):
define i32 @sw_is_on() {
%1 = tail call i32 @port_inb(i32 2)
%2 = and i32 %1, 4
ret i32 %2
}
char sml(char chr) {
  if (chr >= 'A' && chr <= 'Z')
    return chr - 'A' + 'a';
  return chr;
}


x86 assembly (clang, -O0):
<sml>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
cmp    $0x41,%eax
jl     1136 <sml+0x36>
movsbl -0x2(%rbp),%eax
cmp    $0x5a,%eax
jg     1136 <sml+0x36>
movsbl -0x2(%rbp),%eax
sub    $0x41,%eax
add    $0x61,%eax
mov    %al,-0x1(%rbp)
jmp    113c <sml+0x3c>
mov    -0x2(%rbp),%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sml>:
lea    -0x41(%rdi),%eax
lea    0x20(%rdi),%ecx
cmp    $0x1a,%al
movzbl %cl,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @sml(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 65
br i1 %6, label %7, label %17
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 90
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %13, 65
%15 = add nsw i32 %14, 97
%16 = trunc i32 %15 to i8
store i8 %16, i8* %2
br label %19
17: ; preds = %7, %1
%18 = load i8, i8* %3
store i8 %18, i8* %2
br label %19
19: ; preds = %17, %11
%20 = load i8, i8* %2
ret i8 %20
}

LLVM IR (-O2):
define signext i8 @sml(i8 signext %0) {
%2 = add i8 %0, -65
%3 = icmp ult i8 %2, 26
%4 = add i8 %0, 32
%5 = select i1 %3, i8 %4, i8 %0
ret i8 %5
}
void gf8mul_00001000(void) {
  __asm__ __volatile__("\tpxor    %xmm7, %xmm6\n"
                       "\tpxor    %xmm7, %xmm5\n"
                       "\tpxor    %xmm7, %xmm4\n"
                       "\tpxor    %xmm7, %xmm0\n"
                       "\tpxor    %xmm6, %xmm7\n"
                       "\tpxor    %xmm6, %xmm4\n"
                       "\tpxor    %xmm6, %xmm2\n"
                       "\tpxor    %xmm6, %xmm0\n"
                       "\tpxor    %xmm7, %xmm6\n"
                       "\tpxor    %xmm5, %xmm6\n"
                       "\tpxor    %xmm5, %xmm3\n"
                       "\tpxor    %xmm5, %xmm2\n"
                       "\tpxor    %xmm5, %xmm1\n"
                       "\tpxor    %xmm4, %xmm7\n"
                       "\tpxor    %xmm7, %xmm4\n"
                       "\tpxor    %xmm3, %xmm6\n"
                       "\tpxor    %xmm6, %xmm3\n"
                       "\tpxor    %xmm2, %xmm5\n"
                       "\tpxor    %xmm5, %xmm2\n"
                       "\tpxor    %xmm1, %xmm4\n"
                       "\tpxor    %xmm4, %xmm1\n"
                       "\tpxor    %xmm0, %xmm3\n"
                       "\tpxor    %xmm3, %xmm0\n");
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pxor   %xmm7,%xmm6
pxor   %xmm7,%xmm5
pxor   %xmm7,%xmm4
pxor   %xmm7,%xmm0
pxor   %xmm6,%xmm7
pxor   %xmm6,%xmm4
pxor   %xmm6,%xmm2
pxor   %xmm6,%xmm0
pxor   %xmm7,%xmm6
pxor   %xmm5,%xmm6
pxor   %xmm5,%xmm3
pxor   %xmm5,%xmm2
pxor   %xmm5,%xmm1
pxor   %xmm4,%xmm7
pxor   %xmm7,%xmm4
pxor   %xmm3,%xmm6
pxor   %xmm6,%xmm3
pxor   %xmm2,%xmm5
pxor   %xmm5,%xmm2
pxor   %xmm1,%xmm4
pxor   %xmm4,%xmm1
pxor   %xmm0,%xmm3
pxor   %xmm3,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
pxor   %xmm7,%xmm6
pxor   %xmm7,%xmm5
pxor   %xmm7,%xmm4
pxor   %xmm7,%xmm0
pxor   %xmm6,%xmm7
pxor   %xmm6,%xmm4
pxor   %xmm6,%xmm2
pxor   %xmm6,%xmm0
pxor   %xmm7,%xmm6
pxor   %xmm5,%xmm6
pxor   %xmm5,%xmm3
pxor   %xmm5,%xmm2
pxor   %xmm5,%xmm1
pxor   %xmm4,%xmm7
pxor   %xmm7,%xmm4
pxor   %xmm3,%xmm6
pxor   %xmm6,%xmm3
pxor   %xmm2,%xmm5
pxor   %xmm5,%xmm2
pxor   %xmm1,%xmm4
pxor   %xmm4,%xmm1
pxor   %xmm0,%xmm3
pxor   %xmm3,%xmm0
ret

LLVM IR (-O0):
define void @gf8mul_00001000() {
ret void
}

LLVM IR (-O2):
define void @gf8mul_00001000() {
tail call void asm sideeffect "\09pxor %xmm7, %xmm6\0A\09pxor %xmm7, %xmm5\0A\09pxor %xmm7, %xmm4\0A\09pxor %xmm7, %xmm0\0A\09pxor %xmm6, %xmm7\0A\09pxor %xmm6, %xmm4\0A\09pxor %xmm6, %xmm2\0A\09pxor %xmm6, %xmm0\0A\09pxor %xmm7, %xmm6\0A\09pxor %xmm5, %xmm6\0A\09pxor %xmm5, %xmm3\0A\09pxor %xmm5, %xmm2\0A\09pxor %xmm5, %xmm1\0A\09pxor %xmm4, %xmm7\0A\09pxor %xmm7, %xmm4\0A\09pxor %xmm3, %xmm6\0A\09pxor %xmm6, %xmm3\0A\09pxor %xmm2, %xmm5\0A\09pxor %xmm5, %xmm2\0A\09pxor %xmm1, %xmm4\0A\09pxor %xmm4, %xmm1\0A\09pxor %xmm0, %xmm3\0A\09pxor %xmm3, %xmm0\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t reverse_bits(uint8_t a) {
  uint8_t lut[16] = {0x0, 0x8, 0x4, 0xC, 0x2, 0xA, 0x6, 0xE,
                     0x1, 0x9, 0x5, 0xD, 0x3, 0xB, 0x7, 0xF};
  uint8_t x;
  x = ((lut[a & 0xf]) << 4) | lut[a >> 4];
  return x;
}


x86 assembly (clang, -O0):
<reverse_bits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x50(%rbp),%rdi
lea    0xeda(%rip),%rsi
mov    $0x40,%edx
call   1030 <memcpy@plt>
mov    -0x4(%rbp),%eax
and    $0xf,%eax
cltq
mov    -0x50(%rbp,%rax,4),%eax
shl    $0x4,%eax
mov    -0x4(%rbp),%ecx
sar    $0x4,%ecx
movslq %ecx,%rcx
or     -0x50(%rbp,%rcx,4),%eax
mov    %eax,-0x54(%rbp)
mov    -0x54(%rbp),%eax
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse_bits>:
mov    %edi,%eax
and    $0xf,%eax
lea    0xef4(%rip),%rcx
mov    (%rcx,%rax,4),%eax
shl    $0x4,%eax
sar    $0x4,%edi
movslq %edi,%rdx
or     (%rcx,%rdx,4),%eax
ret

LLVM IR (-O0):
@__const.reverse_bits.lut = [16 x i32] [i32 0, i32 8, i32 4, i32 12, i32 2, i32 10, i32 6, i32 14, i32 1, i32 9, i32 5, i32 13, i32 3, i32 11, i32 7, i32 15]
define i32 @reverse_bits(i32 %0) {
%2 = alloca i32
%3 = alloca [16 x i32]
%4 = alloca i32
store i32 %0, i32* %2
%5 = bitcast [16 x i32]* %3 to i8*
%6 = load i32, i32* %2
%7 = and i32 %6, 15
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds [16 x i32], [16 x i32]* %3, i64 0, i64 %8
%10 = load i32, i32* %9
%11 = shl i32 %10, 4
%12 = load i32, i32* %2
%13 = ashr i32 %12, 4
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds [16 x i32], [16 x i32]* %3, i64 0, i64 %14
%16 = load i32, i32* %15
%17 = or i32 %11, %16
store i32 %17, i32* %4
%18 = load i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
@__const.reverse_bits.lut = [16 x i32] [i32 0, i32 8, i32 4, i32 12, i32 2, i32 10, i32 6, i32 14, i32 1, i32 9, i32 5, i32 13, i32 3, i32 11, i32 7, i32 15]
define i32 @reverse_bits(i32 %0) {
%2 = and i32 %0, 15
%3 = zext i32 %2 to i64
%4 = getelementptr inbounds [16 x i32], [16 x i32]* @__const.reverse_bits.lut, i64 0, i64 %3
%5 = load i32, i32* %4
%6 = shl i32 %5, 4
%7 = ashr i32 %0, 4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds [16 x i32], [16 x i32]* @__const.reverse_bits.lut, i64 0, i64 %8
%10 = load i32, i32* %9
%11 = or i32 %6, %10
ret i32 %11
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ getdelim(char **, size_t *, char, int /*<<< orphan*/ *);
ssize_t getline(char **lineptr, size_t *n, FILE *fp) {
  return getdelim(lineptr, n, '\n', fp);
}


x86 assembly (clang, -O0):
<getline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
mov    $0xa,%edx
call   1030 <getdelim@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getline>:
mov    %rdx,%rcx
mov    $0xa,%edx
jmp    1030 <getdelim@plt>

LLVM IR (-O0):
define i32 @getline(i8** %0, i64* %1, i32* %2) {
%4 = alloca i8**
%5 = alloca i64*
%6 = alloca i32*
store i8** %0, i8*** %4
store i64* %1, i64** %5
store i32* %2, i32** %6
%7 = load i8**, i8*** %4
%8 = load i64*, i64** %5
%9 = load i32*, i32** %6
%10 = call i32 @getdelim(i8** %7, i64* %8, i8 signext 10, i32* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @getline(i8** %0, i64* %1, i32* %2) {
%4 = tail call i32 @getdelim(i8** %0, i64* %1, i8 signext 10, i32* %2)
ret i32 %4
}
int mlx5dr_domain_destroy(struct mlx5dr_domain *domain) { return 0; }


x86 assembly (clang, -O0):
<mlx5dr_domain_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mlx5dr_domain_destroy>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.mlx5dr_domain = type opaque
define i32 @mlx5dr_domain_destroy(%struct.mlx5dr_domain* %0) {
%2 = alloca %struct.mlx5dr_domain*
store %struct.mlx5dr_domain* %0, %struct.mlx5dr_domain** %2
ret i32 0
}

LLVM IR (-O2):
%struct.mlx5dr_domain = type opaque
define i32 @mlx5dr_domain_destroy(%struct.mlx5dr_domain* nocapture readnone %0) {
ret i32 0
}
f2(i) { i = f() + (i ? f() : 1); }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <f@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     113e <f2+0x2e>
mov    $0x0,%al
call   1030 <f@plt>
mov    %eax,-0x10(%rbp)
jmp    114b <f2+0x3b>
mov    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    114b <f2+0x3b>
mov    -0xc(%rbp),%eax
mov    -0x10(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <f@plt>
test   %ebx,%ebx
je     1125 <f2+0x15>
xor    %eax,%eax
call   1030 <f@plt>
pop    %rbx
ret

LLVM IR (-O0):
define i32 @f2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 (...) @f()
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 (...) @f()
br label %10
9: ; preds = %1
br label %10
10: ; preds = %9, %7
%11 = phi i32 [ %8, %7 ], [ 1, %9 ]
%12 = add nsw i32 %4, %11
store i32 %12, i32* %3
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @f2(i32 %0) {
%2 = tail call i32 (...) @f()
%3 = icmp eq i32 %0, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 (...) @f()
br label %6
6: ; preds = %1, %4
ret i32 undef
}
void _do_irq(void) {}


x86 assembly (clang, -O0):
<_do_irq>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_do_irq>:
ret

LLVM IR (-O0):
define void @_do_irq() {
ret void
}

LLVM IR (-O2):
define void @_do_irq() {
ret void
}
/* Variables and functions */
void app_main(void) {}


x86 assembly (clang, -O0):
<app_main>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<app_main>:
ret

LLVM IR (-O0):
define void @app_main() {
ret void
}

LLVM IR (-O2):
define void @app_main() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wint_t;

/* Variables and functions */
int /*<<< orphan*/ __towcase(int /*<<< orphan*/, int /*<<< orphan*/);
wint_t towupper(wint_t wc) { return __towcase(wc, 0); }


x86 assembly (clang, -O0):
<towupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1030 <__towcase@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<towupper>:
xor    %esi,%esi
jmp    1030 <__towcase@plt>

LLVM IR (-O0):
define i32 @towupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__towcase(i32 %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @towupper(i32 %0) {
%2 = tail call i32 @__towcase(i32 %0, i32 0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isprint(int);
void t_isprint_0x73() {
  Assert_real((isprint(115)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              580, ("isprint should be 1 for s"));
}


x86 assembly (clang, -O0):
<t_isprint_0x73>:
push   %rbp
mov    %rsp,%rbp
mov    $0x73,%edi
call   1030 <isprint@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x244,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0x73>:
push   %rax
mov    $0x73,%edi
call   1030 <isprint@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x244,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [26 x i8] c"isprint should be 1 for s\00"
define void @t_isprint_0x73() {
%1 = call i32 @isprint(i32 115)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 580, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [26 x i8] c"isprint should be 1 for s\00"
define void @t_isprint_0x73() {
%1 = tail call i32 @isprint(i32 115)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 580, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int intcallable1(void) { return 3; }


x86 assembly (clang, -O0):
<intcallable1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intcallable1>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @intcallable1() {
ret i32 3
}

LLVM IR (-O2):
define i32 @intcallable1() {
ret i32 3
}
/* Variables and functions */
int belongs(char **, char const *);
int isPresent(char *argv[], const char *arg) { return belongs(argv, arg); }


x86 assembly (clang, -O0):
<isPresent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <belongs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPresent>:
jmp    1030 <belongs@plt>

LLVM IR (-O0):
define i32 @isPresent(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
store i8** %0, i8*** %3
store i8* %1, i8** %4
%5 = load i8**, i8*** %3
%6 = load i8*, i8** %4
%7 = call i32 @belongs(i8** %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @isPresent(i8** %0, i8* %1) {
%3 = tail call i32 @belongs(i8** %0, i8* %1)
ret i32 %3
}