__attribute__((always_)) unsigned long
__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) {
  unsigned long prev;
  switch (size) {
  case 1:
    asm volatile(".section .smp_locks,\"a\"\n"
                 " "
                 ".balign 8"
                 " "
                 "\n"
                 " "
                 ".quad"
                 " "
                 "661f\n"
                 ".previous\n"
                 "661:\n\tlock; "
                 "cmpxchgb %b1,%2"
                 : "=a"(prev)
                 : "q"(new), "m"(*((volatile long *)(ptr))), "0"(old)
                 : "memory");
    return prev;
  case 2:
    asm volatile(".section .smp_locks,\"a\"\n"
                 " "
                 ".balign 8"
                 " "
                 "\n"
                 " "
                 ".quad"
                 " "
                 "661f\n"
                 ".previous\n"
                 "661:\n\tlock; "
                 "cmpxchgw %w1,%2"
                 : "=a"(prev)
                 : "r"(new), "m"(*((volatile long *)(ptr))), "0"(old)
                 : "memory");
    return prev;
  case 4:
    asm volatile(".section .smp_locks,\"a\"\n"
                 " "
                 ".balign 8"
                 " "
                 "\n"
                 " "
                 ".quad"
                 " "
                 "661f\n"
                 ".previous\n"
                 "661:\n\tlock; "
                 "cmpxchgl %k1,%2"
                 : "=a"(prev)
                 : "r"(new), "m"(*((volatile long *)(ptr))), "0"(old)
                 : "memory");
    return prev;
  case 8:
    asm volatile(".section .smp_locks,\"a\"\n"
                 " "
                 ".balign 8"
                 " "
                 "\n"
                 " "
                 ".quad"
                 " "
                 "661f\n"
                 ".previous\n"
                 "661:\n\tlock; "
                 "cmpxchgq %1,%2"
                 : "=a"(prev)
                 : "r"(new), "m"(*((volatile long *)(ptr))), "0"(old)
                 : "memory");
    return prev;
  }
  return old;
}


x86 assembly (clang, -O0):
<__cmpxchg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %ecx,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x38(%rbp)
sub    $0x7,%eax
ja     11c2 <__cmpxchg+0xc2>
mov    -0x38(%rbp),%rax
lea    0xecd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x20(%rbp),%rcx
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rax
lock cmpxchg %cl,(%rdx)
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    11ca <__cmpxchg+0xca>
mov    -0x20(%rbp),%rcx
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rax
lock cmpxchg %cx,(%rdx)
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    11ca <__cmpxchg+0xca>
mov    -0x20(%rbp),%rcx
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rax
lock cmpxchg %ecx,(%rdx)
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    11ca <__cmpxchg+0xca>
mov    -0x20(%rbp),%rcx
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rax
lock cmpxchg %rcx,(%rdx)
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    11ca <__cmpxchg+0xca>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__cmpxchg>:
mov    %rsi,%rax
add    $0xffffffff,%ecx
cmp    $0x7,%ecx
ja     1130 <__cmpxchg+0x30>
lea    0xeee(%rip),%rsi
movslq (%rsi,%rcx,4),%rcx
add    %rsi,%rcx
jmp    *%rcx
lock cmpxchg %dl,(%rdi)
ret
lock cmpxchg %dx,(%rdi)
ret
lock cmpxchg %edx,(%rdi)
ret
lock cmpxchg %rdx,(%rdi)
ret

LLVM IR (-O0):
define i64 @__cmpxchg(i8* %0, i64 %1, i64 %2, i32 %3) {
%5 = alloca i64
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i64
%9 = alloca i32
%10 = alloca i64
store i8* %0, i8** %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i32 %3, i32* %9
%11 = load i32, i32* %9
switch i32 %11, label %40 [
i32 1, label %12
i32 2, label %19
i32 4, label %26
i32 8, label %33
]
12: ; preds = %4
%13 = load i64, i64* %8
%14 = load i8*, i8** %6
%15 = bitcast i8* %14 to i64*
%16 = load i64, i64* %7
%17 = call i64 asm sideeffect ".section .smp_locks,\22a\22\0A .balign 8 \0A .quad 661f\0A.previous\0A661:\0A\09lock; cmpxchgb ${1:b},$2", "={ax},q,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %13, i64* elementtype(i64) %15, i64 %16)
store i64 %17, i64* %10
%18 = load i64, i64* %10
store i64 %18, i64* %5
br label %42
19: ; preds = %4
%20 = load i64, i64* %8
%21 = load i8*, i8** %6
%22 = bitcast i8* %21 to i64*
%23 = load i64, i64* %7
%24 = call i64 asm sideeffect ".section .smp_locks,\22a\22\0A .balign 8 \0A .quad 661f\0A.previous\0A661:\0A\09lock; cmpxchgw ${1:w},$2", "={ax},r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %20, i64* elementtype(i64) %22, i64 %23)
store i64 %24, i64* %10
%25 = load i64, i64* %10
store i64 %25, i64* %5
br label %42
26: ; preds = %4
%27 = load i64, i64* %8
%28 = load i8*, i8** %6
%29 = bitcast i8* %28 to i64*
%30 = load i64, i64* %7
%31 = call i64 asm sideeffect ".section .smp_locks,\22a\22\0A .balign 8 \0A .quad 661f\0A.previous\0A661:\0A\09lock; cmpxchgl ${1:k},$2", "={ax},r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %27, i64* elementtype(i64) %29, i64 %30)
store i64 %31, i64* %10
%32 = load i64, i64* %10
store i64 %32, i64* %5
br label %42
33: ; preds = %4
%34 = load i64, i64* %8
%35 = load i8*, i8** %6
%36 = bitcast i8* %35 to i64*
%37 = load i64, i64* %7
%38 = call i64 asm sideeffect ".section .smp_locks,\22a\22\0A .balign 8 \0A .quad 661f\0A.previous\0A661:\0A\09lock; cmpxchgq $1,$2", "={ax},r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %34, i64* elementtype(i64) %36, i64 %37)
store i64 %38, i64* %10
%39 = load i64, i64* %10
store i64 %39, i64* %5
br label %42
40: ; preds = %4
%41 = load i64, i64* %7
store i64 %41, i64* %5
br label %42
42: ; preds = %40, %33, %26, %19, %12
%43 = load i64, i64* %5
ret i64 %43
}

LLVM IR (-O2):
define i64 @__cmpxchg(i8* %0, i64 %1, i64 %2, i32 %3) {
switch i32 %3, label %17 [
i32 1, label %5
i32 2, label %8
i32 4, label %11
i32 8, label %14
]
5: ; preds = %4
%6 = bitcast i8* %0 to i64*
%7 = tail call i64 asm sideeffect ".section .smp_locks,\22a\22\0A .balign 8 \0A .quad 661f\0A.previous\0A661:\0A\09lock; cmpxchgb ${1:b},$2", "={ax},q,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %2, i64* elementtype(i64) %6, i64 %1)
br label %17
8: ; preds = %4
%9 = bitcast i8* %0 to i64*
%10 = tail call i64 asm sideeffect ".section .smp_locks,\22a\22\0A .balign 8 \0A .quad 661f\0A.previous\0A661:\0A\09lock; cmpxchgw ${1:w},$2", "={ax},r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %2, i64* elementtype(i64) %9, i64 %1)
br label %17
11: ; preds = %4
%12 = bitcast i8* %0 to i64*
%13 = tail call i64 asm sideeffect ".section .smp_locks,\22a\22\0A .balign 8 \0A .quad 661f\0A.previous\0A661:\0A\09lock; cmpxchgl ${1:k},$2", "={ax},r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %2, i64* elementtype(i64) %12, i64 %1)
br label %17
14: ; preds = %4
%15 = bitcast i8* %0 to i64*
%16 = tail call i64 asm sideeffect ".section .smp_locks,\22a\22\0A .balign 8 \0A .quad 661f\0A.previous\0A661:\0A\09lock; cmpxchgq $1,$2", "={ax},r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %2, i64* elementtype(i64) %15, i64 %1)
br label %17
17: ; preds = %4, %14, %11, %8, %5
%18 = phi i64 [ %16, %14 ], [ %13, %11 ], [ %10, %8 ], [ %7, %5 ], [ %1, %4 ]
ret i64 %18
}