xunge/DecIR huggingface dataset:
int max2(int x, int y) {
  if (x >= y)
    return x;
  else
    return y;
}


x86 assembly (clang, -O0):
<max2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jl     1121 <max2+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <max2+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max2>:
mov    %edi,%eax
cmp    %esi,%edi
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define i32 @max2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp sge i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @max2(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ case1();
int /*<<< orphan*/ case2();
int /*<<< orphan*/ case3();
int /*<<< orphan*/ case4();
int /*<<< orphan*/ case5();
int /*<<< orphan*/ case6();
int main() {
  case1();
  case2();
  case3();
  case4();
  case5();
  case6();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1080 <case1@plt>
mov    $0x0,%al
call   1050 <case2@plt>
mov    $0x0,%al
call   1040 <case3@plt>
mov    $0x0,%al
call   1060 <case4@plt>
mov    $0x0,%al
call   1030 <case5@plt>
mov    $0x0,%al
call   1070 <case6@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1080 <case1@plt>
xor    %eax,%eax
call   1050 <case2@plt>
xor    %eax,%eax
call   1040 <case3@plt>
xor    %eax,%eax
call   1060 <case4@plt>
xor    %eax,%eax
call   1030 <case5@plt>
xor    %eax,%eax
call   1070 <case6@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @case1()
%3 = call i32 (...) @case2()
%4 = call i32 (...) @case3()
%5 = call i32 (...) @case4()
%6 = call i32 (...) @case5()
%7 = call i32 (...) @case6()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @case1()
%2 = tail call i32 (...) @case2()
%3 = tail call i32 (...) @case3()
%4 = tail call i32 (...) @case4()
%5 = tail call i32 (...) @case5()
%6 = tail call i32 (...) @case6()
ret i32 0
}
/* Variables and functions */
int R_edgeBlendTetDrv(int *, double *, double *);
int E_blendOnRegionDrv(int index[], int etype, double *L, double bdrv[3]) {
  if (etype == 4)
    return R_edgeBlendTetDrv(index, L, bdrv);
  else
    return 0;
}


x86 assembly (clang, -O0):
<E_blendOnRegionDrv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
cmpl   $0x4,-0x14(%rbp)
jne    114a <E_blendOnRegionDrv+0x3a>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x28(%rbp),%rdx
call   1030 <R_edgeBlendTetDrv@plt>
mov    %eax,-0x4(%rbp)
jmp    1151 <E_blendOnRegionDrv+0x41>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<E_blendOnRegionDrv>:
cmp    $0x4,%esi
jne    1120 <E_blendOnRegionDrv+0x10>
mov    %rdx,%rsi
mov    %rcx,%rdx
jmp    1030 <R_edgeBlendTetDrv@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @E_blendOnRegionDrv(i32* %0, i32 %1, double* %2, double* %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
%8 = alloca double*
%9 = alloca double*
store i32* %0, i32** %6
store i32 %1, i32* %7
store double* %2, double** %8
store double* %3, double** %9
%10 = load i32, i32* %7
%11 = icmp eq i32 %10, 4
br i1 %11, label %12, label %17
12: ; preds = %4
%13 = load i32*, i32** %6
%14 = load double*, double** %8
%15 = load double*, double** %9
%16 = call i32 @R_edgeBlendTetDrv(i32* %13, double* %14, double* %15)
store i32 %16, i32* %5
br label %18
17: ; preds = %4
store i32 0, i32* %5
br label %18
18: ; preds = %17, %12
%19 = load i32, i32* %5
ret i32 %19
}

LLVM IR (-O2):
define i32 @E_blendOnRegionDrv(i32* %0, i32 %1, double* %2, double* %3) {
%5 = icmp eq i32 %1, 4
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 @R_edgeBlendTetDrv(i32* %0, double* %2, double* %3)
br label %8
8: ; preds = %4, %6
%9 = phi i32 [ %7, %6 ], [ 0, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ hi_stacktrace(int);
int /*<<< orphan*/ printf(char *, char const *, int, char const *);
void hi_assert(const char *cond, const char *file, int line, int panic) {
  printf("File: %s Line: %d: %s\n", file, line, cond);
  if (panic) {
    hi_stacktrace(1);
    abort();
  }
  abort();
}


x86 assembly (clang, -O0):
<hi_assert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rcx
lea    0xea8(%rip),%rdi
call   1040 <printf@plt>
cmpl   $0x0,-0x18(%rbp)
je     1178 <hi_assert+0x48>
mov    $0x1,%edi
call   1050 <hi_stacktrace@plt>
mov    $0x0,%al
call   1030 <abort@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<hi_assert>:
push   %rbx
mov    %ecx,%ebx
mov    %rdi,%rcx
lea    0xec3(%rip),%rdi
call   1040 <printf@plt>
test   %ebx,%ebx
je     1150 <hi_assert+0x20>
mov    $0x1,%edi
call   1050 <hi_stacktrace@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"File: %s Line: %d: %s\0A\00"
define void @hi_assert(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8*, i8** %6
%10 = load i32, i32* %7
%11 = load i8*, i8** %5
%12 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %9, i32 %10, i8* %11)
%13 = load i32, i32* %8
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %4
%16 = call i32 @hi_stacktrace(i32 1)
%17 = call i32 (...) @abort()
unreachable
18: ; preds = %4
%19 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@.str = [23 x i8] c"File: %s Line: %d: %s\0A\00"
define void @hi_assert(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %1, i32 %2, i8* %0)
%6 = icmp eq i32 %3, 0
br i1 %6, label %10, label %7
7: ; preds = %4
%8 = tail call i32 @hi_stacktrace(i32 1)
%9 = tail call i32 (...) @abort()
unreachable
10: ; preds = %4
%11 = tail call i32 (...) @abort()
unreachable
}
unsigned srl(unsigned x, int k) {
  unsigned xsra = (int)x >> k;
  unsigned mask = (unsigned)~0 >> k;
  return xsra & mask;
}


x86 assembly (clang, -O0):
<srl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0xffffffff,%eax
shr    %cl,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
and    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<srl>:
mov    %esi,%ecx
mov    %edi,%eax
sar    %cl,%eax
shl    %cl,%eax
shr    %cl,%eax
ret

LLVM IR (-O0):
define i32 @srl(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = ashr i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %4
%11 = lshr i32 -1, %10
store i32 %11, i32* %6
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = and i32 %12, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @srl(i32 %0, i32 %1) {
%3 = ashr i32 %0, %1
%4 = lshr i32 -1, %1
%5 = and i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int exp(double);
double sigmoid(double value) { return 1 / (1 + exp(-value)); }


x86 assembly (clang, -O0):
<sigmoid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
call   1030 <exp@plt>
mov    %eax,%ecx
add    $0x1,%ecx
mov    $0x1,%eax
cltd
idiv   %ecx
cvtsi2sd %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigmoid>:
push   %rax
xorps  0xee8(%rip),%xmm0
call   1030 <exp@plt>
lea    0x1(%rax),%ecx
add    $0x2,%eax
xor    %edx,%edx
cmp    $0x3,%eax
cmovb  %ecx,%edx
xorps  %xmm0,%xmm0
cvtsi2sd %edx,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @sigmoid(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fneg double %3
%5 = call i32 @exp(double %4)
%6 = add nsw i32 1, %5
%7 = sdiv i32 1, %6
%8 = sitofp i32 %7 to double
ret double %8
}

LLVM IR (-O2):
define double @sigmoid(double %0) {
%2 = fneg double %0
%3 = tail call i32 @exp(double %2)
%4 = add nsw i32 %3, 1
%5 = add i32 %3, 2
%6 = icmp ult i32 %5, 3
%7 = select i1 %6, i32 %4, i32 0
%8 = sitofp i32 %7 to double
ret double %8
}
int test_imm_34uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x34 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_34uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x34,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_34uint64_highword_mem>:
testb  $0x34,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_34uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 52
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_34uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 223338299392
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ fgets(unsigned int *, unsigned int, int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
void gets(unsigned string[], unsigned maxlength) {
  fgets(string, maxlength, stdin);
}


x86 assembly (clang, -O0):
<gets>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    0x2ebb(%rip),%rax
mov    (%rax),%edx
call   1030 <fgets@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gets>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edx
jmp    1030 <fgets@plt>

LLVM IR (-O0):
@stdin = global i32 0
define void @gets(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = load i32, i32* @stdin
%8 = call i32 @fgets(i32* %5, i32 %6, i32 %7)
ret void
}

LLVM IR (-O2):
@stdin = global i32 0
define void @gets(i32* %0, i32 %1) {
%3 = load i32, i32* @stdin
%4 = tail call i32 @fgets(i32* %0, i32 %1, i32 %3)
ret void
}
void vsi_core_close_sys(void) { return; }


x86 assembly (clang, -O0):
<vsi_core_close_sys>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vsi_core_close_sys>:
ret

LLVM IR (-O0):
define void @vsi_core_close_sys() {
ret void
}

LLVM IR (-O2):
define void @vsi_core_close_sys() {
ret void
}
void TCC_InitalizeVIQE(unsigned int FrmWidth, unsigned int FrmHeight,
                       int input_color_format, int offset) {}


x86 assembly (clang, -O0):
<TCC_InitalizeVIQE>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TCC_InitalizeVIQE>:
ret

LLVM IR (-O0):
define void @TCC_InitalizeVIQE(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret void
}

LLVM IR (-O2):
define void @TCC_InitalizeVIQE(i32 %0, i32 %1, i32 %2, i32 %3) {
ret void
}
int test_imm_9Fuint16_mem(unsigned short *val) {
  return ((*val) & (-0x9F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Fuint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffff61,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Fuint16_mem>:
movzwl (%rdi),%eax
test   $0xff61,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Fuint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -159
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_9Fuint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -159
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
char *malloc(int);
int rand();
char *realloc(char *, int);
int /*<<< orphan*/ strcpy(char *, char *);
char *fn82() {
  char *result;
  result = malloc(20 + rand() % 20);
  result = realloc(result, 30 + rand() % 20);
  strcpy((char *)result, "fn82");
  return result;
}


x86 assembly (clang, -O0):
<fn82>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1060 <rand@plt>
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    %edx,%edi
add    $0x14,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1060 <rand@plt>
mov    -0x10(%rbp),%rdi
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    %edx,%esi
add    $0x1e,%esi
call   1050 <realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xe67(%rip),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn82>:
push   %rbx
xor    %eax,%eax
call   1060 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%edi
add    $0x14,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1060 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%esi
add    $0x1e,%esi
mov    %rbx,%rdi
call   1050 <realloc@plt>
mov    %rax,%rbx
lea    0xe4f(%rip),%rsi
mov    %rax,%rdi
call   1030 <strcpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"fn82\00"
define i8* @fn82() {
%1 = alloca i8*
%2 = call i32 (...) @rand()
%3 = srem i32 %2, 20
%4 = add nsw i32 20, %3
%5 = call i8* @malloc(i32 %4)
store i8* %5, i8** %1
%6 = load i8*, i8** %1
%7 = call i32 (...) @rand()
%8 = srem i32 %7, 20
%9 = add nsw i32 30, %8
%10 = call i8* @realloc(i8* %6, i32 %9)
store i8* %10, i8** %1
%11 = load i8*, i8** %1
%12 = call i32 @strcpy(i8* %11, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%13 = load i8*, i8** %1
ret i8* %13
}

LLVM IR (-O2):
@.str = [5 x i8] c"fn82\00"
define i8* @fn82() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 20
%3 = add nsw i32 %2, 20
%4 = tail call i8* @malloc(i32 %3)
%5 = tail call i32 (...) @rand()
%6 = srem i32 %5, 20
%7 = add nsw i32 %6, 30
%8 = tail call i8* @realloc(i8* %4, i32 %7)
%9 = tail call i32 @strcpy(i8* %8, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i8* %8
}
/* Variables and functions */
uintptr_t __align_down(uintptr_t __p, uintptr_t __a) {
  return __p & ~(__a - 1);
}


x86 assembly (clang, -O0):
<__align_down>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    $0x1,%rcx
xor    $0xffffffffffffffff,%rcx
and    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__align_down>:
mov    %rsi,%rax
neg    %rax
and    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @__align_down(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = sub i64 %6, 1
%8 = xor i64 %7, -1
%9 = and i64 %5, %8
ret i64 %9
}

LLVM IR (-O2):
define i64 @__align_down(i64 %0, i64 %1) {
%3 = sub i64 0, %1
%4 = and i64 %3, %0
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
void usage(char *me) {
  printf("Usage: %s -l: list all available configuration items\n", me);
  printf("       %s item: print configuration item\n", me);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rsi
lea    0xeef(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
lea    0xefc(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [54 x i8] c"Usage: %s -l: list all available configuration items\0A\00"
@.str.1 = [42 x i8] c" %s item: print configuration item\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str.1, i64 0, i64 0), i8* %5)
%7 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [54 x i8] c"Usage: %s -l: list all available configuration items\0A\00"
@.str.1 = [42 x i8] c" %s item: print configuration item\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str.1, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ UAVObjRequestUpdate(int /*<<< orphan*/);
int /*<<< orphan*/ VelocityDesiredHandle();
void VelocityDesiredRequestUpdate() {
  UAVObjRequestUpdate(VelocityDesiredHandle());
}


x86 assembly (clang, -O0):
<VelocityDesiredRequestUpdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <VelocityDesiredHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjRequestUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<VelocityDesiredRequestUpdate>:
push   %rax
xor    %eax,%eax
call   1030 <VelocityDesiredHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjRequestUpdate@plt>

LLVM IR (-O0):
define void @VelocityDesiredRequestUpdate() {
%1 = call i32 (...) @VelocityDesiredHandle()
%2 = call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}

LLVM IR (-O2):
define void @VelocityDesiredRequestUpdate() {
%1 = tail call i32 (...) @VelocityDesiredHandle()
%2 = tail call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}
/* Variables and functions */
double dlamch_(char *);
int main(int argc, char **argv) {
  char CMACH = 'E';
  double res = dlamch_(&CMACH);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movb   $0x45,-0x11(%rbp)
lea    -0x11(%rbp),%rdi
call   1030 <dlamch_@plt>
movsd  %xmm0,-0x20(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movb   $0x45,0x7(%rsp)
lea    0x7(%rsp),%rdi
call   1030 <dlamch_@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8
%7 = alloca double
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8 69, i8* %6
%8 = call double @dlamch_(i8* %6)
store double %8, double* %7
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i8
store i8 69, i8* %3
%4 = call double @dlamch_(i8* %3)
ret i32 0
}
int myCompare(void *key, void *list, int index) {
  int keyValue = (int)key;
  int *array = (int *)list;
  return (keyValue - array[index]);
}


x86 assembly (clang, -O0):
<myCompare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%eax
mov    -0x20(%rbp),%rcx
movslq -0x14(%rbp),%rdx
sub    (%rcx,%rdx,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<myCompare>:
mov    %rdi,%rax
movslq %edx,%rcx
sub    (%rsi,%rcx,4),%eax
ret

LLVM IR (-O0):
define i32 @myCompare(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%9 = load i8*, i8** %4
%10 = ptrtoint i8* %9 to i32
store i32 %10, i32* %7
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to i32*
store i32* %12, i32** %8
%13 = load i32, i32* %7
%14 = load i32*, i32** %8
%15 = load i32, i32* %6
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = sub nsw i32 %13, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @myCompare(i8* %0, i8* nocapture %1, i32 %2) {
%4 = ptrtoint i8* %0 to i64
%5 = trunc i64 %4 to i32
%6 = bitcast i8* %1 to i32*
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %6, i64 %7
%9 = load i32, i32* %8
%10 = sub nsw i32 %5, %9
ret i32 %10
}
int is_alphabet(char c) {
  if ((c >= 'a' && c <= 'z') || (c >= 'A' && c <= 'Z')) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<is_alphabet>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1124 <is_alphabet+0x24>
movsbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
jle    113e <is_alphabet+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     114a <is_alphabet+0x4a>
movsbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jg     114a <is_alphabet+0x4a>
movl   $0x1,-0x4(%rbp)
jmp    1151 <is_alphabet+0x51>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_alphabet>:
and    $0xdf,%dil
add    $0xbf,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_alphabet(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 97
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 122
br i1 %10, label %19, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp sge i32 %13, 65
br i1 %14, label %15, label %20
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp sle i32 %17, 90
br i1 %18, label %19, label %20
19: ; preds = %15, %7
store i32 1, i32* %2
br label %21
20: ; preds = %15, %11
store i32 0, i32* %2
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @is_alphabet(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = zext i1 %4 to i32
ret i32 %5
}
int in_byte(int port) {
  int v = 0;
  __asm__("movl %1, %%edx;		        xor %%eax, %%eax;	"
          "	        inb %%dx, %%al;		        movl %%eax,%0;"
          : "=r"(v)
          : "r"(port)
          : "%eax", "%edx");
  return v;
}


x86 assembly (clang, -O0):
<in_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%ecx
mov    %ecx,%edx
xor    %eax,%eax
in     (%dx),%al
mov    %eax,%ecx
mov    %ecx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<in_byte>:
mov    %edi,%edx
xor    %eax,%eax
in     (%dx),%al
mov    %eax,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @in_byte(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = call i32 asm "movl $1, %edx;\09\09 xor %eax, %eax;\09\09 inb %dx, %al;\09\09 movl %eax,$0;", "=r,r,~{eax},~{edx},~{dirflag},~{fpsr},~{flags}"(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @in_byte(i32 %0) {
%2 = tail call i32 asm "movl $1, %edx;\09\09 xor %eax, %eax;\09\09 inb %dx, %al;\09\09 movl %eax,$0;", "=r,r,~{eax},~{edx},~{dirflag},~{fpsr},~{flags}"(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
int /*<<< orphan*/ g();
void *malloc(int);
void f() {
  void *p = malloc(2000);
  free(p);
  g();
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x7d0,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    $0x0,%al
call   1050 <g@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rax
mov    $0x7d0,%edi
call   1040 <malloc@plt>
mov    %rax,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <g@plt>

LLVM IR (-O0):
define void @f() {
%1 = alloca i8*
%2 = call i8* @malloc(i32 2000)
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = call i32 @free(i8* %3)
%5 = call i32 (...) @g()
ret void
}

LLVM IR (-O2):
define void @f() {
%1 = tail call dereferenceable_or_null(2000) i8* @malloc(i32 2000)
%2 = tail call i32 @free(i8* %1)
%3 = tail call i32 (...) @g()
ret void
}
int set_memory_ro(unsigned long addr, int numpages) { return 0; }


x86 assembly (clang, -O0):
<set_memory_ro>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_memory_ro>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @set_memory_ro(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @set_memory_ro(i64 %0, i32 %1) {
ret i32 0
}
int isEven(int stevilo) {
  if (stevilo % 2 == 0) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<isEven>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1127 <isEven+0x27>
movl   $0x1,-0x4(%rbp)
jmp    112e <isEven+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isEven>:
mov    %edi,%eax
not    %eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isEven(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = srem i32 %4, 2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @isEven(i32 %0) {
%2 = and i32 %0, 1
%3 = xor i32 %2, 1
ret i32 %3
}
void init(int *a1, int *a2) {
  int i, s = -1;
  for (i = 0; i < 100000; i++) {
    a1[i] = s;
    a2[i] = i;
    s = -s;
  }
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0xffffffff,-0x18(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x186a0,-0x14(%rbp)
jge    1159 <init+0x59>
mov    -0x18(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
xor    %eax,%eax
sub    -0x18(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    111a <init+0x1a>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movl   $0xffffffff,(%rdi,%rax,4)
mov    %eax,(%rsi,%rax,4)
movl   $0x1,0x4(%rdi,%rax,4)
lea    0x1(%rax),%ecx
mov    %ecx,0x4(%rsi,%rax,4)
movl   $0xffffffff,0x8(%rdi,%rax,4)
ff
lea    0x2(%rax),%ecx
mov    %ecx,0x8(%rsi,%rax,4)
movl   $0x1,0xc(%rdi,%rax,4)
lea    0x3(%rax),%ecx
mov    %ecx,0xc(%rsi,%rax,4)
add    $0x4,%rax
cmp    $0x186a0,%rax
jne    1110 <init+0x10>
ret

LLVM IR (-O0):
define void @init(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
store i32 -1, i32* %6
store i32 0, i32* %5
br label %7
7: ; preds = %23, %2
%8 = load i32, i32* %5
%9 = icmp slt i32 %8, 100000
br i1 %9, label %10, label %26
10: ; preds = %7
%11 = load i32, i32* %6
%12 = load i32*, i32** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
store i32 %11, i32* %15
%16 = load i32, i32* %5
%17 = load i32*, i32** %4
%18 = load i32, i32* %5
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, i32* %17, i64 %19
store i32 %16, i32* %20
%21 = load i32, i32* %6
%22 = sub nsw i32 0, %21
store i32 %22, i32* %6
br label %23
23: ; preds = %10
%24 = load i32, i32* %5
%25 = add nsw i32 %24, 1
store i32 %25, i32* %5
br label %7
26: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @init(i32* nocapture writeonly %0, i32* nocapture writeonly %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i64 [ 0, %2 ], [ %20, %3 ]
%5 = getelementptr inbounds i32, i32* %0, i64 %4
store i32 -1, i32* %5
%6 = getelementptr inbounds i32, i32* %1, i64 %4
%7 = trunc i64 %4 to i32
store i32 %7, i32* %6
%8 = or i64 %4, 1
%9 = getelementptr inbounds i32, i32* %0, i64 %8
store i32 1, i32* %9
%10 = getelementptr inbounds i32, i32* %1, i64 %8
%11 = trunc i64 %8 to i32
store i32 %11, i32* %10
%12 = or i64 %4, 2
%13 = getelementptr inbounds i32, i32* %0, i64 %12
store i32 -1, i32* %13
%14 = getelementptr inbounds i32, i32* %1, i64 %12
%15 = trunc i64 %12 to i32
store i32 %15, i32* %14
%16 = or i64 %4, 3
%17 = getelementptr inbounds i32, i32* %0, i64 %16
store i32 1, i32* %17
%18 = getelementptr inbounds i32, i32* %1, i64 %16
%19 = trunc i64 %16 to i32
store i32 %19, i32* %18
%20 = add nuw nsw i64 %4, 4
%21 = icmp eq i64 %20, 100000
br i1 %21, label %22, label %3
22: ; preds = %3
ret void
}
int abs2(int x) { return (x < 0) ? -x : x; }


x86 assembly (clang, -O0):
<abs2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    111e <abs2+0x1e>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1124 <abs2+0x24>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs2>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = sub nsw i32 0, %6
br label %10
8: ; preds = %1
%9 = load i32, i32* %2
br label %10
10: ; preds = %8, %5
%11 = phi i32 [ %7, %5 ], [ %9, %8 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @abs2(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
void X509_new(void) {}


x86 assembly (clang, -O0):
<X509_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_new>:
ret

LLVM IR (-O0):
define void @X509_new() {
ret void
}

LLVM IR (-O2):
define void @X509_new() {
ret void
}
/* Variables and functions */
double atof(char *);
int parse_option_arg_double(char *arg, double *value) {
  *value = atof(arg);
  return 0;
}


x86 assembly (clang, -O0):
<parse_option_arg_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <atof@plt>
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_option_arg_double>:
push   %rbx
mov    %rsi,%rbx
call   1030 <atof@plt>
movsd  %xmm0,(%rbx)
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @parse_option_arg_double(i8* %0, double* %1) {
%3 = alloca i8*
%4 = alloca double*
store i8* %0, i8** %3
store double* %1, double** %4
%5 = load i8*, i8** %3
%6 = call double @atof(i8* %5)
%7 = load double*, double** %4
store double %6, double* %7
ret i32 0
}

LLVM IR (-O2):
define i32 @parse_option_arg_double(i8* nocapture %0, double* nocapture writeonly %1) {
%3 = tail call double @atof(i8* %0)
store double %3, double* %1
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ shared_types_destroy_initGlobalMutexesFor1Module_0();
void shared_types_destroy_initAllGlobalMutexes_0(void) {
  shared_types_destroy_initGlobalMutexesFor1Module_0();
}


x86 assembly (clang, -O0):
<shared_types_destroy_initAllGlobalMutexes_0>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <shared_types_destroy_initGlobalMutexesFor1Module_0@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<shared_types_destroy_initAllGlobalMutexes_0>:
xor    %eax,%eax
jmp    1030 <shared_types_destroy_initGlobalMutexesFor1Module_0@plt>

LLVM IR (-O0):
define void @shared_types_destroy_initAllGlobalMutexes_0() {
%1 = call i32 (...) @shared_types_destroy_initGlobalMutexesFor1Module_0()
ret void
}

LLVM IR (-O2):
define void @shared_types_destroy_initAllGlobalMutexes_0() {
%1 = tail call i32 (...) @shared_types_destroy_initGlobalMutexesFor1Module_0()
ret void
}
void _mmfault_default_handler() {
  while (1)
    ;
  return;
}


x86 assembly (clang, -O0):
<_mmfault_default_handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <_mmfault_default_handler+0x9>
jmp    1109 <_mmfault_default_handler+0x9>

x86 assembly (clang, -O2):
<_mmfault_default_handler>:
jmp    1100 <_mmfault_default_handler>

LLVM IR (-O0):
define void @_mmfault_default_handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @_mmfault_default_handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ SJC_DriverIRQHandler();
__attribute__((weak)) void SJC_IRQHandler(void) { SJC_DriverIRQHandler(); }


x86 assembly (clang, -O0):
<SJC_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <SJC_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SJC_IRQHandler>:
xor    %eax,%eax
jmp    1030 <SJC_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @SJC_IRQHandler() {
%1 = call i32 (...) @SJC_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @SJC_IRQHandler() {
%1 = tail call i32 (...) @SJC_DriverIRQHandler()
ret void
}
/* Type definitions */
struct airplane_service {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(void *);
void service_airplane_delete(const struct airplane_service *s) {
  free((void *)s);
}


x86 assembly (clang, -O0):
<service_airplane_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<service_airplane_delete>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.airplane_service = type { i32 }
define void @service_airplane_delete(%struct.airplane_service* %0) {
%2 = alloca %struct.airplane_service*
store %struct.airplane_service* %0, %struct.airplane_service** %2
%3 = load %struct.airplane_service*, %struct.airplane_service** %2
%4 = bitcast %struct.airplane_service* %3 to i8*
%5 = call i32 @free(i8* %4)
ret void
}

LLVM IR (-O2):
%struct.airplane_service = type { i32 }
define void @service_airplane_delete(%struct.airplane_service* nocapture %0) {
%2 = bitcast %struct.airplane_service* %0 to i8*
%3 = tail call i32 @free(i8* %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wint_t;

/* Variables and functions */
wint_t towlower(wint_t c) { return (0); }


x86 assembly (clang, -O0):
<towlower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<towlower>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @towlower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @towlower(i32 %0) {
ret i32 0
}
/* Variables and functions */
int division(int *, int, int);
void quick_sort(int *A, int start, int end) {
  if (start < end) {
    int middle = division(A, start, end);
    quick_sort(A, start, middle - 1);
    quick_sort(A, middle + 1, end);
  }
}


x86 assembly (clang, -O0):
<quick_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <quick_sort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <division@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quick_sort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quick_sort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quick_sort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quick_sort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <division@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quick_sort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quick_sort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quick_sort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @division(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @quick_sort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @division(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quick_sort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
int f2(void) { return 43; }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2b,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
mov    $0x2b,%eax
ret

LLVM IR (-O0):
define i32 @f2() {
ret i32 43
}

LLVM IR (-O2):
define i32 @f2() {
ret i32 43
}
int test_imm_46uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0x46 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_46uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x46,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_46uint64_lowword_mem>:
testb  $0x46,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_46uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 70
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_46uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 70
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
unsigned short ntohs(netshort)
unsigned short netshort;
{
  unsigned short retval;
  retval = (((netshort & 0xFF) << 8) | (netshort >> 8));
  return (retval);
}


x86 assembly (clang, -O0):
<ntohs>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
and    $0xff,%eax
shl    $0x8,%eax
movzwl -0x2(%rbp),%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ntohs>:
mov    %edi,%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define zeroext i16 @ntohs(i32 %0) {
%2 = alloca i16
%3 = alloca i16
%4 = trunc i32 %0 to i16
store i16 %4, i16* %2
%5 = load i16, i16* %2
%6 = zext i16 %5 to i32
%7 = and i32 %6, 255
%8 = shl i32 %7, 8
%9 = load i16, i16* %2
%10 = zext i16 %9 to i32
%11 = ashr i32 %10, 8
%12 = or i32 %8, %11
%13 = trunc i32 %12 to i16
store i16 %13, i16* %3
%14 = load i16, i16* %3
ret i16 %14
}

LLVM IR (-O2):
define zeroext i16 @ntohs(i32 %0) {
%2 = trunc i32 %0 to i16
%3 = tail call i16 @llvm.bswap.i16(i16 %2)
ret i16 %3
}
/* Variables and functions */
int /*<<< orphan*/ set_io_bit(int, int);
void TOSH_SET_BOOST_ENABLE_PIN() { set_io_bit(0x70, 4); }


x86 assembly (clang, -O0):
<TOSH_SET_BOOST_ENABLE_PIN>:
push   %rbp
mov    %rsp,%rbp
mov    $0x70,%edi
mov    $0x4,%esi
call   1030 <set_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_SET_BOOST_ENABLE_PIN>:
mov    $0x70,%edi
mov    $0x4,%esi
jmp    1030 <set_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_SET_BOOST_ENABLE_PIN() {
%1 = call i32 @set_io_bit(i32 112, i32 4)
ret void
}

LLVM IR (-O2):
define void @TOSH_SET_BOOST_ENABLE_PIN() {
%1 = tail call i32 @set_io_bit(i32 112, i32 4)
ret void
}
char case2(void) {
  char j = 0;
  char *z = &j;
  j = 1;
  if (*(char *)&j)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<case2>:
push   %rbp
mov    %rsp,%rbp
movb   $0x0,-0x2(%rbp)
lea    -0x2(%rbp),%rax
mov    %rax,-0x10(%rbp)
movb   $0x1,-0x2(%rbp)
cmpb   $0x0,-0x2(%rbp)
je     1127 <case2+0x27>
movb   $0x1,-0x1(%rbp)
jmp    112b <case2+0x2b>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<case2>:
mov    $0x1,%al
ret

LLVM IR (-O0):
define signext i8 @case2() {
%1 = alloca i8
%2 = alloca i8
%3 = alloca i8*
store i8 0, i8* %2
store i8* %2, i8** %3
store i8 1, i8* %2
%4 = load i8, i8* %2
%5 = icmp ne i8 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %0
store i8 1, i8* %1
br label %8
7: ; preds = %0
store i8 0, i8* %1
br label %8
8: ; preds = %7, %6
%9 = load i8, i8* %1
ret i8 %9
}

LLVM IR (-O2):
define signext i8 @case2() {
ret i8 1
}
int f_ne_rr1(float a1, float a2) { return (((a1) != (a2))); }


x86 assembly (clang, -O0):
<f_ne_rr1>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
setne  %al
setp   %cl
or     %cl,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_ne_rr1>:
cmpneqss %xmm1,%xmm0
movd   %xmm0,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @f_ne_rr1(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp une float %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @f_ne_rr1(float %0, float %1) {
%3 = fcmp une float %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
nop() {}


x86 assembly (clang, -O0):
<nop>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nop>:
ret

LLVM IR (-O0):
define i32 @nop() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @nop() {
ret i32 undef
}
double *c_dvector(nl, nh)
long nh, nl;
{
  double *v;
  v = (double *)calloc(nh - nl + 1 + 1, sizeof(double));
  return v - nl + 1;
}


x86 assembly (clang, -O0):
<c_dvector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
sub    -0x8(%rbp),%rdi
add    $0x1,%rdi
add    $0x1,%rdi
mov    $0x8,%esi
call   1030 <calloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
xor    %ecx,%ecx
sub    -0x8(%rbp),%rcx
shl    $0x3,%rcx
add    %rcx,%rax
add    $0x8,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_dvector>:
push   %rbx
mov    %rdi,%rbx
sub    %rdi,%rsi
lea    0x2(%rsi),%rdi
mov    $0x8,%esi
call   1030 <calloc@plt>
shl    $0x3,%rbx
neg    %rbx
add    %rbx,%rax
add    $0x8,%rax
pop    %rbx
ret

LLVM IR (-O0):
define double* @c_dvector(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca double*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = load i64, i64* %3
%8 = sub nsw i64 %6, %7
%9 = add nsw i64 %8, 1
%10 = add nsw i64 %9, 1
%11 = call i8* @calloc(i64 %10, i64 8)
%12 = bitcast i8* %11 to double*
store double* %12, double** %5
%13 = load double*, double** %5
%14 = load i64, i64* %3
%15 = sub i64 0, %14
%16 = getelementptr inbounds double, double* %13, i64 %15
%17 = getelementptr inbounds double, double* %16, i64 1
ret double* %17
}

LLVM IR (-O2):
define noalias double* @c_dvector(i64 %0, i64 %1) {
%3 = sub i64 0, %0
%4 = sub i64 2, %0
%5 = add i64 %4, %1
%6 = tail call i8* @calloc(i64 %5, i64 8)
%7 = bitcast i8* %6 to double*
%8 = getelementptr inbounds double, double* %7, i64 %3
%9 = getelementptr inbounds double, double* %8, i64 1
ret double* %9
}
char *natural_time_delta(const int number) { return ""; }


x86 assembly (clang, -O0):
<natural_time_delta>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
lea    0xef2(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<natural_time_delta>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @natural_time_delta(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @natural_time_delta(i32 %0) {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}
int px_date_day(char *cp) {
  int day, i;
  for (day = 0, i = 6; i < 8; i++)
    day = day * 10 + (cp[i] - '0');
  return day;
}


x86 assembly (clang, -O0):
<px_date_day>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x6,-0x10(%rbp)
cmpl   $0x8,-0x10(%rbp)
jge    1146 <px_date_day+0x46>
imul   $0xa,-0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
movslq -0x10(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
sub    $0x30,%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1116 <px_date_day+0x16>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<px_date_day>:
movsbl 0x6(%rdi),%eax
lea    (%rax,%rax,4),%eax
movsbl 0x7(%rdi),%ecx
lea    (%rcx,%rax,2),%eax
add    $0xfffffdf0,%eax
ret

LLVM IR (-O0):
define i32 @px_date_day(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
store i32 6, i32* %4
br label %5
5: ; preds = %19, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 8
br i1 %7, label %8, label %22
8: ; preds = %5
%9 = load i32, i32* %3
%10 = mul nsw i32 %9, 10
%11 = load i8*, i8** %2
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = sub nsw i32 %16, 48
%18 = add nsw i32 %10, %17
store i32 %18, i32* %3
br label %19
19: ; preds = %8
%20 = load i32, i32* %4
%21 = add nsw i32 %20, 1
store i32 %21, i32* %4
br label %5
22: ; preds = %5
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @px_date_day(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 6
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = mul nsw i32 %4, 10
%6 = getelementptr inbounds i8, i8* %0, i64 7
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = add nsw i32 %5, -528
%10 = add nsw i32 %9, %8
ret i32 %10
}