xunge/DecIR huggingface dataset:
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  unsigned long event;
};
struct TYPE_4__ {
  TYPE_1__ xdestroywindow;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xdestroywindow_event(void *_p, unsigned long _v) {
  ((XEvent *)_p)->xdestroywindow.event = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xdestroywindow_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xdestroywindow_event>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define void @set_XEvent_xdestroywindow_event(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i64 %5, i64* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xdestroywindow_event(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
const int get32l(unsigned char *p) {
  return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
}


x86 assembly (clang, -O0):
<get32l>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%ecx
shl    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get32l>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @get32l(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = or i32 %6, %11
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i64 2
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 16
%18 = or i32 %12, %17
%19 = load i8*, i8** %2
%20 = getelementptr inbounds i8, i8* %19, i64 3
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = shl i32 %22, 24
%24 = or i32 %18, %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @get32l(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = or i32 %7, %3
%9 = getelementptr inbounds i8, i8* %0, i64 2
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = shl nuw nsw i32 %11, 16
%13 = or i32 %8, %12
%14 = getelementptr inbounds i8, i8* %0, i64 3
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = shl nuw i32 %16, 24
%18 = or i32 %13, %17
ret i32 %18
}
/* Variables and functions */
int nondet_int();
int getc() { return nondet_int(); }


x86 assembly (clang, -O0):
<getc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <nondet_int@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getc>:
xor    %eax,%eax
jmp    1030 <nondet_int@plt>

LLVM IR (-O0):
define i32 @getc() {
%1 = call i32 (...) @nondet_int()
ret i32 %1
}

LLVM IR (-O2):
define i32 @getc() {
%1 = tail call i32 (...) @nondet_int()
ret i32 %1
}
void set_sleep_mode(int sm) {}


x86 assembly (clang, -O0):
<set_sleep_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_sleep_mode>:
ret

LLVM IR (-O0):
define void @set_sleep_mode(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @set_sleep_mode(i32 %0) {
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t rev_naive(uint64_t x) {
  uint64_t y;
  int i;
  for (i = 0; i < 64; i++) {
    y = (y << 1) | (x & 1);
    x >>= 1;
  }
  return y;
}


x86 assembly (clang, -O0):
<rev_naive>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x40,-0xc(%rbp)
jge    1140 <rev_naive+0x40>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    -0x4(%rbp),%ecx
and    $0x1,%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <rev_naive+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rev_naive>:
mov    $0x40,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
mov    %edi,%edx
and    $0x1,%edx
shl    $0x2,%edx
lea    (%rdx,%rax,8),%eax
mov    %edi,%edx
and    $0x2,%edx
or     %eax,%edx
mov    %edi,%eax
shr    $0x2,%eax
and    $0x1,%eax
or     %edx,%eax
mov    %edi,%edx
shr    $0x3,%edx
and    $0x1,%edx
lea    (%rdx,%rax,2),%eax
sar    $0x4,%edi
add    $0xfffffffc,%ecx
jne    1110 <rev_naive+0x10>
ret

LLVM IR (-O0):
define i32 @rev_naive(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 64
br i1 %7, label %8, label %19
8: ; preds = %5
%9 = load i32, i32* %3
%10 = shl i32 %9, 1
%11 = load i32, i32* %2
%12 = and i32 %11, 1
%13 = or i32 %10, %12
store i32 %13, i32* %3
%14 = load i32, i32* %2
%15 = ashr i32 %14, 1
store i32 %15, i32* %2
br label %16
16: ; preds = %8
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 1
store i32 %18, i32* %4
br label %5
19: ; preds = %5
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @rev_naive(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %20, %2 ]
%4 = phi i32 [ undef, %1 ], [ %18, %2 ]
%5 = phi i32 [ %0, %1 ], [ %19, %2 ]
%6 = shl i32 %4, 3
%7 = shl i32 %5, 2
%8 = and i32 %7, 4
%9 = or i32 %6, %8
%10 = and i32 %5, 2
%11 = or i32 %9, %10
%12 = lshr i32 %5, 2
%13 = and i32 %12, 1
%14 = or i32 %11, %13
%15 = lshr i32 %5, 3
%16 = shl i32 %14, 1
%17 = and i32 %15, 1
%18 = or i32 %16, %17
%19 = ashr i32 %5, 4
%20 = add nuw nsw i32 %3, 4
%21 = icmp eq i32 %20, 64
br i1 %21, label %22, label %2
22: ; preds = %2
ret i32 %18
}
/* Variables and functions */
size_t strnlen(const char *str, size_t n) {
  size_t i;
  for (i = 0; i < n && str[i] != '\0'; i++)
    ;
  return i;
}


x86 assembly (clang, -O0):
<strnlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
xor    %eax,%eax
cmp    -0x10(%rbp),%rcx
mov    %al,-0x19(%rbp)
jae    113c <strnlen+0x3c>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
test   $0x1,%al
jne    114c <strnlen+0x4c>
jmp    1162 <strnlen+0x62>
jmp    1151 <strnlen+0x51>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1114 <strnlen+0x14>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strnlen>:
xor    %eax,%eax
test   %rsi,%rsi
je     1122 <strnlen+0x22>
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,(%rdi,%rax,1)
je     1122 <strnlen+0x22>
add    $0x1,%rax
cmp    %rax,%rsi
jne    1110 <strnlen+0x10>
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @strnlen(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %20, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %17
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i64, i64* %5
%13 = getelementptr inbounds i8, i8* %11, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 0
br label %17
17: ; preds = %10, %6
%18 = phi i1 [ false, %6 ], [ %16, %10 ]
br i1 %18, label %19, label %23
19: ; preds = %17
br label %20
20: ; preds = %19
%21 = load i64, i64* %5
%22 = add i64 %21, 1
store i64 %22, i64* %5
br label %6
23: ; preds = %17
%24 = load i64, i64* %5
ret i64 %24
}

LLVM IR (-O2):
define i64 @strnlen(i8* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %12, label %4
4: ; preds = %2, %9
%5 = phi i64 [ %10, %9 ], [ 0, %2 ]
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %4
%10 = add nuw i64 %5, 1
%11 = icmp eq i64 %10, %1
br i1 %11, label %12, label %4
12: ; preds = %4, %9, %2
%13 = phi i64 [ 0, %2 ], [ %1, %9 ], [ %5, %4 ]
ret i64 %13
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
scalar_t__ stat(char const *, struct stat *);
int _pu_file_exists(const char *pathname) {
  struct stat statbuf;
  return stat(pathname, &statbuf) == 0;
}


x86 assembly (clang, -O0):
<_pu_file_exists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <stat@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_pu_file_exists>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @_pu_file_exists(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.stat
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @stat(i8* %4, %struct.stat* %3)
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @_pu_file_exists(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ tell_me_a_joke();
int main() {
  tell_me_a_joke();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <tell_me_a_joke@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <tell_me_a_joke@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @tell_me_a_joke()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @tell_me_a_joke()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ baz(int /*<<< orphan*/, int /*<<< orphan*/,
                       int /*<<< orphan*/);
int main() {
  baz(0, 0, 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edx,%edx
mov    %edx,%edi
mov    %edx,%esi
call   1030 <baz@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
call   1030 <baz@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @baz(i32 0, i32 0, i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @baz(i32 0, i32 0, i32 0)
ret i32 0
}
RX0I1(r0, r1, x0, x1, p0, p1) short r0, r1;
short *p0, *p1;
{ (p0[x0]) = 33; }


x86 assembly (clang, -O0):
<RX0I1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
movw   $0x21,(%rax,%rcx,2)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RX0I1>:
movslq %edx,%rax
movw   $0x21,(%r8,%rax,2)
ret

LLVM IR (-O0):
define i32 @RX0I1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16*, i16** %12
%17 = load i32, i32* %10
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i16, i16* %16, i64 %18
store i16 33, i16* %19
%20 = load i32, i32* %7
ret i32 %20
}

LLVM IR (-O2):
define i32 @RX0I1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture writeonly %4, i16* nocapture readnone %5) {
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i16, i16* %4, i64 %7
store i16 33, i16* %8
ret i32 undef
}
void calcula(float l, float *area, float *perimetro) {
  *area = l * l;
  *perimetro = l * 4;
}


x86 assembly (clang, -O0):
<calcula>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
movss  0xed5(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<calcula>:
movaps %xmm0,%xmm1
mulss  %xmm0,%xmm1
movss  %xmm1,(%rdi)
mulss  0xeed(%rip),%xmm0
movss  %xmm0,(%rsi)
ret

LLVM IR (-O0):
define void @calcula(float %0, float* %1, float* %2) {
%4 = alloca float
%5 = alloca float*
%6 = alloca float*
store float %0, float* %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float, float* %4
%8 = load float, float* %4
%9 = fmul float %7, %8
%10 = load float*, float** %5
store float %9, float* %10
%11 = load float, float* %4
%12 = fmul float %11, 4.000000e+00
%13 = load float*, float** %6
store float %12, float* %13
ret void
}

LLVM IR (-O2):
define void @calcula(float %0, float* nocapture writeonly %1, float* nocapture writeonly %2) {
%4 = fmul float %0, %0
store float %4, float* %1
%5 = fmul float %0, 4.000000e+00
store float %5, float* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void vector_free(void *data) { free(data); }


x86 assembly (clang, -O0):
<vector_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vector_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @vector_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @vector_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ error(char *);
void errorCtrlOutOfScope(void) {
  error("break, continue, case or default in wrong scope\n");
}


x86 assembly (clang, -O0):
<errorCtrlOutOfScope>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <error@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<errorCtrlOutOfScope>:
lea    0xee9(%rip),%rdi
jmp    1030 <error@plt>

LLVM IR (-O0):
@.str = [49 x i8] c"break, continue, case or default in wrong scope\0A\00"
define void @errorCtrlOutOfScope() {
%1 = call i32 @error(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [49 x i8] c"break, continue, case or default in wrong scope\0A\00"
define void @errorCtrlOutOfScope() {
%1 = tail call i32 @error(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0))
ret void
}
void trigger_alarm(int signo) { return; }


x86 assembly (clang, -O0):
<trigger_alarm>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<trigger_alarm>:
ret

LLVM IR (-O0):
define void @trigger_alarm(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @trigger_alarm(i32 %0) {
ret void
}
int mus_mixer_fadeout_stop(int device) {
  printf("%s not implemented\n", __func__);
  return (-1);
}


x86 assembly (clang, -O0):
<mus_mixer_fadeout_stop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
lea    0xeeb(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mus_mixer_fadeout_stop>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xef5(%rip),%rsi
xor    %eax,%eax
call   1030 <printf@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"%s not implemented\0A\00"
@__func__.mus_mixer_fadeout_stop = [23 x i8] c"mus_mixer_fadeout_stop\00"
define i32 @mus_mixer_fadeout_stop(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([23 x i8], [23 x i8]* @__func__.mus_mixer_fadeout_stop, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@.str = [20 x i8] c"%s not implemented\0A\00"
@__func__.mus_mixer_fadeout_stop = [23 x i8] c"mus_mixer_fadeout_stop\00"
define i32 @mus_mixer_fadeout_stop(i32 %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([23 x i8], [23 x i8]* @__func__.mus_mixer_fadeout_stop, i64 0, i64 0))
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void nameTableProcessorOptions() {
  printf("\t-n[<00..ff>]\tgenerate NAMTBL [starting at value <n>]\n");
  printf("\t-bb<00..ff>\tblank block at position <nn>\n");
  printf("\t-rr\tremove repeated tiles\n");
  printf("\t-rm<0..f>\tremove solid tiles of <n> color\n");
}


x86 assembly (clang, -O0):
<nameTableProcessorOptions>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf10(%rip),%rdi
call   1030 <printf@plt>
lea    0xf2f(%rip),%rdi
call   1030 <printf@plt>
lea    0xf3f(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nameTableProcessorOptions>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf12(%rip),%rdi
call   1030 <puts@plt>
lea    0xf30(%rip),%rdi
call   1030 <puts@plt>
lea    0xf3f(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [55 x i8] c"\09-n[<00..ff>]\09generate NAMTBL [starting at value <n>]\0A\00"
@.str.1 = [43 x i8] c"\09-bb<00..ff>\09blank block at position <nn>\0A\00"
@.str.2 = [28 x i8] c"\09-rr\09remove repeated tiles\0A\00"
@.str.3 = [44 x i8] c"\09-rm<0..f>\09remove solid tiles of <n> color\0A\00"
define void @nameTableProcessorOptions() {
%1 = call i32 @printf(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [54 x i8] c"\09-n[<00..ff>]\09generate NAMTBL [starting at value <n>]\00"
@str.4 = [42 x i8] c"\09-bb<00..ff>\09blank block at position <nn>\00"
@str.5 = [27 x i8] c"\09-rr\09remove repeated tiles\00"
@str.6 = [43 x i8] c"\09-rm<0..f>\09remove solid tiles of <n> color\00"
define void @nameTableProcessorOptions() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([54 x i8], [54 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @str.4, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @str.5, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([43 x i8], [43 x i8]* @str.6, i64 0, i64 0))
ret void
}
void test_alt() {
  __typeof__(int) a = 10;
  fexpect("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
          "2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/input/8cc/"
          "typeof.c",
          28, 10, a);
  ;
}


x86 assembly (clang, -O0):
<test_alt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xa,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
lea    0xed7(%rip),%rdi
mov    $0x1c,%esi
mov    $0xa,%edx
mov    $0x0,%al
call   1030 <fexpect@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_alt>:
lea    0xee9(%rip),%rdi
mov    $0x1c,%esi
mov    $0xa,%edx
mov    $0xa,%ecx
xor    %eax,%eax
jmp    1030 <fexpect@plt>

LLVM IR (-O0):
@.str = [139 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/input/8cc/typeof.c\00"
define void @test_alt() {
%1 = alloca i32
store i32 10, i32* %1
%2 = load i32, i32* %1
%3 = call i32 (i8*, i32, i32, i32, ...) bitcast (i32 (...)* @fexpect to i32 (i8*, i32, i32, i32, ...)*)(i8* getelementptr inbounds ([139 x i8], [139 x i8]* @.str, i64 0, i64 0), i32 28, i32 10, i32 %2)
ret void
}

LLVM IR (-O2):
@.str = [139 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/input/8cc/typeof.c\00"
define void @test_alt() {
%1 = tail call i32 (i8*, i32, i32, i32, ...) bitcast (i32 (...)* @fexpect to i32 (i8*, i32, i32, i32, ...)*)(i8* getelementptr inbounds ([139 x i8], [139 x i8]* @.str, i64 0, i64 0), i32 28, i32 10, i32 10)
ret void
}
/* Type definitions */
struct inode {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ current_fsuid();
int inode_permission(struct inode *, int);
int au_test_h_perm(struct inode *h_inode, int mask) {
  if (!current_fsuid())
    return 0;
  return inode_permission(h_inode, mask);
}


x86 assembly (clang, -O0):
<au_test_h_perm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    $0x0,%al
call   1030 <current_fsuid@plt>
cmp    $0x0,%eax
jne    114b <au_test_h_perm+0x2b>
movl   $0x0,-0x4(%rbp)
jmp    115a <au_test_h_perm+0x3a>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <inode_permission@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<au_test_h_perm>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <current_fsuid@plt>
test   %eax,%eax
je     1143 <au_test_h_perm+0x23>
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <inode_permission@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.inode = type { i32 }
define i32 @au_test_h_perm(%struct.inode* %0, i32 %1) {
%3 = alloca i32
%4 = alloca %struct.inode*
%5 = alloca i32
store %struct.inode* %0, %struct.inode** %4
store i32 %1, i32* %5
%6 = call i32 (...) @current_fsuid()
%7 = icmp ne i32 %6, 0
br i1 %7, label %9, label %8
8: ; preds = %2
store i32 0, i32* %3
br label %13
9: ; preds = %2
%10 = load %struct.inode*, %struct.inode** %4
%11 = load i32, i32* %5
%12 = call i32 @inode_permission(%struct.inode* %10, i32 %11)
store i32 %12, i32* %3
br label %13
13: ; preds = %9, %8
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
%struct.inode = type { i32 }
define i32 @au_test_h_perm(%struct.inode* %0, i32 %1) {
%3 = tail call i32 (...) @current_fsuid()
%4 = icmp eq i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @inode_permission(%struct.inode* %0, i32 %1)
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ %6, %5 ], [ 0, %2 ]
ret i32 %8
}
/* Type definitions */
typedef int uint64_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
void TimerMatchSet64(uint32_t ui32Base, uint64_t ui64Value) {
  ;
  (*((volatile unsigned long *)(ui32Base + 0x00000034))) = ui64Value >> 32;
  (*((volatile unsigned long *)(ui32Base + 0x00000030))) =
      ui64Value & 0xffffffff;
}


x86 assembly (clang, -O0):
<TimerMatchSet64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x20,%ecx
sar    %cl,%eax
movslq %eax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x34(%rax)
mov    -0xc(%rbp),%eax
and    $0xffffffff,%eax
mov    %eax,%eax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rcx,0x30(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerMatchSet64>:
mov    %esi,%eax
mov    %rax,0x30(%rdi)
ret

LLVM IR (-O0):
define void @TimerMatchSet64(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 32
%7 = sext i32 %6 to i64
%8 = load i64, i64* %3
%9 = add nsw i64 %8, 52
%10 = inttoptr i64 %9 to i64*
store volatile i64 %7, i64* %10
%11 = load i32, i32* %4
%12 = and i32 %11, -1
%13 = zext i32 %12 to i64
%14 = load i64, i64* %3
%15 = add nsw i64 %14, 48
%16 = inttoptr i64 %15 to i64*
store volatile i64 %13, i64* %16
ret void
}

LLVM IR (-O2):
define void @TimerMatchSet64(i64 %0, i32 %1) {
%3 = add nsw i64 %0, 52
%4 = inttoptr i64 %3 to i64*
store volatile i64 poison, i64* %4
%5 = zext i32 %1 to i64
%6 = add nsw i64 %0, 48
%7 = inttoptr i64 %6 to i64*
store volatile i64 %5, i64* %7
ret void
}
void interrupt_unblock() { asm("sti"); }


x86 assembly (clang, -O0):
<interrupt_unblock>:
push   %rbp
mov    %rsp,%rbp
sti
pop    %rbp
ret

x86 assembly (clang, -O2):
<interrupt_unblock>:
sti
ret

LLVM IR (-O0):
define void @interrupt_unblock() {
ret void
}

LLVM IR (-O2):
define void @interrupt_unblock() {
tail call void asm sideeffect "sti", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
int isescapemeta(int c) {
  if (c == '\\') {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<isescapemeta>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x5c,-0x8(%rbp)
jne    111d <isescapemeta+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    1124 <isescapemeta+0x24>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isescapemeta>:
xor    %eax,%eax
cmp    $0x5c,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @isescapemeta(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 92
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @isescapemeta(i32 %0) {
%2 = icmp eq i32 %0, 92
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
void mput_char(char c, unsigned int num) {
  while (num--) {
    putchar(c);
  }
}


x86 assembly (clang, -O0):
<mput_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x8(%rbp)
cmp    $0x0,%eax
je     1143 <mput_char+0x33>
movsbl -0x1(%rbp),%edi
call   1030 <putchar@plt>
jmp    1121 <mput_char+0x11>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mput_char>:
push   %rbp
push   %rbx
push   %rax
test   %esi,%esi
je     112c <mput_char+0x1c>
mov    %esi,%ebx
movsbl %dil,%ebp
nopl   (%rax)
mov    %ebp,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebx
jne    1120 <mput_char+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @mput_char(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
br label %5
5: ; preds = %9, %2
%6 = load i32, i32* %4
%7 = add i32 %6, -1
store i32 %7, i32* %4
%8 = icmp ne i32 %6, 0
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = load i8, i8* %3
%11 = call i32 @putchar(i8 signext %10)
br label %5
12: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @mput_char(i8 signext %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %6, %4 ], [ %1, %2 ]
%6 = add i32 %5, -1
%7 = tail call i32 @putchar(i8 signext %0)
%8 = icmp eq i32 %6, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
ret void
}
void RandomFunc(unsigned long input[1], unsigned long output[1]) {
  unsigned long state[1];
  unsigned long local2;
  unsigned long local1;
  {
    state[0UL] = input[0UL] + 0xffffffffff660b45UL;
    local1 = 0UL;
    while (local1 < 0UL) {
      local2 = 0UL;
      while (local2 < 0UL) {
        state[0UL] += state[0UL];
        local2 += 2UL;
      }
      local1 += 2UL;
    }
    output[0UL] = state[0UL] - 746550669UL;
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
add    $0xffffffffff660b45,%rax
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
jae    1171 <RandomFunc+0x71>
movq   $0x0,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jae    1160 <RandomFunc+0x60>
mov    -0x18(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rax
add    $0x2,%rax
mov    %rax,-0x20(%rbp)
jmp    1138 <RandomFunc+0x38>
mov    -0x28(%rbp),%rax
add    $0x2,%rax
mov    %rax,-0x28(%rbp)
jmp    1125 <RandomFunc+0x25>
mov    -0x18(%rbp),%rcx
sub    $0x2c7f758d,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
mov    $0xffffffffd2e695b8,%rax
add    (%rdi),%rax
mov    %rax,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i64* %0, i64* %1) {
%3 = alloca i64*
%4 = alloca i64*
%5 = alloca [1 x i64]
%6 = alloca i64
%7 = alloca i64
store i64* %0, i64** %3
store i64* %1, i64** %4
%8 = load i64*, i64** %3
%9 = getelementptr inbounds i64, i64* %8, i64 0
%10 = load i64, i64* %9
%11 = add i64 %10, -10089659
%12 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
store i64 %11, i64* %12
store i64 0, i64* %7
br label %13
13: ; preds = %28, %2
%14 = load i64, i64* %7
%15 = icmp ult i64 %14, 0
br i1 %15, label %16, label %31
16: ; preds = %13
store i64 0, i64* %6
br label %17
17: ; preds = %20, %16
%18 = load i64, i64* %6
%19 = icmp ult i64 %18, 0
br i1 %19, label %20, label %28
20: ; preds = %17
%21 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%22 = load i64, i64* %21
%23 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%24 = load i64, i64* %23
%25 = add i64 %24, %22
store i64 %25, i64* %23
%26 = load i64, i64* %6
%27 = add i64 %26, 2
store i64 %27, i64* %6
br label %17
28: ; preds = %17
%29 = load i64, i64* %7
%30 = add i64 %29, 2
store i64 %30, i64* %7
br label %13
31: ; preds = %13
%32 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%33 = load i64, i64* %32
%34 = sub i64 %33, 746550669
%35 = load i64*, i64** %4
%36 = getelementptr inbounds i64, i64* %35, i64 0
store i64 %34, i64* %36
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i64* nocapture %0, i64* nocapture writeonly %1) {
%3 = load i64, i64* %0
%4 = add i64 %3, -756640328
store i64 %4, i64* %1
ret void
}
/* Type definitions */
struct stat {
  int /*<<< orphan*/ st_mode;
};

/* Variables and functions */
int S_ISDIR(int /*<<< orphan*/);
int /*<<< orphan*/ stat(char const *const, struct stat *);
unsigned Athena_IsDirectory(const char *const in) {
  struct stat l_stat;
  stat(in, &l_stat);
  return S_ISDIR(l_stat.st_mode);
}


x86 assembly (clang, -O0):
<Athena_IsDirectory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1040 <stat@plt>
mov    -0x10(%rbp),%edi
call   1030 <S_ISDIR@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Athena_IsDirectory>:
push   %rax
mov    %rsp,%rsi
call   1040 <stat@plt>
mov    (%rsp),%edi
pop    %rax
jmp    1030 <S_ISDIR@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @Athena_IsDirectory(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.stat
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @stat(i8* %4, %struct.stat* %3)
%6 = getelementptr inbounds %struct.stat, %struct.stat* %3, i32 0, i32 0
%7 = load i32, i32* %6
%8 = call i32 @S_ISDIR(i32 %7)
ret i32 %8
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @Athena_IsDirectory(i8* nocapture %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i32 @stat(i8* %0, %struct.stat* %2)
%5 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%6 = load i32, i32* %5
%7 = tail call i32 @S_ISDIR(i32 %6)
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ jmp_buf;

/* Variables and functions */
int __my_setjmp(int /*<<< orphan*/);
int my_setjmp(jmp_buf env) { return __my_setjmp(env); }


x86 assembly (clang, -O0):
<my_setjmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <__my_setjmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_setjmp>:
jmp    1030 <__my_setjmp@plt>

LLVM IR (-O0):
define i32 @my_setjmp(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__my_setjmp(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @my_setjmp(i32 %0) {
%2 = tail call i32 @__my_setjmp(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ test_parser_sourcefile(char *, char *);
int /*<<< orphan*/ test_parser_verify_parse(int /*<<< orphan*/, char *, char *,
                                            char *, int /*<<< orphan*/);
void test_idl_pvwave_comments() {
  test_parser_verify_parse(test_parser_sourcefile("idl_pvwave", " ;comment"),
                           "idl_pvwave", "", ";comment", 0);
}


x86 assembly (clang, -O0):
<test_idl_pvwave_comments>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xed9(%rip),%rsi
call   1030 <test_parser_sourcefile@plt>
mov    %eax,%edi
lea    0xec0(%rip),%rsi
lea    0xec3(%rip),%rdx
lea    0xebe(%rip),%rcx
xor    %r8d,%r8d
call   1040 <test_parser_verify_parse@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_idl_pvwave_comments>:
push   %rbx
lea    0xed8(%rip),%rbx
lea    0xedc(%rip),%rsi
mov    %rbx,%rdi
call   1030 <test_parser_sourcefile@plt>
lea    0xecc(%rip),%rdx
lea    0xec7(%rip),%rcx
mov    %eax,%edi
mov    %rbx,%rsi
xor    %r8d,%r8d
pop    %rbx
jmp    1040 <test_parser_verify_parse@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"idl_pvwave\00"
@.str.1 = [10 x i8] c" ;comment\00"
@.str.2 = [1 x i8] zeroinitializer
@.str.3 = [9 x i8] c";comment\00"
define void @test_idl_pvwave_comments() {
%1 = call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%2 = call i32 @test_parser_verify_parse(i32 %1, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.3, i64 0, i64 0), i32 0)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"idl_pvwave\00"
@.str.1 = [10 x i8] c" ;comment\00"
@.str.2 = [1 x i8] zeroinitializer
@.str.3 = [9 x i8] c";comment\00"
define void @test_idl_pvwave_comments() {
%1 = tail call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @test_parser_verify_parse(i32 %1, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.3, i64 0, i64 0), i32 0)
ret void
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
uint32_t EPIWriteFIFOCountGet(uint32_t ui32Base) {
  ;
  return ((*((volatile unsigned long *)(ui32Base + 0x00000204))));
}


x86 assembly (clang, -O0):
<EPIWriteFIFOCountGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x204(%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<EPIWriteFIFOCountGet>:
mov    %rdi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
mov    0x204(%rax),%rax
ret

LLVM IR (-O0):
define i64 @EPIWriteFIFOCountGet(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = add i64 %3, 516
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @EPIWriteFIFOCountGet(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = add i64 %3, 516
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}
/* Variables and functions */
int /*<<< orphan*/ nist_dump_hex(void const *, int);
int /*<<< orphan*/ printf(char *, ...);
void nist_dump_named_hex(const char *name, const void *data, int length) {
  printf(" %s: ", name);
  nist_dump_hex(data, length);
  printf("\n");
}


x86 assembly (clang, -O0):
<nist_dump_named_hex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec2(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <nist_dump_hex@plt>
lea    0xeae(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nist_dump_named_hex>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebp
mov    %rsi,%rbx
mov    %rdi,%rsi
lea    0xebe(%rip),%rdi
xor    %eax,%eax
call   1050 <printf@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
call   1040 <nist_dump_hex@plt>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [6 x i8] c" %s: \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @nist_dump_named_hex(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %7)
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 @nist_dump_hex(i8* %9, i32 %10)
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c" %s: \00"
define void @nist_dump_named_hex(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %0)
%5 = tail call i32 @nist_dump_hex(i8* %1, i32 %2)
%6 = tail call i32 @putchar(i32 10)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ yes;

/* Variables and functions */
int /*<<< orphan*/ SOL_SOCKET;
int setsockopt(int, int /*<<< orphan*/, int, int *, int);
bool set_sock_opt(int socket, int option, bool enable) {
  int yes = (enable ? 1 : 0);
  int err = setsockopt(socket, SOL_SOCKET, option, &yes, sizeof(yes));
  return !err;
}


x86 assembly (clang, -O0):
<set_sock_opt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eaa(%rip),%rax
mov    (%rax),%esi
mov    -0x8(%rbp),%edx
lea    -0x10(%rbp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_sock_opt>:
push   %rax
mov    %esi,%eax
xor    %ecx,%ecx
test   %edx,%edx
setne  %cl
mov    %ecx,0x4(%rsp)
mov    0x2ec3(%rip),%rcx
mov    (%rcx),%esi
lea    0x4(%rsp),%rcx
mov    %eax,%edx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@SOL_SOCKET = global i32 0
define i32 @set_sock_opt(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i32, i32* %6
%10 = icmp ne i32 %9, 0
%11 = zext i1 %10 to i64
%12 = select i1 %10, i32 1, i32 0
store i32 %12, i32* %7
%13 = load i32, i32* %4
%14 = load i32, i32* @SOL_SOCKET
%15 = load i32, i32* %5
%16 = call i32 @setsockopt(i32 %13, i32 %14, i32 %15, i32* %7, i32 4)
store i32 %16, i32* %8
%17 = load i32, i32* %8
%18 = icmp ne i32 %17, 0
%19 = xor i1 %18, true
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
@SOL_SOCKET = global i32 0
define i32 @set_sock_opt(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = bitcast i32* %4 to i8*
%6 = icmp ne i32 %2, 0
%7 = zext i1 %6 to i32
store i32 %7, i32* %4
%8 = load i32, i32* @SOL_SOCKET
%9 = call i32 @setsockopt(i32 %0, i32 %8, i32 %1, i32* %4, i32 4)
%10 = icmp eq i32 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}
/* Variables and functions */
unsigned int _pext_u32(unsigned int, unsigned int);
unsigned int test_pext_u32(unsigned int __X, unsigned int __Y) {
  return _pext_u32(__X, __Y);
}


x86 assembly (clang, -O0):
<test_pext_u32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_pext_u32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_pext_u32>:
jmp    1030 <_pext_u32@plt>

LLVM IR (-O0):
define i32 @test_pext_u32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_pext_u32(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_pext_u32(i32 %0, i32 %1) {
%3 = tail call i32 @_pext_u32(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ _ACC_init_current_device_if_not_inited();
void _ACC_init_api(void) { _ACC_init_current_device_if_not_inited(); }


x86 assembly (clang, -O0):
<_ACC_init_api>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_ACC_init_current_device_if_not_inited@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ACC_init_api>:
xor    %eax,%eax
jmp    1030 <_ACC_init_current_device_if_not_inited@plt>

LLVM IR (-O0):
define void @_ACC_init_api() {
%1 = call i32 (...) @_ACC_init_current_device_if_not_inited()
ret void
}

LLVM IR (-O2):
define void @_ACC_init_api() {
%1 = tail call i32 (...) @_ACC_init_current_device_if_not_inited()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ ntohs(int /*<<< orphan*/);
uint16_t _dns_parse_uint16(char **p) {
  uint16_t *x, v;
  x = (uint16_t *)*p;
  v = ntohs(*x);
  *p += 2;
  return v;
}


x86 assembly (clang, -O0):
<_dns_parse_uint16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
call   1030 <ntohs@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x2,%rcx
mov    %rcx,(%rax)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dns_parse_uint16>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rax
mov    (%rax),%edi
call   1030 <ntohs@plt>
addq   $0x2,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define i32 @_dns_parse_uint16(i8** %0) {
%2 = alloca i8**
%3 = alloca i32*
%4 = alloca i32
store i8** %0, i8*** %2
%5 = load i8**, i8*** %2
%6 = load i8*, i8** %5
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %3
%8 = load i32*, i32** %3
%9 = load i32, i32* %8
%10 = call i32 @ntohs(i32 %9)
store i32 %10, i32* %4
%11 = load i8**, i8*** %2
%12 = load i8*, i8** %11
%13 = getelementptr inbounds i8, i8* %12, i64 2
store i8* %13, i8** %11
%14 = load i32, i32* %4
ret i32 %14
}

LLVM IR (-O2):
define i32 @_dns_parse_uint16(i8** nocapture %0) {
%2 = bitcast i8** %0 to i32**
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = tail call i32 @ntohs(i32 %4)
%6 = load i8*, i8** %0
%7 = getelementptr inbounds i8, i8* %6, i64 2
store i8* %7, i8** %0
ret i32 %5
}
int f() {
  const int *p;
  int v;
  v = *p;
  return 0;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @f() {
%1 = alloca i32*
%2 = alloca i32
%3 = load i32*, i32** %1
%4 = load i32, i32* %3
store i32 %4, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @f() {
ret i32 0
}
/* Type definitions */
struct timeval {
  double tv_sec;
  double tv_usec;
};

/* Variables and functions */
void *events_timer_register(int (*)(void *), void *, struct timeval *);
void *events_timer_register_double(int (*func)(void *), void *cookie,
                                   double timeo) {
  struct timeval tv;
  tv.tv_sec = timeo;
  tv.tv_usec = (timeo - tv.tv_sec) * 1000000.0;
  return (events_timer_register(func, cookie, &tv));
}


x86 assembly (clang, -O0):
<events_timer_register_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x18(%rbp),%xmm0
subsd  -0x28(%rbp),%xmm0
movsd  0xebf(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x28(%rbp),%rdx
call   1030 <events_timer_register@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<events_timer_register_double>:
sub    $0x18,%rsp
movsd  %xmm0,0x8(%rsp)
subsd  %xmm0,%xmm0
mulsd  0xeda(%rip),%xmm0
movsd  %xmm0,0x10(%rsp)
lea    0x8(%rsp),%rdx
call   1030 <events_timer_register@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { double, double }
define i8* @events_timer_register_double(i32 (i8*)* %0, i8* %1, double %2) {
%4 = alloca i32 (i8*)*
%5 = alloca i8*
%6 = alloca double
%7 = alloca %struct.timeval
store i32 (i8*)* %0, i32 (i8*)** %4
store i8* %1, i8** %5
store double %2, double* %6
%8 = load double, double* %6
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %7, i32 0, i32 0
store double %8, double* %9
%10 = load double, double* %6
%11 = getelementptr inbounds %struct.timeval, %struct.timeval* %7, i32 0, i32 0
%12 = load double, double* %11
%13 = fsub double %10, %12
%14 = fmul double %13, 1.000000e+06
%15 = getelementptr inbounds %struct.timeval, %struct.timeval* %7, i32 0, i32 1
store double %14, double* %15
%16 = load i32 (i8*)*, i32 (i8*)** %4
%17 = load i8*, i8** %5
%18 = call i8* @events_timer_register(i32 (i8*)* %16, i8* %17, %struct.timeval* %7)
ret i8* %18
}

LLVM IR (-O2):
%struct.timeval = type { double, double }
define i8* @events_timer_register_double(i32 (i8*)* %0, i8* %1, double %2) {
%4 = alloca %struct.timeval
%5 = bitcast %struct.timeval* %4 to i8*
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %4, i64 0, i32 0
store double %2, double* %6
%7 = fsub double %2, %2
%8 = fmul double %7, 1.000000e+06
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %4, i64 0, i32 1
store double %8, double* %9
%10 = call i8* @events_timer_register(i32 (i8*)* %0, i8* %1, %struct.timeval* %4)
ret i8* %10
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_bus_creds_get_unit(void *c, const char **ret) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_bus_creds_get_unit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ecb(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_creds_get_unit>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_bus_creds_get_unit(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
%5 = load i32, i32* @EINVAL
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_bus_creds_get_unit(i8* nocapture readnone %0, i8** nocapture readnone %1) {
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ t(int);
int main() {
  t(5);
  t(20);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%edi
call   1030 <t@plt>
mov    $0x14,%edi
call   1030 <t@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
call   1030 <t@plt>
mov    $0x14,%edi
call   1030 <t@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @t(i32 5)
%2 = call i32 @t(i32 20)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @t(i32 5)
%2 = tail call i32 @t(i32 20)
ret i32 0
}
int XEventsQueued() {}


x86 assembly (clang, -O0):
<XEventsQueued>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XEventsQueued>:
ret

LLVM IR (-O0):
define i32 @XEventsQueued() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @XEventsQueued() {
ret i32 undef
}