int init_adc(int resolution, int freq, int channel, int interrupt) {
  if (resolution == 10) {
    (*(volatile unsigned int *)(0x7E00B000)) &= ~(1 << 16);
  } else if (resolution == 12) {
    (*(volatile unsigned int *)(0x7E00B000)) |= (1 << 16);
  } else {
    return -16;
  }
  switch (freq) {
  case 0:
    (*(volatile unsigned int *)(0x7E00B000)) &= ~(1 << 14);
    (*(volatile unsigned int *)(0x7E00B000)) |= (0xFF << 6);
    break;
  case 1:
    (*(volatile unsigned int *)(0x7E00B000)) |= (1 << 14);
    (*(volatile unsigned int *)(0x7E00B000)) &= ~(0xFF << 6);
    (*(volatile unsigned int *)(0x7E00B000)) |= (65 << 6);
    break;
  case 2:
    (*(volatile unsigned int *)(0x7E00B000)) |= (1 << 14);
    (*(volatile unsigned int *)(0x7E00B000)) &= ~(0xFF << 6);
    (*(volatile unsigned int *)(0x7E00B000)) |= (32 << 6);
    break;
  case 3:
    (*(volatile unsigned int *)(0x7E00B000)) |= (1 << 14);
    (*(volatile unsigned int *)(0x7E00B000)) &= ~(0xFF << 6);
    (*(volatile unsigned int *)(0x7E00B000)) |= (21 << 6);
    break;
  case 4:
    (*(volatile unsigned int *)(0x7E00B000)) |= (1 << 14);
    (*(volatile unsigned int *)(0x7E00B000)) &= ~(0xFF << 6);
    (*(volatile unsigned int *)(0x7E00B000)) |= (15 << 6);
    break;
  case 5:
    (*(volatile unsigned int *)(0x7E00B000)) |= (1 << 14);
    (*(volatile unsigned int *)(0x7E00B000)) &= ~(0xFF << 6);
    (*(volatile unsigned int *)(0x7E00B000)) |= (14 << 6);
    break;
  default:
    return -6;
  }
  switch (channel) {
  case 0:
    (*(volatile unsigned int *)(0x7E00B000)) &= ~(7 << 3);
    break;
  case 1:
    (*(volatile unsigned int *)(0x7E00B000)) &= ~(7 << 3);
    (*(volatile unsigned int *)(0x7E00B000)) |= (1 << 3);
    break;
  case 2:
    (*(volatile unsigned int *)(0x7E00B000)) &= ~(7 << 3);
    (*(volatile unsigned int *)(0x7E00B000)) |= (2 << 3);
    break;
  case 3:
    (*(volatile unsigned int *)(0x7E00B000)) &= ~(7 << 3);
    (*(volatile unsigned int *)(0x7E00B000)) |= (3 << 3);
    break;
  default:
    return -3;
  }
  (*(volatile unsigned int *)(0x7E00B000)) &= ~(1 << 2);
  (*(volatile unsigned int *)(0x7E00B000)) &= ~(1 << 1);
  if (interrupt == 1) {
    (*(volatile unsigned int *)(0x71300010)) |= (1 << 31);
  }
  return 0;
}


x86 assembly (clang, -O0):
<init_adc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
cmpl   $0xa,-0x8(%rbp)
jne    1133 <init_adc+0x33>
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
and    $0xfffeffff,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
jmp    1167 <init_adc+0x67>
cmpl   $0xc,-0x8(%rbp)
jne    1156 <init_adc+0x56>
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
or     $0x10000,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
jmp    1162 <init_adc+0x62>
movl   $0xfffffff0,-0x4(%rbp)
jmp    140d <init_adc+0x30d>
jmp    1167 <init_adc+0x67>
mov    -0xc(%rbp),%eax
mov    %rax,-0x20(%rbp)
sub    $0x5,%rax
ja     12fe <init_adc+0x1fe>
mov    -0x20(%rbp),%rax
lea    0xe7d(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
and    $0xffffbfff,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
or     $0x3fc0,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
jmp    130a <init_adc+0x20a>
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
or     $0x4000,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
and    $0xffffc03f,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
or     $0x1040,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
jmp    130a <init_adc+0x20a>
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
or     $0x4000,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
and    $0xffffc03f,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
or     $0x800,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
jmp    130a <init_adc+0x20a>
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
or     $0x4000,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
and    $0xffffc03f,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
or     $0x540,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
jmp    130a <init_adc+0x20a>
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
or     $0x4000,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
and    $0xffffc03f,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
or     $0x3c0,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
jmp    130a <init_adc+0x20a>
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
or     $0x4000,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
and    $0xffffc03f,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
or     $0x380,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
jmp    130a <init_adc+0x20a>
movl   $0xfffffffa,-0x4(%rbp)
jmp    140d <init_adc+0x30d>
mov    -0x10(%rbp),%eax
mov    %rax,-0x28(%rbp)
sub    $0x3,%rax
ja     13ba <init_adc+0x2ba>
mov    -0x28(%rbp),%rax
lea    0xcf2(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
and    $0xffffffc7,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
jmp    13c6 <init_adc+0x2c6>
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
and    $0xffffffc7,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
or     $0x8,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
jmp    13c6 <init_adc+0x2c6>
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
and    $0xffffffc7,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
or     $0x10,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
jmp    13c6 <init_adc+0x2c6>
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
and    $0xffffffc7,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
or     $0x18,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
jmp    13c6 <init_adc+0x2c6>
movl   $0xfffffffd,-0x4(%rbp)
jmp    140d <init_adc+0x30d>
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
and    $0xfffffffb,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
mov    $0x7e00b000,%eax
mov    (%rax),%ecx
and    $0xfffffffd,%ecx
mov    $0x7e00b000,%eax
mov    %ecx,(%rax)
cmpl   $0x1,-0x14(%rbp)
jne    1406 <init_adc+0x306>
mov    $0x71300010,%eax
mov    (%rax),%ecx
or     $0x80000000,%ecx
mov    $0x71300010,%eax
mov    %ecx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_adc>:
cmp    $0xc,%edi
je     1121 <init_adc+0x21>
mov    $0xfffffff0,%eax
cmp    $0xa,%edi
jne    122c <init_adc+0x12c>
mov    $0xfffeffff,%eax
and    0x7e00b000,%eax
jmp    112d <init_adc+0x2d>
mov    $0x10000,%eax
or     0x7e00b000,%eax
mov    %eax,0x7e00b000
cmp    $0x5,%esi
ja     1163 <init_adc+0x63>
mov    $0x1040,%r8d
mov    $0x3fc0,%eax
mov    $0xffffbfff,%edi
mov    %esi,%esi
lea    0xeae(%rip),%r9
movslq (%r9,%rsi,4),%rsi
add    %r9,%rsi
jmp    *%rsi
mov    $0x800,%r8d
jmp    117f <init_adc+0x7f>
mov    $0xfffffffa,%eax
ret
mov    $0x540,%r8d
jmp    117f <init_adc+0x7f>
mov    $0x3c0,%r8d
jmp    117f <init_adc+0x7f>
mov    $0x380,%r8d
orl    $0x4000,0x7e00b000
mov    $0xffffc03f,%edi
mov    %r8d,%eax
and    %edi,0x7e00b000
or     %eax,0x7e00b000
cmp    $0x3,%edx
ja     11c3 <init_adc+0xc3>
mov    %edx,%eax
lea    0xe6a(%rip),%rdx
movslq (%rdx,%rax,4),%rax
add    %rdx,%rax
jmp    *%rax
mov    0x7e00b000,%eax
and    $0xffffffc7,%eax
jmp    1203 <init_adc+0x103>
mov    $0xfffffffd,%eax
ret
andl   $0xffffffc7,0x7e00b000
c7
mov    0x7e00b000,%eax
or     $0x8,%eax
jmp    1203 <init_adc+0x103>
andl   $0xffffffc7,0x7e00b000
c7
mov    0x7e00b000,%eax
or     $0x10,%eax
jmp    1203 <init_adc+0x103>
andl   $0xffffffc7,0x7e00b000
c7
mov    0x7e00b000,%eax
or     $0x18,%eax
mov    %eax,0x7e00b000
andl   $0xfffffffb,0x7e00b000
fb
andl   $0xfffffffd,0x7e00b000
fd
xor    %eax,%eax
cmp    $0x1,%ecx
jne    122c <init_adc+0x12c>
orl    $0x80000000,0x71300010
ret

LLVM IR (-O0):
define i32 @init_adc(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
%10 = load i32, i32* %6
%11 = icmp eq i32 %10, 10
br i1 %11, label %12, label %15
12: ; preds = %4
%13 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%14 = and i32 %13, -65537
store volatile i32 %14, i32* inttoptr (i64 2113974272 to i32*)
br label %23
15: ; preds = %4
%16 = load i32, i32* %6
%17 = icmp eq i32 %16, 12
br i1 %17, label %18, label %21
18: ; preds = %15
%19 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%20 = or i32 %19, 65536
store volatile i32 %20, i32* inttoptr (i64 2113974272 to i32*)
br label %22
21: ; preds = %15
store i32 -16, i32* %5
br label %98
22: ; preds = %18
br label %23
23: ; preds = %22, %12
%24 = load i32, i32* %7
switch i32 %24, label %65 [
i32 0, label %25
i32 1, label %30
i32 2, label %37
i32 3, label %44
i32 4, label %51
i32 5, label %58
]
25: ; preds = %23
%26 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%27 = and i32 %26, -16385
store volatile i32 %27, i32* inttoptr (i64 2113974272 to i32*)
%28 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%29 = or i32 %28, 16320
store volatile i32 %29, i32* inttoptr (i64 2113974272 to i32*)
br label %66
30: ; preds = %23
%31 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%32 = or i32 %31, 16384
store volatile i32 %32, i32* inttoptr (i64 2113974272 to i32*)
%33 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%34 = and i32 %33, -16321
store volatile i32 %34, i32* inttoptr (i64 2113974272 to i32*)
%35 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%36 = or i32 %35, 4160
store volatile i32 %36, i32* inttoptr (i64 2113974272 to i32*)
br label %66
37: ; preds = %23
%38 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%39 = or i32 %38, 16384
store volatile i32 %39, i32* inttoptr (i64 2113974272 to i32*)
%40 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%41 = and i32 %40, -16321
store volatile i32 %41, i32* inttoptr (i64 2113974272 to i32*)
%42 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%43 = or i32 %42, 2048
store volatile i32 %43, i32* inttoptr (i64 2113974272 to i32*)
br label %66
44: ; preds = %23
%45 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%46 = or i32 %45, 16384
store volatile i32 %46, i32* inttoptr (i64 2113974272 to i32*)
%47 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%48 = and i32 %47, -16321
store volatile i32 %48, i32* inttoptr (i64 2113974272 to i32*)
%49 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%50 = or i32 %49, 1344
store volatile i32 %50, i32* inttoptr (i64 2113974272 to i32*)
br label %66
51: ; preds = %23
%52 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%53 = or i32 %52, 16384
store volatile i32 %53, i32* inttoptr (i64 2113974272 to i32*)
%54 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%55 = and i32 %54, -16321
store volatile i32 %55, i32* inttoptr (i64 2113974272 to i32*)
%56 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%57 = or i32 %56, 960
store volatile i32 %57, i32* inttoptr (i64 2113974272 to i32*)
br label %66
58: ; preds = %23
%59 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%60 = or i32 %59, 16384
store volatile i32 %60, i32* inttoptr (i64 2113974272 to i32*)
%61 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%62 = and i32 %61, -16321
store volatile i32 %62, i32* inttoptr (i64 2113974272 to i32*)
%63 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%64 = or i32 %63, 896
store volatile i32 %64, i32* inttoptr (i64 2113974272 to i32*)
br label %66
65: ; preds = %23
store i32 -6, i32* %5
br label %98
66: ; preds = %58, %51, %44, %37, %30, %25
%67 = load i32, i32* %8
switch i32 %67, label %86 [
i32 0, label %68
i32 1, label %71
i32 2, label %76
i32 3, label %81
]
68: ; preds = %66
%69 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%70 = and i32 %69, -57
store volatile i32 %70, i32* inttoptr (i64 2113974272 to i32*)
br label %87
71: ; preds = %66
%72 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%73 = and i32 %72, -57
store volatile i32 %73, i32* inttoptr (i64 2113974272 to i32*)
%74 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%75 = or i32 %74, 8
store volatile i32 %75, i32* inttoptr (i64 2113974272 to i32*)
br label %87
76: ; preds = %66
%77 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%78 = and i32 %77, -57
store volatile i32 %78, i32* inttoptr (i64 2113974272 to i32*)
%79 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%80 = or i32 %79, 16
store volatile i32 %80, i32* inttoptr (i64 2113974272 to i32*)
br label %87
81: ; preds = %66
%82 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%83 = and i32 %82, -57
store volatile i32 %83, i32* inttoptr (i64 2113974272 to i32*)
%84 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%85 = or i32 %84, 24
store volatile i32 %85, i32* inttoptr (i64 2113974272 to i32*)
br label %87
86: ; preds = %66
store i32 -3, i32* %5
br label %98
87: ; preds = %81, %76, %71, %68
%88 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%89 = and i32 %88, -5
store volatile i32 %89, i32* inttoptr (i64 2113974272 to i32*)
%90 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%91 = and i32 %90, -3
store volatile i32 %91, i32* inttoptr (i64 2113974272 to i32*)
%92 = load i32, i32* %9
%93 = icmp eq i32 %92, 1
br i1 %93, label %94, label %97
94: ; preds = %87
%95 = load volatile i32, i32* inttoptr (i64 1898971152 to i32*)
%96 = or i32 %95, -2147483648
store volatile i32 %96, i32* inttoptr (i64 1898971152 to i32*)
br label %97
97: ; preds = %94, %87
store i32 0, i32* %5
br label %98
98: ; preds = %97, %86, %65, %21
%99 = load i32, i32* %5
ret i32 %99
}

LLVM IR (-O2):
define i32 @init_adc(i32 %0, i32 %1, i32 %2, i32 %3) {
switch i32 %0, label %56 [
i32 10, label %5
i32 12, label %8
]
5: ; preds = %4
%6 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%7 = and i32 %6, -65537
br label %11
8: ; preds = %4
%9 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%10 = or i32 %9, 65536
br label %11
11: ; preds = %8, %5
%12 = phi i32 [ %10, %8 ], [ %7, %5 ]
store volatile i32 %12, i32* inttoptr (i64 2113974272 to i32*)
switch i32 %1, label %56 [
i32 0, label %21
i32 1, label %17
i32 2, label %13
i32 3, label %14
i32 4, label %15
i32 5, label %16
]
13: ; preds = %11
br label %17
14: ; preds = %11
br label %17
15: ; preds = %11
br label %17
16: ; preds = %11
br label %17
17: ; preds = %11, %13, %14, %15, %16
%18 = phi i32 [ 2048, %13 ], [ 1344, %14 ], [ 960, %15 ], [ 896, %16 ], [ 4160, %11 ]
%19 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%20 = or i32 %19, 16384
store volatile i32 %20, i32* inttoptr (i64 2113974272 to i32*)
br label %21
21: ; preds = %17, %11
%22 = phi i32 [ -16385, %11 ], [ -16321, %17 ]
%23 = phi i32 [ 16320, %11 ], [ %18, %17 ]
%24 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%25 = and i32 %24, %22
store volatile i32 %25, i32* inttoptr (i64 2113974272 to i32*)
%26 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%27 = or i32 %26, %23
store volatile i32 %27, i32* inttoptr (i64 2113974272 to i32*)
switch i32 %2, label %56 [
i32 0, label %28
i32 1, label %31
i32 2, label %36
i32 3, label %41
]
28: ; preds = %21
%29 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%30 = and i32 %29, -57
br label %46
31: ; preds = %21
%32 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%33 = and i32 %32, -57
store volatile i32 %33, i32* inttoptr (i64 2113974272 to i32*)
%34 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%35 = or i32 %34, 8
br label %46
36: ; preds = %21
%37 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%38 = and i32 %37, -57
store volatile i32 %38, i32* inttoptr (i64 2113974272 to i32*)
%39 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%40 = or i32 %39, 16
br label %46
41: ; preds = %21
%42 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%43 = and i32 %42, -57
store volatile i32 %43, i32* inttoptr (i64 2113974272 to i32*)
%44 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%45 = or i32 %44, 24
br label %46
46: ; preds = %41, %36, %31, %28
%47 = phi i32 [ %45, %41 ], [ %40, %36 ], [ %35, %31 ], [ %30, %28 ]
store volatile i32 %47, i32* inttoptr (i64 2113974272 to i32*)
%48 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%49 = and i32 %48, -5
store volatile i32 %49, i32* inttoptr (i64 2113974272 to i32*)
%50 = load volatile i32, i32* inttoptr (i64 2113974272 to i32*)
%51 = and i32 %50, -3
store volatile i32 %51, i32* inttoptr (i64 2113974272 to i32*)
%52 = icmp eq i32 %3, 1
br i1 %52, label %53, label %56
53: ; preds = %46
%54 = load volatile i32, i32* inttoptr (i64 1898971152 to i32*)
%55 = or i32 %54, -2147483648
store volatile i32 %55, i32* inttoptr (i64 1898971152 to i32*)
br label %56
56: ; preds = %46, %53, %21, %11, %4
%57 = phi i32 [ -16, %4 ], [ -6, %11 ], [ -3, %21 ], [ 0, %53 ], [ 0, %46 ]
ret i32 %57
}