int irc_ischanchar(char c, int first) {
  if (first)
    return (c == '#' || c == '+' || c == '&');
  switch (c) {
  case 0x00:
  case 0x07:
  case 0x0D:
  case 0x0A:
  case ' ':
  case ',':
  case ':':
    return 0;
  default:
    return 1;
  }
}


x86 assembly (clang, -O0):
<irc_ischanchar>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1158 <irc_ischanchar+0x58>
movsbl -0x5(%rbp),%ecx
mov    $0x1,%al
cmp    $0x23,%ecx
mov    %al,-0xd(%rbp)
je     1148 <irc_ischanchar+0x48>
movsbl -0x5(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2b,%ecx
mov    %al,-0xd(%rbp)
je     1148 <irc_ischanchar+0x48>
movsbl -0x5(%rbp),%eax
cmp    $0x26,%eax
sete   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    11e5 <irc_ischanchar+0xe5>
movsbl -0x5(%rbp),%eax
mov    %eax,-0x14(%rbp)
test   %eax,%eax
je     11d2 <irc_ischanchar+0xd2>
jmp    116c <irc_ischanchar+0x6c>
mov    -0x14(%rbp),%eax
sub    $0x7,%eax
je     11d2 <irc_ischanchar+0xd2>
jmp    117d <irc_ischanchar+0x7d>
mov    -0x14(%rbp),%eax
sub    $0xa,%eax
je     11d2 <irc_ischanchar+0xd2>
jmp    118e <irc_ischanchar+0x8e>
mov    -0x14(%rbp),%eax
sub    $0xd,%eax
je     11d2 <irc_ischanchar+0xd2>
jmp    119f <irc_ischanchar+0x9f>
mov    -0x14(%rbp),%eax
sub    $0x20,%eax
je     11d2 <irc_ischanchar+0xd2>
jmp    11b0 <irc_ischanchar+0xb0>
mov    -0x14(%rbp),%eax
sub    $0x2c,%eax
je     11d2 <irc_ischanchar+0xd2>
jmp    11c1 <irc_ischanchar+0xc1>
mov    -0x14(%rbp),%eax
sub    $0x3a,%eax
jne    11de <irc_ischanchar+0xde>
jmp    11d2 <irc_ischanchar+0xd2>
movl   $0x0,-0x4(%rbp)
jmp    11e5 <irc_ischanchar+0xe5>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<irc_ischanchar>:
test   %esi,%esi
je     111a <irc_ischanchar+0x1a>
mov    %edi,%eax
and    $0xf7,%al
cmp    $0x23,%al
sete   %al
cmp    $0x26,%dil
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret
movsbl %dil,%ecx
cmp    $0x3a,%ecx
ja     1136 <irc_ischanchar+0x36>
xor    %eax,%eax
movabs $0x400100100002481,%rdx
bt     %rcx,%rdx
jae    1136 <irc_ischanchar+0x36>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @irc_ischanchar(i8 signext %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i32
store i8 %0, i8* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %23
8: ; preds = %2
%9 = load i8, i8* %4
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 35
br i1 %11, label %20, label %12
12: ; preds = %8
%13 = load i8, i8* %4
%14 = sext i8 %13 to i32
%15 = icmp eq i32 %14, 43
br i1 %15, label %20, label %16
16: ; preds = %12
%17 = load i8, i8* %4
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 38
br label %20
20: ; preds = %16, %12, %8
%21 = phi i1 [ true, %12 ], [ true, %8 ], [ %19, %16 ]
%22 = zext i1 %21 to i32
store i32 %22, i32* %3
br label %28
23: ; preds = %2
%24 = load i8, i8* %4
%25 = sext i8 %24 to i32
switch i32 %25, label %27 [
i32 0, label %26
i32 7, label %26
i32 13, label %26
i32 10, label %26
i32 32, label %26
i32 44, label %26
i32 58, label %26
]
26: ; preds = %23, %23, %23, %23, %23, %23, %23
store i32 0, i32* %3
br label %28
27: ; preds = %23
store i32 1, i32* %3
br label %28
28: ; preds = %27, %26, %20
%29 = load i32, i32* %3
ret i32 %29
}

LLVM IR (-O2):
define i32 @irc_ischanchar(i8 signext %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %10, label %4
4: ; preds = %2
%5 = and i8 %0, -9
%6 = icmp eq i8 %5, 35
%7 = icmp eq i8 %0, 38
%8 = or i1 %7, %6
%9 = zext i1 %8 to i32
br label %13
10: ; preds = %2
%11 = sext i8 %0 to i32
switch i32 %11, label %12 [
i32 0, label %13
i32 7, label %13
i32 13, label %13
i32 10, label %13
i32 32, label %13
i32 44, label %13
i32 58, label %13
]
12: ; preds = %10
br label %13
13: ; preds = %10, %10, %10, %10, %10, %10, %10, %12, %4
%14 = phi i32 [ %9, %4 ], [ 1, %12 ], [ 0, %10 ], [ 0, %10 ], [ 0, %10 ], [ 0, %10 ], [ 0, %10 ], [ 0, %10 ], [ 0, %10 ]
ret i32 %14
}