xunge/DecIR huggingface dataset:
void en32(char *buf, unsigned long l) {
  buf[0] = l >> 24;
  buf[1] = l >> 16;
  buf[2] = l >> 8;
  buf[3] = l;
}


x86 assembly (clang, -O0):
<en32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x18,%rax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
shr    $0x10,%rax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x10(%rbp),%rax
shr    $0x8,%rax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0x10(%rbp),%rax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<en32>:
bswap  %esi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @en32(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = lshr i64 %5, 24
%7 = trunc i64 %6 to i8
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 0
store i8 %7, i8* %9
%10 = load i64, i64* %4
%11 = lshr i64 %10, 16
%12 = trunc i64 %11 to i8
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i64 1
store i8 %12, i8* %14
%15 = load i64, i64* %4
%16 = lshr i64 %15, 8
%17 = trunc i64 %16 to i8
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i64 2
store i8 %17, i8* %19
%20 = load i64, i64* %4
%21 = trunc i64 %20 to i8
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i64 3
store i8 %21, i8* %23
ret void
}

LLVM IR (-O2):
define void @en32(i8* nocapture writeonly %0, i64 %1) {
%3 = lshr i64 %1, 24
%4 = trunc i64 %3 to i8
store i8 %4, i8* %0
%5 = lshr i64 %1, 16
%6 = trunc i64 %5 to i8
%7 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %6, i8* %7
%8 = lshr i64 %1, 8
%9 = trunc i64 %8 to i8
%10 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %9, i8* %10
%11 = trunc i64 %1 to i8
%12 = getelementptr inbounds i8, i8* %0, i64 3
store i8 %11, i8* %12
ret void
}
/* Variables and functions */
scalar_t__ path_matches(char const *, char const *);
unsigned char check_path_match(const char *cookie_path, const char *path) {
  return path_matches(path, cookie_path) != 0;
}


x86 assembly (clang, -O0):
<check_path_match>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <path_matches@plt>
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_path_match>:
push   %rax
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
call   1030 <path_matches@plt>
test   %rax,%rax
setne  %al
pop    %rcx
ret

LLVM IR (-O0):
define zeroext i8 @check_path_match(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i8*, i8** %3
%7 = call i64 @path_matches(i8* %5, i8* %6)
%8 = icmp ne i64 %7, 0
%9 = zext i1 %8 to i32
%10 = trunc i32 %9 to i8
ret i8 %10
}

LLVM IR (-O2):
define zeroext i8 @check_path_match(i8* %0, i8* %1) {
%3 = tail call i64 @path_matches(i8* %1, i8* %0)
%4 = icmp ne i64 %3, 0
%5 = zext i1 %4 to i8
ret i8 %5
}
int main(int argc, char **argv) {
#pragma pack(1)
  struct {
    char c;
    long l;
  } s;
  return sizeof(s) == sizeof(s.c) + sizeof(s.l) ? 0 : 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.anon = type <{ i8, i64 }>
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca %struct.anon
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
ret i32 0
}

LLVM IR (-O2):
%struct.anon = type <{ i8, i64 }>
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
void _backlight_on(void) { (*(volatile unsigned long *)0x80000300) |= 0x40; }


x86 assembly (clang, -O0):
<_backlight_on>:
push   %rbp
mov    %rsp,%rbp
mov    $0x80000300,%eax
mov    (%rax),%rcx
or     $0x40,%rcx
mov    $0x80000300,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_backlight_on>:
mov    $0x80000300,%eax
orq    $0x40,(%rax)
ret

LLVM IR (-O0):
define void @_backlight_on() {
%1 = load volatile i64, i64* inttoptr (i64 2147484416 to i64*)
%2 = or i64 %1, 64
store volatile i64 %2, i64* inttoptr (i64 2147484416 to i64*)
ret void
}

LLVM IR (-O2):
define void @_backlight_on() {
%1 = load volatile i64, i64* inttoptr (i64 2147484416 to i64*)
%2 = or i64 %1, 64
store volatile i64 %2, i64* inttoptr (i64 2147484416 to i64*)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/ *);
void closeMorseMail(FILE *out) { fputs("</MorseMail>\n", out); }


x86 assembly (clang, -O0):
<closeMorseMail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <fputs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<closeMorseMail>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
mov    $0xd,%esi
mov    $0x1,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"</MorseMail>\0A\00"
define void @closeMorseMail(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fputs(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32* %3)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"</MorseMail>\0A\00"
define void @closeMorseMail(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i64 13, i64 1, i32* %0)
ret void
}
void set_signed_int3(unsigned char *string, int n) {
  int sign;
  sign = 0;
  if (n < 0) {
    n = -n;
    sign = 128;
  }
  string[0] = ((n >> 16) & 255) | sign;
  string[1] = (n >> 8) & 255;
  string[2] = n & 255;
}


x86 assembly (clang, -O0):
<set_signed_int3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    112b <set_signed_int3+0x2b>
xor    %eax,%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
movl   $0x80,-0x10(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x10,%eax
and    $0xff,%eax
or     -0x10(%rbp),%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0xc(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x2(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_signed_int3>:
mov    %esi,%eax
neg    %eax
cmovs  %esi,%eax
shr    $0x18,%esi
and    $0xffffff80,%esi
mov    %eax,%ecx
shr    $0x10,%ecx
or     %esi,%ecx
mov    %cl,(%rdi)
mov    %ah,0x1(%rdi)
mov    %al,0x2(%rdi)
ret

LLVM IR (-O0):
define void @set_signed_int3(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* %4
%10 = sub nsw i32 0, %9
store i32 %10, i32* %4
store i32 128, i32* %5
br label %11
11: ; preds = %8, %2
%12 = load i32, i32* %4
%13 = ashr i32 %12, 16
%14 = and i32 %13, 255
%15 = load i32, i32* %5
%16 = or i32 %14, %15
%17 = trunc i32 %16 to i8
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i64 0
store i8 %17, i8* %19
%20 = load i32, i32* %4
%21 = ashr i32 %20, 8
%22 = and i32 %21, 255
%23 = trunc i32 %22 to i8
%24 = load i8*, i8** %3
%25 = getelementptr inbounds i8, i8* %24, i64 1
store i8 %23, i8* %25
%26 = load i32, i32* %4
%27 = and i32 %26, 255
%28 = trunc i32 %27 to i8
%29 = load i8*, i8** %3
%30 = getelementptr inbounds i8, i8* %29, i64 2
store i8 %28, i8* %30
ret void
}

LLVM IR (-O2):
define void @set_signed_int3(i8* nocapture writeonly %0, i32 %1) {
%3 = tail call i32 @llvm.abs.i32(i32 %1, i1 true)
%4 = lshr i32 %1, 24
%5 = and i32 %4, 128
%6 = lshr i32 %3, 16
%7 = or i32 %6, %5
%8 = trunc i32 %7 to i8
store i8 %8, i8* %0
%9 = lshr i32 %3, 8
%10 = trunc i32 %9 to i8
%11 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %10, i8* %11
%12 = trunc i32 %3 to i8
%13 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %12, i8* %13
ret void
}
/* Type definitions */
struct alloc_type {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(void *);
void myfree(struct alloc_type *myalloc, void *tofree) { free(tofree); }


x86 assembly (clang, -O0):
<myfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<myfree>:
mov    %rsi,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.alloc_type = type { i32 }
define void @myfree(%struct.alloc_type* %0, i8* %1) {
%3 = alloca %struct.alloc_type*
%4 = alloca i8*
store %struct.alloc_type* %0, %struct.alloc_type** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
%struct.alloc_type = type { i32 }
define void @myfree(%struct.alloc_type* nocapture readnone %0, i8* nocapture %1) {
%3 = tail call i32 @free(i8* %1)
ret void
}
/* Variables and functions */
void glmLessThan3fs(bool out[3], const float x[3], float y) {
  for (size_t i = 0; i < 3; ++i)
    out[i] = x[i] < y;
}


x86 assembly (clang, -O0):
<glmLessThan3fs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
movq   $0x0,-0x20(%rbp)
cmpq   $0x3,-0x20(%rbp)
jae    115d <glmLessThan3fs+0x5d>
mov    -0x10(%rbp),%rax
mov    -0x20(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm1
movss  -0x14(%rbp),%xmm0
ucomiss %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%edx
mov    -0x8(%rbp),%rax
mov    -0x20(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1119 <glmLessThan3fs+0x19>
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmLessThan3fs>:
xor    %eax,%eax
ucomiss (%rsi),%xmm0
seta   %al
mov    %eax,(%rdi)
xor    %eax,%eax
ucomiss 0x4(%rsi),%xmm0
seta   %al
mov    %eax,0x4(%rdi)
xor    %eax,%eax
ucomiss 0x8(%rsi),%xmm0
seta   %al
mov    %eax,0x8(%rdi)
ret

LLVM IR (-O0):
define void @glmLessThan3fs(i32* %0, float* %1, float %2) {
%4 = alloca i32*
%5 = alloca float*
%6 = alloca float
%7 = alloca i64
store i32* %0, i32** %4
store float* %1, float** %5
store float %2, float* %6
store i64 0, i64* %7
br label %8
8: ; preds = %22, %3
%9 = load i64, i64* %7
%10 = icmp ult i64 %9, 3
br i1 %10, label %11, label %25
11: ; preds = %8
%12 = load float*, float** %5
%13 = load i64, i64* %7
%14 = getelementptr inbounds float, float* %12, i64 %13
%15 = load float, float* %14
%16 = load float, float* %6
%17 = fcmp olt float %15, %16
%18 = zext i1 %17 to i32
%19 = load i32*, i32** %4
%20 = load i64, i64* %7
%21 = getelementptr inbounds i32, i32* %19, i64 %20
store i32 %18, i32* %21
br label %22
22: ; preds = %11
%23 = load i64, i64* %7
%24 = add i64 %23, 1
store i64 %24, i64* %7
br label %8
25: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @glmLessThan3fs(i32* nocapture writeonly %0, float* nocapture %1, float %2) {
%4 = load float, float* %1
%5 = fcmp olt float %4, %2
%6 = zext i1 %5 to i32
store i32 %6, i32* %0
%7 = getelementptr inbounds float, float* %1, i64 1
%8 = load float, float* %7
%9 = fcmp olt float %8, %2
%10 = zext i1 %9 to i32
%11 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %10, i32* %11
%12 = getelementptr inbounds float, float* %1, i64 2
%13 = load float, float* %12
%14 = fcmp olt float %13, %2
%15 = zext i1 %14 to i32
%16 = getelementptr inbounds i32, i32* %0, i64 2
store i32 %15, i32* %16
ret void
}
void ff_hevc_put_hevc_uni_qpel_h4_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_qpel_h4_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_qpel_h4_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_qpel_h4_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_qpel_h4_10_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SHA_DriverIRQHandler();
__attribute__((weak)) void SHA_IRQHandler(void) { SHA_DriverIRQHandler(); }


x86 assembly (clang, -O0):
<SHA_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <SHA_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHA_IRQHandler>:
xor    %eax,%eax
jmp    1030 <SHA_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @SHA_IRQHandler() {
%1 = call i32 (...) @SHA_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @SHA_IRQHandler() {
%1 = tail call i32 (...) @SHA_DriverIRQHandler()
ret void
}
/* Variables and functions */
int verify(unsigned char const *, unsigned char const *, int);
int crypto_verify_16_tinynacl(const unsigned char *x, const unsigned char *y) {
  return verify(x, y, 16);
}


x86 assembly (clang, -O0):
<crypto_verify_16_tinynacl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x10,%edx
call   1030 <verify@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crypto_verify_16_tinynacl>:
mov    $0x10,%edx
jmp    1030 <verify@plt>

LLVM IR (-O0):
define i32 @crypto_verify_16_tinynacl(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @verify(i8* %5, i8* %6, i32 16)
ret i32 %7
}

LLVM IR (-O2):
define i32 @crypto_verify_16_tinynacl(i8* %0, i8* %1) {
%3 = tail call i32 @verify(i8* %0, i8* %1, i32 16)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ regex_t;

/* Variables and functions */
int /*<<< orphan*/ die(char *);
scalar_t__ regcomp(int /*<<< orphan*/ *, char const *, int /*<<< orphan*/);
scalar_t__ regexec(int /*<<< orphan*/ *, char *, int /*<<< orphan*/,
                   int /*<<< orphan*/ *, int /*<<< orphan*/);
int check_ending(char *file, const char *ending) {
  regex_t regex;
  if (regcomp(&regex, ending, 0))
    die("Could not compile regex.");
  return regexec(&regex, file, 0, NULL, 0) == 0;
}


x86 assembly (clang, -O0):
<check_ending>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    -0x14(%rbp),%rdi
xor    %edx,%edx
call   1030 <regcomp@plt>
cmp    $0x0,%rax
je     1165 <check_ending+0x35>
lea    0xea0(%rip),%rdi
call   1050 <die@plt>
mov    -0x8(%rbp),%rsi
lea    -0x14(%rbp),%rdi
xor    %r8d,%r8d
xor    %eax,%eax
mov    %eax,%ecx
mov    %r8d,%edx
call   1040 <regexec@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_ending>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0xc(%rsp),%rdi
xor    %edx,%edx
call   1030 <regcomp@plt>
test   %rax,%rax
je     1155 <check_ending+0x25>
lea    0xeb0(%rip),%rdi
call   1050 <die@plt>
lea    0xc(%rsp),%rdi
mov    %rbx,%rsi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
call   1040 <regexec@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"Could not compile regex.\00"
define i32 @check_ending(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = call i64 @regcomp(i32* %5, i8* %6, i32 0)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 @die(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %2
%12 = load i8*, i8** %3
%13 = call i64 @regexec(i32* %5, i8* %12, i32 0, i32* null, i32 0)
%14 = icmp eq i64 %13, 0
%15 = zext i1 %14 to i32
ret i32 %15
}

LLVM IR (-O2):
@.str = [25 x i8] c"Could not compile regex.\00"
define i32 @check_ending(i8* %0, i8* %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i64 @regcomp(i32* %3, i8* %1, i32 0)
%6 = icmp eq i64 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = call i32 @die(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %2
%10 = call i64 @regexec(i32* %3, i8* %0, i32 0, i32* null, i32 0)
%11 = icmp eq i64 %10, 0
%12 = zext i1 %11 to i32
ret i32 %12
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int solve_quaddobl_Laurent_system(int *root_count, int silent, int nbtasks) {
  int fail;
  int b[2];
  double *c;
  b[0] = silent;
  b[1] = nbtasks;
  fail = _ada_use_c2phc(703, root_count, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<solve_quaddobl_Laurent_system>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
lea    -0x1c(%rbp),%rdx
mov    -0x28(%rbp),%rcx
mov    $0x2bf,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solve_quaddobl_Laurent_system>:
push   %rax
mov    %rdi,%rax
mov    %esi,(%rsp)
mov    %edx,0x4(%rsp)
mov    %rsp,%rdx
mov    $0x2bf,%edi
mov    %rax,%rsi
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @solve_quaddobl_Laurent_system(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca [2 x i32]
%9 = alloca double*
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%10 = load i32, i32* %5
%11 = getelementptr inbounds [2 x i32], [2 x i32]* %8, i64 0, i64 0
store i32 %10, i32* %11
%12 = load i32, i32* %6
%13 = getelementptr inbounds [2 x i32], [2 x i32]* %8, i64 0, i64 1
store i32 %12, i32* %13
%14 = load i32*, i32** %4
%15 = getelementptr inbounds [2 x i32], [2 x i32]* %8, i64 0, i64 0
%16 = load double*, double** %9
%17 = call i32 @_ada_use_c2phc(i32 703, i32* %14, i32* %15, double* %16)
store i32 %17, i32* %7
%18 = load i32, i32* %7
ret i32 %18
}

LLVM IR (-O2):
define i32 @solve_quaddobl_Laurent_system(i32* %0, i32 %1, i32 %2) {
%4 = alloca [2 x i32]
%5 = bitcast [2 x i32]* %4 to i8*
%6 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 0
store i32 %1, i32* %6
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 1
store i32 %2, i32* %7
%8 = call i32 @_ada_use_c2phc(i32 703, i32* %0, i32* %6, double* undef)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ Calc_StartWork();
int main() {
  Calc_StartWork();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <Calc_StartWork@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <Calc_StartWork@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @Calc_StartWork()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @Calc_StartWork()
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
struct message {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ msg_append(struct message *, int /*<<< orphan*/ *, int);
int /*<<< orphan*/ msg_reset(struct message *);
int strlen(char const *);
void write_node(struct message *msg, const char *node) {
  msg_reset(msg);
  msg_append(msg, (uint8_t *)"node", 4);
  msg_append(msg, (uint8_t *)node, strlen(node));
}


x86 assembly (clang, -O0):
<write_node>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <msg_reset@plt>
mov    -0x8(%rbp),%rdi
lea    0xeac(%rip),%rsi
mov    $0x4,%edx
call   1030 <msg_append@plt>
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <msg_append@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_node>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1050 <msg_reset@plt>
lea    0xeba(%rip),%rsi
mov    %rbx,%rdi
mov    $0x4,%edx
call   1030 <msg_append@plt>
mov    %r14,%rdi
call   1040 <strlen@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <msg_append@plt>

LLVM IR (-O0):
%struct.message = type { i32 }
@.str = [5 x i8] c"node\00"
define void @write_node(%struct.message* %0, i8* %1) {
%3 = alloca %struct.message*
%4 = alloca i8*
store %struct.message* %0, %struct.message** %3
store i8* %1, i8** %4
%5 = load %struct.message*, %struct.message** %3
%6 = call i32 @msg_reset(%struct.message* %5)
%7 = load %struct.message*, %struct.message** %3
%8 = call i32 @msg_append(%struct.message* %7, i32* bitcast ([5 x i8]* @.str to i32*), i32 4)
%9 = load %struct.message*, %struct.message** %3
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i32*
%12 = load i8*, i8** %4
%13 = call i32 @strlen(i8* %12)
%14 = call i32 @msg_append(%struct.message* %9, i32* %11, i32 %13)
ret void
}

LLVM IR (-O2):
%struct.message = type { i32 }
@.str = [5 x i8] c"node\00"
define void @write_node(%struct.message* %0, i8* %1) {
%3 = tail call i32 @msg_reset(%struct.message* %0)
%4 = tail call i32 @msg_append(%struct.message* %0, i32* bitcast ([5 x i8]* @.str to i32*), i32 4)
%5 = bitcast i8* %1 to i32*
%6 = tail call i32 @strlen(i8* %1)
%7 = tail call i32 @msg_append(%struct.message* %0, i32* %5, i32 %6)
ret void
}
void itoa_my(char *string, int digit) {
  int i = 0;
  while ((digit /= 10) > 0) {
    *string++ = digit % 10 + '0';
  };
}


x86 assembly (clang, -O0):
<itoa_my>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
cmp    $0x0,%eax
jle    114f <itoa_my+0x4f>
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
add    $0x30,%edx
mov    %dl,%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
jmp    1112 <itoa_my+0x12>
pop    %rbp
ret

x86 assembly (clang, -O2):
<itoa_my>:
cmp    $0xa,%esi
jl     1154 <itoa_my+0x54>
cs nopw 0x0(%rax,%rax,1)
nop
movslq %esi,%r8
imul   $0x66666667,%r8,%rsi
mov    %rsi,%rcx
shr    $0x3f,%rcx
sar    $0x22,%rsi
add    %ecx,%esi
movslq %esi,%rcx
imul   $0x66666667,%rcx,%rdx
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x22,%rdx
add    %eax,%edx
add    %edx,%edx
lea    (%rdx,%rdx,4),%eax
sub    %eax,%ecx
add    $0x30,%cl
mov    %cl,(%rdi)
add    $0x1,%rdi
cmp    $0x63,%r8d
jg     1110 <itoa_my+0x10>
ret

LLVM IR (-O0):
define void @itoa_my(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %10, %2
%7 = load i32, i32* %4
%8 = sdiv i32 %7, 10
store i32 %8, i32* %4
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %6
%11 = load i32, i32* %4
%12 = srem i32 %11, 10
%13 = add nsw i32 %12, 48
%14 = trunc i32 %13 to i8
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
store i8 %14, i8* %15
br label %6
17: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @itoa_my(i8* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 9
br i1 %3, label %4, label %13
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = phi i8* [ %11, %4 ], [ %0, %2 ]
%7 = sdiv i32 %5, 10
%8 = srem i32 %7, 10
%9 = trunc i32 %8 to i8
%10 = add nsw i8 %9, 48
%11 = getelementptr inbounds i8, i8* %6, i64 1
store i8 %10, i8* %6
%12 = icmp sgt i32 %5, 99
br i1 %12, label %4, label %13
13: ; preds = %4, %2
ret void
}
void g_get_current_time() {}


x86 assembly (clang, -O0):
<g_get_current_time>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_get_current_time>:
ret

LLVM IR (-O0):
define void @g_get_current_time() {
ret void
}

LLVM IR (-O2):
define void @g_get_current_time() {
ret void
}
void write16(unsigned int reg1, signed short val) {
  signed short *reg;
  reg = (signed short *)reg1;
  *(reg) = (short)val;
}


x86 assembly (clang, -O0):
<write16>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %edi,-0x4(%rbp)
mov    %ax,-0x6(%rbp)
mov    -0x4(%rbp),%eax
mov    %rax,-0x10(%rbp)
mov    -0x6(%rbp),%cx
mov    -0x10(%rbp),%rax
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<write16>:
mov    %edi,%eax
mov    %si,(%rax)
ret

LLVM IR (-O0):
define void @write16(i32 %0, i16 signext %1) {
%3 = alloca i32
%4 = alloca i16
%5 = alloca i16*
store i32 %0, i32* %3
store i16 %1, i16* %4
%6 = load i32, i32* %3
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i16*
store i16* %8, i16** %5
%9 = load i16, i16* %4
%10 = load i16*, i16** %5
store i16 %9, i16* %10
ret void
}

LLVM IR (-O2):
define void @write16(i32 %0, i16 signext %1) {
%3 = zext i32 %0 to i64
%4 = inttoptr i64 %3 to i16*
store i16 %1, i16* %4
ret void
}
/* Variables and functions */
char *escape_filename(char const *, int);
char *escaped_arg_hook(const char match[]) { return escape_filename(match, 1); }


x86 assembly (clang, -O0):
<escaped_arg_hook>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <escape_filename@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<escaped_arg_hook>:
mov    $0x1,%esi
jmp    1030 <escape_filename@plt>

LLVM IR (-O0):
define i8* @escaped_arg_hook(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @escape_filename(i8* %3, i32 1)
ret i8* %4
}

LLVM IR (-O2):
define i8* @escaped_arg_hook(i8* %0) {
%2 = tail call i8* @escape_filename(i8* %0, i32 1)
ret i8* %2
}
/* Variables and functions */
bool SD_IsAdlibPresent() { return true; }


x86 assembly (clang, -O0):
<SD_IsAdlibPresent>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SD_IsAdlibPresent>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @SD_IsAdlibPresent() {
ret i32 1
}

LLVM IR (-O2):
define i32 @SD_IsAdlibPresent() {
ret i32 1
}
int do_722() { return 722; }


x86 assembly (clang, -O0):
<do_722>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2d2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_722>:
mov    $0x2d2,%eax
ret

LLVM IR (-O0):
define i32 @do_722() {
ret i32 722
}

LLVM IR (-O2):
define i32 @do_722() {
ret i32 722
}
void tlib_invalidate_tb_in_other_cpus(unsigned long start, unsigned long end) {}


x86 assembly (clang, -O0):
<tlib_invalidate_tb_in_other_cpus>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tlib_invalidate_tb_in_other_cpus>:
ret

LLVM IR (-O0):
define void @tlib_invalidate_tb_in_other_cpus(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
ret void
}

LLVM IR (-O2):
define void @tlib_invalidate_tb_in_other_cpus(i64 %0, i64 %1) {
ret void
}
/* Type definitions */
struct sigaction {
  void (*sa_handler)(int);
  int /*<<< orphan*/ sa_flags;
};
typedef int /*<<< orphan*/ sa;

/* Variables and functions */
int /*<<< orphan*/ SA_RESTART;
int /*<<< orphan*/ memset(struct sigaction *, int /*<<< orphan*/, int);
int /*<<< orphan*/ sigaction(int, struct sigaction *, int /*<<< orphan*/ *);
void set_signal(int signo, void (*handler)(void)) {
  struct sigaction sa;
  memset(&sa, 0, sizeof(sa));
  sa.sa_handler = (void (*)(int))handler;
  sa.sa_flags = SA_RESTART;
  sigaction(signo, &sa, NULL);
}


x86 assembly (clang, -O0):
<set_signal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x20(%rbp),%rdi
xor    %esi,%esi
mov    $0x10,%edx
call   1040 <memset@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    0x2e9a(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x20(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <sigaction@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_signal>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsp,%r14
mov    %r14,%rdi
xor    %esi,%esi
mov    $0x10,%edx
call   1040 <memset@plt>
mov    %rbx,(%rsp)
mov    0x2e9e(%rip),%rax
mov    (%rax),%eax
mov    %eax,0x8(%rsp)
mov    %ebp,%edi
mov    %r14,%rsi
xor    %edx,%edx
call   1030 <sigaction@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
%struct.sigaction = type { void (i32)*, i32 }
@SA_RESTART = global i32 0
define void @set_signal(i32 %0, void ()* %1) {
%3 = alloca i32
%4 = alloca void ()*
%5 = alloca %struct.sigaction
store i32 %0, i32* %3
store void ()* %1, void ()** %4
%6 = call i32 @memset(%struct.sigaction* %5, i32 0, i32 16)
%7 = load void ()*, void ()** %4
%8 = bitcast void ()* %7 to void (i32)*
%9 = getelementptr inbounds %struct.sigaction, %struct.sigaction* %5, i32 0, i32 0
store void (i32)* %8, void (i32)** %9
%10 = load i32, i32* @SA_RESTART
%11 = getelementptr inbounds %struct.sigaction, %struct.sigaction* %5, i32 0, i32 1
store i32 %10, i32* %11
%12 = load i32, i32* %3
%13 = call i32 @sigaction(i32 %12, %struct.sigaction* %5, i32* null)
ret void
}

LLVM IR (-O2):
%struct.sigaction = type { void (i32)*, i32 }
@SA_RESTART = global i32 0
define void @set_signal(i32 %0, void ()* %1) {
%3 = alloca %struct.sigaction
%4 = bitcast %struct.sigaction* %3 to i8*
%5 = call i32 @memset(%struct.sigaction* %3, i32 0, i32 16)
%6 = bitcast %struct.sigaction* %3 to void ()**
store void ()* %1, void ()** %6
%7 = load i32, i32* @SA_RESTART
%8 = getelementptr inbounds %struct.sigaction, %struct.sigaction* %3, i64 0, i32 1
store i32 %7, i32* %8
%9 = call i32 @sigaction(i32 %0, %struct.sigaction* %3, i32* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ scanf(char *, char **);
int main() {
  char *str;
  scanf("%ms", &str);
  printf("\n%s\n", str);
  free(str);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x10(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x10(%rbp),%rsi
lea    0xeaa(%rip),%rdi
call   1040 <printf@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
mov    %rsp,%rsi
call   1050 <scanf@plt>
mov    (%rsp),%rsi
lea    0xeb9(%rip),%rdi
call   1040 <printf@plt>
mov    (%rsp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%ms\00"
@.str.1 = [5 x i8] c"\0A%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %2)
%4 = load i8*, i8** %2
%5 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* %4)
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%ms\00"
@.str.1 = [5 x i8] c"\0A%s\0A\00"
define i32 @main() {
%1 = alloca i8*
%2 = bitcast i8** %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %1)
%4 = load i8*, i8** %1
%5 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* %4)
%6 = load i8*, i8** %1
%7 = call i32 @free(i8* %6)
ret i32 0
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int rand();
int32_t get_rng() { return rand() % 256; }


x86 assembly (clang, -O0):
<get_rng>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x100,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_rng>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
lea    0xff(%rax),%ecx
test   %eax,%eax
cmovns %eax,%ecx
and    $0xffffff00,%ecx
sub    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @get_rng() {
%1 = call i32 (...) @rand()
%2 = srem i32 %1, 256
ret i32 %2
}

LLVM IR (-O2):
define i32 @get_rng() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 256
ret i32 %2
}
/* Type definitions */
typedef char uint32_t;
typedef int int32_t;

/* Variables and functions */
int32_t isdigit(uint32_t c) {
  if ((c >= '0') && (c <= '9'))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1130 <isdigit+0x30>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jg     1130 <isdigit+0x30>
movl   $0x1,-0x4(%rbp)
jmp    1137 <isdigit+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isdigit>:
add    $0xd0,%dil
xor    %eax,%eax
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @isdigit(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %13
12: ; preds = %7, %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @isdigit(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ free(float **);
int /*<<< orphan*/ freeFloatVector(float *);
void freeFloatMatrix(float **matrix, int rows) {
  int i;
  for (i = 0; i < rows; i++)
    freeFloatVector(matrix[i]);
  free(matrix);
}


x86 assembly (clang, -O0):
<freeFloatMatrix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1161 <freeFloatMatrix+0x41>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1040 <freeFloatVector@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1136 <freeFloatMatrix+0x16>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeFloatMatrix>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
test   %esi,%esi
jle    1152 <freeFloatMatrix+0x32>
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1040 <freeFloatVector@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1140 <freeFloatMatrix+0x20>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @freeFloatMatrix(float** %0, i32 %1) {
%3 = alloca float**
%4 = alloca i32
%5 = alloca i32
store float** %0, float*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load float**, float*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds float*, float** %11, i64 %13
%15 = load float*, float** %14
%16 = call i32 @freeFloatVector(float* %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = load float**, float*** %3
%22 = call i32 @free(float** %21)
ret void
}

LLVM IR (-O2):
define void @freeFloatMatrix(float** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds float*, float** %0, i64 %7
%9 = load float*, float** %8
%10 = tail call i32 @freeFloatVector(float* %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = tail call i32 @free(float** %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, char *);
int /*<<< orphan*/ stderr;
bool f_r_id_check(char fid[], size_t fid_len, char rid[], size_t rid_len) {
  if (fid_len != rid_len) {
    goto bad_read;
  } else {
    return true;
  }
bad_read:
  fprintf(stderr, "ERROR: Fastq id lines do not match: %s vs %s \n", fid, rid);
  return false;
}


x86 assembly (clang, -O0):
<f_r_id_check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x28(%rbp),%rax
je     113b <f_r_id_check+0x2b>
jmp    1147 <f_r_id_check+0x37>
movl   $0x1,-0x4(%rbp)
jmp    116b <f_r_id_check+0x5b>
mov    0x2e92(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
lea    0xea1(%rip),%rsi
call   1030 <fprintf@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_r_id_check>:
mov    $0x1,%eax
cmp    %rcx,%rsi
je     113f <f_r_id_check+0x2f>
push   %rax
mov    %rdx,%r8
mov    %rdi,%rdx
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
mov    %r8,%rcx
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [47 x i8] c"ERROR: Fastq id lines do not match: %s vs %s \0A\00"
define i32 @f_r_id_check(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
%9 = alloca i64
store i8* %0, i8** %6
store i64 %1, i64* %7
store i8* %2, i8** %8
store i64 %3, i64* %9
%10 = load i64, i64* %7
%11 = load i64, i64* %9
%12 = icmp ne i64 %10, %11
br i1 %12, label %13, label %14
13: ; preds = %4
br label %15
14: ; preds = %4
store i32 1, i32* %5
br label %20
15: ; preds = %13
%16 = load i32, i32* @stderr
%17 = load i8*, i8** %6
%18 = load i8*, i8** %8
%19 = call i32 @fprintf(i32 %16, i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i8* %17, i8* %18)
store i32 0, i32* %5
br label %20
20: ; preds = %15, %14
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [47 x i8] c"ERROR: Fastq id lines do not match: %s vs %s \0A\00"
define i32 @f_r_id_check(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = icmp eq i64 %1, %3
br i1 %5, label %9, label %6
6: ; preds = %4
%7 = load i32, i32* @stderr
%8 = tail call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %2)
br label %9
9: ; preds = %4, %6
%10 = phi i32 [ 0, %6 ], [ 1, %4 ]
ret i32 %10
}
int is_prime(int numb) {
  int counter = 2;
  for (; counter <= numb / 2; counter++) {
    if (numb % counter == 0) {
      return 0;
    }
  }
  return 1;
}


x86 assembly (clang, -O0):
<is_prime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
cmp    %ecx,%eax
jg     115b <is_prime+0x5b>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1148 <is_prime+0x48>
movl   $0x0,-0x4(%rbp)
jmp    1162 <is_prime+0x62>
jmp    114d <is_prime+0x4d>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <is_prime+0xe>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_prime>:
mov    $0x1,%r8d
cmp    $0x4,%edi
jl     1137 <is_prime+0x37>
mov    %edi,%esi
shr    %esi
neg    %esi
mov    $0x2,%ecx
cs nopw 0x0(%rax,%rax,1)
mov    %edi,%eax
cltd
idiv   %ecx
test   %edx,%edx
je     113b <is_prime+0x3b>
lea    (%rsi,%rcx,1),%eax
add    $0x1,%eax
add    $0x1,%ecx
cmp    $0x1,%eax
jne    1120 <is_prime+0x20>
mov    %r8d,%eax
ret
xor    %r8d,%r8d
mov    %r8d,%eax
ret

LLVM IR (-O0):
define i32 @is_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 2, i32* %4
br label %5
5: ; preds = %17, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sdiv i32 %7, 2
%9 = icmp sle i32 %6, %8
br i1 %9, label %10, label %20
10: ; preds = %5
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = srem i32 %11, %12
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %10
store i32 0, i32* %2
br label %21
16: ; preds = %10
br label %17
17: ; preds = %16
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %5
20: ; preds = %5
store i32 1, i32* %2
br label %21
21: ; preds = %20, %15
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @is_prime(i32 %0) {
%2 = icmp slt i32 %0, 4
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = lshr i32 %0, 1
br label %8
5: ; preds = %8
%6 = add nuw nsw i32 %9, 1
%7 = icmp eq i32 %9, %4
br i1 %7, label %12, label %8
8: ; preds = %3, %5
%9 = phi i32 [ %6, %5 ], [ 2, %3 ]
%10 = srem i32 %0, %9
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %5
12: ; preds = %8, %5, %1
%13 = phi i32 [ 1, %1 ], [ 1, %5 ], [ 0, %8 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int a = 10;
  do {
    if (a == 15) {
      a = a + 1;
      continue;
    }
    printf("a: %d\n", a);
    a++;
  } while (a < 20);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
cmpl   $0xf,-0x8(%rbp)
jne    113e <main+0x2e>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1156 <main+0x46>
mov    -0x8(%rbp),%esi
lea    0xeb8(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x14,-0x8(%rbp)
jl     1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    $0xa,%ebp
lea    0xee1(%rip),%rbx
jmp    1137 <main+0x27>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %eax,%ebp
cmp    $0x14,%eax
jge    1152 <main+0x42>
mov    $0x10,%eax
cmp    $0xf,%ebp
je     1130 <main+0x20>
mov    %rbx,%rdi
mov    %ebp,%esi
call   1030 <printf@plt>
add    $0x1,%ebp
mov    %ebp,%eax
jmp    1130 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [7 x i8] c"a: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 10, i32* %2
br label %3
3: ; preds = %14, %0
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 15
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
store i32 %8, i32* %2
br label %14
9: ; preds = %3
%10 = load i32, i32* %2
%11 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %10)
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 1
store i32 %13, i32* %2
br label %14
14: ; preds = %9, %6
%15 = load i32, i32* %2
%16 = icmp slt i32 %15, 20
br i1 %16, label %3, label %17
17: ; preds = %14
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"a: %d\0A\00"
define i32 @main() {
br label %1
1: ; preds = %7, %0
%2 = phi i32 [ 10, %0 ], [ %8, %7 ]
%3 = icmp eq i32 %2, 15
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %2)
%6 = add nsw i32 %2, 1
br label %7
7: ; preds = %1, %4
%8 = phi i32 [ %6, %4 ], [ 16, %1 ]
%9 = icmp slt i32 %8, 20
br i1 %9, label %1, label %10
10: ; preds = %7
ret i32 0
}
int detect_cpu(void) {
  unsigned long ebx, unused;
  __asm__("cpuid"
          : "=a"(unused), "=b"(ebx), "=c"(unused), "=d"(unused)
          : "a"(0));
  ;
  switch (ebx) {
  case 0x756e6547:
    do_intel();
    break;
  case 0x68747541:
    do_amd();
    break;
  default:
    printf("Unknown x86 CPU Detected\n");
    break;
  }
  return 0;
}


x86 assembly (clang, -O0):
<detect_cpu>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
sub    $0x18,%rsp
xor    %eax,%eax
cpuid
mov    %rax,-0x18(%rbp)
mov    %rbx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
sub    $0x68747541,%rax
je     1187 <detect_cpu+0x57>
jmp    1166 <detect_cpu+0x36>
mov    -0x20(%rbp),%rax
sub    $0x756e6547,%rax
jne    1193 <detect_cpu+0x63>
jmp    117b <detect_cpu+0x4b>
mov    $0x0,%al
call   1050 <do_intel@plt>
jmp    11a1 <detect_cpu+0x71>
mov    $0x0,%al
call   1030 <do_amd@plt>
jmp    11a1 <detect_cpu+0x71>
lea    0xe66(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<detect_cpu>:
push   %rbx
xor    %eax,%eax
cpuid
cmp    $0x68747541,%rbx
je     1150 <detect_cpu+0x20>
cmp    $0x756e6547,%rbx
jne    1159 <detect_cpu+0x29>
xor    %eax,%eax
call   1050 <do_intel@plt>
jmp    1165 <detect_cpu+0x35>
xor    %eax,%eax
call   1040 <do_amd@plt>
jmp    1165 <detect_cpu+0x35>
lea    0xea0(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"Unknown x86 CPU Detected\0A\00"
define i32 @detect_cpu() {
%1 = alloca i64
%2 = alloca i64
%3 = call { i64, i64, i64, i64 } asm "cpuid", "={ax},={bx},={cx},={dx},{ax},~{dirflag},~{fpsr},~{flags}"(i32 0)
%4 = extractvalue { i64, i64, i64, i64 } %3, 0
%5 = extractvalue { i64, i64, i64, i64 } %3, 1
%6 = extractvalue { i64, i64, i64, i64 } %3, 2
%7 = extractvalue { i64, i64, i64, i64 } %3, 3
store i64 %4, i64* %2
store i64 %5, i64* %1
store i64 %6, i64* %2
store i64 %7, i64* %2
%8 = load i64, i64* %1
switch i64 %8, label %13 [
i64 1970169159, label %9
i64 1752462657, label %11
]
9: ; preds = %0
%10 = call i32 (...) @do_intel()
br label %15
11: ; preds = %0
%12 = call i32 (...) @do_amd()
br label %15
13: ; preds = %0
%14 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
br label %15
15: ; preds = %13, %11, %9
ret i32 0
}

LLVM IR (-O2):
@str = [25 x i8] c"Unknown x86 CPU Detected\00"
define i32 @detect_cpu() {
%1 = tail call { i64, i64, i64, i64 } asm "cpuid", "={ax},={bx},={cx},={dx},{ax},~{dirflag},~{fpsr},~{flags}"(i32 0)
%2 = extractvalue { i64, i64, i64, i64 } %1, 1
switch i64 %2, label %7 [
i64 1970169159, label %3
i64 1752462657, label %5
]
3: ; preds = %0
%4 = tail call i32 (...) @do_intel()
br label %9
5: ; preds = %0
%6 = tail call i32 (...) @do_amd()
br label %9
7: ; preds = %0
%8 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str, i64 0, i64 0))
br label %9
9: ; preds = %7, %5, %3
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
uint8_t ses_config_enclosure_descriptor_len(uint8_t *data) { return data[3]; }


x86 assembly (clang, -O0):
<ses_config_enclosure_descriptor_len>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ses_config_enclosure_descriptor_len>:
mov    0xc(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @ses_config_enclosure_descriptor_len(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 3
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @ses_config_enclosure_descriptor_len(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 3
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ glutPostRedisplay();
void null_menu(int value) { glutPostRedisplay(); }


x86 assembly (clang, -O0):
<null_menu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <glutPostRedisplay@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_menu>:
xor    %eax,%eax
jmp    1030 <glutPostRedisplay@plt>

LLVM IR (-O0):
define void @null_menu(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @glutPostRedisplay()
ret void
}

LLVM IR (-O2):
define void @null_menu(i32 %0) {
%2 = tail call i32 (...) @glutPostRedisplay()
ret void
}