xunge/DecIR huggingface dataset:
/* Type definitions */
struct mb_interpreter_t {
  int dummy;
};

/* Variables and functions */
int _remove_func(struct mb_interpreter_t *, char *, int /*<<< orphan*/);
int mb_remove_func(struct mb_interpreter_t *s, const char *n) {
  if (!s || !n)
    return 3;
  return _remove_func(s, (char *)n, (0));
}


x86 assembly (clang, -O0):
<mb_remove_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1136 <mb_remove_func+0x26>
cmpq   $0x0,-0x18(%rbp)
jne    1142 <mb_remove_func+0x32>
movl   $0x3,-0x4(%rbp)
jmp    1154 <mb_remove_func+0x44>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
xor    %edx,%edx
call   1030 <_remove_func@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mb_remove_func>:
test   %rdi,%rdi
je     1121 <mb_remove_func+0x11>
test   %rsi,%rsi
je     1121 <mb_remove_func+0x11>
xor    %edx,%edx
jmp    1030 <_remove_func@plt>
mov    $0x3,%eax
ret

LLVM IR (-O0):
%struct.mb_interpreter_t = type { i32 }
define i32 @mb_remove_func(%struct.mb_interpreter_t* %0, i8* %1) {
%3 = alloca i32
%4 = alloca %struct.mb_interpreter_t*
%5 = alloca i8*
store %struct.mb_interpreter_t* %0, %struct.mb_interpreter_t** %4
store i8* %1, i8** %5
%6 = load %struct.mb_interpreter_t*, %struct.mb_interpreter_t** %4
%7 = icmp ne %struct.mb_interpreter_t* %6, null
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %12, label %11
11: ; preds = %8, %2
store i32 3, i32* %3
br label %16
12: ; preds = %8
%13 = load %struct.mb_interpreter_t*, %struct.mb_interpreter_t** %4
%14 = load i8*, i8** %5
%15 = call i32 @_remove_func(%struct.mb_interpreter_t* %13, i8* %14, i32 0)
store i32 %15, i32* %3
br label %16
16: ; preds = %12, %11
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
%struct.mb_interpreter_t = type { i32 }
define i32 @mb_remove_func(%struct.mb_interpreter_t* %0, i8* %1) {
%3 = icmp ne %struct.mb_interpreter_t* %0, null
%4 = icmp ne i8* %1, null
%5 = and i1 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @_remove_func(%struct.mb_interpreter_t* %0, i8* %1, i32 0)
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ %7, %6 ], [ 3, %2 ]
ret i32 %9
}
unsigned int spi_transfer24(volatile unsigned int *base, unsigned int val) {
  *(base + (8 + 1)) = val;
  return *(base + (8 + 1));
}


x86 assembly (clang, -O0):
<spi_transfer24>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x24(%rax)
mov    -0x8(%rbp),%rax
mov    0x24(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_transfer24>:
mov    %esi,0x24(%rdi)
mov    0x24(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @spi_transfer24(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 9
store volatile i32 %5, i32* %7
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 9
%10 = load volatile i32, i32* %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @spi_transfer24(i32* %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 9
store volatile i32 %1, i32* %3
%4 = load volatile i32, i32* %3
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint8_t;

/* Variables and functions */
uint8_t hci_subevent_le_connection_complete_get_peer_address_type(
    const uint8_t *event) {
  return event[7];
}


x86 assembly (clang, -O0):
<hci_subevent_le_connection_complete_get_peer_address_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x1c(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hci_subevent_le_connection_complete_get_peer_address_type>:
mov    0x1c(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @hci_subevent_le_connection_complete_get_peer_address_type(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 7
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @hci_subevent_le_connection_complete_get_peer_address_type(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 7
%3 = load i32, i32* %2
ret i32 %3
}
int index__01000000(int *base) { return base[-01000000]; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x100000(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    -0x100000(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @index__01000000(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 -262144
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @index__01000000(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 -262144
%3 = load i32, i32* %2
ret i32 %3
}
void foo321(int p) {}


x86 assembly (clang, -O0):
<foo321>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo321>:
ret

LLVM IR (-O0):
define void @foo321(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo321(i32 %0) {
ret void
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int member_0;
  int member_1;
  int member_2;
  int member_3;
  int member_4;
  int member_5;
  int member_6;
  int member_7;
};
typedef TYPE_1__ __v8si;

/* Variables and functions */
__v8si foo_7(int c) {
  __v8si v1 = {c, c, c, c, c, c, c, c};
  return v1;
}


x86 assembly (clang, -O0):
<foo_7>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,%rax
mov    %esi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    %ecx,(%rdi)
mov    -0x4(%rbp),%ecx
mov    %ecx,0x4(%rdi)
mov    -0x4(%rbp),%ecx
mov    %ecx,0x8(%rdi)
mov    -0x4(%rbp),%ecx
mov    %ecx,0xc(%rdi)
mov    -0x4(%rbp),%ecx
mov    %ecx,0x10(%rdi)
mov    -0x4(%rbp),%ecx
mov    %ecx,0x14(%rdi)
mov    -0x4(%rbp),%ecx
mov    %ecx,0x18(%rdi)
mov    -0x4(%rbp),%ecx
mov    %ecx,0x1c(%rdi)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_7>:
mov    %rdi,%rax
movd   %esi,%xmm0
pshufd $0x0,%xmm0,%xmm0
movdqu %xmm0,(%rdi)
movdqu %xmm0,0x10(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_3__ = type { i32, i32, i32, i32, i32, i32, i32, i32 }
define void @foo_7(%struct.TYPE_3__* noalias sret(%struct.TYPE_3__) align 4 %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i32 0, i32 0
%5 = load i32, i32* %3
store i32 %5, i32* %4
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i32 0, i32 1
%7 = load i32, i32* %3
store i32 %7, i32* %6
%8 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i32 0, i32 2
%9 = load i32, i32* %3
store i32 %9, i32* %8
%10 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i32 0, i32 3
%11 = load i32, i32* %3
store i32 %11, i32* %10
%12 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i32 0, i32 4
%13 = load i32, i32* %3
store i32 %13, i32* %12
%14 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i32 0, i32 5
%15 = load i32, i32* %3
store i32 %15, i32* %14
%16 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i32 0, i32 6
%17 = load i32, i32* %3
store i32 %17, i32* %16
%18 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i32 0, i32 7
%19 = load i32, i32* %3
store i32 %19, i32* %18
ret void
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i32, i32, i32, i32, i32, i32, i32, i32 }
define void @foo_7(%struct.TYPE_3__* noalias nocapture writeonly sret(%struct.TYPE_3__) align 4 %0, i32 %1) {
%3 = insertelement <4 x i32> poison, i32 %1, i64 0
%4 = shufflevector <4 x i32> %3, <4 x i32> poison, <4 x i32> zeroinitializer
%5 = bitcast %struct.TYPE_3__* %0 to <4 x i32>*
store <4 x i32> %4, <4 x i32>* %5
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i64 0, i32 4
%7 = bitcast i32* %6 to <4 x i32>*
store <4 x i32> %4, <4 x i32>* %7
ret void
}
int energymon_is_exclusive_wattsup(void) { return 1; }


x86 assembly (clang, -O0):
<energymon_is_exclusive_wattsup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<energymon_is_exclusive_wattsup>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @energymon_is_exclusive_wattsup() {
ret i32 1
}

LLVM IR (-O2):
define i32 @energymon_is_exclusive_wattsup() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_wfd_cfg_invitation_list_usage(void) {
  printf("\nUsage : wfd_cfg_invitation_list [mac_addr]");
  printf("\nIf mac_addr parameter is provided, 'set' is performed otherwise "
         "'get' is performed.\n");
  return;
}


x86 assembly (clang, -O0):
<print_wfd_cfg_invitation_list_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf05(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_wfd_cfg_invitation_list_usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <printf@plt>
lea    0xef8(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [44 x i8] c"\0AUsage : wfd_cfg_invitation_list [mac_addr]\00"
@.str.1 = [86 x i8] c"\0AIf mac_addr parameter is provided, 'set' is performed otherwise 'get' is performed.\0A\00"
define void @print_wfd_cfg_invitation_list_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([86 x i8], [86 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [44 x i8] c"\0AUsage : wfd_cfg_invitation_list [mac_addr]\00"
@str = [85 x i8] c"\0AIf mac_addr parameter is provided, 'set' is performed otherwise 'get' is performed.\00"
define void @print_wfd_cfg_invitation_list_usage() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([85 x i8], [85 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ x;
typedef int /*<<< orphan*/ str;

/* Variables and functions */
int /*<<< orphan*/ func(void *, int);
int /*<<< orphan*/ printf(char *, ...);
int main(void) {
  int x;
  char str[16];
  func(&x, sizeof(x));
  printf("x = %d\n", x);
  func((void *)str, sizeof(str));
  printf("str = %s\n", str);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
mov    $0x4,%esi
call   1040 <func@plt>
mov    -0x8(%rbp),%esi
lea    0xeb9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    -0x20(%rbp),%rdi
mov    $0x10,%esi
call   1040 <func@plt>
lea    -0x20(%rbp),%rsi
lea    0xea1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x20,%rsp
lea    0xc(%rsp),%rdi
mov    $0x4,%esi
call   1040 <func@plt>
mov    0xc(%rsp),%esi
lea    0xec1(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0x10(%rsp),%rbx
mov    %rbx,%rdi
mov    $0x10,%esi
call   1040 <func@plt>
lea    0xea9(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"x = %d\0A\00"
@.str.1 = [10 x i8] c"str = %s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [16 x i8]
store i32 0, i32* %1
%4 = bitcast i32* %2 to i8*
%5 = call i32 @func(i8* %4, i32 4)
%6 = load i32, i32* %2
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = getelementptr inbounds [16 x i8], [16 x i8]* %3, i64 0, i64 0
%9 = call i32 @func(i8* %8, i32 16)
%10 = getelementptr inbounds [16 x i8], [16 x i8]* %3, i64 0, i64 0
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i8* %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"x = %d\0A\00"
@.str.1 = [10 x i8] c"str = %s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [16 x i8]
%3 = bitcast i32* %1 to i8*
%4 = getelementptr inbounds [16 x i8], [16 x i8]* %2, i64 0, i64 0
%5 = call i32 @func(i8* %3, i32 4)
%6 = load i32, i32* %1
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = call i32 @func(i8* %4, i32 16)
%9 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ lower(char *);
int /*<<< orphan*/ printf(char *, char *);
int main(void) {
  char characters[] = "AaBbbbB";
  printf("Upper case: %s\n", characters);
  lower(characters);
  printf("Lower case: %s\n", characters);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0xc(%rbp)
lea    -0xc(%rbp),%rsi
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
lea    -0xc(%rbp),%rdi
call   1040 <lower@plt>
lea    -0xc(%rbp),%rsi
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movabs $0x42626262426141,%rax
mov    %rax,0x8(%rsp)
lea    0xec5(%rip),%rdi
lea    0x8(%rsp),%rbx
mov    %rbx,%rsi
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1040 <lower@plt>
lea    0xeb9(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.characters = [8 x i8] c"AaBbbbB\00"
@.str = [16 x i8] c"Upper case: %s\0A\00"
@.str.1 = [16 x i8] c"Lower case: %s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [8 x i8]
store i32 0, i32* %1
%3 = bitcast [8 x i8]* %2 to i8*
%4 = getelementptr inbounds [8 x i8], [8 x i8]* %2, i64 0, i64 0
%5 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = getelementptr inbounds [8 x i8], [8 x i8]* %2, i64 0, i64 0
%7 = call i32 @lower(i8* %6)
%8 = getelementptr inbounds [8 x i8], [8 x i8]* %2, i64 0, i64 0
%9 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i8* %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"Upper case: %s\0A\00"
@.str.1 = [16 x i8] c"Lower case: %s\0A\00"
define i32 @main() {
%1 = alloca i64
%2 = bitcast i64* %1 to i8*
store i64 18685523157737793, i64* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = call i32 @lower(i8* %2)
%5 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i8* %2)
ret i32 0
}
int match_char(char const **str, char const *end, char c) {
  if (*str < end && **str == c) {
    ++*str;
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<match_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %al,-0x19(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
cmp    -0x18(%rbp),%rax
jae    1152 <match_char+0x52>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%eax
movsbl -0x19(%rbp),%ecx
cmp    %ecx,%eax
jne    1152 <match_char+0x52>
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
movl   $0x1,-0x4(%rbp)
jmp    1159 <match_char+0x59>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<match_char>:
mov    (%rdi),%rcx
xor    %eax,%eax
cmp    %rsi,%rcx
jae    111a <match_char+0x1a>
cmp    %dl,(%rcx)
jne    111a <match_char+0x1a>
add    $0x1,%rcx
mov    %rcx,(%rdi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @match_char(i8** %0, i8* %1, i8 signext %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
%7 = alloca i8
store i8** %0, i8*** %5
store i8* %1, i8** %6
store i8 %2, i8* %7
%8 = load i8**, i8*** %5
%9 = load i8*, i8** %8
%10 = load i8*, i8** %6
%11 = icmp ult i8* %9, %10
br i1 %11, label %12, label %24
12: ; preds = %3
%13 = load i8**, i8*** %5
%14 = load i8*, i8** %13
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = load i8, i8* %7
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %16, %18
br i1 %19, label %20, label %24
20: ; preds = %12
%21 = load i8**, i8*** %5
%22 = load i8*, i8** %21
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %21
store i32 1, i32* %4
br label %25
24: ; preds = %12, %3
store i32 0, i32* %4
br label %25
25: ; preds = %24, %20
%26 = load i32, i32* %4
ret i32 %26
}

LLVM IR (-O2):
define i32 @match_char(i8** nocapture %0, i8* readnone %1, i8 signext %2) {
%4 = load i8*, i8** %0
%5 = icmp ult i8* %4, %1
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = load i8, i8* %4
%8 = icmp eq i8 %7, %2
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = getelementptr inbounds i8, i8* %4, i64 1
store i8* %10, i8** %0
br label %11
11: ; preds = %3, %6, %9
%12 = phi i32 [ 1, %9 ], [ 0, %6 ], [ 0, %3 ]
ret i32 %12
}
int test_imm_1Fint64_highword_reg(long long val) {
  return ((val >> 32) & (0x1F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Fint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0x1f,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Fint64_highword_reg>:
movabs $0x1f00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Fint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 31
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_1Fint64_highword_reg(i64 %0) {
%2 = and i64 %0, 133143986176
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
float mul_float(float arg1, float arg2) { return arg1 * arg2; }


x86 assembly (clang, -O0):
<mul_float>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mul_float>:
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @mul_float(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fmul float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @mul_float(float %0, float %1) {
%3 = fmul float %0, %1
ret float %3
}
unsigned long insert_ram(insn, value, errmsg)
unsigned long insn;
long value;
const char **errmsg;
{
  if (value >= ((insn >> 21) & 0x1f))
    *errmsg = "index register in load range";
  return insn | ((value & 0x1f) << 16);
}


x86 assembly (clang, -O0):
<insert_ram>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
shr    $0x15,%rcx
and    $0x1f,%rcx
cmp    %rcx,%rax
jb     1137 <insert_ram+0x37>
mov    -0x18(%rbp),%rax
lea    0xecc(%rip),%rcx
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
and    $0x1f,%rcx
shl    $0x10,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<insert_ram>:
mov    %rsi,%rax
mov    %edi,%ecx
shr    $0x15,%ecx
and    $0x1f,%ecx
cmp    %rsi,%rcx
ja     111a <insert_ram+0x1a>
lea    0xee9(%rip),%rcx
mov    %rcx,(%rdx)
and    $0x1f,%eax
shl    $0x10,%rax
or     %rdi,%rax
ret

LLVM IR (-O0):
@.str = [29 x i8] c"index register in load range\00"
define i64 @insert_ram(i64 %0, i64 %1, i8** %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i8**
store i64 %0, i64* %4
store i64 %1, i64* %5
store i8** %2, i8*** %6
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = lshr i64 %8, 21
%10 = and i64 %9, 31
%11 = icmp uge i64 %7, %10
br i1 %11, label %12, label %14
12: ; preds = %3
%13 = load i8**, i8*** %6
store i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8** %13
br label %14
14: ; preds = %12, %3
%15 = load i64, i64* %4
%16 = load i64, i64* %5
%17 = and i64 %16, 31
%18 = shl i64 %17, 16
%19 = or i64 %15, %18
ret i64 %19
}

LLVM IR (-O2):
@.str = [29 x i8] c"index register in load range\00"
define i64 @insert_ram(i64 %0, i64 %1, i8** nocapture writeonly %2) {
%4 = lshr i64 %0, 21
%5 = and i64 %4, 31
%6 = icmp ugt i64 %5, %1
br i1 %6, label %8, label %7
7: ; preds = %3
store i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8** %2
br label %8
8: ; preds = %7, %3
%9 = shl i64 %1, 16
%10 = and i64 %9, 2031616
%11 = or i64 %10, %0
ret i64 %11
}
/* Variables and functions */
int /*<<< orphan*/ test_simple();
int main(void) {
  test_simple();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_simple@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_simple@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_simple()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_simple()
ret i32 0
}
int main() {
  int A[10];
  int B[10];
  int C[10];
  int i;
  for (i = 0; i < 10; ++i) {
    C[i] = A[i] * B[i];
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x94(%rbp)
cmpl   $0xa,-0x94(%rbp)
jge    115f <main+0x5f>
movslq -0x94(%rbp),%rax
mov    -0x30(%rbp,%rax,4),%ecx
movslq -0x94(%rbp),%rax
imul   -0x60(%rbp,%rax,4),%ecx
movslq -0x94(%rbp),%rax
mov    %ecx,-0x90(%rbp,%rax,4)
mov    -0x94(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x94(%rbp)
jmp    1119 <main+0x19>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [10 x i32]
%3 = alloca [10 x i32]
%4 = alloca [10 x i32]
%5 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %5
br label %6
6: ; preds = %22, %0
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 10
br i1 %8, label %9, label %25
9: ; preds = %6
%10 = load i32, i32* %5
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds [10 x i32], [10 x i32]* %2, i64 0, i64 %11
%13 = load i32, i32* %12
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds [10 x i32], [10 x i32]* %3, i64 0, i64 %15
%17 = load i32, i32* %16
%18 = mul nsw i32 %13, %17
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds [10 x i32], [10 x i32]* %4, i64 0, i64 %20
store i32 %18, i32* %21
br label %22
22: ; preds = %9
%23 = load i32, i32* %5
%24 = add nsw i32 %23, 1
store i32 %24, i32* %5
br label %6
25: ; preds = %6
%26 = load i32, i32* %1
ret i32 %26
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint8_t;

/* Variables and functions */
uint8_t pgm_read_byte(const void *s) { return *(const uint8_t *)s; }


x86 assembly (clang, -O0):
<pgm_read_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pgm_read_byte>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @pgm_read_byte(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @pgm_read_byte(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ find_route_ipv6(int /*<<< orphan*/);
void cxgbi_ep_connect() { find_route_ipv6(0); }


x86 assembly (clang, -O0):
<cxgbi_ep_connect>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <find_route_ipv6@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cxgbi_ep_connect>:
xor    %edi,%edi
jmp    1030 <find_route_ipv6@plt>

LLVM IR (-O0):
define void @cxgbi_ep_connect() {
%1 = call i32 @find_route_ipv6(i32 0)
ret void
}

LLVM IR (-O2):
define void @cxgbi_ep_connect() {
%1 = tail call i32 @find_route_ipv6(i32 0)
ret void
}
/* Variables and functions */
char *gu_str_table_append_size(char *, size_t *, size_t);
char *gu_str_table_set_n_rows(char *str, size_t *off, size_t n) {
  return gu_str_table_append_size(str, off, n);
}


x86 assembly (clang, -O0):
<gu_str_table_set_n_rows>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <gu_str_table_append_size@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gu_str_table_set_n_rows>:
jmp    1030 <gu_str_table_append_size@plt>

LLVM IR (-O0):
define i8* @gu_str_table_set_n_rows(i8* %0, i64* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64*
%6 = alloca i64
store i8* %0, i8** %4
store i64* %1, i64** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i64*, i64** %5
%9 = load i64, i64* %6
%10 = call i8* @gu_str_table_append_size(i8* %7, i64* %8, i64 %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @gu_str_table_set_n_rows(i8* %0, i64* %1, i64 %2) {
%4 = tail call i8* @gu_str_table_append_size(i8* %0, i64* %1, i64 %2)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ EX_USAGE;
int /*<<< orphan*/ errx(int /*<<< orphan*/, char *, char *);
void usage(char *argv[]) {
  errx(EX_USAGE, "usage: %s [db_root]", argv[0]);
  return;
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
lea    0xecd(%rip),%rsi
call   1030 <errx@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%eax
mov    (%rdi),%rdx
lea    0xedd(%rip),%rsi
mov    %eax,%edi
jmp    1030 <errx@plt>

LLVM IR (-O0):
@EX_USAGE = global i32 0
@.str = [20 x i8] c"usage: %s [db_root]\00"
define void @usage(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i32, i32* @EX_USAGE
%4 = load i8**, i8*** %2
%5 = getelementptr inbounds i8*, i8** %4, i64 0
%6 = load i8*, i8** %5
%7 = call i32 @errx(i32 %3, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %6)
ret void
}

LLVM IR (-O2):
@EX_USAGE = global i32 0
@.str = [20 x i8] c"usage: %s [db_root]\00"
define void @usage(i8** nocapture %0) {
%2 = load i32, i32* @EX_USAGE
%3 = load i8*, i8** %0
%4 = tail call i32 @errx(i32 %2, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void mostrarMenu() {
  printf("\n\nTITULO DEL JUEGO:\n\n");
  printf("1. Jugar");
  printf("2. Configurar");
  printf("3. About me");
  printf("4. Puntuaciones");
}


x86 assembly (clang, -O0):
<mostrarMenu>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xeef(%rip),%rdi
call   1030 <printf@plt>
lea    0xeec(%rip),%rdi
call   1030 <printf@plt>
lea    0xeee(%rip),%rdi
call   1030 <printf@plt>
lea    0xeee(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mostrarMenu>:
push   %rax
lea    0xf0b(%rip),%rdi
call   1030 <puts@plt>
lea    0xecc(%rip),%rdi
call   1040 <printf@plt>
lea    0xec9(%rip),%rdi
call   1040 <printf@plt>
lea    0xecb(%rip),%rdi
call   1040 <printf@plt>
lea    0xecb(%rip),%rdi
pop    %rax
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"\0A\0ATITULO DEL JUEGO:\0A\0A\00"
@.str.1 = [9 x i8] c"1. Jugar\00"
@.str.2 = [14 x i8] c"2. Configurar\00"
@.str.3 = [12 x i8] c"3. About me\00"
@.str.4 = [16 x i8] c"4. Puntuaciones\00"
define void @mostrarMenu() {
%1 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.3, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.4, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str.1 = [9 x i8] c"1. Jugar\00"
@.str.2 = [14 x i8] c"2. Configurar\00"
@.str.3 = [12 x i8] c"3. About me\00"
@.str.4 = [16 x i8] c"4. Puntuaciones\00"
@str = [21 x i8] c"\0A\0ATITULO DEL JUEGO:\0A\00"
define void @mostrarMenu() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str.3, i64 0, i64 0))
%5 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.4, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ milli_delay(int);
int /*<<< orphan*/ printf_B(char *);
void TestB() {
  int i = 0x1000;
  while (1) {
    printf_B("proc2 ");
    milli_delay(1000);
  }
}


x86 assembly (clang, -O0):
<TestB>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1000,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1040 <printf_B@plt>
mov    $0x3e8,%edi
call   1030 <milli_delay@plt>
jmp    112f <TestB+0xf>

x86 assembly (clang, -O2):
<TestB>:
push   %rbx
lea    0xed8(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1040 <printf_B@plt>
mov    $0x3e8,%edi
call   1030 <milli_delay@plt>
jmp    1130 <TestB+0x10>

LLVM IR (-O0):
@.str = [7 x i8] c"proc2 \00"
define void @TestB() {
%1 = alloca i32
store i32 4096, i32* %1
br label %2
2: ; preds = %0, %2
%3 = call i32 @printf_B(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @milli_delay(i32 1000)
br label %2
}

LLVM IR (-O2):
@.str = [7 x i8] c"proc2 \00"
define void @TestB() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @printf_B(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @milli_delay(i32 1000)
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ MagBiasHandle();
int /*<<< orphan*/ UAVObjRequestUpdate(int /*<<< orphan*/);
void MagBiasRequestUpdate() { UAVObjRequestUpdate(MagBiasHandle()); }


x86 assembly (clang, -O0):
<MagBiasRequestUpdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <MagBiasHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjRequestUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MagBiasRequestUpdate>:
push   %rax
xor    %eax,%eax
call   1030 <MagBiasHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjRequestUpdate@plt>

LLVM IR (-O0):
define void @MagBiasRequestUpdate() {
%1 = call i32 (...) @MagBiasHandle()
%2 = call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}

LLVM IR (-O2):
define void @MagBiasRequestUpdate() {
%1 = tail call i32 (...) @MagBiasHandle()
%2 = tail call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}
__attribute__((always_)) void pci_mmcfg_late_init(void) {}


x86 assembly (clang, -O0):
<pci_mmcfg_late_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_mmcfg_late_init>:
ret

LLVM IR (-O0):
define void @pci_mmcfg_late_init() {
ret void
}

LLVM IR (-O2):
define void @pci_mmcfg_late_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
__attribute__((constructor)) void beginA(void) { printf("ctor a\n"); }


x86 assembly (clang, -O0):
<beginA>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<beginA>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"ctor a\0A\00"
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @beginA, i8* null }]
define void @beginA() {
%1 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @beginA, i8* null }]
@str = [7 x i8] c"ctor a\00"
define void @beginA() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
ret void
}
int test_imm_F1uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0xF1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F1uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xf1,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F1uint64_lowword_reg>:
test   $0xf1,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F1uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 241
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_F1uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 241
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void X509_ALGOR_set0(void) {}


x86 assembly (clang, -O0):
<X509_ALGOR_set0>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_ALGOR_set0>:
ret

LLVM IR (-O0):
define void @X509_ALGOR_set0() {
ret void
}

LLVM IR (-O2):
define void @X509_ALGOR_set0() {
ret void
}
/* Variables and functions */
char *fp_malloc(char);
int /*<<< orphan*/ strp2c(char *, char *);
char *strp2cdup(char *src) {
  char *r = fp_malloc(*src + 1);
  strp2c(r, src);
  return r;
}


x86 assembly (clang, -O0):
<strp2cdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
add    $0x1,%eax
movsbl %al,%edi
call   1040 <fp_malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strp2c@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strp2cdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%al
add    $0x1,%al
movsbl %al,%edi
call   1040 <fp_malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strp2c@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strp2cdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = add nsw i32 %6, 1
%8 = trunc i32 %7 to i8
%9 = call i8* @fp_malloc(i8 signext %8)
store i8* %9, i8** %3
%10 = load i8*, i8** %3
%11 = load i8*, i8** %2
%12 = call i32 @strp2c(i8* %10, i8* %11)
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
define i8* @strp2cdup(i8* %0) {
%2 = load i8, i8* %0
%3 = add i8 %2, 1
%4 = tail call i8* @fp_malloc(i8 signext %3)
%5 = tail call i32 @strp2c(i8* %4, i8* %0)
ret i8* %4
}
unsigned xrop3_0_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  stk1 = 0x0000;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_0_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_0_1_1>:
mov    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_0_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
store i32 %14, i32* %6
%15 = load i8, i8* %4
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 8
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
store i32 %20, i32* %7
store i32 0, i32* %8
%21 = load i32, i32* %8
%22 = load i32, i32* %6
%23 = xor i32 %22, -1
%24 = and i32 %21, %23
%25 = load i32, i32* %7
%26 = xor i32 %25, -1
%27 = and i32 %24, %26
%28 = load i32, i32* %5
%29 = load i32, i32* %6
%30 = and i32 %28, %29
%31 = or i32 %27, %30
%32 = load i32, i32* %5
%33 = load i32, i32* %7
%34 = and i32 %32, %33
%35 = or i32 %31, %34
ret i32 %35
}

LLVM IR (-O2):
define i32 @xrop3_0_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = or i8 %1, %0
%4 = zext i8 %3 to i32
ret i32 %4
}
void gen_int_flag(const char *prefix, const char *flag, int value) {
  printf("(def-syntax %s%s %d)\n", prefix, flag, value);
}


x86 assembly (clang, -O0):
<gen_int_flag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
lea    0xecb(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_int_flag>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee1(%rip),%rdi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"(def-syntax %s%s %d)\0A\00"
define void @gen_int_flag(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %7, i8* %8, i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"(def-syntax %s%s %d)\0A\00"
define void @gen_int_flag(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void print2Spc(int tam, char str[]) {
  int i;
  for (i = 0; i < tam; i++)
    printf("    ");
  printf("%s", str);
}


x86 assembly (clang, -O0):
<print2Spc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    114e <print2Spc+0x3e>
lea    0xec7(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <print2Spc+0x16>
mov    -0x10(%rbp),%rsi
lea    0xeac(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print2Spc>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
test   %edi,%edi
jle    113f <print2Spc+0x2f>
mov    %edi,%ebp
lea    0xedc(%rip),%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <printf@plt>
add    $0xffffffff,%ebp
jne    1130 <print2Spc+0x20>
lea    0xebf(%rip),%rdi
mov    %r14,%rsi
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c" \00"
@.str.1 = [3 x i8] c"%s\00"
define void @print2Spc(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
store i32 0, i32* %5
br label %6
6: ; preds = %12, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %15
10: ; preds = %6
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %10
%13 = load i32, i32* %5
%14 = add nsw i32 %13, 1
store i32 %14, i32* %5
br label %6
15: ; preds = %6
%16 = load i8*, i8** %4
%17 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %16)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c" \00"
@.str.1 = [3 x i8] c"%s\00"
define void @print2Spc(i32 %0, i8* %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %9
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ 0, %2 ]
%6 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%7 = add nuw nsw i32 %5, 1
%8 = icmp eq i32 %7, %0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %1)
ret void
}
void ARGBAffineRow_C() {}


x86 assembly (clang, -O0):
<ARGBAffineRow_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBAffineRow_C>:
ret

LLVM IR (-O0):
define void @ARGBAffineRow_C() {
ret void
}

LLVM IR (-O2):
define void @ARGBAffineRow_C() {
ret void
}
void lru_cache_free() {}


x86 assembly (clang, -O0):
<lru_cache_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lru_cache_free>:
ret

LLVM IR (-O0):
define void @lru_cache_free() {
ret void
}

LLVM IR (-O2):
define void @lru_cache_free() {
ret void
}
uerror(fmt, a1, a2, a3, a4, a5) char *fmt, *a1, *a2, *a3, *a4, *a5;
{ do_error(1, fmt, a1, a2, a3, a4, a5); }


x86 assembly (clang, -O0):
<uerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    %r8,-0x30(%rbp)
mov    %r9,-0x38(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    -0x30(%rbp),%r9
mov    -0x38(%rbp),%rax
mov    $0x1,%edi
mov    %rax,(%rsp)
mov    $0x0,%al
call   1030 <do_error@plt>
mov    -0x4(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uerror>:
push   %rax
mov    %r8,%rax
mov    %rcx,%r8
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    %r9,(%rsp)
mov    $0x1,%edi
mov    %rax,%r9
xor    %eax,%eax
call   1030 <do_error@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @uerror(i8* %0, i8* %1, i8* %2, i8* %3, i8* %4, i8* %5) {
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i8*
%11 = alloca i8*
%12 = alloca i8*
%13 = alloca i8*
store i8* %0, i8** %8
store i8* %1, i8** %9
store i8* %2, i8** %10
store i8* %3, i8** %11
store i8* %4, i8** %12
store i8* %5, i8** %13
%14 = load i8*, i8** %8
%15 = load i8*, i8** %9
%16 = load i8*, i8** %10
%17 = load i8*, i8** %11
%18 = load i8*, i8** %12
%19 = load i8*, i8** %13
%20 = call i32 (i32, i8*, i8*, i8*, i8*, i8*, i8*, ...) bitcast (i32 (...)* @do_error to i32 (i32, i8*, i8*, i8*, i8*, i8*, i8*, ...)*)(i32 1, i8* %14, i8* %15, i8* %16, i8* %17, i8* %18, i8* %19)
%21 = load i32, i32* %7
ret i32 %21
}

LLVM IR (-O2):
define i32 @uerror(i8* %0, i8* %1, i8* %2, i8* %3, i8* %4, i8* %5) {
%7 = tail call i32 (i32, i8*, i8*, i8*, i8*, i8*, i8*, ...) bitcast (i32 (...)* @do_error to i32 (i32, i8*, i8*, i8*, i8*, i8*, i8*, ...)*)(i32 1, i8* %0, i8* %1, i8* %2, i8* %3, i8* %4, i8* %5)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void printShort(char headerMessage[], short value) {
  printf("%s", headerMessage);
  printf("%hi\n", value);
}


x86 assembly (clang, -O0):
<printShort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed2(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
movswl -0xa(%rbp),%esi
lea    0xec3(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printShort>:
push   %rbx
mov    %esi,%ebx
mov    %rdi,%rsi
lea    0xee3(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xed8(%rip),%rdi
mov    %ebx,%esi
xor    %eax,%eax
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [5 x i8] c"%hi\0A\00"
define void @printShort(i8* %0, i16 signext %1) {
%3 = alloca i8*
%4 = alloca i16
store i8* %0, i8** %3
store i16 %1, i16* %4
%5 = load i8*, i8** %3
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = load i16, i16* %4
%8 = sext i16 %7 to i32
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@.str.1 = [5 x i8] c"%hi\0A\00"
define void @printShort(i8* %0, i16 signext %1) {
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = sext i16 %1 to i32
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int64_t;
typedef int /*<<< orphan*/ u_char;

/* Variables and functions */
int /*<<< orphan*/ __get_unaligned_le64(int /*<<< orphan*/ const *);
u_int64_t get_unaligned_le64(const void *p) {
  return __get_unaligned_le64((const u_char *)p);
}


x86 assembly (clang, -O0):
<get_unaligned_le64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__get_unaligned_le64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_unaligned_le64>:
jmp    1030 <__get_unaligned_le64@plt>

LLVM IR (-O0):
define i32 @get_unaligned_le64(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = call i32 @__get_unaligned_le64(i32* %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @get_unaligned_le64(i8* %0) {
%2 = bitcast i8* %0 to i32*
%3 = tail call i32 @__get_unaligned_le64(i32* %2)
ret i32 %3
}
int test_imm_FEint16_reg(short val) {
  return ((val) & (0xFE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FEint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xfe,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FEint16_reg>:
test   $0xfe,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FEint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 254
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_FEint16_reg(i16 signext %0) {
%2 = and i16 %0, 254
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
double sum_two_doubles(double a, double b) { return a + b; }


x86 assembly (clang, -O0):
<sum_two_doubles>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum_two_doubles>:
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @sum_two_doubles(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fadd double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @sum_two_doubles(double %0, double %1) {
%3 = fadd double %0, %1
ret double %3
}