xunge/DecIR huggingface dataset:
int ft_any(char **tab, int (*f)(char *)) {
  if (*tab)
    if (f(*tab) == 1)
      return (1);
    else
      return (ft_any(tab + 1, f));
  else
    return (0);
}


x86 assembly (clang, -O0):
<ft_any>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
je     1169 <ft_any+0x59>
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    (%rcx),%rdi
call   *%rax
cmp    $0x1,%eax
jne    1150 <ft_any+0x40>
movl   $0x1,-0x4(%rbp)
jmp    1170 <ft_any+0x60>
mov    -0x10(%rbp),%rdi
add    $0x8,%rdi
mov    -0x18(%rbp),%rsi
call   1030 <ft_any@plt>
mov    %eax,-0x4(%rbp)
jmp    1170 <ft_any+0x60>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_any>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%rbp
mov    (%rdi),%rdi
xor    %r14d,%r14d
test   %rdi,%rdi
je     113c <ft_any+0x3c>
mov    %rsi,%rbx
add    $0x8,%rbp
nopl   0x0(%rax)
call   *%rbx
cmp    $0x1,%eax
je     1136 <ft_any+0x36>
mov    0x0(%rbp),%rdi
add    $0x8,%rbp
test   %rdi,%rdi
jne    1120 <ft_any+0x20>
jmp    113c <ft_any+0x3c>
mov    $0x1,%r14d
mov    %r14d,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @ft_any(i8** %0, i32 (i8*)* %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32 (i8*)*
store i8** %0, i8*** %4
store i32 (i8*)* %1, i32 (i8*)** %5
%6 = load i8**, i8*** %4
%7 = load i8*, i8** %6
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %21
9: ; preds = %2
%10 = load i32 (i8*)*, i32 (i8*)** %5
%11 = load i8**, i8*** %4
%12 = load i8*, i8** %11
%13 = call i32 %10(i8* %12)
%14 = icmp eq i32 %13, 1
br i1 %14, label %15, label %16
15: ; preds = %9
store i32 1, i32* %3
br label %22
16: ; preds = %9
%17 = load i8**, i8*** %4
%18 = getelementptr inbounds i8*, i8** %17, i64 1
%19 = load i32 (i8*)*, i32 (i8*)** %5
%20 = call i32 @ft_any(i8** %18, i32 (i8*)* %19)
store i32 %20, i32* %3
br label %22
21: ; preds = %2
store i32 0, i32* %3
br label %22
22: ; preds = %21, %16, %15
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @ft_any(i8** nocapture %0, i32 (i8*)* nocapture %1) {
%3 = load i8*, i8** %0
%4 = icmp eq i8* %3, null
br i1 %4, label %14, label %8
5: ; preds = %8
%6 = load i8*, i8** %13
%7 = icmp eq i8* %6, null
br i1 %7, label %14, label %8
8: ; preds = %2, %5
%9 = phi i8* [ %6, %5 ], [ %3, %2 ]
%10 = phi i8** [ %13, %5 ], [ %0, %2 ]
%11 = tail call i32 %1(i8* %9)
%12 = icmp eq i32 %11, 1
%13 = getelementptr inbounds i8*, i8** %10, i64 1
br i1 %12, label %14, label %5
14: ; preds = %8, %5, %2
%15 = phi i32 [ 0, %2 ], [ 0, %5 ], [ 1, %8 ]
ret i32 %15
}
/* Variables and functions */
int errno;
int socket(int, int, int);
int __sulong_posix_socket(int domain, int type, int protocol) {
  {
    int native_errno = errno;
    int result = socket(domain, type, protocol);
    if (result == (int)-1) {
      result = (int)(long)-errno;
    }
    errno = native_errno;
    return result;
  };
}


x86 assembly (clang, -O0):
<__sulong_posix_socket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    0x2eb8(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <socket@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xffffffff,-0x14(%rbp)
jne    1158 <__sulong_posix_socket+0x48>
xor    %eax,%eax
mov    0x2e8f(%rip),%rcx
sub    (%rcx),%eax
cltq
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%ecx
mov    0x2e7e(%rip),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sulong_posix_socket>:
push   %rbp
push   %rbx
push   %rax
mov    0x2ec6(%rip),%rbx
mov    (%rbx),%ebp
call   1030 <socket@plt>
xor    %ecx,%ecx
sub    (%rbx),%ecx
cmp    $0xffffffff,%eax
cmove  %ecx,%eax
mov    %ebp,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i32 0
define i32 @__sulong_posix_socket(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i32, i32* @errno
store i32 %9, i32* %7
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = call i32 @socket(i32 %10, i32 %11, i32 %12)
store i32 %13, i32* %8
%14 = load i32, i32* %8
%15 = icmp eq i32 %14, -1
br i1 %15, label %16, label %21
16: ; preds = %3
%17 = load i32, i32* @errno
%18 = sub nsw i32 0, %17
%19 = sext i32 %18 to i64
%20 = trunc i64 %19 to i32
store i32 %20, i32* %8
br label %21
21: ; preds = %16, %3
%22 = load i32, i32* %7
store i32 %22, i32* @errno
%23 = load i32, i32* %8
ret i32 %23
}

LLVM IR (-O2):
@errno = global i32 0
define i32 @__sulong_posix_socket(i32 %0, i32 %1, i32 %2) {
%4 = load i32, i32* @errno
%5 = tail call i32 @socket(i32 %0, i32 %1, i32 %2)
%6 = icmp eq i32 %5, -1
%7 = load i32, i32* @errno
%8 = sub nsw i32 0, %7
%9 = select i1 %6, i32 %8, i32 %5
store i32 %4, i32* @errno
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ core3_print(char *, char *, char const *);
void U_EMRSETMITERLIMIT_print(const char *contents) {
  core3_print("U_EMRSETMITERLIMIT", "eMiterLimit:", contents);
}


x86 assembly (clang, -O0):
<U_EMRSETMITERLIMIT_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xee5(%rip),%rsi
call   1030 <core3_print@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRSETMITERLIMIT_print>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xef2(%rip),%rsi
jmp    1030 <core3_print@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"U_EMRSETMITERLIMIT\00"
@.str.1 = [13 x i8] c"eMiterLimit:\00"
define void @U_EMRSETMITERLIMIT_print(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @core3_print(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"U_EMRSETMITERLIMIT\00"
@.str.1 = [13 x i8] c"eMiterLimit:\00"
define void @U_EMRSETMITERLIMIT_print(i8* %0) {
%2 = tail call i32 @core3_print(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
void setup(void) { return; }


x86 assembly (clang, -O0):
<setup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup>:
ret

LLVM IR (-O0):
define void @setup() {
ret void
}

LLVM IR (-O2):
define void @setup() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("cl_gl_ext.h standalone test PASSED.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [37 x i8] c"cl_gl_ext.h standalone test PASSED.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [36 x i8] c"cl_gl_ext.h standalone test PASSED.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str, i64 0, i64 0))
ret i32 0
}
read_bm_header(file_name, bmheader) char *file_name;
struct bitmapheader *bmheader;
{
}


x86 assembly (clang, -O0):
<read_bm_header>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_bm_header>:
ret

LLVM IR (-O0):
%struct.bitmapheader = type opaque
define i32 @read_bm_header(i8* %0, %struct.bitmapheader* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca %struct.bitmapheader*
store i8* %0, i8** %4
store %struct.bitmapheader* %1, %struct.bitmapheader** %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
%struct.bitmapheader = type opaque
define i32 @read_bm_header(i8* nocapture readnone %0, %struct.bitmapheader* nocapture readnone %1) {
ret i32 undef
}
int init_rain(void) {}


x86 assembly (clang, -O0):
<init_rain>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_rain>:
ret

LLVM IR (-O0):
define i32 @init_rain() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @init_rain() {
ret i32 undef
}
/* Type definitions */
typedef scalar_t__ mem;

/* Variables and functions */
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, int);
int /*<<< orphan*/ talloc_set_parent(void *, void *);
void *talloc_init(void *mem, void *parent) {
  if (!mem)
    return NULL;
  memset(mem, 0, (sizeof(void *) * 3));
  mem = (void *)((void **)(mem) + 3);
  talloc_set_parent(mem, parent);
  return mem;
}


x86 assembly (clang, -O0):
<talloc_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1148 <talloc_init+0x28>
movq   $0x0,-0x8(%rbp)
jmp    1179 <talloc_init+0x59>
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
mov    $0x18,%edx
call   1040 <memset@plt>
mov    -0x10(%rbp),%rax
add    $0x18,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <talloc_set_parent@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<talloc_init>:
push   %r14
push   %rbx
push   %rax
test   %rdi,%rdi
je     114c <talloc_init+0x2c>
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %esi,%esi
mov    $0x18,%edx
call   1040 <memset@plt>
add    $0x18,%rbx
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <talloc_set_parent@plt>
jmp    114e <talloc_init+0x2e>
xor    %ebx,%ebx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @talloc_init(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %9, label %8
8: ; preds = %2
store i8* null, i8** %3
br label %20
9: ; preds = %2
%10 = load i8*, i8** %4
%11 = call i32 @memset(i8* %10, i32 0, i32 24)
%12 = load i8*, i8** %4
%13 = bitcast i8* %12 to i8**
%14 = getelementptr inbounds i8*, i8** %13, i64 3
%15 = bitcast i8** %14 to i8*
store i8* %15, i8** %4
%16 = load i8*, i8** %4
%17 = load i8*, i8** %5
%18 = call i32 @talloc_set_parent(i8* %16, i8* %17)
%19 = load i8*, i8** %4
store i8* %19, i8** %3
br label %20
20: ; preds = %9, %8
%21 = load i8*, i8** %3
ret i8* %21
}

LLVM IR (-O2):
define i8* @talloc_init(i8* %0, i8* %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = tail call i32 @memset(i8* %0, i32 0, i32 24)
%6 = getelementptr inbounds i8, i8* %0, i64 24
%7 = tail call i32 @talloc_set_parent(i8* %6, i8* %1)
br label %8
8: ; preds = %2, %4
%9 = phi i8* [ %6, %4 ], [ null, %2 ]
ret i8* %9
}
int enhex(char c) {
  if (c >= 0x0 && c <= 0x9)
    return c - 0x0 + '0';
  if (c >= 0xA && c <= 0xF)
    return c - 0xA + 'A';
  return -1;
}


x86 assembly (clang, -O0):
<enhex>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x0,%eax
jl     1136 <enhex+0x36>
movsbl -0x5(%rbp),%eax
cmp    $0x9,%eax
jg     1136 <enhex+0x36>
movsbl -0x5(%rbp),%eax
sub    $0x0,%eax
add    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    1169 <enhex+0x69>
movsbl -0x5(%rbp),%eax
cmp    $0xa,%eax
jl     1162 <enhex+0x62>
movsbl -0x5(%rbp),%eax
cmp    $0xf,%eax
jg     1162 <enhex+0x62>
movsbl -0x5(%rbp),%eax
sub    $0xa,%eax
add    $0x41,%eax
mov    %eax,-0x4(%rbp)
jmp    1169 <enhex+0x69>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<enhex>:
mov    %edi,%eax
cmp    $0x9,%al
ja     110a <enhex+0xa>
add    $0x30,%eax
ret
lea    -0xa(%rax),%ecx
add    $0x37,%eax
cmp    $0x6,%cl
mov    $0xffffffff,%ecx
cmovb  %eax,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @enhex(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 0
br i1 %6, label %7, label %16
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 9
br i1 %10, label %11, label %16
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %13, 0
%15 = add nsw i32 %14, 48
store i32 %15, i32* %2
br label %30
16: ; preds = %7, %1
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = icmp sge i32 %18, 10
br i1 %19, label %20, label %29
20: ; preds = %16
%21 = load i8, i8* %3
%22 = sext i8 %21 to i32
%23 = icmp sle i32 %22, 15
br i1 %23, label %24, label %29
24: ; preds = %20
%25 = load i8, i8* %3
%26 = sext i8 %25 to i32
%27 = sub nsw i32 %26, 10
%28 = add nsw i32 %27, 65
store i32 %28, i32* %2
br label %30
29: ; preds = %20, %16
store i32 -1, i32* %2
br label %30
30: ; preds = %29, %24, %11
%31 = load i32, i32* %2
ret i32 %31
}

LLVM IR (-O2):
define i32 @enhex(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = icmp ult i8 %0, 10
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = add nsw i32 %2, 48
br label %11
6: ; preds = %1
%7 = add i8 %0, -10
%8 = icmp ult i8 %7, 6
%9 = add nsw i32 %2, 55
%10 = select i1 %8, i32 %9, i32 -1
br label %11
11: ; preds = %6, %4
%12 = phi i32 [ %5, %4 ], [ %10, %6 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void x(void) { printf("PASS\n"); }


x86 assembly (clang, -O0):
<x>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<x>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"PASS\0A\00"
define void @x() {
%1 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [5 x i8] c"PASS\00"
define void @x() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ do_test_chacha_mem(int);
void test_chacha_mem(void) {
  do_test_chacha_mem(20);
  do_test_chacha_mem(12);
  do_test_chacha_mem(8);
}


x86 assembly (clang, -O0):
<test_chacha_mem>:
push   %rbp
mov    %rsp,%rbp
mov    $0x14,%edi
call   1030 <do_test_chacha_mem@plt>
mov    $0xc,%edi
call   1030 <do_test_chacha_mem@plt>
mov    $0x8,%edi
call   1030 <do_test_chacha_mem@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_chacha_mem>:
push   %rax
mov    $0x14,%edi
call   1030 <do_test_chacha_mem@plt>
mov    $0xc,%edi
call   1030 <do_test_chacha_mem@plt>
mov    $0x8,%edi
pop    %rax
jmp    1030 <do_test_chacha_mem@plt>

LLVM IR (-O0):
define void @test_chacha_mem() {
%1 = call i32 @do_test_chacha_mem(i32 20)
%2 = call i32 @do_test_chacha_mem(i32 12)
%3 = call i32 @do_test_chacha_mem(i32 8)
ret void
}

LLVM IR (-O2):
define void @test_chacha_mem() {
%1 = tail call i32 @do_test_chacha_mem(i32 20)
%2 = tail call i32 @do_test_chacha_mem(i32 12)
%3 = tail call i32 @do_test_chacha_mem(i32 8)
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int var_size_u64(uint64_t v) {
  int i = 0;
  do {
    i++;
    v >>= 7;
  } while (v);
  return i;
}


x86 assembly (clang, -O0):
<var_size_u64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x7,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    110e <var_size_u64+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<var_size_u64>:
xor    %eax,%eax
mov    %edi,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
add    $0x1,%eax
sar    $0x7,%ecx
cmp    $0x7f,%edi
mov    %ecx,%edi
ja     1110 <var_size_u64+0x10>
ret

LLVM IR (-O0):
define i32 @var_size_u64(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i32, i32* %3
%6 = add nsw i32 %5, 1
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = ashr i32 %7, 7
store i32 %8, i32* %2
br label %9
9: ; preds = %4
%10 = load i32, i32* %2
%11 = icmp ne i32 %10, 0
br i1 %11, label %4, label %12
12: ; preds = %9
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @var_size_u64(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ %0, %1 ], [ %6, %2 ]
%4 = phi i32 [ 0, %1 ], [ %5, %2 ]
%5 = add nuw nsw i32 %4, 1
%6 = ashr i32 %3, 7
%7 = icmp ult i32 %3, 128
br i1 %7, label %8, label %2
8: ; preds = %2
ret i32 %5
}
void dummy_linestyle(unsigned pattern) { pattern = pattern; }


x86 assembly (clang, -O0):
<dummy_linestyle>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy_linestyle>:
ret

LLVM IR (-O0):
define void @dummy_linestyle(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store i32 %3, i32* %2
ret void
}

LLVM IR (-O2):
define void @dummy_linestyle(i32 %0) {
ret void
}
void TestLineNumbers(void) {
  int a;
  int b;
  1;
}


x86 assembly (clang, -O0):
<TestLineNumbers>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TestLineNumbers>:
ret

LLVM IR (-O0):
define void @TestLineNumbers() {
%1 = alloca i32
%2 = alloca i32
ret void
}

LLVM IR (-O2):
define void @TestLineNumbers() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fish_warn(char *);
int pclose(int /*<<< orphan*/ *);
int sysclose(FILE *f) {
  int i = pclose(f);
  if (i != 0) {
    fish_warn("Error with cmd.");
    return -1;
  }
  return i;
}


x86 assembly (clang, -O0):
<sysclose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <pclose@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     115a <sysclose+0x3a>
lea    0xeb7(%rip),%rdi
call   1040 <fish_warn@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1160 <sysclose+0x40>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sysclose>:
push   %rax
call   1030 <pclose@plt>
test   %eax,%eax
je     113d <sysclose+0x1d>
lea    0xecf(%rip),%rdi
call   1040 <fish_warn@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"Error with cmd.\00"
define i32 @sysclose(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
%5 = load i32*, i32** %3
%6 = call i32 @pclose(i32* %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = call i32 @fish_warn(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %2
br label %13
11: ; preds = %1
%12 = load i32, i32* %4
store i32 %12, i32* %2
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
@.str = [16 x i8] c"Error with cmd.\00"
define i32 @sysclose(i32* nocapture %0) {
%2 = tail call i32 @pclose(i32* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @fish_warn(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ -1, %4 ], [ 0, %1 ]
ret i32 %7
}
/* Type definitions */
typedef int __m128;

/* Variables and functions */
float hsum_ps_SSE3(int const);
float opNormSSE_single(const __m128 me) { return hsum_ps_SSE3(me * me); }


x86 assembly (clang, -O0):
<opNormSSE_single>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
imul   -0x4(%rbp),%edi
call   1030 <hsum_ps_SSE3@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<opNormSSE_single>:
imul   %edi,%edi
jmp    1030 <hsum_ps_SSE3@plt>

LLVM IR (-O0):
define float @opNormSSE_single(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %3, %4
%6 = call float @hsum_ps_SSE3(i32 %5)
ret float %6
}

LLVM IR (-O2):
define float @opNormSSE_single(i32 %0) {
%2 = mul nsw i32 %0, %0
%3 = tail call float @hsum_ps_SSE3(i32 %2)
ret float %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
uint8_t implicitUnsignedTruncation(int32_t argc) {
  fprintf(stderr, "TEST\n");
  return argc;
}


x86 assembly (clang, -O0):
<implicitUnsignedTruncation>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
lea    0xed5(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<implicitUnsignedTruncation>:
push   %rbx
mov    %edi,%ebx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
call   1030 <fprintf@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [6 x i8] c"TEST\0A\00"
define i32 @implicitUnsignedTruncation(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [6 x i8] c"TEST\0A\00"
define i32 @implicitUnsignedTruncation(i32 returned %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 %0
}
/* Type definitions */
struct sockaddr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int getpeername(int sockfd, struct sockaddr *addr, unsigned int *addrlen) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<getpeername>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2ed2(%rip),%rax
mov    (%rax),%ecx
mov    0x2eb9(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getpeername>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @getpeername(i32 %0, %struct.sockaddr* %1, i32* %2) {
%4 = alloca i32
%5 = alloca %struct.sockaddr*
%6 = alloca i32*
store i32 %0, i32* %4
store %struct.sockaddr* %1, %struct.sockaddr** %5
store i32* %2, i32** %6
%7 = load i32, i32* @ENOSYS
store i32 %7, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @getpeername(i32 %0, %struct.sockaddr* nocapture readnone %1, i32* nocapture readnone %2) {
%4 = load i32, i32* @ENOSYS
store i32 %4, i32* @errno
ret i32 -1
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *, int /*<<< orphan*/);
int solve_by_standard_Laurent_homotopy_continuation(int number_of_tasks) {
  int *b, fail;
  double *c;
  fail = _ada_use_c2phc(774, &number_of_tasks, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<solve_by_standard_Laurent_homotopy_continuation>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x306,%edi
lea    -0x4(%rbp),%rsi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solve_by_standard_Laurent_homotopy_continuation>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x306,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @solve_by_standard_Laurent_homotopy_continuation(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
%5 = alloca double*
store i32 %0, i32* %2
%6 = load i32*, i32** %3
%7 = load double*, double** %5
%8 = call i32 @_ada_use_c2phc(i32 774, i32* %2, i32* %6, double* %7, i32 0)
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @solve_by_standard_Laurent_homotopy_continuation(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @_ada_use_c2phc(i32 774, i32* %2, i32* undef, double* undef, i32 0)
ret i32 %3
}
int bar(unsigned long baz) {
  unsigned long depth;
  depth = bar(1);
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x1,%edi
call   1030 <bar@plt>
cltq
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
jmp    1100 <bar>

LLVM IR (-O0):
define i32 @bar(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
%5 = call i32 @bar(i64 1)
%6 = sext i32 %5 to i64
store i64 %6, i64* %4
%7 = load i32, i32* %2
ret i32 %7
}

LLVM IR (-O2):
define i32 @bar(i64 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ __int_memset(void *, int, size_t);
void __long_int_memset(void *__restrict s, int c, size_t n) {
  int ic = (c << 24) + ((char)c << 16) + ((char)c << 8) + (char)c;
  __int_memset(s, ic, n);
}


x86 assembly (clang, -O0):
<__long_int_memset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x18,%eax
mov    -0xc(%rbp),%ecx
movsbl %cl,%ecx
shl    $0x10,%ecx
add    %ecx,%eax
mov    -0xc(%rbp),%ecx
movsbl %cl,%ecx
shl    $0x8,%ecx
add    %ecx,%eax
mov    -0xc(%rbp),%ecx
movsbl %cl,%ecx
add    %ecx,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x1c(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1030 <__int_memset@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__long_int_memset>:
movsbl %sil,%eax
shl    $0x18,%esi
mov    %esi,%ecx
sar    $0x8,%ecx
add    %esi,%ecx
sar    $0x10,%esi
add    %ecx,%esi
add    %eax,%esi
jmp    1030 <__int_memset@plt>

LLVM IR (-O0):
define void @__long_int_memset(i8* noalias %0, i32 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%8 = load i32, i32* %5
%9 = shl i32 %8, 24
%10 = load i32, i32* %5
%11 = trunc i32 %10 to i8
%12 = sext i8 %11 to i32
%13 = shl i32 %12, 16
%14 = add nsw i32 %9, %13
%15 = load i32, i32* %5
%16 = trunc i32 %15 to i8
%17 = sext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = add nsw i32 %14, %18
%20 = load i32, i32* %5
%21 = trunc i32 %20 to i8
%22 = sext i8 %21 to i32
%23 = add nsw i32 %19, %22
store i32 %23, i32* %7
%24 = load i8*, i8** %4
%25 = load i32, i32* %7
%26 = load i64, i64* %6
%27 = call i32 @__int_memset(i8* %24, i32 %25, i64 %26)
ret void
}

LLVM IR (-O2):
define void @__long_int_memset(i8* noalias %0, i32 %1, i64 %2) {
%4 = shl i32 %1, 24
%5 = ashr exact i32 %4, 24
%6 = ashr exact i32 %4, 8
%7 = add nsw i32 %6, %4
%8 = ashr exact i32 %4, 16
%9 = add nsw i32 %7, %8
%10 = add nsw i32 %9, %5
%11 = tail call i32 @__int_memset(i8* %0, i32 %10, i64 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void sigbus_handler(int signum) {
  (void)signum;
  printf("SIGBUS\n");
  exit(1);
}


x86 assembly (clang, -O0):
<sigbus_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<sigbus_handler>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"SIGBUS\0A\00"
define void @sigbus_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@str = [7 x i8] c"SIGBUS\00"
define void @sigbus_handler(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ emit(char *);
void usereg(void) { emit("and ebx,byte 7\n"); }


x86 assembly (clang, -O0):
<usereg>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <emit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usereg>:
lea    0xee9(%rip),%rdi
jmp    1030 <emit@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"and ebx,byte 7\0A\00"
define void @usereg() {
%1 = call i32 @emit(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"and ebx,byte 7\0A\00"
define void @usereg() {
%1 = tail call i32 @emit(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}
int mtherr(const char *name, int code) { return (0); }


x86 assembly (clang, -O0):
<mtherr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mtherr>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mtherr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @mtherr(i8* nocapture readnone %0, i32 %1) {
ret i32 0
}
void unsigned_char_div_signed_char_unsigned_char(unsigned char *LHS,
                                                 unsigned char RHS) {
  (*LHS) /= RHS;
}


x86 assembly (clang, -O0):
<unsigned_char_div_signed_char_unsigned_char>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movzbl (%rax),%eax
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsigned_char_div_signed_char_unsigned_char>:
movzbl (%rdi),%eax
div    %sil
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @unsigned_char_div_signed_char_unsigned_char(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
%10 = sdiv i32 %9, %6
%11 = trunc i32 %10 to i8
store i8 %11, i8* %7
ret void
}

LLVM IR (-O2):
define void @unsigned_char_div_signed_char_unsigned_char(i8* nocapture %0, i8 zeroext %1) {
%3 = load i8, i8* %0
%4 = udiv i8 %3, %1
store i8 %4, i8* %0
ret void
}
/* Variables and functions */
scalar_t__ getc(int);
int fgetc(int dev) {
  int result = (int)getc(dev);
  if (0 > result) {
    return (-2);
  } else {
    return result;
  }
}


x86 assembly (clang, -O0):
<fgetc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <getc@plt>
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
cmp    -0xc(%rbp),%eax
jle    113d <fgetc+0x2d>
movl   $0xfffffffe,-0x4(%rbp)
jmp    1143 <fgetc+0x33>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgetc>:
push   %rax
call   1030 <getc@plt>
test   %eax,%eax
mov    $0xfffffffe,%ecx
cmovs  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fgetc(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i64 @getc(i32 %5)
%7 = trunc i64 %6 to i32
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = icmp sgt i32 0, %8
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 -2, i32* %2
br label %13
11: ; preds = %1
%12 = load i32, i32* %4
store i32 %12, i32* %2
br label %13
13: ; preds = %11, %10
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @fgetc(i32 %0) {
%2 = tail call i64 @getc(i32 %0)
%3 = trunc i64 %2 to i32
%4 = icmp slt i32 %3, 0
%5 = select i1 %4, i32 -2, i32 %3
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint32_t;

/* Variables and functions */
void predict_4x4_dc_128(uint8_t *src, int i_stride) {
  int y;
  for (y = 0; y < 4; y++) {
    uint32_t *p = (uint32_t *)src;
    *p = 0x80808080;
    src += i_stride;
  }
}


x86 assembly (clang, -O0):
<predict_4x4_dc_128>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x4,-0x10(%rbp)
jge    1151 <predict_4x4_dc_128+0x51>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movl   $0x80808080,(%rax)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
movslq %ecx,%rcx
shl    $0x2,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1112 <predict_4x4_dc_128+0x12>
pop    %rbp
ret

x86 assembly (clang, -O2):
<predict_4x4_dc_128>:
movslq %esi,%rax
movl   $0x80808080,(%rdi)
lea    (%rdi,%rax,4),%rcx
movl   $0x80808080,(%rdi,%rax,4)
lea    (%rcx,%rax,4),%rdx
movl   $0x80808080,(%rcx,%rax,4)
movl   $0x80808080,(%rdx,%rax,4)
ret

LLVM IR (-O0):
define void @predict_4x4_dc_128(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %7
7: ; preds = %17, %2
%8 = load i32, i32* %5
%9 = icmp slt i32 %8, 4
br i1 %9, label %10, label %20
10: ; preds = %7
%11 = load i32*, i32** %3
store i32* %11, i32** %6
%12 = load i32*, i32** %6
store i32 -2139062144, i32* %12
%13 = load i32, i32* %4
%14 = load i32*, i32** %3
%15 = sext i32 %13 to i64
%16 = getelementptr inbounds i32, i32* %14, i64 %15
store i32* %16, i32** %3
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %7
20: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @predict_4x4_dc_128(i32* nocapture writeonly %0, i32 %1) {
%3 = sext i32 %1 to i64
store i32 -2139062144, i32* %0
%4 = getelementptr inbounds i32, i32* %0, i64 %3
store i32 -2139062144, i32* %4
%5 = getelementptr inbounds i32, i32* %4, i64 %3
store i32 -2139062144, i32* %5
%6 = getelementptr inbounds i32, i32* %5, i64 %3
store i32 -2139062144, i32* %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ genStd4(char);
void foo_foo__() { genStd4('2'); }


x86 assembly (clang, -O0):
<foo_foo__>:
push   %rbp
mov    %rsp,%rbp
mov    $0x32,%edi
call   1030 <genStd4@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_foo__>:
mov    $0x32,%edi
jmp    1030 <genStd4@plt>

LLVM IR (-O0):
define void @foo_foo__() {
%1 = call i32 @genStd4(i8 signext 50)
ret void
}

LLVM IR (-O2):
define void @foo_foo__() {
%1 = tail call i32 @genStd4(i8 signext 50)
ret void
}
/* Variables and functions */
int fdatasync(int);
int txc_libc_fdatasync(int fd) { return fdatasync(fd); }


x86 assembly (clang, -O0):
<txc_libc_fdatasync>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <fdatasync@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<txc_libc_fdatasync>:
jmp    1030 <fdatasync@plt>

LLVM IR (-O0):
define i32 @txc_libc_fdatasync(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @fdatasync(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @txc_libc_fdatasync(i32 %0) {
%2 = tail call i32 @fdatasync(i32 %0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ GPIODirModeSet(int /*<<< orphan*/, int /*<<< orphan*/, int);
int /*<<< orphan*/ GPIOPadConfigSet(int /*<<< orphan*/, int /*<<< orphan*/, int,
                                    int);
void GPIOPinTypeLCD(uint32_t ui32Port, uint8_t ui8Pins) {
  ;
  GPIODirModeSet(ui32Port, ui8Pins, 0x00000002);
  GPIOPadConfigSet(ui32Port, ui8Pins, 0x00000004, 0x00000008);
}


x86 assembly (clang, -O0):
<GPIOPinTypeLCD>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x4,%edx
mov    $0x8,%ecx
call   1030 <GPIOPadConfigSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinTypeLCD>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    %ebp,%edi
mov    %ebx,%esi
mov    $0x4,%edx
mov    $0x8,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <GPIOPadConfigSet@plt>

LLVM IR (-O0):
define void @GPIOPinTypeLCD(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @GPIODirModeSet(i32 %5, i32 %6, i32 2)
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @GPIOPadConfigSet(i32 %8, i32 %9, i32 4, i32 8)
ret void
}

LLVM IR (-O2):
define void @GPIOPinTypeLCD(i32 %0, i32 %1) {
%3 = tail call i32 @GPIODirModeSet(i32 %0, i32 %1, i32 2)
%4 = tail call i32 @GPIOPadConfigSet(i32 %0, i32 %1, i32 4, i32 8)
ret void
}
/* Type definitions */
struct ship {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ Write(int, struct ship *, long, int /*<<< orphan*/,
                         int /*<<< orphan*/, int /*<<< orphan*/);
void send_sink(struct ship *ship, long a) { Write(25, ship, a, 0, 0, 0); }


x86 assembly (clang, -O0):
<send_sink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0x19,%edi
xor    %r9d,%r9d
mov    %r9d,%ecx
mov    %r9d,%r8d
call   1030 <Write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_sink>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x19,%edi
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <Write@plt>

LLVM IR (-O0):
%struct.ship = type { i32 }
define void @send_sink(%struct.ship* %0, i64 %1) {
%3 = alloca %struct.ship*
%4 = alloca i64
store %struct.ship* %0, %struct.ship** %3
store i64 %1, i64* %4
%5 = load %struct.ship*, %struct.ship** %3
%6 = load i64, i64* %4
%7 = call i32 @Write(i32 25, %struct.ship* %5, i64 %6, i32 0, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
%struct.ship = type { i32 }
define void @send_sink(%struct.ship* %0, i64 %1) {
%3 = tail call i32 @Write(i32 25, %struct.ship* %0, i64 %1, i32 0, i32 0, i32 0)
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t bswap_u64(uint64_t x) {
  return (((x & ((uint64_t)(0xff00000000000000ULL))) >> 56) |
          ((x & ((uint64_t)(0x00ff000000000000ULL))) >> 40) |
          ((x & ((uint64_t)(0x0000ff0000000000ULL))) >> 24) |
          ((x & ((uint64_t)(0x000000ff00000000ULL))) >> 8) |
          ((x & ((uint64_t)(0x00000000ff000000ULL))) << 8) |
          ((x & ((uint64_t)(0x0000000000ff0000ULL))) << 24) |
          ((x & ((uint64_t)(0x000000000000ff00ULL))) << 40) |
          ((x & ((uint64_t)(0x00000000000000ffULL))) << 56));
}


x86 assembly (clang, -O0):
<bswap_u64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x0,%eax
mov    $0x38,%ecx
sar    %cl,%eax
mov    -0x4(%rbp),%edx
and    $0x0,%edx
mov    $0x28,%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0x0,%ecx
sar    $0x18,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0x0,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff000000,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff0000,%ecx
shl    $0x18,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%edx
and    $0xff00,%edx
mov    $0x28,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%edx
and    $0xff,%edx
mov    $0x38,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bswap_u64>:
ret

LLVM IR (-O0):
define i32 @bswap_u64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 0
%5 = ashr i32 %4, 56
%6 = load i32, i32* %2
%7 = and i32 %6, 0
%8 = ashr i32 %7, 40
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = and i32 %10, 0
%12 = ashr i32 %11, 24
%13 = or i32 %9, %12
%14 = load i32, i32* %2
%15 = and i32 %14, 0
%16 = ashr i32 %15, 8
%17 = or i32 %13, %16
%18 = load i32, i32* %2
%19 = and i32 %18, -16777216
%20 = shl i32 %19, 8
%21 = or i32 %17, %20
%22 = load i32, i32* %2
%23 = and i32 %22, 16711680
%24 = shl i32 %23, 24
%25 = or i32 %21, %24
%26 = load i32, i32* %2
%27 = and i32 %26, 65280
%28 = shl i32 %27, 40
%29 = or i32 %25, %28
%30 = load i32, i32* %2
%31 = and i32 %30, 255
%32 = shl i32 %31, 56
%33 = or i32 %29, %32
ret i32 %33
}

LLVM IR (-O2):
define i32 @bswap_u64(i32 %0) {
ret i32 poison
}
int strsize(char *c) {
  int i;
  for (i = 0; *c != '\0'; c++, i++)
    ;
  return i;
}


x86 assembly (clang, -O0):
<strsize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     113e <strsize+0x3e>
jmp    1124 <strsize+0x24>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <strsize+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strsize>:
cmpb   $0x0,(%rdi)
je     111c <strsize+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <strsize+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @strsize(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %4
br label %10
10: ; preds = %9
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @strsize(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add nuw nsw i32 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %12
}
/* Variables and functions */
int or_state_validate(void *, char **);
int or_state_validate_cb(void *old_state, void *state, void *default_state,
                         int from_setconf, char **msg) {
  (void)from_setconf;
  (void)default_state;
  (void)old_state;
  return or_state_validate(state, msg);
}


x86 assembly (clang, -O0):
<or_state_validate_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x28(%rbp),%rsi
call   1030 <or_state_validate@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<or_state_validate_cb>:
mov    %rsi,%rdi
mov    %r8,%rsi
jmp    1030 <or_state_validate@plt>

LLVM IR (-O0):
define i32 @or_state_validate_cb(i8* %0, i8* %1, i8* %2, i32 %3, i8** %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i8**
store i8* %0, i8** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i8** %4, i8*** %10
%11 = load i32, i32* %9
%12 = load i8*, i8** %8
%13 = load i8*, i8** %6
%14 = load i8*, i8** %7
%15 = load i8**, i8*** %10
%16 = call i32 @or_state_validate(i8* %14, i8** %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @or_state_validate_cb(i8* nocapture readnone %0, i8* %1, i8* nocapture readnone %2, i32 %3, i8** %4) {
%6 = tail call i32 @or_state_validate(i8* %1, i8** %4)
ret i32 %6
}
int funcXor(int a, int b) { return (a ^ b); }


x86 assembly (clang, -O0):
<funcXor>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<funcXor>:
mov    %edi,%eax
xor    %esi,%eax
ret

LLVM IR (-O0):
define i32 @funcXor(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = xor i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @funcXor(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
ret i32 %3
}
/* Type definitions */
struct iovec {
  int /*<<< orphan*/ member_0;
};

/* Variables and functions */
int vmsplice(int, struct iovec *, unsigned long, unsigned int);
int main(void) {
  int fd = 3;
  struct iovec iov = {0};
  unsigned long nr_segs = 1;
  unsigned int flags = 0;
  return vmsplice(fd, &iov, nr_segs, flags);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
lea    -0x10(%rbp),%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
movq   $0x1,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
lea    -0x10(%rbp),%rsi
call   1040 <vmsplice@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x0,(%rsp)
mov    %rsp,%rsi
mov    $0x1,%edx
mov    $0x3,%edi
xor    %ecx,%ecx
call   1030 <vmsplice@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.iovec = type { i32 }
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca %struct.iovec
%4 = alloca i64
%5 = alloca i32
store i32 0, i32* %1
store i32 3, i32* %2
%6 = bitcast %struct.iovec* %3 to i8*
store i64 1, i64* %4
store i32 0, i32* %5
%7 = load i32, i32* %2
%8 = load i64, i64* %4
%9 = load i32, i32* %5
%10 = call i32 @vmsplice(i32 %7, %struct.iovec* %3, i64 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
%struct.iovec = type { i32 }
define i32 @main() {
%1 = alloca %struct.iovec
%2 = bitcast %struct.iovec* %1 to i8*
%3 = getelementptr inbounds %struct.iovec, %struct.iovec* %1, i64 0, i32 0
store i32 0, i32* %3
%4 = call i32 @vmsplice(i32 3, %struct.iovec* %1, i64 1, i32 0)
ret i32 %4
}
int test_imm_4Fuint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x4F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_4Fuint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x4f,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_4Fuint64_highword_mem>:
testb  $0x4f,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_4Fuint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 79
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_4Fuint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 339302416384
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ test_odd_sized_keys();
int /*<<< orphan*/ test_sequences();
int /*<<< orphan*/ test_vectors();
void self_test() {
  test_vectors();
  test_sequences();
  test_odd_sized_keys();
}


x86 assembly (clang, -O0):
<self_test>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <test_vectors@plt>
mov    $0x0,%al
call   1030 <test_sequences@plt>
mov    $0x0,%al
call   1040 <test_odd_sized_keys@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<self_test>:
push   %rax
xor    %eax,%eax
call   1050 <test_vectors@plt>
xor    %eax,%eax
call   1030 <test_sequences@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <test_odd_sized_keys@plt>

LLVM IR (-O0):
define void @self_test() {
%1 = call i32 (...) @test_vectors()
%2 = call i32 (...) @test_sequences()
%3 = call i32 (...) @test_odd_sized_keys()
ret void
}

LLVM IR (-O2):
define void @self_test() {
%1 = tail call i32 (...) @test_vectors()
%2 = tail call i32 (...) @test_sequences()
%3 = tail call i32 (...) @test_odd_sized_keys()
ret void
}
void OBJ_nid2sn(void) {}


x86 assembly (clang, -O0):
<OBJ_nid2sn>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OBJ_nid2sn>:
ret

LLVM IR (-O0):
define void @OBJ_nid2sn() {
ret void
}

LLVM IR (-O2):
define void @OBJ_nid2sn() {
ret void
}