int s5js100_pmip_control_Ldo6_Tcxo(int enable) {
  if (((((*(volatile unsigned int *)(0x82010000))) & 0xF0) == 0)) {
    (*(volatile unsigned int *)((
         ((volatile unsigned int *)((0x81000000) + 0x0518)))) =
         (((((*(volatile unsigned int *)((
                (volatile unsigned int *)((0x81000000) + 0x0518))))) &
            ~((0x7 << 1))) |
           (((0x1 << 1)) & ((0x7 << 1))))));
  }
  if (enable) {
    (*(volatile unsigned int *)((
         ((volatile unsigned int *)((0x81000000) + 0x0518)))) =
         (((((*(volatile unsigned int *)((
                (volatile unsigned int *)((0x81000000) + 0x0518))))) &
            ~(0x80000001)) |
           ((0x80000001) & (0x80000001)))));
  } else {
    (*(volatile unsigned int *)((
         ((volatile unsigned int *)((0x81000000) + 0x0518)))) =
         (((((*(volatile unsigned int *)((
                (volatile unsigned int *)((0x81000000) + 0x0518))))) &
            ~(0x80000001)) |
           ((0x80000000) & (0x80000001)))));
  }
  return 1;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x82010000,%eax
mov    (%rax),%eax
and    $0xf0,%eax
cmp    $0x0,%eax
jne    1130 <s5js100_pmip_control_Ldo6_Tcxo+0x30>
mov    $0x81000518,%eax
mov    (%rax),%ecx
and    $0xfffffff1,%ecx
or     $0x2,%ecx
mov    $0x81000518,%eax
mov    %ecx,(%rax)
cmpl   $0x0,-0x4(%rbp)
je     1159 <s5js100_pmip_control_Ldo6_Tcxo+0x59>
mov    $0x81000518,%eax
mov    (%rax),%ecx
and    $0x7ffffffe,%ecx
or     $0x80000001,%ecx
mov    $0x81000518,%eax
mov    %ecx,(%rax)
jmp    1173 <s5js100_pmip_control_Ldo6_Tcxo+0x73>
mov    $0x81000518,%eax
mov    (%rax),%ecx
and    $0x7ffffffe,%ecx
or     $0x80000000,%ecx
mov    $0x81000518,%eax
mov    %ecx,(%rax)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    $0x81000518,%eax
testl  $0xf0,0x100fae8(%rax)
jne    111b <s5js100_pmip_control_Ldo6_Tcxo+0x1b>
mov    (%rax),%ecx
and    $0xfffffff1,%ecx
or     $0x2,%ecx
mov    %ecx,(%rax)
mov    (%rax),%ecx
mov    %ecx,%edx
and    $0x7ffffffe,%edx
or     $0x80000000,%edx
or     $0x80000001,%ecx
test   %edi,%edi
cmove  %edx,%ecx
mov    %ecx,(%rax)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @s5js100_pmip_control_Ldo6_Tcxo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load volatile i32, i32* inttoptr (i64 2181103616 to i32*)
%4 = and i32 %3, 240
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load volatile i32, i32* inttoptr (i64 2164262168 to i32*)
%8 = and i32 %7, -15
%9 = or i32 %8, 2
store volatile i32 %9, i32* inttoptr (i64 2164262168 to i32*)
br label %10
10: ; preds = %6, %1
%11 = load i32, i32* %2
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %10
%14 = load volatile i32, i32* inttoptr (i64 2164262168 to i32*)
%15 = and i32 %14, 2147483646
%16 = or i32 %15, -2147483647
store volatile i32 %16, i32* inttoptr (i64 2164262168 to i32*)
br label %21
17: ; preds = %10
%18 = load volatile i32, i32* inttoptr (i64 2164262168 to i32*)
%19 = and i32 %18, 2147483646
%20 = or i32 %19, -2147483648
store volatile i32 %20, i32* inttoptr (i64 2164262168 to i32*)
br label %21
21: ; preds = %17, %13
ret i32 1
}

LLVM IR (-O2):
define i32 @s5js100_pmip_control_Ldo6_Tcxo(i32 %0) {
%2 = load volatile i32, i32* inttoptr (i64 2181103616 to i32*)
%3 = and i32 %2, 240
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load volatile i32, i32* inttoptr (i64 2164262168 to i32*)
%7 = and i32 %6, -15
%8 = or i32 %7, 2
store volatile i32 %8, i32* inttoptr (i64 2164262168 to i32*)
br label %9
9: ; preds = %5, %1
%10 = icmp eq i32 %0, 0
%11 = load volatile i32, i32* inttoptr (i64 2164262168 to i32*)
%12 = and i32 %11, 2147483646
%13 = or i32 %12, -2147483648
%14 = or i32 %11, -2147483647
%15 = select i1 %10, i32 %13, i32 %14
store volatile i32 %15, i32* inttoptr (i64 2164262168 to i32*)
ret i32 1
}