xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int);
void emit_get_var(int type, char *out, int idx) {
  switch (type) {
  case 0:
    sprintf(out, "fp,$%d", -idx);
    break;
  case 1:
    sprintf(out, "sp,$%d", idx);
    break;
  }
}


x86 assembly (clang, -O0):
<emit_get_var>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
test   %eax,%eax
je     1146 <emit_get_var+0x36>
jmp    1135 <emit_get_var+0x25>
mov    -0x18(%rbp),%eax
sub    $0x1,%eax
je     1160 <emit_get_var+0x50>
jmp    1173 <emit_get_var+0x63>
mov    -0x10(%rbp),%rdi
xor    %edx,%edx
sub    -0x14(%rbp),%edx
lea    0xeaa(%rip),%rsi
call   1030 <sprintf@plt>
jmp    1173 <emit_get_var+0x63>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%edx
lea    0xe99(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_get_var>:
cmp    $0x1,%edi
je     1124 <emit_get_var+0x14>
test   %edi,%edi
jne    1136 <emit_get_var+0x26>
neg    %edx
lea    0xede(%rip),%rax
jmp    112b <emit_get_var+0x1b>
lea    0xedc(%rip),%rax
mov    %rsi,%rdi
mov    %rax,%rsi
jmp    1030 <sprintf@plt>
ret

LLVM IR (-O0):
@.str = [7 x i8] c"fp,$%d\00"
@.str.1 = [7 x i8] c"sp,$%d\00"
define void @emit_get_var(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
switch i32 %7, label %17 [
i32 0, label %8
i32 1, label %13
]
8: ; preds = %3
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = sub nsw i32 0, %10
%12 = call i32 @sprintf(i8* %9, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %11)
br label %17
13: ; preds = %3
%14 = load i8*, i8** %5
%15 = load i32, i32* %6
%16 = call i32 @sprintf(i8* %14, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %3, %13, %8
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"fp,$%d\00"
@.str.1 = [7 x i8] c"sp,$%d\00"
define void @emit_get_var(i32 %0, i8* nocapture writeonly %1, i32 %2) {
switch i32 %0, label %9 [
i32 0, label %4
i32 1, label %7
]
4: ; preds = %3
%5 = sub nsw i32 0, %2
%6 = tail call i32 @sprintf(i8* dereferenceable(1) %1, i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %5)
br label %9
7: ; preds = %3
%8 = tail call i32 @sprintf(i8* dereferenceable(1) %1, i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i32 %2)
br label %9
9: ; preds = %3, %7, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void meepmeep() { printf("Meep meep!\n"); }


x86 assembly (clang, -O0):
<meepmeep>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<meepmeep>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"Meep meep!\0A\00"
define void @meepmeep() {
%1 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [11 x i8] c"Meep meep!\00"
define void @meepmeep() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int omp_get_thread_num();
int /*<<< orphan*/ printf(char *, int);
int main() {
#pragma omp parallel num_threads(4)
  { printf("Hello world from thread %d!\n", omp_get_thread_num()); }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <omp_get_thread_num@plt>
mov    %eax,%esi
lea    0xec1(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <omp_get_thread_num@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"Hello world from thread %d!\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @omp_get_thread_num()
%3 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [29 x i8] c"Hello world from thread %d!\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @omp_get_thread_num()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
int test_imm_C4uint16_reg(unsigned short val) {
  return ((val) & (0xC4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C4uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xc4,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C4uint16_reg>:
test   $0xc4,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C4uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 196
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C4uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 196
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ qsort_r(void *, size_t, size_t,
                           int (*)(void const *, void const *, void *), void *);
void sat_sort(void *base, size_t nmemb, size_t size,
              int (*compar)(const void *, const void *, void *),
              void *compard) {
  qsort_r(base, nmemb, size, compar, compard);
}


x86 assembly (clang, -O0):
<sat_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
call   1030 <qsort_r@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sat_sort>:
jmp    1030 <qsort_r@plt>

LLVM IR (-O0):
define void @sat_sort(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*, i8*)* %3, i8* %4) {
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i64
%9 = alloca i32 (i8*, i8*, i8*)*
%10 = alloca i8*
store i8* %0, i8** %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i32 (i8*, i8*, i8*)* %3, i32 (i8*, i8*, i8*)** %9
store i8* %4, i8** %10
%11 = load i8*, i8** %6
%12 = load i64, i64* %7
%13 = load i64, i64* %8
%14 = load i32 (i8*, i8*, i8*)*, i32 (i8*, i8*, i8*)** %9
%15 = load i8*, i8** %10
%16 = call i32 @qsort_r(i8* %11, i64 %12, i64 %13, i32 (i8*, i8*, i8*)* %14, i8* %15)
ret void
}

LLVM IR (-O2):
define void @sat_sort(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*, i8*)* %3, i8* %4) {
%6 = tail call i32 @qsort_r(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*, i8*)* %3, i8* %4)
ret void
}
/* Variables and functions */
void *memchr(const void *s, int c, size_t n) {
  unsigned const char *p = s;
  for (size_t i = 0; i < n; i++) {
    if (p[i] == c)
      return (void *)p + i;
  }
  return NULL;
}


x86 assembly (clang, -O0):
<memchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
movq   $0x0,-0x30(%rbp)
mov    -0x30(%rbp),%rax
cmp    -0x20(%rbp),%rax
jae    1169 <memchr+0x69>
mov    -0x28(%rbp),%rax
mov    -0x30(%rbp),%rcx
movzbl (%rax,%rcx,1),%eax
cmp    -0x14(%rbp),%eax
jne    1153 <memchr+0x53>
mov    -0x28(%rbp),%rax
add    -0x30(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1171 <memchr+0x71>
jmp    1158 <memchr+0x58>
mov    -0x30(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x30(%rbp)
jmp    111f <memchr+0x1f>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memchr>:
test   %rdx,%rdx
je     1121 <memchr+0x21>
mov    %rdi,%rax
nopl   0x0(%rax,%rax,1)
movzbl (%rax),%ecx
cmp    %esi,%ecx
je     1123 <memchr+0x23>
add    $0x1,%rax
add    $0xffffffffffffffff,%rdx
jne    1110 <memchr+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @memchr(i8* %0, i32 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i64
%8 = alloca i8*
%9 = alloca i64
store i8* %0, i8** %5
store i32 %1, i32* %6
store i64 %2, i64* %7
%10 = load i8*, i8** %5
store i8* %10, i8** %8
store i64 0, i64* %9
br label %11
11: ; preds = %28, %3
%12 = load i64, i64* %9
%13 = load i64, i64* %7
%14 = icmp ult i64 %12, %13
br i1 %14, label %15, label %31
15: ; preds = %11
%16 = load i8*, i8** %8
%17 = load i64, i64* %9
%18 = getelementptr inbounds i8, i8* %16, i64 %17
%19 = load i8, i8* %18
%20 = zext i8 %19 to i32
%21 = load i32, i32* %6
%22 = icmp eq i32 %20, %21
br i1 %22, label %23, label %27
23: ; preds = %15
%24 = load i8*, i8** %8
%25 = load i64, i64* %9
%26 = getelementptr i8, i8* %24, i64 %25
store i8* %26, i8** %4
br label %32
27: ; preds = %15
br label %28
28: ; preds = %27
%29 = load i64, i64* %9
%30 = add i64 %29, 1
store i64 %30, i64* %9
br label %11
31: ; preds = %11
store i8* null, i8** %4
br label %32
32: ; preds = %31, %23
%33 = load i8*, i8** %4
ret i8* %33
}

LLVM IR (-O2):
define i8* @memchr(i8* %0, i32 %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %16, label %5
5: ; preds = %3, %11
%6 = phi i64 [ %12, %11 ], [ 0, %3 ]
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
%10 = icmp eq i32 %9, %1
br i1 %10, label %14, label %11
11: ; preds = %5
%12 = add nuw i64 %6, 1
%13 = icmp eq i64 %12, %2
br i1 %13, label %16, label %5
14: ; preds = %5
%15 = getelementptr inbounds i8, i8* %0, i64 %6
br label %16
16: ; preds = %11, %14, %3
%17 = phi i8* [ null, %3 ], [ %15, %14 ], [ null, %11 ]
ret i8* %17
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ _vdo(int, int, char const *, int /*<<< orphan*/);
void vwarnc(int err, const char *fmt, va_list args) { _vdo(err, 1, fmt, args); }


x86 assembly (clang, -O0):
<vwarnc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0x1,%esi
call   1030 <_vdo@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vwarnc>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    $0x1,%esi
jmp    1030 <_vdo@plt>

LLVM IR (-O0):
define void @vwarnc(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @_vdo(i32 %7, i32 1, i8* %8, i32 %9)
ret void
}

LLVM IR (-O2):
define void @vwarnc(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @_vdo(i32 %0, i32 1, i8* %1, i32 %2)
ret void
}
void form_exit(void) {}


x86 assembly (clang, -O0):
<form_exit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<form_exit>:
ret

LLVM IR (-O0):
define void @form_exit() {
ret void
}

LLVM IR (-O2):
define void @form_exit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ noreturn_func();
int main(void) {
  noreturn_func();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <noreturn_func@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <noreturn_func@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @noreturn_func()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @noreturn_func()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_error();
void __automaton_fail(void) {
  {
  ERROR:
    __VERIFIER_error();
    return;
  }
}


x86 assembly (clang, -O0):
<__automaton_fail>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <__automaton_fail+0x9>
mov    $0x0,%al
call   1030 <__VERIFIER_error@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__automaton_fail>:
xor    %eax,%eax
jmp    1030 <__VERIFIER_error@plt>

LLVM IR (-O0):
define void @__automaton_fail() {
br label %1
1: ; preds = %0
%2 = call i32 (...) @__VERIFIER_error()
ret void
}

LLVM IR (-O2):
define void @__automaton_fail() {
%1 = tail call i32 (...) @__VERIFIER_error()
ret void
}
double fmod(x, y)
double x, y;
{
  double quot = x / y;
  return x - (quot < 0.0 ? ceil(quot) : floor(quot)) * y;
}


x86 assembly (clang, -O0):
<fmod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
divsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x18(%rbp),%xmm0
jbe    116d <fmod+0x4d>
movsd  -0x18(%rbp),%xmm0
call   1030 <ceil@plt>
movsd  %xmm0,-0x28(%rbp)
jmp    117c <fmod+0x5c>
movsd  -0x18(%rbp),%xmm0
call   1040 <floor@plt>
movsd  %xmm0,-0x28(%rbp)
movsd  -0x20(%rbp),%xmm1
movsd  -0x28(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmod>:
sub    $0x18,%rsp
movsd  %xmm0,0x10(%rsp)
movsd  %xmm1,0x8(%rsp)
divsd  %xmm1,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm0,%xmm1
jbe    1145 <fmod+0x25>
call   1030 <ceil@plt>
jmp    114a <fmod+0x2a>
call   1040 <floor@plt>
mulsd  0x8(%rsp),%xmm0
movsd  0x10(%rsp),%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @fmod(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %3
%7 = load double, double* %4
%8 = fdiv double %6, %7
store double %8, double* %5
%9 = load double, double* %3
%10 = load double, double* %5
%11 = fcmp olt double %10, 0.000000e+00
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = load double, double* %5
%14 = call double @llvm.ceil.f64(double %13)
br label %18
15: ; preds = %2
%16 = load double, double* %5
%17 = call double @llvm.floor.f64(double %16)
br label %18
18: ; preds = %15, %12
%19 = phi double [ %14, %12 ], [ %17, %15 ]
%20 = load double, double* %4
%21 = fneg double %19
%22 = call double @llvm.fmuladd.f64(double %21, double %20, double %9)
ret double %22
}

LLVM IR (-O2):
define double @fmod(double %0, double %1) {
%3 = fdiv double %0, %1
%4 = fcmp olt double %3, 0.000000e+00
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call double @llvm.ceil.f64(double %3)
br label %9
7: ; preds = %2
%8 = tail call double @llvm.floor.f64(double %3)
br label %9
9: ; preds = %7, %5
%10 = phi double [ %6, %5 ], [ %8, %7 ]
%11 = fneg double %10
%12 = tail call double @llvm.fmuladd.f64(double %11, double %1, double %0)
ret double %12
}
/* Variables and functions */
int /*<<< orphan*/ ab_help(char const *const);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *const);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void ab_missingarg(char const *const arg, char const *const argv0) {
  if (arg == NULL) {
    fputs("Missing argument\r\n", stderr);
  } else {
    fprintf(stderr, "Missing argument for %s\r\n", arg);
  }
  ab_help(argv0);
  return;
}


x86 assembly (clang, -O0):
<ab_missingarg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1165 <ab_missingarg+0x35>
mov    0x2e8e(%rip),%rax
mov    (%rax),%esi
lea    0xea5(%rip),%rdi
call   1030 <fputs@plt>
jmp    117e <ab_missingarg+0x4e>
mov    0x2e74(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xe9a(%rip),%rsi
call   1040 <fprintf@plt>
mov    -0x10(%rbp),%rdi
call   1050 <ab_help@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ab_missingarg>:
push   %rbx
mov    %rsi,%rbx
mov    0x2ea5(%rip),%rax
mov    (%rax),%eax
test   %rdi,%rdi
je     1155 <ab_missingarg+0x25>
mov    %rdi,%rdx
lea    0xec7(%rip),%rsi
mov    %eax,%edi
call   1040 <fprintf@plt>
jmp    1163 <ab_missingarg+0x33>
lea    0xea4(%rip),%rdi
mov    %eax,%esi
call   1030 <fputs@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1050 <ab_help@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"Missing argument\0D\0A\00"
@stderr = global i32 0
@.str.1 = [26 x i8] c"Missing argument for %s\0D\0A\00"
define void @ab_missingarg(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* @stderr
%9 = call i32 @fputs(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %8)
br label %14
10: ; preds = %2
%11 = load i32, i32* @stderr
%12 = load i8*, i8** %3
%13 = call i32 @fprintf(i32 %11, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0), i8* %12)
br label %14
14: ; preds = %10, %7
%15 = load i8*, i8** %4
%16 = call i32 @ab_help(i8* %15)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"Missing argument\0D\0A\00"
@stderr = global i32 0
@.str.1 = [26 x i8] c"Missing argument for %s\0D\0A\00"
define void @ab_missingarg(i8* %0, i8* %1) {
%3 = icmp eq i8* %0, null
%4 = load i32, i32* @stderr
br i1 %3, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @fputs(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %4)
br label %9
7: ; preds = %2
%8 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0), i8* %0)
br label %9
9: ; preds = %7, %5
%10 = tail call i32 @ab_help(i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  printf("hello world!");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"hello world!\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"hello world!\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef scalar_t__ pid_t;

/* Variables and functions */
scalar_t__ fork();
int /*<<< orphan*/ print(char *);
int /*<<< orphan*/ printf(char *);
int main() {
  pid_t pid = fork();
  if (pid == 0)
    print("child");
  else if (pid > 0)
    print("parent");
  else
    printf("Error : fork \n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <fork@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1166 <main+0x36>
lea    0xea4(%rip),%rdi
call   1040 <print@plt>
jmp    1193 <main+0x63>
cmpq   $0x0,-0x10(%rbp)
jle    1182 <main+0x52>
lea    0xe8e(%rip),%rdi
call   1040 <print@plt>
jmp    118e <main+0x5e>
lea    0xe84(%rip),%rdi
call   1030 <printf@plt>
jmp    1193 <main+0x63>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <fork@plt>
test   %rax,%rax
je     114d <main+0x1d>
jle    115b <main+0x2b>
lea    0xec0(%rip),%rdi
call   1040 <print@plt>
jmp    1167 <main+0x37>
lea    0xeac(%rip),%rdi
call   1040 <print@plt>
jmp    1167 <main+0x37>
lea    0xeab(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"child\00"
@.str.1 = [7 x i8] c"parent\00"
@.str.2 = [15 x i8] c"Error : fork \0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
store i32 0, i32* %1
%3 = call i64 (...) @fork()
store i64 %3, i64* %2
%4 = load i64, i64* %2
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @print(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %16
8: ; preds = %0
%9 = load i64, i64* %2
%10 = icmp sgt i64 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %8
%12 = call i32 @print(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
br label %15
13: ; preds = %8
%14 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.2, i64 0, i64 0))
br label %15
15: ; preds = %13, %11
br label %16
16: ; preds = %15, %6
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"child\00"
@.str.1 = [7 x i8] c"parent\00"
@str = [14 x i8] c"Error : fork \00"
define i32 @main() {
%1 = tail call i64 (...) @fork()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @print(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %11
5: ; preds = %0
%6 = icmp sgt i64 %1, 0
br i1 %6, label %7, label %9
7: ; preds = %5
%8 = tail call i32 @print(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
br label %11
9: ; preds = %5
%10 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
br label %11
11: ; preds = %7, %9, %3
ret i32 0
}
int ath9k_hw_ar9300_check_eeprom(struct ath_hw *ah) { return 0; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ath_hw = type opaque
define i32 @ath9k_hw_ar9300_check_eeprom(%struct.ath_hw* %0) {
%2 = alloca %struct.ath_hw*
store %struct.ath_hw* %0, %struct.ath_hw** %2
ret i32 0
}

LLVM IR (-O2):
%struct.ath_hw = type opaque
define i32 @ath9k_hw_ar9300_check_eeprom(%struct.ath_hw* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ AddDIPad();
int /*<<< orphan*/ AddDIStart();
int /*<<< orphan*/ AddPAD();
long AddSource();
signed long McPacket_AddPathSet(void) {
  signed long sdRet = ((signed long)0);
  AddDIPad();
  AddPAD();
  sdRet = AddSource();
  if (sdRet == ((signed long)0)) {
    AddDIStart();
  }
  return sdRet;
}


x86 assembly (clang, -O0):
<McPacket_AddPathSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
mov    $0x0,%al
call   1050 <AddDIPad@plt>
mov    $0x0,%al
call   1040 <AddPAD@plt>
mov    $0x0,%al
call   1060 <AddSource@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    117b <McPacket_AddPathSet+0x3b>
mov    $0x0,%al
call   1030 <AddDIStart@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<McPacket_AddPathSet>:
push   %rbx
xor    %eax,%eax
call   1050 <AddDIPad@plt>
xor    %eax,%eax
call   1040 <AddPAD@plt>
xor    %eax,%eax
call   1060 <AddSource@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1165 <McPacket_AddPathSet+0x25>
xor    %eax,%eax
call   1030 <AddDIStart@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @McPacket_AddPathSet() {
%1 = alloca i64
store i64 0, i64* %1
%2 = call i32 (...) @AddDIPad()
%3 = call i32 (...) @AddPAD()
%4 = call i64 (...) @AddSource()
store i64 %4, i64* %1
%5 = load i64, i64* %1
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i32 (...) @AddDIStart()
br label %9
9: ; preds = %7, %0
%10 = load i64, i64* %1
ret i64 %10
}

LLVM IR (-O2):
define i64 @McPacket_AddPathSet() {
%1 = tail call i32 (...) @AddDIPad()
%2 = tail call i32 (...) @AddPAD()
%3 = tail call i64 (...) @AddSource()
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = tail call i32 (...) @AddDIStart()
br label %7
7: ; preds = %5, %0
ret i64 %3
}
void f147(void) {
  ({
    ({ 0; });
    ({ 0; });
    0;
  });
  ({
    a:
      ({ 0; });
      ({
        goto a;
        0;
      });
      0;
  });
  0;
}


x86 assembly (clang, -O0):
<f147>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
jmp    1119 <f147+0x19>

x86 assembly (clang, -O2):
<f147>:
jmp    1100 <f147>

LLVM IR (-O0):
define void @f147() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 0, i32* %1
%7 = load i32, i32* %1
store i32 0, i32* %2
%8 = load i32, i32* %2
store i32 0, i32* %3
%9 = load i32, i32* %3
br label %10
10: ; preds = %10, %0
store i32 0, i32* %4
%11 = load i32, i32* %4
br label %10
}

LLVM IR (-O2):
define void @f147() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int solcon_dobldobl_one_homogenization(void) {
  int fail, *a, *b;
  double *c;
  fail = _ada_use_c2phc4c(895, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_dobldobl_one_homogenization>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x37f,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_dobldobl_one_homogenization>:
mov    $0x37f,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @solcon_dobldobl_one_homogenization() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca double*
%5 = load i32*, i32** %2
%6 = load i32*, i32** %3
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 895, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %1
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
define i32 @solcon_dobldobl_one_homogenization() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 895, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
void mov_d(double *source, double *target) { *target = *source; }


x86 assembly (clang, -O0):
<mov_d>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mov_d>:
movsd  (%rdi),%xmm0
movsd  %xmm0,(%rsi)
ret

LLVM IR (-O0):
define void @mov_d(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = load double, double* %5
%7 = load double*, double** %4
store double %6, double* %7
ret void
}

LLVM IR (-O2):
define void @mov_d(double* nocapture %0, double* nocapture writeonly %1) {
%3 = load double, double* %0
store double %3, double* %1
ret void
}
int test_imm_A3uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0xA3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A3uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xa3,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A3uint64_lowword_reg>:
test   $0xa3,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A3uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 163
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_A3uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 163
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int __u16;

/* Variables and functions */
int vring_need_event(__u16 event_idx, __u16 new_idx, __u16 old) {
  return (__u16)(new_idx - event_idx - 1) < (__u16)(new_idx - old);
}


x86 assembly (clang, -O0):
<vring_need_event>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    -0x8(%rbp),%ecx
sub    -0xc(%rbp),%ecx
cmp    %ecx,%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vring_need_event>:
not    %edi
add    %esi,%edi
sub    %edx,%esi
xor    %eax,%eax
cmp    %esi,%edi
setl   %al
ret

LLVM IR (-O0):
define i32 @vring_need_event(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = sub nsw i32 %7, %8
%10 = sub nsw i32 %9, 1
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = sub nsw i32 %11, %12
%14 = icmp slt i32 %10, %13
%15 = zext i1 %14 to i32
ret i32 %15
}

LLVM IR (-O2):
define i32 @vring_need_event(i32 %0, i32 %1, i32 %2) {
%4 = xor i32 %0, -1
%5 = add i32 %4, %1
%6 = sub nsw i32 %1, %2
%7 = icmp slt i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char *);
int /*<<< orphan*/ write(int, char *, int /*<<< orphan*/);
strput(char *s) {
  if (s)
    write(1, s, strlen(s));
}


x86 assembly (clang, -O0):
<strput>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1158 <strput+0x38>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
mov    $0x1,%edi
call   1030 <write@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strput>:
test   %rdi,%rdi
je     113e <strput+0x1e>
push   %rbx
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    $0x1,%edi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <write@plt>
pop    %rbx
ret

LLVM IR (-O0):
define i32 @strput(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i8*, i8** %3
%8 = load i8*, i8** %3
%9 = call i32 @strlen(i8* %8)
%10 = call i32 @write(i32 1, i8* %7, i32 %9)
br label %11
11: ; preds = %6, %1
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @strput(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i32 @strlen(i8* %0)
%5 = tail call i32 @write(i32 1, i8* %0, i32 %4)
br label %6
6: ; preds = %3, %1
ret i32 undef
}
/* Variables and functions */
int floor(int);
int Calc_Taxable_Amount(int AssessedValueCents) {
  int TaxableAmtCents;
  TaxableAmtCents = floor((AssessedValueCents * (92.0 / 100)) + 0.5);
  return TaxableAmtCents;
}


x86 assembly (clang, -O0):
<Calc_Taxable_Amount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
movsd  0xed8(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xed4(%rip),%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <floor@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Calc_Taxable_Amount>:
cvtsi2sd %edi,%xmm0
mulsd  0xee4(%rip),%xmm0
addsd  0xee4(%rip),%xmm0
cvttsd2si %xmm0,%edi
jmp    1030 <floor@plt>

LLVM IR (-O0):
define i32 @Calc_Taxable_Amount(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sitofp i32 %4 to double
%6 = call double @llvm.fmuladd.f64(double %5, double 9.200000e-01, double 5.000000e-01)
%7 = fptosi double %6 to i32
%8 = call i32 @floor(i32 %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @Calc_Taxable_Amount(i32 %0) {
%2 = sitofp i32 %0 to double
%3 = tail call double @llvm.fmuladd.f64(double %2, double 9.200000e-01, double 5.000000e-01)
%4 = fptosi double %3 to i32
%5 = tail call i32 @floor(i32 %4)
ret i32 %5
}
unsigned int _next_pow2(unsigned int num) {
  unsigned int n = 1;
  num++;
  while (n < num)
    n <<= 1;
  return n;
}


x86 assembly (clang, -O0):
<_next_pow2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jae    1131 <_next_pow2+0x31>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1117 <_next_pow2+0x17>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_next_pow2>:
add    $0x1,%edi
mov    $0x1,%ecx
nopl   0x0(%rax,%rax,1)
mov    %ecx,%eax
lea    (%rax,%rax,1),%ecx
cmp    %edi,%eax
jb     1110 <_next_pow2+0x10>
ret

LLVM IR (-O0):
define i32 @_next_pow2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
%4 = load i32, i32* %2
%5 = add i32 %4, 1
store i32 %5, i32* %2
br label %6
6: ; preds = %10, %1
%7 = load i32, i32* %3
%8 = load i32, i32* %2
%9 = icmp ult i32 %7, %8
br i1 %9, label %10, label %13
10: ; preds = %6
%11 = load i32, i32* %3
%12 = shl i32 %11, 1
store i32 %12, i32* %3
br label %6
13: ; preds = %6
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @_next_pow2(i32 %0) {
%2 = add i32 %0, 1
br label %3
3: ; preds = %3, %1
%4 = phi i32 [ 1, %1 ], [ %6, %3 ]
%5 = icmp ult i32 %4, %2
%6 = shl i32 %4, 1
br i1 %5, label %3, label %7
7: ; preds = %3
ret i32 %4
}
void Sys_LaunchAutoupdater(int argc, char **argv) {
  (void)argc;
  (void)argv;
}


x86 assembly (clang, -O0):
<Sys_LaunchAutoupdater>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sys_LaunchAutoupdater>:
ret

LLVM IR (-O0):
define void @Sys_LaunchAutoupdater(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i8**, i8*** %4
ret void
}

LLVM IR (-O2):
define void @Sys_LaunchAutoupdater(i32 %0, i8** nocapture %1) {
ret void
}
void foo(void) {
  unsigned int a;
  unsigned int b;
  unsigned int c;
#pragma acc kernels pcopyout(a, b, c)
  {
    a = 0;
    b = 1;
    c = a;
  }
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
%4 = load i32, i32* %1
store i32 %4, i32* %3
ret void
}

LLVM IR (-O2):
define void @foo() {
ret void
}
void kolibri_partial_redraw(struct gui_window *g, const struct rect *rect) {}


x86 assembly (clang, -O0):
<kolibri_partial_redraw>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<kolibri_partial_redraw>:
ret

LLVM IR (-O0):
%struct.gui_window = type opaque
%struct.rect = type opaque
define void @kolibri_partial_redraw(%struct.gui_window* %0, %struct.rect* %1) {
%3 = alloca %struct.gui_window*
%4 = alloca %struct.rect*
store %struct.gui_window* %0, %struct.gui_window** %3
store %struct.rect* %1, %struct.rect** %4
ret void
}

LLVM IR (-O2):
%struct.gui_window = type opaque
%struct.rect = type opaque
define void @kolibri_partial_redraw(%struct.gui_window* nocapture %0, %struct.rect* nocapture %1) {
ret void
}
void fc254(int n) {
  {
    typedef int(*b)[n];
    {
      typedef int(*c)[n];
      0;
    }
    {
      typedef int(*d)[n];
      0;
    };
    typedef int(*e)[n];
    0;
  };
  {
    typedef int(*f)[n];
    {
      typedef int(*g)[n];
      0;
    };
    {
      typedef int(*h)[n];
      0;
    };
    ;
    typedef int(*i)[n];
    0;
  };
a:
  goto a;
  ;
  typedef int(*j)[n];
  0;
}


x86 assembly (clang, -O0):
<fc254>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fc254+0x7>

x86 assembly (clang, -O2):
<fc254>:
jmp    1100 <fc254>

LLVM IR (-O0):
define void @fc254(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
%7 = load i32, i32* %2
%8 = zext i32 %7 to i64
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
%11 = load i32, i32* %2
%12 = zext i32 %11 to i64
%13 = load i32, i32* %2
%14 = zext i32 %13 to i64
%15 = load i32, i32* %2
%16 = zext i32 %15 to i64
%17 = load i32, i32* %2
%18 = zext i32 %17 to i64
br label %19
19: ; preds = %19, %1
br label %19
20: ; No predecessors!
%21 = load i32, i32* %2
%22 = zext i32 %21 to i64
ret void
}

LLVM IR (-O2):
define void @fc254(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
void handle_46(int sig) {}


x86 assembly (clang, -O0):
<handle_46>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_46>:
ret

LLVM IR (-O0):
define void @handle_46(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @handle_46(i32 %0) {
ret void
}
void f2() {
  char *p = "/usr/local";
  char(*q)[4];
  q = &"abc";
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xef5(%rip),%rax
mov    %rax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
ret

LLVM IR (-O0):
@.str = [11 x i8] c"/usr/local\00"
@.str.1 = [4 x i8] c"abc\00"
define void @f2() {
%1 = alloca i8*
%2 = alloca [4 x i8]*
store i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8** %1
store [4 x i8]* @.str.1, [4 x i8]** %2
ret void
}

LLVM IR (-O2):
define void @f2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ vga_set_cursor(int /*<<< orphan*/, int /*<<< orphan*/);
void vga_cursor_reset() { vga_set_cursor(0, 0); }


x86 assembly (clang, -O0):
<vga_cursor_reset>:
push   %rbp
mov    %rsp,%rbp
xor    %esi,%esi
mov    %esi,%edi
call   1030 <vga_set_cursor@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vga_cursor_reset>:
xor    %edi,%edi
xor    %esi,%esi
jmp    1030 <vga_set_cursor@plt>

LLVM IR (-O0):
define void @vga_cursor_reset() {
%1 = call i32 @vga_set_cursor(i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @vga_cursor_reset() {
%1 = tail call i32 @vga_set_cursor(i32 0, i32 0)
ret void
}
void compo_colorize(struct compo_pipeline *pipeline, struct fbo *target) {}


x86 assembly (clang, -O0):
<compo_colorize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<compo_colorize>:
ret

LLVM IR (-O0):
%struct.compo_pipeline = type opaque
%struct.fbo = type opaque
define void @compo_colorize(%struct.compo_pipeline* %0, %struct.fbo* %1) {
%3 = alloca %struct.compo_pipeline*
%4 = alloca %struct.fbo*
store %struct.compo_pipeline* %0, %struct.compo_pipeline** %3
store %struct.fbo* %1, %struct.fbo** %4
ret void
}

LLVM IR (-O2):
%struct.compo_pipeline = type opaque
%struct.fbo = type opaque
define void @compo_colorize(%struct.compo_pipeline* nocapture %0, %struct.fbo* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cortexm_init();
int /*<<< orphan*/ periph_init();
void cpu_init(void) {
  cortexm_init();
  periph_init();
}


x86 assembly (clang, -O0):
<cpu_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <cortexm_init@plt>
mov    $0x0,%al
call   1030 <periph_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_init>:
push   %rax
xor    %eax,%eax
call   1040 <cortexm_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <periph_init@plt>

LLVM IR (-O0):
define void @cpu_init() {
%1 = call i32 (...) @cortexm_init()
%2 = call i32 (...) @periph_init()
ret void
}

LLVM IR (-O2):
define void @cpu_init() {
%1 = tail call i32 (...) @cortexm_init()
%2 = tail call i32 (...) @periph_init()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_spinlock_t;

/* Variables and functions */
int /*<<< orphan*/ pthread_spin_lock(int /*<<< orphan*/ *);
void spinlock_double_lock_bad(pthread_spinlock_t *m) {
  pthread_spin_lock(m);
  pthread_spin_lock(m);
}


x86 assembly (clang, -O0):
<spinlock_double_lock_bad>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pthread_spin_lock@plt>
mov    -0x8(%rbp),%rdi
call   1030 <pthread_spin_lock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spinlock_double_lock_bad>:
push   %rbx
mov    %rdi,%rbx
call   1030 <pthread_spin_lock@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <pthread_spin_lock@plt>

LLVM IR (-O0):
define void @spinlock_double_lock_bad(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @pthread_spin_lock(i32* %3)
%5 = load i32*, i32** %2
%6 = call i32 @pthread_spin_lock(i32* %5)
ret void
}

LLVM IR (-O2):
define void @spinlock_double_lock_bad(i32* %0) {
%2 = tail call i32 @pthread_spin_lock(i32* %0)
%3 = tail call i32 @pthread_spin_lock(i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void usage(const char *s) {
  fprintf(stderr, "Usage:%s number1 op( + - * /) number2.\n", s);
  exit(-1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [40 x i8] c"Usage:%s number1 op( + - * /) number2.\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [40 x i8] c"Usage:%s number1 op( + - * /) number2.\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 -1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0xca() {
  Assert_real((isupper(202) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              1015, ("isupper should be 0 for 0xca"));
}


x86 assembly (clang, -O0):
<t_isupper_0xca>:
push   %rbp
mov    %rsp,%rbp
mov    $0xca,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3f7,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0xca>:
push   %rax
mov    $0xca,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3f7,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0xca\00"
define void @t_isupper_0xca() {
%1 = call i64 @isupper(i32 202)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1015, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0xca\00"
define void @t_isupper_0xca() {
%1 = tail call i64 @isupper(i32 202)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1015, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void XSyncValueLessOrEqual() {}


x86 assembly (clang, -O0):
<XSyncValueLessOrEqual>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XSyncValueLessOrEqual>:
ret

LLVM IR (-O0):
define void @XSyncValueLessOrEqual() {
ret void
}

LLVM IR (-O2):
define void @XSyncValueLessOrEqual() {
ret void
}
/* Type definitions */
struct sockaddr_storage {
  int dummy;
};
struct sockaddr {
  int dummy;
};
typedef int socklen_t;

/* Variables and functions */
int getpeername(int, struct sockaddr *, int *);
int socket_address(int sock, struct sockaddr_storage *address) {
  socklen_t addr_size;
  addr_size = sizeof(struct sockaddr_storage);
  return (getpeername(sock, (struct sockaddr *)address, &addr_size));
}


x86 assembly (clang, -O0):
<socket_address>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x4,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
lea    -0x14(%rbp),%rdx
call   1030 <getpeername@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<socket_address>:
push   %rax
movl   $0x4,0x4(%rsp)
lea    0x4(%rsp),%rdx
call   1030 <getpeername@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.sockaddr_storage = type { i32 }
%struct.sockaddr = type { i32 }
define i32 @socket_address(i32 %0, %struct.sockaddr_storage* %1) {
%3 = alloca i32
%4 = alloca %struct.sockaddr_storage*
%5 = alloca i32
store i32 %0, i32* %3
store %struct.sockaddr_storage* %1, %struct.sockaddr_storage** %4
store i32 4, i32* %5
%6 = load i32, i32* %3
%7 = load %struct.sockaddr_storage*, %struct.sockaddr_storage** %4
%8 = bitcast %struct.sockaddr_storage* %7 to %struct.sockaddr*
%9 = call i32 @getpeername(i32 %6, %struct.sockaddr* %8, i32* %5)
ret i32 %9
}

LLVM IR (-O2):
%struct.sockaddr_storage = type { i32 }
%struct.sockaddr = type { i32 }
define i32 @socket_address(i32 %0, %struct.sockaddr_storage* %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
store i32 4, i32* %3
%5 = bitcast %struct.sockaddr_storage* %1 to %struct.sockaddr*
%6 = call i32 @getpeername(i32 %0, %struct.sockaddr* %5, i32* %3)
ret i32 %6
}
int main(void) {
  int a = 10;
  int b = 20;
  return a + b;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
movl   $0x14,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1e,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 10, i32* %2
store i32 20, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = add nsw i32 %4, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @main() {
ret i32 30
}
unsigned short unsignedshort_id(unsigned short x) { return x; }


x86 assembly (clang, -O0):
<unsignedshort_id>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsignedshort_id>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @unsignedshort_id(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
ret i16 %3
}

LLVM IR (-O2):
define zeroext i16 @unsignedshort_id(i16 returned zeroext %0) {
ret i16 %0
}
/* Type definitions */
struct compat_semaphore {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ compat_down(struct compat_semaphore *);
void down(struct compat_semaphore *sem) { compat_down(sem); }


x86 assembly (clang, -O0):
<down>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <compat_down@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<down>:
jmp    1030 <compat_down@plt>

LLVM IR (-O0):
%struct.compat_semaphore = type { i32 }
define void @down(%struct.compat_semaphore* %0) {
%2 = alloca %struct.compat_semaphore*
store %struct.compat_semaphore* %0, %struct.compat_semaphore** %2
%3 = load %struct.compat_semaphore*, %struct.compat_semaphore** %2
%4 = call i32 @compat_down(%struct.compat_semaphore* %3)
ret void
}

LLVM IR (-O2):
%struct.compat_semaphore = type { i32 }
define void @down(%struct.compat_semaphore* %0) {
%2 = tail call i32 @compat_down(%struct.compat_semaphore* %0)
ret void
}