xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_assert(int);
int main() {
  int i;
  for (i = 0; i != 1000000; i++) {
    __VERIFIER_assert(i <= 1000000);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xf4240,-0x8(%rbp)
je     1155 <main+0x45>
cmpl   $0xf4240,-0x8(%rbp)
setle  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__VERIFIER_assert@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0xf4240,%ebx
cs nopw 0x0(%rax,%rax,1)
mov    $0x1,%edi
call   1030 <__VERIFIER_assert@plt>
add    $0xffffffff,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %11, %0
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 1000000
br i1 %5, label %6, label %14
6: ; preds = %3
%7 = load i32, i32* %2
%8 = icmp sle i32 %7, 1000000
%9 = zext i1 %8 to i32
%10 = call i32 @__VERIFIER_assert(i32 %9)
br label %11
11: ; preds = %6
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 1
store i32 %13, i32* %2
br label %3
14: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @__VERIFIER_assert(i32 1)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 1000000
br i1 %5, label %6, label %1
6: ; preds = %1
ret i32 0
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int x;
  int y;
  x = __VERIFIER_nondet_int();
  y = __VERIFIER_nondet_int();
  if (y > x) {
    while (x >= 0) {
      x = x - y;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1161 <main+0x51>
jmp    1144 <main+0x34>
cmpl   $0x0,-0x8(%rbp)
jl     115c <main+0x4c>
mov    -0x8(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1144 <main+0x34>
jmp    1161 <main+0x51>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
test   %ebx,%ebx
js     1134 <main+0x24>
cmp    %ebx,%eax
jle    1134 <main+0x24>
nopl   0x0(%rax)
sub    %eax,%ebx
jns    1130 <main+0x20>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %4, i32* %2
%5 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %18
9: ; preds = %0
br label %10
10: ; preds = %13, %9
%11 = load i32, i32* %2
%12 = icmp sge i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %10
%14 = load i32, i32* %2
%15 = load i32, i32* %3
%16 = sub nsw i32 %14, %15
store i32 %16, i32* %2
br label %10
17: ; preds = %10
br label %18
18: ; preds = %17, %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 (...) @__VERIFIER_nondet_int()
%3 = icmp sgt i32 %2, %1
%4 = icmp sgt i32 %1, -1
%5 = and i1 %4, %3
br i1 %5, label %6, label %10
6: ; preds = %0, %6
%7 = phi i32 [ %8, %6 ], [ %1, %0 ]
%8 = sub nsw i32 %7, %2
%9 = icmp sgt i32 %8, -1
br i1 %9, label %6, label %10
10: ; preds = %6, %0
ret i32 0
}
void S_flush(void) {}


x86 assembly (clang, -O0):
<S_flush>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<S_flush>:
ret

LLVM IR (-O0):
define void @S_flush() {
ret void
}

LLVM IR (-O2):
define void @S_flush() {
ret void
}
int do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) {
  struct iwreq *wrq = (struct iwreq *)ifr;
  int err = 0;
  switch (cmd) {}
  return (err);
}


x86 assembly (clang, -O0):
<do_ioctl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
movl   $0x0,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_ioctl>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.net_device = type opaque
%struct.ifreq = type opaque
%struct.iwreq = type opaque
define i32 @do_ioctl(%struct.net_device* %0, %struct.ifreq* %1, i32 %2) {
%4 = alloca %struct.net_device*
%5 = alloca %struct.ifreq*
%6 = alloca i32
%7 = alloca %struct.iwreq*
%8 = alloca i32
store %struct.net_device* %0, %struct.net_device** %4
store %struct.ifreq* %1, %struct.ifreq** %5
store i32 %2, i32* %6
%9 = load %struct.ifreq*, %struct.ifreq** %5
%10 = bitcast %struct.ifreq* %9 to %struct.iwreq*
store %struct.iwreq* %10, %struct.iwreq** %7
store i32 0, i32* %8
%11 = load i32, i32* %6
switch i32 %11, label %12 [
]
12: ; preds = %3
%13 = load i32, i32* %8
ret i32 %13
}

LLVM IR (-O2):
%struct.net_device = type opaque
%struct.ifreq = type opaque
define i32 @do_ioctl(%struct.net_device* nocapture readnone %0, %struct.ifreq* nocapture readnone %1, i32 %2) {
ret i32 0
}
unsigned short CRC_Value(unsigned short crcvalue) { return crcvalue ^ 0x0000; }


x86 assembly (clang, -O0):
<CRC_Value>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
xor    $0x0,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CRC_Value>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @CRC_Value(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = xor i32 %4, 0
%6 = trunc i32 %5 to i16
ret i16 %6
}

LLVM IR (-O2):
define zeroext i16 @CRC_Value(i16 returned zeroext %0) {
ret i16 %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void main_fini2() {
  printf("main_fini2"
         "\n");
}


x86 assembly (clang, -O0):
<main_fini2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main_fini2>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"main_fini2\0A\00"
define void @main_fini2() {
%1 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [11 x i8] c"main_fini2\00"
define void @main_fini2() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_sys_cfg_beacon_period_usage(void) {
  printf("\nUsage : sys_cfg_beacon_period [BEACON_PERIOD]\n");
  printf("\nIf BEACON_PERIOD is provided, a 'set' is performed, else a 'get' "
         "is performed.\n");
  return;
}


x86 assembly (clang, -O0):
<print_sys_cfg_beacon_period_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf09(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_sys_cfg_beacon_period_usage>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf0b(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [48 x i8] c"\0AUsage : sys_cfg_beacon_period [BEACON_PERIOD]\0A\00"
@.str.1 = [81 x i8] c"\0AIf BEACON_PERIOD is provided, a 'set' is performed, else a 'get' is performed.\0A\00"
define void @print_sys_cfg_beacon_period_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([81 x i8], [81 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [47 x i8] c"\0AUsage : sys_cfg_beacon_period [BEACON_PERIOD]\00"
@str.2 = [80 x i8] c"\0AIf BEACON_PERIOD is provided, a 'set' is performed, else a 'get' is performed.\00"
define void @print_sys_cfg_beacon_period_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([47 x i8], [47 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([80 x i8], [80 x i8]* @str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ freeMatrices();
int /*<<< orphan*/ printf(char *);
int errorQuit(void) {
  freeMatrices();
  printf("\n\nSpeicherprobleme !\n");
  exit(1);
}


x86 assembly (clang, -O0):
<errorQuit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <freeMatrices@plt>
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<errorQuit>:
push   %rax
xor    %eax,%eax
call   1040 <freeMatrices@plt>
lea    0xec1(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"\0A\0ASpeicherprobleme !\0A\00"
define i32 @errorQuit() {
%1 = call i32 (...) @freeMatrices()
%2 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@str = [21 x i8] c"\0A\0ASpeicherprobleme !\00"
define i32 @errorQuit() {
%1 = tail call i32 (...) @freeMatrices()
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
int print(ptr)
char *ptr;
{
  while (*ptr)
    outbyte(*ptr++);
}


x86 assembly (clang, -O0):
<print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1147 <print+0x37>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%edi
mov    $0x0,%al
call   1030 <outbyte@plt>
jmp    111c <print+0xc>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1135 <print+0x25>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
xor    %eax,%eax
call   1030 <outbyte@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <print+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define i32 @print(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %4
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %3
%11 = load i8, i8* %9
%12 = sext i8 %11 to i32
%13 = call i32 (i32, ...) bitcast (i32 (...)* @outbyte to i32 (i32, ...)*)(i32 %12)
br label %4
14: ; preds = %4
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @print(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %10, %4 ], [ %2, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = sext i8 %5 to i32
%9 = tail call i32 (i32, ...) bitcast (i32 (...)* @outbyte to i32 (i32, ...)*)(i32 %8)
%10 = load i8, i8* %7
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ glWindowPos4f(short const, short const, short const, int);
void glWindowPos3sv(const short v[3]) { glWindowPos4f(v[0], v[1], v[2], 1); }


x86 assembly (clang, -O0):
<glWindowPos3sv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%si
mov    -0x8(%rbp),%rax
mov    0x2(%rax),%dx
mov    -0x8(%rbp),%rax
mov    $0x1,%ecx
movswl %si,%edi
movswl %dx,%esi
movswl 0x4(%rax),%edx
call   1030 <glWindowPos4f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glWindowPos3sv>:
movswl (%rdi),%eax
movswl 0x2(%rdi),%esi
movswl 0x4(%rdi),%edx
mov    %eax,%edi
mov    $0x1,%ecx
jmp    1030 <glWindowPos4f@plt>

LLVM IR (-O0):
define void @glWindowPos3sv(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = getelementptr inbounds i16, i16* %3, i64 0
%5 = load i16, i16* %4
%6 = load i16*, i16** %2
%7 = getelementptr inbounds i16, i16* %6, i64 1
%8 = load i16, i16* %7
%9 = load i16*, i16** %2
%10 = getelementptr inbounds i16, i16* %9, i64 2
%11 = load i16, i16* %10
%12 = call i32 @glWindowPos4f(i16 signext %5, i16 signext %8, i16 signext %11, i32 1)
ret void
}

LLVM IR (-O2):
define void @glWindowPos3sv(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = getelementptr inbounds i16, i16* %0, i64 1
%4 = load i16, i16* %3
%5 = getelementptr inbounds i16, i16* %0, i64 2
%6 = load i16, i16* %5
%7 = tail call i32 @glWindowPos4f(i16 signext %2, i16 signext %4, i16 signext %6, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ inetConnect();
int main() {
  inetConnect();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <inetConnect@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <inetConnect@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @inetConnect()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @inetConnect()
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
void set_timezone(int32_t tz) {}


x86 assembly (clang, -O0):
<set_timezone>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_timezone>:
ret

LLVM IR (-O0):
define void @set_timezone(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @set_timezone(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
int *malloc(size_t);
int /*<<< orphan*/ merge_sort_bottom_up_internal(int *, int *, size_t);
void merge_sort_bottom_up(int array[], size_t length) {
  if (length == 0) {
    return;
  }
  int *temp = malloc(length * sizeof(int));
  merge_sort_bottom_up_internal(array, temp, length);
  free(temp);
}


x86 assembly (clang, -O0):
<merge_sort_bottom_up>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <merge_sort_bottom_up+0x20>
jmp    117b <merge_sort_bottom_up+0x4b>
mov    -0x10(%rbp),%rdi
shl    $0x2,%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1050 <merge_sort_bottom_up_internal@plt>
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<merge_sort_bottom_up>:
test   %rsi,%rsi
je     116b <merge_sort_bottom_up+0x3b>
push   %r15
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%r14
lea    0x0(,%rsi,4),%rdi
call   1040 <malloc@plt>
mov    %rax,%r15
mov    %r14,%rdi
mov    %rax,%rsi
mov    %rbx,%rdx
call   1050 <merge_sort_bottom_up_internal@plt>
mov    %r15,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @merge_sort_bottom_up(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = alloca i32*
store i32* %0, i32** %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
br label %19
9: ; preds = %2
%10 = load i64, i64* %4
%11 = mul i64 %10, 4
%12 = call i32* @malloc(i64 %11)
store i32* %12, i32** %5
%13 = load i32*, i32** %3
%14 = load i32*, i32** %5
%15 = load i64, i64* %4
%16 = call i32 @merge_sort_bottom_up_internal(i32* %13, i32* %14, i64 %15)
%17 = load i32*, i32** %5
%18 = call i32 @free(i32* %17)
br label %19
19: ; preds = %9, %8
ret void
}

LLVM IR (-O2):
define void @merge_sort_bottom_up(i32* %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = shl i64 %1, 2
%6 = tail call i32* @malloc(i64 %5)
%7 = tail call i32 @merge_sort_bottom_up_internal(i32* %0, i32* %6, i64 %1)
%8 = tail call i32 @free(i32* %6)
br label %9
9: ; preds = %2, %4
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long serial;
};
typedef TYPE_1__ XKeyEvent;

/* Variables and functions */
void set_XKeyEvent_serial(void *_p, unsigned long _v) {
  ((XKeyEvent *)_p)->serial = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XKeyEvent_serial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XKeyEvent_serial>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define void @set_XKeyEvent_serial(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @set_XKeyEvent_serial(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Variables and functions */
scalar_t__ isPrime(int);
int getNextPrime(int startSearch) {
  int i;
  for (i = startSearch; i < startSearch * 2; ++i) {
    if (isPrime(i))
      return i;
  }
  return -1;
}


x86 assembly (clang, -O0):
<getNextPrime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    $0x1,%ecx
cmp    %ecx,%eax
jge    1162 <getNextPrime+0x52>
mov    -0xc(%rbp),%edi
call   1030 <isPrime@plt>
cmp    $0x0,%rax
je     114f <getNextPrime+0x3f>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1169 <getNextPrime+0x59>
jmp    1154 <getNextPrime+0x44>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1121 <getNextPrime+0x11>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getNextPrime>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%r14d
lea    (%r14,%r14,1),%eax
cmp    %edi,%eax
jle    1148 <getNextPrime+0x38>
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
lea    (%r14,%rbx,1),%ebp
mov    %ebp,%edi
call   1030 <isPrime@plt>
test   %rax,%rax
jne    114d <getNextPrime+0x3d>
add    $0x1,%ebx
cmp    %ebx,%r14d
jne    1130 <getNextPrime+0x20>
mov    $0xffffffff,%ebp
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @getNextPrime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
store i32 %5, i32* %4
br label %6
6: ; preds = %18, %1
%7 = load i32, i32* %4
%8 = load i32, i32* %3
%9 = mul nsw i32 %8, 2
%10 = icmp slt i32 %7, %9
br i1 %10, label %11, label %21
11: ; preds = %6
%12 = load i32, i32* %4
%13 = call i64 @isPrime(i32 %12)
%14 = icmp ne i64 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = load i32, i32* %4
store i32 %16, i32* %2
br label %22
17: ; preds = %11
br label %18
18: ; preds = %17
%19 = load i32, i32* %4
%20 = add nsw i32 %19, 1
store i32 %20, i32* %4
br label %6
21: ; preds = %6
store i32 -1, i32* %2
br label %22
22: ; preds = %21, %15
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @getNextPrime(i32 %0) {
%2 = shl i32 %0, 1
%3 = icmp sgt i32 %2, %0
br i1 %3, label %4, label %11
4: ; preds = %1, %8
%5 = phi i32 [ %9, %8 ], [ %0, %1 ]
%6 = tail call i64 @isPrime(i32 %5)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = add nsw i32 %5, 1
%10 = icmp eq i32 %9, %2
br i1 %10, label %11, label %4
11: ; preds = %4, %8, %1
%12 = phi i32 [ -1, %1 ], [ -1, %8 ], [ %5, %4 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ usb_drumkit_close();
void cleanup() { usb_drumkit_close(); }


x86 assembly (clang, -O0):
<cleanup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <usb_drumkit_close@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cleanup>:
xor    %eax,%eax
jmp    1030 <usb_drumkit_close@plt>

LLVM IR (-O0):
define void @cleanup() {
%1 = call i32 (...) @usb_drumkit_close()
ret void
}

LLVM IR (-O2):
define void @cleanup() {
%1 = tail call i32 (...) @usb_drumkit_close()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int __attribute__((no)) do_test(void) {
  long double d = .0L;
  int i;
#pragma omp parallel for shared(d)
  for (i = 0; i < 10; i++)
#pragma omp atomic
    d += 1.0L;
  if (d != 10.0L)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<do_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldz
fstpt  -0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0xa,-0x14(%rbp)
jge    1146 <do_test+0x36>
fldt   -0x10(%rbp)
fld1
faddp  %st,%st(1)
fstpt  -0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1124 <do_test+0x14>
fldt   -0x10(%rbp)
flds   0xeb1(%rip)
fxch   %st(1)
fucomip %st(1),%st
fstp   %st(0)
jne    1166 <do_test+0x56>
jp     1166 <do_test+0x56>
jmp    116d <do_test+0x5d>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_test>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @do_test() {
%1 = alloca x86_fp80
%2 = alloca i32
store x86_fp80 0xK00000000000000000000, x86_fp80* %1
store i32 0, i32* %2
br label %3
3: ; preds = %9, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = load x86_fp80, x86_fp80* %1
%8 = fadd x86_fp80 %7, 0xK3FFF8000000000000000
store x86_fp80 %8, x86_fp80* %1
br label %9
9: ; preds = %6
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
br label %3
12: ; preds = %3
%13 = load x86_fp80, x86_fp80* %1
%14 = fcmp une x86_fp80 %13, 0xK4002A000000000000000
br i1 %14, label %15, label %17
15: ; preds = %12
%16 = call i32 (...) @abort()
unreachable
17: ; preds = %12
ret i32 0
}

LLVM IR (-O2):
define i32 @do_test() {
ret i32 0
}
int close(int fd) {
  int int_num = 4;
  int tmp;
  __asm__("int $0x80" : "=a"(tmp) : "a"(int_num), "b"(fd));
  return tmp;
}


x86 assembly (clang, -O0):
<close>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
movl   $0x4,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    -0xc(%rbp),%ebx
int    $0x80
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<close>:
push   %rbx
mov    %edi,%ebx
mov    $0x4,%eax
int    $0x80
pop    %rbx
ret

LLVM IR (-O0):
define i32 @close(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 4, i32* %3
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = call i32 asm "int $$0x80", "={ax},{ax},{bx},~{dirflag},~{fpsr},~{flags}"(i32 %5, i32 %6)
store i32 %7, i32* %4
%8 = load i32, i32* %4
ret i32 %8
}

LLVM IR (-O2):
define i32 @close(i32 %0) {
%2 = tail call i32 asm "int $$0x80", "={ax},{ax},{bx},~{dirflag},~{fpsr},~{flags}"(i32 4, i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isxdigit(int);
void t_isxdigit_0x23() {
  Assert_real((isxdigit(35) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              180, ("isxdigit should be 0 for #"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0x23>:
push   %rbp
mov    %rsp,%rbp
mov    $0x23,%edi
call   1030 <isxdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xb4,%edx
lea    0xf5c(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0x23>:
push   %rax
mov    $0x23,%edi
call   1030 <isxdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0xb4,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [27 x i8] c"isxdigit should be 0 for #\00"
define void @t_isxdigit_0x23() {
%1 = call i64 @isxdigit(i32 35)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 180, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [27 x i8] c"isxdigit should be 0 for #\00"
define void @t_isxdigit_0x23() {
%1 = tail call i64 @isxdigit(i32 35)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 180, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, unsigned int);
void printResult(int i, unsigned int num, unsigned int isSet) {
  if (isSet == 0) {
    printf("Bit %d is NOT set (0x%x)\n", i, num);
  } else {
    printf("Bit %d is set (0x%x)\n", i, num);
  }
}


x86 assembly (clang, -O0):
<printResult>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1142 <printResult+0x32>
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
jmp    1154 <printResult+0x44>
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printResult>:
mov    %esi,%eax
mov    %edi,%esi
test   %edx,%edx
lea    0xee3(%rip),%rcx
lea    0xef6(%rip),%rdi
cmove  %rcx,%rdi
mov    %eax,%edx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [26 x i8] c"Bit %d is NOT set (0x%x)\0A\00"
@.str.1 = [22 x i8] c"Bit %d is set (0x%x)\0A\00"
define void @printResult(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 %10, i32 %11)
br label %17
13: ; preds = %3
%14 = load i32, i32* %4
%15 = load i32, i32* %5
%16 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i32 %14, i32 %15)
br label %17
17: ; preds = %13, %9
ret void
}

LLVM IR (-O2):
@.str = [26 x i8] c"Bit %d is NOT set (0x%x)\0A\00"
@.str.1 = [22 x i8] c"Bit %d is set (0x%x)\0A\00"
define void @printResult(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %2, 0
%5 = select i1 %4, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0)
%6 = tail call i32 @printf(i8* %5, i32 %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CK6_Map_SetupFunctions();
int /*<<< orphan*/ CK6_Obj1_SetupFunctions();
int /*<<< orphan*/ CK6_Obj2_SetupFunctions();
int /*<<< orphan*/ CK6_Obj3_SetupFunctions();
void CK6_SetupFunctions() {
  CK6_Obj1_SetupFunctions();
  CK6_Obj2_SetupFunctions();
  CK6_Obj3_SetupFunctions();
  CK6_Map_SetupFunctions();
}


x86 assembly (clang, -O0):
<CK6_SetupFunctions>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <CK6_Obj1_SetupFunctions@plt>
mov    $0x0,%al
call   1040 <CK6_Obj2_SetupFunctions@plt>
mov    $0x0,%al
call   1030 <CK6_Obj3_SetupFunctions@plt>
mov    $0x0,%al
call   1060 <CK6_Map_SetupFunctions@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CK6_SetupFunctions>:
push   %rax
xor    %eax,%eax
call   1050 <CK6_Obj1_SetupFunctions@plt>
xor    %eax,%eax
call   1040 <CK6_Obj2_SetupFunctions@plt>
xor    %eax,%eax
call   1030 <CK6_Obj3_SetupFunctions@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <CK6_Map_SetupFunctions@plt>

LLVM IR (-O0):
define void @CK6_SetupFunctions() {
%1 = call i32 (...) @CK6_Obj1_SetupFunctions()
%2 = call i32 (...) @CK6_Obj2_SetupFunctions()
%3 = call i32 (...) @CK6_Obj3_SetupFunctions()
%4 = call i32 (...) @CK6_Map_SetupFunctions()
ret void
}

LLVM IR (-O2):
define void @CK6_SetupFunctions() {
%1 = tail call i32 (...) @CK6_Obj1_SetupFunctions()
%2 = tail call i32 (...) @CK6_Obj2_SetupFunctions()
%3 = tail call i32 (...) @CK6_Obj3_SetupFunctions()
%4 = tail call i32 (...) @CK6_Map_SetupFunctions()
ret void
}
void ARM_USBH_HCI_Interrupt(void) {}


x86 assembly (clang, -O0):
<ARM_USBH_HCI_Interrupt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARM_USBH_HCI_Interrupt>:
ret

LLVM IR (-O0):
define void @ARM_USBH_HCI_Interrupt() {
ret void
}

LLVM IR (-O2):
define void @ARM_USBH_HCI_Interrupt() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, void *);
int /*<<< orphan*/ stderr;
void rtpp_pipe_decr_ttl_fin(void *pub) {
  fprintf(stderr,
          "Method rtpp_pipe@%p::decr_ttl (rtpp_pipe_decr_ttl) is invoked after "
          "destruction\x0a",
          pub);
  abort();
}


x86 assembly (clang, -O0):
<rtpp_pipe_decr_ttl_fin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<rtpp_pipe_decr_ttl_fin>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [81 x i8] c"Method rtpp_pipe@%p::decr_ttl (rtpp_pipe_decr_ttl) is invoked after destruction\0A\00"
define void @rtpp_pipe_decr_ttl_fin(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([81 x i8], [81 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [81 x i8] c"Method rtpp_pipe@%p::decr_ttl (rtpp_pipe_decr_ttl) is invoked after destruction\0A\00"
define void @rtpp_pipe_decr_ttl_fin(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([81 x i8], [81 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int japi_getinheight(int);
int j_getinheight(int arg0) { return (japi_getinheight(arg0)); }


x86 assembly (clang, -O0):
<j_getinheight>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <japi_getinheight@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<j_getinheight>:
jmp    1030 <japi_getinheight@plt>

LLVM IR (-O0):
define i32 @j_getinheight(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @japi_getinheight(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @j_getinheight(i32 %0) {
%2 = tail call i32 @japi_getinheight(i32 %0)
ret i32 %2
}
int swapIntEndianness(int input) {
  int output = 0;
  for (int i = 0; i < 4; i++) {
    *((char *)&output - i + 3) = *((char *)&input + i);
  }
  return output;
}


x86 assembly (clang, -O0):
<swapIntEndianness>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x4,-0xc(%rbp)
jge    1142 <swapIntEndianness+0x42>
movslq -0xc(%rbp),%rax
mov    -0x4(%rbp,%rax,1),%cl
movslq -0xc(%rbp),%rdx
xor    %eax,%eax
sub    %rdx,%rax
mov    %cl,-0x5(%rbp,%rax,1)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1115 <swapIntEndianness+0x15>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swapIntEndianness>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @swapIntEndianness(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %20, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 4
br i1 %7, label %8, label %23
8: ; preds = %5
%9 = bitcast i32* %2 to i8*
%10 = load i32, i32* %4
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %9, i64 %11
%13 = load i8, i8* %12
%14 = bitcast i32* %3 to i8*
%15 = load i32, i32* %4
%16 = sext i32 %15 to i64
%17 = sub i64 0, %16
%18 = getelementptr inbounds i8, i8* %14, i64 %17
%19 = getelementptr inbounds i8, i8* %18, i64 3
store i8 %13, i8* %19
br label %20
20: ; preds = %8
%21 = load i32, i32* %4
%22 = add nsw i32 %21, 1
store i32 %22, i32* %4
br label %5
23: ; preds = %5
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @swapIntEndianness(i32 %0) {
%2 = call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
void platform_linux() {}


x86 assembly (clang, -O0):
<platform_linux>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<platform_linux>:
ret

LLVM IR (-O0):
define void @platform_linux() {
ret void
}

LLVM IR (-O2):
define void @platform_linux() {
ret void
}
/* Variables and functions */
int getOrigin(int);
int /*<<< orphan*/ initPersonOnFloor(int, int);
void aliceCall(void) {
  int tmp;
  {
    {
      tmp = getOrigin(1);
      initPersonOnFloor(1, tmp);
    }
    return;
  }
}


x86 assembly (clang, -O0):
<aliceCall>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
call   1030 <getOrigin@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x1,%edi
call   1040 <initPersonOnFloor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aliceCall>:
push   %rax
mov    $0x1,%edi
call   1030 <getOrigin@plt>
mov    $0x1,%edi
mov    %eax,%esi
pop    %rax
jmp    1040 <initPersonOnFloor@plt>

LLVM IR (-O0):
define void @aliceCall() {
%1 = alloca i32
%2 = call i32 @getOrigin(i32 1)
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @initPersonOnFloor(i32 1, i32 %3)
ret void
}

LLVM IR (-O2):
define void @aliceCall() {
%1 = tail call i32 @getOrigin(i32 1)
%2 = tail call i32 @initPersonOnFloor(i32 1, i32 %1)
ret void
}
/* Variables and functions */
scalar_t__ putc(int, int);
int fputc(int c, int dev) {
  if ((-1) == (int)putc(dev, c)) {
    return (-2);
  } else {
    return c;
  }
}


x86 assembly (clang, -O0):
<fputc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <putc@plt>
mov    %eax,%ecx
mov    $0xffffffff,%eax
cmp    %ecx,%eax
jne    1144 <fputc+0x34>
movl   $0xfffffffe,-0x4(%rbp)
jmp    114a <fputc+0x3a>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fputc>:
push   %rbx
mov    %edi,%ebx
mov    %esi,%edi
mov    %ebx,%esi
call   1030 <putc@plt>
cmp    $0xffffffff,%eax
mov    $0xfffffffe,%eax
cmovne %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @fputc(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = load i32, i32* %4
%8 = call i64 @putc(i32 %6, i32 %7)
%9 = trunc i64 %8 to i32
%10 = icmp eq i32 -1, %9
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 -2, i32* %3
br label %14
12: ; preds = %2
%13 = load i32, i32* %4
store i32 %13, i32* %3
br label %14
14: ; preds = %12, %11
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @fputc(i32 %0, i32 %1) {
%3 = tail call i64 @putc(i32 %1, i32 %0)
%4 = trunc i64 %3 to i32
%5 = icmp eq i32 %4, -1
%6 = select i1 %5, i32 -2, i32 %0
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ gmx_bar(int, char **);
int main(int argc, char *argv[]) {
  gmx_bar(argc, argv);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <gmx_bar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <gmx_bar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @gmx_bar(i32 %6, i8** %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @gmx_bar(i32 %0, i8** %1)
ret i32 0
}
unsigned short inw(unsigned short port) {
  unsigned short w;
  __asm__ __volatile__("inw %w1, %w0" : "=a"(w) : "d"(port));
  return w;
}


x86 assembly (clang, -O0):
<inw>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%ax
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inw>:
mov    %edi,%edx
in     (%dx),%ax
ret

LLVM IR (-O0):
define zeroext i16 @inw(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i16 asm sideeffect "inw ${1:w}, ${0:w}", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i16 %5, i16* %3
%6 = load i16, i16* %3
ret i16 %6
}

LLVM IR (-O2):
define zeroext i16 @inw(i16 zeroext %0) {
%2 = tail call i16 asm sideeffect "inw ${1:w}, ${0:w}", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i16 %2
}
void g_value_reset() {}


x86 assembly (clang, -O0):
<g_value_reset>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_value_reset>:
ret

LLVM IR (-O0):
define void @g_value_reset() {
ret void
}

LLVM IR (-O2):
define void @g_value_reset() {
ret void
}
int test_028(int a, int b, int c, int d) { return a + ((c >> 31) & 1) + b; }


x86 assembly (clang, -O0):
<test_028>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    $0x1f,%ecx
and    $0x1,%ecx
add    %ecx,%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_028>:
shr    $0x1f,%edx
lea    (%rdi,%rsi,1),%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @test_028(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %7
%11 = ashr i32 %10, 31
%12 = and i32 %11, 1
%13 = add nsw i32 %9, %12
%14 = load i32, i32* %6
%15 = add nsw i32 %13, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @test_028(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = lshr i32 %2, 31
%6 = add i32 %1, %0
%7 = add i32 %6, %5
ret i32 %7
}
void ignore() {}


x86 assembly (clang, -O0):
<ignore>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ignore>:
ret

LLVM IR (-O0):
define void @ignore() {
ret void
}

LLVM IR (-O2):
define void @ignore() {
ret void
}
void sme_clear_on_disassoc(struct wpa_supplicant *wpa_s) {}


x86 assembly (clang, -O0):
<sme_clear_on_disassoc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sme_clear_on_disassoc>:
ret

LLVM IR (-O0):
%struct.wpa_supplicant = type opaque
define void @sme_clear_on_disassoc(%struct.wpa_supplicant* %0) {
%2 = alloca %struct.wpa_supplicant*
store %struct.wpa_supplicant* %0, %struct.wpa_supplicant** %2
ret void
}

LLVM IR (-O2):
%struct.wpa_supplicant = type opaque
define void @sme_clear_on_disassoc(%struct.wpa_supplicant* nocapture %0) {
ret void
}
int max2(int x1, int x2) {
  if (x1 > x2) {
    return x1;
  } else {
    return x2;
  }
}


x86 assembly (clang, -O0):
<max2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1121 <max2+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <max2+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max2>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @max2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @max2(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ BNCIO2(int, int);
long int BNCFrontOn() {
  long int stat = 99;
  BNCIO2(32, 1);
  return (1);
}


x86 assembly (clang, -O0):
<BNCFrontOn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x63,-0x8(%rbp)
mov    $0x20,%edi
mov    $0x1,%esi
call   1030 <BNCIO2@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BNCFrontOn>:
push   %rax
mov    $0x20,%edi
mov    $0x1,%esi
call   1030 <BNCIO2@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @BNCFrontOn() {
%1 = alloca i64
store i64 99, i64* %1
%2 = call i32 @BNCIO2(i32 32, i32 1)
ret i64 1
}

LLVM IR (-O2):
define i64 @BNCFrontOn() {
%1 = tail call i32 @BNCIO2(i32 32, i32 1)
ret i64 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int hasher(char *str) {
  char s;
  int sum = 0;
  int i = 0;
  while (str[i] != (char)NULL) {
    s = str[i];
    sum += (int)s;
    i++;
  }
  if (0)
    printf("sum: %d\n", sum);
  return sum % 50;
}


x86 assembly (clang, -O0):
<hasher>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1151 <hasher+0x51>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x9(%rbp)
movsbl -0x9(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1116 <hasher+0x16>
mov    -0x10(%rbp),%eax
mov    $0x32,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hasher>:
mov    (%rdi),%al
test   %al,%al
je     113d <hasher+0x3d>
add    $0x1,%rdi
xor    %ecx,%ecx
nopl   0x0(%rax)
movsbl %al,%eax
add    %eax,%ecx
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
jne    1110 <hasher+0x10>
movslq %ecx,%rax
imul   $0x51eb851f,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x24,%rcx
add    %edx,%ecx
imul   $0x32,%ecx,%ecx
sub    %ecx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hasher(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %14, %1
%7 = load i8*, i8** %2
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %26
14: ; preds = %6
%15 = load i8*, i8** %2
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
store i8 %19, i8* %3
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = load i32, i32* %4
%23 = add nsw i32 %22, %21
store i32 %23, i32* %4
%24 = load i32, i32* %5
%25 = add nsw i32 %24, 1
store i32 %25, i32* %5
br label %6
26: ; preds = %6
%27 = load i32, i32* %4
%28 = srem i32 %27, 50
ret i32 %28
}

LLVM IR (-O2):
define i32 @hasher(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %10, %4 ], [ 0, %1 ]
%6 = phi i8 [ %12, %4 ], [ %2, %1 ]
%7 = phi i32 [ %9, %4 ], [ 0, %1 ]
%8 = sext i8 %6 to i32
%9 = add nsw i32 %7, %8
%10 = add nuw nsw i64 %5, 1
%11 = getelementptr inbounds i8, i8* %0, i64 %10
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4
%15 = srem i32 %9, 50
br label %16
16: ; preds = %14, %1
%17 = phi i32 [ 0, %1 ], [ %15, %14 ]
ret i32 %17
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ nomem();
void *xmalloc(size_t s) {
  void *p;
  if ((p = malloc(s)) == NULL)
    nomem();
  return (p);
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    114a <xmalloc+0x2a>
mov    $0x0,%al
call   1030 <nomem@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rbx
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1135 <xmalloc+0x15>
xor    %eax,%eax
call   1030 <nomem@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 (...) @nomem()
br label %9
9: ; preds = %7, %1
%10 = load i8*, i8** %3
ret i8* %10
}

LLVM IR (-O2):
define noalias i8* @xmalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 (...) @nomem()
br label %6
6: ; preds = %4, %1
ret i8* %2
}
void __main(void) { return; }


x86 assembly (clang, -O0):
<__main>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__main>:
ret

LLVM IR (-O0):
define void @__main() {
ret void
}

LLVM IR (-O2):
define void @__main() {
ret void
}
unsigned shifta(unsigned a, unsigned b) { return a >> b; }


x86 assembly (clang, -O0):
<shifta>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shifta>:
mov    %esi,%ecx
mov    %edi,%eax
shr    %cl,%eax
ret

LLVM IR (-O0):
define i32 @shifta(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = lshr i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @shifta(i32 %0, i32 %1) {
%3 = lshr i32 %0, %1
ret i32 %3
}
int fib(int x) {
  if (x <= 1)
    return 1;
  else
    return fib(x - 1) + fib(x - 2);
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jg     1131 <fib+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1154 <fib+0x44>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x2,%edi
jl     1145 <fib+0x35>
mov    %edi,%ebx
add    $0x2,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    -0x3(%rbx),%edi
call   1030 <fib@plt>
add    %eax,%ebp
add    $0xfffffffe,%ebx
cmp    $0x3,%ebx
ja     1130 <fib+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %15
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i32 @fib(i32 %9)
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 2
%13 = call i32 @fib(i32 %12)
%14 = add nsw i32 %10, %13
store i32 %14, i32* %2
br label %15
15: ; preds = %7, %6
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}