xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ __bswap_16(int /*<<< orphan*/);
size_t fread(int /*<<< orphan*/ *, int, int, int /*<<< orphan*/ *);
size_t FR_fread_b16(uint16_t *dest, FILE *file) {
  size_t result = fread(dest, 2, 1, file);
  *dest = __bswap_16(*dest);
  return result;
}


x86 assembly (clang, -O0):
<FR_fread_b16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rcx
mov    $0x2,%esi
mov    $0x1,%edx
call   1040 <fread@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <__bswap_16@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FR_fread_b16>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rcx
mov    %rdi,%rbx
mov    $0x2,%esi
mov    $0x1,%edx
call   1040 <fread@plt>
mov    %rax,%r14
mov    (%rbx),%edi
call   1030 <__bswap_16@plt>
mov    %eax,(%rbx)
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @FR_fread_b16(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i64
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32*, i32** %4
%8 = call i64 @fread(i32* %6, i32 2, i32 1, i32* %7)
store i64 %8, i64* %5
%9 = load i32*, i32** %3
%10 = load i32, i32* %9
%11 = call i32 @__bswap_16(i32 %10)
%12 = load i32*, i32** %3
store i32 %11, i32* %12
%13 = load i64, i64* %5
ret i64 %13
}

LLVM IR (-O2):
define i64 @FR_fread_b16(i32* nocapture %0, i32* nocapture %1) {
%3 = tail call i64 @fread(i32* %0, i32 2, i32 1, i32* %1)
%4 = load i32, i32* %0
%5 = tail call i32 @__bswap_16(i32 %4)
store i32 %5, i32* %0
ret i64 %3
}
int nn_xpull_ispeer(int socktype) { return socktype == (5 * 16 + 0) ? 1 : 0; }


x86 assembly (clang, -O0):
<nn_xpull_ispeer>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x50,%edx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nn_xpull_ispeer>:
xor    %eax,%eax
cmp    $0x50,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @nn_xpull_ispeer(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 80
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 1, i32 0
ret i32 %6
}

LLVM IR (-O2):
define i32 @nn_xpull_ispeer(i32 %0) {
%2 = icmp eq i32 %0, 80
%3 = zext i1 %2 to i32
ret i32 %3
}
int attime2seconds(int amper) { return amper * 86.4; }


x86 assembly (clang, -O0):
<attime2seconds>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
movsd  0xeec(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<attime2seconds>:
cvtsi2sd %edi,%xmm0
mulsd  0xef4(%rip),%xmm0
cvttsd2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @attime2seconds(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sitofp i32 %3 to double
%5 = fmul double %4, 8.640000e+01
%6 = fptosi double %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @attime2seconds(i32 %0) {
%2 = sitofp i32 %0 to double
%3 = fmul double %2, 8.640000e+01
%4 = fptosi double %3 to i32
ret i32 %4
}
void user_spi_flash_dio_to_qio_pre_init() {}


x86 assembly (clang, -O0):
<user_spi_flash_dio_to_qio_pre_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<user_spi_flash_dio_to_qio_pre_init>:
ret

LLVM IR (-O0):
define void @user_spi_flash_dio_to_qio_pre_init() {
ret void
}

LLVM IR (-O2):
define void @user_spi_flash_dio_to_qio_pre_init() {
ret void
}
/* Type definitions */
struct beststr {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
void show_aux(FILE *fp, struct beststr *bptr) {}


x86 assembly (clang, -O0):
<show_aux>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_aux>:
ret

LLVM IR (-O0):
%struct.beststr = type { i32 }
define void @show_aux(i32* %0, %struct.beststr* %1) {
%3 = alloca i32*
%4 = alloca %struct.beststr*
store i32* %0, i32** %3
store %struct.beststr* %1, %struct.beststr** %4
ret void
}

LLVM IR (-O2):
%struct.beststr = type { i32 }
define void @show_aux(i32* nocapture %0, %struct.beststr* nocapture %1) {
ret void
}
int main(void) {
  int x = 0;
  return (x = 1) + x;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 1, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 1, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
ret i32 2
}
/* Type definitions */
typedef size_t uint64_t;
typedef int int64_t;

/* Variables and functions */
uint64_t rorx(uint64_t u, size_t x) {
  return (u >> x) | (uint64_t)((int64_t)u << (64 - x));
}


x86 assembly (clang, -O0):
<rorx>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
shr    %cl,%rax
mov    -0x8(%rbp),%rcx
mov    %ecx,%edx
mov    $0x40,%ecx
sub    -0x10(%rbp),%rcx
shl    %cl,%edx
mov    %edx,%ecx
movslq %ecx,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rorx>:
mov    %rsi,%rcx
mov    %rdi,%rdx
shr    %cl,%rdx
neg    %cl
shl    %cl,%edi
movslq %edi,%rax
or     %rdx,%rax
ret

LLVM IR (-O0):
define i64 @rorx(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = lshr i64 %5, %6
%8 = load i64, i64* %3
%9 = trunc i64 %8 to i32
%10 = load i64, i64* %4
%11 = sub i64 64, %10
%12 = trunc i64 %11 to i32
%13 = shl i32 %9, %12
%14 = sext i32 %13 to i64
%15 = or i64 %7, %14
ret i64 %15
}

LLVM IR (-O2):
define i64 @rorx(i64 %0, i64 %1) {
%3 = lshr i64 %0, %1
%4 = trunc i64 %0 to i32
%5 = trunc i64 %1 to i32
%6 = sub i32 64, %5
%7 = shl i32 %4, %6
%8 = sext i32 %7 to i64
%9 = or i64 %3, %8
ret i64 %9
}
/* Variables and functions */
void nc_dump(char *tag, unsigned char *buf, size_t sz) {}


x86 assembly (clang, -O0):
<nc_dump>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nc_dump>:
ret

LLVM IR (-O0):
define void @nc_dump(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
ret void
}

LLVM IR (-O2):
define void @nc_dump(i8* nocapture %0, i8* nocapture %1, i64 %2) {
ret void
}
double sgn(x)
double x;
{
  if (x != x)
    return (x);
  return (x > 0.0 ? 1.0 : (x < 0.0 ? -1.0 : 0.0));
}


x86 assembly (clang, -O0):
<sgn>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
jne    1124 <sgn+0x24>
jp     1124 <sgn+0x24>
jmp    1133 <sgn+0x33>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    118a <sgn+0x8a>
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    1157 <sgn+0x57>
movsd  0xebb(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1180 <sgn+0x80>
movsd  -0x10(%rbp),%xmm0
movsd  0xe9c(%rip),%xmm3
xorps  %xmm2,%xmm2
cmpltsd %xmm2,%xmm0
movaps %xmm0,%xmm1
andpd  %xmm3,%xmm1
andnpd %xmm2,%xmm0
orpd   %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sgn>:
xorpd  %xmm1,%xmm1
movapd %xmm0,%xmm2
cmpltsd %xmm1,%xmm2
movsd  0xeeb(%rip),%xmm3
andpd  %xmm2,%xmm3
cmpltsd %xmm0,%xmm1
movsd  0xee2(%rip),%xmm2
andpd  %xmm1,%xmm2
andnpd %xmm3,%xmm1
orpd   %xmm1,%xmm2
movapd %xmm0,%xmm1
cmpunordsd %xmm0,%xmm1
andpd  %xmm1,%xmm0
andnpd %xmm2,%xmm1
orpd   %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @sgn(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = load double, double* %3
%6 = fcmp une double %4, %5
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load double, double* %3
store double %8, double* %2
br label %20
9: ; preds = %1
%10 = load double, double* %3
%11 = fcmp ogt double %10, 0.000000e+00
br i1 %11, label %12, label %13
12: ; preds = %9
br label %18
13: ; preds = %9
%14 = load double, double* %3
%15 = fcmp olt double %14, 0.000000e+00
%16 = zext i1 %15 to i64
%17 = select i1 %15, double -1.000000e+00, double 0.000000e+00
br label %18
18: ; preds = %13, %12
%19 = phi double [ 1.000000e+00, %12 ], [ %17, %13 ]
store double %19, double* %2
br label %20
20: ; preds = %18, %7
%21 = load double, double* %2
ret double %21
}

LLVM IR (-O2):
define double @sgn(double %0) {
%2 = fcmp uno double %0, 0.000000e+00
%3 = fcmp ogt double %0, 0.000000e+00
%4 = fcmp olt double %0, 0.000000e+00
%5 = select i1 %4, double -1.000000e+00, double 0.000000e+00
%6 = select i1 %3, double 1.000000e+00, double %5
%7 = select i1 %2, double %0, double %6
ret double %7
}
/* Variables and functions */
int /*<<< orphan*/ put32(unsigned int);
int /*<<< orphan*/ put8(int);
void movsx_reg32_m8(int reg32, unsigned char *m8) {
  put8(0x0F);
  put8(0xBE);
  put8((reg32 << 3) | 5);
  put32((unsigned int)(m8));
}


x86 assembly (clang, -O0):
<movsx_reg32_m8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xf,%edi
call   1030 <put8@plt>
mov    $0xbe,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     $0x5,%edi
call   1030 <put8@plt>
mov    -0x10(%rbp),%rax
mov    %eax,%edi
call   1040 <put32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<movsx_reg32_m8>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %edi,%ebx
mov    $0xf,%edi
call   1030 <put8@plt>
mov    $0xbe,%edi
call   1030 <put8@plt>
lea    0x5(,%rbx,8),%edi
call   1030 <put8@plt>
mov    %r14d,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <put32@plt>

LLVM IR (-O0):
define void @movsx_reg32_m8(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = call i32 @put8(i32 15)
%6 = call i32 @put8(i32 190)
%7 = load i32, i32* %3
%8 = shl i32 %7, 3
%9 = or i32 %8, 5
%10 = call i32 @put8(i32 %9)
%11 = load i8*, i8** %4
%12 = ptrtoint i8* %11 to i32
%13 = call i32 @put32(i32 %12)
ret void
}

LLVM IR (-O2):
define void @movsx_reg32_m8(i32 %0, i8* %1) {
%3 = tail call i32 @put8(i32 15)
%4 = tail call i32 @put8(i32 190)
%5 = shl i32 %0, 3
%6 = or i32 %5, 5
%7 = tail call i32 @put8(i32 %6)
%8 = ptrtoint i8* %1 to i64
%9 = trunc i64 %8 to i32
%10 = tail call i32 @put32(i32 %9)
ret void
}
float reluDeriv(float reluInput) { return reluInput > 0 ? 1 : 0; }


x86 assembly (clang, -O0):
<reluDeriv>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
xorps  %xmm1,%xmm1
xor    %eax,%eax
mov    $0x1,%ecx
ucomiss %xmm1,%xmm0
cmova  %ecx,%eax
cvtsi2ss %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<reluDeriv>:
xorps  %xmm1,%xmm1
cmpltss %xmm0,%xmm1
movss  0xef0(%rip),%xmm0
andps  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @reluDeriv(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp ogt float %3, 0.000000e+00
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 1, i32 0
%7 = sitofp i32 %6 to float
ret float %7
}

LLVM IR (-O2):
define float @reluDeriv(float %0) {
%2 = fcmp ogt float %0, 0.000000e+00
%3 = uitofp i1 %2 to float
ret float %3
}
int bneInstruction(int i, int j) { return (i != j) ? 1 : 0; }


x86 assembly (clang, -O0):
<bneInstruction>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%esi
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %esi,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bneInstruction>:
xor    %eax,%eax
cmp    %esi,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @bneInstruction(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ne i32 %5, %6
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 1, i32 0
ret i32 %9
}

LLVM IR (-O2):
define i32 @bneInstruction(i32 %0, i32 %1) {
%3 = icmp ne i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
unsigned int __get_cpsr();
int /*<<< orphan*/ __set_cpsr(unsigned int);
__attribute__((always_)) unsigned irq_disable(void) {
  unsigned _cpsr;
  _cpsr = __get_cpsr();
  __set_cpsr(_cpsr | 0x00000080);
  return _cpsr;
}


x86 assembly (clang, -O0):
<irq_disable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <__get_cpsr@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
or     $0x80,%edi
call   1030 <__set_cpsr@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irq_disable>:
push   %rbx
xor    %eax,%eax
call   1040 <__get_cpsr@plt>
mov    %eax,%ebx
mov    %eax,%edi
or     $0x80,%edi
call   1030 <__set_cpsr@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @irq_disable() {
%1 = alloca i32
%2 = call i32 (...) @__get_cpsr()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = or i32 %3, 128
%5 = call i32 @__set_cpsr(i32 %4)
%6 = load i32, i32* %1
ret i32 %6
}

LLVM IR (-O2):
define i32 @irq_disable() {
%1 = tail call i32 (...) @__get_cpsr()
%2 = or i32 %1, 128
%3 = tail call i32 @__set_cpsr(i32 %2)
ret i32 %1
}
/* Type definitions */
struct context {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ dump(struct context *);
void destroy(struct context *context) { dump(context); }


x86 assembly (clang, -O0):
<destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dump@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<destroy>:
jmp    1030 <dump@plt>

LLVM IR (-O0):
%struct.context = type { i32 }
define void @destroy(%struct.context* %0) {
%2 = alloca %struct.context*
store %struct.context* %0, %struct.context** %2
%3 = load %struct.context*, %struct.context** %2
%4 = call i32 @dump(%struct.context* %3)
ret void
}

LLVM IR (-O2):
%struct.context = type { i32 }
define void @destroy(%struct.context* %0) {
%2 = tail call i32 @dump(%struct.context* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void calculateTriangularNumber(int n) {
  int i, triangularNumber = 0;
  for (i = 1; i <= n; ++i)
    triangularNumber += i;
  printf("Triangular number %i is %i\n", n, triangularNumber);
}


x86 assembly (clang, -O0):
<calculateTriangularNumber>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     114c <calculateTriangularNumber+0x3c>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1129 <calculateTriangularNumber+0x19>
mov    -0x4(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xea7(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculateTriangularNumber>:
mov    %edi,%esi
test   %edi,%edi
jle    1135 <calculateTriangularNumber+0x25>
lea    -0x1(%rsi),%eax
lea    -0x2(%rsi),%ecx
imul   %rax,%rcx
shr    %rcx
lea    (%rcx,%rsi,2),%edx
add    $0xffffffff,%edx
lea    0xed0(%rip),%rdi
jmp    1030 <printf@plt>
xor    %edx,%edx
lea    0xec2(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"Triangular number %i is %i\0A\00"
define void @calculateTriangularNumber(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
store i32 1, i32* %3
br label %5
5: ; preds = %13, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp sle i32 %6, %7
br i1 %8, label %9, label %16
9: ; preds = %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = add nsw i32 %11, %10
store i32 %12, i32* %4
br label %13
13: ; preds = %9
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %5
16: ; preds = %5
%17 = load i32, i32* %2
%18 = load i32, i32* %4
%19 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %17, i32 %18)
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c"Triangular number %i is %i\0A\00"
define void @calculateTriangularNumber(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %14, label %3
3: ; preds = %1
%4 = shl nuw i32 %0, 1
%5 = add nsw i32 %0, -1
%6 = zext i32 %5 to i33
%7 = add nsw i32 %0, -2
%8 = zext i32 %7 to i33
%9 = mul i33 %6, %8
%10 = lshr i33 %9, 1
%11 = trunc i33 %10 to i32
%12 = add i32 %4, %11
%13 = add i32 %12, -1
br label %14
14: ; preds = %3, %1
%15 = phi i32 [ 0, %1 ], [ %13, %3 ]
%16 = tail call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %15)
ret void
}
/* Variables and functions */
int fds_send(int *, int);
int fds_send_one(int fd) { return fds_send(&fd, 1); }


x86 assembly (clang, -O0):
<fds_send_one>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x4(%rbp),%rdi
mov    $0x1,%esi
call   1030 <fds_send@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fds_send_one>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rdi
mov    $0x1,%esi
call   1030 <fds_send@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fds_send_one(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @fds_send(i32* %2, i32 1)
ret i32 %3
}

LLVM IR (-O2):
define i32 @fds_send_one(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @fds_send(i32* %2, i32 1)
ret i32 %3
}
void _exit(int exitVal) { _exit(exitVal); }


x86 assembly (clang, -O0):
<_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<_exit>:
push   %rax
call   1030 <_exit@plt>

LLVM IR (-O0):
define void @_exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
unreachable
}

LLVM IR (-O2):
define void @_exit(i32 %0) {
tail call void @_exit(i32 %0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void printer2() { printf("printer2(): hello"); }


x86 assembly (clang, -O0):
<printer2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<printer2>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"printer2(): hello\00"
define void @printer2() {
%1 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"printer2(): hello\00"
define void @printer2() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ puts(char *);
void die(char *msg) {
  puts(msg);
  exit(-1);
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<die>:
push   %rax
call   1030 <puts@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @die(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @puts(i8* %3)
%5 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
define void @die(i8* nocapture %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) %0)
%3 = tail call i32 @exit(i32 -1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ AF_INET6;
int /*<<< orphan*/ SOCK_DGRAM;
int /*<<< orphan*/ socket(int /*<<< orphan*/, int /*<<< orphan*/,
                          int /*<<< orphan*/);
void test_ipv6udp() { socket(AF_INET6, SOCK_DGRAM, 0); }


x86 assembly (clang, -O0):
<test_ipv6udp>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
mov    0x2ec4(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1030 <socket@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_ipv6udp>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
jmp    1030 <socket@plt>

LLVM IR (-O0):
@AF_INET6 = global i32 0
@SOCK_DGRAM = global i32 0
define void @test_ipv6udp() {
%1 = load i32, i32* @AF_INET6
%2 = load i32, i32* @SOCK_DGRAM
%3 = call i32 @socket(i32 %1, i32 %2, i32 0)
ret void
}

LLVM IR (-O2):
@AF_INET6 = global i32 0
@SOCK_DGRAM = global i32 0
define void @test_ipv6udp() {
%1 = load i32, i32* @AF_INET6
%2 = load i32, i32* @SOCK_DGRAM
%3 = tail call i32 @socket(i32 %1, i32 %2, i32 0)
ret void
}
int main(int argc, char *argv[]) {
  char *msg = "Hello world from assembly\n";
  asm("MOVL $4, %eax");
  asm("MOVL $1, %ebx");
  asm("MOVL %0, %%ecx" : : "m"(msg));
  asm("MOVL $26, %edx");
  asm("INT $0x80");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xee7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    $0x4,%eax
mov    $0x1,%ebx
mov    -0x18(%rbp),%ecx
mov    $0x1a,%edx
int    $0x80
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xef9(%rip),%rax
mov    %rax,-0x8(%rsp)
mov    $0x4,%eax
mov    $0x1,%ebx
mov    -0x8(%rsp),%ecx
mov    $0x1a,%edx
int    $0x80
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [27 x i8] c"Hello world from assembly\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8** %6
ret i32 0
}

LLVM IR (-O2):
@.str = [27 x i8] c"Hello world from assembly\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i8*
%4 = bitcast i8** %3 to i8*
store i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8** %3
tail call void asm sideeffect "MOVL $$4, %eax", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "MOVL $$1, %ebx", "~{dirflag},~{fpsr},~{flags}"()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ STDERR_FILENO;
int /*<<< orphan*/ strlen(char *);
int /*<<< orphan*/ write(int /*<<< orphan*/, char *, int /*<<< orphan*/);
void write_stderr(char text[]) { write(STDERR_FILENO, text, strlen(text)); }


x86 assembly (clang, -O0):
<write_stderr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    %eax,%edx
call   1030 <write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_stderr>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2eb3(%rip),%rax
mov    (%rax),%ebp
call   1040 <strlen@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <write@plt>

LLVM IR (-O0):
@STDERR_FILENO = global i32 0
define void @write_stderr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @STDERR_FILENO
%4 = load i8*, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = call i32 @write(i32 %3, i8* %4, i32 %6)
ret void
}

LLVM IR (-O2):
@STDERR_FILENO = global i32 0
define void @write_stderr(i8* %0) {
%2 = load i32, i32* @STDERR_FILENO
%3 = tail call i32 @strlen(i8* %0)
%4 = tail call i32 @write(i32 %2, i8* %0, i32 %3)
ret void
}
void border_se_ext_diagonal_special_sand_short_hori(unsigned char *pic,
                                                    unsigned char *mirr) {
  *pic = 0x2B;
  ;
}


x86 assembly (clang, -O0):
<border_se_ext_diagonal_special_sand_short_hori>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x2b,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<border_se_ext_diagonal_special_sand_short_hori>:
movb   $0x2b,(%rdi)
ret

LLVM IR (-O0):
define void @border_se_ext_diagonal_special_sand_short_hori(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
store i8 43, i8* %5
ret void
}

LLVM IR (-O2):
define void @border_se_ext_diagonal_special_sand_short_hori(i8* nocapture writeonly %0, i8* nocapture readnone %1) {
store i8 43, i8* %0
ret void
}
int over_state_pause(void) { return 0; }


x86 assembly (clang, -O0):
<over_state_pause>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<over_state_pause>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @over_state_pause() {
ret i32 0
}

LLVM IR (-O2):
define i32 @over_state_pause() {
ret i32 0
}
int vde_chain_nm3_work(int *sz_arg, int *sz_res, int *sz_iw, int *sz_w) {
  if (sz_arg)
    *sz_arg = 4;
  if (sz_res)
    *sz_res = 3;
  if (sz_iw)
    *sz_iw = 0;
  if (sz_w)
    *sz_w = 34;
  return 0;
}


x86 assembly (clang, -O0):
<vde_chain_nm3_work>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1129 <vde_chain_nm3_work+0x29>
mov    -0x8(%rbp),%rax
movl   $0x4,(%rax)
cmpq   $0x0,-0x10(%rbp)
je     113e <vde_chain_nm3_work+0x3e>
mov    -0x10(%rbp),%rax
movl   $0x3,(%rax)
cmpq   $0x0,-0x18(%rbp)
je     1153 <vde_chain_nm3_work+0x53>
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
cmpq   $0x0,-0x20(%rbp)
je     1168 <vde_chain_nm3_work+0x68>
mov    -0x20(%rbp),%rax
movl   $0x22,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vde_chain_nm3_work>:
test   %rdi,%rdi
je     110b <vde_chain_nm3_work+0xb>
movl   $0x4,(%rdi)
test   %rsi,%rsi
je     1116 <vde_chain_nm3_work+0x16>
movl   $0x3,(%rsi)
test   %rdx,%rdx
je     1121 <vde_chain_nm3_work+0x21>
movl   $0x0,(%rdx)
test   %rcx,%rcx
je     112c <vde_chain_nm3_work+0x2c>
movl   $0x22,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @vde_chain_nm3_work(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %11, label %13
11: ; preds = %4
%12 = load i32*, i32** %5
store i32 4, i32* %12
br label %13
13: ; preds = %11, %4
%14 = load i32*, i32** %6
%15 = icmp ne i32* %14, null
br i1 %15, label %16, label %18
16: ; preds = %13
%17 = load i32*, i32** %6
store i32 3, i32* %17
br label %18
18: ; preds = %16, %13
%19 = load i32*, i32** %7
%20 = icmp ne i32* %19, null
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = load i32*, i32** %7
store i32 0, i32* %22
br label %23
23: ; preds = %21, %18
%24 = load i32*, i32** %8
%25 = icmp ne i32* %24, null
br i1 %25, label %26, label %28
26: ; preds = %23
%27 = load i32*, i32** %8
store i32 34, i32* %27
br label %28
28: ; preds = %26, %23
ret i32 0
}

LLVM IR (-O2):
define i32 @vde_chain_nm3_work(i32* writeonly %0, i32* writeonly %1, i32* writeonly %2, i32* writeonly %3) {
%5 = icmp eq i32* %0, null
br i1 %5, label %7, label %6
6: ; preds = %4
store i32 4, i32* %0
br label %7
7: ; preds = %6, %4
%8 = icmp eq i32* %1, null
br i1 %8, label %10, label %9
9: ; preds = %7
store i32 3, i32* %1
br label %10
10: ; preds = %9, %7
%11 = icmp eq i32* %2, null
br i1 %11, label %13, label %12
12: ; preds = %10
store i32 0, i32* %2
br label %13
13: ; preds = %12, %10
%14 = icmp eq i32* %3, null
br i1 %14, label %16, label %15
15: ; preds = %13
store i32 34, i32* %3
br label %16
16: ; preds = %15, %13
ret i32 0
}
int main() {
  int foo;
  return (func(func(func(func(foo))))) + 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%edi
mov    $0x0,%al
call   1030 <func@plt>
mov    %eax,%edi
mov    $0x0,%al
call   1030 <func@plt>
mov    %eax,%edi
mov    $0x0,%al
call   1030 <func@plt>
mov    %eax,%edi
mov    $0x0,%al
call   1030 <func@plt>
add    $0x0,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <func@plt>
mov    %eax,%edi
xor    %eax,%eax
call   1030 <func@plt>
mov    %eax,%edi
xor    %eax,%eax
call   1030 <func@plt>
mov    %eax,%edi
xor    %eax,%eax
pop    %rcx
jmp    1030 <func@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* %2
%4 = call i32 (i32, ...) bitcast (i32 (...)* @func to i32 (i32, ...)*)(i32 %3)
%5 = call i32 (i32, ...) bitcast (i32 (...)* @func to i32 (i32, ...)*)(i32 %4)
%6 = call i32 (i32, ...) bitcast (i32 (...)* @func to i32 (i32, ...)*)(i32 %5)
%7 = call i32 (i32, ...) bitcast (i32 (...)* @func to i32 (i32, ...)*)(i32 %6)
%8 = add nsw i32 %7, 0
ret i32 %8
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (i32, ...) bitcast (i32 (...)* @func to i32 (i32, ...)*)(i32 undef)
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @func to i32 (i32, ...)*)(i32 %1)
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @func to i32 (i32, ...)*)(i32 %2)
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @func to i32 (i32, ...)*)(i32 %3)
ret i32 %4
}
short FSEv05_abs(short a) { return a < 0 ? -a : a; }


x86 assembly (clang, -O0):
<FSEv05_abs>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
cmp    $0x0,%eax
jge    1128 <FSEv05_abs+0x28>
movswl -0x2(%rbp),%ecx
xor    %eax,%eax
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
jmp    112f <FSEv05_abs+0x2f>
movswl -0x2(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<FSEv05_abs>:
mov    %edi,%eax
neg    %ax
cmovs  %di,%ax
ret

LLVM IR (-O0):
define signext i16 @FSEv05_abs(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i16, i16* %2
%8 = sext i16 %7 to i32
%9 = sub nsw i32 0, %8
br label %13
10: ; preds = %1
%11 = load i16, i16* %2
%12 = sext i16 %11 to i32
br label %13
13: ; preds = %10, %6
%14 = phi i32 [ %9, %6 ], [ %12, %10 ]
%15 = trunc i32 %14 to i16
ret i16 %15
}

LLVM IR (-O2):
define signext i16 @FSEv05_abs(i16 signext %0) {
%2 = tail call i16 @llvm.abs.i16(i16 %0, i1 false)
ret i16 %2
}
double sub_df(double *p, double *q) {
  double d1 = *p;
  double d2 = *q;
  __asm__("# reg %x0, %x1" : "+v"(d1), "+v"(d2));
  return d1 - d2;
}


x86 assembly (clang, -O0):
<sub_df>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm1
movsd  -0x20(%rbp),%xmm0
movsd  %xmm1,-0x18(%rbp)
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
subsd  -0x20(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub_df>:
movsd  (%rdi),%xmm0
movsd  (%rsi),%xmm1
subsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @sub_df(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
%5 = alloca double
%6 = alloca double
store double* %0, double** %3
store double* %1, double** %4
%7 = load double*, double** %3
%8 = load double, double* %7
store double %8, double* %5
%9 = load double*, double** %4
%10 = load double, double* %9
store double %10, double* %6
%11 = load double, double* %5
%12 = load double, double* %6
%13 = call { double, double } asm "# reg ${0:x}, ${1:x}", "=v,=v,0,1,~{dirflag},~{fpsr},~{flags}"(double %11, double %12)
%14 = extractvalue { double, double } %13, 0
%15 = extractvalue { double, double } %13, 1
store double %14, double* %5
store double %15, double* %6
%16 = load double, double* %5
%17 = load double, double* %6
%18 = fsub double %16, %17
ret double %18
}

LLVM IR (-O2):
define double @sub_df(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %0
%4 = load double, double* %1
%5 = tail call { double, double } asm "# reg ${0:x}, ${1:x}", "=v,=v,0,1,~{dirflag},~{fpsr},~{flags}"(double %3, double %4)
%6 = extractvalue { double, double } %5, 0
%7 = extractvalue { double, double } %5, 1
%8 = fsub double %6, %7
ret double %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void print_usage(char const *program) {
  printf("Usage: %s [OPTION]...\n"
         "A simple experimental HTTP server.\n"
         "\n"
         "Options (with default values shown):\n"
         "  -h              show this help\n"
         "  -a 0.0.0.0      IP address to bind to\n"
         "  -p 8080         port number to listen on\n"
         "  -r .            directory to serve from\n",
         program);
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [254 x i8] c"Usage: %s [OPTION]...\0AA simple experimental HTTP server.\0A\0AOptions (with default values shown):\0A -h show this help\0A -a 0.0.0.0 IP address to bind to\0A -p 8080 port number to listen on\0A -r . directory to serve from\0A\00"
define void @print_usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([254 x i8], [254 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [254 x i8] c"Usage: %s [OPTION]...\0AA simple experimental HTTP server.\0A\0AOptions (with default values shown):\0A -h show this help\0A -a 0.0.0.0 IP address to bind to\0A -p 8080 port number to listen on\0A -r . directory to serve from\0A\00"
define void @print_usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([254 x i8], [254 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void chunkID(char *buf, char id[4]) {
  buf[0] = id[0];
  buf[1] = id[1];
  buf[2] = id[2];
  buf[3] = id[3];
}


x86 assembly (clang, -O0):
<chunkID>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
mov    0x1(%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x10(%rbp),%rax
mov    0x2(%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0x10(%rbp),%rax
mov    0x3(%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<chunkID>:
mov    (%rsi),%al
mov    %al,(%rdi)
mov    0x1(%rsi),%al
mov    %al,0x1(%rdi)
mov    0x2(%rsi),%al
mov    %al,0x2(%rdi)
mov    0x3(%rsi),%al
mov    %al,0x3(%rdi)
ret

LLVM IR (-O0):
define void @chunkID(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = getelementptr inbounds i8, i8* %5, i64 0
%7 = load i8, i8* %6
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 0
store i8 %7, i8* %9
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %11
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i64 1
store i8 %12, i8* %14
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i64 2
%17 = load i8, i8* %16
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i64 2
store i8 %17, i8* %19
%20 = load i8*, i8** %4
%21 = getelementptr inbounds i8, i8* %20, i64 3
%22 = load i8, i8* %21
%23 = load i8*, i8** %3
%24 = getelementptr inbounds i8, i8* %23, i64 3
store i8 %22, i8* %24
ret void
}

LLVM IR (-O2):
define void @chunkID(i8* nocapture writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
store i8 %3, i8* %0
%4 = getelementptr inbounds i8, i8* %1, i64 1
%5 = load i8, i8* %4
%6 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %5, i8* %6
%7 = getelementptr inbounds i8, i8* %1, i64 2
%8 = load i8, i8* %7
%9 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %8, i8* %9
%10 = getelementptr inbounds i8, i8* %1, i64 3
%11 = load i8, i8* %10
%12 = getelementptr inbounds i8, i8* %0, i64 3
store i8 %11, i8* %12
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int quaddobl_diagonal_homotopy(int a, int b) {
  int fail;
  double *c;
  fail = _ada_use_c2phc4c(290, &a, &b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<quaddobl_diagonal_homotopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x18(%rbp),%rcx
mov    $0x122,%edi
lea    -0x4(%rbp),%rsi
lea    -0x8(%rbp),%rdx
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quaddobl_diagonal_homotopy>:
push   %rax
mov    %edi,0x4(%rsp)
mov    %esi,(%rsp)
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
mov    $0x122,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @quaddobl_diagonal_homotopy(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca double*
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load double*, double** %6
%8 = call i32 @_ada_use_c2phc4c(i32 290, i32* %3, i32* %4, double* %7, i32 0)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @quaddobl_diagonal_homotopy(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @_ada_use_c2phc4c(i32 290, i32* %3, i32* %4, double* undef, i32 0)
ret i32 %5
}
void SplitUVRow_Any_SSE2() {}


x86 assembly (clang, -O0):
<SplitUVRow_Any_SSE2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SplitUVRow_Any_SSE2>:
ret

LLVM IR (-O0):
define void @SplitUVRow_Any_SSE2() {
ret void
}

LLVM IR (-O2):
define void @SplitUVRow_Any_SSE2() {
ret void
}
/* Variables and functions */
float const _get_float();
float _get_float_max(const float *max) { return _get_float() * (*max); }


x86 assembly (clang, -O0):
<_get_float_max>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <_get_float@plt>
mov    -0x8(%rbp),%rax
mulss  (%rax),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_get_float_max>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <_get_float@plt>
mulss  (%rbx),%xmm0
pop    %rbx
ret

LLVM IR (-O0):
define float @_get_float_max(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = call float (...) @_get_float()
%4 = load float*, float** %2
%5 = load float, float* %4
%6 = fmul float %3, %5
ret float %6
}

LLVM IR (-O2):
define float @_get_float_max(float* nocapture %0) {
%2 = tail call float (...) @_get_float()
%3 = load float, float* %0
%4 = fmul float %2, %3
ret float %4
}
/* Variables and functions */
int u8isasciiletteri(int /*<<< orphan*/);
int /*<<< orphan*/ u8tointcc(char const *);
int u8isasciilettercc(const char *c) { return u8isasciiletteri(u8tointcc(c)); }


x86 assembly (clang, -O0):
<u8isasciilettercc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <u8tointcc@plt>
mov    %eax,%edi
call   1040 <u8isasciiletteri@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<u8isasciilettercc>:
push   %rax
call   1030 <u8tointcc@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <u8isasciiletteri@plt>

LLVM IR (-O0):
define i32 @u8isasciilettercc(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @u8tointcc(i8* %3)
%5 = call i32 @u8isasciiletteri(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @u8isasciilettercc(i8* %0) {
%2 = tail call i32 @u8tointcc(i8* %0)
%3 = tail call i32 @u8isasciiletteri(i32 %2)
ret i32 %3
}
void USART2_IRQHandler(void) {}


x86 assembly (clang, -O0):
<USART2_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<USART2_IRQHandler>:
ret

LLVM IR (-O0):
define void @USART2_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @USART2_IRQHandler() {
ret void
}
/* Variables and functions */
scalar_t__ getplanes();
int getpla_() { return ((int)getplanes()); }


x86 assembly (clang, -O0):
<getpla_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getplanes@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getpla_>:
xor    %eax,%eax
jmp    1030 <getplanes@plt>

LLVM IR (-O0):
define i32 @getpla_() {
%1 = call i64 (...) @getplanes()
%2 = trunc i64 %1 to i32
ret i32 %2
}

LLVM IR (-O2):
define i32 @getpla_() {
%1 = tail call i64 (...) @getplanes()
%2 = trunc i64 %1 to i32
ret i32 %2
}
void save_forward_arrays_adios_(void) {}


x86 assembly (clang, -O0):
<save_forward_arrays_adios_>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<save_forward_arrays_adios_>:
ret

LLVM IR (-O0):
define void @save_forward_arrays_adios_() {
ret void
}

LLVM IR (-O2):
define void @save_forward_arrays_adios_() {
ret void
}
int test_imm_F3uint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0xF3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F3uint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0xf3,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F3uint64_highword_reg>:
movabs $0xf300000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F3uint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 243
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_F3uint64_highword_reg(i64 %0) {
%2 = and i64 %0, 1043677052928
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void subvf(double *result, const double s1) {
  result[0] -= s1;
  result[1] -= s1;
  result[2] -= s1;
}


x86 assembly (clang, -O0):
<subvf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm1
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
subsd  %xmm1,%xmm0
movsd  %xmm0,(%rax)
movsd  -0x10(%rbp),%xmm1
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
subsd  %xmm1,%xmm0
movsd  %xmm0,0x8(%rax)
movsd  -0x10(%rbp),%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
subsd  %xmm1,%xmm0
movsd  %xmm0,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<subvf>:
movupd (%rdi),%xmm1
movapd %xmm0,%xmm2
unpcklpd %xmm0,%xmm2
subpd  %xmm2,%xmm1
movupd %xmm1,(%rdi)
movsd  0x10(%rdi),%xmm1
subsd  %xmm0,%xmm1
movsd  %xmm1,0x10(%rdi)
ret

LLVM IR (-O0):
define void @subvf(double* %0, double %1) {
%3 = alloca double*
%4 = alloca double
store double* %0, double** %3
store double %1, double* %4
%5 = load double, double* %4
%6 = load double*, double** %3
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = fsub double %8, %5
store double %9, double* %7
%10 = load double, double* %4
%11 = load double*, double** %3
%12 = getelementptr inbounds double, double* %11, i64 1
%13 = load double, double* %12
%14 = fsub double %13, %10
store double %14, double* %12
%15 = load double, double* %4
%16 = load double*, double** %3
%17 = getelementptr inbounds double, double* %16, i64 2
%18 = load double, double* %17
%19 = fsub double %18, %15
store double %19, double* %17
ret void
}

LLVM IR (-O2):
define void @subvf(double* nocapture %0, double %1) {
%3 = bitcast double* %0 to <2 x double>*
%4 = load <2 x double>, <2 x double>* %3
%5 = insertelement <2 x double> poison, double %1, i64 0
%6 = shufflevector <2 x double> %5, <2 x double> poison, <2 x i32> zeroinitializer
%7 = fsub <2 x double> %4, %6
%8 = bitcast double* %0 to <2 x double>*
store <2 x double> %7, <2 x double>* %8
%9 = getelementptr inbounds double, double* %0, i64 2
%10 = load double, double* %9
%11 = fsub double %10, %1
store double %11, double* %9
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void bgpmon_free(void **space) {
  free(*space);
  (*space) = NULL;
}


x86 assembly (clang, -O0):
<bgpmon_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bgpmon_free>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <free@plt>
movq   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @bgpmon_free(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
%5 = call i32 @free(i8* %4)
%6 = load i8**, i8*** %2
store i8* null, i8** %6
ret void
}

LLVM IR (-O2):
define void @bgpmon_free(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = tail call i32 @free(i8* %2)
store i8* null, i8** %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ X509_ALGOR;

/* Variables and functions */
int /*<<< orphan*/ *ASN1_item_dup(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ X509_ALGOR_it;
X509_ALGOR *X509_ALGOR_dup(X509_ALGOR *x) {
  return ASN1_item_dup(&X509_ALGOR_it, x);
}


x86 assembly (clang, -O0):
<X509_ALGOR_dup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    0x2ec1(%rip),%rdi
call   1030 <ASN1_item_dup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_ALGOR_dup>:
mov    %rdi,%rsi
mov    0x2ece(%rip),%rdi
jmp    1030 <ASN1_item_dup@plt>

LLVM IR (-O0):
@X509_ALGOR_it = global i32 0
define i32* @X509_ALGOR_dup(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32* @ASN1_item_dup(i32* @X509_ALGOR_it, i32* %3)
ret i32* %4
}

LLVM IR (-O2):
@X509_ALGOR_it = global i32 0
define i32* @X509_ALGOR_dup(i32* %0) {
%2 = tail call i32* @ASN1_item_dup(i32* @X509_ALGOR_it, i32* %0)
ret i32* %2
}
unsigned int pixel_get_g16(unsigned int pixel) {
  return (pixel & 0xFFFF0000) >> 16;
}


x86 assembly (clang, -O0):
<pixel_get_g16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffff0000,%eax
shr    $0x10,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pixel_get_g16>:
mov    %edi,%eax
shr    $0x10,%eax
ret

LLVM IR (-O0):
define i32 @pixel_get_g16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -65536
%5 = lshr i32 %4, 16
ret i32 %5
}

LLVM IR (-O2):
define i32 @pixel_get_g16(i32 %0) {
%2 = lshr i32 %0, 16
ret i32 %2
}