xunge/DecIR huggingface dataset:
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int stat(char const *, struct stat *);
int __gnat_florist_stat(const char *path, struct stat *buf) {
  return stat(path, buf);
}


x86 assembly (clang, -O0):
<__gnat_florist_stat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <stat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__gnat_florist_stat>:
jmp    1030 <stat@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @__gnat_florist_stat(i8* %0, %struct.stat* %1) {
%3 = alloca i8*
%4 = alloca %struct.stat*
store i8* %0, i8** %3
store %struct.stat* %1, %struct.stat** %4
%5 = load i8*, i8** %3
%6 = load %struct.stat*, %struct.stat** %4
%7 = call i32 @stat(i8* %5, %struct.stat* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @__gnat_florist_stat(i8* nocapture %0, %struct.stat* nocapture %1) {
%3 = tail call i32 @stat(i8* %0, %struct.stat* %1)
ret i32 %3
}
/* Variables and functions */
int getDigits(int);
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  printf("Enter N: ");
  int n;
  scanf("%d", &n);
  printf("Number of digits is : %d", getDigits(n));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xed3(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x4(%rbp),%edi
call   1050 <getDigits@plt>
mov    %eax,%esi
lea    0xea3(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xeda(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%edi
call   1050 <getDigits@plt>
lea    0xeaa(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"Enter N: \00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [25 x i8] c"Number of digits is : %d\00"
define i32 @main() {
%1 = alloca i32
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @getDigits(i32 %4)
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"Enter N: \00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [25 x i8] c"Number of digits is : %d\00"
define i32 @main() {
%1 = alloca i32
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%3 = bitcast i32* %1 to i8*
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @getDigits(i32 %5)
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0), i32 %6)
ret i32 0
}
/* Variables and functions */
void *qdev_create(int /*<<< orphan*/ *, char *);
int /*<<< orphan*/ set_property_ptr(void *, char *, void *);
void *armv7m_nvic_init(void *dev, void *init_data) {
  void *nvic_data = qdev_create(NULL, "armv7m_nvic");
  set_property_ptr(dev, "nvic_data", nvic_data);
  return dev;
}


x86 assembly (clang, -O0):
<armv7m_nvic_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    %eax,%edi
lea    0xec5(%rip),%rsi
call   1030 <qdev_create@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rdx
lea    0xeb9(%rip),%rsi
call   1040 <set_property_ptr@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<armv7m_nvic_init>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rsi
xor    %edi,%edi
call   1030 <qdev_create@plt>
lea    0xed3(%rip),%rsi
mov    %rbx,%rdi
mov    %rax,%rdx
call   1040 <set_property_ptr@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"armv7m_nvic\00"
@.str.1 = [10 x i8] c"nvic_data\00"
define i8* @armv7m_nvic_init(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = call i8* @qdev_create(i32* null, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
store i8* %6, i8** %5
%7 = load i8*, i8** %3
%8 = load i8*, i8** %5
%9 = call i32 @set_property_ptr(i8* %7, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i8* %8)
%10 = load i8*, i8** %3
ret i8* %10
}

LLVM IR (-O2):
@.str = [12 x i8] c"armv7m_nvic\00"
@.str.1 = [10 x i8] c"nvic_data\00"
define i8* @armv7m_nvic_init(i8* returned %0, i8* nocapture readnone %1) {
%3 = tail call i8* @qdev_create(i32* null, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @set_property_ptr(i8* %0, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret i8* %0
}
/* Variables and functions */
char *appaserver_parameter_file_get_appaserver_mount_point();
int /*<<< orphan*/ set_path(char *);
int /*<<< orphan*/ sprintf(char *, char *, char *, char *);
void add_src_appaserver_to_path(void) {
  char *appaserver_mount_point;
  char bin_path[256];
  appaserver_mount_point =
      appaserver_parameter_file_get_appaserver_mount_point();
  sprintf(bin_path, "%s/%s", appaserver_mount_point, "src_appaserver");
  set_path(bin_path);
}


x86 assembly (clang, -O0):
<add_src_appaserver_to_path>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
mov    $0x0,%al
call   1030 <appaserver_parameter_file_get_appaserver_mount_point@plt>
mov    %rax,-0x8(%rbp)
lea    -0x110(%rbp),%rdi
mov    -0x8(%rbp),%rdx
lea    0xea8(%rip),%rsi
lea    0xea7(%rip),%rcx
call   1040 <sprintf@plt>
lea    -0x110(%rbp),%rdi
call   1050 <set_path@plt>
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_src_appaserver_to_path>:
push   %rbx
sub    $0x100,%rsp
xor    %eax,%eax
call   1030 <appaserver_parameter_file_get_appaserver_mount_point@plt>
lea    0xeba(%rip),%rsi
lea    0xeb9(%rip),%rcx
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    %rax,%rdx
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1050 <set_path@plt>
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%s/%s\00"
@.str.1 = [15 x i8] c"src_appaserver\00"
define void @add_src_appaserver_to_path() {
%1 = alloca i8*
%2 = alloca [256 x i8]
%3 = call i8* (...) @appaserver_parameter_file_get_appaserver_mount_point()
store i8* %3, i8** %1
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %2, i64 0, i64 0
%5 = load i8*, i8** %1
%6 = call i32 @sprintf(i8* %4, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %5, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
%7 = getelementptr inbounds [256 x i8], [256 x i8]* %2, i64 0, i64 0
%8 = call i32 @set_path(i8* %7)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"%s/%s\00"
@.str.1 = [15 x i8] c"src_appaserver\00"
define void @add_src_appaserver_to_path() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = tail call i8* (...) @appaserver_parameter_file_get_appaserver_mount_point()
%4 = call i32 @sprintf(i8* %2, i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %3, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
%5 = call i32 @set_path(i8* %2)
ret void
}
/* Type definitions */
struct vec2 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ vec2_abs(float *, float *);
__attribute__((always_)) struct vec2 *psvec2_abs(struct vec2 *result,
                                                 struct vec2 *a) {
  vec2_abs((float *)result, (float *)a);
  return result;
}


x86 assembly (clang, -O0):
<psvec2_abs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <vec2_abs@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec2_abs>:
push   %rbx
mov    %rdi,%rbx
call   1030 <vec2_abs@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vec2 = type { i32 }
define %struct.vec2* @psvec2_abs(%struct.vec2* %0, %struct.vec2* %1) {
%3 = alloca %struct.vec2*
%4 = alloca %struct.vec2*
store %struct.vec2* %0, %struct.vec2** %3
store %struct.vec2* %1, %struct.vec2** %4
%5 = load %struct.vec2*, %struct.vec2** %3
%6 = bitcast %struct.vec2* %5 to float*
%7 = load %struct.vec2*, %struct.vec2** %4
%8 = bitcast %struct.vec2* %7 to float*
%9 = call i32 @vec2_abs(float* %6, float* %8)
%10 = load %struct.vec2*, %struct.vec2** %3
ret %struct.vec2* %10
}

LLVM IR (-O2):
%struct.vec2 = type { i32 }
define %struct.vec2* @psvec2_abs(%struct.vec2* returned %0, %struct.vec2* %1) {
%3 = bitcast %struct.vec2* %0 to float*
%4 = bitcast %struct.vec2* %1 to float*
%5 = tail call i32 @vec2_abs(float* %3, float* %4)
ret %struct.vec2* %0
}
int test_imm_E0uint8_reg(unsigned char val) {
  return ((val) & (0xE0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E0uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xe0,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E0uint8_reg>:
cmp    $0x20,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E0uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 224
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E0uint8_reg(i8 zeroext %0) {
%2 = icmp ult i8 %0, 32
%3 = select i1 %2, i32 -40, i32 -20
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int, int, int);
void type2_name(char *res, int w, int s, int v) {
  sprintf(res, "w%2.2lds%2.2ldv%2.2ld", w, s, v);
}


x86 assembly (clang, -O0):
<type2_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
lea    0xec6(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<type2_name>:
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
lea    0xee2(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"w%2.2lds%2.2ldv%2.2ld\00"
define void @type2_name(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @sprintf(i8* %9, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %10, i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"w%2.2lds%2.2ldv%2.2ld\00"
define void @type2_name(i8* nocapture writeonly %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %1, i32 %2, i32 %3)
ret void
}
const char *net_hostname_get(void) { return "zephyr"; }


x86 assembly (clang, -O0):
<net_hostname_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<net_hostname_get>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [7 x i8] c"zephyr\00"
define i8* @net_hostname_get() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [7 x i8] c"zephyr\00"
define i8* @net_hostname_get() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ mult_and_print(int, int);
int main() { mult_and_print(12, 34); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc,%edi
mov    $0x22,%esi
call   1030 <mult_and_print@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xc,%edi
mov    $0x22,%esi
call   1030 <mult_and_print@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @mult_and_print(i32 12, i32 34)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @mult_and_print(i32 12, i32 34)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ gsc_styled_string(int, char const *);
void gsc_standout_string(const char *message) {
  gsc_styled_string((1), message);
}


x86 assembly (clang, -O0):
<gsc_standout_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x1,%edi
call   1030 <gsc_styled_string@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gsc_standout_string>:
mov    %rdi,%rsi
mov    $0x1,%edi
jmp    1030 <gsc_styled_string@plt>

LLVM IR (-O0):
define void @gsc_standout_string(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @gsc_styled_string(i32 1, i8* %3)
ret void
}

LLVM IR (-O2):
define void @gsc_standout_string(i8* %0) {
%2 = tail call i32 @gsc_styled_string(i32 1, i8* %0)
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
const int *const get_num3() {
  int *x = (int *)malloc(sizeof(int) * 1);
  *x = 3;
  return x;
}


x86 assembly (clang, -O0):
<get_num3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x3,(%rax)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_num3>:
push   %rax
mov    $0x4,%edi
call   1030 <malloc@plt>
movl   $0x3,(%rax)
pop    %rcx
ret

LLVM IR (-O0):
define i32* @get_num3() {
%1 = alloca i32*
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32* %3, i32** %1
%4 = load i32*, i32** %1
store i32 3, i32* %4
%5 = load i32*, i32** %1
ret i32* %5
}

LLVM IR (-O2):
define i32* @get_num3() {
%1 = tail call i64 @malloc(i32 4)
%2 = inttoptr i64 %1 to i32*
store i32 3, i32* %2
ret i32* %2
}
/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ memcpy(char *, char *, int);
char *MergeOperatorPartialMerge(void *arg, const char *key, size_t key_length,
                                const char *const *operands_list,
                                const size_t *operands_list_length,
                                int num_operands, unsigned char *success,
                                size_t *new_value_length) {
  *new_value_length = 4;
  *success = 1;
  char *result = malloc(4);
  memcpy(result, "fake", 4);
  return result;
}


x86 assembly (clang, -O0):
<MergeOperatorPartialMerge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9d,-0x2c(%rbp)
mov    0x18(%rbp),%rax
movq   $0x4,(%rax)
mov    0x10(%rbp),%rax
movb   $0x1,(%rax)
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x38(%rbp)
mov    -0x38(%rbp),%rdi
lea    0xe8d(%rip),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    -0x38(%rbp),%rax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MergeOperatorPartialMerge>:
push   %rbx
mov    0x10(%rsp),%rax
mov    0x18(%rsp),%rcx
movq   $0x4,(%rcx)
movb   $0x1,(%rax)
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
lea    0xeb7(%rip),%rsi
mov    %rax,%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"fake\00"
define i8* @MergeOperatorPartialMerge(i8* %0, i8* %1, i64 %2, i8** %3, i64* %4, i32 %5, i8* %6, i64* %7) {
%9 = alloca i8*
%10 = alloca i8*
%11 = alloca i64
%12 = alloca i8**
%13 = alloca i64*
%14 = alloca i32
%15 = alloca i8*
%16 = alloca i64*
%17 = alloca i8*
store i8* %0, i8** %9
store i8* %1, i8** %10
store i64 %2, i64* %11
store i8** %3, i8*** %12
store i64* %4, i64** %13
store i32 %5, i32* %14
store i8* %6, i8** %15
store i64* %7, i64** %16
%18 = load i64*, i64** %16
store i64 4, i64* %18
%19 = load i8*, i8** %15
store i8 1, i8* %19
%20 = call i8* @malloc(i32 4)
store i8* %20, i8** %17
%21 = load i8*, i8** %17
%22 = call i32 @memcpy(i8* %21, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 4)
%23 = load i8*, i8** %17
ret i8* %23
}

LLVM IR (-O2):
@.str = [5 x i8] c"fake\00"
define i8* @MergeOperatorPartialMerge(i8* nocapture readnone %0, i8* nocapture readnone %1, i64 %2, i8** nocapture readnone %3, i64* nocapture readnone %4, i32 %5, i8* nocapture writeonly %6, i64* nocapture writeonly %7) {
store i64 4, i64* %7
store i8 1, i8* %6
%9 = tail call dereferenceable_or_null(4) i8* @malloc(i32 4)
%10 = tail call i32 @memcpy(i8* %9, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 4)
ret i8* %9
}
void Nop() { ; }


x86 assembly (clang, -O0):
<Nop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Nop>:
ret

LLVM IR (-O0):
define void @Nop() {
ret void
}

LLVM IR (-O2):
define void @Nop() {
ret void
}
int check_lex(char *w, int n) {
  int i, k = 0;
  for (i = n - 1; i > 0; i--) {
    if (*(w + i - 1) < *(w + i)) {
      k = i - 1;
      break;
    }
  }
  return k;
}


x86 assembly (clang, -O0):
<check_lex>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jle    1167 <check_lex+0x67>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movsbl -0x1(%rax,%rcx,1),%eax
mov    -0x8(%rbp),%rcx
movslq -0x10(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
cmp    %ecx,%eax
jge    1154 <check_lex+0x54>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1167 <check_lex+0x67>
jmp    1159 <check_lex+0x59>
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    111b <check_lex+0x1b>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_lex>:
mov    %esi,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
cmp    $0x2,%ecx
jl     112b <check_lex+0x2b>
movzbl -0x2(%rdi,%rcx,1),%edx
lea    -0x1(%rcx),%rax
cmp    -0x1(%rdi,%rcx,1),%dl
mov    %rax,%rcx
jge    1110 <check_lex+0x10>
add    $0xffffffff,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @check_lex(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %6
%7 = load i32, i32* %4
%8 = sub nsw i32 %7, 1
store i32 %8, i32* %5
br label %9
9: ; preds = %31, %2
%10 = load i32, i32* %5
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %34
12: ; preds = %9
%13 = load i8*, i8** %3
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = getelementptr inbounds i8, i8* %16, i64 -1
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = load i8*, i8** %3
%21 = load i32, i32* %5
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %20, i64 %22
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
%26 = icmp slt i32 %19, %25
br i1 %26, label %27, label %30
27: ; preds = %12
%28 = load i32, i32* %5
%29 = sub nsw i32 %28, 1
store i32 %29, i32* %6
br label %34
30: ; preds = %12
br label %31
31: ; preds = %30
%32 = load i32, i32* %5
%33 = add nsw i32 %32, -1
store i32 %33, i32* %5
br label %9
34: ; preds = %27, %9
%35 = load i32, i32* %6
ret i32 %35
}

LLVM IR (-O2):
define i32 @check_lex(i8* nocapture %0, i32 %1) {
%3 = zext i32 %1 to i64
br label %4
4: ; preds = %9, %2
%5 = phi i64 [ %6, %9 ], [ %3, %2 ]
%6 = add nsw i64 %5, -1
%7 = trunc i64 %5 to i32
%8 = icmp sgt i32 %7, 1
br i1 %8, label %9, label %18
9: ; preds = %4
%10 = getelementptr inbounds i8, i8* %0, i64 %6
%11 = getelementptr inbounds i8, i8* %10, i64 -1
%12 = load i8, i8* %11
%13 = load i8, i8* %10
%14 = icmp slt i8 %12, %13
br i1 %14, label %15, label %4
15: ; preds = %9
%16 = trunc i64 %5 to i32
%17 = add nsw i32 %16, -2
br label %18
18: ; preds = %4, %15
%19 = phi i32 [ %17, %15 ], [ 0, %4 ]
ret i32 %19
}
/* Type definitions */
typedef int /*<<< orphan*/ EC_KEY;
typedef int /*<<< orphan*/ BN_CTX;
typedef int /*<<< orphan*/ BIGNUM;

/* Variables and functions */
int ecdsa_sign_setup(int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                     int /*<<< orphan*/ **, int /*<<< orphan*/ **,
                     int /*<<< orphan*/ *, int /*<<< orphan*/);
int ecdsa_simple_sign_setup(EC_KEY *eckey, BN_CTX *ctx_in, BIGNUM **kinvp,
                            BIGNUM **rp) {
  return ecdsa_sign_setup(eckey, ctx_in, kinvp, rp, NULL, 0);
}


x86 assembly (clang, -O0):
<ecdsa_simple_sign_setup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
xor    %eax,%eax
mov    %eax,%r8d
xor    %r9d,%r9d
call   1030 <ecdsa_sign_setup@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ecdsa_simple_sign_setup>:
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <ecdsa_sign_setup@plt>

LLVM IR (-O0):
define i32 @ecdsa_simple_sign_setup(i32* %0, i32* %1, i32** %2, i32** %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32**
%8 = alloca i32**
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32** %2, i32*** %7
store i32** %3, i32*** %8
%9 = load i32*, i32** %5
%10 = load i32*, i32** %6
%11 = load i32**, i32*** %7
%12 = load i32**, i32*** %8
%13 = call i32 @ecdsa_sign_setup(i32* %9, i32* %10, i32** %11, i32** %12, i32* null, i32 0)
ret i32 %13
}

LLVM IR (-O2):
define i32 @ecdsa_simple_sign_setup(i32* %0, i32* %1, i32** %2, i32** %3) {
%5 = tail call i32 @ecdsa_sign_setup(i32* %0, i32* %1, i32** %2, i32** %3, i32* null, i32 0)
ret i32 %5
}
int rb_enc_mbclen(const char *p, const char *e) { return 1; }


x86 assembly (clang, -O0):
<rb_enc_mbclen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rb_enc_mbclen>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @rb_enc_mbclen(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 1
}

LLVM IR (-O2):
define i32 @rb_enc_mbclen(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 1
}
mltreply(prompt, buf, nbuf, eolchar) char *prompt;
char *buf;
int eolchar;
{ return (nextarg(prompt, buf, nbuf, eolchar)); }


x86 assembly (clang, -O0):
<mltreply>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
mov    $0x0,%al
call   1030 <nextarg@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mltreply>:
xor    %eax,%eax
jmp    1030 <nextarg@plt>

LLVM IR (-O0):
define i32 @mltreply(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 (i8*, i8*, i32, i32, ...) bitcast (i32 (...)* @nextarg to i32 (i8*, i8*, i32, i32, ...)*)(i8* %9, i8* %10, i32 %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @mltreply(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = tail call i32 (i8*, i8*, i32, i32, ...) bitcast (i32 (...)* @nextarg to i32 (i8*, i8*, i32, i32, ...)*)(i8* %0, i8* %1, i32 %2, i32 %3)
ret i32 %5
}
/* Variables and functions */
int PAPI_stop_counters(long long *, int);
void papif_stop_counters(long long *values, int *array_len, int *check) {
  *check = PAPI_stop_counters(values, *array_len);
}


x86 assembly (clang, -O0):
<papif_stop_counters>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
call   1030 <PAPI_stop_counters@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<papif_stop_counters>:
push   %rbx
mov    %rdx,%rbx
mov    (%rsi),%esi
call   1030 <PAPI_stop_counters@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @papif_stop_counters(i64* %0, i32* %1, i32* %2) {
%4 = alloca i64*
%5 = alloca i32*
%6 = alloca i32*
store i64* %0, i64** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i64*, i64** %4
%8 = load i32*, i32** %5
%9 = load i32, i32* %8
%10 = call i32 @PAPI_stop_counters(i64* %7, i32 %9)
%11 = load i32*, i32** %6
store i32 %10, i32* %11
ret void
}

LLVM IR (-O2):
define void @papif_stop_counters(i64* %0, i32* nocapture %1, i32* nocapture writeonly %2) {
%4 = load i32, i32* %1
%5 = tail call i32 @PAPI_stop_counters(i64* %0, i32 %4)
store i32 %5, i32* %2
ret void
}
int test_imm_B1uint16_mem(unsigned short *val) {
  return ((*val) & (0xB1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B1uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xb1,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B1uint16_mem>:
testb  $0xb1,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B1uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 177
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_B1uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 177
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ __p3dfft_MOD_p3dfft_setup(int *, int *, int *, int *, int *);
int /*<<< orphan*/ assert(int);
int p3dfft_get_precision();
void p3dfft_setup(int *dims, int nx, int ny, int nz, int overwrite) {
  if (sizeof(double) == sizeof(float)) {
    assert(p3dfft_get_precision() == 1);
  } else if (sizeof(double) == sizeof(double)) {
    assert(p3dfft_get_precision() == 2);
  } else {
    assert(0);
  }
  __p3dfft_MOD_p3dfft_setup(dims, &nx, &ny, &nz, &overwrite);
}


x86 assembly (clang, -O0):
<p3dfft_setup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    $0x0,%al
call   1050 <p3dfft_get_precision@plt>
cmp    $0x2,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
lea    -0x10(%rbp),%rdx
lea    -0x14(%rbp),%rcx
lea    -0x18(%rbp),%r8
call   1030 <__p3dfft_MOD_p3dfft_setup@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<p3dfft_setup>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %esi,0xc(%rsp)
mov    %edx,0x8(%rsp)
mov    %ecx,0x4(%rsp)
mov    %r8d,(%rsp)
xor    %eax,%eax
call   1050 <p3dfft_get_precision@plt>
xor    %edi,%edi
cmp    $0x2,%eax
sete   %dil
call   1040 <assert@plt>
lea    0xc(%rsp),%rsi
lea    0x8(%rsp),%rdx
lea    0x4(%rsp),%rcx
mov    %rsp,%r8
mov    %rbx,%rdi
call   1030 <__p3dfft_MOD_p3dfft_setup@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @p3dfft_setup(i32* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32* %0, i32** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = call i32 (...) @p3dfft_get_precision()
%12 = icmp eq i32 %11, 2
%13 = zext i1 %12 to i32
%14 = call i32 @assert(i32 %13)
%15 = load i32*, i32** %6
%16 = call i32 @__p3dfft_MOD_p3dfft_setup(i32* %15, i32* %7, i32* %8, i32* %9, i32* %10)
ret void
}

LLVM IR (-O2):
define void @p3dfft_setup(i32* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
store i32 %4, i32* %9
%10 = tail call i32 (...) @p3dfft_get_precision()
%11 = icmp eq i32 %10, 2
%12 = zext i1 %11 to i32
%13 = tail call i32 @assert(i32 %12)
%14 = call i32 @__p3dfft_MOD_p3dfft_setup(i32* %0, i32* %6, i32* %7, i32* %8, i32* %9)
ret void
}
int isgraph(int c) { return c >= '!' && c <= '~'; }


x86 assembly (clang, -O0):
<isgraph>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x21,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <isgraph+0x20>
cmpl   $0x7e,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isgraph>:
add    $0xffffffdf,%edi
xor    %eax,%eax
cmp    $0x5e,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isgraph(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 33
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 126
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isgraph(i32 %0) {
%2 = add i32 %0, -33
%3 = icmp ult i32 %2, 94
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
double log(int);
double T0L5(double e_NB, double L6rad, double Rsky) {
  return (1260.56 / log(1 + (e_NB * 607.76) / L6rad));
}


x86 assembly (clang, -O0):
<T0L5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  0xee1(%rip),%xmm1
mulsd  -0x8(%rbp),%xmm1
divsd  -0x10(%rbp),%xmm1
movsd  0xec7(%rip),%xmm0
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <log@plt>
movaps %xmm0,%xmm1
movsd  0xea7(%rip),%xmm0
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<T0L5>:
push   %rax
mulsd  0xee7(%rip),%xmm0
divsd  %xmm1,%xmm0
addsd  0xee3(%rip),%xmm0
cvttsd2si %xmm0,%edi
call   1030 <log@plt>
movsd  0xeda(%rip),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @T0L5(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = fmul double %7, 6.077600e+02
%9 = load double, double* %5
%10 = fdiv double %8, %9
%11 = fadd double 1.000000e+00, %10
%12 = fptosi double %11 to i32
%13 = call double @log(i32 %12)
%14 = fdiv double 1.260560e+03, %13
ret double %14
}

LLVM IR (-O2):
define double @T0L5(double %0, double %1, double %2) {
%4 = fmul double %0, 6.077600e+02
%5 = fdiv double %4, %1
%6 = fadd double %5, 1.000000e+00
%7 = fptosi double %6 to i32
%8 = tail call double @log(i32 %7)
%9 = fdiv double 1.260560e+03, %8
ret double %9
}
int test_imm_0Buint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x0B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Buint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0xb,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Buint64_midword_reg>:
test   $0xb0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Buint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 11
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_0Buint64_midword_reg(i64 %0) {
%2 = and i64 %0, 720896
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void granted() {
  printf("\nSomething really sensitive\n");
  return;
}


x86 assembly (clang, -O0):
<granted>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<granted>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"\0ASomething really sensitive\0A\00"
define void @granted() {
%1 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [28 x i8] c"\0ASomething really sensitive\00"
define void @granted() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
ret void
}
void hpgl_raise_window(int id) { id = id; }


x86 assembly (clang, -O0):
<hpgl_raise_window>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<hpgl_raise_window>:
ret

LLVM IR (-O0):
define void @hpgl_raise_window(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store i32 %3, i32* %2
ret void
}

LLVM IR (-O2):
define void @hpgl_raise_window(i32 %0) {
ret void
}
void *adder_open() { return 0; }


x86 assembly (clang, -O0):
<adder_open>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adder_open>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @adder_open() {
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @adder_open() {
ret i8* null
}
/* Variables and functions */
int partition(int *, int, int);
void quickSort(int a[], int l, int h) {
  int p;
  if (l < h) {
    p = partition(a, l, h);
    quickSort(a, l, p - 1);
    quickSort(a, p + 1, h);
  }
}


x86 assembly (clang, -O0):
<quickSort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <quickSort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quickSort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quickSort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quickSort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quickSort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quickSort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quickSort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quickSort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partition(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @quickSort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quickSort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
__attribute__((no)) void inner(void) {
  __asm__ __volatile__("movq $0x101, %%rax\n"
                       "movq $0x102, %%rbx\n"
                       "movq $0x103, %%rcx\n"
                       "movq $0x104, %%rdx\n"
                       "movq $0x105, %%rsi\n"
                       "movq $0x106, %%rdi\n"
                       "movq $0x107, %%r8\n"
                       "movq $0x108, %%r9\n"
                       "movq $0x109, %%r10\n"
                       "movq $0x10a, %%r11\n"
                       "movq $0x10b, %%r12\n"
                       "movq $0x10c, %%r13\n"
                       "movq $0x10d, %%r14\n"
                       "movq $0x10e, %%r15\n"
                       "movq $0x10f, %%rsp\n"
                       "movq $0x1234, (%%rax)\n"
                       "ud2"
                       :
                       :
                       : "memory", "%rax", "%rbx", "%rcx", "%rdx", "%rsi",
                         "%rdi", "%r8", "%r9", "%r10", "%r11", "%r12", "%r13",
                         "%r14", "%r15", "%rsp");
}


x86 assembly (clang, -O0):
<inner>:
push   %rbp
mov    %rsp,%rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
mov    $0x101,%rax
mov    $0x102,%rbx
mov    $0x103,%rcx
mov    $0x104,%rdx
mov    $0x105,%rsi
mov    $0x106,%rdi
mov    $0x107,%r8
mov    $0x108,%r9
mov    $0x109,%r10
mov    $0x10a,%r11
mov    $0x10b,%r12
mov    $0x10c,%r13
mov    $0x10d,%r14
mov    $0x10e,%r15
mov    $0x10f,%rsp
movq   $0x1234,(%rax)
ud2
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

x86 assembly (clang, -O2):
<inner>:
push   %rbp
mov    %rsp,%rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
mov    $0x101,%rax
mov    $0x102,%rbx
mov    $0x103,%rcx
mov    $0x104,%rdx
mov    $0x105,%rsi
mov    $0x106,%rdi
mov    $0x107,%r8
mov    $0x108,%r9
mov    $0x109,%r10
mov    $0x10a,%r11
mov    $0x10b,%r12
mov    $0x10c,%r13
mov    $0x10d,%r14
mov    $0x10e,%r15
mov    $0x10f,%rsp
movq   $0x1234,(%rax)
ud2
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @inner() {
ret void
}

LLVM IR (-O2):
define void @inner() {
tail call void asm sideeffect "movq $$0x101, %rax\0Amovq $$0x102, %rbx\0Amovq $$0x103, %rcx\0Amovq $$0x104, %rdx\0Amovq $$0x105, %rsi\0Amovq $$0x106, %rdi\0Amovq $$0x107, %r8\0Amovq $$0x108, %r9\0Amovq $$0x109, %r10\0Amovq $$0x10a, %r11\0Amovq $$0x10b, %r12\0Amovq $$0x10c, %r13\0Amovq $$0x10d, %r14\0Amovq $$0x10e, %r15\0Amovq $$0x10f, %rsp\0Amovq $$0x1234, (%rax)\0Aud2", "~{memory},~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{rsp},~{dirflag},~{fpsr},~{flags}"()
ret void
}
void set_log_output_function(char *func) {}


x86 assembly (clang, -O0):
<set_log_output_function>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_log_output_function>:
ret

LLVM IR (-O0):
define void @set_log_output_function(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @set_log_output_function(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void pipe_handle_end(int x) { exit(0); }


x86 assembly (clang, -O0):
<pipe_handle_end>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<pipe_handle_end>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @pipe_handle_end(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @pipe_handle_end(i32 %0) {
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ DecodeWord(int);
void DoComment(void) { (void)DecodeWord(25); }


x86 assembly (clang, -O0):
<DoComment>:
push   %rbp
mov    %rsp,%rbp
mov    $0x19,%edi
call   1030 <DecodeWord@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoComment>:
mov    $0x19,%edi
jmp    1030 <DecodeWord@plt>

LLVM IR (-O0):
define void @DoComment() {
%1 = call i32 @DecodeWord(i32 25)
ret void
}

LLVM IR (-O2):
define void @DoComment() {
%1 = tail call i32 @DecodeWord(i32 25)
ret void
}
/* Type definitions */
typedef int time_t;

/* Variables and functions */
time_t time___new_TimeT_from_i___impl(int i) { return i; }


x86 assembly (clang, -O0):
<time___new_TimeT_from_i___impl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<time___new_TimeT_from_i___impl>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @time___new_TimeT_from_i___impl(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @time___new_TimeT_from_i___impl(i32 returned %0) {
ret i32 %0
}
/* Type definitions */
struct spacedColumn {
  int dummy;
};
struct lineFile {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ lineFileClose(struct lineFile **);
struct lineFile *lineFileOpen(char *, int);
struct spacedColumn *spacedColumnFromLineFile(struct lineFile *);
struct spacedColumn *spacedColumnFromFile(char *fileName) {
  struct lineFile *lf = lineFileOpen(fileName, 1);
  struct spacedColumn *colList = spacedColumnFromLineFile(lf);
  lineFileClose(&lf);
  return colList;
}


x86 assembly (clang, -O0):
<spacedColumnFromFile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1050 <lineFileOpen@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <spacedColumnFromLineFile@plt>
mov    %rax,-0x18(%rbp)
lea    -0x10(%rbp),%rdi
call   1030 <lineFileClose@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spacedColumnFromFile>:
push   %rbx
sub    $0x10,%rsp
mov    $0x1,%esi
call   1050 <lineFileOpen@plt>
mov    %rax,0x8(%rsp)
mov    %rax,%rdi
call   1040 <spacedColumnFromLineFile@plt>
mov    %rax,%rbx
lea    0x8(%rsp),%rdi
call   1030 <lineFileClose@plt>
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.spacedColumn = type { i32 }
%struct.lineFile = type { i32 }
define %struct.spacedColumn* @spacedColumnFromFile(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.lineFile*
%4 = alloca %struct.spacedColumn*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call %struct.lineFile* @lineFileOpen(i8* %5, i32 1)
store %struct.lineFile* %6, %struct.lineFile** %3
%7 = load %struct.lineFile*, %struct.lineFile** %3
%8 = call %struct.spacedColumn* @spacedColumnFromLineFile(%struct.lineFile* %7)
store %struct.spacedColumn* %8, %struct.spacedColumn** %4
%9 = call i32 @lineFileClose(%struct.lineFile** %3)
%10 = load %struct.spacedColumn*, %struct.spacedColumn** %4
ret %struct.spacedColumn* %10
}

LLVM IR (-O2):
%struct.spacedColumn = type { i32 }
%struct.lineFile = type { i32 }
define %struct.spacedColumn* @spacedColumnFromFile(i8* %0) {
%2 = alloca %struct.lineFile*
%3 = bitcast %struct.lineFile** %2 to i8*
%4 = tail call %struct.lineFile* @lineFileOpen(i8* %0, i32 1)
store %struct.lineFile* %4, %struct.lineFile** %2
%5 = tail call %struct.spacedColumn* @spacedColumnFromLineFile(%struct.lineFile* %4)
%6 = call i32 @lineFileClose(%struct.lineFile** %2)
ret %struct.spacedColumn* %5
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0xe2() {
  Assert_real((isalpha(226) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              1135, ("isalpha should be 0 for 0xe2"));
}


x86 assembly (clang, -O0):
<t_isalpha_0xe2>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe2,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x46f,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0xe2>:
push   %rax
mov    $0xe2,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x46f,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xe2\00"
define void @t_isalpha_0xe2() {
%1 = call i64 @isalpha(i32 226)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1135, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xe2\00"
define void @t_isalpha_0xe2() {
%1 = tail call i64 @isalpha(i32 226)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1135, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int test_imm_D3uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0xD3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D3uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xd3,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D3uint64_lowword_mem>:
testb  $0xd3,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D3uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 211
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D3uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 211
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
unsigned int gnu_dev_major(unsigned long long int dev) {
  return ((dev >> 8) & 0xfff) | ((unsigned int)(dev >> 32) & ~0xfff);
}


x86 assembly (clang, -O0):
<gnu_dev_major>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x8,%rax
and    $0xfff,%rax
mov    -0x8(%rbp),%rcx
shr    $0x20,%rcx
and    $0xfffff000,%ecx
mov    %ecx,%ecx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gnu_dev_major>:
mov    %edi,%eax
shr    $0x8,%eax
and    $0xfff,%eax
shr    $0x20,%rdi
and    $0xfffff000,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @gnu_dev_major(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 8
%5 = and i64 %4, 4095
%6 = load i64, i64* %2
%7 = lshr i64 %6, 32
%8 = trunc i64 %7 to i32
%9 = and i32 %8, -4096
%10 = zext i32 %9 to i64
%11 = or i64 %5, %10
%12 = trunc i64 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @gnu_dev_major(i64 %0) {
%2 = lshr i64 %0, 8
%3 = and i64 %2, 4095
%4 = lshr i64 %0, 32
%5 = and i64 %4, 4294963200
%6 = or i64 %3, %5
%7 = trunc i64 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char const);
char uart0_putc(const char c) {
  putchar(c);
  return c;
}


x86 assembly (clang, -O0):
<uart0_putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <putchar@plt>
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart0_putc>:
push   %rbx
mov    %edi,%ebx
call   1030 <putchar@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define signext i8 @uart0_putc(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @putchar(i8 signext %3)
%5 = load i8, i8* %2
ret i8 %5
}

LLVM IR (-O2):
define signext i8 @uart0_putc(i8 returned signext %0) {
%2 = tail call i32 @putchar(i8 signext %0)
ret i8 %0
}