xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int int16_t;

/* Variables and functions */
void quicksort_doHeavyWork(void) {
  for (int16_t __i = 0; __i < (1000); __i++) {
    for (int16_t __j = 0; __j < (1000); __j++) {
      __j *__j *__j;
    }
  }
}


x86 assembly (clang, -O0):
<quicksort_doHeavyWork>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0x3e8,-0x4(%rbp)
jge    114d <quicksort_doHeavyWork+0x4d>
movl   $0x0,-0x8(%rbp)
cmpl   $0x3e8,-0x8(%rbp)
jge    113a <quicksort_doHeavyWork+0x3a>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    111f <quicksort_doHeavyWork+0x1f>
jmp    113f <quicksort_doHeavyWork+0x3f>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <quicksort_doHeavyWork+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<quicksort_doHeavyWork>:
ret

LLVM IR (-O0):
define void @quicksort_doHeavyWork() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %20, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 1000
br i1 %5, label %6, label %23
6: ; preds = %3
store i32 0, i32* %2
br label %7
7: ; preds = %16, %6
%8 = load i32, i32* %2
%9 = icmp slt i32 %8, 1000
br i1 %9, label %10, label %19
10: ; preds = %7
%11 = load i32, i32* %2
%12 = load i32, i32* %2
%13 = mul nsw i32 %11, %12
%14 = load i32, i32* %2
%15 = mul nsw i32 %13, %14
br label %16
16: ; preds = %10
%17 = load i32, i32* %2
%18 = add nsw i32 %17, 1
store i32 %18, i32* %2
br label %7
19: ; preds = %7
br label %20
20: ; preds = %19
%21 = load i32, i32* %1
%22 = add nsw i32 %21, 1
store i32 %22, i32* %1
br label %3
23: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @quicksort_doHeavyWork() {
ret void
}
unsigned short bswap16(unsigned short x) {
  return ((x << 8) & 0xff00) | ((x >> 8) & 0x00ff);
}


x86 assembly (clang, -O0):
<bswap16>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
shl    $0x8,%eax
and    $0xff00,%eax
movzwl -0x2(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff,%ecx
or     %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bswap16>:
mov    %edi,%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define zeroext i16 @bswap16(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = shl i32 %4, 8
%6 = and i32 %5, 65280
%7 = load i16, i16* %2
%8 = zext i16 %7 to i32
%9 = ashr i32 %8, 8
%10 = and i32 %9, 255
%11 = or i32 %6, %10
%12 = trunc i32 %11 to i16
ret i16 %12
}

LLVM IR (-O2):
define zeroext i16 @bswap16(i16 zeroext %0) {
%2 = tail call i16 @llvm.bswap.i16(i16 %0)
ret i16 %2
}
void s3c6410_default_sdhci3(void) {}


x86 assembly (clang, -O0):
<s3c6410_default_sdhci3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s3c6410_default_sdhci3>:
ret

LLVM IR (-O0):
define void @s3c6410_default_sdhci3() {
ret void
}

LLVM IR (-O2):
define void @s3c6410_default_sdhci3() {
ret void
}
double module(double b) {
  if (b >= 0) {
    return b;
  }
  return -b;
}


x86 assembly (clang, -O0):
<module>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     112a <module+0x2a>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    114b <module+0x4b>
movsd  -0x10(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<module>:
movapd 0xef8(%rip),%xmm2
xorpd  %xmm0,%xmm2
xorpd  %xmm1,%xmm1
cmpnlesd %xmm0,%xmm1
andpd  %xmm1,%xmm2
andnpd %xmm0,%xmm1
orpd   %xmm2,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @module(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp oge double %4, 0.000000e+00
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load double, double* %3
store double %7, double* %2
br label %11
8: ; preds = %1
%9 = load double, double* %3
%10 = fneg double %9
store double %10, double* %2
br label %11
11: ; preds = %8, %6
%12 = load double, double* %2
ret double %12
}

LLVM IR (-O2):
define double @module(double %0) {
%2 = fcmp ult double %0, 0.000000e+00
%3 = fneg double %0
%4 = select i1 %2, double %3, double %0
ret double %4
}
int printUntil(int b[], int l) {
  int i, j = 0;
  for (i = (l - 1); b[i] == 1 || b[i] == 2; --i) {
    if (b[i] == 2) {
    } else
      ++j;
  }
  return i + 1;
}


x86 assembly (clang, -O0):
<printUntil>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
movslq -0x10(%rbp),%rdx
mov    $0x1,%al
cmpl   $0x1,(%rcx,%rdx,4)
mov    %al,-0x15(%rbp)
je     1144 <printUntil+0x44>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
cmpl   $0x2,(%rax,%rcx,4)
sete   %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
test   $0x1,%al
jne    1154 <printUntil+0x54>
jmp    1187 <printUntil+0x87>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
cmpl   $0x2,(%rax,%rcx,4)
jne    116b <printUntil+0x6b>
jmp    1174 <printUntil+0x74>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1179 <printUntil+0x79>
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    111b <printUntil+0x1b>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<printUntil>:
movslq %esi,%rcx
lea    0x1(%rcx),%eax
lea    (%rdi,%rcx,4),%rcx
add    $0xfffffffffffffffc,%rcx
xchg   %ax,%ax
mov    (%rcx),%edx
add    $0xffffffff,%edx
add    $0xffffffff,%eax
add    $0xfffffffffffffffc,%rcx
cmp    $0x2,%edx
jb     1110 <printUntil+0x10>
ret

LLVM IR (-O0):
define i32 @printUntil(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %6
%7 = load i32, i32* %4
%8 = sub nsw i32 %7, 1
store i32 %8, i32* %5
br label %9
9: ; preds = %37, %2
%10 = load i32*, i32** %3
%11 = load i32, i32* %5
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %10, i64 %12
%14 = load i32, i32* %13
%15 = icmp eq i32 %14, 1
br i1 %15, label %23, label %16
16: ; preds = %9
%17 = load i32*, i32** %3
%18 = load i32, i32* %5
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, i32* %17, i64 %19
%21 = load i32, i32* %20
%22 = icmp eq i32 %21, 2
br label %23
23: ; preds = %16, %9
%24 = phi i1 [ true, %9 ], [ %22, %16 ]
br i1 %24, label %25, label %40
25: ; preds = %23
%26 = load i32*, i32** %3
%27 = load i32, i32* %5
%28 = sext i32 %27 to i64
%29 = getelementptr inbounds i32, i32* %26, i64 %28
%30 = load i32, i32* %29
%31 = icmp eq i32 %30, 2
br i1 %31, label %32, label %33
32: ; preds = %25
br label %36
33: ; preds = %25
%34 = load i32, i32* %6
%35 = add nsw i32 %34, 1
store i32 %35, i32* %6
br label %36
36: ; preds = %33, %32
br label %37
37: ; preds = %36
%38 = load i32, i32* %5
%39 = add nsw i32 %38, -1
store i32 %39, i32* %5
br label %9
40: ; preds = %23
%41 = load i32, i32* %5
%42 = add nsw i32 %41, 1
ret i32 %42
}

LLVM IR (-O2):
define i32 @printUntil(i32* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
br label %4
4: ; preds = %4, %2
%5 = phi i64 [ %6, %4 ], [ %3, %2 ]
%6 = add nsw i64 %5, -1
%7 = getelementptr inbounds i32, i32* %0, i64 %6
%8 = load i32, i32* %7
%9 = add i32 %8, -1
%10 = icmp ult i32 %9, 2
br i1 %10, label %4, label %11
11: ; preds = %4
%12 = trunc i64 %5 to i32
ret i32 %12
}
double opr_mu0(struct lifo *stack) { return 1.25663706144E-06; }


x86 assembly (clang, -O0):
<opr_mu0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  0xef0(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<opr_mu0>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
%struct.lifo = type opaque
define double @opr_mu0(%struct.lifo* %0) {
%2 = alloca %struct.lifo*
store %struct.lifo* %0, %struct.lifo** %2
ret double 0x3EB515370F9A421B
}

LLVM IR (-O2):
%struct.lifo = type opaque
define double @opr_mu0(%struct.lifo* nocapture readnone %0) {
ret double 0x3EB515370F9A421B
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_attr_t;

/* Variables and functions */
int pthread_attr_getschedpolicy(int /*<<< orphan*/ *, int *);
int my_pthread_attr_getschedpolicy(pthread_attr_t const *__attr, int *policy) {
  pthread_attr_t *realattr = (pthread_attr_t *)*(unsigned int *)__attr;
  return pthread_attr_getschedpolicy(realattr, policy);
}


x86 assembly (clang, -O0):
<my_pthread_attr_getschedpolicy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <pthread_attr_getschedpolicy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_pthread_attr_getschedpolicy>:
mov    (%rdi),%edi
jmp    1030 <pthread_attr_getschedpolicy@plt>

LLVM IR (-O0):
define i32 @my_pthread_attr_getschedpolicy(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store i32* %9, i32** %5
%10 = load i32*, i32** %5
%11 = load i32*, i32** %4
%12 = call i32 @pthread_attr_getschedpolicy(i32* %10, i32* %11)
ret i32 %12
}

LLVM IR (-O2):
define i32 @my_pthread_attr_getschedpolicy(i32* nocapture %0, i32* %1) {
%3 = load i32, i32* %0
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = tail call i32 @pthread_attr_getschedpolicy(i32* %5, i32* %1)
ret i32 %6
}
int test_imm_1Duint8_reg(unsigned char val) {
  return ((val) & (-0x1D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Duint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffffe3,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Duint8_reg>:
test   $0xe3,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Duint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -29
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_1Duint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -29
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void swap(char *a, char *b) {
  char auxillary = *a;
  *a = *b;
  *b = auxillary;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x11(%rbp),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi),%al
mov    (%rsi),%cl
mov    %cl,(%rdi)
mov    %al,(%rsi)
ret

LLVM IR (-O0):
define void @swap(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
store i8 %7, i8* %5
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = load i8*, i8** %3
store i8 %9, i8* %10
%11 = load i8, i8* %5
%12 = load i8*, i8** %4
store i8 %11, i8* %12
ret void
}

LLVM IR (-O2):
define void @swap(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
store i8 %4, i8* %0
store i8 %3, i8* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ rtc_set_time(int /*<<< orphan*/ *);
int rtc_systohc() {
  if (!rtc_set_time(NULL)) {
    return 0;
  }
  return -1;
}


x86 assembly (clang, -O0):
<rtc_systohc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
mov    %eax,%edi
call   1030 <rtc_set_time@plt>
cmp    $0x0,%eax
jne    1136 <rtc_systohc+0x26>
movl   $0x0,-0x4(%rbp)
jmp    113d <rtc_systohc+0x2d>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtc_systohc>:
push   %rax
xor    %edi,%edi
call   1030 <rtc_set_time@plt>
neg    %eax
sbb    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @rtc_systohc() {
%1 = alloca i32
%2 = call i32 @rtc_set_time(i32* null)
%3 = icmp ne i32 %2, 0
br i1 %3, label %5, label %4
4: ; preds = %0
store i32 0, i32* %1
br label %6
5: ; preds = %0
store i32 -1, i32* %1
br label %6
6: ; preds = %5, %4
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
define i32 @rtc_systohc() {
%1 = tail call i32 @rtc_set_time(i32* null)
%2 = icmp ne i32 %1, 0
%3 = sext i1 %2 to i32
ret i32 %3
}
void proc39() {}


x86 assembly (clang, -O0):
<proc39>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<proc39>:
ret

LLVM IR (-O0):
define void @proc39() {
ret void
}

LLVM IR (-O2):
define void @proc39() {
ret void
}
/* Type definitions */
struct drm_file {
  int dummy;
};
struct drm_device {
  int dummy;
};

/* Variables and functions */
void g2d_close(struct drm_device *drm_dev, struct drm_file *file) {}


x86 assembly (clang, -O0):
<g2d_close>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<g2d_close>:
ret

LLVM IR (-O0):
%struct.drm_device = type { i32 }
%struct.drm_file = type { i32 }
define void @g2d_close(%struct.drm_device* %0, %struct.drm_file* %1) {
%3 = alloca %struct.drm_device*
%4 = alloca %struct.drm_file*
store %struct.drm_device* %0, %struct.drm_device** %3
store %struct.drm_file* %1, %struct.drm_file** %4
ret void
}

LLVM IR (-O2):
%struct.drm_device = type { i32 }
%struct.drm_file = type { i32 }
define void @g2d_close(%struct.drm_device* nocapture %0, %struct.drm_file* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
void calificar(void) {
  int calificacion;
  printf("Escribe tu calificacion: ");
  scanf("%d", &calificacion);
  if (calificacion >= 6)
    printf("Pasaste!\n");
  else
    printf("Reprobado\n");
}


x86 assembly (clang, -O0):
<calificar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
lea    0xedf(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1040 <scanf@plt>
cmpl   $0x6,-0x4(%rbp)
jl     115f <calificar+0x3f>
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
jmp    116b <calificar+0x4b>
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calificar>:
push   %rax
lea    0xec8(%rip),%rdi
call   1040 <printf@plt>
lea    0xed6(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
cmpl   $0x6,0x4(%rsp)
lea    0xecd(%rip),%rax
lea    0xebc(%rip),%rdi
cmovge %rax,%rdi
call   1030 <puts@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [26 x i8] c"Escribe tu calificacion: \00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [10 x i8] c"Pasaste!\0A\00"
@.str.3 = [11 x i8] c"Reprobado\0A\00"
define void @calificar() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = icmp sge i32 %4, 6
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0))
br label %10
8: ; preds = %0
%9 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.3, i64 0, i64 0))
br label %10
10: ; preds = %8, %6
ret void
}

LLVM IR (-O2):
@.str = [26 x i8] c"Escribe tu calificacion: \00"
@.str.1 = [3 x i8] c"%d\00"
@str = [10 x i8] c"Reprobado\00"
@str.4 = [9 x i8] c"Pasaste!\00"
define void @calificar() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = icmp sgt i32 %5, 5
%7 = select i1 %6, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @str.4, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0)
%8 = call i32 @puts(i8* dereferenceable(1) %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ input(int);
int /*<<< orphan*/ output(int);
main() {
  int a;
  input(a);
  a = a + 1;
  output(a);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x4(%rbp),%edi
call   1030 <input@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <output@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <input@plt>
call   1040 <output@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = load i32, i32* %1
%3 = call i32 @input(i32 %2)
%4 = load i32, i32* %1
%5 = add nsw i32 %4, 1
store i32 %5, i32* %1
%6 = load i32, i32* %1
%7 = call i32 @output(i32 %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @input(i32 undef)
%2 = tail call i32 @output(i32 undef)
ret i32 0
}
void convert_scientific(double dval, int which_case, char value[]) {
  int exp = 0;
  while (dval >= 10) {
    dval = dval / 10;
  }
}


x86 assembly (clang, -O0):
<convert_scientific>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xedc(%rip),%xmm1
ucomisd %xmm1,%xmm0
jb     1149 <convert_scientific+0x49>
movsd  -0x8(%rbp),%xmm0
movsd  0xec5(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1117 <convert_scientific+0x17>
pop    %rbp
ret

x86 assembly (clang, -O2):
<convert_scientific>:
ret

LLVM IR (-O0):
define void @convert_scientific(double %0, i32 %1, i8* %2) {
%4 = alloca double
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
store double %0, double* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
store i32 0, i32* %7
br label %8
8: ; preds = %11, %3
%9 = load double, double* %4
%10 = fcmp oge double %9, 1.000000e+01
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load double, double* %4
%13 = fdiv double %12, 1.000000e+01
store double %13, double* %4
br label %8
14: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @convert_scientific(double %0, i32 %1, i8* nocapture %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ do_exec();
void *thread_func(void *arg) {
  do_exec();
  return arg;
}


x86 assembly (clang, -O0):
<thread_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <do_exec@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread_func>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <do_exec@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @thread_func(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @do_exec()
%4 = load i8*, i8** %2
ret i8* %4
}

LLVM IR (-O2):
define i8* @thread_func(i8* readnone returned %0) {
%2 = tail call i32 (...) @do_exec()
ret i8* %0
}
void smp_wmb(void) { __asm __volatile("sfence" ::: "memory"); }


x86 assembly (clang, -O0):
<smp_wmb>:
push   %rbp
mov    %rsp,%rbp
sfence
pop    %rbp
ret

x86 assembly (clang, -O2):
<smp_wmb>:
sfence
ret

LLVM IR (-O0):
define void @smp_wmb() {
ret void
}

LLVM IR (-O2):
define void @smp_wmb() {
tail call void asm sideeffect "sfence", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ update_attributes();
int main(void) {
  update_attributes();
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <update_attributes@plt>
mov    0x2eb3(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <update_attributes@plt>
mov    0x2ec1(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @update_attributes()
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 (...) @update_attributes()
%2 = load i32, i32* @EXIT_SUCCESS
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int /*<<< orphan*/ swap(int *, int *);
int main() {
  int x = 10;
  int y = 20;
  swap(&x, &y);
  printf("x: %d, y: %d\n", x, y);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xa,-0x4(%rbp)
movl   $0x14,-0x8(%rbp)
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <swap@plt>
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xeb0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0xa,0x4(%rsp)
movl   $0x14,(%rsp)
lea    0x4(%rsp),%rdi
mov    %rsp,%rsi
call   1040 <swap@plt>
mov    0x4(%rsp),%esi
mov    (%rsp),%edx
lea    0xeb5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"x: %d, y: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 10, i32* %1
store i32 20, i32* %2
%3 = call i32 @swap(i32* %1, i32* %2)
%4 = load i32, i32* %1
%5 = load i32, i32* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"x: %d, y: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
store i32 10, i32* %1
%4 = bitcast i32* %2 to i8*
store i32 20, i32* %2
%5 = call i32 @swap(i32* %1, i32* %2)
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %6, i32 %7)
ret i32 0
}
/* Variables and functions */
int bgbbtj_bc7_bitcnt8(int);
int bgbbtj_bc7_bitcnt16(int i) {
  return (bgbbtj_bc7_bitcnt8(i) + bgbbtj_bc7_bitcnt8(i >> 8));
}


x86 assembly (clang, -O0):
<bgbbtj_bc7_bitcnt16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <bgbbtj_bc7_bitcnt8@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
sar    $0x8,%edi
call   1030 <bgbbtj_bc7_bitcnt8@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bgbbtj_bc7_bitcnt16>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
call   1030 <bgbbtj_bc7_bitcnt8@plt>
mov    %eax,%ebp
sar    $0x8,%ebx
mov    %ebx,%edi
call   1030 <bgbbtj_bc7_bitcnt8@plt>
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @bgbbtj_bc7_bitcnt16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @bgbbtj_bc7_bitcnt8(i32 %3)
%5 = load i32, i32* %2
%6 = ashr i32 %5, 8
%7 = call i32 @bgbbtj_bc7_bitcnt8(i32 %6)
%8 = add nsw i32 %4, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @bgbbtj_bc7_bitcnt16(i32 %0) {
%2 = tail call i32 @bgbbtj_bc7_bitcnt8(i32 %0)
%3 = ashr i32 %0, 8
%4 = tail call i32 @bgbbtj_bc7_bitcnt8(i32 %3)
%5 = add nsw i32 %4, %2
ret i32 %5
}
void resizeterm() {}


x86 assembly (clang, -O0):
<resizeterm>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<resizeterm>:
ret

LLVM IR (-O0):
define void @resizeterm() {
ret void
}

LLVM IR (-O2):
define void @resizeterm() {
ret void
}
int gcd(int *y1, int *y2) {
  while (*y1 != *y2) {
    if (*y1 > *y2) {
      *y1 = *y1 - *y2;
    } else {
      *y2 = *y2 - *y1;
    }
  }
  return *y1;
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%eax
je     115e <gcd+0x5e>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%eax
jle    1147 <gcd+0x47>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
sub    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
jmp    1159 <gcd+0x59>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
sub    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
jmp    110c <gcd+0xc>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    (%rdi),%edx
mov    (%rsi),%eax
cmp    %eax,%edx
jne    110b <gcd+0xb>
mov    %edx,%eax
ret
mov    %edx,%ecx
jmp    111c <gcd+0x1c>
nop
sub    %edx,%eax
mov    %eax,(%rsi)
mov    (%rdi),%ecx
mov    %ecx,%edx
cmp    %eax,%ecx
je     1126 <gcd+0x26>
sub    %eax,%ecx
jle    1110 <gcd+0x10>
mov    %ecx,(%rdi)
mov    (%rsi),%eax
jmp    1116 <gcd+0x16>
ret

LLVM IR (-O0):
define i32 @gcd(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
br label %5
5: ; preds = %31, %2
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = icmp ne i32 %7, %9
br i1 %10, label %11, label %32
11: ; preds = %5
%12 = load i32*, i32** %3
%13 = load i32, i32* %12
%14 = load i32*, i32** %4
%15 = load i32, i32* %14
%16 = icmp sgt i32 %13, %15
br i1 %16, label %17, label %24
17: ; preds = %11
%18 = load i32*, i32** %3
%19 = load i32, i32* %18
%20 = load i32*, i32** %4
%21 = load i32, i32* %20
%22 = sub nsw i32 %19, %21
%23 = load i32*, i32** %3
store i32 %22, i32* %23
br label %31
24: ; preds = %11
%25 = load i32*, i32** %4
%26 = load i32, i32* %25
%27 = load i32*, i32** %3
%28 = load i32, i32* %27
%29 = sub nsw i32 %26, %28
%30 = load i32*, i32** %4
store i32 %29, i32* %30
br label %31
31: ; preds = %24, %17
br label %5
32: ; preds = %5
%33 = load i32*, i32** %3
%34 = load i32, i32* %33
ret i32 %34
}

LLVM IR (-O2):
define i32 @gcd(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = icmp eq i32 %3, %4
br i1 %5, label %20, label %6
6: ; preds = %2, %16
%7 = phi i32 [ %17, %16 ], [ %4, %2 ]
%8 = phi i32 [ %18, %16 ], [ %3, %2 ]
%9 = icmp sgt i32 %8, %7
br i1 %9, label %10, label %13
10: ; preds = %6
%11 = sub nsw i32 %8, %7
store i32 %11, i32* %0
%12 = load i32, i32* %1
br label %16
13: ; preds = %6
%14 = sub nsw i32 %7, %8
store i32 %14, i32* %1
%15 = load i32, i32* %0
br label %16
16: ; preds = %13, %10
%17 = phi i32 [ %14, %13 ], [ %12, %10 ]
%18 = phi i32 [ %15, %13 ], [ %11, %10 ]
%19 = icmp eq i32 %18, %17
br i1 %19, label %20, label %6
20: ; preds = %16, %2
%21 = phi i32 [ %3, %2 ], [ %17, %16 ]
ret i32 %21
}
void test70_QueueBug_01_targetInit__I() {}


x86 assembly (clang, -O0):
<test70_QueueBug_01_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test70_QueueBug_01_targetInit__I>:
ret

LLVM IR (-O0):
define void @test70_QueueBug_01_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test70_QueueBug_01_targetInit__I() {
ret void
}
/* Variables and functions */
scalar_t__ calloc(int, int);
void *pointer_copy(void **to_copy) {
  void **v = (void **)calloc(1, sizeof(void *));
  *v = *(int **)to_copy;
  return v;
}


x86 assembly (clang, -O0):
<pointer_copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%edi
mov    $0x8,%esi
call   1030 <calloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pointer_copy>:
push   %rbx
mov    %rdi,%rbx
mov    $0x1,%edi
mov    $0x8,%esi
call   1030 <calloc@plt>
mov    (%rbx),%rcx
mov    %rcx,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define i8* @pointer_copy(i8** %0) {
%2 = alloca i8**
%3 = alloca i8**
store i8** %0, i8*** %2
%4 = call i64 @calloc(i32 1, i32 8)
%5 = inttoptr i64 %4 to i8**
store i8** %5, i8*** %3
%6 = load i8**, i8*** %2
%7 = bitcast i8** %6 to i32**
%8 = load i32*, i32** %7
%9 = bitcast i32* %8 to i8*
%10 = load i8**, i8*** %3
store i8* %9, i8** %10
%11 = load i8**, i8*** %3
%12 = bitcast i8** %11 to i8*
ret i8* %12
}

LLVM IR (-O2):
define i8* @pointer_copy(i8** nocapture %0) {
%2 = tail call i64 @calloc(i32 1, i32 8)
%3 = inttoptr i64 %2 to i8**
%4 = load i8*, i8** %0
store i8* %4, i8** %3
%5 = inttoptr i64 %2 to i8*
ret i8* %5
}
/* Variables and functions */
int addsqrs(int, int);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char *argv[]) {
  printf("The answer is %d\n", addsqrs(3, 4));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x3,%edi
mov    $0x4,%esi
call   1030 <addsqrs@plt>
mov    %eax,%esi
lea    0xeb2(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x3,%edi
mov    $0x4,%esi
call   1030 <addsqrs@plt>
lea    0xec9(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"The answer is %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @addsqrs(i32 3, i32 4)
%7 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [18 x i8] c"The answer is %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @addsqrs(i32 3, i32 4)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int MFRC522_ReadRegister(int);
int /*<<< orphan*/ MFRC522_WriteRegister(int, int);
void MFRC522_SetBitMask(uint8_t reg, uint8_t mask) {
  MFRC522_WriteRegister(reg, MFRC522_ReadRegister(reg) | mask);
}


x86 assembly (clang, -O0):
<MFRC522_SetBitMask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <MFRC522_ReadRegister@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%esi
or     -0x8(%rbp),%esi
call   1040 <MFRC522_WriteRegister@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MFRC522_SetBitMask>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <MFRC522_ReadRegister@plt>
or     %eax,%ebx
mov    %ebp,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <MFRC522_WriteRegister@plt>

LLVM IR (-O0):
define void @MFRC522_SetBitMask(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @MFRC522_ReadRegister(i32 %6)
%8 = load i32, i32* %4
%9 = or i32 %7, %8
%10 = call i32 @MFRC522_WriteRegister(i32 %5, i32 %9)
ret void
}

LLVM IR (-O2):
define void @MFRC522_SetBitMask(i32 %0, i32 %1) {
%3 = tail call i32 @MFRC522_ReadRegister(i32 %0)
%4 = or i32 %3, %1
%5 = tail call i32 @MFRC522_WriteRegister(i32 %0, i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CRS_Handler_Callback();
void RCC_CRS_IRQHandler(void) { CRS_Handler_Callback(); }


x86 assembly (clang, -O0):
<RCC_CRS_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <CRS_Handler_Callback@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RCC_CRS_IRQHandler>:
xor    %eax,%eax
jmp    1030 <CRS_Handler_Callback@plt>

LLVM IR (-O0):
define void @RCC_CRS_IRQHandler() {
%1 = call i32 (...) @CRS_Handler_Callback()
ret void
}

LLVM IR (-O2):
define void @RCC_CRS_IRQHandler() {
%1 = tail call i32 (...) @CRS_Handler_Callback()
ret void
}
void my_task_without_any_parameters_cuda(void) {}


x86 assembly (clang, -O0):
<my_task_without_any_parameters_cuda>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_task_without_any_parameters_cuda>:
ret

LLVM IR (-O0):
define void @my_task_without_any_parameters_cuda() {
ret void
}

LLVM IR (-O2):
define void @my_task_without_any_parameters_cuda() {
ret void
}
/* Variables and functions */
int a(int);
int sample_function2(int n) { return a(n); }


x86 assembly (clang, -O0):
<sample_function2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <a@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sample_function2>:
jmp    1030 <a@plt>

LLVM IR (-O0):
define i32 @sample_function2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @a(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @sample_function2(i32 %0) {
%2 = tail call i32 @a(i32 %0)
ret i32 %2
}
float inverseSqrt(float x) {
  float xhalf = 0.5f * x;
  int i = *(int *)&x;
  i = 0x5f3759d5 - (i >> 1);
  x = *(float *)&i;
  x = x * (1.5f - xhalf * x * x);
  return x;
}


x86 assembly (clang, -O0):
<inverseSqrt>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xef3(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
sar    $0x1,%ecx
mov    $0x5f3759d5,%eax
sub    %ecx,%eax
mov    %eax,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
mulss  -0x4(%rbp),%xmm1
movss  -0x4(%rbp),%xmm2
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm1
movss  0xe98(%rip),%xmm2
addss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<inverseSqrt>:
movd   %xmm0,%eax
sar    %eax
mov    $0x5f3759d5,%ecx
sub    %eax,%ecx
movd   %ecx,%xmm1
mulss  0xee7(%rip),%xmm0
mulss  %xmm1,%xmm0
mulss  %xmm1,%xmm0
addss  0xedb(%rip),%xmm0
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @inverseSqrt(float %0) {
%2 = alloca float
%3 = alloca float
%4 = alloca i32
store float %0, float* %2
%5 = load float, float* %2
%6 = fmul float 5.000000e-01, %5
store float %6, float* %3
%7 = bitcast float* %2 to i32*
%8 = load i32, i32* %7
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = ashr i32 %9, 1
%11 = sub nsw i32 1597462997, %10
store i32 %11, i32* %4
%12 = bitcast i32* %4 to float*
%13 = load float, float* %12
store float %13, float* %2
%14 = load float, float* %2
%15 = load float, float* %3
%16 = load float, float* %2
%17 = fmul float %15, %16
%18 = load float, float* %2
%19 = fneg float %17
%20 = call float @llvm.fmuladd.f32(float %19, float %18, float 1.500000e+00)
%21 = fmul float %14, %20
store float %21, float* %2
%22 = load float, float* %2
ret float %22
}

LLVM IR (-O2):
define float @inverseSqrt(float %0) {
%2 = bitcast float %0 to i32
%3 = ashr i32 %2, 1
%4 = sub nsw i32 1597462997, %3
%5 = bitcast i32 %4 to float
%6 = fmul float %0, -5.000000e-01
%7 = fmul float %6, %5
%8 = tail call float @llvm.fmuladd.f32(float %7, float %5, float 1.500000e+00)
%9 = fmul float %8, %5
ret float %9
}
/* Variables and functions */
int arr_all_even(const int a[], size_t n) {
  size_t i;
  for (i = 0; i < n; i++)
    if (a[i] % 2 != 0)
      return 0;
  return 1;
}


x86 assembly (clang, -O0):
<arr_all_even>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1160 <arr_all_even+0x60>
mov    -0x10(%rbp),%rax
mov    -0x20(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     114a <arr_all_even+0x4a>
movl   $0x0,-0x4(%rbp)
jmp    1167 <arr_all_even+0x67>
jmp    114f <arr_all_even+0x4f>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1114 <arr_all_even+0x14>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<arr_all_even>:
mov    $0x1,%eax
test   %rsi,%rsi
je     111f <arr_all_even+0x1f>
xor    %ecx,%ecx
nopl   0x0(%rax)
testb  $0x1,(%rdi,%rcx,4)
jne    1120 <arr_all_even+0x20>
add    $0x1,%rcx
cmp    %rcx,%rsi
jne    1110 <arr_all_even+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @arr_all_even(i32* %0, i64 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i64
%6 = alloca i64
store i32* %0, i32** %4
store i64 %1, i64* %5
store i64 0, i64* %6
br label %7
7: ; preds = %20, %2
%8 = load i64, i64* %6
%9 = load i64, i64* %5
%10 = icmp ult i64 %8, %9
br i1 %10, label %11, label %23
11: ; preds = %7
%12 = load i32*, i32** %4
%13 = load i64, i64* %6
%14 = getelementptr inbounds i32, i32* %12, i64 %13
%15 = load i32, i32* %14
%16 = srem i32 %15, 2
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %11
store i32 0, i32* %3
br label %24
19: ; preds = %11
br label %20
20: ; preds = %19
%21 = load i64, i64* %6
%22 = add i64 %21, 1
store i64 %22, i64* %6
br label %7
23: ; preds = %7
store i32 1, i32* %3
br label %24
24: ; preds = %23, %18
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @arr_all_even(i32* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %13, label %6
4: ; preds = %6
%5 = icmp eq i64 %12, %1
br i1 %5, label %13, label %6
6: ; preds = %2, %4
%7 = phi i64 [ %12, %4 ], [ 0, %2 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = and i32 %9, 1
%11 = icmp eq i32 %10, 0
%12 = add nuw i64 %7, 1
br i1 %11, label %4, label %13
13: ; preds = %6, %4, %2
%14 = phi i32 [ 1, %2 ], [ 1, %4 ], [ 0, %6 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ isspace(char);
char *skip_non_eq_or_space(char *s) {
  while (*s && *s != '=' && !isspace(*s))
    s++;
  return s;
}


x86 assembly (clang, -O0):
<skip_non_eq_or_space>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
je     115d <skip_non_eq_or_space+0x4d>
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x3d,%ecx
mov    %al,-0x9(%rbp)
je     115d <skip_non_eq_or_space+0x4d>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    116d <skip_non_eq_or_space+0x5d>
jmp    117e <skip_non_eq_or_space+0x6e>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <skip_non_eq_or_space+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_non_eq_or_space>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movzbl (%rbx),%eax
test   %al,%al
je     113d <skip_non_eq_or_space+0x2d>
cmp    $0x3d,%al
je     113d <skip_non_eq_or_space+0x2d>
movsbl %al,%edi
call   1030 <isspace@plt>
test   %eax,%eax
jne    113d <skip_non_eq_or_space+0x2d>
add    $0x1,%rbx
jmp    1120 <skip_non_eq_or_space+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @skip_non_eq_or_space(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %21, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %19
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 61
br i1 %12, label %13, label %19
13: ; preds = %8
%14 = load i8*, i8** %2
%15 = load i8, i8* %14
%16 = call i32 @isspace(i8 signext %15)
%17 = icmp ne i32 %16, 0
%18 = xor i1 %17, true
br label %19
19: ; preds = %13, %8, %3
%20 = phi i1 [ false, %8 ], [ false, %3 ], [ %18, %13 ]
br i1 %20, label %21, label %24
21: ; preds = %19
%22 = load i8*, i8** %2
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %2
br label %3
24: ; preds = %19
%25 = load i8*, i8** %2
ret i8* %25
}

LLVM IR (-O2):
define i8* @skip_non_eq_or_space(i8* %0) {
br label %2
2: ; preds = %8, %1
%3 = phi i8* [ %0, %1 ], [ %9, %8 ]
%4 = load i8, i8* %3
switch i8 %4, label %5 [
i8 0, label %10
i8 61, label %10
]
5: ; preds = %2
%6 = tail call i32 @isspace(i8 signext %4)
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
10: ; preds = %2, %2, %5
ret i8* %3
}
double getError(double pi) {
  double error =
      3.1415926535897932384626433832795028841971693993751058209749445923078164062862089986280348253421170679 -
      pi;
  error = error > 0 ? error : -error;
  return error;
}


x86 assembly (clang, -O0):
<getError>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
subsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    113c <getError+0x3c>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    115d <getError+0x5d>
movsd  -0x10(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<getError>:
movsd  0xef8(%rip),%xmm1
subsd  %xmm0,%xmm1
movapd 0xefc(%rip),%xmm2
xorpd  %xmm1,%xmm2
xorpd  %xmm0,%xmm0
cmpltsd %xmm1,%xmm0
andpd  %xmm0,%xmm1
andnpd %xmm2,%xmm0
orpd   %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @getError(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fsub double 0x400921FB54442D18, %4
store double %5, double* %3
%6 = load double, double* %3
%7 = fcmp ogt double %6, 0.000000e+00
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load double, double* %3
br label %13
10: ; preds = %1
%11 = load double, double* %3
%12 = fneg double %11
br label %13
13: ; preds = %10, %8
%14 = phi double [ %9, %8 ], [ %12, %10 ]
store double %14, double* %3
%15 = load double, double* %3
ret double %15
}

LLVM IR (-O2):
define double @getError(double %0) {
%2 = fsub double 0x400921FB54442D18, %0
%3 = fcmp ogt double %2, 0.000000e+00
%4 = fneg double %2
%5 = select i1 %3, double %2, double %4
ret double %5
}
/* Variables and functions */
int /*<<< orphan*/ wPrintStack();
int /*<<< orphan*/ wPushNumber(int /*<<< orphan*/);
void wBasPrintStack() {
  wPrintStack();
  wPushNumber(0);
}


x86 assembly (clang, -O0):
<wBasPrintStack>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <wPrintStack@plt>
xor    %edi,%edi
call   1030 <wPushNumber@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wBasPrintStack>:
push   %rax
xor    %eax,%eax
call   1040 <wPrintStack@plt>
xor    %edi,%edi
pop    %rax
jmp    1030 <wPushNumber@plt>

LLVM IR (-O0):
define void @wBasPrintStack() {
%1 = call i32 (...) @wPrintStack()
%2 = call i32 @wPushNumber(i32 0)
ret void
}

LLVM IR (-O2):
define void @wBasPrintStack() {
%1 = tail call i32 (...) @wPrintStack()
%2 = tail call i32 @wPushNumber(i32 0)
ret void
}
/* Type definitions */
typedef int pid_t;

/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, int, char *);
int /*<<< orphan*/ stdout;
void print_debug(char *msg, pid_t pid) {
  if (1) {
    printf("[%05d] - %s\n", pid, msg);
    fflush(stdout);
  }
}


x86 assembly (clang, -O0):
<print_debug>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%esi
mov    -0x8(%rbp),%rdx
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e97(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_debug>:
push   %rax
mov    %rdi,%rdx
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"[%05d] - %s\0A\00"
@stdout = global i32 0
define void @print_debug(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %5, i8* %6)
%8 = load i32, i32* @stdout
%9 = call i32 @fflush(i32 %8)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"[%05d] - %s\0A\00"
@stdout = global i32 0
define void @print_debug(i8* %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %1, i8* %0)
%4 = load i32, i32* @stdout
%5 = tail call i32 @fflush(i32 %4)
ret void
}
int main(void) {
  int a = 0;
  int b = 1;
  if (a > 1 || b)
    a = 8;
  else
    a = 1;
  return a;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
cmpl   $0x1,-0x8(%rbp)
jg     112d <main+0x2d>
cmpl   $0x0,-0xc(%rbp)
je     1139 <main+0x39>
movl   $0x8,-0x8(%rbp)
jmp    1140 <main+0x40>
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 1, i32* %3
%4 = load i32, i32* %2
%5 = icmp sgt i32 %4, 1
br i1 %5, label %9, label %6
6: ; preds = %0
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %6, %0
store i32 8, i32* %2
br label %11
10: ; preds = %6
store i32 1, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @main() {
ret i32 8
}
/* Variables and functions */
int /*<<< orphan*/ LOCK_SH;
int flock(int, int /*<<< orphan*/);
int SHlockB(int fd) { return flock(fd, LOCK_SH); }


x86 assembly (clang, -O0):
<SHlockB>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ec3(%rip),%rax
mov    (%rax),%esi
call   1030 <flock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHlockB>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
jmp    1030 <flock@plt>

LLVM IR (-O0):
@LOCK_SH = global i32 0
define i32 @SHlockB(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @LOCK_SH
%5 = call i32 @flock(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@LOCK_SH = global i32 0
define i32 @SHlockB(i32 %0) {
%2 = load i32, i32* @LOCK_SH
%3 = tail call i32 @flock(i32 %0, i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ writedata(unsigned char);
void pushColor(unsigned short color) {
  writedata((unsigned char)(color >> 8));
  writedata((unsigned char)color);
}


x86 assembly (clang, -O0):
<pushColor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
sar    $0x8,%eax
movzbl %al,%edi
call   1030 <writedata@plt>
mov    -0x2(%rbp),%ax
movzbl %al,%edi
call   1030 <writedata@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pushColor>:
push   %rbx
mov    %edi,%ebx
shr    $0x8,%edi
call   1030 <writedata@plt>
movzbl %bl,%edi
pop    %rbx
jmp    1030 <writedata@plt>

LLVM IR (-O0):
define void @pushColor(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = ashr i32 %4, 8
%6 = trunc i32 %5 to i8
%7 = call i32 @writedata(i8 zeroext %6)
%8 = load i16, i16* %2
%9 = trunc i16 %8 to i8
%10 = call i32 @writedata(i8 zeroext %9)
ret void
}

LLVM IR (-O2):
define void @pushColor(i16 zeroext %0) {
%2 = lshr i16 %0, 8
%3 = trunc i16 %2 to i8
%4 = tail call i32 @writedata(i8 zeroext %3)
%5 = trunc i16 %0 to i8
%6 = tail call i32 @writedata(i8 zeroext %5)
ret void
}