xunge/DecIR huggingface dataset:
int _isspace(char c) {
  return (c == ' ' || c == '\f' || c == '\n' || c == '\r' || c == '\t' ||
          c == '\v');
}


x86 assembly (clang, -O0):
<_isspace>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x2(%rbp)
je     1171 <_isspace+0x71>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0xc,%ecx
mov    %al,-0x2(%rbp)
je     1171 <_isspace+0x71>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0xa,%ecx
mov    %al,-0x2(%rbp)
je     1171 <_isspace+0x71>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0xd,%ecx
mov    %al,-0x2(%rbp)
je     1171 <_isspace+0x71>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x9,%ecx
mov    %al,-0x2(%rbp)
je     1171 <_isspace+0x71>
movsbl -0x1(%rbp),%eax
cmp    $0xb,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_isspace>:
cmp    $0x20,%dil
ja     1120 <_isspace+0x20>
mov    $0x1,%eax
movzbl %dil,%ecx
movabs $0x100003600,%rdx
bt     %rcx,%rdx
jae    1120 <_isspace+0x20>
ret
xor    %eax,%eax
cmp    $0xb,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @_isspace(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 32
br i1 %5, label %26, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 12
br i1 %9, label %26, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 10
br i1 %13, label %26, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 13
br i1 %17, label %26, label %18
18: ; preds = %14
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 9
br i1 %21, label %26, label %22
22: ; preds = %18
%23 = load i8, i8* %2
%24 = sext i8 %23 to i32
%25 = icmp eq i32 %24, 11
br label %26
26: ; preds = %22, %18, %14, %10, %6, %1
%27 = phi i1 [ true, %18 ], [ true, %14 ], [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %25, %22 ]
%28 = zext i1 %27 to i32
ret i32 %28
}

LLVM IR (-O2):
define i32 @_isspace(i8 signext %0) {
switch i8 %0, label %2 [
i8 32, label %5
i8 13, label %5
i8 12, label %5
i8 10, label %5
i8 9, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 11
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ Delay_45us(char);
void i2cdelay(char delay) { Delay_45us(delay); }


x86 assembly (clang, -O0):
<i2cdelay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <Delay_45us@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2cdelay>:
jmp    1030 <Delay_45us@plt>

LLVM IR (-O0):
define void @i2cdelay(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @Delay_45us(i8 signext %3)
ret void
}

LLVM IR (-O2):
define void @i2cdelay(i8 signext %0) {
%2 = tail call i32 @Delay_45us(i8 signext %0)
ret void
}
void RandomFunc(unsigned int input[1], unsigned int output[1]) {
  unsigned int state[1];
  unsigned int local1;
  {
    state[0UL] = input[0UL] + 1373777115U;
    local1 = 0UL;
    while (local1 < 1UL) {
      state[local1] = state[0UL] & state[local1];
      local1++;
    }
    output[0UL] = (state[0UL] << 13U) | (state[0UL] >> 19U);
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
add    $0x51e22cdb,%eax
mov    %eax,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    $0x1,%rax
jae    114d <RandomFunc+0x4d>
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%eax
and    -0x14(%rbp,%rax,4),%ecx
mov    -0x18(%rbp),%eax
mov    %ecx,-0x14(%rbp,%rax,4)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1121 <RandomFunc+0x21>
mov    -0x14(%rbp),%ecx
shl    $0xd,%ecx
mov    -0x14(%rbp),%eax
shr    $0x13,%eax
or     %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
mov    $0x51e22cdb,%eax
add    (%rdi),%eax
rol    $0xd,%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca [1 x i32]
%6 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 0
%9 = load i32, i32* %8
%10 = add i32 %9, 1373777115
%11 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
store i32 %10, i32* %11
store i32 0, i32* %6
br label %12
12: ; preds = %16, %2
%13 = load i32, i32* %6
%14 = zext i32 %13 to i64
%15 = icmp ult i64 %14, 1
br i1 %15, label %16, label %29
16: ; preds = %12
%17 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
%18 = load i32, i32* %17
%19 = load i32, i32* %6
%20 = zext i32 %19 to i64
%21 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 %20
%22 = load i32, i32* %21
%23 = and i32 %18, %22
%24 = load i32, i32* %6
%25 = zext i32 %24 to i64
%26 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 %25
store i32 %23, i32* %26
%27 = load i32, i32* %6
%28 = add i32 %27, 1
store i32 %28, i32* %6
br label %12
29: ; preds = %12
%30 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
%31 = load i32, i32* %30
%32 = shl i32 %31, 13
%33 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
%34 = load i32, i32* %33
%35 = lshr i32 %34, 19
%36 = or i32 %32, %35
%37 = load i32*, i32** %4
%38 = getelementptr inbounds i32, i32* %37, i64 0
store i32 %36, i32* %38
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i32* nocapture %0, i32* nocapture writeonly %1) {
%3 = load i32, i32* %0
%4 = add i32 %3, 1373777115
%5 = tail call i32 @llvm.fshl.i32(i32 %4, i32 %4, i32 13)
store i32 %5, i32* %1
ret void
}
void vmcall(void) {
  unsigned long a = 0, b, c, d;
  asm volatile("vmcall" : "+a"(a), "=b"(b), "=c"(c), "=d"(d));
}


x86 assembly (clang, -O0):
<vmcall>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
vmcall
mov    %rax,-0x10(%rbp)
mov    %rbx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<vmcall>:
push   %rbx
xor    %eax,%eax
vmcall
pop    %rbx
ret

LLVM IR (-O0):
define void @vmcall() {
%1 = alloca i64
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 0, i64* %1
%5 = load i64, i64* %1
%6 = call { i64, i64, i64, i64 } asm sideeffect "vmcall", "={ax},={bx},={cx},={dx},0,~{dirflag},~{fpsr},~{flags}"(i64 %5)
%7 = extractvalue { i64, i64, i64, i64 } %6, 0
%8 = extractvalue { i64, i64, i64, i64 } %6, 1
%9 = extractvalue { i64, i64, i64, i64 } %6, 2
%10 = extractvalue { i64, i64, i64, i64 } %6, 3
store i64 %7, i64* %1
store i64 %8, i64* %2
store i64 %9, i64* %3
store i64 %10, i64* %4
ret void
}

LLVM IR (-O2):
define void @vmcall() {
%1 = tail call { i64, i64, i64, i64 } asm sideeffect "vmcall", "={ax},={bx},={cx},={dx},0,~{dirflag},~{fpsr},~{flags}"(i64 0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ frame;

/* Variables and functions */
int /*<<< orphan*/ memset(char *, int, int);
void test(int depth) {
  volatile char frame[(1024)];
  memset((char *)frame, 0xff, sizeof(frame));
  if (depth > 1)
    test(depth - 1);
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x410,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x410(%rbp),%rdi
mov    $0xff,%esi
mov    $0x400,%edx
call   1030 <memset@plt>
cmpl   $0x1,-0x4(%rbp)
jle    1159 <test+0x39>
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1040 <test@plt>
add    $0x410,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
push   %rbx
sub    $0x400,%rsp
mov    %edi,%ebx
mov    %rsp,%rdi
mov    $0xff,%esi
mov    $0x400,%edx
call   1030 <memset@plt>
cmp    $0x2,%ebx
jl     114b <test+0x2b>
add    $0xffffffff,%ebx
mov    %ebx,%edi
call   1040 <test@plt>
add    $0x400,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @test(i32 %0) {
%2 = alloca i32
%3 = alloca [1024 x i8]
store i32 %0, i32* %2
%4 = getelementptr inbounds [1024 x i8], [1024 x i8]* %3, i64 0, i64 0
%5 = call i32 @memset(i8* %4, i32 255, i32 1024)
%6 = load i32, i32* %2
%7 = icmp sgt i32 %6, 1
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32, i32* %2
%10 = sub nsw i32 %9, 1
br label %11
11: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test(i32 %0) {
%2 = alloca [1024 x i8]
%3 = getelementptr inbounds [1024 x i8], [1024 x i8]* %2, i64 0, i64 0
%4 = call i32 @memset(i8* %3, i32 255, i32 1024)
%5 = icmp sgt i32 %0, 1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = add nsw i32 %0, -1
br label %8
8: ; preds = %6, %1
ret void
}
f() {
  char s[] = "hello";
  return s[2];
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    0xef6(%rip),%eax
mov    %eax,-0x6(%rbp)
mov    0xef0(%rip),%ax
mov    %ax,-0x2(%rbp)
movsbl -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0x6c,%eax
ret

LLVM IR (-O0):
@__const.f.s = [6 x i8] c"hello\00"
define i32 @f() {
%1 = alloca [6 x i8]
%2 = bitcast [6 x i8]* %1 to i8*
%3 = getelementptr inbounds [6 x i8], [6 x i8]* %1, i64 0, i64 2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @f() {
ret i32 108
}
int get_salt_size(void) { return 3; }


x86 assembly (clang, -O0):
<get_salt_size>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_salt_size>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @get_salt_size() {
ret i32 3
}

LLVM IR (-O2):
define i32 @get_salt_size() {
ret i32 3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("hello open source SW project\n");
  printf("First GitHub Tranning\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xeec(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xef9(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [30 x i8] c"hello open source SW project\0A\00"
@.str.1 = [23 x i8] c"First GitHub Tranning\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [29 x i8] c"hello open source SW project\00"
@str.2 = [22 x i8] c"First GitHub Tranning\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ C_WRITE(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ stderr;
int main() {
  C_WRITE(stderr, "", 1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
lea    0xed1(%rip),%rsi
mov    $0x1,%edx
call   1030 <C_WRITE@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
mov    $0x1,%edx
call   1030 <C_WRITE@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [1 x i8] zeroinitializer
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @stderr
%3 = call i32 @C_WRITE(i32 %2, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i32 1)
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [1 x i8] zeroinitializer
define i32 @main() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @C_WRITE(i32 %1, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i32 1)
ret i32 0
}
int lex_char_is_num(char c) {
  if (c >= '0' && c <= '9') {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<lex_char_is_num>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1130 <lex_char_is_num+0x30>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jg     1130 <lex_char_is_num+0x30>
movl   $0x1,-0x4(%rbp)
jmp    1137 <lex_char_is_num+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lex_char_is_num>:
add    $0xd0,%dil
xor    %eax,%eax
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @lex_char_is_num(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %13
12: ; preds = %7, %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @lex_char_is_num(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
struct btf_type {
  int dummy;
};

/* Variables and functions */
scalar_t__ BTF_KIND_VAR;
scalar_t__ btf_kind(struct btf_type const *);
bool btf_is_var(const struct btf_type *t) {
  return btf_kind(t) == BTF_KIND_VAR;
}


x86 assembly (clang, -O0):
<btf_is_var>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <btf_kind@plt>
mov    0x2eb4(%rip),%rcx
cmp    (%rcx),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<btf_is_var>:
push   %rax
call   1030 <btf_kind@plt>
mov    0x2ec3(%rip),%rdx
xor    %ecx,%ecx
cmp    (%rdx),%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.btf_type = type { i32 }
@BTF_KIND_VAR = global i64 0
define i32 @btf_is_var(%struct.btf_type* %0) {
%2 = alloca %struct.btf_type*
store %struct.btf_type* %0, %struct.btf_type** %2
%3 = load %struct.btf_type*, %struct.btf_type** %2
%4 = call i64 @btf_kind(%struct.btf_type* %3)
%5 = load i64, i64* @BTF_KIND_VAR
%6 = icmp eq i64 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
%struct.btf_type = type { i32 }
@BTF_KIND_VAR = global i64 0
define i32 @btf_is_var(%struct.btf_type* %0) {
%2 = tail call i64 @btf_kind(%struct.btf_type* %0)
%3 = load i64, i64* @BTF_KIND_VAR
%4 = icmp eq i64 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
void RTAvllU32Remove(void) {}


x86 assembly (clang, -O0):
<RTAvllU32Remove>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvllU32Remove>:
ret

LLVM IR (-O0):
define void @RTAvllU32Remove() {
ret void
}

LLVM IR (-O2):
define void @RTAvllU32Remove() {
ret void
}
/* Type definitions */
struct varscope {
  int dummy;
};
struct scope {
  int dummy;
};

/* Variables and functions */
scalar_t__ scope_free(struct scope *);
struct varscope *varscope_free(struct varscope *varscope) {
  return (struct varscope *)scope_free((struct scope *)varscope);
}


x86 assembly (clang, -O0):
<varscope_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <scope_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<varscope_free>:
jmp    1030 <scope_free@plt>

LLVM IR (-O0):
%struct.varscope = type { i32 }
%struct.scope = type { i32 }
define %struct.varscope* @varscope_free(%struct.varscope* %0) {
%2 = alloca %struct.varscope*
store %struct.varscope* %0, %struct.varscope** %2
%3 = load %struct.varscope*, %struct.varscope** %2
%4 = bitcast %struct.varscope* %3 to %struct.scope*
%5 = call i64 @scope_free(%struct.scope* %4)
%6 = inttoptr i64 %5 to %struct.varscope*
ret %struct.varscope* %6
}

LLVM IR (-O2):
%struct.varscope = type { i32 }
%struct.scope = type { i32 }
define %struct.varscope* @varscope_free(%struct.varscope* %0) {
%2 = bitcast %struct.varscope* %0 to %struct.scope*
%3 = tail call i64 @scope_free(%struct.scope* %2)
%4 = inttoptr i64 %3 to %struct.varscope*
ret %struct.varscope* %4
}
int cube(int x) { return x * x * x; }


x86 assembly (clang, -O0):
<cube>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cube>:
mov    %edi,%eax
imul   %edi,%eax
imul   %edi,%eax
ret

LLVM IR (-O0):
define i32 @cube(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %3, %4
%6 = load i32, i32* %2
%7 = mul nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @cube(i32 %0) {
%2 = mul nsw i32 %0, %0
%3 = mul nsw i32 %2, %0
ret i32 %3
}
unsigned int popcountll(unsigned long long value) {
  int i, bitcnt;
  int nbits = sizeof(unsigned long long) * 8;
  for (i = 0, bitcnt = 0; i < nbits; i++) {
    if (value & ((unsigned long long)1 << i))
      bitcnt++;
  }
  return bitcnt;
}


x86 assembly (clang, -O0):
<popcountll>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x40,-0x14(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1164 <popcountll+0x64>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%rdx
mov    %rdx,%rcx
and    %rcx,%rax
cmp    $0x0,%rax
je     1151 <popcountll+0x51>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1156 <popcountll+0x56>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    111d <popcountll+0x1d>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<popcountll>:
xor    %ecx,%ecx
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
bt     %rcx,%rdi
adc    $0x0,%eax
lea    0x1(%rcx),%edx
movzbl %dl,%edx
bt     %rdx,%rdi
adc    $0x0,%eax
lea    0x2(%rcx),%edx
movzbl %dl,%edx
bt     %rdx,%rdi
adc    $0x0,%eax
lea    0x3(%rcx),%edx
movzbl %dl,%edx
bt     %rdx,%rdi
adc    $0x0,%eax
add    $0x4,%rcx
cmp    $0x40,%rcx
jne    1110 <popcountll+0x10>
ret

LLVM IR (-O0):
define i32 @popcountll(i64 %0) {
%2 = alloca i64
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i64 %0, i64* %2
store i32 64, i32* %5
store i32 0, i32* %3
store i32 0, i32* %4
br label %6
6: ; preds = %21, %1
%7 = load i32, i32* %3
%8 = load i32, i32* %5
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %24
10: ; preds = %6
%11 = load i64, i64* %2
%12 = load i32, i32* %3
%13 = zext i32 %12 to i64
%14 = shl i64 1, %13
%15 = and i64 %11, %14
%16 = icmp ne i64 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %10
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %20
20: ; preds = %17, %10
br label %21
21: ; preds = %20
%22 = load i32, i32* %3
%23 = add nsw i32 %22, 1
store i32 %23, i32* %3
br label %6
24: ; preds = %6
%25 = load i32, i32* %4
ret i32 %25
}

LLVM IR (-O2):
define i32 @popcountll(i64 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 0, %1 ], [ %28, %2 ]
%4 = phi i32 [ 0, %1 ], [ %27, %2 ]
%5 = shl nuw i64 1, %3
%6 = and i64 %5, %0
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i32
%9 = add nuw nsw i32 %4, %8
%10 = or i64 %3, 1
%11 = shl nuw i64 1, %10
%12 = and i64 %11, %0
%13 = icmp ne i64 %12, 0
%14 = zext i1 %13 to i32
%15 = add nuw nsw i32 %9, %14
%16 = or i64 %3, 2
%17 = shl nuw i64 1, %16
%18 = and i64 %17, %0
%19 = icmp ne i64 %18, 0
%20 = zext i1 %19 to i32
%21 = add nuw nsw i32 %15, %20
%22 = or i64 %3, 3
%23 = shl nuw i64 1, %22
%24 = and i64 %23, %0
%25 = icmp ne i64 %24, 0
%26 = zext i1 %25 to i32
%27 = add nuw nsw i32 %21, %26
%28 = add nuw nsw i64 %3, 4
%29 = icmp eq i64 %28, 64
br i1 %29, label %30, label %2
30: ; preds = %2
ret i32 %27
}
void os_prepare_sample(int number) {}


x86 assembly (clang, -O0):
<os_prepare_sample>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_prepare_sample>:
ret

LLVM IR (-O0):
define void @os_prepare_sample(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @os_prepare_sample(i32 %0) {
ret void
}
int main(void) {
  volatile int i = 0;
  do {
    i = 1;
    asm("    .global "
        "set_point"
        "\n"
        "set_point"
        ":\n"
        "   .byte 0xe9,0x00,0x00,0x00,0x00\n");
    i = 2;
  } while (0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x1,-0x8(%rbp)

x86 assembly (clang, -O2):
<main>:
movl   $0x0,-0x4(%rsp)
movl   $0x1,-0x4(%rsp)

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store volatile i32 0, i32* %2
br label %3
3: ; preds = %0
store volatile i32 1, i32* %2
store volatile i32 2, i32* %2
br label %4
4: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store volatile i32 0, i32* %1
store volatile i32 1, i32* %1
tail call void asm sideeffect " .global set_point\0Aset_point:\0A .byte 0xe9,0x00,0x00,0x00,0x00\0A", "~{dirflag},~{fpsr},~{flags}"()
store volatile i32 2, i32* %1
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0x0e() {
  Assert_real((isupper(14) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              75, ("isupper should be 0 for 0x0e"));
}


x86 assembly (clang, -O0):
<t_isupper_0x0e>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4b,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0x0e>:
push   %rax
mov    $0xe,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4b,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0x0e\00"
define void @t_isupper_0x0e() {
%1 = call i64 @isupper(i32 14)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 75, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0x0e\00"
define void @t_isupper_0x0e() {
%1 = tail call i64 @isupper(i32 14)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 75, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ system(char *);
void erro() {
  printf("Erro no sistema!\n");
  system("pause");
}


x86 assembly (clang, -O0):
<erro>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <printf@plt>
lea    0xedb(%rip),%rdi
call   1030 <system@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<erro>:
push   %rax
lea    0xede(%rip),%rdi
call   1030 <puts@plt>
lea    0xecc(%rip),%rdi
pop    %rax
jmp    1040 <system@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"Erro no sistema!\0A\00"
@.str.1 = [6 x i8] c"pause\00"
define void @erro() {
%1 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str.1 = [6 x i8] c"pause\00"
@str = [17 x i8] c"Erro no sistema!\00"
define void @erro() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ setState(int);
__attribute__((constructor)) void myInit2() { setState(3); }


x86 assembly (clang, -O0):
<myInit2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <setState@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<myInit2>:
mov    $0x3,%edi
jmp    1030 <setState@plt>

LLVM IR (-O0):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @myInit2, i8* null }]
define void @myInit2() {
%1 = call i32 @setState(i32 3)
ret void
}

LLVM IR (-O2):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @myInit2, i8* null }]
define void @myInit2() {
%1 = tail call i32 @setState(i32 3)
ret void
}
/* Variables and functions */
double nan(char *);
double trio_nan(void) {
  static double nan_value = 0.0;
  if (nan_value == 0.0) {
    nan_value = nan("");
  }
  return nan_value;
}


x86 assembly (clang, -O0):
<trio_nan>:
push   %rbp
mov    %rsp,%rbp
movsd  0x2f14(%rip),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    1143 <trio_nan+0x33>
jp     1143 <trio_nan+0x33>
lea    0xeca(%rip),%rdi
call   1030 <nan@plt>
movsd  %xmm0,0x2eed(%rip)
movsd  0x2ee5(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<trio_nan>:
push   %rax
movsd  0x2f17(%rip),%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    1139 <trio_nan+0x29>
jp     1139 <trio_nan+0x29>
lea    0xed4(%rip),%rdi
call   1030 <nan@plt>
movsd  %xmm0,0x2ef7(%rip)
pop    %rax
ret

LLVM IR (-O0):
@trio_nan.nan_value = internal global double 0.000000e+00
@.str = [1 x i8] zeroinitializer
define double @trio_nan() {
%1 = load double, double* @trio_nan.nan_value
%2 = fcmp oeq double %1, 0.000000e+00
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = call double @nan(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
store double %4, double* @trio_nan.nan_value
br label %5
5: ; preds = %3, %0
%6 = load double, double* @trio_nan.nan_value
ret double %6
}

LLVM IR (-O2):
@trio_nan.nan_value = internal unnamed_addr global double 0.000000e+00
@.str = [1 x i8] zeroinitializer
define double @trio_nan() {
%1 = load double, double* @trio_nan.nan_value
%2 = fcmp oeq double %1, 0.000000e+00
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call double @nan(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
store double %4, double* @trio_nan.nan_value
br label %5
5: ; preds = %3, %0
%6 = phi double [ %4, %3 ], [ %1, %0 ]
ret double %6
}
void ExttGlossaryAuxTable(void) {}


x86 assembly (clang, -O0):
<ExttGlossaryAuxTable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ExttGlossaryAuxTable>:
ret

LLVM IR (-O0):
define void @ExttGlossaryAuxTable() {
ret void
}

LLVM IR (-O2):
define void @ExttGlossaryAuxTable() {
ret void
}
long hash2(long d1, long d2) { return (d1 * 10007 + d2); }


x86 assembly (clang, -O0):
<hash2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
imul   $0x2717,-0x8(%rbp),%rax
add    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash2>:
imul   $0x2717,%rdi,%rax
add    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @hash2(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = mul nsw i64 %5, 10007
%7 = load i64, i64* %4
%8 = add nsw i64 %6, %7
ret i64 %8
}

LLVM IR (-O2):
define i64 @hash2(i64 %0, i64 %1) {
%3 = mul nsw i64 %0, 10007
%4 = add nsw i64 %3, %1
ret i64 %4
}
int dexit(struct disassemble_info *dd, char *b) { return -1; }


x86 assembly (clang, -O0):
<dexit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dexit>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.disassemble_info = type opaque
define i32 @dexit(%struct.disassemble_info* %0, i8* %1) {
%3 = alloca %struct.disassemble_info*
%4 = alloca i8*
store %struct.disassemble_info* %0, %struct.disassemble_info** %3
store i8* %1, i8** %4
ret i32 -1
}

LLVM IR (-O2):
%struct.disassemble_info = type opaque
define i32 @dexit(%struct.disassemble_info* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void handleData3(char *data, int len) {
  printf("# vulnserver_cov: Handledata3: %i\n", len);
}


x86 assembly (clang, -O0):
<handleData3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handleData3>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"# vulnserver_cov: Handledata3: %i\0A\00"
define void @handleData3(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i32 %5)
ret void
}

LLVM IR (-O2):
@.str = [35 x i8] c"# vulnserver_cov: Handledata3: %i\0A\00"
define void @handleData3(i8* nocapture readnone %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *defaultAlloc(size_t size) { return malloc(size); }


x86 assembly (clang, -O0):
<defaultAlloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<defaultAlloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @defaultAlloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @defaultAlloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
/* Variables and functions */
unsigned int jzrtc_readl(int);
int /*<<< orphan*/ jzrtc_writel(int, unsigned int);
void jzrtc_clrl(int offset, unsigned int value) {
  jzrtc_writel(offset, jzrtc_readl(offset) & ~(value));
}


x86 assembly (clang, -O0):
<jzrtc_clrl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <jzrtc_readl@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%esi
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
and    %eax,%esi
call   1040 <jzrtc_writel@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jzrtc_clrl>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <jzrtc_readl@plt>
not    %ebx
and    %eax,%ebx
mov    %ebp,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <jzrtc_writel@plt>

LLVM IR (-O0):
define void @jzrtc_clrl(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @jzrtc_readl(i32 %6)
%8 = load i32, i32* %4
%9 = xor i32 %8, -1
%10 = and i32 %7, %9
%11 = call i32 @jzrtc_writel(i32 %5, i32 %10)
ret void
}

LLVM IR (-O2):
define void @jzrtc_clrl(i32 %0, i32 %1) {
%3 = tail call i32 @jzrtc_readl(i32 %0)
%4 = xor i32 %1, -1
%5 = and i32 %3, %4
%6 = tail call i32 @jzrtc_writel(i32 %0, i32 %5)
ret void
}
/* Variables and functions */
int f314(int *);
int f315(int *p) { return f314(p); }


x86 assembly (clang, -O0):
<f315>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f314@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f315>:
jmp    1030 <f314@plt>

LLVM IR (-O0):
define i32 @f315(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f314(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f315(i32* %0) {
%2 = tail call i32 @f314(i32* %0)
ret i32 %2
}
double disc(double a, double b, double c) { return b * b - a * c; }


x86 assembly (clang, -O0):
<disc>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
movsd  -0x8(%rbp),%xmm1
mulsd  -0x18(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<disc>:
mulsd  %xmm2,%xmm0
mulsd  %xmm1,%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @disc(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %5
%8 = load double, double* %5
%9 = load double, double* %4
%10 = load double, double* %6
%11 = fmul double %9, %10
%12 = fneg double %11
%13 = call double @llvm.fmuladd.f64(double %7, double %8, double %12)
ret double %13
}

LLVM IR (-O2):
define double @disc(double %0, double %1, double %2) {
%4 = fneg double %0
%5 = fmul double %4, %2
%6 = tail call double @llvm.fmuladd.f64(double %1, double %1, double %5)
ret double %6
}
/* Variables and functions */
int /*<<< orphan*/ phantom_switch_context(void *, void *, int *);
void test() { phantom_switch_context((void *)0, (void *)1, (int *)2); }


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
mov    $0x1,%esi
mov    $0x2,%edx
call   1030 <phantom_switch_context@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
mov    $0x1,%esi
mov    $0x2,%edx
xor    %edi,%edi
jmp    1030 <phantom_switch_context@plt>

LLVM IR (-O0):
define void @test() {
%1 = call i32 @phantom_switch_context(i8* null, i8* inttoptr (i64 1 to i8*), i32* inttoptr (i64 2 to i32*))
ret void
}

LLVM IR (-O2):
define void @test() {
%1 = tail call i32 @phantom_switch_context(i8* null, i8* inttoptr (i64 1 to i8*), i32* inttoptr (i64 2 to i32*))
ret void
}
/* Type definitions */
struct Point {
  int dummy;
};
struct Edge {
  int dummy;
};

/* Variables and functions */
struct Point *edge_orig(int /*<<< orphan*/);
int /*<<< orphan*/ edge_sym(struct Edge *);
struct Point *edge_dest(struct Edge *edge) {
  return edge_orig(edge_sym(edge));
}


x86 assembly (clang, -O0):
<edge_dest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <edge_sym@plt>
mov    %eax,%edi
call   1030 <edge_orig@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<edge_dest>:
push   %rax
call   1040 <edge_sym@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <edge_orig@plt>

LLVM IR (-O0):
%struct.Point = type { i32 }
%struct.Edge = type { i32 }
define %struct.Point* @edge_dest(%struct.Edge* %0) {
%2 = alloca %struct.Edge*
store %struct.Edge* %0, %struct.Edge** %2
%3 = load %struct.Edge*, %struct.Edge** %2
%4 = call i32 @edge_sym(%struct.Edge* %3)
%5 = call %struct.Point* @edge_orig(i32 %4)
ret %struct.Point* %5
}

LLVM IR (-O2):
%struct.Point = type { i32 }
%struct.Edge = type { i32 }
define %struct.Point* @edge_dest(%struct.Edge* %0) {
%2 = tail call i32 @edge_sym(%struct.Edge* %0)
%3 = tail call %struct.Point* @edge_orig(i32 %2)
ret %struct.Point* %3
}
int get3() { return 3; }


x86 assembly (clang, -O0):
<get3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get3>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @get3() {
ret i32 3
}

LLVM IR (-O2):
define i32 @get3() {
ret i32 3
}
/* Variables and functions */
char const *strerror(int);
const char *trio_error(int error_number) { return strerror(error_number); }


x86 assembly (clang, -O0):
<trio_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <strerror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trio_error>:
jmp    1030 <strerror@plt>

LLVM IR (-O0):
define i8* @trio_error(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @strerror(i32 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @trio_error(i32 %0) {
%2 = tail call i8* @strerror(i32 %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ setct(int);
void ctnplay(void) { setct(25); }


x86 assembly (clang, -O0):
<ctnplay>:
push   %rbp
mov    %rsp,%rbp
mov    $0x19,%edi
call   1030 <setct@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctnplay>:
mov    $0x19,%edi
jmp    1030 <setct@plt>

LLVM IR (-O0):
define void @ctnplay() {
%1 = call i32 @setct(i32 25)
ret void
}

LLVM IR (-O2):
define void @ctnplay() {
%1 = tail call i32 @setct(i32 25)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_objective_j_comment_entities();
int /*<<< orphan*/ test_objective_j_comments();
void all_objective_j_tests() {
  test_objective_j_comments();
  test_objective_j_comment_entities();
}


x86 assembly (clang, -O0):
<all_objective_j_tests>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <test_objective_j_comments@plt>
mov    $0x0,%al
call   1030 <test_objective_j_comment_entities@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<all_objective_j_tests>:
push   %rax
xor    %eax,%eax
call   1040 <test_objective_j_comments@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <test_objective_j_comment_entities@plt>

LLVM IR (-O0):
define void @all_objective_j_tests() {
%1 = call i32 (...) @test_objective_j_comments()
%2 = call i32 (...) @test_objective_j_comment_entities()
ret void
}

LLVM IR (-O2):
define void @all_objective_j_tests() {
%1 = tail call i32 (...) @test_objective_j_comments()
%2 = tail call i32 (...) @test_objective_j_comment_entities()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
scalar_t__ malloc(int);
int /*<<< orphan*/ recursEsp(int *, int /*<<< orphan*/, int, int);
void subseqLexEsp2(int n) {
  int *s;
  s = (int *)malloc((n + 1) * sizeof(int));
  recursEsp(s, 0, 1, n);
  free(s);
}


x86 assembly (clang, -O0):
<subseqLexEsp2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
cltq
shl    $0x2,%rax
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%ecx
xor    %esi,%esi
mov    $0x1,%edx
call   1040 <recursEsp@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<subseqLexEsp2>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%r14d
lea    0x4(,%r14,4),%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %esi,%esi
mov    $0x1,%edx
mov    %r14d,%ecx
call   1040 <recursEsp@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @subseqLexEsp2(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
%6 = sext i32 %5 to i64
%7 = mul i64 %6, 4
%8 = trunc i64 %7 to i32
%9 = call i64 @malloc(i32 %8)
%10 = inttoptr i64 %9 to i32*
store i32* %10, i32** %3
%11 = load i32*, i32** %3
%12 = load i32, i32* %2
%13 = call i32 @recursEsp(i32* %11, i32 0, i32 1, i32 %12)
%14 = load i32*, i32** %3
%15 = call i32 @free(i32* %14)
ret void
}

LLVM IR (-O2):
define void @subseqLexEsp2(i32 %0) {
%2 = shl i32 %0, 2
%3 = add i32 %2, 4
%4 = tail call i64 @malloc(i32 %3)
%5 = inttoptr i64 %4 to i32*
%6 = tail call i32 @recursEsp(i32* %5, i32 0, i32 1, i32 %0)
%7 = tail call i32 @free(i32* %5)
ret void
}
void fxsave(volatile void *a) {
  __asm volatile("fxsave (%0)" : : "r"(a) : "memory");
}


x86 assembly (clang, -O0):
<fxsave>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
fxsave (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fxsave>:
fxsave (%rdi)
ret

LLVM IR (-O0):
define void @fxsave(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @fxsave(i8* %0) {
tail call void asm sideeffect "fxsave ($0)", "r,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void df_error() {
  fprintf(stderr, "Usage:  df [OPTION]\n");
  fprintf(stderr, "\t-h\thuman readable output\n");
  exit(1);
}


x86 assembly (clang, -O0):
<df_error>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2ea0(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<df_error>:
push   %rbx
mov    0x2eb8(%rip),%rbx
mov    (%rbx),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xed6(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [21 x i8] c"Usage: df [OPTION]\0A\00"
@.str.1 = [27 x i8] c"\09-h\09human readable output\0A\00"
define void @df_error() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [21 x i8] c"Usage: df [OPTION]\0A\00"
@.str.1 = [27 x i8] c"\09-h\09human readable output\0A\00"
define void @df_error() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ mysystem(char *);
main() { mysystem("sudo poweroff"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <mysystem@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <mysystem@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"sudo poweroff\00"
define i32 @main() {
%1 = call i32 @mysystem(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"sudo poweroff\00"
define i32 @main() {
%1 = tail call i32 @mysystem(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
unsigned long long __atomic_fetch_add_8(volatile void *atom,
                                        unsigned long long value,
                                        int memorder) {
  unsigned long long xchg;
  unsigned long long cmp;
  __atomic_load((unsigned long long *)atom, (unsigned long long *)&cmp, 0);
  do {
    xchg = ((cmp + value));
  } while (!__atomic_compare_exchange((unsigned long long *)atom, &cmp, &xchg,
                                      1, 5, 5));
  return cmp;
}


x86 assembly (clang, -O0):
<__atomic_fetch_add_8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x28(%rbp),%rax
mov    -0x20(%rbp),%rdx
lock cmpxchg %rdx,(%rcx)
mov    %rax,%rcx
sete   %al
mov    %al,-0x39(%rbp)
mov    %rcx,-0x38(%rbp)
test   $0x1,%al
jne    1154 <__atomic_fetch_add_8+0x54>
mov    -0x38(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x39(%rbp),%al
and    $0x1,%al
mov    %al,-0x29(%rbp)
mov    -0x29(%rbp),%al
xor    $0xff,%al
test   $0x1,%al
jne    111a <__atomic_fetch_add_8+0x1a>
mov    -0x28(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__atomic_fetch_add_8>:
mov    (%rdi),%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %rax,%rcx
lea    (%rax,%rsi,1),%rdx
lock cmpxchg %rdx,(%rdi)
jne    1110 <__atomic_fetch_add_8+0x10>
mov    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @__atomic_fetch_add_8(i8* %0, i64 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32
%7 = alloca i64
%8 = alloca i64
%9 = alloca i8
store i8* %0, i8** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i64*
%12 = load atomic i64, i64* %11 monotonic
store i64 %12, i64* %8
br label %13
13: ; preds = %26, %3
%14 = load i64, i64* %8
%15 = load i64, i64* %5
%16 = add i64 %14, %15
store i64 %16, i64* %7
br label %17
17: ; preds = %13
%18 = load i8*, i8** %4
%19 = bitcast i8* %18 to i64*
%20 = load i64, i64* %8
%21 = load i64, i64* %7
%22 = cmpxchg weak i64* %19, i64 %20, i64 %21 seq_cst seq_cst
%23 = extractvalue { i64, i1 } %22, 0
%24 = extractvalue { i64, i1 } %22, 1
br i1 %24, label %26, label %25
25: ; preds = %17
store i64 %23, i64* %8
br label %26
26: ; preds = %25, %17
%27 = zext i1 %24 to i8
store i8 %27, i8* %9
%28 = load i8, i8* %9
%29 = trunc i8 %28 to i1
%30 = xor i1 %29, true
br i1 %30, label %13, label %31
31: ; preds = %26
%32 = load i64, i64* %8
ret i64 %32
}

LLVM IR (-O2):
define i64 @__atomic_fetch_add_8(i8* nocapture %0, i64 %1, i32 %2) {
%4 = bitcast i8* %0 to i64*
%5 = load atomic i64, i64* %4 monotonic
br label %6
6: ; preds = %6, %3
%7 = phi i64 [ %5, %3 ], [ %11, %6 ]
%8 = add i64 %7, %1
%9 = cmpxchg weak i64* %4, i64 %7, i64 %8 seq_cst seq_cst
%10 = extractvalue { i64, i1 } %9, 1
%11 = extractvalue { i64, i1 } %9, 0
br i1 %10, label %12, label %6
12: ; preds = %6
ret i64 %7
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
unsigned bitarithm_test_and_clear(unsigned state, uint8_t *index) {
  while ((state & 1) == 0) {
    *index += 1;
    state >>= 1;
  }
  return state & ~1;
}


x86 assembly (clang, -O0):
<bitarithm_test_and_clear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
jne    1133 <bitarithm_test_and_clear+0x33>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <bitarithm_test_and_clear+0xb>
mov    -0x4(%rbp),%eax
and    $0xfffffffe,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitarithm_test_and_clear>:
mov    %edi,%eax
test   $0x1,%al
jne    111e <bitarithm_test_and_clear+0x1e>
mov    (%rsi),%ecx
nopl   0x0(%rax,%rax,1)
mov    %eax,%edx
add    $0x1,%ecx
shr    %eax
test   $0x2,%dl
je     1110 <bitarithm_test_and_clear+0x10>
mov    %ecx,(%rsi)
and    $0xfffffffe,%eax
ret

LLVM IR (-O0):
define i32 @bitarithm_test_and_clear(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
br label %5
5: ; preds = %9, %2
%6 = load i32, i32* %3
%7 = and i32 %6, 1
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i32*, i32** %4
%11 = load i32, i32* %10
%12 = add nsw i32 %11, 1
store i32 %12, i32* %10
%13 = load i32, i32* %3
%14 = lshr i32 %13, 1
store i32 %14, i32* %3
br label %5
15: ; preds = %5
%16 = load i32, i32* %3
%17 = and i32 %16, -2
ret i32 %17
}

LLVM IR (-O2):
define i32 @bitarithm_test_and_clear(i32 %0, i32* nocapture %1) {
%3 = and i32 %0, 1
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %15
5: ; preds = %2
%6 = load i32, i32* %1
br label %7
7: ; preds = %5, %7
%8 = phi i32 [ %6, %5 ], [ %10, %7 ]
%9 = phi i32 [ %0, %5 ], [ %11, %7 ]
%10 = add nsw i32 %8, 1
%11 = lshr i32 %9, 1
%12 = and i32 %9, 2
%13 = icmp eq i32 %12, 0
br i1 %13, label %7, label %14
14: ; preds = %7
store i32 %10, i32* %1
br label %15
15: ; preds = %14, %2
%16 = phi i32 [ %11, %14 ], [ %0, %2 ]
%17 = and i32 %16, -2
ret i32 %17
}