xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ isPerfect(int);
int /*<<< orphan*/ printFactors(int);
int main() {
  int n;
  for (n = 1; n <= 100000; n++) {
    if (isPerfect(n))
      printFactors(n);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x186a0,-0x8(%rbp)
jg     1170 <main+0x50>
mov    -0x8(%rbp),%edi
call   1030 <isPerfect@plt>
cmp    $0x0,%rax
je     115d <main+0x3d>
mov    -0x8(%rbp),%edi
call   1040 <printFactors@plt>
jmp    1162 <main+0x42>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1136 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x1,%ebx
jmp    113b <main+0x1b>
nopl   0x0(%rax,%rax,1)
add    $0x1,%ebx
cmp    $0x186a1,%ebx
je     1150 <main+0x30>
mov    %ebx,%edi
call   1030 <isPerfect@plt>
test   %rax,%rax
je     1130 <main+0x10>
mov    %ebx,%edi
call   1040 <printFactors@plt>
jmp    1130 <main+0x10>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
br label %3
3: ; preds = %14, %0
%4 = load i32, i32* %2
%5 = icmp sle i32 %4, 100000
br i1 %5, label %6, label %17
6: ; preds = %3
%7 = load i32, i32* %2
%8 = call i64 @isPerfect(i32 %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %6
%11 = load i32, i32* %2
%12 = call i32 @printFactors(i32 %11)
br label %13
13: ; preds = %10, %6
br label %14
14: ; preds = %13
%15 = load i32, i32* %2
%16 = add nsw i32 %15, 1
store i32 %16, i32* %2
br label %3
17: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %7
%2 = phi i32 [ 1, %0 ], [ %8, %7 ]
%3 = tail call i64 @isPerfect(i32 %2)
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 @printFactors(i32 %2)
br label %7
7: ; preds = %1, %5
%8 = add nuw nsw i32 %2, 1
%9 = icmp eq i32 %8, 100001
br i1 %9, label %10, label %1
10: ; preds = %7
ret i32 0
}
int cpy_strlen(char const *str) {
  int i = 0;
  while (str[i] != '\0')
    i++;
  return (i);
}


x86 assembly (clang, -O0):
<cpy_strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1132 <cpy_strlen+0x32>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <cpy_strlen+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpy_strlen>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <cpy_strlen+0x10>
ret

LLVM IR (-O0):
define i32 @cpy_strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %4
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @cpy_strlen(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
int main() {
  int i;
  int a;
  int x = 1;
  for (i = 0; i < 1000000000; i++) {
    x = x >> 1;
    x = x >> 6;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x10(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x3b9aca00,-0x8(%rbp)
jge    1146 <main+0x46>
mov    -0x10(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
sar    $0x6,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1119 <main+0x19>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %4
store i32 0, i32* %2
br label %5
5: ; preds = %13, %0
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 1000000000
br i1 %7, label %8, label %16
8: ; preds = %5
%9 = load i32, i32* %4
%10 = ashr i32 %9, 1
store i32 %10, i32* %4
%11 = load i32, i32* %4
%12 = ashr i32 %11, 6
store i32 %12, i32* %4
br label %13
13: ; preds = %8
%14 = load i32, i32* %2
%15 = add nsw i32 %14, 1
store i32 %15, i32* %2
br label %5
16: ; preds = %5
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
typedef double GLdouble;

/* Variables and functions */
int /*<<< orphan*/ GLUT_ELAPSED_TIME;
double glutGet(int /*<<< orphan*/);
GLdouble get_secs(void) { return glutGet(GLUT_ELAPSED_TIME) / 1000.0; }


x86 assembly (clang, -O0):
<get_secs>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
call   1030 <glutGet@plt>
movsd  0xed6(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_secs>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
call   1030 <glutGet@plt>
divsd  0xed9(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@GLUT_ELAPSED_TIME = global i32 0
define double @get_secs() {
%1 = load i32, i32* @GLUT_ELAPSED_TIME
%2 = call double @glutGet(i32 %1)
%3 = fdiv double %2, 1.000000e+03
ret double %3
}

LLVM IR (-O2):
@GLUT_ELAPSED_TIME = global i32 0
define double @get_secs() {
%1 = load i32, i32* @GLUT_ELAPSED_TIME
%2 = tail call double @glutGet(i32 %1)
%3 = fdiv double %2, 1.000000e+03
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int is_xio_pin(int pin) {
  int base_add;
  for (base_add = 1013; base_add < (1013 + 8); base_add++) {
    if (pin == base_add) {
      return 1;
    }
  }
  printf("%d is not a valid XIO pin address\n", pin);
  return 0;
}


x86 assembly (clang, -O0):
<is_xio_pin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
movl   $0x3f5,-0xc(%rbp)
cmpl   $0x3fd,-0xc(%rbp)
jge    115a <is_xio_pin+0x4a>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    1147 <is_xio_pin+0x37>
movl   $0x1,-0x4(%rbp)
jmp    1170 <is_xio_pin+0x60>
jmp    114c <is_xio_pin+0x3c>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1122 <is_xio_pin+0x12>
mov    -0x8(%rbp),%esi
lea    0xe9c(%rip),%rdi
call   1030 <printf@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_xio_pin>:
mov    %edi,%esi
lea    -0x3f5(%rsi),%ecx
mov    $0x1,%eax
cmp    $0x8,%ecx
jb     1135 <is_xio_pin+0x25>
push   %rax
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
@.str = [35 x i8] c"%d is not a valid XIO pin address\0A\00"
define i32 @is_xio_pin(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 1013, i32* %4
br label %5
5: ; preds = %14, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 1021
br i1 %7, label %8, label %17
8: ; preds = %5
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = icmp eq i32 %9, %10
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 1, i32* %2
br label %20
13: ; preds = %8
br label %14
14: ; preds = %13
%15 = load i32, i32* %4
%16 = add nsw i32 %15, 1
store i32 %16, i32* %4
br label %5
17: ; preds = %5
%18 = load i32, i32* %3
%19 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i32 %18)
store i32 0, i32* %2
br label %20
20: ; preds = %17, %12
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
@.str = [35 x i8] c"%d is not a valid XIO pin address\0A\00"
define i32 @is_xio_pin(i32 %0) {
%2 = add i32 %0, -1013
%3 = icmp ult i32 %2, 8
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i32 %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 0, %4 ], [ 1, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ leave_alternate_buffer();
int /*<<< orphan*/ restore_mode();
void sigint_handler(int signum) {
  restore_mode();
  leave_alternate_buffer();
  exit(1);
}


x86 assembly (clang, -O0):
<sigint_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <restore_mode@plt>
mov    $0x0,%al
call   1040 <leave_alternate_buffer@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<sigint_handler>:
push   %rax
xor    %eax,%eax
call   1030 <restore_mode@plt>
xor    %eax,%eax
call   1040 <leave_alternate_buffer@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define void @sigint_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @restore_mode()
%4 = call i32 (...) @leave_alternate_buffer()
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @sigint_handler(i32 %0) {
%2 = tail call i32 (...) @restore_mode()
%3 = tail call i32 (...) @leave_alternate_buffer()
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int atoi(char *);
int /*<<< orphan*/ uwsgi_exit(int);
void uwsgi_opt_exit(char *opt, char *value, void *none) {
  int exit_code = 1;
  if (value) {
    exit_code = atoi(value);
  }
  uwsgi_exit(exit_code);
}


x86 assembly (clang, -O0):
<uwsgi_opt_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x1,-0x1c(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1152 <uwsgi_opt_exit+0x32>
mov    -0x10(%rbp),%rdi
call   1040 <atoi@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%edi
call   1030 <uwsgi_exit@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uwsgi_opt_exit>:
test   %rsi,%rsi
je     1139 <uwsgi_opt_exit+0x19>
push   %rax
mov    %rsi,%rdi
call   1040 <atoi@plt>
mov    %eax,%edi
add    $0x8,%rsp
jmp    1030 <uwsgi_exit@plt>
mov    $0x1,%edi
jmp    1030 <uwsgi_exit@plt>

LLVM IR (-O0):
define void @uwsgi_opt_exit(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
store i32 1, i32* %7
%8 = load i8*, i8** %5
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %13
10: ; preds = %3
%11 = load i8*, i8** %5
%12 = call i32 @atoi(i8* %11)
store i32 %12, i32* %7
br label %13
13: ; preds = %10, %3
%14 = load i32, i32* %7
%15 = call i32 @uwsgi_exit(i32 %14)
ret void
}

LLVM IR (-O2):
define void @uwsgi_opt_exit(i8* nocapture readnone %0, i8* %1, i8* nocapture readnone %2) {
%4 = icmp eq i8* %1, null
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @atoi(i8* %1)
br label %7
7: ; preds = %5, %3
%8 = phi i32 [ %6, %5 ], [ 1, %3 ]
%9 = tail call i32 @uwsgi_exit(i32 %8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void sonuc_yazdir(int sonuc_sayisi) {
  if (sonuc_sayisi == 1) {
    printf("Girilen sayi cift sayidir.");
  } else {
    printf("Girilen sayi cift sayi degildir.");
  }
}


x86 assembly (clang, -O0):
<sonuc_yazdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jne    1136 <sonuc_yazdir+0x26>
lea    0xed4(%rip),%rdi
call   1030 <printf@plt>
jmp    1142 <sonuc_yazdir+0x32>
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sonuc_yazdir>:
cmp    $0x1,%edi
lea    0xee6(%rip),%rax
lea    0xefa(%rip),%rdi
cmove  %rax,%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"Girilen sayi cift sayidir.\00"
@.str.1 = [33 x i8] c"Girilen sayi cift sayi degildir.\00"
define void @sonuc_yazdir(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
br label %9
7: ; preds = %1
%8 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.1, i64 0, i64 0))
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"Girilen sayi cift sayidir.\00"
@.str.1 = [33 x i8] c"Girilen sayi cift sayi degildir.\00"
define void @sonuc_yazdir(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = select i1 %2, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.1, i64 0, i64 0)
%4 = tail call i32 @printf(i8* dereferenceable(1) %3)
ret void
}
/* Variables and functions */
int __syscall(int);
int fork(void) { return __syscall(57); }


x86 assembly (clang, -O0):
<fork>:
push   %rbp
mov    %rsp,%rbp
mov    $0x39,%edi
call   1030 <__syscall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fork>:
mov    $0x39,%edi
jmp    1030 <__syscall@plt>

LLVM IR (-O0):
define i32 @fork() {
%1 = call i32 @__syscall(i32 57)
ret i32 %1
}

LLVM IR (-O2):
define i32 @fork() {
%1 = tail call i32 @__syscall(i32 57)
ret i32 %1
}
/* Type definitions */
struct timespec {
  int dummy;
};
typedef int /*<<< orphan*/ clockid_t;

/* Variables and functions */
int clock_gettime(clockid_t clk_id, struct timespec *tp) { return 1; }


x86 assembly (clang, -O0):
<clock_gettime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clock_gettime>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
define i32 @clock_gettime(i32 %0, %struct.timespec* %1) {
%3 = alloca i32
%4 = alloca %struct.timespec*
store i32 %0, i32* %3
store %struct.timespec* %1, %struct.timespec** %4
ret i32 1
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
define i32 @clock_gettime(i32 %0, %struct.timespec* nocapture readnone %1) {
ret i32 1
}
int main() {
  int x = 0;
  while (1) {
    ++x;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>

x86 assembly (clang, -O2):
<main>:
jmp    1100 <main>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %0, %3
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
store i32 %5, i32* %2
br label %3
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void mpga_set_padding(uint8_t *p_mpga) { p_mpga[2] |= 0x02; }


x86 assembly (clang, -O0):
<mpga_set_padding>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%ecx
or     $0x2,%ecx
mov    %ecx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpga_set_padding>:
orb    $0x2,0x8(%rdi)
ret

LLVM IR (-O0):
define void @mpga_set_padding(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 2
%5 = load i32, i32* %4
%6 = or i32 %5, 2
store i32 %6, i32* %4
ret void
}

LLVM IR (-O2):
define void @mpga_set_padding(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 2
%3 = load i32, i32* %2
%4 = or i32 %3, 2
store i32 %4, i32* %2
ret void
}
int test_imm_29int64_lowword_mem(long long *val) {
  return ((*val) & (0x29 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_29int64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x29,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_29int64_lowword_mem>:
testb  $0x29,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_29int64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 41
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_29int64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 41
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ __NR_execve;
int syscall(int /*<<< orphan*/, char const *, char *const *, char *const *);
int f_execve(const char *filename, char *const argv[], char *const envp[]) {
  return syscall(__NR_execve, filename, argv, envp);
}


x86 assembly (clang, -O0):
<f_execve>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_execve>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@__NR_execve = global i32 0
define i32 @f_execve(i8* %0, i8** %1, i8** %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i8** %2, i8*** %6
%7 = load i32, i32* @__NR_execve
%8 = load i8*, i8** %4
%9 = load i8**, i8*** %5
%10 = load i8**, i8*** %6
%11 = call i32 @syscall(i32 %7, i8* %8, i8** %9, i8** %10)
ret i32 %11
}

LLVM IR (-O2):
@__NR_execve = global i32 0
define i32 @f_execve(i8* %0, i8** %1, i8** %2) {
%4 = load i32, i32* @__NR_execve
%5 = tail call i32 @syscall(i32 %4, i8* %0, i8** %1, i8** %2)
ret i32 %5
}
void rop3_55_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = *D | T;
  stk1 = S & stk2;
  stk1 = ~stk1;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_55_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xa(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_55_1_0>:
not    %sil
or     %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_55_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i8, i8* %6
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %8
%16 = load i8, i8* %5
%17 = zext i8 %16 to i32
%18 = load i8, i8* %8
%19 = zext i8 %18 to i32
%20 = and i32 %17, %19
%21 = trunc i32 %20 to i8
store i8 %21, i8* %7
%22 = load i8, i8* %7
%23 = zext i8 %22 to i32
%24 = xor i32 %23, -1
%25 = trunc i32 %24 to i8
store i8 %25, i8* %7
%26 = load i8, i8* %7
%27 = zext i8 %26 to i32
%28 = load i8, i8* %5
%29 = zext i8 %28 to i32
%30 = xor i32 %29, -1
%31 = and i32 %27, %30
%32 = load i8*, i8** %4
%33 = load i8, i8* %32
%34 = zext i8 %33 to i32
%35 = load i8, i8* %5
%36 = zext i8 %35 to i32
%37 = and i32 %34, %36
%38 = or i32 %31, %37
%39 = trunc i32 %38 to i8
%40 = load i8*, i8** %4
store i8 %39, i8* %40
ret void
}

LLVM IR (-O2):
define void @rop3_55_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %1, -1
%6 = or i8 %4, %5
store i8 %6, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fd(int);
int fb(int a) {
  fd(2);
  return 0;
}


x86 assembly (clang, -O0):
<fb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x2,%edi
call   1030 <fd@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb>:
push   %rax
mov    $0x2,%edi
call   1030 <fd@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fb(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @fd(i32 2)
ret i32 0
}

LLVM IR (-O2):
define i32 @fb(i32 %0) {
%2 = tail call i32 @fd(i32 2)
ret i32 0
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ chr2setBank0(int);
void s3setParams8800(uint16_t addr, uint8_t val) {
  (void)addr;
  chr2setBank0(val << 11);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
shl    $0xb,%edi
call   1030 <chr2setBank0@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    %esi,%edi
shl    $0xb,%edi
jmp    1030 <chr2setBank0@plt>

LLVM IR (-O0):
define void @s3setParams8800(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %6, 11
%8 = call i32 @chr2setBank0(i32 %7)
ret void
}

LLVM IR (-O2):
define void @s3setParams8800(i32 %0, i32 %1) {
%3 = shl i32 %1, 11
%4 = tail call i32 @chr2setBank0(i32 %3)
ret void
}
void get_switch(int *target) {
  volatile int *sw_ptr = (int *)0xFF200010;
  volatile int sw_val = *(sw_ptr);
  *(target) = sw_val;
}


x86 assembly (clang, -O0):
<get_switch>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xff200010,%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_switch>:
mov    $0xff200010,%eax
mov    (%rax),%eax
mov    %eax,-0x4(%rsp)
mov    -0x4(%rsp),%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @get_switch(i32* %0) {
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %2
store i32* inttoptr (i64 4280287248 to i32*), i32** %3
%5 = load i32*, i32** %3
%6 = load volatile i32, i32* %5
store volatile i32 %6, i32* %4
%7 = load volatile i32, i32* %4
%8 = load i32*, i32** %2
store i32 %7, i32* %8
ret void
}

LLVM IR (-O2):
define void @get_switch(i32* nocapture writeonly %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = load volatile i32, i32* inttoptr (i64 4280287248 to i32*)
store volatile i32 %4, i32* %2
%5 = load volatile i32, i32* %2
store i32 %5, i32* %0
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long serial;
};
typedef TYPE_1__ XVisibilityEvent;

/* Variables and functions */
void set_XVisibilityEvent_serial(void *_p, unsigned long _v) {
  ((XVisibilityEvent *)_p)->serial = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XVisibilityEvent_serial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XVisibilityEvent_serial>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define void @set_XVisibilityEvent_serial(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @set_XVisibilityEvent_serial(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
int another_function(int *y) {
  if (*y > 0)
    return *y;
  return 0;
}


x86 assembly (clang, -O0):
<another_function>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpl   $0x0,(%rax)
jle    1123 <another_function+0x23>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    112a <another_function+0x2a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<another_function>:
mov    (%rdi),%ecx
xor    %eax,%eax
test   %ecx,%ecx
cmovns %ecx,%eax
ret

LLVM IR (-O0):
define i32 @another_function(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = load i32, i32* %4
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32*, i32** %3
%9 = load i32, i32* %8
store i32 %9, i32* %2
br label %11
10: ; preds = %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @another_function(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = icmp sgt i32 %2, 0
%4 = select i1 %3, i32 %2, i32 0
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ volatile uint32_t;

/* Variables and functions */
uint32_t direct_set32(volatile uint32_t *addr, uint32_t dat) {
  *addr |= dat;
  return dat;
}


x86 assembly (clang, -O0):
<direct_set32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<direct_set32>:
mov    %esi,-0x4(%rsp)
mov    -0x4(%rsp),%eax
or     %eax,(%rdi)
mov    -0x4(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @direct_set32(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store volatile i32 %1, i32* %4
%5 = load volatile i32, i32* %4
%6 = load i32*, i32** %3
%7 = load volatile i32, i32* %6
%8 = or i32 %7, %5
store volatile i32 %8, i32* %6
%9 = load volatile i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @direct_set32(i32* %0, i32 %1) {
%3 = alloca i32
store volatile i32 %1, i32* %3
%4 = load volatile i32, i32* %3
%5 = load volatile i32, i32* %0
%6 = or i32 %5, %4
store volatile i32 %6, i32* %0
%7 = load volatile i32, i32* %3
ret i32 %7
}
double maximum(double a, double b) { return a > b ? a : b; }


x86 assembly (clang, -O0):
<maximum>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    112d <maximum+0x2d>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1137 <maximum+0x37>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<maximum>:
maxsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @maximum(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp ogt double %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load double, double* %3
br label %12
10: ; preds = %2
%11 = load double, double* %4
br label %12
12: ; preds = %10, %8
%13 = phi double [ %9, %8 ], [ %11, %10 ]
ret double %13
}

LLVM IR (-O2):
define double @maximum(double %0, double %1) {
%3 = fcmp ogt double %0, %1
%4 = select i1 %3, double %0, double %1
ret double %4
}
int fusion_int(int *p) { return p[0x12345]; }


x86 assembly (clang, -O0):
<fusion_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x48d14(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fusion_int>:
mov    0x48d14(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @fusion_int(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 74565
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @fusion_int(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 74565
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
float log10f(float);
float lin2db(float lin) { return 20.0f * log10f(lin); }


x86 assembly (clang, -O0):
<lin2db>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <log10f@plt>
movaps %xmm0,%xmm1
movss  0xece(%rip),%xmm0
mulss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lin2db>:
push   %rax
call   1030 <log10f@plt>
mulss  0xee2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @lin2db(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @log10f(float %3)
%5 = fmul float 2.000000e+01, %4
ret float %5
}

LLVM IR (-O2):
define float @lin2db(float %0) {
%2 = tail call float @log10f(float %0)
%3 = fmul float %2, 2.000000e+01
ret float %3
}
/* Variables and functions */
int exact_square(int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int d;
  scanf("%d", &d);
  d = (d >= 0) ? d : (-d);
  printf("%d", exact_square(d));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
cmpl   $0x0,-0x8(%rbp)
jl     1164 <main+0x34>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    116c <main+0x3c>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <exact_square@plt>
mov    %eax,%esi
lea    0xe7d(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xec4(%rip),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1050 <scanf@plt>
mov    0xc(%rsp),%eax
mov    %eax,%edi
neg    %edi
cmovs  %eax,%edi
mov    %edi,0xc(%rsp)
call   1040 <exact_square@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = icmp sge i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = load i32, i32* %2
br label %11
8: ; preds = %0
%9 = load i32, i32* %2
%10 = sub nsw i32 0, %9
br label %11
11: ; preds = %8, %6
%12 = phi i32 [ %7, %6 ], [ %10, %8 ]
store i32 %12, i32* %2
%13 = load i32, i32* %2
%14 = call i32 @exact_square(i32 %13)
%15 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %14)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @llvm.abs.i32(i32 %4, i1 true)
store i32 %5, i32* %1
%6 = call i32 @exact_square(i32 %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}
void CrashLog_LogRegisters(char *buffer) {
  (void)buffer;
  ;
}


x86 assembly (clang, -O0):
<CrashLog_LogRegisters>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<CrashLog_LogRegisters>:
ret

LLVM IR (-O0):
define void @CrashLog_LogRegisters(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @CrashLog_LogRegisters(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sendbyte(char);
void printNibble(unsigned char nibble) {
  if (nibble < 10) {
    sendbyte('0' + nibble);
  } else {
    sendbyte('A' + (nibble - 10));
  }
}


x86 assembly (clang, -O0):
<printNibble>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0xa,%eax
jge    113f <printNibble+0x2f>
movzbl -0x1(%rbp),%eax
add    $0x30,%eax
movsbl %al,%edi
call   1030 <sendbyte@plt>
jmp    1151 <printNibble+0x41>
movzbl -0x1(%rbp),%eax
sub    $0xa,%eax
add    $0x41,%eax
movsbl %al,%edi
call   1030 <sendbyte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printNibble>:
cmp    $0xa,%dil
mov    $0x30,%eax
mov    $0x37,%ecx
cmovb  %eax,%ecx
add    %dil,%cl
movsbl %cl,%edi
jmp    1030 <sendbyte@plt>

LLVM IR (-O0):
define void @printNibble(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i8, i8* %2
%8 = zext i8 %7 to i32
%9 = add nsw i32 48, %8
%10 = trunc i32 %9 to i8
%11 = call i32 @sendbyte(i8 signext %10)
br label %19
12: ; preds = %1
%13 = load i8, i8* %2
%14 = zext i8 %13 to i32
%15 = sub nsw i32 %14, 10
%16 = add nsw i32 65, %15
%17 = trunc i32 %16 to i8
%18 = call i32 @sendbyte(i8 signext %17)
br label %19
19: ; preds = %12, %6
ret void
}

LLVM IR (-O2):
define void @printNibble(i8 zeroext %0) {
%2 = icmp ult i8 %0, 10
%3 = select i1 %2, i8 48, i8 55
%4 = add i8 %3, %0
%5 = tail call i32 @sendbyte(i8 signext %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputc(int, int /*<<< orphan*/ *);
void uninitvar_fputc(void) {
  int c;
  FILE *stream;
  (void)fputc(c, stream);
}


x86 assembly (clang, -O0):
<uninitvar_fputc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_fputc>:
jmp    1030 <fputc@plt>

LLVM IR (-O0):
define void @uninitvar_fputc() {
%1 = alloca i32
%2 = alloca i32*
%3 = load i32, i32* %1
%4 = load i32*, i32** %2
%5 = call i32 @fputc(i32 %3, i32* %4)
ret void
}

LLVM IR (-O2):
define void @uninitvar_fputc() {
%1 = tail call i32 @fputc(i32 undef, i32* undef)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fish_shape(int, int, int, int);
void effect(void) { fish_shape(2, 1, 1, ((1 << 12) - 1)); }


x86 assembly (clang, -O0):
<effect>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
mov    $0x1,%edx
mov    $0xfff,%ecx
mov    %edx,%esi
call   1030 <fish_shape@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<effect>:
mov    $0x2,%edi
mov    $0x1,%esi
mov    $0x1,%edx
mov    $0xfff,%ecx
jmp    1030 <fish_shape@plt>

LLVM IR (-O0):
define void @effect() {
%1 = call i32 @fish_shape(i32 2, i32 1, i32 1, i32 4095)
ret void
}

LLVM IR (-O2):
define void @effect() {
%1 = tail call i32 @fish_shape(i32 2, i32 1, i32 1, i32 4095)
ret void
}
/* Type definitions */
struct type {
  int dummy;
};
struct compile_state {
  int dummy;
};

/* Variables and functions */
struct type *declarator(struct compile_state *, struct type *,
                        int /*<<< orphan*/, int /*<<< orphan*/);
struct type *specifier_qualifier_list(struct compile_state *);
struct type *type_name(struct compile_state *state) {
  struct type *type;
  type = specifier_qualifier_list(state);
  type = declarator(state, type, 0, 0);
  return type;
}


x86 assembly (clang, -O0):
<type_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <specifier_qualifier_list@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %ecx,%ecx
mov    %ecx,%edx
call   1030 <declarator@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<type_name>:
push   %rbx
mov    %rdi,%rbx
call   1040 <specifier_qualifier_list@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
xor    %edx,%edx
xor    %ecx,%ecx
pop    %rbx
jmp    1030 <declarator@plt>

LLVM IR (-O0):
%struct.type = type { i32 }
%struct.compile_state = type { i32 }
define %struct.type* @type_name(%struct.compile_state* %0) {
%2 = alloca %struct.compile_state*
%3 = alloca %struct.type*
store %struct.compile_state* %0, %struct.compile_state** %2
%4 = load %struct.compile_state*, %struct.compile_state** %2
%5 = call %struct.type* @specifier_qualifier_list(%struct.compile_state* %4)
store %struct.type* %5, %struct.type** %3
%6 = load %struct.compile_state*, %struct.compile_state** %2
%7 = load %struct.type*, %struct.type** %3
%8 = call %struct.type* @declarator(%struct.compile_state* %6, %struct.type* %7, i32 0, i32 0)
store %struct.type* %8, %struct.type** %3
%9 = load %struct.type*, %struct.type** %3
ret %struct.type* %9
}

LLVM IR (-O2):
%struct.type = type { i32 }
%struct.compile_state = type { i32 }
define %struct.type* @type_name(%struct.compile_state* %0) {
%2 = tail call %struct.type* @specifier_qualifier_list(%struct.compile_state* %0)
%3 = tail call %struct.type* @declarator(%struct.compile_state* %0, %struct.type* %2, i32 0, i32 0)
ret %struct.type* %3
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
long f(long);
long g2(long);
main() {
  if (f(123456789L) != 123456789L)
    abort();
  if (f(123456789L) != g2(123456789L))
    abort();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x75bcd15,%edi
call   1040 <f@plt>
cmp    $0x75bcd15,%rax
je     116c <main+0x2c>
mov    $0x0,%al
call   1030 <abort@plt>
mov    $0x75bcd15,%edi
call   1040 <f@plt>
mov    %rax,-0x10(%rbp)
mov    $0x75bcd15,%edi
call   1050 <g2@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
je     119b <main+0x5b>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %edi,%edi
call   1060 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x75bcd15,%edi
call   1040 <f@plt>
cmp    $0x75bcd15,%rax
jne    1176 <main+0x36>
mov    $0x75bcd15,%edi
call   1040 <f@plt>
mov    %rax,%rbx
mov    $0x75bcd15,%edi
call   1050 <g2@plt>
cmp    %rax,%rbx
jne    1176 <main+0x36>
xor    %edi,%edi
call   1060 <exit@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 @f(i64 123456789)
%3 = icmp ne i64 %2, 123456789
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @abort()
unreachable
6: ; preds = %0
%7 = call i64 @f(i64 123456789)
%8 = call i64 @g2(i64 123456789)
%9 = icmp ne i64 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %6
%11 = call i32 (...) @abort()
unreachable
12: ; preds = %6
%13 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @f(i64 123456789)
%2 = icmp eq i64 %1, 123456789
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = tail call i64 @f(i64 123456789)
%7 = tail call i64 @g2(i64 123456789)
%8 = icmp eq i64 %6, %7
br i1 %8, label %11, label %9
9: ; preds = %5
%10 = tail call i32 (...) @abort()
unreachable
11: ; preds = %5
%12 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int getCpuFreq();
int /*<<< orphan*/ setCpuFrequency(int);
int /*<<< orphan*/ setGpuFrequency(int);
void setFrequencies(int cpuFrequency, int gpuFrequency) {
  if (cpuFrequency != getCpuFreq()) {
    setCpuFrequency(cpuFrequency);
  }
  if (gpuFrequency != getCpuFreq()) {
    setGpuFrequency(gpuFrequency);
  }
}


x86 assembly (clang, -O0):
<setFrequencies>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1040 <getCpuFreq@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
cmp    %ecx,%eax
je     1160 <setFrequencies+0x30>
mov    -0x4(%rbp),%edi
call   1030 <setCpuFrequency@plt>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    $0x0,%al
call   1040 <getCpuFreq@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
cmp    %ecx,%eax
je     1182 <setFrequencies+0x52>
mov    -0x8(%rbp),%edi
call   1050 <setGpuFrequency@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setFrequencies>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1040 <getCpuFreq@plt>
cmp    %ebp,%eax
je     1149 <setFrequencies+0x19>
mov    %ebp,%edi
call   1030 <setCpuFrequency@plt>
xor    %eax,%eax
call   1040 <getCpuFreq@plt>
cmp    %ebx,%eax
jne    115b <setFrequencies+0x2b>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <setGpuFrequency@plt>

LLVM IR (-O0):
define void @setFrequencies(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 (...) @getCpuFreq()
%7 = icmp ne i32 %5, %6
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* %3
%10 = call i32 @setCpuFrequency(i32 %9)
br label %11
11: ; preds = %8, %2
%12 = load i32, i32* %4
%13 = call i32 (...) @getCpuFreq()
%14 = icmp ne i32 %12, %13
br i1 %14, label %15, label %18
15: ; preds = %11
%16 = load i32, i32* %4
%17 = call i32 @setGpuFrequency(i32 %16)
br label %18
18: ; preds = %15, %11
ret void
}

LLVM IR (-O2):
define void @setFrequencies(i32 %0, i32 %1) {
%3 = tail call i32 (...) @getCpuFreq()
%4 = icmp eq i32 %3, %0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @setCpuFrequency(i32 %0)
br label %7
7: ; preds = %5, %2
%8 = tail call i32 (...) @getCpuFreq()
%9 = icmp eq i32 %8, %1
br i1 %9, label %12, label %10
10: ; preds = %7
%11 = tail call i32 @setGpuFrequency(i32 %1)
br label %12
12: ; preds = %10, %7
ret void
}
/* Variables and functions */
int scan_for_uintN(char const *, int, unsigned long long *, char const **);
int scan_for_uint64(const char *_str, unsigned long long *ret_,
                    const char **end_) {
  unsigned long long ret;
  int b_err = scan_for_uintN(_str, 64, &ret, end_);
  if (ret_) {
    *ret_ = ret;
  }
  return b_err;
}


x86 assembly (clang, -O0):
<scan_for_uint64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rcx
mov    $0x40,%esi
lea    -0x20(%rbp),%rdx
call   1030 <scan_for_uintN@plt>
mov    %eax,-0x24(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1153 <scan_for_uint64+0x43>
mov    -0x20(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scan_for_uint64>:
push   %rbx
sub    $0x10,%rsp
mov    %rdx,%rcx
mov    %rsi,%rbx
lea    0x8(%rsp),%rdx
mov    $0x40,%esi
call   1030 <scan_for_uintN@plt>
test   %rbx,%rbx
je     1137 <scan_for_uint64+0x27>
mov    0x8(%rsp),%rcx
mov    %rcx,(%rbx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @scan_for_uint64(i8* %0, i64* %1, i8** %2) {
%4 = alloca i8*
%5 = alloca i64*
%6 = alloca i8**
%7 = alloca i64
%8 = alloca i32
store i8* %0, i8** %4
store i64* %1, i64** %5
store i8** %2, i8*** %6
%9 = load i8*, i8** %4
%10 = load i8**, i8*** %6
%11 = call i32 @scan_for_uintN(i8* %9, i32 64, i64* %7, i8** %10)
store i32 %11, i32* %8
%12 = load i64*, i64** %5
%13 = icmp ne i64* %12, null
br i1 %13, label %14, label %17
14: ; preds = %3
%15 = load i64, i64* %7
%16 = load i64*, i64** %5
store i64 %15, i64* %16
br label %17
17: ; preds = %14, %3
%18 = load i32, i32* %8
ret i32 %18
}

LLVM IR (-O2):
define i32 @scan_for_uint64(i8* %0, i64* writeonly %1, i8** %2) {
%4 = alloca i64
%5 = bitcast i64* %4 to i8*
%6 = call i32 @scan_for_uintN(i8* %0, i32 64, i64* %4, i8** %2)
%7 = icmp eq i64* %1, null
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = load i64, i64* %4
store i64 %9, i64* %1
br label %10
10: ; preds = %8, %3
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ write_test(char *, char *, char *);
void write_script(char *script) {
  write_test("shell", "scripting.code;\n%s\nscripting.ends;", script);
}


x86 assembly (clang, -O0):
<write_script>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xed8(%rip),%rsi
call   1030 <write_test@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_script>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xee5(%rip),%rsi
jmp    1030 <write_test@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"shell\00"
@.str.1 = [35 x i8] c"scripting.code;\0A%s\0Ascripting.ends;\00"
define void @write_script(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @write_test(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"shell\00"
@.str.1 = [35 x i8] c"scripting.code;\0A%s\0Ascripting.ends;\00"
define void @write_script(i8* %0) {
%2 = tail call i32 @write_test(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ parent;
};
typedef TYPE_1__ XMapRequestEvent;

/* Variables and functions */
unsigned long get_XMapRequestEvent_parent(void *_p) {
  return (unsigned long)((XMapRequestEvent *)_p)->parent;
}


x86 assembly (clang, -O0):
<get_XMapRequestEvent_parent>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XMapRequestEvent_parent>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XMapRequestEvent_parent(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XMapRequestEvent_parent(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Variables and functions */
int tst_DECCKSR(char const *, int, char *);
int tst_DSR_area_sum(const char *the_title) {
  return tst_DECCKSR(the_title, 1, "1;1;10;10;20;20*y");
}


x86 assembly (clang, -O0):
<tst_DSR_area_sum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
lea    0xed4(%rip),%rdx
call   1030 <tst_DECCKSR@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tst_DSR_area_sum>:
lea    0xee9(%rip),%rdx
mov    $0x1,%esi
jmp    1030 <tst_DECCKSR@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"1;1;10;10;20;20*y\00"
define i32 @tst_DSR_area_sum(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @tst_DECCKSR(i8* %3, i32 1, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [18 x i8] c"1;1;10;10;20;20*y\00"
define i32 @tst_DSR_area_sum(i8* %0) {
%2 = tail call i32 @tst_DECCKSR(i8* %0, i32 1, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
void security_netdev_unregister(struct net_device *dev) {}


x86 assembly (clang, -O0):
<security_netdev_unregister>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<security_netdev_unregister>:
ret

LLVM IR (-O0):
%struct.net_device = type opaque
define void @security_netdev_unregister(%struct.net_device* %0) {
%2 = alloca %struct.net_device*
store %struct.net_device* %0, %struct.net_device** %2
ret void
}

LLVM IR (-O2):
%struct.net_device = type opaque
define void @security_netdev_unregister(%struct.net_device* nocapture %0) {
ret void
}