xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint64_t;
typedef int uint32_t;

/* Variables and functions */
uint32_t get_fat_size_sectors(uint32_t DskSize, uint32_t ReservedSecCnt,
                              uint32_t SecPerClus, uint32_t NumFATs,
                              uint32_t BytesPerSect) {
  uint64_t Numerator, Denominator;
  uint64_t FatElementSize = 4;
  uint64_t FatSz;
  Numerator = FatElementSize * (DskSize - ReservedSecCnt);
  Denominator = (SecPerClus * BytesPerSect) + (FatElementSize * NumFATs);
  FatSz = Numerator / Denominator;
  FatSz += 1;
  return ((uint32_t)FatSz);
}


x86 assembly (clang, -O0):
<get_fat_size_sectors>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
movl   $0x4,-0x20(%rbp)
mov    -0x20(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    -0x8(%rbp),%ecx
imul   %ecx,%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
imul   -0x14(%rbp),%eax
mov    -0x20(%rbp),%ecx
imul   -0x10(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
cltd
idivl  -0x1c(%rbp)
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_fat_size_sectors>:
sub    %esi,%edi
lea    0x0(,%rdi,4),%eax
imul   %r8d,%edx
lea    (%rdx,%rcx,4),%ecx
cltd
idiv   %ecx
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @get_fat_size_sectors(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
store i32 4, i32* %13
%15 = load i32, i32* %13
%16 = load i32, i32* %6
%17 = load i32, i32* %7
%18 = sub nsw i32 %16, %17
%19 = mul nsw i32 %15, %18
store i32 %19, i32* %11
%20 = load i32, i32* %8
%21 = load i32, i32* %10
%22 = mul nsw i32 %20, %21
%23 = load i32, i32* %13
%24 = load i32, i32* %9
%25 = mul nsw i32 %23, %24
%26 = add nsw i32 %22, %25
store i32 %26, i32* %12
%27 = load i32, i32* %11
%28 = load i32, i32* %12
%29 = sdiv i32 %27, %28
store i32 %29, i32* %14
%30 = load i32, i32* %14
%31 = add nsw i32 %30, 1
store i32 %31, i32* %14
%32 = load i32, i32* %14
ret i32 %32
}

LLVM IR (-O2):
define i32 @get_fat_size_sectors(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = sub nsw i32 %0, %1
%7 = shl nsw i32 %6, 2
%8 = mul nsw i32 %4, %2
%9 = shl nsw i32 %3, 2
%10 = add nsw i32 %8, %9
%11 = sdiv i32 %7, %10
%12 = add nsw i32 %11, 1
ret i32 %12
}
int strtoi(const char *str) {}


x86 assembly (clang, -O0):
<strtoi>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtoi>:
ret

LLVM IR (-O0):
define i32 @strtoi(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @strtoi(i8* nocapture readnone %0) {
ret i32 undef
}
void gtk_tree_model_row_has_child_toggled() {}


x86 assembly (clang, -O0):
<gtk_tree_model_row_has_child_toggled>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_model_row_has_child_toggled>:
ret

LLVM IR (-O0):
define void @gtk_tree_model_row_has_child_toggled() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_model_row_has_child_toggled() {
ret void
}
void a_and(volatile void *p, int v) {
  __asm__("lock ; .byte 0x67\n\tand %1, %0"
          : "=m"(*(int *)p)
          : "r"(v)
          : "memory");
}


x86 assembly (clang, -O0):
<a_and>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
lock and %ecx,(%eax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_and>:
lock and %esi,(%edi)
ret

LLVM IR (-O0):
define void @a_and(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
define void @a_and(i8* %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
tail call void asm "lock ; .byte 0x67\0A\09and $1, $0", "=*m,r,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %3, i32 %1)
ret void
}
int fun950() { return 950; }


x86 assembly (clang, -O0):
<fun950>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3b6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun950>:
mov    $0x3b6,%eax
ret

LLVM IR (-O0):
define i32 @fun950() {
ret i32 950
}

LLVM IR (-O2):
define i32 @fun950() {
ret i32 950
}
/* Variables and functions */
int function(int, int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, int *);
int main() {
  int a, b;
  scanf("%d%d", &a, &b);
  printf("%d\n", function(a, b));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1040 <scanf@plt>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1050 <function@plt>
mov    %eax,%esi
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <scanf@plt>
mov    0x4(%rsp),%edi
mov    (%rsp),%esi
call   1050 <function@plt>
lea    0xead(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%d%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32* %2, i32* %3)
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = call i32 @function(i32 %5, i32 %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"%d%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2)
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = call i32 @function(i32 %6, i32 %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
void check(bool b) { assert(b); }


x86 assembly (clang, -O0):
<check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check>:
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @check(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @assert(i32 %3)
ret void
}

LLVM IR (-O2):
define void @check(i32 %0) {
%2 = tail call i32 @assert(i32 %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ abort();
wchar_t *cmsysEncoding_DupToWide(const char *str) {
  abort();
  return NULL;
}


x86 assembly (clang, -O0):
<cmsysEncoding_DupToWide>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<cmsysEncoding_DupToWide>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32* @cmsysEncoding_DupToWide(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define noalias i32* @cmsysEncoding_DupToWide(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ EX_SOFTWARE;
int /*<<< orphan*/ pfpanic(char *, unsigned short, unsigned short, char const *,
                           char const *, int, int, int /*<<< orphan*/);
void __pfpanic_zmq_ctx_term(unsigned short _syslog, unsigned short _verbose,
                            const char *_function_name, const char *_file_name,
                            int _line_number, int _errno) {
  pfpanic("Unable to destroy ZeroMQ context", _syslog, _verbose, _function_name,
          _file_name, _line_number, _errno, EX_SOFTWARE);
}


x86 assembly (clang, -O0):
<__pfpanic_zmq_ctx_term>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %si,%ax
mov    %di,%si
mov    %si,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9d,-0x20(%rbp)
mov    -0x2(%rbp),%si
mov    -0x4(%rbp),%dx
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
mov    -0x1c(%rbp),%r9d
mov    -0x20(%rbp),%r10d
mov    0x2e8b(%rip),%rax
mov    (%rax),%eax
lea    0xea2(%rip),%rdi
movzwl %si,%esi
movzwl %dx,%edx
mov    %r10d,(%rsp)
mov    %eax,0x8(%rsp)
call   1030 <pfpanic@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__pfpanic_zmq_ctx_term>:
push   %rax
mov    %r9d,%r10d
mov    %r8d,%r9d
mov    %rcx,%r8
mov    %rdx,%rcx
mov    %esi,%edx
mov    %edi,%esi
mov    0x2eb8(%rip),%rdi
mov    (%rdi),%eax
lea    0xecf(%rip),%rdi
push   %rax
push   %r10
call   1030 <pfpanic@plt>
add    $0x10,%rsp
pop    %rax
ret

LLVM IR (-O0):
@.str = [33 x i8] c"Unable to destroy ZeroMQ context\00"
@EX_SOFTWARE = global i32 0
define void @__pfpanic_zmq_ctx_term(i16 zeroext %0, i16 zeroext %1, i8* %2, i8* %3, i32 %4, i32 %5) {
%7 = alloca i16
%8 = alloca i16
%9 = alloca i8*
%10 = alloca i8*
%11 = alloca i32
%12 = alloca i32
store i16 %0, i16* %7
store i16 %1, i16* %8
store i8* %2, i8** %9
store i8* %3, i8** %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = load i16, i16* %7
%14 = load i16, i16* %8
%15 = load i8*, i8** %9
%16 = load i8*, i8** %10
%17 = load i32, i32* %11
%18 = load i32, i32* %12
%19 = load i32, i32* @EX_SOFTWARE
%20 = call i32 @pfpanic(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i16 zeroext %13, i16 zeroext %14, i8* %15, i8* %16, i32 %17, i32 %18, i32 %19)
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"Unable to destroy ZeroMQ context\00"
@EX_SOFTWARE = global i32 0
define void @__pfpanic_zmq_ctx_term(i16 zeroext %0, i16 zeroext %1, i8* %2, i8* %3, i32 %4, i32 %5) {
%7 = load i32, i32* @EX_SOFTWARE
%8 = tail call i32 @pfpanic(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i16 zeroext %0, i16 zeroext %1, i8* %2, i8* %3, i32 %4, i32 %5, i32 %7)
ret void
}
int usb_os_init(void) { return 0; }


x86 assembly (clang, -O0):
<usb_os_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<usb_os_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @usb_os_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @usb_os_init() {
ret i32 0
}
unsigned ChangeEndianness(unsigned value) {
  unsigned result = 0;
  result |= (value & 0x000000FF) << 24;
  result |= (value & 0x0000FF00) << 8;
  result |= (value & 0x00FF0000) >> 8;
  result |= (value & 0xFF000000) >> 24;
  return result;
}


x86 assembly (clang, -O0):
<ChangeEndianness>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
shl    $0x18,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
shl    $0x8,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff0000,%eax
shr    $0x8,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff000000,%eax
shr    $0x18,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ChangeEndianness>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @ChangeEndianness(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = and i32 %4, 255
%6 = shl i32 %5, 24
%7 = load i32, i32* %3
%8 = or i32 %7, %6
store i32 %8, i32* %3
%9 = load i32, i32* %2
%10 = and i32 %9, 65280
%11 = shl i32 %10, 8
%12 = load i32, i32* %3
%13 = or i32 %12, %11
store i32 %13, i32* %3
%14 = load i32, i32* %2
%15 = and i32 %14, 16711680
%16 = lshr i32 %15, 8
%17 = load i32, i32* %3
%18 = or i32 %17, %16
store i32 %18, i32* %3
%19 = load i32, i32* %2
%20 = and i32 %19, -16777216
%21 = lshr i32 %20, 24
%22 = load i32, i32* %3
%23 = or i32 %22, %21
store i32 %23, i32* %3
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @ChangeEndianness(i32 %0) {
%2 = tail call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
unsigned char _rotl(const unsigned char value, int shift) {
  if ((shift &= sizeof(value) * 8 - 1) == 0)
    return value;
  return (value << shift) | (value >> (sizeof(value) * 8 - shift));
}


x86 assembly (clang, -O0):
<_rotl>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
mov    %esi,-0x8(%rbp)
movslq -0x8(%rbp),%rax
and    $0x7,%rax
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
jne    112c <_rotl+0x2c>
mov    -0x2(%rbp),%al
mov    %al,-0x1(%rbp)
jmp    114e <_rotl+0x4e>
movzbl -0x2(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
movzbl -0x2(%rbp),%edx
movslq -0x8(%rbp),%rsi
mov    $0x8,%ecx
sub    %rsi,%rcx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_rotl>:
mov    %esi,%ecx
mov    %edi,%eax
rol    %cl,%al
test   $0x7,%cl
movzbl %al,%eax
cmove  %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @_rotl(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
store i8 %0, i8* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = sext i32 %6 to i64
%8 = and i64 %7, 7
%9 = trunc i64 %8 to i32
store i32 %9, i32* %5
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = load i8, i8* %4
store i8 %12, i8* %3
br label %27
13: ; preds = %2
%14 = load i8, i8* %4
%15 = zext i8 %14 to i32
%16 = load i32, i32* %5
%17 = shl i32 %15, %16
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = load i32, i32* %5
%21 = sext i32 %20 to i64
%22 = sub i64 8, %21
%23 = trunc i64 %22 to i32
%24 = ashr i32 %19, %23
%25 = or i32 %17, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %3
br label %27
27: ; preds = %13, %11
%28 = load i8, i8* %3
ret i8 %28
}

LLVM IR (-O2):
define zeroext i8 @_rotl(i8 zeroext %0, i32 %1) {
%3 = and i32 %1, 7
%4 = icmp eq i32 %3, 0
%5 = trunc i32 %1 to i8
%6 = tail call i8 @llvm.fshl.i8(i8 %0, i8 %0, i8 %5)
%7 = select i1 %4, i8 %0, i8 %6
ret i8 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char *, int);
void xmlDebug(int n, char *dbg) {
  printf("    <dbg%d>%s</dbg%d>\n", n, dbg, n);
}


x86 assembly (clang, -O0):
<xmlDebug>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x4(%rbp),%ecx
lea    0xed0(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmlDebug>:
mov    %rsi,%rdx
mov    %edi,%ecx
lea    0xee4(%rip),%rdi
mov    %ecx,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [23 x i8] c" <dbg%d>%s</dbg%d>\0A\00"
define void @xmlDebug(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = load i32, i32* %3
%8 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %5, i8* %6, i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c" <dbg%d>%s</dbg%d>\0A\00"
define void @xmlDebug(i32 %0, i8* %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %0, i8* %1, i32 %0)
ret void
}
/* Variables and functions */
size_t packet_size_4fsk_tx() { return (0x00 << 8) + 0x7C; }


x86 assembly (clang, -O0):
<packet_size_4fsk_tx>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7c,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<packet_size_4fsk_tx>:
mov    $0x7c,%eax
ret

LLVM IR (-O0):
define i64 @packet_size_4fsk_tx() {
ret i64 124
}

LLVM IR (-O2):
define i64 @packet_size_4fsk_tx() {
ret i64 124
}
/* Variables and functions */
int EXIT_FAILURE;
int /*<<< orphan*/ atoi(char *);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ start_integ(int /*<<< orphan*/);
int main(int argc, char *argv[]) {
  if (argc != 2) {
    printf("%s\n", "Bad option");
    return (EXIT_FAILURE);
  }
  start_integ(atoi(argv[1]));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
je     1174 <main+0x44>
lea    0xea9(%rip),%rdi
lea    0xea6(%rip),%rsi
call   1030 <printf@plt>
mov    0x2e76(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    118f <main+0x5f>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1050 <atoi@plt>
mov    %eax,%edi
call   1040 <start_integ@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x2,%edi
jne    114a <main+0x1a>
mov    0x8(%rsi),%rdi
call   1050 <atoi@plt>
mov    %eax,%edi
call   1040 <start_integ@plt>
xor    %eax,%eax
pop    %rcx
ret
lea    0xeaf(%rip),%rdi
lea    0xeac(%rip),%rsi
call   1030 <printf@plt>
mov    0x2e7c(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [11 x i8] c"Bad option\00"
@EXIT_FAILURE = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 2
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%10 = load i32, i32* @EXIT_FAILURE
store i32 %10, i32* %3
br label %17
11: ; preds = %2
%12 = load i8**, i8*** %5
%13 = getelementptr inbounds i8*, i8** %12, i64 1
%14 = load i8*, i8** %13
%15 = call i32 @atoi(i8* %14)
%16 = call i32 @start_integ(i32 %15)
store i32 0, i32* %3
br label %17
17: ; preds = %11, %8
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [11 x i8] c"Bad option\00"
@EXIT_FAILURE = global i32 0
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 2
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%6 = load i32, i32* @EXIT_FAILURE
br label %12
7: ; preds = %2
%8 = getelementptr inbounds i8*, i8** %1, i64 1
%9 = load i8*, i8** %8
%10 = tail call i32 @atoi(i8* %9)
%11 = tail call i32 @start_integ(i32 %10)
br label %12
12: ; preds = %7, %4
%13 = phi i32 [ %6, %4 ], [ 0, %7 ]
ret i32 %13
}
/* Variables and functions */
int isnan(double);
int module_libc_isnan(double value) { return isnan(value); }


x86 assembly (clang, -O0):
<module_libc_isnan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <isnan@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<module_libc_isnan>:
jmp    1030 <isnan@plt>

LLVM IR (-O0):
define i32 @module_libc_isnan(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @isnan(double %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @module_libc_isnan(double %0) {
%2 = tail call i32 @isnan(double %0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void EndFunction(FILE *fh) {
  fprintf(fh, "return Cycles;\r\n");
  fprintf(fh, "}\r\n");
}


x86 assembly (clang, -O0):
<EndFunction>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x8(%rbp),%rdi
lea    0xeda(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EndFunction>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
mov    $0x10,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1030 <fwrite@plt>
lea    0xedd(%rip),%rdi
mov    $0x3,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
pop    %rbx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"return Cycles;\0D\0A\00"
@.str.1 = [4 x i8] c"}\0D\0A\00"
define void @EndFunction(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%5 = load i32*, i32** %2
%6 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"return Cycles;\0D\0A\00"
@.str.1 = [4 x i8] c"}\0D\0A\00"
define void @EndFunction(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i64 16, i64 1, i32* %0)
%3 = tail call i64 @fwrite(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i64 3, i64 1, i32* %0)
ret void
}
void DestroyEDistList2(Schema, A) struct univStruct *Schema;
struct Student **A;
{
}


x86 assembly (clang, -O0):
<DestroyEDistList2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<DestroyEDistList2>:
ret

LLVM IR (-O0):
%struct.univStruct = type opaque
%struct.Student = type opaque
define void @DestroyEDistList2(%struct.univStruct* %0, %struct.Student** %1) {
%3 = alloca %struct.univStruct*
%4 = alloca %struct.Student**
store %struct.univStruct* %0, %struct.univStruct** %3
store %struct.Student** %1, %struct.Student*** %4
ret void
}

LLVM IR (-O2):
%struct.univStruct = type opaque
%struct.Student = type opaque
define void @DestroyEDistList2(%struct.univStruct* nocapture %0, %struct.Student** nocapture %1) {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t esp_bt_gap_get_cod_major_dev(uint32_t cod) {
  return (cod & (0x1f00)) >> (8);
}


x86 assembly (clang, -O0):
<esp_bt_gap_get_cod_major_dev>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1f00,%eax
sar    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<esp_bt_gap_get_cod_major_dev>:
mov    %edi,%eax
shr    $0x8,%eax
and    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @esp_bt_gap_get_cod_major_dev(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 7936
%5 = ashr i32 %4, 8
ret i32 %5
}

LLVM IR (-O2):
define i32 @esp_bt_gap_get_cod_major_dev(i32 %0) {
%2 = lshr i32 %0, 8
%3 = and i32 %2, 31
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0x91() {
  Assert_real((isalpha(145) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              730, ("isalpha should be 0 for 0x91"));
}


x86 assembly (clang, -O0):
<t_isalpha_0x91>:
push   %rbp
mov    %rsp,%rbp
mov    $0x91,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2da,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0x91>:
push   %rax
mov    $0x91,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2da,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0x91\00"
define void @t_isalpha_0x91() {
%1 = call i64 @isalpha(i32 145)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 730, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0x91\00"
define void @t_isalpha_0x91() {
%1 = tail call i64 @isalpha(i32 145)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 730, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int iemgui_clip_size(int size) {
  if (size < 8)
    size = 8;
  return (size);
}


x86 assembly (clang, -O0):
<iemgui_clip_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x8,-0x4(%rbp)
jge    1118 <iemgui_clip_size+0x18>
movl   $0x8,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iemgui_clip_size>:
cmp    $0x9,%edi
mov    $0x8,%eax
cmovge %edi,%eax
ret

LLVM IR (-O0):
define i32 @iemgui_clip_size(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 8
br i1 %4, label %5, label %6
5: ; preds = %1
store i32 8, i32* %2
br label %6
6: ; preds = %5, %1
%7 = load i32, i32* %2
ret i32 %7
}

LLVM IR (-O2):
define i32 @iemgui_clip_size(i32 %0) {
%2 = icmp sgt i32 %0, 8
%3 = select i1 %2, i32 %0, i32 8
ret i32 %3
}
int strcmp(const char *str1, const char *str2) {
  while (*str1 && (*str1 == *str2)) {
    str1++;
    str2++;
  }
  return *(const unsigned char *)str1 - *(const unsigned char *)str2;
}


x86 assembly (clang, -O0):
<strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x11(%rbp)
je     1137 <strcmp+0x37>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    1147 <strcmp+0x47>
jmp    1164 <strcmp+0x64>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110c <strcmp+0xc>
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movzbl (%rcx),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp>:
mov    (%rdi),%al
test   %al,%al
je     1123 <strcmp+0x23>
add    $0x1,%rdi
nopw   0x0(%rax,%rax,1)
cmp    (%rsi),%al
jne    1125 <strcmp+0x25>
add    $0x1,%rsi
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
jne    1110 <strcmp+0x10>
xor    %eax,%eax
movzbl %al,%eax
movzbl (%rsi),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %20, %2
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = load i8*, i8** %4
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %13, %16
br label %18
18: ; preds = %10, %5
%19 = phi i1 [ false, %5 ], [ %17, %10 ]
br i1 %19, label %20, label %25
20: ; preds = %18
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %3
%23 = load i8*, i8** %4
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %4
br label %5
25: ; preds = %18
%26 = load i8*, i8** %3
%27 = load i8, i8* %26
%28 = zext i8 %27 to i32
%29 = load i8*, i8** %4
%30 = load i8, i8* %29
%31 = zext i8 %30 to i32
%32 = sub nsw i32 %28, %31
ret i32 %32
}

LLVM IR (-O2):
define i32 @strcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %16, label %5
5: ; preds = %2, %11
%6 = phi i8 [ %14, %11 ], [ %3, %2 ]
%7 = phi i8* [ %13, %11 ], [ %1, %2 ]
%8 = phi i8* [ %12, %11 ], [ %0, %2 ]
%9 = load i8, i8* %7
%10 = icmp eq i8 %6, %9
br i1 %10, label %11, label %16
11: ; preds = %5
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = getelementptr inbounds i8, i8* %7, i64 1
%14 = load i8, i8* %12
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %5
16: ; preds = %5, %11, %2
%17 = phi i8* [ %1, %2 ], [ %13, %11 ], [ %7, %5 ]
%18 = phi i8 [ 0, %2 ], [ 0, %11 ], [ %6, %5 ]
%19 = zext i8 %18 to i32
%20 = load i8, i8* %17
%21 = zext i8 %20 to i32
%22 = sub nsw i32 %19, %21
ret i32 %22
}
/* Variables and functions */
int /*<<< orphan*/ VIM_SIF_I2cReadWord(unsigned char, unsigned short *);
void SensorGetReg_MT9V112(unsigned char uAddr, unsigned short *uVal) {
  VIM_SIF_I2cReadWord((unsigned char)uAddr, (unsigned short *)uVal);
}


x86 assembly (clang, -O0):
<SensorGetReg_MT9V112>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x1(%rbp),%al
mov    -0x10(%rbp),%rsi
movzbl %al,%edi
call   1030 <VIM_SIF_I2cReadWord@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SensorGetReg_MT9V112>:
jmp    1030 <VIM_SIF_I2cReadWord@plt>

LLVM IR (-O0):
define void @SensorGetReg_MT9V112(i8 zeroext %0, i16* %1) {
%3 = alloca i8
%4 = alloca i16*
store i8 %0, i8* %3
store i16* %1, i16** %4
%5 = load i8, i8* %3
%6 = load i16*, i16** %4
%7 = call i32 @VIM_SIF_I2cReadWord(i8 zeroext %5, i16* %6)
ret void
}

LLVM IR (-O2):
define void @SensorGetReg_MT9V112(i8 zeroext %0, i16* %1) {
%3 = tail call i32 @VIM_SIF_I2cReadWord(i8 zeroext %0, i16* %1)
ret void
}
void f34(void) {
  ({
    ({
      goto a;
      0;
    });
    ({ 0; });
    0;
  });
a:
  ({
    ({ 0; });
    ({ 0; });
    0;
  });
  0;
}


x86 assembly (clang, -O0):
<f34>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f34>:
ret

LLVM IR (-O0):
define void @f34() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
br label %6
6: ; preds = %0
store i32 0, i32* %3
%7 = load i32, i32* %3
store i32 0, i32* %4
%8 = load i32, i32* %4
store i32 0, i32* %5
%9 = load i32, i32* %5
ret void
}

LLVM IR (-O2):
define void @f34() {
ret void
}
/* Type definitions */
typedef scalar_t__ int64_t;

/* Variables and functions */
double sqrt(double);
double stdlib_strided_dvariancepn(scalar_t__ const, double const,
                                  double const *, scalar_t__ const);
double stdlib_strided_dsempn(const int64_t N, const double correction,
                             const double *X, const int64_t stride) {
  return sqrt(stdlib_strided_dvariancepn(N, correction, X, stride) / (double)N);
}


x86 assembly (clang, -O0):
<stdlib_strided_dsempn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
movsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <stdlib_strided_dvariancepn@plt>
cvtsi2sdq -0x8(%rbp),%xmm1
divsd  %xmm1,%xmm0
call   1040 <sqrt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stdlib_strided_dsempn>:
push   %rbx
mov    %rdi,%rbx
call   1030 <stdlib_strided_dvariancepn@plt>
cvtsi2sd %rbx,%xmm1
divsd  %xmm1,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1142 <stdlib_strided_dsempn+0x22>
sqrtsd %xmm0,%xmm0
pop    %rbx
ret
pop    %rbx
jmp    1040 <sqrt@plt>

LLVM IR (-O0):
define double @stdlib_strided_dsempn(i64 %0, double %1, double* %2, i64 %3) {
%5 = alloca i64
%6 = alloca double
%7 = alloca double*
%8 = alloca i64
store i64 %0, i64* %5
store double %1, double* %6
store double* %2, double** %7
store i64 %3, i64* %8
%9 = load i64, i64* %5
%10 = load double, double* %6
%11 = load double*, double** %7
%12 = load i64, i64* %8
%13 = call double @stdlib_strided_dvariancepn(i64 %9, double %10, double* %11, i64 %12)
%14 = load i64, i64* %5
%15 = sitofp i64 %14 to double
%16 = fdiv double %13, %15
%17 = call double @sqrt(double %16)
ret double %17
}

LLVM IR (-O2):
define double @stdlib_strided_dsempn(i64 %0, double %1, double* %2, i64 %3) {
%5 = tail call double @stdlib_strided_dvariancepn(i64 %0, double %1, double* %2, i64 %3)
%6 = sitofp i64 %0 to double
%7 = fdiv double %5, %6
%8 = tail call double @sqrt(double %7)
ret double %8
}
/* Variables and functions */
int main();
int /*<<< orphan*/ sys_exit(int);
void user_entry(void) {
  int ret = main();
  sys_exit(ret);
}


x86 assembly (clang, -O0):
<user_entry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <main@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sys_exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<user_entry>:
push   %rax
xor    %eax,%eax
call   1040 <main@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <sys_exit@plt>

LLVM IR (-O0):
define void @user_entry() {
%1 = alloca i32
%2 = call i32 (...) @main()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @sys_exit(i32 %3)
ret void
}

LLVM IR (-O2):
define void @user_entry() {
%1 = tail call i32 (...) @main()
%2 = tail call i32 @sys_exit(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void separator_print_exit(char *var) {
  fprintf(stderr, "%s\n", var);
  exit(0);
}


x86 assembly (clang, -O0):
<separator_print_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<separator_print_exit>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @separator_print_exit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @separator_print_exit(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int strcint(int /*<<< orphan*/);
int /*<<< orphan*/ strpar(char const *, int const);
int stripar(const char *str, const int nth) {
  return strcint(strpar(str, nth));
}


x86 assembly (clang, -O0):
<stripar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <strpar@plt>
mov    %eax,%edi
call   1030 <strcint@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stripar>:
push   %rax
call   1040 <strpar@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <strcint@plt>

LLVM IR (-O0):
define i32 @stripar(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @strpar(i8* %5, i32 %6)
%8 = call i32 @strcint(i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @stripar(i8* %0, i32 %1) {
%3 = tail call i32 @strpar(i8* %0, i32 %1)
%4 = tail call i32 @strcint(i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ fgets(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ sscanf(char *, char *, int *);
int /*<<< orphan*/ stdin;
int __MINIK_read() {
  char line[32];
  int val = 0;
  fgets(line, 19, stdin);
  line[31] = 0;
  sscanf(line, "%i", &val);
  return val;
}


x86 assembly (clang, -O0):
<__MINIK_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x24(%rbp)
lea    -0x20(%rbp),%rdi
mov    0x2eae(%rip),%rax
mov    (%rax),%edx
mov    $0x13,%esi
call   1030 <fgets@plt>
movb   $0x0,-0x1(%rbp)
lea    -0x20(%rbp),%rdi
lea    0xeab(%rip),%rsi
lea    -0x24(%rbp),%rdx
call   1040 <sscanf@plt>
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__MINIK_read>:
push   %rbx
sub    $0x30,%rsp
movl   $0x0,0xc(%rsp)
mov    0x2eb4(%rip),%rax
mov    (%rax),%edx
lea    0x10(%rsp),%rbx
mov    %rbx,%rdi
mov    $0x13,%esi
call   1030 <fgets@plt>
movb   $0x0,0x2f(%rsp)
lea    0xeac(%rip),%rsi
lea    0xc(%rsp),%rdx
mov    %rbx,%rdi
call   1040 <sscanf@plt>
mov    0xc(%rsp),%eax
add    $0x30,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@stdin = global i32 0
@.str = [3 x i8] c"%i\00"
define i32 @__MINIK_read() {
%1 = alloca [32 x i8]
%2 = alloca i32
store i32 0, i32* %2
%3 = getelementptr inbounds [32 x i8], [32 x i8]* %1, i64 0, i64 0
%4 = load i32, i32* @stdin
%5 = call i32 @fgets(i8* %3, i32 19, i32 %4)
%6 = getelementptr inbounds [32 x i8], [32 x i8]* %1, i64 0, i64 31
store i8 0, i8* %6
%7 = getelementptr inbounds [32 x i8], [32 x i8]* %1, i64 0, i64 0
%8 = call i32 @sscanf(i8* %7, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
@stdin = global i32 0
@.str = [3 x i8] c"%i\00"
define i32 @__MINIK_read() {
%1 = alloca [32 x i8]
%2 = alloca i32
%3 = getelementptr inbounds [32 x i8], [32 x i8]* %1, i64 0, i64 0
%4 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%5 = load i32, i32* @stdin
%6 = call i32 @fgets(i8* %3, i32 19, i32 %5)
%7 = getelementptr inbounds [32 x i8], [32 x i8]* %1, i64 0, i64 31
store i8 0, i8* %7
%8 = call i32 @sscanf(i8* %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%9 = load i32, i32* %2
ret i32 %9
}
void RTBldCfgType(void) {}


x86 assembly (clang, -O0):
<RTBldCfgType>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTBldCfgType>:
ret

LLVM IR (-O0):
define void @RTBldCfgType() {
ret void
}

LLVM IR (-O2):
define void @RTBldCfgType() {
ret void
}
/* Type definitions */
struct mq_attr {
  int dummy;
};
typedef scalar_t__ mqd_t;

/* Variables and functions */
int mq_setattr(scalar_t__, struct mq_attr *, struct mq_attr *);
void test_mq_setattr_prototype(void) {
  mqd_t mqdes;
  struct mq_attr mqs, omqs;
  int err;
  mqdes = 0;
  err = mq_setattr(mqdes, &mqs, &omqs);
  (void)err;
}


x86 assembly (clang, -O0):
<test_mq_setattr_prototype>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1030 <mq_setattr@plt>
mov    %eax,-0x1c(%rbp)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mq_setattr_prototype>:
sub    $0x18,%rsp
lea    0x10(%rsp),%rsi
lea    0x8(%rsp),%rdx
xor    %edi,%edi
call   1030 <mq_setattr@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.mq_attr = type { i32 }
define void @test_mq_setattr_prototype() {
%1 = alloca i64
%2 = alloca %struct.mq_attr
%3 = alloca %struct.mq_attr
%4 = alloca i32
store i64 0, i64* %1
%5 = load i64, i64* %1
%6 = call i32 @mq_setattr(i64 %5, %struct.mq_attr* %2, %struct.mq_attr* %3)
store i32 %6, i32* %4
%7 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
%struct.mq_attr = type { i32 }
define void @test_mq_setattr_prototype() {
%1 = alloca %struct.mq_attr
%2 = alloca %struct.mq_attr
%3 = bitcast %struct.mq_attr* %1 to i8*
%4 = bitcast %struct.mq_attr* %2 to i8*
%5 = call i32 @mq_setattr(i64 0, %struct.mq_attr* %1, %struct.mq_attr* %2)
ret void
}
/* Variables and functions */
int adc_read();
int /*<<< orphan*/ delay_ms(int);
int /*<<< orphan*/ printf(char *, int);
void show_readings(int count, int delay) {
  int i;
  int val;
  for (i = 0; i < count; i++) {
    val = adc_read();
    printf("Read: %d\n", val);
    delay_ms(delay);
  }
}


x86 assembly (clang, -O0):
<show_readings>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1180 <show_readings+0x50>
mov    $0x0,%al
call   1040 <adc_read@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%esi
lea    0xe9b(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%edi
call   1050 <delay_ms@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1145 <show_readings+0x15>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_readings>:
push   %rbp
push   %r14
push   %rbx
test   %edi,%edi
jle    116d <show_readings+0x3d>
mov    %esi,%ebx
mov    %edi,%ebp
lea    0xebd(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
xor    %eax,%eax
call   1040 <adc_read@plt>
mov    %r14,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
mov    %ebx,%edi
call   1050 <delay_ms@plt>
add    $0xffffffff,%ebp
jne    1150 <show_readings+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [10 x i8] c"Read: %d\0A\00"
define void @show_readings(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %7
7: ; preds = %17, %2
%8 = load i32, i32* %5
%9 = load i32, i32* %3
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %20
11: ; preds = %7
%12 = call i32 (...) @adc_read()
store i32 %12, i32* %6
%13 = load i32, i32* %6
%14 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %13)
%15 = load i32, i32* %4
%16 = call i32 @delay_ms(i32 %15)
br label %17
17: ; preds = %11
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %7
20: ; preds = %7
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"Read: %d\0A\00"
define void @show_readings(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %11
4: ; preds = %2, %4
%5 = phi i32 [ %9, %4 ], [ 0, %2 ]
%6 = tail call i32 (...) @adc_read()
%7 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = tail call i32 @delay_ms(i32 %1)
%9 = add nuw nsw i32 %5, 1
%10 = icmp eq i32 %9, %0
br i1 %10, label %11, label %4
11: ; preds = %4, %2
ret void
}
/* Type definitions */
struct geometry_struct {
  int dummy;
};

/* Variables and functions */
int A_within_B(struct geometry_struct *, struct geometry_struct *, int);
int cylinder_within_cone(struct geometry_struct *geometry_child,
                         struct geometry_struct *geometry_parent) {
  return A_within_B(geometry_child, geometry_parent, (int)300);
}


x86 assembly (clang, -O0):
<cylinder_within_cone>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x12c,%edx
call   1030 <A_within_B@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cylinder_within_cone>:
mov    $0x12c,%edx
jmp    1030 <A_within_B@plt>

LLVM IR (-O0):
%struct.geometry_struct = type { i32 }
define i32 @cylinder_within_cone(%struct.geometry_struct* %0, %struct.geometry_struct* %1) {
%3 = alloca %struct.geometry_struct*
%4 = alloca %struct.geometry_struct*
store %struct.geometry_struct* %0, %struct.geometry_struct** %3
store %struct.geometry_struct* %1, %struct.geometry_struct** %4
%5 = load %struct.geometry_struct*, %struct.geometry_struct** %3
%6 = load %struct.geometry_struct*, %struct.geometry_struct** %4
%7 = call i32 @A_within_B(%struct.geometry_struct* %5, %struct.geometry_struct* %6, i32 300)
ret i32 %7
}

LLVM IR (-O2):
%struct.geometry_struct = type { i32 }
define i32 @cylinder_within_cone(%struct.geometry_struct* %0, %struct.geometry_struct* %1) {
%3 = tail call i32 @A_within_B(%struct.geometry_struct* %0, %struct.geometry_struct* %1, i32 300)
ret i32 %3
}
/* Type definitions */
struct cnodefuncs {
  int dummy;
};
struct cnode {
  int dummy;
};

/* Variables and functions */
struct cnode *startpara(struct cnode *, struct cnodefuncs const *);
const char *dox_para(const char *p, struct cnode **pcnode,
                     const struct cnodefuncs *type, const char *filename,
                     unsigned int linenum, const char *cmdname) {
  *pcnode = startpara(*pcnode, type);
  return p;
}


x86 assembly (clang, -O0):
<dox_para>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <startpara@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dox_para>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    (%rsi),%rdi
mov    %rdx,%rsi
call   1030 <startpara@plt>
mov    %rax,(%rbx)
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.cnode = type { i32 }
%struct.cnodefuncs = type { i32 }
define i8* @dox_para(i8* %0, %struct.cnode** %1, %struct.cnodefuncs* %2, i8* %3, i32 %4, i8* %5) {
%7 = alloca i8*
%8 = alloca %struct.cnode**
%9 = alloca %struct.cnodefuncs*
%10 = alloca i8*
%11 = alloca i32
%12 = alloca i8*
store i8* %0, i8** %7
store %struct.cnode** %1, %struct.cnode*** %8
store %struct.cnodefuncs* %2, %struct.cnodefuncs** %9
store i8* %3, i8** %10
store i32 %4, i32* %11
store i8* %5, i8** %12
%13 = load %struct.cnode**, %struct.cnode*** %8
%14 = load %struct.cnode*, %struct.cnode** %13
%15 = load %struct.cnodefuncs*, %struct.cnodefuncs** %9
%16 = call %struct.cnode* @startpara(%struct.cnode* %14, %struct.cnodefuncs* %15)
%17 = load %struct.cnode**, %struct.cnode*** %8
store %struct.cnode* %16, %struct.cnode** %17
%18 = load i8*, i8** %7
ret i8* %18
}

LLVM IR (-O2):
%struct.cnode = type { i32 }
%struct.cnodefuncs = type { i32 }
define i8* @dox_para(i8* readnone returned %0, %struct.cnode** nocapture %1, %struct.cnodefuncs* %2, i8* nocapture readnone %3, i32 %4, i8* nocapture readnone %5) {
%7 = load %struct.cnode*, %struct.cnode** %1
%8 = tail call %struct.cnode* @startpara(%struct.cnode* %7, %struct.cnodefuncs* %2)
store %struct.cnode* %8, %struct.cnode** %1
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int drv_PHAnderson_list(void) {
  printf("PHAnderson serial-to-HD44780 adapter");
  return 0;
}


x86 assembly (clang, -O0):
<drv_PHAnderson_list>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<drv_PHAnderson_list>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [37 x i8] c"PHAnderson serial-to-HD44780 adapter\00"
define i32 @drv_PHAnderson_list() {
%1 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [37 x i8] c"PHAnderson serial-to-HD44780 adapter\00"
define i32 @drv_PHAnderson_list() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  printf("15与37的和是%d\n", 15 + 37);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x34,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x34,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"15\E4\B8\8E37\E7\9A\84\E5\92\8C\E6\98\AF%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 52)
ret i32 0
}

LLVM IR (-O2):
@.str = [20 x i8] c"15\E4\B8\8E37\E7\9A\84\E5\92\8C\E6\98\AF%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 52)
ret i32 0
}