#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void EPIPSRAMConfigRegSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32CR) {
  uint32_t ui32Offset;
  ;
  ;
  if (ui32CS < 2) {
    ui32Offset = 0x00000010 + (ui32CS << 2);
  } else {
    ui32Offset = 0x00000308 + ((ui32CS - 2) << 2);
  }
  (*((volatile uint32_t *)(ui32Base + 0x00000360))) = (ui32CR & 0x1fffff);
  (*((volatile uint32_t *)(ui32Base + ui32Offset))) |= 0x00040000;
}


x86 assembly (clang, -O0):
<EPIPSRAMConfigRegSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    1128 <EPIPSRAMConfigRegSet+0x28>
mov    -0x8(%rbp),%eax
shl    $0x2,%eax
add    $0x10,%eax
mov    %eax,-0x10(%rbp)
jmp    1139 <EPIPSRAMConfigRegSet+0x39>
mov    -0x8(%rbp),%eax
sub    $0x2,%eax
shl    $0x2,%eax
add    $0x308,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
and    $0x1fffff,%ecx
mov    -0x4(%rbp),%eax
add    $0x360,%eax
cltq
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
add    -0x10(%rbp),%eax
cltq
mov    (%rax),%ecx
or     $0x40000,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<EPIPSRAMConfigRegSet>:
and    $0x1fffff,%edx
cmp    $0x2,%esi
movslq %edi,%rax
mov    %edx,0x360(%rax)
lea    0x10(%rax,%rsi,4),%ecx
lea    0x300(%rax,%rsi,4),%eax
cmovl  %ecx,%eax
cltq
orl    $0x40000,(%rax)
ret

LLVM IR (-O0):
define void @EPIPSRAMConfigRegSet(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = icmp slt i32 %8, 2
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i32, i32* %5
%12 = shl i32 %11, 2
%13 = add nsw i32 16, %12
store i32 %13, i32* %7
br label %19
14: ; preds = %3
%15 = load i32, i32* %5
%16 = sub nsw i32 %15, 2
%17 = shl i32 %16, 2
%18 = add nsw i32 776, %17
store i32 %18, i32* %7
br label %19
19: ; preds = %14, %10
%20 = load i32, i32* %6
%21 = and i32 %20, 2097151
%22 = load i32, i32* %4
%23 = add nsw i32 %22, 864
%24 = sext i32 %23 to i64
%25 = inttoptr i64 %24 to i32*
store volatile i32 %21, i32* %25
%26 = load i32, i32* %4
%27 = load i32, i32* %7
%28 = add nsw i32 %26, %27
%29 = sext i32 %28 to i64
%30 = inttoptr i64 %29 to i32*
%31 = load volatile i32, i32* %30
%32 = or i32 %31, 262144
store volatile i32 %32, i32* %30
ret void
}

LLVM IR (-O2):
define void @EPIPSRAMConfigRegSet(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, 2
%5 = shl i32 %1, 2
%6 = select i1 %4, i32 16, i32 768
%7 = and i32 %2, 2097151
%8 = add nsw i32 %0, 864
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
store volatile i32 %7, i32* %10
%11 = add i32 %5, %0
%12 = add i32 %11, %6
%13 = sext i32 %12 to i64
%14 = inttoptr i64 %13 to i32*
%15 = load volatile i32, i32* %14
%16 = or i32 %15, 262144
store volatile i32 %16, i32* %14
ret void
}