xunge/DecIR huggingface dataset:
int sys$canwak(unsigned int *pidadr, void *prcnam) {
  return ({
    unsigned long resultvar;
    register long int _a2 asm("rsi") = (long)(prcnam);
    register long int _a1 asm("rdi") = (long)(pidadr);
    asm volatile("movq %1, %%rax\n\t"
                 "int $0x81\n\t"
                 : "=a"(resultvar)
                 : "i"(18), "r"(_a1), "r"(_a2)
                 : "memory", "cc", "r11", "cx");
    (long)resultvar;
  });
}


x86 assembly (clang, -O0):
<sys$canwak>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    $0x12,%rax
int    $0x81
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys$canwak>:
mov    $0x12,%rax
int    $0x81
ret

LLVM IR (-O0):
define i32 @"sys$canwak"(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i32* %0, i32** %3
store i8* %1, i8** %4
%9 = load i8*, i8** %4
%10 = ptrtoint i8* %9 to i64
store i64 %10, i64* %6
%11 = load i32*, i32** %3
%12 = ptrtoint i32* %11 to i64
store i64 %12, i64* %7
%13 = load i64, i64* %7
%14 = load i64, i64* %6
%15 = call i64 asm sideeffect "movq $1, %rax\0A\09int $$0x81\0A\09", "={ax},i,{rdi},{rsi},~{memory},~{cc},~{r11},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 18, i64 %13, i64 %14)
store i64 %15, i64* %5
%16 = load i64, i64* %5
store i64 %16, i64* %8
%17 = load i64, i64* %8
%18 = trunc i64 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @"sys$canwak"(i32* %0, i8* %1) {
%3 = ptrtoint i8* %1 to i64
%4 = ptrtoint i32* %0 to i64
%5 = tail call i64 asm sideeffect "movq $1, %rax\0A\09int $$0x81\0A\09", "={ax},i,{rdi},{rsi},~{memory},~{cc},~{r11},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 18, i64 %4, i64 %3)
%6 = trunc i64 %5 to i32
ret i32 %6
}
void _pll_feed(void) {
  (*(volatile unsigned long *)(0xE01FC000 + 0x08C)) = 0xAA;
  (*(volatile unsigned long *)(0xE01FC000 + 0x08C)) = 0x55;
}


x86 assembly (clang, -O0):
<_pll_feed>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe01fc08c,%eax
movq   $0xaa,(%rax)
mov    $0xe01fc08c,%eax
movq   $0x55,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_pll_feed>:
mov    $0xe01fc08c,%eax
movq   $0xaa,(%rax)
movq   $0x55,(%rax)
ret

LLVM IR (-O0):
define void @_pll_feed() {
store volatile i64 170, i64* inttoptr (i64 3760177292 to i64*)
store volatile i64 85, i64* inttoptr (i64 3760177292 to i64*)
ret void
}

LLVM IR (-O2):
define void @_pll_feed() {
store volatile i64 170, i64* inttoptr (i64 3760177292 to i64*)
store volatile i64 85, i64* inttoptr (i64 3760177292 to i64*)
ret void
}
/* Type definitions */
struct arraylist {
  int dummy;
};

/* Variables and functions */
long arraylist_head(struct arraylist *);
struct arraylist *arraylist_tail(struct arraylist *);
long arraylist_get(unsigned i, struct arraylist *l) {
  if (i == 0)
    return arraylist_head(l);
  return arraylist_get(i - 1, arraylist_tail(l));
}


x86 assembly (clang, -O0):
<arraylist_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    115b <arraylist_get+0x2b>
mov    -0x18(%rbp),%rdi
call   1030 <arraylist_head@plt>
mov    %rax,-0x8(%rbp)
jmp    117c <arraylist_get+0x4c>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <arraylist_tail@plt>
mov    -0x1c(%rbp),%edi
mov    %rax,%rsi
call   1050 <arraylist_get@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arraylist_get>:
push   %rbx
mov    %rsi,%rax
test   %edi,%edi
je     113d <arraylist_get+0x1d>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
mov    %rax,%rdi
call   1040 <arraylist_tail@plt>
add    $0xffffffff,%ebx
jne    1130 <arraylist_get+0x10>
mov    %rax,%rdi
pop    %rbx
jmp    1030 <arraylist_head@plt>

LLVM IR (-O0):
%struct.arraylist = type { i32 }
define i64 @arraylist_get(i32 %0, %struct.arraylist* %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca %struct.arraylist*
store i32 %0, i32* %4
store %struct.arraylist* %1, %struct.arraylist** %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load %struct.arraylist*, %struct.arraylist** %5
%10 = call i64 @arraylist_head(%struct.arraylist* %9)
store i64 %10, i64* %3
br label %17
11: ; preds = %2
%12 = load i32, i32* %4
%13 = sub i32 %12, 1
%14 = load %struct.arraylist*, %struct.arraylist** %5
%15 = call %struct.arraylist* @arraylist_tail(%struct.arraylist* %14)
%16 = call i64 @arraylist_get(i32 %13, %struct.arraylist* %15)
store i64 %16, i64* %3
br label %17
17: ; preds = %11, %8
%18 = load i64, i64* %3
ret i64 %18
}

LLVM IR (-O2):
%struct.arraylist = type { i32 }
define i64 @arraylist_get(i32 %0, %struct.arraylist* %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %4, label %7
4: ; preds = %7, %2
%5 = phi %struct.arraylist* [ %1, %2 ], [ %11, %7 ]
%6 = tail call i64 @arraylist_head(%struct.arraylist* %5)
ret i64 %6
7: ; preds = %2, %7
%8 = phi %struct.arraylist* [ %11, %7 ], [ %1, %2 ]
%9 = phi i32 [ %10, %7 ], [ %0, %2 ]
%10 = add i32 %9, -1
%11 = tail call %struct.arraylist* @arraylist_tail(%struct.arraylist* %8)
%12 = icmp eq i32 %10, 0
br i1 %12, label %4, label %7
}
void gtk_combo_box_remove_text() {}


x86 assembly (clang, -O0):
<gtk_combo_box_remove_text>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_combo_box_remove_text>:
ret

LLVM IR (-O0):
define void @gtk_combo_box_remove_text() {
ret void
}

LLVM IR (-O2):
define void @gtk_combo_box_remove_text() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ is_prime(int);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int i;
  for (i = 1; i <= 100; i++) {
    if (!is_prime(i))
      continue;
    printf("%d\n", i);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x64,-0x8(%rbp)
jg     1173 <main+0x53>
mov    -0x8(%rbp),%edi
call   1040 <is_prime@plt>
cmp    $0x0,%eax
jne    1156 <main+0x36>
jmp    1165 <main+0x45>
mov    -0x8(%rbp),%esi
lea    0xea0(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1136 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    $0x1,%ebx
lea    0xed0(%rip),%r14
jmp    1148 <main+0x28>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
add    $0x1,%ebx
cmp    $0x65,%ebx
je     115f <main+0x3f>
mov    %ebx,%edi
call   1040 <is_prime@plt>
test   %eax,%eax
je     1140 <main+0x20>
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
jmp    1140 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
br label %3
3: ; preds = %14, %0
%4 = load i32, i32* %2
%5 = icmp sle i32 %4, 100
br i1 %5, label %6, label %17
6: ; preds = %3
%7 = load i32, i32* %2
%8 = call i32 @is_prime(i32 %7)
%9 = icmp ne i32 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %6
br label %14
11: ; preds = %6
%12 = load i32, i32* %2
%13 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %12)
br label %14
14: ; preds = %11, %10
%15 = load i32, i32* %2
%16 = add nsw i32 %15, 1
store i32 %16, i32* %2
br label %3
17: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %7
%2 = phi i32 [ 1, %0 ], [ %8, %7 ]
%3 = tail call i32 @is_prime(i32 %2)
%4 = icmp eq i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
br label %7
7: ; preds = %1, %5
%8 = add nuw nsw i32 %2, 1
%9 = icmp eq i32 %8, 101
br i1 %9, label %10, label %1
10: ; preds = %7
ret i32 0
}
unsigned int bit_set(const unsigned int i, const unsigned int n) {
  return i | (1 << 31 - n);
}


x86 assembly (clang, -O0):
<bit_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x1f,%ecx
sub    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit_set>:
mov    %esi,%ecx
mov    $0x80000000,%eax
shr    %cl,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @bit_set(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub i32 31, %6
%8 = shl i32 1, %7
%9 = or i32 %5, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @bit_set(i32 %0, i32 %1) {
%3 = lshr i32 -2147483648, %1
%4 = or i32 %3, %0
ret i32 %4
}
int bmk_cpu_intr_init(void) {
  for (;;)
    ;
}


x86 assembly (clang, -O0):
<bmk_cpu_intr_init>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <bmk_cpu_intr_init+0x9>
jmp    1109 <bmk_cpu_intr_init+0x9>

x86 assembly (clang, -O2):
<bmk_cpu_intr_init>:
jmp    1100 <bmk_cpu_intr_init>

LLVM IR (-O0):
define i32 @bmk_cpu_intr_init() {
br label %1
1: ; preds = %1, %0
br label %1
}

LLVM IR (-O2):
define i32 @bmk_cpu_intr_init() {
br label %1
1: ; preds = %1, %0
br label %1
}
void v(void *p) {}


x86 assembly (clang, -O0):
<v>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<v>:
ret

LLVM IR (-O0):
define void @v(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @v(i8* nocapture %0) {
ret void
}
/* Variables and functions */
long faki(int);
long v2(int m, int n) { return faki(n) / faki(n - m); }


x86 assembly (clang, -O0):
<v2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <faki@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
sub    -0x4(%rbp),%edi
call   1030 <faki@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cqto
idiv   %rcx
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<v2>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebp
mov    %edi,%r14d
mov    %esi,%edi
call   1030 <faki@plt>
mov    %rax,%rbx
sub    %r14d,%ebp
mov    %ebp,%edi
call   1030 <faki@plt>
mov    %rax,%rcx
mov    %rbx,%rax
or     %rcx,%rax
shr    $0x20,%rax
je     1146 <v2+0x36>
mov    %rbx,%rax
cqto
idiv   %rcx
jmp    114c <v2+0x3c>
mov    %ebx,%eax
xor    %edx,%edx
div    %ecx
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i64 @v2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i64 @faki(i32 %5)
%7 = load i32, i32* %4
%8 = load i32, i32* %3
%9 = sub nsw i32 %7, %8
%10 = call i64 @faki(i32 %9)
%11 = sdiv i64 %6, %10
ret i64 %11
}

LLVM IR (-O2):
define i64 @v2(i32 %0, i32 %1) {
%3 = tail call i64 @faki(i32 %1)
%4 = sub nsw i32 %1, %0
%5 = tail call i64 @faki(i32 %4)
%6 = sdiv i64 %3, %5
ret i64 %6
}
int __setpgid(pid, pgid)
int pid;
int pgid;
{ return setpgid(pid, pgid); }


x86 assembly (clang, -O0):
<__setpgid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x0,%al
call   1030 <setpgid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__setpgid>:
xor    %eax,%eax
jmp    1030 <setpgid@plt>

LLVM IR (-O0):
define i32 @__setpgid(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 (i32, i32, ...) bitcast (i32 (...)* @setpgid to i32 (i32, i32, ...)*)(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @__setpgid(i32 %0, i32 %1) {
%3 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @setpgid to i32 (i32, i32, ...)*)(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void t16(char **x, int offset) { free(x[offset]); }


x86 assembly (clang, -O0):
<t16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t16>:
movslq %esi,%rax
mov    (%rdi,%rax,8),%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @t16(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
%5 = load i8**, i8*** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8*, i8** %5, i64 %7
%9 = load i8*, i8** %8
%10 = call i32 @free(i8* %9)
ret void
}

LLVM IR (-O2):
define void @t16(i8** nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i8*, i8** %0, i64 %3
%5 = load i8*, i8** %4
%6 = tail call i32 @free(i8* %5)
ret void
}
int list_end(const struct list *list, const struct list *node) {
  return list == node;
}


x86 assembly (clang, -O0):
<list_end>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_end>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
%struct.list = type opaque
define i32 @list_end(%struct.list* %0, %struct.list* %1) {
%3 = alloca %struct.list*
%4 = alloca %struct.list*
store %struct.list* %0, %struct.list** %3
store %struct.list* %1, %struct.list** %4
%5 = load %struct.list*, %struct.list** %3
%6 = load %struct.list*, %struct.list** %4
%7 = icmp eq %struct.list* %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
%struct.list = type opaque
define i32 @list_end(%struct.list* readnone %0, %struct.list* readnone %1) {
%3 = icmp eq %struct.list* %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ pop_dependency();
void free_dependencies(int ndependencies) {
  int i;
  for (i = 0; i < ndependencies; i++)
    pop_dependency();
}


x86 assembly (clang, -O0):
<free_dependencies>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1143 <free_dependencies+0x33>
mov    $0x0,%al
call   1030 <pop_dependency@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <free_dependencies+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_dependencies>:
push   %rbx
test   %edi,%edi
jle    112c <free_dependencies+0x1c>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <pop_dependency@plt>
add    $0xffffffff,%ebx
jne    1120 <free_dependencies+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @free_dependencies(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = call i32 (...) @pop_dependency()
br label %10
10: ; preds = %8
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @free_dependencies(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = tail call i32 (...) @pop_dependency()
%6 = add nuw nsw i32 %4, 1
%7 = icmp eq i32 %6, %0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}
/* Variables and functions */
int heatindex_F(int /*<<< orphan*/, int);
int /*<<< orphan*/ temp_C2F(int);
int heatindex_C(int temp_C, int rh) {
  if (temp_C == 999 || temp_C < 21 || rh < 0)
    return 999;
  return heatindex_F(temp_C2F(temp_C), rh);
}


x86 assembly (clang, -O0):
<heatindex_C>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x3e7,-0x8(%rbp)
je     114f <heatindex_C+0x2f>
cmpl   $0x15,-0x8(%rbp)
jl     114f <heatindex_C+0x2f>
cmpl   $0x0,-0xc(%rbp)
jge    115b <heatindex_C+0x3b>
movl   $0x3e7,-0x4(%rbp)
jmp    1170 <heatindex_C+0x50>
mov    -0x8(%rbp),%edi
call   1040 <temp_C2F@plt>
mov    %eax,%edi
mov    -0xc(%rbp),%esi
call   1030 <heatindex_F@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<heatindex_C>:
push   %rbx
cmp    $0x3e7,%edi
je     1143 <heatindex_C+0x23>
cmp    $0x15,%edi
jl     1143 <heatindex_C+0x23>
mov    %esi,%ebx
test   %esi,%esi
js     1143 <heatindex_C+0x23>
call   1040 <temp_C2F@plt>
mov    %eax,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <heatindex_F@plt>
mov    $0x3e7,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @heatindex_C(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 999
br i1 %7, label %14, label %8
8: ; preds = %2
%9 = load i32, i32* %4
%10 = icmp slt i32 %9, 21
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = load i32, i32* %5
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %11, %8, %2
store i32 999, i32* %3
br label %20
15: ; preds = %11
%16 = load i32, i32* %4
%17 = call i32 @temp_C2F(i32 %16)
%18 = load i32, i32* %5
%19 = call i32 @heatindex_F(i32 %17, i32 %18)
store i32 %19, i32* %3
br label %20
20: ; preds = %15, %14
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @heatindex_C(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 999
%4 = icmp slt i32 %0, 21
%5 = or i1 %3, %4
%6 = icmp slt i32 %1, 0
%7 = or i1 %5, %6
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = tail call i32 @temp_C2F(i32 %0)
%10 = tail call i32 @heatindex_F(i32 %9, i32 %1)
br label %11
11: ; preds = %2, %8
%12 = phi i32 [ %10, %8 ], [ 999, %2 ]
ret i32 %12
}
int main(void) {
  char *ptr;
  {
    char my_char[9];
    ptr = &my_char[0];
  }
  return *(ptr + 8);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
lea    -0x19(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl 0x8(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca [9 x i8]
store i32 0, i32* %1
%4 = getelementptr inbounds [9 x i8], [9 x i8]* %3, i64 0, i64 0
store i8* %4, i8** %2
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i64 8
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
struct image_object {
  int dummy;
};

/* Variables and functions */
int _singularity_image_create(struct image_object *, long);
int singularity_image_create(struct image_object *image, long int size) {
  return (_singularity_image_create(image, size));
}


x86 assembly (clang, -O0):
<singularity_image_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <_singularity_image_create@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<singularity_image_create>:
jmp    1030 <_singularity_image_create@plt>

LLVM IR (-O0):
%struct.image_object = type { i32 }
define i32 @singularity_image_create(%struct.image_object* %0, i64 %1) {
%3 = alloca %struct.image_object*
%4 = alloca i64
store %struct.image_object* %0, %struct.image_object** %3
store i64 %1, i64* %4
%5 = load %struct.image_object*, %struct.image_object** %3
%6 = load i64, i64* %4
%7 = call i32 @_singularity_image_create(%struct.image_object* %5, i64 %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.image_object = type { i32 }
define i32 @singularity_image_create(%struct.image_object* %0, i64 %1) {
%3 = tail call i32 @_singularity_image_create(%struct.image_object* %0, i64 %1)
ret i32 %3
}
/* Type definitions */
typedef int int32_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fgetc(int /*<<< orphan*/ *);
int32_t piece_fget32(FILE *fd) {
  return (fgetc(fd) << 24 | fgetc(fd) << 16 | fgetc(fd) << 8 | fgetc(fd));
}


x86 assembly (clang, -O0):
<piece_fget32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
shl    $0x18,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
shl    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
or     %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<piece_fget32>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <fgetc@plt>
mov    %eax,%ebp
shl    $0x18,%ebp
mov    %r14,%rdi
call   1030 <fgetc@plt>
mov    %eax,%ebx
shl    $0x10,%ebx
or     %ebp,%ebx
mov    %r14,%rdi
call   1030 <fgetc@plt>
mov    %eax,%ebp
shl    $0x8,%ebp
mov    %r14,%rdi
call   1030 <fgetc@plt>
or     %ebp,%eax
or     %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @piece_fget32(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fgetc(i32* %3)
%5 = shl i32 %4, 24
%6 = load i32*, i32** %2
%7 = call i32 @fgetc(i32* %6)
%8 = shl i32 %7, 16
%9 = or i32 %5, %8
%10 = load i32*, i32** %2
%11 = call i32 @fgetc(i32* %10)
%12 = shl i32 %11, 8
%13 = or i32 %9, %12
%14 = load i32*, i32** %2
%15 = call i32 @fgetc(i32* %14)
%16 = or i32 %13, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @piece_fget32(i32* nocapture %0) {
%2 = tail call i32 @fgetc(i32* %0)
%3 = shl i32 %2, 24
%4 = tail call i32 @fgetc(i32* %0)
%5 = shl i32 %4, 16
%6 = or i32 %5, %3
%7 = tail call i32 @fgetc(i32* %0)
%8 = shl i32 %7, 8
%9 = or i32 %6, %8
%10 = tail call i32 @fgetc(i32* %0)
%11 = or i32 %9, %10
ret i32 %11
}
/* Variables and functions */
int myMessageBox(char const *, int);
int shell_q_bugreport(const char *text) {
  int reakce;
  switch (myMessageBox(text, 6)) {
  case 6:
    reakce = 0;
    break;
  case 5:
    reakce = 2;
    break;
  default:
    reakce = 1;
  }
  return reakce;
}


x86 assembly (clang, -O0):
<shell_q_bugreport>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x6,%esi
call   1030 <myMessageBox@plt>
mov    %eax,%ecx
mov    %ecx,-0x10(%rbp)
sub    $0x5,%eax
je     115a <shell_q_bugreport+0x4a>
jmp    113d <shell_q_bugreport+0x2d>
mov    -0x10(%rbp),%eax
sub    $0x6,%eax
jne    1166 <shell_q_bugreport+0x56>
jmp    114e <shell_q_bugreport+0x3e>
movl   $0x0,-0xc(%rbp)
jmp    116d <shell_q_bugreport+0x5d>
movl   $0x2,-0xc(%rbp)
jmp    116d <shell_q_bugreport+0x5d>
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shell_q_bugreport>:
push   %rax
mov    $0x6,%esi
call   1030 <myMessageBox@plt>
xor    %edx,%edx
cmp    $0x5,%eax
sete   %dl
add    $0x1,%edx
xor    %ecx,%ecx
cmp    $0x6,%eax
cmovne %edx,%ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @shell_q_bugreport(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @myMessageBox(i8* %4, i32 6)
switch i32 %5, label %8 [
i32 6, label %6
i32 5, label %7
]
6: ; preds = %1
store i32 0, i32* %3
br label %9
7: ; preds = %1
store i32 2, i32* %3
br label %9
8: ; preds = %1
store i32 1, i32* %3
br label %9
9: ; preds = %8, %7, %6
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @shell_q_bugreport(i8* %0) {
%2 = tail call i32 @myMessageBox(i8* %0, i32 6)
%3 = icmp eq i32 %2, 5
%4 = select i1 %3, i32 2, i32 1
%5 = icmp eq i32 %2, 6
%6 = select i1 %5, i32 0, i32 %4
ret i32 %6
}
int abs(int x) {
  if (x >= 0)
    return x;
  else
    return -x;
}


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     111c <abs+0x1c>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1124 <abs+0x24>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %11
8: ; preds = %1
%9 = load i32, i32* %3
%10 = sub nsw i32 0, %9
store i32 %10, i32* %2
br label %11
11: ; preds = %8, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
int __ev_ri5_changed() { return 0; }


x86 assembly (clang, -O0):
<__ev_ri5_changed>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ev_ri5_changed>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__ev_ri5_changed() {
ret i32 0
}

LLVM IR (-O2):
define i32 @__ev_ri5_changed() {
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t lfs2_popc(uint32_t a) {
  a = a - ((a >> 1) & 0x55555555);
  a = (a & 0x33333333) + ((a >> 2) & 0x33333333);
  return (((a + (a >> 4)) & 0xf0f0f0f) * 0x1010101) >> 24;
}


x86 assembly (clang, -O0):
<lfs2_popc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x1,%ecx
and    $0x55555555,%ecx
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x33333333,%eax
mov    -0x4(%rbp),%ecx
sar    $0x2,%ecx
and    $0x33333333,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x4,%ecx
add    %ecx,%eax
and    $0xf0f0f0f,%eax
imul   $0x1010101,%eax,%eax
sar    $0x18,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lfs2_popc>:
mov    %edi,%eax
shr    %eax
and    $0x55555555,%eax
sub    %eax,%edi
mov    %edi,%eax
and    $0x33333333,%eax
shr    $0x2,%edi
and    $0x33333333,%edi
add    %eax,%edi
mov    %edi,%eax
shr    $0x4,%eax
add    %edi,%eax
and    $0xf0f0f0f,%eax
imul   $0x1010101,%eax,%eax
shr    $0x18,%eax
ret

LLVM IR (-O0):
define i32 @lfs2_popc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = ashr i32 %4, 1
%6 = and i32 %5, 1431655765
%7 = sub nsw i32 %3, %6
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = and i32 %8, 858993459
%10 = load i32, i32* %2
%11 = ashr i32 %10, 2
%12 = and i32 %11, 858993459
%13 = add nsw i32 %9, %12
store i32 %13, i32* %2
%14 = load i32, i32* %2
%15 = load i32, i32* %2
%16 = ashr i32 %15, 4
%17 = add nsw i32 %14, %16
%18 = and i32 %17, 252645135
%19 = mul nsw i32 %18, 16843009
%20 = ashr i32 %19, 24
ret i32 %20
}

LLVM IR (-O2):
define i32 @lfs2_popc(i32 %0) {
%2 = lshr i32 %0, 1
%3 = and i32 %2, 1431655765
%4 = sub nsw i32 %0, %3
%5 = and i32 %4, 858993459
%6 = lshr i32 %4, 2
%7 = and i32 %6, 858993459
%8 = add nuw nsw i32 %7, %5
%9 = lshr i32 %8, 4
%10 = add nuw nsw i32 %9, %8
%11 = and i32 %10, 252645135
%12 = mul nsw i32 %11, 16843009
%13 = lshr i32 %12, 24
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_context_errno() {
  printf("NOT IMPLEMENTED:"
         "pa_context_errno"
         "\n");
}


x86 assembly (clang, -O0):
<pa_context_errno>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_context_errno>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"NOT IMPLEMENTED:pa_context_errno\0A\00"
define i32 @pa_context_errno() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [33 x i8] c"NOT IMPLEMENTED:pa_context_errno\00"
define i32 @pa_context_errno() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
void putch(char ch1) {
  __asm__ __volatile__("mov $0x0E, %%ah\n"
                       "xor %%bx , %%bx\n"
                       "movb %0  , %%al\n"
                       "int $0x10\n"
                       :
                       : "r"(ch1));
}


x86 assembly (clang, -O0):
<putch>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
mov    $0xe,%ah
xor    %bx,%bx
mov    %al,%al
int    $0x10
pop    %rbp
ret

x86 assembly (clang, -O2):
<putch>:
mov    $0xe,%ah
xor    %bx,%bx
mov    %dil,%al
int    $0x10
ret

LLVM IR (-O0):
define void @putch(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
ret void
}

LLVM IR (-O2):
define void @putch(i8 signext %0) {
tail call void asm sideeffect "mov $$0x0E, %ah\0Axor %bx , %bx\0Amovb $0 , %al\0Aint $$0x10\0A", "r,~{dirflag},~{fpsr},~{flags}"(i8 %0)
ret void
}
int is_letter(char c) { return (c >= 65 && c <= 90) || (c >= 97 && c <= 122); }


x86 assembly (clang, -O0):
<is_letter>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x41,%eax
jl     1129 <is_letter+0x29>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x5a,%ecx
mov    %al,-0x2(%rbp)
jle    114e <is_letter+0x4e>
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x61,%ecx
mov    %al,-0x3(%rbp)
jl     1148 <is_letter+0x48>
movsbl -0x1(%rbp),%eax
cmp    $0x7a,%eax
setle  %al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_letter>:
and    $0xdf,%dil
add    $0xbf,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_letter(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 65
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 90
br i1 %9, label %20, label %10
10: ; preds = %6, %1
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp sge i32 %12, 97
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp sle i32 %16, 122
br label %18
18: ; preds = %14, %10
%19 = phi i1 [ false, %10 ], [ %17, %14 ]
br label %20
20: ; preds = %18, %6
%21 = phi i1 [ true, %6 ], [ %19, %18 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @is_letter(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = zext i1 %4 to i32
ret i32 %5
}
void testClosureDIDrV(void (*closure)(double, int, double), double a1, int a2,
                      double a3) {
  (*closure)(a1, a2, a3);
}


x86 assembly (clang, -O0):
<testClosureDIDrV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
movsd  %xmm1,-0x20(%rbp)
mov    -0x8(%rbp),%rax
movsd  -0x10(%rbp),%xmm0
mov    -0x14(%rbp),%edi
movsd  -0x20(%rbp),%xmm1
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testClosureDIDrV>:
mov    %rdi,%rax
mov    %esi,%edi
jmp    *%rax

LLVM IR (-O0):
define void @testClosureDIDrV(void (double, i32, double)* %0, double %1, i32 %2, double %3) {
%5 = alloca void (double, i32, double)*
%6 = alloca double
%7 = alloca i32
%8 = alloca double
store void (double, i32, double)* %0, void (double, i32, double)** %5
store double %1, double* %6
store i32 %2, i32* %7
store double %3, double* %8
%9 = load void (double, i32, double)*, void (double, i32, double)** %5
%10 = load double, double* %6
%11 = load i32, i32* %7
%12 = load double, double* %8
ret void
}

LLVM IR (-O2):
define void @testClosureDIDrV(void (double, i32, double)* nocapture %0, double %1, i32 %2, double %3) {
tail call void %0(double %1, i32 %2, double %3)
ret void
}
unsigned xrop3_74_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = S | D;
  stk2 = T & stk3;
  stk1 = D ^ stk2;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_74_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_74_1_0>:
mov    %edi,%ecx
shl    $0x8,%ecx
lea    (%rcx,%rdi,1),%eax
mov    %esi,%edx
shl    $0x8,%edx
or     %esi,%edx
or     $0xff,%ecx
and    %edx,%ecx
xor    $0xff,%ecx
not    %eax
and    %ecx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_74_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %6
%24 = load i32, i32* %5
%25 = or i32 %23, %24
store i32 %25, i32* %10
%26 = load i32, i32* %7
%27 = load i32, i32* %10
%28 = and i32 %26, %27
store i32 %28, i32* %9
%29 = load i32, i32* %5
%30 = load i32, i32* %9
%31 = xor i32 %29, %30
store i32 %31, i32* %8
%32 = load i32, i32* %8
%33 = load i32, i32* %6
%34 = xor i32 %33, -1
%35 = and i32 %32, %34
%36 = load i32, i32* %5
%37 = load i32, i32* %6
%38 = and i32 %36, %37
%39 = or i32 %35, %38
ret i32 %39
}

LLVM IR (-O2):
define i32 @xrop3_74_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = or i32 %4, %3
%6 = zext i8 %1 to i32
%7 = mul nuw nsw i32 %6, 257
%8 = or i32 %4, 255
%9 = and i32 %7, %8
%10 = xor i32 %9, 255
%11 = xor i32 %5, -1
%12 = and i32 %10, %11
%13 = or i32 %12, %3
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("use of restrict\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"use of restrict\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [16 x i8] c"use of restrict\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int Pop();
int /*<<< orphan*/ Push(int);
void DoSub() {
  int a = Pop();
  int b = Pop();
  Push(b - a);
}


x86 assembly (clang, -O0):
<DoSub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <Pop@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <Pop@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
sub    -0x4(%rbp),%edi
call   1040 <Push@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoSub>:
push   %rbx
xor    %eax,%eax
call   1030 <Pop@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <Pop@plt>
sub    %ebx,%eax
mov    %eax,%edi
pop    %rbx
jmp    1040 <Push@plt>

LLVM IR (-O0):
define void @DoSub() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @Pop()
store i32 %3, i32* %1
%4 = call i32 (...) @Pop()
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = load i32, i32* %1
%7 = sub nsw i32 %5, %6
%8 = call i32 @Push(i32 %7)
ret void
}

LLVM IR (-O2):
define void @DoSub() {
%1 = tail call i32 (...) @Pop()
%2 = tail call i32 (...) @Pop()
%3 = sub nsw i32 %2, %1
%4 = tail call i32 @Push(i32 %3)
ret void
}
int uECC_curve(void) { return 1; }


x86 assembly (clang, -O0):
<uECC_curve>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uECC_curve>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @uECC_curve() {
ret i32 1
}

LLVM IR (-O2):
define i32 @uECC_curve() {
ret i32 1
}
void CRYPTO_set_id_callback(unsigned long (*func)(void)) { return; }


x86 assembly (clang, -O0):
<CRYPTO_set_id_callback>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<CRYPTO_set_id_callback>:
ret

LLVM IR (-O0):
define void @CRYPTO_set_id_callback(i64 ()* %0) {
%2 = alloca i64 ()*
store i64 ()* %0, i64 ()** %2
ret void
}

LLVM IR (-O2):
define void @CRYPTO_set_id_callback(i64 ()* nocapture %0) {
ret void
}
void foo202(int p) {}


x86 assembly (clang, -O0):
<foo202>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo202>:
ret

LLVM IR (-O0):
define void @foo202(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo202(i32 %0) {
ret void
}
void bounded_increment(unsigned char *value, unsigned char inc) {
  if (255 - *value < inc)
    *value = 255;
  else
    *value += inc;
}


x86 assembly (clang, -O0):
<bounded_increment>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%ecx
mov    $0xff,%eax
sub    %ecx,%eax
movzbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jge    1134 <bounded_increment+0x34>
mov    -0x8(%rbp),%rax
movb   $0xff,(%rax)
jmp    1143 <bounded_increment+0x43>
movzbl -0x9(%rbp),%edx
mov    -0x8(%rbp),%rax
movzbl (%rax),%ecx
add    %edx,%ecx
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bounded_increment>:
add    (%rdi),%sil
movzbl %sil,%eax
mov    $0xff,%ecx
cmovae %eax,%ecx
mov    %cl,(%rdi)
ret

LLVM IR (-O0):
define void @bounded_increment(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = sub nsw i32 255, %7
%9 = load i8, i8* %4
%10 = zext i8 %9 to i32
%11 = icmp slt i32 %8, %10
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = load i8*, i8** %3
store i8 -1, i8* %13
br label %22
14: ; preds = %2
%15 = load i8, i8* %4
%16 = zext i8 %15 to i32
%17 = load i8*, i8** %3
%18 = load i8, i8* %17
%19 = zext i8 %18 to i32
%20 = add nsw i32 %19, %16
%21 = trunc i32 %20 to i8
store i8 %21, i8* %17
br label %22
22: ; preds = %14, %12
ret void
}

LLVM IR (-O2):
define void @bounded_increment(i8* nocapture %0, i8 zeroext %1) {
%3 = load i8, i8* %0
%4 = tail call i8 @llvm.uadd.sat.i8(i8 %3, i8 %1)
store i8 %4, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ enable_servo_interrupt();
void servo_init(void) {
  (*(volatile unsigned long *)((0xE0008004))) = 0;
  (*(volatile unsigned long *)((0xE0008008))) = 0;
  (*(volatile unsigned long *)((0xE0008010))) = 0;
  (*(volatile unsigned long *)((0xE000800C))) =
      (int)(((14745000 * 4) / 1000) / 255);
  (*(volatile unsigned long *)((0xE0008000))) = 0x01;
  (*(volatile unsigned long *)((0xE0008014))) = 0x01;
  (*(volatile unsigned long *)((0xE0008018))) = 255 * 18;
  (*(volatile unsigned long *)((0xE0008004))) = 1;
  enable_servo_interrupt();
}


x86 assembly (clang, -O0):
<servo_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe0008004,%eax
movq   $0x0,(%rax)
mov    $0xe0008008,%eax
movq   $0x0,(%rax)
mov    $0xe0008010,%eax
movq   $0x0,(%rax)
mov    $0xe000800c,%eax
movq   $0xe7,(%rax)
mov    $0xe0008000,%eax
movq   $0x1,(%rax)
mov    $0xe0008014,%eax
movq   $0x1,(%rax)
mov    $0xe0008018,%eax
movq   $0x11ee,(%rax)
mov    $0xe0008004,%eax
movq   $0x1,(%rax)
mov    $0x0,%al
call   1030 <enable_servo_interrupt@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<servo_init>:
mov    $0xe0008004,%eax
movq   $0x0,(%rax)
movq   $0x0,0x4(%rax)
movq   $0x0,0xc(%rax)
movq   $0xe7,0x8(%rax)
movq   $0x1,-0x4(%rax)
movq   $0x1,0x10(%rax)
movq   $0x11ee,0x14(%rax)
movq   $0x1,(%rax)
xor    %eax,%eax
jmp    1030 <enable_servo_interrupt@plt>

LLVM IR (-O0):
define void @servo_init() {
store volatile i64 0, i64* inttoptr (i64 3758129156 to i64*)
store volatile i64 0, i64* inttoptr (i64 3758129160 to i64*)
store volatile i64 0, i64* inttoptr (i64 3758129168 to i64*)
store volatile i64 231, i64* inttoptr (i64 3758129164 to i64*)
store volatile i64 1, i64* inttoptr (i64 3758129152 to i64*)
store volatile i64 1, i64* inttoptr (i64 3758129172 to i64*)
store volatile i64 4590, i64* inttoptr (i64 3758129176 to i64*)
store volatile i64 1, i64* inttoptr (i64 3758129156 to i64*)
%1 = call i32 (...) @enable_servo_interrupt()
ret void
}

LLVM IR (-O2):
define void @servo_init() {
store volatile i64 0, i64* inttoptr (i64 3758129156 to i64*)
store volatile i64 0, i64* inttoptr (i64 3758129160 to i64*)
store volatile i64 0, i64* inttoptr (i64 3758129168 to i64*)
store volatile i64 231, i64* inttoptr (i64 3758129164 to i64*)
store volatile i64 1, i64* inttoptr (i64 3758129152 to i64*)
store volatile i64 1, i64* inttoptr (i64 3758129172 to i64*)
store volatile i64 4590, i64* inttoptr (i64 3758129176 to i64*)
store volatile i64 1, i64* inttoptr (i64 3758129156 to i64*)
%1 = tail call i32 (...) @enable_servo_interrupt()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ char_out(unsigned char);
void PrintCharacter(unsigned char c) { char_out(c); }


x86 assembly (clang, -O0):
<PrintCharacter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <char_out@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PrintCharacter>:
jmp    1030 <char_out@plt>

LLVM IR (-O0):
define void @PrintCharacter(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @char_out(i8 zeroext %3)
ret void
}

LLVM IR (-O2):
define void @PrintCharacter(i8 zeroext %0) {
%2 = tail call i32 @char_out(i8 zeroext %0)
ret void
}
/* Type definitions */
struct in6_addr {
  int dummy;
};
typedef int /*<<< orphan*/ str;

/* Variables and functions */
int /*<<< orphan*/ AF_INET6;
int /*<<< orphan*/ inet_ntop(int /*<<< orphan*/, struct in6_addr *, char *,
                             int);
char *pr_addr_n(struct in6_addr *addr) {
  static char str[64];
  inet_ntop(AF_INET6, addr, str, sizeof(str));
  return str;
}


x86 assembly (clang, -O0):
<pr_addr_n>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
lea    0x2f10(%rip),%rdx
mov    $0x40,%ecx
call   1030 <inet_ntop@plt>
lea    0x2eff(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pr_addr_n>:
push   %rbx
mov    %rdi,%rsi
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
lea    0x2f1c(%rip),%rbx
mov    %rbx,%rdx
mov    $0x40,%ecx
call   1030 <inet_ntop@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.in6_addr = type { i32 }
@pr_addr_n.str = internal global [64 x i8] zeroinitializer
@AF_INET6 = global i32 0
define i8* @pr_addr_n(%struct.in6_addr* %0) {
%2 = alloca %struct.in6_addr*
store %struct.in6_addr* %0, %struct.in6_addr** %2
%3 = load i32, i32* @AF_INET6
%4 = load %struct.in6_addr*, %struct.in6_addr** %2
%5 = call i32 @inet_ntop(i32 %3, %struct.in6_addr* %4, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @pr_addr_n.str, i64 0, i64 0), i32 64)
ret i8* getelementptr inbounds ([64 x i8], [64 x i8]* @pr_addr_n.str, i64 0, i64 0)
}

LLVM IR (-O2):
%struct.in6_addr = type { i32 }
@pr_addr_n.str = internal global [64 x i8] zeroinitializer
@AF_INET6 = global i32 0
define i8* @pr_addr_n(%struct.in6_addr* %0) {
%2 = load i32, i32* @AF_INET6
%3 = tail call i32 @inet_ntop(i32 %2, %struct.in6_addr* %0, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @pr_addr_n.str, i64 0, i64 0), i32 64)
ret i8* getelementptr inbounds ([64 x i8], [64 x i8]* @pr_addr_n.str, i64 0, i64 0)
}
int main(void) {
  char *t0 = "FOO";
  char *t1 = "BAR";
  char *t2 = "FOOBAR";
  char *t3 = "BARFOOBAR";
  char *t4 = "BARFOO";
  char *s0 = "%s";
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xf02(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xef0(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    0xee2(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    0xed4(%rip),%rax
mov    %rax,-0x20(%rbp)
lea    0xed3(%rip),%rax
mov    %rax,-0x28(%rbp)
lea    0xecf(%rip),%rax
mov    %rax,-0x30(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"FOO\00"
@.str.1 = [4 x i8] c"BAR\00"
@.str.2 = [7 x i8] c"FOOBAR\00"
@.str.3 = [10 x i8] c"BARFOOBAR\00"
@.str.4 = [7 x i8] c"BARFOO\00"
@.str.5 = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca i8*
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8** %2
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.2, i64 0, i64 0), i8** %3
store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0), i8** %4
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.4, i64 0, i64 0), i8** %5
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.5, i64 0, i64 0), i8** %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fibonacci(int);
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n;
  printf("digita un numero: ");
  scanf("%d", &n);
  printf("il numero di fibonacci in posizione %d e' %ld\n", n, fibonacci(n));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xebf(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <fibonacci@plt>
mov    -0xc(%rbp),%esi
mov    %eax,%edx
lea    0xe9f(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xec4(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xec9(%rip),%rdi
lea    0xc(%rsp),%rsi
call   1050 <scanf@plt>
mov    0xc(%rsp),%ebx
mov    %ebx,%edi
call   1040 <fibonacci@plt>
lea    0xeb0(%rip),%rdi
mov    %ebx,%esi
mov    %eax,%edx
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"digita un numero: \00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [47 x i8] c"il numero di fibonacci in posizione %d e' %ld\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = load i32, i32* %2
%7 = call i32 @fibonacci(i32 %6)
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str.2, i64 0, i64 0), i32 %5, i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [19 x i8] c"digita un numero: \00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [47 x i8] c"il numero di fibonacci in posizione %d e' %ld\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @fibonacci(i32 %5)
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([47 x i8], [47 x i8]* @.str.2, i64 0, i64 0), i32 %5, i32 %6)
ret i32 0
}