xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage() {
  fprintf(stderr, "\n"
                  "Usage: local_proxy <config file>\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [35 x i8] c"\0AUsage: local_proxy <config file>\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [35 x i8] c"\0AUsage: local_proxy <config file>\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ NEG();
int /*<<< orphan*/ T_WAIT_UNTIL(int);
void op_ED_0x6c(void) {
  NEG();
  T_WAIT_UNTIL(4);
  return;
}


x86 assembly (clang, -O0):
<op_ED_0x6c>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <NEG@plt>
mov    $0x4,%edi
call   1030 <T_WAIT_UNTIL@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_ED_0x6c>:
push   %rax
xor    %eax,%eax
call   1040 <NEG@plt>
mov    $0x4,%edi
pop    %rax
jmp    1030 <T_WAIT_UNTIL@plt>

LLVM IR (-O0):
define void @op_ED_0x6c() {
%1 = call i32 (...) @NEG()
%2 = call i32 @T_WAIT_UNTIL(i32 4)
ret void
}

LLVM IR (-O2):
define void @op_ED_0x6c() {
%1 = tail call i32 (...) @NEG()
%2 = tail call i32 @T_WAIT_UNTIL(i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _arc_v2_irq_unit_irq_enable_set(int, int /*<<< orphan*/);
void _arc_v2_irq_unit_int_disable(int irq) {
  _arc_v2_irq_unit_irq_enable_set(irq, 0);
}


x86 assembly (clang, -O0):
<_arc_v2_irq_unit_int_disable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1030 <_arc_v2_irq_unit_irq_enable_set@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_arc_v2_irq_unit_int_disable>:
xor    %esi,%esi
jmp    1030 <_arc_v2_irq_unit_irq_enable_set@plt>

LLVM IR (-O0):
define void @_arc_v2_irq_unit_int_disable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_arc_v2_irq_unit_irq_enable_set(i32 %3, i32 0)
ret void
}

LLVM IR (-O2):
define void @_arc_v2_irq_unit_int_disable(i32 %0) {
%2 = tail call i32 @_arc_v2_irq_unit_irq_enable_set(i32 %0, i32 0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int format_string(char *, int /*<<< orphan*/ *, int /*<<< orphan*/, int,
                  char const *, int /*<<< orphan*/);
int vsprintf(char *s, const char *format, va_list arg) {
  int r = format_string(s, NULL, 0, -1, format, arg);
  s[r] = '\0';
  return r;
}


x86 assembly (clang, -O0):
<vsprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%r8
mov    -0x14(%rbp),%r9d
xor    %eax,%eax
mov    %eax,%esi
xor    %edx,%edx
mov    $0xffffffff,%ecx
call   1030 <format_string@plt>
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x18(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vsprintf>:
push   %rbx
mov    %edx,%r9d
mov    %rsi,%r8
mov    %rdi,%rbx
xor    %esi,%esi
xor    %edx,%edx
mov    $0xffffffff,%ecx
call   1030 <format_string@plt>
cltq
movb   $0x0,(%rbx,%rax,1)
pop    %rbx
ret

LLVM IR (-O0):
define i32 @vsprintf(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 @format_string(i8* %8, i32* null, i32 0, i32 -1, i8* %9, i32 %10)
store i32 %11, i32* %7
%12 = load i8*, i8** %4
%13 = load i32, i32* %7
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
store i8 0, i8* %15
%16 = load i32, i32* %7
ret i32 %16
}

LLVM IR (-O2):
define i32 @vsprintf(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @format_string(i8* %0, i32* null, i32 0, i32 -1, i8* %1, i32 %2)
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 %5
store i8 0, i8* %6
ret i32 %4
}
/* Variables and functions */
size_t strlen(const char *str) {
  size_t retval;
  for (retval = 0; *str != '\0'; str++)
    retval++;
  return retval;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     113d <strlen+0x3d>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1110 <strlen+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
cmpb   $0x0,(%rdi)
je     111f <strlen+0x1f>
xor    %ecx,%ecx
nopw   0x0(%rax,%rax,1)
lea    0x1(%rcx),%rax
cmpb   $0x0,0x1(%rdi,%rcx,1)
mov    %rax,%rcx
jne    1110 <strlen+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %4
%10 = load i64, i64* %3
%11 = add i64 %10, 1
store i64 %11, i64* %3
br label %12
12: ; preds = %9
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %2
br label %4
15: ; preds = %4
%16 = load i64, i64* %3
ret i64 %16
}

LLVM IR (-O2):
define i64 @strlen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %7, %4 ], [ 0, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = add i64 %5, 1
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i64 [ 0, %1 ], [ %7, %4 ]
ret i64 %12
}
/* Variables and functions */
int /*<<< orphan*/ pr_inf(char *);
int stress_cache_set_sfence(const char *opt) {
  (void)opt;
  pr_inf("sfence not available, ignoring option --cache-sfence\n");
  return 0;
}


x86 assembly (clang, -O0):
<stress_cache_set_sfence>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <pr_inf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stress_cache_set_sfence>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <pr_inf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [54 x i8] c"sfence not available, ignoring option --cache-sfence\0A\00"
define i32 @stress_cache_set_sfence(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @pr_inf(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [54 x i8] c"sfence not available, ignoring option --cache-sfence\0A\00"
define i32 @stress_cache_set_sfence(i8* nocapture readnone %0) {
%2 = tail call i32 @pr_inf(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M407_f(char *s) {
  debug("M407_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M407_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M407_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M407_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M407_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M407_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M407_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void Bit_Clear(uint8_t *aPtr, int num) { aPtr[num / 8] &= ~(1 << (num % 8)); }


x86 assembly (clang, -O0):
<Bit_Clear>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %edx,%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    -0x1c(%rbp),%edx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
and    (%rax,%rcx,4),%edx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Bit_Clear>:
mov    %esi,%ecx
and    $0x7,%cl
mov    $0xfffffffe,%eax
rol    %cl,%eax
lea    0x7(%rsi),%ecx
test   %esi,%esi
cmovns %esi,%ecx
sar    $0x3,%ecx
movslq %ecx,%rcx
and    %eax,(%rdi,%rcx,4)
ret

LLVM IR (-O0):
define void @Bit_Clear(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = srem i32 %5, 8
%7 = shl i32 1, %6
%8 = xor i32 %7, -1
%9 = load i32*, i32** %3
%10 = load i32, i32* %4
%11 = sdiv i32 %10, 8
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %9, i64 %12
%14 = load i32, i32* %13
%15 = and i32 %14, %8
store i32 %15, i32* %13
ret void
}

LLVM IR (-O2):
define void @Bit_Clear(i32* nocapture %0, i32 %1) {
%3 = and i32 %1, 7
%4 = shl nuw nsw i32 1, %3
%5 = xor i32 %4, -1
%6 = sdiv i32 %1, 8
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = and i32 %9, %5
store i32 %10, i32* %8
ret void
}
/* Variables and functions */
scalar_t__ random();
int prandom_int() { return (int)random(); }


x86 assembly (clang, -O0):
<prandom_int>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <random@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<prandom_int>:
xor    %eax,%eax
jmp    1030 <random@plt>

LLVM IR (-O0):
define i32 @prandom_int() {
%1 = call i64 (...) @random()
%2 = trunc i64 %1 to i32
ret i32 %2
}

LLVM IR (-O2):
define i32 @prandom_int() {
%1 = tail call i64 (...) @random()
%2 = trunc i64 %1 to i32
ret i32 %2
}
void myfunction(int z, int b, int *a) {
  z = 5;
  b = 6;
  *a = 7;
}


x86 assembly (clang, -O0):
<myfunction>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
movl   $0x5,-0x4(%rbp)
movl   $0x6,-0x8(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x7,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<myfunction>:
movl   $0x7,(%rdx)
ret

LLVM IR (-O0):
define void @myfunction(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
store i32 5, i32* %4
store i32 6, i32* %5
%7 = load i32*, i32** %6
store i32 7, i32* %7
ret void
}

LLVM IR (-O2):
define void @myfunction(i32 %0, i32 %1, i32* nocapture writeonly %2) {
store i32 7, i32* %2
ret void
}
const char *mDNSstrchr(const char *s, int c) {
  while (1) {
    if (c == *s)
      return s;
    if (!*s)
      return 0L;
    s++;
  }
}


x86 assembly (clang, -O0):
<mDNSstrchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jne    112a <mDNSstrchr+0x2a>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1155 <mDNSstrchr+0x55>
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
jne    1144 <mDNSstrchr+0x44>
movq   $0x0,-0x8(%rbp)
jmp    1155 <mDNSstrchr+0x55>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110b <mDNSstrchr+0xb>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mDNSstrchr>:
mov    %rdi,%rax
movsbl (%rdi),%ecx
cmp    %esi,%ecx
je     1120 <mDNSstrchr+0x20>
nopw   0x0(%rax,%rax,1)
test   %cl,%cl
je     1121 <mDNSstrchr+0x21>
movsbl 0x1(%rax),%ecx
add    $0x1,%rax
cmp    %esi,%ecx
jne    1110 <mDNSstrchr+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @mDNSstrchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
br label %6
6: ; preds = %2, %19
%7 = load i32, i32* %5
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %7, %10
br i1 %11, label %12, label %14
12: ; preds = %6
%13 = load i8*, i8** %4
store i8* %13, i8** %3
br label %22
14: ; preds = %6
%15 = load i8*, i8** %4
%16 = load i8, i8* %15
%17 = icmp ne i8 %16, 0
br i1 %17, label %19, label %18
18: ; preds = %14
store i8* null, i8** %3
br label %22
19: ; preds = %14
%20 = load i8*, i8** %4
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %4
br label %6
22: ; preds = %18, %12
%23 = load i8*, i8** %3
ret i8* %23
}

LLVM IR (-O2):
define i8* @mDNSstrchr(i8* %0, i32 %1) {
%3 = load i8, i8* %0
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, %1
br i1 %5, label %15, label %6
6: ; preds = %2, %10
%7 = phi i8 [ %12, %10 ], [ %3, %2 ]
%8 = phi i8* [ %11, %10 ], [ %0, %2 ]
%9 = icmp eq i8 %7, 0
br i1 %9, label %15, label %10
10: ; preds = %6
%11 = getelementptr inbounds i8, i8* %8, i64 1
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, %1
br i1 %14, label %15, label %6
15: ; preds = %10, %6, %2
%16 = phi i8* [ %0, %2 ], [ null, %6 ], [ %11, %10 ]
ret i8* %16
}
double multiply(double d1, double d2) { return d1 * d2; }


x86 assembly (clang, -O0):
<multiply>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<multiply>:
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @multiply(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fmul double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @multiply(double %0, double %1) {
%3 = fmul double %0, %1
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
void min_caml_print_byte(void *fv, char ch) { putchar(ch); }


x86 assembly (clang, -O0):
<min_caml_print_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movsbl -0x9(%rbp),%edi
call   1030 <putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<min_caml_print_byte>:
mov    %esi,%edi
jmp    1030 <putchar@plt>

LLVM IR (-O0):
define void @min_caml_print_byte(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = call i32 @putchar(i8 signext %5)
ret void
}

LLVM IR (-O2):
define void @min_caml_print_byte(i8* nocapture readnone %0, i8 signext %1) {
%3 = tail call i32 @putchar(i8 signext %1)
ret void
}
/* Type definitions */
struct pkt_buff {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ tprintf(char *);
void no_next_header(struct pkt_buff *pkt __attribute__((__unused__))) {
  tprintf(" [ No Next Header");
  tprintf(" ]\n");
}


x86 assembly (clang, -O0):
<no_next_header>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <tprintf@plt>
lea    0xee3(%rip),%rdi
call   1030 <tprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<no_next_header>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <tprintf@plt>
lea    0xeee(%rip),%rdi
pop    %rax
jmp    1030 <tprintf@plt>

LLVM IR (-O0):
%struct.pkt_buff = type { i32 }
@.str = [18 x i8] c" [ No Next Header\00"
@.str.1 = [4 x i8] c" ]\0A\00"
define void @no_next_header(%struct.pkt_buff* %0) {
%2 = alloca %struct.pkt_buff*
store %struct.pkt_buff* %0, %struct.pkt_buff** %2
%3 = call i32 @tprintf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @tprintf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.pkt_buff = type { i32 }
@.str = [18 x i8] c" [ No Next Header\00"
@.str.1 = [4 x i8] c" ]\0A\00"
define void @no_next_header(%struct.pkt_buff* nocapture readnone %0) {
%2 = tail call i32 @tprintf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @tprintf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cgincloc(char *, int, int);
void cginclw(int a) { cgincloc("add", a, 1); }


x86 assembly (clang, -O0):
<cginclw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
mov    $0x1,%edx
call   1030 <cgincloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cginclw>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
mov    $0x1,%edx
jmp    1030 <cgincloc@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"add\00"
define void @cginclw(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @cgincloc(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3, i32 1)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"add\00"
define void @cginclw(i32 %0) {
%2 = tail call i32 @cgincloc(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0, i32 1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *fgets(char *, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ play(char *);
int main() {
  FILE *fin = fopen("input.txt", "r");
  char line[50];
  while (fgets(line, sizeof line, fin) != NULL) {
    play(line);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    0xebd(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x10(%rbp)
lea    -0x50(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    $0x32,%esi
call   1030 <fgets@plt>
cmp    $0x0,%rax
je     1180 <main+0x50>
lea    -0x50(%rbp),%rdi
call   1040 <play@plt>
jmp    1156 <main+0x26>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
sub    $0x38,%rsp
lea    0xec2(%rip),%rdi
lea    0xec5(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,%r14
mov    %rsp,%rdi
mov    $0x32,%esi
mov    %rax,%rdx
call   1030 <fgets@plt>
test   %rax,%rax
je     118d <main+0x5d>
mov    %rsp,%rbx
cs nopw 0x0(%rax,%rax,1)
nop
mov    %rbx,%rdi
call   1040 <play@plt>
mov    %rbx,%rdi
mov    $0x32,%esi
mov    %r14,%rdx
call   1030 <fgets@plt>
test   %rax,%rax
jne    1170 <main+0x40>
xor    %eax,%eax
add    $0x38,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [10 x i8] c"input.txt\00"
@.str.1 = [2 x i8] c"r\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca [50 x i8]
store i32 0, i32* %1
%4 = call i32* @fopen(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %4, i32** %2
br label %5
5: ; preds = %10, %0
%6 = getelementptr inbounds [50 x i8], [50 x i8]* %3, i64 0, i64 0
%7 = load i32*, i32** %2
%8 = call i32* @fgets(i8* %6, i32 50, i32* %7)
%9 = icmp ne i32* %8, null
br i1 %9, label %10, label %13
10: ; preds = %5
%11 = getelementptr inbounds [50 x i8], [50 x i8]* %3, i64 0, i64 0
%12 = call i32 @play(i8* %11)
br label %5
13: ; preds = %5
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"input.txt\00"
@.str.1 = [2 x i8] c"r\00"
define i32 @main() {
%1 = alloca [50 x i8]
%2 = tail call i32* @fopen(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%3 = getelementptr inbounds [50 x i8], [50 x i8]* %1, i64 0, i64 0
%4 = call i32* @fgets(i8* %3, i32 50, i32* %2)
%5 = icmp eq i32* %4, null
br i1 %5, label %10, label %6
6: ; preds = %0, %6
%7 = call i32 @play(i8* %3)
%8 = call i32* @fgets(i8* %3, i32 50, i32* %2)
%9 = icmp eq i32* %8, null
br i1 %9, label %10, label %6
10: ; preds = %6, %0
ret i32 0
}
/* Variables and functions */
int _Lzma_Encode(unsigned char *, unsigned int *, unsigned char const *,
                 unsigned int);
int Lzma_Encode(unsigned char *dest, unsigned int *destLen,
                const unsigned char *src, unsigned int srcLen) {
  int res = _Lzma_Encode(dest, destLen, src, srcLen);
  return res;
}


x86 assembly (clang, -O0):
<Lzma_Encode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <_Lzma_Encode@plt>
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Lzma_Encode>:
jmp    1030 <_Lzma_Encode@plt>

LLVM IR (-O0):
define i32 @Lzma_Encode(i8* %0, i32* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
store i8* %0, i8** %5
store i32* %1, i32** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%10 = load i8*, i8** %5
%11 = load i32*, i32** %6
%12 = load i8*, i8** %7
%13 = load i32, i32* %8
%14 = call i32 @_Lzma_Encode(i8* %10, i32* %11, i8* %12, i32 %13)
store i32 %14, i32* %9
%15 = load i32, i32* %9
ret i32 %15
}

LLVM IR (-O2):
define i32 @Lzma_Encode(i8* %0, i32* %1, i8* %2, i32 %3) {
%5 = tail call i32 @_Lzma_Encode(i8* %0, i32* %1, i8* %2, i32 %3)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ HplAtm128GeneralIOPinP__16__IO__makeOutput();
void SharedAnalogDeviceP__1__EnablePin__makeOutput(void) {
  HplAtm128GeneralIOPinP__16__IO__makeOutput();
}


x86 assembly (clang, -O0):
<SharedAnalogDeviceP__1__EnablePin__makeOutput>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplAtm128GeneralIOPinP__16__IO__makeOutput@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SharedAnalogDeviceP__1__EnablePin__makeOutput>:
xor    %eax,%eax
jmp    1030 <HplAtm128GeneralIOPinP__16__IO__makeOutput@plt>

LLVM IR (-O0):
define void @SharedAnalogDeviceP__1__EnablePin__makeOutput() {
%1 = call i32 (...) @HplAtm128GeneralIOPinP__16__IO__makeOutput()
ret void
}

LLVM IR (-O2):
define void @SharedAnalogDeviceP__1__EnablePin__makeOutput() {
%1 = tail call i32 (...) @HplAtm128GeneralIOPinP__16__IO__makeOutput()
ret void
}
int ld_gt_mr1(long double *a1, long double a2) { return (((*a1) > (a2))); }


x86 assembly (clang, -O0):
<ld_gt_mr1>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
mov    %rdi,-0x8(%rbp)
fstpt  -0x20(%rbp)
mov    -0x8(%rbp),%rax
fldt   (%rax)
fldt   -0x20(%rbp)
fxch   %st(1)
fucomip %st(1),%st
fstp   %st(0)
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ld_gt_mr1>:
fldt   0x8(%rsp)
fldt   (%rdi)
xor    %eax,%eax
fucomip %st(1),%st
fstp   %st(0)
seta   %al
ret

LLVM IR (-O0):
define i32 @ld_gt_mr1(x86_fp80* %0, x86_fp80 %1) {
%3 = alloca x86_fp80*
%4 = alloca x86_fp80
store x86_fp80* %0, x86_fp80** %3
store x86_fp80 %1, x86_fp80* %4
%5 = load x86_fp80*, x86_fp80** %3
%6 = load x86_fp80, x86_fp80* %5
%7 = load x86_fp80, x86_fp80* %4
%8 = fcmp ogt x86_fp80 %6, %7
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @ld_gt_mr1(x86_fp80* nocapture %0, x86_fp80 %1) {
%3 = load x86_fp80, x86_fp80* %0
%4 = fcmp ogt x86_fp80 %3, %1
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
void action_delay(void) { sleep(2); }


x86 assembly (clang, -O0):
<action_delay>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <sleep@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<action_delay>:
mov    $0x2,%edi
jmp    1030 <sleep@plt>

LLVM IR (-O0):
define void @action_delay() {
%1 = call i32 @sleep(i32 2)
ret void
}

LLVM IR (-O2):
define void @action_delay() {
%1 = tail call i32 @sleep(i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TCIFLUSH;
int slowWrite(int, char *, int);
int /*<<< orphan*/ tcflush(int, int /*<<< orphan*/);
int writeStop(int fd) {
  char buf[14] = {'W', 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0F, 0x20};
  tcflush(fd, TCIFLUSH);
  int res = slowWrite(fd, buf, 13);
  return res == 13;
}


x86 assembly (clang, -O0):
<writeStop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    0xece(%rip),%rax
mov    %rax,-0x12(%rbp)
mov    0xecc(%rip),%eax
mov    %eax,-0xa(%rbp)
mov    0xec6(%rip),%ax
mov    %ax,-0x6(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2e8c(%rip),%rax
mov    (%rax),%esi
call   1040 <tcflush@plt>
mov    -0x4(%rbp),%edi
lea    -0x12(%rbp),%rsi
mov    $0xd,%edx
call   1030 <slowWrite@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0xd,-0x18(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<writeStop>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
movabs $0x200f0000000000,%rax
mov    %rax,0x6(%rsp)
movq   $0x57,(%rsp)
mov    0x2e9b(%rip),%rax
mov    (%rax),%esi
call   1040 <tcflush@plt>
mov    %rsp,%rsi
mov    %ebx,%edi
mov    $0xd,%edx
call   1030 <slowWrite@plt>
xor    %ecx,%ecx
cmp    $0xd,%eax
sete   %cl
mov    %ecx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.writeStop.buf = [14 x i8] c"W\00\00\00\00\00\00\00\00\00\00\0F \00"
@TCIFLUSH = global i32 0
define i32 @writeStop(i32 %0) {
%2 = alloca i32
%3 = alloca [14 x i8]
%4 = alloca i32
store i32 %0, i32* %2
%5 = bitcast [14 x i8]* %3 to i8*
%6 = load i32, i32* %2
%7 = load i32, i32* @TCIFLUSH
%8 = call i32 @tcflush(i32 %6, i32 %7)
%9 = load i32, i32* %2
%10 = getelementptr inbounds [14 x i8], [14 x i8]* %3, i64 0, i64 0
%11 = call i32 @slowWrite(i32 %9, i8* %10, i32 13)
store i32 %11, i32* %4
%12 = load i32, i32* %4
%13 = icmp eq i32 %12, 13
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
@__const.writeStop.buf = [14 x i8] c"W\00\00\00\00\00\00\00\00\00\00\0F \00"
@TCIFLUSH = global i32 0
define i32 @writeStop(i32 %0) {
%2 = alloca [14 x i8]
%3 = getelementptr inbounds [14 x i8], [14 x i8]* %2, i64 0, i64 0
%4 = load i32, i32* @TCIFLUSH
%5 = tail call i32 @tcflush(i32 %0, i32 %4)
%6 = call i32 @slowWrite(i32 %0, i8* %3, i32 13)
%7 = icmp eq i32 %6, 13
%8 = zext i1 %7 to i32
ret i32 %8
}
int f1(int val) {
  int *ptr;
  if (val == 0) {
    int val;
    val = 5;
    ptr = &val;
  }
  return (*ptr + 1);
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1120 <f1+0x20>
movl   $0x5,-0x14(%rbp)
lea    -0x14(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
mov    $0x6,%eax
ret

LLVM IR (-O0):
define i32 @f1(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 5, i32* %4
store i32* %4, i32** %3
br label %8
8: ; preds = %7, %1
%9 = load i32*, i32** %3
%10 = load i32, i32* %9
%11 = add nsw i32 %10, 1
ret i32 %11
}

LLVM IR (-O2):
define i32 @f1(i32 %0) {
ret i32 6
}
float invSqrt(float x) {
  float halfx = 0.5f * x;
  float y = x;
  long i = *(long *)&y;
  i = 0x5f3759df - (i >> 1);
  y = *(float *)&i;
  y = y * (1.5f - (halfx * y * y));
  return y;
}


x86 assembly (clang, -O0):
<invSqrt>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xef3(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
mov    -0xc(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
sar    $0x1,%rcx
mov    $0x5f3759df,%eax
sub    %rcx,%rax
mov    %rax,-0x18(%rbp)
movss  -0x18(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
mulss  -0xc(%rbp),%xmm1
movss  -0xc(%rbp),%xmm2
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm1
movss  0xe88(%rip),%xmm2
addss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<invSqrt>:
ret

LLVM IR (-O0):
define float @invSqrt(float %0) {
%2 = alloca float
%3 = alloca float
%4 = alloca float
%5 = alloca i64
store float %0, float* %2
%6 = load float, float* %2
%7 = fmul float 5.000000e-01, %6
store float %7, float* %3
%8 = load float, float* %2
store float %8, float* %4
%9 = bitcast float* %4 to i64*
%10 = load i64, i64* %9
store i64 %10, i64* %5
%11 = load i64, i64* %5
%12 = ashr i64 %11, 1
%13 = sub nsw i64 1597463007, %12
store i64 %13, i64* %5
%14 = bitcast i64* %5 to float*
%15 = load float, float* %14
store float %15, float* %4
%16 = load float, float* %4
%17 = load float, float* %3
%18 = load float, float* %4
%19 = fmul float %17, %18
%20 = load float, float* %4
%21 = fneg float %19
%22 = call float @llvm.fmuladd.f32(float %21, float %20, float 1.500000e+00)
%23 = fmul float %16, %22
store float %23, float* %4
%24 = load float, float* %4
ret float %24
}

LLVM IR (-O2):
define float @invSqrt(float %0) {
ret float poison
}
/* Variables and functions */
int RAND_bytes(unsigned char *, size_t);
int RAND_pseudo_bytes(unsigned char *, size_t);
int ssl_rand(void *p, size_t sz) {
  int rv;
  rv = RAND_pseudo_bytes((unsigned char *)p, sz);
  if (rv == -1) {
    rv = RAND_bytes((unsigned char *)p, sz);
    if (rv != 1)
      return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<ssl_rand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <RAND_pseudo_bytes@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0xffffffff,-0x1c(%rbp)
jne    1175 <ssl_rand+0x55>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <RAND_bytes@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x1,-0x1c(%rbp)
je     1170 <ssl_rand+0x50>
movl   $0xffffffff,-0x4(%rbp)
jmp    117c <ssl_rand+0x5c>
jmp    1175 <ssl_rand+0x55>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssl_rand>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <RAND_pseudo_bytes@plt>
cmp    $0xffffffff,%eax
jne    114b <ssl_rand+0x2b>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <RAND_bytes@plt>
mov    %eax,%ecx
mov    $0xffffffff,%eax
cmp    $0x1,%ecx
jne    114d <ssl_rand+0x2d>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @ssl_rand(i8* %0, i64 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32
store i8* %0, i8** %4
store i64 %1, i64* %5
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = call i32 @RAND_pseudo_bytes(i8* %7, i64 %8)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp eq i32 %10, -1
br i1 %11, label %12, label %20
12: ; preds = %2
%13 = load i8*, i8** %4
%14 = load i64, i64* %5
%15 = call i32 @RAND_bytes(i8* %13, i64 %14)
store i32 %15, i32* %6
%16 = load i32, i32* %6
%17 = icmp ne i32 %16, 1
br i1 %17, label %18, label %19
18: ; preds = %12
store i32 -1, i32* %3
br label %21
19: ; preds = %12
br label %20
20: ; preds = %19, %2
store i32 0, i32* %3
br label %21
21: ; preds = %20, %18
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @ssl_rand(i8* %0, i64 %1) {
%3 = tail call i32 @RAND_pseudo_bytes(i8* %0, i64 %1)
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = tail call i32 @RAND_bytes(i8* %0, i64 %1)
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %5, %2
br label %9
9: ; preds = %5, %8
%10 = phi i32 [ 0, %8 ], [ -1, %5 ]
ret i32 %10
}
/* Variables and functions */
unsigned int getMessagesForType(unsigned int, char *, int /*<<< orphan*/,
                                char **);
unsigned int getEvents(unsigned int handle, char *sid, char **messages) {
  return getMessagesForType(handle, sid, 0, messages);
}


x86 assembly (clang, -O0):
<getEvents>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
xor    %edx,%edx
call   1030 <getMessagesForType@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getEvents>:
mov    %rdx,%rcx
xor    %edx,%edx
jmp    1030 <getMessagesForType@plt>

LLVM IR (-O0):
define i32 @getEvents(i32 %0, i8* %1, i8** %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8**
store i32 %0, i32* %4
store i8* %1, i8** %5
store i8** %2, i8*** %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i8**, i8*** %6
%10 = call i32 @getMessagesForType(i32 %7, i8* %8, i32 0, i8** %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @getEvents(i32 %0, i8* %1, i8** %2) {
%4 = tail call i32 @getMessagesForType(i32 %0, i8* %1, i32 0, i8** %2)
ret i32 %4
}
void avpriv_alloc_fixed_dsp() {}


x86 assembly (clang, -O0):
<avpriv_alloc_fixed_dsp>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avpriv_alloc_fixed_dsp>:
ret

LLVM IR (-O0):
define void @avpriv_alloc_fixed_dsp() {
ret void
}

LLVM IR (-O2):
define void @avpriv_alloc_fixed_dsp() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ kill(void *, void *);
void callKill(int cargs, void **pargs) { kill(pargs[1], pargs[2]); }


x86 assembly (clang, -O0):
<callKill>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
mov    -0x10(%rbp),%rax
mov    0x10(%rax),%rsi
call   1030 <kill@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<callKill>:
mov    0x8(%rsi),%rdi
mov    0x10(%rsi),%rsi
jmp    1030 <kill@plt>

LLVM IR (-O0):
define void @callKill(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i8**, i8*** %4
%6 = getelementptr inbounds i8*, i8** %5, i64 1
%7 = load i8*, i8** %6
%8 = load i8**, i8*** %4
%9 = getelementptr inbounds i8*, i8** %8, i64 2
%10 = load i8*, i8** %9
%11 = call i32 @kill(i8* %7, i8* %10)
ret void
}

LLVM IR (-O2):
define void @callKill(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8*, i8** %1, i64 2
%6 = load i8*, i8** %5
%7 = tail call i32 @kill(i8* %4, i8* %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_idxset_steal_first() {
  printf("NOT IMPLEMENTED:"
         "pa_idxset_steal_first"
         "\n");
}


x86 assembly (clang, -O0):
<pa_idxset_steal_first>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_idxset_steal_first>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [39 x i8] c"NOT IMPLEMENTED:pa_idxset_steal_first\0A\00"
define i32 @pa_idxset_steal_first() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [38 x i8] c"NOT IMPLEMENTED:pa_idxset_steal_first\00"
define i32 @pa_idxset_steal_first() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
unsigned undump16(const unsigned char *c) {
  return (unsigned)c[1] + (((unsigned)c[0]) << 8);
}


x86 assembly (clang, -O0):
<undump16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x1(%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
shl    $0x8,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<undump16>:
movzwl (%rdi),%eax
shl    $0x10,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @undump16(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 1
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 0
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = add i32 %6, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @undump16(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 1
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = load i8, i8* %0
%6 = zext i8 %5 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = or i32 %7, %4
ret i32 %8
}
void f33(void) {
  ({
    ({
      goto a;
      0;
    });
    ({ 0; });
  a:
    0;
  });
  ({
    ({ 0; });
    ({ 0; });
    0;
  });
  0;
}


x86 assembly (clang, -O0):
<f33>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f33>:
ret

LLVM IR (-O0):
define void @f33() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
br label %6
6: ; preds = %0
store i32 0, i32* %2
%7 = load i32, i32* %2
store i32 0, i32* %3
%8 = load i32, i32* %3
store i32 0, i32* %4
%9 = load i32, i32* %4
store i32 0, i32* %5
%10 = load i32, i32* %5
ret void
}

LLVM IR (-O2):
define void @f33() {
ret void
}
void test29_Blink4_targetInit__I() {}


x86 assembly (clang, -O0):
<test29_Blink4_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test29_Blink4_targetInit__I>:
ret

LLVM IR (-O0):
define void @test29_Blink4_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test29_Blink4_targetInit__I() {
ret void
}
int my_is_prime(int cute) {
  int i;
  i = 0;
  while (i < cute) {
    if (cute <= 1)
      return (0);
    if (cute % i == 0)
      return (0);
    i++;
  }
  return (1);
}


x86 assembly (clang, -O0):
<my_is_prime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    115a <my_is_prime+0x5a>
cmpl   $0x1,-0x8(%rbp)
jg     1130 <my_is_prime+0x30>
movl   $0x0,-0x4(%rbp)
jmp    1161 <my_is_prime+0x61>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    114c <my_is_prime+0x4c>
movl   $0x0,-0x4(%rbp)
jmp    1161 <my_is_prime+0x61>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <my_is_prime+0xe>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_is_prime>:
xor    %eax,%eax
cmp    $0x1,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @my_is_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %19, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %22
9: ; preds = %5
%10 = load i32, i32* %3
%11 = icmp sle i32 %10, 1
br i1 %11, label %12, label %13
12: ; preds = %9
store i32 0, i32* %2
br label %23
13: ; preds = %9
%14 = load i32, i32* %3
%15 = load i32, i32* %4
%16 = srem i32 %14, %15
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %13
store i32 0, i32* %2
br label %23
19: ; preds = %13
%20 = load i32, i32* %4
%21 = add nsw i32 %20, 1
store i32 %21, i32* %4
br label %5
22: ; preds = %5
store i32 1, i32* %2
br label %23
23: ; preds = %22, %18, %12
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @my_is_prime(i32 %0) {
%2 = icmp ne i32 %0, 1
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
char *rindex(char *, char);
char *basename(char *name) {
  char *base = rindex(name, '/');
  return base ? base + 1 : name;
}


x86 assembly (clang, -O0):
<basename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2f,%esi
call   1030 <rindex@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     114a <basename+0x3a>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1152 <basename+0x42>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<basename>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2f,%esi
call   1030 <rindex@plt>
lea    0x1(%rax),%rcx
test   %rax,%rax
cmove  %rbx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @basename(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @rindex(i8* %4, i8 signext 47)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 1
br label %13
11: ; preds = %1
%12 = load i8*, i8** %2
br label %13
13: ; preds = %11, %8
%14 = phi i8* [ %10, %8 ], [ %12, %11 ]
ret i8* %14
}

LLVM IR (-O2):
define i8* @basename(i8* %0) {
%2 = tail call i8* @rindex(i8* %0, i8 signext 47)
%3 = icmp eq i8* %2, null
%4 = getelementptr inbounds i8, i8* %2, i64 1
%5 = select i1 %3, i8* %0, i8* %4
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ mutter();
int del_loop(const char *device) {
  mutter();
  return 1;
}


x86 assembly (clang, -O0):
<del_loop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <mutter@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<del_loop>:
push   %rax
xor    %eax,%eax
call   1030 <mutter@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @del_loop(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @mutter()
ret i32 1
}

LLVM IR (-O2):
define i32 @del_loop(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @mutter()
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ STDIN_FILENO;
int /*<<< orphan*/ STDOUT_FILENO;
int /*<<< orphan*/ setfd_block(int /*<<< orphan*/);
void setfd_atexit(void) {
  setfd_block(STDIN_FILENO);
  setfd_block(STDOUT_FILENO);
  return;
}


x86 assembly (clang, -O0):
<setfd_atexit>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
call   1030 <setfd_block@plt>
mov    0x2ec7(%rip),%rax
mov    (%rax),%edi
call   1030 <setfd_block@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<setfd_atexit>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
call   1030 <setfd_block@plt>
mov    0x2eca(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1030 <setfd_block@plt>

LLVM IR (-O0):
@STDIN_FILENO = global i32 0
@STDOUT_FILENO = global i32 0
define void @setfd_atexit() {
%1 = load i32, i32* @STDIN_FILENO
%2 = call i32 @setfd_block(i32 %1)
%3 = load i32, i32* @STDOUT_FILENO
%4 = call i32 @setfd_block(i32 %3)
ret void
}

LLVM IR (-O2):
@STDIN_FILENO = global i32 0
@STDOUT_FILENO = global i32 0
define void @setfd_atexit() {
%1 = load i32, i32* @STDIN_FILENO
%2 = tail call i32 @setfd_block(i32 %1)
%3 = load i32, i32* @STDOUT_FILENO
%4 = tail call i32 @setfd_block(i32 %3)
ret void
}
int do_332() { return 332; }


x86 assembly (clang, -O0):
<do_332>:
push   %rbp
mov    %rsp,%rbp
mov    $0x14c,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_332>:
mov    $0x14c,%eax
ret

LLVM IR (-O0):
define i32 @do_332() {
ret i32 332
}

LLVM IR (-O2):
define i32 @do_332() {
ret i32 332
}
void acpi_gpio_dev_init(struct gpio_chip *gc, struct gpio_device *gdev) {}


x86 assembly (clang, -O0):
<acpi_gpio_dev_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<acpi_gpio_dev_init>:
ret

LLVM IR (-O0):
%struct.gpio_chip = type opaque
%struct.gpio_device = type opaque
define void @acpi_gpio_dev_init(%struct.gpio_chip* %0, %struct.gpio_device* %1) {
%3 = alloca %struct.gpio_chip*
%4 = alloca %struct.gpio_device*
store %struct.gpio_chip* %0, %struct.gpio_chip** %3
store %struct.gpio_device* %1, %struct.gpio_device** %4
ret void
}

LLVM IR (-O2):
%struct.gpio_chip = type opaque
%struct.gpio_device = type opaque
define void @acpi_gpio_dev_init(%struct.gpio_chip* nocapture %0, %struct.gpio_device* nocapture %1) {
ret void
}
/* Variables and functions */
char *getenv(char *);
int /*<<< orphan*/ printf(char *, char *);
int main(void) {
  char *s;
  s = getenv("PATH");
  printf("PATH = %s\n", s);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <getenv@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xebb(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <getenv@plt>
lea    0xed1(%rip),%rdi
mov    %rax,%rsi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"PATH\00"
@.str.1 = [11 x i8] c"PATH = %s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = call i8* @getenv(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
store i8* %3, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"PATH\00"
@.str.1 = [11 x i8] c"PATH = %s\0A\00"
define i32 @main() {
%1 = tail call i8* @getenv(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ TRUE;
int /*<<< orphan*/ cbreak();
int /*<<< orphan*/ initscr();
int /*<<< orphan*/ keypad(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ noecho();
int /*<<< orphan*/ stdscr;
int render_init() {
  initscr();
  cbreak();
  keypad(stdscr, TRUE);
  noecho();
  return 0;
}


x86 assembly (clang, -O0):
<render_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <initscr@plt>
mov    $0x0,%al
call   1030 <cbreak@plt>
mov    0x2e8f(%rip),%rax
mov    (%rax),%edi
mov    0x2e7e(%rip),%rax
mov    (%rax),%esi
call   1040 <keypad@plt>
mov    $0x0,%al
call   1060 <noecho@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<render_init>:
push   %rax
xor    %eax,%eax
call   1050 <initscr@plt>
xor    %eax,%eax
call   1030 <cbreak@plt>
mov    0x2e92(%rip),%rax
mov    (%rax),%edi
mov    0x2e81(%rip),%rax
mov    (%rax),%esi
call   1040 <keypad@plt>
xor    %eax,%eax
call   1060 <noecho@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stdscr = global i32 0
@TRUE = global i32 0
define i32 @render_init() {
%1 = call i32 (...) @initscr()
%2 = call i32 (...) @cbreak()
%3 = load i32, i32* @stdscr
%4 = load i32, i32* @TRUE
%5 = call i32 @keypad(i32 %3, i32 %4)
%6 = call i32 (...) @noecho()
ret i32 0
}

LLVM IR (-O2):
@stdscr = global i32 0
@TRUE = global i32 0
define i32 @render_init() {
%1 = tail call i32 (...) @initscr()
%2 = tail call i32 (...) @cbreak()
%3 = load i32, i32* @stdscr
%4 = load i32, i32* @TRUE
%5 = tail call i32 @keypad(i32 %3, i32 %4)
%6 = tail call i32 (...) @noecho()
ret i32 0
}
void wpas_p2p_deinit_iface(struct wpa_supplicant *wpa_s) {}


x86 assembly (clang, -O0):
<wpas_p2p_deinit_iface>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpas_p2p_deinit_iface>:
ret

LLVM IR (-O0):
%struct.wpa_supplicant = type opaque
define void @wpas_p2p_deinit_iface(%struct.wpa_supplicant* %0) {
%2 = alloca %struct.wpa_supplicant*
store %struct.wpa_supplicant* %0, %struct.wpa_supplicant** %2
ret void
}

LLVM IR (-O2):
%struct.wpa_supplicant = type opaque
define void @wpas_p2p_deinit_iface(%struct.wpa_supplicant* nocapture %0) {
ret void
}