xunge/DecIR huggingface dataset:
int volconvert(int level) {
  level >>= 14;
  level &= 3;
  switch (level) {
  case 0:
    return 0;
  case 1:
    return 1;
  case 2:
    return 4;
  case 3:
    return 5;
  }
  return 0;
}


x86 assembly (clang, -O0):
<volconvert>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sar    $0xe,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x3,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %rax,-0x10(%rbp)
sub    $0x3,%rax
ja     116e <volconvert+0x6e>
mov    -0x10(%rbp),%rax
lea    0xecb(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x0,-0x4(%rbp)
jmp    1175 <volconvert+0x75>
movl   $0x1,-0x4(%rbp)
jmp    1175 <volconvert+0x75>
movl   $0x4,-0x4(%rbp)
jmp    1175 <volconvert+0x75>
movl   $0x5,-0x4(%rbp)
jmp    1175 <volconvert+0x75>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<volconvert>:
shr    $0xe,%edi
and    $0x3,%edi
lea    0xef3(%rip),%rax
mov    (%rax,%rdi,4),%eax
ret

LLVM IR (-O0):
define i32 @volconvert(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = ashr i32 %4, 14
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = and i32 %6, 3
store i32 %7, i32* %3
%8 = load i32, i32* %3
switch i32 %8, label %13 [
i32 0, label %9
i32 1, label %10
i32 2, label %11
i32 3, label %12
]
9: ; preds = %1
store i32 0, i32* %2
br label %14
10: ; preds = %1
store i32 1, i32* %2
br label %14
11: ; preds = %1
store i32 4, i32* %2
br label %14
12: ; preds = %1
store i32 5, i32* %2
br label %14
13: ; preds = %1
store i32 0, i32* %2
br label %14
14: ; preds = %13, %12, %11, %10, %9
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
@switch.table.volconvert = [4 x i32] [i32 0, i32 1, i32 4, i32 5]
define i32 @volconvert(i32 %0) {
%2 = lshr i32 %0, 14
%3 = and i32 %2, 3
%4 = zext i32 %3 to i64
%5 = getelementptr inbounds [4 x i32], [4 x i32]* @switch.table.volconvert, i64 0, i64 %4
%6 = load i32, i32* %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ a(char *);
int main() {
  static char string[] = "Hello World\n";
  a(string);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0x2f02(%rip),%rdi
call   1030 <a@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0x2f10(%rip),%rdi
call   1030 <a@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@main.string = internal global [13 x i8] c"Hello World\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @a(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @main.string, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@main.string = internal global [13 x i8] c"Hello World\0A\00"
define i32 @main() {
%1 = tail call i32 @a(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @main.string, i64 0, i64 0))
ret i32 0
}
int judas_memunlock(void *start, unsigned size) { return 1; }


x86 assembly (clang, -O0):
<judas_memunlock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<judas_memunlock>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @judas_memunlock(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 1
}

LLVM IR (-O2):
define i32 @judas_memunlock(i8* nocapture readnone %0, i32 %1) {
ret i32 1
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int y;
};
struct TYPE_4__ {
  TYPE_1__ xconfigurerequest;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xconfigurerequest_y(void *_p, int _v) {
  ((XEvent *)_p)->xconfigurerequest.y = (int)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xconfigurerequest_y>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xconfigurerequest_y>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xconfigurerequest_y(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xconfigurerequest_y(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int potencia(int, int);
int fatorialExponencial(int n) {
  if (n <= 1)
    return potencia(1, 0);
  return potencia(n, fatorialExponencial(n - 1));
}


x86 assembly (clang, -O0):
<fatorialExponencial>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jg     1149 <fatorialExponencial+0x29>
mov    $0x1,%edi
xor    %esi,%esi
call   1040 <potencia@plt>
mov    %eax,-0x4(%rbp)
jmp    1167 <fatorialExponencial+0x47>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fatorialExponencial@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%esi
call   1040 <potencia@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fatorialExponencial>:
cmp    $0x1,%edi
jg     1131 <fatorialExponencial+0x11>
mov    $0x1,%edi
xor    %esi,%esi
jmp    1040 <potencia@plt>
push   %rbx
mov    %edi,%ebx
lea    -0x1(%rbx),%edi
call   1030 <fatorialExponencial@plt>
mov    %ebx,%edi
mov    %eax,%esi
pop    %rbx
jmp    1040 <potencia@plt>

LLVM IR (-O0):
define i32 @fatorialExponencial(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @potencia(i32 1, i32 0)
store i32 %7, i32* %2
br label %14
8: ; preds = %1
%9 = load i32, i32* %3
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 1
%12 = call i32 @fatorialExponencial(i32 %11)
%13 = call i32 @potencia(i32 %9, i32 %12)
store i32 %13, i32* %2
br label %14
14: ; preds = %8, %6
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @fatorialExponencial(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = tail call i32 @potencia(i32 1, i32 0)
br label %5
5: ; preds = %3, %7
%6 = phi i32 [ %10, %7 ], [ %4, %3 ]
ret i32 %6
7: ; preds = %1
%8 = add nsw i32 %0, -1
%9 = tail call i32 @fatorialExponencial(i32 %8)
%10 = tail call i32 @potencia(i32 %0, i32 %9)
br label %5
}
void nn_xpush_in(struct nn_sockbase *self, struct nn_pipe *pipe) {}


x86 assembly (clang, -O0):
<nn_xpush_in>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nn_xpush_in>:
ret

LLVM IR (-O0):
%struct.nn_sockbase = type opaque
%struct.nn_pipe = type opaque
define void @nn_xpush_in(%struct.nn_sockbase* %0, %struct.nn_pipe* %1) {
%3 = alloca %struct.nn_sockbase*
%4 = alloca %struct.nn_pipe*
store %struct.nn_sockbase* %0, %struct.nn_sockbase** %3
store %struct.nn_pipe* %1, %struct.nn_pipe** %4
ret void
}

LLVM IR (-O2):
%struct.nn_sockbase = type opaque
%struct.nn_pipe = type opaque
define void @nn_xpush_in(%struct.nn_sockbase* nocapture %0, %struct.nn_pipe* nocapture %1) {
ret void
}
double times2(double x) { return x * 2; }


x86 assembly (clang, -O0):
<times2>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<times2>:
addsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @times2(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 2.000000e+00
ret double %4
}

LLVM IR (-O2):
define double @times2(double %0) {
%2 = fmul double %0, 2.000000e+00
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int, char *, int, int *);
int getpid();
int /*<<< orphan*/ stderr;
void done_write_lock(int *lk) {
  ;
  ;
  if (*lk != -1) {
    fprintf(stderr, "sync.c: pid=%d   %s    %d at %p   UNBALANCED\n", getpid(),
            "done_write_lock", *lk, lk);
  }
  *lk = 0;
  ;
  ;
}


x86 assembly (clang, -O0):
<done_write_lock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0xffffffff,(%rax)
je     116f <done_write_lock+0x4f>
mov    0x2ea0(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%edx
mov    -0x8(%rbp),%rax
mov    (%rax),%r8d
mov    -0x8(%rbp),%r9
lea    0xe9d(%rip),%rsi
lea    0xec4(%rip),%rcx
call   1040 <fprintf@plt>
mov    -0x8(%rbp),%rax
movl   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<done_write_lock>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
cmpl   $0xffffffff,(%rdi)
je     1158 <done_write_lock+0x38>
mov    0x2eae(%rip),%rax
mov    (%rax),%ebp
xor    %eax,%eax
call   1030 <getpid@plt>
mov    (%rbx),%r8d
lea    0xebb(%rip),%rsi
lea    0xee2(%rip),%rcx
mov    %ebp,%edi
mov    %eax,%edx
mov    %rbx,%r9
call   1040 <fprintf@plt>
movl   $0x0,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [46 x i8] c"sync.c: pid=%d %s %d at %p UNBALANCED\0A\00"
@.str.1 = [16 x i8] c"done_write_lock\00"
define void @done_write_lock(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, -1
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load i32, i32* @stderr
%8 = call i32 (...) @getpid()
%9 = load i32*, i32** %2
%10 = load i32, i32* %9
%11 = load i32*, i32** %2
%12 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i32 %8, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i32 %10, i32* %11)
br label %13
13: ; preds = %6, %1
%14 = load i32*, i32** %2
store i32 0, i32* %14
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [46 x i8] c"sync.c: pid=%d %s %d at %p UNBALANCED\0A\00"
@.str.1 = [16 x i8] c"done_write_lock\00"
define void @done_write_lock(i32* %0) {
%2 = load i32, i32* %0
%3 = icmp eq i32 %2, -1
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 (...) @getpid()
%7 = load i32, i32* %0
%8 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i32 %6, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i32 %7, i32* %0)
br label %9
9: ; preds = %4, %1
store i32 0, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ start_ccw(int, int, int, void *);
int /*<<< orphan*/ strcpy(char *, char const *);
void ccw_load_display(const char *msg) {
  char _msg[24] = {0x20};
  strcpy(&_msg[1], msg);
  start_ccw(0x9f, 0x20, 0x11, (void *)_msg);
}


x86 assembly (clang, -O0):
<ccw_load_display>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0xecd(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    -0x20(%rbp),%rdi
add    $0x1,%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
lea    -0x20(%rbp),%rcx
mov    $0x9f,%edi
mov    $0x20,%esi
mov    $0x11,%edx
call   1040 <start_ccw@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccw_load_display>:
sub    $0x18,%rsp
mov    %rdi,%rsi
mov    0xee2(%rip),%rax
mov    %rax,0x10(%rsp)
movaps 0xec6(%rip),%xmm0
movaps %xmm0,(%rsp)
lea    0x1(%rsp),%rdi
call   1030 <strcpy@plt>
mov    %rsp,%rcx
mov    $0x9f,%edi
mov    $0x20,%esi
mov    $0x11,%edx
call   1040 <start_ccw@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.ccw_load_display._msg = <{ i8, [23 x i8] }> <{ i8 32, [23 x i8] zeroinitializer }>
define void @ccw_load_display(i8* %0) {
%2 = alloca i8*
%3 = alloca [24 x i8]
store i8* %0, i8** %2
%4 = bitcast [24 x i8]* %3 to i8*
%5 = getelementptr inbounds [24 x i8], [24 x i8]* %3, i64 0, i64 1
%6 = load i8*, i8** %2
%7 = call i32 @strcpy(i8* %5, i8* %6)
%8 = getelementptr inbounds [24 x i8], [24 x i8]* %3, i64 0, i64 0
%9 = call i32 @start_ccw(i32 159, i32 32, i32 17, i8* %8)
ret void
}

LLVM IR (-O2):
@__const.ccw_load_display._msg = <{ i8, [23 x i8] }> <{ i8 32, [23 x i8] zeroinitializer }>
define void @ccw_load_display(i8* %0) {
%2 = alloca [24 x i8]
%3 = getelementptr inbounds [24 x i8], [24 x i8]* %2, i64 0, i64 0
%4 = getelementptr inbounds [24 x i8], [24 x i8]* %2, i64 0, i64 1
%5 = call i32 @strcpy(i8* %4, i8* %0)
%6 = call i32 @start_ccw(i32 159, i32 32, i32 17, i8* %3)
ret void
}
void revinplc4(void *in) {
  __asm__("bswap %0" : "=r"(*(unsigned int *)in) : "0"(*(unsigned int *)in));
}


x86 assembly (clang, -O0):
<revinplc4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
bswap  %ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<revinplc4>:
mov    (%rdi),%eax
bswap  %eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @revinplc4(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i8*, i8** %2
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = call i32 asm "bswap $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %7)
store i32 %8, i32* %4
ret void
}

LLVM IR (-O2):
define void @revinplc4(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 asm "bswap $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %3)
store i32 %4, i32* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/);
int /*<<< orphan*/ fopen(char *, char *);
void newPhoneFile(char *name) { fclose(fopen(name, "w")); }


x86 assembly (clang, -O0):
<newPhoneFile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec9(%rip),%rsi
call   1040 <fopen@plt>
mov    %eax,%edi
call   1030 <fclose@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<newPhoneFile>:
push   %rax
lea    0xed8(%rip),%rsi
call   1040 <fopen@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <fclose@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"w\00"
define void @newPhoneFile(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @fopen(i8* %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @fclose(i32 %4)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"w\00"
define void @newPhoneFile(i8* %0) {
%2 = tail call i32 @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @fclose(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char const *, int);
void ft_putstr_fd(char const *str, int fd) {
  char const *ptr = str;
  while (*ptr != '\0')
    ++ptr;
  write(fd, str, ptr - str);
}


x86 assembly (clang, -O0):
<ft_putstr_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1148 <ft_putstr_fd+0x38>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1127 <ft_putstr_fd+0x17>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
mov    %eax,%edx
call   1030 <write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putstr_fd>:
mov    %esi,%eax
mov    %rdi,%rsi
xor    %edx,%edx
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,(%rsi,%rdx,1)
lea    0x1(%rdx),%rdx
jne    1120 <ft_putstr_fd+0x10>
add    $0xffffffff,%edx
mov    %eax,%edi
jmp    1030 <write@plt>

LLVM IR (-O0):
define void @ft_putstr_fd(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %12, %2
%8 = load i8*, i8** %5
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %7
%13 = load i8*, i8** %5
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %5
br label %7
15: ; preds = %7
%16 = load i32, i32* %4
%17 = load i8*, i8** %3
%18 = load i8*, i8** %5
%19 = load i8*, i8** %3
%20 = ptrtoint i8* %18 to i64
%21 = ptrtoint i8* %19 to i64
%22 = sub i64 %20, %21
%23 = trunc i64 %22 to i32
%24 = call i32 @write(i32 %16, i8* %17, i32 %23)
ret void
}

LLVM IR (-O2):
define void @ft_putstr_fd(i8* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %7, %3 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %6, label %8, label %3
8: ; preds = %3
%9 = ptrtoint i8* %4 to i64
%10 = ptrtoint i8* %0 to i64
%11 = sub i64 %9, %10
%12 = trunc i64 %11 to i32
%13 = tail call i32 @write(i32 %1, i8* %0, i32 %12)
ret void
}
const char *nodemenu_format_info(void) {
  return ("\n* Menu:\n  (File)Node                        Lines   Size   "
          "Containing File\n  ----------                        -----   ----   "
          "---------------");
}


x86 assembly (clang, -O0):
<nodemenu_format_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nodemenu_format_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [143 x i8] c"\0A* Menu:\0A (File)Node Lines Size Containing File\0A ---------- ----- ---- ---------------\00"
define i8* @nodemenu_format_info() {
ret i8* getelementptr inbounds ([143 x i8], [143 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [143 x i8] c"\0A* Menu:\0A (File)Node Lines Size Containing File\0A ---------- ----- ---- ---------------\00"
define i8* @nodemenu_format_info() {
ret i8* getelementptr inbounds ([143 x i8], [143 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ psint();
void ps() { psint(); }


x86 assembly (clang, -O0):
<ps>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <psint@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps>:
xor    %eax,%eax
jmp    1030 <psint@plt>

LLVM IR (-O0):
define void @ps() {
%1 = call i32 (...) @psint()
ret void
}

LLVM IR (-O2):
define void @ps() {
%1 = tail call i32 (...) @psint()
ret void
}
/* Variables and functions */
char *format_initial_capital_delimiter(char *, char *, char, int);
char *format_initial_capital(char *destination, char *string) {
  return format_initial_capital_delimiter(destination, string, ' ', 1);
}


x86 assembly (clang, -O0):
<format_initial_capital>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x20,%edx
mov    $0x1,%ecx
call   1030 <format_initial_capital_delimiter@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<format_initial_capital>:
mov    $0x20,%edx
mov    $0x1,%ecx
jmp    1030 <format_initial_capital_delimiter@plt>

LLVM IR (-O0):
define i8* @format_initial_capital(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @format_initial_capital_delimiter(i8* %5, i8* %6, i8 signext 32, i32 1)
ret i8* %7
}

LLVM IR (-O2):
define i8* @format_initial_capital(i8* %0, i8* %1) {
%3 = tail call i8* @format_initial_capital_delimiter(i8* %0, i8* %1, i8 signext 32, i32 1)
ret i8* %3
}
void init_serial1(unsigned long baudrate) {
  unsigned long Fdiv;
  (*(volatile unsigned long *)(0xE002C000 + 0x00)) |= (1 << 16) | (1 << 18);
  (*(volatile unsigned long *)(0xE0010000 + 0x0C)) = 0x83;
  Fdiv = ((12000000 * 5) / 16) / baudrate;
  (*(volatile unsigned long *)(0xE0010000 + 0x04)) = Fdiv / 256;
  (*(volatile unsigned long *)(0xE0010000 + 0x00)) = Fdiv % 256;
  (*(volatile unsigned long *)(0xE0010000 + 0x0C)) = 0x03;
}


x86 assembly (clang, -O0):
<init_serial1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xe002c000,%eax
mov    (%rax),%rcx
or     $0x50000,%rcx
mov    $0xe002c000,%eax
mov    %rcx,(%rax)
mov    $0xe001000c,%eax
movq   $0x83,(%rax)
mov    $0x393870,%eax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
shr    $0x8,%rcx
mov    $0xe0010004,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rcx
and    $0xff,%rcx
mov    $0xe0010000,%eax
mov    %rcx,(%rax)
mov    $0xe001000c,%eax
movq   $0x3,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_serial1>:
mov    $0xe001000c,%ecx
orq    $0x50000,0x1bff4(%rcx)
movq   $0x83,(%rcx)
cmp    $0x393870,%rdi
ja     112b <init_serial1+0x2b>
mov    $0x393870,%eax
xor    %edx,%edx
div    %edi
jmp    112d <init_serial1+0x2d>
xor    %eax,%eax
mov    %rax,%rdx
shr    $0x8,%rdx
mov    %rdx,-0x8(%rcx)
movzbl %al,%eax
mov    %rax,-0xc(%rcx)
movq   $0x3,(%rcx)
ret

LLVM IR (-O0):
define void @init_serial1(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 3758276608 to i64*)
%5 = or i64 %4, 327680
store volatile i64 %5, i64* inttoptr (i64 3758276608 to i64*)
store volatile i64 131, i64* inttoptr (i64 3758161932 to i64*)
%6 = load i64, i64* %2
%7 = udiv i64 3750000, %6
store i64 %7, i64* %3
%8 = load i64, i64* %3
%9 = udiv i64 %8, 256
store volatile i64 %9, i64* inttoptr (i64 3758161924 to i64*)
%10 = load i64, i64* %3
%11 = urem i64 %10, 256
store volatile i64 %11, i64* inttoptr (i64 3758161920 to i64*)
store volatile i64 3, i64* inttoptr (i64 3758161932 to i64*)
ret void
}

LLVM IR (-O2):
define void @init_serial1(i64 %0) {
%2 = load volatile i64, i64* inttoptr (i64 3758276608 to i64*)
%3 = or i64 %2, 327680
store volatile i64 %3, i64* inttoptr (i64 3758276608 to i64*)
store volatile i64 131, i64* inttoptr (i64 3758161932 to i64*)
%4 = udiv i64 3750000, %0
%5 = lshr i64 %4, 8
store volatile i64 %5, i64* inttoptr (i64 3758161924 to i64*)
%6 = and i64 %4, 255
store volatile i64 %6, i64* inttoptr (i64 3758161920 to i64*)
store volatile i64 3, i64* inttoptr (i64 3758161932 to i64*)
ret void
}
double semiLinear(double md, double p, double n) {
  if (md > 0)
    return md * p;
  else
    return md * n;
}


x86 assembly (clang, -O0):
<semiLinear>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  %xmm2,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    1139 <semiLinear+0x39>
movsd  -0x10(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1148 <semiLinear+0x48>
movsd  -0x10(%rbp),%xmm0
mulsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<semiLinear>:
xorpd  %xmm3,%xmm3
cmpltsd %xmm0,%xmm3
andpd  %xmm3,%xmm1
andnpd %xmm2,%xmm3
orpd   %xmm1,%xmm3
mulsd  %xmm3,%xmm0
ret

LLVM IR (-O0):
define double @semiLinear(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
%8 = load double, double* %5
%9 = fcmp ogt double %8, 0.000000e+00
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load double, double* %5
%12 = load double, double* %6
%13 = fmul double %11, %12
store double %13, double* %4
br label %18
14: ; preds = %3
%15 = load double, double* %5
%16 = load double, double* %7
%17 = fmul double %15, %16
store double %17, double* %4
br label %18
18: ; preds = %14, %10
%19 = load double, double* %4
ret double %19
}

LLVM IR (-O2):
define double @semiLinear(double %0, double %1, double %2) {
%4 = fcmp ogt double %0, 0.000000e+00
%5 = select i1 %4, double %1, double %2
%6 = fmul double %5, %0
ret double %6
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;
typedef int /*<<< orphan*/ mask;

/* Variables and functions */
int /*<<< orphan*/ memset(int /*<<< orphan*/ *, int /*<<< orphan*/, int);
int signalfd(int /*<<< orphan*/, int /*<<< orphan*/ *, int /*<<< orphan*/);
int main(void) {
  sigset_t mask;
  (void)memset(&mask, 0, sizeof(mask));
  return signalfd(0, &mask, 0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
xor    %edx,%edx
lea    -0x8(%rbp),%rsi
mov    %edx,%edi
call   1040 <signalfd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
xor    %edi,%edi
mov    %rbx,%rsi
xor    %edx,%edx
call   1040 <signalfd@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @memset(i32* %2, i32 0, i32 4)
%4 = call i32 @signalfd(i32 0, i32* %2, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @memset(i32* %1, i32 0, i32 4)
%4 = call i32 @signalfd(i32 0, i32* %1, i32 0)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char *, int);
void ft_generic(void) {
  char *melody;
  melody = "Tu tu tu tu ; Tu tu tu tu\n";
  write(1, melody, 26);
}


x86 assembly (clang, -O0):
<ft_generic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x1,%edi
mov    $0x1a,%edx
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_generic>:
lea    0xee9(%rip),%rsi
mov    $0x1,%edi
mov    $0x1a,%edx
jmp    1030 <write@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"Tu tu tu tu ; Tu tu tu tu\0A\00"
define void @ft_generic() {
%1 = alloca i8*
store i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = call i32 @write(i32 1, i8* %2, i32 26)
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"Tu tu tu tu ; Tu tu tu tu\0A\00"
define void @ft_generic() {
%1 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 26)
ret void
}
long int(labs)(long int value) { return value < 0 ? -value : value; }


x86 assembly (clang, -O0):
<labs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jge    1122 <labs+0x22>
xor    %eax,%eax
sub    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    112a <labs+0x2a>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<labs>:
mov    %rdi,%rax
neg    %rax
cmovs  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @labs(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp slt i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i64, i64* %2
%7 = sub nsw i64 0, %6
br label %10
8: ; preds = %1
%9 = load i64, i64* %2
br label %10
10: ; preds = %8, %5
%11 = phi i64 [ %7, %5 ], [ %9, %8 ]
ret i64 %11
}

LLVM IR (-O2):
define i64 @labs(i64 %0) {
%2 = tail call i64 @llvm.abs.i64(i64 %0, i1 true)
ret i64 %2
}
long trio_to_long(const char *string, char **endp, int base) {
  assert(string);
  assert((base >= 2) && (base <= 36));
  return strtol(string, endp, base);
}


x86 assembly (clang, -O0):
<trio_to_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <assert@plt>
xor    %eax,%eax
cmpl   $0x2,-0x14(%rbp)
mov    %al,-0x15(%rbp)
jl     1157 <trio_to_long+0x37>
cmpl   $0x24,-0x14(%rbp)
setle  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
mov    $0x0,%al
call   1030 <assert@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <strtol@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trio_to_long>:
push   %r15
push   %r14
push   %rbx
mov    %edx,%r15d
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <assert@plt>
lea    -0x2(%r15),%eax
xor    %edi,%edi
cmp    $0x23,%eax
setb   %dil
xor    %eax,%eax
call   1030 <assert@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15d,%edx
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <strtol@plt>

LLVM IR (-O0):
define i64 @trio_to_long(i8* %0, i8** %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i32
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = call i32 (i8*, ...) bitcast (i32 (...)* @assert to i32 (i8*, ...)*)(i8* %7)
%9 = load i32, i32* %6
%10 = icmp sge i32 %9, 2
br i1 %10, label %11, label %14
11: ; preds = %3
%12 = load i32, i32* %6
%13 = icmp sle i32 %12, 36
br label %14
14: ; preds = %11, %3
%15 = phi i1 [ false, %3 ], [ %13, %11 ]
%16 = zext i1 %15 to i32
%17 = call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 %16)
%18 = load i8*, i8** %4
%19 = load i8**, i8*** %5
%20 = load i32, i32* %6
%21 = call i64 @strtol(i8* %18, i8** %19, i32 %20)
ret i64 %21
}

LLVM IR (-O2):
define i64 @trio_to_long(i8* %0, i8** nocapture %1, i32 %2) {
%4 = tail call i32 (i8*, ...) bitcast (i32 (...)* @assert to i32 (i8*, ...)*)(i8* %0)
%5 = add i32 %2, -2
%6 = icmp ult i32 %5, 35
%7 = zext i1 %6 to i32
%8 = tail call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 %7)
%9 = tail call i64 @strtol(i8* %0, i8** %1, i32 %2)
ret i64 %9
}
/* Type definitions */
typedef int uint64_t;
typedef int uint32_t;

/* Variables and functions */
uint64_t rotateLeft64(uint64_t x, uint32_t n) {
  return (x << (n & 63)) | (x >> (64 - (n & 63)));
}


x86 assembly (clang, -O0):
<rotateLeft64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
and    $0x3f,%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%esi
and    $0x3f,%esi
mov    $0x40,%ecx
sub    %esi,%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotateLeft64>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
and    $0x3f,%cl
neg    %cl
sar    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rotateLeft64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = and i32 %6, 63
%8 = shl i32 %5, %7
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = and i32 %10, 63
%12 = sub nsw i32 64, %11
%13 = ashr i32 %9, %12
%14 = or i32 %8, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @rotateLeft64(i32 %0, i32 %1) {
%3 = and i32 %1, 63
%4 = shl i32 %0, %3
%5 = sub nuw nsw i32 64, %3
%6 = ashr i32 %0, %5
%7 = or i32 %6, %4
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ *get_tabuleiro();
void verifica_pre_condicao() {
  assert(get_tabuleiro() == NULL &&
         "test_cria_tabuleiro / tabuleiro inicia null");
}


x86 assembly (clang, -O0):
<verifica_pre_condicao>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <get_tabuleiro@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x1(%rbp)
jne    114b <verifica_pre_condicao+0x2b>
mov    $0x1,%al
mov    %al,-0x1(%rbp)
jmp    114b <verifica_pre_condicao+0x2b>
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<verifica_pre_condicao>:
push   %rax
xor    %eax,%eax
call   1030 <get_tabuleiro@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
pop    %rax
jmp    1040 <assert@plt>

LLVM IR (-O0):
@.str = [44 x i8] c"test_cria_tabuleiro / tabuleiro inicia null\00"
define void @verifica_pre_condicao() {
%1 = call i32* (...) @get_tabuleiro()
%2 = icmp eq i32* %1, null
br i1 %2, label %3, label %4
3: ; preds = %0
br label %4
4: ; preds = %3, %0
%5 = phi i1 [ false, %0 ], [ true, %3 ]
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
ret void
}

LLVM IR (-O2):
define void @verifica_pre_condicao() {
%1 = tail call i32* (...) @get_tabuleiro()
%2 = icmp eq i32* %1, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
ret void
}
/* Variables and functions */
int isum2(int, int);
int isum3(int a, int b, int c) { return isum2(a, b) + c; }


x86 assembly (clang, -O0):
<isum3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <isum2@plt>
add    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isum3>:
push   %rbx
mov    %edx,%ebx
call   1030 <isum2@plt>
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isum3(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = call i32 @isum2(i32 %7, i32 %8)
%10 = load i32, i32* %6
%11 = add nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @isum3(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @isum2(i32 %0, i32 %1)
%5 = add nsw i32 %4, %2
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ funct_one();
void wrapper1() { funct_one(); }


x86 assembly (clang, -O0):
<wrapper1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <funct_one@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper1>:
xor    %eax,%eax
jmp    1030 <funct_one@plt>

LLVM IR (-O0):
define void @wrapper1() {
%1 = call i32 (...) @funct_one()
ret void
}

LLVM IR (-O2):
define void @wrapper1() {
%1 = tail call i32 (...) @funct_one()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ put32(unsigned int);
int /*<<< orphan*/ put8(int);
void add_reg32_imm32(unsigned int reg32, unsigned int imm32) {
  put8(0x81);
  put8(0xC0 + reg32);
  put32(imm32);
}


x86 assembly (clang, -O0):
<add_reg32_imm32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x81,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%edi
add    $0xc0,%edi
call   1030 <put8@plt>
mov    -0x8(%rbp),%edi
call   1040 <put32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_reg32_imm32>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x81,%edi
call   1030 <put8@plt>
add    $0xc0,%ebp
mov    %ebp,%edi
call   1030 <put8@plt>
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <put32@plt>

LLVM IR (-O0):
define void @add_reg32_imm32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @put8(i32 129)
%6 = load i32, i32* %3
%7 = add i32 192, %6
%8 = call i32 @put8(i32 %7)
%9 = load i32, i32* %4
%10 = call i32 @put32(i32 %9)
ret void
}

LLVM IR (-O2):
define void @add_reg32_imm32(i32 %0, i32 %1) {
%3 = tail call i32 @put8(i32 129)
%4 = add i32 %0, 192
%5 = tail call i32 @put8(i32 %4)
%6 = tail call i32 @put32(i32 %1)
ret void
}
void gtk_text_iter_editable() {}


x86 assembly (clang, -O0):
<gtk_text_iter_editable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_iter_editable>:
ret

LLVM IR (-O0):
define void @gtk_text_iter_editable() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_iter_editable() {
ret void
}
int cmpfn(const void *a, const void *b) {
  const unsigned int *ia = (const unsigned int *)a;
  const unsigned int *ib = (const unsigned int *)b;
  return *ia - *ib;
}


x86 assembly (clang, -O0):
<cmpfn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmpfn>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @cmpfn(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %5
%12 = load i32, i32* %11
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = sub i32 %12, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @cmpfn(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub i32 %5, %6
ret i32 %7
}
/* Type definitions */
struct timeval {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int gettimeofday(struct timeval *tv, void *tz) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<gettimeofday>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ed5(%rip),%rax
mov    (%rax),%ecx
mov    0x2ebc(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gettimeofday>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.timeval = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @gettimeofday(%struct.timeval* %0, i8* %1) {
%3 = alloca %struct.timeval*
%4 = alloca i8*
store %struct.timeval* %0, %struct.timeval** %3
store i8* %1, i8** %4
%5 = load i32, i32* @ENOSYS
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @gettimeofday(%struct.timeval* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int s, i, t[] = {0, 1, 2, 3, 4, 5};
  s = 1;
  for (i = 2; i < 6; i += i + 1)
    s += t[i];
  printf("%d", s);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xed7(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xed4(%rip),%rax
mov    %rax,-0x20(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
cmpl   $0x6,-0xc(%rbp)
jge    1177 <main+0x67>
movslq -0xc(%rbp),%rax
mov    -0x30(%rbp,%rax,4),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    114e <main+0x3e>
mov    -0x8(%rbp),%esi
lea    0xe97(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.main.t = [6 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5]
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca [6 x i32]
store i32 0, i32* %1
%5 = bitcast [6 x i32]* %4 to i8*
store i32 1, i32* %2
store i32 2, i32* %3
br label %6
6: ; preds = %16, %0
%7 = load i32, i32* %3
%8 = icmp slt i32 %7, 6
br i1 %8, label %9, label %21
9: ; preds = %6
%10 = load i32, i32* %3
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds [6 x i32], [6 x i32]* %4, i64 0, i64 %11
%13 = load i32, i32* %12
%14 = load i32, i32* %2
%15 = add nsw i32 %14, %13
store i32 %15, i32* %2
br label %16
16: ; preds = %9
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 1
%19 = load i32, i32* %3
%20 = add nsw i32 %19, %18
store i32 %20, i32* %3
br label %6
21: ; preds = %6
%22 = load i32, i32* %2
%23 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %22)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 8)
ret i32 0
}
void av_dirac_parse_sequence_header() {}


x86 assembly (clang, -O0):
<av_dirac_parse_sequence_header>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_dirac_parse_sequence_header>:
ret

LLVM IR (-O0):
define void @av_dirac_parse_sequence_header() {
ret void
}

LLVM IR (-O2):
define void @av_dirac_parse_sequence_header() {
ret void
}
unsigned sar(unsigned n, int shamt) {
  unsigned mask;
  mask = (n & 0x80000000) ? ~((unsigned)0xFFFFFFFF >> shamt) : 0x00000000;
  return mask | (n >> shamt);
}


x86 assembly (clang, -O0):
<sar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x80000000,%eax
cmp    $0x0,%eax
je     1130 <sar+0x30>
mov    -0x8(%rbp),%ecx
mov    $0xffffffff,%eax
shr    %cl,%eax
xor    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    113a <sar+0x3a>
xor    %eax,%eax
mov    %eax,-0x10(%rbp)
jmp    113a <sar+0x3a>
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
shr    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sar>:
mov    %esi,%ecx
mov    $0xffffffff,%edx
shr    %cl,%edx
not    %edx
mov    %edi,%eax
sar    $0x1f,%eax
and    %edx,%eax
shr    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @sar(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = and i32 %6, -2147483648
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i32, i32* %4
%11 = lshr i32 -1, %10
%12 = xor i32 %11, -1
br label %14
13: ; preds = %2
br label %14
14: ; preds = %13, %9
%15 = phi i32 [ %12, %9 ], [ 0, %13 ]
store i32 %15, i32* %5
%16 = load i32, i32* %5
%17 = load i32, i32* %3
%18 = load i32, i32* %4
%19 = lshr i32 %17, %18
%20 = or i32 %16, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @sar(i32 %0, i32 %1) {
%3 = lshr i32 -1, %1
%4 = xor i32 %3, -1
%5 = icmp slt i32 %0, 0
%6 = select i1 %5, i32 %4, i32 0
%7 = lshr i32 %0, %1
%8 = or i32 %6, %7
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0x04() {
  Assert_real((isdigit(4) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              25, ("isdigit should be 0 for 0x04"));
}


x86 assembly (clang, -O0):
<t_isdigit_0x04>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x19,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0x04>:
push   %rax
mov    $0x4,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x19,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0x04\00"
define void @t_isdigit_0x04() {
%1 = call i64 @isdigit(i32 4)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 25, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0x04\00"
define void @t_isdigit_0x04() {
%1 = tail call i64 @isdigit(i32 4)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 25, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void DisableVectorInt(char Vector) {
  (*((volatile unsigned long *)0xFFFFF014)) |= (1 << Vector);
}


x86 assembly (clang, -O0):
<DisableVectorInt>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    $0xfffff014,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0xfffff014,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<DisableVectorInt>:
mov    %edi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    $0xfffff014,%ecx
or     %rax,(%rcx)
ret

LLVM IR (-O0):
define void @DisableVectorInt(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = shl i32 1, %4
%6 = sext i32 %5 to i64
%7 = load volatile i64, i64* inttoptr (i64 4294963220 to i64*)
%8 = or i64 %7, %6
store volatile i64 %8, i64* inttoptr (i64 4294963220 to i64*)
ret void
}

LLVM IR (-O2):
define void @DisableVectorInt(i8 signext %0) {
%2 = zext i8 %0 to i32
%3 = shl nuw i32 1, %2
%4 = sext i32 %3 to i64
%5 = load volatile i64, i64* inttoptr (i64 4294963220 to i64*)
%6 = or i64 %5, %4
store volatile i64 %6, i64* inttoptr (i64 4294963220 to i64*)
ret void
}
/* Variables and functions */
scalar_t__ errno;
int /*<<< orphan*/ fputc(char, int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char const *, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char const *);
int /*<<< orphan*/ stderr;
void dv_warn(const char *message) {
  fputs("Warning: ", stderr);
  if (errno) {
    perror(message);
  } else {
    fputs(message, stderr);
    fputc('\n', stderr);
  }
}


x86 assembly (clang, -O0):
<dv_warn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e9d(%rip),%rax
mov    (%rax),%esi
lea    0xeb4(%rip),%rdi
call   1030 <fputs@plt>
mov    0x2e80(%rip),%rax
cmpq   $0x0,(%rax)
je     1170 <dv_warn+0x40>
mov    -0x8(%rbp),%rdi
call   1050 <perror@plt>
jmp    1195 <dv_warn+0x65>
mov    -0x8(%rbp),%rdi
mov    0x2e65(%rip),%rax
mov    (%rax),%esi
call   1030 <fputs@plt>
mov    0x2e57(%rip),%rax
mov    (%rax),%esi
mov    $0xa,%edi
call   1040 <fputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dv_warn>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2ea2(%rip),%r14
mov    (%r14),%esi
lea    0xeb8(%rip),%rdi
call   1030 <fputs@plt>
mov    0x2e84(%rip),%rax
cmpq   $0x0,(%rax)
jne    1179 <dv_warn+0x49>
mov    (%r14),%esi
mov    %rbx,%rdi
call   1030 <fputs@plt>
mov    (%r14),%esi
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <fputc@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1050 <perror@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"Warning: \00"
@stderr = global i32 0
@errno = global i64 0
define void @dv_warn(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = call i32 @fputs(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i64, i64* @errno
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = call i32 @perror(i8* %8)
br label %16
10: ; preds = %1
%11 = load i8*, i8** %2
%12 = load i32, i32* @stderr
%13 = call i32 @fputs(i8* %11, i32 %12)
%14 = load i32, i32* @stderr
%15 = call i32 @fputc(i8 signext 10, i32 %14)
br label %16
16: ; preds = %10, %7
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"Warning: \00"
@stderr = global i32 0
@errno = global i64 0
define void @dv_warn(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fputs(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = load i64, i64* @errno
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @perror(i8* %0)
br label %13
8: ; preds = %1
%9 = load i32, i32* @stderr
%10 = tail call i32 @fputs(i8* %0, i32 %9)
%11 = load i32, i32* @stderr
%12 = tail call i32 @fputc(i8 signext 10, i32 %11)
br label %13
13: ; preds = %8, %6
ret void
}