#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
struct sCC1101PhyInfo {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ CC1101Read(struct sCC1101PhyInfo *, unsigned char,
                              unsigned char *, int);
unsigned char
CC1101GetRegisterWithSpiSyncProblem(struct sCC1101PhyInfo *phyInfo,
                                    unsigned char address) {
  unsigned char i;
  unsigned char state[4];
  for (i = 0; i < 4; i++) {
    CC1101Read(phyInfo, address, (unsigned char *)&state[i], 1);
    if ((i > 0) && (state[i] == state[i - 1])) {
      break;
    }
  }
  return state[i];
}


x86 assembly (clang, -O0):
<CC1101GetRegisterWithSpiSyncProblem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movb   $0x0,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
cmp    $0x4,%eax
jge    1196 <CC1101GetRegisterWithSpiSyncProblem+0x86>
mov    -0x8(%rbp),%rdi
mov    -0x9(%rbp),%al
movzbl -0xa(%rbp),%ecx
lea    -0xe(%rbp),%rdx
add    %rcx,%rdx
mov    $0x1,%ecx
movzbl %al,%esi
call   1030 <CC1101Read@plt>
movzbl -0xa(%rbp),%eax
cmp    $0x0,%eax
jle    1184 <CC1101GetRegisterWithSpiSyncProblem+0x74>
movzbl -0xa(%rbp),%eax
movzbl -0xe(%rbp,%rax,1),%eax
movzbl -0xa(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movzbl -0xe(%rbp,%rcx,1),%ecx
cmp    %ecx,%eax
jne    1184 <CC1101GetRegisterWithSpiSyncProblem+0x74>
jmp    1196 <CC1101GetRegisterWithSpiSyncProblem+0x86>
jmp    1189 <CC1101GetRegisterWithSpiSyncProblem+0x79>
mov    -0xa(%rbp),%al
add    $0x1,%al
mov    %al,-0xa(%rbp)
jmp    1126 <CC1101GetRegisterWithSpiSyncProblem+0x16>
movzbl -0xa(%rbp),%eax
movzbl -0xe(%rbp,%rax,1),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC1101GetRegisterWithSpiSyncProblem>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
lea    0x4(%rsp),%rdx
mov    $0x1,%ecx
call   1030 <CC1101Read@plt>
lea    0x5(%rsp),%rdx
mov    %rbx,%rdi
mov    %ebp,%esi
mov    $0x1,%ecx
call   1030 <CC1101Read@plt>
mov    0x5(%rsp),%cl
mov    $0x1,%eax
cmp    0x4(%rsp),%cl
je     119a <CC1101GetRegisterWithSpiSyncProblem+0x8a>
lea    0x6(%rsp),%rdx
movzbl %bpl,%ebp
mov    %rbx,%rdi
mov    %ebp,%esi
mov    $0x1,%ecx
call   1030 <CC1101Read@plt>
mov    0x6(%rsp),%cl
mov    $0x2,%eax
cmp    0x5(%rsp),%cl
je     119a <CC1101GetRegisterWithSpiSyncProblem+0x8a>
lea    0x7(%rsp),%rdx
mov    %rbx,%rdi
mov    %ebp,%esi
mov    $0x1,%ecx
call   1030 <CC1101Read@plt>
mov    0x7(%rsp),%al
xor    %ecx,%ecx
cmp    0x6(%rsp),%al
sete   %cl
mov    $0x4,%eax
sub    %rcx,%rax
mov    0x4(%rsp,%rax,1),%al
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.sCC1101PhyInfo = type { i32 }
define zeroext i8 @CC1101GetRegisterWithSpiSyncProblem(%struct.sCC1101PhyInfo* %0, i8 zeroext %1) {
%3 = alloca %struct.sCC1101PhyInfo*
%4 = alloca i8
%5 = alloca i8
%6 = alloca [4 x i8]
store %struct.sCC1101PhyInfo* %0, %struct.sCC1101PhyInfo** %3
store i8 %1, i8* %4
store i8 0, i8* %5
br label %7
7: ; preds = %37, %2
%8 = load i8, i8* %5
%9 = zext i8 %8 to i32
%10 = icmp slt i32 %9, 4
br i1 %10, label %11, label %40
11: ; preds = %7
%12 = load %struct.sCC1101PhyInfo*, %struct.sCC1101PhyInfo** %3
%13 = load i8, i8* %4
%14 = load i8, i8* %5
%15 = zext i8 %14 to i64
%16 = getelementptr inbounds [4 x i8], [4 x i8]* %6, i64 0, i64 %15
%17 = call i32 @CC1101Read(%struct.sCC1101PhyInfo* %12, i8 zeroext %13, i8* %16, i32 1)
%18 = load i8, i8* %5
%19 = zext i8 %18 to i32
%20 = icmp sgt i32 %19, 0
br i1 %20, label %21, label %36
21: ; preds = %11
%22 = load i8, i8* %5
%23 = zext i8 %22 to i64
%24 = getelementptr inbounds [4 x i8], [4 x i8]* %6, i64 0, i64 %23
%25 = load i8, i8* %24
%26 = zext i8 %25 to i32
%27 = load i8, i8* %5
%28 = zext i8 %27 to i32
%29 = sub nsw i32 %28, 1
%30 = sext i32 %29 to i64
%31 = getelementptr inbounds [4 x i8], [4 x i8]* %6, i64 0, i64 %30
%32 = load i8, i8* %31
%33 = zext i8 %32 to i32
%34 = icmp eq i32 %26, %33
br i1 %34, label %35, label %36
35: ; preds = %21
br label %40
36: ; preds = %21, %11
br label %37
37: ; preds = %36
%38 = load i8, i8* %5
%39 = add i8 %38, 1
store i8 %39, i8* %5
br label %7
40: ; preds = %35, %7
%41 = load i8, i8* %5
%42 = zext i8 %41 to i64
%43 = getelementptr inbounds [4 x i8], [4 x i8]* %6, i64 0, i64 %42
%44 = load i8, i8* %43
ret i8 %44
}

LLVM IR (-O2):
%struct.sCC1101PhyInfo = type { i32 }
define zeroext i8 @CC1101GetRegisterWithSpiSyncProblem(%struct.sCC1101PhyInfo* %0, i8 zeroext %1) {
%3 = alloca [4 x i8]
%4 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%5 = call i32 @CC1101Read(%struct.sCC1101PhyInfo* %0, i8 zeroext %1, i8* %4, i32 1)
%6 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 1
%7 = call i32 @CC1101Read(%struct.sCC1101PhyInfo* %0, i8 zeroext %1, i8* %6, i32 1)
%8 = load i8, i8* %6
%9 = load i8, i8* %4
%10 = icmp eq i8 %8, %9
br i1 %10, label %24, label %11
11: ; preds = %2
%12 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 2
%13 = call i32 @CC1101Read(%struct.sCC1101PhyInfo* %0, i8 zeroext %1, i8* %12, i32 1)
%14 = load i8, i8* %12
%15 = load i8, i8* %6
%16 = icmp eq i8 %14, %15
br i1 %16, label %24, label %17
17: ; preds = %11
%18 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 3
%19 = call i32 @CC1101Read(%struct.sCC1101PhyInfo* %0, i8 zeroext %1, i8* %18, i32 1)
%20 = load i8, i8* %18
%21 = load i8, i8* %12
%22 = icmp eq i8 %20, %21
%23 = select i1 %22, i64 3, i64 4
br label %24
24: ; preds = %17, %11, %2
%25 = phi i64 [ 1, %2 ], [ 2, %11 ], [ %23, %17 ]
%26 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 %25
%27 = load i8, i8* %26
ret i8 %27
}