xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ put32(unsigned int);
int /*<<< orphan*/ put8(int);
void movsx_reg32_8preg64pimm32(int reg1, int reg2, unsigned int imm32) {
  put8(0x0F);
  put8(0xBE);
  put8((reg1 << 3) | reg2 | 0x80);
  put32(imm32);
}


x86 assembly (clang, -O0):
<movsx_reg32_8preg64pimm32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    $0xf,%edi
call   1030 <put8@plt>
mov    $0xbe,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     -0x8(%rbp),%edi
or     $0x80,%edi
call   1030 <put8@plt>
mov    -0xc(%rbp),%edi
call   1040 <put32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<movsx_reg32_8preg64pimm32>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %edi,%ebx
mov    $0xf,%edi
call   1030 <put8@plt>
mov    $0xbe,%edi
call   1030 <put8@plt>
shl    $0x3,%ebx
or     %ebp,%ebx
or     $0x80,%ebx
mov    %ebx,%edi
call   1030 <put8@plt>
mov    %r14d,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <put32@plt>

LLVM IR (-O0):
define void @movsx_reg32_8preg64pimm32(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = call i32 @put8(i32 15)
%8 = call i32 @put8(i32 190)
%9 = load i32, i32* %4
%10 = shl i32 %9, 3
%11 = load i32, i32* %5
%12 = or i32 %10, %11
%13 = or i32 %12, 128
%14 = call i32 @put8(i32 %13)
%15 = load i32, i32* %6
%16 = call i32 @put32(i32 %15)
ret void
}

LLVM IR (-O2):
define void @movsx_reg32_8preg64pimm32(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @put8(i32 15)
%5 = tail call i32 @put8(i32 190)
%6 = shl i32 %0, 3
%7 = or i32 %6, %1
%8 = or i32 %7, 128
%9 = tail call i32 @put8(i32 %8)
%10 = tail call i32 @put32(i32 %2)
ret void
}
/* Type definitions */
typedef int __le16;

/* Variables and functions */
int cpu_to_le16(int);
int ieee80211_has_pm(__le16 fc) { return (fc & cpu_to_le16(0x1000)) != 0; }


x86 assembly (clang, -O0):
<ieee80211_has_pm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x1000,%edi
call   1030 <cpu_to_le16@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ieee80211_has_pm>:
push   %rbx
mov    %edi,%ebx
mov    $0x1000,%edi
call   1030 <cpu_to_le16@plt>
xor    %ecx,%ecx
test   %ebx,%eax
setne  %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ieee80211_has_pm(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @cpu_to_le16(i32 4096)
%5 = and i32 %3, %4
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @ieee80211_has_pm(i32 %0) {
%2 = tail call i32 @cpu_to_le16(i32 4096)
%3 = and i32 %2, %0
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef scalar_t__ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ print_fibo_result(scalar_t__);
int /*<<< orphan*/ printf(char *);
int fibo(const uint64_t order) {
  uint64_t a = 1, b = 0, c = 0, i = 0;
  do {
    print_fibo_result(c);
    c = a + b;
    a = b;
    b = c;
  } while (i++ < order);
  printf("\n");
  return 0;
}


x86 assembly (clang, -O0):
<fibo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x1,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
mov    -0x20(%rbp),%rdi
call   1040 <print_fibo_result@plt>
mov    -0x10(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x28(%rbp)
cmp    -0x8(%rbp),%rax
jl     114c <fibo+0x2c>
lea    0xe6f(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibo>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
xor    %ebx,%ebx
test   %rdi,%rdi
cmovle %rbx,%r14
add    $0x1,%r14
mov    $0x1,%r15d
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1040 <print_fibo_result@plt>
mov    %r15,%rax
add    %rbx,%rax
mov    %rbx,%r15
mov    %rax,%rbx
add    $0xffffffffffffffff,%r14
jne    1140 <fibo+0x20>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define i32 @fibo(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %2
store i64 1, i64* %3
store i64 0, i64* %4
store i64 0, i64* %5
store i64 0, i64* %6
br label %7
7: ; preds = %15, %1
%8 = load i64, i64* %5
%9 = call i32 @print_fibo_result(i64 %8)
%10 = load i64, i64* %3
%11 = load i64, i64* %4
%12 = add nsw i64 %10, %11
store i64 %12, i64* %5
%13 = load i64, i64* %4
store i64 %13, i64* %3
%14 = load i64, i64* %5
store i64 %14, i64* %4
br label %15
15: ; preds = %7
%16 = load i64, i64* %6
%17 = add nsw i64 %16, 1
store i64 %17, i64* %6
%18 = load i64, i64* %2
%19 = icmp slt i64 %16, %18
br i1 %19, label %7, label %20
20: ; preds = %15
%21 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
define i32 @fibo(i64 %0) {
%2 = call i64 @llvm.smax.i64(i64 %0, i64 0)
br label %3
3: ; preds = %3, %1
%4 = phi i64 [ 1, %1 ], [ %5, %3 ]
%5 = phi i64 [ 0, %1 ], [ %8, %3 ]
%6 = phi i64 [ 0, %1 ], [ %9, %3 ]
%7 = tail call i32 @print_fibo_result(i64 %5)
%8 = add nsw i64 %5, %4
%9 = add nuw i64 %6, 1
%10 = icmp eq i64 %6, %2
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = tail call i32 @putchar(i32 10)
ret i32 0
}
void ff_hevc_put_hevc_bi_pel_pixels48_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_pel_pixels48_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_pel_pixels48_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_pel_pixels48_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_pel_pixels48_8_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_flist_free() {
  printf("NOT IMPLEMENTED:"
         "pa_flist_free"
         "\n");
}


x86 assembly (clang, -O0):
<pa_flist_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_flist_free>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"NOT IMPLEMENTED:pa_flist_free\0A\00"
define i32 @pa_flist_free() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [30 x i8] c"NOT IMPLEMENTED:pa_flist_free\00"
define i32 @pa_flist_free() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
struct bladerf {
  int dummy;
};

/* Variables and functions */
int nios_8x8_write(struct bladerf *, int, int /*<<< orphan*/,
                   int /*<<< orphan*/);
int nios_lms6_write(struct bladerf *dev, uint8_t addr, uint8_t data) {
  int status = nios_8x8_write(dev, 0x00, addr, data);
  if (status == 0) {
    do {
      do {
      } while (0);
    } while (0);
  }
  return status;
}


x86 assembly (clang, -O0):
<nios_lms6_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
xor    %esi,%esi
call   1030 <nios_8x8_write@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    1159 <nios_lms6_write+0x49>
jmp    1145 <nios_lms6_write+0x35>
jmp    114a <nios_lms6_write+0x3a>
jmp    114f <nios_lms6_write+0x3f>
jmp    1154 <nios_lms6_write+0x44>
jmp    1159 <nios_lms6_write+0x49>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nios_lms6_write>:
mov    %edx,%ecx
mov    %esi,%edx
xor    %esi,%esi
jmp    1030 <nios_8x8_write@plt>

LLVM IR (-O0):
%struct.bladerf = type { i32 }
define i32 @nios_lms6_write(%struct.bladerf* %0, i32 %1, i32 %2) {
%4 = alloca %struct.bladerf*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store %struct.bladerf* %0, %struct.bladerf** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load %struct.bladerf*, %struct.bladerf** %4
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @nios_8x8_write(%struct.bladerf* %8, i32 0, i32 %9, i32 %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %19
14: ; preds = %3
br label %15
15: ; preds = %14
br label %16
16: ; preds = %15
br label %17
17: ; preds = %16
br label %18
18: ; preds = %17
br label %19
19: ; preds = %18, %3
%20 = load i32, i32* %7
ret i32 %20
}

LLVM IR (-O2):
%struct.bladerf = type { i32 }
define i32 @nios_lms6_write(%struct.bladerf* %0, i32 %1, i32 %2) {
%4 = tail call i32 @nios_8x8_write(%struct.bladerf* %0, i32 0, i32 %1, i32 %2)
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ __u16;

/* Variables and functions */
int /*<<< orphan*/ __put_unaligned_be16(int /*<<< orphan*/, void *);
void put_unaligned_be16(__u16 val, void *p) { __put_unaligned_be16(val, p); }


x86 assembly (clang, -O0):
<put_unaligned_be16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <__put_unaligned_be16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_unaligned_be16>:
jmp    1030 <__put_unaligned_be16@plt>

LLVM IR (-O0):
define void @put_unaligned_be16(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i32 @__put_unaligned_be16(i32 %5, i8* %6)
ret void
}

LLVM IR (-O2):
define void @put_unaligned_be16(i32 %0, i8* %1) {
%3 = tail call i32 @__put_unaligned_be16(i32 %0, i8* %1)
ret void
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int syscon_initialize_number_of_multprec_Laurentials(int length) {
  int *b, fail;
  double *c;
  fail = _ada_use_c2phc(573, &length, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<syscon_initialize_number_of_multprec_Laurentials>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x23d,%edi
lea    -0x4(%rbp),%rsi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscon_initialize_number_of_multprec_Laurentials>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x23d,%edi
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @syscon_initialize_number_of_multprec_Laurentials(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
%5 = alloca double*
store i32 %0, i32* %2
%6 = load i32*, i32** %3
%7 = load double*, double** %5
%8 = call i32 @_ada_use_c2phc(i32 573, i32* %2, i32* %6, double* %7)
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @syscon_initialize_number_of_multprec_Laurentials(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @_ada_use_c2phc(i32 573, i32* %2, i32* undef, double* undef)
ret i32 %3
}
/* Type definitions */
struct eiwic_plugin_timer {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct eiwic_plugin_timer *);
void plug_timer_destroy(void *data) {
  struct eiwic_plugin_timer *timer = data;
  free(timer);
}


x86 assembly (clang, -O0):
<plug_timer_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<plug_timer_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.eiwic_plugin_timer = type { i32 }
define void @plug_timer_destroy(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.eiwic_plugin_timer*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to %struct.eiwic_plugin_timer*
store %struct.eiwic_plugin_timer* %5, %struct.eiwic_plugin_timer** %3
%6 = load %struct.eiwic_plugin_timer*, %struct.eiwic_plugin_timer** %3
%7 = call i32 @free(%struct.eiwic_plugin_timer* %6)
ret void
}

LLVM IR (-O2):
%struct.eiwic_plugin_timer = type { i32 }
define void @plug_timer_destroy(i8* nocapture %0) {
%2 = bitcast i8* %0 to %struct.eiwic_plugin_timer*
%3 = tail call i32 @free(%struct.eiwic_plugin_timer* %2)
ret void
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int const);
void print_value(int32_t const value) { printf("%d ", value); }


x86 assembly (clang, -O0):
<print_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_value>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d \00"
define void @print_value(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d \00"
define void @print_value(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int compare_floats(void const *, void const *);
int rcompare_floats(const void *a, const void *b) {
  return -compare_floats(a, b);
}


x86 assembly (clang, -O0):
<rcompare_floats>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <compare_floats@plt>
mov    %eax,%ecx
xor    %eax,%eax
sub    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcompare_floats>:
push   %rax
call   1030 <compare_floats@plt>
neg    %eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @rcompare_floats(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @compare_floats(i8* %5, i8* %6)
%8 = sub nsw i32 0, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @rcompare_floats(i8* %0, i8* %1) {
%3 = tail call i32 @compare_floats(i8* %0, i8* %1)
%4 = sub nsw i32 0, %3
ret i32 %4
}
/* Variables and functions */
int rand();
int screen_height();
int random_y(void) { return rand() % (screen_height() - 3); }


x86 assembly (clang, -O0):
<random_y>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <rand@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <screen_height@plt>
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
sub    $0x3,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_y>:
push   %rbx
xor    %eax,%eax
call   1040 <rand@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <screen_height@plt>
mov    %eax,%ecx
add    $0xfffffffd,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @random_y() {
%1 = call i32 (...) @rand()
%2 = call i32 (...) @screen_height()
%3 = sub nsw i32 %2, 3
%4 = srem i32 %1, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @random_y() {
%1 = tail call i32 (...) @rand()
%2 = tail call i32 (...) @screen_height()
%3 = add nsw i32 %2, -3
%4 = srem i32 %1, %3
ret i32 %4
}
unsigned xrop3_160_0_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  stk1 = D & T;
  return (stk1 & S) | (stk1 & (~T)) | (T & (~S) & D);
}


x86 assembly (clang, -O0):
<xrop3_160_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_160_0_1>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
and    %esi,%edi
not    %eax
and    %esi,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_160_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
store i32 %14, i32* %6
%15 = load i8, i8* %4
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 8
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
store i32 %20, i32* %7
%21 = load i32, i32* %5
%22 = load i32, i32* %7
%23 = and i32 %21, %22
store i32 %23, i32* %8
%24 = load i32, i32* %8
%25 = load i32, i32* %6
%26 = and i32 %24, %25
%27 = load i32, i32* %8
%28 = load i32, i32* %7
%29 = xor i32 %28, -1
%30 = and i32 %27, %29
%31 = or i32 %26, %30
%32 = load i32, i32* %7
%33 = load i32, i32* %6
%34 = xor i32 %33, -1
%35 = and i32 %32, %34
%36 = load i32, i32* %5
%37 = and i32 %35, %36
%38 = or i32 %31, %37
ret i32 %38
}

LLVM IR (-O2):
define i32 @xrop3_160_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = and i8 %1, %0
%7 = zext i8 %6 to i32
%8 = xor i32 %4, -1
%9 = and i32 %8, %5
%10 = or i32 %9, %7
ret i32 %10
}
void webif_tpls_free(void) { return; }


x86 assembly (clang, -O0):
<webif_tpls_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<webif_tpls_free>:
ret

LLVM IR (-O0):
define void @webif_tpls_free() {
ret void
}

LLVM IR (-O2):
define void @webif_tpls_free() {
ret void
}
int setinfilnam(infilnam, infilnamstr)
char **infilnam;
char *infilnamstr;
{
  int exitflg = 0;
  if (!(*infilnam))
    (*infilnam) = infilnamstr;
  else
    exitflg = usage();
  return exitflg;
}


x86 assembly (clang, -O0):
<setinfilnam>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
jne    1145 <setinfilnam+0x35>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
jmp    114f <setinfilnam+0x3f>
mov    $0x0,%al
call   1030 <usage@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setinfilnam>:
cmpq   $0x0,(%rdi)
je     111d <setinfilnam+0xd>
xor    %eax,%eax
jmp    1030 <usage@plt>
mov    %rsi,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @setinfilnam(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
%5 = alloca i32
store i8** %0, i8*** %3
store i8* %1, i8** %4
store i32 0, i32* %5
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %6
%8 = icmp ne i8* %7, null
br i1 %8, label %12, label %9
9: ; preds = %2
%10 = load i8*, i8** %4
%11 = load i8**, i8*** %3
store i8* %10, i8** %11
br label %14
12: ; preds = %2
%13 = call i32 (...) @usage()
store i32 %13, i32* %5
br label %14
14: ; preds = %12, %9
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
define i32 @setinfilnam(i8** nocapture %0, i8* %1) {
%3 = load i8*, i8** %0
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %6
5: ; preds = %2
store i8* %1, i8** %0
br label %8
6: ; preds = %2
%7 = tail call i32 (...) @usage()
br label %8
8: ; preds = %6, %5
%9 = phi i32 [ %7, %6 ], [ 0, %5 ]
ret i32 %9
}
int do_211() { return 211; }


x86 assembly (clang, -O0):
<do_211>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_211>:
mov    $0xd3,%eax
ret

LLVM IR (-O0):
define i32 @do_211() {
ret i32 211
}

LLVM IR (-O2):
define i32 @do_211() {
ret i32 211
}
void remotex_setup() {}


x86 assembly (clang, -O0):
<remotex_setup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remotex_setup>:
ret

LLVM IR (-O0):
define void @remotex_setup() {
ret void
}

LLVM IR (-O2):
define void @remotex_setup() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mul4(double *, double const **, double const **);
__attribute__((__no__)) void wrap_mul4(double *Out, const double A[4][4],
                                       const double B[4][4]) {
  mul4(Out, A, B);
}


x86 assembly (clang, -O0):
<wrap_mul4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <mul4@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrap_mul4>:
jmp    1030 <mul4@plt>

LLVM IR (-O0):
define void @wrap_mul4(double* %0, [4 x double]* %1, [4 x double]* %2) {
%4 = alloca double*
%5 = alloca [4 x double]*
%6 = alloca [4 x double]*
store double* %0, double** %4
store [4 x double]* %1, [4 x double]** %5
store [4 x double]* %2, [4 x double]** %6
%7 = load double*, double** %4
%8 = load [4 x double]*, [4 x double]** %5
%9 = bitcast [4 x double]* %8 to double**
%10 = load [4 x double]*, [4 x double]** %6
%11 = bitcast [4 x double]* %10 to double**
%12 = call i32 @mul4(double* %7, double** %9, double** %11)
ret void
}

LLVM IR (-O2):
define void @wrap_mul4(double* %0, [4 x double]* %1, [4 x double]* %2) {
%4 = bitcast [4 x double]* %1 to double**
%5 = bitcast [4 x double]* %2 to double**
%6 = tail call i32 @mul4(double* %0, double** %4, double** %5)
ret void
}
void yldisp_ringer_vol_down() {}


x86 assembly (clang, -O0):
<yldisp_ringer_vol_down>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yldisp_ringer_vol_down>:
ret

LLVM IR (-O0):
define void @yldisp_ringer_vol_down() {
ret void
}

LLVM IR (-O2):
define void @yldisp_ringer_vol_down() {
ret void
}
char *opt_ownerframe(char *packet) { return packet - 1; }


x86 assembly (clang, -O0):
<opt_ownerframe>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<opt_ownerframe>:
lea    -0x1(%rdi),%rax
ret

LLVM IR (-O0):
define i8* @opt_ownerframe(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 -1
ret i8* %4
}

LLVM IR (-O2):
define i8* @opt_ownerframe(i8* readnone %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 -1
ret i8* %2
}
unsigned short powerOf2(unsigned short exponent) {
  int ii;
  unsigned short retVal = 1;
  for (ii = 0; ii < exponent; ii++)
    retVal = retVal * 2;
  return retVal;
}


x86 assembly (clang, -O0):
<powerOf2>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movw   $0x1,-0xa(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
movzwl -0x2(%rbp),%ecx
cmp    %ecx,%eax
jge    1140 <powerOf2+0x40>
movzwl -0xa(%rbp),%eax
shl    $0x1,%eax
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1118 <powerOf2+0x18>
movzwl -0xa(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<powerOf2>:
test   %edi,%edi
je     1117 <powerOf2+0x17>
lea    -0x1(%rdi),%eax
mov    %edi,%ecx
and    $0x7,%ecx
cmp    $0x7,%eax
jae    111c <powerOf2+0x1c>
mov    $0x1,%ax
jmp    1138 <powerOf2+0x38>
mov    $0x1,%ax
ret
and    $0xfffffff8,%edi
mov    $0x1,%ax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
shl    $0x8,%eax
add    $0xfffffff8,%edi
jne    1130 <powerOf2+0x30>
test   %ecx,%ecx
je     1147 <powerOf2+0x47>
nopl   0x0(%rax)
add    %eax,%eax
add    $0xffffffff,%ecx
jne    1140 <powerOf2+0x40>
ret

LLVM IR (-O0):
define zeroext i16 @powerOf2(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i32
%4 = alloca i16
store i16 %0, i16* %2
store i16 1, i16* %4
store i32 0, i32* %3
br label %5
5: ; preds = %15, %1
%6 = load i32, i32* %3
%7 = load i16, i16* %2
%8 = zext i16 %7 to i32
%9 = icmp slt i32 %6, %8
br i1 %9, label %10, label %18
10: ; preds = %5
%11 = load i16, i16* %4
%12 = zext i16 %11 to i32
%13 = mul nsw i32 %12, 2
%14 = trunc i32 %13 to i16
store i16 %14, i16* %4
br label %15
15: ; preds = %10
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
store i32 %17, i32* %3
br label %5
18: ; preds = %5
%19 = load i16, i16* %4
ret i16 %19
}

LLVM IR (-O2):
define zeroext i16 @powerOf2(i16 zeroext %0) {
%2 = zext i16 %0 to i32
%3 = icmp eq i16 %0, 0
br i1 %3, label %26, label %4
4: ; preds = %1
%5 = add nsw i32 %2, -1
%6 = and i32 %2, 7
%7 = icmp ult i32 %5, 7
br i1 %7, label %16, label %8
8: ; preds = %4
%9 = and i32 %2, 65528
br label %10
10: ; preds = %10, %8
%11 = phi i16 [ 1, %8 ], [ %13, %10 ]
%12 = phi i32 [ 0, %8 ], [ %14, %10 ]
%13 = shl i16 %11, 8
%14 = add i32 %12, 8
%15 = icmp eq i32 %14, %9
br i1 %15, label %16, label %10
16: ; preds = %10, %4
%17 = phi i16 [ undef, %4 ], [ %13, %10 ]
%18 = phi i16 [ 1, %4 ], [ %13, %10 ]
%19 = icmp eq i32 %6, 0
br i1 %19, label %26, label %20
20: ; preds = %16, %20
%21 = phi i16 [ %23, %20 ], [ %18, %16 ]
%22 = phi i32 [ %24, %20 ], [ 0, %16 ]
%23 = shl i16 %21, 1
%24 = add i32 %22, 1
%25 = icmp eq i32 %24, %6
br i1 %25, label %26, label %20
26: ; preds = %16, %20, %1
%27 = phi i16 [ 1, %1 ], [ %17, %16 ], [ %23, %20 ]
ret i16 %27
}
int test_imm_3Fint64_highword_mem(long long *val) {
  return ((*val >> 32) & (0x3F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Fint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x20,%rdx
and    $0x3f,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Fint64_highword_mem>:
testb  $0x3f,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Fint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 32
%6 = and i64 %5, 63
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_3Fint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 270582939648
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int b = 0;
  if ((unsigned long)b == (unsigned long)((void *)0)) {
    b = b + 1;
  }
  assert(b == 1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movslq -0x8(%rbp),%rax
cmp    $0x0,%rax
jne    113d <main+0x2d>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %0
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
store i32 %8, i32* %2
br label %9
9: ; preds = %6, %0
%10 = load i32, i32* %2
%11 = icmp eq i32 %10, 1
%12 = zext i1 %11 to i32
%13 = call i32 @assert(i32 %12)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ putbyte(unsigned char);
void putword(unsigned short w) {
  putbyte((unsigned char)(w >> 8));
  putbyte((unsigned char)(w & 0xff));
}


x86 assembly (clang, -O0):
<putword>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
sar    $0x8,%eax
movzbl %al,%edi
call   1030 <putbyte@plt>
movzwl -0x2(%rbp),%eax
and    $0xff,%eax
movzbl %al,%edi
call   1030 <putbyte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putword>:
push   %rbx
mov    %edi,%ebx
shr    $0x8,%edi
call   1030 <putbyte@plt>
movzbl %bl,%edi
pop    %rbx
jmp    1030 <putbyte@plt>

LLVM IR (-O0):
define void @putword(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = ashr i32 %4, 8
%6 = trunc i32 %5 to i8
%7 = call i32 @putbyte(i8 zeroext %6)
%8 = load i16, i16* %2
%9 = zext i16 %8 to i32
%10 = and i32 %9, 255
%11 = trunc i32 %10 to i8
%12 = call i32 @putbyte(i8 zeroext %11)
ret void
}

LLVM IR (-O2):
define void @putword(i16 zeroext %0) {
%2 = lshr i16 %0, 8
%3 = trunc i16 %2 to i8
%4 = tail call i32 @putbyte(i8 zeroext %3)
%5 = trunc i16 %0 to i8
%6 = tail call i32 @putbyte(i8 zeroext %5)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int /*<<< orphan*/ pthread_mutex_lock(int /*<<< orphan*/ *);
void coprthr_mutex_lock(void *p_mtx) {
  pthread_mutex_lock((pthread_mutex_t *)p_mtx);
}


x86 assembly (clang, -O0):
<coprthr_mutex_lock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pthread_mutex_lock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<coprthr_mutex_lock>:
jmp    1030 <pthread_mutex_lock@plt>

LLVM IR (-O0):
define void @coprthr_mutex_lock(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = call i32 @pthread_mutex_lock(i32* %4)
ret void
}

LLVM IR (-O2):
define void @coprthr_mutex_lock(i8* %0) {
%2 = bitcast i8* %0 to i32*
%3 = tail call i32 @pthread_mutex_lock(i32* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf("pthread_test [PROTOCOL]\n");
  printf("  PROTOCOL: none, inherit, protect\n");
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
lea    0xee2(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
lea    0xee4(%rip),%rdi
call   1030 <puts@plt>
mov    0x2ea0(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"pthread_test [PROTOCOL]\0A\00"
@.str.1 = [36 x i8] c" PROTOCOL: none, inherit, protect\0A\00"
@EXIT_SUCCESS = global i32 0
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0))
%3 = load i32, i32* @EXIT_SUCCESS
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
@str = [24 x i8] c"pthread_test [PROTOCOL]\00"
@str.2 = [35 x i8] c" PROTOCOL: none, inherit, protect\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str.2, i64 0, i64 0))
%3 = load i32, i32* @EXIT_SUCCESS
%4 = tail call i32 @exit(i32 %3)
unreachable
}
int cairo_code_draw_casParameterLabel_get_height() { return 10; }


x86 assembly (clang, -O0):
<cairo_code_draw_casParameterLabel_get_height>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cairo_code_draw_casParameterLabel_get_height>:
mov    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @cairo_code_draw_casParameterLabel_get_height() {
ret i32 10
}

LLVM IR (-O2):
define i32 @cairo_code_draw_casParameterLabel_get_height() {
ret i32 10
}
/* Type definitions */
struct BijouVM {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fwrite(void const *, size_t, int, int /*<<< orphan*/ *);
int writer(struct BijouVM *vm, const void *p, size_t s, void *d) {
  ((void)(vm));
  return (fwrite(p, s, 1, (FILE *)d) != 1) && (s != 0);
}


x86 assembly (clang, -O0):
<writer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rcx
mov    $0x1,%edx
call   1030 <fwrite@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x1,%ecx
mov    %al,-0x21(%rbp)
je     1159 <writer+0x49>
cmpq   $0x0,-0x18(%rbp)
setne  %al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<writer>:
push   %rbx
mov    %rdx,%rbx
mov    %rsi,%rdi
mov    %rdx,%rsi
mov    $0x1,%edx
call   1030 <fwrite@plt>
cmp    $0x1,%eax
setne  %al
test   %rbx,%rbx
setne  %cl
and    %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.BijouVM = type { i32 }
define i32 @writer(%struct.BijouVM* %0, i8* %1, i64 %2, i8* %3) {
%5 = alloca %struct.BijouVM*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
store %struct.BijouVM* %0, %struct.BijouVM** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i8* %3, i8** %8
%9 = load %struct.BijouVM*, %struct.BijouVM** %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %7
%12 = load i8*, i8** %8
%13 = bitcast i8* %12 to i32*
%14 = call i32 @fwrite(i8* %10, i64 %11, i32 1, i32* %13)
%15 = icmp ne i32 %14, 1
br i1 %15, label %16, label %19
16: ; preds = %4
%17 = load i64, i64* %7
%18 = icmp ne i64 %17, 0
br label %19
19: ; preds = %16, %4
%20 = phi i1 [ false, %4 ], [ %18, %16 ]
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
%struct.BijouVM = type { i32 }
define i32 @writer(%struct.BijouVM* nocapture readnone %0, i8* nocapture %1, i64 %2, i8* nocapture %3) {
%5 = bitcast i8* %3 to i32*
%6 = tail call i32 @fwrite(i8* %1, i64 %2, i32 1, i32* %5)
%7 = icmp ne i32 %6, 1
%8 = icmp ne i64 %2, 0
%9 = and i1 %8, %7
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int);
int add(int a, int b) {
  printf("%d + %d = %d\n", a, b, a + b);
  return a + b;
}


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0x4(%rbp),%ecx
add    -0x8(%rbp),%ecx
lea    0xecf(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
push   %rbx
mov    %esi,%edx
mov    %edi,%esi
lea    (%rdx,%rsi,1),%ebx
lea    0xee1(%rip),%rdi
mov    %ebx,%ecx
call   1030 <printf@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"%d + %d = %d\0A\00"
define i32 @add(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = add nsw i32 %7, %8
%10 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6, i32 %9)
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = add nsw i32 %11, %12
ret i32 %13
}

LLVM IR (-O2):
@.str = [14 x i8] c"%d + %d = %d\0A\00"
define i32 @add(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
%4 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1, i32 %3)
ret i32 %3
}
int isRtParExpRex(char ch) { return (ch == ']'); }


x86 assembly (clang, -O0):
<isRtParExpRex>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x5d,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isRtParExpRex>:
xor    %eax,%eax
cmp    $0x5d,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @isRtParExpRex(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 93
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @isRtParExpRex(i8 signext %0) {
%2 = icmp eq i8 %0, 93
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, long, long, int);
int /*<<< orphan*/ stderr;
void fail(long hver, long lver, int result) {
  fprintf(stderr, "opensslver: header %lx library %lx != %d \n", hver, lver,
          result);
  exit(1);
}


x86 assembly (clang, -O0):
<fail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%r8d
lea    0xeb1(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<fail>:
push   %rax
mov    %edx,%r8d
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    0x2eaf(%rip),%rax
mov    (%rax),%edi
lea    0xec6(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [43 x i8] c"opensslver: header %lx library %lx != %d \0A\00"
define void @fail(i64 %0, i64 %1, i32 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i32
store i64 %0, i64* %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i32, i32* @stderr
%8 = load i64, i64* %4
%9 = load i64, i64* %5
%10 = load i32, i32* %6
%11 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), i64 %8, i64 %9, i32 %10)
%12 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [43 x i8] c"opensslver: header %lx library %lx != %d \0A\00"
define void @fail(i64 %0, i64 %1, i32 %2) {
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), i64 %0, i64 %1, i32 %2)
%6 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
typedef int uint32_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fwrite_err(void const *, int, int, int /*<<< orphan*/ *);
void toasim_write_32(const char *fname, const void *val, FILE *file) {
  uint32_t sz = 4;
  fwrite_err(fname, 4, 1, file);
  fwrite_err(&sz, 4, 1, file);
  fwrite_err(val, sz, 1, file);
}


x86 assembly (clang, -O0):
<toasim_write_32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x4,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rcx
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fwrite_err@plt>
lea    -0x1c(%rbp),%rdi
mov    -0x18(%rbp),%rcx
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fwrite_err@plt>
mov    -0x10(%rbp),%rdi
mov    -0x1c(%rbp),%esi
mov    -0x18(%rbp),%rcx
mov    $0x1,%edx
call   1030 <fwrite_err@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toasim_write_32>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %rsi,%r14
movl   $0x4,0x4(%rsp)
mov    $0x4,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1030 <fwrite_err@plt>
lea    0x4(%rsp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1030 <fwrite_err@plt>
mov    0x4(%rsp),%esi
mov    %r14,%rdi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1030 <fwrite_err@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @toasim_write_32(i8* %0, i8* %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32* %2, i32** %6
store i32 4, i32* %7
%8 = load i8*, i8** %4
%9 = load i32*, i32** %6
%10 = call i32 @fwrite_err(i8* %8, i32 4, i32 1, i32* %9)
%11 = bitcast i32* %7 to i8*
%12 = load i32*, i32** %6
%13 = call i32 @fwrite_err(i8* %11, i32 4, i32 1, i32* %12)
%14 = load i8*, i8** %5
%15 = load i32, i32* %7
%16 = load i32*, i32** %6
%17 = call i32 @fwrite_err(i8* %14, i32 %15, i32 1, i32* %16)
ret void
}

LLVM IR (-O2):
define void @toasim_write_32(i8* %0, i8* %1, i32* %2) {
%4 = alloca i32
%5 = bitcast i32* %4 to i8*
store i32 4, i32* %4
%6 = tail call i32 @fwrite_err(i8* %0, i32 4, i32 1, i32* %2)
%7 = call i32 @fwrite_err(i8* %5, i32 4, i32 1, i32* %2)
%8 = load i32, i32* %4
%9 = call i32 @fwrite_err(i8* %1, i32 %8, i32 1, i32* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, unsigned int);
void p4(char *name, unsigned int value) {
  printf("\t\t\t\t%s = <0x%08x>;\n", name, value);
}


x86 assembly (clang, -O0):
<p4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<p4>:
mov    %esi,%edx
mov    %rdi,%rsi
lea    0xee4(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"\09\09\09\09%s = <0x%08x>;\0A\00"
define void @p4(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [20 x i8] c"\09\09\09\09%s = <0x%08x>;\0A\00"
define void @p4(i8* %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
ret void
}
const char *url_version_string() {
  return ("0"
          "."
          "0"
          "."
          "1");
}


x86 assembly (clang, -O0):
<url_version_string>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<url_version_string>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"0.0.1\00"
define i8* @url_version_string() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"0.0.1\00"
define i8* @url_version_string() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
void enable_cache(void) { return; }


x86 assembly (clang, -O0):
<enable_cache>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<enable_cache>:
ret

LLVM IR (-O0):
define void @enable_cache() {
ret void
}

LLVM IR (-O2):
define void @enable_cache() {
ret void
}
int llama_version_patch(void) { return 1; }


x86 assembly (clang, -O0):
<llama_version_patch>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<llama_version_patch>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @llama_version_patch() {
ret i32 1
}

LLVM IR (-O2):
define i32 @llama_version_patch() {
ret i32 1
}
/* Variables and functions */
int compare_vst_NSS_n(int);
int compare_vst_NSS_3() { return compare_vst_NSS_n(3); }


x86 assembly (clang, -O0):
<compare_vst_NSS_3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <compare_vst_NSS_n@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_vst_NSS_3>:
mov    $0x3,%edi
jmp    1030 <compare_vst_NSS_n@plt>

LLVM IR (-O0):
define i32 @compare_vst_NSS_3() {
%1 = call i32 @compare_vst_NSS_n(i32 3)
ret i32 %1
}

LLVM IR (-O2):
define i32 @compare_vst_NSS_3() {
%1 = tail call i32 @compare_vst_NSS_n(i32 3)
ret i32 %1
}
/* Variables and functions */
int cbuf(int, int, int);
cbuf10(int f, int n) { return (cbuf(f, n, 10)); }


x86 assembly (clang, -O0):
<cbuf10>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0xa,%edx
call   1030 <cbuf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbuf10>:
mov    $0xa,%edx
jmp    1030 <cbuf@plt>

LLVM IR (-O0):
define i32 @cbuf10(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @cbuf(i32 %5, i32 %6, i32 10)
ret i32 %7
}

LLVM IR (-O2):
define i32 @cbuf10(i32 %0, i32 %1) {
%3 = tail call i32 @cbuf(i32 %0, i32 %1, i32 10)
ret i32 %3
}
char *strcpy(char *destination, const char *source) {
  char *dest = destination;
  while ((*destination++ = *source++) != 0)
    ;
  return dest;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %al,(%rcx)
movsbl %al,%eax
cmp    $0x0,%eax
je     1147 <strcpy+0x47>
jmp    1114 <strcpy+0x14>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
movzbl (%rsi,%rcx,1),%edx
mov    %dl,(%rax,%rcx,1)
add    $0x1,%rcx
test   %dl,%dl
jne    1110 <strcpy+0x10>
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %15, %2
%8 = load i8*, i8** %4
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %4
%10 = load i8, i8* %8
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %3
store i8 %10, i8* %11
%13 = sext i8 %10 to i32
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %7
br label %7
16: ; preds = %7
%17 = load i8*, i8** %5
ret i8* %17
}

LLVM IR (-O2):
define i8* @strcpy(i8* returned writeonly %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %1, %2 ], [ %6, %3 ]
%5 = phi i8* [ %0, %2 ], [ %8, %3 ]
%6 = getelementptr inbounds i8, i8* %4, i64 1
%7 = load i8, i8* %4
%8 = getelementptr inbounds i8, i8* %5, i64 1
store i8 %7, i8* %5
%9 = icmp eq i8 %7, 0
br i1 %9, label %10, label %3
10: ; preds = %3
ret i8* %0
}
int to_binary_recursive(int num) {
  if (num <= 0)
    return 0;
  else
    return (num % 2) + (10 * to_binary_recursive(num / 2));
}


x86 assembly (clang, -O0):
<to_binary_recursive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jg     1131 <to_binary_recursive+0x21>
movl   $0x0,-0x4(%rbp)
jmp    115c <to_binary_recursive+0x4c>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1030 <to_binary_recursive@plt>
mov    -0xc(%rbp),%edx
imul   $0xa,%eax,%eax
add    %eax,%edx
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<to_binary_recursive>:
test   %edi,%edi
jle    112a <to_binary_recursive+0x1a>
push   %rbx
mov    %edi,%ebx
and    $0x1,%ebx
shr    %edi
call   1030 <to_binary_recursive@plt>
add    %eax,%eax
lea    (%rax,%rax,4),%eax
or     %ebx,%eax
pop    %rbx
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @to_binary_recursive(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %15
7: ; preds = %1
%8 = load i32, i32* %3
%9 = srem i32 %8, 2
%10 = load i32, i32* %3
%11 = sdiv i32 %10, 2
%12 = call i32 @to_binary_recursive(i32 %11)
%13 = mul nsw i32 10, %12
%14 = add nsw i32 %9, %13
store i32 %14, i32* %2
br label %15
15: ; preds = %7, %6
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @to_binary_recursive(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %3, label %5
3: ; preds = %1, %5
%4 = phi i32 [ %10, %5 ], [ 0, %1 ]
ret i32 %4
5: ; preds = %1
%6 = and i32 %0, 1
%7 = lshr i32 %0, 1
%8 = tail call i32 @to_binary_recursive(i32 %7)
%9 = mul nsw i32 %8, 10
%10 = or i32 %9, %6
br label %3
}