xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ STDERR_FILENO;
int /*<<< orphan*/ _write(int /*<<< orphan*/, char *, int);
void longjmperror(void) {
  (void)_write(STDERR_FILENO, "longjmp botch.\n",
               sizeof("longjmp botch.\n") - 1);
}


x86 assembly (clang, -O0):
<longjmperror>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
mov    $0xf,%edx
call   1030 <_write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<longjmperror>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
mov    $0xf,%edx
jmp    1030 <_write@plt>

LLVM IR (-O0):
@STDERR_FILENO = global i32 0
@.str = [16 x i8] c"longjmp botch.\0A\00"
define void @longjmperror() {
%1 = load i32, i32* @STDERR_FILENO
%2 = call i32 @_write(i32 %1, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 15)
ret void
}

LLVM IR (-O2):
@STDERR_FILENO = global i32 0
@.str = [16 x i8] c"longjmp botch.\0A\00"
define void @longjmperror() {
%1 = load i32, i32* @STDERR_FILENO
%2 = tail call i32 @_write(i32 %1, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 15)
ret void
}
unsigned long multiply_by_seven(unsigned long num) {
  unsigned long eight_multiply = num << 3;
  unsigned long seven_multiply = eight_multiply - num;
  return (seven_multiply);
}


x86 assembly (clang, -O0):
<multiply_by_seven>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x3,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
sub    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<multiply_by_seven>:
lea    0x0(,%rdi,8),%rax
sub    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @multiply_by_seven(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %2
%5 = load i64, i64* %2
%6 = shl i64 %5, 3
store i64 %6, i64* %3
%7 = load i64, i64* %3
%8 = load i64, i64* %2
%9 = sub i64 %7, %8
store i64 %9, i64* %4
%10 = load i64, i64* %4
ret i64 %10
}

LLVM IR (-O2):
define i64 @multiply_by_seven(i64 %0) {
%2 = mul i64 %0, 7
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ crtc_reg_write(int, unsigned char);
void __attribute__((no)) set_cursor_scan_end(unsigned char scan_end) {
  crtc_reg_write(0xb, scan_end);
}


x86 assembly (clang, -O0):
<set_cursor_scan_end>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0xb,%edi
movzbl -0x1(%rbp),%esi
call   1030 <crtc_reg_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_cursor_scan_end>:
mov    %edi,%esi
mov    $0xb,%edi
jmp    1030 <crtc_reg_write@plt>

LLVM IR (-O0):
define void @set_cursor_scan_end(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @crtc_reg_write(i32 11, i8 zeroext %3)
ret void
}

LLVM IR (-O2):
define void @set_cursor_scan_end(i8 zeroext %0) {
%2 = tail call i32 @crtc_reg_write(i32 11, i8 zeroext %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pthread_exit(void *);
void thrd_exit(int res) { pthread_exit((void *)(uintptr_t)res); }


x86 assembly (clang, -O0):
<thrd_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rdi
call   1030 <pthread_exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thrd_exit>:
movslq %edi,%rdi
jmp    1030 <pthread_exit@plt>

LLVM IR (-O0):
define void @thrd_exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i8*
%6 = call i32 @pthread_exit(i8* %5)
ret void
}

LLVM IR (-O2):
define void @thrd_exit(i32 %0) {
%2 = sext i32 %0 to i64
%3 = inttoptr i64 %2 to i8*
%4 = tail call i32 @pthread_exit(i8* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ put8(int);
void fucomip_fpreg(int fpreg) {
  put8(0xDF);
  put8(0xE8 + fpreg);
}


x86 assembly (clang, -O0):
<fucomip_fpreg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0xdf,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%edi
add    $0xe8,%edi
call   1030 <put8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fucomip_fpreg>:
push   %rbx
mov    %edi,%ebx
mov    $0xdf,%edi
call   1030 <put8@plt>
add    $0xe8,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @fucomip_fpreg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @put8(i32 223)
%4 = load i32, i32* %2
%5 = add nsw i32 232, %4
%6 = call i32 @put8(i32 %5)
ret void
}

LLVM IR (-O2):
define void @fucomip_fpreg(i32 %0) {
%2 = tail call i32 @put8(i32 223)
%3 = add nsw i32 %0, 232
%4 = tail call i32 @put8(i32 %3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char *);
void om_text_print_credits(FILE *fp) {
  fprintf(fp,
          "Statistics generated with VISITORS version %s\n"
          "http://www.hping.org/visitors for more information\n",
          "0.7");
}


x86 assembly (clang, -O0):
<om_text_print_credits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
lea    0xf34(%rip),%rdx
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<om_text_print_credits>:
lea    0xee9(%rip),%rsi
lea    0xf44(%rip),%rdx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [98 x i8] c"Statistics generated with VISITORS version %s\0Ahttp://www.hping.org/visitors for more information\0A\00"
@.str.1 = [4 x i8] c"0.7\00"
define void @om_text_print_credits(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([98 x i8], [98 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [98 x i8] c"Statistics generated with VISITORS version %s\0Ahttp://www.hping.org/visitors for more information\0A\00"
@.str.1 = [4 x i8] c"0.7\00"
define void @om_text_print_credits(i32* nocapture %0) {
%2 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([98 x i8], [98 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void tickRed() {}


x86 assembly (clang, -O0):
<tickRed>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tickRed>:
ret

LLVM IR (-O0):
define void @tickRed() {
ret void
}

LLVM IR (-O2):
define void @tickRed() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ stop_frt();
int /*<<< orphan*/ stop_rt();
void hal_stop() {
  stop_rt();
  stop_frt();
}


x86 assembly (clang, -O0):
<hal_stop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <stop_rt@plt>
mov    $0x0,%al
call   1040 <stop_frt@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hal_stop>:
push   %rax
xor    %eax,%eax
call   1030 <stop_rt@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <stop_frt@plt>

LLVM IR (-O0):
define void @hal_stop() {
%1 = call i32 (...) @stop_rt()
%2 = call i32 (...) @stop_frt()
ret void
}

LLVM IR (-O2):
define void @hal_stop() {
%1 = tail call i32 (...) @stop_rt()
%2 = tail call i32 (...) @stop_frt()
ret void
}
/* Variables and functions */
char *get_cmus_home_file(char *);
char *get_cmusfm_cache_file(void) { return get_cmus_home_file("cmusfm.cache"); }


x86 assembly (clang, -O0):
<get_cmusfm_cache_file>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <get_cmus_home_file@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_cmusfm_cache_file>:
lea    0xee9(%rip),%rdi
jmp    1030 <get_cmus_home_file@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"cmusfm.cache\00"
define i8* @get_cmusfm_cache_file() {
%1 = call i8* @get_cmus_home_file(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [13 x i8] c"cmusfm.cache\00"
define i8* @get_cmusfm_cache_file() {
%1 = tail call i8* @get_cmus_home_file(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
int /*<<< orphan*/ assertTrue(char *, int);
void test_uint16_comparison() {
  uint16_t x = 32799;
  assertTrue("x > 0", x > 0);
  assertTrue("x < 33000", x < 33000);
}


x86 assembly (clang, -O0):
<test_uint16_comparison>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x801f,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%esi
lea    0xece(%rip),%rdi
call   1030 <assertTrue@plt>
cmpl   $0x80e8,-0x4(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%esi
lea    0xeb9(%rip),%rdi
call   1030 <assertTrue@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_uint16_comparison>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1,%esi
call   1030 <assertTrue@plt>
lea    0xedd(%rip),%rdi
mov    $0x1,%esi
pop    %rax
jmp    1030 <assertTrue@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"x > 0\00"
@.str.1 = [10 x i8] c"x < 33000\00"
define void @test_uint16_comparison() {
%1 = alloca i32
store i32 32799, i32* %1
%2 = load i32, i32* %1
%3 = icmp sgt i32 %2, 0
%4 = zext i1 %3 to i32
%5 = call i32 @assertTrue(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = load i32, i32* %1
%7 = icmp slt i32 %6, 33000
%8 = zext i1 %7 to i32
%9 = call i32 @assertTrue(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"x > 0\00"
@.str.1 = [10 x i8] c"x < 33000\00"
define void @test_uint16_comparison() {
%1 = tail call i32 @assertTrue(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 1)
%2 = tail call i32 @assertTrue(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i32 1)
ret void
}
void USBIntEnableControl(unsigned long ulBase, unsigned long ulFlags) {
  ;
  ;
  if (ulFlags & 0x000000FF) {
    (*((volatile unsigned char *)(ulBase + 0x0000000B))) |= ulFlags;
  }
  if (ulFlags & 0x00000100) {
    (*((volatile unsigned long *)(ulBase + 0x00000408))) = 0x00000001;
  }
  if (ulFlags & 0x00000200) {
    (*((volatile unsigned long *)(0x40050000 + 0x00000448))) = 0x00000001;
  }
}


x86 assembly (clang, -O0):
<USBIntEnableControl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0xff,%rax
cmp    $0x0,%rax
je     1134 <USBIntEnableControl+0x34>
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0xb(%rax),%cl
movzbl %cl,%ecx
or     %rdx,%rcx
mov    %cl,0xb(%rax)
mov    -0x10(%rbp),%rax
and    $0x100,%rax
cmp    $0x0,%rax
je     1157 <USBIntEnableControl+0x57>
mov    -0x8(%rbp),%rax
movq   $0x1,0x408(%rax)
mov    -0x10(%rbp),%rax
and    $0x200,%rax
cmp    $0x0,%rax
je     1177 <USBIntEnableControl+0x77>
mov    $0x40050448,%eax
movq   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBIntEnableControl>:
test   %sil,%sil
je     1109 <USBIntEnableControl+0x9>
or     %sil,0xb(%rdi)
test   $0x100,%esi
jne    111a <USBIntEnableControl+0x1a>
test   $0x200,%esi
jne    112d <USBIntEnableControl+0x2d>
ret
movq   $0x1,0x408(%rdi)
test   $0x200,%esi
je     1119 <USBIntEnableControl+0x19>
movq   $0x1,0x40050448
ret

LLVM IR (-O0):
define void @USBIntEnableControl(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = and i64 %5, 255
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %2
%9 = load i64, i64* %4
%10 = load i64, i64* %3
%11 = add i64 %10, 11
%12 = inttoptr i64 %11 to i8*
%13 = load volatile i8, i8* %12
%14 = zext i8 %13 to i64
%15 = or i64 %14, %9
%16 = trunc i64 %15 to i8
store volatile i8 %16, i8* %12
br label %17
17: ; preds = %8, %2
%18 = load i64, i64* %4
%19 = and i64 %18, 256
%20 = icmp ne i64 %19, 0
br i1 %20, label %21, label %25
21: ; preds = %17
%22 = load i64, i64* %3
%23 = add i64 %22, 1032
%24 = inttoptr i64 %23 to i64*
store volatile i64 1, i64* %24
br label %25
25: ; preds = %21, %17
%26 = load i64, i64* %4
%27 = and i64 %26, 512
%28 = icmp ne i64 %27, 0
br i1 %28, label %29, label %30
29: ; preds = %25
store volatile i64 1, i64* inttoptr (i64 1074070600 to i64*)
br label %30
30: ; preds = %29, %25
ret void
}

LLVM IR (-O2):
define void @USBIntEnableControl(i64 %0, i64 %1) {
%3 = and i64 %1, 255
%4 = icmp eq i64 %3, 0
br i1 %4, label %11, label %5
5: ; preds = %2
%6 = add i64 %0, 11
%7 = inttoptr i64 %6 to i8*
%8 = load volatile i8, i8* %7
%9 = trunc i64 %1 to i8
%10 = or i8 %8, %9
store volatile i8 %10, i8* %7
br label %11
11: ; preds = %5, %2
%12 = and i64 %1, 256
%13 = icmp eq i64 %12, 0
br i1 %13, label %17, label %14
14: ; preds = %11
%15 = add i64 %0, 1032
%16 = inttoptr i64 %15 to i64*
store volatile i64 1, i64* %16
br label %17
17: ; preds = %14, %11
%18 = and i64 %1, 512
%19 = icmp eq i64 %18, 0
br i1 %19, label %21, label %20
20: ; preds = %17
store volatile i64 1, i64* inttoptr (i64 1074070600 to i64*)
br label %21
21: ; preds = %20, %17
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char **argv) {
  printf("Hola grupo!!");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hola grupo!!\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hola grupo!!\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
int AMCTimingEventBase_Free(struct AMCTimingEventBase *timeEvBase) {
  return -1;
}


x86 assembly (clang, -O0):
<AMCTimingEventBase_Free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<AMCTimingEventBase_Free>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.AMCTimingEventBase = type opaque
define i32 @AMCTimingEventBase_Free(%struct.AMCTimingEventBase* %0) {
%2 = alloca %struct.AMCTimingEventBase*
store %struct.AMCTimingEventBase* %0, %struct.AMCTimingEventBase** %2
ret i32 -1
}

LLVM IR (-O2):
%struct.AMCTimingEventBase = type opaque
define i32 @AMCTimingEventBase_Free(%struct.AMCTimingEventBase* nocapture readnone %0) {
ret i32 -1
}
/* Type definitions */
typedef int /*<<< orphan*/ __m256i;

/* Variables and functions */
int /*<<< orphan*/ _mm256_store_si256(int /*<<< orphan*/ *,
                                      int /*<<< orphan*/ const);
void yy_store_256(void *const a, const __m256i v) {
  _mm256_store_si256((__m256i *)a, v);
}


x86 assembly (clang, -O0):
<yy_store_256>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <_mm256_store_si256@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yy_store_256>:
jmp    1030 <_mm256_store_si256@plt>

LLVM IR (-O0):
define void @yy_store_256(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %4
%8 = call i32 @_mm256_store_si256(i32* %6, i32 %7)
ret void
}

LLVM IR (-O2):
define void @yy_store_256(i8* %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
%4 = tail call i32 @_mm256_store_si256(i32* %3, i32 %1)
ret void
}
double Cp_ice(double T) {
  T = T - 273.15;
  return 2.0623 + 6.0769e-3 * T;
}


x86 assembly (clang, -O0):
<Cp_ice>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xefa(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xed4(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xed0(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cp_ice>:
addsd  0xef8(%rip),%xmm0
mulsd  0xef8(%rip),%xmm0
addsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @Cp_ice(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fsub double %3, 2.731500e+02
store double %4, double* %2
%5 = load double, double* %2
%6 = call double @llvm.fmuladd.f64(double 6.076900e-03, double %5, double 2.062300e+00)
ret double %6
}

LLVM IR (-O2):
define double @Cp_ice(double %0) {
%2 = fadd double %0, -2.731500e+02
%3 = tail call double @llvm.fmuladd.f64(double %2, double 6.076900e-03, double 2.062300e+00)
ret double %3
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ NOROM_IntRegister(int, void (*)());
void stub1(int);
void I2SIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)) {
  ;
  NOROM_IntRegister(28, pfnHandler);
  ((void (*)(uint32_t ui32Interrupt))(
      (uint32_t *)(((uint32_t *)0x10000180)[12]))[4])(28);
}


x86 assembly (clang, -O0):
<I2SIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    $0x1c,%edi
call   1030 <NOROM_IntRegister@plt>
mov    $0x10000180,%eax
movslq 0x30(%rax),%rax
movslq 0x10(%rax),%rax
mov    $0x1c,%edi
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2SIntRegister>:
push   %rax
mov    $0x1c,%edi
call   1030 <NOROM_IntRegister@plt>
movslq 0x100001b0,%rax
10
movslq 0x10(%rax),%rax
mov    $0x1c,%edi
pop    %rcx
jmp    *%rax

LLVM IR (-O0):
define void @I2SIntRegister(i32 %0, void ()* %1) {
%3 = alloca i32
%4 = alloca void ()*
store i32 %0, i32* %3
store void ()* %1, void ()** %4
%5 = load void ()*, void ()** %4
%6 = bitcast void ()* %5 to void (...)*
%7 = call i32 @NOROM_IntRegister(i32 28, void (...)* %6)
%8 = load i32, i32* getelementptr inbounds (i32, i32* inttoptr (i64 268435840 to i32*), i64 12)
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
%11 = getelementptr inbounds i32, i32* %10, i64 4
%12 = load i32, i32* %11
%13 = sext i32 %12 to i64
%14 = inttoptr i64 %13 to void (i32)*
ret void
}

LLVM IR (-O2):
define void @I2SIntRegister(i32 %0, void ()* %1) {
%3 = bitcast void ()* %1 to void (...)*
%4 = tail call i32 @NOROM_IntRegister(i32 28, void (...)* %3)
%5 = load i32, i32* inttoptr (i64 268435888 to i32*)
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
%8 = getelementptr inbounds i32, i32* %7, i64 4
%9 = load i32, i32* %8
%10 = sext i32 %9 to i64
%11 = inttoptr i64 %10 to void (i32)*
tail call void %11(i32 28)
ret void
}
/* Variables and functions */
long find_array(char *, int, char *, long, long);
long int oradisk_detect(char *buffer, long int buff_size, long int offset) {
  long int loc;
  char label[8] = "ORCLDISK";
  loc = find_array(label, 8, buffer, buff_size, offset);
  return loc;
}


x86 assembly (clang, -O0):
<oradisk_detect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0xed5(%rip),%rax
mov    %rax,-0x28(%rbp)
lea    -0x28(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
mov    $0x8,%esi
call   1030 <find_array@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<oradisk_detect>:
push   %rax
mov    %rdx,%r8
mov    %rsi,%rcx
mov    %rdi,%rdx
movabs $0x4b5349444c43524f,%rax
49 53 4b
mov    %rax,(%rsp)
mov    %rsp,%rdi
mov    $0x8,%esi
call   1030 <find_array@plt>
pop    %rcx
ret

LLVM IR (-O0):
@__const.oradisk_detect.label = [8 x i8] c"ORCLDISK"
define i64 @oradisk_detect(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca [8 x i8]
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%9 = bitcast [8 x i8]* %8 to i8*
%10 = getelementptr inbounds [8 x i8], [8 x i8]* %8, i64 0, i64 0
%11 = load i8*, i8** %4
%12 = load i64, i64* %5
%13 = load i64, i64* %6
%14 = call i64 @find_array(i8* %10, i32 8, i8* %11, i64 %12, i64 %13)
store i64 %14, i64* %7
%15 = load i64, i64* %7
ret i64 %15
}

LLVM IR (-O2):
define i64 @oradisk_detect(i8* %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = bitcast i64* %4 to i8*
store i64 5427762533597663823, i64* %4
%6 = call i64 @find_array(i8* %5, i32 8, i8* %0, i64 %1, i64 %2)
ret i64 %6
}
/* Type definitions */
typedef int u_int16_t;

/* Variables and functions */
u_int16_t byteswap(u_int16_t w) {
  return ((w >> 8) & 0xff) | ((w & 0xff) << 8);
}


x86 assembly (clang, -O0):
<byteswap>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<byteswap>:
rol    $0x8,%di
movzwl %di,%eax
ret

LLVM IR (-O0):
define i32 @byteswap(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 8
%5 = and i32 %4, 255
%6 = load i32, i32* %2
%7 = and i32 %6, 255
%8 = shl i32 %7, 8
%9 = or i32 %5, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @byteswap(i32 %0) {
%2 = trunc i32 %0 to i16
%3 = tail call i16 @llvm.bswap.i16(i16 %2)
%4 = zext i16 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ die(int);
long foo(double);
long bar(long i, double x) {
  if (x < 0)
    die(1);
  return foo(x);
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1149 <bar+0x29>
mov    $0x1,%edi
call   1040 <die@plt>
movsd  -0x10(%rbp),%xmm0
call   1030 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
xorpd  %xmm1,%xmm1
ucomisd %xmm0,%xmm1
jbe    1143 <bar+0x23>
push   %rax
mov    $0x1,%edi
movsd  %xmm0,(%rsp)
call   1040 <die@plt>
movsd  (%rsp),%xmm0
add    $0x8,%rsp
jmp    1030 <foo@plt>

LLVM IR (-O0):
define i64 @bar(i64 %0, double %1) {
%3 = alloca i64
%4 = alloca double
store i64 %0, i64* %3
store double %1, double* %4
%5 = load double, double* %4
%6 = fcmp olt double %5, 0.000000e+00
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = call i32 @die(i32 1)
br label %9
9: ; preds = %7, %2
%10 = load double, double* %4
%11 = call i64 @foo(double %10)
ret i64 %11
}

LLVM IR (-O2):
define i64 @bar(i64 %0, double %1) {
%3 = fcmp olt double %1, 0.000000e+00
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @die(i32 1)
br label %6
6: ; preds = %4, %2
%7 = tail call i64 @foo(double %1)
ret i64 %7
}
unsigned char nic_inb(unsigned short reg) {
  (*((volatile unsigned char *)(0x20000000)) = (reg));
  return (*((volatile unsigned char *)((0x20000000 + 4))));
}


x86 assembly (clang, -O0):
<nic_inb>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%ax
mov    %al,%cl
mov    $0x20000000,%eax
mov    %cl,(%rax)
mov    $0x20000004,%eax
mov    (%rax),%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nic_inb>:
mov    %dil,0x20000000
20
mov    0x20000004,%al
ret

LLVM IR (-O0):
define zeroext i8 @nic_inb(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = trunc i16 %3 to i8
store volatile i8 %4, i8* inttoptr (i64 536870912 to i8*)
%5 = load volatile i8, i8* inttoptr (i64 536870916 to i8*)
ret i8 %5
}

LLVM IR (-O2):
define zeroext i8 @nic_inb(i16 zeroext %0) {
%2 = trunc i16 %0 to i8
store volatile i8 %2, i8* inttoptr (i64 536870912 to i8*)
%3 = load volatile i8, i8* inttoptr (i64 536870916 to i8*)
ret i8 %3
}
/* Variables and functions */
int /*<<< orphan*/ get_proc_cpuinfo_data(char *, char *, int /*<<< orphan*/);
void generic_get_architecture(char *arch) {
  get_proc_cpuinfo_data("arch", arch, 0);
}


x86 assembly (clang, -O0):
<generic_get_architecture>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
xor    %edx,%edx
call   1030 <get_proc_cpuinfo_data@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generic_get_architecture>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
xor    %edx,%edx
jmp    1030 <get_proc_cpuinfo_data@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"arch\00"
define void @generic_get_architecture(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @get_proc_cpuinfo_data(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %3, i32 0)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"arch\00"
define void @generic_get_architecture(i8* %0) {
%2 = tail call i32 @get_proc_cpuinfo_data(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %0, i32 0)
ret void
}
/* Variables and functions */
int __builtin_clz(unsigned int);
int /*<<< orphan*/ gpio_disable_pin(unsigned int);
void lpc_gpio_disable_mask(unsigned int port, unsigned int mask) {
  unsigned int bit;
  unsigned int cur = mask;
  while (cur) {
    bit = 31 - __builtin_clz(cur);
    cur &= ~(1 << bit);
    gpio_disable_pin((((port) << 5) + (bit)));
  }
}


x86 assembly (clang, -O0):
<lpc_gpio_disable_mask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     1167 <lpc_gpio_disable_mask+0x57>
mov    -0x10(%rbp),%eax
bsr    %eax,%ecx
xor    $0x1f,%ecx
mov    $0x1f,%eax
sub    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
and    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
shl    $0x5,%edi
add    -0xc(%rbp),%edi
call   1030 <gpio_disable_pin@plt>
jmp    1124 <lpc_gpio_disable_mask+0x14>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lpc_gpio_disable_mask>:
push   %rbp
push   %r14
push   %rbx
test   %esi,%esi
je     1148 <lpc_gpio_disable_mask+0x38>
mov    %esi,%ebx
mov    %edi,%r14d
shl    $0x5,%r14d
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
bsr    %ebx,%ecx
mov    $0xfffffffe,%ebp
rol    %cl,%ebp
or     %r14d,%ecx
mov    %ecx,%edi
call   1030 <gpio_disable_pin@plt>
and    %ebp,%ebx
jne    1130 <lpc_gpio_disable_mask+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @lpc_gpio_disable_mask(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
store i32 %7, i32* %6
br label %8
8: ; preds = %11, %2
%9 = load i32, i32* %6
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %25
11: ; preds = %8
%12 = load i32, i32* %6
%13 = call i32 @llvm.ctlz.i32(i32 %12, i1 true)
%14 = sub nsw i32 31, %13
store i32 %14, i32* %5
%15 = load i32, i32* %5
%16 = shl i32 1, %15
%17 = xor i32 %16, -1
%18 = load i32, i32* %6
%19 = and i32 %18, %17
store i32 %19, i32* %6
%20 = load i32, i32* %3
%21 = shl i32 %20, 5
%22 = load i32, i32* %5
%23 = add i32 %21, %22
%24 = call i32 @gpio_disable_pin(i32 %23)
br label %8
25: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @lpc_gpio_disable_mask(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %16, label %4
4: ; preds = %2
%5 = shl i32 %0, 5
br label %6
6: ; preds = %4, %6
%7 = phi i32 [ %1, %4 ], [ %12, %6 ]
%8 = tail call i32 @llvm.ctlz.i32(i32 %7, i1 true)
%9 = xor i32 %8, 31
%10 = shl nuw i32 1, %9
%11 = xor i32 %10, -1
%12 = and i32 %7, %11
%13 = or i32 %9, %5
%14 = tail call i32 @gpio_disable_pin(i32 %13)
%15 = icmp eq i32 %12, 0
br i1 %15, label %16, label %6
16: ; preds = %6, %2
ret void
}
/* Type definitions */
struct timeval {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ EINVAL;
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int __utimes(const char *file, const struct timeval tvp[2]) {
  if (file == NULL) {
    __set_errno(EINVAL);
    return -1;
  }
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<__utimes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1145 <__utimes+0x35>
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    115a <__utimes+0x4a>
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__utimes>:
push   %rax
test   %rdi,%rdi
jne    111f <__utimes+0xf>
mov    0x2ebb(%rip),%rax
jmp    1126 <__utimes+0x16>
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timeval = type { i32 }
@EINVAL = global i32 0
@ENOSYS = global i32 0
define i32 @__utimes(i8* %0, %struct.timeval* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca %struct.timeval*
store i8* %0, i8** %4
store %struct.timeval* %1, %struct.timeval** %5
%6 = load i8*, i8** %4
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* @EINVAL
%10 = call i32 @__set_errno(i32 %9)
store i32 -1, i32* %3
br label %14
11: ; preds = %2
%12 = load i32, i32* @ENOSYS
%13 = call i32 @__set_errno(i32 %12)
store i32 -1, i32* %3
br label %14
14: ; preds = %11, %8
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
@EINVAL = global i32 0
@ENOSYS = global i32 0
define i32 @__utimes(i8* readnone %0, %struct.timeval* nocapture readnone %1) {
%3 = icmp eq i8* %0, null
%4 = load i32, i32* @EINVAL
%5 = load i32, i32* @ENOSYS
%6 = select i1 %3, i32 %4, i32 %5
%7 = tail call i32 @__set_errno(i32 %6)
ret i32 -1
}
/* Variables and functions */
scalar_t__ sync();
long SYNC() { return ((long)sync()); }


x86 assembly (clang, -O0):
<SYNC>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sync@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SYNC>:
xor    %eax,%eax
jmp    1030 <sync@plt>

LLVM IR (-O0):
define i64 @SYNC() {
%1 = call i64 (...) @sync()
ret i64 %1
}

LLVM IR (-O2):
define i64 @SYNC() {
%1 = tail call i64 (...) @sync()
ret i64 %1
}
int do_550() { return 550; }


x86 assembly (clang, -O0):
<do_550>:
push   %rbp
mov    %rsp,%rbp
mov    $0x226,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_550>:
mov    $0x226,%eax
ret

LLVM IR (-O0):
define i32 @do_550() {
ret i32 550
}

LLVM IR (-O2):
define i32 @do_550() {
ret i32 550
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void cnative_err_no_memory() {
  printf("Error: Memory not allocatable or no free memory available.\n");
}


x86 assembly (clang, -O0):
<cnative_err_no_memory>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cnative_err_no_memory>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [60 x i8] c"Error: Memory not allocatable or no free memory available.\0A\00"
define void @cnative_err_no_memory() {
%1 = call i32 @printf(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [59 x i8] c"Error: Memory not allocatable or no free memory available.\00"
define void @cnative_err_no_memory() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([59 x i8], [59 x i8]* @str, i64 0, i64 0))
ret void
}
void RTCircBufCreate(void) {}


x86 assembly (clang, -O0):
<RTCircBufCreate>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTCircBufCreate>:
ret

LLVM IR (-O0):
define void @RTCircBufCreate() {
ret void
}

LLVM IR (-O2):
define void @RTCircBufCreate() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ initialize_vals_tables();
int /*<<< orphan*/ set_lvals_and_rvals();
void calc_mutex_num_efs(void) {
  initialize_vals_tables();
  set_lvals_and_rvals();
}


x86 assembly (clang, -O0):
<calc_mutex_num_efs>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <initialize_vals_tables@plt>
mov    $0x0,%al
call   1030 <set_lvals_and_rvals@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc_mutex_num_efs>:
push   %rax
xor    %eax,%eax
call   1040 <initialize_vals_tables@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <set_lvals_and_rvals@plt>

LLVM IR (-O0):
define void @calc_mutex_num_efs() {
%1 = call i32 (...) @initialize_vals_tables()
%2 = call i32 (...) @set_lvals_and_rvals()
ret void
}

LLVM IR (-O2):
define void @calc_mutex_num_efs() {
%1 = tail call i32 (...) @initialize_vals_tables()
%2 = tail call i32 (...) @set_lvals_and_rvals()
ret void
}
void spits(s) char *s;
{
  while (*s)
    spit(*s++);
}


x86 assembly (clang, -O0):
<spits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1147 <spits+0x37>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
mov    $0x0,%al
call   1030 <spit@plt>
jmp    111c <spits+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spits>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1135 <spits+0x25>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
xor    %eax,%eax
call   1030 <spit@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <spits+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @spits(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %2
%10 = load i8, i8* %8
%11 = sext i8 %10 to i32
%12 = call i32 (i32, ...) bitcast (i32 (...)* @spit to i32 (i32, ...)*)(i32 %11)
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @spits(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %10, %4 ], [ %2, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = sext i8 %5 to i32
%9 = tail call i32 (i32, ...) bitcast (i32 (...)* @spit to i32 (i32, ...)*)(i32 %8)
%10 = load i8, i8* %7
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ KeySym;

/* Variables and functions */
int IsFunctionKey(int /*<<< orphan*/);
int x11_extras_IsFunctionKey(KeySym keysym) { return IsFunctionKey(keysym); }


x86 assembly (clang, -O0):
<x11_extras_IsFunctionKey>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <IsFunctionKey@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x11_extras_IsFunctionKey>:
jmp    1030 <IsFunctionKey@plt>

LLVM IR (-O0):
define i32 @x11_extras_IsFunctionKey(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @IsFunctionKey(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @x11_extras_IsFunctionKey(i32 %0) {
%2 = tail call i32 @IsFunctionKey(i32 %0)
ret i32 %2
}
unsigned short SmartMac_ChannelCheckInterval(void) { return 0; }


x86 assembly (clang, -O0):
<SmartMac_ChannelCheckInterval>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SmartMac_ChannelCheckInterval>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i16 @SmartMac_ChannelCheckInterval() {
ret i16 0
}

LLVM IR (-O2):
define zeroext i16 @SmartMac_ChannelCheckInterval() {
ret i16 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct nlmsghdr {
  int /*<<< orphan*/ nlmsg_type;
};

/* Variables and functions */
int /*<<< orphan*/ NLMSG_OK(struct nlmsghdr *, size_t);
uint32_t parse_nl_msg(void *buf, size_t len) {
  struct nlmsghdr *nl = NULL;
  nl = (struct nlmsghdr *)buf;
  if (!NLMSG_OK(nl, len))
    return 0;
  return nl->nlmsg_type;
}


x86 assembly (clang, -O0):
<parse_nl_msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <NLMSG_OK@plt>
cmp    $0x0,%eax
jne    1152 <parse_nl_msg+0x42>
movl   $0x0,-0x4(%rbp)
jmp    115b <parse_nl_msg+0x4b>
mov    -0x20(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_nl_msg>:
push   %rbx
mov    %rdi,%rbx
call   1030 <NLMSG_OK@plt>
test   %eax,%eax
je     1121 <parse_nl_msg+0x11>
mov    (%rbx),%eax
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.nlmsghdr = type { i32 }
define i32 @parse_nl_msg(i8* %0, i64 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i64
%6 = alloca %struct.nlmsghdr*
store i8* %0, i8** %4
store i64 %1, i64* %5
store %struct.nlmsghdr* null, %struct.nlmsghdr** %6
%7 = load i8*, i8** %4
%8 = bitcast i8* %7 to %struct.nlmsghdr*
store %struct.nlmsghdr* %8, %struct.nlmsghdr** %6
%9 = load %struct.nlmsghdr*, %struct.nlmsghdr** %6
%10 = load i64, i64* %5
%11 = call i32 @NLMSG_OK(%struct.nlmsghdr* %9, i64 %10)
%12 = icmp ne i32 %11, 0
br i1 %12, label %14, label %13
13: ; preds = %2
store i32 0, i32* %3
br label %18
14: ; preds = %2
%15 = load %struct.nlmsghdr*, %struct.nlmsghdr** %6
%16 = getelementptr inbounds %struct.nlmsghdr, %struct.nlmsghdr* %15, i32 0, i32 0
%17 = load i32, i32* %16
store i32 %17, i32* %3
br label %18
18: ; preds = %14, %13
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
%struct.nlmsghdr = type { i32 }
define i32 @parse_nl_msg(i8* %0, i64 %1) {
%3 = bitcast i8* %0 to %struct.nlmsghdr*
%4 = tail call i32 @NLMSG_OK(%struct.nlmsghdr* %3, i64 %1)
%5 = icmp eq i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %2
%7 = bitcast i8* %0 to i32*
%8 = load i32, i32* %7
br label %9
9: ; preds = %2, %6
%10 = phi i32 [ %8, %6 ], [ 0, %2 ]
ret i32 %10
}
int popcnt(unsigned int u) {
  int count = 0;
  while (u) {
    u &= u - 1;
    count++;
  }
  return count;
}


x86 assembly (clang, -O0):
<popcnt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1132 <popcnt+0x32>
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
and    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <popcnt+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<popcnt>:
xor    %eax,%eax
test   %edi,%edi
je     111c <popcnt+0x1c>
cs nopw 0x0(%rax,%rax,1)
lea    -0x1(%rdi),%ecx
add    $0x1,%eax
and    %edi,%ecx
mov    %ecx,%edi
jne    1110 <popcnt+0x10>
ret

LLVM IR (-O0):
define i32 @popcnt(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, i32* %2
%9 = sub i32 %8, 1
%10 = load i32, i32* %2
%11 = and i32 %10, %9
store i32 %11, i32* %2
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @popcnt(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ 0, %1 ]
%5 = phi i32 [ %7, %3 ], [ %0, %1 ]
%6 = add i32 %5, -1
%7 = and i32 %6, %5
%8 = add nuw nsw i32 %4, 1
%9 = icmp eq i32 %7, 0
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %8, %3 ]
ret i32 %11
}
extern void cop_reset(void) {
  *(volatile unsigned char *)(0 + 0x3f) = 0x55;
  *(volatile unsigned char *)(0 + 0x3f) = 0xAA;
}


x86 assembly (clang, -O0):
<cop_reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3f,%eax
movb   $0x55,(%rax)
mov    $0x3f,%eax
movb   $0xaa,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cop_reset>:
movb   $0x55,0x3f
55
movb   $0xaa,0x3f
aa
ret

LLVM IR (-O0):
define void @cop_reset() {
store volatile i8 85, i8* inttoptr (i64 63 to i8*)
store volatile i8 -86, i8* inttoptr (i64 63 to i8*)
ret void
}

LLVM IR (-O2):
define void @cop_reset() {
store volatile i8 85, i8* inttoptr (i64 63 to i8*)
store volatile i8 -86, i8* inttoptr (i64 63 to i8*)
ret void
}
double vde_chain_nm10_sign(double x) { return x < 0 ? -1 : x > 0 ? 1 : x; }


x86 assembly (clang, -O0):
<vde_chain_nm10_sign>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    1129 <vde_chain_nm10_sign+0x29>
movsd  0xee9(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    1161 <vde_chain_nm10_sign+0x61>
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    114d <vde_chain_nm10_sign+0x4d>
movsd  0xebd(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1157 <vde_chain_nm10_sign+0x57>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<vde_chain_nm10_sign>:
xorpd  %xmm1,%xmm1
xorpd  %xmm2,%xmm2
cmpltsd %xmm0,%xmm2
movsd  0xeeb(%rip),%xmm3
andpd  %xmm2,%xmm3
andnpd %xmm0,%xmm2
orpd   %xmm3,%xmm2
cmpltsd %xmm1,%xmm0
movapd %xmm0,%xmm1
andnpd %xmm2,%xmm1
movsd  0xed2(%rip),%xmm2
andpd  %xmm2,%xmm0
orpd   %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @vde_chain_nm10_sign(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp olt double %3, 0.000000e+00
br i1 %4, label %5, label %6
5: ; preds = %1
br label %14
6: ; preds = %1
%7 = load double, double* %2
%8 = fcmp ogt double %7, 0.000000e+00
br i1 %8, label %9, label %10
9: ; preds = %6
br label %12
10: ; preds = %6
%11 = load double, double* %2
br label %12
12: ; preds = %10, %9
%13 = phi double [ 1.000000e+00, %9 ], [ %11, %10 ]
br label %14
14: ; preds = %12, %5
%15 = phi double [ -1.000000e+00, %5 ], [ %13, %12 ]
ret double %15
}

LLVM IR (-O2):
define double @vde_chain_nm10_sign(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
%3 = fcmp ogt double %0, 0.000000e+00
%4 = select i1 %3, double 1.000000e+00, double %0
%5 = select i1 %2, double -1.000000e+00, double %4
ret double %5
}
void pointer2(int *const a) {
  int b;
  *a = *a + 1;
}


x86 assembly (clang, -O0):
<pointer2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pointer2>:
addl   $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @pointer2(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
%6 = add nsw i32 %5, 1
%7 = load i32*, i32** %2
store i32 %6, i32* %7
ret void
}

LLVM IR (-O2):
define void @pointer2(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = add nsw i32 %2, 1
store i32 %3, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *,
                           unsigned int, char const *);
int /*<<< orphan*/ stderr;
void log_failed_assert(const char *filename, unsigned int line,
                       const char *msg) {
  fprintf(stderr, "%s.%d: %s\n", filename, line, msg);
  fflush(stderr);
  abort();
}


x86 assembly (clang, -O0):
<log_failed_assert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2e96(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%r8
lea    0xea2(%rip),%rsi
call   1040 <fprintf@plt>
mov    0x2e76(%rip),%rax
mov    (%rax),%edi
call   1050 <fflush@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<log_failed_assert>:
push   %rbx
mov    %rdx,%r8
mov    %esi,%ecx
mov    %rdi,%rdx
mov    0x2ea0(%rip),%rbx
mov    (%rbx),%edi
lea    0xeb7(%rip),%rsi
call   1040 <fprintf@plt>
mov    (%rbx),%edi
call   1050 <fflush@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [11 x i8] c"%s.%d: %s\0A\00"
define void @log_failed_assert(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* @stderr
%8 = load i8*, i8** %4
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %8, i32 %9, i8* %10)
%12 = load i32, i32* @stderr
%13 = call i32 @fflush(i32 %12)
%14 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [11 x i8] c"%s.%d: %s\0A\00"
define void @log_failed_assert(i8* %0, i32 %1, i8* %2) {
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1, i8* %2)
%6 = load i32, i32* @stderr
%7 = tail call i32 @fflush(i32 %6)
%8 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ lua_pushstring(int /*<<< orphan*/);
int /*<<< orphan*/ tmpnam(int /*<<< orphan*/ *);
void io_tmpname(void) { lua_pushstring(tmpnam(NULL)); }


x86 assembly (clang, -O0):
<io_tmpname>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1030 <tmpnam@plt>
mov    %eax,%edi
call   1040 <lua_pushstring@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<io_tmpname>:
push   %rax
xor    %edi,%edi
call   1030 <tmpnam@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <lua_pushstring@plt>

LLVM IR (-O0):
define void @io_tmpname() {
%1 = call i32 @tmpnam(i32* null)
%2 = call i32 @lua_pushstring(i32 %1)
ret void
}

LLVM IR (-O2):
define void @io_tmpname() {
%1 = tail call i32 @tmpnam(i32* null)
%2 = tail call i32 @lua_pushstring(i32 %1)
ret void
}
void handle_63(sig) int sig;
{}


x86 assembly (clang, -O0):
<handle_63>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_63>:
ret

LLVM IR (-O0):
define void @handle_63(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @handle_63(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ drv_RB_data(char const *, int const, int);
int /*<<< orphan*/ drv_RB_goto(int const, int const);
void drv_RB_write(const int row, const int col, const char *data,
                  const int len) {
  drv_RB_goto(row, col);
  drv_RB_data(data, len, 80);
}


x86 assembly (clang, -O0):
<drv_RB_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <drv_RB_goto@plt>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    $0x50,%edx
call   1030 <drv_RB_data@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drv_RB_write>:
push   %rbp
push   %rbx
push   %rax
mov    %ecx,%ebp
mov    %rdx,%rbx
call   1040 <drv_RB_goto@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    $0x50,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <drv_RB_data@plt>

LLVM IR (-O0):
define void @drv_RB_write(i32 %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @drv_RB_goto(i32 %9, i32 %10)
%12 = load i8*, i8** %7
%13 = load i32, i32* %8
%14 = call i32 @drv_RB_data(i8* %12, i32 %13, i32 80)
ret void
}

LLVM IR (-O2):
define void @drv_RB_write(i32 %0, i32 %1, i8* %2, i32 %3) {
%5 = tail call i32 @drv_RB_goto(i32 %0, i32 %1)
%6 = tail call i32 @drv_RB_data(i8* %2, i32 %3, i32 80)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct block_dev_type {
  int dummy;
};
typedef int int32_t;

/* Variables and functions */
int32_t ramdisk_ioctl(struct block_dev_type *dev, uint32_t cmd, uint32_t three,
                      uint32_t four) {
  return -25;
}


x86 assembly (clang, -O0):
<ramdisk_ioctl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    $0xffffffe7,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ramdisk_ioctl>:
mov    $0xffffffe7,%eax
ret

LLVM IR (-O0):
%struct.block_dev_type = type { i32 }
define i32 @ramdisk_ioctl(%struct.block_dev_type* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca %struct.block_dev_type*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store %struct.block_dev_type* %0, %struct.block_dev_type** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret i32 -25
}

LLVM IR (-O2):
%struct.block_dev_type = type { i32 }
define i32 @ramdisk_ioctl(%struct.block_dev_type* nocapture readnone %0, i32 %1, i32 %2, i32 %3) {
ret i32 -25
}