xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0x44() {
  Assert_real((isodigit(68) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              345, ("isodigit should be 0 for D"));
}


x86 assembly (clang, -O0):
<t_isodigit_0x44>:
push   %rbp
mov    %rsp,%rbp
mov    $0x44,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x159,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0x44>:
push   %rax
mov    $0x44,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x159,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 0 for D\00"
define void @t_isodigit_0x44() {
%1 = call i64 @isodigit(i32 68)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 345, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 0 for D\00"
define void @t_isodigit_0x44() {
%1 = tail call i64 @isodigit(i32 68)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 345, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
unsigned int prgm_get_unique_id(void) {
  static unsigned int unique = 0;
  return unique++;
}


x86 assembly (clang, -O0):
<prgm_get_unique_id>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f1a(%rip),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,0x2f0f(%rip)
pop    %rbp
ret

x86 assembly (clang, -O2):
<prgm_get_unique_id>:
mov    0x2f1e(%rip),%eax
lea    0x1(%rax),%ecx
mov    %ecx,0x2f15(%rip)
ret

LLVM IR (-O0):
@prgm_get_unique_id.unique = internal global i32 0
define i32 @prgm_get_unique_id() {
%1 = load i32, i32* @prgm_get_unique_id.unique
%2 = add i32 %1, 1
store i32 %2, i32* @prgm_get_unique_id.unique
ret i32 %1
}

LLVM IR (-O2):
@prgm_get_unique_id.unique = internal unnamed_addr global i32 0
define i32 @prgm_get_unique_id() {
%1 = load i32, i32* @prgm_get_unique_id.unique
%2 = add i32 %1, 1
store i32 %2, i32* @prgm_get_unique_id.unique
ret i32 %1
}
__attribute__((always_)) void outsb(int port, const void *addr,
                                    unsigned long count) {
  asm volatile("rep; outs"
               "b"
               : "+S"(addr), "+c"(count)
               : "d"(port));
}


x86 assembly (clang, -O0):
<outsb>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
mov    -0x4(%rbp),%edx
rep outsb %ds:(%rsi),(%dx)
mov    %rsi,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outsb>:
mov    %rdx,%rcx
mov    %edi,%edx
rep outsb %ds:(%rsi),(%dx)
ret

LLVM IR (-O0):
define void @outsb(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i64, i64* %6
%9 = load i32, i32* %4
%10 = call { i8*, i64 } asm sideeffect "rep; outsb", "={si},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i32 %9, i8* %7, i64 %8)
%11 = extractvalue { i8*, i64 } %10, 0
%12 = extractvalue { i8*, i64 } %10, 1
store i8* %11, i8** %5
store i64 %12, i64* %6
ret void
}

LLVM IR (-O2):
define void @outsb(i32 %0, i8* %1, i64 %2) {
%4 = tail call { i8*, i64 } asm sideeffect "rep; outsb", "={si},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* %1, i64 %2)
ret void
}
/* Variables and functions */
unsigned char *hmac_ripemd320(unsigned char *, unsigned char const *, size_t,
                              unsigned char const *, size_t);
unsigned char *mac_hmac_ripemd320(unsigned char *out, const unsigned char *key,
                                  size_t key_len, const unsigned char *msg,
                                  size_t msg_len) {
  return hmac_ripemd320(out, key, key_len, msg, msg_len);
}


x86 assembly (clang, -O0):
<mac_hmac_ripemd320>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
call   1030 <hmac_ripemd320@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mac_hmac_ripemd320>:
jmp    1030 <hmac_ripemd320@plt>

LLVM IR (-O0):
define i8* @mac_hmac_ripemd320(i8* %0, i8* %1, i64 %2, i8* %3, i64 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i8*
%10 = alloca i64
store i8* %0, i8** %6
store i8* %1, i8** %7
store i64 %2, i64* %8
store i8* %3, i8** %9
store i64 %4, i64* %10
%11 = load i8*, i8** %6
%12 = load i8*, i8** %7
%13 = load i64, i64* %8
%14 = load i8*, i8** %9
%15 = load i64, i64* %10
%16 = call i8* @hmac_ripemd320(i8* %11, i8* %12, i64 %13, i8* %14, i64 %15)
ret i8* %16
}

LLVM IR (-O2):
define i8* @mac_hmac_ripemd320(i8* %0, i8* %1, i64 %2, i8* %3, i64 %4) {
%6 = tail call i8* @hmac_ripemd320(i8* %0, i8* %1, i64 %2, i8* %3, i64 %4)
ret i8* %6
}
int bitcount4(unsigned int num) {
  int count = 0;
  static int nibblebits[] = {0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4};
  for (; num != 0; num >>= 4)
    count += nibblebits[num & 0x0f];
  return count;
}


x86 assembly (clang, -O0):
<bitcount4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1140 <bitcount4+0x40>
mov    -0x4(%rbp),%eax
and    $0xf,%eax
mov    %eax,%eax
mov    %eax,%ecx
lea    0x2f07(%rip),%rax
mov    (%rax,%rcx,4),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x4,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <bitcount4+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitcount4>:
xor    %eax,%eax
test   %edi,%edi
je     1122 <bitcount4+0x22>
lea    0xef3(%rip),%rcx
mov    %edi,%edx
nop
mov    %edi,%esi
and    $0xf,%esi
add    (%rcx,%rsi,4),%eax
shr    $0x4,%edx
cmp    $0xf,%edi
mov    %edx,%edi
ja     1110 <bitcount4+0x10>
ret

LLVM IR (-O0):
@bitcount4.nibblebits = internal global [16 x i32] [i32 0, i32 1, i32 1, i32 2, i32 1, i32 2, i32 2, i32 3, i32 1, i32 2, i32 2, i32 3, i32 2, i32 3, i32 3, i32 4]
define i32 @bitcount4(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %15, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %18
7: ; preds = %4
%8 = load i32, i32* %2
%9 = and i32 %8, 15
%10 = zext i32 %9 to i64
%11 = getelementptr inbounds [16 x i32], [16 x i32]* @bitcount4.nibblebits, i64 0, i64 %10
%12 = load i32, i32* %11
%13 = load i32, i32* %3
%14 = add nsw i32 %13, %12
store i32 %14, i32* %3
br label %15
15: ; preds = %7
%16 = load i32, i32* %2
%17 = lshr i32 %16, 4
store i32 %17, i32* %2
br label %4
18: ; preds = %4
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
@bitcount4.nibblebits = internal unnamed_addr constant [16 x i32] [i32 0, i32 1, i32 1, i32 2, i32 1, i32 2, i32 2, i32 3, i32 1, i32 2, i32 2, i32 3, i32 2, i32 3, i32 3, i32 4]
define i32 @bitcount4(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %10, %3 ], [ 0, %1 ]
%5 = phi i32 [ %11, %3 ], [ %0, %1 ]
%6 = and i32 %5, 15
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds [16 x i32], [16 x i32]* @bitcount4.nibblebits, i64 0, i64 %7
%9 = load i32, i32* %8
%10 = add nsw i32 %9, %4
%11 = lshr i32 %5, 4
%12 = icmp ult i32 %5, 16
br i1 %12, label %13, label %3
13: ; preds = %3, %1
%14 = phi i32 [ 0, %1 ], [ %10, %3 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
void uninit2() {
  int *array;
  free(array);
}


x86 assembly (clang, -O0):
<uninit2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninit2>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @uninit2() {
%1 = alloca i32*
%2 = load i32*, i32** %1
%3 = call i32 @free(i32* %2)
ret void
}

LLVM IR (-O2):
define void @uninit2() {
%1 = tail call i32 @free(i32* undef)
ret void
}
void canvas_undo_check_canvas_pointers(struct _glist *x) {}


x86 assembly (clang, -O0):
<canvas_undo_check_canvas_pointers>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<canvas_undo_check_canvas_pointers>:
ret

LLVM IR (-O0):
%struct._glist = type opaque
define void @canvas_undo_check_canvas_pointers(%struct._glist* %0) {
%2 = alloca %struct._glist*
store %struct._glist* %0, %struct._glist** %2
ret void
}

LLVM IR (-O2):
%struct._glist = type opaque
define void @canvas_undo_check_canvas_pointers(%struct._glist* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ portctl(char, int, char *);
int fanon() {
  int pin = 1;
  char mask = 0x20;
  portctl(mask, pin, "fanon");
  return 1;
}


x86 assembly (clang, -O0):
<fanon>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
movb   $0x20,-0x5(%rbp)
mov    -0x5(%rbp),%al
mov    -0x4(%rbp),%esi
lea    0xed0(%rip),%rdx
movsbl %al,%edi
call   1030 <portctl@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fanon>:
push   %rax
lea    0xee8(%rip),%rdx
mov    $0x20,%edi
mov    $0x1,%esi
call   1030 <portctl@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"fanon\00"
define i32 @fanon() {
%1 = alloca i32
%2 = alloca i8
store i32 1, i32* %1
store i8 32, i8* %2
%3 = load i8, i8* %2
%4 = load i32, i32* %1
%5 = call i32 @portctl(i8 signext %3, i32 %4, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@.str = [6 x i8] c"fanon\00"
define i32 @fanon() {
%1 = tail call i32 @portctl(i8 signext 32, i32 1, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int main(int argc, char *argv[]) {
  while (argc > 1) {
    printf("%s ", argv[1]);
    argc--;
    argv++;
  }
  printf("\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    1160 <main+0x50>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rsi
lea    0xec1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x10(%rbp)
jmp    1126 <main+0x16>
lea    0xe9d(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r14
push   %rbx
cmp    $0x2,%edi
jl     1159 <main+0x39>
mov    %rsi,%rbx
mov    %edi,%ebp
add    $0x8,%rbx
add    $0x1,%ebp
lea    0xec4(%rip),%r14
nopl   0x0(%rax)
mov    (%rbx),%rsi
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x8,%rbx
add    $0xffffffff,%ebp
cmp    $0x2,%ebp
ja     1140 <main+0x20>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s \00"
@.str.1 = [2 x i8] c"\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
br label %6
6: ; preds = %9, %2
%7 = load i32, i32* %4
%8 = icmp sgt i32 %7, 1
br i1 %8, label %9, label %18
9: ; preds = %6
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 1
%12 = load i8*, i8** %11
%13 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %12)
%14 = load i32, i32* %4
%15 = add nsw i32 %14, -1
store i32 %15, i32* %4
%16 = load i8**, i8*** %5
%17 = getelementptr inbounds i8*, i8** %16, i32 1
store i8** %17, i8*** %5
br label %6
18: ; preds = %6
%19 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s \00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %12
4: ; preds = %2, %4
%5 = phi i8** [ %7, %4 ], [ %1, %2 ]
%6 = phi i32 [ %10, %4 ], [ %0, %2 ]
%7 = getelementptr inbounds i8*, i8** %5, i64 1
%8 = load i8*, i8** %7
%9 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %8)
%10 = add nsw i32 %6, -1
%11 = icmp ugt i32 %6, 2
br i1 %11, label %4, label %12
12: ; preds = %4, %2
%13 = tail call i32 @putchar(i32 10)
ret i32 0
}
void vmwHlin(int x1, int x2, int y, int color, unsigned char *buffer) {
  int x, output_pointer;
  output_pointer = (y * 640);
  for (x = x1; x < x2; x++) {
    buffer[output_pointer + x] = color;
  }
}


x86 assembly (clang, -O0):
<vmwHlin>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
imul   $0x280,-0xc(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1153 <vmwHlin+0x53>
mov    -0x10(%rbp),%eax
mov    %al,%dl
mov    -0x18(%rbp),%rax
mov    -0x20(%rbp),%ecx
add    -0x1c(%rbp),%ecx
movslq %ecx,%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1124 <vmwHlin+0x24>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vmwHlin>:
cmp    %esi,%edi
jge    113e <vmwHlin+0x2e>
push   %rax
mov    %edi,%eax
lea    (%rdx,%rdx,4),%edx
shl    $0x7,%edx
add    %edi,%edx
movslq %edx,%rdx
add    %rdx,%r8
not    %eax
add    %esi,%eax
add    $0x1,%rax
mov    %r8,%rdi
mov    %ecx,%esi
mov    %rax,%rdx
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @vmwHlin(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i8*
%11 = alloca i32
%12 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i8* %4, i8** %10
%13 = load i32, i32* %8
%14 = mul nsw i32 %13, 640
store i32 %14, i32* %12
%15 = load i32, i32* %6
store i32 %15, i32* %11
br label %16
16: ; preds = %29, %5
%17 = load i32, i32* %11
%18 = load i32, i32* %7
%19 = icmp slt i32 %17, %18
br i1 %19, label %20, label %32
20: ; preds = %16
%21 = load i32, i32* %9
%22 = trunc i32 %21 to i8
%23 = load i8*, i8** %10
%24 = load i32, i32* %12
%25 = load i32, i32* %11
%26 = add nsw i32 %24, %25
%27 = sext i32 %26 to i64
%28 = getelementptr inbounds i8, i8* %23, i64 %27
store i8 %22, i8* %28
br label %29
29: ; preds = %20
%30 = load i32, i32* %11
%31 = add nsw i32 %30, 1
store i32 %31, i32* %11
br label %16
32: ; preds = %16
ret void
}

LLVM IR (-O2):
define void @vmwHlin(i32 %0, i32 %1, i32 %2, i32 %3, i8* nocapture writeonly %4) {
%6 = icmp slt i32 %0, %1
br i1 %6, label %7, label %17
7: ; preds = %5
%8 = mul i32 %2, 640
%9 = trunc i32 %3 to i8
%10 = add i32 %8, %0
%11 = sext i32 %10 to i64
%12 = getelementptr i8, i8* %4, i64 %11
%13 = xor i32 %0, -1
%14 = add i32 %13, %1
%15 = zext i32 %14 to i64
%16 = add nuw nsw i64 %15, 1
br label %17
17: ; preds = %7, %5
ret void
}
int is_all_whitespaces(char *str) {
  while (*str) {
    if (!((*str == ' ') || (*str == '\t')))
      return 0;
    ++str;
  }
  return 1;
}


x86 assembly (clang, -O0):
<is_all_whitespaces>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1152 <is_all_whitespaces+0x52>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
je     1141 <is_all_whitespaces+0x41>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x9,%eax
je     1141 <is_all_whitespaces+0x41>
movl   $0x0,-0x4(%rbp)
jmp    1159 <is_all_whitespaces+0x59>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1108 <is_all_whitespaces+0x8>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_all_whitespaces>:
jmp    1114 <is_all_whitespaces+0x14>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
add    $0x1,%rdi
movzbl (%rdi),%eax
cmp    $0x9,%al
je     1110 <is_all_whitespaces+0x10>
cmp    $0x20,%al
je     1110 <is_all_whitespaces+0x10>
test   %al,%al
jne    1129 <is_all_whitespaces+0x29>
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_all_whitespaces(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %19, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %22
8: ; preds = %4
%9 = load i8*, i8** %3
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 32
br i1 %12, label %19, label %13
13: ; preds = %8
%14 = load i8*, i8** %3
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 9
br i1 %17, label %19, label %18
18: ; preds = %13
store i32 0, i32* %2
br label %23
19: ; preds = %13, %8
%20 = load i8*, i8** %3
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %3
br label %4
22: ; preds = %4
store i32 1, i32* %2
br label %23
23: ; preds = %22, %18
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @is_all_whitespaces(i8* nocapture %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i8* [ %0, %1 ], [ %6, %5 ]
%4 = load i8, i8* %3
switch i8 %4, label %7 [
i8 0, label %8
i8 32, label %5
i8 9, label %5
]
5: ; preds = %2, %2
%6 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
7: ; preds = %2
br label %8
8: ; preds = %2, %7
%9 = phi i32 [ 0, %7 ], [ 1, %2 ]
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ opt;

/* Variables and functions */
int /*<<< orphan*/ IPPROTO_IP;
int /*<<< orphan*/ IP_TOS;
scalar_t__ setsockopt(int, int /*<<< orphan*/, int /*<<< orphan*/,
                      unsigned int *, int);
int os_set_tos(int fd, int tos) {
  unsigned int opt = tos;
  return (0 == setsockopt(fd, IPPROTO_IP, IP_TOS, &opt, sizeof(opt)));
}


x86 assembly (clang, -O0):
<os_set_tos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eba(%rip),%rax
mov    (%rax),%esi
mov    0x2ea9(%rip),%rax
mov    (%rax),%edx
lea    -0xc(%rbp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_set_tos>:
push   %rax
mov    %esi,0x4(%rsp)
mov    0x2ecc(%rip),%rax
mov    (%rax),%esi
mov    0x2ebb(%rip),%rax
mov    (%rax),%edx
lea    0x4(%rsp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@IPPROTO_IP = global i32 0
@IP_TOS = global i32 0
define i32 @os_set_tos(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
store i32 %6, i32* %5
%7 = load i32, i32* %3
%8 = load i32, i32* @IPPROTO_IP
%9 = load i32, i32* @IP_TOS
%10 = call i64 @setsockopt(i32 %7, i32 %8, i32 %9, i32* %5, i32 4)
%11 = icmp eq i64 0, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
@IPPROTO_IP = global i32 0
@IP_TOS = global i32 0
define i32 @os_set_tos(i32 %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
store i32 %1, i32* %3
%5 = load i32, i32* @IPPROTO_IP
%6 = load i32, i32* @IP_TOS
%7 = call i64 @setsockopt(i32 %0, i32 %5, i32 %6, i32* %3, i32 4)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, long, char const *,
                           unsigned long);
void dumpAddr(FILE *p, const char *desc, const void *addr) {
  fprintf(p, "0x%08lX %-32s\t%lu\n", (long)addr, desc, (unsigned long)addr);
}


x86 assembly (clang, -O0):
<dumpAddr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
lea    0xec5(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dumpAddr>:
mov    %rsi,%rcx
lea    0xee6(%rip),%rsi
mov    %rdx,%r8
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"0x%08lX %-32s\09%lu\0A\00"
define void @dumpAddr(i32* %0, i8* %1, i8* %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i8*
store i32* %0, i32** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i32*, i32** %4
%8 = load i8*, i8** %6
%9 = ptrtoint i8* %8 to i64
%10 = load i8*, i8** %5
%11 = load i8*, i8** %6
%12 = ptrtoint i8* %11 to i64
%13 = call i32 @fprintf(i32* %7, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i64 %9, i8* %10, i64 %12)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"0x%08lX %-32s\09%lu\0A\00"
define void @dumpAddr(i32* nocapture %0, i8* %1, i8* %2) {
%4 = ptrtoint i8* %2 to i64
%5 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i64 %4, i8* %1, i64 %4)
ret void
}
/* Variables and functions */
scalar_t__ COND_CC();
int /*<<< orphan*/ EA_AY_DI_8();
int /*<<< orphan*/ m68ki_write_8(int /*<<< orphan*/, int);
void m68k_op_scc_8_di(void) {
  m68ki_write_8(EA_AY_DI_8(), COND_CC() ? 0xff : 0);
}


x86 assembly (clang, -O0):
<m68k_op_scc_8_di>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <EA_AY_DI_8@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <COND_CC@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rcx
xor    %esi,%esi
mov    $0xff,%eax
cmp    $0x0,%rcx
cmovne %eax,%esi
call   1050 <m68ki_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_scc_8_di>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %eax,%eax
call   1040 <EA_AY_DI_8@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <COND_CC@plt>
test   %rax,%rax
mov    $0xff,%esi
cmove  %ebp,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <m68ki_write_8@plt>

LLVM IR (-O0):
define void @m68k_op_scc_8_di() {
%1 = call i32 (...) @EA_AY_DI_8()
%2 = call i64 (...) @COND_CC()
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 255, i32 0
%6 = call i32 @m68ki_write_8(i32 %1, i32 %5)
ret void
}

LLVM IR (-O2):
define void @m68k_op_scc_8_di() {
%1 = tail call i32 (...) @EA_AY_DI_8()
%2 = tail call i64 (...) @COND_CC()
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 0, i32 255
%5 = tail call i32 @m68ki_write_8(i32 %1, i32 %4)
ret void
}
int dereference_bad() {
  int *p;
  return *p;
}


x86 assembly (clang, -O0):
<dereference_bad>:
push   %rbp
mov    %rsp,%rbp
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dereference_bad>:
ret

LLVM IR (-O0):
define i32 @dereference_bad() {
%1 = alloca i32*
%2 = load i32*, i32** %1
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @dereference_bad() {
ret i32 undef
}
void int_fun2(void) {}


x86 assembly (clang, -O0):
<int_fun2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_fun2>:
ret

LLVM IR (-O0):
define void @int_fun2() {
ret void
}

LLVM IR (-O2):
define void @int_fun2() {
ret void
}
double min(double a, double b) {
  if (a > b)
    return b;
  else
    return a;
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
ucomisd -0x18(%rbp),%xmm0
jbe    112d <min+0x2d>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1137 <min+0x37>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
minsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @min(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %4
%7 = load double, double* %5
%8 = fcmp ogt double %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load double, double* %5
store double %10, double* %3
br label %13
11: ; preds = %2
%12 = load double, double* %4
store double %12, double* %3
br label %13
13: ; preds = %11, %9
%14 = load double, double* %3
ret double %14
}

LLVM IR (-O2):
define double @min(double %0, double %1) {
%3 = fcmp ogt double %0, %1
%4 = select i1 %3, double %1, double %0
ret double %4
}
__attribute__((always_)) void debug_dma_sync_sg_for_cpu(struct device *dev,
                                                        struct scatterlist *sg,
                                                        int nelems,
                                                        int direction) {}


x86 assembly (clang, -O0):
<debug_dma_sync_sg_for_cpu>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_dma_sync_sg_for_cpu>:
ret

LLVM IR (-O0):
%struct.device = type opaque
%struct.scatterlist = type opaque
define void @debug_dma_sync_sg_for_cpu(%struct.device* %0, %struct.scatterlist* %1, i32 %2, i32 %3) {
%5 = alloca %struct.device*
%6 = alloca %struct.scatterlist*
%7 = alloca i32
%8 = alloca i32
store %struct.device* %0, %struct.device** %5
store %struct.scatterlist* %1, %struct.scatterlist** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret void
}

LLVM IR (-O2):
%struct.device = type opaque
%struct.scatterlist = type opaque
define void @debug_dma_sync_sg_for_cpu(%struct.device* nocapture %0, %struct.scatterlist* nocapture %1, i32 %2, i32 %3) {
ret void
}
unsigned int lendianWriteInt(unsigned char b[]) {
  unsigned int i;
  i = (b[3] << 24) | (b[2] << 16) | (b[1] << 8) | b[0];
  return i;
}


x86 assembly (clang, -O0):
<lendianWriteInt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x3(%rax),%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lendianWriteInt>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @lendianWriteInt(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 3
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = shl i32 %7, 24
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 2
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 16
%14 = or i32 %8, %13
%15 = load i8*, i8** %2
%16 = getelementptr inbounds i8, i8* %15, i64 1
%17 = load i8, i8* %16
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = or i32 %14, %19
%21 = load i8*, i8** %2
%22 = getelementptr inbounds i8, i8* %21, i64 0
%23 = load i8, i8* %22
%24 = zext i8 %23 to i32
%25 = or i32 %20, %24
store i32 %25, i32* %3
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @lendianWriteInt(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 3
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = shl nuw i32 %4, 24
%6 = getelementptr inbounds i8, i8* %0, i64 2
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = shl nuw nsw i32 %8, 16
%10 = or i32 %9, %5
%11 = getelementptr inbounds i8, i8* %0, i64 1
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = shl nuw nsw i32 %13, 8
%15 = or i32 %10, %14
%16 = load i8, i8* %0
%17 = zext i8 %16 to i32
%18 = or i32 %15, %17
ret i32 %18
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ ascent;
};
struct TYPE_4__ {
  TYPE_1__ max_bounds;
};
typedef TYPE_2__ XFontStruct;

/* Variables and functions */
short get_XFontStruct_max_bounds_ascent(void *_p) {
  return (short)((XFontStruct *)_p)->max_bounds.ascent;
}


x86 assembly (clang, -O0):
<get_XFontStruct_max_bounds_ascent>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XFontStruct_max_bounds_ascent>:
movzwl (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define signext i16 @get_XFontStruct_max_bounds_ascent(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i16
ret i16 %8
}

LLVM IR (-O2):
define signext i16 @get_XFontStruct_max_bounds_ascent(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i16
ret i16 %4
}
/* Variables and functions */
int SIGALRM;
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void sig_handler(int signum) {
  if (signum == SIGALRM) {
    fprintf(stderr, "[parent] recv SIGALRM signal!\n");
  }
}


x86 assembly (clang, -O0):
<sig_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ec3(%rip),%rcx
cmp    (%rcx),%eax
jne    1142 <sig_handler+0x32>
mov    0x2ea4(%rip),%rax
mov    (%rax),%edi
lea    0xec3(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_handler>:
mov    0x2ed1(%rip),%rax
cmp    %edi,(%rax)
jne    1130 <sig_handler+0x20>
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
lea    0xed5(%rip),%rsi
jmp    1030 <fprintf@plt>
ret

LLVM IR (-O0):
@SIGALRM = global i32 0
@stderr = global i32 0
@.str = [31 x i8] c"[parent] recv SIGALRM signal!\0A\00"
define void @sig_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIGALRM
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* @stderr
%8 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@SIGALRM = global i32 0
@stderr = global i32 0
@.str = [31 x i8] c"[parent] recv SIGALRM signal!\0A\00"
define void @sig_handler(i32 %0) {
%2 = load i32, i32* @SIGALRM
%3 = icmp eq i32 %2, %0
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ enable_irq();
int /*<<< orphan*/ init_interrupt_controller();
int /*<<< orphan*/ setup_irq_stack();
int /*<<< orphan*/ setup_ivt();
void init_interrupt_handling(void) {
  setup_ivt();
  setup_irq_stack();
  init_interrupt_controller();
  enable_irq();
}


x86 assembly (clang, -O0):
<init_interrupt_handling>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1060 <setup_ivt@plt>
mov    $0x0,%al
call   1030 <setup_irq_stack@plt>
mov    $0x0,%al
call   1050 <init_interrupt_controller@plt>
mov    $0x0,%al
call   1040 <enable_irq@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_interrupt_handling>:
push   %rax
xor    %eax,%eax
call   1060 <setup_ivt@plt>
xor    %eax,%eax
call   1030 <setup_irq_stack@plt>
xor    %eax,%eax
call   1050 <init_interrupt_controller@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <enable_irq@plt>

LLVM IR (-O0):
define void @init_interrupt_handling() {
%1 = call i32 (...) @setup_ivt()
%2 = call i32 (...) @setup_irq_stack()
%3 = call i32 (...) @init_interrupt_controller()
%4 = call i32 (...) @enable_irq()
ret void
}

LLVM IR (-O2):
define void @init_interrupt_handling() {
%1 = tail call i32 (...) @setup_ivt()
%2 = tail call i32 (...) @setup_irq_stack()
%3 = tail call i32 (...) @init_interrupt_controller()
%4 = tail call i32 (...) @enable_irq()
ret void
}
double MMtoCM(double MM) { return MM / 10; }


x86 assembly (clang, -O0):
<MMtoCM>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<MMtoCM>:
divsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @MMtoCM(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 1.000000e+01
ret double %4
}

LLVM IR (-O2):
define double @MMtoCM(double %0) {
%2 = fdiv double %0, 1.000000e+01
ret double %2
}
/* Variables and functions */
scalar_t__ COND_VC();
int /*<<< orphan*/ EA_A7_PD_8();
int /*<<< orphan*/ m68ki_write_8(int /*<<< orphan*/, int);
void m68k_op_svc_8_pd7(void) {
  m68ki_write_8(EA_A7_PD_8(), COND_VC() ? 0xff : 0);
}


x86 assembly (clang, -O0):
<m68k_op_svc_8_pd7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <EA_A7_PD_8@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <COND_VC@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rcx
xor    %esi,%esi
mov    $0xff,%eax
cmp    $0x0,%rcx
cmovne %eax,%esi
call   1050 <m68ki_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_svc_8_pd7>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %eax,%eax
call   1030 <EA_A7_PD_8@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <COND_VC@plt>
test   %rax,%rax
mov    $0xff,%esi
cmove  %ebp,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <m68ki_write_8@plt>

LLVM IR (-O0):
define void @m68k_op_svc_8_pd7() {
%1 = call i32 (...) @EA_A7_PD_8()
%2 = call i64 (...) @COND_VC()
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 255, i32 0
%6 = call i32 @m68ki_write_8(i32 %1, i32 %5)
ret void
}

LLVM IR (-O2):
define void @m68k_op_svc_8_pd7() {
%1 = tail call i32 (...) @EA_A7_PD_8()
%2 = tail call i64 (...) @COND_VC()
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 0, i32 255
%5 = tail call i32 @m68ki_write_8(i32 %1, i32 %4)
ret void
}
long __syscall0(long n) {
  unsigned long ret;
  __asm__ __volatile__("syscall" : "=a"(ret) : "a"(n) : "rcx", "r11", "memory");
  return ret;
}


x86 assembly (clang, -O0):
<__syscall0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
syscall
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__syscall0>:
mov    %rdi,%rax
syscall
ret

LLVM IR (-O0):
define i64 @__syscall0(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i64 asm sideeffect "syscall", "={ax},{ax},~{rcx},~{r11},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
define i64 @__syscall0(i64 %0) {
%2 = tail call i64 asm sideeffect "syscall", "={ax},{ax},~{rcx},~{r11},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %0)
ret i64 %2
}
/* Variables and functions */
const char *argflag_tostring(bool value) { return value ? "Yes" : "No"; }


x86 assembly (clang, -O0):
<argflag_tostring>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xef3(%rip),%rax
lea    0xee8(%rip),%rcx
cmp    $0x0,%edx
cmovne %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<argflag_tostring>:
test   %edi,%edi
lea    0xefb(%rip),%rcx
lea    0xef0(%rip),%rax
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"Yes\00"
@.str.1 = [3 x i8] c"No\00"
define i8* @argflag_tostring(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i64
%6 = select i1 %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0)
ret i8* %6
}

LLVM IR (-O2):
@.str = [4 x i8] c"Yes\00"
@.str.1 = [3 x i8] c"No\00"
define i8* @argflag_tostring(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ loop();
int /*<<< orphan*/ messager();
int main() {
  messager();
  loop();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <messager@plt>
mov    $0x0,%al
call   1030 <loop@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <messager@plt>
xor    %eax,%eax
call   1030 <loop@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @messager()
%2 = call i32 (...) @loop()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @messager()
%2 = tail call i32 (...) @loop()
ret i32 0
}
int ast_register_cleanup(void (*func)(void)) { return 0; }


x86 assembly (clang, -O0):
<ast_register_cleanup>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ast_register_cleanup>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ast_register_cleanup(void ()* %0) {
%2 = alloca void ()*
store void ()* %0, void ()** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @ast_register_cleanup(void ()* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int validate_main(const char *main) {
  if (main == NULL) {
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<validate_main>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    111f <validate_main+0x1f>
movl   $0xffffffff,-0x4(%rbp)
jmp    1126 <validate_main+0x26>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<validate_main>:
cmp    $0x1,%rdi
sbb    %eax,%eax
ret

LLVM IR (-O0):
define i32 @validate_main(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 -1, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @validate_main(i8* readnone %0) {
%2 = icmp eq i8* %0, null
%3 = sext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
char *ace_str_join_2(char *, char *);
int /*<<< orphan*/ ace_tu_fs_append_str_to_file(char *, char *);
char *mktemp(char *);
char *ace_tu_fs_create_temp_file_at(char *dirpath, char *file_contents) {
  char *filepath_template = ace_str_join_2(dirpath, "/XXXXXX");
  char *filepath = mktemp(filepath_template);
  ace_tu_fs_append_str_to_file(filepath, file_contents);
  return filepath;
}


x86 assembly (clang, -O0):
<ace_tu_fs_create_temp_file_at>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xeb5(%rip),%rsi
call   1040 <ace_str_join_2@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1050 <mktemp@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <ace_tu_fs_append_str_to_file@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ace_tu_fs_create_temp_file_at>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
lea    0xec2(%rip),%rsi
call   1040 <ace_str_join_2@plt>
mov    %rax,%rdi
call   1050 <mktemp@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <ace_tu_fs_append_str_to_file@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [8 x i8] c"/XXXXXX\00"
define i8* @ace_tu_fs_create_temp_file_at(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = call i8* @ace_str_join_2(i8* %7, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = call i8* @mktemp(i8* %9)
store i8* %10, i8** %6
%11 = load i8*, i8** %6
%12 = load i8*, i8** %4
%13 = call i32 @ace_tu_fs_append_str_to_file(i8* %11, i8* %12)
%14 = load i8*, i8** %6
ret i8* %14
}

LLVM IR (-O2):
@.str = [8 x i8] c"/XXXXXX\00"
define i8* @ace_tu_fs_create_temp_file_at(i8* %0, i8* %1) {
%3 = tail call i8* @ace_str_join_2(i8* %0, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%4 = tail call i8* @mktemp(i8* %3)
%5 = tail call i32 @ace_tu_fs_append_str_to_file(i8* %4, i8* %1)
ret i8* %4
}
/* Type definitions */
struct sudoku_group {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct sudoku_group *);
void sudoku_group_free(struct sudoku_group *group) { free(group); }


x86 assembly (clang, -O0):
<sudoku_group_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sudoku_group_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.sudoku_group = type { i32 }
define void @sudoku_group_free(%struct.sudoku_group* %0) {
%2 = alloca %struct.sudoku_group*
store %struct.sudoku_group* %0, %struct.sudoku_group** %2
%3 = load %struct.sudoku_group*, %struct.sudoku_group** %2
%4 = call i32 @free(%struct.sudoku_group* %3)
ret void
}

LLVM IR (-O2):
%struct.sudoku_group = type { i32 }
define void @sudoku_group_free(%struct.sudoku_group* nocapture %0) {
%2 = tail call i32 @free(%struct.sudoku_group* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ check(int /*<<< orphan*/, char const *);
void *realloc(void *, size_t const);
void *float_array_realloc(void *ptr, const size_t N, const char *error_msg) {
  ptr = realloc(ptr, N * sizeof(float));
  check(ptr != NULL, error_msg);
  return ptr;
}


x86 assembly (clang, -O0):
<float_array_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
shl    $0x2,%rsi
call   1030 <realloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
mov    -0x18(%rbp),%rsi
call   1040 <check@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<float_array_realloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
shl    $0x2,%rsi
call   1030 <realloc@plt>
mov    %rax,%rbx
xor    %edi,%edi
test   %rax,%rax
setne  %dil
mov    %r14,%rsi
call   1040 <check@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @float_array_realloc(i8* %0, i64 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = mul i64 %8, 4
%10 = call i8* @realloc(i8* %7, i64 %9)
store i8* %10, i8** %4
%11 = load i8*, i8** %4
%12 = icmp ne i8* %11, null
%13 = zext i1 %12 to i32
%14 = load i8*, i8** %6
%15 = call i32 @check(i32 %13, i8* %14)
%16 = load i8*, i8** %4
ret i8* %16
}

LLVM IR (-O2):
define noalias i8* @float_array_realloc(i8* nocapture %0, i64 %1, i8* %2) {
%4 = shl i64 %1, 2
%5 = tail call i8* @realloc(i8* %0, i64 %4)
%6 = icmp ne i8* %5, null
%7 = zext i1 %6 to i32
%8 = tail call i32 @check(i32 %7, i8* %2)
ret i8* %5
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, int, int, int, int);
char *ip2str(uint32_t ip, char *str, int size) {
  uint8_t d[4];
  *(uint32_t *)d = ip;
  snprintf(str, size, "%d.%d.%d.%d", d[3], d[2], d[1], d[0]);
  return str;
}


x86 assembly (clang, -O0):
<ip2str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x30(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x24(%rbp),%ecx
mov    -0x28(%rbp),%r8d
mov    -0x2c(%rbp),%r9d
mov    -0x30(%rbp),%eax
lea    0xebc(%rip),%rdx
mov    %eax,(%rsp)
call   1030 <snprintf@plt>
mov    -0x10(%rbp),%rax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ip2str>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
mov    %edi,(%rsp)
lea    0xede(%rip),%rax
mov    %rsi,%rdi
mov    %edx,%esi
mov    %rax,%rdx
call   1030 <snprintf@plt>
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"%d.%d.%d.%d\00"
define i8* @ip2str(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca [4 x i32]
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = getelementptr inbounds [4 x i32], [4 x i32]* %7, i64 0, i64 0
store i32 %8, i32* %9
%10 = load i8*, i8** %5
%11 = load i32, i32* %6
%12 = getelementptr inbounds [4 x i32], [4 x i32]* %7, i64 0, i64 3
%13 = load i32, i32* %12
%14 = getelementptr inbounds [4 x i32], [4 x i32]* %7, i64 0, i64 2
%15 = load i32, i32* %14
%16 = getelementptr inbounds [4 x i32], [4 x i32]* %7, i64 0, i64 1
%17 = load i32, i32* %16
%18 = getelementptr inbounds [4 x i32], [4 x i32]* %7, i64 0, i64 0
%19 = load i32, i32* %18
%20 = call i32 @snprintf(i8* %10, i32 %11, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %13, i32 %15, i32 %17, i32 %19)
%21 = load i8*, i8** %5
ret i8* %21
}

LLVM IR (-O2):
@.str = [12 x i8] c"%d.%d.%d.%d\00"
define i8* @ip2str(i32 %0, i8* returned %1, i32 %2) {
%4 = tail call i32 @snprintf(i8* %1, i32 %2, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 undef, i32 undef, i32 undef, i32 %0)
ret i8* %1
}
void dl_G_RDPFULLSYNC() {}


x86 assembly (clang, -O0):
<dl_G_RDPFULLSYNC>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dl_G_RDPFULLSYNC>:
ret

LLVM IR (-O0):
define void @dl_G_RDPFULLSYNC() {
ret void
}

LLVM IR (-O2):
define void @dl_G_RDPFULLSYNC() {
ret void
}
int fibonacci(int n) {
  if (n == 0)
    return 0;
  else if (n == 1)
    return 1;
  else
    return fibonacci(n - 1) + fibonacci(n - 2);
}


x86 assembly (clang, -O0):
<fibonacci>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1131 <fibonacci+0x21>
movl   $0x0,-0x4(%rbp)
jmp    116a <fibonacci+0x5a>
cmpl   $0x1,-0x8(%rbp)
jne    1147 <fibonacci+0x37>
movl   $0x1,-0x4(%rbp)
jmp    116a <fibonacci+0x5a>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fibonacci@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fibonacci@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibonacci>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x2,%ebx
jb     1132 <fibonacci+0x22>
nopl   0x0(%rax)
lea    -0x1(%rbx),%edi
call   1030 <fibonacci@plt>
add    %eax,%ebp
add    $0xfffffffe,%ebx
cmp    $0x2,%ebx
jae    1120 <fibonacci+0x10>
add    %ebp,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fibonacci(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %19
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 1, i32* %2
br label %19
11: ; preds = %7
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 1
%14 = call i32 @fibonacci(i32 %13)
%15 = load i32, i32* %3
%16 = sub nsw i32 %15, 2
%17 = call i32 @fibonacci(i32 %16)
%18 = add nsw i32 %14, %17
store i32 %18, i32* %2
br label %19
19: ; preds = %11, %10, %6
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @fibonacci(i32 %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i32 [ 0, %1 ], [ %10, %6 ]
%4 = phi i32 [ %0, %1 ], [ %9, %6 ]
%5 = icmp ult i32 %4, 2
br i1 %5, label %11, label %6
6: ; preds = %2
%7 = add nsw i32 %4, -1
%8 = tail call i32 @fibonacci(i32 %7)
%9 = add nsw i32 %4, -2
%10 = add nsw i32 %8, %3
br label %2
11: ; preds = %2
%12 = add nsw i32 %4, %3
ret i32 %12
}