xunge/DecIR huggingface dataset:
__attribute__((no_instrument_function)) void cpu_relax(void) {
  smt_low();
  smt_very_low();
  asm volatile("nop; nop; nop; nop\n");
  asm volatile("nop; nop; nop; nop\n");
  asm volatile("nop; nop; nop; nop\n");
  asm volatile("nop; nop; nop; nop\n");
  smt_medium();
}


x86 assembly (clang, -O0):
<cpu_relax>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <smt_low@plt>
mov    $0x0,%al
call   1030 <smt_very_low@plt>
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
mov    $0x0,%al
call   1040 <smt_medium@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_relax>:
push   %rax
xor    %eax,%eax
call   1050 <smt_low@plt>
xor    %eax,%eax
call   1030 <smt_very_low@plt>
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
xor    %eax,%eax
pop    %rcx
jmp    1040 <smt_medium@plt>

LLVM IR (-O0):
define void @cpu_relax() {
%1 = call i32 (...) @smt_low()
%2 = call i32 (...) @smt_very_low()
%3 = call i32 (...) @smt_medium()
ret void
}

LLVM IR (-O2):
define void @cpu_relax() {
%1 = tail call i32 (...) @smt_low()
%2 = tail call i32 (...) @smt_very_low()
tail call void asm sideeffect "nop; nop; nop; nop\0A", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "nop; nop; nop; nop\0A", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "nop; nop; nop; nop\0A", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "nop; nop; nop; nop\0A", "~{dirflag},~{fpsr},~{flags}"()
%3 = tail call i32 (...) @smt_medium()
ret void
}
/* Variables and functions */
char *emalloc(size_t);
char *memcpy(char *, char *, size_t);
int strlen(char *);
char *estrdup(char *str) {
  char *c;
  size_t len;
  len = strlen(str) + 1;
  c = emalloc(len);
  return memcpy(c, str, len);
}


x86 assembly (clang, -O0):
<estrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1050 <emalloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<estrdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <strlen@plt>
add    $0x1,%eax
movslq %eax,%rbx
mov    %rbx,%rdi
call   1050 <emalloc@plt>
mov    %rax,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <memcpy@plt>

LLVM IR (-O0):
define i8* @estrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = add nsw i32 %6, 1
%8 = sext i32 %7 to i64
store i64 %8, i64* %4
%9 = load i64, i64* %4
%10 = call i8* @emalloc(i64 %9)
store i8* %10, i8** %3
%11 = load i8*, i8** %3
%12 = load i8*, i8** %2
%13 = load i64, i64* %4
%14 = call i8* @memcpy(i8* %11, i8* %12, i64 %13)
ret i8* %14
}

LLVM IR (-O2):
define i8* @estrdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = sext i32 %3 to i64
%5 = tail call i8* @emalloc(i64 %4)
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %5, i8* align 1 %0, i64 %4, i1 false)
ret i8* %5
}
/* Variables and functions */
int dy_stack_count_impl();
int dy_stack_count() { return dy_stack_count_impl(); }


x86 assembly (clang, -O0):
<dy_stack_count>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <dy_stack_count_impl@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dy_stack_count>:
xor    %eax,%eax
jmp    1030 <dy_stack_count_impl@plt>

LLVM IR (-O0):
define i32 @dy_stack_count() {
%1 = call i32 (...) @dy_stack_count_impl()
ret i32 %1
}

LLVM IR (-O2):
define i32 @dy_stack_count() {
%1 = tail call i32 (...) @dy_stack_count_impl()
ret i32 %1
}
/* Type definitions */
struct yaffs_stat {
  int dummy;
};

/* Variables and functions */
int yaffs_stat_reldir(int /*<<< orphan*/, char const *, struct yaffs_stat *);
int yaffs_stat(const char *path, struct yaffs_stat *buf) {
  return yaffs_stat_reldir((0), path, buf);
}


x86 assembly (clang, -O0):
<yaffs_stat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
xor    %edi,%edi
call   1030 <yaffs_stat_reldir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yaffs_stat>:
mov    %rsi,%rdx
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <yaffs_stat_reldir@plt>

LLVM IR (-O0):
%struct.yaffs_stat = type { i32 }
define i32 @yaffs_stat(i8* %0, %struct.yaffs_stat* %1) {
%3 = alloca i8*
%4 = alloca %struct.yaffs_stat*
store i8* %0, i8** %3
store %struct.yaffs_stat* %1, %struct.yaffs_stat** %4
%5 = load i8*, i8** %3
%6 = load %struct.yaffs_stat*, %struct.yaffs_stat** %4
%7 = call i32 @yaffs_stat_reldir(i32 0, i8* %5, %struct.yaffs_stat* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.yaffs_stat = type { i32 }
define i32 @yaffs_stat(i8* %0, %struct.yaffs_stat* %1) {
%3 = tail call i32 @yaffs_stat_reldir(i32 0, i8* %0, %struct.yaffs_stat* %1)
ret i32 %3
}
void title_play_button_click(struct button *button, struct world *world) {}


x86 assembly (clang, -O0):
<title_play_button_click>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<title_play_button_click>:
ret

LLVM IR (-O0):
%struct.button = type opaque
%struct.world = type opaque
define void @title_play_button_click(%struct.button* %0, %struct.world* %1) {
%3 = alloca %struct.button*
%4 = alloca %struct.world*
store %struct.button* %0, %struct.button** %3
store %struct.world* %1, %struct.world** %4
ret void
}

LLVM IR (-O2):
%struct.button = type opaque
%struct.world = type opaque
define void @title_play_button_click(%struct.button* nocapture %0, %struct.world* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void prtusage(void) {
  printf("Generates N recursive for-loops for the range of nucelotides (i.e. "
         "range of 4).\n");
  printf("You need to give an integer N as argument.\n");
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<prtusage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf1a(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<prtusage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf1c(%rip),%rdi
call   1030 <puts@plt>
mov    0x2ea0(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [81 x i8] c"Generates N recursive for-loops for the range of nucelotides (i.e. range of 4).\0A\00"
@.str.1 = [44 x i8] c"You need to give an integer N as argument.\0A\00"
@EXIT_FAILURE = global i32 0
define void @prtusage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([81 x i8], [81 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str.1, i64 0, i64 0))
%3 = load i32, i32* @EXIT_FAILURE
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
@str = [80 x i8] c"Generates N recursive for-loops for the range of nucelotides (i.e. range of 4).\00"
@str.2 = [43 x i8] c"You need to give an integer N as argument.\00"
define void @prtusage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([80 x i8], [80 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([43 x i8], [43 x i8]* @str.2, i64 0, i64 0))
%3 = load i32, i32* @EXIT_FAILURE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void I2CSlaveIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags) {
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000818))) = ui32IntFlags;
}


x86 assembly (clang, -O0):
<I2CSlaveIntClearEx>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x818(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CSlaveIntClearEx>:
mov    %rsi,0x818(%rdi)
ret

LLVM IR (-O0):
define void @I2CSlaveIntClearEx(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add nsw i64 %6, 2072
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @I2CSlaveIntClearEx(i64 %0, i64 %1) {
%3 = add nsw i64 %0, 2072
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}
int test_imm_37uint32_reg(unsigned int val) {
  return ((val) & (0x37 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_37uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x37,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_37uint32_reg>:
test   $0x37,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_37uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 55
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_37uint32_reg(i32 %0) {
%2 = and i32 %0, 55
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
double fp_to_dp(float f) { return f; }


x86 assembly (clang, -O0):
<fp_to_dp>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fp_to_dp>:
cvtss2sd %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @fp_to_dp(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
ret double %4
}

LLVM IR (-O2):
define double @fp_to_dp(float %0) {
%2 = fpext float %0 to double
ret double %2
}
void DISPLAYTEXT_free(void) {}


x86 assembly (clang, -O0):
<DISPLAYTEXT_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DISPLAYTEXT_free>:
ret

LLVM IR (-O0):
define void @DISPLAYTEXT_free() {
ret void
}

LLVM IR (-O2):
define void @DISPLAYTEXT_free() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ closeParser();
int /*<<< orphan*/ closeTrace();
int /*<<< orphan*/ exit(int);
void suicide() {
  closeTrace();
  closeParser();
  exit(2);
}


x86 assembly (clang, -O0):
<suicide>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <closeTrace@plt>
mov    $0x0,%al
call   1040 <closeParser@plt>
mov    $0x2,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<suicide>:
push   %rax
xor    %eax,%eax
call   1030 <closeTrace@plt>
xor    %eax,%eax
call   1040 <closeParser@plt>
mov    $0x2,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define void @suicide() {
%1 = call i32 (...) @closeTrace()
%2 = call i32 (...) @closeParser()
%3 = call i32 @exit(i32 2)
unreachable
}

LLVM IR (-O2):
define void @suicide() {
%1 = tail call i32 (...) @closeTrace()
%2 = tail call i32 (...) @closeParser()
%3 = tail call i32 @exit(i32 2)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ fun();
int main() { fun(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <fun@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <fun@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @fun()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @fun()
ret i32 0
}
/* Variables and functions */
int toupper(int);
int /*<<< orphan*/ usage(int);
int letterToCode(int letter) {
  switch (toupper(letter)) {
  case 'A':
    return 0x20;
  case 'H':
    return 0x2;
  case 'R':
    return 0x1;
  case 'S':
    return 0x4;
  default:
    usage(1);
  }
}


x86 assembly (clang, -O0):
<letterToCode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <toupper@plt>
add    $0xffffffbf,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x12,%eax
ja     1189 <letterToCode+0x69>
mov    -0x10(%rbp),%rax
lea    0xeb0(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x20,-0x4(%rbp)
jmp    1193 <letterToCode+0x73>
movl   $0x2,-0x4(%rbp)
jmp    1193 <letterToCode+0x73>
movl   $0x1,-0x4(%rbp)
jmp    1193 <letterToCode+0x73>
movl   $0x4,-0x4(%rbp)
jmp    1193 <letterToCode+0x73>
mov    $0x1,%edi
call   1040 <usage@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<letterToCode>:
push   %rax
call   1030 <toupper@plt>
mov    %eax,%ecx
add    $0xffffffbf,%ecx
cmp    $0x12,%ecx
ja     114c <letterToCode+0x2c>
mov    $0x20,%eax
lea    0xec4(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
mov    $0x2,%eax
pop    %rcx
ret
mov    $0x1,%edi
call   1040 <usage@plt>
pop    %rcx
ret
mov    $0x1,%eax
pop    %rcx
ret
mov    $0x4,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @letterToCode(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 @toupper(i32 %4)
switch i32 %5, label %10 [
i32 65, label %6
i32 72, label %7
i32 82, label %8
i32 83, label %9
]
6: ; preds = %1
store i32 32, i32* %2
br label %12
7: ; preds = %1
store i32 2, i32* %2
br label %12
8: ; preds = %1
store i32 1, i32* %2
br label %12
9: ; preds = %1
store i32 4, i32* %2
br label %12
10: ; preds = %1
%11 = call i32 @usage(i32 1)
br label %12
12: ; preds = %6, %7, %8, %9, %10
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @letterToCode(i32 %0) {
%2 = tail call i32 @toupper(i32 %0)
switch i32 %2, label %6 [
i32 65, label %8
i32 72, label %3
i32 82, label %4
i32 83, label %5
]
3: ; preds = %1
br label %8
4: ; preds = %1
br label %8
5: ; preds = %1
br label %8
6: ; preds = %1
%7 = tail call i32 @usage(i32 1)
br label %8
8: ; preds = %1, %3, %4, %5, %6
%9 = phi i32 [ undef, %6 ], [ 4, %5 ], [ 1, %4 ], [ 2, %3 ], [ 32, %1 ]
ret i32 %9
}
indreg0regx1_set(r0, r1, x0, x1, p0, p1) short r0, r1;
short *p0, *p1;
{ (*p0) = (p1[x1]); }


x86 assembly (clang, -O0):
<indreg0regx1_set>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,2),%cx
mov    -0x18(%rbp),%rax
mov    %cx,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<indreg0regx1_set>:
movslq %ecx,%rax
movzwl (%r9,%rax,2),%eax
mov    %ax,(%r8)
ret

LLVM IR (-O0):
define i32 @indreg0regx1_set(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16*, i16** %13
%17 = load i32, i32* %11
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i16, i16* %16, i64 %18
%20 = load i16, i16* %19
%21 = load i16*, i16** %12
store i16 %20, i16* %21
%22 = load i32, i32* %7
ret i32 %22
}

LLVM IR (-O2):
define i32 @indreg0regx1_set(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture writeonly %4, i16* nocapture %5) {
%7 = sext i32 %3 to i64
%8 = getelementptr inbounds i16, i16* %5, i64 %7
%9 = load i16, i16* %8
store i16 %9, i16* %4
ret i32 undef
}
void clear_bit(int nr, volatile unsigned long *addr) {
  asm volatile(""
               "btrl %1,%0"
               : "+m"((*(volatile long *)addr))
               : "Ir"(nr)
               : "memory");
}


x86 assembly (clang, -O0):
<clear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
btr    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_bit>:
btr    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @clear_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
%6 = load i32, i32* %3
ret void
}

LLVM IR (-O2):
define void @clear_bit(i32 %0, i64* %1) {
tail call void asm sideeffect "btrl $1,$0", "=*m,Ir,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %1, i32 %0, i64* elementtype(i64) %1)
ret void
}
unsigned xrop3_252_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  stk1 = T | S;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_252_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
or     -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_252_1_0>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
mov    %esi,%ecx
shl    $0x8,%ecx
or     %esi,%ecx
not    %eax
and    %ecx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_252_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
store i32 %14, i32* %6
%15 = load i8, i8* %4
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 8
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
store i32 %20, i32* %7
%21 = load i32, i32* %7
%22 = load i32, i32* %6
%23 = or i32 %21, %22
store i32 %23, i32* %8
%24 = load i32, i32* %8
%25 = load i32, i32* %6
%26 = xor i32 %25, -1
%27 = and i32 %24, %26
%28 = load i32, i32* %5
%29 = load i32, i32* %6
%30 = and i32 %28, %29
%31 = or i32 %27, %30
ret i32 %31
}

LLVM IR (-O2):
define i32 @xrop3_252_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %4, -1
%8 = and i32 %6, %7
%9 = or i32 %8, %3
ret i32 %9
}
void RTPathParseSimple(void) {}


x86 assembly (clang, -O0):
<RTPathParseSimple>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTPathParseSimple>:
ret

LLVM IR (-O0):
define void @RTPathParseSimple() {
ret void
}

LLVM IR (-O2):
define void @RTPathParseSimple() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ __builtin_parity(unsigned int);
uint32_t chpl_bitops_parity_32(unsigned int x) { return __builtin_parity(x); }


x86 assembly (clang, -O0):
<chpl_bitops_parity_32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    %ecx,%eax
shr    %eax
and    $0x55555555,%eax
sub    %eax,%ecx
mov    %ecx,%eax
and    $0x33333333,%eax
shr    $0x2,%ecx
and    $0x33333333,%ecx
add    %ecx,%eax
mov    %eax,%ecx
shr    $0x4,%ecx
add    %ecx,%eax
and    $0xf0f0f0f,%eax
imul   $0x1010101,%eax,%eax
shr    $0x18,%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<chpl_bitops_parity_32>:
mov    %edi,%ecx
shr    $0x10,%ecx
xor    %edi,%ecx
xor    %eax,%eax
xor    %ch,%cl
setnp  %al
ret

LLVM IR (-O0):
define i32 @chpl_bitops_parity_32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @chpl_bitops_parity_32(i32 %0) {
%2 = tail call i32 @llvm.ctpop.i32(i32 %0)
%3 = and i32 %2, 1
ret i32 %3
}
int stata_init() { return 0; }


x86 assembly (clang, -O0):
<stata_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stata_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @stata_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @stata_init() {
ret i32 0
}
__attribute__((no, noclone)) unsigned __int128 t105_3mul(signed char y) {
  unsigned __int128 r;
  if (__builtin_mul_overflow((unsigned char)(17), y, &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t105_3mul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %dil,%al
mov    %al,-0x11(%rbp)
movsbq -0x11(%rbp),%rax
mov    %rax,%rcx
sar    $0x3f,%rcx
mov    %rcx,-0x48(%rbp)
mov    %ecx,%edx
shl    $0x4,%edx
add    %edx,%ecx
mov    %ecx,-0x3c(%rbp)
mov    $0x11,%ecx
mul    %rcx
mov    %rax,%rsi
mov    -0x48(%rbp),%rax
mov    %rsi,-0x38(%rbp)
mov    %rdx,%rdi
mul    %rcx
mov    %rax,%rcx
mov    -0x3c(%rbp),%eax
mov    %rdx,%rsi
mov    -0x38(%rbp),%rdx
add    %rdi,%rcx
adc    %sil,%al
and    $0x1,%al
mov    %rdx,-0x30(%rbp)
mov    %rcx,-0x28(%rbp)
test   $0x1,%al
jne    117b <t105_3mul+0x6b>
jmp    1182 <t105_3mul+0x72>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x30(%rbp),%rax
mov    -0x28(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t105_3mul>:
push   %r14
push   %rbx
push   %rax
movslq %edi,%rcx
mov    %rcx,%rax
sar    $0x3f,%rax
mov    $0x11,%ebx
mul    %rbx
mov    %rax,%rsi
mov    %rcx,%rax
mul    %rbx
mov    %rax,%r14
mov    %rdx,%rbx
add    %rsi,%rbx
test   %dil,%dil
jns    1144 <t105_3mul+0x34>
xor    %eax,%eax
call   1030 <bar@plt>
mov    %r14,%rax
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define { i64, i64 } @t105_3mul(i8 signext %0) {
%2 = alloca i128
%3 = alloca i8
%4 = alloca i128
store i8 %0, i8* %3
%5 = load i8, i8* %3
%6 = sext i8 %5 to i129
%7 = call { i129, i1 } @llvm.smul.with.overflow.i129(i129 17, i129 %6)
%8 = extractvalue { i129, i1 } %7, 1
%9 = extractvalue { i129, i1 } %7, 0
%10 = trunc i129 %9 to i128
%11 = zext i128 %10 to i129
%12 = icmp ne i129 %9, %11
%13 = or i1 %8, %12
store i128 %10, i128* %4
br i1 %13, label %14, label %16
14: ; preds = %1
%15 = call i32 (...) @bar()
br label %16
16: ; preds = %14, %1
%17 = load i128, i128* %4
store i128 %17, i128* %2
%18 = bitcast i128* %2 to { i64, i64 }*
%19 = load { i64, i64 }, { i64, i64 }* %18
ret { i64, i64 } %19
}

LLVM IR (-O2):
define { i64, i64 } @t105_3mul(i8 signext %0) {
%2 = sext i8 %0 to i129
%3 = mul nsw i129 %2, 17
%4 = icmp slt i8 %0, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 (...) @bar()
br label %7
7: ; preds = %5, %1
%8 = trunc i129 %3 to i64
%9 = lshr i129 %3, 64
%10 = trunc i129 %9 to i64
%11 = insertvalue { i64, i64 } poison, i64 %8, 0
%12 = insertvalue { i64, i64 } %11, i64 %10, 1
ret { i64, i64 } %12
}
/* Variables and functions */
int /*<<< orphan*/ assert(void **);
int /*<<< orphan*/ free(void *);
void sfree(void *ptr) {
  void **inner_ptr = (void **)&ptr;
  assert(inner_ptr);
  if (inner_ptr != NULL) {
    free(*inner_ptr);
    *inner_ptr = NULL;
  }
}


x86 assembly (clang, -O0):
<sfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <assert@plt>
cmpq   $0x0,-0x10(%rbp)
je     115f <sfree+0x3f>
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%rax
movq   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sfree>:
push   %rax
mov    %rdi,(%rsp)
mov    %rsp,%rdi
call   1040 <assert@plt>
mov    (%rsp),%rdi
call   1030 <free@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @sfree(i8* %0) {
%2 = alloca i8*
%3 = alloca i8**
store i8* %0, i8** %2
store i8** %2, i8*** %3
%4 = load i8**, i8*** %3
%5 = call i32 @assert(i8** %4)
%6 = load i8**, i8*** %3
%7 = icmp ne i8** %6, null
br i1 %7, label %8, label %13
8: ; preds = %1
%9 = load i8**, i8*** %3
%10 = load i8*, i8** %9
%11 = call i32 @free(i8* %10)
%12 = load i8**, i8*** %3
store i8* null, i8** %12
br label %13
13: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @sfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @assert(i8** %2)
%4 = load i8*, i8** %2
%5 = call i32 @free(i8* %4)
ret void
}
/* Variables and functions */
int rand();
int /*<<< orphan*/ swap(int *, int, int);
void knuthShuffle(int *inArray, int length) {
  int i;
  int current;
  for (i = length; i > 0;) {
    current = rand() % i;
    swap(inArray, current, --i);
  }
}


x86 assembly (clang, -O0):
<knuthShuffle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jle    1167 <knuthShuffle+0x47>
mov    $0x0,%al
call   1040 <rand@plt>
cltd
idivl  -0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x10(%rbp),%edx
add    $0xffffffff,%edx
mov    %edx,-0x10(%rbp)
call   1030 <swap@plt>
jmp    1135 <knuthShuffle+0x15>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<knuthShuffle>:
push   %rbp
push   %r14
push   %rbx
test   %esi,%esi
jle    1150 <knuthShuffle+0x30>
mov    %esi,%ebx
mov    %rdi,%r14
nopl   (%rax)
xor    %eax,%eax
call   1040 <rand@plt>
cltd
idiv   %ebx
lea    -0x1(%rbx),%ebp
mov    %r14,%rdi
mov    %edx,%esi
mov    %ebp,%edx
call   1030 <swap@plt>
cmp    $0x1,%ebx
mov    %ebp,%ebx
ja     1130 <knuthShuffle+0x10>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @knuthShuffle(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
store i32 %7, i32* %5
br label %8
8: ; preds = %11, %2
%9 = load i32, i32* %5
%10 = icmp sgt i32 %9, 0
br i1 %10, label %11, label %20
11: ; preds = %8
%12 = call i32 (...) @rand()
%13 = load i32, i32* %5
%14 = srem i32 %12, %13
store i32 %14, i32* %6
%15 = load i32*, i32** %3
%16 = load i32, i32* %6
%17 = load i32, i32* %5
%18 = add nsw i32 %17, -1
store i32 %18, i32* %5
%19 = call i32 @swap(i32* %15, i32 %16, i32 %18)
br label %8
20: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @knuthShuffle(i32* %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %11
4: ; preds = %2, %4
%5 = phi i32 [ %8, %4 ], [ %1, %2 ]
%6 = tail call i32 (...) @rand()
%7 = srem i32 %6, %5
%8 = add nsw i32 %5, -1
%9 = tail call i32 @swap(i32* %0, i32 %7, i32 %8)
%10 = icmp ugt i32 %5, 1
br i1 %10, label %4, label %11
11: ; preds = %4, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ xlCurError();
int /*<<< orphan*/ xlPutStr(int /*<<< orphan*/, char *);
void xlErrPutStr(char *str) { xlPutStr(xlCurError(), str); }


x86 assembly (clang, -O0):
<xlErrPutStr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <xlCurError@plt>
mov    %eax,%edi
mov    -0x8(%rbp),%rsi
call   1030 <xlPutStr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xlErrPutStr>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <xlCurError@plt>
mov    %eax,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <xlPutStr@plt>

LLVM IR (-O0):
define void @xlErrPutStr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @xlCurError()
%4 = load i8*, i8** %2
%5 = call i32 @xlPutStr(i32 %3, i8* %4)
ret void
}

LLVM IR (-O2):
define void @xlErrPutStr(i8* %0) {
%2 = tail call i32 (...) @xlCurError()
%3 = tail call i32 @xlPutStr(i32 %2, i8* %0)
ret void
}
unsigned char oid_item_length(unsigned int value) {
  if (!(value & 0xffffff80)) {
    return 1;
  } else if (!(value & 0xffffc000)) {
    return 2;
  } else if (!(value & 0xfffe0000)) {
    return 3;
  } else if (!(value & 0xf0000000)) {
    return 4;
  } else {
    return 5;
  }
}


x86 assembly (clang, -O0):
<oid_item_length>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xffffff80,%eax
cmp    $0x0,%eax
jne    111f <oid_item_length+0x1f>
movb   $0x1,-0x1(%rbp)
jmp    1171 <oid_item_length+0x71>
mov    -0x8(%rbp),%eax
and    $0xffffc000,%eax
cmp    $0x0,%eax
jne    1139 <oid_item_length+0x39>
movb   $0x2,-0x1(%rbp)
jmp    1171 <oid_item_length+0x71>
mov    -0x8(%rbp),%eax
and    $0xfffe0000,%eax
cmp    $0x0,%eax
jne    1153 <oid_item_length+0x53>
movb   $0x3,-0x1(%rbp)
jmp    1171 <oid_item_length+0x71>
mov    -0x8(%rbp),%eax
and    $0xf0000000,%eax
cmp    $0x0,%eax
jne    116d <oid_item_length+0x6d>
movb   $0x4,-0x1(%rbp)
jmp    1171 <oid_item_length+0x71>
movb   $0x5,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<oid_item_length>:
mov    $0x1,%al
cmp    $0x80,%edi
jb     1128 <oid_item_length+0x28>
mov    $0x2,%al
cmp    $0x4000,%edi
jb     1128 <oid_item_length+0x28>
mov    $0x3,%al
cmp    $0x20000,%edi
jb     1128 <oid_item_length+0x28>
cmp    $0x10000000,%edi
mov    $0x5,%al
sbb    $0x0,%al
ret

LLVM IR (-O0):
define zeroext i8 @oid_item_length(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = and i32 %4, -128
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i8 1, i8* %2
br label %24
8: ; preds = %1
%9 = load i32, i32* %3
%10 = and i32 %9, -16384
%11 = icmp ne i32 %10, 0
br i1 %11, label %13, label %12
12: ; preds = %8
store i8 2, i8* %2
br label %24
13: ; preds = %8
%14 = load i32, i32* %3
%15 = and i32 %14, -131072
%16 = icmp ne i32 %15, 0
br i1 %16, label %18, label %17
17: ; preds = %13
store i8 3, i8* %2
br label %24
18: ; preds = %13
%19 = load i32, i32* %3
%20 = and i32 %19, -268435456
%21 = icmp ne i32 %20, 0
br i1 %21, label %23, label %22
22: ; preds = %18
store i8 4, i8* %2
br label %24
23: ; preds = %18
store i8 5, i8* %2
br label %24
24: ; preds = %23, %22, %17, %12, %7
%25 = load i8, i8* %2
ret i8 %25
}

LLVM IR (-O2):
define zeroext i8 @oid_item_length(i32 %0) {
%2 = icmp ult i32 %0, 128
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = icmp ult i32 %0, 16384
br i1 %4, label %10, label %5
5: ; preds = %3
%6 = icmp ult i32 %0, 131072
br i1 %6, label %10, label %7
7: ; preds = %5
%8 = icmp ult i32 %0, 268435456
%9 = select i1 %8, i8 4, i8 5
br label %10
10: ; preds = %7, %5, %3, %1
%11 = phi i8 [ 1, %1 ], [ 2, %3 ], [ 3, %5 ], [ %9, %7 ]
ret i8 %11
}
/* Variables and functions */
scalar_t__ xExponential_Integral_Ei(long double);
double Exponential_Integral_Ei(double x) {
  return (double)xExponential_Integral_Ei((long double)x);
}


x86 assembly (clang, -O0):
<Exponential_Integral_Ei>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
fldl   -0x8(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <xExponential_Integral_Ei@plt>
cvtsi2sd %rax,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Exponential_Integral_Ei>:
sub    $0x18,%rsp
movsd  %xmm0,0x10(%rsp)
fldl   0x10(%rsp)
fstpt  (%rsp)
call   1030 <xExponential_Integral_Ei@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @Exponential_Integral_Ei(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fpext double %3 to x86_fp80
%5 = call i64 @xExponential_Integral_Ei(x86_fp80 %4)
%6 = sitofp i64 %5 to double
ret double %6
}

LLVM IR (-O2):
define double @Exponential_Integral_Ei(double %0) {
%2 = fpext double %0 to x86_fp80
%3 = tail call i64 @xExponential_Integral_Ei(x86_fp80 %2)
%4 = sitofp i64 %3 to double
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
int sumOfDigits(int);
int main() {
  int N;
  printf("Enter number:\n");
  scanf("%d", &N);
  int ans = sumOfDigits(N);
  printf("The sum of digits of %d is %d", N, ans);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
lea    0xed6(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1030 <sumOfDigits@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xe9a(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed6(%rip),%rdi
call   1030 <puts@plt>
lea    0xec7(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1060 <scanf@plt>
mov    0x4(%rsp),%edi
call   1040 <sumOfDigits@plt>
mov    0x4(%rsp),%esi
lea    0xe8e(%rip),%rdi
mov    %eax,%edx
xor    %eax,%eax
call   1050 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Enter number:\0A\00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [30 x i8] c"The sum of digits of %d is %d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%6 = load i32, i32* %2
%7 = call i32 @sumOfDigits(i32 %6)
store i32 %7, i32* %3
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.2, i64 0, i64 0), i32 %8, i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [30 x i8] c"The sum of digits of %d is %d\00"
@str = [14 x i8] c"Enter number:\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @sumOfDigits(i32 %5)
%7 = load i32, i32* %1
%8 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @.str.2, i64 0, i64 0), i32 %7, i32 %6)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int /*<<< orphan*/ registerSignal(int /*<<< orphan*/ *);
int /*<<< orphan*/ signalHandle(int);
int /*<<< orphan*/ signalTimerStart(int);
int waitSignal(int /*<<< orphan*/ *);
int main() {
  sigset_t sig;
  int retSig;
  registerSignal(&sig);
  signalTimerStart(2000);
  while (1) {
    retSig = waitSignal(&sig);
    signalHandle(retSig);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
call   1040 <registerSignal@plt>
mov    $0x7d0,%edi
call   1060 <signalTimerStart@plt>
lea    -0x8(%rbp),%rdi
call   1050 <waitSignal@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <signalHandle@plt>
jmp    1162 <main+0x22>

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
call   1040 <registerSignal@plt>
mov    $0x7d0,%edi
call   1060 <signalTimerStart@plt>
nopl   0x0(%rax)
mov    %rbx,%rdi
call   1050 <waitSignal@plt>
mov    %eax,%edi
call   1030 <signalHandle@plt>
jmp    1160 <main+0x20>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @registerSignal(i32* %2)
%5 = call i32 @signalTimerStart(i32 2000)
br label %6
6: ; preds = %0, %6
%7 = call i32 @waitSignal(i32* %2)
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = call i32 @signalHandle(i32 %8)
br label %6
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @registerSignal(i32* %1)
%4 = call i32 @signalTimerStart(i32 2000)
br label %5
5: ; preds = %5, %0
%6 = call i32 @waitSignal(i32* %1)
%7 = call i32 @signalHandle(i32 %6)
br label %5
}
int __test(int argc) {
  struct nested {
    double baz;
    union bar {
      int foo;
    } roof;
  } hello, foo;
  const int *const *volatile *const *const a;
  int b[4][5][6];
  int *(*const *volatile(*d))(int z);
  return 0;
}


x86 assembly (clang, -O0):
<__test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x1a0,%rsp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
add    $0x1a0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__test>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.nested = type { double, %union.bar }
%union.bar = type { i32 }
define i32 @__test(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.nested
%4 = alloca %struct.nested
%5 = alloca i32****
%6 = alloca [4 x [5 x [6 x i32]]]
%7 = alloca i32* (i32)***
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
%struct.nested = type { double, %union.bar }
%union.bar = type { i32 }
define i32 @__test(i32 %0) {
ret i32 0
}
/* Type definitions */
struct svc_req {
  int dummy;
};

/* Variables and functions */
int l2tp_ppp_profile_get_1_svc(char *, void *, struct svc_req *);
int _l2tp_ppp_profile_get_1(char **argp, void *result, struct svc_req *rqstp) {
  return (l2tp_ppp_profile_get_1_svc(*argp, result, rqstp));
}


x86 assembly (clang, -O0):
<_l2tp_ppp_profile_get_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <l2tp_ppp_profile_get_1_svc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_l2tp_ppp_profile_get_1>:
mov    (%rdi),%rdi
jmp    1030 <l2tp_ppp_profile_get_1_svc@plt>

LLVM IR (-O0):
%struct.svc_req = type { i32 }
define i32 @_l2tp_ppp_profile_get_1(i8** %0, i8* %1, %struct.svc_req* %2) {
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca %struct.svc_req*
store i8** %0, i8*** %4
store i8* %1, i8** %5
store %struct.svc_req* %2, %struct.svc_req** %6
%7 = load i8**, i8*** %4
%8 = load i8*, i8** %7
%9 = load i8*, i8** %5
%10 = load %struct.svc_req*, %struct.svc_req** %6
%11 = call i32 @l2tp_ppp_profile_get_1_svc(i8* %8, i8* %9, %struct.svc_req* %10)
ret i32 %11
}

LLVM IR (-O2):
%struct.svc_req = type { i32 }
define i32 @_l2tp_ppp_profile_get_1(i8** nocapture %0, i8* %1, %struct.svc_req* %2) {
%4 = load i8*, i8** %0
%5 = tail call i32 @l2tp_ppp_profile_get_1_svc(i8* %4, i8* %1, %struct.svc_req* %2)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
main() { puts("Hello, world!"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hello, world!\00"
define i32 @main() {
%1 = call i32 @puts(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"Hello, world!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
uint32_t uDMAGetStatus(uint32_t ui32Base) {
  ;
  return (*((volatile unsigned long *)(ui32Base + 0x00000000)));
}


x86 assembly (clang, -O0):
<uDMAGetStatus>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uDMAGetStatus>:
mov    %rdi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
mov    (%rax),%rax
ret

LLVM IR (-O0):
define i64 @uDMAGetStatus(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = add i64 %3, 0
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @uDMAGetStatus(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = inttoptr i64 %3 to i64*
%5 = load volatile i64, i64* %4
ret i64 %5
}
/* Variables and functions */
scalar_t__ errno;
void myhandler(int signum) {
  signum = signum;
  errno = 0;
}


x86 assembly (clang, -O0):
<myhandler>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    0x2ecc(%rip),%rax
movq   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<myhandler>:
mov    0x2ed9(%rip),%rax
movq   $0x0,(%rax)
ret

LLVM IR (-O0):
@errno = global i64 0
define void @myhandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store i32 %3, i32* %2
store i64 0, i64* @errno
ret void
}

LLVM IR (-O2):
@errno = global i64 0
define void @myhandler(i32 %0) {
store i64 0, i64* @errno
ret void
}
/* Variables and functions */
int tirar(int);
int d100() { return tirar(100); }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0x64,%edi
call   1030 <tirar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    $0x64,%edi
jmp    1030 <tirar@plt>

LLVM IR (-O0):
define i32 @d100() {
%1 = call i32 @tirar(i32 100)
ret i32 %1
}

LLVM IR (-O2):
define i32 @d100() {
%1 = tail call i32 @tirar(i32 100)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int semctl(int semid, int semnum, int cmd, ...) {
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<semctl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<semctl>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @semctl(i32 %0, i32 %1, i32 %2, ...) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* @ENOSYS
%8 = call i32 @__set_errno(i32 %7)
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @semctl(i32 %0, i32 %1, i32 %2, ...) {
%4 = load i32, i32* @ENOSYS
%5 = tail call i32 @__set_errno(i32 %4)
ret i32 -1
}
/* Variables and functions */
size_t strlen(const char *s) {
  const char *str = s;
  unsigned int count = 0;
  while (*str++)
    ++count;
  return count;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
cmpb   $0x0,(%rax)
je     113d <strlen+0x3d>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1117 <strlen+0x17>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
cmpb   $0x0,(%rdi)
je     111e <strlen+0x1e>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <strlen+0x10>
mov    %eax,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8* %5, i8** %3
store i32 0, i32* %4
br label %6
6: ; preds = %11, %1
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i32 1
store i8* %8, i8** %3
%9 = load i8, i8* %7
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %6
%12 = load i32, i32* %4
%13 = add i32 %12, 1
store i32 %13, i32* %4
br label %6
14: ; preds = %6
%15 = load i32, i32* %4
%16 = zext i32 %15 to i64
ret i64 %16
}

LLVM IR (-O2):
define i64 @strlen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add i32 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4
%12 = zext i32 %8 to i64
br label %13
13: ; preds = %11, %1
%14 = phi i64 [ 0, %1 ], [ %12, %11 ]
ret i64 %14
}
/* Variables and functions */
char *NextLine(char *pBuffer) {
  if (!pBuffer)
    return NULL;
  while (*pBuffer && *pBuffer != '\n')
    ++pBuffer;
  return pBuffer;
}


x86 assembly (clang, -O0):
<NextLine>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1120 <NextLine+0x20>
movq   $0x0,-0x8(%rbp)
jmp    1173 <NextLine+0x73>
jmp    1125 <NextLine+0x25>
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x11(%rbp)
je     114a <NextLine+0x4a>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xa,%eax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    115a <NextLine+0x5a>
jmp    116b <NextLine+0x6b>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1125 <NextLine+0x25>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<NextLine>:
test   %rdi,%rdi
je     1122 <NextLine+0x22>
mov    %rdi,%rax
nopl   0x0(%rax,%rax,1)
movzbl (%rax),%ecx
test   %cl,%cl
je     1124 <NextLine+0x24>
cmp    $0xa,%cl
je     1124 <NextLine+0x24>
add    $0x1,%rax
jmp    1110 <NextLine+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @NextLine(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %7, label %6
6: ; preds = %1
store i8* null, i8** %2
br label %25
7: ; preds = %1
br label %8
8: ; preds = %20, %7
%9 = load i8*, i8** %3
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %18
13: ; preds = %8
%14 = load i8*, i8** %3
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp ne i32 %16, 10
br label %18
18: ; preds = %13, %8
%19 = phi i1 [ false, %8 ], [ %17, %13 ]
br i1 %19, label %20, label %23
20: ; preds = %18
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %3
br label %8
23: ; preds = %18
%24 = load i8*, i8** %3
store i8* %24, i8** %2
br label %25
25: ; preds = %23, %6
%26 = load i8*, i8** %2
ret i8* %26
}

LLVM IR (-O2):
define i8* @NextLine(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %8, label %3
3: ; preds = %1, %6
%4 = phi i8* [ %7, %6 ], [ %0, %1 ]
%5 = load i8, i8* %4
switch i8 %5, label %6 [
i8 0, label %8
i8 10, label %8
]
6: ; preds = %3
%7 = getelementptr inbounds i8, i8* %4, i64 1
br label %3
8: ; preds = %3, %3, %1
%9 = phi i8* [ null, %1 ], [ %4, %3 ], [ %4, %3 ]
ret i8* %9
}
/* Variables and functions */
int rand();
int getTemp() { return rand() % 100; }


x86 assembly (clang, -O0):
<getTemp>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getTemp>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x51eb851f,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x25,%rcx
add    %edx,%ecx
imul   $0x64,%ecx,%ecx
sub    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @getTemp() {
%1 = call i32 (...) @rand()
%2 = srem i32 %1, 100
ret i32 %2
}

LLVM IR (-O2):
define i32 @getTemp() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 100
ret i32 %2
}
void do_software_interrupt(struct pt_regs *pt_regs) { return; }


x86 assembly (clang, -O0):
<do_software_interrupt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_software_interrupt>:
ret

LLVM IR (-O0):
%struct.pt_regs = type opaque
define void @do_software_interrupt(%struct.pt_regs* %0) {
%2 = alloca %struct.pt_regs*
store %struct.pt_regs* %0, %struct.pt_regs** %2
ret void
}

LLVM IR (-O2):
%struct.pt_regs = type opaque
define void @do_software_interrupt(%struct.pt_regs* nocapture %0) {
ret void
}
int mdm_dbg_eng_init(struct esoc_drv *drv, struct esoc_clink *clink) {
  return 0;
}


x86 assembly (clang, -O0):
<mdm_dbg_eng_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdm_dbg_eng_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.esoc_drv = type opaque
%struct.esoc_clink = type opaque
define i32 @mdm_dbg_eng_init(%struct.esoc_drv* %0, %struct.esoc_clink* %1) {
%3 = alloca %struct.esoc_drv*
%4 = alloca %struct.esoc_clink*
store %struct.esoc_drv* %0, %struct.esoc_drv** %3
store %struct.esoc_clink* %1, %struct.esoc_clink** %4
ret i32 0
}

LLVM IR (-O2):
%struct.esoc_drv = type opaque
%struct.esoc_clink = type opaque
define i32 @mdm_dbg_eng_init(%struct.esoc_drv* nocapture readnone %0, %struct.esoc_clink* nocapture readnone %1) {
ret i32 0
}