xunge/DecIR huggingface dataset:
int qtdDigitosW(long int num) {
  int qtd = 1;
  while (num >= 10) {
    num = num / 10;
    qtd++;
  }
  return qtd;
}


x86 assembly (clang, -O0):
<qtdDigitosW>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
cmpq   $0xa,-0x8(%rbp)
jl     113a <qtdDigitosW+0x3a>
mov    -0x8(%rbp),%rax
mov    $0xa,%ecx
cqto
idiv   %rcx
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <qtdDigitosW+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<qtdDigitosW>:
mov    $0x1,%ecx
cmp    $0xa,%rdi
jl     1136 <qtdDigitosW+0x36>
mov    $0x1,%ecx
movabs $0xcccccccccccccccd,%rsi
cc cc cc
nopw   0x0(%rax,%rax,1)
mov    %rdi,%rax
mul    %rsi
shr    $0x3,%rdx
add    $0x1,%ecx
cmp    $0x63,%rdi
mov    %rdx,%rdi
ja     1120 <qtdDigitosW+0x20>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @qtdDigitosW(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
store i32 1, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i64, i64* %2
%6 = icmp sge i64 %5, 10
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i64, i64* %2
%9 = sdiv i64 %8, 10
store i64 %9, i64* %2
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @qtdDigitosW(i64 %0) {
%2 = icmp sgt i64 %0, 9
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 1, %1 ]
%5 = phi i64 [ %6, %3 ], [ %0, %1 ]
%6 = udiv i64 %5, 10
%7 = add nuw nsw i32 %4, 1
%8 = icmp ugt i64 %5, 99
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi i32 [ 1, %1 ], [ %7, %3 ]
ret i32 %10
}
long long test_01(long long a, long long b) { return a + b; }


x86 assembly (clang, -O0):
<test_01>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_01>:
lea    (%rdi,%rsi,1),%rax
ret

LLVM IR (-O0):
define i64 @test_01(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = add nsw i64 %5, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @test_01(i64 %0, i64 %1) {
%3 = add nsw i64 %1, %0
ret i64 %3
}
int evt_split() {}


x86 assembly (clang, -O0):
<evt_split>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<evt_split>:
ret

LLVM IR (-O0):
define i32 @evt_split() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @evt_split() {
ret i32 undef
}
int xmlUCSIsShavian(int code) {
  return (((code >= 0x10450) && (code <= 0x1047F)));
}


x86 assembly (clang, -O0):
<xmlUCSIsShavian>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x10450,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1126 <xmlUCSIsShavian+0x26>
cmpl   $0x1047f,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmlUCSIsShavian>:
add    $0xfffefbb0,%edi
xor    %eax,%eax
cmp    $0x30,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @xmlUCSIsShavian(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 66640
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 66687
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @xmlUCSIsShavian(i32 %0) {
%2 = add i32 %0, -66640
%3 = icmp ult i32 %2, 48
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  unsigned long resourceid;
};
struct TYPE_4__ {
  TYPE_1__ xerror;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xerror_resourceid(void *_p, unsigned long _v) {
  ((XEvent *)_p)->xerror.resourceid = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xerror_resourceid>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xerror_resourceid>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define void @set_XEvent_xerror_resourceid(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i64 %5, i64* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xerror_resourceid(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
void gtk_file_chooser_list_shortcut_folders() {}


x86 assembly (clang, -O0):
<gtk_file_chooser_list_shortcut_folders>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_file_chooser_list_shortcut_folders>:
ret

LLVM IR (-O0):
define void @gtk_file_chooser_list_shortcut_folders() {
ret void
}

LLVM IR (-O2):
define void @gtk_file_chooser_list_shortcut_folders() {
ret void
}
void MovHighByte(int *p, int i) { *p = (*p & 0xff) | ((i << 8) & 0xff00); }


x86 assembly (clang, -O0):
<MovHighByte>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
and    $0xff,%ecx
mov    -0xc(%rbp),%eax
shl    $0x8,%eax
and    $0xff00,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<MovHighByte>:
movzbl (%rdi),%eax
shl    $0x8,%esi
movzwl %si,%ecx
or     %eax,%ecx
mov    %ecx,(%rdi)
ret

LLVM IR (-O0):
define void @MovHighByte(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = and i32 %6, 255
%8 = load i32, i32* %4
%9 = shl i32 %8, 8
%10 = and i32 %9, 65280
%11 = or i32 %7, %10
%12 = load i32*, i32** %3
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @MovHighByte(i32* nocapture %0, i32 %1) {
%3 = load i32, i32* %0
%4 = and i32 %3, 255
%5 = shl i32 %1, 8
%6 = and i32 %5, 65280
%7 = or i32 %4, %6
store i32 %7, i32* %0
ret void
}
unsigned int mulhilo32(unsigned int a, unsigned int b, unsigned int *hip) {
  unsigned long long product =
      ((unsigned long long)a) * ((unsigned long long)b);
  *hip = product >> 32;
  return (unsigned int)product;
}


x86 assembly (clang, -O0):
<mulhilo32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
shr    $0x20,%rax
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mulhilo32>:
mov    %edi,%ecx
mov    %esi,%eax
imul   %rcx,%rax
mov    %rax,%rcx
shr    $0x20,%rcx
mov    %ecx,(%rdx)
ret

LLVM IR (-O0):
define i32 @mulhilo32(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i64
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%8 = load i32, i32* %4
%9 = zext i32 %8 to i64
%10 = load i32, i32* %5
%11 = zext i32 %10 to i64
%12 = mul i64 %9, %11
store i64 %12, i64* %7
%13 = load i64, i64* %7
%14 = lshr i64 %13, 32
%15 = trunc i64 %14 to i32
%16 = load i32*, i32** %6
store i32 %15, i32* %16
%17 = load i64, i64* %7
%18 = trunc i64 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @mulhilo32(i32 %0, i32 %1, i32* nocapture writeonly %2) {
%4 = zext i32 %0 to i64
%5 = zext i32 %1 to i64
%6 = mul nuw i64 %5, %4
%7 = lshr i64 %6, 32
%8 = trunc i64 %7 to i32
store i32 %8, i32* %2
%9 = trunc i64 %6 to i32
ret i32 %9
}
/* Type definitions */
struct usb_hcd {
  int dummy;
};
struct pci_dev {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ hcd_to_uhci(struct usb_hcd *);
struct usb_hcd *pci_get_drvdata(struct pci_dev *);
int /*<<< orphan*/ uhci_hc_died(int /*<<< orphan*/);
void uhci_shutdown(struct pci_dev *pdev) {
  struct usb_hcd *hcd = pci_get_drvdata(pdev);
  uhci_hc_died(hcd_to_uhci(hcd));
}


x86 assembly (clang, -O0):
<uhci_shutdown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <pci_get_drvdata@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <hcd_to_uhci@plt>
mov    %eax,%edi
call   1040 <uhci_hc_died@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uhci_shutdown>:
push   %rax
call   1050 <pci_get_drvdata@plt>
mov    %rax,%rdi
call   1030 <hcd_to_uhci@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <uhci_hc_died@plt>

LLVM IR (-O0):
%struct.pci_dev = type { i32 }
%struct.usb_hcd = type { i32 }
define void @uhci_shutdown(%struct.pci_dev* %0) {
%2 = alloca %struct.pci_dev*
%3 = alloca %struct.usb_hcd*
store %struct.pci_dev* %0, %struct.pci_dev** %2
%4 = load %struct.pci_dev*, %struct.pci_dev** %2
%5 = call %struct.usb_hcd* @pci_get_drvdata(%struct.pci_dev* %4)
store %struct.usb_hcd* %5, %struct.usb_hcd** %3
%6 = load %struct.usb_hcd*, %struct.usb_hcd** %3
%7 = call i32 @hcd_to_uhci(%struct.usb_hcd* %6)
%8 = call i32 @uhci_hc_died(i32 %7)
ret void
}

LLVM IR (-O2):
%struct.pci_dev = type { i32 }
%struct.usb_hcd = type { i32 }
define void @uhci_shutdown(%struct.pci_dev* %0) {
%2 = tail call %struct.usb_hcd* @pci_get_drvdata(%struct.pci_dev* %0)
%3 = tail call i32 @hcd_to_uhci(%struct.usb_hcd* %2)
%4 = tail call i32 @uhci_hc_died(i32 %3)
ret void
}
int isBin(char c) {
  switch (c) {
  case '>':
    return 1;
  case 'v':
    return 1;
  case '^':
    return 1;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<isBin>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x3e,%eax
je     1141 <isBin+0x41>
jmp    111f <isBin+0x1f>
mov    -0xc(%rbp),%eax
sub    $0x5e,%eax
je     1159 <isBin+0x59>
jmp    1130 <isBin+0x30>
mov    -0xc(%rbp),%eax
sub    $0x76,%eax
je     114d <isBin+0x4d>
jmp    1165 <isBin+0x65>
movl   $0x1,-0x4(%rbp)
jmp    116c <isBin+0x6c>
movl   $0x1,-0x4(%rbp)
jmp    116c <isBin+0x6c>
movl   $0x1,-0x4(%rbp)
jmp    116c <isBin+0x6c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isBin>:
add    $0xffffffc2,%edi
cmp    $0x38,%edi
ja     111e <isBin+0x1e>
mov    $0x1,%eax
movabs $0x100000100000001,%rcx
bt     %rdi,%rcx
jae    111e <isBin+0x1e>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isBin(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %9 [
i32 62, label %6
i32 118, label %7
i32 94, label %8
]
6: ; preds = %1
store i32 1, i32* %2
br label %10
7: ; preds = %1
store i32 1, i32* %2
br label %10
8: ; preds = %1
store i32 1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %8, %7, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @isBin(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %3 [
i32 62, label %4
i32 118, label %4
i32 94, label %4
]
3: ; preds = %1
br label %4
4: ; preds = %1, %1, %1, %3
%5 = phi i32 [ 0, %3 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main(int argc, char **argv) {
  int ch;
  for (ch = 0; ch < 0x100; ++ch) {
    printf("0x%02x '%c'\n", ch, ch);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x100,-0x14(%rbp)
jge    115a <main+0x4a>
mov    -0x14(%rbp),%esi
mov    -0x14(%rbp),%edx
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112d <main+0x1d>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xee3(%rip),%r14
nopl   (%rax)
mov    %r14,%rdi
mov    %ebx,%esi
mov    %ebx,%edx
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x100,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [13 x i8] c"0x%02x '%c'\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
br label %7
7: ; preds = %14, %2
%8 = load i32, i32* %6
%9 = icmp slt i32 %8, 256
br i1 %9, label %10, label %17
10: ; preds = %7
%11 = load i32, i32* %6
%12 = load i32, i32* %6
%13 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %11, i32 %12)
br label %14
14: ; preds = %10
%15 = load i32, i32* %6
%16 = add nsw i32 %15, 1
store i32 %16, i32* %6
br label %7
17: ; preds = %7
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
@.str = [13 x i8] c"0x%02x '%c'\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
br label %3
3: ; preds = %2, %3
%4 = phi i32 [ 0, %2 ], [ %6, %3 ]
%5 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %4)
%6 = add nuw nsw i32 %4, 1
%7 = icmp eq i32 %6, 256
br i1 %7, label %8, label %3
8: ; preds = %3
ret i32 0
}
int semi(char c) { return c == ';'; }


x86 assembly (clang, -O0):
<semi>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x3b,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<semi>:
xor    %eax,%eax
cmp    $0x3b,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @semi(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 59
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @semi(i8 signext %0) {
%2 = icmp eq i8 %0, 59
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
struct genlist {
  int dummy;
};
struct datafile_list {
  int dummy;
};
struct datafile {
  int dummy;
};

/* Variables and functions */
scalar_t__ genlist_get(struct genlist *, int);
struct datafile *datafile_list_get(const struct datafile_list *tthis,
                                   int index) {
  return (struct datafile *)genlist_get(((struct genlist *)(tthis)), index);
}


x86 assembly (clang, -O0):
<datafile_list_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <genlist_get@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<datafile_list_get>:
jmp    1030 <genlist_get@plt>

LLVM IR (-O0):
%struct.datafile = type { i32 }
%struct.datafile_list = type { i32 }
%struct.genlist = type { i32 }
define %struct.datafile* @datafile_list_get(%struct.datafile_list* %0, i32 %1) {
%3 = alloca %struct.datafile_list*
%4 = alloca i32
store %struct.datafile_list* %0, %struct.datafile_list** %3
store i32 %1, i32* %4
%5 = load %struct.datafile_list*, %struct.datafile_list** %3
%6 = bitcast %struct.datafile_list* %5 to %struct.genlist*
%7 = load i32, i32* %4
%8 = call i64 @genlist_get(%struct.genlist* %6, i32 %7)
%9 = inttoptr i64 %8 to %struct.datafile*
ret %struct.datafile* %9
}

LLVM IR (-O2):
%struct.datafile = type { i32 }
%struct.datafile_list = type { i32 }
%struct.genlist = type { i32 }
define %struct.datafile* @datafile_list_get(%struct.datafile_list* %0, i32 %1) {
%3 = bitcast %struct.datafile_list* %0 to %struct.genlist*
%4 = tail call i64 @genlist_get(%struct.genlist* %3, i32 %1)
%5 = inttoptr i64 %4 to %struct.datafile*
ret %struct.datafile* %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void *dbLock();
int /*<<< orphan*/ dbUnlock(void *);
int /*<<< orphan*/ deleteDataRecord(int, int /*<<< orphan*/,
                                    int /*<<< orphan*/);
__attribute__((visibility("hidden"))) void
dbClearOutboundPending(uint32_t friend_number, uint64_t id) {
  void *lock = dbLock();
  deleteDataRecord(1, friend_number, id);
  dbUnlock(lock);
}


x86 assembly (clang, -O0):
<dbClearOutboundPending>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1050 <dbLock@plt>
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    $0x1,%edi
call   1030 <deleteDataRecord@plt>
mov    -0x10(%rbp),%rdi
call   1040 <dbUnlock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbClearOutboundPending>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %edi,%ebp
xor    %eax,%eax
call   1050 <dbLock@plt>
mov    %rax,%rbx
mov    $0x1,%edi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <deleteDataRecord@plt>
mov    %rbx,%rdi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <dbUnlock@plt>

LLVM IR (-O0):
define hidden void @dbClearOutboundPending(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = call i8* (...) @dbLock()
store i8* %6, i8** %5
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = call i32 @deleteDataRecord(i32 1, i32 %7, i32 %8)
%10 = load i8*, i8** %5
%11 = call i32 @dbUnlock(i8* %10)
ret void
}

LLVM IR (-O2):
define hidden void @dbClearOutboundPending(i32 %0, i32 %1) {
%3 = tail call i8* (...) @dbLock()
%4 = tail call i32 @deleteDataRecord(i32 1, i32 %0, i32 %1)
%5 = tail call i32 @dbUnlock(i8* %3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct bladerf {
  int dummy;
};

/* Variables and functions */
int nios_32x32_masked_write(struct bladerf *, int, int /*<<< orphan*/,
                            int /*<<< orphan*/);
int nios_expansion_gpio_write(struct bladerf *dev, uint32_t mask,
                              uint32_t val) {
  int status = nios_32x32_masked_write(dev, 0x00, mask, val);
  if (status == 0) {
    do {
      do {
      } while (0);
    } while (0);
  }
  return status;
}


x86 assembly (clang, -O0):
<nios_expansion_gpio_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
xor    %esi,%esi
call   1030 <nios_32x32_masked_write@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    1159 <nios_expansion_gpio_write+0x49>
jmp    1145 <nios_expansion_gpio_write+0x35>
jmp    114a <nios_expansion_gpio_write+0x3a>
jmp    114f <nios_expansion_gpio_write+0x3f>
jmp    1154 <nios_expansion_gpio_write+0x44>
jmp    1159 <nios_expansion_gpio_write+0x49>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nios_expansion_gpio_write>:
mov    %edx,%ecx
mov    %esi,%edx
xor    %esi,%esi
jmp    1030 <nios_32x32_masked_write@plt>

LLVM IR (-O0):
%struct.bladerf = type { i32 }
define i32 @nios_expansion_gpio_write(%struct.bladerf* %0, i32 %1, i32 %2) {
%4 = alloca %struct.bladerf*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store %struct.bladerf* %0, %struct.bladerf** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load %struct.bladerf*, %struct.bladerf** %4
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @nios_32x32_masked_write(%struct.bladerf* %8, i32 0, i32 %9, i32 %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %19
14: ; preds = %3
br label %15
15: ; preds = %14
br label %16
16: ; preds = %15
br label %17
17: ; preds = %16
br label %18
18: ; preds = %17
br label %19
19: ; preds = %18, %3
%20 = load i32, i32* %7
ret i32 %20
}

LLVM IR (-O2):
%struct.bladerf = type { i32 }
define i32 @nios_expansion_gpio_write(%struct.bladerf* %0, i32 %1, i32 %2) {
%4 = tail call i32 @nios_32x32_masked_write(%struct.bladerf* %0, i32 0, i32 %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void compact(int argc, char *argv[]) {
  if (argc != 3) {
    fprintf(stderr, "%s compact diskfile.\n", argv[0]);
    exit(1);
  }
  fprintf(stderr, "%s: compact is not yet supported.\n", argv[0]);
  exit(1);
}


x86 assembly (clang, -O0):
<compact>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x3,-0x4(%rbp)
je     115f <compact+0x3f>
mov    0x2ea0(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%rdx
lea    0xeb0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>
mov    0x2e7a(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%rdx
lea    0xea0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<compact>:
push   %rax
mov    %edi,%eax
mov    0x2eb6(%rip),%rcx
mov    (%rcx),%edi
mov    (%rsi),%rdx
cmp    $0x3,%eax
jne    113d <compact+0x1d>
lea    0xedb(%rip),%rsi
jmp    1144 <compact+0x24>
lea    0xebc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [22 x i8] c"%s compact diskfile.\0A\00"
@.str.1 = [35 x i8] c"%s: compact is not yet supported.\0A\00"
define void @compact(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 3
br i1 %6, label %7, label %14
7: ; preds = %2
%8 = load i32, i32* @stderr
%9 = load i8**, i8*** %4
%10 = getelementptr inbounds i8*, i8** %9, i64 0
%11 = load i8*, i8** %10
%12 = call i32 @fprintf(i32 %8, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %11)
%13 = call i32 @exit(i32 1)
unreachable
14: ; preds = %2
%15 = load i32, i32* @stderr
%16 = load i8**, i8*** %4
%17 = getelementptr inbounds i8*, i8** %16, i64 0
%18 = load i8*, i8** %17
%19 = call i32 @fprintf(i32 %15, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0), i8* %18)
%20 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [22 x i8] c"%s compact diskfile.\0A\00"
@.str.1 = [35 x i8] c"%s: compact is not yet supported.\0A\00"
define void @compact(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 3
%4 = load i32, i32* @stderr
%5 = load i8*, i8** %1
br i1 %3, label %9, label %6
6: ; preds = %2
%7 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %5)
%8 = tail call i32 @exit(i32 1)
unreachable
9: ; preds = %2
%10 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0), i8* %5)
%11 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void show_help() {
  puts("patchrom - Patch jump table into a ROM dump\n"
       "\n"
       "Usage: patchrom [-c] CONFIG ROM PAGE < SYMBOLS\n"
       "See `man 1 patchrom` for details.\n"
       "\n"
       "Creates a jump table in PAGE of ROM and outputs index definitions as\n"
       "configured CONFIG from symbols from stdin. '-c' instructs patchrom to "
       "output a C header.\n"
       "\n"
       "Examples:\n"
       "\tpatchrom 00.config example.rom 0x00 <00.sym >00.inc\n"
       "\t\tPatch example.rom with a jump table containing symbols listed in "
       "00.config\n"
       "\t\tand output the jump table index definitions to 00.inc");
}


x86 assembly (clang, -O0):
<show_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_help>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [482 x i8] c"patchrom - Patch jump table into a ROM dump\0A\0AUsage: patchrom [-c] CONFIG ROM PAGE < SYMBOLS\0ASee `man 1 patchrom` for details.\0A\0ACreates a jump table in PAGE of ROM and outputs index definitions as\0Aconfigured CONFIG from symbols from stdin. '-c' instructs patchrom to output a C header.\0A\0AExamples:\0A\09patchrom 00.config example.rom 0x00 <00.sym >00.inc\0A\09\09Patch example.rom with a jump table containing symbols listed in 00.config\0A\09\09and output the jump table index definitions to 00.inc\00"
define void @show_help() {
%1 = call i32 @puts(i8* getelementptr inbounds ([482 x i8], [482 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [482 x i8] c"patchrom - Patch jump table into a ROM dump\0A\0AUsage: patchrom [-c] CONFIG ROM PAGE < SYMBOLS\0ASee `man 1 patchrom` for details.\0A\0ACreates a jump table in PAGE of ROM and outputs index definitions as\0Aconfigured CONFIG from symbols from stdin. '-c' instructs patchrom to output a C header.\0A\0AExamples:\0A\09patchrom 00.config example.rom 0x00 <00.sym >00.inc\0A\09\09Patch example.rom with a jump table containing symbols listed in 00.config\0A\09\09and output the jump table index definitions to 00.inc\00"
define void @show_help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([482 x i8], [482 x i8]* @.str, i64 0, i64 0))
ret void
}
int test_imm_76int16_mem(short *val) {
  return ((*val) & (-0x76 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_76int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffff8a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_76int16_mem>:
movzwl (%rdi),%eax
test   $0xff8a,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_76int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -118
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_76int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -118
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int ti_msw_start(double const *options) { return (int)options[0]; }


x86 assembly (clang, -O0):
<ti_msw_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cvttsd2si (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ti_msw_start>:
cvttsd2si (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @ti_msw_start(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = fptosi double %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @ti_msw_start(double* nocapture %0) {
%2 = load double, double* %0
%3 = fptosi double %2 to i32
ret i32 %3
}
int left_child(int index) { return (index << 1) + 1; }


x86 assembly (clang, -O0):
<left_child>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<left_child>:
lea    (%rdi,%rdi,1),%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @left_child(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 1
%5 = add nsw i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @left_child(i32 %0) {
%2 = shl i32 %0, 1
%3 = or i32 %2, 1
ret i32 %3
}
int test_imm_ACint8_reg(signed char val) {
  return ((val) & (-0xAC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_ACint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff54,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_ACint8_reg>:
test   $0xffffff54,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_ACint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -172
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_ACint8_reg(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = and i32 %2, -172
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int strlen(char *);
void truncstring(char *string) {
  int length;
  length = strlen(string);
  while (string[--length] == ' ')
    string[length] = '\0';
}


x86 assembly (clang, -O0):
<truncstring>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x20,%eax
jne    1156 <truncstring+0x46>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
jmp    1128 <truncstring+0x18>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<truncstring>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
cltq
cmpb   $0x20,-0x1(%rax,%rbx,1)
jne    113d <truncstring+0x2d>
add    %rbx,%rax
add    $0xffffffffffffffff,%rax
nopl   0x0(%rax)
movb   $0x0,(%rax)
cmpb   $0x20,-0x1(%rax)
lea    -0x1(%rax),%rax
je     1130 <truncstring+0x20>
pop    %rbx
ret

LLVM IR (-O0):
define void @truncstring(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
store i32 %5, i32* %3
br label %6
6: ; preds = %15, %1
%7 = load i8*, i8** %2
%8 = load i32, i32* %3
%9 = add nsw i32 %8, -1
store i32 %9, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %7, i64 %10
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 32
br i1 %14, label %15, label %20
15: ; preds = %6
%16 = load i8*, i8** %2
%17 = load i32, i32* %3
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
store i8 0, i8* %19
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @truncstring(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, -1
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 32
br i1 %7, label %8, label %15
8: ; preds = %1, %8
%9 = phi i64 [ %11, %8 ], [ %4, %1 ]
%10 = phi i8* [ %12, %8 ], [ %5, %1 ]
store i8 0, i8* %10
%11 = add i64 %9, -1
%12 = getelementptr inbounds i8, i8* %0, i64 %11
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 32
br i1 %14, label %8, label %15
15: ; preds = %8, %1
ret void
}
void abcde1fghijklmn9opqrstuvwxzy() {}


x86 assembly (clang, -O0):
<abcde1fghijklmn9opqrstuvwxzy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<abcde1fghijklmn9opqrstuvwxzy>:
ret

LLVM IR (-O0):
define void @abcde1fghijklmn9opqrstuvwxzy() {
ret void
}

LLVM IR (-O2):
define void @abcde1fghijklmn9opqrstuvwxzy() {
ret void
}
double opPlus(double lhs, double rhs) { return lhs + rhs; }


x86 assembly (clang, -O0):
<opPlus>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<opPlus>:
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @opPlus(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fadd double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @opPlus(double %0, double %1) {
%3 = fadd double %0, %1
ret double %3
}
double Mag2(a)
double a[3];
{ return (a[0] * a[0] + a[1] * a[1] + a[2] * a[2]); }


x86 assembly (clang, -O0):
<Mag2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
mulsd  0x8(%rax),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Mag2>:
movsd  (%rdi),%xmm1
movsd  0x8(%rdi),%xmm0
mulsd  %xmm0,%xmm0
mulsd  %xmm1,%xmm1
addsd  %xmm0,%xmm1
movsd  0x10(%rdi),%xmm0
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @Mag2(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = load double*, double** %2
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = load double*, double** %2
%10 = getelementptr inbounds double, double* %9, i64 1
%11 = load double, double* %10
%12 = load double*, double** %2
%13 = getelementptr inbounds double, double* %12, i64 1
%14 = load double, double* %13
%15 = fmul double %11, %14
%16 = call double @llvm.fmuladd.f64(double %5, double %8, double %15)
%17 = load double*, double** %2
%18 = getelementptr inbounds double, double* %17, i64 2
%19 = load double, double* %18
%20 = load double*, double** %2
%21 = getelementptr inbounds double, double* %20, i64 2
%22 = load double, double* %21
%23 = call double @llvm.fmuladd.f64(double %19, double %22, double %16)
ret double %23
}

LLVM IR (-O2):
define double @Mag2(double* nocapture %0) {
%2 = load double, double* %0
%3 = getelementptr inbounds double, double* %0, i64 1
%4 = load double, double* %3
%5 = fmul double %4, %4
%6 = tail call double @llvm.fmuladd.f64(double %2, double %2, double %5)
%7 = getelementptr inbounds double, double* %0, i64 2
%8 = load double, double* %7
%9 = tail call double @llvm.fmuladd.f64(double %8, double %8, double %6)
ret double %9
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int main(void) {
  puts("\nCode>Zone Shared Library\n  A simple tool to reorganize your "
       "code.\n\n  (C) Karim Vergnes <thesola10@bobile.fr>\n  More info on the "
       "API can be found at http://github.bobile.fr/CodeZone\n");
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [183 x i8] c"\0ACode>Zone Shared Library\0A A simple tool to reorganize your code.\0A\0A (C) Karim Vergnes <thesola10@bobile.fr>\0A More info on the API can be found at http://github.bobile.fr/CodeZone\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @puts(i8* getelementptr inbounds ([183 x i8], [183 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [183 x i8] c"\0ACode>Zone Shared Library\0A A simple tool to reorganize your code.\0A\0A (C) Karim Vergnes <thesola10@bobile.fr>\0A More info on the API can be found at http://github.bobile.fr/CodeZone\0A\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([183 x i8], [183 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
void init_multircv(void) {}


x86 assembly (clang, -O0):
<init_multircv>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_multircv>:
ret

LLVM IR (-O0):
define void @init_multircv() {
ret void
}

LLVM IR (-O2):
define void @init_multircv() {
ret void
}
/* Type definitions */
struct statfs {
  int dummy;
};

/* Variables and functions */
int syscall(int, int, int, struct statfs *);
int __fstatfs(int fd, struct statfs *buf) {
  return syscall(267, fd, sizeof *buf, buf);
}


x86 assembly (clang, -O0):
<__fstatfs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rcx
mov    $0x10b,%edi
mov    $0x4,%edx
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__fstatfs>:
mov    %rsi,%rcx
mov    %edi,%esi
mov    $0x10b,%edi
mov    $0x4,%edx
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.statfs = type { i32 }
define i32 @__fstatfs(i32 %0, %struct.statfs* %1) {
%3 = alloca i32
%4 = alloca %struct.statfs*
store i32 %0, i32* %3
store %struct.statfs* %1, %struct.statfs** %4
%5 = load i32, i32* %3
%6 = load %struct.statfs*, %struct.statfs** %4
%7 = call i32 @syscall(i32 267, i32 %5, i32 4, %struct.statfs* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.statfs = type { i32 }
define i32 @__fstatfs(i32 %0, %struct.statfs* %1) {
%3 = tail call i32 @syscall(i32 267, i32 %0, i32 4, %struct.statfs* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void show_help() {
  printf(
      "UDP ping utility. Copyright @ 2016 Kewin Rausch\n"
      "This tool should be mainly used for network debugging functionalities.\n"
      "\n"
      "Mandatory fields:\n"
      "    Server mode: udping <ip_address> <udp_port> --listen [options]\n"
      "    Client mode: udping <ip_address> <udp_port> [other]\n"
      "\n"
      "If used without any additional option will start a base ping test.\n"
      "Other options:\n"
      "    -interval\n"
      "        For client, the wait options indicates how much time you have "
      "to\n"
      "        wait before repeating the operation. This value is expressed "
      "in\n"
      "        milliseconds (default is 1000).\n"
      "    --count\n"
      "        Number of test to perform (default is 10)."
      "\n");
}


x86 assembly (clang, -O0):
<show_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_help>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [607 x i8] c"UDP ping utility. Copyright @ 2016 Kewin Rausch\0AThis tool should be mainly used for network debugging functionalities.\0A\0AMandatory fields:\0A Server mode: udping <ip_address> <udp_port> --listen [options]\0A Client mode: udping <ip_address> <udp_port> [other]\0A\0AIf used without any additional option will start a base ping test.\0AOther options:\0A -interval\0A For client, the wait options indicates how much time you have to\0A wait before repeating the operation. This value is expressed in\0A milliseconds (default is 1000).\0A --count\0A Number of test to perform (default is 10).\0A\00"
define void @show_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([607 x i8], [607 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [606 x i8] c"UDP ping utility. Copyright @ 2016 Kewin Rausch\0AThis tool should be mainly used for network debugging functionalities.\0A\0AMandatory fields:\0A Server mode: udping <ip_address> <udp_port> --listen [options]\0A Client mode: udping <ip_address> <udp_port> [other]\0A\0AIf used without any additional option will start a base ping test.\0AOther options:\0A -interval\0A For client, the wait options indicates how much time you have to\0A wait before repeating the operation. This value is expressed in\0A milliseconds (default is 1000).\0A --count\0A Number of test to perform (default is 10).\00"
define void @show_help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([606 x i8], [606 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ thr1(int /*<<< orphan*/);
int /*<<< orphan*/ thr2(int /*<<< orphan*/);
int /*<<< orphan*/ thr3(int /*<<< orphan*/);
int /*<<< orphan*/ thr4(int /*<<< orphan*/);
int /*<<< orphan*/ thr5(int /*<<< orphan*/);
int /*<<< orphan*/ thr6(int /*<<< orphan*/);
int /*<<< orphan*/ thr7(int /*<<< orphan*/);
int main() {
__CPROVER_ASYNC_0:
  thr1(0);
__CPROVER_ASYNC_1:
  thr2(0);
__CPROVER_ASYNC_2:
  thr3(0);
__CPROVER_ASYNC_3:
  thr4(0);
__CPROVER_ASYNC_4:
  thr5(0);
__CPROVER_ASYNC_5:
  thr6(0);
__CPROVER_ASYNC_6:
  thr7(0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1030 <thr1@plt>
xor    %edi,%edi
call   1050 <thr2@plt>
xor    %edi,%edi
call   1080 <thr3@plt>
xor    %edi,%edi
call   1040 <thr4@plt>
xor    %edi,%edi
call   1070 <thr5@plt>
xor    %edi,%edi
call   1060 <thr6@plt>
xor    %edi,%edi
call   1090 <thr7@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <thr1@plt>
xor    %edi,%edi
call   1050 <thr2@plt>
xor    %edi,%edi
call   1080 <thr3@plt>
xor    %edi,%edi
call   1040 <thr4@plt>
xor    %edi,%edi
call   1070 <thr5@plt>
xor    %edi,%edi
call   1060 <thr6@plt>
xor    %edi,%edi
call   1090 <thr7@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0
%3 = call i32 @thr1(i32 0)
br label %4
4: ; preds = %2
%5 = call i32 @thr2(i32 0)
br label %6
6: ; preds = %4
%7 = call i32 @thr3(i32 0)
br label %8
8: ; preds = %6
%9 = call i32 @thr4(i32 0)
br label %10
10: ; preds = %8
%11 = call i32 @thr5(i32 0)
br label %12
12: ; preds = %10
%13 = call i32 @thr6(i32 0)
br label %14
14: ; preds = %12
%15 = call i32 @thr7(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @thr1(i32 0)
%2 = tail call i32 @thr2(i32 0)
%3 = tail call i32 @thr3(i32 0)
%4 = tail call i32 @thr4(i32 0)
%5 = tail call i32 @thr5(i32 0)
%6 = tail call i32 @thr6(i32 0)
%7 = tail call i32 @thr7(i32 0)
ret i32 0
}
__attribute__((weak)) __attribute__((no_instrument_function)) void
alias_func(void) {}


x86 assembly (clang, -O0):
<alias_func>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alias_func>:
ret

LLVM IR (-O0):
define weak void @alias_func() {
ret void
}

LLVM IR (-O2):
define weak void @alias_func() {
ret void
}
/* Variables and functions */
int hexVal(char);
int hexDec(char first, char second) {
  int dec = 0;
  dec += (hexVal(first) * 16) + (hexVal(second));
  return dec;
}


x86 assembly (clang, -O0):
<hexDec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0x0,-0x8(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <hexVal@plt>
shl    $0x4,%eax
mov    %eax,-0xc(%rbp)
movsbl -0x2(%rbp),%edi
call   1030 <hexVal@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hexDec>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
call   1030 <hexVal@plt>
mov    %eax,%ebp
shl    $0x4,%ebp
mov    %ebx,%edi
call   1030 <hexVal@plt>
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @hexDec(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 0, i32* %5
%6 = load i8, i8* %3
%7 = call i32 @hexVal(i8 signext %6)
%8 = mul nsw i32 %7, 16
%9 = load i8, i8* %4
%10 = call i32 @hexVal(i8 signext %9)
%11 = add nsw i32 %8, %10
%12 = load i32, i32* %5
%13 = add nsw i32 %12, %11
store i32 %13, i32* %5
%14 = load i32, i32* %5
ret i32 %14
}

LLVM IR (-O2):
define i32 @hexDec(i8 signext %0, i8 signext %1) {
%3 = tail call i32 @hexVal(i8 signext %0)
%4 = shl nsw i32 %3, 4
%5 = tail call i32 @hexVal(i8 signext %1)
%6 = add nsw i32 %4, %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x43() {
  Assert_real((isspace(67) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              340, ("isspace should be 0 for C"));
}


x86 assembly (clang, -O0):
<t_isspace_0x43>:
push   %rbp
mov    %rsp,%rbp
mov    $0x43,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x154,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x43>:
push   %rax
mov    $0x43,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x154,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for C\00"
define void @t_isspace_0x43() {
%1 = call i64 @isspace(i32 67)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 340, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for C\00"
define void @t_isspace_0x43() {
%1 = tail call i64 @isspace(i32 67)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 340, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void ff_get_cpu_flags_arm() {}


x86 assembly (clang, -O0):
<ff_get_cpu_flags_arm>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_get_cpu_flags_arm>:
ret

LLVM IR (-O0):
define void @ff_get_cpu_flags_arm() {
ret void
}

LLVM IR (-O2):
define void @ff_get_cpu_flags_arm() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fwrite(int /*<<< orphan*/ *, int, int, int /*<<< orphan*/ *);
void fwriteint32_t(uint32_t data, FILE *fp) { fwrite(&data, 1, 4, fp); }


x86 assembly (clang, -O0):
<fwriteint32_t>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
lea    -0x4(%rbp),%rdi
mov    $0x1,%esi
mov    $0x4,%edx
call   1030 <fwrite@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fwriteint32_t>:
push   %rax
mov    %rsi,%rcx
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rdi
mov    $0x1,%esi
mov    $0x4,%edx
call   1030 <fwrite@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @fwriteint32_t(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = call i32 @fwrite(i32* %3, i32 1, i32 4, i32* %5)
ret void
}

LLVM IR (-O2):
define void @fwriteint32_t(i32 %0, i32* nocapture %1) {
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 @fwrite(i32* %3, i32 1, i32 4, i32* %1)
ret void
}
unsigned int C_Utils_min_uint(const unsigned int item1,
                              const unsigned int item2) {
  return item1 > item2 ? item1 : item2;
}


x86 assembly (clang, -O0):
<C_Utils_min_uint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jbe    1121 <C_Utils_min_uint+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <C_Utils_min_uint+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<C_Utils_min_uint>:
mov    %esi,%eax
cmp    %esi,%edi
cmova  %edi,%eax
ret

LLVM IR (-O0):
define i32 @C_Utils_min_uint(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ugt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @C_Utils_min_uint(i32 %0, i32 %1) {
%3 = icmp ugt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
void lockdep_unregister_key(struct lock_class_key *key) {}


x86 assembly (clang, -O0):
<lockdep_unregister_key>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<lockdep_unregister_key>:
ret

LLVM IR (-O0):
%struct.lock_class_key = type opaque
define void @lockdep_unregister_key(%struct.lock_class_key* %0) {
%2 = alloca %struct.lock_class_key*
store %struct.lock_class_key* %0, %struct.lock_class_key** %2
ret void
}

LLVM IR (-O2):
%struct.lock_class_key = type opaque
define void @lockdep_unregister_key(%struct.lock_class_key* nocapture %0) {
ret void
}