int main() {
  volatile float pos1 = 1.;
  volatile float neg1 = -1.;
  volatile float posZero = 0.;
  volatile float negZero = -0.;
  volatile float nan = __builtin_nanf("");
  if (__builtin_isunordered(neg1, neg1) != 0) {
    return 1;
  }
  if (__builtin_isunordered(posZero, negZero) != 0) {
    return 1;
  }
  if (__builtin_isunordered(pos1, nan) == 0) {
    return 1;
  }
  if (__builtin_isunordered(nan, pos1) == 0) {
    return 1;
  }
  if (__builtin_isunordered(nan, nan) == 0) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movss  0xef9(%rip),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  0xee8(%rip),%xmm0
movss  %xmm0,-0xc(%rbp)
xorps  %xmm0,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  0xecf(%rip),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  0xebe(%rip),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  -0xc(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
ucomiss %xmm1,%xmm0
setp   %al
and    $0x1,%al
movzbl %al,%eax
cmp    $0x0,%eax
je     1171 <main+0x71>
movl   $0x1,-0x4(%rbp)
jmp    1220 <main+0x120>
movss  -0x10(%rbp),%xmm0
movss  -0x14(%rbp),%xmm1
ucomiss %xmm1,%xmm0
setp   %al
and    $0x1,%al
movzbl %al,%eax
cmp    $0x0,%eax
je     119b <main+0x9b>
movl   $0x1,-0x4(%rbp)
jmp    1220 <main+0x120>
movss  -0x8(%rbp),%xmm0
movss  -0x18(%rbp),%xmm1
ucomiss %xmm1,%xmm0
setp   %al
and    $0x1,%al
movzbl %al,%eax
cmp    $0x0,%eax
jne    11c5 <main+0xc5>
movl   $0x1,-0x4(%rbp)
jmp    1220 <main+0x120>
movss  -0x18(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
ucomiss %xmm1,%xmm0
setp   %al
and    $0x1,%al
movzbl %al,%eax
cmp    $0x0,%eax
jne    11ef <main+0xef>
movl   $0x1,-0x4(%rbp)
jmp    1220 <main+0x120>
movss  -0x18(%rbp),%xmm0
movss  -0x18(%rbp),%xmm1
ucomiss %xmm1,%xmm0
setp   %al
and    $0x1,%al
movzbl %al,%eax
cmp    $0x0,%eax
jne    1219 <main+0x119>
movl   $0x1,-0x4(%rbp)
jmp    1220 <main+0x120>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
movl   $0x3f800000,-0xc(%rsp)
3f
movl   $0xbf800000,-0x10(%rsp)
bf
movl   $0x0,-0x4(%rsp)
movl   $0x80000000,-0x8(%rsp)
80
movl   $0x7fc00000,-0x14(%rsp)
7f
movss  -0x10(%rsp),%xmm0
mov    $0x1,%eax
ucomiss -0x10(%rsp),%xmm0
jp     1154 <main+0x54>
movss  -0x4(%rsp),%xmm0
ucomiss -0x8(%rsp),%xmm0
jp     1154 <main+0x54>
movss  -0xc(%rsp),%xmm0
ucomiss -0x14(%rsp),%xmm0
jp     1155 <main+0x55>
ret
movss  -0x14(%rsp),%xmm0
ucomiss -0xc(%rsp),%xmm0
jnp    1154 <main+0x54>
movss  -0x14(%rsp),%xmm0
xor    %eax,%eax
ucomiss -0x14(%rsp),%xmm0
setnp  %al
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca float
%3 = alloca float
%4 = alloca float
%5 = alloca float
%6 = alloca float
store i32 0, i32* %1
store volatile float 1.000000e+00, float* %2
store volatile float -1.000000e+00, float* %3
store volatile float 0.000000e+00, float* %4
store volatile float -0.000000e+00, float* %5
store volatile float 0x7FF8000000000000, float* %6
%7 = load volatile float, float* %3
%8 = load volatile float, float* %3
%9 = fcmp uno float %7, %8
%10 = zext i1 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %0
store i32 1, i32* %1
br label %42
13: ; preds = %0
%14 = load volatile float, float* %4
%15 = load volatile float, float* %5
%16 = fcmp uno float %14, %15
%17 = zext i1 %16 to i32
%18 = icmp ne i32 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %13
store i32 1, i32* %1
br label %42
20: ; preds = %13
%21 = load volatile float, float* %2
%22 = load volatile float, float* %6
%23 = fcmp uno float %21, %22
%24 = zext i1 %23 to i32
%25 = icmp eq i32 %24, 0
br i1 %25, label %26, label %27
26: ; preds = %20
store i32 1, i32* %1
br label %42
27: ; preds = %20
%28 = load volatile float, float* %6
%29 = load volatile float, float* %2
%30 = fcmp uno float %28, %29
%31 = zext i1 %30 to i32
%32 = icmp eq i32 %31, 0
br i1 %32, label %33, label %34
33: ; preds = %27
store i32 1, i32* %1
br label %42
34: ; preds = %27
%35 = load volatile float, float* %6
%36 = load volatile float, float* %6
%37 = fcmp uno float %35, %36
%38 = zext i1 %37 to i32
%39 = icmp eq i32 %38, 0
br i1 %39, label %40, label %41
40: ; preds = %34
store i32 1, i32* %1
br label %42
41: ; preds = %34
store i32 0, i32* %1
br label %42
42: ; preds = %41, %40, %33, %26, %19, %12
%43 = load i32, i32* %1
ret i32 %43
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca float
%2 = alloca float
%3 = alloca float
%4 = alloca float
%5 = alloca float
%6 = bitcast float* %1 to i8*
store volatile float 1.000000e+00, float* %1
%7 = bitcast float* %2 to i8*
store volatile float -1.000000e+00, float* %2
%8 = bitcast float* %3 to i8*
store volatile float 0.000000e+00, float* %3
%9 = bitcast float* %4 to i8*
store volatile float -0.000000e+00, float* %4
%10 = bitcast float* %5 to i8*
store volatile float 0x7FF8000000000000, float* %5
%11 = load volatile float, float* %2
%12 = load volatile float, float* %2
%13 = fcmp uno float %11, %12
br i1 %13, label %31, label %14
14: ; preds = %0
%15 = load volatile float, float* %3
%16 = load volatile float, float* %4
%17 = fcmp uno float %15, %16
br i1 %17, label %31, label %18
18: ; preds = %14
%19 = load volatile float, float* %1
%20 = load volatile float, float* %5
%21 = fcmp ord float %19, %20
br i1 %21, label %31, label %22
22: ; preds = %18
%23 = load volatile float, float* %5
%24 = load volatile float, float* %1
%25 = fcmp ord float %23, %24
br i1 %25, label %31, label %26
26: ; preds = %22
%27 = load volatile float, float* %5
%28 = load volatile float, float* %5
%29 = fcmp ord float %27, %28
%30 = zext i1 %29 to i32
br label %31
31: ; preds = %26, %22, %18, %14, %0
%32 = phi i32 [ 1, %0 ], [ 1, %14 ], [ 1, %18 ], [ 1, %22 ], [ %30, %26 ]
ret i32 %32
}