xunge/DecIR huggingface dataset:
unsigned xrop3_146_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  unsigned stk4;
  stk4 = D | T;
  stk3 = S & stk4;
  stk2 = T ^ stk3;
  stk1 = D ^ stk2;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_146_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0xc(%rbp),%eax
and    -0x20(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
xor    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_146_1_0>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
mov    %esi,%ecx
shl    $0x8,%ecx
lea    (%rsi,%rcx,1),%edx
or     $0xff,%ecx
and    %eax,%ecx
xor    %edx,%ecx
xor    $0xff,%ecx
not    %eax
and    %ecx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_146_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = shl i32 %13, 8
%15 = load i8, i8* %3
%16 = zext i8 %15 to i32
%17 = or i32 %14, %16
store i32 %17, i32* %6
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = shl i32 %19, 8
%21 = load i8, i8* %4
%22 = zext i8 %21 to i32
%23 = or i32 %20, %22
store i32 %23, i32* %7
%24 = load i32, i32* %5
%25 = load i32, i32* %7
%26 = or i32 %24, %25
store i32 %26, i32* %11
%27 = load i32, i32* %6
%28 = load i32, i32* %11
%29 = and i32 %27, %28
store i32 %29, i32* %10
%30 = load i32, i32* %7
%31 = load i32, i32* %10
%32 = xor i32 %30, %31
store i32 %32, i32* %9
%33 = load i32, i32* %5
%34 = load i32, i32* %9
%35 = xor i32 %33, %34
store i32 %35, i32* %8
%36 = load i32, i32* %8
%37 = load i32, i32* %6
%38 = xor i32 %37, -1
%39 = and i32 %36, %38
%40 = load i32, i32* %5
%41 = load i32, i32* %6
%42 = and i32 %40, %41
%43 = or i32 %39, %42
ret i32 %43
}

LLVM IR (-O2):
define i32 @xrop3_146_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = shl nuw nsw i32 %5, 8
%7 = or i32 %6, %5
%8 = or i32 %6, 255
%9 = and i32 %8, %4
%10 = xor i32 %7, %9
%11 = xor i32 %10, 255
%12 = xor i32 %4, -1
%13 = and i32 %11, %12
%14 = or i32 %13, %3
ret i32 %14
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void I2SSampleStampDisable(uint32_t ui32Base) {
  ;
  (*((volatile unsigned long *)(0x40021000 + 0x00000034))) = 0;
}


x86 assembly (clang, -O0):
<I2SSampleStampDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x40021034,%eax
movq   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2SSampleStampDisable>:
movq   $0x0,0x40021034
ret

LLVM IR (-O0):
define void @I2SSampleStampDisable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
store volatile i64 0, i64* inttoptr (i64 1073877044 to i64*)
ret void
}

LLVM IR (-O2):
define void @I2SSampleStampDisable(i32 %0) {
store volatile i64 0, i64* inttoptr (i64 1073877044 to i64*)
ret void
}
void handle_BUS(sig) int sig;
{}


x86 assembly (clang, -O0):
<handle_BUS>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_BUS>:
ret

LLVM IR (-O0):
define void @handle_BUS(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @handle_BUS(i32 %0) {
ret void
}
/* Variables and functions */
double drand48();
float MyRand(void) { return 10.0 * (drand48() - 0.5); }


x86 assembly (clang, -O0):
<MyRand>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <drand48@plt>
movaps %xmm0,%xmm1
movsd  0xee2(%rip),%xmm0
subsd  %xmm0,%xmm1
movsd  0xece(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<MyRand>:
push   %rax
xor    %eax,%eax
call   1030 <drand48@plt>
addsd  0xee0(%rip),%xmm0
mulsd  0xee0(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @MyRand() {
%1 = call double (...) @drand48()
%2 = fsub double %1, 5.000000e-01
%3 = fmul double 1.000000e+01, %2
%4 = fptrunc double %3 to float
ret float %4
}

LLVM IR (-O2):
define float @MyRand() {
%1 = tail call double (...) @drand48()
%2 = fadd double %1, -5.000000e-01
%3 = fmul double %2, 1.000000e+01
%4 = fptrunc double %3 to float
ret float %4
}
__attribute__((no, noclone)) unsigned __int128 t105_5mul(unsigned char x) {
  unsigned __int128 r;
  if (__builtin_mul_overflow(x, (signed char)(-2), &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t105_5mul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %dil,%al
mov    %al,-0x11(%rbp)
movzbl -0x11(%rbp),%eax
mov    %eax,%edx
xor    %eax,%eax
add    %rdx,%rdx
neg    %rdx
mov    %rax,%rcx
sbb    %rcx,%rcx
sbb    %rax,%rax
and    $0x1,%al
mov    %rdx,-0x30(%rbp)
mov    %rcx,-0x28(%rbp)
test   $0x1,%al
jne    114c <t105_5mul+0x3c>
jmp    1153 <t105_5mul+0x43>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x30(%rbp),%rax
mov    -0x28(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t105_5mul>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %eax,%eax
add    %rbx,%rbx
neg    %rbx
mov    $0x0,%r14d
sbb    %r14,%r14
sbb    %rax,%rax
and    $0x1,%rax
je     1137 <t105_5mul+0x27>
xor    %eax,%eax
call   1030 <bar@plt>
mov    %rbx,%rax
mov    %r14,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define { i64, i64 } @t105_5mul(i8 zeroext %0) {
%2 = alloca i128
%3 = alloca i8
%4 = alloca i128
store i8 %0, i8* %3
%5 = load i8, i8* %3
%6 = zext i8 %5 to i129
%7 = call { i129, i1 } @llvm.smul.with.overflow.i129(i129 %6, i129 -2)
%8 = extractvalue { i129, i1 } %7, 1
%9 = extractvalue { i129, i1 } %7, 0
%10 = trunc i129 %9 to i128
%11 = zext i128 %10 to i129
%12 = icmp ne i129 %9, %11
%13 = or i1 %8, %12
store i128 %10, i128* %4
br i1 %13, label %14, label %16
14: ; preds = %1
%15 = call i32 (...) @bar()
br label %16
16: ; preds = %14, %1
%17 = load i128, i128* %4
store i128 %17, i128* %2
%18 = bitcast i128* %2 to { i64, i64 }*
%19 = load { i64, i64 }, { i64, i64 }* %18
ret { i64, i64 } %19
}

LLVM IR (-O2):
define { i64, i64 } @t105_5mul(i8 zeroext %0) {
%2 = zext i8 %0 to i129
%3 = mul nsw i129 %2, -2
%4 = and i129 %3, 340282366920938463463374607431768211454
%5 = icmp eq i129 %3, %4
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 (...) @bar()
br label %8
8: ; preds = %6, %1
%9 = trunc i129 %3 to i64
%10 = lshr i129 %3, 64
%11 = trunc i129 %10 to i64
%12 = insertvalue { i64, i64 } poison, i64 %9, 0
%13 = insertvalue { i64, i64 } %12, i64 %11, 1
ret { i64, i64 } %13
}
/* Variables and functions */
char *getenv(char *);
char *malloc(scalar_t__);
int /*<<< orphan*/ sprintf(char *, char *, char *);
scalar_t__ strlen(char *);
char *get_conf_file(void) {
  char *ret = malloc(strlen(getenv("HOME")) + 9);
  sprintf(ret, "%s/.gdcdrc", getenv("HOME"));
  return ret;
}


x86 assembly (clang, -O0):
<get_conf_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xeb1(%rip),%rdi
call   1030 <getenv@plt>
mov    %rax,%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x9,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
lea    0xe85(%rip),%rdi
call   1030 <getenv@plt>
mov    -0x10(%rbp),%rdi
mov    %rax,%rdx
lea    0xe77(%rip),%rsi
call   1060 <sprintf@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_conf_file>:
push   %r14
push   %rbx
push   %rax
lea    0xeb5(%rip),%r14
mov    %r14,%rdi
call   1030 <getenv@plt>
mov    %rax,%rdi
call   1040 <strlen@plt>
lea    0x9(%rax),%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1030 <getenv@plt>
lea    0xe8f(%rip),%rsi
mov    %rbx,%rdi
mov    %rax,%rdx
call   1060 <sprintf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [5 x i8] c"HOME\00"
@.str.1 = [11 x i8] c"%s/.gdcdrc\00"
define i8* @get_conf_file() {
%1 = alloca i8*
%2 = call i8* @getenv(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = call i64 @strlen(i8* %2)
%4 = add nsw i64 %3, 9
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %1
%6 = load i8*, i8** %1
%7 = call i8* @getenv(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* %7)
%9 = load i8*, i8** %1
ret i8* %9
}

LLVM IR (-O2):
@.str = [5 x i8] c"HOME\00"
@.str.1 = [11 x i8] c"%s/.gdcdrc\00"
define noalias i8* @get_conf_file() {
%1 = tail call i8* @getenv(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%2 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%3 = add nsw i64 %2, 9
%4 = tail call i8* @malloc(i64 %3)
%5 = tail call i8* @getenv(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 @sprintf(i8* dereferenceable(1) %4, i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* %5)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int /*<<< orphan*/ printf(char *);
int dup(int fildes __attribute__((unused))) {
  printf("dup\n");
  errno = ENOSYS;
  return (-1);
}


x86 assembly (clang, -O0):
<dup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eba(%rip),%rax
mov    (%rax),%ecx
mov    0x2ea1(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dup>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2ec4(%rip),%rax
mov    (%rax),%eax
mov    0x2eab(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"dup\0A\00"
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @dup(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* @ENOSYS
store i32 %4, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
@str = [4 x i8] c"dup\00"
define i32 @dup(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @str, i64 0, i64 0))
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}
void Reboot() {
  unsigned char good = 0x02;
  while ((good & 0x02) != 0) {
    good = inb(0x64);
  }
  outb(0x64, 0xFE);
  asm volatile("xor %eax,%eax; lidt (%eax); int $100;");
}


x86 assembly (clang, -O0):
<Reboot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x2,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     1150 <Reboot+0x30>
mov    $0x64,%edi
mov    $0x0,%al
call   1040 <inb@plt>
mov    %al,-0x1(%rbp)
jmp    112c <Reboot+0xc>
mov    $0x64,%edi
mov    $0xfe,%esi
mov    $0x0,%al
call   1030 <outb@plt>
xor    %eax,%eax
lidt   (%eax)
int    $0x64
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Reboot>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x64,%edi
xor    %eax,%eax
call   1040 <inb@plt>
test   $0x2,%al
jne    1130 <Reboot+0x10>
mov    $0x64,%edi
mov    $0xfe,%esi
xor    %eax,%eax
call   1030 <outb@plt>
xor    %eax,%eax
lidt   (%eax)
int    $0x64
pop    %rax
ret

LLVM IR (-O0):
define void @Reboot() {
%1 = alloca i8
store i8 2, i8* %1
br label %2
2: ; preds = %7, %0
%3 = load i8, i8* %1
%4 = zext i8 %3 to i32
%5 = and i32 %4, 2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = call i32 (i32, ...) bitcast (i32 (...)* @inb to i32 (i32, ...)*)(i32 100)
%9 = trunc i32 %8 to i8
store i8 %9, i8* %1
br label %2
10: ; preds = %2
%11 = call i32 (i32, i32, ...) bitcast (i32 (...)* @outb to i32 (i32, i32, ...)*)(i32 100, i32 254)
ret void
}

LLVM IR (-O2):
define void @Reboot() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @inb to i32 (i32, ...)*)(i32 100)
%3 = and i32 %2, 2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %1
5: ; preds = %1
%6 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @outb to i32 (i32, i32, ...)*)(i32 100, i32 254)
tail call void asm sideeffect "xor %eax,%eax; lidt (%eax); int $$100;", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
scalar_t__ isupper(char);
char tolower(char);
void strlwr_inplace(char *str) {
  char *cp = str;
  while (*cp) {
    if (isupper(*cp)) {
      *cp = tolower(*cp);
    }
    cp++;
  }
}


x86 assembly (clang, -O0):
<strlwr_inplace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     117c <strlwr_inplace+0x5c>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1040 <isupper@plt>
cmp    $0x0,%rax
je     116b <strlwr_inplace+0x4b>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <tolower@plt>
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1134 <strlwr_inplace+0x14>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlwr_inplace>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1155 <strlwr_inplace+0x35>
mov    %rdi,%rbx
jmp    113c <strlwr_inplace+0x1c>
nopl   0x0(%rax)
movzbl 0x1(%rbx),%eax
add    $0x1,%rbx
test   %al,%al
je     1155 <strlwr_inplace+0x35>
movsbl %al,%edi
call   1040 <isupper@plt>
test   %rax,%rax
je     1130 <strlwr_inplace+0x10>
movsbl (%rbx),%edi
call   1030 <tolower@plt>
mov    %al,(%rbx)
jmp    1130 <strlwr_inplace+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @strlwr_inplace(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %19, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %22
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = call i64 @isupper(i8 signext %11)
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %19
14: ; preds = %9
%15 = load i8*, i8** %3
%16 = load i8, i8* %15
%17 = call signext i8 @tolower(i8 signext %16)
%18 = load i8*, i8** %3
store i8 %17, i8* %18
br label %19
19: ; preds = %14, %9
%20 = load i8*, i8** %3
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %3
br label %5
22: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @strlwr_inplace(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %12
%5 = phi i8 [ %14, %12 ], [ %2, %1 ]
%6 = phi i8* [ %13, %12 ], [ %0, %1 ]
%7 = tail call i64 @isupper(i8 signext %5)
%8 = icmp eq i64 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %4
%10 = load i8, i8* %6
%11 = tail call signext i8 @tolower(i8 signext %10)
store i8 %11, i8* %6
br label %12
12: ; preds = %9, %4
%13 = getelementptr inbounds i8, i8* %6, i64 1
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %4
16: ; preds = %12, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ openKey();
void startPowerPackUserOperation(void) { openKey(); }


x86 assembly (clang, -O0):
<startPowerPackUserOperation>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <openKey@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<startPowerPackUserOperation>:
xor    %eax,%eax
jmp    1030 <openKey@plt>

LLVM IR (-O0):
define void @startPowerPackUserOperation() {
%1 = call i32 (...) @openKey()
ret void
}

LLVM IR (-O2):
define void @startPowerPackUserOperation() {
%1 = tail call i32 (...) @openKey()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ config_write_buffer(char const *, char const *,
                                       int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char const *);
void config_write_string(const char *name, const char *string) {
  config_write_buffer(name, string, strlen(string));
}


x86 assembly (clang, -O0):
<config_write_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1040 <config_write_buffer@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_write_string>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <config_write_buffer@plt>

LLVM IR (-O0):
define void @config_write_string(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i32 @config_write_buffer(i8* %5, i8* %6, i32 %8)
ret void
}

LLVM IR (-O2):
define void @config_write_string(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @config_write_buffer(i8* %0, i8* %1, i32 %3)
ret void
}
char *ecvtbuf(double value, int ndigits, int *decpt, int *sign, char *buf) {}


x86 assembly (clang, -O0):
<ecvtbuf>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
mov    %edi,-0x14(%rbp)
mov    %rsi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ecvtbuf>:
ret

LLVM IR (-O0):
define i8* @ecvtbuf(double %0, i32 %1, i32* %2, i32* %3, i8* %4) {
%6 = alloca i8*
%7 = alloca double
%8 = alloca i32
%9 = alloca i32*
%10 = alloca i32*
%11 = alloca i8*
store double %0, double* %7
store i32 %1, i32* %8
store i32* %2, i32** %9
store i32* %3, i32** %10
store i8* %4, i8** %11
%12 = load i8*, i8** %6
ret i8* %12
}

LLVM IR (-O2):
define noalias i8* @ecvtbuf(double %0, i32 %1, i32* nocapture readnone %2, i32* nocapture readnone %3, i8* nocapture readnone %4) {
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ addNode(char *);
int /*<<< orphan*/ printLink();
int main(int argc, char const *argv[]) {
  addNode("ssss");
  addNode("ssss");
  addNode("sss");
  printLink();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
call   1030 <addNode@plt>
lea    0xeb7(%rip),%rdi
call   1030 <addNode@plt>
lea    0xeac(%rip),%rdi
call   1030 <addNode@plt>
mov    $0x0,%al
call   1040 <printLink@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xed8(%rip),%rbx
mov    %rbx,%rdi
call   1030 <addNode@plt>
mov    %rbx,%rdi
call   1030 <addNode@plt>
lea    0xec2(%rip),%rdi
call   1030 <addNode@plt>
xor    %eax,%eax
call   1040 <printLink@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"ssss\00"
@.str.1 = [4 x i8] c"sss\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @addNode(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @addNode(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @addNode(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%9 = call i32 (...) @printLink()
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"ssss\00"
@.str.1 = [4 x i8] c"sss\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @addNode(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @addNode(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 @addNode(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
%6 = tail call i32 (...) @printLink()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
char *xmalloc(scalar_t__);
char *xstrdup(const char *str) {
  char *ret;
  if (str != NULL) {
    ret = xmalloc(strlen(str) + 1);
    strcpy(ret, str);
  } else
    ret = NULL;
  return ret;
}


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1172 <xstrdup+0x42>
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <xmalloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
jmp    117a <xstrdup+0x4a>
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
push   %r14
push   %rbx
push   %rax
test   %rdi,%rdi
je     115a <xstrdup+0x2a>
mov    %rdi,%rbx
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <xmalloc@plt>
mov    %rax,%r14
mov    %rax,%rdi
mov    %rbx,%rsi
call   1030 <strcpy@plt>
jmp    115d <xstrdup+0x2d>
xor    %r14d,%r14d
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i64 @strlen(i8* %7)
%9 = add nsw i64 %8, 1
%10 = call i8* @xmalloc(i64 %9)
store i8* %10, i8** %3
%11 = load i8*, i8** %3
%12 = load i8*, i8** %2
%13 = call i32 @strcpy(i8* %11, i8* %12)
br label %15
14: ; preds = %1
store i8* null, i8** %3
br label %15
15: ; preds = %14, %6
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
define i8* @xstrdup(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = tail call i64 @strlen(i8* %0)
%5 = add nsw i64 %4, 1
%6 = tail call i8* @xmalloc(i64 %5)
%7 = tail call i32 @strcpy(i8* %6, i8* %0)
br label %8
8: ; preds = %1, %3
%9 = phi i8* [ %6, %3 ], [ null, %1 ]
ret i8* %9
}
void *setupCrashHandler() { return 0; }


x86 assembly (clang, -O0):
<setupCrashHandler>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setupCrashHandler>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @setupCrashHandler() {
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @setupCrashHandler() {
ret i8* null
}
double MPHtoFPS(double MPH) {
  double FPS = 1.46667 * MPH;
  return FPS;
}


x86 assembly (clang, -O0):
<MPHtoFPS>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<MPHtoFPS>:
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @MPHtoFPS(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fmul double 1.466670e+00, %4
store double %5, double* %3
%6 = load double, double* %3
ret double %6
}

LLVM IR (-O2):
define double @MPHtoFPS(double %0) {
%2 = fmul double %0, 1.466670e+00
ret double %2
}
int iround(double x) {
  if (x > 0.0)
    return (int)(x + 0.5);
  else
    return (int)(x - 0.5);
}


x86 assembly (clang, -O0):
<iround>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    1134 <iround+0x34>
movsd  0xedd(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x4(%rbp)
jmp    114c <iround+0x4c>
movsd  -0x10(%rbp),%xmm0
movsd  0xebf(%rip),%xmm1
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iround>:
xorpd  %xmm1,%xmm1
xor    %eax,%eax
ucomisd %xmm1,%xmm0
seta   %al
lea    0xeec(%rip),%rcx
addsd  (%rcx,%rax,8),%xmm0
cvttsd2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @iround(double %0) {
%2 = alloca i32
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp ogt double %4, 0.000000e+00
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load double, double* %3
%8 = fadd double %7, 5.000000e-01
%9 = fptosi double %8 to i32
store i32 %9, i32* %2
br label %14
10: ; preds = %1
%11 = load double, double* %3
%12 = fsub double %11, 5.000000e-01
%13 = fptosi double %12 to i32
store i32 %13, i32* %2
br label %14
14: ; preds = %10, %6
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @iround(double %0) {
%2 = fcmp ogt double %0, 0.000000e+00
%3 = select i1 %2, double 5.000000e-01, double -5.000000e-01
%4 = fadd double %3, %0
%5 = fptosi double %4 to i32
ret i32 %5
}
unsigned long I2CSlaveDataGet(unsigned long ulBase) {
  ;
  return ((*((volatile unsigned long *)(ulBase + 0x00000008))));
}


x86 assembly (clang, -O0):
<I2CSlaveDataGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CSlaveDataGet>:
mov    0x8(%rdi),%rax
ret

LLVM IR (-O0):
define i64 @I2CSlaveDataGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 8
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @I2CSlaveDataGet(i64 %0) {
%2 = add i64 %0, 8
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
ret i64 %4
}
/* Variables and functions */
int gob_end_array(char *buf, size_t buf_size) { return 0; }


x86 assembly (clang, -O0):
<gob_end_array>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gob_end_array>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @gob_end_array(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @gob_end_array(i8* nocapture readnone %0, i64 %1) {
ret i32 0
}
/* Variables and functions */
unsigned int inportb(int);
unsigned int FetchScancode() { return (inportb(0x60)); }


x86 assembly (clang, -O0):
<FetchScancode>:
push   %rbp
mov    %rsp,%rbp
mov    $0x60,%edi
call   1030 <inportb@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FetchScancode>:
mov    $0x60,%edi
jmp    1030 <inportb@plt>

LLVM IR (-O0):
define i32 @FetchScancode() {
%1 = call i32 @inportb(i32 96)
ret i32 %1
}

LLVM IR (-O2):
define i32 @FetchScancode() {
%1 = tail call i32 @inportb(i32 96)
ret i32 %1
}
int nputchar(int value) {
  while (((*(volatile unsigned int *)(0x20000020)) & 0x02) == 0)
    ;
  *(volatile unsigned int *)(0x20000000) = (value);
  return 0;
}


x86 assembly (clang, -O0):
<nputchar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x20000020,%eax
mov    (%rax),%eax
and    $0x2,%eax
cmp    $0x0,%eax
jne    111f <nputchar+0x1f>
jmp    1107 <nputchar+0x7>
mov    -0x4(%rbp),%ecx
mov    $0x20000000,%eax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nputchar>:
testl  $0x2,0x20000020
je     1100 <nputchar>
mov    %edi,0x20000000
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nputchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load volatile i32, i32* inttoptr (i64 536870944 to i32*)
%5 = and i32 %4, 2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
%9 = load i32, i32* %2
store volatile i32 %9, i32* inttoptr (i64 536870912 to i32*)
ret i32 0
}

LLVM IR (-O2):
define i32 @nputchar(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = load volatile i32, i32* inttoptr (i64 536870944 to i32*)
%4 = and i32 %3, 2
%5 = icmp eq i32 %4, 0
br i1 %5, label %2, label %6
6: ; preds = %2
store volatile i32 %0, i32* inttoptr (i64 536870912 to i32*)
ret i32 0
}
__attribute__((no_icf)) _Bool f6(char *s, char *t) {
  return __builtin_strstr(s, t) == s;
}


x86 assembly (clang, -O0):
<f6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strstr@plt>
cmp    -0x8(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f6>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %rax,%rdx
call   1030 <strncmp@plt>
test   %eax,%eax
sete   %al
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define zeroext i1 @f6(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @strstr(i8* %5, i8* %6)
%8 = load i8*, i8** %3
%9 = icmp eq i8* %7, %8
ret i1 %9
}

LLVM IR (-O2):
define zeroext i1 @f6(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = tail call i32 @strncmp(i8* %0, i8* %1, i64 %3)
%5 = icmp eq i32 %4, 0
ret i1 %5
}
int fun_coverage_if_lt(int x) {
  if (x < 5) {
    return 8;
  } else {
    return 18;
  }
}


x86 assembly (clang, -O0):
<fun_coverage_if_lt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jge    111d <fun_coverage_if_lt+0x1d>
movl   $0x8,-0x4(%rbp)
jmp    1124 <fun_coverage_if_lt+0x24>
movl   $0x12,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_coverage_if_lt>:
cmp    $0x5,%edi
mov    $0x8,%ecx
mov    $0x12,%eax
cmovl  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @fun_coverage_if_lt(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 5
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 8, i32* %2
br label %8
7: ; preds = %1
store i32 18, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @fun_coverage_if_lt(i32 %0) {
%2 = icmp slt i32 %0, 5
%3 = select i1 %2, i32 8, i32 18
ret i32 %3
}
int isHexChar(char current_char) {
  if ((current_char >= '0' && current_char <= '9') ||
      (current_char >= 'a' && current_char <= 'f') ||
      (current_char >= 'A' && current_char <= 'F'))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isHexChar>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1124 <isHexChar+0x24>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jle    1158 <isHexChar+0x58>
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     113e <isHexChar+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x66,%eax
jle    1158 <isHexChar+0x58>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     1164 <isHexChar+0x64>
movsbl -0x5(%rbp),%eax
cmp    $0x46,%eax
jg     1164 <isHexChar+0x64>
movl   $0x1,-0x4(%rbp)
jmp    116b <isHexChar+0x6b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isHexChar>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%al
setb   %al
and    $0xdf,%dil
add    $0xbf,%dil
cmp    $0x6,%dil
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @isHexChar(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %27, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp sge i32 %13, 97
br i1 %14, label %15, label %19
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp sle i32 %17, 102
br i1 %18, label %27, label %19
19: ; preds = %15, %11
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp sge i32 %21, 65
br i1 %22, label %23, label %28
23: ; preds = %19
%24 = load i8, i8* %3
%25 = sext i8 %24 to i32
%26 = icmp sle i32 %25, 70
br i1 %26, label %27, label %28
27: ; preds = %23, %15, %7
store i32 1, i32* %2
br label %29
28: ; preds = %23, %19
store i32 0, i32* %2
br label %29
29: ; preds = %28, %27
%30 = load i32, i32* %2
ret i32 %30
}

LLVM IR (-O2):
define i32 @isHexChar(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = and i8 %0, -33
%5 = add i8 %4, -65
%6 = icmp ult i8 %5, 6
%7 = or i1 %3, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
double lin_inter(double, double, double);
double smooth_inter(double x, double y, double s) {
  return lin_inter(x, y, s * s * (3 - 2 * s));
}


x86 assembly (clang, -O0):
<smooth_inter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
mulsd  -0x18(%rbp),%xmm2
movsd  -0x18(%rbp),%xmm4
addsd  %xmm4,%xmm4
movsd  0xeb4(%rip),%xmm3
subsd  %xmm4,%xmm3
mulsd  %xmm3,%xmm2
call   1030 <lin_inter@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smooth_inter>:
movapd %xmm2,%xmm4
mulsd  %xmm2,%xmm4
addsd  %xmm2,%xmm2
movsd  0xedc(%rip),%xmm3
subsd  %xmm2,%xmm3
mulsd  %xmm4,%xmm3
movapd %xmm3,%xmm2
jmp    1030 <lin_inter@plt>

LLVM IR (-O0):
define double @smooth_inter(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = load double, double* %6
%10 = load double, double* %6
%11 = fmul double %9, %10
%12 = load double, double* %6
%13 = call double @llvm.fmuladd.f64(double -2.000000e+00, double %12, double 3.000000e+00)
%14 = fmul double %11, %13
%15 = call double @lin_inter(double %7, double %8, double %14)
ret double %15
}

LLVM IR (-O2):
define double @smooth_inter(double %0, double %1, double %2) {
%4 = fmul double %2, %2
%5 = tail call double @llvm.fmuladd.f64(double %2, double -2.000000e+00, double 3.000000e+00)
%6 = fmul double %4, %5
%7 = tail call double @lin_inter(double %0, double %1, double %6)
ret double %7
}
/* Variables and functions */
int first_one(int /*<<< orphan*/);
int /*<<< orphan*/ v_to_line(unsigned long long, int);
int v_flip_index(int x) { return first_one(v_to_line(1ULL << x, x)); }


x86 assembly (clang, -O0):
<v_flip_index>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
mov    $0x1,%edi
shl    %cl,%rdi
mov    -0x4(%rbp),%esi
call   1030 <v_to_line@plt>
mov    %eax,%edi
call   1040 <first_one@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<v_flip_index>:
push   %rax
mov    %edi,%ecx
mov    $0x1,%edi
shl    %cl,%rdi
mov    %ecx,%esi
call   1030 <v_to_line@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <first_one@plt>

LLVM IR (-O0):
define i32 @v_flip_index(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = shl i64 1, %4
%6 = load i32, i32* %2
%7 = call i32 @v_to_line(i64 %5, i32 %6)
%8 = call i32 @first_one(i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @v_flip_index(i32 %0) {
%2 = zext i32 %0 to i64
%3 = shl nuw i64 1, %2
%4 = tail call i32 @v_to_line(i64 %3, i32 %0)
%5 = tail call i32 @first_one(i32 %4)
ret i32 %5
}
int test_imm_ECuint16_mem(unsigned short *val) {
  return ((*val) & (0xEC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_ECuint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xec,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_ECuint16_mem>:
testb  $0xec,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_ECuint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 236
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_ECuint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 236
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ set_io_bit(int, int /*<<< orphan*/);
void TOSH_SET_PW0_PIN() { set_io_bit(0x40, 0); }


x86 assembly (clang, -O0):
<TOSH_SET_PW0_PIN>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40,%edi
xor    %esi,%esi
call   1030 <set_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_SET_PW0_PIN>:
mov    $0x40,%edi
xor    %esi,%esi
jmp    1030 <set_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_SET_PW0_PIN() {
%1 = call i32 @set_io_bit(i32 64, i32 0)
ret void
}

LLVM IR (-O2):
define void @TOSH_SET_PW0_PIN() {
%1 = tail call i32 @set_io_bit(i32 64, i32 0)
ret void
}
void foo422() {}


x86 assembly (clang, -O0):
<foo422>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo422>:
ret

LLVM IR (-O0):
define void @foo422() {
ret void
}

LLVM IR (-O2):
define void @foo422() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void instructions(void) {
  printf("Enter your choice: \n"
         "1 to add an item to the queue.\n"
         "2 to remove an item from the queue.\n"
         "3 to end.\n");
}


x86 assembly (clang, -O0):
<instructions>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<instructions>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [98 x i8] c"Enter your choice: \0A1 to add an item to the queue.\0A2 to remove an item from the queue.\0A3 to end.\0A\00"
define void @instructions() {
%1 = call i32 @printf(i8* getelementptr inbounds ([98 x i8], [98 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [97 x i8] c"Enter your choice: \0A1 to add an item to the queue.\0A2 to remove an item from the queue.\0A3 to end.\00"
define void @instructions() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([97 x i8], [97 x i8]* @str, i64 0, i64 0))
ret void
}
void tegra_soc_init_dvfs(void) {}


x86 assembly (clang, -O0):
<tegra_soc_init_dvfs>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tegra_soc_init_dvfs>:
ret

LLVM IR (-O0):
define void @tegra_soc_init_dvfs() {
ret void
}

LLVM IR (-O2):
define void @tegra_soc_init_dvfs() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, short, short);
short STEST907(short v) {
  short r = v + 133;
  printf("sub  (test15f - C907): Call by value short :(%3d=5) returning short "
         ":(%3d=138)\n",
         v, r);
  v = v - 3;
  printf("sub  (test15f - C907): Call by value short :(%3d=5) returning short "
         ":(%3d=138)\n",
         v, r);
  return r;
}


x86 assembly (clang, -O0):
<STEST907>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
add    $0x85,%eax
mov    %ax,-0x4(%rbp)
mov    -0x2(%rbp),%ax
lea    0xec9(%rip),%rdi
movswl %ax,%esi
movswl -0x4(%rbp),%edx
call   1030 <printf@plt>
movswl -0x2(%rbp),%eax
sub    $0x3,%eax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%ax
lea    0xea7(%rip),%rdi
movswl %ax,%esi
movswl -0x4(%rbp),%edx
call   1030 <printf@plt>
movswl -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<STEST907>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%ebx
lea    0x85(%rbx),%eax
movswl %ax,%ebp
lea    0xeda(%rip),%r14
mov    %r14,%rdi
mov    %ebx,%esi
mov    %ebp,%edx
call   1030 <printf@plt>
add    $0xfffffffd,%ebx
movswl %bx,%esi
mov    %r14,%rdi
mov    %ebp,%edx
call   1030 <printf@plt>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [80 x i8] c"sub (test15f - C907): Call by value short :(%3d=5) returning short :(%3d=138)\0A\00"
define signext i16 @STEST907(i16 signext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = sext i16 %4 to i32
%6 = add nsw i32 %5, 133
%7 = trunc i32 %6 to i16
store i16 %7, i16* %3
%8 = load i16, i16* %2
%9 = load i16, i16* %3
%10 = call i32 @printf(i8* getelementptr inbounds ([80 x i8], [80 x i8]* @.str, i64 0, i64 0), i16 signext %8, i16 signext %9)
%11 = load i16, i16* %2
%12 = sext i16 %11 to i32
%13 = sub nsw i32 %12, 3
%14 = trunc i32 %13 to i16
store i16 %14, i16* %2
%15 = load i16, i16* %2
%16 = load i16, i16* %3
%17 = call i32 @printf(i8* getelementptr inbounds ([80 x i8], [80 x i8]* @.str, i64 0, i64 0), i16 signext %15, i16 signext %16)
%18 = load i16, i16* %3
ret i16 %18
}

LLVM IR (-O2):
@.str = [80 x i8] c"sub (test15f - C907): Call by value short :(%3d=5) returning short :(%3d=138)\0A\00"
define signext i16 @STEST907(i16 signext %0) {
%2 = add i16 %0, 133
%3 = tail call i32 @printf(i8* getelementptr inbounds ([80 x i8], [80 x i8]* @.str, i64 0, i64 0), i16 signext %0, i16 signext %2)
%4 = add i16 %0, -3
%5 = tail call i32 @printf(i8* getelementptr inbounds ([80 x i8], [80 x i8]* @.str, i64 0, i64 0), i16 signext %4, i16 signext %2)
ret i16 %2
}
/* Variables and functions */
bool nrf53_errata_2(void) { return false; }


x86 assembly (clang, -O0):
<nrf53_errata_2>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf53_errata_2>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf53_errata_2() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf53_errata_2() {
ret i32 0
}
/* Variables and functions */
long rrandom();
int get_rand(int x, int y) {
  int r, t;
  long lr;
  if (x > y) {
    t = y;
    y = x;
    x = t;
  }
  lr = rrandom();
  lr &= (long)0x00007fff;
  r = (int)lr;
  r = (r % ((y - x) + 1)) + x;
  return (r);
}


x86 assembly (clang, -O0):
<get_rand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    113c <get_rand+0x2c>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rrandom@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
and    $0x7fff,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
add    -0x4(%rbp),%edx
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_rand>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
cmp    %esi,%edi
mov    %esi,%ebp
cmovg  %edi,%ebp
cmovg  %esi,%ebx
xor    %eax,%eax
call   1030 <rrandom@plt>
and    $0x7fff,%eax
sub    %ebx,%ebp
add    $0x1,%ebp
xor    %edx,%edx
idiv   %ebp
add    %edx,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @get_rand(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i64
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = icmp sgt i32 %8, %9
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i32, i32* %4
store i32 %12, i32* %6
%13 = load i32, i32* %3
store i32 %13, i32* %4
%14 = load i32, i32* %6
store i32 %14, i32* %3
br label %15
15: ; preds = %11, %2
%16 = call i64 (...) @rrandom()
store i64 %16, i64* %7
%17 = load i64, i64* %7
%18 = and i64 %17, 32767
store i64 %18, i64* %7
%19 = load i64, i64* %7
%20 = trunc i64 %19 to i32
store i32 %20, i32* %5
%21 = load i32, i32* %5
%22 = load i32, i32* %4
%23 = load i32, i32* %3
%24 = sub nsw i32 %22, %23
%25 = add nsw i32 %24, 1
%26 = srem i32 %21, %25
%27 = load i32, i32* %3
%28 = add nsw i32 %26, %27
store i32 %28, i32* %5
%29 = load i32, i32* %5
ret i32 %29
}

LLVM IR (-O2):
define i32 @get_rand(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
%5 = select i1 %3, i32 %1, i32 %0
%6 = tail call i64 (...) @rrandom()
%7 = trunc i64 %6 to i32
%8 = and i32 %7, 32767
%9 = sub i32 1, %5
%10 = add i32 %9, %4
%11 = srem i32 %8, %10
%12 = add nsw i32 %11, %5
ret i32 %12
}
void ECAPContinousModeConfig(unsigned int baseAdd) {
  (*((volatile unsigned short *)(baseAdd + (0x2A)))) &= ~(0x0001u);
}


x86 assembly (clang, -O0):
<ECAPContinousModeConfig>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x2a,%eax
mov    %eax,%eax
mov    (%rax),%cx
movzwl %cx,%ecx
and    $0xfffffffe,%ecx
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ECAPContinousModeConfig>:
add    $0x2a,%edi
andw   $0xfffe,(%rdi)
ret

LLVM IR (-O0):
define void @ECAPContinousModeConfig(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 42
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i16*
%7 = load volatile i16, i16* %6
%8 = zext i16 %7 to i32
%9 = and i32 %8, -2
%10 = trunc i32 %9 to i16
store volatile i16 %10, i16* %6
ret void
}

LLVM IR (-O2):
define void @ECAPContinousModeConfig(i32 %0) {
%2 = add i32 %0, 42
%3 = zext i32 %2 to i64
%4 = inttoptr i64 %3 to i16*
%5 = load volatile i16, i16* %4
%6 = and i16 %5, -2
store volatile i16 %6, i16* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ perror(char const *);
void report_errno(const char *name_of_object_that_caused_the_error) {
  perror(name_of_object_that_caused_the_error);
}


x86 assembly (clang, -O0):
<report_errno>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<report_errno>:
jmp    1030 <perror@plt>

LLVM IR (-O0):
define void @report_errno(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
ret void
}

LLVM IR (-O2):
define void @report_errno(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
ret void
}
int aic_patch0_func(struct ahc_softc *ahc) { return (0); }


x86 assembly (clang, -O0):
<aic_patch0_func>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aic_patch0_func>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ahc_softc = type opaque
define i32 @aic_patch0_func(%struct.ahc_softc* %0) {
%2 = alloca %struct.ahc_softc*
store %struct.ahc_softc* %0, %struct.ahc_softc** %2
ret i32 0
}

LLVM IR (-O2):
%struct.ahc_softc = type opaque
define i32 @aic_patch0_func(%struct.ahc_softc* nocapture readnone %0) {
ret i32 0
}
int main() {
  int v_in_main;
  return v_in_main;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @main() {
ret i32 undef
}