void CDiv(ar, ai, br, bi, cr, ci) double ar, ai, br, bi, *cr, *ci;
{
  double s, ais, bis, ars, brs;
  s = fabs(br) + fabs(bi);
  ars = ar / s;
  ais = ai / s;
  brs = br / s;
  bis = bi / s;
  s = brs * brs + bis * bis;
  *cr = (ars * brs + ais * bis) / s;
  *ci = (ais * brs - ars * bis) / s;
}


x86 assembly (clang, -O0):
<CDiv>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
mov    %rdi,-0x28(%rbp)
mov    %rsi,-0x30(%rbp)
movsd  -0x18(%rbp),%xmm0
movaps 0xed4(%rip),%xmm1
pand   %xmm1,%xmm0
movsd  -0x20(%rbp),%xmm1
movaps 0xec4(%rip),%xmm2
pand   %xmm2,%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x38(%rbp)
movsd  -0x8(%rbp),%xmm0
divsd  -0x38(%rbp),%xmm0
movsd  %xmm0,-0x50(%rbp)
movsd  -0x10(%rbp),%xmm0
divsd  -0x38(%rbp),%xmm0
movsd  %xmm0,-0x40(%rbp)
movsd  -0x18(%rbp),%xmm0
divsd  -0x38(%rbp),%xmm0
movsd  %xmm0,-0x58(%rbp)
movsd  -0x20(%rbp),%xmm0
divsd  -0x38(%rbp),%xmm0
movsd  %xmm0,-0x48(%rbp)
movsd  -0x58(%rbp),%xmm0
movsd  -0x58(%rbp),%xmm2
movsd  -0x48(%rbp),%xmm1
mulsd  -0x48(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x38(%rbp)
movsd  -0x50(%rbp),%xmm0
movsd  -0x58(%rbp),%xmm2
movsd  -0x40(%rbp),%xmm1
mulsd  -0x48(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
divsd  -0x38(%rbp),%xmm0
mov    -0x28(%rbp),%rax
movsd  %xmm0,(%rax)
movsd  -0x40(%rbp),%xmm0
movsd  -0x58(%rbp),%xmm2
movsd  -0x50(%rbp),%xmm1
mulsd  -0x48(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
divsd  -0x38(%rbp),%xmm0
mov    -0x30(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<CDiv>:
movapd 0xef8(%rip),%xmm4
movapd %xmm2,%xmm5
andpd  %xmm4,%xmm5
andpd  %xmm3,%xmm4
addsd  %xmm5,%xmm4
divsd  %xmm4,%xmm0
divsd  %xmm4,%xmm1
divsd  %xmm4,%xmm2
divsd  %xmm4,%xmm3
movapd %xmm3,%xmm4
mulsd  %xmm3,%xmm4
movapd %xmm2,%xmm5
mulsd  %xmm2,%xmm5
addsd  %xmm4,%xmm5
movapd %xmm1,%xmm4
mulsd  %xmm3,%xmm4
mulsd  %xmm0,%xmm3
mulsd  %xmm2,%xmm0
addsd  %xmm4,%xmm0
divsd  %xmm5,%xmm0
movsd  %xmm0,(%rdi)
mulsd  %xmm1,%xmm2
subsd  %xmm3,%xmm2
divsd  %xmm5,%xmm2
movsd  %xmm2,(%rsi)
ret

LLVM IR (-O0):
define void @CDiv(double %0, double %1, double %2, double %3, double* %4, double* %5) {
%7 = alloca double
%8 = alloca double
%9 = alloca double
%10 = alloca double
%11 = alloca double*
%12 = alloca double*
%13 = alloca double
%14 = alloca double
%15 = alloca double
%16 = alloca double
%17 = alloca double
store double %0, double* %7
store double %1, double* %8
store double %2, double* %9
store double %3, double* %10
store double* %4, double** %11
store double* %5, double** %12
%18 = load double, double* %9
%19 = call double @llvm.fabs.f64(double %18)
%20 = load double, double* %10
%21 = call double @llvm.fabs.f64(double %20)
%22 = fadd double %19, %21
store double %22, double* %13
%23 = load double, double* %7
%24 = load double, double* %13
%25 = fdiv double %23, %24
store double %25, double* %16
%26 = load double, double* %8
%27 = load double, double* %13
%28 = fdiv double %26, %27
store double %28, double* %14
%29 = load double, double* %9
%30 = load double, double* %13
%31 = fdiv double %29, %30
store double %31, double* %17
%32 = load double, double* %10
%33 = load double, double* %13
%34 = fdiv double %32, %33
store double %34, double* %15
%35 = load double, double* %17
%36 = load double, double* %17
%37 = load double, double* %15
%38 = load double, double* %15
%39 = fmul double %37, %38
%40 = call double @llvm.fmuladd.f64(double %35, double %36, double %39)
store double %40, double* %13
%41 = load double, double* %16
%42 = load double, double* %17
%43 = load double, double* %14
%44 = load double, double* %15
%45 = fmul double %43, %44
%46 = call double @llvm.fmuladd.f64(double %41, double %42, double %45)
%47 = load double, double* %13
%48 = fdiv double %46, %47
%49 = load double*, double** %11
store double %48, double* %49
%50 = load double, double* %14
%51 = load double, double* %17
%52 = load double, double* %16
%53 = load double, double* %15
%54 = fmul double %52, %53
%55 = fneg double %54
%56 = call double @llvm.fmuladd.f64(double %50, double %51, double %55)
%57 = load double, double* %13
%58 = fdiv double %56, %57
%59 = load double*, double** %12
store double %58, double* %59
ret void
}

LLVM IR (-O2):
define void @CDiv(double %0, double %1, double %2, double %3, double* nocapture writeonly %4, double* nocapture writeonly %5) {
%7 = tail call double @llvm.fabs.f64(double %2)
%8 = tail call double @llvm.fabs.f64(double %3)
%9 = fadd double %7, %8
%10 = fdiv double %0, %9
%11 = fdiv double %1, %9
%12 = fdiv double %2, %9
%13 = fdiv double %3, %9
%14 = fmul double %13, %13
%15 = tail call double @llvm.fmuladd.f64(double %12, double %12, double %14)
%16 = fmul double %11, %13
%17 = tail call double @llvm.fmuladd.f64(double %10, double %12, double %16)
%18 = fdiv double %17, %15
store double %18, double* %4
%19 = fneg double %10
%20 = fmul double %13, %19
%21 = tail call double @llvm.fmuladd.f64(double %11, double %12, double %20)
%22 = fdiv double %21, %15
store double %22, double* %5
ret void
}