xunge/DecIR huggingface dataset:
unsigned long get_tls_address(void) {
  unsigned long result;
  __asm__("movq %%fs:(0x0), %0 \n" : "=r"(result));
  return result;
}


x86 assembly (clang, -O0):
<get_tls_address>:
push   %rbp
mov    %rsp,%rbp
mov    %fs:0x0,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_tls_address>:
mov    %fs:0x0,%rax
ret

LLVM IR (-O0):
define i64 @get_tls_address() {
%1 = alloca i64
%2 = call i64 asm "movq %fs:(0x0), $0 \0A", "=r,~{dirflag},~{fpsr},~{flags}"()
store i64 %2, i64* %1
%3 = load i64, i64* %1
ret i64 %3
}

LLVM IR (-O2):
define i64 @get_tls_address() {
%1 = tail call i64 asm "movq %fs:(0x0), $0 \0A", "=r,~{dirflag},~{fpsr},~{flags}"()
ret i64 %1
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char const *);
int strncmp(char const *, char const *, int /*<<< orphan*/);
int str_starts_with(const char *prefix, const char *str) {
  int rc;
  rc = strncmp(prefix, str, strlen(prefix));
  return rc == 0;
}


x86 assembly (clang, -O0):
<str_starts_with>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x28(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    %eax,%edx
call   1030 <strncmp@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_starts_with>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %eax,%edx
call   1030 <strncmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @str_starts_with(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = load i8*, i8** %3
%9 = call i32 @strlen(i8* %8)
%10 = call i32 @strncmp(i8* %6, i8* %7, i32 %9)
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = icmp eq i32 %11, 0
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @str_starts_with(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = tail call i32 @strncmp(i8* %0, i8* %1, i32 %3)
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_1__;

/* Type definitions */
struct TYPE_4__ {
  int h0;
  int h1;
  int h2;
  int h3;
  int h4;
};
typedef TYPE_1__ SHA_CTX;

/* Variables and functions */
int /*<<< orphan*/ memzero(TYPE_1__ *, int);
int SHA1_Init(SHA_CTX *c) {
  memzero(c, sizeof(*c));
  c->h0 = 0x67452301UL;
  c->h1 = 0xefcdab89UL;
  c->h2 = 0x98badcfeUL;
  c->h3 = 0x10325476UL;
  c->h4 = 0xc3d2e1f0UL;
  return 1;
}


x86 assembly (clang, -O0):
<SHA1_Init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x14,%esi
call   1030 <memzero@plt>
mov    -0x8(%rbp),%rax
movl   $0x67452301,(%rax)
mov    -0x8(%rbp),%rax
movl   $0xefcdab89,0x4(%rax)
mov    -0x8(%rbp),%rax
movl   $0x98badcfe,0x8(%rax)
mov    -0x8(%rbp),%rax
movl   $0x10325476,0xc(%rax)
mov    -0x8(%rbp),%rax
movl   $0xc3d2e1f0,0x10(%rax)
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHA1_Init>:
push   %rbx
mov    %rdi,%rbx
mov    $0x14,%esi
call   1030 <memzero@plt>
movaps 0xedb(%rip),%xmm0
movups %xmm0,(%rbx)
movl   $0xc3d2e1f0,0x10(%rbx)
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { i32, i32, i32, i32, i32 }
define i32 @SHA1_Init(%struct.TYPE_4__* %0) {
%2 = alloca %struct.TYPE_4__*
store %struct.TYPE_4__* %0, %struct.TYPE_4__** %2
%3 = load %struct.TYPE_4__*, %struct.TYPE_4__** %2
%4 = call i32 @memzero(%struct.TYPE_4__* %3, i32 20)
%5 = load %struct.TYPE_4__*, %struct.TYPE_4__** %2
%6 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %5, i32 0, i32 0
store i32 1732584193, i32* %6
%7 = load %struct.TYPE_4__*, %struct.TYPE_4__** %2
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 1
store i32 -271733879, i32* %8
%9 = load %struct.TYPE_4__*, %struct.TYPE_4__** %2
%10 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %9, i32 0, i32 2
store i32 -1732584194, i32* %10
%11 = load %struct.TYPE_4__*, %struct.TYPE_4__** %2
%12 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %11, i32 0, i32 3
store i32 271733878, i32* %12
%13 = load %struct.TYPE_4__*, %struct.TYPE_4__** %2
%14 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %13, i32 0, i32 4
store i32 -1009589776, i32* %14
ret i32 1
}

LLVM IR (-O2):
%struct.TYPE_4__ = type { i32, i32, i32, i32, i32 }
define i32 @SHA1_Init(%struct.TYPE_4__* %0) {
%2 = tail call i32 @memzero(%struct.TYPE_4__* %0, i32 20)
%3 = bitcast %struct.TYPE_4__* %0 to <4 x i32>*
store <4 x i32> <i32 1732584193, i32 -271733879, i32 -1732584194, i32 271733878>, <4 x i32>* %3
%4 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %0, i64 0, i32 4
store i32 -1009589776, i32* %4
ret i32 1
}
/* Type definitions */
typedef int /*<<< orphan*/ *voidpf;
typedef int uInt;

/* Variables and functions */
int /*<<< orphan*/ *Z_NULL;
scalar_t__ svz_malloc(int);
voidpf zlib_alloc(voidpf data __attribute__((unused)), uInt n, uInt size) {
  voidpf ptr;
  if ((ptr = (voidpf)svz_malloc(n * size)) == NULL)
    return Z_NULL;
  return ptr;
}


x86 assembly (clang, -O0):
<zlib_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x14(%rbp),%edi
imul   -0x18(%rbp),%edi
call   1030 <svz_malloc@plt>
mov    %rax,-0x20(%rbp)
cmp    $0x0,%rax
jne    114f <zlib_alloc+0x3f>
mov    0x2e9d(%rip),%rax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
jmp    1157 <zlib_alloc+0x47>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zlib_alloc>:
push   %rax
mov    %esi,%edi
imul   %edx,%edi
call   1030 <svz_malloc@plt>
test   %rax,%rax
jne    112a <zlib_alloc+0x1a>
mov    0x2eb9(%rip),%rax
mov    (%rax),%rax
pop    %rcx
ret

LLVM IR (-O0):
@Z_NULL = global i32* null
define i32* @zlib_alloc(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32*
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i32, i32* %6
%10 = load i32, i32* %7
%11 = mul nsw i32 %9, %10
%12 = call i64 @svz_malloc(i32 %11)
%13 = inttoptr i64 %12 to i32*
store i32* %13, i32** %8
%14 = icmp eq i32* %13, null
br i1 %14, label %15, label %17
15: ; preds = %3
%16 = load i32*, i32** @Z_NULL
store i32* %16, i32** %4
br label %19
17: ; preds = %3
%18 = load i32*, i32** %8
store i32* %18, i32** %4
br label %19
19: ; preds = %17, %15
%20 = load i32*, i32** %4
ret i32* %20
}

LLVM IR (-O2):
@Z_NULL = global i32* null
define i32* @zlib_alloc(i32* nocapture readnone %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %2, %1
%5 = tail call i64 @svz_malloc(i32 %4)
%6 = icmp eq i64 %5, 0
%7 = load i32*, i32** @Z_NULL
%8 = inttoptr i64 %5 to i32*
%9 = select i1 %6, i32* %7, i32* %8
ret i32* %9
}
/* Variables and functions */
int /*<<< orphan*/ LZ5_compressBound(int);
int LZ5_compress_fast_extState(void *, char const *, char *, int,
                               int /*<<< orphan*/, int);
int LZ5_compress_withState(void *state, const char *src, char *dst,
                           int srcSize) {
  return LZ5_compress_fast_extState(state, src, dst, srcSize,
                                    LZ5_compressBound(srcSize), 1);
}


x86 assembly (clang, -O0):
<LZ5_compress_withState>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x1c(%rbp),%edi
call   1030 <LZ5_compressBound@plt>
mov    -0x38(%rbp),%rdi
mov    -0x30(%rbp),%rsi
mov    -0x28(%rbp),%rdx
mov    -0x20(%rbp),%ecx
mov    %eax,%r8d
mov    $0x1,%r9d
call   1040 <LZ5_compress_fast_extState@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZ5_compress_withState>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %ecx,%ebx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%r12
mov    %ecx,%edi
call   1030 <LZ5_compressBound@plt>
mov    %r12,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
mov    %ebx,%ecx
mov    %eax,%r8d
mov    $0x1,%r9d
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1040 <LZ5_compress_fast_extState@plt>

LLVM IR (-O0):
define i32 @LZ5_compress_withState(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = load i32, i32* %8
%13 = load i32, i32* %8
%14 = call i32 @LZ5_compressBound(i32 %13)
%15 = call i32 @LZ5_compress_fast_extState(i8* %9, i8* %10, i8* %11, i32 %12, i32 %14, i32 1)
ret i32 %15
}

LLVM IR (-O2):
define i32 @LZ5_compress_withState(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = tail call i32 @LZ5_compressBound(i32 %3)
%6 = tail call i32 @LZ5_compress_fast_extState(i8* %0, i8* %1, i8* %2, i32 %3, i32 %5, i32 1)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void f3(long j) {
  if ((j & ((1UL << (3)) - 1)) >= ((1UL << ((3) - 1)) + 2))
    abort();
}


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x7,%rax
cmp    $0x6,%rax
jb     1135 <f3+0x25>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
not    %edi
test   $0x6,%dil
je     1119 <f3+0x9>
ret
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @f3(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 7
%5 = icmp uge i64 %4, 6
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 (...) @abort()
unreachable
8: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @f3(i64 %0) {
%2 = and i64 %0, 6
%3 = icmp eq i64 %2, 6
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 (...) @abort()
unreachable
6: ; preds = %1
ret void
}
/* Type definitions */
struct timespec {
  int tv_nsec;
  int /*<<< orphan*/ tv_sec;
};

/* Variables and functions */
void overflow(struct timespec *t) {
  if (t->tv_nsec >= 1000000000) {
    t->tv_nsec -= 1000000000;
    t->tv_sec++;
  }
}


x86 assembly (clang, -O0):
<overflow>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0x3b9aca00,(%rax)
jl     1133 <overflow+0x33>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
sub    $0x3b9aca00,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%ecx
add    $0x1,%ecx
mov    %ecx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<overflow>:
mov    (%rdi),%eax
cmp    $0x3b9aca00,%eax
jl     1114 <overflow+0x14>
add    $0xc4653600,%eax
mov    %eax,(%rdi)
addl   $0x1,0x4(%rdi)
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
define void @overflow(%struct.timespec* %0) {
%2 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %2
%3 = load %struct.timespec*, %struct.timespec** %2
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
%5 = load i32, i32* %4
%6 = icmp sge i32 %5, 1000000000
br i1 %6, label %7, label %16
7: ; preds = %1
%8 = load %struct.timespec*, %struct.timespec** %2
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %8, i32 0, i32 0
%10 = load i32, i32* %9
%11 = sub nsw i32 %10, 1000000000
store i32 %11, i32* %9
%12 = load %struct.timespec*, %struct.timespec** %2
%13 = getelementptr inbounds %struct.timespec, %struct.timespec* %12, i32 0, i32 1
%14 = load i32, i32* %13
%15 = add nsw i32 %14, 1
store i32 %15, i32* %13
br label %16
16: ; preds = %7, %1
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
define void @overflow(%struct.timespec* nocapture %0) {
%2 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 0
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 999999999
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = add nsw i32 %3, -1000000000
store i32 %6, i32* %2
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 1
%8 = load i32, i32* %7
%9 = add nsw i32 %8, 1
store i32 %9, i32* %7
br label %10
10: ; preds = %5, %1
ret void
}
/* Variables and functions */
scalar_t__ isspace(char const);
char *str_skip_spaces(const char *str) {
  while (isspace(*str))
    ++str;
  return (char *)str;
}


x86 assembly (clang, -O0):
<str_skip_spaces>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
je     1143 <str_skip_spaces+0x33>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <str_skip_spaces+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_skip_spaces>:
push   %rbx
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rbx
nopl   0x0(%rax,%rax,1)
movsbl 0x1(%rbx),%edi
add    $0x1,%rbx
call   1030 <isspace@plt>
test   %rax,%rax
jne    1120 <str_skip_spaces+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @str_skip_spaces(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = call i64 @isspace(i8 signext %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
br label %3
11: ; preds = %3
%12 = load i8*, i8** %2
ret i8* %12
}

LLVM IR (-O2):
define i8* @str_skip_spaces(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %7, %2 ]
%4 = load i8, i8* %3
%5 = tail call i64 @isspace(i8 signext %4)
%6 = icmp eq i64 %5, 0
%7 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i8* %3
}
double ls_costN_nm5_twice(double x) { return x + x; }


x86 assembly (clang, -O0):
<ls_costN_nm5_twice>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_costN_nm5_twice>:
addsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @ls_costN_nm5_twice(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fadd double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @ls_costN_nm5_twice(double %0) {
%2 = fadd double %0, %0
ret double %2
}
unsigned int readl(const void *addr) { return *(volatile unsigned int *)addr; }


x86 assembly (clang, -O0):
<readl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readl>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @readl(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load volatile i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @readl(i8* %0) {
%2 = bitcast i8* %0 to i32*
%3 = load volatile i32, i32* %2
ret i32 %3
}
int divide(int a, int b, int *result) {
  int ret = 1;
  if (b == 0) {
    ret = 0;
  } else {
    *result = a / b;
  }
  return ret;
}


x86 assembly (clang, -O0):
<divide>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    112b <divide+0x2b>
movl   $0x0,-0x14(%rbp)
jmp    113a <divide+0x3a>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<divide>:
test   %esi,%esi
je     1114 <divide+0x14>
mov    %rdx,%rcx
mov    %edi,%eax
cltd
idiv   %esi
mov    %eax,(%rcx)
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @divide(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
store i32 1, i32* %7
%8 = load i32, i32* %5
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %3
store i32 0, i32* %7
br label %16
11: ; preds = %3
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = sdiv i32 %12, %13
%15 = load i32*, i32** %6
store i32 %14, i32* %15
br label %16
16: ; preds = %11, %10
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
define i32 @divide(i32 %0, i32 %1, i32* nocapture writeonly %2) {
%4 = icmp eq i32 %1, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = sdiv i32 %0, %1
store i32 %6, i32* %2
br label %7
7: ; preds = %3, %5
%8 = phi i32 [ 1, %5 ], [ 0, %3 ]
ret i32 %8
}
/* Variables and functions */
int ssds_item_keyx(int, char *, char *, char *);
int ssds_item_key(int fd, char *tok, char *sp, char *key) {
  return ssds_item_keyx(fd, &tok[2], sp, key);
}


x86 assembly (clang, -O0):
<ssds_item_key>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
add    $0x2,%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <ssds_item_keyx@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssds_item_key>:
add    $0x2,%rsi
jmp    1030 <ssds_item_keyx@plt>

LLVM IR (-O0):
define i32 @ssds_item_key(i32 %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store i32 %0, i32* %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = getelementptr inbounds i8, i8* %10, i64 2
%12 = load i8*, i8** %7
%13 = load i8*, i8** %8
%14 = call i32 @ssds_item_keyx(i32 %9, i8* %11, i8* %12, i8* %13)
ret i32 %14
}

LLVM IR (-O2):
define i32 @ssds_item_key(i32 %0, i8* %1, i8* %2, i8* %3) {
%5 = getelementptr inbounds i8, i8* %1, i64 2
%6 = tail call i32 @ssds_item_keyx(i32 %0, i8* %5, i8* %2, i8* %3)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ O_RDONLY;
int open(char *, int /*<<< orphan*/);
int zz_open(char *file) { return open(file, O_RDONLY); }


x86 assembly (clang, -O0):
<zz_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ec1(%rip),%rax
mov    (%rax),%esi
call   1030 <open@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zz_open>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
jmp    1030 <open@plt>

LLVM IR (-O0):
@O_RDONLY = global i32 0
define i32 @zz_open(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @O_RDONLY
%5 = call i32 @open(i8* %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@O_RDONLY = global i32 0
define i32 @zz_open(i8* nocapture %0) {
%2 = load i32, i32* @O_RDONLY
%3 = tail call i32 @open(i8* %0, i32 %2)
ret i32 %3
}
int PDL_isAppLicensedForDevice(const char *appid) { return 0; }


x86 assembly (clang, -O0):
<PDL_isAppLicensedForDevice>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PDL_isAppLicensedForDevice>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @PDL_isAppLicensedForDevice(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @PDL_isAppLicensedForDevice(i8* nocapture readnone %0) {
ret i32 0
}
void __cyg_profile_func_enter(void *a, void *p) {}


x86 assembly (clang, -O0):
<__cyg_profile_func_enter>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__cyg_profile_func_enter>:
ret

LLVM IR (-O0):
define void @__cyg_profile_func_enter(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @__cyg_profile_func_enter(i8* nocapture %0, i8* nocapture %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sqlite3;

/* Variables and functions */
void disableDoubleQuotedStringLiterals(sqlite3 *db) {}


x86 assembly (clang, -O0):
<disableDoubleQuotedStringLiterals>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<disableDoubleQuotedStringLiterals>:
ret

LLVM IR (-O0):
define void @disableDoubleQuotedStringLiterals(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @disableDoubleQuotedStringLiterals(i32* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ RSA;

/* Variables and functions */
int /*<<< orphan*/ RSA_F_RSA_NULL;
int /*<<< orphan*/ RSA_R_RSA_OPERATIONS_NOT_SUPPORTED;
int /*<<< orphan*/ RSAerr(int /*<<< orphan*/, int /*<<< orphan*/);
int RSA_null_private_decrypt(int flen, unsigned char *from, unsigned char *to,
                             RSA *rsa, int padding) {
  RSAerr(RSA_F_RSA_NULL, RSA_R_RSA_OPERATIONS_NOT_SUPPORTED);
  return -1;
}


x86 assembly (clang, -O0):
<RSA_null_private_decrypt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
mov    0x2ea5(%rip),%rax
mov    (%rax),%esi
call   1030 <RSAerr@plt>
mov    $0xffffffff,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RSA_null_private_decrypt>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
mov    0x2ebf(%rip),%rax
mov    (%rax),%esi
call   1030 <RSAerr@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@RSA_F_RSA_NULL = global i32 0
@RSA_R_RSA_OPERATIONS_NOT_SUPPORTED = global i32 0
define i32 @RSA_null_private_decrypt(i32 %0, i8* %1, i8* %2, i32* %3, i32 %4) {
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32*
%10 = alloca i32
store i32 %0, i32* %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i32* %3, i32** %9
store i32 %4, i32* %10
%11 = load i32, i32* @RSA_F_RSA_NULL
%12 = load i32, i32* @RSA_R_RSA_OPERATIONS_NOT_SUPPORTED
%13 = call i32 @RSAerr(i32 %11, i32 %12)
ret i32 -1
}

LLVM IR (-O2):
@RSA_F_RSA_NULL = global i32 0
@RSA_R_RSA_OPERATIONS_NOT_SUPPORTED = global i32 0
define i32 @RSA_null_private_decrypt(i32 %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i32* nocapture readnone %3, i32 %4) {
%6 = load i32, i32* @RSA_F_RSA_NULL
%7 = load i32, i32* @RSA_R_RSA_OPERATIONS_NOT_SUPPORTED
%8 = tail call i32 @RSAerr(i32 %6, i32 %7)
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ USBDev_IntHandler();
void interrupt() { USBDev_IntHandler(); }


x86 assembly (clang, -O0):
<interrupt>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <USBDev_IntHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<interrupt>:
xor    %eax,%eax
jmp    1030 <USBDev_IntHandler@plt>

LLVM IR (-O0):
define void @interrupt() {
%1 = call i32 (...) @USBDev_IntHandler()
ret void
}

LLVM IR (-O2):
define void @interrupt() {
%1 = tail call i32 (...) @USBDev_IntHandler()
ret void
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMRF5_get(void) { return U_WMRCORENONE_get("U_WMRF5"); }


x86 assembly (clang, -O0):
<U_WMRF5_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRF5_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMRF5\00"
define i32 @U_WMRF5_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMRF5\00"
define i32 @U_WMRF5_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
void printCall(void *call) {}


x86 assembly (clang, -O0):
<printCall>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<printCall>:
ret

LLVM IR (-O0):
define void @printCall(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @printCall(i8* nocapture %0) {
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ chr8setBank0(int);
int /*<<< orphan*/ prg32setBank0(int);
void m66_setParams(uint16_t addr, uint8_t val) {
  (void)addr;
  prg32setBank0(((val >> 4) & 3) << 15);
  chr8setBank0((val & 3) << 13);
}


x86 assembly (clang, -O0):
<m66_setParams>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
sar    $0x4,%edi
and    $0x3,%edi
shl    $0xf,%edi
call   1030 <prg32setBank0@plt>
mov    -0x8(%rbp),%edi
and    $0x3,%edi
shl    $0xd,%edi
call   1040 <chr8setBank0@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m66_setParams>:
push   %rbx
mov    %esi,%ebx
mov    %esi,%edi
and    $0x30,%edi
shl    $0xb,%edi
call   1030 <prg32setBank0@plt>
and    $0x3,%ebx
shl    $0xd,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1040 <chr8setBank0@plt>

LLVM IR (-O0):
define void @m66_setParams(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = ashr i32 %6, 4
%8 = and i32 %7, 3
%9 = shl i32 %8, 15
%10 = call i32 @prg32setBank0(i32 %9)
%11 = load i32, i32* %4
%12 = and i32 %11, 3
%13 = shl i32 %12, 13
%14 = call i32 @chr8setBank0(i32 %13)
ret void
}

LLVM IR (-O2):
define void @m66_setParams(i32 %0, i32 %1) {
%3 = shl i32 %1, 11
%4 = and i32 %3, 98304
%5 = tail call i32 @prg32setBank0(i32 %4)
%6 = shl i32 %1, 13
%7 = and i32 %6, 24576
%8 = tail call i32 @chr8setBank0(i32 %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_5() {
  Assert_real((isqrt(5) == 2),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              30, ("Integer square root of 5 should be 2"));
}


x86 assembly (clang, -O0):
<t_sqrt_5>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%edi
call   1030 <isqrt@plt>
cmp    $0x2,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0x1e,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_5>:
push   %rax
mov    $0x5,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0x2,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0x1e,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [37 x i8] c"Integer square root of 5 should be 2\00"
define void @t_sqrt_5() {
%1 = call i32 @isqrt(i32 5)
%2 = icmp eq i32 %1, 2
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 30, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [37 x i8] c"Integer square root of 5 should be 2\00"
define void @t_sqrt_5() {
%1 = tail call i32 @isqrt(i32 5)
%2 = icmp eq i32 %1, 2
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 30, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void GPMCECCBCHWrapModeValSet(unsigned int baseAddr, unsigned int wrapModeVal) {
  (*((volatile unsigned int *)(baseAddr + (0x1F4)))) &= ~(0x00000F00u);
  (*((volatile unsigned int *)(baseAddr + (0x1F4)))) |=
      ((wrapModeVal << (0x00000008u)) & (0x00000F00u));
}


x86 assembly (clang, -O0):
<GPMCECCBCHWrapModeValSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1f4,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xfffff0ff,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%edx
shl    $0x8,%edx
and    $0xf00,%edx
mov    -0x4(%rbp),%eax
add    $0x1f4,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPMCECCBCHWrapModeValSet>:
add    $0x1f4,%edi
andl   $0xfffff0ff,(%rdi)
and    $0xf,%esi
shl    $0x8,%esi
or     %esi,(%rdi)
ret

LLVM IR (-O0):
define void @GPMCECCBCHWrapModeValSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add i32 %5, 500
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, -3841
store volatile i32 %10, i32* %8
%11 = load i32, i32* %4
%12 = shl i32 %11, 8
%13 = and i32 %12, 3840
%14 = load i32, i32* %3
%15 = add i32 %14, 500
%16 = zext i32 %15 to i64
%17 = inttoptr i64 %16 to i32*
%18 = load volatile i32, i32* %17
%19 = or i32 %18, %13
store volatile i32 %19, i32* %17
ret void
}

LLVM IR (-O2):
define void @GPMCECCBCHWrapModeValSet(i32 %0, i32 %1) {
%3 = add i32 %0, 500
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, -3841
store volatile i32 %7, i32* %5
%8 = shl i32 %1, 8
%9 = and i32 %8, 3840
%10 = load volatile i32, i32* %5
%11 = or i32 %10, %9
store volatile i32 %11, i32* %5
ret void
}
char *strcpy(char *dst, const char *src) {
  char *p = dst;
  while ((*p++ = *src++) != '\0')
    ;
  return dst;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %al,(%rcx)
movsbl %al,%eax
cmp    $0x0,%eax
je     1147 <strcpy+0x47>
jmp    1114 <strcpy+0x14>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
movzbl (%rsi,%rcx,1),%edx
mov    %dl,(%rax,%rcx,1)
add    $0x1,%rcx
test   %dl,%dl
jne    1110 <strcpy+0x10>
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %15, %2
%8 = load i8*, i8** %4
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %4
%10 = load i8, i8* %8
%11 = load i8*, i8** %5
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %5
store i8 %10, i8* %11
%13 = sext i8 %10 to i32
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %7
br label %7
16: ; preds = %7
%17 = load i8*, i8** %3
ret i8* %17
}

LLVM IR (-O2):
define i8* @strcpy(i8* returned writeonly %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %1, %2 ], [ %6, %3 ]
%5 = phi i8* [ %0, %2 ], [ %8, %3 ]
%6 = getelementptr inbounds i8, i8* %4, i64 1
%7 = load i8, i8* %4
%8 = getelementptr inbounds i8, i8* %5, i64 1
store i8 %7, i8* %5
%9 = icmp eq i8 %7, 0
br i1 %9, label %10, label %3
10: ; preds = %3
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ merge(int *, int, int, int);
void mergeSort(int *A, int p, int r) {
  if (p < r) {
    int q = (p + r) / 2;
    mergeSort(A, p, q);
    mergeSort(A, q + 1, r);
    merge(A, p, q, r);
  }
}


x86 assembly (clang, -O0):
<mergeSort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1182 <mergeSort+0x62>
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1030 <mergeSort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1030 <mergeSort@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1040 <merge@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mergeSort>:
cmp    %edx,%esi
jge    1172 <mergeSort+0x52>
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %esi,%r12d
mov    %rdi,%r15
lea    (%r14,%r12,1),%eax
mov    %eax,%ebx
shr    $0x1f,%ebx
add    %eax,%ebx
sar    %ebx
mov    %ebx,%edx
call   1030 <mergeSort@plt>
lea    0x1(%rbx),%esi
mov    %r15,%rdi
mov    %r14d,%edx
call   1030 <mergeSort@plt>
mov    %r15,%rdi
mov    %r12d,%esi
mov    %ebx,%edx
mov    %r14d,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1040 <merge@plt>
ret

LLVM IR (-O0):
define void @mergeSort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %28
11: ; preds = %3
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = add nsw i32 %12, %13
%15 = sdiv i32 %14, 2
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = load i32*, i32** %4
%20 = load i32, i32* %7
%21 = add nsw i32 %20, 1
%22 = load i32, i32* %6
%23 = load i32*, i32** %4
%24 = load i32, i32* %5
%25 = load i32, i32* %7
%26 = load i32, i32* %6
%27 = call i32 @merge(i32* %23, i32 %24, i32 %25, i32 %26)
br label %28
28: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @mergeSort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %6, label %5
5: ; preds = %3, %6
ret void
6: ; preds = %3
%7 = add nsw i32 %2, %1
%8 = sdiv i32 %7, 2
tail call void @mergeSort(i32* %0, i32 %1, i32 %8)
%9 = add nsw i32 %8, 1
tail call void @mergeSort(i32* %0, i32 %9, i32 %2)
%10 = tail call i32 @merge(i32* %0, i32 %1, i32 %8, i32 %2)
br label %5
}
void border_ne_ext_corner_special_sand_long_vert(unsigned char *pic,
                                                 unsigned char *mirr) {
  *pic = 0x2F;
  *mirr = 0x02;
}


x86 assembly (clang, -O0):
<border_ne_ext_corner_special_sand_long_vert>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x2f,(%rax)
mov    -0x10(%rbp),%rax
movb   $0x2,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<border_ne_ext_corner_special_sand_long_vert>:
movb   $0x2f,(%rdi)
movb   $0x2,(%rsi)
ret

LLVM IR (-O0):
define void @border_ne_ext_corner_special_sand_long_vert(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
store i8 47, i8* %5
%6 = load i8*, i8** %4
store i8 2, i8* %6
ret void
}

LLVM IR (-O2):
define void @border_ne_ext_corner_special_sand_long_vert(i8* nocapture writeonly %0, i8* nocapture writeonly %1) {
store i8 47, i8* %0
store i8 2, i8* %1
ret void
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int ngaValidatePackedOpcodes(int32_t opcode) {
  int32_t raw = opcode;
  int32_t current;
  int valid = -1;
  for (int i = 0; i < 4; i++) {
    current = raw & 0xFF;
    if (!(current >= 0 && current <= 26))
      valid = 0;
    raw = raw >> 8;
  }
  return valid;
}


x86 assembly (clang, -O0):
<ngaValidatePackedOpcodes>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
movl   $0xffffffff,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x4,-0x14(%rbp)
jge    1162 <ngaValidatePackedOpcodes+0x62>
mov    -0x8(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jl     1144 <ngaValidatePackedOpcodes+0x44>
cmpl   $0x1a,-0xc(%rbp)
jle    114b <ngaValidatePackedOpcodes+0x4b>
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x8,%eax
mov    %eax,-0x8(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    111b <ngaValidatePackedOpcodes+0x1b>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ngaValidatePackedOpcodes>:
movzbl %dil,%eax
cmp    $0x1b,%eax
setb   %al
mov    %edi,%ecx
and    $0xff00,%ecx
cmp    $0x1b00,%ecx
setb   %cl
and    %al,%cl
mov    %edi,%eax
and    $0xff0000,%eax
cmp    $0x1b0000,%eax
setb   %al
cmp    $0x1b000000,%edi
setb   %dl
and    %al,%dl
and    %cl,%dl
movzbl %dl,%eax
neg    %eax
ret

LLVM IR (-O0):
define i32 @ngaValidatePackedOpcodes(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %2
%7 = load i32, i32* %2
store i32 %7, i32* %3
store i32 -1, i32* %5
store i32 0, i32* %6
br label %8
8: ; preds = %23, %1
%9 = load i32, i32* %6
%10 = icmp slt i32 %9, 4
br i1 %10, label %11, label %26
11: ; preds = %8
%12 = load i32, i32* %3
%13 = and i32 %12, 255
store i32 %13, i32* %4
%14 = load i32, i32* %4
%15 = icmp sge i32 %14, 0
br i1 %15, label %16, label %19
16: ; preds = %11
%17 = load i32, i32* %4
%18 = icmp sle i32 %17, 26
br i1 %18, label %20, label %19
19: ; preds = %16, %11
store i32 0, i32* %5
br label %20
20: ; preds = %19, %16
%21 = load i32, i32* %3
%22 = ashr i32 %21, 8
store i32 %22, i32* %3
br label %23
23: ; preds = %20
%24 = load i32, i32* %6
%25 = add nsw i32 %24, 1
store i32 %25, i32* %6
br label %8
26: ; preds = %8
%27 = load i32, i32* %5
ret i32 %27
}

LLVM IR (-O2):
define i32 @ngaValidatePackedOpcodes(i32 %0) {
%2 = and i32 %0, 255
%3 = icmp ult i32 %2, 27
%4 = and i32 %0, 65280
%5 = icmp ult i32 %4, 6912
%6 = and i1 %5, %3
%7 = and i32 %0, 16711680
%8 = icmp ult i32 %7, 1769472
%9 = and i1 %8, %6
%10 = icmp ult i32 %0, 452984832
%11 = and i1 %10, %9
%12 = sext i1 %11 to i32
ret i32 %12
}
/* Variables and functions */
scalar_t__ strlen(char *);
int /*<<< orphan*/ unmangle_to_buffer(char *, char *, scalar_t__);
void unmangle_string(char *s) {
  if (s)
    unmangle_to_buffer(s, s, strlen(s) + 1);
}


x86 assembly (clang, -O0):
<unmangle_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1164 <unmangle_string+0x44>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    %rax,%rdx
add    $0x1,%rdx
call   1040 <unmangle_to_buffer@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unmangle_string>:
test   %rdi,%rdi
je     113e <unmangle_string+0x1e>
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
lea    0x1(%rax),%rdx
mov    %rbx,%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <unmangle_to_buffer@plt>
ret

LLVM IR (-O0):
define void @unmangle_string(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = load i8*, i8** %2
%8 = load i8*, i8** %2
%9 = call i64 @strlen(i8* %8)
%10 = add nsw i64 %9, 1
%11 = call i32 @unmangle_to_buffer(i8* %6, i8* %7, i64 %10)
br label %12
12: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @unmangle_string(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i64 @strlen(i8* %0)
%5 = add nsw i64 %4, 1
%6 = tail call i32 @unmangle_to_buffer(i8* %0, i8* %0, i64 %5)
br label %7
7: ; preds = %3, %1
ret void
}
/* Variables and functions */
int fn_cl_48_57(char const *);
int fn_qtg_0_4294967295_cl_48_57(const char *text) {
  int pos = 0, p = 0, count = 0;
  while ((p = fn_cl_48_57(text + pos)) != -1) {
    pos += p;
    count++;
  }
  if (count >= 0)
    return pos;
  return -1;
}


x86 assembly (clang, -O0):
<fn_qtg_0_4294967295_cl_48_57>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x10(%rbp),%rdi
movslq -0x14(%rbp),%rax
add    %rax,%rdi
call   1030 <fn_cl_48_57@plt>
mov    %eax,-0x18(%rbp)
cmp    $0xffffffff,%eax
je     1164 <fn_qtg_0_4294967295_cl_48_57+0x54>
mov    -0x18(%rbp),%eax
add    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1131 <fn_qtg_0_4294967295_cl_48_57+0x21>
cmpl   $0x0,-0x1c(%rbp)
jl     1179 <fn_qtg_0_4294967295_cl_48_57+0x69>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1180 <fn_qtg_0_4294967295_cl_48_57+0x70>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_qtg_0_4294967295_cl_48_57>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %ecx,%ecx
nopl   0x0(%rax)
mov    %ecx,%ebx
movslq %ecx,%rdi
add    %r14,%rdi
call   1030 <fn_cl_48_57@plt>
lea    (%rax,%rbx,1),%ecx
cmp    $0xffffffff,%eax
jne    1120 <fn_qtg_0_4294967295_cl_48_57+0x10>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @fn_qtg_0_4294967295_cl_48_57(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
store i32 0, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %14, %1
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = call i32 @fn_cl_48_57(i8* %11)
store i32 %12, i32* %5
%13 = icmp ne i32 %12, -1
br i1 %13, label %14, label %20
14: ; preds = %7
%15 = load i32, i32* %5
%16 = load i32, i32* %4
%17 = add nsw i32 %16, %15
store i32 %17, i32* %4
%18 = load i32, i32* %6
%19 = add nsw i32 %18, 1
store i32 %19, i32* %6
br label %7
20: ; preds = %7
%21 = load i32, i32* %6
%22 = icmp sge i32 %21, 0
br i1 %22, label %23, label %25
23: ; preds = %20
%24 = load i32, i32* %4
store i32 %24, i32* %2
br label %26
25: ; preds = %20
store i32 -1, i32* %2
br label %26
26: ; preds = %25, %23
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @fn_qtg_0_4294967295_cl_48_57(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %8, %2 ]
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = tail call i32 @fn_cl_48_57(i8* %5)
%7 = icmp eq i32 %6, -1
%8 = add nsw i32 %6, %3
br i1 %7, label %9, label %2
9: ; preds = %2
ret i32 %3
}
/* Variables and functions */
char *calloc(int, int);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ stderr;
char *chmalloc(int size) {
  char *buffer;
  buffer = calloc(1, size);
  if (!buffer) {
    fprintf(stderr, "Fatal error: could not allocate %i bytes\n", size);
    exit(1);
  }
}


x86 assembly (clang, -O0):
<chmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%esi
mov    $0x1,%edi
call   1030 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1179 <chmalloc+0x49>
mov    0x2e82(%rip),%rax
mov    (%rax),%edi
mov    -0xc(%rbp),%edx
lea    0xe96(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chmalloc>:
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [42 x i8] c"Fatal error: could not allocate %i bytes\0A\00"
define i8* @chmalloc(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i8* @calloc(i32 1, i32 %5)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %14, label %9
9: ; preds = %1
%10 = load i32, i32* @stderr
%11 = load i32, i32* %3
%12 = call i32 @fprintf(i32 %10, i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = call i32 @exit(i32 1)
unreachable
14: ; preds = %1
%15 = load i8*, i8** %2
ret i8* %15
}

LLVM IR (-O2):
@stderr = global i32 0
define noalias i8* @chmalloc(i32 %0) {
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void myPrint(char *str, int a) { printf("%s\n", str - a); }


x86 assembly (clang, -O0):
<myPrint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
movslq -0xc(%rbp),%rcx
xor    %eax,%eax
sub    %rcx,%rax
add    %rax,%rsi
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<myPrint>:
mov    %rdi,%rax
movslq %esi,%rcx
sub    %rcx,%rax
lea    0xee0(%rip),%rdi
mov    %rax,%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @myPrint(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = sub i64 0, %7
%9 = getelementptr inbounds i8, i8* %5, i64 %8
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %9)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @myPrint(i8* %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = sub nsw i64 0, %3
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
void shell(char *cmd) { system(cmd); }


x86 assembly (clang, -O0):
<shell>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <system@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shell>:
jmp    1030 <system@plt>

LLVM IR (-O0):
define void @shell(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @system(i8* %3)
ret void
}

LLVM IR (-O2):
define void @shell(i8* nocapture %0) {
%2 = tail call i32 @system(i8* %0)
ret void
}
float mat_get(const float *a, int i, int j, int n) { return a[i + n * j]; }


x86 assembly (clang, -O0):
<mat_get>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    -0x14(%rbp),%edx
imul   -0x10(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
movss  (%rax,%rcx,4),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mat_get>:
imul   %ecx,%edx
add    %esi,%edx
movslq %edx,%rax
movss  (%rdi,%rax,4),%xmm0
ret

LLVM IR (-O0):
define float @mat_get(float* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca float*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store float* %0, float** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load float*, float** %5
%10 = load i32, i32* %6
%11 = load i32, i32* %8
%12 = load i32, i32* %7
%13 = mul nsw i32 %11, %12
%14 = add nsw i32 %10, %13
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds float, float* %9, i64 %15
%17 = load float, float* %16
ret float %17
}

LLVM IR (-O2):
define float @mat_get(float* nocapture %0, i32 %1, i32 %2, i32 %3) {
%5 = mul nsw i32 %3, %2
%6 = add nsw i32 %5, %1
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds float, float* %0, i64 %7
%9 = load float, float* %8
ret float %9
}