int wzd_split_reply_code(int code, int *digit1, int *digit2, int *digit3) {
  if (!((int)(code) >= 100 && (int)(code) <= 599))
    return 1;
  if (digit3)
    *digit3 = (code % 10);
  code /= 10;
  if (digit2)
    *digit2 = (code % 10);
  code /= 10;
  if (digit1)
    *digit1 = (code % 10);
  code /= 10;
  return 0;
}


x86 assembly (clang, -O0):
<wzd_split_reply_code>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpl   $0x64,-0x8(%rbp)
jl     112a <wzd_split_reply_code+0x2a>
cmpl   $0x257,-0x8(%rbp)
jle    1136 <wzd_split_reply_code+0x36>
movl   $0x1,-0x4(%rbp)
jmp    11bb <wzd_split_reply_code+0xbb>
cmpq   $0x0,-0x20(%rbp)
je     1152 <wzd_split_reply_code+0x52>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x20(%rbp),%rax
mov    %edx,(%rax)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     117c <wzd_split_reply_code+0x7c>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x18(%rbp),%rax
mov    %edx,(%rax)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     11a6 <wzd_split_reply_code+0xa6>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x10(%rbp),%rax
mov    %edx,(%rax)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wzd_split_reply_code>:
lea    -0x64(%rdi),%r8d
mov    $0x1,%eax
cmp    $0x1f3,%r8d
ja     118d <wzd_split_reply_code+0x8d>
test   %rcx,%rcx
je     1134 <wzd_split_reply_code+0x34>
movzwl %di,%eax
imul   $0xcccd,%eax,%eax
shr    $0x12,%eax
and    $0xfffffffe,%eax
lea    (%rax,%rax,4),%r8d
mov    %edi,%eax
sub    %r8d,%eax
movzwl %ax,%eax
mov    %eax,(%rcx)
test   %rdx,%rdx
je     115e <wzd_split_reply_code+0x5e>
movzwl %di,%eax
imul   $0xcccd,%eax,%eax
shr    $0x13,%eax
movzbl %al,%eax
imul   $0xcd,%eax,%ecx
shr    $0xa,%ecx
and    $0xfffffffe,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %cl,%al
movzbl %al,%eax
mov    %eax,(%rdx)
xor    %eax,%eax
test   %rsi,%rsi
je     118d <wzd_split_reply_code+0x8d>
movzwl %di,%ecx
shr    $0x2,%ecx
imul   $0x147b,%ecx,%ecx
shr    $0x11,%ecx
movzbl %cl,%ecx
imul   $0xcd,%ecx,%edx
shr    $0xa,%edx
and    $0xfffffffe,%edx
lea    (%rdx,%rdx,4),%edx
sub    %dl,%cl
movzbl %cl,%ecx
mov    %ecx,(%rsi)
ret

LLVM IR (-O0):
define i32 @wzd_split_reply_code(i32 %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32*
store i32 %0, i32* %6
store i32* %1, i32** %7
store i32* %2, i32** %8
store i32* %3, i32** %9
%10 = load i32, i32* %6
%11 = icmp sge i32 %10, 100
br i1 %11, label %12, label %15
12: ; preds = %4
%13 = load i32, i32* %6
%14 = icmp sle i32 %13, 599
br i1 %14, label %16, label %15
15: ; preds = %12, %4
store i32 1, i32* %5
br label %44
16: ; preds = %12
%17 = load i32*, i32** %9
%18 = icmp ne i32* %17, null
br i1 %18, label %19, label %23
19: ; preds = %16
%20 = load i32, i32* %6
%21 = srem i32 %20, 10
%22 = load i32*, i32** %9
store i32 %21, i32* %22
br label %23
23: ; preds = %19, %16
%24 = load i32, i32* %6
%25 = sdiv i32 %24, 10
store i32 %25, i32* %6
%26 = load i32*, i32** %8
%27 = icmp ne i32* %26, null
br i1 %27, label %28, label %32
28: ; preds = %23
%29 = load i32, i32* %6
%30 = srem i32 %29, 10
%31 = load i32*, i32** %8
store i32 %30, i32* %31
br label %32
32: ; preds = %28, %23
%33 = load i32, i32* %6
%34 = sdiv i32 %33, 10
store i32 %34, i32* %6
%35 = load i32*, i32** %7
%36 = icmp ne i32* %35, null
br i1 %36, label %37, label %41
37: ; preds = %32
%38 = load i32, i32* %6
%39 = srem i32 %38, 10
%40 = load i32*, i32** %7
store i32 %39, i32* %40
br label %41
41: ; preds = %37, %32
%42 = load i32, i32* %6
%43 = sdiv i32 %42, 10
store i32 %43, i32* %6
store i32 0, i32* %5
br label %44
44: ; preds = %41, %15
%45 = load i32, i32* %5
ret i32 %45
}

LLVM IR (-O2):
define i32 @wzd_split_reply_code(i32 %0, i32* writeonly %1, i32* writeonly %2, i32* writeonly %3) {
%5 = add i32 %0, -100
%6 = icmp ult i32 %5, 500
br i1 %6, label %7, label %29
7: ; preds = %4
%8 = icmp eq i32* %3, null
br i1 %8, label %13, label %9
9: ; preds = %7
%10 = trunc i32 %0 to i16
%11 = urem i16 %10, 10
%12 = zext i16 %11 to i32
store i32 %12, i32* %3
br label %13
13: ; preds = %9, %7
%14 = icmp eq i32* %2, null
br i1 %14, label %21, label %15
15: ; preds = %13
%16 = trunc i32 %0 to i16
%17 = udiv i16 %16, 10
%18 = trunc i16 %17 to i8
%19 = urem i8 %18, 10
%20 = zext i8 %19 to i32
store i32 %20, i32* %2
br label %21
21: ; preds = %15, %13
%22 = icmp eq i32* %1, null
br i1 %22, label %29, label %23
23: ; preds = %21
%24 = trunc i32 %0 to i16
%25 = udiv i16 %24, 100
%26 = trunc i16 %25 to i8
%27 = urem i8 %26, 10
%28 = zext i8 %27 to i32
store i32 %28, i32* %1
br label %29
29: ; preds = %21, %23, %4
%30 = phi i32 [ 1, %4 ], [ 0, %23 ], [ 0, %21 ]
ret i32 %30
}