float bounce_ease_out(float p) {
  float f = 0.0f;
  if (p < 4.0f / 11.0f) {
    f = (121.0f * p * p) / 16.0f;
  } else if (p < 8.0f / 11.0f) {
    f = (363.0f / 40.0f * p * p) - (99.0f / 10.0f * p) + 17.0f / 5.0f;
  } else if (p < 9.0f / 10.0f) {
    f = (4356.0f / 361.0f * p * p) - (35442.0f / 1805.0f * p) +
        16061.0f / 1805.0f;
  } else {
    f = (54.0f / 5.0f * p * p) - (513.0f / 25.0f * p) + 268.0f / 25.0f;
  }
  return f;
}


x86 assembly (clang, -O0):
<bounce_ease_out>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
xorps  %xmm0,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  0xee7(%rip),%xmm0
ucomiss -0x4(%rbp),%xmm0
jbe    114b <bounce_ease_out+0x4b>
movss  0xf09(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  0xef3(%rip),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
jmp    1252 <bounce_ease_out+0x152>
movss  0xeb1(%rip),%xmm0
ucomiss -0x4(%rbp),%xmm0
jbe    11a7 <bounce_ease_out+0xa7>
movss  0xec7(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
movss  0xeb1(%rip),%xmm1
mulss  -0x4(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  0xe8b(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
jmp    124d <bounce_ease_out+0x14d>
movss  0xe59(%rip),%xmm0
ucomiss -0x4(%rbp),%xmm0
jbe    1203 <bounce_ease_out+0x103>
movss  0xe5f(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
movss  0xe49(%rip),%xmm1
mulss  -0x4(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  0xe23(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
jmp    1248 <bounce_ease_out+0x148>
movss  0xe09(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
movss  0xdf3(%rip),%xmm1
mulss  -0x4(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  0xdcd(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
jmp    124d <bounce_ease_out+0x14d>
jmp    1252 <bounce_ease_out+0x152>
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<bounce_ease_out>:
movss  0xef8(%rip),%xmm1
ucomiss %xmm0,%xmm1
jbe    1129 <bounce_ease_out+0x29>
movss  0xf1b(%rip),%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm0,%xmm1
mulss  0xf0f(%rip),%xmm1
movaps %xmm1,%xmm0
ret
movss  0xed3(%rip),%xmm1
ucomiss %xmm0,%xmm1
jbe    115b <bounce_ease_out+0x5b>
movss  0xee6(%rip),%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm0,%xmm1
mulss  0xeda(%rip),%xmm0
addss  %xmm1,%xmm0
addss  0xed2(%rip),%xmm0
ret
movss  0xea5(%rip),%xmm1
ucomiss %xmm0,%xmm1
jbe    118d <bounce_ease_out+0x8d>
movss  0xea8(%rip),%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm0,%xmm1
mulss  0xe9c(%rip),%xmm0
addss  %xmm1,%xmm0
addss  0xe94(%rip),%xmm0
ret
movss  0xe77(%rip),%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm0,%xmm1
mulss  0xe6b(%rip),%xmm0
addss  %xmm1,%xmm0
addss  0xe63(%rip),%xmm0
ret

LLVM IR (-O0):
define float @bounce_ease_out(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
store float 0.000000e+00, float* %3
%4 = load float, float* %2
%5 = fcmp olt float %4, 0x3FD745D180000000
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load float, float* %2
%8 = fmul float 1.210000e+02, %7
%9 = load float, float* %2
%10 = fmul float %8, %9
%11 = fdiv float %10, 1.600000e+01
store float %11, float* %3
br label %47
12: ; preds = %1
%13 = load float, float* %2
%14 = fcmp olt float %13, 0x3FE745D180000000
br i1 %14, label %15, label %24
15: ; preds = %12
%16 = load float, float* %2
%17 = fmul float 0x4022266660000000, %16
%18 = load float, float* %2
%19 = load float, float* %2
%20 = fmul float 0x4023CCCCC0000000, %19
%21 = fneg float %20
%22 = call float @llvm.fmuladd.f32(float %17, float %18, float %21)
%23 = fadd float %22, 0x400B333340000000
store float %23, float* %3
br label %46
24: ; preds = %12
%25 = load float, float* %2
%26 = fcmp olt float %25, 0x3FECCCCCC0000000
br i1 %26, label %27, label %36
27: ; preds = %24
%28 = load float, float* %2
%29 = fmul float 0x40282209E0000000, %28
%30 = load float, float* %2
%31 = load float, float* %2
%32 = fmul float 0x4033A2AD60000000, %31
%33 = fneg float %32
%34 = call float @llvm.fmuladd.f32(float %29, float %30, float %33)
%35 = fadd float %34, 0x4021CBCEA0000000
store float %35, float* %3
br label %45
36: ; preds = %24
%37 = load float, float* %2
%38 = fmul float 0x40259999A0000000, %37
%39 = load float, float* %2
%40 = load float, float* %2
%41 = fmul float 0x4034851EC0000000, %40
%42 = fneg float %41
%43 = call float @llvm.fmuladd.f32(float %38, float %39, float %42)
%44 = fadd float %43, 0x402570A3E0000000
store float %44, float* %3
br label %45
45: ; preds = %36, %27
br label %46
46: ; preds = %45, %15
br label %47
47: ; preds = %46, %6
%48 = load float, float* %3
ret float %48
}

LLVM IR (-O2):
define float @bounce_ease_out(float %0) {
%2 = fcmp olt float %0, 0x3FD745D180000000
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = fmul float %0, 1.210000e+02
%5 = fmul float %4, %0
%6 = fmul float %5, 6.250000e-02
br label %26
7: ; preds = %1
%8 = fcmp olt float %0, 0x3FE745D180000000
br i1 %8, label %9, label %14
9: ; preds = %7
%10 = fmul float %0, 0x4022266660000000
%11 = fmul float %0, 0xC023CCCCC0000000
%12 = tail call float @llvm.fmuladd.f32(float %10, float %0, float %11)
%13 = fadd float %12, 0x400B333340000000
br label %26
14: ; preds = %7
%15 = fcmp olt float %0, 0x3FECCCCCC0000000
br i1 %15, label %16, label %21
16: ; preds = %14
%17 = fmul float %0, 0x40282209E0000000
%18 = fmul float %0, 0xC033A2AD60000000
%19 = tail call float @llvm.fmuladd.f32(float %17, float %0, float %18)
%20 = fadd float %19, 0x4021CBCEA0000000
br label %26
21: ; preds = %14
%22 = fmul float %0, 0x40259999A0000000
%23 = fmul float %0, 0xC034851EC0000000
%24 = tail call float @llvm.fmuladd.f32(float %22, float %0, float %23)
%25 = fadd float %24, 0x402570A3E0000000
br label %26
26: ; preds = %9, %21, %16, %3
%27 = phi float [ %6, %3 ], [ %13, %9 ], [ %20, %16 ], [ %25, %21 ]
ret float %27
}