xunge/DecIR huggingface dataset:
/* Type definitions */
struct Pl_utl_sema {
  int dummy;
};
struct Pl_utl_bsema {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ pl_utl_sema_i_destroy(struct Pl_utl_sema *);
void pl_utl_bsema_i_destroy(struct Pl_utl_bsema *_bsema_p) {
  pl_utl_sema_i_destroy((struct Pl_utl_sema *)_bsema_p);
}


x86 assembly (clang, -O0):
<pl_utl_bsema_i_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pl_utl_sema_i_destroy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pl_utl_bsema_i_destroy>:
jmp    1030 <pl_utl_sema_i_destroy@plt>

LLVM IR (-O0):
%struct.Pl_utl_bsema = type { i32 }
%struct.Pl_utl_sema = type { i32 }
define void @pl_utl_bsema_i_destroy(%struct.Pl_utl_bsema* %0) {
%2 = alloca %struct.Pl_utl_bsema*
store %struct.Pl_utl_bsema* %0, %struct.Pl_utl_bsema** %2
%3 = load %struct.Pl_utl_bsema*, %struct.Pl_utl_bsema** %2
%4 = bitcast %struct.Pl_utl_bsema* %3 to %struct.Pl_utl_sema*
%5 = call i32 @pl_utl_sema_i_destroy(%struct.Pl_utl_sema* %4)
ret void
}

LLVM IR (-O2):
%struct.Pl_utl_bsema = type { i32 }
%struct.Pl_utl_sema = type { i32 }
define void @pl_utl_bsema_i_destroy(%struct.Pl_utl_bsema* %0) {
%2 = bitcast %struct.Pl_utl_bsema* %0 to %struct.Pl_utl_sema*
%3 = tail call i32 @pl_utl_sema_i_destroy(%struct.Pl_utl_sema* %2)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t tpmi_bits(uint32_t nof_ports) {
  if (nof_ports <= 2) {
    return 2;
  } else {
    return 4;
  }
}


x86 assembly (clang, -O0):
<tpmi_bits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jg     111d <tpmi_bits+0x1d>
movl   $0x2,-0x4(%rbp)
jmp    1124 <tpmi_bits+0x24>
movl   $0x4,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tpmi_bits>:
xor    %eax,%eax
cmp    $0x3,%edi
setge  %al
add    %eax,%eax
add    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @tpmi_bits(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 2
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 2, i32* %2
br label %8
7: ; preds = %1
store i32 4, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @tpmi_bits(i32 %0) {
%2 = icmp sgt i32 %0, 2
%3 = select i1 %2, i32 4, i32 2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void ctest2(int arg) { printf("ctest2 got arg %d\n", arg); }


x86 assembly (clang, -O0):
<ctest2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctest2>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"ctest2 got arg %d\0A\00"
define void @ctest2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"ctest2 got arg %d\0A\00"
define void @ctest2(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
int getleftchild(int rootindex) { return (2 * rootindex) + 1; }


x86 assembly (clang, -O0):
<getleftchild>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getleftchild>:
lea    (%rdi,%rdi,1),%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @getleftchild(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 2, %3
%5 = add nsw i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @getleftchild(i32 %0) {
%2 = shl nsw i32 %0, 1
%3 = or i32 %2, 1
ret i32 %3
}
/* Variables and functions */
char *getFileText(char *);
char *getSettings() { return getFileText("settings.conf"); }


x86 assembly (clang, -O0):
<getSettings>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <getFileText@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getSettings>:
lea    0xee9(%rip),%rdi
jmp    1030 <getFileText@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"settings.conf\00"
define i8* @getSettings() {
%1 = call i8* @getFileText(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [14 x i8] c"settings.conf\00"
define i8* @getSettings() {
%1 = tail call i8* @getFileText(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Type definitions */
struct rusage {
  int /*<<< orphan*/ ru_maxrss;
};

/* Variables and functions */
int /*<<< orphan*/ RUSAGE_SELF;
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *,
                           int /*<<< orphan*/);
int /*<<< orphan*/ getrusage(int /*<<< orphan*/, struct rusage *);
int /*<<< orphan*/ stderr;
void show_memory(char *title) {
  struct rusage r_usage;
  getrusage(RUSAGE_SELF, &r_usage);
  fprintf(stderr, "%s: Memory usage: %ld bytes\n", title, r_usage.ru_maxrss);
}


x86 assembly (clang, -O0):
<show_memory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
lea    -0x10(%rbp),%rsi
call   1040 <getrusage@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%ecx
lea    0xeab(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_memory>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
lea    0x8(%rsp),%rsi
call   1040 <getrusage@plt>
mov    0x2e9e(%rip),%rax
mov    (%rax),%edi
mov    0x8(%rsp),%ecx
lea    0xeb1(%rip),%rsi
mov    %rbx,%rdx
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.rusage = type { i32 }
@RUSAGE_SELF = global i32 0
@stderr = global i32 0
@.str = [29 x i8] c"%s: Memory usage: %ld bytes\0A\00"
define void @show_memory(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.rusage
store i8* %0, i8** %2
%4 = load i32, i32* @RUSAGE_SELF
%5 = call i32 @getrusage(i32 %4, %struct.rusage* %3)
%6 = load i32, i32* @stderr
%7 = load i8*, i8** %2
%8 = getelementptr inbounds %struct.rusage, %struct.rusage* %3, i32 0, i32 0
%9 = load i32, i32* %8
%10 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* %7, i32 %9)
ret void
}

LLVM IR (-O2):
%struct.rusage = type { i32 }
@RUSAGE_SELF = global i32 0
@stderr = global i32 0
@.str = [29 x i8] c"%s: Memory usage: %ld bytes\0A\00"
define void @show_memory(i8* %0) {
%2 = alloca %struct.rusage
%3 = bitcast %struct.rusage* %2 to i8*
%4 = load i32, i32* @RUSAGE_SELF
%5 = call i32 @getrusage(i32 %4, %struct.rusage* %2)
%6 = load i32, i32* @stderr
%7 = getelementptr inbounds %struct.rusage, %struct.rusage* %2, i64 0, i32 0
%8 = load i32, i32* %7
%9 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bar();
void *mem_alloc();
int /*<<< orphan*/ mem_free(void *);
void foo(void) {
  void *p = mem_alloc();
  bar();
  mem_free(p);
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <mem_alloc@plt>
mov    %rax,-0x8(%rbp)
mov    $0x0,%al
call   1040 <bar@plt>
mov    -0x8(%rbp),%rdi
call   1030 <mem_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbx
xor    %eax,%eax
call   1050 <mem_alloc@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1040 <bar@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <mem_free@plt>

LLVM IR (-O0):
define void @foo() {
%1 = alloca i8*
%2 = call i8* (...) @mem_alloc()
store i8* %2, i8** %1
%3 = call i32 (...) @bar()
%4 = load i8*, i8** %1
%5 = call i32 @mem_free(i8* %4)
ret void
}

LLVM IR (-O2):
define void @foo() {
%1 = tail call i8* (...) @mem_alloc()
%2 = tail call i32 (...) @bar()
%3 = tail call i32 @mem_free(i8* %1)
ret void
}
int get_servo_position(int servo) {}


x86 assembly (clang, -O0):
<get_servo_position>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_servo_position>:
ret

LLVM IR (-O0):
define i32 @get_servo_position(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @get_servo_position(i32 %0) {
ret i32 undef
}
/* Variables and functions */
char *BGBCC_SHXA_ParseTokenBasicAltn(char *, char *);
char *bgbcc_rstrdup(char *);
char *BGBCC_SHXA_ParseTokenAlt(char *cs, char **rstr) {
  char tb[256];
  cs = BGBCC_SHXA_ParseTokenBasicAltn(cs, tb);
  *rstr = bgbcc_rstrdup(tb);
  return (cs);
}


x86 assembly (clang, -O0):
<BGBCC_SHXA_ParseTokenAlt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x110(%rbp),%rsi
call   1030 <BGBCC_SHXA_ParseTokenBasicAltn@plt>
mov    %rax,-0x8(%rbp)
lea    -0x110(%rbp),%rdi
call   1040 <bgbcc_rstrdup@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BGBCC_SHXA_ParseTokenAlt>:
push   %r15
push   %r14
push   %rbx
sub    $0x100,%rsp
mov    %rsi,%r15
mov    %rsp,%r14
mov    %r14,%rsi
call   1030 <BGBCC_SHXA_ParseTokenBasicAltn@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1040 <bgbcc_rstrdup@plt>
mov    %rax,(%r15)
mov    %rbx,%rax
add    $0x100,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @BGBCC_SHXA_ParseTokenAlt(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
%5 = alloca [256 x i8]
store i8* %0, i8** %3
store i8** %1, i8*** %4
%6 = load i8*, i8** %3
%7 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%8 = call i8* @BGBCC_SHXA_ParseTokenBasicAltn(i8* %6, i8* %7)
store i8* %8, i8** %3
%9 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%10 = call i8* @bgbcc_rstrdup(i8* %9)
%11 = load i8**, i8*** %4
store i8* %10, i8** %11
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define i8* @BGBCC_SHXA_ParseTokenAlt(i8* %0, i8** nocapture writeonly %1) {
%3 = alloca [256 x i8]
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%5 = call i8* @BGBCC_SHXA_ParseTokenBasicAltn(i8* %0, i8* %4)
%6 = call i8* @bgbcc_rstrdup(i8* %4)
store i8* %6, i8** %1
ret i8* %5
}
/* Type definitions */
struct ts_tdt {
  int dummy;
};

/* Variables and functions */
struct ts_tdt *ts_tdt_alloc_init(int);
int /*<<< orphan*/ ts_tdt_dump(struct ts_tdt *);
int /*<<< orphan*/ ts_tdt_free(struct ts_tdt **);
int /*<<< orphan*/ ts_tdt_set_time(struct ts_tdt *, int);
void ts_tdt_test(void) {
  struct ts_tdt *tdt = ts_tdt_alloc_init(1234567890);
  ts_tdt_dump(tdt);
  ts_tdt_set_time(tdt, 1000000000);
  ts_tdt_dump(tdt);
  ts_tdt_free(&tdt);
}


x86 assembly (clang, -O0):
<ts_tdt_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x499602d2,%edi
call   1050 <ts_tdt_alloc_init@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1060 <ts_tdt_dump@plt>
mov    -0x8(%rbp),%rdi
mov    $0x3b9aca00,%esi
call   1040 <ts_tdt_set_time@plt>
mov    -0x8(%rbp),%rdi
call   1060 <ts_tdt_dump@plt>
lea    -0x8(%rbp),%rdi
call   1030 <ts_tdt_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ts_tdt_test>:
push   %rbx
sub    $0x10,%rsp
mov    $0x499602d2,%edi
call   1050 <ts_tdt_alloc_init@plt>
mov    %rax,%rbx
mov    %rax,0x8(%rsp)
mov    %rax,%rdi
call   1060 <ts_tdt_dump@plt>
mov    %rbx,%rdi
mov    $0x3b9aca00,%esi
call   1040 <ts_tdt_set_time@plt>
mov    %rbx,%rdi
call   1060 <ts_tdt_dump@plt>
lea    0x8(%rsp),%rdi
call   1030 <ts_tdt_free@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.ts_tdt = type { i32 }
define void @ts_tdt_test() {
%1 = alloca %struct.ts_tdt*
%2 = call %struct.ts_tdt* @ts_tdt_alloc_init(i32 1234567890)
store %struct.ts_tdt* %2, %struct.ts_tdt** %1
%3 = load %struct.ts_tdt*, %struct.ts_tdt** %1
%4 = call i32 @ts_tdt_dump(%struct.ts_tdt* %3)
%5 = load %struct.ts_tdt*, %struct.ts_tdt** %1
%6 = call i32 @ts_tdt_set_time(%struct.ts_tdt* %5, i32 1000000000)
%7 = load %struct.ts_tdt*, %struct.ts_tdt** %1
%8 = call i32 @ts_tdt_dump(%struct.ts_tdt* %7)
%9 = call i32 @ts_tdt_free(%struct.ts_tdt** %1)
ret void
}

LLVM IR (-O2):
%struct.ts_tdt = type { i32 }
define void @ts_tdt_test() {
%1 = alloca %struct.ts_tdt*
%2 = bitcast %struct.ts_tdt** %1 to i8*
%3 = tail call %struct.ts_tdt* @ts_tdt_alloc_init(i32 1234567890)
store %struct.ts_tdt* %3, %struct.ts_tdt** %1
%4 = tail call i32 @ts_tdt_dump(%struct.ts_tdt* %3)
%5 = tail call i32 @ts_tdt_set_time(%struct.ts_tdt* %3, i32 1000000000)
%6 = tail call i32 @ts_tdt_dump(%struct.ts_tdt* %3)
%7 = call i32 @ts_tdt_free(%struct.ts_tdt** %1)
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int32_t eqtohint32(const uint8_t *data) {
  return (int32_t)((data[0] << 24) | (data[1] << 16) | (data[2] << 8) |
                   data[3]);
}


x86 assembly (clang, -O0):
<eqtohint32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
mov    0x4(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
or     0xc(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<eqtohint32>:
mov    (%rdi),%eax
mov    0x4(%rdi),%ecx
shl    $0x18,%eax
shl    $0x10,%ecx
or     %eax,%ecx
mov    0x8(%rdi),%eax
shl    $0x8,%eax
or     %ecx,%eax
or     0xc(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @eqtohint32(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = shl i32 %5, 24
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = shl i32 %9, 16
%11 = or i32 %6, %10
%12 = load i32*, i32** %2
%13 = getelementptr inbounds i32, i32* %12, i64 2
%14 = load i32, i32* %13
%15 = shl i32 %14, 8
%16 = or i32 %11, %15
%17 = load i32*, i32** %2
%18 = getelementptr inbounds i32, i32* %17, i64 3
%19 = load i32, i32* %18
%20 = or i32 %16, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @eqtohint32(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 24
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = shl i32 %5, 16
%7 = or i32 %6, %3
%8 = getelementptr inbounds i32, i32* %0, i64 2
%9 = load i32, i32* %8
%10 = shl i32 %9, 8
%11 = or i32 %7, %10
%12 = getelementptr inbounds i32, i32* %0, i64 3
%13 = load i32, i32* %12
%14 = or i32 %11, %13
ret i32 %14
}
void freeInt(void *i) { return; }


x86 assembly (clang, -O0):
<freeInt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeInt>:
ret

LLVM IR (-O0):
define void @freeInt(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @freeInt(i8* nocapture %0) {
ret void
}
int sec_minutes(int sec) {
  int min;
  min = sec / 60;
  return min;
}


x86 assembly (clang, -O0):
<sec_minutes>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3c,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sec_minutes>:
movslq %edi,%rax
imul   $0xffffffff88888889,%rax,%rcx
shr    $0x20,%rcx
add    %ecx,%eax
mov    %eax,%ecx
shr    $0x1f,%ecx
sar    $0x5,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @sec_minutes(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sdiv i32 %4, 60
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @sec_minutes(i32 %0) {
%2 = sdiv i32 %0, 60
ret i32 %2
}
void UARTModemControlSet(unsigned long ulBase, unsigned long ulControl) {
  ;

  ;
  (*((volatile unsigned long *)(ulBase + 0x00000014))) |= ulControl;
}


x86 assembly (clang, -O0):
<UARTModemControlSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x14(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTModemControlSet>:
or     %rsi,0x14(%rdi)
ret

LLVM IR (-O0):
define void @UARTModemControlSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add i64 %6, 20
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = or i64 %9, %5
store volatile i64 %10, i64* %8
ret void
}

LLVM IR (-O2):
define void @UARTModemControlSet(i64 %0, i64 %1) {
%3 = add i64 %0, 20
%4 = inttoptr i64 %3 to i64*
%5 = load volatile i64, i64* %4
%6 = or i64 %5, %1
store volatile i64 %6, i64* %4
ret void
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMR71_set(void) { return U_WMRCORENONE_set("U_WMR71"); }


x86 assembly (clang, -O0):
<U_WMR71_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR71_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR71\00"
define i8* @U_WMR71_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR71\00"
define i8* @U_WMR71_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Type definitions */
typedef scalar_t__ thrd_t;

/* Variables and functions */
int thrd_equal(thrd_t thr0, thrd_t thr1) { return thr0 == thr1; }


x86 assembly (clang, -O0):
<thrd_equal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<thrd_equal>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @thrd_equal(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @thrd_equal(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
main() {
  int *p = &(int){2};
  return *p;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x2,-0x14(%rbp)
lea    -0x14(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32
store i32 0, i32* %1
store i32 2, i32* %3
store i32* %3, i32** %2
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @main() {
ret i32 2
}
/* Variables and functions */
int /*<<< orphan*/ cbreak();
int /*<<< orphan*/ initscr();
int /*<<< orphan*/ noecho();
int tty_break() {
  initscr();
  cbreak();
  noecho();
  return 0;
}


x86 assembly (clang, -O0):
<tty_break>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <initscr@plt>
mov    $0x0,%al
call   1030 <cbreak@plt>
mov    $0x0,%al
call   1050 <noecho@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tty_break>:
push   %rax
xor    %eax,%eax
call   1040 <initscr@plt>
xor    %eax,%eax
call   1030 <cbreak@plt>
xor    %eax,%eax
call   1050 <noecho@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @tty_break() {
%1 = call i32 (...) @initscr()
%2 = call i32 (...) @cbreak()
%3 = call i32 (...) @noecho()
ret i32 0
}

LLVM IR (-O2):
define i32 @tty_break() {
%1 = tail call i32 (...) @initscr()
%2 = tail call i32 (...) @cbreak()
%3 = tail call i32 (...) @noecho()
ret i32 0
}
void auth_custom_idle() {}


x86 assembly (clang, -O0):
<auth_custom_idle>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<auth_custom_idle>:
ret

LLVM IR (-O0):
define void @auth_custom_idle() {
ret void
}

LLVM IR (-O2):
define void @auth_custom_idle() {
ret void
}
float Linear__easeIn(float t, float b, float c, float d, float p0, float p1) {
  return c * t / d + b;
}


x86 assembly (clang, -O0):
<Linear__easeIn>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  %xmm4,-0x14(%rbp)
movss  %xmm5,-0x18(%rbp)
movss  -0xc(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
divss  -0x10(%rbp),%xmm0
addss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Linear__easeIn>:
mulss  %xmm2,%xmm0
divss  %xmm3,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @Linear__easeIn(float %0, float %1, float %2, float %3, float %4, float %5) {
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
%11 = alloca float
%12 = alloca float
store float %0, float* %7
store float %1, float* %8
store float %2, float* %9
store float %3, float* %10
store float %4, float* %11
store float %5, float* %12
%13 = load float, float* %9
%14 = load float, float* %7
%15 = fmul float %13, %14
%16 = load float, float* %10
%17 = fdiv float %15, %16
%18 = load float, float* %8
%19 = fadd float %17, %18
ret float %19
}

LLVM IR (-O2):
define float @Linear__easeIn(float %0, float %1, float %2, float %3, float %4, float %5) {
%7 = fmul float %0, %2
%8 = fdiv float %7, %3
%9 = fadd float %8, %1
ret float %9
}
/* Variables and functions */
int /*<<< orphan*/ Fail(char *, int, int);
int printf(char *, int);
int strlen(char *);
void DoNumTest(char *formatstr, int param, char *checkstr) {
  int ret;
  ret = printf(formatstr, param);
  if (ret != strlen(checkstr)) {
    Fail("Expected printf to return %d, got %d.\n", strlen(checkstr), ret);
  }
}


x86 assembly (clang, -O0):
<DoNumTest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <printf@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x20(%rbp),%eax
cmp    %ecx,%eax
je     1188 <DoNumTest+0x58>
mov    -0x18(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%esi
mov    -0x1c(%rbp),%edx
lea    0xe7d(%rip),%rdi
call   1050 <Fail@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoNumTest>:
push   %rbp
push   %rbx
push   %rax
mov    %rdx,%rbx
call   1040 <printf@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <strlen@plt>
cmp    %eax,%ebp
jne    1150 <DoNumTest+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %rbx,%rdi
call   1030 <strlen@plt>
lea    0xea1(%rip),%rdi
mov    %eax,%esi
mov    %ebp,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <Fail@plt>

LLVM IR (-O0):
@.str = [39 x i8] c"Expected printf to return %d, got %d.\0A\00"
define void @DoNumTest(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%8 = load i8*, i8** %4
%9 = load i32, i32* %5
%10 = call i32 @printf(i8* %8, i32 %9)
store i32 %10, i32* %7
%11 = load i32, i32* %7
%12 = load i8*, i8** %6
%13 = call i32 @strlen(i8* %12)
%14 = icmp ne i32 %11, %13
br i1 %14, label %15, label %20
15: ; preds = %3
%16 = load i8*, i8** %6
%17 = call i32 @strlen(i8* %16)
%18 = load i32, i32* %7
%19 = call i32 @Fail(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i32 %17, i32 %18)
br label %20
20: ; preds = %15, %3
ret void
}

LLVM IR (-O2):
@.str = [39 x i8] c"Expected printf to return %d, got %d.\0A\00"
define void @DoNumTest(i8* %0, i32 %1, i8* %2) {
%4 = tail call i32 @printf(i8* %0, i32 %1)
%5 = tail call i32 @strlen(i8* %2)
%6 = icmp eq i32 %4, %5
br i1 %6, label %10, label %7
7: ; preds = %3
%8 = tail call i32 @strlen(i8* %2)
%9 = tail call i32 @Fail(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i32 %8, i32 %4)
br label %10
10: ; preds = %7, %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ evbit;

/* Variables and functions */
int /*<<< orphan*/ EVIOCGBIT(int /*<<< orphan*/, int);
int /*<<< orphan*/ ioctl(int, int /*<<< orphan*/, unsigned long *);
int supports_event_type(int device_fd, int event_type) {
  unsigned long evbit = 0;
  ioctl(device_fd, EVIOCGBIT(0, sizeof(evbit)), &evbit);
  return evbit & (1 << event_type);
}


x86 assembly (clang, -O0):
<supports_event_type>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
xor    %edi,%edi
mov    $0x8,%esi
call   1030 <EVIOCGBIT@plt>
mov    -0x14(%rbp),%edi
mov    %eax,%esi
lea    -0x10(%rbp),%rdx
call   1040 <ioctl@plt>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
movslq %ecx,%rcx
and    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<supports_event_type>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
movq   $0x0,(%rsp)
xor    %edi,%edi
mov    $0x8,%esi
call   1030 <EVIOCGBIT@plt>
mov    %rsp,%rdx
mov    %ebp,%edi
mov    %eax,%esi
call   1040 <ioctl@plt>
mov    $0x1,%eax
mov    %ebx,%ecx
shl    %cl,%eax
and    (%rsp),%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @supports_event_type(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
store i32 %0, i32* %3
store i32 %1, i32* %4
store i64 0, i64* %5
%6 = load i32, i32* %3
%7 = call i32 @EVIOCGBIT(i32 0, i32 8)
%8 = call i32 @ioctl(i32 %6, i32 %7, i64* %5)
%9 = load i64, i64* %5
%10 = load i32, i32* %4
%11 = shl i32 1, %10
%12 = sext i32 %11 to i64
%13 = and i64 %9, %12
%14 = trunc i64 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @supports_event_type(i32 %0, i32 %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
store i64 0, i64* %3
%5 = tail call i32 @EVIOCGBIT(i32 0, i32 8)
%6 = call i32 @ioctl(i32 %0, i32 %5, i64* %3)
%7 = load i64, i64* %3
%8 = shl nuw i32 1, %1
%9 = trunc i64 %7 to i32
%10 = and i32 %8, %9
ret i32 %10
}
const char *gpsms_string(unsigned short gpsms) {
  switch (gpsms) {
  case 0:
    return "Disabled";
    break;
  case 1:
    return "Enabled";
    break;
  default:
    return "Invalid";
  }
}


x86 assembly (clang, -O0):
<gpsms_string>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0xa(%rbp)
movzwl -0xa(%rbp),%eax
mov    %eax,-0x10(%rbp)
test   %eax,%eax
je     1130 <gpsms_string+0x30>
jmp    111f <gpsms_string+0x1f>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
je     1140 <gpsms_string+0x40>
jmp    1150 <gpsms_string+0x50>
lea    0xec9(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    115b <gpsms_string+0x5b>
lea    0xec2(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    115b <gpsms_string+0x5b>
lea    0xeba(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpsms_string>:
cmp    $0x1,%di
lea    0xefe(%rip),%rax
lea    0xeff(%rip),%rcx
cmove  %rax,%rcx
test   %edi,%edi
lea    0xee1(%rip),%rax
cmovne %rcx,%rax
ret

LLVM IR (-O0):
@.str = [9 x i8] c"Disabled\00"
@.str.1 = [8 x i8] c"Enabled\00"
@.str.2 = [8 x i8] c"Invalid\00"
define i8* @gpsms_string(i16 zeroext %0) {
%2 = alloca i8*
%3 = alloca i16
store i16 %0, i16* %3
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
switch i32 %5, label %8 [
i32 0, label %6
i32 1, label %7
]
6: ; preds = %1
store i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8** %2
br label %9
7: ; preds = %1
store i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %9
8: ; preds = %1
store i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), i8** %2
br label %9
9: ; preds = %8, %7, %6
%10 = load i8*, i8** %2
ret i8* %10
}

LLVM IR (-O2):
@.str = [9 x i8] c"Disabled\00"
@.str.1 = [8 x i8] c"Enabled\00"
@.str.2 = [8 x i8] c"Invalid\00"
define i8* @gpsms_string(i16 zeroext %0) {
%2 = icmp eq i16 %0, 1
%3 = select i1 %2, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0)
%4 = icmp eq i16 %0, 0
%5 = select i1 %4, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %3
ret i8* %5
}
void null_init() {}


x86 assembly (clang, -O0):
<null_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_init>:
ret

LLVM IR (-O0):
define void @null_init() {
ret void
}

LLVM IR (-O2):
define void @null_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ error(char *);
int /*<<< orphan*/ gen_comment();
int /*<<< orphan*/ match(char *);
int /*<<< orphan*/ newline();
int /*<<< orphan*/ output_string(char *);
void needbrack(char *str) {
  if (!match(str)) {
    error("missing bracket");
    gen_comment();
    output_string(str);
    newline();
  }
}


x86 assembly (clang, -O0):
<needbrack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1060 <match@plt>
cmp    $0x0,%eax
jne    1191 <needbrack+0x41>
lea    0xe8b(%rip),%rdi
call   1070 <error@plt>
mov    $0x0,%al
call   1040 <gen_comment@plt>
mov    -0x8(%rbp),%rdi
call   1050 <output_string@plt>
mov    $0x0,%al
call   1030 <newline@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<needbrack>:
push   %rbx
mov    %rdi,%rbx
call   1060 <match@plt>
test   %eax,%eax
je     115f <needbrack+0xf>
pop    %rbx
ret
lea    0xe9a(%rip),%rdi
call   1070 <error@plt>
xor    %eax,%eax
call   1040 <gen_comment@plt>
mov    %rbx,%rdi
call   1050 <output_string@plt>
xor    %eax,%eax
pop    %rbx
jmp    1030 <newline@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"missing bracket\00"
define void @needbrack(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @match(i8* %3)
%5 = icmp ne i32 %4, 0
br i1 %5, label %12, label %6
6: ; preds = %1
%7 = call i32 @error(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%8 = call i32 (...) @gen_comment()
%9 = load i8*, i8** %2
%10 = call i32 @output_string(i8* %9)
%11 = call i32 (...) @newline()
br label %12
12: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"missing bracket\00"
define void @needbrack(i8* %0) {
%2 = tail call i32 @match(i8* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %9
4: ; preds = %1
%5 = tail call i32 @error(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 (...) @gen_comment()
%7 = tail call i32 @output_string(i8* %0)
%8 = tail call i32 (...) @newline()
br label %9
9: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ close_port_reset_state();
scalar_t__ open_port(int, int, char, int);
int /*<<< orphan*/ serial_state(int);
int open_port_default(void) {
  int baud = 9600;
  close_port_reset_state();
  if (open_port(baud, 8, 'N', 1)) {
    return 1;
  }
  serial_state(1);
  return 0;
}


x86 assembly (clang, -O0):
<open_port_default>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x2580,-0x8(%rbp)
mov    $0x0,%al
call   1030 <close_port_reset_state@plt>
mov    -0x8(%rbp),%edi
mov    $0x8,%esi
mov    $0x4e,%edx
mov    $0x1,%ecx
call   1040 <open_port@plt>
cmp    $0x0,%rax
je     1173 <open_port_default+0x43>
movl   $0x1,-0x4(%rbp)
jmp    1184 <open_port_default+0x54>
mov    $0x1,%edi
call   1050 <serial_state@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_port_default>:
push   %rbx
xor    %eax,%eax
call   1030 <close_port_reset_state@plt>
mov    $0x1,%ebx
mov    $0x2580,%edi
mov    $0x8,%esi
mov    $0x4e,%edx
mov    $0x1,%ecx
call   1040 <open_port@plt>
test   %rax,%rax
jne    1167 <open_port_default+0x37>
mov    $0x1,%edi
call   1050 <serial_state@plt>
xor    %ebx,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @open_port_default() {
%1 = alloca i32
%2 = alloca i32
store i32 9600, i32* %2
%3 = call i32 (...) @close_port_reset_state()
%4 = load i32, i32* %2
%5 = call i64 @open_port(i32 %4, i32 8, i8 signext 78, i32 1)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %0
store i32 1, i32* %1
br label %10
8: ; preds = %0
%9 = call i32 @serial_state(i32 1)
store i32 0, i32* %1
br label %10
10: ; preds = %8, %7
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
define i32 @open_port_default() {
%1 = tail call i32 (...) @close_port_reset_state()
%2 = tail call i64 @open_port(i32 9600, i32 8, i8 signext 78, i32 1)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = tail call i32 @serial_state(i32 1)
br label %6
6: ; preds = %0, %4
%7 = phi i32 [ 0, %4 ], [ 1, %0 ]
ret i32 %7
}
/* Variables and functions */
int DBL_EPSILON;
int fabs(double);
bool is_equal_dbl(double a, double b) {
  return (fabs(a - b) <= (DBL_EPSILON * fabs(b)));
}


x86 assembly (clang, -O0):
<is_equal_dbl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
call   1030 <fabs@plt>
mov    %eax,-0x14(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <fabs@plt>
mov    -0x18(%rbp),%ecx
mov    %eax,%edx
mov    -0x14(%rbp),%eax
imul   %edx,%ecx
cmp    %ecx,%eax
setle  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_equal_dbl>:
push   %rbp
push   %rbx
push   %rax
movsd  %xmm1,(%rsp)
subsd  %xmm1,%xmm0
call   1030 <fabs@plt>
mov    %eax,%ebx
mov    0x2ebe(%rip),%rax
mov    (%rax),%ebp
movsd  (%rsp),%xmm0
call   1030 <fabs@plt>
imul   %ebp,%eax
xor    %ecx,%ecx
cmp    %eax,%ebx
setle  %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@DBL_EPSILON = global i32 0
define i32 @is_equal_dbl(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fsub double %5, %6
%8 = call i32 @fabs(double %7)
%9 = load i32, i32* @DBL_EPSILON
%10 = load double, double* %4
%11 = call i32 @fabs(double %10)
%12 = mul nsw i32 %9, %11
%13 = icmp sle i32 %8, %12
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
@DBL_EPSILON = global i32 0
define i32 @is_equal_dbl(double %0, double %1) {
%3 = fsub double %0, %1
%4 = tail call i32 @fabs(double %3)
%5 = load i32, i32* @DBL_EPSILON
%6 = tail call i32 @fabs(double %1)
%7 = mul nsw i32 %6, %5
%8 = icmp sle i32 %4, %7
%9 = zext i1 %8 to i32
ret i32 %9
}
void vlan_gvrp_uninit(void) {}


x86 assembly (clang, -O0):
<vlan_gvrp_uninit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vlan_gvrp_uninit>:
ret

LLVM IR (-O0):
define void @vlan_gvrp_uninit() {
ret void
}

LLVM IR (-O2):
define void @vlan_gvrp_uninit() {
ret void
}
void glDispatchCompute(void) { return; }


x86 assembly (clang, -O0):
<glDispatchCompute>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glDispatchCompute>:
ret

LLVM IR (-O0):
define void @glDispatchCompute() {
ret void
}

LLVM IR (-O2):
define void @glDispatchCompute() {
ret void
}
/* Type definitions */
struct Cyc_Tcenv_Genv {
  int dummy;
};
struct Cyc_List_List {
  int dummy;
};
struct Cyc_Interface_I {
  int dummy;
};

/* Variables and functions */
struct Cyc_Interface_I *Cyc_Interface_gen_extract(struct Cyc_Tcenv_Genv *, int,
                                                  struct Cyc_List_List *);
struct Cyc_Interface_I *Cyc_Interface_extract(struct Cyc_Tcenv_Genv *ae,
                                              struct Cyc_List_List *tds) {
  struct Cyc_Interface_I *_T0;
  _T0 = Cyc_Interface_gen_extract(ae, 1, tds);
  return _T0;
}


x86 assembly (clang, -O0):
<Cyc_Interface_extract>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    $0x1,%esi
call   1030 <Cyc_Interface_gen_extract@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_Interface_extract>:
mov    %rsi,%rdx
mov    $0x1,%esi
jmp    1030 <Cyc_Interface_gen_extract@plt>

LLVM IR (-O0):
%struct.Cyc_Interface_I = type { i32 }
%struct.Cyc_Tcenv_Genv = type { i32 }
%struct.Cyc_List_List = type { i32 }
define %struct.Cyc_Interface_I* @Cyc_Interface_extract(%struct.Cyc_Tcenv_Genv* %0, %struct.Cyc_List_List* %1) {
%3 = alloca %struct.Cyc_Tcenv_Genv*
%4 = alloca %struct.Cyc_List_List*
%5 = alloca %struct.Cyc_Interface_I*
store %struct.Cyc_Tcenv_Genv* %0, %struct.Cyc_Tcenv_Genv** %3
store %struct.Cyc_List_List* %1, %struct.Cyc_List_List** %4
%6 = load %struct.Cyc_Tcenv_Genv*, %struct.Cyc_Tcenv_Genv** %3
%7 = load %struct.Cyc_List_List*, %struct.Cyc_List_List** %4
%8 = call %struct.Cyc_Interface_I* @Cyc_Interface_gen_extract(%struct.Cyc_Tcenv_Genv* %6, i32 1, %struct.Cyc_List_List* %7)
store %struct.Cyc_Interface_I* %8, %struct.Cyc_Interface_I** %5
%9 = load %struct.Cyc_Interface_I*, %struct.Cyc_Interface_I** %5
ret %struct.Cyc_Interface_I* %9
}

LLVM IR (-O2):
%struct.Cyc_Interface_I = type { i32 }
%struct.Cyc_Tcenv_Genv = type { i32 }
%struct.Cyc_List_List = type { i32 }
define %struct.Cyc_Interface_I* @Cyc_Interface_extract(%struct.Cyc_Tcenv_Genv* %0, %struct.Cyc_List_List* %1) {
%3 = tail call %struct.Cyc_Interface_I* @Cyc_Interface_gen_extract(%struct.Cyc_Tcenv_Genv* %0, i32 1, %struct.Cyc_List_List* %1)
ret %struct.Cyc_Interface_I* %3
}
int main(int argc, char *argv[]) {
  int i;
#pragma acc data create(i)
#pragma acc parallel copyin(i)
  ++i;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i32, i32* %6
%8 = add nsw i32 %7, 1
store i32 %8, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ writeu4(unsigned char *, unsigned long long);
void writeu8(unsigned char *p, unsigned long long x) {
  writeu4(p, x);
  writeu4(p + 4, x >> 32);
}


x86 assembly (clang, -O0):
<writeu8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <writeu4@plt>
mov    -0x8(%rbp),%rdi
add    $0x4,%rdi
mov    -0x10(%rbp),%rsi
shr    $0x20,%rsi
call   1030 <writeu4@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<writeu8>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <writeu4@plt>
add    $0x4,%rbx
shr    $0x20,%r14
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <writeu4@plt>

LLVM IR (-O0):
define void @writeu8(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @writeu4(i8* %5, i64 %6)
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 4
%10 = load i64, i64* %4
%11 = lshr i64 %10, 32
%12 = call i32 @writeu4(i8* %9, i64 %11)
ret void
}

LLVM IR (-O2):
define void @writeu8(i8* %0, i64 %1) {
%3 = tail call i32 @writeu4(i8* %0, i64 %1)
%4 = getelementptr inbounds i8, i8* %0, i64 4
%5 = lshr i64 %1, 32
%6 = tail call i32 @writeu4(i8* %4, i64 %5)
ret void
}
int test_imm_44int64_lowword_mem(long long *val) {
  return ((*val) & (0x44 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_44int64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x44,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_44int64_lowword_mem>:
testb  $0x44,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_44int64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 68
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_44int64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 68
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int errno;
extern int sched_get_priority_min(int policy) {
  if (policy != 0 && policy != 1 && policy != 2) {
    (void)(errno = (7655));
    return -1;
  }
  return ((policy) != 0 ? 1 : 0);
}


x86 assembly (clang, -O0):
<sched_get_priority_min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     113e <sched_get_priority_min+0x3e>
cmpl   $0x1,-0x8(%rbp)
je     113e <sched_get_priority_min+0x3e>
cmpl   $0x2,-0x8(%rbp)
je     113e <sched_get_priority_min+0x3e>
mov    0x2eb4(%rip),%rax
movl   $0x1de7,(%rax)
movl   $0xffffffff,-0x4(%rbp)
jmp    1151 <sched_get_priority_min+0x51>
mov    -0x8(%rbp),%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sched_get_priority_min>:
cmp    $0x3,%edi
jb     1118 <sched_get_priority_min+0x18>
mov    0x2ed4(%rip),%rax
movl   $0x1de7,(%rax)
mov    $0xffffffff,%eax
ret
xor    %eax,%eax
test   %edi,%edi
setne  %al
ret

LLVM IR (-O0):
@errno = global i32 0
define i32 @sched_get_priority_min(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 1
br i1 %8, label %9, label %13
9: ; preds = %6
%10 = load i32, i32* %3
%11 = icmp ne i32 %10, 2
br i1 %11, label %12, label %13
12: ; preds = %9
store i32 7655, i32* @errno
store i32 -1, i32* %2
br label %18
13: ; preds = %9, %6, %1
%14 = load i32, i32* %3
%15 = icmp ne i32 %14, 0
%16 = zext i1 %15 to i64
%17 = select i1 %15, i32 1, i32 0
store i32 %17, i32* %2
br label %18
18: ; preds = %13, %12
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
@errno = global i32 0
define i32 @sched_get_priority_min(i32 %0) {
%2 = icmp ugt i32 %0, 2
br i1 %2, label %3, label %4
3: ; preds = %1
store i32 7655, i32* @errno
br label %7
4: ; preds = %1
%5 = icmp ne i32 %0, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %4, %3
%8 = phi i32 [ -1, %3 ], [ %6, %4 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ printchar(char **, char);
void puts_lib(char **str, char *s) {
  while (*s) {
    printchar(str, *s);
    s++;
  }
}


x86 assembly (clang, -O0):
<puts_lib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     114e <puts_lib+0x3e>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
movsbl (%rax),%esi
call   1030 <printchar@plt>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1120 <puts_lib+0x10>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts_lib>:
push   %r14
push   %rbx
push   %rax
mov    (%rsi),%al
test   %al,%al
je     1146 <puts_lib+0x36>
mov    %rsi,%rbx
mov    %rdi,%r14
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movsbl %al,%esi
mov    %r14,%rdi
call   1030 <printchar@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <puts_lib+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @puts_lib(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
store i8** %0, i8*** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %9, %2
%6 = load i8*, i8** %4
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %16
9: ; preds = %5
%10 = load i8**, i8*** %3
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = call i32 @printchar(i8** %10, i8 signext %12)
%14 = load i8*, i8** %4
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %4
br label %5
16: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @puts_lib(i8** %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %12, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %10, %5 ], [ %3, %2 ]
%7 = phi i8* [ %9, %5 ], [ %1, %2 ]
%8 = tail call i32 @printchar(i8** %0, i8 signext %6)
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %5
12: ; preds = %5, %2
ret void
}
/* Type definitions */
struct MyType {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ addOne(struct MyType *);
int main(int argc, char *argv[]) {
  addOne((struct MyType *)0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1030 <addOne@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <addOne@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.MyType = type { i32 }
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @addOne(%struct.MyType* null)
ret i32 0
}

LLVM IR (-O2):
%struct.MyType = type { i32 }
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @addOne(%struct.MyType* null)
ret i32 0
}
void installBackTracer() { ; }


x86 assembly (clang, -O0):
<installBackTracer>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<installBackTracer>:
ret

LLVM IR (-O0):
define void @installBackTracer() {
ret void
}

LLVM IR (-O2):
define void @installBackTracer() {
ret void
}
char is_palindromic(int num) {
  int n = num;
  int reverse = 0;
  char digit;
  while (n > 0) {
    digit = n % 10;
    reverse = reverse * 10 + digit;
    n /= 10;
  }
  return num == reverse;
}


x86 assembly (clang, -O0):
<is_palindromic>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    114e <is_palindromic+0x4e>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %dl,%al
mov    %al,-0xd(%rbp)
imul   $0xa,-0xc(%rbp),%eax
movsbl -0xd(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
jmp    1114 <is_palindromic+0x14>
mov    -0x4(%rbp),%eax
cmp    -0xc(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_palindromic>:
xor    %edx,%edx
test   %edi,%edi
jle    1133 <is_palindromic+0x33>
mov    $0xcccccccd,%r8d
mov    %edi,%ecx
xchg   %ax,%ax
lea    (%rdx,%rdx,4),%r9d
mov    %ecx,%esi
imul   %r8,%rsi
shr    $0x23,%rsi
lea    (%rsi,%rsi,1),%eax
lea    (%rax,%rax,4),%eax
mov    %ecx,%edx
sub    %eax,%edx
lea    (%rdx,%r9,2),%edx
cmp    $0x9,%ecx
mov    %esi,%ecx
ja     1110 <is_palindromic+0x10>
cmp    %edi,%edx
sete   %al
ret

LLVM IR (-O0):
define signext i8 @is_palindromic(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8
store i32 %0, i32* %2
%6 = load i32, i32* %2
store i32 %6, i32* %3
store i32 0, i32* %4
br label %7
7: ; preds = %10, %1
%8 = load i32, i32* %3
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %21
10: ; preds = %7
%11 = load i32, i32* %3
%12 = srem i32 %11, 10
%13 = trunc i32 %12 to i8
store i8 %13, i8* %5
%14 = load i32, i32* %4
%15 = mul nsw i32 %14, 10
%16 = load i8, i8* %5
%17 = sext i8 %16 to i32
%18 = add nsw i32 %15, %17
store i32 %18, i32* %4
%19 = load i32, i32* %3
%20 = sdiv i32 %19, 10
store i32 %20, i32* %3
br label %7
21: ; preds = %7
%22 = load i32, i32* %2
%23 = load i32, i32* %4
%24 = icmp eq i32 %22, %23
%25 = zext i1 %24 to i32
%26 = trunc i32 %25 to i8
ret i8 %26
}

LLVM IR (-O2):
define signext i8 @is_palindromic(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %11
3: ; preds = %1, %3
%4 = phi i32 [ %9, %3 ], [ %0, %1 ]
%5 = phi i32 [ %8, %3 ], [ 0, %1 ]
%6 = urem i32 %4, 10
%7 = mul nsw i32 %5, 10
%8 = add nsw i32 %6, %7
%9 = udiv i32 %4, 10
%10 = icmp ult i32 %4, 10
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %8, %3 ]
%13 = icmp eq i32 %12, %0
%14 = zext i1 %13 to i8
ret i8 %14
}