unsigned int I2CActiveOwnAddressGet(unsigned int baseAdd) {
  if (((*((volatile unsigned int *)(baseAdd + (0xD0)))) & ((0x00000001u)))) {
    return (((*((volatile unsigned int *)(baseAdd + (0xA8))))));
  } else if (((*((volatile unsigned int *)(baseAdd + (0xD0)))) &
              ((0x00000002u)))) {
    return (((*((volatile unsigned int *)(baseAdd + (0xC4 + ((0) * 4)))))));
  } else if (((*((volatile unsigned int *)(baseAdd + (0xD0)))) &
              ((0x00000004u)))) {
    return (((*((volatile unsigned int *)(baseAdd + (0xC4 + ((1) * 4)))))));
  } else if (((*((volatile unsigned int *)(baseAdd + (0xD0)))) &
              ((0x00000008u)))) {
    return (((*((volatile unsigned int *)(baseAdd + (0xC4 + ((2) * 4)))))));
  }
  return 0;
}


x86 assembly (clang, -O0):
<I2CActiveOwnAddressGet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xd0,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1133 <I2CActiveOwnAddressGet+0x33>
mov    -0x8(%rbp),%eax
add    $0xa8,%eax
mov    %eax,%eax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    11cd <I2CActiveOwnAddressGet+0xcd>
mov    -0x8(%rbp),%eax
add    $0xd0,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     115f <I2CActiveOwnAddressGet+0x5f>
mov    -0x8(%rbp),%eax
add    $0xc4,%eax
mov    %eax,%eax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    11cd <I2CActiveOwnAddressGet+0xcd>
mov    -0x8(%rbp),%eax
add    $0xd0,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0x4,%eax
cmp    $0x0,%eax
je     118b <I2CActiveOwnAddressGet+0x8b>
mov    -0x8(%rbp),%eax
add    $0xc8,%eax
mov    %eax,%eax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    11cd <I2CActiveOwnAddressGet+0xcd>
mov    -0x8(%rbp),%eax
add    $0xd0,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0x8,%eax
cmp    $0x0,%eax
je     11b7 <I2CActiveOwnAddressGet+0xb7>
mov    -0x8(%rbp),%eax
add    $0xcc,%eax
mov    %eax,%eax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    11cd <I2CActiveOwnAddressGet+0xcd>
jmp    11bc <I2CActiveOwnAddressGet+0xbc>
jmp    11c1 <I2CActiveOwnAddressGet+0xc1>
jmp    11c6 <I2CActiveOwnAddressGet+0xc6>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CActiveOwnAddressGet>:
lea    0xd0(%rdi),%edx
mov    (%rdx),%eax
mov    $0xa8,%ecx
test   $0x1,%al
jne    113a <I2CActiveOwnAddressGet+0x3a>
mov    $0xc4,%ecx
testl  $0x2,(%rdx)
jne    113a <I2CActiveOwnAddressGet+0x3a>
mov    $0xc8,%ecx
testl  $0x4,(%rdx)
jne    113a <I2CActiveOwnAddressGet+0x3a>
mov    $0xcc,%ecx
xor    %eax,%eax
testl  $0x8,(%rdx)
je     113e <I2CActiveOwnAddressGet+0x3e>
add    %edi,%ecx
mov    (%rcx),%eax
ret

LLVM IR (-O0):
define i32 @I2CActiveOwnAddressGet(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = add i32 %4, 208
%6 = zext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
%8 = load volatile i32, i32* %7
%9 = and i32 %8, 1
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %1
%12 = load i32, i32* %3
%13 = add i32 %12, 168
%14 = zext i32 %13 to i64
%15 = inttoptr i64 %14 to i32*
%16 = load volatile i32, i32* %15
store i32 %16, i32* %2
br label %63
17: ; preds = %1
%18 = load i32, i32* %3
%19 = add i32 %18, 208
%20 = zext i32 %19 to i64
%21 = inttoptr i64 %20 to i32*
%22 = load volatile i32, i32* %21
%23 = and i32 %22, 2
%24 = icmp ne i32 %23, 0
br i1 %24, label %25, label %31
25: ; preds = %17
%26 = load i32, i32* %3
%27 = add i32 %26, 196
%28 = zext i32 %27 to i64
%29 = inttoptr i64 %28 to i32*
%30 = load volatile i32, i32* %29
store i32 %30, i32* %2
br label %63
31: ; preds = %17
%32 = load i32, i32* %3
%33 = add i32 %32, 208
%34 = zext i32 %33 to i64
%35 = inttoptr i64 %34 to i32*
%36 = load volatile i32, i32* %35
%37 = and i32 %36, 4
%38 = icmp ne i32 %37, 0
br i1 %38, label %39, label %45
39: ; preds = %31
%40 = load i32, i32* %3
%41 = add i32 %40, 200
%42 = zext i32 %41 to i64
%43 = inttoptr i64 %42 to i32*
%44 = load volatile i32, i32* %43
store i32 %44, i32* %2
br label %63
45: ; preds = %31
%46 = load i32, i32* %3
%47 = add i32 %46, 208
%48 = zext i32 %47 to i64
%49 = inttoptr i64 %48 to i32*
%50 = load volatile i32, i32* %49
%51 = and i32 %50, 8
%52 = icmp ne i32 %51, 0
br i1 %52, label %53, label %59
53: ; preds = %45
%54 = load i32, i32* %3
%55 = add i32 %54, 204
%56 = zext i32 %55 to i64
%57 = inttoptr i64 %56 to i32*
%58 = load volatile i32, i32* %57
store i32 %58, i32* %2
br label %63
59: ; preds = %45
br label %60
60: ; preds = %59
br label %61
61: ; preds = %60
br label %62
62: ; preds = %61
store i32 0, i32* %2
br label %63
63: ; preds = %62, %53, %39, %25, %11
%64 = load i32, i32* %2
ret i32 %64
}

LLVM IR (-O2):
define i32 @I2CActiveOwnAddressGet(i32 %0) {
%2 = add i32 %0, 208
%3 = zext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = and i32 %5, 1
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %20
8: ; preds = %1
%9 = load volatile i32, i32* %4
%10 = and i32 %9, 2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %20
12: ; preds = %8
%13 = load volatile i32, i32* %4
%14 = and i32 %13, 4
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %20
16: ; preds = %12
%17 = load volatile i32, i32* %4
%18 = and i32 %17, 8
%19 = icmp eq i32 %18, 0
br i1 %19, label %26, label %20
20: ; preds = %16, %12, %8, %1
%21 = phi i32 [ 168, %1 ], [ 196, %8 ], [ 200, %12 ], [ 204, %16 ]
%22 = add i32 %21, %0
%23 = zext i32 %22 to i64
%24 = inttoptr i64 %23 to i32*
%25 = load volatile i32, i32* %24
br label %26
26: ; preds = %20, %16
%27 = phi i32 [ 0, %16 ], [ %25, %20 ]
ret i32 %27
}