int head_check(unsigned long head) {
  if ((head & 0xffe00000) != 0xffe00000)
    return 0;
  if (!((head >> 17) & 3))
    return 0;
  if (((head >> 12) & 0xf) == 0xf)
    return 0;
  if (((head >> 10) & 0x3) == 0x3)
    return 0;
  if ((head & 0xffff0000) == 0xfffe0000)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<head_check>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movabs $0xffe00000,%rax
and    -0x10(%rbp),%rax
mov    $0xffe00000,%ecx
cmp    %rcx,%rax
je     1130 <head_check+0x30>
movl   $0x0,-0x4(%rbp)
jmp    11c5 <head_check+0xc5>
mov    -0x10(%rbp),%rax
shr    $0x11,%rax
and    $0x3,%rax
cmp    $0x0,%rax
jne    1152 <head_check+0x52>
movl   $0x0,-0x4(%rbp)
jmp    11c5 <head_check+0xc5>
mov    -0x10(%rbp),%rax
shr    $0xc,%rax
and    $0xf,%rax
cmp    $0xf,%rax
jne    1174 <head_check+0x74>
movl   $0x0,-0x4(%rbp)
jmp    11c5 <head_check+0xc5>
mov    -0x10(%rbp),%rax
shr    $0xa,%rax
and    $0x3,%rax
cmp    $0x3,%rax
jne    1196 <head_check+0x96>
movl   $0x0,-0x4(%rbp)
jmp    11c5 <head_check+0xc5>
movabs $0xffff0000,%rax
and    -0x10(%rbp),%rax
mov    $0xfffe0000,%ecx
cmp    %rcx,%rax
jne    11be <head_check+0xbe>
movl   $0x0,-0x4(%rbp)
jmp    11c5 <head_check+0xc5>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<head_check>:
mov    %edi,%eax
and    $0xffe00000,%eax
mov    $0xffe00000,%ecx
cmp    %ecx,%eax
sete   %al
test   $0x60000,%edi
setne  %dl
and    %al,%dl
mov    %edi,%eax
not    %eax
test   $0xf000,%eax
setne  %sil
test   $0xc00,%eax
setne  %al
and    $0xffff0000,%edi
or     $0x1e0000,%rcx
cmp    %rcx,%rdi
setne  %cl
and    %sil,%al
and    %dl,%al
and    %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @head_check(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = and i64 %4, 4292870144
%6 = icmp ne i64 %5, 4292870144
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %32
8: ; preds = %1
%9 = load i64, i64* %3
%10 = lshr i64 %9, 17
%11 = and i64 %10, 3
%12 = icmp ne i64 %11, 0
br i1 %12, label %14, label %13
13: ; preds = %8
store i32 0, i32* %2
br label %32
14: ; preds = %8
%15 = load i64, i64* %3
%16 = lshr i64 %15, 12
%17 = and i64 %16, 15
%18 = icmp eq i64 %17, 15
br i1 %18, label %19, label %20
19: ; preds = %14
store i32 0, i32* %2
br label %32
20: ; preds = %14
%21 = load i64, i64* %3
%22 = lshr i64 %21, 10
%23 = and i64 %22, 3
%24 = icmp eq i64 %23, 3
br i1 %24, label %25, label %26
25: ; preds = %20
store i32 0, i32* %2
br label %32
26: ; preds = %20
%27 = load i64, i64* %3
%28 = and i64 %27, 4294901760
%29 = icmp eq i64 %28, 4294836224
br i1 %29, label %30, label %31
30: ; preds = %26
store i32 0, i32* %2
br label %32
31: ; preds = %26
store i32 1, i32* %2
br label %32
32: ; preds = %31, %30, %25, %19, %13, %7
%33 = load i32, i32* %2
ret i32 %33
}

LLVM IR (-O2):
define i32 @head_check(i64 %0) {
%2 = and i64 %0, 4292870144
%3 = icmp ne i64 %2, 4292870144
%4 = and i64 %0, 393216
%5 = icmp eq i64 %4, 0
%6 = or i1 %3, %5
%7 = and i64 %0, 61440
%8 = icmp eq i64 %7, 61440
%9 = or i1 %8, %6
%10 = and i64 %0, 3072
%11 = icmp eq i64 %10, 3072
%12 = or i1 %11, %9
%13 = and i64 %0, 4294901760
%14 = icmp ne i64 %13, 4294836224
%15 = xor i1 %12, true
%16 = and i1 %14, %15
%17 = zext i1 %16 to i32
ret i32 %17
}