#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ mips_ejtag_pracc(int);
int /*<<< orphan*/ mips_ejtag_setcp0reg(int, int);
void mips_ejtag_setreg(int regnum, int val) {
  if (regnum < 0 || regnum > 106)
    return;
  if (regnum >= 0 && regnum <= 31) {
    mips_ejtag_pracc(0x00000000);
    mips_ejtag_pracc(
        ((0x0F << 26) | ((regnum) << 16) | ((val >> 16) & 0xffff)));
    mips_ejtag_pracc(
        ((0x0D << 26) | ((regnum) << 21) | ((regnum) << 16) | (val & 0xFFFF)));
  } else if (regnum > 31 && regnum < 38) {
    switch (regnum) {
    case 32:
      mips_ejtag_setcp0reg(12, val);
      break;
    case 34:
    case 33:
      mips_ejtag_pracc(((0x408 << 20) | ((2) << 16) | ((31) << 11)));
      mips_ejtag_pracc(0x00000000);
      mips_ejtag_pracc(((0x0F << 26) | ((2) << 16) | ((val >> 16) & 0xFFFF)));
      mips_ejtag_pracc(
          ((0x0D << 26) | ((2) << 21) | ((2) << 16) | (val & 0xFFFF)));
      if (regnum == 34) {
        mips_ejtag_pracc((((2) << 11) | 0x11));
        mips_ejtag_pracc(0x00000000);
      } else {
        mips_ejtag_pracc((((2) << 11) | 0x13));
        mips_ejtag_pracc(0x00000000);
      }
      mips_ejtag_pracc(((0x400 << 20) | ((2) << 16) | ((31) << 11)));
      mips_ejtag_pracc(0x00000000);
      break;
    case 35:
      mips_ejtag_setcp0reg(8, val);
      break;
    case 36:
      mips_ejtag_setcp0reg(13, val);
      break;
    case 37:
      mips_ejtag_setcp0reg(24, val);
      break;
    }
  } else if (regnum >= 38 && regnum <= 72) {
    return;
  } else {
    mips_ejtag_setcp0reg(regnum - 74, val);
  }
}


x86 assembly (clang, -O0):
<mips_ejtag_setreg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     1142 <mips_ejtag_setreg+0x22>
cmpl   $0x6a,-0x4(%rbp)
jle    1147 <mips_ejtag_setreg+0x27>
jmp    12e1 <mips_ejtag_setreg+0x1c1>
cmpl   $0x0,-0x4(%rbp)
jl     11a8 <mips_ejtag_setreg+0x88>
cmpl   $0x1f,-0x4(%rbp)
jg     11a8 <mips_ejtag_setreg+0x88>
xor    %edi,%edi
call   1040 <mips_ejtag_pracc@plt>
mov    -0x4(%rbp),%edi
shl    $0x10,%edi
or     $0x3c000000,%edi
mov    -0x8(%rbp),%eax
sar    $0x10,%eax
and    $0xffff,%eax
or     %eax,%edi
call   1040 <mips_ejtag_pracc@plt>
mov    -0x4(%rbp),%edi
shl    $0x15,%edi
or     $0x34000000,%edi
mov    -0x4(%rbp),%eax
shl    $0x10,%eax
or     %eax,%edi
mov    -0x8(%rbp),%eax
and    $0xffff,%eax
or     %eax,%edi
call   1040 <mips_ejtag_pracc@plt>
jmp    12e1 <mips_ejtag_setreg+0x1c1>
cmpl   $0x1f,-0x4(%rbp)
jle    12b0 <mips_ejtag_setreg+0x190>
cmpl   $0x26,-0x4(%rbp)
jge    12b0 <mips_ejtag_setreg+0x190>
mov    -0x4(%rbp),%eax
add    $0xffffffe0,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x5,%eax
ja     12ab <mips_ejtag_setreg+0x18b>
mov    -0x10(%rbp),%rax
lea    0xe24(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x8(%rbp),%esi
mov    $0xc,%edi
call   1030 <mips_ejtag_setcp0reg@plt>
jmp    12ab <mips_ejtag_setreg+0x18b>
mov    $0x4082f800,%edi
call   1040 <mips_ejtag_pracc@plt>
xor    %edi,%edi
call   1040 <mips_ejtag_pracc@plt>
mov    -0x8(%rbp),%edi
sar    $0x10,%edi
and    $0xffff,%edi
or     $0x3c020000,%edi
call   1040 <mips_ejtag_pracc@plt>
mov    -0x8(%rbp),%edi
and    $0xffff,%edi
or     $0x34420000,%edi
call   1040 <mips_ejtag_pracc@plt>
cmpl   $0x22,-0x4(%rbp)
jne    1253 <mips_ejtag_setreg+0x133>
mov    $0x1011,%edi
call   1040 <mips_ejtag_pracc@plt>
xor    %edi,%edi
call   1040 <mips_ejtag_pracc@plt>
jmp    1264 <mips_ejtag_setreg+0x144>
mov    $0x1013,%edi
call   1040 <mips_ejtag_pracc@plt>
xor    %edi,%edi
call   1040 <mips_ejtag_pracc@plt>
mov    $0x4002f800,%edi
call   1040 <mips_ejtag_pracc@plt>
xor    %edi,%edi
call   1040 <mips_ejtag_pracc@plt>
jmp    12ab <mips_ejtag_setreg+0x18b>
mov    -0x8(%rbp),%esi
mov    $0x8,%edi
call   1030 <mips_ejtag_setcp0reg@plt>
jmp    12ab <mips_ejtag_setreg+0x18b>
mov    -0x8(%rbp),%esi
mov    $0xd,%edi
call   1030 <mips_ejtag_setcp0reg@plt>
jmp    12ab <mips_ejtag_setreg+0x18b>
mov    -0x8(%rbp),%esi
mov    $0x18,%edi
call   1030 <mips_ejtag_setcp0reg@plt>
jmp    12dc <mips_ejtag_setreg+0x1bc>
cmpl   $0x26,-0x4(%rbp)
jl     12c9 <mips_ejtag_setreg+0x1a9>
cmpl   $0x48,-0x4(%rbp)
jg     12c9 <mips_ejtag_setreg+0x1a9>
jmp    12e1 <mips_ejtag_setreg+0x1c1>
mov    -0x4(%rbp),%edi
sub    $0x4a,%edi
mov    -0x8(%rbp),%esi
call   1030 <mips_ejtag_setcp0reg@plt>
jmp    12dc <mips_ejtag_setreg+0x1bc>
jmp    12e1 <mips_ejtag_setreg+0x1c1>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mips_ejtag_setreg>:
push   %rbp
push   %r14
push   %rbx
cmp    $0x6a,%edi
jbe    112e <mips_ejtag_setreg+0xe>
pop    %rbx
pop    %r14
pop    %rbp
ret
mov    %esi,%r14d
mov    %edi,%ebx
cmp    $0x1f,%edi
ja     1170 <mips_ejtag_setreg+0x50>
xor    %edi,%edi
call   1040 <mips_ejtag_pracc@plt>
mov    %ebx,%ebp
shl    $0x10,%ebp
mov    %ebx,%edi
shld   $0x10,%r14d,%edi
or     $0x3c000000,%edi
call   1040 <mips_ejtag_pracc@plt>
shl    $0x15,%ebx
or     %ebp,%ebx
movzwl %r14w,%edi
or     %ebx,%edi
or     $0x34000000,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <mips_ejtag_pracc@plt>
cmp    $0x25,%ebx
ja     11ec <mips_ejtag_setreg+0xcc>
lea    -0x20(%rbx),%eax
cmp    $0x5,%eax
ja     1129 <mips_ejtag_setreg+0x9>
lea    0xe7c(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x4082f800,%edi
call   1040 <mips_ejtag_pracc@plt>
xor    %edi,%edi
call   1040 <mips_ejtag_pracc@plt>
mov    %r14d,%edi
shr    $0x10,%edi
or     $0x3c020000,%edi
call   1040 <mips_ejtag_pracc@plt>
movzwl %r14w,%edi
or     $0x34420000,%edi
call   1040 <mips_ejtag_pracc@plt>
xor    %eax,%eax
cmp    $0x22,%ebx
setne  %al
lea    (%rax,%rax,1),%edi
add    $0x1011,%edi
call   1040 <mips_ejtag_pracc@plt>
xor    %edi,%edi
call   1040 <mips_ejtag_pracc@plt>
mov    $0x4002f800,%edi
call   1040 <mips_ejtag_pracc@plt>
xor    %edi,%edi
jmp    1167 <mips_ejtag_setreg+0x47>
cmp    $0x49,%ebx
jb     1129 <mips_ejtag_setreg+0x9>
add    $0xffffffb6,%ebx
mov    %ebx,%edi
jmp    1216 <mips_ejtag_setreg+0xf6>
mov    $0xc,%edi
jmp    1216 <mips_ejtag_setreg+0xf6>
mov    $0x8,%edi
jmp    1216 <mips_ejtag_setreg+0xf6>
mov    $0xd,%edi
jmp    1216 <mips_ejtag_setreg+0xf6>
mov    $0x18,%edi
mov    %r14d,%esi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <mips_ejtag_setcp0reg@plt>

LLVM IR (-O0):
define void @mips_ejtag_setreg(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp sgt i32 %8, 106
br i1 %9, label %10, label %11
10: ; preds = %7, %2
br label %95
11: ; preds = %7
%12 = load i32, i32* %3
%13 = icmp sge i32 %12, 0
br i1 %13, label %14, label %37
14: ; preds = %11
%15 = load i32, i32* %3
%16 = icmp sle i32 %15, 31
br i1 %16, label %17, label %37
17: ; preds = %14
%18 = call i32 @mips_ejtag_pracc(i32 0)
%19 = load i32, i32* %3
%20 = shl i32 %19, 16
%21 = or i32 1006632960, %20
%22 = load i32, i32* %4
%23 = ashr i32 %22, 16
%24 = and i32 %23, 65535
%25 = or i32 %21, %24
%26 = call i32 @mips_ejtag_pracc(i32 %25)
%27 = load i32, i32* %3
%28 = shl i32 %27, 21
%29 = or i32 872415232, %28
%30 = load i32, i32* %3
%31 = shl i32 %30, 16
%32 = or i32 %29, %31
%33 = load i32, i32* %4
%34 = and i32 %33, 65535
%35 = or i32 %32, %34
%36 = call i32 @mips_ejtag_pracc(i32 %35)
br label %95
37: ; preds = %14, %11
%38 = load i32, i32* %3
%39 = icmp sgt i32 %38, 31
br i1 %39, label %40, label %81
40: ; preds = %37
%41 = load i32, i32* %3
%42 = icmp slt i32 %41, 38
br i1 %42, label %43, label %81
43: ; preds = %40
%44 = load i32, i32* %3
switch i32 %44, label %80 [
i32 32, label %45
i32 34, label %48
i32 33, label %48
i32 35, label %71
i32 36, label %74
i32 37, label %77
]
45: ; preds = %43
%46 = load i32, i32* %4
%47 = call i32 @mips_ejtag_setcp0reg(i32 12, i32 %46)
br label %80
48: ; preds = %43, %43
%49 = call i32 @mips_ejtag_pracc(i32 1082324992)
%50 = call i32 @mips_ejtag_pracc(i32 0)
%51 = load i32, i32* %4
%52 = ashr i32 %51, 16
%53 = and i32 %52, 65535
%54 = or i32 1006764032, %53
%55 = call i32 @mips_ejtag_pracc(i32 %54)
%56 = load i32, i32* %4
%57 = and i32 %56, 65535
%58 = or i32 876740608, %57
%59 = call i32 @mips_ejtag_pracc(i32 %58)
%60 = load i32, i32* %3
%61 = icmp eq i32 %60, 34
br i1 %61, label %62, label %65
62: ; preds = %48
%63 = call i32 @mips_ejtag_pracc(i32 4113)
%64 = call i32 @mips_ejtag_pracc(i32 0)
br label %68
65: ; preds = %48
%66 = call i32 @mips_ejtag_pracc(i32 4115)
%67 = call i32 @mips_ejtag_pracc(i32 0)
br label %68
68: ; preds = %65, %62
%69 = call i32 @mips_ejtag_pracc(i32 1073936384)
%70 = call i32 @mips_ejtag_pracc(i32 0)
br label %80
71: ; preds = %43
%72 = load i32, i32* %4
%73 = call i32 @mips_ejtag_setcp0reg(i32 8, i32 %72)
br label %80
74: ; preds = %43
%75 = load i32, i32* %4
%76 = call i32 @mips_ejtag_setcp0reg(i32 13, i32 %75)
br label %80
77: ; preds = %43
%78 = load i32, i32* %4
%79 = call i32 @mips_ejtag_setcp0reg(i32 24, i32 %78)
br label %80
80: ; preds = %43, %77, %74, %71, %68, %45
br label %94
81: ; preds = %40, %37
%82 = load i32, i32* %3
%83 = icmp sge i32 %82, 38
br i1 %83, label %84, label %88
84: ; preds = %81
%85 = load i32, i32* %3
%86 = icmp sle i32 %85, 72
br i1 %86, label %87, label %88
87: ; preds = %84
br label %95
88: ; preds = %84, %81
%89 = load i32, i32* %3
%90 = sub nsw i32 %89, 74
%91 = load i32, i32* %4
%92 = call i32 @mips_ejtag_setcp0reg(i32 %90, i32 %91)
br label %93
93: ; preds = %88
br label %94
94: ; preds = %93, %80
br label %95
95: ; preds = %10, %87, %94, %17
ret void
}

LLVM IR (-O2):
define void @mips_ejtag_setreg(i32 %0, i32 %1) {
%3 = icmp ugt i32 %0, 106
br i1 %3, label %50, label %4
4: ; preds = %2
%5 = icmp ult i32 %0, 32
br i1 %5, label %6, label %19
6: ; preds = %4
%7 = tail call i32 @mips_ejtag_pracc(i32 0)
%8 = shl nuw nsw i32 %0, 16
%9 = lshr i32 %1, 16
%10 = or i32 %8, %9
%11 = or i32 %10, 1006632960
%12 = tail call i32 @mips_ejtag_pracc(i32 %11)
%13 = shl nuw nsw i32 %0, 21
%14 = and i32 %1, 65535
%15 = or i32 %8, %13
%16 = or i32 %15, %14
%17 = or i32 %16, 872415232
%18 = tail call i32 @mips_ejtag_pracc(i32 %17)
br label %50
19: ; preds = %4
%20 = icmp ult i32 %0, 38
br i1 %20, label %21, label %45
21: ; preds = %19
switch i32 %0, label %50 [
i32 32, label %22
i32 34, label %24
i32 33, label %24
i32 35, label %39
i32 36, label %41
i32 37, label %43
]
22: ; preds = %21
%23 = tail call i32 @mips_ejtag_setcp0reg(i32 12, i32 %1)
br label %50
24: ; preds = %21, %21
%25 = tail call i32 @mips_ejtag_pracc(i32 1082324992)
%26 = tail call i32 @mips_ejtag_pracc(i32 0)
%27 = lshr i32 %1, 16
%28 = or i32 %27, 1006764032
%29 = tail call i32 @mips_ejtag_pracc(i32 %28)
%30 = and i32 %1, 65535
%31 = or i32 %30, 876740608
%32 = tail call i32 @mips_ejtag_pracc(i32 %31)
%33 = icmp eq i32 %0, 34
%34 = select i1 %33, i32 4113, i32 4115
%35 = tail call i32 @mips_ejtag_pracc(i32 %34)
%36 = tail call i32 @mips_ejtag_pracc(i32 0)
%37 = tail call i32 @mips_ejtag_pracc(i32 1073936384)
%38 = tail call i32 @mips_ejtag_pracc(i32 0)
br label %50
39: ; preds = %21
%40 = tail call i32 @mips_ejtag_setcp0reg(i32 8, i32 %1)
br label %50
41: ; preds = %21
%42 = tail call i32 @mips_ejtag_setcp0reg(i32 13, i32 %1)
br label %50
43: ; preds = %21
%44 = tail call i32 @mips_ejtag_setcp0reg(i32 24, i32 %1)
br label %50
45: ; preds = %19
%46 = icmp ult i32 %0, 73
br i1 %46, label %50, label %47
47: ; preds = %45
%48 = add nsw i32 %0, -74
%49 = tail call i32 @mips_ejtag_setcp0reg(i32 %48, i32 %1)
br label %50
50: ; preds = %47, %21, %43, %41, %39, %24, %22, %45, %2, %6
ret void
}