void ADCIntEnable(unsigned long ulBase, unsigned long ulChannel,
                  unsigned long ulIntFlags) {
  unsigned long ulOffset;
  unsigned long ulDmaMsk;
  if (ulIntFlags & 0x00000010) {
    ulDmaMsk = (ulChannel == 0x00000000)   ? 0x00001000
               : (ulChannel == 0x00000008) ? 0x00002000
               : (ulChannel == 0x00000010) ? 0x00004000
                                           : 0x00008000;
    (*((volatile unsigned long *)(0x44026000 + 0x00000094))) = ulDmaMsk;
  }
  ulIntFlags = ulIntFlags & 0x0F;
  ulOffset = 0x00000024 + ulChannel;
  (*((volatile unsigned long *)(ulBase + ulOffset))) |= (ulIntFlags & 0xf);
}


x86 assembly (clang, -O0):
<ADCIntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
and    $0x10,%rax
cmp    $0x0,%rax
je     1185 <ADCIntEnable+0x85>
cmpq   $0x0,-0x10(%rbp)
jne    113a <ADCIntEnable+0x3a>
mov    $0x1000,%eax
mov    %eax,-0x2c(%rbp)
jmp    1170 <ADCIntEnable+0x70>
cmpq   $0x8,-0x10(%rbp)
jne    1152 <ADCIntEnable+0x52>
mov    $0x2000,%eax
mov    %eax,-0x30(%rbp)
jmp    116a <ADCIntEnable+0x6a>
mov    -0x10(%rbp),%rdx
mov    $0x8000,%eax
mov    $0x4000,%ecx
cmp    $0x10,%rdx
cmove  %ecx,%eax
mov    %eax,-0x30(%rbp)
mov    -0x30(%rbp),%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
cltq
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rcx
mov    $0x44026094,%eax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rax
and    $0xf,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
add    $0x24,%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdx
and    $0xf,%rdx
mov    -0x8(%rbp),%rax
add    -0x20(%rbp),%rax
mov    (%rax),%rcx
or     %rdx,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCIntEnable>:
test   $0x10,%dl
je     1139 <ADCIntEnable+0x39>
test   %rsi,%rsi
je     1117 <ADCIntEnable+0x17>
cmp    $0x8,%rsi
jne    111e <ADCIntEnable+0x1e>
mov    $0x2000,%eax
jmp    1131 <ADCIntEnable+0x31>
mov    $0x1000,%eax
jmp    1131 <ADCIntEnable+0x31>
xor    %eax,%eax
cmp    $0x10,%rsi
setne  %al
shl    $0xe,%rax
add    $0x4000,%rax
mov    %rax,0x44026094
44
and    $0xf,%edx
or     %rdx,0x24(%rdi,%rsi,1)
ret

LLVM IR (-O0):
define void @ADCIntEnable(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%9 = load i64, i64* %6
%10 = and i64 %9, 16
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %31
12: ; preds = %3
%13 = load i64, i64* %5
%14 = icmp eq i64 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %12
br label %27
16: ; preds = %12
%17 = load i64, i64* %5
%18 = icmp eq i64 %17, 8
br i1 %18, label %19, label %20
19: ; preds = %16
br label %25
20: ; preds = %16
%21 = load i64, i64* %5
%22 = icmp eq i64 %21, 16
%23 = zext i1 %22 to i64
%24 = select i1 %22, i32 16384, i32 32768
br label %25
25: ; preds = %20, %19
%26 = phi i32 [ 8192, %19 ], [ %24, %20 ]
br label %27
27: ; preds = %25, %15
%28 = phi i32 [ 4096, %15 ], [ %26, %25 ]
%29 = sext i32 %28 to i64
store i64 %29, i64* %8
%30 = load i64, i64* %8
store volatile i64 %30, i64* inttoptr (i64 1141006484 to i64*)
br label %31
31: ; preds = %27, %3
%32 = load i64, i64* %6
%33 = and i64 %32, 15
store i64 %33, i64* %6
%34 = load i64, i64* %5
%35 = add i64 36, %34
store i64 %35, i64* %7
%36 = load i64, i64* %6
%37 = and i64 %36, 15
%38 = load i64, i64* %4
%39 = load i64, i64* %7
%40 = add i64 %38, %39
%41 = inttoptr i64 %40 to i64*
%42 = load volatile i64, i64* %41
%43 = or i64 %42, %37
store volatile i64 %43, i64* %41
ret void
}

LLVM IR (-O2):
define void @ADCIntEnable(i64 %0, i64 %1, i64 %2) {
%4 = and i64 %2, 16
%5 = icmp eq i64 %4, 0
br i1 %5, label %13, label %6
6: ; preds = %3
switch i64 %1, label %7 [
i64 0, label %11
i64 8, label %10
]
7: ; preds = %6
%8 = icmp eq i64 %1, 16
%9 = select i1 %8, i64 16384, i64 32768
br label %11
10: ; preds = %6
br label %11
11: ; preds = %6, %10, %7
%12 = phi i64 [ 4096, %6 ], [ %9, %7 ], [ 8192, %10 ]
store volatile i64 %12, i64* inttoptr (i64 1141006484 to i64*)
br label %13
13: ; preds = %11, %3
%14 = and i64 %2, 15
%15 = add i64 %0, 36
%16 = add i64 %15, %1
%17 = inttoptr i64 %16 to i64*
%18 = load volatile i64, i64* %17
%19 = or i64 %18, %14
store volatile i64 %19, i64* %17
ret void
}