xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ XModifierKeymap;
typedef scalar_t__ KeyCode;

/* Variables and functions */
int /*<<< orphan*/ *XDeleteModifiermapEntry(int /*<<< orphan*/ *, scalar_t__,
                                            int);
int RemoveModifier(XModifierKeymap **mapp, KeyCode keycode, int modifier) {
  if (keycode) {
    *mapp = XDeleteModifiermapEntry(*mapp, keycode, modifier);
    return (0);
  } else {
    return (-1);
  }
}


x86 assembly (clang, -O0):
<RemoveModifier>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1157 <RemoveModifier+0x47>
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <XDeleteModifiermapEntry@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x0,-0x4(%rbp)
jmp    115e <RemoveModifier+0x4e>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RemoveModifier>:
test   %rsi,%rsi
je     1128 <RemoveModifier+0x18>
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <XDeleteModifiermapEntry@plt>
mov    %rax,(%rbx)
xor    %eax,%eax
pop    %rbx
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @RemoveModifier(i32** %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32**
%6 = alloca i64
%7 = alloca i32
store i32** %0, i32*** %5
store i64 %1, i64* %6
store i32 %2, i32* %7
%8 = load i64, i64* %6
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %3
%11 = load i32**, i32*** %5
%12 = load i32*, i32** %11
%13 = load i64, i64* %6
%14 = load i32, i32* %7
%15 = call i32* @XDeleteModifiermapEntry(i32* %12, i64 %13, i32 %14)
%16 = load i32**, i32*** %5
store i32* %15, i32** %16
store i32 0, i32* %4
br label %18
17: ; preds = %3
store i32 -1, i32* %4
br label %18
18: ; preds = %17, %10
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
define i32 @RemoveModifier(i32** nocapture %0, i64 %1, i32 %2) {
%4 = icmp eq i64 %1, 0
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = load i32*, i32** %0
%7 = tail call i32* @XDeleteModifiermapEntry(i32* %6, i64 %1, i32 %2)
store i32* %7, i32** %0
br label %8
8: ; preds = %3, %5
%9 = phi i32 [ 0, %5 ], [ -1, %3 ]
ret i32 %9
}
/* Type definitions */
typedef int uint8_t;
typedef scalar_t__ uint16_t;

/* Variables and functions */
scalar_t__ UINT16_MAX;
uint8_t modbusCheckRangeU16(uint16_t index, uint16_t count) {
  return index > UINT16_MAX - count + 1;
}


x86 assembly (clang, -O0):
<modbusCheckRangeU16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2ec9(%rip),%rcx
mov    (%rcx),%rcx
sub    -0x10(%rbp),%rcx
add    $0x1,%rcx
cmp    %rcx,%rax
setg   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<modbusCheckRangeU16>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%rcx
sub    %rsi,%rcx
add    $0x1,%rcx
xor    %eax,%eax
cmp    %rdi,%rcx
setl   %al
ret

LLVM IR (-O0):
@UINT16_MAX = global i64 0
define i32 @modbusCheckRangeU16(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* @UINT16_MAX
%7 = load i64, i64* %4
%8 = sub nsw i64 %6, %7
%9 = add nsw i64 %8, 1
%10 = icmp sgt i64 %5, %9
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
@UINT16_MAX = global i64 0
define i32 @modbusCheckRangeU16(i64 %0, i64 %1) {
%3 = load i64, i64* @UINT16_MAX
%4 = sub i64 1, %1
%5 = add i64 %4, %3
%6 = icmp slt i64 %5, %0
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int rand();
int choose(int num) { return (rand() % num) + 1; }


x86 assembly (clang, -O0):
<choose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cltd
idivl  -0x4(%rbp)
mov    %edx,%eax
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<choose>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %ebx
lea    0x1(%rdx),%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @choose(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @rand()
%4 = load i32, i32* %2
%5 = srem i32 %3, %4
%6 = add nsw i32 %5, 1
ret i32 %6
}

LLVM IR (-O2):
define i32 @choose(i32 %0) {
%2 = tail call i32 (...) @rand()
%3 = srem i32 %2, %0
%4 = add nsw i32 %3, 1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stdout;
void usage() {
  fprintf(stdout,
          "usage: bmphide in_image method [data_to_hide] \n\t in_image: image "
          "required to hide/extract\n\t method: --hide,--extract\n\t "
          "data_to_hide: optional if --hide is setted\n\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [164 x i8] c"usage: bmphide in_image method [data_to_hide] \0A\09 in_image: image required to hide/extract\0A\09 method: --hide,--extract\0A\09 data_to_hide: optional if --hide is setted\0A\0A\00"
define void @usage() {
%1 = load i32, i32* @stdout
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([164 x i8], [164 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [164 x i8] c"usage: bmphide in_image method [data_to_hide] \0A\09 in_image: image required to hide/extract\0A\09 method: --hide,--extract\0A\09 data_to_hide: optional if --hide is setted\0A\0A\00"
define void @usage() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([164 x i8], [164 x i8]* @.str, i64 0, i64 0))
ret void
}
void g_date_get_sunday_weeks_in_year() {}


x86 assembly (clang, -O0):
<g_date_get_sunday_weeks_in_year>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_date_get_sunday_weeks_in_year>:
ret

LLVM IR (-O0):
define void @g_date_get_sunday_weeks_in_year() {
ret void
}

LLVM IR (-O2):
define void @g_date_get_sunday_weeks_in_year() {
ret void
}
/* Variables and functions */
float acos(int /*<<< orphan*/);
int /*<<< orphan*/ glmDotProduct2f(float const *, float const *);
float glmComputeNormalizedVectorAngle2fRad(const float v1[2],
                                           const float v2[2]) {
  return acos(glmDotProduct2f(v1, v2));
}


x86 assembly (clang, -O0):
<glmComputeNormalizedVectorAngle2fRad>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <glmDotProduct2f@plt>
mov    %eax,%edi
call   1030 <acos@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmComputeNormalizedVectorAngle2fRad>:
push   %rax
call   1040 <glmDotProduct2f@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <acos@plt>

LLVM IR (-O0):
define float @glmComputeNormalizedVectorAngle2fRad(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = load float*, float** %4
%7 = call i32 @glmDotProduct2f(float* %5, float* %6)
%8 = call float @acos(i32 %7)
ret float %8
}

LLVM IR (-O2):
define float @glmComputeNormalizedVectorAngle2fRad(float* %0, float* %1) {
%3 = tail call i32 @glmDotProduct2f(float* %0, float* %1)
%4 = tail call float @acos(i32 %3)
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ srand(int);
void InitializeRandoms() { srand(4711); }


x86 assembly (clang, -O0):
<InitializeRandoms>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1267,%edi
call   1030 <srand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<InitializeRandoms>:
mov    $0x1267,%edi
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @InitializeRandoms() {
%1 = call i32 @srand(i32 4711)
ret void
}

LLVM IR (-O2):
define void @InitializeRandoms() {
%1 = tail call i32 @srand(i32 4711)
ret void
}
void sync_opts(struct opt *opts) {}


x86 assembly (clang, -O0):
<sync_opts>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sync_opts>:
ret

LLVM IR (-O0):
%struct.opt = type opaque
define void @sync_opts(%struct.opt* %0) {
%2 = alloca %struct.opt*
store %struct.opt* %0, %struct.opt** %2
ret void
}

LLVM IR (-O2):
%struct.opt = type opaque
define void @sync_opts(%struct.opt* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void *malloc(int);
int utl_rand_memory(int range) {
  void *ptr;
  int rtn;
  ptr = malloc(1);
  rtn = (int)(long)ptr % range;
  free(ptr);
  return (rtn);
}


x86 assembly (clang, -O0):
<utl_rand_memory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cltd
idivl  -0x4(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<utl_rand_memory>:
push   %rbx
mov    %edi,%ebx
mov    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,%rdi
cltd
idiv   %ebx
mov    %edx,%ebx
call   1030 <free@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @utl_rand_memory(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i32 %0, i32* %2
%5 = call i8* @malloc(i32 1)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = ptrtoint i8* %6 to i64
%8 = trunc i64 %7 to i32
%9 = load i32, i32* %2
%10 = srem i32 %8, %9
store i32 %10, i32* %4
%11 = load i8*, i8** %3
%12 = call i32 @free(i8* %11)
%13 = load i32, i32* %4
ret i32 %13
}

LLVM IR (-O2):
define i32 @utl_rand_memory(i32 %0) {
%2 = tail call dereferenceable_or_null(1) i8* @malloc(i32 1)
%3 = ptrtoint i8* %2 to i64
%4 = trunc i64 %3 to i32
%5 = srem i32 %4, %0
%6 = tail call i32 @free(i8* %2)
ret i32 %5
}
void *rpc_th_null_1_svc(void *argp, struct svc_req *rqstp) {
  static char *result;
  return (void *)&result;
}


x86 assembly (clang, -O0):
<rpc_th_null_1_svc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0x2f15(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpc_th_null_1_svc>:
lea    0x2f21(%rip),%rax
ret

LLVM IR (-O0):
%struct.svc_req = type opaque
@rpc_th_null_1_svc.result = internal global i8* null
define i8* @rpc_th_null_1_svc(i8* %0, %struct.svc_req* %1) {
%3 = alloca i8*
%4 = alloca %struct.svc_req*
store i8* %0, i8** %3
store %struct.svc_req* %1, %struct.svc_req** %4
ret i8* bitcast (i8** @rpc_th_null_1_svc.result to i8*)
}

LLVM IR (-O2):
%struct.svc_req = type opaque
@rpc_th_null_1_svc.result = internal global i8* null
define i8* @rpc_th_null_1_svc(i8* nocapture readnone %0, %struct.svc_req* nocapture readnone %1) {
ret i8* bitcast (i8** @rpc_th_null_1_svc.result to i8*)
}
/* Variables and functions */
int cfg_processor_get_addr(char *, char *);
int cfg_timer_a_get_int_a0_addr(void) {
  return cfg_processor_get_addr("timera", "inta0");
}


x86 assembly (clang, -O0):
<cfg_timer_a_get_int_a0_addr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee5(%rip),%rsi
call   1030 <cfg_processor_get_addr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfg_timer_a_get_int_a0_addr>:
lea    0xee9(%rip),%rdi
lea    0xee9(%rip),%rsi
jmp    1030 <cfg_processor_get_addr@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"timera\00"
@.str.1 = [6 x i8] c"inta0\00"
define i32 @cfg_timer_a_get_int_a0_addr() {
%1 = call i32 @cfg_processor_get_addr(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [7 x i8] c"timera\00"
@.str.1 = [6 x i8] c"inta0\00"
define i32 @cfg_timer_a_get_int_a0_addr() {
%1 = tail call i32 @cfg_processor_get_addr(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret i32 %1
}
int opposite(int side) {
  switch (side) {
  case 0:
    return 5;
  case 1:
    return 3;
  case 2:
    return 4;
  case 3:
    return 1;
  case 4:
    return 2;
  case 5:
    return 0;
  }
}


x86 assembly (clang, -O0):
<opposite>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %rax,-0x10(%rbp)
sub    $0x5,%rax
ja     116f <opposite+0x6f>
mov    -0x10(%rbp),%rax
lea    0xedd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x5,-0x4(%rbp)
jmp    116f <opposite+0x6f>
movl   $0x3,-0x4(%rbp)
jmp    116f <opposite+0x6f>
movl   $0x4,-0x4(%rbp)
jmp    116f <opposite+0x6f>
movl   $0x1,-0x4(%rbp)
jmp    116f <opposite+0x6f>
movl   $0x2,-0x4(%rbp)
jmp    116f <opposite+0x6f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<opposite>:
add    $0xffffffff,%edi
mov    $0x5,%eax
cmp    $0x4,%edi
ja     111a <opposite+0x1a>
movslq %edi,%rax
lea    0xee9(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @opposite(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %11 [
i32 0, label %5
i32 1, label %6
i32 2, label %7
i32 3, label %8
i32 4, label %9
i32 5, label %10
]
5: ; preds = %1
store i32 5, i32* %2
br label %11
6: ; preds = %1
store i32 3, i32* %2
br label %11
7: ; preds = %1
store i32 4, i32* %2
br label %11
8: ; preds = %1
store i32 1, i32* %2
br label %11
9: ; preds = %1
store i32 2, i32* %2
br label %11
10: ; preds = %1
store i32 0, i32* %2
br label %11
11: ; preds = %5, %6, %7, %8, %9, %10, %1
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
@switch.table.opposite = [5 x i32] [i32 3, i32 4, i32 1, i32 2, i32 0]
define i32 @opposite(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 5
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [5 x i32], [5 x i32]* @switch.table.opposite, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 5, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ UI_PlayerSettingsMenu();
void UI_SPLevelMenu_PlayerEvent(void *ptr, int notification) {
  if (notification != 3) {
    return;
  }
  UI_PlayerSettingsMenu();
}


x86 assembly (clang, -O0):
<UI_SPLevelMenu_PlayerEvent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x3,-0xc(%rbp)
je     112e <UI_SPLevelMenu_PlayerEvent+0x1e>
jmp    1135 <UI_SPLevelMenu_PlayerEvent+0x25>
mov    $0x0,%al
call   1030 <UI_PlayerSettingsMenu@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UI_SPLevelMenu_PlayerEvent>:
cmp    $0x3,%esi
jne    111c <UI_SPLevelMenu_PlayerEvent+0xc>
xor    %eax,%eax
jmp    1030 <UI_PlayerSettingsMenu@plt>
ret

LLVM IR (-O0):
define void @UI_SPLevelMenu_PlayerEvent(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 3
br i1 %6, label %7, label %8
7: ; preds = %2
br label %10
8: ; preds = %2
%9 = call i32 (...) @UI_PlayerSettingsMenu()
br label %10
10: ; preds = %8, %7
ret void
}

LLVM IR (-O2):
define void @UI_SPLevelMenu_PlayerEvent(i8* nocapture readnone %0, i32 %1) {
%3 = icmp eq i32 %1, 3
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 (...) @UI_PlayerSettingsMenu()
br label %6
6: ; preds = %2, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char *);
char *strncat(char *, char *, int /*<<< orphan*/);
void addstr(char *dist, char *src) { dist = strncat(dist, src, strlen(src)); }


x86 assembly (clang, -O0):
<addstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1040 <strncat@plt>
mov    %rax,-0x8(%rbp)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<addstr>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <strncat@plt>

LLVM IR (-O0):
define void @addstr(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i8* @strncat(i8* %5, i8* %6, i32 %8)
store i8* %9, i8** %3
ret void
}

LLVM IR (-O2):
define void @addstr(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i8* @strncat(i8* %0, i8* %1, i32 %3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
uint8_t mul01(uint8_t v) { return v; }


x86 assembly (clang, -O0):
<mul01>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mul01>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @mul01(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @mul01(i32 returned %0) {
ret i32 %0
}
unsigned invert(unsigned x, unsigned p, unsigned n) {
  return x ^ ((~(~0 << n)) << (p - n));
}


x86 assembly (clang, -O0):
<invert>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0xc(%rbp),%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
xor    $0xffffffff,%edx
mov    -0x8(%rbp),%ecx
sub    -0xc(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<invert>:
mov    %edx,%ecx
mov    $0xffffffff,%eax
shl    %cl,%eax
not    %eax
sub    %edx,%esi
mov    %esi,%ecx
shl    %cl,%eax
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @invert(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %6
%9 = shl i32 -1, %8
%10 = xor i32 %9, -1
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = sub i32 %11, %12
%14 = shl i32 %10, %13
%15 = xor i32 %7, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @invert(i32 %0, i32 %1, i32 %2) {
%4 = shl nsw i32 -1, %2
%5 = xor i32 %4, -1
%6 = sub i32 %1, %2
%7 = shl i32 %5, %6
%8 = xor i32 %7, %0
ret i32 %8
}
/* Variables and functions */
double _f(double);
double difm1(double x, double h) {
  double f1;
  f1 = _f(x + h) - _f(x - h);
  return 0.5 * f1 / h;
}


x86 assembly (clang, -O0):
<difm1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
call   1030 <_f@plt>
movsd  %xmm0,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
call   1030 <_f@plt>
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xea2(%rip),%xmm0
mulsd  -0x18(%rbp),%xmm0
divsd  -0x10(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<difm1>:
sub    $0x18,%rsp
movsd  %xmm1,(%rsp)
movsd  %xmm0,0x8(%rsp)
addsd  %xmm1,%xmm0
call   1030 <_f@plt>
movsd  %xmm0,0x10(%rsp)
movsd  0x8(%rsp),%xmm0
subsd  (%rsp),%xmm0
call   1030 <_f@plt>
movsd  0x10(%rsp),%xmm1
subsd  %xmm0,%xmm1
mulsd  0xeb0(%rip),%xmm1
divsd  (%rsp),%xmm1
movapd %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @difm1(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %3
%7 = load double, double* %4
%8 = fadd double %6, %7
%9 = call double @_f(double %8)
%10 = load double, double* %3
%11 = load double, double* %4
%12 = fsub double %10, %11
%13 = call double @_f(double %12)
%14 = fsub double %9, %13
store double %14, double* %5
%15 = load double, double* %5
%16 = fmul double 5.000000e-01, %15
%17 = load double, double* %4
%18 = fdiv double %16, %17
ret double %18
}

LLVM IR (-O2):
define double @difm1(double %0, double %1) {
%3 = fadd double %0, %1
%4 = tail call double @_f(double %3)
%5 = fsub double %0, %1
%6 = tail call double @_f(double %5)
%7 = fsub double %4, %6
%8 = fmul double %7, 5.000000e-01
%9 = fdiv double %8, %1
ret double %9
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ atoi(char const *);
int32_t conv_dword(const char *data) { return atoi(data); }


x86 assembly (clang, -O0):
<conv_dword>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <atoi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<conv_dword>:
jmp    1030 <atoi@plt>

LLVM IR (-O0):
define i32 @conv_dword(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @atoi(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @conv_dword(i8* nocapture %0) {
%2 = tail call i32 @atoi(i8* %0)
ret i32 %2
}
/* Variables and functions */
int log(int);
int berechne_laufzeit_annuitaetendarlehen(double tilgungssatz,
                                          double zinssatz) {
  int laufzeit = log(1 + zinssatz / tilgungssatz) / log(1 + zinssatz);
  return laufzeit;
}


x86 assembly (clang, -O0):
<berechne_laufzeit_annuitaetendarlehen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm1
divsd  -0x8(%rbp),%xmm1
movsd  0xecc(%rip),%xmm0
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <log@plt>
mov    %eax,-0x18(%rbp)
movsd  0xeb4(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
cvttsd2si %xmm0,%edi
call   1030 <log@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<berechne_laufzeit_annuitaetendarlehen>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm1,0x8(%rsp)
movapd %xmm1,%xmm2
divsd  %xmm0,%xmm2
addsd  0xed5(%rip),%xmm2
cvttsd2si %xmm2,%edi
call   1030 <log@plt>
mov    %eax,%ebx
movsd  0x8(%rsp),%xmm0
addsd  0xebc(%rip),%xmm0
cvttsd2si %xmm0,%edi
call   1030 <log@plt>
mov    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @berechne_laufzeit_annuitaetendarlehen(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca i32
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %4
%7 = load double, double* %3
%8 = fdiv double %6, %7
%9 = fadd double 1.000000e+00, %8
%10 = fptosi double %9 to i32
%11 = call i32 @log(i32 %10)
%12 = load double, double* %4
%13 = fadd double 1.000000e+00, %12
%14 = fptosi double %13 to i32
%15 = call i32 @log(i32 %14)
%16 = sdiv i32 %11, %15
store i32 %16, i32* %5
%17 = load i32, i32* %5
ret i32 %17
}

LLVM IR (-O2):
define i32 @berechne_laufzeit_annuitaetendarlehen(double %0, double %1) {
%3 = fdiv double %1, %0
%4 = fadd double %3, 1.000000e+00
%5 = fptosi double %4 to i32
%6 = tail call i32 @log(i32 %5)
%7 = fadd double %1, 1.000000e+00
%8 = fptosi double %7 to i32
%9 = tail call i32 @log(i32 %8)
%10 = sdiv i32 %6, %9
ret i32 %10
}
/* Variables and functions */
int int_endian_swap(int);
int /*<<< orphan*/ write(int, int *, int);
void write_endian_swap_int(int socket, int num) {
  int len_for_send = int_endian_swap(num);
  write(socket, &(len_for_send), 4);
}


x86 assembly (clang, -O0):
<write_endian_swap_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <int_endian_swap@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
lea    -0xc(%rbp),%rsi
mov    $0x4,%edx
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_endian_swap_int>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
mov    %esi,%edi
call   1040 <int_endian_swap@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rsi
mov    %ebx,%edi
mov    $0x4,%edx
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @write_endian_swap_int(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = call i32 @int_endian_swap(i32 %6)
store i32 %7, i32* %5
%8 = load i32, i32* %3
%9 = call i32 @write(i32 %8, i32* %5, i32 4)
ret void
}

LLVM IR (-O2):
define void @write_endian_swap_int(i32 %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = tail call i32 @int_endian_swap(i32 %1)
store i32 %5, i32* %3
%6 = call i32 @write(i32 %0, i32* %3, i32 4)
ret void
}
/* Variables and functions */
int fabs(double);
int /*<<< orphan*/ isfinite(double);
int equal(double a, double b) {
  if (!isfinite(a) || !isfinite(b))
    return 0;
  return fabs(a - b) < 1e-5;
}


x86 assembly (clang, -O0):
<equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1040 <isfinite@plt>
cmp    $0x0,%eax
je     1158 <equal+0x38>
movsd  -0x18(%rbp),%xmm0
call   1040 <isfinite@plt>
cmp    $0x0,%eax
jne    1164 <equal+0x44>
movl   $0x0,-0x4(%rbp)
jmp    118e <equal+0x6e>
movsd  -0x10(%rbp),%xmm0
subsd  -0x18(%rbp),%xmm0
call   1030 <fabs@plt>
cvtsi2sd %eax,%xmm1
movsd  0xe81(%rip),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<equal>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm1,(%rsp)
movsd  %xmm0,0x8(%rsp)
call   1040 <isfinite@plt>
xor    %ebx,%ebx
test   %eax,%eax
je     1160 <equal+0x40>
movsd  (%rsp),%xmm0
call   1040 <isfinite@plt>
test   %eax,%eax
je     1160 <equal+0x40>
movsd  0x8(%rsp),%xmm0
subsd  (%rsp),%xmm0
call   1030 <fabs@plt>
xor    %ebx,%ebx
test   %eax,%eax
setle  %bl
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @equal(double %0, double %1) {
%3 = alloca i32
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %4
%7 = call i32 @isfinite(double %6)
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load double, double* %5
%11 = call i32 @isfinite(double %10)
%12 = icmp ne i32 %11, 0
br i1 %12, label %14, label %13
13: ; preds = %9, %2
store i32 0, i32* %3
br label %22
14: ; preds = %9
%15 = load double, double* %4
%16 = load double, double* %5
%17 = fsub double %15, %16
%18 = call i32 @fabs(double %17)
%19 = sitofp i32 %18 to double
%20 = fcmp olt double %19, 1.000000e-05
%21 = zext i1 %20 to i32
store i32 %21, i32* %3
br label %22
22: ; preds = %14, %13
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @equal(double %0, double %1) {
%3 = tail call i32 @isfinite(double %0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2
%6 = tail call i32 @isfinite(double %1)
%7 = icmp eq i32 %6, 0
br i1 %7, label %13, label %8
8: ; preds = %5
%9 = fsub double %0, %1
%10 = tail call i32 @fabs(double %9)
%11 = icmp slt i32 %10, 1
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %2, %5, %8
%14 = phi i32 [ %12, %8 ], [ 0, %5 ], [ 0, %2 ]
ret i32 %14
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t rol(uint32_t value, uint32_t bits) {
  return (((value) << (bits)) | ((value) >> (32 - (bits))));
}


x86 assembly (clang, -O0):
<rol>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
mov    $0x20,%ecx
sub    -0x8(%rbp),%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rol>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
neg    %cl
sar    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rol(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sub nsw i32 32, %9
%11 = ashr i32 %8, %10
%12 = or i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @rol(i32 %0, i32 %1) {
%3 = shl i32 %0, %1
%4 = sub nsw i32 32, %1
%5 = ashr i32 %0, %4
%6 = or i32 %5, %3
ret i32 %6
}
OP(ed, bc) { illegal_2(); }


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <illegal_2@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
xor    %eax,%eax
jmp    1030 <illegal_2@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @illegal_2()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @illegal_2()
ret i32 undef
}
int Print_job(int output, int status_device, struct job *job,
              int send_job_rw_timeout, int poll_for_status, char *user_filter) {
}


x86 assembly (clang, -O0):
<Print_job>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Print_job>:
ret

LLVM IR (-O0):
%struct.job = type opaque
define i32 @Print_job(i32 %0, i32 %1, %struct.job* %2, i32 %3, i32 %4, i8* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca %struct.job*
%11 = alloca i32
%12 = alloca i32
%13 = alloca i8*
store i32 %0, i32* %8
store i32 %1, i32* %9
store %struct.job* %2, %struct.job** %10
store i32 %3, i32* %11
store i32 %4, i32* %12
store i8* %5, i8** %13
%14 = load i32, i32* %7
ret i32 %14
}

LLVM IR (-O2):
%struct.job = type opaque
define i32 @Print_job(i32 %0, i32 %1, %struct.job* nocapture readnone %2, i32 %3, i32 %4, i8* nocapture readnone %5) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ *swap_location();
unsigned swap_size_granularity(void) {
  return (NULL == swap_location() ? 0 : (8 << 20));
}


x86 assembly (clang, -O0):
<swap_size_granularity>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <swap_location@plt>
mov    %rax,%rsi
xor    %eax,%eax
mov    %eax,%edx
mov    $0x800000,%eax
xor    %ecx,%ecx
cmp    %rsi,%rdx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_size_granularity>:
push   %rax
xor    %eax,%eax
call   1030 <swap_location@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
shl    $0x17,%ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @swap_size_granularity() {
%1 = call i32* (...) @swap_location()
%2 = icmp eq i32* null, %1
%3 = zext i1 %2 to i64
%4 = select i1 %2, i32 0, i32 8388608
ret i32 %4
}

LLVM IR (-O2):
define i32 @swap_size_granularity() {
%1 = tail call i32* (...) @swap_location()
%2 = icmp eq i32* %1, null
%3 = select i1 %2, i32 0, i32 8388608
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
uint8_t motorcontrol_init(uint8_t value) { return 0; }


x86 assembly (clang, -O0):
<motorcontrol_init>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<motorcontrol_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @motorcontrol_init(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @motorcontrol_init(i32 %0) {
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ u8tohex(int, char *);
void u32tohex(uint32_t x, char *str) {
  u8tohex(x >> 24, str);
  u8tohex(x >> 16, str + 2);
  u8tohex(x >> 8, str + 4);
  u8tohex(x, str + 6);
}


x86 assembly (clang, -O0):
<u32tohex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
sar    $0x18,%edi
mov    -0x10(%rbp),%rsi
call   1030 <u8tohex@plt>
mov    -0x4(%rbp),%edi
sar    $0x10,%edi
mov    -0x10(%rbp),%rsi
add    $0x2,%rsi
call   1030 <u8tohex@plt>
mov    -0x4(%rbp),%edi
sar    $0x8,%edi
mov    -0x10(%rbp),%rsi
add    $0x4,%rsi
call   1030 <u8tohex@plt>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
add    $0x6,%rsi
call   1030 <u8tohex@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<u32tohex>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
sar    $0x18,%edi
call   1030 <u8tohex@plt>
mov    %ebp,%edi
sar    $0x10,%edi
lea    0x2(%rbx),%rsi
call   1030 <u8tohex@plt>
mov    %ebp,%edi
sar    $0x8,%edi
lea    0x4(%rbx),%rsi
call   1030 <u8tohex@plt>
add    $0x6,%rbx
mov    %ebp,%edi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <u8tohex@plt>

LLVM IR (-O0):
define void @u32tohex(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = ashr i32 %5, 24
%7 = load i8*, i8** %4
%8 = call i32 @u8tohex(i32 %6, i8* %7)
%9 = load i32, i32* %3
%10 = ashr i32 %9, 16
%11 = load i8*, i8** %4
%12 = getelementptr inbounds i8, i8* %11, i64 2
%13 = call i32 @u8tohex(i32 %10, i8* %12)
%14 = load i32, i32* %3
%15 = ashr i32 %14, 8
%16 = load i8*, i8** %4
%17 = getelementptr inbounds i8, i8* %16, i64 4
%18 = call i32 @u8tohex(i32 %15, i8* %17)
%19 = load i32, i32* %3
%20 = load i8*, i8** %4
%21 = getelementptr inbounds i8, i8* %20, i64 6
%22 = call i32 @u8tohex(i32 %19, i8* %21)
ret void
}

LLVM IR (-O2):
define void @u32tohex(i32 %0, i8* %1) {
%3 = ashr i32 %0, 24
%4 = tail call i32 @u8tohex(i32 %3, i8* %1)
%5 = ashr i32 %0, 16
%6 = getelementptr inbounds i8, i8* %1, i64 2
%7 = tail call i32 @u8tohex(i32 %5, i8* %6)
%8 = ashr i32 %0, 8
%9 = getelementptr inbounds i8, i8* %1, i64 4
%10 = tail call i32 @u8tohex(i32 %8, i8* %9)
%11 = getelementptr inbounds i8, i8* %1, i64 6
%12 = tail call i32 @u8tohex(i32 %0, i8* %11)
ret void
}
void ARGBToYUY2() {}


x86 assembly (clang, -O0):
<ARGBToYUY2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBToYUY2>:
ret

LLVM IR (-O0):
define void @ARGBToYUY2() {
ret void
}

LLVM IR (-O2):
define void @ARGBToYUY2() {
ret void
}
double SQR(double a) { return a == 0.0 ? 0.0 : a * a; }


x86 assembly (clang, -O0):
<SQR>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    112e <SQR+0x2e>
jp     112e <SQR+0x2e>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    113d <SQR+0x3d>
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<SQR>:
movapd %xmm0,%xmm1
mulsd  %xmm0,%xmm1
xorpd  %xmm2,%xmm2
cmpeqsd %xmm2,%xmm0
andnpd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @SQR(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp oeq double %3, 0.000000e+00
br i1 %4, label %5, label %6
5: ; preds = %1
br label %10
6: ; preds = %1
%7 = load double, double* %2
%8 = load double, double* %2
%9 = fmul double %7, %8
br label %10
10: ; preds = %6, %5
%11 = phi double [ 0.000000e+00, %5 ], [ %9, %6 ]
ret double %11
}

LLVM IR (-O2):
define double @SQR(double %0) {
%2 = fcmp oeq double %0, 0.000000e+00
%3 = fmul double %0, %0
%4 = select i1 %2, double 0.000000e+00, double %3
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ mew_debug_die_with_message(char *);
void bus_fault_handler(void) {
  mew_debug_die_with_message("bus_fault_handler");
}


x86 assembly (clang, -O0):
<bus_fault_handler>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <mew_debug_die_with_message@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bus_fault_handler>:
lea    0xee9(%rip),%rdi
jmp    1030 <mew_debug_die_with_message@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"bus_fault_handler\00"
define void @bus_fault_handler() {
%1 = call i32 @mew_debug_die_with_message(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"bus_fault_handler\00"
define void @bus_fault_handler() {
%1 = tail call i32 @mew_debug_die_with_message(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret void
}
INSTRUCTION(l_cust2) {}


x86 assembly (clang, -O0):
<INSTRUCTION>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<INSTRUCTION>:
ret

LLVM IR (-O0):
define i32 @INSTRUCTION(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @INSTRUCTION(i32 %0) {
ret i32 undef
}
unsigned xrop3_49_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~T;
  stk2 = D & stk3;
  stk1 = S | stk2;
  stk1 = ~stk1;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_49_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_49_0_0>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
not    %sil
movzbl %sil,%eax
or     %ecx,%eax
not    %eax
ret

LLVM IR (-O0):
define i32 @xrop3_49_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %5
%26 = load i32, i32* %10
%27 = and i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %6
%29 = load i32, i32* %9
%30 = or i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = xor i32 %31, -1
store i32 %32, i32* %8
%33 = load i32, i32* %8
ret i32 %33
}

LLVM IR (-O2):
define i32 @xrop3_49_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = xor i8 %1, -1
%6 = zext i8 %5 to i32
%7 = or i32 %4, %6
%8 = xor i32 %7, -1
ret i32 %8
}
/* Variables and functions */
int strtol(char *, char **, int /*<<< orphan*/);
int zz_qtoi(char *q) {
  int i;
  i = strtol(q, (char **)0, 0);
  return i;
}


x86 assembly (clang, -O0):
<zz_qtoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
xor    %edx,%edx
call   1030 <strtol@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zz_qtoi>:
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <strtol@plt>

LLVM IR (-O0):
define i32 @zz_qtoi(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strtol(i8* %4, i8** null, i32 0)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @zz_qtoi(i8* nocapture %0) {
%2 = tail call i32 @strtol(i8* nocapture %0, i8** null, i32 0)
ret i32 %2
}
/* Type definitions */
struct list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ list_empty(struct list *const);
int /*<<< orphan*/ list_pop(struct list *const);
void list_purge_without_free(struct list *const l) {
  while (!list_empty(l))
    list_pop(l);
}


x86 assembly (clang, -O0):
<list_purge_without_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <list_empty@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    114a <list_purge_without_free+0x2a>
jmp    1158 <list_purge_without_free+0x38>
mov    -0x8(%rbp),%rdi
call   1030 <list_pop@plt>
jmp    112c <list_purge_without_free+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_purge_without_free>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
call   1040 <list_empty@plt>
test   %eax,%eax
jne    1146 <list_purge_without_free+0x26>
mov    %rbx,%rdi
call   1030 <list_pop@plt>
mov    %rbx,%rdi
jmp    1130 <list_purge_without_free+0x10>
pop    %rbx
ret

LLVM IR (-O0):
%struct.list = type { i32 }
define void @list_purge_without_free(%struct.list* %0) {
%2 = alloca %struct.list*
store %struct.list* %0, %struct.list** %2
br label %3
3: ; preds = %8, %1
%4 = load %struct.list*, %struct.list** %2
%5 = call i32 @list_empty(%struct.list* %4)
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
br i1 %7, label %8, label %11
8: ; preds = %3
%9 = load %struct.list*, %struct.list** %2
%10 = call i32 @list_pop(%struct.list* %9)
br label %3
11: ; preds = %3
ret void
}

LLVM IR (-O2):
%struct.list = type { i32 }
define void @list_purge_without_free(%struct.list* %0) {
%2 = tail call i32 @list_empty(%struct.list* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1, %4
%5 = tail call i32 @list_pop(%struct.list* %0)
%6 = tail call i32 @list_empty(%struct.list* %0)
%7 = icmp eq i32 %6, 0
br i1 %7, label %4, label %8
8: ; preds = %4, %1
ret void
}
/* Variables and functions */
int sscanf(char *, char *, double *, char *);
void tm_number_sub_(char *string, int *result) {
  int num_read;
  double rval;
  char kval[2048];
  num_read = sscanf(string, "%lf%s", &rval, kval);
  if (num_read == 1)
    *result = 1;
  else
    *result = 0;
  return;
}


x86 assembly (clang, -O0):
<tm_number_sub_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x820,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x820(%rbp),%rcx
lea    0xecb(%rip),%rsi
lea    -0x20(%rbp),%rdx
call   1030 <sscanf@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x1,-0x14(%rbp)
jne    115a <tm_number_sub_+0x4a>
mov    -0x10(%rbp),%rax
movl   $0x1,(%rax)
jmp    1164 <tm_number_sub_+0x54>
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
add    $0x820,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tm_number_sub_>:
push   %rbx
sub    $0x810,%rsp
mov    %rsi,%rbx
lea    0xede(%rip),%rsi
lea    0x8(%rsp),%rdx
lea    0x10(%rsp),%rcx
call   1030 <sscanf@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
sete   %cl
mov    %ecx,(%rbx)
add    $0x810,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%lf%s\00"
define void @tm_number_sub_(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i32
%6 = alloca double
%7 = alloca [2048 x i8]
store i8* %0, i8** %3
store i32* %1, i32** %4
%8 = load i8*, i8** %3
%9 = getelementptr inbounds [2048 x i8], [2048 x i8]* %7, i64 0, i64 0
%10 = call i32 @sscanf(i8* %8, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), double* %6, i8* %9)
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = icmp eq i32 %11, 1
br i1 %12, label %13, label %15
13: ; preds = %2
%14 = load i32*, i32** %4
store i32 1, i32* %14
br label %17
15: ; preds = %2
%16 = load i32*, i32** %4
store i32 0, i32* %16
br label %17
17: ; preds = %15, %13
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"%lf%s\00"
define void @tm_number_sub_(i8* nocapture %0, i32* nocapture writeonly %1) {
%3 = alloca double
%4 = alloca [2048 x i8]
%5 = bitcast double* %3 to i8*
%6 = getelementptr inbounds [2048 x i8], [2048 x i8]* %4, i64 0, i64 0
%7 = call i32 @sscanf(i8* %0, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), double* %3, i8* %6)
%8 = icmp eq i32 %7, 1
%9 = zext i1 %8 to i32
store i32 %9, i32* %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;

/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_session_get_uid(const char *session, uid_t *uid) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_session_get_uid>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ecb(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_session_get_uid>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_session_get_uid(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i32, i32* @EINVAL
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_session_get_uid(i8* nocapture readnone %0, i32* nocapture readnone %1) {
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}
/* Variables and functions */
void *mpgedit_edit_index_new(char *, int /*<<< orphan*/ *);
void *mpgedit_edit_index_init(char *name) {
  return mpgedit_edit_index_new(name, NULL);
}


x86 assembly (clang, -O0):
<mpgedit_edit_index_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <mpgedit_edit_index_new@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpgedit_edit_index_init>:
xor    %esi,%esi
jmp    1030 <mpgedit_edit_index_new@plt>

LLVM IR (-O0):
define i8* @mpgedit_edit_index_init(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @mpgedit_edit_index_new(i8* %3, i32* null)
ret i8* %4
}

LLVM IR (-O2):
define i8* @mpgedit_edit_index_init(i8* %0) {
%2 = tail call i8* @mpgedit_edit_index_new(i8* %0, i32* null)
ret i8* %2
}
/* Variables and functions */
int write(int, int *, int);
int putchar(int c) { return write(1, &c, 1); }


x86 assembly (clang, -O0):
<putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edx
lea    -0x4(%rbp),%rsi
mov    %edx,%edi
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putchar>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x1,%edi
mov    $0x1,%edx
call   1030 <write@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @putchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @write(i32 1, i32* %2, i32 1)
ret i32 %3
}

LLVM IR (-O2):
define i32 @putchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @write(i32 1, i32* %2, i32 1)
ret i32 %3
}
float EaseLinearOut(float t, float b, float c, float d) {
  return (c * t / d + b);
}


x86 assembly (clang, -O0):
<EaseLinearOut>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
divss  -0x10(%rbp),%xmm0
addss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<EaseLinearOut>:
mulss  %xmm2,%xmm0
divss  %xmm3,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @EaseLinearOut(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %7
%10 = load float, float* %5
%11 = fmul float %9, %10
%12 = load float, float* %8
%13 = fdiv float %11, %12
%14 = load float, float* %6
%15 = fadd float %13, %14
ret float %15
}

LLVM IR (-O2):
define float @EaseLinearOut(float %0, float %1, float %2, float %3) {
%5 = fmul float %0, %2
%6 = fdiv float %5, %3
%7 = fadd float %6, %1
ret float %7
}