xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
main() {
  int k, x, y, z;
  z = x = y = z = 0;
  k = ++x && y || ++z && !++z;
  printf("%d", x + z + k);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
cmp    $0x0,%eax
je     115c <main+0x4c>
mov    $0x1,%al
cmpl   $0x0,-0x10(%rbp)
mov    %al,-0x15(%rbp)
jne    118d <main+0x7d>
mov    -0x14(%rbp),%ecx
add    $0x1,%ecx
mov    %ecx,-0x14(%rbp)
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x16(%rbp)
je     1187 <main+0x77>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x16(%rbp)
mov    -0x16(%rbp),%al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%esi
add    -0x14(%rbp),%esi
add    -0x8(%rbp),%esi
lea    0xe58(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x3,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %5
store i32 0, i32* %4
store i32 0, i32* %3
store i32 0, i32* %5
%6 = load i32, i32* %3
%7 = add nsw i32 %6, 1
store i32 %7, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %0
%10 = load i32, i32* %4
%11 = icmp ne i32 %10, 0
br i1 %11, label %23, label %12
12: ; preds = %9, %0
%13 = load i32, i32* %5
%14 = add nsw i32 %13, 1
store i32 %14, i32* %5
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %21
16: ; preds = %12
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 1
store i32 %18, i32* %5
%19 = icmp ne i32 %18, 0
%20 = xor i1 %19, true
br label %21
21: ; preds = %16, %12
%22 = phi i1 [ false, %12 ], [ %20, %16 ]
br label %23
23: ; preds = %21, %9
%24 = phi i1 [ true, %9 ], [ %22, %21 ]
%25 = zext i1 %24 to i32
store i32 %25, i32* %2
%26 = load i32, i32* %3
%27 = load i32, i32* %5
%28 = add nsw i32 %26, %27
%29 = load i32, i32* %2
%30 = add nsw i32 %28, %29
%31 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %30)
%32 = load i32, i32* %1
ret i32 %32
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 3)
ret i32 0
}
void ar9003_mci_set_power_awake(struct ath_hw *ah) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
%struct.ath_hw = type opaque
define void @ar9003_mci_set_power_awake(%struct.ath_hw* %0) {
%2 = alloca %struct.ath_hw*
store %struct.ath_hw* %0, %struct.ath_hw** %2
ret void
}

LLVM IR (-O2):
%struct.ath_hw = type opaque
define void @ar9003_mci_set_power_awake(%struct.ath_hw* nocapture %0) {
ret void
}
void cplace(int y, int x, const char c) {
  char *dptr;
  dptr = (char *)(0xb8000 + (160 * y) + (2 * x));
  *dptr = c;
}


x86 assembly (clang, -O0):
<cplace>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
imul   $0xa0,-0x4(%rbp),%eax
add    $0xb8000,%eax
mov    -0x8(%rbp),%ecx
shl    $0x1,%ecx
add    %ecx,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x9(%rbp),%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cplace>:
movslq %edi,%rax
lea    (%rax,%rax,4),%rax
shl    $0x5,%rax
movslq %esi,%rcx
mov    %dl,0xb8000(%rax,%rcx,2)
ret

LLVM IR (-O0):
define void @cplace(i32 %0, i32 %1, i8 signext %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8
%7 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8 %2, i8* %6
%8 = load i32, i32* %4
%9 = mul nsw i32 160, %8
%10 = add nsw i32 753664, %9
%11 = load i32, i32* %5
%12 = mul nsw i32 2, %11
%13 = add nsw i32 %10, %12
%14 = sext i32 %13 to i64
%15 = inttoptr i64 %14 to i8*
store i8* %15, i8** %7
%16 = load i8, i8* %6
%17 = load i8*, i8** %7
store i8 %16, i8* %17
ret void
}

LLVM IR (-O2):
define void @cplace(i32 %0, i32 %1, i8 signext %2) {
%4 = mul nsw i32 %0, 160
%5 = add nsw i32 %4, 753664
%6 = shl nsw i32 %1, 1
%7 = add nsw i32 %5, %6
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i8*
store i8 %2, i8* %9
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ test_mm_hmax_element_epi8__finds_offset();
int /*<<< orphan*/ test_mm_hmax_element_epu8__finds_offset();
int /*<<< orphan*/ test_mm_hmin_element_epi8__finds_offset();
int /*<<< orphan*/ test_mm_hmin_element_epu8__finds_offset();
int main() {
  test_mm_hmin_element_epi8__finds_offset();
  test_mm_hmin_element_epu8__finds_offset();
  test_mm_hmax_element_epi8__finds_offset();
  test_mm_hmax_element_epu8__finds_offset();
  puts("OK");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <test_mm_hmin_element_epi8__finds_offset@plt>
mov    $0x0,%al
call   1070 <test_mm_hmin_element_epu8__finds_offset@plt>
mov    $0x0,%al
call   1050 <test_mm_hmax_element_epi8__finds_offset@plt>
mov    $0x0,%al
call   1060 <test_mm_hmax_element_epu8__finds_offset@plt>
lea    0xe7e(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <test_mm_hmin_element_epi8__finds_offset@plt>
xor    %eax,%eax
call   1070 <test_mm_hmin_element_epu8__finds_offset@plt>
xor    %eax,%eax
call   1050 <test_mm_hmax_element_epi8__finds_offset@plt>
xor    %eax,%eax
call   1060 <test_mm_hmax_element_epu8__finds_offset@plt>
lea    0xe8c(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"OK\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_mm_hmin_element_epi8__finds_offset()
%3 = call i32 (...) @test_mm_hmin_element_epu8__finds_offset()
%4 = call i32 (...) @test_mm_hmax_element_epi8__finds_offset()
%5 = call i32 (...) @test_mm_hmax_element_epu8__finds_offset()
%6 = call i32 @puts(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"OK\00"
define i32 @main() {
%1 = tail call i32 (...) @test_mm_hmin_element_epi8__finds_offset()
%2 = tail call i32 (...) @test_mm_hmin_element_epu8__finds_offset()
%3 = tail call i32 (...) @test_mm_hmax_element_epi8__finds_offset()
%4 = tail call i32 (...) @test_mm_hmax_element_epu8__finds_offset()
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char const *, char const *);
void print_help(const char *name) {
  printf("Lisp++ v%s\n"
         "    Created by evil on 9/7/14.\n"
         "    Copyright (c) 2014 evilbinary.org. All rights reserved.\n"
         "    rootntsd@gmail.com\n"
         "Help info:\n"
         "%s (direct to run interactive mode.)\n"
         "%s [file] (run lisp with file.)\n",
         "0.2.2", name, name);
}


x86 assembly (clang, -O0):
<print_help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0x8(%rbp),%rcx
lea    0xed5(%rip),%rdi
lea    0xf9c(%rip),%rsi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_help>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
lea    0xfad(%rip),%rsi
mov    %rcx,%rdx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [206 x i8] c"Lisp++ v%s\0A Created by evil on 9/7/14.\0A Copyright (c) 2014 evilbinary.org. All rights reserved.\0A rootntsd@gmail.com\0AHelp info:\0A%s (direct to run interactive mode.)\0A%s [file] (run lisp with file.)\0A\00"
@.str.1 = [6 x i8] c"0.2.2\00"
define void @print_help(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @printf(i8* getelementptr inbounds ([206 x i8], [206 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* %3, i8* %4)
ret void
}

LLVM IR (-O2):
@.str = [206 x i8] c"Lisp++ v%s\0A Created by evil on 9/7/14.\0A Copyright (c) 2014 evilbinary.org. All rights reserved.\0A rootntsd@gmail.com\0AHelp info:\0A%s (direct to run interactive mode.)\0A%s [file] (run lisp with file.)\0A\00"
@.str.1 = [6 x i8] c"0.2.2\00"
define void @print_help(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([206 x i8], [206 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* %0, i8* %0)
ret void
}
__attribute__((no, noclone)) short foo2(short arg) {
  short ret = 1;
  if (arg + 1 < ((!0) ? -(1L << (sizeof(char) * 8 - 1)) : 0) + 1 ||
      arg + 1 > ((!0) ? ((1L << (sizeof(char) * 8 - 1)) - 1)
                      : ((1L << (sizeof(char) * 8)) - 1)) -
                    1)
    return ret;
  arg = arg + 1;
  ret = (char)arg;
  return arg;
}


x86 assembly (clang, -O0):
<foo2>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x4(%rbp)
movw   $0x1,-0x6(%rbp)
movswl -0x4(%rbp),%eax
add    $0x1,%eax
cltq
cmp    $0xffffffffffffff81,%rax
jl     1137 <foo2+0x37>
movswl -0x4(%rbp),%eax
add    $0x1,%eax
cltq
cmp    $0x7e,%rax
jle    1144 <foo2+0x44>
mov    -0x6(%rbp),%ax
mov    %ax,-0x2(%rbp)
jmp    1162 <foo2+0x62>
movswl -0x4(%rbp),%eax
add    $0x1,%eax
mov    %ax,-0x4(%rbp)
mov    -0x4(%rbp),%ax
movsbl %al,%eax
mov    %ax,-0x6(%rbp)
mov    -0x4(%rbp),%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo2>:
lea    0x1(%rdi),%ecx
add    $0xffffff82,%edi
movzwl %di,%eax
cmp    $0xff02,%eax
mov    $0x1,%eax
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define signext i16 @foo2(i16 signext %0) {
%2 = alloca i16
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 1, i16* %4
%5 = load i16, i16* %3
%6 = sext i16 %5 to i32
%7 = add nsw i32 %6, 1
%8 = sext i32 %7 to i64
%9 = icmp slt i64 %8, -127
br i1 %9, label %16, label %10
10: ; preds = %1
%11 = load i16, i16* %3
%12 = sext i16 %11 to i32
%13 = add nsw i32 %12, 1
%14 = sext i32 %13 to i64
%15 = icmp sgt i64 %14, 126
br i1 %15, label %16, label %18
16: ; preds = %10, %1
%17 = load i16, i16* %4
store i16 %17, i16* %2
br label %27
18: ; preds = %10
%19 = load i16, i16* %3
%20 = sext i16 %19 to i32
%21 = add nsw i32 %20, 1
%22 = trunc i32 %21 to i16
store i16 %22, i16* %3
%23 = load i16, i16* %3
%24 = trunc i16 %23 to i8
%25 = sext i8 %24 to i16
store i16 %25, i16* %4
%26 = load i16, i16* %3
store i16 %26, i16* %2
br label %27
27: ; preds = %18, %16
%28 = load i16, i16* %2
ret i16 %28
}

LLVM IR (-O2):
define signext i16 @foo2(i16 signext %0) {
%2 = add i16 %0, 1
%3 = add i16 %0, -126
%4 = icmp ult i16 %3, -254
%5 = select i1 %4, i16 1, i16 %2
ret i16 %5
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  unsigned long drawable;
};
struct TYPE_4__ {
  TYPE_1__ xnoexpose;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xnoexpose_drawable(void *_p, unsigned long _v) {
  ((XEvent *)_p)->xnoexpose.drawable = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xnoexpose_drawable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xnoexpose_drawable>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define void @set_XEvent_xnoexpose_drawable(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i64 %5, i64* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xnoexpose_drawable(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GL_COLOR_BUFFER_BIT;
int /*<<< orphan*/ drawControlPoints();
int /*<<< orphan*/ evaluateGrid();
int /*<<< orphan*/ glClear(int /*<<< orphan*/);
int /*<<< orphan*/ glutSwapBuffers();
void display(void) {
  glClear(GL_COLOR_BUFFER_BIT);
  evaluateGrid();
  drawControlPoints();
  glutSwapBuffers();
}


x86 assembly (clang, -O0):
<display>:
push   %rbp
mov    %rsp,%rbp
mov    0x2e95(%rip),%rax
mov    (%rax),%edi
call   1030 <glClear@plt>
mov    $0x0,%al
call   1050 <evaluateGrid@plt>
mov    $0x0,%al
call   1060 <drawControlPoints@plt>
mov    $0x0,%al
call   1040 <glutSwapBuffers@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display>:
push   %rax
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1030 <glClear@plt>
xor    %eax,%eax
call   1050 <evaluateGrid@plt>
xor    %eax,%eax
call   1060 <drawControlPoints@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <glutSwapBuffers@plt>

LLVM IR (-O0):
@GL_COLOR_BUFFER_BIT = global i32 0
define void @display() {
%1 = load i32, i32* @GL_COLOR_BUFFER_BIT
%2 = call i32 @glClear(i32 %1)
%3 = call i32 (...) @evaluateGrid()
%4 = call i32 (...) @drawControlPoints()
%5 = call i32 (...) @glutSwapBuffers()
ret void
}

LLVM IR (-O2):
@GL_COLOR_BUFFER_BIT = global i32 0
define void @display() {
%1 = load i32, i32* @GL_COLOR_BUFFER_BIT
%2 = tail call i32 @glClear(i32 %1)
%3 = tail call i32 (...) @evaluateGrid()
%4 = tail call i32 (...) @drawControlPoints()
%5 = tail call i32 (...) @glutSwapBuffers()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ islower(int);
void t_islower_0xdd() {
  Assert_real((islower(221) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              1110, ("islower should be 0 for 0xdd"));
}


x86 assembly (clang, -O0):
<t_islower_0xdd>:
push   %rbp
mov    %rsp,%rbp
mov    $0xdd,%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x456,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0xdd>:
push   %rax
mov    $0xdd,%edi
call   1030 <islower@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x456,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xdd\00"
define void @t_islower_0xdd() {
%1 = call i64 @islower(i32 221)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1110, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xdd\00"
define void @t_islower_0xdd() {
%1 = tail call i64 @islower(i32 221)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1110, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int http_init(void) { return 0; }


x86 assembly (clang, -O0):
<http_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<http_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @http_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @http_init() {
ret i32 0
}
extern char *initial_disk_pool_mapping_info() {
  char *desc =
      "function total_disk_sizes() { return [];}\nfunction "
      "disk_interface_names() { return []; }\nfunction pool_names() { return "
      "[];}\nfunction pool_types() { return [];}\nfunction "
      "pool_mirror_counts() { return [];}\nfunction pool_status() { return "
      "[];}\nfunction pool_kilobytes() { return [];}\nfunction "
      "pool_encryption_password_is_missing() { return [];}\nfunction "
      "pool_kilobytes_in_use() { return [];}\nfunction pool_usage_kilobytes() "
      "{ return [];}\nfunction disk_usage() { return [];}\nfunction "
      "per_pane_pool_usage_kilobytes(pool_num, disk_num) { return [];}\n";
  return desc;
}


x86 assembly (clang, -O0):
<initial_disk_pool_mapping_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<initial_disk_pool_mapping_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [546 x i8] c"function total_disk_sizes() { return [];}\0Afunction disk_interface_names() { return []; }\0Afunction pool_names() { return [];}\0Afunction pool_types() { return [];}\0Afunction pool_mirror_counts() { return [];}\0Afunction pool_status() { return [];}\0Afunction pool_kilobytes() { return [];}\0Afunction pool_encryption_password_is_missing() { return [];}\0Afunction pool_kilobytes_in_use() { return [];}\0Afunction pool_usage_kilobytes() { return [];}\0Afunction disk_usage() { return [];}\0Afunction per_pane_pool_usage_kilobytes(pool_num, disk_num) { return [];}\0A\00"
define i8* @initial_disk_pool_mapping_info() {
%1 = alloca i8*
store i8* getelementptr inbounds ([546 x i8], [546 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
ret i8* %2
}

LLVM IR (-O2):
@.str = [546 x i8] c"function total_disk_sizes() { return [];}\0Afunction disk_interface_names() { return []; }\0Afunction pool_names() { return [];}\0Afunction pool_types() { return [];}\0Afunction pool_mirror_counts() { return [];}\0Afunction pool_status() { return [];}\0Afunction pool_kilobytes() { return [];}\0Afunction pool_encryption_password_is_missing() { return [];}\0Afunction pool_kilobytes_in_use() { return [];}\0Afunction pool_usage_kilobytes() { return [];}\0Afunction disk_usage() { return [];}\0Afunction per_pane_pool_usage_kilobytes(pool_num, disk_num) { return [];}\0A\00"
define i8* @initial_disk_pool_mapping_info() {
ret i8* getelementptr inbounds ([546 x i8], [546 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int /*<<< orphan*/);
int /*<<< orphan*/ setup_coherent_ht_domain();
void main(void) {
  static const char msg[] = "hello world\r\n";
  setup_coherent_ht_domain();
  _exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <setup_coherent_ht_domain@plt>
xor    %edi,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <setup_coherent_ht_domain@plt>
xor    %edi,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
@main.msg = internal constant [14 x i8] c"hello world\0D\0A\00"
define void @main() {
%1 = call i32 (...) @setup_coherent_ht_domain()
%2 = call i32 @_exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 (...) @setup_coherent_ht_domain()
%2 = tail call i32 @_exit(i32 0)
unreachable
}
int isEven(int number) {
  int answer;
  if (number % 2 == 0)
    answer = 1;
  else
    answer = 0;
  return answer;
}


x86 assembly (clang, -O0):
<isEven>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1127 <isEven+0x27>
movl   $0x1,-0x8(%rbp)
jmp    112e <isEven+0x2e>
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isEven>:
mov    %edi,%eax
not    %eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isEven(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = srem i32 %4, 2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %3
br label %9
8: ; preds = %1
store i32 0, i32* %3
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @isEven(i32 %0) {
%2 = and i32 %0, 1
%3 = xor i32 %2, 1
ret i32 %3
}
float CG_LerpValues(float a, float b, float f) {
  if (b == -2)
    return a;
  else
    return ((a) + (f) * ((b) - (a)));
}


x86 assembly (clang, -O0):
<CG_LerpValues>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  %xmm2,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
movss  0xee0(%rip),%xmm1
ucomiss %xmm1,%xmm0
jne    113e <CG_LerpValues+0x3e>
jp     113e <CG_LerpValues+0x3e>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    115f <CG_LerpValues+0x5f>
movss  -0x8(%rbp),%xmm1
movss  -0x10(%rbp),%xmm0
movss  -0xc(%rbp),%xmm2
subss  -0x8(%rbp),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_LerpValues>:
movaps %xmm1,%xmm3
subss  %xmm0,%xmm3
mulss  %xmm2,%xmm3
cmpeqss 0xeec(%rip),%xmm1
addss  %xmm0,%xmm3
andps  %xmm1,%xmm0
andnps %xmm3,%xmm1
orps   %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @CG_LerpValues(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
%8 = load float, float* %6
%9 = fcmp oeq float %8, -2.000000e+00
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load float, float* %5
store float %11, float* %4
br label %19
12: ; preds = %3
%13 = load float, float* %5
%14 = load float, float* %7
%15 = load float, float* %6
%16 = load float, float* %5
%17 = fsub float %15, %16
%18 = call float @llvm.fmuladd.f32(float %14, float %17, float %13)
store float %18, float* %4
br label %19
19: ; preds = %12, %10
%20 = load float, float* %4
ret float %20
}

LLVM IR (-O2):
define float @CG_LerpValues(float %0, float %1, float %2) {
%4 = fcmp oeq float %1, -2.000000e+00
%5 = fsub float %1, %0
%6 = tail call float @llvm.fmuladd.f32(float %2, float %5, float %0)
%7 = select i1 %4, float %0, float %6
ret float %7
}
short getshort(arrayptr, num_cols, row, col)
short *arrayptr;
short num_cols;
short row, col;
{
  short value;
  int position;
  position = row * num_cols + col;
  value = *(arrayptr + position);
  return (value);
}


x86 assembly (clang, -O0):
<getshort>:
push   %rbp
mov    %rsp,%rbp
mov    %ecx,%eax
mov    %edx,%ecx
mov    %si,%dx
mov    %rdi,-0x8(%rbp)
mov    %dx,-0xa(%rbp)
mov    %cx,-0xc(%rbp)
mov    %ax,-0xe(%rbp)
movswl -0xc(%rbp),%eax
movswl -0xa(%rbp),%ecx
imul   %ecx,%eax
movswl -0xe(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,2),%ax
mov    %ax,-0x10(%rbp)
movswl -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getshort>:
movswl %dx,%eax
movswl %si,%edx
imul   %eax,%edx
movswl %cx,%eax
add    %edx,%eax
cltq
movzwl (%rdi,%rax,2),%eax
ret

LLVM IR (-O0):
define signext i16 @getshort(i16* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i16*
%6 = alloca i16
%7 = alloca i16
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = trunc i32 %1 to i16
%12 = trunc i32 %2 to i16
%13 = trunc i32 %3 to i16
store i16* %0, i16** %5
store i16 %11, i16* %6
store i16 %12, i16* %7
store i16 %13, i16* %8
%14 = load i16, i16* %7
%15 = sext i16 %14 to i32
%16 = load i16, i16* %6
%17 = sext i16 %16 to i32
%18 = mul nsw i32 %15, %17
%19 = load i16, i16* %8
%20 = sext i16 %19 to i32
%21 = add nsw i32 %18, %20
store i32 %21, i32* %10
%22 = load i16*, i16** %5
%23 = load i32, i32* %10
%24 = sext i32 %23 to i64
%25 = getelementptr inbounds i16, i16* %22, i64 %24
%26 = load i16, i16* %25
store i16 %26, i16* %9
%27 = load i16, i16* %9
ret i16 %27
}

LLVM IR (-O2):
define signext i16 @getshort(i16* nocapture %0, i32 %1, i32 %2, i32 %3) {
%5 = shl i32 %2, 16
%6 = ashr exact i32 %5, 16
%7 = shl i32 %1, 16
%8 = ashr exact i32 %7, 16
%9 = mul nsw i32 %6, %8
%10 = shl i32 %3, 16
%11 = ashr exact i32 %10, 16
%12 = add nsw i32 %9, %11
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i16, i16* %0, i64 %13
%15 = load i16, i16* %14
ret i16 %15
}
/* Variables and functions */
double fma(double, double, double);
float fmaf(float, float, float);
long double fmal(long double, long double, long double);
void test_fma(float a0, double a1, long double a2) {
  float l0 = fmaf(a0, a0, a0);
  double l1 = fma(a1, a1, a1);
  long double l2 = fmal(a2, a2, a2);
}


x86 assembly (clang, -O0):
<test_fma>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
fldt   0x10(%rbp)
movss  %xmm0,-0x4(%rbp)
movsd  %xmm1,-0x10(%rbp)
fstpt  -0x20(%rbp)
movss  -0x4(%rbp),%xmm2
movaps %xmm2,%xmm0
movaps %xmm2,%xmm1
call   1030 <fmaf@plt>
movss  %xmm0,-0x24(%rbp)
movsd  -0x10(%rbp),%xmm2
movaps %xmm2,%xmm0
movaps %xmm2,%xmm1
call   1050 <fma@plt>
movsd  %xmm0,-0x30(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fld    %st(0)
fstpt  0x20(%rax)
fld    %st(0)
fstpt  0x10(%rax)
fstpt  (%rax)
call   1040 <fmal@plt>
fstpt  -0x40(%rbp)
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_fma>:
ret

LLVM IR (-O0):
define void @test_fma(float %0, double %1, x86_fp80 %2) {
%4 = alloca float
%5 = alloca double
%6 = alloca x86_fp80
%7 = alloca float
%8 = alloca double
%9 = alloca x86_fp80
store float %0, float* %4
store double %1, double* %5
store x86_fp80 %2, x86_fp80* %6
%10 = load float, float* %4
%11 = load float, float* %4
%12 = load float, float* %4
%13 = call float @llvm.fma.f32(float %10, float %11, float %12)
store float %13, float* %7
%14 = load double, double* %5
%15 = load double, double* %5
%16 = load double, double* %5
%17 = call double @llvm.fma.f64(double %14, double %15, double %16)
store double %17, double* %8
%18 = load x86_fp80, x86_fp80* %6
%19 = load x86_fp80, x86_fp80* %6
%20 = load x86_fp80, x86_fp80* %6
%21 = call x86_fp80 @llvm.fma.f80(x86_fp80 %18, x86_fp80 %19, x86_fp80 %20)
store x86_fp80 %21, x86_fp80* %9
ret void
}

LLVM IR (-O2):
define void @test_fma(float %0, double %1, x86_fp80 %2) {
ret void
}
SEQAN_DEFINE_TEST(test_tag_select_intersect) { testTransferTag(); }


x86 assembly (clang, -O0):
<SEQAN_DEFINE_TEST>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <testTransferTag@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SEQAN_DEFINE_TEST>:
xor    %eax,%eax
jmp    1030 <testTransferTag@plt>

LLVM IR (-O0):
define i32 @SEQAN_DEFINE_TEST(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 (...) @testTransferTag()
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
define i32 @SEQAN_DEFINE_TEST(i32 %0) {
%2 = tail call i32 (...) @testTransferTag()
ret i32 undef
}
int pnx833x_gpio_read(unsigned int pin) {
  if (pin < 32)
    return ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                          0xF000))) >>
            pin) &
           1;
  else
    return ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                          0xF05C))) >>
            (pin & 31)) &
           1;
}


x86 assembly (clang, -O0):
<pnx833x_gpio_read>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x20,-0x8(%rbp)
jae    112b <pnx833x_gpio_read+0x2b>
mov    $0xb7e0f000,%eax
mov    (%rax),%rax
mov    -0x8(%rbp),%ecx
shr    %cl,%rax
and    $0x1,%rax
mov    %eax,-0x4(%rbp)
jmp    1145 <pnx833x_gpio_read+0x45>
mov    $0xb7e0f05c,%eax
mov    (%rax),%rax
mov    -0x8(%rbp),%ecx
and    $0x1f,%ecx
mov    %ecx,%ecx
shr    %cl,%rax
and    $0x1,%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pnx833x_gpio_read>:
mov    %edi,%ecx
mov    $0xb7e0f000,%eax
lea    0x5c(%rax),%rdx
cmp    $0x20,%edi
cmovb  %rax,%rdx
mov    (%rdx),%rax
and    $0x1f,%cl
shr    %cl,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @pnx833x_gpio_read(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ult i32 %4, 32
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load volatile i64, i64* inttoptr (i64 3084972032 to i64*)
%8 = load i32, i32* %3
%9 = zext i32 %8 to i64
%10 = lshr i64 %7, %9
%11 = and i64 %10, 1
%12 = trunc i64 %11 to i32
store i32 %12, i32* %2
br label %21
13: ; preds = %1
%14 = load volatile i64, i64* inttoptr (i64 3084972124 to i64*)
%15 = load i32, i32* %3
%16 = and i32 %15, 31
%17 = zext i32 %16 to i64
%18 = lshr i64 %14, %17
%19 = and i64 %18, 1
%20 = trunc i64 %19 to i32
store i32 %20, i32* %2
br label %21
21: ; preds = %13, %6
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @pnx833x_gpio_read(i32 %0) {
%2 = icmp ult i32 %0, 32
%3 = and i32 %0, 31
%4 = select i1 %2, i64* inttoptr (i64 3084972032 to i64*), i64* inttoptr (i64 3084972124 to i64*)
%5 = load volatile i64, i64* %4
%6 = zext i32 %3 to i64
%7 = lshr i64 %5, %6
%8 = trunc i64 %7 to i32
%9 = and i32 %8, 1
ret i32 %9
}
/* Variables and functions */
char *addColor(char *, char *);
char *underline(char *str) { return addColor("4", str); }


x86 assembly (clang, -O0):
<underline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <addColor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<underline>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <addColor@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"4\00"
define i8* @underline(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @addColor(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i8* %4
}

LLVM IR (-O2):
@.str = [2 x i8] c"4\00"
define i8* @underline(i8* %0) {
%2 = tail call i8* @addColor(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i8* %2
}
void ff_hevc_put_hevc_uni_w_qpel_v32_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_qpel_v32_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_qpel_v32_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_qpel_v32_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_qpel_v32_8_sse4() {
ret void
}
/* Variables and functions */
int cs_strnicmp(char const *, char const *, int);
int cs_stricmp(const char *string1, const char *string2) {
  return cs_strnicmp(string1, string2, 99999);
}


x86 assembly (clang, -O0):
<cs_stricmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1869f,%edx
call   1030 <cs_strnicmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cs_stricmp>:
mov    $0x1869f,%edx
jmp    1030 <cs_strnicmp@plt>

LLVM IR (-O0):
define i32 @cs_stricmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @cs_strnicmp(i8* %5, i8* %6, i32 99999)
ret i32 %7
}

LLVM IR (-O2):
define i32 @cs_stricmp(i8* %0, i8* %1) {
%3 = tail call i32 @cs_strnicmp(i8* %0, i8* %1, i32 99999)
ret i32 %3
}
/* Type definitions */
struct stopwatch {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ stopwatch_expired(struct stopwatch *);
void stopwatch_wait_until_expired(struct stopwatch *sw) {
  while (!stopwatch_expired(sw))
    ;
}


x86 assembly (clang, -O0):
<stopwatch_wait_until_expired>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <stopwatch_expired@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    113a <stopwatch_wait_until_expired+0x2a>
jmp    113f <stopwatch_wait_until_expired+0x2f>
jmp    111c <stopwatch_wait_until_expired+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stopwatch_wait_until_expired>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rbx,%rdi
call   1030 <stopwatch_expired@plt>
test   %eax,%eax
je     1120 <stopwatch_wait_until_expired+0x10>
pop    %rbx
ret

LLVM IR (-O0):
%struct.stopwatch = type { i32 }
define void @stopwatch_wait_until_expired(%struct.stopwatch* %0) {
%2 = alloca %struct.stopwatch*
store %struct.stopwatch* %0, %struct.stopwatch** %2
br label %3
3: ; preds = %8, %1
%4 = load %struct.stopwatch*, %struct.stopwatch** %2
%5 = call i32 @stopwatch_expired(%struct.stopwatch* %4)
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
br i1 %7, label %8, label %9
8: ; preds = %3
br label %3
9: ; preds = %3
ret void
}

LLVM IR (-O2):
%struct.stopwatch = type { i32 }
define void @stopwatch_wait_until_expired(%struct.stopwatch* %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 @stopwatch_expired(%struct.stopwatch* %0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %2, label %5
5: ; preds = %2
ret void
}
int e_numero(array)
char *array;
{
  int retorno = 0;
  char c;
  c = *array;
  while (c != '\0') {
    retorno = 1;
    if (c < '0' || c > '9') {
      retorno = 0;
      break;
    }
    c = *(++array);
  }
  return (retorno);
}


x86 assembly (clang, -O0):
<e_numero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    %al,-0xd(%rbp)
movsbl -0xd(%rbp),%eax
cmp    $0x0,%eax
je     116c <e_numero+0x6c>
movl   $0x1,-0xc(%rbp)
movsbl -0xd(%rbp),%eax
cmp    $0x30,%eax
jl     1146 <e_numero+0x46>
movsbl -0xd(%rbp),%eax
cmp    $0x39,%eax
jle    1152 <e_numero+0x52>
movl   $0x0,-0xc(%rbp)
jmp    116c <e_numero+0x6c>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
mov    0x1(%rax),%al
mov    %al,-0xd(%rbp)
jmp    1118 <e_numero+0x18>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_numero>:
mov    (%rdi),%cl
xor    %eax,%eax
test   %cl,%cl
je     1128 <e_numero+0x28>
add    $0x1,%rdi
nopl   0x0(%rax)
add    $0xc6,%cl
cmp    $0xf5,%cl
jbe    1128 <e_numero+0x28>
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <e_numero+0x10>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @e_numero(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8
store i8* %0, i8** %2
store i32 0, i32* %3
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
store i8 %6, i8* %4
br label %7
7: ; preds = %20, %1
%8 = load i8, i8* %4
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %24
11: ; preds = %7
store i32 1, i32* %3
%12 = load i8, i8* %4
%13 = sext i8 %12 to i32
%14 = icmp slt i32 %13, 48
br i1 %14, label %19, label %15
15: ; preds = %11
%16 = load i8, i8* %4
%17 = sext i8 %16 to i32
%18 = icmp sgt i32 %17, 57
br i1 %18, label %19, label %20
19: ; preds = %15, %11
store i32 0, i32* %3
br label %24
20: ; preds = %15
%21 = load i8*, i8** %2
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %2
%23 = load i8, i8* %22
store i8 %23, i8* %4
br label %7
24: ; preds = %19, %7
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @e_numero(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %7
4: ; preds = %7
%5 = load i8, i8* %12
%6 = icmp eq i8 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %1, %4
%8 = phi i8 [ %5, %4 ], [ %2, %1 ]
%9 = phi i8* [ %12, %4 ], [ %0, %1 ]
%10 = add i8 %8, -58
%11 = icmp ult i8 %10, -10
%12 = getelementptr inbounds i8, i8* %9, i64 1
br i1 %11, label %13, label %4
13: ; preds = %4, %7, %1
%14 = phi i32 [ 0, %1 ], [ 0, %7 ], [ 1, %4 ]
ret i32 %14
}
/* Type definitions */
struct sockaddr_in {
  int /*<<< orphan*/ sin_addr;
};

/* Variables and functions */
int /*<<< orphan*/ AF_INET;
scalar_t__ inet_pton(int /*<<< orphan*/, char *, int /*<<< orphan*/ *);
char *is_ipv4(char *ip_addr) {
  char *ans = "";
  struct sockaddr_in sa;
  ans = inet_pton(AF_INET, ip_addr, &(sa.sin_addr)) ? "yes" : "no";
  return ans;
}


x86 assembly (clang, -O0):
<is_ipv4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xee3(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1030 <inet_pton@plt>
mov    %rax,%rdx
lea    0xebd(%rip),%rax
lea    0xeb2(%rip),%rcx
cmp    $0x0,%rdx
cmovne %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_ipv4>:
push   %rax
mov    %rdi,%rsi
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rdx
call   1030 <inet_pton@plt>
test   %rax,%rax
lea    0xed5(%rip),%rcx
lea    0xeca(%rip),%rax
cmove  %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.sockaddr_in = type { i32 }
@.str = [1 x i8] zeroinitializer
@AF_INET = global i32 0
@.str.1 = [4 x i8] c"yes\00"
@.str.2 = [3 x i8] c"no\00"
define i8* @is_ipv4(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca %struct.sockaddr_in
store i8* %0, i8** %2
store i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8** %3
%5 = load i32, i32* @AF_INET
%6 = load i8*, i8** %2
%7 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %4, i32 0, i32 0
%8 = call i64 @inet_pton(i32 %5, i8* %6, i32* %7)
%9 = icmp ne i64 %8, 0
%10 = zext i1 %9 to i64
%11 = select i1 %9, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0)
store i8* %11, i8** %3
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
%struct.sockaddr_in = type { i32 }
@AF_INET = global i32 0
@.str.1 = [4 x i8] c"yes\00"
@.str.2 = [3 x i8] c"no\00"
define i8* @is_ipv4(i8* %0) {
%2 = alloca %struct.sockaddr_in
%3 = bitcast %struct.sockaddr_in* %2 to i8*
%4 = load i32, i32* @AF_INET
%5 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %2, i64 0, i32 0
%6 = call i64 @inet_pton(i32 %4, i8* %0, i32* %5)
%7 = icmp eq i64 %6, 0
%8 = select i1 %7, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0)
ret i8* %8
}
int digit(int c) { return '0' <= c && c <= '9'; }


x86 assembly (clang, -O0):
<digit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
mov    $0x30,%ecx
cmp    -0x4(%rbp),%ecx
mov    %al,-0x5(%rbp)
jg     1124 <digit+0x24>
cmpl   $0x39,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<digit>:
add    $0xffffffd0,%edi
xor    %eax,%eax
cmp    $0xa,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @digit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 48, %3
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 57
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @digit(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ print_hello(char *);
int main() {
  print_hello("Android");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <print_hello@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <print_hello@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"Android\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @print_hello(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"Android\00"
define i32 @main() {
%1 = tail call i32 @print_hello(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
void utils_p() {
  printf("%s: %d: %s: %s\n",
         "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
         "2022-01-22/02-19-57/repos/Furzoom/demo-C/refs/heads/master/src/"
         "learn_makefile/utils.c",
         6, __func__, "");
}


x86 assembly (clang, -O0):
<utils_p>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xeee(%rip),%rsi
mov    $0x6,%edx
lea    0xf78(%rip),%rcx
lea    0xeda(%rip),%r8
mov    $0x0,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<utils_p>:
lea    0xee9(%rip),%rdi
lea    0xef2(%rip),%rsi
lea    0xf81(%rip),%rcx
lea    0xee3(%rip),%r8
mov    $0x6,%edx
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"%s: %d: %s: %s\0A\00"
@.str.1 = [150 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Furzoom/demo-C/refs/heads/master/src/learn_makefile/utils.c\00"
@__func__.utils_p = [8 x i8] c"utils_p\00"
@.str.2 = [1 x i8] zeroinitializer
define void @utils_p() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([150 x i8], [150 x i8]* @.str.1, i64 0, i64 0), i32 6, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @__func__.utils_p, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"%s: %d: %s: %s\0A\00"
@.str.1 = [150 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Furzoom/demo-C/refs/heads/master/src/learn_makefile/utils.c\00"
@__func__.utils_p = [8 x i8] c"utils_p\00"
@.str.2 = [1 x i8] zeroinitializer
define void @utils_p() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([150 x i8], [150 x i8]* @.str.1, i64 0, i64 0), i32 6, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @__func__.utils_p, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
void swap(char *a, char *b) {
  char c[200];
  strcpy(c, a);
  strcpy(a, b);
  strcpy(b, c);
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0xe0,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0xe0(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rdi
lea    -0xe0(%rbp),%rsi
call   1030 <strcpy@plt>
add    $0xe0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
push   %r15
push   %r14
push   %rbx
sub    $0xd0,%rsp
mov    %rsi,%r14
mov    %rdi,%rbx
mov    %rsp,%r15
mov    %r15,%rdi
mov    %rbx,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %r14,%rdi
mov    %r15,%rsi
call   1030 <strcpy@plt>
add    $0xd0,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @swap(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca [200 x i8]
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = getelementptr inbounds [200 x i8], [200 x i8]* %5, i64 0, i64 0
%7 = load i8*, i8** %3
%8 = call i32 @strcpy(i8* %6, i8* %7)
%9 = load i8*, i8** %3
%10 = load i8*, i8** %4
%11 = call i32 @strcpy(i8* %9, i8* %10)
%12 = load i8*, i8** %4
%13 = getelementptr inbounds [200 x i8], [200 x i8]* %5, i64 0, i64 0
%14 = call i32 @strcpy(i8* %12, i8* %13)
ret void
}

LLVM IR (-O2):
define void @swap(i8* %0, i8* %1) {
%3 = alloca [200 x i8]
%4 = getelementptr inbounds [200 x i8], [200 x i8]* %3, i64 0, i64 0
%5 = call i32 @strcpy(i8* %4, i8* %0)
%6 = call i32 @strcpy(i8* %0, i8* %1)
%7 = call i32 @strcpy(i8* %1, i8* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ PrintWarning();
int /*<<< orphan*/ UpdateOptions();
void DoSetHost() {
  UpdateOptions();
  PrintWarning();
}


x86 assembly (clang, -O0):
<DoSetHost>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <UpdateOptions@plt>
mov    $0x0,%al
call   1030 <PrintWarning@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoSetHost>:
push   %rax
xor    %eax,%eax
call   1040 <UpdateOptions@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <PrintWarning@plt>

LLVM IR (-O0):
define void @DoSetHost() {
%1 = call i32 (...) @UpdateOptions()
%2 = call i32 (...) @PrintWarning()
ret void
}

LLVM IR (-O2):
define void @DoSetHost() {
%1 = tail call i32 (...) @UpdateOptions()
%2 = tail call i32 (...) @PrintWarning()
ret void
}
/* Type definitions */
struct mscabd_cabinet {
  int dummy;
};
struct mscab_decompressor {
  int dummy;
};

/* Variables and functions */
int cabd_merge(struct mscab_decompressor *, struct mscabd_cabinet *,
               struct mscabd_cabinet *);
int cabd_prepend(struct mscab_decompressor *base, struct mscabd_cabinet *cab,
                 struct mscabd_cabinet *prevcab) {
  return cabd_merge(base, prevcab, cab);
}


x86 assembly (clang, -O0):
<cabd_prepend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <cabd_merge@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cabd_prepend>:
mov    %rsi,%rax
mov    %rdx,%rsi
mov    %rax,%rdx
jmp    1030 <cabd_merge@plt>

LLVM IR (-O0):
%struct.mscab_decompressor = type { i32 }
%struct.mscabd_cabinet = type { i32 }
define i32 @cabd_prepend(%struct.mscab_decompressor* %0, %struct.mscabd_cabinet* %1, %struct.mscabd_cabinet* %2) {
%4 = alloca %struct.mscab_decompressor*
%5 = alloca %struct.mscabd_cabinet*
%6 = alloca %struct.mscabd_cabinet*
store %struct.mscab_decompressor* %0, %struct.mscab_decompressor** %4
store %struct.mscabd_cabinet* %1, %struct.mscabd_cabinet** %5
store %struct.mscabd_cabinet* %2, %struct.mscabd_cabinet** %6
%7 = load %struct.mscab_decompressor*, %struct.mscab_decompressor** %4
%8 = load %struct.mscabd_cabinet*, %struct.mscabd_cabinet** %6
%9 = load %struct.mscabd_cabinet*, %struct.mscabd_cabinet** %5
%10 = call i32 @cabd_merge(%struct.mscab_decompressor* %7, %struct.mscabd_cabinet* %8, %struct.mscabd_cabinet* %9)
ret i32 %10
}

LLVM IR (-O2):
%struct.mscab_decompressor = type { i32 }
%struct.mscabd_cabinet = type { i32 }
define i32 @cabd_prepend(%struct.mscab_decompressor* %0, %struct.mscabd_cabinet* %1, %struct.mscabd_cabinet* %2) {
%4 = tail call i32 @cabd_merge(%struct.mscab_decompressor* %0, %struct.mscabd_cabinet* %2, %struct.mscabd_cabinet* %1)
ret i32 %4
}
/* Variables and functions */
int GetPindex();
int floor(int);
int Xcoord(int zI) {
  int x;
  if (zI >= GetPindex())
    zI++;
  if (19 % 2 == 1)
    x = zI % 19 - floor(19 / 2);
  else
    x = zI % 19 - (19 / 2 - 1);
  return x;
}


x86 assembly (clang, -O0):
<Xcoord>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <GetPindex@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
cmp    %ecx,%eax
jl     114e <Xcoord+0x2e>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x13,%ecx
cltd
idiv   %ecx
mov    %edx,-0x10(%rbp)
mov    $0x9,%edi
call   1040 <floor@plt>
mov    -0x10(%rbp),%edx
sub    %eax,%edx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Xcoord>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <GetPindex@plt>
xor    %ecx,%ecx
cmp    %ebx,%eax
setle  %cl
add    %ebx,%ecx
movslq %ecx,%rbx
imul   $0x6bca1af3,%rbx,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x23,%rax
add    %ecx,%eax
lea    (%rax,%rax,8),%ecx
lea    (%rax,%rcx,2),%eax
sub    %eax,%ebx
mov    $0x9,%edi
call   1040 <floor@plt>
sub    %eax,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @Xcoord(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 (...) @GetPindex()
%6 = icmp sge i32 %4, %5
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
store i32 %9, i32* %2
br label %10
10: ; preds = %7, %1
%11 = load i32, i32* %2
%12 = srem i32 %11, 19
%13 = call i32 @floor(i32 9)
%14 = sub nsw i32 %12, %13
store i32 %14, i32* %3
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @Xcoord(i32 %0) {
%2 = tail call i32 (...) @GetPindex()
%3 = icmp sle i32 %2, %0
%4 = zext i1 %3 to i32
%5 = add nsw i32 %4, %0
%6 = srem i32 %5, 19
%7 = tail call i32 @floor(i32 9)
%8 = sub nsw i32 %6, %7
ret i32 %8
}