xunge/DecIR huggingface dataset:
int test_imm_31uint16_mem(unsigned short *val) {
  return ((*val) & (-0x31 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_31uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffffcf,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_31uint16_mem>:
movzwl (%rdi),%eax
test   $0xffcf,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_31uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -49
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_31uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -49
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int do_920() { return 920; }


x86 assembly (clang, -O0):
<do_920>:
push   %rbp
mov    %rsp,%rbp
mov    $0x398,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_920>:
mov    $0x398,%eax
ret

LLVM IR (-O0):
define i32 @do_920() {
ret i32 920
}

LLVM IR (-O2):
define i32 @do_920() {
ret i32 920
}
int test_imm_5Euint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0x5E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Euint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0x5e,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Euint64_highword_reg>:
movabs $0x5e00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Euint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 94
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_5Euint64_highword_reg(i64 %0) {
%2 = and i64 %0, 403726925824
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
FNIEMOP_DEF(iemOp_mov_Rd_Td) {
  IEMOP_MNEMONIC("mov Rd,Td");
  return IEMOP_RAISE_INVALID_OPCODE();
}


x86 assembly (clang, -O0):
<FNIEMOP_DEF>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
mov    $0x0,%al
call   1040 <IEMOP_MNEMONIC@plt>
mov    $0x0,%al
call   1030 <IEMOP_RAISE_INVALID_OPCODE@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FNIEMOP_DEF>:
push   %rax
lea    0xed8(%rip),%rdi
xor    %eax,%eax
call   1040 <IEMOP_MNEMONIC@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <IEMOP_RAISE_INVALID_OPCODE@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"mov Rd,Td\00"
define i32 @FNIEMOP_DEF(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (i8*, ...) bitcast (i32 (...)* @IEMOP_MNEMONIC to i32 (i8*, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%4 = call i32 (...) @IEMOP_RAISE_INVALID_OPCODE()
ret i32 %4
}

LLVM IR (-O2):
@.str = [10 x i8] c"mov Rd,Td\00"
define i32 @FNIEMOP_DEF(i32 %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @IEMOP_MNEMONIC to i32 (i8*, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @IEMOP_RAISE_INVALID_OPCODE()
ret i32 %3
}
int _gfortran_caf_num_images(int distance __attribute__((unused)),
                             int failed __attribute__((unused))) {
  return 1;
}


x86 assembly (clang, -O0):
<_gfortran_caf_num_images>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_gfortran_caf_num_images>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @_gfortran_caf_num_images(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 1
}

LLVM IR (-O2):
define i32 @_gfortran_caf_num_images(i32 %0, i32 %1) {
ret i32 1
}
int test_imm_6Aint64_midword_reg(long long val) {
  return ((val >> 16) & (0x6A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Aint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0x6a,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Aint64_midword_reg>:
test   $0x6a0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Aint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 106
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_6Aint64_midword_reg(i64 %0) {
%2 = and i64 %0, 6946816
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void _sha256_be32enc(void *pp, uint32_t x) {
  uint8_t *p = (uint8_t *)pp;
  p[3] = x & 0xff;
  p[2] = (x >> 8) & 0xff;
  p[1] = (x >> 16) & 0xff;
  p[0] = (x >> 24) & 0xff;
}


x86 assembly (clang, -O0):
<_sha256_be32enc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0xc(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x10,%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x18,%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_sha256_be32enc>:
mov    %esi,%eax
movzbl %al,%ecx
mov    %ecx,0xc(%rdi)
movzbl %ah,%ecx
mov    %ecx,0x8(%rdi)
mov    %esi,%ecx
shr    $0x10,%ecx
movzbl %cl,%ecx
mov    %ecx,0x4(%rdi)
shr    $0x18,%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @_sha256_be32enc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %5
%8 = load i32, i32* %4
%9 = and i32 %8, 255
%10 = load i32*, i32** %5
%11 = getelementptr inbounds i32, i32* %10, i64 3
store i32 %9, i32* %11
%12 = load i32, i32* %4
%13 = ashr i32 %12, 8
%14 = and i32 %13, 255
%15 = load i32*, i32** %5
%16 = getelementptr inbounds i32, i32* %15, i64 2
store i32 %14, i32* %16
%17 = load i32, i32* %4
%18 = ashr i32 %17, 16
%19 = and i32 %18, 255
%20 = load i32*, i32** %5
%21 = getelementptr inbounds i32, i32* %20, i64 1
store i32 %19, i32* %21
%22 = load i32, i32* %4
%23 = ashr i32 %22, 24
%24 = and i32 %23, 255
%25 = load i32*, i32** %5
%26 = getelementptr inbounds i32, i32* %25, i64 0
store i32 %24, i32* %26
ret void
}

LLVM IR (-O2):
define void @_sha256_be32enc(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
%4 = and i32 %1, 255
%5 = getelementptr inbounds i8, i8* %0, i64 12
%6 = bitcast i8* %5 to i32*
store i32 %4, i32* %6
%7 = lshr i32 %1, 8
%8 = and i32 %7, 255
%9 = getelementptr inbounds i8, i8* %0, i64 8
%10 = bitcast i8* %9 to i32*
store i32 %8, i32* %10
%11 = lshr i32 %1, 16
%12 = and i32 %11, 255
%13 = getelementptr inbounds i8, i8* %0, i64 4
%14 = bitcast i8* %13 to i32*
store i32 %12, i32* %14
%15 = lshr i32 %1, 24
store i32 %15, i32* %3
ret void
}
/* Variables and functions */
char s_get_col_index(char);
char s_get_row_index(char);
char s_get_block_index(char i) {
  char ri = s_get_row_index(i);
  char ci = s_get_col_index(i);
  char bi = (3 * (ri / 3) + (ci / 3));
  return bi;
}


x86 assembly (clang, -O0):
<s_get_block_index>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <s_get_row_index@plt>
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%edi
call   1040 <s_get_col_index@plt>
mov    %al,-0x3(%rbp)
movsbl -0x2(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
imul   $0x3,%eax,%eax
mov    %eax,-0x8(%rbp)
movsbl -0x3(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
add    %ecx,%eax
mov    %al,-0x4(%rbp)
movsbl -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_get_block_index>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
call   1030 <s_get_row_index@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1040 <s_get_col_index@plt>
movsbl %bpl,%ecx
imul   $0x56,%ecx,%ecx
movzwl %cx,%ecx
mov    %ecx,%edx
shr    $0xf,%edx
shr    $0x8,%ecx
add    %dl,%cl
movzbl %cl,%ecx
lea    (%rcx,%rcx,2),%ecx
movsbl %al,%eax
imul   $0x56,%eax,%eax
movzwl %ax,%eax
mov    %eax,%edx
shr    $0xf,%edx
shr    $0x8,%eax
add    %dl,%al
add    %cl,%al
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define signext i8 @s_get_block_index(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
%4 = alloca i8
%5 = alloca i8
store i8 %0, i8* %2
%6 = load i8, i8* %2
%7 = call signext i8 @s_get_row_index(i8 signext %6)
store i8 %7, i8* %3
%8 = load i8, i8* %2
%9 = call signext i8 @s_get_col_index(i8 signext %8)
store i8 %9, i8* %4
%10 = load i8, i8* %3
%11 = sext i8 %10 to i32
%12 = sdiv i32 %11, 3
%13 = mul nsw i32 3, %12
%14 = load i8, i8* %4
%15 = sext i8 %14 to i32
%16 = sdiv i32 %15, 3
%17 = add nsw i32 %13, %16
%18 = trunc i32 %17 to i8
store i8 %18, i8* %5
%19 = load i8, i8* %5
ret i8 %19
}

LLVM IR (-O2):
define signext i8 @s_get_block_index(i8 signext %0) {
%2 = tail call signext i8 @s_get_row_index(i8 signext %0)
%3 = tail call signext i8 @s_get_col_index(i8 signext %0)
%4 = srem i8 %2, 3
%5 = sub i8 %2, %4
%6 = sdiv i8 %3, 3
%7 = add i8 %5, %6
ret i8 %7
}
void foo(void (*f)()) { f(); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   *-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
jmp    *%rdi

LLVM IR (-O0):
define void @foo(void (...)* %0) {
%2 = alloca void (...)*
store void (...)* %0, void (...)** %2
%3 = load void (...)*, void (...)** %2
ret void
}

LLVM IR (-O2):
define void @foo(void (...)* nocapture %0) {
tail call void (...) %0()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, long long, long long);
int dumpinfo(void *ctx, int rdbver, long long smr_seqnum,
             long long smr_mstime) {
  printf("Dump Start, rdbver:%d, smr_seqnum:%lld, smr_mstime:%lld\r\n", rdbver,
         smr_seqnum, smr_mstime);
  return 0;
}


x86 assembly (clang, -O0):
<dumpinfo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
lea    0xec7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dumpinfo>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [58 x i8] c"Dump Start, rdbver:%d, smr_seqnum:%lld, smr_mstime:%lld\0D\0A\00"
define i32 @dumpinfo(i8* %0, i32 %1, i64 %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i64
%8 = alloca i64
store i8* %0, i8** %5
store i32 %1, i32* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i32, i32* %6
%10 = load i64, i64* %7
%11 = load i64, i64* %8
%12 = call i32 @printf(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str, i64 0, i64 0), i32 %9, i64 %10, i64 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [58 x i8] c"Dump Start, rdbver:%d, smr_seqnum:%lld, smr_mstime:%lld\0D\0A\00"
define i32 @dumpinfo(i8* nocapture readnone %0, i32 %1, i64 %2, i64 %3) {
%5 = tail call i32 @printf(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str, i64 0, i64 0), i32 %1, i64 %2, i64 %3)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ array;

/* Variables and functions */
size_t randval(int);
const char *pickrandom(const char *array[]) {
  return array[randval(sizeof(array) / sizeof(*array))];
}


x86 assembly (clang, -O0):
<pickrandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x1,%edi
call   1030 <randval@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    (%rax,%rcx,8),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pickrandom>:
push   %rbx
mov    %rdi,%rbx
mov    $0x1,%edi
call   1030 <randval@plt>
mov    (%rbx,%rax,8),%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @pickrandom(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = call i64 @randval(i32 1)
%5 = getelementptr inbounds i8*, i8** %3, i64 %4
%6 = load i8*, i8** %5
ret i8* %6
}

LLVM IR (-O2):
define i8* @pickrandom(i8** nocapture %0) {
%2 = tail call i64 @randval(i32 1)
%3 = getelementptr inbounds i8*, i8** %0, i64 %2
%4 = load i8*, i8** %3
ret i8* %4
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ override_redirect;
};
struct TYPE_4__ {
  TYPE_1__ xreparent;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
int get_XEvent_xreparent_override_redirect(void *_p) {
  return (int)((XEvent *)_p)->xreparent.override_redirect;
}


x86 assembly (clang, -O0):
<get_XEvent_xreparent_override_redirect>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xreparent_override_redirect>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i32 @get_XEvent_xreparent_override_redirect(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_XEvent_xreparent_override_redirect(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
scalar_t__ EOF;
int /*<<< orphan*/ PrintYangHui(int);
int /*<<< orphan*/ printf(char *);
scalar_t__ scanf(char *, int *);
int main() {
  int n;
  while (scanf("%d", &n) != EOF) {
    PrintYangHui(n);
    printf("\n");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    0x2e92(%rip),%rcx
cmp    (%rcx),%rax
je     1178 <main+0x48>
mov    -0x8(%rbp),%edi
call   1040 <PrintYangHui@plt>
lea    0xe95(%rip),%rdi
call   1030 <printf@plt>
jmp    113f <main+0xf>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
lea    0xec0(%rip),%rdi
lea    0xc(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x2e97(%rip),%r15
cmp    (%r15),%rax
je     1193 <main+0x63>
lea    0xea3(%rip),%r14
lea    0xc(%rsp),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    0xc(%rsp),%edi
call   1040 <PrintYangHui@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1050 <scanf@plt>
cmp    (%r15),%rax
jne    1170 <main+0x40>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@EOF = global i64 0
@.str.1 = [2 x i8] c"\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %7, %0
%4 = call i64 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = load i64, i64* @EOF
%6 = icmp ne i64 %4, %5
br i1 %6, label %7, label %11
7: ; preds = %3
%8 = load i32, i32* %2
%9 = call i32 @PrintYangHui(i32 %8)
%10 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
br label %3
11: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@EOF = global i64 0
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i64 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i64, i64* @EOF
%5 = icmp eq i64 %3, %4
br i1 %5, label %13, label %6
6: ; preds = %0, %6
%7 = load i32, i32* %1
%8 = call i32 @PrintYangHui(i32 %7)
%9 = call i32 @putchar(i32 10)
%10 = call i64 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%11 = load i64, i64* @EOF
%12 = icmp eq i64 %10, %11
br i1 %12, label %13, label %6
13: ; preds = %6, %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ phandler();
void sig_int(int signo) { phandler(); }


x86 assembly (clang, -O0):
<sig_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <phandler@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_int>:
xor    %eax,%eax
jmp    1030 <phandler@plt>

LLVM IR (-O0):
define void @sig_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @phandler()
ret void
}

LLVM IR (-O2):
define void @sig_int(i32 %0) {
%2 = tail call i32 (...) @phandler()
ret void
}
/* Variables and functions */
scalar_t__ f();
scalar_t__ g();
int main(void) {
  f() && g();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <f@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
je     1159 <main+0x39>
mov    $0x0,%al
call   1040 <g@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <f@plt>
test   %rax,%rax
je     1134 <main+0x14>
xor    %eax,%eax
call   1040 <g@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 (...) @f()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %7
4: ; preds = %0
%5 = call i64 (...) @g()
%6 = icmp ne i64 %5, 0
br label %7
7: ; preds = %4, %0
%8 = phi i1 [ false, %0 ], [ %6, %4 ]
%9 = zext i1 %8 to i32
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 (...) @f()
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i64 (...) @g()
br label %5
5: ; preds = %3, %0
ret i32 0
}
void strreverse(char *begin, char *end) {
  char aux;
  while (end > begin) {
    aux = *end, *end-- = *begin, *begin++ = aux;
  }
}


x86 assembly (clang, -O0):
<strreverse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x8(%rbp),%rax
jbe    1153 <strreverse+0x53>
mov    -0x10(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x11(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%cl
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0xffffffffffffffff,%rdx
mov    %rdx,-0x10(%rbp)
mov    %cl,(%rax)
mov    -0x11(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
jmp    110c <strreverse+0xc>
pop    %rbp
ret

x86 assembly (clang, -O2):
<strreverse>:
cmp    %rdi,%rsi
jbe    112c <strreverse+0x2c>
add    $0xffffffffffffffff,%rsi
nopl   0x0(%rax)
movzbl 0x1(%rsi),%eax
movzbl (%rdi),%ecx
mov    %cl,0x1(%rsi)
mov    %al,(%rdi)
add    $0x1,%rdi
lea    -0x1(%rsi),%rax
cmp    %rdi,%rsi
mov    %rax,%rsi
ja     1110 <strreverse+0x10>
ret

LLVM IR (-O0):
define void @strreverse(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %6
6: ; preds = %10, %2
%7 = load i8*, i8** %4
%8 = load i8*, i8** %3
%9 = icmp ugt i8* %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
store i8 %12, i8* %5
%13 = load i8*, i8** %3
%14 = load i8, i8* %13
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i32 -1
store i8* %16, i8** %4
store i8 %14, i8* %15
%17 = load i8, i8* %5
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
store i8 %17, i8* %18
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @strreverse(i8* %0, i8* %1) {
%3 = icmp ugt i8* %1, %0
br i1 %3, label %4, label %12
4: ; preds = %2, %4
%5 = phi i8* [ %10, %4 ], [ %0, %2 ]
%6 = phi i8* [ %9, %4 ], [ %1, %2 ]
%7 = load i8, i8* %6
%8 = load i8, i8* %5
%9 = getelementptr inbounds i8, i8* %6, i64 -1
store i8 %8, i8* %6
%10 = getelementptr inbounds i8, i8* %5, i64 1
store i8 %7, i8* %5
%11 = icmp ugt i8* %9, %10
br i1 %11, label %4, label %12
12: ; preds = %4, %2
ret void
}
int _cmp(int _a, int _b) {
  int a = _a;
  int b = _b;
  return (a > b ? (-1) : (1));
}


x86 assembly (clang, -O0):
<_cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%esi
mov    $0x1,%eax
mov    $0xffffffff,%ecx
cmp    %esi,%edx
cmovg  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_cmp>:
xor    %eax,%eax
cmp    %esi,%edi
setle  %al
add    %eax,%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @_cmp(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
store i32 %7, i32* %5
%8 = load i32, i32* %4
store i32 %8, i32* %6
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = icmp sgt i32 %9, %10
%12 = zext i1 %11 to i64
%13 = select i1 %11, i32 -1, i32 1
ret i32 %13
}

LLVM IR (-O2):
define i32 @_cmp(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 -1, i32 1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_wfd_cfg_opp_ps_usage(void) {
  printf("Usage : wfd_cfg_opp_ps <enable|disable> [<CTWindow>]\n");
  printf("For 'set', both enable flag and CTWindow should be provided.\n");
  printf("If no parameter is specified,'get' is performed.\n");
  return;
}


x86 assembly (clang, -O0):
<print_wfd_cfg_opp_ps_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf0f(%rip),%rdi
call   1030 <printf@plt>
lea    0xf41(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_wfd_cfg_opp_ps_usage>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf11(%rip),%rdi
call   1030 <puts@plt>
lea    0xf42(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [54 x i8] c"Usage : wfd_cfg_opp_ps <enable|disable> [<CTWindow>]\0A\00"
@.str.1 = [62 x i8] c"For 'set', both enable flag and CTWindow should be provided.\0A\00"
@.str.2 = [50 x i8] c"If no parameter is specified,'get' is performed.\0A\00"
define void @print_wfd_cfg_opp_ps_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [53 x i8] c"Usage : wfd_cfg_opp_ps <enable|disable> [<CTWindow>]\00"
@str.3 = [61 x i8] c"For 'set', both enable flag and CTWindow should be provided.\00"
@str.4 = [49 x i8] c"If no parameter is specified,'get' is performed.\00"
define void @print_wfd_cfg_opp_ps_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([53 x i8], [53 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([61 x i8], [61 x i8]* @str.3, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([49 x i8], [49 x i8]* @str.4, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gets(char *);
int /*<<< orphan*/ printf(char *, double, double, double, char *);
void func(double param1, double param2, double param3) {
  char buf[8];
  gets(buf);
  printf("%f %f %f %s\n", param1, param2, param3, buf);
}


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
lea    -0x20(%rbp),%rdi
call   1040 <gets@plt>
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
lea    -0x20(%rbp),%rsi
lea    0xea6(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
push   %rbx
sub    $0x20,%rsp
movsd  %xmm2,0x10(%rsp)
movsd  %xmm1,0x8(%rsp)
movsd  %xmm0,(%rsp)
lea    0x18(%rsp),%rbx
mov    %rbx,%rdi
call   1040 <gets@plt>
lea    0xeb6(%rip),%rdi
movsd  (%rsp),%xmm0
movsd  0x8(%rsp),%xmm1
movsd  0x10(%rsp),%xmm2
mov    %rbx,%rsi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"%f %f %f %s\0A\00"
define void @func(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca [8 x i8]
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%8 = getelementptr inbounds [8 x i8], [8 x i8]* %7, i64 0, i64 0
%9 = call i32 @gets(i8* %8)
%10 = load double, double* %4
%11 = load double, double* %5
%12 = load double, double* %6
%13 = getelementptr inbounds [8 x i8], [8 x i8]* %7, i64 0, i64 0
%14 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), double %10, double %11, double %12, i8* %13)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"%f %f %f %s\0A\00"
define void @func(double %0, double %1, double %2) {
%4 = alloca [8 x i8]
%5 = getelementptr inbounds [8 x i8], [8 x i8]* %4, i64 0, i64 0
%6 = call i32 @gets(i8* %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), double %0, double %1, double %2, i8* %5)
ret void
}
int op_or(int x, int y) { return x | y; }


x86 assembly (clang, -O0):
<op_or>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
or     -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_or>:
mov    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @op_or(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = or i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @op_or(i32 %0, i32 %1) {
%3 = or i32 %1, %0
ret i32 %3
}
/* Type definitions */
struct timeval {
  int tv_usec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int select(int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/,
           int /*<<< orphan*/, struct timeval *);
int mpgedit_usleep(int usec) {
  struct timeval tv;
  int sts;
  tv.tv_sec = 0;
  tv.tv_usec = usec;
  sts = select(0, 0, 0, 0, &tv);
  return sts;
}


x86 assembly (clang, -O0):
<mpgedit_usleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
xor    %ecx,%ecx
lea    -0x18(%rbp),%r8
mov    %ecx,%edi
mov    %ecx,%esi
mov    %ecx,%edx
call   1030 <select@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpgedit_usleep>:
sub    $0x18,%rsp
movq   $0x0,0x10(%rsp)
mov    %edi,0x8(%rsp)
lea    0x8(%rsp),%r8
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
call   1030 <select@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i64 }
define i32 @mpgedit_usleep(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.timeval
%4 = alloca i32
store i32 %0, i32* %2
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i32 0, i32 1
store i64 0, i64* %5
%6 = load i32, i32* %2
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i32 0, i32 0
store i32 %6, i32* %7
%8 = call i32 @select(i32 0, i32 0, i32 0, i32 0, %struct.timeval* %3)
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
%struct.timeval = type { i32, i64 }
define i32 @mpgedit_usleep(i32 %0) {
%2 = alloca %struct.timeval
%3 = bitcast %struct.timeval* %2 to i8*
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i64 0, i32 1
store i64 0, i64* %4
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i64 0, i32 0
store i32 %0, i32* %5
%6 = call i32 @select(i32 0, i32 0, i32 0, i32 0, %struct.timeval* %2)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ errno;
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *, char *);
int /*<<< orphan*/ stderr;
char *strerror(int /*<<< orphan*/);
void die(const char *s) {
  fprintf(stderr, "error: %s (%s)\n", s, strerror(errno));
  exit(-1);
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e9d(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    0x2e81(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rdx
mov    %rax,%rcx
lea    0xe91(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<die>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2ea3(%rip),%rax
mov    (%rax),%ebp
mov    0x2e92(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
lea    0xeac(%rip),%rsi
mov    %ebp,%edi
mov    %rbx,%rdx
mov    %rax,%rcx
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [16 x i8] c"error: %s (%s)\0A\00"
@errno = global i32 0
define void @die(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = load i32, i32* @errno
%6 = call i8* @strerror(i32 %5)
%7 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %4, i8* %6)
%8 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [16 x i8] c"error: %s (%s)\0A\00"
@errno = global i32 0
define void @die(i8* %0) {
%2 = load i32, i32* @stderr
%3 = load i32, i32* @errno
%4 = tail call i8* @strerror(i32 %3)
%5 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %4)
%6 = tail call i32 @exit(i32 -1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_1915() {
  Assert_real((isqrt(1915) == 43),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              1305, ("Integer square root of 1915 should be 43"));
}


x86 assembly (clang, -O0):
<t_sqrt_1915>:
push   %rbp
mov    %rsp,%rbp
mov    $0x77b,%edi
call   1030 <isqrt@plt>
cmp    $0x2b,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0x519,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_1915>:
push   %rax
mov    $0x77b,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0x2b,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0x519,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [41 x i8] c"Integer square root of 1915 should be 43\00"
define void @t_sqrt_1915() {
%1 = call i32 @isqrt(i32 1915)
%2 = icmp eq i32 %1, 43
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1305, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [41 x i8] c"Integer square root of 1915 should be 43\00"
define void @t_sqrt_1915() {
%1 = tail call i32 @isqrt(i32 1915)
%2 = icmp eq i32 %1, 43
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1305, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int binFirstShift() { return 17; }


x86 assembly (clang, -O0):
<binFirstShift>:
push   %rbp
mov    %rsp,%rbp
mov    $0x11,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<binFirstShift>:
mov    $0x11,%eax
ret

LLVM IR (-O0):
define i32 @binFirstShift() {
ret i32 17
}

LLVM IR (-O2):
define i32 @binFirstShift() {
ret i32 17
}
int test_bit(int nr, const volatile void *addr, int *val) {
  int oldbit;
  asm volatile("btl %2,%1 ;\n \tsbbl %0,%0"
               : "=r"(oldbit)
               : "m"(addr), "Ir"(nr)
               : "memory");
  *val = oldbit;
  return oldbit;
}


x86 assembly (clang, -O0):
<test_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
bt     %eax,-0x10(%rbp)
sbb    %eax,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_bit>:
mov    %rsi,-0x8(%rsp)
bt     %edi,-0x8(%rsp)
sbb    %eax,%eax
mov    %eax,(%rdx)
ret

LLVM IR (-O0):
define i32 @test_bit(i32 %0, i8* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32* %2, i32** %6
%8 = load i32, i32* %4
%9 = call i32 asm sideeffect "btl $2,$1 ;\0A \09sbbl $0,$0", "=r,*m,Ir,~{memory},~{dirflag},~{fpsr},~{flags}"(i8** elementtype(i8*) %5, i32 %8)
store i32 %9, i32* %7
%10 = load i32, i32* %7
%11 = load i32*, i32** %6
store i32 %10, i32* %11
%12 = load i32, i32* %7
ret i32 %12
}

LLVM IR (-O2):
define i32 @test_bit(i32 %0, i8* %1, i32* nocapture writeonly %2) {
%4 = alloca i8*
store i8* %1, i8** %4
%5 = call i32 asm sideeffect "btl $2,$1 ;\0A \09sbbl $0,$0", "=r,*m,Ir,~{memory},~{dirflag},~{fpsr},~{flags}"(i8** elementtype(i8*) %4, i32 %0)
store i32 %5, i32* %2
ret i32 %5
}
double dp_add(double a, double b) { return a + b; }


x86 assembly (clang, -O0):
<dp_add>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dp_add>:
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @dp_add(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fadd double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @dp_add(double %0, double %1) {
%3 = fadd double %0, %1
ret double %3
}
/* Variables and functions */
double erfc1__(int /*<<< orphan*/, double);
double erfc(double x) { return erfc1__(0, x); }


x86 assembly (clang, -O0):
<erfc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xor    %edi,%edi
call   1030 <erfc1__@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<erfc>:
xor    %edi,%edi
jmp    1030 <erfc1__@plt>

LLVM IR (-O0):
define double @erfc(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @erfc1__(i32 0, double %3)
ret double %4
}

LLVM IR (-O2):
define double @erfc(double %0) {
%2 = tail call double @erfc1__(i32 0, double %0)
ret double %2
}
int fun1095() { return 1095; }


x86 assembly (clang, -O0):
<fun1095>:
push   %rbp
mov    %rsp,%rbp
mov    $0x447,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1095>:
mov    $0x447,%eax
ret

LLVM IR (-O0):
define i32 @fun1095() {
ret i32 1095
}

LLVM IR (-O2):
define i32 @fun1095() {
ret i32 1095
}
/* Variables and functions */
bool SHAREMIND_MAP_KEY_EQUALS_unsigned_short(unsigned short const k1,
                                             unsigned short const k2) {
  return k1 == k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_EQUALS_unsigned_short>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movzwl -0x2(%rbp),%eax
movzwl -0x4(%rbp),%ecx
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_EQUALS_unsigned_short>:
xor    %eax,%eax
cmp    %si,%di
sete   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_MAP_KEY_EQUALS_unsigned_short(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = load i16, i16* %4
%8 = zext i16 %7 to i32
%9 = icmp eq i32 %6, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @SHAREMIND_MAP_KEY_EQUALS_unsigned_short(i16 zeroext %0, i16 zeroext %1) {
%3 = icmp eq i16 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
void gtk_statusbar_get_type() {}


x86 assembly (clang, -O0):
<gtk_statusbar_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_statusbar_get_type>:
ret

LLVM IR (-O0):
define void @gtk_statusbar_get_type() {
ret void
}

LLVM IR (-O2):
define void @gtk_statusbar_get_type() {
ret void
}
void _Unwind_PNaClSetResult1() {}


x86 assembly (clang, -O0):
<_Unwind_PNaClSetResult1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Unwind_PNaClSetResult1>:
ret

LLVM IR (-O0):
define void @_Unwind_PNaClSetResult1() {
ret void
}

LLVM IR (-O2):
define void @_Unwind_PNaClSetResult1() {
ret void
}
float evaluate(float x, float y) {
  return ((1 - x) * (1 - x)) + 100 * (y - (x * x)) * (y - (x * x));
}


x86 assembly (clang, -O0):
<evaluate>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  0xeee(%rip),%xmm0
subss  -0x4(%rbp),%xmm0
movss  0xee1(%rip),%xmm2
subss  -0x4(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
movss  -0x4(%rbp),%xmm3
movss  -0x4(%rbp),%xmm4
movd   %xmm3,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm3
mulss  %xmm4,%xmm3
addss  %xmm1,%xmm3
movss  0xeac(%rip),%xmm1
mulss  %xmm3,%xmm1
movss  -0x8(%rbp),%xmm4
movss  -0x4(%rbp),%xmm3
movss  -0x4(%rbp),%xmm5
movd   %xmm3,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm3
mulss  %xmm5,%xmm3
addss  %xmm4,%xmm3
mulss  %xmm3,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<evaluate>:
movss  0xef8(%rip),%xmm2
subss  %xmm0,%xmm2
mulss  %xmm0,%xmm0
subss  %xmm0,%xmm1
movss  0xee8(%rip),%xmm0
mulss  %xmm1,%xmm0
mulss  %xmm1,%xmm0
mulss  %xmm2,%xmm2
addss  %xmm0,%xmm2
movaps %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @evaluate(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = fsub float 1.000000e+00, %5
%7 = load float, float* %3
%8 = fsub float 1.000000e+00, %7
%9 = load float, float* %4
%10 = load float, float* %3
%11 = load float, float* %3
%12 = fneg float %10
%13 = call float @llvm.fmuladd.f32(float %12, float %11, float %9)
%14 = fmul float 1.000000e+02, %13
%15 = load float, float* %4
%16 = load float, float* %3
%17 = load float, float* %3
%18 = fneg float %16
%19 = call float @llvm.fmuladd.f32(float %18, float %17, float %15)
%20 = fmul float %14, %19
%21 = call float @llvm.fmuladd.f32(float %6, float %8, float %20)
ret float %21
}

LLVM IR (-O2):
define float @evaluate(float %0, float %1) {
%3 = fsub float 1.000000e+00, %0
%4 = fneg float %0
%5 = tail call float @llvm.fmuladd.f32(float %4, float %0, float %1)
%6 = fmul float %5, 1.000000e+02
%7 = fmul float %5, %6
%8 = tail call float @llvm.fmuladd.f32(float %3, float %3, float %7)
ret float %8
}
/* Variables and functions */
scalar_t__ access(char const *, int /*<<< orphan*/);
int rename(char const *, char const *);
int osys_rename(const char *src_path, const char *dest_path, int clobber) {
  if (!clobber) {
    if (access(dest_path, 0) >= 0)
      return -1;
  }
  return rename(src_path, dest_path);
}


x86 assembly (clang, -O0):
<osys_rename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jne    1163 <osys_rename+0x43>
mov    -0x18(%rbp),%rdi
xor    %esi,%esi
call   1030 <access@plt>
cmp    $0x0,%rax
jl     115e <osys_rename+0x3e>
movl   $0xffffffff,-0x4(%rbp)
jmp    1173 <osys_rename+0x53>
jmp    1163 <osys_rename+0x43>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <rename@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<osys_rename>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
test   %edx,%edx
je     1140 <osys_rename+0x20>
mov    %r14,%rdi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <rename@plt>
mov    %rbx,%rdi
xor    %esi,%esi
call   1030 <access@plt>
test   %rax,%rax
js     112e <osys_rename+0xe>
mov    $0xffffffff,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @osys_rename(i8* %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%8 = load i32, i32* %7
%9 = icmp ne i32 %8, 0
br i1 %9, label %16, label %10
10: ; preds = %3
%11 = load i8*, i8** %6
%12 = call i64 @access(i8* %11, i32 0)
%13 = icmp sge i64 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %10
store i32 -1, i32* %4
br label %20
15: ; preds = %10
br label %16
16: ; preds = %15, %3
%17 = load i8*, i8** %5
%18 = load i8*, i8** %6
%19 = call i32 @rename(i8* %17, i8* %18)
store i32 %19, i32* %4
br label %20
20: ; preds = %16, %14
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @osys_rename(i8* nocapture %0, i8* nocapture %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %5, label %8
5: ; preds = %3
%6 = tail call i64 @access(i8* %1, i32 0)
%7 = icmp sgt i64 %6, -1
br i1 %7, label %10, label %8
8: ; preds = %5, %3
%9 = tail call i32 @rename(i8* %0, i8* %1)
br label %10
10: ; preds = %5, %8
%11 = phi i32 [ %9, %8 ], [ -1, %5 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ quicksort(int *, int /*<<< orphan*/, size_t);
void qsort_wrapper(int a[], size_t n) { quicksort(a, 0, n - 1); }


x86 assembly (clang, -O0):
<qsort_wrapper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
sub    $0x1,%rdx
xor    %esi,%esi
call   1030 <quicksort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qsort_wrapper>:
lea    -0x1(%rsi),%rdx
xor    %esi,%esi
jmp    1030 <quicksort@plt>

LLVM IR (-O0):
define void @qsort_wrapper(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
store i32* %0, i32** %3
store i64 %1, i64* %4
%5 = load i32*, i32** %3
%6 = load i64, i64* %4
%7 = sub i64 %6, 1
%8 = call i32 @quicksort(i32* %5, i32 0, i64 %7)
ret void
}

LLVM IR (-O2):
define void @qsort_wrapper(i32* %0, i64 %1) {
%3 = add i64 %1, -1
%4 = tail call i32 @quicksort(i32* %0, i32 0, i64 %3)
ret void
}
/* Variables and functions */
scalar_t__ iswhite(char);
int isnwhite(char c) { return iswhite(c) || c == '\0'; }


x86 assembly (clang, -O0):
<isnwhite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <iswhite@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x2(%rbp)
jne    1146 <isnwhite+0x36>
movsbl -0x1(%rbp),%eax
cmp    $0x0,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isnwhite>:
push   %rbx
mov    %edi,%ebx
call   1030 <iswhite@plt>
test   %rax,%rax
setne  %al
test   %bl,%bl
sete   %cl
or     %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isnwhite(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @iswhite(i8 signext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @isnwhite(i8 signext %0) {
%2 = tail call i64 @iswhite(i8 signext %0)
%3 = icmp ne i64 %2, 0
%4 = icmp eq i8 %0, 0
%5 = or i1 %4, %3
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(double *, double const *, int);
void cvector_memcpy(double *vdest, const double *vorg, int n) {
  memcpy(vdest, vorg, n * sizeof(double));
}


x86 assembly (clang, -O0):
<cvector_memcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movslq -0x14(%rbp),%rax
shl    $0x3,%rax
mov    %eax,%edx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvector_memcpy>:
shl    $0x3,%edx
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @cvector_memcpy(double* %0, double* %1, i32 %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca i32
store double* %0, double** %4
store double* %1, double** %5
store i32 %2, i32* %6
%7 = load double*, double** %4
%8 = load double*, double** %5
%9 = load i32, i32* %6
%10 = sext i32 %9 to i64
%11 = mul i64 %10, 8
%12 = trunc i64 %11 to i32
%13 = call i32 @memcpy(double* %7, double* %8, i32 %12)
ret void
}

LLVM IR (-O2):
define void @cvector_memcpy(double* %0, double* %1, i32 %2) {
%4 = shl i32 %2, 3
%5 = tail call i32 @memcpy(double* %0, double* %1, i32 %4)
ret void
}
/* Type definitions */
typedef unsigned int uint64_t;

/* Variables and functions */
uint64_t bit(unsigned b) { return ((uint64_t)1) << b; }


x86 assembly (clang, -O0):
<bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit>:
mov    %edi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
ret

LLVM IR (-O0):
define i32 @bit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 1, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @bit(i32 %0) {
%2 = shl nuw i32 1, %0
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ errno;
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, char *);
int /*<<< orphan*/ stderr;
char *strerror(int /*<<< orphan*/);
void error(char *message) {
  fprintf(stderr, "%s: %s\n", message, strerror(errno));
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    0x2e91(%rip),%rax
mov    (%rax),%edi
call   1040 <strerror@plt>
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rdx
mov    %rax,%rcx
lea    0xea1(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<error>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2eb3(%rip),%rax
mov    (%rax),%ebp
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
call   1040 <strerror@plt>
lea    0xebc(%rip),%rsi
mov    %ebp,%edi
mov    %rbx,%rdx
mov    %rax,%rcx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
@errno = global i32 0
define void @error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = load i32, i32* @errno
%6 = call i8* @strerror(i32 %5)
%7 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %4, i8* %6)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
@errno = global i32 0
define void @error(i8* %0) {
%2 = load i32, i32* @stderr
%3 = load i32, i32* @errno
%4 = tail call i8* @strerror(i32 %3)
%5 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %4)
ret void
}