xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ EOF;
scalar_t__ get_word(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ stdin;
int main(void) {
  char buf[256];
  while (get_word(buf, 256, stdin) != EOF) {
    printf("<<%s>>\n", buf);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x110(%rbp),%rdi
mov    0x2ea8(%rip),%rax
mov    (%rax),%edx
mov    $0x100,%esi
call   1040 <get_word@plt>
mov    0x2e8d(%rip),%rcx
cmp    (%rcx),%rax
je     1174 <main+0x54>
lea    -0x110(%rbp),%rsi
lea    0xe96(%rip),%rdi
call   1030 <printf@plt>
jmp    1132 <main+0x12>
xor    %eax,%eax
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %r12
push   %rbx
sub    $0x108,%rsp
mov    0x2eb3(%rip),%r15
mov    (%r15),%edx
mov    %rsp,%rdi
mov    $0x100,%esi
call   1040 <get_word@plt>
mov    0x2e94(%rip),%r12
cmp    (%r12),%rax
je     1181 <main+0x61>
lea    0xea7(%rip),%r14
mov    %rsp,%rbx
nopl   0x0(%rax)
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
mov    (%r15),%edx
mov    %rbx,%rdi
mov    $0x100,%esi
call   1040 <get_word@plt>
cmp    (%r12),%rax
jne    1160 <main+0x40>
xor    %eax,%eax
add    $0x108,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@stdin = global i32 0
@EOF = global i64 0
@.str = [8 x i8] c"<<%s>>\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [256 x i8]
store i32 0, i32* %1
br label %3
3: ; preds = %9, %0
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %2, i64 0, i64 0
%5 = load i32, i32* @stdin
%6 = call i64 @get_word(i8* %4, i32 256, i32 %5)
%7 = load i64, i64* @EOF
%8 = icmp ne i64 %6, %7
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = getelementptr inbounds [256 x i8], [256 x i8]* %2, i64 0, i64 0
%11 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %10)
br label %3
12: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@stdin = global i32 0
@EOF = global i64 0
@.str = [8 x i8] c"<<%s>>\0A\00"
define i32 @main() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = load i32, i32* @stdin
%4 = call i64 @get_word(i8* %2, i32 256, i32 %3)
%5 = load i64, i64* @EOF
%6 = icmp eq i64 %4, %5
br i1 %6, label %13, label %7
7: ; preds = %0, %7
%8 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %2)
%9 = load i32, i32* @stdin
%10 = call i64 @get_word(i8* %2, i32 256, i32 %9)
%11 = load i64, i64* @EOF
%12 = icmp eq i64 %10, %11
br i1 %12, label %13, label %7
13: ; preds = %7, %0
ret i32 0
}
void prefetch(void *x __attribute__((unused))) {}


x86 assembly (clang, -O0):
<prefetch>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<prefetch>:
ret

LLVM IR (-O0):
define void @prefetch(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @prefetch(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ console_puts(char *);
void console_bs() {
  char seq[4] = "\b \b";
  console_puts(seq);
}


x86 assembly (clang, -O0):
<console_bs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xee2(%rip),%eax
mov    %eax,-0x4(%rbp)
lea    -0x4(%rbp),%rdi
call   1030 <console_puts@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<console_bs>:
push   %rax
movl   $0x82008,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1030 <console_puts@plt>
pop    %rax
ret

LLVM IR (-O0):
@__const.console_bs.seq = [4 x i8] c"\08 \08\00"
define void @console_bs() {
%1 = alloca [4 x i8]
%2 = bitcast [4 x i8]* %1 to i8*
%3 = getelementptr inbounds [4 x i8], [4 x i8]* %1, i64 0, i64 0
%4 = call i32 @console_puts(i8* %3)
ret void
}

LLVM IR (-O2):
define void @console_bs() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 532488, i32* %1
%3 = call i32 @console_puts(i8* %2)
ret void
}
void foo1(int *a) { *a = 1; }


x86 assembly (clang, -O0):
<foo1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo1>:
movl   $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @foo1(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
store i32 1, i32* %3
ret void
}

LLVM IR (-O2):
define void @foo1(i32* nocapture writeonly %0) {
store i32 1, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SOL_SOCKET;
int /*<<< orphan*/ SO_DEBUG;
int diminuto_ipc_set_socket(int, int /*<<< orphan*/, int /*<<< orphan*/, int);
int diminuto_ipc_set_debug(int fd, int enable) {
  return diminuto_ipc_set_socket(fd, SOL_SOCKET, SO_DEBUG, !!enable);
}


x86 assembly (clang, -O0):
<diminuto_ipc_set_debug>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
mov    0x2eaf(%rip),%rax
mov    (%rax),%edx
cmpl   $0x0,-0x8(%rbp)
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%ecx
call   1030 <diminuto_ipc_set_socket@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<diminuto_ipc_set_debug>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec0(%rip),%rcx
mov    (%rcx),%edx
xor    %ecx,%ecx
test   %esi,%esi
setne  %cl
mov    %eax,%esi
jmp    1030 <diminuto_ipc_set_socket@plt>

LLVM IR (-O0):
@SOL_SOCKET = global i32 0
@SO_DEBUG = global i32 0
define i32 @diminuto_ipc_set_debug(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* @SOL_SOCKET
%7 = load i32, i32* @SO_DEBUG
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
%11 = xor i1 %10, true
%12 = zext i1 %11 to i32
%13 = call i32 @diminuto_ipc_set_socket(i32 %5, i32 %6, i32 %7, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
@SOL_SOCKET = global i32 0
@SO_DEBUG = global i32 0
define i32 @diminuto_ipc_set_debug(i32 %0, i32 %1) {
%3 = load i32, i32* @SOL_SOCKET
%4 = load i32, i32* @SO_DEBUG
%5 = icmp ne i32 %1, 0
%6 = zext i1 %5 to i32
%7 = tail call i32 @diminuto_ipc_set_socket(i32 %0, i32 %3, i32 %4, i32 %6)
ret i32 %7
}
/* Type definitions */
struct in_addr {
  int dummy;
};

/* Variables and functions */
scalar_t__ inet_aton(char *, struct in_addr *);
int validaddr(char *addr) {
  struct in_addr outaddr;
  if (!addr) {
    return (1);
  }
  if (inet_aton(addr, &outaddr) == 0) {
    return (1);
  }
  return (0);
}


x86 assembly (clang, -O0):
<validaddr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1133 <validaddr+0x23>
movl   $0x1,-0x4(%rbp)
jmp    115d <validaddr+0x4d>
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <inet_aton@plt>
cmp    $0x0,%rax
jne    1156 <validaddr+0x46>
movl   $0x1,-0x4(%rbp)
jmp    115d <validaddr+0x4d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<validaddr>:
test   %rdi,%rdi
je     112e <validaddr+0x1e>
push   %rax
mov    %rsp,%rsi
call   1030 <inet_aton@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
add    $0x8,%rsp
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.in_addr = type { i32 }
define i32 @validaddr(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.in_addr
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 1, i32* %2
br label %14
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i64 @inet_aton(i8* %9, %struct.in_addr* %4)
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 1, i32* %2
br label %14
13: ; preds = %8
store i32 0, i32* %2
br label %14
14: ; preds = %13, %12, %7
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
%struct.in_addr = type { i32 }
define i32 @validaddr(i8* %0) {
%2 = alloca %struct.in_addr
%3 = bitcast %struct.in_addr* %2 to i8*
%4 = icmp eq i8* %0, null
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = call i64 @inet_aton(i8* %0, %struct.in_addr* %2)
%7 = icmp eq i64 %6, 0
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %5, %1
%10 = phi i32 [ 1, %1 ], [ %8, %5 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ csi_input();
char const *skip_prefix_2(int /*<<< orphan*/, char const *);
const char *skip_csi_2(const char *input) {
  if ((unsigned char)*input == 0233) {
    return input + 1;
  }
  return skip_prefix_2(csi_input(), input);
}


x86 assembly (clang, -O0):
<skip_csi_2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
cmp    $0x9b,%eax
jne    114f <skip_csi_2+0x2f>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1165 <skip_csi_2+0x45>
mov    $0x0,%al
call   1030 <csi_input@plt>
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
call   1040 <skip_prefix_2@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_csi_2>:
push   %rbx
mov    %rdi,%rbx
cmpb   $0x9b,(%rdi)
jne    1132 <skip_csi_2+0x12>
add    $0x1,%rbx
mov    %rbx,%rax
pop    %rbx
ret
xor    %eax,%eax
call   1030 <csi_input@plt>
mov    %eax,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <skip_prefix_2@plt>

LLVM IR (-O0):
define i8* @skip_csi_2(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = icmp eq i32 %6, 155
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 1
store i8* %10, i8** %2
br label %15
11: ; preds = %1
%12 = call i32 (...) @csi_input()
%13 = load i8*, i8** %3
%14 = call i8* @skip_prefix_2(i32 %12, i8* %13)
store i8* %14, i8** %2
br label %15
15: ; preds = %11, %8
%16 = load i8*, i8** %2
ret i8* %16
}

LLVM IR (-O2):
define i8* @skip_csi_2(i8* %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, -101
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = getelementptr inbounds i8, i8* %0, i64 1
br label %9
6: ; preds = %1
%7 = tail call i32 (...) @csi_input()
%8 = tail call i8* @skip_prefix_2(i32 %7, i8* %0)
br label %9
9: ; preds = %6, %4
%10 = phi i8* [ %5, %4 ], [ %8, %6 ]
ret i8* %10
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
void simple_string_left_trim(const char *self, char c, char buf[]) {
  char *s = (char *)self;
  while (*s != 0 && *s == c) {
    s++;
  }
  strcpy(buf, s);
}


x86 assembly (clang, -O0):
<simple_string_left_trim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x21(%rbp)
je     1156 <simple_string_left_trim+0x46>
mov    -0x20(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
sete   %al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%al
test   $0x1,%al
jne    1166 <simple_string_left_trim+0x56>
jmp    1177 <simple_string_left_trim+0x67>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    112e <simple_string_left_trim+0x1e>
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <strcpy@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<simple_string_left_trim>:
mov    %rdi,%rax
add    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
movzbl 0x1(%rax),%ecx
add    $0x1,%rax
test   %cl,%cl
je     1131 <simple_string_left_trim+0x21>
cmp    %sil,%cl
je     1120 <simple_string_left_trim+0x10>
mov    %rdx,%rdi
mov    %rax,%rsi
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
define void @simple_string_left_trim(i8* %0, i8 signext %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8*
%7 = alloca i8*
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8* %2, i8** %6
%8 = load i8*, i8** %4
store i8* %8, i8** %7
br label %9
9: ; preds = %23, %3
%10 = load i8*, i8** %7
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %21
14: ; preds = %9
%15 = load i8*, i8** %7
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = load i8, i8* %5
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %17, %19
br label %21
21: ; preds = %14, %9
%22 = phi i1 [ false, %9 ], [ %20, %14 ]
br i1 %22, label %23, label %26
23: ; preds = %21
%24 = load i8*, i8** %7
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %7
br label %9
26: ; preds = %21
%27 = load i8*, i8** %6
%28 = load i8*, i8** %7
%29 = call i32 @strcpy(i8* %27, i8* %28)
ret void
}

LLVM IR (-O2):
define void @simple_string_left_trim(i8* %0, i8 signext %1, i8* %2) {
br label %4
4: ; preds = %4, %3
%5 = phi i8* [ %0, %3 ], [ %10, %4 ]
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
%8 = icmp eq i8 %6, %1
%9 = and i1 %7, %8
%10 = getelementptr inbounds i8, i8* %5, i64 1
br i1 %9, label %4, label %11
11: ; preds = %4
%12 = tail call i32 @strcpy(i8* %2, i8* %5)
ret void
}
char *skip_not_white(char *sin) {
  char *s;
  for (s = sin; (*s != ' ') && (*s != '\t') && (*s != '\0'); s++)
    ;
  return (s);
}


x86 assembly (clang, -O0):
<skip_not_white>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x20,%ecx
mov    %al,-0x11(%rbp)
je     114a <skip_not_white+0x4a>
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x9,%ecx
mov    %al,-0x11(%rbp)
je     114a <skip_not_white+0x4a>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    115a <skip_not_white+0x5a>
jmp    1170 <skip_not_white+0x70>
jmp    115f <skip_not_white+0x5f>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <skip_not_white+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_not_white>:
mov    %rdi,%rax
movabs $0x100000201,%rcx
jmp    1114 <skip_not_white+0x14>
nop
add    $0x1,%rax
movzbl (%rax),%edx
cmp    $0x20,%rdx
ja     1110 <skip_not_white+0x10>
bt     %rdx,%rcx
jae    1110 <skip_not_white+0x10>
ret

LLVM IR (-O0):
define i8* @skip_not_white(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %23, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 32
br i1 %9, label %10, label %20
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp ne i32 %13, 9
br i1 %14, label %15, label %20
15: ; preds = %10
%16 = load i8*, i8** %3
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp ne i32 %18, 0
br label %20
20: ; preds = %15, %10, %5
%21 = phi i1 [ false, %10 ], [ false, %5 ], [ %19, %15 ]
br i1 %21, label %22, label %26
22: ; preds = %20
br label %23
23: ; preds = %22
%24 = load i8*, i8** %3
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %3
br label %5
26: ; preds = %20
%27 = load i8*, i8** %3
ret i8* %27
}

LLVM IR (-O2):
define i8* @skip_not_white(i8* %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i8* [ %0, %1 ], [ %6, %5 ]
%4 = load i8, i8* %3
switch i8 %4, label %5 [
i8 32, label %7
i8 9, label %7
i8 0, label %7
]
5: ; preds = %2
%6 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
7: ; preds = %2, %2, %2
ret i8* %3
}
int isspace(int c) {
  return c == ' ' || c == '\n' || c == '\r' || c == '\t' || c == '\v' ||
         c == '\f';
}


x86 assembly (clang, -O0):
<isspace>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115c <isspace+0x5c>
mov    $0x1,%al
cmpl   $0xa,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115c <isspace+0x5c>
mov    $0x1,%al
cmpl   $0xd,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115c <isspace+0x5c>
mov    $0x1,%al
cmpl   $0x9,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115c <isspace+0x5c>
mov    $0x1,%al
cmpl   $0xb,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115c <isspace+0x5c>
cmpl   $0xc,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isspace>:
cmp    $0x20,%edi
ja     111d <isspace+0x1d>
mov    $0x1,%eax
mov    %edi,%ecx
movabs $0x100002e00,%rdx
bt     %rcx,%rdx
jae    111d <isspace+0x1d>
ret
xor    %eax,%eax
cmp    $0xc,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @isspace(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 32
br i1 %4, label %20, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 10
br i1 %7, label %20, label %8
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 13
br i1 %10, label %20, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 9
br i1 %13, label %20, label %14
14: ; preds = %11
%15 = load i32, i32* %2
%16 = icmp eq i32 %15, 11
br i1 %16, label %20, label %17
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp eq i32 %18, 12
br label %20
20: ; preds = %17, %14, %11, %8, %5, %1
%21 = phi i1 [ true, %14 ], [ true, %11 ], [ true, %8 ], [ true, %5 ], [ true, %1 ], [ %19, %17 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @isspace(i32 %0) {
switch i32 %0, label %2 [
i32 32, label %5
i32 13, label %5
i32 11, label %5
i32 10, label %5
i32 9, label %5
]
2: ; preds = %1
%3 = icmp eq i32 %0, 12
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
void metric_der_shift(const double x[3], double db[12]) {
  int i;
  for (i = 0; i < 12; i++)
    db[i] = 0;
}


x86 assembly (clang, -O0):
<metric_der_shift>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0xc,-0x14(%rbp)
jge    113b <metric_der_shift+0x3b>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
xorps  %xmm0,%xmm0
movsd  %xmm0,(%rax,%rcx,8)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <metric_der_shift+0x13>
pop    %rbp
ret

x86 assembly (clang, -O2):
<metric_der_shift>:
xorps  %xmm0,%xmm0
movups %xmm0,0x50(%rsi)
movups %xmm0,0x40(%rsi)
movups %xmm0,0x30(%rsi)
movups %xmm0,0x20(%rsi)
movups %xmm0,0x10(%rsi)
movups %xmm0,(%rsi)
ret

LLVM IR (-O0):
define void @metric_der_shift(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
%5 = alloca i32
store double* %0, double** %3
store double* %1, double** %4
store i32 0, i32* %5
br label %6
6: ; preds = %14, %2
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 12
br i1 %8, label %9, label %17
9: ; preds = %6
%10 = load double*, double** %4
%11 = load i32, i32* %5
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds double, double* %10, i64 %12
store double 0.000000e+00, double* %13
br label %14
14: ; preds = %9
%15 = load i32, i32* %5
%16 = add nsw i32 %15, 1
store i32 %16, i32* %5
br label %6
17: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @metric_der_shift(double* nocapture readnone %0, double* nocapture writeonly %1) {
%3 = bitcast double* %1 to i8*
ret void
}
void _Locale_ctype_destroy(struct _Locale_ctype *lctype
                           __attribute__((__unused__))) {}


x86 assembly (clang, -O0):
<_Locale_ctype_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Locale_ctype_destroy>:
ret

LLVM IR (-O0):
%struct._Locale_ctype = type opaque
define void @_Locale_ctype_destroy(%struct._Locale_ctype* %0) {
%2 = alloca %struct._Locale_ctype*
store %struct._Locale_ctype* %0, %struct._Locale_ctype** %2
ret void
}

LLVM IR (-O2):
%struct._Locale_ctype = type opaque
define void @_Locale_ctype_destroy(%struct._Locale_ctype* nocapture %0) {
ret void
}
long double asinl(long double x) { return __builtin_asinl(x); }


x86 assembly (clang, -O0):
<asinl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <asinl@plt>
fld    %st(0)
fstp   %st(0)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<asinl>:
fldt   0x8(%rsp)
fld1
fld    %st(0)
fchs
fucomip %st(2),%st
ja     1121 <asinl+0x21>
fxch   %st(1)
fucomip %st(1),%st
fstp   %st(0)
fldz
fldz
ja     1121 <asinl+0x21>
fstp   %st(1)
fstp   %st(0)
fldz
ret
fstp   %st(1)
fstp   %st(0)
cs nopw 0x0(%rax,%rax,1)
nop
jmp    1130 <asinl+0x30>

LLVM IR (-O0):
define x86_fp80 @asinl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call x86_fp80 @asinl(x86_fp80 %3)
ret x86_fp80 %4
}

LLVM IR (-O2):
define x86_fp80 @asinl(x86_fp80 %0) {
%2 = fcmp ogt x86_fp80 %0, 0xK3FFF8000000000000000
%3 = fcmp olt x86_fp80 %0, 0xKBFFF8000000000000000
%4 = or i1 %3, %2
br i1 %4, label %5, label %6
5: ; preds = %1, %5
br label %5
6: ; preds = %1
ret x86_fp80 undef
}
int utf8len(const char *s) {
  int len = 0;
  while (*s)
    len += (*(s++) & 0xC0) != 0x80;
  return len;
}


x86 assembly (clang, -O0):
<utf8len>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     114b <utf8len+0x4b>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
and    $0xc0,%eax
cmp    $0x80,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    110f <utf8len+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utf8len>:
mov    (%rdi),%cl
test   %cl,%cl
je     1129 <utf8len+0x29>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
and    $0xc0,%cl
xor    %edx,%edx
cmp    $0x80,%cl
setne  %dl
add    %edx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <utf8len+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @utf8len(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %18
8: ; preds = %4
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
%11 = load i8, i8* %9
%12 = sext i8 %11 to i32
%13 = and i32 %12, 192
%14 = icmp ne i32 %13, 128
%15 = zext i1 %14 to i32
%16 = load i32, i32* %3
%17 = add nsw i32 %16, %15
store i32 %17, i32* %3
br label %4
18: ; preds = %4
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @utf8len(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %13, %4 ], [ %2, %1 ]
%6 = phi i32 [ %12, %4 ], [ 0, %1 ]
%7 = phi i8* [ %8, %4 ], [ %0, %1 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = and i8 %5, -64
%10 = icmp ne i8 %9, -128
%11 = zext i1 %10 to i32
%12 = add nuw nsw i32 %6, %11
%13 = load i8, i8* %8
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %4, %1
%16 = phi i32 [ 0, %1 ], [ %12, %4 ]
ret i32 %16
}
int test_imm_30int32_reg(int val) { return ((val) & (0x30 << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_30int32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x30,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_30int32_reg>:
test   $0x30,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_30int32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 48
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_30int32_reg(i32 %0) {
%2 = and i32 %0, 48
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int test();
int main() {
  if (test() != 196)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <test@plt>
cmp    $0xc4,%eax
je     1148 <main+0x28>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <test@plt>
cmp    $0xc4,%eax
jne    1133 <main+0x13>
xor    %eax,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test()
%3 = icmp ne i32 %2, 196
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @abort()
unreachable
6: ; preds = %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test()
%2 = icmp eq i32 %1, 196
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
ret i32 0
}
/* Variables and functions */
char *deconst_string(int /*<<< orphan*/);
int /*<<< orphan*/ strchug_fast_c(char *);
__attribute__((pure)) char *strchug_fast(char *p) {
  return deconst_string(strchug_fast_c(p));
}


x86 assembly (clang, -O0):
<strchug_fast>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strchug_fast_c@plt>
mov    %eax,%edi
call   1040 <deconst_string@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strchug_fast>:
push   %rax
call   1030 <strchug_fast_c@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <deconst_string@plt>

LLVM IR (-O0):
define i8* @strchug_fast(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strchug_fast_c(i8* %3)
%5 = call i8* @deconst_string(i32 %4)
ret i8* %5
}

LLVM IR (-O2):
define i8* @strchug_fast(i8* %0) {
%2 = tail call i32 @strchug_fast_c(i8* %0)
%3 = tail call i8* @deconst_string(i32 %2)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char const *);
unsigned int u8_strlen_b(char const *, int /*<<< orphan*/);
unsigned int u8_strlen(const char *str) {
  return u8_strlen_b(str, strlen(str));
}


x86 assembly (clang, -O0):
<u8_strlen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1040 <u8_strlen_b@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<u8_strlen>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <u8_strlen_b@plt>

LLVM IR (-O0):
define i32 @u8_strlen(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = call i32 @u8_strlen_b(i8* %3, i32 %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @u8_strlen(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32 @u8_strlen_b(i8* %0, i32 %2)
ret i32 %3
}
void getX86CpuIDAndInfoEx(unsigned value, unsigned subleaf, unsigned *rEAX,
                          unsigned *rEBX, unsigned *rECX, unsigned *rEDX) {
  asm("movq\t%%rbx, %%rsi\n\t"
      "cpuid\n\t"
      "xchgq\t%%rbx, %%rsi\n\t"
      : "=a"(*rEAX), "=S"(*rEBX), "=c"(*rECX), "=d"(*rEDX)
      : "a"(value), "c"(subleaf));
}


x86 assembly (clang, -O0):
<getX86CpuIDAndInfoEx>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x10(%rbp),%r9
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    %rbx,%rsi
cpuid
xchg   %rsi,%rbx
mov    %eax,%r10d
mov    -0x38(%rbp),%rax
mov    %esi,%r8d
mov    %ecx,%esi
mov    -0x30(%rbp),%rcx
mov    %r10d,(%r9)
mov    %r8d,(%rdi)
mov    %esi,(%rcx)
mov    %edx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<getX86CpuIDAndInfoEx>:
mov    %rcx,%r10
mov    %rdx,%r11
mov    %esi,%ecx
mov    %edi,%eax
mov    %rbx,%rsi
cpuid
xchg   %rsi,%rbx
mov    %eax,(%r11)
mov    %esi,(%r10)
mov    %ecx,(%r8)
mov    %edx,(%r9)
ret

LLVM IR (-O0):
define void @getX86CpuIDAndInfoEx(i32 %0, i32 %1, i32* %2, i32* %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32*
%10 = alloca i32*
%11 = alloca i32*
%12 = alloca i32*
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32* %2, i32** %9
store i32* %3, i32** %10
store i32* %4, i32** %11
store i32* %5, i32** %12
%13 = load i32*, i32** %9
%14 = load i32*, i32** %10
%15 = load i32*, i32** %11
%16 = load i32*, i32** %12
%17 = load i32, i32* %7
%18 = load i32, i32* %8
%19 = call { i32, i32, i32, i32 } asm "movq\09%rbx, %rsi\0A\09cpuid\0A\09xchgq\09%rbx, %rsi\0A\09", "={ax},={si},={cx},={dx},{ax},{cx},~{dirflag},~{fpsr},~{flags}"(i32 %17, i32 %18)
%20 = extractvalue { i32, i32, i32, i32 } %19, 0
%21 = extractvalue { i32, i32, i32, i32 } %19, 1
%22 = extractvalue { i32, i32, i32, i32 } %19, 2
%23 = extractvalue { i32, i32, i32, i32 } %19, 3
store i32 %20, i32* %13
store i32 %21, i32* %14
store i32 %22, i32* %15
store i32 %23, i32* %16
ret void
}

LLVM IR (-O2):
define void @getX86CpuIDAndInfoEx(i32 %0, i32 %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3, i32* nocapture writeonly %4, i32* nocapture writeonly %5) {
%7 = tail call { i32, i32, i32, i32 } asm "movq\09%rbx, %rsi\0A\09cpuid\0A\09xchgq\09%rbx, %rsi\0A\09", "={ax},={si},={cx},={dx},{ax},{cx},~{dirflag},~{fpsr},~{flags}"(i32 %0, i32 %1)
%8 = extractvalue { i32, i32, i32, i32 } %7, 0
%9 = extractvalue { i32, i32, i32, i32 } %7, 1
%10 = extractvalue { i32, i32, i32, i32 } %7, 2
%11 = extractvalue { i32, i32, i32, i32 } %7, 3
store i32 %8, i32* %2
store i32 %9, i32* %3
store i32 %10, i32* %4
store i32 %11, i32* %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ output_begin();
int /*<<< orphan*/ output_end();
void output_empty(void) {
  output_begin();
  output_end();
}


x86 assembly (clang, -O0):
<output_empty>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <output_begin@plt>
mov    $0x0,%al
call   1040 <output_end@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<output_empty>:
push   %rax
xor    %eax,%eax
call   1030 <output_begin@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <output_end@plt>

LLVM IR (-O0):
define void @output_empty() {
%1 = call i32 (...) @output_begin()
%2 = call i32 (...) @output_end()
ret void
}

LLVM IR (-O2):
define void @output_empty() {
%1 = tail call i32 (...) @output_begin()
%2 = tail call i32 (...) @output_end()
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
int /*<<< orphan*/ IntEnable(int);
int /*<<< orphan*/ IntRegister(int, void (*)());
void AESIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)) {
  ASSERT(ui32Base == 0x44036000);
  IntRegister(111, pfnHandler);
  IntEnable(111);
}


x86 assembly (clang, -O0):
<AESIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x44036000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <ASSERT@plt>
mov    -0x10(%rbp),%rsi
mov    $0x6f,%edi
call   1040 <IntRegister@plt>
mov    $0x6f,%edi
call   1030 <IntEnable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AESIntRegister>:
push   %rbx
mov    %rsi,%rbx
xor    %eax,%eax
cmp    $0x44036000,%edi
sete   %al
mov    %eax,%edi
call   1050 <ASSERT@plt>
mov    $0x6f,%edi
mov    %rbx,%rsi
call   1040 <IntRegister@plt>
mov    $0x6f,%edi
pop    %rbx
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @AESIntRegister(i32 %0, void ()* %1) {
%3 = alloca i32
%4 = alloca void ()*
store i32 %0, i32* %3
store void ()* %1, void ()** %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1141071872
%7 = zext i1 %6 to i32
%8 = call i32 @ASSERT(i32 %7)
%9 = load void ()*, void ()** %4
%10 = bitcast void ()* %9 to void (...)*
%11 = call i32 @IntRegister(i32 111, void (...)* %10)
%12 = call i32 @IntEnable(i32 111)
ret void
}

LLVM IR (-O2):
define void @AESIntRegister(i32 %0, void ()* %1) {
%3 = icmp eq i32 %0, 1141071872
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = bitcast void ()* %1 to void (...)*
%7 = tail call i32 @IntRegister(i32 111, void (...)* %6)
%8 = tail call i32 @IntEnable(i32 111)
ret void
}
void __stutter2(void) {}


x86 assembly (clang, -O0):
<__stutter2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__stutter2>:
ret

LLVM IR (-O0):
define void @__stutter2() {
ret void
}

LLVM IR (-O2):
define void @__stutter2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pll_report(unsigned char);
int /*<<< orphan*/ read_registers(int, int, unsigned char *);
void command_pll_report(char *params) {
  unsigned char a;
  read_registers(10, 1, &a);
  pll_report(a & 3);
}


x86 assembly (clang, -O0):
<command_pll_report>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xa,%edi
mov    $0x1,%esi
lea    -0x9(%rbp),%rdx
call   1030 <read_registers@plt>
movzbl -0x9(%rbp),%eax
and    $0x3,%eax
movzbl %al,%edi
call   1040 <pll_report@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<command_pll_report>:
push   %rax
lea    0x7(%rsp),%rdx
mov    $0xa,%edi
mov    $0x1,%esi
call   1030 <read_registers@plt>
movzbl 0x7(%rsp),%edi
and    $0x3,%edi
call   1040 <pll_report@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @command_pll_report(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
store i8* %0, i8** %2
%4 = call i32 @read_registers(i32 10, i32 1, i8* %3)
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = and i32 %6, 3
%8 = trunc i32 %7 to i8
%9 = call i32 @pll_report(i8 zeroext %8)
ret void
}

LLVM IR (-O2):
define void @command_pll_report(i8* nocapture readnone %0) {
%2 = alloca i8
%3 = call i32 @read_registers(i32 10, i32 1, i8* %2)
%4 = load i8, i8* %2
%5 = and i8 %4, 3
%6 = call i32 @pll_report(i8 zeroext %5)
ret void
}
int test_imm_D2int64_midword_reg(long long val) {
  return ((val >> 16) & (0xD2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D2int64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0xd2,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D2int64_midword_reg>:
test   $0xd20000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D2int64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 210
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D2int64_midword_reg(i64 %0) {
%2 = and i64 %0, 13762560
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct expr_s {
  int dummy;
};

/* Variables and functions */
struct expr_s *expr_new_sys_con(char *str) {
  return NULL;
}


x86 assembly (clang, -O0):
<expr_new_sys_con>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<expr_new_sys_con>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.expr_s = type { i32 }
define %struct.expr_s* @expr_new_sys_con(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret %struct.expr_s* null
}

LLVM IR (-O2):
%struct.expr_s = type { i32 }
define noalias %struct.expr_s* @expr_new_sys_con(i8* nocapture readnone %0) {
ret %struct.expr_s* null
}
int max(int a, int b) {
  if (a > b) {
    return a;
  }
  return b;
}


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1121 <max+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <max+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @max(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @max(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ native_write_msr(unsigned int, unsigned int, unsigned int);
__attribute__((always_)) void wrmsr(unsigned msr, unsigned low, unsigned high) {
  native_write_msr(msr, low, high);
}


x86 assembly (clang, -O0):
<wrmsr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <native_write_msr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrmsr>:
jmp    1030 <native_write_msr@plt>

LLVM IR (-O0):
define void @wrmsr(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @native_write_msr(i32 %7, i32 %8, i32 %9)
ret void
}

LLVM IR (-O2):
define void @wrmsr(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @native_write_msr(i32 %0, i32 %1, i32 %2)
ret void
}
int *L(d, r) { return r = V(014) & 63, Li(d, r); }


x86 assembly (clang, -O0):
<L>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0xc,%edi
mov    $0x0,%al
call   1030 <V@plt>
and    $0x3f,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x0,%al
call   1040 <Li@plt>
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<L>:
push   %rbx
mov    %edi,%ebx
mov    $0xc,%edi
xor    %eax,%eax
call   1030 <V@plt>
and    $0x3f,%eax
mov    %ebx,%edi
mov    %eax,%esi
xor    %eax,%eax
call   1040 <Li@plt>
cltq
pop    %rbx
ret

LLVM IR (-O0):
define i32* @L(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (i32, ...) bitcast (i32 (...)* @V to i32 (i32, ...)*)(i32 12)
%6 = and i32 %5, 63
store i32 %6, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = call i32 (i32, i32, ...) bitcast (i32 (...)* @Li to i32 (i32, i32, ...)*)(i32 %7, i32 %8)
%10 = sext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
ret i32* %11
}

LLVM IR (-O2):
define i32* @L(i32 %0, i32 %1) {
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @V to i32 (i32, ...)*)(i32 12)
%4 = and i32 %3, 63
%5 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @Li to i32 (i32, i32, ...)*)(i32 %0, i32 %4)
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
ret i32* %7
}
/* Type definitions */
struct forf_env {
  int dummy;
};

/* Variables and functions */
int forf_parse_buffer(struct forf_env *, char *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
int forf_parse_string(struct forf_env *env, char *str) {
  return forf_parse_buffer(env, str, strlen(str));
}


x86 assembly (clang, -O0):
<forf_parse_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <forf_parse_buffer@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<forf_parse_string>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <forf_parse_buffer@plt>

LLVM IR (-O0):
%struct.forf_env = type { i32 }
define i32 @forf_parse_string(%struct.forf_env* %0, i8* %1) {
%3 = alloca %struct.forf_env*
%4 = alloca i8*
store %struct.forf_env* %0, %struct.forf_env** %3
store i8* %1, i8** %4
%5 = load %struct.forf_env*, %struct.forf_env** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i32 @forf_parse_buffer(%struct.forf_env* %5, i8* %6, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
%struct.forf_env = type { i32 }
define i32 @forf_parse_string(%struct.forf_env* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @forf_parse_buffer(%struct.forf_env* %0, i8* %1, i32 %3)
ret i32 %4
}
int op_or(int a, int b) { return (a || b); }


x86 assembly (clang, -O0):
<op_or>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x1,%al
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x9(%rbp)
jne    1123 <op_or+0x23>
cmpl   $0x0,-0x8(%rbp)
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_or>:
xor    %eax,%eax
or     %esi,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @op_or(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ true, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @op_or(i32 %0, i32 %1) {
%3 = or i32 %1, %0
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
void swap(int *p1, int *p2) {
  int temp;
  temp = *p1;
  *p1 = *p2;
  *p2 = temp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ outb(int, unsigned short);
void fb_move_cursor(unsigned short pos) {
  outb(0x3D4, 14);
  outb(0x3D5, ((pos >> 8) & 0x00FF));
  outb(0x3D4, 15);
  outb(0x3D5, pos & 0x00FF);
}


x86 assembly (clang, -O0):
<fb_move_cursor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    $0x3d4,%edi
mov    $0xe,%esi
call   1030 <outb@plt>
movzwl -0x2(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    $0x3d5,%edi
movzwl %ax,%esi
call   1030 <outb@plt>
mov    $0x3d4,%edi
mov    $0xf,%esi
call   1030 <outb@plt>
movzwl -0x2(%rbp),%eax
and    $0xff,%eax
mov    $0x3d5,%edi
movzwl %ax,%esi
call   1030 <outb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb_move_cursor>:
push   %rbx
mov    %edi,%ebx
mov    $0x3d4,%edi
mov    $0xe,%esi
call   1030 <outb@plt>
mov    %ebx,%esi
shr    $0x8,%esi
mov    $0x3d5,%edi
call   1030 <outb@plt>
mov    $0x3d4,%edi
mov    $0xf,%esi
call   1030 <outb@plt>
movzbl %bl,%esi
mov    $0x3d5,%edi
pop    %rbx
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @fb_move_cursor(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = call i32 @outb(i32 980, i16 zeroext 14)
%4 = load i16, i16* %2
%5 = zext i16 %4 to i32
%6 = ashr i32 %5, 8
%7 = and i32 %6, 255
%8 = trunc i32 %7 to i16
%9 = call i32 @outb(i32 981, i16 zeroext %8)
%10 = call i32 @outb(i32 980, i16 zeroext 15)
%11 = load i16, i16* %2
%12 = zext i16 %11 to i32
%13 = and i32 %12, 255
%14 = trunc i32 %13 to i16
%15 = call i32 @outb(i32 981, i16 zeroext %14)
ret void
}

LLVM IR (-O2):
define void @fb_move_cursor(i16 zeroext %0) {
%2 = tail call i32 @outb(i32 980, i16 zeroext 14)
%3 = lshr i16 %0, 8
%4 = tail call i32 @outb(i32 981, i16 zeroext %3)
%5 = tail call i32 @outb(i32 980, i16 zeroext 15)
%6 = and i16 %0, 255
%7 = tail call i32 @outb(i32 981, i16 zeroext %6)
ret void
}
void FF_DestroySemaphore(void *pSemaphore) {}


x86 assembly (clang, -O0):
<FF_DestroySemaphore>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<FF_DestroySemaphore>:
ret

LLVM IR (-O0):
define void @FF_DestroySemaphore(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @FF_DestroySemaphore(i8* nocapture %0) {
ret void
}
int f(_Bool x) {
  int y;
  if (!x)
    y = 0;
  else
    y = 1;
  return y;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
and    $0x1,%al
mov    %al,-0x1(%rbp)
testb  $0x1,-0x1(%rbp)
jne    1122 <f+0x22>
movl   $0x0,-0x8(%rbp)
jmp    1129 <f+0x29>
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f(i1 zeroext %0) {
%2 = alloca i8
%3 = alloca i32
%4 = zext i1 %0 to i8
store i8 %4, i8* %2
%5 = load i8, i8* %2
%6 = trunc i8 %5 to i1
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 0, i32* %3
br label %9
8: ; preds = %1
store i32 1, i32* %3
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @f(i1 zeroext %0) {
%2 = zext i1 %0 to i32
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void OpenCM_Wait_ms(int WaitTime) {
  int i;
  for (i = 0; i < WaitTime; i++) {
    usleep(1000);
  }
}


x86 assembly (clang, -O0):
<OpenCM_Wait_ms>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1146 <OpenCM_Wait_ms+0x36>
mov    $0x3e8,%edi
call   1030 <usleep@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <OpenCM_Wait_ms+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OpenCM_Wait_ms>:
push   %rbx
test   %edi,%edi
jle    112f <OpenCM_Wait_ms+0x1f>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0x3e8,%edi
call   1030 <usleep@plt>
add    $0xffffffff,%ebx
jne    1120 <OpenCM_Wait_ms+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @OpenCM_Wait_ms(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = call i32 @usleep(i32 1000)
br label %10
10: ; preds = %8
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @OpenCM_Wait_ms(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = tail call i32 @usleep(i32 1000)
%6 = add nuw nsw i32 %4, 1
%7 = icmp eq i32 %6, %0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}