xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/
deceptiveTrapKLooseEncodingFunctionProblemEvaluation(char *, double *, double *,
                                                     int);
void deceptiveTrap4LooseEncodingFunctionProblemEvaluation(
    char *parameters, double *objective_value, double *constraint_value) {
  deceptiveTrapKLooseEncodingFunctionProblemEvaluation(
      parameters, objective_value, constraint_value, 4);
}


x86 assembly (clang, -O0):
<deceptiveTrap4LooseEncodingFunctionProblemEvaluation>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    $0x4,%ecx
call   1030 <deceptiveTrapKLooseEncodingFunctionProblemEvaluation@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<deceptiveTrap4LooseEncodingFunctionProblemEvaluation>:
mov    $0x4,%ecx
jmp    1030 <deceptiveTrapKLooseEncodingFunctionProblemEvaluation@plt>

LLVM IR (-O0):
define void @deceptiveTrap4LooseEncodingFunctionProblemEvaluation(i8* %0, double* %1, double* %2) {
%4 = alloca i8*
%5 = alloca double*
%6 = alloca double*
store i8* %0, i8** %4
store double* %1, double** %5
store double* %2, double** %6
%7 = load i8*, i8** %4
%8 = load double*, double** %5
%9 = load double*, double** %6
%10 = call i32 @deceptiveTrapKLooseEncodingFunctionProblemEvaluation(i8* %7, double* %8, double* %9, i32 4)
ret void
}

LLVM IR (-O2):
define void @deceptiveTrap4LooseEncodingFunctionProblemEvaluation(i8* %0, double* %1, double* %2) {
%4 = tail call i32 @deceptiveTrapKLooseEncodingFunctionProblemEvaluation(i8* %0, double* %1, double* %2, i32 4)
ret void
}
/* Variables and functions */
int forkexecwaitvp(int /*<<< orphan*/, char const **);
int /*<<< orphan*/ path_clsync();
int exec_clsync_argv(const char **argv) {
  return forkexecwaitvp(path_clsync(), argv);
}


x86 assembly (clang, -O0):
<exec_clsync_argv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <path_clsync@plt>
mov    %eax,%edi
mov    -0x8(%rbp),%rsi
call   1040 <forkexecwaitvp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exec_clsync_argv>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <path_clsync@plt>
mov    %eax,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <forkexecwaitvp@plt>

LLVM IR (-O0):
define i32 @exec_clsync_argv(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = call i32 (...) @path_clsync()
%4 = load i8**, i8*** %2
%5 = call i32 @forkexecwaitvp(i32 %3, i8** %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @exec_clsync_argv(i8** %0) {
%2 = tail call i32 (...) @path_clsync()
%3 = tail call i32 @forkexecwaitvp(i32 %2, i8** %0)
ret i32 %3
}
void __attribute__((weak)) rtc_alarm_isr() { debug_handler(__FUNCTION__); }


x86 assembly (clang, -O0):
<rtc_alarm_isr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <debug_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtc_alarm_isr>:
lea    0xee9(%rip),%rdi
xor    %eax,%eax
jmp    1030 <debug_handler@plt>

LLVM IR (-O0):
@__FUNCTION__.rtc_alarm_isr = [14 x i8] c"rtc_alarm_isr\00"
define weak void @rtc_alarm_isr() {
%1 = call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @__FUNCTION__.rtc_alarm_isr, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__FUNCTION__.rtc_alarm_isr = [14 x i8] c"rtc_alarm_isr\00"
define weak void @rtc_alarm_isr() {
%1 = tail call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @__FUNCTION__.rtc_alarm_isr, i64 0, i64 0))
ret void
}
int test_imm_67uint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0x67 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_67uint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0x67,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_67uint64_highword_reg>:
movabs $0x6700000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_67uint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 103
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_67uint64_highword_reg(i64 %0) {
%2 = and i64 %0, 442381631488
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void I2C0_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<I2C0_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <I2C0_Handler+0x9>
jmp    1109 <I2C0_Handler+0x9>

x86 assembly (clang, -O2):
<I2C0_Handler>:
jmp    1100 <I2C0_Handler>

LLVM IR (-O0):
define void @I2C0_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @I2C0_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
unsigned int strlen(char *);
char *string_truncate(char *s, unsigned int length) {
  if (s && strlen(s) > length)
    s[length] = 0;
  return s;
}


x86 assembly (clang, -O0):
<string_truncate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1147 <string_truncate+0x37>
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
cmp    -0xc(%rbp),%eax
jbe    1147 <string_truncate+0x37>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_truncate>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
test   %rdi,%rdi
je     112f <string_truncate+0x1f>
mov    %esi,%ebp
mov    %rbx,%rdi
call   1030 <strlen@plt>
cmp    %ebp,%eax
jbe    112f <string_truncate+0x1f>
mov    %ebp,%eax
movb   $0x0,(%rbx,%rax,1)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @string_truncate(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %17
7: ; preds = %2
%8 = load i8*, i8** %3
%9 = call i32 @strlen(i8* %8)
%10 = load i32, i32* %4
%11 = icmp ugt i32 %9, %10
br i1 %11, label %12, label %17
12: ; preds = %7
%13 = load i8*, i8** %3
%14 = load i32, i32* %4
%15 = zext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
store i8 0, i8* %16
br label %17
17: ; preds = %12, %7, %2
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
define i8* @string_truncate(i8* returned %0, i32 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %10, label %4
4: ; preds = %2
%5 = tail call i32 @strlen(i8* %0)
%6 = icmp ugt i32 %5, %1
br i1 %6, label %7, label %10
7: ; preds = %4
%8 = zext i32 %1 to i64
%9 = getelementptr inbounds i8, i8* %0, i64 %8
store i8 0, i8* %9
br label %10
10: ; preds = %7, %4, %2
ret i8* %0
}
int wa_sa(int x, int y, int *wa, int *sa) {
  *wa = x + y;
  *sa = x - y;
}


x86 assembly (clang, -O0):
<wa_sa>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%ecx
add    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%ecx
sub    -0xc(%rbp),%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wa_sa>:
lea    (%rsi,%rdi,1),%eax
mov    %eax,(%rdx)
sub    %esi,%edi
mov    %edi,(%rcx)
ret

LLVM IR (-O0):
define i32 @wa_sa(i32 %0, i32 %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32*
%9 = alloca i32*
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32* %2, i32** %8
store i32* %3, i32** %9
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = add nsw i32 %10, %11
%13 = load i32*, i32** %8
store i32 %12, i32* %13
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = sub nsw i32 %14, %15
%17 = load i32*, i32** %9
store i32 %16, i32* %17
%18 = load i32, i32* %5
ret i32 %18
}

LLVM IR (-O2):
define i32 @wa_sa(i32 %0, i32 %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3) {
%5 = add nsw i32 %1, %0
store i32 %5, i32* %2
%6 = sub nsw i32 %0, %1
store i32 %6, i32* %3
ret i32 undef
}
int gk20a_init_therm_setup_sw(struct gk20a *g) { return 0; }


x86 assembly (clang, -O0):
<gk20a_init_therm_setup_sw>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gk20a_init_therm_setup_sw>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.gk20a = type opaque
define i32 @gk20a_init_therm_setup_sw(%struct.gk20a* %0) {
%2 = alloca %struct.gk20a*
store %struct.gk20a* %0, %struct.gk20a** %2
ret i32 0
}

LLVM IR (-O2):
%struct.gk20a = type opaque
define i32 @gk20a_init_therm_setup_sw(%struct.gk20a* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ strcmp(char const *, char const *);
int32_t perfx_strcmp0(const char *a, const char *b) {
  a = a ? a : "";
  b = b ? b : "";
  return strcmp(a, b);
}


x86 assembly (clang, -O0):
<perfx_strcmp0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1138 <perfx_strcmp0+0x28>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    1148 <perfx_strcmp0+0x38>
lea    0xec1(%rip),%rax
mov    %rax,-0x18(%rbp)
jmp    1148 <perfx_strcmp0+0x38>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1168 <perfx_strcmp0+0x58>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
jmp    1178 <perfx_strcmp0+0x68>
lea    0xe91(%rip),%rax
mov    %rax,-0x20(%rbp)
jmp    1178 <perfx_strcmp0+0x68>
mov    -0x20(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perfx_strcmp0>:
test   %rdi,%rdi
lea    0xee6(%rip),%rax
cmove  %rax,%rdi
test   %rsi,%rsi
cmove  %rax,%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i32 @perfx_strcmp0(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = load i8*, i8** %3
br label %10
9: ; preds = %2
br label %10
10: ; preds = %9, %7
%11 = phi i8* [ %8, %7 ], [ getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), %9 ]
store i8* %11, i8** %3
%12 = load i8*, i8** %4
%13 = icmp ne i8* %12, null
br i1 %13, label %14, label %16
14: ; preds = %10
%15 = load i8*, i8** %4
br label %17
16: ; preds = %10
br label %17
17: ; preds = %16, %14
%18 = phi i8* [ %15, %14 ], [ getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), %16 ]
store i8* %18, i8** %4
%19 = load i8*, i8** %3
%20 = load i8*, i8** %4
%21 = call i32 @strcmp(i8* %19, i8* %20)
ret i32 %21
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i32 @perfx_strcmp0(i8* %0, i8* %1) {
%3 = icmp eq i8* %0, null
%4 = select i1 %3, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* %0
%5 = icmp eq i8* %1, null
%6 = select i1 %5, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* %1
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %4, i8* dereferenceable(1) %6)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ uart_putc(unsigned char);
int console_putc(const int ch) {
  uart_putc((unsigned char)(ch));
  return ch;
}


x86 assembly (clang, -O0):
<console_putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
movzbl %al,%edi
call   1030 <uart_putc@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<console_putc>:
push   %rbx
mov    %edi,%ebx
movzbl %bl,%edi
call   1030 <uart_putc@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @console_putc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i8
%5 = call i32 @uart_putc(i8 zeroext %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @console_putc(i32 returned %0) {
%2 = trunc i32 %0 to i8
%3 = tail call i32 @uart_putc(i8 zeroext %2)
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ isspace(unsigned char const);
int /*<<< orphan*/ set_error_msg(char *);
char unexpected_command_suffix(const unsigned char ch) {
  if (!isspace(ch)) {
    set_error_msg("Unexpected command suffix");
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<unexpected_command_suffix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%edi
call   1040 <isspace@plt>
cmp    $0x0,%eax
jne    1155 <unexpected_command_suffix+0x35>
lea    0xeb9(%rip),%rdi
call   1030 <set_error_msg@plt>
movb   $0x1,-0x1(%rbp)
jmp    1159 <unexpected_command_suffix+0x39>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unexpected_command_suffix>:
push   %rax
call   1040 <isspace@plt>
test   %eax,%eax
je     112e <unexpected_command_suffix+0xe>
xor    %eax,%eax
pop    %rcx
ret
lea    0xecb(%rip),%rdi
call   1030 <set_error_msg@plt>
mov    $0x1,%al
pop    %rcx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"Unexpected command suffix\00"
define signext i8 @unexpected_command_suffix(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = call i32 @isspace(i8 zeroext %4)
%6 = icmp ne i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = call i32 @set_error_msg(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
store i8 1, i8* %2
br label %10
9: ; preds = %1
store i8 0, i8* %2
br label %10
10: ; preds = %9, %7
%11 = load i8, i8* %2
ret i8 %11
}

LLVM IR (-O2):
@.str = [26 x i8] c"Unexpected command suffix\00"
define signext i8 @unexpected_command_suffix(i8 zeroext %0) {
%2 = tail call i32 @isspace(i8 zeroext %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @set_error_msg(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %1, %4
%7 = phi i8 [ 1, %4 ], [ 0, %1 ]
ret i8 %7
}
float mycopysign(float a, float b) { return b < 0.f ? -a : a; }


x86 assembly (clang, -O0):
<mycopysign>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    1137 <mycopysign+0x37>
movss  -0x4(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    1141 <mycopysign+0x41>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mycopysign>:
movaps 0xef9(%rip),%xmm2
xorps  %xmm0,%xmm2
xorps  %xmm3,%xmm3
cmpltss %xmm3,%xmm1
andps  %xmm1,%xmm2
andnps %xmm0,%xmm1
orps   %xmm1,%xmm2
movaps %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @mycopysign(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %4
%6 = fcmp olt float %5, 0.000000e+00
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load float, float* %3
%9 = fneg float %8
br label %12
10: ; preds = %2
%11 = load float, float* %3
br label %12
12: ; preds = %10, %7
%13 = phi float [ %9, %7 ], [ %11, %10 ]
ret float %13
}

LLVM IR (-O2):
define float @mycopysign(float %0, float %1) {
%3 = fcmp olt float %1, 0.000000e+00
%4 = fneg float %0
%5 = select i1 %3, float %4, float %0
ret float %5
}
int default_display_message(char *msg) { return (-1); }


x86 assembly (clang, -O0):
<default_display_message>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_display_message>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @default_display_message(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @default_display_message(i8* nocapture readnone %0) {
ret i32 -1
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int32_t signed_multiply_32x16b(int32_t a, uint32_t b) {}


x86 assembly (clang, -O0):
<signed_multiply_32x16b>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signed_multiply_32x16b>:
ret

LLVM IR (-O0):
define i32 @signed_multiply_32x16b(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @signed_multiply_32x16b(i32 %0, i32 %1) {
ret i32 undef
}
_Bool QuietLessGreater(float f1, float f2) {
  return __builtin_islessgreater(f1, f2);
}


x86 assembly (clang, -O0):
<QuietLessGreater>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<QuietLessGreater>:
ucomiss %xmm1,%xmm0
setne  %al
ret

LLVM IR (-O0):
define zeroext i1 @QuietLessGreater(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp one float %5, %6
ret i1 %7
}

LLVM IR (-O2):
define zeroext i1 @QuietLessGreater(float %0, float %1) {
%3 = fcmp one float %0, %1
ret i1 %3
}
/* Variables and functions */
unsigned char Read_Status_Register();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void WREN_AAI_Check() {
  unsigned char byte;
  byte = Read_Status_Register();
  if (byte != 0x42) {
    fprintf(stderr, "ERROR: WEL bit is not set\n");
  }
}


x86 assembly (clang, -O0):
<WREN_AAI_Check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <Read_Status_Register@plt>
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0x42,%eax
je     1154 <WREN_AAI_Check+0x34>
mov    0x2e9a(%rip),%rax
mov    (%rax),%edi
lea    0xeb1(%rip),%rsi
call   1040 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WREN_AAI_Check>:
push   %rax
xor    %eax,%eax
call   1030 <Read_Status_Register@plt>
cmp    $0x42,%al
jne    112e <WREN_AAI_Check+0xe>
pop    %rax
ret
mov    0x2eab(%rip),%rax
mov    (%rax),%edi
lea    0xec2(%rip),%rsi
pop    %rax
jmp    1040 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [27 x i8] c"ERROR: WEL bit is not set\0A\00"
define void @WREN_AAI_Check() {
%1 = alloca i8
%2 = call zeroext i8 (...) @Read_Status_Register()
store i8 %2, i8* %1
%3 = load i8, i8* %1
%4 = zext i8 %3 to i32
%5 = icmp ne i32 %4, 66
br i1 %5, label %6, label %9
6: ; preds = %0
%7 = load i32, i32* @stderr
%8 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %6, %0
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [27 x i8] c"ERROR: WEL bit is not set\0A\00"
define void @WREN_AAI_Check() {
%1 = tail call zeroext i8 (...) @Read_Status_Register()
%2 = icmp eq i8 %1, 66
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %3, %0
ret void
}
void state_input_c(float value) {}


x86 assembly (clang, -O0):
<state_input_c>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<state_input_c>:
ret

LLVM IR (-O0):
define void @state_input_c(float %0) {
%2 = alloca float
store float %0, float* %2
ret void
}

LLVM IR (-O2):
define void @state_input_c(float %0) {
ret void
}
/* Variables and functions */
unsigned int __andn_u32(unsigned int, unsigned int);
unsigned int test__andn_u32(unsigned int __X, unsigned int __Y) {
  return __andn_u32(__X, __Y);
}


x86 assembly (clang, -O0):
<test__andn_u32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <__andn_u32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test__andn_u32>:
jmp    1030 <__andn_u32@plt>

LLVM IR (-O0):
define i32 @test__andn_u32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @__andn_u32(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test__andn_u32(i32 %0, i32 %1) {
%3 = tail call i32 @__andn_u32(i32 %0, i32 %1)
ret i32 %3
}
float funAofTri(float b1, float h1) {
  float a1;
  a1 = 0.5 * b1 * h1;
  return a1;
}


x86 assembly (clang, -O0):
<funAofTri>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xee1(%rip),%xmm0
mulsd  %xmm1,%xmm0
movss  -0x8(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<funAofTri>:
cvtss2sd %xmm0,%xmm0
mulsd  0xef4(%rip),%xmm0
cvtss2sd %xmm1,%xmm1
mulsd  %xmm0,%xmm1
xorps  %xmm0,%xmm0
cvtsd2ss %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @funAofTri(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %3
store float %1, float* %4
%6 = load float, float* %3
%7 = fpext float %6 to double
%8 = fmul double 5.000000e-01, %7
%9 = load float, float* %4
%10 = fpext float %9 to double
%11 = fmul double %8, %10
%12 = fptrunc double %11 to float
store float %12, float* %5
%13 = load float, float* %5
ret float %13
}

LLVM IR (-O2):
define float @funAofTri(float %0, float %1) {
%3 = fpext float %0 to double
%4 = fmul double %3, 5.000000e-01
%5 = fpext float %1 to double
%6 = fmul double %4, %5
%7 = fptrunc double %6 to float
ret float %7
}
/* Variables and functions */
int rand();
bool ConditionRandom(int Range) { return rand() % Range == 0; }


x86 assembly (clang, -O0):
<ConditionRandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cltd
idivl  -0x4(%rbp)
cmp    $0x0,%edx
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ConditionRandom>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %ebx
xor    %eax,%eax
test   %edx,%edx
sete   %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ConditionRandom(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @rand()
%4 = load i32, i32* %2
%5 = srem i32 %3, %4
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @ConditionRandom(i32 %0) {
%2 = tail call i32 (...) @rand()
%3 = srem i32 %2, %0
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_context_set_port_latency_offset() {
  printf("NOT IMPLEMENTED:"
         "pa_context_set_port_latency_offset"
         "\n");
}


x86 assembly (clang, -O0):
<pa_context_set_port_latency_offset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_context_set_port_latency_offset>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [52 x i8] c"NOT IMPLEMENTED:pa_context_set_port_latency_offset\0A\00"
define i32 @pa_context_set_port_latency_offset() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [51 x i8] c"NOT IMPLEMENTED:pa_context_set_port_latency_offset\00"
define i32 @pa_context_set_port_latency_offset() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([51 x i8], [51 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
void cl_dev_setdelay_mutex(pthread_mutex_t *mutex) {}


x86 assembly (clang, -O0):
<cl_dev_setdelay_mutex>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cl_dev_setdelay_mutex>:
ret

LLVM IR (-O0):
define void @cl_dev_setdelay_mutex(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @cl_dev_setdelay_mutex(i32* nocapture %0) {
ret void
}
OP(ed, da) { illegal_2(); }


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <illegal_2@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
xor    %eax,%eax
jmp    1030 <illegal_2@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @illegal_2()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @illegal_2()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ SCOTCHFVERSION(int *const, int *const, int *const);
void scotchfversion_(int *const versptr, int *const relaptr,
                     int *const patcptr) {
  SCOTCHFVERSION(versptr, relaptr, patcptr);
}


x86 assembly (clang, -O0):
<scotchfversion_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <SCOTCHFVERSION@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scotchfversion_>:
jmp    1030 <SCOTCHFVERSION@plt>

LLVM IR (-O0):
define void @scotchfversion_(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = load i32*, i32** %5
%9 = load i32*, i32** %6
%10 = call i32 @SCOTCHFVERSION(i32* %7, i32* %8, i32* %9)
ret void
}

LLVM IR (-O2):
define void @scotchfversion_(i32* %0, i32* %1, i32* %2) {
%4 = tail call i32 @SCOTCHFVERSION(i32* %0, i32* %1, i32* %2)
ret void
}
void h_cscs(char *name, int argc, char **argv, void *user_data) {
  int i;
  printf("Called: %s\n", __FUNCTION__);
}


x86 assembly (clang, -O0):
<h_cscs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
lea    0xed2(%rip),%rdi
lea    0xed7(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h_cscs>:
lea    0xee9(%rip),%rdi
lea    0xeee(%rip),%rsi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"Called: %s\0A\00"
@__FUNCTION__.h_cscs = [7 x i8] c"h_cscs\00"
define void @h_cscs(i8* %0, i32 %1, i8** %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8**
%8 = alloca i8*
%9 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8** %2, i8*** %7
store i8* %3, i8** %8
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @__FUNCTION__.h_cscs, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"Called: %s\0A\00"
@__FUNCTION__.h_cscs = [7 x i8] c"h_cscs\00"
define void @h_cscs(i8* nocapture readnone %0, i32 %1, i8** nocapture readnone %2, i8* nocapture readnone %3) {
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @__FUNCTION__.h_cscs, i64 0, i64 0))
ret void
}
void scalar(const double v1[3], const double v2, double result[3]) {
  result[0] = v1[0] * v2;
  result[1] = v1[1] * v2;
  result[2] = v1[2] * v2;
}


x86 assembly (clang, -O0):
<scalar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mulsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mulsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mulsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<scalar>:
movsd  (%rdi),%xmm1
mulsd  %xmm0,%xmm1
movsd  %xmm1,(%rsi)
movsd  0x8(%rdi),%xmm1
mulsd  %xmm0,%xmm1
movsd  %xmm1,0x8(%rsi)
mulsd  0x10(%rdi),%xmm0
movsd  %xmm0,0x10(%rsi)
ret

LLVM IR (-O0):
define void @scalar(double* %0, double %1, double* %2) {
%4 = alloca double*
%5 = alloca double
%6 = alloca double*
store double* %0, double** %4
store double %1, double* %5
store double* %2, double** %6
%7 = load double*, double** %4
%8 = getelementptr inbounds double, double* %7, i64 0
%9 = load double, double* %8
%10 = load double, double* %5
%11 = fmul double %9, %10
%12 = load double*, double** %6
%13 = getelementptr inbounds double, double* %12, i64 0
store double %11, double* %13
%14 = load double*, double** %4
%15 = getelementptr inbounds double, double* %14, i64 1
%16 = load double, double* %15
%17 = load double, double* %5
%18 = fmul double %16, %17
%19 = load double*, double** %6
%20 = getelementptr inbounds double, double* %19, i64 1
store double %18, double* %20
%21 = load double*, double** %4
%22 = getelementptr inbounds double, double* %21, i64 2
%23 = load double, double* %22
%24 = load double, double* %5
%25 = fmul double %23, %24
%26 = load double*, double** %6
%27 = getelementptr inbounds double, double* %26, i64 2
store double %25, double* %27
ret void
}

LLVM IR (-O2):
define void @scalar(double* nocapture %0, double %1, double* nocapture writeonly %2) {
%4 = load double, double* %0
%5 = fmul double %4, %1
store double %5, double* %2
%6 = getelementptr inbounds double, double* %0, i64 1
%7 = load double, double* %6
%8 = fmul double %7, %1
%9 = getelementptr inbounds double, double* %2, i64 1
store double %8, double* %9
%10 = getelementptr inbounds double, double* %0, i64 2
%11 = load double, double* %10
%12 = fmul double %11, %1
%13 = getelementptr inbounds double, double* %2, i64 2
store double %12, double* %13
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void display_message(int message) {
  if (message == 1) {
    printf("Lab 5, Task 1\n");
  } else if (message == 2) {
    printf("Error: Incorrect Use Code. Enter correct Use Code.\n");
  }
  return;
}


x86 assembly (clang, -O0):
<display_message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jne    1136 <display_message+0x26>
lea    0xed4(%rip),%rdi
call   1030 <printf@plt>
jmp    1151 <display_message+0x41>
cmpl   $0x2,-0x4(%rbp)
jne    114c <display_message+0x3c>
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
jmp    1151 <display_message+0x41>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_message>:
cmp    $0x1,%edi
je     1126 <display_message+0x16>
cmp    $0x2,%edi
jne    1132 <display_message+0x22>
lea    0xedf(%rip),%rdi
jmp    1030 <puts@plt>
lea    0xf06(%rip),%rdi
jmp    1030 <puts@plt>
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Lab 5, Task 1\0A\00"
@.str.1 = [52 x i8] c"Error: Incorrect Use Code. Enter correct Use Code.\0A\00"
define void @display_message(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
br label %13
7: ; preds = %1
%8 = load i32, i32* %2
%9 = icmp eq i32 %8, 2
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = call i32 @printf(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str.1, i64 0, i64 0))
br label %12
12: ; preds = %10, %7
br label %13
13: ; preds = %12, %5
ret void
}

LLVM IR (-O2):
@str = [51 x i8] c"Error: Incorrect Use Code. Enter correct Use Code.\00"
@str.2 = [14 x i8] c"Lab 5, Task 1\00"
define void @display_message(i32 %0) {
switch i32 %0, label %6 [
i32 1, label %3
i32 2, label %2
]
2: ; preds = %1
br label %3
3: ; preds = %1, %2
%4 = phi i8* [ getelementptr inbounds ([51 x i8], [51 x i8]* @str, i64 0, i64 0), %2 ], [ getelementptr inbounds ([14 x i8], [14 x i8]* @str.2, i64 0, i64 0), %1 ]
%5 = tail call i32 @puts(i8* dereferenceable(1) %4)
br label %6
6: ; preds = %3, %1
ret void
}
void sort_dir_free(char **list) {
  int i;
  if (list) {
    for (i = 0; list[i]; i++) {
      if (list[i])
        free(list[i]);
    }
    free(list);
  }
}


x86 assembly (clang, -O0):
<sort_dir_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1181 <sort_dir_free+0x71>
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     1178 <sort_dir_free+0x68>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     1165 <sort_dir_free+0x55>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
jmp    116a <sort_dir_free+0x5a>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112e <sort_dir_free+0x1e>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sort_dir_free>:
test   %rdi,%rdi
je     1150 <sort_dir_free+0x40>
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1141 <sort_dir_free+0x31>
lea    0x8(%r14),%rbx
nopl   0x0(%rax,%rax,1)
call   1030 <free@plt>
mov    (%rbx),%rdi
add    $0x8,%rbx
test   %rdi,%rdi
jne    1130 <sort_dir_free+0x20>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @sort_dir_free(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = icmp ne i8** %4, null
br i1 %5, label %6, label %34
6: ; preds = %1
store i32 0, i32* %3
br label %7
7: ; preds = %28, %6
%8 = load i8**, i8*** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8*, i8** %8, i64 %10
%12 = load i8*, i8** %11
%13 = icmp ne i8* %12, null
br i1 %13, label %14, label %31
14: ; preds = %7
%15 = load i8**, i8*** %2
%16 = load i32, i32* %3
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8*, i8** %15, i64 %17
%19 = load i8*, i8** %18
%20 = icmp ne i8* %19, null
br i1 %20, label %21, label %27
21: ; preds = %14
%22 = load i8**, i8*** %2
%23 = load i32, i32* %3
%24 = sext i32 %23 to i64
%25 = getelementptr inbounds i8*, i8** %22, i64 %24
%26 = load i8*, i8** %25
br label %27
27: ; preds = %21, %14
br label %28
28: ; preds = %27
%29 = load i32, i32* %3
%30 = add nsw i32 %29, 1
store i32 %30, i32* %3
br label %7
31: ; preds = %7
%32 = load i8**, i8*** %2
%33 = bitcast i8** %32 to i8*
br label %34
34: ; preds = %31, %1
ret void
}

LLVM IR (-O2):
define void @sort_dir_free(i8** %0) {
%2 = icmp eq i8** %0, null
br i1 %2, label %15, label %3
3: ; preds = %1
%4 = load i8*, i8** %0
%5 = icmp eq i8* %4, null
br i1 %5, label %13, label %6
6: ; preds = %3, %6
%7 = phi i64 [ %9, %6 ], [ 0, %3 ]
%8 = phi i8* [ %11, %6 ], [ %4, %3 ]
tail call void @free(i8* %8)
%9 = add nuw nsw i64 %7, 1
%10 = getelementptr inbounds i8*, i8** %0, i64 %9
%11 = load i8*, i8** %10
%12 = icmp eq i8* %11, null
br i1 %12, label %13, label %6
13: ; preds = %6, %3
%14 = bitcast i8** %0 to i8*
tail call void @free(i8* %14)
br label %15
15: ; preds = %13, %1
ret void
}
/* Variables and functions */
scalar_t__ Match(int, char *);
int /*<<< orphan*/ Statement_Sequence(int, int);
void Statement_Block(int *nChain) {
  int oneline = 0;
  if (Match(30, "{")) {
    Statement_Sequence(*nChain, oneline);
    Match(31, "}");
  } else {
    oneline = 1;
    Statement_Sequence(*nChain, oneline);
    oneline = 0;
  }
}


x86 assembly (clang, -O0):
<Statement_Block>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    $0x1e,%edi
lea    0xec1(%rip),%rsi
call   1040 <Match@plt>
cmp    $0x0,%rax
je     1172 <Statement_Block+0x52>
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0xc(%rbp),%esi
call   1030 <Statement_Sequence@plt>
mov    $0x1f,%edi
lea    0xe9a(%rip),%rsi
call   1040 <Match@plt>
jmp    118e <Statement_Block+0x6e>
movl   $0x1,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0xc(%rbp),%esi
call   1030 <Statement_Sequence@plt>
movl   $0x0,-0xc(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Statement_Block>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rsi
mov    $0x1e,%edi
call   1040 <Match@plt>
mov    (%rbx),%edi
test   %rax,%rax
je     1155 <Statement_Block+0x35>
xor    %esi,%esi
call   1030 <Statement_Sequence@plt>
lea    0xeb8(%rip),%rsi
mov    $0x1f,%edi
pop    %rbx
jmp    1040 <Match@plt>
mov    $0x1,%esi
pop    %rbx
jmp    1030 <Statement_Sequence@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"{\00"
@.str.1 = [2 x i8] c"}\00"
define void @Statement_Block(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
%4 = call i64 @Match(i32 30, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i32*, i32** %2
%8 = load i32, i32* %7
%9 = load i32, i32* %3
%10 = call i32 @Statement_Sequence(i32 %8, i32 %9)
%11 = call i64 @Match(i32 31, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
br label %17
12: ; preds = %1
store i32 1, i32* %3
%13 = load i32*, i32** %2
%14 = load i32, i32* %13
%15 = load i32, i32* %3
%16 = call i32 @Statement_Sequence(i32 %14, i32 %15)
store i32 0, i32* %3
br label %17
17: ; preds = %12, %6
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"{\00"
@.str.1 = [2 x i8] c"}\00"
define void @Statement_Block(i32* nocapture %0) {
%2 = tail call i64 @Match(i32 30, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
%4 = load i32, i32* %0
br i1 %3, label %8, label %5
5: ; preds = %1
%6 = tail call i32 @Statement_Sequence(i32 %4, i32 0)
%7 = tail call i64 @Match(i32 31, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
br label %10
8: ; preds = %1
%9 = tail call i32 @Statement_Sequence(i32 %4, i32 1)
br label %10
10: ; preds = %8, %5
ret void
}
int Util_in_range_strict(const double lower, const double upper,
                         const double x) {
  int lowcond, upcond;
  lowcond = x > lower;
  upcond = x < upper;
  return lowcond && upcond;
}


x86 assembly (clang, -O0):
<Util_in_range_strict>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
ucomisd -0x8(%rbp),%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x1c(%rbp)
movsd  -0x18(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x20(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x1c(%rbp)
mov    %al,-0x21(%rbp)
je     115a <Util_in_range_strict+0x5a>
cmpl   $0x0,-0x20(%rbp)
setne  %al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Util_in_range_strict>:
ucomisd %xmm0,%xmm2
seta   %al
ucomisd %xmm2,%xmm1
seta   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @Util_in_range_strict(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca i32
%8 = alloca i32
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%9 = load double, double* %6
%10 = load double, double* %4
%11 = fcmp ogt double %9, %10
%12 = zext i1 %11 to i32
store i32 %12, i32* %7
%13 = load double, double* %6
%14 = load double, double* %5
%15 = fcmp olt double %13, %14
%16 = zext i1 %15 to i32
store i32 %16, i32* %8
%17 = load i32, i32* %7
%18 = icmp ne i32 %17, 0
br i1 %18, label %19, label %22
19: ; preds = %3
%20 = load i32, i32* %8
%21 = icmp ne i32 %20, 0
br label %22
22: ; preds = %19, %3
%23 = phi i1 [ false, %3 ], [ %21, %19 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @Util_in_range_strict(double %0, double %1, double %2) {
%4 = fcmp ogt double %2, %0
%5 = fcmp olt double %2, %1
%6 = and i1 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int safe_mem_is_zero(char const *, int);
int tor_digest_is_zero(const char *digest) {
  return safe_mem_is_zero(digest, 20);
}


x86 assembly (clang, -O0):
<tor_digest_is_zero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x14,%esi
call   1030 <safe_mem_is_zero@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tor_digest_is_zero>:
mov    $0x14,%esi
jmp    1030 <safe_mem_is_zero@plt>

LLVM IR (-O0):
define i32 @tor_digest_is_zero(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @safe_mem_is_zero(i8* %3, i32 20)
ret i32 %4
}

LLVM IR (-O2):
define i32 @tor_digest_is_zero(i8* %0) {
%2 = tail call i32 @safe_mem_is_zero(i8* %0, i32 20)
ret i32 %2
}
/* Type definitions */
struct group {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ EINTR;
struct group *__tlg_getgrent(int /*<<< orphan*/);
int /*<<< orphan*/ errno;
int /*<<< orphan*/ fileno(int /*<<< orphan*/ *);
struct group *tlg_fgetgrent(FILE *file) {
  if (file == NULL) {
    errno = EINTR;
    return NULL;
  }
  return __tlg_getgrent(fileno(file));
}


x86 assembly (clang, -O0):
<tlg_fgetgrent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1156 <tlg_fgetgrent+0x36>
mov    0x2e9a(%rip),%rax
mov    (%rax),%ecx
mov    0x2e99(%rip),%rax
mov    %ecx,(%rax)
movq   $0x0,-0x8(%rbp)
jmp    116a <tlg_fgetgrent+0x4a>
mov    -0x10(%rbp),%rdi
call   1030 <fileno@plt>
mov    %eax,%edi
call   1040 <__tlg_getgrent@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tlg_fgetgrent>:
push   %rax
test   %rdi,%rdi
je     1133 <tlg_fgetgrent+0x13>
call   1030 <fileno@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <__tlg_getgrent@plt>
mov    0x2e9e(%rip),%rax
mov    (%rax),%eax
mov    0x2e9d(%rip),%rcx
mov    %eax,(%rcx)
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.group = type { i32 }
@EINTR = global i32 0
@errno = global i32 0
define %struct.group* @tlg_fgetgrent(i32* %0) {
%2 = alloca %struct.group*
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* @EINTR
store i32 %7, i32* @errno
store %struct.group* null, %struct.group** %2
br label %12
8: ; preds = %1
%9 = load i32*, i32** %3
%10 = call i32 @fileno(i32* %9)
%11 = call %struct.group* @__tlg_getgrent(i32 %10)
store %struct.group* %11, %struct.group** %2
br label %12
12: ; preds = %8, %6
%13 = load %struct.group*, %struct.group** %2
ret %struct.group* %13
}

LLVM IR (-O2):
%struct.group = type { i32 }
@EINTR = global i32 0
@errno = global i32 0
define %struct.group* @tlg_fgetgrent(i32* %0) {
%2 = icmp eq i32* %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = load i32, i32* @EINTR
store i32 %4, i32* @errno
br label %8
5: ; preds = %1
%6 = tail call i32 @fileno(i32* %0)
%7 = tail call %struct.group* @__tlg_getgrent(i32 %6)
br label %8
8: ; preds = %5, %3
%9 = phi %struct.group* [ null, %3 ], [ %7, %5 ]
ret %struct.group* %9
}
void ARGBToUVJRow_Any_SSSE3() {}


x86 assembly (clang, -O0):
<ARGBToUVJRow_Any_SSSE3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBToUVJRow_Any_SSSE3>:
ret

LLVM IR (-O0):
define void @ARGBToUVJRow_Any_SSSE3() {
ret void
}

LLVM IR (-O2):
define void @ARGBToUVJRow_Any_SSSE3() {
ret void
}
/* Variables and functions */
scalar_t__ ft_putchar_fd(char, int);
int ft_putstr_fd(char const *, int);
int ft_putendl_fd(char const *s, int fd) {
  int ret;
  if (!s)
    return (0);
  ret = ft_putstr_fd(s, fd);
  ret += ft_putchar_fd('\n', fd);
  return (ret);
}


x86 assembly (clang, -O0):
<ft_putendl_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1146 <ft_putendl_fd+0x26>
movl   $0x0,-0x4(%rbp)
jmp    1175 <ft_putendl_fd+0x55>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <ft_putstr_fd@plt>
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%esi
mov    $0xa,%edi
call   1040 <ft_putchar_fd@plt>
mov    %rax,%rcx
movslq -0x18(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putendl_fd>:
test   %rdi,%rdi
je     1146 <ft_putendl_fd+0x26>
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
call   1030 <ft_putstr_fd@plt>
mov    %eax,%ebp
mov    $0xa,%edi
mov    %ebx,%esi
call   1040 <ft_putchar_fd@plt>
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ft_putendl_fd(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %10, label %9
9: ; preds = %2
store i32 0, i32* %3
br label %21
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = load i32, i32* %5
%13 = call i32 @ft_putstr_fd(i8* %11, i32 %12)
store i32 %13, i32* %6
%14 = load i32, i32* %5
%15 = call i64 @ft_putchar_fd(i8 signext 10, i32 %14)
%16 = load i32, i32* %6
%17 = sext i32 %16 to i64
%18 = add nsw i64 %17, %15
%19 = trunc i64 %18 to i32
store i32 %19, i32* %6
%20 = load i32, i32* %6
store i32 %20, i32* %3
br label %21
21: ; preds = %10, %9
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @ft_putendl_fd(i8* %0, i32 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = tail call i32 @ft_putstr_fd(i8* %0, i32 %1)
%6 = tail call i64 @ft_putchar_fd(i8 signext 10, i32 %1)
%7 = trunc i64 %6 to i32
%8 = add i32 %5, %7
br label %9
9: ; preds = %2, %4
%10 = phi i32 [ %8, %4 ], [ 0, %2 ]
ret i32 %10
}
int ILLutil_our_log2(int a) {
  int i = 0, j = 1;
  while (j < a) {
    j = j << 1;
    i++;
  }
  return i ? i : 1;
}


x86 assembly (clang, -O0):
<ILLutil_our_log2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1138 <ILLutil_our_log2+0x38>
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1115 <ILLutil_our_log2+0x15>
cmpl   $0x0,-0x8(%rbp)
je     114d <ILLutil_our_log2+0x4d>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    115a <ILLutil_our_log2+0x5a>
mov    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    115a <ILLutil_our_log2+0x5a>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ILLutil_our_log2>:
mov    $0x1,%eax
cmp    $0x2,%edi
jl     1129 <ILLutil_our_log2+0x29>
xor    %eax,%eax
mov    $0x1,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
add    %ecx,%ecx
add    $0x1,%eax
cmp    %edi,%ecx
jl     1120 <ILLutil_our_log2+0x20>
ret

LLVM IR (-O0):
define i32 @ILLutil_our_log2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 1, i32* %4
br label %5
5: ; preds = %9, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %14
9: ; preds = %5
%10 = load i32, i32* %4
%11 = shl i32 %10, 1
store i32 %11, i32* %4
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %5
14: ; preds = %5
%15 = load i32, i32* %3
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %19
17: ; preds = %14
%18 = load i32, i32* %3
br label %20
19: ; preds = %14
br label %20
20: ; preds = %19, %17
%21 = phi i32 [ %18, %17 ], [ 1, %19 ]
ret i32 %21
}

LLVM IR (-O2):
define i32 @ILLutil_our_log2(i32 %0) {
%2 = icmp sgt i32 %0, 1
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 1, %1 ]
%5 = phi i32 [ %7, %3 ], [ 0, %1 ]
%6 = shl i32 %4, 1
%7 = add nuw nsw i32 %5, 1
%8 = icmp slt i32 %6, %0
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi i32 [ 1, %1 ], [ %7, %3 ]
ret i32 %10
}