xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void *realloc(void *, size_t);
void *realloc_struct(void *ptr, size_t nmemb, size_t size) {
  if (nmemb > ((size_t)-1) / size) {
    free(ptr);
    return NULL;
  }
  return realloc(ptr, nmemb * size);
}


x86 assembly (clang, -O0):
<realloc_struct>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    $0xffffffffffffffff,%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x20(%rbp)
mov    %rax,%rcx
mov    -0x28(%rbp),%rax
cmp    %rcx,%rax
jbe    1171 <realloc_struct+0x51>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
movq   $0x0,-0x8(%rbp)
jmp    1187 <realloc_struct+0x67>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
imul   -0x20(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<realloc_struct>:
mov    %rdx,%rcx
mov    %rdx,%rax
mul    %rsi
jno    1135 <realloc_struct+0x15>
push   %rax
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret
imul   %rsi,%rcx
mov    %rcx,%rsi
jmp    1040 <realloc@plt>

LLVM IR (-O0):
define i8* @realloc_struct(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%8 = load i64, i64* %6
%9 = load i64, i64* %7
%10 = udiv i64 -1, %9
%11 = icmp ugt i64 %8, %10
br i1 %11, label %12, label %15
12: ; preds = %3
%13 = load i8*, i8** %5
%14 = call i32 @free(i8* %13)
store i8* null, i8** %4
br label %21
15: ; preds = %3
%16 = load i8*, i8** %5
%17 = load i64, i64* %6
%18 = load i64, i64* %7
%19 = mul i64 %17, %18
%20 = call i8* @realloc(i8* %16, i64 %19)
store i8* %20, i8** %4
br label %21
21: ; preds = %15, %12
%22 = load i8*, i8** %4
ret i8* %22
}

LLVM IR (-O2):
define noalias i8* @realloc_struct(i8* nocapture %0, i64 %1, i64 %2) {
%4 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %2, i64 %1)
%5 = extractvalue { i64, i1 } %4, 1
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @free(i8* %0)
br label %11
8: ; preds = %3
%9 = mul i64 %2, %1
%10 = tail call i8* @realloc(i8* %0, i64 %9)
br label %11
11: ; preds = %8, %6
%12 = phi i8* [ null, %6 ], [ %10, %8 ]
ret i8* %12
}
void f(int *p, int **pp) { *pp = p; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    %rdi,(%rsi)
ret

LLVM IR (-O0):
define void @f(i32* %0, i32** %1) {
%3 = alloca i32*
%4 = alloca i32**
store i32* %0, i32** %3
store i32** %1, i32*** %4
%5 = load i32*, i32** %3
%6 = load i32**, i32*** %4
store i32* %5, i32** %6
ret void
}

LLVM IR (-O2):
define void @f(i32* %0, i32** nocapture writeonly %1) {
store i32* %0, i32** %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ partitionArray(int *, int, int, int *);
void quickSort(int *a, int beg, int end) {
  int pivotLoc;
  if (beg < end) {
    partitionArray(a, beg, end, &pivotLoc);
    quickSort(a, beg, pivotLoc - 1);
    quickSort(a, pivotLoc + 1, end);
  }
}


x86 assembly (clang, -O0):
<quickSort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1175 <quickSort+0x55>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
lea    -0x14(%rbp),%rcx
call   1030 <partitionArray@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quickSort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quickSort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quickSort>:
cmp    %edx,%esi
jge    1167 <quickSort+0x47>
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %edx,%ebx
mov    %esi,%ebp
mov    %rdi,%r14
lea    0xc(%rsp),%rcx
call   1030 <partitionArray@plt>
mov    0xc(%rsp),%edx
add    $0xffffffff,%edx
mov    %r14,%rdi
mov    %ebp,%esi
call   1040 <quickSort@plt>
mov    0xc(%rsp),%esi
add    $0x1,%esi
mov    %r14,%rdi
mov    %ebx,%edx
call   1040 <quickSort@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @quickSort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partitionArray(i32* %12, i32 %13, i32 %14, i32* %7)
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @quickSort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = bitcast i32* %4 to i8*
%6 = icmp slt i32 %1, %2
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = call i32 @partitionArray(i32* %0, i32 %1, i32 %2, i32* %4)
%9 = load i32, i32* %4
%10 = add nsw i32 %9, -1
%11 = load i32, i32* %4
%12 = add nsw i32 %11, 1
br label %13
13: ; preds = %7, %3
ret void
}
int f1(int a, int b) { return a + b; }


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @f1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @f1(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ EXPECT_EQ(int, int);
void ExpectIntEq(int _a, int _b) { EXPECT_EQ(_a, _b); }


x86 assembly (clang, -O0):
<ExpectIntEq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <EXPECT_EQ@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ExpectIntEq>:
jmp    1030 <EXPECT_EQ@plt>

LLVM IR (-O0):
define void @ExpectIntEq(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @EXPECT_EQ(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @ExpectIntEq(i32 %0, i32 %1) {
%3 = tail call i32 @EXPECT_EQ(i32 %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ IPC_RMID;
int /*<<< orphan*/ shmctl(int, int /*<<< orphan*/, int /*<<< orphan*/ *);
int close_shm(int shmid) { shmctl(shmid, IPC_RMID, NULL); }


x86 assembly (clang, -O0):
<close_shm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <shmctl@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_shm>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
jmp    1030 <shmctl@plt>

LLVM IR (-O0):
@IPC_RMID = global i32 0
define i32 @close_shm(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = load i32, i32* @IPC_RMID
%6 = call i32 @shmctl(i32 %4, i32 %5, i32* null)
%7 = load i32, i32* %2
ret i32 %7
}

LLVM IR (-O2):
@IPC_RMID = global i32 0
define i32 @close_shm(i32 %0) {
%2 = load i32, i32* @IPC_RMID
%3 = tail call i32 @shmctl(i32 %0, i32 %2, i32* null)
ret i32 undef
}
/* Variables and functions */
size_t senc_lz_hash(size_t a) { return (a >> 24) + (a >> 20) + (a >> 13) + a; }


x86 assembly (clang, -O0):
<senc_lz_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x18,%rax
mov    -0x8(%rbp),%rcx
shr    $0x14,%rcx
add    %rcx,%rax
mov    -0x8(%rbp),%rcx
shr    $0xd,%rcx
add    %rcx,%rax
add    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<senc_lz_hash>:
mov    %rdi,%rcx
shr    $0x18,%rcx
mov    %rdi,%rax
shr    $0x14,%rax
add    %rdi,%rax
shr    $0xd,%rdi
add    %rcx,%rax
add    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @senc_lz_hash(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 24
%5 = load i64, i64* %2
%6 = lshr i64 %5, 20
%7 = add i64 %4, %6
%8 = load i64, i64* %2
%9 = lshr i64 %8, 13
%10 = add i64 %7, %9
%11 = load i64, i64* %2
%12 = add i64 %10, %11
ret i64 %12
}

LLVM IR (-O2):
define i64 @senc_lz_hash(i64 %0) {
%2 = lshr i64 %0, 24
%3 = lshr i64 %0, 20
%4 = lshr i64 %0, 13
%5 = add i64 %3, %0
%6 = add i64 %5, %2
%7 = add i64 %6, %4
ret i64 %7
}
double geom_J_cyl_rpz_B(double x[]) { return x[0]; }


x86 assembly (clang, -O0):
<geom_J_cyl_rpz_B>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<geom_J_cyl_rpz_B>:
movsd  (%rdi),%xmm0
ret

LLVM IR (-O0):
define double @geom_J_cyl_rpz_B(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
ret double %5
}

LLVM IR (-O2):
define double @geom_J_cyl_rpz_B(double* nocapture %0) {
%2 = load double, double* %0
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ GPIO2_Combined_16_31_DriverIRQHandler();
__attribute__((weak)) void GPIO2_Combined_16_31_IRQHandler(void) {
  GPIO2_Combined_16_31_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<GPIO2_Combined_16_31_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GPIO2_Combined_16_31_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIO2_Combined_16_31_IRQHandler>:
xor    %eax,%eax
jmp    1030 <GPIO2_Combined_16_31_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @GPIO2_Combined_16_31_IRQHandler() {
%1 = call i32 (...) @GPIO2_Combined_16_31_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @GPIO2_Combined_16_31_IRQHandler() {
%1 = tail call i32 (...) @GPIO2_Combined_16_31_DriverIRQHandler()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ max(int, int);
int main(void) {
  max(42, 3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x2a,%edi
mov    $0x3,%esi
call   1030 <max@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2a,%edi
mov    $0x3,%esi
call   1030 <max@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @max(i32 42, i32 3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @max(i32 42, i32 3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ make_filename(long, char *, char *);
long umfpack_zi_save_numeric(void *, char *);
void umf4zsnum_(void **Numeric, long *filenum, long *status) {
  char filename[200];
  make_filename(*filenum, "n", filename);
  *status = umfpack_zi_save_numeric(*Numeric, filename);
}


x86 assembly (clang, -O0):
<umf4zsnum_>:
push   %rbp
mov    %rsp,%rbp
sub    $0xe0,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
lea    -0xe0(%rbp),%rdx
lea    0xeb4(%rip),%rsi
call   1040 <make_filename@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
lea    -0xe0(%rbp),%rsi
call   1030 <umfpack_zi_save_numeric@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
add    $0xe0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<umf4zsnum_>:
push   %r15
push   %r14
push   %rbx
sub    $0xd0,%rsp
mov    %rdx,%r14
mov    %rdi,%rbx
mov    (%rsi),%rdi
lea    0xec4(%rip),%rsi
mov    %rsp,%r15
mov    %r15,%rdx
call   1040 <make_filename@plt>
mov    (%rbx),%rdi
mov    %r15,%rsi
call   1030 <umfpack_zi_save_numeric@plt>
mov    %rax,(%r14)
add    $0xd0,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [2 x i8] c"n\00"
define void @umf4zsnum_(i8** %0, i64* %1, i64* %2) {
%4 = alloca i8**
%5 = alloca i64*
%6 = alloca i64*
%7 = alloca [200 x i8]
store i8** %0, i8*** %4
store i64* %1, i64** %5
store i64* %2, i64** %6
%8 = load i64*, i64** %5
%9 = load i64, i64* %8
%10 = getelementptr inbounds [200 x i8], [200 x i8]* %7, i64 0, i64 0
%11 = call i32 @make_filename(i64 %9, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* %10)
%12 = load i8**, i8*** %4
%13 = load i8*, i8** %12
%14 = getelementptr inbounds [200 x i8], [200 x i8]* %7, i64 0, i64 0
%15 = call i64 @umfpack_zi_save_numeric(i8* %13, i8* %14)
%16 = load i64*, i64** %6
store i64 %15, i64* %16
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"n\00"
define void @umf4zsnum_(i8** nocapture %0, i64* nocapture %1, i64* nocapture writeonly %2) {
%4 = alloca [200 x i8]
%5 = getelementptr inbounds [200 x i8], [200 x i8]* %4, i64 0, i64 0
%6 = load i64, i64* %1
%7 = call i32 @make_filename(i64 %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* %5)
%8 = load i8*, i8** %0
%9 = call i64 @umfpack_zi_save_numeric(i8* %8, i8* %5)
store i64 %9, i64* %2
ret void
}
/* Type definitions */
struct VAL_env {
  int dummy;
};
struct VAL_cell {
  int dummy;
};
struct AST_tree {
  int dummy;
};

/* Variables and functions */
struct VAL_cell *new_FUNC_VAL_cell(struct VAL_cell *, struct AST_tree *,
                                   struct VAL_env *);
struct VAL_cell *AST_tree_fun(struct AST_tree *self, struct VAL_cell *x,
                              struct AST_tree *body, struct VAL_env *environ) {
  return new_FUNC_VAL_cell(x, body, environ);
}


x86 assembly (clang, -O0):
<AST_tree_fun>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <new_FUNC_VAL_cell@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AST_tree_fun>:
mov    %rsi,%rdi
mov    %rdx,%rsi
mov    %rcx,%rdx
jmp    1030 <new_FUNC_VAL_cell@plt>

LLVM IR (-O0):
%struct.VAL_cell = type { i32 }
%struct.AST_tree = type { i32 }
%struct.VAL_env = type { i32 }
define %struct.VAL_cell* @AST_tree_fun(%struct.AST_tree* %0, %struct.VAL_cell* %1, %struct.AST_tree* %2, %struct.VAL_env* %3) {
%5 = alloca %struct.AST_tree*
%6 = alloca %struct.VAL_cell*
%7 = alloca %struct.AST_tree*
%8 = alloca %struct.VAL_env*
store %struct.AST_tree* %0, %struct.AST_tree** %5
store %struct.VAL_cell* %1, %struct.VAL_cell** %6
store %struct.AST_tree* %2, %struct.AST_tree** %7
store %struct.VAL_env* %3, %struct.VAL_env** %8
%9 = load %struct.VAL_cell*, %struct.VAL_cell** %6
%10 = load %struct.AST_tree*, %struct.AST_tree** %7
%11 = load %struct.VAL_env*, %struct.VAL_env** %8
%12 = call %struct.VAL_cell* @new_FUNC_VAL_cell(%struct.VAL_cell* %9, %struct.AST_tree* %10, %struct.VAL_env* %11)
ret %struct.VAL_cell* %12
}

LLVM IR (-O2):
%struct.VAL_cell = type { i32 }
%struct.AST_tree = type { i32 }
%struct.VAL_env = type { i32 }
define %struct.VAL_cell* @AST_tree_fun(%struct.AST_tree* nocapture readnone %0, %struct.VAL_cell* %1, %struct.AST_tree* %2, %struct.VAL_env* %3) {
%5 = tail call %struct.VAL_cell* @new_FUNC_VAL_cell(%struct.VAL_cell* %1, %struct.AST_tree* %2, %struct.VAL_env* %3)
ret %struct.VAL_cell* %5
}
/* Type definitions */
typedef int /*<<< orphan*/ locale_t;

/* Variables and functions */
long strtol(char const *, char **, int);
long strtol_l(const char *restrict s, char **restrict p, int base,
              locale_t loc) {
  return strtol(s, p, base);
}


x86 assembly (clang, -O0):
<strtol_l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <strtol@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtol_l>:
jmp    1030 <strtol@plt>

LLVM IR (-O0):
define i64 @strtol_l(i8* noalias %0, i8** noalias %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8**
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i8** %1, i8*** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i8**, i8*** %6
%11 = load i32, i32* %7
%12 = call i64 @strtol(i8* %9, i8** %10, i32 %11)
ret i64 %12
}

LLVM IR (-O2):
define i64 @strtol_l(i8* noalias %0, i8** noalias nocapture %1, i32 %2, i32 %3) {
%5 = tail call i64 @strtol(i8* %0, i8** %1, i32 %2)
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ stderr;
void testArguments(int argc, char **argv) {
  if (argc < 2 || argc > 2) {
    fprintf(stderr, "Numero invalido de argumentos. (%d) - Esperado 1!\n",
            argc - 1);
    exit(-1);
  }
}


x86 assembly (clang, -O0):
<testArguments>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x4(%rbp)
jl     1143 <testArguments+0x23>
cmpl   $0x2,-0x4(%rbp)
jle    1168 <testArguments+0x48>
mov    0x2e96(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%edx
sub    $0x1,%edx
lea    0xea7(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testArguments>:
cmp    $0x2,%edi
jne    1126 <testArguments+0x6>
ret
push   %rax
mov    %edi,%edx
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
add    $0xffffffff,%edx
lea    0xec4(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [51 x i8] c"Numero invalido de argumentos. (%d) - Esperado 1!\0A\00"
define void @testArguments(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 2
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp sgt i32 %8, 2
br i1 %9, label %10, label %16
10: ; preds = %7, %2
%11 = load i32, i32* @stderr
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 1
%14 = call i32 @fprintf(i32 %11, i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0), i32 %13)
%15 = call i32 @exit(i32 -1)
unreachable
16: ; preds = %7
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [51 x i8] c"Numero invalido de argumentos. (%d) - Esperado 1!\0A\00"
define void @testArguments(i32 %0, i8** nocapture readnone %1) {
%3 = icmp eq i32 %0, 2
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = load i32, i32* @stderr
%6 = add nsw i32 %0, -1
%7 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = tail call i32 @exit(i32 -1)
unreachable
9: ; preds = %2
ret void
}
/* Type definitions */
typedef int x;
typedef int uint16_t;

/* Variables and functions */
uint16_t bswap_16(uint16_t x) {
  return ((((x)&0xff00) >> 8) | (((x)&0xff) << 8));
}


x86 assembly (clang, -O0):
<bswap_16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
sar    $0x8,%eax
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bswap_16>:
rol    $0x8,%di
movzwl %di,%eax
ret

LLVM IR (-O0):
define i32 @bswap_16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 65280
%5 = ashr i32 %4, 8
%6 = load i32, i32* %2
%7 = and i32 %6, 255
%8 = shl i32 %7, 8
%9 = or i32 %5, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @bswap_16(i32 %0) {
%2 = trunc i32 %0 to i16
%3 = tail call i16 @llvm.bswap.i16(i16 %2)
%4 = zext i16 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int __sgetc(int /*<<< orphan*/ *);
int fgetc(FILE *fp) { return (__sgetc(fp)); }


x86 assembly (clang, -O0):
<fgetc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__sgetc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgetc>:
jmp    1030 <__sgetc@plt>

LLVM IR (-O0):
define i32 @fgetc(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @__sgetc(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @fgetc(i32* %0) {
%2 = tail call i32 @__sgetc(i32* %0)
ret i32 %2
}
int fn6(int a, int b) {
  int tem1 = b ^ a;
  int tem2 = a | b;
  return tem1 ^ tem2;
}


x86 assembly (clang, -O0):
<fn6>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn6>:
mov    %edi,%eax
and    %esi,%eax
ret

LLVM IR (-O0):
define i32 @fn6(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = load i32, i32* %3
%9 = xor i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = or i32 %10, %11
store i32 %12, i32* %6
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = xor i32 %13, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @fn6(i32 %0, i32 %1) {
%3 = and i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isgraph(int);
void t_isgraph_0xc1() {
  Assert_real((isgraph(193) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              970, ("isgraph should be 0 for 0xc1"));
}


x86 assembly (clang, -O0):
<t_isgraph_0xc1>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc1,%edi
call   1040 <isgraph@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3ca,%edx
lea    0xf5b(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0xc1>:
push   %rax
mov    $0xc1,%edi
call   1040 <isgraph@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3ca,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0xc1\00"
define void @t_isgraph_0xc1() {
%1 = call i64 @isgraph(i32 193)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 970, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0xc1\00"
define void @t_isgraph_0xc1() {
%1 = tail call i64 @isgraph(i32 193)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 970, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void s2e_disable_all_apic_interrupts() {
  __asm__ __volatile__(".byte 0x0f, 0x3f\n"
                       ".byte 0x00, 0x51, 0x01, 0x00\n"
                       ".byte 0x00, 0x00, 0x00, 0x00\n");
}


x86 assembly (clang, -O0):
<s2e_disable_all_apic_interrupts>:
push   %rbp
mov    %rsp,%rbp
(bad)
add    %dl,0x1(%rcx)
add    %al,(%rax)
add    %al,(%rax)
add    %bl,-0x3d(%rbp)

x86 assembly (clang, -O2):
<s2e_disable_all_apic_interrupts>:
(bad)
add    %dl,0x1(%rcx)
add    %al,(%rax)
add    %al,(%rax)
add    %al,%bl

LLVM IR (-O0):
define void @s2e_disable_all_apic_interrupts() {
ret void
}

LLVM IR (-O2):
define void @s2e_disable_all_apic_interrupts() {
tail call void asm sideeffect ".byte 0x0f, 0x3f\0A.byte 0x00, 0x51, 0x01, 0x00\0A.byte 0x00, 0x00, 0x00, 0x00\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
int sum(int a, int b) {
  int c = a + b;
  return c;
}


x86 assembly (clang, -O0):
<sum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @sum(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = add nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @sum(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
/* Type definitions */
struct wpa_state_machine {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wpa_sm_step(struct wpa_state_machine *);
void wpa_sm_call_step(void *eloop_ctx, void *timeout_ctx) {
  struct wpa_state_machine *sm = timeout_ctx;
  wpa_sm_step(sm);
}


x86 assembly (clang, -O0):
<wpa_sm_call_step>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <wpa_sm_step@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpa_sm_call_step>:
mov    %rsi,%rdi
jmp    1030 <wpa_sm_step@plt>

LLVM IR (-O0):
%struct.wpa_state_machine = type { i32 }
define void @wpa_sm_call_step(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca %struct.wpa_state_machine*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to %struct.wpa_state_machine*
store %struct.wpa_state_machine* %7, %struct.wpa_state_machine** %5
%8 = load %struct.wpa_state_machine*, %struct.wpa_state_machine** %5
%9 = call i32 @wpa_sm_step(%struct.wpa_state_machine* %8)
ret void
}

LLVM IR (-O2):
%struct.wpa_state_machine = type { i32 }
define void @wpa_sm_call_step(i8* nocapture readnone %0, i8* %1) {
%3 = bitcast i8* %1 to %struct.wpa_state_machine*
%4 = tail call i32 @wpa_sm_step(%struct.wpa_state_machine* %3)
ret void
}
/* Variables and functions */
bool unload(void) { return true; }


x86 assembly (clang, -O0):
<unload>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unload>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @unload() {
ret i32 1
}

LLVM IR (-O2):
define i32 @unload() {
ret i32 1
}
int wrap_main1(int a1, int a2, int a3, int a4, int a5, int a6) {
  return a1 + a2 + a3 + a4 + a5 + a6;
}


x86 assembly (clang, -O0):
<wrap_main1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
add    -0x14(%rbp),%eax
add    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrap_main1>:
lea    (%rdi,%rsi,1),%eax
add    %edx,%eax
add    %ecx,%eax
add    %r8d,%eax
add    %r9d,%eax
ret

LLVM IR (-O0):
define i32 @wrap_main1(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = add nsw i32 %13, %14
%16 = load i32, i32* %9
%17 = add nsw i32 %15, %16
%18 = load i32, i32* %10
%19 = add nsw i32 %17, %18
%20 = load i32, i32* %11
%21 = add nsw i32 %19, %20
%22 = load i32, i32* %12
%23 = add nsw i32 %21, %22
ret i32 %23
}

LLVM IR (-O2):
define i32 @wrap_main1(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = add nsw i32 %1, %0
%8 = add nsw i32 %7, %2
%9 = add nsw i32 %8, %3
%10 = add nsw i32 %9, %4
%11 = add nsw i32 %10, %5
ret i32 %11
}
/* Variables and functions */
int imp_lib1();
int main() { return imp_lib1(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <imp_lib1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <imp_lib1@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @imp_lib1()
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @imp_lib1()
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ X509_SIG;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
scalar_t__ ASN1_item_d2i(int /*<<< orphan*/ **, unsigned char const **, long,
                         int /*<<< orphan*/ *);
int /*<<< orphan*/ X509_SIG_it;
X509_SIG *d2i_X509_SIG(X509_SIG **a, const unsigned char **in, long len) {
  return (X509_SIG *)ASN1_item_d2i((ASN1_VALUE **)a, in, len, &X509_SIG_it);
}


x86 assembly (clang, -O0):
<d2i_X509_SIG>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    0x2eb1(%rip),%rcx
call   1030 <ASN1_item_d2i@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_X509_SIG>:
mov    0x2ed1(%rip),%rcx
jmp    1030 <ASN1_item_d2i@plt>

LLVM IR (-O0):
@X509_SIG_it = global i32 0
define i32* @d2i_X509_SIG(i32** %0, i8** %1, i64 %2) {
%4 = alloca i32**
%5 = alloca i8**
%6 = alloca i64
store i32** %0, i32*** %4
store i8** %1, i8*** %5
store i64 %2, i64* %6
%7 = load i32**, i32*** %4
%8 = load i8**, i8*** %5
%9 = load i64, i64* %6
%10 = call i64 @ASN1_item_d2i(i32** %7, i8** %8, i64 %9, i32* @X509_SIG_it)
%11 = inttoptr i64 %10 to i32*
ret i32* %11
}

LLVM IR (-O2):
@X509_SIG_it = global i32 0
define i32* @d2i_X509_SIG(i32** %0, i8** %1, i64 %2) {
%4 = tail call i64 @ASN1_item_d2i(i32** %0, i8** %1, i64 %2, i32* @X509_SIG_it)
%5 = inttoptr i64 %4 to i32*
ret i32* %5
}
/* Variables and functions */
int new_type(int x) {
  switch (x) {
  case 1:
    return 21;
  case 2:
    return 22;
  case 3:
    return 20;
  case 4:
    return 23;
  case 5:
    return 24;
  default:
    break;
  }
  return 33;
}


x86 assembly (clang, -O0):
<new_type>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x4,%eax
ja     116c <new_type+0x6c>
mov    -0x10(%rbp),%rax
lea    0xed9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x15,-0x4(%rbp)
jmp    1178 <new_type+0x78>
movl   $0x16,-0x4(%rbp)
jmp    1178 <new_type+0x78>
movl   $0x14,-0x4(%rbp)
jmp    1178 <new_type+0x78>
movl   $0x17,-0x4(%rbp)
jmp    1178 <new_type+0x78>
movl   $0x18,-0x4(%rbp)
jmp    1178 <new_type+0x78>
jmp    1171 <new_type+0x71>
movl   $0x21,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<new_type>:
add    $0xffffffff,%edi
mov    $0x21,%eax
cmp    $0x4,%edi
ja     111a <new_type+0x1a>
movslq %edi,%rax
lea    0xee9(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @new_type(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %10 [
i32 1, label %5
i32 2, label %6
i32 3, label %7
i32 4, label %8
i32 5, label %9
]
5: ; preds = %1
store i32 21, i32* %2
br label %12
6: ; preds = %1
store i32 22, i32* %2
br label %12
7: ; preds = %1
store i32 20, i32* %2
br label %12
8: ; preds = %1
store i32 23, i32* %2
br label %12
9: ; preds = %1
store i32 24, i32* %2
br label %12
10: ; preds = %1
br label %11
11: ; preds = %10
store i32 33, i32* %2
br label %12
12: ; preds = %11, %9, %8, %7, %6, %5
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@switch.table.new_type = [5 x i32] [i32 21, i32 22, i32 20, i32 23, i32 24]
define i32 @new_type(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 5
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [5 x i32], [5 x i32]* @switch.table.new_type, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 33, %1 ]
ret i32 %9
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *, int /*<<< orphan*/);
int copy_dobldobl_start_solutions_to_container(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc(257, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<copy_dobldobl_start_solutions_to_container>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x101,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_dobldobl_start_solutions_to_container>:
mov    $0x101,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @copy_dobldobl_start_solutions_to_container() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 257, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @copy_dobldobl_start_solutions_to_container() {
%1 = tail call i32 @_ada_use_c2phc(i32 257, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
void mbox_debugfs_register(struct hisi_mbox_device **list) { return; }


x86 assembly (clang, -O0):
<mbox_debugfs_register>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mbox_debugfs_register>:
ret

LLVM IR (-O0):
%struct.hisi_mbox_device = type opaque
define void @mbox_debugfs_register(%struct.hisi_mbox_device** %0) {
%2 = alloca %struct.hisi_mbox_device**
store %struct.hisi_mbox_device** %0, %struct.hisi_mbox_device*** %2
ret void
}

LLVM IR (-O2):
%struct.hisi_mbox_device = type opaque
define void @mbox_debugfs_register(%struct.hisi_mbox_device** nocapture %0) {
ret void
}
void test___atomic_fetch_or_0(char *mem) { __atomic_fetch_or(mem, 1, 4); }


x86 assembly (clang, -O0):
<test___atomic_fetch_or_0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movb   $0x1,-0x9(%rbp)
mov    -0x9(%rbp),%cl
mov    %cl,-0xc(%rbp)
mov    (%rax),%al
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%al
mov    -0x18(%rbp),%rcx
mov    -0xc(%rbp),%sil
mov    %al,%dl
or     %sil,%dl
lock cmpxchg %dl,(%rcx)
sete   %cl
mov    %al,-0x19(%rbp)
test   $0x1,%cl
mov    %al,-0xb(%rbp)
jne    114a <test___atomic_fetch_or_0+0x4a>
jmp    111f <test___atomic_fetch_or_0+0x1f>
mov    -0x19(%rbp),%al
mov    %al,-0xa(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test___atomic_fetch_or_0>:
lock orb $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @test___atomic_fetch_or_0(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
%4 = alloca i8
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8 1, i8* %3
%6 = load i8, i8* %3
%7 = atomicrmw or i8* %5, i8 %6 acq_rel
store i8 %7, i8* %4
%8 = load i8, i8* %4
ret void
}

LLVM IR (-O2):
define void @test___atomic_fetch_or_0(i8* nocapture %0) {
%2 = atomicrmw or i8* %0, i8 1 acq_rel
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ttteardown();
teardown() { ttteardown(); }


x86 assembly (clang, -O0):
<teardown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <ttteardown@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<teardown>:
xor    %eax,%eax
jmp    1030 <ttteardown@plt>

LLVM IR (-O0):
define i32 @teardown() {
%1 = alloca i32
%2 = call i32 (...) @ttteardown()
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @teardown() {
%1 = tail call i32 (...) @ttteardown()
ret i32 undef
}
void event_spacing(n, m) int n, m;
{
  emit_string("y");
  printlen(n, m);
}


x86 assembly (clang, -O0):
<event_spacing>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    0xecb(%rip),%rdi
mov    $0x0,%al
call   1030 <emit_string@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x0,%al
call   1040 <printlen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_spacing>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
lea    0xed2(%rip),%rdi
xor    %eax,%eax
call   1030 <emit_string@plt>
mov    %ebp,%edi
mov    %ebx,%esi
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <printlen@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"y\00"
define void @event_spacing(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (i8*, ...) bitcast (i32 (...)* @emit_string to i32 (i8*, ...)*)(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 (i32, i32, ...) bitcast (i32 (...)* @printlen to i32 (i32, i32, ...)*)(i32 %6, i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"y\00"
define void @event_spacing(i32 %0, i32 %1) {
%3 = tail call i32 (i8*, ...) bitcast (i32 (...)* @emit_string to i32 (i8*, ...)*)(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @printlen to i32 (i32, i32, ...)*)(i32 %0, i32 %1)
ret void
}
/* Variables and functions */
int EOF;
int getchar();
int /*<<< orphan*/ putchar(int);
main() {
  int c, pre;
  while ((c = getchar()) != EOF) {
    if (c != ' ' || pre != ' ') {
      putchar(c);
    }
    pre = c;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %eax,-0x8(%rbp)
mov    0x2ea8(%rip),%rcx
cmp    (%rcx),%eax
je     116f <main+0x4f>
cmpl   $0x20,-0x8(%rbp)
jne    115c <main+0x3c>
cmpl   $0x20,-0xc(%rbp)
je     1164 <main+0x44>
mov    -0x8(%rbp),%edi
call   1030 <putchar@plt>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    112f <main+0xf>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %eax,%eax
call   1040 <getchar@plt>
mov    0x2eb6(%rip),%r14
cmp    (%r14),%eax
jne    1141 <main+0x21>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
jmp    1165 <main+0x45>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %ebx,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
mov    %ebx,%ecx
cmp    (%r14),%eax
je     1137 <main+0x17>
mov    %eax,%ebx
cmp    $0x20,%eax
jne    1150 <main+0x30>
cmp    $0x20,%ecx
je     1157 <main+0x37>
jmp    1150 <main+0x30>

LLVM IR (-O0):
@EOF = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
br label %4
4: ; preds = %17, %0
%5 = call i32 (...) @getchar()
store i32 %5, i32* %2
%6 = load i32, i32* @EOF
%7 = icmp ne i32 %5, %6
br i1 %7, label %8, label %19
8: ; preds = %4
%9 = load i32, i32* %2
%10 = icmp ne i32 %9, 32
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = load i32, i32* %3
%13 = icmp ne i32 %12, 32
br i1 %13, label %14, label %17
14: ; preds = %11, %8
%15 = load i32, i32* %2
%16 = call i32 @putchar(i32 %15)
br label %17
17: ; preds = %14, %11
%18 = load i32, i32* %2
store i32 %18, i32* %3
br label %4
19: ; preds = %4
%20 = load i32, i32* %1
ret i32 %20
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @main() {
%1 = tail call i32 (...) @getchar()
%2 = load i32, i32* @EOF
%3 = icmp eq i32 %1, %2
br i1 %3, label %16, label %4
4: ; preds = %0, %12
%5 = phi i32 [ %13, %12 ], [ %1, %0 ]
%6 = phi i32 [ %5, %12 ], [ undef, %0 ]
%7 = icmp ne i32 %5, 32
%8 = icmp ne i32 %6, 32
%9 = select i1 %7, i1 true, i1 %8
br i1 %9, label %10, label %12
10: ; preds = %4
%11 = tail call i32 @putchar(i32 %5)
br label %12
12: ; preds = %4, %10
%13 = tail call i32 (...) @getchar()
%14 = load i32, i32* @EOF
%15 = icmp eq i32 %13, %14
br i1 %15, label %16, label %4
16: ; preds = %12, %0
ret i32 0
}
/* Variables and functions */
long double exp(double);
long double expl(long double x) { return exp((double)x); }


x86 assembly (clang, -O0):
<expl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fstpl  -0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
call   1030 <exp@plt>
fld    %st(0)
fstp   %st(0)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expl>:
fldt   0x8(%rsp)
fstpl  -0x8(%rsp)
movsd  -0x8(%rsp),%xmm0
jmp    1030 <exp@plt>

LLVM IR (-O0):
define x86_fp80 @expl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = fptrunc x86_fp80 %3 to double
%5 = call x86_fp80 @exp(double %4)
ret x86_fp80 %5
}

LLVM IR (-O2):
define x86_fp80 @expl(x86_fp80 %0) {
%2 = fptrunc x86_fp80 %0 to double
%3 = tail call x86_fp80 @exp(double %2)
ret x86_fp80 %3
}
void myfunction1(int fruit[2][3][5]) {}


x86 assembly (clang, -O0):
<myfunction1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<myfunction1>:
ret

LLVM IR (-O0):
define void @myfunction1([3 x [5 x i32]]* %0) {
%2 = alloca [3 x [5 x i32]]*
store [3 x [5 x i32]]* %0, [3 x [5 x i32]]** %2
ret void
}

LLVM IR (-O2):
define void @myfunction1([3 x [5 x i32]]* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LZ4_compressBound(int);
int LZ4_compress_HC_extStateHC(void *, char const *, char *, int,
                               int /*<<< orphan*/, int);
int LZ4_compressHC2_withStateHC(void *state, const char *src, char *dst,
                                int srcSize, int cLevel) {
  return LZ4_compress_HC_extStateHC(state, src, dst, srcSize,
                                    LZ4_compressBound(srcSize), cLevel);
}


x86 assembly (clang, -O0):
<LZ4_compressHC2_withStateHC>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x40(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x1c(%rbp),%edi
call   1030 <LZ4_compressBound@plt>
mov    -0x40(%rbp),%rdi
mov    -0x38(%rbp),%rsi
mov    -0x30(%rbp),%rdx
mov    -0x24(%rbp),%ecx
mov    %eax,%r8d
mov    -0x20(%rbp),%r9d
call   1040 <LZ4_compress_HC_extStateHC@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZ4_compressHC2_withStateHC>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %r8d,%r14d
mov    %ecx,%ebp
mov    %rdx,%r15
mov    %rsi,%r12
mov    %rdi,%rbx
mov    %ecx,%edi
call   1030 <LZ4_compressBound@plt>
mov    %rbx,%rdi
mov    %r12,%rsi
mov    %r15,%rdx
mov    %ebp,%ecx
mov    %eax,%r8d
mov    %r14d,%r9d
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
jmp    1040 <LZ4_compress_HC_extStateHC@plt>

LLVM IR (-O0):
define i32 @LZ4_compressHC2_withStateHC(i8* %0, i8* %1, i8* %2, i32 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i8*, i8** %6
%12 = load i8*, i8** %7
%13 = load i8*, i8** %8
%14 = load i32, i32* %9
%15 = load i32, i32* %9
%16 = call i32 @LZ4_compressBound(i32 %15)
%17 = load i32, i32* %10
%18 = call i32 @LZ4_compress_HC_extStateHC(i8* %11, i8* %12, i8* %13, i32 %14, i32 %16, i32 %17)
ret i32 %18
}

LLVM IR (-O2):
define i32 @LZ4_compressHC2_withStateHC(i8* %0, i8* %1, i8* %2, i32 %3, i32 %4) {
%6 = tail call i32 @LZ4_compressBound(i32 %3)
%7 = tail call i32 @LZ4_compress_HC_extStateHC(i8* %0, i8* %1, i8* %2, i32 %3, i32 %6, i32 %4)
ret i32 %7
}
/* Type definitions */
struct timespec {
  int tv_sec;
  int tv_nsec;
};
typedef int int64_t;

/* Variables and functions */
int /*<<< orphan*/ CLOCK_MONOTONIC;
int /*<<< orphan*/ clock_gettime(int /*<<< orphan*/, struct timespec *);
int64_t monotime(void) {
  struct timespec ts;
  int64_t res;
  clock_gettime(CLOCK_MONOTONIC, &ts);
  res = ts.tv_sec * 1000;
  res += ts.tv_nsec / 1000000;
  return res;
}


x86 assembly (clang, -O0):
<monotime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    -0x8(%rbp),%rsi
call   1030 <clock_gettime@plt>
imul   $0x3e8,-0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xf4240,%ecx
cltd
idiv   %ecx
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<monotime>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
call   1030 <clock_gettime@plt>
imul   $0x3e8,(%rsp),%ecx
movslq 0x4(%rsp),%rax
imul   $0x431bde83,%rax,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x32,%rax
add    %edx,%eax
add    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
@CLOCK_MONOTONIC = global i32 0
define i32 @monotime() {
%1 = alloca %struct.timespec
%2 = alloca i32
%3 = load i32, i32* @CLOCK_MONOTONIC
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %1)
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 0
%6 = load i32, i32* %5
%7 = mul nsw i32 %6, 1000
store i32 %7, i32* %2
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 1
%9 = load i32, i32* %8
%10 = sdiv i32 %9, 1000000
%11 = load i32, i32* %2
%12 = add nsw i32 %11, %10
store i32 %12, i32* %2
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
@CLOCK_MONOTONIC = global i32 0
define i32 @monotime() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = load i32, i32* @CLOCK_MONOTONIC
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %1)
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%6 = load i32, i32* %5
%7 = mul nsw i32 %6, 1000
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%9 = load i32, i32* %8
%10 = sdiv i32 %9, 1000000
%11 = add nsw i32 %10, %7
ret i32 %11
}
/* Variables and functions */
bool isSpacing(int pos, char chr) {
  if (chr == ' ')
    return true;
  else
    return false;
}


x86 assembly (clang, -O0):
<isSpacing>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %edi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movsbl -0x9(%rbp),%eax
cmp    $0x20,%eax
jne    1126 <isSpacing+0x26>
movl   $0x1,-0x4(%rbp)
jmp    112d <isSpacing+0x2d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isSpacing>:
xor    %eax,%eax
cmp    $0x20,%sil
sete   %al
ret

LLVM IR (-O0):
define i32 @isSpacing(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8
store i32 %0, i32* %4
store i8 %1, i8* %5
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 32
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, i32* %3
br label %11
10: ; preds = %2
store i32 0, i32* %3
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @isSpacing(i32 %0, i8 signext %1) {
%3 = icmp eq i8 %1, 32
%4 = zext i1 %3 to i32
ret i32 %4
}
int test_imm_02uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0x02 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_02uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x2,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_02uint64_lowword_mem>:
testb  $0x2,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_02uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 2
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_02uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 2
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}