xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void myprint(int *buf, int n) {
  int i;
  for (i = 0; i < n; i++) {
    printf("%08x\n", buf[i]);
  }
}


x86 assembly (clang, -O0):
<myprint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1157 <myprint+0x47>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <myprint+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<myprint>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1145 <myprint+0x35>
mov    %rdi,%r15
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r14
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <myprint+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%08x\0A\00"
define void @myprint(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"%08x\0A\00"
define void @myprint(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ memset(char *, int /*<<< orphan*/, int);
void burnStack(int size) {
  char buf[128];
  memset(buf, 0, sizeof(buf));
  size -= sizeof(buf);
  if (size > 0)
    burnStack(size);
}


x86 assembly (clang, -O0):
<burnStack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x90,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x90(%rbp),%rdi
xor    %esi,%esi
mov    $0x80,%edx
call   1030 <memset@plt>
movslq -0x4(%rbp),%rax
sub    $0x80,%rax
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1160 <burnStack+0x40>
mov    -0x4(%rbp),%edi
call   1040 <burnStack@plt>
add    $0x90,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<burnStack>:
push   %rbx
sub    $0x80,%rsp
mov    %edi,%ebx
mov    %rsp,%rdi
xor    %esi,%esi
mov    $0x80,%edx
call   1030 <memset@plt>
add    $0xffffff80,%ebx
test   %ebx,%ebx
jle    1147 <burnStack+0x27>
mov    %ebx,%edi
call   1040 <burnStack@plt>
add    $0x80,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @burnStack(i32 %0) {
%2 = alloca i32
%3 = alloca [128 x i8]
store i32 %0, i32* %2
%4 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 0
%5 = call i32 @memset(i8* %4, i32 0, i32 128)
%6 = load i32, i32* %2
%7 = sext i32 %6 to i64
%8 = sub i64 %7, 128
%9 = trunc i64 %8 to i32
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %1
%13 = load i32, i32* %2
br label %14
14: ; preds = %12, %1
ret void
}

LLVM IR (-O2):
define void @burnStack(i32 %0) {
%2 = alloca [128 x i8]
%3 = getelementptr inbounds [128 x i8], [128 x i8]* %2, i64 0, i64 0
%4 = call i32 @memset(i8* %3, i32 0, i32 128)
%5 = add i32 %0, -128
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
br label %8
8: ; preds = %7, %1
ret void
}
/* Variables and functions */
int cpuid_edx(int);
bool apic_check_support(void) { return (cpuid_edx(1) & (1 << 9)) != 0; }


x86 assembly (clang, -O0):
<apic_check_support>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <cpuid_edx@plt>
and    $0x200,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<apic_check_support>:
push   %rax
mov    $0x1,%edi
call   1030 <cpuid_edx@plt>
shr    $0x9,%eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @apic_check_support() {
%1 = call i32 @cpuid_edx(i32 1)
%2 = and i32 %1, 512
%3 = icmp ne i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @apic_check_support() {
%1 = tail call i32 @cpuid_edx(i32 1)
%2 = lshr i32 %1, 9
%3 = and i32 %2, 1
ret i32 %3
}
long QEIDirectionGet(unsigned long ulBase) {
  ;
  return (((*((volatile unsigned long *)(ulBase + 0x00000004))) & 0x00000002)
              ? -1
              : 1);
}


x86 assembly (clang, -O0):
<QEIDirectionGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rdx
and    $0x2,%rdx
mov    $0x1,%eax
mov    $0xffffffff,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<QEIDirectionGet>:
mov    0x4(%rdi),%rax
and    $0x2,%eax
neg    %rax
sbb    %rax,%rax
or     $0x1,%rax
ret

LLVM IR (-O0):
define i64 @QEIDirectionGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 4
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, 2
%8 = icmp ne i64 %7, 0
%9 = zext i1 %8 to i64
%10 = select i1 %8, i32 -1, i32 1
%11 = sext i32 %10 to i64
ret i64 %11
}

LLVM IR (-O2):
define i64 @QEIDirectionGet(i64 %0) {
%2 = add i64 %0, 4
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = and i64 %4, 2
%6 = icmp eq i64 %5, 0
%7 = select i1 %6, i64 1, i64 -1
ret i64 %7
}
/* Variables and functions */
size_t strcspn(char *, char *);
void ltr_int_sanitize_name(char *name) {
  char *forbidden = "\r\n";
  size_t len = strcspn(name, forbidden);
  name[len] = '\0';
}


x86 assembly (clang, -O0):
<ltr_int_sanitize_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcspn@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ltr_int_sanitize_name>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <strcspn@plt>
movb   $0x0,(%rbx,%rax,1)
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"\0D\0A\00"
define void @ltr_int_sanitize_name(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %2
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %3
%5 = load i8*, i8** %2
%6 = load i8*, i8** %3
%7 = call i64 @strcspn(i8* %5, i8* %6)
store i64 %7, i64* %4
%8 = load i8*, i8** %2
%9 = load i64, i64* %4
%10 = getelementptr inbounds i8, i8* %8, i64 %9
store i8 0, i8* %10
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"\0D\0A\00"
define void @ltr_int_sanitize_name(i8* nocapture %0) {
%2 = tail call i64 @strcspn(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%3 = getelementptr inbounds i8, i8* %0, i64 %2
store i8 0, i8* %3
ret void
}
char func(char arg0) {
  switch (arg0) {
  case 6:
    return 'E';
  case 7:
    return 'D';
  case 8:
    return 'C';
  case 9:
    return 'B';
  default:
    return 'A';
  }
}


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
add    $0xfffffffa,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x3,%eax
ja     1158 <func+0x58>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movb   $0x45,-0x1(%rbp)
jmp    115c <func+0x5c>
movb   $0x44,-0x1(%rbp)
jmp    115c <func+0x5c>
movb   $0x43,-0x1(%rbp)
jmp    115c <func+0x5c>
movb   $0x42,-0x1(%rbp)
jmp    115c <func+0x5c>
movb   $0x41,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
add    $0xfffffffa,%edi
mov    $0x45,%al
sub    %dil,%al
cmp    $0x4,%edi
movzbl %al,%ecx
mov    $0x41,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @func(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %10 [
i32 6, label %6
i32 7, label %7
i32 8, label %8
i32 9, label %9
]
6: ; preds = %1
store i8 69, i8* %2
br label %11
7: ; preds = %1
store i8 68, i8* %2
br label %11
8: ; preds = %1
store i8 67, i8* %2
br label %11
9: ; preds = %1
store i8 66, i8* %2
br label %11
10: ; preds = %1
store i8 65, i8* %2
br label %11
11: ; preds = %10, %9, %8, %7, %6
%12 = load i8, i8* %2
ret i8 %12
}

LLVM IR (-O2):
define signext i8 @func(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add nsw i32 %2, -6
%4 = icmp ult i32 %3, 4
%5 = trunc i32 %3 to i8
%6 = sub i8 69, %5
%7 = select i1 %4, i8 %6, i8 65
ret i8 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void set_hash_addr(uint32_t addr[8], uint32_t hash) { addr[6] = hash; }


x86 assembly (clang, -O0):
<set_hash_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x18(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_hash_addr>:
mov    %esi,0x18(%rdi)
ret

LLVM IR (-O0):
define void @set_hash_addr(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 6
store i32 %5, i32* %7
ret void
}

LLVM IR (-O2):
define void @set_hash_addr(i32* nocapture writeonly %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 6
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int HSV2RGB(int);
int RGB2HSV(int);
int triplet(int, int, int);
int superSat(int c) {
  int x;
  x = RGB2HSV(c);
  x = triplet(((x >> 16) & 0xff), 255, (x & 0xff));
  x = HSV2RGB(x);
  return x;
}


x86 assembly (clang, -O0):
<superSat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <RGB2HSV@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
sar    $0x10,%edi
and    $0xff,%edi
mov    -0x8(%rbp),%edx
and    $0xff,%edx
mov    $0xff,%esi
call   1050 <triplet@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <HSV2RGB@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<superSat>:
push   %rax
call   1030 <RGB2HSV@plt>
movzbl %al,%edx
shr    $0x10,%eax
movzbl %al,%edi
mov    $0xff,%esi
call   1050 <triplet@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <HSV2RGB@plt>

LLVM IR (-O0):
define i32 @superSat(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @RGB2HSV(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = ashr i32 %6, 16
%8 = and i32 %7, 255
%9 = load i32, i32* %3
%10 = and i32 %9, 255
%11 = call i32 @triplet(i32 %8, i32 255, i32 %10)
store i32 %11, i32* %3
%12 = load i32, i32* %3
%13 = call i32 @HSV2RGB(i32 %12)
store i32 %13, i32* %3
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @superSat(i32 %0) {
%2 = tail call i32 @RGB2HSV(i32 %0)
%3 = lshr i32 %2, 16
%4 = and i32 %3, 255
%5 = and i32 %2, 255
%6 = tail call i32 @triplet(i32 %4, i32 255, i32 %5)
%7 = tail call i32 @HSV2RGB(i32 %6)
ret i32 %7
}
long double __dreml(x, y)
long double x, y;
{ return __remainderl(x, y); }


x86 assembly (clang, -O0):
<__dreml>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
xor    %eax,%eax
call   1030 <__remainderl@plt>
mov    %eax,-0x24(%rbp)
fildl  -0x24(%rbp)
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__dreml>:
sub    $0x28,%rsp
fldt   0x30(%rsp)
fldt   0x40(%rsp)
fstpt  0x10(%rsp)
fstpt  (%rsp)
xor    %eax,%eax
call   1030 <__remainderl@plt>
mov    %eax,0x24(%rsp)
fildl  0x24(%rsp)
add    $0x28,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @__dreml(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %4
%7 = call i32 (x86_fp80, x86_fp80, ...) bitcast (i32 (...)* @__remainderl to i32 (x86_fp80, x86_fp80, ...)*)(x86_fp80 %5, x86_fp80 %6)
%8 = sitofp i32 %7 to x86_fp80
ret x86_fp80 %8
}

LLVM IR (-O2):
define x86_fp80 @__dreml(x86_fp80 %0, x86_fp80 %1) {
%3 = tail call i32 (x86_fp80, x86_fp80, ...) bitcast (i32 (...)* @__remainderl to i32 (x86_fp80, x86_fp80, ...)*)(x86_fp80 %0, x86_fp80 %1)
%4 = sitofp i32 %3 to x86_fp80
ret x86_fp80 %4
}
/* Variables and functions */
unsigned sizeof_intptr(void) { return (unsigned)sizeof(intptr_t); }


x86 assembly (clang, -O0):
<sizeof_intptr>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sizeof_intptr>:
mov    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @sizeof_intptr() {
ret i32 8
}

LLVM IR (-O2):
define i32 @sizeof_intptr() {
ret i32 8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ streamtoread(int, void *, int /*<<< orphan*/,
                                int /*<<< orphan*/);
int32_t unixtoread(int sock, void *buff, uint32_t leng, uint32_t msecto) {
  return streamtoread(sock, buff, leng, msecto);
}


x86 assembly (clang, -O0):
<unixtoread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
call   1030 <streamtoread@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unixtoread>:
jmp    1030 <streamtoread@plt>

LLVM IR (-O0):
define i32 @unixtoread(i32 %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @streamtoread(i32 %9, i8* %10, i32 %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @unixtoread(i32 %0, i8* %1, i32 %2, i32 %3) {
%5 = tail call i32 @streamtoread(i32 %0, i8* %1, i32 %2, i32 %3)
ret i32 %5
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t h264nalst_get_ref(uint8_t start) { return (start & 0x60) >> 5; }


x86 assembly (clang, -O0):
<h264nalst_get_ref>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x60,%eax
sar    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<h264nalst_get_ref>:
mov    %edi,%eax
shr    $0x5,%eax
and    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @h264nalst_get_ref(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 96
%5 = ashr i32 %4, 5
ret i32 %5
}

LLVM IR (-O2):
define i32 @h264nalst_get_ref(i32 %0) {
%2 = lshr i32 %0, 5
%3 = and i32 %2, 3
ret i32 %3
}
float constrain(float value, float low, float high) {
  if (value < low)
    return low;
  if (value > high)
    return high;
  return value;
}


x86 assembly (clang, -O0):
<constrain>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  %xmm2,-0x10(%rbp)
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1135 <constrain+0x35>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    115d <constrain+0x5d>
movss  -0x8(%rbp),%xmm0
ucomiss -0x10(%rbp),%xmm0
jbe    1153 <constrain+0x53>
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    115d <constrain+0x5d>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<constrain>:
minss  %xmm0,%xmm2
cmpltss %xmm1,%xmm0
movaps %xmm0,%xmm3
andnps %xmm2,%xmm3
andps  %xmm1,%xmm0
orps   %xmm3,%xmm0
ret

LLVM IR (-O0):
define float @constrain(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
%8 = load float, float* %5
%9 = load float, float* %6
%10 = fcmp olt float %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load float, float* %6
store float %12, float* %4
br label %21
13: ; preds = %3
%14 = load float, float* %5
%15 = load float, float* %7
%16 = fcmp ogt float %14, %15
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = load float, float* %7
store float %18, float* %4
br label %21
19: ; preds = %13
%20 = load float, float* %5
store float %20, float* %4
br label %21
21: ; preds = %19, %17, %11
%22 = load float, float* %4
ret float %22
}

LLVM IR (-O2):
define float @constrain(float %0, float %1, float %2) {
%4 = fcmp olt float %0, %1
%5 = fcmp ogt float %0, %2
%6 = select i1 %5, float %2, float %0
%7 = select i1 %4, float %1, float %6
ret float %7
}
int ls2h_hda_hwdep_add_power_sysfs(struct hda_codec *codec) { return 0; }


x86 assembly (clang, -O0):
<ls2h_hda_hwdep_add_power_sysfs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls2h_hda_hwdep_add_power_sysfs>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.hda_codec = type opaque
define i32 @ls2h_hda_hwdep_add_power_sysfs(%struct.hda_codec* %0) {
%2 = alloca %struct.hda_codec*
store %struct.hda_codec* %0, %struct.hda_codec** %2
ret i32 0
}

LLVM IR (-O2):
%struct.hda_codec = type opaque
define i32 @ls2h_hda_hwdep_add_power_sysfs(%struct.hda_codec* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int strlen(char const *);
int DWC_STRLEN(char const *str) { return strlen(str); }


x86 assembly (clang, -O0):
<DWC_STRLEN>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DWC_STRLEN>:
jmp    1030 <strlen@plt>

LLVM IR (-O0):
define i32 @DWC_STRLEN(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strlen(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @DWC_STRLEN(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ abort();
__attribute__((no)) double sin(double a) { abort(); }


x86 assembly (clang, -O0):
<sin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<sin>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define double @sin(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define double @sin(double %0) {
%2 = tail call i32 (...) @abort()
unreachable
}
void atomic_add(volatile int *dst, int v) {
  __asm__ __volatile__(""
                       "addl %1,%0"
                       : "=m"(*dst)
                       : "ir"(v), "m"(*dst));
}


x86 assembly (clang, -O0):
<atomic_add>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rdx
add    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_add>:
add    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @atomic_add(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = load i32*, i32** %3
ret void
}

LLVM IR (-O2):
define void @atomic_add(i32* %0, i32 %1) {
tail call void asm sideeffect "addl $1,$0", "=*m,ir,*m,~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %0, i32 %1, i32* elementtype(i32) %0)
ret void
}
void stack_swap(int *x, int *y) {
  int t;
  t = *x;
  *x = *y;
  *y = t;
}


x86 assembly (clang, -O0):
<stack_swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<stack_swap>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @stack_swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @stack_swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
/* Variables and functions */
double UINT_MAX;
unsigned int double_to_uint(double decimal) { return decimal * UINT_MAX; }


x86 assembly (clang, -O0):
<double_to_uint>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    0x2ed3(%rip),%rax
movsd  (%rax),%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<double_to_uint>:
mov    0x2ee1(%rip),%rax
mulsd  (%rax),%xmm0
cvttsd2si %xmm0,%rax
ret

LLVM IR (-O0):
@UINT_MAX = global double 0.000000e+00
define i32 @double_to_uint(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* @UINT_MAX
%5 = fmul double %3, %4
%6 = fptoui double %5 to i32
ret i32 %6
}

LLVM IR (-O2):
@UINT_MAX = global double 0.000000e+00
define i32 @double_to_uint(double %0) {
%2 = load double, double* @UINT_MAX
%3 = fmul double %2, %0
%4 = fptoui double %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ __builtin_arm_mrrc(int, int /*<<< orphan*/,
                                      int /*<<< orphan*/);
uint64_t mrrc() { return __builtin_arm_mrrc(15, 0, 0); }


x86 assembly (clang, -O0):
<mrrc>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf,%edi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <__builtin_arm_mrrc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mrrc>:
mov    $0xf,%edi
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <__builtin_arm_mrrc@plt>

LLVM IR (-O0):
define i32 @mrrc() {
%1 = call i32 @__builtin_arm_mrrc(i32 15, i32 0, i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @mrrc() {
%1 = tail call i32 @__builtin_arm_mrrc(i32 15, i32 0, i32 0)
ret i32 %1
}
/* Variables and functions */
int five();
int five_octal() { return five(); }


x86 assembly (clang, -O0):
<five_octal>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <five@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<five_octal>:
xor    %eax,%eax
jmp    1030 <five@plt>

LLVM IR (-O0):
define i32 @five_octal() {
%1 = call i32 (...) @five()
ret i32 %1
}

LLVM IR (-O2):
define i32 @five_octal() {
%1 = tail call i32 (...) @five()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ bubble_down(int *, int, int);
void heapify(int *A, int size) {
  int pos = size - 1;
  while (pos >= 0) {
    bubble_down(A, size, pos);
    pos--;
  }
}


x86 assembly (clang, -O0):
<heapify>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jl     114f <heapify+0x3f>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <bubble_down@plt>
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    1128 <heapify+0x18>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<heapify>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1146 <heapify+0x36>
mov    %esi,%r15d
mov    %rdi,%r14
lea    0x1(%r15),%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
lea    -0x2(%rbx),%edx
mov    %r14,%rdi
mov    %r15d,%esi
call   1030 <bubble_down@plt>
add    $0xffffffff,%ebx
cmp    $0x1,%ebx
ja     1130 <heapify+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @heapify(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
store i32 %7, i32* %5
br label %8
8: ; preds = %11, %2
%9 = load i32, i32* %5
%10 = icmp sge i32 %9, 0
br i1 %10, label %11, label %18
11: ; preds = %8
%12 = load i32*, i32** %3
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = call i32 @bubble_down(i32* %12, i32 %13, i32 %14)
%16 = load i32, i32* %5
%17 = add nsw i32 %16, -1
store i32 %17, i32* %5
br label %8
18: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @heapify(i32* %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %9
4: ; preds = %2, %4
%5 = phi i32 [ %6, %4 ], [ %1, %2 ]
%6 = add nsw i32 %5, -1
%7 = tail call i32 @bubble_down(i32* %0, i32 %1, i32 %6)
%8 = icmp ugt i32 %5, 1
br i1 %8, label %4, label %9
9: ; preds = %4, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void const *, unsigned long);
void __generic_memcpy_tofs(void *to, const void *from, unsigned long n) {
  memcpy(to, from, n);
}


x86 assembly (clang, -O0):
<__generic_memcpy_tofs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__generic_memcpy_tofs>:
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @__generic_memcpy_tofs(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @memcpy(i8* %7, i8* %8, i64 %9)
ret void
}

LLVM IR (-O2):
define void @__generic_memcpy_tofs(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @memcpy(i8* %0, i8* %1, i64 %2)
ret void
}
void RandomFunc(unsigned int input[1], unsigned int output[1]) {
  unsigned int state[1];
  unsigned int local2;
  unsigned int local1;
  {
    state[0UL] = input[0UL] + 4284877637U;
    local1 = 0UL;
    while (local1 < 0U) {
      local2 = 0UL;
      while (local2 < 0U) {
        local2 += 2UL;
      }
      local1 += 2UL;
    }
    output[0UL] = state[0UL] - 2699719578U;
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
add    $0xff660b45,%eax
mov    %eax,-0x14(%rbp)
movl   $0x0,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jae    115a <RandomFunc+0x5a>
movl   $0x0,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jae    114b <RandomFunc+0x4b>
mov    -0x18(%rbp),%eax
add    $0x2,%rax
mov    %eax,-0x18(%rbp)
jmp    1132 <RandomFunc+0x32>
mov    -0x1c(%rbp),%eax
add    $0x2,%rax
mov    %eax,-0x1c(%rbp)
jmp    1121 <RandomFunc+0x21>
mov    -0x14(%rbp),%ecx
sub    $0xa0ea739a,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
mov    $0x5e7b97ab,%eax
add    (%rdi),%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca [1 x i32]
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 0
%10 = load i32, i32* %9
%11 = add i32 %10, -10089659
%12 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
store i32 %11, i32* %12
store i32 0, i32* %7
br label %13
13: ; preds = %25, %2
%14 = load i32, i32* %7
%15 = icmp ult i32 %14, 0
br i1 %15, label %16, label %30
16: ; preds = %13
store i32 0, i32* %6
br label %17
17: ; preds = %20, %16
%18 = load i32, i32* %6
%19 = icmp ult i32 %18, 0
br i1 %19, label %20, label %25
20: ; preds = %17
%21 = load i32, i32* %6
%22 = zext i32 %21 to i64
%23 = add i64 %22, 2
%24 = trunc i64 %23 to i32
store i32 %24, i32* %6
br label %17
25: ; preds = %17
%26 = load i32, i32* %7
%27 = zext i32 %26 to i64
%28 = add i64 %27, 2
%29 = trunc i64 %28 to i32
store i32 %29, i32* %7
br label %13
30: ; preds = %13
%31 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
%32 = load i32, i32* %31
%33 = sub i32 %32, -1595247718
%34 = load i32*, i32** %4
%35 = getelementptr inbounds i32, i32* %34, i64 0
store i32 %33, i32* %35
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i32* nocapture %0, i32* nocapture writeonly %1) {
%3 = load i32, i32* %0
%4 = add i32 %3, 1585158059
store i32 %4, i32* %1
ret void
}
void marca_jodada(int posicao, int i, int *vetor_posicao) {
  vetor_posicao[i] = posicao;
}


x86 assembly (clang, -O0):
<marca_jodada>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x10(%rbp),%rax
movslq -0x8(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<marca_jodada>:
movslq %esi,%rax
mov    %edi,(%rdx,%rax,4)
ret

LLVM IR (-O0):
define void @marca_jodada(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = load i32*, i32** %6
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
store i32 %7, i32* %11
ret void
}

LLVM IR (-O2):
define void @marca_jodada(i32 %0, i32 %1, i32* nocapture writeonly %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %2, i64 %4
store i32 %0, i32* %5
ret void
}
/* Variables and functions */
unsigned strlen(const char *s) {
  int i = 0;
  while (*s++)
    i++;
  return i;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,(%rax)
je     1135 <strlen+0x35>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <strlen+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
cmpb   $0x0,(%rdi)
je     111c <strlen+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <strlen+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @strlen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add nuw nsw i32 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ RTLD_NOW;
void *dlopen(char *, int /*<<< orphan*/);
void *_dgles_platform_open(void) { return dlopen("libGL.so", RTLD_NOW); }


x86 assembly (clang, -O0):
<_dgles_platform_open>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <dlopen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dgles_platform_open>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
lea    0xee0(%rip),%rdi
jmp    1030 <dlopen@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"libGL.so\00"
@RTLD_NOW = global i32 0
define i8* @_dgles_platform_open() {
%1 = load i32, i32* @RTLD_NOW
%2 = call i8* @dlopen(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i8* %2
}

LLVM IR (-O2):
@.str = [9 x i8] c"libGL.so\00"
@RTLD_NOW = global i32 0
define i8* @_dgles_platform_open() {
%1 = load i32, i32* @RTLD_NOW
%2 = tail call i8* @dlopen(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i8* %2
}
/* Variables and functions */
int errno;
int /*<<< orphan*/ free(void *);
void free_noerr(void *p) {
  int saved_errno = errno;
  free(p);
  errno = saved_errno;
}


x86 assembly (clang, -O0):
<free_noerr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    -0xc(%rbp),%ecx
mov    0x2ea5(%rip),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_noerr>:
push   %rbp
push   %rbx
push   %rax
mov    0x2ec6(%rip),%rbx
mov    (%rbx),%ebp
call   1030 <free@plt>
mov    %ebp,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i32 0
define void @free_noerr(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i32, i32* @errno
store i32 %4, i32* %3
%5 = load i8*, i8** %2
%6 = call i32 @free(i8* %5)
%7 = load i32, i32* %3
store i32 %7, i32* @errno
ret void
}

LLVM IR (-O2):
@errno = global i32 0
define void @free_noerr(i8* nocapture %0) {
%2 = load i32, i32* @errno
%3 = tail call i32 @free(i8* %0)
store i32 %2, i32* @errno
ret void
}
/* Type definitions */
struct iovec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct iovec *);
void free_iovec(struct iovec *iov) { free(iov); }


x86 assembly (clang, -O0):
<free_iovec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_iovec>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.iovec = type { i32 }
define void @free_iovec(%struct.iovec* %0) {
%2 = alloca %struct.iovec*
store %struct.iovec* %0, %struct.iovec** %2
%3 = load %struct.iovec*, %struct.iovec** %2
%4 = call i32 @free(%struct.iovec* %3)
ret void
}

LLVM IR (-O2):
%struct.iovec = type { i32 }
define void @free_iovec(%struct.iovec* nocapture %0) {
%2 = tail call i32 @free(%struct.iovec* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ do_regular_work();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
scalar_t__ get_ticket();
int /*<<< orphan*/ release_ticket();
int /*<<< orphan*/ setup();
int /*<<< orphan*/ shut_down();
int main(int ac, char *av[]) {
  setup();
  if (get_ticket() != 0)
    exit(0);
  do_regular_work();
  release_ticket();
  shut_down();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1080 <setup@plt>
mov    $0x0,%al
call   1030 <get_ticket@plt>
cmp    $0x0,%rax
je     118e <main+0x2e>
xor    %edi,%edi
call   1060 <exit@plt>
mov    $0x0,%al
call   1050 <do_regular_work@plt>
mov    $0x0,%al
call   1040 <release_ticket@plt>
mov    $0x0,%al
call   1070 <shut_down@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1080 <setup@plt>
xor    %eax,%eax
call   1030 <get_ticket@plt>
test   %rax,%rax
jne    118d <main+0x2d>
xor    %eax,%eax
call   1050 <do_regular_work@plt>
xor    %eax,%eax
call   1040 <release_ticket@plt>
xor    %eax,%eax
call   1070 <shut_down@plt>
xor    %eax,%eax
pop    %rcx
ret
xor    %edi,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @setup()
%6 = call i64 (...) @get_ticket()
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 @exit(i32 0)
unreachable
10: ; preds = %2
%11 = call i32 (...) @do_regular_work()
%12 = call i32 (...) @release_ticket()
%13 = call i32 (...) @shut_down()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @setup()
%4 = tail call i64 (...) @get_ticket()
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 @exit(i32 0)
unreachable
8: ; preds = %2
%9 = tail call i32 (...) @do_regular_work()
%10 = tail call i32 (...) @release_ticket()
%11 = tail call i32 (...) @shut_down()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ cdflib_E0001(int, int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                                int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                                int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                                int /*<<< orphan*/ *, double *, double *,
                                double *, double *);
void cdflib_dstzr(double *zxlo, double *zxhi, double *zabstl, double *zreltl) {
  cdflib_E0001(1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, zabstl, zreltl,
               zxhi, zxlo);
}


x86 assembly (clang, -O0):
<cdflib_dstzr>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
sub    $0x58,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x20(%rbp),%rbx
mov    -0x28(%rbp),%r11
mov    -0x18(%rbp),%r10
mov    -0x10(%rbp),%rax
mov    $0x1,%edi
xor    %ecx,%ecx
mov    %ecx,%r9d
mov    %r9,%rsi
mov    %r9,%rdx
mov    %r9,%rcx
mov    %r9,%r8
movq   $0x0,(%rsp)
movq   $0x0,0x8(%rsp)
mov    %rbx,0x10(%rsp)
mov    %r11,0x18(%rsp)
mov    %r10,0x20(%rsp)
mov    %rax,0x28(%rsp)
call   1030 <cdflib_E0001@plt>
add    $0x58,%rsp
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<cdflib_dstzr>:
sub    $0x38,%rsp
mov    %rdi,0x28(%rsp)
mov    %rsi,0x20(%rsp)
mov    %rcx,0x18(%rsp)
mov    %rdx,0x10(%rsp)
xorps  %xmm0,%xmm0
movups %xmm0,(%rsp)
mov    $0x1,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
call   1030 <cdflib_E0001@plt>
add    $0x38,%rsp
ret

LLVM IR (-O0):
define void @cdflib_dstzr(double* %0, double* %1, double* %2, double* %3) {
%5 = alloca double*
%6 = alloca double*
%7 = alloca double*
%8 = alloca double*
store double* %0, double** %5
store double* %1, double** %6
store double* %2, double** %7
store double* %3, double** %8
%9 = load double*, double** %7
%10 = load double*, double** %8
%11 = load double*, double** %6
%12 = load double*, double** %5
%13 = call i32 @cdflib_E0001(i32 1, i32* null, i32* null, i32* null, i32* null, i32* null, i32* null, i32* null, double* %9, double* %10, double* %11, double* %12)
ret void
}

LLVM IR (-O2):
define void @cdflib_dstzr(double* %0, double* %1, double* %2, double* %3) {
%5 = tail call i32 @cdflib_E0001(i32 1, i32* null, i32* null, i32* null, i32* null, i32* null, i32* null, i32* null, double* %2, double* %3, double* %1, double* %0)
ret void
}
void b_edgeperm_unpack(eperm, array_out) int eperm, array_out[8];
{
  perm_n_unpack(8, eperm, array_out);
  return;
}


x86 assembly (clang, -O0):
<b_edgeperm_unpack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    $0x8,%edi
mov    $0x0,%al
call   1030 <perm_n_unpack@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_edgeperm_unpack>:
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0x8,%edi
xor    %eax,%eax
jmp    1030 <perm_n_unpack@plt>

LLVM IR (-O0):
define void @b_edgeperm_unpack(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = call i32 (i32, i32, i32*, ...) bitcast (i32 (...)* @perm_n_unpack to i32 (i32, i32, i32*, ...)*)(i32 8, i32 %5, i32* %6)
ret void
}

LLVM IR (-O2):
define void @b_edgeperm_unpack(i32 %0, i32* %1) {
%3 = tail call i32 (i32, i32, i32*, ...) bitcast (i32 (...)* @perm_n_unpack to i32 (i32, i32, i32*, ...)*)(i32 8, i32 %0, i32* %1)
ret void
}
int smb347_has_charger_error(void) { return 0; }


x86 assembly (clang, -O0):
<smb347_has_charger_error>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<smb347_has_charger_error>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @smb347_has_charger_error() {
ret i32 0
}

LLVM IR (-O2):
define i32 @smb347_has_charger_error() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ print_label(unsigned char, int);
void print_letter(char c) { print_label((unsigned char)c, 128); }


x86 assembly (clang, -O0):
<print_letter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x80,%esi
movzbl -0x1(%rbp),%edi
call   1030 <print_label@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_letter>:
movzbl %dil,%edi
mov    $0x80,%esi
jmp    1030 <print_label@plt>

LLVM IR (-O0):
define void @print_letter(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @print_label(i8 zeroext %3, i32 128)
ret void
}

LLVM IR (-O2):
define void @print_letter(i8 signext %0) {
%2 = tail call i32 @print_label(i8 zeroext %0, i32 128)
ret void
}
__attribute__((no, noclone)) struct S *bar(struct S *p) {
  struct S *r;
  asm volatile("" : "=r"(r) : "0"(p) : "memory");
  return r;
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
%struct.S = type opaque
define %struct.S* @bar(%struct.S* %0) {
%2 = alloca %struct.S*
%3 = alloca %struct.S*
store %struct.S* %0, %struct.S** %2
%4 = load %struct.S*, %struct.S** %2
%5 = call %struct.S* asm sideeffect "", "=r,0,~{memory},~{dirflag},~{fpsr},~{flags}"(%struct.S* %4)
store %struct.S* %5, %struct.S** %3
%6 = load %struct.S*, %struct.S** %3
ret %struct.S* %6
}

LLVM IR (-O2):
%struct.S = type opaque
define %struct.S* @bar(%struct.S* %0) {
%2 = tail call %struct.S* asm sideeffect "", "=r,0,~{memory},~{dirflag},~{fpsr},~{flags}"(%struct.S* %0)
ret %struct.S* %2
}
int led_gpio_rgb_register(struct gpio_rgb_led *led) { return -38; }


x86 assembly (clang, -O0):
<led_gpio_rgb_register>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffda,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<led_gpio_rgb_register>:
mov    $0xffffffda,%eax
ret

LLVM IR (-O0):
%struct.gpio_rgb_led = type opaque
define i32 @led_gpio_rgb_register(%struct.gpio_rgb_led* %0) {
%2 = alloca %struct.gpio_rgb_led*
store %struct.gpio_rgb_led* %0, %struct.gpio_rgb_led** %2
ret i32 -38
}

LLVM IR (-O2):
%struct.gpio_rgb_led = type opaque
define i32 @led_gpio_rgb_register(%struct.gpio_rgb_led* nocapture readnone %0) {
ret i32 -38
}
int function(int n, int m) { return n + m; }


x86 assembly (clang, -O0):
<function>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<function>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @function(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @function(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ db(int);
void fldln2() {
  db(0xD9);
  db(0xED);
}


x86 assembly (clang, -O0):
<fldln2>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd9,%edi
call   1030 <db@plt>
mov    $0xed,%edi
call   1030 <db@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fldln2>:
push   %rax
mov    $0xd9,%edi
call   1030 <db@plt>
mov    $0xed,%edi
pop    %rax
jmp    1030 <db@plt>

LLVM IR (-O0):
define void @fldln2() {
%1 = call i32 @db(i32 217)
%2 = call i32 @db(i32 237)
ret void
}

LLVM IR (-O2):
define void @fldln2() {
%1 = tail call i32 @db(i32 217)
%2 = tail call i32 @db(i32 237)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_mainloop_wakeup() {
  printf("NOT IMPLEMENTED:"
         "pa_mainloop_wakeup"
         "\n");
}


x86 assembly (clang, -O0):
<pa_mainloop_wakeup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_mainloop_wakeup>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"NOT IMPLEMENTED:pa_mainloop_wakeup\0A\00"
define i32 @pa_mainloop_wakeup() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [35 x i8] c"NOT IMPLEMENTED:pa_mainloop_wakeup\00"
define i32 @pa_mainloop_wakeup() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
void gtk_color_selection_get_current_color() {}


x86 assembly (clang, -O0):
<gtk_color_selection_get_current_color>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_color_selection_get_current_color>:
ret

LLVM IR (-O0):
define void @gtk_color_selection_get_current_color() {
ret void
}

LLVM IR (-O2):
define void @gtk_color_selection_get_current_color() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ atol(char *);
int /*<<< orphan*/ usleep(int /*<<< orphan*/);
int main(int argc, char **argv) { usleep(atol(argv[1])); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <atol@plt>
mov    %eax,%edi
call   1040 <usleep@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rdi
call   1030 <atol@plt>
mov    %eax,%edi
call   1040 <usleep@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i8**, i8*** %4
%6 = getelementptr inbounds i8*, i8** %5, i64 1
%7 = load i8*, i8** %6
%8 = call i32 @atol(i8* %7)
%9 = call i32 @usleep(i32 %8)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @atol(i8* %4)
%6 = tail call i32 @usleep(i32 %5)
ret i32 0
}
unsigned char tf_B(unsigned char c) { return c / 3; }


x86 assembly (clang, -O0):
<tf_B>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tf_B>:
imul   $0xab,%edi,%eax
shr    $0x9,%eax
ret

LLVM IR (-O0):
define zeroext i8 @tf_B(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = sdiv i32 %4, 3
%6 = trunc i32 %5 to i8
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @tf_B(i8 zeroext %0) {
%2 = udiv i8 %0, 3
ret i8 %2
}