#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fscanf(int /*<<< orphan*/ *, char *, ...);
int /*<<< orphan*/ pclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *popen(char *, char *);
long long cpucycles_sparcpsrinfo_persecond(void) {
  FILE *f;
  double result;
  int s;
  f = popen("/usr/sbin/psrinfo -v", "r");
  if (!f)
    return 0;
  for (;;) {
    s = fscanf(f, " The %*s processor operates at %lf MHz", &result);
    if (s > 0)
      break;
    if (s == 0)
      s = fscanf(f, "%*[^\n]\n");
    if (s < 0) {
      result = 0;
      break;
    }
  }
  pclose(f);
  return 1000000.0 * result;
}


x86 assembly (clang, -O0):
<cpucycles_sparcpsrinfo_persecond>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    0xec9(%rip),%rdi
lea    0xed7(%rip),%rsi
call   1050 <popen@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1167 <cpucycles_sparcpsrinfo_persecond+0x37>
movq   $0x0,-0x8(%rbp)
jmp    11ee <cpucycles_sparcpsrinfo_persecond+0xbe>
jmp    116c <cpucycles_sparcpsrinfo_persecond+0x3c>
mov    -0x10(%rbp),%rdi
lea    0xea8(%rip),%rsi
lea    -0x18(%rbp),%rdx
mov    $0x0,%al
call   1040 <fscanf@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jle    1194 <cpucycles_sparcpsrinfo_persecond+0x64>
jmp    11cf <cpucycles_sparcpsrinfo_persecond+0x9f>
cmpl   $0x0,-0x1c(%rbp)
jne    11b3 <cpucycles_sparcpsrinfo_persecond+0x83>
mov    -0x10(%rbp),%rdi
lea    0xe9d(%rip),%rsi
mov    $0x0,%al
call   1040 <fscanf@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jge    11ca <cpucycles_sparcpsrinfo_persecond+0x9a>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    11cf <cpucycles_sparcpsrinfo_persecond+0x9f>
jmp    116c <cpucycles_sparcpsrinfo_persecond+0x3c>
mov    -0x10(%rbp),%rdi
call   1030 <pclose@plt>
movsd  0xe20(%rip),%xmm0
mulsd  -0x18(%rbp),%xmm0
cvttsd2si %xmm0,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpucycles_sparcpsrinfo_persecond>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
lea    0xec9(%rip),%rdi
lea    0xed7(%rip),%rsi
call   1050 <popen@plt>
test   %rax,%rax
je     11bb <cpucycles_sparcpsrinfo_persecond+0x8b>
mov    %rax,%rbx
lea    0xec5(%rip),%r14
mov    %rsp,%r15
lea    0xee2(%rip),%r12
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
xor    %eax,%eax
call   1040 <fscanf@plt>
test   %eax,%eax
jg     119f <cpucycles_sparcpsrinfo_persecond+0x6f>
jne    1197 <cpucycles_sparcpsrinfo_persecond+0x67>
mov    %rbx,%rdi
mov    %r12,%rsi
xor    %eax,%eax
call   1040 <fscanf@plt>
test   %eax,%eax
jns    1170 <cpucycles_sparcpsrinfo_persecond+0x40>
movq   $0x0,(%rsp)
mov    %rbx,%rdi
call   1030 <pclose@plt>
movsd  (%rsp),%xmm0
mulsd  0xe4c(%rip),%xmm0
cvttsd2si %xmm0,%rax
jmp    11bd <cpucycles_sparcpsrinfo_persecond+0x8d>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [21 x i8] c"/usr/sbin/psrinfo -v\00"
@.str.1 = [2 x i8] c"r\00"
@.str.2 = [39 x i8] c" The %*s processor operates at %lf MHz\00"
@.str.3 = [8 x i8] c"%*[^\0A]\0A\00"
define i64 @cpucycles_sparcpsrinfo_persecond() {
%1 = alloca i64
%2 = alloca i32*
%3 = alloca double
%4 = alloca i32
%5 = call i32* @popen(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %5, i32** %2
%6 = load i32*, i32** %2
%7 = icmp ne i32* %6, null
br i1 %7, label %9, label %8
8: ; preds = %0
store i64 0, i64* %1
br label %33
9: ; preds = %0
br label %10
10: ; preds = %26, %9
%11 = load i32*, i32** %2
%12 = call i32 (i32*, i8*, ...) @fscanf(i32* %11, i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str.2, i64 0, i64 0), double* %3)
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %10
br label %27
16: ; preds = %10
%17 = load i32, i32* %4
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %22
19: ; preds = %16
%20 = load i32*, i32** %2
%21 = call i32 (i32*, i8*, ...) @fscanf(i32* %20, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.3, i64 0, i64 0))
store i32 %21, i32* %4
br label %22
22: ; preds = %19, %16
%23 = load i32, i32* %4
%24 = icmp slt i32 %23, 0
br i1 %24, label %25, label %26
25: ; preds = %22
store double 0.000000e+00, double* %3
br label %27
26: ; preds = %22
br label %10
27: ; preds = %25, %15
%28 = load i32*, i32** %2
%29 = call i32 @pclose(i32* %28)
%30 = load double, double* %3
%31 = fmul double 1.000000e+06, %30
%32 = fptosi double %31 to i64
store i64 %32, i64* %1
br label %33
33: ; preds = %27, %8
%34 = load i64, i64* %1
ret i64 %34
}

LLVM IR (-O2):
@.str = [21 x i8] c"/usr/sbin/psrinfo -v\00"
@.str.1 = [2 x i8] c"r\00"
@.str.2 = [39 x i8] c" The %*s processor operates at %lf MHz\00"
@.str.3 = [8 x i8] c"%*[^\0A]\0A\00"
define i64 @cpucycles_sparcpsrinfo_persecond() {
%1 = alloca double
%2 = bitcast double* %1 to i8*
%3 = tail call i32* @popen(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%4 = icmp eq i32* %3, null
br i1 %4, label %19, label %5
5: ; preds = %0, %10
%6 = call i32 (i32*, i8*, ...) @fscanf(i32* %3, i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str.2, i64 0, i64 0), double* %1)
%7 = icmp sgt i32 %6, 0
br i1 %7, label %14, label %8
8: ; preds = %5
%9 = icmp eq i32 %6, 0
br i1 %9, label %10, label %13
10: ; preds = %8
%11 = call i32 (i32*, i8*, ...) @fscanf(i32* %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.3, i64 0, i64 0))
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %8, %10
store double 0.000000e+00, double* %1
br label %14
14: ; preds = %5, %13
%15 = call i32 @pclose(i32* %3)
%16 = load double, double* %1
%17 = fmul double %16, 1.000000e+06
%18 = fptosi double %17 to i64
br label %19
19: ; preds = %0, %14
%20 = phi i64 [ %18, %14 ], [ 0, %0 ]
ret i64 %20
}