int wait_busy(unsigned timeout) {
  unsigned this_timeout = 0;
  unsigned r;
  *(volatile unsigned long *)0xc1108c2c = 0x1fff << 19;
  while (1) {
    r = (*((volatile unsigned long *)0xc1108c2c));
    if ((r >> 19) == 0) {
      this_timeout += 0x1fff;
      *(volatile unsigned long *)0xc1108c2c = 0x1fff << 19;
    }
    if (this_timeout >= timeout) {
      return -1;
    }
    if (((r >> 4) & 0x1) == 0) {
      return 0;
    }
  }
}


x86 assembly (clang, -O0):
<wait_busy>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    $0xc1108c2c,%eax
movq   $0xfffffffffff80000,(%rax)
mov    $0xc1108c2c,%eax
mov    (%rax),%rax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
shr    $0x13,%eax
cmp    $0x0,%eax
jne    114b <wait_busy+0x4b>
mov    -0xc(%rbp),%eax
add    $0x1fff,%eax
mov    %eax,-0xc(%rbp)
mov    $0xc1108c2c,%eax
movq   $0xfffffffffff80000,(%rax)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jb     1163 <wait_busy+0x63>
movl   $0xffffffff,-0x4(%rbp)
jmp    1186 <wait_busy+0x86>
mov    -0x10(%rbp),%eax
shr    $0x4,%eax
and    $0x1,%eax
cmp    $0x0,%eax
jne    1181 <wait_busy+0x81>
movl   $0x0,-0x4(%rbp)
jmp    1186 <wait_busy+0x86>
jmp    111a <wait_busy+0x1a>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait_busy>:
mov    $0xc1108c2c,%eax
movq   $0xfffffffffff80000,(%rax)
xor    %ecx,%ecx
xchg   %ax,%ax
mov    (%rax),%rdx
cmp    $0x7ffff,%edx
ja     1128 <wait_busy+0x28>
add    $0x1fff,%ecx
movq   $0xfffffffffff80000,(%rax)
cmp    %edi,%ecx
jae    1134 <wait_busy+0x34>
test   $0x10,%dl
jne    1110 <wait_busy+0x10>
xor    %eax,%eax
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @wait_busy(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %4
store volatile i64 -524288, i64* inttoptr (i64 3239087148 to i64*)
br label %6
6: ; preds = %1, %26
%7 = load volatile i64, i64* inttoptr (i64 3239087148 to i64*)
%8 = trunc i64 %7 to i32
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = lshr i32 %9, 19
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %6
%13 = load i32, i32* %4
%14 = add i32 %13, 8191
store i32 %14, i32* %4
store volatile i64 -524288, i64* inttoptr (i64 3239087148 to i64*)
br label %15
15: ; preds = %12, %6
%16 = load i32, i32* %4
%17 = load i32, i32* %3
%18 = icmp uge i32 %16, %17
br i1 %18, label %19, label %20
19: ; preds = %15
store i32 -1, i32* %2
br label %27
20: ; preds = %15
%21 = load i32, i32* %5
%22 = lshr i32 %21, 4
%23 = and i32 %22, 1
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %26
25: ; preds = %20
store i32 0, i32* %2
br label %27
26: ; preds = %20
br label %6
27: ; preds = %25, %19
%28 = load i32, i32* %2
ret i32 %28
}

LLVM IR (-O2):
define i32 @wait_busy(i32 %0) {
store volatile i64 -524288, i64* inttoptr (i64 3239087148 to i64*)
br label %2
2: ; preds = %12, %1
%3 = phi i32 [ 0, %1 ], [ %10, %12 ]
%4 = load volatile i64, i64* inttoptr (i64 3239087148 to i64*)
%5 = trunc i64 %4 to i32
%6 = icmp ult i32 %5, 524288
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = add i32 %3, 8191
store volatile i64 -524288, i64* inttoptr (i64 3239087148 to i64*)
br label %9
9: ; preds = %7, %2
%10 = phi i32 [ %8, %7 ], [ %3, %2 ]
%11 = icmp ult i32 %10, %0
br i1 %11, label %12, label %15
12: ; preds = %9
%13 = and i32 %5, 16
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %2
15: ; preds = %12, %9
%16 = phi i32 [ -1, %9 ], [ 0, %12 ]
ret i32 %16
}