xunge/DecIR huggingface dataset:
__attribute__((visibility("protected")))
__attribute__((aarch64_vector_pcs)) void
f_protected_vpcs(void) {}


x86 assembly (clang, -O0):
<f_protected_vpcs>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_protected_vpcs>:
ret

LLVM IR (-O0):
define protected void @f_protected_vpcs() {
ret void
}

LLVM IR (-O2):
define protected void @f_protected_vpcs() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ absolutelongx();
int /*<<< orphan*/ readmem65816(int /*<<< orphan*/);
int /*<<< orphan*/ sbc8(int /*<<< orphan*/);
void sbcLongx8(void) { sbc8(readmem65816(absolutelongx())); }


x86 assembly (clang, -O0):
<sbcLongx8>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <absolutelongx@plt>
mov    %eax,%edi
call   1050 <readmem65816@plt>
mov    %eax,%edi
call   1030 <sbc8@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sbcLongx8>:
push   %rax
xor    %eax,%eax
call   1040 <absolutelongx@plt>
mov    %eax,%edi
call   1050 <readmem65816@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <sbc8@plt>

LLVM IR (-O0):
define void @sbcLongx8() {
%1 = call i32 (...) @absolutelongx()
%2 = call i32 @readmem65816(i32 %1)
%3 = call i32 @sbc8(i32 %2)
ret void
}

LLVM IR (-O2):
define void @sbcLongx8() {
%1 = tail call i32 (...) @absolutelongx()
%2 = tail call i32 @readmem65816(i32 %1)
%3 = tail call i32 @sbc8(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void pci_config_write_byte(unsigned char bus, unsigned char dev, int func,
                           unsigned cmd, long val) {
  printf("pci_config_write_byte: generic function call\n");
}


x86 assembly (clang, -O0):
<pci_config_write_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    %edx,-0x8(%rbp)
mov    %ecx,-0xc(%rbp)
mov    %r8,-0x18(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_config_write_byte>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [46 x i8] c"pci_config_write_byte: generic function call\0A\00"
define void @pci_config_write_byte(i8 zeroext %0, i8 zeroext %1, i32 %2, i32 %3, i64 %4) {
%6 = alloca i8
%7 = alloca i8
%8 = alloca i32
%9 = alloca i32
%10 = alloca i64
store i8 %0, i8* %6
store i8 %1, i8* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i64 %4, i64* %10
%11 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [45 x i8] c"pci_config_write_byte: generic function call\00"
define void @pci_config_write_byte(i8 zeroext %0, i8 zeroext %1, i32 %2, i32 %3, i64 %4) {
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([45 x i8], [45 x i8]* @str, i64 0, i64 0))
ret void
}
unsigned long str$mul_not(const unsigned long *asign, const long aexp,
                          const struct dsc$descriptor_s *adigits,
                          const unsigned long *bsign, const long *bexp,
                          const struct dsc$descriptor_s *bdigits,
                          unsigned long *csign, long *cexp,
                          struct dsc$descriptor_s *cdigits) {
  assert(0);
  return 2392148;
}


x86 assembly (clang, -O0):
<str$mul_not>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0x20(%rbp),%rax
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
xor    %edi,%edi
mov    $0x0,%al
call   1030 <assert@plt>
mov    $0x248054,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str$mul_not>:
push   %rax
xor    %edi,%edi
xor    %eax,%eax
call   1030 <assert@plt>
mov    $0x248054,%eax
pop    %rcx
ret

LLVM IR (-O0):
%"struct.dsc$descriptor_s" = type opaque
define i64 @"str$mul_not"(i64* %0, i64 %1, %"struct.dsc$descriptor_s"* %2, i64* %3, i64* %4, %"struct.dsc$descriptor_s"* %5, i64* %6, i64* %7, %"struct.dsc$descriptor_s"* %8) {
%10 = alloca i64*
%11 = alloca i64
%12 = alloca %"struct.dsc$descriptor_s"*
%13 = alloca i64*
%14 = alloca i64*
%15 = alloca %"struct.dsc$descriptor_s"*
%16 = alloca i64*
%17 = alloca i64*
%18 = alloca %"struct.dsc$descriptor_s"*
store i64* %0, i64** %10
store i64 %1, i64* %11
store %"struct.dsc$descriptor_s"* %2, %"struct.dsc$descriptor_s"** %12
store i64* %3, i64** %13
store i64* %4, i64** %14
store %"struct.dsc$descriptor_s"* %5, %"struct.dsc$descriptor_s"** %15
store i64* %6, i64** %16
store i64* %7, i64** %17
store %"struct.dsc$descriptor_s"* %8, %"struct.dsc$descriptor_s"** %18
%19 = call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 0)
ret i64 2392148
}

LLVM IR (-O2):
%"struct.dsc$descriptor_s" = type opaque
define i64 @"str$mul_not"(i64* nocapture readnone %0, i64 %1, %"struct.dsc$descriptor_s"* nocapture readnone %2, i64* nocapture readnone %3, i64* nocapture readnone %4, %"struct.dsc$descriptor_s"* nocapture readnone %5, i64* nocapture readnone %6, i64* nocapture readnone %7, %"struct.dsc$descriptor_s"* nocapture readnone %8) {
%10 = tail call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 0)
ret i64 2392148
}
char *strccpy(char *s1, char *s2, char c) {
  char *dest = s1;
  while (*s2 && *s2 != c) {
    *s1++ = *s2++;
  }
  *s1 = 0;
  return dest;
}


x86 assembly (clang, -O0):
<strccpy>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x21(%rbp)
je     1141 <strccpy+0x41>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x11(%rbp),%ecx
cmp    %ecx,%eax
setne  %al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%al
test   $0x1,%al
jne    1151 <strccpy+0x51>
jmp    1178 <strccpy+0x78>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
jmp    1119 <strccpy+0x19>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strccpy>:
mov    %rdi,%rax
mov    (%rsi),%cl
test   %cl,%cl
je     1135 <strccpy+0x35>
mov    %rax,%rdi
cmp    %dl,%cl
je     1135 <strccpy+0x35>
add    $0x1,%rsi
mov    %rax,%rdi
nopw   0x0(%rax,%rax,1)
mov    %cl,(%rdi)
add    $0x1,%rdi
movzbl (%rsi),%ecx
test   %cl,%cl
je     1135 <strccpy+0x35>
add    $0x1,%rsi
cmp    %dl,%cl
jne    1120 <strccpy+0x20>
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define i8* @strccpy(i8* %0, i8* %1, i8 signext %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8
%7 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8 %2, i8* %6
%8 = load i8*, i8** %4
store i8* %8, i8** %7
br label %9
9: ; preds = %23, %3
%10 = load i8*, i8** %5
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %21
14: ; preds = %9
%15 = load i8*, i8** %5
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = load i8, i8* %6
%19 = sext i8 %18 to i32
%20 = icmp ne i32 %17, %19
br label %21
21: ; preds = %14, %9
%22 = phi i1 [ false, %9 ], [ %20, %14 ]
br i1 %22, label %23, label %29
23: ; preds = %21
%24 = load i8*, i8** %5
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %5
%26 = load i8, i8* %24
%27 = load i8*, i8** %4
%28 = getelementptr inbounds i8, i8* %27, i32 1
store i8* %28, i8** %4
store i8 %26, i8* %27
br label %9
29: ; preds = %21
%30 = load i8*, i8** %4
store i8 0, i8* %30
%31 = load i8*, i8** %7
ret i8* %31
}

LLVM IR (-O2):
define i8* @strccpy(i8* returned writeonly %0, i8* nocapture %1, i8 signext %2) {
%4 = load i8, i8* %1
%5 = icmp eq i8 %4, 0
%6 = icmp eq i8 %4, %2
%7 = or i1 %5, %6
br i1 %7, label %18, label %8
8: ; preds = %3, %8
%9 = phi i8 [ %14, %8 ], [ %4, %3 ]
%10 = phi i8* [ %13, %8 ], [ %0, %3 ]
%11 = phi i8* [ %12, %8 ], [ %1, %3 ]
%12 = getelementptr inbounds i8, i8* %11, i64 1
%13 = getelementptr inbounds i8, i8* %10, i64 1
store i8 %9, i8* %10
%14 = load i8, i8* %12
%15 = icmp eq i8 %14, 0
%16 = icmp eq i8 %14, %2
%17 = or i1 %15, %16
br i1 %17, label %18, label %8
18: ; preds = %8, %3
%19 = phi i8* [ %0, %3 ], [ %13, %8 ]
store i8 0, i8* %19
ret i8* %0
}
double FtoR(double F) {
  double r = F + 459.69;
  return r;
}


x86 assembly (clang, -O0):
<FtoR>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<FtoR>:
addsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @FtoR(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fadd double %4, 4.596900e+02
store double %5, double* %3
%6 = load double, double* %3
ret double %6
}

LLVM IR (-O2):
define double @FtoR(double %0) {
%2 = fadd double %0, 4.596900e+02
ret double %2
}
int foo(int a) {
  a = 99;
  return 0;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x63,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
store i32 99, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
ret i32 0
}
/* Variables and functions */
int errno;
int /*<<< orphan*/ perror_internal(int /*<<< orphan*/, char const *, int);
int /*<<< orphan*/ stderr;
void perror(const char *s) {
  int errnum = errno;
  perror_internal(stderr, s, errnum);
}


x86 assembly (clang, -O0):
<perror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2eb5(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <perror_internal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perror>:
mov    %rdi,%rsi
mov    0x2ebe(%rip),%rax
mov    (%rax),%edx
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
jmp    1030 <perror_internal@plt>

LLVM IR (-O0):
@errno = global i32 0
@stderr = global i32 0
define void @perror(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i32, i32* @errno
store i32 %4, i32* %3
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %2
%7 = load i32, i32* %3
%8 = call i32 @perror_internal(i32 %5, i8* %6, i32 %7)
ret void
}

LLVM IR (-O2):
@errno = global i32 0
@stderr = global i32 0
define void @perror(i8* %0) {
%2 = load i32, i32* @errno
%3 = load i32, i32* @stderr
%4 = tail call i32 @perror_internal(i32 %3, i8* %0, i32 %2)
ret void
}
SHR(statlink, n, a) int *statlink;
unsigned a;
{ return (n < 0 ? (-n >= 32 ? 0 : a << -n) : n >= 32 ? 0 : a >> n); }


x86 assembly (clang, -O0):
<SHR>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    1148 <SHR+0x48>
xor    %eax,%eax
sub    -0xc(%rbp),%eax
cmp    $0x20,%eax
jl     1130 <SHR+0x30>
xor    %eax,%eax
mov    %eax,-0x14(%rbp)
jmp    113d <SHR+0x3d>
mov    -0x10(%rbp),%eax
xor    %ecx,%ecx
sub    -0xc(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
jmp    116d <SHR+0x6d>
cmpl   $0x20,-0xc(%rbp)
jl     115c <SHR+0x5c>
xor    %eax,%eax
mov    %eax,-0x1c(%rbp)
jmp    1167 <SHR+0x67>
mov    -0x10(%rbp),%eax
mov    -0xc(%rbp),%ecx
shr    %cl,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHR>:
mov    %esi,%ecx
test   %esi,%esi
js     1111 <SHR+0x11>
shr    %cl,%edx
xor    %eax,%eax
cmp    $0x20,%esi
cmovb  %edx,%eax
ret
neg    %cl
shl    %cl,%edx
xor    %eax,%eax
cmp    $0xffffffe1,%esi
cmovae %edx,%eax
ret

LLVM IR (-O0):
define i32 @SHR(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 0
br i1 %8, label %9, label %21
9: ; preds = %3
%10 = load i32, i32* %5
%11 = sub nsw i32 0, %10
%12 = icmp sge i32 %11, 32
br i1 %12, label %13, label %14
13: ; preds = %9
br label %19
14: ; preds = %9
%15 = load i32, i32* %6
%16 = load i32, i32* %5
%17 = sub nsw i32 0, %16
%18 = shl i32 %15, %17
br label %19
19: ; preds = %14, %13
%20 = phi i32 [ 0, %13 ], [ %18, %14 ]
br label %31
21: ; preds = %3
%22 = load i32, i32* %5
%23 = icmp sge i32 %22, 32
br i1 %23, label %24, label %25
24: ; preds = %21
br label %29
25: ; preds = %21
%26 = load i32, i32* %6
%27 = load i32, i32* %5
%28 = lshr i32 %26, %27
br label %29
29: ; preds = %25, %24
%30 = phi i32 [ 0, %24 ], [ %28, %25 ]
br label %31
31: ; preds = %29, %19
%32 = phi i32 [ %20, %19 ], [ %30, %29 ]
ret i32 %32
}

LLVM IR (-O2):
define i32 @SHR(i32* nocapture readnone %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, 0
br i1 %4, label %5, label %10
5: ; preds = %3
%6 = sub nsw i32 0, %1
%7 = icmp ult i32 %1, -31
%8 = shl i32 %2, %6
%9 = select i1 %7, i32 0, i32 %8
br label %14
10: ; preds = %3
%11 = icmp ugt i32 %1, 31
%12 = lshr i32 %2, %1
%13 = select i1 %11, i32 0, i32 %12
br label %14
14: ; preds = %10, %5
%15 = phi i32 [ %9, %5 ], [ %13, %10 ]
ret i32 %15
}
/* Variables and functions */
int testLib4libdbg_noexist();
int testLib4libdbg(void) { return testLib4libdbg_noexist(); }


x86 assembly (clang, -O0):
<testLib4libdbg>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <testLib4libdbg_noexist@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<testLib4libdbg>:
xor    %eax,%eax
jmp    1030 <testLib4libdbg_noexist@plt>

LLVM IR (-O0):
define i32 @testLib4libdbg() {
%1 = call i32 (...) @testLib4libdbg_noexist()
ret i32 %1
}

LLVM IR (-O2):
define i32 @testLib4libdbg() {
%1 = tail call i32 (...) @testLib4libdbg_noexist()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ glk_exit();
int /*<<< orphan*/ gln_fatal(char *);
void *malloc(size_t);
void *gln_malloc(size_t size) {
  void *pointer;
  pointer = malloc(size);
  if (!pointer) {
    gln_fatal("GLK: Out of system memory");
    glk_exit();
  }
  return pointer;
}


x86 assembly (clang, -O0):
<gln_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1167 <gln_malloc+0x37>
lea    0xea5(%rip),%rdi
call   1030 <gln_fatal@plt>
mov    $0x0,%al
call   1050 <glk_exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gln_malloc>:
push   %rbx
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1151 <gln_malloc+0x21>
lea    0xebb(%rip),%rdi
call   1030 <gln_fatal@plt>
xor    %eax,%eax
call   1050 <glk_exit@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"GLK: Out of system memory\00"
define i8* @gln_malloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %11, label %8
8: ; preds = %1
%9 = call i32 @gln_fatal(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%10 = call i32 (...) @glk_exit()
br label %11
11: ; preds = %8, %1
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
@.str = [26 x i8] c"GLK: Out of system memory\00"
define noalias i8* @gln_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 @gln_fatal(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 (...) @glk_exit()
br label %7
7: ; preds = %4, %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void failure() { printf("%%%%%% FAILURE\n"); }


x86 assembly (clang, -O0):
<failure>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<failure>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"%%%%%% FAILURE\0A\00"
define void @failure() {
%1 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"%%%%%% FAILURE\0A\00"
define void @failure() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}
int test_imm_15int16_reg(short val) {
  return ((val) & (0x15 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_15int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x15,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_15int16_reg>:
test   $0x15,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_15int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 21
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_15int16_reg(i16 signext %0) {
%2 = and i16 %0, 21
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int main(int argc, char *argv[]) {
  int a = 0xFE70, b = 0x07EF;
#pragma omp parallel
  {
#pragma omp atomic
    a &= b;
#pragma omp atomic
    a |= b;
#pragma omp atomic
    a ^= b;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0xfe70,-0x14(%rbp)
movl   $0x7ef,-0x18(%rbp)
mov    -0x18(%rbp),%eax
and    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
or     -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
xor    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 65136, i32* %6
store i32 2031, i32* %7
%8 = load i32, i32* %7
%9 = load i32, i32* %6
%10 = and i32 %9, %8
store i32 %10, i32* %6
%11 = load i32, i32* %7
%12 = load i32, i32* %6
%13 = or i32 %12, %11
store i32 %13, i32* %6
%14 = load i32, i32* %7
%15 = load i32, i32* %6
%16 = xor i32 %15, %14
store i32 %16, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
void arch_Intr_Enable(void) { asm volatile("sti"); }


x86 assembly (clang, -O0):
<arch_Intr_Enable>:
push   %rbp
mov    %rsp,%rbp
sti
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_Intr_Enable>:
sti
ret

LLVM IR (-O0):
define void @arch_Intr_Enable() {
ret void
}

LLVM IR (-O2):
define void @arch_Intr_Enable() {
tail call void asm sideeffect "sti", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
int /*<<< orphan*/ scanf(char *, double *, double *);
int main() {
  double a, b;
  scanf("%lf %lf", &a, &b);
  printf("MEDIA = %.5lf\n", (3.5 * a + 7.5 * b) / 11);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xee2(%rip),%rdi
lea    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1040 <scanf@plt>
movsd  -0x10(%rbp),%xmm0
movsd  0xec0(%rip),%xmm1
mulsd  -0x18(%rbp),%xmm1
movsd  0xeab(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xe93(%rip),%xmm1
divsd  %xmm1,%xmm0
lea    0xea8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
lea    0xeed(%rip),%rdi
lea    0x10(%rsp),%rsi
lea    0x8(%rsp),%rdx
call   1040 <scanf@plt>
movsd  0x10(%rsp),%xmm0
movsd  0x8(%rsp),%xmm1
mulsd  0xeb2(%rip),%xmm1
mulsd  0xeb2(%rip),%xmm0
addsd  %xmm1,%xmm0
divsd  0xeae(%rip),%xmm0
lea    0xeb7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [8 x i8] c"%lf %lf\00"
@.str.1 = [15 x i8] c"MEDIA = %.5lf\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca double
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), double* %2, double* %3)
%5 = load double, double* %2
%6 = load double, double* %3
%7 = fmul double 7.500000e+00, %6
%8 = call double @llvm.fmuladd.f64(double 3.500000e+00, double %5, double %7)
%9 = fdiv double %8, 1.100000e+01
%10 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), double %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"%lf %lf\00"
@.str.1 = [15 x i8] c"MEDIA = %.5lf\0A\00"
define i32 @main() {
%1 = alloca double
%2 = alloca double
%3 = bitcast double* %1 to i8*
%4 = bitcast double* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), double* %1, double* %2)
%6 = load double, double* %1
%7 = load double, double* %2
%8 = fmul double %7, 7.500000e+00
%9 = call double @llvm.fmuladd.f64(double %6, double 3.500000e+00, double %8)
%10 = fdiv double %9, 1.100000e+01
%11 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), double %10)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ __builtin_arm_mcrr2(int, int /*<<< orphan*/,
                                       int /*<<< orphan*/, int /*<<< orphan*/);
void mcrr2(uint64_t a) { __builtin_arm_mcrr2(15, 0, a, 0); }


x86 assembly (clang, -O0):
<mcrr2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0xf,%edi
xor    %ecx,%ecx
mov    %ecx,%esi
call   1030 <__builtin_arm_mcrr2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mcrr2>:
mov    %edi,%edx
mov    $0xf,%edi
xor    %esi,%esi
xor    %ecx,%ecx
jmp    1030 <__builtin_arm_mcrr2@plt>

LLVM IR (-O0):
define void @mcrr2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__builtin_arm_mcrr2(i32 15, i32 0, i32 %3, i32 0)
ret void
}

LLVM IR (-O2):
define void @mcrr2(i32 %0) {
%2 = tail call i32 @__builtin_arm_mcrr2(i32 15, i32 0, i32 %0, i32 0)
ret void
}
int gen_cvin(int cvin) {
  int r = ((cvin & 2) ? (1 << 29) : 0) | ((cvin & 1) ? (1 << 28) : 0);
  r |= (1 << 31) | (1 << 30);
  return r;
}


x86 assembly (clang, -O0):
<gen_cvin>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x2,%edx
xor    %eax,%eax
mov    $0x20000000,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    -0x4(%rbp),%esi
and    $0x1,%esi
xor    %ecx,%ecx
mov    $0x10000000,%edx
cmp    $0x0,%esi
cmovne %edx,%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
or     $0xc0000000,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_cvin>:
mov    %edi,%eax
or     $0xfffffffc,%eax
shl    $0x1c,%eax
ret

LLVM IR (-O0):
define i32 @gen_cvin(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = and i32 %4, 2
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 536870912, i32 0
%9 = load i32, i32* %2
%10 = and i32 %9, 1
%11 = icmp ne i32 %10, 0
%12 = zext i1 %11 to i64
%13 = select i1 %11, i32 268435456, i32 0
%14 = or i32 %8, %13
store i32 %14, i32* %3
%15 = load i32, i32* %3
%16 = or i32 %15, -1073741824
store i32 %16, i32* %3
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @gen_cvin(i32 %0) {
%2 = shl i32 %0, 28
%3 = or i32 %2, -1073741824
ret i32 %3
}
/* Type definitions */
struct flexbuf {
  int dummy;
};

/* Variables and functions */
char *flexbuf_addmem(struct flexbuf *, char const *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char const *);
char *flexbuf_addstr(struct flexbuf *fb, const char *str) {
  return flexbuf_addmem(fb, str, strlen(str));
}


x86 assembly (clang, -O0):
<flexbuf_addstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1040 <flexbuf_addmem@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flexbuf_addstr>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <flexbuf_addmem@plt>

LLVM IR (-O0):
%struct.flexbuf = type { i32 }
define i8* @flexbuf_addstr(%struct.flexbuf* %0, i8* %1) {
%3 = alloca %struct.flexbuf*
%4 = alloca i8*
store %struct.flexbuf* %0, %struct.flexbuf** %3
store i8* %1, i8** %4
%5 = load %struct.flexbuf*, %struct.flexbuf** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i8* @flexbuf_addmem(%struct.flexbuf* %5, i8* %6, i32 %8)
ret i8* %9
}

LLVM IR (-O2):
%struct.flexbuf = type { i32 }
define i8* @flexbuf_addstr(%struct.flexbuf* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i8* @flexbuf_addmem(%struct.flexbuf* %0, i8* %1, i32 %3)
ret i8* %4
}
/* Variables and functions */
double exp(double);
double LogL10toY(int p10) {
  if (p10 == 0)
    return (0.);
  return (exp(0.69314718055994530942 / 64. * (p10 + .5) -
              0.69314718055994530942 * 12.));
}


x86 assembly (clang, -O0):
<LogL10toY>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1132 <LogL10toY+0x22>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1165 <LogL10toY+0x55>
cvtsi2sdl -0xc(%rbp),%xmm0
movsd  0xed1(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  0xeb5(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeb1(%rip),%xmm1
addsd  %xmm1,%xmm0
call   1030 <exp@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LogL10toY>:
test   %edi,%edi
je     1135 <LogL10toY+0x25>
cvtsi2sd %edi,%xmm0
addsd  0xee0(%rip),%xmm0
mulsd  0xee0(%rip),%xmm0
addsd  0xee0(%rip),%xmm0
jmp    1030 <exp@plt>
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @LogL10toY(i32 %0) {
%2 = alloca double
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store double 0.000000e+00, double* %2
br label %13
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sitofp i32 %8 to double
%10 = fadd double %9, 5.000000e-01
%11 = call double @llvm.fmuladd.f64(double 0x3F862E42FEFA39EF, double %10, double 0xC020A2B23F3BAB73)
%12 = call double @exp(double %11)
store double %12, double* %2
br label %13
13: ; preds = %7, %6
%14 = load double, double* %2
ret double %14
}

LLVM IR (-O2):
define double @LogL10toY(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = sitofp i32 %0 to double
%5 = fadd double %4, 5.000000e-01
%6 = tail call double @llvm.fmuladd.f64(double %5, double 0x3F862E42FEFA39EF, double 0xC020A2B23F3BAB73)
%7 = tail call double @exp(double %6)
br label %8
8: ; preds = %1, %3
%9 = phi double [ %7, %3 ], [ 0.000000e+00, %1 ]
ret double %9
}
unsigned rotate_right(unsigned x, unsigned n) {
  int z_mask = -!n;
  unsigned right = x >> n;
  unsigned left = x << ((sizeof(unsigned) << 3) - n);
  return (z_mask & x) | (~z_mask & (left | right));
}


x86 assembly (clang, -O0):
<rotate_right>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%ecx
xor    %eax,%eax
sub    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    %ecx,%edx
mov    $0x20,%ecx
sub    %rdx,%rcx
shl    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
and    -0x4(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
mov    -0x14(%rbp),%edx
or     -0x10(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotate_right>:
mov    %esi,%ecx
mov    %edi,%eax
ror    %cl,%eax
ret

LLVM IR (-O0):
define i32 @rotate_right(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
%11 = zext i1 %10 to i32
%12 = sub nsw i32 0, %11
store i32 %12, i32* %5
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = lshr i32 %13, %14
store i32 %15, i32* %6
%16 = load i32, i32* %3
%17 = load i32, i32* %4
%18 = zext i32 %17 to i64
%19 = sub i64 32, %18
%20 = trunc i64 %19 to i32
%21 = shl i32 %16, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %3
%24 = and i32 %22, %23
%25 = load i32, i32* %5
%26 = xor i32 %25, -1
%27 = load i32, i32* %7
%28 = load i32, i32* %6
%29 = or i32 %27, %28
%30 = and i32 %26, %29
%31 = or i32 %24, %30
ret i32 %31
}

LLVM IR (-O2):
define i32 @rotate_right(i32 %0, i32 %1) {
%3 = tail call i32 @llvm.fshr.i32(i32 %0, i32 %0, i32 %1)
ret i32 %3
}
double light_no_attenuation(void *vli, double Llen) { return 1.000000; }


x86 assembly (clang, -O0):
<light_no_attenuation>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  0xeeb(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<light_no_attenuation>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @light_no_attenuation(i8* %0, double %1) {
%3 = alloca i8*
%4 = alloca double
store i8* %0, i8** %3
store double %1, double* %4
ret double 1.000000e+00
}

LLVM IR (-O2):
define double @light_no_attenuation(i8* nocapture readnone %0, double %1) {
ret double 1.000000e+00
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ type;
};
struct TYPE_4__ {
  TYPE_1__ xany;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
int get_XEvent_xany_type(void *_p) { return (int)((XEvent *)_p)->xany.type; }


x86 assembly (clang, -O0):
<get_XEvent_xany_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xany_type>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i32 @get_XEvent_xany_type(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_XEvent_xany_type(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
void android_stopOpenglesRenderer(void) {}


x86 assembly (clang, -O0):
<android_stopOpenglesRenderer>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<android_stopOpenglesRenderer>:
ret

LLVM IR (-O0):
define void @android_stopOpenglesRenderer() {
ret void
}

LLVM IR (-O2):
define void @android_stopOpenglesRenderer() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _merge_bars(float *, float *);
int /*<<< orphan*/ calc_barprice_aves(float *);
void merge_bars(float bar[16], float newbar[16]) {
  _merge_bars(bar, newbar);
  calc_barprice_aves(bar);
}


x86 assembly (clang, -O0):
<merge_bars>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <_merge_bars@plt>
mov    -0x8(%rbp),%rdi
call   1040 <calc_barprice_aves@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<merge_bars>:
push   %rbx
mov    %rdi,%rbx
call   1030 <_merge_bars@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <calc_barprice_aves@plt>

LLVM IR (-O0):
define void @merge_bars(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = load float*, float** %4
%7 = call i32 @_merge_bars(float* %5, float* %6)
%8 = load float*, float** %3
%9 = call i32 @calc_barprice_aves(float* %8)
ret void
}

LLVM IR (-O2):
define void @merge_bars(float* %0, float* %1) {
%3 = tail call i32 @_merge_bars(float* %0, float* %1)
%4 = tail call i32 @calc_barprice_aves(float* %0)
ret void
}
int range(int width, int height, int i, int j) {
  if ((i < 0) || (i >= height))
    return 0;
  if ((j < 0) || (j >= width))
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<range>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
cmpl   $0x0,-0x10(%rbp)
jl     1126 <range+0x26>
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jl     1132 <range+0x32>
movl   $0x0,-0x4(%rbp)
jmp    115b <range+0x5b>
cmpl   $0x0,-0x14(%rbp)
jl     1148 <range+0x48>
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jl     1154 <range+0x54>
movl   $0x0,-0x4(%rbp)
jmp    115b <range+0x5b>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<range>:
test   %edx,%edx
setns  %al
cmp    %esi,%edx
setl   %dl
and    %al,%dl
test   %ecx,%ecx
setns  %al
cmp    %edi,%ecx
setl   %cl
and    %al,%cl
and    %dl,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @range(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
%10 = load i32, i32* %8
%11 = icmp slt i32 %10, 0
br i1 %11, label %16, label %12
12: ; preds = %4
%13 = load i32, i32* %8
%14 = load i32, i32* %7
%15 = icmp sge i32 %13, %14
br i1 %15, label %16, label %17
16: ; preds = %12, %4
store i32 0, i32* %5
br label %26
17: ; preds = %12
%18 = load i32, i32* %9
%19 = icmp slt i32 %18, 0
br i1 %19, label %24, label %20
20: ; preds = %17
%21 = load i32, i32* %9
%22 = load i32, i32* %6
%23 = icmp sge i32 %21, %22
br i1 %23, label %24, label %25
24: ; preds = %20, %17
store i32 0, i32* %5
br label %26
25: ; preds = %20
store i32 1, i32* %5
br label %26
26: ; preds = %25, %24, %16
%27 = load i32, i32* %5
ret i32 %27
}

LLVM IR (-O2):
define i32 @range(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp sgt i32 %2, -1
%6 = icmp slt i32 %2, %1
%7 = and i1 %5, %6
%8 = icmp sgt i32 %3, -1
%9 = icmp slt i32 %3, %0
%10 = and i1 %8, %9
%11 = and i1 %7, %10
%12 = zext i1 %11 to i32
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_condattr_t;
typedef int /*<<< orphan*/ pthread_cond_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/ *);
int cond_init(int /*<<< orphan*/ *);
int pthread_cond_init(pthread_cond_t *cond, const pthread_condattr_t *attr) {
  (void)attr;
  assert(cond);
  return cond_init(cond);
}


x86 assembly (clang, -O0):
<pthread_cond_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rdi
call   1040 <cond_init@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_cond_init>:
push   %rbx
mov    %rdi,%rbx
call   1030 <assert@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <cond_init@plt>

LLVM IR (-O0):
define i32 @pthread_cond_init(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = load i32*, i32** %3
%7 = call i32 @assert(i32* %6)
%8 = load i32*, i32** %3
%9 = call i32 @cond_init(i32* %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @pthread_cond_init(i32* %0, i32* nocapture readnone %1) {
%3 = tail call i32 @assert(i32* %0)
%4 = tail call i32 @cond_init(i32* %0)
ret i32 %4
}
short to_short(int x) {
  return x == (short)x ? (short)x : (short)((x >> 31) ^ 0x7FFF);
}


x86 assembly (clang, -O0):
<to_short>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
movswl %cx,%ecx
cmp    %ecx,%eax
jne    1124 <to_short+0x24>
mov    -0x4(%rbp),%eax
cwtl
mov    %eax,-0x8(%rbp)
jmp    1133 <to_short+0x33>
mov    -0x4(%rbp),%eax
sar    $0x1f,%eax
xor    $0x7fff,%eax
cwtl
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<to_short>:
cmp    $0xffff8001,%edi
mov    $0xffff8000,%ecx
cmovge %edi,%ecx
cmp    $0x7fff,%ecx
mov    $0x7fff,%eax
cmovl  %ecx,%eax
ret

LLVM IR (-O0):
define signext i16 @to_short(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = trunc i32 %4 to i16
%6 = sext i16 %5 to i32
%7 = icmp eq i32 %3, %6
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i32, i32* %2
%10 = trunc i32 %9 to i16
%11 = sext i16 %10 to i32
br label %18
12: ; preds = %1
%13 = load i32, i32* %2
%14 = ashr i32 %13, 31
%15 = xor i32 %14, 32767
%16 = trunc i32 %15 to i16
%17 = sext i16 %16 to i32
br label %18
18: ; preds = %12, %8
%19 = phi i32 [ %11, %8 ], [ %17, %12 ]
%20 = trunc i32 %19 to i16
ret i16 %20
}

LLVM IR (-O2):
define signext i16 @to_short(i32 %0) {
%2 = icmp sgt i32 %0, -32768
%3 = select i1 %2, i32 %0, i32 -32768
%4 = icmp slt i32 %3, 32767
%5 = select i1 %4, i32 %3, i32 32767
%6 = trunc i32 %5 to i16
ret i16 %6
}
struct param_d *dev_add_param_int_ro(struct device_d *dev, const char *name,
                                     int value, const char *format) {
  return ((void *)0);
}


x86 assembly (clang, -O0):
<dev_add_param_int_ro>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dev_add_param_int_ro>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.param_d = type opaque
%struct.device_d = type opaque
define %struct.param_d* @dev_add_param_int_ro(%struct.device_d* %0, i8* %1, i32 %2, i8* %3) {
%5 = alloca %struct.device_d*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
store %struct.device_d* %0, %struct.device_d** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i8* %3, i8** %8
ret %struct.param_d* null
}

LLVM IR (-O2):
%struct.param_d = type opaque
%struct.device_d = type opaque
define noalias %struct.param_d* @dev_add_param_int_ro(%struct.device_d* nocapture readnone %0, i8* nocapture readnone %1, i32 %2, i8* nocapture readnone %3) {
ret %struct.param_d* null
}
/* Type definitions */
typedef int /*<<< orphan*/ gid_t;

/* Variables and functions */
int /*<<< orphan*/ getegid();
int /*<<< orphan*/ setresgid(int /*<<< orphan*/, int /*<<< orphan*/,
                             int /*<<< orphan*/);
int /*<<< orphan*/ system(char *);
void vuln() {
  gid_t gid = getegid();
  setresgid(gid, gid, gid);
  system("/bin/sh -i");
}


x86 assembly (clang, -O0):
<vuln>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <getegid@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x4(%rbp),%esi
mov    -0x4(%rbp),%edx
call   1030 <setresgid@plt>
lea    0xea9(%rip),%rdi
call   1040 <system@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vuln>:
push   %rax
xor    %eax,%eax
call   1050 <getegid@plt>
mov    %eax,%edi
mov    %eax,%esi
mov    %eax,%edx
call   1030 <setresgid@plt>
lea    0xeb6(%rip),%rdi
pop    %rax
jmp    1040 <system@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"/bin/sh -i\00"
define void @vuln() {
%1 = alloca i32
%2 = call i32 (...) @getegid()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = load i32, i32* %1
%5 = load i32, i32* %1
%6 = call i32 @setresgid(i32 %3, i32 %4, i32 %5)
%7 = call i32 @system(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"/bin/sh -i\00"
define void @vuln() {
%1 = tail call i32 (...) @getegid()
%2 = tail call i32 @setresgid(i32 %1, i32 %1, i32 %1)
%3 = tail call i32 @system(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void delay(uint32_t i) {
  for (; i > 0; i--)
    ;
}


x86 assembly (clang, -O0):
<delay>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jle    1129 <delay+0x29>
jmp    1118 <delay+0x18>
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <delay+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay>:
ret

LLVM IR (-O0):
define void @delay(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
br label %3
3: ; preds = %7, %1
%4 = load i64, i64* %2
%5 = icmp sgt i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %3
br label %7
7: ; preds = %6
%8 = load i64, i64* %2
%9 = add nsw i64 %8, -1
store i64 %9, i64* %2
br label %3
10: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @delay(i64 %0) {
ret void
}
void foo256() {}


x86 assembly (clang, -O0):
<foo256>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo256>:
ret

LLVM IR (-O0):
define void @foo256() {
ret void
}

LLVM IR (-O2):
define void @foo256() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fsync(int);
int sync(void) {
  int i;
  for (i = 0; i < 255; i++)
    fsync(i);
  return 0;
}


x86 assembly (clang, -O0):
<sync>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0xff,-0x4(%rbp)
jge    1142 <sync+0x32>
mov    -0x4(%rbp),%edi
call   1030 <fsync@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <sync+0xf>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sync>:
push   %rbx
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %ebx,%edi
call   1030 <fsync@plt>
add    $0x1,%ebx
cmp    $0xff,%ebx
jne    1120 <sync+0x10>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @sync() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %8, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 255
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = load i32, i32* %1
%7 = call i32 @fsync(i32 %6)
br label %8
8: ; preds = %5
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %1
br label %2
11: ; preds = %2
ret i32 0
}

LLVM IR (-O2):
define i32 @sync() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @fsync(i32 %2)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 255
br i1 %5, label %6, label %1
6: ; preds = %1
ret i32 0
}
void work(void) {
  for (volatile int i = 0; i < (int)(1e5); i++)
    ;
}


x86 assembly (clang, -O0):
<work>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
cmp    $0x186a0,%eax
jge    112c <work+0x2c>
jmp    111e <work+0x1e>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <work+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<work>:
movl   $0x0,-0x4(%rsp)
mov    -0x4(%rsp),%eax
cmp    $0x1869f,%eax
jg     1130 <work+0x30>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
addl   $0x1,-0x4(%rsp)
mov    -0x4(%rsp),%eax
cmp    $0x186a0,%eax
jl     1120 <work+0x20>
ret

LLVM IR (-O0):
define void @work() {
%1 = alloca i32
store volatile i32 0, i32* %1
br label %2
2: ; preds = %6, %0
%3 = load volatile i32, i32* %1
%4 = icmp slt i32 %3, 100000
br i1 %4, label %5, label %9
5: ; preds = %2
br label %6
6: ; preds = %5
%7 = load volatile i32, i32* %1
%8 = add nsw i32 %7, 1
store volatile i32 %8, i32* %1
br label %2
9: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @work() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store volatile i32 0, i32* %1
%3 = load volatile i32, i32* %1
%4 = icmp slt i32 %3, 100000
br i1 %4, label %6, label %5
5: ; preds = %6, %0
ret void
6: ; preds = %0, %6
%7 = load volatile i32, i32* %1
%8 = add nsw i32 %7, 1
store volatile i32 %8, i32* %1
%9 = load volatile i32, i32* %1
%10 = icmp slt i32 %9, 100000
br i1 %10, label %6, label %5
}
__attribute__((always_, unused)) int
ips_test_and_set_bit(int nr, volatile unsigned long *addr) {
  int oldbit;
  asm volatile("lock "
               "btsl %2,%1\n\tsbbl %0,%0"
               : "=r"(oldbit), "=m"(*addr)
               : "dIr"(nr)
               : "memory");
  return oldbit;
}


x86 assembly (clang, -O0):
<ips_test_and_set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
lock bts %ecx,(%rax)
sbb    %eax,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ips_test_and_set_bit>:
lock bts %edi,(%rsi)
sbb    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ips_test_and_set_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i32
store i32 %0, i32* %3
store i64* %1, i64** %4
%6 = load i64*, i64** %4
%7 = load i32, i32* %3
%8 = call i32 asm sideeffect "lock btsl $2,$1\0A\09sbbl $0,$0", "=r,=*m,{dx}Ir,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @ips_test_and_set_bit(i32 %0, i64* %1) {
%3 = tail call i32 asm sideeffect "lock btsl $2,$1\0A\09sbbl $0,$0", "=r,=*m,{dx}Ir,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %1, i32 %0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, int, int /*<<< orphan*/, int /*<<< orphan*/);
void version() {
  printf("'ga_overlap' in genome analysis tools version: %d.%d.%d\n", 1, 0, 0);
  exit(0);
}


x86 assembly (clang, -O0):
<version>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
mov    $0x1,%esi
xor    %ecx,%ecx
mov    %ecx,%edx
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<version>:
push   %rax
lea    0xed8(%rip),%rdi
mov    $0x1,%esi
xor    %edx,%edx
xor    %ecx,%ecx
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [57 x i8] c"'ga_overlap' in genome analysis tools version: %d.%d.%d\0A\00"
define void @version() {
%1 = call i32 @printf(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0), i32 1, i32 0, i32 0)
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [57 x i8] c"'ga_overlap' in genome analysis tools version: %d.%d.%d\0A\00"
define void @version() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0), i32 1, i32 0, i32 0)
%2 = tail call i32 @exit(i32 0)
unreachable
}
long lrand48() {}


x86 assembly (clang, -O0):
<lrand48>:
push   %rbp
mov    %rsp,%rbp
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lrand48>:
ret

LLVM IR (-O0):
define i64 @lrand48() {
%1 = alloca i64
%2 = load i64, i64* %1
ret i64 %2
}

LLVM IR (-O2):
define i64 @lrand48() {
ret i64 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void usage() {
  printf(
      "OPTIONS: %s[path] # Specify a path where MOVE INSTEAD OF DELETE "
      "unwanted files\n [path]          # Path to watch for unwanted files\n\n",
      "--moveto=");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xf63(%rip),%rsi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
lea    0xf67(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [133 x i8] c"OPTIONS: %s[path] # Specify a path where MOVE INSTEAD OF DELETE unwanted files\0A [path] # Path to watch for unwanted files\0A\0A\00"
@.str.1 = [10 x i8] c"--moveto=\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([133 x i8], [133 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [133 x i8] c"OPTIONS: %s[path] # Specify a path where MOVE INSTEAD OF DELETE unwanted files\0A [path] # Path to watch for unwanted files\0A\0A\00"
@.str.1 = [10 x i8] c"--moveto=\00"
define void @usage() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([133 x i8], [133 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
ret void
}