unsigned long assemble_22(a, b, c, d)
unsigned int a, b, c, d;
{
  unsigned long temp;
  temp =
      ((((((d & (~((-1) << 1))) << 5) | (a & (~((-1) << 5)))) & (~((-1) << 6)))
        << 16) |
       ((((b & (~((-1) << 5))) << 11) |
         ((((((c) >> (31 - (10)) & ((1 << ((10) - (10) + 1)) - 1)) &
             (~((-1) << 1)))
            << 10) |
           (((c) >> (31 - (9)) & ((1 << ((9) - (0) + 1)) - 1)) &
            (~((-1) << 10)))) &
          (~((-1) << 11)))) &
        (~((-1) << 16))));
  return sign_extend(temp, 22);
}


x86 assembly (clang, -O0):
<assemble_22>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    $0x1,%eax
shl    $0x5,%eax
mov    -0x4(%rbp),%ecx
and    $0x1f,%ecx
or     %ecx,%eax
and    $0x3f,%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%ecx
and    $0x1f,%ecx
shl    $0xb,%ecx
mov    -0xc(%rbp),%edx
shr    $0x15,%edx
and    $0x1,%edx
and    $0x1,%edx
shl    $0xa,%edx
mov    -0xc(%rbp),%esi
shr    $0x16,%esi
and    $0x3ff,%esi
and    $0x3ff,%esi
or     %esi,%edx
and    $0x7ff,%edx
or     %edx,%ecx
and    $0xffff,%ecx
or     %ecx,%eax
mov    %eax,%eax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    $0x16,%esi
mov    $0x0,%al
call   1030 <sign_extend@plt>
cltq
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assemble_22>:
push   %rax
shl    $0x5,%ecx
and    $0x20,%ecx
and    $0x1f,%edi
or     %ecx,%edi
shl    $0x10,%edi
shl    $0xb,%esi
movzwl %si,%eax
mov    %edx,%ecx
shr    $0xb,%ecx
and    $0x400,%ecx
shr    $0x16,%edx
or     %edx,%eax
or     %ecx,%eax
or     %eax,%edi
mov    $0x16,%esi
xor    %eax,%eax
call   1030 <sign_extend@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i64 @assemble_22(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i64
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %8
%11 = and i32 %10, 1
%12 = shl i32 %11, 5
%13 = load i32, i32* %5
%14 = and i32 %13, 31
%15 = or i32 %12, %14
%16 = and i32 %15, 63
%17 = shl i32 %16, 16
%18 = load i32, i32* %6
%19 = and i32 %18, 31
%20 = shl i32 %19, 11
%21 = load i32, i32* %7
%22 = lshr i32 %21, 21
%23 = and i32 %22, 1
%24 = and i32 %23, 1
%25 = shl i32 %24, 10
%26 = load i32, i32* %7
%27 = lshr i32 %26, 22
%28 = and i32 %27, 1023
%29 = and i32 %28, 1023
%30 = or i32 %25, %29
%31 = and i32 %30, 2047
%32 = or i32 %20, %31
%33 = and i32 %32, 65535
%34 = or i32 %17, %33
%35 = zext i32 %34 to i64
store i64 %35, i64* %9
%36 = load i64, i64* %9
%37 = call i32 (i64, i32, ...) bitcast (i32 (...)* @sign_extend to i32 (i64, i32, ...)*)(i64 %36, i32 22)
%38 = sext i32 %37 to i64
ret i64 %38
}

LLVM IR (-O2):
define i64 @assemble_22(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = shl i32 %3, 5
%6 = and i32 %5, 32
%7 = and i32 %0, 31
%8 = or i32 %6, %7
%9 = shl nuw nsw i32 %8, 16
%10 = shl i32 %1, 11
%11 = and i32 %10, 63488
%12 = lshr i32 %2, 11
%13 = and i32 %12, 1024
%14 = lshr i32 %2, 22
%15 = or i32 %11, %14
%16 = or i32 %15, %13
%17 = or i32 %16, %9
%18 = zext i32 %17 to i64
%19 = tail call i32 (i64, i32, ...) bitcast (i32 (...)* @sign_extend to i32 (i64, i32, ...)*)(i64 %18, i32 22)
%20 = sext i32 %19 to i64
ret i64 %20
}