xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ CMS_ContentInfo;
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int /*<<< orphan*/ CMS_F_CMS_UNCOMPRESS;
int /*<<< orphan*/ CMS_R_UNSUPPORTED_COMPRESSION_ALGORITHM;
int /*<<< orphan*/ CMSerr(int /*<<< orphan*/, int /*<<< orphan*/);
int CMS_uncompress(CMS_ContentInfo *cms, BIO *dcont, BIO *out,
                   unsigned int flags) {
  CMSerr(CMS_F_CMS_UNCOMPRESS, CMS_R_UNSUPPORTED_COMPRESSION_ALGORITHM);
  return 0;
}


x86 assembly (clang, -O0):
<CMS_uncompress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
mov    0x2ea9(%rip),%rax
mov    (%rax),%esi
call   1030 <CMSerr@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CMS_uncompress>:
push   %rax
mov    0x2ed8(%rip),%rax
mov    (%rax),%edi
mov    0x2ebf(%rip),%rax
mov    (%rax),%esi
call   1030 <CMSerr@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@CMS_F_CMS_UNCOMPRESS = global i32 0
@CMS_R_UNSUPPORTED_COMPRESSION_ALGORITHM = global i32 0
define i32 @CMS_uncompress(i32* %0, i32* %1, i32* %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32 %3, i32* %8
%9 = load i32, i32* @CMS_F_CMS_UNCOMPRESS
%10 = load i32, i32* @CMS_R_UNSUPPORTED_COMPRESSION_ALGORITHM
%11 = call i32 @CMSerr(i32 %9, i32 %10)
ret i32 0
}

LLVM IR (-O2):
@CMS_F_CMS_UNCOMPRESS = global i32 0
@CMS_R_UNSUPPORTED_COMPRESSION_ALGORITHM = global i32 0
define i32 @CMS_uncompress(i32* nocapture readnone %0, i32* nocapture readnone %1, i32* nocapture readnone %2, i32 %3) {
%5 = load i32, i32* @CMS_F_CMS_UNCOMPRESS
%6 = load i32, i32* @CMS_R_UNSUPPORTED_COMPRESSION_ALGORITHM
%7 = tail call i32 @CMSerr(i32 %5, i32 %6)
ret i32 0
}
/* Variables and functions */
int atoi(char const *);
int qsort_cmp_int(const void *a, const void *b) {
  int diff = atoi(*(const char **)a) - atoi(*(const char **)b);
  return (diff > 0 ? 1 : diff < 0 ? -1 : 0);
}


x86 assembly (clang, -O0):
<qsort_cmp_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <atoi@plt>
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1030 <atoi@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jle    115c <qsort_cmp_int+0x4c>
mov    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    116f <qsort_cmp_int+0x5f>
mov    -0x14(%rbp),%edx
xor    %eax,%eax
mov    $0xffffffff,%ecx
cmp    $0x0,%edx
cmovl  %ecx,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qsort_cmp_int>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    (%rdi),%rdi
call   1030 <atoi@plt>
mov    %eax,%ebp
mov    (%rbx),%rdi
call   1030 <atoi@plt>
xor    %ecx,%ecx
cmp    %eax,%ebp
setne  %cl
neg    %ecx
cmp    %eax,%ebp
mov    $0x1,%eax
cmovle %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @qsort_cmp_int(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i8**
%8 = load i8*, i8** %7
%9 = call i32 @atoi(i8* %8)
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i8**
%12 = load i8*, i8** %11
%13 = call i32 @atoi(i8* %12)
%14 = sub nsw i32 %9, %13
store i32 %14, i32* %5
%15 = load i32, i32* %5
%16 = icmp sgt i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %2
br label %23
18: ; preds = %2
%19 = load i32, i32* %5
%20 = icmp slt i32 %19, 0
%21 = zext i1 %20 to i64
%22 = select i1 %20, i32 -1, i32 0
br label %23
23: ; preds = %18, %17
%24 = phi i32 [ 1, %17 ], [ %22, %18 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @qsort_cmp_int(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = tail call i32 @atoi(i8* %4)
%6 = bitcast i8* %1 to i8**
%7 = load i8*, i8** %6
%8 = tail call i32 @atoi(i8* %7)
%9 = sub nsw i32 %5, %8
%10 = icmp ne i32 %9, 0
%11 = sext i1 %10 to i32
%12 = icmp slt i32 %9, 1
%13 = select i1 %12, i32 %11, i32 1
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void Usage(char *f) { printf("Usage: %s <file>\n", f); }


x86 assembly (clang, -O0):
<Usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Usage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"Usage: %s <file>\0A\00"
define void @Usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"Usage: %s <file>\0A\00"
define void @Usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ putchar(int /*<<< orphan*/);
void puts(const char *string) {
  while ((*string) != 0) {
    putchar(*string++);
  }
}


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1148 <puts+0x38>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <putchar@plt>
jmp    111c <puts+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <puts+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <putchar@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <puts+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
%11 = load i8, i8* %9
%12 = sext i8 %11 to i32
%13 = call i32 @putchar(i32 %12)
br label %3
14: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @puts(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %10, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = sext i8 %5 to i32
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = tail call i32 @putchar(i32 %7)
%10 = load i8, i8* %8
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
int decrement(int n) { return n - 1; }


x86 assembly (clang, -O0):
<decrement>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<decrement>:
lea    -0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @decrement(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 %3, 1
ret i32 %4
}

LLVM IR (-O2):
define i32 @decrement(i32 %0) {
%2 = add nsw i32 %0, -1
ret i32 %2
}
int test_imm_23int64_lowword_mem(long long *val) {
  return ((*val) & (0x23 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_23int64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x23,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_23int64_lowword_mem>:
testb  $0x23,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_23int64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 35
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_23int64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 35
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int ddinc(n)
int n;
{ return (ttinc(n)); }


x86 assembly (clang, -O0):
<ddinc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1030 <ttinc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ddinc>:
xor    %eax,%eax
jmp    1030 <ttinc@plt>

LLVM IR (-O0):
define i32 @ddinc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (i32, ...) bitcast (i32 (...)* @ttinc to i32 (i32, ...)*)(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @ddinc(i32 %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @ttinc to i32 (i32, ...)*)(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ __bitmap_andnot(unsigned long *, unsigned long const *,
                                   unsigned long const *, int);
__attribute__((always_)) void bitmap_andnot(unsigned long *dst,
                                            const unsigned long *src1,
                                            const unsigned long *src2,
                                            int nbits) {
  if (nbits <= 32)
    *dst = *src1 & ~(*src2);
  else
    __bitmap_andnot(dst, src1, src2, nbits);
}


x86 assembly (clang, -O0):
<bitmap_andnot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
cmpl   $0x20,-0x1c(%rbp)
jg     1152 <bitmap_andnot+0x42>
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
xor    $0xffffffffffffffff,%rax
and    %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
jmp    1166 <bitmap_andnot+0x56>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <__bitmap_andnot@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitmap_andnot>:
cmp    $0x20,%ecx
jg     1122 <bitmap_andnot+0x12>
mov    (%rdx),%rax
not    %rax
and    (%rsi),%rax
mov    %rax,(%rdi)
ret
jmp    1030 <__bitmap_andnot@plt>

LLVM IR (-O0):
define void @bitmap_andnot(i64* %0, i64* %1, i64* %2, i32 %3) {
%5 = alloca i64*
%6 = alloca i64*
%7 = alloca i64*
%8 = alloca i32
store i64* %0, i64** %5
store i64* %1, i64** %6
store i64* %2, i64** %7
store i32 %3, i32* %8
%9 = load i32, i32* %8
%10 = icmp sle i32 %9, 32
br i1 %10, label %11, label %19
11: ; preds = %4
%12 = load i64*, i64** %6
%13 = load i64, i64* %12
%14 = load i64*, i64** %7
%15 = load i64, i64* %14
%16 = xor i64 %15, -1
%17 = and i64 %13, %16
%18 = load i64*, i64** %5
store i64 %17, i64* %18
br label %25
19: ; preds = %4
%20 = load i64*, i64** %5
%21 = load i64*, i64** %6
%22 = load i64*, i64** %7
%23 = load i32, i32* %8
%24 = call i32 @__bitmap_andnot(i64* %20, i64* %21, i64* %22, i32 %23)
br label %25
25: ; preds = %19, %11
ret void
}

LLVM IR (-O2):
define void @bitmap_andnot(i64* %0, i64* %1, i64* %2, i32 %3) {
%5 = icmp slt i32 %3, 33
br i1 %5, label %6, label %11
6: ; preds = %4
%7 = load i64, i64* %1
%8 = load i64, i64* %2
%9 = xor i64 %8, -1
%10 = and i64 %7, %9
store i64 %10, i64* %0
br label %13
11: ; preds = %4
%12 = tail call i32 @__bitmap_andnot(i64* %0, i64* %1, i64* %2, i32 %3)
br label %13
13: ; preds = %11, %6
ret void
}
int test_imm_7Bint16_reg(short val) {
  return ((val) & (0x7B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Bint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x7b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Bint16_reg>:
test   $0x7b,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Bint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 123
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_7Bint16_reg(i16 signext %0) {
%2 = and i16 %0, 123
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
long unsigned int yystrlen(const char *yystr) {
  long unsigned int yylen;
  for (yylen = 0; yystr[yylen]; yylen++) {
    continue;
  }
  return yylen;
}


x86 assembly (clang, -O0):
<yystrlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1138 <yystrlen+0x38>
jmp    1127 <yystrlen+0x27>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <yystrlen+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<yystrlen>:
mov    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <yystrlen+0x10>
ret

LLVM IR (-O0):
define i64 @yystrlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %2
%6 = load i64, i64* %3
%7 = getelementptr inbounds i8, i8* %5, i64 %6
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %4
br label %11
11: ; preds = %10
%12 = load i64, i64* %3
%13 = add i64 %12, 1
store i64 %13, i64* %3
br label %4
14: ; preds = %4
%15 = load i64, i64* %3
ret i64 %15
}

LLVM IR (-O2):
define i64 @yystrlen(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 0, %1 ], [ %7, %2 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i64 %3
}
int xmlUCSIsEthiopic(int code) {
  return (((code >= 0x1200) && (code <= 0x137F)));
}


x86 assembly (clang, -O0):
<xmlUCSIsEthiopic>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x1200,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1126 <xmlUCSIsEthiopic+0x26>
cmpl   $0x137f,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmlUCSIsEthiopic>:
add    $0xffffee00,%edi
xor    %eax,%eax
cmp    $0x180,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @xmlUCSIsEthiopic(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 4608
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 4991
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @xmlUCSIsEthiopic(i32 %0) {
%2 = add i32 %0, -4608
%3 = icmp ult i32 %2, 384
%4 = zext i1 %3 to i32
ret i32 %4
}
void nseel_asm_uminus(void) { __asm__("fchs\n"); }


x86 assembly (clang, -O0):
<nseel_asm_uminus>:
push   %rbp
mov    %rsp,%rbp
fchs
pop    %rbp
ret

x86 assembly (clang, -O2):
<nseel_asm_uminus>:
fchs
ret

LLVM IR (-O0):
define void @nseel_asm_uminus() {
ret void
}

LLVM IR (-O2):
define void @nseel_asm_uminus() {
tail call void asm sideeffect "fchs\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int __send_to_ppe(int, int, int *);
int fdatasync(int fd) { return __send_to_ppe(0x2101, 49, &fd); }


x86 assembly (clang, -O0):
<fdatasync>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x2101,%edi
mov    $0x31,%esi
lea    -0x4(%rbp),%rdx
call   1030 <__send_to_ppe@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdatasync>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rdx
mov    $0x2101,%edi
mov    $0x31,%esi
call   1030 <__send_to_ppe@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fdatasync(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @__send_to_ppe(i32 8449, i32 49, i32* %2)
ret i32 %3
}

LLVM IR (-O2):
define i32 @fdatasync(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @__send_to_ppe(i32 8449, i32 49, i32* %2)
ret i32 %3
}
unsigned gf32_mod(unsigned long long r, int high_bit) {
  int j = high_bit;
  for (j = high_bit; j >= 32; j--) {
    if ((1ULL << j) & r) {
      r ^= 0x1EDC6F41ULL << (j - 32);
    }
  }
  return (unsigned)r;
}


x86 assembly (clang, -O0):
<gf32_mod>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x20,-0x10(%rbp)
jl     1169 <gf32_mod+0x69>
mov    -0x10(%rbp),%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
and    -0x8(%rbp),%rax
cmp    $0x0,%rax
je     1156 <gf32_mod+0x56>
mov    -0x10(%rbp),%eax
sub    $0x20,%eax
mov    %eax,%eax
mov    %eax,%ecx
mov    $0x1edc6f41,%eax
shl    %cl,%rax
xor    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    115b <gf32_mod+0x5b>
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    1117 <gf32_mod+0x17>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gf32_mod>:
mov    %rdi,%rax
cmp    $0x20,%esi
jl     1133 <gf32_mod+0x33>
mov    %esi,%edx
xor    %esi,%esi
nopl   0x0(%rax)
lea    -0x20(%rdx),%ecx
mov    $0x1edc6f41,%edi
shl    %cl,%rdi
bt     %rdx,%rax
cmovae %rsi,%rdi
xor    %rdi,%rax
lea    -0x1(%rdx),%rcx
cmp    $0x20,%rdx
mov    %rcx,%rdx
ja     1110 <gf32_mod+0x10>
ret

LLVM IR (-O0):
define i32 @gf32_mod(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
store i32 %6, i32* %5
%7 = load i32, i32* %4
store i32 %7, i32* %5
br label %8
8: ; preds = %26, %2
%9 = load i32, i32* %5
%10 = icmp sge i32 %9, 32
br i1 %10, label %11, label %29
11: ; preds = %8
%12 = load i32, i32* %5
%13 = zext i32 %12 to i64
%14 = shl i64 1, %13
%15 = load i64, i64* %3
%16 = and i64 %14, %15
%17 = icmp ne i64 %16, 0
br i1 %17, label %18, label %25
18: ; preds = %11
%19 = load i32, i32* %5
%20 = sub nsw i32 %19, 32
%21 = zext i32 %20 to i64
%22 = shl i64 517762881, %21
%23 = load i64, i64* %3
%24 = xor i64 %23, %22
store i64 %24, i64* %3
br label %25
25: ; preds = %18, %11
br label %26
26: ; preds = %25
%27 = load i32, i32* %5
%28 = add nsw i32 %27, -1
store i32 %28, i32* %5
br label %8
29: ; preds = %8
%30 = load i64, i64* %3
%31 = trunc i64 %30 to i32
ret i32 %31
}

LLVM IR (-O2):
define i32 @gf32_mod(i64 %0, i32 %1) {
%3 = icmp sgt i32 %1, 31
br i1 %3, label %4, label %19
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ %5, %4 ], [ %17, %6 ]
%8 = phi i64 [ %0, %4 ], [ %16, %6 ]
%9 = shl nuw i64 1, %7
%10 = and i64 %9, %8
%11 = icmp eq i64 %10, 0
%12 = add nuw i64 %7, 4294967264
%13 = and i64 %12, 4294967295
%14 = shl i64 517762881, %13
%15 = select i1 %11, i64 0, i64 %14
%16 = xor i64 %15, %8
%17 = add nsw i64 %7, -1
%18 = icmp ugt i64 %7, 32
br i1 %18, label %6, label %19
19: ; preds = %6, %2
%20 = phi i64 [ %0, %2 ], [ %16, %6 ]
%21 = trunc i64 %20 to i32
ret i32 %21
}
unsigned char dec_to_bcd(char dec) {
  return (unsigned char)((dec / 10) * 16) + (dec % 10);
}


x86 assembly (clang, -O0):
<dec_to_bcd>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
shl    $0x4,%eax
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x8(%rbp),%eax
add    %edx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dec_to_bcd>:
mov    %edi,%eax
imul   $0x67,%edi,%ecx
movzwl %cx,%edx
shr    $0xa,%ecx
shr    $0xf,%edx
add    %cl,%dl
movzbl %dl,%ecx
shl    $0x4,%dl
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %cl,%al
add    %dl,%al
ret

LLVM IR (-O0):
define zeroext i8 @dec_to_bcd(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = sdiv i32 %4, 10
%6 = mul nsw i32 %5, 16
%7 = trunc i32 %6 to i8
%8 = zext i8 %7 to i32
%9 = load i8, i8* %2
%10 = sext i8 %9 to i32
%11 = srem i32 %10, 10
%12 = add nsw i32 %8, %11
%13 = trunc i32 %12 to i8
ret i8 %13
}

LLVM IR (-O2):
define zeroext i8 @dec_to_bcd(i8 signext %0) {
%2 = sdiv i8 %0, 10
%3 = shl i8 %2, 4
%4 = srem i8 %0, 10
%5 = add i8 %3, %4
ret i8 %5
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
scalar_t__ ENOENT;
scalar_t__ errno;
scalar_t__ stat(char *, struct stat *);
int fileexists(char *filename) {
  struct stat buf;
  if (stat(filename, &buf) != 0) {
    if (errno == ENOENT) {
      return 0;
    } else {
      return -1;
    }
  }
  return 1;
}


x86 assembly (clang, -O0):
<fileexists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <stat@plt>
cmp    $0x0,%rax
je     1165 <fileexists+0x55>
mov    0x2ea6(%rip),%rax
mov    (%rax),%rax
mov    0x2e8c(%rip),%rcx
cmp    (%rcx),%rax
jne    1159 <fileexists+0x49>
movl   $0x0,-0x4(%rbp)
jmp    116c <fileexists+0x5c>
movl   $0xffffffff,-0x4(%rbp)
jmp    116c <fileexists+0x5c>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fileexists>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
mov    0x2ec0(%rip),%rcx
mov    (%rcx),%rcx
mov    0x2ea6(%rip),%rdx
xor    %esi,%esi
cmp    (%rdx),%rcx
setne  %sil
neg    %esi
test   %rax,%rax
mov    $0x1,%eax
cmovne %esi,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
@errno = global i64 0
@ENOENT = global i64 0
define i32 @fileexists(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.stat
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @stat(i8* %5, %struct.stat* %4)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %1
%9 = load i64, i64* @errno
%10 = load i64, i64* @ENOENT
%11 = icmp eq i64 %9, %10
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 0, i32* %2
br label %15
13: ; preds = %8
store i32 -1, i32* %2
br label %15
14: ; preds = %1
store i32 1, i32* %2
br label %15
15: ; preds = %14, %13, %12
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
%struct.stat = type { i32 }
@errno = global i64 0
@ENOENT = global i64 0
define i32 @fileexists(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i64 %4, 0
%6 = load i64, i64* @errno
%7 = load i64, i64* @ENOENT
%8 = icmp ne i64 %6, %7
%9 = sext i1 %8 to i32
%10 = select i1 %5, i32 1, i32 %9
ret i32 %10
}
unsigned get_apic_id(unsigned long x) { return (((x) >> 24) & 0x0F); }


x86 assembly (clang, -O0):
<get_apic_id>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x18,%rax
and    $0xf,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_apic_id>:
mov    %rdi,%rax
shr    $0x18,%eax
and    $0xf,%eax
ret

LLVM IR (-O0):
define i32 @get_apic_id(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 24
%5 = and i64 %4, 15
%6 = trunc i64 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @get_apic_id(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = lshr i32 %2, 24
%4 = and i32 %3, 15
ret i32 %4
}
unsigned int _check_times(unsigned x, unsigned y) {
  unsigned long long whole_ans =
      ((unsigned long long)x) * ((unsigned long long)y);
  unsigned word_ans = (unsigned)whole_ans;
  if (word_ans < whole_ans || word_ans > (1 << 28))
    (_throw_badalloc_fn("/scratch/repos/new/home/jordi_armengol_estape/"
                        "c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/"
                        "cyclone/refs/heads/master/bin/genfiles/attributes.c",
                        284));
  return word_ans;
}


x86 assembly (clang, -O0):
<_check_times>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%rax
jb     114d <_check_times+0x3d>
cmpl   $0x10000000,-0x14(%rbp)
jbe    1160 <_check_times+0x50>
lea    0xeac(%rip),%rdi
mov    $0x11c,%esi
mov    $0x0,%al
call   1030 <_throw_badalloc_fn@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_check_times>:
push   %rbx
mov    %edi,%eax
mul    %esi
mov    %eax,%ebx
jo     1121 <_check_times+0x11>
cmp    $0x10000001,%ebx
jb     1134 <_check_times+0x24>
lea    0xed8(%rip),%rdi
mov    $0x11c,%esi
xor    %eax,%eax
call   1030 <_throw_badalloc_fn@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [151 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/attributes.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = zext i32 %7 to i64
%9 = load i32, i32* %4
%10 = zext i32 %9 to i64
%11 = mul i64 %8, %10
store i64 %11, i64* %5
%12 = load i64, i64* %5
%13 = trunc i64 %12 to i32
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = zext i32 %14 to i64
%16 = load i64, i64* %5
%17 = icmp ult i64 %15, %16
br i1 %17, label %21, label %18
18: ; preds = %2
%19 = load i32, i32* %6
%20 = icmp ugt i32 %19, 268435456
br i1 %20, label %21, label %23
21: ; preds = %18, %2
%22 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([151 x i8], [151 x i8]* @.str, i64 0, i64 0), i32 284)
br label %23
23: ; preds = %21, %18
%24 = load i32, i32* %6
ret i32 %24
}

LLVM IR (-O2):
@.str = [151 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/attributes.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %0, i32 %1)
%4 = extractvalue { i32, i1 } %3, 0
%5 = extractvalue { i32, i1 } %3, 1
%6 = icmp ugt i32 %4, 268435456
%7 = or i1 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([151 x i8], [151 x i8]* @.str, i64 0, i64 0), i32 284)
br label %10
10: ; preds = %2, %8
ret i32 %4
}
/* Variables and functions */
scalar_t__ INT_MAX;
scalar_t__ rnd_uniform_rng_d(int /*<<< orphan*/, scalar_t__);
int rnd_uniform_i(void) { return (int)rnd_uniform_rng_d(0, INT_MAX + 0.999); }


x86 assembly (clang, -O0):
<rnd_uniform_i>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
cvtsi2sdq (%rax),%xmm0
movsd  0xed8(%rip),%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rsi
xor    %edi,%edi
call   1030 <rnd_uniform_rng_d@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rnd_uniform_i>:
mov    0x2ed1(%rip),%rax
cvtsi2sdq (%rax),%xmm0
addsd  0xedc(%rip),%xmm0
cvttsd2si %xmm0,%rsi
xor    %edi,%edi
jmp    1030 <rnd_uniform_rng_d@plt>

LLVM IR (-O0):
@INT_MAX = global i64 0
define i32 @rnd_uniform_i() {
%1 = load i64, i64* @INT_MAX
%2 = sitofp i64 %1 to double
%3 = fadd double %2, 0x3FEFF7CED916872B
%4 = fptosi double %3 to i64
%5 = call i64 @rnd_uniform_rng_d(i32 0, i64 %4)
%6 = trunc i64 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
@INT_MAX = global i64 0
define i32 @rnd_uniform_i() {
%1 = load i64, i64* @INT_MAX
%2 = sitofp i64 %1 to double
%3 = fadd double %2, 0x3FEFF7CED916872B
%4 = fptosi double %3 to i64
%5 = tail call i64 @rnd_uniform_rng_d(i32 0, i64 %4)
%6 = trunc i64 %5 to i32
ret i32 %6
}
void RTAssertMsg2Add(void) {}


x86 assembly (clang, -O0):
<RTAssertMsg2Add>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAssertMsg2Add>:
ret

LLVM IR (-O0):
define void @RTAssertMsg2Add() {
ret void
}

LLVM IR (-O2):
define void @RTAssertMsg2Add() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void put_mem(void *addr) { free(addr); }


x86 assembly (clang, -O0):
<put_mem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_mem>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @put_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @put_mem(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
void timer5_init() {}


x86 assembly (clang, -O0):
<timer5_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timer5_init>:
ret

LLVM IR (-O0):
define void @timer5_init() {
ret void
}

LLVM IR (-O2):
define void @timer5_init() {
ret void
}
void rop3_12_0_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = ~T;
  stk1 = S & stk2;
  *D = (stk1 & S) | (stk1 & (~T)) | (T & (~S) & *D);
}


x86 assembly (clang, -O0):
<rop3_12_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
movzbl -0xb(%rbp),%ecx
movzbl -0xa(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
movzbl -0xa(%rbp),%ecx
movzbl -0x9(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
mov    -0x8(%rbp),%rdx
movzbl (%rdx),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_12_0_1>:
mov    %edx,%eax
not    %al
and    %sil,%al
not    %sil
and    %dl,%sil
and    (%rdi),%sil
or     %al,%sil
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_12_0_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8, i8* %6
%10 = zext i8 %9 to i32
%11 = xor i32 %10, -1
%12 = trunc i32 %11 to i8
store i8 %12, i8* %8
%13 = load i8, i8* %5
%14 = zext i8 %13 to i32
%15 = load i8, i8* %8
%16 = zext i8 %15 to i32
%17 = and i32 %14, %16
%18 = trunc i32 %17 to i8
store i8 %18, i8* %7
%19 = load i8, i8* %7
%20 = zext i8 %19 to i32
%21 = load i8, i8* %5
%22 = zext i8 %21 to i32
%23 = and i32 %20, %22
%24 = load i8, i8* %7
%25 = zext i8 %24 to i32
%26 = load i8, i8* %6
%27 = zext i8 %26 to i32
%28 = xor i32 %27, -1
%29 = and i32 %25, %28
%30 = or i32 %23, %29
%31 = load i8, i8* %6
%32 = zext i8 %31 to i32
%33 = load i8, i8* %5
%34 = zext i8 %33 to i32
%35 = xor i32 %34, -1
%36 = and i32 %32, %35
%37 = load i8*, i8** %4
%38 = load i8, i8* %37
%39 = zext i8 %38 to i32
%40 = and i32 %36, %39
%41 = or i32 %30, %40
%42 = trunc i32 %41 to i8
%43 = load i8*, i8** %4
store i8 %42, i8* %43
ret void
}

LLVM IR (-O2):
define void @rop3_12_0_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = xor i8 %2, -1
%5 = and i8 %4, %1
%6 = xor i8 %1, -1
%7 = and i8 %6, %2
%8 = load i8, i8* %0
%9 = and i8 %7, %8
%10 = or i8 %9, %5
store i8 %10, i8* %0
ret void
}
void close_asdf_data_(void) {}


x86 assembly (clang, -O0):
<close_asdf_data_>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_asdf_data_>:
ret

LLVM IR (-O0):
define void @close_asdf_data_() {
ret void
}

LLVM IR (-O2):
define void @close_asdf_data_() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ ffi_type;

/* Variables and functions */
void *ffi_callX_var(int argc, const char **arg_string, ffi_type rtype,
                    void *x_ptr, void **values) {
  return NULL;
}


x86 assembly (clang, -O0):
<ffi_callX_var>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffi_callX_var>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @ffi_callX_var(i32 %0, i8** %1, i32 %2, i8* %3, i8** %4) {
%6 = alloca i32
%7 = alloca i8**
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i8**
store i32 %0, i32* %6
store i8** %1, i8*** %7
store i32 %2, i32* %8
store i8* %3, i8** %9
store i8** %4, i8*** %10
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @ffi_callX_var(i32 %0, i8** nocapture readnone %1, i32 %2, i8* nocapture readnone %3, i8** nocapture readnone %4) {
ret i8* null
}
char *gettext__(const char *msgid) { return (char *)msgid; }


x86 assembly (clang, -O0):
<gettext__>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gettext__>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @gettext__(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @gettext__(i8* readnone returned %0) {
ret i8* %0
}
int color_offset_f1(int x, int y) {
  return (((y << 10) - (((x << 10) * 43) / 40) + (45 << 10)) >> 10);
}


x86 assembly (clang, -O0):
<color_offset_f1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0xa,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
shl    $0xa,%eax
imul   $0x2b,%eax,%eax
mov    $0x28,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
sub    %ecx,%eax
add    $0xb400,%eax
sar    $0xa,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<color_offset_f1>:
shl    $0xa,%esi
imul   $0xac00,%edi,%eax
cltq
imul   $0xffffffff99999999,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x24,%rax
add    %ecx,%eax
add    %esi,%eax
add    $0xb400,%eax
sar    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @color_offset_f1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 %5, 10
%7 = load i32, i32* %3
%8 = shl i32 %7, 10
%9 = mul nsw i32 %8, 43
%10 = sdiv i32 %9, 40
%11 = sub nsw i32 %6, %10
%12 = add nsw i32 %11, 46080
%13 = ashr i32 %12, 10
ret i32 %13
}

LLVM IR (-O2):
define i32 @color_offset_f1(i32 %0, i32 %1) {
%3 = shl i32 %1, 10
%4 = mul i32 %0, 44032
%5 = sdiv i32 %4, -40
%6 = add i32 %3, 46080
%7 = add i32 %6, %5
%8 = ashr i32 %7, 10
ret i32 %8
}
unsigned int DMTimerCompareGet(unsigned int baseAdd) {
  return ((*((volatile unsigned int *)(baseAdd + (0x4C)))));
}


x86 assembly (clang, -O0):
<DMTimerCompareGet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x4c,%eax
mov    %eax,%eax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMTimerCompareGet>:
add    $0x4c,%edi
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @DMTimerCompareGet(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 76
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @DMTimerCompareGet(i32 %0) {
%2 = add i32 %0, 76
%3 = zext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ delete_br_byindex(int);
int CTL_del_bridges(int *br_array) {
  int i, brcount = br_array[0];
  for (i = 1; i <= brcount; ++i)
    delete_br_byindex(br_array[i]);
  return 0;
}


x86 assembly (clang, -O0):
<CTL_del_bridges>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jg     1156 <CTL_del_bridges+0x46>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%edi
call   1030 <delete_br_byindex@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112c <CTL_del_bridges+0x1c>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CTL_del_bridges>:
push   %r15
push   %r14
push   %rbx
mov    (%rdi),%r15d
test   %r15d,%r15d
jle    1142 <CTL_del_bridges+0x32>
mov    %rdi,%r14
add    $0x1,%r15
mov    $0x1,%ebx
nopl   0x0(%rax)
mov    (%r14,%rbx,4),%edi
call   1030 <delete_br_byindex@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <CTL_del_bridges+0x20>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @CTL_del_bridges(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 0
%7 = load i32, i32* %6
store i32 %7, i32* %4
store i32 1, i32* %3
br label %8
8: ; preds = %19, %1
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = icmp sle i32 %9, %10
br i1 %11, label %12, label %22
12: ; preds = %8
%13 = load i32*, i32** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = call i32 @delete_br_byindex(i32 %17)
br label %19
19: ; preds = %12
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 1
store i32 %21, i32* %3
br label %8
22: ; preds = %8
ret i32 0
}

LLVM IR (-O2):
define i32 @CTL_del_bridges(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = icmp slt i32 %2, 1
br i1 %3, label %14, label %4
4: ; preds = %1
%5 = add nuw i32 %2, 1
%6 = zext i32 %5 to i64
br label %7
7: ; preds = %4, %7
%8 = phi i64 [ 1, %4 ], [ %12, %7 ]
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = tail call i32 @delete_br_byindex(i32 %10)
%12 = add nuw nsw i64 %8, 1
%13 = icmp eq i64 %12, %6
br i1 %13, label %14, label %7
14: ; preds = %7, %1
ret i32 0
}
int main() {
  int a = 2;
  int b = 4;
  while (a) {
    a *= 3;
    a *= b;
    b *= 5;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
movl   $0x4,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1140 <main+0x40>
imul   $0x3,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
imul   $0x5,-0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1119 <main+0x19>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 2, i32* %2
store i32 4, i32* %3
br label %4
4: ; preds = %7, %0
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32, i32* %2
%9 = mul nsw i32 %8, 3
store i32 %9, i32* %2
%10 = load i32, i32* %3
%11 = load i32, i32* %2
%12 = mul nsw i32 %11, %10
store i32 %12, i32* %2
%13 = load i32, i32* %3
%14 = mul nsw i32 %13, 5
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %1
ret i32 %16
}

LLVM IR (-O2):
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void netdata_cleanup_and_exit(int ret) { exit(ret); }


x86 assembly (clang, -O0):
<netdata_cleanup_and_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<netdata_cleanup_and_exit>:
push   %rax
call   1030 <exit@plt>

LLVM IR (-O0):
define void @netdata_cleanup_and_exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
define void @netdata_cleanup_and_exit(i32 %0) {
%2 = tail call i32 @exit(i32 %0)
unreachable
}
/* Variables and functions */
int const optind;
char *get_argv_str(char **argv, const int index) {
  return argv[index + optind];
}


x86 assembly (clang, -O0):
<get_argv_str>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    0x2ecf(%rip),%rdx
add    (%rdx),%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,8),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_argv_str>:
movslq %esi,%rax
mov    (%rdi,%rax,8),%rax
ret

LLVM IR (-O0):
@optind = constant i32 0
define i8* @get_argv_str(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
%5 = load i8**, i8*** %3
%6 = load i32, i32* %4
%7 = load i32, i32* @optind
%8 = add nsw i32 %6, %7
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8*, i8** %5, i64 %9
%11 = load i8*, i8** %10
ret i8* %11
}

LLVM IR (-O2):
@optind = constant i32 0
define i8* @get_argv_str(i8** nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i8*, i8** %0, i64 %3
%5 = load i8*, i8** %4
ret i8* %5
}
char *stb_plural(int n) { return n == 1 ? "" : "s"; }


x86 assembly (clang, -O0):
<stb_plural>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xeef(%rip),%rax
lea    0xee9(%rip),%rcx
cmp    $0x1,%edx
cmove  %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stb_plural>:
cmp    $0x1,%edi
lea    0xef7(%rip),%rcx
lea    0xeef(%rip),%rax
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
@.str.1 = [2 x i8] c"s\00"
define i8* @stb_plural(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1
%5 = zext i1 %4 to i64
%6 = select i1 %4, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0)
ret i8* %6
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
@.str.1 = [2 x i8] c"s\00"
define i8* @stb_plural(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = select i1 %2, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ sd_notify(int /*<<< orphan*/, char *);
int /*<<< orphan*/ sleep(int);
int main(int argc, char *argv[]) {
  sd_notify(0, "STATUS=Starting up");
  sleep(5);
  sd_notify(0, "STATUS=Running\n"
               "READY=1");
  sleep(10);
  sd_notify(0, "STATUS=Quitting");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
lea    0xec1(%rip),%rsi
call   1030 <sd_notify@plt>
mov    $0x5,%edi
call   1040 <sleep@plt>
xor    %edi,%edi
lea    0xebc(%rip),%rsi
call   1030 <sd_notify@plt>
mov    $0xa,%edi
call   1040 <sleep@plt>
xor    %edi,%edi
lea    0xebb(%rip),%rsi
call   1030 <sd_notify@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rsi
xor    %edi,%edi
call   1030 <sd_notify@plt>
mov    $0x5,%edi
call   1040 <sleep@plt>
lea    0xed3(%rip),%rsi
xor    %edi,%edi
call   1030 <sd_notify@plt>
mov    $0xa,%edi
call   1040 <sleep@plt>
lea    0xed2(%rip),%rsi
xor    %edi,%edi
call   1030 <sd_notify@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"STATUS=Starting up\00"
@.str.1 = [23 x i8] c"STATUS=Running\0AREADY=1\00"
@.str.2 = [16 x i8] c"STATUS=Quitting\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @sd_notify(i32 0, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @sleep(i32 5)
%8 = call i32 @sd_notify(i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0))
%9 = call i32 @sleep(i32 10)
%10 = call i32 @sd_notify(i32 0, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [19 x i8] c"STATUS=Starting up\00"
@.str.1 = [23 x i8] c"STATUS=Running\0AREADY=1\00"
@.str.2 = [16 x i8] c"STATUS=Quitting\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @sd_notify(i32 0, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @sleep(i32 5)
%5 = tail call i32 @sd_notify(i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0))
%6 = tail call i32 @sleep(i32 10)
%7 = tail call i32 @sd_notify(i32 0, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}
int roundi(int x) {
  return x >= 0 ? (x + (1 << 14)) >> 15 : -((-x + (1 << 14)) >> 15);
}


x86 assembly (clang, -O0):
<roundi>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     1124 <roundi+0x24>
mov    -0x4(%rbp),%eax
add    $0x4000,%eax
sar    $0xf,%eax
mov    %eax,-0x8(%rbp)
jmp    1139 <roundi+0x39>
xor    %ecx,%ecx
sub    -0x4(%rbp),%ecx
add    $0x4000,%ecx
sar    $0xf,%ecx
xor    %eax,%eax
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<roundi>:
mov    %edi,%eax
test   %edi,%edi
js     110f <roundi+0xf>
add    $0x4000,%eax
shr    $0xf,%eax
ret
mov    $0x4000,%ecx
sub    %eax,%ecx
sar    $0xf,%ecx
neg    %ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @roundi(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* %2
%7 = add nsw i32 %6, 16384
%8 = ashr i32 %7, 15
br label %15
9: ; preds = %1
%10 = load i32, i32* %2
%11 = sub nsw i32 0, %10
%12 = add nsw i32 %11, 16384
%13 = ashr i32 %12, 15
%14 = sub nsw i32 0, %13
br label %15
15: ; preds = %9, %5
%16 = phi i32 [ %8, %5 ], [ %14, %9 ]
ret i32 %16
}

LLVM IR (-O2):
define i32 @roundi(i32 %0) {
%2 = icmp sgt i32 %0, -1
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = add nuw nsw i32 %0, 16384
%5 = lshr i32 %4, 15
br label %10
6: ; preds = %1
%7 = sub i32 16384, %0
%8 = ashr i32 %7, 15
%9 = sub nsw i32 0, %8
br label %10
10: ; preds = %6, %3
%11 = phi i32 [ %5, %3 ], [ %9, %6 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void display_usage(void) {
  fprintf(stderr, "\nProper Usage is: ");
  fprintf(stderr, "\n\nlist_it filename.ext\n");
}


x86 assembly (clang, -O0):
<display_usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
lea    0xeda(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_usage>:
push   %rbx
mov    0x2ec8(%rip),%rbx
mov    (%rbx),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xee4(%rip),%rsi
pop    %rbx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [19 x i8] c"\0AProper Usage is: \00"
@.str.1 = [24 x i8] c"\0A\0Alist_it filename.ext\0A\00"
define void @display_usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [19 x i8] c"\0AProper Usage is: \00"
@.str.1 = [24 x i8] c"\0A\0Alist_it filename.ext\0A\00"
define void @display_usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0))
ret void
}
unsigned int shift6(unsigned int a) { return a >> 6; }


x86 assembly (clang, -O0):
<shift6>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shift6>:
mov    %edi,%eax
shr    $0x6,%eax
ret

LLVM IR (-O0):
define i32 @shift6(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 6
ret i32 %4
}

LLVM IR (-O2):
define i32 @shift6(i32 %0) {
%2 = lshr i32 %0, 6
ret i32 %2
}
void test_caret_within_proper_range(void) {}


x86 assembly (clang, -O0):
<test_caret_within_proper_range>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_caret_within_proper_range>:
ret

LLVM IR (-O0):
define void @test_caret_within_proper_range() {
ret void
}

LLVM IR (-O2):
define void @test_caret_within_proper_range() {
ret void
}