xunge/DecIR huggingface dataset:
int int_ops_rol(unsigned int l, int r) { return (l << r) | (l >> (32 - r)); }


x86 assembly (clang, -O0):
<int_ops_rol>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
mov    $0x20,%ecx
sub    -0x8(%rbp),%ecx
shr    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_ops_rol>:
mov    %esi,%ecx
mov    %edi,%eax
rol    %cl,%eax
ret

LLVM IR (-O0):
define i32 @int_ops_rol(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sub nsw i32 32, %9
%11 = lshr i32 %8, %10
%12 = or i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @int_ops_rol(i32 %0, i32 %1) {
%3 = shl i32 %0, %1
%4 = sub nsw i32 32, %1
%5 = lshr i32 %0, %4
%6 = or i32 %5, %3
ret i32 %6
}
/* Variables and functions */
int roadmap_city_read_file(char *);
void roadmap_square_load_index(void) {
  int rc;
  rc = roadmap_city_read_file("city_index");
  if (!rc)
    return;
}


x86 assembly (clang, -O0):
<roadmap_square_load_index>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <roadmap_city_read_file@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1136 <roadmap_square_load_index+0x26>
jmp    1136 <roadmap_square_load_index+0x26>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<roadmap_square_load_index>:
lea    0xee9(%rip),%rdi
jmp    1030 <roadmap_city_read_file@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"city_index\00"
define void @roadmap_square_load_index() {
%1 = alloca i32
%2 = call i32 @roadmap_city_read_file(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp ne i32 %3, 0
br i1 %4, label %6, label %5
5: ; preds = %0
br label %6
6: ; preds = %5, %0
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"city_index\00"
define void @roadmap_square_load_index() {
%1 = tail call i32 @roadmap_city_read_file(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int btor_next_power_of_2_util(int x) {
  int i;
  assert(x > 0);
  x--;
  for (i = 1; i < (int)sizeof(int) * 8; i *= 2)
    x = x | (x >> i);
  return x + 1;
}


x86 assembly (clang, -O0):
<btor_next_power_of_2_util>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x20,-0x8(%rbp)
jge    1166 <btor_next_power_of_2_util+0x56>
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    113c <btor_next_power_of_2_util+0x2c>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<btor_next_power_of_2_util>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
test   %ebx,%ebx
setg   %dil
call   1030 <assert@plt>
add    $0xffffffff,%ebx
mov    %ebx,%eax
sar    %eax
or     %ebx,%eax
mov    %eax,%ecx
sar    $0x2,%ecx
or     %eax,%ecx
mov    %ecx,%eax
sar    $0x4,%eax
or     %ecx,%eax
mov    %eax,%ecx
sar    $0x8,%ecx
or     %eax,%ecx
mov    %ecx,%eax
sar    $0x10,%eax
or     %ecx,%eax
add    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @btor_next_power_of_2_util(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp sgt i32 %4, 0
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
%8 = load i32, i32* %2
%9 = add nsw i32 %8, -1
store i32 %9, i32* %2
store i32 1, i32* %3
br label %10
10: ; preds = %19, %1
%11 = load i32, i32* %3
%12 = icmp slt i32 %11, 32
br i1 %12, label %13, label %22
13: ; preds = %10
%14 = load i32, i32* %2
%15 = load i32, i32* %2
%16 = load i32, i32* %3
%17 = ashr i32 %15, %16
%18 = or i32 %14, %17
store i32 %18, i32* %2
br label %19
19: ; preds = %13
%20 = load i32, i32* %3
%21 = mul nsw i32 %20, 2
store i32 %21, i32* %3
br label %10
22: ; preds = %10
%23 = load i32, i32* %2
%24 = add nsw i32 %23, 1
ret i32 %24
}

LLVM IR (-O2):
define i32 @btor_next_power_of_2_util(i32 %0) {
%2 = icmp sgt i32 %0, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = add nsw i32 %0, -1
%6 = ashr i32 %5, 1
%7 = or i32 %6, %5
%8 = ashr i32 %7, 2
%9 = or i32 %8, %7
%10 = ashr i32 %9, 4
%11 = or i32 %10, %9
%12 = ashr i32 %11, 8
%13 = or i32 %12, %11
%14 = ashr i32 %13, 16
%15 = or i32 %14, %13
%16 = add nsw i32 %15, 1
ret i32 %16
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int celcon_track_standard_solution_path(int k, int i, int otp) {
  int b[2], fail;
  double *c;
  b[0] = i;
  b[1] = otp;
  fail = _ada_use_c2phc4c(103, &k, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<celcon_track_standard_solution_path>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
lea    -0x14(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x67,%edi
lea    -0x4(%rbp),%rsi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<celcon_track_standard_solution_path>:
sub    $0x18,%rsp
mov    %edi,0xc(%rsp)
mov    %esi,0x10(%rsp)
mov    %edx,0x14(%rsp)
lea    0xc(%rsp),%rsi
lea    0x10(%rsp),%rdx
mov    $0x67,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @celcon_track_standard_solution_path(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca [2 x i32]
%8 = alloca i32
%9 = alloca double*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%10 = load i32, i32* %5
%11 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 0
store i32 %10, i32* %11
%12 = load i32, i32* %6
%13 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 1
store i32 %12, i32* %13
%14 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 0
%15 = load double*, double** %9
%16 = call i32 @_ada_use_c2phc4c(i32 103, i32* %4, i32* %14, double* %15, i32 0)
store i32 %16, i32* %8
%17 = load i32, i32* %8
ret i32 %17
}

LLVM IR (-O2):
define i32 @celcon_track_standard_solution_path(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca [2 x i32]
store i32 %0, i32* %4
%6 = bitcast [2 x i32]* %5 to i8*
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %5, i64 0, i64 0
store i32 %1, i32* %7
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %5, i64 0, i64 1
store i32 %2, i32* %8
%9 = call i32 @_ada_use_c2phc4c(i32 103, i32* %4, i32* %7, double* undef, i32 0)
ret i32 %9
}
/* Variables and functions */
scalar_t__ islower(int);
int toupper(int c) { return (islower(c) ? (c - 'a' + 'A') : (c)); }


x86 assembly (clang, -O0):
<toupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
je     113e <toupper+0x2e>
mov    -0x4(%rbp),%eax
sub    $0x61,%eax
add    $0x41,%eax
mov    %eax,-0x8(%rbp)
jmp    1144 <toupper+0x34>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toupper>:
push   %rbx
mov    %edi,%ebx
call   1030 <islower@plt>
lea    -0x20(%rbx),%ecx
test   %rax,%rax
cmove  %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @toupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @islower(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 97
%9 = add nsw i32 %8, 65
br label %12
10: ; preds = %1
%11 = load i32, i32* %2
br label %12
12: ; preds = %10, %6
%13 = phi i32 [ %9, %6 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @toupper(i32 %0) {
%2 = tail call i64 @islower(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = add nsw i32 %0, -32
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
/* Type definitions */
typedef int u_int8_t;
typedef int u_int16_t;

/* Variables and functions */
u_int8_t esum(u_int8_t a, u_int8_t b) {
  u_int16_t s = a + b;
  if (s > 255)
    return 255;
  return s;
}


x86 assembly (clang, -O0):
<esum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
cmpl   $0xff,-0x10(%rbp)
jle    112c <esum+0x2c>
movl   $0xff,-0x4(%rbp)
jmp    1132 <esum+0x32>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<esum>:
lea    (%rdi,%rsi,1),%ecx
cmp    $0xff,%ecx
mov    $0xff,%eax
cmovl  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @esum(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = add nsw i32 %7, %8
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp sgt i32 %10, 255
br i1 %11, label %12, label %13
12: ; preds = %2
store i32 255, i32* %3
br label %15
13: ; preds = %2
%14 = load i32, i32* %6
store i32 %14, i32* %3
br label %15
15: ; preds = %13, %12
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @esum(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
%4 = icmp slt i32 %3, 255
%5 = select i1 %4, i32 %3, i32 255
ret i32 %5
}
/* Variables and functions */
float __nv_fdiv_rz(float, float);
float __fdiv_rz(float __a, float __b) { return __nv_fdiv_rz(__a, __b); }


x86 assembly (clang, -O0):
<__fdiv_rz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <__nv_fdiv_rz@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__fdiv_rz>:
jmp    1030 <__nv_fdiv_rz@plt>

LLVM IR (-O0):
define float @__fdiv_rz(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call float @__nv_fdiv_rz(float %5, float %6)
ret float %7
}

LLVM IR (-O2):
define float @__fdiv_rz(float %0, float %1) {
%3 = tail call float @__nv_fdiv_rz(float %0, float %1)
ret float %3
}
int main() {
  char a[100];
  __builtin___clear_cache(a, a + 100);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [100 x i8]
store i32 0, i32* %1
%3 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%4 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%5 = getelementptr inbounds i8, i8* %4, i64 100
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [100 x i8]
%2 = getelementptr inbounds [100 x i8], [100 x i8]* %1, i64 0, i64 0
%3 = getelementptr inbounds [100 x i8], [100 x i8]* %1, i64 0, i64 100
ret i32 0
}
int __attribute__((no)) bar(const char **x) { return *(*x)++; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    (%rcx),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,(%rcx)
movsbl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
mov    (%rdi),%rax
lea    0x1(%rax),%rcx
mov    %rcx,(%rdi)
movsbl (%rax),%eax
ret

LLVM IR (-O0):
define i32 @bar(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8, i8* %4, i32 1
store i8* %5, i8** %3
%6 = load i8, i8* %4
%7 = sext i8 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @bar(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = getelementptr inbounds i8, i8* %2, i64 1
store i8* %3, i8** %0
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
ret i32 %5
}
int compare_ele(void *ele, int i) {
  int *elements = (int *)ele;
  if (((i % elements[0]) == 0) || ((i % elements[1]) == 0)) {
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<compare_ele>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x20(%rbp),%rcx
cltd
idivl  (%rcx)
cmp    $0x0,%edx
je     113a <compare_ele+0x3a>
mov    -0x14(%rbp),%eax
mov    -0x20(%rbp),%rcx
cltd
idivl  0x4(%rcx)
cmp    $0x0,%edx
jne    1146 <compare_ele+0x46>
movl   $0x0,-0x4(%rbp)
jmp    114d <compare_ele+0x4d>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_ele>:
mov    %esi,%eax
cltd
idivl  (%rdi)
test   %edx,%edx
je     1117 <compare_ele+0x17>
mov    %esi,%eax
cltd
idivl  0x4(%rdi)
xor    %eax,%eax
test   %edx,%edx
setne  %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @compare_ele(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32*
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i8*, i8** %4
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %6
%9 = load i32, i32* %5
%10 = load i32*, i32** %6
%11 = getelementptr inbounds i32, i32* %10, i64 0
%12 = load i32, i32* %11
%13 = srem i32 %9, %12
%14 = icmp eq i32 %13, 0
br i1 %14, label %22, label %15
15: ; preds = %2
%16 = load i32, i32* %5
%17 = load i32*, i32** %6
%18 = getelementptr inbounds i32, i32* %17, i64 1
%19 = load i32, i32* %18
%20 = srem i32 %16, %19
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %23
22: ; preds = %15, %2
store i32 0, i32* %3
br label %24
23: ; preds = %15
store i32 1, i32* %3
br label %24
24: ; preds = %23, %22
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @compare_ele(i8* nocapture %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = srem i32 %1, %4
%6 = icmp eq i32 %5, 0
br i1 %6, label %14, label %7
7: ; preds = %2
%8 = getelementptr inbounds i8, i8* %0, i64 4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = srem i32 %1, %10
%12 = icmp ne i32 %11, 0
%13 = zext i1 %12 to i32
br label %14
14: ; preds = %7, %2
%15 = phi i32 [ 0, %2 ], [ %13, %7 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ stack_test_3();
int stack_test_4() {
  stack_test_3();
  return 0;
}


x86 assembly (clang, -O0):
<stack_test_4>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <stack_test_3@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stack_test_4>:
push   %rax
xor    %eax,%eax
call   1030 <stack_test_3@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @stack_test_4() {
%1 = call i32 (...) @stack_test_3()
ret i32 0
}

LLVM IR (-O2):
define i32 @stack_test_4() {
%1 = tail call i32 (...) @stack_test_3()
ret i32 0
}
/* Variables and functions */
long choose(long, long);
long _LargestV(long a, long b, long x) {
  long v = a - 1;
  while (choose(v, b) > x) {
    --v;
  }
  return v;
}


x86 assembly (clang, -O0):
<_LargestV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
sub    $0x1,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <choose@plt>
cmp    -0x18(%rbp),%rax
jle    1158 <_LargestV+0x48>
mov    -0x20(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x20(%rbp)
jmp    1130 <_LargestV+0x20>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_LargestV>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
xchg   %ax,%ax
add    $0xffffffffffffffff,%rbx
mov    %rbx,%rdi
mov    %r15,%rsi
call   1030 <choose@plt>
cmp    %r14,%rax
jg     1120 <_LargestV+0x10>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @_LargestV(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%8 = load i64, i64* %4
%9 = sub nsw i64 %8, 1
store i64 %9, i64* %7
br label %10
10: ; preds = %16, %3
%11 = load i64, i64* %7
%12 = load i64, i64* %5
%13 = call i64 @choose(i64 %11, i64 %12)
%14 = load i64, i64* %6
%15 = icmp sgt i64 %13, %14
br i1 %15, label %16, label %19
16: ; preds = %10
%17 = load i64, i64* %7
%18 = add nsw i64 %17, -1
store i64 %18, i64* %7
br label %10
19: ; preds = %10
%20 = load i64, i64* %7
ret i64 %20
}

LLVM IR (-O2):
define i64 @_LargestV(i64 %0, i64 %1, i64 %2) {
br label %4
4: ; preds = %4, %3
%5 = phi i64 [ %0, %3 ], [ %6, %4 ]
%6 = add nsw i64 %5, -1
%7 = tail call i64 @choose(i64 %6, i64 %1)
%8 = icmp sgt i64 %7, %2
br i1 %8, label %4, label %9
9: ; preds = %4
ret i64 %6
}
/* Variables and functions */
int /*<<< orphan*/ motion_set(int);
void soft_left(void) { motion_set(0x04); }


x86 assembly (clang, -O0):
<soft_left>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
call   1030 <motion_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<soft_left>:
mov    $0x4,%edi
jmp    1030 <motion_set@plt>

LLVM IR (-O0):
define void @soft_left() {
%1 = call i32 @motion_set(i32 4)
ret void
}

LLVM IR (-O2):
define void @soft_left() {
%1 = tail call i32 @motion_set(i32 4)
ret void
}
/* Variables and functions */
int access(char const *, int);
int xaccess(const char *pathname, int mode) {
  int ret;
  ret = access(pathname, mode);
  return (ret);
}


x86 assembly (clang, -O0):
<xaccess>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <access@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xaccess>:
jmp    1030 <access@plt>

LLVM IR (-O0):
define i32 @xaccess(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @access(i8* %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @xaccess(i8* nocapture %0, i32 %1) {
%3 = tail call i32 @access(i8* %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ flush_binlog_ts();
int /*<<< orphan*/ printf(char *);
void sigterm_handler(const int sig) {
  printf("SIGTERM handled.\n");
  flush_binlog_ts();
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<sigterm_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <flush_binlog_ts@plt>
mov    0x2e8b(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<sigterm_handler>:
push   %rax
lea    0xec8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <flush_binlog_ts@plt>
mov    0x2e95(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"SIGTERM handled.\0A\00"
@EXIT_SUCCESS = global i32 0
define void @sigterm_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%4 = call i32 (...) @flush_binlog_ts()
%5 = load i32, i32* @EXIT_SUCCESS
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
@str = [17 x i8] c"SIGTERM handled.\00"
define void @sigterm_handler(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 (...) @flush_binlog_ts()
%4 = load i32, i32* @EXIT_SUCCESS
%5 = tail call i32 @exit(i32 %4)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ k_free_cmatrix(char **, int, int);
void k_strfree(char **str, int nwrd) { k_free_cmatrix(str, nwrd, 255 + 1); }


x86 assembly (clang, -O0):
<k_strfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    $0x100,%edx
call   1030 <k_free_cmatrix@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<k_strfree>:
mov    $0x100,%edx
jmp    1030 <k_free_cmatrix@plt>

LLVM IR (-O0):
define void @k_strfree(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
%5 = load i8**, i8*** %3
%6 = load i32, i32* %4
%7 = call i32 @k_free_cmatrix(i8** %5, i32 %6, i32 256)
ret void
}

LLVM IR (-O2):
define void @k_strfree(i8** %0, i32 %1) {
%3 = tail call i32 @k_free_cmatrix(i8** %0, i32 %1, i32 256)
ret void
}
int isLeapYearOneLine(int year) {
  return (year % 4) == 0 && ((year % 400) == 0 || (year % 100) != 0);
}


x86 assembly (clang, -O0):
<isLeapYearOneLine>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
xor    %eax,%eax
cmp    $0x0,%edx
mov    %al,-0x5(%rbp)
jne    1153 <isLeapYearOneLine+0x53>
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
mov    $0x1,%al
cmp    $0x0,%edx
mov    %al,-0x6(%rbp)
je     114d <isLeapYearOneLine+0x4d>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
setne  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isLeapYearOneLine>:
xor    %eax,%eax
test   $0x3,%dil
je     1109 <isLeapYearOneLine+0x9>
ret
imul   $0xc28f5c29,%edi,%ecx
add    $0x51eb850,%ecx
mov    %ecx,%eax
ror    $0x4,%eax
cmp    $0xa3d70b,%eax
jb     1130 <isLeapYearOneLine+0x30>
ror    $0x2,%ecx
xor    %eax,%eax
cmp    $0x28f5c29,%ecx
setae  %al
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isLeapYearOneLine(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 4
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %16
6: ; preds = %1
%7 = load i32, i32* %2
%8 = srem i32 %7, 400
%9 = icmp eq i32 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = srem i32 %11, 100
%13 = icmp ne i32 %12, 0
br label %14
14: ; preds = %10, %6
%15 = phi i1 [ true, %6 ], [ %13, %10 ]
br label %16
16: ; preds = %14, %1
%17 = phi i1 [ false, %1 ], [ %15, %14 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @isLeapYearOneLine(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = srem i32 %0, 400
%6 = icmp eq i32 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = srem i32 %0, 100
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %4, %7, %1
%12 = phi i32 [ 0, %1 ], [ 1, %4 ], [ %10, %7 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ __coverity_free__(void *);
int /*<<< orphan*/ __coverity_mark_as_afm_freed__(void *, char *);
void H5Dclose(void *id) {
  __coverity_free__(id);
  __coverity_mark_as_afm_freed__(id, "H5Dclose");
}


x86 assembly (clang, -O0):
<H5Dclose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <__coverity_free__@plt>
mov    -0x8(%rbp),%rdi
lea    0xec0(%rip),%rsi
call   1030 <__coverity_mark_as_afm_freed__@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<H5Dclose>:
push   %rbx
mov    %rdi,%rbx
call   1040 <__coverity_free__@plt>
lea    0xed0(%rip),%rsi
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <__coverity_mark_as_afm_freed__@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"H5Dclose\00"
define void @H5Dclose(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @__coverity_free__(i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @__coverity_mark_as_afm_freed__(i8* %5, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"H5Dclose\00"
define void @H5Dclose(i8* %0) {
%2 = tail call i32 @__coverity_free__(i8* %0)
%3 = tail call i32 @__coverity_mark_as_afm_freed__(i8* %0, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}
int ld_ge_rr2(long double a1, long double a2) { return !(((a1) >= (a2))); }


x86 assembly (clang, -O0):
<ld_ge_rr2>:
push   %rbp
mov    %rsp,%rbp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
fxch   %st(1)
fucomip %st(1),%st
fstp   %st(0)
setae  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ld_ge_rr2>:
fldt   0x18(%rsp)
fldt   0x8(%rsp)
xor    %eax,%eax
fucomip %st(1),%st
fstp   %st(0)
setb   %al
ret

LLVM IR (-O0):
define i32 @ld_ge_rr2(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %4
%7 = fcmp oge x86_fp80 %5, %6
%8 = xor i1 %7, true
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @ld_ge_rr2(x86_fp80 %0, x86_fp80 %1) {
%3 = fcmp ult x86_fp80 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int a, n, p;
  scanf("%d", &a);
  p = a * a;
  n = a * a * a;
  printf("%d\n", p);
  printf("%d\n", n);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%esi
lea    0xea9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%esi
lea    0xe9a(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0xed5(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%ebx
mov    %ebx,%esi
imul   %ebx,%esi
imul   %esi,%ebx
lea    0xebb(%rip),%r14
mov    %r14,%rdi
call   1030 <printf@plt>
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = load i32, i32* %1
%7 = mul nsw i32 %5, %6
store i32 %7, i32* %3
%8 = load i32, i32* %1
%9 = load i32, i32* %1
%10 = mul nsw i32 %8, %9
%11 = load i32, i32* %1
%12 = mul nsw i32 %10, %11
store i32 %12, i32* %2
%13 = load i32, i32* %3
%14 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %13)
%15 = load i32, i32* %2
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %15)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = mul nsw i32 %4, %4
%6 = mul nsw i32 %5, %4
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %5)
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret i32 0
}
int xmm6262_init_modemctl_device(struct modem_ctl *mc,
                                 struct modem_data *pdata) {
  return 0;
}


x86 assembly (clang, -O0):
<xmm6262_init_modemctl_device>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmm6262_init_modemctl_device>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.modem_ctl = type opaque
%struct.modem_data = type opaque
define i32 @xmm6262_init_modemctl_device(%struct.modem_ctl* %0, %struct.modem_data* %1) {
%3 = alloca %struct.modem_ctl*
%4 = alloca %struct.modem_data*
store %struct.modem_ctl* %0, %struct.modem_ctl** %3
store %struct.modem_data* %1, %struct.modem_data** %4
ret i32 0
}

LLVM IR (-O2):
%struct.modem_ctl = type opaque
%struct.modem_data = type opaque
define i32 @xmm6262_init_modemctl_device(%struct.modem_ctl* nocapture readnone %0, %struct.modem_data* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int write_whitney(int, int);
int LLI2C_init(void) {
  int err;
  {}
  err = write_whitney(0x5014, 0x0505);
  if (err)
    return err;
  err = write_whitney(0x5014, 0x0000);
  if (err)
    return err;
  return 0;
}


x86 assembly (clang, -O0):
<LLI2C_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x5014,%edi
mov    $0x505,%esi
call   1030 <write_whitney@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     113f <LLI2C_init+0x2f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    116a <LLI2C_init+0x5a>
mov    $0x5014,%edi
xor    %esi,%esi
call   1030 <write_whitney@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1163 <LLI2C_init+0x53>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    116a <LLI2C_init+0x5a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LLI2C_init>:
push   %rax
mov    $0x5014,%edi
mov    $0x505,%esi
call   1030 <write_whitney@plt>
test   %eax,%eax
je     1126 <LLI2C_init+0x16>
pop    %rcx
ret
mov    $0x5014,%edi
xor    %esi,%esi
pop    %rax
jmp    1030 <write_whitney@plt>

LLVM IR (-O0):
define i32 @LLI2C_init() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 @write_whitney(i32 20500, i32 1285)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = load i32, i32* %2
store i32 %7, i32* %1
br label %15
8: ; preds = %0
%9 = call i32 @write_whitney(i32 20500, i32 0)
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = load i32, i32* %2
store i32 %13, i32* %1
br label %15
14: ; preds = %8
store i32 0, i32* %1
br label %15
15: ; preds = %14, %12, %6
%16 = load i32, i32* %1
ret i32 %16
}

LLVM IR (-O2):
define i32 @LLI2C_init() {
%1 = tail call i32 @write_whitney(i32 20500, i32 1285)
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @write_whitney(i32 20500, i32 0)
br label %5
5: ; preds = %3, %0
%6 = phi i32 [ %1, %0 ], [ %4, %3 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void f1() { printf("Hello world\n"); }


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"Hello world\0A\00"
define void @f1() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [12 x i8] c"Hello world\00"
define void @f1() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int prv_test_encode_imm();
int prv_test_mov_imm();
int fpa_test(void) {
  int retval;
  retval = prv_test_encode_imm();
  retval |= prv_test_mov_imm();
  return retval;
}


x86 assembly (clang, -O0):
<fpa_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <prv_test_encode_imm@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <prv_test_mov_imm@plt>
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fpa_test>:
push   %rbx
xor    %eax,%eax
call   1040 <prv_test_encode_imm@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <prv_test_mov_imm@plt>
or     %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @fpa_test() {
%1 = alloca i32
%2 = call i32 (...) @prv_test_encode_imm()
store i32 %2, i32* %1
%3 = call i32 (...) @prv_test_mov_imm()
%4 = load i32, i32* %1
%5 = or i32 %4, %3
store i32 %5, i32* %1
%6 = load i32, i32* %1
ret i32 %6
}

LLVM IR (-O2):
define i32 @fpa_test() {
%1 = tail call i32 (...) @prv_test_encode_imm()
%2 = tail call i32 (...) @prv_test_mov_imm()
%3 = or i32 %2, %1
ret i32 %3
}
void ICRunload(void) {}


x86 assembly (clang, -O0):
<ICRunload>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ICRunload>:
ret

LLVM IR (-O0):
define void @ICRunload() {
ret void
}

LLVM IR (-O2):
define void @ICRunload() {
ret void
}
void sync_set_bit(int nr, volatile unsigned long *addr) {
  __asm__ __volatile__("lock; btsl %1,%0"
                       : "+m"((*(volatile long *)addr))
                       : "Ir"(nr)
                       : "memory");
}


x86 assembly (clang, -O0):
<sync_set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
lock bts %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sync_set_bit>:
lock bts %edi,(%rsi)
ret

LLVM IR (-O0):
define void @sync_set_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
%6 = load i32, i32* %3
ret void
}

LLVM IR (-O2):
define void @sync_set_bit(i32 %0, i64* %1) {
tail call void asm sideeffect "lock; btsl $1,$0", "=*m,Ir,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %1, i32 %0, i64* elementtype(i64) %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
double sqrt(double);
int main() {
  double a = 3, b = 8, c = 4;
  double y = (-b + sqrt(b * b - 4 * a * c)) / (2 * a);
  printf("y = %.3f \n", y);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
movsd  0xee1(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xecc(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xeb7(%rip),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm2
movsd  0xe7f(%rip),%xmm1
mulsd  -0x10(%rbp),%xmm1
mulsd  -0x20(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
call   1040 <sqrt@plt>
movaps %xmm0,%xmm1
movsd  -0x30(%rbp),%xmm0
addsd  %xmm1,%xmm0
movsd  0xe35(%rip),%xmm1
mulsd  -0x10(%rbp),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
lea    0xe3b(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xef0(%rip),%rdi
movsd  0xee0(%rip),%xmm0
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"y = %.3f \0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca double
%4 = alloca double
%5 = alloca double
store i32 0, i32* %1
store double 3.000000e+00, double* %2
store double 8.000000e+00, double* %3
store double 4.000000e+00, double* %4
%6 = load double, double* %3
%7 = fneg double %6
%8 = load double, double* %3
%9 = load double, double* %3
%10 = load double, double* %2
%11 = fmul double 4.000000e+00, %10
%12 = load double, double* %4
%13 = fmul double %11, %12
%14 = fneg double %13
%15 = call double @llvm.fmuladd.f64(double %8, double %9, double %14)
%16 = call double @sqrt(double %15)
%17 = fadd double %7, %16
%18 = load double, double* %2
%19 = fmul double 2.000000e+00, %18
%20 = fdiv double %17, %19
store double %20, double* %5
%21 = load double, double* %5
%22 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), double %21)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"y = %.3f \0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), double 0xBFE5555555555555)
ret i32 0
}
int spi_dataread(void *hDevice, unsigned short addr, unsigned char command,
                 unsigned char *data, unsigned int length) {
  return 0;
}


x86 assembly (clang, -O0):
<spi_dataread>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %si,%dx
mov    %rdi,-0x8(%rbp)
mov    %dx,-0xa(%rbp)
mov    %al,-0xb(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_dataread>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @spi_dataread(i8* %0, i16 zeroext %1, i8 zeroext %2, i8* %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i16
%8 = alloca i8
%9 = alloca i8*
%10 = alloca i32
store i8* %0, i8** %6
store i16 %1, i16* %7
store i8 %2, i8* %8
store i8* %3, i8** %9
store i32 %4, i32* %10
ret i32 0
}

LLVM IR (-O2):
define i32 @spi_dataread(i8* nocapture readnone %0, i16 zeroext %1, i8 zeroext %2, i8* nocapture readnone %3, i32 %4) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ close_emit_section();
void backend_finalize() { close_emit_section(); }


x86 assembly (clang, -O0):
<backend_finalize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <close_emit_section@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<backend_finalize>:
xor    %eax,%eax
jmp    1030 <close_emit_section@plt>

LLVM IR (-O0):
define void @backend_finalize() {
%1 = call i32 (...) @close_emit_section()
ret void
}

LLVM IR (-O2):
define void @backend_finalize() {
%1 = tail call i32 (...) @close_emit_section()
ret void
}
int precision_p(double value) {
  if (value < 100)
    if (value < 10)
      return 3;
    else
      return 2;
  else if (value < 10000)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<precision_p>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  0xeef(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1147 <precision_p+0x47>
movsd  0xeec(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    113b <precision_p+0x3b>
movl   $0x3,-0x4(%rbp)
jmp    1172 <precision_p+0x72>
movl   $0x2,-0x4(%rbp)
jmp    1172 <precision_p+0x72>
movsd  0xeb9(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1166 <precision_p+0x66>
movl   $0x1,-0x4(%rbp)
jmp    1172 <precision_p+0x72>
jmp    116b <precision_p+0x6b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<precision_p>:
movsd  0xef8(%rip),%xmm1
xor    %ecx,%ecx
ucomisd %xmm0,%xmm1
seta   %cl
or     $0x2,%ecx
movsd  0xeec(%rip),%xmm1
xor    %eax,%eax
ucomisd %xmm0,%xmm1
seta   %al
movsd  0xee3(%rip),%xmm1
ucomisd %xmm0,%xmm1
cmova  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @precision_p(double %0) {
%2 = alloca i32
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp olt double %4, 1.000000e+02
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load double, double* %3
%8 = fcmp olt double %7, 1.000000e+01
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 3, i32* %2
br label %17
10: ; preds = %6
store i32 2, i32* %2
br label %17
11: ; preds = %1
%12 = load double, double* %3
%13 = fcmp olt double %12, 1.000000e+04
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 1, i32* %2
br label %17
15: ; preds = %11
br label %16
16: ; preds = %15
store i32 0, i32* %2
br label %17
17: ; preds = %16, %14, %10, %9
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @precision_p(double %0) {
%2 = fcmp olt double %0, 1.000000e+02
%3 = fcmp olt double %0, 1.000000e+01
%4 = select i1 %3, i32 3, i32 2
%5 = fcmp olt double %0, 1.000000e+04
%6 = zext i1 %5 to i32
%7 = select i1 %2, i32 %4, i32 %6
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int fchmod(int, int /*<<< orphan*/);
__attribute__((__weak__, __always___)) int softboundmpx_fchmod(int fd,
                                                               mode_t mode) {
  return fchmod(fd, mode);
}


x86 assembly (clang, -O0):
<softboundmpx_fchmod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <fchmod@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_fchmod>:
jmp    1030 <fchmod@plt>

LLVM IR (-O0):
define weak i32 @softboundmpx_fchmod(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @fchmod(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define weak i32 @softboundmpx_fchmod(i32 %0, i32 %1) {
%3 = tail call i32 @fchmod(i32 %0, i32 %1)
ret i32 %3
}
void sighandler(__attribute__((unused)) int signal) {}


x86 assembly (clang, -O0):
<sighandler>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sighandler>:
ret

LLVM IR (-O0):
define void @sighandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @sighandler(i32 %0) {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void ADCSequenceOverflowClear(uint32_t ui32Base, uint32_t ui32SequenceNum) {
  ;
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000010))) = 1 << ui32SequenceNum;
}


x86 assembly (clang, -O0):
<ADCSequenceOverflowClear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
add    $0x10,%eax
cltq
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCSequenceOverflowClear>:
mov    %esi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %edi,%rcx
mov    %eax,0x10(%rcx)
ret

LLVM IR (-O0):
define void @ADCSequenceOverflowClear(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 1, %5
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 16
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
store volatile i32 %6, i32* %10
ret void
}

LLVM IR (-O2):
define void @ADCSequenceOverflowClear(i32 %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = add nsw i32 %0, 16
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
store volatile i32 %3, i32* %6
ret void
}
/* Variables and functions */
int fsck_f2fs_main(int, char **);
int main(int argc, char **argv) { return fsck_f2fs_main(argc, argv); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <fsck_f2fs_main@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
jmp    1030 <fsck_f2fs_main@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @fsck_f2fs_main(i32 %6, i8** %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @fsck_f2fs_main(i32 %0, i8** %1)
ret i32 %3
}
const char *getfileseparator() {
  static const char *SEPARATOR = "/";
  return SEPARATOR;
}


x86 assembly (clang, -O0):
<getfileseparator>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f15(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getfileseparator>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@getfileseparator.SEPARATOR = internal global i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i32 0, i32 0)
@.str = [2 x i8] c"/\00"
define i8* @getfileseparator() {
%1 = load i8*, i8** @getfileseparator.SEPARATOR
ret i8* %1
}

LLVM IR (-O2):
@.str = [2 x i8] c"/\00"
define i8* @getfileseparator() {
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
}
unsigned long NextPow2(unsigned long x) {
  if (((x << 1) >> 1) != x)
    x >>= 1;
  while ((x & (x - 1)) != 0)
    x &= (x - 1);
  return x << 1;
}


x86 assembly (clang, -O0):
<NextPow2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x1,%rax
shr    $0x1,%rax
cmp    -0x8(%rbp),%rax
je     112a <NextPow2+0x2a>
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    112f <NextPow2+0x2f>
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    $0x1,%rcx
and    %rcx,%rax
cmp    $0x0,%rax
je     115d <NextPow2+0x5d>
mov    -0x8(%rbp),%rax
sub    $0x1,%rax
and    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    112f <NextPow2+0x2f>
mov    -0x8(%rbp),%rax
shl    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<NextPow2>:
mov    %rdi,%rcx
shr    $0x3f,%rcx
shr    %cl,%rdi
nopw   0x0(%rax,%rax,1)
mov    %rdi,%rax
add    $0xffffffffffffffff,%rdi
and    %rax,%rdi
jne    1110 <NextPow2+0x10>
add    %rax,%rax
ret

LLVM IR (-O0):
define i64 @NextPow2(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = shl i64 %3, 1
%5 = lshr i64 %4, 1
%6 = load i64, i64* %2
%7 = icmp ne i64 %5, %6
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i64, i64* %2
%10 = lshr i64 %9, 1
store i64 %10, i64* %2
br label %11
11: ; preds = %8, %1
br label %12
12: ; preds = %18, %11
%13 = load i64, i64* %2
%14 = load i64, i64* %2
%15 = sub i64 %14, 1
%16 = and i64 %13, %15
%17 = icmp ne i64 %16, 0
br i1 %17, label %18, label %23
18: ; preds = %12
%19 = load i64, i64* %2
%20 = sub i64 %19, 1
%21 = load i64, i64* %2
%22 = and i64 %21, %20
store i64 %22, i64* %2
br label %12
23: ; preds = %12
%24 = load i64, i64* %2
%25 = shl i64 %24, 1
ret i64 %25
}

LLVM IR (-O2):
define i64 @NextPow2(i64 %0) {
%2 = lshr i64 %0, 63
%3 = lshr i64 %0, %2
br label %4
4: ; preds = %4, %1
%5 = phi i64 [ %3, %1 ], [ %7, %4 ]
%6 = add i64 %5, -1
%7 = and i64 %6, %5
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4
%10 = shl i64 %5, 1
ret i64 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ __v2si;
typedef int /*<<< orphan*/ __m64;
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ __builtin_ia32_storelps(int /*<<< orphan*/ *,
                                           int /*<<< orphan*/);
void __attribute__((__always___)) _mm_storel_pi(__m64 *p, __m128 a) {
  __builtin_ia32_storelps((__v2si *)p, a);
}


x86 assembly (clang, -O0):
<_mm_storel_pi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <__builtin_ia32_storelps@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mm_storel_pi>:
jmp    1030 <__builtin_ia32_storelps@plt>

LLVM IR (-O0):
define void @_mm_storel_pi(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @__builtin_ia32_storelps(i32* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @_mm_storel_pi(i32* %0, i32 %1) {
%3 = tail call i32 @__builtin_ia32_storelps(i32* %0, i32 %1)
ret void
}