xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ elem(int, int *);
int notelem(int val, int myarray[5]) { return !elem(val, myarray); }


x86 assembly (clang, -O0):
<notelem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <elem@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<notelem>:
push   %rax
call   1030 <elem@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @notelem(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = call i32 @elem(i32 %5, i32* %6)
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @notelem(i32 %0, i32* %1) {
%3 = tail call i32 @elem(i32 %0, i32* %1)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
int test_imm_AAint64_midword_mem(long long *val) {
  return ((*val >> 16) & (0xAA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_AAint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0xaa,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_AAint64_midword_mem>:
testb  $0xaa,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_AAint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 170
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_AAint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 11141120
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void divide_v(int a, int b, int *quotient_p, int *remainder_p) {
  *quotient_p = a / b;
  *remainder_p = a % b;
}


x86 assembly (clang, -O0):
<divide_v>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    -0x18(%rbp),%rax
mov    %edx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<divide_v>:
mov    %rdx,%r8
mov    %edi,%eax
cltd
idiv   %esi
mov    %eax,(%r8)
mov    %edx,(%rcx)
ret

LLVM IR (-O0):
define void @divide_v(i32 %0, i32 %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = sdiv i32 %9, %10
%12 = load i32*, i32** %7
store i32 %11, i32* %12
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = srem i32 %13, %14
%16 = load i32*, i32** %8
store i32 %15, i32* %16
ret void
}

LLVM IR (-O2):
define void @divide_v(i32 %0, i32 %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3) {
%5 = sdiv i32 %0, %1
store i32 %5, i32* %2
%6 = srem i32 %0, %1
store i32 %6, i32* %3
ret void
}
/* Variables and functions */
int usleep(unsigned int);
int up_hostusleep(unsigned int usec) { return usleep(usec); }


x86 assembly (clang, -O0):
<up_hostusleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<up_hostusleep>:
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define i32 @up_hostusleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @usleep(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @up_hostusleep(i32 %0) {
%2 = tail call i32 @usleep(i32 %0)
ret i32 %2
}
int BPQSerialGetQCounts(unsigned int hDevice, unsigned long *RXCount,
                        unsigned long *TXCount) {
  return 0;
}


x86 assembly (clang, -O0):
<BPQSerialGetQCounts>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BPQSerialGetQCounts>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @BPQSerialGetQCounts(i32 %0, i64* %1, i64* %2) {
%4 = alloca i32
%5 = alloca i64*
%6 = alloca i64*
store i32 %0, i32* %4
store i64* %1, i64** %5
store i64* %2, i64** %6
ret i32 0
}

LLVM IR (-O2):
define i32 @BPQSerialGetQCounts(i32 %0, i64* nocapture readnone %1, i64* nocapture readnone %2) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "usage: yppoll [-d domain] [-h host] mapname\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [45 x i8] c"usage: yppoll [-d domain] [-h host] mapname\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [45 x i8] c"usage: yppoll [-d domain] [-h host] mapname\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
unsigned char inb(unsigned short port) {
  unsigned char _v;
  __asm__ __volatile__("inb %w1, %0" : "=a"(_v) : "Nd"(port));
  return _v;
}


x86 assembly (clang, -O0):
<inb>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%al
mov    %al,-0x3(%rbp)
movzbl -0x3(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inb>:
mov    %edi,%edx
in     (%dx),%al
ret

LLVM IR (-O0):
define zeroext i8 @inb(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i8
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i8 asm sideeffect "inb ${1:w}, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i8 %5, i8* %3
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @inb(i16 zeroext %0) {
%2 = tail call i8 asm sideeffect "inb ${1:w}, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i8 %2
}
/* Type definitions */
struct i_stat {
  int dummy;
};

/* Variables and functions */
int buscar_entrada(char *);
int /*<<< orphan*/ mi_stat_f(int, struct i_stat *);
int mi_stat(char *path, struct i_stat *p_stat) {
  int b;
  int i_inode = 0;
  i_inode = buscar_entrada(path);
  mi_stat_f(i_inode, p_stat);
}


x86 assembly (clang, -O0):
<mi_stat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movl   $0x0,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <buscar_entrada@plt>
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%edi
mov    -0x18(%rbp),%rsi
call   1040 <mi_stat_f@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mi_stat>:
push   %rbx
mov    %rsi,%rbx
call   1030 <buscar_entrada@plt>
mov    %eax,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <mi_stat_f@plt>

LLVM IR (-O0):
%struct.i_stat = type { i32 }
define i32 @mi_stat(i8* %0, %struct.i_stat* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca %struct.i_stat*
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store %struct.i_stat* %1, %struct.i_stat** %5
store i32 0, i32* %7
%8 = load i8*, i8** %4
%9 = call i32 @buscar_entrada(i8* %8)
store i32 %9, i32* %7
%10 = load i32, i32* %7
%11 = load %struct.i_stat*, %struct.i_stat** %5
%12 = call i32 @mi_stat_f(i32 %10, %struct.i_stat* %11)
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
%struct.i_stat = type { i32 }
define i32 @mi_stat(i8* %0, %struct.i_stat* %1) {
%3 = tail call i32 @buscar_entrada(i8* %0)
%4 = tail call i32 @mi_stat_f(i32 %3, %struct.i_stat* %1)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void printusage(void) {
  fprintf(stderr, "usage: tar [-cbkxntv] [-f archive] [file]...\n");
  exit(1);
}


x86 assembly (clang, -O0):
<printusage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<printusage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [46 x i8] c"usage: tar [-cbkxntv] [-f archive] [file]...\0A\00"
define void @printusage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [46 x i8] c"usage: tar [-cbkxntv] [-f archive] [file]...\0A\00"
define void @printusage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ WsfCsExit();
void WsfTaskUnlock(void) { WsfCsExit(); }


x86 assembly (clang, -O0):
<WsfTaskUnlock>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <WsfCsExit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<WsfTaskUnlock>:
xor    %eax,%eax
jmp    1030 <WsfCsExit@plt>

LLVM IR (-O0):
define void @WsfTaskUnlock() {
%1 = call i32 (...) @WsfCsExit()
ret void
}

LLVM IR (-O2):
define void @WsfTaskUnlock() {
%1 = tail call i32 (...) @WsfCsExit()
ret void
}
/* Variables and functions */
char *convcharsreal(char *, char *, int /*<<< orphan*/);
char *convcharsnospamprotect(char *line, char *charset) {
  return convcharsreal(line, charset, 0);
}


x86 assembly (clang, -O0):
<convcharsnospamprotect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <convcharsreal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<convcharsnospamprotect>:
xor    %edx,%edx
jmp    1030 <convcharsreal@plt>

LLVM IR (-O0):
define i8* @convcharsnospamprotect(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @convcharsreal(i8* %5, i8* %6, i32 0)
ret i8* %7
}

LLVM IR (-O2):
define i8* @convcharsnospamprotect(i8* %0, i8* %1) {
%3 = tail call i8* @convcharsreal(i8* %0, i8* %1, i32 0)
ret i8* %3
}
void k_hdr_include(int socket, int bool) {}


x86 assembly (clang, -O0):
<k_hdr_include>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<k_hdr_include>:
ret

LLVM IR (-O0):
define void @k_hdr_include(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @k_hdr_include(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ do_y_filter32(int *, int *, int, int, int *, int, int);
int gradY32(int *src, int *dst, int w, int h) {
  int mask[3] = {-1, 0, 1};
  do_y_filter32(src, dst, w, h, mask, 3, 1);
  return 1;
}


x86 assembly (clang, -O0):
<gradY32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    0xed3(%rip),%rax
mov    %rax,-0x24(%rbp)
mov    0xed1(%rip),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
lea    -0x24(%rbp),%r8
mov    $0x3,%r9d
movl   $0x1,(%rsp)
call   1030 <do_y_filter32@plt>
mov    $0x1,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gradY32>:
sub    $0x18,%rsp
mov    0xeee(%rip),%eax
mov    %eax,0x10(%rsp)
mov    0xedb(%rip),%rax
mov    %rax,0x8(%rsp)
movl   $0x1,(%rsp)
lea    0x8(%rsp),%r8
mov    $0x3,%r9d
call   1030 <do_y_filter32@plt>
mov    $0x1,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.gradY32.mask = [3 x i32] [i32 -1, i32 0, i32 1]
define i32 @gradY32(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
%9 = alloca [3 x i32]
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = bitcast [3 x i32]* %9 to i8*
%11 = load i32*, i32** %5
%12 = load i32*, i32** %6
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = getelementptr inbounds [3 x i32], [3 x i32]* %9, i64 0, i64 0
%16 = call i32 @do_y_filter32(i32* %11, i32* %12, i32 %13, i32 %14, i32* %15, i32 3, i32 1)
ret i32 1
}

LLVM IR (-O2):
@__const.gradY32.mask = [3 x i32] [i32 -1, i32 0, i32 1]
define i32 @gradY32(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = alloca [3 x i32]
%6 = bitcast [3 x i32]* %5 to i8*
%7 = getelementptr inbounds [3 x i32], [3 x i32]* %5, i64 0, i64 0
%8 = call i32 @do_y_filter32(i32* %0, i32* %1, i32 %2, i32 %3, i32* %7, i32 3, i32 1)
ret i32 1
}
/* Variables and functions */
scalar_t__ rename(char const *, char const *);
int fs_rename(const char *oldname, const char *newname) {
  if (rename(oldname, newname) != 0)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<fs_rename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <rename@plt>
cmp    $0x0,%rax
je     1143 <fs_rename+0x33>
movl   $0x1,-0x4(%rbp)
jmp    114a <fs_rename+0x3a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fs_rename>:
push   %rax
call   1030 <rename@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fs_rename(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = load i8*, i8** %5
%8 = call i64 @rename(i8* %6, i8* %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 1, i32* %3
br label %12
11: ; preds = %2
store i32 0, i32* %3
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @fs_rename(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i64 @rename(i8* %0, i8* %1)
%4 = icmp ne i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isprint(int);
void t_isprint_0xf3() {
  Assert_real((isprint(243) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              1220, ("isprint should be 0 for 0xf3"));
}


x86 assembly (clang, -O0):
<t_isprint_0xf3>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf3,%edi
call   1030 <isprint@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4c4,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0xf3>:
push   %rax
mov    $0xf3,%edi
call   1030 <isprint@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4c4,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xf3\00"
define void @t_isprint_0xf3() {
%1 = call i64 @isprint(i32 243)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1220, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xf3\00"
define void @t_isprint_0xf3() {
%1 = tail call i64 @isprint(i32 243)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1220, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ printf(char *, long long, long long);
long long sumAnn(int);
void dotestsumAnn(int n, long long exp) {
  long long act = sumAnn(n);
  if (act != exp)
    printf("Error. Expected %llu\n but got %llu\n", exp, act);
  assert(act == exp);
}


x86 assembly (clang, -O0):
<dotestsumAnn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <sumAnn@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
je     116d <dotestsumAnn+0x3d>
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
lea    0xe98(%rip),%rdi
call   1030 <printf@plt>
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dotestsumAnn>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
call   1050 <sumAnn@plt>
mov    %rax,%rbx
cmp    %r14,%rax
je     1156 <dotestsumAnn+0x26>
lea    0xeb5(%rip),%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
call   1030 <printf@plt>
xor    %edi,%edi
cmp    %r14,%rbx
sete   %dil
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <assert@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"Error. Expected %llu\0A but got %llu\0A\00"
define void @dotestsumAnn(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%6 = load i32, i32* %3
%7 = call i64 @sumAnn(i32 %6)
store i64 %7, i64* %5
%8 = load i64, i64* %5
%9 = load i64, i64* %4
%10 = icmp ne i64 %8, %9
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i64, i64* %4
%13 = load i64, i64* %5
%14 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i64 %12, i64 %13)
br label %15
15: ; preds = %11, %2
%16 = load i64, i64* %5
%17 = load i64, i64* %4
%18 = icmp eq i64 %16, %17
%19 = zext i1 %18 to i32
%20 = call i32 @assert(i32 %19)
ret void
}

LLVM IR (-O2):
@.str = [36 x i8] c"Error. Expected %llu\0A but got %llu\0A\00"
define void @dotestsumAnn(i32 %0, i64 %1) {
%3 = tail call i64 @sumAnn(i32 %0)
%4 = icmp eq i64 %3, %1
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i64 %1, i64 %3)
br label %7
7: ; preds = %5, %2
%8 = zext i1 %4 to i32
%9 = tail call i32 @assert(i32 %8)
ret void
}
void sti(void) {
  asm volatile("sti\n"
               "nop");
}


x86 assembly (clang, -O0):
<sti>:
push   %rbp
mov    %rsp,%rbp
sti
nop
pop    %rbp
ret

x86 assembly (clang, -O2):
<sti>:
sti
nop
ret

LLVM IR (-O0):
define void @sti() {
ret void
}

LLVM IR (-O2):
define void @sti() {
tail call void asm sideeffect "sti\0Anop", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
void foo568() {}


x86 assembly (clang, -O0):
<foo568>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo568>:
ret

LLVM IR (-O0):
define void @foo568() {
ret void
}

LLVM IR (-O2):
define void @foo568() {
ret void
}
void sheevaplug_dt_init(void) {}


x86 assembly (clang, -O0):
<sheevaplug_dt_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sheevaplug_dt_init>:
ret

LLVM IR (-O0):
define void @sheevaplug_dt_init() {
ret void
}

LLVM IR (-O2):
define void @sheevaplug_dt_init() {
ret void
}
int addDigits(int num) { return (num % 9 == 0 && num / 9 >= 1) ? 9 : num % 9; }


x86 assembly (clang, -O0):
<addDigits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x9,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    113c <addDigits+0x3c>
mov    -0x4(%rbp),%eax
mov    $0x9,%ecx
cltd
idiv   %ecx
cmp    $0x1,%eax
jl     113c <addDigits+0x3c>
mov    $0x9,%edx
mov    %edx,-0x8(%rbp)
jmp    114a <addDigits+0x4a>
mov    -0x4(%rbp),%eax
mov    $0x9,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<addDigits>:
movslq %edi,%rcx
imul   $0x38e38e39,%rcx,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x21,%rax
add    %edx,%eax
lea    (%rax,%rax,8),%eax
mov    %ecx,%edx
sub    %eax,%edx
mov    $0x9,%eax
cmovne %edx,%eax
cmp    $0x9,%ecx
cmovl  %edx,%eax
ret

LLVM IR (-O0):
define i32 @addDigits(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 9
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sdiv i32 %7, 9
%9 = icmp sge i32 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %6
br label %14
11: ; preds = %6, %1
%12 = load i32, i32* %2
%13 = srem i32 %12, 9
br label %14
14: ; preds = %11, %10
%15 = phi i32 [ 9, %10 ], [ %13, %11 ]
ret i32 %15
}

LLVM IR (-O2):
define i32 @addDigits(i32 %0) {
%2 = srem i32 %0, 9
%3 = icmp eq i32 %2, 0
%4 = icmp sgt i32 %0, 8
%5 = and i1 %4, %3
%6 = select i1 %5, i32 9, i32 %2
ret i32 %6
}
void INT_Excep_AccessInst(void) {}


x86 assembly (clang, -O0):
<INT_Excep_AccessInst>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_AccessInst>:
ret

LLVM IR (-O0):
define void @INT_Excep_AccessInst() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_AccessInst() {
ret void
}
int test_imm_FBuint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0xFB << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FBuint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0xfb,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FBuint64_midword_mem>:
testb  $0xfb,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FBuint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 251
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_FBuint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 16449536
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
scalar_t__ isdigit(char const);
int skip_atoi(const char **c) {
  int i = 0;
  do {
    i = i * 10 + *((*c)++) - '0';
  } while (isdigit(**c));
  return i;
}


x86 assembly (clang, -O0):
<skip_atoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
imul   $0xa,-0xc(%rbp),%eax
mov    -0x8(%rbp),%rdx
mov    (%rdx),%rcx
mov    %rcx,%rsi
add    $0x1,%rsi
mov    %rsi,(%rdx)
movsbl (%rcx),%ecx
add    %ecx,%eax
sub    $0x30,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
jne    1123 <skip_atoi+0x13>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_atoi>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %ebx,%ebx
nopl   0x0(%rax)
lea    (%rbx,%rbx,4),%eax
mov    (%r14),%rcx
lea    0x1(%rcx),%rdx
mov    %rdx,(%r14)
movsbl (%rcx),%edx
lea    (%rdx,%rax,2),%ebx
add    $0xffffffd0,%ebx
movsbl 0x1(%rcx),%edi
call   1030 <isdigit@plt>
test   %rax,%rax
jne    1120 <skip_atoi+0x10>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @skip_atoi(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %3
%6 = mul nsw i32 %5, 10
%7 = load i8**, i8*** %2
%8 = load i8*, i8** %7
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %7
%10 = load i8, i8* %8
%11 = sext i8 %10 to i32
%12 = add nsw i32 %6, %11
%13 = sub nsw i32 %12, 48
store i32 %13, i32* %3
br label %14
14: ; preds = %4
%15 = load i8**, i8*** %2
%16 = load i8*, i8** %15
%17 = load i8, i8* %16
%18 = call i64 @isdigit(i8 signext %17)
%19 = icmp ne i64 %18, 0
br i1 %19, label %4, label %20
20: ; preds = %14
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @skip_atoi(i8** nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %10, %2 ]
%4 = mul nsw i32 %3, 10
%5 = load i8*, i8** %0
%6 = getelementptr inbounds i8, i8* %5, i64 1
store i8* %6, i8** %0
%7 = load i8, i8* %5
%8 = sext i8 %7 to i32
%9 = add i32 %4, -48
%10 = add i32 %9, %8
%11 = load i8, i8* %6
%12 = tail call i64 @isdigit(i8 signext %11)
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %2
14: ; preds = %2
ret i32 %10
}
/* Variables and functions */
void *__builtin_memcpy(void *, void const *, size_t);
void *memcpy(void *dest, const void *src, size_t n) {
  return __builtin_memcpy(dest, src, n);
}


x86 assembly (clang, -O0):
<memcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    %rdi,-0x20(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcpy>:
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define i8* @memcpy(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
ret i8* %7
}

LLVM IR (-O2):
define i8* @memcpy(i8* returned writeonly %0, i8* nocapture %1, i64 %2) {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 %2, i1 false)
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ funcs(int, int);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int main(void) {
  int n;
  scanf("%d", &n);
  funcs(n, n);
  printf("+1\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <funcs@plt>
lea    0xea2(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
mov    %edi,%esi
call   1040 <funcs@plt>
lea    0xeaf(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"+1\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @funcs(i32 %4, i32 %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@str = [3 x i8] c"+1\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @funcs(i32 %4, i32 %4)
%6 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int *malloc(int);
int main() {
  int *ip;
  ip = malloc(10);
  ip = ip - 100;
  *ip = 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xa,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0xfffffffffffffe70,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x0,(%rax)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
call   1030 <malloc@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32*
%2 = call i32* @malloc(i32 10)
store i32* %2, i32** %1
%3 = load i32*, i32** %1
%4 = getelementptr inbounds i32, i32* %3, i64 -100
store i32* %4, i32** %1
%5 = load i32*, i32** %1
store i32 0, i32* %5
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32* @malloc(i32 10)
ret i32 0
}
int int_add(int a, long b) { return a + b; }


x86 assembly (clang, -O0):
<int_add>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movslq -0x4(%rbp),%rax
add    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_add>:
lea    (%rsi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @int_add(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = load i32, i32* %3
%6 = sext i32 %5 to i64
%7 = load i64, i64* %4
%8 = add nsw i64 %6, %7
%9 = trunc i64 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @int_add(i32 %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = add i32 %3, %0
ret i32 %4
}
/* Variables and functions */
char *strdup(char const *);
int /*<<< orphan*/ xalloc_die();
char *xstrdup(const char *s1) {
  char *s = strdup(s1);
  if (s1 && !s)
    xalloc_die();
  return s;
}


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strdup@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1156 <xstrdup+0x36>
cmpq   $0x0,-0x10(%rbp)
jne    1156 <xstrdup+0x36>
mov    $0x0,%al
call   1030 <xalloc_die@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <strdup@plt>
mov    %rax,%r14
test   %rbx,%rbx
je     1140 <xstrdup+0x20>
test   %r14,%r14
jne    1140 <xstrdup+0x20>
xor    %eax,%eax
call   1030 <xalloc_die@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strdup(i8* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %2
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %13
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = icmp ne i8* %9, null
br i1 %10, label %13, label %11
11: ; preds = %8
%12 = call i32 (...) @xalloc_die()
br label %13
13: ; preds = %11, %8, %1
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
define noalias i8* @xstrdup(i8* %0) {
%2 = tail call i8* @strdup(i8* %0)
%3 = icmp eq i8* %0, null
%4 = icmp ne i8* %2, null
%5 = select i1 %3, i1 true, i1 %4
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 (...) @xalloc_die()
br label %8
8: ; preds = %6, %1
ret i8* %2
}
void scheduler_leave_sleep_mode(void) {}


x86 assembly (clang, -O0):
<scheduler_leave_sleep_mode>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scheduler_leave_sleep_mode>:
ret

LLVM IR (-O0):
define void @scheduler_leave_sleep_mode() {
ret void
}

LLVM IR (-O2):
define void @scheduler_leave_sleep_mode() {
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
char *getHeadCommand(char *input) {
  char *temp = (char *)malloc(sizeof(char) * 2);
  temp[0] = input[0];
  temp[1] = '\0';
  return temp;
}


x86 assembly (clang, -O0):
<getHeadCommand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x2,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
movb   $0x0,0x1(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getHeadCommand>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2,%edi
call   1030 <malloc@plt>
mov    (%rbx),%cl
mov    %cl,(%rax)
movb   $0x0,0x1(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define i8* @getHeadCommand(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = call i64 @malloc(i32 2)
%5 = inttoptr i64 %4 to i8*
store i8* %5, i8** %3
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = load i8, i8* %7
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 0
store i8 %8, i8* %10
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i64 1
store i8 0, i8* %12
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
define i8* @getHeadCommand(i8* nocapture %0) {
%2 = tail call i64 @malloc(i32 2)
%3 = inttoptr i64 %2 to i8*
%4 = load i8, i8* %0
store i8 %4, i8* %3
%5 = getelementptr inbounds i8, i8* %3, i64 1
store i8 0, i8* %5
ret i8* %3
}
char *getString() {
  char message[100] = "!!! Hello Universe !!!";
  char *ret = message;
  return ret;
}


x86 assembly (clang, -O0):
<getString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
lea    -0x70(%rbp),%rdi
lea    0xeda(%rip),%rsi
mov    $0x64,%edx
call   1030 <memcpy@plt>
lea    -0x70(%rbp),%rax
mov    %rax,-0x78(%rbp)
mov    -0x78(%rbp),%rax
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getString>:
lea    -0x68(%rsp),%rax
ret

LLVM IR (-O0):
@__const.getString.message = [100 x i8] c"!!! Hello Universe !!!\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00"
define i8* @getString() {
%1 = alloca [100 x i8]
%2 = alloca i8*
%3 = bitcast [100 x i8]* %1 to i8*
%4 = getelementptr inbounds [100 x i8], [100 x i8]* %1, i64 0, i64 0
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define noalias i8* @getString() {
%1 = alloca [100 x i8]
%2 = getelementptr inbounds [100 x i8], [100 x i8]* %1, i64 0, i64 0
ret i8* %2
}
test1() {
  printf("\n%s: \n", __func__);
  printf(" test lib\n");
}


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
lea    0xee1(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xed9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xed8(%rip),%rsi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xed0(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"\0A%s: \0A\00"
@__func__.test1 = [6 x i8] c"test1\00"
@.str.1 = [11 x i8] c" test lib\0A\00"
define i32 @test1() {
%1 = alloca i32
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @__func__.test1, i64 0, i64 0))
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
@.str = [7 x i8] c"\0A%s: \0A\00"
@__func__.test1 = [6 x i8] c"test1\00"
@str = [10 x i8] c" test lib\00"
define i32 @test1() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @__func__.test1, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ internal_sleep(int);
int /*<<< orphan*/ myusec_delay(int);
void internal_delay(int usecs) {
  if (usecs > 1000000) {
    internal_sleep(usecs);
  } else {
    myusec_delay(usecs);
  }
}


x86 assembly (clang, -O0):
<internal_delay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xf4240,-0x4(%rbp)
jle    1145 <internal_delay+0x25>
mov    -0x4(%rbp),%edi
call   1040 <internal_sleep@plt>
jmp    114d <internal_delay+0x2d>
mov    -0x4(%rbp),%edi
call   1030 <myusec_delay@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<internal_delay>:
cmp    $0xf4241,%edi
jl     112d <internal_delay+0xd>
jmp    1040 <internal_sleep@plt>
jmp    1030 <myusec_delay@plt>

LLVM IR (-O0):
define void @internal_delay(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 1000000
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = call i32 @internal_sleep(i32 %6)
br label %11
8: ; preds = %1
%9 = load i32, i32* %2
%10 = call i32 @myusec_delay(i32 %9)
br label %11
11: ; preds = %8, %5
ret void
}

LLVM IR (-O2):
define void @internal_delay(i32 %0) {
%2 = icmp sgt i32 %0, 1000000
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @internal_sleep(i32 %0)
br label %7
5: ; preds = %1
%6 = tail call i32 @myusec_delay(i32 %0)
br label %7
7: ; preds = %5, %3
ret void
}
int cmp_ul_asc(const void *aa, const void *bb) {
  const unsigned long *a = aa, *b = bb;
  return (*a < *b) ? -1 : (*a > *b);
}


x86 assembly (clang, -O0):
<cmp_ul_asc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    -0x20(%rbp),%rcx
cmp    (%rcx),%rax
jae    113d <cmp_ul_asc+0x3d>
mov    $0xffffffff,%eax
mov    %eax,-0x24(%rbp)
jmp    1156 <cmp_ul_asc+0x56>
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    -0x20(%rbp),%rcx
cmp    (%rcx),%rax
seta   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp_ul_asc>:
mov    (%rdi),%rax
xor    %ecx,%ecx
cmp    (%rsi),%rax
seta   %cl
mov    $0xffffffff,%eax
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define i32 @cmp_ul_asc(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64*
%6 = alloca i64*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i64*
store i64* %8, i64** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i64*
store i64* %10, i64** %6
%11 = load i64*, i64** %5
%12 = load i64, i64* %11
%13 = load i64*, i64** %6
%14 = load i64, i64* %13
%15 = icmp ult i64 %12, %14
br i1 %15, label %16, label %17
16: ; preds = %2
br label %24
17: ; preds = %2
%18 = load i64*, i64** %5
%19 = load i64, i64* %18
%20 = load i64*, i64** %6
%21 = load i64, i64* %20
%22 = icmp ugt i64 %19, %21
%23 = zext i1 %22 to i32
br label %24
24: ; preds = %17, %16
%25 = phi i32 [ -1, %16 ], [ %23, %17 ]
ret i32 %25
}

LLVM IR (-O2):
define i32 @cmp_ul_asc(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = bitcast i8* %1 to i64*
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp ult i64 %5, %6
%8 = icmp ugt i64 %5, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
void *scip_null_cons() { return (void *)0; }


x86 assembly (clang, -O0):
<scip_null_cons>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scip_null_cons>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @scip_null_cons() {
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @scip_null_cons() {
ret i8* null
}
void gtk_tree_view_collapse_all() {}


x86 assembly (clang, -O0):
<gtk_tree_view_collapse_all>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_view_collapse_all>:
ret

LLVM IR (-O0):
define void @gtk_tree_view_collapse_all() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_view_collapse_all() {
ret void
}
const char *usage() {
  return "Usage: tclc [options] filename...\n"
         "Options:\n"
         "  -d <arg>     Specify the device type. arg is either CPU or GPU. "
         "default is GPU\n"
         "  -l           List all available platforms, devices and device "
         "types\n"
         "  -v           Print version information\n"
         "  -h, --help   Show this help\n";
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [266 x i8] c"Usage: tclc [options] filename...\0AOptions:\0A -d <arg> Specify the device type. arg is either CPU or GPU. default is GPU\0A -l List all available platforms, devices and device types\0A -v Print version information\0A -h, --help Show this help\0A\00"
define i8* @usage() {
ret i8* getelementptr inbounds ([266 x i8], [266 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [266 x i8] c"Usage: tclc [options] filename...\0AOptions:\0A -d <arg> Specify the device type. arg is either CPU or GPU. default is GPU\0A -l List all available platforms, devices and device types\0A -v Print version information\0A -h, --help Show this help\0A\00"
define i8* @usage() {
ret i8* getelementptr inbounds ([266 x i8], [266 x i8]* @.str, i64 0, i64 0)
}
int main(Void) {
  int array[] = {1, 2, 3, 4, 5};
  printv(array, 5);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    0xed7(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xed4(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xed2(%rip),%eax
mov    %eax,-0x10(%rbp)
lea    -0x20(%rbp),%rdi
mov    $0x5,%esi
mov    $0x0,%al
call   1030 <printv@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
mov    0xef6(%rip),%eax
mov    %eax,0x10(%rsp)
movaps 0xedb(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x5,%esi
xor    %eax,%eax
call   1030 <printv@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.array = [5 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5]
define i32 @main(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca [5 x i32]
store i32 0, i32* %2
store i32 %0, i32* %3
%5 = bitcast [5 x i32]* %4 to i8*
%6 = getelementptr inbounds [5 x i32], [5 x i32]* %4, i64 0, i64 0
%7 = call i32 (i32*, i32, ...) bitcast (i32 (...)* @printv to i32 (i32*, i32, ...)*)(i32* %6, i32 5)
ret i32 0
}

LLVM IR (-O2):
@__const.main.array = [5 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5]
define i32 @main(i32 %0) {
%2 = alloca [5 x i32]
%3 = bitcast [5 x i32]* %2 to i8*
%4 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%5 = call i32 (i32*, i32, ...) bitcast (i32 (...)* @printv to i32 (i32*, i32, ...)*)(i32* %4, i32 5)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char const *);
int /*<<< orphan*/ terminal_write(char const *, int /*<<< orphan*/);
void puts(const char *data) { terminal_write(data, strlen(data)); }


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1040 <terminal_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <terminal_write@plt>

LLVM IR (-O0):
define void @puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = call i32 @terminal_write(i8* %3, i32 %5)
ret void
}

LLVM IR (-O2):
define void @puts(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32 @terminal_write(i8* %0, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ isnan(float);
int /*<<< orphan*/ printf(char *, char const *, float);
void print_number_nan(const char *str, float number) {
  if (!isnan(number)) {
    printf("%s: %g, ", str, number);
  }
}


x86 assembly (clang, -O0):
<print_number_nan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
call   1040 <isnan@plt>
cmp    $0x0,%eax
jne    1159 <print_number_nan+0x39>
mov    -0x8(%rbp),%rsi
movss  -0xc(%rbp),%xmm0
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_number_nan>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movss  %xmm0,0xc(%rsp)
call   1040 <isnan@plt>
test   %eax,%eax
je     113d <print_number_nan+0x1d>
add    $0x10,%rsp
pop    %rbx
ret
lea    0xebc(%rip),%rdi
mov    %rbx,%rsi
movss  0xc(%rsp),%xmm0
add    $0x10,%rsp
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"%s: %g, \00"
define void @print_number_nan(i8* %0, float %1) {
%3 = alloca i8*
%4 = alloca float
store i8* %0, i8** %3
store float %1, float* %4
%5 = load float, float* %4
%6 = call i32 @isnan(float %5)
%7 = icmp ne i32 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %2
%9 = load i8*, i8** %3
%10 = load float, float* %4
%11 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %9, float %10)
br label %12
12: ; preds = %8, %2
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"%s: %g, \00"
define void @print_number_nan(i8* %0, float %1) {
%3 = tail call i32 @isnan(float %1)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %0, float %1)
br label %7
7: ; preds = %5, %2
ret void
}
int f3(unsigned char *x) { return ~(1U << (x[0] & 0x1f)); }


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%ecx
and    $0x1f,%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
mov    (%rdi),%cl
mov    $0xfffffffe,%eax
rol    %cl,%eax
ret

LLVM IR (-O0):
define i32 @f3(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = and i32 %6, 31
%8 = shl i32 1, %7
%9 = xor i32 %8, -1
ret i32 %9
}

LLVM IR (-O2):
define i32 @f3(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 31
%4 = zext i8 %3 to i32
%5 = shl nuw i32 1, %4
%6 = xor i32 %5, -1
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ block_ser_if_client_fault_notification(int);
void __ser_lock_client_fault_notification(int spdid) {
  block_ser_if_client_fault_notification(spdid);
  return;
}


x86 assembly (clang, -O0):
<__ser_lock_client_fault_notification>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <block_ser_if_client_fault_notification@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ser_lock_client_fault_notification>:
jmp    1030 <block_ser_if_client_fault_notification@plt>

LLVM IR (-O0):
define void @__ser_lock_client_fault_notification(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @block_ser_if_client_fault_notification(i32 %3)
ret void
}

LLVM IR (-O2):
define void @__ser_lock_client_fault_notification(i32 %0) {
%2 = tail call i32 @block_ser_if_client_fault_notification(i32 %0)
ret void
}
void inclass_unit2rangechars() {}


x86 assembly (clang, -O0):
<inclass_unit2rangechars>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inclass_unit2rangechars>:
ret

LLVM IR (-O0):
define void @inclass_unit2rangechars() {
ret void
}

LLVM IR (-O2):
define void @inclass_unit2rangechars() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo();
int main() {
  foo();
  return 12;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0xc,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <foo@plt>
mov    $0xc,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @foo()
ret i32 12
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @foo()
ret i32 12
}