xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t pos_int64_t(uint64_t number) { return number ^ 0x8000000000000000; }


x86 assembly (clang, -O0):
<pos_int64_t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pos_int64_t>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @pos_int64_t(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = xor i64 %4, -9223372036854775808
%6 = trunc i64 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @pos_int64_t(i32 returned %0) {
ret i32 %0
}
int test_imm_D3int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0xD3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D3int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0xd3,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D3int64_midword_mem>:
testb  $0xd3,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D3int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 211
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_D3int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 13828096
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_mcalign_pop() {
  printf("NOT IMPLEMENTED:"
         "pa_mcalign_pop"
         "\n");
}


x86 assembly (clang, -O0):
<pa_mcalign_pop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_mcalign_pop>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"NOT IMPLEMENTED:pa_mcalign_pop\0A\00"
define i32 @pa_mcalign_pop() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [31 x i8] c"NOT IMPLEMENTED:pa_mcalign_pop\00"
define i32 @pa_mcalign_pop() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ c_fstr2hecmw_connect_conv(int, int *, int *, int *);
void FSTR2HECMW_CONNECT_CONV_(int *n_elem, int elem_type[],
                              int elem_node_index[], int elem_node_item[]) {
  c_fstr2hecmw_connect_conv(*n_elem, elem_type, elem_node_index,
                            elem_node_item);
}


x86 assembly (clang, -O0):
<FSTR2HECMW_CONNECT_CONV_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <c_fstr2hecmw_connect_conv@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FSTR2HECMW_CONNECT_CONV_>:
mov    (%rdi),%edi
jmp    1030 <c_fstr2hecmw_connect_conv@plt>

LLVM IR (-O0):
define void @FSTR2HECMW_CONNECT_CONV_(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = load i32, i32* %9
%11 = load i32*, i32** %6
%12 = load i32*, i32** %7
%13 = load i32*, i32** %8
%14 = call i32 @c_fstr2hecmw_connect_conv(i32 %10, i32* %11, i32* %12, i32* %13)
ret void
}

LLVM IR (-O2):
define void @FSTR2HECMW_CONNECT_CONV_(i32* nocapture %0, i32* %1, i32* %2, i32* %3) {
%5 = load i32, i32* %0
%6 = tail call i32 @c_fstr2hecmw_connect_conv(i32 %5, i32* %1, i32* %2, i32* %3)
ret void
}
/* Variables and functions */
int power(int, int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main(void) {
  int n;
  scanf("%d", &n);
  n = power(2, n);
  printf("%d", --n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%esi
mov    $0x2,%edi
call   1030 <power@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
add    $0xffffffff,%esi
mov    %esi,-0x8(%rbp)
lea    0xe91(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xec4(%rip),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1050 <scanf@plt>
mov    0xc(%rsp),%esi
mov    $0x2,%edi
call   1030 <power@plt>
lea    -0x1(%rax),%esi
mov    %esi,0xc(%rsp)
mov    %rbx,%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = call i32 @power(i32 2, i32 %4)
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = add nsw i32 %6, -1
store i32 %7, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @power(i32 2, i32 %4)
%6 = add nsw i32 %5, -1
store i32 %6, i32* %1
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ gen(char *);
void cgclear2(void) { gen("xorl\t%ecx,%ecx"); }


x86 assembly (clang, -O0):
<cgclear2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <gen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgclear2>:
lea    0xee9(%rip),%rdi
jmp    1030 <gen@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"xorl\09%ecx,%ecx\00"
define void @cgclear2() {
%1 = call i32 @gen(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"xorl\09%ecx,%ecx\00"
define void @cgclear2() {
%1 = tail call i32 @gen(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}
int pathconN_nm6_work(int *sz_arg, int *sz_res, int *sz_iw, int *sz_w) {
  if (sz_arg)
    *sz_arg = 1;
  if (sz_res)
    *sz_res = 2;
  if (sz_iw)
    *sz_iw = 0;
  if (sz_w)
    *sz_w = 0;
  return 0;
}


x86 assembly (clang, -O0):
<pathconN_nm6_work>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1129 <pathconN_nm6_work+0x29>
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
cmpq   $0x0,-0x10(%rbp)
je     113e <pathconN_nm6_work+0x3e>
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x18(%rbp)
je     1153 <pathconN_nm6_work+0x53>
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
cmpq   $0x0,-0x20(%rbp)
je     1168 <pathconN_nm6_work+0x68>
mov    -0x20(%rbp),%rax
movl   $0x0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathconN_nm6_work>:
test   %rdi,%rdi
je     110b <pathconN_nm6_work+0xb>
movl   $0x1,(%rdi)
test   %rsi,%rsi
je     1116 <pathconN_nm6_work+0x16>
movl   $0x2,(%rsi)
test   %rdx,%rdx
je     1121 <pathconN_nm6_work+0x21>
movl   $0x0,(%rdx)
test   %rcx,%rcx
je     112c <pathconN_nm6_work+0x2c>
movl   $0x0,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pathconN_nm6_work(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %11, label %13
11: ; preds = %4
%12 = load i32*, i32** %5
store i32 1, i32* %12
br label %13
13: ; preds = %11, %4
%14 = load i32*, i32** %6
%15 = icmp ne i32* %14, null
br i1 %15, label %16, label %18
16: ; preds = %13
%17 = load i32*, i32** %6
store i32 2, i32* %17
br label %18
18: ; preds = %16, %13
%19 = load i32*, i32** %7
%20 = icmp ne i32* %19, null
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = load i32*, i32** %7
store i32 0, i32* %22
br label %23
23: ; preds = %21, %18
%24 = load i32*, i32** %8
%25 = icmp ne i32* %24, null
br i1 %25, label %26, label %28
26: ; preds = %23
%27 = load i32*, i32** %8
store i32 0, i32* %27
br label %28
28: ; preds = %26, %23
ret i32 0
}

LLVM IR (-O2):
define i32 @pathconN_nm6_work(i32* writeonly %0, i32* writeonly %1, i32* writeonly %2, i32* writeonly %3) {
%5 = icmp eq i32* %0, null
br i1 %5, label %7, label %6
6: ; preds = %4
store i32 1, i32* %0
br label %7
7: ; preds = %6, %4
%8 = icmp eq i32* %1, null
br i1 %8, label %10, label %9
9: ; preds = %7
store i32 2, i32* %1
br label %10
10: ; preds = %9, %7
%11 = icmp eq i32* %2, null
br i1 %11, label %13, label %12
12: ; preds = %10
store i32 0, i32* %2
br label %13
13: ; preds = %12, %10
%14 = icmp eq i32* %3, null
br i1 %14, label %16, label %15
15: ; preds = %13
store i32 0, i32* %3
br label %16
16: ; preds = %15, %13
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ AirspeedSensorHandle();
int /*<<< orphan*/ UAVObjRequestUpdate(int /*<<< orphan*/);
void AirspeedSensorRequestUpdate() {
  UAVObjRequestUpdate(AirspeedSensorHandle());
}


x86 assembly (clang, -O0):
<AirspeedSensorRequestUpdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <AirspeedSensorHandle@plt>
mov    %eax,%edi
call   1030 <UAVObjRequestUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AirspeedSensorRequestUpdate>:
push   %rax
xor    %eax,%eax
call   1040 <AirspeedSensorHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <UAVObjRequestUpdate@plt>

LLVM IR (-O0):
define void @AirspeedSensorRequestUpdate() {
%1 = call i32 (...) @AirspeedSensorHandle()
%2 = call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}

LLVM IR (-O2):
define void @AirspeedSensorRequestUpdate() {
%1 = tail call i32 (...) @AirspeedSensorHandle()
%2 = tail call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}
/* Variables and functions */
void *mem_calloc(size_t, size_t);
void *vis5d_mem_calloc(size_t nmemb, size_t size) {
  return mem_calloc(nmemb, size);
}


x86 assembly (clang, -O0):
<vis5d_mem_calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <mem_calloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vis5d_mem_calloc>:
jmp    1030 <mem_calloc@plt>

LLVM IR (-O0):
define i8* @vis5d_mem_calloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i8* @mem_calloc(i64 %5, i64 %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @vis5d_mem_calloc(i64 %0, i64 %1) {
%3 = tail call i8* @mem_calloc(i64 %0, i64 %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ main(int);
void start() { main(10); }


x86 assembly (clang, -O0):
<start>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
call   1030 <main@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<start>:
mov    $0xa,%edi
jmp    1030 <main@plt>

LLVM IR (-O0):
define void @start() {
%1 = call i32 @main(i32 10)
ret void
}

LLVM IR (-O2):
define void @start() {
%1 = tail call i32 @main(i32 10)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
scalar_t__ memset(char *, int /*<<< orphan*/, size_t);
wchar_t *wmemset(wchar_t *s, wchar_t c, size_t n) {
  return (wchar_t *)memset((char *)s, c, n);
}


x86 assembly (clang, -O0):
<wmemset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1030 <memset@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wmemset>:
jmp    1030 <memset@plt>

LLVM IR (-O0):
define i32* @wmemset(i32* %0, i32 %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i64
store i32* %0, i32** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%7 = load i32*, i32** %4
%8 = bitcast i32* %7 to i8*
%9 = load i32, i32* %5
%10 = load i64, i64* %6
%11 = call i64 @memset(i8* %8, i32 %9, i64 %10)
%12 = inttoptr i64 %11 to i32*
ret i32* %12
}

LLVM IR (-O2):
define i32* @wmemset(i32* %0, i32 %1, i64 %2) {
%4 = bitcast i32* %0 to i8*
%5 = tail call i64 @memset(i8* %4, i32 %1, i64 %2)
%6 = inttoptr i64 %5 to i32*
ret i32* %6
}
void avcodec_find_decoder() {}


x86 assembly (clang, -O0):
<avcodec_find_decoder>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avcodec_find_decoder>:
ret

LLVM IR (-O0):
define void @avcodec_find_decoder() {
ret void
}

LLVM IR (-O2):
define void @avcodec_find_decoder() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Ellipse184(long, long, long, long);
void ellipse(long x, long y, long rx, long ry) { Ellipse184(x, y, rx, ry); }


x86 assembly (clang, -O0):
<ellipse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <Ellipse184@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ellipse>:
jmp    1030 <Ellipse184@plt>

LLVM IR (-O0):
define void @ellipse(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %5
%10 = load i64, i64* %6
%11 = load i64, i64* %7
%12 = load i64, i64* %8
%13 = call i32 @Ellipse184(i64 %9, i64 %10, i64 %11, i64 %12)
ret void
}

LLVM IR (-O2):
define void @ellipse(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = tail call i32 @Ellipse184(i64 %0, i64 %1, i64 %2, i64 %3)
ret void
}
int fnmatch(const char *pattern, const char *string, int flags) {
  ;
  return -1;
}


x86 assembly (clang, -O0):
<fnmatch>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fnmatch>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @fnmatch(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 -1
}

LLVM IR (-O2):
define i32 @fnmatch(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
ret i32 -1
}
/* Type definitions */
struct in_addr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ AF_INET;
int inet_pton(int /*<<< orphan*/, char *, struct in_addr *);
int is_ipv4(char *addr) {
  int ret;
  struct in_addr ipv4_addr;
  ret = inet_pton(AF_INET, addr, &ipv4_addr);
  if (ret == 1)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<is_ipv4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1030 <inet_pton@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x1,-0x14(%rbp)
jne    114b <is_ipv4+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    1152 <is_ipv4+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_ipv4>:
push   %rax
mov    %rdi,%rsi
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rdx
call   1030 <inet_pton@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.in_addr = type { i32 }
@AF_INET = global i32 0
define i32 @is_ipv4(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
%5 = alloca %struct.in_addr
store i8* %0, i8** %3
%6 = load i32, i32* @AF_INET
%7 = load i8*, i8** %3
%8 = call i32 @inet_pton(i32 %6, i8* %7, %struct.in_addr* %5)
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = icmp eq i32 %9, 1
br i1 %10, label %11, label %12
11: ; preds = %1
store i32 1, i32* %2
br label %13
12: ; preds = %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
%struct.in_addr = type { i32 }
@AF_INET = global i32 0
define i32 @is_ipv4(i8* %0) {
%2 = alloca %struct.in_addr
%3 = bitcast %struct.in_addr* %2 to i8*
%4 = load i32, i32* @AF_INET
%5 = call i32 @inet_pton(i32 %4, i8* %0, %struct.in_addr* %2)
%6 = icmp eq i32 %5, 1
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ foo(int **);
int /*<<< orphan*/ test_assert(int);
int main(void) {
  int a;
  int *b = &a;
  foo(&b);
  test_assert(a == 3);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
lea    -0x10(%rbp),%rdi
call   1030 <foo@plt>
cmpl   $0x3,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <test_assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
lea    0xc(%rsp),%rax
mov    %rax,0x10(%rsp)
lea    0x10(%rsp),%rdi
call   1030 <foo@plt>
xor    %edi,%edi
cmpl   $0x3,0xc(%rsp)
sete   %dil
call   1040 <test_assert@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32* %1, i32** %2
%3 = call i32 @foo(i32** %2)
%4 = load i32, i32* %1
%5 = icmp eq i32 %4, 3
%6 = zext i1 %5 to i32
%7 = call i32 @test_assert(i32 %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32** %2 to i8*
store i32* %1, i32** %2
%5 = call i32 @foo(i32** %2)
%6 = load i32, i32* %1
%7 = icmp eq i32 %6, 3
%8 = zext i1 %7 to i32
%9 = call i32 @test_assert(i32 %8)
ret i32 0
}
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ close_range_cloexec_syzbot(struct __test_metadata *);
void wrapper_close_range_cloexec_syzbot(
    struct __test_metadata *_metadata,
    struct __fixture_variant_metadata *variant) {
  close_range_cloexec_syzbot(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_close_range_cloexec_syzbot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <close_range_cloexec_syzbot@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_close_range_cloexec_syzbot>:
jmp    1030 <close_range_cloexec_syzbot@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_close_range_cloexec_syzbot(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @close_range_cloexec_syzbot(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_close_range_cloexec_syzbot(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @close_range_cloexec_syzbot(%struct.__test_metadata* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LOG_ERR;
int /*<<< orphan*/ syscall(int, int /*<<< orphan*/, int /*<<< orphan*/,
                           int /*<<< orphan*/, int /*<<< orphan*/,
                           int /*<<< orphan*/);
int /*<<< orphan*/ syslog(int /*<<< orphan*/, char *);
void init_screen(void) {
  syslog(LOG_ERR, "Taking over screen...\n");
  syscall(58, 0, 0, 0, 0, 0);
}


x86 assembly (clang, -O0):
<init_screen>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <syslog@plt>
mov    $0x3a,%edi
xor    %r9d,%r9d
mov    %r9d,%esi
mov    %r9d,%edx
mov    %r9d,%ecx
mov    %r9d,%r8d
call   1030 <syscall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_screen>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1040 <syslog@plt>
mov    $0x3a,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
pop    %rax
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@LOG_ERR = global i32 0
@.str = [23 x i8] c"Taking over screen...\0A\00"
define void @init_screen() {
%1 = load i32, i32* @LOG_ERR
%2 = call i32 @syslog(i32 %1, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @syscall(i32 58, i32 0, i32 0, i32 0, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
@LOG_ERR = global i32 0
@.str = [23 x i8] c"Taking over screen...\0A\00"
define void @init_screen() {
%1 = load i32, i32* @LOG_ERR
%2 = tail call i32 @syslog(i32 %1, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @syscall(i32 58, i32 0, i32 0, i32 0, i32 0, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Msp430GpioC__4__GeneralIO__clr();
void CC2420ControlP__RSTN__clr(void) { Msp430GpioC__4__GeneralIO__clr(); }


x86 assembly (clang, -O0):
<CC2420ControlP__RSTN__clr>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Msp430GpioC__4__GeneralIO__clr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC2420ControlP__RSTN__clr>:
xor    %eax,%eax
jmp    1030 <Msp430GpioC__4__GeneralIO__clr@plt>

LLVM IR (-O0):
define void @CC2420ControlP__RSTN__clr() {
%1 = call i32 (...) @Msp430GpioC__4__GeneralIO__clr()
ret void
}

LLVM IR (-O2):
define void @CC2420ControlP__RSTN__clr() {
%1 = tail call i32 (...) @Msp430GpioC__4__GeneralIO__clr()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isgraph(int);
void t_isgraph_0x69() {
  Assert_real((isgraph(105)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              530, ("isgraph should be 1 for i"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x69>:
push   %rbp
mov    %rsp,%rbp
mov    $0x69,%edi
call   1040 <isgraph@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x212,%edx
lea    0xf65(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x69>:
push   %rax
mov    $0x69,%edi
call   1040 <isgraph@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x212,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for i\00"
define void @t_isgraph_0x69() {
%1 = call i32 @isgraph(i32 105)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 530, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for i\00"
define void @t_isgraph_0x69() {
%1 = tail call i32 @isgraph(i32 105)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 530, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
bool is_starting_caps_var_char(int ch) {
  return (ch >= 'A' && ch <= 'Z') || ch == '_';
}


x86 assembly (clang, -O0):
<is_starting_caps_var_char>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x41,-0x4(%rbp)
jl     1120 <is_starting_caps_var_char+0x20>
mov    $0x1,%al
cmpl   $0x5a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    112a <is_starting_caps_var_char+0x2a>
cmpl   $0x5f,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_starting_caps_var_char>:
lea    -0x41(%rdi),%eax
cmp    $0x1a,%eax
setb   %al
cmp    $0x5f,%edi
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_starting_caps_var_char(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 65
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 90
br i1 %7, label %11, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 95
br label %11
11: ; preds = %8, %5
%12 = phi i1 [ true, %5 ], [ %10, %8 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @is_starting_caps_var_char(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = icmp eq i32 %0, 95
%5 = or i1 %4, %3
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ substra(int /*<<< orphan*/);
void op_substra() { substra(0); }


x86 assembly (clang, -O0):
<op_substra>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <substra@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_substra>:
xor    %edi,%edi
jmp    1030 <substra@plt>

LLVM IR (-O0):
define void @op_substra() {
%1 = call i32 @substra(i32 0)
ret void
}

LLVM IR (-O2):
define void @op_substra() {
%1 = tail call i32 @substra(i32 0)
ret void
}
int ccmp(const void *key, const void *elt) {
  return *((char *)key) > *((char *)elt) ? 1 : *((char *)key) - *((char *)elt);
}


x86 assembly (clang, -O0):
<ccmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jle    112f <ccmp+0x2f>
mov    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1142 <ccmp+0x42>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
sub    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccmp>:
movsbl (%rdi),%eax
movsbl (%rsi),%ecx
mov    %eax,%edx
sub    %ecx,%edx
cmp    %cl,%al
mov    $0x1,%eax
cmovle %edx,%eax
ret

LLVM IR (-O0):
define i32 @ccmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp sgt i32 %7, %10
br i1 %11, label %12, label %13
12: ; preds = %2
br label %21
13: ; preds = %2
%14 = load i8*, i8** %3
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = load i8*, i8** %4
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = sub nsw i32 %16, %19
br label %21
21: ; preds = %13, %12
%22 = phi i32 [ 1, %12 ], [ %20, %13 ]
ret i32 %22
}

LLVM IR (-O2):
define i32 @ccmp(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
%5 = icmp sgt i8 %3, %4
%6 = sext i8 %4 to i32
%7 = sext i8 %3 to i32
%8 = sub nsw i32 %7, %6
%9 = select i1 %5, i32 1, i32 %8
ret i32 %9
}
double dmod(double x, double y) {
  double r = x / y;
  int a = (int)r;
  double s = y * a;
  return x - s;
}


x86 assembly (clang, -O0):
<dmod>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
divsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
cvttsd2si -0x18(%rbp),%eax
mov    %eax,-0x1c(%rbp)
movsd  -0x10(%rbp),%xmm0
cvtsi2sdl -0x1c(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x28(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dmod>:
movapd %xmm0,%xmm2
divsd  %xmm1,%xmm2
cvttpd2dq %xmm2,%xmm2
cvtdq2pd %xmm2,%xmm2
mulsd  %xmm1,%xmm2
subsd  %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @dmod(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
%6 = alloca i32
%7 = alloca double
store double %0, double* %3
store double %1, double* %4
%8 = load double, double* %3
%9 = load double, double* %4
%10 = fdiv double %8, %9
store double %10, double* %5
%11 = load double, double* %5
%12 = fptosi double %11 to i32
store i32 %12, i32* %6
%13 = load double, double* %4
%14 = load i32, i32* %6
%15 = sitofp i32 %14 to double
%16 = fmul double %13, %15
store double %16, double* %7
%17 = load double, double* %3
%18 = load double, double* %7
%19 = fsub double %17, %18
ret double %19
}

LLVM IR (-O2):
define double @dmod(double %0, double %1) {
%3 = fdiv double %0, %1
%4 = fptosi double %3 to i32
%5 = sitofp i32 %4 to double
%6 = fmul double %5, %1
%7 = fsub double %0, %6
ret double %7
}
int ctz1(unsigned x) {
  static const char table[32] = "\x00\x01\x1c\x02\x1d\x0e\x18\x03\x1e\x16\x14"
                                "\x0f\x19\x11\x04\b\x1f\x1b\r\x17\x15\x13\x10"
                                "\x07\x1a\f\x12\x06\v\x05\n\t";
  return table[((unsigned)((x & -x) * 0x077CB531U)) >> 27];
}


x86 assembly (clang, -O0):
<ctz1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    %ecx,%ecx
sub    -0x4(%rbp),%ecx
and    %ecx,%eax
imul   $0x77cb531,%eax,%eax
shr    $0x1b,%eax
mov    %eax,%eax
mov    %eax,%ecx
lea    0xedb(%rip),%rax
movsbl (%rax,%rcx,1),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctz1>:
mov    %edi,%eax
neg    %eax
and    %edi,%eax
imul   $0x77cb531,%eax,%eax
shr    $0x1b,%rax
lea    0xee9(%rip),%rcx
movsbl (%rax,%rcx,1),%eax
ret

LLVM IR (-O0):
@ctz1.table = internal constant [32 x i8] c"\00\01\1C\02\1D\0E\18\03\1E\16\14\0F\19\11\04\08\1F\1B\0D\17\15\13\10\07\1A\0C\12\06\0B\05\0A\09"
define i32 @ctz1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = sub i32 0, %4
%6 = and i32 %3, %5
%7 = mul i32 %6, 125613361
%8 = lshr i32 %7, 27
%9 = zext i32 %8 to i64
%10 = getelementptr inbounds [32 x i8], [32 x i8]* @ctz1.table, i64 0, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
@ctz1.table = internal unnamed_addr constant [32 x i8] c"\00\01\1C\02\1D\0E\18\03\1E\16\14\0F\19\11\04\08\1F\1B\0D\17\15\13\10\07\1A\0C\12\06\0B\05\0A\09"
define i32 @ctz1(i32 %0) {
%2 = sub i32 0, %0
%3 = and i32 %2, %0
%4 = mul i32 %3, 125613361
%5 = lshr i32 %4, 27
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds [32 x i8], [32 x i8]* @ctz1.table, i64 0, i64 %6
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isxdigit(int);
void t_isxdigit_0x97() {
  Assert_real((isxdigit(151) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              760, ("isxdigit should be 0 for 0x97"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0x97>:
push   %rbp
mov    %rsp,%rbp
mov    $0x97,%edi
call   1030 <isxdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2f8,%edx
lea    0xf5c(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0x97>:
push   %rax
mov    $0x97,%edi
call   1030 <isxdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x2f8,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0x97\00"
define void @t_isxdigit_0x97() {
%1 = call i64 @isxdigit(i32 151)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 760, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0x97\00"
define void @t_isxdigit_0x97() {
%1 = tail call i64 @isxdigit(i32 151)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 760, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clear();
int /*<<< orphan*/ endwin();
void renderUnInit(void) {
  clear();
  endwin();
}


x86 assembly (clang, -O0):
<renderUnInit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <clear@plt>
mov    $0x0,%al
call   1030 <endwin@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<renderUnInit>:
push   %rax
xor    %eax,%eax
call   1040 <clear@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <endwin@plt>

LLVM IR (-O0):
define void @renderUnInit() {
%1 = call i32 (...) @clear()
%2 = call i32 (...) @endwin()
ret void
}

LLVM IR (-O2):
define void @renderUnInit() {
%1 = tail call i32 (...) @clear()
%2 = tail call i32 (...) @endwin()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write_imm(int);
int /*<<< orphan*/ write_instr(int);
int down_handler(char **save) {
  write_instr(0x00);
  write_imm(0x51);
  write_instr(0x28);
  return 0;
}


x86 assembly (clang, -O0):
<down_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
call   1040 <write_instr@plt>
mov    $0x51,%edi
call   1030 <write_imm@plt>
mov    $0x28,%edi
call   1040 <write_instr@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<down_handler>:
push   %rax
xor    %edi,%edi
call   1040 <write_instr@plt>
mov    $0x51,%edi
call   1030 <write_imm@plt>
mov    $0x28,%edi
call   1040 <write_instr@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @down_handler(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = call i32 @write_instr(i32 0)
%4 = call i32 @write_imm(i32 81)
%5 = call i32 @write_instr(i32 40)
ret i32 0
}

LLVM IR (-O2):
define i32 @down_handler(i8** nocapture readnone %0) {
%2 = tail call i32 @write_instr(i32 0)
%3 = tail call i32 @write_imm(i32 81)
%4 = tail call i32 @write_instr(i32 40)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fp_msg(char *);
int fp_hint(void) {
  fp_msg("      `fpack -H' for help\n");
  return (0);
}


x86 assembly (clang, -O0):
<fp_hint>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <fp_msg@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fp_hint>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <fp_msg@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [27 x i8] c" `fpack -H' for help\0A\00"
define i32 @fp_hint() {
%1 = call i32 @fp_msg(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [27 x i8] c" `fpack -H' for help\0A\00"
define i32 @fp_hint() {
%1 = tail call i32 @fp_msg(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ inb(unsigned int);
int /*<<< orphan*/ outb(int /*<<< orphan*/, unsigned int);
void vp_reset(unsigned int ioaddr) {
  outb(0, ioaddr + 18);
  (void)inb(ioaddr + 19);
}


x86 assembly (clang, -O0):
<vp_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
add    $0x12,%esi
xor    %edi,%edi
call   1030 <outb@plt>
mov    -0x4(%rbp),%edi
add    $0x13,%edi
call   1040 <inb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vp_reset>:
push   %rbx
mov    %edi,%ebx
lea    0x12(%rbx),%esi
xor    %edi,%edi
call   1030 <outb@plt>
add    $0x13,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1040 <inb@plt>

LLVM IR (-O0):
define void @vp_reset(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 18
%5 = call i32 @outb(i32 0, i32 %4)
%6 = load i32, i32* %2
%7 = add i32 %6, 19
%8 = call i32 @inb(i32 %7)
ret void
}

LLVM IR (-O2):
define void @vp_reset(i32 %0) {
%2 = add i32 %0, 18
%3 = tail call i32 @outb(i32 0, i32 %2)
%4 = add i32 %0, 19
%5 = tail call i32 @inb(i32 %4)
ret void
}
void gf8mul_10011100(void) {
  __asm__ __volatile__("\tpxor    %xmm7, %xmm4\n"
                       "\tpxor    %xmm6, %xmm3\n"
                       "\tpxor    %xmm5, %xmm2\n"
                       "\tpxor    %xmm4, %xmm1\n"
                       "\tpxor    %xmm3, %xmm0\n"
                       "\tpxor    %xmm2, %xmm6\n"
                       "\tpxor    %xmm2, %xmm5\n"
                       "\tpxor    %xmm2, %xmm3\n"
                       "\tpxor    %xmm2, %xmm1\n"
                       "\tpxor    %xmm1, %xmm5\n"
                       "\tpxor    %xmm1, %xmm2\n"
                       "\tpxor    %xmm2, %xmm1\n"
                       "\tpxor    %xmm0, %xmm7\n"
                       "\tpxor    %xmm0, %xmm4\n"
                       "\tpxor    %xmm0, %xmm3\n"
                       "\tpxor    %xmm0, %xmm2\n"
                       "\tpxor    %xmm2, %xmm0\n");
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pxor   %xmm7,%xmm4
pxor   %xmm6,%xmm3
pxor   %xmm5,%xmm2
pxor   %xmm4,%xmm1
pxor   %xmm3,%xmm0
pxor   %xmm2,%xmm6
pxor   %xmm2,%xmm5
pxor   %xmm2,%xmm3
pxor   %xmm2,%xmm1
pxor   %xmm1,%xmm5
pxor   %xmm1,%xmm2
pxor   %xmm2,%xmm1
pxor   %xmm0,%xmm7
pxor   %xmm0,%xmm4
pxor   %xmm0,%xmm3
pxor   %xmm0,%xmm2
pxor   %xmm2,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
pxor   %xmm7,%xmm4
pxor   %xmm6,%xmm3
pxor   %xmm5,%xmm2
pxor   %xmm4,%xmm1
pxor   %xmm3,%xmm0
pxor   %xmm2,%xmm6
pxor   %xmm2,%xmm5
pxor   %xmm2,%xmm3
pxor   %xmm2,%xmm1
pxor   %xmm1,%xmm5
pxor   %xmm1,%xmm2
pxor   %xmm2,%xmm1
pxor   %xmm0,%xmm7
pxor   %xmm0,%xmm4
pxor   %xmm0,%xmm3
pxor   %xmm0,%xmm2
pxor   %xmm2,%xmm0
ret

LLVM IR (-O0):
define void @gf8mul_10011100() {
ret void
}

LLVM IR (-O2):
define void @gf8mul_10011100() {
tail call void asm sideeffect "\09pxor %xmm7, %xmm4\0A\09pxor %xmm6, %xmm3\0A\09pxor %xmm5, %xmm2\0A\09pxor %xmm4, %xmm1\0A\09pxor %xmm3, %xmm0\0A\09pxor %xmm2, %xmm6\0A\09pxor %xmm2, %xmm5\0A\09pxor %xmm2, %xmm3\0A\09pxor %xmm2, %xmm1\0A\09pxor %xmm1, %xmm5\0A\09pxor %xmm1, %xmm2\0A\09pxor %xmm2, %xmm1\0A\09pxor %xmm0, %xmm7\0A\09pxor %xmm0, %xmm4\0A\09pxor %xmm0, %xmm3\0A\09pxor %xmm0, %xmm2\0A\09pxor %xmm2, %xmm0\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
adrreg0reg1(r0, r1, x0, x1, p0, p1) unsigned int r0, r1;
unsigned int *p0, *p1;
{
  if ((p0[10000000]) <= r1)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<adrreg0reg1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    0x2625a00(%rax),%eax
cmp    -0xc(%rbp),%eax
ja     1137 <adrreg0reg1+0x37>
movl   $0x1,-0x4(%rbp)
jmp    113e <adrreg0reg1+0x3e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adrreg0reg1>:
xor    %eax,%eax
cmp    %esi,0x2625a00(%r8)
setbe  %al
ret

LLVM IR (-O0):
define i32 @adrreg0reg1(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32*, i32** %12
%15 = getelementptr inbounds i32, i32* %14, i64 10000000
%16 = load i32, i32* %15
%17 = load i32, i32* %9
%18 = icmp ule i32 %16, %17
br i1 %18, label %19, label %20
19: ; preds = %6
store i32 1, i32* %7
br label %21
20: ; preds = %6
store i32 0, i32* %7
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %7
ret i32 %22
}

LLVM IR (-O2):
define i32 @adrreg0reg1(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture %4, i32* nocapture readnone %5) {
%7 = getelementptr inbounds i32, i32* %4, i64 10000000
%8 = load i32, i32* %7
%9 = icmp ule i32 %8, %1
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ dologout(int /*<<< orphan*/);
int /*<<< orphan*/ reply(int, char *, char const *);
int /*<<< orphan*/ reply_noformat(int, char *);
void fatalerror(const char *s) {
  reply(451, "Error in server: %s\n", s);
  reply_noformat(221, "Closing connection due to server error.");
  dologout(0);
}


x86 assembly (clang, -O0):
<fatalerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
mov    $0x1c3,%edi
lea    0xeb4(%rip),%rsi
call   1050 <reply@plt>
mov    $0xdd,%edi
lea    0xeb8(%rip),%rsi
call   1040 <reply_noformat@plt>
xor    %edi,%edi
call   1030 <dologout@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fatalerror>:
push   %rax
mov    %rdi,%rdx
lea    0xec5(%rip),%rsi
mov    $0x1c3,%edi
call   1050 <reply@plt>
lea    0xec9(%rip),%rsi
mov    $0xdd,%edi
call   1040 <reply_noformat@plt>
xor    %edi,%edi
pop    %rax
jmp    1030 <dologout@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"Error in server: %s\0A\00"
@.str.1 = [40 x i8] c"Closing connection due to server error.\00"
define void @fatalerror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @reply(i32 451, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @reply_noformat(i32 221, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
%6 = call i32 @dologout(i32 0)
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"Error in server: %s\0A\00"
@.str.1 = [40 x i8] c"Closing connection due to server error.\00"
define void @fatalerror(i8* %0) {
%2 = tail call i32 @reply(i32 451, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @reply_noformat(i32 221, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i32 @dologout(i32 0)
ret void
}
int dect_get_slot(unsigned char *packet) {
  int slot = -1;
  if ((packet[5] & 0xe0) == 0x80) {
    if ((packet[6] & 0xf0) == 0x00) {
      slot = packet[6] & 0x0f;
    }
  }
  return slot;
}


x86 assembly (clang, -O0):
<dect_get_slot>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0xffffffff,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x5(%rax),%eax
and    $0xe0,%eax
cmp    $0x80,%eax
jne    1150 <dect_get_slot+0x50>
mov    -0x8(%rbp),%rax
movzbl 0x6(%rax),%eax
and    $0xf0,%eax
cmp    $0x0,%eax
jne    114b <dect_get_slot+0x4b>
mov    -0x8(%rbp),%rax
movzbl 0x6(%rax),%eax
and    $0xf,%eax
mov    %eax,-0xc(%rbp)
jmp    1150 <dect_get_slot+0x50>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dect_get_slot>:
mov    0x5(%rdi),%cl
and    $0xe0,%cl
mov    $0xffffffff,%eax
cmp    $0x80,%cl
jne    1122 <dect_get_slot+0x22>
movzbl 0x6(%rdi),%ecx
mov    %ecx,%eax
and    $0xfffffff0,%eax
and    $0xf,%ecx
neg    %eax
sbb    %eax,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @dect_get_slot(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 -1, i32* %3
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 5
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = and i32 %7, 224
%9 = icmp eq i32 %8, 128
br i1 %9, label %10, label %24
10: ; preds = %1
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i64 6
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
%15 = and i32 %14, 240
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %23
17: ; preds = %10
%18 = load i8*, i8** %2
%19 = getelementptr inbounds i8, i8* %18, i64 6
%20 = load i8, i8* %19
%21 = zext i8 %20 to i32
%22 = and i32 %21, 15
store i32 %22, i32* %3
br label %23
23: ; preds = %17, %10
br label %24
24: ; preds = %23, %1
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @dect_get_slot(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 5
%3 = load i8, i8* %2
%4 = and i8 %3, -32
%5 = icmp eq i8 %4, -128
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = getelementptr inbounds i8, i8* %0, i64 6
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
%10 = and i32 %9, 240
%11 = icmp eq i32 %10, 0
%12 = and i32 %9, 15
%13 = select i1 %11, i32 %12, i32 -1
br label %14
14: ; preds = %6, %1
%15 = phi i32 [ -1, %1 ], [ %13, %6 ]
ret i32 %15
}
unsigned char convertASCIIHexLow(unsigned char temp) {
  unsigned char res = temp & 0x0F;
  if (res <= 9)
    return res + 0x30;
  else
    return res + 0x37;
}


x86 assembly (clang, -O0):
<convertASCIIHexLow>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
and    $0xf,%eax
mov    %al,-0x3(%rbp)
movzbl -0x3(%rbp),%eax
cmp    $0x9,%eax
jg     1130 <convertASCIIHexLow+0x30>
movzbl -0x3(%rbp),%eax
add    $0x30,%eax
mov    %al,-0x1(%rbp)
jmp    113a <convertASCIIHexLow+0x3a>
movzbl -0x3(%rbp),%eax
add    $0x37,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<convertASCIIHexLow>:
and    $0xf,%dil
lea    0x30(%rdi),%eax
lea    0x37(%rdi),%ecx
cmp    $0xa,%dil
movzbl %al,%edx
movzbl %cl,%eax
cmovb  %edx,%eax
ret

LLVM IR (-O0):
define zeroext i8 @convertASCIIHexLow(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = and i32 %6, 15
%8 = trunc i32 %7 to i8
store i8 %8, i8* %4
%9 = load i8, i8* %4
%10 = zext i8 %9 to i32
%11 = icmp sle i32 %10, 9
br i1 %11, label %12, label %17
12: ; preds = %1
%13 = load i8, i8* %4
%14 = zext i8 %13 to i32
%15 = add nsw i32 %14, 48
%16 = trunc i32 %15 to i8
store i8 %16, i8* %2
br label %22
17: ; preds = %1
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = add nsw i32 %19, 55
%21 = trunc i32 %20 to i8
store i8 %21, i8* %2
br label %22
22: ; preds = %17, %12
%23 = load i8, i8* %2
ret i8 %23
}

LLVM IR (-O2):
define zeroext i8 @convertASCIIHexLow(i8 zeroext %0) {
%2 = and i8 %0, 15
%3 = icmp ult i8 %2, 10
%4 = or i8 %2, 48
%5 = add nuw nsw i8 %2, 55
%6 = select i1 %3, i8 %4, i8 %5
ret i8 %6
}
/* Variables and functions */
int /*<<< orphan*/ eraseScoreboard();
int /*<<< orphan*/ printMatrixOnBoardXY(char const **, int, int);
int /*<<< orphan*/ usleep(int);
void drawFlagAndWait(char const *flag[7], int x, int y, int centiSeconds) {
  eraseScoreboard();
  printMatrixOnBoardXY(flag, x, y);
  usleep(centiSeconds * 10000);
}


x86 assembly (clang, -O0):
<drawFlagAndWait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    $0x0,%al
call   1040 <eraseScoreboard@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <printMatrixOnBoardXY@plt>
imul   $0x2710,-0x14(%rbp),%edi
call   1050 <usleep@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawFlagAndWait>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%r14d
mov    %edx,%r15d
mov    %esi,%ebx
mov    %rdi,%rbp
xor    %eax,%eax
call   1040 <eraseScoreboard@plt>
mov    %rbp,%rdi
mov    %ebx,%esi
mov    %r15d,%edx
call   1030 <printMatrixOnBoardXY@plt>
imul   $0x2710,%r14d,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1050 <usleep@plt>

LLVM IR (-O0):
define void @drawFlagAndWait(i8** %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8** %0, i8*** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = call i32 (...) @eraseScoreboard()
%10 = load i8**, i8*** %5
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = call i32 @printMatrixOnBoardXY(i8** %10, i32 %11, i32 %12)
%14 = load i32, i32* %8
%15 = mul nsw i32 %14, 10000
%16 = call i32 @usleep(i32 %15)
ret void
}

LLVM IR (-O2):
define void @drawFlagAndWait(i8** %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 (...) @eraseScoreboard()
%6 = tail call i32 @printMatrixOnBoardXY(i8** %0, i32 %1, i32 %2)
%7 = mul nsw i32 %3, 10000
%8 = tail call i32 @usleep(i32 %7)
ret void
}