xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ COND_GT();
int /*<<< orphan*/ EA_A7_PI_8();
int /*<<< orphan*/ m68ki_write_8(int /*<<< orphan*/, int);
void m68k_op_sgt_8_pi7(void) {
  m68ki_write_8(EA_A7_PI_8(), COND_GT() ? 0xff : 0);
}


x86 assembly (clang, -O0):
<m68k_op_sgt_8_pi7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <EA_A7_PI_8@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <COND_GT@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rcx
xor    %esi,%esi
mov    $0xff,%eax
cmp    $0x0,%rcx
cmovne %eax,%esi
call   1050 <m68ki_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_sgt_8_pi7>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %eax,%eax
call   1030 <EA_A7_PI_8@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <COND_GT@plt>
test   %rax,%rax
mov    $0xff,%esi
cmove  %ebp,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <m68ki_write_8@plt>

LLVM IR (-O0):
define void @m68k_op_sgt_8_pi7() {
%1 = call i32 (...) @EA_A7_PI_8()
%2 = call i64 (...) @COND_GT()
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 255, i32 0
%6 = call i32 @m68ki_write_8(i32 %1, i32 %5)
ret void
}

LLVM IR (-O2):
define void @m68k_op_sgt_8_pi7() {
%1 = tail call i32 (...) @EA_A7_PI_8()
%2 = tail call i64 (...) @COND_GT()
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 0, i32 255
%5 = tail call i32 @m68ki_write_8(i32 %1, i32 %4)
ret void
}
/* Variables and functions */
char *strrchr(const char *s, int c) {
  char *fnd = NULL;
  while (*s) {
    if (*s == c)
      fnd = (char *)s;
    s++;
  }
  return fnd;
}


x86 assembly (clang, -O0):
<strrchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1149 <strrchr+0x49>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    -0xc(%rbp),%eax
jne    1138 <strrchr+0x38>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1113 <strrchr+0x13>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strrchr>:
mov    (%rdi),%cl
xor    %eax,%eax
test   %cl,%cl
je     1125 <strrchr+0x25>
nopl   0x0(%rax,%rax,1)
movsbl %cl,%ecx
cmp    %esi,%ecx
cmove  %rdi,%rax
movzbl 0x1(%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <strrchr+0x10>
ret

LLVM IR (-O0):
define i8* @strrchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
store i8* null, i8** %5
br label %6
6: ; preds = %18, %2
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = load i32, i32* %4
%15 = icmp eq i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %10
%17 = load i8*, i8** %3
store i8* %17, i8** %5
br label %18
18: ; preds = %16, %10
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %3
br label %6
21: ; preds = %6
%22 = load i8*, i8** %5
ret i8* %22
}

LLVM IR (-O2):
define i8* @strrchr(i8* %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %13, %5 ], [ %3, %2 ]
%7 = phi i8* [ %11, %5 ], [ null, %2 ]
%8 = phi i8* [ %12, %5 ], [ %0, %2 ]
%9 = sext i8 %6 to i32
%10 = icmp eq i32 %9, %1
%11 = select i1 %10, i8* %8, i8* %7
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %2
%16 = phi i8* [ null, %2 ], [ %11, %5 ]
ret i8* %16
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
int main(void) {
  while (1) {
    sleep(1);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <sleep@plt>
jmp    111f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x1,%edi
call   1030 <sleep@plt>
jmp    1120 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0, %2
%3 = call i32 @sleep(i32 1)
br label %2
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 @sleep(i32 1)
br label %1
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ read(int, void *, size_t);
ssize_t i2c_read(int fd, void *buf, size_t count) {
  return read(fd, buf, count);
}


x86 assembly (clang, -O0):
<i2c_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <read@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_read>:
jmp    1030 <read@plt>

LLVM IR (-O0):
define i32 @i2c_read(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @read(i32 %7, i8* %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @i2c_read(i32 %0, i8* nocapture %1, i64 %2) {
%4 = tail call i32 @read(i32 %0, i8* %1, i64 %2)
ret i32 %4
}
int test_imm_B8uint16_mem(unsigned short *val) {
  return ((*val) & (-0xB8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B8uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffff48,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B8uint16_mem>:
movzwl (%rdi),%eax
test   $0xff48,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B8uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -184
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_B8uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -184
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int munlockall(void) {
  long __res;
  __asm__ volatile("int $0x80" : "=a"(__res) : "0"(153));
  do {
    return (int)(__res);
  } while (0);
}


x86 assembly (clang, -O0):
<munlockall>:
push   %rbp
mov    %rsp,%rbp
mov    $0x99,%eax
int    $0x80
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<munlockall>:
mov    $0x99,%eax
int    $0x80
ret

LLVM IR (-O0):
define i32 @munlockall() {
%1 = alloca i64
%2 = call i64 asm sideeffect "int $$0x80", "={ax},0,~{dirflag},~{fpsr},~{flags}"(i64 153)
store i64 %2, i64* %1
br label %3
3: ; preds = %0
%4 = load i64, i64* %1
%5 = trunc i64 %4 to i32
br label %6
6: ; preds = %3
ret i32 %5
}

LLVM IR (-O2):
define i32 @munlockall() {
%1 = tail call i64 asm sideeffect "int $$0x80", "={ax},0,~{dirflag},~{fpsr},~{flags}"(i64 153)
%2 = trunc i64 %1 to i32
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  printf("Hello World");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"Hello World\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"Hello World\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
void acpi_extract_apple_properties(struct acpi_device *adev) {}


x86 assembly (clang, -O0):
<acpi_extract_apple_properties>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<acpi_extract_apple_properties>:
ret

LLVM IR (-O0):
%struct.acpi_device = type opaque
define void @acpi_extract_apple_properties(%struct.acpi_device* %0) {
%2 = alloca %struct.acpi_device*
store %struct.acpi_device* %0, %struct.acpi_device** %2
ret void
}

LLVM IR (-O2):
%struct.acpi_device = type opaque
define void @acpi_extract_apple_properties(%struct.acpi_device* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ xsi_register_didat(char *, char *);
extern void work_a_0408172235_2320432267_init() {
  xsi_register_didat(
      "work_a_0408172235_2320432267",
      "isim/Fetch_tb_isim_beh.exe.sim/work/a_0408172235_2320432267.didat");
}


x86 assembly (clang, -O0):
<work_a_0408172235_2320432267_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xefb(%rip),%rsi
call   1030 <xsi_register_didat@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<work_a_0408172235_2320432267_init>:
lea    0xee9(%rip),%rdi
lea    0xeff(%rip),%rsi
jmp    1030 <xsi_register_didat@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"work_a_0408172235_2320432267\00"
@.str.1 = [66 x i8] c"isim/Fetch_tb_isim_beh.exe.sim/work/a_0408172235_2320432267.didat\00"
define void @work_a_0408172235_2320432267_init() {
%1 = call i32 @xsi_register_didat(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([66 x i8], [66 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"work_a_0408172235_2320432267\00"
@.str.1 = [66 x i8] c"isim/Fetch_tb_isim_beh.exe.sim/work/a_0408172235_2320432267.didat\00"
define void @work_a_0408172235_2320432267_init() {
%1 = tail call i32 @xsi_register_didat(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([66 x i8], [66 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef long long *__m128i;

/* Variables and functions */
long long __attribute__((__always___, __nodebug__))
_mm_cvtsi128_si64(__m128i a) {
  return a[0];
}


x86 assembly (clang, -O0):
<_mm_cvtsi128_si64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mm_cvtsi128_si64>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
define i64 @_mm_cvtsi128_si64(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = getelementptr inbounds i64, i64* %3, i64 0
%5 = load i64, i64* %4
ret i64 %5
}

LLVM IR (-O2):
define i64 @_mm_cvtsi128_si64(i64* nocapture %0) {
%2 = load i64, i64* %0
ret i64 %2
}
/* Variables and functions */
void *allocate_type(int, int /*<<< orphan*/);
void *allocate(int size) { return allocate_type(size, 0); }


x86 assembly (clang, -O0):
<allocate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1030 <allocate_type@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<allocate>:
xor    %esi,%esi
jmp    1030 <allocate_type@plt>

LLVM IR (-O0):
define i8* @allocate(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @allocate_type(i32 %3, i32 0)
ret i8* %4
}

LLVM IR (-O2):
define i8* @allocate(i32 %0) {
%2 = tail call i8* @allocate_type(i32 %0, i32 0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void show_usage(char *thisname) {
  printf("usage: %s <font_repo> <addr> <outbmp> <bit_per_pix>\n", thisname);
}


x86 assembly (clang, -O0):
<show_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_usage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [53 x i8] c"usage: %s <font_repo> <addr> <outbmp> <bit_per_pix>\0A\00"
define void @show_usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [53 x i8] c"usage: %s <font_repo> <addr> <outbmp> <bit_per_pix>\0A\00"
define void @show_usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FCEU_DispMessage(char *);
void FCEUD_SaveStateAs(void) { FCEU_DispMessage("Not implemented."); }


x86 assembly (clang, -O0):
<FCEUD_SaveStateAs>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <FCEU_DispMessage@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FCEUD_SaveStateAs>:
lea    0xee9(%rip),%rdi
jmp    1030 <FCEU_DispMessage@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"Not implemented.\00"
define void @FCEUD_SaveStateAs() {
%1 = call i32 @FCEU_DispMessage(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"Not implemented.\00"
define void @FCEUD_SaveStateAs() {
%1 = tail call i32 @FCEU_DispMessage(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}
void fa186(int n) {
  {
    int b[n];
    {
      int c[n];
      0;
    }
    {
      int d[n];
      0;
    };
    int e[n];
    0;
  };
  {
    int f[n];
    {
      int g[n];
      0;
    };
  a:
    goto a;
    {
      int h[n];
      0;
    };
    ;
    int i[n];
    0;
  };
  ;
  int j[n];
  0;
}


x86 assembly (clang, -O0):
<fa186>:
push   %rbp
mov    %rsp,%rbp
sub    $0x90,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x10(%rbp)
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x20(%rbp)
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,%rsp
mov    -0x4(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x30(%rbp)
mov    %rax,-0x38(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,%rsp
mov    -0x4(%rbp),%eax
mov    %rax,-0x40(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
mov    -0x4(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x48(%rbp)
mov    %rax,-0x50(%rbp)
mov    -0x4(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x58(%rbp)
mov    %rax,-0x60(%rbp)
mov    -0x58(%rbp),%rax
mov    %rax,%rsp
jmp    1177 <fa186+0x77>

x86 assembly (clang, -O2):
<fa186>:
jmp    1100 <fa186>

LLVM IR (-O0):
define void @fa186(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i64
%10 = alloca i8*
%11 = alloca i64
%12 = alloca i8*
%13 = alloca i64
%14 = alloca i8*
%15 = alloca i64
%16 = alloca i64
%17 = alloca i8*
%18 = alloca i64
store i32 %0, i32* %2
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
%21 = call i8* @llvm.stacksave()
store i8* %21, i8** %3
%22 = alloca i32, i64 %20
store i64 %20, i64* %4
%23 = load i32, i32* %2
%24 = zext i32 %23 to i64
%25 = call i8* @llvm.stacksave()
store i8* %25, i8** %5
%26 = alloca i32, i64 %24
store i64 %24, i64* %6
%27 = load i8*, i8** %5
%28 = load i32, i32* %2
%29 = zext i32 %28 to i64
%30 = call i8* @llvm.stacksave()
store i8* %30, i8** %7
%31 = alloca i32, i64 %29
store i64 %29, i64* %8
%32 = load i8*, i8** %7
%33 = load i32, i32* %2
%34 = zext i32 %33 to i64
%35 = alloca i32, i64 %34
store i64 %34, i64* %9
%36 = load i8*, i8** %3
%37 = load i32, i32* %2
%38 = zext i32 %37 to i64
%39 = call i8* @llvm.stacksave()
store i8* %39, i8** %10
%40 = alloca i32, i64 %38
store i64 %38, i64* %11
%41 = load i32, i32* %2
%42 = zext i32 %41 to i64
%43 = call i8* @llvm.stacksave()
store i8* %43, i8** %12
%44 = alloca i32, i64 %42
store i64 %42, i64* %13
%45 = load i8*, i8** %12
br label %46
46: ; preds = %46, %1
br label %46
47: ; No predecessors!
%48 = load i32, i32* %2
%49 = zext i32 %48 to i64
%50 = call i8* @llvm.stacksave()
store i8* %50, i8** %14
%51 = alloca i32, i64 %49
store i64 %49, i64* %15
%52 = load i8*, i8** %14
%53 = load i32, i32* %2
%54 = zext i32 %53 to i64
%55 = alloca i32, i64 %54
store i64 %54, i64* %16
%56 = load i8*, i8** %10
%57 = load i32, i32* %2
%58 = zext i32 %57 to i64
%59 = call i8* @llvm.stacksave()
store i8* %59, i8** %17
%60 = alloca i32, i64 %58
store i64 %58, i64* %18
%61 = load i8*, i8** %17
ret void
}

LLVM IR (-O2):
define void @fa186(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ uart0_send_char(char);
void uart0_send_linefeed(void) { uart0_send_char('\n'); }


x86 assembly (clang, -O0):
<uart0_send_linefeed>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
call   1030 <uart0_send_char@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart0_send_linefeed>:
mov    $0xa,%edi
jmp    1030 <uart0_send_char@plt>

LLVM IR (-O0):
define void @uart0_send_linefeed() {
%1 = call i32 @uart0_send_char(i8 signext 10)
ret void
}

LLVM IR (-O2):
define void @uart0_send_linefeed() {
%1 = tail call i32 @uart0_send_char(i8 signext 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, char *, char *);
int system(char *);
int initd(char *prog, char *ss) {
  char cmd[80];
  sprintf(cmd, "/etc/init.d/iot_%s_initd %s", prog, ss);
  return (system(cmd));
}


x86 assembly (clang, -O0):
<initd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x60(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xebd(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x60(%rbp),%rdi
call   1030 <system@plt>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initd>:
push   %rbx
sub    $0x50,%rsp
mov    %rsi,%rcx
mov    %rdi,%rdx
lea    0xece(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <system@plt>
add    $0x50,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"/etc/init.d/iot_%s_initd %s\00"
define i32 @initd(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca [80 x i8]
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = getelementptr inbounds [80 x i8], [80 x i8]* %5, i64 0, i64 0
%7 = load i8*, i8** %3
%8 = load i8*, i8** %4
%9 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %7, i8* %8)
%10 = getelementptr inbounds [80 x i8], [80 x i8]* %5, i64 0, i64 0
%11 = call i32 @system(i8* %10)
ret i32 %11
}

LLVM IR (-O2):
@.str = [28 x i8] c"/etc/init.d/iot_%s_initd %s\00"
define i32 @initd(i8* %0, i8* %1) {
%3 = alloca [80 x i8]
%4 = getelementptr inbounds [80 x i8], [80 x i8]* %3, i64 0, i64 0
%5 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%6 = call i32 @system(i8* %4)
ret i32 %6
}
/* Variables and functions */
bool contains(int needle) { return false; }


x86 assembly (clang, -O0):
<contains>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<contains>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @contains(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @contains(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  int i;
  printf("\n\tWelcome back my friends to the show that never ends\n");
  printf("\tWe're so glad you could attend, come inside, come inside\n\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
lea    0xefe(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf12(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [55 x i8] c"\0A\09Welcome back my friends to the show that never ends\0A\00"
@.str.1 = [60 x i8] c"\09We're so glad you could attend, come inside, come inside\0A\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 @printf(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @printf(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [54 x i8] c"\0A\09Welcome back my friends to the show that never ends\00"
@str.2 = [59 x i8] c"\09We're so glad you could attend, come inside, come inside\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([54 x i8], [54 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([59 x i8], [59 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ atoi(char *);
int /*<<< orphan*/ gets(char *);
int hop(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int do_hop() {
  char segment[64];
  printf("New Segment Number (0-7)? ");
  gets(segment);
  return hop(atoi(segment));
}


x86 assembly (clang, -O0):
<do_hop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
lea    0xeb1(%rip),%rdi
call   1040 <printf@plt>
lea    -0x40(%rbp),%rdi
call   1050 <gets@plt>
lea    -0x40(%rbp),%rdi
call   1060 <atoi@plt>
mov    %eax,%edi
call   1030 <hop@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_hop>:
push   %rbx
sub    $0x40,%rsp
lea    0xeb4(%rip),%rdi
call   1040 <printf@plt>
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1050 <gets@plt>
mov    %rbx,%rdi
call   1060 <atoi@plt>
mov    %eax,%edi
call   1030 <hop@plt>
add    $0x40,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"New Segment Number (0-7)? \00"
define i32 @do_hop() {
%1 = alloca [64 x i8]
%2 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%3 = getelementptr inbounds [64 x i8], [64 x i8]* %1, i64 0, i64 0
%4 = call i32 @gets(i8* %3)
%5 = getelementptr inbounds [64 x i8], [64 x i8]* %1, i64 0, i64 0
%6 = call i32 @atoi(i8* %5)
%7 = call i32 @hop(i32 %6)
ret i32 %7
}

LLVM IR (-O2):
@.str = [27 x i8] c"New Segment Number (0-7)? \00"
define i32 @do_hop() {
%1 = alloca [64 x i8]
%2 = getelementptr inbounds [64 x i8], [64 x i8]* %1, i64 0, i64 0
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @gets(i8* %2)
%5 = call i32 @atoi(i8* %2)
%6 = call i32 @hop(i32 %5)
ret i32 %6
}
/* Type definitions */
struct sockaddr_in {
  int dummy;
};
struct sockaddr {
  int dummy;
};
typedef int /*<<< orphan*/ sin;

/* Variables and functions */
int accept(int, struct sockaddr *, int *);
int tcp_waitforconnect(int listenfd) {
  struct sockaddr_in sin;
  int alen = sizeof(sin);
  int s;
  while ((s = accept(listenfd, (struct sockaddr *)&sin, &alen)) < 0)
    ;
  return s;
}


x86 assembly (clang, -O0):
<tcp_waitforconnect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x4,-0xc(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1030 <accept@plt>
mov    %eax,-0x10(%rbp)
cmp    $0x0,%eax
jge    1143 <tcp_waitforconnect+0x33>
jmp    1122 <tcp_waitforconnect+0x12>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcp_waitforconnect>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
movl   $0x4,0x4(%rsp)
lea    0x8(%rsp),%r14
lea    0x4(%rsp),%r15
nopl   (%rax)
mov    %ebx,%edi
mov    %r14,%rsi
mov    %r15,%rdx
call   1030 <accept@plt>
test   %eax,%eax
js     1130 <tcp_waitforconnect+0x20>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.sockaddr_in = type { i32 }
%struct.sockaddr = type { i32 }
define i32 @tcp_waitforconnect(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.sockaddr_in
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
store i32 4, i32* %4
br label %6
6: ; preds = %11, %1
%7 = load i32, i32* %2
%8 = bitcast %struct.sockaddr_in* %3 to %struct.sockaddr*
%9 = call i32 @accept(i32 %7, %struct.sockaddr* %8, i32* %4)
store i32 %9, i32* %5
%10 = icmp slt i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %6
br label %6
12: ; preds = %6
%13 = load i32, i32* %5
ret i32 %13
}

LLVM IR (-O2):
%struct.sockaddr_in = type { i32 }
%struct.sockaddr = type { i32 }
define i32 @tcp_waitforconnect(i32 %0) {
%2 = alloca %struct.sockaddr_in
%3 = alloca i32
%4 = bitcast %struct.sockaddr_in* %2 to i8*
%5 = bitcast i32* %3 to i8*
store i32 4, i32* %3
%6 = bitcast %struct.sockaddr_in* %2 to %struct.sockaddr*
br label %7
7: ; preds = %7, %1
%8 = call i32 @accept(i32 %0, %struct.sockaddr* %6, i32* %3)
%9 = icmp slt i32 %8, 0
br i1 %9, label %7, label %10
10: ; preds = %7
ret i32 %8
}
void n_init_network(struct Jelly *jelly) {}


x86 assembly (clang, -O0):
<n_init_network>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<n_init_network>:
ret

LLVM IR (-O0):
%struct.Jelly = type opaque
define void @n_init_network(%struct.Jelly* %0) {
%2 = alloca %struct.Jelly*
store %struct.Jelly* %0, %struct.Jelly** %2
ret void
}

LLVM IR (-O2):
%struct.Jelly = type opaque
define void @n_init_network(%struct.Jelly* nocapture %0) {
ret void
}
unsigned ZSTD_versionNumber(void) { return (0 * 100 * 100 + 0 * 100 + 2); }


x86 assembly (clang, -O0):
<ZSTD_versionNumber>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZSTD_versionNumber>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @ZSTD_versionNumber() {
ret i32 2
}

LLVM IR (-O2):
define i32 @ZSTD_versionNumber() {
ret i32 2
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int x;
  int c;
  x = __VERIFIER_nondet_int();
  c = __VERIFIER_nondet_int();
  if (c < 0) {
    while (x + c >= 0) {
      x = x - c;
      c = c - 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    116d <main+0x5d>
jmp    1142 <main+0x32>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
cmp    $0x0,%eax
jl     1168 <main+0x58>
mov    -0x8(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1142 <main+0x32>
jmp    116d <main+0x5d>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %4, i32* %2
%5 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %21
8: ; preds = %0
br label %9
9: ; preds = %14, %8
%10 = load i32, i32* %2
%11 = load i32, i32* %3
%12 = add nsw i32 %10, %11
%13 = icmp sge i32 %12, 0
br i1 %13, label %14, label %20
14: ; preds = %9
%15 = load i32, i32* %2
%16 = load i32, i32* %3
%17 = sub nsw i32 %15, %16
store i32 %17, i32* %2
%18 = load i32, i32* %3
%19 = sub nsw i32 %18, 1
store i32 %19, i32* %3
br label %9
20: ; preds = %9
br label %21
21: ; preds = %20, %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int __get_array_length(int /*<<< orphan*/ *);
int __infer_nondet_int();
int swprintf(wchar_t *s, size_t n, const wchar_t *format, ...) {
  int res;
  int size1;
  size1 = __get_array_length(s);
  res = __infer_nondet_int();
  if (res < 0)
    while (1)
      ;
  return res;
}


x86 assembly (clang, -O0):
<swprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <__get_array_length@plt>
mov    %eax,-0x20(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_int@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jge    115e <swprintf+0x3e>
jmp    1159 <swprintf+0x39>
jmp    1159 <swprintf+0x39>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swprintf>:
push   %rax
call   1040 <__get_array_length@plt>
xor    %eax,%eax
call   1030 <__infer_nondet_int@plt>
test   %eax,%eax
js     1140 <swprintf+0x20>
pop    %rcx
ret
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
jmp    1140 <swprintf+0x20>

LLVM IR (-O0):
define i32 @swprintf(i32* %0, i64 %1, i32* %2, ...) {
%4 = alloca i32*
%5 = alloca i64
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %4
store i64 %1, i64* %5
store i32* %2, i32** %6
%9 = load i32*, i32** %4
%10 = call i32 @__get_array_length(i32* %9)
store i32 %10, i32* %8
%11 = call i32 (...) @__infer_nondet_int()
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %3
br label %15
15: ; preds = %14, %15
br label %15
16: ; preds = %3
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
define i32 @swprintf(i32* %0, i64 %1, i32* nocapture readnone %2, ...) {
%4 = tail call i32 @__get_array_length(i32* %0)
%5 = tail call i32 (...) @__infer_nondet_int()
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %3, %7
br label %7
8: ; preds = %3
ret i32 %5
}
int test4(unsigned int x) {
  int y;
  y = (sizeof(int) * 8) - 1;
  return -((int)(x >> y));
}


x86 assembly (clang, -O0):
<test4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1f,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
mov    %eax,%ecx
xor    %eax,%eax
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test4>:
mov    %edi,%eax
sar    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @test4(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 31, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = lshr i32 %4, %5
%7 = sub nsw i32 0, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @test4(i32 %0) {
%2 = ashr i32 %0, 31
ret i32 %2
}
/* Variables and functions */
long long slifibonacci(int);
unsigned long long ulifibonacci(int);
int main() {
  unsigned long long int ulin;
  signed long long int slin;
  ulin = ulifibonacci(13);
  ulin = 0;
  slin = slifibonacci(13);
  slin = 0;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xd,%edi
call   1040 <ulifibonacci@plt>
mov    %rax,-0x10(%rbp)
movq   $0x0,-0x10(%rbp)
mov    $0xd,%edi
call   1030 <slifibonacci@plt>
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x18(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xd,%edi
call   1040 <ulifibonacci@plt>
mov    $0xd,%edi
call   1030 <slifibonacci@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64
store i32 0, i32* %1
%4 = call i64 @ulifibonacci(i32 13)
store i64 %4, i64* %2
store i64 0, i64* %2
%5 = call i64 @slifibonacci(i32 13)
store i64 %5, i64* %3
store i64 0, i64* %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @ulifibonacci(i32 13)
%2 = tail call i64 @slifibonacci(i32 13)
ret i32 0
}
/* Type definitions */
struct udev_queue {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *open_queue_file(struct udev_queue *, unsigned long long *);
int udev_queue_get_udev_is_active(struct udev_queue *udev_queue) {
  unsigned long long int seqnum_start;
  FILE *queue_file;
  queue_file = open_queue_file(udev_queue, &seqnum_start);
  if (queue_file == NULL)
    return 0;
  fclose(queue_file);
  return 1;
}


x86 assembly (clang, -O0):
<udev_queue_get_udev_is_active>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1040 <open_queue_file@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1154 <udev_queue_get_udev_is_active+0x34>
movl   $0x0,-0x4(%rbp)
jmp    1164 <udev_queue_get_udev_is_active+0x44>
mov    -0x20(%rbp),%rdi
call   1030 <fclose@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<udev_queue_get_udev_is_active>:
push   %rax
mov    %rsp,%rsi
call   1040 <open_queue_file@plt>
test   %rax,%rax
je     113d <udev_queue_get_udev_is_active+0x1d>
mov    %rax,%rdi
call   1030 <fclose@plt>
mov    $0x1,%eax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.udev_queue = type { i32 }
define i32 @udev_queue_get_udev_is_active(%struct.udev_queue* %0) {
%2 = alloca i32
%3 = alloca %struct.udev_queue*
%4 = alloca i64
%5 = alloca i32*
store %struct.udev_queue* %0, %struct.udev_queue** %3
%6 = load %struct.udev_queue*, %struct.udev_queue** %3
%7 = call i32* @open_queue_file(%struct.udev_queue* %6, i64* %4)
store i32* %7, i32** %5
%8 = load i32*, i32** %5
%9 = icmp eq i32* %8, null
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 0, i32* %2
br label %14
11: ; preds = %1
%12 = load i32*, i32** %5
%13 = call i32 @fclose(i32* %12)
store i32 1, i32* %2
br label %14
14: ; preds = %11, %10
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
%struct.udev_queue = type { i32 }
define i32 @udev_queue_get_udev_is_active(%struct.udev_queue* %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = call i32* @open_queue_file(%struct.udev_queue* %0, i64* %2)
%5 = icmp eq i32* %4, null
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = call i32 @fclose(i32* %4)
br label %8
8: ; preds = %1, %6
%9 = phi i32 [ 1, %6 ], [ 0, %1 ]
ret i32 %9
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t dd_reg(uint32_t address) { return (address & 0xff) >> 2; }


x86 assembly (clang, -O0):
<dd_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
sar    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dd_reg>:
mov    %edi,%eax
shr    $0x2,%eax
and    $0x3f,%eax
ret

LLVM IR (-O0):
define i32 @dd_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
%5 = ashr i32 %4, 2
ret i32 %5
}

LLVM IR (-O2):
define i32 @dd_reg(i32 %0) {
%2 = lshr i32 %0, 2
%3 = and i32 %2, 63
ret i32 %3
}
/* Variables and functions */
int sin(float);
int sqrt(float);
float funcl(float x) { return (float)(sqrt(x) / sin(x)); }


x86 assembly (clang, -O0):
<funcl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1040 <sqrt@plt>
mov    %eax,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sin@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
cltd
idiv   %ecx
cvtsi2ss %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<funcl>:
push   %rbx
sub    $0x10,%rsp
movss  %xmm0,0xc(%rsp)
call   1040 <sqrt@plt>
mov    %eax,%ebx
movss  0xc(%rsp),%xmm0
call   1030 <sin@plt>
mov    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
xorps  %xmm0,%xmm0
cvtsi2ss %eax,%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define float @funcl(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 @sqrt(float %3)
%5 = load float, float* %2
%6 = call i32 @sin(float %5)
%7 = sdiv i32 %4, %6
%8 = sitofp i32 %7 to float
ret float %8
}

LLVM IR (-O2):
define float @funcl(float %0) {
%2 = tail call i32 @sqrt(float %0)
%3 = tail call i32 @sin(float %0)
%4 = sdiv i32 %2, %3
%5 = sitofp i32 %4 to float
ret float %5
}
/* Variables and functions */
int /*<<< orphan*/ set_io_bit(int, int);
void TOSH_MAKE_INT1_OUTPUT() { set_io_bit(0x45, 1); }


x86 assembly (clang, -O0):
<TOSH_MAKE_INT1_OUTPUT>:
push   %rbp
mov    %rsp,%rbp
mov    $0x45,%edi
mov    $0x1,%esi
call   1030 <set_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_MAKE_INT1_OUTPUT>:
mov    $0x45,%edi
mov    $0x1,%esi
jmp    1030 <set_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_MAKE_INT1_OUTPUT() {
%1 = call i32 @set_io_bit(i32 69, i32 1)
ret void
}

LLVM IR (-O2):
define void @TOSH_MAKE_INT1_OUTPUT() {
%1 = tail call i32 @set_io_bit(i32 69, i32 1)
ret void
}
int test_imm_CDuint8_reg(unsigned char val) {
  return ((val) & (-0xCD << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CDuint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffff33,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CDuint8_reg>:
test   $0x33,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CDuint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -205
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_CDuint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 51
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int *, char const *, int);
int32_t read_int3(const char *buf) {
  int32_t tmp = 0;
  memcpy(&tmp, buf, 3);
  if (tmp & 0x00800000) {
    tmp |= 0xFF000000;
  }
  return tmp;
}


x86 assembly (clang, -O0):
<read_int3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdi
mov    $0x3,%edx
call   1030 <memcpy@plt>
mov    -0xc(%rbp),%eax
and    $0x800000,%eax
cmp    $0x0,%eax
je     1151 <read_int3+0x41>
mov    -0xc(%rbp),%eax
or     $0xff000000,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_int3>:
push   %rax
mov    %rdi,%rsi
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rdi
mov    $0x3,%edx
call   1030 <memcpy@plt>
mov    0x4(%rsp),%ecx
mov    %ecx,%eax
or     $0xff000000,%eax
test   $0x800000,%ecx
cmove  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @read_int3(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%4 = load i8*, i8** %2
%5 = call i32 @memcpy(i32* %3, i8* %4, i32 3)
%6 = load i32, i32* %3
%7 = and i32 %6, 8388608
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i32, i32* %3
%11 = or i32 %10, -16777216
store i32 %11, i32* %3
br label %12
12: ; preds = %9, %1
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @read_int3(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%4 = call i32 @memcpy(i32* %2, i8* %0, i32 3)
%5 = load i32, i32* %2
%6 = and i32 %5, 8388608
%7 = icmp eq i32 %6, 0
%8 = or i32 %5, -16777216
%9 = select i1 %7, i32 %5, i32 %8
ret i32 %9
}
void McASPTxFmtSet(unsigned int baseAddr, unsigned int formatVal) {
  (*((volatile unsigned int *)(baseAddr + (0xA8)))) = formatVal;
}


x86 assembly (clang, -O0):
<McASPTxFmtSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0xa8,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<McASPTxFmtSet>:
add    $0xa8,%edi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @McASPTxFmtSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = add i32 %6, 168
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store volatile i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @McASPTxFmtSet(i32 %0, i32 %1) {
%3 = add i32 %0, 168
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
store volatile i32 %1, i32* %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcat(char *, char *);
int /*<<< orphan*/ strcpy(char *, char *);
void flags_add(char *buff, char *flagstr) {
  if (*buff == '\0') {
    strcpy(buff, flagstr);
  } else {
    strcat(buff, " ");
    strcat(buff, flagstr);
  }
}


x86 assembly (clang, -O0):
<flags_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1152 <flags_add+0x32>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
jmp    116f <flags_add+0x4f>
mov    -0x8(%rbp),%rdi
lea    0xea3(%rip),%rsi
call   1040 <strcat@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <strcat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flags_add>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
cmpb   $0x0,(%rdi)
je     1150 <flags_add+0x30>
lea    0xeca(%rip),%rsi
mov    %rbx,%rdi
call   1040 <strcat@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <strcat@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
@.str = [2 x i8] c" \00"
define void @flags_add(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i8*, i8** %3
%11 = load i8*, i8** %4
%12 = call i32 @strcpy(i8* %10, i8* %11)
br label %19
13: ; preds = %2
%14 = load i8*, i8** %3
%15 = call i32 @strcat(i8* %14, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%16 = load i8*, i8** %3
%17 = load i8*, i8** %4
%18 = call i32 @strcat(i8* %16, i8* %17)
br label %19
19: ; preds = %13, %9
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c" \00"
define void @flags_add(i8* %0, i8* %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @strcpy(i8* %0, i8* %1)
br label %10
7: ; preds = %2
%8 = tail call i32 @strcat(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%9 = tail call i32 @strcat(i8* %0, i8* %1)
br label %10
10: ; preds = %7, %5
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int __infer_nondet_int();
int mbtowc(wchar_t *__restrict pwc, const char *__restrict s, size_t n) {
  return __infer_nondet_int();
}


x86 assembly (clang, -O0):
<mbtowc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_int@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mbtowc>:
xor    %eax,%eax
jmp    1030 <__infer_nondet_int@plt>

LLVM IR (-O0):
define i32 @mbtowc(i32* noalias %0, i8* noalias %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i64
store i32* %0, i32** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = call i32 (...) @__infer_nondet_int()
ret i32 %7
}

LLVM IR (-O2):
define i32 @mbtowc(i32* noalias nocapture readnone %0, i8* noalias nocapture readnone %1, i64 %2) {
%4 = tail call i32 (...) @__infer_nondet_int()
ret i32 %4
}
/* Variables and functions */
char *malloc(int);
int rand();
char *realloc(char *, int);
int /*<<< orphan*/ strcpy(char *, char *);
char *fn50() {
  char *result;
  result = malloc(20 + rand() % 20);
  result = realloc(result, 30 + rand() % 20);
  strcpy((char *)result, "fn50");
  return result;
}


x86 assembly (clang, -O0):
<fn50>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1060 <rand@plt>
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    %edx,%edi
add    $0x14,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1060 <rand@plt>
mov    -0x10(%rbp),%rdi
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    %edx,%esi
add    $0x1e,%esi
call   1050 <realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xe67(%rip),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn50>:
push   %rbx
xor    %eax,%eax
call   1060 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%edi
add    $0x14,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1060 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%esi
add    $0x1e,%esi
mov    %rbx,%rdi
call   1050 <realloc@plt>
mov    %rax,%rbx
lea    0xe4f(%rip),%rsi
mov    %rax,%rdi
call   1030 <strcpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"fn50\00"
define i8* @fn50() {
%1 = alloca i8*
%2 = call i32 (...) @rand()
%3 = srem i32 %2, 20
%4 = add nsw i32 20, %3
%5 = call i8* @malloc(i32 %4)
store i8* %5, i8** %1
%6 = load i8*, i8** %1
%7 = call i32 (...) @rand()
%8 = srem i32 %7, 20
%9 = add nsw i32 30, %8
%10 = call i8* @realloc(i8* %6, i32 %9)
store i8* %10, i8** %1
%11 = load i8*, i8** %1
%12 = call i32 @strcpy(i8* %11, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%13 = load i8*, i8** %1
ret i8* %13
}

LLVM IR (-O2):
@.str = [5 x i8] c"fn50\00"
define i8* @fn50() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 20
%3 = add nsw i32 %2, 20
%4 = tail call i8* @malloc(i32 %3)
%5 = tail call i32 (...) @rand()
%6 = srem i32 %5, 20
%7 = add nsw i32 %6, 30
%8 = tail call i8* @realloc(i8* %4, i32 %7)
%9 = tail call i32 @strcpy(i8* %8, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i8* %8
}