xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ strcmp(char *, char *);
int switch_hash_equalkeys(void *k1, void *k2) {
  return strcmp((char *)k1, (char *)k2) ? 0 : 1;
}


x86 assembly (clang, -O0):
<switch_hash_equalkeys>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
mov    %rax,%rdx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<switch_hash_equalkeys>:
push   %rax
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @switch_hash_equalkeys(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i64 @strcmp(i8* %5, i8* %6)
%8 = icmp ne i64 %7, 0
%9 = zext i1 %8 to i64
%10 = select i1 %8, i32 0, i32 1
ret i32 %10
}

LLVM IR (-O2):
define i32 @switch_hash_equalkeys(i8* %0, i8* %1) {
%3 = tail call i64 @strcmp(i8* %0, i8* %1)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
int foo4(unsigned a, unsigned b) { return (a <= b); }


x86 assembly (clang, -O0):
<foo4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setbe  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo4>:
xor    %eax,%eax
cmp    %esi,%edi
setbe  %al
ret

LLVM IR (-O0):
define i32 @foo4(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ule i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @foo4(i32 %0, i32 %1) {
%3 = icmp ule i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
scalar_t__ stat(char *, struct stat *);
int rr_fexists(char *path) {
  struct stat file_stat;
  if (stat(path, &file_stat) == 0)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<rr_fexists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <stat@plt>
cmp    $0x0,%rax
jne    113f <rr_fexists+0x2f>
movl   $0x1,-0x4(%rbp)
jmp    1146 <rr_fexists+0x36>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rr_fexists>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @rr_fexists(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.stat
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @stat(i8* %5, %struct.stat* %4)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @rr_fexists(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
double exp(double);
double fabs(double);
double speedWalk(double speed, double slope) {
  double topSpeed, speedFinal, testVal;
  topSpeed = speed / exp(-0.175);
  speedFinal = exp(-3.5 * fabs(slope + 0.05)) * topSpeed;
  return speedFinal;
}


x86 assembly (clang, -O0):
<speedWalk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  0xedc(%rip),%xmm0
call   1030 <exp@plt>
movaps %xmm0,%xmm1
movsd  -0x30(%rbp),%xmm0
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xeb6(%rip),%xmm1
addsd  -0x10(%rbp),%xmm1
movaps 0xec2(%rip),%xmm0
pand   %xmm0,%xmm1
movsd  0xe96(%rip),%xmm0
mulsd  %xmm1,%xmm0
call   1030 <exp@plt>
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<speedWalk>:
push   %rax
divsd  0xee7(%rip),%xmm0
movsd  %xmm0,(%rsp)
addsd  0xee2(%rip),%xmm1
andpd  0xef2(%rip),%xmm1
mulsd  0xeda(%rip),%xmm1
movapd %xmm1,%xmm0
call   1030 <exp@plt>
mulsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @speedWalk(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %3
store double %1, double* %4
%8 = load double, double* %3
%9 = call double @exp(double -1.750000e-01)
%10 = fdiv double %8, %9
store double %10, double* %5
%11 = load double, double* %4
%12 = fadd double %11, 5.000000e-02
%13 = call double @llvm.fabs.f64(double %12)
%14 = fmul double -3.500000e+00, %13
%15 = call double @exp(double %14)
%16 = load double, double* %5
%17 = fmul double %15, %16
store double %17, double* %6
%18 = load double, double* %6
ret double %18
}

LLVM IR (-O2):
define double @speedWalk(double %0, double %1) {
%3 = fdiv double %0, 0x3FEADCD4F8533E2A
%4 = fadd double %1, 5.000000e-02
%5 = tail call double @llvm.fabs.f64(double %4)
%6 = fmul double %5, -3.500000e+00
%7 = tail call double @exp(double %6)
%8 = fmul double %3, %7
ret double %8
}
float *vec3_assign(float *result, float *a) {
  result[0] = a[0];
  result[1] = a[1];
  result[2] = a[2];
  return result;
}


x86 assembly (clang, -O0):
<vec3_assign>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
mov    -0x10(%rbp),%rax
movss  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec3_assign>:
mov    %rdi,%rax
movss  (%rsi),%xmm0
movss  %xmm0,(%rdi)
movss  0x4(%rsi),%xmm0
movss  %xmm0,0x4(%rdi)
movss  0x8(%rsi),%xmm0
movss  %xmm0,0x8(%rdi)
ret

LLVM IR (-O0):
define float* @vec3_assign(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %4
%6 = getelementptr inbounds float, float* %5, i64 0
%7 = load float, float* %6
%8 = load float*, float** %3
%9 = getelementptr inbounds float, float* %8, i64 0
store float %7, float* %9
%10 = load float*, float** %4
%11 = getelementptr inbounds float, float* %10, i64 1
%12 = load float, float* %11
%13 = load float*, float** %3
%14 = getelementptr inbounds float, float* %13, i64 1
store float %12, float* %14
%15 = load float*, float** %4
%16 = getelementptr inbounds float, float* %15, i64 2
%17 = load float, float* %16
%18 = load float*, float** %3
%19 = getelementptr inbounds float, float* %18, i64 2
store float %17, float* %19
%20 = load float*, float** %3
ret float* %20
}

LLVM IR (-O2):
define float* @vec3_assign(float* returned writeonly %0, float* nocapture %1) {
%3 = load float, float* %1
store float %3, float* %0
%4 = getelementptr inbounds float, float* %1, i64 1
%5 = load float, float* %4
%6 = getelementptr inbounds float, float* %0, i64 1
store float %5, float* %6
%7 = getelementptr inbounds float, float* %1, i64 2
%8 = load float, float* %7
%9 = getelementptr inbounds float, float* %0, i64 2
store float %8, float* %9
ret float* %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  int i = 123;
  if (i > 0)
    printf("1\n");
  else {
    while (1) {
      if (i == 456)
        printf("2\n");
      i++;
    }
  }
  printf("3\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x7b,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1141 <main+0x31>
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
jmp    116d <main+0x5d>
jmp    1146 <main+0x36>
cmpl   $0x1c8,-0x8(%rbp)
jne    115f <main+0x4f>
lea    0xea9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1146 <main+0x36>
lea    0xe92(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xede(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"1\0A\00"
@.str.1 = [3 x i8] c"2\0A\00"
@.str.2 = [3 x i8] c"3\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 123, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
br label %16
7: ; preds = %0
br label %8
8: ; preds = %7, %13
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 456
br i1 %10, label %11, label %13
11: ; preds = %8
%12 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
br label %13
13: ; preds = %11, %8
%14 = load i32, i32* %2
%15 = add nsw i32 %14, 1
store i32 %15, i32* %2
br label %8
16: ; preds = %5
%17 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [2 x i8] c"1\00"
@str.3 = [2 x i8] c"3\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str.3, i64 0, i64 0))
ret i32 0
}
void NCONF_get_section(void) {}


x86 assembly (clang, -O0):
<NCONF_get_section>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NCONF_get_section>:
ret

LLVM IR (-O0):
define void @NCONF_get_section() {
ret void
}

LLVM IR (-O2):
define void @NCONF_get_section() {
ret void
}
/* Type definitions */
struct scatterlist {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ sg_init_table(struct scatterlist *, int);
int /*<<< orphan*/ sg_set_buf(struct scatterlist *, void const *, unsigned int);
void sg_init_one(struct scatterlist *sg, const void *buf, unsigned int buflen) {
  sg_init_table(sg, 1);
  sg_set_buf(sg, buf, buflen);
}


x86 assembly (clang, -O0):
<sg_init_one>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <sg_init_table@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <sg_set_buf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sg_init_one>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
mov    $0x1,%esi
call   1030 <sg_init_table@plt>
mov    %rbp,%rdi
mov    %rbx,%rsi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <sg_set_buf@plt>

LLVM IR (-O0):
%struct.scatterlist = type { i32 }
define void @sg_init_one(%struct.scatterlist* %0, i8* %1, i32 %2) {
%4 = alloca %struct.scatterlist*
%5 = alloca i8*
%6 = alloca i32
store %struct.scatterlist* %0, %struct.scatterlist** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load %struct.scatterlist*, %struct.scatterlist** %4
%8 = call i32 @sg_init_table(%struct.scatterlist* %7, i32 1)
%9 = load %struct.scatterlist*, %struct.scatterlist** %4
%10 = load i8*, i8** %5
%11 = load i32, i32* %6
%12 = call i32 @sg_set_buf(%struct.scatterlist* %9, i8* %10, i32 %11)
ret void
}

LLVM IR (-O2):
%struct.scatterlist = type { i32 }
define void @sg_init_one(%struct.scatterlist* %0, i8* %1, i32 %2) {
%4 = tail call i32 @sg_init_table(%struct.scatterlist* %0, i32 1)
%5 = tail call i32 @sg_set_buf(%struct.scatterlist* %0, i8* %1, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lineprint2(char *, long, unsigned char *, char *);
int /*<<< orphan*/ sprintf(char *, char *, char *, unsigned char);
void ind_zp(char *outf, long ctr, unsigned char *op, char *str) {
  char buf[256];
  sprintf(buf, "%-4s $%02X", str, *(op + 1));
  lineprint2(outf, ctr, op, buf);
}


x86 assembly (clang, -O0):
<ind_zp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x120,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
lea    -0x120(%rbp),%rdi
mov    -0x20(%rbp),%rdx
mov    -0x18(%rbp),%rax
lea    0xeaf(%rip),%rsi
movzbl 0x1(%rax),%ecx
call   1040 <sprintf@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
lea    -0x120(%rbp),%rcx
call   1030 <lineprint2@plt>
add    $0x120,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ind_zp>:
push   %r15
push   %r14
push   %r12
push   %rbx
sub    $0x108,%rsp
mov    %rdx,%rbx
mov    %rsi,%r14
mov    %rdi,%r15
movzbl 0x1(%rdx),%eax
lea    0xebe(%rip),%rsi
mov    %rsp,%r12
mov    %r12,%rdi
mov    %rcx,%rdx
mov    %eax,%ecx
call   1040 <sprintf@plt>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
mov    %r12,%rcx
call   1030 <lineprint2@plt>
add    $0x108,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [11 x i8] c"%-4s $%02X\00"
define void @ind_zp(i8* %0, i64 %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca [256 x i8]
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%10 = getelementptr inbounds [256 x i8], [256 x i8]* %9, i64 0, i64 0
%11 = load i8*, i8** %8
%12 = load i8*, i8** %7
%13 = getelementptr inbounds i8, i8* %12, i64 1
%14 = load i8, i8* %13
%15 = call i32 @sprintf(i8* %10, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %11, i8 zeroext %14)
%16 = load i8*, i8** %5
%17 = load i64, i64* %6
%18 = load i8*, i8** %7
%19 = getelementptr inbounds [256 x i8], [256 x i8]* %9, i64 0, i64 0
%20 = call i32 @lineprint2(i8* %16, i64 %17, i8* %18, i8* %19)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"%-4s $%02X\00"
define void @ind_zp(i8* %0, i64 %1, i8* %2, i8* %3) {
%5 = alloca [256 x i8]
%6 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%7 = getelementptr inbounds i8, i8* %2, i64 1
%8 = load i8, i8* %7
%9 = call i32 @sprintf(i8* %6, i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %3, i8 zeroext %8)
%10 = call i32 @lineprint2(i8* %0, i64 %1, i8* %2, i8* %6)
ret void
}
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ direct_dispatch_range(struct __test_metadata *);
void wrapper_direct_dispatch_range(struct __test_metadata *_metadata,
                                   struct __fixture_variant_metadata *variant) {
  direct_dispatch_range(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_direct_dispatch_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <direct_dispatch_range@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_direct_dispatch_range>:
jmp    1030 <direct_dispatch_range@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_direct_dispatch_range(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @direct_dispatch_range(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_direct_dispatch_range(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @direct_dispatch_range(%struct.__test_metadata* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ PlayerModel_DataInit();
void UI_ModelInit(void) { PlayerModel_DataInit(); }


x86 assembly (clang, -O0):
<UI_ModelInit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <PlayerModel_DataInit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<UI_ModelInit>:
xor    %eax,%eax
jmp    1030 <PlayerModel_DataInit@plt>

LLVM IR (-O0):
define void @UI_ModelInit() {
%1 = call i32 (...) @PlayerModel_DataInit()
ret void
}

LLVM IR (-O2):
define void @UI_ModelInit() {
%1 = tail call i32 (...) @PlayerModel_DataInit()
ret void
}
/* Type definitions */
struct timeval {
  scalar_t__ tv_usec;
  scalar_t__ tv_sec;
};
typedef int int64_t;

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
int64_t p264_mdate(void) {
  struct timeval tv_date;
  gettimeofday(&tv_date, NULL);
  return ((int64_t)tv_date.tv_sec * 1000000 + (int64_t)tv_date.tv_usec);
}


x86 assembly (clang, -O0):
<p264_mdate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
mov    -0x8(%rbp),%rax
imul   $0xf4240,%eax,%eax
mov    -0x10(%rbp),%rcx
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<p264_mdate>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
imul   $0xf4240,0x10(%rsp),%eax
add    0x8(%rsp),%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { i64, i64 }
define i32 @p264_mdate() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%4 = load i64, i64* %3
%5 = trunc i64 %4 to i32
%6 = mul nsw i32 %5, 1000000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%8 = load i64, i64* %7
%9 = trunc i64 %8 to i32
%10 = add nsw i32 %6, %9
ret i32 %10
}

LLVM IR (-O2):
%struct.timeval = type { i64, i64 }
define i32 @p264_mdate() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%5 = load i64, i64* %4
%6 = trunc i64 %5 to i32
%7 = mul nsw i32 %6, 1000000
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%9 = load i64, i64* %8
%10 = trunc i64 %9 to i32
%11 = add nsw i32 %7, %10
ret i32 %11
}
void NMI_Handler(void) { fault_info(__FUNCTION__, sizeof(__FUNCTION__)); }


x86 assembly (clang, -O0):
<NMI_Handler>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0xc,%esi
mov    $0x0,%al
call   1030 <fault_info@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<NMI_Handler>:
lea    0xee9(%rip),%rdi
mov    $0xc,%esi
xor    %eax,%eax
jmp    1030 <fault_info@plt>

LLVM IR (-O0):
@__FUNCTION__.NMI_Handler = [12 x i8] c"NMI_Handler\00"
define void @NMI_Handler() {
%1 = call i32 (i8*, i64, ...) bitcast (i32 (...)* @fault_info to i32 (i8*, i64, ...)*)(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @__FUNCTION__.NMI_Handler, i64 0, i64 0), i64 12)
ret void
}

LLVM IR (-O2):
@__FUNCTION__.NMI_Handler = [12 x i8] c"NMI_Handler\00"
define void @NMI_Handler() {
%1 = tail call i32 (i8*, i64, ...) bitcast (i32 (...)* @fault_info to i32 (i8*, i64, ...)*)(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @__FUNCTION__.NMI_Handler, i64 0, i64 0), i64 12)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ WriteInstruction(char *);
void CR_DetectObject(void) {
  WriteInstruction("call skobj");
  WriteInstruction("ld (varobj),a");
}


x86 assembly (clang, -O0):
<CR_DetectObject>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <WriteInstruction@plt>
lea    0xee4(%rip),%rdi
call   1030 <WriteInstruction@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CR_DetectObject>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <WriteInstruction@plt>
lea    0xee7(%rip),%rdi
pop    %rax
jmp    1030 <WriteInstruction@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"call skobj\00"
@.str.1 = [14 x i8] c"ld (varobj),a\00"
define void @CR_DetectObject() {
%1 = call i32 @WriteInstruction(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @WriteInstruction(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"call skobj\00"
@.str.1 = [14 x i8] c"ld (varobj),a\00"
define void @CR_DetectObject() {
%1 = tail call i32 @WriteInstruction(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @WriteInstruction(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void PRCMRfPowerDownWhenIdle(void) {
  (*((volatile unsigned long
          *)(((unsigned long)(0x40082000 + 0x00000130) & 0xF0000000) |
             0x02000000 |
             (((unsigned long)(0x40082000 + 0x00000130) & 0x000FFFFF) << 5) |
             ((0) << 2)))) = 0;
}


x86 assembly (clang, -O0):
<PRCMRfPowerDownWhenIdle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x43042600,%eax
movq   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PRCMRfPowerDownWhenIdle>:
movq   $0x0,0x43042600
ret

LLVM IR (-O0):
define void @PRCMRfPowerDownWhenIdle() {
store volatile i64 0, i64* inttoptr (i64 1124345344 to i64*)
ret void
}

LLVM IR (-O2):
define void @PRCMRfPowerDownWhenIdle() {
store volatile i64 0, i64* inttoptr (i64 1124345344 to i64*)
ret void
}
void UART2_ER_intr(void) {}


x86 assembly (clang, -O0):
<UART2_ER_intr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UART2_ER_intr>:
ret

LLVM IR (-O0):
define void @UART2_ER_intr() {
ret void
}

LLVM IR (-O2):
define void @UART2_ER_intr() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CG_WeaponIndex(int, int *, int *);
int getPrevWeapInBank(int, int);
int getPrevWeapInBankBynum(int weapnum) {
  int bank, cycle;
  if (!CG_WeaponIndex(weapnum, &bank, &cycle)) {
    return weapnum;
  }
  return getPrevWeapInBank(bank, cycle);
}


x86 assembly (clang, -O0):
<getPrevWeapInBankBynum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
lea    -0xc(%rbp),%rsi
lea    -0x10(%rbp),%rdx
call   1040 <CG_WeaponIndex@plt>
cmp    $0x0,%eax
jne    114f <getPrevWeapInBankBynum+0x2f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115d <getPrevWeapInBankBynum+0x3d>
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1030 <getPrevWeapInBank@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getPrevWeapInBankBynum>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
lea    0xc(%rsp),%rsi
lea    0x8(%rsp),%rdx
call   1040 <CG_WeaponIndex@plt>
test   %eax,%eax
je     1149 <getPrevWeapInBankBynum+0x29>
mov    0xc(%rsp),%edi
mov    0x8(%rsp),%esi
call   1030 <getPrevWeapInBank@plt>
mov    %eax,%ebx
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @getPrevWeapInBankBynum(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @CG_WeaponIndex(i32 %6, i32* %4, i32* %5)
%8 = icmp ne i32 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %1
%10 = load i32, i32* %3
store i32 %10, i32* %2
br label %15
11: ; preds = %1
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = call i32 @getPrevWeapInBank(i32 %12, i32 %13)
store i32 %14, i32* %2
br label %15
15: ; preds = %11, %9
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @getPrevWeapInBankBynum(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = bitcast i32* %2 to i8*
%5 = bitcast i32* %3 to i8*
%6 = call i32 @CG_WeaponIndex(i32 %0, i32* %2, i32* %3)
%7 = icmp eq i32 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = call i32 @getPrevWeapInBank(i32 %9, i32 %10)
br label %12
12: ; preds = %1, %8
%13 = phi i32 [ %11, %8 ], [ %0, %1 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
void freeButNoMalloc(int *p, int x) {
  if (x) {
    free(p);
  }
  free(p);
}


x86 assembly (clang, -O0):
<freeButNoMalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1132 <freeButNoMalloc+0x22>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeButNoMalloc>:
push   %rbx
mov    %rdi,%rbx
test   %esi,%esi
je     1120 <freeButNoMalloc+0x10>
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @freeButNoMalloc(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32*, i32** %3
%9 = call i32 @free(i32* %8)
br label %10
10: ; preds = %7, %2
%11 = load i32*, i32** %3
%12 = call i32 @free(i32* %11)
ret void
}

LLVM IR (-O2):
define void @freeButNoMalloc(i32* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 @free(i32* %0)
br label %6
6: ; preds = %4, %2
%7 = tail call i32 @free(i32* %0)
ret void
}
void defbas_(id, array) int *id;
float array[4][4];
{ defbasis((short)*id, array); }


x86 assembly (clang, -O0):
<defbas_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
movswl %ax,%edi
mov    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1030 <defbasis@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<defbas_>:
movswl (%rdi),%edi
xor    %eax,%eax
jmp    1030 <defbasis@plt>

LLVM IR (-O0):
define void @defbas_(i32* %0, [4 x float]* %1) {
%3 = alloca i32*
%4 = alloca [4 x float]*
store i32* %0, i32** %3
store [4 x float]* %1, [4 x float]** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = trunc i32 %6 to i16
%8 = sext i16 %7 to i32
%9 = load [4 x float]*, [4 x float]** %4
%10 = call i32 (i32, [4 x float]*, ...) bitcast (i32 (...)* @defbasis to i32 (i32, [4 x float]*, ...)*)(i32 %8, [4 x float]* %9)
ret void
}

LLVM IR (-O2):
define void @defbas_(i32* nocapture %0, [4 x float]* %1) {
%3 = load i32, i32* %0
%4 = shl i32 %3, 16
%5 = ashr exact i32 %4, 16
%6 = tail call i32 (i32, [4 x float]*, ...) bitcast (i32 (...)* @defbasis to i32 (i32, [4 x float]*, ...)*)(i32 %5, [4 x float]* %1)
ret void
}
float tgammaf(float x) { return 0.0; }


x86 assembly (clang, -O0):
<tgammaf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<tgammaf>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @tgammaf(float %0) {
%2 = alloca float
store float %0, float* %2
ret float 0.000000e+00
}

LLVM IR (-O2):
define float @tgammaf(float %0) {
ret float 0.000000e+00
}
void classInitdelay_t(int samplingFreq) {}


x86 assembly (clang, -O0):
<classInitdelay_t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<classInitdelay_t>:
ret

LLVM IR (-O0):
define void @classInitdelay_t(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @classInitdelay_t(i32 %0) {
ret void
}
void foo456() {}


x86 assembly (clang, -O0):
<foo456>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo456>:
ret

LLVM IR (-O0):
define void @foo456() {
ret void
}

LLVM IR (-O2):
define void @foo456() {
ret void
}
int foo2(int a2) {
  int b2 = 21;
  return b2 + a2;
}


x86 assembly (clang, -O0):
<foo2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x15,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo2>:
lea    0x15(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @foo2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 21, i32* %3
%4 = load i32, i32* %3
%5 = load i32, i32* %2
%6 = add nsw i32 %4, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @foo2(i32 %0) {
%2 = add nsw i32 %0, 21
ret i32 %2
}
int is_digit(char c) { return ((c >= '0') && (c <= '9')); }


x86 assembly (clang, -O0):
<is_digit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <is_digit+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_digit>:
add    $0xd0,%dil
xor    %eax,%eax
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_digit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 57
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_digit(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
int rshift(int a, int b) {
  if (b == 0)
    return a;
  return a >> b;
}


x86 assembly (clang, -O0):
<rshift>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    111f <rshift+0x1f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    112a <rshift+0x2a>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rshift>:
mov    %esi,%ecx
mov    %edi,%eax
sar    %cl,%eax
ret

LLVM IR (-O0):
define i32 @rshift(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %4
store i32 %9, i32* %3
br label %14
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = ashr i32 %11, %12
store i32 %13, i32* %3
br label %14
14: ; preds = %10, %8
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @rshift(i32 %0, i32 %1) {
%3 = ashr i32 %0, %1
ret i32 %3
}
float get_distribution(float n_dot_h, float alpha2) {
  float n_dot_h_2 = n_dot_h * n_dot_h;
  float factor = n_dot_h_2 * (alpha2 - 1) + 1;
  return alpha2 / (3.1415927f * factor * factor);
}


x86 assembly (clang, -O0):
<get_distribution>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movss  0xed5(%rip),%xmm2
subss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
movss  0xec5(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x8(%rbp),%xmm0
movss  0xeab(%rip),%xmm1
mulss  -0x10(%rbp),%xmm1
mulss  -0x10(%rbp),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_distribution>:
mulss  %xmm0,%xmm0
movss  0xef4(%rip),%xmm2
addss  %xmm1,%xmm2
mulss  %xmm0,%xmm2
addss  0xee8(%rip),%xmm2
movss  0xee4(%rip),%xmm0
mulss  %xmm2,%xmm0
mulss  %xmm2,%xmm0
divss  %xmm0,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @get_distribution(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %3
store float %1, float* %4
%7 = load float, float* %3
%8 = load float, float* %3
%9 = fmul float %7, %8
store float %9, float* %5
%10 = load float, float* %5
%11 = load float, float* %4
%12 = fsub float %11, 1.000000e+00
%13 = call float @llvm.fmuladd.f32(float %10, float %12, float 1.000000e+00)
store float %13, float* %6
%14 = load float, float* %4
%15 = load float, float* %6
%16 = fmul float 0x400921FB60000000, %15
%17 = load float, float* %6
%18 = fmul float %16, %17
%19 = fdiv float %14, %18
ret float %19
}

LLVM IR (-O2):
define float @get_distribution(float %0, float %1) {
%3 = fmul float %0, %0
%4 = fadd float %1, -1.000000e+00
%5 = tail call float @llvm.fmuladd.f32(float %3, float %4, float 1.000000e+00)
%6 = fmul float %5, 0x400921FB60000000
%7 = fmul float %5, %6
%8 = fdiv float %1, %7
ret float %8
}
void pause_audio(int on) {}


x86 assembly (clang, -O0):
<pause_audio>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pause_audio>:
ret

LLVM IR (-O0):
define void @pause_audio(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @pause_audio(i32 %0) {
ret void
}
void RTEnvPut(void) {}


x86 assembly (clang, -O0):
<RTEnvPut>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTEnvPut>:
ret

LLVM IR (-O0):
define void @RTEnvPut() {
ret void
}

LLVM IR (-O2):
define void @RTEnvPut() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, char *);
int /*<<< orphan*/ lanscsiclimain(char *);
int /*<<< orphan*/ stderr;
int main(int argc, char **argv) {
  if (argc < 1) {
    fprintf(stderr,
            "Usage: %s <mac address>\n"
            " eg) %s [00:0B:D0:00:F2:8A]\n",
            argv[0], argv[0]);
  }
  lanscsiclimain(argv[1]);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jge    1163 <main+0x43>
mov    0x2e99(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%rdx
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
lea    0xea2(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <lanscsiclimain@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    %rsi,%rbx
test   %edi,%edi
jg     1143 <main+0x23>
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
mov    (%rbx),%rcx
lea    0xec5(%rip),%rsi
mov    %rcx,%rdx
call   1030 <fprintf@plt>
mov    0x8(%rbx),%rdi
call   1040 <lanscsiclimain@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [53 x i8] c"Usage: %s <mac address>\0A eg) %s [00:0B:D0:00:F2:8A]\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 1
br i1 %7, label %8, label %17
8: ; preds = %2
%9 = load i32, i32* @stderr
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 0
%12 = load i8*, i8** %11
%13 = load i8**, i8*** %5
%14 = getelementptr inbounds i8*, i8** %13, i64 0
%15 = load i8*, i8** %14
%16 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i8* %12, i8* %15)
br label %17
17: ; preds = %8, %2
%18 = load i8**, i8*** %5
%19 = getelementptr inbounds i8*, i8** %18, i64 1
%20 = load i8*, i8** %19
%21 = call i32 @lanscsiclimain(i8* %20)
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [53 x i8] c"Usage: %s <mac address>\0A eg) %s [00:0B:D0:00:F2:8A]\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp slt i32 %0, 1
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %1
%7 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i8* %6, i8* %6)
br label %8
8: ; preds = %4, %2
%9 = getelementptr inbounds i8*, i8** %1, i64 1
%10 = load i8*, i8** %9
%11 = tail call i32 @lanscsiclimain(i8* %10)
ret i32 0
}
double multiplicacion(double x, double y) {
  double z;
  z = x * y;
  return z;
}


x86 assembly (clang, -O0):
<multiplicacion>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<multiplicacion>:
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @multiplicacion(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %3
%7 = load double, double* %4
%8 = fmul double %6, %7
store double %8, double* %5
%9 = load double, double* %5
ret double %9
}

LLVM IR (-O2):
define double @multiplicacion(double %0, double %1) {
%3 = fmul double %0, %1
ret double %3
}
/* Type definitions */
typedef int arg;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, char, int);
void dump_rcpos(int arg) {
  char rc = ((arg)&0x100) ? 'C' : 'R';
  arg = ((arg)&0xff);
  printf("%c%d", rc, arg);
}


x86 assembly (clang, -O0):
<dump_rcpos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x100,%edx
mov    $0x52,%eax
mov    $0x43,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x5(%rbp),%al
mov    -0x4(%rbp),%edx
lea    0xeb1(%rip),%rdi
movsbl %al,%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dump_rcpos>:
test   $0x100,%edi
movzbl %dil,%edx
mov    $0x52,%eax
mov    $0x43,%esi
cmove  %eax,%esi
lea    0xed2(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%c%d\00"
define void @dump_rcpos(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = and i32 %4, 256
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 67, i32 82
%9 = trunc i32 %8 to i8
store i8 %9, i8* %3
%10 = load i32, i32* %2
%11 = and i32 %10, 255
store i32 %11, i32* %2
%12 = load i8, i8* %3
%13 = load i32, i32* %2
%14 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8 signext %12, i32 %13)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%c%d\00"
define void @dump_rcpos(i32 %0) {
%2 = and i32 %0, 256
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i8 82, i8 67
%5 = and i32 %0, 255
%6 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8 signext %4, i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void help(void) {
  printf("Usage: cloudl [image]\n");
  printf("'h'            - help\n");
  printf("'x'            - toggle cloud motion\n");
  printf("left mouse     - pan\n");
  printf("middle mouse   - rotate\n");
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xef0(%rip),%rdi
call   1030 <printf@plt>
lea    0xefb(%rip),%rdi
call   1030 <printf@plt>
lea    0xf15(%rip),%rdi
call   1030 <printf@plt>
lea    0xf1f(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<help>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xef2(%rip),%rdi
call   1030 <puts@plt>
lea    0xefc(%rip),%rdi
call   1030 <puts@plt>
lea    0xf15(%rip),%rdi
call   1030 <puts@plt>
lea    0xf1e(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"Usage: cloudl [image]\0A\00"
@.str.1 = [23 x i8] c"'h' - help\0A\00"
@.str.2 = [38 x i8] c"'x' - toggle cloud motion\0A\00"
@.str.3 = [22 x i8] c"left mouse - pan\0A\00"
@.str.4 = [25 x i8] c"middle mouse - rotate\0A\00"
define void @help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.3, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.4, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [22 x i8] c"Usage: cloudl [image]\00"
@str.5 = [22 x i8] c"'h' - help\00"
@str.6 = [37 x i8] c"'x' - toggle cloud motion\00"
@str.7 = [21 x i8] c"left mouse - pan\00"
@str.8 = [24 x i8] c"middle mouse - rotate\00"
define void @help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str.5, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @str.6, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str.7, i64 0, i64 0))
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str.8, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ uart_putc(int);
int __attribute__((weak)) ets_putc(int c) {
  uart_putc(c);
  return c;
}


x86 assembly (clang, -O0):
<ets_putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <uart_putc@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ets_putc>:
push   %rbx
mov    %edi,%ebx
call   1030 <uart_putc@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define weak i32 @ets_putc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @uart_putc(i32 %3)
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
define weak i32 @ets_putc(i32 %0) {
%2 = tail call i32 @uart_putc(i32 %0)
ret i32 %0
}
int main(void) {
  int i, n = 0;
  for (i = 0; i < 10;) {
    n = n + i;
    i += 1;
  }
  return n;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    113a <main+0x3a>
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1119 <main+0x19>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2d,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %3
store i32 0, i32* %2
br label %4
4: ; preds = %7, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 10
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i32, i32* %3
%9 = load i32, i32* %2
%10 = add nsw i32 %8, %9
store i32 %10, i32* %3
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @main() {
ret i32 45
}
void t27(void) { asm volatile("nop"); }


x86 assembly (clang, -O0):
<t27>:
push   %rbp
mov    %rsp,%rbp
nop
pop    %rbp
ret

x86 assembly (clang, -O2):
<t27>:
nop
ret

LLVM IR (-O0):
define void @t27() {
ret void
}

LLVM IR (-O2):
define void @t27() {
tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
void gendaddiu() {}


x86 assembly (clang, -O0):
<gendaddiu>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gendaddiu>:
ret

LLVM IR (-O0):
define void @gendaddiu() {
ret void
}

LLVM IR (-O2):
define void @gendaddiu() {
ret void
}
unsigned darken_input_fmts(void) { return (1 << 1) | (1 << 0); }


x86 assembly (clang, -O0):
<darken_input_fmts>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<darken_input_fmts>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @darken_input_fmts() {
ret i32 3
}

LLVM IR (-O2):
define i32 @darken_input_fmts() {
ret i32 3
}
/* Type definitions */
typedef int /*<<< orphan*/ pem_password_cb;
typedef int /*<<< orphan*/ d2i_of_void;
typedef int /*<<< orphan*/ NETSCAPE_CERT_SEQUENCE;
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int /*<<< orphan*/ *PEM_ASN1_read_bio(int /*<<< orphan*/ *, int /*<<< orphan*/,
                                      int /*<<< orphan*/ *, void **,
                                      int /*<<< orphan*/ *, void *);
int /*<<< orphan*/ PEM_STRING_X509;
scalar_t__ d2i_NETSCAPE_CERT_SEQUENCE;
NETSCAPE_CERT_SEQUENCE *
PEM_read_bio_NETSCAPE_CERT_SEQUENCE(BIO *bp, NETSCAPE_CERT_SEQUENCE **x,
                                    pem_password_cb *cb, void *u) {
  return PEM_ASN1_read_bio((d2i_of_void *)d2i_NETSCAPE_CERT_SEQUENCE,
                           PEM_STRING_X509, bp, (void **)x, cb, u);
}


x86 assembly (clang, -O0):
<PEM_read_bio_NETSCAPE_CERT_SEQUENCE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    0x2ea9(%rip),%rax
mov    (%rax),%rdi
mov    0x2eaf(%rip),%rax
mov    (%rax),%esi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
mov    -0x20(%rbp),%r9
call   1030 <PEM_ASN1_read_bio@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PEM_read_bio_NETSCAPE_CERT_SEQUENCE>:
mov    %rcx,%r9
mov    %rdx,%r8
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%rdi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
jmp    1030 <PEM_ASN1_read_bio@plt>

LLVM IR (-O0):
@d2i_NETSCAPE_CERT_SEQUENCE = global i64 0
@PEM_STRING_X509 = global i32 0
define i32* @PEM_read_bio_NETSCAPE_CERT_SEQUENCE(i32* %0, i32** %1, i32* %2, i8* %3) {
%5 = alloca i32*
%6 = alloca i32**
%7 = alloca i32*
%8 = alloca i8*
store i32* %0, i32** %5
store i32** %1, i32*** %6
store i32* %2, i32** %7
store i8* %3, i8** %8
%9 = load i64, i64* @d2i_NETSCAPE_CERT_SEQUENCE
%10 = inttoptr i64 %9 to i32*
%11 = load i32, i32* @PEM_STRING_X509
%12 = load i32*, i32** %5
%13 = load i32**, i32*** %6
%14 = bitcast i32** %13 to i8**
%15 = load i32*, i32** %7
%16 = load i8*, i8** %8
%17 = call i32* @PEM_ASN1_read_bio(i32* %10, i32 %11, i32* %12, i8** %14, i32* %15, i8* %16)
ret i32* %17
}

LLVM IR (-O2):
@d2i_NETSCAPE_CERT_SEQUENCE = global i64 0
@PEM_STRING_X509 = global i32 0
define i32* @PEM_read_bio_NETSCAPE_CERT_SEQUENCE(i32* %0, i32** %1, i32* %2, i8* %3) {
%5 = load i64, i64* @d2i_NETSCAPE_CERT_SEQUENCE
%6 = inttoptr i64 %5 to i32*
%7 = load i32, i32* @PEM_STRING_X509
%8 = bitcast i32** %1 to i8**
%9 = tail call i32* @PEM_ASN1_read_bio(i32* %6, i32 %7, i32* %0, i8** %8, i32* %2, i8* %3)
ret i32* %9
}
/* Type definitions */
typedef int /*<<< orphan*/ gid_t;

/* Variables and functions */
int /*<<< orphan*/ getegid();
void test(void) {
  gid_t gid;
  gid = getegid();
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getegid@plt>
mov    %eax,-0x4(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
xor    %eax,%eax
jmp    1030 <getegid@plt>

LLVM IR (-O0):
define void @test() {
%1 = alloca i32
%2 = call i32 (...) @getegid()
store i32 %2, i32* %1
ret void
}

LLVM IR (-O2):
define void @test() {
%1 = tail call i32 (...) @getegid()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ shake256(unsigned char *, int, unsigned char const *,
                            unsigned int const);
void H(unsigned char *out, const unsigned char *in, const unsigned int len) {
  shake256(out, 32, in, len);
}


x86 assembly (clang, -O0):
<H>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0x20,%esi
call   1030 <shake256@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<H>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    $0x20,%esi
jmp    1030 <shake256@plt>

LLVM IR (-O0):
define void @H(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @shake256(i8* %7, i32 32, i8* %8, i32 %9)
ret void
}

LLVM IR (-O2):
define void @H(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @shake256(i8* %0, i32 32, i8* %1, i32 %2)
ret void
}