int Isitcard(char card) {
  switch (card) {
  case 'A':
    return 1;
    break;
  case 'K':
    return 1;
    break;
  case 'Q':
    return 1;
    break;
  case 'J':
    return 1;
    break;
  case 'T':
    return 1;
    break;
  case '9':
    return 1;
    break;
  case '8':
    return 1;
    break;
  case '7':
    return 1;
    break;
  case '6':
    return 1;
    break;
  case '5':
    return 1;
    break;
  case '4':
    return 1;
    break;
  case '3':
    return 1;
    break;
  case '2':
    return 1;
    break;
  default:
    return 0;
    break;
  }
}


x86 assembly (clang, -O0):
<Isitcard>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
add    $0xffffffce,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x22,%eax
ja     11d0 <Isitcard+0xd0>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x4(%rbp)
jmp    11d7 <Isitcard+0xd7>
movl   $0x1,-0x4(%rbp)
jmp    11d7 <Isitcard+0xd7>
movl   $0x1,-0x4(%rbp)
jmp    11d7 <Isitcard+0xd7>
movl   $0x1,-0x4(%rbp)
jmp    11d7 <Isitcard+0xd7>
movl   $0x1,-0x4(%rbp)
jmp    11d7 <Isitcard+0xd7>
movl   $0x1,-0x4(%rbp)
jmp    11d7 <Isitcard+0xd7>
movl   $0x1,-0x4(%rbp)
jmp    11d7 <Isitcard+0xd7>
movl   $0x1,-0x4(%rbp)
jmp    11d7 <Isitcard+0xd7>
movl   $0x1,-0x4(%rbp)
jmp    11d7 <Isitcard+0xd7>
movl   $0x1,-0x4(%rbp)
jmp    11d7 <Isitcard+0xd7>
movl   $0x1,-0x4(%rbp)
jmp    11d7 <Isitcard+0xd7>
movl   $0x1,-0x4(%rbp)
jmp    11d7 <Isitcard+0xd7>
movl   $0x1,-0x4(%rbp)
jmp    11d7 <Isitcard+0xd7>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Isitcard>:
add    $0xffffffce,%edi
cmp    $0x22,%edi
ja     111e <Isitcard+0x1e>
mov    $0x1,%eax
movabs $0x4830080ff,%rcx
bt     %rdi,%rcx
jae    111e <Isitcard+0x1e>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Isitcard(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %19 [
i32 65, label %6
i32 75, label %7
i32 81, label %8
i32 74, label %9
i32 84, label %10
i32 57, label %11
i32 56, label %12
i32 55, label %13
i32 54, label %14
i32 53, label %15
i32 52, label %16
i32 51, label %17
i32 50, label %18
]
6: ; preds = %1
store i32 1, i32* %2
br label %20
7: ; preds = %1
store i32 1, i32* %2
br label %20
8: ; preds = %1
store i32 1, i32* %2
br label %20
9: ; preds = %1
store i32 1, i32* %2
br label %20
10: ; preds = %1
store i32 1, i32* %2
br label %20
11: ; preds = %1
store i32 1, i32* %2
br label %20
12: ; preds = %1
store i32 1, i32* %2
br label %20
13: ; preds = %1
store i32 1, i32* %2
br label %20
14: ; preds = %1
store i32 1, i32* %2
br label %20
15: ; preds = %1
store i32 1, i32* %2
br label %20
16: ; preds = %1
store i32 1, i32* %2
br label %20
17: ; preds = %1
store i32 1, i32* %2
br label %20
18: ; preds = %1
store i32 1, i32* %2
br label %20
19: ; preds = %1
store i32 0, i32* %2
br label %20
20: ; preds = %19, %18, %17, %16, %15, %14, %13, %12, %11, %10, %9, %8, %7, %6
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @Isitcard(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %3 [
i32 65, label %4
i32 75, label %4
i32 81, label %4
i32 74, label %4
i32 84, label %4
i32 57, label %4
i32 56, label %4
i32 55, label %4
i32 54, label %4
i32 53, label %4
i32 52, label %4
i32 51, label %4
i32 50, label %4
]
3: ; preds = %1
br label %4
4: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %3
%5 = phi i32 [ 0, %3 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %5
}