void VsInitPorts() {
  (*(volatile unsigned long *)(0xE002C000 + 0x00)) &=
      ~((0x03 << 12) | (0x03 << 14) | (0x03 << 16) | (0x03 << 19));
  (*(volatile unsigned long *)(0xE002C000 + 0x00)) |=
      (0x02 << 14) | (0x02 << 16) | (0x02 << 18);
  (*(volatile unsigned long *)(0xE002C000 + 0x10)) &= ~(0x03 << 2);
  (*(volatile unsigned long *)(0xE002C000 + 0x1C)) &=
      ~((0x03 << 4) | (0x03 << 28));
  (*(volatile unsigned long *)(0x3FFFC000 + 0x00)) &= ~(1 << 6);
  (*(volatile unsigned long *)(0x3FFFC000 + 0x40)) |= (1 << 1);
  (*(volatile unsigned long *)(0x3FFFC000 + 0x60)) |= (1 << 18) | (1 << 30);
}


x86 assembly (clang, -O0):
<VsInitPorts>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe002c000,%eax
mov    (%rax),%rcx
and    $0xffffffffffe40fff,%rcx
mov    $0xe002c000,%eax
mov    %rcx,(%rax)
mov    $0xe002c000,%eax
mov    (%rax),%rcx
or     $0xa8000,%rcx
mov    $0xe002c000,%eax
mov    %rcx,(%rax)
mov    $0xe002c010,%eax
mov    (%rax),%rcx
and    $0xfffffffffffffff3,%rcx
mov    $0xe002c010,%eax
mov    %rcx,(%rax)
mov    $0xe002c01c,%eax
mov    (%rax),%rcx
and    $0xffffffffcfffffcf,%rcx
mov    $0xe002c01c,%eax
mov    %rcx,(%rax)
mov    $0x3fffc000,%eax
mov    (%rax),%rcx
and    $0xffffffffffffffbf,%rcx
mov    $0x3fffc000,%eax
mov    %rcx,(%rax)
mov    $0x3fffc040,%eax
mov    (%rax),%rcx
or     $0x2,%rcx
mov    $0x3fffc040,%eax
mov    %rcx,(%rax)
mov    $0x3fffc060,%eax
mov    (%rax),%rcx
or     $0x40040000,%rcx
mov    $0x3fffc060,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<VsInitPorts>:
mov    $0xe002c000,%eax
andq   $0xffffffffffe40fff,(%rax)
orq    $0xa8000,(%rax)
andq   $0xfffffffffffffff3,0x10(%rax)
andq   $0xffffffffcfffffcf,0x1c(%rax)
cf
andq   $0xffffffffffffffbf,0x3fffc000
3f bf
orq    $0x2,0x3fffc040
3f 02
orq    $0x40040000,0x3fffc060
ret

LLVM IR (-O0):
define void @VsInitPorts() {
%1 = load volatile i64, i64* inttoptr (i64 3758276608 to i64*)
%2 = and i64 %1, -1830913
store volatile i64 %2, i64* inttoptr (i64 3758276608 to i64*)
%3 = load volatile i64, i64* inttoptr (i64 3758276608 to i64*)
%4 = or i64 %3, 688128
store volatile i64 %4, i64* inttoptr (i64 3758276608 to i64*)
%5 = load volatile i64, i64* inttoptr (i64 3758276624 to i64*)
%6 = and i64 %5, -13
store volatile i64 %6, i64* inttoptr (i64 3758276624 to i64*)
%7 = load volatile i64, i64* inttoptr (i64 3758276636 to i64*)
%8 = and i64 %7, -805306417
store volatile i64 %8, i64* inttoptr (i64 3758276636 to i64*)
%9 = load volatile i64, i64* inttoptr (i64 1073725440 to i64*)
%10 = and i64 %9, -65
store volatile i64 %10, i64* inttoptr (i64 1073725440 to i64*)
%11 = load volatile i64, i64* inttoptr (i64 1073725504 to i64*)
%12 = or i64 %11, 2
store volatile i64 %12, i64* inttoptr (i64 1073725504 to i64*)
%13 = load volatile i64, i64* inttoptr (i64 1073725536 to i64*)
%14 = or i64 %13, 1074003968
store volatile i64 %14, i64* inttoptr (i64 1073725536 to i64*)
ret void
}

LLVM IR (-O2):
define void @VsInitPorts() {
%1 = load volatile i64, i64* inttoptr (i64 3758276608 to i64*)
%2 = and i64 %1, -1830913
store volatile i64 %2, i64* inttoptr (i64 3758276608 to i64*)
%3 = load volatile i64, i64* inttoptr (i64 3758276608 to i64*)
%4 = or i64 %3, 688128
store volatile i64 %4, i64* inttoptr (i64 3758276608 to i64*)
%5 = load volatile i64, i64* inttoptr (i64 3758276624 to i64*)
%6 = and i64 %5, -13
store volatile i64 %6, i64* inttoptr (i64 3758276624 to i64*)
%7 = load volatile i64, i64* inttoptr (i64 3758276636 to i64*)
%8 = and i64 %7, -805306417
store volatile i64 %8, i64* inttoptr (i64 3758276636 to i64*)
%9 = load volatile i64, i64* inttoptr (i64 1073725440 to i64*)
%10 = and i64 %9, -65
store volatile i64 %10, i64* inttoptr (i64 1073725440 to i64*)
%11 = load volatile i64, i64* inttoptr (i64 1073725504 to i64*)
%12 = or i64 %11, 2
store volatile i64 %12, i64* inttoptr (i64 1073725504 to i64*)
%13 = load volatile i64, i64* inttoptr (i64 1073725536 to i64*)
%14 = or i64 %13, 1074003968
store volatile i64 %14, i64* inttoptr (i64 1073725536 to i64*)
ret void
}