xunge/DecIR huggingface dataset:
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ stderr;
int main(int argc, char *argv[]) {
  if (sizeof(struct stat) != 128) {
    fprintf(stderr, "Ooooooops, struct stat has wrong size (%ld)\n",
            sizeof(struct stat));
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
lea    0xeca(%rip),%rsi
mov    $0x4,%edx
call   1030 <fprintf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
mov    $0x4,%edx
call   1030 <fprintf@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [45 x i8] c"Ooooooops, struct stat has wrong size (%ld)\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* @stderr
%7 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0), i32 4)
ret i32 1
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [45 x i8] c"Ooooooops, struct stat has wrong size (%ld)\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0), i32 4)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ GpioPinMuxSetup(int, int);
void eqep_1_pinmux_setup(void) {
  GpioPinMuxSetup((0x08d0), (0x00000040 | 0x00000020 | 0x00000008 | (2)));
  GpioPinMuxSetup((0x08d4), (0x00000040 | 0x00000020 | 0x00000008 | (2)));
  GpioPinMuxSetup((0x08d8), (0x00000040 | 0x00000020 | 0x00000008 | (2)));
  GpioPinMuxSetup((0x08dc), (0x00000040 | 0x00000020 | 0x00000008 | (2)));
}


x86 assembly (clang, -O0):
<eqep_1_pinmux_setup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8d0,%edi
mov    $0x6a,%esi
call   1030 <GpioPinMuxSetup@plt>
mov    $0x8d4,%edi
mov    $0x6a,%esi
call   1030 <GpioPinMuxSetup@plt>
mov    $0x8d8,%edi
mov    $0x6a,%esi
call   1030 <GpioPinMuxSetup@plt>
mov    $0x8dc,%edi
mov    $0x6a,%esi
call   1030 <GpioPinMuxSetup@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<eqep_1_pinmux_setup>:
push   %rax
mov    $0x8d0,%edi
mov    $0x6a,%esi
call   1030 <GpioPinMuxSetup@plt>
mov    $0x8d4,%edi
mov    $0x6a,%esi
call   1030 <GpioPinMuxSetup@plt>
mov    $0x8d8,%edi
mov    $0x6a,%esi
call   1030 <GpioPinMuxSetup@plt>
mov    $0x8dc,%edi
mov    $0x6a,%esi
pop    %rax
jmp    1030 <GpioPinMuxSetup@plt>

LLVM IR (-O0):
define void @eqep_1_pinmux_setup() {
%1 = call i32 @GpioPinMuxSetup(i32 2256, i32 106)
%2 = call i32 @GpioPinMuxSetup(i32 2260, i32 106)
%3 = call i32 @GpioPinMuxSetup(i32 2264, i32 106)
%4 = call i32 @GpioPinMuxSetup(i32 2268, i32 106)
ret void
}

LLVM IR (-O2):
define void @eqep_1_pinmux_setup() {
%1 = tail call i32 @GpioPinMuxSetup(i32 2256, i32 106)
%2 = tail call i32 @GpioPinMuxSetup(i32 2260, i32 106)
%3 = tail call i32 @GpioPinMuxSetup(i32 2264, i32 106)
%4 = tail call i32 @GpioPinMuxSetup(i32 2268, i32 106)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ posix_spawn_file_actions_t;

/* Variables and functions */
int posix_spawn_file_actions_addclose(int /*<<< orphan*/ *, int);
int swift_posix_spawn_file_actions_addclose(
    posix_spawn_file_actions_t *file_actions, int filedes) {
  return posix_spawn_file_actions_addclose(file_actions, filedes);
}


x86 assembly (clang, -O0):
<swift_posix_spawn_file_actions_addclose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <posix_spawn_file_actions_addclose@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swift_posix_spawn_file_actions_addclose>:
jmp    1030 <posix_spawn_file_actions_addclose@plt>

LLVM IR (-O0):
define i32 @swift_posix_spawn_file_actions_addclose(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @posix_spawn_file_actions_addclose(i32* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @swift_posix_spawn_file_actions_addclose(i32* %0, i32 %1) {
%3 = tail call i32 @posix_spawn_file_actions_addclose(i32* %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
double ceil(double);
double floor(double);
__attribute__((always_)) __attribute__((const)) double round(double x) {
  return (x > 0) ? floor(x + 0.5) : ceil(x - 0.5);
}


x86 assembly (clang, -O0):
<round>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    115b <round+0x3b>
movsd  0xeb9(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
call   1040 <floor@plt>
movsd  %xmm0,-0x10(%rbp)
jmp    1176 <round+0x56>
movsd  -0x8(%rbp),%xmm0
movsd  0xe98(%rip),%xmm1
subsd  %xmm1,%xmm0
call   1030 <ceil@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<round>:
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    1137 <round+0x17>
addsd  0xed6(%rip),%xmm0
jmp    1040 <floor@plt>
addsd  0xec1(%rip),%xmm0
jmp    1030 <ceil@plt>

LLVM IR (-O0):
define double @round(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp ogt double %3, 0.000000e+00
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load double, double* %2
%7 = fadd double %6, 5.000000e-01
%8 = call double @llvm.floor.f64(double %7)
br label %13
9: ; preds = %1
%10 = load double, double* %2
%11 = fsub double %10, 5.000000e-01
%12 = call double @llvm.ceil.f64(double %11)
br label %13
13: ; preds = %9, %5
%14 = phi double [ %8, %5 ], [ %12, %9 ]
ret double %14
}

LLVM IR (-O2):
define double @round(double %0) {
%2 = fcmp ogt double %0, 0.000000e+00
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = fadd double %0, 5.000000e-01
%5 = tail call double @llvm.floor.f64(double %4)
br label %9
6: ; preds = %1
%7 = fadd double %0, -5.000000e-01
%8 = tail call double @llvm.ceil.f64(double %7)
br label %9
9: ; preds = %6, %3
%10 = phi double [ %5, %3 ], [ %8, %6 ]
ret double %10
}
unsigned char ip_transport_layer_protocol(unsigned char packet[]) {
  char protocol;
  enum { TCP, UDP } transport;
  protocol = packet[23];
  if (protocol == 0x06) {
    transport = TCP;
  } else if (protocol == 0x11) {
    transport = UDP;
  } else {
    return 0;
  }
  return transport;
}


x86 assembly (clang, -O0):
<ip_transport_layer_protocol>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x17(%rax),%al
mov    %al,-0x11(%rbp)
movsbl -0x11(%rbp),%eax
cmp    $0x6,%eax
jne    112b <ip_transport_layer_protocol+0x2b>
movl   $0x0,-0x18(%rbp)
jmp    1152 <ip_transport_layer_protocol+0x52>
movsbl -0x11(%rbp),%eax
cmp    $0x11,%eax
jne    1144 <ip_transport_layer_protocol+0x44>
movl   $0x1,-0x18(%rbp)
jmp    114d <ip_transport_layer_protocol+0x4d>
movb   $0x0,-0x1(%rbp)
jmp    1158 <ip_transport_layer_protocol+0x58>
jmp    1152 <ip_transport_layer_protocol+0x52>
mov    -0x18(%rbp),%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ip_transport_layer_protocol>:
cmpb   $0x11,0x17(%rdi)
sete   %al
ret

LLVM IR (-O0):
define zeroext i8 @ip_transport_layer_protocol(i8* %0) {
%2 = alloca i8
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i32
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i64 23
%8 = load i8, i8* %7
store i8 %8, i8* %4
%9 = load i8, i8* %4
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 6
br i1 %11, label %12, label %13
12: ; preds = %1
store i32 0, i32* %5
br label %20
13: ; preds = %1
%14 = load i8, i8* %4
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 17
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 1, i32* %5
br label %19
18: ; preds = %13
store i8 0, i8* %2
br label %23
19: ; preds = %17
br label %20
20: ; preds = %19, %12
%21 = load i32, i32* %5
%22 = trunc i32 %21 to i8
store i8 %22, i8* %2
br label %23
23: ; preds = %20, %18
%24 = load i8, i8* %2
ret i8 %24
}

LLVM IR (-O2):
define zeroext i8 @ip_transport_layer_protocol(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 23
%3 = load i8, i8* %2
%4 = icmp eq i8 %3, 17
%5 = zext i1 %4 to i8
ret i8 %5
}
int Kit_BitWordNum(int nBits) {
  return nBits / (8 * sizeof(unsigned)) +
         ((nBits % (8 * sizeof(unsigned))) > 0);
}


x86 assembly (clang, -O0):
<Kit_BitWordNum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
shr    $0x5,%rax
movslq -0x4(%rbp),%rcx
and    $0x1f,%rcx
cmp    $0x0,%rcx
seta   %cl
and    $0x1,%cl
movzbl %cl,%ecx
movslq %ecx,%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Kit_BitWordNum>:
movslq %edi,%rcx
mov    %rcx,%rax
shr    $0x5,%rax
and    $0x1f,%ecx
cmp    $0x1,%rcx
sbb    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @Kit_BitWordNum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = udiv i64 %4, 32
%6 = load i32, i32* %2
%7 = sext i32 %6 to i64
%8 = urem i64 %7, 32
%9 = icmp ugt i64 %8, 0
%10 = zext i1 %9 to i32
%11 = sext i32 %10 to i64
%12 = add i64 %5, %11
%13 = trunc i64 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @Kit_BitWordNum(i32 %0) {
%2 = sext i32 %0 to i64
%3 = lshr i64 %2, 5
%4 = and i64 %2, 31
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = add nuw nsw i64 %3, %6
%8 = trunc i64 %7 to i32
ret i32 %8
}
int followed_by(char *tok, char tokarray[]) {}


x86 assembly (clang, -O0):
<followed_by>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<followed_by>:
ret

LLVM IR (-O0):
define i32 @followed_by(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @followed_by(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 undef
}
void console_line_event_put(struct os_event *ev) {}


x86 assembly (clang, -O0):
<console_line_event_put>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<console_line_event_put>:
ret

LLVM IR (-O0):
%struct.os_event = type opaque
define void @console_line_event_put(%struct.os_event* %0) {
%2 = alloca %struct.os_event*
store %struct.os_event* %0, %struct.os_event** %2
ret void
}

LLVM IR (-O2):
%struct.os_event = type opaque
define void @console_line_event_put(%struct.os_event* nocapture %0) {
ret void
}
int RGB2Gray(char red, char green, char blue) {
  double gray = 0.2989 * red + 0.5870 * green + 0.1140 * blue;
  return (int)gray;
}


x86 assembly (clang, -O0):
<RGB2Gray>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %dil,%dl
mov    %dl,-0x1(%rbp)
mov    %cl,-0x2(%rbp)
mov    %al,-0x3(%rbp)
movsbl -0x1(%rbp),%eax
cvtsi2sd %eax,%xmm1
movsbl -0x2(%rbp),%eax
cvtsi2sd %eax,%xmm2
movsd  0xee3(%rip),%xmm0
mulsd  %xmm2,%xmm0
movsd  0xecf(%rip),%xmm2
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
movsbl -0x3(%rbp),%eax
cvtsi2sd %eax,%xmm0
movsd  0xeaf(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
cvttsd2si -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RGB2Gray>:
cvtsi2sd %edi,%xmm0
cvtsi2sd %esi,%xmm1
mulsd  0xef0(%rip),%xmm1
mulsd  0xef0(%rip),%xmm0
cvtsi2sd %edx,%xmm2
mulsd  0xeec(%rip),%xmm2
addsd  %xmm1,%xmm0
addsd  %xmm0,%xmm2
cvttsd2si %xmm2,%eax
ret

LLVM IR (-O0):
define i32 @RGB2Gray(i8 signext %0, i8 signext %1, i8 signext %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
%7 = alloca double
store i8 %0, i8* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%8 = load i8, i8* %4
%9 = sext i8 %8 to i32
%10 = sitofp i32 %9 to double
%11 = load i8, i8* %5
%12 = sext i8 %11 to i32
%13 = sitofp i32 %12 to double
%14 = fmul double 5.870000e-01, %13
%15 = call double @llvm.fmuladd.f64(double 2.989000e-01, double %10, double %14)
%16 = load i8, i8* %6
%17 = sext i8 %16 to i32
%18 = sitofp i32 %17 to double
%19 = call double @llvm.fmuladd.f64(double 1.140000e-01, double %18, double %15)
store double %19, double* %7
%20 = load double, double* %7
%21 = fptosi double %20 to i32
ret i32 %21
}

LLVM IR (-O2):
define i32 @RGB2Gray(i8 signext %0, i8 signext %1, i8 signext %2) {
%4 = sitofp i8 %0 to double
%5 = sitofp i8 %1 to double
%6 = fmul double %5, 5.870000e-01
%7 = tail call double @llvm.fmuladd.f64(double %4, double 2.989000e-01, double %6)
%8 = sitofp i8 %2 to double
%9 = tail call double @llvm.fmuladd.f64(double %8, double 1.140000e-01, double %7)
%10 = fptosi double %9 to i32
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *);
void inspect_fw_pstr(char *label, char *str) {
  printf("%-23s: %s\n", label, str);
}


x86 assembly (clang, -O0):
<inspect_fw_pstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inspect_fw_pstr>:
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee3(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"%-23s: %s\0A\00"
define void @inspect_fw_pstr(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %5, i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"%-23s: %s\0A\00"
define void @inspect_fw_pstr(i8* %0, i8* %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
uint8_t *EMACTxDMACurrentBufferGet(uint32_t ui32Base) {
  return ((uint8_t *)(*((volatile uint32_t *)(ui32Base + 0x00000C50))));
}


x86 assembly (clang, -O0):
<EMACTxDMACurrentBufferGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0xc50(%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<EMACTxDMACurrentBufferGet>:
mov    0xc50(%rdi),%rax
ret

LLVM IR (-O0):
define i32* @EMACTxDMACurrentBufferGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 3152
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = inttoptr i64 %6 to i32*
ret i32* %7
}

LLVM IR (-O2):
define i32* @EMACTxDMACurrentBufferGet(i64 %0) {
%2 = add nsw i64 %0, 3152
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = inttoptr i64 %4 to i32*
ret i32* %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ pthread_exit(int /*<<< orphan*/ *);
int /*<<< orphan*/ sleep(int);
void newthread(void) {
  printf("newthread is running\n");
  sleep(3);
  printf("newthread is running\n");
  pthread_exit(NULL);
}


x86 assembly (clang, -O0):
<newthread>:
push   %rbp
mov    %rsp,%rbp
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x3,%edi
call   1050 <sleep@plt>
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
mov    %eax,%edi
call   1040 <pthread_exit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<newthread>:
push   %rbx
lea    0xec8(%rip),%rbx
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    $0x3,%edi
call   1050 <sleep@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
xor    %edi,%edi
pop    %rbx
jmp    1040 <pthread_exit@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"newthread is running\0A\00"
define void @newthread() {
%1 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @sleep(i32 3)
%3 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @pthread_exit(i32* null)
ret void
}

LLVM IR (-O2):
@str.1 = [21 x i8] c"newthread is running\00"
define void @newthread() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str.1, i64 0, i64 0))
%2 = tail call i32 @sleep(i32 3)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str.1, i64 0, i64 0))
%4 = tail call i32 @pthread_exit(i32* null)
ret void
}
void gtk_file_chooser_set_current_name() {}


x86 assembly (clang, -O0):
<gtk_file_chooser_set_current_name>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_file_chooser_set_current_name>:
ret

LLVM IR (-O0):
define void @gtk_file_chooser_set_current_name() {
ret void
}

LLVM IR (-O2):
define void @gtk_file_chooser_set_current_name() {
ret void
}
/* Variables and functions */
char *malloc(int /*<<< orphan*/);
int /*<<< orphan*/ puts(char *);
int main() {
  char *ptr = malloc(0);
  if (ptr == NULL)
    puts("null pointer");
  else
    puts("valid pointer");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1156 <main+0x36>
lea    0xeb4(%rip),%rdi
call   1030 <puts@plt>
jmp    1162 <main+0x42>
lea    0xeb0(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"null pointer\00"
@.str.1 = [14 x i8] c"valid pointer\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = call i8* @malloc(i32 0)
store i8* %3, i8** %2
%4 = load i8*, i8** %2
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @puts(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
br label %10
8: ; preds = %0
%9 = call i32 @puts(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %8, %6
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [14 x i8] c"valid pointer\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
void I2CMasterDataPut(uint32_t ui32Base, uint8_t ui8Data) {
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000008))) = ui8Data;
}


x86 assembly (clang, -O0):
<I2CMasterDataPut>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CMasterDataPut>:
mov    %rsi,0x8(%rdi)
ret

LLVM IR (-O0):
define void @I2CMasterDataPut(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add nsw i64 %6, 8
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @I2CMasterDataPut(i64 %0, i64 %1) {
%3 = add nsw i64 %0, 8
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void native_grid_core_init() { printf("Hello World.\n"); }


x86 assembly (clang, -O0):
<native_grid_core_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<native_grid_core_init>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"Hello World.\0A\00"
define void @native_grid_core_init() {
%1 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [13 x i8] c"Hello World.\00"
define void @native_grid_core_init() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ f3(int, double);
void f2(int i, double d) {
  if (d < 0)
    f3(i, d);
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    113b <f2+0x2b>
mov    -0x4(%rbp),%edi
movsd  -0x10(%rbp),%xmm0
call   1030 <f3@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
xorpd  %xmm1,%xmm1
ucomisd %xmm0,%xmm1
jbe    111f <f2+0xf>
jmp    1030 <f3@plt>
ret

LLVM IR (-O0):
define void @f2(i32 %0, double %1) {
%3 = alloca i32
%4 = alloca double
store i32 %0, i32* %3
store double %1, double* %4
%5 = load double, double* %4
%6 = fcmp olt double %5, 0.000000e+00
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i32, i32* %3
%9 = load double, double* %4
%10 = call i32 @f3(i32 %8, double %9)
br label %11
11: ; preds = %7, %2
ret void
}

LLVM IR (-O2):
define void @f2(i32 %0, double %1) {
%3 = fcmp olt double %1, 0.000000e+00
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @f3(i32 %0, double %1)
br label %6
6: ; preds = %4, %2
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void *rebuild(uint32_t idx, uint32_t bit) {
  uintptr_t ptr = 32 * idx + bit;
  ptr <<= 12;
  return (void *)ptr;
}


x86 assembly (clang, -O0):
<rebuild>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x5,%eax
add    -0x8(%rbp),%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shl    $0xc,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rebuild>:
shl    $0x5,%edi
add    %esi,%edi
movslq %edi,%rax
shl    $0xc,%rax
ret

LLVM IR (-O0):
define i8* @rebuild(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = mul nsw i32 32, %6
%8 = load i32, i32* %4
%9 = add nsw i32 %7, %8
%10 = sext i32 %9 to i64
store i64 %10, i64* %5
%11 = load i64, i64* %5
%12 = shl i64 %11, 12
store i64 %12, i64* %5
%13 = load i64, i64* %5
%14 = inttoptr i64 %13 to i8*
ret i8* %14
}

LLVM IR (-O2):
define i8* @rebuild(i32 %0, i32 %1) {
%3 = shl nsw i32 %0, 5
%4 = add nsw i32 %3, %1
%5 = sext i32 %4 to i64
%6 = shl nsw i64 %5, 12
%7 = inttoptr i64 %6 to i8*
ret i8* %7
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct host1x_pushbuf {
  int dummy;
};

/* Variables and functions */
int host1x_pushbuf_push(struct host1x_pushbuf *, int /*<<< orphan*/);
int host1x_pushbuf_push_float(struct host1x_pushbuf *pb, float f) {
  union {
    uint32_t u;
    float f;
  } value;
  value.f = f;
  return host1x_pushbuf_push(pb, value.u);
}


x86 assembly (clang, -O0):
<host1x_pushbuf_push_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
call   1030 <host1x_pushbuf_push@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<host1x_pushbuf_push_float>:
movd   %xmm0,%esi
jmp    1030 <host1x_pushbuf_push@plt>

LLVM IR (-O0):
%struct.host1x_pushbuf = type { i32 }
%union.anon = type { i32 }
define i32 @host1x_pushbuf_push_float(%struct.host1x_pushbuf* %0, float %1) {
%3 = alloca %struct.host1x_pushbuf*
%4 = alloca float
%5 = alloca %union.anon
store %struct.host1x_pushbuf* %0, %struct.host1x_pushbuf** %3
store float %1, float* %4
%6 = load float, float* %4
%7 = bitcast %union.anon* %5 to float*
store float %6, float* %7
%8 = load %struct.host1x_pushbuf*, %struct.host1x_pushbuf** %3
%9 = bitcast %union.anon* %5 to i32*
%10 = load i32, i32* %9
%11 = call i32 @host1x_pushbuf_push(%struct.host1x_pushbuf* %8, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
%struct.host1x_pushbuf = type { i32 }
define i32 @host1x_pushbuf_push_float(%struct.host1x_pushbuf* %0, float %1) {
%3 = bitcast float %1 to i32
%4 = tail call i32 @host1x_pushbuf_push(%struct.host1x_pushbuf* %0, i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
char *wfile_nullfile(void) {
  static char nullfile[32];
  strcpy(nullfile, "/dev/null");
  return (nullfile);
}


x86 assembly (clang, -O0):
<wfile_nullfile>:
push   %rbp
mov    %rsp,%rbp
lea    0x2f25(%rip),%rdi
lea    0xede(%rip),%rsi
call   1030 <strcpy@plt>
lea    0x2f12(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wfile_nullfile>:
push   %rbx
lea    0x2f28(%rip),%rbx
lea    0xee1(%rip),%rsi
mov    %rbx,%rdi
call   1030 <strcpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@wfile_nullfile.nullfile = internal global [32 x i8] zeroinitializer
@.str = [10 x i8] c"/dev/null\00"
define i8* @wfile_nullfile() {
%1 = call i32 @strcpy(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @wfile_nullfile.nullfile, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i8* getelementptr inbounds ([32 x i8], [32 x i8]* @wfile_nullfile.nullfile, i64 0, i64 0)
}

LLVM IR (-O2):
@wfile_nullfile.nullfile = internal global [32 x i8] zeroinitializer
@.str = [10 x i8] c"/dev/null\00"
define i8* @wfile_nullfile() {
%1 = tail call i32 @strcpy(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @wfile_nullfile.nullfile, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i8* getelementptr inbounds ([32 x i8], [32 x i8]* @wfile_nullfile.nullfile, i64 0, i64 0)
}
int power_of_two(int n) {
  if (n == 0)
    return 1;
  else
    return 2 * power_of_two(n - 1);
}


x86 assembly (clang, -O0):
<power_of_two>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1131 <power_of_two+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1142 <power_of_two+0x32>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <power_of_two@plt>
shl    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<power_of_two>:
test   %edi,%edi
je     1124 <power_of_two+0x14>
push   %rax
add    $0xffffffff,%edi
call   1030 <power_of_two@plt>
add    %eax,%eax
add    $0x8,%rsp
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @power_of_two(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %12
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i32 @power_of_two(i32 %9)
%11 = mul nsw i32 2, %10
store i32 %11, i32* %2
br label %12
12: ; preds = %7, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @power_of_two(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1, %5
%4 = phi i32 [ %8, %5 ], [ 1, %1 ]
ret i32 %4
5: ; preds = %1
%6 = add nsw i32 %0, -1
%7 = tail call i32 @power_of_two(i32 %6)
%8 = shl nsw i32 %7, 1
br label %3
}
/* Variables and functions */
bool isPowerOfThree(int n) {
  while (n % 3 == 0 && n) {
    n /= 3;
  }
  if (n == 1) {
    return true;
  } else {
    return false;
  }
}


x86 assembly (clang, -O0):
<isPowerOfThree>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
xor    %eax,%eax
cmp    $0x0,%edx
mov    %al,-0x9(%rbp)
jne    112a <isPowerOfThree+0x2a>
cmpl   $0x0,-0x8(%rbp)
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    113a <isPowerOfThree+0x3a>
jmp    114d <isPowerOfThree+0x4d>
mov    -0x8(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
jmp    1107 <isPowerOfThree+0x7>
cmpl   $0x1,-0x8(%rbp)
jne    1163 <isPowerOfThree+0x63>
movl   $0x1,-0x4(%rbp)
jmp    116a <isPowerOfThree+0x6a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPowerOfThree>:
test   %edi,%edi
je     114d <isPowerOfThree+0x4d>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movslq %edi,%rax
imul   $0x55555556,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,2),%ecx
sub    %ecx,%eax
jne    114d <isPowerOfThree+0x4d>
movslq %edi,%rax
imul   $0x55555556,%rax,%rdi
mov    %rdi,%rcx
shr    $0x3f,%rcx
shr    $0x20,%rdi
add    %ecx,%edi
add    $0xfffffffd,%eax
cmp    $0xfffffffa,%eax
jbe    1110 <isPowerOfThree+0x10>
xor    %eax,%eax
cmp    $0x1,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @isPowerOfThree(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
br label %4
4: ; preds = %13, %1
%5 = load i32, i32* %3
%6 = srem i32 %5, 3
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32, i32* %3
%10 = icmp ne i32 %9, 0
br label %11
11: ; preds = %8, %4
%12 = phi i1 [ false, %4 ], [ %10, %8 ]
br i1 %12, label %13, label %16
13: ; preds = %11
%14 = load i32, i32* %3
%15 = sdiv i32 %14, 3
store i32 %15, i32* %3
br label %4
16: ; preds = %11
%17 = load i32, i32* %3
%18 = icmp eq i32 %17, 1
br i1 %18, label %19, label %20
19: ; preds = %16
store i32 1, i32* %2
br label %21
20: ; preds = %16
store i32 0, i32* %2
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @isPowerOfThree(i32 %0) {
%2 = srem i32 %0, 3
%3 = icmp eq i32 %2, 0
%4 = icmp ne i32 %0, 0
%5 = and i1 %4, %3
br i1 %5, label %6, label %14
6: ; preds = %1, %6
%7 = phi i32 [ %8, %6 ], [ %0, %1 ]
%8 = sdiv i32 %7, 3
%9 = srem i32 %8, 3
%10 = icmp eq i32 %9, 0
%11 = add i32 %7, -3
%12 = icmp ult i32 %11, -5
%13 = and i1 %12, %10
br i1 %13, label %6, label %14
14: ; preds = %6, %1
%15 = phi i32 [ %0, %1 ], [ %8, %6 ]
%16 = icmp eq i32 %15, 1
%17 = zext i1 %16 to i32
ret i32 %17
}
unsigned long long int rem(unsigned long long int a, unsigned long long int b) {
  if (b == 0) {
    return a;
  } else {
    return a % b;
  }
}


x86 assembly (clang, -O0):
<rem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1124 <rem+0x24>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1134 <rem+0x34>
mov    -0x10(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x18(%rbp)
mov    %rdx,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rem>:
mov    %rdi,%rax
test   %rsi,%rsi
je     111c <rem+0x1c>
mov    %rax,%rcx
or     %rsi,%rcx
shr    $0x20,%rcx
je     111d <rem+0x1d>
xor    %edx,%edx
div    %rsi
mov    %rdx,%rax
ret
xor    %edx,%edx
div    %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i64 @rem(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %4
store i64 %9, i64* %3
br label %14
10: ; preds = %2
%11 = load i64, i64* %4
%12 = load i64, i64* %5
%13 = urem i64 %11, %12
store i64 %13, i64* %3
br label %14
14: ; preds = %10, %8
%15 = load i64, i64* %3
ret i64 %15
}

LLVM IR (-O2):
define i64 @rem(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = urem i64 %0, %1
br label %6
6: ; preds = %2, %4
%7 = phi i64 [ %5, %4 ], [ %0, %2 ]
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void JV_Help() {
  printf("= Usage =\n"
         "./NPKICracker -f <PrivateKey> -m <MinPWLen> -M <MaxPWLen> "
         "[Optionial...]\n"
         "\n"
         "= Must-need Arguments =\n"
         "-f  : Must Provide NPKI's private key file path\n"
         "-m  : Minimum length of attacking password (default is 8)\n"
         "-M  : Maximum length of attacking password (default is 12)\n"
         "-c  : Charset pool of attacking password\n"
         "\n"
         "= Optionial Arguments =\n"
         "-i  : Start from this initial password\n"
         "        Usage : -i <InitialPassword>\n"
         "-p  : Use custom print interval\n"
         "        Usage : -p <PrintInterval>\n"
         "-cl : Use OpenCL\n"
         "        If OpenCL is enabled, cpu multithreading will be disabled.\n"
         "        OpenCL functionality is not available now.\n");
}


x86 assembly (clang, -O0):
<JV_Help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<JV_Help>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [618 x i8] c"= Usage =\0A./NPKICracker -f <PrivateKey> -m <MinPWLen> -M <MaxPWLen> [Optionial...]\0A\0A= Must-need Arguments =\0A-f : Must Provide NPKI's private key file path\0A-m : Minimum length of attacking password (default is 8)\0A-M : Maximum length of attacking password (default is 12)\0A-c : Charset pool of attacking password\0A\0A= Optionial Arguments =\0A-i : Start from this initial password\0A Usage : -i <InitialPassword>\0A-p : Use custom print interval\0A Usage : -p <PrintInterval>\0A-cl : Use OpenCL\0A If OpenCL is enabled, cpu multithreading will be disabled.\0A OpenCL functionality is not available now.\0A\00"
define void @JV_Help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([618 x i8], [618 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [617 x i8] c"= Usage =\0A./NPKICracker -f <PrivateKey> -m <MinPWLen> -M <MaxPWLen> [Optionial...]\0A\0A= Must-need Arguments =\0A-f : Must Provide NPKI's private key file path\0A-m : Minimum length of attacking password (default is 8)\0A-M : Maximum length of attacking password (default is 12)\0A-c : Charset pool of attacking password\0A\0A= Optionial Arguments =\0A-i : Start from this initial password\0A Usage : -i <InitialPassword>\0A-p : Use custom print interval\0A Usage : -p <PrintInterval>\0A-cl : Use OpenCL\0A If OpenCL is enabled, cpu multithreading will be disabled.\0A OpenCL functionality is not available now.\00"
define void @JV_Help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([617 x i8], [617 x i8]* @str, i64 0, i64 0))
ret void
}
double _fmin(double a, double b) { return (a < b ? a : b); }


x86 assembly (clang, -O0):
<_fmin>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1131 <_fmin+0x31>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    113b <_fmin+0x3b>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fmin>:
minsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @_fmin(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp olt double %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load double, double* %3
br label %12
10: ; preds = %2
%11 = load double, double* %4
br label %12
12: ; preds = %10, %8
%13 = phi double [ %9, %8 ], [ %11, %10 ]
ret double %13
}

LLVM IR (-O2):
define double @_fmin(double %0, double %1) {
%3 = fcmp olt double %0, %1
%4 = select i1 %3, double %0, double %1
ret double %4
}
/* Type definitions */
typedef int /*<<< orphan*/ ret_buffer;

/* Variables and functions */
int /*<<< orphan*/ fgets(char *, int, int /*<<< orphan*/);
scalar_t__ malloc(int);
int /*<<< orphan*/ stdin;
char *read_data() {
  char *ret_buffer = (char *)malloc(1023);
  fgets(ret_buffer, sizeof(ret_buffer), stdin);
  return ret_buffer;
}


x86 assembly (clang, -O0):
<read_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x3ff,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ea7(%rip),%rax
mov    (%rax),%edx
mov    $0x8,%esi
call   1030 <fgets@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_data>:
push   %rbx
mov    $0x3ff,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    0x2eb3(%rip),%rax
mov    (%rax),%edx
mov    %rbx,%rdi
mov    $0x8,%esi
call   1030 <fgets@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@stdin = global i32 0
define i8* @read_data() {
%1 = alloca i8*
%2 = call i64 @malloc(i32 1023)
%3 = inttoptr i64 %2 to i8*
store i8* %3, i8** %1
%4 = load i8*, i8** %1
%5 = load i32, i32* @stdin
%6 = call i32 @fgets(i8* %4, i32 8, i32 %5)
%7 = load i8*, i8** %1
ret i8* %7
}

LLVM IR (-O2):
@stdin = global i32 0
define i8* @read_data() {
%1 = tail call i64 @malloc(i32 1023)
%2 = inttoptr i64 %1 to i8*
%3 = load i32, i32* @stdin
%4 = tail call i32 @fgets(i8* %2, i32 8, i32 %3)
ret i8* %2
}
unsigned char getCardSymbol(unsigned char card) {
  switch (card) {
  case 1:
    return 'A';
  case 10:
    return 'T';
  case 11:
    return 'J';
  case 12:
    return 'Q';
  case 13:
    return 'K';
  default:
    return card + 0x30;
  }
}


x86 assembly (clang, -O0):
<getCardSymbol>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0xc,%eax
ja     1161 <getCardSymbol+0x61>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movb   $0x41,-0x1(%rbp)
jmp    116b <getCardSymbol+0x6b>
movb   $0x54,-0x1(%rbp)
jmp    116b <getCardSymbol+0x6b>
movb   $0x4a,-0x1(%rbp)
jmp    116b <getCardSymbol+0x6b>
movb   $0x51,-0x1(%rbp)
jmp    116b <getCardSymbol+0x6b>
movb   $0x4b,-0x1(%rbp)
jmp    116b <getCardSymbol+0x6b>
movzbl -0x2(%rbp),%eax
add    $0x30,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getCardSymbol>:
lea    -0x1(%rdi),%ecx
cmp    $0xc,%cl
ja     1120 <getCardSymbol+0x20>
mov    $0x41,%al
movzbl %cl,%ecx
lea    0xeec(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
mov    $0x54,%al
ret
add    $0x30,%dil
mov    %edi,%eax
ret
mov    $0x4a,%al
ret
mov    $0x51,%al
ret
mov    $0x4b,%al
ret

LLVM IR (-O0):
define zeroext i8 @getCardSymbol(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
switch i32 %5, label %11 [
i32 1, label %6
i32 10, label %7
i32 11, label %8
i32 12, label %9
i32 13, label %10
]
6: ; preds = %1
store i8 65, i8* %2
br label %16
7: ; preds = %1
store i8 84, i8* %2
br label %16
8: ; preds = %1
store i8 74, i8* %2
br label %16
9: ; preds = %1
store i8 81, i8* %2
br label %16
10: ; preds = %1
store i8 75, i8* %2
br label %16
11: ; preds = %1
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = add nsw i32 %13, 48
%15 = trunc i32 %14 to i8
store i8 %15, i8* %2
br label %16
16: ; preds = %11, %10, %9, %8, %7, %6
%17 = load i8, i8* %2
ret i8 %17
}

LLVM IR (-O2):
define zeroext i8 @getCardSymbol(i8 zeroext %0) {
switch i8 %0, label %6 [
i8 1, label %8
i8 10, label %2
i8 11, label %3
i8 12, label %4
i8 13, label %5
]
2: ; preds = %1
br label %8
3: ; preds = %1
br label %8
4: ; preds = %1
br label %8
5: ; preds = %1
br label %8
6: ; preds = %1
%7 = add i8 %0, 48
br label %8
8: ; preds = %1, %6, %5, %4, %3, %2
%9 = phi i8 [ %7, %6 ], [ 75, %5 ], [ 81, %4 ], [ 74, %3 ], [ 84, %2 ], [ 65, %1 ]
ret i8 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int /*<<< orphan*/ sbrk(int /*<<< orphan*/);
int main() {
  printf("#define CONFIG_SBRK_BASE ((void *) %p)\n", sbrk(0));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1040 <sbrk@plt>
mov    %eax,%esi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <sbrk@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [40 x i8] c"#define CONFIG_SBRK_BASE ((void *) %p)\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @sbrk(i32 0)
%3 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [40 x i8] c"#define CONFIG_SBRK_BASE ((void *) %p)\0A\00"
define i32 @main() {
%1 = tail call i32 @sbrk(i32 0)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ refresh();
void term_refresh(void) { refresh(); }


x86 assembly (clang, -O0):
<term_refresh>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <refresh@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<term_refresh>:
xor    %eax,%eax
jmp    1030 <refresh@plt>

LLVM IR (-O0):
define void @term_refresh() {
%1 = call i32 (...) @refresh()
ret void
}

LLVM IR (-O2):
define void @term_refresh() {
%1 = tail call i32 (...) @refresh()
ret void
}
int fun935() { return 935; }


x86 assembly (clang, -O0):
<fun935>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3a7,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun935>:
mov    $0x3a7,%eax
ret

LLVM IR (-O0):
define i32 @fun935() {
ret i32 935
}

LLVM IR (-O2):
define i32 @fun935() {
ret i32 935
}
/* Variables and functions */
int /*<<< orphan*/ dmmddac_(int *, int *, double *, double *, int *, double *,
                            double *, int *);
void wcc_dmmddac_(int *M, int *N, char *ALPHA, char *A, int *LDA, char *BETA,
                  char *B, int *LDB) {
  dmmddac_(M, N, (double *)ALPHA, (double *)A, LDA, (double *)BETA, (double *)B,
           LDB);
}


x86 assembly (clang, -O0):
<wcc_dmmddac_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    -0x30(%rbp),%r9
mov    0x10(%rbp),%r10
mov    0x18(%rbp),%rax
mov    %r10,(%rsp)
mov    %rax,0x8(%rsp)
call   1030 <dmmddac_@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcc_dmmddac_>:
jmp    1030 <dmmddac_@plt>

LLVM IR (-O0):
define void @wcc_dmmddac_(i32* %0, i32* %1, i8* %2, i8* %3, i32* %4, i8* %5, i8* %6, i32* %7) {
%9 = alloca i32*
%10 = alloca i32*
%11 = alloca i8*
%12 = alloca i8*
%13 = alloca i32*
%14 = alloca i8*
%15 = alloca i8*
%16 = alloca i32*
store i32* %0, i32** %9
store i32* %1, i32** %10
store i8* %2, i8** %11
store i8* %3, i8** %12
store i32* %4, i32** %13
store i8* %5, i8** %14
store i8* %6, i8** %15
store i32* %7, i32** %16
%17 = load i32*, i32** %9
%18 = load i32*, i32** %10
%19 = load i8*, i8** %11
%20 = bitcast i8* %19 to double*
%21 = load i8*, i8** %12
%22 = bitcast i8* %21 to double*
%23 = load i32*, i32** %13
%24 = load i8*, i8** %14
%25 = bitcast i8* %24 to double*
%26 = load i8*, i8** %15
%27 = bitcast i8* %26 to double*
%28 = load i32*, i32** %16
%29 = call i32 @dmmddac_(i32* %17, i32* %18, double* %20, double* %22, i32* %23, double* %25, double* %27, i32* %28)
ret void
}

LLVM IR (-O2):
define void @wcc_dmmddac_(i32* %0, i32* %1, i8* %2, i8* %3, i32* %4, i8* %5, i8* %6, i32* %7) {
%9 = bitcast i8* %2 to double*
%10 = bitcast i8* %3 to double*
%11 = bitcast i8* %5 to double*
%12 = bitcast i8* %6 to double*
%13 = tail call i32 @dmmddac_(i32* %0, i32* %1, double* %9, double* %10, i32* %4, double* %11, double* %12, i32* %7)
ret void
}
/* Type definitions */
struct nf2device {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ readReg(struct nf2device *, int, unsigned int *);
int isVirtexProgrammed(struct nf2device *nf2) {
  unsigned progStatus;
  readReg(nf2, 0x0000104, &progStatus);
  return (progStatus & 0x100) != 0;
}


x86 assembly (clang, -O0):
<isVirtexProgrammed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x104,%esi
lea    -0xc(%rbp),%rdx
call   1030 <readReg@plt>
mov    -0xc(%rbp),%eax
and    $0x100,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isVirtexProgrammed>:
push   %rax
lea    0x4(%rsp),%rdx
mov    $0x104,%esi
call   1030 <readReg@plt>
mov    0x4(%rsp),%eax
shr    $0x8,%eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.nf2device = type { i32 }
define i32 @isVirtexProgrammed(%struct.nf2device* %0) {
%2 = alloca %struct.nf2device*
%3 = alloca i32
store %struct.nf2device* %0, %struct.nf2device** %2
%4 = load %struct.nf2device*, %struct.nf2device** %2
%5 = call i32 @readReg(%struct.nf2device* %4, i32 260, i32* %3)
%6 = load i32, i32* %3
%7 = and i32 %6, 256
%8 = icmp ne i32 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
%struct.nf2device = type { i32 }
define i32 @isVirtexProgrammed(%struct.nf2device* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @readReg(%struct.nf2device* %0, i32 260, i32* %2)
%5 = load i32, i32* %2
%6 = lshr i32 %5, 8
%7 = and i32 %6, 1
ret i32 %7
}
unsigned int ima9_quantize(int step, int diff) {
  unsigned int sign = (diff < 0) ? 8 : 0;
  unsigned int code;
  if (sign)
    diff = -diff;
  code = 4 * diff / step;
  if (code == 7)
    code = 6;
  if (code > 7)
    code = 7;
  return code | sign;
}


x86 assembly (clang, -O0):
<ima9_quantize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edx
xor    %eax,%eax
mov    $0x8,%ecx
cmp    $0x0,%edx
cmovl  %ecx,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     112f <ima9_quantize+0x2f>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x2,%eax
cltd
idivl  -0x4(%rbp)
mov    %eax,-0x10(%rbp)
cmpl   $0x7,-0x10(%rbp)
jne    114d <ima9_quantize+0x4d>
movl   $0x6,-0x10(%rbp)
cmpl   $0x7,-0x10(%rbp)
jbe    115e <ima9_quantize+0x5e>
movl   $0x7,-0x10(%rbp)
mov    -0x10(%rbp),%eax
or     -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ima9_quantize>:
mov    %esi,%eax
neg    %eax
cmovs  %esi,%eax
shr    $0x1c,%esi
and    $0xfffffff8,%esi
shl    $0x2,%eax
cltd
idiv   %edi
cmp    $0x7,%eax
mov    $0x6,%ecx
cmove  %ecx,%eax
cmp    $0x7,%eax
mov    $0x7,%ecx
cmovae %ecx,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @ima9_quantize(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 0
%9 = zext i1 %8 to i64
%10 = select i1 %8, i32 8, i32 0
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %2
%14 = load i32, i32* %4
%15 = sub nsw i32 0, %14
store i32 %15, i32* %4
br label %16
16: ; preds = %13, %2
%17 = load i32, i32* %4
%18 = mul nsw i32 4, %17
%19 = load i32, i32* %3
%20 = sdiv i32 %18, %19
store i32 %20, i32* %6
%21 = load i32, i32* %6
%22 = icmp eq i32 %21, 7
br i1 %22, label %23, label %24
23: ; preds = %16
store i32 6, i32* %6
br label %24
24: ; preds = %23, %16
%25 = load i32, i32* %6
%26 = icmp ugt i32 %25, 7
br i1 %26, label %27, label %28
27: ; preds = %24
store i32 7, i32* %6
br label %28
28: ; preds = %27, %24
%29 = load i32, i32* %6
%30 = load i32, i32* %5
%31 = or i32 %29, %30
ret i32 %31
}

LLVM IR (-O2):
define i32 @ima9_quantize(i32 %0, i32 %1) {
%3 = tail call i32 @llvm.abs.i32(i32 %1, i1 true)
%4 = lshr i32 %1, 28
%5 = and i32 %4, 8
%6 = shl nsw i32 %3, 2
%7 = sdiv i32 %6, %0
%8 = icmp eq i32 %7, 7
%9 = select i1 %8, i32 6, i32 %7
%10 = icmp ult i32 %9, 7
%11 = select i1 %10, i32 %9, i32 7
%12 = or i32 %11, %5
ret i32 %12
}
int ThreeInt2Int(int a, int b, int c) { return a * b + c; }


x86 assembly (clang, -O0):
<ThreeInt2Int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ThreeInt2Int>:
imul   %esi,%edi
lea    (%rdi,%rdx,1),%eax
ret

LLVM IR (-O0):
define i32 @ThreeInt2Int(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = mul nsw i32 %7, %8
%10 = load i32, i32* %6
%11 = add nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @ThreeInt2Int(i32 %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %1, %0
%5 = add nsw i32 %4, %2
ret i32 %5
}