xunge/DecIR huggingface dataset:
/* Variables and functions */
unsigned char inb(int);
int /*<<< orphan*/ smbus_delay();
int smbus_wait_until_active(void) {
  unsigned long loops;
  loops = (100 * 1000 * 10);
  do {
    unsigned char val;
    smbus_delay();
    val = inb(0x5000 + 0x0);
    if ((val & 1)) {
      break;
    }
  } while (--loops);
  return loops ? 0 : -4;
}


x86 assembly (clang, -O0):
<smbus_wait_until_active>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0xf4240,-0x8(%rbp)
mov    $0x0,%al
call   1040 <smbus_delay@plt>
mov    $0x5000,%edi
call   1030 <inb@plt>
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1159 <smbus_wait_until_active+0x39>
jmp    1174 <smbus_wait_until_active+0x54>
jmp    115e <smbus_wait_until_active+0x3e>
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
cmp    $0x0,%rax
jne    1130 <smbus_wait_until_active+0x10>
mov    -0x8(%rbp),%rdx
mov    $0xfffffffc,%eax
xor    %ecx,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smbus_wait_until_active>:
push   %rbp
push   %rbx
push   %rax
mov    $0xfffffffffff0bdc0,%rbx
xor    %ebp,%ebp
nopl   0x0(%rax)
xor    %eax,%eax
call   1040 <smbus_delay@plt>
mov    $0x5000,%edi
call   1030 <inb@plt>
test   $0x1,%al
jne    114f <smbus_wait_until_active+0x2f>
inc    %rbx
jne    1130 <smbus_wait_until_active+0x10>
mov    $0xfffffffc,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @smbus_wait_until_active() {
%1 = alloca i64
%2 = alloca i8
store i64 1000000, i64* %1
br label %3
3: ; preds = %12, %0
%4 = call i32 (...) @smbus_delay()
%5 = call zeroext i8 @inb(i32 20480)
store i8 %5, i8* %2
%6 = load i8, i8* %2
%7 = zext i8 %6 to i32
%8 = and i32 %7, 1
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %3
br label %16
11: ; preds = %3
br label %12
12: ; preds = %11
%13 = load i64, i64* %1
%14 = add i64 %13, -1
store i64 %14, i64* %1
%15 = icmp ne i64 %14, 0
br i1 %15, label %3, label %16
16: ; preds = %12, %10
%17 = load i64, i64* %1
%18 = icmp ne i64 %17, 0
%19 = zext i1 %18 to i64
%20 = select i1 %18, i32 0, i32 -4
ret i32 %20
}

LLVM IR (-O2):
define i32 @smbus_wait_until_active() {
br label %1
1: ; preds = %7, %0
%2 = phi i64 [ 1000000, %0 ], [ %8, %7 ]
%3 = tail call i32 (...) @smbus_delay()
%4 = tail call zeroext i8 @inb(i32 20480)
%5 = and i8 %4, 1
%6 = icmp eq i8 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = add nsw i64 %2, -1
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %1
10: ; preds = %7, %1
%11 = phi i32 [ 0, %1 ], [ -4, %7 ]
ret i32 %11
}
/* Variables and functions */
int strtoul(char *, char **, int);
int adv_atoi(char *str, int base) {
  char *endptr = NULL;
  if (str == NULL)
    return -1;
  return strtoul(str, &endptr, base);
}


x86 assembly (clang, -O0):
<adv_atoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
movq   $0x0,-0x20(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    113e <adv_atoi+0x2e>
movl   $0xffffffff,-0x4(%rbp)
jmp    1151 <adv_atoi+0x41>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%edx
lea    -0x20(%rbp),%rsi
call   1030 <strtoul@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<adv_atoi>:
push   %rax
movq   $0x0,(%rsp)
test   %rdi,%rdi
je     112a <adv_atoi+0x1a>
mov    %esi,%edx
mov    %rsp,%rsi
call   1030 <strtoul@plt>
pop    %rcx
ret
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @adv_atoi(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* null, i8** %6
%7 = load i8*, i8** %4
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 -1, i32* %3
br label %14
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = load i32, i32* %5
%13 = call i32 @strtoul(i8* %11, i8** %6, i32 %12)
store i32 %13, i32* %3
br label %14
14: ; preds = %10, %9
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @adv_atoi(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = bitcast i8** %3 to i8*
store i8* null, i8** %3
%5 = icmp eq i8* %0, null
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = call i32 @strtoul(i8* %0, i8** %3, i32 %1)
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ %7, %6 ], [ -1, %2 ]
ret i32 %9
}
void p0(int s) { char b[s]; }


x86 assembly (clang, -O0):
<p0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x10(%rbp)
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<p0>:
ret

LLVM IR (-O0):
define void @p0(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i64
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
%7 = call i8* @llvm.stacksave()
store i8* %7, i8** %3
%8 = alloca i8, i64 %6
store i64 %6, i64* %4
%9 = load i8*, i8** %3
ret void
}

LLVM IR (-O2):
define void @p0(i32 %0) {
ret void
}
int plugin_init_qnaplog(void) { return 0; }


x86 assembly (clang, -O0):
<plugin_init_qnaplog>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<plugin_init_qnaplog>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @plugin_init_qnaplog() {
ret i32 0
}

LLVM IR (-O2):
define i32 @plugin_init_qnaplog() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ocb_crypt(unsigned char *, unsigned char *, unsigned char *,
                             unsigned char *, unsigned int, unsigned char *,
                             unsigned int, int);
void ocb_encrypt(unsigned char *c, unsigned char *k, unsigned char *n,
                 unsigned char *a, unsigned abytes, unsigned char *p,
                 unsigned pbytes) {
  ocb_crypt(c, k, n, a, abytes, p, pbytes, 1);
}


x86 assembly (clang, -O0):
<ocb_encrypt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x10(%rbp),%eax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x24(%rbp),%r8d
mov    -0x30(%rbp),%r9
mov    0x10(%rbp),%eax
mov    %eax,(%rsp)
movl   $0x1,0x8(%rsp)
call   1030 <ocb_crypt@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ocb_encrypt>:
push   %rax
mov    0x10(%rsp),%eax
push   $0x1
push   %rax
call   1030 <ocb_crypt@plt>
add    $0x10,%rsp
pop    %rax
ret

LLVM IR (-O0):
define void @ocb_encrypt(i8* %0, i8* %1, i8* %2, i8* %3, i32 %4, i8* %5, i32 %6) {
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i8*
%11 = alloca i8*
%12 = alloca i32
%13 = alloca i8*
%14 = alloca i32
store i8* %0, i8** %8
store i8* %1, i8** %9
store i8* %2, i8** %10
store i8* %3, i8** %11
store i32 %4, i32* %12
store i8* %5, i8** %13
store i32 %6, i32* %14
%15 = load i8*, i8** %8
%16 = load i8*, i8** %9
%17 = load i8*, i8** %10
%18 = load i8*, i8** %11
%19 = load i32, i32* %12
%20 = load i8*, i8** %13
%21 = load i32, i32* %14
%22 = call i32 @ocb_crypt(i8* %15, i8* %16, i8* %17, i8* %18, i32 %19, i8* %20, i32 %21, i32 1)
ret void
}

LLVM IR (-O2):
define void @ocb_encrypt(i8* %0, i8* %1, i8* %2, i8* %3, i32 %4, i8* %5, i32 %6) {
%8 = tail call i32 @ocb_crypt(i8* %0, i8* %1, i8* %2, i8* %3, i32 %4, i8* %5, i32 %6, i32 1)
ret void
}
void RTNetIPv4AddTCPChecksum(void) {}


x86 assembly (clang, -O0):
<RTNetIPv4AddTCPChecksum>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTNetIPv4AddTCPChecksum>:
ret

LLVM IR (-O0):
define void @RTNetIPv4AddTCPChecksum() {
ret void
}

LLVM IR (-O2):
define void @RTNetIPv4AddTCPChecksum() {
ret void
}
/* Variables and functions */
char *malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
char *strdup(const char *string) {
  char *dup = malloc(strlen(string) + 1);
  strcpy(dup, string);
  return dup;
}


x86 assembly (clang, -O0):
<strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i8* @malloc(i64 %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = load i8*, i8** %2
%10 = call i32 @strcpy(i8* %8, i8* %9)
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
define i8* @strdup(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i8* @malloc(i64 %3)
%5 = tail call i32 @strcpy(i8* %4, i8* %0)
ret i8* %4
}
char isop(char symb) {
  if (symb == '+' || symb == '-' || symb == '*' || symb == '/') {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<isop>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
cmp    $0x2b,%eax
je     113e <isop+0x3e>
movsbl -0x2(%rbp),%eax
cmp    $0x2d,%eax
je     113e <isop+0x3e>
movsbl -0x2(%rbp),%eax
cmp    $0x2a,%eax
je     113e <isop+0x3e>
movsbl -0x2(%rbp),%eax
cmp    $0x2f,%eax
jne    1147 <isop+0x47>
movb   $0x1,-0x1(%rbp)
jmp    114b <isop+0x4b>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isop>:
add    $0xd6,%dil
movzbl %dil,%edx
lea    0x0(,%rdx,8),%ecx
movabs $0x10001000101,%rax
shr    %cl,%rax
xor    %ecx,%ecx
cmp    $0x6,%dl
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @isop(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 43
br i1 %6, label %19, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 45
br i1 %10, label %19, label %11
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 42
br i1 %14, label %19, label %15
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 47
br i1 %18, label %19, label %20
19: ; preds = %15, %11, %7, %1
store i8 1, i8* %2
br label %21
20: ; preds = %15
store i8 0, i8* %2
br label %21
21: ; preds = %20, %19
%22 = load i8, i8* %2
ret i8 %22
}

LLVM IR (-O2):
define signext i8 @isop(i8 signext %0) {
%2 = add i8 %0, -42
%3 = icmp ult i8 %2, 6
%4 = zext i8 %2 to i48
%5 = shl nuw nsw i48 %4, 3
%6 = lshr i48 1099528405249, %5
%7 = trunc i48 %6 to i8
%8 = select i1 %3, i8 %7, i8 0
ret i8 %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int XmbDrawImageString() {
  printf("XmbDrawImageString called\n");
  return 0;
}


x86 assembly (clang, -O0):
<XmbDrawImageString>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XmbDrawImageString>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"XmbDrawImageString called\0A\00"
define i32 @XmbDrawImageString() {
%1 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [26 x i8] c"XmbDrawImageString called\00"
define i32 @XmbDrawImageString() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ o_s(char *);
int /*<<< orphan*/ printv(char *, int /*<<< orphan*/);
void fail(char *str) {
  printv("ERR: %% failed\n", o_s(str));
  exit(1);
}


x86 assembly (clang, -O0):
<fail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <o_s@plt>
mov    %eax,%esi
lea    0xeb2(%rip),%rdi
call   1030 <printv@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<fail>:
push   %rax
call   1040 <o_s@plt>
lea    0xec3(%rip),%rdi
mov    %eax,%esi
call   1030 <printv@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"ERR: %% failed\0A\00"
define void @fail(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @o_s(i8* %3)
%5 = call i32 @printv(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [16 x i8] c"ERR: %% failed\0A\00"
define void @fail(i8* %0) {
%2 = tail call i32 @o_s(i8* %0)
%3 = tail call i32 @printv(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = tail call i32 @exit(i32 1)
unreachable
}
int test_imm_11uint16_reg(unsigned short val) {
  return ((val) & (0x11 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_11uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x11,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_11uint16_reg>:
test   $0x11,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_11uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 17
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_11uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 17
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct LILdubl {
  double d;
  unsigned int *i;
};

/* Variables and functions */
void *bswap_32(unsigned int);
double DONTUSE__NXSwapBigDoubleToLittleEndian(double x) {
  union LILdubl {
    double d;
    unsigned int i[2];
  } l;
  l.d = x;
  unsigned int tmp = (bswap_32(l.i[0]));
  l.i[0] = (bswap_32(l.i[1]));
  l.i[1] = tmp;
  return l.d;
}


x86 assembly (clang, -O0):
<DONTUSE__NXSwapBigDoubleToLittleEndian>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
mov    -0x10(%rbp),%edi
call   1030 <bswap_32@plt>
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <bswap_32@plt>
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0xc(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DONTUSE__NXSwapBigDoubleToLittleEndian>:
push   %r14
push   %rbx
push   %rax
movq   %xmm0,%r14
mov    %r14d,%edi
call   1030 <bswap_32@plt>
mov    %rax,%rbx
shr    $0x20,%r14
mov    %r14d,%edi
call   1030 <bswap_32@plt>
mov    %eax,%eax
shl    $0x20,%rbx
or     %rax,%rbx
movq   %rbx,%xmm0
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%union.LILdubl = type { double }
define double @DONTUSE__NXSwapBigDoubleToLittleEndian(double %0) {
%2 = alloca double
%3 = alloca %union.LILdubl
%4 = alloca i32
store double %0, double* %2
%5 = load double, double* %2
%6 = bitcast %union.LILdubl* %3 to double*
store double %5, double* %6
%7 = bitcast %union.LILdubl* %3 to [2 x i32]*
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 0
%9 = load i32, i32* %8
%10 = call i8* @bswap_32(i32 %9)
%11 = ptrtoint i8* %10 to i32
store i32 %11, i32* %4
%12 = bitcast %union.LILdubl* %3 to [2 x i32]*
%13 = getelementptr inbounds [2 x i32], [2 x i32]* %12, i64 0, i64 1
%14 = load i32, i32* %13
%15 = call i8* @bswap_32(i32 %14)
%16 = ptrtoint i8* %15 to i32
%17 = bitcast %union.LILdubl* %3 to [2 x i32]*
%18 = getelementptr inbounds [2 x i32], [2 x i32]* %17, i64 0, i64 0
store i32 %16, i32* %18
%19 = load i32, i32* %4
%20 = bitcast %union.LILdubl* %3 to [2 x i32]*
%21 = getelementptr inbounds [2 x i32], [2 x i32]* %20, i64 0, i64 1
store i32 %19, i32* %21
%22 = bitcast %union.LILdubl* %3 to double*
%23 = load double, double* %22
ret double %23
}

LLVM IR (-O2):
define double @DONTUSE__NXSwapBigDoubleToLittleEndian(double %0) {
%2 = bitcast double %0 to i64
%3 = trunc i64 %2 to i32
%4 = tail call i8* @bswap_32(i32 %3)
%5 = ptrtoint i8* %4 to i64
%6 = lshr i64 %2, 32
%7 = trunc i64 %6 to i32
%8 = tail call i8* @bswap_32(i32 %7)
%9 = ptrtoint i8* %8 to i64
%10 = and i64 %9, 4294967295
%11 = shl i64 %5, 32
%12 = or i64 %10, %11
%13 = bitcast i64 %12 to double
ret double %13
}
/* Variables and functions */
int /*<<< orphan*/ handler_not_implemented(char *);
void defaultAddressExceptionHandler() {
  handler_not_implemented("ADDRESS_EXCEPTION_HANDLER");
}


x86 assembly (clang, -O0):
<defaultAddressExceptionHandler>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <handler_not_implemented@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<defaultAddressExceptionHandler>:
lea    0xee9(%rip),%rdi
jmp    1030 <handler_not_implemented@plt>

LLVM IR (-O0):
@.str = [26 x i8] c"ADDRESS_EXCEPTION_HANDLER\00"
define void @defaultAddressExceptionHandler() {
%1 = call i32 @handler_not_implemented(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [26 x i8] c"ADDRESS_EXCEPTION_HANDLER\00"
define void @defaultAddressExceptionHandler() {
%1 = tail call i32 @handler_not_implemented(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ private_array_check(int *);
void initialize_array() {
  int *numbers = NULL, i = 0;
  for (i = 0; i < 4; i++) {
    numbers[i] = i + 1;
  }
  numbers[4] = 0;
  private_array_check(numbers);
}


x86 assembly (clang, -O0):
<initialize_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x4,-0xc(%rbp)
jge    1157 <initialize_array+0x47>
mov    -0xc(%rbp),%edx
add    $0x1,%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112e <initialize_array+0x1e>
mov    -0x8(%rbp),%rax
movl   $0x0,0x10(%rax)
mov    -0x8(%rbp),%rdi
call   1030 <private_array_check@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_array>:
movl   $0x0,0x10
xor    %edi,%edi
jmp    1030 <private_array_check@plt>

LLVM IR (-O0):
define void @initialize_array() {
%1 = alloca i32*
%2 = alloca i32
store i32* null, i32** %1
store i32 0, i32* %2
store i32 0, i32* %2
br label %3
3: ; preds = %13, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 4
br i1 %5, label %6, label %16
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
%9 = load i32*, i32** %1
%10 = load i32, i32* %2
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, i32* %9, i64 %11
store i32 %8, i32* %12
br label %13
13: ; preds = %6
%14 = load i32, i32* %2
%15 = add nsw i32 %14, 1
store i32 %15, i32* %2
br label %3
16: ; preds = %3
%17 = load i32*, i32** %1
%18 = getelementptr inbounds i32, i32* %17, i64 4
store i32 0, i32* %18
%19 = load i32*, i32** %1
%20 = call i32 @private_array_check(i32* %19)
ret void
}

LLVM IR (-O2):
define void @initialize_array() {
store i32 0, i32* inttoptr (i64 16 to i32*)
%1 = tail call i32 @private_array_check(i32* null)
ret void
}
int TargetIs64Bit(void) { return sizeof(void *) > 4 || sizeof(long) > 4; }


x86 assembly (clang, -O0):
<TargetIs64Bit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TargetIs64Bit>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @TargetIs64Bit() {
ret i32 1
}

LLVM IR (-O2):
define i32 @TargetIs64Bit() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void MyFree(void *address) { free(address); }


x86 assembly (clang, -O0):
<MyFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MyFree>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @MyFree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @MyFree(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
int main() {
  int bob;
  int samantha;
  int temp;
  bob = 13;
  samantha = 17;
  while (bob + samantha < 100) {
    temp = bob;
    bob = samantha;
    samantha = temp;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0xd,-0x8(%rbp)
movl   $0x11,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
cmp    $0x64,%eax
jge    113f <main+0x3f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1119 <main+0x19>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 13, i32* %2
store i32 17, i32* %3
br label %5
5: ; preds = %10, %0
%6 = load i32, i32* %2
%7 = load i32, i32* %3
%8 = add nsw i32 %6, %7
%9 = icmp slt i32 %8, 100
br i1 %9, label %10, label %14
10: ; preds = %5
%11 = load i32, i32* %2
store i32 %11, i32* %4
%12 = load i32, i32* %3
store i32 %12, i32* %2
%13 = load i32, i32* %4
store i32 %13, i32* %3
br label %5
14: ; preds = %5
ret i32 0
}

LLVM IR (-O2):
/* Variables and functions */
int /*<<< orphan*/ _Error(long, char *);
void Error_PrefixSyntaxCannotStartWithExpression(long p_position) {
  _Error(p_position, "Prefix operator syntax cannot start with an expression");
}


x86 assembly (clang, -O0):
<Error_PrefixSyntaxCannotStartWithExpression>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <_Error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Error_PrefixSyntaxCannotStartWithExpression>:
lea    0xee9(%rip),%rsi
jmp    1030 <_Error@plt>

LLVM IR (-O0):
@.str = [55 x i8] c"Prefix operator syntax cannot start with an expression\00"
define void @Error_PrefixSyntaxCannotStartWithExpression(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @_Error(i64 %3, i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [55 x i8] c"Prefix operator syntax cannot start with an expression\00"
define void @Error_PrefixSyntaxCannotStartWithExpression(i64 %0) {
%2 = tail call i32 @_Error(i64 %0, i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
void FlashIntEnable(uint32_t ui32IntFlags) {
  (*((volatile unsigned long *)(0x400FD010))) |= ui32IntFlags;
}


x86 assembly (clang, -O0):
<FlashIntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x400fd010,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0x400fd010,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<FlashIntEnable>:
mov    %rdi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
or     %rax,0x400fd010
40
ret

LLVM IR (-O0):
define void @FlashIntEnable(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 1074778128 to i64*)
%5 = or i64 %4, %3
store volatile i64 %5, i64* inttoptr (i64 1074778128 to i64*)
ret void
}

LLVM IR (-O2):
define void @FlashIntEnable(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 1074778128 to i64*)
%5 = or i64 %4, %3
store volatile i64 %5, i64* inttoptr (i64 1074778128 to i64*)
ret void
}
void dummy(double A[], double B[], double C[], double D[]) { return; }


x86 assembly (clang, -O0):
<dummy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy>:
ret

LLVM IR (-O0):
define void @dummy(double* %0, double* %1, double* %2, double* %3) {
%5 = alloca double*
%6 = alloca double*
%7 = alloca double*
%8 = alloca double*
store double* %0, double** %5
store double* %1, double** %6
store double* %2, double** %7
store double* %3, double** %8
ret void
}

LLVM IR (-O2):
define void @dummy(double* nocapture %0, double* nocapture %1, double* nocapture %2, double* nocapture %3) {
ret void
}
void foo593() {}


x86 assembly (clang, -O0):
<foo593>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo593>:
ret

LLVM IR (-O0):
define void @foo593() {
ret void
}

LLVM IR (-O2):
define void @foo593() {
ret void
}
/* Type definitions */
typedef scalar_t__ const wchar_t;

/* Variables and functions */
wchar_t *wcschr(const wchar_t *s, wchar_t c) {
  const wchar_t *p;
  p = s;
  for (;;) {
    if (*p == c) {
      return (wchar_t *)p;
    }
    if (!*p)
      return NULL;
    p++;
  }
}


x86 assembly (clang, -O0):
<wcschr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
cmp    -0x18(%rbp),%rax
jne    1132 <wcschr+0x32>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    115e <wcschr+0x5e>
mov    -0x20(%rbp),%rax
cmpq   $0x0,(%rax)
jne    114d <wcschr+0x4d>
movq   $0x0,-0x8(%rbp)
jmp    115e <wcschr+0x5e>
mov    -0x20(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x20(%rbp)
jmp    1114 <wcschr+0x14>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcschr>:
mov    %rdi,%rax
mov    (%rdi),%rcx
cmp    %rsi,%rcx
je     1122 <wcschr+0x22>
nopl   0x0(%rax,%rax,1)
test   %rcx,%rcx
je     1123 <wcschr+0x23>
mov    0x8(%rax),%rcx
add    $0x8,%rax
cmp    %rsi,%rcx
jne    1110 <wcschr+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64* @wcschr(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64*
store i64* %0, i64** %4
store i64 %1, i64* %5
%7 = load i64*, i64** %4
store i64* %7, i64** %6
br label %8
8: ; preds = %20, %2
%9 = load i64*, i64** %6
%10 = load i64, i64* %9
%11 = load i64, i64* %5
%12 = icmp eq i64 %10, %11
br i1 %12, label %13, label %15
13: ; preds = %8
%14 = load i64*, i64** %6
store i64* %14, i64** %3
br label %23
15: ; preds = %8
%16 = load i64*, i64** %6
%17 = load i64, i64* %16
%18 = icmp ne i64 %17, 0
br i1 %18, label %20, label %19
19: ; preds = %15
store i64* null, i64** %3
br label %23
20: ; preds = %15
%21 = load i64*, i64** %6
%22 = getelementptr inbounds i64, i64* %21, i32 1
store i64* %22, i64** %6
br label %8
23: ; preds = %19, %13
%24 = load i64*, i64** %3
ret i64* %24
}

LLVM IR (-O2):
define i64* @wcschr(i64* %0, i64 %1) {
%3 = load i64, i64* %0
%4 = icmp eq i64 %3, %1
br i1 %4, label %13, label %5
5: ; preds = %2, %9
%6 = phi i64 [ %11, %9 ], [ %3, %2 ]
%7 = phi i64* [ %10, %9 ], [ %0, %2 ]
%8 = icmp eq i64 %6, 0
br i1 %8, label %13, label %9
9: ; preds = %5
%10 = getelementptr inbounds i64, i64* %7, i64 1
%11 = load i64, i64* %10
%12 = icmp eq i64 %11, %1
br i1 %12, label %13, label %5
13: ; preds = %9, %5, %2
%14 = phi i64* [ %0, %2 ], [ null, %5 ], [ %10, %9 ]
ret i64* %14
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
__attribute__((constructor)) void init() {
  printf("[FAIL]  dlopen-rpath-prev-override\n");
  exit(0);
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<init>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"[FAIL] dlopen-rpath-prev-override\0A\00"
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @init, i8* null }]
define void @init() {
%1 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @init, i8* null }]
@str = [35 x i8] c"[FAIL] dlopen-rpath-prev-override\00"
define void @init() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 0)
unreachable
}
int Assoc(int op) {
  int associativity;
  switch (op) {
  case '=':
  case -4:
  case '~':
  case -7:
  case -8:
    associativity = 2;
    break;
  default:
    associativity = 1;
    break;
  }
  return associativity;
}


x86 assembly (clang, -O0):
<Assoc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
add    $0x8,%eax
sub    $0x2,%eax
jb     1151 <Assoc+0x51>
jmp    111e <Assoc+0x1e>
mov    -0xc(%rbp),%eax
sub    $0xfffffffc,%eax
je     1151 <Assoc+0x51>
jmp    112f <Assoc+0x2f>
mov    -0xc(%rbp),%eax
sub    $0x3d,%eax
je     1151 <Assoc+0x51>
jmp    1140 <Assoc+0x40>
mov    -0xc(%rbp),%eax
sub    $0x7e,%eax
jne    115d <Assoc+0x5d>
jmp    1151 <Assoc+0x51>
movl   $0x2,-0x8(%rbp)
jmp    1164 <Assoc+0x64>
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Assoc>:
mov    $0x2,%eax
lea    0x8(%rdi),%ecx
cmp    $0x4,%ecx
ja     1117 <Assoc+0x17>
mov    $0x13,%edx
bt     %ecx,%edx
jb     1121 <Assoc+0x21>
cmp    $0x3d,%edi
je     1121 <Assoc+0x21>
cmp    $0x7e,%edi
jne    1122 <Assoc+0x22>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @Assoc(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
switch i32 %4, label %6 [
i32 61, label %5
i32 -4, label %5
i32 126, label %5
i32 -7, label %5
i32 -8, label %5
]
5: ; preds = %1, %1, %1, %1, %1
store i32 2, i32* %3
br label %7
6: ; preds = %1
store i32 1, i32* %3
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @Assoc(i32 %0) {
switch i32 %0, label %2 [
i32 61, label %3
i32 -4, label %3
i32 126, label %3
i32 -7, label %3
i32 -8, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %2
%4 = phi i32 [ 1, %2 ], [ 2, %1 ], [ 2, %1 ], [ 2, %1 ], [ 2, %1 ], [ 2, %1 ]
ret i32 %4
}
int main(int argc, char **argv) { return 40 | 34; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
ret i32 42
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 42
}
unsigned int _bitr(unsigned int src) {
  int i;
  unsigned r = 0;
  for (i = 0; i < 32; ++i) {
    r = r | (((src >> i) & 1) << (31 - i));
  }
  return r;
}


x86 assembly (clang, -O0):
<_bitr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x20,-0x8(%rbp)
jge    114c <_bitr+0x4c>
mov    -0xc(%rbp),%eax
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
shr    %cl,%edx
and    $0x1,%edx
mov    $0x1f,%ecx
sub    -0x8(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1115 <_bitr+0x15>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_bitr>:
xor    %eax,%eax
mov    $0x1c,%r8d
xor    %r9d,%r9d
nopl   0x0(%rax,%rax,1)
mov    %edi,%edx
mov    %r9d,%ecx
shr    %cl,%edx
and    $0x1,%edx
lea    0x3(%r8),%ecx
shl    %cl,%edx
lea    0x1(%r9),%ecx
mov    %edi,%r10d
shr    %cl,%r10d
and    $0x1,%r10d
lea    0x2(%r8),%ecx
shl    %cl,%r10d
lea    0x2(%r9),%ecx
mov    %edi,%esi
shr    %cl,%esi
or     %eax,%edx
or     %edx,%r10d
and    $0x1,%esi
lea    0x1(%r8),%ecx
shl    %cl,%esi
lea    0x3(%r9),%ecx
mov    %edi,%eax
shr    %cl,%eax
and    $0x1,%eax
mov    %r8d,%ecx
shl    %cl,%eax
or     %esi,%eax
or     %r10d,%eax
add    $0xfffffffc,%r8d
add    $0x4,%r9d
cmp    $0x20,%r9d
jne    1110 <_bitr+0x10>
ret

LLVM IR (-O0):
define i32 @_bitr(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %18, %1
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 32
br i1 %7, label %8, label %21
8: ; preds = %5
%9 = load i32, i32* %4
%10 = load i32, i32* %2
%11 = load i32, i32* %3
%12 = lshr i32 %10, %11
%13 = and i32 %12, 1
%14 = load i32, i32* %3
%15 = sub nsw i32 31, %14
%16 = shl i32 %13, %15
%17 = or i32 %9, %16
store i32 %17, i32* %4
br label %18
18: ; preds = %8
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %5
21: ; preds = %5
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @_bitr(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %27, %2 ]
%4 = phi i32 [ 0, %1 ], [ %28, %2 ]
%5 = lshr i32 %0, %4
%6 = and i32 %5, 1
%7 = sub nuw nsw i32 31, %4
%8 = shl nuw i32 %6, %7
%9 = or i32 %8, %3
%10 = or i32 %4, 1
%11 = lshr i32 %0, %10
%12 = and i32 %11, 1
%13 = sub nsw i32 30, %4
%14 = shl nuw i32 %12, %13
%15 = or i32 %14, %9
%16 = or i32 %4, 2
%17 = lshr i32 %0, %16
%18 = and i32 %17, 1
%19 = sub nsw i32 29, %4
%20 = shl nuw i32 %18, %19
%21 = or i32 %20, %15
%22 = or i32 %4, 3
%23 = lshr i32 %0, %22
%24 = and i32 %23, 1
%25 = sub nsw i32 28, %4
%26 = shl nuw i32 %24, %25
%27 = or i32 %26, %21
%28 = add nuw nsw i32 %4, 4
%29 = icmp eq i32 %28, 32
br i1 %29, label %30, label %2
30: ; preds = %2
ret i32 %27
}
unsigned int le32_2_cpu(const char *p) {
  return (p[3] << 24 | p[2] << 16 | p[1] << 8 | p[0]);
}


x86 assembly (clang, -O0):
<le32_2_cpu>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl 0x3(%rax),%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
movsbl 0x2(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movsbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movsbl (%rcx),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<le32_2_cpu>:
movzbl 0x3(%rdi),%eax
shl    $0x18,%eax
movsbl 0x2(%rdi),%ecx
shl    $0x10,%ecx
or     %eax,%ecx
movsbl 0x1(%rdi),%edx
shl    $0x8,%edx
movsbl (%rdi),%eax
or     %edx,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @le32_2_cpu(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 3
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = shl i32 %6, 24
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = shl i32 %11, 16
%13 = or i32 %7, %12
%14 = load i8*, i8** %2
%15 = getelementptr inbounds i8, i8* %14, i64 1
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = or i32 %13, %18
%20 = load i8*, i8** %2
%21 = getelementptr inbounds i8, i8* %20, i64 0
%22 = load i8, i8* %21
%23 = sext i8 %22 to i32
%24 = or i32 %19, %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @le32_2_cpu(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 3
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = shl nuw i32 %4, 24
%6 = getelementptr inbounds i8, i8* %0, i64 2
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = shl nsw i32 %8, 16
%10 = or i32 %9, %5
%11 = getelementptr inbounds i8, i8* %0, i64 1
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = shl nsw i32 %13, 8
%15 = or i32 %10, %14
%16 = load i8, i8* %0
%17 = sext i8 %16 to i32
%18 = or i32 %15, %17
ret i32 %18
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int pthread_mutex_unlock(int /*<<< orphan*/ *);
int interleave_pthread_mutex_unlock(pthread_mutex_t *mutex) {
  return pthread_mutex_unlock(mutex);
}


x86 assembly (clang, -O0):
<interleave_pthread_mutex_unlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pthread_mutex_unlock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<interleave_pthread_mutex_unlock>:
jmp    1030 <pthread_mutex_unlock@plt>

LLVM IR (-O0):
define i32 @interleave_pthread_mutex_unlock(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @pthread_mutex_unlock(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @interleave_pthread_mutex_unlock(i32* %0) {
%2 = tail call i32 @pthread_mutex_unlock(i32* %0)
ret i32 %2
}
void tstUartDebug_init() {}


x86 assembly (clang, -O0):
<tstUartDebug_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tstUartDebug_init>:
ret

LLVM IR (-O0):
define void @tstUartDebug_init() {
ret void
}

LLVM IR (-O2):
define void @tstUartDebug_init() {
ret void
}
void EndOutput() {}


x86 assembly (clang, -O0):
<EndOutput>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EndOutput>:
ret

LLVM IR (-O0):
define void @EndOutput() {
ret void
}

LLVM IR (-O2):
define void @EndOutput() {
ret void
}
short test_short_7(short a, short b, short c, short d, short e, short f,
                   short g) {
  return -19;
}


x86 assembly (clang, -O0):
<test_short_7>:
push   %rbp
mov    %rsp,%rbp
mov    %r8d,-0x1c(%rbp)
mov    %ecx,%eax
mov    -0x1c(%rbp),%ecx
mov    %eax,-0x18(%rbp)
mov    %edx,%eax
mov    -0x18(%rbp),%edx
mov    %eax,-0x14(%rbp)
mov    %esi,%eax
mov    -0x14(%rbp),%esi
mov    %eax,-0x10(%rbp)
mov    %edi,%r8d
mov    -0x10(%rbp),%edi
mov    %r9w,%ax
mov    0x10(%rbp),%r9w
mov    %r8w,-0x2(%rbp)
mov    %di,-0x4(%rbp)
mov    %si,-0x6(%rbp)
mov    %dx,-0x8(%rbp)
mov    %cx,-0xa(%rbp)
mov    %ax,-0xc(%rbp)
mov    $0xffed,%ax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_short_7>:
mov    $0xffed,%ax
ret

LLVM IR (-O0):
define signext i16 @test_short_7(i16 signext %0, i16 signext %1, i16 signext %2, i16 signext %3, i16 signext %4, i16 signext %5, i16 signext %6) {
%8 = alloca i16
%9 = alloca i16
%10 = alloca i16
%11 = alloca i16
%12 = alloca i16
%13 = alloca i16
%14 = alloca i16
store i16 %0, i16* %8
store i16 %1, i16* %9
store i16 %2, i16* %10
store i16 %3, i16* %11
store i16 %4, i16* %12
store i16 %5, i16* %13
store i16 %6, i16* %14
ret i16 -19
}

LLVM IR (-O2):
define signext i16 @test_short_7(i16 signext %0, i16 signext %1, i16 signext %2, i16 signext %3, i16 signext %4, i16 signext %5, i16 signext %6) {
ret i16 -19
}
/* Type definitions */
struct vmbuf {
  int dummy;
};

/* Variables and functions */
scalar_t__ vmbuf_mem(struct vmbuf *);
char *vmbuf_data(struct vmbuf *vmbuf) { return (char *)vmbuf_mem(vmbuf); }


x86 assembly (clang, -O0):
<vmbuf_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <vmbuf_mem@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vmbuf_data>:
jmp    1030 <vmbuf_mem@plt>

LLVM IR (-O0):
%struct.vmbuf = type { i32 }
define i8* @vmbuf_data(%struct.vmbuf* %0) {
%2 = alloca %struct.vmbuf*
store %struct.vmbuf* %0, %struct.vmbuf** %2
%3 = load %struct.vmbuf*, %struct.vmbuf** %2
%4 = call i64 @vmbuf_mem(%struct.vmbuf* %3)
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}

LLVM IR (-O2):
%struct.vmbuf = type { i32 }
define i8* @vmbuf_data(%struct.vmbuf* %0) {
%2 = tail call i64 @vmbuf_mem(%struct.vmbuf* %0)
%3 = inttoptr i64 %2 to i8*
ret i8* %3
}
/* Variables and functions */
int ztimed_write_wait_millisecond(int, long);
int ztimed_write_wait(int fd, int timeout) {
  return ztimed_write_wait_millisecond(fd, 1000L * timeout);
}


x86 assembly (clang, -O0):
<ztimed_write_wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
movslq -0x8(%rbp),%rax
imul   $0x3e8,%rax,%rsi
call   1030 <ztimed_write_wait_millisecond@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ztimed_write_wait>:
movslq %esi,%rax
imul   $0x3e8,%rax,%rsi
jmp    1030 <ztimed_write_wait_millisecond@plt>

LLVM IR (-O0):
define i32 @ztimed_write_wait(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = mul nsw i64 1000, %7
%9 = call i32 @ztimed_write_wait_millisecond(i32 %5, i64 %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @ztimed_write_wait(i32 %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = mul nsw i64 %3, 1000
%5 = tail call i32 @ztimed_write_wait_millisecond(i32 %0, i64 %4)
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ write_and_check_aux(int /*<<< orphan*/ *, unsigned int,
                                       unsigned int, int);
void write_and_check(uint32_t *input, unsigned num_input_bytes,
                     unsigned num_expected_output_bytes) {
  write_and_check_aux(input, num_input_bytes, num_expected_output_bytes, 0x0);
  write_and_check_aux(input, num_input_bytes, num_expected_output_bytes, 0xFF);
}


x86 assembly (clang, -O0):
<write_and_check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
xor    %ecx,%ecx
call   1030 <write_and_check_aux@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    $0xff,%ecx
call   1030 <write_and_check_aux@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_and_check>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%rbx
xor    %ecx,%ecx
call   1030 <write_and_check_aux@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
mov    $0xff,%ecx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <write_and_check_aux@plt>

LLVM IR (-O0):
define void @write_and_check(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @write_and_check_aux(i32* %7, i32 %8, i32 %9, i32 0)
%11 = load i32*, i32** %4
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = call i32 @write_and_check_aux(i32* %11, i32 %12, i32 %13, i32 255)
ret void
}

LLVM IR (-O2):
define void @write_and_check(i32* %0, i32 %1, i32 %2) {
%4 = tail call i32 @write_and_check_aux(i32* %0, i32 %1, i32 %2, i32 0)
%5 = tail call i32 @write_and_check_aux(i32* %0, i32 %1, i32 %2, i32 255)
ret void
}
void ff_hevc_put_hevc_epel_v4_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_epel_v4_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_epel_v4_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_epel_v4_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_epel_v4_8_sse4() {
ret void
}
struct register_proto *get_reg_pro(struct P4 *p4) {
  return (struct register_proto *)p4;
}


x86 assembly (clang, -O0):
<get_reg_pro>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_reg_pro>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
%struct.register_proto = type opaque
%struct.P4 = type opaque
define %struct.register_proto* @get_reg_pro(%struct.P4* %0) {
%2 = alloca %struct.P4*
store %struct.P4* %0, %struct.P4** %2
%3 = load %struct.P4*, %struct.P4** %2
%4 = bitcast %struct.P4* %3 to %struct.register_proto*
ret %struct.register_proto* %4
}

LLVM IR (-O2):
%struct.register_proto = type opaque
%struct.P4 = type opaque
define %struct.register_proto* @get_reg_pro(%struct.P4* readnone %0) {
%2 = bitcast %struct.P4* %0 to %struct.register_proto*
ret %struct.register_proto* %2
}
__attribute__((always_)) const int xisminfl(long double x) {
  return x == -__builtin_infl();
}


x86 assembly (clang, -O0):
<xisminfl>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
flds   0xeed(%rip)
fucomip %st(1),%st
fstp   %st(0)
setae  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xisminfl>:
fldt   0x8(%rsp)
flds   0xef6(%rip)
xor    %eax,%eax
fucomip %st(1),%st
fstp   %st(0)
setae  %al
ret

LLVM IR (-O0):
define i32 @xisminfl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = fcmp oeq x86_fp80 %3, 0xKFFFF8000000000000000
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @xisminfl(x86_fp80 %0) {
%2 = fcmp oeq x86_fp80 %0, 0xKFFFF8000000000000000
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ assert_int_equal(int, int /*<<< orphan*/);
int /*<<< orphan*/ w_pawns_able_to_push(int, int);
void w_pawns_able_to_push_test(void **state) {
  assert_int_equal(
      0x0000000004228100ul,
      w_pawns_able_to_push(0x000000001422C100ul, 0x0000000422810000ul));
}


x86 assembly (clang, -O0):
<w_pawns_able_to_push_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x1422c100,%edi
mov    $0x22810000,%esi
call   1030 <w_pawns_able_to_push@plt>
mov    %eax,%esi
mov    $0x4228100,%edi
call   1040 <assert_int_equal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<w_pawns_able_to_push_test>:
push   %rax
mov    $0x1422c100,%edi
mov    $0x22810000,%esi
call   1030 <w_pawns_able_to_push@plt>
mov    $0x4228100,%edi
mov    %eax,%esi
pop    %rax
jmp    1040 <assert_int_equal@plt>

LLVM IR (-O0):
define void @w_pawns_able_to_push_test(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = call i32 @w_pawns_able_to_push(i32 337821952, i32 578879488)
%4 = call i32 @assert_int_equal(i32 69370112, i32 %3)
ret void
}

LLVM IR (-O2):
define void @w_pawns_able_to_push_test(i8** nocapture readnone %0) {
%2 = tail call i32 @w_pawns_able_to_push(i32 337821952, i32 578879488)
%3 = tail call i32 @assert_int_equal(i32 69370112, i32 %2)
ret void
}
/* Variables and functions */
int str_same(char const *, char const *);
unsigned long strlen(char const *);
int str_ends(const char *s, const char *end) {
  register unsigned long slen = strlen(s);
  register unsigned long elen = strlen(end);
  if (elen > slen)
    elen = slen;
  s += (slen - elen);
  return str_same(s, end);
}


x86 assembly (clang, -O0):
<str_ends>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jbe    1160 <str_ends+0x40>
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
sub    -0x20(%rbp),%rax
add    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <str_same@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_ends>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1040 <strlen@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1040 <strlen@plt>
xor    %edi,%edi
sub    %rax,%rbx
cmovae %rbx,%rdi
add    %r15,%rdi
mov    %r14,%rsi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <str_same@plt>

LLVM IR (-O0):
define i32 @str_ends(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = call i64 @strlen(i8* %7)
store i64 %8, i64* %5
%9 = load i8*, i8** %4
%10 = call i64 @strlen(i8* %9)
store i64 %10, i64* %6
%11 = load i64, i64* %6
%12 = load i64, i64* %5
%13 = icmp ugt i64 %11, %12
br i1 %13, label %14, label %16
14: ; preds = %2
%15 = load i64, i64* %5
store i64 %15, i64* %6
br label %16
16: ; preds = %14, %2
%17 = load i64, i64* %5
%18 = load i64, i64* %6
%19 = sub i64 %17, %18
%20 = load i8*, i8** %3
%21 = getelementptr inbounds i8, i8* %20, i64 %19
store i8* %21, i8** %3
%22 = load i8*, i8** %3
%23 = load i8*, i8** %4
%24 = call i32 @str_same(i8* %22, i8* %23)
ret i32 %24
}

LLVM IR (-O2):
define i32 @str_ends(i8* %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%5 = tail call i64 @llvm.usub.sat.i64(i64 %3, i64 %4)
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = tail call i32 @str_same(i8* %6, i8* %1)
ret i32 %7
}