unsigned long long flip_B1(const unsigned long long P,
                           const unsigned long long O) {
  unsigned int outflank_h;
  unsigned long long flipped, outflank_v, outflank_d9;
  outflank_v = ((O | ~0x0202020202020200ULL) + 0x0000000000000200ULL) & P &
               0x0202020202020000ULL;
  flipped =
      (outflank_v - (unsigned int)(outflank_v != 0)) & 0x0002020202020200ULL;
  outflank_h = ((O & 0x7c) + 0x04) & P;
  flipped |= (outflank_h - (unsigned int)(outflank_h != 0)) & 0x7c;
  outflank_d9 = ((O | ~0x0080402010080400ULL) + 0x0000000000000400ULL) & P &
                0x0080402010080000ULL;
  flipped |=
      (outflank_d9 - (unsigned int)(outflank_d9 != 0)) & 0x0000402010080400ULL;
  return flipped;
}


x86 assembly (clang, -O0):
<flip_B1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movabs $0xfdfdfdfdfdfdfdff,%rax
fd fd fd
or     -0x10(%rbp),%rax
add    $0x200,%rax
and    -0x8(%rbp),%rax
movabs $0x202020202020000,%rcx
02 02 02
and    %rcx,%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
cmpq   $0x0,-0x28(%rbp)
setne  %cl
and    $0x1,%cl
movzbl %cl,%ecx
mov    %ecx,%ecx
sub    %rcx,%rax
movabs $0x2020202020200,%rcx
and    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
and    $0x7c,%rax
add    $0x4,%rax
and    -0x8(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmpl   $0x0,-0x14(%rbp)
setne  %cl
and    $0x1,%cl
movzbl %cl,%ecx
sub    %ecx,%eax
and    $0x7c,%eax
mov    %eax,%eax
or     -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
movabs $0xff7fbfdfeff7fbff,%rax
bf 7f ff
or     -0x10(%rbp),%rax
add    $0x400,%rax
and    -0x8(%rbp),%rax
movabs $0x80402010080000,%rcx
and    %rcx,%rax
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
cmpq   $0x0,-0x30(%rbp)
setne  %cl
and    $0x1,%cl
movzbl %cl,%ecx
mov    %ecx,%ecx
sub    %rcx,%rax
movabs $0x402010080400,%rcx
and    %rcx,%rax
or     -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flip_B1>:
movabs $0x1fdfdfdfdfdfdff,%rax
fd fd 01
or     %rsi,%rax
add    $0x200,%rax
movabs $0x202020202020000,%rcx
02 02 02
and    %rdi,%rcx
and    %rax,%rcx
cmp    $0x1,%rcx
adc    $0xffffffffffffffff,%rcx
movabs $0x2020202020200,%r8
and    %rcx,%r8
mov    %esi,%edx
and    $0x7c,%edx
add    $0x4,%edx
xor    %eax,%eax
mov    %edi,%ecx
and    %edx,%ecx
setne  %al
sub    %eax,%ecx
and    $0x7c,%ecx
or     %r8,%rcx
movabs $0x7fbfdfeff7fbff,%rax
or     %rsi,%rax
add    $0x400,%rax
movabs $0x80402010080000,%rdx
and    %rdi,%rdx
and    %rax,%rdx
cmp    $0x1,%rdx
adc    $0xffffffffffffffff,%rdx
movabs $0x402010080400,%rax
and    %rdx,%rax
or     %rcx,%rax
ret

LLVM IR (-O0):
define i64 @flip_B1(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i32
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%9 = load i64, i64* %4
%10 = or i64 %9, -144680345676153345
%11 = add i64 %10, 512
%12 = load i64, i64* %3
%13 = and i64 %11, %12
%14 = and i64 %13, 144680345676152832
store i64 %14, i64* %7
%15 = load i64, i64* %7
%16 = load i64, i64* %7
%17 = icmp ne i64 %16, 0
%18 = zext i1 %17 to i32
%19 = zext i32 %18 to i64
%20 = sub i64 %15, %19
%21 = and i64 %20, 565157600297472
store i64 %21, i64* %6
%22 = load i64, i64* %4
%23 = and i64 %22, 124
%24 = add i64 %23, 4
%25 = load i64, i64* %3
%26 = and i64 %24, %25
%27 = trunc i64 %26 to i32
store i32 %27, i32* %5
%28 = load i32, i32* %5
%29 = load i32, i32* %5
%30 = icmp ne i32 %29, 0
%31 = zext i1 %30 to i32
%32 = sub i32 %28, %31
%33 = and i32 %32, 124
%34 = zext i32 %33 to i64
%35 = load i64, i64* %6
%36 = or i64 %35, %34
store i64 %36, i64* %6
%37 = load i64, i64* %4
%38 = or i64 %37, -36099303471055873
%39 = add i64 %38, 1024
%40 = load i64, i64* %3
%41 = and i64 %39, %40
%42 = and i64 %41, 36099303471054848
store i64 %42, i64* %8
%43 = load i64, i64* %8
%44 = load i64, i64* %8
%45 = icmp ne i64 %44, 0
%46 = zext i1 %45 to i32
%47 = zext i32 %46 to i64
%48 = sub i64 %43, %47
%49 = and i64 %48, 70506452091904
%50 = load i64, i64* %6
%51 = or i64 %50, %49
store i64 %51, i64* %6
%52 = load i64, i64* %6
ret i64 %52
}

LLVM IR (-O2):
define i64 @flip_B1(i64 %0, i64 %1) {
%3 = or i64 %1, 143550030475558399
%4 = add i64 %3, 512
%5 = and i64 %0, 144680345676152832
%6 = and i64 %5, %4
%7 = icmp ne i64 %6, 0
%8 = sext i1 %7 to i64
%9 = add nsw i64 %6, %8
%10 = and i64 %9, 565157600297472
%11 = and i64 %1, 124
%12 = add nuw nsw i64 %11, 4
%13 = and i64 %12, %0
%14 = icmp ne i64 %13, 0
%15 = sext i1 %14 to i64
%16 = add nsw i64 %13, %15
%17 = and i64 %16, 124
%18 = or i64 %10, %17
%19 = or i64 %1, 35958290566872063
%20 = add i64 %19, 1024
%21 = and i64 %0, 36099303471054848
%22 = and i64 %21, %20
%23 = icmp ne i64 %22, 0
%24 = sext i1 %23 to i64
%25 = add nsw i64 %22, %24
%26 = and i64 %25, 70506452091904
%27 = or i64 %18, %26
ret i64 %27
}