xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ _a64_disable_interrupts();
int /*<<< orphan*/ _a64_enable_interrupts();
int /*<<< orphan*/ _a64_outb(int, unsigned short);
void i8254pit_setup() {
  _a64_disable_interrupts();
  _a64_outb(0x43, 0 | (3 << 1) | (3 << 4));
  unsigned short frequency = 11932 * 2;
  _a64_outb(0x40, frequency & 0xFF);
  _a64_outb(0x40, (frequency & 0xFF00) >> 8);
  _a64_enable_interrupts();
}


x86 assembly (clang, -O0):
<i8254pit_setup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <_a64_disable_interrupts@plt>
mov    $0x43,%edi
mov    $0x36,%esi
call   1050 <_a64_outb@plt>
movw   $0x5d38,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
and    $0xff,%eax
mov    $0x40,%edi
movzwl %ax,%esi
call   1050 <_a64_outb@plt>
movzwl -0x2(%rbp),%eax
and    $0xff00,%eax
sar    $0x8,%eax
mov    $0x40,%edi
movzwl %ax,%esi
call   1050 <_a64_outb@plt>
mov    $0x0,%al
call   1030 <_a64_enable_interrupts@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i8254pit_setup>:
push   %rax
xor    %eax,%eax
call   1040 <_a64_disable_interrupts@plt>
mov    $0x43,%edi
mov    $0x36,%esi
call   1050 <_a64_outb@plt>
mov    $0x40,%edi
mov    $0x38,%esi
call   1050 <_a64_outb@plt>
mov    $0x40,%edi
mov    $0x5d,%esi
call   1050 <_a64_outb@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <_a64_enable_interrupts@plt>

LLVM IR (-O0):
define void @i8254pit_setup() {
%1 = alloca i16
%2 = call i32 (...) @_a64_disable_interrupts()
%3 = call i32 @_a64_outb(i32 67, i16 zeroext 54)
store i16 23864, i16* %1
%4 = load i16, i16* %1
%5 = zext i16 %4 to i32
%6 = and i32 %5, 255
%7 = trunc i32 %6 to i16
%8 = call i32 @_a64_outb(i32 64, i16 zeroext %7)
%9 = load i16, i16* %1
%10 = zext i16 %9 to i32
%11 = and i32 %10, 65280
%12 = ashr i32 %11, 8
%13 = trunc i32 %12 to i16
%14 = call i32 @_a64_outb(i32 64, i16 zeroext %13)
%15 = call i32 (...) @_a64_enable_interrupts()
ret void
}

LLVM IR (-O2):
define void @i8254pit_setup() {
%1 = tail call i32 (...) @_a64_disable_interrupts()
%2 = tail call i32 @_a64_outb(i32 67, i16 zeroext 54)
%3 = tail call i32 @_a64_outb(i32 64, i16 zeroext 56)
%4 = tail call i32 @_a64_outb(i32 64, i16 zeroext 93)
%5 = tail call i32 (...) @_a64_enable_interrupts()
ret void
}
void ButtonModel_Init() {}


x86 assembly (clang, -O0):
<ButtonModel_Init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ButtonModel_Init>:
ret

LLVM IR (-O0):
define void @ButtonModel_Init() {
ret void
}

LLVM IR (-O2):
define void @ButtonModel_Init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ img_register_jpeg();
int /*<<< orphan*/ img_register_png();
int /*<<< orphan*/ img_register_ppm();
void img_modules_init(void) {
  img_register_jpeg();
  img_register_png();
  img_register_ppm();
}


x86 assembly (clang, -O0):
<img_modules_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <img_register_jpeg@plt>
mov    $0x0,%al
call   1030 <img_register_png@plt>
mov    $0x0,%al
call   1050 <img_register_ppm@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<img_modules_init>:
push   %rax
xor    %eax,%eax
call   1040 <img_register_jpeg@plt>
xor    %eax,%eax
call   1030 <img_register_png@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <img_register_ppm@plt>

LLVM IR (-O0):
define void @img_modules_init() {
%1 = call i32 (...) @img_register_jpeg()
%2 = call i32 (...) @img_register_png()
%3 = call i32 (...) @img_register_ppm()
ret void
}

LLVM IR (-O2):
define void @img_modules_init() {
%1 = tail call i32 (...) @img_register_jpeg()
%2 = tail call i32 (...) @img_register_png()
%3 = tail call i32 (...) @img_register_ppm()
ret void
}
void insert_item(int item, int *shared_buffer) {
  static int index = 0;
  shared_buffer[index] = item;
  index = (index + 1) % 10;
}


x86 assembly (clang, -O0):
<insert_item>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x10(%rbp),%rax
movslq 0x2f0b(%rip),%rcx
mov    %edx,(%rax,%rcx,4)
mov    0x2f02(%rip),%eax
add    $0x1,%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,0x2ef1(%rip)
pop    %rbp
ret

x86 assembly (clang, -O2):
<insert_item>:
mov    0x2f1e(%rip),%eax
mov    %edi,(%rsi,%rax,4)
add    $0x1,%eax
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
add    %edx,%ecx
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %ecx,%eax
mov    %eax,0x2ef5(%rip)
ret

LLVM IR (-O0):
@insert_item.index = internal global i32 0
define void @insert_item(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = load i32, i32* @insert_item.index
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %6, i64 %8
store i32 %5, i32* %9
%10 = load i32, i32* @insert_item.index
%11 = add nsw i32 %10, 1
%12 = srem i32 %11, 10
store i32 %12, i32* @insert_item.index
ret void
}

LLVM IR (-O2):
@insert_item.index = internal unnamed_addr global i32 0
define void @insert_item(i32 %0, i32* nocapture writeonly %1) {
%3 = load i32, i32* @insert_item.index
%4 = zext i32 %3 to i64
%5 = getelementptr inbounds i32, i32* %1, i64 %4
store i32 %0, i32* %5
%6 = add nsw i32 %3, 1
%7 = srem i32 %6, 10
store i32 %7, i32* @insert_item.index
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, void *);
int /*<<< orphan*/ stderr;
void rtpp_stats_getlvalbyname_fin(void *pub) {
  fprintf(stderr,
          "Method rtpp_stats@%p::getlvalbyname (rtpp_stats_getlvalbyname) is "
          "invoked after destruction\x0a",
          pub);
  abort();
}


x86 assembly (clang, -O0):
<rtpp_stats_getlvalbyname_fin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<rtpp_stats_getlvalbyname_fin>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [93 x i8] c"Method rtpp_stats@%p::getlvalbyname (rtpp_stats_getlvalbyname) is invoked after destruction\0A\00"
define void @rtpp_stats_getlvalbyname_fin(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([93 x i8], [93 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [93 x i8] c"Method rtpp_stats@%p::getlvalbyname (rtpp_stats_getlvalbyname) is invoked after destruction\0A\00"
define void @rtpp_stats_getlvalbyname_fin(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([93 x i8], [93 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 (...) @abort()
unreachable
}
void fsync_(int fd) {}


x86 assembly (clang, -O0):
<fsync_>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsync_>:
ret

LLVM IR (-O0):
define void @fsync_(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @fsync_(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ data_overflow_009();
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char const *argv[]) {
  data_overflow_009();
  int max = 0x40000000;
  int ret;
  ret = max * 2;
  printf("ret = %i\n", ret);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <data_overflow_009@plt>
movl   $0x40000000,-0x14(%rbp)
mov    -0x14(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%esi
lea    0xea9(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <data_overflow_009@plt>
lea    0xed1(%rip),%rdi
mov    $0x80000000,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"ret = %i\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = call i32 (...) @data_overflow_009()
store i32 1073741824, i32* %6
%9 = load i32, i32* %6
%10 = mul nsw i32 %9, 2
store i32 %10, i32* %7
%11 = load i32, i32* %7
%12 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"ret = %i\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @data_overflow_009()
%4 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 -2147483648)
ret i32 0
}
void callee_2_1_2() {}


x86 assembly (clang, -O0):
<callee_2_1_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<callee_2_1_2>:
ret

LLVM IR (-O0):
define void @callee_2_1_2() {
ret void
}

LLVM IR (-O2):
define void @callee_2_1_2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage() { printf("domain_tool -f <infilename"); }


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"domain_tool -f <infilename\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"domain_tool -f <infilename\00"
define void @usage() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret void
}
void g_datalist_id_remove_no_notify() {}


x86 assembly (clang, -O0):
<g_datalist_id_remove_no_notify>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_datalist_id_remove_no_notify>:
ret

LLVM IR (-O0):
define void @g_datalist_id_remove_no_notify() {
ret void
}

LLVM IR (-O2):
define void @g_datalist_id_remove_no_notify() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
int inet_passive_socket(char const *, int, int /*<<< orphan*/ *,
                        int /*<<< orphan*/, int /*<<< orphan*/);
int inet_bind(const char *service, int type, socklen_t *addrlen) {
  return inet_passive_socket(service, type, addrlen, 0, 0);
}


x86 assembly (clang, -O0):
<inet_bind>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
xor    %r8d,%r8d
mov    %r8d,%ecx
call   1030 <inet_passive_socket@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inet_bind>:
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <inet_passive_socket@plt>

LLVM IR (-O0):
define i32 @inet_bind(i8* %0, i32 %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32*, i32** %6
%10 = call i32 @inet_passive_socket(i8* %7, i32 %8, i32* %9, i32 0, i32 0)
ret i32 %10
}

LLVM IR (-O2):
define i32 @inet_bind(i8* %0, i32 %1, i32* %2) {
%4 = tail call i32 @inet_passive_socket(i8* %0, i32 %1, i32* %2, i32 0, i32 0)
ret i32 %4
}
void Sleep(int i) {
  int x, y;
  int c;
  for (y = 0; y < i; y++) {
    for (x = 0; x < 30000; x++) {
      c = c + 2;
    }
  }
}


x86 assembly (clang, -O0):
<Sleep>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1158 <Sleep+0x58>
movl   $0x0,-0x8(%rbp)
cmpl   $0x7530,-0x8(%rbp)
jge    1145 <Sleep+0x45>
mov    -0x10(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1121 <Sleep+0x21>
jmp    114a <Sleep+0x4a>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <Sleep+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sleep>:
ret

LLVM IR (-O0):
define void @Sleep(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
br label %6
6: ; preds = %21, %1
%7 = load i32, i32* %4
%8 = load i32, i32* %2
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %24
10: ; preds = %6
store i32 0, i32* %3
br label %11
11: ; preds = %17, %10
%12 = load i32, i32* %3
%13 = icmp slt i32 %12, 30000
br i1 %13, label %14, label %20
14: ; preds = %11
%15 = load i32, i32* %5
%16 = add nsw i32 %15, 2
store i32 %16, i32* %5
br label %17
17: ; preds = %14
%18 = load i32, i32* %3
%19 = add nsw i32 %18, 1
store i32 %19, i32* %3
br label %11
20: ; preds = %11
br label %21
21: ; preds = %20
%22 = load i32, i32* %4
%23 = add nsw i32 %22, 1
store i32 %23, i32* %4
br label %6
24: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @Sleep(i32 %0) {
ret void
}
/* Type definitions */
struct vec2 {
  int dummy;
};

/* Variables and functions */
int vec2_is_zero(float *);
__attribute__((always_)) bool psvec2_is_zero(struct vec2 *a) {
  return vec2_is_zero((float *)a);
}


x86 assembly (clang, -O0):
<psvec2_is_zero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <vec2_is_zero@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec2_is_zero>:
jmp    1030 <vec2_is_zero@plt>

LLVM IR (-O0):
%struct.vec2 = type { i32 }
define i32 @psvec2_is_zero(%struct.vec2* %0) {
%2 = alloca %struct.vec2*
store %struct.vec2* %0, %struct.vec2** %2
%3 = load %struct.vec2*, %struct.vec2** %2
%4 = bitcast %struct.vec2* %3 to float*
%5 = call i32 @vec2_is_zero(float* %4)
ret i32 %5
}

LLVM IR (-O2):
%struct.vec2 = type { i32 }
define i32 @psvec2_is_zero(%struct.vec2* %0) {
%2 = bitcast %struct.vec2* %0 to float*
%3 = tail call i32 @vec2_is_zero(float* %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ quick_insertionsort(int *, int /*<<< orphan*/, size_t);
void qsort_insertion_wrapper(int a[], size_t n) {
  quick_insertionsort(a, 0, n - 1);
}


x86 assembly (clang, -O0):
<qsort_insertion_wrapper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
sub    $0x1,%rdx
xor    %esi,%esi
call   1030 <quick_insertionsort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qsort_insertion_wrapper>:
lea    -0x1(%rsi),%rdx
xor    %esi,%esi
jmp    1030 <quick_insertionsort@plt>

LLVM IR (-O0):
define void @qsort_insertion_wrapper(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
store i32* %0, i32** %3
store i64 %1, i64* %4
%5 = load i32*, i32** %3
%6 = load i64, i64* %4
%7 = sub i64 %6, 1
%8 = call i32 @quick_insertionsort(i32* %5, i32 0, i64 %7)
ret void
}

LLVM IR (-O2):
define void @qsort_insertion_wrapper(i32* %0, i64 %1) {
%3 = add i64 %1, -1
%4 = tail call i32 @quick_insertionsort(i32* %0, i32 0, i64 %3)
ret void
}
int get_allowed_stereo_bond_type(int bond_type) {
  if ((bond_type &= ~0xf0) == 4) {
    return 4;
  } else if (bond_type == 2 || bond_type == 1) {
    return bond_type;
  } else if (bond_type == 8) {
    return 8;
  }
  return 0;
}


x86 assembly (clang, -O0):
<get_allowed_stereo_bond_type>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xffffff0f,%eax
mov    %eax,-0x8(%rbp)
cmp    $0x4,%eax
jne    1127 <get_allowed_stereo_bond_type+0x27>
movl   $0x4,-0x4(%rbp)
jmp    116d <get_allowed_stereo_bond_type+0x6d>
cmpl   $0x2,-0x8(%rbp)
je     113b <get_allowed_stereo_bond_type+0x3b>
cmpl   $0x1,-0x8(%rbp)
jne    1146 <get_allowed_stereo_bond_type+0x46>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    116d <get_allowed_stereo_bond_type+0x6d>
cmpl   $0x8,-0x8(%rbp)
jne    115c <get_allowed_stereo_bond_type+0x5c>
movl   $0x8,-0x4(%rbp)
jmp    116d <get_allowed_stereo_bond_type+0x6d>
jmp    1161 <get_allowed_stereo_bond_type+0x61>
jmp    1166 <get_allowed_stereo_bond_type+0x66>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_allowed_stereo_bond_type>:
and    $0xffffff0f,%edi
mov    $0x4,%eax
cmp    $0x4,%edi
je     1126 <get_allowed_stereo_bond_type+0x26>
lea    -0x1(%rdi),%eax
cmp    $0x2,%eax
jae    111b <get_allowed_stereo_bond_type+0x1b>
mov    %edi,%eax
ret
xor    %eax,%eax
cmp    $0x8,%edi
sete   %al
shl    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @get_allowed_stereo_bond_type(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = and i32 %4, -241
store i32 %5, i32* %3
%6 = icmp eq i32 %5, 4
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 4, i32* %2
br label %23
8: ; preds = %1
%9 = load i32, i32* %3
%10 = icmp eq i32 %9, 2
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = load i32, i32* %3
%13 = icmp eq i32 %12, 1
br i1 %13, label %14, label %16
14: ; preds = %11, %8
%15 = load i32, i32* %3
store i32 %15, i32* %2
br label %23
16: ; preds = %11
%17 = load i32, i32* %3
%18 = icmp eq i32 %17, 8
br i1 %18, label %19, label %20
19: ; preds = %16
store i32 8, i32* %2
br label %23
20: ; preds = %16
br label %21
21: ; preds = %20
br label %22
22: ; preds = %21
store i32 0, i32* %2
br label %23
23: ; preds = %22, %19, %14, %7
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @get_allowed_stereo_bond_type(i32 %0) {
%2 = and i32 %0, -241
%3 = icmp eq i32 %2, 4
br i1 %3, label %10, label %4
4: ; preds = %1
%5 = add i32 %2, -1
%6 = icmp ult i32 %5, 2
br i1 %6, label %10, label %7
7: ; preds = %4
%8 = icmp eq i32 %2, 8
%9 = select i1 %8, i32 8, i32 0
br label %10
10: ; preds = %7, %4, %1
%11 = phi i32 [ 4, %1 ], [ %2, %4 ], [ %9, %7 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf("usage: tl-parser [-v] [-h] <TL-schema-file>\n"
         "\tTL compiler\n"
         "\t-v\toutput statistical and debug information into stderr\n"
         "\t-E\twhenever is possible output to stdout expressions\n"
         "\t-e <file>\texport serialized schema to file\n");
  exit(2);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [213 x i8] c"usage: tl-parser [-v] [-h] <TL-schema-file>\0A\09TL compiler\0A\09-v\09output statistical and debug information into stderr\0A\09-E\09whenever is possible output to stdout expressions\0A\09-e <file>\09export serialized schema to file\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([213 x i8], [213 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 2)
unreachable
}

LLVM IR (-O2):
@str = [212 x i8] c"usage: tl-parser [-v] [-h] <TL-schema-file>\0A\09TL compiler\0A\09-v\09output statistical and debug information into stderr\0A\09-E\09whenever is possible output to stdout expressions\0A\09-e <file>\09export serialized schema to file\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([212 x i8], [212 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 2)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
void print_error_4(char *message) {
  printf("%s\n", message);
  exit(104);
}


x86 assembly (clang, -O0):
<print_error_4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x68,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<print_error_4>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x68,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @print_error_4(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 104)
unreachable
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @print_error_4(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 104)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void *calloc(size_t, size_t);
void *fcitx_utils_calloc(size_t nmemb, size_t size) {
  void *result = calloc(nmemb, size);
  if (!result) {
    abort();
  }
  return result;
}


x86 assembly (clang, -O0):
<fcitx_utils_calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1153 <fcitx_utils_calloc+0x33>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fcitx_utils_calloc>:
push   %rax
call   1040 <calloc@plt>
test   %rax,%rax
je     112d <fcitx_utils_calloc+0xd>
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i8* @fcitx_utils_calloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i8* @calloc(i64 %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %13, label %11
11: ; preds = %2
%12 = call i32 (...) @abort()
unreachable
13: ; preds = %2
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
define noalias i8* @fcitx_utils_calloc(i64 %0, i64 %1) {
%3 = tail call i8* @calloc(i64 %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 (...) @abort()
unreachable
7: ; preds = %2
ret i8* %3
}
unsigned long hm_hash(const char *key) {
  unsigned long hash = 5381;
  int c;
  while ((c = *key++))
    hash = ((hash << 5) + hash) + c;
  return hash;
}


x86 assembly (clang, -O0):
<hm_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1505,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     114a <hm_hash+0x4a>
mov    -0x10(%rbp),%rax
shl    $0x5,%rax
add    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <hm_hash+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hm_hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     112d <hm_hash+0x2d>
add    $0x1,%rdi
mov    $0x1505,%eax
nop
mov    %rax,%rdx
shl    $0x5,%rdx
add    %rax,%rdx
movsbq %cl,%rax
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hm_hash+0x10>
ret
mov    $0x1505,%eax
ret

LLVM IR (-O0):
define i64 @hm_hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
store i64 5381, i64* %3
br label %5
5: ; preds = %11, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
store i32 %9, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %5
%12 = load i64, i64* %3
%13 = shl i64 %12, 5
%14 = load i64, i64* %3
%15 = add i64 %13, %14
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = add i64 %15, %17
store i64 %18, i64* %3
br label %5
19: ; preds = %5
%20 = load i64, i64* %3
ret i64 %20
}

LLVM IR (-O2):
define i64 @hm_hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = phi i64 [ %11, %4 ], [ 5381, %1 ]
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = mul i64 %7, 33
%10 = sext i8 %5 to i64
%11 = add i64 %9, %10
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ 5381, %1 ], [ %11, %4 ]
ret i64 %15
}
long grib_op_or(long a, long b) { return a || b; }


x86 assembly (clang, -O0):
<grib_op_or>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%al
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x11(%rbp)
jne    1127 <grib_op_or+0x27>
cmpq   $0x0,-0x10(%rbp)
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<grib_op_or>:
xor    %eax,%eax
or     %rsi,%rdi
setne  %al
ret

LLVM IR (-O0):
define i64 @grib_op_or(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = icmp ne i64 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i64, i64* %4
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ true, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
%13 = sext i32 %12 to i64
ret i64 %13
}

LLVM IR (-O2):
define i64 @grib_op_or(i64 %0, i64 %1) {
%3 = or i64 %1, %0
%4 = icmp ne i64 %3, 0
%5 = zext i1 %4 to i64
ret i64 %5
}
/* Type definitions */
struct t_hook {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ hook_fd_realloc_pollfd();
void hook_fd_add_cb(struct t_hook *hook) {
  (void)hook;
  hook_fd_realloc_pollfd();
}


x86 assembly (clang, -O0):
<hook_fd_add_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <hook_fd_realloc_pollfd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hook_fd_add_cb>:
xor    %eax,%eax
jmp    1030 <hook_fd_realloc_pollfd@plt>

LLVM IR (-O0):
%struct.t_hook = type { i32 }
define void @hook_fd_add_cb(%struct.t_hook* %0) {
%2 = alloca %struct.t_hook*
store %struct.t_hook* %0, %struct.t_hook** %2
%3 = load %struct.t_hook*, %struct.t_hook** %2
%4 = call i32 (...) @hook_fd_realloc_pollfd()
ret void
}

LLVM IR (-O2):
%struct.t_hook = type { i32 }
define void @hook_fd_add_cb(%struct.t_hook* nocapture readnone %0) {
%2 = tail call i32 (...) @hook_fd_realloc_pollfd()
ret void
}
/* Variables and functions */
scalar_t__ IEH3spce(char);
IEH3nxch() {
  char ch, cgetc();
  extern int IEH3sfil;
  while ((ch = cgetc(IEH3sfil)) > 0 && IEH3spce(ch))
    ;
  if (ch > 0)
    return (ch);
  return (-1);
}


x86 assembly (clang, -O0):
<IEH3nxch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
mov    $0x0,%al
call   1040 <cgetc@plt>
mov    %al,-0x5(%rbp)
movsbl %al,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x6(%rbp)
jle    115f <IEH3nxch+0x3f>
movsbl -0x5(%rbp),%edi
call   1030 <IEH3spce@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
test   $0x1,%al
jne    116f <IEH3nxch+0x4f>
jmp    1174 <IEH3nxch+0x54>
jmp    1128 <IEH3nxch+0x8>
movsbl -0x5(%rbp),%eax
cmp    $0x0,%eax
jle    118d <IEH3nxch+0x6d>
movsbl -0x5(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1194 <IEH3nxch+0x74>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IEH3nxch>:
push   %r14
push   %rbx
push   %rax
mov    0x2ebd(%rip),%r14
nopl   0x0(%rax,%rax,1)
mov    (%r14),%edi
xor    %eax,%eax
call   1040 <cgetc@plt>
test   %al,%al
jle    114f <IEH3nxch+0x2f>
mov    %eax,%ebx
movsbl %al,%edi
call   1030 <IEH3spce@plt>
test   %rax,%rax
jne    1130 <IEH3nxch+0x10>
jmp    1151 <IEH3nxch+0x31>
mov    $0xff,%bl
movsbl %bl,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@IEH3sfil = external global i32
define i32 @IEH3nxch() {
%1 = alloca i32
%2 = alloca i8
br label %3
3: ; preds = %14, %0
%4 = load i32, i32* @IEH3sfil
%5 = call signext i8 (i32, ...) bitcast (i8 (...)* @cgetc to i8 (i32, ...)*)(i32 %4)
store i8 %5, i8* %2
%6 = sext i8 %5 to i32
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %3
%9 = load i8, i8* %2
%10 = call i64 @IEH3spce(i8 signext %9)
%11 = icmp ne i64 %10, 0
br label %12
12: ; preds = %8, %3
%13 = phi i1 [ false, %3 ], [ %11, %8 ]
br i1 %13, label %14, label %15
14: ; preds = %12
br label %3
15: ; preds = %12
%16 = load i8, i8* %2
%17 = sext i8 %16 to i32
%18 = icmp sgt i32 %17, 0
br i1 %18, label %19, label %22
19: ; preds = %15
%20 = load i8, i8* %2
%21 = sext i8 %20 to i32
store i32 %21, i32* %1
br label %23
22: ; preds = %15
store i32 -1, i32* %1
br label %23
23: ; preds = %22, %19
%24 = load i32, i32* %1
ret i32 %24
}

LLVM IR (-O2):
@IEH3sfil = external global i32
define i32 @IEH3nxch() {
br label %1
1: ; preds = %5, %0
%2 = load i32, i32* @IEH3sfil
%3 = tail call signext i8 (i32, ...) bitcast (i8 (...)* @cgetc to i8 (i32, ...)*)(i32 %2)
%4 = icmp sgt i8 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = tail call i64 @IEH3spce(i8 signext %3)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %1
8: ; preds = %1, %5
%9 = phi i8 [ -1, %1 ], [ %3, %5 ]
%10 = sext i8 %9 to i32
ret i32 %10
}
int test_imm_CCint64_lowword_mem(long long *val) {
  return ((*val) & (0xCC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CCint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xcc,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CCint64_lowword_mem>:
testb  $0xcc,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CCint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 204
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_CCint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 204
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ android_memory_barrier();
extern __attribute__((always_)) void
android_atomic_acquire_store(int32_t value, volatile int32_t *ptr) {
  *ptr = value;
  android_memory_barrier();
}


x86 assembly (clang, -O0):
<android_atomic_acquire_store>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    $0x0,%al
call   1030 <android_memory_barrier@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<android_atomic_acquire_store>:
mov    %edi,(%rsi)
xor    %eax,%eax
jmp    1030 <android_memory_barrier@plt>

LLVM IR (-O0):
define void @android_atomic_acquire_store(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
store volatile i32 %5, i32* %6
%7 = call i32 (...) @android_memory_barrier()
ret void
}

LLVM IR (-O2):
define void @android_atomic_acquire_store(i32 %0, i32* %1) {
store volatile i32 %0, i32* %1
%3 = tail call i32 (...) @android_memory_barrier()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int, int, char *);
int /*<<< orphan*/ stderr;
bool test_equality_bool(bool expected, bool value, char *msg) {
  if (expected != value) {
    fprintf(stderr, "ERR: valeur attendue %d ; valeur calculee %d. %s\n",
            expected, value, msg);
    return false;
  }
  return true;
}


x86 assembly (clang, -O0):
<test_equality_bool>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
je     1159 <test_equality_bool+0x49>
mov    0x2eab(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%r8
lea    0xeb8(%rip),%rsi
call   1030 <fprintf@plt>
movl   $0x0,-0x4(%rbp)
jmp    1160 <test_equality_bool+0x50>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_equality_bool>:
mov    $0x1,%eax
cmp    %esi,%edi
je     113c <test_equality_bool+0x2c>
push   %rax
mov    %rdx,%r8
mov    %esi,%ecx
mov    %edi,%edx
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [50 x i8] c"ERR: valeur attendue %d ; valeur calculee %d. %s\0A\00"
define i32 @test_equality_bool(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp ne i32 %8, %9
br i1 %10, label %11, label %17
11: ; preds = %3
%12 = load i32, i32* @stderr
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = load i8*, i8** %7
%16 = call i32 @fprintf(i32 %12, i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0), i32 %13, i32 %14, i8* %15)
store i32 0, i32* %4
br label %18
17: ; preds = %3
store i32 1, i32* %4
br label %18
18: ; preds = %17, %11
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [50 x i8] c"ERR: valeur attendue %d ; valeur calculee %d. %s\0A\00"
define i32 @test_equality_bool(i32 %0, i32 %1, i8* %2) {
%4 = icmp eq i32 %0, %1
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1, i8* %2)
br label %8
8: ; preds = %3, %5
%9 = phi i32 [ 0, %5 ], [ 1, %3 ]
ret i32 %9
}
/* Type definitions */
typedef scalar_t__ uint64_t;

/* Variables and functions */
uint64_t uint64max(uint64_t a, uint64_t b) { return a > b ? a : b; }


x86 assembly (clang, -O0):
<uint64max>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jle    1127 <uint64max+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <uint64max+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uint64max>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovg  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @uint64max(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sgt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @uint64max(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char const *, int /*<<< orphan*/);
int /*<<< orphan*/ putchar(char);
int /*<<< orphan*/ stdout;
void putword(const char *str) {
  static bool first = true;
  if (!str) {
    first = true;
    return;
  }
  if (!first)
    putchar(' ');
  fputs(str, stdout);
  first = false;
}


x86 assembly (clang, -O0):
<putword>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1146 <putword+0x26>
movl   $0x1,0x2eef(%rip)
jmp    1179 <putword+0x59>
cmpl   $0x0,0x2ee3(%rip)
jne    115d <putword+0x3d>
mov    $0x20,%edi
call   1030 <putchar@plt>
mov    -0x8(%rbp),%rdi
mov    0x2e78(%rip),%rax
mov    (%rax),%esi
call   1040 <fputs@plt>
movl   $0x0,0x2eb7(%rip)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putword>:
push   %rbx
mov    %rdi,%rbx
test   %rdi,%rdi
je     114d <putword+0x2d>
cmpb   $0x1,0x2f04(%rip)
jne    113c <putword+0x1c>
mov    $0x20,%edi
call   1030 <putchar@plt>
mov    0x2e9d(%rip),%rax
mov    (%rax),%esi
mov    %rbx,%rdi
call   1040 <fputs@plt>
test   %rbx,%rbx
setne  0x2edd(%rip)
pop    %rbx
ret

LLVM IR (-O0):
@putword.first = internal global i32 1
@stdout = global i32 0
define void @putword(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %6, label %5
5: ; preds = %1
store i32 1, i32* @putword.first
br label %15
6: ; preds = %1
%7 = load i32, i32* @putword.first
%8 = icmp ne i32 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %6
%10 = call i32 @putchar(i8 signext 32)
br label %11
11: ; preds = %9, %6
%12 = load i8*, i8** %2
%13 = load i32, i32* @stdout
%14 = call i32 @fputs(i8* %12, i32 %13)
store i32 0, i32* @putword.first
br label %15
15: ; preds = %11, %5
ret void
}

LLVM IR (-O2):
@putword.first = internal unnamed_addr global i1 false
@stdout = global i32 0
define void @putword(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = load i1, i1* @putword.first
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 @putchar(i8 signext 32)
br label %7
7: ; preds = %5, %3
%8 = load i32, i32* @stdout
%9 = tail call i32 @fputs(i8* %0, i32 %8)
br label %10
10: ; preds = %1, %7
%11 = xor i1 %2, true
store i1 %11, i1* @putword.first
ret void
}
float f1(float y) { return y; }


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
ret

LLVM IR (-O0):
define float @f1(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
ret float %3
}

LLVM IR (-O2):
define float @f1(float returned %0) {
ret float %0
}
/* Variables and functions */
int /*<<< orphan*/ _DIAGASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
int yyerror(char *msg) {
  _DIAGASSERT(msg != NULL);
  (void)fprintf(stderr, "%s\n", msg);
  return (0);
}


x86 assembly (clang, -O0):
<yyerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <_DIAGASSERT@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xeae(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yyerror>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1040 <_DIAGASSERT@plt>
mov    0x2ea7(%rip),%rax
mov    (%rax),%edi
lea    0xebe(%rip),%rsi
mov    %rbx,%rdx
call   1030 <fprintf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define i32 @yyerror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
%5 = zext i1 %4 to i32
%6 = call i32 @_DIAGASSERT(i32 %5)
%7 = load i32, i32* @stderr
%8 = load i8*, i8** %2
%9 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %8)
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define i32 @yyerror(i8* %0) {
%2 = icmp ne i8* %0, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @_DIAGASSERT(i32 %3)
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ AbsoluteIndirectLongSlow(int);
int /*<<< orphan*/ S9xSA1SetPCBase(int /*<<< orphan*/);
void OpDCSlow(void) { S9xSA1SetPCBase(AbsoluteIndirectLongSlow(5)); }


x86 assembly (clang, -O0):
<OpDCSlow>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%edi
call   1030 <AbsoluteIndirectLongSlow@plt>
mov    %eax,%edi
call   1040 <S9xSA1SetPCBase@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<OpDCSlow>:
push   %rax
mov    $0x5,%edi
call   1030 <AbsoluteIndirectLongSlow@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <S9xSA1SetPCBase@plt>

LLVM IR (-O0):
define void @OpDCSlow() {
%1 = call i32 @AbsoluteIndirectLongSlow(i32 5)
%2 = call i32 @S9xSA1SetPCBase(i32 %1)
ret void
}

LLVM IR (-O2):
define void @OpDCSlow() {
%1 = tail call i32 @AbsoluteIndirectLongSlow(i32 5)
%2 = tail call i32 @S9xSA1SetPCBase(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ do1sub(char);
dosub() { do1sub('s'); }


x86 assembly (clang, -O0):
<dosub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x73,%edi
call   1030 <do1sub@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dosub>:
mov    $0x73,%edi
jmp    1030 <do1sub@plt>

LLVM IR (-O0):
define i32 @dosub() {
%1 = alloca i32
%2 = call i32 @do1sub(i8 signext 115)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @dosub() {
%1 = tail call i32 @do1sub(i8 signext 115)
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ SEEK_END;
int /*<<< orphan*/ SEEK_SET;
int /*<<< orphan*/ fseek(int /*<<< orphan*/ *, int, int /*<<< orphan*/);
int ftell(int /*<<< orphan*/ *);
size_t file_get_size(FILE *fp) {
  int current_position = ftell(fp);
  fseek(fp, 0, SEEK_END);
  size_t file_size = (size_t)ftell(fp);
  fseek(fp, current_position, SEEK_SET);
  return file_size;
}


x86 assembly (clang, -O0):
<file_get_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ftell@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ea5(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
call   1040 <fseek@plt>
mov    -0x8(%rbp),%rdi
call   1030 <ftell@plt>
cltq
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    0x2e6f(%rip),%rax
mov    (%rax),%edx
call   1040 <fseek@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_get_size>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%rbx
call   1030 <ftell@plt>
mov    %eax,%r14d
mov    0x2eb2(%rip),%rax
mov    (%rax),%edx
mov    %rbx,%rdi
xor    %esi,%esi
call   1040 <fseek@plt>
mov    %rbx,%rdi
call   1030 <ftell@plt>
movslq %eax,%rbp
mov    0x2e84(%rip),%rax
mov    (%rax),%edx
mov    %rbx,%rdi
mov    %r14d,%esi
call   1040 <fseek@plt>
mov    %rbp,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@SEEK_END = global i32 0
@SEEK_SET = global i32 0
define i64 @file_get_size(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i64
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = call i32 @ftell(i32* %5)
store i32 %6, i32* %3
%7 = load i32*, i32** %2
%8 = load i32, i32* @SEEK_END
%9 = call i32 @fseek(i32* %7, i32 0, i32 %8)
%10 = load i32*, i32** %2
%11 = call i32 @ftell(i32* %10)
%12 = sext i32 %11 to i64
store i64 %12, i64* %4
%13 = load i32*, i32** %2
%14 = load i32, i32* %3
%15 = load i32, i32* @SEEK_SET
%16 = call i32 @fseek(i32* %13, i32 %14, i32 %15)
%17 = load i64, i64* %4
ret i64 %17
}

LLVM IR (-O2):
@SEEK_END = global i32 0
@SEEK_SET = global i32 0
define i64 @file_get_size(i32* nocapture %0) {
%2 = tail call i32 @ftell(i32* %0)
%3 = load i32, i32* @SEEK_END
%4 = tail call i32 @fseek(i32* %0, i32 0, i32 %3)
%5 = tail call i32 @ftell(i32* %0)
%6 = sext i32 %5 to i64
%7 = load i32, i32* @SEEK_SET
%8 = tail call i32 @fseek(i32* %0, i32 %2, i32 %7)
ret i64 %6
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int bpf_rand_mask(int);
uint64_t bpf_rand_u24(int shift) {
  return bpf_rand_mask((0xffffffULL)) << shift;
}


x86 assembly (clang, -O0):
<bpf_rand_u24>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0xffffff,%edi
call   1030 <bpf_rand_mask@plt>
mov    -0x4(%rbp),%ecx
shl    %cl,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bpf_rand_u24>:
push   %rbx
mov    %edi,%ebx
mov    $0xffffff,%edi
call   1030 <bpf_rand_mask@plt>
mov    %ebx,%ecx
shl    %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @bpf_rand_u24(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @bpf_rand_mask(i32 16777215)
%4 = load i32, i32* %2
%5 = shl i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @bpf_rand_u24(i32 %0) {
%2 = tail call i32 @bpf_rand_mask(i32 16777215)
%3 = shl i32 %2, %0
ret i32 %3
}
/* Variables and functions */
scalar_t__ malloc(int);
double *nl_dvector_create(size_t n) {
  double *v = (double *)malloc(sizeof(double) * n);
  return v;
}


x86 assembly (clang, -O0):
<nl_dvector_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x3,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nl_dvector_create>:
shl    $0x3,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define double* @nl_dvector_create(i64 %0) {
%2 = alloca i64
%3 = alloca double*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = mul i64 8, %4
%6 = trunc i64 %5 to i32
%7 = call i64 @malloc(i32 %6)
%8 = inttoptr i64 %7 to double*
store double* %8, double** %3
%9 = load double*, double** %3
ret double* %9
}

LLVM IR (-O2):
define double* @nl_dvector_create(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = shl i32 %2, 3
%4 = tail call i64 @malloc(i32 %3)
%5 = inttoptr i64 %4 to double*
ret double* %5
}
/* Type definitions */
typedef int /*<<< orphan*/ X509_CERT_AUX;

/* Variables and functions */
scalar_t__ ASN1_item_new(int /*<<< orphan*/ *);
int /*<<< orphan*/ X509_CERT_AUX_it;
X509_CERT_AUX *X509_CERT_AUX_new(void) {
  return (X509_CERT_AUX *)ASN1_item_new(&X509_CERT_AUX_it);
}


x86 assembly (clang, -O0):
<X509_CERT_AUX_new>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rdi
call   1030 <ASN1_item_new@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_CERT_AUX_new>:
mov    0x2ec9(%rip),%rdi
jmp    1030 <ASN1_item_new@plt>

LLVM IR (-O0):
@X509_CERT_AUX_it = global i32 0
define i32* @X509_CERT_AUX_new() {
%1 = call i64 @ASN1_item_new(i32* @X509_CERT_AUX_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}

LLVM IR (-O2):
@X509_CERT_AUX_it = global i32 0
define i32* @X509_CERT_AUX_new() {
%1 = tail call i64 @ASN1_item_new(i32* @X509_CERT_AUX_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}
/* Variables and functions */
int /*<<< orphan*/ rn_newString(char *);
int start_tag_open(int, int /*<<< orphan*/, int /*<<< orphan*/,
                   int /*<<< orphan*/);
int drv_start_tag_open(int p, char *suri, char *sname) {
  return start_tag_open(p, rn_newString(suri), rn_newString(sname), 0);
}


x86 assembly (clang, -O0):
<drv_start_tag_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <rn_newString@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <rn_newString@plt>
mov    -0x20(%rbp),%edi
mov    -0x1c(%rbp),%esi
mov    %eax,%edx
xor    %ecx,%ecx
call   1030 <start_tag_open@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drv_start_tag_open>:
push   %rbp
push   %r14
push   %rbx
mov    %rdx,%rbx
mov    %edi,%r14d
mov    %rsi,%rdi
call   1040 <rn_newString@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1040 <rn_newString@plt>
mov    %r14d,%edi
mov    %ebp,%esi
mov    %eax,%edx
xor    %ecx,%ecx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <start_tag_open@plt>

LLVM IR (-O0):
define i32 @drv_start_tag_open(i32 %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = call i32 @rn_newString(i8* %8)
%10 = load i8*, i8** %6
%11 = call i32 @rn_newString(i8* %10)
%12 = call i32 @start_tag_open(i32 %7, i32 %9, i32 %11, i32 0)
ret i32 %12
}

LLVM IR (-O2):
define i32 @drv_start_tag_open(i32 %0, i8* %1, i8* %2) {
%4 = tail call i32 @rn_newString(i8* %1)
%5 = tail call i32 @rn_newString(i8* %2)
%6 = tail call i32 @start_tag_open(i32 %0, i32 %4, i32 %5, i32 0)
ret i32 %6
}