#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t fdd_sector_size_code(int size) {
  int ret = 2;
  switch (size) {
  case 128:
    ret = 0;
    break;
  case 256:
    ret = 1;
    break;
  case 512:
    ret = 2;
    break;
  case 1024:
    ret = 3;
    break;
  case 2048:
    ret = 4;
    break;
  case 4096:
    ret = 5;
    break;
  case 8192:
    ret = 6;
    break;
  case 16384:
    ret = 7;
    break;
  default:
    break;
  }
  return (ret);
}


x86 assembly (clang, -O0):
<fdd_sector_size_code>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x80,%eax
je     11a9 <fdd_sector_size_code+0xa9>
jmp    1124 <fdd_sector_size_code+0x24>
mov    -0xc(%rbp),%eax
sub    $0x100,%eax
je     11b5 <fdd_sector_size_code+0xb5>
jmp    1137 <fdd_sector_size_code+0x37>
mov    -0xc(%rbp),%eax
sub    $0x200,%eax
je     11c1 <fdd_sector_size_code+0xc1>
jmp    114a <fdd_sector_size_code+0x4a>
mov    -0xc(%rbp),%eax
sub    $0x400,%eax
je     11cd <fdd_sector_size_code+0xcd>
jmp    115d <fdd_sector_size_code+0x5d>
mov    -0xc(%rbp),%eax
sub    $0x800,%eax
je     11d9 <fdd_sector_size_code+0xd9>
jmp    1170 <fdd_sector_size_code+0x70>
mov    -0xc(%rbp),%eax
sub    $0x1000,%eax
je     11e5 <fdd_sector_size_code+0xe5>
jmp    1183 <fdd_sector_size_code+0x83>
mov    -0xc(%rbp),%eax
sub    $0x2000,%eax
je     11f1 <fdd_sector_size_code+0xf1>
jmp    1196 <fdd_sector_size_code+0x96>
mov    -0xc(%rbp),%eax
sub    $0x4000,%eax
je     11fd <fdd_sector_size_code+0xfd>
jmp    1209 <fdd_sector_size_code+0x109>
movl   $0x0,-0x8(%rbp)
jmp    120e <fdd_sector_size_code+0x10e>
movl   $0x1,-0x8(%rbp)
jmp    120e <fdd_sector_size_code+0x10e>
movl   $0x2,-0x8(%rbp)
jmp    120e <fdd_sector_size_code+0x10e>
movl   $0x3,-0x8(%rbp)
jmp    120e <fdd_sector_size_code+0x10e>
movl   $0x4,-0x8(%rbp)
jmp    120e <fdd_sector_size_code+0x10e>
movl   $0x5,-0x8(%rbp)
jmp    120e <fdd_sector_size_code+0x10e>
movl   $0x6,-0x8(%rbp)
jmp    120e <fdd_sector_size_code+0x10e>
movl   $0x7,-0x8(%rbp)
jmp    120e <fdd_sector_size_code+0x10e>
jmp    120e <fdd_sector_size_code+0x10e>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdd_sector_size_code>:
mov    $0x2,%eax
cmp    $0x7ff,%edi
jle    112b <fdd_sector_size_code+0x2b>
cmp    $0x1fff,%edi
jg     1149 <fdd_sector_size_code+0x49>
cmp    $0x800,%edi
je     115f <fdd_sector_size_code+0x5f>
cmp    $0x1000,%edi
jne    116d <fdd_sector_size_code+0x6d>
mov    $0x5,%eax
ret
cmp    $0x80,%edi
je     1165 <fdd_sector_size_code+0x65>
cmp    $0x100,%edi
je     116e <fdd_sector_size_code+0x6e>
cmp    $0x400,%edi
jne    116d <fdd_sector_size_code+0x6d>
mov    $0x3,%eax
ret
cmp    $0x2000,%edi
je     1168 <fdd_sector_size_code+0x68>
cmp    $0x4000,%edi
jne    116d <fdd_sector_size_code+0x6d>
mov    $0x7,%eax
ret
mov    $0x4,%eax
ret
xor    %eax,%eax
ret
mov    $0x6,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @fdd_sector_size_code(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 2, i32* %3
%4 = load i32, i32* %2
switch i32 %4, label %13 [
i32 128, label %5
i32 256, label %6
i32 512, label %7
i32 1024, label %8
i32 2048, label %9
i32 4096, label %10
i32 8192, label %11
i32 16384, label %12
]
5: ; preds = %1
store i32 0, i32* %3
br label %14
6: ; preds = %1
store i32 1, i32* %3
br label %14
7: ; preds = %1
store i32 2, i32* %3
br label %14
8: ; preds = %1
store i32 3, i32* %3
br label %14
9: ; preds = %1
store i32 4, i32* %3
br label %14
10: ; preds = %1
store i32 5, i32* %3
br label %14
11: ; preds = %1
store i32 6, i32* %3
br label %14
12: ; preds = %1
store i32 7, i32* %3
br label %14
13: ; preds = %1
br label %14
14: ; preds = %13, %12, %11, %10, %9, %8, %7, %6, %5
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @fdd_sector_size_code(i32 %0) {
switch i32 %0, label %9 [
i32 128, label %2
i32 256, label %3
i32 16384, label %8
i32 1024, label %4
i32 2048, label %5
i32 4096, label %6
i32 8192, label %7
]
2: ; preds = %1
br label %9
3: ; preds = %1
br label %9
4: ; preds = %1
br label %9
5: ; preds = %1
br label %9
6: ; preds = %1
br label %9
7: ; preds = %1
br label %9
8: ; preds = %1
br label %9
9: ; preds = %1, %8, %7, %6, %5, %4, %3, %2
%10 = phi i32 [ 7, %8 ], [ 6, %7 ], [ 5, %6 ], [ 4, %5 ], [ 3, %4 ], [ 1, %3 ], [ 0, %2 ], [ 2, %1 ]
ret i32 %10
}