xunge/DecIR huggingface dataset:
/* Type definitions */
typedef scalar_t__ uint16_t;
typedef int /*<<< orphan*/ int16_t;

/* Variables and functions */
int /*<<< orphan*/ sin16(scalar_t__);
int16_t cos16(uint16_t phase) { return sin16(phase + 16384); }


x86 assembly (clang, -O0):
<cos16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x4000,%rdi
call   1030 <sin16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cos16>:
add    $0x4000,%rdi
jmp    1030 <sin16@plt>

LLVM IR (-O0):
define i32 @cos16(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 16384
%5 = call i32 @sin16(i64 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @cos16(i64 %0) {
%2 = add nsw i64 %0, 16384
%3 = tail call i32 @sin16(i64 %2)
ret i32 %3
}
/* Variables and functions */
int L_tmpnam;
int /*<<< orphan*/ printf(char *, char *);
char *tmpnam(char *);
int main() {
  char buf[L_tmpnam];
  printf("tmpnam 0: %s\n", tmpnam(buf));
  printf("tmpnam 1: %s\n", tmpnam(buf));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%eax
mov    %rsp,%rcx
mov    %rcx,-0x10(%rbp)
mov    %rax,%rcx
add    $0xf,%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rdi
sub    %rcx,%rdi
mov    %rdi,-0x20(%rbp)
mov    %rdi,%rsp
mov    %rax,-0x18(%rbp)
call   1040 <tmpnam@plt>
mov    %rax,%rsi
lea    0xe96(%rip),%rdi
call   1030 <printf@plt>
mov    -0x20(%rbp),%rdi
call   1040 <tmpnam@plt>
mov    %rax,%rsi
lea    0xe8c(%rip),%rdi
call   1030 <printf@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
mov    -0x4(%rbp),%eax
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
push   %rax
mov    0x2eb3(%rip),%rax
mov    (%rax),%eax
mov    %rsp,%rbx
add    $0xf,%rax
and    $0xfffffffffffffff0,%rax
sub    %rax,%rbx
mov    %rbx,%rsp
mov    %rbx,%rdi
call   1040 <tmpnam@plt>
lea    0xeb1(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1040 <tmpnam@plt>
lea    0xea8(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
lea    -0x8(%rbp),%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@L_tmpnam = global i32 0
@.str = [14 x i8] c"tmpnam 0: %s\0A\00"
@.str.1 = [14 x i8] c"tmpnam 1: %s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i64
store i32 0, i32* %1
%4 = load i32, i32* @L_tmpnam
%5 = zext i32 %4 to i64
%6 = call i8* @llvm.stacksave()
store i8* %6, i8** %2
%7 = alloca i8, i64 %5
store i64 %5, i64* %3
%8 = call i8* @tmpnam(i8* %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %8)
%10 = call i8* @tmpnam(i8* %7)
%11 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), i8* %10)
store i32 0, i32* %1
%12 = load i8*, i8** %2
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
@L_tmpnam = global i32 0
@.str = [14 x i8] c"tmpnam 0: %s\0A\00"
@.str.1 = [14 x i8] c"tmpnam 1: %s\0A\00"
define i32 @main() {
%1 = load i32, i32* @L_tmpnam
%2 = zext i32 %1 to i64
%3 = alloca i8, i64 %2
%4 = call i8* @tmpnam(i8* %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i8* @tmpnam(i8* %3)
%7 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), i8* %6)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct link {
  int dummy;
};
struct jx_parser {
  int dummy;
};
struct jx {
  int dummy;
};

/* Variables and functions */
struct jx *jx_parse_finish(struct jx_parser *);
struct jx_parser *jx_parser_create(int /*<<< orphan*/);
int /*<<< orphan*/ jx_parser_read_link(struct jx_parser *, struct link *,
                                       int /*<<< orphan*/);
struct jx *jx_parse_link(struct link *l, time_t stoptime) {
  struct jx_parser *p = jx_parser_create(0);
  jx_parser_read_link(p, l, stoptime);
  return jx_parse_finish(p);
}


x86 assembly (clang, -O0):
<jx_parse_link>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %edi,%edi
call   1040 <jx_parser_create@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <jx_parser_read_link@plt>
mov    -0x18(%rbp),%rdi
call   1050 <jx_parse_finish@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jx_parse_link>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %rdi,%rbx
xor    %edi,%edi
call   1040 <jx_parser_create@plt>
mov    %rax,%rbp
mov    %rax,%rdi
mov    %rbx,%rsi
mov    %r14d,%edx
call   1030 <jx_parser_read_link@plt>
mov    %rbp,%rdi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1050 <jx_parse_finish@plt>

LLVM IR (-O0):
%struct.jx = type { i32 }
%struct.link = type { i32 }
%struct.jx_parser = type { i32 }
define %struct.jx* @jx_parse_link(%struct.link* %0, i32 %1) {
%3 = alloca %struct.link*
%4 = alloca i32
%5 = alloca %struct.jx_parser*
store %struct.link* %0, %struct.link** %3
store i32 %1, i32* %4
%6 = call %struct.jx_parser* @jx_parser_create(i32 0)
store %struct.jx_parser* %6, %struct.jx_parser** %5
%7 = load %struct.jx_parser*, %struct.jx_parser** %5
%8 = load %struct.link*, %struct.link** %3
%9 = load i32, i32* %4
%10 = call i32 @jx_parser_read_link(%struct.jx_parser* %7, %struct.link* %8, i32 %9)
%11 = load %struct.jx_parser*, %struct.jx_parser** %5
%12 = call %struct.jx* @jx_parse_finish(%struct.jx_parser* %11)
ret %struct.jx* %12
}

LLVM IR (-O2):
%struct.jx = type { i32 }
%struct.link = type { i32 }
%struct.jx_parser = type { i32 }
define %struct.jx* @jx_parse_link(%struct.link* %0, i32 %1) {
%3 = tail call %struct.jx_parser* @jx_parser_create(i32 0)
%4 = tail call i32 @jx_parser_read_link(%struct.jx_parser* %3, %struct.link* %0, i32 %1)
%5 = tail call %struct.jx* @jx_parse_finish(%struct.jx_parser* %3)
ret %struct.jx* %5
}
double tanh(double x) {
  printf("tcl>>> %s\n", __func__);
  return -1;
}


x86 assembly (clang, -O0):
<tanh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
lea    0xee4(%rip),%rdi
lea    0xee8(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
movsd  0xec6(%rip),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tanh>:
push   %rax
lea    0xef0(%rip),%rdi
lea    0xef4(%rip),%rsi
xor    %eax,%eax
call   1030 <printf@plt>
movsd  0xed2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@.str = [11 x i8] c"tcl>>> %s\0A\00"
@__func__.tanh = [5 x i8] c"tanh\00"
define double @tanh(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @__func__.tanh, i64 0, i64 0))
ret double -1.000000e+00
}

LLVM IR (-O2):
@.str = [11 x i8] c"tcl>>> %s\0A\00"
@__func__.tanh = [5 x i8] c"tanh\00"
define double @tanh(double %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @__func__.tanh, i64 0, i64 0))
ret double -1.000000e+00
}
/* Variables and functions */
int /*<<< orphan*/ write(char *, char *, int /*<<< orphan*/ *);
void init_asig_section() { write("json-task.json", "\"asig\": [\n", NULL); }


x86 assembly (clang, -O0):
<init_asig_section>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xeed(%rip),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_asig_section>:
lea    0xee9(%rip),%rdi
lea    0xef1(%rip),%rsi
xor    %edx,%edx
jmp    1030 <write@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"json-task.json\00"
@.str.1 = [11 x i8] c"\22asig\22: [\0A\00"
define void @init_asig_section() {
%1 = call i32 @write(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32* null)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"json-task.json\00"
@.str.1 = [11 x i8] c"\22asig\22: [\0A\00"
define void @init_asig_section() {
%1 = tail call i32 @write(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ xor_string(unsigned char *, unsigned char const *,
                              unsigned char const *, int, int);
void decrypt(unsigned char *m, const unsigned char *c, const unsigned char *k,
             int c_len, int k_len) {
  xor_string(m, c, k, c_len, k_len);
}


x86 assembly (clang, -O0):
<decrypt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    -0x20(%rbp),%r8d
call   1030 <xor_string@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<decrypt>:
jmp    1030 <xor_string@plt>

LLVM IR (-O0):
define void @decrypt(i8* %0, i8* %1, i8* %2, i32 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i8*, i8** %6
%12 = load i8*, i8** %7
%13 = load i8*, i8** %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i32 @xor_string(i8* %11, i8* %12, i8* %13, i32 %14, i32 %15)
ret void
}

LLVM IR (-O2):
define void @decrypt(i8* %0, i8* %1, i8* %2, i32 %3, i32 %4) {
%6 = tail call i32 @xor_string(i8* %0, i8* %1, i8* %2, i32 %3, i32 %4)
ret void
}
/* Type definitions */
struct phnvtx {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free_object(int, short *);
void free_phnvtx(struct phnvtx *vtx) { free_object(24, (short *)vtx); }


x86 assembly (clang, -O0):
<free_phnvtx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x18,%edi
call   1030 <free_object@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_phnvtx>:
mov    %rdi,%rsi
mov    $0x18,%edi
jmp    1030 <free_object@plt>

LLVM IR (-O0):
%struct.phnvtx = type { i32 }
define void @free_phnvtx(%struct.phnvtx* %0) {
%2 = alloca %struct.phnvtx*
store %struct.phnvtx* %0, %struct.phnvtx** %2
%3 = load %struct.phnvtx*, %struct.phnvtx** %2
%4 = bitcast %struct.phnvtx* %3 to i16*
%5 = call i32 @free_object(i32 24, i16* %4)
ret void
}

LLVM IR (-O2):
%struct.phnvtx = type { i32 }
define void @free_phnvtx(%struct.phnvtx* %0) {
%2 = bitcast %struct.phnvtx* %0 to i16*
%3 = tail call i32 @free_object(i32 24, i16* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ OAL_OBTAIN_SEMAPHORE();
int /*<<< orphan*/ OAL_RELEASE_SEMAPHORE();
int i2c_bulkwrite(void *, unsigned char, unsigned short, unsigned char *, int);
int fc8300_i2c_bytewrite(void *handle, unsigned short devid,
                         unsigned short addr, unsigned char data) {
  int res;
  OAL_OBTAIN_SEMAPHORE();
  res = i2c_bulkwrite(handle, (unsigned char)(devid >> 8) & 0xff, addr,
                      (unsigned char *)&data, 1);
  OAL_RELEASE_SEMAPHORE();
  return res;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %cl,%al
mov    %dx,%cx
mov    %si,%dx
mov    %rdi,-0x8(%rbp)
mov    %dx,-0xa(%rbp)
mov    %cx,-0xc(%rbp)
mov    %al,-0xd(%rbp)
mov    $0x0,%al
call   1050 <OAL_OBTAIN_SEMAPHORE@plt>
mov    -0x8(%rbp),%rdi
movzwl -0xa(%rbp),%eax
sar    $0x8,%eax
movzbl %al,%eax
and    $0xff,%eax
lea    -0xd(%rbp),%rcx
mov    $0x1,%r8d
movzbl %al,%esi
movzwl -0xc(%rbp),%edx
call   1040 <i2c_bulkwrite@plt>
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1030 <OAL_RELEASE_SEMAPHORE@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%rbx
mov    %cl,0xf(%rsp)
xor    %eax,%eax
call   1050 <OAL_OBTAIN_SEMAPHORE@plt>
shr    $0x8,%ebp
lea    0xf(%rsp),%rcx
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
mov    $0x1,%r8d
call   1040 <i2c_bulkwrite@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <OAL_RELEASE_SEMAPHORE@plt>
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fc8300_i2c_bytewrite(i8* %0, i16 zeroext %1, i16 zeroext %2, i8 zeroext %3) {
%5 = alloca i8*
%6 = alloca i16
%7 = alloca i16
%8 = alloca i8
%9 = alloca i32
store i8* %0, i8** %5
store i16 %1, i16* %6
store i16 %2, i16* %7
store i8 %3, i8* %8
%10 = call i32 (...) @OAL_OBTAIN_SEMAPHORE()
%11 = load i8*, i8** %5
%12 = load i16, i16* %6
%13 = zext i16 %12 to i32
%14 = ashr i32 %13, 8
%15 = trunc i32 %14 to i8
%16 = zext i8 %15 to i32
%17 = and i32 %16, 255
%18 = trunc i32 %17 to i8
%19 = load i16, i16* %7
%20 = call i32 @i2c_bulkwrite(i8* %11, i8 zeroext %18, i16 zeroext %19, i8* %8, i32 1)
store i32 %20, i32* %9
%21 = call i32 (...) @OAL_RELEASE_SEMAPHORE()
%22 = load i32, i32* %9
ret i32 %22
}

LLVM IR (-O2):
define i32 @fc8300_i2c_bytewrite(i8* %0, i16 zeroext %1, i16 zeroext %2, i8 zeroext %3) {
%5 = alloca i8
store i8 %3, i8* %5
%6 = tail call i32 (...) @OAL_OBTAIN_SEMAPHORE()
%7 = lshr i16 %1, 8
%8 = trunc i16 %7 to i8
%9 = call i32 @i2c_bulkwrite(i8* %0, i8 zeroext %8, i16 zeroext %2, i8* %5, i32 1)
%10 = call i32 (...) @OAL_RELEASE_SEMAPHORE()
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M126_f(char *s) {
  debug("M126_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M126_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M126_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M126_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M126_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M126_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M126_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
int main() {
  int x;
  int *p;
  x = 1;
  p = &x;
  p[0] = 0;
  return x;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
store i32 0, i32* %1
store i32 1, i32* %2
store i32* %2, i32** %3
%4 = load i32*, i32** %3
%5 = getelementptr inbounds i32, i32* %4, i64 0
store i32 0, i32* %5
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
double berechne_kosten_gesamt(double gesamtmenge, double kosten_pro_einheit) {
  double gesamtkosten = gesamtmenge * kosten_pro_einheit;
  return gesamtkosten;
}


x86 assembly (clang, -O0):
<berechne_kosten_gesamt>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<berechne_kosten_gesamt>:
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @berechne_kosten_gesamt(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %3
%7 = load double, double* %4
%8 = fmul double %6, %7
store double %8, double* %5
%9 = load double, double* %5
ret double %9
}

LLVM IR (-O2):
define double @berechne_kosten_gesamt(double %0, double %1) {
%3 = fmul double %0, %1
ret double %3
}
/* Variables and functions */
int abs(int const);
size_t number_of_digits(const int n, const size_t base) {
  size_t num_digits = 1;
  int tempnum = abs(n);
  while ((tempnum /= base)) {
    ++num_digits;
  }
  return n >= 0 ? num_digits : num_digits + 1;
}


x86 assembly (clang, -O0):
<number_of_digits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x1,-0x18(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <abs@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rcx
movslq -0x1c(%rbp),%rax
xor    %edx,%edx
div    %rcx
mov    %eax,-0x1c(%rbp)
cmp    $0x0,%eax
je     115c <number_of_digits+0x4c>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1132 <number_of_digits+0x22>
cmpl   $0x0,-0x4(%rbp)
jl     1173 <number_of_digits+0x63>
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
jmp    117f <number_of_digits+0x6f>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<number_of_digits>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
mov    %edi,%ecx
shr    $0x1f,%rcx
jmp    111d <number_of_digits+0x1d>
nop
xor    %edx,%edx
div    %esi
add    $0x1,%rcx
test   %rax,%rax
je     1128 <number_of_digits+0x28>
mov    %eax,%eax
cmp    %rsi,%rax
jae    1110 <number_of_digits+0x10>
xor    %eax,%eax
jmp    1114 <number_of_digits+0x14>
mov    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @number_of_digits(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %3
store i64 %1, i64* %4
store i64 1, i64* %5
%7 = load i32, i32* %3
%8 = call i32 @abs(i32 %7)
store i32 %8, i32* %6
br label %9
9: ; preds = %16, %2
%10 = load i64, i64* %4
%11 = load i32, i32* %6
%12 = sext i32 %11 to i64
%13 = udiv i64 %12, %10
%14 = trunc i64 %13 to i32
store i32 %14, i32* %6
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %19
16: ; preds = %9
%17 = load i64, i64* %5
%18 = add i64 %17, 1
store i64 %18, i64* %5
br label %9
19: ; preds = %9
%20 = load i32, i32* %3
%21 = icmp sge i32 %20, 0
br i1 %21, label %22, label %24
22: ; preds = %19
%23 = load i64, i64* %5
br label %27
24: ; preds = %19
%25 = load i64, i64* %5
%26 = add i64 %25, 1
br label %27
27: ; preds = %24, %22
%28 = phi i64 [ %23, %22 ], [ %26, %24 ]
ret i64 %28
}

LLVM IR (-O2):
define i64 @number_of_digits(i32 %0, i64 %1) {
%3 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
br label %4
4: ; preds = %4, %2
%5 = phi i64 [ 1, %2 ], [ %11, %4 ]
%6 = phi i32 [ %3, %2 ], [ %9, %4 ]
%7 = zext i32 %6 to i64
%8 = udiv i64 %7, %1
%9 = trunc i64 %8 to i32
%10 = icmp eq i32 %9, 0
%11 = add i64 %5, 1
br i1 %10, label %12, label %4
12: ; preds = %4
%13 = lshr i32 %0, 31
%14 = zext i32 %13 to i64
%15 = add i64 %5, %14
ret i64 %15
}
/* Variables and functions */
void *_xmalloc_inc(size_t, size_t, int /*<<< orphan*/);
void *xmalloc_inc(size_t size, size_t inc) {
  return _xmalloc_inc(size, inc, 0);
}


x86 assembly (clang, -O0):
<xmalloc_inc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <_xmalloc_inc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc_inc>:
xor    %edx,%edx
jmp    1030 <_xmalloc_inc@plt>

LLVM IR (-O0):
define i8* @xmalloc_inc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i8* @_xmalloc_inc(i64 %5, i64 %6, i32 0)
ret i8* %7
}

LLVM IR (-O2):
define i8* @xmalloc_inc(i64 %0, i64 %1) {
%3 = tail call i8* @_xmalloc_inc(i64 %0, i64 %1, i32 0)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void gloc_stderr() { exit(1); }


x86 assembly (clang, -O0):
<gloc_stderr>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<gloc_stderr>:
push   %rax
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @gloc_stderr() {
%1 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @gloc_stderr() {
%1 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, long);
void _printMoveBoard() {
  printf("%ld\n", (long)123);
  printf("%ld\n", (long)456);
  printf("%ld\n", (long)789);
}


x86 assembly (clang, -O0):
<_printMoveBoard>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x7b,%esi
call   1030 <printf@plt>
lea    0xed4(%rip),%rdi
mov    $0x1c8,%esi
call   1030 <printf@plt>
lea    0xec3(%rip),%rdi
mov    $0x315,%esi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_printMoveBoard>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    $0x7b,%esi
mov    %rbx,%rdi
call   1030 <printf@plt>
mov    $0x1c8,%esi
mov    %rbx,%rdi
call   1030 <printf@plt>
mov    $0x315,%esi
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%ld\0A\00"
define void @_printMoveBoard() {
%1 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 123)
%2 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 456)
%3 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 789)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%ld\0A\00"
define void @_printMoveBoard() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 123)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 456)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 789)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double const);
int /*<<< orphan*/ putchar(char);
void show_array(const double ar[], int n) {
  int i;
  for (i = 0; i < n; i++)
    printf("%8.3f ", ar[i]);
  putchar('\n');
}


x86 assembly (clang, -O0):
<show_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1169 <show_array+0x49>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
lea    0xeaa(%rip),%rdi
call   1040 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1136 <show_array+0x16>
mov    $0xa,%edi
call   1030 <putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_array>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1157 <show_array+0x37>
mov    %rdi,%r15
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xec5(%rip),%r14
nopl   0x0(%rax,%rax,1)
movsd  (%r15,%rbx,8),%xmm0
mov    %r14,%rdi
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <show_array+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"%8.3f \00"
define void @show_array(double* %0, i32 %1) {
%3 = alloca double*
%4 = alloca i32
%5 = alloca i32
store double* %0, double** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load double*, double** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds double, double* %11, i64 %13
%15 = load double, double* %14
%16 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), double %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = call i32 @putchar(i8 signext 10)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"%8.3f \00"
define void @show_array(double* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds double, double* %0, i64 %7
%9 = load double, double* %8
%10 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), double %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = tail call i32 @putchar(i8 signext 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIGFPE;
int /*<<< orphan*/ getpid();
int /*<<< orphan*/ kill(int /*<<< orphan*/, int /*<<< orphan*/);
int gen_FPE() {
  kill(getpid(), SIGFPE);
  return 0;
}


x86 assembly (clang, -O0):
<gen_FPE>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,%edi
mov    0x2eb4(%rip),%rax
mov    (%rax),%esi
call   1040 <kill@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_FPE>:
push   %rax
xor    %eax,%eax
call   1030 <getpid@plt>
mov    0x2eb9(%rip),%rcx
mov    (%rcx),%esi
mov    %eax,%edi
call   1040 <kill@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@SIGFPE = global i32 0
define i32 @gen_FPE() {
%1 = call i32 (...) @getpid()
%2 = load i32, i32* @SIGFPE
%3 = call i32 @kill(i32 %1, i32 %2)
ret i32 0
}

LLVM IR (-O2):
@SIGFPE = global i32 0
define i32 @gen_FPE() {
%1 = tail call i32 (...) @getpid()
%2 = load i32, i32* @SIGFPE
%3 = tail call i32 @kill(i32 %1, i32 %2)
ret i32 0
}
int is_alnum(ch)
int ch;
{
  return ((ch >= '0' && ch <= '9') || (ch >= 'A' && ch <= 'Z') ||
          (ch >= 'a' && ch <= 'z'));
}


x86 assembly (clang, -O0):
<is_alnum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x30,-0x4(%rbp)
jl     1120 <is_alnum+0x20>
mov    $0x1,%al
cmpl   $0x39,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1158 <is_alnum+0x58>
cmpl   $0x41,-0x4(%rbp)
jl     1139 <is_alnum+0x39>
mov    $0x1,%al
cmpl   $0x5a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1158 <is_alnum+0x58>
xor    %eax,%eax
cmpl   $0x61,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     1152 <is_alnum+0x52>
cmpl   $0x7a,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_alnum>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%eax
setb   %al
and    $0xffffffdf,%edi
add    $0xffffffbf,%edi
cmp    $0x1a,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_alnum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 48
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 57
br i1 %7, label %22, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 65
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 90
br i1 %13, label %22, label %14
14: ; preds = %11, %8
%15 = load i32, i32* %2
%16 = icmp sge i32 %15, 97
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp sle i32 %18, 122
br label %20
20: ; preds = %17, %14
%21 = phi i1 [ false, %14 ], [ %19, %17 ]
br label %22
22: ; preds = %20, %11, %5
%23 = phi i1 [ true, %11 ], [ true, %5 ], [ %21, %20 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @is_alnum(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = and i32 %0, -33
%5 = add i32 %4, -65
%6 = icmp ult i32 %5, 26
%7 = or i1 %3, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
void os_stop_sample(int number) {}


x86 assembly (clang, -O0):
<os_stop_sample>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_stop_sample>:
ret

LLVM IR (-O0):
define void @os_stop_sample(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @os_stop_sample(i32 %0) {
ret void
}
int fftw_imin(int a, int b) { return (a < b) ? a : b; }


x86 assembly (clang, -O0):
<fftw_imin>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <fftw_imin+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <fftw_imin+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fftw_imin>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @fftw_imin(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @fftw_imin(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ RamWrite32A(unsigned short, int);
void MemoryClear(unsigned short UsSourceAddress, unsigned short UsClearSize) {
  unsigned short UsLoopIndex;
  for (UsLoopIndex = 0; UsLoopIndex < UsClearSize; UsLoopIndex += 4) {
    RamWrite32A(UsSourceAddress + UsLoopIndex, 0x00000000);
  }
}


x86 assembly (clang, -O0):
<MemoryClear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movw   $0x0,-0x6(%rbp)
movzwl -0x6(%rbp),%eax
movzwl -0x4(%rbp),%ecx
cmp    %ecx,%eax
jge    1160 <MemoryClear+0x50>
movzwl -0x2(%rbp),%eax
movzwl -0x6(%rbp),%ecx
add    %ecx,%eax
xor    %esi,%esi
movzwl %ax,%edi
call   1030 <RamWrite32A@plt>
movzwl -0x6(%rbp),%eax
add    $0x4,%eax
mov    %ax,-0x6(%rbp)
jmp    112c <MemoryClear+0x1c>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MemoryClear>:
push   %rbp
push   %r14
push   %rbx
test   %esi,%esi
je     1149 <MemoryClear+0x39>
mov    %esi,%ebx
mov    %edi,%r14d
xor    %ebp,%ebp
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
add    %r14d,%eax
movzwl %ax,%edi
xor    %esi,%esi
call   1030 <RamWrite32A@plt>
mov    %ebp,%eax
add    $0x4,%eax
movzwl %ax,%ebp
cmp    %ebx,%ebp
jb     1130 <MemoryClear+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @MemoryClear(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
%5 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
store i16 0, i16* %5
br label %6
6: ; preds = %20, %2
%7 = load i16, i16* %5
%8 = zext i16 %7 to i32
%9 = load i16, i16* %4
%10 = zext i16 %9 to i32
%11 = icmp slt i32 %8, %10
br i1 %11, label %12, label %25
12: ; preds = %6
%13 = load i16, i16* %3
%14 = zext i16 %13 to i32
%15 = load i16, i16* %5
%16 = zext i16 %15 to i32
%17 = add nsw i32 %14, %16
%18 = trunc i32 %17 to i16
%19 = call i32 @RamWrite32A(i16 zeroext %18, i32 0)
br label %20
20: ; preds = %12
%21 = load i16, i16* %5
%22 = zext i16 %21 to i32
%23 = add nsw i32 %22, 4
%24 = trunc i32 %23 to i16
store i16 %24, i16* %5
br label %6
25: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @MemoryClear(i16 zeroext %0, i16 zeroext %1) {
%3 = zext i16 %1 to i32
%4 = icmp eq i16 %1, 0
br i1 %4, label %14, label %5
5: ; preds = %2, %5
%6 = phi i32 [ %12, %5 ], [ 0, %2 ]
%7 = phi i32 [ %11, %5 ], [ 0, %2 ]
%8 = trunc i32 %7 to i16
%9 = add i16 %8, %0
%10 = tail call i32 @RamWrite32A(i16 zeroext %9, i32 0)
%11 = add nuw nsw i32 %6, 4
%12 = and i32 %11, 65535
%13 = icmp ult i32 %12, %3
br i1 %13, label %5, label %14
14: ; preds = %5, %2
ret void
}
void RTCIntDisable(unsigned long ulIntType) {

  ;
  (*((volatile unsigned long *)(0x40002800 + 0x00000004))) &= ~ulIntType;
}


x86 assembly (clang, -O0):
<RTCIntDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xor    $0xffffffffffffffff,%rax
mov    $0x40002804,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0x40002804,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTCIntDisable>:
not    %rdi
and    %rdi,0x40002804
40
ret

LLVM IR (-O0):
define void @RTCIntDisable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = xor i64 %3, -1
%5 = load volatile i64, i64* inttoptr (i64 1073752068 to i64*)
%6 = and i64 %5, %4
store volatile i64 %6, i64* inttoptr (i64 1073752068 to i64*)
ret void
}

LLVM IR (-O2):
define void @RTCIntDisable(i64 %0) {
%2 = xor i64 %0, -1
%3 = load volatile i64, i64* inttoptr (i64 1073752068 to i64*)
%4 = and i64 %3, %2
store volatile i64 %4, i64* inttoptr (i64 1073752068 to i64*)
ret void
}
/* Type definitions */
struct cache_entry {
  int dummy;
};
struct cache {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cache_entry_unref(struct cache *, struct cache_entry *);
void cache_entry_unref_defer(void *data1, void *data2) {
  cache_entry_unref((struct cache *)data1, (struct cache_entry *)data2);
}


x86 assembly (clang, -O0):
<cache_entry_unref_defer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <cache_entry_unref@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cache_entry_unref_defer>:
jmp    1030 <cache_entry_unref@plt>

LLVM IR (-O0):
%struct.cache = type { i32 }
%struct.cache_entry = type { i32 }
define void @cache_entry_unref_defer(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to %struct.cache*
%7 = load i8*, i8** %4
%8 = bitcast i8* %7 to %struct.cache_entry*
%9 = call i32 @cache_entry_unref(%struct.cache* %6, %struct.cache_entry* %8)
ret void
}

LLVM IR (-O2):
%struct.cache = type { i32 }
%struct.cache_entry = type { i32 }
define void @cache_entry_unref_defer(i8* %0, i8* %1) {
%3 = bitcast i8* %0 to %struct.cache*
%4 = bitcast i8* %1 to %struct.cache_entry*
%5 = tail call i32 @cache_entry_unref(%struct.cache* %3, %struct.cache_entry* %4)
ret void
}
/* Variables and functions */
bool nrf52_errata_48(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_48>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_48>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_48() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_48() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void dealloc_dvector(double *v, unsigned int nh) { free((char *)v); }


x86 assembly (clang, -O0):
<dealloc_dvector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dealloc_dvector>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @dealloc_dvector(double* %0, i32 %1) {
%3 = alloca double*
%4 = alloca i32
store double* %0, double** %3
store i32 %1, i32* %4
%5 = load double*, double** %3
%6 = bitcast double* %5 to i8*
%7 = call i32 @free(i8* %6)
ret void
}

LLVM IR (-O2):
define void @dealloc_dvector(double* nocapture %0, i32 %1) {
%3 = bitcast double* %0 to i8*
%4 = tail call i32 @free(i8* %3)
ret void
}
void zoom_size(int nx, int ny, int *nxx, int *nyy, float factor) {
  *nxx = (int)((float)nx * factor + 0.5);
  *nyy = (int)((float)ny * factor + 0.5);
}


x86 assembly (clang, -O0):
<zoom_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
movss  %xmm0,-0x1c(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
mulss  -0x1c(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xed3(%rip),%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
cvtsi2ssl -0x8(%rbp),%xmm0
mulss  -0x1c(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xeaf(%rip),%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<zoom_size>:
cvtsi2ss %edi,%xmm1
mulss  %xmm0,%xmm1
cvtss2sd %xmm1,%xmm1
movsd  0xeec(%rip),%xmm2
addsd  %xmm2,%xmm1
cvttsd2si %xmm1,%eax
xorps  %xmm1,%xmm1
cvtsi2ss %esi,%xmm1
mov    %eax,(%rdx)
mulss  %xmm0,%xmm1
xorps  %xmm0,%xmm0
cvtss2sd %xmm1,%xmm0
addsd  %xmm2,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,(%rcx)
ret

LLVM IR (-O0):
define void @zoom_size(i32 %0, i32 %1, i32* %2, i32* %3, float %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca float
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32* %2, i32** %8
store i32* %3, i32** %9
store float %4, float* %10
%11 = load i32, i32* %6
%12 = sitofp i32 %11 to float
%13 = load float, float* %10
%14 = fmul float %12, %13
%15 = fpext float %14 to double
%16 = fadd double %15, 5.000000e-01
%17 = fptosi double %16 to i32
%18 = load i32*, i32** %8
store i32 %17, i32* %18
%19 = load i32, i32* %7
%20 = sitofp i32 %19 to float
%21 = load float, float* %10
%22 = fmul float %20, %21
%23 = fpext float %22 to double
%24 = fadd double %23, 5.000000e-01
%25 = fptosi double %24 to i32
%26 = load i32*, i32** %9
store i32 %25, i32* %26
ret void
}

LLVM IR (-O2):
define void @zoom_size(i32 %0, i32 %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3, float %4) {
%6 = sitofp i32 %0 to float
%7 = fmul float %6, %4
%8 = fpext float %7 to double
%9 = fadd double %8, 5.000000e-01
%10 = fptosi double %9 to i32
store i32 %10, i32* %2
%11 = sitofp i32 %1 to float
%12 = fmul float %11, %4
%13 = fpext float %12 to double
%14 = fadd double %13, 5.000000e-01
%15 = fptosi double %14 to i32
store i32 %15, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ setled(int, unsigned char, int);
paintgrid() {
  unsigned char i;
  for (i = 0; i < 32; i++) {
    setled(i, 10, 4);
    setled(i, 21, 4);
    setled(10, i, 4);
    setled(21, i, 4);
  }
}


x86 assembly (clang, -O0):
<paintgrid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x0,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
cmp    $0x20,%eax
jge    1182 <paintgrid+0x72>
movzbl -0x5(%rbp),%edi
mov    $0xa,%esi
mov    $0x4,%edx
call   1030 <setled@plt>
movzbl -0x5(%rbp),%edi
mov    $0x15,%esi
mov    $0x4,%edx
call   1030 <setled@plt>
mov    $0xa,%edi
mov    $0x4,%edx
movzbl -0x5(%rbp),%esi
call   1030 <setled@plt>
mov    $0x15,%edi
mov    $0x4,%edx
movzbl -0x5(%rbp),%esi
call   1030 <setled@plt>
mov    -0x5(%rbp),%al
add    $0x1,%al
mov    %al,-0x5(%rbp)
jmp    111c <paintgrid+0xc>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<paintgrid>:
push   %rbp
push   %rbx
push   %rax
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nop
mov    %ebx,%edi
mov    $0xa,%esi
mov    $0x4,%edx
call   1030 <setled@plt>
mov    %ebx,%edi
mov    $0x15,%esi
mov    $0x4,%edx
call   1030 <setled@plt>
movzbl %bl,%ebp
mov    $0xa,%edi
mov    %ebp,%esi
mov    $0x4,%edx
call   1030 <setled@plt>
mov    $0x15,%edi
mov    %ebp,%esi
mov    $0x4,%edx
call   1030 <setled@plt>
add    $0x1,%ebx
cmp    $0x20,%ebx
jne    1120 <paintgrid+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @paintgrid() {
%1 = alloca i32
%2 = alloca i8
store i8 0, i8* %2
br label %3
3: ; preds = %18, %0
%4 = load i8, i8* %2
%5 = zext i8 %4 to i32
%6 = icmp slt i32 %5, 32
br i1 %6, label %7, label %21
7: ; preds = %3
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = call i32 @setled(i32 %9, i8 zeroext 10, i32 4)
%11 = load i8, i8* %2
%12 = zext i8 %11 to i32
%13 = call i32 @setled(i32 %12, i8 zeroext 21, i32 4)
%14 = load i8, i8* %2
%15 = call i32 @setled(i32 10, i8 zeroext %14, i32 4)
%16 = load i8, i8* %2
%17 = call i32 @setled(i32 21, i8 zeroext %16, i32 4)
br label %18
18: ; preds = %7
%19 = load i8, i8* %2
%20 = add i8 %19, 1
store i8 %20, i8* %2
br label %3
21: ; preds = %3
%22 = load i32, i32* %1
ret i32 %22
}

LLVM IR (-O2):
define i32 @paintgrid() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %8, %1 ]
%3 = tail call i32 @setled(i32 %2, i8 zeroext 10, i32 4)
%4 = tail call i32 @setled(i32 %2, i8 zeroext 21, i32 4)
%5 = trunc i32 %2 to i8
%6 = tail call i32 @setled(i32 10, i8 zeroext %5, i32 4)
%7 = tail call i32 @setled(i32 21, i8 zeroext %5, i32 4)
%8 = add nuw nsw i32 %2, 1
%9 = icmp eq i32 %8, 32
br i1 %9, label %10, label %1
10: ; preds = %1
ret i32 undef
}
void PDMQueueRCPtr(void) {}


x86 assembly (clang, -O0):
<PDMQueueRCPtr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PDMQueueRCPtr>:
ret

LLVM IR (-O0):
define void @PDMQueueRCPtr() {
ret void
}

LLVM IR (-O2):
define void @PDMQueueRCPtr() {
ret void
}
/* Variables and functions */
void *thread_function(void *arg __attribute__((unused))) { return NULL; }


x86 assembly (clang, -O0):
<thread_function>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread_function>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @thread_function(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @thread_function(i8* nocapture readnone %0) {
ret i8* null
}
void __attribute__((always_)) domem(void *dest, const void *src, int len) {
  __builtin_memmove(dest, src, len);
}


x86 assembly (clang, -O0):
<domem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movslq -0x14(%rbp),%rdx
call   1030 <memmove@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<domem>:
movslq %edx,%rdx
jmp    1030 <memmove@plt>

LLVM IR (-O0):
define void @domem(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = sext i32 %9 to i64
ret void
}

LLVM IR (-O2):
define void @domem(i8* nocapture writeonly %0, i8* nocapture %1, i32 %2) {
%4 = sext i32 %2 to i64
tail call void @llvm.memmove.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 %4, i1 false)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ send(int, void *, size_t, int /*<<< orphan*/);
ssize_t mywrite_swift_store(int fd, void *buf, size_t len) {
  return send(fd, buf, len, 0);
}


x86 assembly (clang, -O0):
<mywrite_swift_store>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
call   1030 <send@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mywrite_swift_store>:
xor    %ecx,%ecx
jmp    1030 <send@plt>

LLVM IR (-O0):
define i32 @mywrite_swift_store(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @send(i32 %7, i8* %8, i64 %9, i32 0)
ret i32 %10
}

LLVM IR (-O2):
define i32 @mywrite_swift_store(i32 %0, i8* %1, i64 %2) {
%4 = tail call i32 @send(i32 %0, i8* %1, i64 %2, i32 0)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ pthread_exit(int /*<<< orphan*/ *);
void *print_hello_world(void *tid) {
  printf("Hello world, greetings from thread %d\n", *(int *)tid);
  pthread_exit(NULL);
  return NULL;
}


x86 assembly (clang, -O0):
<print_hello_world>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
lea    0xec7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
mov    %eax,%edi
call   1040 <pthread_exit@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_hello_world>:
push   %rax
mov    (%rdi),%esi
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <pthread_exit@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [39 x i8] c"Hello world, greetings from thread %d\0A\00"
define i8* @print_hello_world(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
%6 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = call i32 @pthread_exit(i32* null)
ret i8* null
}

LLVM IR (-O2):
@.str = [39 x i8] c"Hello world, greetings from thread %d\0A\00"
define noalias i8* @print_hello_world(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = tail call i32 @pthread_exit(i32* null)
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ func(int, int, int, int);
int main() {
  func(1, 2, 3, 4);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
mov    $0x4,%ecx
call   1030 <func@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
mov    $0x4,%ecx
call   1030 <func@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @func(i32 1, i32 2, i32 3, i32 4)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @func(i32 1, i32 2, i32 3, i32 4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ SYS_exit;
int /*<<< orphan*/ syscall_1(int /*<<< orphan*/, int);
void exit(int status) { syscall_1(SYS_exit, status); }


x86 assembly (clang, -O0):
<exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
call   1030 <syscall_1@plt>

x86 assembly (clang, -O2):
<exit>:
push   %rax
mov    %edi,%esi
mov    0x2ece(%rip),%rax
mov    (%rax),%edi
call   1030 <syscall_1@plt>

LLVM IR (-O0):
@SYS_exit = global i32 0
define void @exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @SYS_exit
%4 = load i32, i32* %2
%5 = call i32 @syscall_1(i32 %3, i32 %4)
unreachable
}

LLVM IR (-O2):
@SYS_exit = global i32 0
define void @exit(i32 %0) {
%2 = load i32, i32* @SYS_exit
%3 = tail call i32 @syscall_1(i32 %2, i32 %0)
unreachable
}
void *ft_memset(void *s, int c, unsigned long n) {
  unsigned long i;
  i = 0;
  while (i < n)
    ((char *)s)[i++] = c;
  return (s);
}


x86 assembly (clang, -O0):
<ft_memset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1145 <ft_memset+0x45>
mov    -0xc(%rbp),%eax
mov    %al,%dl
mov    -0x8(%rbp),%rax
mov    -0x20(%rbp),%rcx
mov    %rcx,%rsi
add    $0x1,%rsi
mov    %rsi,-0x20(%rbp)
mov    %dl,(%rax,%rcx,1)
jmp    1117 <ft_memset+0x17>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_memset>:
push   %rbx
mov    %rdi,%rbx
test   %rdx,%rdx
je     1121 <ft_memset+0x11>
mov    %rbx,%rdi
call   1030 <memset@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @ft_memset(i8* %0, i32 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
store i64 0, i64* %7
br label %8
8: ; preds = %12, %3
%9 = load i64, i64* %7
%10 = load i64, i64* %6
%11 = icmp ult i64 %9, %10
br i1 %11, label %12, label %19
12: ; preds = %8
%13 = load i32, i32* %5
%14 = trunc i32 %13 to i8
%15 = load i8*, i8** %4
%16 = load i64, i64* %7
%17 = add i64 %16, 1
store i64 %17, i64* %7
%18 = getelementptr inbounds i8, i8* %15, i64 %16
store i8 %14, i8* %18
br label %8
19: ; preds = %8
%20 = load i8*, i8** %4
ret i8* %20
}

LLVM IR (-O2):
define i8* @ft_memset(i8* returned writeonly %0, i32 %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = trunc i32 %1 to i8
br label %7
7: ; preds = %5, %3
ret i8* %0
}