int is_direction(c, d)
int c;
int *d;
{
  switch (c) {
  case 'h':
    *d = 6;
    break;
  case 'j':
    *d = 4;
    break;
  case 'k':
    *d = 0;
    break;
  case 'l':
    *d = 2;
    break;
  case 'b':
    *d = 5;
    break;
  case 'y':
    *d = 7;
    break;
  case 'u':
    *d = 1;
    break;
  case 'n':
    *d = 3;
    break;
  case '\033':
    break;
  default:
    return (0);
  }
  return (1);
}


x86 assembly (clang, -O0):
<is_direction>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
sub    $0x1b,%eax
je     121f <is_direction+0x11f>
jmp    111f <is_direction+0x1f>
mov    -0x14(%rbp),%eax
sub    $0x62,%eax
je     11e3 <is_direction+0xe3>
jmp    1130 <is_direction+0x30>
mov    -0x14(%rbp),%eax
sub    $0x68,%eax
je     11a7 <is_direction+0xa7>
jmp    1141 <is_direction+0x41>
mov    -0x14(%rbp),%eax
sub    $0x6a,%eax
je     11b6 <is_direction+0xb6>
jmp    1152 <is_direction+0x52>
mov    -0x14(%rbp),%eax
sub    $0x6b,%eax
je     11c5 <is_direction+0xc5>
jmp    1163 <is_direction+0x63>
mov    -0x14(%rbp),%eax
sub    $0x6c,%eax
je     11d4 <is_direction+0xd4>
jmp    1174 <is_direction+0x74>
mov    -0x14(%rbp),%eax
sub    $0x6e,%eax
je     1210 <is_direction+0x110>
jmp    1185 <is_direction+0x85>
mov    -0x14(%rbp),%eax
sub    $0x75,%eax
je     1201 <is_direction+0x101>
jmp    1196 <is_direction+0x96>
mov    -0x14(%rbp),%eax
sub    $0x79,%eax
je     11f2 <is_direction+0xf2>
jmp    1224 <is_direction+0x124>
mov    -0x10(%rbp),%rax
movl   $0x6,(%rax)
jmp    1230 <is_direction+0x130>
mov    -0x10(%rbp),%rax
movl   $0x4,(%rax)
jmp    1230 <is_direction+0x130>
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
jmp    1230 <is_direction+0x130>
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
jmp    1230 <is_direction+0x130>
mov    -0x10(%rbp),%rax
movl   $0x5,(%rax)
jmp    1230 <is_direction+0x130>
mov    -0x10(%rbp),%rax
movl   $0x7,(%rax)
jmp    1230 <is_direction+0x130>
mov    -0x10(%rbp),%rax
movl   $0x1,(%rax)
jmp    1230 <is_direction+0x130>
mov    -0x10(%rbp),%rax
movl   $0x3,(%rax)
jmp    1230 <is_direction+0x130>
jmp    1230 <is_direction+0x130>
movl   $0x0,-0x4(%rbp)
jmp    1237 <is_direction+0x137>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_direction>:
xor    %eax,%eax
lea    -0x62(%rdi),%edx
cmp    $0x17,%edx
ja     1126 <is_direction+0x26>
mov    $0x6,%ecx
lea    0xeea(%rip),%rdi
movslq (%rdi,%rdx,4),%rdx
add    %rdi,%rdx
jmp    *%rdx
mov    $0x5,%ecx
jmp    1151 <is_direction+0x51>
cmp    $0x1b,%edi
je     1153 <is_direction+0x53>
ret
mov    $0x4,%ecx
jmp    1151 <is_direction+0x51>
xor    %ecx,%ecx
jmp    1151 <is_direction+0x51>
mov    $0x2,%ecx
jmp    1151 <is_direction+0x51>
mov    $0x3,%ecx
jmp    1151 <is_direction+0x51>
mov    $0x1,%ecx
jmp    1151 <is_direction+0x51>
mov    $0x7,%ecx
mov    %ecx,(%rsi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_direction(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
%6 = load i32, i32* %4
switch i32 %6, label %24 [
i32 104, label %7
i32 106, label %9
i32 107, label %11
i32 108, label %13
i32 98, label %15
i32 121, label %17
i32 117, label %19
i32 110, label %21
i32 27, label %23
]
7: ; preds = %2
%8 = load i32*, i32** %5
store i32 6, i32* %8
br label %25
9: ; preds = %2
%10 = load i32*, i32** %5
store i32 4, i32* %10
br label %25
11: ; preds = %2
%12 = load i32*, i32** %5
store i32 0, i32* %12
br label %25
13: ; preds = %2
%14 = load i32*, i32** %5
store i32 2, i32* %14
br label %25
15: ; preds = %2
%16 = load i32*, i32** %5
store i32 5, i32* %16
br label %25
17: ; preds = %2
%18 = load i32*, i32** %5
store i32 7, i32* %18
br label %25
19: ; preds = %2
%20 = load i32*, i32** %5
store i32 1, i32* %20
br label %25
21: ; preds = %2
%22 = load i32*, i32** %5
store i32 3, i32* %22
br label %25
23: ; preds = %2
br label %25
24: ; preds = %2
store i32 0, i32* %3
br label %26
25: ; preds = %23, %21, %19, %17, %15, %13, %11, %9, %7
store i32 1, i32* %3
br label %26
26: ; preds = %25, %24
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @is_direction(i32 %0, i32* nocapture writeonly %1) {
switch i32 %0, label %13 [
i32 104, label %10
i32 106, label %3
i32 107, label %4
i32 108, label %5
i32 98, label %6
i32 121, label %7
i32 117, label %8
i32 110, label %9
i32 27, label %12
]
3: ; preds = %2
br label %10
4: ; preds = %2
br label %10
5: ; preds = %2
br label %10
6: ; preds = %2
br label %10
7: ; preds = %2
br label %10
8: ; preds = %2
br label %10
9: ; preds = %2
br label %10
10: ; preds = %2, %3, %4, %5, %6, %7, %8, %9
%11 = phi i32 [ 3, %9 ], [ 1, %8 ], [ 7, %7 ], [ 5, %6 ], [ 2, %5 ], [ 0, %4 ], [ 4, %3 ], [ 6, %2 ]
store i32 %11, i32* %1
br label %12
12: ; preds = %10, %2
br label %13
13: ; preds = %2, %12
%14 = phi i32 [ 1, %12 ], [ 0, %2 ]
ret i32 %14
}