xunge/DecIR huggingface dataset:
unsigned xrop3_75_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~S;
  stk2 = D | stk3;
  stk1 = T ^ stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_75_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_75_1_1>:
mov    %edi,%eax
shl    $0x8,%eax
mov    %esi,%ecx
shl    $0x8,%ecx
or     %esi,%ecx
mov    %ecx,%edx
xor    %eax,%edx
or     %edi,%eax
or     %ecx,%eax
or     %edx,%eax
not    %eax
or     %edi,%esi
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_75_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %6
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %5
%26 = load i32, i32* %10
%27 = or i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %7
%29 = load i32, i32* %9
%30 = xor i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = load i32, i32* %6
%33 = xor i32 %32, -1
%34 = and i32 %31, %33
%35 = load i32, i32* %7
%36 = xor i32 %35, -1
%37 = and i32 %34, %36
%38 = load i32, i32* %5
%39 = load i32, i32* %6
%40 = and i32 %38, %39
%41 = or i32 %37, %40
%42 = load i32, i32* %5
%43 = load i32, i32* %7
%44 = and i32 %42, %43
%45 = or i32 %41, %44
ret i32 %45
}

LLVM IR (-O2):
define i32 @xrop3_75_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = or i32 %4, %3
%6 = zext i8 %1 to i32
%7 = mul nuw nsw i32 %6, 257
%8 = xor i32 %7, %4
%9 = or i32 %5, %7
%10 = or i32 %9, %8
%11 = xor i32 %10, -1
%12 = or i8 %1, %0
%13 = zext i8 %12 to i32
%14 = or i32 %13, %11
ret i32 %14
}
unsigned setbits(unsigned x, int p, int n, unsigned y) {
  return (x >> (p + 1 - n)) & ~(~0 << n) | ((y >> n) << n);
}


x86 assembly (clang, -O0):
<setbits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
sub    -0xc(%rbp),%ecx
shr    %cl,%eax
mov    -0xc(%rbp),%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
mov    %edx,%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%edx
mov    -0xc(%rbp),%ecx
shr    %cl,%edx
mov    -0xc(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setbits>:
mov    %ecx,%eax
sub    %edx,%esi
lea    0x1(%rsi),%ecx
shr    %cl,%edi
xor    %edi,%eax
mov    %edx,%ecx
shr    %cl,%eax
shl    %cl,%eax
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @setbits(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = add nsw i32 %10, 1
%12 = load i32, i32* %7
%13 = sub nsw i32 %11, %12
%14 = lshr i32 %9, %13
%15 = load i32, i32* %7
%16 = shl i32 -1, %15
%17 = xor i32 %16, -1
%18 = and i32 %14, %17
%19 = load i32, i32* %8
%20 = load i32, i32* %7
%21 = lshr i32 %19, %20
%22 = load i32, i32* %7
%23 = shl i32 %21, %22
%24 = or i32 %18, %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @setbits(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = add nsw i32 %1, 1
%6 = sub i32 %5, %2
%7 = lshr i32 %0, %6
%8 = shl nsw i32 -1, %2
%9 = xor i32 %8, -1
%10 = and i32 %7, %9
%11 = and i32 %8, %3
%12 = or i32 %10, %11
ret i32 %12
}
int pathcon_nm4_work(int *sz_arg, int *sz_res, int *sz_iw, int *sz_w) {
  if (sz_arg)
    *sz_arg = 2;
  if (sz_res)
    *sz_res = 2;
  if (sz_iw)
    *sz_iw = 0;
  if (sz_w)
    *sz_w = 0;
  return 0;
}


x86 assembly (clang, -O0):
<pathcon_nm4_work>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1129 <pathcon_nm4_work+0x29>
mov    -0x8(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x10(%rbp)
je     113e <pathcon_nm4_work+0x3e>
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x18(%rbp)
je     1153 <pathcon_nm4_work+0x53>
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
cmpq   $0x0,-0x20(%rbp)
je     1168 <pathcon_nm4_work+0x68>
mov    -0x20(%rbp),%rax
movl   $0x0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm4_work>:
test   %rdi,%rdi
je     110b <pathcon_nm4_work+0xb>
movl   $0x2,(%rdi)
test   %rsi,%rsi
je     1116 <pathcon_nm4_work+0x16>
movl   $0x2,(%rsi)
test   %rdx,%rdx
je     1121 <pathcon_nm4_work+0x21>
movl   $0x0,(%rdx)
test   %rcx,%rcx
je     112c <pathcon_nm4_work+0x2c>
movl   $0x0,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pathcon_nm4_work(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %11, label %13
11: ; preds = %4
%12 = load i32*, i32** %5
store i32 2, i32* %12
br label %13
13: ; preds = %11, %4
%14 = load i32*, i32** %6
%15 = icmp ne i32* %14, null
br i1 %15, label %16, label %18
16: ; preds = %13
%17 = load i32*, i32** %6
store i32 2, i32* %17
br label %18
18: ; preds = %16, %13
%19 = load i32*, i32** %7
%20 = icmp ne i32* %19, null
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = load i32*, i32** %7
store i32 0, i32* %22
br label %23
23: ; preds = %21, %18
%24 = load i32*, i32** %8
%25 = icmp ne i32* %24, null
br i1 %25, label %26, label %28
26: ; preds = %23
%27 = load i32*, i32** %8
store i32 0, i32* %27
br label %28
28: ; preds = %26, %23
ret i32 0
}

LLVM IR (-O2):
define i32 @pathcon_nm4_work(i32* writeonly %0, i32* writeonly %1, i32* writeonly %2, i32* writeonly %3) {
%5 = icmp eq i32* %0, null
br i1 %5, label %7, label %6
6: ; preds = %4
store i32 2, i32* %0
br label %7
7: ; preds = %6, %4
%8 = icmp eq i32* %1, null
br i1 %8, label %10, label %9
9: ; preds = %7
store i32 2, i32* %1
br label %10
10: ; preds = %9, %7
%11 = icmp eq i32* %2, null
br i1 %11, label %13, label %12
12: ; preds = %10
store i32 0, i32* %2
br label %13
13: ; preds = %12, %10
%14 = icmp eq i32* %3, null
br i1 %14, label %16, label %15
15: ; preds = %13
store i32 0, i32* %3
br label %16
16: ; preds = %15, %13
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sendg(char *);
void laseronFn(char *p1, char *p2, char *p3) { sendg("M42 S255 P12"); }


x86 assembly (clang, -O0):
<laseronFn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    0xed5(%rip),%rdi
call   1030 <sendg@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<laseronFn>:
lea    0xee9(%rip),%rdi
jmp    1030 <sendg@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"M42 S255 P12\00"
define void @laseronFn(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = call i32 @sendg(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"M42 S255 P12\00"
define void @laseronFn(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
%4 = tail call i32 @sendg(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
unsigned int rand();
unsigned char RandChar() {
  unsigned int r = 0;
  do {
    r = rand();
  } while (r > 256);
  return (unsigned char)r;
}


x86 assembly (clang, -O0):
<RandChar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x100,-0x4(%rbp)
ja     111f <RandChar+0xf>
mov    -0x4(%rbp),%eax
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandChar>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <rand@plt>
cmp    $0x100,%eax
ja     1120 <RandChar+0x10>
pop    %rcx
ret

LLVM IR (-O0):
define zeroext i8 @RandChar() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %4, %0
%3 = call i32 (...) @rand()
store i32 %3, i32* %1
br label %4
4: ; preds = %2
%5 = load i32, i32* %1
%6 = icmp ugt i32 %5, 256
br i1 %6, label %2, label %7
7: ; preds = %4
%8 = load i32, i32* %1
%9 = trunc i32 %8 to i8
ret i8 %9
}

LLVM IR (-O2):
define zeroext i8 @RandChar() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @rand()
%3 = icmp ugt i32 %2, 256
br i1 %3, label %1, label %4
4: ; preds = %1
%5 = trunc i32 %2 to i8
ret i8 %5
}
int test_imm_70int64_highword_reg(long long val) {
  return ((val >> 32) & (0x70 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_70int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0x70,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_70int64_highword_reg>:
movabs $0x7000000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_70int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 112
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_70int64_highword_reg(i64 %0) {
%2 = and i64 %0, 481036337152
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int get_timepersec() { return 1000000; }


x86 assembly (clang, -O0):
<get_timepersec>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf4240,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_timepersec>:
mov    $0xf4240,%eax
ret

LLVM IR (-O0):
define i32 @get_timepersec() {
ret i32 1000000
}

LLVM IR (-O2):
define i32 @get_timepersec() {
ret i32 1000000
}
/* Variables and functions */
void *memq_peek(void *, void *, void **);
void *memq_dequeue(void *tail, void **head, void **mem) {
  void *link;
  link = memq_peek(tail, *head, mem);
  *head = *((void **)link);
  return link;
}


x86 assembly (clang, -O0):
<memq_dequeue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memq_peek@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memq_dequeue>:
push   %rbx
mov    %rsi,%rbx
mov    (%rsi),%rsi
call   1030 <memq_peek@plt>
mov    (%rax),%rcx
mov    %rcx,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define i8* @memq_dequeue(i8* %0, i8** %1, i8** %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
%7 = alloca i8*
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i8** %2, i8*** %6
%8 = load i8*, i8** %4
%9 = load i8**, i8*** %5
%10 = load i8*, i8** %9
%11 = load i8**, i8*** %6
%12 = call i8* @memq_peek(i8* %8, i8* %10, i8** %11)
store i8* %12, i8** %7
%13 = load i8*, i8** %7
%14 = bitcast i8* %13 to i8**
%15 = load i8*, i8** %14
%16 = load i8**, i8*** %5
store i8* %15, i8** %16
%17 = load i8*, i8** %7
ret i8* %17
}

LLVM IR (-O2):
define i8* @memq_dequeue(i8* %0, i8** nocapture %1, i8** %2) {
%4 = load i8*, i8** %1
%5 = tail call i8* @memq_peek(i8* %0, i8* %4, i8** %2)
%6 = bitcast i8* %5 to i8**
%7 = load i8*, i8** %6
store i8* %7, i8** %1
ret i8* %5
}
/* Variables and functions */
double CSPL_Array_max(double const *, long const);
double CSPL_Array_min(double const *, long const);
double CSPL_Array_range(const double *inval, const long n) {
  double min, max;
  min = CSPL_Array_min(inval, n);
  max = CSPL_Array_max(inval, n);
  return (max - min);
}


x86 assembly (clang, -O0):
<CSPL_Array_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <CSPL_Array_min@plt>
movsd  %xmm0,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <CSPL_Array_max@plt>
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
subsd  -0x18(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CSPL_Array_range>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <CSPL_Array_min@plt>
movsd  %xmm0,(%rsp)
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <CSPL_Array_max@plt>
subsd  (%rsp),%xmm0
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define double @CSPL_Array_range(double* %0, i64 %1) {
%3 = alloca double*
%4 = alloca i64
%5 = alloca double
%6 = alloca double
store double* %0, double** %3
store i64 %1, i64* %4
%7 = load double*, double** %3
%8 = load i64, i64* %4
%9 = call double @CSPL_Array_min(double* %7, i64 %8)
store double %9, double* %5
%10 = load double*, double** %3
%11 = load i64, i64* %4
%12 = call double @CSPL_Array_max(double* %10, i64 %11)
store double %12, double* %6
%13 = load double, double* %6
%14 = load double, double* %5
%15 = fsub double %13, %14
ret double %15
}

LLVM IR (-O2):
define double @CSPL_Array_range(double* %0, i64 %1) {
%3 = tail call double @CSPL_Array_min(double* %0, i64 %1)
%4 = tail call double @CSPL_Array_max(double* %0, i64 %1)
%5 = fsub double %4, %3
ret double %5
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int);
int main() {
  unsigned int a = 0x12fe34dc;
  if (((unsigned short *)&a)[0] != 0x34dc) {
    _exit(-1);
  }
  if (((unsigned short *)&a)[1] != 0x12fe) {
    _exit(-2);
  }
  _exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x12fe34dc,-0x8(%rbp)
movzwl -0x8(%rbp),%eax
cmp    $0x34dc,%eax
je     113f <main+0x2f>
mov    $0xffffffff,%edi
call   1030 <_exit@plt>
movzwl -0x6(%rbp),%eax
cmp    $0x12fe,%eax
je     1158 <main+0x48>
mov    $0xfffffffe,%edi
call   1030 <_exit@plt>
xor    %edi,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 318649564, i32* %2
%3 = bitcast i32* %2 to i16*
%4 = getelementptr inbounds i16, i16* %3, i64 0
%5 = load i16, i16* %4
%6 = zext i16 %5 to i32
%7 = icmp ne i32 %6, 13532
br i1 %7, label %8, label %10
8: ; preds = %0
%9 = call i32 @_exit(i32 -1)
unreachable
10: ; preds = %0
%11 = bitcast i32* %2 to i16*
%12 = getelementptr inbounds i16, i16* %11, i64 1
%13 = load i16, i16* %12
%14 = zext i16 %13 to i32
%15 = icmp ne i32 %14, 4862
br i1 %15, label %16, label %18
16: ; preds = %10
%17 = call i32 @_exit(i32 -2)
unreachable
18: ; preds = %10
%19 = call i32 @_exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @_exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ print(char *);
main() { print("hi git! i'm back"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <print@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <print@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"hi git! i'm back\00"
define i32 @main() {
%1 = call i32 @print(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [17 x i8] c"hi git! i'm back\00"
define i32 @main() {
%1 = tail call i32 @print(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ft_putnbr(int);
int /*<<< orphan*/ ft_putstr(char *);
void divi(int a, int b) {
  if (b == 0)
    ft_putstr("Stop : division by zero");
  else
    ft_putnbr(a / b);
}


x86 assembly (clang, -O0):
<divi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1149 <divi+0x29>
lea    0xec1(%rip),%rdi
call   1040 <ft_putstr@plt>
jmp    1157 <divi+0x37>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,%edi
call   1030 <ft_putnbr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<divi>:
test   %esi,%esi
je     1130 <divi+0x10>
mov    %edi,%eax
cltd
idiv   %esi
mov    %eax,%edi
jmp    1030 <ft_putnbr@plt>
lea    0xec9(%rip),%rdi
jmp    1040 <ft_putstr@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"Stop : division by zero\00"
define void @divi(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = call i32 @ft_putstr(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
br label %14
9: ; preds = %2
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = sdiv i32 %10, %11
%13 = call i32 @ft_putnbr(i32 %12)
br label %14
14: ; preds = %9, %7
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"Stop : division by zero\00"
define void @divi(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @ft_putstr(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
br label %9
6: ; preds = %2
%7 = sdiv i32 %0, %1
%8 = tail call i32 @ft_putnbr(i32 %7)
br label %9
9: ; preds = %6, %4
ret void
}
/* Variables and functions */
int f1(int);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char **argv) {
  int val = 0;
  printf("before calling f1, val = %d\n", val);
  val = f1(val);
  printf("from f1, val = %d\n", val);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%edi
call   1040 <f1@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <f1@plt>
lea    0xee0(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"before calling f1, val = %d\0A\00"
@.str.1 = [19 x i8] c"from f1, val = %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
%7 = load i32, i32* %6
%8 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = load i32, i32* %6
%10 = call i32 @f1(i32 %9)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.1, i64 0, i64 0), i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [29 x i8] c"before calling f1, val = %d\0A\00"
@.str.1 = [19 x i8] c"from f1, val = %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 0)
%4 = tail call i32 @f1(i32 0)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret i32 0
}
int board_universal_ss222ap_add_platdata_gpio_i2c(int index,
                                                  void *platform_data) {
  return 0;
}


x86 assembly (clang, -O0):
<board_universal_ss222ap_add_platdata_gpio_i2c>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<board_universal_ss222ap_add_platdata_gpio_i2c>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @board_universal_ss222ap_add_platdata_gpio_i2c(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @board_universal_ss222ap_add_platdata_gpio_i2c(i32 %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int cos(double);
double exp(int);
double test_func_1(double x) { return 4 * cos(x) - exp(2 * x); }


x86 assembly (clang, -O0):
<test_func_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <cos@plt>
shl    $0x2,%eax
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xeb5(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
cvttsd2si %xmm0,%edi
call   1030 <exp@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
subsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_func_1>:
sub    $0x18,%rsp
movsd  %xmm0,0x8(%rsp)
call   1040 <cos@plt>
shl    $0x2,%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
movsd  %xmm0,0x10(%rsp)
movsd  0x8(%rsp),%xmm0
addsd  %xmm0,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <exp@plt>
movsd  0x10(%rsp),%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @test_func_1(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @cos(double %3)
%5 = mul nsw i32 4, %4
%6 = sitofp i32 %5 to double
%7 = load double, double* %2
%8 = fmul double 2.000000e+00, %7
%9 = fptosi double %8 to i32
%10 = call double @exp(i32 %9)
%11 = fsub double %6, %10
ret double %11
}

LLVM IR (-O2):
define double @test_func_1(double %0) {
%2 = tail call i32 @cos(double %0)
%3 = shl nsw i32 %2, 2
%4 = sitofp i32 %3 to double
%5 = fmul double %0, 2.000000e+00
%6 = fptosi double %5 to i32
%7 = tail call double @exp(i32 %6)
%8 = fsub double %4, %7
ret double %8
}
double getBW_matchl32(double eff, unsigned tbsize) {
  if (eff == 0)
    return 0;
  double intercept = 119.2547;
  double W = 74.8634;
  double T = -1.4558;
  return intercept + W * eff + T * tbsize;
}


x86 assembly (clang, -O0):
<getBW_matchl32>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
mov    %edi,-0x14(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    1131 <getBW_matchl32+0x31>
jp     1131 <getBW_matchl32+0x31>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    118c <getBW_matchl32+0x8c>
movabs $0x405dd04d013a92a3,%rax
d0 5d 40
mov    %rax,-0x20(%rbp)
movabs $0x4052b741f212d773,%rax
b7 52 40
mov    %rax,-0x28(%rbp)
movabs $0xbff74af4f0d844d0,%rax
4a f7 bf
mov    %rax,-0x30(%rbp)
movsd  -0x20(%rbp),%xmm0
movsd  -0x28(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm2
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
movsd  -0x30(%rbp),%xmm0
mov    -0x14(%rbp),%eax
cvtsi2sd %rax,%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<getBW_matchl32>:
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    1111 <getBW_matchl32+0x11>
jp     1111 <getBW_matchl32+0x11>
xorpd  %xmm0,%xmm0
ret
mulsd  0xee7(%rip),%xmm0
addsd  0xee7(%rip),%xmm0
mov    %edi,%eax
xorps  %xmm1,%xmm1
cvtsi2sd %rax,%xmm1
mulsd  0xedd(%rip),%xmm1
addsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @getBW_matchl32(double %0, i32 %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca i32
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %4
store i32 %1, i32* %5
%9 = load double, double* %4
%10 = fcmp oeq double %9, 0.000000e+00
br i1 %10, label %11, label %12
11: ; preds = %2
store double 0.000000e+00, double* %3
br label %21
12: ; preds = %2
store double 0x405DD04D013A92A3, double* %6
store double 0x4052B741F212D773, double* %7
store double -1.455800e+00, double* %8
%13 = load double, double* %6
%14 = load double, double* %7
%15 = load double, double* %4
%16 = call double @llvm.fmuladd.f64(double %14, double %15, double %13)
%17 = load double, double* %8
%18 = load i32, i32* %5
%19 = uitofp i32 %18 to double
%20 = call double @llvm.fmuladd.f64(double %17, double %19, double %16)
store double %20, double* %3
br label %21
21: ; preds = %12, %11
%22 = load double, double* %3
ret double %22
}

LLVM IR (-O2):
define double @getBW_matchl32(double %0, i32 %1) {
%3 = fcmp oeq double %0, 0.000000e+00
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = tail call double @llvm.fmuladd.f64(double %0, double 0x4052B741F212D773, double 0x405DD04D013A92A3)
%6 = uitofp i32 %1 to double
%7 = tail call double @llvm.fmuladd.f64(double %6, double -1.455800e+00, double %5)
br label %8
8: ; preds = %2, %4
%9 = phi double [ %7, %4 ], [ 0.000000e+00, %2 ]
ret double %9
}
int ispunct(int c) {
  if ((c >= 33) && (c <= 47)) {
    return (1);
  } else if ((c >= 58) && (c <= 64)) {
    return (1);
  } else if ((c >= 91) && (c <= 96)) {
    return (1);
  } else if ((c >= 123) && (c <= 126)) {
    return (1);
  }
  return (0);
}


x86 assembly (clang, -O0):
<ispunct>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x21,-0x8(%rbp)
jl     1127 <ispunct+0x27>
cmpl   $0x2f,-0x8(%rbp)
jg     1127 <ispunct+0x27>
movl   $0x1,-0x4(%rbp)
jmp    119d <ispunct+0x9d>
cmpl   $0x3a,-0x8(%rbp)
jl     1147 <ispunct+0x47>
cmpl   $0x40,-0x8(%rbp)
jg     1147 <ispunct+0x47>
movl   $0x1,-0x4(%rbp)
jmp    119d <ispunct+0x9d>
cmpl   $0x5b,-0x8(%rbp)
jl     1167 <ispunct+0x67>
cmpl   $0x60,-0x8(%rbp)
jg     1167 <ispunct+0x67>
movl   $0x1,-0x4(%rbp)
jmp    119d <ispunct+0x9d>
cmpl   $0x7b,-0x8(%rbp)
jl     1187 <ispunct+0x87>
cmpl   $0x7e,-0x8(%rbp)
jg     1187 <ispunct+0x87>
movl   $0x1,-0x4(%rbp)
jmp    119d <ispunct+0x9d>
jmp    118c <ispunct+0x8c>
jmp    1191 <ispunct+0x91>
jmp    1196 <ispunct+0x96>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ispunct>:
movd   %edi,%xmm0
pshufd $0x0,%xmm0,%xmm0
paddd  0xeef(%rip),%xmm0
pxor   0xef7(%rip),%xmm0
movdqa 0xeff(%rip),%xmm1
pcmpgtd %xmm0,%xmm1
movmskps %xmm1,%ecx
xor    %eax,%eax
test   %ecx,%ecx
setne  %al
ret

LLVM IR (-O0):
define i32 @ispunct(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 33
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 47
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %2
br label %35
10: ; preds = %6, %1
%11 = load i32, i32* %3
%12 = icmp sge i32 %11, 58
br i1 %12, label %13, label %17
13: ; preds = %10
%14 = load i32, i32* %3
%15 = icmp sle i32 %14, 64
br i1 %15, label %16, label %17
16: ; preds = %13
store i32 1, i32* %2
br label %35
17: ; preds = %13, %10
%18 = load i32, i32* %3
%19 = icmp sge i32 %18, 91
br i1 %19, label %20, label %24
20: ; preds = %17
%21 = load i32, i32* %3
%22 = icmp sle i32 %21, 96
br i1 %22, label %23, label %24
23: ; preds = %20
store i32 1, i32* %2
br label %35
24: ; preds = %20, %17
%25 = load i32, i32* %3
%26 = icmp sge i32 %25, 123
br i1 %26, label %27, label %31
27: ; preds = %24
%28 = load i32, i32* %3
%29 = icmp sle i32 %28, 126
br i1 %29, label %30, label %31
30: ; preds = %27
store i32 1, i32* %2
br label %35
31: ; preds = %27, %24
br label %32
32: ; preds = %31
br label %33
33: ; preds = %32
br label %34
34: ; preds = %33
store i32 0, i32* %2
br label %35
35: ; preds = %34, %30, %23, %16, %9
%36 = load i32, i32* %2
ret i32 %36
}

LLVM IR (-O2):
define i32 @ispunct(i32 %0) {
%2 = insertelement <4 x i32> poison, i32 %0, i64 0
%3 = shufflevector <4 x i32> %2, <4 x i32> poison, <4 x i32> zeroinitializer
%4 = add <4 x i32> %3, <i32 -123, i32 -91, i32 -33, i32 -58>
%5 = icmp ult <4 x i32> %4, <i32 4, i32 6, i32 15, i32 7>
%6 = bitcast <4 x i1> %5 to i4
%7 = icmp ne i4 %6, 0
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ list1(int);
int pair(int, int /*<<< orphan*/);
int list2(int a, int b) { return pair(a, list1(b)); }


x86 assembly (clang, -O0):
<list2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <list1@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%esi
call   1040 <pair@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list2>:
push   %rbx
mov    %edi,%ebx
mov    %esi,%edi
call   1030 <list1@plt>
mov    %ebx,%edi
mov    %eax,%esi
pop    %rbx
jmp    1040 <pair@plt>

LLVM IR (-O0):
define i32 @list2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @list1(i32 %6)
%8 = call i32 @pair(i32 %5, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @list2(i32 %0, i32 %1) {
%3 = tail call i32 @list1(i32 %1)
%4 = tail call i32 @pair(i32 %0, i32 %3)
ret i32 %4
}
void i2d_ASN1_OBJECT(void) {}


x86 assembly (clang, -O0):
<i2d_ASN1_OBJECT>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_ASN1_OBJECT>:
ret

LLVM IR (-O0):
define void @i2d_ASN1_OBJECT() {
ret void
}

LLVM IR (-O2):
define void @i2d_ASN1_OBJECT() {
ret void
}
unsigned int *s_to_u_return(signed int *sp) { return sp; }


x86 assembly (clang, -O0):
<s_to_u_return>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_to_u_return>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i32* @s_to_u_return(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
ret i32* %3
}

LLVM IR (-O2):
define i32* @s_to_u_return(i32* readnone returned %0) {
ret i32* %0
}
/* Variables and functions */
int /*<<< orphan*/ OAL_CREATE_SEMAPHORE();
int /*<<< orphan*/ bbm_write(void *, int, int);
int fc8150_i2c_init(void *hDevice, unsigned short param1,
                    unsigned short param2) {
  OAL_CREATE_SEMAPHORE();
  bbm_write(hDevice, 0x0010, 0x04);
  bbm_write(hDevice, 0x0014, 0x80);
  bbm_write(hDevice, 0x0011, 0x02);
  bbm_write(hDevice, 0x0013, 0x84);
  return 0;
}


x86 assembly (clang, -O0):
<fc8150_i2c_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dx,%ax
mov    %si,%cx
mov    %rdi,-0x8(%rbp)
mov    %cx,-0xa(%rbp)
mov    %ax,-0xc(%rbp)
mov    $0x0,%al
call   1040 <OAL_CREATE_SEMAPHORE@plt>
mov    -0x8(%rbp),%rdi
mov    $0x10,%esi
mov    $0x4,%edx
call   1030 <bbm_write@plt>
mov    -0x8(%rbp),%rdi
mov    $0x14,%esi
mov    $0x80,%edx
call   1030 <bbm_write@plt>
mov    -0x8(%rbp),%rdi
mov    $0x11,%esi
mov    $0x2,%edx
call   1030 <bbm_write@plt>
mov    -0x8(%rbp),%rdi
mov    $0x13,%esi
mov    $0x84,%edx
call   1030 <bbm_write@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc8150_i2c_init>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <OAL_CREATE_SEMAPHORE@plt>
mov    %rbx,%rdi
mov    $0x10,%esi
mov    $0x4,%edx
call   1030 <bbm_write@plt>
mov    %rbx,%rdi
mov    $0x14,%esi
mov    $0x80,%edx
call   1030 <bbm_write@plt>
mov    %rbx,%rdi
mov    $0x11,%esi
mov    $0x2,%edx
call   1030 <bbm_write@plt>
mov    %rbx,%rdi
mov    $0x13,%esi
mov    $0x84,%edx
call   1030 <bbm_write@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @fc8150_i2c_init(i8* %0, i16 zeroext %1, i16 zeroext %2) {
%4 = alloca i8*
%5 = alloca i16
%6 = alloca i16
store i8* %0, i8** %4
store i16 %1, i16* %5
store i16 %2, i16* %6
%7 = call i32 (...) @OAL_CREATE_SEMAPHORE()
%8 = load i8*, i8** %4
%9 = call i32 @bbm_write(i8* %8, i32 16, i32 4)
%10 = load i8*, i8** %4
%11 = call i32 @bbm_write(i8* %10, i32 20, i32 128)
%12 = load i8*, i8** %4
%13 = call i32 @bbm_write(i8* %12, i32 17, i32 2)
%14 = load i8*, i8** %4
%15 = call i32 @bbm_write(i8* %14, i32 19, i32 132)
ret i32 0
}

LLVM IR (-O2):
define i32 @fc8150_i2c_init(i8* %0, i16 zeroext %1, i16 zeroext %2) {
%4 = tail call i32 (...) @OAL_CREATE_SEMAPHORE()
%5 = tail call i32 @bbm_write(i8* %0, i32 16, i32 4)
%6 = tail call i32 @bbm_write(i8* %0, i32 20, i32 128)
%7 = tail call i32 @bbm_write(i8* %0, i32 17, i32 2)
%8 = tail call i32 @bbm_write(i8* %0, i32 19, i32 132)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ convert_scale_ps_si16(short *, float *, float, int);
void convert_float_short(short *out, float *in, float scale, int len) {
  convert_scale_ps_si16(out, in, scale, len);
}


x86 assembly (clang, -O0):
<convert_float_short>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movss  -0x14(%rbp),%xmm0
mov    -0x18(%rbp),%edx
call   1030 <convert_scale_ps_si16@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<convert_float_short>:
jmp    1030 <convert_scale_ps_si16@plt>

LLVM IR (-O0):
define void @convert_float_short(i16* %0, float* %1, float %2, i32 %3) {
%5 = alloca i16*
%6 = alloca float*
%7 = alloca float
%8 = alloca i32
store i16* %0, i16** %5
store float* %1, float** %6
store float %2, float* %7
store i32 %3, i32* %8
%9 = load i16*, i16** %5
%10 = load float*, float** %6
%11 = load float, float* %7
%12 = load i32, i32* %8
%13 = call i32 @convert_scale_ps_si16(i16* %9, float* %10, float %11, i32 %12)
ret void
}

LLVM IR (-O2):
define void @convert_float_short(i16* %0, float* %1, float %2, i32 %3) {
%5 = tail call i32 @convert_scale_ps_si16(i16* %0, float* %1, float %2, i32 %3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
int /*<<< orphan*/ sprintf(char *, char *, double, int, long);
int write_burst_results(FILE *log_file, int lost_packages, double bandwidth,
                        long int npackages_corrupted) {
  char buffer[3000];
  sprintf(buffer, "BURST %lf %lu %lu \n", bandwidth, lost_packages,
          npackages_corrupted);
  fprintf(log_file, buffer);
  return 0;
}


x86 assembly (clang, -O0):
<write_burst_results>:
push   %rbp
mov    %rsp,%rbp
sub    $0xbe0,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movsd  %xmm0,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
lea    -0xbe0(%rbp),%rdi
movsd  -0x18(%rbp),%xmm0
mov    -0xc(%rbp),%edx
mov    -0x20(%rbp),%rcx
lea    0xeab(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x8(%rbp),%rdi
lea    -0xbe0(%rbp),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0xbe0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_burst_results>:
push   %r14
push   %rbx
sub    $0xbb8,%rsp
mov    %rdx,%rcx
mov    %esi,%edx
mov    %rdi,%rbx
lea    0xec7(%rip),%rsi
mov    %rsp,%r14
mov    %r14,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0xbb8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [20 x i8] c"BURST %lf %lu %lu \0A\00"
define i32 @write_burst_results(i32* %0, i32 %1, double %2, i64 %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca double
%8 = alloca i64
%9 = alloca [3000 x i8]
store i32* %0, i32** %5
store i32 %1, i32* %6
store double %2, double* %7
store i64 %3, i64* %8
%10 = getelementptr inbounds [3000 x i8], [3000 x i8]* %9, i64 0, i64 0
%11 = load double, double* %7
%12 = load i32, i32* %6
%13 = load i64, i64* %8
%14 = call i32 @sprintf(i8* %10, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), double %11, i32 %12, i64 %13)
%15 = load i32*, i32** %5
%16 = getelementptr inbounds [3000 x i8], [3000 x i8]* %9, i64 0, i64 0
%17 = call i32 @fprintf(i32* %15, i8* %16)
ret i32 0
}

LLVM IR (-O2):
@.str = [20 x i8] c"BURST %lf %lu %lu \0A\00"
define i32 @write_burst_results(i32* nocapture %0, i32 %1, double %2, i64 %3) {
%5 = alloca [3000 x i8]
%6 = getelementptr inbounds [3000 x i8], [3000 x i8]* %5, i64 0, i64 0
%7 = call i32 @sprintf(i8* %6, i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), double %2, i32 %1, i64 %3)
%8 = call i32 @fprintf(i32* %0, i8* %6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void error(char *msg) {
  printf(msg);
  exit(1);
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<error>:
push   %rax
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @error(i8* nocapture %0) {
%2 = tail call i32 @printf(i8* dereferenceable(1) %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
int cmp(const void *a, const void *b) { return *(int *)b > *(int *)a ? 1 : -1; }


x86 assembly (clang, -O0):
<cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%edx
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
mov    $0xffffffff,%eax
mov    $0x1,%ecx
cmp    %esi,%edx
cmovg  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp>:
mov    (%rsi),%eax
xor    %ecx,%ecx
cmp    (%rdi),%eax
setg   %cl
lea    (%rcx,%rcx,1),%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %3
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = icmp sgt i32 %7, %10
%12 = zext i1 %11 to i64
%13 = select i1 %11, i32 1, i32 -1
ret i32 %13
}

LLVM IR (-O2):
define i32 @cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %1 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %0 to i32*
%6 = load i32, i32* %5
%7 = icmp sgt i32 %4, %6
%8 = select i1 %7, i32 1, i32 -1
ret i32 %8
}
__float128 from_double_load(double *a) { return (__float128)*a; }


x86 assembly (clang, -O0):
<from_double_load>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
call   1120 <__extenddftf2>
add    $0x10,%rsp
pop    %rbp
ret
nop

x86 assembly (clang, -O2):
<from_double_load>:
movsd  (%rdi),%xmm0
jmp    1110 <__extenddftf2>
nopl   0x0(%rax)

LLVM IR (-O0):
define fp128 @from_double_load(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = load double, double* %3
%5 = fpext double %4 to fp128
ret fp128 %5
}

LLVM IR (-O2):
define fp128 @from_double_load(double* nocapture %0) {
%2 = load double, double* %0
%3 = fpext double %2 to fp128
ret fp128 %3
}
/* Variables and functions */
int /*<<< orphan*/ refresh_channel_text();
void tail_command() { refresh_channel_text(); }


x86 assembly (clang, -O0):
<tail_command>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <refresh_channel_text@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tail_command>:
xor    %eax,%eax
jmp    1030 <refresh_channel_text@plt>

LLVM IR (-O0):
define void @tail_command() {
%1 = call i32 (...) @refresh_channel_text()
ret void
}

LLVM IR (-O2):
define void @tail_command() {
%1 = tail call i32 (...) @refresh_channel_text()
ret void
}
/* Type definitions */
struct _stor_lookup_create_req {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct _stor_lookup_create_req *);
void stor_lookup_create_req_free(struct _stor_lookup_create_req *ptr) {
  free(ptr);
}


x86 assembly (clang, -O0):
<stor_lookup_create_req_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stor_lookup_create_req_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct._stor_lookup_create_req = type { i32 }
define void @stor_lookup_create_req_free(%struct._stor_lookup_create_req* %0) {
%2 = alloca %struct._stor_lookup_create_req*
store %struct._stor_lookup_create_req* %0, %struct._stor_lookup_create_req** %2
%3 = load %struct._stor_lookup_create_req*, %struct._stor_lookup_create_req** %2
%4 = call i32 @free(%struct._stor_lookup_create_req* %3)
ret void
}

LLVM IR (-O2):
%struct._stor_lookup_create_req = type { i32 }
define void @stor_lookup_create_req_free(%struct._stor_lookup_create_req* nocapture %0) {
%2 = tail call i32 @free(%struct._stor_lookup_create_req* %0)
ret void
}
unsigned xrop3_248_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D & S;
  stk1 = T | stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_248_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_248_1_1>:
mov    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_248_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %6
%24 = and i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %7
%26 = load i32, i32* %9
%27 = or i32 %25, %26
store i32 %27, i32* %8
%28 = load i32, i32* %8
%29 = load i32, i32* %6
%30 = xor i32 %29, -1
%31 = and i32 %28, %30
%32 = load i32, i32* %7
%33 = xor i32 %32, -1
%34 = and i32 %31, %33
%35 = load i32, i32* %5
%36 = load i32, i32* %6
%37 = and i32 %35, %36
%38 = or i32 %34, %37
%39 = load i32, i32* %5
%40 = load i32, i32* %7
%41 = and i32 %39, %40
%42 = or i32 %38, %41
ret i32 %42
}

LLVM IR (-O2):
define i32 @xrop3_248_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = or i8 %1, %0
%4 = zext i8 %3 to i32
ret i32 %4
}
unsigned short int f38(unsigned short int x, long int y) {
  return (x >> y) | (x << (8 * 2 - y));
}


x86 assembly (clang, -O0):
<f38>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
movzwl -0x2(%rbp),%eax
mov    -0x10(%rbp),%rcx
sar    %cl,%eax
movzwl -0x2(%rbp),%edx
mov    $0x10,%ecx
sub    -0x10(%rbp),%rcx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f38>:
mov    %rsi,%rcx
mov    %edi,%eax
ror    %cl,%ax
ret

LLVM IR (-O0):
define zeroext i16 @f38(i16 zeroext %0, i64 %1) {
%3 = alloca i16
%4 = alloca i64
store i16 %0, i16* %3
store i64 %1, i64* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = load i64, i64* %4
%8 = trunc i64 %7 to i32
%9 = ashr i32 %6, %8
%10 = load i16, i16* %3
%11 = zext i16 %10 to i32
%12 = load i64, i64* %4
%13 = sub nsw i64 16, %12
%14 = trunc i64 %13 to i32
%15 = shl i32 %11, %14
%16 = or i32 %9, %15
%17 = trunc i32 %16 to i16
ret i16 %17
}

LLVM IR (-O2):
define zeroext i16 @f38(i16 zeroext %0, i64 %1) {
%3 = trunc i64 %1 to i16
%4 = tail call i16 @llvm.fshr.i16(i16 %0, i16 %0, i16 %3)
ret i16 %4
}
/* Variables and functions */
int a_to_i(char *);
int /*<<< orphan*/ printf(char *, int);
int main() {
  char *x = "123404300";
  int n = a_to_i(x);
  printf("%d\n", n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <a_to_i@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <a_to_i@plt>
lea    0xed6(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"123404300\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i32
store i32 0, i32* %1
store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @a_to_i(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"123404300\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @a_to_i(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
size_t dcs_size_max(size_t a, size_t b) { return a > b ? a : b; }


x86 assembly (clang, -O0):
<dcs_size_max>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jbe    1127 <dcs_size_max+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <dcs_size_max+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dcs_size_max>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmova  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @dcs_size_max(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp ugt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @dcs_size_max(i64 %0, i64 %1) {
%3 = icmp ugt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}