xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ foo(int /*<<< orphan*/);
__attribute__((no, noclone)) unsigned long f18(unsigned long x,
                                               unsigned long y) {
  unsigned long r = x + y;
  if (r < y)
    foo(0);
  return r;
}


x86 assembly (clang, -O0):
<f18>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1141 <f18+0x31>
xor    %edi,%edi
call   1030 <foo@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f18>:
push   %rbx
mov    %rdi,%rbx
add    %rsi,%rbx
jae    1120 <f18+0x10>
xor    %edi,%edi
call   1030 <foo@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @f18(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = add i64 %6, %7
store i64 %8, i64* %5
%9 = load i64, i64* %5
%10 = load i64, i64* %4
%11 = icmp ult i64 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = call i32 @foo(i32 0)
br label %14
14: ; preds = %12, %2
%15 = load i64, i64* %5
ret i64 %15
}

LLVM IR (-O2):
define i64 @f18(i64 %0, i64 %1) {
%3 = add i64 %1, %0
%4 = icmp ult i64 %3, %1
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @foo(i32 0)
br label %7
7: ; preds = %5, %2
ret i64 %3
}
/* Variables and functions */
int foo1(int);
int foo2(int a) { return foo1(a + 2); }


x86 assembly (clang, -O0):
<foo2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
add    $0x2,%edi
call   1030 <foo1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo2>:
add    $0x2,%edi
jmp    1030 <foo1@plt>

LLVM IR (-O0):
define i32 @foo2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 2
%5 = call i32 @foo1(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @foo2(i32 %0) {
%2 = add nsw i32 %0, 2
%3 = tail call i32 @foo1(i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ test1();
int main(__attribute__((unused)) int argc,
         __attribute__((unused)) char *argv[]) {
  test1();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <test1@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test1@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @test1()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @test1()
ret i32 0
}
/* Variables and functions */
int get8(unsigned char **);
int /*<<< orphan*/ printf(char *, int, int);
void readIPvHeaderLen(unsigned char **head) {
  int temp = get8(head);
  printf("Version: %d\tHeader length: %d bytes", temp >> 4, (temp & 0xf) * 4);
}


x86 assembly (clang, -O0):
<readIPvHeaderLen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <get8@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
sar    $0x4,%esi
mov    -0xc(%rbp),%edx
and    $0xf,%edx
shl    $0x2,%edx
lea    0xeb2(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readIPvHeaderLen>:
push   %rax
call   1030 <get8@plt>
lea    0x0(,%rax,4),%edx
mov    %eax,%esi
sar    $0x4,%esi
and    $0x3c,%edx
lea    0xec4(%rip),%rdi
pop    %rax
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"Version: %d\09Header length: %d bytes\00"
define void @readIPvHeaderLen(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = call i32 @get8(i8** %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = ashr i32 %6, 4
%8 = load i32, i32* %3
%9 = and i32 %8, 15
%10 = mul nsw i32 %9, 4
%11 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %10)
ret void
}

LLVM IR (-O2):
@.str = [36 x i8] c"Version: %d\09Header length: %d bytes\00"
define void @readIPvHeaderLen(i8** %0) {
%2 = tail call i32 @get8(i8** %0)
%3 = ashr i32 %2, 4
%4 = shl i32 %2, 2
%5 = and i32 %4, 60
%6 = tail call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bbdb_sync_buddy_list();
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("Syncing...\n");
  bbdb_sync_buddy_list();
  printf("Done!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <bbdb_sync_buddy_list@plt>
lea    0xec3(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
call   1030 <bbdb_sync_buddy_list@plt>
lea    0xed0(%rip),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"Syncing...\0A\00"
@.str.1 = [7 x i8] c"Done!\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @bbdb_sync_buddy_list()
%4 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [11 x i8] c"Syncing...\00"
@str.2 = [6 x i8] c"Done!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @bbdb_sync_buddy_list()
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int fls(unsigned int);
int get_bitmask_order(unsigned int count) {
  int order;
  order = fls(count);
  return order;
}


x86 assembly (clang, -O0):
<get_bitmask_order>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <fls@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_bitmask_order>:
jmp    1030 <fls@plt>

LLVM IR (-O0):
define i32 @get_bitmask_order(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @fls(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @get_bitmask_order(i32 %0) {
%2 = tail call i32 @fls(i32 %0)
ret i32 %2
}
int test_imm_6Cuint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x6C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Cuint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x6c,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Cuint64_midword_reg>:
test   $0x6c0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Cuint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 108
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_6Cuint64_midword_reg(i64 %0) {
%2 = and i64 %0, 7077888
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void usage(void) {
  fputs("usage: 2csv [-q quote] [-d comma] "
        "record field [field ...] < in > csv\n",
        stderr);
  exit(2);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%esi
lea    0xecc(%rip),%rdi
call   1030 <fputs@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
lea    0xecf(%rip),%rdi
call   1030 <fputs@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [71 x i8] c"usage: 2csv [-q quote] [-d comma] record field [field ...] < in > csv\0A\00"
@stderr = global i32 0
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([71 x i8], [71 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = call i32 @exit(i32 2)
unreachable
}

LLVM IR (-O2):
@.str = [71 x i8] c"usage: 2csv [-q quote] [-d comma] record field [field ...] < in > csv\0A\00"
@stderr = global i32 0
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([71 x i8], [71 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @exit(i32 2)
unreachable
}
/* Type definitions */
struct virtqueue {
  int dummy;
};

/* Variables and functions */
void vq_callback(struct virtqueue *vq) {}


x86 assembly (clang, -O0):
<vq_callback>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vq_callback>:
ret

LLVM IR (-O0):
%struct.virtqueue = type { i32 }
define void @vq_callback(%struct.virtqueue* %0) {
%2 = alloca %struct.virtqueue*
store %struct.virtqueue* %0, %struct.virtqueue** %2
ret void
}

LLVM IR (-O2):
%struct.virtqueue = type { i32 }
define void @vq_callback(%struct.virtqueue* nocapture %0) {
ret void
}
void UARTParityModeSet(unsigned int baseAdd, unsigned int parityMode) {
  (*((volatile unsigned int *)(baseAdd + (0xC)))) &=
      ~((0x00000008u) | (0x00000010u) | (0x00000020u));
  (*((volatile unsigned int *)(baseAdd + (0xC)))) |=
      (parityMode & ((0x00000008u) | (0x00000010u) | (0x00000020u)));
}


x86 assembly (clang, -O0):
<UARTParityModeSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0xc,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xffffffc7,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%edx
and    $0x38,%edx
mov    -0x4(%rbp),%eax
add    $0xc,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTParityModeSet>:
add    $0xc,%edi
andl   $0xffffffc7,(%rdi)
and    $0x38,%esi
or     %esi,(%rdi)
ret

LLVM IR (-O0):
define void @UARTParityModeSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add i32 %5, 12
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, -57
store volatile i32 %10, i32* %8
%11 = load i32, i32* %4
%12 = and i32 %11, 56
%13 = load i32, i32* %3
%14 = add i32 %13, 12
%15 = zext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
%17 = load volatile i32, i32* %16
%18 = or i32 %17, %12
store volatile i32 %18, i32* %16
ret void
}

LLVM IR (-O2):
define void @UARTParityModeSet(i32 %0, i32 %1) {
%3 = add i32 %0, 12
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, -57
store volatile i32 %7, i32* %5
%8 = and i32 %1, 56
%9 = load volatile i32, i32* %5
%10 = or i32 %9, %8
store volatile i32 %10, i32* %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ getKey();
void updateGame(void) { getKey(); }


x86 assembly (clang, -O0):
<updateGame>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getKey@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<updateGame>:
xor    %eax,%eax
jmp    1030 <getKey@plt>

LLVM IR (-O0):
define void @updateGame() {
%1 = call i32 (...) @getKey()
ret void
}

LLVM IR (-O2):
define void @updateGame() {
%1 = tail call i32 (...) @getKey()
ret void
}
int foo(void) { return 23; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    $0x17,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    $0x17,%eax
ret

LLVM IR (-O0):
define i32 @foo() {
ret i32 23
}

LLVM IR (-O2):
define i32 @foo() {
ret i32 23
}
void HAL_ADC_Powerup(void) {}


x86 assembly (clang, -O0):
<HAL_ADC_Powerup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HAL_ADC_Powerup>:
ret

LLVM IR (-O0):
define void @HAL_ADC_Powerup() {
ret void
}

LLVM IR (-O2):
define void @HAL_ADC_Powerup() {
ret void
}
int lib1t11(void) { return 11; }


x86 assembly (clang, -O0):
<lib1t11>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lib1t11>:
mov    $0xb,%eax
ret

LLVM IR (-O0):
define i32 @lib1t11() {
ret i32 11
}

LLVM IR (-O2):
define i32 @lib1t11() {
ret i32 11
}
int qsort_intcmp(const int *a, const int *b) { return *a - *b; }


x86 assembly (clang, -O0):
<qsort_intcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<qsort_intcmp>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @qsort_intcmp(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = sub nsw i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @qsort_intcmp(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = sub nsw i32 %3, %4
ret i32 %5
}
__attribute__((always_)) void hlt(void) { asm volatile("hlt"); }


x86 assembly (clang, -O0):
<hlt>:
push   %rbp
mov    %rsp,%rbp
hlt
pop    %rbp
ret

x86 assembly (clang, -O2):
<hlt>:
hlt
ret

LLVM IR (-O0):
define void @hlt() {
ret void
}

LLVM IR (-O2):
define void @hlt() {
tail call void asm sideeffect "hlt", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
void pcp_print_net_icmp_stats(struct activity *a, int curr) {}


x86 assembly (clang, -O0):
<pcp_print_net_icmp_stats>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcp_print_net_icmp_stats>:
ret

LLVM IR (-O0):
%struct.activity = type opaque
define void @pcp_print_net_icmp_stats(%struct.activity* %0, i32 %1) {
%3 = alloca %struct.activity*
%4 = alloca i32
store %struct.activity* %0, %struct.activity** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.activity = type opaque
define void @pcp_print_net_icmp_stats(%struct.activity* nocapture %0, i32 %1) {
ret void
}
int scaleRange(int x, int srcMin, int srcMax, int destMin, int destMax) {
  long int a = ((long int)destMax - (long int)destMin) *
               ((long int)x - (long int)srcMin);
  long int b = (long int)srcMax - (long int)srcMin;
  return ((a / b) - (destMax - destMin)) + destMax;
}


x86 assembly (clang, -O0):
<scaleRange>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
movslq -0x14(%rbp),%rax
movslq -0x10(%rbp),%rcx
sub    %rcx,%rax
movslq -0x4(%rbp),%rcx
movslq -0x8(%rbp),%rdx
sub    %rdx,%rcx
imul   %rcx,%rax
mov    %rax,-0x20(%rbp)
movslq -0xc(%rbp),%rax
movslq -0x8(%rbp),%rcx
sub    %rcx,%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
cqto
idivq  -0x28(%rbp)
mov    -0x14(%rbp),%ecx
sub    -0x10(%rbp),%ecx
movslq %ecx,%rcx
sub    %rcx,%rax
movslq -0x14(%rbp),%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scaleRange>:
movslq %r8d,%r8
movslq %ecx,%rax
sub    %rax,%r8
movslq %edi,%rax
movslq %esi,%rdi
sub    %rdi,%rax
imul   %r8,%rax
movslq %edx,%rsi
sub    %rdi,%rsi
mov    %rax,%rdx
or     %rsi,%rdx
shr    $0x20,%rdx
je     1130 <scaleRange+0x30>
cqto
idiv   %rsi
add    %ecx,%eax
ret
xor    %edx,%edx
div    %esi
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @scaleRange(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i64
%12 = alloca i64
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%13 = load i32, i32* %10
%14 = sext i32 %13 to i64
%15 = load i32, i32* %9
%16 = sext i32 %15 to i64
%17 = sub nsw i64 %14, %16
%18 = load i32, i32* %6
%19 = sext i32 %18 to i64
%20 = load i32, i32* %7
%21 = sext i32 %20 to i64
%22 = sub nsw i64 %19, %21
%23 = mul nsw i64 %17, %22
store i64 %23, i64* %11
%24 = load i32, i32* %8
%25 = sext i32 %24 to i64
%26 = load i32, i32* %7
%27 = sext i32 %26 to i64
%28 = sub nsw i64 %25, %27
store i64 %28, i64* %12
%29 = load i64, i64* %11
%30 = load i64, i64* %12
%31 = sdiv i64 %29, %30
%32 = load i32, i32* %10
%33 = load i32, i32* %9
%34 = sub nsw i32 %32, %33
%35 = sext i32 %34 to i64
%36 = sub nsw i64 %31, %35
%37 = load i32, i32* %10
%38 = sext i32 %37 to i64
%39 = add nsw i64 %36, %38
%40 = trunc i64 %39 to i32
ret i32 %40
}

LLVM IR (-O2):
define i32 @scaleRange(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = sext i32 %4 to i64
%7 = sext i32 %3 to i64
%8 = sub nsw i64 %6, %7
%9 = sext i32 %0 to i64
%10 = sext i32 %1 to i64
%11 = sub nsw i64 %9, %10
%12 = mul nsw i64 %8, %11
%13 = sext i32 %2 to i64
%14 = sub nsw i64 %13, %10
%15 = sdiv i64 %12, %14
%16 = trunc i64 %15 to i32
%17 = add i32 %16, %3
ret i32 %17
}
/* Variables and functions */
double FLT_EPSILON;
double floor(double);
int is_integer(double d) { return d - floor(d) < FLT_EPSILON; }


x86 assembly (clang, -O0):
<is_integer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <floor@plt>
movsd  -0x10(%rbp),%xmm1
subsd  %xmm0,%xmm1
mov    0x2e9f(%rip),%rax
movsd  (%rax),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_integer>:
push   %rax
movsd  %xmm0,(%rsp)
call   1030 <floor@plt>
movsd  (%rsp),%xmm1
subsd  %xmm0,%xmm1
mov    0x2eb5(%rip),%rax
movsd  (%rax),%xmm0
xor    %eax,%eax
ucomisd %xmm1,%xmm0
seta   %al
pop    %rcx
ret

LLVM IR (-O0):
@FLT_EPSILON = global double 0.000000e+00
define i32 @is_integer(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = call double @llvm.floor.f64(double %4)
%6 = fsub double %3, %5
%7 = load double, double* @FLT_EPSILON
%8 = fcmp olt double %6, %7
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
@FLT_EPSILON = global double 0.000000e+00
define i32 @is_integer(double %0) {
%2 = tail call double @llvm.floor.f64(double %0)
%3 = fsub double %0, %2
%4 = load double, double* @FLT_EPSILON
%5 = fcmp olt double %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
float cosf(float);
int /*<<< orphan*/ sinf(float);
float sincosf_cosf(float x) {
  (void)sinf(x);
  return cosf(x);
}


x86 assembly (clang, -O0):
<sincosf_cosf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sinf@plt>
movss  -0x4(%rbp),%xmm0
call   1040 <cosf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sincosf_cosf>:
push   %rax
movss  %xmm0,0x4(%rsp)
call   1030 <sinf@plt>
movss  0x4(%rsp),%xmm0
pop    %rax
jmp    1040 <cosf@plt>

LLVM IR (-O0):
define float @sincosf_cosf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 @sinf(float %3)
%5 = load float, float* %2
%6 = call float @cosf(float %5)
ret float %6
}

LLVM IR (-O2):
define float @sincosf_cosf(float %0) {
%2 = tail call i32 @sinf(float %0)
%3 = tail call float @cosf(float %0)
ret float %3
}
void s5p64x0_default_sdhci0(void) {}


x86 assembly (clang, -O0):
<s5p64x0_default_sdhci0>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s5p64x0_default_sdhci0>:
ret

LLVM IR (-O0):
define void @s5p64x0_default_sdhci0() {
ret void
}

LLVM IR (-O2):
define void @s5p64x0_default_sdhci0() {
ret void
}
void foo369(int p) {}


x86 assembly (clang, -O0):
<foo369>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo369>:
ret

LLVM IR (-O0):
define void @foo369(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo369(i32 %0) {
ret void
}
void main_clock_off() {
  *(volatile unsigned long *)((void *)0xfffffc00 + 0x20) = 0;
}


x86 assembly (clang, -O0):
<main_clock_off>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffffc00,%eax
movq   $0x0,0x20(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<main_clock_off>:
mov    $0xfffffc20,%eax
movq   $0x0,(%rax)
ret

LLVM IR (-O0):
define void @main_clock_off() {
store volatile i64 0, i64* bitcast (i8* getelementptr (i8, i8* inttoptr (i64 4294966272 to i8*), i64 32) to i64*)
ret void
}

LLVM IR (-O2):
define void @main_clock_off() {
store volatile i64 0, i64* inttoptr (i64 4294966304 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print_A_banner();
int main() {
  print_A_banner();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <print_A_banner@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <print_A_banner@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @print_A_banner()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @print_A_banner()
ret i32 0
}
int fun284() { return 284; }


x86 assembly (clang, -O0):
<fun284>:
push   %rbp
mov    %rsp,%rbp
mov    $0x11c,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun284>:
mov    $0x11c,%eax
ret

LLVM IR (-O0):
define i32 @fun284() {
ret i32 284
}

LLVM IR (-O2):
define i32 @fun284() {
ret i32 284
}
/* Variables and functions */
long clock();
long get_clock(void) { return clock(); }


x86 assembly (clang, -O0):
<get_clock>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <clock@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_clock>:
xor    %eax,%eax
jmp    1030 <clock@plt>

LLVM IR (-O0):
define i64 @get_clock() {
%1 = call i64 (...) @clock()
ret i64 %1
}

LLVM IR (-O2):
define i64 @get_clock() {
%1 = tail call i64 (...) @clock()
ret i64 %1
}
unsigned int getlong(unsigned char *p) {
  return (p[0] << 0 | p[1] << 8 | p[2] << 16 | p[3] << 24);
}


x86 assembly (clang, -O0):
<getlong>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
shl    $0x0,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%ecx
shl    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getlong>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @getlong(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl i32 %6, 0
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = or i32 %7, %12
%14 = load i8*, i8** %2
%15 = getelementptr inbounds i8, i8* %14, i64 2
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 16
%19 = or i32 %13, %18
%20 = load i8*, i8** %2
%21 = getelementptr inbounds i8, i8* %20, i64 3
%22 = load i8, i8* %21
%23 = zext i8 %22 to i32
%24 = shl i32 %23, 24
%25 = or i32 %19, %24
ret i32 %25
}

LLVM IR (-O2):
define i32 @getlong(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = or i32 %7, %3
%9 = getelementptr inbounds i8, i8* %0, i64 2
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = shl nuw nsw i32 %11, 16
%13 = or i32 %8, %12
%14 = getelementptr inbounds i8, i8* %0, i64 3
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = shl nuw i32 %16, 24
%18 = or i32 %13, %17
ret i32 %18
}
void f30(a30) enum file *a30;
{}


x86 assembly (clang, -O0):
<f30>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f30>:
ret

LLVM IR (-O0):
define void @f30(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @f30(i32* nocapture %0) {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t SysCtrlClockGet(void) { return (48000000); }


x86 assembly (clang, -O0):
<SysCtrlClockGet>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2dc6c00,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtrlClockGet>:
mov    $0x2dc6c00,%eax
ret

LLVM IR (-O0):
define i32 @SysCtrlClockGet() {
ret i32 48000000
}

LLVM IR (-O2):
define i32 @SysCtrlClockGet() {
ret i32 48000000
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t mqtt_get_retain(uint8_t *buffer) { return (buffer[0] & 0x01); }


x86 assembly (clang, -O0):
<mqtt_get_retain>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mqtt_get_retain>:
mov    (%rdi),%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @mqtt_get_retain(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = and i32 %5, 1
ret i32 %6
}

LLVM IR (-O2):
define i32 @mqtt_get_retain(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void Xfree(void *old) {
  if (old)
    free((char *)old);
}


x86 assembly (clang, -O0):
<Xfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <Xfree+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Xfree>:
test   %rdi,%rdi
je     111a <Xfree+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @Xfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @Xfree(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
void fp_force_evalf(float x) {}


x86 assembly (clang, -O0):
<fp_force_evalf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fp_force_evalf>:
ret

LLVM IR (-O0):
define void @fp_force_evalf(float %0) {
%2 = alloca float
store float %0, float* %2
ret void
}

LLVM IR (-O2):
define void @fp_force_evalf(float %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sw_printf(char *);
void int_databort(void) { sw_printf("data abort"); }


x86 assembly (clang, -O0):
<int_databort>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <sw_printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_databort>:
lea    0xee9(%rip),%rdi
jmp    1030 <sw_printf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"data abort\00"
define void @int_databort() {
%1 = call i32 @sw_printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"data abort\00"
define void @int_databort() {
%1 = tail call i32 @sw_printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}
void rop3_210_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = ~S;
  stk2 = *D & stk3;
  stk1 = T ^ stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_210_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0x9(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_210_1_1>:
ret

LLVM IR (-O0):
define void @rop3_210_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %5
%11 = zext i8 %10 to i32
%12 = xor i32 %11, -1
%13 = trunc i32 %12 to i8
store i8 %13, i8* %9
%14 = load i8*, i8** %4
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = load i8, i8* %9
%18 = zext i8 %17 to i32
%19 = and i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %8
%21 = load i8, i8* %6
%22 = zext i8 %21 to i32
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = xor i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %7
%27 = load i8, i8* %7
%28 = zext i8 %27 to i32
%29 = load i8, i8* %5
%30 = zext i8 %29 to i32
%31 = xor i32 %30, -1
%32 = and i32 %28, %31
%33 = load i8, i8* %6
%34 = zext i8 %33 to i32
%35 = xor i32 %34, -1
%36 = and i32 %32, %35
%37 = load i8*, i8** %4
%38 = load i8, i8* %37
%39 = zext i8 %38 to i32
%40 = load i8, i8* %5
%41 = zext i8 %40 to i32
%42 = and i32 %39, %41
%43 = or i32 %36, %42
%44 = load i8*, i8** %4
%45 = load i8, i8* %44
%46 = zext i8 %45 to i32
%47 = load i8, i8* %6
%48 = zext i8 %47 to i32
%49 = and i32 %46, %48
%50 = or i32 %43, %49
%51 = trunc i32 %50 to i8
%52 = load i8*, i8** %4
store i8 %51, i8* %52
ret void
}

LLVM IR (-O2):
define void @rop3_210_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ read(int /*<<< orphan*/, char *, int);
int main() {
  char buf[80];
  read(0, buf, 256);
  puts(buf);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
lea    -0x50(%rbp),%rsi
xor    %edi,%edi
mov    $0x100,%edx
call   1040 <read@plt>
lea    -0x50(%rbp),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x50,%rsp
mov    %rsp,%rbx
xor    %edi,%edi
mov    %rbx,%rsi
mov    $0x100,%edx
call   1040 <read@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca [80 x i8]
%2 = getelementptr inbounds [80 x i8], [80 x i8]* %1, i64 0, i64 0
%3 = call i32 @read(i32 0, i8* %2, i32 256)
%4 = getelementptr inbounds [80 x i8], [80 x i8]* %1, i64 0, i64 0
%5 = call i32 @puts(i8* %4)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [80 x i8]
%2 = getelementptr inbounds [80 x i8], [80 x i8]* %1, i64 0, i64 0
%3 = call i32 @read(i32 0, i8* %2, i32 256)
%4 = call i32 @puts(i8* %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ endwin();
void close_ncurses(void) { endwin(); }


x86 assembly (clang, -O0):
<close_ncurses>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <endwin@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_ncurses>:
xor    %eax,%eax
jmp    1030 <endwin@plt>

LLVM IR (-O0):
define void @close_ncurses() {
%1 = call i32 (...) @endwin()
ret void
}

LLVM IR (-O2):
define void @close_ncurses() {
%1 = tail call i32 (...) @endwin()
ret void
}
int test_01(int *m, void *v) {
  unsigned long n = (unsigned long)v - 1;
  if (!n)
    return 50;
  if (1 & (1 << n))
    return 60;
  else
    return -8;
}


x86 assembly (clang, -O0):
<test_01>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
sub    $0x1,%rax
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    112f <test_01+0x2f>
movl   $0x32,-0x4(%rbp)
jmp    115b <test_01+0x5b>
mov    -0x20(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1154 <test_01+0x54>
movl   $0x3c,-0x4(%rbp)
jmp    115b <test_01+0x5b>
movl   $0xfffffff8,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_01>:
add    $0xffffffffffffffff,%rsi
test   %esi,%esi
mov    $0x3c,%eax
mov    $0xfffffff8,%ecx
cmove  %eax,%ecx
test   %rsi,%rsi
mov    $0x32,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_01(i32* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i64
store i32* %0, i32** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %5
%8 = ptrtoint i8* %7 to i64
%9 = sub i64 %8, 1
store i64 %9, i64* %6
%10 = load i64, i64* %6
%11 = icmp ne i64 %10, 0
br i1 %11, label %13, label %12
12: ; preds = %2
store i32 50, i32* %3
br label %21
13: ; preds = %2
%14 = load i64, i64* %6
%15 = trunc i64 %14 to i32
%16 = shl i32 1, %15
%17 = and i32 1, %16
%18 = icmp ne i32 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %13
store i32 60, i32* %3
br label %21
20: ; preds = %13
store i32 -8, i32* %3
br label %21
21: ; preds = %20, %19, %12
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @test_01(i32* nocapture readnone %0, i8* %1) {
%3 = ptrtoint i8* %1 to i64
%4 = add i64 %3, -1
%5 = icmp eq i64 %4, 0
%6 = trunc i64 %4 to i32
%7 = icmp eq i32 %6, 0
%8 = select i1 %7, i32 60, i32 -8
%9 = select i1 %5, i32 50, i32 %8
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ HplAtm128GeneralIOPinP__18__IO__toggle();
void LedsP__Led0__toggle(void) { HplAtm128GeneralIOPinP__18__IO__toggle(); }


x86 assembly (clang, -O0):
<LedsP__Led0__toggle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplAtm128GeneralIOPinP__18__IO__toggle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LedsP__Led0__toggle>:
xor    %eax,%eax
jmp    1030 <HplAtm128GeneralIOPinP__18__IO__toggle@plt>

LLVM IR (-O0):
define void @LedsP__Led0__toggle() {
%1 = call i32 (...) @HplAtm128GeneralIOPinP__18__IO__toggle()
ret void
}

LLVM IR (-O2):
define void @LedsP__Led0__toggle() {
%1 = tail call i32 (...) @HplAtm128GeneralIOPinP__18__IO__toggle()
ret void
}
void RTSemEventMultiWaitNoResume(void) {}


x86 assembly (clang, -O0):
<RTSemEventMultiWaitNoResume>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTSemEventMultiWaitNoResume>:
ret

LLVM IR (-O0):
define void @RTSemEventMultiWaitNoResume() {
ret void
}

LLVM IR (-O2):
define void @RTSemEventMultiWaitNoResume() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bcopy(void *, void *, int);
int copyin(void *src, void *dst, int size) {
  bcopy(src, dst, size);
  return 0;
}


x86 assembly (clang, -O0):
<copyin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <bcopy@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copyin>:
push   %rax
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
call   1030 <memmove@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @copyin(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @bcopy(i8* %7, i8* %8, i32 %9)
ret i32 0
}

LLVM IR (-O2):
define i32 @copyin(i8* nocapture %0, i8* nocapture writeonly %1, i32 %2) {
tail call void @llvm.memmove.p0i8.p0i8.i32(i8* align 1 %1, i8* align 1 %0, i32 %2, i1 false)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ENXIO;
int /*<<< orphan*/ errno;
char *getpass(const char *prompt) {
  errno = ENXIO;
  return 0;
}


x86 assembly (clang, -O0):
<getpass>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ec9(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec8(%rip),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getpass>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%eax
mov    0x2ed0(%rip),%rcx
mov    %eax,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
@ENXIO = global i32 0
@errno = global i32 0
define i8* @getpass(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @ENXIO
store i32 %3, i32* @errno
ret i8* null
}

LLVM IR (-O2):
@ENXIO = global i32 0
@errno = global i32 0
define noalias i8* @getpass(i8* nocapture readnone %0) {
%2 = load i32, i32* @ENXIO
store i32 %2, i32* @errno
ret i8* null
}
char d(int a, int b) {
  if (a > b)
    return -1;
  else
    return 1;
}


x86 assembly (clang, -O0):
<d>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    111f <d+0x1f>
movb   $0xff,-0x1(%rbp)
jmp    1123 <d+0x23>
movb   $0x1,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d>:
cmp    %esi,%edi
setle  %al
add    %al,%al
add    $0xff,%al
ret

LLVM IR (-O0):
define signext i8 @d(i32 %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i8 -1, i8* %3
br label %11
10: ; preds = %2
store i8 1, i8* %3
br label %11
11: ; preds = %10, %9
%12 = load i8, i8* %3
ret i8 %12
}

LLVM IR (-O2):
define signext i8 @d(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i8 -1, i8 1
ret i8 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
unsigned char finhn(int /*<<< orphan*/ *);
unsigned char finhb(FILE *f) {
  unsigned char result;
  result = finhn(f) << 4;
  result |= finhn(f);
  return result;
}


x86 assembly (clang, -O0):
<finhb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <finhn@plt>
movzbl %al,%eax
shl    $0x4,%eax
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <finhn@plt>
movzbl %al,%ecx
movzbl -0x9(%rbp),%eax
or     %ecx,%eax
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<finhb>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <finhn@plt>
mov    %eax,%ebx
shl    $0x4,%bl
mov    %r14,%rdi
call   1030 <finhn@plt>
or     %bl,%al
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define zeroext i8 @finhb(i32* %0) {
%2 = alloca i32*
%3 = alloca i8
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call zeroext i8 @finhn(i32* %4)
%6 = zext i8 %5 to i32
%7 = shl i32 %6, 4
%8 = trunc i32 %7 to i8
store i8 %8, i8* %3
%9 = load i32*, i32** %2
%10 = call zeroext i8 @finhn(i32* %9)
%11 = zext i8 %10 to i32
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = or i32 %13, %11
%15 = trunc i32 %14 to i8
store i8 %15, i8* %3
%16 = load i8, i8* %3
ret i8 %16
}

LLVM IR (-O2):
define zeroext i8 @finhb(i32* %0) {
%2 = tail call zeroext i8 @finhn(i32* %0)
%3 = shl i8 %2, 4
%4 = tail call zeroext i8 @finhn(i32* %0)
%5 = or i8 %3, %4
ret i8 %5
}
/* Variables and functions */
int /*<<< orphan*/ ft_putnbr(int);
void mlt(int a, int b) { ft_putnbr(a * b); }


x86 assembly (clang, -O0):
<mlt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
imul   -0x8(%rbp),%edi
call   1030 <ft_putnbr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mlt>:
imul   %esi,%edi
jmp    1030 <ft_putnbr@plt>

LLVM IR (-O0):
define void @mlt(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %5, %6
%8 = call i32 @ft_putnbr(i32 %7)
ret void
}

LLVM IR (-O2):
define void @mlt(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
%4 = tail call i32 @ft_putnbr(i32 %3)
ret void
}
/* Type definitions */
struct PSState {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct PSState *);
void destroy_psstate(struct PSState *pstate) { free(pstate); }


x86 assembly (clang, -O0):
<destroy_psstate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<destroy_psstate>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.PSState = type { i32 }
define void @destroy_psstate(%struct.PSState* %0) {
%2 = alloca %struct.PSState*
store %struct.PSState* %0, %struct.PSState** %2
%3 = load %struct.PSState*, %struct.PSState** %2
%4 = call i32 @free(%struct.PSState* %3)
ret void
}

LLVM IR (-O2):
%struct.PSState = type { i32 }
define void @destroy_psstate(%struct.PSState* nocapture %0) {
%2 = tail call i32 @free(%struct.PSState* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ RemoveCommandWord(char *, char *);
void SystemStatement(char *Text) { RemoveCommandWord(Text, "SYSTEM"); }


x86 assembly (clang, -O0):
<SystemStatement>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <RemoveCommandWord@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SystemStatement>:
lea    0xee9(%rip),%rsi
jmp    1030 <RemoveCommandWord@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"SYSTEM\00"
define void @SystemStatement(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @RemoveCommandWord(i8* %3, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"SYSTEM\00"
define void @SystemStatement(i8* %0) {
%2 = tail call i32 @RemoveCommandWord(i8* %0, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
int increment(int i) { return i + 1; }


x86 assembly (clang, -O0):
<increment>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<increment>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @increment(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
ret i32 %4
}

LLVM IR (-O2):
define i32 @increment(i32 %0) {
%2 = add nsw i32 %0, 1
ret i32 %2
}
double BULBtoE(double Ew, double wetc, double dryc, double mb) {
  double E = Ew - (0.00066 * (1 + 0.00115 * wetc) * (dryc - wetc) * mb);
  return E;
}


x86 assembly (clang, -O0):
<BULBtoE>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm2
movsd  0xede(%rip),%xmm0
mulsd  %xmm0,%xmm2
movsd  0xeda(%rip),%xmm0
addsd  %xmm0,%xmm2
movsd  0xebe(%rip),%xmm0
mulsd  %xmm2,%xmm0
movsd  -0x18(%rbp),%xmm2
subsd  -0x10(%rbp),%xmm2
mulsd  %xmm2,%xmm0
movsd  -0x20(%rbp),%xmm2
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<BULBtoE>:
subsd  %xmm1,%xmm2
mulsd  0xef4(%rip),%xmm1
addsd  0xef4(%rip),%xmm1
mulsd  0xef4(%rip),%xmm1
mulsd  %xmm2,%xmm1
mulsd  %xmm3,%xmm1
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @BULBtoE(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
%9 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%10 = load double, double* %5
%11 = load double, double* %6
%12 = call double @llvm.fmuladd.f64(double 1.150000e-03, double %11, double 1.000000e+00)
%13 = fmul double 6.600000e-04, %12
%14 = load double, double* %7
%15 = load double, double* %6
%16 = fsub double %14, %15
%17 = fmul double %13, %16
%18 = load double, double* %8
%19 = fneg double %17
%20 = call double @llvm.fmuladd.f64(double %19, double %18, double %10)
store double %20, double* %9
%21 = load double, double* %9
ret double %21
}

LLVM IR (-O2):
define double @BULBtoE(double %0, double %1, double %2, double %3) {
%5 = tail call double @llvm.fmuladd.f64(double %1, double 1.150000e-03, double 1.000000e+00)
%6 = fsub double %2, %1
%7 = fmul double %5, -6.600000e-04
%8 = fmul double %7, %6
%9 = tail call double @llvm.fmuladd.f64(double %8, double %3, double %0)
ret double %9
}
void init_usart(unsigned int ubrr) {
  *((volatile unsigned char *)(0xC5)) = (unsigned char)(ubrr >> 8);
  *((volatile unsigned char *)(0xC4)) = (unsigned char)ubrr;
  *((volatile unsigned char *)(0xC1)) = (1 << 4) | (1 << 3);
  *((volatile unsigned char *)(0xC2)) = (1 << 3) | (3 << 1);
}


x86 assembly (clang, -O0):
<init_usart>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x8,%eax
mov    %al,%cl
mov    $0xc5,%eax
mov    %cl,(%rax)
mov    -0x4(%rbp),%eax
mov    %al,%cl
mov    $0xc4,%eax
mov    %cl,(%rax)
mov    $0xc1,%eax
movb   $0x18,(%rax)
mov    $0xc2,%eax
movb   $0xe,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_usart>:
mov    %edi,%eax
mov    %ah,0xc5
mov    %al,0xc4
movb   $0x18,0xc1
18
movb   $0xe,0xc2
0e
ret

LLVM IR (-O0):
define void @init_usart(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 8
%5 = trunc i32 %4 to i8
store volatile i8 %5, i8* inttoptr (i64 197 to i8*)
%6 = load i32, i32* %2
%7 = trunc i32 %6 to i8
store volatile i8 %7, i8* inttoptr (i64 196 to i8*)
store volatile i8 24, i8* inttoptr (i64 193 to i8*)
store volatile i8 14, i8* inttoptr (i64 194 to i8*)
ret void
}

LLVM IR (-O2):
define void @init_usart(i32 %0) {
%2 = lshr i32 %0, 8
%3 = trunc i32 %2 to i8
store volatile i8 %3, i8* inttoptr (i64 197 to i8*)
%4 = trunc i32 %0 to i8
store volatile i8 %4, i8* inttoptr (i64 196 to i8*)
store volatile i8 24, i8* inttoptr (i64 193 to i8*)
store volatile i8 14, i8* inttoptr (i64 194 to i8*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ rm_all_clients();
void disconnect_all() { rm_all_clients(); }


x86 assembly (clang, -O0):
<disconnect_all>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rm_all_clients@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<disconnect_all>:
xor    %eax,%eax
jmp    1030 <rm_all_clients@plt>

LLVM IR (-O0):
define void @disconnect_all() {
%1 = call i32 (...) @rm_all_clients()
ret void
}

LLVM IR (-O2):
define void @disconnect_all() {
%1 = tail call i32 (...) @rm_all_clients()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void xjosc_documentation(void) {
  printf("# This version of xjadeo is compiled without OSC support.\n");
}


x86 assembly (clang, -O0):
<xjosc_documentation>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xjosc_documentation>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [59 x i8] c"# This version of xjadeo is compiled without OSC support.\0A\00"
define void @xjosc_documentation() {
%1 = call i32 @printf(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [58 x i8] c"# This version of xjadeo is compiled without OSC support.\00"
define void @xjosc_documentation() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([58 x i8], [58 x i8]* @str, i64 0, i64 0))
ret void
}