xunge/DecIR huggingface dataset:
/* Type definitions */
struct timeval {
  int /*<<< orphan*/ tv_usec;
  int /*<<< orphan*/ tv_sec;
};

/* Variables and functions */
void copy_timeval(struct timeval *dst, struct timeval *src) {
  dst->tv_sec = src->tv_sec;
  dst->tv_usec = src->tv_usec;
}


x86 assembly (clang, -O0):
<copy_timeval>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_timeval>:
mov    0x4(%rsi),%eax
mov    %eax,0x4(%rdi)
mov    (%rsi),%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define void @copy_timeval(%struct.timeval* %0, %struct.timeval* %1) {
%3 = alloca %struct.timeval*
%4 = alloca %struct.timeval*
store %struct.timeval* %0, %struct.timeval** %3
store %struct.timeval* %1, %struct.timeval** %4
%5 = load %struct.timeval*, %struct.timeval** %4
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %5, i32 0, i32 1
%7 = load i32, i32* %6
%8 = load %struct.timeval*, %struct.timeval** %3
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %8, i32 0, i32 1
store i32 %7, i32* %9
%10 = load %struct.timeval*, %struct.timeval** %4
%11 = getelementptr inbounds %struct.timeval, %struct.timeval* %10, i32 0, i32 0
%12 = load i32, i32* %11
%13 = load %struct.timeval*, %struct.timeval** %3
%14 = getelementptr inbounds %struct.timeval, %struct.timeval* %13, i32 0, i32 0
store i32 %12, i32* %14
ret void
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define void @copy_timeval(%struct.timeval* nocapture writeonly %0, %struct.timeval* nocapture %1) {
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%4 = load i32, i32* %3
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
store i32 %4, i32* %5
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%7 = load i32, i32* %6
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
store i32 %7, i32* %8
ret void
}
void glUniform1f(void) { return; }


x86 assembly (clang, -O0):
<glUniform1f>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glUniform1f>:
ret

LLVM IR (-O0):
define void @glUniform1f() {
ret void
}

LLVM IR (-O2):
define void @glUniform1f() {
ret void
}
/* Type definitions */
struct xxxid_stats_arr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _arr_free(struct xxxid_stats_arr *, int /*<<< orphan*/);
void arr_free_noitem(struct xxxid_stats_arr *pa) { _arr_free(pa, 0); }


x86 assembly (clang, -O0):
<arr_free_noitem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <_arr_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arr_free_noitem>:
xor    %esi,%esi
jmp    1030 <_arr_free@plt>

LLVM IR (-O0):
%struct.xxxid_stats_arr = type { i32 }
define void @arr_free_noitem(%struct.xxxid_stats_arr* %0) {
%2 = alloca %struct.xxxid_stats_arr*
store %struct.xxxid_stats_arr* %0, %struct.xxxid_stats_arr** %2
%3 = load %struct.xxxid_stats_arr*, %struct.xxxid_stats_arr** %2
%4 = call i32 @_arr_free(%struct.xxxid_stats_arr* %3, i32 0)
ret void
}

LLVM IR (-O2):
%struct.xxxid_stats_arr = type { i32 }
define void @arr_free_noitem(%struct.xxxid_stats_arr* %0) {
%2 = tail call i32 @_arr_free(%struct.xxxid_stats_arr* %0, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void tandy_rom_close(void *p) { free(p); }


x86 assembly (clang, -O0):
<tandy_rom_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tandy_rom_close>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @tandy_rom_close(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @tandy_rom_close(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int detect();
int /*<<< orphan*/ printf(char *);
void get_subarchitecture(void) {
  int d = detect();
  switch (d) {
  case 1:
    printf("ARMV8");
    break;
  default:
    printf("UNKNOWN");
    break;
  }
}


x86 assembly (clang, -O0):
<get_subarchitecture>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
call   1040 <detect@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
jne    1154 <get_subarchitecture+0x34>
jmp    1143 <get_subarchitecture+0x23>
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
jmp    1160 <get_subarchitecture+0x40>
lea    0xeab(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_subarchitecture>:
push   %rax
xor    %eax,%eax
call   1040 <detect@plt>
cmp    $0x1,%eax
lea    0xece(%rip),%rax
lea    0xecd(%rip),%rdi
cmove  %rax,%rdi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"ARMV8\00"
@.str.1 = [8 x i8] c"UNKNOWN\00"
define void @get_subarchitecture() {
%1 = alloca i32
%2 = call i32 (...) @detect()
store i32 %2, i32* %1
%3 = load i32, i32* %1
switch i32 %3, label %6 [
i32 1, label %4
]
4: ; preds = %0
%5 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %8
6: ; preds = %0
%7 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
br label %8
8: ; preds = %6, %4
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"ARMV8\00"
@.str.1 = [8 x i8] c"UNKNOWN\00"
define void @get_subarchitecture() {
%1 = tail call i32 (...) @detect()
%2 = icmp eq i32 %1, 1
%3 = select i1 %2, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0)
%4 = tail call i32 @printf(i8* dereferenceable(1) %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
char Dec2HexFunc(int source) {
  if (16 < source) {
    printf("Overfrow at Dec2HexFunc!! source is %d (> 16)\n", source);
  }
  if (source < 10) {
    return '1' - 1 + source;
  } else {
    return 'A' - 1 + source;
  }
}


x86 assembly (clang, -O0):
<Dec2HexFunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x10,%eax
cmp    -0x8(%rbp),%eax
jge    1138 <Dec2HexFunc+0x28>
mov    -0x8(%rbp),%esi
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
cmpl   $0xa,-0x8(%rbp)
jge    1150 <Dec2HexFunc+0x40>
mov    -0x8(%rbp),%eax
add    $0x30,%eax
mov    %al,-0x1(%rbp)
jmp    1159 <Dec2HexFunc+0x49>
mov    -0x8(%rbp),%eax
add    $0x40,%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Dec2HexFunc>:
push   %rbx
mov    %edi,%ebx
cmp    $0x11,%edi
jl     1126 <Dec2HexFunc+0x16>
lea    0xee1(%rip),%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
cmp    $0xa,%ebx
setge  %al
shl    $0x4,%al
add    %bl,%al
add    $0x30,%al
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"Overfrow at Dec2HexFunc!! source is %d (> 16)\0A\00"
define signext i8 @Dec2HexFunc(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 16, %4
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = call i32 @printf(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i32 %7)
br label %9
9: ; preds = %6, %1
%10 = load i32, i32* %3
%11 = icmp slt i32 %10, 10
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = load i32, i32* %3
%14 = add nsw i32 48, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %2
br label %20
16: ; preds = %9
%17 = load i32, i32* %3
%18 = add nsw i32 64, %17
%19 = trunc i32 %18 to i8
store i8 %19, i8* %2
br label %20
20: ; preds = %16, %12
%21 = load i8, i8* %2
ret i8 %21
}

LLVM IR (-O2):
@.str = [47 x i8] c"Overfrow at Dec2HexFunc!! source is %d (> 16)\0A\00"
define signext i8 @Dec2HexFunc(i32 %0) {
%2 = icmp sgt i32 %0, 16
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @printf(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i32 %0)
br label %5
5: ; preds = %3, %1
%6 = icmp slt i32 %0, 10
%7 = trunc i32 %0 to i8
%8 = select i1 %6, i8 48, i8 64
%9 = add i8 %8, %7
ret i8 %9
}
void gen_cvt_ftof(int t) {}


x86 assembly (clang, -O0):
<gen_cvt_ftof>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_cvt_ftof>:
ret

LLVM IR (-O0):
define void @gen_cvt_ftof(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @gen_cvt_ftof(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __coverity_free__(void *);
int /*<<< orphan*/ __coverity_panic__();
void isc__mem_free(void *mem, void *ptr, const char *file, unsigned int line) {
  if (!mem)
    __coverity_panic__();
  __coverity_free__(ptr);
}


x86 assembly (clang, -O0):
<isc__mem_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1149 <isc__mem_free+0x29>
mov    $0x0,%al
call   1030 <__coverity_panic__@plt>
mov    -0x10(%rbp),%rdi
call   1040 <__coverity_free__@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isc__mem_free>:
push   %rbx
mov    %rsi,%rbx
test   %rdi,%rdi
jne    1130 <isc__mem_free+0x10>
xor    %eax,%eax
call   1030 <__coverity_panic__@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <__coverity_free__@plt>

LLVM IR (-O0):
define void @isc__mem_free(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %13, label %11
11: ; preds = %4
%12 = call i32 (...) @__coverity_panic__()
br label %13
13: ; preds = %11, %4
%14 = load i8*, i8** %6
%15 = call i32 @__coverity_free__(i8* %14)
ret void
}

LLVM IR (-O2):
define void @isc__mem_free(i8* readnone %0, i8* %1, i8* nocapture readnone %2, i32 %3) {
%5 = icmp eq i8* %0, null
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 (...) @__coverity_panic__()
br label %8
8: ; preds = %6, %4
%9 = tail call i32 @__coverity_free__(i8* %1)
ret void
}
/* Variables and functions */
int inb(unsigned short);
unsigned char serial_is_tx_fifo_empty(unsigned short com) {
  return inb((com + 5)) & 0x20;
}


x86 assembly (clang, -O0):
<serial_is_tx_fifo_empty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
add    $0x5,%eax
movzwl %ax,%edi
call   1030 <inb@plt>
and    $0x20,%eax
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_is_tx_fifo_empty>:
push   %rax
add    $0x5,%edi
movzwl %di,%edi
call   1030 <inb@plt>
and    $0x20,%al
pop    %rcx
ret

LLVM IR (-O0):
define zeroext i8 @serial_is_tx_fifo_empty(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = add nsw i32 %4, 5
%6 = trunc i32 %5 to i16
%7 = call i32 @inb(i16 zeroext %6)
%8 = and i32 %7, 32
%9 = trunc i32 %8 to i8
ret i8 %9
}

LLVM IR (-O2):
define zeroext i8 @serial_is_tx_fifo_empty(i16 zeroext %0) {
%2 = add i16 %0, 5
%3 = tail call i32 @inb(i16 zeroext %2)
%4 = trunc i32 %3 to i8
%5 = and i8 %4, 32
ret i8 %5
}
int read_marker(const unsigned char *data, int offset) {
  if (0)
    return (data[offset] << 24) + (data[offset + 1] << 16) +
           (data[offset + 2] << 8) + data[offset + 3];
  else if (1)
    return data[offset] + (data[offset + 1] << 8) + (data[offset + 2] << 16) +
           (data[offset + 3] << 24);
  else
    return 0x666;
}


x86 assembly (clang, -O0):
<read_marker>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movzbl (%rax,%rcx,1),%eax
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%edx
add    $0x1,%edx
movslq %edx,%rdx
movzbl (%rcx,%rdx,1),%ecx
shl    $0x8,%ecx
add    %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%edx
add    $0x2,%edx
movslq %edx,%rdx
movzbl (%rcx,%rdx,1),%ecx
shl    $0x10,%ecx
add    %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%edx
add    $0x3,%edx
movslq %edx,%rdx
movzbl (%rcx,%rdx,1),%ecx
shl    $0x18,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_marker>:
movslq %esi,%rax
mov    (%rdi,%rax,1),%eax
ret

LLVM IR (-O0):
define i32 @read_marker(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = load i8*, i8** %3
%12 = load i32, i32* %4
%13 = add nsw i32 %12, 1
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %11, i64 %14
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = add nsw i32 %10, %18
%20 = load i8*, i8** %3
%21 = load i32, i32* %4
%22 = add nsw i32 %21, 2
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %20, i64 %23
%25 = load i8, i8* %24
%26 = zext i8 %25 to i32
%27 = shl i32 %26, 16
%28 = add nsw i32 %19, %27
%29 = load i8*, i8** %3
%30 = load i32, i32* %4
%31 = add nsw i32 %30, 3
%32 = sext i32 %31 to i64
%33 = getelementptr inbounds i8, i8* %29, i64 %32
%34 = load i8, i8* %33
%35 = zext i8 %34 to i32
%36 = shl i32 %35, 24
%37 = add nsw i32 %28, %36
ret i32 %37
}

LLVM IR (-O2):
define i32 @read_marker(i8* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = add nsw i32 %1, 1
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = shl nuw nsw i32 %11, 8
%13 = or i32 %12, %6
%14 = add nsw i32 %1, 2
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %0, i64 %15
%17 = load i8, i8* %16
%18 = zext i8 %17 to i32
%19 = shl nuw nsw i32 %18, 16
%20 = or i32 %13, %19
%21 = add nsw i32 %1, 3
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %0, i64 %22
%24 = load i8, i8* %23
%25 = zext i8 %24 to i32
%26 = shl nuw i32 %25, 24
%27 = or i32 %20, %26
ret i32 %27
}
int fold(c)
char c;
{
  if (c < 'A' || c > 'Z')
    return (c);
  return (c | 040);
}


x86 assembly (clang, -O0):
<fold>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     1124 <fold+0x24>
movsbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jle    1130 <fold+0x30>
movsbl -0x5(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    113a <fold+0x3a>
movsbl -0x5(%rbp),%eax
or     $0x20,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fold>:
movsbl %dil,%ecx
shl    $0x18,%edi
add    $0xa5ffffff,%edi
mov    %ecx,%eax
or     $0x20,%eax
cmp    $0xe6ffffff,%edi
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @fold(i32 %0) {
%2 = alloca i32
%3 = alloca i8
%4 = trunc i32 %0 to i8
store i8 %4, i8* %3
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
%7 = icmp slt i32 %6, 65
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = load i8, i8* %3
%10 = sext i8 %9 to i32
%11 = icmp sgt i32 %10, 90
br i1 %11, label %12, label %15
12: ; preds = %8, %1
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
store i32 %14, i32* %2
br label %19
15: ; preds = %8
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = or i32 %17, 32
store i32 %18, i32* %2
br label %19
19: ; preds = %15, %12
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @fold(i32 %0) {
%2 = shl i32 %0, 24
%3 = ashr exact i32 %2, 24
%4 = add i32 %2, -1509949441
%5 = icmp ult i32 %4, -419430401
%6 = or i32 %3, 32
%7 = select i1 %5, i32 %3, i32 %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ my_putstr(char *);
void game_over() {
  my_putstr("\n     Powered bertoc_t\n\n\n\n\n");
  my_putstr("\e[0m");
  exit(0);
}


x86 assembly (clang, -O0):
<game_over>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <my_putstr@plt>
lea    0xee5(%rip),%rdi
call   1030 <my_putstr@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<game_over>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <my_putstr@plt>
lea    0xee8(%rip),%rdi
call   1030 <my_putstr@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"\0A Powered bertoc_t\0A\0A\0A\0A\0A\00"
@.str.1 = [5 x i8] c"\1B[0m\00"
define void @game_over() {
%1 = call i32 @my_putstr(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @my_putstr(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [28 x i8] c"\0A Powered bertoc_t\0A\0A\0A\0A\0A\00"
@.str.1 = [5 x i8] c"\1B[0m\00"
define void @game_over() {
%1 = tail call i32 @my_putstr(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @my_putstr(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @exit(i32 0)
unreachable
}
int cycle_is_check_border_l(unsigned int flags, int csel) {
  if (flags & 0x80000000) {
    return (flags & 0x20000000) ? csel : !csel;
  }
  return 0;
}


x86 assembly (clang, -O0):
<cycle_is_check_border_l>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    $0x80000000,%eax
cmp    $0x0,%eax
je     1153 <cycle_is_check_border_l+0x53>
mov    -0x8(%rbp),%eax
and    $0x20000000,%eax
cmp    $0x0,%eax
je     1137 <cycle_is_check_border_l+0x37>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1148 <cycle_is_check_border_l+0x48>
cmpl   $0x0,-0xc(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115a <cycle_is_check_border_l+0x5a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cycle_is_check_border_l>:
xor    %eax,%eax
test   %edi,%edi
js     1107 <cycle_is_check_border_l+0x7>
ret
xor    %eax,%eax
test   %esi,%esi
sete   %al
test   $0x20000000,%edi
cmovne %esi,%eax
ret

LLVM IR (-O0):
define i32 @cycle_is_check_border_l(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = and i32 %6, -2147483648
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %22
9: ; preds = %2
%10 = load i32, i32* %4
%11 = and i32 %10, 536870912
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %9
%14 = load i32, i32* %5
br label %20
15: ; preds = %9
%16 = load i32, i32* %5
%17 = icmp ne i32 %16, 0
%18 = xor i1 %17, true
%19 = zext i1 %18 to i32
br label %20
20: ; preds = %15, %13
%21 = phi i32 [ %14, %13 ], [ %19, %15 ]
store i32 %21, i32* %3
br label %23
22: ; preds = %2
store i32 0, i32* %3
br label %23
23: ; preds = %22, %20
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @cycle_is_check_border_l(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, -1
br i1 %3, label %10, label %4
4: ; preds = %2
%5 = and i32 %0, 536870912
%6 = icmp eq i32 %5, 0
%7 = icmp eq i32 %1, 0
%8 = zext i1 %7 to i32
%9 = select i1 %6, i32 %8, i32 %1
br label %10
10: ; preds = %2, %4
%11 = phi i32 [ %9, %4 ], [ 0, %2 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *, char *, char *, char *,
                          char *);
void debugerr(char *color, char *name, char *str) {
  if (1) {
    printf("[%s%s%s] [%s!%s] %s\n", color, name, "\e[39m", "\e[31m", "\e[39m",
           str);
  }
}


x86 assembly (clang, -O0):
<debugerr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rax
lea    0xec9(%rip),%rdi
lea    0xed7(%rip),%r9
lea    0xed6(%rip),%r8
mov    %r9,%rcx
mov    %rax,(%rsp)
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<debugerr>:
push   %rax
mov    %rsi,%rax
mov    %rdi,%rsi
mov    %rdx,(%rsp)
lea    0xede(%rip),%rdi
lea    0xef2(%rip),%r8
lea    0xee5(%rip),%rcx
mov    %rax,%rdx
mov    %rcx,%r9
call   1030 <printf@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [21 x i8] c"[%s%s%s] [%s!%s] %s\0A\00"
@.str.1 = [6 x i8] c"\1B[39m\00"
@.str.2 = [6 x i8] c"\1B[31m\00"
define void @debugerr(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %7, i8* %8, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* %9)
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"[%s%s%s] [%s!%s] %s\0A\00"
@.str.1 = [6 x i8] c"\1B[39m\00"
@.str.2 = [6 x i8] c"\1B[31m\00"
define void @debugerr(i8* %0, i8* %1, i8* %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* %2)
ret void
}
/* Variables and functions */
size_t ehnlc_strlen(int /*<<< orphan*/);
int /*<<< orphan*/ ehnlc_strncpy(char *, char const *, size_t);
size_t ehnlc_strxfrm(char *dest, const char *src, size_t n) {
  return ehnlc_strlen(ehnlc_strncpy(dest, src, n));
}


x86 assembly (clang, -O0):
<ehnlc_strxfrm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <ehnlc_strncpy@plt>
mov    %eax,%edi
call   1030 <ehnlc_strlen@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ehnlc_strxfrm>:
push   %rax
call   1040 <ehnlc_strncpy@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <ehnlc_strlen@plt>

LLVM IR (-O0):
define i64 @ehnlc_strxfrm(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @ehnlc_strncpy(i8* %7, i8* %8, i64 %9)
%11 = call i64 @ehnlc_strlen(i32 %10)
ret i64 %11
}

LLVM IR (-O2):
define i64 @ehnlc_strxfrm(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @ehnlc_strncpy(i8* %0, i8* %1, i64 %2)
%5 = tail call i64 @ehnlc_strlen(i32 %4)
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, double *);
double getCartAccel(int cart) {
  double a;
  printf("Enter the acceleration of cart %d (m/s^2): ", cart);
  scanf("%lf", &a);
  return a;
}


x86 assembly (clang, -O0):
<getCartAccel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
lea    0xeeb(%rip),%rdi
lea    -0x10(%rbp),%rsi
call   1040 <scanf@plt>
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getCartAccel>:
push   %rax
mov    %edi,%esi
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
lea    0xef6(%rip),%rdi
mov    %rsp,%rsi
call   1040 <scanf@plt>
movsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@.str = [44 x i8] c"Enter the acceleration of cart %d (m/s^2): \00"
@.str.1 = [4 x i8] c"%lf\00"
define double @getCartAccel(i32 %0) {
%2 = alloca i32
%3 = alloca double
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), double* %3)
%7 = load double, double* %3
ret double %7
}

LLVM IR (-O2):
@.str = [44 x i8] c"Enter the acceleration of cart %d (m/s^2): \00"
@.str.1 = [4 x i8] c"%lf\00"
define double @getCartAccel(i32 %0) {
%2 = alloca double
%3 = bitcast double* %2 to i8*
%4 = tail call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i32 %0)
%5 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), double* %2)
%6 = load double, double* %2
ret double %6
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint32_t;
typedef int /*<<< orphan*/ tmp;

/* Variables and functions */
int /*<<< orphan*/ ivory_serialize_pack_prim_4_le(int /*<<< orphan*/ *,
                                                  int /*<<< orphan*/ *);
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ **, int const *, int);
void ivory_serialize_pack_uint32_le(uint8_t *dst, uint32_t offs,
                                    const uint32_t *src) {
  uint8_t tmp[4] = {0};
  memcpy(&tmp, src, sizeof(tmp));
  ivory_serialize_pack_prim_4_le(dst + offs, tmp);
}


x86 assembly (clang, -O0):
<ivory_serialize_pack_uint32_le>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
lea    -0x30(%rbp),%rdi
xor    %esi,%esi
mov    $0x10,%edx
call   1040 <memset@plt>
lea    -0x30(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    $0x10,%edx
call   1050 <memcpy@plt>
mov    -0x8(%rbp),%rdi
movslq -0xc(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rdi
lea    -0x30(%rbp),%rsi
call   1030 <ivory_serialize_pack_prim_4_le@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ivory_serialize_pack_uint32_le>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %esi,%ebx
mov    %rdi,%r14
xorps  %xmm0,%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%r15
mov    %r15,%rdi
mov    %rdx,%rsi
mov    $0x10,%edx
call   1040 <memcpy@plt>
movslq %ebx,%rax
lea    (%r14,%rax,4),%rdi
mov    %r15,%rsi
call   1030 <ivory_serialize_pack_prim_4_le@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @ivory_serialize_pack_uint32_le(i32* %0, i32 %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32*
%7 = alloca [4 x i32]
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%8 = bitcast [4 x i32]* %7 to i8*
%9 = bitcast [4 x i32]* %7 to i32**
%10 = load i32*, i32** %6
%11 = call i32 @memcpy(i32** %9, i32* %10, i32 16)
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
%16 = getelementptr inbounds [4 x i32], [4 x i32]* %7, i64 0, i64 0
%17 = call i32 @ivory_serialize_pack_prim_4_le(i32* %15, i32* %16)
ret void
}

LLVM IR (-O2):
define void @ivory_serialize_pack_uint32_le(i32* %0, i32 %1, i32* %2) {
%4 = alloca [4 x i32]
%5 = bitcast [4 x i32]* %4 to i8*
%6 = bitcast [4 x i32]* %4 to i32**
%7 = call i32 @memcpy(i32** %6, i32* %2, i32 16)
%8 = sext i32 %1 to i64
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = getelementptr inbounds [4 x i32], [4 x i32]* %4, i64 0, i64 0
%11 = call i32 @ivory_serialize_pack_prim_4_le(i32* %9, i32* %10)
ret void
}
/* Variables and functions */
char *skip_non_whitespace(char const *);
char *skip_whitespace(char const *);
char *skip_word(const char str[]) {
  str = skip_non_whitespace(str);
  return skip_whitespace(str);
}


x86 assembly (clang, -O0):
<skip_word>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <skip_non_whitespace@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <skip_whitespace@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_word>:
push   %rax
call   1040 <skip_non_whitespace@plt>
mov    %rax,%rdi
pop    %rax
jmp    1030 <skip_whitespace@plt>

LLVM IR (-O0):
define i8* @skip_word(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @skip_non_whitespace(i8* %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
%6 = call i8* @skip_whitespace(i8* %5)
ret i8* %6
}

LLVM IR (-O2):
define i8* @skip_word(i8* %0) {
%2 = tail call i8* @skip_non_whitespace(i8* %0)
%3 = tail call i8* @skip_whitespace(i8* %2)
ret i8* %3
}
void __attribute__((no)) HEX00_unicodeInit(void) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @HEX00_unicodeInit() {
ret void
}

LLVM IR (-O2):
define void @HEX00_unicodeInit() {
ret void
}
/* Type definitions */
struct S {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ f(int, struct S *);
void g(int x, struct S *out) { f(x, out); }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
jmp    1030 <f@plt>

LLVM IR (-O0):
%struct.S = type { i32 }
define void @g(i32 %0, %struct.S* %1) {
%3 = alloca i32
%4 = alloca %struct.S*
store i32 %0, i32* %3
store %struct.S* %1, %struct.S** %4
%5 = load i32, i32* %3
%6 = load %struct.S*, %struct.S** %4
%7 = call i32 @f(i32 %5, %struct.S* %6)
ret void
}

LLVM IR (-O2):
%struct.S = type { i32 }
define void @g(i32 %0, %struct.S* %1) {
%3 = tail call i32 @f(i32 %0, %struct.S* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FRAG_APPEND_1_CHAR(int);
void out_one(int byte) { FRAG_APPEND_1_CHAR(byte); }


x86 assembly (clang, -O0):
<out_one>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <FRAG_APPEND_1_CHAR@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<out_one>:
jmp    1030 <FRAG_APPEND_1_CHAR@plt>

LLVM IR (-O0):
define void @out_one(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @FRAG_APPEND_1_CHAR(i32 %3)
ret void
}

LLVM IR (-O2):
define void @out_one(i32 %0) {
%2 = tail call i32 @FRAG_APPEND_1_CHAR(i32 %0)
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void LCDRasterSubPanelDisable(uint32_t ui32Base) {
  ;
  (*((volatile unsigned long *)(ui32Base + 0x00000038))) &= ~0x80000000;
}


x86 assembly (clang, -O0):
<LCDRasterSubPanelDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x38(%rax),%rcx
and    $0x7fffffff,%rcx
mov    %rcx,0x38(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCDRasterSubPanelDisable>:
andq   $0x7fffffff,0x38(%rdi)
7f
ret

LLVM IR (-O0):
define void @LCDRasterSubPanelDisable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 56
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, 2147483647
store volatile i64 %7, i64* %5
ret void
}

LLVM IR (-O2):
define void @LCDRasterSubPanelDisable(i64 %0) {
%2 = add nsw i64 %0, 56
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = and i64 %4, 2147483647
store volatile i64 %5, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ do_a();
int /*<<< orphan*/ do_d();
int /*<<< orphan*/ do_e();
void test_for() {
  int i;
  do_a();
  for (i = 14; i < 232; i *= 3)
    do_d();
  do_e();
}


x86 assembly (clang, -O0):
<test_for>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <do_a@plt>
movl   $0xe,-0x4(%rbp)
cmpl   $0xe8,-0x4(%rbp)
jge    1166 <test_for+0x36>
mov    $0x0,%al
call   1040 <do_d@plt>
imul   $0x3,-0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1146 <test_for+0x16>
mov    $0x0,%al
call   1030 <do_e@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_for>:
push   %rax
xor    %eax,%eax
call   1050 <do_a@plt>
xor    %eax,%eax
call   1040 <do_d@plt>
xor    %eax,%eax
call   1040 <do_d@plt>
xor    %eax,%eax
call   1040 <do_d@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <do_e@plt>

LLVM IR (-O0):
define void @test_for() {
%1 = alloca i32
%2 = call i32 (...) @do_a()
store i32 14, i32* %1
br label %3
3: ; preds = %8, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 232
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = call i32 (...) @do_d()
br label %8
8: ; preds = %6
%9 = load i32, i32* %1
%10 = mul nsw i32 %9, 3
store i32 %10, i32* %1
br label %3
11: ; preds = %3
%12 = call i32 (...) @do_e()
ret void
}

LLVM IR (-O2):
define void @test_for() {
%1 = tail call i32 (...) @do_a()
%2 = tail call i32 (...) @do_d()
%3 = tail call i32 (...) @do_d()
%4 = tail call i32 (...) @do_d()
%5 = tail call i32 (...) @do_e()
ret void
}
int DeAssignService(char *s) { return (0); }


x86 assembly (clang, -O0):
<DeAssignService>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DeAssignService>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @DeAssignService(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @DeAssignService(i8* nocapture readnone %0) {
ret i32 0
}
int main() {
  __asm__("pushf\n"
          "orl $0x40000,(%rsp)\n"
          "popf");
  *(int *)0xdeadcee9 = 3;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
pushf
orl    $0x40000,(%rsp)
popf
mov    $0xdeadcee9,%eax
movl   $0x3,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
pushf
orl    $0x40000,(%rsp)
popf
mov    $0xdeadcee9,%eax
movl   $0x3,(%rax)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
store i32 3, i32* inttoptr (i64 3735932649 to i32*)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
tail call void asm sideeffect "pushf\0Aorl $$0x40000,(%rsp)\0Apopf", "~{dirflag},~{fpsr},~{flags}"()
store i32 3, i32* inttoptr (i64 3735932649 to i32*)
ret i32 0
}
/* Variables and functions */
double rgamma(double, double);
double betasim(double a[]) {
  double x1, x2;
  x1 = rgamma(a[0], 1.0);
  x2 = rgamma(a[1], 1.0);
  return x1 / (x1 + x2);
}


x86 assembly (clang, -O0):
<betasim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
movsd  0xed4(%rip),%xmm1
call   1030 <rgamma@plt>
movsd  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
movsd  0xeb9(%rip),%xmm1
call   1030 <rgamma@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
addsd  -0x18(%rbp),%xmm1
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<betasim>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movsd  (%rdi),%xmm0
movsd  0xedc(%rip),%xmm1
call   1030 <rgamma@plt>
movsd  %xmm0,0x8(%rsp)
movsd  0x8(%rbx),%xmm0
movsd  0xec4(%rip),%xmm1
call   1030 <rgamma@plt>
movsd  0x8(%rsp),%xmm1
addsd  %xmm1,%xmm0
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define double @betasim(double* %0) {
%2 = alloca double*
%3 = alloca double
%4 = alloca double
store double* %0, double** %2
%5 = load double*, double** %2
%6 = getelementptr inbounds double, double* %5, i64 0
%7 = load double, double* %6
%8 = call double @rgamma(double %7, double 1.000000e+00)
store double %8, double* %3
%9 = load double*, double** %2
%10 = getelementptr inbounds double, double* %9, i64 1
%11 = load double, double* %10
%12 = call double @rgamma(double %11, double 1.000000e+00)
store double %12, double* %4
%13 = load double, double* %3
%14 = load double, double* %3
%15 = load double, double* %4
%16 = fadd double %14, %15
%17 = fdiv double %13, %16
ret double %17
}

LLVM IR (-O2):
define double @betasim(double* nocapture %0) {
%2 = load double, double* %0
%3 = tail call double @rgamma(double %2, double 1.000000e+00)
%4 = getelementptr inbounds double, double* %0, i64 1
%5 = load double, double* %4
%6 = tail call double @rgamma(double %5, double 1.000000e+00)
%7 = fadd double %3, %6
%8 = fdiv double %3, %7
ret double %8
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0xff() {
  Assert_real((isupper(255) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              1280, ("isupper should be 0 for 0xff"));
}


x86 assembly (clang, -O0):
<t_isupper_0xff>:
push   %rbp
mov    %rsp,%rbp
mov    $0xff,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x500,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0xff>:
push   %rax
mov    $0xff,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x500,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0xff\00"
define void @t_isupper_0xff() {
%1 = call i64 @isupper(i32 255)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1280, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0xff\00"
define void @t_isupper_0xff() {
%1 = tail call i64 @isupper(i32 255)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1280, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void fd216(int n) {
P0A:
  goto P0A;
  {
    typedef int(*b)[n];
  P01A:
    goto P01A;
    {
      typedef int(*c)[n];
    P012A:
      goto P012A;
      0;
    }
  P01B:
    goto P01B;
    {
      typedef int(*d)[n];
    P013A:
      goto P013A;
      0;
    }
  P01C:
    goto P01C;
    ;
    typedef int(*e)[n];
  P014A:
    goto P014A;
    0;
  };
P0B:
  goto P0B;
  {
    typedef int(*f)[n];
  P02A:
    goto P02A;
    {
      typedef int(*g)[n];
    P024A:
      goto P024A;
      0;
    };
  P02B:
    goto P02B;
    {
      typedef int(*h)[n];
    P025A:
      goto P025A;
      0;
    };
  p02C:
    goto p02C;
    goto a;
  a:;
    typedef int(*i)[n];
  P026A:
    goto P026A;
    0;
  };
P0C:
  goto P0C;
  ;
  typedef int(*j)[n];
P03A:
  goto P03A;
  0;
P03B:
  goto P03B;
}


x86 assembly (clang, -O0):
<fd216>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fd216+0x7>

x86 assembly (clang, -O2):
<fd216>:
jmp    1100 <fd216>

LLVM IR (-O0):
define void @fd216(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %3, %1
br label %3
4: ; No predecessors!
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
br label %7
7: ; preds = %7, %4
br label %7
8: ; No predecessors!
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
br label %11
11: ; preds = %11, %8
br label %11
12: ; preds = %12
br label %12
13: ; No predecessors!
%14 = load i32, i32* %2
%15 = zext i32 %14 to i64
br label %16
16: ; preds = %16, %13
br label %16
17: ; preds = %17
br label %17
18: ; No predecessors!
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
br label %21
21: ; preds = %21, %18
br label %21
22: ; preds = %22
br label %22
23: ; No predecessors!
%24 = load i32, i32* %2
%25 = zext i32 %24 to i64
br label %26
26: ; preds = %26, %23
br label %26
27: ; No predecessors!
%28 = load i32, i32* %2
%29 = zext i32 %28 to i64
br label %30
30: ; preds = %30, %27
br label %30
31: ; preds = %31
br label %31
32: ; No predecessors!
%33 = load i32, i32* %2
%34 = zext i32 %33 to i64
br label %35
35: ; preds = %35, %32
br label %35
36: ; preds = %36
br label %36
37: ; No predecessors!
%38 = load i32, i32* %2
%39 = zext i32 %38 to i64
br label %40
40: ; preds = %40, %37
br label %40
41: ; preds = %41
br label %41
42: ; No predecessors!
%43 = load i32, i32* %2
%44 = zext i32 %43 to i64
br label %45
45: ; preds = %45, %42
br label %45
46: ; preds = %46
br label %46
}

LLVM IR (-O2):
define void @fd216(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
void pollen_interfaces_Led_on__E() {}


x86 assembly (clang, -O0):
<pollen_interfaces_Led_on__E>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pollen_interfaces_Led_on__E>:
ret

LLVM IR (-O0):
define void @pollen_interfaces_Led_on__E() {
ret void
}

LLVM IR (-O2):
define void @pollen_interfaces_Led_on__E() {
ret void
}
void XReconfigureWMWindow() {}


x86 assembly (clang, -O0):
<XReconfigureWMWindow>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XReconfigureWMWindow>:
ret

LLVM IR (-O0):
define void @XReconfigureWMWindow() {
ret void
}

LLVM IR (-O2):
define void @XReconfigureWMWindow() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ error1(char *, int /*<<< orphan*/ *);
void error(char *fmt) { error1(fmt, NULL); }


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <error1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<error>:
xor    %esi,%esi
jmp    1030 <error1@plt>

LLVM IR (-O0):
define void @error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @error1(i8* %3, i32* null)
ret void
}

LLVM IR (-O2):
define void @error(i8* %0) {
%2 = tail call i32 @error1(i8* %0, i32* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void ft_freesplit(void **array) {
  void *tmp;
  tmp = array;
  while (*array) {
    free(*array);
    (array)++;
  }
  free(tmp);
}


x86 assembly (clang, -O0):
<ft_freesplit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     114f <ft_freesplit+0x3f>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x8(%rbp)
jmp    1124 <ft_freesplit+0x14>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_freesplit>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1141 <ft_freesplit+0x31>
lea    0x8(%r14),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
call   1030 <free@plt>
mov    (%rbx),%rdi
add    $0x8,%rbx
test   %rdi,%rdi
jne    1130 <ft_freesplit+0x20>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @ft_freesplit(i8** %0) {
%2 = alloca i8**
%3 = alloca i8*
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = bitcast i8** %4 to i8*
store i8* %5, i8** %3
br label %6
6: ; preds = %10, %1
%7 = load i8**, i8*** %2
%8 = load i8*, i8** %7
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i8**, i8*** %2
%12 = load i8*, i8** %11
%13 = call i32 @free(i8* %12)
%14 = load i8**, i8*** %2
%15 = getelementptr inbounds i8*, i8** %14, i32 1
store i8** %15, i8*** %2
br label %6
16: ; preds = %6
%17 = load i8*, i8** %3
%18 = call i32 @free(i8* %17)
ret void
}

LLVM IR (-O2):
define void @ft_freesplit(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = icmp eq i8* %2, null
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %9, %4 ], [ %2, %1 ]
%6 = phi i8** [ %8, %4 ], [ %0, %1 ]
%7 = tail call i32 @free(i8* %5)
%8 = getelementptr inbounds i8*, i8** %6, i64 1
%9 = load i8*, i8** %8
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = bitcast i8** %0 to i8*
%13 = tail call i32 @free(i8* %12)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ printf(char *, int);
int pthread_mutex_lock(int /*<<< orphan*/ *);
void lock(pthread_mutex_t *mutex) {
  int err = 0;
  if ((err = pthread_mutex_lock(mutex)) != 0) {
    printf("Failed to aquire globbal lock %d\n", err);
    abort();
  }
}


x86 assembly (clang, -O0):
<lock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <pthread_mutex_lock@plt>
mov    %eax,-0xc(%rbp)
cmp    $0x0,%eax
je     116e <lock+0x3e>
mov    -0xc(%rbp),%esi
lea    0xe9e(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lock>:
push   %rax
call   1050 <pthread_mutex_lock@plt>
test   %eax,%eax
jne    113c <lock+0xc>
pop    %rax
ret
lea    0xebd(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"Failed to aquire globbal lock %d\0A\00"
define void @lock(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
%4 = load i32*, i32** %2
%5 = call i32 @pthread_mutex_lock(i32* %4)
store i32 %5, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i32, i32* %3
%9 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i32 %8)
%10 = call i32 (...) @abort()
unreachable
11: ; preds = %1
ret void
}

LLVM IR (-O2):
@.str = [34 x i8] c"Failed to aquire globbal lock %d\0A\00"
define void @lock(i32* %0) {
%2 = tail call i32 @pthread_mutex_lock(i32* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i32 %2)
%6 = tail call i32 (...) @abort()
unreachable
7: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ F_SETLK;
int /*<<< orphan*/ F_WRLCK;
int get_file_lock(int, int /*<<< orphan*/, int /*<<< orphan*/);
int get_write_lock(int fd) { return (get_file_lock(fd, F_SETLK, F_WRLCK)); }


x86 assembly (clang, -O0):
<get_write_lock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ec3(%rip),%rax
mov    (%rax),%esi
mov    0x2eaa(%rip),%rax
mov    (%rax),%edx
call   1030 <get_file_lock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_write_lock>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
mov    0x2eb8(%rip),%rax
mov    (%rax),%edx
jmp    1030 <get_file_lock@plt>

LLVM IR (-O0):
@F_SETLK = global i32 0
@F_WRLCK = global i32 0
define i32 @get_write_lock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @F_SETLK
%5 = load i32, i32* @F_WRLCK
%6 = call i32 @get_file_lock(i32 %3, i32 %4, i32 %5)
ret i32 %6
}

LLVM IR (-O2):
@F_SETLK = global i32 0
@F_WRLCK = global i32 0
define i32 @get_write_lock(i32 %0) {
%2 = load i32, i32* @F_SETLK
%3 = load i32, i32* @F_WRLCK
%4 = tail call i32 @get_file_lock(i32 %0, i32 %2, i32 %3)
ret i32 %4
}