xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ scanf(char *, int *);
int /*<<< orphan*/ test_case(int);
int main() {
  int n;
  scanf("%d", &n);
  for (int i = 1; i <= n; i++)
    test_case(i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1168 <main+0x48>
mov    -0xc(%rbp),%edi
call   1030 <test_case@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1146 <main+0x26>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xed4(%rip),%rdi
lea    0xc(%rsp),%rsi
call   1040 <scanf@plt>
cmpl   $0x0,0xc(%rsp)
jle    1150 <main+0x30>
xor    %ebx,%ebx
nop
add    $0x1,%ebx
mov    %ebx,%edi
call   1030 <test_case@plt>
cmp    0xc(%rsp),%ebx
jl     1140 <main+0x20>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
store i32 1, i32* %3
br label %5
5: ; preds = %12, %0
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp sle i32 %6, %7
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i32, i32* %3
%11 = call i32 @test_case(i32 %10)
br label %12
12: ; preds = %9
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %5
15: ; preds = %5
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %7, %0
ret i32 0
7: ; preds = %0, %7
%8 = phi i32 [ %10, %7 ], [ 1, %0 ]
%9 = call i32 @test_case(i32 %8)
%10 = add nuw nsw i32 %8, 1
%11 = load i32, i32* %1
%12 = icmp slt i32 %8, %11
br i1 %12, label %7, label %6
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0xb5() {
  Assert_real((isdigit(181) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              910, ("isdigit should be 0 for 0xb5"));
}


x86 assembly (clang, -O0):
<t_isdigit_0xb5>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb5,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x38e,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0xb5>:
push   %rax
mov    $0xb5,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x38e,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0xb5\00"
define void @t_isdigit_0xb5() {
%1 = call i64 @isdigit(i32 181)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 910, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0xb5\00"
define void @t_isdigit_0xb5() {
%1 = tail call i64 @isdigit(i32 181)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 910, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t *HadTu_hdr(const void *my) { return (uint32_t *)my; }


x86 assembly (clang, -O0):
<HadTu_hdr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HadTu_hdr>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i32* @HadTu_hdr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
ret i32* %4
}

LLVM IR (-O2):
define i32* @HadTu_hdr(i8* readnone %0) {
%2 = bitcast i8* %0 to i32*
ret i32* %2
}
/* Variables and functions */
double exp(double);
double fabs(double);
double inverse_haldane(double d) { return 0.5 * (1.0 - exp(-fabs(d) / 50.0)); }


x86 assembly (clang, -O0):
<inverse_haldane>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movaps 0xef7(%rip),%xmm1
pand   %xmm1,%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  0xec4(%rip),%xmm1
divsd  %xmm1,%xmm0
call   1030 <exp@plt>
movsd  0xeab(%rip),%xmm1
subsd  %xmm0,%xmm1
movsd  0xe97(%rip),%xmm0
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inverse_haldane>:
push   %rax
andpd  0xee7(%rip),%xmm0
divsd  0xeef(%rip),%xmm0
call   1030 <exp@plt>
movsd  0xeea(%rip),%xmm1
subsd  %xmm0,%xmm1
mulsd  0xee6(%rip),%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @inverse_haldane(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @llvm.fabs.f64(double %3)
%5 = fneg double %4
%6 = fdiv double %5, 5.000000e+01
%7 = call double @exp(double %6)
%8 = fsub double 1.000000e+00, %7
%9 = fmul double 5.000000e-01, %8
ret double %9
}

LLVM IR (-O2):
define double @inverse_haldane(double %0) {
%2 = tail call double @llvm.fabs.f64(double %0)
%3 = fdiv double %2, -5.000000e+01
%4 = tail call double @exp(double %3)
%5 = fsub double 1.000000e+00, %4
%6 = fmul double %5, 5.000000e-01
ret double %6
}
/* Variables and functions */
int /*<<< orphan*/ dcs_photonuclear_range(double, double, double *, double *);
int dcs_photonuclear_check(double m, double K, double q) {
  double qmin, qmax;
  dcs_photonuclear_range(m, K, &qmin, &qmax);
  return (q < qmin) || (q > qmax);
}


x86 assembly (clang, -O0):
<dcs_photonuclear_check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
lea    -0x20(%rbp),%rdi
lea    -0x28(%rbp),%rsi
call   1030 <dcs_photonuclear_range@plt>
movsd  -0x18(%rbp),%xmm1
movsd  -0x20(%rbp),%xmm0
mov    $0x1,%al
ucomisd %xmm1,%xmm0
mov    %al,-0x29(%rbp)
ja     1167 <dcs_photonuclear_check+0x57>
movsd  -0x18(%rbp),%xmm0
ucomisd -0x28(%rbp),%xmm0
seta   %al
mov    %al,-0x29(%rbp)
mov    -0x29(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dcs_photonuclear_check>:
sub    $0x18,%rsp
movsd  %xmm2,(%rsp)
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rsi
call   1030 <dcs_photonuclear_range@plt>
movsd  0x10(%rsp),%xmm0
movsd  (%rsp),%xmm1
ucomisd %xmm1,%xmm0
seta   %al
ucomisd 0x8(%rsp),%xmm1
seta   %cl
or     %al,%cl
movzbl %cl,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @dcs_photonuclear_check(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%9 = load double, double* %4
%10 = load double, double* %5
%11 = call i32 @dcs_photonuclear_range(double %9, double %10, double* %7, double* %8)
%12 = load double, double* %6
%13 = load double, double* %7
%14 = fcmp olt double %12, %13
br i1 %14, label %19, label %15
15: ; preds = %3
%16 = load double, double* %6
%17 = load double, double* %8
%18 = fcmp ogt double %16, %17
br label %19
19: ; preds = %15, %3
%20 = phi i1 [ true, %3 ], [ %18, %15 ]
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
define i32 @dcs_photonuclear_check(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = bitcast double* %4 to i8*
%7 = bitcast double* %5 to i8*
%8 = call i32 @dcs_photonuclear_range(double %0, double %1, double* %4, double* %5)
%9 = load double, double* %4
%10 = fcmp ogt double %9, %2
%11 = load double, double* %5
%12 = fcmp olt double %11, %2
%13 = select i1 %10, i1 true, i1 %12
%14 = zext i1 %13 to i32
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ runTests();
int main() {
  runTests();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <runTests@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <runTests@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @runTests()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @runTests()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ gen_call(char *);
int /*<<< orphan*/ gen_pop();
void gen_unsigned_less_or_equal(void) {
  gen_pop();
  gen_call("ccule");
}


x86 assembly (clang, -O0):
<gen_unsigned_less_or_equal>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <gen_pop@plt>
lea    0xece(%rip),%rdi
call   1040 <gen_call@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_unsigned_less_or_equal>:
push   %rax
xor    %eax,%eax
call   1030 <gen_pop@plt>
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1040 <gen_call@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"ccule\00"
define void @gen_unsigned_less_or_equal() {
%1 = call i32 (...) @gen_pop()
%2 = call i32 @gen_call(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"ccule\00"
define void @gen_unsigned_less_or_equal() {
%1 = tail call i32 (...) @gen_pop()
%2 = tail call i32 @gen_call(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SHM_RND;
int /*<<< orphan*/ ipc_shm_init(unsigned int, unsigned int);
scalar_t__ shmat(int /*<<< orphan*/, int /*<<< orphan*/ *, int /*<<< orphan*/);
unsigned char *init_shm(unsigned int u32key, unsigned int size) {
  unsigned char *pshm_buf = NULL;
  pshm_buf = (unsigned char *)shmat(ipc_shm_init(u32key, size), NULL, SHM_RND);
  return pshm_buf;
}


x86 assembly (clang, -O0):
<init_shm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <ipc_shm_init@plt>
mov    %eax,%edi
mov    0x2e9e(%rip),%rax
mov    (%rax),%edx
xor    %eax,%eax
mov    %eax,%esi
call   1030 <shmat@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_shm>:
push   %rax
call   1040 <ipc_shm_init@plt>
mov    0x2ebb(%rip),%rcx
mov    (%rcx),%edx
mov    %eax,%edi
xor    %esi,%esi
pop    %rax
jmp    1030 <shmat@plt>

LLVM IR (-O0):
@SHM_RND = global i32 0
define i8* @init_shm(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %3
store i32 %1, i32* %4
store i8* null, i8** %5
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @ipc_shm_init(i32 %6, i32 %7)
%9 = load i32, i32* @SHM_RND
%10 = call i64 @shmat(i32 %8, i32* null, i32 %9)
%11 = inttoptr i64 %10 to i8*
store i8* %11, i8** %5
%12 = load i8*, i8** %5
ret i8* %12
}

LLVM IR (-O2):
@SHM_RND = global i32 0
define i8* @init_shm(i32 %0, i32 %1) {
%3 = tail call i32 @ipc_shm_init(i32 %0, i32 %1)
%4 = load i32, i32* @SHM_RND
%5 = tail call i64 @shmat(i32 %3, i32* null, i32 %4)
%6 = inttoptr i64 %5 to i8*
ret i8* %6
}
int canmgr_maxdata(int object) { return (object >= 3) ? 7 : 8; }


x86 assembly (clang, -O0):
<canmgr_maxdata>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0x8,%eax
mov    $0x7,%ecx
cmp    $0x3,%edx
cmovge %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<canmgr_maxdata>:
xor    %ecx,%ecx
cmp    $0x3,%edi
setge  %cl
mov    $0x8,%eax
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @canmgr_maxdata(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 3
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 7, i32 8
ret i32 %6
}

LLVM IR (-O2):
define i32 @canmgr_maxdata(i32 %0) {
%2 = icmp sgt i32 %0, 2
%3 = select i1 %2, i32 7, i32 8
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ DIR;

/* Variables and functions */
int /*<<< orphan*/ next_fdopendir(int);
int /*<<< orphan*/ *opendir_common(int /*<<< orphan*/);
DIR *fdopendir(int fd) { return opendir_common(next_fdopendir(fd)); }


x86 assembly (clang, -O0):
<fdopendir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <next_fdopendir@plt>
mov    %eax,%edi
call   1040 <opendir_common@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdopendir>:
push   %rax
call   1030 <next_fdopendir@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <opendir_common@plt>

LLVM IR (-O0):
define i32* @fdopendir(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @next_fdopendir(i32 %3)
%5 = call i32* @opendir_common(i32 %4)
ret i32* %5
}

LLVM IR (-O2):
define i32* @fdopendir(i32 %0) {
%2 = tail call i32 @next_fdopendir(i32 %0)
%3 = tail call i32* @opendir_common(i32 %2)
ret i32* %3
}
int test_imm_32uint8_mem(unsigned char *val) {
  return ((*val) & (-0x32 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_32uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffffce,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_32uint8_mem>:
testb  $0xce,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_32uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -50
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_32uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -50
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int test_imm_01uint8_mem(unsigned char *val) {
  return ((*val) & (-0x01 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_01uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffffff,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_01uint8_mem>:
cmpb   $0x0,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_01uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -1
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_01uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ O_RDONLY;
int open(char *, int /*<<< orphan*/);
size_t read(int, char *, size_t);
int get_cur_clocksource(char *buf, size_t size) {
  int fd;
  fd = open("/sys/devices/system/clocksource/clocksource0/current_clocksource",
            O_RDONLY);
  size = read(fd, buf, size);
  return 0;
}


x86 assembly (clang, -O0):
<get_cur_clocksource>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
lea    0xec0(%rip),%rdi
call   1040 <open@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <read@plt>
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_cur_clocksource>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    0x2eb7(%rip),%rax
mov    (%rax),%esi
lea    0xec6(%rip),%rdi
call   1040 <open@plt>
mov    %eax,%edi
mov    %rbx,%rsi
mov    %r14,%rdx
call   1030 <read@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [65 x i8] c"/sys/devices/system/clocksource/clocksource0/current_clocksource\00"
@O_RDONLY = global i32 0
define i32 @get_cur_clocksource(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i32
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i32, i32* @O_RDONLY
%7 = call i32 @open(i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i64 0, i64 0), i32 %6)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = load i8*, i8** %3
%10 = load i64, i64* %4
%11 = call i64 @read(i32 %8, i8* %9, i64 %10)
store i64 %11, i64* %4
ret i32 0
}

LLVM IR (-O2):
@.str = [65 x i8] c"/sys/devices/system/clocksource/clocksource0/current_clocksource\00"
@O_RDONLY = global i32 0
define i32 @get_cur_clocksource(i8* nocapture %0, i64 %1) {
%3 = load i32, i32* @O_RDONLY
%4 = tail call i32 @open(i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = tail call i64 @read(i32 %4, i8* %0, i64 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ mdea_error(char **, char *);
int mdea_object_node_get_string(void *p, const char **string, char **error) {
  mdea_error(error, "Expected string, got object");
  return -1;
}


x86 assembly (clang, -O0):
<mdea_object_node_get_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
lea    0xed1(%rip),%rsi
call   1030 <mdea_error@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdea_object_node_get_string>:
push   %rax
mov    %rdx,%rdi
lea    0xee5(%rip),%rsi
call   1030 <mdea_error@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"Expected string, got object\00"
define i32 @mdea_object_node_get_string(i8* %0, i8** %1, i8** %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i8** %2, i8*** %6
%7 = load i8**, i8*** %6
%8 = call i32 @mdea_error(i8** %7, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@.str = [28 x i8] c"Expected string, got object\00"
define i32 @mdea_object_node_get_string(i8* nocapture readnone %0, i8** nocapture readnone %1, i8** %2) {
%4 = tail call i32 @mdea_error(i8** %2, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}
/* Variables and functions */
int strcmp(char const *const, char const *const);
int compar(const void *a, const void *b) {
  return strcmp(*(const char *const *)a, *(const char *const *)b);
}


x86 assembly (clang, -O0):
<compar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compar>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @compar(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i8**
%7 = load i8*, i8** %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i8**
%10 = load i8*, i8** %9
%11 = call i32 @strcmp(i8* %7, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @compar(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %4, i8* dereferenceable(1) %6)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ cmd_vw_scanw(int, char **);
void cmd_vwscanw(int nargs, char **args) { cmd_vw_scanw(nargs, args); }


x86 assembly (clang, -O0):
<cmd_vwscanw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <cmd_vw_scanw@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_vwscanw>:
jmp    1030 <cmd_vw_scanw@plt>

LLVM IR (-O0):
define void @cmd_vwscanw(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i8**, i8*** %4
%7 = call i32 @cmd_vw_scanw(i32 %5, i8** %6)
ret void
}

LLVM IR (-O2):
define void @cmd_vwscanw(i32 %0, i8** %1) {
%3 = tail call i32 @cmd_vw_scanw(i32 %0, i8** %1)
ret void
}
int poww(int n) {
  int i = 1;
  while (n--)
    i = i * 2;
  return i;
}


x86 assembly (clang, -O0):
<poww>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
je     1130 <poww+0x30>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <poww+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<poww>:
test   %edi,%edi
je     1118 <poww+0x18>
lea    -0x1(%rdi),%eax
mov    %edi,%ecx
and    $0x7,%ecx
cmp    $0x7,%eax
jae    111e <poww+0x1e>
mov    $0x1,%eax
jmp    1138 <poww+0x38>
mov    $0x1,%eax
ret
and    $0xfffffff8,%edi
mov    $0x1,%eax
cs nopw 0x0(%rax,%rax,1)
shl    $0x8,%eax
add    $0xfffffff8,%edi
jne    1130 <poww+0x30>
test   %ecx,%ecx
je     1147 <poww+0x47>
nopl   0x0(%rax)
add    %eax,%eax
add    $0xffffffff,%ecx
jne    1140 <poww+0x40>
ret

LLVM IR (-O0):
define i32 @poww(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %2
%6 = add nsw i32 %5, -1
store i32 %6, i32* %2
%7 = icmp ne i32 %5, 0
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32, i32* %3
%10 = mul nsw i32 %9, 2
store i32 %10, i32* %3
br label %4
11: ; preds = %4
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @poww(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %25, label %3
3: ; preds = %1
%4 = add i32 %0, -1
%5 = and i32 %0, 7
%6 = icmp ult i32 %4, 7
br i1 %6, label %15, label %7
7: ; preds = %3
%8 = and i32 %0, -8
br label %9
9: ; preds = %9, %7
%10 = phi i32 [ 1, %7 ], [ %12, %9 ]
%11 = phi i32 [ 0, %7 ], [ %13, %9 ]
%12 = shl i32 %10, 8
%13 = add i32 %11, 8
%14 = icmp eq i32 %13, %8
br i1 %14, label %15, label %9
15: ; preds = %9, %3
%16 = phi i32 [ undef, %3 ], [ %12, %9 ]
%17 = phi i32 [ 1, %3 ], [ %12, %9 ]
%18 = icmp eq i32 %5, 0
br i1 %18, label %25, label %19
19: ; preds = %15, %19
%20 = phi i32 [ %22, %19 ], [ %17, %15 ]
%21 = phi i32 [ %23, %19 ], [ 0, %15 ]
%22 = shl nsw i32 %20, 1
%23 = add i32 %21, 1
%24 = icmp eq i32 %23, %5
br i1 %24, label %25, label %19
25: ; preds = %15, %19, %1
%26 = phi i32 [ 1, %1 ], [ %16, %15 ], [ %22, %19 ]
ret i32 %26
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ test76_ArrNoDim_foo__E();
int /*<<< orphan*/ test76_FcnArrParm_foo__E();
void test76_Test_pollen__run__E() {
  test76_ArrNoDim_foo__E();
  test76_FcnArrParm_foo__E();
  exit(0);
}


x86 assembly (clang, -O0):
<test76_Test_pollen__run__E>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <test76_ArrNoDim_foo__E@plt>
mov    $0x0,%al
call   1040 <test76_FcnArrParm_foo__E@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<test76_Test_pollen__run__E>:
push   %rax
xor    %eax,%eax
call   1030 <test76_ArrNoDim_foo__E@plt>
xor    %eax,%eax
call   1040 <test76_FcnArrParm_foo__E@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define void @test76_Test_pollen__run__E() {
%1 = call i32 (...) @test76_ArrNoDim_foo__E()
%2 = call i32 (...) @test76_FcnArrParm_foo__E()
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @test76_Test_pollen__run__E() {
%1 = tail call i32 (...) @test76_ArrNoDim_foo__E()
%2 = tail call i32 (...) @test76_FcnArrParm_foo__E()
%3 = tail call i32 @exit(i32 0)
unreachable
}
unsigned int __float_bits(float p) {
  union {
    float f;
    unsigned int bits;
  } conv;
  conv.f = p;
  return conv.bits;
}


x86 assembly (clang, -O0):
<__float_bits>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__float_bits>:
movd   %xmm0,%eax
ret

LLVM IR (-O0):
%union.anon = type { float }
define i32 @__float_bits(float %0) {
%2 = alloca float
%3 = alloca %union.anon
store float %0, float* %2
%4 = load float, float* %2
%5 = bitcast %union.anon* %3 to float*
store float %4, float* %5
%6 = bitcast %union.anon* %3 to i32*
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @__float_bits(float %0) {
%2 = bitcast float %0 to i32
ret i32 %2
}
/* Type definitions */
struct hostent {
  int dummy;
};
typedef enum nss_status { ____Placeholder_nss_status } nss_status;

/* Variables and functions */
int NSS_STATUS_UNAVAIL;
enum nss_status _nss_gns_gethostbyaddr_r(const void *addr, int len, int af,
                                         struct hostent *result, char *buffer,
                                         size_t buflen, int *errnop,
                                         int *h_errnop) {
  return NSS_STATUS_UNAVAIL;
}


x86 assembly (clang, -O0):
<_nss_gns_gethostbyaddr_r>:
push   %rbp
mov    %rsp,%rbp
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    0x2ebf(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_nss_gns_gethostbyaddr_r>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
%struct.hostent = type { i32 }
@NSS_STATUS_UNAVAIL = global i32 0
define i32 @_nss_gns_gethostbyaddr_r(i8* %0, i32 %1, i32 %2, %struct.hostent* %3, i8* %4, i64 %5, i32* %6, i32* %7) {
%9 = alloca i8*
%10 = alloca i32
%11 = alloca i32
%12 = alloca %struct.hostent*
%13 = alloca i8*
%14 = alloca i64
%15 = alloca i32*
%16 = alloca i32*
store i8* %0, i8** %9
store i32 %1, i32* %10
store i32 %2, i32* %11
store %struct.hostent* %3, %struct.hostent** %12
store i8* %4, i8** %13
store i64 %5, i64* %14
store i32* %6, i32** %15
store i32* %7, i32** %16
%17 = load i32, i32* @NSS_STATUS_UNAVAIL
ret i32 %17
}

LLVM IR (-O2):
%struct.hostent = type { i32 }
@NSS_STATUS_UNAVAIL = global i32 0
define i32 @_nss_gns_gethostbyaddr_r(i8* nocapture readnone %0, i32 %1, i32 %2, %struct.hostent* nocapture readnone %3, i8* nocapture readnone %4, i64 %5, i32* nocapture readnone %6, i32* nocapture readnone %7) {
%9 = load i32, i32* @NSS_STATUS_UNAVAIL
ret i32 %9
}
/* Variables and functions */
void *malloc(size_t);
void *Memento_malloc(size_t size) { return malloc(size); }


x86 assembly (clang, -O0):
<Memento_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Memento_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @Memento_malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @Memento_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
int LIBXSMM_INTRINSICS_BITSCANFWD32_SW(unsigned int n) {
  unsigned int i, r = 0;
  if (0 != n)
    for (i = 1; 0 == (n & i); i <<= 1) {
      ++r;
    }
  return r;
}


x86 assembly (clang, -O0):
<LIBXSMM_INTRINSICS_BITSCANFWD32_SW>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
xor    %eax,%eax
cmp    -0x4(%rbp),%eax
je     114c <LIBXSMM_INTRINSICS_BITSCANFWD32_SW+0x4c>
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%ecx
and    -0x8(%rbp),%ecx
xor    %eax,%eax
cmp    %ecx,%eax
jne    1147 <LIBXSMM_INTRINSICS_BITSCANFWD32_SW+0x47>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1120 <LIBXSMM_INTRINSICS_BITSCANFWD32_SW+0x20>
jmp    114c <LIBXSMM_INTRINSICS_BITSCANFWD32_SW+0x4c>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LIBXSMM_INTRINSICS_BITSCANFWD32_SW>:
xor    %eax,%eax
test   %edi,%edi
je     1129 <LIBXSMM_INTRINSICS_BITSCANFWD32_SW+0x29>
mov    %edi,%ecx
and    $0x1,%ecx
jne    1129 <LIBXSMM_INTRINSICS_BITSCANFWD32_SW+0x29>
mov    $0x1,%ecx
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
add    $0x1,%eax
add    %ecx,%ecx
test   %edi,%ecx
je     1120 <LIBXSMM_INTRINSICS_BITSCANFWD32_SW+0x20>
ret

LLVM IR (-O0):
define i32 @LIBXSMM_INTRINSICS_BITSCANFWD32_SW(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
%5 = load i32, i32* %2
%6 = icmp ne i32 0, %5
br i1 %6, label %7, label %20
7: ; preds = %1
store i32 1, i32* %3
br label %8
8: ; preds = %16, %7
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = and i32 %9, %10
%12 = icmp eq i32 0, %11
br i1 %12, label %13, label %19
13: ; preds = %8
%14 = load i32, i32* %4
%15 = add i32 %14, 1
store i32 %15, i32* %4
br label %16
16: ; preds = %13
%17 = load i32, i32* %3
%18 = shl i32 %17, 1
store i32 %18, i32* %3
br label %8
19: ; preds = %8
br label %20
20: ; preds = %19, %1
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @LIBXSMM_INTRINSICS_BITSCANFWD32_SW(i32 %0) {
%2 = icmp ne i32 %0, 0
%3 = and i32 %0, 1
%4 = icmp eq i32 %3, 0
%5 = and i1 %2, %4
br i1 %5, label %6, label %13
6: ; preds = %1, %6
%7 = phi i32 [ %9, %6 ], [ 0, %1 ]
%8 = phi i32 [ %10, %6 ], [ 1, %1 ]
%9 = add i32 %7, 1
%10 = shl i32 %8, 1
%11 = and i32 %10, %0
%12 = icmp eq i32 %11, 0
br i1 %12, label %6, label %13
13: ; preds = %6, %1
%14 = phi i32 [ 0, %1 ], [ %9, %6 ]
ret i32 %14
}
void Ptngc_widediv(unsigned int hi, unsigned int lo, const unsigned int i,
                   unsigned int *result, unsigned int *remainder) {
  __asm__ __volatile__("divl %%ecx\n\t"
                       : "=a"(lo), "=d"(hi)
                       : "a"(lo), "d"(hi), "c"(i)
                       : "cc");
  *result = lo;
  *remainder = hi;
}


x86 assembly (clang, -O0):
<Ptngc_widediv>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x4(%rbp),%edx
mov    -0xc(%rbp),%ecx
div    %ecx
mov    %eax,-0x8(%rbp)
mov    %edx,-0x4(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Ptngc_widediv>:
mov    %rcx,%r9
mov    %edx,%ecx
mov    %esi,%eax
mov    %edi,%edx
div    %ecx
mov    %eax,(%r9)
mov    %edx,(%r8)
ret

LLVM IR (-O0):
define void @Ptngc_widediv(i32 %0, i32 %1, i32 %2, i32* %3, i32* %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32*
%10 = alloca i32*
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32* %3, i32** %9
store i32* %4, i32** %10
%11 = load i32, i32* %7
%12 = load i32, i32* %6
%13 = load i32, i32* %8
%14 = call { i32, i32 } asm sideeffect "divl %ecx\0A\09", "={ax},={dx},{ax},{dx},{cx},~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %11, i32 %12, i32 %13)
%15 = extractvalue { i32, i32 } %14, 0
%16 = extractvalue { i32, i32 } %14, 1
store i32 %15, i32* %7
store i32 %16, i32* %6
%17 = load i32, i32* %7
%18 = load i32*, i32** %9
store i32 %17, i32* %18
%19 = load i32, i32* %6
%20 = load i32*, i32** %10
store i32 %19, i32* %20
ret void
}

LLVM IR (-O2):
define void @Ptngc_widediv(i32 %0, i32 %1, i32 %2, i32* nocapture writeonly %3, i32* nocapture writeonly %4) {
%6 = tail call { i32, i32 } asm sideeffect "divl %ecx\0A\09", "={ax},={dx},{ax},{dx},{cx},~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %1, i32 %0, i32 %2)
%7 = extractvalue { i32, i32 } %6, 0
%8 = extractvalue { i32, i32 } %6, 1
store i32 %7, i32* %3
store i32 %8, i32* %4
ret void
}
/* Variables and functions */
int evemu_play(int /*<<< orphan*/, int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ stdin;
int play_from_stdin(int fd) {
  int ret;
  ret = evemu_play(stdin, fd);
  if (ret != 0)
    fprintf(stderr, "error: could not replay device\n");
  return ret;
}


x86 assembly (clang, -O0):
<play_from_stdin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
call   1030 <evemu_play@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     115e <play_from_stdin+0x3e>
mov    0x2e88(%rip),%rax
mov    (%rax),%edi
lea    0xea7(%rip),%rsi
call   1040 <fprintf@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<play_from_stdin>:
push   %rbx
mov    %edi,%esi
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
call   1030 <evemu_play@plt>
mov    %eax,%ebx
test   %eax,%eax
je     114c <play_from_stdin+0x2c>
mov    0x2e9a(%rip),%rax
mov    (%rax),%edi
lea    0xeb9(%rip),%rsi
call   1040 <fprintf@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@stdin = global i32 0
@stderr = global i32 0
@.str = [32 x i8] c"error: could not replay device\0A\00"
define i32 @play_from_stdin(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* @stdin
%5 = load i32, i32* %2
%6 = call i32 @evemu_play(i32 %4, i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i32, i32* @stderr
%11 = call i32 @fprintf(i32 %10, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %9, %1
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
@stdin = global i32 0
@stderr = global i32 0
@.str = [32 x i8] c"error: could not replay device\0A\00"
define i32 @play_from_stdin(i32 %0) {
%2 = load i32, i32* @stdin
%3 = tail call i32 @evemu_play(i32 %2, i32 %0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %5, %1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char const *, int, int, int);
void _assert_equals(const char *file, int line, int expected, int actual) {
  if (expected != actual) {
    printf("%s:%d: Expected %d but got %d\n", file, line, expected, actual);
    exit(1);
  }
}


x86 assembly (clang, -O0):
<_assert_equals>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x14(%rbp),%eax
je     1165 <_assert_equals+0x45>
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
lea    0xeaa(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_assert_equals>:
mov    %ecx,%r8d
mov    %edx,%ecx
cmp    %r8d,%edx
jne    112b <_assert_equals+0xb>
ret
push   %rax
mov    %esi,%edx
mov    %rdi,%rsi
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"%s:%d: Expected %d but got %d\0A\00"
define void @_assert_equals(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %7
%10 = load i32, i32* %8
%11 = icmp ne i32 %9, %10
br i1 %11, label %12, label %19
12: ; preds = %4
%13 = load i8*, i8** %5
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = load i32, i32* %8
%17 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %13, i32 %14, i32 %15, i32 %16)
%18 = call i32 @exit(i32 1)
unreachable
19: ; preds = %4
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"%s:%d: Expected %d but got %d\0A\00"
define void @_assert_equals(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp eq i32 %2, %3
br i1 %5, label %9, label %6
6: ; preds = %4
%7 = tail call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1, i32 %2, i32 %3)
%8 = tail call i32 @exit(i32 1)
unreachable
9: ; preds = %4
ret void
}
double test_asinh(double x) { return __builtin_asinh(x); }


x86 assembly (clang, -O0):
<test_asinh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <asinh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_asinh>:
jmp    1030 <asinh@plt>

LLVM IR (-O0):
define double @test_asinh(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @asinh(double %3)
ret double %4
}

LLVM IR (-O2):
define double @test_asinh(double %0) {
%2 = tail call double @asinh(double %0)
ret double %2
}
/* Variables and functions */
bool nrf52_errata_176(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_176>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_176>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_176() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_176() {
ret i32 0
}
/* Type definitions */
struct katcl_parse {
  int dummy;
};

/* Variables and functions */
int add_unsafe_parse_katcl(struct katcl_parse *, int, char *);
int add_plain_parse_katcl(struct katcl_parse *p, int flags, char *string) {
  return add_unsafe_parse_katcl(p, flags, string);
}


x86 assembly (clang, -O0):
<add_plain_parse_katcl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1030 <add_unsafe_parse_katcl@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_plain_parse_katcl>:
jmp    1030 <add_unsafe_parse_katcl@plt>

LLVM IR (-O0):
%struct.katcl_parse = type { i32 }
define i32 @add_plain_parse_katcl(%struct.katcl_parse* %0, i32 %1, i8* %2) {
%4 = alloca %struct.katcl_parse*
%5 = alloca i32
%6 = alloca i8*
store %struct.katcl_parse* %0, %struct.katcl_parse** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load %struct.katcl_parse*, %struct.katcl_parse** %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = call i32 @add_unsafe_parse_katcl(%struct.katcl_parse* %7, i32 %8, i8* %9)
ret i32 %10
}

LLVM IR (-O2):
%struct.katcl_parse = type { i32 }
define i32 @add_plain_parse_katcl(%struct.katcl_parse* %0, i32 %1, i8* %2) {
%4 = tail call i32 @add_unsafe_parse_katcl(%struct.katcl_parse* %0, i32 %1, i8* %2)
ret i32 %4
}
char *ltrim(char *p) {
  while (p && (*p == ' ' || *p == '\t' || *p == '\v' || *p == '\f'))
    p++;
  return p;
}


x86 assembly (clang, -O0):
<ltrim>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     116d <ltrim+0x6d>
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0xa(%rbp)
je     1167 <ltrim+0x67>
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
mov    $0x1,%al
cmp    $0x9,%ecx
mov    %al,-0xa(%rbp)
je     1167 <ltrim+0x67>
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
mov    $0x1,%al
cmp    $0xb,%ecx
mov    %al,-0xa(%rbp)
je     1167 <ltrim+0x67>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xc,%eax
sete   %al
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    117d <ltrim+0x7d>
jmp    118e <ltrim+0x8e>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <ltrim+0x8>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ltrim>:
test   %rdi,%rdi
je     1135 <ltrim+0x35>
mov    %rdi,%rax
movabs $0x100001a00,%rcx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%rax),%edx
cmp    $0x20,%rdx
ja     1137 <ltrim+0x37>
bt     %rdx,%rcx
jae    1137 <ltrim+0x37>
add    $0x1,%rax
jmp    1120 <ltrim+0x20>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @ltrim(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %30, %1
%4 = load i8*, i8** %2
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %28
6: ; preds = %3
%7 = load i8*, i8** %2
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 32
br i1 %10, label %26, label %11
11: ; preds = %6
%12 = load i8*, i8** %2
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = icmp eq i32 %14, 9
br i1 %15, label %26, label %16
16: ; preds = %11
%17 = load i8*, i8** %2
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 11
br i1 %20, label %26, label %21
21: ; preds = %16
%22 = load i8*, i8** %2
%23 = load i8, i8* %22
%24 = sext i8 %23 to i32
%25 = icmp eq i32 %24, 12
br label %26
26: ; preds = %21, %16, %11, %6
%27 = phi i1 [ true, %16 ], [ true, %11 ], [ true, %6 ], [ %25, %21 ]
br label %28
28: ; preds = %26, %3
%29 = phi i1 [ false, %3 ], [ %27, %26 ]
br i1 %29, label %30, label %33
30: ; preds = %28
%31 = load i8*, i8** %2
%32 = getelementptr inbounds i8, i8* %31, i32 1
store i8* %32, i8** %2
br label %3
33: ; preds = %28
%34 = load i8*, i8** %2
ret i8* %34
}

LLVM IR (-O2):
define i8* @ltrim(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %8, label %3
3: ; preds = %1, %6
%4 = phi i8* [ %7, %6 ], [ %0, %1 ]
%5 = load i8, i8* %4
switch i8 %5, label %8 [
i8 32, label %6
i8 9, label %6
i8 11, label %6
i8 12, label %6
]
6: ; preds = %3, %3, %3, %3
%7 = getelementptr inbounds i8, i8* %4, i64 1
br label %3
8: ; preds = %3, %1
%9 = phi i8* [ null, %1 ], [ %4, %3 ]
ret i8* %9
}
/* Type definitions */
struct triple {
  int dummy;
};
struct compile_state {
  int dummy;
};

/* Variables and functions */
char const *arch_reg_str(int);
int check_reg(struct compile_state *, struct triple *, int);
const char *reg(struct compile_state *state, struct triple *triple,
                int classes) {
  int reg;
  reg = check_reg(state, triple, classes);
  return arch_reg_str(reg);
}


x86 assembly (clang, -O0):
<reg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <check_reg@plt>
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%edi
call   1030 <arch_reg_str@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg>:
push   %rax
call   1040 <check_reg@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <arch_reg_str@plt>

LLVM IR (-O0):
%struct.compile_state = type { i32 }
%struct.triple = type { i32 }
define i8* @reg(%struct.compile_state* %0, %struct.triple* %1, i32 %2) {
%4 = alloca %struct.compile_state*
%5 = alloca %struct.triple*
%6 = alloca i32
%7 = alloca i32
store %struct.compile_state* %0, %struct.compile_state** %4
store %struct.triple* %1, %struct.triple** %5
store i32 %2, i32* %6
%8 = load %struct.compile_state*, %struct.compile_state** %4
%9 = load %struct.triple*, %struct.triple** %5
%10 = load i32, i32* %6
%11 = call i32 @check_reg(%struct.compile_state* %8, %struct.triple* %9, i32 %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = call i8* @arch_reg_str(i32 %12)
ret i8* %13
}

LLVM IR (-O2):
%struct.compile_state = type { i32 }
%struct.triple = type { i32 }
define i8* @reg(%struct.compile_state* %0, %struct.triple* %1, i32 %2) {
%4 = tail call i32 @check_reg(%struct.compile_state* %0, %struct.triple* %1, i32 %2)
%5 = tail call i8* @arch_reg_str(i32 %4)
ret i8* %5
}
/* Variables and functions */
scalar_t__ sin(float);
float SIN(float var) { return (float)sin(var); }


x86 assembly (clang, -O0):
<SIN>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sin@plt>
cvtsi2ss %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SIN>:
push   %rax
call   1030 <sin@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @SIN(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i64 @sin(float %3)
%5 = sitofp i64 %4 to float
ret float %5
}

LLVM IR (-O2):
define float @SIN(float %0) {
%2 = tail call i64 @sin(float %0)
%3 = sitofp i64 %2 to float
ret float %3
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
bool errata_120(void) {
  if (*(uint32_t *)0x10000130ul == 0x8ul) {
    if (*(uint32_t *)0x10000134ul == 0x0ul) {
      return true;
    }
  }
  return false;
}


x86 assembly (clang, -O0):
<errata_120>:
push   %rbp
mov    %rsp,%rbp
mov    $0x10000130,%eax
movslq (%rax),%rax
cmp    $0x8,%rax
jne    1139 <errata_120+0x39>
mov    $0x10000134,%eax
movslq (%rax),%rax
cmp    $0x0,%rax
jne    1134 <errata_120+0x34>
movl   $0x1,-0x4(%rbp)
jmp    1140 <errata_120+0x40>
jmp    1139 <errata_120+0x39>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<errata_120>:
cmpl   $0x8,0x10000130
08
jne    1114 <errata_120+0x14>
cmpl   $0x0,0x10000134
je     1117 <errata_120+0x17>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @errata_120() {
%1 = alloca i32
%2 = load i32, i32* inttoptr (i64 268435760 to i32*)
%3 = sext i32 %2 to i64
%4 = icmp eq i64 %3, 8
br i1 %4, label %5, label %11
5: ; preds = %0
%6 = load i32, i32* inttoptr (i64 268435764 to i32*)
%7 = sext i32 %6 to i64
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %5
store i32 1, i32* %1
br label %12
10: ; preds = %5
br label %11
11: ; preds = %10, %0
store i32 0, i32* %1
br label %12
12: ; preds = %11, %9
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @errata_120() {
%1 = load i32, i32* inttoptr (i64 268435760 to i32*)
%2 = icmp eq i32 %1, 8
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = load i32, i32* inttoptr (i64 268435764 to i32*)
%5 = icmp eq i32 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %3, %0
br label %7
7: ; preds = %3, %6
%8 = phi i32 [ 0, %6 ], [ 1, %3 ]
ret i32 %8
}
int ft_isalnum(int c) {
  return ((c > 47 && c < 58) || (c > 64 && c < 91) || (c > 96 && c < 123));
}


x86 assembly (clang, -O0):
<ft_isalnum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x2f,-0x4(%rbp)
jle    1120 <ft_isalnum+0x20>
mov    $0x1,%al
cmpl   $0x3a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1158 <ft_isalnum+0x58>
cmpl   $0x40,-0x4(%rbp)
jle    1139 <ft_isalnum+0x39>
mov    $0x1,%al
cmpl   $0x5b,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1158 <ft_isalnum+0x58>
xor    %eax,%eax
cmpl   $0x60,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jle    1152 <ft_isalnum+0x52>
cmpl   $0x7b,-0x4(%rbp)
setl   %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isalnum>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%eax
setb   %al
and    $0xffffffdf,%edi
add    $0xffffffbf,%edi
cmp    $0x1a,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @ft_isalnum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 47
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 58
br i1 %7, label %22, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sgt i32 %9, 64
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp slt i32 %12, 91
br i1 %13, label %22, label %14
14: ; preds = %11, %8
%15 = load i32, i32* %2
%16 = icmp sgt i32 %15, 96
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp slt i32 %18, 123
br label %20
20: ; preds = %17, %14
%21 = phi i1 [ false, %14 ], [ %19, %17 ]
br label %22
22: ; preds = %20, %11, %5
%23 = phi i1 [ true, %11 ], [ true, %5 ], [ %21, %20 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @ft_isalnum(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = and i32 %0, -33
%5 = add i32 %4, -65
%6 = icmp ult i32 %5, 26
%7 = or i1 %3, %6
%8 = zext i1 %7 to i32
ret i32 %8
}