xunge/DecIR huggingface dataset:
/* Variables and functions */
double qs_double(double *, int);
double quickselect(double *data, int k) { return qs_double(data, k); }


x86 assembly (clang, -O0):
<quickselect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <qs_double@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quickselect>:
jmp    1030 <qs_double@plt>

LLVM IR (-O0):
define double @quickselect(double* %0, i32 %1) {
%3 = alloca double*
%4 = alloca i32
store double* %0, double** %3
store i32 %1, i32* %4
%5 = load double*, double** %3
%6 = load i32, i32* %4
%7 = call double @qs_double(double* %5, i32 %6)
ret double %7
}

LLVM IR (-O2):
define double @quickselect(double* %0, i32 %1) {
%3 = tail call double @qs_double(double* %0, i32 %1)
ret double %3
}
/* Variables and functions */
int sprintf(char *, char *, int);
int ssds_field_id(int fd, int class_num, int field_num, char *sp) {
  int ret;
  ret = sprintf(sp, "%d", field_num + 1);
  return ret;
}


x86 assembly (clang, -O0):
<ssds_field_id>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0xc(%rbp),%edx
add    $0x1,%edx
lea    0xeca(%rip),%rsi
call   1030 <sprintf@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssds_field_id>:
add    $0x1,%edx
lea    0xee6(%rip),%rsi
mov    %rcx,%rdi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @ssds_field_id(i32 %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%10 = load i8*, i8** %8
%11 = load i32, i32* %7
%12 = add nsw i32 %11, 1
%13 = call i32 @sprintf(i8* %10, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %12)
store i32 %13, i32* %9
%14 = load i32, i32* %9
ret i32 %14
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @ssds_field_id(i32 %0, i32 %1, i32 %2, i8* nocapture writeonly %3) {
%5 = add nsw i32 %2, 1
%6 = tail call i32 @sprintf(i8* dereferenceable(1) %3, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 %6
}
void dd_log() {}


x86 assembly (clang, -O0):
<dd_log>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dd_log>:
ret

LLVM IR (-O0):
define void @dd_log() {
ret void
}

LLVM IR (-O2):
define void @dd_log() {
ret void
}
/* Variables and functions */
int strlen(char *);
void tratamientoTexto(char *texto) {
  if (texto[strlen(texto) - 1] == '\n')
    texto[strlen(texto) - 1] = '\0';
}


x86 assembly (clang, -O0):
<tratamientoTexto>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
sub    $0x1,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0xa,%eax
jne    1167 <tratamientoTexto+0x57>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
sub    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tratamientoTexto>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
cltq
cmpb   $0xa,-0x1(%rax,%rbx,1)
jne    1131 <tratamientoTexto+0x21>
mov    %rbx,%rdi
call   1030 <strlen@plt>
cltq
movb   $0x0,-0x1(%rax,%rbx,1)
pop    %rbx
ret

LLVM IR (-O0):
define void @tratamientoTexto(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = sub nsw i32 %5, 1
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %3, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 10
br i1 %11, label %12, label %19
12: ; preds = %1
%13 = load i8*, i8** %2
%14 = load i8*, i8** %2
%15 = call i32 @strlen(i8* %14)
%16 = sub nsw i32 %15, 1
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %13, i64 %17
store i8 0, i8* %18
br label %19
19: ; preds = %12, %1
ret void
}

LLVM IR (-O2):
define void @tratamientoTexto(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, -1
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 10
br i1 %7, label %8, label %13
8: ; preds = %1
%9 = tail call i32 @strlen(i8* %0)
%10 = add nsw i32 %9, -1
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %0, i64 %11
store i8 0, i8* %12
br label %13
13: ; preds = %8, %1
ret void
}
unsigned char power_of_two(unsigned char n) {
  return (n == 0) ? 0 : (n & (n - 1)) == 0;
}


x86 assembly (clang, -O0):
<power_of_two>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0x0,%eax
jne    1121 <power_of_two+0x21>
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    113c <power_of_two+0x3c>
movzbl -0x1(%rbp),%eax
movzbl -0x1(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<power_of_two>:
test   %edi,%edi
je     110e <power_of_two+0xe>
lea    -0x1(%rdi),%eax
test   %al,%dil
sete   %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i8 @power_of_two(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
br label %16
7: ; preds = %1
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = load i8, i8* %2
%11 = zext i8 %10 to i32
%12 = sub nsw i32 %11, 1
%13 = and i32 %9, %12
%14 = icmp eq i32 %13, 0
%15 = zext i1 %14 to i32
br label %16
16: ; preds = %7, %6
%17 = phi i32 [ 0, %6 ], [ %15, %7 ]
%18 = trunc i32 %17 to i8
ret i8 %18
}

LLVM IR (-O2):
define zeroext i8 @power_of_two(i8 zeroext %0) {
%2 = icmp eq i8 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i8 @llvm.ctpop.i8(i8 %0)
%5 = icmp ult i8 %4, 2
%6 = zext i1 %5 to i8
br label %7
7: ; preds = %1, %3
%8 = phi i8 [ %6, %3 ], [ 0, %1 ]
ret i8 %8
}
int sum10(i0, i1, i2, i3, i4, i5, i6, i7, i8, i9)
int i0, i1, i2, i3, i4, i5, i6, i7, i8, i9;
{ return i0 + i1 + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9; }


x86 assembly (clang, -O0):
<sum10>:
push   %rbp
mov    %rsp,%rbp
mov    0x28(%rbp),%eax
mov    0x20(%rbp),%eax
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
add    -0x14(%rbp),%eax
add    -0x18(%rbp),%eax
add    0x10(%rbp),%eax
add    0x18(%rbp),%eax
add    0x20(%rbp),%eax
add    0x28(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum10>:
lea    (%rdi,%rsi,1),%eax
add    %edx,%eax
add    %ecx,%eax
add    %r8d,%eax
add    %r9d,%eax
add    0x8(%rsp),%eax
add    0x10(%rsp),%eax
add    0x18(%rsp),%eax
add    0x20(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @sum10(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9) {
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
%17 = alloca i32
%18 = alloca i32
%19 = alloca i32
%20 = alloca i32
store i32 %0, i32* %11
store i32 %1, i32* %12
store i32 %2, i32* %13
store i32 %3, i32* %14
store i32 %4, i32* %15
store i32 %5, i32* %16
store i32 %6, i32* %17
store i32 %7, i32* %18
store i32 %8, i32* %19
store i32 %9, i32* %20
%21 = load i32, i32* %11
%22 = load i32, i32* %12
%23 = add nsw i32 %21, %22
%24 = load i32, i32* %13
%25 = add nsw i32 %23, %24
%26 = load i32, i32* %14
%27 = add nsw i32 %25, %26
%28 = load i32, i32* %15
%29 = add nsw i32 %27, %28
%30 = load i32, i32* %16
%31 = add nsw i32 %29, %30
%32 = load i32, i32* %17
%33 = add nsw i32 %31, %32
%34 = load i32, i32* %18
%35 = add nsw i32 %33, %34
%36 = load i32, i32* %19
%37 = add nsw i32 %35, %36
%38 = load i32, i32* %20
%39 = add nsw i32 %37, %38
ret i32 %39
}

LLVM IR (-O2):
define i32 @sum10(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9) {
%11 = add nsw i32 %1, %0
%12 = add nsw i32 %11, %2
%13 = add nsw i32 %12, %3
%14 = add nsw i32 %13, %4
%15 = add nsw i32 %14, %5
%16 = add nsw i32 %15, %6
%17 = add nsw i32 %16, %7
%18 = add nsw i32 %17, %8
%19 = add nsw i32 %18, %9
ret i32 %19
}
/* Variables and functions */
int /*<<< orphan*/ cleanup();
int /*<<< orphan*/ exit(int);
void handle_sigint(int num) {
  cleanup();
  exit(1);
}


x86 assembly (clang, -O0):
<handle_sigint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <cleanup@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<handle_sigint>:
push   %rax
xor    %eax,%eax
call   1030 <cleanup@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @handle_sigint(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @cleanup()
%4 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @handle_sigint(i32 %0) {
%2 = tail call i32 (...) @cleanup()
%3 = tail call i32 @exit(i32 1)
unreachable
}
void ADCComparatorIntClear(unsigned long ulBase, unsigned long ulStatus) {
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000034))) = ulStatus;
}


x86 assembly (clang, -O0):
<ADCComparatorIntClear>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x34(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCComparatorIntClear>:
mov    %rsi,0x34(%rdi)
ret

LLVM IR (-O0):
define void @ADCComparatorIntClear(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add i64 %6, 52
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @ADCComparatorIntClear(i64 %0, i64 %1) {
%3 = add i64 %0, 52
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}
void __cpuid(int *data, int selector) {
  asm("xchg{q} {%%}rbx, %q1; cpuid; xchg{q} {%%}rbx, %q1"
      : "=a"(data[0]), "=&r"(data[1]), "=c"(data[2]), "=d"(data[3])
      : "0"(selector));
}


x86 assembly (clang, -O0):
<__cpuid>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%r9
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0xc(%rbp),%eax
xchg   %r8,%rbx
cpuid
xchg   %r8,%rbx
mov    %eax,%r10d
mov    -0x20(%rbp),%rax
mov    %ecx,%esi
mov    -0x18(%rbp),%rcx
mov    %r10d,(%r9)
mov    %r8d,0x4(%rdi)
mov    %esi,0x8(%rcx)
mov    %edx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__cpuid>:
mov    %esi,%eax
xchg   %rsi,%rbx
cpuid
xchg   %rsi,%rbx
mov    %eax,(%rdi)
mov    %esi,0x4(%rdi)
mov    %ecx,0x8(%rdi)
mov    %edx,0xc(%rdi)
ret

LLVM IR (-O0):
define void @__cpuid(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 0
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32*, i32** %3
%10 = getelementptr inbounds i32, i32* %9, i64 2
%11 = load i32*, i32** %3
%12 = getelementptr inbounds i32, i32* %11, i64 3
%13 = load i32, i32* %4
%14 = call { i32, i32, i32, i32 } asm "xchg$(q$) $(%$)rbx, ${1:q}; cpuid; xchg$(q$) $(%$)rbx, ${1:q}", "={ax},=&r,={cx},={dx},0,~{dirflag},~{fpsr},~{flags}"(i32 %13)
%15 = extractvalue { i32, i32, i32, i32 } %14, 0
%16 = extractvalue { i32, i32, i32, i32 } %14, 1
%17 = extractvalue { i32, i32, i32, i32 } %14, 2
%18 = extractvalue { i32, i32, i32, i32 } %14, 3
store i32 %15, i32* %6
store i32 %16, i32* %8
store i32 %17, i32* %10
store i32 %18, i32* %12
ret void
}

LLVM IR (-O2):
define void @__cpuid(i32* nocapture writeonly %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = getelementptr inbounds i32, i32* %0, i64 2
%5 = getelementptr inbounds i32, i32* %0, i64 3
%6 = tail call { i32, i32, i32, i32 } asm "xchg$(q$) $(%$)rbx, ${1:q}; cpuid; xchg$(q$) $(%$)rbx, ${1:q}", "={ax},=&r,={cx},={dx},0,~{dirflag},~{fpsr},~{flags}"(i32 %1)
%7 = extractvalue { i32, i32, i32, i32 } %6, 0
%8 = extractvalue { i32, i32, i32, i32 } %6, 1
%9 = extractvalue { i32, i32, i32, i32 } %6, 2
%10 = extractvalue { i32, i32, i32, i32 } %6, 3
store i32 %7, i32* %0
store i32 %8, i32* %3
store i32 %9, i32* %4
store i32 %10, i32* %5
ret void
}
__attribute__((no, noclone)) unsigned __int128 t105_5mul(unsigned __int128 x) {
  unsigned __int128 r;
  if (__builtin_mul_overflow(x, (signed __int128)(13), &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t105_5mul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,-0x50(%rbp)
mov    -0x28(%rbp),%rax
mov    $0xd,%ecx
mul    %rcx
mov    %rax,%rsi
mov    -0x50(%rbp),%rax
seto   %dl
mov    %dl,-0x41(%rbp)
mul    %rcx
mov    %rax,%rcx
mov    -0x41(%rbp),%al
add    %rsi,%rdx
setb   %sil
or     %sil,%al
mov    %rcx,-0x40(%rbp)
mov    %rdx,-0x38(%rbp)
test   $0x1,%al
jne    1179 <t105_5mul+0x69>
jmp    1180 <t105_5mul+0x70>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t105_5mul>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rax
mov    $0xd,%esi
mul    %rsi
mov    %rax,%rcx
mov    %rdi,%rax
seto   %dil
mul    %rsi
mov    %rax,%r14
mov    %rdx,%rbx
add    %rcx,%rbx
setb   %al
or     %dil,%al
cmp    $0x1,%al
jne    1146 <t105_5mul+0x36>
xor    %eax,%eax
call   1030 <bar@plt>
mov    %r14,%rax
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define { i64, i64 } @t105_5mul(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = bitcast i128* %4 to { i64, i64 }*
%8 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 0
store i64 %0, i64* %8
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 1
store i64 %1, i64* %9
%10 = load i128, i128* %4
store i128 %10, i128* %5
%11 = load i128, i128* %5
%12 = call { i128, i1 } @llvm.umul.with.overflow.i128(i128 13, i128 %11)
%13 = extractvalue { i128, i1 } %12, 1
%14 = extractvalue { i128, i1 } %12, 0
%15 = icmp ne i128 %14, 0
%16 = and i1 false, %15
%17 = or i1 %13, %16
%18 = sub i128 0, %14
%19 = select i1 false, i128 %18, i128 %14
store i128 %19, i128* %6
br i1 %17, label %20, label %22
20: ; preds = %2
%21 = call i32 (...) @bar()
br label %22
22: ; preds = %20, %2
%23 = load i128, i128* %6
store i128 %23, i128* %3
%24 = bitcast i128* %3 to { i64, i64 }*
%25 = load { i64, i64 }, { i64, i64 }* %24
ret { i64, i64 } %25
}

LLVM IR (-O2):
define { i64, i64 } @t105_5mul(i64 %0, i64 %1) {
%3 = zext i64 %1 to i128
%4 = shl nuw i128 %3, 64
%5 = zext i64 %0 to i128
%6 = or i128 %4, %5
%7 = tail call { i128, i1 } @llvm.umul.with.overflow.i128(i128 %6, i128 13)
%8 = extractvalue { i128, i1 } %7, 1
%9 = extractvalue { i128, i1 } %7, 0
br i1 %8, label %10, label %12
10: ; preds = %2
%11 = tail call i32 (...) @bar()
br label %12
12: ; preds = %10, %2
%13 = trunc i128 %9 to i64
%14 = lshr i128 %9, 64
%15 = trunc i128 %14 to i64
%16 = insertvalue { i64, i64 } poison, i64 %13, 0
%17 = insertvalue { i64, i64 } %16, i64 %15, 1
ret { i64, i64 } %17
}
/* Type definitions */
typedef int /*<<< orphan*/ BN_GENCB;

/* Variables and functions */
int cb(int p, int n, BN_GENCB *arg) { return 1; }


x86 assembly (clang, -O0):
<cb>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cb>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @cb(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
ret i32 1
}

LLVM IR (-O2):
define i32 @cb(i32 %0, i32 %1, i32* nocapture readnone %2) {
ret i32 1
}
int main() {
  int a = 1;
  int b = 2;
  {
    typeof(a) ab = a;
    a = b;
    b = ab;
  };
  printf("a: %d, b: %d\n", a, b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xeb4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x2,%esi
mov    $0x1,%edx
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"a: %d, b: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
store i32 2, i32* %3
%5 = load i32, i32* %2
store i32 %5, i32* %4
%6 = load i32, i32* %3
store i32 %6, i32* %2
%7 = load i32, i32* %4
store i32 %7, i32* %3
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %8, i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"a: %d, b: %d\0A\00"
define i32 @main() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 2, i32 1)
ret i32 0
}
/* Variables and functions */
int LOG_DAEMON;
int LOG_WARNING;
int /*<<< orphan*/ open_log_file();
int /*<<< orphan*/ syslog(int, char *, char const *);
void log_war(const char *msg) {
  open_log_file();
  syslog(LOG_DAEMON | LOG_WARNING, "%s : %m", msg);
}


x86 assembly (clang, -O0):
<log_war>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <open_log_file@plt>
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
mov    0x2e9d(%rip),%rax
or     (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xeb0(%rip),%rsi
call   1030 <syslog@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_war>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <open_log_file@plt>
mov    0x2eb6(%rip),%rax
mov    0x2ea7(%rip),%rcx
mov    (%rcx),%edi
or     (%rax),%edi
lea    0xebc(%rip),%rsi
mov    %rbx,%rdx
pop    %rbx
jmp    1030 <syslog@plt>

LLVM IR (-O0):
@LOG_DAEMON = global i32 0
@LOG_WARNING = global i32 0
@.str = [8 x i8] c"%s : %m\00"
define void @log_war(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @open_log_file()
%4 = load i32, i32* @LOG_DAEMON
%5 = load i32, i32* @LOG_WARNING
%6 = or i32 %4, %5
%7 = load i8*, i8** %2
%8 = call i32 @syslog(i32 %6, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %7)
ret void
}

LLVM IR (-O2):
@LOG_DAEMON = global i32 0
@LOG_WARNING = global i32 0
@.str = [8 x i8] c"%s : %m\00"
define void @log_war(i8* %0) {
%2 = tail call i32 (...) @open_log_file()
%3 = load i32, i32* @LOG_DAEMON
%4 = load i32, i32* @LOG_WARNING
%5 = or i32 %4, %3
%6 = tail call i32 @syslog(i32 %5, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ iscntrl(int);
void t_iscntrl_0x06() {
  Assert_real((iscntrl(6)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              35, ("iscntrl should be 1 for 0x06"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0x06>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
call   1030 <iscntrl@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x23,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0x06>:
push   %rax
mov    $0x6,%edi
call   1030 <iscntrl@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x23,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 1 for 0x06\00"
define void @t_iscntrl_0x06() {
%1 = call i32 @iscntrl(i32 6)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 35, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 1 for 0x06\00"
define void @t_iscntrl_0x06() {
%1 = tail call i32 @iscntrl(i32 6)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 35, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void crv_(geom) float geom[4][3];
{ crv(geom); }


x86 assembly (clang, -O0):
<crv_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <crv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crv_>:
xor    %eax,%eax
jmp    1030 <crv@plt>

LLVM IR (-O0):
define void @crv_([3 x float]* %0) {
%2 = alloca [3 x float]*
store [3 x float]* %0, [3 x float]** %2
%3 = load [3 x float]*, [3 x float]** %2
%4 = call i32 ([3 x float]*, ...) bitcast (i32 (...)* @crv to i32 ([3 x float]*, ...)*)([3 x float]* %3)
ret void
}

LLVM IR (-O2):
define void @crv_([3 x float]* %0) {
%2 = tail call i32 ([3 x float]*, ...) bitcast (i32 (...)* @crv to i32 ([3 x float]*, ...)*)([3 x float]* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ RamWrite32(unsigned char, unsigned char, unsigned short,
                              unsigned short);
void RamWrite32A(unsigned short RamAddr, unsigned long RamData) {
  unsigned char RamAddrH = RamAddr >> 8;
  unsigned char RamAddrL = RamAddr & 0xFF;
  unsigned short RamDataH = RamData >> 16;
  unsigned short RamDataL = RamData & 0xFFFF;
  RamWrite32(RamAddrH, RamAddrL, RamDataH, RamDataL);
}


x86 assembly (clang, -O0):
<RamWrite32A>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
movzwl -0x2(%rbp),%eax
sar    $0x8,%eax
mov    %al,-0x11(%rbp)
movzwl -0x2(%rbp),%eax
and    $0xff,%eax
mov    %al,-0x12(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x10,%rax
mov    %ax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
and    $0xffff,%rax
mov    %ax,-0x16(%rbp)
mov    -0x11(%rbp),%dl
mov    -0x12(%rbp),%cl
mov    -0x14(%rbp),%ax
movzbl %dl,%edi
movzbl %cl,%esi
movzwl %ax,%edx
movzwl -0x16(%rbp),%ecx
call   1030 <RamWrite32@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RamWrite32A>:
movzbl %dil,%eax
shr    $0x8,%edi
movzwl %si,%ecx
mov    %esi,%edx
shr    $0x10,%edx
mov    %eax,%esi
jmp    1030 <RamWrite32@plt>

LLVM IR (-O0):
define void @RamWrite32A(i16 zeroext %0, i64 %1) {
%3 = alloca i16
%4 = alloca i64
%5 = alloca i8
%6 = alloca i8
%7 = alloca i16
%8 = alloca i16
store i16 %0, i16* %3
store i64 %1, i64* %4
%9 = load i16, i16* %3
%10 = zext i16 %9 to i32
%11 = ashr i32 %10, 8
%12 = trunc i32 %11 to i8
store i8 %12, i8* %5
%13 = load i16, i16* %3
%14 = zext i16 %13 to i32
%15 = and i32 %14, 255
%16 = trunc i32 %15 to i8
store i8 %16, i8* %6
%17 = load i64, i64* %4
%18 = lshr i64 %17, 16
%19 = trunc i64 %18 to i16
store i16 %19, i16* %7
%20 = load i64, i64* %4
%21 = and i64 %20, 65535
%22 = trunc i64 %21 to i16
store i16 %22, i16* %8
%23 = load i8, i8* %5
%24 = load i8, i8* %6
%25 = load i16, i16* %7
%26 = load i16, i16* %8
%27 = call i32 @RamWrite32(i8 zeroext %23, i8 zeroext %24, i16 zeroext %25, i16 zeroext %26)
ret void
}

LLVM IR (-O2):
define void @RamWrite32A(i16 zeroext %0, i64 %1) {
%3 = lshr i16 %0, 8
%4 = trunc i16 %3 to i8
%5 = trunc i16 %0 to i8
%6 = lshr i64 %1, 16
%7 = trunc i64 %6 to i16
%8 = trunc i64 %1 to i16
%9 = tail call i32 @RamWrite32(i8 zeroext %4, i8 zeroext %5, i16 zeroext %7, i16 zeroext %8)
ret void
}
/* Variables and functions */
scalar_t__ malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char *);
scalar_t__ strlen(char *);
char *DupStr(char *pActStr) {
  register char *pDupStr;
  pDupStr = (char *)malloc(strlen(pActStr) + 1);
  if (pDupStr)
    strcpy(pDupStr, pActStr);
  return pDupStr;
}


x86 assembly (clang, -O0):
<DupStr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     116d <DupStr+0x3d>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DupStr>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1158 <DupStr+0x28>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @DupStr(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i64 @malloc(i64 %6)
%8 = inttoptr i64 %7 to i8*
store i8* %8, i8** %3
%9 = load i8*, i8** %3
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = load i8*, i8** %2
%14 = call i32 @strcpy(i8* %12, i8* %13)
br label %15
15: ; preds = %11, %1
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
define i8* @DupStr(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i64 @malloc(i64 %3)
%5 = inttoptr i64 %4 to i8*
%6 = icmp eq i64 %4, 0
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @strcpy(i8* %5, i8* %0)
br label %9
9: ; preds = %7, %1
ret i8* %5
}
/* Variables and functions */
char *strchr(char const *, char);
const char *GetLastChar(const char *path, char sep) {
  const char *p = strchr(path, sep);
  const char *prev = p;
  while (p) {
    prev = p;
    p = strchr(p + 1, sep);
  }
  return prev;
}


x86 assembly (clang, -O0):
<GetLastChar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
movsbl -0x9(%rbp),%esi
call   1030 <strchr@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1168 <GetLastChar+0x58>
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
add    $0x1,%rdi
movsbl -0x9(%rbp),%esi
call   1030 <strchr@plt>
mov    %rax,-0x18(%rbp)
jmp    113b <GetLastChar+0x2b>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetLastChar>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
call   1030 <strchr@plt>
test   %rax,%rax
je     1145 <GetLastChar+0x35>
movsbl %bl,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %rax,%rbx
lea    0x1(%rax),%rdi
mov    %ebp,%esi
call   1030 <strchr@plt>
test   %rax,%rax
jne    1130 <GetLastChar+0x20>
jmp    1147 <GetLastChar+0x37>
xor    %ebx,%ebx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @GetLastChar(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8 %1, i8* %4
%7 = load i8*, i8** %3
%8 = load i8, i8* %4
%9 = call i8* @strchr(i8* %7, i8 signext %8)
store i8* %9, i8** %5
%10 = load i8*, i8** %5
store i8* %10, i8** %6
br label %11
11: ; preds = %14, %2
%12 = load i8*, i8** %5
%13 = icmp ne i8* %12, null
br i1 %13, label %14, label %20
14: ; preds = %11
%15 = load i8*, i8** %5
store i8* %15, i8** %6
%16 = load i8*, i8** %5
%17 = getelementptr inbounds i8, i8* %16, i64 1
%18 = load i8, i8* %4
%19 = call i8* @strchr(i8* %17, i8 signext %18)
store i8* %19, i8** %5
br label %11
20: ; preds = %11
%21 = load i8*, i8** %6
ret i8* %21
}

LLVM IR (-O2):
define i8* @GetLastChar(i8* %0, i8 signext %1) {
%3 = tail call i8* @strchr(i8* dereferenceable(1) %0, i8 signext %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %10, label %5
5: ; preds = %2, %5
%6 = phi i8* [ %8, %5 ], [ %3, %2 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = tail call i8* @strchr(i8* %7, i8 signext %1)
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %5
10: ; preds = %5, %2
%11 = phi i8* [ null, %2 ], [ %6, %5 ]
ret i8* %11
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int registers_read_byte(int);
int /*<<< orphan*/ registers_write_byte(int, int);
void registers_write_enable(void) {
  uint8_t flags_lo = registers_read_byte(0x05);
  registers_write_byte(0x05, flags_lo | (1 << 0x01));
}


x86 assembly (clang, -O0):
<registers_write_enable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x5,%edi
call   1040 <registers_read_byte@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%esi
or     $0x2,%esi
mov    $0x5,%edi
call   1030 <registers_write_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<registers_write_enable>:
push   %rax
mov    $0x5,%edi
call   1040 <registers_read_byte@plt>
or     $0x2,%eax
mov    $0x5,%edi
mov    %eax,%esi
pop    %rax
jmp    1030 <registers_write_byte@plt>

LLVM IR (-O0):
define void @registers_write_enable() {
%1 = alloca i32
%2 = call i32 @registers_read_byte(i32 5)
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = or i32 %3, 2
%5 = call i32 @registers_write_byte(i32 5, i32 %4)
ret void
}

LLVM IR (-O2):
define void @registers_write_enable() {
%1 = tail call i32 @registers_read_byte(i32 5)
%2 = or i32 %1, 2
%3 = tail call i32 @registers_write_byte(i32 5, i32 %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ v;
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ const *,
                          int);
__attribute__((__unused__)) __attribute__((__nonnull__)) void
gdnsd_put_una32(const uint32_t v, uint8_t *p) {
  memcpy(p, &v, sizeof(v));
}


x86 assembly (clang, -O0):
<gdnsd_put_una32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x4(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdnsd_put_una32>:
push   %rax
mov    %rsi,%rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    %rax,%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @gdnsd_put_una32(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = call i32 @memcpy(i32* %5, i32* %3, i32 4)
ret void
}

LLVM IR (-O2):
define void @gdnsd_put_una32(i32 %0, i32* %1) {
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 @memcpy(i32* %1, i32* %3, i32 4)
ret void
}
/* Variables and functions */
int __raw_readb(int);
int board_is_ts7200(void) { return __raw_readb(0xfebff000) == 0x00; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0xfebff000,%edi
call   1030 <__raw_readb@plt>
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
mov    $0xfebff000,%edi
call   1030 <__raw_readb@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @board_is_ts7200() {
%1 = call i32 @__raw_readb(i32 -20975616)
%2 = icmp eq i32 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @board_is_ts7200() {
%1 = tail call i32 @__raw_readb(i32 -20975616)
%2 = icmp eq i32 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
double inchesToFeet(double inches) { return inches / 12.0; }


x86 assembly (clang, -O0):
<inchesToFeet>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<inchesToFeet>:
divsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @inchesToFeet(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 1.200000e+01
ret double %4
}

LLVM IR (-O2):
define double @inchesToFeet(double %0) {
%2 = fdiv double %0, 1.200000e+01
ret double %2
}
int capture_me_0(void) { return 0; }


x86 assembly (clang, -O0):
<capture_me_0>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<capture_me_0>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @capture_me_0() {
ret i32 0
}

LLVM IR (-O2):
define i32 @capture_me_0() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ M_ADDC(int /*<<< orphan*/);
int /*<<< orphan*/ M_RDMEM_OPCODE();
void adc_a_n(void) { M_ADDC(M_RDMEM_OPCODE()); }


x86 assembly (clang, -O0):
<adc_a_n>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <M_RDMEM_OPCODE@plt>
mov    %eax,%edi
call   1040 <M_ADDC@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<adc_a_n>:
push   %rax
xor    %eax,%eax
call   1030 <M_RDMEM_OPCODE@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <M_ADDC@plt>

LLVM IR (-O0):
define void @adc_a_n() {
%1 = call i32 (...) @M_RDMEM_OPCODE()
%2 = call i32 @M_ADDC(i32 %1)
ret void
}

LLVM IR (-O2):
define void @adc_a_n() {
%1 = tail call i32 (...) @M_RDMEM_OPCODE()
%2 = tail call i32 @M_ADDC(i32 %1)
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t libusb_cpu_to_le16(uint16_t x) {
  union {
    uint8_t b8[2];
    uint16_t b16;
  } _tmp;
  uint16_t _tmp2 = (uint16_t)(x);
  _tmp.b8[1] = _tmp2 >> 8;
  _tmp.b8[0] = _tmp2 & 0xff;
  return _tmp.b16;
}


x86 assembly (clang, -O0):
<libusb_cpu_to_le16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sar    $0x8,%eax
mov    %eax,-0xc(%rbp)
mov    -0x14(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<libusb_cpu_to_le16>:
movzbl %dil,%eax
ret

LLVM IR (-O0):
%union.anon = type { [2 x i32] }
define i32 @libusb_cpu_to_le16(i32 %0) {
%2 = alloca i32
%3 = alloca %union.anon
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
store i32 %5, i32* %4
%6 = load i32, i32* %4
%7 = ashr i32 %6, 8
%8 = bitcast %union.anon* %3 to [2 x i32]*
%9 = getelementptr inbounds [2 x i32], [2 x i32]* %8, i64 0, i64 1
store i32 %7, i32* %9
%10 = load i32, i32* %4
%11 = and i32 %10, 255
%12 = bitcast %union.anon* %3 to [2 x i32]*
%13 = getelementptr inbounds [2 x i32], [2 x i32]* %12, i64 0, i64 0
store i32 %11, i32* %13
%14 = bitcast %union.anon* %3 to i32*
%15 = load i32, i32* %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @libusb_cpu_to_le16(i32 %0) {
%2 = and i32 %0, 255
ret i32 %2
}
int mod(int a, int b) {
  int r = a % b;
  return r < 0 ? r + b : r;
}


x86 assembly (clang, -O0):
<mod>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    112c <mod+0x2c>
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1132 <mod+0x32>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod>:
mov    %edi,%eax
cltd
idiv   %esi
mov    %edx,%eax
sar    $0x1f,%eax
and    %esi,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @mod(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = srem i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp slt i32 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i32, i32* %5
%13 = load i32, i32* %4
%14 = add nsw i32 %12, %13
br label %17
15: ; preds = %2
%16 = load i32, i32* %5
br label %17
17: ; preds = %15, %11
%18 = phi i32 [ %14, %11 ], [ %16, %15 ]
ret i32 %18
}

LLVM IR (-O2):
define i32 @mod(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
%4 = icmp slt i32 %3, 0
%5 = select i1 %4, i32 %1, i32 0
%6 = add nsw i32 %5, %3
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ __buf_size_arg_constraint_concrete(char *);
void test_min_buf_size() {
  char buf[9];
  __buf_size_arg_constraint_concrete(buf);
}


x86 assembly (clang, -O0):
<test_min_buf_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x9(%rbp),%rdi
call   1030 <__buf_size_arg_constraint_concrete@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_min_buf_size>:
sub    $0x18,%rsp
lea    0xf(%rsp),%rdi
call   1030 <__buf_size_arg_constraint_concrete@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @test_min_buf_size() {
%1 = alloca [9 x i8]
%2 = getelementptr inbounds [9 x i8], [9 x i8]* %1, i64 0, i64 0
%3 = call i32 @__buf_size_arg_constraint_concrete(i8* %2)
ret void
}

LLVM IR (-O2):
define void @test_min_buf_size() {
%1 = alloca [9 x i8]
%2 = getelementptr inbounds [9 x i8], [9 x i8]* %1, i64 0, i64 0
%3 = call i32 @__buf_size_arg_constraint_concrete(i8* %2)
ret void
}
void ____atomic_clear_bit(unsigned int bit, unsigned long *p) {
  unsigned long flags;
  unsigned long mask;
  unsigned long temp;
  mask = 1UL << (bit & 31U);
  p += bit >> 5;
  (*p) &= (unsigned long)(~mask);
  return;
}


x86 assembly (clang, -O0):
<____atomic_clear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1f,%eax
mov    %eax,%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
mov    %rax,-0x20(%rbp)
mov    -0x4(%rbp),%ecx
shr    $0x5,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,%ecx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x20(%rbp),%rcx
xor    $0xffffffffffffffff,%rcx
mov    -0x10(%rbp),%rax
and    (%rax),%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<____atomic_clear_bit>:
mov    %edi,%ecx
and    $0x1f,%cl
mov    $0xfffffffffffffffe,%rax
rol    %cl,%rax
shr    $0x5,%edi
and    %rax,(%rsi,%rdi,8)
ret

LLVM IR (-O0):
define void @____atomic_clear_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i32 %0, i32* %3
store i64* %1, i64** %4
%8 = load i32, i32* %3
%9 = and i32 %8, 31
%10 = zext i32 %9 to i64
%11 = shl i64 1, %10
store i64 %11, i64* %6
%12 = load i32, i32* %3
%13 = lshr i32 %12, 5
%14 = load i64*, i64** %4
%15 = zext i32 %13 to i64
%16 = getelementptr inbounds i64, i64* %14, i64 %15
store i64* %16, i64** %4
%17 = load i64, i64* %6
%18 = xor i64 %17, -1
%19 = load i64*, i64** %4
%20 = load i64, i64* %19
%21 = and i64 %20, %18
store i64 %21, i64* %19
ret void
}

LLVM IR (-O2):
define void @____atomic_clear_bit(i32 %0, i64* nocapture %1) {
%3 = and i32 %0, 31
%4 = zext i32 %3 to i64
%5 = shl nuw nsw i64 1, %4
%6 = lshr i32 %0, 5
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds i64, i64* %1, i64 %7
%9 = xor i64 %5, -1
%10 = load i64, i64* %8
%11 = and i64 %10, %9
store i64 %11, i64* %8
ret void
}
/* Type definitions */
struct client {
  int dummy;
};
typedef int /*<<< orphan*/ Time;

/* Variables and functions */
int /*<<< orphan*/ cpushapp(struct client *);
int /*<<< orphan*/ refocus(int /*<<< orphan*/);
void keypress_pushapp(struct client *c, unsigned state, Time time) {
  cpushapp(c);
  refocus(time);
}


x86 assembly (clang, -O0):
<keypress_pushapp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <cpushapp@plt>
mov    -0x10(%rbp),%edi
call   1030 <refocus@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<keypress_pushapp>:
push   %rbx
mov    %edx,%ebx
call   1040 <cpushapp@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <refocus@plt>

LLVM IR (-O0):
%struct.client = type { i32 }
define void @keypress_pushapp(%struct.client* %0, i32 %1, i32 %2) {
%4 = alloca %struct.client*
%5 = alloca i32
%6 = alloca i32
store %struct.client* %0, %struct.client** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load %struct.client*, %struct.client** %4
%8 = call i32 @cpushapp(%struct.client* %7)
%9 = load i32, i32* %6
%10 = call i32 @refocus(i32 %9)
ret void
}

LLVM IR (-O2):
%struct.client = type { i32 }
define void @keypress_pushapp(%struct.client* %0, i32 %1, i32 %2) {
%4 = tail call i32 @cpushapp(%struct.client* %0)
%5 = tail call i32 @refocus(i32 %2)
ret void
}
/* Type definitions */
typedef int pid_t;

/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int);
char *fifo_get_fifo_filename(pid_t pid) {
  static char fifo_filename[128];
  sprintf(fifo_filename, "/tmp/fifo_%d", pid);
  return fifo_filename;
}


x86 assembly (clang, -O0):
<fifo_get_fifo_filename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0x2f1b(%rip),%rdi
lea    0xed4(%rip),%rsi
call   1030 <sprintf@plt>
lea    0x2f08(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fifo_get_fifo_filename>:
push   %rbx
mov    %edi,%edx
lea    0x2f26(%rip),%rbx
lea    0xedf(%rip),%rsi
mov    %rbx,%rdi
call   1030 <sprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@fifo_get_fifo_filename.fifo_filename = internal global [128 x i8] zeroinitializer
@.str = [13 x i8] c"/tmp/fifo_%d\00"
define i8* @fifo_get_fifo_filename(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @sprintf(i8* getelementptr inbounds ([128 x i8], [128 x i8]* @fifo_get_fifo_filename.fifo_filename, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i8* getelementptr inbounds ([128 x i8], [128 x i8]* @fifo_get_fifo_filename.fifo_filename, i64 0, i64 0)
}

LLVM IR (-O2):
@fifo_get_fifo_filename.fifo_filename = internal global [128 x i8] zeroinitializer
@.str = [13 x i8] c"/tmp/fifo_%d\00"
define i8* @fifo_get_fifo_filename(i32 %0) {
%2 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([128 x i8], [128 x i8]* @fifo_get_fifo_filename.fifo_filename, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i8* getelementptr inbounds ([128 x i8], [128 x i8]* @fifo_get_fifo_filename.fifo_filename, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main() {
  int i;
  for (i = 0; i < 256; i++)
    printf("%d.\t%c\n", i, i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x100,-0x8(%rbp)
jge    1153 <main+0x43>
mov    -0x8(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xee3(%rip),%r14
nopl   (%rax)
mov    %r14,%rdi
mov    %ebx,%esi
mov    %ebx,%edx
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x100,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [8 x i8] c"%d.\09%c\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %10, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 256
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = load i32, i32* %2
%8 = load i32, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8)
br label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %3
13: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"%d.\09%c\0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %2)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 256
br i1 %5, label %6, label %1
6: ; preds = %1
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;
typedef int /*<<< orphan*/ dev_t;

/* Variables and functions */
int /*<<< orphan*/ AT_FDCWD;
int mknodat(int /*<<< orphan*/, char const *, int /*<<< orphan*/,
            int /*<<< orphan*/);
int mknod(const char *pathname, mode_t mode, dev_t dev) {
  return mknodat(AT_FDCWD, pathname, mode, dev);
}


x86 assembly (clang, -O0):
<mknod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    0x2eaf(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1030 <mknodat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mknod>:
mov    %edx,%ecx
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
jmp    1030 <mknodat@plt>

LLVM IR (-O0):
@AT_FDCWD = global i32 0
define i32 @mknod(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* @AT_FDCWD
%8 = load i8*, i8** %4
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @mknodat(i32 %7, i8* %8, i32 %9, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
@AT_FDCWD = global i32 0
define i32 @mknod(i8* %0, i32 %1, i32 %2) {
%4 = load i32, i32* @AT_FDCWD
%5 = tail call i32 @mknodat(i32 %4, i8* %0, i32 %1, i32 %2)
ret i32 %5
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t charts_getmaxleng(void) { return 4096; }


x86 assembly (clang, -O0):
<charts_getmaxleng>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<charts_getmaxleng>:
mov    $0x1000,%eax
ret

LLVM IR (-O0):
define i32 @charts_getmaxleng() {
ret i32 4096
}

LLVM IR (-O2):
define i32 @charts_getmaxleng() {
ret i32 4096
}