xunge/DecIR huggingface dataset:
/* Variables and functions */
int sqrt(int);
int check(int x) {
  int i, k;
  k = sqrt(x);
  for (i = 2; i <= k; i++) {
    if (x % i == 0)
      return 0;
  }
  if (i >= k)
    return 1;
}


x86 assembly (clang, -O0):
<check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <sqrt@plt>
mov    %eax,-0x10(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jg     1168 <check+0x58>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1155 <check+0x45>
movl   $0x0,-0x4(%rbp)
jmp    117b <check+0x6b>
jmp    115a <check+0x4a>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112d <check+0x1d>
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jl     117b <check+0x6b>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check>:
push   %rbx
mov    %edi,%ebx
call   1030 <sqrt@plt>
mov    $0x1,%ecx
cmp    $0x2,%eax
jl     114f <check+0x3f>
mov    %eax,%esi
neg    %esi
mov    $0x2,%edi
nopl   0x0(%rax,%rax,1)
mov    %ebx,%eax
cltd
idiv   %edi
test   %edx,%edx
je     114d <check+0x3d>
lea    (%rsi,%rdi,1),%eax
add    $0x1,%eax
mov    %edi,%edx
add    $0x1,%edx
mov    %edx,%edi
cmp    $0x1,%eax
jne    1130 <check+0x20>
jmp    114f <check+0x3f>
xor    %ecx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @check(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @sqrt(i32 %6)
store i32 %7, i32* %5
store i32 2, i32* %4
br label %8
8: ; preds = %19, %1
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = icmp sle i32 %9, %10
br i1 %11, label %12, label %22
12: ; preds = %8
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = srem i32 %13, %14
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %12
store i32 0, i32* %2
br label %27
18: ; preds = %12
br label %19
19: ; preds = %18
%20 = load i32, i32* %4
%21 = add nsw i32 %20, 1
store i32 %21, i32* %4
br label %8
22: ; preds = %8
%23 = load i32, i32* %4
%24 = load i32, i32* %5
%25 = icmp sge i32 %23, %24
br i1 %25, label %26, label %27
26: ; preds = %22
store i32 1, i32* %2
br label %27
27: ; preds = %17, %26, %22
%28 = load i32, i32* %2
ret i32 %28
}

LLVM IR (-O2):
define i32 @check(i32 %0) {
%2 = tail call i32 @sqrt(i32 %0)
%3 = icmp slt i32 %2, 2
br i1 %3, label %11, label %7
4: ; preds = %7
%5 = add nuw i32 %8, 1
%6 = icmp eq i32 %8, %2
br i1 %6, label %11, label %7
7: ; preds = %1, %4
%8 = phi i32 [ %5, %4 ], [ 2, %1 ]
%9 = srem i32 %0, %8
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %7, %4, %1
%12 = phi i32 [ 1, %1 ], [ 1, %4 ], [ 0, %7 ]
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
long fread(char *, int, long, int /*<<< orphan*/ *);
long file___NativeFile_io_read___impl(FILE *self, char *buf, long len) {
  return fread(buf, 1, len, self);
}


x86 assembly (clang, -O0):
<file___NativeFile_io_read___impl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    -0x8(%rbp),%rcx
mov    $0x1,%esi
call   1030 <fread@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file___NativeFile_io_read___impl>:
mov    %rdi,%rcx
mov    %rsi,%rdi
mov    $0x1,%esi
jmp    1030 <fread@plt>

LLVM IR (-O0):
define i64 @file___NativeFile_io_read___impl(i32* %0, i8* %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i64
store i32* %0, i32** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i64, i64* %6
%9 = load i32*, i32** %4
%10 = call i64 @fread(i8* %7, i32 1, i64 %8, i32* %9)
ret i64 %10
}

LLVM IR (-O2):
define i64 @file___NativeFile_io_read___impl(i32* nocapture %0, i8* nocapture %1, i64 %2) {
%4 = tail call i64 @fread(i8* %1, i32 1, i64 %2, i32* %0)
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ printTree(int);
int main() {
  int height;
  height = 4;
  printTree(height);
  height = 7;
  printTree(height);
  height = 11;
  printTree(height);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x4,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <printTree@plt>
movl   $0x7,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <printTree@plt>
movl   $0xb,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <printTree@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
call   1030 <printTree@plt>
mov    $0x7,%edi
call   1030 <printTree@plt>
mov    $0xb,%edi
call   1030 <printTree@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 4, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printTree(i32 %3)
store i32 7, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @printTree(i32 %5)
store i32 11, i32* %2
%7 = load i32, i32* %2
%8 = call i32 @printTree(i32 %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @printTree(i32 4)
%2 = tail call i32 @printTree(i32 7)
%3 = tail call i32 @printTree(i32 11)
ret i32 0
}
void gtk_separator_get_type() {}


x86 assembly (clang, -O0):
<gtk_separator_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_separator_get_type>:
ret

LLVM IR (-O0):
define void @gtk_separator_get_type() {
ret void
}

LLVM IR (-O2):
define void @gtk_separator_get_type() {
ret void
}
void stdio_display_close(int wait) {}


x86 assembly (clang, -O0):
<stdio_display_close>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<stdio_display_close>:
ret

LLVM IR (-O0):
define void @stdio_display_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @stdio_display_close(i32 %0) {
ret void
}
int test_imm_F8uint8_reg(unsigned char val) {
  return ((val) & (-0xF8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F8uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffff08,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F8uint8_reg>:
test   $0x8,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F8uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -248
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_F8uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 8
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int x;
  int y;
  if (!(x < y))
    return 0;
  while (x < y) {
    x = x + 100;
  }
  assert(x >= y && x <= y + 99);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jl     1137 <main+0x27>
movl   $0x0,-0x4(%rbp)
jmp    118c <main+0x7c>
jmp    113c <main+0x2c>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1156 <main+0x46>
mov    -0x8(%rbp),%eax
add    $0x64,%eax
mov    %eax,-0x8(%rbp)
jmp    113c <main+0x2c>
mov    -0x8(%rbp),%ecx
xor    %eax,%eax
cmp    -0xc(%rbp),%ecx
mov    %al,-0xd(%rbp)
jl     1178 <main+0x68>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
add    $0x63,%ecx
cmp    %ecx,%eax
setle  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = icmp slt i32 %4, %5
br i1 %6, label %8, label %7
7: ; preds = %0
store i32 0, i32* %1
br label %29
8: ; preds = %0
br label %9
9: ; preds = %13, %8
%10 = load i32, i32* %2
%11 = load i32, i32* %3
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = load i32, i32* %2
%15 = add nsw i32 %14, 100
store i32 %15, i32* %2
br label %9
16: ; preds = %9
%17 = load i32, i32* %2
%18 = load i32, i32* %3
%19 = icmp sge i32 %17, %18
br i1 %19, label %20, label %25
20: ; preds = %16
%21 = load i32, i32* %2
%22 = load i32, i32* %3
%23 = add nsw i32 %22, 99
%24 = icmp sle i32 %21, %23
br label %25
25: ; preds = %20, %16
%26 = phi i1 [ false, %16 ], [ %24, %20 ]
%27 = zext i1 %26 to i32
%28 = call i32 @assert(i32 %27)
store i32 0, i32* %1
br label %29
29: ; preds = %25, %7
%30 = load i32, i32* %1
ret i32 %30
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void CPU_WriteBufferDisable(void) {
  (*((volatile unsigned long
          *)(((unsigned long)(0xE000E000 + 0x00000008) & 0xF0000000) |
             0x02000000 |
             (((unsigned long)(0xE000E000 + 0x00000008) & 0x000FFFFF) << 5) |
             ((1) << 2)))) = 1;
}


x86 assembly (clang, -O0):
<CPU_WriteBufferDisable>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe21c0104,%eax
movq   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<CPU_WriteBufferDisable>:
mov    $0xe21c0104,%eax
movq   $0x1,(%rax)
ret

LLVM IR (-O0):
define void @CPU_WriteBufferDisable() {
store volatile i64 1, i64* inttoptr (i64 3793486084 to i64*)
ret void
}

LLVM IR (-O2):
define void @CPU_WriteBufferDisable() {
store volatile i64 1, i64* inttoptr (i64 3793486084 to i64*)
ret void
}
__attribute__((target("default"), used)) void foo_used(int i, double d) {}


x86 assembly (clang, -O0):
<foo_used>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movsd  %xmm0,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_used>:
ret

LLVM IR (-O0):
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (void (i32, double)* @foo_used to i8*)], section "llvm.metadata"
define void @foo_used(i32 %0, double %1) {
%3 = alloca i32
%4 = alloca double
store i32 %0, i32* %3
store double %1, double* %4
ret void
}

LLVM IR (-O2):
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (void (i32, double)* @foo_used to i8*)], section "llvm.metadata"
define void @foo_used(i32 %0, double %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ core3_swap(char *, int);
void U_EMRSETSTRETCHBLTMODE_swap(char *record, int torev) {
  core3_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_EMRSETSTRETCHBLTMODE_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <core3_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRSETSTRETCHBLTMODE_swap>:
jmp    1030 <core3_swap@plt>

LLVM IR (-O0):
define void @U_EMRSETSTRETCHBLTMODE_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @core3_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_EMRSETSTRETCHBLTMODE_swap(i8* %0, i32 %1) {
%3 = tail call i32 @core3_swap(i8* %0, i32 %1)
ret void
}
/* Variables and functions */
int BgaReadRegister(int /*<<< orphan*/);
int BgaIsAvailable(void) { return (BgaReadRegister(0) == 0xB0C4); }


x86 assembly (clang, -O0):
<BgaIsAvailable>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <BgaReadRegister@plt>
cmp    $0xb0c4,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BgaIsAvailable>:
push   %rax
xor    %edi,%edi
call   1030 <BgaReadRegister@plt>
xor    %ecx,%ecx
cmp    $0xb0c4,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @BgaIsAvailable() {
%1 = call i32 @BgaReadRegister(i32 0)
%2 = icmp eq i32 %1, 45252
%3 = zext i1 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @BgaIsAvailable() {
%1 = tail call i32 @BgaReadRegister(i32 0)
%2 = icmp eq i32 %1, 45252
%3 = zext i1 %2 to i32
ret i32 %3
}
double overflow(double x) {
  double y;
  do {
    y = x;
    x *= x;
  } while (y != x);
  return x;
}


x86 assembly (clang, -O0):
<overflow>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x10(%rbp),%xmm0
ucomisd -0x8(%rbp),%xmm0
jne    1109 <overflow+0x9>
jp     1109 <overflow+0x9>
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<overflow>:
movapd %xmm0,%xmm1
mulsd  %xmm0,%xmm0
ucomisd %xmm0,%xmm1
jne    1100 <overflow>
jp     1100 <overflow>
ret

LLVM IR (-O0):
define double @overflow(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
br label %4
4: ; preds = %9, %1
%5 = load double, double* %2
store double %5, double* %3
%6 = load double, double* %2
%7 = load double, double* %2
%8 = fmul double %7, %6
store double %8, double* %2
br label %9
9: ; preds = %4
%10 = load double, double* %3
%11 = load double, double* %2
%12 = fcmp une double %10, %11
br i1 %12, label %4, label %13
13: ; preds = %9
%14 = load double, double* %2
ret double %14
}

LLVM IR (-O2):
define double @overflow(double %0) {
br label %2
2: ; preds = %2, %1
%3 = phi double [ %0, %1 ], [ %4, %2 ]
%4 = fmul double %3, %3
%5 = fcmp une double %3, %4
br i1 %5, label %2, label %6
6: ; preds = %2
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ m_sort(int *, int *, int /*<<< orphan*/, int);
void mergeSort(int numbers[], int temp[], int array_size) {
  m_sort(numbers, temp, 0, array_size - 1);
}


x86 assembly (clang, -O0):
<mergeSort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%ecx
sub    $0x1,%ecx
xor    %edx,%edx
call   1030 <m_sort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mergeSort>:
lea    -0x1(%rdx),%ecx
xor    %edx,%edx
jmp    1030 <m_sort@plt>

LLVM IR (-O0):
define void @mergeSort(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32*, i32** %5
%9 = load i32, i32* %6
%10 = sub nsw i32 %9, 1
%11 = call i32 @m_sort(i32* %7, i32* %8, i32 0, i32 %10)
ret void
}

LLVM IR (-O2):
define void @mergeSort(i32* %0, i32* %1, i32 %2) {
%4 = add nsw i32 %2, -1
%5 = tail call i32 @m_sort(i32* %0, i32* %1, i32 0, i32 %4)
ret void
}
/* Variables and functions */
int ntohl(int);
void buf_ntohl(void *buf, int len) {
  int *buf_i = (int *)buf;
  for (int i = 0; i < (len / sizeof(int)) + 1; i++) {
    buf_i[i] = ntohl(buf_i[i]);
  }
}


x86 assembly (clang, -O0):
<buf_ntohl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
movslq -0x1c(%rbp),%rax
movslq -0xc(%rbp),%rcx
shr    $0x2,%rcx
add    $0x1,%rcx
cmp    %rcx,%rax
jae    1172 <buf_ntohl+0x62>
mov    -0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%edi
call   1030 <ntohl@plt>
mov    %eax,%edx
mov    -0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    112e <buf_ntohl+0x1e>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buf_ntohl>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r15
movslq %esi,%r14
shr    $0x2,%r14
add    $0x1,%r14
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nop
mov    (%r15,%rbx,4),%edi
call   1030 <ntohl@plt>
mov    %eax,(%r15,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%r14
jne    1130 <buf_ntohl+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @buf_ntohl(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
store i32 0, i32* %6
br label %9
9: ; preds = %28, %2
%10 = load i32, i32* %6
%11 = sext i32 %10 to i64
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = udiv i64 %13, 4
%15 = add i64 %14, 1
%16 = icmp ult i64 %11, %15
br i1 %16, label %17, label %31
17: ; preds = %9
%18 = load i32*, i32** %5
%19 = load i32, i32* %6
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
%22 = load i32, i32* %21
%23 = call i32 @ntohl(i32 %22)
%24 = load i32*, i32** %5
%25 = load i32, i32* %6
%26 = sext i32 %25 to i64
%27 = getelementptr inbounds i32, i32* %24, i64 %26
store i32 %23, i32* %27
br label %28
28: ; preds = %17
%29 = load i32, i32* %6
%30 = add nsw i32 %29, 1
store i32 %30, i32* %6
br label %9
31: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @buf_ntohl(i8* nocapture %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
%4 = sext i32 %1 to i64
%5 = lshr i64 %4, 2
br label %7
6: ; preds = %7
ret void
7: ; preds = %2, %7
%8 = phi i64 [ 0, %2 ], [ %12, %7 ]
%9 = getelementptr inbounds i32, i32* %3, i64 %8
%10 = load i32, i32* %9
%11 = tail call i32 @ntohl(i32 %10)
store i32 %11, i32* %9
%12 = add nuw nsw i64 %8, 1
%13 = icmp eq i64 %8, %5
br i1 %13, label %6, label %7
}
/* Variables and functions */
int test_if11(void) {
  if (0.5)
    return 'k';
  return 0;
}


x86 assembly (clang, -O0):
<test_if11>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%al
test   $0x1,%al
jne    1113 <test_if11+0x13>
jmp    111f <test_if11+0x1f>
movl   $0x6b,-0x4(%rbp)
jmp    1126 <test_if11+0x26>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_if11>:
mov    $0x6b,%eax
ret

LLVM IR (-O0):
define i32 @test_if11() {
%1 = alloca i32
br i1 true, label %2, label %3
2: ; preds = %0
store i32 107, i32* %1
br label %4
3: ; preds = %0
store i32 0, i32* %1
br label %4
4: ; preds = %3, %2
%5 = load i32, i32* %1
ret i32 %5
}

LLVM IR (-O2):
define i32 @test_if11() {
ret i32 107
}
/* Variables and functions */
int beep();
int curs_beep(void) { return (beep()); }


x86 assembly (clang, -O0):
<curs_beep>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <beep@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<curs_beep>:
xor    %eax,%eax
jmp    1030 <beep@plt>

LLVM IR (-O0):
define i32 @curs_beep() {
%1 = call i32 (...) @beep()
ret i32 %1
}

LLVM IR (-O2):
define i32 @curs_beep() {
%1 = tail call i32 (...) @beep()
ret i32 %1
}
int do_872() { return 872; }


x86 assembly (clang, -O0):
<do_872>:
push   %rbp
mov    %rsp,%rbp
mov    $0x368,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_872>:
mov    $0x368,%eax
ret

LLVM IR (-O0):
define i32 @do_872() {
ret i32 872
}

LLVM IR (-O2):
define i32 @do_872() {
ret i32 872
}
void foo199(int p) {}


x86 assembly (clang, -O0):
<foo199>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo199>:
ret

LLVM IR (-O0):
define void @foo199(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo199(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int /*<<< orphan*/ S_IWGRP;
int /*<<< orphan*/ chmod(char *, int /*<<< orphan*/);
int main(int argc, char **argv) {
  mode_t new_mode = S_IWGRP;
  chmod("/tmp", new_mode);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xecb(%rip),%rdi
call   1030 <chmod@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%esi
lea    0xedf(%rip),%rdi
call   1030 <chmod@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@S_IWGRP = global i32 0
@.str = [5 x i8] c"/tmp\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
%6 = load i32, i32* @S_IWGRP
store i32 %6, i32* %5
%7 = load i32, i32* %5
%8 = call i32 @chmod(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@S_IWGRP = global i32 0
@.str = [5 x i8] c"/tmp\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = load i32, i32* @S_IWGRP
%4 = tail call i32 @chmod(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
void zero_cpu_stall_ticks(struct rcu_data *rdp) {}


x86 assembly (clang, -O0):
<zero_cpu_stall_ticks>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<zero_cpu_stall_ticks>:
ret

LLVM IR (-O0):
%struct.rcu_data = type opaque
define void @zero_cpu_stall_ticks(%struct.rcu_data* %0) {
%2 = alloca %struct.rcu_data*
store %struct.rcu_data* %0, %struct.rcu_data** %2
ret void
}

LLVM IR (-O2):
%struct.rcu_data = type opaque
define void @zero_cpu_stall_ticks(%struct.rcu_data* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ emit_addimm(int, int, int);
int /*<<< orphan*/ emit_cmovl_reg(int, int);
int /*<<< orphan*/ emit_cmp(int, int);
int /*<<< orphan*/ emit_orimm(int, int, int);
void emit_cmpge(int s1, int s2, int sr, int temp) {
  assert(temp >= 0);
  emit_orimm(sr, 1, sr);
  emit_addimm(sr, -1, temp);
  emit_cmp(s2, s1);
  emit_cmovl_reg(temp, sr);
}


x86 assembly (clang, -O0):
<emit_cmpge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
mov    -0xc(%rbp),%edi
mov    -0xc(%rbp),%edx
mov    $0x1,%esi
call   1070 <emit_orimm@plt>
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%edx
mov    $0xffffffff,%esi
call   1060 <emit_addimm@plt>
mov    -0x8(%rbp),%edi
mov    -0x4(%rbp),%esi
call   1040 <emit_cmp@plt>
mov    -0x10(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <emit_cmovl_reg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_cmpge>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%ebp
mov    %edx,%ebx
mov    %esi,%r14d
mov    %edi,%r15d
mov    %ecx,%edi
not    %edi
shr    $0x1f,%edi
call   1050 <assert@plt>
mov    %ebx,%edi
mov    $0x1,%esi
mov    %ebx,%edx
call   1070 <emit_orimm@plt>
mov    %ebx,%edi
mov    $0xffffffff,%esi
mov    %ebp,%edx
call   1060 <emit_addimm@plt>
mov    %r14d,%edi
mov    %r15d,%esi
call   1040 <emit_cmp@plt>
mov    %ebp,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <emit_cmovl_reg@plt>

LLVM IR (-O0):
define void @emit_cmpge(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %8
%10 = icmp sge i32 %9, 0
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i32, i32* %7
%14 = load i32, i32* %7
%15 = call i32 @emit_orimm(i32 %13, i32 1, i32 %14)
%16 = load i32, i32* %7
%17 = load i32, i32* %8
%18 = call i32 @emit_addimm(i32 %16, i32 -1, i32 %17)
%19 = load i32, i32* %6
%20 = load i32, i32* %5
%21 = call i32 @emit_cmp(i32 %19, i32 %20)
%22 = load i32, i32* %8
%23 = load i32, i32* %7
%24 = call i32 @emit_cmovl_reg(i32 %22, i32 %23)
ret void
}

LLVM IR (-O2):
define void @emit_cmpge(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = xor i32 %3, -1
%6 = lshr i32 %5, 31
%7 = tail call i32 @assert(i32 %6)
%8 = tail call i32 @emit_orimm(i32 %2, i32 1, i32 %2)
%9 = tail call i32 @emit_addimm(i32 %2, i32 -1, i32 %3)
%10 = tail call i32 @emit_cmp(i32 %1, i32 %0)
%11 = tail call i32 @emit_cmovl_reg(i32 %3, i32 %2)
ret void
}
int _iswhitespace(char c) {
  return c == ' ' || c == '\n' || c == '\t' || c == '\r';
}


x86 assembly (clang, -O0):
<_iswhitespace>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x2(%rbp)
je     114d <_iswhitespace+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0xa,%ecx
mov    %al,-0x2(%rbp)
je     114d <_iswhitespace+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x9,%ecx
mov    %al,-0x2(%rbp)
je     114d <_iswhitespace+0x4d>
movsbl -0x1(%rbp),%eax
cmp    $0xd,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_iswhitespace>:
cmp    $0x20,%dil
ja     1120 <_iswhitespace+0x20>
mov    $0x1,%eax
movzbl %dil,%ecx
movabs $0x100000600,%rdx
bt     %rcx,%rdx
jae    1120 <_iswhitespace+0x20>
ret
xor    %eax,%eax
cmp    $0xd,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @_iswhitespace(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 32
br i1 %5, label %18, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 10
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 9
br i1 %13, label %18, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 13
br label %18
18: ; preds = %14, %10, %6, %1
%19 = phi i1 [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %17, %14 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @_iswhitespace(i8 signext %0) {
switch i8 %0, label %2 [
i8 32, label %5
i8 10, label %5
i8 9, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 13
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char *, int);
main() { write(1, "hello\n", 6); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
lea    0xee0(%rip),%rsi
mov    $0x6,%edx
call   1030 <write@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rsi
mov    $0x1,%edi
mov    $0x6,%edx
call   1030 <write@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"hello\0A\00"
define i32 @main() {
%1 = call i32 @write(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 6)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"hello\0A\00"
define i32 @main() {
%1 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ tempconv(int, int, int);
int main(void) {
  int lower, upper, step;
  lower = 0;
  upper = 300;
  step = 20;
  tempconv(lower, upper, step);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x12c,-0xc(%rbp)
movl   $0x14,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <tempconv@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
mov    $0x12c,%esi
mov    $0x14,%edx
call   1030 <tempconv@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 300, i32* %3
store i32 20, i32* %4
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @tempconv(i32 %5, i32 %6, i32 %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @tempconv(i32 0, i32 300, i32 20)
ret i32 0
}
int os_setbinmode(int fd, int mode) { return 0; }


x86 assembly (clang, -O0):
<os_setbinmode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_setbinmode>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @os_setbinmode(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @os_setbinmode(i32 %0, i32 %1) {
ret i32 0
}
int check(int x) {
  int i;
  if (x % 2 == 0)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<check>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1127 <check+0x27>
movl   $0x1,-0x4(%rbp)
jmp    112e <check+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check>:
mov    %edi,%eax
not    %eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @check(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = srem i32 %5, 2
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @check(i32 %0) {
%2 = and i32 %0, 1
%3 = xor i32 %2, 1
ret i32 %3
}
/* Type definitions */
typedef float uint32_t;

/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, float);
void ironlake_debug_panel_fitting_2(char *result, int len, int reg,
                                    uint32_t val, uint32_t devid) {
  snprintf(result, len, "vscale %f", val / (float)(1 << 15));
}


x86 assembly (clang, -O0):
<ironlake_debug_panel_fitting_2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
movss  %xmm1,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
movss  -0x14(%rbp),%xmm0
movss  0xec0(%rip),%xmm1
divss  %xmm1,%xmm0
lea    0xeb9(%rip),%rdx
call   1030 <snprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ironlake_debug_panel_fitting_2>:
mulss  0xee8(%rip),%xmm0
lea    0xee5(%rip),%rdx
jmp    1030 <snprintf@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"vscale %f\00"
define void @ironlake_debug_panel_fitting_2(i8* %0, i32 %1, i32 %2, float %3, float %4) {
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
%9 = alloca float
%10 = alloca float
store i8* %0, i8** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store float %3, float* %9
store float %4, float* %10
%11 = load i8*, i8** %6
%12 = load i32, i32* %7
%13 = load float, float* %9
%14 = fdiv float %13, 3.276800e+04
%15 = call i32 @snprintf(i8* %11, i32 %12, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), float %14)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"vscale %f\00"
define void @ironlake_debug_panel_fitting_2(i8* %0, i32 %1, i32 %2, float %3, float %4) {
%6 = fmul float %3, 0x3F00000000000000
%7 = tail call i32 @snprintf(i8* %0, i32 %1, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), float %6)
ret void
}
/* Variables and functions */
int is_first_in_group_NewOrderSingle(size_t __tag) {
  (void)__tag;
  return 0;
}


x86 assembly (clang, -O0):
<is_first_in_group_NewOrderSingle>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_first_in_group_NewOrderSingle>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_first_in_group_NewOrderSingle(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @is_first_in_group_NewOrderSingle(i64 %0) {
ret i32 0
}
unsigned int get_length(unsigned char *c) {
  unsigned int i = 0;
  while (*c) {
    c++;
    i++;
  }
  return i;
}


x86 assembly (clang, -O0):
<get_length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1136 <get_length+0x36>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <get_length+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_length>:
cmpb   $0x0,(%rdi)
je     111c <get_length+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <get_length+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_length(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
%11 = load i32, i32* %3
%12 = add i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @get_length(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add i32 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %12
}
/* Type definitions */
struct timer {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free_timer(struct timer *);
double read_timer_seconds(struct timer *);
double read_timer_seconds_free(struct timer *t) {
  double val = read_timer_seconds(t);
  free_timer(t);
  return val;
}


x86 assembly (clang, -O0):
<read_timer_seconds_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <read_timer_seconds@plt>
movsd  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free_timer@plt>
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_timer_seconds_free>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
call   1040 <read_timer_seconds@plt>
movsd  %xmm0,0x8(%rsp)
mov    %rbx,%rdi
call   1030 <free_timer@plt>
movsd  0x8(%rsp),%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.timer = type { i32 }
define double @read_timer_seconds_free(%struct.timer* %0) {
%2 = alloca %struct.timer*
%3 = alloca double
store %struct.timer* %0, %struct.timer** %2
%4 = load %struct.timer*, %struct.timer** %2
%5 = call double @read_timer_seconds(%struct.timer* %4)
store double %5, double* %3
%6 = load %struct.timer*, %struct.timer** %2
%7 = call i32 @free_timer(%struct.timer* %6)
%8 = load double, double* %3
ret double %8
}

LLVM IR (-O2):
%struct.timer = type { i32 }
define double @read_timer_seconds_free(%struct.timer* %0) {
%2 = tail call double @read_timer_seconds(%struct.timer* %0)
%3 = tail call i32 @free_timer(%struct.timer* %0)
ret double %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
struct level_buf {
  int dummy;
};
struct deflate_icf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ set_long_icf_fg_base(int /*<<< orphan*/ *,
                                        int /*<<< orphan*/ *,
                                        struct deflate_icf *,
                                        struct level_buf *);
void set_long_icf_fg(uint8_t *next_in, uint8_t *end_in,
                     struct deflate_icf *match_lookup,
                     struct level_buf *level_buf) {
  set_long_icf_fg_base(next_in, end_in, match_lookup, level_buf);
}


x86 assembly (clang, -O0):
<set_long_icf_fg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <set_long_icf_fg_base@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_long_icf_fg>:
jmp    1030 <set_long_icf_fg_base@plt>

LLVM IR (-O0):
%struct.deflate_icf = type { i32 }
%struct.level_buf = type { i32 }
define void @set_long_icf_fg(i32* %0, i32* %1, %struct.deflate_icf* %2, %struct.level_buf* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca %struct.deflate_icf*
%8 = alloca %struct.level_buf*
store i32* %0, i32** %5
store i32* %1, i32** %6
store %struct.deflate_icf* %2, %struct.deflate_icf** %7
store %struct.level_buf* %3, %struct.level_buf** %8
%9 = load i32*, i32** %5
%10 = load i32*, i32** %6
%11 = load %struct.deflate_icf*, %struct.deflate_icf** %7
%12 = load %struct.level_buf*, %struct.level_buf** %8
%13 = call i32 @set_long_icf_fg_base(i32* %9, i32* %10, %struct.deflate_icf* %11, %struct.level_buf* %12)
ret void
}

LLVM IR (-O2):
%struct.deflate_icf = type { i32 }
%struct.level_buf = type { i32 }
define void @set_long_icf_fg(i32* %0, i32* %1, %struct.deflate_icf* %2, %struct.level_buf* %3) {
%5 = tail call i32 @set_long_icf_fg_base(i32* %0, i32* %1, %struct.deflate_icf* %2, %struct.level_buf* %3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ F_WRLCK;
int /*<<< orphan*/ _fd_test_lock(int, int /*<<< orphan*/);
pid_t fd_is_write_lock_blocked(int fd) { return (_fd_test_lock(fd, F_WRLCK)); }


x86 assembly (clang, -O0):
<fd_is_write_lock_blocked>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
call   1030 <_fd_test_lock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fd_is_write_lock_blocked>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <_fd_test_lock@plt>

LLVM IR (-O0):
@F_WRLCK = global i32 0
define i32 @fd_is_write_lock_blocked(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @F_WRLCK
%5 = call i32 @_fd_test_lock(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@F_WRLCK = global i32 0
define i32 @fd_is_write_lock_blocked(i32 %0) {
%2 = load i32, i32* @F_WRLCK
%3 = tail call i32 @_fd_test_lock(i32 %0, i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void program_info(void) {
  printf("FlatFileDataBase (c)2010-12 Mycal (www.mycal.net)\n");
  printf("  Version "
         "0.4"
         " built "
         "Mar 15 2022"
         " at "
         "17:18:09"
         "\n\n");
}


x86 assembly (clang, -O0):
<program_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf0c(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<program_info>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf0e(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [51 x i8] c"FlatFileDataBase (c)2010-12 Mycal (www.mycal.net)\0A\00"
@.str.1 = [46 x i8] c" Version 0.4 built Mar 15 2022 at 17:18:09\0A\0A\00"
define void @program_info() {
%1 = call i32 @printf(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [50 x i8] c"FlatFileDataBase (c)2010-12 Mycal (www.mycal.net)\00"
@str.2 = [45 x i8] c" Version 0.4 built Mar 15 2022 at 17:18:09\0A\00"
define void @program_info() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([50 x i8], [50 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([45 x i8], [45 x i8]* @str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, float *);
int main() {
  float m;
  printf("Metro quadrado: ");
  scanf("%f", &m);
  printf("Acre: %.2f", m * 0.000247);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xed2(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xed5(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xea2(%rip),%xmm1
mulsd  %xmm1,%xmm0
lea    0xeb3(%rip),%rdi
mov    $0x1,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee0(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xee3(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
movss  0x4(%rsp),%xmm0
cvtss2sd %xmm0,%xmm0
mulsd  0xeae(%rip),%xmm0
lea    0xec3(%rip),%rdi
mov    $0x1,%al
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Metro quadrado: \00"
@.str.1 = [3 x i8] c"%f\00"
@.str.2 = [11 x i8] c"Acre: %.2f\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca float
store i32 0, i32* %1
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), float* %2)
%5 = load float, float* %2
%6 = fpext float %5 to double
%7 = fmul double %6, 2.470000e-04
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0), double %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [17 x i8] c"Metro quadrado: \00"
@.str.1 = [3 x i8] c"%f\00"
@.str.2 = [11 x i8] c"Acre: %.2f\00"
define i32 @main() {
%1 = alloca float
%2 = bitcast float* %1 to i8*
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), float* %1)
%5 = load float, float* %1
%6 = fpext float %5 to double
%7 = fmul double %6, 2.470000e-04
%8 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0), double %7)
ret i32 0
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int celcon_track_solution_path(int k, int i, int otp) {
  int b[2], fail;
  double *c;
  b[0] = i;
  b[1] = otp;
  fail = _ada_use_c2phc(103, &k, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<celcon_track_solution_path>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
lea    -0x14(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x67,%edi
lea    -0x4(%rbp),%rsi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<celcon_track_solution_path>:
sub    $0x18,%rsp
mov    %edi,0xc(%rsp)
mov    %esi,0x10(%rsp)
mov    %edx,0x14(%rsp)
lea    0xc(%rsp),%rsi
lea    0x10(%rsp),%rdx
mov    $0x67,%edi
call   1030 <_ada_use_c2phc@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @celcon_track_solution_path(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca [2 x i32]
%8 = alloca i32
%9 = alloca double*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%10 = load i32, i32* %5
%11 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 0
store i32 %10, i32* %11
%12 = load i32, i32* %6
%13 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 1
store i32 %12, i32* %13
%14 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 0
%15 = load double*, double** %9
%16 = call i32 @_ada_use_c2phc(i32 103, i32* %4, i32* %14, double* %15)
store i32 %16, i32* %8
%17 = load i32, i32* %8
ret i32 %17
}

LLVM IR (-O2):
define i32 @celcon_track_solution_path(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca [2 x i32]
store i32 %0, i32* %4
%6 = bitcast [2 x i32]* %5 to i8*
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %5, i64 0, i64 0
store i32 %1, i32* %7
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %5, i64 0, i64 1
store i32 %2, i32* %8
%9 = call i32 @_ada_use_c2phc(i32 103, i32* %4, i32* %7, double* undef)
ret i32 %9
}
/* Variables and functions */
int strcmp_generic(char const *, char const *);
int strcmp(const char *s1, const char *s2) { return strcmp_generic(s1, s2); }


x86 assembly (clang, -O0):
<strcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp_generic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp>:
jmp    1030 <strcmp_generic@plt>

LLVM IR (-O0):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp_generic(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = tail call i32 @strcmp_generic(i8* %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ sectioning_underscore(char *);
void cm_unnumberedsubsubsec(void) {
  sectioning_underscore("unnumberedsubsubsec");
}


x86 assembly (clang, -O0):
<cm_unnumberedsubsubsec>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <sectioning_underscore@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cm_unnumberedsubsubsec>:
lea    0xee9(%rip),%rdi
jmp    1030 <sectioning_underscore@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"unnumberedsubsubsec\00"
define void @cm_unnumberedsubsubsec() {
%1 = call i32 @sectioning_underscore(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [20 x i8] c"unnumberedsubsubsec\00"
define void @cm_unnumberedsubsubsec() {
%1 = tail call i32 @sectioning_underscore(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char *argv[]) {
  int exitCode = 0;
  printf("Exiting with: %i", exitCode);
  return exitCode;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Exiting with: %i\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
%7 = load i32, i32* %6
%8 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = load i32, i32* %6
ret i32 %9
}

LLVM IR (-O2):
@.str = [17 x i8] c"Exiting with: %i\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 0)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ __u32;

/* Variables and functions */
int valid_tuner_capability(int /*<<< orphan*/);
int valid_modulator_capability(__u32 capability) {
  return valid_tuner_capability(capability);
}


x86 assembly (clang, -O0):
<valid_modulator_capability>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <valid_tuner_capability@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<valid_modulator_capability>:
jmp    1030 <valid_tuner_capability@plt>

LLVM IR (-O0):
define i32 @valid_modulator_capability(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @valid_tuner_capability(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @valid_modulator_capability(i32 %0) {
%2 = tail call i32 @valid_tuner_capability(i32 %0)
ret i32 %2
}
double RHtoE(double Es, double rh) {
  double E = Es * (rh / 100);
  return E;
}


x86 assembly (clang, -O0):
<RHtoE>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  0xee0(%rip),%xmm2
divsd  %xmm2,%xmm1
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<RHtoE>:
divsd  0xef8(%rip),%xmm1
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @RHtoE(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %3
%7 = load double, double* %4
%8 = fdiv double %7, 1.000000e+02
%9 = fmul double %6, %8
store double %9, double* %5
%10 = load double, double* %5
ret double %10
}

LLVM IR (-O2):
define double @RHtoE(double %0, double %1) {
%3 = fdiv double %1, 1.000000e+02
%4 = fmul double %3, %0
ret double %4
}