#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int get_cputype(int);
int get_vendor();
int /*<<< orphan*/ have_cpuid();
scalar_t__ support_avx();
int /*<<< orphan*/ support_avx2();
int /*<<< orphan*/ support_avx512();
int /*<<< orphan*/ support_avx512_bf16();
int get_coretype(void) {
  int family, exfamily, model, exmodel, vendor, stepping;
  if (!have_cpuid())
    return 1;
  family = get_cputype(4);
  exfamily = get_cputype(1);
  model = get_cputype(5);
  exmodel = get_cputype(2);
  stepping = get_cputype(9);
  vendor = get_vendor();
  if (vendor == 1) {
    switch (family) {
    case 4:
      return 1;
    case 5:
      return 2;
    case 6:
      switch (exmodel) {
      case 0:
        switch (model) {
        case 0:
        case 1:
        case 2:
        case 3:
        case 4:
        case 5:
        case 6:
          return 14;
        case 7:
          return 4;
        case 8:
        case 10:
        case 11:
          return 5;
        case 9:
        case 13:
        case 14:
          return 8;
        case 15:
          return 14;
        }
        break;
      case 1:
        switch (model) {
        case 6:
          return 14;
        case 7:
          return 15;
        case 10:
        case 11:
        case 14:
        case 15:
          return 17;
        case 12:
          return 18;
        case 13:
          return 16;
        }
        break;
      case 2:
        switch (model) {
        case 5:
          return 17;
        case 10:
          if (support_avx())
            return 20;
          else
            return 17;
        case 12:
          return 17;
        case 13:
          if (support_avx())
            return 20;
          else
            return 17;
        case 14:
        case 15:
          return 17;
        }
        break;
      case 3:
        switch (model) {
        case 7:
          return 18;
        case 10:
        case 14:
          if (support_avx())
            return 20;
          else
            return 17;
        case 12:
        case 15:
          if (support_avx())
            return 24;
          else
            return 17;
        case 13:
          if (support_avx())
            return 24;
          else
            return 17;
        }
        break;
      case 4:
        switch (model) {
        case 5:
        case 6:
          if (support_avx())
            return 24;
          else
            return 17;
        case 7:
        case 15:
          if (support_avx())
            return 24;
          else
            return 17;
        case 14:
          if (support_avx())
            return 24;
          else
            return 17;
        case 12:
        case 13:
          return 17;
        }
        break;
      case 10:
        switch (model) {
        case 5:
        case 6:
          if (support_avx())
            return 24;
          else
            return 17;
        case 7:
          if (support_avx512())
            return 28;
          if (support_avx2())
            return 24;
          if (support_avx())
            return 20;
          else
            return 17;
        }
      case 5:
        switch (model) {
        case 6:
          if (support_avx())
            return 24;
          else
            return 17;
        case 5:
          if (support_avx512_bf16())
            return 30;
          return 28;
        case 14:
          if (support_avx())
            return 24;
          else
            return 17;
        case 7:
          if (support_avx())
            return 24;
          else
            return 17;
        case 12:
          return 17;
        }
        break;
      case 6:
        if (model == 6)
          return 28;
        if (model == 10)
          if (support_avx512_bf16())
            return 30;
        return 28;
        break;
      case 7:
        if (model == 10)
          return 17;
        if (model == 14)
          return 28;
        break;
      case 9:
      case 8:
        if (model == 12) {
          if (support_avx512())
            return 28;
          if (support_avx2())
            return 24;
          if (support_avx())
            return 20;
          else
            return 17;
        }
        if (model == 14) {
          if (support_avx())
            return 24;
          else
            return 17;
        }
      }
      break;
    case 15:
      if (model <= 0x2)
        return 6;
      else
        return 7;
    }
  }
  if (vendor == 3) {
    if (family <= 0x5)
      return 1;
    if (family <= 0xe)
      return 11;
    if (family == 0xf) {
      if ((exfamily == 0) || (exfamily == 2))
        return 10;
      else if (exfamily == 5)
        return 21;
      else if (exfamily == 6) {
        switch (model) {
        case 1:
          if (support_avx())
            return 22;
          else
            return 11;
        case 2:
        case 3:
          if (support_avx())
            return 23;
          else
            return 11;
        case 5:
          if (support_avx())
            return 26;
          else
            return 11;
        case 0:
        case 8:
          switch (exmodel) {
          case 1:
            if (support_avx())
              return 23;
            else
              return 11;
          case 3:
            if (support_avx())
              return 25;
            else
              return 11;
          case 6:
            if (support_avx())
              return 26;
            else
              return 11;
          }
          break;
        }
      } else if (exfamily == 8 || exfamily == 10) {
        switch (model) {
        case 1:
        case 8:
        default:
          if (support_avx())
            return 27;
          else
            return 11;
        }
      } else {
        return 11;
      }
    }
  }
  if (vendor == 11) {
    if (family == 0xf) {
      if (exfamily == 9) {
        if (support_avx())
          return 27;
        else
          return 11;
      } else {
        return 11;
      }
    }
  }
  if (vendor == 6) {
    switch (family) {
    case 0x6:
      if (model == 0xf && stepping < 0xe)
        return 19;
      return 17;
    default:
      if (family >= 0x7)
        return 17;
      else
        return 12;
    }
  }
  if (vendor == 12) {
    return 17;
  }
  return 0;
}


x86 assembly (clang, -O0):
<get_coretype>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
mov    $0x0,%al
call   1090 <have_cpuid@plt>
cmp    $0x0,%eax
jne    1197 <get_coretype+0x27>
movl   $0x1,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x4,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x8(%rbp)
mov    $0x1,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0xc(%rbp)
mov    $0x5,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x10(%rbp)
mov    $0x2,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x14(%rbp)
mov    $0x9,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x1c(%rbp)
mov    $0x0,%al
call   1060 <get_vendor@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x1,-0x18(%rbp)
jne    1811 <get_coretype+0x6a1>
mov    -0x8(%rbp),%eax
add    $0xfffffffc,%eax
mov    %eax,%ecx
mov    %rcx,-0x28(%rbp)
sub    $0xb,%eax
ja     180c <get_coretype+0x69c>
mov    -0x28(%rbp),%rax
lea    0xdf4(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x2,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    -0x14(%rbp),%eax
mov    %rax,-0x30(%rbp)
sub    $0xa,%rax
ja     17e5 <get_coretype+0x675>
mov    -0x30(%rbp),%rax
lea    0xde7(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x10(%rbp),%eax
mov    %rax,-0x38(%rbp)
sub    $0xf,%rax
ja     12b3 <get_coretype+0x143>
mov    -0x38(%rbp),%rax
lea    0xeba(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0xe,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x4,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x5,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x8,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0xe,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
jmp    17e5 <get_coretype+0x675>
mov    -0x10(%rbp),%eax
add    $0xfffffffa,%eax
mov    %eax,%ecx
mov    %rcx,-0x40(%rbp)
sub    $0x9,%eax
ja     131d <get_coretype+0x1ad>
mov    -0x40(%rbp),%rax
lea    0xe28(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0xe,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0xf,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x12,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x10,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
jmp    17e5 <get_coretype+0x675>
mov    -0x10(%rbp),%eax
add    $0xfffffffb,%eax
mov    %eax,%ecx
mov    %rcx,-0x48(%rbp)
sub    $0xa,%eax
ja     13c1 <get_coretype+0x251>
mov    -0x48(%rbp),%rax
lea    0xd92(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     1374 <get_coretype+0x204>
movl   $0x14,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     13a9 <get_coretype+0x239>
movl   $0x14,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
jmp    17e5 <get_coretype+0x675>
mov    -0x10(%rbp),%eax
add    $0xfffffff9,%eax
mov    %eax,%ecx
mov    %rcx,-0x50(%rbp)
sub    $0x8,%eax
ja     1476 <get_coretype+0x306>
mov    -0x50(%rbp),%rax
lea    0xcca(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x12,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     1418 <get_coretype+0x2a8>
movl   $0x14,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     1441 <get_coretype+0x2d1>
movl   $0x18,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     146a <get_coretype+0x2fa>
movl   $0x18,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
jmp    17e5 <get_coretype+0x675>
mov    -0x10(%rbp),%eax
add    $0xfffffffb,%eax
mov    %eax,%ecx
mov    %rcx,-0x58(%rbp)
sub    $0xa,%eax
ja     152b <get_coretype+0x3bb>
mov    -0x58(%rbp),%rax
lea    0xbe9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     14c1 <get_coretype+0x351>
movl   $0x18,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     14ea <get_coretype+0x37a>
movl   $0x18,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     1513 <get_coretype+0x3a3>
movl   $0x18,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
jmp    17e5 <get_coretype+0x675>
mov    -0x10(%rbp),%eax
mov    %eax,-0x5c(%rbp)
add    $0xfffffffb,%eax
sub    $0x2,%eax
jb     1558 <get_coretype+0x3e8>
jmp    1547 <get_coretype+0x3d7>
mov    -0x5c(%rbp),%eax
sub    $0x7,%eax
je     1581 <get_coretype+0x411>
jmp    15e2 <get_coretype+0x472>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     1575 <get_coretype+0x405>
movl   $0x18,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1040 <support_avx512@plt>
cmp    $0x0,%eax
je     159d <get_coretype+0x42d>
movl   $0x1c,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1080 <support_avx2@plt>
cmp    $0x0,%eax
je     15b9 <get_coretype+0x449>
movl   $0x18,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     15d6 <get_coretype+0x466>
movl   $0x14,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
jmp    15e7 <get_coretype+0x477>
mov    -0x10(%rbp),%eax
add    $0xfffffffb,%eax
mov    %eax,%ecx
mov    %rcx,-0x68(%rbp)
sub    $0x9,%eax
ja     16bf <get_coretype+0x54f>
mov    -0x68(%rbp),%rax
lea    0xa55(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     162d <get_coretype+0x4bd>
movl   $0x18,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1050 <support_avx512_bf16@plt>
cmp    $0x0,%eax
je     1655 <get_coretype+0x4e5>
movl   $0x1e,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x1c,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     167e <get_coretype+0x50e>
movl   $0x18,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     16a7 <get_coretype+0x537>
movl   $0x18,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
jmp    17e5 <get_coretype+0x675>
cmpl   $0x6,-0x10(%rbp)
jne    16da <get_coretype+0x56a>
movl   $0x1c,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
cmpl   $0xa,-0x10(%rbp)
jne    1705 <get_coretype+0x595>
mov    $0x0,%al
call   1050 <support_avx512_bf16@plt>
cmp    $0x0,%eax
je     1700 <get_coretype+0x590>
movl   $0x1e,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
jmp    1705 <get_coretype+0x595>
movl   $0x1c,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
cmpl   $0xa,-0x10(%rbp)
jne    1727 <get_coretype+0x5b7>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
cmpl   $0xe,-0x10(%rbp)
jne    173d <get_coretype+0x5cd>
movl   $0x1c,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
jmp    17e5 <get_coretype+0x675>
cmpl   $0xc,-0x10(%rbp)
jne    17ad <get_coretype+0x63d>
mov    $0x0,%al
call   1040 <support_avx512@plt>
cmp    $0x0,%eax
je     1768 <get_coretype+0x5f8>
movl   $0x1c,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1080 <support_avx2@plt>
cmp    $0x0,%eax
je     1784 <get_coretype+0x614>
movl   $0x18,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     17a1 <get_coretype+0x631>
movl   $0x14,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
cmpl   $0xe,-0x10(%rbp)
jne    17e0 <get_coretype+0x670>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     17d4 <get_coretype+0x664>
movl   $0x18,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
jmp    17e5 <get_coretype+0x675>
jmp    180c <get_coretype+0x69c>
cmpl   $0x2,-0x10(%rbp)
jg     1800 <get_coretype+0x690>
movl   $0x6,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x7,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
jmp    1811 <get_coretype+0x6a1>
cmpl   $0x3,-0x18(%rbp)
jne    1a73 <get_coretype+0x903>
cmpl   $0x5,-0x8(%rbp)
jg     1831 <get_coretype+0x6c1>
movl   $0x1,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
cmpl   $0xe,-0x8(%rbp)
jg     1847 <get_coretype+0x6d7>
movl   $0xb,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
cmpl   $0xf,-0x8(%rbp)
jne    1a6e <get_coretype+0x8fe>
cmpl   $0x0,-0xc(%rbp)
je     1865 <get_coretype+0x6f5>
cmpl   $0x2,-0xc(%rbp)
jne    1871 <get_coretype+0x701>
movl   $0xa,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
cmpl   $0x5,-0xc(%rbp)
jne    1887 <get_coretype+0x717>
movl   $0x15,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
cmpl   $0x6,-0xc(%rbp)
jne    19ec <get_coretype+0x87c>
mov    -0x10(%rbp),%eax
mov    %rax,-0x70(%rbp)
sub    $0x8,%rax
ja     19e7 <get_coretype+0x877>
mov    -0x70(%rbp),%rax
lea    0x8bb(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     18d3 <get_coretype+0x763>
movl   $0x16,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0xb,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     18fc <get_coretype+0x78c>
movl   $0x17,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0xb,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     1925 <get_coretype+0x7b5>
movl   $0x1a,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0xb,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    -0x14(%rbp),%eax
mov    %eax,-0x74(%rbp)
sub    $0x1,%eax
je     1967 <get_coretype+0x7f7>
jmp    1945 <get_coretype+0x7d5>
mov    -0x74(%rbp),%eax
sub    $0x3,%eax
je     1990 <get_coretype+0x820>
jmp    1956 <get_coretype+0x7e6>
mov    -0x74(%rbp),%eax
sub    $0x6,%eax
je     19b9 <get_coretype+0x849>
jmp    19e2 <get_coretype+0x872>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     1984 <get_coretype+0x814>
movl   $0x17,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0xb,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     19ad <get_coretype+0x83d>
movl   $0x19,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0xb,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     19d6 <get_coretype+0x866>
movl   $0x1a,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0xb,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
jmp    19e7 <get_coretype+0x877>
jmp    1a5f <get_coretype+0x8ef>
cmpl   $0x8,-0xc(%rbp)
je     1a00 <get_coretype+0x890>
cmpl   $0xa,-0xc(%rbp)
jne    1a53 <get_coretype+0x8e3>
mov    -0x10(%rbp),%eax
mov    %eax,-0x78(%rbp)
sub    $0x1,%eax
je     1a25 <get_coretype+0x8b5>
jmp    1a14 <get_coretype+0x8a4>
mov    -0x78(%rbp),%eax
sub    $0x8,%eax
jne    1a2a <get_coretype+0x8ba>
jmp    1a25 <get_coretype+0x8b5>
jmp    1a2a <get_coretype+0x8ba>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     1a47 <get_coretype+0x8d7>
movl   $0x1b,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0xb,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0xb,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
jmp    1a64 <get_coretype+0x8f4>
jmp    1a69 <get_coretype+0x8f9>
jmp    1a6e <get_coretype+0x8fe>
jmp    1a73 <get_coretype+0x903>
cmpl   $0xb,-0x18(%rbp)
jne    1acb <get_coretype+0x95b>
cmpl   $0xf,-0x8(%rbp)
jne    1ac6 <get_coretype+0x956>
cmpl   $0x9,-0xc(%rbp)
jne    1aba <get_coretype+0x94a>
mov    $0x0,%al
call   1070 <support_avx@plt>
cmp    $0x0,%rax
je     1aae <get_coretype+0x93e>
movl   $0x1b,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0xb,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0xb,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
jmp    1acb <get_coretype+0x95b>
cmpl   $0x6,-0x18(%rbp)
jne    1b34 <get_coretype+0x9c4>
mov    -0x8(%rbp),%eax
sub    $0x6,%eax
jne    1b12 <get_coretype+0x9a2>
jmp    1ae6 <get_coretype+0x976>
cmpl   $0xf,-0x10(%rbp)
jne    1b06 <get_coretype+0x996>
cmpl   $0xe,-0x1c(%rbp)
jge    1b06 <get_coretype+0x996>
movl   $0x13,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
cmpl   $0x7,-0x8(%rbp)
jl     1b28 <get_coretype+0x9b8>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0xc,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
cmpl   $0xc,-0x18(%rbp)
jne    1b4a <get_coretype+0x9da>
movl   $0x11,-0x4(%rbp)
jmp    1b51 <get_coretype+0x9e1>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_coretype>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
xor    %eax,%eax
call   1090 <have_cpuid@plt>
test   %eax,%eax
je     1211 <get_coretype+0xa1>
mov    $0x4,%edi
call   1030 <get_cputype@plt>
mov    %eax,%ebp
mov    $0x1,%r13d
mov    $0x1,%edi
call   1030 <get_cputype@plt>
mov    %eax,%r12d
mov    $0x5,%edi
call   1030 <get_cputype@plt>
mov    %eax,%r14d
mov    $0x2,%edi
call   1030 <get_cputype@plt>
mov    %eax,%r15d
mov    $0x9,%edi
call   1030 <get_cputype@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1060 <get_vendor@plt>
cmp    $0x3,%eax
je     121c <get_coretype+0xac>
cmp    $0x1,%eax
jne    12b3 <get_coretype+0x143>
add    $0xfffffffc,%ebp
cmp    $0xb,%ebp
ja     1569 <get_coretype+0x3f9>
mov    $0x1,%r13d
lea    0xe27(%rip),%rax
movslq (%rax,%rbp,4),%rcx
add    %rax,%rcx
jmp    *%rcx
mov    $0x2,%r13d
jmp    156c <get_coretype+0x3fc>
mov    $0x1,%r13d
jmp    156c <get_coretype+0x3fc>
cmp    $0x6,%ebp
jl     156c <get_coretype+0x3fc>
mov    $0xb,%r13d
cmp    $0xf,%ebp
jb     156c <get_coretype+0x3fc>
jne    1569 <get_coretype+0x3f9>
mov    %r12d,%eax
and    $0xfffffffd,%eax
je     13b7 <get_coretype+0x247>
cmp    $0x5,%r12d
je     13c2 <get_coretype+0x252>
cmp    $0x6,%r12d
jne    13cd <get_coretype+0x25d>
cmp    $0x8,%r14d
ja     1569 <get_coretype+0x3f9>
mov    %r14d,%eax
lea    0xd92(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
cmp    $0x6,%r15d
je     157e <get_coretype+0x40e>
cmp    $0x3,%r15d
je     15b4 <get_coretype+0x444>
cmp    $0x1,%r15d
jne    1569 <get_coretype+0x3f9>
xor    %eax,%eax
call   1070 <support_avx@plt>
test   %rax,%rax
mov    $0xb,%eax
mov    $0x17,%r13d
cmove  %eax,%r13d
jmp    156c <get_coretype+0x3fc>
cmp    $0xb,%eax
jne    12eb <get_coretype+0x17b>
cmp    $0xf,%ebp
jne    12eb <get_coretype+0x17b>
mov    $0xb,%r13d
cmp    $0x9,%r12d
jne    156c <get_coretype+0x3fc>
xor    %eax,%eax
call   1070 <support_avx@plt>
xor    %r13d,%r13d
test   %rax,%rax
setne  %r13b
shl    $0x4,%r13d
or     $0xb,%r13d
jmp    156c <get_coretype+0x3fc>
cmp    $0xc,%eax
je     1399 <get_coretype+0x229>
cmp    $0x6,%eax
jne    1569 <get_coretype+0x3f9>
cmp    $0x6,%ebp
jne    13a4 <get_coretype+0x234>
cmp    $0xf,%r14d
sete   %al
cmp    $0xe,%ebx
setl   %cl
and    %al,%cl
movzbl %cl,%eax
lea    (%rax,%rax,1),%r13d
add    $0x11,%r13d
jmp    156c <get_coretype+0x3fc>
cmp    $0xa,%r15d
ja     1569 <get_coretype+0x3f9>
mov    %r15d,%eax
lea    0xd1b(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
cmp    $0xe,%r14d
je     154e <get_coretype+0x3de>
cmp    $0xc,%r14d
jne    1569 <get_coretype+0x3f9>
xor    %eax,%eax
call   1040 <support_avx512@plt>
mov    $0x1c,%r13d
test   %eax,%eax
jne    156c <get_coretype+0x3fc>
xor    %eax,%eax
call   1080 <support_avx2@plt>
mov    $0x18,%r13d
test   %eax,%eax
jne    156c <get_coretype+0x3fc>
jmp    1466 <get_coretype+0x2f6>
xor    %r13d,%r13d
cmp    $0x3,%r14d
setl   %r13b
xor    $0x7,%r13d
jmp    156c <get_coretype+0x3fc>
mov    $0x11,%r13d
jmp    156c <get_coretype+0x3fc>
setg   %al
movzbl %al,%eax
lea    (%rax,%rax,4),%r13d
add    $0xc,%r13d
jmp    156c <get_coretype+0x3fc>
mov    $0xa,%r13d
jmp    156c <get_coretype+0x3fc>
mov    $0x15,%r13d
jmp    156c <get_coretype+0x3fc>
cmp    $0x8,%eax
je     12cd <get_coretype+0x15d>
jmp    156c <get_coretype+0x3fc>
cmp    $0x10,%r14d
jae    1569 <get_coretype+0x3f9>
movslq %r14d,%rax
lea    0xd31(%rip),%rcx
jmp    1409 <get_coretype+0x299>
add    $0xfffffffa,%r14d
cmp    $0xa,%r14d
jae    1569 <get_coretype+0x3f9>
movslq %r14d,%rax
lea    0xd57(%rip),%rcx
mov    (%rcx,%rax,4),%r13d
jmp    156c <get_coretype+0x3fc>
cmp    $0xf,%r14d
ja     1569 <get_coretype+0x3f9>
mov    $0x11,%r13d
mov    $0xd020,%eax
bt     %r14d,%eax
jb     156c <get_coretype+0x3fc>
cmp    $0xa,%r14d
je     1466 <get_coretype+0x2f6>
cmp    $0xd,%r14d
je     1466 <get_coretype+0x2f6>
jmp    1569 <get_coretype+0x3f9>
add    $0xfffffff9,%r14d
cmp    $0x8,%r14d
ja     1569 <get_coretype+0x3f9>
mov    $0x12,%r13d
lea    0xc9f(%rip),%rax
movslq (%rax,%r14,4),%rcx
add    %rax,%rcx
jmp    *%rcx
xor    %eax,%eax
call   1070 <support_avx@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
lea    (%rcx,%rcx,2),%r13d
add    $0x11,%r13d
jmp    156c <get_coretype+0x3fc>
add    $0xfffffffb,%r14d
cmp    $0xa,%r14d
ja     1569 <get_coretype+0x3f9>
mov    $0x11,%r13d
lea    0xc33(%rip),%rax
movslq (%rax,%r14,4),%rcx
add    %rax,%rcx
jmp    *%rcx
add    $0xfffffffb,%r14d
cmp    $0x9,%r14d
ja     1569 <get_coretype+0x3f9>
mov    $0x11,%r13d
lea    0xbbf(%rip),%rax
movslq (%rax,%r14,4),%rcx
add    %rax,%rcx
jmp    *%rcx
xor    %eax,%eax
call   1050 <support_avx512_bf16@plt>
xor    %ecx,%ecx
test   %eax,%eax
setne  %cl
lea    (%rcx,%rcx,1),%r13d
add    $0x1c,%r13d
jmp    156c <get_coretype+0x3fc>
mov    $0x1c,%r13d
cmp    $0x6,%r14d
je     156c <get_coretype+0x3fc>
cmp    $0xa,%r14d
jne    1508 <get_coretype+0x398>
xor    %eax,%eax
call   1050 <support_avx512_bf16@plt>
mov    $0x1e,%r13d
test   %eax,%eax
jne    156c <get_coretype+0x3fc>
mov    $0x1c,%r13d
jmp    156c <get_coretype+0x3fc>
xor    %eax,%eax
cmp    $0xe,%r14d
mov    $0x1c,%ecx
cmovne %eax,%ecx
cmp    $0xa,%r14d
mov    $0x11,%r13d
cmovne %ecx,%r13d
jmp    156c <get_coretype+0x3fc>
add    $0xfffffffb,%r14d
cmp    $0x9,%r14d
ja     1569 <get_coretype+0x3f9>
mov    $0x11,%r13d
lea    0xb63(%rip),%rax
movslq (%rax,%r14,4),%rcx
add    %rax,%rcx
jmp    *%rcx
xor    %eax,%eax
call   1070 <support_avx@plt>
test   %rax,%rax
mov    $0x11,%eax
mov    $0x18,%r13d
cmove  %eax,%r13d
jmp    156c <get_coretype+0x3fc>
xor    %r13d,%r13d
mov    %r13d,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret
xor    %eax,%eax
call   1070 <support_avx@plt>
test   %rax,%rax
mov    $0xb,%eax
mov    $0x1a,%r13d
cmove  %eax,%r13d
jmp    156c <get_coretype+0x3fc>
xor    %eax,%eax
call   1070 <support_avx@plt>
test   %rax,%rax
mov    $0xb,%eax
mov    $0x16,%r13d
cmove  %eax,%r13d
jmp    156c <get_coretype+0x3fc>
xor    %eax,%eax
call   1070 <support_avx@plt>
test   %rax,%rax
mov    $0xb,%eax
mov    $0x19,%r13d
cmove  %eax,%r13d
jmp    156c <get_coretype+0x3fc>

LLVM IR (-O0):
define i32 @get_coretype() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = call i32 (...) @have_cpuid()
%9 = icmp ne i32 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %0
store i32 1, i32* %1
br label %317
11: ; preds = %0
%12 = call i32 @get_cputype(i32 4)
store i32 %12, i32* %2
%13 = call i32 @get_cputype(i32 1)
store i32 %13, i32* %3
%14 = call i32 @get_cputype(i32 5)
store i32 %14, i32* %4
%15 = call i32 @get_cputype(i32 2)
store i32 %15, i32* %5
%16 = call i32 @get_cputype(i32 9)
store i32 %16, i32* %7
%17 = call i32 (...) @get_vendor()
store i32 %17, i32* %6
%18 = load i32, i32* %6
%19 = icmp eq i32 %18, 1
br i1 %19, label %20, label %195
20: ; preds = %11
%21 = load i32, i32* %2
switch i32 %21, label %194 [
i32 4, label %22
i32 5, label %23
i32 6, label %24
i32 15, label %189
]
22: ; preds = %20
store i32 1, i32* %1
br label %317
23: ; preds = %20
store i32 2, i32* %1
br label %317
24: ; preds = %20
%25 = load i32, i32* %5
switch i32 %25, label %188 [
i32 0, label %26
i32 1, label %34
i32 2, label %42
i32 3, label %58
i32 4, label %77
i32 10, label %96
i32 5, label %117
i32 6, label %141
i32 7, label %154
i32 9, label %163
i32 8, label %163
]
26: ; preds = %24
%27 = load i32, i32* %4
switch i32 %27, label %33 [
i32 0, label %28
i32 1, label %28
i32 2, label %28
i32 3, label %28
i32 4, label %28
i32 5, label %28
i32 6, label %28
i32 7, label %29
i32 8, label %30
i32 10, label %30
i32 11, label %30
i32 9, label %31
i32 13, label %31
i32 14, label %31
i32 15, label %32
]
28: ; preds = %26, %26, %26, %26, %26, %26, %26
store i32 14, i32* %1
br label %317
29: ; preds = %26
store i32 4, i32* %1
br label %317
30: ; preds = %26, %26, %26
store i32 5, i32* %1
br label %317
31: ; preds = %26, %26, %26
store i32 8, i32* %1
br label %317
32: ; preds = %26
store i32 14, i32* %1
br label %317
33: ; preds = %26
br label %188
34: ; preds = %24
%35 = load i32, i32* %4
switch i32 %35, label %41 [
i32 6, label %36
i32 7, label %37
i32 10, label %38
i32 11, label %38
i32 14, label %38
i32 15, label %38
i32 12, label %39
i32 13, label %40
]
36: ; preds = %34
store i32 14, i32* %1
br label %317
37: ; preds = %34
store i32 15, i32* %1
br label %317
38: ; preds = %34, %34, %34, %34
store i32 17, i32* %1
br label %317
39: ; preds = %34
store i32 18, i32* %1
br label %317
40: ; preds = %34
store i32 16, i32* %1
br label %317
41: ; preds = %34
br label %188
42: ; preds = %24
%43 = load i32, i32* %4
switch i32 %43, label %57 [
i32 5, label %44
i32 10, label %45
i32 12, label %50
i32 13, label %51
i32 14, label %56
i32 15, label %56
]
44: ; preds = %42
store i32 17, i32* %1
br label %317
45: ; preds = %42
%46 = call i64 (...) @support_avx()
%47 = icmp ne i64 %46, 0
br i1 %47, label %48, label %49
48: ; preds = %45
store i32 20, i32* %1
br label %317
49: ; preds = %45
store i32 17, i32* %1
br label %317
50: ; preds = %42
store i32 17, i32* %1
br label %317
51: ; preds = %42
%52 = call i64 (...) @support_avx()
%53 = icmp ne i64 %52, 0
br i1 %53, label %54, label %55
54: ; preds = %51
store i32 20, i32* %1
br label %317
55: ; preds = %51
store i32 17, i32* %1
br label %317
56: ; preds = %42, %42
store i32 17, i32* %1
br label %317
57: ; preds = %42
br label %188
58: ; preds = %24
%59 = load i32, i32* %4
switch i32 %59, label %76 [
i32 7, label %60
i32 10, label %61
i32 14, label %61
i32 12, label %66
i32 15, label %66
i32 13, label %71
]
60: ; preds = %58
store i32 18, i32* %1
br label %317
61: ; preds = %58, %58
%62 = call i64 (...) @support_avx()
%63 = icmp ne i64 %62, 0
br i1 %63, label %64, label %65
64: ; preds = %61
store i32 20, i32* %1
br label %317
65: ; preds = %61
store i32 17, i32* %1
br label %317
66: ; preds = %58, %58
%67 = call i64 (...) @support_avx()
%68 = icmp ne i64 %67, 0
br i1 %68, label %69, label %70
69: ; preds = %66
store i32 24, i32* %1
br label %317
70: ; preds = %66
store i32 17, i32* %1
br label %317
71: ; preds = %58
%72 = call i64 (...) @support_avx()
%73 = icmp ne i64 %72, 0
br i1 %73, label %74, label %75
74: ; preds = %71
store i32 24, i32* %1
br label %317
75: ; preds = %71
store i32 17, i32* %1
br label %317
76: ; preds = %58
br label %188
77: ; preds = %24
%78 = load i32, i32* %4
switch i32 %78, label %95 [
i32 5, label %79
i32 6, label %79
i32 7, label %84
i32 15, label %84
i32 14, label %89
i32 12, label %94
i32 13, label %94
]
79: ; preds = %77, %77
%80 = call i64 (...) @support_avx()
%81 = icmp ne i64 %80, 0
br i1 %81, label %82, label %83
82: ; preds = %79
store i32 24, i32* %1
br label %317
83: ; preds = %79
store i32 17, i32* %1
br label %317
84: ; preds = %77, %77
%85 = call i64 (...) @support_avx()
%86 = icmp ne i64 %85, 0
br i1 %86, label %87, label %88
87: ; preds = %84
store i32 24, i32* %1
br label %317
88: ; preds = %84
store i32 17, i32* %1
br label %317
89: ; preds = %77
%90 = call i64 (...) @support_avx()
%91 = icmp ne i64 %90, 0
br i1 %91, label %92, label %93
92: ; preds = %89
store i32 24, i32* %1
br label %317
93: ; preds = %89
store i32 17, i32* %1
br label %317
94: ; preds = %77, %77
store i32 17, i32* %1
br label %317
95: ; preds = %77
br label %188
96: ; preds = %24
%97 = load i32, i32* %4
switch i32 %97, label %116 [
i32 5, label %98
i32 6, label %98
i32 7, label %103
]
98: ; preds = %96, %96
%99 = call i64 (...) @support_avx()
%100 = icmp ne i64 %99, 0
br i1 %100, label %101, label %102
101: ; preds = %98
store i32 24, i32* %1
br label %317
102: ; preds = %98
store i32 17, i32* %1
br label %317
103: ; preds = %96
%104 = call i32 (...) @support_avx512()
%105 = icmp ne i32 %104, 0
br i1 %105, label %106, label %107
106: ; preds = %103
store i32 28, i32* %1
br label %317
107: ; preds = %103
%108 = call i32 (...) @support_avx2()
%109 = icmp ne i32 %108, 0
br i1 %109, label %110, label %111
110: ; preds = %107
store i32 24, i32* %1
br label %317
111: ; preds = %107
%112 = call i64 (...) @support_avx()
%113 = icmp ne i64 %112, 0
br i1 %113, label %114, label %115
114: ; preds = %111
store i32 20, i32* %1
br label %317
115: ; preds = %111
store i32 17, i32* %1
br label %317
116: ; preds = %96
br label %117
117: ; preds = %24, %116
%118 = load i32, i32* %4
switch i32 %118, label %140 [
i32 6, label %119
i32 5, label %124
i32 14, label %129
i32 7, label %134
i32 12, label %139
]
119: ; preds = %117
%120 = call i64 (...) @support_avx()
%121 = icmp ne i64 %120, 0
br i1 %121, label %122, label %123
122: ; preds = %119
store i32 24, i32* %1
br label %317
123: ; preds = %119
store i32 17, i32* %1
br label %317
124: ; preds = %117
%125 = call i32 (...) @support_avx512_bf16()
%126 = icmp ne i32 %125, 0
br i1 %126, label %127, label %128
127: ; preds = %124
store i32 30, i32* %1
br label %317
128: ; preds = %124
store i32 28, i32* %1
br label %317
129: ; preds = %117
%130 = call i64 (...) @support_avx()
%131 = icmp ne i64 %130, 0
br i1 %131, label %132, label %133
132: ; preds = %129
store i32 24, i32* %1
br label %317
133: ; preds = %129
store i32 17, i32* %1
br label %317
134: ; preds = %117
%135 = call i64 (...) @support_avx()
%136 = icmp ne i64 %135, 0
br i1 %136, label %137, label %138
137: ; preds = %134
store i32 24, i32* %1
br label %317
138: ; preds = %134
store i32 17, i32* %1
br label %317
139: ; preds = %117
store i32 17, i32* %1
br label %317
140: ; preds = %117
br label %188
141: ; preds = %24
%142 = load i32, i32* %4
%143 = icmp eq i32 %142, 6
br i1 %143, label %144, label %145
144: ; preds = %141
store i32 28, i32* %1
br label %317
145: ; preds = %141
%146 = load i32, i32* %4
%147 = icmp eq i32 %146, 10
br i1 %147, label %148, label %153
148: ; preds = %145
%149 = call i32 (...) @support_avx512_bf16()
%150 = icmp ne i32 %149, 0
br i1 %150, label %151, label %152
151: ; preds = %148
store i32 30, i32* %1
br label %317
152: ; preds = %148
br label %153
153: ; preds = %152, %145
store i32 28, i32* %1
br label %317
154: ; preds = %24
%155 = load i32, i32* %4
%156 = icmp eq i32 %155, 10
br i1 %156, label %157, label %158
157: ; preds = %154
store i32 17, i32* %1
br label %317
158: ; preds = %154
%159 = load i32, i32* %4
%160 = icmp eq i32 %159, 14
br i1 %160, label %161, label %162
161: ; preds = %158
store i32 28, i32* %1
br label %317
162: ; preds = %158
br label %188
163: ; preds = %24, %24
%164 = load i32, i32* %4
%165 = icmp eq i32 %164, 12
br i1 %165, label %166, label %179
166: ; preds = %163
%167 = call i32 (...) @support_avx512()
%168 = icmp ne i32 %167, 0
br i1 %168, label %169, label %170
169: ; preds = %166
store i32 28, i32* %1
br label %317
170: ; preds = %166
%171 = call i32 (...) @support_avx2()
%172 = icmp ne i32 %171, 0
br i1 %172, label %173, label %174
173: ; preds = %170
store i32 24, i32* %1
br label %317
174: ; preds = %170
%175 = call i64 (...) @support_avx()
%176 = icmp ne i64 %175, 0
br i1 %176, label %177, label %178
177: ; preds = %174
store i32 20, i32* %1
br label %317
178: ; preds = %174
store i32 17, i32* %1
br label %317
179: ; preds = %163
%180 = load i32, i32* %4
%181 = icmp eq i32 %180, 14
br i1 %181, label %182, label %187
182: ; preds = %179
%183 = call i64 (...) @support_avx()
%184 = icmp ne i64 %183, 0
br i1 %184, label %185, label %186
185: ; preds = %182
store i32 24, i32* %1
br label %317
186: ; preds = %182
store i32 17, i32* %1
br label %317
187: ; preds = %179
br label %188
188: ; preds = %187, %24, %162, %140, %95, %76, %57, %41, %33
br label %194
189: ; preds = %20
%190 = load i32, i32* %4
%191 = icmp sle i32 %190, 2
br i1 %191, label %192, label %193
192: ; preds = %189
store i32 6, i32* %1
br label %317
193: ; preds = %189
store i32 7, i32* %1
br label %317
194: ; preds = %20, %188
br label %195
195: ; preds = %194, %11
%196 = load i32, i32* %6
%197 = icmp eq i32 %196, 3
br i1 %197, label %198, label %278
198: ; preds = %195
%199 = load i32, i32* %2
%200 = icmp sle i32 %199, 5
br i1 %200, label %201, label %202
201: ; preds = %198
store i32 1, i32* %1
br label %317
202: ; preds = %198
%203 = load i32, i32* %2
%204 = icmp sle i32 %203, 14
br i1 %204, label %205, label %206
205: ; preds = %202
store i32 11, i32* %1
br label %317
206: ; preds = %202
%207 = load i32, i32* %2
%208 = icmp eq i32 %207, 15
br i1 %208, label %209, label %277
209: ; preds = %206
%210 = load i32, i32* %3
%211 = icmp eq i32 %210, 0
br i1 %211, label %215, label %212
212: ; preds = %209
%213 = load i32, i32* %3
%214 = icmp eq i32 %213, 2
br i1 %214, label %215, label %216
215: ; preds = %212, %209
store i32 10, i32* %1
br label %317
216: ; preds = %212
%217 = load i32, i32* %3
%218 = icmp eq i32 %217, 5
br i1 %218, label %219, label %220
219: ; preds = %216
store i32 21, i32* %1
br label %317
220: ; preds = %216
%221 = load i32, i32* %3
%222 = icmp eq i32 %221, 6
br i1 %222, label %223, label %259
223: ; preds = %220
%224 = load i32, i32* %4
switch i32 %224, label %258 [
i32 1, label %225
i32 2, label %230
i32 3, label %230
i32 5, label %235
i32 0, label %240
i32 8, label %240
]
225: ; preds = %223
%226 = call i64 (...) @support_avx()
%227 = icmp ne i64 %226, 0
br i1 %227, label %228, label %229
228: ; preds = %225
store i32 22, i32* %1
br label %317
229: ; preds = %225
store i32 11, i32* %1
br label %317
230: ; preds = %223, %223
%231 = call i64 (...) @support_avx()
%232 = icmp ne i64 %231, 0
br i1 %232, label %233, label %234
233: ; preds = %230
store i32 23, i32* %1
br label %317
234: ; preds = %230
store i32 11, i32* %1
br label %317
235: ; preds = %223
%236 = call i64 (...) @support_avx()
%237 = icmp ne i64 %236, 0
br i1 %237, label %238, label %239
238: ; preds = %235
store i32 26, i32* %1
br label %317
239: ; preds = %235
store i32 11, i32* %1
br label %317
240: ; preds = %223, %223
%241 = load i32, i32* %5
switch i32 %241, label %257 [
i32 1, label %242
i32 3, label %247
i32 6, label %252
]
242: ; preds = %240
%243 = call i64 (...) @support_avx()
%244 = icmp ne i64 %243, 0
br i1 %244, label %245, label %246
245: ; preds = %242
store i32 23, i32* %1
br label %317
246: ; preds = %242
store i32 11, i32* %1
br label %317
247: ; preds = %240
%248 = call i64 (...) @support_avx()
%249 = icmp ne i64 %248, 0
br i1 %249, label %250, label %251
250: ; preds = %247
store i32 25, i32* %1
br label %317
251: ; preds = %247
store i32 11, i32* %1
br label %317
252: ; preds = %240
%253 = call i64 (...) @support_avx()
%254 = icmp ne i64 %253, 0
br i1 %254, label %255, label %256
255: ; preds = %252
store i32 26, i32* %1
br label %317
256: ; preds = %252
store i32 11, i32* %1
br label %317
257: ; preds = %240
br label %258
258: ; preds = %223, %257
br label %274
259: ; preds = %220
%260 = load i32, i32* %3
%261 = icmp eq i32 %260, 8
br i1 %261, label %265, label %262
262: ; preds = %259
%263 = load i32, i32* %3
%264 = icmp eq i32 %263, 10
br i1 %264, label %265, label %273
265: ; preds = %262, %259
%266 = load i32, i32* %4
switch i32 %266, label %268 [
i32 1, label %267
i32 8, label %267
]
267: ; preds = %265, %265
br label %268
268: ; preds = %265, %267
%269 = call i64 (...) @support_avx()
%270 = icmp ne i64 %269, 0
br i1 %270, label %271, label %272
271: ; preds = %268
store i32 27, i32* %1
br label %317
272: ; preds = %268
store i32 11, i32* %1
br label %317
273: ; preds = %262
store i32 11, i32* %1
br label %317
274: ; preds = %258
br label %275
275: ; preds = %274
br label %276
276: ; preds = %275
br label %277
277: ; preds = %276, %206
br label %278
278: ; preds = %277, %195
%279 = load i32, i32* %6
%280 = icmp eq i32 %279, 11
br i1 %280, label %281, label %294
281: ; preds = %278
%282 = load i32, i32* %2
%283 = icmp eq i32 %282, 15
br i1 %283, label %284, label %293
284: ; preds = %281
%285 = load i32, i32* %3
%286 = icmp eq i32 %285, 9
br i1 %286, label %287, label %292
287: ; preds = %284
%288 = call i64 (...) @support_avx()
%289 = icmp ne i64 %288, 0
br i1 %289, label %290, label %291
290: ; preds = %287
store i32 27, i32* %1
br label %317
291: ; preds = %287
store i32 11, i32* %1
br label %317
292: ; preds = %284
store i32 11, i32* %1
br label %317
293: ; preds = %281
br label %294
294: ; preds = %293, %278
%295 = load i32, i32* %6
%296 = icmp eq i32 %295, 6
br i1 %296, label %297, label %312
297: ; preds = %294
%298 = load i32, i32* %2
switch i32 %298, label %307 [
i32 6, label %299
]
299: ; preds = %297
%300 = load i32, i32* %4
%301 = icmp eq i32 %300, 15
br i1 %301, label %302, label %306
302: ; preds = %299
%303 = load i32, i32* %7
%304 = icmp slt i32 %303, 14
br i1 %304, label %305, label %306
305: ; preds = %302
store i32 19, i32* %1
br label %317
306: ; preds = %302, %299
store i32 17, i32* %1
br label %317
307: ; preds = %297
%308 = load i32, i32* %2
%309 = icmp sge i32 %308, 7
br i1 %309, label %310, label %311
310: ; preds = %307
store i32 17, i32* %1
br label %317
311: ; preds = %307
store i32 12, i32* %1
br label %317
312: ; preds = %294
%313 = load i32, i32* %6
%314 = icmp eq i32 %313, 12
br i1 %314, label %315, label %316
315: ; preds = %312
store i32 17, i32* %1
br label %317
316: ; preds = %312
store i32 0, i32* %1
br label %317
317: ; preds = %316, %315, %311, %310, %306, %305, %292, %291, %290, %273, %272, %271, %256, %255, %251, %250, %246, %245, %239, %238, %234, %233, %229, %228, %219, %215, %205, %201, %193, %192, %186, %185, %178, %177, %173, %169, %161, %157, %153, %151, %144, %139, %138, %137, %133, %132, %128, %127, %123, %122, %115, %114, %110, %106, %102, %101, %94, %93, %92, %88, %87, %83, %82, %75, %74, %70, %69, %65, %64, %60, %56, %55, %54, %50, %49, %48, %44, %40, %39, %38, %37, %36, %32, %31, %30, %29, %28, %23, %22, %10
%318 = load i32, i32* %1
ret i32 %318
}

LLVM IR (-O2):
@switch.table.get_coretype = [16 x i32] [i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 4, i32 5, i32 8, i32 5, i32 5, i32 0, i32 8, i32 8, i32 14]
@switch.table.get_coretype.1 = [10 x i32] [i32 14, i32 15, i32 0, i32 0, i32 17, i32 17, i32 18, i32 16, i32 17, i32 17]
define i32 @get_coretype() {
%1 = tail call i32 (...) @have_cpuid()
%2 = icmp eq i32 %1, 0
br i1 %2, label %185, label %3
3: ; preds = %0
%4 = tail call i32 @get_cputype(i32 4)
%5 = tail call i32 @get_cputype(i32 1)
%6 = tail call i32 @get_cputype(i32 5)
%7 = tail call i32 @get_cputype(i32 2)
%8 = tail call i32 @get_cputype(i32 9)
%9 = tail call i32 (...) @get_vendor()
switch i32 %9, label %155 [
i32 1, label %10
i32 3, label %113
]
10: ; preds = %3
switch i32 %4, label %176 [
i32 4, label %185
i32 5, label %11
i32 6, label %12
i32 15, label %110
]
11: ; preds = %10
br label %185
12: ; preds = %10
switch i32 %7, label %176 [
i32 0, label %13
i32 1, label %15
i32 2, label %18
i32 3, label %27
i32 4, label %40
i32 10, label %53
i32 5, label %68
i32 6, label %85
i32 7, label %90
i32 9, label %95
i32 8, label %95
]
13: ; preds = %12
%14 = icmp ult i32 %6, 16
br i1 %14, label %177, label %176
15: ; preds = %12
%16 = add i32 %6, -6
%17 = icmp ult i32 %16, 10
br i1 %17, label %181, label %176
18: ; preds = %12
switch i32 %6, label %176 [
i32 5, label %185
i32 10, label %19
i32 12, label %185
i32 13, label %23
i32 14, label %185
i32 15, label %185
]
19: ; preds = %18
%20 = tail call i64 (...) @support_avx()
%21 = icmp eq i64 %20, 0
%22 = select i1 %21, i32 17, i32 20
br label %185
23: ; preds = %18
%24 = tail call i64 (...) @support_avx()
%25 = icmp eq i64 %24, 0
%26 = select i1 %25, i32 17, i32 20
br label %185
27: ; preds = %12
switch i32 %6, label %176 [
i32 7, label %185
i32 10, label %28
i32 14, label %28
i32 12, label %32
i32 15, label %32
i32 13, label %36
]
28: ; preds = %27, %27
%29 = tail call i64 (...) @support_avx()
%30 = icmp eq i64 %29, 0
%31 = select i1 %30, i32 17, i32 20
br label %185
32: ; preds = %27, %27
%33 = tail call i64 (...) @support_avx()
%34 = icmp eq i64 %33, 0
%35 = select i1 %34, i32 17, i32 24
br label %185
36: ; preds = %27
%37 = tail call i64 (...) @support_avx()
%38 = icmp eq i64 %37, 0
%39 = select i1 %38, i32 17, i32 24
br label %185
40: ; preds = %12
switch i32 %6, label %176 [
i32 5, label %41
i32 6, label %41
i32 7, label %45
i32 15, label %45
i32 14, label %49
i32 12, label %185
i32 13, label %185
]
41: ; preds = %40, %40
%42 = tail call i64 (...) @support_avx()
%43 = icmp eq i64 %42, 0
%44 = select i1 %43, i32 17, i32 24
br label %185
45: ; preds = %40, %40
%46 = tail call i64 (...) @support_avx()
%47 = icmp eq i64 %46, 0
%48 = select i1 %47, i32 17, i32 24
br label %185
49: ; preds = %40
%50 = tail call i64 (...) @support_avx()
%51 = icmp eq i64 %50, 0
%52 = select i1 %51, i32 17, i32 24
br label %185
53: ; preds = %12
switch i32 %6, label %176 [
i32 5, label %54
i32 6, label %54
i32 7, label %58
i32 14, label %77
i32 12, label %185
]
54: ; preds = %53, %53
%55 = tail call i64 (...) @support_avx()
%56 = icmp eq i64 %55, 0
%57 = select i1 %56, i32 17, i32 24
br label %185
58: ; preds = %53
%59 = tail call i32 (...) @support_avx512()
%60 = icmp eq i32 %59, 0
br i1 %60, label %61, label %185
61: ; preds = %58
%62 = tail call i32 (...) @support_avx2()
%63 = icmp eq i32 %62, 0
br i1 %63, label %64, label %185
64: ; preds = %61
%65 = tail call i64 (...) @support_avx()
%66 = icmp eq i64 %65, 0
%67 = select i1 %66, i32 17, i32 20
br label %185
68: ; preds = %12
switch i32 %6, label %176 [
i32 6, label %69
i32 5, label %73
i32 14, label %77
i32 7, label %81
i32 12, label %185
]
69: ; preds = %68
%70 = tail call i64 (...) @support_avx()
%71 = icmp eq i64 %70, 0
%72 = select i1 %71, i32 17, i32 24
br label %185
73: ; preds = %68
%74 = tail call i32 (...) @support_avx512_bf16()
%75 = icmp eq i32 %74, 0
%76 = select i1 %75, i32 28, i32 30
br label %185
77: ; preds = %53, %68
%78 = tail call i64 (...) @support_avx()
%79 = icmp eq i64 %78, 0
%80 = select i1 %79, i32 17, i32 24
br label %185
81: ; preds = %68
%82 = tail call i64 (...) @support_avx()
%83 = icmp eq i64 %82, 0
%84 = select i1 %83, i32 17, i32 24
br label %185
85: ; preds = %12
switch i32 %6, label %89 [
i32 6, label %185
i32 10, label %86
]
86: ; preds = %85
%87 = tail call i32 (...) @support_avx512_bf16()
%88 = icmp eq i32 %87, 0
br i1 %88, label %89, label %185
89: ; preds = %85, %86
br label %185
90: ; preds = %12
%91 = icmp eq i32 %6, 14
%92 = select i1 %91, i32 28, i32 0
%93 = icmp eq i32 %6, 10
%94 = select i1 %93, i32 17, i32 %92
br label %185
95: ; preds = %12, %12
switch i32 %6, label %176 [
i32 12, label %96
i32 14, label %106
]
96: ; preds = %95
%97 = tail call i32 (...) @support_avx512()
%98 = icmp eq i32 %97, 0
br i1 %98, label %99, label %185
99: ; preds = %96
%100 = tail call i32 (...) @support_avx2()
%101 = icmp eq i32 %100, 0
br i1 %101, label %102, label %185
102: ; preds = %99
%103 = tail call i64 (...) @support_avx()
%104 = icmp eq i64 %103, 0
%105 = select i1 %104, i32 17, i32 20
br label %185
106: ; preds = %95
%107 = tail call i64 (...) @support_avx()
%108 = icmp eq i64 %107, 0
%109 = select i1 %108, i32 17, i32 24
br label %185
110: ; preds = %10
%111 = icmp slt i32 %6, 3
%112 = select i1 %111, i32 6, i32 7
br label %185
113: ; preds = %3
%114 = icmp slt i32 %4, 6
br i1 %114, label %185, label %115
115: ; preds = %113
%116 = icmp ult i32 %4, 15
br i1 %116, label %185, label %117
117: ; preds = %115
%118 = icmp eq i32 %4, 15
br i1 %118, label %119, label %176
119: ; preds = %117
%120 = and i32 %5, -3
%121 = icmp eq i32 %120, 0
br i1 %121, label %185, label %122
122: ; preds = %119
switch i32 %5, label %149 [
i32 5, label %185
i32 6, label %123
]
123: ; preds = %122
switch i32 %6, label %176 [
i32 1, label %124
i32 2, label %128
i32 3, label %128
i32 5, label %132
i32 0, label %136
i32 8, label %136
]
124: ; preds = %123
%125 = tail call i64 (...) @support_avx()
%126 = icmp eq i64 %125, 0
%127 = select i1 %126, i32 11, i32 22
br label %185
128: ; preds = %123, %123
%129 = tail call i64 (...) @support_avx()
%130 = icmp eq i64 %129, 0
%131 = select i1 %130, i32 11, i32 23
br label %185
132: ; preds = %123
%133 = tail call i64 (...) @support_avx()
%134 = icmp eq i64 %133, 0
%135 = select i1 %134, i32 11, i32 26
br label %185
136: ; preds = %123, %123
switch i32 %7, label %176 [
i32 1, label %137
i32 3, label %141
i32 6, label %145
]
137: ; preds = %136
%138 = tail call i64 (...) @support_avx()
%139 = icmp eq i64 %138, 0
%140 = select i1 %139, i32 11, i32 23
br label %185
141: ; preds = %136
%142 = tail call i64 (...) @support_avx()
%143 = icmp eq i64 %142, 0
%144 = select i1 %143, i32 11, i32 25
br label %185
145: ; preds = %136
%146 = tail call i64 (...) @support_avx()
%147 = icmp eq i64 %146, 0
%148 = select i1 %147, i32 11, i32 26
br label %185
149: ; preds = %122
%150 = icmp eq i32 %120, 8
br i1 %150, label %151, label %185
151: ; preds = %149
%152 = tail call i64 (...) @support_avx()
%153 = icmp eq i64 %152, 0
%154 = select i1 %153, i32 11, i32 27
br label %185
155: ; preds = %3
%156 = icmp eq i32 %9, 11
%157 = icmp eq i32 %4, 15
%158 = select i1 %156, i1 %157, i1 false
br i1 %158, label %159, label %165
159: ; preds = %155
%160 = icmp eq i32 %5, 9
br i1 %160, label %161, label %185
161: ; preds = %159
%162 = tail call i64 (...) @support_avx()
%163 = icmp eq i64 %162, 0
%164 = select i1 %163, i32 11, i32 27
br label %185
165: ; preds = %155
switch i32 %9, label %176 [
i32 6, label %166
i32 12, label %185
]
166: ; preds = %165
%167 = icmp eq i32 %4, 6
br i1 %167, label %168, label %173
168: ; preds = %166
%169 = icmp eq i32 %6, 15
%170 = icmp slt i32 %8, 14
%171 = select i1 %169, i1 %170, i1 false
%172 = select i1 %171, i32 19, i32 17
br label %185
173: ; preds = %166
%174 = icmp sgt i32 %4, 6
%175 = select i1 %174, i32 17, i32 12
br label %185
176: ; preds = %15, %13, %12, %18, %27, %40, %68, %10, %53, %95, %117, %123, %136, %165
br label %185
177: ; preds = %13
%178 = sext i32 %6 to i64
%179 = getelementptr inbounds [16 x i32], [16 x i32]* @switch.table.get_coretype, i64 0, i64 %178
%180 = load i32, i32* %179
br label %185
181: ; preds = %15
%182 = sext i32 %16 to i64
%183 = getelementptr inbounds [10 x i32], [10 x i32]* @switch.table.get_coretype.1, i64 0, i64 %182
%184 = load i32, i32* %183
br label %185
185: ; preds = %181, %177, %90, %165, %173, %168, %159, %161, %149, %151, %145, %141, %137, %132, %128, %124, %122, %119, %115, %113, %110, %106, %102, %99, %96, %86, %85, %68, %53, %81, %77, %73, %69, %64, %61, %58, %54, %40, %40, %49, %45, %41, %36, %32, %28, %27, %18, %18, %23, %18, %19, %18, %10, %0, %176, %89, %11
%186 = phi i32 [ 0, %176 ], [ 28, %89 ], [ 2, %11 ], [ 1, %0 ], [ 1, %10 ], [ 17, %18 ], [ %22, %19 ], [ 17, %18 ], [ %26, %23 ], [ 17, %18 ], [ 17, %18 ], [ 18, %27 ], [ %31, %28 ], [ %35, %32 ], [ %39, %36 ], [ %44, %41 ], [ %48, %45 ], [ %52, %49 ], [ 17, %40 ], [ 17, %40 ], [ %57, %54 ], [ 28, %58 ], [ 24, %61 ], [ %67, %64 ], [ %72, %69 ], [ %76, %73 ], [ %80, %77 ], [ %84, %81 ], [ 17, %53 ], [ 17, %68 ], [ 28, %85 ], [ 30, %86 ], [ 28, %96 ], [ 24, %99 ], [ %105, %102 ], [ %109, %106 ], [ %112, %110 ], [ 1, %113 ], [ 11, %115 ], [ 10, %119 ], [ 21, %122 ], [ %127, %124 ], [ %131, %128 ], [ %135, %132 ], [ %140, %137 ], [ %144, %141 ], [ %148, %145 ], [ %154, %151 ], [ 11, %149 ], [ %164, %161 ], [ 11, %159 ], [ %172, %168 ], [ %175, %173 ], [ 17, %165 ], [ %94, %90 ], [ %180, %177 ], [ %184, %181 ]
ret i32 %186
}