void pll_setup_interconnect(void) {
  (*((volatile unsigned int *)(((0x44E00000) + 0) + (0x4)))) = (0x2u);
  while (((*((volatile unsigned int *)(((0x44E00000) + 0) + (0x4)))) &
          (0x00000003u)) != (0x2u))
    ;
  (*((volatile unsigned int *)(((0x44E00000) + 0) + (0xc)))) = (0x2u);
  while (((*((volatile unsigned int *)(((0x44E00000) + 0) + (0xc)))) &
          (0x00000003u)) != (0x2u))
    ;
  (*((volatile unsigned int *)(((0x44E00000) + 0) + (0xdc)))) = (0x2u);
  while (((*((volatile unsigned int *)(((0x44E00000) + 0) + (0xdc)))) &
          (0x00000003u)) != (0x2u))
    ;
  (*((volatile unsigned int *)(((0x44E00000) + 0) + (0xe0)))) = (0x2u);
  while (((*((volatile unsigned int *)(((0x44E00000) + 0) + (0xe0)))) &
          (0x00000003u)) != (0x2u))
    ;
  (*((volatile unsigned int *)(((0x44E00000) + 0) + (0x12c)))) = (0x2u);
  while (((*((volatile unsigned int *)(((0x44E00000) + 0) + (0x12c)))) &
          (0x00000003u)) != (0x2u))
    ;
  (*((volatile unsigned int *)(((0x44E00000) + 0) + (0x0)))) = (0x2u);
  while (((*((volatile unsigned int *)(((0x44E00000) + 0) + (0x0)))) &
          (0x00000003u)) != (0x2u))
    ;
  (*((volatile unsigned int *)(((0x44E00000) + 0) + (0x60)))) = (0x2u);
  while (((*((volatile unsigned int *)(((0x44E00000) + 0) + (0x60)))) &
          (0x00000003u)) != (0x2u))
    ;
  while (!((*((volatile unsigned int *)(((0x44E00000) + 0) + (0x4)))) &
           (0x00000008u)))
    ;
  while (!((*((volatile unsigned int *)(((0x44E00000) + 0) + (0xc)))) &
           (0x00000010u)))
    ;
  while (!((*((volatile unsigned int *)(((0x44E00000) + 0) + (0x12c)))) &
           ((0x00000010u) | (0x00000020u))))
    ;
  while (!((*((volatile unsigned int *)(((0x44E00000) + 0) + (0x0)))) &
           ((0x00000100u) | (0x00004000u))))
    ;
  while (((0x0u) << (0x00000010u)) !=
         ((*((volatile unsigned int *)(((0x44E00000) + 0) + (0xe0)))) &
          (0x00030000u)))
    ;
  while (((0x0u) << (0x00000010u)) !=
         ((*((volatile unsigned int *)(((0x44E00000) + 0) + (0xdc)))) &
          (0x00030000u)))
    ;
  while ((0x00000010u) !=
         ((*((volatile unsigned int *)(((0x44E00000) + 0) + (0xc)))) &
          (0x00000010u)))
    ;
  while ((0x00000010u) !=
         ((*((volatile unsigned int *)(((0x44E00000) + 0) + (0x12c)))) &
          (0x00000010u)))
    ;
  while ((0x00000008u) !=
         ((*((volatile unsigned int *)(((0x44E00000) + 0) + (0x4)))) &
          (0x00000008u)))
    ;
}


x86 assembly (clang, -O0):
<pll_setup_interconnect>:
push   %rbp
mov    %rsp,%rbp
mov    $0x44e00004,%eax
movl   $0x2,(%rax)
mov    $0x44e00004,%eax
mov    (%rax),%eax
and    $0x3,%eax
cmp    $0x2,%eax
je     1127 <pll_setup_interconnect+0x27>
jmp    110f <pll_setup_interconnect+0xf>
mov    $0x44e0000c,%eax
movl   $0x2,(%rax)
mov    $0x44e0000c,%eax
mov    (%rax),%eax
and    $0x3,%eax
cmp    $0x2,%eax
je     114a <pll_setup_interconnect+0x4a>
jmp    1132 <pll_setup_interconnect+0x32>
mov    $0x44e000dc,%eax
movl   $0x2,(%rax)
mov    $0x44e000dc,%eax
mov    (%rax),%eax
and    $0x3,%eax
cmp    $0x2,%eax
je     116d <pll_setup_interconnect+0x6d>
jmp    1155 <pll_setup_interconnect+0x55>
mov    $0x44e000e0,%eax
movl   $0x2,(%rax)
mov    $0x44e000e0,%eax
mov    (%rax),%eax
and    $0x3,%eax
cmp    $0x2,%eax
je     1190 <pll_setup_interconnect+0x90>
jmp    1178 <pll_setup_interconnect+0x78>
mov    $0x44e0012c,%eax
movl   $0x2,(%rax)
mov    $0x44e0012c,%eax
mov    (%rax),%eax
and    $0x3,%eax
cmp    $0x2,%eax
je     11b3 <pll_setup_interconnect+0xb3>
jmp    119b <pll_setup_interconnect+0x9b>
mov    $0x44e00000,%eax
movl   $0x2,(%rax)
mov    $0x44e00000,%eax
mov    (%rax),%eax
and    $0x3,%eax
cmp    $0x2,%eax
je     11d6 <pll_setup_interconnect+0xd6>
jmp    11be <pll_setup_interconnect+0xbe>
mov    $0x44e00060,%eax
movl   $0x2,(%rax)
mov    $0x44e00060,%eax
mov    (%rax),%eax
and    $0x3,%eax
cmp    $0x2,%eax
je     11f9 <pll_setup_interconnect+0xf9>
jmp    11e1 <pll_setup_interconnect+0xe1>
jmp    11fe <pll_setup_interconnect+0xfe>
mov    $0x44e00004,%eax
mov    (%rax),%eax
and    $0x8,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    121d <pll_setup_interconnect+0x11d>
jmp    1222 <pll_setup_interconnect+0x122>
jmp    11fe <pll_setup_interconnect+0xfe>
jmp    1227 <pll_setup_interconnect+0x127>
mov    $0x44e0000c,%eax
mov    (%rax),%eax
and    $0x10,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1246 <pll_setup_interconnect+0x146>
jmp    124b <pll_setup_interconnect+0x14b>
jmp    1227 <pll_setup_interconnect+0x127>
jmp    1250 <pll_setup_interconnect+0x150>
mov    $0x44e0012c,%eax
mov    (%rax),%eax
and    $0x30,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    126f <pll_setup_interconnect+0x16f>
jmp    1274 <pll_setup_interconnect+0x174>
jmp    1250 <pll_setup_interconnect+0x150>
jmp    1279 <pll_setup_interconnect+0x179>
mov    $0x44e00000,%eax
mov    (%rax),%eax
and    $0x4100,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    129a <pll_setup_interconnect+0x19a>
jmp    129f <pll_setup_interconnect+0x19f>
jmp    1279 <pll_setup_interconnect+0x179>
jmp    12a4 <pll_setup_interconnect+0x1a4>
mov    $0x44e000e0,%eax
mov    (%rax),%ecx
and    $0x30000,%ecx
xor    %eax,%eax
cmp    %ecx,%eax
je     12c0 <pll_setup_interconnect+0x1c0>
jmp    12a4 <pll_setup_interconnect+0x1a4>
jmp    12c5 <pll_setup_interconnect+0x1c5>
mov    $0x44e000dc,%eax
mov    (%rax),%ecx
and    $0x30000,%ecx
xor    %eax,%eax
cmp    %ecx,%eax
je     12e1 <pll_setup_interconnect+0x1e1>
jmp    12c5 <pll_setup_interconnect+0x1c5>
jmp    12e6 <pll_setup_interconnect+0x1e6>
mov    $0x44e0000c,%eax
mov    (%rax),%ecx
and    $0x10,%ecx
mov    $0x10,%eax
cmp    %ecx,%eax
je     1302 <pll_setup_interconnect+0x202>
jmp    12e6 <pll_setup_interconnect+0x1e6>
jmp    1307 <pll_setup_interconnect+0x207>
mov    $0x44e0012c,%eax
mov    (%rax),%ecx
and    $0x10,%ecx
mov    $0x10,%eax
cmp    %ecx,%eax
je     1323 <pll_setup_interconnect+0x223>
jmp    1307 <pll_setup_interconnect+0x207>
jmp    1328 <pll_setup_interconnect+0x228>
mov    $0x44e00004,%eax
mov    (%rax),%ecx
and    $0x8,%ecx
mov    $0x8,%eax
cmp    %ecx,%eax
je     1344 <pll_setup_interconnect+0x244>
jmp    1328 <pll_setup_interconnect+0x228>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pll_setup_interconnect>:
movl   $0x2,0x44e00004
nopl   0x0(%rax,%rax,1)
mov    0x44e00004,%eax
and    $0x3,%eax
cmp    $0x2,%eax
jne    1110 <pll_setup_interconnect+0x10>
movl   $0x2,0x44e0000c
nopw   0x0(%rax,%rax,1)
mov    0x44e0000c,%eax
and    $0x3,%eax
cmp    $0x2,%eax
jne    1130 <pll_setup_interconnect+0x30>
movl   $0x2,0x44e000dc
nopw   0x0(%rax,%rax,1)
mov    0x44e000dc,%eax
and    $0x3,%eax
cmp    $0x2,%eax
jne    1150 <pll_setup_interconnect+0x50>
movl   $0x2,0x44e000e0
nopw   0x0(%rax,%rax,1)
mov    0x44e000e0,%eax
and    $0x3,%eax
cmp    $0x2,%eax
jne    1170 <pll_setup_interconnect+0x70>
movl   $0x2,0x44e0012c
nopw   0x0(%rax,%rax,1)
mov    0x44e0012c,%eax
and    $0x3,%eax
cmp    $0x2,%eax
jne    1190 <pll_setup_interconnect+0x90>
movl   $0x2,0x44e00000
nopw   0x0(%rax,%rax,1)
mov    0x44e00000,%eax
and    $0x3,%eax
cmp    $0x2,%eax
jne    11b0 <pll_setup_interconnect+0xb0>
movl   $0x2,0x44e00060
nopw   0x0(%rax,%rax,1)
mov    0x44e00060,%eax
and    $0x3,%eax
cmp    $0x2,%eax
jne    11d0 <pll_setup_interconnect+0xd0>
nop
testl  $0x8,0x44e00004
je     11e0 <pll_setup_interconnect+0xe0>
nopl   (%rax)
testl  $0x10,0x44e0000c
je     11f0 <pll_setup_interconnect+0xf0>
nopl   (%rax)
testl  $0x30,0x44e0012c
je     1200 <pll_setup_interconnect+0x100>
nopl   (%rax)
testl  $0x4100,0x44e00000
je     1210 <pll_setup_interconnect+0x110>
nopl   (%rax)
testl  $0x30000,0x44e000e0
jne    1220 <pll_setup_interconnect+0x120>
nopl   (%rax)
testl  $0x30000,0x44e000dc
jne    1230 <pll_setup_interconnect+0x130>
nopl   (%rax)
testl  $0x10,0x44e0000c
je     1240 <pll_setup_interconnect+0x140>
nopl   (%rax)
testl  $0x10,0x44e0012c
je     1250 <pll_setup_interconnect+0x150>
nopl   (%rax)
testl  $0x8,0x44e00004
je     1260 <pll_setup_interconnect+0x160>
ret

LLVM IR (-O0):
define void @pll_setup_interconnect() {
store volatile i32 2, i32* inttoptr (i64 1155530756 to i32*)
br label %1
1: ; preds = %5, %0
%2 = load volatile i32, i32* inttoptr (i64 1155530756 to i32*)
%3 = and i32 %2, 3
%4 = icmp ne i32 %3, 2
br i1 %4, label %5, label %6
5: ; preds = %1
br label %1
6: ; preds = %1
store volatile i32 2, i32* inttoptr (i64 1155530764 to i32*)
br label %7
7: ; preds = %11, %6
%8 = load volatile i32, i32* inttoptr (i64 1155530764 to i32*)
%9 = and i32 %8, 3
%10 = icmp ne i32 %9, 2
br i1 %10, label %11, label %12
11: ; preds = %7
br label %7
12: ; preds = %7
store volatile i32 2, i32* inttoptr (i64 1155530972 to i32*)
br label %13
13: ; preds = %17, %12
%14 = load volatile i32, i32* inttoptr (i64 1155530972 to i32*)
%15 = and i32 %14, 3
%16 = icmp ne i32 %15, 2
br i1 %16, label %17, label %18
17: ; preds = %13
br label %13
18: ; preds = %13
store volatile i32 2, i32* inttoptr (i64 1155530976 to i32*)
br label %19
19: ; preds = %23, %18
%20 = load volatile i32, i32* inttoptr (i64 1155530976 to i32*)
%21 = and i32 %20, 3
%22 = icmp ne i32 %21, 2
br i1 %22, label %23, label %24
23: ; preds = %19
br label %19
24: ; preds = %19
store volatile i32 2, i32* inttoptr (i64 1155531052 to i32*)
br label %25
25: ; preds = %29, %24
%26 = load volatile i32, i32* inttoptr (i64 1155531052 to i32*)
%27 = and i32 %26, 3
%28 = icmp ne i32 %27, 2
br i1 %28, label %29, label %30
29: ; preds = %25
br label %25
30: ; preds = %25
store volatile i32 2, i32* inttoptr (i64 1155530752 to i32*)
br label %31
31: ; preds = %35, %30
%32 = load volatile i32, i32* inttoptr (i64 1155530752 to i32*)
%33 = and i32 %32, 3
%34 = icmp ne i32 %33, 2
br i1 %34, label %35, label %36
35: ; preds = %31
br label %31
36: ; preds = %31
store volatile i32 2, i32* inttoptr (i64 1155530848 to i32*)
br label %37
37: ; preds = %41, %36
%38 = load volatile i32, i32* inttoptr (i64 1155530848 to i32*)
%39 = and i32 %38, 3
%40 = icmp ne i32 %39, 2
br i1 %40, label %41, label %42
41: ; preds = %37
br label %37
42: ; preds = %37
br label %43
43: ; preds = %48, %42
%44 = load volatile i32, i32* inttoptr (i64 1155530756 to i32*)
%45 = and i32 %44, 8
%46 = icmp ne i32 %45, 0
%47 = xor i1 %46, true
br i1 %47, label %48, label %49
48: ; preds = %43
br label %43
49: ; preds = %43
br label %50
50: ; preds = %55, %49
%51 = load volatile i32, i32* inttoptr (i64 1155530764 to i32*)
%52 = and i32 %51, 16
%53 = icmp ne i32 %52, 0
%54 = xor i1 %53, true
br i1 %54, label %55, label %56
55: ; preds = %50
br label %50
56: ; preds = %50
br label %57
57: ; preds = %62, %56
%58 = load volatile i32, i32* inttoptr (i64 1155531052 to i32*)
%59 = and i32 %58, 48
%60 = icmp ne i32 %59, 0
%61 = xor i1 %60, true
br i1 %61, label %62, label %63
62: ; preds = %57
br label %57
63: ; preds = %57
br label %64
64: ; preds = %69, %63
%65 = load volatile i32, i32* inttoptr (i64 1155530752 to i32*)
%66 = and i32 %65, 16640
%67 = icmp ne i32 %66, 0
%68 = xor i1 %67, true
br i1 %68, label %69, label %70
69: ; preds = %64
br label %64
70: ; preds = %64
br label %71
71: ; preds = %75, %70
%72 = load volatile i32, i32* inttoptr (i64 1155530976 to i32*)
%73 = and i32 %72, 196608
%74 = icmp ne i32 0, %73
br i1 %74, label %75, label %76
75: ; preds = %71
br label %71
76: ; preds = %71
br label %77
77: ; preds = %81, %76
%78 = load volatile i32, i32* inttoptr (i64 1155530972 to i32*)
%79 = and i32 %78, 196608
%80 = icmp ne i32 0, %79
br i1 %80, label %81, label %82
81: ; preds = %77
br label %77
82: ; preds = %77
br label %83
83: ; preds = %87, %82
%84 = load volatile i32, i32* inttoptr (i64 1155530764 to i32*)
%85 = and i32 %84, 16
%86 = icmp ne i32 16, %85
br i1 %86, label %87, label %88
87: ; preds = %83
br label %83
88: ; preds = %83
br label %89
89: ; preds = %93, %88
%90 = load volatile i32, i32* inttoptr (i64 1155531052 to i32*)
%91 = and i32 %90, 16
%92 = icmp ne i32 16, %91
br i1 %92, label %93, label %94
93: ; preds = %89
br label %89
94: ; preds = %89
br label %95
95: ; preds = %99, %94
%96 = load volatile i32, i32* inttoptr (i64 1155530756 to i32*)
%97 = and i32 %96, 8
%98 = icmp ne i32 8, %97
br i1 %98, label %99, label %100
99: ; preds = %95
br label %95
100: ; preds = %95
ret void
}

LLVM IR (-O2):
define void @pll_setup_interconnect() {
store volatile i32 2, i32* inttoptr (i64 1155530756 to i32*)
br label %1
1: ; preds = %1, %0
%2 = load volatile i32, i32* inttoptr (i64 1155530756 to i32*)
%3 = and i32 %2, 3
%4 = icmp eq i32 %3, 2
br i1 %4, label %5, label %1
5: ; preds = %1
store volatile i32 2, i32* inttoptr (i64 1155530764 to i32*)
br label %6
6: ; preds = %6, %5
%7 = load volatile i32, i32* inttoptr (i64 1155530764 to i32*)
%8 = and i32 %7, 3
%9 = icmp eq i32 %8, 2
br i1 %9, label %10, label %6
10: ; preds = %6
store volatile i32 2, i32* inttoptr (i64 1155530972 to i32*)
br label %11
11: ; preds = %11, %10
%12 = load volatile i32, i32* inttoptr (i64 1155530972 to i32*)
%13 = and i32 %12, 3
%14 = icmp eq i32 %13, 2
br i1 %14, label %15, label %11
15: ; preds = %11
store volatile i32 2, i32* inttoptr (i64 1155530976 to i32*)
br label %16
16: ; preds = %16, %15
%17 = load volatile i32, i32* inttoptr (i64 1155530976 to i32*)
%18 = and i32 %17, 3
%19 = icmp eq i32 %18, 2
br i1 %19, label %20, label %16
20: ; preds = %16
store volatile i32 2, i32* inttoptr (i64 1155531052 to i32*)
br label %21
21: ; preds = %21, %20
%22 = load volatile i32, i32* inttoptr (i64 1155531052 to i32*)
%23 = and i32 %22, 3
%24 = icmp eq i32 %23, 2
br i1 %24, label %25, label %21
25: ; preds = %21
store volatile i32 2, i32* inttoptr (i64 1155530752 to i32*)
br label %26
26: ; preds = %26, %25
%27 = load volatile i32, i32* inttoptr (i64 1155530752 to i32*)
%28 = and i32 %27, 3
%29 = icmp eq i32 %28, 2
br i1 %29, label %30, label %26
30: ; preds = %26
store volatile i32 2, i32* inttoptr (i64 1155530848 to i32*)
br label %31
31: ; preds = %31, %30
%32 = load volatile i32, i32* inttoptr (i64 1155530848 to i32*)
%33 = and i32 %32, 3
%34 = icmp eq i32 %33, 2
br i1 %34, label %35, label %31
35: ; preds = %31, %35
%36 = load volatile i32, i32* inttoptr (i64 1155530756 to i32*)
%37 = and i32 %36, 8
%38 = icmp eq i32 %37, 0
br i1 %38, label %35, label %39
39: ; preds = %35, %39
%40 = load volatile i32, i32* inttoptr (i64 1155530764 to i32*)
%41 = and i32 %40, 16
%42 = icmp eq i32 %41, 0
br i1 %42, label %39, label %43
43: ; preds = %39, %43
%44 = load volatile i32, i32* inttoptr (i64 1155531052 to i32*)
%45 = and i32 %44, 48
%46 = icmp eq i32 %45, 0
br i1 %46, label %43, label %47
47: ; preds = %43, %47
%48 = load volatile i32, i32* inttoptr (i64 1155530752 to i32*)
%49 = and i32 %48, 16640
%50 = icmp eq i32 %49, 0
br i1 %50, label %47, label %51
51: ; preds = %47, %51
%52 = load volatile i32, i32* inttoptr (i64 1155530976 to i32*)
%53 = and i32 %52, 196608
%54 = icmp eq i32 %53, 0
br i1 %54, label %55, label %51
55: ; preds = %51, %55
%56 = load volatile i32, i32* inttoptr (i64 1155530972 to i32*)
%57 = and i32 %56, 196608
%58 = icmp eq i32 %57, 0
br i1 %58, label %59, label %55
59: ; preds = %55, %59
%60 = load volatile i32, i32* inttoptr (i64 1155530764 to i32*)
%61 = and i32 %60, 16
%62 = icmp eq i32 %61, 0
br i1 %62, label %59, label %63
63: ; preds = %59, %63
%64 = load volatile i32, i32* inttoptr (i64 1155531052 to i32*)
%65 = and i32 %64, 16
%66 = icmp eq i32 %65, 0
br i1 %66, label %63, label %67
67: ; preds = %63, %67
%68 = load volatile i32, i32* inttoptr (i64 1155530756 to i32*)
%69 = and i32 %68, 8
%70 = icmp eq i32 %69, 0
br i1 %70, label %67, label %71
71: ; preds = %67
ret void
}