int msglen(unsigned char id) {
  switch (id) {
  case 0x08:
    return 379;
  case 0x02:
    return 48;
  case 0x03:
    return 40;
  case 0x06:
    return 21;
  case 0x07:
    return 22;
  case 0x20:
    return 227;
  case 0x22:
    return 17;
  case 0x23:
    return 67;
  case 0x24:
    return 68;
  case 0x25:
    return 39;
  case 0x26:
    return 32;
  case 0x27:
    return 98;
  }
  return 0;
}


x86 assembly (clang, -O0):
<msglen>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
add    $0xfffffffe,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x25,%eax
ja     11c4 <msglen+0xc4>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x17b,-0x4(%rbp)
jmp    11cb <msglen+0xcb>
movl   $0x30,-0x4(%rbp)
jmp    11cb <msglen+0xcb>
movl   $0x28,-0x4(%rbp)
jmp    11cb <msglen+0xcb>
movl   $0x15,-0x4(%rbp)
jmp    11cb <msglen+0xcb>
movl   $0x16,-0x4(%rbp)
jmp    11cb <msglen+0xcb>
movl   $0xe3,-0x4(%rbp)
jmp    11cb <msglen+0xcb>
movl   $0x11,-0x4(%rbp)
jmp    11cb <msglen+0xcb>
movl   $0x43,-0x4(%rbp)
jmp    11cb <msglen+0xcb>
movl   $0x44,-0x4(%rbp)
jmp    11cb <msglen+0xcb>
movl   $0x27,-0x4(%rbp)
jmp    11cb <msglen+0xcb>
movl   $0x20,-0x4(%rbp)
jmp    11cb <msglen+0xcb>
movl   $0x62,-0x4(%rbp)
jmp    11cb <msglen+0xcb>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<msglen>:
add    $0xfe,%dil
cmp    $0x25,%dil
ja     112f <msglen+0x2f>
mov    $0x17b,%eax
movzbl %dil,%ecx
lea    0xee6(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
mov    $0x30,%eax
ret
mov    $0x28,%eax
ret
xor    %eax,%eax
ret
mov    $0x15,%eax
ret
mov    $0x16,%eax
ret
mov    $0xe3,%eax
ret
mov    $0x11,%eax
ret
mov    $0x43,%eax
ret
mov    $0x44,%eax
ret
mov    $0x27,%eax
ret
mov    $0x20,%eax
ret
mov    $0x62,%eax
ret

LLVM IR (-O0):
define i32 @msglen(i8 zeroext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
switch i32 %5, label %18 [
i32 8, label %6
i32 2, label %7
i32 3, label %8
i32 6, label %9
i32 7, label %10
i32 32, label %11
i32 34, label %12
i32 35, label %13
i32 36, label %14
i32 37, label %15
i32 38, label %16
i32 39, label %17
]
6: ; preds = %1
store i32 379, i32* %2
br label %19
7: ; preds = %1
store i32 48, i32* %2
br label %19
8: ; preds = %1
store i32 40, i32* %2
br label %19
9: ; preds = %1
store i32 21, i32* %2
br label %19
10: ; preds = %1
store i32 22, i32* %2
br label %19
11: ; preds = %1
store i32 227, i32* %2
br label %19
12: ; preds = %1
store i32 17, i32* %2
br label %19
13: ; preds = %1
store i32 67, i32* %2
br label %19
14: ; preds = %1
store i32 68, i32* %2
br label %19
15: ; preds = %1
store i32 39, i32* %2
br label %19
16: ; preds = %1
store i32 32, i32* %2
br label %19
17: ; preds = %1
store i32 98, i32* %2
br label %19
18: ; preds = %1
store i32 0, i32* %2
br label %19
19: ; preds = %18, %17, %16, %15, %14, %13, %12, %11, %10, %9, %8, %7, %6
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @msglen(i8 zeroext %0) {
switch i8 %0, label %13 [
i8 8, label %14
i8 2, label %2
i8 3, label %3
i8 6, label %4
i8 7, label %5
i8 32, label %6
i8 34, label %7
i8 35, label %8
i8 36, label %9
i8 37, label %10
i8 38, label %11
i8 39, label %12
]
2: ; preds = %1
br label %14
3: ; preds = %1
br label %14
4: ; preds = %1
br label %14
5: ; preds = %1
br label %14
6: ; preds = %1
br label %14
7: ; preds = %1
br label %14
8: ; preds = %1
br label %14
9: ; preds = %1
br label %14
10: ; preds = %1
br label %14
11: ; preds = %1
br label %14
12: ; preds = %1
br label %14
13: ; preds = %1
br label %14
14: ; preds = %1, %13, %12, %11, %10, %9, %8, %7, %6, %5, %4, %3, %2
%15 = phi i32 [ 0, %13 ], [ 98, %12 ], [ 32, %11 ], [ 39, %10 ], [ 68, %9 ], [ 67, %8 ], [ 17, %7 ], [ 227, %6 ], [ 22, %5 ], [ 21, %4 ], [ 40, %3 ], [ 48, %2 ], [ 379, %1 ]
ret i32 %15
}