int reg_trim_double(double *x, double x_1, double x_2) {
  if (*x < x_1 && *x < x_2) {
    *x = x_1;
    return 1;
  }
  if (*x > x_1 && *x > x_2) {
    *x = x_2;
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<reg_trim_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movsd  %xmm0,-0x18(%rbp)
movsd  %xmm1,-0x20(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm1
movsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1159 <reg_trim_double+0x59>
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm1
movsd  -0x20(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1159 <reg_trim_double+0x59>
movsd  -0x18(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
movl   $0x1,-0x4(%rbp)
jmp    119f <reg_trim_double+0x9f>
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
ucomisd -0x18(%rbp),%xmm0
jbe    1198 <reg_trim_double+0x98>
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
ucomisd -0x20(%rbp),%xmm0
jbe    1198 <reg_trim_double+0x98>
movsd  -0x20(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
movl   $0x1,-0x4(%rbp)
jmp    119f <reg_trim_double+0x9f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg_trim_double>:
movsd  (%rdi),%xmm2
ucomisd %xmm2,%xmm0
jbe    1116 <reg_trim_double+0x16>
ucomisd %xmm2,%xmm1
jbe    1116 <reg_trim_double+0x16>
movapd %xmm0,%xmm1
jmp    1124 <reg_trim_double+0x24>
xor    %eax,%eax
ucomisd %xmm0,%xmm2
jbe    112d <reg_trim_double+0x2d>
ucomisd %xmm1,%xmm2
jbe    112d <reg_trim_double+0x2d>
movsd  %xmm1,(%rdi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @reg_trim_double(double* %0, double %1, double %2) {
%4 = alloca i32
%5 = alloca double*
%6 = alloca double
%7 = alloca double
store double* %0, double** %5
store double %1, double* %6
store double %2, double* %7
%8 = load double*, double** %5
%9 = load double, double* %8
%10 = load double, double* %6
%11 = fcmp olt double %9, %10
br i1 %11, label %12, label %20
12: ; preds = %3
%13 = load double*, double** %5
%14 = load double, double* %13
%15 = load double, double* %7
%16 = fcmp olt double %14, %15
br i1 %16, label %17, label %20
17: ; preds = %12
%18 = load double, double* %6
%19 = load double*, double** %5
store double %18, double* %19
store i32 1, i32* %4
br label %34
20: ; preds = %12, %3
%21 = load double*, double** %5
%22 = load double, double* %21
%23 = load double, double* %6
%24 = fcmp ogt double %22, %23
br i1 %24, label %25, label %33
25: ; preds = %20
%26 = load double*, double** %5
%27 = load double, double* %26
%28 = load double, double* %7
%29 = fcmp ogt double %27, %28
br i1 %29, label %30, label %33
30: ; preds = %25
%31 = load double, double* %7
%32 = load double*, double** %5
store double %31, double* %32
store i32 1, i32* %4
br label %34
33: ; preds = %25, %20
store i32 0, i32* %4
br label %34
34: ; preds = %33, %30, %17
%35 = load i32, i32* %4
ret i32 %35
}

LLVM IR (-O2):
define i32 @reg_trim_double(double* nocapture %0, double %1, double %2) {
%4 = load double, double* %0
%5 = fcmp olt double %4, %1
%6 = fcmp olt double %4, %2
%7 = and i1 %5, %6
br i1 %7, label %12, label %8
8: ; preds = %3
%9 = fcmp ogt double %4, %1
%10 = fcmp ogt double %4, %2
%11 = and i1 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %8, %3
%13 = phi double [ %1, %3 ], [ %2, %8 ]
store double %13, double* %0
br label %14
14: ; preds = %12, %8
%15 = phi i32 [ 0, %8 ], [ 1, %12 ]
ret i32 %15
}