#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void ADCClockConfigSet(uint32_t ui32Base, uint32_t ui32Config,
                       uint32_t ui32ClockDiv) {
  ASSERT((ui32Base == 0x40038000) || (ui32Base == 0x40039000));
  ASSERT((ui32ClockDiv - 1) <= (0x000003F0 >> 4));
  ASSERT((ui32Config & 0x00000070) != 0);
  (*((volatile uint32_t *)(ui32Base + 0x00000FC4))) =
      (ui32Config >> 4) & 0x0000000F;
  (*((volatile uint32_t *)(ui32Base + 0x00000FC8))) =
      (ui32Config & 0x0000000F) | (((ui32ClockDiv - 1) << 4));
}


x86 assembly (clang, -O0):
<ADCClockConfigSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    $0x1,%al
cmpl   $0x40038000,-0x4(%rbp)
mov    %al,-0xd(%rbp)
je     1140 <ADCClockConfigSet+0x30>
cmpl   $0x40039000,-0x4(%rbp)
sete   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
cmp    $0x3f,%eax
setle  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%eax
and    $0x70,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%ecx
sar    $0x4,%ecx
and    $0xf,%ecx
mov    -0x4(%rbp),%eax
add    $0xfc4,%eax
cltq
mov    %ecx,(%rax)
mov    -0x8(%rbp),%ecx
and    $0xf,%ecx
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
shl    $0x4,%eax
or     %eax,%ecx
mov    -0x4(%rbp),%eax
add    $0xfc8,%eax
cltq
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCClockConfigSet>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebx
mov    %edi,%ebp
mov    %edi,%eax
and    $0xffffefff,%eax
xor    %edi,%edi
cmp    $0x40038000,%eax
sete   %dil
call   1030 <ASSERT@plt>
xor    %edi,%edi
cmp    $0x41,%r14d
setl   %dil
call   1030 <ASSERT@plt>
xor    %edi,%edi
test   $0x70,%bl
setne  %dil
call   1030 <ASSERT@plt>
mov    %ebx,%eax
shr    $0x4,%eax
and    $0xf,%eax
movslq %ebp,%rcx
mov    %eax,0xfc4(%rcx)
and    $0xf,%ebx
shl    $0x4,%r14d
lea    (%r14,%rbx,1),%eax
add    $0xfffffff0,%eax
mov    %eax,0xfc8(%rcx)
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @ADCClockConfigSet(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = icmp eq i32 %7, 1073971200
br i1 %8, label %12, label %9
9: ; preds = %3
%10 = load i32, i32* %4
%11 = icmp eq i32 %10, 1073975296
br label %12
12: ; preds = %9, %3
%13 = phi i1 [ true, %3 ], [ %11, %9 ]
%14 = zext i1 %13 to i32
%15 = call i32 @ASSERT(i32 %14)
%16 = load i32, i32* %6
%17 = sub nsw i32 %16, 1
%18 = icmp sle i32 %17, 63
%19 = zext i1 %18 to i32
%20 = call i32 @ASSERT(i32 %19)
%21 = load i32, i32* %5
%22 = and i32 %21, 112
%23 = icmp ne i32 %22, 0
%24 = zext i1 %23 to i32
%25 = call i32 @ASSERT(i32 %24)
%26 = load i32, i32* %5
%27 = ashr i32 %26, 4
%28 = and i32 %27, 15
%29 = load i32, i32* %4
%30 = add nsw i32 %29, 4036
%31 = sext i32 %30 to i64
%32 = inttoptr i64 %31 to i32*
store volatile i32 %28, i32* %32
%33 = load i32, i32* %5
%34 = and i32 %33, 15
%35 = load i32, i32* %6
%36 = sub nsw i32 %35, 1
%37 = shl i32 %36, 4
%38 = or i32 %34, %37
%39 = load i32, i32* %4
%40 = add nsw i32 %39, 4040
%41 = sext i32 %40 to i64
%42 = inttoptr i64 %41 to i32*
store volatile i32 %38, i32* %42
ret void
}

LLVM IR (-O2):
define void @ADCClockConfigSet(i32 %0, i32 %1, i32 %2) {
%4 = and i32 %0, -4097
%5 = icmp eq i32 %4, 1073971200
%6 = zext i1 %5 to i32
%7 = tail call i32 @ASSERT(i32 %6)
%8 = icmp slt i32 %2, 65
%9 = zext i1 %8 to i32
%10 = tail call i32 @ASSERT(i32 %9)
%11 = and i32 %1, 112
%12 = icmp ne i32 %11, 0
%13 = zext i1 %12 to i32
%14 = tail call i32 @ASSERT(i32 %13)
%15 = lshr i32 %1, 4
%16 = and i32 %15, 15
%17 = add nsw i32 %0, 4036
%18 = sext i32 %17 to i64
%19 = inttoptr i64 %18 to i32*
store volatile i32 %16, i32* %19
%20 = and i32 %1, 15
%21 = shl i32 %2, 4
%22 = add i32 %21, -16
%23 = or i32 %22, %20
%24 = add nsw i32 %0, 4040
%25 = sext i32 %24 to i64
%26 = inttoptr i64 %25 to i32*
store volatile i32 %23, i32* %26
ret void
}