xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int value;
typedef int uint32_t;

/* Variables and functions */
uint32_t etna_align_down(uint32_t value, uint32_t granularity) {
  return (value) & (~(granularity - 1));
}


x86 assembly (clang, -O0):
<etna_align_down>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<etna_align_down>:
mov    %esi,%eax
neg    %eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @etna_align_down(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = xor i32 %7, -1
%9 = and i32 %5, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @etna_align_down(i32 %0, i32 %1) {
%3 = sub i32 0, %1
%4 = and i32 %3, %0
ret i32 %4
}
void foo(__float128 *p, __float128 *q) {
  __float128 r = *q;
  __asm__(" # %0" : "+r"(r));
  *p = r + r;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movaps (%rax),%xmm0
movaps %xmm0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x18(%rbp)
mov    %rax,-0x20(%rbp)
movaps -0x20(%rbp),%xmm1
movaps %xmm1,%xmm0
call   1150 <__addtf3>
mov    -0x8(%rbp),%rax
movaps %xmm0,(%rax)
add    $0x20,%rsp
pop    %rbp
ret
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax

x86 assembly (clang, -O2):
<foo>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    (%rsi),%rax
mov    0x8(%rsi),%rcx
mov    %rcx,0x8(%rsp)
mov    %rax,(%rsp)
movaps (%rsp),%xmm0
movaps %xmm0,%xmm1
call   1130 <__addtf3>
movaps %xmm0,(%rbx)
add    $0x10,%rsp
pop    %rbx
ret
nopl   (%rax)

LLVM IR (-O0):
define void @foo(fp128* %0, fp128* %1) {
%3 = alloca fp128*
%4 = alloca fp128*
%5 = alloca fp128
store fp128* %0, fp128** %3
store fp128* %1, fp128** %4
%6 = load fp128*, fp128** %4
%7 = load fp128, fp128* %6
store fp128 %7, fp128* %5
%8 = load fp128, fp128* %5
%9 = call fp128 asm " # $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(fp128 %8)
store fp128 %9, fp128* %5
%10 = load fp128, fp128* %5
%11 = load fp128, fp128* %5
%12 = fadd fp128 %10, %11
%13 = load fp128*, fp128** %3
store fp128 %12, fp128* %13
ret void
}

LLVM IR (-O2):
define void @foo(fp128* nocapture writeonly %0, fp128* nocapture %1) {
%3 = load fp128, fp128* %1
%4 = tail call fp128 asm " # $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(fp128 %3)
%5 = fadd fp128 %4, %4
store fp128 %5, fp128* %0
ret void
}
int limit(int min, int val, int max) {
  if (min > max) {
    min = min ^ max;
    max = max ^ min;
    min = min ^ max;
  }
  if (val < min) {
    val = min;
  }
  if (val > max) {
    val = max;
  }
  return val;
}


x86 assembly (clang, -O0):
<limit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1134 <limit+0x34>
mov    -0x4(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1146 <limit+0x46>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1158 <limit+0x58>
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<limit>:
cmp    %edx,%edi
mov    %edi,%eax
cmovg  %edx,%eax
cmovg  %edi,%edx
cmp    %esi,%eax
cmovle %esi,%eax
cmp    %edx,%eax
cmovg  %edx,%eax
ret

LLVM IR (-O0):
define i32 @limit(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %6
%9 = icmp sgt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %3
%11 = load i32, i32* %4
%12 = load i32, i32* %6
%13 = xor i32 %11, %12
store i32 %13, i32* %4
%14 = load i32, i32* %6
%15 = load i32, i32* %4
%16 = xor i32 %14, %15
store i32 %16, i32* %6
%17 = load i32, i32* %4
%18 = load i32, i32* %6
%19 = xor i32 %17, %18
store i32 %19, i32* %4
br label %20
20: ; preds = %10, %3
%21 = load i32, i32* %5
%22 = load i32, i32* %4
%23 = icmp slt i32 %21, %22
br i1 %23, label %24, label %26
24: ; preds = %20
%25 = load i32, i32* %4
store i32 %25, i32* %5
br label %26
26: ; preds = %24, %20
%27 = load i32, i32* %5
%28 = load i32, i32* %6
%29 = icmp sgt i32 %27, %28
br i1 %29, label %30, label %32
30: ; preds = %26
%31 = load i32, i32* %6
store i32 %31, i32* %5
br label %32
32: ; preds = %30, %26
%33 = load i32, i32* %5
ret i32 %33
}

LLVM IR (-O2):
define i32 @limit(i32 %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %0, %2
%5 = select i1 %4, i32 %2, i32 %0
%6 = select i1 %4, i32 %0, i32 %2
%7 = icmp sgt i32 %5, %1
%8 = select i1 %7, i32 %5, i32 %1
%9 = icmp sgt i32 %8, %6
%10 = select i1 %9, i32 %6, i32 %8
ret i32 %10
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint32_t;

/* Variables and functions */
void store32(void *out, const uint32_t v) {
  uint8_t *p = (uint8_t *)out;
  p[0] = (uint8_t)(v >> 0);
  p[1] = (uint8_t)(v >> 8);
  p[2] = (uint8_t)(v >> 16);
  p[3] = (uint8_t)(v >> 24);
}


x86 assembly (clang, -O0):
<store32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x0,%eax
movslq %eax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
movslq %eax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,0x8(%rax)
mov    -0xc(%rbp),%eax
sar    $0x10,%eax
movslq %eax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,0x10(%rax)
mov    -0xc(%rbp),%eax
sar    $0x18,%eax
movslq %eax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,0x18(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<store32>:
movslq %esi,%rax
mov    %rax,(%rdi)
mov    %eax,%ecx
sar    $0x8,%ecx
movslq %ecx,%rcx
mov    %rcx,0x8(%rdi)
mov    %eax,%ecx
sar    $0x10,%ecx
movslq %ecx,%rcx
mov    %rcx,0x10(%rdi)
sar    $0x18,%eax
cltq
mov    %rax,0x18(%rdi)
ret

LLVM IR (-O0):
define void @store32(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i64*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i64*
store i64* %7, i64** %5
%8 = load i32, i32* %4
%9 = ashr i32 %8, 0
%10 = sext i32 %9 to i64
%11 = load i64*, i64** %5
%12 = getelementptr inbounds i64, i64* %11, i64 0
store i64 %10, i64* %12
%13 = load i32, i32* %4
%14 = ashr i32 %13, 8
%15 = sext i32 %14 to i64
%16 = load i64*, i64** %5
%17 = getelementptr inbounds i64, i64* %16, i64 1
store i64 %15, i64* %17
%18 = load i32, i32* %4
%19 = ashr i32 %18, 16
%20 = sext i32 %19 to i64
%21 = load i64*, i64** %5
%22 = getelementptr inbounds i64, i64* %21, i64 2
store i64 %20, i64* %22
%23 = load i32, i32* %4
%24 = ashr i32 %23, 24
%25 = sext i32 %24 to i64
%26 = load i64*, i64** %5
%27 = getelementptr inbounds i64, i64* %26, i64 3
store i64 %25, i64* %27
ret void
}

LLVM IR (-O2):
define void @store32(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i64*
%4 = sext i32 %1 to i64
store i64 %4, i64* %3
%5 = ashr i32 %1, 8
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 8
%8 = bitcast i8* %7 to i64*
store i64 %6, i64* %8
%9 = ashr i32 %1, 16
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %0, i64 16
%12 = bitcast i8* %11 to i64*
store i64 %10, i64* %12
%13 = ashr i32 %1, 24
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %0, i64 24
%16 = bitcast i8* %15 to i64*
store i64 %14, i64* %16
ret void
}
void done() {}


x86 assembly (clang, -O0):
<done>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<done>:
ret

LLVM IR (-O0):
define void @done() {
ret void
}

LLVM IR (-O2):
define void @done() {
ret void
}
/* Type definitions */
typedef size_t ssize_t;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, size_t);
size_t send(int, char const *, size_t, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
ssize_t socket_write(int sockfd, const char *data, size_t n) {
  ssize_t m = send(sockfd, data, n, 0);
  if (m != n) {
    fprintf(stderr, "edvs_net_send: send error %zd\n", m);
  }
  return m;
}


x86 assembly (clang, -O0):
<socket_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
call   1030 <send@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
je     1170 <socket_write+0x50>
mov    0x2e82(%rip),%rax
mov    (%rax),%edi
mov    -0x20(%rbp),%rdx
lea    0xe95(%rip),%rsi
call   1040 <fprintf@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<socket_write>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
xor    %ecx,%ecx
call   1030 <send@plt>
mov    %rax,%rbx
cmp    %r14,%rax
je     114e <socket_write+0x2e>
mov    0x2ea3(%rip),%rax
mov    (%rax),%edi
lea    0xeba(%rip),%rsi
mov    %rbx,%rdx
call   1040 <fprintf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [31 x i8] c"edvs_net_send: send error %zd\0A\00"
define i64 @socket_write(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = call i64 @send(i32 %8, i8* %9, i64 %10, i32 0)
store i64 %11, i64* %7
%12 = load i64, i64* %7
%13 = load i64, i64* %6
%14 = icmp ne i64 %12, %13
br i1 %14, label %15, label %19
15: ; preds = %3
%16 = load i32, i32* @stderr
%17 = load i64, i64* %7
%18 = call i32 @fprintf(i32 %16, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i64 %17)
br label %19
19: ; preds = %15, %3
%20 = load i64, i64* %7
ret i64 %20
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [31 x i8] c"edvs_net_send: send error %zd\0A\00"
define i64 @socket_write(i32 %0, i8* %1, i64 %2) {
%4 = tail call i64 @send(i32 %0, i8* %1, i64 %2, i32 0)
%5 = icmp eq i64 %4, %2
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = load i32, i32* @stderr
%8 = tail call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i64 %4)
br label %9
9: ; preds = %6, %3
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ send_cmd(int, char *, scalar_t__);
scalar_t__ strlen(char *);
void send_cmd_str(int cmd_code, char *arg) {
  send_cmd(cmd_code, arg, strlen(arg) + 1);
}


x86 assembly (clang, -O0):
<send_cmd_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    %rax,%rdx
add    $0x1,%rdx
call   1040 <send_cmd@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_cmd_str>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1030 <strlen@plt>
lea    0x1(%rax),%rdx
mov    %ebp,%edi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <send_cmd@plt>

LLVM IR (-O0):
define void @send_cmd_str(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i64 @strlen(i8* %7)
%9 = add nsw i64 %8, 1
%10 = call i32 @send_cmd(i32 %5, i8* %6, i64 %9)
ret void
}

LLVM IR (-O2):
define void @send_cmd_str(i32 %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = add nsw i64 %3, 1
%5 = tail call i32 @send_cmd(i32 %0, i8* %1, i64 %4)
ret void
}
/* Variables and functions */
double exp(double);
double sqrt(double);
double TU(double TU) {
  double q7;
  if (TU > 100) {
    return 5;
  }
  q7 = 97.34 * exp(-0.01139 * TU + -0.04917 * sqrt(TU));
  return q7;
}


x86 assembly (clang, -O0):
<TU>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xec6(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    1156 <TU+0x36>
movsd  0xed4(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    11b1 <TU+0x91>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1040 <sqrt@plt>
movaps %xmm0,%xmm2
movsd  -0x20(%rbp),%xmm0
movsd  0xe9e(%rip),%xmm1
mulsd  %xmm2,%xmm1
movsd  0xe8a(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
call   1030 <exp@plt>
movaps %xmm0,%xmm1
movsd  0xe6a(%rip),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TU>:
push   %rax
ucomisd 0xedf(%rip),%xmm0
jbe    1135 <TU+0x15>
movsd  0xecd(%rip),%xmm0
pop    %rax
ret
movapd %xmm0,%xmm1
xorpd  %xmm0,%xmm0
ucomisd %xmm0,%xmm1
jb     114c <TU+0x2c>
xorps  %xmm0,%xmm0
sqrtsd %xmm1,%xmm0
jmp    115f <TU+0x3f>
movapd %xmm1,%xmm0
movsd  %xmm1,(%rsp)
call   1040 <sqrt@plt>
movsd  (%rsp),%xmm1
mulsd  0xea9(%rip),%xmm0
mulsd  0xea9(%rip),%xmm1
addsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
call   1030 <exp@plt>
mulsd  0xe9c(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @TU(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %3
%5 = load double, double* %3
%6 = fcmp ogt double %5, 1.000000e+02
br i1 %6, label %7, label %8
7: ; preds = %1
store double 5.000000e+00, double* %2
br label %17
8: ; preds = %1
%9 = load double, double* %3
%10 = load double, double* %3
%11 = call double @sqrt(double %10)
%12 = fmul double -4.917000e-02, %11
%13 = call double @llvm.fmuladd.f64(double -1.139000e-02, double %9, double %12)
%14 = call double @exp(double %13)
%15 = fmul double 9.734000e+01, %14
store double %15, double* %4
%16 = load double, double* %4
store double %16, double* %2
br label %17
17: ; preds = %8, %7
%18 = load double, double* %2
ret double %18
}

LLVM IR (-O2):
define double @TU(double %0) {
%2 = fcmp ogt double %0, 1.000000e+02
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = tail call double @sqrt(double %0)
%5 = fmul double %4, -4.917000e-02
%6 = tail call double @llvm.fmuladd.f64(double %0, double -1.139000e-02, double %5)
%7 = tail call double @exp(double %6)
%8 = fmul double %7, 9.734000e+01
br label %9
9: ; preds = %1, %3
%10 = phi double [ %8, %3 ], [ 5.000000e+00, %1 ]
ret double %10
}
int supports_eci(const int symbology) {
  switch (symbology) {
  case 92:
  case 71:
  case 57:
  case 84:
  case 55:
  case 56:
  case 58:
  case 115:
  case 141:
  case 142:
  case 116:
  case 144:
  case 145:
    return 1;
    break;
  }
  return 0;
}


x86 assembly (clang, -O0):
<supports_eci>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffc9,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x5a,%eax
ja     113c <supports_eci+0x3c>
mov    -0x10(%rbp),%rax
lea    0xed9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x4(%rbp)
jmp    1143 <supports_eci+0x43>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<supports_eci>:
add    $0xffffffc9,%edi
cmp    $0x5a,%edi
ja     111e <supports_eci+0x1e>
mov    $0x1,%eax
lea    0xeec(%rip),%rcx
movslq (%rcx,%rdi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @supports_eci(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 92, label %5
i32 71, label %5
i32 57, label %5
i32 84, label %5
i32 55, label %5
i32 56, label %5
i32 58, label %5
i32 115, label %5
i32 141, label %5
i32 142, label %5
i32 116, label %5
i32 144, label %5
i32 145, label %5
]
5: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @supports_eci(i32 %0) {
switch i32 %0, label %2 [
i32 92, label %3
i32 71, label %3
i32 57, label %3
i32 84, label %3
i32 55, label %3
i32 56, label %3
i32 58, label %3
i32 115, label %3
i32 141, label %3
i32 142, label %3
i32 116, label %3
i32 144, label %3
i32 145, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %2
%4 = phi i32 [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}
/* Type definitions */
struct timeval {
  int tv_usec;
  scalar_t__ tv_sec;
};
typedef int /*<<< orphan*/ fd_set;

/* Variables and functions */
int /*<<< orphan*/ FD_SET(int /*<<< orphan*/, int /*<<< orphan*/ *);
int /*<<< orphan*/ FD_ZERO(int /*<<< orphan*/ *);
int select(int, int /*<<< orphan*/ *, int /*<<< orphan*/, int /*<<< orphan*/,
           struct timeval *);
int curs_select_stdin_input(int usec) {
  struct timeval tv;
  fd_set rfd;
  FD_ZERO(&rfd);
  FD_SET(0, &rfd);
  tv.tv_sec = 0;
  tv.tv_usec = usec;
  return select(1, &rfd, 0, 0, &tv);
}


x86 assembly (clang, -O0):
<curs_select_stdin_input>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x1c(%rbp),%rdi
call   1030 <FD_ZERO@plt>
xor    %edi,%edi
lea    -0x1c(%rbp),%rsi
call   1050 <FD_SET@plt>
movq   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    $0x1,%edi
lea    -0x1c(%rbp),%rsi
xor    %ecx,%ecx
lea    -0x18(%rbp),%r8
mov    %ecx,%edx
call   1040 <select@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<curs_select_stdin_input>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %edi,%ebx
lea    0x4(%rsp),%r14
mov    %r14,%rdi
call   1030 <FD_ZERO@plt>
xor    %edi,%edi
mov    %r14,%rsi
call   1050 <FD_SET@plt>
movq   $0x0,0x10(%rsp)
mov    %ebx,0x8(%rsp)
lea    0x8(%rsp),%r8
mov    $0x1,%edi
mov    %r14,%rsi
xor    %edx,%edx
xor    %ecx,%ecx
call   1040 <select@plt>
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i64 }
define i32 @curs_select_stdin_input(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.timeval
%4 = alloca i32
store i32 %0, i32* %2
%5 = call i32 @FD_ZERO(i32* %4)
%6 = call i32 @FD_SET(i32 0, i32* %4)
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i32 0, i32 1
store i64 0, i64* %7
%8 = load i32, i32* %2
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i32 0, i32 0
store i32 %8, i32* %9
%10 = call i32 @select(i32 1, i32* %4, i32 0, i32 0, %struct.timeval* %3)
ret i32 %10
}

LLVM IR (-O2):
%struct.timeval = type { i32, i64 }
define i32 @curs_select_stdin_input(i32 %0) {
%2 = alloca %struct.timeval
%3 = alloca i32
%4 = bitcast %struct.timeval* %2 to i8*
%5 = bitcast i32* %3 to i8*
%6 = call i32 @FD_ZERO(i32* %3)
%7 = call i32 @FD_SET(i32 0, i32* %3)
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i64 0, i32 1
store i64 0, i64* %8
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i64 0, i32 0
store i32 %0, i32* %9
%10 = call i32 @select(i32 1, i32* %3, i32 0, i32 0, %struct.timeval* %2)
ret i32 %10
}
int __attribute__((no, noclone)) copysign_bug(double x) {
  if (x != 0.0 && (x * 0.5 == x))
    return 1;
  if (__builtin_copysign(1.0, x) < 0.0)
    return 2;
  else
    return 3;
}


x86 assembly (clang, -O0):
<copysign_bug>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    1126 <copysign_bug+0x26>
jp     1126 <copysign_bug+0x26>
jmp    1150 <copysign_bug+0x50>
movsd  0xed2(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
jne    1150 <copysign_bug+0x50>
jp     1150 <copysign_bug+0x50>
movl   $0x1,-0x4(%rbp)
jmp    118b <copysign_bug+0x8b>
movsd  -0x10(%rbp),%xmm1
movaps 0xeb4(%rip),%xmm0
pand   %xmm0,%xmm1
movaps 0xeb9(%rip),%xmm0
por    %xmm0,%xmm1
xorps  %xmm0,%xmm0
ucomisd %xmm1,%xmm0
jbe    1184 <copysign_bug+0x84>
movl   $0x2,-0x4(%rbp)
jmp    118b <copysign_bug+0x8b>
movl   $0x3,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<copysign_bug>:
movsd  0xef8(%rip),%xmm1
mulsd  %xmm0,%xmm1
movmskpd %xmm0,%eax
and    $0x1,%eax
xor    $0x3,%eax
ucomisd %xmm0,%xmm1
mov    $0x1,%ecx
cmovne %eax,%ecx
cmovp  %eax,%ecx
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
cmovne %ecx,%eax
cmovp  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @copysign_bug(double %0) {
%2 = alloca i32
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp une double %4, 0.000000e+00
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load double, double* %3
%8 = fmul double %7, 5.000000e-01
%9 = load double, double* %3
%10 = fcmp oeq double %8, %9
br i1 %10, label %11, label %12
11: ; preds = %6
store i32 1, i32* %2
br label %18
12: ; preds = %6, %1
%13 = load double, double* %3
%14 = call double @llvm.copysign.f64(double 1.000000e+00, double %13)
%15 = fcmp olt double %14, 0.000000e+00
br i1 %15, label %16, label %17
16: ; preds = %12
store i32 2, i32* %2
br label %18
17: ; preds = %12
store i32 3, i32* %2
br label %18
18: ; preds = %17, %16, %11
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @copysign_bug(double %0) {
%2 = fcmp une double %0, 0.000000e+00
%3 = fmul double %0, 5.000000e-01
%4 = fcmp oeq double %3, %0
%5 = and i1 %2, %4
%6 = bitcast double %0 to i64
%7 = icmp slt i64 %6, 0
%8 = select i1 %7, i32 2, i32 3
%9 = select i1 %5, i32 1, i32 %8
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0xde() {
  Assert_real((isalnum(222) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              1115, ("isalnum should be 0 for 0xde"));
}


x86 assembly (clang, -O0):
<t_isalnum_0xde>:
push   %rbp
mov    %rsp,%rbp
mov    $0xde,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x45b,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0xde>:
push   %rax
mov    $0xde,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x45b,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xde\00"
define void @t_isalnum_0xde() {
%1 = call i64 @isalnum(i32 222)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1115, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xde\00"
define void @t_isalnum_0xde() {
%1 = tail call i64 @isalnum(i32 222)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1115, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ val;

/* Variables and functions */
unsigned int byteSwap32(unsigned int);
int /*<<< orphan*/ mustReadFd(int, unsigned int *, int);
unsigned fdReadBits32(int fd, int isSwapped) {
  unsigned val;
  mustReadFd((fd), &(val), sizeof(val));
  if (isSwapped)
    val = byteSwap32(val);
  return val;
}


x86 assembly (clang, -O0):
<fdReadBits32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
lea    -0xc(%rbp),%rsi
mov    $0x4,%edx
call   1040 <mustReadFd@plt>
cmpl   $0x0,-0x8(%rbp)
je     1154 <fdReadBits32+0x34>
mov    -0xc(%rbp),%edi
call   1030 <byteSwap32@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdReadBits32>:
push   %rbx
sub    $0x10,%rsp
mov    %esi,%ebx
lea    0xc(%rsp),%rsi
mov    $0x4,%edx
call   1040 <mustReadFd@plt>
mov    0xc(%rsp),%eax
test   %ebx,%ebx
je     1145 <fdReadBits32+0x25>
mov    %eax,%edi
call   1030 <byteSwap32@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @fdReadBits32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = call i32 @mustReadFd(i32 %6, i32* %5, i32 4)
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %2
%11 = load i32, i32* %5
%12 = call i32 @byteSwap32(i32 %11)
store i32 %12, i32* %5
br label %13
13: ; preds = %10, %2
%14 = load i32, i32* %5
ret i32 %14
}

LLVM IR (-O2):
define i32 @fdReadBits32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @mustReadFd(i32 %0, i32* %3, i32 4)
%6 = icmp eq i32 %1, 0
%7 = load i32, i32* %3
br i1 %6, label %10, label %8
8: ; preds = %2
%9 = call i32 @byteSwap32(i32 %7)
br label %10
10: ; preds = %2, %8
%11 = phi i32 [ %9, %8 ], [ %7, %2 ]
ret i32 %11
}
/* Variables and functions */
int f136(int *);
int f137(int *p) { return f136(p); }


x86 assembly (clang, -O0):
<f137>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f136@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f137>:
jmp    1030 <f136@plt>

LLVM IR (-O0):
define i32 @f137(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f136(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f137(i32* %0) {
%2 = tail call i32 @f136(i32* %0)
ret i32 %2
}
void GPMCECCCSSelect(unsigned int baseAddr, unsigned int csNum) {
  (*((volatile unsigned int *)(baseAddr + (0x1F4)))) &= ~(0x0000000Eu);
  (*((volatile unsigned int *)(baseAddr + (0x1F4)))) |=
      ((csNum << (0x00000001u)) & (0x0000000Eu));
}


x86 assembly (clang, -O0):
<GPMCECCCSSelect>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1f4,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xfffffff1,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%edx
shl    $0x1,%edx
and    $0xe,%edx
mov    -0x4(%rbp),%eax
add    $0x1f4,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPMCECCCSSelect>:
add    $0x1f4,%edi
andl   $0xfffffff1,(%rdi)
add    %esi,%esi
and    $0xe,%esi
or     %esi,(%rdi)
ret

LLVM IR (-O0):
define void @GPMCECCCSSelect(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add i32 %5, 500
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, -15
store volatile i32 %10, i32* %8
%11 = load i32, i32* %4
%12 = shl i32 %11, 1
%13 = and i32 %12, 14
%14 = load i32, i32* %3
%15 = add i32 %14, 500
%16 = zext i32 %15 to i64
%17 = inttoptr i64 %16 to i32*
%18 = load volatile i32, i32* %17
%19 = or i32 %18, %13
store volatile i32 %19, i32* %17
ret void
}

LLVM IR (-O2):
define void @GPMCECCCSSelect(i32 %0, i32 %1) {
%3 = add i32 %0, 500
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, -15
store volatile i32 %7, i32* %5
%8 = shl i32 %1, 1
%9 = and i32 %8, 14
%10 = load volatile i32, i32* %5
%11 = or i32 %10, %9
store volatile i32 %11, i32* %5
ret void
}
/* Variables and functions */
int errno;
int c_errno() { return errno; }


x86 assembly (clang, -O0):
<c_errno>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_errno>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@errno = global i32 0
define i32 @c_errno() {
%1 = load i32, i32* @errno
ret i32 %1
}

LLVM IR (-O2):
@errno = global i32 0
define i32 @c_errno() {
%1 = load i32, i32* @errno
ret i32 %1
}
int getMinrun(int n) {
  int r = 0;
  while (n >= 64) {
    r |= n & 1;
    n >>= 1;
  }
  return n + r;
}


x86 assembly (clang, -O0):
<getMinrun>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x40,-0x4(%rbp)
jl     1132 <getMinrun+0x32>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <getMinrun+0xe>
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getMinrun>:
xor    %ecx,%ecx
cmp    $0x40,%edi
jl     1123 <getMinrun+0x23>
xor    %ecx,%ecx
mov    %edi,%eax
nopl   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
or     %edx,%ecx
shr    %eax
cmp    $0x7f,%edi
mov    %eax,%edi
ja     1110 <getMinrun+0x10>
add    %ecx,%eax
ret
mov    %edi,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @getMinrun(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp sge i32 %5, 64
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, i32* %2
%9 = and i32 %8, 1
%10 = load i32, i32* %3
%11 = or i32 %10, %9
store i32 %11, i32* %3
%12 = load i32, i32* %2
%13 = ashr i32 %12, 1
store i32 %13, i32* %2
br label %4
14: ; preds = %4
%15 = load i32, i32* %2
%16 = load i32, i32* %3
%17 = add nsw i32 %15, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @getMinrun(i32 %0) {
%2 = icmp sgt i32 %0, 63
br i1 %2, label %3, label %10
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = and i32 %5, 1
%7 = or i32 %4, %6
%8 = lshr i32 %5, 1
%9 = icmp ugt i32 %5, 127
br i1 %9, label %3, label %10
10: ; preds = %3, %1
%11 = phi i32 [ %0, %1 ], [ %8, %3 ]
%12 = phi i32 [ 0, %1 ], [ %7, %3 ]
%13 = add nsw i32 %12, %11
ret i32 %13
}
int fib(int n) {
  if (n > 1)
    return fib(n - 1) + fib(n - 2);
  else
    return n;
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    114d <fib+0x3d>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    1153 <fib+0x43>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x2,%edi
jl     1136 <fib+0x26>
xor    %ebp,%ebp
xchg   %ax,%ax
lea    -0x1(%rbx),%edi
call   1030 <fib@plt>
lea    -0x2(%rbx),%ecx
add    %eax,%ebp
cmp    $0x3,%ebx
mov    %ecx,%ebx
ja     1120 <fib+0x10>
jmp    1138 <fib+0x28>
mov    %ebx,%ecx
add    %ecx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 1
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sub nsw i32 %7, 1
%9 = call i32 @fib(i32 %8)
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 2
%12 = call i32 @fib(i32 %11)
%13 = add nsw i32 %9, %12
store i32 %13, i32* %2
br label %16
14: ; preds = %1
%15 = load i32, i32* %3
store i32 %15, i32* %2
br label %16
16: ; preds = %14, %6
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp sgt i32 %0, 1
br i1 %2, label %3, label %11
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ugt i32 %4, 3
br i1 %10, label %3, label %11
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %9, %3 ]
%13 = phi i32 [ %0, %1 ], [ %8, %3 ]
%14 = add nsw i32 %13, %12
ret i32 %14
}
double normalize_output(double x, double lbound, double rbound) {
  double raw_lbound = 0.5;
  double raw_ubound = 1.0;
  double norm_lbound = 0.0;
  double norm_ubound = 1.0;
  return (((x - raw_lbound) * (norm_ubound - norm_lbound)) /
          (raw_ubound - raw_lbound));
}


x86 assembly (clang, -O0):
<normalize_output>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  0xeed(%rip),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  0xed8(%rip),%xmm0
movsd  %xmm0,-0x28(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  0xec3(%rip),%xmm0
movsd  %xmm0,-0x38(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x20(%rbp),%xmm0
movsd  -0x38(%rbp),%xmm1
subsd  -0x30(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  -0x28(%rbp),%xmm1
subsd  -0x20(%rbp),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<normalize_output>:
addsd  0xef8(%rip),%xmm0
addsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @normalize_output(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
%9 = alloca double
%10 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
store double 5.000000e-01, double* %7
store double 1.000000e+00, double* %8
store double 0.000000e+00, double* %9
store double 1.000000e+00, double* %10
%11 = load double, double* %4
%12 = load double, double* %7
%13 = fsub double %11, %12
%14 = load double, double* %10
%15 = load double, double* %9
%16 = fsub double %14, %15
%17 = fmul double %13, %16
%18 = load double, double* %8
%19 = load double, double* %7
%20 = fsub double %18, %19
%21 = fdiv double %17, %20
ret double %21
}

LLVM IR (-O2):
define double @normalize_output(double %0, double %1, double %2) {
%4 = fadd double %0, -5.000000e-01
%5 = fmul double %4, 2.000000e+00
ret double %5
}
double min2d(double x, double y) { return (x < y) ? x : y; }


x86 assembly (clang, -O0):
<min2d>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1131 <min2d+0x31>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    113b <min2d+0x3b>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<min2d>:
minsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @min2d(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp olt double %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load double, double* %3
br label %12
10: ; preds = %2
%11 = load double, double* %4
br label %12
12: ; preds = %10, %8
%13 = phi double [ %9, %8 ], [ %11, %10 ]
ret double %13
}

LLVM IR (-O2):
define double @min2d(double %0, double %1) {
%3 = fcmp olt double %0, %1
%4 = select i1 %3, double %0, double %1
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
void give_shell() { system("/bin/sh"); }


x86 assembly (clang, -O0):
<give_shell>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <system@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<give_shell>:
lea    0xee9(%rip),%rdi
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"/bin/sh\00"
define void @give_shell() {
%1 = call i32 @system(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"/bin/sh\00"
define void @give_shell() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_rwlock_t;

/* Variables and functions */
int EAGAIN;
int pthread_rwlock_always_fail_EAGAIN(pthread_rwlock_t *rwlock) {
  return EAGAIN;
}


x86 assembly (clang, -O0):
<pthread_rwlock_always_fail_EAGAIN>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ec9(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_rwlock_always_fail_EAGAIN>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@EAGAIN = global i32 0
define i32 @pthread_rwlock_always_fail_EAGAIN(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32, i32* @EAGAIN
ret i32 %3
}

LLVM IR (-O2):
@EAGAIN = global i32 0
define i32 @pthread_rwlock_always_fail_EAGAIN(i32* nocapture readnone %0) {
%2 = load i32, i32* @EAGAIN
ret i32 %2
}
int iswhite(char c) { return c == '\r' || c == '\n' || c == ' ' || c == '\t'; }


x86 assembly (clang, -O0):
<iswhite>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0xd,%ecx
mov    %al,-0x2(%rbp)
je     114d <iswhite+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0xa,%ecx
mov    %al,-0x2(%rbp)
je     114d <iswhite+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x2(%rbp)
je     114d <iswhite+0x4d>
movsbl -0x1(%rbp),%eax
cmp    $0x9,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iswhite>:
cmp    $0x20,%dil
ja     1120 <iswhite+0x20>
mov    $0x1,%eax
movzbl %dil,%ecx
movabs $0x100002400,%rdx
bt     %rcx,%rdx
jae    1120 <iswhite+0x20>
ret
xor    %eax,%eax
cmp    $0x9,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @iswhite(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 13
br i1 %5, label %18, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 10
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 32
br i1 %13, label %18, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 9
br label %18
18: ; preds = %14, %10, %6, %1
%19 = phi i1 [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %17, %14 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @iswhite(i8 signext %0) {
switch i8 %0, label %2 [
i8 32, label %5
i8 13, label %5
i8 10, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 9
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
void putc(char c) {
  __asm__("mov $0x01, %%eax" ::"b"(c));
  __asm__("int $0x83");
}


x86 assembly (clang, -O0):
<putc>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %dil,%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%bl
mov    $0x1,%eax
int    $0x83
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<putc>:
push   %rbx
mov    %edi,%ebx
mov    $0x1,%eax
int    $0x83
pop    %rbx
ret

LLVM IR (-O0):
define void @putc(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
ret void
}

LLVM IR (-O2):
define void @putc(i8 signext %0) {
tail call void asm sideeffect "mov $$0x01, %eax", "{bx},~{dirflag},~{fpsr},~{flags}"(i8 %0)
tail call void asm sideeffect "int $$0x83", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Delay(int, long *);
int /*<<< orphan*/ IncrementCursor();
void SpinCursor(short incrementIndex) {
  long dummyLong;
  short i;
  for (i = 0; i < incrementIndex; i++) {
    IncrementCursor();
    Delay(1, &dummyLong);
  }
}


x86 assembly (clang, -O0):
<SpinCursor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movw   $0x0,-0x12(%rbp)
movswl -0x12(%rbp),%eax
movswl -0x2(%rbp),%ecx
cmp    %ecx,%eax
jge    116b <SpinCursor+0x4b>
mov    $0x0,%al
call   1040 <IncrementCursor@plt>
mov    $0x1,%edi
lea    -0x10(%rbp),%rsi
call   1030 <Delay@plt>
mov    -0x12(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0x12(%rbp)
jmp    1135 <SpinCursor+0x15>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SpinCursor>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
test   %bx,%bx
jle    114a <SpinCursor+0x2a>
mov    %rsp,%r14
xchg   %ax,%ax
xor    %eax,%eax
call   1040 <IncrementCursor@plt>
mov    $0x1,%edi
mov    %r14,%rsi
call   1030 <Delay@plt>
add    $0xffff,%bx
jne    1130 <SpinCursor+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @SpinCursor(i16 signext %0) {
%2 = alloca i16
%3 = alloca i64
%4 = alloca i16
store i16 %0, i16* %2
store i16 0, i16* %4
br label %5
5: ; preds = %14, %1
%6 = load i16, i16* %4
%7 = sext i16 %6 to i32
%8 = load i16, i16* %2
%9 = sext i16 %8 to i32
%10 = icmp slt i32 %7, %9
br i1 %10, label %11, label %17
11: ; preds = %5
%12 = call i32 (...) @IncrementCursor()
%13 = call i32 @Delay(i32 1, i64* %3)
br label %14
14: ; preds = %11
%15 = load i16, i16* %4
%16 = add i16 %15, 1
store i16 %16, i16* %4
br label %5
17: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @SpinCursor(i16 signext %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = icmp sgt i16 %0, 0
br i1 %4, label %5, label %11
5: ; preds = %1, %5
%6 = phi i16 [ %9, %5 ], [ 0, %1 ]
%7 = call i32 (...) @IncrementCursor()
%8 = call i32 @Delay(i32 1, i64* %2)
%9 = add nuw nsw i16 %6, 1
%10 = icmp eq i16 %9, %0
br i1 %10, label %11, label %5
11: ; preds = %5, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ reverse(char *, int);
int strlen(char *);
void odwroc(char a[]) {
  int n = strlen(a);
  reverse(a, n);
}


x86 assembly (clang, -O0):
<odwroc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <reverse@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<odwroc>:
push   %rbx
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1030 <reverse@plt>

LLVM IR (-O0):
define void @odwroc(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
store i32 %5, i32* %3
%6 = load i8*, i8** %2
%7 = load i32, i32* %3
%8 = call i32 @reverse(i8* %6, i32 %7)
ret void
}

LLVM IR (-O2):
define void @odwroc(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32 @reverse(i8* %0, i32 %2)
ret void
}
/* Variables and functions */
int YabSockDeInit() { return 0; }


x86 assembly (clang, -O0):
<YabSockDeInit>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<YabSockDeInit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @YabSockDeInit() {
ret i32 0
}

LLVM IR (-O2):
define i32 @YabSockDeInit() {
ret i32 0
}
/* Variables and functions */
int strcmp(char *, char *);
int string_compare(void *str1, void *str2) {
  return strcmp((char *)str1, (char *)str2);
}


x86 assembly (clang, -O0):
<string_compare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_compare>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @string_compare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @string_compare(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
long pcount_r(unsigned long x) {
  if (x == 0)
    return 0;
  else
    return (x & 1) + pcount_r(x >> 1);
}


x86 assembly (clang, -O0):
<pcount_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1134 <pcount_r+0x24>
movq   $0x0,-0x8(%rbp)
jmp    115b <pcount_r+0x4b>
mov    -0x10(%rbp),%rax
and    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
shr    $0x1,%rdi
call   1030 <pcount_r@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcount_r>:
xor    %eax,%eax
test   %rdi,%rdi
je     1124 <pcount_r+0x24>
mov    %rdi,%rcx
nopw   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
add    %rdx,%rax
shr    %rcx
cmp    $0x1,%rdi
mov    %rcx,%rdi
ja     1110 <pcount_r+0x10>
ret

LLVM IR (-O0):
define i64 @pcount_r(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 0, i64* %2
br label %14
7: ; preds = %1
%8 = load i64, i64* %3
%9 = and i64 %8, 1
%10 = load i64, i64* %3
%11 = lshr i64 %10, 1
%12 = call i64 @pcount_r(i64 %11)
%13 = add i64 %9, %12
store i64 %13, i64* %2
br label %14
14: ; preds = %7, %6
%15 = load i64, i64* %2
ret i64 %15
}

LLVM IR (-O2):
define i64 @pcount_r(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %7, %3 ], [ %0, %1 ]
%5 = phi i64 [ %8, %3 ], [ 0, %1 ]
%6 = and i64 %4, 1
%7 = lshr i64 %4, 1
%8 = add i64 %6, %5
%9 = icmp ult i64 %4, 2
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i64 [ 0, %1 ], [ %8, %3 ]
ret i64 %11
}
void sleep(int time) {
  int i, j;
  for (j = 0; j < time * 4; j++)
    for (i = 0; i < 0xFFFF; i++)
      asm("nop");
}


x86 assembly (clang, -O0):
<sleep>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x4(%rbp),%ecx
shl    $0x2,%ecx
cmp    %ecx,%eax
jge    1155 <sleep+0x55>
movl   $0x0,-0x8(%rbp)
cmpl   $0xffff,-0x8(%rbp)
jge    1142 <sleep+0x42>
nop
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <sleep+0x26>
jmp    1147 <sleep+0x47>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <sleep+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleep>:
test   %edi,%edi
jle    113d <sleep+0x3d>
shl    $0x2,%edi
cmp    $0x2,%edi
mov    $0x1,%eax
cmovge %edi,%eax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    $0xffff,%edx
cs nopw 0x0(%rax,%rax,1)
nop
nop
add    $0xffffffff,%edx
jne    1130 <sleep+0x30>
add    $0x1,%ecx
cmp    %eax,%ecx
jne    1120 <sleep+0x20>
ret

LLVM IR (-O0):
define void @sleep(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
br label %5
5: ; preds = %19, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %2
%8 = mul nsw i32 %7, 4
%9 = icmp slt i32 %6, %8
br i1 %9, label %10, label %22
10: ; preds = %5
store i32 0, i32* %3
br label %11
11: ; preds = %15, %10
%12 = load i32, i32* %3
%13 = icmp slt i32 %12, 65535
br i1 %13, label %14, label %18
14: ; preds = %11
br label %15
15: ; preds = %14
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
store i32 %17, i32* %3
br label %11
18: ; preds = %11
br label %19
19: ; preds = %18
%20 = load i32, i32* %4
%21 = add nsw i32 %20, 1
store i32 %21, i32* %4
br label %5
22: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @sleep(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %15
3: ; preds = %1
%4 = shl i32 %0, 2
%5 = call i32 @llvm.smax.i32(i32 %4, i32 1)
br label %6
6: ; preds = %3, %12
%7 = phi i32 [ %13, %12 ], [ 0, %3 ]
br label %8
8: ; preds = %6, %8
%9 = phi i32 [ 0, %6 ], [ %10, %8 ]
tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"()
%10 = add nuw nsw i32 %9, 1
%11 = icmp eq i32 %10, 65535
br i1 %11, label %12, label %8
12: ; preds = %8
%13 = add nuw nsw i32 %7, 1
%14 = icmp eq i32 %13, %5
br i1 %14, label %15, label %6
15: ; preds = %12, %1
ret void
}
int test_imm_3Euint8_mem(unsigned char *val) {
  return ((*val) & (-0x3E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Euint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffffc2,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Euint8_mem>:
testb  $0xc2,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Euint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -62
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_3Euint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -62
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}