xunge/DecIR huggingface dataset:
float haar(float t) {
  return (0 <= t && t < 0.5) ? +1 : (0.5 <= t && t < 1) ? -1 : 0;
}


x86 assembly (clang, -O0):
<haar>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     1142 <haar+0x42>
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xed5(%rip),%xmm0
ucomisd %xmm1,%xmm0
jbe    1142 <haar+0x42>
mov    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1187 <haar+0x87>
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
xor    %eax,%eax
movsd  0xeab(%rip),%xmm1
ucomisd %xmm1,%xmm0
mov    %al,-0x9(%rbp)
jb     1174 <haar+0x74>
movss  0xe9e(%rip),%xmm0
ucomiss -0x4(%rbp),%xmm0
seta   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%dl
xor    %eax,%eax
mov    $0xffffffff,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cvtsi2ss %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<haar>:
movss  0xef8(%rip),%xmm1
ucomiss %xmm1,%xmm0
setae  %al
movss  0xeee(%rip),%xmm2
ucomiss %xmm0,%xmm2
seta   %cl
and    %al,%cl
neg    %cl
movsbl %cl,%eax
cvtsi2ss %eax,%xmm3
xorps  %xmm4,%xmm4
cmpless %xmm0,%xmm4
cmpltss %xmm1,%xmm0
movaps %xmm0,%xmm1
andnps %xmm3,%xmm1
andps  %xmm2,%xmm0
orps   %xmm1,%xmm0
andps  %xmm4,%xmm0
andnps %xmm3,%xmm4
orps   %xmm4,%xmm0
ret

LLVM IR (-O0):
define float @haar(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp ole float 0.000000e+00, %3
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load float, float* %2
%7 = fpext float %6 to double
%8 = fcmp olt double %7, 5.000000e-01
br i1 %8, label %9, label %10
9: ; preds = %5
br label %21
10: ; preds = %5, %1
%11 = load float, float* %2
%12 = fpext float %11 to double
%13 = fcmp ole double 5.000000e-01, %12
br i1 %13, label %14, label %17
14: ; preds = %10
%15 = load float, float* %2
%16 = fcmp olt float %15, 1.000000e+00
br label %17
17: ; preds = %14, %10
%18 = phi i1 [ false, %10 ], [ %16, %14 ]
%19 = zext i1 %18 to i64
%20 = select i1 %18, i32 -1, i32 0
br label %21
21: ; preds = %17, %9
%22 = phi i32 [ 1, %9 ], [ %20, %17 ]
%23 = sitofp i32 %22 to float
ret float %23
}

LLVM IR (-O2):
define float @haar(float %0) {
%2 = fcmp oge float %0, 0.000000e+00
%3 = fcmp olt float %0, 5.000000e-01
%4 = and i1 %2, %3
%5 = fcmp oge float %0, 5.000000e-01
%6 = fcmp olt float %0, 1.000000e+00
%7 = and i1 %5, %6
%8 = sitofp i1 %7 to float
%9 = select i1 %4, float 1.000000e+00, float %8
ret float %9
}
void INT_Excep_SCI1_TXI1(void) {}


x86 assembly (clang, -O0):
<INT_Excep_SCI1_TXI1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_SCI1_TXI1>:
ret

LLVM IR (-O0):
define void @INT_Excep_SCI1_TXI1() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_SCI1_TXI1() {
ret void
}
/* Variables and functions */
scalar_t__ geteuid();
int is_root(void) {
  if (geteuid() == 0)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<is_root>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <geteuid@plt>
cmp    $0x0,%rax
jne    1135 <is_root+0x25>
movl   $0x1,-0x4(%rbp)
jmp    113c <is_root+0x2c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_root>:
push   %rax
xor    %eax,%eax
call   1030 <geteuid@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @is_root() {
%1 = alloca i32
%2 = call i64 (...) @geteuid()
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
store i32 1, i32* %1
br label %6
5: ; preds = %0
store i32 0, i32* %1
br label %6
6: ; preds = %5, %4
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
define i32 @is_root() {
%1 = tail call i64 (...) @geteuid()
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
void AYUVToVURow_C() {}


x86 assembly (clang, -O0):
<AYUVToVURow_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AYUVToVURow_C>:
ret

LLVM IR (-O0):
define void @AYUVToVURow_C() {
ret void
}

LLVM IR (-O2):
define void @AYUVToVURow_C() {
ret void
}
unsigned short int rev_s(unsigned short int r0) {
  return (r0 >> 8) | (r0 << 8);
}


x86 assembly (clang, -O0):
<rev_s>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
sar    $0x8,%eax
movzwl -0x2(%rbp),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rev_s>:
mov    %edi,%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define zeroext i16 @rev_s(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = ashr i32 %4, 8
%6 = load i16, i16* %2
%7 = zext i16 %6 to i32
%8 = shl i32 %7, 8
%9 = or i32 %5, %8
%10 = trunc i32 %9 to i16
ret i16 %10
}

LLVM IR (-O2):
define zeroext i16 @rev_s(i16 zeroext %0) {
%2 = tail call i16 @llvm.bswap.i16(i16 %0)
ret i16 %2
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(int *, int const *, int);
void dmat_icopy(const int n, const int *src, int *dst) {
  memcpy(dst, src, sizeof(int) * n);
}


x86 assembly (clang, -O0):
<dmat_icopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movslq -0x4(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dmat_icopy>:
mov    %rdx,%rax
lea    0x0(,%rdi,4),%edx
mov    %rax,%rdi
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @dmat_icopy(i32 %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %6
%8 = load i32*, i32** %5
%9 = load i32, i32* %4
%10 = sext i32 %9 to i64
%11 = mul i64 4, %10
%12 = trunc i64 %11 to i32
%13 = call i32 @memcpy(i32* %7, i32* %8, i32 %12)
ret void
}

LLVM IR (-O2):
define void @dmat_icopy(i32 %0, i32* %1, i32* %2) {
%4 = shl i32 %0, 2
%5 = tail call i32 @memcpy(i32* %2, i32* %1, i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ show_dec_locator_events(char const *, int /*<<< orphan*/,
                                           int /*<<< orphan*/);
int test_dec_locator_unfiltered(const char *the_title) {
  show_dec_locator_events(the_title, 0, (0));
  return 1;
}


x86 assembly (clang, -O0):
<test_dec_locator_unfiltered>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <show_dec_locator_events@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_dec_locator_unfiltered>:
push   %rax
xor    %esi,%esi
xor    %edx,%edx
call   1030 <show_dec_locator_events@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @test_dec_locator_unfiltered(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @show_dec_locator_events(i8* %3, i32 0, i32 0)
ret i32 1
}

LLVM IR (-O2):
define i32 @test_dec_locator_unfiltered(i8* %0) {
%2 = tail call i32 @show_dec_locator_events(i8* %0, i32 0, i32 0)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isgraph(int);
void t_isgraph_0xde() {
  Assert_real((isgraph(222) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              1115, ("isgraph should be 0 for 0xde"));
}


x86 assembly (clang, -O0):
<t_isgraph_0xde>:
push   %rbp
mov    %rsp,%rbp
mov    $0xde,%edi
call   1040 <isgraph@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x45b,%edx
lea    0xf5b(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0xde>:
push   %rax
mov    $0xde,%edi
call   1040 <isgraph@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x45b,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0xde\00"
define void @t_isgraph_0xde() {
%1 = call i64 @isgraph(i32 222)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1115, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0xde\00"
define void @t_isgraph_0xde() {
%1 = tail call i64 @isgraph(i32 222)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1115, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int length(const char *str) {
  int count = 0;
  while (*str++ != '\0') {
    count++;
  }
  return count;
}


x86 assembly (clang, -O0):
<length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1138 <length+0x38>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <length+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<length>:
cmpb   $0x0,(%rdi)
je     111c <length+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <length+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @length(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %4
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @length(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add nuw nsw i32 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ OPLinkReceiverHandle();
int /*<<< orphan*/ UAVObjLogging(int /*<<< orphan*/);
void OPLinkReceiverLogging() { UAVObjLogging(OPLinkReceiverHandle()); }


x86 assembly (clang, -O0):
<OPLinkReceiverLogging>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <OPLinkReceiverHandle@plt>
mov    %eax,%edi
call   1030 <UAVObjLogging@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<OPLinkReceiverLogging>:
push   %rax
xor    %eax,%eax
call   1040 <OPLinkReceiverHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <UAVObjLogging@plt>

LLVM IR (-O0):
define void @OPLinkReceiverLogging() {
%1 = call i32 (...) @OPLinkReceiverHandle()
%2 = call i32 @UAVObjLogging(i32 %1)
ret void
}

LLVM IR (-O2):
define void @OPLinkReceiverLogging() {
%1 = tail call i32 (...) @OPLinkReceiverHandle()
%2 = tail call i32 @UAVObjLogging(i32 %1)
ret void
}
int fun430() { return 430; }


x86 assembly (clang, -O0):
<fun430>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1ae,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun430>:
mov    $0x1ae,%eax
ret

LLVM IR (-O0):
define i32 @fun430() {
ret i32 430
}

LLVM IR (-O2):
define i32 @fun430() {
ret i32 430
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x52() {
  Assert_real((isspace(82) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              415, ("isspace should be 0 for R"));
}


x86 assembly (clang, -O0):
<t_isspace_0x52>:
push   %rbp
mov    %rsp,%rbp
mov    $0x52,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x19f,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x52>:
push   %rax
mov    $0x52,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x19f,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for R\00"
define void @t_isspace_0x52() {
%1 = call i64 @isspace(i32 82)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 415, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for R\00"
define void @t_isspace_0x52() {
%1 = tail call i64 @isspace(i32 82)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 415, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ usleep(int);
void *pinta_estrella() {
  while (1) {
    printf("*");
    usleep(200);
  }
}


x86 assembly (clang, -O0):
<pinta_estrella>:
push   %rbp
mov    %rsp,%rbp
jmp    1129 <pinta_estrella+0x9>
lea    0xed0(%rip),%rdi
call   1030 <printf@plt>
mov    $0xc8,%edi
call   1040 <usleep@plt>
jmp    1129 <pinta_estrella+0x9>

x86 assembly (clang, -O2):
<pinta_estrella>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x2a,%edi
call   1030 <putchar@plt>
mov    $0xc8,%edi
call   1040 <usleep@plt>
jmp    1130 <pinta_estrella+0x10>

LLVM IR (-O0):
@.str = [2 x i8] c"*\00"
define i8* @pinta_estrella() {
br label %1
1: ; preds = %0, %1
%2 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @usleep(i32 200)
br label %1
}

LLVM IR (-O2):
define noalias i8* @pinta_estrella() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 @putchar(i32 42)
%3 = tail call i32 @usleep(i32 200)
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void __debugfs_atexit(void) { printf("[+] Exiting debugfs\n"); }


x86 assembly (clang, -O0):
<__debugfs_atexit>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__debugfs_atexit>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"[+] Exiting debugfs\0A\00"
define void @__debugfs_atexit() {
%1 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [20 x i8] c"[+] Exiting debugfs\00"
define void @__debugfs_atexit() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_assert(int);
float __VERIFIER_nondet_float();
int main(void) {
  float a = __VERIFIER_nondet_float();
  if (a < 0) {
    return 0;
  }
  __VERIFIER_assert(a == 1);
  return a;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <__VERIFIER_nondet_float@plt>
movss  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    1154 <main+0x34>
movl   $0x0,-0x4(%rbp)
jmp    117e <main+0x5e>
movss  -0x8(%rbp),%xmm0
movss  0xe9f(%rip),%xmm1
ucomiss %xmm1,%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__VERIFIER_assert@plt>
cvttss2si -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <__VERIFIER_nondet_float@plt>
xorps  %xmm1,%xmm1
ucomiss %xmm0,%xmm1
ja     115b <main+0x3b>
movss  0xec2(%rip),%xmm1
cmpeqss %xmm0,%xmm1
movd   %xmm1,%edi
and    $0x1,%edi
movss  %xmm0,0xc(%rsp)
call   1030 <__VERIFIER_assert@plt>
cvttss2si 0xc(%rsp),%ebx
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca float
store i32 0, i32* %1
%3 = call float (...) @__VERIFIER_nondet_float()
store float %3, float* %2
%4 = load float, float* %2
%5 = fcmp olt float %4, 0.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %0
store i32 0, i32* %1
br label %14
7: ; preds = %0
%8 = load float, float* %2
%9 = fcmp oeq float %8, 1.000000e+00
%10 = zext i1 %9 to i32
%11 = call i32 @__VERIFIER_assert(i32 %10)
%12 = load float, float* %2
%13 = fptosi float %12 to i32
store i32 %13, i32* %1
br label %14
14: ; preds = %7, %6
%15 = load i32, i32* %1
ret i32 %15
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call float (...) @__VERIFIER_nondet_float()
%2 = fcmp olt float %1, 0.000000e+00
br i1 %2, label %8, label %3
3: ; preds = %0
%4 = fcmp oeq float %1, 1.000000e+00
%5 = zext i1 %4 to i32
%6 = tail call i32 @__VERIFIER_assert(i32 %5)
%7 = fptosi float %1 to i32
br label %8
8: ; preds = %0, %3
%9 = phi i32 [ %7, %3 ], [ 0, %0 ]
ret i32 %9
}
void BN_set_bit(void) {}


x86 assembly (clang, -O0):
<BN_set_bit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_set_bit>:
ret

LLVM IR (-O0):
define void @BN_set_bit() {
ret void
}

LLVM IR (-O2):
define void @BN_set_bit() {
ret void
}
/* Variables and functions */
double exact_square(float);
int /*<<< orphan*/ printf(char *, double);
int /*<<< orphan*/ scanf(char *, float *);
int main() {
  float num;
  scanf("%f", &num);
  printf("%f\n", exact_square(num));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
movss  -0x8(%rbp),%xmm0
call   1040 <exact_square@plt>
lea    0xea3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
movss  0x4(%rsp),%xmm0
call   1040 <exact_square@plt>
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%f\00"
@.str.1 = [4 x i8] c"%f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca float
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), float* %2)
%4 = load float, float* %2
%5 = call double @exact_square(float %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), double %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%f\00"
@.str.1 = [4 x i8] c"%f\0A\00"
define i32 @main() {
%1 = alloca float
%2 = bitcast float* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), float* %1)
%4 = load float, float* %1
%5 = call double @exact_square(float %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), double %5)
ret i32 0
}
/* Variables and functions */
int f488(int *);
int f489(int *p) { return f488(p); }


x86 assembly (clang, -O0):
<f489>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f488@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f489>:
jmp    1030 <f488@plt>

LLVM IR (-O0):
define i32 @f489(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f488(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f489(i32* %0) {
%2 = tail call i32 @f488(i32* %0)
ret i32 %2
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMRD6_get(void) { return U_WMRCORENONE_get("U_WMRD6"); }


x86 assembly (clang, -O0):
<U_WMRD6_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRD6_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMRD6\00"
define i32 @U_WMRD6_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMRD6\00"
define i32 @U_WMRD6_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ htonl(int /*<<< orphan*/);
uint32_t HtoNL(uint32_t hostlong) { return htonl(hostlong); }


x86 assembly (clang, -O0):
<HtoNL>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <htonl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HtoNL>:
jmp    1030 <htonl@plt>

LLVM IR (-O0):
define i32 @HtoNL(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @htonl(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @HtoNL(i32 %0) {
%2 = tail call i32 @htonl(i32 %0)
ret i32 %2
}
/* Type definitions */
struct timeval {
  int tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
int /*<<< orphan*/ pollkey();
void mydelay_half() {
  static struct timeval curr;
  while (1) {
    gettimeofday(&curr, NULL);
    if (curr.tv_usec >= 500000)
      return;
    pollkey();
  }
}


x86 assembly (clang, -O0):
<mydelay_half>:
push   %rbp
mov    %rsp,%rbp
jmp    1129 <mydelay_half+0x9>
lea    0x2f04(%rip),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1040 <gettimeofday@plt>
cmpl   $0x7a120,0x2ef1(%rip)
jl     114b <mydelay_half+0x2b>
pop    %rbp
ret
mov    $0x0,%al
call   1030 <pollkey@plt>
jmp    1129 <mydelay_half+0x9>

x86 assembly (clang, -O2):
<mydelay_half>:
push   %rbx
lea    0x2f0c(%rip),%rdi
xor    %esi,%esi
call   1040 <gettimeofday@plt>
cmpl   $0x7a11f,0x2efb(%rip)
jg     116d <mydelay_half+0x4d>
lea    0x2ef2(%rip),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
xor    %eax,%eax
call   1030 <pollkey@plt>
mov    %rbx,%rdi
xor    %esi,%esi
call   1040 <gettimeofday@plt>
cmpl   $0x7a11f,0x2ec9(%rip)
jle    1150 <mydelay_half+0x30>
pop    %rbx
ret

LLVM IR (-O0):
%struct.timeval = type { i32 }
@mydelay_half.curr = internal global %struct.timeval zeroinitializer
define void @mydelay_half() {
br label %1
1: ; preds = %0, %6
%2 = call i32 @gettimeofday(%struct.timeval* @mydelay_half.curr, i32* null)
%3 = load i32, i32* getelementptr inbounds (%struct.timeval, %struct.timeval* @mydelay_half.curr, i32 0, i32 0)
%4 = icmp sge i32 %3, 500000
br i1 %4, label %5, label %6
5: ; preds = %1
ret void
6: ; preds = %1
%7 = call i32 (...) @pollkey()
br label %1
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
@mydelay_half.curr = internal global %struct.timeval zeroinitializer
define void @mydelay_half() {
%1 = tail call i32 @gettimeofday(%struct.timeval* @mydelay_half.curr, i32* null)
%2 = load i32, i32* getelementptr inbounds (%struct.timeval, %struct.timeval* @mydelay_half.curr, i64 0, i32 0)
%3 = icmp sgt i32 %2, 499999
br i1 %3, label %4, label %5
4: ; preds = %5, %0
ret void
5: ; preds = %0, %5
%6 = tail call i32 (...) @pollkey()
%7 = tail call i32 @gettimeofday(%struct.timeval* @mydelay_half.curr, i32* null)
%8 = load i32, i32* getelementptr inbounds (%struct.timeval, %struct.timeval* @mydelay_half.curr, i64 0, i32 0)
%9 = icmp sgt i32 %8, 499999
br i1 %9, label %4, label %5
}
/* Variables and functions */
int cvmx_fuse_read_node(int /*<<< orphan*/, int);
int cvmx_fuse_read(int fuse) { return cvmx_fuse_read_node(0, fuse); }


x86 assembly (clang, -O0):
<cvmx_fuse_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
xor    %edi,%edi
call   1030 <cvmx_fuse_read_node@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvmx_fuse_read>:
mov    %edi,%esi
xor    %edi,%edi
jmp    1030 <cvmx_fuse_read_node@plt>

LLVM IR (-O0):
define i32 @cvmx_fuse_read(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @cvmx_fuse_read_node(i32 0, i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @cvmx_fuse_read(i32 %0) {
%2 = tail call i32 @cvmx_fuse_read_node(i32 0, i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ do_work();
int /*<<< orphan*/ grab_lock();
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ ungrab_lock();
void *request_processor(void *dummy) {
  printf("[*] Request processor initialized.\n");
  while (1) {
    grab_lock();
    do_work();
    ungrab_lock();
  }
  return NULL;
}


x86 assembly (clang, -O0):
<request_processor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xead(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1050 <grab_lock@plt>
mov    $0x0,%al
call   1040 <do_work@plt>
mov    $0x0,%al
call   1060 <ungrab_lock@plt>
jmp    1158 <request_processor+0x18>

x86 assembly (clang, -O2):
<request_processor>:
push   %rax
lea    0xeb8(%rip),%rdi
call   1030 <puts@plt>
nopl   (%rax)
xor    %eax,%eax
call   1050 <grab_lock@plt>
xor    %eax,%eax
call   1040 <do_work@plt>
xor    %eax,%eax
call   1060 <ungrab_lock@plt>
jmp    1150 <request_processor+0x10>

LLVM IR (-O0):
@.str = [36 x i8] c"[*] Request processor initialized.\0A\00"
define i8* @request_processor(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
br label %4
4: ; preds = %1, %4
%5 = call i32 (...) @grab_lock()
%6 = call i32 (...) @do_work()
%7 = call i32 (...) @ungrab_lock()
br label %4
}

LLVM IR (-O2):
@str = [35 x i8] c"[*] Request processor initialized.\00"
define noalias i8* @request_processor(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
br label %3
3: ; preds = %1, %3
%4 = tail call i32 (...) @grab_lock()
%5 = tail call i32 (...) @do_work()
%6 = tail call i32 (...) @ungrab_lock()
br label %3
}
/* Variables and functions */
int /*<<< orphan*/ DoSomeWork(long);
void Recursive(int num, long thread) {
  if (num == 5) {
    DoSomeWork(thread);
    return;
  }
  Recursive(num + 1, thread);
}


x86 assembly (clang, -O0):
<Recursive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x5,-0x4(%rbp)
jne    1147 <Recursive+0x27>
mov    -0x10(%rbp),%rdi
call   1030 <DoSomeWork@plt>
jmp    1156 <Recursive+0x36>
mov    -0x4(%rbp),%edi
add    $0x1,%edi
mov    -0x10(%rbp),%rsi
call   1040 <Recursive@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Recursive>:
mov    %rsi,%rdi
jmp    1030 <DoSomeWork@plt>

LLVM IR (-O0):
define void @Recursive(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 5
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i64, i64* %4
%9 = call i32 @DoSomeWork(i64 %8)
br label %14
10: ; preds = %2
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
%13 = load i64, i64* %4
br label %14
14: ; preds = %10, %7
ret void
}

LLVM IR (-O2):
define void @Recursive(i32 %0, i64 %1) {
%3 = tail call i32 @DoSomeWork(i64 %1)
ret void
}
int radeon_kfd_resume(struct radeon_device *rdev) { return 0; }


x86 assembly (clang, -O0):
<radeon_kfd_resume>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<radeon_kfd_resume>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.radeon_device = type opaque
define i32 @radeon_kfd_resume(%struct.radeon_device* %0) {
%2 = alloca %struct.radeon_device*
store %struct.radeon_device* %0, %struct.radeon_device** %2
ret i32 0
}

LLVM IR (-O2):
%struct.radeon_device = type opaque
define i32 @radeon_kfd_resume(%struct.radeon_device* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Hola mundo\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"Hola mundo\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [11 x i8] c"Hola mundo\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int isunicode() {
  extern int tt_unicode;
  return (0);
}


x86 assembly (clang, -O0):
<isunicode>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isunicode>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isunicode() {
ret i32 0
}

LLVM IR (-O2):
define i32 @isunicode() {
ret i32 0
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void util_setbit(uint8_t *b, uint32_t i) {
  b[i / 8] = (uint8_t)(b[i / 8] | (uint8_t)(1 << (i % 8)));
}


x86 assembly (clang, -O0):
<util_setbit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x28(%rbp),%rax
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x20(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    -0x20(%rbp),%eax
mov    %edx,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    -0x1c(%rbp),%edx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_setbit>:
mov    %esi,%ecx
lea    0x7(%rcx),%eax
test   %esi,%esi
cmovns %esi,%eax
sar    $0x3,%eax
and    $0x7,%cl
mov    $0x1,%edx
shl    %cl,%edx
cltq
or     %edx,(%rdi,%rax,4)
ret

LLVM IR (-O0):
define void @util_setbit(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = sdiv i32 %6, 8
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %5, i64 %8
%10 = load i32, i32* %9
%11 = load i32, i32* %4
%12 = srem i32 %11, 8
%13 = shl i32 1, %12
%14 = or i32 %10, %13
%15 = load i32*, i32** %3
%16 = load i32, i32* %4
%17 = sdiv i32 %16, 8
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i32, i32* %15, i64 %18
store i32 %14, i32* %19
ret void
}

LLVM IR (-O2):
define void @util_setbit(i32* nocapture %0, i32 %1) {
%3 = sdiv i32 %1, 8
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = and i32 %1, 7
%8 = shl nuw nsw i32 1, %7
%9 = or i32 %6, %8
store i32 %9, i32* %5
ret void
}
/* Type definitions */
struct sahn_config_t {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct sahn_config_t *);
__attribute__((visibility("default"))) int
sahn_config_destroy(struct sahn_config_t *config) {
  free(config);
}


x86 assembly (clang, -O0):
<sahn_config_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sahn_config_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.sahn_config_t = type { i32 }
define i32 @sahn_config_destroy(%struct.sahn_config_t* %0) {
%2 = alloca i32
%3 = alloca %struct.sahn_config_t*
store %struct.sahn_config_t* %0, %struct.sahn_config_t** %3
%4 = load %struct.sahn_config_t*, %struct.sahn_config_t** %3
%5 = call i32 @free(%struct.sahn_config_t* %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
%struct.sahn_config_t = type { i32 }
define i32 @sahn_config_destroy(%struct.sahn_config_t* nocapture %0) {
%2 = tail call i32 @free(%struct.sahn_config_t* %0)
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *fopen(char const *, char const *);
FILE *setmntent(const char *filename, const char *type) {
  return fopen(filename, type);
}


x86 assembly (clang, -O0):
<setmntent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <fopen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setmntent>:
jmp    1030 <fopen@plt>

LLVM IR (-O0):
define i32* @setmntent(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32* @fopen(i8* %5, i8* %6)
ret i32* %7
}

LLVM IR (-O2):
define noalias i32* @setmntent(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32* @fopen(i8* %0, i8* %1)
ret i32* %3
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void print_usage(void) {
  fprintf(stderr,
          "Usage: gpio-event-mon [options]...\n"
          "Listen to events on GPIO lines, 0->1 1->0\n"
          "  -n <name>  Listen on GPIOs on a named device (must be stated)\n"
          "  -o <n>     Offset to monitor\n"
          "  -d         Set line as open drain\n"
          "  -s         Set line as open source\n"
          "  -r         Listen for rising edges\n"
          "  -f         Listen for falling edges\n"
          " [-c <n>]    Do <n> loops (optional, infinite loop if not stated)\n"
          "  -?         This helptext\n"
          "\n"
          "Example:\n"
          "gpio-event-mon -n gpiochip0 -o 4 -r -f\n");
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [463 x i8] c"Usage: gpio-event-mon [options]...\0AListen to events on GPIO lines, 0->1 1->0\0A -n <name> Listen on GPIOs on a named device (must be stated)\0A -o <n> Offset to monitor\0A -d Set line as open drain\0A -s Set line as open source\0A -r Listen for rising edges\0A -f Listen for falling edges\0A [-c <n>] Do <n> loops (optional, infinite loop if not stated)\0A -? This helptext\0A\0AExample:\0Agpio-event-mon -n gpiochip0 -o 4 -r -f\0A\00"
define void @print_usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([463 x i8], [463 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [463 x i8] c"Usage: gpio-event-mon [options]...\0AListen to events on GPIO lines, 0->1 1->0\0A -n <name> Listen on GPIOs on a named device (must be stated)\0A -o <n> Offset to monitor\0A -d Set line as open drain\0A -s Set line as open source\0A -r Listen for rising edges\0A -f Listen for falling edges\0A [-c <n>] Do <n> loops (optional, infinite loop if not stated)\0A -? This helptext\0A\0AExample:\0Agpio-event-mon -n gpiochip0 -o 4 -r -f\0A\00"
define void @print_usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([463 x i8], [463 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ handle_URG(int /*<<< orphan*/);
int gen_URG(void) {
  handle_URG(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_URG>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_URG@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_URG>:
push   %rax
xor    %edi,%edi
call   1030 <handle_URG@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_URG() {
%1 = call i32 @handle_URG(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_URG() {
%1 = tail call i32 @handle_URG(i32 0)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char *);
addaline(char *thefilename, char *thetext) {
  FILE *fp;
  fp = fopen(thefilename, "a+");
  fprintf(fp, "%s\n", thetext);
  fclose(fp);
}


x86 assembly (clang, -O0):
<addaline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xeb5(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rdx
lea    0xea0(%rip),%rsi
call   1040 <fprintf@plt>
mov    -0x20(%rbp),%rdi
call   1030 <fclose@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<addaline>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
lea    0xec2(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,%rbx
lea    0xeb6(%rip),%rsi
mov    %rax,%rdi
mov    %r14,%rdx
call   1040 <fprintf@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fclose@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"a+\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @addaline(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %4
%8 = call i32* @fopen(i8* %7, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
store i32* %8, i32** %6
%9 = load i32*, i32** %6
%10 = load i8*, i8** %5
%11 = call i32 @fprintf(i32* %9, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %10)
%12 = load i32*, i32** %6
%13 = call i32 @fclose(i32* %12)
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
@.str = [3 x i8] c"a+\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @addaline(i8* nocapture %0, i8* %1) {
%3 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %1)
%5 = tail call i32 @fclose(i32* %3)
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ recv(int, void *, size_t, int);
ssize_t txc_libc_recv(int s, void *buf, size_t len, int flags) {
  return recv(s, buf, len, flags);
}


x86 assembly (clang, -O0):
<txc_libc_recv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <recv@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<txc_libc_recv>:
jmp    1030 <recv@plt>

LLVM IR (-O0):
define i32 @txc_libc_recv(i32 %0, i8* %1, i64 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %7
%12 = load i32, i32* %8
%13 = call i32 @recv(i32 %9, i8* %10, i64 %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @txc_libc_recv(i32 %0, i8* %1, i64 %2, i32 %3) {
%5 = tail call i32 @recv(i32 %0, i8* %1, i64 %2, i32 %3)
ret i32 %5
}
bitwise_or(char c, char d) { return c | d; }


x86 assembly (clang, -O0):
<bitwise_or>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%eax
movsbl -0x2(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitwise_or>:
mov    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @bitwise_or(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
%7 = load i8, i8* %4
%8 = sext i8 %7 to i32
%9 = or i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @bitwise_or(i8 signext %0, i8 signext %1) {
%3 = or i8 %1, %0
%4 = sext i8 %3 to i32
ret i32 %4
}
int execute_gtty() { return 0; }


x86 assembly (clang, -O0):
<execute_gtty>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_gtty>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_gtty() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_gtty() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
int usage(const char *pname, int exit) {
  printf("Usage: %s FILE [15A [24B [...]]]\n"
         "\n"
         "Register a BUY action to file FILE.\n",
         pname);
  return exit;
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    %esi,%ebx
mov    %rdi,%rsi
lea    0xee3(%rip),%rdi
call   1030 <printf@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [71 x i8] c"Usage: %s FILE [15A [24B [...]]]\0A\0ARegister a BUY action to file FILE.\0A\00"
define i32 @usage(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @printf(i8* getelementptr inbounds ([71 x i8], [71 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = load i32, i32* %4
ret i32 %7
}

LLVM IR (-O2):
@.str = [71 x i8] c"Usage: %s FILE [15A [24B [...]]]\0A\0ARegister a BUY action to file FILE.\0A\00"
define i32 @usage(i8* %0, i32 returned %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([71 x i8], [71 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ emit_u(int);
void emit_push(unsigned ra, unsigned cond) {
  emit_u(0xC4000EE0U | (ra << 12) | cond);
}


x86 assembly (clang, -O0):
<emit_push>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
shl    $0xc,%edi
or     $0xc4000ee0,%edi
or     -0x8(%rbp),%edi
call   1030 <emit_u@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_push>:
shl    $0xc,%edi
or     %esi,%edi
or     $0xc4000ee0,%edi
jmp    1030 <emit_u@plt>

LLVM IR (-O0):
define void @emit_push(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = shl i32 %5, 12
%7 = or i32 -1006629152, %6
%8 = load i32, i32* %4
%9 = or i32 %7, %8
%10 = call i32 @emit_u(i32 %9)
ret void
}

LLVM IR (-O2):
define void @emit_push(i32 %0, i32 %1) {
%3 = shl i32 %0, 12
%4 = or i32 %3, %1
%5 = or i32 %4, -1006629152
%6 = tail call i32 @emit_u(i32 %5)
ret void
}
/* Type definitions */
typedef scalar_t__ clock_t;

/* Variables and functions */
scalar_t__ CLOCKS_PER_SEC;
scalar_t__ get_clocks(scalar_t__);
float lprofC_get_seconds(clock_t time_marker) {
  clock_t clocks;
  clocks = get_clocks(time_marker);
  return (float)clocks / (float)CLOCKS_PER_SEC;
}


x86 assembly (clang, -O0):
<lprofC_get_seconds>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <get_clocks@plt>
mov    %rax,-0x10(%rbp)
cvtsi2ssq -0x10(%rbp),%xmm0
mov    0x2eb2(%rip),%rax
cvtsi2ssq (%rax),%xmm1
divss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lprofC_get_seconds>:
push   %rax
call   1030 <get_clocks@plt>
cvtsi2ss %rax,%xmm0
mov    0x2ec6(%rip),%rax
cvtsi2ssq (%rax),%xmm1
divss  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@CLOCKS_PER_SEC = global i64 0
define float @lprofC_get_seconds(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i64 @get_clocks(i64 %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = sitofp i64 %6 to float
%8 = load i64, i64* @CLOCKS_PER_SEC
%9 = sitofp i64 %8 to float
%10 = fdiv float %7, %9
ret float %10
}

LLVM IR (-O2):
@CLOCKS_PER_SEC = global i64 0
define float @lprofC_get_seconds(i64 %0) {
%2 = tail call i64 @get_clocks(i64 %0)
%3 = sitofp i64 %2 to float
%4 = load i64, i64* @CLOCKS_PER_SEC
%5 = sitofp i64 %4 to float
%6 = fdiv float %3, %5
ret float %6
}
/* Variables and functions */
int /*<<< orphan*/ print_letters(char *);
void print_arguments(int argc, char *argv[]) {
  int i = 0;
  for (i = 0; i < argc; i++) {
    print_letters(argv[i]);
  }
}


x86 assembly (clang, -O0):
<print_arguments>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1158 <print_arguments+0x48>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <print_letters@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112d <print_arguments+0x1d>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_arguments>:
push   %r15
push   %r14
push   %rbx
test   %edi,%edi
jle    1142 <print_arguments+0x32>
mov    %rsi,%r14
mov    %edi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <print_letters@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <print_arguments+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @print_arguments(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
store i32 0, i32* %5
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8**, i8*** %4
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8*, i8** %11, i64 %13
%15 = load i8*, i8** %14
%16 = call i32 @print_letters(i8* %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @print_arguments(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i8*, i8** %1, i64 %7
%9 = load i8*, i8** %8
%10 = tail call i32 @print_letters(i8* %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void __attribute__((weak)) function1(void) {
  printf("libtest1: I am weak function1!\n");
}


x86 assembly (clang, -O0):
<function1>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<function1>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"libtest1: I am weak function1!\0A\00"
define weak void @function1() {
%1 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [31 x i8] c"libtest1: I am weak function1!\00"
define weak void @function1() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
ret void
}