xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ free(char *);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ sprintfGitInfo(char **);
void printGitInfo(void) {
  char *gitInfo = NULL;
  sprintfGitInfo(&gitInfo);
  printf("%s\n", gitInfo);
  if (gitInfo) {
    free(gitInfo);
    gitInfo = NULL;
  }
}


x86 assembly (clang, -O0):
<printGitInfo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
call   1050 <sprintfGitInfo@plt>
mov    -0x8(%rbp),%rsi
lea    0xeac(%rip),%rdi
call   1040 <printf@plt>
cmpq   $0x0,-0x8(%rbp)
je     1175 <printGitInfo+0x45>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
movq   $0x0,-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printGitInfo>:
push   %rax
movq   $0x0,(%rsp)
mov    %rsp,%rdi
call   1050 <sprintfGitInfo@plt>
mov    (%rsp),%rsi
lea    0xeb4(%rip),%rdi
call   1040 <printf@plt>
mov    (%rsp),%rdi
test   %rdi,%rdi
je     115f <printGitInfo+0x2f>
call   1030 <free@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @printGitInfo() {
%1 = alloca i8*
store i8* null, i8** %1
%2 = call i32 @sprintfGitInfo(i8** %1)
%3 = load i8*, i8** %1
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = load i8*, i8** %1
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %10
7: ; preds = %0
%8 = load i8*, i8** %1
%9 = call i32 @free(i8* %8)
store i8* null, i8** %1
br label %10
10: ; preds = %7, %0
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @printGitInfo() {
%1 = alloca i8*
%2 = bitcast i8** %1 to i8*
store i8* null, i8** %1
%3 = call i32 @sprintfGitInfo(i8** %1)
%4 = load i8*, i8** %1
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i8*, i8** %1
%7 = icmp eq i8* %6, null
br i1 %7, label %10, label %8
8: ; preds = %0
%9 = call i32 @free(i8* %6)
br label %10
10: ; preds = %8, %0
ret void
}
int test_imm_92int32_mem(int *val) {
  return ((*val) & (0x92 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_92int32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x92,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_92int32_mem>:
testb  $0x92,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_92int32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 146
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_92int32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 146
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ copyWordEndianString(unsigned char *, unsigned char *, int);
int /*<<< orphan*/ stringTrimSpace(char *);
void readModeName(char *name, unsigned short *data) {
  copyWordEndianString((unsigned char *)name, (unsigned char *)&data[27], 20);
  stringTrimSpace(name);
}


x86 assembly (clang, -O0):
<readModeName>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
add    $0x36,%rsi
mov    $0x14,%edx
call   1030 <copyWordEndianString@plt>
mov    -0x8(%rbp),%rdi
call   1040 <stringTrimSpace@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readModeName>:
push   %rbx
mov    %rdi,%rbx
add    $0x36,%rsi
mov    $0x14,%edx
call   1030 <copyWordEndianString@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <stringTrimSpace@plt>

LLVM IR (-O0):
define void @readModeName(i8* %0, i16* %1) {
%3 = alloca i8*
%4 = alloca i16*
store i8* %0, i8** %3
store i16* %1, i16** %4
%5 = load i8*, i8** %3
%6 = load i16*, i16** %4
%7 = getelementptr inbounds i16, i16* %6, i64 27
%8 = bitcast i16* %7 to i8*
%9 = call i32 @copyWordEndianString(i8* %5, i8* %8, i32 20)
%10 = load i8*, i8** %3
%11 = call i32 @stringTrimSpace(i8* %10)
ret void
}

LLVM IR (-O2):
define void @readModeName(i8* %0, i16* %1) {
%3 = getelementptr inbounds i16, i16* %1, i64 27
%4 = bitcast i16* %3 to i8*
%5 = tail call i32 @copyWordEndianString(i8* %0, i8* %4, i32 20)
%6 = tail call i32 @stringTrimSpace(i8* %0)
ret void
}
double pathcon_nm5_sq(double x) { return x * x; }


x86 assembly (clang, -O0):
<pathcon_nm5_sq>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm5_sq>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @pathcon_nm5_sq(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @pathcon_nm5_sq(double %0) {
%2 = fmul double %0, %0
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ main_bad_phrase();
main(int argc, char **argv) {
  main_bad_phrase();
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <main_bad_phrase@plt>
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <main_bad_phrase@plt>
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @main_bad_phrase()
%7 = load i32, i32* @EXIT_SUCCESS
%8 = call i32 @exit(i32 %7)
unreachable
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @main_bad_phrase()
%4 = load i32, i32* @EXIT_SUCCESS
%5 = tail call i32 @exit(i32 %4)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void on_sigterm(int sig) { exit(0); }


x86 assembly (clang, -O0):
<on_sigterm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<on_sigterm>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @on_sigterm(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @on_sigterm(i32 %0) {
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
int write(int, int *, int);
int simuart_putraw(int ch) {
  ssize_t nwritten;
  nwritten = write(1, &ch, 1);
  if (nwritten != 1) {
    return -1;
  }
  return ch;
}


x86 assembly (clang, -O0):
<simuart_putraw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x1,%edx
lea    -0x8(%rbp),%rsi
mov    %edx,%edi
call   1030 <write@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
je     1144 <simuart_putraw+0x34>
movl   $0xffffffff,-0x4(%rbp)
jmp    114a <simuart_putraw+0x3a>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<simuart_putraw>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
mov    %edi,0xc(%rsp)
lea    0xc(%rsp),%rsi
mov    $0x1,%edi
mov    $0x1,%edx
call   1030 <write@plt>
cmp    $0x1,%eax
mov    $0xffffffff,%eax
cmove  %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @simuart_putraw(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = call i32 @write(i32 1, i32* %3, i32 1)
store i32 %5, i32* %4
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 -1, i32* %2
br label %11
9: ; preds = %1
%10 = load i32, i32* %3
store i32 %10, i32* %2
br label %11
11: ; preds = %9, %8
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @simuart_putraw(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @write(i32 1, i32* %2, i32 1)
%4 = icmp eq i32 %3, 1
%5 = select i1 %4, i32 %0, i32 -1
ret i32 %5
}
/* Variables and functions */
short shft_h(short *, short *);
short intr_wrap_558(short p1, short p2) { return shft_h(&p1, &p2); }


x86 assembly (clang, -O0):
<intr_wrap_558>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
lea    -0x2(%rbp),%rdi
lea    -0x4(%rbp),%rsi
call   1030 <shft_h@plt>
cwtl
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intr_wrap_558>:
push   %rax
mov    %di,0x6(%rsp)
mov    %si,0x4(%rsp)
lea    0x6(%rsp),%rdi
lea    0x4(%rsp),%rsi
call   1030 <shft_h@plt>
pop    %rcx
ret

LLVM IR (-O0):
define signext i16 @intr_wrap_558(i16 signext %0, i16 signext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = call signext i16 @shft_h(i16* %3, i16* %4)
ret i16 %5
}

LLVM IR (-O2):
define signext i16 @intr_wrap_558(i16 signext %0, i16 signext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = call signext i16 @shft_h(i16* %3, i16* %4)
ret i16 %5
}
/* Variables and functions */
int random();
int myrandom(void) {
  int number = 0;
  while ((number < 1) || (number > 99999)) {
    number = random();
  }
  if (number < 9999) {
    number = 0;
  }
  number = (number / 10000);
  return number;
}


x86 assembly (clang, -O0):
<myrandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x1,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     113b <myrandom+0x2b>
cmpl   $0x1869f,-0x4(%rbp)
setg   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
test   $0x1,%al
jne    114b <myrandom+0x3b>
jmp    115a <myrandom+0x4a>
mov    $0x0,%al
call   1030 <random@plt>
mov    %eax,-0x4(%rbp)
jmp    111f <myrandom+0xf>
cmpl   $0x270f,-0x4(%rbp)
jge    116e <myrandom+0x5e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2710,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<myrandom>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <random@plt>
mov    %eax,%ecx
lea    -0x186a0(%rcx),%eax
cmp    $0xfffe7961,%eax
jb     1120 <myrandom+0x10>
xor    %eax,%eax
cmp    $0x270f,%ecx
jb     114f <myrandom+0x3f>
mov    %ecx,%ecx
mov    $0xd1b71759,%eax
imul   %rcx,%rax
shr    $0x2d,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @myrandom() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %10, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 1
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = load i32, i32* %1
%7 = icmp sgt i32 %6, 99999
br label %8
8: ; preds = %5, %2
%9 = phi i1 [ true, %2 ], [ %7, %5 ]
br i1 %9, label %10, label %12
10: ; preds = %8
%11 = call i32 (...) @random()
store i32 %11, i32* %1
br label %2
12: ; preds = %8
%13 = load i32, i32* %1
%14 = icmp slt i32 %13, 9999
br i1 %14, label %15, label %16
15: ; preds = %12
store i32 0, i32* %1
br label %16
16: ; preds = %15, %12
%17 = load i32, i32* %1
%18 = sdiv i32 %17, 10000
store i32 %18, i32* %1
%19 = load i32, i32* %1
ret i32 %19
}

LLVM IR (-O2):
define i32 @myrandom() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 (...) @random()
%3 = add i32 %2, -100000
%4 = icmp ult i32 %3, -99999
br i1 %4, label %1, label %5
5: ; preds = %1
%6 = icmp ult i32 %2, 9999
%7 = udiv i32 %2, 10000
%8 = select i1 %6, i32 0, i32 %7
ret i32 %8
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t to_bcd(uint8_t n) { return ((n / 10) << 4) + (n % 10); }


x86 assembly (clang, -O0):
<to_bcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
shl    $0x4,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x8(%rbp),%eax
add    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<to_bcd>:
movslq %edi,%rax
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
add    %edx,%ecx
mov    %ecx,%edx
shl    $0x4,%edx
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %ecx,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @to_bcd(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, 10
%5 = shl i32 %4, 4
%6 = load i32, i32* %2
%7 = srem i32 %6, 10
%8 = add nsw i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @to_bcd(i32 %0) {
%2 = sdiv i32 %0, 10
%3 = shl i32 %2, 4
%4 = srem i32 %0, 10
%5 = add nsw i32 %3, %4
ret i32 %5
}
double r3dot(double *u, double *v) {
  return (u[0] * v[0] + u[1] * v[1] + u[2] * v[2]);
}


x86 assembly (clang, -O0):
<r3dot>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x10(%rbp),%rax
mulsd  0x8(%rax),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x10(%rbp),%rax
movsd  0x10(%rax),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<r3dot>:
movsd  0x8(%rdi),%xmm0
mulsd  0x8(%rsi),%xmm0
movsd  (%rdi),%xmm1
mulsd  (%rsi),%xmm1
addsd  %xmm0,%xmm1
movsd  0x10(%rdi),%xmm0
mulsd  0x10(%rsi),%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @r3dot(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = getelementptr inbounds double, double* %5, i64 0
%7 = load double, double* %6
%8 = load double*, double** %4
%9 = getelementptr inbounds double, double* %8, i64 0
%10 = load double, double* %9
%11 = load double*, double** %3
%12 = getelementptr inbounds double, double* %11, i64 1
%13 = load double, double* %12
%14 = load double*, double** %4
%15 = getelementptr inbounds double, double* %14, i64 1
%16 = load double, double* %15
%17 = fmul double %13, %16
%18 = call double @llvm.fmuladd.f64(double %7, double %10, double %17)
%19 = load double*, double** %3
%20 = getelementptr inbounds double, double* %19, i64 2
%21 = load double, double* %20
%22 = load double*, double** %4
%23 = getelementptr inbounds double, double* %22, i64 2
%24 = load double, double* %23
%25 = call double @llvm.fmuladd.f64(double %21, double %24, double %18)
ret double %25
}

LLVM IR (-O2):
define double @r3dot(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %0
%4 = load double, double* %1
%5 = getelementptr inbounds double, double* %0, i64 1
%6 = load double, double* %5
%7 = getelementptr inbounds double, double* %1, i64 1
%8 = load double, double* %7
%9 = fmul double %6, %8
%10 = tail call double @llvm.fmuladd.f64(double %3, double %4, double %9)
%11 = getelementptr inbounds double, double* %0, i64 2
%12 = load double, double* %11
%13 = getelementptr inbounds double, double* %1, i64 2
%14 = load double, double* %13
%15 = tail call double @llvm.fmuladd.f64(double %12, double %14, double %10)
ret double %15
}
void noaction2(char *file, char *line) {
  file = file;
  line = line;
}


x86 assembly (clang, -O0):
<noaction2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<noaction2>:
ret

LLVM IR (-O0):
define void @noaction2(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
store i8* %5, i8** %3
%6 = load i8*, i8** %4
store i8* %6, i8** %4
ret void
}

LLVM IR (-O2):
define void @noaction2(i8* nocapture %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIGKILL;
int /*<<< orphan*/ signal(int /*<<< orphan*/, void (*)(int));
void g_signal_kill(void (*func)(int)) { signal(SIGKILL, func); }


x86 assembly (clang, -O0):
<g_signal_kill>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <signal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_signal_kill>:
mov    %rdi,%rsi
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
jmp    1030 <signal@plt>

LLVM IR (-O0):
@SIGKILL = global i32 0
define void @g_signal_kill(void (i32)* %0) {
%2 = alloca void (i32)*
store void (i32)* %0, void (i32)** %2
%3 = load i32, i32* @SIGKILL
%4 = load void (i32)*, void (i32)** %2
%5 = call i32 @signal(i32 %3, void (i32)* %4)
ret void
}

LLVM IR (-O2):
@SIGKILL = global i32 0
define void @g_signal_kill(void (i32)* %0) {
%2 = load i32, i32* @SIGKILL
%3 = tail call i32 @signal(i32 %2, void (i32)* %0)
ret void
}
void swapd(double *a, double *b) {
  double tmp = *a;
  *a = *b;
  *b = tmp;
}


x86 assembly (clang, -O0):
<swapd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
movsd  -0x18(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swapd>:
movsd  (%rdi),%xmm0
movsd  (%rsi),%xmm1
movsd  %xmm1,(%rdi)
movsd  %xmm0,(%rsi)
ret

LLVM IR (-O0):
define void @swapd(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
%5 = alloca double
store double* %0, double** %3
store double* %1, double** %4
%6 = load double*, double** %3
%7 = load double, double* %6
store double %7, double* %5
%8 = load double*, double** %4
%9 = load double, double* %8
%10 = load double*, double** %3
store double %9, double* %10
%11 = load double, double* %5
%12 = load double*, double** %4
store double %11, double* %12
ret void
}

LLVM IR (-O2):
define void @swapd(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %0
%4 = load double, double* %1
store double %4, double* %0
store double %3, double* %1
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t md5_G(uint32_t x, uint32_t y, uint32_t z) {
  return ((x & z) | ((~z) & y));
}


x86 assembly (clang, -O0):
<md5_G>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<md5_G>:
mov    %edi,%eax
xor    %esi,%eax
and    %edx,%eax
xor    %esi,%eax
ret

LLVM IR (-O0):
define i32 @md5_G(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %6
%9 = and i32 %7, %8
%10 = load i32, i32* %6
%11 = xor i32 %10, -1
%12 = load i32, i32* %5
%13 = and i32 %11, %12
%14 = or i32 %9, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @md5_G(i32 %0, i32 %1, i32 %2) {
%4 = and i32 %2, %0
%5 = xor i32 %2, -1
%6 = and i32 %5, %1
%7 = or i32 %4, %6
ret i32 %7
}
int fitness_class(float ratio) {
  if (ratio < -0.5)
    return 0;
  if (ratio < 0.5)
    return 1;
  if (ratio < 1)
    return 2;
  return 3;
}


x86 assembly (clang, -O0):
<fitness_class>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xee6(%rip),%xmm0
ucomisd %xmm1,%xmm0
jbe    1130 <fitness_class+0x30>
movl   $0x0,-0x4(%rbp)
jmp    117c <fitness_class+0x7c>
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xec7(%rip),%xmm0
ucomisd %xmm1,%xmm0
jbe    1157 <fitness_class+0x57>
movl   $0x1,-0x4(%rbp)
jmp    117c <fitness_class+0x7c>
movss  0xeb1(%rip),%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    1175 <fitness_class+0x75>
movl   $0x2,-0x4(%rbp)
jmp    117c <fitness_class+0x7c>
movl   $0x3,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fitness_class>:
xor    %eax,%eax
movss  0xef6(%rip),%xmm1
ucomiss %xmm0,%xmm1
ja     1134 <fitness_class+0x34>
mov    $0x1,%eax
movss  0xee8(%rip),%xmm1
ucomiss %xmm0,%xmm1
ja     1134 <fitness_class+0x34>
movss  0xedf(%rip),%xmm1
xor    %eax,%eax
ucomiss %xmm0,%xmm1
seta   %al
xor    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @fitness_class(float %0) {
%2 = alloca i32
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = fpext float %4 to double
%6 = fcmp olt double %5, -5.000000e-01
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %18
8: ; preds = %1
%9 = load float, float* %3
%10 = fpext float %9 to double
%11 = fcmp olt double %10, 5.000000e-01
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 1, i32* %2
br label %18
13: ; preds = %8
%14 = load float, float* %3
%15 = fcmp olt float %14, 1.000000e+00
br i1 %15, label %16, label %17
16: ; preds = %13
store i32 2, i32* %2
br label %18
17: ; preds = %13
store i32 3, i32* %2
br label %18
18: ; preds = %17, %16, %12, %7
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @fitness_class(float %0) {
%2 = fcmp olt float %0, -5.000000e-01
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = fcmp olt float %0, 5.000000e-01
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = fcmp olt float %0, 1.000000e+00
%7 = select i1 %6, i32 2, i32 3
br label %8
8: ; preds = %5, %3, %1
%9 = phi i32 [ 0, %1 ], [ 1, %3 ], [ %7, %5 ]
ret i32 %9
}
reg0adr1(r0, r1, x0, x1, p0, p1) short r0, r1;
short *p0, *p1;
{
  if (r0 <= (*((short *)(11111111 & ~(__alignof__(short) - 1)))))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<reg0adr1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
movswl -0x6(%rbp),%eax
mov    $0xa98ac6,%ecx
movswl (%rcx),%ecx
cmp    %ecx,%eax
jg     113f <reg0adr1+0x3f>
movl   $0x1,-0x4(%rbp)
jmp    1146 <reg0adr1+0x46>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg0adr1>:
movswl %di,%ecx
movswl 0xa98ac6,%edx
xor    %eax,%eax
cmp    %edx,%ecx
setle  %al
ret

LLVM IR (-O0):
define i32 @reg0adr1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16, i16* %8
%17 = sext i16 %16 to i32
%18 = load i16, i16* inttoptr (i64 11111110 to i16*)
%19 = sext i16 %18 to i32
%20 = icmp sle i32 %17, %19
br i1 %20, label %21, label %22
21: ; preds = %6
store i32 1, i32* %7
br label %23
22: ; preds = %6
store i32 0, i32* %7
br label %23
23: ; preds = %22, %21
%24 = load i32, i32* %7
ret i32 %24
}

LLVM IR (-O2):
define i32 @reg0adr1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture readnone %5) {
%7 = shl i32 %0, 16
%8 = ashr exact i32 %7, 16
%9 = load i16, i16* inttoptr (i64 11111110 to i16*)
%10 = sext i16 %9 to i32
%11 = icmp sle i32 %8, %10
%12 = zext i1 %11 to i32
ret i32 %12
}
int main(void) {
  puts("Ahoj");
  asm volatile("int3");
  puts("svet");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x0,%al
call   1030 <puts@plt>
int3
lea    0xed0(%rip),%rdi
mov    $0x0,%al
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %eax,%eax
call   1030 <puts@plt>
int3
lea    0xede(%rip),%rdi
xor    %eax,%eax
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"Ahoj\00"
@.str.1 = [5 x i8] c"svet\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (i8*, ...) bitcast (i32 (...)* @puts to i32 (i8*, ...)*)(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (i8*, ...) bitcast (i32 (...)* @puts to i32 (i8*, ...)*)(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"Ahoj\00"
@.str.1 = [5 x i8] c"svet\00"
define i32 @main() {
%1 = tail call i32 (i8*, ...) bitcast (i32 (...)* @puts to i32 (i8*, ...)*)(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
tail call void asm sideeffect "int3", "~{dirflag},~{fpsr},~{flags}"()
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @puts to i32 (i8*, ...)*)(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
int round_to_int(float x) {
  int ix;
  if (x >= 0.0)
    ix = (int)(x + 0.5f);
  else
    ix = (int)(x - 0.5f);
  return ix;
}


x86 assembly (clang, -O0):
<round_to_int>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1138 <round_to_int+0x38>
movss  0xed9(%rip),%xmm0
addss  -0x4(%rbp),%xmm0
cvttss2si %xmm0,%eax
mov    %eax,-0x8(%rbp)
jmp    1150 <round_to_int+0x50>
movss  -0x4(%rbp),%xmm0
movss  0xebb(%rip),%xmm1
subss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_to_int>:
xorps  %xmm1,%xmm1
xor    %eax,%eax
ucomiss %xmm1,%xmm0
setb   %al
lea    0xeee(%rip),%rcx
addss  (%rcx,%rax,4),%xmm0
cvttss2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @round_to_int(float %0) {
%2 = alloca float
%3 = alloca i32
store float %0, float* %2
%4 = load float, float* %2
%5 = fpext float %4 to double
%6 = fcmp oge double %5, 0.000000e+00
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load float, float* %2
%9 = fadd float %8, 5.000000e-01
%10 = fptosi float %9 to i32
store i32 %10, i32* %3
br label %15
11: ; preds = %1
%12 = load float, float* %2
%13 = fsub float %12, 5.000000e-01
%14 = fptosi float %13 to i32
store i32 %14, i32* %3
br label %15
15: ; preds = %11, %7
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @round_to_int(float %0) {
%2 = fcmp ult float %0, 0.000000e+00
%3 = select i1 %2, float -5.000000e-01, float 5.000000e-01
%4 = fadd float %3, %0
%5 = fptosi float %4 to i32
ret i32 %5
}
xxit(i) { exit(i); }


x86 assembly (clang, -O0):
<xxit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<xxit>:
push   %rax
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @xxit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
unreachable
}

LLVM IR (-O2):
define i32 @xxit(i32 %0) {
tail call void @exit(i32 %0)
unreachable
}
/* Variables and functions */
unsigned char sufmatch(char const **, char const *);
unsigned char no_proxy_match(const char *host, const char **no_proxy) {
  if (!no_proxy)
    return 0;
  else
    return sufmatch(no_proxy, host);
}


x86 assembly (clang, -O0):
<no_proxy_match>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1134 <no_proxy_match+0x24>
movb   $0x0,-0x1(%rbp)
jmp    1144 <no_proxy_match+0x34>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <sufmatch@plt>
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<no_proxy_match>:
test   %rsi,%rsi
je     1123 <no_proxy_match+0x13>
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
jmp    1030 <sufmatch@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i8 @no_proxy_match(i8* %0, i8** %1) {
%3 = alloca i8
%4 = alloca i8*
%5 = alloca i8**
store i8* %0, i8** %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %5
%7 = icmp ne i8** %6, null
br i1 %7, label %9, label %8
8: ; preds = %2
store i8 0, i8* %3
br label %13
9: ; preds = %2
%10 = load i8**, i8*** %5
%11 = load i8*, i8** %4
%12 = call zeroext i8 @sufmatch(i8** %10, i8* %11)
store i8 %12, i8* %3
br label %13
13: ; preds = %9, %8
%14 = load i8, i8* %3
ret i8 %14
}

LLVM IR (-O2):
define zeroext i8 @no_proxy_match(i8* %0, i8** %1) {
%3 = icmp eq i8** %1, null
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call zeroext i8 @sufmatch(i8** %1, i8* %0)
br label %6
6: ; preds = %2, %4
%7 = phi i8 [ %5, %4 ], [ 0, %2 ]
ret i8 %7
}
/* Variables and functions */
scalar_t__ is_alpha(int const);
scalar_t__ is_digit(int const);
bool is_base64(const int c) {
  return is_alpha(c) || is_digit(c) || c == '+' || c == '/' || c == '=';
}


x86 assembly (clang, -O0):
<is_base64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <is_alpha@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1187 <is_base64+0x67>
mov    -0x4(%rbp),%edi
call   1030 <is_digit@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1187 <is_base64+0x67>
mov    $0x1,%al
cmpl   $0x2b,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1187 <is_base64+0x67>
mov    $0x1,%al
cmpl   $0x2f,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1187 <is_base64+0x67>
cmpl   $0x3d,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_base64>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
call   1040 <is_alpha@plt>
mov    $0x1,%ebx
test   %rax,%rax
jne    1152 <is_base64+0x32>
mov    %ebp,%edi
call   1030 <is_digit@plt>
mov    %ebp,%ecx
and    $0xfffffffb,%ecx
cmp    $0x2b,%ecx
je     1152 <is_base64+0x32>
test   %rax,%rax
jne    1152 <is_base64+0x32>
xor    %ebx,%ebx
cmp    $0x3d,%ebp
sete   %bl
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @is_base64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @is_alpha(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %19, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i64 @is_digit(i32 %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %19, label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = icmp eq i32 %11, 43
br i1 %12, label %19, label %13
13: ; preds = %10
%14 = load i32, i32* %2
%15 = icmp eq i32 %14, 47
br i1 %15, label %19, label %16
16: ; preds = %13
%17 = load i32, i32* %2
%18 = icmp eq i32 %17, 61
br label %19
19: ; preds = %16, %13, %10, %6, %1
%20 = phi i1 [ true, %13 ], [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %18, %16 ]
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
define i32 @is_base64(i32 %0) {
%2 = tail call i64 @is_alpha(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %13
4: ; preds = %1
%5 = tail call i64 @is_digit(i32 %0)
%6 = icmp ne i64 %5, 0
%7 = and i32 %0, -5
%8 = icmp eq i32 %7, 43
%9 = or i1 %8, %6
br i1 %9, label %13, label %10
10: ; preds = %4
%11 = icmp eq i32 %0, 61
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %10, %4, %1
%14 = phi i32 [ 1, %4 ], [ 1, %1 ], [ %12, %10 ]
ret i32 %14
}
/* Type definitions */
struct fid_pep {
  int dummy;
};

/* Variables and functions */
int gnix_listen(struct fid_pep *);
int fi_listen(struct fid_pep *pep) { return gnix_listen(pep); }


x86 assembly (clang, -O0):
<fi_listen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <gnix_listen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fi_listen>:
jmp    1030 <gnix_listen@plt>

LLVM IR (-O0):
%struct.fid_pep = type { i32 }
define i32 @fi_listen(%struct.fid_pep* %0) {
%2 = alloca %struct.fid_pep*
store %struct.fid_pep* %0, %struct.fid_pep** %2
%3 = load %struct.fid_pep*, %struct.fid_pep** %2
%4 = call i32 @gnix_listen(%struct.fid_pep* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.fid_pep = type { i32 }
define i32 @fi_listen(%struct.fid_pep* %0) {
%2 = tail call i32 @gnix_listen(%struct.fid_pep* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ escape(void *);
void *malloc(int);
__attribute__((no)) void *foobar() {
  void *ptr = malloc(1);
  escape(ptr);
  return ptr;
}


x86 assembly (clang, -O0):
<foobar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <escape@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foobar>:
push   %rbx
mov    $0x1,%edi
call   1030 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <escape@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @foobar() {
%1 = alloca i8*
%2 = call i8* @malloc(i32 1)
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = call i32 @escape(i8* %3)
%5 = load i8*, i8** %1
ret i8* %5
}

LLVM IR (-O2):
define i8* @foobar() {
%1 = tail call dereferenceable_or_null(1) i8* @malloc(i32 1)
%2 = tail call i32 @escape(i8* %1)
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
int main(void) {
  double atof(char s[]);
  printf("%20.16f\n", atof("   123.456789e-8     "));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <atof@plt>
lea    0xebe(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee1(%rip),%rdi
call   1030 <atof@plt>
lea    0xecc(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"%20.16f\0A\00"
@.str.1 = [22 x i8] c" 123.456789e-8 \00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call double @atof(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), double %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"%20.16f\0A\00"
@.str.1 = [22 x i8] c" 123.456789e-8 \00"
define i32 @main() {
%1 = tail call double @atof(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), double %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ function(int, int, int);
void main() { function(1, 2, 3); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
call   1030 <function@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
jmp    1030 <function@plt>

LLVM IR (-O0):
define void @main() {
%1 = call i32 @function(i32 1, i32 2, i32 3)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @function(i32 1, i32 2, i32 3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ addstr(char *);
int /*<<< orphan*/ d2mce_finalize();
int /*<<< orphan*/ endwin();
int /*<<< orphan*/ getch();
int /*<<< orphan*/ move(int, int);
int /*<<< orphan*/ refresh();
void gameOver() {
  move(1 + 20 / 2, 1 + 50 / 2 - 4);
  addstr("Game Over");
  refresh();
  d2mce_finalize();
  getch();
  endwin();
}


x86 assembly (clang, -O0):
<gameOver>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb,%edi
mov    $0x16,%esi
call   1080 <move@plt>
lea    0xe86(%rip),%rdi
call   1070 <addstr@plt>
mov    $0x0,%al
call   1040 <refresh@plt>
mov    $0x0,%al
call   1030 <d2mce_finalize@plt>
mov    $0x0,%al
call   1050 <getch@plt>
mov    $0x0,%al
call   1060 <endwin@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gameOver>:
push   %rax
mov    $0xb,%edi
mov    $0x16,%esi
call   1080 <move@plt>
lea    0xe89(%rip),%rdi
call   1070 <addstr@plt>
xor    %eax,%eax
call   1040 <refresh@plt>
xor    %eax,%eax
call   1030 <d2mce_finalize@plt>
xor    %eax,%eax
call   1050 <getch@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <endwin@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"Game Over\00"
define void @gameOver() {
%1 = call i32 @move(i32 11, i32 22)
%2 = call i32 @addstr(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @refresh()
%4 = call i32 (...) @d2mce_finalize()
%5 = call i32 (...) @getch()
%6 = call i32 (...) @endwin()
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"Game Over\00"
define void @gameOver() {
%1 = tail call i32 @move(i32 11, i32 22)
%2 = tail call i32 @addstr(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @refresh()
%4 = tail call i32 (...) @d2mce_finalize()
%5 = tail call i32 (...) @getch()
%6 = tail call i32 (...) @endwin()
ret void
}
int hard_locale(int category) { return 0; }


x86 assembly (clang, -O0):
<hard_locale>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hard_locale>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hard_locale(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @hard_locale(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void print_offset(int offset) { printf("%08X :", offset * 16); }


x86 assembly (clang, -O0):
<print_offset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
shl    $0x4,%esi
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_offset>:
mov    %edi,%esi
shl    $0x4,%esi
lea    0xee4(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"%08X :\00"
define void @print_offset(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 16
%5 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"%08X :\00"
define void @print_offset(i32 %0) {
%2 = shl nsw i32 %0, 4
%3 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ object_gc();
void tree_gc(void) { object_gc(); }


x86 assembly (clang, -O0):
<tree_gc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <object_gc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tree_gc>:
xor    %eax,%eax
jmp    1030 <object_gc@plt>

LLVM IR (-O0):
define void @tree_gc() {
%1 = call i32 (...) @object_gc()
ret void
}

LLVM IR (-O2):
define void @tree_gc() {
%1 = tail call i32 (...) @object_gc()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sauvegarderArmeInventaire();
int /*<<< orphan*/ sauvegarderArmureInventaire();
int /*<<< orphan*/ sauvegarderCleInventaire();
int /*<<< orphan*/ sauvegarderPotionInventaire();
int /*<<< orphan*/ sauvegarderTekInventaire();
int /*<<< orphan*/ sauvegarderTresorInventaire();
void sauvegarderInventaire(void) {
  sauvegarderCleInventaire();
  sauvegarderTekInventaire();
  sauvegarderArmureInventaire();
  sauvegarderArmeInventaire();
  sauvegarderTresorInventaire();
  sauvegarderPotionInventaire();
}


x86 assembly (clang, -O0):
<sauvegarderInventaire>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1080 <sauvegarderCleInventaire@plt>
mov    $0x0,%al
call   1030 <sauvegarderTekInventaire@plt>
mov    $0x0,%al
call   1050 <sauvegarderArmureInventaire@plt>
mov    $0x0,%al
call   1040 <sauvegarderArmeInventaire@plt>
mov    $0x0,%al
call   1070 <sauvegarderTresorInventaire@plt>
mov    $0x0,%al
call   1060 <sauvegarderPotionInventaire@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sauvegarderInventaire>:
push   %rax
xor    %eax,%eax
call   1080 <sauvegarderCleInventaire@plt>
xor    %eax,%eax
call   1030 <sauvegarderTekInventaire@plt>
xor    %eax,%eax
call   1050 <sauvegarderArmureInventaire@plt>
xor    %eax,%eax
call   1040 <sauvegarderArmeInventaire@plt>
xor    %eax,%eax
call   1070 <sauvegarderTresorInventaire@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <sauvegarderPotionInventaire@plt>

LLVM IR (-O0):
define void @sauvegarderInventaire() {
%1 = call i32 (...) @sauvegarderCleInventaire()
%2 = call i32 (...) @sauvegarderTekInventaire()
%3 = call i32 (...) @sauvegarderArmureInventaire()
%4 = call i32 (...) @sauvegarderArmeInventaire()
%5 = call i32 (...) @sauvegarderTresorInventaire()
%6 = call i32 (...) @sauvegarderPotionInventaire()
ret void
}

LLVM IR (-O2):
define void @sauvegarderInventaire() {
%1 = tail call i32 (...) @sauvegarderCleInventaire()
%2 = tail call i32 (...) @sauvegarderTekInventaire()
%3 = tail call i32 (...) @sauvegarderArmureInventaire()
%4 = tail call i32 (...) @sauvegarderArmeInventaire()
%5 = tail call i32 (...) @sauvegarderTresorInventaire()
%6 = tail call i32 (...) @sauvegarderPotionInventaire()
ret void
}
unsigned short inw(unsigned short port) {
  unsigned short r;
  asm volatile("inw %1, %0" : "=a"(r) : "Nd"(port));
  return r;
}


x86 assembly (clang, -O0):
<inw>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%ax
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inw>:
mov    %edi,%edx
in     (%dx),%ax
ret

LLVM IR (-O0):
define zeroext i16 @inw(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i16 asm sideeffect "inw $1, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i16 %5, i16* %3
%6 = load i16, i16* %3
ret i16 %6
}

LLVM IR (-O2):
define zeroext i16 @inw(i16 zeroext %0) {
%2 = tail call i16 asm sideeffect "inw $1, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i16 %2
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "Usage: mkmsghdr -i input_filename -o output_filename\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [54 x i8] c"Usage: mkmsghdr -i input_filename -o output_filename\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [54 x i8] c"Usage: mkmsghdr -i input_filename -o output_filename\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  printf("Hello yabs!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello yabs!\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [12 x i8] c"Hello yabs!\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int f492(int *);
int f493(int *p) { return f492(p); }


x86 assembly (clang, -O0):
<f493>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f492@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f493>:
jmp    1030 <f492@plt>

LLVM IR (-O0):
define i32 @f493(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f492(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f493(i32* %0) {
%2 = tail call i32 @f492(i32* %0)
ret i32 %2
}
/* Type definitions */
struct in_addr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ err_fatal(char *);
int inet_aton(char const *, struct in_addr *);
void Inet_aton(const char *str, struct in_addr *addr) {
  int result;
  result = inet_aton(str, addr);
  if (result == 0) {
    err_fatal("Invalid IPv4 address for server");
  }
  return;
}


x86 assembly (clang, -O0):
<Inet_aton>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <inet_aton@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    1156 <Inet_aton+0x36>
lea    0xeaf(%rip),%rdi
call   1040 <err_fatal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Inet_aton>:
push   %rax
call   1030 <inet_aton@plt>
test   %eax,%eax
je     112c <Inet_aton+0xc>
pop    %rax
ret
lea    0xecd(%rip),%rdi
pop    %rax
jmp    1040 <err_fatal@plt>

LLVM IR (-O0):
%struct.in_addr = type { i32 }
@.str = [32 x i8] c"Invalid IPv4 address for server\00"
define void @Inet_aton(i8* %0, %struct.in_addr* %1) {
%3 = alloca i8*
%4 = alloca %struct.in_addr*
%5 = alloca i32
store i8* %0, i8** %3
store %struct.in_addr* %1, %struct.in_addr** %4
%6 = load i8*, i8** %3
%7 = load %struct.in_addr*, %struct.in_addr** %4
%8 = call i32 @inet_aton(i8* %6, %struct.in_addr* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = call i32 @err_fatal(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %2
ret void
}

LLVM IR (-O2):
%struct.in_addr = type { i32 }
@.str = [32 x i8] c"Invalid IPv4 address for server\00"
define void @Inet_aton(i8* %0, %struct.in_addr* %1) {
%3 = tail call i32 @inet_aton(i8* %0, %struct.in_addr* %1)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @err_fatal(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(char *, char *);
int verify_local(char *local, char *foreign) {
  int r = 1;
  if (local && foreign) {
    r = !strcmp(local, foreign) == 0;
  }
  return r;
}


x86 assembly (clang, -O0):
<verify_local>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1165 <verify_local+0x55>
cmpq   $0x0,-0x10(%rbp)
je     1165 <verify_local+0x55>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<verify_local>:
mov    $0x1,%eax
test   %rdi,%rdi
je     1132 <verify_local+0x22>
test   %rsi,%rsi
je     1132 <verify_local+0x22>
push   %rax
call   1030 <strcmp@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
setne  %al
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @verify_local(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 1, i32* %5
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %20
8: ; preds = %2
%9 = load i8*, i8** %4
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %20
11: ; preds = %8
%12 = load i8*, i8** %3
%13 = load i8*, i8** %4
%14 = call i32 @strcmp(i8* %12, i8* %13)
%15 = icmp ne i32 %14, 0
%16 = xor i1 %15, true
%17 = zext i1 %16 to i32
%18 = icmp eq i32 %17, 0
%19 = zext i1 %18 to i32
store i32 %19, i32* %5
br label %20
20: ; preds = %11, %8, %2
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
define i32 @verify_local(i8* %0, i8* %1) {
%3 = icmp ne i8* %0, null
%4 = icmp ne i8* %1, null
%5 = and i1 %3, %4
br i1 %5, label %6, label %10
6: ; preds = %2
%7 = tail call i32 @strcmp(i8* %0, i8* %1)
%8 = icmp ne i32 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %6, %2
%11 = phi i32 [ %9, %6 ], [ 1, %2 ]
ret i32 %11
}