#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ OS_mdelay(int);
int /*<<< orphan*/ sio_read_reg(int, unsigned long *);
int /*<<< orphan*/ sio_write_reg(int, unsigned long);
void vgatv_bridge_sync(void) {
  int retry_count = 0;
  unsigned long cr, misc, sp;
  OS_mdelay(100);
  sio_read_reg(0x30, &misc);
  sio_read_reg(0x0C, &cr);
  if (0x0400 & misc) {
    misc &= ~0x0400;
    sio_write_reg(0x30, misc);
  }
  while (retry_count++ < 30) {
    misc |= 0x0400;
    sio_write_reg(0x30, misc);
    misc &= ~0x0400;
    sio_write_reg(0x30, misc);
    cr |= 0x0040;
    sio_write_reg(0x0C, cr);
    cr &= ~0x0040;
    sio_write_reg(0x0C, cr);
    OS_mdelay(20);
    sio_read_reg(0x0E, &sp);
    if (!(0x0001 & sp)) {
      {}
      break;
    }
  }
}


x86 assembly (clang, -O0):
<vgatv_bridge_sync>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x64,%edi
call   1050 <OS_mdelay@plt>
mov    $0x30,%edi
lea    -0x18(%rbp),%rsi
call   1040 <sio_read_reg@plt>
mov    $0xc,%edi
lea    -0x10(%rbp),%rsi
call   1040 <sio_read_reg@plt>
mov    -0x18(%rbp),%rax
and    $0x400,%rax
cmp    $0x0,%rax
je     1195 <vgatv_bridge_sync+0x65>
mov    -0x18(%rbp),%rax
and    $0xfffffffffffffbff,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
mov    $0x30,%edi
call   1030 <sio_write_reg@plt>
jmp    119a <vgatv_bridge_sync+0x6a>
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x1e,%eax
jge    124e <vgatv_bridge_sync+0x11e>
mov    -0x18(%rbp),%rax
or     $0x400,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
mov    $0x30,%edi
call   1030 <sio_write_reg@plt>
mov    -0x18(%rbp),%rax
and    $0xfffffffffffffbff,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
mov    $0x30,%edi
call   1030 <sio_write_reg@plt>
mov    -0x10(%rbp),%rax
or     $0x40,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    $0xc,%edi
call   1030 <sio_write_reg@plt>
mov    -0x10(%rbp),%rax
and    $0xffffffffffffffbf,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    $0xc,%edi
call   1030 <sio_write_reg@plt>
mov    $0x14,%edi
call   1050 <OS_mdelay@plt>
mov    $0xe,%edi
lea    -0x20(%rbp),%rsi
call   1040 <sio_read_reg@plt>
mov    -0x20(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
jne    1249 <vgatv_bridge_sync+0x119>
jmp    124e <vgatv_bridge_sync+0x11e>
jmp    119a <vgatv_bridge_sync+0x6a>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vgatv_bridge_sync>:
push   %rbp
push   %r15
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    $0x64,%edi
call   1050 <OS_mdelay@plt>
mov    %rsp,%rsi
mov    $0x30,%edi
call   1040 <sio_read_reg@plt>
lea    0x8(%rsp),%rsi
mov    $0xc,%edi
call   1040 <sio_read_reg@plt>
mov    (%rsp),%rsi
test   $0x400,%esi
je     1181 <vgatv_bridge_sync+0x51>
and    $0xfffffffffffffbff,%rsi
mov    %rsi,(%rsp)
mov    $0x30,%edi
call   1030 <sio_write_reg@plt>
mov    $0x1f,%ebp
mov    $0x400,%r14d
mov    $0xfffffffffffffbff,%r15
lea    0x10(%rsp),%rbx
nopl   0x0(%rax,%rax,1)
add    $0xffffffff,%ebp
je     121d <vgatv_bridge_sync+0xed>
mov    (%rsp),%rsi
or     %r14,%rsi
mov    %rsi,(%rsp)
mov    $0x30,%edi
call   1030 <sio_write_reg@plt>
mov    (%rsp),%rsi
and    %r15,%rsi
mov    %rsi,(%rsp)
mov    $0x30,%edi
call   1030 <sio_write_reg@plt>
mov    0x8(%rsp),%rsi
or     $0x40,%rsi
mov    %rsi,0x8(%rsp)
mov    $0xc,%edi
call   1030 <sio_write_reg@plt>
mov    0x8(%rsp),%rsi
and    $0xffffffffffffffbf,%rsi
mov    %rsi,0x8(%rsp)
mov    $0xc,%edi
call   1030 <sio_write_reg@plt>
mov    $0x14,%edi
call   1050 <OS_mdelay@plt>
mov    $0xe,%edi
mov    %rbx,%rsi
call   1040 <sio_read_reg@plt>
testb  $0x1,0x10(%rsp)
jne    11a0 <vgatv_bridge_sync+0x70>
add    $0x18,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @vgatv_bridge_sync() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i32 0, i32* %1
%5 = call i32 @OS_mdelay(i32 100)
%6 = call i32 @sio_read_reg(i32 48, i64* %3)
%7 = call i32 @sio_read_reg(i32 12, i64* %2)
%8 = load i64, i64* %3
%9 = and i64 1024, %8
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %16
11: ; preds = %0
%12 = load i64, i64* %3
%13 = and i64 %12, -1025
store i64 %13, i64* %3
%14 = load i64, i64* %3
%15 = call i32 @sio_write_reg(i32 48, i64 %14)
br label %16
16: ; preds = %11, %0
br label %17
17: ; preds = %44, %16
%18 = load i32, i32* %1
%19 = add nsw i32 %18, 1
store i32 %19, i32* %1
%20 = icmp slt i32 %18, 30
br i1 %20, label %21, label %45
21: ; preds = %17
%22 = load i64, i64* %3
%23 = or i64 %22, 1024
store i64 %23, i64* %3
%24 = load i64, i64* %3
%25 = call i32 @sio_write_reg(i32 48, i64 %24)
%26 = load i64, i64* %3
%27 = and i64 %26, -1025
store i64 %27, i64* %3
%28 = load i64, i64* %3
%29 = call i32 @sio_write_reg(i32 48, i64 %28)
%30 = load i64, i64* %2
%31 = or i64 %30, 64
store i64 %31, i64* %2
%32 = load i64, i64* %2
%33 = call i32 @sio_write_reg(i32 12, i64 %32)
%34 = load i64, i64* %2
%35 = and i64 %34, -65
store i64 %35, i64* %2
%36 = load i64, i64* %2
%37 = call i32 @sio_write_reg(i32 12, i64 %36)
%38 = call i32 @OS_mdelay(i32 20)
%39 = call i32 @sio_read_reg(i32 14, i64* %4)
%40 = load i64, i64* %4
%41 = and i64 1, %40
%42 = icmp ne i64 %41, 0
br i1 %42, label %44, label %43
43: ; preds = %21
br label %45
44: ; preds = %21
br label %17
45: ; preds = %43, %17
ret void
}

LLVM IR (-O2):
define void @vgatv_bridge_sync() {
%1 = alloca i64
%2 = alloca i64
%3 = alloca i64
%4 = bitcast i64* %1 to i8*
%5 = bitcast i64* %2 to i8*
%6 = bitcast i64* %3 to i8*
%7 = tail call i32 @OS_mdelay(i32 100)
%8 = call i32 @sio_read_reg(i32 48, i64* %2)
%9 = call i32 @sio_read_reg(i32 12, i64* %1)
%10 = load i64, i64* %2
%11 = and i64 %10, 1024
%12 = icmp eq i64 %11, 0
br i1 %12, label %16, label %13
13: ; preds = %0
%14 = and i64 %10, -1025
store i64 %14, i64* %2
%15 = call i32 @sio_write_reg(i32 48, i64 %14)
br label %16
16: ; preds = %13, %0
br label %17
17: ; preds = %16, %20
%18 = phi i32 [ %21, %20 ], [ 0, %16 ]
%19 = icmp eq i32 %18, 30
br i1 %19, label %39, label %20
20: ; preds = %17
%21 = add nuw nsw i32 %18, 1
%22 = load i64, i64* %2
%23 = or i64 %22, 1024
store i64 %23, i64* %2
%24 = call i32 @sio_write_reg(i32 48, i64 %23)
%25 = load i64, i64* %2
%26 = and i64 %25, -1025
store i64 %26, i64* %2
%27 = call i32 @sio_write_reg(i32 48, i64 %26)
%28 = load i64, i64* %1
%29 = or i64 %28, 64
store i64 %29, i64* %1
%30 = call i32 @sio_write_reg(i32 12, i64 %29)
%31 = load i64, i64* %1
%32 = and i64 %31, -65
store i64 %32, i64* %1
%33 = call i32 @sio_write_reg(i32 12, i64 %32)
%34 = call i32 @OS_mdelay(i32 20)
%35 = call i32 @sio_read_reg(i32 14, i64* %3)
%36 = load i64, i64* %3
%37 = and i64 %36, 1
%38 = icmp eq i64 %37, 0
br i1 %38, label %39, label %17
39: ; preds = %20, %17
ret void
}