xunge/DecIR huggingface dataset:
/* Type definitions */
struct t_gui_buffer {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ gui_buffer_set_unread(struct t_gui_buffer *);
void gui_input_set_unread_current(struct t_gui_buffer *buffer) {
  gui_buffer_set_unread(buffer);
}


x86 assembly (clang, -O0):
<gui_input_set_unread_current>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <gui_buffer_set_unread@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gui_input_set_unread_current>:
jmp    1030 <gui_buffer_set_unread@plt>

LLVM IR (-O0):
%struct.t_gui_buffer = type { i32 }
define void @gui_input_set_unread_current(%struct.t_gui_buffer* %0) {
%2 = alloca %struct.t_gui_buffer*
store %struct.t_gui_buffer* %0, %struct.t_gui_buffer** %2
%3 = load %struct.t_gui_buffer*, %struct.t_gui_buffer** %2
%4 = call i32 @gui_buffer_set_unread(%struct.t_gui_buffer* %3)
ret void
}

LLVM IR (-O2):
%struct.t_gui_buffer = type { i32 }
define void @gui_input_set_unread_current(%struct.t_gui_buffer* %0) {
%2 = tail call i32 @gui_buffer_set_unread(%struct.t_gui_buffer* %0)
ret void
}
void sizeof_vla_3(int a) {
  if (a == 5) {
    char x[a];
    int y[sizeof(*&*&*&x)];
    y[4] = 4;
    y[5] = 5;
  }
}


x86 assembly (clang, -O0):
<sizeof_vla_3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x5,-0x4(%rbp)
jne    1167 <sizeof_vla_3+0x67>
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
mov    %rsp,%rax
mov    %rax,-0x10(%rbp)
mov    %rcx,%rdx
add    $0xf,%rdx
and    $0xfffffffffffffff0,%rdx
mov    %rsp,%rax
sub    %rdx,%rax
mov    %rax,%rsp
mov    %rcx,-0x18(%rbp)
lea    0xf(,%rcx,4),%rdx
and    $0xfffffffffffffff0,%rdx
mov    %rsp,%rax
sub    %rdx,%rax
mov    %rax,%rsp
mov    %rcx,-0x20(%rbp)
movl   $0x4,0x10(%rax)
movl   $0x5,0x14(%rax)
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sizeof_vla_3>:
ret

LLVM IR (-O0):
define void @sizeof_vla_3(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 5
br i1 %7, label %8, label %17
8: ; preds = %1
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
%11 = call i8* @llvm.stacksave()
store i8* %11, i8** %3
%12 = alloca i8, i64 %10
store i64 %10, i64* %4
%13 = alloca i32, i64 %10
store i64 %10, i64* %5
%14 = getelementptr inbounds i32, i32* %13, i64 4
store i32 4, i32* %14
%15 = getelementptr inbounds i32, i32* %13, i64 5
store i32 5, i32* %15
%16 = load i8*, i8** %3
br label %17
17: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @sizeof_vla_3(i32 %0) {
ret void
}
int wps_validate_m2d(const struct wpabuf *tlvs) { return 0; }


x86 assembly (clang, -O0):
<wps_validate_m2d>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wps_validate_m2d>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.wpabuf = type opaque
define i32 @wps_validate_m2d(%struct.wpabuf* %0) {
%2 = alloca %struct.wpabuf*
store %struct.wpabuf* %0, %struct.wpabuf** %2
ret i32 0
}

LLVM IR (-O2):
%struct.wpabuf = type opaque
define i32 @wps_validate_m2d(%struct.wpabuf* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int, char const *,
                           char const *, int);
int getpid();
int /*<<< orphan*/ sleep(int);
int /*<<< orphan*/ stderr;
void halt(const char *filename, const char *function, int lineno) {
  fprintf(stderr, "HALT!!!!! In (%d) %s(%s:%d)", getpid(), filename, function,
          lineno);
  while (1) {
    sleep(1000);
  }
}


x86 assembly (clang, -O0):
<halt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2e96(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    -0x18(%rbp),%edi
mov    %eax,%edx
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%r8
mov    -0x14(%rbp),%r9d
lea    0xe92(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x3e8,%edi
call   1050 <sleep@plt>
jmp    1173 <halt+0x43>

x86 assembly (clang, -O2):
<halt>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %rsi,%r15
mov    %rdi,%rbp
mov    0x2e99(%rip),%rax
mov    (%rax),%ebx
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xea9(%rip),%rsi
mov    %ebx,%edi
mov    %eax,%edx
mov    %rbp,%rcx
mov    %r15,%r8
mov    %r14d,%r9d
call   1040 <fprintf@plt>
nopl   0x0(%rax)
mov    $0x3e8,%edi
call   1050 <sleep@plt>
jmp    1170 <halt+0x40>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [28 x i8] c"HALT!!!!! In (%d) %s(%s:%d)\00"
define void @halt(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* @stderr
%8 = call i32 (...) @getpid()
%9 = load i8*, i8** %4
%10 = load i8*, i8** %5
%11 = load i32, i32* %6
%12 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %8, i8* %9, i8* %10, i32 %11)
br label %13
13: ; preds = %3, %13
%14 = call i32 @sleep(i32 1000)
br label %13
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [28 x i8] c"HALT!!!!! In (%d) %s(%s:%d)\00"
define void @halt(i8* %0, i8* %1, i32 %2) {
%4 = load i32, i32* @stderr
%5 = tail call i32 (...) @getpid()
%6 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %5, i8* %0, i8* %1, i32 %2)
br label %7
7: ; preds = %3, %7
%8 = tail call i32 @sleep(i32 1000)
br label %7
}
void *my_memset(void *dest, unsigned char c, unsigned int size) {
  unsigned char *ptr = (unsigned char *)dest;
  while (size--)
    *ptr++ = c;
  return dest;
}


x86 assembly (clang, -O0):
<my_memset>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x10(%rbp)
cmp    $0x0,%eax
je     1146 <my_memset+0x46>
mov    -0x9(%rbp),%cl
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %cl,(%rax)
jmp    1119 <my_memset+0x19>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_memset>:
push   %rbx
mov    %rdi,%rbx
test   %edx,%edx
je     1126 <my_memset+0x16>
mov    %edx,%edx
movzbl %sil,%esi
mov    %rbx,%rdi
call   1030 <memset@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @my_memset(i8* %0, i8 zeroext %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i32
%7 = alloca i8*
store i8* %0, i8** %4
store i8 %1, i8* %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
store i8* %8, i8** %7
br label %9
9: ; preds = %13, %3
%10 = load i32, i32* %6
%11 = add i32 %10, -1
store i32 %11, i32* %6
%12 = icmp ne i32 %10, 0
br i1 %12, label %13, label %17
13: ; preds = %9
%14 = load i8, i8* %5
%15 = load i8*, i8** %7
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %7
store i8 %14, i8* %15
br label %9
17: ; preds = %9
%18 = load i8*, i8** %4
ret i8* %18
}

LLVM IR (-O2):
define i8* @my_memset(i8* returned writeonly %0, i8 zeroext %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %7
7: ; preds = %5, %3
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ SSIBaseValid(unsigned long);
void SSIIntEnable(unsigned long ulBase, unsigned long ulIntFlags) {
  DEBUG_ASSERT(SSIBaseValid(ulBase));
  (*((volatile unsigned long *)(ulBase + 0x00000014))) |= ulIntFlags;
}


x86 assembly (clang, -O0):
<SSIIntEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <SSIBaseValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x14(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSIIntEnable>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <SSIBaseValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
or     %r14,0x14(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @SSIIntEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = call i32 @SSIBaseValid(i64 %5)
%7 = call i32 @DEBUG_ASSERT(i32 %6)
%8 = load i64, i64* %4
%9 = load i64, i64* %3
%10 = add i64 %9, 20
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = or i64 %12, %8
store volatile i64 %13, i64* %11
ret void
}

LLVM IR (-O2):
define void @SSIIntEnable(i64 %0, i64 %1) {
%3 = tail call i32 @SSIBaseValid(i64 %0)
%4 = tail call i32 @DEBUG_ASSERT(i32 %3)
%5 = add i64 %0, 20
%6 = inttoptr i64 %5 to i64*
%7 = load volatile i64, i64* %6
%8 = or i64 %7, %1
store volatile i64 %8, i64* %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ recv_file(char *);
int /*<<< orphan*/ send_file(char *);
void talk_to_daemon(char *fname) {
  send_file(fname);
  recv_file(fname);
}


x86 assembly (clang, -O0):
<talk_to_daemon>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <send_file@plt>
mov    -0x8(%rbp),%rdi
call   1030 <recv_file@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<talk_to_daemon>:
push   %rbx
mov    %rdi,%rbx
call   1040 <send_file@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <recv_file@plt>

LLVM IR (-O0):
define void @talk_to_daemon(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @send_file(i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @recv_file(i8* %5)
ret void
}

LLVM IR (-O2):
define void @talk_to_daemon(i8* %0) {
%2 = tail call i32 @send_file(i8* %0)
%3 = tail call i32 @recv_file(i8* %0)
ret void
}
void av_frame_get_plane_buffer() {}


x86 assembly (clang, -O0):
<av_frame_get_plane_buffer>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_frame_get_plane_buffer>:
ret

LLVM IR (-O0):
define void @av_frame_get_plane_buffer() {
ret void
}

LLVM IR (-O2):
define void @av_frame_get_plane_buffer() {
ret void
}
struct bwb_line *bwb_LOAD(struct bwb_line *l) {
  bwx_DEBUG(__FUNCTION__);
  bwb_NEW(l);
  bwb_xload(l);
  return bwb_zline(l);
}


x86 assembly (clang, -O0):
<bwb_LOAD>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xead(%rip),%rdi
mov    $0x0,%al
call   1040 <bwx_DEBUG@plt>
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1060 <bwb_NEW@plt>
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <bwb_xload@plt>
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1050 <bwb_zline@plt>
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bwb_LOAD>:
push   %rbx
mov    %rdi,%rbx
lea    0xeb5(%rip),%rdi
xor    %eax,%eax
call   1040 <bwx_DEBUG@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1060 <bwb_NEW@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <bwb_xload@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1050 <bwb_zline@plt>
cltq
pop    %rbx
ret

LLVM IR (-O0):
%struct.bwb_line = type opaque
@__FUNCTION__.bwb_LOAD = [9 x i8] c"bwb_LOAD\00"
define %struct.bwb_line* @bwb_LOAD(%struct.bwb_line* %0) {
%2 = alloca %struct.bwb_line*
store %struct.bwb_line* %0, %struct.bwb_line** %2
%3 = call i32 (i8*, ...) bitcast (i32 (...)* @bwx_DEBUG to i32 (i8*, ...)*)(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @__FUNCTION__.bwb_LOAD, i64 0, i64 0))
%4 = load %struct.bwb_line*, %struct.bwb_line** %2
%5 = call i32 (%struct.bwb_line*, ...) bitcast (i32 (...)* @bwb_NEW to i32 (%struct.bwb_line*, ...)*)(%struct.bwb_line* %4)
%6 = load %struct.bwb_line*, %struct.bwb_line** %2
%7 = call i32 (%struct.bwb_line*, ...) bitcast (i32 (...)* @bwb_xload to i32 (%struct.bwb_line*, ...)*)(%struct.bwb_line* %6)
%8 = load %struct.bwb_line*, %struct.bwb_line** %2
%9 = call i32 (%struct.bwb_line*, ...) bitcast (i32 (...)* @bwb_zline to i32 (%struct.bwb_line*, ...)*)(%struct.bwb_line* %8)
%10 = sext i32 %9 to i64
%11 = inttoptr i64 %10 to %struct.bwb_line*
ret %struct.bwb_line* %11
}

LLVM IR (-O2):
%struct.bwb_line = type opaque
@__FUNCTION__.bwb_LOAD = [9 x i8] c"bwb_LOAD\00"
define %struct.bwb_line* @bwb_LOAD(%struct.bwb_line* %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @bwx_DEBUG to i32 (i8*, ...)*)(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @__FUNCTION__.bwb_LOAD, i64 0, i64 0))
%3 = tail call i32 (%struct.bwb_line*, ...) bitcast (i32 (...)* @bwb_NEW to i32 (%struct.bwb_line*, ...)*)(%struct.bwb_line* %0)
%4 = tail call i32 (%struct.bwb_line*, ...) bitcast (i32 (...)* @bwb_xload to i32 (%struct.bwb_line*, ...)*)(%struct.bwb_line* %0)
%5 = tail call i32 (%struct.bwb_line*, ...) bitcast (i32 (...)* @bwb_zline to i32 (%struct.bwb_line*, ...)*)(%struct.bwb_line* %0)
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to %struct.bwb_line*
ret %struct.bwb_line* %7
}
unsigned short atoshort(char b1, char b2) {
  unsigned short usRes;
  usRes = (atoc(b1)) * 16 | atoc(b2);
  return usRes;
}


x86 assembly (clang, -O0):
<atoshort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%edi
mov    $0x0,%al
call   1030 <atoc@plt>
shl    $0x4,%eax
mov    %eax,-0x8(%rbp)
movsbl -0x2(%rbp),%edi
mov    $0x0,%al
call   1030 <atoc@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
or     %ecx,%eax
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atoshort>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
xor    %eax,%eax
call   1030 <atoc@plt>
mov    %eax,%ebp
shl    $0x4,%ebp
mov    %ebx,%edi
xor    %eax,%eax
call   1030 <atoc@plt>
or     %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define zeroext i16 @atoshort(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i16
store i8 %0, i8* %3
store i8 %1, i8* %4
%6 = load i8, i8* %3
%7 = sext i8 %6 to i32
%8 = call i32 (i32, ...) bitcast (i32 (...)* @atoc to i32 (i32, ...)*)(i32 %7)
%9 = mul nsw i32 %8, 16
%10 = load i8, i8* %4
%11 = sext i8 %10 to i32
%12 = call i32 (i32, ...) bitcast (i32 (...)* @atoc to i32 (i32, ...)*)(i32 %11)
%13 = or i32 %9, %12
%14 = trunc i32 %13 to i16
store i16 %14, i16* %5
%15 = load i16, i16* %5
ret i16 %15
}

LLVM IR (-O2):
define zeroext i16 @atoshort(i8 signext %0, i8 signext %1) {
%3 = sext i8 %0 to i32
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @atoc to i32 (i32, ...)*)(i32 %3)
%5 = shl nsw i32 %4, 4
%6 = sext i8 %1 to i32
%7 = tail call i32 (i32, ...) bitcast (i32 (...)* @atoc to i32 (i32, ...)*)(i32 %6)
%8 = or i32 %5, %7
%9 = trunc i32 %8 to i16
ret i16 %9
}
int c073(void) { return 0; }


x86 assembly (clang, -O0):
<c073>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c073>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @c073() {
ret i32 0
}

LLVM IR (-O2):
define i32 @c073() {
ret i32 0
}
unsigned GetFieldW32(unsigned int *A, register unsigned int index) {
  return A[index];
}


x86 assembly (clang, -O0):
<GetFieldW32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    (%rax,%rcx,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetFieldW32>:
mov    %esi,%eax
mov    (%rdi,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @GetFieldW32(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds i32, i32* %5, i64 %7
%9 = load i32, i32* %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @GetFieldW32(i32* nocapture %0, i32 %1) {
%3 = zext i32 %1 to i64
%4 = getelementptr inbounds i32, i32* %0, i64 %3
%5 = load i32, i32* %4
ret i32 %5
}
struct s3c24x0_usb_host *s3c24x0_get_base_usb_host(void) {
  return (struct s3c24x0_usb_host *)0x14200000;
}


x86 assembly (clang, -O0):
<s3c24x0_get_base_usb_host>:
push   %rbp
mov    %rsp,%rbp
mov    $0x14200000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<s3c24x0_get_base_usb_host>:
mov    $0x14200000,%eax
ret

LLVM IR (-O0):
%struct.s3c24x0_usb_host = type opaque
define %struct.s3c24x0_usb_host* @s3c24x0_get_base_usb_host() {
ret %struct.s3c24x0_usb_host* inttoptr (i64 337641472 to %struct.s3c24x0_usb_host*)
}

LLVM IR (-O2):
%struct.s3c24x0_usb_host = type opaque
define %struct.s3c24x0_usb_host* @s3c24x0_get_base_usb_host() {
ret %struct.s3c24x0_usb_host* inttoptr (i64 337641472 to %struct.s3c24x0_usb_host*)
}
void DBG_INF(const char *const msg) {}


x86 assembly (clang, -O0):
<DBG_INF>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<DBG_INF>:
ret

LLVM IR (-O0):
define void @DBG_INF(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @DBG_INF(i8* nocapture %0) {
ret void
}
int test_imm_F0uint16_reg(unsigned short val) {
  return ((val) & (-0xF0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F0uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff10,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F0uint16_reg>:
test   $0xff10,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F0uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -240
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_F0uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -240
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
float f_sign(float x) { return x >= 0.0f ? 1.0f : -1.0f; }


x86 assembly (clang, -O0):
<f_sign>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm1
movss  0xeea(%rip),%xmm3
movss  0xee6(%rip),%xmm2
xorps  %xmm0,%xmm0
cmpless %xmm1,%xmm0
movaps %xmm0,%xmm1
andps  %xmm3,%xmm1
andnps %xmm2,%xmm0
orps   %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_sign>:
xorps  %xmm1,%xmm1
xor    %eax,%eax
ucomiss %xmm1,%xmm0
setae  %al
lea    0xeee(%rip),%rcx
movss  (%rcx,%rax,4),%xmm0
ret

LLVM IR (-O0):
define float @f_sign(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp oge float %3, 0.000000e+00
%5 = zext i1 %4 to i64
%6 = select i1 %4, float 1.000000e+00, float -1.000000e+00
ret float %6
}

LLVM IR (-O2):
define float @f_sign(float %0) {
%2 = fcmp oge float %0, 0.000000e+00
%3 = select i1 %2, float 1.000000e+00, float -1.000000e+00
ret float %3
}
/* Type definitions */
typedef int /*<<< orphan*/ volatile uint32_t;

/* Variables and functions */
uint32_t led_get(void) { return *(volatile uint32_t *)(0xfffbb154); }


x86 assembly (clang, -O0):
<led_get>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffbb154,%eax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<led_get>:
mov    $0xfffbb154,%eax
mov    (%rax),%eax
ret

LLVM IR (-O0):
define i32 @led_get() {
%1 = load volatile i32, i32* inttoptr (i64 4294685012 to i32*)
ret i32 %1
}

LLVM IR (-O2):
define i32 @led_get() {
%1 = load volatile i32, i32* inttoptr (i64 4294685012 to i32*)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
int /*<<< orphan*/ puts(char *);
void stampa_totale(float importo_totale) {
  if (importo_totale < 0) {
    puts("Errore nel calcolo degli importi, il programma terminera in modo "
         "inatteso");
  } else {
    printf("L'importo totale della unita abitative e' pari a: € %.2f",
           importo_totale);
  }
  return;
}


x86 assembly (clang, -O0):
<stampa_totale>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
xorps  %xmm0,%xmm0
ucomiss -0x4(%rbp),%xmm0
jbe    114b <stampa_totale+0x2b>
lea    0xebf(%rip),%rdi
call   1030 <puts@plt>
jmp    115c <stampa_totale+0x3c>
movss  -0x4(%rbp),%xmm0
lea    0xef3(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stampa_totale>:
xorps  %xmm1,%xmm1
ucomiss %xmm0,%xmm1
jbe    1134 <stampa_totale+0x14>
lea    0xed1(%rip),%rdi
jmp    1030 <puts@plt>
lea    0xf0f(%rip),%rdi
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [74 x i8] c"Errore nel calcolo degli importi, il programma terminera in modo inatteso\00"
@.str.1 = [59 x i8] c"L'importo totale della unita abitative e' pari a: \E2\82\AC %.2f\00"
define void @stampa_totale(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp olt float %3, 0.000000e+00
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @puts(i8* getelementptr inbounds ([74 x i8], [74 x i8]* @.str, i64 0, i64 0))
br label %10
7: ; preds = %1
%8 = load float, float* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str.1, i64 0, i64 0), float %8)
br label %10
10: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
@.str = [74 x i8] c"Errore nel calcolo degli importi, il programma terminera in modo inatteso\00"
@.str.1 = [59 x i8] c"L'importo totale della unita abitative e' pari a: \E2\82\AC %.2f\00"
define void @stampa_totale(float %0) {
%2 = fcmp olt float %0, 0.000000e+00
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([74 x i8], [74 x i8]* @.str, i64 0, i64 0))
br label %7
5: ; preds = %1
%6 = tail call i32 @printf(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str.1, i64 0, i64 0), float %0)
br label %7
7: ; preds = %5, %3
ret void
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int stat(char const *, struct stat *);
int lstat(const char *file_name, struct stat *buf) {
  return stat(file_name, buf);
}


x86 assembly (clang, -O0):
<lstat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <stat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lstat>:
jmp    1030 <stat@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @lstat(i8* %0, %struct.stat* %1) {
%3 = alloca i8*
%4 = alloca %struct.stat*
store i8* %0, i8** %3
store %struct.stat* %1, %struct.stat** %4
%5 = load i8*, i8** %3
%6 = load %struct.stat*, %struct.stat** %4
%7 = call i32 @stat(i8* %5, %struct.stat* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @lstat(i8* nocapture %0, %struct.stat* nocapture %1) {
%3 = tail call i32 @stat(i8* %0, %struct.stat* %1)
ret i32 %3
}
/* Variables and functions */
int unlinkat(int, char const *, int);
__attribute__((__weak__, __always___)) int
softboundmpx_unlinkat(int dirfd, const char *pathname, int flags) {
  return unlinkat(dirfd, pathname, flags);
}


x86 assembly (clang, -O0):
<softboundmpx_unlinkat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <unlinkat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_unlinkat>:
jmp    1030 <unlinkat@plt>

LLVM IR (-O0):
define weak i32 @softboundmpx_unlinkat(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @unlinkat(i32 %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define weak i32 @softboundmpx_unlinkat(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @unlinkat(i32 %0, i8* %1, i32 %2)
ret i32 %4
}
int hcf(int n1, int n2) {
  if (n2 != 0) {
    return hcf(n2, n1 % n2);
  } else
    return n1;
}


x86 assembly (clang, -O0):
<hcf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1141 <hcf+0x31>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%esi
call   1030 <hcf@plt>
mov    %eax,-0x4(%rbp)
jmp    1147 <hcf+0x37>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hcf>:
mov    %edi,%eax
test   %esi,%esi
je     111d <hcf+0x1d>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <hcf+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @hcf(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = srem i32 %10, %11
%13 = call i32 @hcf(i32 %9, i32 %12)
store i32 %13, i32* %3
br label %16
14: ; preds = %2
%15 = load i32, i32* %4
store i32 %15, i32* %3
br label %16
16: ; preds = %14, %8
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @hcf(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = phi i32 [ %5, %4 ], [ %0, %2 ]
%7 = srem i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %5, %4 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ bar();
void foo(int n) {
  for (int i = 0; i < n; ++i)
    bar();
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1143 <foo+0x33>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <foo+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbx
test   %edi,%edi
jle    112c <foo+0x1c>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <bar@plt>
add    $0xffffffff,%ebx
jne    1120 <foo+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = call i32 (...) @bar()
br label %10
10: ; preds = %8
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %4, label %3
3: ; preds = %4, %1
ret void
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = tail call i32 (...) @bar()
%7 = add nuw nsw i32 %5, 1
%8 = icmp eq i32 %7, %0
br i1 %8, label %3, label %4
}
double _fcint(f)
double f;
{
  long r;
  if (f < 0) {
    r = -f;
    r = -r - 1;
  } else
    r = f;
  f = r;
  return (f);
}


x86 assembly (clang, -O0):
<_fcint>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    114f <_fcint+0x4f>
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
cvttsd2si %xmm0,%rax
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
sub    -0x10(%rbp),%rax
sub    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1159 <_fcint+0x59>
cvttsd2si -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
cvtsi2sdq -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fcint>:
xorpd  %xmm1,%xmm1
ucomisd %xmm0,%xmm1
cvttsd2si %xmm0,%rax
xorpd  0xeeb(%rip),%xmm0
cvttsd2si %xmm0,%rcx
not    %rcx
cmovbe %rax,%rcx
xorps  %xmm0,%xmm0
cvtsi2sd %rcx,%xmm0
ret

LLVM IR (-O0):
define double @_fcint(double %0) {
%2 = alloca double
%3 = alloca i64
store double %0, double* %2
%4 = load double, double* %2
%5 = fcmp olt double %4, 0.000000e+00
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load double, double* %2
%8 = fneg double %7
%9 = fptosi double %8 to i64
store i64 %9, i64* %3
%10 = load i64, i64* %3
%11 = sub nsw i64 0, %10
%12 = sub nsw i64 %11, 1
store i64 %12, i64* %3
br label %16
13: ; preds = %1
%14 = load double, double* %2
%15 = fptosi double %14 to i64
store i64 %15, i64* %3
br label %16
16: ; preds = %13, %6
%17 = load i64, i64* %3
%18 = sitofp i64 %17 to double
store double %18, double* %2
%19 = load double, double* %2
ret double %19
}

LLVM IR (-O2):
define double @_fcint(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
%3 = fneg double %0
%4 = fptosi double %3 to i64
%5 = xor i64 %4, -1
%6 = fptosi double %0 to i64
%7 = select i1 %2, i64 %5, i64 %6
%8 = sitofp i64 %7 to double
ret double %8
}
/* Variables and functions */
int /*<<< orphan*/ fatal(char *);
void errorDoesNotUnderstand() {
  fatal("Recursive not understood error ... SPLAT!");
}


x86 assembly (clang, -O0):
<errorDoesNotUnderstand>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <fatal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<errorDoesNotUnderstand>:
lea    0xee9(%rip),%rdi
jmp    1030 <fatal@plt>

LLVM IR (-O0):
@.str = [42 x i8] c"Recursive not understood error ... SPLAT!\00"
define void @errorDoesNotUnderstand() {
%1 = call i32 @fatal(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [42 x i8] c"Recursive not understood error ... SPLAT!\00"
define void @errorDoesNotUnderstand() {
%1 = tail call i32 @fatal(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
ret void
}
int test_imm_2Euint8_reg(unsigned char val) {
  return ((val) & (0x2E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_2Euint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0x2e,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Euint8_reg>:
test   $0x2e,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Euint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 46
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_2Euint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 46
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
ssize_t recv(int sockfd, void *buf, size_t len, int flags) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<recv>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    0x2ecf(%rip),%rax
mov    (%rax),%ecx
mov    0x2eb6(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<recv>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @recv(i32 %0, i8* %1, i64 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i32 %3, i32* %8
%9 = load i32, i32* @ENOSYS
store i32 %9, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @recv(i32 %0, i8* nocapture readnone %1, i64 %2, i32 %3) {
%5 = load i32, i32* @ENOSYS
store i32 %5, i32* @errno
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void mostraNum(int n) {
  printf("Numero digitado: %d\n", n);
  n = n + 1;
}


x86 assembly (clang, -O0):
<mostraNum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mostraNum>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"Numero digitado: %d\0A\00"
define void @mostraNum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 1
store i32 %6, i32* %2
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"Numero digitado: %d\0A\00"
define void @mostraNum(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
unsigned char inportb(unsigned short port) {
  unsigned char rv;
  __asm__ __volatile__("inb %1, %0" : "=a"(rv) : "dN"(port));
  return rv;
}


x86 assembly (clang, -O0):
<inportb>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%al
mov    %al,-0x3(%rbp)
movzbl -0x3(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inportb>:
mov    %edi,%edx
in     (%dx),%al
ret

LLVM IR (-O0):
define zeroext i8 @inportb(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i8
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i8 asm sideeffect "inb $1, $0", "={ax},{dx}N,~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i8 %5, i8* %3
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @inportb(i16 zeroext %0) {
%2 = tail call i8 asm sideeffect "inb $1, $0", "={ax},{dx}N,~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i8 %2
}
/* Variables and functions */
char *concat(char const *, char *, char const *, char *, char const *,
             int /*<<< orphan*/ *);
int /*<<< orphan*/ sprintf(char *, char *, int);
char *makePartName(const char *codeDir, const char *mname, int part,
                   const char *srcSuffix) {
  char buf[50];
  sprintf(buf, "part%d", part);
  return concat(codeDir, "/sip", mname, buf, srcSuffix, NULL);
}


x86 assembly (clang, -O0):
<makePartName>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
lea    -0x60(%rbp),%rdi
mov    -0x14(%rbp),%edx
lea    0xebb(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    -0x60(%rbp),%rcx
mov    -0x20(%rbp),%r8
lea    0xea6(%rip),%rsi
xor    %eax,%eax
mov    %eax,%r9d
call   1030 <concat@plt>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<makePartName>:
push   %r15
push   %r14
push   %r12
push   %rbx
sub    $0x38,%rsp
mov    %rcx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
lea    0xec5(%rip),%rsi
mov    %rsp,%r12
mov    %r12,%rdi
call   1040 <sprintf@plt>
lea    0xeba(%rip),%rsi
mov    %rbx,%rdi
mov    %r15,%rdx
mov    %r12,%rcx
mov    %r14,%r8
xor    %r9d,%r9d
call   1030 <concat@plt>
add    $0x38,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [7 x i8] c"part%d\00"
@.str.1 = [5 x i8] c"/sip\00"
define i8* @makePartName(i8* %0, i8* %1, i32 %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
%9 = alloca [50 x i8]
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%10 = getelementptr inbounds [50 x i8], [50 x i8]* %9, i64 0, i64 0
%11 = load i32, i32* %7
%12 = call i32 @sprintf(i8* %10, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = load i8*, i8** %5
%14 = load i8*, i8** %6
%15 = getelementptr inbounds [50 x i8], [50 x i8]* %9, i64 0, i64 0
%16 = load i8*, i8** %8
%17 = call i8* @concat(i8* %13, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* %14, i8* %15, i8* %16, i32* null)
ret i8* %17
}

LLVM IR (-O2):
@.str = [7 x i8] c"part%d\00"
@.str.1 = [5 x i8] c"/sip\00"
define i8* @makePartName(i8* %0, i8* %1, i32 %2, i8* %3) {
%5 = alloca [50 x i8]
%6 = getelementptr inbounds [50 x i8], [50 x i8]* %5, i64 0, i64 0
%7 = call i32 @sprintf(i8* %6, i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %2)
%8 = call i8* @concat(i8* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* %1, i8* %6, i8* %3, i32* null)
ret i8* %8
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void const *, size_t);
void *xmalloc(size_t);
void *memdup(const void *p, size_t len) {
  void *cpy = xmalloc(len);
  memcpy(cpy, p, len);
  return cpy;
}


x86 assembly (clang, -O0):
<memdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <xmalloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memdup>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <xmalloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1040 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @memdup(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = call i8* @xmalloc(i64 %6)
store i8* %7, i8** %5
%8 = load i8*, i8** %5
%9 = load i8*, i8** %3
%10 = load i64, i64* %4
%11 = call i32 @memcpy(i8* %8, i8* %9, i64 %10)
%12 = load i8*, i8** %5
ret i8* %12
}

LLVM IR (-O2):
define i8* @memdup(i8* %0, i64 %1) {
%3 = tail call i8* @xmalloc(i64 %1)
%4 = tail call i32 @memcpy(i8* %3, i8* %0, i64 %1)
ret i8* %3
}
/* Variables and functions */
int ENXIO;
int pm8921_set_max_battery_charge_current(int ma) { return -ENXIO; }


x86 assembly (clang, -O0):
<pm8921_set_max_battery_charge_current>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
mov    0x2ed0(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pm8921_set_max_battery_charge_current>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@ENXIO = global i32 0
define i32 @pm8921_set_max_battery_charge_current(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @ENXIO
%4 = sub nsw i32 0, %3
ret i32 %4
}

LLVM IR (-O2):
@ENXIO = global i32 0
define i32 @pm8921_set_max_battery_charge_current(i32 %0) {
%2 = load i32, i32* @ENXIO
%3 = sub nsw i32 0, %2
ret i32 %3
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_network_link_get_setup_state(int ifindex, char **state) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_network_link_get_setup_state>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ecc(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_network_link_get_setup_state>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_network_link_get_setup_state(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* @EINVAL
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_network_link_get_setup_state(i32 %0, i8** nocapture readnone %1) {
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}
unsigned setbits(unsigned x, int p, int n, unsigned y) {
  unsigned mask = ~(~0 << n);
  return (x & ~(mask << (p - n + 1))) | ((y & mask) << (p - n + 1));
}


x86 assembly (clang, -O0):
<setbits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0xffffffff,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%ecx
sub    -0xc(%rbp),%ecx
add    $0x1,%ecx
shl    %cl,%edx
mov    %edx,%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%edx
and    -0x14(%rbp),%edx
mov    -0x8(%rbp),%ecx
sub    -0xc(%rbp),%ecx
add    $0x1,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setbits>:
mov    %ecx,%r8d
mov    %edx,%ecx
mov    $0xffffffff,%eax
shl    %cl,%eax
not    %eax
sub    %edx,%esi
lea    0x1(%rsi),%ecx
mov    %eax,%edx
shl    %cl,%edx
not    %edx
and    %edi,%edx
and    %r8d,%eax
shl    %cl,%eax
or     %edx,%eax
ret

LLVM IR (-O0):
define i32 @setbits(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %7
%11 = shl i32 -1, %10
%12 = xor i32 %11, -1
store i32 %12, i32* %9
%13 = load i32, i32* %5
%14 = load i32, i32* %9
%15 = load i32, i32* %6
%16 = load i32, i32* %7
%17 = sub nsw i32 %15, %16
%18 = add nsw i32 %17, 1
%19 = shl i32 %14, %18
%20 = xor i32 %19, -1
%21 = and i32 %13, %20
%22 = load i32, i32* %8
%23 = load i32, i32* %9
%24 = and i32 %22, %23
%25 = load i32, i32* %6
%26 = load i32, i32* %7
%27 = sub nsw i32 %25, %26
%28 = add nsw i32 %27, 1
%29 = shl i32 %24, %28
%30 = or i32 %21, %29
ret i32 %30
}

LLVM IR (-O2):
define i32 @setbits(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = shl nsw i32 -1, %2
%6 = xor i32 %5, -1
%7 = sub nsw i32 %1, %2
%8 = add nsw i32 %7, 1
%9 = shl i32 %6, %8
%10 = xor i32 %9, -1
%11 = and i32 %10, %0
%12 = and i32 %6, %3
%13 = shl i32 %12, %8
%14 = or i32 %11, %13
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ error(char *);
int Xfail(int modf, char *label, char *mnemo, char *oper) {
  if (oper && *oper) {
    error(oper);
  } else {
    error("Fail instruction");
  }
  return 0;
}


x86 assembly (clang, -O0):
<Xfail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     1150 <Xfail+0x40>
mov    -0x20(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1150 <Xfail+0x40>
mov    -0x20(%rbp),%rdi
call   1030 <error@plt>
jmp    115c <Xfail+0x4c>
lea    0xea9(%rip),%rdi
call   1030 <error@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Xfail>:
push   %rax
test   %rcx,%rcx
je     1120 <Xfail+0x10>
cmpb   $0x0,(%rcx)
je     1120 <Xfail+0x10>
mov    %rcx,%rdi
jmp    1127 <Xfail+0x17>
lea    0xed9(%rip),%rdi
call   1030 <error@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Fail instruction\00"
define i32 @Xfail(i32 %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store i32 %0, i32* %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %8
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %19
11: ; preds = %4
%12 = load i8*, i8** %8
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %19
16: ; preds = %11
%17 = load i8*, i8** %8
%18 = call i32 @error(i8* %17)
br label %21
19: ; preds = %11, %4
%20 = call i32 @error(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
br label %21
21: ; preds = %19, %16
ret i32 0
}

LLVM IR (-O2):
@.str = [17 x i8] c"Fail instruction\00"
define i32 @Xfail(i32 %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i8* %3) {
%5 = icmp eq i8* %3, null
br i1 %5, label %11, label %6
6: ; preds = %4
%7 = load i8, i8* %3
%8 = icmp eq i8 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %6
%10 = tail call i32 @error(i8* %3)
br label %13
11: ; preds = %6, %4
%12 = tail call i32 @error(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %9
ret i32 0
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMR9D_get(void) { return U_WMRCORENONE_get("U_WMR9D"); }


x86 assembly (clang, -O0):
<U_WMR9D_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR9D_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR9D\00"
define i32 @U_WMR9D_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR9D\00"
define i32 @U_WMR9D_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
float _Complex mul_float_rr(float a, float b) { return a * b; }


x86 assembly (clang, -O0):
<mul_float_rr>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0xc(%rbp)
movss  %xmm1,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
movss  -0x10(%rbp),%xmm1
mulss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
movl   $0x0,-0x4(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mul_float_rr>:
mulss  %xmm1,%xmm0
xorps  %xmm1,%xmm1
movss  %xmm0,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define <2 x float> @mul_float_rr(float %0, float %1) {
%3 = alloca { float, float }
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %4
%7 = load float, float* %5
%8 = fmul float %6, %7
%9 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 0
%10 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 1
store float %8, float* %9
store float 0.000000e+00, float* %10
%11 = bitcast { float, float }* %3 to <2 x float>*
%12 = load <2 x float>, <2 x float>* %11
ret <2 x float> %12
}

LLVM IR (-O2):
define <2 x float> @mul_float_rr(float %0, float %1) {
%3 = fmul float %0, %1
%4 = insertelement <2 x float> <float poison, float 0.000000e+00>, float %3, i64 0
ret <2 x float> %4
}
/* Variables and functions */
int /*<<< orphan*/ atomic_add(unsigned int volatile *, int);
void atomic_add_int(volatile unsigned int *target, int delta) {
  atomic_add(target, delta);
}


x86 assembly (clang, -O0):
<atomic_add_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <atomic_add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_add_int>:
jmp    1030 <atomic_add@plt>

LLVM IR (-O0):
define void @atomic_add_int(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @atomic_add(i32* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @atomic_add_int(i32* %0, i32 %1) {
%3 = tail call i32 @atomic_add(i32* %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRNOTIMPLEMENTED_swap(char *, int);
void U_WMR46_swap(char *record, int torev) {
  U_WMRNOTIMPLEMENTED_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMR46_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRNOTIMPLEMENTED_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR46_swap>:
jmp    1030 <U_WMRNOTIMPLEMENTED_swap@plt>

LLVM IR (-O0):
define void @U_WMR46_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMR46_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %0, i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *dll_fdopen(int, char const *);
FILE *__wrap_fdopen(int filedes, const char *mode) {
  return dll_fdopen(filedes, mode);
}


x86 assembly (clang, -O0):
<__wrap_fdopen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <dll_fdopen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__wrap_fdopen>:
jmp    1030 <dll_fdopen@plt>

LLVM IR (-O0):
define i32* @__wrap_fdopen(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i32* @dll_fdopen(i32 %5, i8* %6)
ret i32* %7
}

LLVM IR (-O2):
define i32* @__wrap_fdopen(i32 %0, i8* %1) {
%3 = tail call i32* @dll_fdopen(i32 %0, i8* %1)
ret i32* %3
}