xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ u_short;

/* Variables and functions */
int /*<<< orphan*/ bpf_error(char *, char const *);
u_short __pcap_nametodnaddr(const char *name) {
  bpf_error("decnet name support not included, '%s' cannot be translated\n",
            name);
}


x86 assembly (clang, -O0):
<__pcap_nametodnaddr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <bpf_error@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__pcap_nametodnaddr>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <bpf_error@plt>

LLVM IR (-O0):
@.str = [61 x i8] c"decnet name support not included, '%s' cannot be translated\0A\00"
define i32 @__pcap_nametodnaddr(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @bpf_error(i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
@.str = [61 x i8] c"decnet name support not included, '%s' cannot be translated\0A\00"
define i32 @__pcap_nametodnaddr(i8* %0) {
%2 = tail call i32 @bpf_error(i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ getppid();
__attribute__((__weak__, __always___)) pid_t softboundmpx_getppid(void) {
  return getppid();
}


x86 assembly (clang, -O0):
<softboundmpx_getppid>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getppid@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_getppid>:
xor    %eax,%eax
jmp    1030 <getppid@plt>

LLVM IR (-O0):
define weak i32 @softboundmpx_getppid() {
%1 = call i32 (...) @getppid()
ret i32 %1
}

LLVM IR (-O2):
define weak i32 @softboundmpx_getppid() {
%1 = tail call i32 (...) @getppid()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void usage(void) {
  fputs("usage: gpicker-simple [-hSMx] [-d dir-seperator] [-n name-separator] "
        "pattern\n",
        stderr);
  exit(0);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%esi
lea    0xecc(%rip),%rdi
call   1030 <fputs@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
lea    0xecf(%rip),%rdi
call   1030 <fputs@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [78 x i8] c"usage: gpicker-simple [-hSMx] [-d dir-seperator] [-n name-separator] pattern\0A\00"
@stderr = global i32 0
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([78 x i8], [78 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [78 x i8] c"usage: gpicker-simple [-hSMx] [-d dir-seperator] [-n name-separator] pattern\0A\00"
@stderr = global i32 0
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([78 x i8], [78 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ panic(char *, int /*<<< orphan*/ *);
int puts(char const *);
int /*<<< orphan*/ *stderr;
int /*<<< orphan*/ *stdout;
int fputs(const char *ch, FILE *stream) {
  if (stream != stderr && stream != stdout) {
    panic("puts stream = %p", stream);
  } else {
    return puts(ch);
  }
  return -1;
}


x86 assembly (clang, -O0):
<fputs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    0x2ea5(%rip),%rcx
cmp    (%rcx),%rax
je     116d <fputs+0x4d>
mov    -0x18(%rbp),%rax
mov    0x2e89(%rip),%rcx
cmp    (%rcx),%rax
je     116d <fputs+0x4d>
mov    -0x18(%rbp),%rsi
lea    0xe9d(%rip),%rdi
call   1040 <panic@plt>
jmp    117e <fputs+0x5e>
mov    -0x10(%rbp),%rdi
call   1030 <puts@plt>
mov    %eax,-0x4(%rbp)
jmp    1185 <fputs+0x65>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fputs>:
push   %rax
mov    0x2eb8(%rip),%rax
cmp    %rsi,(%rax)
je     114c <fputs+0x2c>
mov    0x2ea4(%rip),%rax
cmp    %rsi,(%rax)
je     114c <fputs+0x2c>
lea    0xec0(%rip),%rdi
call   1040 <panic@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@stderr = global i32* null
@stdout = global i32* null
@.str = [17 x i8] c"puts stream = %p\00"
define i32 @fputs(i8* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %4
store i32* %1, i32** %5
%6 = load i32*, i32** %5
%7 = load i32*, i32** @stderr
%8 = icmp ne i32* %6, %7
br i1 %8, label %9, label %16
9: ; preds = %2
%10 = load i32*, i32** %5
%11 = load i32*, i32** @stdout
%12 = icmp ne i32* %10, %11
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = load i32*, i32** %5
%15 = call i32 @panic(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32* %14)
br label %19
16: ; preds = %9, %2
%17 = load i8*, i8** %4
%18 = call i32 @puts(i8* %17)
store i32 %18, i32* %3
br label %20
19: ; preds = %13
store i32 -1, i32* %3
br label %20
20: ; preds = %19, %16
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
@stderr = global i32* null
@stdout = global i32* null
@.str = [17 x i8] c"puts stream = %p\00"
define i32 @fputs(i8* nocapture %0, i32* %1) {
%3 = load i32*, i32** @stderr
%4 = icmp eq i32* %3, %1
%5 = load i32*, i32** @stdout
%6 = icmp eq i32* %5, %1
%7 = select i1 %4, i1 true, i1 %6
br i1 %7, label %10, label %8
8: ; preds = %2
%9 = tail call i32 @panic(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32* %1)
br label %12
10: ; preds = %2
%11 = tail call i32 @puts(i8* dereferenceable(1) %0)
br label %12
12: ; preds = %8, %10
%13 = phi i32 [ -1, %8 ], [ %11, %10 ]
ret i32 %13
}
/* Variables and functions */
int EOF;
size_t fwrite(char const *, size_t, int, int /*<<< orphan*/);
int putchar(char);
int /*<<< orphan*/ stdout;
size_t strlen(char const *);
int puts(const char *string) {
  size_t len = strlen(string);
  if (len == fwrite(string, len, 1, stdout)) {
    return putchar('\n');
  } else
    return EOF;
}


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    0x2e78(%rip),%rax
mov    (%rax),%ecx
mov    $0x1,%edx
call   1050 <fwrite@plt>
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
cmp    %rcx,%rax
jne    118e <puts+0x5e>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    %eax,-0x4(%rbp)
jmp    119a <puts+0x6a>
mov    0x2e53(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    %rax,%r14
mov    0x2e92(%rip),%rax
mov    (%rax),%ecx
mov    %rbx,%rdi
mov    %r14,%rsi
mov    $0x1,%edx
call   1050 <fwrite@plt>
cmp    %rax,%r14
jne    116e <puts+0x3e>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <putchar@plt>
mov    0x2e73(%rip),%rax
mov    (%rax),%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@stdout = global i32 0
@EOF = global i32 0
define i32 @puts(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @strlen(i8* %5)
store i64 %6, i64* %4
%7 = load i64, i64* %4
%8 = load i8*, i8** %3
%9 = load i64, i64* %4
%10 = load i32, i32* @stdout
%11 = call i64 @fwrite(i8* %8, i64 %9, i32 1, i32 %10)
%12 = icmp eq i64 %7, %11
br i1 %12, label %13, label %15
13: ; preds = %1
%14 = call i32 @putchar(i8 signext 10)
store i32 %14, i32* %2
br label %17
15: ; preds = %1
%16 = load i32, i32* @EOF
store i32 %16, i32* %2
br label %17
17: ; preds = %15, %13
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
@stdout = global i32 0
@EOF = global i32 0
define i32 @puts(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = load i32, i32* @stdout
%4 = tail call i64 @fwrite(i8* %0, i64 %2, i32 1, i32 %3)
%5 = icmp eq i64 %2, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 @putchar(i8 signext 10)
br label %10
8: ; preds = %1
%9 = load i32, i32* @EOF
br label %10
10: ; preds = %8, %6
%11 = phi i32 [ %7, %6 ], [ %9, %8 ]
ret i32 %11
}
int test_imm_17uint16_reg(unsigned short val) {
  return ((val) & (0x17 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_17uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x17,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_17uint16_reg>:
test   $0x17,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_17uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 23
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_17uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 23
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int msh_exit(char **args) { return 0; }


x86 assembly (clang, -O0):
<msh_exit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<msh_exit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @msh_exit(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @msh_exit(i8** nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int syscon_multprec_Laurent_size_limit(int k, int *szl) {
  int fail;
  double *c;
  fail = _ada_use_c2phc4c(607, &k, szl, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<syscon_multprec_Laurent_size_limit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x25f,%edi
lea    -0x4(%rbp),%rsi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscon_multprec_Laurent_size_limit>:
push   %rax
mov    %rsi,%rdx
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x25f,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @syscon_multprec_Laurent_size_limit(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
%6 = alloca double*
store i32 %0, i32* %3
store i32* %1, i32** %4
%7 = load i32*, i32** %4
%8 = load double*, double** %6
%9 = call i32 @_ada_use_c2phc4c(i32 607, i32* %3, i32* %7, double* %8, i32 0)
store i32 %9, i32* %5
%10 = load i32, i32* %5
ret i32 %10
}

LLVM IR (-O2):
define i32 @syscon_multprec_Laurent_size_limit(i32 %0, i32* %1) {
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 @_ada_use_c2phc4c(i32 607, i32* %3, i32* %1, double* undef, i32 0)
ret i32 %4
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t count_bit(uint8_t x) {
  const unsigned char ones[] = {0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4};
  return ones[x & 0xf] + ones[x >> 4];
}


x86 assembly (clang, -O0):
<count_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    0xef2(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xeef(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf,%eax
cltq
movzbl -0x20(%rbp,%rax,1),%eax
mov    -0x4(%rbp),%ecx
sar    $0x4,%ecx
movslq %ecx,%rcx
movzbl -0x20(%rbp,%rcx,1),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_bit>:
mov    %edi,%eax
and    $0xf,%eax
lea    0xef4(%rip),%rcx
movzbl (%rax,%rcx,1),%edx
sar    $0x4,%edi
movslq %edi,%rax
movzbl (%rax,%rcx,1),%eax
add    %edx,%eax
ret

LLVM IR (-O0):
@__const.count_bit.ones = [16 x i8] c"\00\01\01\02\01\02\02\03\01\02\02\03\02\03\03\04"
define i32 @count_bit(i32 %0) {
%2 = alloca i32
%3 = alloca [16 x i8]
store i32 %0, i32* %2
%4 = bitcast [16 x i8]* %3 to i8*
%5 = load i32, i32* %2
%6 = and i32 %5, 15
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds [16 x i8], [16 x i8]* %3, i64 0, i64 %7
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = load i32, i32* %2
%12 = ashr i32 %11, 4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds [16 x i8], [16 x i8]* %3, i64 0, i64 %13
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = add nsw i32 %10, %16
ret i32 %17
}

LLVM IR (-O2):
@__const.count_bit.ones = [16 x i8] c"\00\01\01\02\01\02\02\03\01\02\02\03\02\03\03\04"
define i32 @count_bit(i32 %0) {
%2 = and i32 %0, 15
%3 = zext i32 %2 to i64
%4 = getelementptr inbounds [16 x i8], [16 x i8]* @__const.count_bit.ones, i64 0, i64 %3
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = ashr i32 %0, 4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds [16 x i8], [16 x i8]* @__const.count_bit.ones, i64 0, i64 %8
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = add nuw nsw i32 %11, %6
ret i32 %12
}
__attribute__((no, noclone)) long double floorl(long double x) { return x; }


x86 assembly (clang, -O0):
<floorl>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<floorl>:
fldt   0x8(%rsp)
ret

LLVM IR (-O0):
define x86_fp80 @floorl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
ret x86_fp80 %3
}

LLVM IR (-O2):
define x86_fp80 @floorl(x86_fp80 returned %0) {
ret x86_fp80 %0
}
void test64_TestFuncRefPass_targetInit__I() {}


x86 assembly (clang, -O0):
<test64_TestFuncRefPass_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test64_TestFuncRefPass_targetInit__I>:
ret

LLVM IR (-O0):
define void @test64_TestFuncRefPass_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test64_TestFuncRefPass_targetInit__I() {
ret void
}
char *strpbrk(str, set) const char *str;
const char *set;
{
  while (*str != '\0')
    if (strchr(set, *str) == 0)
      ++str;
    else
      return (char *)str;
  return 0;
}


x86 assembly (clang, -O0):
<strpbrk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     116d <strpbrk+0x5d>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rax
movsbl (%rax),%esi
call   1030 <strchr@plt>
cmp    $0x0,%rax
jne    115b <strpbrk+0x4b>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1168 <strpbrk+0x58>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1175 <strpbrk+0x65>
jmp    1120 <strpbrk+0x10>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strpbrk>:
push   %r14
push   %rbx
push   %rax
mov    (%rdi),%al
test   %al,%al
je     113c <strpbrk+0x2c>
mov    %rsi,%r14
mov    %rdi,%rbx
movsbl %al,%esi
mov    %r14,%rdi
call   1030 <strchr@plt>
test   %rax,%rax
jne    113e <strpbrk+0x2e>
movzbl 0x1(%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <strpbrk+0x10>
xor    %ebx,%ebx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strpbrk(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
br label %6
6: ; preds = %23, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %24
11: ; preds = %6
%12 = load i8*, i8** %5
%13 = load i8*, i8** %4
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = call i8* @strchr(i8* %12, i32 %15)
%17 = icmp eq i8* %16, null
br i1 %17, label %18, label %21
18: ; preds = %11
%19 = load i8*, i8** %4
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %4
br label %23
21: ; preds = %11
%22 = load i8*, i8** %4
store i8* %22, i8** %3
br label %25
23: ; preds = %18
br label %6
24: ; preds = %6
store i8* null, i8** %3
br label %25
25: ; preds = %24, %21
%26 = load i8*, i8** %3
ret i8* %26
}

LLVM IR (-O2):
define i8* @strpbrk(i8* %0, i8* %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %11
%6 = phi i8 [ %13, %11 ], [ %3, %2 ]
%7 = phi i8* [ %12, %11 ], [ %0, %2 ]
%8 = sext i8 %6 to i32
%9 = tail call i8* @strchr(i8* dereferenceable(1) %1, i32 %8)
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %5
%12 = getelementptr inbounds i8, i8* %7, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %11, %2
%16 = phi i8* [ null, %2 ], [ null, %11 ], [ %7, %5 ]
ret i8* %16
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fscanf(int /*<<< orphan*/ *, char *, int *);
int lire_int_ascii(FILE *fichier) {
  int entier;
  fscanf(fichier, "%d", &entier);
  return (entier);
}


x86 assembly (clang, -O0):
<lire_int_ascii>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
lea    -0xc(%rbp),%rdx
call   1030 <fscanf@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lire_int_ascii>:
push   %rax
lea    0xee8(%rip),%rsi
lea    0x4(%rsp),%rdx
call   1030 <fscanf@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @lire_int_ascii(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @fscanf(i32* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %3)
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @lire_int_ascii(i32* nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @fscanf(i32* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
ret i32 %5
}
unsigned int unsignedint_ignoring_longdouble(unsigned int x, long double y) {
  return x;
}


x86 assembly (clang, -O0):
<unsignedint_ignoring_longdouble>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
mov    %edi,-0x4(%rbp)
fstpt  -0x20(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsignedint_ignoring_longdouble>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @unsignedint_ignoring_longdouble(i32 %0, x86_fp80 %1) {
%3 = alloca i32
%4 = alloca x86_fp80
store i32 %0, i32* %3
store x86_fp80 %1, x86_fp80* %4
%5 = load i32, i32* %3
ret i32 %5
}

LLVM IR (-O2):
define i32 @unsignedint_ignoring_longdouble(i32 returned %0, x86_fp80 %1) {
ret i32 %0
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void LCDIDDConfigSet(uint32_t ui32Base, uint32_t ui32Config) {
  ;

  ;
  (*((volatile uint32_t *)(ui32Base + 0x0000000C))) = ui32Config;
}


x86 assembly (clang, -O0):
<LCDIDDConfigSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCDIDDConfigSet>:
mov    %rsi,0xc(%rdi)
ret

LLVM IR (-O0):
define void @LCDIDDConfigSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add nsw i64 %6, 12
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @LCDIDDConfigSet(i64 %0, i64 %1) {
%3 = add nsw i64 %0, 12
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}
void avcodec_parameters_to_context() {}


x86 assembly (clang, -O0):
<avcodec_parameters_to_context>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avcodec_parameters_to_context>:
ret

LLVM IR (-O0):
define void @avcodec_parameters_to_context() {
ret void
}

LLVM IR (-O2):
define void @avcodec_parameters_to_context() {
ret void
}
int fun817() { return 817; }


x86 assembly (clang, -O0):
<fun817>:
push   %rbp
mov    %rsp,%rbp
mov    $0x331,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun817>:
mov    $0x331,%eax
ret

LLVM IR (-O0):
define i32 @fun817() {
ret i32 817
}

LLVM IR (-O2):
define i32 @fun817() {
ret i32 817
}
/* Type definitions */
typedef unsigned long uint32_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fscanf(int /*<<< orphan*/ *, char *, unsigned long *);
uint32_t jt_parse_int(FILE *file) {
  unsigned long result;
  fscanf(file, "%lu", &result);
  return result;
}


x86 assembly (clang, -O0):
<jt_parse_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
lea    -0x10(%rbp),%rdx
call   1030 <fscanf@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jt_parse_int>:
push   %rax
lea    0xee8(%rip),%rsi
mov    %rsp,%rdx
call   1030 <fscanf@plt>
mov    (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%lu\00"
define i64 @jt_parse_int(i32* %0) {
%2 = alloca i32*
%3 = alloca i64
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @fscanf(i32* %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64* %3)
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
@.str = [4 x i8] c"%lu\00"
define i64 @jt_parse_int(i32* nocapture %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = call i32 @fscanf(i32* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64* %2)
%5 = load i64, i64* %2
ret i64 %5
}
/* Variables and functions */
char *GetEnvVar(char const *);
int atoi(char const *);
int ReturnEnvVarInt(const char *name) {
  const char *s = GetEnvVar(name);
  return s ? atoi(s) : 0;
}


x86 assembly (clang, -O0):
<ReturnEnvVarInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <GetEnvVar@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1155 <ReturnEnvVarInt+0x35>
mov    -0x10(%rbp),%rdi
call   1040 <atoi@plt>
mov    %eax,-0x14(%rbp)
jmp    115f <ReturnEnvVarInt+0x3f>
xor    %eax,%eax
mov    %eax,-0x14(%rbp)
jmp    115f <ReturnEnvVarInt+0x3f>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReturnEnvVarInt>:
push   %rax
call   1030 <GetEnvVar@plt>
test   %rax,%rax
je     1134 <ReturnEnvVarInt+0x14>
mov    %rax,%rdi
pop    %rax
jmp    1040 <atoi@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ReturnEnvVarInt(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @GetEnvVar(i8* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i32 @atoi(i8* %9)
br label %12
11: ; preds = %1
br label %12
12: ; preds = %11, %8
%13 = phi i32 [ %10, %8 ], [ 0, %11 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @ReturnEnvVarInt(i8* %0) {
%2 = tail call i8* @GetEnvVar(i8* %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @atoi(i8* %2)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ %5, %4 ], [ 0, %1 ]
ret i32 %7
}
void dummy_pixel(int x __attribute__((unused)), int y __attribute__((unused)),
                 int c __attribute__((unused))) {}


x86 assembly (clang, -O0):
<dummy_pixel>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy_pixel>:
ret

LLVM IR (-O0):
define void @dummy_pixel(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
define void @dummy_pixel(i32 %0, i32 %1, i32 %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delm(int *);
int delete (int msgvec[]) {
  delm(msgvec);
  return (0);
}


x86 assembly (clang, -O0):
<delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <delm@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delete>:
push   %rax
call   1030 <delm@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @delete(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @delm(i32* %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @delete(i32* %0) {
%2 = tail call i32 @delm(i32* %0)
ret i32 0
}
void set_dnsport() {}


x86 assembly (clang, -O0):
<set_dnsport>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_dnsport>:
ret

LLVM IR (-O0):
define void @set_dnsport() {
ret void
}

LLVM IR (-O2):
define void @set_dnsport() {
ret void
}
/* Type definitions */
struct tcb {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ scheduler_push_tcb(struct tcb *);
void scheduler_add_tcb(struct tcb *tcb) { scheduler_push_tcb(tcb); }


x86 assembly (clang, -O0):
<scheduler_add_tcb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <scheduler_push_tcb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scheduler_add_tcb>:
jmp    1030 <scheduler_push_tcb@plt>

LLVM IR (-O0):
%struct.tcb = type { i32 }
define void @scheduler_add_tcb(%struct.tcb* %0) {
%2 = alloca %struct.tcb*
store %struct.tcb* %0, %struct.tcb** %2
%3 = load %struct.tcb*, %struct.tcb** %2
%4 = call i32 @scheduler_push_tcb(%struct.tcb* %3)
ret void
}

LLVM IR (-O2):
%struct.tcb = type { i32 }
define void @scheduler_add_tcb(%struct.tcb* %0) {
%2 = tail call i32 @scheduler_push_tcb(%struct.tcb* %0)
ret void
}
/* Type definitions */
struct rw_semaphore {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __downgrade_write(struct rw_semaphore *);
__attribute__((always_)) void downgrade_write(struct rw_semaphore *sem) {
  ;
  __downgrade_write(sem);
  ;
}


x86 assembly (clang, -O0):
<downgrade_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__downgrade_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<downgrade_write>:
jmp    1030 <__downgrade_write@plt>

LLVM IR (-O0):
%struct.rw_semaphore = type { i32 }
define void @downgrade_write(%struct.rw_semaphore* %0) {
%2 = alloca %struct.rw_semaphore*
store %struct.rw_semaphore* %0, %struct.rw_semaphore** %2
%3 = load %struct.rw_semaphore*, %struct.rw_semaphore** %2
%4 = call i32 @__downgrade_write(%struct.rw_semaphore* %3)
ret void
}

LLVM IR (-O2):
%struct.rw_semaphore = type { i32 }
define void @downgrade_write(%struct.rw_semaphore* %0) {
%2 = tail call i32 @__downgrade_write(%struct.rw_semaphore* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sscanf(char *, char *, char *);
char *get_meta_variation_len(char *len, char *meta) {
  sscanf(meta, "%s", len);
  return len;
}


x86 assembly (clang, -O0):
<get_meta_variation_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rdx
lea    0xed1(%rip),%rsi
call   1030 <sscanf@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_meta_variation_len>:
push   %rbx
mov    %rsi,%rax
mov    %rdi,%rbx
lea    0xee2(%rip),%rsi
mov    %rax,%rdi
mov    %rbx,%rdx
call   1030 <sscanf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i8* @get_meta_variation_len(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i8*, i8** %3
%7 = call i32 @sscanf(i8* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = load i8*, i8** %3
ret i8* %8
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i8* @get_meta_variation_len(i8* returned %0, i8* nocapture %1) {
%3 = tail call i32 @sscanf(i8* %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i8* %0
}
const char *check_cptr_MAIL_STREAMchar(const char *v) { return v; }


x86 assembly (clang, -O0):
<check_cptr_MAIL_STREAMchar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_cptr_MAIL_STREAMchar>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @check_cptr_MAIL_STREAMchar(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @check_cptr_MAIL_STREAMchar(i8* readnone returned %0) {
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ tokenise(char *);
int main() {
  char *test = "select foo";
  tokenise(test);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <tokenise@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <tokenise@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"select foo\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @tokenise(i8* %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"select foo\00"
define i32 @main() {
%1 = tail call i32 @tokenise(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
int main() {
  char a;
  int b;
  if (a > 10) {
    a = 3;
    b = 10;
  } else
    a = 5;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0xa,%eax
jle    1128 <main+0x28>
movb   $0x3,-0x5(%rbp)
movl   $0xa,-0xc(%rbp)
jmp    112c <main+0x2c>
movb   $0x5,-0x5(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i32
store i32 0, i32* %1
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = icmp sgt i32 %5, 10
br i1 %6, label %7, label %8
7: ; preds = %0
store i8 3, i8* %2
store i32 10, i32* %3
br label %9
8: ; preds = %0
store i8 5, i8* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void hc_must_pair(unsigned int i, char c_option, char *hc, int *index) {
  hc[index[i] + i] &= ~c_option;
}


x86 assembly (clang, -O0):
<hc_must_pair>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
movsbl -0x5(%rbp),%esi
xor    $0xffffffff,%esi
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    -0x4(%rbp),%edx
mov    (%rcx,%rdx,4),%ecx
add    -0x4(%rbp),%ecx
mov    %ecx,%ecx
movsbl (%rax,%rcx,1),%edx
and    %esi,%edx
mov    %dl,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<hc_must_pair>:
mov    %edi,%eax
add    (%rcx,%rax,4),%edi
not    %sil
and    %sil,(%rdx,%rdi,1)
ret

LLVM IR (-O0):
define void @hc_must_pair(i32 %0, i8 signext %1, i8* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i8
%7 = alloca i8*
%8 = alloca i32*
store i32 %0, i32* %5
store i8 %1, i8* %6
store i8* %2, i8** %7
store i32* %3, i32** %8
%9 = load i8, i8* %6
%10 = sext i8 %9 to i32
%11 = xor i32 %10, -1
%12 = load i8*, i8** %7
%13 = load i32*, i32** %8
%14 = load i32, i32* %5
%15 = zext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32, i32* %5
%19 = add i32 %17, %18
%20 = zext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %12, i64 %20
%22 = load i8, i8* %21
%23 = sext i8 %22 to i32
%24 = and i32 %23, %11
%25 = trunc i32 %24 to i8
store i8 %25, i8* %21
ret void
}

LLVM IR (-O2):
define void @hc_must_pair(i32 %0, i8 signext %1, i8* nocapture %2, i32* nocapture %3) {
%5 = xor i8 %1, -1
%6 = zext i32 %0 to i64
%7 = getelementptr inbounds i32, i32* %3, i64 %6
%8 = load i32, i32* %7
%9 = add i32 %8, %0
%10 = zext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %2, i64 %10
%12 = load i8, i8* %11
%13 = and i8 %12, %5
store i8 %13, i8* %11
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ _Nios2_Flush_pipeline();
int /*<<< orphan*/ _Nios2_Set_ctlreg_mpuacc(int /*<<< orphan*/);
int /*<<< orphan*/ _Nios2_Set_ctlreg_mpubase(int /*<<< orphan*/);
void _Nios2_MPU_Set_region_registers(uint32_t mpubase, uint32_t mpuacc) {
  _Nios2_Set_ctlreg_mpubase(mpubase);
  _Nios2_Set_ctlreg_mpuacc(mpuacc);
  _Nios2_Flush_pipeline();
}


x86 assembly (clang, -O0):
<_Nios2_MPU_Set_region_registers>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <_Nios2_Set_ctlreg_mpubase@plt>
mov    -0x8(%rbp),%edi
call   1030 <_Nios2_Set_ctlreg_mpuacc@plt>
mov    $0x0,%al
call   1050 <_Nios2_Flush_pipeline@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Nios2_MPU_Set_region_registers>:
push   %rbx
mov    %esi,%ebx
call   1040 <_Nios2_Set_ctlreg_mpubase@plt>
mov    %ebx,%edi
call   1030 <_Nios2_Set_ctlreg_mpuacc@plt>
xor    %eax,%eax
pop    %rbx
jmp    1050 <_Nios2_Flush_pipeline@plt>

LLVM IR (-O0):
define void @_Nios2_MPU_Set_region_registers(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @_Nios2_Set_ctlreg_mpubase(i32 %5)
%7 = load i32, i32* %4
%8 = call i32 @_Nios2_Set_ctlreg_mpuacc(i32 %7)
%9 = call i32 (...) @_Nios2_Flush_pipeline()
ret void
}

LLVM IR (-O2):
define void @_Nios2_MPU_Set_region_registers(i32 %0, i32 %1) {
%3 = tail call i32 @_Nios2_Set_ctlreg_mpubase(i32 %0)
%4 = tail call i32 @_Nios2_Set_ctlreg_mpuacc(i32 %1)
%5 = tail call i32 (...) @_Nios2_Flush_pipeline()
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ window;
};
typedef TYPE_1__ XCirculateRequestEvent;

/* Variables and functions */
unsigned long get_XCirculateRequestEvent_window(void *_p) {
  return (unsigned long)((XCirculateRequestEvent *)_p)->window;
}


x86 assembly (clang, -O0):
<get_XCirculateRequestEvent_window>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XCirculateRequestEvent_window>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XCirculateRequestEvent_window(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XCirculateRequestEvent_window(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
unsigned internetPackIp(unsigned char unpacked[4]) {
  int i;
  unsigned packed = 0;
  for (i = 0; i <= 3; ++i) {
    packed <<= 8;
    packed |= unpacked[i];
  }
  return packed;
}


x86 assembly (clang, -O0):
<internetPackIp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x3,-0xc(%rbp)
jg     1149 <internetPackIp+0x49>
mov    -0x10(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movzbl (%rax,%rcx,1),%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <internetPackIp+0x16>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<internetPackIp>:
mov    (%rdi),%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @internetPackIp(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %19, %1
%6 = load i32, i32* %3
%7 = icmp sle i32 %6, 3
br i1 %7, label %8, label %22
8: ; preds = %5
%9 = load i32, i32* %4
%10 = shl i32 %9, 8
store i32 %10, i32* %4
%11 = load i8*, i8** %2
%12 = load i32, i32* %3
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = load i32, i32* %4
%18 = or i32 %17, %16
store i32 %18, i32* %4
br label %19
19: ; preds = %8
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 1
store i32 %21, i32* %3
br label %5
22: ; preds = %5
%23 = load i32, i32* %4
ret i32 %23
}

LLVM IR (-O2):
define i32 @internetPackIp(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl nuw nsw i32 %3, 16
%8 = shl nuw nsw i32 %6, 8
%9 = or i32 %7, %8
%10 = getelementptr inbounds i8, i8* %0, i64 2
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = or i32 %9, %12
%14 = shl nuw i32 %13, 8
%15 = getelementptr inbounds i8, i8* %0, i64 3
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = or i32 %14, %17
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ assert_mem_eq(int *, int *, int);
void test_assert_mem_eq_pass(void) {
  int a[6] = {1, 2, 3, 4, 5, 6};
  int b[6] = {1, 2, 3, 4, 5, 6};
  assert_mem_eq(a, b, 0);
  assert_mem_eq(a, b, 6);
}


x86 assembly (clang, -O0):
<test_assert_mem_eq_pass>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0xee1(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xede(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xedb(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xee0(%rip),%rax
mov    %rax,-0x40(%rbp)
mov    0xedd(%rip),%rax
mov    %rax,-0x38(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x30(%rbp)
lea    -0x20(%rbp),%rdi
lea    -0x40(%rbp),%rsi
xor    %edx,%edx
call   1030 <assert_mem_eq@plt>
lea    -0x20(%rbp),%rdi
lea    -0x40(%rbp),%rsi
mov    $0x6,%edx
call   1030 <assert_mem_eq@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_assert_mem_eq_pass>:
push   %r14
push   %rbx
sub    $0x38,%rsp
mov    0xef2(%rip),%rax
mov    %rax,0x30(%rsp)
movaps 0xed6(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
mov    %rax,0x10(%rsp)
movaps %xmm0,(%rsp)
lea    0x20(%rsp),%rbx
mov    %rsp,%r14
mov    %rbx,%rdi
mov    %r14,%rsi
xor    %edx,%edx
call   1030 <assert_mem_eq@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    $0x6,%edx
call   1030 <assert_mem_eq@plt>
add    $0x38,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@__const.test_assert_mem_eq_pass.a = [6 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5, i32 6]
@__const.test_assert_mem_eq_pass.b = [6 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5, i32 6]
define void @test_assert_mem_eq_pass() {
%1 = alloca [6 x i32]
%2 = alloca [6 x i32]
%3 = bitcast [6 x i32]* %1 to i8*
%4 = bitcast [6 x i32]* %2 to i8*
%5 = getelementptr inbounds [6 x i32], [6 x i32]* %1, i64 0, i64 0
%6 = getelementptr inbounds [6 x i32], [6 x i32]* %2, i64 0, i64 0
%7 = call i32 @assert_mem_eq(i32* %5, i32* %6, i32 0)
%8 = getelementptr inbounds [6 x i32], [6 x i32]* %1, i64 0, i64 0
%9 = getelementptr inbounds [6 x i32], [6 x i32]* %2, i64 0, i64 0
%10 = call i32 @assert_mem_eq(i32* %8, i32* %9, i32 6)
ret void
}

LLVM IR (-O2):
@__const.test_assert_mem_eq_pass.b = [6 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5, i32 6]
define void @test_assert_mem_eq_pass() {
%1 = alloca [6 x i32]
%2 = alloca [6 x i32]
%3 = bitcast [6 x i32]* %1 to i8*
%4 = bitcast [6 x i32]* %2 to i8*
%5 = getelementptr inbounds [6 x i32], [6 x i32]* %1, i64 0, i64 0
%6 = getelementptr inbounds [6 x i32], [6 x i32]* %2, i64 0, i64 0
%7 = call i32 @assert_mem_eq(i32* %5, i32* %6, i32 0)
%8 = call i32 @assert_mem_eq(i32* %5, i32* %6, i32 6)
ret void
}
/* Variables and functions */
int hello();
__attribute__((visibility("hidden"))) int main() { return hello(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <hello@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <hello@plt>

LLVM IR (-O0):
define hidden i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @hello()
ret i32 %2
}

LLVM IR (-O2):
define hidden i32 @main() {
%1 = tail call i32 (...) @hello()
ret i32 %1
}
int test_imm_A5uint32_mem(unsigned int *val) {
  return ((*val) & (0xA5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A5uint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xa5,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A5uint32_mem>:
testb  $0xa5,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A5uint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 165
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A5uint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 165
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int write(int, unsigned char *, int);
int write_large_buffer(int, unsigned char *, int);
int write_buffer(int fd, unsigned char *buf, int len) {
  if (len > 20) {
    return write_large_buffer(fd, buf, len);
  }
  return write(fd, buf, len);
}


x86 assembly (clang, -O0):
<write_buffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x14,-0x14(%rbp)
jle    1153 <write_buffer+0x33>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <write_large_buffer@plt>
mov    %eax,-0x4(%rbp)
jmp    1165 <write_buffer+0x45>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <write@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_buffer>:
cmp    $0x15,%edx
jl     112a <write_buffer+0xa>
jmp    1040 <write_large_buffer@plt>
jmp    1030 <write@plt>

LLVM IR (-O0):
define i32 @write_buffer(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%8 = load i32, i32* %7
%9 = icmp sgt i32 %8, 20
br i1 %9, label %10, label %15
10: ; preds = %3
%11 = load i32, i32* %5
%12 = load i8*, i8** %6
%13 = load i32, i32* %7
%14 = call i32 @write_large_buffer(i32 %11, i8* %12, i32 %13)
store i32 %14, i32* %4
br label %20
15: ; preds = %3
%16 = load i32, i32* %5
%17 = load i8*, i8** %6
%18 = load i32, i32* %7
%19 = call i32 @write(i32 %16, i8* %17, i32 %18)
store i32 %19, i32* %4
br label %20
20: ; preds = %15, %10
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @write_buffer(i32 %0, i8* %1, i32 %2) {
%4 = icmp sgt i32 %2, 20
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 @write_large_buffer(i32 %0, i8* %1, i32 %2)
br label %9
7: ; preds = %3
%8 = tail call i32 @write(i32 %0, i8* %1, i32 %2)
br label %9
9: ; preds = %7, %5
%10 = phi i32 [ %6, %5 ], [ %8, %7 ]
ret i32 %10
}
/* Variables and functions */
unsigned char inb(int);
int /*<<< orphan*/ slow_down_io();
__attribute__((always_)) unsigned char inb_p(int port) {
  unsigned char value = inb(port);
  slow_down_io();
  return value;
}


x86 assembly (clang, -O0):
<inb_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <inb@plt>
mov    %al,-0x5(%rbp)
mov    $0x0,%al
call   1040 <slow_down_io@plt>
movzbl -0x5(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inb_p>:
push   %rbx
call   1030 <inb@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <slow_down_io@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define zeroext i8 @inb_p(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call zeroext i8 @inb(i32 %4)
store i8 %5, i8* %3
%6 = call i32 (...) @slow_down_io()
%7 = load i8, i8* %3
ret i8 %7
}

LLVM IR (-O2):
define zeroext i8 @inb_p(i32 %0) {
%2 = tail call zeroext i8 @inb(i32 %0)
%3 = tail call i32 (...) @slow_down_io()
ret i8 %2
}
int main() {
  int x = 10;
  char c[8] = "Hello!";
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
mov    0xee7(%rip),%rax
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@__const.main.c = [8 x i8] c"Hello!\00\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [8 x i8]
store i32 0, i32* %1
store i32 10, i32* %2
%4 = bitcast [8 x i8]* %3 to i8*
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
int checker(int a[], int n, int len) {
  int i = 0;
  for (; i < len; i++) {
    if (a[i] == n) {
      return 0;
    }
  }
  return 1;
}


x86 assembly (clang, -O0):
<checker>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    1154 <checker+0x54>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x14(%rbp),%eax
jne    1141 <checker+0x41>
movl   $0x0,-0x4(%rbp)
jmp    115b <checker+0x5b>
jmp    1146 <checker+0x46>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1115 <checker+0x15>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checker>:
mov    $0x1,%eax
test   %edx,%edx
jle    111e <checker+0x1e>
mov    %edx,%ecx
xor    %edx,%edx
nopl   (%rax)
cmp    %esi,(%rdi,%rdx,4)
je     111f <checker+0x1f>
add    $0x1,%rdx
cmp    %rdx,%rcx
jne    1110 <checker+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @checker(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %23, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %7
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %26
13: ; preds = %9
%14 = load i32*, i32** %5
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %6
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %22
21: ; preds = %13
store i32 0, i32* %4
br label %27
22: ; preds = %13
br label %23
23: ; preds = %22
%24 = load i32, i32* %8
%25 = add nsw i32 %24, 1
store i32 %25, i32* %8
br label %9
26: ; preds = %9
store i32 1, i32* %4
br label %27
27: ; preds = %26, %21
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @checker(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %15
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %9
7: ; preds = %9
%8 = icmp eq i64 %14, %6
br i1 %8, label %15, label %9
9: ; preds = %5, %7
%10 = phi i64 [ 0, %5 ], [ %14, %7 ]
%11 = getelementptr inbounds i32, i32* %0, i64 %10
%12 = load i32, i32* %11
%13 = icmp eq i32 %12, %1
%14 = add nuw nsw i64 %10, 1
br i1 %13, label %15, label %7
15: ; preds = %9, %7, %3
%16 = phi i32 [ 1, %3 ], [ 1, %7 ], [ 0, %9 ]
ret i32 %16
}