xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
double difftime(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int /*<<< orphan*/ tmfprintf(int /*<<< orphan*/ *, char *, double);
void update_waitstat(FILE *log, time_t end_time) {
  double tdiff = difftime(end_time, time(NULL));
  (void)tmfprintf(log, "%.0f\tseconds till recording begins\n", tdiff);
}


x86 assembly (clang, -O0):
<update_waitstat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    -0x1c(%rbp),%edi
mov    %eax,%esi
call   1030 <difftime@plt>
movsd  %xmm0,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
movsd  -0x18(%rbp),%xmm0
lea    0xe93(%rip),%rsi
call   1050 <tmfprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<update_waitstat>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
xor    %edi,%edi
call   1040 <time@plt>
mov    %ebx,%edi
mov    %eax,%esi
call   1030 <difftime@plt>
lea    0xeb0(%rip),%rsi
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1050 <tmfprintf@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"%.0f\09seconds till recording begins\0A\00"
define void @update_waitstat(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca double
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = call i32 @time(i32* null)
%8 = call double @difftime(i32 %6, i32 %7)
store double %8, double* %5
%9 = load i32*, i32** %3
%10 = load double, double* %5
%11 = call i32 @tmfprintf(i32* %9, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), double %10)
ret void
}

LLVM IR (-O2):
@.str = [36 x i8] c"%.0f\09seconds till recording begins\0A\00"
define void @update_waitstat(i32* %0, i32 %1) {
%3 = tail call i32 @time(i32* null)
%4 = tail call double @difftime(i32 %1, i32 %3)
%5 = tail call i32 @tmfprintf(i32* %0, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), double %4)
ret void
}
/* Variables and functions */
int memcmp(unsigned char *, unsigned char *, int);
int FHASH_CompareKeys(unsigned char *key1, int key_len1, unsigned char *key2,
                      int key_len2) {
  int rc;
  if (key_len1 > key_len2)
    rc = memcmp(key1, key2, key_len2);
  else
    rc = memcmp(key1, key2, key_len1);
  if (!rc)
    rc = key_len1 - key_len2;
  return rc;
}


x86 assembly (clang, -O0):
<FHASH_CompareKeys>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x1c(%rbp),%eax
jle    114a <FHASH_CompareKeys+0x3a>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <memcmp@plt>
mov    %eax,-0x20(%rbp)
jmp    115d <FHASH_CompareKeys+0x4d>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <memcmp@plt>
mov    %eax,-0x20(%rbp)
cmpl   $0x0,-0x20(%rbp)
jne    1170 <FHASH_CompareKeys+0x60>
mov    -0xc(%rbp),%eax
sub    -0x1c(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FHASH_CompareKeys>:
push   %rbx
mov    %esi,%eax
mov    %esi,%ebx
sub    %ecx,%ebx
cmovg  %ecx,%eax
mov    %rdx,%rsi
mov    %eax,%edx
call   1030 <memcmp@plt>
test   %eax,%eax
cmove  %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @FHASH_CompareKeys(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%10 = load i32, i32* %6
%11 = load i32, i32* %8
%12 = icmp sgt i32 %10, %11
br i1 %12, label %13, label %18
13: ; preds = %4
%14 = load i8*, i8** %5
%15 = load i8*, i8** %7
%16 = load i32, i32* %8
%17 = call i32 @memcmp(i8* %14, i8* %15, i32 %16)
store i32 %17, i32* %9
br label %23
18: ; preds = %4
%19 = load i8*, i8** %5
%20 = load i8*, i8** %7
%21 = load i32, i32* %6
%22 = call i32 @memcmp(i8* %19, i8* %20, i32 %21)
store i32 %22, i32* %9
br label %23
23: ; preds = %18, %13
%24 = load i32, i32* %9
%25 = icmp ne i32 %24, 0
br i1 %25, label %30, label %26
26: ; preds = %23
%27 = load i32, i32* %6
%28 = load i32, i32* %8
%29 = sub nsw i32 %27, %28
store i32 %29, i32* %9
br label %30
30: ; preds = %26, %23
%31 = load i32, i32* %9
ret i32 %31
}

LLVM IR (-O2):
define i32 @FHASH_CompareKeys(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = icmp sgt i32 %1, %3
%6 = select i1 %5, i32 %3, i32 %1
%7 = tail call i32 @memcmp(i8* %0, i8* %2, i32 %6)
%8 = icmp eq i32 %7, 0
%9 = sub nsw i32 %1, %3
%10 = select i1 %8, i32 %9, i32 %7
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ ft_putnbr(int);
int main(void) {
  int n;
  n = -3;
  n = (n > 0) ? n : -n;
  ft_putnbr(n);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xfffffffd,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    113b <main+0x2b>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1143 <main+0x33>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <ft_putnbr@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x3,%edi
call   1030 <ft_putnbr@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 -3, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = load i32, i32* %2
br label %10
7: ; preds = %0
%8 = load i32, i32* %2
%9 = sub nsw i32 0, %8
br label %10
10: ; preds = %7, %5
%11 = phi i32 [ %6, %5 ], [ %9, %7 ]
store i32 %11, i32* %2
%12 = load i32, i32* %2
%13 = call i32 @ft_putnbr(i32 %12)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @ft_putnbr(i32 3)
ret i32 0
}
int mx53_revision(void) { return 0; }


x86 assembly (clang, -O0):
<mx53_revision>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mx53_revision>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mx53_revision() {
ret i32 0
}

LLVM IR (-O2):
define i32 @mx53_revision() {
ret i32 0
}
long long num_pow(long long base, long long exp) {
  long long r = base;
  for (long long i = 0; i < exp - 1; i++) {
    r = r * base;
  }
  return (r);
}


x86 assembly (clang, -O0):
<num_pow>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    $0x1,%rcx
cmp    %rcx,%rax
jge    114f <num_pow+0x4f>
mov    -0x18(%rbp),%rax
imul   -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    111c <num_pow+0x1c>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<num_pow>:
cmp    $0x2,%rsi
jl     116b <num_pow+0x6b>
lea    -0x1(%rsi),%rdx
add    $0xfffffffffffffffe,%rsi
mov    %edx,%ecx
and    $0x7,%ecx
mov    %rdi,%rax
cmp    $0x7,%rsi
jb     1156 <num_pow+0x56>
and    $0xfffffffffffffff8,%rdx
mov    %rdi,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
imul   %rdi,%rax
imul   %rdi,%rax
imul   %rdi,%rax
imul   %rdi,%rax
imul   %rdi,%rax
imul   %rdi,%rax
imul   %rdi,%rax
imul   %rdi,%rax
add    $0xfffffffffffffff8,%rdx
jne    1130 <num_pow+0x30>
test   %rcx,%rcx
je     116a <num_pow+0x6a>
nopl   0x0(%rax,%rax,1)
imul   %rdi,%rax
add    $0xffffffffffffffff,%rcx
jne    1160 <num_pow+0x60>
ret
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @num_pow(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%7 = load i64, i64* %3
store i64 %7, i64* %5
store i64 0, i64* %6
br label %8
8: ; preds = %17, %2
%9 = load i64, i64* %6
%10 = load i64, i64* %4
%11 = sub nsw i64 %10, 1
%12 = icmp slt i64 %9, %11
br i1 %12, label %13, label %20
13: ; preds = %8
%14 = load i64, i64* %5
%15 = load i64, i64* %3
%16 = mul nsw i64 %14, %15
store i64 %16, i64* %5
br label %17
17: ; preds = %13
%18 = load i64, i64* %6
%19 = add nsw i64 %18, 1
store i64 %19, i64* %6
br label %8
20: ; preds = %8
%21 = load i64, i64* %5
ret i64 %21
}

LLVM IR (-O2):
define i64 @num_pow(i64 %0, i64 %1) {
%3 = add i64 %1, -1
%4 = icmp sgt i64 %1, 1
br i1 %4, label %5, label %21
5: ; preds = %2
%6 = add i64 %1, -2
%7 = and i64 %3, 7
%8 = icmp ult i64 %6, 7
br i1 %8, label %11, label %9
9: ; preds = %5
%10 = and i64 %3, -8
br label %23
11: ; preds = %23, %5
%12 = phi i64 [ undef, %5 ], [ %33, %23 ]
%13 = phi i64 [ %0, %5 ], [ %33, %23 ]
%14 = icmp eq i64 %7, 0
br i1 %14, label %21, label %15
15: ; preds = %11, %15
%16 = phi i64 [ %18, %15 ], [ %13, %11 ]
%17 = phi i64 [ %19, %15 ], [ 0, %11 ]
%18 = mul nsw i64 %16, %0
%19 = add i64 %17, 1
%20 = icmp eq i64 %19, %7
br i1 %20, label %21, label %15
21: ; preds = %11, %15, %2
%22 = phi i64 [ %0, %2 ], [ %12, %11 ], [ %18, %15 ]
ret i64 %22
23: ; preds = %23, %9
%24 = phi i64 [ %0, %9 ], [ %33, %23 ]
%25 = phi i64 [ 0, %9 ], [ %34, %23 ]
%26 = mul nsw i64 %24, %0
%27 = mul nsw i64 %26, %0
%28 = mul nsw i64 %27, %0
%29 = mul nsw i64 %28, %0
%30 = mul nsw i64 %29, %0
%31 = mul nsw i64 %30, %0
%32 = mul nsw i64 %31, %0
%33 = mul nsw i64 %32, %0
%34 = add i64 %25, 8
%35 = icmp eq i64 %34, %10
br i1 %35, label %11, label %23
}
double interpolation_spline(void) {
  double valueInterpolated = 0;
  return valueInterpolated;
}


x86 assembly (clang, -O0):
<interpolation_spline>:
push   %rbp
mov    %rsp,%rbp
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<interpolation_spline>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @interpolation_spline() {
%1 = alloca double
store double 0.000000e+00, double* %1
%2 = load double, double* %1
ret double %2
}

LLVM IR (-O2):
define double @interpolation_spline() {
ret double 0.000000e+00
}
/* Variables and functions */
int /*<<< orphan*/ acc_copyin(int *, int);
int main(int argc, char *argv[]) {
  int i;
  acc_copyin(&i, sizeof i);
#pragma acc data copy(i)
  ++i;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x14(%rbp),%rdi
mov    $0x4,%esi
call   1030 <acc_copyin@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0x4(%rsp),%rdi
mov    $0x4,%esi
call   1030 <acc_copyin@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 @acc_copyin(i32* %6, i32 4)
%8 = load i32, i32* %6
%9 = add nsw i32 %8, 1
store i32 %9, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @acc_copyin(i32* %3, i32 4)
ret i32 0
}
int iscntrl(int c) { return ((c == 0x7F) || (c >= 0 && c <= 0x1F)); }


x86 assembly (clang, -O0):
<iscntrl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x7f,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1135 <iscntrl+0x35>
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     112f <iscntrl+0x2f>
cmpl   $0x1f,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iscntrl>:
cmp    $0x7f,%edi
sete   %al
cmp    $0x20,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @iscntrl(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 127
br i1 %4, label %13, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sge i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp sle i32 %9, 31
br label %11
11: ; preds = %8, %5
%12 = phi i1 [ false, %5 ], [ %10, %8 ]
br label %13
13: ; preds = %11, %1
%14 = phi i1 [ true, %1 ], [ %12, %11 ]
%15 = zext i1 %14 to i32
ret i32 %15
}

LLVM IR (-O2):
define i32 @iscntrl(i32 %0) {
%2 = icmp eq i32 %0, 127
%3 = icmp ult i32 %0, 32
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
void fa20(void) {
P0A:
  goto P0A;
  ({
    p01A:
      goto p01A;
      goto a;
    P01A:
      goto P01A;
      ({
        P012A:
          goto P012A;
          0;
      });
    P01B:
      goto P01B;
      ({
        P013A:
          goto P013A;
          0;
      });
    P01C:
      goto P01C;
      0;
  });
a:
  ({
    P02A:
      goto P02A;
      ({
        P024A:
          goto P024A;
          0;
      });
    P02B:
      goto P02B;
      ({
        P025A:
          goto P025A;
          0;
      });
    P02C:
      goto P02C;
      0;
  });
P0C:
  goto P0C;
  0;
P0D:
  goto P0D;
}


x86 assembly (clang, -O0):
<fa20>:
push   %rbp
mov    %rsp,%rbp
jmp    1104 <fa20+0x4>

x86 assembly (clang, -O2):
<fa20>:
jmp    1100 <fa20>

LLVM IR (-O0):
define void @fa20() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
br label %7
7: ; preds = %7, %0
br label %7
8: ; No predecessors!
br label %9
9: ; preds = %9, %8
br label %9
10: ; preds = %10
br label %10
11: ; No predecessors!
br label %12
12: ; preds = %12, %11
br label %12
13: ; preds = %13
br label %13
14: ; No predecessors!
br label %15
15: ; preds = %15, %14
br label %15
16: ; preds = %16
br label %16
17: ; No predecessors!
br label %18
18: ; preds = %18, %17
br label %18
19: ; No predecessors!
br label %20
20: ; preds = %20, %19
br label %20
21: ; preds = %21
br label %21
22: ; No predecessors!
br label %23
23: ; preds = %23, %22
br label %23
24: ; preds = %24
br label %24
25: ; preds = %25
br label %25
26: ; preds = %26
br label %26
}

LLVM IR (-O2):
define void @fa20() {
br label %1
1: ; preds = %1, %0
br label %1
}
unsigned int my_mixed_hash(void *key) {
  unsigned char *k;
  unsigned int hash;
  k = (unsigned char *)key;
  hash = 0;
  while (*k) {
    hash *= 16777619;
    hash ^= *k++;
  }
  return (hash);
}


x86 assembly (clang, -O0):
<my_mixed_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     114b <my_mixed_hash+0x4b>
imul   $0x1000193,-0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movzbl (%rax),%eax
xor    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1117 <my_mixed_hash+0x17>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_mixed_hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1127 <my_mixed_hash+0x27>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
imul   $0x1000193,%eax,%edx
movzbl %cl,%eax
xor    %edx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <my_mixed_hash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @my_mixed_hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8* %5, i8** %3
store i32 0, i32* %4
br label %6
6: ; preds = %10, %1
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i32, i32* %4
%12 = mul i32 %11, 16777619
store i32 %12, i32* %4
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %3
%15 = load i8, i8* %13
%16 = zext i8 %15 to i32
%17 = load i32, i32* %4
%18 = xor i32 %17, %16
store i32 %18, i32* %4
br label %6
19: ; preds = %6
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @my_mixed_hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 0, %1 ]
%7 = phi i8* [ %9, %4 ], [ %0, %1 ]
%8 = mul i32 %6, 16777619
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = zext i8 %5 to i32
%11 = xor i32 %8, %10
%12 = load i8, i8* %9
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i32 [ 0, %1 ], [ %11, %4 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M590_f(char *s) {
  debug("M590_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M590_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M590_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M590_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M590_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M590_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M590_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
void swap(int *arr, int ia, int ib) {
  int aux = arr[ib];
  arr[ib] = arr[ia];
  arr[ia] = aux;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
movslq %edx,%rax
mov    (%rdi,%rax,4),%ecx
movslq %esi,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %6
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
store i32 %12, i32* %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %6
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
store i32 %17, i32* %21
%22 = load i32, i32* %7
%23 = load i32*, i32** %4
%24 = load i32, i32* %5
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %2 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = sext i32 %1 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
store i32 %9, i32* %5
store i32 %6, i32* %8
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void reg32_write(volatile uint32_t *reg, uint32_t value) { *reg = value; }


x86 assembly (clang, -O0):
<reg32_write>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg32_write>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @reg32_write(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
store volatile i32 %5, i32* %6
ret void
}

LLVM IR (-O2):
define void @reg32_write(i32* %0, i32 %1) {
store volatile i32 %1, i32* %0
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t badvpn_read_le8(const char *c_ptr) {
  const uint8_t *ptr = (const uint8_t *)c_ptr;
  return ((uint8_t)ptr[0] << 0);
}


x86 assembly (clang, -O0):
<badvpn_read_le8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
shl    $0x0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<badvpn_read_le8>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @badvpn_read_le8(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 0
%8 = load i32, i32* %7
%9 = shl i32 %8, 0
ret i32 %9
}

LLVM IR (-O2):
define i32 @badvpn_read_le8(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
double difference(double);
int /*<<< orphan*/ printf(char *, double);
int main() {
  printf("%.1f\n", difference(100.0));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movsd  0xec9(%rip),%xmm0
call   1040 <difference@plt>
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movsd  0xed7(%rip),%xmm0
call   1040 <difference@plt>
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%.1f\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call double @difference(double 1.000000e+02)
%3 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), double %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%.1f\0A\00"
define i32 @main() {
%1 = tail call double @difference(double 1.000000e+02)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), double %1)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int getc(int /*<<< orphan*/ *);
int get32(FILE *fh) {
  int w = getc(fh);
  w |= (int)getc(fh) << 8l;
  w |= (int)getc(fh) << 16l;
  w |= (int)getc(fh) << 24l;
  return w;
}


x86 assembly (clang, -O0):
<get32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getc@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getc@plt>
shl    $0x8,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getc@plt>
shl    $0x10,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getc@plt>
shl    $0x18,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get32>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r15
call   1030 <getc@plt>
mov    %eax,%r14d
mov    %r15,%rdi
call   1030 <getc@plt>
mov    %eax,%ebp
shl    $0x8,%ebp
or     %r14d,%ebp
mov    %r15,%rdi
call   1030 <getc@plt>
mov    %eax,%ebx
shl    $0x10,%ebx
mov    %r15,%rdi
call   1030 <getc@plt>
shl    $0x18,%eax
or     %ebx,%eax
or     %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @get32(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @getc(i32* %4)
store i32 %5, i32* %3
%6 = load i32*, i32** %2
%7 = call i32 @getc(i32* %6)
%8 = shl i32 %7, 8
%9 = load i32, i32* %3
%10 = or i32 %9, %8
store i32 %10, i32* %3
%11 = load i32*, i32** %2
%12 = call i32 @getc(i32* %11)
%13 = shl i32 %12, 16
%14 = load i32, i32* %3
%15 = or i32 %14, %13
store i32 %15, i32* %3
%16 = load i32*, i32** %2
%17 = call i32 @getc(i32* %16)
%18 = shl i32 %17, 24
%19 = load i32, i32* %3
%20 = or i32 %19, %18
store i32 %20, i32* %3
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @get32(i32* nocapture %0) {
%2 = tail call i32 @getc(i32* %0)
%3 = tail call i32 @getc(i32* %0)
%4 = shl i32 %3, 8
%5 = or i32 %4, %2
%6 = tail call i32 @getc(i32* %0)
%7 = shl i32 %6, 16
%8 = or i32 %5, %7
%9 = tail call i32 @getc(i32* %0)
%10 = shl i32 %9, 24
%11 = or i32 %8, %10
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ asprintf(char **, char *, char *);
char *get_file_error(char *filename) {
  char *str;
  asprintf(&str,
           "Failed to parse file"
           "\x1b[32m"
           " %s"
           "\x1b[0m"
           ".",
           filename);
  return str;
}


x86 assembly (clang, -O0):
<get_file_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    -0x10(%rbp),%rdi
lea    0xed5(%rip),%rsi
call   1030 <asprintf@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_file_error>:
push   %rax
mov    %rdi,%rdx
lea    0xee5(%rip),%rsi
mov    %rsp,%rdi
call   1030 <asprintf@plt>
mov    (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [34 x i8] c"Failed to parse file\1B[32m %s\1B[0m.\00"
define i8* @get_file_error(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @asprintf(i8** %3, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i8*, i8** %3
ret i8* %6
}

LLVM IR (-O2):
@.str = [34 x i8] c"Failed to parse file\1B[32m %s\1B[0m.\00"
define i8* @get_file_error(i8* %0) {
%2 = alloca i8*
%3 = bitcast i8** %2 to i8*
%4 = call i32 @asprintf(i8** %2, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* %0)
%5 = load i8*, i8** %2
ret i8* %5
}
int gettimeofday(struct timeval *p, void *z) { return -1; }


x86 assembly (clang, -O0):
<gettimeofday>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gettimeofday>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.timeval = type opaque
define i32 @gettimeofday(%struct.timeval* %0, i8* %1) {
%3 = alloca %struct.timeval*
%4 = alloca i8*
store %struct.timeval* %0, %struct.timeval** %3
store i8* %1, i8** %4
ret i32 -1
}

LLVM IR (-O2):
%struct.timeval = type opaque
define i32 @gettimeofday(%struct.timeval* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 -1
}
int clkid_change_reg(int clkid, int change) {
  int r;
  r = (((clkid) >> 3) & 0x3f) + (change);
  clkid &= ~(0x3f << 3);
  return clkid | ((r & 0x3f) << 3);
}


x86 assembly (clang, -O0):
<clkid_change_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x3,%eax
and    $0x3f,%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
and    $0xfffffe07,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0xc(%rbp),%ecx
and    $0x3f,%ecx
shl    $0x3,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clkid_change_reg>:
lea    (%rdi,%rsi,8),%eax
mov    %edi,%ecx
and    $0xfffffe07,%ecx
and    $0x1f8,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @clkid_change_reg(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = ashr i32 %6, 3
%8 = and i32 %7, 63
%9 = load i32, i32* %4
%10 = add nsw i32 %8, %9
store i32 %10, i32* %5
%11 = load i32, i32* %3
%12 = and i32 %11, -505
store i32 %12, i32* %3
%13 = load i32, i32* %3
%14 = load i32, i32* %5
%15 = and i32 %14, 63
%16 = shl i32 %15, 3
%17 = or i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @clkid_change_reg(i32 %0, i32 %1) {
%3 = and i32 %0, -505
%4 = shl i32 %1, 3
%5 = add i32 %4, %0
%6 = and i32 %5, 504
%7 = or i32 %6, %3
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ gpio_clear(int);
int /*<<< orphan*/ gpio_set(int);
int /*<<< orphan*/ gpio_set_output(int);
int /*<<< orphan*/ usleep(int);
int CC_Reset(int cs_pin) {
  gpio_set_output(cs_pin);
  int cs_pin_mask = 1 << cs_pin;
  gpio_set(cs_pin_mask);
  usleep(100);
  gpio_clear(cs_pin_mask);
  usleep(100);
  gpio_set(cs_pin_mask);
  usleep(100);
  return 0;
}


x86 assembly (clang, -O0):
<CC_Reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <gpio_set_output@plt>
mov    -0x4(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1050 <gpio_set@plt>
mov    $0x64,%edi
call   1060 <usleep@plt>
mov    -0x8(%rbp),%edi
call   1030 <gpio_clear@plt>
mov    $0x64,%edi
call   1060 <usleep@plt>
mov    -0x8(%rbp),%edi
call   1050 <gpio_set@plt>
mov    $0x64,%edi
call   1060 <usleep@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC_Reset>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
call   1040 <gpio_set_output@plt>
mov    $0x1,%ebp
mov    %ebx,%ecx
shl    %cl,%ebp
mov    %ebp,%edi
call   1050 <gpio_set@plt>
mov    $0x64,%edi
call   1060 <usleep@plt>
mov    %ebp,%edi
call   1030 <gpio_clear@plt>
mov    $0x64,%edi
call   1060 <usleep@plt>
mov    %ebp,%edi
call   1050 <gpio_set@plt>
mov    $0x64,%edi
call   1060 <usleep@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @CC_Reset(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @gpio_set_output(i32 %4)
%6 = load i32, i32* %2
%7 = shl i32 1, %6
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = call i32 @gpio_set(i32 %8)
%10 = call i32 @usleep(i32 100)
%11 = load i32, i32* %3
%12 = call i32 @gpio_clear(i32 %11)
%13 = call i32 @usleep(i32 100)
%14 = load i32, i32* %3
%15 = call i32 @gpio_set(i32 %14)
%16 = call i32 @usleep(i32 100)
ret i32 0
}

LLVM IR (-O2):
define i32 @CC_Reset(i32 %0) {
%2 = tail call i32 @gpio_set_output(i32 %0)
%3 = shl nuw i32 1, %0
%4 = tail call i32 @gpio_set(i32 %3)
%5 = tail call i32 @usleep(i32 100)
%6 = tail call i32 @gpio_clear(i32 %3)
%7 = tail call i32 @usleep(i32 100)
%8 = tail call i32 @gpio_set(i32 %3)
%9 = tail call i32 @usleep(i32 100)
ret i32 0
}
/* Variables and functions */
bool nrf51_errata_41(void) { return false; }


x86 assembly (clang, -O0):
<nrf51_errata_41>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf51_errata_41>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf51_errata_41() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf51_errata_41() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sse2_minmax_val(double const *, long, double *, double *);
void minmax_val(const double *restrict data, long datasize, double *fmin,
                double *fmax) {
  if (datasize < 1)
    return;
  sse2_minmax_val(data, datasize, fmin, fmax);
  return;
}


x86 assembly (clang, -O0):
<minmax_val>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x1,-0x10(%rbp)
jge    1138 <minmax_val+0x28>
jmp    114d <minmax_val+0x3d>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <sse2_minmax_val@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<minmax_val>:
test   %rsi,%rsi
jle    111a <minmax_val+0xa>
jmp    1030 <sse2_minmax_val@plt>
ret

LLVM IR (-O0):
define void @minmax_val(double* noalias %0, i64 %1, double* %2, double* %3) {
%5 = alloca double*
%6 = alloca i64
%7 = alloca double*
%8 = alloca double*
store double* %0, double** %5
store i64 %1, i64* %6
store double* %2, double** %7
store double* %3, double** %8
%9 = load i64, i64* %6
%10 = icmp slt i64 %9, 1
br i1 %10, label %11, label %12
11: ; preds = %4
br label %18
12: ; preds = %4
%13 = load double*, double** %5
%14 = load i64, i64* %6
%15 = load double*, double** %7
%16 = load double*, double** %8
%17 = call i32 @sse2_minmax_val(double* %13, i64 %14, double* %15, double* %16)
br label %18
18: ; preds = %12, %11
ret void
}

LLVM IR (-O2):
define void @minmax_val(double* noalias %0, i64 %1, double* %2, double* %3) {
%5 = icmp slt i64 %1, 1
br i1 %5, label %8, label %6
6: ; preds = %4
%7 = tail call i32 @sse2_minmax_val(double* %0, i64 %1, double* %2, double* %3)
br label %8
8: ; preds = %4, %6
ret void
}
/* Type definitions */
struct node {
  int dummy;
};

/* Variables and functions */
int is_empty(struct node *head) {
  int result = 0;
  if (head == NULL)
    result = 1;
  return (result);
}


x86 assembly (clang, -O0):
<is_empty>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1121 <is_empty+0x21>
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_empty>:
xor    %eax,%eax
test   %rdi,%rdi
sete   %al
ret

LLVM IR (-O0):
%struct.node = type { i32 }
define i32 @is_empty(%struct.node* %0) {
%2 = alloca %struct.node*
%3 = alloca i32
store %struct.node* %0, %struct.node** %2
store i32 0, i32* %3
%4 = load %struct.node*, %struct.node** %2
%5 = icmp eq %struct.node* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %3
br label %7
7: ; preds = %6, %1
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
%struct.node = type { i32 }
define i32 @is_empty(%struct.node* readnone %0) {
%2 = icmp eq %struct.node* %0, null
%3 = zext i1 %2 to i32
ret i32 %3
}
void mat_frame_add_skip(struct mat_probe *gp, int skip) {}


x86 assembly (clang, -O0):
<mat_frame_add_skip>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mat_frame_add_skip>:
ret

LLVM IR (-O0):
%struct.mat_probe = type opaque
define void @mat_frame_add_skip(%struct.mat_probe* %0, i32 %1) {
%3 = alloca %struct.mat_probe*
%4 = alloca i32
store %struct.mat_probe* %0, %struct.mat_probe** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.mat_probe = type opaque
define void @mat_frame_add_skip(%struct.mat_probe* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int numbtrop_standard_size(int *nbt) {
  int fail, *b;
  double *c;
  fail = _ada_use_c2phc4c(720, nbt, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<numbtrop_standard_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x2d0,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<numbtrop_standard_size>:
mov    %rdi,%rsi
mov    $0x2d0,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @numbtrop_standard_size(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32*
%5 = alloca double*
store i32* %0, i32** %2
%6 = load i32*, i32** %2
%7 = load i32*, i32** %4
%8 = load double*, double** %5
%9 = call i32 @_ada_use_c2phc4c(i32 720, i32* %6, i32* %7, double* %8, i32 0)
store i32 %9, i32* %3
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @numbtrop_standard_size(i32* %0) {
%2 = tail call i32 @_ada_use_c2phc4c(i32 720, i32* %0, i32* undef, double* undef, i32 0)
ret i32 %2
}
/* Variables and functions */
char *md5_crypt(char const *, char const *);
scalar_t__ strcmp(char *, char const *);
int checkpass_md5(const char *pass, const char *encrypted) {
  char *cipher;
  if (!pass || !encrypted)
    return 0;
  cipher = md5_crypt(pass, encrypted);
  return strcmp(cipher + 3, encrypted) == 0;
}


x86 assembly (clang, -O0):
<checkpass_md5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1146 <checkpass_md5+0x26>
cmpq   $0x0,-0x18(%rbp)
jne    1152 <checkpass_md5+0x32>
movl   $0x0,-0x4(%rbp)
jmp    1183 <checkpass_md5+0x63>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <md5_crypt@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
add    $0x3,%rdi
mov    -0x18(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkpass_md5>:
push   %rbx
xor    %eax,%eax
test   %rdi,%rdi
je     114f <checkpass_md5+0x2f>
mov    %rsi,%rbx
test   %rsi,%rsi
je     114f <checkpass_md5+0x2f>
mov    %rbx,%rsi
call   1040 <md5_crypt@plt>
lea    0x3(%rax),%rdi
mov    %rbx,%rsi
call   1030 <strcmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @checkpass_md5(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load i8*, i8** %5
%11 = icmp ne i8* %10, null
br i1 %11, label %13, label %12
12: ; preds = %9, %2
store i32 0, i32* %3
br label %23
13: ; preds = %9
%14 = load i8*, i8** %4
%15 = load i8*, i8** %5
%16 = call i8* @md5_crypt(i8* %14, i8* %15)
store i8* %16, i8** %6
%17 = load i8*, i8** %6
%18 = getelementptr inbounds i8, i8* %17, i64 3
%19 = load i8*, i8** %5
%20 = call i64 @strcmp(i8* %18, i8* %19)
%21 = icmp eq i64 %20, 0
%22 = zext i1 %21 to i32
store i32 %22, i32* %3
br label %23
23: ; preds = %13, %12
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @checkpass_md5(i8* %0, i8* %1) {
%3 = icmp ne i8* %0, null
%4 = icmp ne i8* %1, null
%5 = and i1 %3, %4
br i1 %5, label %6, label %12
6: ; preds = %2
%7 = tail call i8* @md5_crypt(i8* %0, i8* %1)
%8 = getelementptr inbounds i8, i8* %7, i64 3
%9 = tail call i64 @strcmp(i8* %8, i8* %1)
%10 = icmp eq i64 %9, 0
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %2, %6
%13 = phi i32 [ %11, %6 ], [ 0, %2 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void printfx(char *s, int d, int x) { printf(s, d / x, d % x); }


x86 assembly (clang, -O0):
<printfx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%eax
cltd
idivl  -0x10(%rbp)
mov    %eax,%esi
mov    -0xc(%rbp),%eax
cltd
idivl  -0x10(%rbp)
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printfx>:
mov    %edx,%ecx
mov    %esi,%eax
cltd
idiv   %ecx
mov    %eax,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
define void @printfx(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = sdiv i32 %8, %9
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = srem i32 %11, %12
%14 = call i32 @printf(i8* %7, i32 %10, i32 %13)
ret void
}

LLVM IR (-O2):
define void @printfx(i8* %0, i32 %1, i32 %2) {
%4 = sdiv i32 %1, %2
%5 = srem i32 %1, %2
%6 = tail call i32 @printf(i8* %0, i32 %4, i32 %5)
ret void
}
int LZ4_versionNumber(void) { return (1 * 100 * 100 + 4 * 100 + 0); }


x86 assembly (clang, -O0):
<LZ4_versionNumber>:
push   %rbp
mov    %rsp,%rbp
mov    $0x28a0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZ4_versionNumber>:
mov    $0x28a0,%eax
ret

LLVM IR (-O0):
define i32 @LZ4_versionNumber() {
ret i32 10400
}

LLVM IR (-O2):
define i32 @LZ4_versionNumber() {
ret i32 10400
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t make_vgaentry(char c, uint8_t color) {
  uint16_t c16 = c;
  uint16_t color16 = color;
  return c16 | color16 << 8;
}


x86 assembly (clang, -O0):
<make_vgaentry>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x10(%rbp),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_vgaentry>:
mov    %esi,%eax
shl    $0x8,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @make_vgaentry(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%7 = load i8, i8* %3
%8 = sext i8 %7 to i32
store i32 %8, i32* %5
%9 = load i32, i32* %4
store i32 %9, i32* %6
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = shl i32 %11, 8
%13 = or i32 %10, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @make_vgaentry(i8 signext %0, i32 %1) {
%3 = sext i8 %0 to i32
%4 = shl i32 %1, 8
%5 = or i32 %4, %3
ret i32 %5
}
/* Variables and functions */
bool nrf52_errata_84(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_84>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_84>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_84() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_84() {
ret i32 0
}
int cvmx_helper_get_number_of_interfaces(void) { return 2; }


x86 assembly (clang, -O0):
<cvmx_helper_get_number_of_interfaces>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvmx_helper_get_number_of_interfaces>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @cvmx_helper_get_number_of_interfaces() {
ret i32 2
}

LLVM IR (-O2):
define i32 @cvmx_helper_get_number_of_interfaces() {
ret i32 2
}
/* Variables and functions */
int I2C_Write(int, int, unsigned char *);
int STC3115_WriteByte(int RegAddress, unsigned char Value) {
  int res;
  unsigned char data[2];
  data[0] = Value;
  res = I2C_Write(1, RegAddress, data);
  return (res);
}


x86 assembly (clang, -O0):
<STC3115_WriteByte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
mov    %al,-0xe(%rbp)
mov    -0x4(%rbp),%esi
lea    -0xe(%rbp),%rdx
mov    $0x1,%edi
call   1030 <I2C_Write@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<STC3115_WriteByte>:
push   %rax
mov    %edi,%eax
mov    %sil,0x6(%rsp)
lea    0x6(%rsp),%rdx
mov    $0x1,%edi
mov    %eax,%esi
call   1030 <I2C_Write@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @STC3115_WriteByte(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i32
%6 = alloca [2 x i8]
store i32 %0, i32* %3
store i8 %1, i8* %4
%7 = load i8, i8* %4
%8 = getelementptr inbounds [2 x i8], [2 x i8]* %6, i64 0, i64 0
store i8 %7, i8* %8
%9 = load i32, i32* %3
%10 = getelementptr inbounds [2 x i8], [2 x i8]* %6, i64 0, i64 0
%11 = call i32 @I2C_Write(i32 1, i32 %9, i8* %10)
store i32 %11, i32* %5
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @STC3115_WriteByte(i32 %0, i8 zeroext %1) {
%3 = alloca [2 x i8]
%4 = getelementptr inbounds [2 x i8], [2 x i8]* %3, i64 0, i64 0
store i8 %1, i8* %4
%5 = call i32 @I2C_Write(i32 1, i32 %0, i8* %4)
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_t;

/* Variables and functions */
scalar_t__ malloc(int);
pthread_t *initialize_thread_vectors(int threads_amount) {
  pthread_t *vector = (pthread_t *)malloc(threads_amount * sizeof(pthread_t));
  return vector;
}


x86 assembly (clang, -O0):
<initialize_thread_vectors>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_thread_vectors>:
shl    $0x2,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i32* @initialize_thread_vectors(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sext i32 %4 to i64
%6 = mul i64 %5, 4
%7 = trunc i64 %6 to i32
%8 = call i64 @malloc(i32 %7)
%9 = inttoptr i64 %8 to i32*
store i32* %9, i32** %3
%10 = load i32*, i32** %3
ret i32* %10
}

LLVM IR (-O2):
define i32* @initialize_thread_vectors(i32 %0) {
%2 = shl i32 %0, 2
%3 = tail call i64 @malloc(i32 %2)
%4 = inttoptr i64 %3 to i32*
ret i32* %4
}
int test_imm_91int16_reg(short val) {
  return ((val) & (0x91 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_91int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x91,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_91int16_reg>:
test   $0x91,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_91int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 145
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_91int16_reg(i16 signext %0) {
%2 = and i16 %0, 145
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
unsigned long pax_open_kernel(void) { return 0; }


x86 assembly (clang, -O0):
<pax_open_kernel>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pax_open_kernel>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @pax_open_kernel() {
ret i64 0
}

LLVM IR (-O2):
define i64 @pax_open_kernel() {
ret i64 0
}
char *__rawmemchr(char *a, char b) { return a; }


x86 assembly (clang, -O0):
<__rawmemchr>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__rawmemchr>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @__rawmemchr(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8*, i8** %3
ret i8* %5
}

LLVM IR (-O2):
define i8* @__rawmemchr(i8* readnone returned %0, i8 signext %1) {
ret i8* %0
}