float _sinf(float x) {
  float xn;
  float f, g;
  float result;
  float x_int;
  float x_fract;
  long int exp;
  long int n;
  int sign = 0;
  const float NaN = 0x1.002468p+128;
  const float domain = (102940.0F);
  const long int *const domain_ptr = (long int *)(&domain);
  long int *const x_ptr = (long int *)(&x);
  if (*x_ptr < 0) {
    x = -x;
    sign = 1;
  }
  exp = *x_ptr & 0X7F800000;
  if (exp == 0X7F800000)
    return NaN;
  if (exp == 0)
    return 0.0F;
  if (*x_ptr > *domain_ptr)
    return 0.0F;
  n = ((
      long)(((float)(((float)(x) *
                      (float)((float)(0.31830988618379067153776752674503L)))) +
             (float)(0.5F))));
  xn = ((float)(n));
  x_int = ((float)(((long)(x))));
  x_fract = ((float)(x) - (float)(x_int));
  f = ((float)(x_int) - (float)(((float)(xn) * (float)((3.140625F)))));
  f = ((float)(f) + (float)(x_fract));
  f = ((float)(f) - (float)(((float)(xn) * (float)((9.670257568359375e-4F)))));
  f = ((float)(f) -
       (float)(((float)(xn) * (float)((6.27832957300962643383279502884e-7F)))));
  if (fabsf(f) >= (+3.452669830012e-4F)) {
    g = ((float)(f) * (float)(f));
    result = ((float)(g) * (float)((+0.2601903036e-5F)));
    result = ((float)(result) + (float)((-0.1980741872e-3F)));
    result = ((float)(result) * (float)(g));
    result = ((float)(result) + (float)((+0.8333025139e-2F)));
    result = ((float)(result) * (float)(g));
    result = ((float)(result) + (float)((-0.1666665668e+0F)));
    result = ((float)(result) * (float)(g));
    result = ((float)(result) * (float)(f));
    f = ((float)(result) + (float)(f));
  }
  if ((n & 1) ^ sign)
    f = -f;
  return f;
}


x86 assembly (clang, -O0):
<_sinf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movl   $0x0,-0x34(%rbp)
movss  0xeec(%rip),%xmm0
movss  %xmm0,-0x38(%rbp)
movss  0xedb(%rip),%xmm0
movss  %xmm0,-0x3c(%rbp)
lea    -0x3c(%rbp),%rax
mov    %rax,-0x48(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x50(%rbp)
mov    -0x50(%rbp),%rax
cmpq   $0x0,(%rax)
jge    1166 <_sinf+0x66>
movss  -0x8(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x8(%rbp)
movl   $0x1,-0x34(%rbp)
mov    -0x50(%rbp),%rax
mov    (%rax),%rax
and    $0x7f800000,%rax
mov    %rax,-0x28(%rbp)
cmpq   $0x7f800000,-0x28(%rbp)
7f
jne    1197 <_sinf+0x97>
movss  0xe77(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    13b0 <_sinf+0x2b0>
cmpq   $0x0,-0x28(%rbp)
jne    11af <_sinf+0xaf>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    13b0 <_sinf+0x2b0>
mov    -0x50(%rbp),%rax
mov    (%rax),%rax
mov    -0x48(%rbp),%rcx
cmp    (%rcx),%rax
jle    11d0 <_sinf+0xd0>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    13b0 <_sinf+0x2b0>
movss  -0x8(%rbp),%xmm0
movss  0xe3b(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xe33(%rip),%xmm1
addss  %xmm1,%xmm0
cvttss2si %xmm0,%rax
mov    %rax,-0x30(%rbp)
cvtsi2ssq -0x30(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
cvttss2si -0x8(%rbp),%rax
cvtsi2ss %rax,%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  -0x8(%rbp),%xmm0
subss  -0x1c(%rbp),%xmm0
movss  %xmm0,-0x20(%rbp)
movss  -0x1c(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  0xdd5(%rip),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
addss  -0x20(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  0xd96(%rip),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  0xd66(%rip),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
movaps 0xd71(%rip),%xmm1
pand   %xmm1,%xmm0
movss  0xd3d(%rip),%xmm1
ucomiss %xmm1,%xmm0
jb     1376 <_sinf+0x276>
movss  -0x10(%rbp),%xmm0
mulss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  0xd41(%rip),%xmm0
mulss  -0x14(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  0xd2b(%rip),%xmm0
addss  -0x18(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  -0x18(%rbp),%xmm0
mulss  -0x14(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  0xd06(%rip),%xmm0
addss  -0x18(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  -0x18(%rbp),%xmm0
mulss  -0x14(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  0xce1(%rip),%xmm0
addss  -0x18(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  -0x18(%rbp),%xmm0
mulss  -0x14(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  -0x18(%rbp),%xmm0
mulss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  -0x18(%rbp),%xmm0
addss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
mov    -0x30(%rbp),%rax
and    $0x1,%rax
movslq -0x34(%rbp),%rcx
xor    %rcx,%rax
cmp    $0x0,%rax
je     13a6 <_sinf+0x2a6>
movss  -0x10(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_sinf>:
movss  %xmm0,-0x10(%rsp)
movl   $0x47c90e00,-0x8(%rsp)
47
mov    -0x10(%rsp),%rcx
test   %rcx,%rcx
js     111c <_sinf+0x1c>
xor    %eax,%eax
jmp    1133 <_sinf+0x33>
xorps  0xedd(%rip),%xmm0
movss  %xmm0,-0x10(%rsp)
mov    $0x1,%eax
mov    -0x10(%rsp),%rcx
mov    %ecx,%edx
and    $0x7f800000,%edx
cmp    $0x7f800000,%rdx
je     1224 <_sinf+0x124>
xorps  %xmm0,%xmm0
test   %rdx,%rdx
je     1223 <_sinf+0x123>
cmp    -0x8(%rsp),%rcx
jg     1223 <_sinf+0x123>
movd   %ecx,%xmm1
movss  0xeb9(%rip),%xmm0
mulss  %xmm1,%xmm0
addss  0xeb1(%rip),%xmm0
cvttss2si %xmm0,%rcx
xorps  %xmm0,%xmm0
cvtsi2ss %rcx,%xmm0
cvttss2si %xmm1,%rdx
cvtsi2ss %rdx,%xmm2
subss  %xmm2,%xmm1
movss  0xe92(%rip),%xmm3
mulss  %xmm0,%xmm3
addss  %xmm2,%xmm3
addss  %xmm1,%xmm3
movss  0xe82(%rip),%xmm1
mulss  %xmm0,%xmm1
addss  %xmm3,%xmm1
mulss  0xe76(%rip),%xmm0
addss  %xmm1,%xmm0
movaps 0xe47(%rip),%xmm1
andps  %xmm0,%xmm1
ucomiss 0xe65(%rip),%xmm1
jb     1214 <_sinf+0x114>
movaps %xmm0,%xmm1
mulss  %xmm0,%xmm1
movss  0xe58(%rip),%xmm2
mulss  %xmm1,%xmm2
addss  0xe50(%rip),%xmm2
mulss  %xmm1,%xmm2
addss  0xe48(%rip),%xmm2
mulss  %xmm1,%xmm2
addss  0xe40(%rip),%xmm2
mulss  %xmm1,%xmm2
mulss  %xmm0,%xmm2
addss  %xmm2,%xmm0
and    $0x1,%ecx
cmp    %rax,%rcx
je     1223 <_sinf+0x123>
xorps  0xddd(%rip),%xmm0
ret
movss  0xdf4(%rip),%xmm0
ret

LLVM IR (-O0):
define float @_sinf(float %0) {
%2 = alloca float
%3 = alloca float
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca i64
%11 = alloca i64
%12 = alloca i32
%13 = alloca float
%14 = alloca float
%15 = alloca i64*
%16 = alloca i64*
store float %0, float* %3
store i32 0, i32* %12
store float 0x7FF0000000000000, float* %13
store float 1.029400e+05, float* %14
%17 = bitcast float* %14 to i64*
store i64* %17, i64** %15
%18 = bitcast float* %3 to i64*
store i64* %18, i64** %16
%19 = load i64*, i64** %16
%20 = load i64, i64* %19
%21 = icmp slt i64 %20, 0
br i1 %21, label %22, label %25
22: ; preds = %1
%23 = load float, float* %3
%24 = fneg float %23
store float %24, float* %3
store i32 1, i32* %12
br label %25
25: ; preds = %22, %1
%26 = load i64*, i64** %16
%27 = load i64, i64* %26
%28 = and i64 %27, 2139095040
store i64 %28, i64* %10
%29 = load i64, i64* %10
%30 = icmp eq i64 %29, 2139095040
br i1 %30, label %31, label %32
31: ; preds = %25
store float 0x7FF0000000000000, float* %2
br label %112
32: ; preds = %25
%33 = load i64, i64* %10
%34 = icmp eq i64 %33, 0
br i1 %34, label %35, label %36
35: ; preds = %32
store float 0.000000e+00, float* %2
br label %112
36: ; preds = %32
%37 = load i64*, i64** %16
%38 = load i64, i64* %37
%39 = load i64*, i64** %15
%40 = load i64, i64* %39
%41 = icmp sgt i64 %38, %40
br i1 %41, label %42, label %43
42: ; preds = %36
store float 0.000000e+00, float* %2
br label %112
43: ; preds = %36
%44 = load float, float* %3
%45 = call float @llvm.fmuladd.f32(float %44, float 0x3FD45F3060000000, float 5.000000e-01)
%46 = fptosi float %45 to i64
store i64 %46, i64* %11
%47 = load i64, i64* %11
%48 = sitofp i64 %47 to float
store float %48, float* %4
%49 = load float, float* %3
%50 = fptosi float %49 to i64
%51 = sitofp i64 %50 to float
store float %51, float* %8
%52 = load float, float* %3
%53 = load float, float* %8
%54 = fsub float %52, %53
store float %54, float* %9
%55 = load float, float* %8
%56 = load float, float* %4
%57 = fneg float %56
%58 = call float @llvm.fmuladd.f32(float %57, float 0x4009200000000000, float %55)
store float %58, float* %5
%59 = load float, float* %5
%60 = load float, float* %9
%61 = fadd float %59, %60
store float %61, float* %5
%62 = load float, float* %5
%63 = load float, float* %4
%64 = fneg float %63
%65 = call float @llvm.fmuladd.f32(float %64, float 0x3F4FB00000000000, float %62)
store float %65, float* %5
%66 = load float, float* %5
%67 = load float, float* %4
%68 = fneg float %67
%69 = call float @llvm.fmuladd.f32(float %68, float 0x3EA5110B40000000, float %66)
store float %69, float* %5
%70 = load float, float* %5
%71 = call float @llvm.fabs.f32(float %70)
%72 = fcmp oge float %71, 0x3F36A09E60000000
br i1 %72, label %73, label %100
73: ; preds = %43
%74 = load float, float* %5
%75 = load float, float* %5
%76 = fmul float %74, %75
store float %76, float* %6
%77 = load float, float* %6
%78 = fmul float %77, 0x3EC5D38B60000000
store float %78, float* %7
%79 = load float, float* %7
%80 = fadd float %79, 0xBF29F64440000000
store float %80, float* %7
%81 = load float, float* %7
%82 = load float, float* %6
%83 = fmul float %81, %82
store float %83, float* %7
%84 = load float, float* %7
%85 = fadd float %84, 0x3F8110E7C0000000
store float %85, float* %7
%86 = load float, float* %7
%87 = load float, float* %6
%88 = fmul float %86, %87
store float %88, float* %7
%89 = load float, float* %7
%90 = fadd float %89, 0xBFC5555480000000
store float %90, float* %7
%91 = load float, float* %7
%92 = load float, float* %6
%93 = fmul float %91, %92
store float %93, float* %7
%94 = load float, float* %7
%95 = load float, float* %5
%96 = fmul float %94, %95
store float %96, float* %7
%97 = load float, float* %7
%98 = load float, float* %5
%99 = fadd float %97, %98
store float %99, float* %5
br label %100
100: ; preds = %73, %43
%101 = load i64, i64* %11
%102 = and i64 %101, 1
%103 = load i32, i32* %12
%104 = sext i32 %103 to i64
%105 = xor i64 %102, %104
%106 = icmp ne i64 %105, 0
br i1 %106, label %107, label %110
107: ; preds = %100
%108 = load float, float* %5
%109 = fneg float %108
store float %109, float* %5
br label %110
110: ; preds = %107, %100
%111 = load float, float* %5
store float %111, float* %2
br label %112
112: ; preds = %110, %42, %35, %31
%113 = load float, float* %2
ret float %113
}

LLVM IR (-O2):
define float @_sinf(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = bitcast float* %3 to i8*
store float 1.029400e+05, float* %3
%5 = bitcast float* %2 to i64*
%6 = load i64, i64* %5
%7 = icmp slt i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = fneg float %0
store float %9, float* %2
%10 = load i64, i64* %5
br label %11
11: ; preds = %8, %1
%12 = phi i64 [ %10, %8 ], [ %6, %1 ]
%13 = phi i64 [ 1, %8 ], [ 0, %1 ]
%14 = trunc i64 %12 to i32
%15 = bitcast i32 %14 to float
%16 = and i64 %12, 2139095040
switch i64 %16, label %18 [
i64 2139095040, label %53
i64 0, label %17
]
17: ; preds = %11
br label %53
18: ; preds = %11
%19 = bitcast float* %3 to i64*
%20 = load i64, i64* %19
%21 = icmp sgt i64 %12, %20
br i1 %21, label %53, label %22
22: ; preds = %18
%23 = tail call float @llvm.fmuladd.f32(float %15, float 0x3FD45F3060000000, float 5.000000e-01)
%24 = fptosi float %23 to i64
%25 = sitofp i64 %24 to float
%26 = fptosi float %15 to i64
%27 = sitofp i64 %26 to float
%28 = fsub float %15, %27
%29 = fneg float %25
%30 = tail call float @llvm.fmuladd.f32(float %29, float 0x4009200000000000, float %27)
%31 = fadd float %28, %30
%32 = tail call float @llvm.fmuladd.f32(float %29, float 0x3F4FB00000000000, float %31)
%33 = tail call float @llvm.fmuladd.f32(float %29, float 0x3EA5110B40000000, float %32)
%34 = tail call float @llvm.fabs.f32(float %33)
%35 = fcmp ult float %34, 0x3F36A09E60000000
br i1 %35, label %47, label %36
36: ; preds = %22
%37 = fmul float %33, %33
%38 = fmul float %37, 0x3EC5D38B60000000
%39 = fadd float %38, 0xBF29F64440000000
%40 = fmul float %37, %39
%41 = fadd float %40, 0x3F8110E7C0000000
%42 = fmul float %37, %41
%43 = fadd float %42, 0xBFC5555480000000
%44 = fmul float %37, %43
%45 = fmul float %33, %44
%46 = fadd float %33, %45
br label %47
47: ; preds = %36, %22
%48 = phi float [ %46, %36 ], [ %33, %22 ]
%49 = and i64 %24, 1
%50 = icmp eq i64 %49, %13
%51 = fneg float %48
%52 = select i1 %50, float %48, float %51
br label %53
53: ; preds = %18, %11, %47, %17
%54 = phi float [ 0.000000e+00, %17 ], [ %52, %47 ], [ 0x7FF0000000000000, %11 ], [ 0.000000e+00, %18 ]
ret float %54
}