xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int __getppid() {
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<__getppid>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__getppid>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @__getppid() {
%1 = load i32, i32* @ENOSYS
%2 = call i32 @__set_errno(i32 %1)
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @__getppid() {
%1 = load i32, i32* @ENOSYS
%2 = tail call i32 @__set_errno(i32 %1)
ret i32 -1
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef scalar_t__ int32_t;

/* Variables and functions */
scalar_t__ WriteUint32Le(int /*<<< orphan*/, void *);
int32_t WriteInt32Le(int32_t value, void *out) {
  return WriteUint32Le((uint32_t)value, out);
}


x86 assembly (clang, -O0):
<WriteInt32Le>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
call   1030 <WriteUint32Le@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WriteInt32Le>:
jmp    1030 <WriteUint32Le@plt>

LLVM IR (-O0):
define i64 @WriteInt32Le(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
%5 = load i64, i64* %3
%6 = trunc i64 %5 to i32
%7 = load i8*, i8** %4
%8 = call i64 @WriteUint32Le(i32 %6, i8* %7)
ret i64 %8
}

LLVM IR (-O2):
define i64 @WriteInt32Le(i64 %0, i8* %1) {
%3 = trunc i64 %0 to i32
%4 = tail call i64 @WriteUint32Le(i32 %3, i8* %1)
ret i64 %4
}
/* Type definitions */
struct timeval {
  double tv_sec;
  double tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
long getMillisecondsOfDay() {
  struct timeval tim;
  gettimeofday(&tim, NULL);
  return (long)((tim.tv_sec + (tim.tv_usec / 1000000.0)) * 1000);
}


x86 assembly (clang, -O0):
<getMillisecondsOfDay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
movsd  -0x10(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
movsd  0xed1(%rip),%xmm2
divsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
movsd  0xeb9(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getMillisecondsOfDay>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
movsd  0x10(%rsp),%xmm0
divsd  0xed2(%rip),%xmm0
addsd  0x8(%rsp),%xmm0
mulsd  0xecc(%rip),%xmm0
cvttsd2si %xmm0,%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { double, double }
define i64 @getMillisecondsOfDay() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load double, double* %3
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%6 = load double, double* %5
%7 = fdiv double %6, 1.000000e+06
%8 = fadd double %4, %7
%9 = fmul double %8, 1.000000e+03
%10 = fptosi double %9 to i64
ret i64 %10
}

LLVM IR (-O2):
%struct.timeval = type { double, double }
define i64 @getMillisecondsOfDay() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load double, double* %4
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%7 = load double, double* %6
%8 = fdiv double %7, 1.000000e+06
%9 = fadd double %5, %8
%10 = fmul double %9, 1.000000e+03
%11 = fptosi double %10 to i64
ret i64 %11
}
/* Variables and functions */
void glmEqual3fs(bool out[3], const float x[3], float y) {
  for (size_t i = 0; i < 3; ++i)
    out[i] = x[i] == y;
}


x86 assembly (clang, -O0):
<glmEqual3fs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
movq   $0x0,-0x20(%rbp)
cmpq   $0x3,-0x20(%rbp)
jae    115e <glmEqual3fs+0x5e>
mov    -0x10(%rbp),%rax
mov    -0x20(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm0
ucomiss -0x14(%rbp),%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%edx
mov    -0x8(%rbp),%rax
mov    -0x20(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1119 <glmEqual3fs+0x19>
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmEqual3fs>:
movss  (%rsi),%xmm1
cmpeqss %xmm0,%xmm1
movd   %xmm1,%eax
and    $0x1,%eax
mov    %eax,(%rdi)
movss  0x4(%rsi),%xmm1
cmpeqss %xmm0,%xmm1
movd   %xmm1,%eax
and    $0x1,%eax
mov    %eax,0x4(%rdi)
cmpeqss 0x8(%rsi),%xmm0
movd   %xmm0,%eax
and    $0x1,%eax
mov    %eax,0x8(%rdi)
ret

LLVM IR (-O0):
define void @glmEqual3fs(i32* %0, float* %1, float %2) {
%4 = alloca i32*
%5 = alloca float*
%6 = alloca float
%7 = alloca i64
store i32* %0, i32** %4
store float* %1, float** %5
store float %2, float* %6
store i64 0, i64* %7
br label %8
8: ; preds = %22, %3
%9 = load i64, i64* %7
%10 = icmp ult i64 %9, 3
br i1 %10, label %11, label %25
11: ; preds = %8
%12 = load float*, float** %5
%13 = load i64, i64* %7
%14 = getelementptr inbounds float, float* %12, i64 %13
%15 = load float, float* %14
%16 = load float, float* %6
%17 = fcmp oeq float %15, %16
%18 = zext i1 %17 to i32
%19 = load i32*, i32** %4
%20 = load i64, i64* %7
%21 = getelementptr inbounds i32, i32* %19, i64 %20
store i32 %18, i32* %21
br label %22
22: ; preds = %11
%23 = load i64, i64* %7
%24 = add i64 %23, 1
store i64 %24, i64* %7
br label %8
25: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @glmEqual3fs(i32* nocapture writeonly %0, float* nocapture %1, float %2) {
%4 = load float, float* %1
%5 = fcmp oeq float %4, %2
%6 = zext i1 %5 to i32
store i32 %6, i32* %0
%7 = getelementptr inbounds float, float* %1, i64 1
%8 = load float, float* %7
%9 = fcmp oeq float %8, %2
%10 = zext i1 %9 to i32
%11 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %10, i32* %11
%12 = getelementptr inbounds float, float* %1, i64 2
%13 = load float, float* %12
%14 = fcmp oeq float %13, %2
%15 = zext i1 %14 to i32
%16 = getelementptr inbounds i32, i32* %0, i64 2
store i32 %15, i32* %16
ret void
}
int test_imm_D8uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0xD8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D8uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0xd8,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D8uint64_midword_reg>:
test   $0xd80000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D8uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 216
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D8uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 14155776
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void glFlush(void) { return; }


x86 assembly (clang, -O0):
<glFlush>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glFlush>:
ret

LLVM IR (-O0):
define void @glFlush() {
ret void
}

LLVM IR (-O2):
define void @glFlush() {
ret void
}
enum A { X, Y } f() { return 5; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @f() {
ret i32 5
}

LLVM IR (-O2):
define i32 @f() {
ret i32 5
}
void arch_watchdog_stop(void) {}


x86 assembly (clang, -O0):
<arch_watchdog_stop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_watchdog_stop>:
ret

LLVM IR (-O0):
define void @arch_watchdog_stop() {
ret void
}

LLVM IR (-O2):
define void @arch_watchdog_stop() {
ret void
}
int test_imm_B3int16_mem(short *val) {
  return ((*val) & (-0xB3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B3int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffff4d,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B3int16_mem>:
movzwl (%rdi),%eax
test   $0xff4d,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B3int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -179
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_B3int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -179
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int, int);
void drawRect(int x1, int x2, int x3, int x4) {
  printf("DR %i %i %i %i\n", x1, x2, x3, x4);
}


x86 assembly (clang, -O0):
<drawRect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    -0x10(%rbp),%r8d
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawRect>:
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
lea    0xee0(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"DR %i %i %i %i\0A\00"
define void @drawRect(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %9, i32 %10, i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"DR %i %i %i %i\0A\00"
define void @drawRect(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1, i32 %2, i32 %3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t lsb64(uint64_t x) { return (uint32_t)x; }


x86 assembly (clang, -O0):
<lsb64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lsb64>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @lsb64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @lsb64(i32 returned %0) {
ret i32 %0
}
int fossil_islower(char c) { return c >= 'a' && c <= 'z'; }


x86 assembly (clang, -O0):
<fossil_islower>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x61,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <fossil_islower+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x7a,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fossil_islower>:
add    $0x9f,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @fossil_islower(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 122
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @fossil_islower(i8 signext %0) {
%2 = add i8 %0, -97
%3 = icmp ult i8 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
int decimal5(int *x) {
  int i;
  int val = 0;
  for (i = 0; i < 5; i++)
    val = (10 * val) + x[i];
  return val;
}


x86 assembly (clang, -O0):
<decimal5>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x5,-0xc(%rbp)
jge    1140 <decimal5+0x40>
imul   $0xa,-0x10(%rbp),%eax
mov    -0x8(%rbp),%rcx
movslq -0xc(%rbp),%rdx
add    (%rcx,%rdx,4),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <decimal5+0x16>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<decimal5>:
mov    (%rdi),%eax
lea    (%rax,%rax,4),%eax
add    %eax,%eax
add    0x4(%rdi),%eax
lea    (%rax,%rax,4),%eax
add    %eax,%eax
add    0x8(%rdi),%eax
lea    (%rax,%rax,4),%eax
add    %eax,%eax
add    0xc(%rdi),%eax
lea    (%rax,%rax,4),%eax
add    %eax,%eax
add    0x10(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @decimal5(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %17, %1
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 5
br i1 %7, label %8, label %20
8: ; preds = %5
%9 = load i32, i32* %4
%10 = mul nsw i32 10, %9
%11 = load i32*, i32** %2
%12 = load i32, i32* %3
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = add nsw i32 %10, %15
store i32 %16, i32* %4
br label %17
17: ; preds = %8
%18 = load i32, i32* %3
%19 = add nsw i32 %18, 1
store i32 %19, i32* %3
br label %5
20: ; preds = %5
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @decimal5(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = mul nsw i32 %2, 10
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = add nsw i32 %5, %3
%7 = mul nsw i32 %6, 10
%8 = getelementptr inbounds i32, i32* %0, i64 2
%9 = load i32, i32* %8
%10 = add nsw i32 %9, %7
%11 = mul nsw i32 %10, 10
%12 = getelementptr inbounds i32, i32* %0, i64 3
%13 = load i32, i32* %12
%14 = add nsw i32 %13, %11
%15 = mul nsw i32 %14, 10
%16 = getelementptr inbounds i32, i32* %0, i64 4
%17 = load i32, i32* %16
%18 = add nsw i32 %17, %15
ret i32 %18
}
int string_character_count(char ch, char *source) {
  register int count = 0;
  if (source) {
    while (*source) {
      if (*source == ch)
        count++;
      source++;
    }
  }
  return count;
}


x86 assembly (clang, -O0):
<string_character_count>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1164 <string_character_count+0x64>
jmp    1125 <string_character_count+0x25>
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     115f <string_character_count+0x5f>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x1(%rbp),%ecx
cmp    %ecx,%eax
jne    114e <string_character_count+0x4e>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1125 <string_character_count+0x25>
jmp    1164 <string_character_count+0x64>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_character_count>:
xor    %eax,%eax
test   %rsi,%rsi
je     1135 <string_character_count+0x35>
mov    (%rsi),%cl
test   %cl,%cl
je     1135 <string_character_count+0x35>
add    $0x1,%rsi
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
xor    %edx,%edx
cmp    %dil,%cl
sete   %dl
add    %edx,%eax
movzbl (%rsi),%ecx
add    $0x1,%rsi
test   %cl,%cl
jne    1120 <string_character_count+0x20>
ret

LLVM IR (-O0):
define i32 @string_character_count(i8 signext %0, i8* %1) {
%3 = alloca i8
%4 = alloca i8*
%5 = alloca i32
store i8 %0, i8* %3
store i8* %1, i8** %4
store i32 0, i32* %5
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %27
8: ; preds = %2
br label %9
9: ; preds = %23, %8
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %26
13: ; preds = %9
%14 = load i8*, i8** %4
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %16, %18
br i1 %19, label %20, label %23
20: ; preds = %13
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
store i32 %22, i32* %5
br label %23
23: ; preds = %20, %13
%24 = load i8*, i8** %4
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %4
br label %9
26: ; preds = %9
br label %27
27: ; preds = %26, %2
%28 = load i32, i32* %5
ret i32 %28
}

LLVM IR (-O2):
define i32 @string_character_count(i8 signext %0, i8* %1) {
%3 = icmp eq i8* %1, null
br i1 %3, label %17, label %4
4: ; preds = %2
%5 = load i8, i8* %1
%6 = icmp eq i8 %5, 0
br i1 %6, label %17, label %7
7: ; preds = %4, %7
%8 = phi i8 [ %15, %7 ], [ %5, %4 ]
%9 = phi i32 [ %13, %7 ], [ 0, %4 ]
%10 = phi i8* [ %14, %7 ], [ %1, %4 ]
%11 = icmp eq i8 %8, %0
%12 = zext i1 %11 to i32
%13 = add nuw nsw i32 %9, %12
%14 = getelementptr inbounds i8, i8* %10, i64 1
%15 = load i8, i8* %14
%16 = icmp eq i8 %15, 0
br i1 %16, label %17, label %7
17: ; preds = %7, %4, %2
%18 = phi i32 [ 0, %2 ], [ 0, %4 ], [ %13, %7 ]
ret i32 %18
}
int sq(int i) { return i * i; }


x86 assembly (clang, -O0):
<sq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sq>:
mov    %edi,%eax
imul   %edi,%eax
ret

LLVM IR (-O0):
define i32 @sq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @sq(i32 %0) {
%2 = mul nsw i32 %0, %0
ret i32 %2
}
/* Type definitions */
struct stat {
  scalar_t__ st_size;
  int /*<<< orphan*/ st_mode;
};

/* Variables and functions */
scalar_t__ S_ISREG(int /*<<< orphan*/);
scalar_t__ stat(char *, struct stat *);
size_t flott_get_file_size(char *filename) {
  size_t ret_val = 0;
  struct stat info;
  if (stat(filename, &info) == 0 && S_ISREG(info.st_mode)) {
    ret_val = (size_t)(info.st_size);
  }
  return ret_val;
}


x86 assembly (clang, -O0):
<flott_get_file_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x20(%rbp),%rsi
call   1030 <stat@plt>
cmp    $0x0,%rax
jne    1165 <flott_get_file_size+0x45>
mov    -0x18(%rbp),%edi
call   1040 <S_ISREG@plt>
cmp    $0x0,%rax
je     1165 <flott_get_file_size+0x45>
mov    -0x20(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flott_get_file_size>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rsi
call   1030 <stat@plt>
test   %rax,%rax
je     113a <flott_get_file_size+0x1a>
xor    %eax,%eax
add    $0x18,%rsp
ret
mov    0x10(%rsp),%edi
call   1040 <S_ISREG@plt>
test   %rax,%rax
je     1133 <flott_get_file_size+0x13>
mov    0x8(%rsp),%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.stat = type { i64, i32 }
define i64 @flott_get_file_size(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca %struct.stat
store i8* %0, i8** %2
store i64 0, i64* %3
%5 = load i8*, i8** %2
%6 = call i64 @stat(i8* %5, %struct.stat* %4)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %16
8: ; preds = %1
%9 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 1
%10 = load i32, i32* %9
%11 = call i64 @S_ISREG(i32 %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %8
%14 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%15 = load i64, i64* %14
store i64 %15, i64* %3
br label %16
16: ; preds = %13, %8, %1
%17 = load i64, i64* %3
ret i64 %17
}

LLVM IR (-O2):
%struct.stat = type { i64, i32 }
define i64 @flott_get_file_size(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 1
%8 = load i32, i32* %7
%9 = call i64 @S_ISREG(i32 %8)
%10 = icmp eq i64 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %6
%12 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%13 = load i64, i64* %12
br label %14
14: ; preds = %11, %6, %1
%15 = phi i64 [ %13, %11 ], [ 0, %6 ], [ 0, %1 ]
ret i64 %15
}
void MPUFaultISR(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<MPUFaultISR>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <MPUFaultISR+0x9>
jmp    1109 <MPUFaultISR+0x9>

x86 assembly (clang, -O2):
<MPUFaultISR>:
jmp    1100 <MPUFaultISR>

LLVM IR (-O0):
define void @MPUFaultISR() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @MPUFaultISR() {
br label %1
1: ; preds = %0, %1
br label %1
}
int test_imm_8Buint32_reg(unsigned int val) {
  return ((val) & (0x8B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Buint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x8b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Buint32_reg>:
test   $0x8b,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Buint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 139
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_8Buint32_reg(i32 %0) {
%2 = and i32 %0, 139
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
float foof(float a) { return 2 * a; }


x86 assembly (clang, -O0):
<foof>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<foof>:
addss  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @foof(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float 2.000000e+00, %3
ret float %4
}

LLVM IR (-O2):
define float @foof(float %0) {
%2 = fmul float %0, 2.000000e+00
ret float %2
}
/* Variables and functions */
scalar_t__ malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
char *str_dup(const char *str) {
  char *sdup = (char *)malloc(strlen(str) + 1);
  if (sdup)
    strcpy(sdup, str);
  return sdup;
}


x86 assembly (clang, -O0):
<str_dup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     116d <str_dup+0x3d>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_dup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1158 <str_dup+0x28>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @str_dup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i64 @malloc(i64 %6)
%8 = inttoptr i64 %7 to i8*
store i8* %8, i8** %3
%9 = load i8*, i8** %3
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = load i8*, i8** %2
%14 = call i32 @strcpy(i8* %12, i8* %13)
br label %15
15: ; preds = %11, %1
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
define i8* @str_dup(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i64 @malloc(i64 %3)
%5 = inttoptr i64 %4 to i8*
%6 = icmp eq i64 %4, 0
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @strcpy(i8* %5, i8* %0)
br label %9
9: ; preds = %7, %1
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void __attribute__((constructor)) howdy_ctor(void) {
  printf("I am the libhowdy constructor!\n");
}


x86 assembly (clang, -O0):
<howdy_ctor>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<howdy_ctor>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"I am the libhowdy constructor!\0A\00"
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @howdy_ctor, i8* null }]
define void @howdy_ctor() {
%1 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @howdy_ctor, i8* null }]
@str = [31 x i8] c"I am the libhowdy constructor!\00"
define void @howdy_ctor() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
ret void
}
unsigned long fb_formatRGB(unsigned char red, unsigned char green,
                           unsigned char blue) {
  unsigned long color = 0;
  color = (color << 0) | red;
  color = (color << 8) | green;
  color = (color << 8) | blue;
  return color;
}


x86 assembly (clang, -O0):
<fb_formatRGB>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %dil,%dl
mov    %dl,-0x1(%rbp)
mov    %cl,-0x2(%rbp)
mov    %al,-0x3(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shl    $0x0,%rax
movzbl -0x1(%rbp),%ecx
or     %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shl    $0x8,%rax
movzbl -0x2(%rbp),%ecx
or     %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shl    $0x8,%rax
movzbl -0x3(%rbp),%ecx
or     %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb_formatRGB>:
mov    %edi,%eax
mov    %esi,%ecx
shl    $0x10,%rax
shl    $0x8,%rcx
or     %rax,%rcx
mov    %edx,%eax
or     %rcx,%rax
ret

LLVM IR (-O0):
define i64 @fb_formatRGB(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
%7 = alloca i64
store i8 %0, i8* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
store i64 0, i64* %7
%8 = load i64, i64* %7
%9 = shl i64 %8, 0
%10 = load i8, i8* %4
%11 = zext i8 %10 to i64
%12 = or i64 %9, %11
store i64 %12, i64* %7
%13 = load i64, i64* %7
%14 = shl i64 %13, 8
%15 = load i8, i8* %5
%16 = zext i8 %15 to i64
%17 = or i64 %14, %16
store i64 %17, i64* %7
%18 = load i64, i64* %7
%19 = shl i64 %18, 8
%20 = load i8, i8* %6
%21 = zext i8 %20 to i64
%22 = or i64 %19, %21
store i64 %22, i64* %7
%23 = load i64, i64* %7
ret i64 %23
}

LLVM IR (-O2):
define i64 @fb_formatRGB(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2) {
%4 = zext i8 %0 to i64
%5 = zext i8 %1 to i64
%6 = shl nuw nsw i64 %4, 16
%7 = shl nuw nsw i64 %5, 8
%8 = or i64 %7, %6
%9 = zext i8 %2 to i64
%10 = or i64 %8, %9
ret i64 %10
}
/* Variables and functions */
int /*<<< orphan*/ drive(int, int);
void rightPointTurn(int turnSpeed) { drive(-1 * turnSpeed, turnSpeed); }


x86 assembly (clang, -O0):
<rightPointTurn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0xffffffff,-0x4(%rbp),%edi
mov    -0x4(%rbp),%esi
call   1030 <drive@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rightPointTurn>:
mov    %edi,%eax
neg    %eax
mov    %edi,%esi
mov    %eax,%edi
jmp    1030 <drive@plt>

LLVM IR (-O0):
define void @rightPointTurn(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 -1, %3
%5 = load i32, i32* %2
%6 = call i32 @drive(i32 %4, i32 %5)
ret void
}

LLVM IR (-O2):
define void @rightPointTurn(i32 %0) {
%2 = sub nsw i32 0, %0
%3 = tail call i32 @drive(i32 %2, i32 %0)
ret void
}
/* Variables and functions */
int rand();
char coins_method() {
  int rnum = rand();
  return '6' + (rnum & 1) + ((rnum & 2) >> 1) + ((rnum & 4) >> 2);
}


x86 assembly (clang, -O0):
<coins_method>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
add    $0x36,%eax
mov    -0x4(%rbp),%ecx
and    $0x2,%ecx
sar    $0x1,%ecx
add    %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0x4,%ecx
sar    $0x2,%ecx
add    %ecx,%eax
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<coins_method>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
mov    %eax,%ecx
and    $0x1,%ecx
mov    %eax,%edx
shr    %edx
and    $0x1,%edx
add    %ecx,%edx
shr    $0x2,%eax
and    $0x1,%eax
add    %edx,%eax
add    $0x36,%al
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @coins_method() {
%1 = alloca i32
%2 = call i32 (...) @rand()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = and i32 %3, 1
%5 = add nsw i32 54, %4
%6 = load i32, i32* %1
%7 = and i32 %6, 2
%8 = ashr i32 %7, 1
%9 = add nsw i32 %5, %8
%10 = load i32, i32* %1
%11 = and i32 %10, 4
%12 = ashr i32 %11, 2
%13 = add nsw i32 %9, %12
%14 = trunc i32 %13 to i8
ret i8 %14
}

LLVM IR (-O2):
define signext i8 @coins_method() {
%1 = tail call i32 (...) @rand()
%2 = and i32 %1, 1
%3 = or i32 %2, 54
%4 = lshr i32 %1, 1
%5 = and i32 %4, 1
%6 = add nuw nsw i32 %3, %5
%7 = lshr i32 %1, 2
%8 = and i32 %7, 1
%9 = add nuw nsw i32 %6, %8
%10 = trunc i32 %9 to i8
ret i8 %10
}
int aa_opt_is_geq(int lb, int ub) { return lb && !ub; }


x86 assembly (clang, -O0):
<aa_opt_is_geq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x9(%rbp)
je     1125 <aa_opt_is_geq+0x25>
cmpl   $0x0,-0x8(%rbp)
setne  %al
xor    $0xff,%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aa_opt_is_geq>:
test   %edi,%edi
setne  %al
test   %esi,%esi
sete   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @aa_opt_is_geq(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
br label %11
11: ; preds = %7, %2
%12 = phi i1 [ false, %2 ], [ %10, %7 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @aa_opt_is_geq(i32 %0, i32 %1) {
%3 = icmp ne i32 %0, 0
%4 = icmp eq i32 %1, 0
%5 = and i1 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ IF_dupC_i(int);
void IF_overC(void) { IF_dupC_i(2); }


x86 assembly (clang, -O0):
<IF_overC>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <IF_dupC_i@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<IF_overC>:
mov    $0x2,%edi
jmp    1030 <IF_dupC_i@plt>

LLVM IR (-O0):
define void @IF_overC() {
%1 = call i32 @IF_dupC_i(i32 2)
ret void
}

LLVM IR (-O2):
define void @IF_overC() {
%1 = tail call i32 @IF_dupC_i(i32 2)
ret void
}
/* Type definitions */
typedef char *pid_t;

/* Variables and functions */
pid_t fork(void) {
  long __res;
  __asm__ volatile("int $0x80" : "=a"(__res) : "0"(2));
  do {
    return (pid_t)(__res);
  } while (0);
}


x86 assembly (clang, -O0):
<fork>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
int    $0x80
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fork>:
mov    $0x2,%eax
int    $0x80
ret

LLVM IR (-O0):
define i8* @fork() {
%1 = alloca i64
%2 = call i64 asm sideeffect "int $$0x80", "={ax},0,~{dirflag},~{fpsr},~{flags}"(i64 2)
store i64 %2, i64* %1
br label %3
3: ; preds = %0
%4 = load i64, i64* %1
%5 = inttoptr i64 %4 to i8*
br label %6
6: ; preds = %3
ret i8* %5
}

LLVM IR (-O2):
define i8* @fork() {
%1 = tail call i64 asm sideeffect "int $$0x80", "={ax},0,~{dirflag},~{fpsr},~{flags}"(i64 2)
%2 = inttoptr i64 %1 to i8*
ret i8* %2
}
void Timer5A_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<Timer5A_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <Timer5A_Handler+0x9>
jmp    1109 <Timer5A_Handler+0x9>

x86 assembly (clang, -O2):
<Timer5A_Handler>:
jmp    1100 <Timer5A_Handler>

LLVM IR (-O0):
define void @Timer5A_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @Timer5A_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Type definitions */
typedef int u_int64_t;
typedef int /*<<< orphan*/ u_int32_t;

/* Variables and functions */
u_int32_t int64to32hash(u_int64_t key) {
  key = (~key) + (key << 18);
  key = key ^ (key >> 31);
  key = key * 21;
  key = key ^ (key >> 11);
  key = key + (key << 6);
  key = key ^ (key >> 22);
  return (u_int32_t)key;
}


x86 assembly (clang, -O0):
<int64to32hash>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
mov    -0x4(%rbp),%ecx
shl    $0x12,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x1f,%ecx
xor    %ecx,%eax
mov    %eax,-0x4(%rbp)
imul   $0x15,-0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0xb,%ecx
xor    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
shl    $0x6,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x16,%ecx
xor    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int64to32hash>:
mov    %edi,%eax
not    %eax
shl    $0x12,%edi
add    %eax,%edi
mov    %edi,%eax
sar    $0x1f,%eax
xor    %edi,%eax
lea    (%rax,%rax,4),%ecx
lea    (%rax,%rcx,4),%eax
mov    %eax,%ecx
sar    $0xb,%ecx
xor    %eax,%ecx
mov    %ecx,%edx
shl    $0x6,%edx
add    %ecx,%edx
mov    %edx,%eax
sar    $0x16,%eax
xor    %edx,%eax
ret

LLVM IR (-O0):
define i32 @int64to32hash(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = xor i32 %3, -1
%5 = load i32, i32* %2
%6 = shl i32 %5, 18
%7 = add nsw i32 %4, %6
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = load i32, i32* %2
%10 = ashr i32 %9, 31
%11 = xor i32 %8, %10
store i32 %11, i32* %2
%12 = load i32, i32* %2
%13 = mul nsw i32 %12, 21
store i32 %13, i32* %2
%14 = load i32, i32* %2
%15 = load i32, i32* %2
%16 = ashr i32 %15, 11
%17 = xor i32 %14, %16
store i32 %17, i32* %2
%18 = load i32, i32* %2
%19 = load i32, i32* %2
%20 = shl i32 %19, 6
%21 = add nsw i32 %18, %20
store i32 %21, i32* %2
%22 = load i32, i32* %2
%23 = load i32, i32* %2
%24 = ashr i32 %23, 22
%25 = xor i32 %22, %24
store i32 %25, i32* %2
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @int64to32hash(i32 %0) {
%2 = xor i32 %0, -1
%3 = shl i32 %0, 18
%4 = add nsw i32 %3, %2
%5 = ashr i32 %4, 31
%6 = xor i32 %5, %4
%7 = mul nsw i32 %6, 21
%8 = ashr i32 %7, 11
%9 = xor i32 %8, %7
%10 = mul i32 %9, 65
%11 = ashr i32 %10, 22
%12 = xor i32 %11, %10
ret i32 %12
}
double calc_temp_penalty(temp, tempcrit)
double temp, tempcrit;
{
  double value = 0.0;
  if (temp > tempcrit) {
    value = (temp - tempcrit) * (temp - tempcrit) / (7);
  }
  return (value);
}


x86 assembly (clang, -O0):
<calc_temp_penalty>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    114f <calc_temp_penalty+0x4f>
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
subsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeba(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc_temp_penalty>:
xorpd  %xmm2,%xmm2
ucomisd %xmm1,%xmm0
jbe    111e <calc_temp_penalty+0x1e>
subsd  %xmm1,%xmm0
mulsd  %xmm0,%xmm0
divsd  0xee6(%rip),%xmm0
movapd %xmm0,%xmm2
movapd %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @calc_temp_penalty(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
store double 0.000000e+00, double* %5
%6 = load double, double* %3
%7 = load double, double* %4
%8 = fcmp ogt double %6, %7
br i1 %8, label %9, label %18
9: ; preds = %2
%10 = load double, double* %3
%11 = load double, double* %4
%12 = fsub double %10, %11
%13 = load double, double* %3
%14 = load double, double* %4
%15 = fsub double %13, %14
%16 = fmul double %12, %15
%17 = fdiv double %16, 7.000000e+00
store double %17, double* %5
br label %18
18: ; preds = %9, %2
%19 = load double, double* %5
ret double %19
}

LLVM IR (-O2):
define double @calc_temp_penalty(double %0, double %1) {
%3 = fcmp ogt double %0, %1
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = fsub double %0, %1
%6 = fmul double %5, %5
%7 = fdiv double %6, 7.000000e+00
br label %8
8: ; preds = %4, %2
%9 = phi double [ %7, %4 ], [ 0.000000e+00, %2 ]
ret double %9
}
/* Variables and functions */
scalar_t__ malloc(int);
int *vetor_aloca(int n) { return (int *)malloc(sizeof(int) * n); }


x86 assembly (clang, -O0):
<vetor_aloca>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vetor_aloca>:
shl    $0x2,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i32* @vetor_aloca(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = mul i64 4, %4
%6 = trunc i64 %5 to i32
%7 = call i64 @malloc(i32 %6)
%8 = inttoptr i64 %7 to i32*
ret i32* %8
}

LLVM IR (-O2):
define i32* @vetor_aloca(i32 %0) {
%2 = shl i32 %0, 2
%3 = tail call i64 @malloc(i32 %2)
%4 = inttoptr i64 %3 to i32*
ret i32* %4
}
/* Variables and functions */
long long round(double);
long long int llround(double x) { return round(x); }


x86 assembly (clang, -O0):
<llround>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <round@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<llround>:
jmp    1030 <round@plt>

LLVM IR (-O0):
define i64 @llround(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i64 @round(double %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @llround(double %0) {
%2 = tail call i64 @round(double %0)
ret i64 %2
}
/* Type definitions */
struct prime_current_block {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ do_early_prime_group_1_type(struct prime_current_block *,
                                               int, int);
void do_early_prime_7(struct prime_current_block *pcb) {
  do_early_prime_group_1_type(pcb, 7, 1);
}


x86 assembly (clang, -O0):
<do_early_prime_7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x7,%esi
mov    $0x1,%edx
call   1030 <do_early_prime_group_1_type@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_early_prime_7>:
mov    $0x7,%esi
mov    $0x1,%edx
jmp    1030 <do_early_prime_group_1_type@plt>

LLVM IR (-O0):
%struct.prime_current_block = type { i32 }
define void @do_early_prime_7(%struct.prime_current_block* %0) {
%2 = alloca %struct.prime_current_block*
store %struct.prime_current_block* %0, %struct.prime_current_block** %2
%3 = load %struct.prime_current_block*, %struct.prime_current_block** %2
%4 = call i32 @do_early_prime_group_1_type(%struct.prime_current_block* %3, i32 7, i32 1)
ret void
}

LLVM IR (-O2):
%struct.prime_current_block = type { i32 }
define void @do_early_prime_7(%struct.prime_current_block* %0) {
%2 = tail call i32 @do_early_prime_group_1_type(%struct.prime_current_block* %0, i32 7, i32 1)
ret void
}
int SubnetIsValid(unsigned char *subnet) {
  int fvalid = 0;
  if ((subnet[0] & 0x80) == 0x80)
    fvalid = 1;
  return (fvalid);
}


x86 assembly (clang, -O0):
<SubnetIsValid>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
and    $0x80,%eax
cmp    $0x80,%eax
jne    112d <SubnetIsValid+0x2d>
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SubnetIsValid>:
movzbl (%rdi),%eax
shr    $0x7,%eax
ret

LLVM IR (-O0):
define i32 @SubnetIsValid(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = and i32 %7, 128
%9 = icmp eq i32 %8, 128
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 1, i32* %3
br label %11
11: ; preds = %10, %1
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @SubnetIsValid(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = lshr i8 %2, 7
%4 = zext i8 %3 to i32
ret i32 %4
}
unsigned char f23(unsigned char x, unsigned int y) {
  return (x >> (8 - y)) ^ (x << y);
}


x86 assembly (clang, -O0):
<f23>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
mov    $0x8,%ecx
sub    -0x8(%rbp),%ecx
sar    %cl,%eax
movzbl -0x1(%rbp),%edx
mov    -0x8(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f23>:
mov    $0x8,%cl
sub    %sil,%cl
mov    %edi,%eax
shr    %cl,%eax
mov    %esi,%ecx
shl    %cl,%edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @f23(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i32, i32* %4
%8 = sub i32 8, %7
%9 = ashr i32 %6, %8
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = load i32, i32* %4
%13 = shl i32 %11, %12
%14 = xor i32 %9, %13
%15 = trunc i32 %14 to i8
ret i8 %15
}

LLVM IR (-O2):
define zeroext i8 @f23(i8 zeroext %0, i32 %1) {
%3 = zext i8 %0 to i32
%4 = sub i32 8, %1
%5 = lshr i32 %3, %4
%6 = shl i32 %3, %1
%7 = xor i32 %5, %6
%8 = trunc i32 %7 to i8
ret i8 %8
}
void setlist_create_final(void *data __attribute__((unused)),
                          unsigned int flags __attribute__((unused))) {}


x86 assembly (clang, -O0):
<setlist_create_final>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<setlist_create_final>:
ret

LLVM IR (-O0):
define void @setlist_create_final(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @setlist_create_final(i8* nocapture %0, i32 %1) {
ret void
}
float squaref(float v) { return v * v; }


x86 assembly (clang, -O0):
<squaref>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<squaref>:
mulss  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @squaref(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fmul float %3, %4
ret float %5
}

LLVM IR (-O2):
define float @squaref(float %0) {
%2 = fmul float %0, %0
ret float %2
}
regx0regx1_set(r0, r1, x0, x1, p0, p1) int r0, r1;
int *p0, *p1;
{ (p0[x0]) = (p1[x1]); }


x86 assembly (clang, -O0):
<regx0regx1_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x28(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x20(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<regx0regx1_set>:
movslq %ecx,%rax
mov    (%r9,%rax,4),%eax
movslq %edx,%rcx
mov    %eax,(%r8,%rcx,4)
ret

LLVM IR (-O0):
define i32 @regx0regx1_set(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32*, i32** %13
%15 = load i32, i32* %11
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32*, i32** %12
%20 = load i32, i32* %10
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i32, i32* %19, i64 %21
store i32 %18, i32* %22
%23 = load i32, i32* %7
ret i32 %23
}

LLVM IR (-O2):
define i32 @regx0regx1_set(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture writeonly %4, i32* nocapture %5) {
%7 = sext i32 %3 to i64
%8 = getelementptr inbounds i32, i32* %5, i64 %7
%9 = load i32, i32* %8
%10 = sext i32 %2 to i64
%11 = getelementptr inbounds i32, i32* %4, i64 %10
store i32 %9, i32* %11
ret i32 undef
}
/* Variables and functions */
int intpart_from_floatpart_chunked(int, int *, float *, int, int);
int intpart_from_floatpart(int n, int *intpart, float *floatpart, int l) {
  return intpart_from_floatpart_chunked(n, intpart, floatpart, 1, l);
}


x86 assembly (clang, -O0):
<intpart_from_floatpart>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%r8d
mov    $0x1,%ecx
call   1030 <intpart_from_floatpart_chunked@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intpart_from_floatpart>:
mov    %ecx,%r8d
mov    $0x1,%ecx
jmp    1030 <intpart_from_floatpart_chunked@plt>

LLVM IR (-O0):
define i32 @intpart_from_floatpart(i32 %0, i32* %1, float* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca float*
%8 = alloca i32
store i32 %0, i32* %5
store i32* %1, i32** %6
store float* %2, float** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32*, i32** %6
%11 = load float*, float** %7
%12 = load i32, i32* %8
%13 = call i32 @intpart_from_floatpart_chunked(i32 %9, i32* %10, float* %11, i32 1, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @intpart_from_floatpart(i32 %0, i32* %1, float* %2, i32 %3) {
%5 = tail call i32 @intpart_from_floatpart_chunked(i32 %0, i32* %1, float* %2, i32 1, i32 %3)
ret i32 %5
}
void test2(int *x) { *x = 1; }


x86 assembly (clang, -O0):
<test2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test2>:
movl   $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @test2(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
store i32 1, i32* %3
ret void
}

LLVM IR (-O2):
define void @test2(i32* nocapture writeonly %0) {
store i32 1, i32* %0
ret void
}
void nfs4_fscache_get_client_cookie(struct nfs_client *clp) {}


x86 assembly (clang, -O0):
<nfs4_fscache_get_client_cookie>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nfs4_fscache_get_client_cookie>:
ret

LLVM IR (-O0):
%struct.nfs_client = type opaque
define void @nfs4_fscache_get_client_cookie(%struct.nfs_client* %0) {
%2 = alloca %struct.nfs_client*
store %struct.nfs_client* %0, %struct.nfs_client** %2
ret void
}

LLVM IR (-O2):
%struct.nfs_client = type opaque
define void @nfs4_fscache_get_client_cookie(%struct.nfs_client* nocapture %0) {
ret void
}