#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int pixel_ssd_16x8(uint8_t *pix1, int i_stride_pix1, uint8_t *pix2,
                   int i_stride_pix2) {
  int i_sum = 0;
  int x, y;
  for (y = 0; y < 8; y++) {
    for (x = 0; x < 16; x++) {
      int d = pix1[x] - pix2[x];
      i_sum += d * d;
    }
    pix1 += i_stride_pix1;
    pix2 += i_stride_pix2;
  }
  return i_sum;
}


x86 assembly (clang, -O0):
<pixel_ssd_16x8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
movl   $0x0,-0x20(%rbp)
movl   $0x0,-0x28(%rbp)
cmpl   $0x8,-0x28(%rbp)
jge    11a7 <pixel_ssd_16x8+0xa7>
movl   $0x0,-0x24(%rbp)
cmpl   $0x10,-0x24(%rbp)
jge    116f <pixel_ssd_16x8+0x6f>
mov    -0x8(%rbp),%rax
movslq -0x24(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    -0x18(%rbp),%rcx
movslq -0x24(%rbp),%rdx
sub    (%rcx,%rdx,4),%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
imul   -0x2c(%rbp),%eax
add    -0x20(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    1131 <pixel_ssd_16x8+0x31>
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
movslq %ecx,%rcx
shl    $0x2,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x1c(%rbp),%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
shl    $0x2,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x28(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x28(%rbp)
jmp    1120 <pixel_ssd_16x8+0x20>
mov    -0x20(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pixel_ssd_16x8>:
movslq %esi,%rsi
movslq %ecx,%rax
movdqu (%rdi),%xmm2
movdqu 0x10(%rdi),%xmm0
movdqu 0x20(%rdi),%xmm3
movdqu 0x30(%rdi),%xmm1
movdqu (%rdx),%xmm4
psubd  %xmm4,%xmm2
movdqu 0x10(%rdx),%xmm4
psubd  %xmm4,%xmm0
movdqu 0x20(%rdx),%xmm4
psubd  %xmm4,%xmm3
movdqu 0x30(%rdx),%xmm4
psubd  %xmm4,%xmm1
pshufd $0xf5,%xmm3,%xmm4
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
pmuludq %xmm4,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm3
pshufd $0xf5,%xmm2,%xmm4
pmuludq %xmm2,%xmm2
pshufd $0xe8,%xmm2,%xmm2
pmuludq %xmm4,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm2
paddd  %xmm3,%xmm2
pshufd $0xf5,%xmm1,%xmm3
pmuludq %xmm1,%xmm1
pshufd $0xe8,%xmm1,%xmm1
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
punpckldq %xmm3,%xmm1
pshufd $0xf5,%xmm0,%xmm3
pmuludq %xmm0,%xmm0
pshufd $0xe8,%xmm0,%xmm0
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
punpckldq %xmm3,%xmm0
paddd  %xmm1,%xmm0
paddd  %xmm2,%xmm0
pshufd $0xee,%xmm0,%xmm1
paddd  %xmm0,%xmm1
pshufd $0x55,%xmm1,%xmm0
paddd  %xmm1,%xmm0
movd   %xmm0,%r10d
lea    (%rdi,%rsi,4),%rcx
lea    (%rdx,%rax,4),%r8
movdqu (%rdi,%rsi,4),%xmm2
movdqu 0x10(%rdi,%rsi,4),%xmm0
movdqu 0x20(%rdi,%rsi,4),%xmm3
movdqu 0x30(%rdi,%rsi,4),%xmm1
movdqu (%rdx,%rax,4),%xmm4
psubd  %xmm4,%xmm2
movdqu 0x10(%rdx,%rax,4),%xmm4
psubd  %xmm4,%xmm0
movdqu 0x20(%rdx,%rax,4),%xmm4
psubd  %xmm4,%xmm3
movdqu 0x30(%rdx,%rax,4),%xmm4
psubd  %xmm4,%xmm1
pshufd $0xf5,%xmm3,%xmm4
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
pmuludq %xmm4,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm3
pshufd $0xf5,%xmm2,%xmm4
pmuludq %xmm2,%xmm2
pshufd $0xe8,%xmm2,%xmm2
pmuludq %xmm4,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm2
paddd  %xmm3,%xmm2
pshufd $0xf5,%xmm1,%xmm3
pmuludq %xmm1,%xmm1
pshufd $0xe8,%xmm1,%xmm1
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
punpckldq %xmm3,%xmm1
pshufd $0xf5,%xmm0,%xmm3
pmuludq %xmm0,%xmm0
pshufd $0xe8,%xmm0,%xmm0
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
punpckldq %xmm3,%xmm0
paddd  %xmm1,%xmm0
paddd  %xmm2,%xmm0
pshufd $0xee,%xmm0,%xmm1
paddd  %xmm0,%xmm1
pshufd $0x55,%xmm1,%xmm0
paddd  %xmm1,%xmm0
movd   %xmm0,%r9d
add    %r10d,%r9d
lea    (%rcx,%rsi,4),%rdi
lea    (%r8,%rax,4),%rdx
movdqu (%rcx,%rsi,4),%xmm2
movdqu 0x10(%rcx,%rsi,4),%xmm0
movdqu 0x20(%rcx,%rsi,4),%xmm3
movdqu 0x30(%rcx,%rsi,4),%xmm1
movdqu (%r8,%rax,4),%xmm4
psubd  %xmm4,%xmm2
movdqu 0x10(%r8,%rax,4),%xmm4
psubd  %xmm4,%xmm0
movdqu 0x20(%r8,%rax,4),%xmm4
psubd  %xmm4,%xmm3
movdqu 0x30(%r8,%rax,4),%xmm4
psubd  %xmm4,%xmm1
pshufd $0xf5,%xmm3,%xmm4
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
pmuludq %xmm4,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm3
pshufd $0xf5,%xmm2,%xmm4
pmuludq %xmm2,%xmm2
pshufd $0xe8,%xmm2,%xmm2
pmuludq %xmm4,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm2
paddd  %xmm3,%xmm2
pshufd $0xf5,%xmm1,%xmm3
pmuludq %xmm1,%xmm1
pshufd $0xe8,%xmm1,%xmm1
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
punpckldq %xmm3,%xmm1
pshufd $0xf5,%xmm0,%xmm3
pmuludq %xmm0,%xmm0
pshufd $0xe8,%xmm0,%xmm0
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
punpckldq %xmm3,%xmm0
paddd  %xmm1,%xmm0
paddd  %xmm2,%xmm0
pshufd $0xee,%xmm0,%xmm1
paddd  %xmm0,%xmm1
pshufd $0x55,%xmm1,%xmm0
paddd  %xmm1,%xmm0
movd   %xmm0,%r10d
add    %r9d,%r10d
lea    (%rdi,%rsi,4),%rcx
lea    (%rdx,%rax,4),%r8
movdqu (%rdi,%rsi,4),%xmm2
movdqu 0x10(%rdi,%rsi,4),%xmm0
movdqu 0x20(%rdi,%rsi,4),%xmm3
movdqu 0x30(%rdi,%rsi,4),%xmm1
movdqu (%rdx,%rax,4),%xmm4
psubd  %xmm4,%xmm2
movdqu 0x10(%rdx,%rax,4),%xmm4
psubd  %xmm4,%xmm0
movdqu 0x20(%rdx,%rax,4),%xmm4
psubd  %xmm4,%xmm3
movdqu 0x30(%rdx,%rax,4),%xmm4
psubd  %xmm4,%xmm1
pshufd $0xf5,%xmm3,%xmm4
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
pmuludq %xmm4,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm3
pshufd $0xf5,%xmm2,%xmm4
pmuludq %xmm2,%xmm2
pshufd $0xe8,%xmm2,%xmm2
pmuludq %xmm4,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm2
paddd  %xmm3,%xmm2
pshufd $0xf5,%xmm1,%xmm3
pmuludq %xmm1,%xmm1
pshufd $0xe8,%xmm1,%xmm1
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
punpckldq %xmm3,%xmm1
pshufd $0xf5,%xmm0,%xmm3
pmuludq %xmm0,%xmm0
pshufd $0xe8,%xmm0,%xmm0
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
punpckldq %xmm3,%xmm0
paddd  %xmm1,%xmm0
paddd  %xmm2,%xmm0
pshufd $0xee,%xmm0,%xmm1
paddd  %xmm0,%xmm1
pshufd $0x55,%xmm1,%xmm0
paddd  %xmm1,%xmm0
movd   %xmm0,%r9d
add    %r10d,%r9d
lea    (%rcx,%rsi,4),%rdi
lea    (%r8,%rax,4),%rdx
movdqu (%rcx,%rsi,4),%xmm2
movdqu 0x10(%rcx,%rsi,4),%xmm0
movdqu 0x20(%rcx,%rsi,4),%xmm3
movdqu 0x30(%rcx,%rsi,4),%xmm1
movdqu (%r8,%rax,4),%xmm4
psubd  %xmm4,%xmm2
movdqu 0x10(%r8,%rax,4),%xmm4
psubd  %xmm4,%xmm0
movdqu 0x20(%r8,%rax,4),%xmm4
psubd  %xmm4,%xmm3
movdqu 0x30(%r8,%rax,4),%xmm4
psubd  %xmm4,%xmm1
pshufd $0xf5,%xmm3,%xmm4
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
pmuludq %xmm4,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm3
pshufd $0xf5,%xmm2,%xmm4
pmuludq %xmm2,%xmm2
pshufd $0xe8,%xmm2,%xmm2
pmuludq %xmm4,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm2
paddd  %xmm3,%xmm2
pshufd $0xf5,%xmm1,%xmm3
pmuludq %xmm1,%xmm1
pshufd $0xe8,%xmm1,%xmm1
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
punpckldq %xmm3,%xmm1
pshufd $0xf5,%xmm0,%xmm3
pmuludq %xmm0,%xmm0
pshufd $0xe8,%xmm0,%xmm0
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
punpckldq %xmm3,%xmm0
paddd  %xmm1,%xmm0
paddd  %xmm2,%xmm0
pshufd $0xee,%xmm0,%xmm1
paddd  %xmm0,%xmm1
pshufd $0x55,%xmm1,%xmm0
paddd  %xmm1,%xmm0
movd   %xmm0,%r10d
add    %r9d,%r10d
lea    (%rdi,%rsi,4),%rcx
lea    (%rdx,%rax,4),%r8
movdqu (%rdi,%rsi,4),%xmm2
movdqu 0x10(%rdi,%rsi,4),%xmm0
movdqu 0x20(%rdi,%rsi,4),%xmm3
movdqu 0x30(%rdi,%rsi,4),%xmm1
movdqu (%rdx,%rax,4),%xmm4
psubd  %xmm4,%xmm2
movdqu 0x10(%rdx,%rax,4),%xmm4
psubd  %xmm4,%xmm0
movdqu 0x20(%rdx,%rax,4),%xmm4
psubd  %xmm4,%xmm3
movdqu 0x30(%rdx,%rax,4),%xmm4
psubd  %xmm4,%xmm1
pshufd $0xf5,%xmm3,%xmm4
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
pmuludq %xmm4,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm3
pshufd $0xf5,%xmm2,%xmm4
pmuludq %xmm2,%xmm2
pshufd $0xe8,%xmm2,%xmm2
pmuludq %xmm4,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm2
paddd  %xmm3,%xmm2
pshufd $0xf5,%xmm1,%xmm3
pmuludq %xmm1,%xmm1
pshufd $0xe8,%xmm1,%xmm1
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
punpckldq %xmm3,%xmm1
pshufd $0xf5,%xmm0,%xmm3
pmuludq %xmm0,%xmm0
pshufd $0xe8,%xmm0,%xmm0
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
punpckldq %xmm3,%xmm0
paddd  %xmm1,%xmm0
paddd  %xmm2,%xmm0
pshufd $0xee,%xmm0,%xmm1
paddd  %xmm0,%xmm1
pshufd $0x55,%xmm1,%xmm0
paddd  %xmm1,%xmm0
movd   %xmm0,%r9d
add    %r10d,%r9d
lea    (%rcx,%rsi,4),%rdi
lea    (%r8,%rax,4),%rdx
movdqu (%rcx,%rsi,4),%xmm2
movdqu 0x10(%rcx,%rsi,4),%xmm0
movdqu 0x20(%rcx,%rsi,4),%xmm3
movdqu 0x30(%rcx,%rsi,4),%xmm1
movdqu (%r8,%rax,4),%xmm4
psubd  %xmm4,%xmm2
movdqu 0x10(%r8,%rax,4),%xmm4
psubd  %xmm4,%xmm0
movdqu 0x20(%r8,%rax,4),%xmm4
psubd  %xmm4,%xmm3
movdqu 0x30(%r8,%rax,4),%xmm4
psubd  %xmm4,%xmm1
pshufd $0xf5,%xmm3,%xmm4
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
pmuludq %xmm4,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm3
pshufd $0xf5,%xmm2,%xmm4
pmuludq %xmm2,%xmm2
pshufd $0xe8,%xmm2,%xmm2
pmuludq %xmm4,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm2
paddd  %xmm3,%xmm2
pshufd $0xf5,%xmm1,%xmm3
pmuludq %xmm1,%xmm1
pshufd $0xe8,%xmm1,%xmm1
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
punpckldq %xmm3,%xmm1
pshufd $0xf5,%xmm0,%xmm3
pmuludq %xmm0,%xmm0
pshufd $0xe8,%xmm0,%xmm0
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
punpckldq %xmm3,%xmm0
paddd  %xmm1,%xmm0
paddd  %xmm2,%xmm0
pshufd $0xee,%xmm0,%xmm1
paddd  %xmm0,%xmm1
pshufd $0x55,%xmm1,%xmm0
paddd  %xmm1,%xmm0
movd   %xmm0,%ecx
add    %r9d,%ecx
movdqu (%rdi,%rsi,4),%xmm2
movdqu 0x10(%rdi,%rsi,4),%xmm0
movdqu 0x20(%rdi,%rsi,4),%xmm3
movdqu 0x30(%rdi,%rsi,4),%xmm1
movdqu (%rdx,%rax,4),%xmm4
psubd  %xmm4,%xmm2
movdqu 0x10(%rdx,%rax,4),%xmm4
psubd  %xmm4,%xmm0
movdqu 0x20(%rdx,%rax,4),%xmm4
psubd  %xmm4,%xmm3
movdqu 0x30(%rdx,%rax,4),%xmm4
psubd  %xmm4,%xmm1
pshufd $0xf5,%xmm3,%xmm4
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
pmuludq %xmm4,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm3
pshufd $0xf5,%xmm2,%xmm4
pmuludq %xmm2,%xmm2
pshufd $0xe8,%xmm2,%xmm2
pmuludq %xmm4,%xmm4
pshufd $0xe8,%xmm4,%xmm4
punpckldq %xmm4,%xmm2
paddd  %xmm3,%xmm2
pshufd $0xf5,%xmm1,%xmm3
pmuludq %xmm1,%xmm1
pshufd $0xe8,%xmm1,%xmm1
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
punpckldq %xmm3,%xmm1
pshufd $0xf5,%xmm0,%xmm3
pmuludq %xmm0,%xmm0
pshufd $0xe8,%xmm0,%xmm0
pmuludq %xmm3,%xmm3
pshufd $0xe8,%xmm3,%xmm3
punpckldq %xmm3,%xmm0
paddd  %xmm1,%xmm0
paddd  %xmm2,%xmm0
pshufd $0xee,%xmm0,%xmm1
paddd  %xmm0,%xmm1
pshufd $0x55,%xmm1,%xmm0
paddd  %xmm1,%xmm0
movd   %xmm0,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @pixel_ssd_16x8(i32* %0, i32 %1, i32* %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32 %3, i32* %8
store i32 0, i32* %9
store i32 0, i32* %11
br label %13
13: ; preds = %49, %4
%14 = load i32, i32* %11
%15 = icmp slt i32 %14, 8
br i1 %15, label %16, label %52
16: ; preds = %13
store i32 0, i32* %10
br label %17
17: ; preds = %37, %16
%18 = load i32, i32* %10
%19 = icmp slt i32 %18, 16
br i1 %19, label %20, label %40
20: ; preds = %17
%21 = load i32*, i32** %5
%22 = load i32, i32* %10
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i32, i32* %21, i64 %23
%25 = load i32, i32* %24
%26 = load i32*, i32** %7
%27 = load i32, i32* %10
%28 = sext i32 %27 to i64
%29 = getelementptr inbounds i32, i32* %26, i64 %28
%30 = load i32, i32* %29
%31 = sub nsw i32 %25, %30
store i32 %31, i32* %12
%32 = load i32, i32* %12
%33 = load i32, i32* %12
%34 = mul nsw i32 %32, %33
%35 = load i32, i32* %9
%36 = add nsw i32 %35, %34
store i32 %36, i32* %9
br label %37
37: ; preds = %20
%38 = load i32, i32* %10
%39 = add nsw i32 %38, 1
store i32 %39, i32* %10
br label %17
40: ; preds = %17
%41 = load i32, i32* %6
%42 = load i32*, i32** %5
%43 = sext i32 %41 to i64
%44 = getelementptr inbounds i32, i32* %42, i64 %43
store i32* %44, i32** %5
%45 = load i32, i32* %8
%46 = load i32*, i32** %7
%47 = sext i32 %45 to i64
%48 = getelementptr inbounds i32, i32* %46, i64 %47
store i32* %48, i32** %7
br label %49
49: ; preds = %40
%50 = load i32, i32* %11
%51 = add nsw i32 %50, 1
store i32 %51, i32* %11
br label %13
52: ; preds = %13
%53 = load i32, i32* %9
ret i32 %53
}

LLVM IR (-O2):
define i32 @pixel_ssd_16x8(i32* nocapture %0, i32 %1, i32* nocapture %2, i32 %3) {
%5 = sext i32 %1 to i64
%6 = sext i32 %3 to i64
%7 = bitcast i32* %0 to <16 x i32>*
%8 = load <16 x i32>, <16 x i32>* %7
%9 = bitcast i32* %2 to <16 x i32>*
%10 = load <16 x i32>, <16 x i32>* %9
%11 = sub nsw <16 x i32> %8, %10
%12 = mul nsw <16 x i32> %11, %11
%13 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %12)
%14 = getelementptr inbounds i32, i32* %0, i64 %5
%15 = getelementptr inbounds i32, i32* %2, i64 %6
%16 = bitcast i32* %14 to <16 x i32>*
%17 = load <16 x i32>, <16 x i32>* %16
%18 = bitcast i32* %15 to <16 x i32>*
%19 = load <16 x i32>, <16 x i32>* %18
%20 = sub nsw <16 x i32> %17, %19
%21 = mul nsw <16 x i32> %20, %20
%22 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %21)
%23 = add nsw i32 %22, %13
%24 = getelementptr inbounds i32, i32* %14, i64 %5
%25 = getelementptr inbounds i32, i32* %15, i64 %6
%26 = bitcast i32* %24 to <16 x i32>*
%27 = load <16 x i32>, <16 x i32>* %26
%28 = bitcast i32* %25 to <16 x i32>*
%29 = load <16 x i32>, <16 x i32>* %28
%30 = sub nsw <16 x i32> %27, %29
%31 = mul nsw <16 x i32> %30, %30
%32 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %31)
%33 = add nsw i32 %32, %23
%34 = getelementptr inbounds i32, i32* %24, i64 %5
%35 = getelementptr inbounds i32, i32* %25, i64 %6
%36 = bitcast i32* %34 to <16 x i32>*
%37 = load <16 x i32>, <16 x i32>* %36
%38 = bitcast i32* %35 to <16 x i32>*
%39 = load <16 x i32>, <16 x i32>* %38
%40 = sub nsw <16 x i32> %37, %39
%41 = mul nsw <16 x i32> %40, %40
%42 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %41)
%43 = add nsw i32 %42, %33
%44 = getelementptr inbounds i32, i32* %34, i64 %5
%45 = getelementptr inbounds i32, i32* %35, i64 %6
%46 = bitcast i32* %44 to <16 x i32>*
%47 = load <16 x i32>, <16 x i32>* %46
%48 = bitcast i32* %45 to <16 x i32>*
%49 = load <16 x i32>, <16 x i32>* %48
%50 = sub nsw <16 x i32> %47, %49
%51 = mul nsw <16 x i32> %50, %50
%52 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %51)
%53 = add nsw i32 %52, %43
%54 = getelementptr inbounds i32, i32* %44, i64 %5
%55 = getelementptr inbounds i32, i32* %45, i64 %6
%56 = bitcast i32* %54 to <16 x i32>*
%57 = load <16 x i32>, <16 x i32>* %56
%58 = bitcast i32* %55 to <16 x i32>*
%59 = load <16 x i32>, <16 x i32>* %58
%60 = sub nsw <16 x i32> %57, %59
%61 = mul nsw <16 x i32> %60, %60
%62 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %61)
%63 = add nsw i32 %62, %53
%64 = getelementptr inbounds i32, i32* %54, i64 %5
%65 = getelementptr inbounds i32, i32* %55, i64 %6
%66 = bitcast i32* %64 to <16 x i32>*
%67 = load <16 x i32>, <16 x i32>* %66
%68 = bitcast i32* %65 to <16 x i32>*
%69 = load <16 x i32>, <16 x i32>* %68
%70 = sub nsw <16 x i32> %67, %69
%71 = mul nsw <16 x i32> %70, %70
%72 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %71)
%73 = add nsw i32 %72, %63
%74 = getelementptr inbounds i32, i32* %64, i64 %5
%75 = getelementptr inbounds i32, i32* %65, i64 %6
%76 = bitcast i32* %74 to <16 x i32>*
%77 = load <16 x i32>, <16 x i32>* %76
%78 = bitcast i32* %75 to <16 x i32>*
%79 = load <16 x i32>, <16 x i32>* %78
%80 = sub nsw <16 x i32> %77, %79
%81 = mul nsw <16 x i32> %80, %80
%82 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %81)
%83 = add nsw i32 %82, %73
ret i32 %83
}