int main() {
  unsigned long long int abcdefgh;
  unsigned long long int hgfedcba;
  unsigned int abcd;
  unsigned int dcba;
  unsigned short int ab;
  unsigned short int ba;
  abcdefgh = 0x8899AABBCCDDEEFFULL;
  hgfedcba = (((abcdefgh & 0xFF00000000000000ULL) >> 56) |
              ((abcdefgh & 0x00FF000000000000ULL) >> 40) |
              ((abcdefgh & 0x0000FF0000000000ULL) >> 24) |
              ((abcdefgh & 0x000000FF00000000ULL) >> 8) |
              ((abcdefgh & 0x00000000FF000000ULL) << 8) |
              ((abcdefgh & 0x0000000000FF0000ULL) << 24) |
              ((abcdefgh & 0x000000000000FF00ULL) << 40) |
              ((abcdefgh & 0x00000000000000FFULL) << 56));
  hgfedcba = 0;
  abcd = 0xAABBCCDD;
  dcba = (((abcd & 0x000000FF) << 24) | ((abcd & 0x0000FF00) << 8) |
          ((abcd & 0x00FF0000) >> 8) | ((abcd & 0xFF000000) >> 24));
  dcba = 0;
  ab = 0xAABB;
  ba = (((ab & 0x00FF) << 8) | ((ab & 0xFF00) >> 8));
  ba = 0;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movabs $0x8899aabbccddeeff,%rax
aa 99 88
mov    %rax,-0x10(%rbp)
movabs $0xff00000000000000,%rax
and    -0x10(%rbp),%rax
shr    $0x38,%rax
movabs $0xff000000000000,%rcx
and    -0x10(%rbp),%rcx
shr    $0x28,%rcx
or     %rcx,%rax
movabs $0xff0000000000,%rcx
and    -0x10(%rbp),%rcx
shr    $0x18,%rcx
or     %rcx,%rax
movabs $0xff00000000,%rcx
and    -0x10(%rbp),%rcx
shr    $0x8,%rcx
or     %rcx,%rax
movabs $0xff000000,%rcx
and    -0x10(%rbp),%rcx
shl    $0x8,%rcx
or     %rcx,%rax
mov    -0x10(%rbp),%rcx
and    $0xff0000,%rcx
shl    $0x18,%rcx
or     %rcx,%rax
mov    -0x10(%rbp),%rcx
and    $0xff00,%rcx
shl    $0x28,%rcx
or     %rcx,%rax
mov    -0x10(%rbp),%rcx
and    $0xff,%rcx
shl    $0x38,%rcx
or     %rcx,%rax
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x18(%rbp)
movl   $0xaabbccdd,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
and    $0xff,%eax
shl    $0x18,%eax
mov    -0x1c(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x1c(%rbp),%ecx
and    $0xff0000,%ecx
shr    $0x8,%ecx
or     %ecx,%eax
mov    -0x1c(%rbp),%ecx
and    $0xff000000,%ecx
shr    $0x18,%ecx
or     %ecx,%eax
mov    %eax,-0x20(%rbp)
movl   $0x0,-0x20(%rbp)
movw   $0xaabb,-0x22(%rbp)
movzwl -0x22(%rbp),%eax
and    $0xff,%eax
shl    $0x8,%eax
movzwl -0x22(%rbp),%ecx
and    $0xff00,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    %ax,-0x24(%rbp)
movw   $0x0,-0x24(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64
%4 = alloca i32
%5 = alloca i32
%6 = alloca i16
%7 = alloca i16
store i32 0, i32* %1
store i64 -8603657889541918977, i64* %2
%8 = load i64, i64* %2
%9 = and i64 %8, -72057594037927936
%10 = lshr i64 %9, 56
%11 = load i64, i64* %2
%12 = and i64 %11, 71776119061217280
%13 = lshr i64 %12, 40
%14 = or i64 %10, %13
%15 = load i64, i64* %2
%16 = and i64 %15, 280375465082880
%17 = lshr i64 %16, 24
%18 = or i64 %14, %17
%19 = load i64, i64* %2
%20 = and i64 %19, 1095216660480
%21 = lshr i64 %20, 8
%22 = or i64 %18, %21
%23 = load i64, i64* %2
%24 = and i64 %23, 4278190080
%25 = shl i64 %24, 8
%26 = or i64 %22, %25
%27 = load i64, i64* %2
%28 = and i64 %27, 16711680
%29 = shl i64 %28, 24
%30 = or i64 %26, %29
%31 = load i64, i64* %2
%32 = and i64 %31, 65280
%33 = shl i64 %32, 40
%34 = or i64 %30, %33
%35 = load i64, i64* %2
%36 = and i64 %35, 255
%37 = shl i64 %36, 56
%38 = or i64 %34, %37
store i64 %38, i64* %3
store i64 0, i64* %3
store i32 -1430532899, i32* %4
%39 = load i32, i32* %4
%40 = and i32 %39, 255
%41 = shl i32 %40, 24
%42 = load i32, i32* %4
%43 = and i32 %42, 65280
%44 = shl i32 %43, 8
%45 = or i32 %41, %44
%46 = load i32, i32* %4
%47 = and i32 %46, 16711680
%48 = lshr i32 %47, 8
%49 = or i32 %45, %48
%50 = load i32, i32* %4
%51 = and i32 %50, -16777216
%52 = lshr i32 %51, 24
%53 = or i32 %49, %52
store i32 %53, i32* %5
store i32 0, i32* %5
store i16 -21829, i16* %6
%54 = load i16, i16* %6
%55 = zext i16 %54 to i32
%56 = and i32 %55, 255
%57 = shl i32 %56, 8
%58 = load i16, i16* %6
%59 = zext i16 %58 to i32
%60 = and i32 %59, 65280
%61 = ashr i32 %60, 8
%62 = or i32 %57, %61
%63 = trunc i32 %62 to i16
store i16 %63, i16* %7
store i16 0, i16* %7
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}