xunge/DecIR huggingface dataset:
/* Variables and functions */
int mymax(int, int, ...);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  printf("%d\n", mymax(3, 0));
  printf("%d\n", mymax(1, 2, 3, 0));
  printf("%d\n", mymax(1, 2, 3, 4, 5, 0));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x3,%edi
xor    %esi,%esi
mov    $0x0,%al
call   1030 <mymax@plt>
mov    %eax,%esi
lea    0xeba(%rip),%rdi
call   1040 <printf@plt>
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
xor    %ecx,%ecx
mov    $0x0,%al
call   1030 <mymax@plt>
mov    %eax,%esi
lea    0xe94(%rip),%rdi
call   1040 <printf@plt>
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
mov    $0x4,%ecx
mov    $0x5,%r8d
xor    %r9d,%r9d
mov    $0x0,%al
call   1030 <mymax@plt>
mov    %eax,%esi
lea    0xe62(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x3,%edi
xor    %esi,%esi
xor    %eax,%eax
call   1030 <mymax@plt>
lea    0xeca(%rip),%rbx
mov    %rbx,%rdi
mov    %eax,%esi
call   1040 <printf@plt>
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
xor    %ecx,%ecx
xor    %eax,%eax
call   1030 <mymax@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1040 <printf@plt>
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
mov    $0x4,%ecx
mov    $0x5,%r8d
xor    %r9d,%r9d
xor    %eax,%eax
call   1030 <mymax@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (i32, i32, ...) @mymax(i32 3, i32 0)
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = call i32 (i32, i32, ...) @mymax(i32 1, i32 2, i32 3, i32 0)
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = call i32 (i32, i32, ...) @mymax(i32 1, i32 2, i32 3, i32 4, i32 5, i32 0)
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 (i32, i32, ...) @mymax(i32 3, i32 0)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 (i32, i32, ...) @mymax(i32 1, i32 2, i32 3, i32 0)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = tail call i32 (i32, i32, ...) @mymax(i32 1, i32 2, i32 3, i32 4, i32 5, i32 0)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0xe1() {
  Assert_real((isalnum(225) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              1130, ("isalnum should be 0 for 0xe1"));
}


x86 assembly (clang, -O0):
<t_isalnum_0xe1>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe1,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x46a,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0xe1>:
push   %rax
mov    $0xe1,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x46a,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xe1\00"
define void @t_isalnum_0xe1() {
%1 = call i64 @isalnum(i32 225)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1130, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xe1\00"
define void @t_isalnum_0xe1() {
%1 = tail call i64 @isalnum(i32 225)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1130, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int memcpy(int, int, int);
__memcpy_fromfs(int x, int y, int z) { return memcpy(x, y, z); }


x86 assembly (clang, -O0):
<__memcpy_fromfs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__memcpy_fromfs>:
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define i32 @__memcpy_fromfs(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @memcpy(i32 %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @__memcpy_fromfs(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @memcpy(i32 %0, i32 %1, i32 %2)
ret i32 %4
}
int xisspace(int c) {
  return c == ' ' || c == '\f' || c == '\n' || c == '\r' || c == '\t' ||
         c == '\v';
}


x86 assembly (clang, -O0):
<xisspace>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115c <xisspace+0x5c>
mov    $0x1,%al
cmpl   $0xc,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115c <xisspace+0x5c>
mov    $0x1,%al
cmpl   $0xa,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115c <xisspace+0x5c>
mov    $0x1,%al
cmpl   $0xd,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115c <xisspace+0x5c>
mov    $0x1,%al
cmpl   $0x9,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115c <xisspace+0x5c>
cmpl   $0xb,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xisspace>:
cmp    $0x20,%edi
ja     111d <xisspace+0x1d>
mov    $0x1,%eax
mov    %edi,%ecx
movabs $0x100003600,%rdx
bt     %rcx,%rdx
jae    111d <xisspace+0x1d>
ret
xor    %eax,%eax
cmp    $0xb,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @xisspace(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 32
br i1 %4, label %20, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 12
br i1 %7, label %20, label %8
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 10
br i1 %10, label %20, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 13
br i1 %13, label %20, label %14
14: ; preds = %11
%15 = load i32, i32* %2
%16 = icmp eq i32 %15, 9
br i1 %16, label %20, label %17
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp eq i32 %18, 11
br label %20
20: ; preds = %17, %14, %11, %8, %5, %1
%21 = phi i1 [ true, %14 ], [ true, %11 ], [ true, %8 ], [ true, %5 ], [ true, %1 ], [ %19, %17 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @xisspace(i32 %0) {
switch i32 %0, label %2 [
i32 32, label %5
i32 13, label %5
i32 12, label %5
i32 10, label %5
i32 9, label %5
]
2: ; preds = %1
%3 = icmp eq i32 %0, 11
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ SCSI_CTL_PHASE_SaveConfig();
void SCSI_CTL_PHASE_Sleep(void) { SCSI_CTL_PHASE_SaveConfig(); }


x86 assembly (clang, -O0):
<SCSI_CTL_PHASE_Sleep>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <SCSI_CTL_PHASE_SaveConfig@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SCSI_CTL_PHASE_Sleep>:
xor    %eax,%eax
jmp    1030 <SCSI_CTL_PHASE_SaveConfig@plt>

LLVM IR (-O0):
define void @SCSI_CTL_PHASE_Sleep() {
%1 = call i32 (...) @SCSI_CTL_PHASE_SaveConfig()
ret void
}

LLVM IR (-O2):
define void @SCSI_CTL_PHASE_Sleep() {
%1 = tail call i32 (...) @SCSI_CTL_PHASE_SaveConfig()
ret void
}
int blTrueSeqLen(char *sequence) {
  int length = 0, i = 0;
  for (i = 0; sequence[i]; i++) {
    if (sequence[i] != '-' && sequence[i] != ' ')
      length++;
  }
  return (length);
}


x86 assembly (clang, -O0):
<blTrueSeqLen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1175 <blTrueSeqLen+0x75>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x2d,%eax
je     1162 <blTrueSeqLen+0x62>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x20,%eax
je     1162 <blTrueSeqLen+0x62>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1167 <blTrueSeqLen+0x67>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    111d <blTrueSeqLen+0x1d>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<blTrueSeqLen>:
xor    %eax,%eax
jmp    1114 <blTrueSeqLen+0x14>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
add    $0x1,%rdi
movzbl (%rdi),%ecx
cmp    $0x20,%cl
je     1110 <blTrueSeqLen+0x10>
cmp    $0x2d,%cl
je     1110 <blTrueSeqLen+0x10>
test   %cl,%cl
je     112a <blTrueSeqLen+0x2a>
add    $0x1,%eax
jmp    1110 <blTrueSeqLen+0x10>
ret

LLVM IR (-O0):
define i32 @blTrueSeqLen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
store i32 0, i32* %4
store i32 0, i32* %4
br label %5
5: ; preds = %32, %1
%6 = load i8*, i8** %2
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = icmp ne i8 %10, 0
br i1 %11, label %12, label %35
12: ; preds = %5
%13 = load i8*, i8** %2
%14 = load i32, i32* %4
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp ne i32 %18, 45
br i1 %19, label %20, label %31
20: ; preds = %12
%21 = load i8*, i8** %2
%22 = load i32, i32* %4
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
%25 = load i8, i8* %24
%26 = sext i8 %25 to i32
%27 = icmp ne i32 %26, 32
br i1 %27, label %28, label %31
28: ; preds = %20
%29 = load i32, i32* %3
%30 = add nsw i32 %29, 1
store i32 %30, i32* %3
br label %31
31: ; preds = %28, %20, %12
br label %32
32: ; preds = %31
%33 = load i32, i32* %4
%34 = add nsw i32 %33, 1
store i32 %34, i32* %4
br label %5
35: ; preds = %5
%36 = load i32, i32* %3
ret i32 %36
}

LLVM IR (-O2):
define i32 @blTrueSeqLen(i8* nocapture %0) {
br label %2
2: ; preds = %9, %1
%3 = phi i64 [ %11, %9 ], [ 0, %1 ]
%4 = phi i32 [ %10, %9 ], [ 0, %1 ]
%5 = getelementptr inbounds i8, i8* %0, i64 %3
%6 = load i8, i8* %5
switch i8 %6, label %7 [
i8 0, label %12
i8 45, label %9
i8 32, label %9
]
7: ; preds = %2
%8 = add nsw i32 %4, 1
br label %9
9: ; preds = %2, %2, %7
%10 = phi i32 [ %8, %7 ], [ %4, %2 ], [ %4, %2 ]
%11 = add nuw i64 %3, 1
br label %2
12: ; preds = %2
ret i32 %4
}
void rev(int *arr, int start, int end) {
  while (start < end) {
    int tmp = arr[start];
    arr[start] = arr[end];
    arr[end] = tmp;
    start++;
    end--;
  }
}


x86 assembly (clang, -O0):
<rev>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1163 <rev+0x63>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    110e <rev+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rev>:
cmp    %edx,%esi
jge    112e <rev+0x2e>
movslq %esi,%rax
movslq %edx,%rcx
add    $0x1,%rax
xchg   %ax,%ax
mov    -0x4(%rdi,%rax,4),%edx
mov    (%rdi,%rcx,4),%esi
mov    %esi,-0x4(%rdi,%rax,4)
mov    %edx,(%rdi,%rcx,4)
add    $0xffffffffffffffff,%rcx
lea    0x1(%rax),%rdx
cmp    %rcx,%rax
mov    %rdx,%rax
jl     1110 <rev+0x10>
ret

LLVM IR (-O0):
define void @rev(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
br label %8
8: ; preds = %12, %3
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %36
12: ; preds = %8
%13 = load i32*, i32** %4
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
store i32 %17, i32* %7
%18 = load i32*, i32** %4
%19 = load i32, i32* %6
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
%22 = load i32, i32* %21
%23 = load i32*, i32** %4
%24 = load i32, i32* %5
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
%27 = load i32, i32* %7
%28 = load i32*, i32** %4
%29 = load i32, i32* %6
%30 = sext i32 %29 to i64
%31 = getelementptr inbounds i32, i32* %28, i64 %30
store i32 %27, i32* %31
%32 = load i32, i32* %5
%33 = add nsw i32 %32, 1
store i32 %33, i32* %5
%34 = load i32, i32* %6
%35 = add nsw i32 %34, -1
store i32 %35, i32* %6
br label %8
36: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @rev(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %18
5: ; preds = %3
%6 = sext i32 %1 to i64
%7 = sext i32 %2 to i64
br label %8
8: ; preds = %5, %8
%9 = phi i64 [ %7, %5 ], [ %16, %8 ]
%10 = phi i64 [ %6, %5 ], [ %15, %8 ]
%11 = getelementptr inbounds i32, i32* %0, i64 %10
%12 = load i32, i32* %11
%13 = getelementptr inbounds i32, i32* %0, i64 %9
%14 = load i32, i32* %13
store i32 %14, i32* %11
store i32 %12, i32* %13
%15 = add nsw i64 %10, 1
%16 = add nsw i64 %9, -1
%17 = icmp slt i64 %15, %16
br i1 %17, label %8, label %18
18: ; preds = %8, %3
ret void
}
/* Variables and functions */
scalar_t__ get_int(int *);
int /*<<< orphan*/ printf(char *, ...);
int main() {
  int a;
  if (get_int(&a)) {
    printf("%d\n", a);
  } else {
    printf("error occured when reading integer\n");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
call   1040 <get_int@plt>
cmp    $0x0,%rax
je     1158 <main+0x38>
mov    -0x8(%rbp),%esi
lea    0xeb4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
jmp    1166 <main+0x46>
lea    0xea5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0x4(%rsp),%rdi
call   1050 <get_int@plt>
test   %rax,%rax
je     1154 <main+0x24>
mov    0x4(%rsp),%esi
lea    0xeb5(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
jmp    1160 <main+0x30>
lea    0xea9(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
@.str.1 = [36 x i8] c"error occured when reading integer\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i64 @get_int(i32* %2)
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %0
%6 = load i32, i32* %2
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
br label %10
8: ; preds = %0
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %8, %5
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
@str = [35 x i8] c"error occured when reading integer\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i64 @get_int(i32* %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %0
%6 = load i32, i32* %1
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
br label %10
8: ; preds = %0
%9 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
br label %10
10: ; preds = %8, %5
ret i32 0
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int ReadBigEndianInt32(const uint8_t *bytes) {
  return (bytes[0] << 24) | (bytes[1] << 16) | (bytes[2] << 8) | bytes[3];
}


x86 assembly (clang, -O0):
<ReadBigEndianInt32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
mov    0x4(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
or     0xc(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReadBigEndianInt32>:
mov    (%rdi),%eax
mov    0x4(%rdi),%ecx
shl    $0x18,%eax
shl    $0x10,%ecx
or     %eax,%ecx
mov    0x8(%rdi),%eax
shl    $0x8,%eax
or     %ecx,%eax
or     0xc(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @ReadBigEndianInt32(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = shl i32 %5, 24
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = shl i32 %9, 16
%11 = or i32 %6, %10
%12 = load i32*, i32** %2
%13 = getelementptr inbounds i32, i32* %12, i64 2
%14 = load i32, i32* %13
%15 = shl i32 %14, 8
%16 = or i32 %11, %15
%17 = load i32*, i32** %2
%18 = getelementptr inbounds i32, i32* %17, i64 3
%19 = load i32, i32* %18
%20 = or i32 %16, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @ReadBigEndianInt32(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 24
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = shl i32 %5, 16
%7 = or i32 %6, %3
%8 = getelementptr inbounds i32, i32* %0, i64 2
%9 = load i32, i32* %8
%10 = shl i32 %9, 8
%11 = or i32 %7, %10
%12 = getelementptr inbounds i32, i32* %0, i64 3
%13 = load i32, i32* %12
%14 = or i32 %11, %13
ret i32 %14
}
double cephes_gdtr(a, b, x)
double a, b, x;
{
  if (x < 0.0) {
    mtherr("gdtr", 1);
    return (0.0);
  }
  return (cephes_igam(b, a * x));
}


x86 assembly (clang, -O0):
<cephes_gdtr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  %xmm2,-0x20(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x20(%rbp),%xmm0
jbe    1165 <cephes_gdtr+0x45>
lea    0xeb4(%rip),%rdi
mov    $0x1,%esi
mov    $0x0,%al
call   1040 <mtherr@plt>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1184 <cephes_gdtr+0x64>
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  -0x20(%rbp),%xmm1
mov    $0x2,%al
call   1030 <cephes_igam@plt>
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cephes_gdtr>:
push   %rax
movapd %xmm0,%xmm3
xorpd  %xmm0,%xmm0
ucomisd %xmm2,%xmm0
jbe    1148 <cephes_gdtr+0x28>
lea    0xeca(%rip),%rdi
mov    $0x1,%esi
xor    %eax,%eax
call   1040 <mtherr@plt>
xorpd  %xmm0,%xmm0
pop    %rax
ret
mulsd  %xmm2,%xmm3
movaps %xmm1,%xmm0
movapd %xmm3,%xmm1
mov    $0x2,%al
call   1030 <cephes_igam@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"gdtr\00"
define double @cephes_gdtr(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
%8 = load double, double* %7
%9 = fcmp olt double %8, 0.000000e+00
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @mtherr to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 1)
store double 0.000000e+00, double* %4
br label %19
12: ; preds = %3
%13 = load double, double* %6
%14 = load double, double* %5
%15 = load double, double* %7
%16 = fmul double %14, %15
%17 = call i32 (double, double, ...) bitcast (i32 (...)* @cephes_igam to i32 (double, double, ...)*)(double %13, double %16)
%18 = sitofp i32 %17 to double
store double %18, double* %4
br label %19
19: ; preds = %12, %10
%20 = load double, double* %4
ret double %20
}

LLVM IR (-O2):
@.str = [5 x i8] c"gdtr\00"
define double @cephes_gdtr(double %0, double %1, double %2) {
%4 = fcmp olt double %2, 0.000000e+00
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @mtherr to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 1)
br label %11
7: ; preds = %3
%8 = fmul double %0, %2
%9 = tail call i32 (double, double, ...) bitcast (i32 (...)* @cephes_igam to i32 (double, double, ...)*)(double %1, double %8)
%10 = sitofp i32 %9 to double
br label %11
11: ; preds = %7, %5
%12 = phi double [ 0.000000e+00, %5 ], [ %10, %7 ]
ret double %12
}
int execute_wait4() { return 0; }


x86 assembly (clang, -O0):
<execute_wait4>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_wait4>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_wait4() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_wait4() {
ret i32 0
}
void XShmPixmapFormat() {}


x86 assembly (clang, -O0):
<XShmPixmapFormat>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XShmPixmapFormat>:
ret

LLVM IR (-O0):
define void @XShmPixmapFormat() {
ret void
}

LLVM IR (-O2):
define void @XShmPixmapFormat() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delay(int);
void led_blink() {
  (*(volatile unsigned long *)0xE0200280) = 0x00001111;
  while (1) {
    (*(volatile unsigned long *)0xE0200284) = 0;
    delay(0x1000000);
    (*(volatile unsigned long *)0xE0200284) = 0xf;
    delay(0x1000000);
  }
}


x86 assembly (clang, -O0):
<led_blink>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe0200280,%eax
movq   $0x1111,(%rax)
mov    $0xe0200284,%eax
movq   $0x0,(%rax)
mov    $0x1000000,%edi
call   1030 <delay@plt>
mov    $0xe0200284,%eax
movq   $0xf,(%rax)
mov    $0x1000000,%edi
call   1030 <delay@plt>
jmp    1120 <led_blink+0x10>

x86 assembly (clang, -O2):
<led_blink>:
push   %rbx
mov    $0xe0200284,%ebx
movq   $0x1111,-0x4(%rbx)
xchg   %ax,%ax
movq   $0x0,(%rbx)
mov    $0x1000000,%edi
call   1030 <delay@plt>
movq   $0xf,(%rbx)
mov    $0x1000000,%edi
call   1030 <delay@plt>
jmp    1120 <led_blink+0x10>

LLVM IR (-O0):
define void @led_blink() {
store volatile i64 4369, i64* inttoptr (i64 3760194176 to i64*)
br label %1
1: ; preds = %0, %1
store volatile i64 0, i64* inttoptr (i64 3760194180 to i64*)
%2 = call i32 @delay(i32 16777216)
store volatile i64 15, i64* inttoptr (i64 3760194180 to i64*)
%3 = call i32 @delay(i32 16777216)
br label %1
}

LLVM IR (-O2):
define void @led_blink() {
store volatile i64 4369, i64* inttoptr (i64 3760194176 to i64*)
br label %1
1: ; preds = %0, %1
store volatile i64 0, i64* inttoptr (i64 3760194180 to i64*)
%2 = tail call i32 @delay(i32 16777216)
store volatile i64 15, i64* inttoptr (i64 3760194180 to i64*)
%3 = tail call i32 @delay(i32 16777216)
br label %1
}
/* Variables and functions */
unsigned char *number_of_forecasts_in_the_ensemble_location(unsigned char **);
int number_of_forecasts_in_the_ensemble(unsigned char **sec) {
  unsigned char *p;
  p = number_of_forecasts_in_the_ensemble_location(sec);
  if (p)
    return (int)*p;
  return -1;
}


x86 assembly (clang, -O0):
<number_of_forecasts_in_the_ensemble>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <number_of_forecasts_in_the_ensemble_location@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1143 <number_of_forecasts_in_the_ensemble+0x33>
mov    -0x18(%rbp),%rax
movzbl (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    114a <number_of_forecasts_in_the_ensemble+0x3a>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<number_of_forecasts_in_the_ensemble>:
push   %rax
call   1030 <number_of_forecasts_in_the_ensemble_location@plt>
test   %rax,%rax
je     1120 <number_of_forecasts_in_the_ensemble+0x10>
movzbl (%rax),%eax
pop    %rcx
ret
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @number_of_forecasts_in_the_ensemble(i8** %0) {
%2 = alloca i32
%3 = alloca i8**
%4 = alloca i8*
store i8** %0, i8*** %3
%5 = load i8**, i8*** %3
%6 = call i8* @number_of_forecasts_in_the_ensemble_location(i8** %5)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %13
9: ; preds = %1
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
store i32 %12, i32* %2
br label %14
13: ; preds = %1
store i32 -1, i32* %2
br label %14
14: ; preds = %13, %9
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @number_of_forecasts_in_the_ensemble(i8** %0) {
%2 = tail call i8* @number_of_forecasts_in_the_ensemble_location(i8** %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = load i8, i8* %2
%6 = zext i8 %5 to i32
br label %7
7: ; preds = %1, %4
%8 = phi i32 [ %6, %4 ], [ -1, %1 ]
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, int /*<<< orphan*/ *, int);
__attribute__((always_)) void store64_native(void *dst, uint64_t w) {
  memcpy(dst, &w, sizeof w);
}


x86 assembly (clang, -O0):
<store64_native>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<store64_native>:
push   %rax
mov    %esi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @store64_native(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @memcpy(i8* %5, i32* %4, i32 4)
ret void
}

LLVM IR (-O2):
define void @store64_native(i8* %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = call i32 @memcpy(i8* %0, i32* %3, i32 4)
ret void
}
void fd48(int n) {
P0A:
  goto P0A;
  {
    typedef int(*b)[n];
  P01A:
    goto P01A;
    {
      typedef int(*c)[n];
    p012A:
      goto p012A;
      goto a;
    P012A:
      goto P012A;
      0;
    }
  P01B:
    goto P01B;
    {
      typedef int(*d)[n];
    P013A:
      goto P013A;
      0;
    }
  P01C:
    goto P01C;
    ;
    typedef int(*e)[n];
  P014A:
    goto P014A;
    0;
  };
P0B:
  goto P0B;
  {
    typedef int(*f)[n];
  P02A:
    goto P02A;
    {
      typedef int(*g)[n];
    P024A:
      goto P024A;
      0;
    };
  P02B:
    goto P02B;
    {
      typedef int(*h)[n];
    P025A:
      goto P025A;
      0;
    };
  P02C:
    goto P02C;
    ;
    typedef int(*i)[n];
  P026A:
    goto P026A;
    0;
  };
a:;
  typedef int(*j)[n];
P03A:
  goto P03A;
  0;
P03B:
  goto P03B;
}


x86 assembly (clang, -O0):
<fd48>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fd48+0x7>

x86 assembly (clang, -O2):
<fd48>:
jmp    1100 <fd48>

LLVM IR (-O0):
define void @fd48(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %3, %1
br label %3
4: ; No predecessors!
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
br label %7
7: ; preds = %7, %4
br label %7
8: ; No predecessors!
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
br label %11
11: ; preds = %11, %8
br label %11
12: ; preds = %12
br label %12
13: ; preds = %13
br label %13
14: ; No predecessors!
%15 = load i32, i32* %2
%16 = zext i32 %15 to i64
br label %17
17: ; preds = %17, %14
br label %17
18: ; preds = %18
br label %18
19: ; No predecessors!
%20 = load i32, i32* %2
%21 = zext i32 %20 to i64
br label %22
22: ; preds = %22, %19
br label %22
23: ; preds = %23
br label %23
24: ; No predecessors!
%25 = load i32, i32* %2
%26 = zext i32 %25 to i64
br label %27
27: ; preds = %27, %24
br label %27
28: ; No predecessors!
%29 = load i32, i32* %2
%30 = zext i32 %29 to i64
br label %31
31: ; preds = %31, %28
br label %31
32: ; preds = %32
br label %32
33: ; No predecessors!
%34 = load i32, i32* %2
%35 = zext i32 %34 to i64
br label %36
36: ; preds = %36, %33
br label %36
37: ; preds = %37
br label %37
38: ; No predecessors!
%39 = load i32, i32* %2
%40 = zext i32 %39 to i64
br label %41
41: ; preds = %41, %38
br label %41
42: ; No predecessors!
%43 = load i32, i32* %2
%44 = zext i32 %43 to i64
br label %45
45: ; preds = %45, %42
br label %45
46: ; preds = %46
br label %46
}

LLVM IR (-O2):
define void @fd48(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
unsigned long raid6_get_fpu(void) { return 0xf00ba6; }


x86 assembly (clang, -O0):
<raid6_get_fpu>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf00ba6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<raid6_get_fpu>:
mov    $0xf00ba6,%eax
ret

LLVM IR (-O0):
define i64 @raid6_get_fpu() {
ret i64 15731622
}

LLVM IR (-O2):
define i64 @raid6_get_fpu() {
ret i64 15731622
}
char toUpper(char c) { return (c - 'a' + 'A'); }


x86 assembly (clang, -O0):
<toUpper>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
sub    $0x61,%eax
add    $0x41,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<toUpper>:
lea    -0x20(%rdi),%eax
ret

LLVM IR (-O0):
define signext i8 @toUpper(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = sub nsw i32 %4, 97
%6 = add nsw i32 %5, 65
%7 = trunc i32 %6 to i8
ret i8 %7
}

LLVM IR (-O2):
define signext i8 @toUpper(i8 signext %0) {
%2 = add i8 %0, -32
ret i8 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
typedef int /*<<< orphan*/ ASN1_GENERALIZEDTIME;

/* Variables and functions */
int /*<<< orphan*/ *ASN1_TIME_adj_internal(int /*<<< orphan*/ *,
                                           int /*<<< orphan*/, int, long,
                                           int /*<<< orphan*/);
int /*<<< orphan*/ V_ASN1_GENERALIZEDTIME;
ASN1_GENERALIZEDTIME *ASN1_GENERALIZEDTIME_adj(ASN1_GENERALIZEDTIME *s,
                                               time_t t, int offset_day,
                                               long offset_sec) {
  return (ASN1_TIME_adj_internal(s, t, offset_day, offset_sec,
                                 V_ASN1_GENERALIZEDTIME));
}


x86 assembly (clang, -O0):
<ASN1_GENERALIZEDTIME_adj>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    0x2ead(%rip),%rax
mov    (%rax),%r8d
call   1030 <ASN1_TIME_adj_internal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_GENERALIZEDTIME_adj>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%r8d
jmp    1030 <ASN1_TIME_adj_internal@plt>

LLVM IR (-O0):
@V_ASN1_GENERALIZEDTIME = global i32 0
define i32* @ASN1_GENERALIZEDTIME_adj(i32* %0, i32 %1, i32 %2, i64 %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i64
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i64 %3, i64* %8
%9 = load i32*, i32** %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i64, i64* %8
%13 = load i32, i32* @V_ASN1_GENERALIZEDTIME
%14 = call i32* @ASN1_TIME_adj_internal(i32* %9, i32 %10, i32 %11, i64 %12, i32 %13)
ret i32* %14
}

LLVM IR (-O2):
@V_ASN1_GENERALIZEDTIME = global i32 0
define i32* @ASN1_GENERALIZEDTIME_adj(i32* %0, i32 %1, i32 %2, i64 %3) {
%5 = load i32, i32* @V_ASN1_GENERALIZEDTIME
%6 = tail call i32* @ASN1_TIME_adj_internal(i32* %0, i32 %1, i32 %2, i64 %3, i32 %5)
ret i32* %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void f1(void) { printf("f1 is calling...\n"); }


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"f1 is calling...\0A\00"
define void @f1() {
%1 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [17 x i8] c"f1 is calling...\00"
define void @f1() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ hesfcn_(int *, double *, double *, int *, int *);
void mgh_hesfcn(int n, const double *x, double *h, int ldh, int nprob) {
  int _n = n, _ldh = ldh, _nprob = nprob;
  assert(sizeof(double) == sizeof(*x));
  hesfcn_(&_n, (double *)x, (double *)h, &_ldh, &_nprob);
}


x86 assembly (clang, -O0):
<mgh_hesfcn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x20(%rbp),%eax
mov    %eax,-0x2c(%rbp)
mov    $0x1,%edi
call   1040 <assert@plt>
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
lea    -0x24(%rbp),%rdi
lea    -0x28(%rbp),%rcx
lea    -0x2c(%rbp),%r8
call   1030 <hesfcn_@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mgh_hesfcn>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %edi,0x14(%rsp)
mov    %ecx,0x10(%rsp)
mov    %r8d,0xc(%rsp)
mov    $0x1,%edi
call   1040 <assert@plt>
lea    0x14(%rsp),%rdi
lea    0x10(%rsp),%rcx
lea    0xc(%rsp),%r8
mov    %rbx,%rsi
mov    %r14,%rdx
call   1030 <hesfcn_@plt>
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @mgh_hesfcn(i32 %0, double* %1, double* %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca double*
%8 = alloca double*
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
store i32 %0, i32* %6
store double* %1, double** %7
store double* %2, double** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%14 = load i32, i32* %6
store i32 %14, i32* %11
%15 = load i32, i32* %9
store i32 %15, i32* %12
%16 = load i32, i32* %10
store i32 %16, i32* %13
%17 = call i32 @assert(i32 1)
%18 = load double*, double** %7
%19 = load double*, double** %8
%20 = call i32 @hesfcn_(i32* %11, double* %18, double* %19, i32* %12, i32* %13)
ret void
}

LLVM IR (-O2):
define void @mgh_hesfcn(i32 %0, double* %1, double* %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = bitcast i32* %6 to i8*
store i32 %0, i32* %6
%10 = bitcast i32* %7 to i8*
store i32 %3, i32* %7
%11 = bitcast i32* %8 to i8*
store i32 %4, i32* %8
%12 = tail call i32 @assert(i32 1)
%13 = call i32 @hesfcn_(i32* %6, double* %1, double* %2, i32* %7, i32* %8)
ret void
}
void auditd_tcp_listen_uninit(struct ev_loop *loop,
                              struct daemon_conf *config) {
  return;
}


x86 assembly (clang, -O0):
<auditd_tcp_listen_uninit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<auditd_tcp_listen_uninit>:
ret

LLVM IR (-O0):
%struct.ev_loop = type opaque
%struct.daemon_conf = type opaque
define void @auditd_tcp_listen_uninit(%struct.ev_loop* %0, %struct.daemon_conf* %1) {
%3 = alloca %struct.ev_loop*
%4 = alloca %struct.daemon_conf*
store %struct.ev_loop* %0, %struct.ev_loop** %3
store %struct.daemon_conf* %1, %struct.daemon_conf** %4
ret void
}

LLVM IR (-O2):
%struct.ev_loop = type opaque
%struct.daemon_conf = type opaque
define void @auditd_tcp_listen_uninit(%struct.ev_loop* nocapture %0, %struct.daemon_conf* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print(char *);
void func5() { print("blue5"); }


x86 assembly (clang, -O0):
<func5>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <print@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<func5>:
lea    0xee9(%rip),%rdi
jmp    1030 <print@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"blue5\00"
define void @func5() {
%1 = call i32 @print(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"blue5\00"
define void @func5() {
%1 = tail call i32 @print(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
int isInRange(int n) { return (n <= 8 && n >= 0); }


x86 assembly (clang, -O0):
<isInRange>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x8,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jg     1120 <isInRange+0x20>
cmpl   $0x0,-0x4(%rbp)
setge  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isInRange>:
xor    %eax,%eax
cmp    $0x9,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isInRange(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 %3, 8
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sge i32 %6, 0
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isInRange(i32 %0) {
%2 = icmp ult i32 %0, 9
%3 = zext i1 %2 to i32
ret i32 %3
}
int maf_cell_offset(int value) {
  if (value > 150)
    return 100 / 10;
  if (value < 0)
    return 0;
  if (value < 10)
    return 0;
  int cell = ((float)value / 150) * (150 / 5);
  return cell;
}


x86 assembly (clang, -O0):
<maf_cell_offset>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x96,-0x8(%rbp)
jle    1120 <maf_cell_offset+0x20>
movl   $0xa,-0x4(%rbp)
jmp    1176 <maf_cell_offset+0x76>
cmpl   $0x0,-0x8(%rbp)
jge    1136 <maf_cell_offset+0x36>
movl   $0x0,-0x4(%rbp)
jmp    1176 <maf_cell_offset+0x76>
cmpl   $0xa,-0x8(%rbp)
jge    114c <maf_cell_offset+0x4c>
movl   $0x0,-0x4(%rbp)
jmp    1176 <maf_cell_offset+0x76>
cvtsi2ssl -0x8(%rbp),%xmm0
movss  0xeab(%rip),%xmm1
divss  %xmm1,%xmm0
movss  0xe9b(%rip),%xmm1
mulss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<maf_cell_offset>:
mov    $0xa,%eax
cmp    $0x96,%edi
jg     112c <maf_cell_offset+0x2c>
xor    %eax,%eax
cmp    $0xa,%edi
jl     112c <maf_cell_offset+0x2c>
cvtsi2ss %edi,%xmm0
divss  0xee0(%rip),%xmm0
mulss  0xedc(%rip),%xmm0
cvttss2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @maf_cell_offset(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp sgt i32 %5, 150
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 10, i32* %2
br label %23
8: ; preds = %1
%9 = load i32, i32* %3
%10 = icmp slt i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %8
store i32 0, i32* %2
br label %23
12: ; preds = %8
%13 = load i32, i32* %3
%14 = icmp slt i32 %13, 10
br i1 %14, label %15, label %16
15: ; preds = %12
store i32 0, i32* %2
br label %23
16: ; preds = %12
%17 = load i32, i32* %3
%18 = sitofp i32 %17 to float
%19 = fdiv float %18, 1.500000e+02
%20 = fmul float %19, 3.000000e+01
%21 = fptosi float %20 to i32
store i32 %21, i32* %4
%22 = load i32, i32* %4
store i32 %22, i32* %2
br label %23
23: ; preds = %16, %15, %11, %7
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @maf_cell_offset(i32 %0) {
%2 = icmp sgt i32 %0, 150
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = icmp slt i32 %0, 10
br i1 %4, label %10, label %5
5: ; preds = %3
%6 = sitofp i32 %0 to float
%7 = fdiv float %6, 1.500000e+02
%8 = fmul float %7, 3.000000e+01
%9 = fptosi float %8 to i32
br label %10
10: ; preds = %3, %1, %5
%11 = phi i32 [ %9, %5 ], [ 10, %1 ], [ 0, %3 ]
ret i32 %11
}
int octave_f_getfl_wrapper(void) { return -1; }


x86 assembly (clang, -O0):
<octave_f_getfl_wrapper>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<octave_f_getfl_wrapper>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @octave_f_getfl_wrapper() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @octave_f_getfl_wrapper() {
ret i32 -1
}
/* Variables and functions */
int rand();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int number_my_days(int max_years) {
  srand(time(NULL));
  return rand() % max_years;
}


x86 assembly (clang, -O0):
<number_my_days>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
mov    $0x0,%al
call   1050 <rand@plt>
cltd
idivl  -0x4(%rbp)
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<number_my_days>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
xor    %eax,%eax
call   1050 <rand@plt>
cltd
idiv   %ebx
mov    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @number_my_days(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @time(i32* null)
%4 = call i32 @srand(i32 %3)
%5 = call i32 (...) @rand()
%6 = load i32, i32* %2
%7 = srem i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @number_my_days(i32 %0) {
%2 = tail call i32 @time(i32* null)
%3 = tail call i32 @srand(i32 %2)
%4 = tail call i32 (...) @rand()
%5 = srem i32 %4, %0
ret i32 %5
}
_Complex int f24(void) {}


x86 assembly (clang, -O0):
<f24>:
push   %rbp
mov    %rsp,%rbp
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f24>:
ret

LLVM IR (-O0):
define i64 @f24() {
%1 = alloca { i32, i32 }
%2 = bitcast { i32, i32 }* %1 to i64*
%3 = load i64, i64* %2
ret i64 %3
}

LLVM IR (-O2):
define i64 @f24() {
ret i64 undef
}
int is_bin_op_c(char c) {
  switch (c) {
  case '*':
  case '+':
  case '-':
    return 1;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<is_bin_op_c>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
mov    %eax,-0xc(%rbp)
add    $0xffffffd6,%eax
sub    $0x2,%eax
jb     1133 <is_bin_op_c+0x33>
jmp    1122 <is_bin_op_c+0x22>
mov    -0xc(%rbp),%eax
sub    $0x2d,%eax
jne    113f <is_bin_op_c+0x3f>
jmp    1133 <is_bin_op_c+0x33>
movl   $0x1,-0x4(%rbp)
jmp    1146 <is_bin_op_c+0x46>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_bin_op_c>:
add    $0xffffffd6,%edi
xor    %eax,%eax
cmp    $0x3,%edi
ja     1117 <is_bin_op_c+0x17>
movslq %edi,%rax
lea    0xeec(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @is_bin_op_c(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %7 [
i32 42, label %6
i32 43, label %6
i32 45, label %6
]
6: ; preds = %1, %1, %1
store i32 1, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
@switch.table.is_bin_op_c = [4 x i32] [i32 1, i32 1, i32 0, i32 1]
define i32 @is_bin_op_c(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add nsw i32 %2, -42
%4 = icmp ult i32 %3, 4
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = sext i32 %3 to i64
%7 = getelementptr inbounds [4 x i32], [4 x i32]* @switch.table.is_bin_op_c, i64 0, i64 %6
%8 = load i32, i32* %7
br label %9
9: ; preds = %1, %5
%10 = phi i32 [ %8, %5 ], [ 0, %1 ]
ret i32 %10
}
/* Variables and functions */
int MODE_FORCE;
int /*<<< orphan*/ mode_new(int);
int term_conn_mode_compute();
void term_conn_mode_set(int force) {
  int mode;
  mode = term_conn_mode_compute() | (force ? MODE_FORCE : 0);
  mode_new(mode);
}


x86 assembly (clang, -O0):
<term_conn_mode_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <term_conn_mode_compute@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1150 <term_conn_mode_set+0x30>
mov    0x2e9a(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
jmp    115a <term_conn_mode_set+0x3a>
xor    %eax,%eax
mov    %eax,-0x10(%rbp)
jmp    115a <term_conn_mode_set+0x3a>
mov    -0xc(%rbp),%eax
mov    -0x10(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <mode_new@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<term_conn_mode_set>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <term_conn_mode_compute@plt>
test   %ebx,%ebx
je     1137 <term_conn_mode_set+0x17>
mov    0x2eab(%rip),%rcx
mov    (%rcx),%ebx
or     %eax,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <mode_new@plt>

LLVM IR (-O0):
@MODE_FORCE = global i32 0
define void @term_conn_mode_set(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 (...) @term_conn_mode_compute()
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i32, i32* @MODE_FORCE
br label %10
9: ; preds = %1
br label %10
10: ; preds = %9, %7
%11 = phi i32 [ %8, %7 ], [ 0, %9 ]
%12 = or i32 %4, %11
store i32 %12, i32* %3
%13 = load i32, i32* %3
%14 = call i32 @mode_new(i32 %13)
ret void
}

LLVM IR (-O2):
@MODE_FORCE = global i32 0
define void @term_conn_mode_set(i32 %0) {
%2 = tail call i32 (...) @term_conn_mode_compute()
%3 = icmp eq i32 %0, 0
%4 = load i32, i32* @MODE_FORCE
%5 = select i1 %3, i32 0, i32 %4
%6 = or i32 %5, %2
%7 = tail call i32 @mode_new(i32 %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isxdigit(int);
void t_isxdigit_0x39() {
  Assert_real((isxdigit(57)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              290, ("isxdigit should be 1 for 9"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0x39>:
push   %rbp
mov    %rsp,%rbp
mov    $0x39,%edi
call   1030 <isxdigit@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x122,%edx
lea    0xf66(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0x39>:
push   %rax
mov    $0x39,%edi
call   1030 <isxdigit@plt>
lea    0xece(%rip),%rsi
lea    0xf70(%rip),%rcx
mov    %eax,%edi
mov    $0x122,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [27 x i8] c"isxdigit should be 1 for 9\00"
define void @t_isxdigit_0x39() {
%1 = call i32 @isxdigit(i32 57)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 290, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [27 x i8] c"isxdigit should be 1 for 9\00"
define void @t_isxdigit_0x39() {
%1 = tail call i32 @isxdigit(i32 57)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 290, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}