xunge/DecIR huggingface dataset:
/* Variables and functions */
int M_PI;
int floor(int);
double sin(int);
int get_value(int i) {
  int x;
  x = floor(256 * (0.5 + 0.5 * sin(i * 2 * M_PI / 256)));
  if (x > 255)
    x = 255;
  return x;
}


x86 assembly (clang, -O0):
<get_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    0x2eb0(%rip),%rcx
imul   (%rcx),%eax
mov    $0x100,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1030 <sin@plt>
movaps %xmm0,%xmm1
movsd  0xeb3(%rip),%xmm0
mulsd  %xmm0,%xmm1
addsd  %xmm0,%xmm1
movsd  0xe9b(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1040 <floor@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0xff,-0x8(%rbp)
jle    1189 <get_value+0x69>
movl   $0xff,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_value>:
push   %rax
mov    0x2ec0(%rip),%rax
imul   (%rax),%edi
lea    (%rdi,%rdi,1),%eax
add    $0xff,%eax
add    %edi,%edi
cmovs  %eax,%edi
sar    $0x8,%edi
call   1030 <sin@plt>
movsd  0xeb8(%rip),%xmm1
mulsd  %xmm1,%xmm0
addsd  %xmm1,%xmm0
mulsd  0xeb0(%rip),%xmm0
cvttsd2si %xmm0,%edi
call   1040 <floor@plt>
cmp    $0xff,%eax
mov    $0xff,%ecx
cmovge %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@M_PI = global i32 0
define i32 @get_value(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %4, 2
%6 = load i32, i32* @M_PI
%7 = mul nsw i32 %5, %6
%8 = sdiv i32 %7, 256
%9 = call double @sin(i32 %8)
%10 = call double @llvm.fmuladd.f64(double 5.000000e-01, double %9, double 5.000000e-01)
%11 = fmul double 2.560000e+02, %10
%12 = fptosi double %11 to i32
%13 = call i32 @floor(i32 %12)
store i32 %13, i32* %3
%14 = load i32, i32* %3
%15 = icmp sgt i32 %14, 255
br i1 %15, label %16, label %17
16: ; preds = %1
store i32 255, i32* %3
br label %17
17: ; preds = %16, %1
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
@M_PI = global i32 0
define i32 @get_value(i32 %0) {
%2 = shl nsw i32 %0, 1
%3 = load i32, i32* @M_PI
%4 = mul nsw i32 %2, %3
%5 = sdiv i32 %4, 256
%6 = tail call double @sin(i32 %5)
%7 = tail call double @llvm.fmuladd.f64(double %6, double 5.000000e-01, double 5.000000e-01)
%8 = fmul double %7, 2.560000e+02
%9 = fptosi double %8 to i32
%10 = tail call i32 @floor(i32 %9)
%11 = icmp slt i32 %10, 255
%12 = select i1 %11, i32 %10, i32 255
ret i32 %12
}
/* Variables and functions */
unsigned short inw(unsigned int);
int /*<<< orphan*/ outb(unsigned char, unsigned int);
unsigned short zf_readw(unsigned char port) {
  unsigned short tmp;
  {
    {
      outb(port, 536U);
      tmp = inw(538U);
    }
    return (tmp);
  }
}


x86 assembly (clang, -O0):
<zf_readw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x218,%esi
movzbl -0x1(%rbp),%edi
call   1040 <outb@plt>
mov    $0x21a,%edi
call   1030 <inw@plt>
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zf_readw>:
push   %rax
mov    $0x218,%esi
call   1040 <outb@plt>
mov    $0x21a,%edi
pop    %rax
jmp    1030 <inw@plt>

LLVM IR (-O0):
define zeroext i16 @zf_readw(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i16
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = call i32 @outb(i8 zeroext %4, i32 536)
%6 = call zeroext i16 @inw(i32 538)
store i16 %6, i16* %3
%7 = load i16, i16* %3
ret i16 %7
}

LLVM IR (-O2):
define zeroext i16 @zf_readw(i8 zeroext %0) {
%2 = tail call i32 @outb(i8 zeroext %0, i32 536)
%3 = tail call zeroext i16 @inw(i32 538)
ret i16 %3
}
void term_JitterHistogram(void) {}


x86 assembly (clang, -O0):
<term_JitterHistogram>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<term_JitterHistogram>:
ret

LLVM IR (-O0):
define void @term_JitterHistogram() {
ret void
}

LLVM IR (-O2):
define void @term_JitterHistogram() {
ret void
}
int test_imm_95int64_lowword_reg(long long val) {
  return ((val) & (0x95 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_95int64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x95,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_95int64_lowword_reg>:
test   $0x95,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_95int64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 149
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_95int64_lowword_reg(i64 %0) {
%2 = and i64 %0, 149
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
size_t wsclen(int /*<<< orphan*/ const *);
int /*<<< orphan*/ *wscstr(int /*<<< orphan*/ const *,
                           int /*<<< orphan*/ const *);
size_t wscstrlen(const wchar_t *string, const wchar_t *stop) {
  const wchar_t *end = wscstr(string, stop);
  return end ? (size_t)(end - string) : wsclen(string);
}


x86 assembly (clang, -O0):
<wscstrlen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <wscstr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1164 <wscstrlen+0x44>
mov    -0x18(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
sar    $0x2,%rax
mov    %rax,-0x20(%rbp)
jmp    1171 <wscstrlen+0x51>
mov    -0x8(%rbp),%rdi
call   1040 <wsclen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wscstrlen>:
push   %rbx
mov    %rdi,%rbx
call   1030 <wscstr@plt>
test   %rax,%rax
je     1137 <wscstrlen+0x17>
sub    %rbx,%rax
sar    $0x2,%rax
pop    %rbx
ret
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <wsclen@plt>

LLVM IR (-O0):
define i64 @wscstrlen(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32*, i32** %4
%8 = call i32* @wscstr(i32* %6, i32* %7)
store i32* %8, i32** %5
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %11, label %18
11: ; preds = %2
%12 = load i32*, i32** %5
%13 = load i32*, i32** %3
%14 = ptrtoint i32* %12 to i64
%15 = ptrtoint i32* %13 to i64
%16 = sub i64 %14, %15
%17 = sdiv exact i64 %16, 4
br label %21
18: ; preds = %2
%19 = load i32*, i32** %3
%20 = call i64 @wsclen(i32* %19)
br label %21
21: ; preds = %18, %11
%22 = phi i64 [ %17, %11 ], [ %20, %18 ]
ret i64 %22
}

LLVM IR (-O2):
define i64 @wscstrlen(i32* %0, i32* %1) {
%3 = tail call i32* @wscstr(i32* %0, i32* %1)
%4 = icmp eq i32* %3, null
br i1 %4, label %10, label %5
5: ; preds = %2
%6 = ptrtoint i32* %3 to i64
%7 = ptrtoint i32* %0 to i64
%8 = sub i64 %6, %7
%9 = ashr exact i64 %8, 2
br label %12
10: ; preds = %2
%11 = tail call i64 @wsclen(i32* %0)
br label %12
12: ; preds = %10, %5
%13 = phi i64 [ %9, %5 ], [ %11, %10 ]
ret i64 %13
}
/* Type definitions */
struct modify_cmdline_parser_params {
  int dummy;
};
struct modify_args_info {
  int dummy;
};

/* Variables and functions */
int modify_cmdline_parser_internal(int, char **, struct modify_args_info *,
                                   struct modify_cmdline_parser_params *,
                                   int /*<<< orphan*/);
int modify_cmdline_parser_ext(int argc, char **argv,
                              struct modify_args_info *args_info,
                              struct modify_cmdline_parser_params *params) {
  int result;
  result = modify_cmdline_parser_internal(argc, argv, args_info, params, 0);
  return result;
}


x86 assembly (clang, -O0):
<modify_cmdline_parser_ext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
xor    %r8d,%r8d
call   1030 <modify_cmdline_parser_internal@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<modify_cmdline_parser_ext>:
xor    %r8d,%r8d
jmp    1030 <modify_cmdline_parser_internal@plt>

LLVM IR (-O0):
%struct.modify_args_info = type { i32 }
%struct.modify_cmdline_parser_params = type { i32 }
define i32 @modify_cmdline_parser_ext(i32 %0, i8** %1, %struct.modify_args_info* %2, %struct.modify_cmdline_parser_params* %3) {
%5 = alloca i32
%6 = alloca i8**
%7 = alloca %struct.modify_args_info*
%8 = alloca %struct.modify_cmdline_parser_params*
%9 = alloca i32
store i32 %0, i32* %5
store i8** %1, i8*** %6
store %struct.modify_args_info* %2, %struct.modify_args_info** %7
store %struct.modify_cmdline_parser_params* %3, %struct.modify_cmdline_parser_params** %8
%10 = load i32, i32* %5
%11 = load i8**, i8*** %6
%12 = load %struct.modify_args_info*, %struct.modify_args_info** %7
%13 = load %struct.modify_cmdline_parser_params*, %struct.modify_cmdline_parser_params** %8
%14 = call i32 @modify_cmdline_parser_internal(i32 %10, i8** %11, %struct.modify_args_info* %12, %struct.modify_cmdline_parser_params* %13, i32 0)
store i32 %14, i32* %9
%15 = load i32, i32* %9
ret i32 %15
}

LLVM IR (-O2):
%struct.modify_args_info = type { i32 }
%struct.modify_cmdline_parser_params = type { i32 }
define i32 @modify_cmdline_parser_ext(i32 %0, i8** %1, %struct.modify_args_info* %2, %struct.modify_cmdline_parser_params* %3) {
%5 = tail call i32 @modify_cmdline_parser_internal(i32 %0, i8** %1, %struct.modify_args_info* %2, %struct.modify_cmdline_parser_params* %3, i32 0)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
int main() {
  sleep(10);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xa,%edi
call   1030 <sleep@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
call   1030 <sleep@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @sleep(i32 10)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @sleep(i32 10)
ret i32 0
}
int test_imm_E6int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0xE6 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E6int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0xe6,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E6int64_midword_mem>:
testb  $0xe6,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E6int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 230
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_E6int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 15073280
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int gcd(int, int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, int *);
int main(int argc, char **argv) {
  int number1, number2;
  scanf("%d %d", &number1, &number2);
  printf("%d\n", gcd(number1, number2));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeb3(%rip),%rdi
lea    -0x14(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1040 <scanf@plt>
mov    -0x14(%rbp),%edi
mov    -0x18(%rbp),%esi
call   1050 <gcd@plt>
mov    %eax,%esi
lea    0xe98(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <scanf@plt>
mov    0x4(%rsp),%edi
mov    (%rsp),%esi
call   1050 <gcd@plt>
lea    0xeae(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %6, i32* %7)
%9 = load i32, i32* %6
%10 = load i32, i32* %7
%11 = call i32 @gcd(i32 %9, i32 %10)
%12 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %3 to i8*
%6 = bitcast i32* %4 to i8*
%7 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %3, i32* %4)
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @gcd(i32 %8, i32 %9)
%11 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %10)
ret i32 0
}
/* Variables and functions */
double exp(double);
double DbToAmpD(double dB) {
  return (dB > -150.0 ? exp(dB * (0.11512925464970228420089957273422)) : 0.0);
}


x86 assembly (clang, -O0):
<DbToAmpD>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xed6(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    1150 <DbToAmpD+0x40>
movsd  0xecc(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
call   1030 <exp@plt>
movsd  %xmm0,-0x10(%rbp)
jmp    115d <DbToAmpD+0x4d>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    115d <DbToAmpD+0x4d>
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DbToAmpD>:
ucomisd 0xee8(%rip),%xmm0
jbe    1127 <DbToAmpD+0x17>
mulsd  0xee6(%rip),%xmm0
jmp    1030 <exp@plt>
xorpd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @DbToAmpD(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp ogt double %3, -1.500000e+02
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load double, double* %2
%7 = fmul double %6, 0x3FBD791C5F888822
%8 = call double @exp(double %7)
br label %10
9: ; preds = %1
br label %10
10: ; preds = %9, %5
%11 = phi double [ %8, %5 ], [ 0.000000e+00, %9 ]
ret double %11
}

LLVM IR (-O2):
define double @DbToAmpD(double %0) {
%2 = fcmp ogt double %0, -1.500000e+02
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = fmul double %0, 0x3FBD791C5F888822
%5 = tail call double @exp(double %4)
br label %6
6: ; preds = %1, %3
%7 = phi double [ %5, %3 ], [ 0.000000e+00, %1 ]
ret double %7
}
/* Variables and functions */
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
int /*<<< orphan*/ VibrationAnalysisSettingsHandle();
void VibrationAnalysisSettingsUpdated() {
  UAVObjUpdated(VibrationAnalysisSettingsHandle());
}


x86 assembly (clang, -O0):
<VibrationAnalysisSettingsUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <VibrationAnalysisSettingsHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<VibrationAnalysisSettingsUpdated>:
push   %rax
xor    %eax,%eax
call   1030 <VibrationAnalysisSettingsHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @VibrationAnalysisSettingsUpdated() {
%1 = call i32 (...) @VibrationAnalysisSettingsHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @VibrationAnalysisSettingsUpdated() {
%1 = tail call i32 (...) @VibrationAnalysisSettingsHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ SYS_clone;
int /*<<< orphan*/ remote_syscall(int /*<<< orphan*/, int /*<<< orphan*/,
                                  int /*<<< orphan*/, int /*<<< orphan*/,
                                  int /*<<< orphan*/, int /*<<< orphan*/,
                                  int /*<<< orphan*/, int /*<<< orphan*/);
uint64_t remote_clone(pid_t pid, int flags, void *child_stack) {
  return remote_syscall(pid, SYS_clone, (uint64_t)flags, (uint64_t)child_stack,
                        (uint64_t)NULL, (uint64_t)NULL, (uint64_t)NULL,
                        (uint64_t)NULL);
}


x86 assembly (clang, -O0):
<remote_clone>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebc(%rip),%rax
mov    (%rax),%esi
mov    -0x8(%rbp),%edx
mov    -0x10(%rbp),%rax
mov    %eax,%ecx
xor    %r9d,%r9d
mov    %r9d,%r8d
movl   $0x0,(%rsp)
movl   $0x0,0x8(%rsp)
call   1030 <remote_syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remote_clone>:
push   %rax
mov    %rdx,%rcx
mov    %esi,%edx
mov    0x2ecb(%rip),%rax
mov    (%rax),%esi
xor    %r8d,%r8d
xor    %r9d,%r9d
push   $0x0
push   $0x0
call   1030 <remote_syscall@plt>
add    $0x10,%rsp
pop    %rcx
ret

LLVM IR (-O0):
@SYS_clone = global i32 0
define i32 @remote_clone(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i32, i32* @SYS_clone
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = ptrtoint i8* %10 to i32
%12 = call i32 @remote_syscall(i32 %7, i32 %8, i32 %9, i32 %11, i32 0, i32 0, i32 0, i32 0)
ret i32 %12
}

LLVM IR (-O2):
@SYS_clone = global i32 0
define i32 @remote_clone(i32 %0, i32 %1, i8* %2) {
%4 = load i32, i32* @SYS_clone
%5 = ptrtoint i8* %2 to i64
%6 = trunc i64 %5 to i32
%7 = tail call i32 @remote_syscall(i32 %0, i32 %4, i32 %1, i32 %6, i32 0, i32 0, i32 0, i32 0)
ret i32 %7
}
void mixInit(void) {}


x86 assembly (clang, -O0):
<mixInit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mixInit>:
ret

LLVM IR (-O0):
define void @mixInit() {
ret void
}

LLVM IR (-O2):
define void @mixInit() {
ret void
}
void set_vidmode(int mode) {}


x86 assembly (clang, -O0):
<set_vidmode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_vidmode>:
ret

LLVM IR (-O0):
define void @set_vidmode(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @set_vidmode(i32 %0) {
ret void
}
void del(void *value) {}


x86 assembly (clang, -O0):
<del>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<del>:
ret

LLVM IR (-O0):
define void @del(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @del(i8* nocapture %0) {
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t h265aud_get_pic_type(const uint8_t *p_h265aud) {
  return p_h265aud[5] >> 5;
}


x86 assembly (clang, -O0):
<h265aud_get_pic_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%eax
sar    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<h265aud_get_pic_type>:
mov    0x14(%rdi),%eax
sar    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @h265aud_get_pic_type(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 5
%5 = load i32, i32* %4
%6 = ashr i32 %5, 5
ret i32 %6
}

LLVM IR (-O2):
define i32 @h265aud_get_pic_type(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 5
%3 = load i32, i32* %2
%4 = ashr i32 %3, 5
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ m_alloc_init();
void __user_init(void) { m_alloc_init(); }


x86 assembly (clang, -O0):
<__user_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <m_alloc_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__user_init>:
xor    %eax,%eax
jmp    1030 <m_alloc_init@plt>

LLVM IR (-O0):
define void @__user_init() {
%1 = call i32 (...) @m_alloc_init()
ret void
}

LLVM IR (-O2):
define void @__user_init() {
%1 = tail call i32 (...) @m_alloc_init()
ret void
}
void _Jv_UnwrapJNIweakReference(void) {}


x86 assembly (clang, -O0):
<_Jv_UnwrapJNIweakReference>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Jv_UnwrapJNIweakReference>:
ret

LLVM IR (-O0):
define void @_Jv_UnwrapJNIweakReference() {
ret void
}

LLVM IR (-O2):
define void @_Jv_UnwrapJNIweakReference() {
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int mheight;
};
typedef TYPE_1__ Screen;

/* Variables and functions */
void set_Screen_mheight(void *_p, int _v) { ((Screen *)_p)->mheight = (int)_v; }


x86 assembly (clang, -O0):
<set_Screen_mheight>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_Screen_mheight>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_Screen_mheight(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_Screen_mheight(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
size_t get_pml4_index(uintptr_t virt_address) {
  return (virt_address >> 39) & 0x1FF;
}


x86 assembly (clang, -O0):
<get_pml4_index>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x27,%rax
and    $0x1ff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_pml4_index>:
mov    %rdi,%rax
shr    $0x27,%rax
and    $0x1ff,%eax
ret

LLVM IR (-O0):
define i64 @get_pml4_index(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 39
%5 = and i64 %4, 511
ret i64 %5
}

LLVM IR (-O2):
define i64 @get_pml4_index(i64 %0) {
%2 = lshr i64 %0, 39
%3 = and i64 %2, 511
ret i64 %3
}
void INT_P5(void) {}


x86 assembly (clang, -O0):
<INT_P5>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_P5>:
ret

LLVM IR (-O0):
define void @INT_P5() {
ret void
}

LLVM IR (-O2):
define void @INT_P5() {
ret void
}
int test() {
  static int a = 3;
  return a++;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f16(%rip),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,0x2f0b(%rip)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
mov    0x2f1a(%rip),%eax
lea    0x1(%rax),%ecx
mov    %ecx,0x2f11(%rip)
ret

LLVM IR (-O0):
@test.a = internal global i32 3
define i32 @test() {
%1 = load i32, i32* @test.a
%2 = add nsw i32 %1, 1
store i32 %2, i32* @test.a
ret i32 %1
}

LLVM IR (-O2):
@test.a = internal unnamed_addr global i32 3
define i32 @test() {
%1 = load i32, i32* @test.a
%2 = add nsw i32 %1, 1
store i32 %2, i32* @test.a
ret i32 %1
}
int test_imm_A6int8_mem(signed char *val) {
  return ((*val) & (-0xA6 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A6int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xffffff5a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A6int8_mem>:
movsbl (%rdi),%eax
test   $0xffffff5a,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A6int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, -166
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_A6int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
%4 = and i32 %3, -166
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i32 -40, i32 -20
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ VIM_SIF_I2cWriteByte(unsigned char, unsigned char);
void SensorSetReg_SIV100A(unsigned char uAddr, unsigned short uVal) {
  VIM_SIF_I2cWriteByte((unsigned char)uAddr, (unsigned char)uVal);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x1(%rbp),%cl
mov    -0x4(%rbp),%ax
movzbl %cl,%edi
movzbl %al,%esi
call   1030 <VIM_SIF_I2cWriteByte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
movzbl %sil,%esi
jmp    1030 <VIM_SIF_I2cWriteByte@plt>

LLVM IR (-O0):
define void @SensorSetReg_SIV100A(i8 zeroext %0, i16 zeroext %1) {
%3 = alloca i8
%4 = alloca i16
store i8 %0, i8* %3
store i16 %1, i16* %4
%5 = load i8, i8* %3
%6 = load i16, i16* %4
%7 = trunc i16 %6 to i8
%8 = call i32 @VIM_SIF_I2cWriteByte(i8 zeroext %5, i8 zeroext %7)
ret void
}

LLVM IR (-O2):
define void @SensorSetReg_SIV100A(i8 zeroext %0, i16 zeroext %1) {
%3 = trunc i16 %1 to i8
%4 = tail call i32 @VIM_SIF_I2cWriteByte(i8 zeroext %0, i8 zeroext %3)
ret void
}
int func7() {
#pragma critTer : 26 :../../ test / resources / functionNumber.c:
  return 0;
#pragma critTer : 27 :../../ test / resources / functionNumber.c:
}


x86 assembly (clang, -O0):
<func7>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func7>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @func7() {
ret i32 0
}

LLVM IR (-O2):
define i32 @func7() {
ret i32 0
}
int test_imm_A2int64_midword_reg(long long val) {
  return ((val >> 16) & (0xA2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A2int64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0xa2,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A2int64_midword_reg>:
test   $0xa20000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A2int64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 162
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A2int64_midword_reg(i64 %0) {
%2 = and i64 %0, 10616832
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void buildSymbolTable() { printf("Build symbol table...\n"); }


x86 assembly (clang, -O0):
<buildSymbolTable>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<buildSymbolTable>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"Build symbol table...\0A\00"
define void @buildSymbolTable() {
%1 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [22 x i8] c"Build symbol table...\00"
define void @buildSymbolTable() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ chomp(char *);
int /*<<< orphan*/ *fgets(char *, int, int /*<<< orphan*/ *);
int line(char *l, FILE *fp) {
  if (fgets(l, 255, fp) == NULL)
    return 0;
  chomp(l);
  return 1;
}


x86 assembly (clang, -O0):
<line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    $0xff,%esi
call   1030 <fgets@plt>
cmp    $0x0,%rax
jne    1158 <line+0x38>
movl   $0x0,-0x4(%rbp)
jmp    1168 <line+0x48>
mov    -0x10(%rbp),%rdi
call   1040 <chomp@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<line>:
push   %rbx
mov    %rsi,%rdx
mov    %rdi,%rbx
mov    $0xff,%esi
call   1030 <fgets@plt>
test   %rax,%rax
je     1145 <line+0x25>
mov    %rbx,%rdi
call   1040 <chomp@plt>
mov    $0x1,%eax
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @line(i8* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %4
store i32* %1, i32** %5
%6 = load i8*, i8** %4
%7 = load i32*, i32** %5
%8 = call i32* @fgets(i8* %6, i32 255, i32* %7)
%9 = icmp eq i32* %8, null
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 0, i32* %3
br label %14
11: ; preds = %2
%12 = load i8*, i8** %4
%13 = call i32 @chomp(i8* %12)
store i32 1, i32* %3
br label %14
14: ; preds = %11, %10
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @line(i8* %0, i32* nocapture %1) {
%3 = tail call i32* @fgets(i8* %0, i32 255, i32* %1)
%4 = icmp eq i32* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @chomp(i8* %0)
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ 1, %5 ], [ 0, %2 ]
ret i32 %8
}
int execute_getpid() { return 0; }


x86 assembly (clang, -O0):
<execute_getpid>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_getpid>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_getpid() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_getpid() {
ret i32 0
}
void free_inet4wp(struct in_addr *net, int *val) {}


x86 assembly (clang, -O0):
<free_inet4wp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_inet4wp>:
ret

LLVM IR (-O0):
%struct.in_addr = type opaque
define void @free_inet4wp(%struct.in_addr* %0, i32* %1) {
%3 = alloca %struct.in_addr*
%4 = alloca i32*
store %struct.in_addr* %0, %struct.in_addr** %3
store i32* %1, i32** %4
ret void
}

LLVM IR (-O2):
%struct.in_addr = type opaque
define void @free_inet4wp(%struct.in_addr* nocapture %0, i32* nocapture %1) {
ret void
}
int isSF(int nodetype) {
  return (nodetype % 2 == 0) && nodetype >= 0 && nodetype <= 41;
}


x86 assembly (clang, -O0):
<isSF>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
xor    %eax,%eax
cmp    $0x0,%edx
mov    %al,-0x5(%rbp)
jne    1139 <isSF+0x39>
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1139 <isSF+0x39>
cmpl   $0x29,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isSF>:
test   $0x80000001,%edi
sete   %al
cmp    $0x2a,%edi
setl   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @isSF(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp sge i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %2
%11 = icmp sle i32 %10, 41
br label %12
12: ; preds = %9, %6, %1
%13 = phi i1 [ false, %6 ], [ false, %1 ], [ %11, %9 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @isSF(i32 %0) {
%2 = and i32 %0, -2147483647
%3 = icmp eq i32 %2, 0
%4 = icmp slt i32 %0, 42
%5 = and i1 %4, %3
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0xd1() {
  Assert_real((isdigit(209) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              1050, ("isdigit should be 0 for 0xd1"));
}


x86 assembly (clang, -O0):
<t_isdigit_0xd1>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd1,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x41a,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0xd1>:
push   %rax
mov    $0xd1,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x41a,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0xd1\00"
define void @t_isdigit_0xd1() {
%1 = call i64 @isdigit(i32 209)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1050, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0xd1\00"
define void @t_isdigit_0xd1() {
%1 = tail call i64 @isdigit(i32 209)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1050, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
char *newstr_bsl(const char *string) {
  char *newstr_bsling;
  if (!(newstr_bsling = (char *)malloc(strlen(string) + 1)))
    return ((char *)NULL);
  (void)strcpy(newstr_bsling, string);
  return (newstr_bsling);
}


x86 assembly (clang, -O0):
<newstr_bsl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    116c <newstr_bsl+0x3c>
movq   $0x0,-0x8(%rbp)
jmp    1181 <newstr_bsl+0x51>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<newstr_bsl>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
test   %rax,%rax
je     115a <newstr_bsl+0x2a>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
jmp    115c <newstr_bsl+0x2c>
xor    %ebx,%ebx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @newstr_bsl(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @strlen(i8* %5)
%7 = add nsw i64 %6, 1
%8 = call i64 @malloc(i64 %7)
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %4
%10 = icmp ne i8* %9, null
br i1 %10, label %12, label %11
11: ; preds = %1
store i8* null, i8** %2
br label %17
12: ; preds = %1
%13 = load i8*, i8** %4
%14 = load i8*, i8** %3
%15 = call i32 @strcpy(i8* %13, i8* %14)
%16 = load i8*, i8** %4
store i8* %16, i8** %2
br label %17
17: ; preds = %12, %11
%18 = load i8*, i8** %2
ret i8* %18
}

LLVM IR (-O2):
define i8* @newstr_bsl(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i64 @malloc(i64 %3)
%5 = inttoptr i64 %4 to i8*
%6 = icmp eq i64 %4, 0
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @strcpy(i8* %5, i8* %0)
br label %9
9: ; preds = %1, %7
%10 = phi i8* [ %5, %7 ], [ null, %1 ]
ret i8* %10
}
float limat_number_bilinear(float x, float z, float v00, float v10, float v01,
                            float v11) {
  float t0;
  float t1;
  t0 = (1.0f - x) * v00 + x * v10;
  t1 = (1.0f - x) * v01 + x * v11;
  return (1.0f - z) * t0 + z * t1;
}


x86 assembly (clang, -O0):
<limat_number_bilinear>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  %xmm4,-0x14(%rbp)
movss  %xmm5,-0x18(%rbp)
movss  0xed6(%rip),%xmm0
subss  -0x4(%rbp),%xmm0
movss  -0xc(%rbp),%xmm2
movss  -0x4(%rbp),%xmm1
mulss  -0x10(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  0xead(%rip),%xmm0
subss  -0x4(%rbp),%xmm0
movss  -0x14(%rbp),%xmm2
movss  -0x4(%rbp),%xmm1
mulss  -0x18(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x20(%rbp)
movss  0xe84(%rip),%xmm0
subss  -0x8(%rbp),%xmm0
movss  -0x1c(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  -0x20(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<limat_number_bilinear>:
movss  0xef8(%rip),%xmm6
movaps %xmm6,%xmm7
subss  %xmm0,%xmm7
mulss  %xmm0,%xmm3
mulss  %xmm7,%xmm2
addss  %xmm3,%xmm2
mulss  %xmm5,%xmm0
mulss  %xmm4,%xmm7
addss  %xmm7,%xmm0
subss  %xmm1,%xmm6
mulss  %xmm2,%xmm6
mulss  %xmm1,%xmm0
addss  %xmm6,%xmm0
ret

LLVM IR (-O0):
define float @limat_number_bilinear(float %0, float %1, float %2, float %3, float %4, float %5) {
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
%11 = alloca float
%12 = alloca float
%13 = alloca float
%14 = alloca float
store float %0, float* %7
store float %1, float* %8
store float %2, float* %9
store float %3, float* %10
store float %4, float* %11
store float %5, float* %12
%15 = load float, float* %7
%16 = fsub float 1.000000e+00, %15
%17 = load float, float* %9
%18 = load float, float* %7
%19 = load float, float* %10
%20 = fmul float %18, %19
%21 = call float @llvm.fmuladd.f32(float %16, float %17, float %20)
store float %21, float* %13
%22 = load float, float* %7
%23 = fsub float 1.000000e+00, %22
%24 = load float, float* %11
%25 = load float, float* %7
%26 = load float, float* %12
%27 = fmul float %25, %26
%28 = call float @llvm.fmuladd.f32(float %23, float %24, float %27)
store float %28, float* %14
%29 = load float, float* %8
%30 = fsub float 1.000000e+00, %29
%31 = load float, float* %13
%32 = load float, float* %8
%33 = load float, float* %14
%34 = fmul float %32, %33
%35 = call float @llvm.fmuladd.f32(float %30, float %31, float %34)
ret float %35
}

LLVM IR (-O2):
define float @limat_number_bilinear(float %0, float %1, float %2, float %3, float %4, float %5) {
%7 = fsub float 1.000000e+00, %0
%8 = fmul float %0, %3
%9 = tail call float @llvm.fmuladd.f32(float %7, float %2, float %8)
%10 = fmul float %0, %5
%11 = tail call float @llvm.fmuladd.f32(float %7, float %4, float %10)
%12 = fsub float 1.000000e+00, %1
%13 = fmul float %11, %1
%14 = tail call float @llvm.fmuladd.f32(float %12, float %9, float %13)
ret float %14
}
__attribute__((__no__)) void do_nothing_char_array_zero(unsigned char *ptr) {
  if ((unsigned long)ptr > 0x2)
    return;
  else
    return;
}


x86 assembly (clang, -O0):
<do_nothing_char_array_zero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmp    $0x2,%rax
jbe    111b <do_nothing_char_array_zero+0x1b>
jmp    1120 <do_nothing_char_array_zero+0x20>
jmp    1120 <do_nothing_char_array_zero+0x20>
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_nothing_char_array_zero>:
ret

LLVM IR (-O0):
define void @do_nothing_char_array_zero(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
%5 = icmp ugt i64 %4, 2
br i1 %5, label %6, label %7
6: ; preds = %1
br label %8
7: ; preds = %1
br label %8
8: ; preds = %7, %6
ret void
}

LLVM IR (-O2):
define void @do_nothing_char_array_zero(i8* nocapture %0) {
ret void
}
void __attribute__((no, noclone)) fn5(void) {
  int i = 5;
  volatile int a[i];
  asm("" : : "r"(&a) : "memory");
  a[2] = a[i];
}


x86 assembly (clang, -O0):
<fn5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x5,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
mov    %rsp,%rax
mov    %rax,-0x10(%rbp)
lea    0xf(,%rcx,4),%rdx
and    $0xfffffffffffffff0,%rdx
mov    %rsp,%rax
sub    %rdx,%rax
mov    %rax,%rsp
mov    %rcx,-0x18(%rbp)
mov    %rax,%rcx
movslq -0x4(%rbp),%rcx
mov    (%rax,%rcx,4),%ecx
mov    %ecx,0x8(%rax)
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn5>:
lea    -0x18(%rsp),%rax
mov    -0x4(%rsp),%eax
mov    %eax,-0x10(%rsp)
ret

LLVM IR (-O0):
define void @fn5() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i64
store i32 5, i32* %1
%4 = load i32, i32* %1
%5 = zext i32 %4 to i64
%6 = call i8* @llvm.stacksave()
store i8* %6, i8** %2
%7 = alloca i32, i64 %5
store i64 %5, i64* %3
%8 = load i32, i32* %1
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i32, i32* %7, i64 %9
%11 = load volatile i32, i32* %10
%12 = getelementptr inbounds i32, i32* %7, i64 2
store volatile i32 %11, i32* %12
%13 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @fn5() {
%1 = alloca [5 x i32]
%2 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%3 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 5
%4 = load volatile i32, i32* %3
%5 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 2
store volatile i32 %4, i32* %5
ret void
}
unsigned long lib$insque(void *entry, void *header) { return 1; }


x86 assembly (clang, -O0):
<lib$insque>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lib$insque>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i64 @"lib$insque"(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i64 1
}

LLVM IR (-O2):
define i64 @"lib$insque"(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i64 1
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int /*<<< orphan*/ mutex_lock(int /*<<< orphan*/ *);
int /*<<< orphan*/ pthread_mutex_unlock(int /*<<< orphan*/ *);
unsigned short refcount_incr(unsigned short *refcount, pthread_mutex_t *mutex) {
  unsigned short res;
  mutex_lock(mutex);
  (*refcount)++;
  res = *refcount;
  pthread_mutex_unlock(mutex);
  return res;
}


x86 assembly (clang, -O0):
<refcount_incr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <mutex_lock@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%cx
add    $0x1,%cx
mov    %cx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%ax
mov    %ax,-0x12(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <pthread_mutex_unlock@plt>
movzwl -0x12(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<refcount_incr>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <mutex_lock@plt>
movzwl (%rbx),%ebp
add    $0x1,%ebp
mov    %bp,(%rbx)
mov    %r14,%rdi
call   1040 <pthread_mutex_unlock@plt>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define zeroext i16 @refcount_incr(i16* %0, i32* %1) {
%3 = alloca i16*
%4 = alloca i32*
%5 = alloca i16
store i16* %0, i16** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %4
%7 = call i32 @mutex_lock(i32* %6)
%8 = load i16*, i16** %3
%9 = load i16, i16* %8
%10 = add i16 %9, 1
store i16 %10, i16* %8
%11 = load i16*, i16** %3
%12 = load i16, i16* %11
store i16 %12, i16* %5
%13 = load i32*, i32** %4
%14 = call i32 @pthread_mutex_unlock(i32* %13)
%15 = load i16, i16* %5
ret i16 %15
}

LLVM IR (-O2):
define zeroext i16 @refcount_incr(i16* nocapture %0, i32* %1) {
%3 = tail call i32 @mutex_lock(i32* %1)
%4 = load i16, i16* %0
%5 = add i16 %4, 1
store i16 %5, i16* %0
%6 = tail call i32 @pthread_mutex_unlock(i32* %1)
ret i16 %5
}
regx0adr1(r0, r1, x0, x1, p0, p1) int r0, r1;
int *p0, *p1;
{
  if ((p0[x0]) <= (*((int *)11111111)))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<regx0adr1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x20(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    $0xa98ac7,%ecx
cmp    (%rcx),%eax
jg     113c <regx0adr1+0x3c>
movl   $0x1,-0x4(%rbp)
jmp    1143 <regx0adr1+0x43>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<regx0adr1>:
movslq %edx,%rax
mov    (%r8,%rax,4),%ecx
xor    %eax,%eax
cmp    0xa98ac7,%ecx
setle  %al
ret

LLVM IR (-O0):
define i32 @regx0adr1(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32*, i32** %12
%15 = load i32, i32* %10
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* inttoptr (i64 11111111 to i32*)
%20 = icmp sle i32 %18, %19
br i1 %20, label %21, label %22
21: ; preds = %6
store i32 1, i32* %7
br label %23
22: ; preds = %6
store i32 0, i32* %7
br label %23
23: ; preds = %22, %21
%24 = load i32, i32* %7
ret i32 %24
}

LLVM IR (-O2):
define i32 @regx0adr1(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture %4, i32* nocapture readnone %5) {
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %4, i64 %7
%9 = load i32, i32* %8
%10 = load i32, i32* inttoptr (i64 11111111 to i32*)
%11 = icmp sle i32 %9, %10
%12 = zext i1 %11 to i32
ret i32 %12
}
/* Type definitions */
struct pt_packet_decoder {
  int dummy;
};

/* Variables and functions */
void pt_pkt_decoder_fini(struct pt_packet_decoder *decoder) { (void)decoder; }


x86 assembly (clang, -O0):
<pt_pkt_decoder_fini>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pt_pkt_decoder_fini>:
ret

LLVM IR (-O0):
%struct.pt_packet_decoder = type { i32 }
define void @pt_pkt_decoder_fini(%struct.pt_packet_decoder* %0) {
%2 = alloca %struct.pt_packet_decoder*
store %struct.pt_packet_decoder* %0, %struct.pt_packet_decoder** %2
%3 = load %struct.pt_packet_decoder*, %struct.pt_packet_decoder** %2
ret void
}

LLVM IR (-O2):
%struct.pt_packet_decoder = type { i32 }
define void @pt_pkt_decoder_fini(%struct.pt_packet_decoder* nocapture %0) {
ret void
}