#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned char opcode_CC00_set_addr_mode(unsigned char, unsigned char);
unsigned char opcode_CC01_set_addr_mode(unsigned char, unsigned char);
unsigned char opcode_CC10_set_addr_mode(unsigned char, unsigned char);
unsigned char opcode_set_addr_mode(unsigned char group, unsigned char base,
                                   unsigned char addr_mode) {
  switch (group) {
  case 0x01:
    base = opcode_CC01_set_addr_mode(base, addr_mode);
    break;
  case 0x02:
    base = opcode_CC10_set_addr_mode(base, addr_mode);
    break;
  case 0x03:
    base = opcode_CC00_set_addr_mode(base, addr_mode);
    break;
  case 0x04:
  case 0x05:
  case 0x06:
  default:
    break;
  }
  return base;
}


x86 assembly (clang, -O0):
<opcode_set_addr_mode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %sil,%cl
mov    %dil,%dl
mov    %dl,-0x1(%rbp)
mov    %cl,-0x2(%rbp)
mov    %al,-0x3(%rbp)
movzbl -0x1(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x5,%eax
ja     11bd <opcode_set_addr_mode+0x8d>
mov    -0x10(%rbp),%rax
lea    0xe96(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x2(%rbp),%al
movzbl %al,%edi
movzbl -0x3(%rbp),%esi
call   1040 <opcode_CC01_set_addr_mode@plt>
mov    %al,-0x2(%rbp)
jmp    11c2 <opcode_set_addr_mode+0x92>
mov    -0x2(%rbp),%al
movzbl %al,%edi
movzbl -0x3(%rbp),%esi
call   1030 <opcode_CC10_set_addr_mode@plt>
mov    %al,-0x2(%rbp)
jmp    11c2 <opcode_set_addr_mode+0x92>
mov    -0x2(%rbp),%al
movzbl %al,%edi
movzbl -0x3(%rbp),%esi
call   1050 <opcode_CC00_set_addr_mode@plt>
mov    %al,-0x2(%rbp)
jmp    11c2 <opcode_set_addr_mode+0x92>
jmp    11bd <opcode_set_addr_mode+0x8d>
jmp    11c2 <opcode_set_addr_mode+0x92>
movzbl -0x2(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<opcode_set_addr_mode>:
cmp    $0x3,%dil
je     114e <opcode_set_addr_mode+0x1e>
cmp    $0x2,%dil
je     115a <opcode_set_addr_mode+0x2a>
cmp    $0x1,%dil
jne    1166 <opcode_set_addr_mode+0x36>
movzbl %sil,%edi
movzbl %dl,%esi
jmp    1040 <opcode_CC01_set_addr_mode@plt>
movzbl %sil,%edi
movzbl %dl,%esi
jmp    1050 <opcode_CC00_set_addr_mode@plt>
movzbl %sil,%edi
movzbl %dl,%esi
jmp    1030 <opcode_CC10_set_addr_mode@plt>
mov    %esi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @opcode_set_addr_mode(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
switch i32 %8, label %22 [
i32 1, label %9
i32 2, label %13
i32 3, label %17
i32 4, label %21
i32 5, label %21
i32 6, label %21
]
9: ; preds = %3
%10 = load i8, i8* %5
%11 = load i8, i8* %6
%12 = call zeroext i8 @opcode_CC01_set_addr_mode(i8 zeroext %10, i8 zeroext %11)
store i8 %12, i8* %5
br label %23
13: ; preds = %3
%14 = load i8, i8* %5
%15 = load i8, i8* %6
%16 = call zeroext i8 @opcode_CC10_set_addr_mode(i8 zeroext %14, i8 zeroext %15)
store i8 %16, i8* %5
br label %23
17: ; preds = %3
%18 = load i8, i8* %5
%19 = load i8, i8* %6
%20 = call zeroext i8 @opcode_CC00_set_addr_mode(i8 zeroext %18, i8 zeroext %19)
store i8 %20, i8* %5
br label %23
21: ; preds = %3, %3, %3
br label %22
22: ; preds = %3, %21
br label %23
23: ; preds = %22, %17, %13, %9
%24 = load i8, i8* %5
ret i8 %24
}

LLVM IR (-O2):
define zeroext i8 @opcode_set_addr_mode(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2) {
switch i8 %0, label %10 [
i8 1, label %4
i8 2, label %6
i8 3, label %8
]
4: ; preds = %3
%5 = tail call zeroext i8 @opcode_CC01_set_addr_mode(i8 zeroext %1, i8 zeroext %2)
br label %10
6: ; preds = %3
%7 = tail call zeroext i8 @opcode_CC10_set_addr_mode(i8 zeroext %1, i8 zeroext %2)
br label %10
8: ; preds = %3
%9 = tail call zeroext i8 @opcode_CC00_set_addr_mode(i8 zeroext %1, i8 zeroext %2)
br label %10
10: ; preds = %3, %8, %6, %4
%11 = phi i8 [ %1, %3 ], [ %9, %8 ], [ %7, %6 ], [ %5, %4 ]
ret i8 %11
}