xunge/DecIR huggingface dataset:
/* Type definitions */
typedef scalar_t__ uint8_t;

/* Variables and functions */
uint8_t *_rmt_strrchr(uint8_t *p, uint8_t *start, uint8_t c) {
  while (p >= start) {
    if (*p == c) {
      return p;
    }
    p--;
  }
  return NULL;
}


x86 assembly (clang, -O0):
<_rmt_strrchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jb     114d <_rmt_strrchr+0x4d>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
cmp    -0x20(%rbp),%rax
jne    113c <_rmt_strrchr+0x3c>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1155 <_rmt_strrchr+0x55>
mov    -0x10(%rbp),%rax
add    $0xfffffffffffffff8,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <_rmt_strrchr+0x10>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_rmt_strrchr>:
cmp    %rsi,%rdi
jb     111e <_rmt_strrchr+0x1e>
mov    %rdi,%rax
nopl   0x0(%rax,%rax,1)
cmp    %rdx,(%rax)
je     1120 <_rmt_strrchr+0x20>
add    $0xfffffffffffffff8,%rax
cmp    %rsi,%rax
jae    1110 <_rmt_strrchr+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64* @_rmt_strrchr(i64* %0, i64* %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i64*
%6 = alloca i64*
%7 = alloca i64
store i64* %0, i64** %5
store i64* %1, i64** %6
store i64 %2, i64* %7
br label %8
8: ; preds = %19, %3
%9 = load i64*, i64** %5
%10 = load i64*, i64** %6
%11 = icmp uge i64* %9, %10
br i1 %11, label %12, label %22
12: ; preds = %8
%13 = load i64*, i64** %5
%14 = load i64, i64* %13
%15 = load i64, i64* %7
%16 = icmp eq i64 %14, %15
br i1 %16, label %17, label %19
17: ; preds = %12
%18 = load i64*, i64** %5
store i64* %18, i64** %4
br label %23
19: ; preds = %12
%20 = load i64*, i64** %5
%21 = getelementptr inbounds i64, i64* %20, i32 -1
store i64* %21, i64** %5
br label %8
22: ; preds = %8
store i64* null, i64** %4
br label %23
23: ; preds = %22, %17
%24 = load i64*, i64** %4
ret i64* %24
}

LLVM IR (-O2):
define i64* @_rmt_strrchr(i64* %0, i64* readnone %1, i64 %2) {
%4 = icmp ult i64* %0, %1
br i1 %4, label %12, label %5
5: ; preds = %3, %9
%6 = phi i64* [ %10, %9 ], [ %0, %3 ]
%7 = load i64, i64* %6
%8 = icmp eq i64 %7, %2
br i1 %8, label %12, label %9
9: ; preds = %5
%10 = getelementptr inbounds i64, i64* %6, i64 -1
%11 = icmp ult i64* %10, %1
br i1 %11, label %12, label %5
12: ; preds = %5, %9, %3
%13 = phi i64* [ null, %3 ], [ null, %9 ], [ %6, %5 ]
ret i64* %13
}
/* Variables and functions */
int /*<<< orphan*/ core3_print(char *, char *, char const *);
void U_EMRRESTOREDC_print(const char *contents) {
  core3_print("U_EMRRESTOREDC", "iRelative:", contents);
}


x86 assembly (clang, -O0):
<U_EMRRESTOREDC_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xee1(%rip),%rsi
call   1030 <core3_print@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRRESTOREDC_print>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xeee(%rip),%rsi
jmp    1030 <core3_print@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"U_EMRRESTOREDC\00"
@.str.1 = [11 x i8] c"iRelative:\00"
define void @U_EMRRESTOREDC_print(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @core3_print(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"U_EMRRESTOREDC\00"
@.str.1 = [11 x i8] c"iRelative:\00"
define void @U_EMRRESTOREDC_print(i8* %0) {
%2 = tail call i32 @core3_print(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
__attribute__((always_)) int pci_msix_table_size(struct pci_dev *dev) {
  return 0;
}


x86 assembly (clang, -O0):
<pci_msix_table_size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_msix_table_size>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.pci_dev = type opaque
define i32 @pci_msix_table_size(%struct.pci_dev* %0) {
%2 = alloca %struct.pci_dev*
store %struct.pci_dev* %0, %struct.pci_dev** %2
ret i32 0
}

LLVM IR (-O2):
%struct.pci_dev = type opaque
define i32 @pci_msix_table_size(%struct.pci_dev* nocapture readnone %0) {
ret i32 0
}
void *test10() {
bar:
  return &&bar;
}


x86 assembly (clang, -O0):
<test10>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <test10+0x9>
lea    -0x7(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test10>:
lea    -0x7(%rip),%rax
ret

LLVM IR (-O0):
define i8* @test10() {
br label %1
1: ; preds = %2, %0
ret i8* blockaddress(@test10, %1)
2: ; No predecessors!
indirectbr i8* undef, [label %1]
}

LLVM IR (-O2):
define i8* @test10() {
br label %1
1: ; preds = %0
ret i8* blockaddress(@test10, %1)
}
int mxc_serial_getc(char *const c) {
  if ((*((volatile unsigned int *)(0x53FBC000 + 0xb4))) & (1 << 5)) {
    return -1;
  }
  int r = (*((volatile unsigned int *)(0x53FBC000 + 0x00)));
  if ((r & 0xFC00) != 0x8000) {
    return r;
  }
  *c = (char)(r & 0xFF);
  return 0;
}


x86 assembly (clang, -O0):
<mxc_serial_getc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    $0x53fbc0b4,%eax
mov    (%rax),%eax
and    $0x20,%eax
cmp    $0x0,%eax
je     1127 <mxc_serial_getc+0x27>
movl   $0xffffffff,-0x4(%rbp)
jmp    1166 <mxc_serial_getc+0x66>
mov    $0x53fbc000,%eax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    $0xfc00,%eax
cmp    $0x8000,%eax
je     114f <mxc_serial_getc+0x4f>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1166 <mxc_serial_getc+0x66>
mov    -0x14(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mxc_serial_getc>:
mov    $0xffffffff,%eax
testl  $0x20,0x53fbc0b4
jne    112d <mxc_serial_getc+0x2d>
mov    0x53fbc000,%eax
mov    %eax,%ecx
and    $0xfc00,%ecx
cmp    $0x8000,%ecx
jne    112d <mxc_serial_getc+0x2d>
mov    %al,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mxc_serial_getc(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load volatile i32, i32* inttoptr (i64 1409007796 to i32*)
%6 = and i32 %5, 32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 -1, i32* %2
br label %21
9: ; preds = %1
%10 = load volatile i32, i32* inttoptr (i64 1409007616 to i32*)
store i32 %10, i32* %4
%11 = load i32, i32* %4
%12 = and i32 %11, 64512
%13 = icmp ne i32 %12, 32768
br i1 %13, label %14, label %16
14: ; preds = %9
%15 = load i32, i32* %4
store i32 %15, i32* %2
br label %21
16: ; preds = %9
%17 = load i32, i32* %4
%18 = and i32 %17, 255
%19 = trunc i32 %18 to i8
%20 = load i8*, i8** %3
store i8 %19, i8* %20
store i32 0, i32* %2
br label %21
21: ; preds = %16, %14, %8
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @mxc_serial_getc(i8* nocapture writeonly %0) {
%2 = load volatile i32, i32* inttoptr (i64 1409007796 to i32*)
%3 = and i32 %2, 32
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %11
5: ; preds = %1
%6 = load volatile i32, i32* inttoptr (i64 1409007616 to i32*)
%7 = and i32 %6, 64512
%8 = icmp eq i32 %7, 32768
br i1 %8, label %9, label %11
9: ; preds = %5
%10 = trunc i32 %6 to i8
store i8 %10, i8* %0
br label %11
11: ; preds = %9, %5, %1
%12 = phi i32 [ -1, %1 ], [ 0, %9 ], [ %6, %5 ]
ret i32 %12
}
unsigned long hash_long(unsigned long val, unsigned int bits) {
  unsigned long hash = val;
  unsigned long n = hash;
  n <<= 18;
  hash -= n;
  n <<= 33;
  hash -= n;
  n <<= 3;
  hash += n;
  n <<= 3;
  hash -= n;
  n <<= 4;
  hash += n;
  n <<= 2;
  hash += n;
  return hash >> (64 - bits);
}


x86 assembly (clang, -O0):
<hash_long>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
shl    $0x12,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%rax
sub    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rax
shl    $0x21,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%rax
sub    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rax
shl    $0x3,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rax
shl    $0x3,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%rax
sub    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rax
shl    $0x4,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rax
shl    $0x2,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    $0x40,%ecx
sub    -0xc(%rbp),%ecx
mov    %ecx,%ecx
shr    %cl,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_long>:
mov    %esi,%ecx
movabs $0x9e37fffffffc0001,%rax
ff 37 9e
imul   %rdi,%rax
neg    %cl
shr    %cl,%rax
ret

LLVM IR (-O0):
define i64 @hash_long(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %3
store i32 %1, i32* %4
%7 = load i64, i64* %3
store i64 %7, i64* %5
%8 = load i64, i64* %5
store i64 %8, i64* %6
%9 = load i64, i64* %6
%10 = shl i64 %9, 18
store i64 %10, i64* %6
%11 = load i64, i64* %6
%12 = load i64, i64* %5
%13 = sub i64 %12, %11
store i64 %13, i64* %5
%14 = load i64, i64* %6
%15 = shl i64 %14, 33
store i64 %15, i64* %6
%16 = load i64, i64* %6
%17 = load i64, i64* %5
%18 = sub i64 %17, %16
store i64 %18, i64* %5
%19 = load i64, i64* %6
%20 = shl i64 %19, 3
store i64 %20, i64* %6
%21 = load i64, i64* %6
%22 = load i64, i64* %5
%23 = add i64 %22, %21
store i64 %23, i64* %5
%24 = load i64, i64* %6
%25 = shl i64 %24, 3
store i64 %25, i64* %6
%26 = load i64, i64* %6
%27 = load i64, i64* %5
%28 = sub i64 %27, %26
store i64 %28, i64* %5
%29 = load i64, i64* %6
%30 = shl i64 %29, 4
store i64 %30, i64* %6
%31 = load i64, i64* %6
%32 = load i64, i64* %5
%33 = add i64 %32, %31
store i64 %33, i64* %5
%34 = load i64, i64* %6
%35 = shl i64 %34, 2
store i64 %35, i64* %6
%36 = load i64, i64* %6
%37 = load i64, i64* %5
%38 = add i64 %37, %36
store i64 %38, i64* %5
%39 = load i64, i64* %5
%40 = load i32, i32* %4
%41 = sub i32 64, %40
%42 = zext i32 %41 to i64
%43 = lshr i64 %39, %42
ret i64 %43
}

LLVM IR (-O2):
define i64 @hash_long(i64 %0, i32 %1) {
%3 = mul i64 %0, -7045881617021403135
%4 = sub i32 64, %1
%5 = zext i32 %4 to i64
%6 = lshr i64 %3, %5
ret i64 %6
}
int tracker_hash(unsigned char *h) { return (int)*h; }


x86 assembly (clang, -O0):
<tracker_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tracker_hash>:
movzbl (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @tracker_hash(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @tracker_hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int varfun(int, int, ...);
int main() {
  varfun(23, 46);
  printf("%d\n", varfun(23, 47, 16));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x17,%edi
mov    $0x2e,%esi
mov    $0x0,%al
call   1040 <varfun@plt>
mov    $0x17,%edi
mov    $0x2f,%esi
mov    $0x10,%edx
mov    $0x0,%al
call   1040 <varfun@plt>
mov    %eax,%esi
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x17,%edi
mov    $0x2e,%esi
xor    %eax,%eax
call   1040 <varfun@plt>
mov    $0x17,%edi
mov    $0x2f,%esi
mov    $0x10,%edx
xor    %eax,%eax
call   1040 <varfun@plt>
lea    0xeb1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = call i32 (i32, i32, ...) @varfun(i32 23, i32 46)
%2 = call i32 (i32, i32, ...) @varfun(i32 23, i32 47, i32 16)
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 (i32, i32, ...) @varfun(i32 23, i32 46)
%2 = tail call i32 (i32, i32, ...) @varfun(i32 23, i32 47, i32 16)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}
/* Variables and functions */
int bitcount(int);
int /*<<< orphan*/ printf(char *, int);
void main() {
  int k = bitcount(123456789);
  printf("unsigned: %lu\n", k);
  printf("unsigned: %lu\n", 123456789);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x75bcd15,%edi
call   1040 <bitcount@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
lea    0xeb5(%rip),%rdi
mov    $0x75bcd15,%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x75bcd15,%edi
call   1040 <bitcount@plt>
lea    0xece(%rip),%rbx
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x75bcd15,%esi
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"unsigned: %lu\0A\00"
define void @main() {
%1 = alloca i32
%2 = call i32 @bitcount(i32 123456789)
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 123456789)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"unsigned: %lu\0A\00"
define void @main() {
%1 = tail call i32 @bitcount(i32 123456789)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 123456789)
ret void
}
/* Variables and functions */
int /*<<< orphan*/
_test_consulta_debe_permitir_consultar_un_elemento_sin_sacarlo();
int /*<<< orphan*/ _test_pone_y_saca_deben_permitir_poner_y_sacar_elementos();
int /*<<< orphan*/ _test_vacia_debe_indicar_si_la_pila_esta_vacia();
void cola_tests() {
  _test_vacia_debe_indicar_si_la_pila_esta_vacia();
  _test_pone_y_saca_deben_permitir_poner_y_sacar_elementos();
  _test_consulta_debe_permitir_consultar_un_elemento_sin_sacarlo();
}


x86 assembly (clang, -O0):
<cola_tests>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <_test_vacia_debe_indicar_si_la_pila_esta_vacia@plt>
mov    $0x0,%al
call   1030 <_test_pone_y_saca_deben_permitir_poner_y_sacar_elementos@plt>
mov    $0x0,%al
call   1050 <_test_consulta_debe_permitir_consultar_un_elemento_sin_sacarlo@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cola_tests>:
push   %rax
xor    %eax,%eax
call   1040 <_test_vacia_debe_indicar_si_la_pila_esta_vacia@plt>
xor    %eax,%eax
call   1030 <_test_pone_y_saca_deben_permitir_poner_y_sacar_elementos@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <_test_consulta_debe_permitir_consultar_un_elemento_sin_sacarlo@plt>

LLVM IR (-O0):
define void @cola_tests() {
%1 = call i32 (...) @_test_vacia_debe_indicar_si_la_pila_esta_vacia()
%2 = call i32 (...) @_test_pone_y_saca_deben_permitir_poner_y_sacar_elementos()
%3 = call i32 (...) @_test_consulta_debe_permitir_consultar_un_elemento_sin_sacarlo()
ret void
}

LLVM IR (-O2):
define void @cola_tests() {
%1 = tail call i32 (...) @_test_vacia_debe_indicar_si_la_pila_esta_vacia()
%2 = tail call i32 (...) @_test_pone_y_saca_deben_permitir_poner_y_sacar_elementos()
%3 = tail call i32 (...) @_test_consulta_debe_permitir_consultar_un_elemento_sin_sacarlo()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ second(int);
void first(int arg1) {
  int var1 = arg1;
  second(var1 + 1);
}


x86 assembly (clang, -O0):
<first>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
add    $0x1,%edi
call   1030 <second@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<first>:
add    $0x1,%edi
jmp    1030 <second@plt>

LLVM IR (-O0):
define void @first(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = add nsw i32 %5, 1
%7 = call i32 @second(i32 %6)
ret void
}

LLVM IR (-O2):
define void @first(i32 %0) {
%2 = add nsw i32 %0, 1
%3 = tail call i32 @second(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test(int);
int main() {
  test(1);
  test(2);
  test(3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <test@plt>
mov    $0x2,%edi
call   1030 <test@plt>
mov    $0x3,%edi
call   1030 <test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <test@plt>
mov    $0x2,%edi
call   1030 <test@plt>
mov    $0x3,%edi
call   1030 <test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @test(i32 1)
%3 = call i32 @test(i32 2)
%4 = call i32 @test(i32 3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @test(i32 1)
%2 = tail call i32 @test(i32 2)
%3 = tail call i32 @test(i32 3)
ret i32 0
}
int test_imm_A7int8_reg(signed char val) {
  return ((val) & (0xA7 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A7int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xa7,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A7int8_reg>:
test   $0xa7,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A7int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 167
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A7int8_reg(i8 signext %0) {
%2 = and i8 %0, -89
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
float identityf(const float x) { return x; }


x86 assembly (clang, -O0):
<identityf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<identityf>:
ret

LLVM IR (-O0):
define float @identityf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
ret float %3
}

LLVM IR (-O2):
define float @identityf(float returned %0) {
ret float %0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ gencrypted;

/* Variables and functions */
scalar_t__ bcrypt_hashpass(char const *, int /*<<< orphan*/ const *, char *,
                           int);
char *bcrypt(const char *pass, const uint8_t *salt) {
  static char gencrypted[61];
  if (bcrypt_hashpass(pass, salt, gencrypted, sizeof(gencrypted)) != 0)
    return NULL;
  return gencrypted;
}


x86 assembly (clang, -O0):
<bcrypt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
lea    0x2f11(%rip),%rdx
mov    $0x3d,%ecx
call   1030 <bcrypt_hashpass@plt>
cmp    $0x0,%rax
je     1150 <bcrypt+0x40>
movq   $0x0,-0x8(%rbp)
jmp    115b <bcrypt+0x4b>
lea    0x2ee9(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcrypt>:
push   %rbx
lea    0x2f28(%rip),%rbx
mov    %rbx,%rdx
mov    $0x3d,%ecx
call   1030 <bcrypt_hashpass@plt>
xor    %ecx,%ecx
test   %rax,%rax
cmove  %rbx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@bcrypt.gencrypted = internal global [61 x i8] zeroinitializer
define i8* @bcrypt(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %4
store i32* %1, i32** %5
%6 = load i8*, i8** %4
%7 = load i32*, i32** %5
%8 = call i64 @bcrypt_hashpass(i8* %6, i32* %7, i8* getelementptr inbounds ([61 x i8], [61 x i8]* @bcrypt.gencrypted, i64 0, i64 0), i32 61)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store i8* null, i8** %3
br label %12
11: ; preds = %2
store i8* getelementptr inbounds ([61 x i8], [61 x i8]* @bcrypt.gencrypted, i64 0, i64 0), i8** %3
br label %12
12: ; preds = %11, %10
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@bcrypt.gencrypted = internal global [61 x i8] zeroinitializer
define i8* @bcrypt(i8* %0, i32* %1) {
%3 = tail call i64 @bcrypt_hashpass(i8* %0, i32* %1, i8* getelementptr inbounds ([61 x i8], [61 x i8]* @bcrypt.gencrypted, i64 0, i64 0), i32 61)
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i8* getelementptr inbounds ([61 x i8], [61 x i8]* @bcrypt.gencrypted, i64 0, i64 0), i8* null
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
void cx_Double_print(double *const value) { printf("%f", *value); }


x86 assembly (clang, -O0):
<cx_Double_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cx_Double_print>:
movsd  (%rdi),%xmm0
lea    0xee5(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%f\00"
define void @cx_Double_print(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = load double, double* %3
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), double %4)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%f\00"
define void @cx_Double_print(double* nocapture %0) {
%2 = load double, double* %0
%3 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), double %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FifoReset(unsigned long);
void FifoInit(unsigned long dTargetFifo) { FifoReset(dTargetFifo); }


x86 assembly (clang, -O0):
<FifoInit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <FifoReset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FifoInit>:
jmp    1030 <FifoReset@plt>

LLVM IR (-O0):
define void @FifoInit(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @FifoReset(i64 %3)
ret void
}

LLVM IR (-O2):
define void @FifoInit(i64 %0) {
%2 = tail call i32 @FifoReset(i64 %0)
ret void
}
/* Variables and functions */
volatile bool switchZoom(volatile unsigned int *p) {
  return (((*p) & 0x00000040) == 0x00000040);
}


x86 assembly (clang, -O0):
<switchZoom>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0x40,%eax
cmp    $0x40,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<switchZoom>:
mov    (%rdi),%eax
shr    $0x6,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @switchZoom(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load volatile i32, i32* %3
%5 = and i32 %4, 64
%6 = icmp eq i32 %5, 64
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @switchZoom(i32* %0) {
%2 = load volatile i32, i32* %0
%3 = lshr i32 %2, 6
%4 = and i32 %3, 1
ret i32 %4
}
/* Variables and functions */
double loglike_theta_fast(double *, int, void *);
double fitfun(double *x, int n, void *output, int *info) {
  return loglike_theta_fast(x, n, output);
}


x86 assembly (clang, -O0):
<fitfun>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1030 <loglike_theta_fast@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fitfun>:
jmp    1030 <loglike_theta_fast@plt>

LLVM IR (-O0):
define double @fitfun(double* %0, i32 %1, i8* %2, i32* %3) {
%5 = alloca double*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32*
store double* %0, double** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32* %3, i32** %8
%9 = load double*, double** %5
%10 = load i32, i32* %6
%11 = load i8*, i8** %7
%12 = call double @loglike_theta_fast(double* %9, i32 %10, i8* %11)
ret double %12
}

LLVM IR (-O2):
define double @fitfun(double* %0, i32 %1, i8* %2, i32* nocapture readnone %3) {
%5 = tail call double @loglike_theta_fast(double* %0, i32 %1, i8* %2)
ret double %5
}
/* Variables and functions */
float fmin(float a, float b) { return (a < b) ? a : b; }


x86 assembly (clang, -O0):
<fmin>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1130 <fmin+0x30>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    113a <fmin+0x3a>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmin>:
minss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @fmin(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp olt float %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load float, float* %3
br label %12
10: ; preds = %2
%11 = load float, float* %4
br label %12
12: ; preds = %10, %8
%13 = phi float [ %9, %8 ], [ %11, %10 ]
ret float %13
}

LLVM IR (-O2):
define float @fmin(float %0, float %1) {
%3 = fcmp olt float %0, %1
%4 = select i1 %3, float %0, float %1
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ do_send(int, char *);
void japi_get_version(int sd) { do_send(sd, "VERSION\n"); }


x86 assembly (clang, -O0):
<japi_get_version>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xedb(%rip),%rsi
call   1030 <do_send@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<japi_get_version>:
lea    0xee9(%rip),%rsi
jmp    1030 <do_send@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"VERSION\0A\00"
define void @japi_get_version(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @do_send(i32 %3, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"VERSION\0A\00"
define void @japi_get_version(i32 %0) {
%2 = tail call i32 @do_send(i32 %0, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct termp {
  int dummy;
};

/* Variables and functions */
size_t ascii_width(const struct termp *p, int c) { return 1; }


x86 assembly (clang, -O0):
<ascii_width>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ascii_width>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.termp = type { i32 }
define i64 @ascii_width(%struct.termp* %0, i32 %1) {
%3 = alloca %struct.termp*
%4 = alloca i32
store %struct.termp* %0, %struct.termp** %3
store i32 %1, i32* %4
ret i64 1
}

LLVM IR (-O2):
%struct.termp = type { i32 }
define i64 @ascii_width(%struct.termp* nocapture readnone %0, i32 %1) {
ret i64 1
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ stdout;
void output_prompt(void) {
  printf("pgshell$ ");
  fflush(stdout);
}


x86 assembly (clang, -O0):
<output_prompt>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<output_prompt>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"pgshell$ \00"
@stdout = global i32 0
define void @output_prompt() {
%1 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @stdout
%3 = call i32 @fflush(i32 %2)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"pgshell$ \00"
@stdout = global i32 0
define void @output_prompt() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @stdout
%3 = tail call i32 @fflush(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(char *progname) {
  fprintf(stderr,
          "Usage: %s -h -l -x\n"
          "\t -h help, usage message.\n"
          "\t -l number of map - write - unmap.    default: 1000\n"
          "\t -x time for which test is to be run. default: 24 Hrs\n",
          progname);
  exit(-1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [154 x i8] c"Usage: %s -h -l -x\0A\09 -h help, usage message.\0A\09 -l number of map - write - unmap. default: 1000\0A\09 -x time for which test is to be run. default: 24 Hrs\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([154 x i8], [154 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [154 x i8] c"Usage: %s -h -l -x\0A\09 -h help, usage message.\0A\09 -l number of map - write - unmap. default: 1000\0A\09 -x time for which test is to be run. default: 24 Hrs\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([154 x i8], [154 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 -1)
unreachable
}
int unit_uses(int count, int cvalue) {
  int total_unit;
  total_unit = 15 * count + cvalue;
  return total_unit;
}


x86 assembly (clang, -O0):
<unit_uses>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
imul   $0xf,-0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unit_uses>:
lea    (%rdi,%rdi,4),%eax
lea    (%rax,%rax,2),%eax
add    %esi,%eax
ret

LLVM IR (-O0):
define i32 @unit_uses(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = mul nsw i32 15, %6
%8 = load i32, i32* %4
%9 = add nsw i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %5
ret i32 %10
}

LLVM IR (-O2):
define i32 @unit_uses(i32 %0, i32 %1) {
%3 = mul nsw i32 %0, 15
%4 = add nsw i32 %3, %1
ret i32 %4
}
__attribute__((always_)) int register_trace_kfree(
    void (*probe)(void *__data, unsigned long call_site, const void *ptr),
    void *data) {
  return -38;
}


x86 assembly (clang, -O0):
<register_trace_kfree>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffda,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<register_trace_kfree>:
mov    $0xffffffda,%eax
ret

LLVM IR (-O0):
define i32 @register_trace_kfree(void (i8*, i64, i8*)* %0, i8* %1) {
%3 = alloca void (i8*, i64, i8*)*
%4 = alloca i8*
store void (i8*, i64, i8*)* %0, void (i8*, i64, i8*)** %3
store i8* %1, i8** %4
ret i32 -38
}

LLVM IR (-O2):
define i32 @register_trace_kfree(void (i8*, i64, i8*)* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 -38
}
/* Variables and functions */
int /*<<< orphan*/ string_compress(char const *);
void main() {
  const char *str = "abc  efg   hij";
  string_compress(str);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <string_compress@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xee9(%rip),%rdi
jmp    1030 <string_compress@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"abc efg hij\00"
define void @main() {
%1 = alloca i8*
store i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = call i32 @string_compress(i8* %2)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"abc efg hij\00"
define void @main() {
%1 = tail call i32 @string_compress(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct iter {
  int dummy;
};

/* Variables and functions */
scalar_t__ tree_album_selected();
int tree_track_get_prev_by_album(struct iter *);
int tree_track_get_prev_by_artist(struct iter *);
int tree_track_get_prev(struct iter *iter) {
  if (tree_album_selected())
    return tree_track_get_prev_by_album(iter);
  else
    return tree_track_get_prev_by_artist(iter);
}


x86 assembly (clang, -O0):
<tree_track_get_prev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <tree_album_selected@plt>
cmp    $0x0,%rax
je     115e <tree_track_get_prev+0x2e>
mov    -0x10(%rbp),%rdi
call   1040 <tree_track_get_prev_by_album@plt>
mov    %eax,-0x4(%rbp)
jmp    116a <tree_track_get_prev+0x3a>
mov    -0x10(%rbp),%rdi
call   1050 <tree_track_get_prev_by_artist@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tree_track_get_prev>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <tree_album_selected@plt>
mov    %rbx,%rdi
test   %rax,%rax
je     1149 <tree_track_get_prev+0x19>
pop    %rbx
jmp    1040 <tree_track_get_prev_by_album@plt>
pop    %rbx
jmp    1050 <tree_track_get_prev_by_artist@plt>

LLVM IR (-O0):
%struct.iter = type { i32 }
define i32 @tree_track_get_prev(%struct.iter* %0) {
%2 = alloca i32
%3 = alloca %struct.iter*
store %struct.iter* %0, %struct.iter** %3
%4 = call i64 (...) @tree_album_selected()
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load %struct.iter*, %struct.iter** %3
%8 = call i32 @tree_track_get_prev_by_album(%struct.iter* %7)
store i32 %8, i32* %2
br label %12
9: ; preds = %1
%10 = load %struct.iter*, %struct.iter** %3
%11 = call i32 @tree_track_get_prev_by_artist(%struct.iter* %10)
store i32 %11, i32* %2
br label %12
12: ; preds = %9, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
%struct.iter = type { i32 }
define i32 @tree_track_get_prev(%struct.iter* %0) {
%2 = tail call i64 (...) @tree_album_selected()
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @tree_track_get_prev_by_album(%struct.iter* %0)
br label %8
6: ; preds = %1
%7 = tail call i32 @tree_track_get_prev_by_artist(%struct.iter* %0)
br label %8
8: ; preds = %6, %4
%9 = phi i32 [ %5, %4 ], [ %7, %6 ]
ret i32 %9
}
/* Type definitions */
struct sockaddr_in {
  int /*<<< orphan*/ sin_addr;
};

/* Variables and functions */
int /*<<< orphan*/ inet_ntoa(int /*<<< orphan*/);
int /*<<< orphan*/ strncmp(int /*<<< orphan*/, char *, int);
int antp_validateAddr(struct sockaddr_in addr) {
  if (!strncmp(inet_ntoa(addr.sin_addr), "206.17.", 7))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<antp_validateAddr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <inet_ntoa@plt>
mov    %eax,%edi
lea    0xec4(%rip),%rsi
mov    $0x7,%edx
call   1030 <strncmp@plt>
cmp    $0x0,%eax
jne    115b <antp_validateAddr+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    1162 <antp_validateAddr+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<antp_validateAddr>:
push   %rax
call   1040 <inet_ntoa@plt>
lea    0xed3(%rip),%rsi
mov    %eax,%edi
mov    $0x7,%edx
call   1030 <strncmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.sockaddr_in = type { i32 }
@.str = [8 x i8] c"206.17.\00"
define i32 @antp_validateAddr(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.sockaddr_in
%4 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %3, i32 0, i32 0
store i32 %0, i32* %4
%5 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %3, i32 0, i32 0
%6 = load i32, i32* %5
%7 = call i32 @inet_ntoa(i32 %6)
%8 = call i32 @strncmp(i32 %7, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 7)
%9 = icmp ne i32 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %1
store i32 1, i32* %2
br label %12
11: ; preds = %1
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@.str = [8 x i8] c"206.17.\00"
define i32 @antp_validateAddr(i32 %0) {
%2 = tail call i32 @inet_ntoa(i32 %0)
%3 = tail call i32 @strncmp(i32 %2, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 7)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int volatile uint64_t;

/* Variables and functions */
uint64_t volatile_fetch_and_u64(volatile uint64_t *dest, uint64_t val) {
  uint64_t result = *dest;
  *dest = result & val;
  return result;
}


x86 assembly (clang, -O0):
<volatile_fetch_and_u64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%eax
and    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<volatile_fetch_and_u64>:
mov    %esi,-0x4(%rsp)
mov    (%rdi),%eax
mov    %eax,-0x8(%rsp)
mov    -0x8(%rsp),%eax
and    -0x4(%rsp),%eax
mov    %eax,(%rdi)
mov    -0x8(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @volatile_fetch_and_u64(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store volatile i32 %1, i32* %4
%6 = load i32*, i32** %3
%7 = load volatile i32, i32* %6
store volatile i32 %7, i32* %5
%8 = load volatile i32, i32* %5
%9 = load volatile i32, i32* %4
%10 = and i32 %8, %9
%11 = load i32*, i32** %3
store volatile i32 %10, i32* %11
%12 = load volatile i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @volatile_fetch_and_u64(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store volatile i32 %1, i32* %3
%5 = bitcast i32* %4 to i8*
%6 = load volatile i32, i32* %0
store volatile i32 %6, i32* %4
%7 = load volatile i32, i32* %4
%8 = load volatile i32, i32* %3
%9 = and i32 %8, %7
store volatile i32 %9, i32* %0
%10 = load volatile i32, i32* %4
ret i32 %10
}
void vec3_iaddk(float a[3], const float b[3], float k) {
  vec3_addk(a, b, k, a);
}


x86 assembly (clang, -O0):
<vec3_iaddk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movss  -0x14(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
mov    -0x8(%rbp),%rdx
mov    $0x1,%al
call   1030 <vec3_addk@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec3_iaddk>:
cvtss2sd %xmm0,%xmm0
mov    %rdi,%rdx
mov    $0x1,%al
jmp    1030 <vec3_addk@plt>

LLVM IR (-O0):
define void @vec3_iaddk(float* %0, float* %1, float %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float
store float* %0, float** %4
store float* %1, float** %5
store float %2, float* %6
%7 = load float*, float** %4
%8 = load float*, float** %5
%9 = load float, float* %6
%10 = fpext float %9 to double
%11 = load float*, float** %4
%12 = call i32 (float*, float*, double, float*, ...) bitcast (i32 (...)* @vec3_addk to i32 (float*, float*, double, float*, ...)*)(float* %7, float* %8, double %10, float* %11)
ret void
}

LLVM IR (-O2):
define void @vec3_iaddk(float* %0, float* %1, float %2) {
%4 = fpext float %2 to double
%5 = tail call i32 (float*, float*, double, float*, ...) bitcast (i32 (...)* @vec3_addk to i32 (float*, float*, double, float*, ...)*)(float* %0, float* %1, double %4, float* %0)
ret void
}
const char *minimum_size_type(int lwr, int upr) { return "integer"; }


x86 assembly (clang, -O0):
<minimum_size_type>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    0xeef(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<minimum_size_type>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [8 x i8] c"integer\00"
define i8* @minimum_size_type(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [8 x i8] c"integer\00"
define i8* @minimum_size_type(i32 %0, i32 %1) {
ret i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct v4l_fd {
  int dummy;
};
struct v4l2_capability {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ VIDIOC_QUERYCAP;
int v4l_ioctl(struct v4l_fd *, int /*<<< orphan*/, struct v4l2_capability *);
int v4l_querycap(struct v4l_fd *f, struct v4l2_capability *cap) {
  return v4l_ioctl(f, VIDIOC_QUERYCAP, cap);
}


x86 assembly (clang, -O0):
<v4l_querycap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ead(%rip),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rdx
call   1030 <v4l_ioctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<v4l_querycap>:
mov    %rsi,%rdx
mov    0x2ebe(%rip),%rax
mov    (%rax),%esi
jmp    1030 <v4l_ioctl@plt>

LLVM IR (-O0):
%struct.v4l_fd = type { i32 }
%struct.v4l2_capability = type { i32 }
@VIDIOC_QUERYCAP = global i32 0
define i32 @v4l_querycap(%struct.v4l_fd* %0, %struct.v4l2_capability* %1) {
%3 = alloca %struct.v4l_fd*
%4 = alloca %struct.v4l2_capability*
store %struct.v4l_fd* %0, %struct.v4l_fd** %3
store %struct.v4l2_capability* %1, %struct.v4l2_capability** %4
%5 = load %struct.v4l_fd*, %struct.v4l_fd** %3
%6 = load i32, i32* @VIDIOC_QUERYCAP
%7 = load %struct.v4l2_capability*, %struct.v4l2_capability** %4
%8 = call i32 @v4l_ioctl(%struct.v4l_fd* %5, i32 %6, %struct.v4l2_capability* %7)
ret i32 %8
}

LLVM IR (-O2):
%struct.v4l_fd = type { i32 }
%struct.v4l2_capability = type { i32 }
@VIDIOC_QUERYCAP = global i32 0
define i32 @v4l_querycap(%struct.v4l_fd* %0, %struct.v4l2_capability* %1) {
%3 = load i32, i32* @VIDIOC_QUERYCAP
%4 = tail call i32 @v4l_ioctl(%struct.v4l_fd* %0, i32 %3, %struct.v4l2_capability* %1)
ret i32 %4
}
void rop3_103_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = T | S;
  stk3 = ~stk3;
  stk2 = *D | stk3;
  stk1 = S ^ stk2;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_103_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0x9(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xd(%rbp)
movzbl -0xd(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_103_0_0>:
or     %esi,%edx
not    %dl
or     (%rdi),%dl
xor    %sil,%dl
mov    %dl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_103_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %6
%11 = zext i8 %10 to i32
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %9
%16 = load i8, i8* %9
%17 = zext i8 %16 to i32
%18 = xor i32 %17, -1
%19 = trunc i32 %18 to i8
store i8 %19, i8* %9
%20 = load i8*, i8** %4
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = load i8, i8* %9
%24 = zext i8 %23 to i32
%25 = or i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %8
%27 = load i8, i8* %5
%28 = zext i8 %27 to i32
%29 = load i8, i8* %8
%30 = zext i8 %29 to i32
%31 = xor i32 %28, %30
%32 = trunc i32 %31 to i8
store i8 %32, i8* %7
%33 = load i8, i8* %7
%34 = load i8*, i8** %4
store i8 %33, i8* %34
ret void
}

LLVM IR (-O2):
define void @rop3_103_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = or i8 %2, %1
%5 = xor i8 %4, -1
%6 = load i8, i8* %0
%7 = or i8 %6, %5
%8 = xor i8 %7, %1
store i8 %8, i8* %0
ret void
}
void INT_Excep_MTU2_TGIV2(void) {}


x86 assembly (clang, -O0):
<INT_Excep_MTU2_TGIV2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_MTU2_TGIV2>:
ret

LLVM IR (-O0):
define void @INT_Excep_MTU2_TGIV2() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_MTU2_TGIV2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LDA_();
int /*<<< orphan*/ c64_memZero();
void LDA_zp(void) {
  c64_memZero();
  LDA_();
}


x86 assembly (clang, -O0):
<LDA_zp>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <c64_memZero@plt>
mov    $0x0,%al
call   1040 <LDA_@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LDA_zp>:
push   %rax
xor    %eax,%eax
call   1030 <c64_memZero@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <LDA_@plt>

LLVM IR (-O0):
define void @LDA_zp() {
%1 = call i32 (...) @c64_memZero()
%2 = call i32 (...) @LDA_()
ret void
}

LLVM IR (-O2):
define void @LDA_zp() {
%1 = tail call i32 (...) @c64_memZero()
%2 = tail call i32 (...) @LDA_()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0xbf() {
  Assert_real((isspace(191) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              960, ("isspace should be 0 for 0xbf"));
}


x86 assembly (clang, -O0):
<t_isspace_0xbf>:
push   %rbp
mov    %rsp,%rbp
mov    $0xbf,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3c0,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0xbf>:
push   %rax
mov    $0xbf,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3c0,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0xbf\00"
define void @t_isspace_0xbf() {
%1 = call i64 @isspace(i32 191)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 960, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0xbf\00"
define void @t_isspace_0xbf() {
%1 = tail call i64 @isspace(i32 191)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 960, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}