#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ t_error(char *);
double ran1(long *idum) {
  static long ix1, ix2, ix3;
  static double r[98];
  double temp;
  static long iff;
  long j;
  if (*idum < 0 || iff == 0) {
    iff = 1;
    ix1 = (54773 - (*idum)) % 259200;
    ix1 = (7141 * ix1 + 54773) % 259200;
    ix2 = ix1 % 134456;
    ix1 = (7141 * ix1 + 54773) % 259200;
    ix3 = ix1 % 243200;
    for (j = 0; j <= 96; j++) {
      ix1 = (7141 * ix1 + 54773) % 259200;
      ix2 = (8121 * ix2 + 28411) % 134456;
      r[j] = (ix1 + ix2 * (1.0 / 134456)) * (1.0 / 259200);
    }
    *idum = 1;
  }
  ix1 = (7141 * ix1 + 54773) % 259200;
  ix2 = (8121 * ix2 + 28411) % 134456;
  ix3 = (4561 * ix3 + 51349) % 243200;
  j = 1 + ((96 * ix3) / 243200);
  if (j > 96 || j < 0)
    t_error("This cannot happen.");
  temp = r[j];
  r[j] = (ix1 + ix2 * (1.0 / 134456)) * (1.0 / 259200);
  return temp;
}


x86 assembly (clang, -O0):
<ran1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
jl     1138 <ran1+0x28>
cmpq   $0x0,0x323e(%rip)
jne    1285 <ran1+0x175>
movq   $0x1,0x322d(%rip)
mov    -0x8(%rbp),%rcx
mov    $0xd5f5,%eax
sub    (%rcx),%rax
mov    $0x3f480,%ecx
cqto
idiv   %rcx
mov    %rdx,0x2ee0(%rip)
imul   $0x1be5,0x2ed5(%rip),%rax
add    $0xd5f5,%rax
mov    $0x3f480,%ecx
cqto
idiv   %rcx
mov    %rdx,0x2ebe(%rip)
mov    0x2eb7(%rip),%rax
mov    $0x20d38,%ecx
cqto
idiv   %rcx
mov    %rdx,0x2eae(%rip)
imul   $0x1be5,0x2e9b(%rip),%rax
add    $0xd5f5,%rax
mov    $0x3f480,%ecx
cqto
idiv   %rcx
mov    %rdx,0x2e84(%rip)
mov    0x2e7d(%rip),%rax
mov    $0x3b600,%ecx
cqto
idiv   %rcx
mov    %rdx,0x2e7c(%rip)
movq   $0x0,-0x18(%rbp)
cmpq   $0x60,-0x18(%rbp)
jg     127a <ran1+0x16a>
imul   $0x1be5,0x2e4e(%rip),%rax
add    $0xd5f5,%rax
mov    $0x3f480,%ecx
cqto
idiv   %rcx
mov    %rdx,0x2e37(%rip)
imul   $0x1fb9,0x2e34(%rip),%rax
add    $0x6efb,%rax
mov    $0x20d38,%ecx
cqto
idiv   %rcx
mov    %rdx,0x2e1d(%rip)
cvtsi2sdq 0x2e0c(%rip),%xmm1
cvtsi2sdq 0x2e0b(%rip),%xmm0
movsd  0xdc3(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xdab(%rip),%xmm1
mulsd  %xmm1,%xmm0
mov    -0x18(%rbp),%rcx
lea    0x2dfc(%rip),%rax
movsd  %xmm0,(%rax,%rcx,8)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    11dc <ran1+0xcc>
mov    -0x8(%rbp),%rax
movq   $0x1,(%rax)
imul   $0x1be5,0x2db0(%rip),%rax
add    $0xd5f5,%rax
mov    $0x3f480,%ecx
cqto
idiv   %rcx
mov    %rdx,0x2d99(%rip)
imul   $0x1fb9,0x2d96(%rip),%rax
add    $0x6efb,%rax
mov    $0x20d38,%ecx
cqto
idiv   %rcx
mov    %rdx,0x2d7f(%rip)
imul   $0x11d1,0x2d7c(%rip),%rax
add    $0xc895,%rax
mov    $0x3b600,%ecx
cqto
idiv   %rcx
mov    %rdx,0x2d65(%rip)
imul   $0x60,0x2d5d(%rip),%rax
60
mov    $0x3b600,%ecx
cqto
idiv   %rcx
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x60,-0x18(%rbp)
jg     131b <ran1+0x20b>
cmpq   $0x0,-0x18(%rbp)
jge    1327 <ran1+0x217>
lea    0xcee(%rip),%rdi
call   1030 <t_error@plt>
mov    -0x18(%rbp),%rcx
lea    0x2d2e(%rip),%rax
movsd  (%rax,%rcx,8),%xmm0
movsd  %xmm0,-0x10(%rbp)
cvtsi2sdq 0x2cfb(%rip),%xmm1
cvtsi2sdq 0x2cfa(%rip),%xmm0
movsd  0xcb2(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xc9a(%rip),%xmm1
mulsd  %xmm1,%xmm0
mov    -0x18(%rbp),%rcx
lea    0x2ceb(%rip),%rax
movsd  %xmm0,(%rax,%rcx,8)
movsd  -0x10(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ran1>:
push   %r14
push   %rbx
push   %rax
mov    (%rdi),%rax
movabs $0x81742e044c5b8725,%r9
2e 74 81
movabs $0x1f31d2b36647fc39,%r8
d2 31 1f
test   %rax,%rax
js     1153 <ran1+0x43>
testb  $0x1,0x3239(%rip)
je     1153 <ran1+0x43>
mov    0x2f00(%rip),%rsi
mov    0x2f01(%rip),%rcx
mov    0x2f02(%rip),%r10
jmp    12ec <ran1+0x1dc>
movb   $0x1,0x3216(%rip)
mov    $0xd5f5,%ecx
sub    %rax,%rcx
mov    %rcx,%rax
imul   %r9
add    %rcx,%rdx
mov    %rdx,%rax
shr    $0x3f,%rax
shr    $0x11,%rdx
add    %eax,%edx
imul   $0x3f480,%edx,%eax
sub    %eax,%ecx
imul   $0x1be5,%ecx,%eax
mov    %eax,%ecx
add    $0xd5f5,%ecx
movslq %ecx,%rcx
imul   $0xffffffff81742e05,%rcx,%rdx
shr    $0x20,%rdx
add    %edx,%eax
add    $0xd5f5,%eax
mov    %eax,%edx
shr    $0x1f,%edx
sar    $0x11,%eax
add    %edx,%eax
imul   $0x3f480,%eax,%eax
sub    %eax,%ecx
movslq %ecx,%rax
imul   $0x3e63a567,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rcx
sar    $0xf,%ecx
add    %edx,%ecx
imul   $0x20d38,%ecx,%ecx
imul   $0x1be5,%eax,%edx
sub    %ecx,%eax
movslq %eax,%rcx
mov    %edx,%eax
add    $0xd5f5,%eax
cltq
imul   $0xffffffff81742e05,%rax,%rsi
shr    $0x20,%rsi
add    %esi,%edx
add    $0xd5f5,%edx
mov    %edx,%esi
shr    $0x1f,%esi
sar    $0x11,%edx
add    %esi,%edx
imul   $0x3f480,%edx,%edx
sub    %edx,%eax
movslq %eax,%rsi
imul   $0x44fc3a35,%rsi,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x30,%rax
add    %edx,%eax
imul   $0x3b600,%eax,%eax
mov    %esi,%edx
sub    %eax,%edx
movslq %edx,%r10
xor    %r11d,%r11d
movsd  0xdc3(%rip),%xmm0
movsd  0xdc3(%rip),%xmm1
lea    0x2e14(%rip),%r14
nopl   0x0(%rax)
imul   $0x1be5,%rsi,%rbx
lea    0xd5f5(%rbx),%rsi
mov    %rsi,%rax
imul   %r9
lea    (%rdx,%rbx,1),%rax
add    $0xd5f5,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x11,%rax
add    %rdx,%rax
imul   $0x3f480,%rax,%rbx
imul   $0x1fb9,%rcx,%rcx
add    $0x6efb,%rcx
mov    %rcx,%rax
imul   %r8
sub    %rbx,%rsi
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0xe,%rdx
add    %rax,%rdx
imul   $0x20d38,%rdx,%rax
sub    %rax,%rcx
xorps  %xmm2,%xmm2
cvtsi2sd %rsi,%xmm2
xorps  %xmm3,%xmm3
cvtsi2sd %rcx,%xmm3
mulsd  %xmm0,%xmm3
addsd  %xmm2,%xmm3
mulsd  %xmm1,%xmm3
movsd  %xmm3,(%r11,%r14,1)
add    $0x8,%r11
cmp    $0x308,%r11
jne    1250 <ran1+0x140>
movq   $0x1,(%rdi)
imul   $0x1be5,%rsi,%rdi
lea    0xd5f5(%rdi),%rsi
mov    %rsi,%rax
imul   %r9
lea    (%rdx,%rdi,1),%rax
add    $0xd5f5,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x11,%rax
add    %rdx,%rax
imul   $0x3f480,%rax,%rax
sub    %rax,%rsi
mov    %rsi,0x2d17(%rip)
imul   $0x1fb9,%rcx,%rcx
add    $0x6efb,%rcx
mov    %rcx,%rax
imul   %r8
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0xe,%rdx
add    %rax,%rdx
imul   $0x20d38,%rdx,%rax
sub    %rax,%rcx
mov    %rcx,0x2cec(%rip)
imul   $0x11d1,%r10,%rbx
lea    0xc895(%rbx),%rdi
movabs $0x89f87469a23920e1,%rdx
74 f8 89
mov    %rdi,%rax
imul   %rdx
lea    (%rdx,%rbx,1),%rax
add    $0xc895,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x11,%rax
add    %rdx,%rax
imul   $0x3b600,%rax,%rax
sub    %rax,%rdi
mov    %rdi,0x2cad(%rip)
shl    $0x5,%rdi
lea    (%rdi,%rdi,2),%rbx
cmp    $0xfffffffffff89400,%rbx
jg     13ce <ran1+0x2be>
lea    0xc55(%rip),%rdi
call   1030 <t_error@plt>
mov    0x2c79(%rip),%rsi
mov    0x2c7a(%rip),%rcx
movslq %ebx,%rax
imul   $0x44fc3a35,%rax,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x30,%rax
add    %edx,%eax
cltq
lea    0x2c72(%rip),%rdx
movsd  0x8(%rdx,%rax,8),%xmm0
cvtsi2sd %rsi,%xmm1
xorps  %xmm2,%xmm2
cvtsi2sd %rcx,%xmm2
mulsd  0xbf7(%rip),%xmm2
addsd  %xmm1,%xmm2
mulsd  0xbf3(%rip),%xmm2
movsd  %xmm2,0x8(%rdx,%rax,8)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@ran1.ix1 = internal global i64 0
@ran1.ix2 = internal global i64 0
@ran1.ix3 = internal global i64 0
@ran1.r = internal global [98 x double] zeroinitializer
@ran1.iff = internal global i64 0
@.str = [20 x i8] c"This cannot happen.\00"
define double @ran1(i64* %0) {
%2 = alloca i64*
%3 = alloca double
%4 = alloca i64
store i64* %0, i64** %2
%5 = load i64*, i64** %2
%6 = load i64, i64* %5
%7 = icmp slt i64 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %1
%9 = load i64, i64* @ran1.iff
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %53
11: ; preds = %8, %1
store i64 1, i64* @ran1.iff
%12 = load i64*, i64** %2
%13 = load i64, i64* %12
%14 = sub nsw i64 54773, %13
%15 = srem i64 %14, 259200
store i64 %15, i64* @ran1.ix1
%16 = load i64, i64* @ran1.ix1
%17 = mul nsw i64 7141, %16
%18 = add nsw i64 %17, 54773
%19 = srem i64 %18, 259200
store i64 %19, i64* @ran1.ix1
%20 = load i64, i64* @ran1.ix1
%21 = srem i64 %20, 134456
store i64 %21, i64* @ran1.ix2
%22 = load i64, i64* @ran1.ix1
%23 = mul nsw i64 7141, %22
%24 = add nsw i64 %23, 54773
%25 = srem i64 %24, 259200
store i64 %25, i64* @ran1.ix1
%26 = load i64, i64* @ran1.ix1
%27 = srem i64 %26, 243200
store i64 %27, i64* @ran1.ix3
store i64 0, i64* %4
br label %28
28: ; preds = %48, %11
%29 = load i64, i64* %4
%30 = icmp sle i64 %29, 96
br i1 %30, label %31, label %51
31: ; preds = %28
%32 = load i64, i64* @ran1.ix1
%33 = mul nsw i64 7141, %32
%34 = add nsw i64 %33, 54773
%35 = srem i64 %34, 259200
store i64 %35, i64* @ran1.ix1
%36 = load i64, i64* @ran1.ix2
%37 = mul nsw i64 8121, %36
%38 = add nsw i64 %37, 28411
%39 = srem i64 %38, 134456
store i64 %39, i64* @ran1.ix2
%40 = load i64, i64* @ran1.ix1
%41 = sitofp i64 %40 to double
%42 = load i64, i64* @ran1.ix2
%43 = sitofp i64 %42 to double
%44 = call double @llvm.fmuladd.f64(double %43, double 0x3EDF31D2B36647FC, double %41)
%45 = fmul double %44, 0x3ED02E85C0898B71
%46 = load i64, i64* %4
%47 = getelementptr inbounds [98 x double], [98 x double]* @ran1.r, i64 0, i64 %46
store double %45, double* %47
br label %48
48: ; preds = %31
%49 = load i64, i64* %4
%50 = add nsw i64 %49, 1
store i64 %50, i64* %4
br label %28
51: ; preds = %28
%52 = load i64*, i64** %2
store i64 1, i64* %52
br label %53
53: ; preds = %51, %8
%54 = load i64, i64* @ran1.ix1
%55 = mul nsw i64 7141, %54
%56 = add nsw i64 %55, 54773
%57 = srem i64 %56, 259200
store i64 %57, i64* @ran1.ix1
%58 = load i64, i64* @ran1.ix2
%59 = mul nsw i64 8121, %58
%60 = add nsw i64 %59, 28411
%61 = srem i64 %60, 134456
store i64 %61, i64* @ran1.ix2
%62 = load i64, i64* @ran1.ix3
%63 = mul nsw i64 4561, %62
%64 = add nsw i64 %63, 51349
%65 = srem i64 %64, 243200
store i64 %65, i64* @ran1.ix3
%66 = load i64, i64* @ran1.ix3
%67 = mul nsw i64 96, %66
%68 = sdiv i64 %67, 243200
%69 = add nsw i64 1, %68
store i64 %69, i64* %4
%70 = load i64, i64* %4
%71 = icmp sgt i64 %70, 96
br i1 %71, label %75, label %72
72: ; preds = %53
%73 = load i64, i64* %4
%74 = icmp slt i64 %73, 0
br i1 %74, label %75, label %77
75: ; preds = %72, %53
%76 = call i32 @t_error(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
br label %77
77: ; preds = %75, %72
%78 = load i64, i64* %4
%79 = getelementptr inbounds [98 x double], [98 x double]* @ran1.r, i64 0, i64 %78
%80 = load double, double* %79
store double %80, double* %3
%81 = load i64, i64* @ran1.ix1
%82 = sitofp i64 %81 to double
%83 = load i64, i64* @ran1.ix2
%84 = sitofp i64 %83 to double
%85 = call double @llvm.fmuladd.f64(double %84, double 0x3EDF31D2B36647FC, double %82)
%86 = fmul double %85, 0x3ED02E85C0898B71
%87 = load i64, i64* %4
%88 = getelementptr inbounds [98 x double], [98 x double]* @ran1.r, i64 0, i64 %87
store double %86, double* %88
%89 = load double, double* %3
ret double %89
}

LLVM IR (-O2):
@ran1.ix1 = internal unnamed_addr global i64 0
@ran1.ix2 = internal unnamed_addr global i64 0
@ran1.ix3 = internal unnamed_addr global i64 0
@ran1.r = internal unnamed_addr global [98 x double] zeroinitializer
@ran1.iff = internal unnamed_addr global i1 false
@.str = [20 x i8] c"This cannot happen.\00"
define double @ran1(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = icmp slt i64 %2, 0
%4 = load i1, i1* @ran1.iff
%5 = xor i1 %4, true
%6 = select i1 %3, i1 true, i1 %5
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load i64, i64* @ran1.ix1
%9 = load i64, i64* @ran1.ix2
%10 = load i64, i64* @ran1.ix3
br label %44
11: ; preds = %1
store i1 true, i1* @ran1.iff
%12 = sub nsw i64 54773, %2
%13 = srem i64 %12, 259200
%14 = trunc i64 %13 to i32
%15 = mul nsw i32 %14, 7141
%16 = add nsw i32 %15, 54773
%17 = srem i32 %16, 259200
%18 = srem i32 %17, 134456
%19 = sext i32 %18 to i64
%20 = mul nsw i32 %17, 7141
%21 = add nsw i32 %20, 54773
%22 = srem i32 %21, 259200
%23 = sext i32 %22 to i64
%24 = srem i32 %22, 243200
%25 = sext i32 %24 to i64
br label %26
26: ; preds = %11, %26
%27 = phi i64 [ 0, %11 ], [ %41, %26 ]
%28 = phi i64 [ %23, %11 ], [ %32, %26 ]
%29 = phi i64 [ %19, %11 ], [ %35, %26 ]
%30 = mul nsw i64 %28, 7141
%31 = add nsw i64 %30, 54773
%32 = srem i64 %31, 259200
%33 = mul nsw i64 %29, 8121
%34 = add nsw i64 %33, 28411
%35 = srem i64 %34, 134456
%36 = sitofp i64 %32 to double
%37 = sitofp i64 %35 to double
%38 = tail call double @llvm.fmuladd.f64(double %37, double 0x3EDF31D2B36647FC, double %36)
%39 = fmul double %38, 0x3ED02E85C0898B71
%40 = getelementptr inbounds [98 x double], [98 x double]* @ran1.r, i64 0, i64 %27
store double %39, double* %40
%41 = add nuw nsw i64 %27, 1
%42 = icmp eq i64 %41, 97
br i1 %42, label %43, label %26
43: ; preds = %26
store i64 1, i64* %0
br label %44
44: ; preds = %7, %43
%45 = phi i64 [ %10, %7 ], [ %25, %43 ]
%46 = phi i64 [ %9, %7 ], [ %35, %43 ]
%47 = phi i64 [ %8, %7 ], [ %32, %43 ]
%48 = mul nsw i64 %47, 7141
%49 = add nsw i64 %48, 54773
%50 = srem i64 %49, 259200
store i64 %50, i64* @ran1.ix1
%51 = mul nsw i64 %46, 8121
%52 = add nsw i64 %51, 28411
%53 = srem i64 %52, 134456
store i64 %53, i64* @ran1.ix2
%54 = mul nsw i64 %45, 4561
%55 = add nsw i64 %54, 51349
%56 = srem i64 %55, 243200
store i64 %56, i64* @ran1.ix3
%57 = mul nsw i64 %56, 96
%58 = icmp slt i64 %57, -486399
br i1 %58, label %59, label %63
59: ; preds = %44
%60 = tail call i32 @t_error(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%61 = load i64, i64* @ran1.ix1
%62 = load i64, i64* @ran1.ix2
br label %63
63: ; preds = %44, %59
%64 = phi i64 [ %53, %44 ], [ %62, %59 ]
%65 = phi i64 [ %50, %44 ], [ %61, %59 ]
%66 = trunc i64 %57 to i32
%67 = sdiv i32 %66, 243200
%68 = add nsw i32 %67, 1
%69 = sext i32 %68 to i64
%70 = getelementptr inbounds [98 x double], [98 x double]* @ran1.r, i64 0, i64 %69
%71 = load double, double* %70
%72 = sitofp i64 %65 to double
%73 = sitofp i64 %64 to double
%74 = tail call double @llvm.fmuladd.f64(double %73, double 0x3EDF31D2B36647FC, double %72)
%75 = fmul double %74, 0x3ED02E85C0898B71
store double %75, double* %70
ret double %71
}