xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fs_close(int /*<<< orphan*/ *);
char *fs_fnread(int /*<<< orphan*/ *, int);
int /*<<< orphan*/ *fs_open(char const *, char *);
char *fs_nread(const char *path, int len) {
  FILE *file = fs_open(path, "r");
  if (NULL == file)
    return NULL;
  char *buffer = fs_fnread(file, len);
  fs_close(file);
  return buffer;
}


x86 assembly (clang, -O0):
<fs_nread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xeb6(%rip),%rsi
call   1030 <fs_open@plt>
mov    %rax,-0x20(%rbp)
xor    %eax,%eax
cmp    -0x20(%rbp),%rax
jne    116c <fs_nread+0x3c>
movq   $0x0,-0x8(%rbp)
jmp    118d <fs_nread+0x5d>
mov    -0x20(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1050 <fs_fnread@plt>
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rdi
call   1040 <fs_close@plt>
mov    -0x28(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fs_nread>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
lea    0xec4(%rip),%rsi
call   1030 <fs_open@plt>
test   %rax,%rax
je     1163 <fs_nread+0x33>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %ebp,%esi
call   1050 <fs_fnread@plt>
mov    %rax,%rbp
mov    %rbx,%rdi
call   1040 <fs_close@plt>
mov    %rbp,%rax
jmp    1165 <fs_nread+0x35>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [2 x i8] c"r\00"
define i8* @fs_nread(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
%8 = load i8*, i8** %4
%9 = call i32* @fs_open(i8* %8, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %9, i32** %6
%10 = load i32*, i32** %6
%11 = icmp eq i32* null, %10
br i1 %11, label %12, label %13
12: ; preds = %2
store i8* null, i8** %3
br label %20
13: ; preds = %2
%14 = load i32*, i32** %6
%15 = load i32, i32* %5
%16 = call i8* @fs_fnread(i32* %14, i32 %15)
store i8* %16, i8** %7
%17 = load i32*, i32** %6
%18 = call i32 @fs_close(i32* %17)
%19 = load i8*, i8** %7
store i8* %19, i8** %3
br label %20
20: ; preds = %13, %12
%21 = load i8*, i8** %3
ret i8* %21
}

LLVM IR (-O2):
@.str = [2 x i8] c"r\00"
define i8* @fs_nread(i8* %0, i32 %1) {
%3 = tail call i32* @fs_open(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i32* %3, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i8* @fs_fnread(i32* %3, i32 %1)
%7 = tail call i32 @fs_close(i32* %3)
br label %8
8: ; preds = %2, %5
%9 = phi i8* [ %6, %5 ], [ null, %2 ]
ret i8* %9
}
/* Type definitions */
struct g722_decode_state {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct g722_decode_state *);
int g722_decode_release(struct g722_decode_state *s) {
  free(s);
  return 0;
}


x86 assembly (clang, -O0):
<g722_decode_release>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g722_decode_release>:
push   %rax
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.g722_decode_state = type { i32 }
define i32 @g722_decode_release(%struct.g722_decode_state* %0) {
%2 = alloca %struct.g722_decode_state*
store %struct.g722_decode_state* %0, %struct.g722_decode_state** %2
%3 = load %struct.g722_decode_state*, %struct.g722_decode_state** %2
%4 = call i32 @free(%struct.g722_decode_state* %3)
ret i32 0
}

LLVM IR (-O2):
%struct.g722_decode_state = type { i32 }
define i32 @g722_decode_release(%struct.g722_decode_state* nocapture %0) {
%2 = tail call i32 @free(%struct.g722_decode_state* %0)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ status_bar_message_i(char *, int);
int /*<<< orphan*/ vsnprintf(char *, int, char const *, int /*<<< orphan*/);
void vstatus_bar_messagef(int error, const char format[], va_list ap) {
  char buf[1024];
  vsnprintf(buf, sizeof(buf), format, ap);
  status_bar_message_i(buf, error);
}


x86 assembly (clang, -O0):
<vstatus_bar_messagef>:
push   %rbp
mov    %rsp,%rbp
sub    $0x420,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
lea    -0x420(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0x400,%esi
call   1040 <vsnprintf@plt>
lea    -0x420(%rbp),%rdi
mov    -0x4(%rbp),%esi
call   1030 <status_bar_message_i@plt>
add    $0x420,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vstatus_bar_messagef>:
push   %r14
push   %rbx
sub    $0x408,%rsp
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%ebx
mov    %rsp,%r14
mov    %r14,%rdi
mov    $0x400,%esi
call   1040 <vsnprintf@plt>
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <status_bar_message_i@plt>
add    $0x408,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @vstatus_bar_messagef(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca [1024 x i8]
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = getelementptr inbounds [1024 x i8], [1024 x i8]* %7, i64 0, i64 0
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 @vsnprintf(i8* %8, i32 1024, i8* %9, i32 %10)
%12 = getelementptr inbounds [1024 x i8], [1024 x i8]* %7, i64 0, i64 0
%13 = load i32, i32* %4
%14 = call i32 @status_bar_message_i(i8* %12, i32 %13)
ret void
}

LLVM IR (-O2):
define void @vstatus_bar_messagef(i32 %0, i8* nocapture %1, i32 %2) {
%4 = alloca [1024 x i8]
%5 = getelementptr inbounds [1024 x i8], [1024 x i8]* %4, i64 0, i64 0
%6 = call i32 @vsnprintf(i8* %5, i32 1024, i8* %1, i32 %2)
%7 = call i32 @status_bar_message_i(i8* %5, i32 %0)
ret void
}
short pass_short(short arg) { return arg; }


x86 assembly (clang, -O0):
<pass_short>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pass_short>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i16 @pass_short(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
ret i16 %3
}

LLVM IR (-O2):
define signext i16 @pass_short(i16 returned signext %0) {
ret i16 %0
}
/* Variables and functions */
int /*<<< orphan*/ bug(int *);
int *malloc(int);
int main(int argc, char **argv) {
  int *array = malloc(4);
  bug(array);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <bug@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,%rdi
call   1030 <bug@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32*
store i32 %0, i32* %3
store i8** %1, i8*** %4
%6 = call i32* @malloc(i32 4)
store i32* %6, i32** %5
%7 = load i32*, i32** %5
%8 = call i32 @bug(i32* %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32* @malloc(i32 4)
%4 = tail call i32 @bug(i32* %3)
ret i32 0
}
unsigned int sax_hash(const char *key) {
  unsigned int h;
  h = 0;
  while (*key)
    h ^= (h << 5) + (h >> 2) + (unsigned char)*key++;
  return h;
}


x86 assembly (clang, -O0):
<sax_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1149 <sax_hash+0x49>
mov    -0xc(%rbp),%eax
shl    $0x5,%eax
mov    -0xc(%rbp),%ecx
shr    $0x2,%ecx
add    %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movzbl (%rcx),%ecx
add    %ecx,%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    110f <sax_hash+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sax_hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     112f <sax_hash+0x2f>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
mov    %eax,%edx
shl    $0x5,%edx
mov    %eax,%esi
shr    $0x2,%esi
add    %edx,%esi
movzbl %cl,%ecx
add    %esi,%ecx
xor    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <sax_hash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sax_hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %21
8: ; preds = %4
%9 = load i32, i32* %3
%10 = shl i32 %9, 5
%11 = load i32, i32* %3
%12 = lshr i32 %11, 2
%13 = add i32 %10, %12
%14 = load i8*, i8** %2
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %2
%16 = load i8, i8* %14
%17 = zext i8 %16 to i32
%18 = add i32 %13, %17
%19 = load i32, i32* %3
%20 = xor i32 %19, %18
store i32 %20, i32* %3
br label %4
21: ; preds = %4
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @sax_hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %17, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %15, %4 ], [ %2, %1 ]
%6 = phi i32 [ %14, %4 ], [ 0, %1 ]
%7 = phi i8* [ %11, %4 ], [ %0, %1 ]
%8 = shl i32 %6, 5
%9 = lshr i32 %6, 2
%10 = add i32 %8, %9
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = zext i8 %5 to i32
%13 = add i32 %10, %12
%14 = xor i32 %13, %6
%15 = load i8, i8* %11
%16 = icmp eq i8 %15, 0
br i1 %16, label %17, label %4
17: ; preds = %4, %1
%18 = phi i32 [ 0, %1 ], [ %14, %4 ]
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void colore_tela(void) { printf("\033[44m\033[2J\033[H"); }


x86 assembly (clang, -O0):
<colore_tela>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<colore_tela>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"\1B[44m\1B[2J\1B[H\00"
define void @colore_tela() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"\1B[44m\1B[2J\1B[H\00"
define void @colore_tela() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *);
int /*<<< orphan*/ debug_flush();
int /*<<< orphan*/ hal_wdt_init();
void wdt_init(void) {
  debug("wdt: init\n");
  debug_flush();
  hal_wdt_init();
}


x86 assembly (clang, -O0):
<wdt_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xec5(%rip),%rdi
call   1040 <debug@plt>
mov    $0x0,%al
call   1030 <debug_flush@plt>
mov    $0x0,%al
call   1050 <hal_wdt_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wdt_init>:
push   %rax
lea    0xec8(%rip),%rdi
call   1040 <debug@plt>
xor    %eax,%eax
call   1030 <debug_flush@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <hal_wdt_init@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"wdt: init\0A\00"
define void @wdt_init() {
%1 = call i32 @debug(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @debug_flush()
%3 = call i32 (...) @hal_wdt_init()
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"wdt: init\0A\00"
define void @wdt_init() {
%1 = tail call i32 @debug(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @debug_flush()
%3 = tail call i32 (...) @hal_wdt_init()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __fpurge(int /*<<< orphan*/);
int scanf(char *, int *);
int /*<<< orphan*/ stdin;
void readInt1(int *variableAddress) {
  bool ret;
  do {
    ret = scanf("\n%d", variableAddress);
    __fpurge(stdin);
  } while (ret != true);
}


x86 assembly (clang, -O0):
<readInt1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1040 <scanf@plt>
mov    %eax,-0xc(%rbp)
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
call   1030 <__fpurge@plt>
cmpl   $0x1,-0xc(%rbp)
jne    112c <readInt1+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readInt1>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
lea    0xecf(%rip),%r14
mov    0x2eb0(%rip),%r15
nopl   0x0(%rax,%rax,1)
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <scanf@plt>
mov    %eax,%ebp
mov    (%r15),%edi
call   1030 <__fpurge@plt>
cmp    $0x1,%ebp
jne    1140 <readInt1+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@.str = [4 x i8] c"\0A%d\00"
@stdin = global i32 0
define void @readInt1(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
br label %4
4: ; preds = %9, %1
%5 = load i32*, i32** %2
%6 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32* %5)
store i32 %6, i32* %3
%7 = load i32, i32* @stdin
%8 = call i32 @__fpurge(i32 %7)
br label %9
9: ; preds = %4
%10 = load i32, i32* %3
%11 = icmp ne i32 %10, 1
br i1 %11, label %4, label %12
12: ; preds = %9
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"\0A%d\00"
@stdin = global i32 0
define void @readInt1(i32* %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32* %0)
%4 = load i32, i32* @stdin
%5 = tail call i32 @__fpurge(i32 %4)
%6 = icmp eq i32 %3, 1
br i1 %6, label %7, label %2
7: ; preds = %2
ret void
}
int test_01(short tab[], int index) { return tab[index + 1]; }


x86 assembly (clang, -O0):
<test_01>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
movswl (%rax,%rcx,2),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_01>:
movslq %esi,%rax
movswl 0x2(%rdi,%rax,2),%eax
ret

LLVM IR (-O0):
define i32 @test_01(i16* %0, i32 %1) {
%3 = alloca i16*
%4 = alloca i32
store i16* %0, i16** %3
store i32 %1, i32* %4
%5 = load i16*, i16** %3
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 1
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i16, i16* %5, i64 %8
%10 = load i16, i16* %9
%11 = sext i16 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @test_01(i16* nocapture %0, i32 %1) {
%3 = add nsw i32 %1, 1
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i16, i16* %0, i64 %4
%6 = load i16, i16* %5
%7 = sext i16 %6 to i32
ret i32 %7
}
int test_imm_50uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x50 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_50uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x50,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_50uint64_lowword_reg>:
test   $0x50,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_50uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 80
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_50uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 80
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct ln_rst_time {
  int dummy;
};
struct ln_lnlat_posn {
  int dummy;
};
struct ln_hyp_orbit {
  int dummy;
};

/* Variables and functions */
int ln_get_hyp_body_next_rst_horizon(double, struct ln_lnlat_posn *,
                                     struct ln_hyp_orbit *, double,
                                     struct ln_rst_time *);
int ln_get_hyp_body_next_rst(double JD, struct ln_lnlat_posn *observer,
                             struct ln_hyp_orbit *orbit,
                             struct ln_rst_time *rst) {
  return ln_get_hyp_body_next_rst_horizon(JD, observer, orbit, -0.5667, rst);
}


x86 assembly (clang, -O0):
<ln_get_hyp_body_next_rst>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
movsd  0xebe(%rip),%xmm1
call   1030 <ln_get_hyp_body_next_rst_horizon@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ln_get_hyp_body_next_rst>:
movsd  0xee8(%rip),%xmm1
jmp    1030 <ln_get_hyp_body_next_rst_horizon@plt>

LLVM IR (-O0):
%struct.ln_lnlat_posn = type { i32 }
%struct.ln_hyp_orbit = type { i32 }
%struct.ln_rst_time = type { i32 }
define i32 @ln_get_hyp_body_next_rst(double %0, %struct.ln_lnlat_posn* %1, %struct.ln_hyp_orbit* %2, %struct.ln_rst_time* %3) {
%5 = alloca double
%6 = alloca %struct.ln_lnlat_posn*
%7 = alloca %struct.ln_hyp_orbit*
%8 = alloca %struct.ln_rst_time*
store double %0, double* %5
store %struct.ln_lnlat_posn* %1, %struct.ln_lnlat_posn** %6
store %struct.ln_hyp_orbit* %2, %struct.ln_hyp_orbit** %7
store %struct.ln_rst_time* %3, %struct.ln_rst_time** %8
%9 = load double, double* %5
%10 = load %struct.ln_lnlat_posn*, %struct.ln_lnlat_posn** %6
%11 = load %struct.ln_hyp_orbit*, %struct.ln_hyp_orbit** %7
%12 = load %struct.ln_rst_time*, %struct.ln_rst_time** %8
%13 = call i32 @ln_get_hyp_body_next_rst_horizon(double %9, %struct.ln_lnlat_posn* %10, %struct.ln_hyp_orbit* %11, double -5.667000e-01, %struct.ln_rst_time* %12)
ret i32 %13
}

LLVM IR (-O2):
%struct.ln_lnlat_posn = type { i32 }
%struct.ln_hyp_orbit = type { i32 }
%struct.ln_rst_time = type { i32 }
define i32 @ln_get_hyp_body_next_rst(double %0, %struct.ln_lnlat_posn* %1, %struct.ln_hyp_orbit* %2, %struct.ln_rst_time* %3) {
%5 = tail call i32 @ln_get_hyp_body_next_rst_horizon(double %0, %struct.ln_lnlat_posn* %1, %struct.ln_hyp_orbit* %2, double -5.667000e-01, %struct.ln_rst_time* %3)
ret i32 %5
}
int call_ptr(int(func)(void)) { return func() + 1; }


x86 assembly (clang, -O0):
<call_ptr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
call   *-0x8(%rbp)
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_ptr>:
push   %rax
call   *%rdi
add    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @call_ptr(i32 ()* %0) {
%2 = alloca i32 ()*
store i32 ()* %0, i32 ()** %2
%3 = load i32 ()*, i32 ()** %2
%4 = call i32 %3()
%5 = add nsw i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @call_ptr(i32 ()* nocapture %0) {
%2 = tail call i32 %0()
%3 = add nsw i32 %2, 1
ret i32 %3
}
int get_sysctl_sched_cfs_boost(void) { return 0; }


x86 assembly (clang, -O0):
<get_sysctl_sched_cfs_boost>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_sysctl_sched_cfs_boost>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_sysctl_sched_cfs_boost() {
ret i32 0
}

LLVM IR (-O2):
define i32 @get_sysctl_sched_cfs_boost() {
ret i32 0
}
double T(unsigned int k, double x) {
  switch (k) {
  case 0:
    return 1;
  case 1:
    return x;
  }
  return 2 * x * T(k - 1, x) - T(k - 2, x);
}


x86 assembly (clang, -O0):
<T>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0xc(%rbp)
movsd  %xmm0,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
test   %eax,%eax
je     1144 <T+0x34>
jmp    1133 <T+0x23>
mov    -0x1c(%rbp),%eax
sub    $0x1,%eax
je     1156 <T+0x46>
jmp    1165 <T+0x55>
movsd  0xeb4(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    11cd <T+0xbd>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    11cd <T+0xbd>
movsd  0xe9b(%rip),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
mov    -0xc(%rbp),%edi
sub    $0x1,%edi
movsd  -0x18(%rbp),%xmm0
call   1030 <T@plt>
movsd  %xmm0,-0x30(%rbp)
mov    -0xc(%rbp),%edi
sub    $0x2,%edi
movsd  -0x18(%rbp),%xmm0
call   1030 <T@plt>
movsd  -0x30(%rbp),%xmm2
movaps %xmm0,%xmm1
movsd  -0x28(%rbp),%xmm0
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<T>:
push   %rbx
sub    $0x20,%rsp
test   %edi,%edi
je     1168 <T+0x58>
mov    %edi,%ebx
cmp    $0x1,%edi
je     1170 <T+0x60>
movapd %xmm0,%xmm1
addsd  %xmm0,%xmm1
movsd  %xmm1,0x18(%rsp)
lea    -0x1(%rbx),%edi
movsd  %xmm0,0x8(%rsp)
call   1030 <T@plt>
movsd  %xmm0,0x10(%rsp)
add    $0xfffffffe,%ebx
mov    %ebx,%edi
movsd  0x8(%rsp),%xmm0
call   1030 <T@plt>
movsd  0x10(%rsp),%xmm1
mulsd  0x18(%rsp),%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
jmp    1170 <T+0x60>
movsd  0xe90(%rip),%xmm0
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define double @T(i32 %0, double %1) {
%3 = alloca double
%4 = alloca i32
%5 = alloca double
store i32 %0, i32* %4
store double %1, double* %5
%6 = load i32, i32* %4
switch i32 %6, label %10 [
i32 0, label %7
i32 1, label %8
]
7: ; preds = %2
store double 1.000000e+00, double* %3
br label %23
8: ; preds = %2
%9 = load double, double* %5
store double %9, double* %3
br label %23
10: ; preds = %2
%11 = load double, double* %5
%12 = fmul double 2.000000e+00, %11
%13 = load i32, i32* %4
%14 = sub i32 %13, 1
%15 = load double, double* %5
%16 = call double @T(i32 %14, double %15)
%17 = load i32, i32* %4
%18 = sub i32 %17, 2
%19 = load double, double* %5
%20 = call double @T(i32 %18, double %19)
%21 = fneg double %20
%22 = call double @llvm.fmuladd.f64(double %12, double %16, double %21)
store double %22, double* %3
br label %23
23: ; preds = %10, %8, %7
%24 = load double, double* %3
ret double %24
}

LLVM IR (-O2):
define double @T(i32 %0, double %1) {
switch i32 %0, label %6 [
i32 0, label %4
i32 1, label %3
]
3: ; preds = %2
br label %4
4: ; preds = %3, %2, %6
%5 = phi double [ %13, %6 ], [ %1, %3 ], [ 1.000000e+00, %2 ]
ret double %5
6: ; preds = %2
%7 = fmul double %1, 2.000000e+00
%8 = add i32 %0, -1
%9 = tail call double @T(i32 %8, double %1)
%10 = add i32 %0, -2
%11 = tail call double @T(i32 %10, double %1)
%12 = fneg double %11
%13 = tail call double @llvm.fmuladd.f64(double %7, double %9, double %12)
br label %4
}
void fa86(int n) {
  {
    int b[n];
  a : {
    int c[n];
    0;
  }
    {
      int d[n];
      0;
    }
    goto a;
    ;
    int e[n];
    0;
  };
  {
    int f[n];
    {
      int g[n];
      0;
    };
    {
      int h[n];
      0;
    };
    ;
    int i[n];
    0;
  };
  ;
  int j[n];
  0;
}


x86 assembly (clang, -O0):
<fa86>:
push   %rbp
mov    %rsp,%rbp
sub    $0x90,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x10(%rbp)
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x20(%rbp)
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,%rsp
mov    -0x4(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x30(%rbp)
mov    %rax,-0x38(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,%rsp
jmp    111c <fa86+0x1c>

x86 assembly (clang, -O2):
<fa86>:
jmp    1100 <fa86>

LLVM IR (-O0):
define void @fa86(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i64
%10 = alloca i8*
%11 = alloca i64
%12 = alloca i8*
%13 = alloca i64
%14 = alloca i8*
%15 = alloca i64
%16 = alloca i64
%17 = alloca i8*
%18 = alloca i64
store i32 %0, i32* %2
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
%21 = call i8* @llvm.stacksave()
store i8* %21, i8** %3
%22 = alloca i32, i64 %20
store i64 %20, i64* %4
br label %23
23: ; preds = %23, %1
%24 = load i32, i32* %2
%25 = zext i32 %24 to i64
%26 = call i8* @llvm.stacksave()
store i8* %26, i8** %5
%27 = alloca i32, i64 %25
store i64 %25, i64* %6
%28 = load i8*, i8** %5
%29 = load i32, i32* %2
%30 = zext i32 %29 to i64
%31 = call i8* @llvm.stacksave()
store i8* %31, i8** %7
%32 = alloca i32, i64 %30
store i64 %30, i64* %8
%33 = load i8*, i8** %7
br label %23
34: ; No predecessors!
%35 = load i32, i32* %2
%36 = zext i32 %35 to i64
%37 = alloca i32, i64 %36
store i64 %36, i64* %9
%38 = load i8*, i8** %3
%39 = load i32, i32* %2
%40 = zext i32 %39 to i64
%41 = call i8* @llvm.stacksave()
store i8* %41, i8** %10
%42 = alloca i32, i64 %40
store i64 %40, i64* %11
%43 = load i32, i32* %2
%44 = zext i32 %43 to i64
%45 = call i8* @llvm.stacksave()
store i8* %45, i8** %12
%46 = alloca i32, i64 %44
store i64 %44, i64* %13
%47 = load i8*, i8** %12
%48 = load i32, i32* %2
%49 = zext i32 %48 to i64
%50 = call i8* @llvm.stacksave()
store i8* %50, i8** %14
%51 = alloca i32, i64 %49
store i64 %49, i64* %15
%52 = load i8*, i8** %14
%53 = load i32, i32* %2
%54 = zext i32 %53 to i64
%55 = alloca i32, i64 %54
store i64 %54, i64* %16
%56 = load i8*, i8** %10
%57 = load i32, i32* %2
%58 = zext i32 %57 to i64
%59 = call i8* @llvm.stacksave()
store i8* %59, i8** %17
%60 = alloca i32, i64 %58
store i64 %58, i64* %18
%61 = load i8*, i8** %17
ret void
}

LLVM IR (-O2):
define void @fa86(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fputs(const char *s __attribute__((unused)),
          FILE *stream __attribute__((unused))) {
  return 0;
}


x86 assembly (clang, -O0):
<fputs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fputs>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fputs(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @fputs(i8* nocapture readnone %0, i32* nocapture readnone %1) {
ret i32 0
}
void RTSgBufCmp(void) {}


x86 assembly (clang, -O0):
<RTSgBufCmp>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTSgBufCmp>:
ret

LLVM IR (-O0):
define void @RTSgBufCmp() {
ret void
}

LLVM IR (-O2):
define void @RTSgBufCmp() {
ret void
}
int freeRam() {
  extern int __heap_start, *__brkval;
  int v;
  return (int)&v - (__brkval == 0 ? (int)&__heap_start : (int)__brkval);
}


x86 assembly (clang, -O0):
<freeRam>:
push   %rbp
mov    %rsp,%rbp
lea    -0x4(%rbp),%rax
mov    %eax,-0x8(%rbp)
mov    0x2ed6(%rip),%rax
cmpq   $0x0,(%rax)
jne    112b <freeRam+0x2b>
mov    0x2eb5(%rip),%rax
mov    %eax,-0xc(%rbp)
jmp    1138 <freeRam+0x38>
mov    0x2eb6(%rip),%rax
mov    (%rax),%rax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeRam>:
lea    -0x4(%rsp),%rax
mov    0x2edc(%rip),%rcx
mov    (%rcx),%rcx
test   %rcx,%rcx
jne    111a <freeRam+0x1a>
mov    0x2ebe(%rip),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
@__brkval = external global i32*
@__heap_start = external global i32
define i32 @freeRam() {
%1 = alloca i32
%2 = ptrtoint i32* %1 to i32
%3 = load i32*, i32** @__brkval
%4 = icmp eq i32* %3, null
br i1 %4, label %5, label %6
5: ; preds = %0
br label %9
6: ; preds = %0
%7 = load i32*, i32** @__brkval
%8 = ptrtoint i32* %7 to i32
br label %9
9: ; preds = %6, %5
%10 = phi i32 [ ptrtoint (i32* @__heap_start to i32), %5 ], [ %8, %6 ]
%11 = sub nsw i32 %2, %10
ret i32 %11
}

LLVM IR (-O2):
@__brkval = external global i32*
@__heap_start = external global i32
define i32 @freeRam() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = ptrtoint i32* %1 to i64
%4 = trunc i64 %3 to i32
%5 = load i32*, i32** @__brkval
%6 = icmp eq i32* %5, null
%7 = ptrtoint i32* %5 to i64
%8 = trunc i64 %7 to i32
%9 = select i1 %6, i32 ptrtoint (i32* @__heap_start to i32), i32 %8
%10 = sub nsw i32 %4, %9
ret i32 %10
}
/* Variables and functions */
int scm_page_level(long long);
long long scm_page_rank(long long i) {
  long long n = 1LL << (2 * scm_page_level(i));
  return (i - 2 * (n - 1)) % n;
}


x86 assembly (clang, -O0):
<scm_page_rank>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <scm_page_level@plt>
shl    $0x1,%eax
mov    %eax,%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    $0x1,%rcx
shl    $0x1,%rcx
sub    %rcx,%rax
cqto
idivq  -0x10(%rbp)
mov    %rdx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scm_page_rank>:
push   %rbx
mov    %rdi,%rbx
call   1030 <scm_page_level@plt>
mov    %eax,%ecx
add    %ecx,%ecx
mov    $0x1,%esi
shl    %cl,%rsi
mov    $0xfffffffffffffffe,%rax
shl    %cl,%rax
add    %rbx,%rax
add    $0x2,%rax
mov    %rax,%rdx
bts    %rcx,%rdx
shr    $0x20,%rdx
je     114d <scm_page_rank+0x3d>
cqto
idiv   %rsi
mov    %rdx,%rax
pop    %rbx
ret
xor    %edx,%edx
div    %esi
mov    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @scm_page_rank(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i32 @scm_page_level(i64 %4)
%6 = mul nsw i32 2, %5
%7 = zext i32 %6 to i64
%8 = shl i64 1, %7
store i64 %8, i64* %3
%9 = load i64, i64* %2
%10 = load i64, i64* %3
%11 = sub nsw i64 %10, 1
%12 = mul nsw i64 2, %11
%13 = sub nsw i64 %9, %12
%14 = load i64, i64* %3
%15 = srem i64 %13, %14
ret i64 %15
}

LLVM IR (-O2):
define i64 @scm_page_rank(i64 %0) {
%2 = tail call i32 @scm_page_level(i64 %0)
%3 = shl nsw i32 %2, 1
%4 = zext i32 %3 to i64
%5 = shl nuw i64 1, %4
%6 = shl i64 -2, %4
%7 = add i64 %0, 2
%8 = add i64 %7, %6
%9 = srem i64 %8, %5
ret i64 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int a = 2;
  a = a - (a = a + 4);
  printf("a = %d\n", a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
add    $0x4,%ecx
mov    %ecx,-0x8(%rbp)
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xebf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0xfffffffc,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"a = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 2, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 4
store i32 %5, i32* %2
%6 = sub nsw i32 %3, %5
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"a = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 -4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ foo9();
int use9() { foo9(); }


x86 assembly (clang, -O0):
<use9>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <foo9@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<use9>:
xor    %eax,%eax
jmp    1030 <foo9@plt>

LLVM IR (-O0):
define i32 @use9() {
%1 = alloca i32
%2 = call i32 (...) @foo9()
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @use9() {
%1 = tail call i32 (...) @foo9()
ret i32 undef
}
void rop3_198_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = ~T;
  stk2 = *D & stk3;
  stk1 = S ^ stk2;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_198_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_198_0_0>:
not    %dl
and    (%rdi),%dl
xor    %sil,%dl
mov    %dl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_198_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %6
%11 = zext i8 %10 to i32
%12 = xor i32 %11, -1
%13 = trunc i32 %12 to i8
store i8 %13, i8* %9
%14 = load i8*, i8** %4
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = load i8, i8* %9
%18 = zext i8 %17 to i32
%19 = and i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %8
%21 = load i8, i8* %5
%22 = zext i8 %21 to i32
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = xor i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %7
%27 = load i8, i8* %7
%28 = load i8*, i8** %4
store i8 %27, i8* %28
ret void
}

LLVM IR (-O2):
define void @rop3_198_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = xor i8 %2, -1
%5 = load i8, i8* %0
%6 = and i8 %5, %4
%7 = xor i8 %6, %1
store i8 %7, i8* %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ X509_VERIFY_PARAM;

/* Variables and functions */
int X509_VERIFY_PARAM_set1_ip(int /*<<< orphan*/ *, unsigned char *, size_t);
scalar_t__ a2i_ipadd(unsigned char *, char const *);
int X509_VERIFY_PARAM_set1_ip_asc(X509_VERIFY_PARAM *param, const char *ipasc) {
  unsigned char ipout[16];
  size_t iplen;
  iplen = (size_t)a2i_ipadd(ipout, ipasc);
  return X509_VERIFY_PARAM_set1_ip(param, ipout, iplen);
}


x86 assembly (clang, -O0):
<X509_VERIFY_PARAM_set1_ip_asc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <a2i_ipadd@plt>
mov    %rax,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x20(%rbp),%rsi
mov    -0x28(%rbp),%rdx
call   1030 <X509_VERIFY_PARAM_set1_ip@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_VERIFY_PARAM_set1_ip_asc>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %rdi,%rbx
mov    %rsp,%r14
mov    %r14,%rdi
call   1040 <a2i_ipadd@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %rax,%rdx
call   1030 <X509_VERIFY_PARAM_set1_ip@plt>
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @X509_VERIFY_PARAM_set1_ip_asc(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
%5 = alloca [16 x i8]
%6 = alloca i64
store i32* %0, i32** %3
store i8* %1, i8** %4
%7 = getelementptr inbounds [16 x i8], [16 x i8]* %5, i64 0, i64 0
%8 = load i8*, i8** %4
%9 = call i64 @a2i_ipadd(i8* %7, i8* %8)
store i64 %9, i64* %6
%10 = load i32*, i32** %3
%11 = getelementptr inbounds [16 x i8], [16 x i8]* %5, i64 0, i64 0
%12 = load i64, i64* %6
%13 = call i32 @X509_VERIFY_PARAM_set1_ip(i32* %10, i8* %11, i64 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @X509_VERIFY_PARAM_set1_ip_asc(i32* %0, i8* %1) {
%3 = alloca [16 x i8]
%4 = getelementptr inbounds [16 x i8], [16 x i8]* %3, i64 0, i64 0
%5 = call i64 @a2i_ipadd(i8* %4, i8* %1)
%6 = call i32 @X509_VERIFY_PARAM_set1_ip(i32* %0, i8* %4, i64 %5)
ret i32 %6
}
/* Variables and functions */
int O_NONBLOCK;
int O_RDONLY;
int open(char *, int);
int open_for_reading(char *name) { return open(name, O_RDONLY | O_NONBLOCK); }


x86 assembly (clang, -O0):
<open_for_reading>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rax
mov    (%rax),%esi
mov    0x2eb8(%rip),%rax
or     (%rax),%esi
call   1030 <open@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_for_reading>:
mov    0x2ec9(%rip),%rax
mov    0x2eca(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
jmp    1030 <open@plt>

LLVM IR (-O0):
@O_RDONLY = global i32 0
@O_NONBLOCK = global i32 0
define i32 @open_for_reading(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @O_RDONLY
%5 = load i32, i32* @O_NONBLOCK
%6 = or i32 %4, %5
%7 = call i32 @open(i8* %3, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
@O_RDONLY = global i32 0
@O_NONBLOCK = global i32 0
define i32 @open_for_reading(i8* nocapture %0) {
%2 = load i32, i32* @O_RDONLY
%3 = load i32, i32* @O_NONBLOCK
%4 = or i32 %3, %2
%5 = tail call i32 @open(i8* %0, i32 %4)
ret i32 %5
}
int config_MODULE_RADEGAST(void) { return 0; }


x86 assembly (clang, -O0):
<config_MODULE_RADEGAST>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_MODULE_RADEGAST>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @config_MODULE_RADEGAST() {
ret i32 0
}

LLVM IR (-O2):
define i32 @config_MODULE_RADEGAST() {
ret i32 0
}
/* Variables and functions */
void *foo(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ free(void *);
int /*<<< orphan*/ stderr;
int main() {
  foo(5);
  void *ptr = foo(10);
  fprintf(stderr, "after foo\n");
  free(ptr);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x5,%edi
call   1050 <foo@plt>
mov    $0xa,%edi
call   1050 <foo@plt>
mov    %rax,-0x10(%rbp)
mov    0x2e82(%rip),%rax
mov    (%rax),%edi
lea    0xe99(%rip),%rsi
call   1040 <fprintf@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x5,%edi
call   1050 <foo@plt>
mov    $0xa,%edi
call   1050 <foo@plt>
mov    %rax,%rbx
mov    0x2e91(%rip),%rax
mov    (%rax),%edi
lea    0xea8(%rip),%rsi
call   1040 <fprintf@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [11 x i8] c"after foo\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = call i8* @foo(i32 5)
%4 = call i8* @foo(i32 10)
store i8* %4, i8** %2
%5 = load i32, i32* @stderr
%6 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%7 = load i8*, i8** %2
%8 = call i32 @free(i8* %7)
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [11 x i8] c"after foo\0A\00"
define i32 @main() {
%1 = tail call i8* @foo(i32 5)
%2 = tail call i8* @foo(i32 10)
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 @free(i8* %2)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ a;

/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ test_palindrome(char const *, int, int);
void test4(void) {
  const char a[] = {'a', 'b', 'c', 'd', 'c', 'b', 'a'};
  test_palindrome(a, sizeof(a), 1);
  test_palindrome(a, sizeof(a), 2);
  printf("\n");
}


x86 assembly (clang, -O0):
<test4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xed2(%rip),%eax
mov    %eax,-0x7(%rbp)
mov    0xecc(%rip),%ax
mov    %ax,-0x3(%rbp)
mov    0xec4(%rip),%al
mov    %al,-0x1(%rbp)
lea    -0x7(%rbp),%rdi
mov    $0x7,%esi
mov    $0x1,%edx
call   1040 <test_palindrome@plt>
lea    -0x7(%rbp),%rdi
mov    $0x7,%esi
mov    $0x2,%edx
call   1040 <test_palindrome@plt>
lea    0xe95(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test4>:
push   %rbx
sub    $0x10,%rsp
movl   $0x61626364,0xb(%rsp)
61
movl   $0x64636261,0x8(%rsp)
64
lea    0x8(%rsp),%rbx
mov    %rbx,%rdi
mov    $0x7,%esi
mov    $0x1,%edx
call   1040 <test_palindrome@plt>
mov    %rbx,%rdi
mov    $0x7,%esi
mov    $0x2,%edx
call   1040 <test_palindrome@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.test4.a = [7 x i8] c"abcdcba"
@.str = [2 x i8] c"\0A\00"
define void @test4() {
%1 = alloca [7 x i8]
%2 = bitcast [7 x i8]* %1 to i8*
%3 = getelementptr inbounds [7 x i8], [7 x i8]* %1, i64 0, i64 0
%4 = call i32 @test_palindrome(i8* %3, i32 7, i32 1)
%5 = getelementptr inbounds [7 x i8], [7 x i8]* %1, i64 0, i64 0
%6 = call i32 @test_palindrome(i8* %5, i32 7, i32 2)
%7 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__const.test4.a = [7 x i8] c"abcdcba"
define void @test4() {
%1 = alloca [7 x i8]
%2 = getelementptr inbounds [7 x i8], [7 x i8]* %1, i64 0, i64 0
%3 = call i32 @test_palindrome(i8* %2, i32 7, i32 1)
%4 = call i32 @test_palindrome(i8* %2, i32 7, i32 2)
%5 = call i32 @putchar(i32 10)
ret void
}
/* Type definitions */
struct node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ printPathsRecur(struct node *, int *, int /*<<< orphan*/);
void printPaths(struct node *node) {
  int path[1000];
  printPathsRecur(node, path, 0);
}


x86 assembly (clang, -O0):
<printPaths>:
push   %rbp
mov    %rsp,%rbp
sub    $0xfb0,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xfb0(%rbp),%rsi
xor    %edx,%edx
call   1030 <printPathsRecur@plt>
add    $0xfb0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printPaths>:
sub    $0xfa8,%rsp
mov    %rsp,%rsi
xor    %edx,%edx
call   1030 <printPathsRecur@plt>
add    $0xfa8,%rsp
ret

LLVM IR (-O0):
%struct.node = type { i32 }
define void @printPaths(%struct.node* %0) {
%2 = alloca %struct.node*
%3 = alloca [1000 x i32]
store %struct.node* %0, %struct.node** %2
%4 = load %struct.node*, %struct.node** %2
%5 = getelementptr inbounds [1000 x i32], [1000 x i32]* %3, i64 0, i64 0
%6 = call i32 @printPathsRecur(%struct.node* %4, i32* %5, i32 0)
ret void
}

LLVM IR (-O2):
%struct.node = type { i32 }
define void @printPaths(%struct.node* %0) {
%2 = alloca [1000 x i32]
%3 = bitcast [1000 x i32]* %2 to i8*
%4 = getelementptr inbounds [1000 x i32], [1000 x i32]* %2, i64 0, i64 0
%5 = call i32 @printPathsRecur(%struct.node* %0, i32* %4, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ i2c_init();
int /*<<< orphan*/ i2c_test();
int /*<<< orphan*/ led_init(int);
int /*<<< orphan*/ led_off();
int /*<<< orphan*/ rcc_init();
int /*<<< orphan*/ rcc_show();
int /*<<< orphan*/ serial_init();
int /*<<< orphan*/ serial_putc(char);
int /*<<< orphan*/ serial_puts(char *);
void startup(void) {
  rcc_init();
  serial_init();
  rcc_show();
  serial_putc('\n');
  serial_puts("Starting\n");
  rcc_show();
  i2c_init();
  led_init(13);
  led_off();
  i2c_test();
}


x86 assembly (clang, -O0):
<startup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <rcc_init@plt>
mov    $0x0,%al
call   10b0 <serial_init@plt>
mov    $0x0,%al
call   10a0 <rcc_show@plt>
mov    $0xa,%edi
call   1060 <serial_putc@plt>
lea    0xe46(%rip),%rdi
call   1080 <serial_puts@plt>
mov    $0x0,%al
call   10a0 <rcc_show@plt>
mov    $0x0,%al
call   1030 <i2c_init@plt>
mov    $0xd,%edi
call   1070 <led_init@plt>
mov    $0x0,%al
call   1040 <led_off@plt>
mov    $0x0,%al
call   1090 <i2c_test@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<startup>:
push   %rax
xor    %eax,%eax
call   1050 <rcc_init@plt>
xor    %eax,%eax
call   10b0 <serial_init@plt>
xor    %eax,%eax
call   10a0 <rcc_show@plt>
mov    $0xa,%edi
call   1060 <serial_putc@plt>
lea    0xe49(%rip),%rdi
call   1080 <serial_puts@plt>
xor    %eax,%eax
call   10a0 <rcc_show@plt>
xor    %eax,%eax
call   1030 <i2c_init@plt>
mov    $0xd,%edi
call   1070 <led_init@plt>
xor    %eax,%eax
call   1040 <led_off@plt>
xor    %eax,%eax
pop    %rcx
jmp    1090 <i2c_test@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"Starting\0A\00"
define void @startup() {
%1 = call i32 (...) @rcc_init()
%2 = call i32 (...) @serial_init()
%3 = call i32 (...) @rcc_show()
%4 = call i32 @serial_putc(i8 signext 10)
%5 = call i32 @serial_puts(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%6 = call i32 (...) @rcc_show()
%7 = call i32 (...) @i2c_init()
%8 = call i32 @led_init(i32 13)
%9 = call i32 (...) @led_off()
%10 = call i32 (...) @i2c_test()
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"Starting\0A\00"
define void @startup() {
%1 = tail call i32 (...) @rcc_init()
%2 = tail call i32 (...) @serial_init()
%3 = tail call i32 (...) @rcc_show()
%4 = tail call i32 @serial_putc(i8 signext 10)
%5 = tail call i32 @serial_puts(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 (...) @rcc_show()
%7 = tail call i32 (...) @i2c_init()
%8 = tail call i32 @led_init(i32 13)
%9 = tail call i32 (...) @led_off()
%10 = tail call i32 (...) @i2c_test()
ret void
}
int mg_is_ws_fragment(unsigned char flags) {
  return (flags & 0x80) == 0 || (flags & 0x0f) == 0;
}


x86 assembly (clang, -O0):
<mg_is_ws_fragment>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%ecx
and    $0x80,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x2(%rbp)
je     1132 <mg_is_ws_fragment+0x32>
movzbl -0x1(%rbp),%eax
and    $0xf,%eax
cmp    $0x0,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mg_is_ws_fragment>:
test   $0x80,%dil
sete   %al
test   $0xf,%dil
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @mg_is_ws_fragment(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 128
%6 = icmp eq i32 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %1
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = and i32 %9, 15
%11 = icmp eq i32 %10, 0
br label %12
12: ; preds = %7, %1
%13 = phi i1 [ true, %1 ], [ %11, %7 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @mg_is_ws_fragment(i8 zeroext %0) {
%2 = zext i8 %0 to i32
%3 = and i32 %2, 128
%4 = icmp eq i32 %3, 0
%5 = and i32 %2, 15
%6 = icmp eq i32 %5, 0
%7 = or i1 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
void uDMAErrorStatusClear(void) {
  (*((volatile unsigned long *)(0x400FF000 + 0x0000004C))) = 1;
}


x86 assembly (clang, -O0):
<uDMAErrorStatusClear>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400ff04c,%eax
movq   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<uDMAErrorStatusClear>:
movq   $0x1,0x400ff04c
ret

LLVM IR (-O0):
define void @uDMAErrorStatusClear() {
store volatile i64 1, i64* inttoptr (i64 1074786380 to i64*)
ret void
}

LLVM IR (-O2):
define void @uDMAErrorStatusClear() {
store volatile i64 1, i64* inttoptr (i64 1074786380 to i64*)
ret void
}
void TestIsOrthogonal(void) {
  (void)0;
  (void)0;
  (void)0;
  (void)0;
}


x86 assembly (clang, -O0):
<TestIsOrthogonal>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TestIsOrthogonal>:
ret

LLVM IR (-O0):
define void @TestIsOrthogonal() {
ret void
}

LLVM IR (-O2):
define void @TestIsOrthogonal() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void AESIntClear(uint32_t ui32Base, uint32_t ui32IntFlags) {
  ;

  ;
  (*((volatile unsigned long *)(ui32Base + 0xFFFFA02C))) =
      (((ui32IntFlags & 0x00010000) >> 16) |
       ((ui32IntFlags & 0x00060000) >> 15) |
       ((ui32IntFlags & 0x00080000) >> 18));
}


x86 assembly (clang, -O0):
<AESIntClear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x10000,%eax
sar    $0x10,%eax
mov    -0x8(%rbp),%ecx
and    $0x60000,%ecx
sar    $0xf,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    $0x80000,%ecx
sar    $0x12,%ecx
or     %ecx,%eax
movslq %eax,%rcx
mov    -0x4(%rbp),%eax
add    $0xffffa02c,%eax
mov    %eax,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<AESIntClear>:
mov    %esi,%eax
shr    $0x10,%eax
and    $0x1,%eax
mov    %esi,%ecx
shr    $0xf,%ecx
and    $0xc,%ecx
or     %eax,%ecx
shr    $0x12,%esi
and    $0x2,%esi
or     %ecx,%esi
add    $0xffffa02c,%edi
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @AESIntClear(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 65536
%7 = ashr i32 %6, 16
%8 = load i32, i32* %4
%9 = and i32 %8, 393216
%10 = ashr i32 %9, 15
%11 = or i32 %7, %10
%12 = load i32, i32* %4
%13 = and i32 %12, 524288
%14 = ashr i32 %13, 18
%15 = or i32 %11, %14
%16 = sext i32 %15 to i64
%17 = load i32, i32* %3
%18 = add i32 %17, -24532
%19 = zext i32 %18 to i64
%20 = inttoptr i64 %19 to i64*
store volatile i64 %16, i64* %20
ret void
}

LLVM IR (-O2):
define void @AESIntClear(i32 %0, i32 %1) {
%3 = lshr i32 %1, 16
%4 = and i32 %3, 1
%5 = lshr i32 %1, 15
%6 = and i32 %5, 12
%7 = or i32 %4, %6
%8 = lshr i32 %1, 18
%9 = and i32 %8, 2
%10 = or i32 %7, %9
%11 = zext i32 %10 to i64
%12 = add i32 %0, -24532
%13 = zext i32 %12 to i64
%14 = inttoptr i64 %13 to i64*
store volatile i64 %11, i64* %14
ret void
}