xunge/DecIR huggingface dataset:
/* Variables and functions */
double log(double);
double score(double p, void *data) {
  (void)data;
  if (p == 1) {
    return -2;
  }
  return log(1.0 - p);
}


x86 assembly (clang, -O0):
<score>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xed2(%rip),%xmm1
ucomisd %xmm1,%xmm0
jne    1150 <score+0x40>
jp     1150 <score+0x40>
movsd  0xec2(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1167 <score+0x57>
movsd  0xea8(%rip),%xmm0
subsd  -0x10(%rbp),%xmm0
call   1030 <log@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<score>:
ucomisd 0xee8(%rip),%xmm0
jne    1125 <score+0x15>
jp     1125 <score+0x15>
movsd  0xee4(%rip),%xmm0
ret
movsd  0xed3(%rip),%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
jmp    1030 <log@plt>

LLVM IR (-O0):
define double @score(double %0, i8* %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca i8*
store double %0, double* %4
store i8* %1, i8** %5
%6 = load i8*, i8** %5
%7 = load double, double* %4
%8 = fcmp oeq double %7, 1.000000e+00
br i1 %8, label %9, label %10
9: ; preds = %2
store double -2.000000e+00, double* %3
br label %14
10: ; preds = %2
%11 = load double, double* %4
%12 = fsub double 1.000000e+00, %11
%13 = call double @log(double %12)
store double %13, double* %3
br label %14
14: ; preds = %10, %9
%15 = load double, double* %3
ret double %15
}

LLVM IR (-O2):
define double @score(double %0, i8* nocapture readnone %1) {
%3 = fcmp oeq double %0, 1.000000e+00
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = fsub double 1.000000e+00, %0
%6 = tail call double @log(double %5)
br label %7
7: ; preds = %2, %4
%8 = phi double [ %6, %4 ], [ -2.000000e+00, %2 ]
ret double %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf("Usage: fids [--help|-h|-?] --init|--check homedir\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [51 x i8] c"Usage: fids [--help|-h|-?] --init|--check homedir\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [50 x i8] c"Usage: fids [--help|-h|-?] --init|--check homedir\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([50 x i8], [50 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void print(long *s) {
  printf("=> ");
  printf("%ld", *s);
  printf("\n");
}


x86 assembly (clang, -O0):
<print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rsi
lea    0xecc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xec2(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    (%rbx),%rsi
lea    0xec8(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    $0xa,%edi
pop    %rbx
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"=> \00"
@.str.1 = [4 x i8] c"%ld\00"
@.str.2 = [2 x i8] c"\0A\00"
define void @print(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%4 = load i64*, i64** %2
%5 = load i64, i64* %4
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i64 %5)
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"=> \00"
@.str.1 = [4 x i8] c"%ld\00"
define void @print(i64* nocapture %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = load i64, i64* %0
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i64 %3)
%5 = tail call i32 @putchar(i32 10)
ret void
}
double pop(void) {}


x86 assembly (clang, -O0):
<pop>:
push   %rbp
mov    %rsp,%rbp
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<pop>:
ret

LLVM IR (-O0):
define double @pop() {
%1 = alloca double
%2 = load double, double* %1
ret double %2
}

LLVM IR (-O2):
define double @pop() {
ret double undef
}
int siniflandir(int girilen_not) {
  if (girilen_not >= 85) {
    return 5;
  } else if (girilen_not >= 70) {
    return 4;
  } else if (girilen_not >= 60) {
    return 3;
  } else if (girilen_not >= 50) {
    return 2;
  } else {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<siniflandir>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x55,-0x8(%rbp)
jl     111d <siniflandir+0x1d>
movl   $0x5,-0x4(%rbp)
jmp    1166 <siniflandir+0x66>
cmpl   $0x46,-0x8(%rbp)
jl     1133 <siniflandir+0x33>
movl   $0x4,-0x4(%rbp)
jmp    1166 <siniflandir+0x66>
cmpl   $0x3c,-0x8(%rbp)
jl     1149 <siniflandir+0x49>
movl   $0x3,-0x4(%rbp)
jmp    1166 <siniflandir+0x66>
cmpl   $0x32,-0x8(%rbp)
jl     115f <siniflandir+0x5f>
movl   $0x2,-0x4(%rbp)
jmp    1166 <siniflandir+0x66>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<siniflandir>:
mov    $0x5,%eax
cmp    $0x54,%edi
jg     1129 <siniflandir+0x29>
mov    $0x4,%eax
cmp    $0x45,%edi
jg     1129 <siniflandir+0x29>
mov    $0x3,%eax
cmp    $0x3b,%edi
jg     1129 <siniflandir+0x29>
xor    %eax,%eax
cmp    $0x32,%edi
setge  %al
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @siniflandir(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 85
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 5, i32* %2
br label %20
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp sge i32 %8, 70
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 4, i32* %2
br label %20
11: ; preds = %7
%12 = load i32, i32* %3
%13 = icmp sge i32 %12, 60
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 3, i32* %2
br label %20
15: ; preds = %11
%16 = load i32, i32* %3
%17 = icmp sge i32 %16, 50
br i1 %17, label %18, label %19
18: ; preds = %15
store i32 2, i32* %2
br label %20
19: ; preds = %15
store i32 1, i32* %2
br label %20
20: ; preds = %19, %18, %14, %10, %6
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @siniflandir(i32 %0) {
%2 = icmp sgt i32 %0, 84
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = icmp sgt i32 %0, 69
br i1 %4, label %10, label %5
5: ; preds = %3
%6 = icmp sgt i32 %0, 59
br i1 %6, label %10, label %7
7: ; preds = %5
%8 = icmp sgt i32 %0, 49
%9 = select i1 %8, i32 2, i32 1
br label %10
10: ; preds = %7, %5, %3, %1
%11 = phi i32 [ 5, %1 ], [ 4, %3 ], [ 3, %5 ], [ %9, %7 ]
ret i32 %11
}
int intFuncImplicitVarArgs() { return 42; }


x86 assembly (clang, -O0):
<intFuncImplicitVarArgs>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intFuncImplicitVarArgs>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @intFuncImplicitVarArgs() {
ret i32 42
}

LLVM IR (-O2):
define i32 @intFuncImplicitVarArgs() {
ret i32 42
}
/* Variables and functions */
int /*<<< orphan*/ clrtoeol();
int /*<<< orphan*/ refresh();
ClrEoln() {
  clrtoeol();
  refresh();
}


x86 assembly (clang, -O0):
<ClrEoln>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <clrtoeol@plt>
mov    $0x0,%al
call   1030 <refresh@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ClrEoln>:
push   %rax
xor    %eax,%eax
call   1040 <clrtoeol@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <refresh@plt>

LLVM IR (-O0):
define i32 @ClrEoln() {
%1 = alloca i32
%2 = call i32 (...) @clrtoeol()
%3 = call i32 (...) @refresh()
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @ClrEoln() {
%1 = tail call i32 (...) @clrtoeol()
%2 = tail call i32 (...) @refresh()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ ftpcmd(char *, int /*<<< orphan*/);
void ftpabort(void) { ftpcmd("\377\376ABOR", 0); }


x86 assembly (clang, -O0):
<ftpabort>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
xor    %esi,%esi
call   1030 <ftpcmd@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ftpabort>:
lea    0xee9(%rip),%rdi
xor    %esi,%esi
jmp    1030 <ftpcmd@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"\FF\FEABOR\00"
define void @ftpabort() {
%1 = call i32 @ftpcmd(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 0)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"\FF\FEABOR\00"
define void @ftpabort() {
%1 = tail call i32 @ftpcmd(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 0)
ret void
}
int isEven(int i) { return i % 2; }


x86 assembly (clang, -O0):
<isEven>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isEven>:
mov    %edi,%eax
mov    %edi,%ecx
shr    $0x1f,%ecx
add    %edi,%ecx
and    $0xfffffffe,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @isEven(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 2
ret i32 %4
}

LLVM IR (-O2):
define i32 @isEven(i32 %0) {
%2 = srem i32 %0, 2
ret i32 %2
}
void ggz_report_victor(struct player *pplayer) {}


x86 assembly (clang, -O0):
<ggz_report_victor>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ggz_report_victor>:
ret

LLVM IR (-O0):
%struct.player = type opaque
define void @ggz_report_victor(%struct.player* %0) {
%2 = alloca %struct.player*
store %struct.player* %0, %struct.player** %2
ret void
}

LLVM IR (-O2):
%struct.player = type opaque
define void @ggz_report_victor(%struct.player* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void inv_sleep(int m_secs) { usleep(m_secs * 1000); }


x86 assembly (clang, -O0):
<inv_sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inv_sleep>:
imul   $0x3e8,%edi,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @inv_sleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 1000
%5 = call i32 @usleep(i32 %4)
ret void
}

LLVM IR (-O2):
define void @inv_sleep(i32 %0) {
%2 = mul nsw i32 %0, 1000
%3 = tail call i32 @usleep(i32 %2)
ret void
}
/* Type definitions */
struct evbuffer {
  int dummy;
};

/* Variables and functions */
int encode_int_internal(unsigned char *, unsigned long);
int /*<<< orphan*/ evbuffer_add(struct evbuffer *, unsigned char *, int);
void evtag_encode_int(struct evbuffer *evbuf, unsigned long number) {
  unsigned char data[5];
  int len = encode_int_internal(data, number);
  evbuffer_add(evbuf, data, len);
}


x86 assembly (clang, -O0):
<evtag_encode_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x15(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <encode_int_internal@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x15(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1040 <evbuffer_add@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<evtag_encode_int>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
lea    0x3(%rsp),%r14
mov    %r14,%rdi
call   1030 <encode_int_internal@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %eax,%edx
call   1040 <evbuffer_add@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.evbuffer = type { i32 }
define void @evtag_encode_int(%struct.evbuffer* %0, i64 %1) {
%3 = alloca %struct.evbuffer*
%4 = alloca i64
%5 = alloca [5 x i8]
%6 = alloca i32
store %struct.evbuffer* %0, %struct.evbuffer** %3
store i64 %1, i64* %4
%7 = getelementptr inbounds [5 x i8], [5 x i8]* %5, i64 0, i64 0
%8 = load i64, i64* %4
%9 = call i32 @encode_int_internal(i8* %7, i64 %8)
store i32 %9, i32* %6
%10 = load %struct.evbuffer*, %struct.evbuffer** %3
%11 = getelementptr inbounds [5 x i8], [5 x i8]* %5, i64 0, i64 0
%12 = load i32, i32* %6
%13 = call i32 @evbuffer_add(%struct.evbuffer* %10, i8* %11, i32 %12)
ret void
}

LLVM IR (-O2):
%struct.evbuffer = type { i32 }
define void @evtag_encode_int(%struct.evbuffer* %0, i64 %1) {
%3 = alloca [5 x i8]
%4 = getelementptr inbounds [5 x i8], [5 x i8]* %3, i64 0, i64 0
%5 = call i32 @encode_int_internal(i8* %4, i64 %1)
%6 = call i32 @evbuffer_add(%struct.evbuffer* %0, i8* %4, i32 %5)
ret void
}
int jac_chain_nm10_alloc(void **mem, const int *idata, const double *rdata) {
  if (mem)
    *mem = 0;
  (void)idata;
  (void)rdata;
  return 0;
}


x86 assembly (clang, -O0):
<jac_chain_nm10_alloc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1126 <jac_chain_nm10_alloc+0x26>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<jac_chain_nm10_alloc>:
test   %rdi,%rdi
je     110c <jac_chain_nm10_alloc+0xc>
movq   $0x0,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @jac_chain_nm10_alloc(i8** %0, i32* %1, double* %2) {
%4 = alloca i8**
%5 = alloca i32*
%6 = alloca double*
store i8** %0, i8*** %4
store i32* %1, i32** %5
store double* %2, double** %6
%7 = load i8**, i8*** %4
%8 = icmp ne i8** %7, null
br i1 %8, label %9, label %11
9: ; preds = %3
%10 = load i8**, i8*** %4
store i8* null, i8** %10
br label %11
11: ; preds = %9, %3
%12 = load i32*, i32** %5
%13 = load double*, double** %6
ret i32 0
}

LLVM IR (-O2):
define i32 @jac_chain_nm10_alloc(i8** writeonly %0, i32* nocapture readnone %1, double* nocapture readnone %2) {
%4 = icmp eq i8** %0, null
br i1 %4, label %6, label %5
5: ; preds = %3
store i8* null, i8** %0
br label %6
6: ; preds = %5, %3
ret i32 0
}
void multipart_log(const char *format, ...) {}


x86 assembly (clang, -O0):
<multipart_log>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<multipart_log>:
ret

LLVM IR (-O0):
define void @multipart_log(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @multipart_log(i8* nocapture %0, ...) {
ret void
}
int f_ble_mr1(float *a1, float a2) { return (__builtin_islessequal(*a1, a2)); }


x86 assembly (clang, -O0):
<f_ble_mr1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_ble_mr1>:
xor    %eax,%eax
ucomiss (%rdi),%xmm0
setae  %al
ret

LLVM IR (-O0):
define i32 @f_ble_mr1(float* %0, float %1) {
%3 = alloca float*
%4 = alloca float
store float* %0, float** %3
store float %1, float* %4
%5 = load float*, float** %3
%6 = load float, float* %5
%7 = load float, float* %4
%8 = fcmp ole float %6, %7
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @f_ble_mr1(float* nocapture %0, float %1) {
%3 = load float, float* %0
%4 = fcmp ole float %3, %1
%5 = zext i1 %4 to i32
ret i32 %5
}
void ls_cost_nm9_decref(void) {}


x86 assembly (clang, -O0):
<ls_cost_nm9_decref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_cost_nm9_decref>:
ret

LLVM IR (-O0):
define void @ls_cost_nm9_decref() {
ret void
}

LLVM IR (-O2):
define void @ls_cost_nm9_decref() {
ret void
}
void mcg64_seed(__uint128_t *state) { *state |= 1; }


x86 assembly (clang, -O0):
<mcg64_seed>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
mov    0x8(%rax),%rdx
or     $0x1,%rcx
mov    %rdx,0x8(%rax)
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mcg64_seed>:
orb    $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @mcg64_seed(i128* %0) {
%2 = alloca i128*
store i128* %0, i128** %2
%3 = load i128*, i128** %2
%4 = load i128, i128* %3
%5 = or i128 %4, 1
store i128 %5, i128* %3
ret void
}

LLVM IR (-O2):
define void @mcg64_seed(i128* nocapture %0) {
%2 = load i128, i128* %0
%3 = or i128 %2, 1
store i128 %3, i128* %0
ret void
}
void vui_tr_init(void) {}


x86 assembly (clang, -O0):
<vui_tr_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vui_tr_init>:
ret

LLVM IR (-O0):
define void @vui_tr_init() {
ret void
}

LLVM IR (-O2):
define void @vui_tr_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
int main() {
  while (1)
    sleep(300);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x12c,%edi
call   1030 <sleep@plt>
jmp    111f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x12c,%edi
call   1030 <sleep@plt>
jmp    1120 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0, %2
%3 = call i32 @sleep(i32 300)
br label %2
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 @sleep(i32 300)
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void NVIC_Init() {
  printf("%s\n", ">> Nested Vector Interrupt Controller");
  (*((volatile unsigned long *)0xE000E400)) = (7U << 5);
  (*((volatile unsigned long *)0xE000E100)) = 1U;
}


x86 assembly (clang, -O0):
<NVIC_Init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee2(%rip),%rsi
call   1030 <printf@plt>
mov    $0xe000e400,%eax
movq   $0xe0,(%rax)
mov    $0xe000e100,%eax
movq   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<NVIC_Init>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xee5(%rip),%rsi
call   1030 <printf@plt>
mov    $0xe000e100,%eax
movq   $0xe0,0x300(%rax)
movq   $0x1,(%rax)
pop    %rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [38 x i8] c">> Nested Vector Interrupt Controller\00"
define void @NVIC_Init() {
%1 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0))
store volatile i64 224, i64* inttoptr (i64 3758154752 to i64*)
store volatile i64 1, i64* inttoptr (i64 3758153984 to i64*)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [38 x i8] c">> Nested Vector Interrupt Controller\00"
define void @NVIC_Init() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0))
store volatile i64 224, i64* inttoptr (i64 3758154752 to i64*)
store volatile i64 1, i64* inttoptr (i64 3758153984 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isprint(int);
void t_isprint_0xa2() {
  Assert_real((isprint(162) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              815, ("isprint should be 0 for 0xa2"));
}


x86 assembly (clang, -O0):
<t_isprint_0xa2>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa2,%edi
call   1030 <isprint@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x32f,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0xa2>:
push   %rax
mov    $0xa2,%edi
call   1030 <isprint@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x32f,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xa2\00"
define void @t_isprint_0xa2() {
%1 = call i64 @isprint(i32 162)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 815, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0xa2\00"
define void @t_isprint_0xa2() {
%1 = tail call i64 @isprint(i32 162)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 815, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void __clear_bit(int idx, unsigned long *bmap) {
  unsigned long mask = (1UL << ((idx) % 32));
  unsigned long *p = ((unsigned long *)bmap) + ((idx) / 32);
  *p &= ~mask;
}


x86 assembly (clang, -O0):
<__clear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x28(%rbp),%rax
movslq %ecx,%rcx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rcx
xor    $0xffffffffffffffff,%rcx
mov    -0x20(%rbp),%rax
and    (%rax),%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__clear_bit>:
mov    %edi,%ecx
lea    0x1f(%rcx),%eax
test   %edi,%edi
cmovns %edi,%eax
mov    %eax,%edx
and    $0xffffffe0,%edx
sub    %edx,%ecx
sar    $0x5,%eax
mov    $0xfffffffffffffffe,%rdx
rol    %cl,%rdx
cltq
and    %rdx,(%rsi,%rax,8)
ret

LLVM IR (-O0):
define void @__clear_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%7 = load i32, i32* %3
%8 = srem i32 %7, 32
%9 = zext i32 %8 to i64
%10 = shl i64 1, %9
store i64 %10, i64* %5
%11 = load i64*, i64** %4
%12 = load i32, i32* %3
%13 = sdiv i32 %12, 32
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i64, i64* %11, i64 %14
store i64* %15, i64** %6
%16 = load i64, i64* %5
%17 = xor i64 %16, -1
%18 = load i64*, i64** %6
%19 = load i64, i64* %18
%20 = and i64 %19, %17
store i64 %20, i64* %18
ret void
}

LLVM IR (-O2):
define void @__clear_bit(i32 %0, i64* nocapture %1) {
%3 = srem i32 %0, 32
%4 = zext i32 %3 to i64
%5 = shl nuw i64 1, %4
%6 = sdiv i32 %0, 32
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i64, i64* %1, i64 %7
%9 = xor i64 %5, -1
%10 = load i64, i64* %8
%11 = and i64 %10, %9
store i64 %11, i64* %8
ret void
}
unsigned char condition_reduction(unsigned char *a, unsigned char min_v) {
  unsigned char last = 65;
  for (unsigned char i = 0; i < 254; i++)
    if (a[i] < min_v)
      last = a[i];
  return last;
}


x86 assembly (clang, -O0):
<condition_reduction>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movb   $0x41,-0xa(%rbp)
movb   $0x0,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
cmp    $0xfe,%eax
jge    115d <condition_reduction+0x5d>
mov    -0x8(%rbp),%rax
movzbl -0xb(%rbp),%ecx
movzbl (%rax,%rcx,1),%eax
movzbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jge    114b <condition_reduction+0x4b>
mov    -0x8(%rbp),%rax
movzbl -0xb(%rbp),%ecx
mov    (%rax,%rcx,1),%al
mov    %al,-0xa(%rbp)
jmp    1150 <condition_reduction+0x50>
mov    -0xb(%rbp),%al
add    $0x1,%al
mov    %al,-0xb(%rbp)
jmp    1116 <condition_reduction+0x16>
movzbl -0xa(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<condition_reduction>:
mov    $0x41,%al
mov    $0x1,%ecx
nopw   0x0(%rax,%rax,1)
movzbl -0x1(%rdi,%rcx,1),%edx
cmp    %sil,%dl
movzbl %al,%eax
cmovb  %edx,%eax
movzbl (%rdi,%rcx,1),%edx
cmp    %sil,%dl
cmovb  %edx,%eax
add    $0x2,%rcx
cmp    $0xff,%rcx
jne    1110 <condition_reduction+0x10>
ret

LLVM IR (-O0):
define zeroext i8 @condition_reduction(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
store i8 65, i8* %5
store i8 0, i8* %6
br label %7
7: ; preds = %28, %2
%8 = load i8, i8* %6
%9 = zext i8 %8 to i32
%10 = icmp slt i32 %9, 254
br i1 %10, label %11, label %31
11: ; preds = %7
%12 = load i8*, i8** %3
%13 = load i8, i8* %6
%14 = zext i8 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = icmp slt i32 %17, %19
br i1 %20, label %21, label %27
21: ; preds = %11
%22 = load i8*, i8** %3
%23 = load i8, i8* %6
%24 = zext i8 %23 to i64
%25 = getelementptr inbounds i8, i8* %22, i64 %24
%26 = load i8, i8* %25
store i8 %26, i8* %5
br label %27
27: ; preds = %21, %11
br label %28
28: ; preds = %27
%29 = load i8, i8* %6
%30 = add i8 %29, 1
store i8 %30, i8* %6
br label %7
31: ; preds = %7
%32 = load i8, i8* %5
ret i8 %32
}

LLVM IR (-O2):
define zeroext i8 @condition_reduction(i8* nocapture %0, i8 zeroext %1) {
br label %4
3: ; preds = %4
ret i8 %15
4: ; preds = %4, %2
%5 = phi i64 [ 0, %2 ], [ %16, %4 ]
%6 = phi i8 [ 65, %2 ], [ %15, %4 ]
%7 = getelementptr inbounds i8, i8* %0, i64 %5
%8 = load i8, i8* %7
%9 = icmp ult i8 %8, %1
%10 = select i1 %9, i8 %8, i8 %6
%11 = or i64 %5, 1
%12 = getelementptr inbounds i8, i8* %0, i64 %11
%13 = load i8, i8* %12
%14 = icmp ult i8 %13, %1
%15 = select i1 %14, i8 %13, i8 %10
%16 = add nuw nsw i64 %5, 2
%17 = icmp eq i64 %16, 254
br i1 %17, label %3, label %4
}
/* Type definitions */
typedef unsigned char uint8_t;

/* Variables and functions */
uint8_t bs_read_1(unsigned char *ptr) { return ptr[0]; }


x86 assembly (clang, -O0):
<bs_read_1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bs_read_1>:
mov    (%rdi),%al
ret

LLVM IR (-O0):
define zeroext i8 @bs_read_1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
ret i8 %5
}

LLVM IR (-O2):
define zeroext i8 @bs_read_1(i8* nocapture %0) {
%2 = load i8, i8* %0
ret i8 %2
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
int /*<<< orphan*/ write(int, char *, int);
int main(int argc, char *argv[]) {
  for (;;) {
    write(1, "宗", 3);
    sleep(1);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%edi
lea    0xebe(%rip),%rsi
mov    $0x3,%edx
call   1030 <write@plt>
mov    $0x1,%edi
call   1040 <sleep@plt>
jmp    1136 <main+0x16>

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xed8(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    $0x1,%edi
mov    %rbx,%rsi
mov    $0x3,%edx
call   1030 <write@plt>
mov    $0x1,%edi
call   1040 <sleep@plt>
jmp    1130 <main+0x10>

LLVM IR (-O0):
@.str = [4 x i8] c"\E5\AE\97\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
br label %6
6: ; preds = %6, %2
%7 = call i32 @write(i32 1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 3)
%8 = call i32 @sleep(i32 1)
br label %6
}

LLVM IR (-O2):
@.str = [4 x i8] c"\E5\AE\97\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
br label %3
3: ; preds = %3, %2
%4 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 3)
%5 = tail call i32 @sleep(i32 1)
br label %3
}
void WDC_DLLDeinit(void) {}


x86 assembly (clang, -O0):
<WDC_DLLDeinit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WDC_DLLDeinit>:
ret

LLVM IR (-O0):
define void @WDC_DLLDeinit() {
ret void
}

LLVM IR (-O2):
define void @WDC_DLLDeinit() {
ret void
}
int Operand_simm4_encode(unsigned int *valp) {
  unsigned mn_0, simm4_0;
  simm4_0 = *valp;
  mn_0 = (simm4_0 & 0xf);
  *valp = mn_0;
  return 0;
}


x86 assembly (clang, -O0):
<Operand_simm4_encode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    $0xf,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Operand_simm4_encode>:
andl   $0xf,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Operand_simm4_encode(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = and i32 %7, 15
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = load i32*, i32** %2
store i32 %9, i32* %10
ret i32 0
}

LLVM IR (-O2):
define i32 @Operand_simm4_encode(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 15
store i32 %3, i32* %0
ret i32 0
}
int num_diagnostics(void) { return (8); }


x86 assembly (clang, -O0):
<num_diagnostics>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<num_diagnostics>:
mov    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @num_diagnostics() {
ret i32 8
}

LLVM IR (-O2):
define i32 @num_diagnostics() {
ret i32 8
}
int set_int(char *opt, char *optarg, void *arg) {
  *((int *)arg) = 1;
  return 0;
}


x86 assembly (clang, -O0):
<set_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movl   $0x1,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_int>:
movl   $0x1,(%rdx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @set_int(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = bitcast i8* %7 to i32*
store i32 1, i32* %8
ret i32 0
}

LLVM IR (-O2):
define i32 @set_int(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture writeonly %2) {
%4 = bitcast i8* %2 to i32*
store i32 1, i32* %4
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128d;
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_loadr_pd(void *);
__m128d test_loadr_pd(__m128 x, void *y) { return _mm_loadr_pd(y); }


x86 assembly (clang, -O0):
<test_loadr_pd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <_mm_loadr_pd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_loadr_pd>:
mov    %rsi,%rdi
jmp    1030 <_mm_loadr_pd@plt>

LLVM IR (-O0):
define i32 @test_loadr_pd(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @_mm_loadr_pd(i8* %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @test_loadr_pd(i32 %0, i8* %1) {
%3 = tail call i32 @_mm_loadr_pd(i8* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ atof(char *);
int /*<<< orphan*/ batwarn_set_gamma(int /*<<< orphan*/);
int main(int argc, char **argv) {
  if (argc < 2)
    return 1;
  batwarn_set_gamma(atof(argv[1]));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    114c <main+0x2c>
movl   $0x1,-0x4(%rbp)
jmp    1167 <main+0x47>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <atof@plt>
mov    %eax,%edi
call   1040 <batwarn_set_gamma@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
cmp    $0x2,%edi
jl     1141 <main+0x21>
push   %rax
mov    0x8(%rsi),%rdi
call   1030 <atof@plt>
mov    %eax,%edi
call   1040 <batwarn_set_gamma@plt>
xor    %eax,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 2
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 1, i32* %3
br label %15
9: ; preds = %2
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 1
%12 = load i8*, i8** %11
%13 = call i32 @atof(i8* %12)
%14 = call i32 @batwarn_set_gamma(i32 %13)
store i32 0, i32* %3
br label %15
15: ; preds = %9, %8
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = tail call i32 @atof(i8* %6)
%8 = tail call i32 @batwarn_set_gamma(i32 %7)
br label %9
9: ; preds = %2, %4
%10 = phi i32 [ 0, %4 ], [ 1, %2 ]
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ XwcTextItem;

/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ free(int /*<<< orphan*/ *);
void free_XwcTextItem(void *_p) {
  if (_p == NULL)
    abort();
  free((XwcTextItem *)_p);
}


x86 assembly (clang, -O0):
<free_XwcTextItem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113e <free_XwcTextItem+0x1e>
mov    $0x0,%al
call   1040 <abort@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_XwcTextItem>:
test   %rdi,%rdi
je     112a <free_XwcTextItem+0xa>
jmp    1030 <free@plt>
push   %rax
xor    %eax,%eax
call   1040 <abort@plt>

LLVM IR (-O0):
define void @free_XwcTextItem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @abort()
unreachable
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = bitcast i8* %8 to i32*
%10 = call i32 @free(i32* %9)
ret void
}

LLVM IR (-O2):
define void @free_XwcTextItem(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %1
%6 = bitcast i8* %0 to i32*
%7 = tail call i32 @free(i32* %6)
ret void
}
/* Variables and functions */
int gcd(int, int);
unsigned long long int lcm(int a, int b) {
  unsigned long long int lc = (a * b) / gcd(a, b);
  return lc;
}


x86 assembly (clang, -O0):
<lcm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <gcd@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
cltd
idiv   %ecx
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcm>:
push   %rbx
mov    %esi,%ebx
imul   %edi,%ebx
call   1030 <gcd@plt>
mov    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
cltq
pop    %rbx
ret

LLVM IR (-O0):
define i64 @lcm(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = mul nsw i32 %6, %7
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = call i32 @gcd(i32 %9, i32 %10)
%12 = sdiv i32 %8, %11
%13 = sext i32 %12 to i64
store i64 %13, i64* %5
%14 = load i64, i64* %5
ret i64 %14
}

LLVM IR (-O2):
define i64 @lcm(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
%4 = tail call i32 @gcd(i32 %0, i32 %1)
%5 = sdiv i32 %3, %4
%6 = sext i32 %5 to i64
ret i64 %6
}
void do_empty(void) {}


x86 assembly (clang, -O0):
<do_empty>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_empty>:
ret

LLVM IR (-O0):
define void @do_empty() {
ret void
}

LLVM IR (-O2):
define void @do_empty() {
ret void
}
int test_imm_96uint32_reg(unsigned int val) {
  return ((val) & (0x96 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_96uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x96,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_96uint32_reg>:
test   $0x96,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_96uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 150
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_96uint32_reg(i32 %0) {
%2 = and i32 %0, 150
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
unsigned long QEIPositionGet(unsigned long ulBase) {
  ;
  return ((*((volatile unsigned long *)(ulBase + 0x00000008))));
}


x86 assembly (clang, -O0):
<QEIPositionGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<QEIPositionGet>:
mov    0x8(%rdi),%rax
ret

LLVM IR (-O0):
define i64 @QEIPositionGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 8
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @QEIPositionGet(i64 %0) {
%2 = add i64 %0, 8
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
ret i64 %4
}
int xa2() {}


x86 assembly (clang, -O0):
<xa2>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xa2>:
ret

LLVM IR (-O0):
define i32 @xa2() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @xa2() {
ret i32 undef
}
double PopulationMoyenne(double *temps, double *nombre) {
  double moyenne = 0;
  int i = 1;
  while (temps[i++] != 0.0) {
  }
}


x86 assembly (clang, -O0):
<PopulationMoyenne>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x20(%rbp)
movl   $0x1,-0x24(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x24(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0x24(%rbp)
movslq %ecx,%rcx
movsd  (%rax,%rcx,8),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    114a <PopulationMoyenne+0x4a>
jp     114a <PopulationMoyenne+0x4a>
jmp    114f <PopulationMoyenne+0x4f>
jmp    111b <PopulationMoyenne+0x1b>
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<PopulationMoyenne>:
ret

LLVM IR (-O0):
define double @PopulationMoyenne(double* %0, double* %1) {
%3 = alloca double
%4 = alloca double*
%5 = alloca double*
%6 = alloca double
%7 = alloca i32
store double* %0, double** %4
store double* %1, double** %5
store double 0.000000e+00, double* %6
store i32 1, i32* %7
br label %8
8: ; preds = %16, %2
%9 = load double*, double** %4
%10 = load i32, i32* %7
%11 = add nsw i32 %10, 1
store i32 %11, i32* %7
%12 = sext i32 %10 to i64
%13 = getelementptr inbounds double, double* %9, i64 %12
%14 = load double, double* %13
%15 = fcmp une double %14, 0.000000e+00
br i1 %15, label %16, label %17
16: ; preds = %8
br label %8
17: ; preds = %8
%18 = load double, double* %3
ret double %18
}

LLVM IR (-O2):
define double @PopulationMoyenne(double* nocapture %0, double* nocapture readnone %1) {
ret double undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ fill_target_address(int /*<<< orphan*/ *, void const *);
int /*<<< orphan*/ i2c_receive(int, void *, size_t, int);
int /*<<< orphan*/ i2c_transmit(int, int /*<<< orphan*/ *, int, int);
void eeprom_read_block(void *buf, const void *addr, size_t len) {
  uint8_t complete_packet[2];
  fill_target_address(complete_packet, addr);
  i2c_transmit((0b10100000), complete_packet, 2, 100);
  i2c_receive((0b10100000), buf, len, 100);
}


x86 assembly (clang, -O0):
<eeprom_read_block>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <fill_target_address@plt>
lea    -0x20(%rbp),%rsi
mov    $0xa0,%edi
mov    $0x2,%edx
mov    $0x64,%ecx
call   1050 <i2c_transmit@plt>
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    $0xa0,%edi
mov    $0x64,%ecx
call   1030 <i2c_receive@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eeprom_read_block>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rdx,%r14
mov    %rdi,%rbx
lea    0x8(%rsp),%r15
mov    %r15,%rdi
call   1040 <fill_target_address@plt>
mov    $0xa0,%edi
mov    %r15,%rsi
mov    $0x2,%edx
mov    $0x64,%ecx
call   1050 <i2c_transmit@plt>
mov    $0xa0,%edi
mov    %rbx,%rsi
mov    %r14,%rdx
mov    $0x64,%ecx
call   1030 <i2c_receive@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @eeprom_read_block(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca [2 x i32]
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 0
%9 = load i8*, i8** %5
%10 = call i32 @fill_target_address(i32* %8, i8* %9)
%11 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 0
%12 = call i32 @i2c_transmit(i32 160, i32* %11, i32 2, i32 100)
%13 = load i8*, i8** %4
%14 = load i64, i64* %6
%15 = call i32 @i2c_receive(i32 160, i8* %13, i64 %14, i32 100)
ret void
}

LLVM IR (-O2):
define void @eeprom_read_block(i8* %0, i8* %1, i64 %2) {
%4 = alloca [2 x i32]
%5 = bitcast [2 x i32]* %4 to i8*
%6 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 0
%7 = call i32 @fill_target_address(i32* %6, i8* %1)
%8 = call i32 @i2c_transmit(i32 160, i32* %6, i32 2, i32 100)
%9 = call i32 @i2c_receive(i32 160, i8* %0, i64 %2, i32 100)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0xf6() {
  Assert_real((isalpha(246) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              1235, ("isalpha should be 0 for 0xf6"));
}


x86 assembly (clang, -O0):
<t_isalpha_0xf6>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf6,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4d3,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0xf6>:
push   %rax
mov    $0xf6,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4d3,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xf6\00"
define void @t_isalpha_0xf6() {
%1 = call i64 @isalpha(i32 246)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1235, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xf6\00"
define void @t_isalpha_0xf6() {
%1 = tail call i64 @isalpha(i32 246)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1235, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
char *langDbgDevMegaRam() { return "Mega RAM"; }


x86 assembly (clang, -O0):
<langDbgDevMegaRam>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langDbgDevMegaRam>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [9 x i8] c"Mega RAM\00"
define i8* @langDbgDevMegaRam() {
ret i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [9 x i8] c"Mega RAM\00"
define i8* @langDbgDevMegaRam() {
ret i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
char *findenv(char *, int);
char *getshell() {
  register char *p;
  if ((p = findenv("SHELL", sizeof("SHELL"))) == (char *)0)
    p = "/bin/sh";
  return p;
}


x86 assembly (clang, -O0):
<getshell>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
mov    $0x6,%esi
call   1030 <findenv@plt>
mov    %rax,-0x8(%rbp)
cmp    $0x0,%rax
jne    1142 <getshell+0x32>
lea    0xec8(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getshell>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x6,%esi
call   1030 <findenv@plt>
test   %rax,%rax
lea    0xeda(%rip),%rcx
cmove  %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"SHELL\00"
@.str.1 = [8 x i8] c"/bin/sh\00"
define i8* @getshell() {
%1 = alloca i8*
%2 = call i8* @findenv(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 6)
store i8* %2, i8** %1
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %5
4: ; preds = %0
store i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i8** %1
br label %5
5: ; preds = %4, %0
%6 = load i8*, i8** %1
ret i8* %6
}

LLVM IR (-O2):
@.str = [6 x i8] c"SHELL\00"
@.str.1 = [8 x i8] c"/bin/sh\00"
define i8* @getshell() {
%1 = tail call i8* @findenv(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 6)
%2 = icmp eq i8* %1, null
%3 = select i1 %2, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i8* %1
ret i8* %3
}
__attribute__((deprecated)) int snd_device_name_free_hint(void **hints) {
  return 0;
}


x86 assembly (clang, -O0):
<snd_device_name_free_hint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<snd_device_name_free_hint>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @snd_device_name_free_hint(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @snd_device_name_free_hint(i8** nocapture readnone %0) {
ret i32 0
}
unsigned long TimerCapture4Get(unsigned long ulBase) {

  ;
  return (*((volatile unsigned long *)(ulBase + 0x00000040)));
}


x86 assembly (clang, -O0):
<TimerCapture4Get>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x40(%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerCapture4Get>:
mov    0x40(%rdi),%rax
ret

LLVM IR (-O0):
define i64 @TimerCapture4Get(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 64
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @TimerCapture4Get(i64 %0) {
%2 = add i64 %0, 64
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
ret i64 %4
}