xunge/DecIR huggingface dataset:
/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ strcpy(char *, char *);
char *_strdup(char *s) {
  char *p;
  p = malloc(sizeof(strlen(s)) + 1);
  if (p != NULL) {
    strcpy(p, s);
  }
  return p;
}


x86 assembly (clang, -O0):
<_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x9,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1152 <_strdup+0x32>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_strdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    $0x9,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1144 <_strdup+0x24>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = call i8* @malloc(i32 9)
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = load i8*, i8** %2
%10 = call i32 @strcpy(i8* %8, i8* %9)
br label %11
11: ; preds = %7, %1
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define i8* @_strdup(i8* %0) {
%2 = tail call dereferenceable_or_null(9) i8* @malloc(i32 9)
%3 = icmp eq i8* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @strcpy(i8* %2, i8* %0)
br label %6
6: ; preds = %4, %1
ret i8* %2
}
void ff_hevc_put_hevc_uni_w_epel_hv8_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_epel_hv8_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_epel_hv8_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_epel_hv8_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_epel_hv8_10_sse4() {
ret void
}
int func1(int i, int j, ...) {}


x86 assembly (clang, -O0):
<func1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func1>:
ret

LLVM IR (-O0):
define i32 @func1(i32 %0, i32 %1, ...) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @func1(i32 %0, i32 %1, ...) {
ret i32 undef
}
/* Variables and functions */
void MSDsort(unsigned char **, size_t);
void msd_nilsson(unsigned char **strings, size_t n) {
  return MSDsort(strings, n);
}


x86 assembly (clang, -O0):
<msd_nilsson>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <MSDsort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msd_nilsson>:
jmp    1030 <MSDsort@plt>

LLVM IR (-O0):
define void @msd_nilsson(i8** %0, i64 %1) {
%3 = alloca i8**
%4 = alloca i64
store i8** %0, i8*** %3
store i64 %1, i64* %4
%5 = load i8**, i8*** %3
%6 = load i64, i64* %4
ret void
}

LLVM IR (-O2):
define void @msd_nilsson(i8** %0, i64 %1) {
tail call void @MSDsort(i8** %0, i64 %1)
ret void
}
/* Variables and functions */
char *strrchr(char const *, char);
char *basename(const char *name) {
  const char *base = strrchr(name, '/');
  if (base)
    return (char *)base + 1;
  return (char *)name;
}


x86 assembly (clang, -O0):
<basename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x2f,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     114a <basename+0x3a>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1152 <basename+0x42>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<basename>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2f,%esi
call   1030 <strrchr@plt>
lea    0x1(%rax),%rcx
test   %rax,%rax
cmove  %rbx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @basename(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i8* @strrchr(i8* %5, i8 signext 47)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i64 1
store i8* %11, i8** %2
br label %14
12: ; preds = %1
%13 = load i8*, i8** %3
store i8* %13, i8** %2
br label %14
14: ; preds = %12, %9
%15 = load i8*, i8** %2
ret i8* %15
}

LLVM IR (-O2):
define i8* @basename(i8* %0) {
%2 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 47)
%3 = icmp eq i8* %2, null
%4 = getelementptr inbounds i8, i8* %2, i64 1
%5 = select i1 %3, i8* %0, i8* %4
ret i8* %5
}
int nonblank(s)
char *s;
{
  char *p;
  p = s;
  while ((*p != ' ') & (*p != '\0'))
    p++;
  return (p - s);
}


x86 assembly (clang, -O0):
<nonblank>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    $0x0,%ecx
setne  %cl
and    $0x1,%cl
movzbl %cl,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     1151 <nonblank+0x51>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <nonblank+0x10>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nonblank>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
testb  $0xdf,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <nonblank+0x10>
ret

LLVM IR (-O0):
define i32 @nonblank(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %18, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 32
%10 = zext i1 %9 to i32
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp ne i32 %13, 0
%15 = zext i1 %14 to i32
%16 = and i32 %10, %15
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %21
18: ; preds = %5
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %3
br label %5
21: ; preds = %5
%22 = load i8*, i8** %3
%23 = load i8*, i8** %2
%24 = ptrtoint i8* %22 to i64
%25 = ptrtoint i8* %23 to i64
%26 = sub i64 %24, %25
%27 = trunc i64 %26 to i32
ret i32 %27
}

LLVM IR (-O2):
define i32 @nonblank(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %7, %2 ]
%4 = load i8, i8* %3
%5 = and i8 %4, -33
%6 = icmp eq i8 %5, 0
%7 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = ptrtoint i8* %3 to i64
%10 = ptrtoint i8* %0 to i64
%11 = sub i64 %9, %10
%12 = trunc i64 %11 to i32
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
int strlen(char *);
int strappnd(char *s1, char *s2) {
  strcpy(s1, s2);
  return strlen(s1);
}


x86 assembly (clang, -O0):
<strappnd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strappnd>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strcpy@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <strlen@plt>

LLVM IR (-O0):
define i32 @strappnd(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcpy(i8* %5, i8* %6)
%8 = load i8*, i8** %3
%9 = call i32 @strlen(i8* %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @strappnd(i8* %0, i8* %1) {
%3 = tail call i32 @strcpy(i8* %0, i8* %1)
%4 = tail call i32 @strlen(i8* %0)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void dispsynt(char **argv) {
  fprintf(stderr, "Syntax: %s i_sacs stftype [-imas] [-gfdir] [-h]\n", argv[0]);
}


x86 assembly (clang, -O0):
<dispsynt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
lea    0xecd(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dispsynt>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%eax
mov    (%rdi),%rdx
lea    0xedd(%rip),%rsi
mov    %eax,%edi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [49 x i8] c"Syntax: %s i_sacs stftype [-imas] [-gfdir] [-h]\0A\00"
define void @dispsynt(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i32, i32* @stderr
%4 = load i8**, i8*** %2
%5 = getelementptr inbounds i8*, i8** %4, i64 0
%6 = load i8*, i8** %5
%7 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0), i8* %6)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [49 x i8] c"Syntax: %s i_sacs stftype [-imas] [-gfdir] [-h]\0A\00"
define void @dispsynt(i8** nocapture %0) {
%2 = load i32, i32* @stderr
%3 = load i8*, i8** %0
%4 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}
void smp_fill_possible_mask(void) {}


x86 assembly (clang, -O0):
<smp_fill_possible_mask>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smp_fill_possible_mask>:
ret

LLVM IR (-O0):
define void @smp_fill_possible_mask() {
ret void
}

LLVM IR (-O2):
define void @smp_fill_possible_mask() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("#undef HAVE_GETTIME /* no - no SGI_CYCLE and no REALTIME */\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [61 x i8] c"#undef HAVE_GETTIME /* no - no SGI_CYCLE and no REALTIME */\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [60 x i8] c"#undef HAVE_GETTIME /* no - no SGI_CYCLE and no REALTIME */\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([60 x i8], [60 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int sqrt(float);
float image_rmse(float mse) { return sqrt(mse) * 255; }


x86 assembly (clang, -O0):
<image_rmse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sqrt@plt>
imul   $0xff,%eax,%eax
cvtsi2ss %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<image_rmse>:
push   %rax
call   1030 <sqrt@plt>
mov    %eax,%ecx
shl    $0x8,%ecx
sub    %eax,%ecx
xorps  %xmm0,%xmm0
cvtsi2ss %ecx,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @image_rmse(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 @sqrt(float %3)
%5 = mul nsw i32 %4, 255
%6 = sitofp i32 %5 to float
ret float %6
}

LLVM IR (-O2):
define float @image_rmse(float %0) {
%2 = tail call i32 @sqrt(float %0)
%3 = mul nsw i32 %2, 255
%4 = sitofp i32 %3 to float
ret float %4
}
/* Variables and functions */
int compared2(long const *, long const *);
int __gtdf2(double a, double b) {
  return compared2(((const long *)&a), ((const long *)&b));
}


x86 assembly (clang, -O0):
<__gtdf2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
lea    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <compared2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__gtdf2>:
sub    $0x18,%rsp
movsd  %xmm0,0x10(%rsp)
movsd  %xmm1,0x8(%rsp)
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rsi
call   1030 <compared2@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @__gtdf2(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = bitcast double* %3 to i64*
%6 = bitcast double* %4 to i64*
%7 = call i32 @compared2(i64* %5, i64* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @__gtdf2(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = bitcast double* %3 to i64*
%6 = bitcast double* %4 to i64*
%7 = call i32 @compared2(i64* %5, i64* %6)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void app_error(char *msg) {
  fprintf(stderr, "%s\n", msg);
  exit(1);
}


x86 assembly (clang, -O0):
<app_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<app_error>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @app_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @app_error(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int /*<<< orphan*/ ce_utf8_strlen(char const *);
int64_t match_python_comment(const char *str) {
  if (*str == '#')
    return ce_utf8_strlen(str);
  return 0;
}


x86 assembly (clang, -O0):
<match_python_comment>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x23,%eax
jne    113d <match_python_comment+0x2d>
mov    -0x10(%rbp),%rdi
call   1030 <ce_utf8_strlen@plt>
mov    %eax,-0x4(%rbp)
jmp    1144 <match_python_comment+0x34>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<match_python_comment>:
cmpb   $0x23,(%rdi)
jne    111a <match_python_comment+0xa>
jmp    1030 <ce_utf8_strlen@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @match_python_comment(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, 35
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i32 @ce_utf8_strlen(i8* %9)
store i32 %10, i32* %2
br label %12
11: ; preds = %1
store i32 0, i32* %2
br label %12
12: ; preds = %11, %8
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @match_python_comment(i8* %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 35
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @ce_utf8_strlen(i8* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ %5, %4 ], [ 0, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x4c() {
  Assert_real((isspace(76) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              385, ("isspace should be 0 for L"));
}


x86 assembly (clang, -O0):
<t_isspace_0x4c>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4c,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x181,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x4c>:
push   %rax
mov    $0x4c,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x181,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for L\00"
define void @t_isspace_0x4c() {
%1 = call i64 @isspace(i32 76)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 385, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for L\00"
define void @t_isspace_0x4c() {
%1 = tail call i64 @isspace(i32 76)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 385, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isgraph(int);
void t_isgraph_0xbc() {
  Assert_real((isgraph(188) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              945, ("isgraph should be 0 for 0xbc"));
}


x86 assembly (clang, -O0):
<t_isgraph_0xbc>:
push   %rbp
mov    %rsp,%rbp
mov    $0xbc,%edi
call   1040 <isgraph@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3b1,%edx
lea    0xf5b(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0xbc>:
push   %rax
mov    $0xbc,%edi
call   1040 <isgraph@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3b1,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0xbc\00"
define void @t_isgraph_0xbc() {
%1 = call i64 @isgraph(i32 188)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 945, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0xbc\00"
define void @t_isgraph_0xbc() {
%1 = tail call i64 @isgraph(i32 188)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 945, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
set_g2(g2, fc) float *g2, *fc;
{
  float f;
  f = (1.0) / (*fc);
  *g2 = ((2.0) * f - f * f) / (((1.0) - f) * ((1.0) - f));
}


x86 assembly (clang, -O0):
<set_g2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movss  (%rax),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xee0(%rip),%xmm0
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  -0x1c(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movss  -0x1c(%rbp),%xmm1
mulss  -0x1c(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
addsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
movss  -0x1c(%rbp),%xmm1
cvtss2sd %xmm1,%xmm2
movsd  0xe8c(%rip),%xmm1
subsd  %xmm2,%xmm1
movss  -0x1c(%rbp),%xmm2
cvtss2sd %xmm2,%xmm3
movsd  0xe77(%rip),%xmm2
subsd  %xmm3,%xmm2
mulsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_g2>:
movss  0xef8(%rip),%xmm0
divss  (%rsi),%xmm0
cvtss2sd %xmm0,%xmm1
mulss  %xmm0,%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xee8(%rip),%xmm2
subsd  %xmm1,%xmm2
addsd  %xmm1,%xmm1
subsd  %xmm0,%xmm1
mulsd  %xmm2,%xmm2
divsd  %xmm2,%xmm1
xorps  %xmm0,%xmm0
cvtsd2ss %xmm1,%xmm0
movss  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define i32 @set_g2(float* %0, float* %1) {
%3 = alloca i32
%4 = alloca float*
%5 = alloca float*
%6 = alloca float
store float* %0, float** %4
store float* %1, float** %5
%7 = load float*, float** %5
%8 = load float, float* %7
%9 = fpext float %8 to double
%10 = fdiv double 1.000000e+00, %9
%11 = fptrunc double %10 to float
store float %11, float* %6
%12 = load float, float* %6
%13 = fpext float %12 to double
%14 = load float, float* %6
%15 = load float, float* %6
%16 = fmul float %14, %15
%17 = fpext float %16 to double
%18 = fneg double %17
%19 = call double @llvm.fmuladd.f64(double 2.000000e+00, double %13, double %18)
%20 = load float, float* %6
%21 = fpext float %20 to double
%22 = fsub double 1.000000e+00, %21
%23 = load float, float* %6
%24 = fpext float %23 to double
%25 = fsub double 1.000000e+00, %24
%26 = fmul double %22, %25
%27 = fdiv double %19, %26
%28 = fptrunc double %27 to float
%29 = load float*, float** %4
store float %28, float* %29
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @set_g2(float* nocapture writeonly %0, float* nocapture %1) {
%3 = load float, float* %1
%4 = fdiv float 1.000000e+00, %3
%5 = fpext float %4 to double
%6 = fmul float %4, %4
%7 = fpext float %6 to double
%8 = fneg double %7
%9 = tail call double @llvm.fmuladd.f64(double %5, double 2.000000e+00, double %8)
%10 = fsub double 1.000000e+00, %5
%11 = fmul double %10, %10
%12 = fdiv double %9, %11
%13 = fptrunc double %12 to float
store float %13, float* %0
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *stdin;
FILE *get_stdin(void) { return stdin; }


x86 assembly (clang, -O0):
<get_stdin>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_stdin>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%rax
ret

LLVM IR (-O0):
@stdin = global i32* null
define i32* @get_stdin() {
%1 = load i32*, i32** @stdin
ret i32* %1
}

LLVM IR (-O2):
@stdin = global i32* null
define i32* @get_stdin() {
%1 = load i32*, i32** @stdin
ret i32* %1
}
unsigned short fn2(unsigned short a) { return a >> ~6; }


x86 assembly (clang, -O0):
<fn2>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
mov    $0xfffffff9,%ecx
sar    %cl,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn2>:
ret

LLVM IR (-O0):
define zeroext i16 @fn2(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = ashr i32 %4, -7
%6 = trunc i32 %5 to i16
ret i16 %6
}

LLVM IR (-O2):
define zeroext i16 @fn2(i16 zeroext %0) {
ret i16 poison
}
void rtc_proc_add_device(struct rtc_device *rtc) {}


x86 assembly (clang, -O0):
<rtc_proc_add_device>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtc_proc_add_device>:
ret

LLVM IR (-O0):
%struct.rtc_device = type opaque
define void @rtc_proc_add_device(%struct.rtc_device* %0) {
%2 = alloca %struct.rtc_device*
store %struct.rtc_device* %0, %struct.rtc_device** %2
ret void
}

LLVM IR (-O2):
%struct.rtc_device = type opaque
define void @rtc_proc_add_device(%struct.rtc_device* nocapture %0) {
ret void
}
char *BigSubtract(char *num1, char *num2) { return ""; }


x86 assembly (clang, -O0):
<BigSubtract>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeed(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BigSubtract>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @BigSubtract(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @BigSubtract(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ errno;
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *, char *);
char *strerror(int /*<<< orphan*/);
void perror_exit(char *str) {
  printf("%s: %s\n", str, strerror(errno));
  exit(1);
}


x86 assembly (clang, -O0):
<perror_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    0x2e95(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
mov    -0x10(%rbp),%rsi
mov    %rax,%rdx
lea    0xea0(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<perror_exit>:
push   %rbx
mov    %rdi,%rbx
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
lea    0xeb7(%rip),%rdi
mov    %rbx,%rsi
mov    %rax,%rdx
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"%s: %s\0A\00"
@errno = global i32 0
define void @perror_exit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @errno
%5 = call i8* @strerror(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %3, i8* %5)
%7 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [8 x i8] c"%s: %s\0A\00"
@errno = global i32 0
define void @perror_exit(i8* %0) {
%2 = load i32, i32* @errno
%3 = tail call i8* @strerror(i32 %2)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %3)
%5 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int min(int a, int b) { return a < b ? a : b; }


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <min+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <min+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ _bytecode_write(int, int /*<<< orphan*/, int /*<<< orphan*/,
                                   int /*<<< orphan*/, int /*<<< orphan*/,
                                   int /*<<< orphan*/);
uint32_t bytecode_ret() { return _bytecode_write(12, 0, 0, 0, 0, 0); }


x86 assembly (clang, -O0):
<bytecode_ret>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc,%edi
xor    %r9d,%r9d
mov    %r9d,%esi
mov    %r9d,%edx
mov    %r9d,%ecx
mov    %r9d,%r8d
call   1030 <_bytecode_write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bytecode_ret>:
mov    $0xc,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <_bytecode_write@plt>

LLVM IR (-O0):
define i32 @bytecode_ret() {
%1 = call i32 @_bytecode_write(i32 12, i32 0, i32 0, i32 0, i32 0, i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @bytecode_ret() {
%1 = tail call i32 @_bytecode_write(i32 12, i32 0, i32 0, i32 0, i32 0, i32 0)
ret i32 %1
}
void func2(int *a) {
  if (!a)
    return;
  else
    *a = 200;
}


x86 assembly (clang, -O0):
<func2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1118 <func2+0x18>
jmp    1122 <func2+0x22>
mov    -0x8(%rbp),%rax
movl   $0xc8,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<func2>:
test   %rdi,%rdi
je     110b <func2+0xb>
movl   $0xc8,(%rdi)
ret

LLVM IR (-O0):
define void @func2(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = icmp ne i32* %3, null
br i1 %4, label %6, label %5
5: ; preds = %1
br label %8
6: ; preds = %1
%7 = load i32*, i32** %2
store i32 200, i32* %7
br label %8
8: ; preds = %5, %6
ret void
}

LLVM IR (-O2):
define void @func2(i32* writeonly %0) {
%2 = icmp eq i32* %0, null
br i1 %2, label %4, label %3
3: ; preds = %1
store i32 200, i32* %0
br label %4
4: ; preds = %1, %3
ret void
}
/* Variables and functions */
scalar_t__ bar(int);
int foo(int i) {
  if (bar(i)) {
    return i;
  } else {
    return -i;
  }
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <bar@plt>
cmp    $0x0,%rax
je     1138 <foo+0x28>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1140 <foo+0x30>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbx
mov    %edi,%ebx
call   1030 <bar@plt>
mov    %ebx,%ecx
neg    %ecx
test   %rax,%rax
cmovne %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @bar(i32 %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i32, i32* %3
store i32 %8, i32* %2
br label %12
9: ; preds = %1
%10 = load i32, i32* %3
%11 = sub nsw i32 0, %10
store i32 %11, i32* %2
br label %12
12: ; preds = %9, %7
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = tail call i64 @bar(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = sub nsw i32 0, %0
%5 = select i1 %3, i32 %4, i32 %0
ret i32 %5
}
void bu_compile_zerop(args) struct conscell *args;
{
  int n = bu_compile_arg_list(args);
  if (n != 1)
    goto er;
  EMIT1ATM("ZEROP");
  EMITEND();
  return;
er:
  cerror("zerop: wrong # of args", args);
}


x86 assembly (clang, -O0):
<bu_compile_zerop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <bu_compile_arg_list@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
je     1169 <bu_compile_zerop+0x29>
jmp    1183 <bu_compile_zerop+0x43>
lea    0xe90(%rip),%rdi
mov    $0x0,%al
call   1050 <EMIT1ATM@plt>
mov    $0x0,%al
call   1030 <EMITEND@plt>
jmp    1195 <bu_compile_zerop+0x55>
mov    -0x8(%rbp),%rsi
lea    0xe78(%rip),%rdi
mov    $0x0,%al
call   1060 <cerror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bu_compile_zerop>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <bu_compile_arg_list@plt>
cmp    $0x1,%eax
jne    1166 <bu_compile_zerop+0x26>
lea    0xea9(%rip),%rdi
xor    %eax,%eax
call   1050 <EMIT1ATM@plt>
xor    %eax,%eax
pop    %rbx
jmp    1030 <EMITEND@plt>
lea    0xe99(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
pop    %rbx
jmp    1060 <cerror@plt>

LLVM IR (-O0):
%struct.conscell = type opaque
@.str = [6 x i8] c"ZEROP\00"
@.str.1 = [23 x i8] c"zerop: wrong # of args\00"
define void @bu_compile_zerop(%struct.conscell* %0) {
%2 = alloca %struct.conscell*
%3 = alloca i32
store %struct.conscell* %0, %struct.conscell** %2
%4 = load %struct.conscell*, %struct.conscell** %2
%5 = call i32 (%struct.conscell*, ...) bitcast (i32 (...)* @bu_compile_arg_list to i32 (%struct.conscell*, ...)*)(%struct.conscell* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %1
br label %12
9: ; preds = %1
%10 = call i32 (i8*, ...) bitcast (i32 (...)* @EMIT1ATM to i32 (i8*, ...)*)(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%11 = call i32 (...) @EMITEND()
br label %15
12: ; preds = %8
%13 = load %struct.conscell*, %struct.conscell** %2
%14 = call i32 (i8*, %struct.conscell*, ...) bitcast (i32 (...)* @cerror to i32 (i8*, %struct.conscell*, ...)*)(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), %struct.conscell* %13)
br label %15
15: ; preds = %12, %9
ret void
}

LLVM IR (-O2):
%struct.conscell = type opaque
@.str = [6 x i8] c"ZEROP\00"
@.str.1 = [23 x i8] c"zerop: wrong # of args\00"
define void @bu_compile_zerop(%struct.conscell* %0) {
%2 = tail call i32 (%struct.conscell*, ...) bitcast (i32 (...)* @bu_compile_arg_list to i32 (%struct.conscell*, ...)*)(%struct.conscell* %0)
%3 = icmp eq i32 %2, 1
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 (i8*, ...) bitcast (i32 (...)* @EMIT1ATM to i32 (i8*, ...)*)(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 (...) @EMITEND()
br label %9
7: ; preds = %1
%8 = tail call i32 (i8*, %struct.conscell*, ...) bitcast (i32 (...)* @cerror to i32 (i8*, %struct.conscell*, ...)*)(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), %struct.conscell* %0)
br label %9
9: ; preds = %7, %4
ret void
}
/* Type definitions */
struct whoami_args_info {
  int dummy;
};

/* Variables and functions */
int EXIT_SUCCESS;
int whoami_cmdline_parser_required(struct whoami_args_info *args_info,
                                   const char *prog_name) {
  (void)(args_info);
  (void)(prog_name);
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<whoami_cmdline_parser_required>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ecd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<whoami_cmdline_parser_required>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
%struct.whoami_args_info = type { i32 }
@EXIT_SUCCESS = global i32 0
define i32 @whoami_cmdline_parser_required(%struct.whoami_args_info* %0, i8* %1) {
%3 = alloca %struct.whoami_args_info*
%4 = alloca i8*
store %struct.whoami_args_info* %0, %struct.whoami_args_info** %3
store i8* %1, i8** %4
%5 = load %struct.whoami_args_info*, %struct.whoami_args_info** %3
%6 = load i8*, i8** %4
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}

LLVM IR (-O2):
%struct.whoami_args_info = type { i32 }
@EXIT_SUCCESS = global i32 0
define i32 @whoami_cmdline_parser_required(%struct.whoami_args_info* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ SYS_gettid;
int /*<<< orphan*/ syscall(int /*<<< orphan*/);
pid_t __gettid(void) { return syscall(SYS_gettid); }


x86 assembly (clang, -O0):
<__gettid>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <syscall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__gettid>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@SYS_gettid = global i32 0
define i32 @__gettid() {
%1 = load i32, i32* @SYS_gettid
%2 = call i32 @syscall(i32 %1)
ret i32 %2
}

LLVM IR (-O2):
@SYS_gettid = global i32 0
define i32 @__gettid() {
%1 = load i32, i32* @SYS_gettid
%2 = tail call i32 @syscall(i32 %1)
ret i32 %2
}
int trlang_init(void) { return 0; }


x86 assembly (clang, -O0):
<trlang_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<trlang_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @trlang_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @trlang_init() {
ret i32 0
}
int get_demux_index(unsigned int dmxHandle) {
  return dmxHandle == 0x19800620 ? 0 : dmxHandle == 0x19800621 ? 1 : 2;
}


x86 assembly (clang, -O0):
<get_demux_index>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x19800620,-0x4(%rbp)
jne    111e <get_demux_index+0x1e>
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    1137 <get_demux_index+0x37>
mov    -0x4(%rbp),%edx
mov    $0x2,%eax
mov    $0x1,%ecx
cmp    $0x19800621,%edx
cmove  %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_demux_index>:
xor    %eax,%eax
cmp    $0x19800621,%edi
sete   %al
mov    $0x2,%ecx
sub    %eax,%ecx
xor    %eax,%eax
cmp    $0x19800620,%edi
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @get_demux_index(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 427820576
br i1 %4, label %5, label %6
5: ; preds = %1
br label %11
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp eq i32 %7, 427820577
%9 = zext i1 %8 to i64
%10 = select i1 %8, i32 1, i32 2
br label %11
11: ; preds = %6, %5
%12 = phi i32 [ 0, %5 ], [ %10, %6 ]
ret i32 %12
}

LLVM IR (-O2):
define i32 @get_demux_index(i32 %0) {
%2 = icmp eq i32 %0, 427820576
%3 = icmp eq i32 %0, 427820577
%4 = select i1 %3, i32 1, i32 2
%5 = select i1 %2, i32 0, i32 %4
ret i32 %5
}
/* Type definitions */
struct termios {
  int dummy;
};

/* Variables and functions */
int cfsetispeed(struct termios *, unsigned int);
int cfsetospeed(struct termios *, unsigned int);
int termios_cfsetspeed(struct termios *t, unsigned int b) {
  int val = cfsetispeed(t, b);
  if (val == 0)
    return cfsetospeed(t, b);
  cfsetospeed(t, b);
  return val;
}


x86 assembly (clang, -O0):
<termios_cfsetspeed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <cfsetispeed@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jne    115c <termios_cfsetspeed+0x3c>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <cfsetospeed@plt>
mov    %eax,-0x4(%rbp)
jmp    116e <termios_cfsetspeed+0x4e>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <cfsetospeed@plt>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<termios_cfsetspeed>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %rdi,%rbx
call   1040 <cfsetispeed@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
mov    %r14d,%esi
call   1030 <cfsetospeed@plt>
test   %ebp,%ebp
cmovne %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
%struct.termios = type { i32 }
define i32 @termios_cfsetspeed(%struct.termios* %0, i32 %1) {
%3 = alloca i32
%4 = alloca %struct.termios*
%5 = alloca i32
%6 = alloca i32
store %struct.termios* %0, %struct.termios** %4
store i32 %1, i32* %5
%7 = load %struct.termios*, %struct.termios** %4
%8 = load i32, i32* %5
%9 = call i32 @cfsetispeed(%struct.termios* %7, i32 %8)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %2
%13 = load %struct.termios*, %struct.termios** %4
%14 = load i32, i32* %5
%15 = call i32 @cfsetospeed(%struct.termios* %13, i32 %14)
store i32 %15, i32* %3
br label %21
16: ; preds = %2
%17 = load %struct.termios*, %struct.termios** %4
%18 = load i32, i32* %5
%19 = call i32 @cfsetospeed(%struct.termios* %17, i32 %18)
%20 = load i32, i32* %6
store i32 %20, i32* %3
br label %21
21: ; preds = %16, %12
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
%struct.termios = type { i32 }
define i32 @termios_cfsetspeed(%struct.termios* %0, i32 %1) {
%3 = tail call i32 @cfsetispeed(%struct.termios* %0, i32 %1)
%4 = icmp eq i32 %3, 0
%5 = tail call i32 @cfsetospeed(%struct.termios* %0, i32 %1)
%6 = select i1 %4, i32 %5, i32 %3
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void fgaj_level_string_free(char *s) {
  if (s[0] >= '0' && s[0] <= '9')
    free(s);
}


x86 assembly (clang, -O0):
<fgaj_level_string_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x30,%eax
jl     1145 <fgaj_level_string_free+0x35>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x39,%eax
jg     1145 <fgaj_level_string_free+0x35>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgaj_level_string_free>:
mov    (%rdi),%al
add    $0xd0,%al
cmp    $0x9,%al
ja     111d <fgaj_level_string_free+0xd>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @fgaj_level_string_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp sge i32 %6, 48
br i1 %7, label %8, label %17
8: ; preds = %1
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 0
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp sle i32 %12, 57
br i1 %13, label %14, label %17
14: ; preds = %8
%15 = load i8*, i8** %2
%16 = call i32 @free(i8* %15)
br label %17
17: ; preds = %14, %8, %1
ret void
}

LLVM IR (-O2):
define void @fgaj_level_string_free(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = add i8 %2, -48
%4 = icmp ult i8 %3, 10
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @free(i8* %0)
br label %7
7: ; preds = %5, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned char);
void bytes(void *b, size_t n) {
  size_t k = 0;
  for (k = 0; k < n; k++)
    printf("%x ", ((unsigned char *)b)[k]);
}


x86 assembly (clang, -O0):
<bytes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1167 <bytes+0x57>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
lea    0xeb3(%rip),%rdi
movzbl (%rax,%rcx,1),%esi
call   1030 <printf@plt>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1130 <bytes+0x20>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bytes>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %rsi,%rsi
je     1146 <bytes+0x36>
mov    %rsi,%r12
mov    %rdi,%r14
xor    %ebx,%ebx
lea    0xed4(%rip),%r15
nopl   0x0(%rax)
movzbl (%r14,%rbx,1),%esi
mov    %r15,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <bytes+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%x \00"
define void @bytes(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
store i64 0, i64* %5
store i64 0, i64* %5
br label %6
6: ; preds = %16, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i64, i64* %5
%13 = getelementptr inbounds i8, i8* %11, i64 %12
%14 = load i8, i8* %13
%15 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 zeroext %14)
br label %16
16: ; preds = %10
%17 = load i64, i64* %5
%18 = add i64 %17, 1
store i64 %18, i64* %5
br label %6
19: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%x \00"
define void @bytes(i8* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %11, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %9, %4 ], [ 0, %2 ]
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = load i8, i8* %6
%8 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 zeroext %7)
%9 = add nuw i64 %5, 1
%10 = icmp eq i64 %9, %1
br i1 %10, label %11, label %4
11: ; preds = %4, %2
ret void
}
unsigned xrop3_72_0_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D ^ T;
  stk1 = S & stk2;
  return (stk1 & S) | (stk1 & (~T)) | (T & (~S) & D);
}


x86 assembly (clang, -O0):
<xrop3_72_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x10(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_72_0_1>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%eax
shl    $0x8,%eax
or     %esi,%eax
xor    %esi,%eax
xor    $0xff,%eax
and    %ecx,%eax
xor    %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_72_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %7
%24 = xor i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %6
%26 = load i32, i32* %9
%27 = and i32 %25, %26
store i32 %27, i32* %8
%28 = load i32, i32* %8
%29 = load i32, i32* %6
%30 = and i32 %28, %29
%31 = load i32, i32* %8
%32 = load i32, i32* %7
%33 = xor i32 %32, -1
%34 = and i32 %31, %33
%35 = or i32 %30, %34
%36 = load i32, i32* %7
%37 = load i32, i32* %6
%38 = xor i32 %37, -1
%39 = and i32 %36, %38
%40 = load i32, i32* %5
%41 = and i32 %39, %40
%42 = or i32 %35, %41
ret i32 %42
}

LLVM IR (-O2):
define i32 @xrop3_72_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %6, 255
%8 = and i32 %7, %4
%9 = xor i32 %4, -1
%10 = and i32 %9, %5
%11 = or i32 %8, %10
ret i32 %11
}