xunge/DecIR huggingface dataset:
unsigned cdrom_fad_to_lba(unsigned fad) { return fad - 150; }


x86 assembly (clang, -O0):
<cdrom_fad_to_lba>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x96,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cdrom_fad_to_lba>:
lea    -0x96(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @cdrom_fad_to_lba(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub i32 %3, 150
ret i32 %4
}

LLVM IR (-O2):
define i32 @cdrom_fad_to_lba(i32 %0) {
%2 = add i32 %0, -150
ret i32 %2
}
/* Variables and functions */
scalar_t__ EAGAIN;
scalar_t__ EINPROGRESS;
scalar_t__ EWOULDBLOCK;
scalar_t__ errno;
int g_tcp_last_error_would_block(int sck) {
  return (errno == EWOULDBLOCK) || (errno == EAGAIN) || (errno == EINPROGRESS);
}


x86 assembly (clang, -O0):
<g_tcp_last_error_would_block>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    0x2eca(%rip),%rax
mov    (%rax),%rcx
mov    $0x1,%al
mov    0x2eb6(%rip),%rdx
cmp    (%rdx),%rcx
mov    %al,-0x5(%rbp)
je     115f <g_tcp_last_error_would_block+0x5f>
mov    0x2eab(%rip),%rax
mov    (%rax),%rcx
mov    $0x1,%al
mov    0x2e87(%rip),%rdx
cmp    (%rdx),%rcx
mov    %al,-0x5(%rbp)
je     115f <g_tcp_last_error_would_block+0x5f>
mov    0x2e8c(%rip),%rax
mov    (%rax),%rax
mov    0x2e92(%rip),%rcx
cmp    (%rcx),%rax
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_tcp_last_error_would_block>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%rax
mov    0x2ebf(%rip),%rcx
cmp    (%rcx),%rax
sete   %cl
mov    0x2ea2(%rip),%rdx
cmp    (%rdx),%rax
sete   %dl
or     %cl,%dl
mov    0x2ebb(%rip),%rcx
cmp    (%rcx),%rax
sete   %al
or     %dl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
@errno = global i64 0
@EWOULDBLOCK = global i64 0
@EAGAIN = global i64 0
@EINPROGRESS = global i64 0
define i32 @g_tcp_last_error_would_block(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i64, i64* @errno
%4 = load i64, i64* @EWOULDBLOCK
%5 = icmp eq i64 %3, %4
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = load i64, i64* @errno
%8 = load i64, i64* @EAGAIN
%9 = icmp eq i64 %7, %8
br i1 %9, label %14, label %10
10: ; preds = %6
%11 = load i64, i64* @errno
%12 = load i64, i64* @EINPROGRESS
%13 = icmp eq i64 %11, %12
br label %14
14: ; preds = %10, %6, %1
%15 = phi i1 [ true, %6 ], [ true, %1 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
@errno = global i64 0
@EWOULDBLOCK = global i64 0
@EAGAIN = global i64 0
@EINPROGRESS = global i64 0
define i32 @g_tcp_last_error_would_block(i32 %0) {
%2 = load i64, i64* @errno
%3 = load i64, i64* @EWOULDBLOCK
%4 = icmp eq i64 %2, %3
%5 = load i64, i64* @EAGAIN
%6 = icmp eq i64 %2, %5
%7 = select i1 %4, i1 true, i1 %6
%8 = load i64, i64* @EINPROGRESS
%9 = icmp eq i64 %2, %8
%10 = select i1 %7, i1 true, i1 %9
%11 = zext i1 %10 to i32
ret i32 %11
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
struct dhcpmsg {
  int dummy;
};

/* Variables and functions */
size_t get_dhcp_opt(struct dhcpmsg const *const, int, int /*<<< orphan*/ *,
                    int);
uint8_t get_option_msgtype(const struct dhcpmsg *const packet) {
  uint8_t ret = 0;
  uint8_t buf[500];
  const size_t ol = get_dhcp_opt(packet, 0x35, buf, sizeof buf);
  if (ol == sizeof ret)
    ret = buf[0];
  return ret;
}


x86 assembly (clang, -O0):
<get_option_msgtype>:
push   %rbp
mov    %rsp,%rbp
sub    $0x7f0,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x7e0(%rbp),%rdx
mov    $0x35,%esi
mov    $0x7d0,%ecx
call   1030 <get_dhcp_opt@plt>
mov    %rax,-0x7e8(%rbp)
cmpq   $0x4,-0x7e8(%rbp)
04
jne    115e <get_option_msgtype+0x4e>
mov    -0x7e0(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x7f0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_option_msgtype>:
sub    $0x7d8,%rsp
mov    %rsp,%rdx
mov    $0x35,%esi
mov    $0x7d0,%ecx
call   1030 <get_dhcp_opt@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x4,%rcx
jne    1137 <get_option_msgtype+0x27>
mov    (%rsp),%eax
add    $0x7d8,%rsp
ret

LLVM IR (-O0):
%struct.dhcpmsg = type { i32 }
define i32 @get_option_msgtype(%struct.dhcpmsg* %0) {
%2 = alloca %struct.dhcpmsg*
%3 = alloca i32
%4 = alloca [500 x i32]
%5 = alloca i64
store %struct.dhcpmsg* %0, %struct.dhcpmsg** %2
store i32 0, i32* %3
%6 = load %struct.dhcpmsg*, %struct.dhcpmsg** %2
%7 = getelementptr inbounds [500 x i32], [500 x i32]* %4, i64 0, i64 0
%8 = call i64 @get_dhcp_opt(%struct.dhcpmsg* %6, i32 53, i32* %7, i32 2000)
store i64 %8, i64* %5
%9 = load i64, i64* %5
%10 = icmp eq i64 %9, 4
br i1 %10, label %11, label %14
11: ; preds = %1
%12 = getelementptr inbounds [500 x i32], [500 x i32]* %4, i64 0, i64 0
%13 = load i32, i32* %12
store i32 %13, i32* %3
br label %14
14: ; preds = %11, %1
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
%struct.dhcpmsg = type { i32 }
define i32 @get_option_msgtype(%struct.dhcpmsg* %0) {
%2 = alloca [500 x i32]
%3 = bitcast [500 x i32]* %2 to i8*
%4 = getelementptr inbounds [500 x i32], [500 x i32]* %2, i64 0, i64 0
%5 = call i64 @get_dhcp_opt(%struct.dhcpmsg* %0, i32 53, i32* %4, i32 2000)
%6 = icmp eq i64 %5, 4
%7 = load i32, i32* %4
%8 = select i1 %6, i32 %7, i32 0
ret i32 %8
}
void lerMatriz(int m[6][10], int linhas, int colunas) {}


x86 assembly (clang, -O0):
<lerMatriz>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<lerMatriz>:
ret

LLVM IR (-O0):
define void @lerMatriz([10 x i32]* %0, i32 %1, i32 %2) {
%4 = alloca [10 x i32]*
%5 = alloca i32
%6 = alloca i32
store [10 x i32]* %0, [10 x i32]** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
define void @lerMatriz([10 x i32]* nocapture %0, i32 %1, i32 %2) {
ret void
}
int func0(int var) {
  if (1)
    return (1);
  else if (1)
    return (1);
  switch (var) {
  case 0:
  default:
    break;
  }
  for (; 1;)
    return (1);
  while (1)
    return (1);
  do {
    return (1);
  } while (1);
}


x86 assembly (clang, -O0):
<func0>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func0>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @func0(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @func0(i32 %0) {
ret i32 1
}
/* Type definitions */
typedef int uint32_t;
typedef scalar_t__ ui32Base;

/* Variables and functions */
void PWMDeadBandDisable(uint32_t ui32Base, uint32_t ui32Gen) {
  ;
  ;
  (*((volatile uint32_t *)(((ui32Base) + (ui32Gen)) + 0x00000028))) &=
      ~(0x00000001);
}


x86 assembly (clang, -O0):
<PWMDeadBandDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    $0x28,%eax
cltq
mov    (%rax),%ecx
and    $0xfffffffe,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMDeadBandDisable>:
lea    (%rdi,%rsi,1),%eax
add    $0x28,%eax
cltq
andl   $0xfffffffe,(%rax)
ret

LLVM IR (-O0):
define void @PWMDeadBandDisable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
%8 = add nsw i32 %7, 40
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
%11 = load volatile i32, i32* %10
%12 = and i32 %11, -2
store volatile i32 %12, i32* %10
ret void
}

LLVM IR (-O2):
define void @PWMDeadBandDisable(i32 %0, i32 %1) {
%3 = add i32 %0, 40
%4 = add i32 %3, %1
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, -2
store volatile i32 %8, i32* %6
ret void
}
int func(int i) {
  return ({
    int r;
    if (i)
      r = 1;
    else
      r = 2;
    r;
  });
}


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     111d <func+0x1d>
movl   $0x1,-0x8(%rbp)
jmp    1124 <func+0x24>
movl   $0x2,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
cmp    $0x1,%edi
mov    $0x1,%eax
adc    $0x0,%eax
ret

LLVM IR (-O0):
define i32 @func(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %3
br label %9
8: ; preds = %1
store i32 2, i32* %3
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %3
store i32 %10, i32* %4
%11 = load i32, i32* %4
ret i32 %11
}

LLVM IR (-O2):
define i32 @func(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i32 2, i32 1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
void error(char *s) {
  printf("%s\n", s);
  exit(1);
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<error>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @error(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ TimerBaseValid(unsigned long);
void TimerRTCDisable(unsigned long ulBase) {
  DEBUG_ASSERT(TimerBaseValid(ulBase));
  (*((volatile unsigned long *)(ulBase + 0x0000000C))) &= ~(0x00000010);
}


x86 assembly (clang, -O0):
<TimerRTCDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <TimerBaseValid@plt>
mov    %eax,%edi
call   1040 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%rcx
and    $0xffffffffffffffef,%rcx
mov    %rcx,0xc(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerRTCDisable>:
push   %rbx
mov    %rdi,%rbx
call   1030 <TimerBaseValid@plt>
mov    %eax,%edi
call   1040 <DEBUG_ASSERT@plt>
andq   $0xffffffffffffffef,0xc(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @TimerRTCDisable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @TimerBaseValid(i64 %3)
%5 = call i32 @DEBUG_ASSERT(i32 %4)
%6 = load i64, i64* %2
%7 = add i64 %6, 12
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = and i64 %9, -17
store volatile i64 %10, i64* %8
ret void
}

LLVM IR (-O2):
define void @TimerRTCDisable(i64 %0) {
%2 = tail call i32 @TimerBaseValid(i64 %0)
%3 = tail call i32 @DEBUG_ASSERT(i32 %2)
%4 = add i64 %0, 12
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, -17
store volatile i64 %7, i64* %5
ret void
}
/* Variables and functions */
int pow(double, int);
unsigned char srgb(double x) {
  if (x < 0.0031308) {
    x *= 12.92;
  } else {
    x = (1 + 0.055) * pow(x, 1 / 2.4) - 0.055;
  }
  return (unsigned char)(x * 255 + 0.5);
}


x86 assembly (clang, -O0):
<srgb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xedb(%rip),%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    1147 <srgb+0x37>
movsd  0xee0(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1174 <srgb+0x64>
movsd  -0x8(%rbp),%xmm0
xor    %edi,%edi
call   1030 <pow@plt>
cvtsi2sd %eax,%xmm0
movsd  0xea9(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xea5(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xe9f(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xe9b(%rip),%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<srgb>:
push   %rax
movsd  0xee7(%rip),%xmm1
ucomisd %xmm0,%xmm1
jbe    1129 <srgb+0x19>
mulsd  0xef1(%rip),%xmm0
jmp    1147 <srgb+0x37>
xor    %edi,%edi
call   1030 <pow@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
mulsd  0xec9(%rip),%xmm0
addsd  0xec9(%rip),%xmm0
mulsd  0xed1(%rip),%xmm0
addsd  0xed1(%rip),%xmm0
cvttsd2si %xmm0,%eax
pop    %rcx
ret

LLVM IR (-O0):
define zeroext i8 @srgb(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp olt double %3, 3.130800e-03
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load double, double* %2
%7 = fmul double %6, 1.292000e+01
store double %7, double* %2
br label %13
8: ; preds = %1
%9 = load double, double* %2
%10 = call i32 @pow(double %9, i32 0)
%11 = sitofp i32 %10 to double
%12 = call double @llvm.fmuladd.f64(double 1.055000e+00, double %11, double -5.500000e-02)
store double %12, double* %2
br label %13
13: ; preds = %8, %5
%14 = load double, double* %2
%15 = call double @llvm.fmuladd.f64(double %14, double 2.550000e+02, double 5.000000e-01)
%16 = fptoui double %15 to i8
ret i8 %16
}

LLVM IR (-O2):
define zeroext i8 @srgb(double %0) {
%2 = fcmp olt double %0, 3.130800e-03
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = fmul double %0, 1.292000e+01
br label %9
5: ; preds = %1
%6 = tail call i32 @pow(double %0, i32 0)
%7 = sitofp i32 %6 to double
%8 = tail call double @llvm.fmuladd.f64(double %7, double 1.055000e+00, double -5.500000e-02)
br label %9
9: ; preds = %5, %3
%10 = phi double [ %4, %3 ], [ %8, %5 ]
%11 = tail call double @llvm.fmuladd.f64(double %10, double 2.550000e+02, double 5.000000e-01)
%12 = fptoui double %11 to i8
ret i8 %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void goodbye(void) { printf("goodbye!\n"); }


x86 assembly (clang, -O0):
<goodbye>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<goodbye>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"goodbye!\0A\00"
define void @goodbye() {
%1 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [9 x i8] c"goodbye!\00"
define void @goodbye() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *);
void Error(char *message) {
  printf("\n%s\n", message);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<Error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<Error>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"\0A%s\0A\00"
@EXIT_FAILURE = global i32 0
define void @Error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = load i32, i32* @EXIT_FAILURE
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@.str = [5 x i8] c"\0A%s\0A\00"
@EXIT_FAILURE = global i32 0
define void @Error(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = load i32, i32* @EXIT_FAILURE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
int test_imm_E5uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0xE5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E5uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xe5,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E5uint64_lowword_mem>:
testb  $0xe5,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E5uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 229
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E5uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 229
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void gtk_selection_data_targets_include_image() {}


x86 assembly (clang, -O0):
<gtk_selection_data_targets_include_image>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_selection_data_targets_include_image>:
ret

LLVM IR (-O0):
define void @gtk_selection_data_targets_include_image() {
ret void
}

LLVM IR (-O2):
define void @gtk_selection_data_targets_include_image() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ruby_show_copyright();
int ruby_show_copyright_to_die(int exitcode) {
  ruby_show_copyright();
  return exitcode;
}


x86 assembly (clang, -O0):
<ruby_show_copyright_to_die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <ruby_show_copyright@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ruby_show_copyright_to_die>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <ruby_show_copyright@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ruby_show_copyright_to_die(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @ruby_show_copyright()
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @ruby_show_copyright_to_die(i32 returned %0) {
%2 = tail call i32 (...) @ruby_show_copyright()
ret i32 %0
}
main() {
  signed char x = 'a';
  return (x - 'a');
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movb   $0x61,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
sub    $0x61,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
store i8 97, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = sub nsw i32 %4, 97
ret i32 %5
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int *linear_search(int *array, int *key, size_t size) {
  int i, *l_search_ptr, found;
  for (i = 0; i < size; i++) {
    if (array[i] == *key) {
      found = 1;
      l_search_ptr = &found;
      return l_search_ptr;
    }
  }
  found = -1;
  l_search_ptr = &found;
  return l_search_ptr;
}


x86 assembly (clang, -O0):
<linear_search>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
movl   $0x0,-0x24(%rbp)
movslq -0x24(%rbp),%rax
cmp    -0x20(%rbp),%rax
jae    116b <linear_search+0x6b>
mov    -0x10(%rbp),%rax
movslq -0x24(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
jne    1158 <linear_search+0x58>
movl   $0x1,-0x34(%rbp)
lea    -0x34(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1182 <linear_search+0x82>
jmp    115d <linear_search+0x5d>
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    1117 <linear_search+0x17>
movl   $0xffffffff,-0x34(%rbp)
lea    -0x34(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<linear_search>:
lea    -0x4(%rsp),%rax
ret

LLVM IR (-O0):
define i32* @linear_search(i32* %0, i32* %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i64
%8 = alloca i32
%9 = alloca i32*
%10 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i64 %2, i64* %7
store i32 0, i32* %8
br label %11
11: ; preds = %28, %3
%12 = load i32, i32* %8
%13 = sext i32 %12 to i64
%14 = load i64, i64* %7
%15 = icmp ult i64 %13, %14
br i1 %15, label %16, label %31
16: ; preds = %11
%17 = load i32*, i32** %5
%18 = load i32, i32* %8
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, i32* %17, i64 %19
%21 = load i32, i32* %20
%22 = load i32*, i32** %6
%23 = load i32, i32* %22
%24 = icmp eq i32 %21, %23
br i1 %24, label %25, label %27
25: ; preds = %16
store i32 1, i32* %10
store i32* %10, i32** %9
%26 = load i32*, i32** %9
store i32* %26, i32** %4
br label %33
27: ; preds = %16
br label %28
28: ; preds = %27
%29 = load i32, i32* %8
%30 = add nsw i32 %29, 1
store i32 %30, i32* %8
br label %11
31: ; preds = %11
store i32 -1, i32* %10
store i32* %10, i32** %9
%32 = load i32*, i32** %9
store i32* %32, i32** %4
br label %33
33: ; preds = %31, %25
%34 = load i32*, i32** %4
ret i32* %34
}

LLVM IR (-O2):
define noalias i32* @linear_search(i32* nocapture %0, i32* nocapture %1, i64 %2) {
%4 = alloca i32
ret i32* %4
}
void audiohw_set_headphone_vol(int vol_l, int vol_r) {}


x86 assembly (clang, -O0):
<audiohw_set_headphone_vol>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<audiohw_set_headphone_vol>:
ret

LLVM IR (-O0):
define void @audiohw_set_headphone_vol(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @audiohw_set_headphone_vol(i32 %0, i32 %1) {
ret void
}
void outop1str(s) char *s;
{
  ;
  outstr(s);
  bumplc();
}


x86 assembly (clang, -O0):
<outop1str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <outstr@plt>
mov    $0x0,%al
call   1030 <bumplc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outop1str>:
push   %rax
xor    %eax,%eax
call   1040 <outstr@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <bumplc@plt>

LLVM IR (-O0):
define void @outop1str(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, ...) bitcast (i32 (...)* @outstr to i32 (i8*, ...)*)(i8* %3)
%5 = call i32 (...) @bumplc()
ret void
}

LLVM IR (-O2):
define void @outop1str(i8* %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @outstr to i32 (i8*, ...)*)(i8* %0)
%3 = tail call i32 (...) @bumplc()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ diff_abs(float *, float *);
int /*<<< orphan*/ printf(char *, float, float);
int /*<<< orphan*/ scanf(char *, float *, float *);
int main(void) {
  float a, b;
  scanf("%f%f", &a, &b);
  diff_abs(&a, &b);
  printf("%.2f\n%.2f", a, b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1050 <scanf@plt>
lea    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1030 <diff_abs@plt>
movss  -0x8(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
lea    0xe94(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0xec5(%rip),%rdi
lea    0x4(%rsp),%rbx
mov    %rsp,%r14
mov    %rbx,%rsi
mov    %r14,%rdx
call   1050 <scanf@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <diff_abs@plt>
movss  0x4(%rsp),%xmm0
movss  (%rsp),%xmm1
lea    0xe9a(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%f%f\00"
@.str.1 = [10 x i8] c"%.2f\0A%.2f\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca float
%3 = alloca float
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), float* %2, float* %3)
%5 = call i32 @diff_abs(float* %2, float* %3)
%6 = load float, float* %2
%7 = load float, float* %3
%8 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), float %6, float %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"%f%f\00"
@.str.1 = [10 x i8] c"%.2f\0A%.2f\00"
define i32 @main() {
%1 = alloca float
%2 = alloca float
%3 = bitcast float* %1 to i8*
%4 = bitcast float* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), float* %1, float* %2)
%6 = call i32 @diff_abs(float* %1, float* %2)
%7 = load float, float* %1
%8 = load float, float* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), float %7, float %8)
ret i32 0
}
int main() {
  int n = 0;
  while (n <= 100) {
    n += 2;
  }
  return n;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x64,-0x8(%rbp)
jg     112a <main+0x2a>
mov    -0x8(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x66,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp sle i32 %4, 100
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 2
store i32 %8, i32* %2
br label %3
9: ; preds = %3
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @main() {
ret i32 102
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("\tHello World\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"\09Hello World\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [13 x i8] c"\09Hello World\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int irq_stack_protection(void) { return 0; }


x86 assembly (clang, -O0):
<irq_stack_protection>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<irq_stack_protection>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @irq_stack_protection() {
ret i32 0
}

LLVM IR (-O2):
define i32 @irq_stack_protection() {
ret i32 0
}
char case1(void) {
  char j = 0;
  char *z = &j;
  j = 1;
  if (j)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<case1>:
push   %rbp
mov    %rsp,%rbp
movb   $0x0,-0x2(%rbp)
lea    -0x2(%rbp),%rax
mov    %rax,-0x10(%rbp)
movb   $0x1,-0x2(%rbp)
cmpb   $0x0,-0x2(%rbp)
je     1127 <case1+0x27>
movb   $0x1,-0x1(%rbp)
jmp    112b <case1+0x2b>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<case1>:
mov    $0x1,%al
ret

LLVM IR (-O0):
define signext i8 @case1() {
%1 = alloca i8
%2 = alloca i8
%3 = alloca i8*
store i8 0, i8* %2
store i8* %2, i8** %3
store i8 1, i8* %2
%4 = load i8, i8* %2
%5 = icmp ne i8 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %0
store i8 1, i8* %1
br label %8
7: ; preds = %0
store i8 0, i8* %1
br label %8
8: ; preds = %7, %6
%9 = load i8, i8* %1
ret i8 %9
}

LLVM IR (-O2):
define signext i8 @case1() {
ret i8 1
}
float gb_to_radians(float degrees) {
  return degrees * 6.28318530717958647692528676655900576f / 360.0f;
}


x86 assembly (clang, -O0):
<gb_to_radians>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xef3(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  0xee2(%rip),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<gb_to_radians>:
mulss  0xef8(%rip),%xmm0
divss  0xef4(%rip),%xmm0
ret

LLVM IR (-O0):
define float @gb_to_radians(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float %3, 0x401921FB60000000
%5 = fdiv float %4, 3.600000e+02
ret float %5
}

LLVM IR (-O2):
define float @gb_to_radians(float %0) {
%2 = fmul float %0, 0x401921FB60000000
%3 = fdiv float %2, 3.600000e+02
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ get_part_result(int *, int *, int *, int *, int *, int *);
void get_part_result_(int *num_graph1, int *igraph1, int *num_graph2,
                      int *igraph2, int *num_separator, int *iseparator) {
  get_part_result(num_graph1, igraph1, num_graph2, igraph2, num_separator,
                  iseparator);
}


x86 assembly (clang, -O0):
<get_part_result_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    -0x30(%rbp),%r9
call   1030 <get_part_result@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_part_result_>:
jmp    1030 <get_part_result@plt>

LLVM IR (-O0):
define void @get_part_result_(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4, i32* %5) {
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca i32*
%11 = alloca i32*
%12 = alloca i32*
store i32* %0, i32** %7
store i32* %1, i32** %8
store i32* %2, i32** %9
store i32* %3, i32** %10
store i32* %4, i32** %11
store i32* %5, i32** %12
%13 = load i32*, i32** %7
%14 = load i32*, i32** %8
%15 = load i32*, i32** %9
%16 = load i32*, i32** %10
%17 = load i32*, i32** %11
%18 = load i32*, i32** %12
%19 = call i32 @get_part_result(i32* %13, i32* %14, i32* %15, i32* %16, i32* %17, i32* %18)
ret void
}

LLVM IR (-O2):
define void @get_part_result_(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4, i32* %5) {
%7 = tail call i32 @get_part_result(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4, i32* %5)
ret void
}
/* Variables and functions */
int sdio_read_byte(int);
bool adns2080_is_motion_detected(void) {
  return ((sdio_read_byte((0x02U)) & 0x80) != 0);
}


x86 assembly (clang, -O0):
<adns2080_is_motion_detected>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <sdio_read_byte@plt>
and    $0x80,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adns2080_is_motion_detected>:
push   %rax
mov    $0x2,%edi
call   1030 <sdio_read_byte@plt>
shr    $0x7,%eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @adns2080_is_motion_detected() {
%1 = call i32 @sdio_read_byte(i32 2)
%2 = and i32 %1, 128
%3 = icmp ne i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @adns2080_is_motion_detected() {
%1 = tail call i32 @sdio_read_byte(i32 2)
%2 = lshr i32 %1, 7
%3 = and i32 %2, 1
ret i32 %3
}
__attribute__((always_)) __attribute__((no_instrument_function)) void *
mb_correct_addr_and_bit(int *bit, void *addr) {
  *bit += ((unsigned long)addr & 3UL) << 3;
  addr = (void *)((unsigned long)addr & ~3UL);
  return addr;
}


x86 assembly (clang, -O0):
<mb_correct_addr_and_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
and    $0x3,%rdx
shl    $0x3,%rdx
mov    -0x8(%rbp),%rax
movslq (%rax),%rcx
add    %rdx,%rcx
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
and    $0xfffffffffffffffc,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mb_correct_addr_and_bit>:
mov    %rsi,%rax
lea    0x0(,%rsi,8),%ecx
and    $0x18,%ecx
add    %ecx,(%rdi)
and    $0xfffffffffffffffc,%rax
ret

LLVM IR (-O0):
define i8* @mb_correct_addr_and_bit(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = ptrtoint i8* %5 to i64
%7 = and i64 %6, 3
%8 = shl i64 %7, 3
%9 = load i32*, i32** %3
%10 = load i32, i32* %9
%11 = sext i32 %10 to i64
%12 = add i64 %11, %8
%13 = trunc i64 %12 to i32
store i32 %13, i32* %9
%14 = load i8*, i8** %4
%15 = ptrtoint i8* %14 to i64
%16 = and i64 %15, -4
%17 = inttoptr i64 %16 to i8*
store i8* %17, i8** %4
%18 = load i8*, i8** %4
ret i8* %18
}

LLVM IR (-O2):
define i8* @mb_correct_addr_and_bit(i32* nocapture %0, i8* %1) {
%3 = ptrtoint i8* %1 to i64
%4 = load i32, i32* %0
%5 = trunc i64 %3 to i32
%6 = shl i32 %5, 3
%7 = and i32 %6, 24
%8 = add i32 %4, %7
store i32 %8, i32* %0
%9 = and i64 %3, -4
%10 = inttoptr i64 %9 to i8*
ret i8* %10
}
/* Variables and functions */
int /*<<< orphan*/ draw_entities();
int /*<<< orphan*/ stage_draw_bg(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ stage_draw_fg(int /*<<< orphan*/, int /*<<< orphan*/);
void draw() {
  stage_draw_bg(0, 0);
  stage_draw_fg(0, 0);
  draw_entities();
}


x86 assembly (clang, -O0):
<draw>:
push   %rbp
mov    %rsp,%rbp
xor    %esi,%esi
mov    %esi,%edi
call   1050 <stage_draw_bg@plt>
xor    %esi,%esi
mov    %esi,%edi
call   1030 <stage_draw_fg@plt>
mov    $0x0,%al
call   1040 <draw_entities@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<draw>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
call   1050 <stage_draw_bg@plt>
xor    %edi,%edi
xor    %esi,%esi
call   1030 <stage_draw_fg@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <draw_entities@plt>

LLVM IR (-O0):
define void @draw() {
%1 = call i32 @stage_draw_bg(i32 0, i32 0)
%2 = call i32 @stage_draw_fg(i32 0, i32 0)
%3 = call i32 (...) @draw_entities()
ret void
}

LLVM IR (-O2):
define void @draw() {
%1 = tail call i32 @stage_draw_bg(i32 0, i32 0)
%2 = tail call i32 @stage_draw_fg(i32 0, i32 0)
%3 = tail call i32 (...) @draw_entities()
ret void
}
int test_imm_40uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x40 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_40uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x40,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_40uint64_midword_reg>:
test   $0x400000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_40uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 64
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_40uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 4194304
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void RTPipeToNative(void) {}


x86 assembly (clang, -O0):
<RTPipeToNative>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTPipeToNative>:
ret

LLVM IR (-O0):
define void @RTPipeToNative() {
ret void
}

LLVM IR (-O2):
define void @RTPipeToNative() {
ret void
}
__attribute__((no)) int fn4(const char *x, ...) {
  asm volatile("" : "+r"(x) : : "memory");
  return *x;
}


x86 assembly (clang, -O0):
<fn4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn4>:
movsbl (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @fn4(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* asm sideeffect "", "=r,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @fn4(i8* %0, ...) {
%2 = tail call i8* asm sideeffect "", "=r,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %0)
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
ret i32 %4
}
void INT_Excep_IRQ0(void) {}


x86 assembly (clang, -O0):
<INT_Excep_IRQ0>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_IRQ0>:
ret

LLVM IR (-O0):
define void @INT_Excep_IRQ0() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_IRQ0() {
ret void
}
void latencyAddSample(void) {
  _serverPanic("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/"
               "heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c",
               83, "Function '%s' is disabled.", __func__);
}


x86 assembly (clang, -O0):
<latencyAddSample>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x53,%esi
lea    0xf79(%rip),%rdx
lea    0xf8d(%rip),%rcx
mov    $0x0,%al
call   1030 <_serverPanic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<latencyAddSample>:
lea    0xee9(%rip),%rdi
lea    0xf82(%rip),%rdx
lea    0xf96(%rip),%rcx
mov    $0x53,%esi
xor    %eax,%eax
jmp    1030 <_serverPanic@plt>

LLVM IR (-O0):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.latencyAddSample = [17 x i8] c"latencyAddSample\00"
define void @latencyAddSample() {
%1 = call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 83, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @__func__.latencyAddSample, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.latencyAddSample = [17 x i8] c"latencyAddSample\00"
define void @latencyAddSample() {
%1 = tail call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 83, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @__func__.latencyAddSample, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ int16_t;

/* Variables and functions */
int16_t eqtohint16(const uint8_t *data) {
  return (int16_t)((data[0] << 8) | data[1]);
}


x86 assembly (clang, -O0):
<eqtohint16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
or     0x4(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<eqtohint16>:
mov    (%rdi),%eax
shl    $0x8,%eax
or     0x4(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @eqtohint16(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = shl i32 %5, 8
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = or i32 %6, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @eqtohint16(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 8
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = or i32 %3, %5
ret i32 %6
}
/* Variables and functions */
float pow(int, int);
float sin(int);
float ElasticEaseIn(float p) {
  return sin(13 * 1.57079632679489661923 * p) * pow(2, 10 * (p - 1));
}


x86 assembly (clang, -O0):
<ElasticEaseIn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xeca(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <sin@plt>
movss  %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm1
movss  0xea7(%rip),%xmm0
subss  %xmm0,%xmm1
movss  0xe97(%rip),%xmm0
mulss  %xmm1,%xmm0
cvttss2si %xmm0,%esi
mov    $0x2,%edi
call   1040 <pow@plt>
movaps %xmm0,%xmm1
movss  -0x8(%rbp),%xmm0
mulss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ElasticEaseIn>:
push   %rax
movss  %xmm0,(%rsp)
cvtss2sd %xmm0,%xmm1
mulsd  0xece(%rip),%xmm1
cvttsd2si %xmm1,%edi
call   1030 <sin@plt>
movss  %xmm0,0x4(%rsp)
movss  (%rsp),%xmm0
addss  0xeba(%rip),%xmm0
mulss  0xeb6(%rip),%xmm0
cvttss2si %xmm0,%esi
mov    $0x2,%edi
call   1040 <pow@plt>
mulss  0x4(%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @ElasticEaseIn(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fmul double 0x40346B9C347764A4, %4
%6 = fptosi double %5 to i32
%7 = call float @sin(i32 %6)
%8 = load float, float* %2
%9 = fsub float %8, 1.000000e+00
%10 = fmul float 1.000000e+01, %9
%11 = fptosi float %10 to i32
%12 = call float @pow(i32 2, i32 %11)
%13 = fmul float %7, %12
ret float %13
}

LLVM IR (-O2):
define float @ElasticEaseIn(float %0) {
%2 = fpext float %0 to double
%3 = fmul double %2, 0x40346B9C347764A4
%4 = fptosi double %3 to i32
%5 = tail call float @sin(i32 %4)
%6 = fadd float %0, -1.000000e+00
%7 = fmul float %6, 1.000000e+01
%8 = fptosi float %7 to i32
%9 = tail call float @pow(i32 2, i32 %8)
%10 = fmul float %5, %9
ret float %10
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
int /*<<< orphan*/ run(char *);
int main() {
  putchar('l');
  run("CHILD");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6c,%edi
call   1030 <putchar@plt>
lea    0xecb(%rip),%rdi
call   1040 <run@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x6c,%edi
call   1030 <putchar@plt>
lea    0xece(%rip),%rdi
call   1040 <run@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"CHILD\00"
define i32 @main() {
%1 = call i32 @putchar(i8 signext 108)
%2 = call i32 @run(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"CHILD\00"
define i32 @main() {
%1 = tail call i32 @putchar(i8 signext 108)
%2 = tail call i32 @run(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
int fun_a(unsigned x) {
  int val = 0;
  while (x) {
    val ^= x;
    x >>= 1;
  }
  return val & 0x1;
}


x86 assembly (clang, -O0):
<fun_a>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     112f <fun_a+0x2f>
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <fun_a+0xe>
mov    -0x8(%rbp),%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_a>:
xor    %eax,%eax
test   %edi,%edi
je     111e <fun_a+0x1e>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
xor    %edi,%eax
shr    %ecx
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <fun_a+0x10>
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @fun_a(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = xor i32 %9, %8
store i32 %10, i32* %3
%11 = load i32, i32* %2
%12 = lshr i32 %11, 1
store i32 %12, i32* %2
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
%15 = and i32 %14, 1
ret i32 %15
}

LLVM IR (-O2):
define i32 @fun_a(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = phi i32 [ %7, %3 ], [ %0, %1 ]
%6 = xor i32 %4, %5
%7 = lshr i32 %5, 1
%8 = icmp ult i32 %5, 2
br i1 %8, label %9, label %3
9: ; preds = %3
%10 = and i32 %6, 1
br label %11
11: ; preds = %9, %1
%12 = phi i32 [ 0, %1 ], [ %10, %9 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ loglike_theta_fast_finalize();
void fitfun_finalize() { loglike_theta_fast_finalize(); }


x86 assembly (clang, -O0):
<fitfun_finalize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <loglike_theta_fast_finalize@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fitfun_finalize>:
xor    %eax,%eax
jmp    1030 <loglike_theta_fast_finalize@plt>

LLVM IR (-O0):
define void @fitfun_finalize() {
%1 = call i32 (...) @loglike_theta_fast_finalize()
ret void
}

LLVM IR (-O2):
define void @fitfun_finalize() {
%1 = tail call i32 (...) @loglike_theta_fast_finalize()
ret void
}
/* Variables and functions */
scalar_t__ ehnlc_isalpha(int);
scalar_t__ ehnlc_isdigit(int);
int ehnlc_isalnum(int c) {
  return (ehnlc_isalpha(c) || ehnlc_isdigit(c)) ? 8 : 0;
}


x86 assembly (clang, -O0):
<ehnlc_isalnum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <ehnlc_isalpha@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1157 <ehnlc_isalnum+0x37>
mov    -0x4(%rbp),%edi
call   1030 <ehnlc_isdigit@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%dl
xor    %eax,%eax
mov    $0x8,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ehnlc_isalnum>:
push   %rbx
mov    %edi,%ebx
call   1040 <ehnlc_isalpha@plt>
mov    %rax,%rcx
mov    $0x8,%eax
test   %rcx,%rcx
je     1137 <ehnlc_isalnum+0x17>
pop    %rbx
ret
mov    %ebx,%edi
call   1030 <ehnlc_isdigit@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
shl    $0x3,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ehnlc_isalnum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @ehnlc_isalpha(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i64 @ehnlc_isdigit(i32 %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i64
%13 = select i1 %11, i32 8, i32 0
ret i32 %13
}

LLVM IR (-O2):
define i32 @ehnlc_isalnum(i32 %0) {
%2 = tail call i64 @ehnlc_isalpha(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @ehnlc_isdigit(i32 %0)
%6 = icmp eq i64 %5, 0
%7 = select i1 %6, i32 0, i32 8
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 8, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
float M_PI_2;
float asinf(float);
float acosf(float x) {
  if (x == 1) {
    return 0;
  }
  return (M_PI_2 - asinf(x));
}


x86 assembly (clang, -O0):
<acosf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
movss  0xed6(%rip),%xmm1
ucomiss %xmm1,%xmm0
jne    1146 <acosf+0x36>
jp     1146 <acosf+0x36>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1171 <acosf+0x61>
mov    0x2e9b(%rip),%rax
movss  (%rax),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
call   1030 <asinf@plt>
movaps %xmm0,%xmm1
movss  -0xc(%rbp),%xmm0
subss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acosf>:
push   %rax
xorps  %xmm1,%xmm1
ucomiss 0xee5(%rip),%xmm0
jne    111f <acosf+0xf>
jnp    113f <acosf+0x2f>
mov    0x2ec2(%rip),%rax
movss  (%rax),%xmm1
movss  %xmm1,0x4(%rsp)
call   1030 <asinf@plt>
movss  0x4(%rsp),%xmm1
subss  %xmm0,%xmm1
movaps %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@M_PI_2 = global float 0.000000e+00
define float @acosf(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = fcmp oeq float %4, 1.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
store float 0.000000e+00, float* %2
br label %12
7: ; preds = %1
%8 = load float, float* @M_PI_2
%9 = load float, float* %3
%10 = call float @asinf(float %9)
%11 = fsub float %8, %10
store float %11, float* %2
br label %12
12: ; preds = %7, %6
%13 = load float, float* %2
ret float %13
}

LLVM IR (-O2):
@M_PI_2 = global float 0.000000e+00
define float @acosf(float %0) {
%2 = fcmp oeq float %0, 1.000000e+00
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = load float, float* @M_PI_2
%5 = tail call float @asinf(float %0)
%6 = fsub float %4, %5
br label %7
7: ; preds = %1, %3
%8 = phi float [ %6, %3 ], [ 0.000000e+00, %1 ]
ret float %8
}