#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned int CheckIRQ();
int /*<<< orphan*/ DisableInterrupts();
int /*<<< orphan*/ EnableInterrupts();
int EnableInterrupt(const unsigned int nIRQ) {
  if (nIRQ > 127) {
    return -1;
  }
  const unsigned int enabled = CheckIRQ();
  if (enabled == 1) {
    DisableInterrupts();
  }
  {
    const unsigned int mod = nIRQ % 32;
    const unsigned int div = nIRQ / 32;
    switch (div) {
    case 0:
      (*((volatile unsigned int *)(((0x0FFFC000) + 0x100)))) =
          (*((volatile unsigned int *)(((0x0FFFC000) + 0x100)))) | (0x1 << mod);
      break;
    case 1:
      (*((volatile unsigned int *)(((0x0FFFC000) + 0x104)))) =
          (*((volatile unsigned int *)(((0x0FFFC000) + 0x104)))) | (0x1 << mod);
      break;
    case 2:
      (*((volatile unsigned int *)(((0x0FFFC000) + 0x108)))) =
          (*((volatile unsigned int *)(((0x0FFFC000) + 0x108)))) | (0x1 << mod);
      break;
    case 3:
      (*((volatile unsigned int *)(((0x0FFFC000) + 0x10C)))) =
          (*((volatile unsigned int *)(((0x0FFFC000) + 0x10C)))) | (0x1 << mod);
      break;
    default:
      return -1;
    }
  }
  if (enabled == 1) {
    EnableInterrupts();
  }
  return 0;
}


x86 assembly (clang, -O0):
<EnableInterrupt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x7f,-0x8(%rbp)
jbe    1151 <EnableInterrupt+0x21>
movl   $0xffffffff,-0x4(%rbp)
jmp    125b <EnableInterrupt+0x12b>
mov    $0x0,%al
call   1030 <CheckIRQ@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jne    116c <EnableInterrupt+0x3c>
mov    $0x0,%al
call   1040 <DisableInterrupts@plt>
mov    -0x8(%rbp),%eax
and    $0x1f,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x5,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %rax,-0x20(%rbp)
sub    $0x3,%rax
ja     1237 <EnableInterrupt+0x107>
mov    -0x20(%rbp),%rax
lea    0xe66(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0xfffc100,%eax
mov    (%rax),%eax
mov    %eax,-0x24(%rbp)
mov    -0x10(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    -0x24(%rbp),%ecx
or     %eax,%ecx
mov    $0xfffc100,%eax
mov    %ecx,(%rax)
jmp    1243 <EnableInterrupt+0x113>
mov    $0xfffc104,%eax
mov    (%rax),%eax
mov    %eax,-0x28(%rbp)
mov    -0x10(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    -0x28(%rbp),%ecx
or     %eax,%ecx
mov    $0xfffc104,%eax
mov    %ecx,(%rax)
jmp    1243 <EnableInterrupt+0x113>
mov    $0xfffc108,%eax
mov    (%rax),%eax
mov    %eax,-0x2c(%rbp)
mov    -0x10(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    -0x2c(%rbp),%ecx
or     %eax,%ecx
mov    $0xfffc108,%eax
mov    %ecx,(%rax)
jmp    1243 <EnableInterrupt+0x113>
mov    $0xfffc10c,%eax
mov    (%rax),%eax
mov    %eax,-0x30(%rbp)
mov    -0x10(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    -0x30(%rbp),%ecx
or     %eax,%ecx
mov    $0xfffc10c,%eax
mov    %ecx,(%rax)
jmp    1243 <EnableInterrupt+0x113>
movl   $0xffffffff,-0x4(%rbp)
jmp    125b <EnableInterrupt+0x12b>
cmpl   $0x1,-0xc(%rbp)
jne    1254 <EnableInterrupt+0x124>
mov    $0x0,%al
call   1050 <EnableInterrupts@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EnableInterrupt>:
push   %rbp
push   %r14
push   %rbx
mov    $0xffffffff,%ebx
cmp    $0x7f,%edi
ja     11ce <EnableInterrupt+0x9e>
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <CheckIRQ@plt>
mov    %eax,%r14d
cmp    $0x1,%eax
jne    115a <EnableInterrupt+0x2a>
xor    %eax,%eax
call   1040 <DisableInterrupts@plt>
mov    %ebp,%eax
shr    $0x5,%eax
cmp    $0x3,%eax
ja     11ce <EnableInterrupt+0x9e>
and    $0x1f,%ebp
lea    0xe92(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x1,%eax
mov    %ebp,%ecx
shl    %cl,%eax
or     %eax,0xfffc100
jmp    11bd <EnableInterrupt+0x8d>
mov    $0x1,%eax
mov    %ebp,%ecx
shl    %cl,%eax
or     %eax,0xfffc104
jmp    11bd <EnableInterrupt+0x8d>
mov    $0x1,%eax
mov    %ebp,%ecx
shl    %cl,%eax
or     %eax,0xfffc108
jmp    11bd <EnableInterrupt+0x8d>
mov    $0x1,%eax
mov    %ebp,%ecx
shl    %cl,%eax
or     %eax,0xfffc10c
xor    %ebx,%ebx
cmp    $0x1,%r14d
jne    11ce <EnableInterrupt+0x9e>
xor    %ebx,%ebx
xor    %eax,%eax
call   1050 <EnableInterrupts@plt>
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @EnableInterrupt(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
%7 = load i32, i32* %3
%8 = icmp ugt i32 %7, 127
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 -1, i32* %2
br label %49
10: ; preds = %1
%11 = call i32 (...) @CheckIRQ()
store i32 %11, i32* %4
%12 = load i32, i32* %4
%13 = icmp eq i32 %12, 1
br i1 %13, label %14, label %16
14: ; preds = %10
%15 = call i32 (...) @DisableInterrupts()
br label %16
16: ; preds = %14, %10
%17 = load i32, i32* %3
%18 = urem i32 %17, 32
store i32 %18, i32* %5
%19 = load i32, i32* %3
%20 = udiv i32 %19, 32
store i32 %20, i32* %6
%21 = load i32, i32* %6
switch i32 %21, label %42 [
i32 0, label %22
i32 1, label %27
i32 2, label %32
i32 3, label %37
]
22: ; preds = %16
%23 = load volatile i32, i32* inttoptr (i64 268419328 to i32*)
%24 = load i32, i32* %5
%25 = shl i32 1, %24
%26 = or i32 %23, %25
store volatile i32 %26, i32* inttoptr (i64 268419328 to i32*)
br label %43
27: ; preds = %16
%28 = load volatile i32, i32* inttoptr (i64 268419332 to i32*)
%29 = load i32, i32* %5
%30 = shl i32 1, %29
%31 = or i32 %28, %30
store volatile i32 %31, i32* inttoptr (i64 268419332 to i32*)
br label %43
32: ; preds = %16
%33 = load volatile i32, i32* inttoptr (i64 268419336 to i32*)
%34 = load i32, i32* %5
%35 = shl i32 1, %34
%36 = or i32 %33, %35
store volatile i32 %36, i32* inttoptr (i64 268419336 to i32*)
br label %43
37: ; preds = %16
%38 = load volatile i32, i32* inttoptr (i64 268419340 to i32*)
%39 = load i32, i32* %5
%40 = shl i32 1, %39
%41 = or i32 %38, %40
store volatile i32 %41, i32* inttoptr (i64 268419340 to i32*)
br label %43
42: ; preds = %16
store i32 -1, i32* %2
br label %49
43: ; preds = %37, %32, %27, %22
%44 = load i32, i32* %4
%45 = icmp eq i32 %44, 1
br i1 %45, label %46, label %48
46: ; preds = %43
%47 = call i32 (...) @EnableInterrupts()
br label %48
48: ; preds = %46, %43
store i32 0, i32* %2
br label %49
49: ; preds = %48, %42, %9
%50 = load i32, i32* %2
ret i32 %50
}

LLVM IR (-O2):
define i32 @EnableInterrupt(i32 %0) {
%2 = icmp ugt i32 %0, 127
br i1 %2, label %30, label %3
3: ; preds = %1
%4 = tail call i32 (...) @CheckIRQ()
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 (...) @DisableInterrupts()
br label %8
8: ; preds = %6, %3
%9 = and i32 %0, 31
%10 = lshr i32 %0, 5
switch i32 %10, label %30 [
i32 0, label %11
i32 1, label %15
i32 2, label %19
i32 3, label %23
]
11: ; preds = %8
%12 = load volatile i32, i32* inttoptr (i64 268419328 to i32*)
%13 = shl nuw i32 1, %9
%14 = or i32 %12, %13
store volatile i32 %14, i32* inttoptr (i64 268419328 to i32*)
br label %27
15: ; preds = %8
%16 = load volatile i32, i32* inttoptr (i64 268419332 to i32*)
%17 = shl nuw i32 1, %9
%18 = or i32 %16, %17
store volatile i32 %18, i32* inttoptr (i64 268419332 to i32*)
br label %27
19: ; preds = %8
%20 = load volatile i32, i32* inttoptr (i64 268419336 to i32*)
%21 = shl nuw i32 1, %9
%22 = or i32 %20, %21
store volatile i32 %22, i32* inttoptr (i64 268419336 to i32*)
br label %27
23: ; preds = %8
%24 = load volatile i32, i32* inttoptr (i64 268419340 to i32*)
%25 = shl nuw i32 1, %9
%26 = or i32 %24, %25
store volatile i32 %26, i32* inttoptr (i64 268419340 to i32*)
br label %27
27: ; preds = %23, %19, %15, %11
br i1 %5, label %28, label %30
28: ; preds = %27
%29 = tail call i32 (...) @EnableInterrupts()
br label %30
30: ; preds = %28, %27, %8, %1
%31 = phi i32 [ -1, %1 ], [ 0, %28 ], [ 0, %27 ], [ -1, %8 ]
ret i32 %31
}