xunge/DecIR huggingface dataset:
void __s2e_touch_buffer(volatile void *buffer, unsigned size) {
  unsigned i;
  for (i = 0; i < size; ++i) {
    volatile const char *b = (volatile const char *)buffer;
    *b;
  }
}


x86 assembly (clang, -O0):
<__s2e_touch_buffer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jae    113a <__s2e_touch_buffer+0x3a>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%al
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1112 <__s2e_touch_buffer+0x12>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__s2e_touch_buffer>:
test   %esi,%esi
je     1158 <__s2e_touch_buffer+0x58>
lea    -0x1(%rsi),%ecx
mov    %esi,%eax
and    $0x7,%eax
cmp    $0x7,%ecx
jb     113d <__s2e_touch_buffer+0x3d>
and    $0xfffffff8,%esi
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movzbl (%rdi),%ecx
movzbl (%rdi),%ecx
movzbl (%rdi),%ecx
movzbl (%rdi),%ecx
movzbl (%rdi),%ecx
movzbl (%rdi),%ecx
movzbl (%rdi),%ecx
movzbl (%rdi),%ecx
add    $0xfffffff8,%esi
jne    1120 <__s2e_touch_buffer+0x20>
test   %eax,%eax
je     1158 <__s2e_touch_buffer+0x58>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movzbl (%rdi),%ecx
add    $0xffffffff,%eax
jne    1150 <__s2e_touch_buffer+0x50>
ret

LLVM IR (-O0):
define void @__s2e_touch_buffer(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %7
7: ; preds = %15, %2
%8 = load i32, i32* %5
%9 = load i32, i32* %4
%10 = icmp ult i32 %8, %9
br i1 %10, label %11, label %18
11: ; preds = %7
%12 = load i8*, i8** %3
store i8* %12, i8** %6
%13 = load i8*, i8** %6
%14 = load volatile i8, i8* %13
br label %15
15: ; preds = %11
%16 = load i32, i32* %5
%17 = add i32 %16, 1
store i32 %17, i32* %5
br label %7
18: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @__s2e_touch_buffer(i8* %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %29, label %4
4: ; preds = %2
%5 = add i32 %1, -1
%6 = and i32 %1, 7
%7 = icmp ult i32 %5, 7
br i1 %7, label %22, label %8
8: ; preds = %4
%9 = and i32 %1, -8
br label %10
10: ; preds = %10, %8
%11 = phi i32 [ 0, %8 ], [ %20, %10 ]
%12 = load volatile i8, i8* %0
%13 = load volatile i8, i8* %0
%14 = load volatile i8, i8* %0
%15 = load volatile i8, i8* %0
%16 = load volatile i8, i8* %0
%17 = load volatile i8, i8* %0
%18 = load volatile i8, i8* %0
%19 = load volatile i8, i8* %0
%20 = add i32 %11, 8
%21 = icmp eq i32 %20, %9
br i1 %21, label %22, label %10
22: ; preds = %10, %4
%23 = icmp eq i32 %6, 0
br i1 %23, label %29, label %24
24: ; preds = %22, %24
%25 = phi i32 [ %27, %24 ], [ 0, %22 ]
%26 = load volatile i8, i8* %0
%27 = add i32 %25, 1
%28 = icmp eq i32 %27, %6
br i1 %28, label %29, label %24
29: ; preds = %22, %24, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, unsigned int);
char *xmalloc(int);
const char *disasm_mem_operand(unsigned int operand) {
  char *ret;
  ret = xmalloc(9);
  snprintf(ret, 9, "[0x%X]", operand);
  return ret;
}


x86 assembly (clang, -O0):
<disasm_mem_operand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x9,%edi
call   1040 <xmalloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%ecx
mov    $0x9,%esi
lea    0xeb4(%rip),%rdx
call   1030 <snprintf@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disasm_mem_operand>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
mov    $0x9,%edi
call   1040 <xmalloc@plt>
mov    %rax,%rbx
lea    0xec7(%rip),%rdx
mov    %rax,%rdi
mov    $0x9,%esi
mov    %ebp,%ecx
call   1030 <snprintf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [7 x i8] c"[0x%X]\00"
define i8* @disasm_mem_operand(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = call i8* @xmalloc(i32 9)
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = load i32, i32* %2
%7 = call i32 @snprintf(i8* %5, i32 9, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = load i8*, i8** %3
ret i8* %8
}

LLVM IR (-O2):
@.str = [7 x i8] c"[0x%X]\00"
define i8* @disasm_mem_operand(i32 %0) {
%2 = tail call i8* @xmalloc(i32 9)
%3 = tail call i32 @snprintf(i8* %2, i32 9, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i8* %2
}
/* Variables and functions */
int my_add(int, int);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  printf("5 + 7: %i\n", my_add(5, 7));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x5,%edi
mov    $0x7,%esi
call   1040 <my_add@plt>
mov    %eax,%esi
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
mov    $0x7,%esi
call   1040 <my_add@plt>
lea    0xec9(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"5 + 7: %i\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @my_add(i32 5, i32 7)
%3 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"5 + 7: %i\0A\00"
define i32 @main() {
%1 = tail call i32 @my_add(i32 5, i32 7)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
void sgx_get_quote_size() {}


x86 assembly (clang, -O0):
<sgx_get_quote_size>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sgx_get_quote_size>:
ret

LLVM IR (-O0):
define void @sgx_get_quote_size() {
ret void
}

LLVM IR (-O2):
define void @sgx_get_quote_size() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() { printf("Hello printf"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello printf\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hello printf\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
void *netsnmp_generic_create_row(void) {}


x86 assembly (clang, -O0):
<netsnmp_generic_create_row>:
push   %rbp
mov    %rsp,%rbp
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<netsnmp_generic_create_row>:
ret

LLVM IR (-O0):
define i8* @netsnmp_generic_create_row() {
%1 = alloca i8*
%2 = load i8*, i8** %1
ret i8* %2
}

LLVM IR (-O2):
define noalias i8* @netsnmp_generic_create_row() {
ret i8* undef
}
int test_imm_85int8_reg(signed char val) {
  return ((val) & (0x85 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_85int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0x85,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_85int8_reg>:
test   $0x85,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_85int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 133
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_85int8_reg(i8 signext %0) {
%2 = and i8 %0, -123
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ wint_t;
typedef scalar_t__ wctrans_t;
typedef int /*<<< orphan*/ __locale_t;

/* Variables and functions */
int /*<<< orphan*/ wctrans_table_lookup(char const *, int /*<<< orphan*/);
wint_t __towctrans_l(wint_t wc, wctrans_t desc, __locale_t locale) {
  if (desc == (wctrans_t)0)
    return wc;
  return wctrans_table_lookup((const char *)desc, wc);
}


x86 assembly (clang, -O0):
<__towctrans_l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1138 <__towctrans_l+0x28>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1147 <__towctrans_l+0x37>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%esi
call   1030 <wctrans_table_lookup@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__towctrans_l>:
mov    %edi,%eax
test   %rsi,%rsi
je     1121 <__towctrans_l+0x11>
mov    %rsi,%rdi
mov    %eax,%esi
jmp    1030 <wctrans_table_lookup@plt>
ret

LLVM IR (-O0):
define i32 @__towctrans_l(i32 %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i64
%7 = alloca i32
store i32 %0, i32* %5
store i64 %1, i64* %6
store i32 %2, i32* %7
%8 = load i64, i64* %6
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load i32, i32* %5
store i32 %11, i32* %4
br label %17
12: ; preds = %3
%13 = load i64, i64* %6
%14 = inttoptr i64 %13 to i8*
%15 = load i32, i32* %5
%16 = call i32 @wctrans_table_lookup(i8* %14, i32 %15)
store i32 %16, i32* %4
br label %17
17: ; preds = %12, %10
%18 = load i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
define i32 @__towctrans_l(i32 %0, i64 %1, i32 %2) {
%4 = icmp eq i64 %1, 0
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = inttoptr i64 %1 to i8*
%7 = tail call i32 @wctrans_table_lookup(i8* %6, i32 %0)
br label %8
8: ; preds = %3, %5
%9 = phi i32 [ %7, %5 ], [ %0, %3 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ RunTests();
int main(void) {
  RunTests();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <RunTests@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <RunTests@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @RunTests()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @RunTests()
ret i32 0
}
void f2(int *x) {
  int i;
#pragma omp parallel for simd ordered
  for (i = 0; i < 100; i++)
#pragma omp ordered threads simd
    x[i / 2] = i;
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x64,-0xc(%rbp)
jge    114f <f2+0x4f>
mov    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    -0x1c(%rbp),%edx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <f2+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
mov    $0x4,%eax
cs nopw 0x0(%rax,%rax,1)
nop
lea    -0x4(%rax),%ecx
mov    %ecx,%edx
shr    %edx
mov    %ecx,(%rdi,%rdx,4)
lea    -0x3(%rax),%ecx
mov    %ecx,%edx
shr    %edx
mov    %ecx,(%rdi,%rdx,4)
lea    -0x2(%rax),%ecx
mov    %ecx,%edx
shr    %edx
mov    %ecx,(%rdi,%rdx,4)
lea    -0x1(%rax),%ecx
mov    %ecx,%edx
shr    %edx
mov    %ecx,(%rdi,%rdx,4)
mov    %eax,%ecx
shr    %ecx
mov    %eax,(%rdi,%rcx,4)
lea    0x5(%rax),%ecx
cmp    $0x63,%eax
mov    %ecx,%eax
jne    1110 <f2+0x10>
ret

LLVM IR (-O0):
define void @f2(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 100
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load i32, i32* %3
%9 = load i32*, i32** %2
%10 = load i32, i32* %3
%11 = sdiv i32 %10, 2
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %9, i64 %12
store i32 %8, i32* %13
br label %14
14: ; preds = %7
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %4
17: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @f2(i32* nocapture writeonly %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %23, %2 ]
%4 = lshr i32 %3, 1
%5 = zext i32 %4 to i64
%6 = getelementptr inbounds i32, i32* %0, i64 %5
store i32 %3, i32* %6
%7 = add nuw nsw i32 %3, 1
%8 = lshr i32 %7, 1
%9 = zext i32 %8 to i64
%10 = getelementptr inbounds i32, i32* %0, i64 %9
store i32 %7, i32* %10
%11 = add nuw nsw i32 %3, 2
%12 = lshr i32 %11, 1
%13 = zext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %0, i64 %13
store i32 %11, i32* %14
%15 = add nuw nsw i32 %3, 3
%16 = lshr i32 %15, 1
%17 = zext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %0, i64 %17
store i32 %15, i32* %18
%19 = add nuw nsw i32 %3, 4
%20 = lshr i32 %19, 1
%21 = zext i32 %20 to i64
%22 = getelementptr inbounds i32, i32* %0, i64 %21
store i32 %19, i32* %22
%23 = add nuw nsw i32 %3, 5
%24 = icmp eq i32 %23, 100
br i1 %24, label %25, label %2
25: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ reverse(int *, int, int);
void right_rotate(int *a, int num, int n) {
  reverse(a, 1, n - num);
  reverse(a, n - num + 1, n);
  reverse(a, 1, n);
}


x86 assembly (clang, -O0):
<right_rotate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%edx
sub    -0xc(%rbp),%edx
mov    $0x1,%esi
call   1030 <reverse@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
sub    -0xc(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1030 <reverse@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%edx
mov    $0x1,%esi
call   1030 <reverse@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<right_rotate>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rdi,%rbx
mov    %edx,%ebp
sub    %esi,%ebp
mov    $0x1,%esi
mov    %ebp,%edx
call   1030 <reverse@plt>
add    $0x1,%ebp
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <reverse@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <reverse@plt>

LLVM IR (-O0):
define void @right_rotate(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = sub nsw i32 %8, %9
%11 = call i32 @reverse(i32* %7, i32 1, i32 %10)
%12 = load i32*, i32** %4
%13 = load i32, i32* %6
%14 = load i32, i32* %5
%15 = sub nsw i32 %13, %14
%16 = add nsw i32 %15, 1
%17 = load i32, i32* %6
%18 = call i32 @reverse(i32* %12, i32 %16, i32 %17)
%19 = load i32*, i32** %4
%20 = load i32, i32* %6
%21 = call i32 @reverse(i32* %19, i32 1, i32 %20)
ret void
}

LLVM IR (-O2):
define void @right_rotate(i32* %0, i32 %1, i32 %2) {
%4 = sub nsw i32 %2, %1
%5 = tail call i32 @reverse(i32* %0, i32 1, i32 %4)
%6 = add nsw i32 %4, 1
%7 = tail call i32 @reverse(i32* %0, i32 %6, i32 %2)
%8 = tail call i32 @reverse(i32* %0, i32 1, i32 %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ GLint;

/* Variables and functions */
int /*<<< orphan*/ glVertex2i(int /*<<< orphan*/, int /*<<< orphan*/);
void Vertex2i(GLint x, GLint y) { glVertex2i(x, y); }


x86 assembly (clang, -O0):
<Vertex2i>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <glVertex2i@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Vertex2i>:
jmp    1030 <glVertex2i@plt>

LLVM IR (-O0):
define void @Vertex2i(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @glVertex2i(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @Vertex2i(i32 %0, i32 %1) {
%3 = tail call i32 @glVertex2i(i32 %0, i32 %1)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
uint32_t EEPROMBlockLock(uint32_t ui32Block) {
  ASSERT(ui32Block <
         ((((*((volatile uint32_t *)(0x400AF000)))) & 0x07FF0000) >> 16));
  (*((volatile uint32_t *)(0x400AF004))) = ui32Block;
  (*((volatile uint32_t *)(0x400AF020))) = 0xFFFFFFFF;
  return ((*((volatile uint32_t *)(0x400AF020))));
}


x86 assembly (clang, -O0):
<EEPROMBlockLock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x400af000,%ecx
mov    (%rcx),%ecx
and    $0x7ff0000,%ecx
sar    $0x10,%ecx
cmp    %ecx,%eax
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x4(%rbp),%ecx
mov    $0x400af004,%eax
mov    %ecx,(%rax)
mov    $0x400af020,%eax
movl   $0xffffffff,(%rax)
mov    $0x400af020,%eax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EEPROMBlockLock>:
push   %rbx
mov    %edi,%ebx
mov    0x400af000,%eax
shr    $0x10,%eax
and    $0x7ff,%eax
xor    %edi,%edi
cmp    %ebx,%eax
setg   %dil
call   1030 <ASSERT@plt>
mov    %ebx,0x400af004
movl   $0xffffffff,0x400af020
ff ff ff ff
mov    0x400af020,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @EEPROMBlockLock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load volatile i32, i32* inttoptr (i64 1074458624 to i32*)
%5 = and i32 %4, 134152192
%6 = ashr i32 %5, 16
%7 = icmp slt i32 %3, %6
%8 = zext i1 %7 to i32
%9 = call i32 @ASSERT(i32 %8)
%10 = load i32, i32* %2
store volatile i32 %10, i32* inttoptr (i64 1074458628 to i32*)
store volatile i32 -1, i32* inttoptr (i64 1074458656 to i32*)
%11 = load volatile i32, i32* inttoptr (i64 1074458656 to i32*)
ret i32 %11
}

LLVM IR (-O2):
define i32 @EEPROMBlockLock(i32 %0) {
%2 = load volatile i32, i32* inttoptr (i64 1074458624 to i32*)
%3 = lshr i32 %2, 16
%4 = and i32 %3, 2047
%5 = icmp sgt i32 %4, %0
%6 = zext i1 %5 to i32
%7 = tail call i32 @ASSERT(i32 %6)
store volatile i32 %0, i32* inttoptr (i64 1074458628 to i32*)
store volatile i32 -1, i32* inttoptr (i64 1074458656 to i32*)
%8 = load volatile i32, i32* inttoptr (i64 1074458656 to i32*)
ret i32 %8
}
int HelpItem31(void) { return 0; }


x86 assembly (clang, -O0):
<HelpItem31>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelpItem31>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HelpItem31() {
ret i32 0
}

LLVM IR (-O2):
define i32 @HelpItem31() {
ret i32 0
}
/* Variables and functions */
double y1(double);
double c_y1(double arg0) { return y1(arg0); }


x86 assembly (clang, -O0):
<c_y1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <y1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_y1>:
jmp    1030 <y1@plt>

LLVM IR (-O0):
define double @c_y1(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @y1(double %3)
ret double %4
}

LLVM IR (-O2):
define double @c_y1(double %0) {
%2 = tail call double @y1(double %0)
ret double %2
}
/* Type definitions */
struct target_ops {
  int dummy;
};
struct regcache {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ noprocess();
void tdefault_store_registers(struct target_ops *self, struct regcache *arg1,
                              int arg2) {
  noprocess();
}


x86 assembly (clang, -O0):
<tdefault_store_registers>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0x0,%al
call   1030 <noprocess@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tdefault_store_registers>:
xor    %eax,%eax
jmp    1030 <noprocess@plt>

LLVM IR (-O0):
%struct.target_ops = type { i32 }
%struct.regcache = type { i32 }
define void @tdefault_store_registers(%struct.target_ops* %0, %struct.regcache* %1, i32 %2) {
%4 = alloca %struct.target_ops*
%5 = alloca %struct.regcache*
%6 = alloca i32
store %struct.target_ops* %0, %struct.target_ops** %4
store %struct.regcache* %1, %struct.regcache** %5
store i32 %2, i32* %6
%7 = call i32 (...) @noprocess()
ret void
}

LLVM IR (-O2):
%struct.target_ops = type { i32 }
%struct.regcache = type { i32 }
define void @tdefault_store_registers(%struct.target_ops* nocapture readnone %0, %struct.regcache* nocapture readnone %1, i32 %2) {
%4 = tail call i32 (...) @noprocess()
ret void
}
int toupper(c)
int c;
{ return (__sbtoupper(c)); }


x86 assembly (clang, -O0):
<toupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1030 <__sbtoupper@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toupper>:
xor    %eax,%eax
jmp    1030 <__sbtoupper@plt>

LLVM IR (-O0):
define i32 @toupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (i32, ...) bitcast (i32 (...)* @__sbtoupper to i32 (i32, ...)*)(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @toupper(i32 %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @__sbtoupper to i32 (i32, ...)*)(i32 %0)
ret i32 %2
}
int test_imm_62uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x62 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_62uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x62,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_62uint64_midword_reg>:
test   $0x620000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_62uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 98
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_62uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 6422528
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int test_imm_77uint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0x77 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_77uint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0x77,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_77uint64_highword_reg>:
movabs $0x7700000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_77uint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 119
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_77uint64_highword_reg(i64 %0) {
%2 = and i64 %0, 511101108224
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int test_imm_82int8_reg(signed char val) {
  return ((val) & (-0x82 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_82int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff7e,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_82int8_reg>:
test   $0xffffff7e,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_82int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -130
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_82int8_reg(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = and i32 %2, -130
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ omap_free_gpio(int);
int /*<<< orphan*/ omap_request_gpio(int);
int /*<<< orphan*/ omap_set_gpio_dataout(int, int);
int /*<<< orphan*/ omap_set_gpio_direction(int, int /*<<< orphan*/);
void omap_set_gpio(int gpio, int enable) {
  if (!omap_request_gpio(gpio)) {
    omap_set_gpio_direction(gpio, 0);
    omap_set_gpio_dataout(gpio, enable);
    omap_free_gpio(gpio);
  }
}


x86 assembly (clang, -O0):
<omap_set_gpio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <omap_request_gpio@plt>
cmp    $0x0,%eax
jne    117c <omap_set_gpio+0x3c>
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1040 <omap_set_gpio_direction@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <omap_set_gpio_dataout@plt>
mov    -0x4(%rbp),%edi
call   1060 <omap_free_gpio@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<omap_set_gpio>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %edi,%ebx
call   1050 <omap_request_gpio@plt>
test   %eax,%eax
je     1157 <omap_set_gpio+0x17>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %ebx,%edi
xor    %esi,%esi
call   1040 <omap_set_gpio_direction@plt>
mov    %ebx,%edi
mov    %ebp,%esi
call   1030 <omap_set_gpio_dataout@plt>
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1060 <omap_free_gpio@plt>

LLVM IR (-O0):
define void @omap_set_gpio(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @omap_request_gpio(i32 %5)
%7 = icmp ne i32 %6, 0
br i1 %7, label %16, label %8
8: ; preds = %2
%9 = load i32, i32* %3
%10 = call i32 @omap_set_gpio_direction(i32 %9, i32 0)
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = call i32 @omap_set_gpio_dataout(i32 %11, i32 %12)
%14 = load i32, i32* %3
%15 = call i32 @omap_free_gpio(i32 %14)
br label %16
16: ; preds = %8, %2
ret void
}

LLVM IR (-O2):
define void @omap_set_gpio(i32 %0, i32 %1) {
%3 = tail call i32 @omap_request_gpio(i32 %0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = tail call i32 @omap_set_gpio_direction(i32 %0, i32 0)
%7 = tail call i32 @omap_set_gpio_dataout(i32 %0, i32 %1)
%8 = tail call i32 @omap_free_gpio(i32 %0)
br label %9
9: ; preds = %5, %2
ret void
}
/* Type definitions */
struct TreeNode {
  int dummy;
};

/* Variables and functions */
int count(struct TreeNode *);
int /*<<< orphan*/ helper(struct TreeNode *, int *, int *);
scalar_t__ malloc(int);
int *preorderTraversal(struct TreeNode *root, int *returnSize) {
  *returnSize = count(root);
  int *vals = (int *)malloc((*returnSize) * sizeof(int));
  int index = 0;
  helper(root, vals, &index);
  return vals;
}


x86 assembly (clang, -O0):
<preorderTraversal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <count@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
movslq (%rax),%rax
shl    $0x2,%rax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
lea    -0x1c(%rbp),%rdx
call   1050 <helper@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<preorderTraversal>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%r14
mov    %rdi,%r15
call   1030 <count@plt>
mov    %eax,(%r14)
lea    0x0(,%rax,4),%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
movl   $0x0,0xc(%rsp)
lea    0xc(%rsp),%rdx
mov    %r15,%rdi
mov    %rax,%rsi
call   1050 <helper@plt>
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.TreeNode = type { i32 }
define i32* @preorderTraversal(%struct.TreeNode* %0, i32* %1) {
%3 = alloca %struct.TreeNode*
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store %struct.TreeNode* %0, %struct.TreeNode** %3
store i32* %1, i32** %4
%7 = load %struct.TreeNode*, %struct.TreeNode** %3
%8 = call i32 @count(%struct.TreeNode* %7)
%9 = load i32*, i32** %4
store i32 %8, i32* %9
%10 = load i32*, i32** %4
%11 = load i32, i32* %10
%12 = sext i32 %11 to i64
%13 = mul i64 %12, 4
%14 = trunc i64 %13 to i32
%15 = call i64 @malloc(i32 %14)
%16 = inttoptr i64 %15 to i32*
store i32* %16, i32** %5
store i32 0, i32* %6
%17 = load %struct.TreeNode*, %struct.TreeNode** %3
%18 = load i32*, i32** %5
%19 = call i32 @helper(%struct.TreeNode* %17, i32* %18, i32* %6)
%20 = load i32*, i32** %5
ret i32* %20
}

LLVM IR (-O2):
%struct.TreeNode = type { i32 }
define i32* @preorderTraversal(%struct.TreeNode* %0, i32* nocapture writeonly %1) {
%3 = alloca i32
%4 = tail call i32 @count(%struct.TreeNode* %0)
store i32 %4, i32* %1
%5 = shl i32 %4, 2
%6 = tail call i64 @malloc(i32 %5)
%7 = inttoptr i64 %6 to i32*
%8 = bitcast i32* %3 to i8*
store i32 0, i32* %3
%9 = call i32 @helper(%struct.TreeNode* %0, i32* %7, i32* %3)
ret i32* %7
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ int8_t;

/* Variables and functions */
void PutPixel32(int8_t *pData, uint32_t pixel) { *(uint32_t *)pData = pixel; }


x86 assembly (clang, -O0):
<PutPixel32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PutPixel32>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @PutPixel32(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
store i32 %5, i32* %6
ret void
}

LLVM IR (-O2):
define void @PutPixel32(i32* nocapture writeonly %0, i32 %1) {
store i32 %1, i32* %0
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
float fastrand() {
  static uint32_t mirand = 1;
  union {
    uint32_t i;
    float f;
  } a;
  mirand *= 16807;
  a.i = (mirand & 0x7fffff) | 0x3f800000;
  return a.f - 1;
}


x86 assembly (clang, -O0):
<fastrand>:
push   %rbp
mov    %rsp,%rbp
imul   $0x41a7,0x2f12(%rip),%eax
mov    %eax,0x2f0c(%rip)
mov    0x2f06(%rip),%eax
and    $0x7fffff,%eax
or     $0x3f800000,%eax
mov    %eax,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
movss  0xecc(%rip),%xmm1
subss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fastrand>:
imul   $0x41a7,0x2f16(%rip),%eax
mov    %eax,0x2f10(%rip)
and    $0x7fffff,%eax
or     $0x3f800000,%eax
movd   %eax,%xmm0
addss  0xeda(%rip),%xmm0
ret

LLVM IR (-O0):
%union.anon = type { i32 }
@fastrand.mirand = internal global i32 1
define float @fastrand() {
%1 = alloca %union.anon
%2 = load i32, i32* @fastrand.mirand
%3 = mul nsw i32 %2, 16807
store i32 %3, i32* @fastrand.mirand
%4 = load i32, i32* @fastrand.mirand
%5 = and i32 %4, 8388607
%6 = or i32 %5, 1065353216
%7 = bitcast %union.anon* %1 to i32*
store i32 %6, i32* %7
%8 = bitcast %union.anon* %1 to float*
%9 = load float, float* %8
%10 = fsub float %9, 1.000000e+00
ret float %10
}

LLVM IR (-O2):
@fastrand.mirand = internal unnamed_addr global i32 1
define float @fastrand() {
%1 = load i32, i32* @fastrand.mirand
%2 = mul nsw i32 %1, 16807
store i32 %2, i32* @fastrand.mirand
%3 = and i32 %2, 8388607
%4 = or i32 %3, 1065353216
%5 = bitcast i32 %4 to float
%6 = fadd float %5, -1.000000e+00
ret float %6
}
/* Variables and functions */
int /*<<< orphan*/ modf(float, double *);
float trunczero(float f) {
  double intpart;
  modf(f, &intpart);
  return (float)intpart;
}


x86 assembly (clang, -O0):
<trunczero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
lea    -0x10(%rbp),%rdi
call   1030 <modf@plt>
movsd  -0x10(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trunczero>:
push   %rax
mov    %rsp,%rdi
call   1030 <modf@plt>
movsd  (%rsp),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @trunczero(float %0) {
%2 = alloca float
%3 = alloca double
store float %0, float* %2
%4 = load float, float* %2
%5 = call i32 @modf(float %4, double* %3)
%6 = load double, double* %3
%7 = fptrunc double %6 to float
ret float %7
}

LLVM IR (-O2):
define float @trunczero(float %0) {
%2 = alloca double
%3 = bitcast double* %2 to i8*
%4 = call i32 @modf(float %0, double* %2)
%5 = load double, double* %2
%6 = fptrunc double %5 to float
ret float %6
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
char *strerror(int);
void die_errno(int err) {
  fprintf(stderr, "error: %s\n", strerror(err));
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<die_errno>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2e9e(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <strerror@plt>
mov    -0x8(%rbp),%edi
mov    %rax,%rdx
lea    0xea4(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e70(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<die_errno>:
push   %rbx
mov    0x2ea8(%rip),%rax
mov    (%rax),%ebx
call   1050 <strerror@plt>
lea    0xeba(%rip),%rsi
mov    %ebx,%edi
mov    %rax,%rdx
call   1030 <fprintf@plt>
mov    0x2e81(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [11 x i8] c"error: %s\0A\00"
@EXIT_FAILURE = global i32 0
define void @die_errno(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @stderr
%4 = load i32, i32* %2
%5 = call i8* @strerror(i32 %4)
%6 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = load i32, i32* @EXIT_FAILURE
%8 = call i32 @exit(i32 %7)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [11 x i8] c"error: %s\0A\00"
@EXIT_FAILURE = global i32 0
define void @die_errno(i32 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i8* @strerror(i32 %0)
%4 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = load i32, i32* @EXIT_FAILURE
%6 = tail call i32 @exit(i32 %5)
unreachable
}
/* Variables and functions */
void exit(void) {}


x86 assembly (clang, -O0):
<exit>:
push   %rbp
mov    %rsp,%rbp

x86 assembly (clang, -O2):
LLVM IR (-O0):
define void @exit() {
unreachable
}

LLVM IR (-O2):
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int /*<<< orphan*/ swap(int *, int *);
void printTest(int a, int b) {
  printf("%d %d\n", a, b);
  swap(&a, &b);
  printf("%d %d\n\n", a, b);
}


x86 assembly (clang, -O0):
<printTest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <swap@plt>
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xead(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printTest>:
push   %rax
mov    %esi,%edx
mov    %edi,%esi
mov    %edi,0x4(%rsp)
mov    %edx,(%rsp)
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
lea    0x4(%rsp),%rdi
mov    %rsp,%rsi
call   1040 <swap@plt>
mov    0x4(%rsp),%esi
mov    (%rsp),%edx
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%d %d\0A\00"
@.str.1 = [8 x i8] c"%d %d\0A\0A\00"
define void @printTest(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6)
%8 = call i32 @swap(i32* %3, i32* %4)
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32 %9, i32 %10)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"%d %d\0A\00"
@.str.1 = [8 x i8] c"%d %d\0A\0A\00"
define void @printTest(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1)
%6 = call i32 @swap(i32* %3, i32* %4)
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32 %7, i32 %8)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ personality;

/* Variables and functions */
char *CG_ConfigString(int);
int /*<<< orphan*/ CG_LoadingString(char *);
int /*<<< orphan*/ Info_ValueForKey(char const *, char *);
int /*<<< orphan*/ Q_CleanStr(char *);
int /*<<< orphan*/ Q_strncpyz(char *, int /*<<< orphan*/, int);
void CG_LoadingClient(int clientNum) {
  const char *info;
  char personality[64];
  info = CG_ConfigString(((36 + 256) + 256) + clientNum);
  Q_strncpyz(personality, Info_ValueForKey(info, "n"), sizeof(personality));
  Q_CleanStr(personality);
  CG_LoadingString(personality);
}


x86 assembly (clang, -O0):
<CG_LoadingClient>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
add    $0x224,%edi
call   1060 <CG_ConfigString@plt>
mov    %rax,-0x10(%rbp)
lea    -0x50(%rbp),%rax
mov    %rax,-0x58(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xe80(%rip),%rsi
call   1040 <Info_ValueForKey@plt>
mov    -0x58(%rbp),%rdi
mov    %eax,%esi
mov    $0x40,%edx
call   1070 <Q_strncpyz@plt>
lea    -0x50(%rbp),%rdi
call   1050 <Q_CleanStr@plt>
lea    -0x50(%rbp),%rdi
call   1030 <CG_LoadingString@plt>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_LoadingClient>:
push   %rbx
sub    $0x40,%rsp
add    $0x224,%edi
call   1060 <CG_ConfigString@plt>
lea    0xe99(%rip),%rsi
mov    %rax,%rdi
call   1040 <Info_ValueForKey@plt>
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    %eax,%esi
mov    $0x40,%edx
call   1070 <Q_strncpyz@plt>
mov    %rbx,%rdi
call   1050 <Q_CleanStr@plt>
mov    %rbx,%rdi
call   1030 <CG_LoadingString@plt>
add    $0x40,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"n\00"
define void @CG_LoadingClient(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca [64 x i8]
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = add nsw i32 548, %5
%7 = call i8* @CG_ConfigString(i32 %6)
store i8* %7, i8** %3
%8 = getelementptr inbounds [64 x i8], [64 x i8]* %4, i64 0, i64 0
%9 = load i8*, i8** %3
%10 = call i32 @Info_ValueForKey(i8* %9, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%11 = call i32 @Q_strncpyz(i8* %8, i32 %10, i32 64)
%12 = getelementptr inbounds [64 x i8], [64 x i8]* %4, i64 0, i64 0
%13 = call i32 @Q_CleanStr(i8* %12)
%14 = getelementptr inbounds [64 x i8], [64 x i8]* %4, i64 0, i64 0
%15 = call i32 @CG_LoadingString(i8* %14)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"n\00"
define void @CG_LoadingClient(i32 %0) {
%2 = alloca [64 x i8]
%3 = getelementptr inbounds [64 x i8], [64 x i8]* %2, i64 0, i64 0
%4 = add nsw i32 %0, 548
%5 = tail call i8* @CG_ConfigString(i32 %4)
%6 = tail call i32 @Info_ValueForKey(i8* %5, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @Q_strncpyz(i8* %3, i32 %6, i32 64)
%8 = call i32 @Q_CleanStr(i8* %3)
%9 = call i32 @CG_LoadingString(i8* %3)
ret void
}
void pcp_print_net_dev_stats(struct activity *a, int curr) {}


x86 assembly (clang, -O0):
<pcp_print_net_dev_stats>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcp_print_net_dev_stats>:
ret

LLVM IR (-O0):
%struct.activity = type opaque
define void @pcp_print_net_dev_stats(%struct.activity* %0, i32 %1) {
%3 = alloca %struct.activity*
%4 = alloca i32
store %struct.activity* %0, %struct.activity** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.activity = type opaque
define void @pcp_print_net_dev_stats(%struct.activity* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void printbitssimple(int n) {
  unsigned int i;
  i = 1 << 31;
  while (i > 0) {
    if (n & i)
      printf("1");
    else
      printf("0");
    i >>= 1;
  }
}


x86 assembly (clang, -O0):
<printbitssimple>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x80000000,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jbe    1166 <printbitssimple+0x56>
mov    -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
cmp    $0x0,%eax
je     114c <printbitssimple+0x3c>
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
jmp    1158 <printbitssimple+0x48>
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <printbitssimple+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printbitssimple>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%r14d
mov    $0x80000000,%ebx
mov    $0x80000000,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %ebx,%eax
and    %r14d,%eax
cmp    $0x1,%eax
mov    $0x31,%edi
sbb    $0x0,%edi
call   1030 <putchar@plt>
shr    %ebp
cmp    $0x1,%ebx
mov    %ebp,%ebx
ja     1130 <printbitssimple+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [2 x i8] c"1\00"
@.str.1 = [2 x i8] c"0\00"
define void @printbitssimple(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 -2147483648, i32* %3
br label %4
4: ; preds = %16, %1
%5 = load i32, i32* %3
%6 = icmp ugt i32 %5, 0
br i1 %6, label %7, label %19
7: ; preds = %4
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = and i32 %8, %9
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %7
%13 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %16
14: ; preds = %7
%15 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
br label %16
16: ; preds = %14, %12
%17 = load i32, i32* %3
%18 = lshr i32 %17, 1
store i32 %18, i32* %3
br label %4
19: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @printbitssimple(i32 %0) {
br label %2
2: ; preds = %1, %2
%3 = phi i32 [ -2147483648, %1 ], [ %8, %2 ]
%4 = and i32 %3, %0
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i32 48, i32 49
%7 = tail call i32 @putchar(i32 %6)
%8 = lshr i32 %3, 1
%9 = icmp ult i32 %3, 2
br i1 %9, label %10, label %2
10: ; preds = %2
ret void
}
void test_creall(_Complex long double ld) {
  if (creall(ld) != creall(ld))
    link_failure_creall();
}


x86 assembly (clang, -O0):
<test_creall>:
push   %rbp
mov    %rsp,%rbp
lea    0x10(%rbp),%rax
fldt   (%rax)
fucomip %st(0),%st
jnp    112e <test_creall+0x1e>
jmp    1127 <test_creall+0x17>
mov    $0x0,%al
call   1030 <link_failure_creall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_creall>:
fldt   0x8(%rsp)
fucomip %st(0),%st
jp     1119 <test_creall+0x9>
ret
xor    %eax,%eax
jmp    1030 <link_failure_creall@plt>

LLVM IR (-O0):
define void @test_creall({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16 %0) {
%2 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i32 0, i32 0
%3 = load x86_fp80, x86_fp80* %2
%4 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i32 0, i32 1
%5 = load x86_fp80, x86_fp80* %4
%6 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i32 0, i32 0
%7 = load x86_fp80, x86_fp80* %6
%8 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i32 0, i32 1
%9 = load x86_fp80, x86_fp80* %8
%10 = fcmp une x86_fp80 %3, %7
br i1 %10, label %11, label %13
11: ; preds = %1
%12 = call i32 (...) @link_failure_creall()
br label %13
13: ; preds = %11, %1
ret void
}

LLVM IR (-O2):
define void @test_creall({ x86_fp80, x86_fp80 }* nocapture byval({ x86_fp80, x86_fp80 }) align 16 %0) {
%2 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i64 0, i32 0
%3 = load x86_fp80, x86_fp80* %2
%4 = fcmp uno x86_fp80 %3, 0xK00000000000000000000
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 (...) @link_failure_creall()
br label %7
7: ; preds = %5, %1
ret void
}
int mus_char_to_bint(const unsigned char *inp) {
  int o;
  unsigned char *outp;
  outp = (unsigned char *)&o;
  outp[0] = inp[0];
  outp[1] = inp[1];
  outp[2] = inp[2];
  outp[3] = inp[3];
  return (o);
}


x86 assembly (clang, -O0):
<mus_char_to_bint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    -0xc(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
mov    0x1(%rax),%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x8(%rbp),%rax
mov    0x2(%rax),%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0x8(%rbp),%rax
mov    0x3(%rax),%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x3(%rax)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mus_char_to_bint>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @mus_char_to_bint(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i8* %0, i8** %2
%5 = bitcast i32* %3 to i8*
store i8* %5, i8** %4
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = load i8, i8* %7
%9 = load i8*, i8** %4
%10 = getelementptr inbounds i8, i8* %9, i64 0
store i8 %8, i8* %10
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i64 1
%13 = load i8, i8* %12
%14 = load i8*, i8** %4
%15 = getelementptr inbounds i8, i8* %14, i64 1
store i8 %13, i8* %15
%16 = load i8*, i8** %2
%17 = getelementptr inbounds i8, i8* %16, i64 2
%18 = load i8, i8* %17
%19 = load i8*, i8** %4
%20 = getelementptr inbounds i8, i8* %19, i64 2
store i8 %18, i8* %20
%21 = load i8*, i8** %2
%22 = getelementptr inbounds i8, i8* %21, i64 3
%23 = load i8, i8* %22
%24 = load i8*, i8** %4
%25 = getelementptr inbounds i8, i8* %24, i64 3
store i8 %23, i8* %25
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @mus_char_to_bint(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = getelementptr inbounds i8, i8* %0, i64 1
%4 = load i8, i8* %3
%5 = getelementptr inbounds i8, i8* %0, i64 2
%6 = load i8, i8* %5
%7 = getelementptr inbounds i8, i8* %0, i64 3
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
%10 = shl nuw i32 %9, 24
%11 = zext i8 %6 to i32
%12 = shl nuw nsw i32 %11, 16
%13 = zext i8 %4 to i32
%14 = shl nuw nsw i32 %13, 8
%15 = zext i8 %2 to i32
%16 = or i32 %14, %15
%17 = or i32 %16, %12
%18 = or i32 %17, %10
ret i32 %18
}
void b_speaker_beep(void) { asm volatile("call 0x00100060"); }


x86 assembly (clang, -O0):
<b_speaker_beep>:
push   %rbp
mov    %rsp,%rbp
call   100060 <completed.0+0xfc040>
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_speaker_beep>:
call   100060 <completed.0+0xfc040>
ret

LLVM IR (-O0):
define void @b_speaker_beep() {
ret void
}

LLVM IR (-O2):
define void @b_speaker_beep() {
tail call void asm sideeffect "call 0x00100060", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
int main(int argc, char *argv[]) {
  float a = 123.456;
  printf("%f\n", a);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movss  0xed9(%rip),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeec(%rip),%rdi
movss  0xee0(%rip),%xmm0
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%f\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca float
store i32 %0, i32* %3
store i8** %1, i8*** %4
store float 0x405EDD2F20000000, float* %5
%6 = load float, float* %5
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), float %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%f\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), float 0x405EDD2F20000000)
ret i32 0
}
void foo651(int p) {}


x86 assembly (clang, -O0):
<foo651>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo651>:
ret

LLVM IR (-O0):
define void @foo651(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo651(i32 %0) {
ret void
}