xunge/DecIR huggingface dataset:
int code2sys(char code) {
  if (code == 'G' || code == ' ')
    return 0x01;
  if (code == 'R')
    return 0x04;
  if (code == 'E')
    return 0x08;
  if (code == 'J')
    return 0x10;
  if (code == 'C')
    return 0x20;
  return 0x00;
}


x86 assembly (clang, -O0):
<code2sys>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x47,%eax
je     1124 <code2sys+0x24>
movsbl -0x5(%rbp),%eax
cmp    $0x20,%eax
jne    1130 <code2sys+0x30>
movl   $0x1,-0x4(%rbp)
jmp    119b <code2sys+0x9b>
movsbl -0x5(%rbp),%eax
cmp    $0x52,%eax
jne    1149 <code2sys+0x49>
movl   $0x4,-0x4(%rbp)
jmp    119b <code2sys+0x9b>
movsbl -0x5(%rbp),%eax
cmp    $0x45,%eax
jne    1162 <code2sys+0x62>
movl   $0x8,-0x4(%rbp)
jmp    119b <code2sys+0x9b>
movsbl -0x5(%rbp),%eax
cmp    $0x4a,%eax
jne    117b <code2sys+0x7b>
movl   $0x10,-0x4(%rbp)
jmp    119b <code2sys+0x9b>
movsbl -0x5(%rbp),%eax
cmp    $0x43,%eax
jne    1194 <code2sys+0x94>
movl   $0x20,-0x4(%rbp)
jmp    119b <code2sys+0x9b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<code2sys>:
add    $0xe0,%dil
cmp    $0x32,%dil
ja     1124 <code2sys+0x24>
mov    $0x1,%eax
movzbl %dil,%ecx
lea    0xee6(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
ret
xor    %eax,%eax
ret
mov    $0x20,%eax
ret
mov    $0x8,%eax
ret
mov    $0x10,%eax
ret
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @code2sys(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 71
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 32
br i1 %10, label %11, label %12
11: ; preds = %7, %1
store i32 1, i32* %2
br label %33
12: ; preds = %7
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = icmp eq i32 %14, 82
br i1 %15, label %16, label %17
16: ; preds = %12
store i32 4, i32* %2
br label %33
17: ; preds = %12
%18 = load i8, i8* %3
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 69
br i1 %20, label %21, label %22
21: ; preds = %17
store i32 8, i32* %2
br label %33
22: ; preds = %17
%23 = load i8, i8* %3
%24 = sext i8 %23 to i32
%25 = icmp eq i32 %24, 74
br i1 %25, label %26, label %27
26: ; preds = %22
store i32 16, i32* %2
br label %33
27: ; preds = %22
%28 = load i8, i8* %3
%29 = sext i8 %28 to i32
%30 = icmp eq i32 %29, 67
br i1 %30, label %31, label %32
31: ; preds = %27
store i32 32, i32* %2
br label %33
32: ; preds = %27
store i32 0, i32* %2
br label %33
33: ; preds = %32, %31, %26, %21, %16, %11
%34 = load i32, i32* %2
ret i32 %34
}

LLVM IR (-O2):
define i32 @code2sys(i8 signext %0) {
switch i8 %0, label %6 [
i8 71, label %7
i8 32, label %7
i8 82, label %2
i8 69, label %3
i8 74, label %4
i8 67, label %5
]
2: ; preds = %1
br label %7
3: ; preds = %1
br label %7
4: ; preds = %1
br label %7
5: ; preds = %1
br label %7
6: ; preds = %1
br label %7
7: ; preds = %1, %1, %6, %5, %4, %3, %2
%8 = phi i32 [ 4, %2 ], [ 8, %3 ], [ 16, %4 ], [ 32, %5 ], [ 0, %6 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ foo(int);
char *malloc(int);
void bar(int size) {
  char *data = malloc(sizeof(char) * size);
  foo(size);
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
shl    $0x0,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
jmp    1030 <foo@plt>

LLVM IR (-O0):
define void @bar(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sext i32 %4 to i64
%6 = mul i64 1, %5
%7 = trunc i64 %6 to i32
%8 = call i8* @malloc(i32 %7)
store i8* %8, i8** %3
%9 = load i32, i32* %2
%10 = call i32 @foo(i32 %9)
ret void
}

LLVM IR (-O2):
define void @bar(i32 %0) {
%2 = tail call i32 @foo(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ test_add_digits();
int /*<<< orphan*/ test_to_from_strz();
int main(int argc, char const *argv[]) {
  test_add_digits();
  test_to_from_strz();
  printf("All OK.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <test_add_digits@plt>
mov    $0x0,%al
call   1050 <test_to_from_strz@plt>
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <test_add_digits@plt>
xor    %eax,%eax
call   1050 <test_to_from_strz@plt>
lea    0xeba(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"All OK.\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @test_add_digits()
%7 = call i32 (...) @test_to_from_strz()
%8 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [8 x i8] c"All OK.\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @test_add_digits()
%4 = tail call i32 (...) @test_to_from_strz()
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int EOF;
int /*<<< orphan*/ assert(int);
int fgetc(int /*<<< orphan*/ *);
int skipUntilChar(FILE *fp, const char c) {
  assert(NULL != fp);
  int n;
  do {
    n = fgetc(fp);
  } while (EOF != n && c != n);
  return n;
}


x86 assembly (clang, -O0):
<skipUntilChar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
xor    %eax,%eax
cmp    -0x8(%rbp),%rax
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %eax,-0x10(%rbp)
mov    0x2e90(%rip),%rax
mov    (%rax),%ecx
xor    %eax,%eax
cmp    -0x10(%rbp),%ecx
mov    %al,-0x11(%rbp)
je     1175 <skipUntilChar+0x55>
movsbl -0x9(%rbp),%eax
cmp    -0x10(%rbp),%eax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    1145 <skipUntilChar+0x25>
mov    -0x10(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skipUntilChar>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebp
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1040 <assert@plt>
mov    0x2eaa(%rip),%r14
xchg   %ax,%ax
mov    %rbx,%rdi
call   1030 <fgetc@plt>
cmp    %ebp,%eax
je     1151 <skipUntilChar+0x31>
cmp    %eax,(%r14)
jne    1140 <skipUntilChar+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@EOF = global i32 0
define i32 @skipUntilChar(i32* %0, i8 signext %1) {
%3 = alloca i32*
%4 = alloca i8
%5 = alloca i32
store i32* %0, i32** %3
store i8 %1, i8* %4
%6 = load i32*, i32** %3
%7 = icmp ne i32* null, %6
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
br label %10
10: ; preds = %22, %2
%11 = load i32*, i32** %3
%12 = call i32 @fgetc(i32* %11)
store i32 %12, i32* %5
br label %13
13: ; preds = %10
%14 = load i32, i32* @EOF
%15 = load i32, i32* %5
%16 = icmp ne i32 %14, %15
br i1 %16, label %17, label %22
17: ; preds = %13
%18 = load i8, i8* %4
%19 = sext i8 %18 to i32
%20 = load i32, i32* %5
%21 = icmp ne i32 %19, %20
br label %22
22: ; preds = %17, %13
%23 = phi i1 [ false, %13 ], [ %21, %17 ]
br i1 %23, label %10, label %24
24: ; preds = %22
%25 = load i32, i32* %5
ret i32 %25
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @skipUntilChar(i32* %0, i8 signext %1) {
%3 = icmp ne i32* %0, null
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = sext i8 %1 to i32
br label %7
7: ; preds = %7, %2
%8 = tail call i32 @fgetc(i32* %0)
%9 = load i32, i32* @EOF
%10 = icmp ne i32 %9, %8
%11 = icmp ne i32 %8, %6
%12 = and i1 %11, %10
br i1 %12, label %7, label %13
13: ; preds = %7
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
void op_dec_16(void *_a, void *_b) {
  uint16_t *a = (uint16_t *)_a;
  (*a)--;
}


x86 assembly (clang, -O0):
<op_dec_16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
add    $0xffffffff,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_dec_16>:
addl   $0xffffffff,(%rdi)
ret

LLVM IR (-O0):
define void @op_dec_16(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %5
%8 = load i32*, i32** %5
%9 = load i32, i32* %8
%10 = add nsw i32 %9, -1
store i32 %10, i32* %8
ret void
}

LLVM IR (-O2):
define void @op_dec_16(i8* nocapture %0, i8* nocapture readnone %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = add nsw i32 %4, -1
store i32 %5, i32* %3
ret void
}
int test_switch_FN() {
  int value = 0;
  while (value < 100) {
    switch (value) {
      int x = 1;
      x = value + 1;
    case 0:
      break;
    case 1:
      continue;
    case 2:
    default:
      continue;
    }
    value++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<test_switch_FN>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0x64,-0x4(%rbp)
jge    116c <test_switch_FN+0x6c>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
test   %eax,%eax
je     114a <test_switch_FN+0x4a>
jmp    1128 <test_switch_FN+0x28>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
je     114f <test_switch_FN+0x4f>
jmp    1139 <test_switch_FN+0x39>
mov    -0xc(%rbp),%eax
sub    $0x2,%eax
je     1154 <test_switch_FN+0x54>
jmp    1159 <test_switch_FN+0x59>
jmp    115e <test_switch_FN+0x5e>
jmp    110b <test_switch_FN+0xb>
jmp    1159 <test_switch_FN+0x59>
jmp    110b <test_switch_FN+0xb>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <test_switch_FN+0xb>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define i32 @test_switch_FN() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %12, %11, %9, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 100
br i1 %5, label %6, label %15
6: ; preds = %3
%7 = load i32, i32* %1
switch i32 %7, label %11 [
i32 0, label %8
i32 1, label %9
i32 2, label %10
]
8: ; preds = %6
br label %12
9: ; preds = %6
br label %3
10: ; preds = %6
br label %11
11: ; preds = %6, %10
br label %3
12: ; preds = %8
%13 = load i32, i32* %1
%14 = add nsw i32 %13, 1
store i32 %14, i32* %1
br label %3
15: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
unsigned long __attribute__((unused)) i86ul_to_host(unsigned long ul) {
  unsigned long res = 0;
  int i;
  union {
    unsigned char c[4];
    unsigned long ul;
  } u;
  u.ul = ul;
  for (i = 3; i >= 0; i--)
    res = (res << 8) + u.c[i];
  return res;
}


x86 assembly (clang, -O0):
<i86ul_to_host>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
movl   $0x3,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jl     114f <i86ul_to_host+0x4f>
mov    -0x10(%rbp),%rax
shl    $0x8,%rax
movslq -0x14(%rbp),%rcx
movzbl -0x20(%rbp,%rcx,1),%ecx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
jmp    111f <i86ul_to_host+0x1f>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<i86ul_to_host>:
mov    %edi,%eax
ret

LLVM IR (-O0):
%union.anon = type { i64 }
define i64 @i86ul_to_host(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i32
%5 = alloca %union.anon
store i64 %0, i64* %2
store i64 0, i64* %3
%6 = load i64, i64* %2
%7 = bitcast %union.anon* %5 to i64*
store i64 %6, i64* %7
store i32 3, i32* %4
br label %8
8: ; preds = %21, %1
%9 = load i32, i32* %4
%10 = icmp sge i32 %9, 0
br i1 %10, label %11, label %24
11: ; preds = %8
%12 = load i64, i64* %3
%13 = shl i64 %12, 8
%14 = bitcast %union.anon* %5 to [4 x i8]*
%15 = load i32, i32* %4
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds [4 x i8], [4 x i8]* %14, i64 0, i64 %16
%18 = load i8, i8* %17
%19 = zext i8 %18 to i64
%20 = add i64 %13, %19
store i64 %20, i64* %3
br label %21
21: ; preds = %11
%22 = load i32, i32* %4
%23 = add nsw i32 %22, -1
store i32 %23, i32* %4
br label %8
24: ; preds = %8
%25 = load i64, i64* %3
ret i64 %25
}

LLVM IR (-O2):
define i64 @i86ul_to_host(i64 %0) {
%2 = and i64 %0, 4294967295
ret i64 %2
}
int f6(int x, int y) {
  if (y < 0 || y > 24)
    __builtin_unreachable();
  return x % -y;
}


x86 assembly (clang, -O0):
<f6>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     111e <f6+0x1e>
cmpl   $0x18,-0x8(%rbp)
jle    111e <f6+0x1e>
mov    -0x4(%rbp),%eax
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f6>:
mov    %edi,%eax
neg    %esi
cltd
idiv   %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @f6(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp slt i32 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %4
%9 = icmp sgt i32 %8, 24
br i1 %9, label %10, label %11
10: ; preds = %7, %2
unreachable
11: ; preds = %7
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = sub nsw i32 0, %13
%15 = srem i32 %12, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @f6(i32 %0, i32 %1) {
%3 = icmp ult i32 %1, 25
tail call void @llvm.assume(i1 %3)
%4 = sub nsw i32 0, %1
%5 = srem i32 %0, %4
ret i32 %5
}
/* Variables and functions */
size_t vfc_hashmap_str_function(const char *id) {
  unsigned const char *us;
  us = (unsigned const char *)id;
  size_t index = 0;
  while (*us != '\0') {
    index = index * 31 + *us;
    us++;
  }
  return index;
}


x86 assembly (clang, -O0):
<vfc_hashmap_str_function>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
cmp    $0x0,%eax
je     114c <vfc_hashmap_str_function+0x4c>
imul   $0x1f,-0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
movzbl (%rcx),%ecx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1118 <vfc_hashmap_str_function+0x18>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vfc_hashmap_str_function>:
mov    (%rdi),%cl
test   %cl,%cl
je     112c <vfc_hashmap_str_function+0x2c>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
mov    %rax,%rdx
shl    $0x5,%rdx
sub    %rax,%rdx
movzbl %cl,%eax
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <vfc_hashmap_str_function+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @vfc_hashmap_str_function(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8* %5, i8** %3
store i64 0, i64* %4
br label %6
6: ; preds = %11, %1
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %20
11: ; preds = %6
%12 = load i64, i64* %4
%13 = mul i64 %12, 31
%14 = load i8*, i8** %3
%15 = load i8, i8* %14
%16 = zext i8 %15 to i64
%17 = add i64 %13, %16
store i64 %17, i64* %4
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
br label %6
20: ; preds = %6
%21 = load i64, i64* %4
ret i64 %21
}

LLVM IR (-O2):
define i64 @vfc_hashmap_str_function(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i64 [ %10, %4 ], [ 0, %1 ]
%7 = phi i8* [ %11, %4 ], [ %0, %1 ]
%8 = mul i64 %6, 31
%9 = zext i8 %5 to i64
%10 = add i64 %8, %9
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ 0, %1 ], [ %10, %4 ]
ret i64 %15
}
int __test() {
  int x = 3;
  ++x;
  return ++x;
}


x86 assembly (clang, -O0):
<__test>:
push   %rbp
mov    %rsp,%rbp
movl   $0x3,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__test>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @__test() {
%1 = alloca i32
store i32 3, i32* %1
%2 = load i32, i32* %1
%3 = add nsw i32 %2, 1
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = add nsw i32 %4, 1
store i32 %5, i32* %1
ret i32 %5
}

LLVM IR (-O2):
define i32 @__test() {
ret i32 5
}
/* Variables and functions */
int strcoll(char *, char *);
int charcoll(const void *a, const void *b) {
  static char sa[2], sb[2];
  sa[0] = *(const int *)a;
  sb[0] = *(const int *)b;
  return (strcoll(sa, sb));
}


x86 assembly (clang, -O0):
<charcoll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %al,0x2efd(%rip)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %al,0x2ef3(%rip)
lea    0x2eea(%rip),%rdi
lea    0x2ee5(%rip),%rsi
call   1030 <strcoll@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<charcoll>:
mov    (%rdi),%al
mov    %al,0x2f11(%rip)
lea    0x2f0a(%rip),%rdi
mov    (%rsi),%al
mov    %al,0x2f04(%rip)
lea    0x2efd(%rip),%rsi
jmp    1030 <strcoll@plt>

LLVM IR (-O0):
@charcoll.sa = internal global [2 x i8] zeroinitializer
@charcoll.sb = internal global [2 x i8] zeroinitializer
define i32 @charcoll(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = trunc i32 %7 to i8
store i8 %8, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @charcoll.sa, i64 0, i64 0)
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
%11 = load i32, i32* %10
%12 = trunc i32 %11 to i8
store i8 %12, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @charcoll.sb, i64 0, i64 0)
%13 = call i32 @strcoll(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @charcoll.sa, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @charcoll.sb, i64 0, i64 0))
ret i32 %13
}

LLVM IR (-O2):
@charcoll.sa = internal global [2 x i8] zeroinitializer
@charcoll.sb = internal global [2 x i8] zeroinitializer
define i32 @charcoll(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = trunc i32 %4 to i8
store i8 %5, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @charcoll.sa, i64 0, i64 0)
%6 = bitcast i8* %1 to i32*
%7 = load i32, i32* %6
%8 = trunc i32 %7 to i8
store i8 %8, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @charcoll.sb, i64 0, i64 0)
%9 = tail call i32 @strcoll(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @charcoll.sa, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @charcoll.sb, i64 0, i64 0))
ret i32 %9
}
/* Variables and functions */
char *caesar_cipher(char *, unsigned long, int);
char *caesar_decode(char *string, unsigned long len, int rot) {
  return caesar_cipher(string, len, -rot);
}


x86 assembly (clang, -O0):
<caesar_decode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
sub    -0x14(%rbp),%edx
call   1030 <caesar_cipher@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<caesar_decode>:
neg    %edx
jmp    1030 <caesar_cipher@plt>

LLVM IR (-O0):
define i8* @caesar_decode(i8* %0, i64 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32
store i8* %0, i8** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load i32, i32* %6
%10 = sub nsw i32 0, %9
%11 = call i8* @caesar_cipher(i8* %7, i64 %8, i32 %10)
ret i8* %11
}

LLVM IR (-O2):
define i8* @caesar_decode(i8* %0, i64 %1, i32 %2) {
%4 = sub nsw i32 0, %2
%5 = tail call i8* @caesar_cipher(i8* %0, i64 %1, i32 %4)
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ put_word(int, int);
int /*<<< orphan*/ write_ndless3x_loader(int /*<<< orphan*/,
                                         int /*<<< orphan*/);
__attribute__((always_)) void patch_NCAS_3_1_0_392_extra(void) {
  write_ndless3x_loader(0, 0);
  put_word(0x100B172C, 0xEAFFFFFE);
}


x86 assembly (clang, -O0):
<patch_NCAS_3_1_0_392_extra>:
push   %rbp
mov    %rsp,%rbp
xor    %esi,%esi
mov    %esi,%edi
call   1030 <write_ndless3x_loader@plt>
mov    $0x100b172c,%edi
mov    $0xeafffffe,%esi
call   1040 <put_word@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<patch_NCAS_3_1_0_392_extra>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
call   1030 <write_ndless3x_loader@plt>
mov    $0x100b172c,%edi
mov    $0xeafffffe,%esi
pop    %rax
jmp    1040 <put_word@plt>

LLVM IR (-O0):
define void @patch_NCAS_3_1_0_392_extra() {
%1 = call i32 @write_ndless3x_loader(i32 0, i32 0)
%2 = call i32 @put_word(i32 269162284, i32 -352321538)
ret void
}

LLVM IR (-O2):
define void @patch_NCAS_3_1_0_392_extra() {
%1 = tail call i32 @write_ndless3x_loader(i32 0, i32 0)
%2 = tail call i32 @put_word(i32 269162284, i32 -352321538)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void reservaCrucigrama() { printf("Reserva memoria para un crucigrama\n"); }


x86 assembly (clang, -O0):
<reservaCrucigrama>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<reservaCrucigrama>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"Reserva memoria para un crucigrama\0A\00"
define void @reservaCrucigrama() {
%1 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [35 x i8] c"Reserva memoria para un crucigrama\00"
define void @reservaCrucigrama() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
ret void
}
unsigned int hash(const char *str) {
  unsigned int h = 0;
  for (; *str; str++)
    h = 31 * h + *str;
  return h % 29989;
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     113d <hash+0x3d>
imul   $0x1f,-0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
movsbl (%rcx),%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <hash+0xf>
mov    -0xc(%rbp),%eax
mov    $0x7525,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     113d <hash+0x3d>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
mov    %eax,%edx
shl    $0x5,%edx
sub    %eax,%edx
movsbl %cl,%eax
add    %edx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash+0x10>
mov    %eax,%ecx
imul   $0x22f7217,%rcx,%rcx
shr    $0x28,%rcx
imul   $0x7525,%ecx,%ecx
sub    %ecx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %15, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %18
8: ; preds = %4
%9 = load i32, i32* %3
%10 = mul i32 31, %9
%11 = load i8*, i8** %2
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = add i32 %10, %13
store i32 %14, i32* %3
br label %15
15: ; preds = %8
%16 = load i8*, i8** %2
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %2
br label %4
18: ; preds = %4
%19 = load i32, i32* %3
%20 = urem i32 %19, 29989
ret i32 %20
}

LLVM IR (-O2):
define i32 @hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %10, %4 ], [ 0, %1 ]
%7 = phi i8* [ %11, %4 ], [ %0, %1 ]
%8 = mul i32 %6, 31
%9 = sext i8 %5 to i32
%10 = add i32 %8, %9
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4
%15 = urem i32 %10, 29989
br label %16
16: ; preds = %14, %1
%17 = phi i32 [ 0, %1 ], [ %15, %14 ]
ret i32 %17
}
/* Type definitions */
typedef char uint8_t;

/* Variables and functions */
uint8_t gethexdigit(char c) {
  uint8_t v;
  if ((c >= 0x30) && (c <= 0x39)) {
    v = c - 0x30;
  } else if ((c >= 0x61) && (c <= 0x66)) {
    v = c - 0x61 + 0xa;
  }
  return v;
}


x86 assembly (clang, -O0):
<gethexdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x30,%eax
jl     1133 <gethexdigit+0x33>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
jg     1133 <gethexdigit+0x33>
movsbl -0x1(%rbp),%eax
sub    $0x30,%eax
mov    %al,-0x2(%rbp)
jmp    115f <gethexdigit+0x5f>
movsbl -0x1(%rbp),%eax
cmp    $0x61,%eax
jl     115a <gethexdigit+0x5a>
movsbl -0x1(%rbp),%eax
cmp    $0x66,%eax
jg     115a <gethexdigit+0x5a>
movsbl -0x1(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %al,-0x2(%rbp)
jmp    115f <gethexdigit+0x5f>
movsbl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gethexdigit>:
lea    -0x30(%rdi),%eax
add    $0xa9,%dil
cmp    $0xa,%al
movzbl %al,%ecx
movzbl %dil,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @gethexdigit(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %16
7: ; preds = %1
%8 = load i8, i8* %2
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %11, label %16
11: ; preds = %7
%12 = load i8, i8* %2
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %13, 48
%15 = trunc i32 %14 to i8
store i8 %15, i8* %3
br label %31
16: ; preds = %7, %1
%17 = load i8, i8* %2
%18 = sext i8 %17 to i32
%19 = icmp sge i32 %18, 97
br i1 %19, label %20, label %30
20: ; preds = %16
%21 = load i8, i8* %2
%22 = sext i8 %21 to i32
%23 = icmp sle i32 %22, 102
br i1 %23, label %24, label %30
24: ; preds = %20
%25 = load i8, i8* %2
%26 = sext i8 %25 to i32
%27 = sub nsw i32 %26, 97
%28 = add nsw i32 %27, 10
%29 = trunc i32 %28 to i8
store i8 %29, i8* %3
br label %30
30: ; preds = %24, %20, %16
br label %31
31: ; preds = %30, %11
%32 = load i8, i8* %3
ret i8 %32
}

LLVM IR (-O2):
define signext i8 @gethexdigit(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = add i8 %0, -87
%5 = select i1 %3, i8 %2, i8 %4
ret i8 %5
}
/* Variables and functions */
int /*<<< orphan*/ p5(void const *);
void s5(const void *cl) { p5(&cl[1]); }


x86 assembly (clang, -O0):
<s5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x1,%rdi
call   1030 <p5@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s5>:
add    $0x1,%rdi
jmp    1030 <p5@plt>

LLVM IR (-O0):
define void @s5(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 1
%5 = call i32 @p5(i8* %4)
ret void
}

LLVM IR (-O2):
define void @s5(i8* %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 1
%3 = tail call i32 @p5(i8* %2)
ret void
}
/* Variables and functions */
scalar_t__ receive_ok(int);
scalar_t__ send_command(int, char *);
int send_command_expect_ok(int server_connection_index, char *cmd) {
  if (send_command(server_connection_index, cmd)) {
    return -1;
  }
  if (receive_ok(server_connection_index) < 0) {
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<send_command_expect_ok>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <send_command@plt>
cmp    $0x0,%rax
je     1151 <send_command_expect_ok+0x31>
movl   $0xffffffff,-0x4(%rbp)
jmp    1176 <send_command_expect_ok+0x56>
mov    -0x8(%rbp),%edi
call   1030 <receive_ok@plt>
cmp    $0x0,%rax
jge    116f <send_command_expect_ok+0x4f>
movl   $0xffffffff,-0x4(%rbp)
jmp    1176 <send_command_expect_ok+0x56>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_command_expect_ok>:
push   %rbx
mov    %edi,%ebx
call   1040 <send_command@plt>
mov    %rax,%rcx
mov    $0xffffffff,%eax
test   %rcx,%rcx
je     1137 <send_command_expect_ok+0x17>
pop    %rbx
ret
mov    %ebx,%edi
call   1030 <receive_ok@plt>
sar    $0x3f,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @send_command_expect_ok(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
%6 = load i32, i32* %4
%7 = load i8*, i8** %5
%8 = call i64 @send_command(i32 %6, i8* %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 -1, i32* %3
br label %17
11: ; preds = %2
%12 = load i32, i32* %4
%13 = call i64 @receive_ok(i32 %12)
%14 = icmp slt i64 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %11
store i32 -1, i32* %3
br label %17
16: ; preds = %11
store i32 0, i32* %3
br label %17
17: ; preds = %16, %15, %10
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @send_command_expect_ok(i32 %0, i8* %1) {
%3 = tail call i64 @send_command(i32 %0, i8* %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = tail call i64 @receive_ok(i32 %0)
%7 = ashr i64 %6, 63
%8 = trunc i64 %7 to i32
br label %9
9: ; preds = %5, %2
%10 = phi i32 [ -1, %2 ], [ %8, %5 ]
ret i32 %10
}
/* Variables and functions */
void *calloc(size_t, size_t);
int /*<<< orphan*/ err_sys(char *);
void *Calloc(size_t n, size_t size) {
  void *ptr;
  if ((ptr = calloc(n, size)) == NULL)
    err_sys("calloc error");
  return ptr;
}


x86 assembly (clang, -O0):
<Calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    1157 <Calloc+0x37>
lea    0xeae(%rip),%rdi
call   1030 <err_sys@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Calloc>:
push   %rbx
call   1040 <calloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <Calloc+0x1a>
lea    0xecb(%rip),%rdi
call   1030 <err_sys@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"calloc error\00"
define i8* @Calloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i8* @calloc(i64 %6, i64 %7)
store i8* %8, i8** %5
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = call i32 @err_sys(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %10, %2
%13 = load i8*, i8** %5
ret i8* %13
}

LLVM IR (-O2):
@.str = [13 x i8] c"calloc error\00"
define noalias i8* @Calloc(i64 %0, i64 %1) {
%3 = tail call i8* @calloc(i64 %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @err_sys(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret i8* %3
}
/* Type definitions */
typedef scalar_t__ volatile uint8_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
void GPIOADCTriggerDisable(uint32_t ui32Port, uint8_t ui8Pins) {
  ;
  (*((volatile uint32_t *)(ui32Port + 0x00000530))) &= (~ui8Pins);
}


x86 assembly (clang, -O0):
<GPIOADCTriggerDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
xor    $0xffffffffffffffff,%rdx
mov    -0x8(%rbp),%rax
mov    0x530(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x530(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOADCTriggerDisable>:
mov    %rsi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
not    %rax
and    %rax,0x530(%rdi)
ret

LLVM IR (-O0):
define void @GPIOADCTriggerDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = xor i64 %5, -1
%7 = load i64, i64* %3
%8 = add nsw i64 %7, 1328
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = and i64 %10, %6
store volatile i64 %11, i64* %9
ret void
}

LLVM IR (-O2):
define void @GPIOADCTriggerDisable(i64 %0, i64 %1) {
%3 = alloca i64
store volatile i64 %1, i64* %3
%4 = load volatile i64, i64* %3
%5 = xor i64 %4, -1
%6 = add nsw i64 %0, 1328
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = and i64 %8, %5
store volatile i64 %9, i64* %7
ret void
}
float goo(float *p) {
  *p = *p + 18.5f;
  return *p;
}


x86 assembly (clang, -O0):
<goo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  0xeec(%rip),%xmm0
addss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<goo>:
movss  (%rdi),%xmm0
addss  0xef4(%rip),%xmm0
movss  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define float @goo(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = load float, float* %3
%5 = fadd float %4, 1.850000e+01
%6 = load float*, float** %2
store float %5, float* %6
%7 = load float*, float** %2
%8 = load float, float* %7
ret float %8
}

LLVM IR (-O2):
define float @goo(float* nocapture %0) {
%2 = load float, float* %0
%3 = fadd float %2, 1.850000e+01
store float %3, float* %0
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ step_hash(int);
unsigned func_57(unsigned char p_58, unsigned p_59) {
  unsigned short l_312 = 0x013EL;
  step_hash(128);
  return l_312;
}


x86 assembly (clang, -O0):
<func_57>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
movw   $0x13e,-0xa(%rbp)
mov    $0x80,%edi
call   1030 <step_hash@plt>
movzwl -0xa(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_57>:
push   %rax
mov    $0x80,%edi
call   1030 <step_hash@plt>
mov    $0x13e,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @func_57(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
%5 = alloca i16
store i8 %0, i8* %3
store i32 %1, i32* %4
store i16 318, i16* %5
%6 = call i32 @step_hash(i32 128)
%7 = load i16, i16* %5
%8 = zext i16 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @func_57(i8 zeroext %0, i32 %1) {
%3 = tail call i32 @step_hash(i32 128)
ret i32 318
}
/* Variables and functions */
int /*<<< orphan*/ Absolute(int);
int /*<<< orphan*/ ROR8(int /*<<< orphan*/);
void Op6EM1(void) { ROR8(Absolute(3)); }


x86 assembly (clang, -O0):
<Op6EM1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1040 <Absolute@plt>
mov    %eax,%edi
call   1030 <ROR8@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Op6EM1>:
push   %rax
mov    $0x3,%edi
call   1040 <Absolute@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <ROR8@plt>

LLVM IR (-O0):
define void @Op6EM1() {
%1 = call i32 @Absolute(i32 3)
%2 = call i32 @ROR8(i32 %1)
ret void
}

LLVM IR (-O2):
define void @Op6EM1() {
%1 = tail call i32 @Absolute(i32 3)
%2 = tail call i32 @ROR8(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print_uart0(char *);
int /*<<< orphan*/ uart_init();
void main() {
  uart_init();
  print_uart0("Hello world!\n");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <uart_init@plt>
lea    0xece(%rip),%rdi
call   1040 <print_uart0@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <uart_init@plt>
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1040 <print_uart0@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"Hello world!\0A\00"
define void @main() {
%1 = call i32 (...) @uart_init()
%2 = call i32 @print_uart0(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"Hello world!\0A\00"
define void @main() {
%1 = tail call i32 (...) @uart_init()
%2 = tail call i32 @print_uart0(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct qbuf {
  int dummy;
};

/* Variables and functions */
int qbuf_append(struct qbuf *, void const *, unsigned long);
int /*<<< orphan*/ qbuf_clear(struct qbuf *);
int qbuf_assign(struct qbuf *q, const void *data, unsigned long size) {
  qbuf_clear(q);
  return qbuf_append(q, data, size);
}


x86 assembly (clang, -O0):
<qbuf_assign>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <qbuf_clear@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <qbuf_append@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qbuf_assign>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
call   1040 <qbuf_clear@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <qbuf_append@plt>

LLVM IR (-O0):
%struct.qbuf = type { i32 }
define i32 @qbuf_assign(%struct.qbuf* %0, i8* %1, i64 %2) {
%4 = alloca %struct.qbuf*
%5 = alloca i8*
%6 = alloca i64
store %struct.qbuf* %0, %struct.qbuf** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load %struct.qbuf*, %struct.qbuf** %4
%8 = call i32 @qbuf_clear(%struct.qbuf* %7)
%9 = load %struct.qbuf*, %struct.qbuf** %4
%10 = load i8*, i8** %5
%11 = load i64, i64* %6
%12 = call i32 @qbuf_append(%struct.qbuf* %9, i8* %10, i64 %11)
ret i32 %12
}

LLVM IR (-O2):
%struct.qbuf = type { i32 }
define i32 @qbuf_assign(%struct.qbuf* %0, i8* %1, i64 %2) {
%4 = tail call i32 @qbuf_clear(%struct.qbuf* %0)
%5 = tail call i32 @qbuf_append(%struct.qbuf* %0, i8* %1, i64 %2)
ret i32 %5
}
int test_imm_D7int16_mem(short *val) {
  return ((*val) & (0xD7 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D7int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xd7,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D7int16_mem>:
testb  $0xd7,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D7int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 215
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_D7int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 215
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int test_imm_CDuint16_reg(unsigned short val) {
  return ((val) & (-0xCD << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CDuint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff33,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CDuint16_reg>:
test   $0xff33,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CDuint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -205
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_CDuint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -205
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ DoTests();
int main() {
  DoTests();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <DoTests@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <DoTests@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @DoTests()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @DoTests()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ terminal_writestring(char *);
void kprint(char *str) { terminal_writestring(str); }


x86 assembly (clang, -O0):
<kprint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <terminal_writestring@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kprint>:
jmp    1030 <terminal_writestring@plt>

LLVM IR (-O0):
define void @kprint(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @terminal_writestring(i8* %3)
ret void
}

LLVM IR (-O2):
define void @kprint(i8* %0) {
%2 = tail call i32 @terminal_writestring(i8* %0)
ret void
}
int BCDToInt(int bcd) { return (bcd >> 4) * 10 + (bcd & 0x0F); }


x86 assembly (clang, -O0):
<BCDToInt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
imul   $0xa,%eax,%eax
mov    -0x4(%rbp),%ecx
and    $0xf,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BCDToInt>:
mov    %edi,%eax
sar    $0x4,%eax
lea    (%rax,%rax,4),%eax
and    $0xf,%edi
lea    (%rdi,%rax,2),%eax
ret

LLVM IR (-O0):
define i32 @BCDToInt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 4
%5 = mul nsw i32 %4, 10
%6 = load i32, i32* %2
%7 = and i32 %6, 15
%8 = add nsw i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @BCDToInt(i32 %0) {
%2 = ashr i32 %0, 4
%3 = mul nsw i32 %2, 10
%4 = and i32 %0, 15
%5 = add nsw i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int x = 0;
  assert(x != 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ DirectIndexedYE0(int);
int /*<<< orphan*/ STX16(int /*<<< orphan*/, int);
void Op96E0X0(void) { STX16(DirectIndexedYE0(2), 0xFFFF); }


x86 assembly (clang, -O0):
<Op96E0X0>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <DirectIndexedYE0@plt>
mov    %eax,%edi
mov    $0xffff,%esi
call   1040 <STX16@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Op96E0X0>:
push   %rax
mov    $0x2,%edi
call   1030 <DirectIndexedYE0@plt>
mov    %eax,%edi
mov    $0xffff,%esi
pop    %rax
jmp    1040 <STX16@plt>

LLVM IR (-O0):
define void @Op96E0X0() {
%1 = call i32 @DirectIndexedYE0(i32 2)
%2 = call i32 @STX16(i32 %1, i32 65535)
ret void
}

LLVM IR (-O2):
define void @Op96E0X0() {
%1 = tail call i32 @DirectIndexedYE0(i32 2)
%2 = tail call i32 @STX16(i32 %1, i32 65535)
ret void
}
/* Type definitions */
struct DSHashMap {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
void *ds_hashmap_get_int(struct DSHashMap *, int /*<<< orphan*/);
void *ds_geti(struct DSHashMap *hash, int32_t key) {
  return ds_hashmap_get_int(hash, key);
}


x86 assembly (clang, -O0):
<ds_geti>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <ds_hashmap_get_int@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ds_geti>:
jmp    1030 <ds_hashmap_get_int@plt>

LLVM IR (-O0):
%struct.DSHashMap = type { i32 }
define i8* @ds_geti(%struct.DSHashMap* %0, i32 %1) {
%3 = alloca %struct.DSHashMap*
%4 = alloca i32
store %struct.DSHashMap* %0, %struct.DSHashMap** %3
store i32 %1, i32* %4
%5 = load %struct.DSHashMap*, %struct.DSHashMap** %3
%6 = load i32, i32* %4
%7 = call i8* @ds_hashmap_get_int(%struct.DSHashMap* %5, i32 %6)
ret i8* %7
}

LLVM IR (-O2):
%struct.DSHashMap = type { i32 }
define i8* @ds_geti(%struct.DSHashMap* %0, i32 %1) {
%3 = tail call i8* @ds_hashmap_get_int(%struct.DSHashMap* %0, i32 %1)
ret i8* %3
}
/* Type definitions */
struct sched_param {
  int dummy;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int syscall(int, int /*<<< orphan*/, int /*<<< orphan*/,
            struct sched_param const *);
int sched_setscheduler(pid_t pid, int sched, const struct sched_param *param) {
  static const struct sched_param def;
  return syscall(156, pid, 0, &def);
}


x86 assembly (clang, -O0):
<sched_setscheduler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x9c,%edi
xor    %edx,%edx
lea    0xecd(%rip),%rcx
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sched_setscheduler>:
mov    %edi,%esi
lea    0xee7(%rip),%rcx
mov    $0x9c,%edi
xor    %edx,%edx
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.sched_param = type { i32 }
@sched_setscheduler.def = internal constant %struct.sched_param zeroinitializer
define i32 @sched_setscheduler(i32 %0, i32 %1, %struct.sched_param* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca %struct.sched_param*
store i32 %0, i32* %4
store i32 %1, i32* %5
store %struct.sched_param* %2, %struct.sched_param** %6
%7 = load i32, i32* %4
%8 = call i32 @syscall(i32 156, i32 %7, i32 0, %struct.sched_param* @sched_setscheduler.def)
ret i32 %8
}

LLVM IR (-O2):
%struct.sched_param = type { i32 }
@sched_setscheduler.def = internal constant %struct.sched_param zeroinitializer
define i32 @sched_setscheduler(i32 %0, i32 %1, %struct.sched_param* nocapture readnone %2) {
%4 = tail call i32 @syscall(i32 156, i32 %0, i32 0, %struct.sched_param* @sched_setscheduler.def)
ret i32 %4
}
/* Variables and functions */
scalar_t__ malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
char *strdup(const char *s) {
  char *p;
  p = (char *)malloc(strlen(s) + 1);
  if (p != NULL)
    strcpy(p, s);
  return p;
}


x86 assembly (clang, -O0):
<strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     116d <strdup+0x3d>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1158 <strdup+0x28>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i64 @malloc(i64 %6)
%8 = inttoptr i64 %7 to i8*
store i8* %8, i8** %3
%9 = load i8*, i8** %3
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = load i8*, i8** %2
%14 = call i32 @strcpy(i8* %12, i8* %13)
br label %15
15: ; preds = %11, %1
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
define i8* @strdup(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i64 @malloc(i64 %3)
%5 = inttoptr i64 %4 to i8*
%6 = icmp eq i64 %4, 0
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @strcpy(i8* %5, i8* %0)
br label %9
9: ; preds = %7, %1
ret i8* %5
}