xunge/DecIR huggingface dataset:
/* Variables and functions */
char tolower(char);
int getDigit(char c) {
  c = tolower(c);
  if (c >= 'a' && c <= 'f') {
    return 10 + c - 'a';
  }
  return c - '0';
}


x86 assembly (clang, -O0):
<getDigit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%edi
call   1030 <tolower@plt>
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1156 <getDigit+0x46>
movsbl -0x5(%rbp),%eax
cmp    $0x66,%eax
jg     1156 <getDigit+0x46>
movsbl -0x5(%rbp),%eax
add    $0xa,%eax
sub    $0x61,%eax
mov    %eax,-0x4(%rbp)
jmp    1160 <getDigit+0x50>
movsbl -0x5(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getDigit>:
push   %rax
call   1030 <tolower@plt>
movsbl %al,%eax
lea    -0x61(%rax),%ecx
lea    -0x30(%rax),%edx
add    $0xffffffa9,%eax
cmp    $0x6,%cl
cmovae %edx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @getDigit(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = call signext i8 @tolower(i8 signext %4)
store i8 %5, i8* %3
%6 = load i8, i8* %3
%7 = sext i8 %6 to i32
%8 = icmp sge i32 %7, 97
br i1 %8, label %9, label %18
9: ; preds = %1
%10 = load i8, i8* %3
%11 = sext i8 %10 to i32
%12 = icmp sle i32 %11, 102
br i1 %12, label %13, label %18
13: ; preds = %9
%14 = load i8, i8* %3
%15 = sext i8 %14 to i32
%16 = add nsw i32 10, %15
%17 = sub nsw i32 %16, 97
store i32 %17, i32* %2
br label %22
18: ; preds = %9, %1
%19 = load i8, i8* %3
%20 = sext i8 %19 to i32
%21 = sub nsw i32 %20, 48
store i32 %21, i32* %2
br label %22
22: ; preds = %18, %13
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @getDigit(i8 signext %0) {
%2 = tail call signext i8 @tolower(i8 signext %0)
%3 = sext i8 %2 to i32
%4 = add i8 %2, -97
%5 = icmp ult i8 %4, 6
%6 = select i1 %5, i32 -87, i32 -48
%7 = add nsw i32 %6, %3
ret i32 %7
}
/* Variables and functions */
unsigned int next_utf8(char const *, int *);
int fn_cl_46_46(const char *text) {
  int pos = 0;
  unsigned int c = next_utf8(text, &pos);
  if (c >= 46 && c <= 46)
    return pos;
  return -1;
}


x86 assembly (clang, -O0):
<fn_cl_46_46>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x14(%rbp),%rsi
call   1030 <next_utf8@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x2e,-0x18(%rbp)
jb     1152 <fn_cl_46_46+0x42>
cmpl   $0x2e,-0x18(%rbp)
ja     1152 <fn_cl_46_46+0x42>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1159 <fn_cl_46_46+0x49>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_cl_46_46>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rsi
call   1030 <next_utf8@plt>
mov    %eax,%ecx
mov    $0xffffffff,%eax
cmp    $0x2e,%ecx
jne    1133 <fn_cl_46_46+0x23>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fn_cl_46_46(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
%6 = load i8*, i8** %3
%7 = call i32 @next_utf8(i8* %6, i32* %4)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = icmp uge i32 %8, 46
br i1 %9, label %10, label %15
10: ; preds = %1
%11 = load i32, i32* %5
%12 = icmp ule i32 %11, 46
br i1 %12, label %13, label %15
13: ; preds = %10
%14 = load i32, i32* %4
store i32 %14, i32* %2
br label %16
15: ; preds = %10, %1
store i32 -1, i32* %2
br label %16
16: ; preds = %15, %13
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @fn_cl_46_46(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%4 = call i32 @next_utf8(i8* %0, i32* %2)
%5 = icmp eq i32 %4, 46
%6 = load i32, i32* %2
%7 = select i1 %5, i32 %6, i32 -1
ret i32 %7
}
char *strpbrk(const char *s, const char *accept) {
  for (; *s; s++) {
    if (strchr(accept, *s))
      return (char *)s;
  }
  return (void *)0;
}


x86 assembly (clang, -O0):
<strpbrk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     116a <strpbrk+0x5a>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rax
movsbl (%rax),%esi
call   1030 <strchr@plt>
cmp    $0x0,%rax
je     1154 <strpbrk+0x44>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1172 <strpbrk+0x62>
jmp    1159 <strpbrk+0x49>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1120 <strpbrk+0x10>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strpbrk>:
push   %r14
push   %rbx
push   %rax
mov    (%rdi),%al
test   %al,%al
je     113c <strpbrk+0x2c>
mov    %rsi,%r14
mov    %rdi,%rbx
movsbl %al,%esi
mov    %r14,%rdi
call   1030 <strchr@plt>
test   %rax,%rax
jne    113e <strpbrk+0x2e>
movzbl 0x1(%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <strpbrk+0x10>
xor    %ebx,%ebx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strpbrk(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
br label %6
6: ; preds = %20, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %23
10: ; preds = %6
%11 = load i8*, i8** %5
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = call i8* @strchr(i8* %11, i32 %14)
%16 = icmp ne i8* %15, null
br i1 %16, label %17, label %19
17: ; preds = %10
%18 = load i8*, i8** %4
store i8* %18, i8** %3
br label %24
19: ; preds = %10
br label %20
20: ; preds = %19
%21 = load i8*, i8** %4
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %4
br label %6
23: ; preds = %6
store i8* null, i8** %3
br label %24
24: ; preds = %23, %17
%25 = load i8*, i8** %3
ret i8* %25
}

LLVM IR (-O2):
define i8* @strpbrk(i8* %0, i8* %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %11
%6 = phi i8 [ %13, %11 ], [ %3, %2 ]
%7 = phi i8* [ %12, %11 ], [ %0, %2 ]
%8 = sext i8 %6 to i32
%9 = tail call i8* @strchr(i8* dereferenceable(1) %1, i32 %8)
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %5
%12 = getelementptr inbounds i8, i8* %7, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %11, %2
%16 = phi i8* [ null, %2 ], [ null, %11 ], [ %7, %5 ]
ret i8* %16
}
long get_number(char *s, long size, int unsigned_p) {
  long x;
  unsigned char *p = (unsigned char *)s;
  switch (size) {
  case 4:
    x = ((long)p[3] << 24) | ((long)p[2] << 16) | (p[1] << 8) | p[0];
    return x;
  }
}


x86 assembly (clang, -O0):
<get_number>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x18(%rbp),%rax
sub    $0x4,%rax
jne    116c <get_number+0x6c>
jmp    112a <get_number+0x2a>
mov    -0x30(%rbp),%rax
movzbl 0x3(%rax),%eax
shl    $0x18,%rax
mov    -0x30(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x10,%rcx
or     %rcx,%rax
mov    -0x30(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
movslq %ecx,%rcx
or     %rcx,%rax
mov    -0x30(%rbp),%rcx
movzbl (%rcx),%ecx
or     %rcx,%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_number>:
cmp    $0x4,%rsi
jne    1108 <get_number+0x8>
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i64 @get_number(i8* %0, i64 %1, i32 %2) {
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
%8 = alloca i64
%9 = alloca i8*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i32 %2, i32* %7
%10 = load i8*, i8** %5
store i8* %10, i8** %9
%11 = load i64, i64* %6
switch i64 %11, label %37 [
i64 4, label %12
]
12: ; preds = %3
%13 = load i8*, i8** %9
%14 = getelementptr inbounds i8, i8* %13, i64 3
%15 = load i8, i8* %14
%16 = zext i8 %15 to i64
%17 = shl i64 %16, 24
%18 = load i8*, i8** %9
%19 = getelementptr inbounds i8, i8* %18, i64 2
%20 = load i8, i8* %19
%21 = zext i8 %20 to i64
%22 = shl i64 %21, 16
%23 = or i64 %17, %22
%24 = load i8*, i8** %9
%25 = getelementptr inbounds i8, i8* %24, i64 1
%26 = load i8, i8* %25
%27 = zext i8 %26 to i32
%28 = shl i32 %27, 8
%29 = sext i32 %28 to i64
%30 = or i64 %23, %29
%31 = load i8*, i8** %9
%32 = getelementptr inbounds i8, i8* %31, i64 0
%33 = load i8, i8* %32
%34 = zext i8 %33 to i64
%35 = or i64 %30, %34
store i64 %35, i64* %8
%36 = load i64, i64* %8
store i64 %36, i64* %4
br label %37
37: ; preds = %12, %3
%38 = load i64, i64* %4
ret i64 %38
}

LLVM IR (-O2):
define i64 @get_number(i8* nocapture %0, i64 %1, i32 %2) {
%4 = icmp eq i64 %1, 4
br i1 %4, label %5, label %23
5: ; preds = %3
%6 = getelementptr inbounds i8, i8* %0, i64 3
%7 = load i8, i8* %6
%8 = zext i8 %7 to i64
%9 = shl nuw nsw i64 %8, 24
%10 = getelementptr inbounds i8, i8* %0, i64 2
%11 = load i8, i8* %10
%12 = zext i8 %11 to i64
%13 = shl nuw nsw i64 %12, 16
%14 = or i64 %13, %9
%15 = getelementptr inbounds i8, i8* %0, i64 1
%16 = load i8, i8* %15
%17 = zext i8 %16 to i64
%18 = shl nuw nsw i64 %17, 8
%19 = or i64 %14, %18
%20 = load i8, i8* %0
%21 = zext i8 %20 to i64
%22 = or i64 %19, %21
br label %23
23: ; preds = %3, %5
%24 = phi i64 [ %22, %5 ], [ undef, %3 ]
ret i64 %24
}
void testfunc_01(volatile const char *ap, volatile char *bp) {
  bp[0] = ap[15];
  bp[2] = ap[5];
  bp[9] = ap[7];
  bp[0] = ap[25];
  bp[1] = ap[26];
}


x86 assembly (clang, -O0):
<testfunc_01>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0xf(%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
mov    0x5(%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0x8(%rbp),%rax
mov    0x7(%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x9(%rax)
mov    -0x8(%rbp),%rax
mov    0x19(%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
mov    0x1a(%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x1(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<testfunc_01>:
mov    0xf(%rdi),%al
mov    %al,(%rsi)
mov    0x5(%rdi),%al
mov    %al,0x2(%rsi)
mov    0x7(%rdi),%al
mov    %al,0x9(%rsi)
mov    0x19(%rdi),%al
mov    %al,(%rsi)
mov    0x1a(%rdi),%al
mov    %al,0x1(%rsi)
ret

LLVM IR (-O0):
define void @testfunc_01(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 15
%7 = load volatile i8, i8* %6
%8 = load i8*, i8** %4
%9 = getelementptr inbounds i8, i8* %8, i64 0
store volatile i8 %7, i8* %9
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 5
%12 = load volatile i8, i8* %11
%13 = load i8*, i8** %4
%14 = getelementptr inbounds i8, i8* %13, i64 2
store volatile i8 %12, i8* %14
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i64 7
%17 = load volatile i8, i8* %16
%18 = load i8*, i8** %4
%19 = getelementptr inbounds i8, i8* %18, i64 9
store volatile i8 %17, i8* %19
%20 = load i8*, i8** %3
%21 = getelementptr inbounds i8, i8* %20, i64 25
%22 = load volatile i8, i8* %21
%23 = load i8*, i8** %4
%24 = getelementptr inbounds i8, i8* %23, i64 0
store volatile i8 %22, i8* %24
%25 = load i8*, i8** %3
%26 = getelementptr inbounds i8, i8* %25, i64 26
%27 = load volatile i8, i8* %26
%28 = load i8*, i8** %4
%29 = getelementptr inbounds i8, i8* %28, i64 1
store volatile i8 %27, i8* %29
ret void
}

LLVM IR (-O2):
define void @testfunc_01(i8* %0, i8* %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 15
%4 = load volatile i8, i8* %3
store volatile i8 %4, i8* %1
%5 = getelementptr inbounds i8, i8* %0, i64 5
%6 = load volatile i8, i8* %5
%7 = getelementptr inbounds i8, i8* %1, i64 2
store volatile i8 %6, i8* %7
%8 = getelementptr inbounds i8, i8* %0, i64 7
%9 = load volatile i8, i8* %8
%10 = getelementptr inbounds i8, i8* %1, i64 9
store volatile i8 %9, i8* %10
%11 = getelementptr inbounds i8, i8* %0, i64 25
%12 = load volatile i8, i8* %11
store volatile i8 %12, i8* %1
%13 = getelementptr inbounds i8, i8* %0, i64 26
%14 = load volatile i8, i8* %13
%15 = getelementptr inbounds i8, i8* %1, i64 1
store volatile i8 %14, i8* %15
ret void
}
int sprntf(int acpp, int ac) {
  char **cpp = (char **)acpp;
  char c = (char)ac;
  return (*(*cpp)++ = c);
}


x86 assembly (clang, -O0):
<sprntf>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movslq -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
mov    -0x10(%rbp),%rdx
mov    (%rdx),%rcx
mov    %rcx,%rsi
add    $0x1,%rsi
mov    %rsi,(%rdx)
mov    %al,(%rcx)
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sprntf>:
movslq %edi,%rax
mov    (%rax),%rcx
lea    0x1(%rcx),%rdx
mov    %rdx,(%rax)
mov    %sil,(%rcx)
movsbl %sil,%eax
ret

LLVM IR (-O0):
define i32 @sprntf(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i8**
store i8** %9, i8*** %5
%10 = load i32, i32* %4
%11 = trunc i32 %10 to i8
store i8 %11, i8* %6
%12 = load i8, i8* %6
%13 = load i8**, i8*** %5
%14 = load i8*, i8** %13
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %13
store i8 %12, i8* %14
%16 = sext i8 %12 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @sprntf(i32 %0, i32 %1) {
%3 = sext i32 %0 to i64
%4 = inttoptr i64 %3 to i8**
%5 = trunc i32 %1 to i8
%6 = load i8*, i8** %4
%7 = getelementptr inbounds i8, i8* %6, i64 1
store i8* %7, i8** %4
store i8 %5, i8* %6
%8 = shl i32 %1, 24
%9 = ashr exact i32 %8, 24
ret i32 %9
}
/* Type definitions */
typedef scalar_t__ pid_t;

/* Variables and functions */
int setpgid(pid_t pid, pid_t pgid) {
  if (pid != pgid)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<setpgid>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
je     1126 <setpgid+0x26>
movl   $0xffffffff,-0x4(%rbp)
jmp    112d <setpgid+0x2d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setpgid>:
xor    %eax,%eax
cmp    %rsi,%rdi
setne  %al
neg    %eax
ret

LLVM IR (-O0):
define i32 @setpgid(i64 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %4
%7 = load i64, i64* %5
%8 = icmp ne i64 %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 -1, i32* %3
br label %11
10: ; preds = %2
store i32 0, i32* %3
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @setpgid(i64 %0, i64 %1) {
%3 = icmp ne i64 %0, %1
%4 = sext i1 %3 to i32
ret i32 %4
}
int test_imm_D0int64_lowword_mem(long long *val) {
  return ((*val) & (0xD0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D0int64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xd0,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D0int64_lowword_mem>:
testb  $0xd0,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D0int64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 208
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D0int64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 208
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
#define AF_INET 128
int /*<<< orphan*/ EAFNOSUPPORT;
int /*<<< orphan*/ errno;
int inet_pton4(char const *, unsigned char *);
int inet_pton(int af, const char *src, void *dst) {
  switch (af) {
  case AF_INET:
    return (inet_pton4(src, (unsigned char *)dst));
  default:
    errno = EAFNOSUPPORT;
    return (-1);
  }
}


x86 assembly (clang, -O0):
<inet_pton>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x80,%eax
jne    114b <inet_pton+0x3b>
jmp    1136 <inet_pton+0x26>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <inet_pton4@plt>
mov    %eax,-0x4(%rbp)
jmp    1164 <inet_pton+0x54>
mov    0x2e86(%rip),%rax
mov    (%rax),%ecx
mov    0x2e85(%rip),%rax
mov    %ecx,(%rax)
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inet_pton>:
cmp    $0x80,%edi
jne    1123 <inet_pton+0x13>
mov    %rsi,%rdi
mov    %rdx,%rsi
jmp    1030 <inet_pton4@plt>
mov    0x2eae(%rip),%rax
mov    (%rax),%eax
mov    0x2ead(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@EAFNOSUPPORT = global i32 0
@errno = global i32 0
define i32 @inet_pton(i32 %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
store i32 %0, i32* %5
store i8* %1, i8** %6
store i8* %2, i8** %7
%8 = load i32, i32* %5
switch i32 %8, label %13 [
i32 128, label %9
]
9: ; preds = %3
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = call i32 @inet_pton4(i8* %10, i8* %11)
store i32 %12, i32* %4
br label %15
13: ; preds = %3
%14 = load i32, i32* @EAFNOSUPPORT
store i32 %14, i32* @errno
store i32 -1, i32* %4
br label %15
15: ; preds = %13, %9
%16 = load i32, i32* %4
ret i32 %16
}

LLVM IR (-O2):
@EAFNOSUPPORT = global i32 0
@errno = global i32 0
define i32 @inet_pton(i32 %0, i8* %1, i8* %2) {
%4 = icmp eq i32 %0, 128
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 @inet_pton4(i8* %1, i8* %2)
br label %9
7: ; preds = %3
%8 = load i32, i32* @EAFNOSUPPORT
store i32 %8, i32* @errno
br label %9
9: ; preds = %7, %5
%10 = phi i32 [ %6, %5 ], [ -1, %7 ]
ret i32 %10
}
/* Variables and functions */
int f5();
int f4() {
  int x;
  x = f5();
  return 4 + x;
}


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <f5@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x4,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
push   %rax
xor    %eax,%eax
call   1030 <f5@plt>
add    $0x4,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @f4() {
%1 = alloca i32
%2 = call i32 (...) @f5()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = add nsw i32 4, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @f4() {
%1 = tail call i32 (...) @f5()
%2 = add nsw i32 %1, 4
ret i32 %2
}
int CHECK_DATA2(unsigned char v) {
  return v == 0x9a || v == 0xc2 || v == 0xc8 || v == 0xca || v == 0xea;
}


x86 assembly (clang, -O0):
<CHECK_DATA2>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x9a,%ecx
mov    %al,-0x2(%rbp)
je     116d <CHECK_DATA2+0x6d>
movzbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0xc2,%ecx
mov    %al,-0x2(%rbp)
je     116d <CHECK_DATA2+0x6d>
movzbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0xc8,%ecx
mov    %al,-0x2(%rbp)
je     116d <CHECK_DATA2+0x6d>
movzbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0xca,%ecx
mov    %al,-0x2(%rbp)
je     116d <CHECK_DATA2+0x6d>
movzbl -0x1(%rbp),%eax
cmp    $0xea,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CHECK_DATA2>:
lea    0x66(%rdi),%ecx
cmp    $0x30,%cl
ja     1121 <CHECK_DATA2+0x21>
mov    $0x1,%eax
movzbl %cl,%ecx
movabs $0x1410000000001,%rdx
bt     %rcx,%rdx
jae    1121 <CHECK_DATA2+0x21>
ret
xor    %eax,%eax
cmp    $0xea,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @CHECK_DATA2(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = icmp eq i32 %4, 154
br i1 %5, label %22, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = zext i8 %7 to i32
%9 = icmp eq i32 %8, 194
br i1 %9, label %22, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = zext i8 %11 to i32
%13 = icmp eq i32 %12, 200
br i1 %13, label %22, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = zext i8 %15 to i32
%17 = icmp eq i32 %16, 202
br i1 %17, label %22, label %18
18: ; preds = %14
%19 = load i8, i8* %2
%20 = zext i8 %19 to i32
%21 = icmp eq i32 %20, 234
br label %22
22: ; preds = %18, %14, %10, %6, %1
%23 = phi i1 [ true, %14 ], [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %21, %18 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @CHECK_DATA2(i8 zeroext %0) {
switch i8 %0, label %2 [
i8 -54, label %5
i8 -56, label %5
i8 -62, label %5
i8 -102, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, -22
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
int EAbsLess(int a, int b) { return (((a < 0) ? -a : a) < ((b < 0) ? -b : b)); }


x86 assembly (clang, -O0):
<EAbsLess>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1121 <EAbsLess+0x21>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <EAbsLess+0x27>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1144 <EAbsLess+0x44>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    114a <EAbsLess+0x4a>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
mov    -0x14(%rbp),%ecx
cmp    %ecx,%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<EAbsLess>:
mov    %edi,%ecx
neg    %ecx
cmovs  %edi,%ecx
mov    %esi,%edx
neg    %edx
cmovs  %esi,%edx
xor    %eax,%eax
cmp    %edx,%ecx
setb   %al
ret

LLVM IR (-O0):
define i32 @EAbsLess(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %3
%9 = sub nsw i32 0, %8
br label %12
10: ; preds = %2
%11 = load i32, i32* %3
br label %12
12: ; preds = %10, %7
%13 = phi i32 [ %9, %7 ], [ %11, %10 ]
%14 = load i32, i32* %4
%15 = icmp slt i32 %14, 0
br i1 %15, label %16, label %19
16: ; preds = %12
%17 = load i32, i32* %4
%18 = sub nsw i32 0, %17
br label %21
19: ; preds = %12
%20 = load i32, i32* %4
br label %21
21: ; preds = %19, %16
%22 = phi i32 [ %18, %16 ], [ %20, %19 ]
%23 = icmp slt i32 %13, %22
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @EAbsLess(i32 %0, i32 %1) {
%3 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
%4 = tail call i32 @llvm.abs.i32(i32 %1, i1 true)
%5 = icmp ult i32 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ TransformCounterC__0__CounterFrom__overflow();
void AtmegaCounterP__0__Counter__overflow(void) {
  TransformCounterC__0__CounterFrom__overflow();
}


x86 assembly (clang, -O0):
<AtmegaCounterP__0__Counter__overflow>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <TransformCounterC__0__CounterFrom__overflow@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AtmegaCounterP__0__Counter__overflow>:
xor    %eax,%eax
jmp    1030 <TransformCounterC__0__CounterFrom__overflow@plt>

LLVM IR (-O0):
define void @AtmegaCounterP__0__Counter__overflow() {
%1 = call i32 (...) @TransformCounterC__0__CounterFrom__overflow()
ret void
}

LLVM IR (-O2):
define void @AtmegaCounterP__0__Counter__overflow() {
%1 = tail call i32 (...) @TransformCounterC__0__CounterFrom__overflow()
ret void
}
void av_get_extended_channel_layout() {}


x86 assembly (clang, -O0):
<av_get_extended_channel_layout>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_get_extended_channel_layout>:
ret

LLVM IR (-O0):
define void @av_get_extended_channel_layout() {
ret void
}

LLVM IR (-O2):
define void @av_get_extended_channel_layout() {
ret void
}
double g(int number) { return 0.5 + number; }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm1
movsd  0xeec(%rip),%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
cvtsi2sd %edi,%xmm0
addsd  0xef4(%rip),%xmm0
ret

LLVM IR (-O0):
define double @g(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sitofp i32 %3 to double
%5 = fadd double 5.000000e-01, %4
ret double %5
}

LLVM IR (-O2):
define double @g(i32 %0) {
%2 = sitofp i32 %0 to double
%3 = fadd double %2, 5.000000e-01
ret double %3
}
/* Variables and functions */
uintptr_t ptr_align_floor(uintptr_t, uintptr_t);
uintptr_t ptr_align_ceil(uintptr_t ptr, uintptr_t align) {
  return ptr_align_floor(ptr + (align - 1), align);
}


x86 assembly (clang, -O0):
<ptr_align_ceil>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
sub    $0x1,%rax
add    %rax,%rdi
mov    -0x10(%rbp),%rsi
call   1030 <ptr_align_floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptr_align_ceil>:
add    %rsi,%rdi
add    $0xffffffffffffffff,%rdi
jmp    1030 <ptr_align_floor@plt>

LLVM IR (-O0):
define i64 @ptr_align_ceil(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = sub i64 %6, 1
%8 = add i64 %5, %7
%9 = load i64, i64* %4
%10 = call i64 @ptr_align_floor(i64 %8, i64 %9)
ret i64 %10
}

LLVM IR (-O2):
define i64 @ptr_align_ceil(i64 %0, i64 %1) {
%3 = add i64 %0, -1
%4 = add i64 %3, %1
%5 = tail call i64 @ptr_align_floor(i64 %4, i64 %1)
ret i64 %5
}
/* Type definitions */
struct timeval {
  int tv_usec;
  int /*<<< orphan*/ tv_sec;
};
struct timespec {
  int tv_nsec;
  int /*<<< orphan*/ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ do_gettimeofday(struct timeval *);
void nanotime(struct timespec *tvp) {
  struct timeval tv;
  do_gettimeofday(&tv);
  tvp->tv_sec = tv.tv_sec;
  tvp->tv_nsec = tv.tv_usec * 1000;
}


x86 assembly (clang, -O0):
<nanotime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x10(%rbp),%rdi
call   1030 <do_gettimeofday@plt>
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
imul   $0x3e8,-0x10(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nanotime>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0x8(%rsp),%rdi
call   1030 <do_gettimeofday@plt>
mov    0xc(%rsp),%eax
mov    %eax,0x4(%rbx)
imul   $0x3e8,0x8(%rsp),%eax
mov    %eax,(%rbx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
%struct.timeval = type { i32, i32 }
define void @nanotime(%struct.timespec* %0) {
%2 = alloca %struct.timespec*
%3 = alloca %struct.timeval
store %struct.timespec* %0, %struct.timespec** %2
%4 = call i32 @do_gettimeofday(%struct.timeval* %3)
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i32 0, i32 1
%6 = load i32, i32* %5
%7 = load %struct.timespec*, %struct.timespec** %2
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %7, i32 0, i32 1
store i32 %6, i32* %8
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i32 0, i32 0
%10 = load i32, i32* %9
%11 = mul nsw i32 %10, 1000
%12 = load %struct.timespec*, %struct.timespec** %2
%13 = getelementptr inbounds %struct.timespec, %struct.timespec* %12, i32 0, i32 0
store i32 %11, i32* %13
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
%struct.timeval = type { i32, i32 }
define void @nanotime(%struct.timespec* nocapture writeonly %0) {
%2 = alloca %struct.timeval
%3 = bitcast %struct.timeval* %2 to i8*
%4 = call i32 @do_gettimeofday(%struct.timeval* %2)
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i64 0, i32 1
%6 = load i32, i32* %5
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 1
store i32 %6, i32* %7
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i64 0, i32 0
%9 = load i32, i32* %8
%10 = mul nsw i32 %9, 1000
%11 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 0
store i32 %10, i32* %11
ret void
}
/* Type definitions */
struct sockaddr_in {
  int dummy;
};
struct sockaddr {
  int dummy;
};

/* Variables and functions */
int bind(int, struct sockaddr *, int);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
int htxd_bind_socket(int socket_fd, struct sockaddr_in *local_address,
                     int port_number) {
  int result;
  result = bind(socket_fd, (struct sockaddr *)local_address,
                sizeof(struct sockaddr));
  if (result == -1) {
    perror("ERROR: while binding connection. Exiting...");
    exit(1);
  }
  return result;
}


x86 assembly (clang, -O0):
<htxd_bind_socket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x4,%edx
call   1030 <bind@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0xffffffff,-0x18(%rbp)
jne    1176 <htxd_bind_socket+0x46>
lea    0xe99(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<htxd_bind_socket>:
push   %rax
mov    $0x4,%edx
call   1030 <bind@plt>
cmp    $0xffffffff,%eax
je     1142 <htxd_bind_socket+0x12>
pop    %rcx
ret
lea    0xeb7(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
%struct.sockaddr_in = type { i32 }
%struct.sockaddr = type { i32 }
@.str = [44 x i8] c"ERROR: while binding connection. Exiting...\00"
define i32 @htxd_bind_socket(i32 %0, %struct.sockaddr_in* %1, i32 %2) {
%4 = alloca i32
%5 = alloca %struct.sockaddr_in*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store %struct.sockaddr_in* %1, %struct.sockaddr_in** %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = load %struct.sockaddr_in*, %struct.sockaddr_in** %5
%10 = bitcast %struct.sockaddr_in* %9 to %struct.sockaddr*
%11 = call i32 @bind(i32 %8, %struct.sockaddr* %10, i32 4)
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = icmp eq i32 %12, -1
br i1 %13, label %14, label %17
14: ; preds = %3
%15 = call i32 @perror(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
%16 = call i32 @exit(i32 1)
unreachable
17: ; preds = %3
%18 = load i32, i32* %7
ret i32 %18
}

LLVM IR (-O2):
%struct.sockaddr_in = type { i32 }
%struct.sockaddr = type { i32 }
@.str = [44 x i8] c"ERROR: while binding connection. Exiting...\00"
define i32 @htxd_bind_socket(i32 %0, %struct.sockaddr_in* %1, i32 %2) {
%4 = bitcast %struct.sockaddr_in* %1 to %struct.sockaddr*
%5 = tail call i32 @bind(i32 %0, %struct.sockaddr* %4, i32 4)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = tail call i32 @perror(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
%9 = tail call i32 @exit(i32 1)
unreachable
10: ; preds = %3
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
scalar_t__ EOF;
scalar_t__ fscanf(int /*<<< orphan*/ *, char *, char *);
bool read_word(FILE *file, char buffer[]) {
  return fscanf(file, "%s", buffer) != EOF;
}


x86 assembly (clang, -O0):
<read_word>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rsi
call   1030 <fscanf@plt>
mov    0x2ead(%rip),%rcx
cmp    (%rcx),%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_word>:
push   %rax
mov    %rsi,%rdx
lea    0xee5(%rip),%rsi
call   1030 <fscanf@plt>
mov    0x2ec1(%rip),%rdx
xor    %ecx,%ecx
cmp    (%rdx),%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@EOF = global i64 0
define i32 @read_word(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = call i64 @fscanf(i32* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = load i64, i64* @EOF
%9 = icmp ne i64 %7, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@EOF = global i64 0
define i32 @read_word(i32* nocapture %0, i8* %1) {
%3 = tail call i64 @fscanf(i32* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %1)
%4 = load i64, i64* @EOF
%5 = icmp ne i64 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
double map_value_backward(float v, float min, float max) {
  return (v - min) / (max - min);
}


x86 assembly (clang, -O0):
<map_value_backward>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
subss  -0x8(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
subss  -0x8(%rbp),%xmm1
divss  %xmm1,%xmm0
cvtss2sd %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<map_value_backward>:
subss  %xmm1,%xmm0
subss  %xmm1,%xmm2
divss  %xmm2,%xmm0
cvtss2sd %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @map_value_backward(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = fsub float %7, %8
%10 = load float, float* %6
%11 = load float, float* %5
%12 = fsub float %10, %11
%13 = fdiv float %9, %12
%14 = fpext float %13 to double
ret double %14
}

LLVM IR (-O2):
define double @map_value_backward(float %0, float %1, float %2) {
%4 = fsub float %0, %1
%5 = fsub float %2, %1
%6 = fdiv float %4, %5
%7 = fpext float %6 to double
ret double %7
}
/* Variables and functions */
int /*<<< orphan*/ ir_init();
void ir_serial_init(void) { ir_init(); }


x86 assembly (clang, -O0):
<ir_serial_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ir_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ir_serial_init>:
xor    %eax,%eax
jmp    1030 <ir_init@plt>

LLVM IR (-O0):
define void @ir_serial_init() {
%1 = call i32 (...) @ir_init()
ret void
}

LLVM IR (-O2):
define void @ir_serial_init() {
%1 = tail call i32 (...) @ir_init()
ret void
}
void MSP430TimerM$CompareB5$fired(void) {
  MSP430TimerM$CompareB5$default$fired();
}


x86 assembly (clang, -O0):
<MSP430TimerM$CompareB5$fired>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <MSP430TimerM$CompareB5$default$fired@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MSP430TimerM$CompareB5$fired>:
xor    %eax,%eax
jmp    1030 <MSP430TimerM$CompareB5$default$fired@plt>

LLVM IR (-O0):
define void @"MSP430TimerM$CompareB5$fired"() {
%1 = call i32 (...) @"MSP430TimerM$CompareB5$default$fired"()
ret void
}

LLVM IR (-O2):
define void @"MSP430TimerM$CompareB5$fired"() {
%1 = tail call i32 (...) @"MSP430TimerM$CompareB5$default$fired"()
ret void
}
/* Type definitions */
typedef scalar_t__ off_t;

/* Variables and functions */
int errno;
scalar_t__ lseek(int, scalar_t__, int);
off_t __sulong_posix_lseek(int fildes, off_t offset, int whence) {
  {
    int native_errno = errno;
    off_t result = lseek(fildes, offset, whence);
    if (result == (off_t)-1) {
      result = (off_t)(long)-errno;
    }
    errno = native_errno;
    return result;
  };
}


x86 assembly (clang, -O0):
<__sulong_posix_lseek>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2eb7(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <lseek@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0xffffffffffffffff,-0x20(%rbp)
jne    115d <__sulong_posix_lseek+0x4d>
xor    %eax,%eax
mov    0x2e8b(%rip),%rcx
sub    (%rcx),%eax
cltq
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%ecx
mov    0x2e79(%rip),%rax
mov    %ecx,(%rax)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sulong_posix_lseek>:
push   %rbp
push   %rbx
push   %rax
mov    0x2ec6(%rip),%rbx
mov    (%rbx),%ebp
call   1030 <lseek@plt>
movslq (%rbx),%rcx
neg    %rcx
cmp    $0xffffffffffffffff,%rax
cmove  %rcx,%rax
mov    %ebp,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i32 0
define i64 @__sulong_posix_lseek(i32 %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
%7 = alloca i32
%8 = alloca i64
store i32 %0, i32* %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%9 = load i32, i32* @errno
store i32 %9, i32* %7
%10 = load i32, i32* %4
%11 = load i64, i64* %5
%12 = load i32, i32* %6
%13 = call i64 @lseek(i32 %10, i64 %11, i32 %12)
store i64 %13, i64* %8
%14 = load i64, i64* %8
%15 = icmp eq i64 %14, -1
br i1 %15, label %16, label %20
16: ; preds = %3
%17 = load i32, i32* @errno
%18 = sub nsw i32 0, %17
%19 = sext i32 %18 to i64
store i64 %19, i64* %8
br label %20
20: ; preds = %16, %3
%21 = load i32, i32* %7
store i32 %21, i32* @errno
%22 = load i64, i64* %8
ret i64 %22
}

LLVM IR (-O2):
@errno = global i32 0
define i64 @__sulong_posix_lseek(i32 %0, i64 %1, i32 %2) {
%4 = load i32, i32* @errno
%5 = tail call i64 @lseek(i32 %0, i64 %1, i32 %2)
%6 = icmp eq i64 %5, -1
%7 = load i32, i32* @errno
%8 = sub nsw i32 0, %7
%9 = sext i32 %8 to i64
%10 = select i1 %6, i64 %9, i64 %5
store i32 %4, i32* @errno
ret i64 %10
}
void xor (char *p) {
  int i, key = 0xAC;
  for (i = 0; i < strlen(p); i++)
    p[i] ^= key;
}


x86 assembly (clang, -O0):
<xor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0xac,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
movslq -0xc(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
jae    116d <xor+0x5d>
mov    -0x10(%rbp),%esi
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edx
xor    %esi,%edx
mov    %dl,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112a <xor+0x1a>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xor>:
push   %r14
push   %rbx
push   %rax
mov    (%rdi),%al
test   %al,%al
je     1156 <xor+0x46>
mov    %rdi,%r14
xor    $0xac,%al
mov    %al,(%rdi)
call   1030 <strlen@plt>
cmp    $0x2,%rax
jb     1156 <xor+0x46>
mov    $0x1,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xorb   $0xac,(%r14,%rbx,1)
add    $0x1,%rbx
mov    %r14,%rdi
call   1030 <strlen@plt>
cmp    %rbx,%rax
ja     1140 <xor+0x30>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @xor(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 172, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %21, %1
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = load i8*, i8** %2
%9 = call i64 @strlen(i8* %8)
%10 = icmp ult i64 %7, %9
br i1 %10, label %11, label %24
11: ; preds = %5
%12 = load i32, i32* %4
%13 = load i8*, i8** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = xor i32 %18, %12
%20 = trunc i32 %19 to i8
store i8 %20, i8* %16
br label %21
21: ; preds = %11
%22 = load i32, i32* %3
%23 = add nsw i32 %22, 1
store i32 %23, i32* %3
br label %5
24: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @xor(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %17, label %4
4: ; preds = %1
%5 = xor i8 %2, -84
store i8 %5, i8* %0
%6 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%7 = icmp ugt i64 %6, 1
br i1 %7, label %8, label %17
8: ; preds = %4, %8
%9 = phi i64 [ %14, %8 ], [ 1, %4 ]
%10 = getelementptr inbounds i8, i8* %0, i64 %9
%11 = load i8, i8* %10
%12 = getelementptr inbounds i8, i8* %0, i64 %9
%13 = xor i8 %11, -84
store i8 %13, i8* %12
%14 = add nuw nsw i64 %9, 1
%15 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%16 = icmp ugt i64 %15, %14
br i1 %16, label %8, label %17
17: ; preds = %8, %4, %1
ret void
}
/* Variables and functions */
void *newr(void *heap, void *begin, void *end, size_t size) { return NULL; }


x86 assembly (clang, -O0):
<newr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<newr>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @newr(i8* %0, i8* %1, i8* %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i64
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i64 %3, i64* %8
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @newr(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i64 %3) {
ret i8* null
}
/* Variables and functions */
scalar_t__ isdigit(char const);
unsigned int atou(const char *s) {
  unsigned int i = 0;
  while (isdigit(*s))
    i = i * 10 + (*s++ - '0');
  return i;
}


x86 assembly (clang, -O0):
<atou>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
je     115c <atou+0x4c>
imul   $0xa,-0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movsbl (%rcx),%ecx
sub    $0x30,%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <atou+0x13>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atou>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
movsbl (%rdi),%edi
call   1030 <isdigit@plt>
test   %rax,%rax
je     1153 <atou+0x43>
add    $0x1,%rbx
xor    %r14d,%r14d
nopl   0x0(%rax,%rax,1)
lea    (%r14,%r14,4),%eax
movsbl -0x1(%rbx),%ecx
lea    (%rcx,%rax,2),%r14d
add    $0xffffffd0,%r14d
movsbl (%rbx),%edi
call   1030 <isdigit@plt>
add    $0x1,%rbx
test   %rax,%rax
jne    1130 <atou+0x20>
jmp    1156 <atou+0x46>
xor    %r14d,%r14d
mov    %r14d,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @atou(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = call i64 @isdigit(i8 signext %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %18
9: ; preds = %4
%10 = load i32, i32* %3
%11 = mul i32 %10, 10
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %2
%14 = load i8, i8* %12
%15 = sext i8 %14 to i32
%16 = sub nsw i32 %15, 48
%17 = add i32 %11, %16
store i32 %17, i32* %3
br label %4
18: ; preds = %4
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @atou(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = tail call i64 @isdigit(i8 signext %2)
%4 = icmp eq i64 %3, 0
br i1 %4, label %17, label %5
5: ; preds = %1, %5
%6 = phi i32 [ %13, %5 ], [ 0, %1 ]
%7 = phi i8* [ %9, %5 ], [ %0, %1 ]
%8 = mul i32 %6, 10
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = load i8, i8* %7
%11 = sext i8 %10 to i32
%12 = add i32 %8, -48
%13 = add i32 %12, %11
%14 = load i8, i8* %9
%15 = tail call i64 @isdigit(i8 signext %14)
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %5
17: ; preds = %5, %1
%18 = phi i32 [ 0, %1 ], [ %13, %5 ]
ret i32 %18
}
void PyThread_delete_key(int key) {}


x86 assembly (clang, -O0):
<PyThread_delete_key>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PyThread_delete_key>:
ret

LLVM IR (-O0):
define void @PyThread_delete_key(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @PyThread_delete_key(i32 %0) {
ret void
}
unsigned char genchecksum(unsigned char *massive) {
  unsigned char checksum = 0;
  for (int i = 0; i < sizeof(massive); i++)
    checksum = checksum + massive[i];
  return checksum;
}


x86 assembly (clang, -O0):
<genchecksum>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movb   $0x0,-0x9(%rbp)
movl   $0x0,-0x10(%rbp)
movslq -0x10(%rbp),%rax
cmp    $0x8,%rax
jae    1144 <genchecksum+0x44>
movzbl -0x9(%rbp),%eax
mov    -0x8(%rbp),%rcx
movslq -0x10(%rbp),%rdx
movzbl (%rcx,%rdx,1),%ecx
add    %ecx,%eax
mov    %al,-0x9(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1113 <genchecksum+0x13>
movzbl -0x9(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<genchecksum>:
movq   (%rdi),%xmm0
pxor   %xmm1,%xmm1
psadbw %xmm0,%xmm1
movd   %xmm1,%eax
ret

LLVM IR (-O0):
define zeroext i8 @genchecksum(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
%4 = alloca i32
store i8* %0, i8** %2
store i8 0, i8* %3
store i32 0, i32* %4
br label %5
5: ; preds = %20, %1
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = icmp ult i64 %7, 8
br i1 %8, label %9, label %23
9: ; preds = %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = load i8*, i8** %2
%13 = load i32, i32* %4
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = add nsw i32 %11, %17
%19 = trunc i32 %18 to i8
store i8 %19, i8* %3
br label %20
20: ; preds = %9
%21 = load i32, i32* %4
%22 = add nsw i32 %21, 1
store i32 %22, i32* %4
br label %5
23: ; preds = %5
%24 = load i8, i8* %3
ret i8 %24
}

LLVM IR (-O2):
define zeroext i8 @genchecksum(i8* nocapture %0) {
%2 = bitcast i8* %0 to <8 x i8>*
%3 = load <8 x i8>, <8 x i8>* %2
%4 = call i8 @llvm.vector.reduce.add.v8i8(<8 x i8> %3)
ret i8 %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0x20() {
  Assert_real((isdigit(32) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              165, ("isdigit should be 0 for  "));
}


x86 assembly (clang, -O0):
<t_isdigit_0x20>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xa5,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0x20>:
push   %rax
mov    $0x20,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0xa5,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [26 x i8] c"isdigit should be 0 for \00"
define void @t_isdigit_0x20() {
%1 = call i64 @isdigit(i32 32)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 165, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [26 x i8] c"isdigit should be 0 for \00"
define void @t_isdigit_0x20() {
%1 = tail call i64 @isdigit(i32 32)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 165, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}