xunge/DecIR huggingface dataset:
int atomic_exchange_int(volatile int *var, int newval) {
  int result;
  __asm __volatile("xchgl %0, %1"
                   : "=r"(result), "=m"(*var)
                   : "0"(newval), "m"(*var));
  return result;
}


x86 assembly (clang, -O0):
<atomic_exchange_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%rdx
xchg   %eax,(%rcx)
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_exchange_int>:
mov    %esi,%eax
xchg   %eax,(%rdi)
ret

LLVM IR (-O0):
define i32 @atomic_exchange_int(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %4
%8 = load i32*, i32** %3
%9 = call i32 asm sideeffect "xchgl $0, $1", "=r,=*m,0,*m,~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %6, i32 %7, i32* elementtype(i32) %8)
store i32 %9, i32* %5
%10 = load i32, i32* %5
ret i32 %10
}

LLVM IR (-O2):
define i32 @atomic_exchange_int(i32* %0, i32 %1) {
%3 = tail call i32 asm sideeffect "xchgl $0, $1", "=r,=*m,0,*m,~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %0, i32 %1, i32* elementtype(i32) %0)
ret i32 %3
}
double compute_predicted_reduction(double fnorm, double fnorm1) {
  double prered;
  if (fnorm1 < fnorm) {
    double u = fnorm1 / fnorm;
    prered = 1 - u * u;
  } else {
    prered = 0;
  }
  return prered;
}


x86 assembly (clang, -O0):
<compute_predicted_reduction>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    116c <compute_predicted_reduction+0x6c>
movsd  -0x10(%rbp),%xmm0
divsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
movsd  -0x20(%rbp),%xmm1
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  %xmm1,%xmm0
movsd  0xea2(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1174 <compute_predicted_reduction+0x74>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<compute_predicted_reduction>:
ucomisd %xmm1,%xmm0
jbe    111b <compute_predicted_reduction+0x1b>
divsd  %xmm0,%xmm1
mulsd  %xmm1,%xmm1
movsd  0xeea(%rip),%xmm0
subsd  %xmm1,%xmm0
ret
xorpd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @compute_predicted_reduction(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %3
store double %1, double* %4
%7 = load double, double* %4
%8 = load double, double* %3
%9 = fcmp olt double %7, %8
br i1 %9, label %10, label %18
10: ; preds = %2
%11 = load double, double* %4
%12 = load double, double* %3
%13 = fdiv double %11, %12
store double %13, double* %6
%14 = load double, double* %6
%15 = load double, double* %6
%16 = fneg double %14
%17 = call double @llvm.fmuladd.f64(double %16, double %15, double 1.000000e+00)
store double %17, double* %5
br label %19
18: ; preds = %2
store double 0.000000e+00, double* %5
br label %19
19: ; preds = %18, %10
%20 = load double, double* %5
ret double %20
}

LLVM IR (-O2):
define double @compute_predicted_reduction(double %0, double %1) {
%3 = fcmp olt double %1, %0
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = fdiv double %1, %0
%6 = fneg double %5
%7 = tail call double @llvm.fmuladd.f64(double %6, double %5, double 1.000000e+00)
br label %8
8: ; preds = %2, %4
%9 = phi double [ %7, %4 ], [ 0.000000e+00, %2 ]
ret double %9
}
/* Variables and functions */
unsigned char check_read(int, char *);
unsigned char inb_p(unsigned short int port) {
  return check_read((int)port, "inb_p");
}


x86 assembly (clang, -O0):
<inb_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edi
lea    0xed6(%rip),%rsi
call   1030 <check_read@plt>
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inb_p>:
lea    0xee9(%rip),%rsi
jmp    1030 <check_read@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"inb_p\00"
define zeroext i8 @inb_p(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = call zeroext i8 @check_read(i32 %4, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i8 %5
}

LLVM IR (-O2):
@.str = [6 x i8] c"inb_p\00"
define zeroext i8 @inb_p(i16 zeroext %0) {
%2 = zext i16 %0 to i32
%3 = tail call zeroext i8 @check_read(i32 %2, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i8 %3
}
/* Variables and functions */
void marker() {}


x86 assembly (clang, -O0):
<marker>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<marker>:
ret

LLVM IR (-O0):
define void @marker() {
ret void
}

LLVM IR (-O2):
define void @marker() {
ret void
}
__attribute__((visibility("hidden"))) void
pause_if_necessary(struct wait_event *wait_event) {}


x86 assembly (clang, -O0):
<pause_if_necessary>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pause_if_necessary>:
ret

LLVM IR (-O0):
%struct.wait_event = type opaque
define hidden void @pause_if_necessary(%struct.wait_event* %0) {
%2 = alloca %struct.wait_event*
store %struct.wait_event* %0, %struct.wait_event** %2
ret void
}

LLVM IR (-O2):
%struct.wait_event = type opaque
define hidden void @pause_if_necessary(%struct.wait_event* nocapture %0) {
ret void
}
_Bool SignalingLessEqual(double f1, double f2) { return f1 <= f2; }


x86 assembly (clang, -O0):
<SignalingLessEqual>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SignalingLessEqual>:
ucomisd %xmm0,%xmm1
setae  %al
ret

LLVM IR (-O0):
define zeroext i1 @SignalingLessEqual(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp ole double %5, %6
ret i1 %7
}

LLVM IR (-O2):
define zeroext i1 @SignalingLessEqual(double %0, double %1) {
%3 = fcmp ole double %0, %1
ret i1 %3
}
void DMTimerIntDisable(unsigned int baseAdd, unsigned int intFlags) {
  (*((volatile unsigned int *)(baseAdd + (0x30)))) =
      (intFlags & ((0x00000004u) | (0x00000002u) | (0x00000001u)));
}


x86 assembly (clang, -O0):
<DMTimerIntDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
and    $0x7,%ecx
mov    -0x4(%rbp),%eax
add    $0x30,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMTimerIntDisable>:
and    $0x7,%esi
add    $0x30,%edi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @DMTimerIntDisable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 7
%7 = load i32, i32* %3
%8 = add i32 %7, 48
%9 = zext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
store volatile i32 %6, i32* %10
ret void
}

LLVM IR (-O2):
define void @DMTimerIntDisable(i32 %0, i32 %1) {
%3 = and i32 %1, 7
%4 = add i32 %0, 48
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
store volatile i32 %3, i32* %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_eval(int);
int strncmp(char *, char *, int);
void strncmp_diff_length_6() {
  char *x = "234";
  char *y = "12345";
  clang_analyzer_eval(strncmp(x, y, 3) == 1);
}


x86 assembly (clang, -O0):
<strncmp_diff_length_6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x3,%edx
call   1030 <strncmp@plt>
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <clang_analyzer_eval@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncmp_diff_length_6>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xed5(%rip),%rsi
mov    $0x3,%edx
call   1030 <strncmp@plt>
xor    %edi,%edi
cmp    $0x1,%eax
sete   %dil
pop    %rax
jmp    1040 <clang_analyzer_eval@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"234\00"
@.str.1 = [6 x i8] c"12345\00"
define void @strncmp_diff_length_6() {
%1 = alloca i8*
%2 = alloca i8*
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %1
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %1
%4 = load i8*, i8** %2
%5 = call i32 @strncmp(i8* %3, i8* %4, i32 3)
%6 = icmp eq i32 %5, 1
%7 = zext i1 %6 to i32
%8 = call i32 @clang_analyzer_eval(i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"234\00"
@.str.1 = [6 x i8] c"12345\00"
define void @strncmp_diff_length_6() {
%1 = tail call i32 @strncmp(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 3)
%2 = icmp eq i32 %1, 1
%3 = zext i1 %2 to i32
%4 = tail call i32 @clang_analyzer_eval(i32 %3)
ret void
}
void mdea_string_output_destroy(void *ptr) {}


x86 assembly (clang, -O0):
<mdea_string_output_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdea_string_output_destroy>:
ret

LLVM IR (-O0):
define void @mdea_string_output_destroy(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @mdea_string_output_destroy(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void string_destroy(void *to_delete) { free(to_delete); }


x86 assembly (clang, -O0):
<string_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @string_destroy(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @string_destroy(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
void __attribute__((weak)) tim1_cc_isr() { debug_handler(__FUNCTION__); }


x86 assembly (clang, -O0):
<tim1_cc_isr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <debug_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tim1_cc_isr>:
lea    0xee9(%rip),%rdi
xor    %eax,%eax
jmp    1030 <debug_handler@plt>

LLVM IR (-O0):
@__FUNCTION__.tim1_cc_isr = [12 x i8] c"tim1_cc_isr\00"
define weak void @tim1_cc_isr() {
%1 = call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @__FUNCTION__.tim1_cc_isr, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__FUNCTION__.tim1_cc_isr = [12 x i8] c"tim1_cc_isr\00"
define weak void @tim1_cc_isr() {
%1 = tail call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @__FUNCTION__.tim1_cc_isr, i64 0, i64 0))
ret void
}
void CHKRAM() {}


x86 assembly (clang, -O0):
<CHKRAM>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CHKRAM>:
ret

LLVM IR (-O0):
define void @CHKRAM() {
ret void
}

LLVM IR (-O2):
define void @CHKRAM() {
ret void
}
/* Variables and functions */
int numLength(int);
int power(int, int);
int numAmount(int num, int index) {
  return (num / (power(10, (numLength(num) - index - 1))) % 10);
}


x86 assembly (clang, -O0):
<numAmount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <numLength@plt>
mov    %eax,%esi
sub    -0x8(%rbp),%esi
sub    $0x1,%esi
mov    $0xa,%edi
call   1040 <power@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
cltd
idiv   %ecx
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<numAmount>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <numLength@plt>
not    %ebx
add    %eax,%ebx
mov    $0xa,%edi
mov    %ebx,%esi
call   1040 <power@plt>
mov    %eax,%ecx
mov    %ebp,%eax
cltd
idiv   %ecx
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
add    %edx,%ecx
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @numAmount(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @numLength(i32 %6)
%8 = load i32, i32* %4
%9 = sub nsw i32 %7, %8
%10 = sub nsw i32 %9, 1
%11 = call i32 @power(i32 10, i32 %10)
%12 = sdiv i32 %5, %11
%13 = srem i32 %12, 10
ret i32 %13
}

LLVM IR (-O2):
define i32 @numAmount(i32 %0, i32 %1) {
%3 = tail call i32 @numLength(i32 %0)
%4 = xor i32 %1, -1
%5 = add i32 %3, %4
%6 = tail call i32 @power(i32 10, i32 %5)
%7 = sdiv i32 %0, %6
%8 = srem i32 %7, 10
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ accessLRUArray(int /*<<< orphan*/, int, int);
int /*<<< orphan*/ whichSet(unsigned int);
int updateOnHit(unsigned int address, int way) {
  accessLRUArray(whichSet(address), way, 1);
  return 1;
}


x86 assembly (clang, -O0):
<updateOnHit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <whichSet@plt>
mov    %eax,%edi
mov    -0x8(%rbp),%esi
mov    $0x1,%edx
call   1030 <accessLRUArray@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<updateOnHit>:
push   %rbx
mov    %esi,%ebx
call   1040 <whichSet@plt>
mov    %eax,%edi
mov    %ebx,%esi
mov    $0x1,%edx
call   1030 <accessLRUArray@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @updateOnHit(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @whichSet(i32 %5)
%7 = load i32, i32* %4
%8 = call i32 @accessLRUArray(i32 %6, i32 %7, i32 1)
ret i32 1
}

LLVM IR (-O2):
define i32 @updateOnHit(i32 %0, i32 %1) {
%3 = tail call i32 @whichSet(i32 %0)
%4 = tail call i32 @accessLRUArray(i32 %3, i32 %1, i32 1)
ret i32 1
}
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ epoll2(struct __test_metadata *);
void wrapper_epoll2(struct __test_metadata *_metadata,
                    struct __fixture_variant_metadata *variant) {
  epoll2(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_epoll2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <epoll2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_epoll2>:
jmp    1030 <epoll2@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll2(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @epoll2(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll2(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @epoll2(%struct.__test_metadata* %0)
ret void
}
/* Type definitions */
struct vec4i {
  int dummy;
};
struct vec4 {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ vec4i_assign_vec4(int /*<<< orphan*/ *, float *);
__attribute__((always_)) struct vec4i *psvec4i_assign_vec4(struct vec4i *result,
                                                           struct vec4 *a) {
  vec4i_assign_vec4((int32_t *)result, (float *)a);
  return result;
}


x86 assembly (clang, -O0):
<psvec4i_assign_vec4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <vec4i_assign_vec4@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec4i_assign_vec4>:
push   %rbx
mov    %rdi,%rbx
call   1030 <vec4i_assign_vec4@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vec4i = type { i32 }
%struct.vec4 = type { i32 }
define %struct.vec4i* @psvec4i_assign_vec4(%struct.vec4i* %0, %struct.vec4* %1) {
%3 = alloca %struct.vec4i*
%4 = alloca %struct.vec4*
store %struct.vec4i* %0, %struct.vec4i** %3
store %struct.vec4* %1, %struct.vec4** %4
%5 = load %struct.vec4i*, %struct.vec4i** %3
%6 = bitcast %struct.vec4i* %5 to i32*
%7 = load %struct.vec4*, %struct.vec4** %4
%8 = bitcast %struct.vec4* %7 to float*
%9 = call i32 @vec4i_assign_vec4(i32* %6, float* %8)
%10 = load %struct.vec4i*, %struct.vec4i** %3
ret %struct.vec4i* %10
}

LLVM IR (-O2):
%struct.vec4i = type { i32 }
%struct.vec4 = type { i32 }
define %struct.vec4i* @psvec4i_assign_vec4(%struct.vec4i* returned %0, %struct.vec4* %1) {
%3 = getelementptr %struct.vec4i, %struct.vec4i* %0, i64 0, i32 0
%4 = bitcast %struct.vec4* %1 to float*
%5 = tail call i32 @vec4i_assign_vec4(i32* %3, float* %4)
ret %struct.vec4i* %0
}
/* Variables and functions */
long lseek(int, long, int);
int fseek(void *hf, long lOffset, int iOrigin) {
  long l;
  l = lseek(((int)hf), lOffset, iOrigin);
  if (l < 0)
    return (int)(-l);
  return 0;
}


x86 assembly (clang, -O0):
<fseek>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,%edi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <lseek@plt>
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
jge    1152 <fseek+0x42>
xor    %eax,%eax
sub    -0x28(%rbp),%rax
mov    %eax,-0x4(%rbp)
jmp    1159 <fseek+0x49>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fseek>:
push   %rax
call   1030 <lseek@plt>
mov    %eax,%ecx
neg    %ecx
sar    $0x3f,%rax
and    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fseek(i8* %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
%8 = alloca i64
store i8* %0, i8** %5
store i64 %1, i64* %6
store i32 %2, i32* %7
%9 = load i8*, i8** %5
%10 = ptrtoint i8* %9 to i32
%11 = load i64, i64* %6
%12 = load i32, i32* %7
%13 = call i64 @lseek(i32 %10, i64 %11, i32 %12)
store i64 %13, i64* %8
%14 = load i64, i64* %8
%15 = icmp slt i64 %14, 0
br i1 %15, label %16, label %20
16: ; preds = %3
%17 = load i64, i64* %8
%18 = sub nsw i64 0, %17
%19 = trunc i64 %18 to i32
store i32 %19, i32* %4
br label %21
20: ; preds = %3
store i32 0, i32* %4
br label %21
21: ; preds = %20, %16
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @fseek(i8* %0, i64 %1, i32 %2) {
%4 = ptrtoint i8* %0 to i64
%5 = trunc i64 %4 to i32
%6 = tail call i64 @lseek(i32 %5, i64 %1, i32 %2)
%7 = icmp slt i64 %6, 0
%8 = trunc i64 %6 to i32
%9 = sub i32 0, %8
%10 = select i1 %7, i32 %9, i32 0
ret i32 %10
}
double fact(int n) {
  double sum = 1;
  for (; n > 1; n--) {
    sum *= n;
  }
  return sum;
}


x86 assembly (clang, -O0):
<fact>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movsd  0xef1(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
cmpl   $0x1,-0x4(%rbp)
jle    113b <fact+0x3b>
cvtsi2sdl -0x4(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    1114 <fact+0x14>
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fact>:
movsd  0xef8(%rip),%xmm0
cmp    $0x2,%edi
jl     1125 <fact+0x25>
nopl   (%rax)
xorps  %xmm1,%xmm1
cvtsi2sd %edi,%xmm1
mulsd  %xmm1,%xmm0
lea    -0x1(%rdi),%eax
cmp    $0x2,%edi
mov    %eax,%edi
ja     1110 <fact+0x10>
ret

LLVM IR (-O0):
define double @fact(i32 %0) {
%2 = alloca i32
%3 = alloca double
store i32 %0, i32* %2
store double 1.000000e+00, double* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 1
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32, i32* %2
%9 = sitofp i32 %8 to double
%10 = load double, double* %3
%11 = fmul double %10, %9
store double %11, double* %3
br label %12
12: ; preds = %7
%13 = load i32, i32* %2
%14 = add nsw i32 %13, -1
store i32 %14, i32* %2
br label %4
15: ; preds = %4
%16 = load double, double* %3
ret double %16
}

LLVM IR (-O2):
define double @fact(i32 %0) {
%2 = icmp sgt i32 %0, 1
br i1 %2, label %3, label %10
3: ; preds = %1, %3
%4 = phi double [ %7, %3 ], [ 1.000000e+00, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = sitofp i32 %5 to double
%7 = fmul double %4, %6
%8 = add nsw i32 %5, -1
%9 = icmp ugt i32 %5, 2
br i1 %9, label %3, label %10
10: ; preds = %3, %1
%11 = phi double [ 1.000000e+00, %1 ], [ %7, %3 ]
ret double %11
}
void INT_Excep_MTU0_TGIC0(void) {}


x86 assembly (clang, -O0):
<INT_Excep_MTU0_TGIC0>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_MTU0_TGIC0>:
ret

LLVM IR (-O0):
define void @INT_Excep_MTU0_TGIC0() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_MTU0_TGIC0() {
ret void
}
/* Variables and functions */
scalar_t__ main_ea_cycles();
int /*<<< orphan*/ op_to_areg(char *);
int /*<<< orphan*/ ret_timing(scalar_t__);
void i_movea(void) {
  op_to_areg("mov");
  ret_timing(4 + main_ea_cycles());
}


x86 assembly (clang, -O0):
<i_movea>:
push   %rbp
mov    %rsp,%rbp
lea    0xec5(%rip),%rdi
call   1030 <op_to_areg@plt>
mov    $0x0,%al
call   1040 <main_ea_cycles@plt>
mov    %rax,%rdi
add    $0x4,%rdi
call   1050 <ret_timing@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<i_movea>:
push   %rax
lea    0xec8(%rip),%rdi
call   1030 <op_to_areg@plt>
xor    %eax,%eax
call   1040 <main_ea_cycles@plt>
lea    0x4(%rax),%rdi
pop    %rax
jmp    1050 <ret_timing@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"mov\00"
define void @i_movea() {
%1 = call i32 @op_to_areg(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = call i64 (...) @main_ea_cycles()
%3 = add nsw i64 4, %2
%4 = call i32 @ret_timing(i64 %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"mov\00"
define void @i_movea() {
%1 = tail call i32 @op_to_areg(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = tail call i64 (...) @main_ea_cycles()
%3 = add nsw i64 %2, 4
%4 = tail call i32 @ret_timing(i64 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char *);
int write_to_file(char *, char *, char *, int /*<<< orphan*/);
int write_string_to_file(char *prefix, char *path, char *string) {
  return write_to_file(prefix, path, string, strlen(string));
}


x86 assembly (clang, -O0):
<write_string_to_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x30(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    %eax,%ecx
call   1040 <write_to_file@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_string_to_file>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%rbx
mov    %rsi,%r14
mov    %rdi,%r15
mov    %rdx,%rdi
call   1030 <strlen@plt>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
mov    %eax,%ecx
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <write_to_file@plt>

LLVM IR (-O0):
define i32 @write_string_to_file(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = load i8*, i8** %6
%11 = call i32 @strlen(i8* %10)
%12 = call i32 @write_to_file(i8* %7, i8* %8, i8* %9, i32 %11)
ret i32 %12
}

LLVM IR (-O2):
define i32 @write_string_to_file(i8* %0, i8* %1, i8* %2) {
%4 = tail call i32 @strlen(i8* %2)
%5 = tail call i32 @write_to_file(i8* %0, i8* %1, i8* %2, i32 %4)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void my_init1(void) {
  fprintf(stderr, "I entered the first constructor function \n");
}


x86 assembly (clang, -O0):
<my_init1>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_init1>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [43 x i8] c"I entered the first constructor function \0A\00"
define void @my_init1() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [43 x i8] c"I entered the first constructor function \0A\00"
define void @my_init1() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int STDERR_FILENO;
int __crow_stderr() { return STDERR_FILENO; }


x86 assembly (clang, -O0):
<__crow_stderr>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__crow_stderr>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@STDERR_FILENO = global i32 0
define i32 @__crow_stderr() {
%1 = load i32, i32* @STDERR_FILENO
ret i32 %1
}

LLVM IR (-O2):
@STDERR_FILENO = global i32 0
define i32 @__crow_stderr() {
%1 = load i32, i32* @STDERR_FILENO
ret i32 %1
}
ffs(i) register int i;
{
  register int n;
  for (n = 8 * sizeof(int); n > 0; n--, i >>= 1)
    if ((i & 1))
      return (8 * sizeof(int) + 1) - n;
  return -1;
}


x86 assembly (clang, -O0):
<ffs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x20,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    1157 <ffs+0x57>
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     113b <ffs+0x3b>
movslq -0xc(%rbp),%rcx
mov    $0x21,%eax
sub    %rcx,%rax
mov    %eax,-0x4(%rbp)
jmp    115e <ffs+0x5e>
jmp    1140 <ffs+0x40>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <ffs+0xe>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffs>:
mov    $0x20,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
test   $0x1,%dil
jne    1143 <ffs+0x43>
test   $0x2,%dil
jne    1136 <ffs+0x36>
test   $0x4,%dil
jne    113b <ffs+0x3b>
test   $0x8,%dil
jne    1140 <ffs+0x40>
sar    $0x4,%edi
add    $0xfffffffc,%ecx
jne    1110 <ffs+0x10>
mov    $0xffffffff,%eax
ret
add    $0xffffffff,%ecx
jmp    1143 <ffs+0x43>
add    $0xfffffffe,%ecx
jmp    1143 <ffs+0x43>
add    $0xfffffffd,%ecx
mov    $0x21,%eax
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ffs(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 32, i32* %4
br label %5
5: ; preds = %18, %1
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %23
8: ; preds = %5
%9 = load i32, i32* %3
%10 = and i32 %9, 1
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %17
12: ; preds = %8
%13 = load i32, i32* %4
%14 = sext i32 %13 to i64
%15 = sub i64 33, %14
%16 = trunc i64 %15 to i32
store i32 %16, i32* %2
br label %24
17: ; preds = %8
br label %18
18: ; preds = %17
%19 = load i32, i32* %4
%20 = add nsw i32 %19, -1
store i32 %20, i32* %4
%21 = load i32, i32* %3
%22 = ashr i32 %21, 1
store i32 %22, i32* %3
br label %5
23: ; preds = %5
store i32 -1, i32* %2
br label %24
24: ; preds = %23, %12
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @ffs(i32 %0) {
br label %2
2: ; preds = %24, %1
%3 = phi i32 [ 32, %1 ], [ %25, %24 ]
%4 = phi i32 [ %0, %1 ], [ %26, %24 ]
%5 = and i32 %4, 1
%6 = icmp eq i32 %5, 0
br i1 %6, label %14, label %11
7: ; preds = %17
%8 = add nsw i32 %3, -2
br label %11
9: ; preds = %14
%10 = add nsw i32 %3, -1
br label %11
11: ; preds = %2, %20, %9, %7
%12 = phi i32 [ %8, %7 ], [ %10, %9 ], [ %21, %20 ], [ %3, %2 ]
%13 = sub nsw i32 33, %12
br label %28
14: ; preds = %2
%15 = and i32 %4, 2
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %9
17: ; preds = %14
%18 = and i32 %4, 4
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %7
20: ; preds = %17
%21 = add nsw i32 %3, -3
%22 = and i32 %4, 8
%23 = icmp eq i32 %22, 0
br i1 %23, label %24, label %11
24: ; preds = %20
%25 = add nsw i32 %3, -4
%26 = ashr i32 %4, 4
%27 = icmp eq i32 %21, 1
br i1 %27, label %28, label %2
28: ; preds = %24, %11
%29 = phi i32 [ %13, %11 ], [ -1, %24 ]
ret i32 %29
}
/* Variables and functions */
int stdc_B6257E3D(char const *, char const *, size_t);
int strncasecmp(const char *s1, const char *s2, size_t n) {
  return stdc_B6257E3D(s1, s2, n);
}


x86 assembly (clang, -O0):
<strncasecmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <stdc_B6257E3D@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncasecmp>:
jmp    1030 <stdc_B6257E3D@plt>

LLVM IR (-O0):
define i32 @strncasecmp(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @stdc_B6257E3D(i8* %7, i8* %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @strncasecmp(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @stdc_B6257E3D(i8* %0, i8* %1, i64 %2)
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_VALUE;
typedef int /*<<< orphan*/ ASN1_BMPSTRING;

/* Variables and functions */
int /*<<< orphan*/ ASN1_BMPSTRING_it;
int /*<<< orphan*/ ASN1_item_free(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
void ASN1_BMPSTRING_free(ASN1_BMPSTRING *a) {
  ASN1_item_free((ASN1_VALUE *)a, &ASN1_BMPSTRING_it);
}


x86 assembly (clang, -O0):
<ASN1_BMPSTRING_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rsi
call   1030 <ASN1_item_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_BMPSTRING_free>:
mov    0x2ec9(%rip),%rsi
jmp    1030 <ASN1_item_free@plt>

LLVM IR (-O0):
@ASN1_BMPSTRING_it = global i32 0
define void @ASN1_BMPSTRING_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @ASN1_item_free(i32* %3, i32* @ASN1_BMPSTRING_it)
ret void
}

LLVM IR (-O2):
@ASN1_BMPSTRING_it = global i32 0
define void @ASN1_BMPSTRING_free(i32* %0) {
%2 = tail call i32 @ASN1_item_free(i32* %0, i32* @ASN1_BMPSTRING_it)
ret void
}
int jsk_shutdown(int s, int how) { return 0; }


x86 assembly (clang, -O0):
<jsk_shutdown>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<jsk_shutdown>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @jsk_shutdown(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @jsk_shutdown(i32 %0, i32 %1) {
ret i32 0
}
void xdrmem_destroy() {}


x86 assembly (clang, -O0):
<xdrmem_destroy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xdrmem_destroy>:
ret

LLVM IR (-O0):
define void @xdrmem_destroy() {
ret void
}

LLVM IR (-O2):
define void @xdrmem_destroy() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ drawChar(int, int, int /*<<< orphan*/, unsigned short);
void drawString(int row, int col, char *str, unsigned short color) {
  while (*str) {
    drawChar(row, col, *str++, color);
    col += 6;
  }
}


x86 assembly (clang, -O0):
<drawString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %cx,%ax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ax,-0x12(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1165 <drawString+0x55>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%edx
movzwl -0x12(%rbp),%ecx
call   1030 <drawChar@plt>
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
jmp    1129 <drawString+0x19>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawString>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    (%rdx),%al
test   %al,%al
je     114e <drawString+0x3e>
mov    %rdx,%rbx
mov    %esi,%ebp
mov    %edi,%r14d
add    $0x1,%rbx
movzwl %cx,%r15d
nopl   (%rax)
movsbl %al,%edx
mov    %r14d,%edi
mov    %ebp,%esi
mov    %r15d,%ecx
call   1030 <drawChar@plt>
add    $0x6,%ebp
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <drawString+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @drawString(i32 %0, i32 %1, i8* %2, i16 zeroext %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i16
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i16 %3, i16* %8
br label %9
9: ; preds = %13, %4
%10 = load i8*, i8** %7
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %24
13: ; preds = %9
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = load i8*, i8** %7
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %7
%18 = load i8, i8* %16
%19 = sext i8 %18 to i32
%20 = load i16, i16* %8
%21 = call i32 @drawChar(i32 %14, i32 %15, i32 %19, i16 zeroext %20)
%22 = load i32, i32* %6
%23 = add nsw i32 %22, 6
store i32 %23, i32* %6
br label %9
24: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @drawString(i32 %0, i32 %1, i8* nocapture %2, i16 zeroext %3) {
%5 = load i8, i8* %2
%6 = icmp eq i8 %5, 0
br i1 %6, label %17, label %7
7: ; preds = %4, %7
%8 = phi i8 [ %15, %7 ], [ %5, %4 ]
%9 = phi i32 [ %14, %7 ], [ %1, %4 ]
%10 = phi i8* [ %11, %7 ], [ %2, %4 ]
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = sext i8 %8 to i32
%13 = tail call i32 @drawChar(i32 %0, i32 %9, i32 %12, i16 zeroext %3)
%14 = add nsw i32 %9, 6
%15 = load i8, i8* %11
%16 = icmp eq i8 %15, 0
br i1 %16, label %17, label %7
17: ; preds = %7, %4
ret void
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int clear_support_string(void) {
  int fail, *a, *b;
  double *c;
  fail = _ada_use_c2phc(588, a, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<clear_support_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x24c,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_support_string>:
mov    $0x24c,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @clear_support_string() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca double*
%5 = load i32*, i32** %2
%6 = load i32*, i32** %3
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 588, i32* %5, i32* %6, double* %7)
store i32 %8, i32* %1
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
define i32 @clear_support_string() {
%1 = tail call i32 @_ada_use_c2phc(i32 588, i32* undef, i32* undef, double* undef)
ret i32 %1
}
/* Variables and functions */
unsigned int hamt_fnv1_hash(void *, int);
unsigned int hamt_int_hash(void *key) {
  return hamt_fnv1_hash(key, sizeof(int));
}


x86 assembly (clang, -O0):
<hamt_int_hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x4,%esi
call   1030 <hamt_fnv1_hash@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hamt_int_hash>:
mov    $0x4,%esi
jmp    1030 <hamt_fnv1_hash@plt>

LLVM IR (-O0):
define i32 @hamt_int_hash(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @hamt_fnv1_hash(i8* %3, i32 4)
ret i32 %4
}

LLVM IR (-O2):
define i32 @hamt_int_hash(i8* %0) {
%2 = tail call i32 @hamt_fnv1_hash(i8* %0, i32 4)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ setup();
int main(void) { setup(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <setup@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <setup@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @setup()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @setup()
ret i32 0
}
/* Type definitions */
struct _reent {
  int dummy;
};

/* Variables and functions */
int mallopt(int, int);
int _mallopt_r(struct _reent *ptr, int param_number, int value) {
  return mallopt(param_number, value);
}


x86 assembly (clang, -O0):
<_mallopt_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1030 <mallopt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mallopt_r>:
mov    %esi,%edi
mov    %edx,%esi
jmp    1030 <mallopt@plt>

LLVM IR (-O0):
%struct._reent = type { i32 }
define i32 @_mallopt_r(%struct._reent* %0, i32 %1, i32 %2) {
%4 = alloca %struct._reent*
%5 = alloca i32
%6 = alloca i32
store %struct._reent* %0, %struct._reent** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = load i32, i32* %6
%9 = call i32 @mallopt(i32 %7, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
%struct._reent = type { i32 }
define i32 @_mallopt_r(%struct._reent* nocapture readnone %0, i32 %1, i32 %2) {
%4 = tail call i32 @mallopt(i32 %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
int icmp(const void *a, const void *b) { return *(int *)a - *(int *)b; }


x86 assembly (clang, -O0):
<icmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<icmp>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @icmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @icmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}
void HariMain(void) {
finish:
  goto finish;
}


x86 assembly (clang, -O0):
<HariMain>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <HariMain+0x9>
jmp    1109 <HariMain+0x9>

x86 assembly (clang, -O2):
<HariMain>:
jmp    1100 <HariMain>

LLVM IR (-O0):
define void @HariMain() {
br label %1
1: ; preds = %1, %0
br label %1
}

LLVM IR (-O2):
define void @HariMain() {
br label %1
1: ; preds = %1, %0
br label %1
}
int bit_unset(int n, unsigned int pos_zb) { return (n &= ~(1 << pos_zb)); }


x86 assembly (clang, -O0):
<bit_unset>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
and    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit_unset>:
mov    %edi,%eax
btr    %esi,%eax
ret

LLVM IR (-O0):
define i32 @bit_unset(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 1, %5
%7 = xor i32 %6, -1
%8 = load i32, i32* %3
%9 = and i32 %8, %7
store i32 %9, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @bit_unset(i32 %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = xor i32 %3, -1
%5 = and i32 %4, %0
ret i32 %5
}
int sub(int x, int y) { return (x - y); }


x86 assembly (clang, -O0):
<sub>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub>:
mov    %edi,%eax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @sub(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @sub(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ execl(char *, char *, int /*<<< orphan*/ *);
void *thread_func(void *arg) {
  char *exename = arg;
  execl(exename, exename, NULL);
  return NULL;
}


x86 assembly (clang, -O0):
<thread_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <execl@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread_func>:
push   %rax
mov    %rdi,%rsi
xor    %edx,%edx
call   1030 <execl@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @thread_func(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @execl(i8* %5, i8* %6, i32* null)
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @thread_func(i8* %0) {
%2 = tail call i32 @execl(i8* %0, i8* %0, i32* null)
ret i8* null
}
int first_bit(unsigned long long b) {
  const int magic[64] = {63, 0,  58, 1,  59, 47, 53, 2,  60, 39, 48, 27, 54,
                         33, 42, 3,  61, 51, 37, 40, 49, 18, 28, 20, 55, 30,
                         34, 11, 43, 14, 22, 4,  62, 57, 46, 52, 38, 26, 32,
                         41, 50, 36, 17, 19, 29, 10, 13, 21, 56, 45, 25, 31,
                         35, 16, 9,  12, 44, 24, 15, 8,  23, 7,  6,  5};
  return magic[((b & (-b)) * 0x07EDD5E59A4E28C2ULL) >> 58];
}


x86 assembly (clang, -O0):
<first_bit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x110(%rbp),%rdi
lea    0xed3(%rip),%rsi
mov    $0x100,%edx
call   1030 <memcpy@plt>
mov    -0x8(%rbp),%rax
xor    %ecx,%ecx
sub    -0x8(%rbp),%rcx
and    %rcx,%rax
movabs $0x7edd5e59a4e28c2,%rcx
d5 ed 07
imul   %rcx,%rax
shr    $0x3a,%rax
mov    -0x110(%rbp,%rax,4),%eax
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<first_bit>:
mov    %rdi,%rax
neg    %rax
and    %rdi,%rax
movabs $0x7edd5e59a4e28c2,%rcx
d5 ed 07
imul   %rax,%rcx
shr    $0x38,%rcx
and    $0xfffffffc,%ecx
lea    0xedb(%rip),%rax
mov    (%rcx,%rax,1),%eax
ret

LLVM IR (-O0):
@__const.first_bit.magic = [64 x i32] [i32 63, i32 0, i32 58, i32 1, i32 59, i32 47, i32 53, i32 2, i32 60, i32 39, i32 48, i32 27, i32 54, i32 33, i32 42, i32 3, i32 61, i32 51, i32 37, i32 40, i32 49, i32 18, i32 28, i32 20, i32 55, i32 30, i32 34, i32 11, i32 43, i32 14, i32 22, i32 4, i32 62, i32 57, i32 46, i32 52, i32 38, i32 26, i32 32, i32 41, i32 50, i32 36, i32 17, i32 19, i32 29, i32 10, i32 13, i32 21, i32 56, i32 45, i32 25, i32 31, i32 35, i32 16, i32 9, i32 12, i32 44, i32 24, i32 15, i32 8, i32 23, i32 7, i32 6, i32 5]
define i32 @first_bit(i64 %0) {
%2 = alloca i64
%3 = alloca [64 x i32]
store i64 %0, i64* %2
%4 = bitcast [64 x i32]* %3 to i8*
%5 = load i64, i64* %2
%6 = load i64, i64* %2
%7 = sub i64 0, %6
%8 = and i64 %5, %7
%9 = mul i64 %8, 571347909858961602
%10 = lshr i64 %9, 58
%11 = getelementptr inbounds [64 x i32], [64 x i32]* %3, i64 0, i64 %10
%12 = load i32, i32* %11
ret i32 %12
}

LLVM IR (-O2):
@__const.first_bit.magic = [64 x i32] [i32 63, i32 0, i32 58, i32 1, i32 59, i32 47, i32 53, i32 2, i32 60, i32 39, i32 48, i32 27, i32 54, i32 33, i32 42, i32 3, i32 61, i32 51, i32 37, i32 40, i32 49, i32 18, i32 28, i32 20, i32 55, i32 30, i32 34, i32 11, i32 43, i32 14, i32 22, i32 4, i32 62, i32 57, i32 46, i32 52, i32 38, i32 26, i32 32, i32 41, i32 50, i32 36, i32 17, i32 19, i32 29, i32 10, i32 13, i32 21, i32 56, i32 45, i32 25, i32 31, i32 35, i32 16, i32 9, i32 12, i32 44, i32 24, i32 15, i32 8, i32 23, i32 7, i32 6, i32 5]
define i32 @first_bit(i64 %0) {
%2 = sub i64 0, %0
%3 = and i64 %2, %0
%4 = mul i64 %3, 571347909858961602
%5 = lshr i64 %4, 58
%6 = getelementptr inbounds [64 x i32], [64 x i32]* @__const.first_bit.magic, i64 0, i64 %5
%7 = load i32, i32* %6
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ iv_header(int /*<<< orphan*/ *);
int /*<<< orphan*/ safe_free(int /*<<< orphan*/);
void delete_index_vector(int32_t *v) {
  if (v != NULL) {
    safe_free(iv_header(v));
  }
}


x86 assembly (clang, -O0):
<delete_index_vector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1147 <delete_index_vector+0x27>
mov    -0x8(%rbp),%rdi
call   1030 <iv_header@plt>
mov    %eax,%edi
call   1040 <safe_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delete_index_vector>:
test   %rdi,%rdi
je     1133 <delete_index_vector+0x13>
push   %rax
call   1030 <iv_header@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <safe_free@plt>
ret

LLVM IR (-O0):
define void @delete_index_vector(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = icmp ne i32* %3, null
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32*, i32** %2
%7 = call i32 @iv_header(i32* %6)
%8 = call i32 @safe_free(i32 %7)
br label %9
9: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @delete_index_vector(i32* %0) {
%2 = icmp eq i32* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i32 @iv_header(i32* %0)
%5 = tail call i32 @safe_free(i32 %4)
br label %6
6: ; preds = %3, %1
ret void
}
void rec_stop() {}


x86 assembly (clang, -O0):
<rec_stop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rec_stop>:
ret

LLVM IR (-O0):
define void @rec_stop() {
ret void
}

LLVM IR (-O2):
define void @rec_stop() {
ret void
}
int g4(int a) { return a != 511; }


x86 assembly (clang, -O0):
<g4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x1ff,-0x4(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g4>:
xor    %eax,%eax
cmp    $0x1ff,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @g4(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 511
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @g4(i32 %0) {
%2 = icmp ne i32 %0, 511
%3 = zext i1 %2 to i32
ret i32 %3
}
f(int b) { return b ? 5 : 2.3; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
movsd  0xeee(%rip),%xmm0
movsd  0xeee(%rip),%xmm1
movsd  %xmm1,-0x18(%rbp)
cmp    $0x0,%eax
movsd  %xmm0,-0x10(%rbp)
jne    1137 <f+0x37>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
cvttsd2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
xor    %eax,%eax
test   %edi,%edi
setne  %al
lea    (%rax,%rax,2),%eax
add    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i64
%6 = select i1 %4, double 5.000000e+00, double 2.300000e+00
%7 = fptosi double %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i32 2, i32 5
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void congrats() {
  printf("\n\n\tCongratulations! You did it.\n\n");
  return;
}


x86 assembly (clang, -O0):
<congrats>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<congrats>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"\0A\0A\09Congratulations! You did it.\0A\0A\00"
define void @congrats() {
%1 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [33 x i8] c"\0A\0A\09Congratulations! You did it.\0A\00"
define void @congrats() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @str, i64 0, i64 0))
ret void
}