void _pwmss_clk_disable(unsigned int device_id) {
  if (0 == device_id) {
    (*((volatile unsigned int *)((0x44E00000) + (0xd4)))) |= (0x0u);
    while ((0x0u) != ((*((volatile unsigned int *)((0x44E00000) + (0xd4)))) &
                      (0x00000003u)))
      ;
  } else if (1 == device_id) {
    (*((volatile unsigned int *)((0x44E00000) + (0xcc)))) |= (0x0u);
    while ((0x0u) != ((*((volatile unsigned int *)((0x44E00000) + (0xcc)))) &
                      (0x00000003u)))
      ;
  } else if (2 == device_id) {
    (*((volatile unsigned int *)((0x44E00000) + (0xd8)))) |= (0x0u);
    while ((0x0u) != ((*((volatile unsigned int *)((0x44E00000) + (0xd8)))) &
                      (0x00000003u)))
      ;
  } else {
    ;
  }
}


x86 assembly (clang, -O0):
<_pwmss_clk_disable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmp    -0x4(%rbp),%eax
jne    1141 <_pwmss_clk_disable+0x41>
mov    $0x44e000d4,%eax
mov    (%rax),%ecx
or     $0x0,%ecx
mov    $0x44e000d4,%eax
mov    %ecx,(%rax)
mov    $0x44e000d4,%eax
mov    (%rax),%ecx
and    $0x3,%ecx
xor    %eax,%eax
cmp    %ecx,%eax
je     113c <_pwmss_clk_disable+0x3c>
jmp    1123 <_pwmss_clk_disable+0x23>
jmp    11ca <_pwmss_clk_disable+0xca>
mov    $0x1,%eax
cmp    -0x4(%rbp),%eax
jne    117e <_pwmss_clk_disable+0x7e>
mov    $0x44e000cc,%eax
mov    (%rax),%ecx
or     $0x0,%ecx
mov    $0x44e000cc,%eax
mov    %ecx,(%rax)
mov    $0x44e000cc,%eax
mov    (%rax),%ecx
and    $0x3,%ecx
xor    %eax,%eax
cmp    %ecx,%eax
je     1179 <_pwmss_clk_disable+0x79>
jmp    1160 <_pwmss_clk_disable+0x60>
jmp    11c5 <_pwmss_clk_disable+0xc5>
mov    $0x2,%eax
cmp    -0x4(%rbp),%eax
jne    11bb <_pwmss_clk_disable+0xbb>
mov    $0x44e000d8,%eax
mov    (%rax),%ecx
or     $0x0,%ecx
mov    $0x44e000d8,%eax
mov    %ecx,(%rax)
mov    $0x44e000d8,%eax
mov    (%rax),%ecx
and    $0x3,%ecx
xor    %eax,%eax
cmp    %ecx,%eax
je     11b6 <_pwmss_clk_disable+0xb6>
jmp    119d <_pwmss_clk_disable+0x9d>
jmp    11c0 <_pwmss_clk_disable+0xc0>
jmp    11c0 <_pwmss_clk_disable+0xc0>
jmp    11c5 <_pwmss_clk_disable+0xc5>
jmp    11ca <_pwmss_clk_disable+0xca>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_pwmss_clk_disable>:
cmp    $0x2,%edi
je     112f <_pwmss_clk_disable+0x2f>
cmp    $0x1,%edi
je     114f <_pwmss_clk_disable+0x4f>
test   %edi,%edi
jne    116d <_pwmss_clk_disable+0x6d>
mov    0x44e000d4,%eax
mov    %eax,0x44e000d4
nopl   0x0(%rax)
testl  $0x3,0x44e000d4
jne    1120 <_pwmss_clk_disable+0x20>
jmp    116d <_pwmss_clk_disable+0x6d>
mov    0x44e000d8,%eax
mov    %eax,0x44e000d8
nopl   (%rax)
testl  $0x3,0x44e000d8
jne    1140 <_pwmss_clk_disable+0x40>
jmp    116d <_pwmss_clk_disable+0x6d>
mov    0x44e000cc,%eax
mov    %eax,0x44e000cc
nopl   (%rax)
testl  $0x3,0x44e000cc
jne    1160 <_pwmss_clk_disable+0x60>
ret

LLVM IR (-O0):
define void @_pwmss_clk_disable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 0, %3
br i1 %4, label %5, label %14
5: ; preds = %1
%6 = load volatile i32, i32* inttoptr (i64 1155530964 to i32*)
%7 = or i32 %6, 0
store volatile i32 %7, i32* inttoptr (i64 1155530964 to i32*)
br label %8
8: ; preds = %12, %5
%9 = load volatile i32, i32* inttoptr (i64 1155530964 to i32*)
%10 = and i32 %9, 3
%11 = icmp ne i32 0, %10
br i1 %11, label %12, label %13
12: ; preds = %8
br label %8
13: ; preds = %8
br label %41
14: ; preds = %1
%15 = load i32, i32* %2
%16 = icmp eq i32 1, %15
br i1 %16, label %17, label %26
17: ; preds = %14
%18 = load volatile i32, i32* inttoptr (i64 1155530956 to i32*)
%19 = or i32 %18, 0
store volatile i32 %19, i32* inttoptr (i64 1155530956 to i32*)
br label %20
20: ; preds = %24, %17
%21 = load volatile i32, i32* inttoptr (i64 1155530956 to i32*)
%22 = and i32 %21, 3
%23 = icmp ne i32 0, %22
br i1 %23, label %24, label %25
24: ; preds = %20
br label %20
25: ; preds = %20
br label %40
26: ; preds = %14
%27 = load i32, i32* %2
%28 = icmp eq i32 2, %27
br i1 %28, label %29, label %38
29: ; preds = %26
%30 = load volatile i32, i32* inttoptr (i64 1155530968 to i32*)
%31 = or i32 %30, 0
store volatile i32 %31, i32* inttoptr (i64 1155530968 to i32*)
br label %32
32: ; preds = %36, %29
%33 = load volatile i32, i32* inttoptr (i64 1155530968 to i32*)
%34 = and i32 %33, 3
%35 = icmp ne i32 0, %34
br i1 %35, label %36, label %37
36: ; preds = %32
br label %32
37: ; preds = %32
br label %39
38: ; preds = %26
br label %39
39: ; preds = %38, %37
br label %40
40: ; preds = %39, %25
br label %41
41: ; preds = %40, %13
ret void
}

LLVM IR (-O2):
define void @_pwmss_clk_disable(i32 %0) {
switch i32 %0, label %20 [
i32 0, label %2
i32 1, label %8
i32 2, label %14
]
2: ; preds = %1
%3 = load volatile i32, i32* inttoptr (i64 1155530964 to i32*)
store volatile i32 %3, i32* inttoptr (i64 1155530964 to i32*)
br label %4
4: ; preds = %4, %2
%5 = load volatile i32, i32* inttoptr (i64 1155530964 to i32*)
%6 = and i32 %5, 3
%7 = icmp eq i32 %6, 0
br i1 %7, label %20, label %4
8: ; preds = %1
%9 = load volatile i32, i32* inttoptr (i64 1155530956 to i32*)
store volatile i32 %9, i32* inttoptr (i64 1155530956 to i32*)
br label %10
10: ; preds = %10, %8
%11 = load volatile i32, i32* inttoptr (i64 1155530956 to i32*)
%12 = and i32 %11, 3
%13 = icmp eq i32 %12, 0
br i1 %13, label %20, label %10
14: ; preds = %1
%15 = load volatile i32, i32* inttoptr (i64 1155530968 to i32*)
store volatile i32 %15, i32* inttoptr (i64 1155530968 to i32*)
br label %16
16: ; preds = %16, %14
%17 = load volatile i32, i32* inttoptr (i64 1155530968 to i32*)
%18 = and i32 %17, 3
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %16
20: ; preds = %16, %10, %4, %1
ret void
}