xunge/DecIR huggingface dataset:
/* Variables and functions */
char getchar();
void getchars(char *start, int count) {
  int i = 0;
  while (i < count) {
    char c = getchar();
    *(start + i) = c;
    i++;
  }
}


x86 assembly (clang, -O0):
<getchars>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1158 <getchars+0x48>
mov    $0x0,%al
call   1030 <getchar@plt>
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%dl
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <getchars+0x16>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getchars>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1144 <getchars+0x34>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <getchar@plt>
mov    %al,(%r14,%rbx,1)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <getchars+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @getchars(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %7
7: ; preds = %11, %2
%8 = load i32, i32* %5
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %20
11: ; preds = %7
%12 = call signext i8 (...) @getchar()
store i8 %12, i8* %6
%13 = load i8, i8* %6
%14 = load i8*, i8** %3
%15 = load i32, i32* %5
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
store i8 %13, i8* %17
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %7
20: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @getchars(i8* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %12
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %10, %6 ]
%8 = tail call signext i8 (...) @getchar()
%9 = getelementptr inbounds i8, i8* %0, i64 %7
store i8 %8, i8* %9
%10 = add nuw nsw i64 %7, 1
%11 = icmp eq i64 %10, %5
br i1 %11, label %12, label %6
12: ; preds = %6, %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_cmpunord_ss(int /*<<< orphan*/, int /*<<< orphan*/);
__m128 test_mm_cmpunord_ss(__m128 __a, __m128 __b) {
  return _mm_cmpunord_ss(__a, __b);
}


x86 assembly (clang, -O0):
<test_mm_cmpunord_ss>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_cmpunord_ss@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cmpunord_ss>:
jmp    1030 <_mm_cmpunord_ss@plt>

LLVM IR (-O0):
define i32 @test_mm_cmpunord_ss(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_cmpunord_ss(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_cmpunord_ss(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmpunord_ss(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ bar(int);
void g(int i) { bar(1); }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <bar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    $0x1,%edi
jmp    1030 <bar@plt>

LLVM IR (-O0):
define void @g(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @bar(i32 1)
ret void
}

LLVM IR (-O2):
define void @g(i32 %0) {
%2 = tail call i32 @bar(i32 1)
ret void
}
unsigned float_neg(unsigned uf) {
  int mask = 0xff << 23;
  int tmp = uf & mask;
  if ((!~(~tmp ^ mask)) && (uf << 9))
    return uf;
  return uf ^ (1 << 31);
}


x86 assembly (clang, -O0):
<float_neg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x7f800000,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
xor    -0xc(%rbp),%eax
xor    $0xffffffff,%eax
cmp    $0x0,%eax
jne    1146 <float_neg+0x46>
mov    -0x8(%rbp),%eax
shl    $0x9,%eax
cmp    $0x0,%eax
je     1146 <float_neg+0x46>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1151 <float_neg+0x51>
mov    -0x8(%rbp),%eax
xor    $0x80000000,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<float_neg>:
mov    %edi,%ecx
mov    %edi,%eax
xor    $0x80000000,%eax
test   $0x7fffff,%edi
cmove  %eax,%edi
not    %ecx
test   $0x7f800000,%ecx
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @float_neg(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 2139095040, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = and i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = xor i32 %9, -1
%11 = load i32, i32* %4
%12 = xor i32 %10, %11
%13 = xor i32 %12, -1
%14 = icmp ne i32 %13, 0
br i1 %14, label %21, label %15
15: ; preds = %1
%16 = load i32, i32* %3
%17 = shl i32 %16, 9
%18 = icmp ne i32 %17, 0
br i1 %18, label %19, label %21
19: ; preds = %15
%20 = load i32, i32* %3
store i32 %20, i32* %2
br label %24
21: ; preds = %15, %1
%22 = load i32, i32* %3
%23 = xor i32 %22, -2147483648
store i32 %23, i32* %2
br label %24
24: ; preds = %21, %19
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @float_neg(i32 %0) {
%2 = and i32 %0, 2139095040
%3 = icmp ne i32 %2, 2139095040
%4 = and i32 %0, 8388607
%5 = icmp eq i32 %4, 0
%6 = or i1 %3, %5
%7 = xor i32 %0, -2147483648
%8 = select i1 %6, i32 %7, i32 %0
ret i32 %8
}
/* Variables and functions */
unsigned char inb(int);
int /*<<< orphan*/ smbus_delay();
int smbus_wait_until_active(void) {
  unsigned long loops;
  loops = (100 * 1000);
  do {
    unsigned char val;
    smbus_delay();
    val = inb(0x1000 + 0x0);
    if ((val & 1)) {
      break;
    }
  } while (--loops);
  return loops ? 0 : -4;
}


x86 assembly (clang, -O0):
<smbus_wait_until_active>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x186a0,-0x8(%rbp)
mov    $0x0,%al
call   1040 <smbus_delay@plt>
mov    $0x1000,%edi
call   1030 <inb@plt>
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1159 <smbus_wait_until_active+0x39>
jmp    1174 <smbus_wait_until_active+0x54>
jmp    115e <smbus_wait_until_active+0x3e>
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
cmp    $0x0,%rax
jne    1130 <smbus_wait_until_active+0x10>
mov    -0x8(%rbp),%rdx
mov    $0xfffffffc,%eax
xor    %ecx,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smbus_wait_until_active>:
push   %rbp
push   %rbx
push   %rax
mov    $0xfffffffffffe7960,%rbx
xor    %ebp,%ebp
nopl   0x0(%rax)
xor    %eax,%eax
call   1040 <smbus_delay@plt>
mov    $0x1000,%edi
call   1030 <inb@plt>
test   $0x1,%al
jne    114f <smbus_wait_until_active+0x2f>
inc    %rbx
jne    1130 <smbus_wait_until_active+0x10>
mov    $0xfffffffc,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @smbus_wait_until_active() {
%1 = alloca i64
%2 = alloca i8
store i64 100000, i64* %1
br label %3
3: ; preds = %12, %0
%4 = call i32 (...) @smbus_delay()
%5 = call zeroext i8 @inb(i32 4096)
store i8 %5, i8* %2
%6 = load i8, i8* %2
%7 = zext i8 %6 to i32
%8 = and i32 %7, 1
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %3
br label %16
11: ; preds = %3
br label %12
12: ; preds = %11
%13 = load i64, i64* %1
%14 = add i64 %13, -1
store i64 %14, i64* %1
%15 = icmp ne i64 %14, 0
br i1 %15, label %3, label %16
16: ; preds = %12, %10
%17 = load i64, i64* %1
%18 = icmp ne i64 %17, 0
%19 = zext i1 %18 to i64
%20 = select i1 %18, i32 0, i32 -4
ret i32 %20
}

LLVM IR (-O2):
define i32 @smbus_wait_until_active() {
br label %1
1: ; preds = %7, %0
%2 = phi i64 [ 100000, %0 ], [ %8, %7 ]
%3 = tail call i32 (...) @smbus_delay()
%4 = tail call zeroext i8 @inb(i32 4096)
%5 = and i8 %4, 1
%6 = icmp eq i8 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = add nsw i64 %2, -1
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %1
10: ; preds = %7, %1
%11 = phi i32 [ 0, %1 ], [ -4, %7 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_eval(int);
int isalnum(int);
void test_alnum_symbolic(int x) {
  int ret = isalnum(x);
  (void)ret;
  clang_analyzer_eval(-1 <= x && x <= 255);
}


x86 assembly (clang, -O0):
<test_alnum_symbolic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <isalnum@plt>
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
mov    $0xffffffff,%ecx
cmp    -0x4(%rbp),%ecx
mov    %al,-0x9(%rbp)
jg     1156 <test_alnum_symbolic+0x36>
cmpl   $0xff,-0x4(%rbp)
setle  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <clang_analyzer_eval@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_alnum_symbolic>:
add    $0x1,%edi
xor    %eax,%eax
cmp    $0x101,%edi
setb   %al
mov    %eax,%edi
jmp    1030 <clang_analyzer_eval@plt>

LLVM IR (-O0):
define void @test_alnum_symbolic(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @isalnum(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp sle i32 -1, %7
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i32, i32* %2
%11 = icmp sle i32 %10, 255
br label %12
12: ; preds = %9, %1
%13 = phi i1 [ false, %1 ], [ %11, %9 ]
%14 = zext i1 %13 to i32
%15 = call i32 @clang_analyzer_eval(i32 %14)
ret void
}

LLVM IR (-O2):
define void @test_alnum_symbolic(i32 %0) {
%2 = add i32 %0, 1
%3 = icmp ult i32 %2, 257
%4 = zext i1 %3 to i32
%5 = tail call i32 @clang_analyzer_eval(i32 %4)
ret void
}
/* Variables and functions */
int __infer_nondet_int();
int ilogbl(long double x) { return __infer_nondet_int(); }


x86 assembly (clang, -O0):
<ilogbl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_int@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ilogbl>:
xor    %eax,%eax
jmp    1030 <__infer_nondet_int@plt>

LLVM IR (-O0):
define i32 @ilogbl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = call i32 (...) @__infer_nondet_int()
ret i32 %3
}

LLVM IR (-O2):
define i32 @ilogbl(x86_fp80 %0) {
%2 = tail call i32 (...) @__infer_nondet_int()
ret i32 %2
}
/* Type definitions */
typedef char uint8_t;

/* Variables and functions */
int CHAR_BIT;
int /*<<< orphan*/ assert(int);
char get_bit(volatile uint8_t *current, int position) {
  assert(position < CHAR_BIT);
  char mask = 1 << position;
  return *current & mask;
}


x86 assembly (clang, -O0):
<get_bit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    0x2eb7(%rip),%rcx
cmp    (%rcx),%eax
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
movsbl %al,%eax
movsbl -0xd(%rbp),%ecx
and    %ecx,%eax
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_bit>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
mov    0x2ec0(%rip),%rax
xor    %edi,%edi
cmp    %esi,(%rax)
setg   %dil
call   1030 <assert@plt>
mov    $0x1000000,%eax
mov    %ebx,%ecx
shl    %cl,%eax
shr    $0x18,%eax
and    (%r14),%al
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@CHAR_BIT = global i32 0
define signext i8 @get_bit(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* @CHAR_BIT
%8 = icmp slt i32 %6, %7
%9 = zext i1 %8 to i32
%10 = call i32 @assert(i32 %9)
%11 = load i32, i32* %4
%12 = shl i32 1, %11
%13 = trunc i32 %12 to i8
store i8 %13, i8* %5
%14 = load i8*, i8** %3
%15 = load volatile i8, i8* %14
%16 = sext i8 %15 to i32
%17 = load i8, i8* %5
%18 = sext i8 %17 to i32
%19 = and i32 %16, %18
%20 = trunc i32 %19 to i8
ret i8 %20
}

LLVM IR (-O2):
@CHAR_BIT = global i32 0
define signext i8 @get_bit(i8* %0, i32 %1) {
%3 = load i32, i32* @CHAR_BIT
%4 = icmp sgt i32 %3, %1
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
%7 = load volatile i8, i8* %0
%8 = shl i32 16777216, %1
%9 = lshr exact i32 %8, 24
%10 = trunc i32 %9 to i8
%11 = and i8 %7, %10
ret i8 %11
}
float CubicBezierP3(float t, float p) { return t * t * t * p; }


x86 assembly (clang, -O0):
<CubicBezierP3>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<CubicBezierP3>:
movaps %xmm0,%xmm2
mulss  %xmm0,%xmm2
mulss  %xmm2,%xmm0
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @CubicBezierP3(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %3
%7 = fmul float %5, %6
%8 = load float, float* %3
%9 = fmul float %7, %8
%10 = load float, float* %4
%11 = fmul float %9, %10
ret float %11
}

LLVM IR (-O2):
define float @CubicBezierP3(float %0, float %1) {
%3 = fmul float %0, %0
%4 = fmul float %3, %0
%5 = fmul float %4, %1
ret float %5
}
int _min3(int a, int b, int c) {
  if (a <= b && a <= c)
    return a;
  if (b <= a && b <= c)
    return b;
  return c;
}


x86 assembly (clang, -O0):
<_min3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     1130 <_min3+0x30>
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
jg     1130 <_min3+0x30>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1159 <_min3+0x59>
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1153 <_min3+0x53>
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jg     1153 <_min3+0x53>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1159 <_min3+0x59>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_min3>:
cmp    %edx,%esi
mov    %esi,%ecx
cmovg  %edx,%ecx
cmp    %edi,%esi
cmovg  %edx,%ecx
cmp    %edx,%edi
mov    %edi,%eax
cmovg  %ecx,%eax
cmp    %esi,%edi
cmovg  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @_min3(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp sle i32 %8, %9
br i1 %10, label %11, label %17
11: ; preds = %3
%12 = load i32, i32* %5
%13 = load i32, i32* %7
%14 = icmp sle i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = load i32, i32* %5
store i32 %16, i32* %4
br label %29
17: ; preds = %11, %3
%18 = load i32, i32* %6
%19 = load i32, i32* %5
%20 = icmp sle i32 %18, %19
br i1 %20, label %21, label %27
21: ; preds = %17
%22 = load i32, i32* %6
%23 = load i32, i32* %7
%24 = icmp sle i32 %22, %23
br i1 %24, label %25, label %27
25: ; preds = %21
%26 = load i32, i32* %6
store i32 %26, i32* %4
br label %29
27: ; preds = %21, %17
%28 = load i32, i32* %7
store i32 %28, i32* %4
br label %29
29: ; preds = %27, %25, %15
%30 = load i32, i32* %4
ret i32 %30
}

LLVM IR (-O2):
define i32 @_min3(i32 %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %0, %1
%5 = icmp sgt i32 %0, %2
%6 = or i1 %4, %5
%7 = icmp sgt i32 %1, %0
%8 = icmp sgt i32 %1, %2
%9 = or i1 %7, %8
%10 = select i1 %9, i32 %2, i32 %1
%11 = select i1 %6, i32 %10, i32 %0
ret i32 %11
}
void SSMR3Seek(void) {}


x86 assembly (clang, -O0):
<SSMR3Seek>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSMR3Seek>:
ret

LLVM IR (-O0):
define void @SSMR3Seek() {
ret void
}

LLVM IR (-O2):
define void @SSMR3Seek() {
ret void
}
int test_imm_D4uint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0xD4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D4uint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0xd4,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D4uint64_highword_reg>:
movabs $0xd400000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D4uint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 212
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D4uint64_highword_reg(i64 %0) {
%2 = and i64 %0, 910533066752
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int write(int file, char *ptr, int len) { return 0; }


x86 assembly (clang, -O0):
<write>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<write>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @write(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @write(i32 %0, i8* nocapture readnone %1, i32 %2) {
ret i32 0
}
int main() { return 1 >= 1; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
/* Variables and functions */
size_t ls_get_nb_swaps(size_t dimension) { return dimension; }


x86 assembly (clang, -O0):
<ls_get_nb_swaps>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_get_nb_swaps>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @ls_get_nb_swaps(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
ret i64 %3
}

LLVM IR (-O2):
define i64 @ls_get_nb_swaps(i64 returned %0) {
ret i64 %0
}
/* Variables and functions */
int /*<<< orphan*/ CMT1_delay_10us(int);
int /*<<< orphan*/ CMT1_delay_ms(int);
int /*<<< orphan*/ OLED_contrast(int);
int /*<<< orphan*/ OLED_wrcmd(int);
void OLED_init(void) {
  OLED_wrcmd(0x01);
  CMT1_delay_ms(2);
  OLED_wrcmd(0x02);
  CMT1_delay_ms(2);
  OLED_wrcmd(0x0C);
  CMT1_delay_10us(4);
  OLED_wrcmd(0x06);
  CMT1_delay_10us(4);
  OLED_contrast(0x7F);
}


x86 assembly (clang, -O0):
<OLED_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1060 <OLED_wrcmd@plt>
mov    $0x2,%edi
call   1040 <CMT1_delay_ms@plt>
mov    $0x2,%edi
call   1060 <OLED_wrcmd@plt>
mov    $0x2,%edi
call   1040 <CMT1_delay_ms@plt>
mov    $0xc,%edi
call   1060 <OLED_wrcmd@plt>
mov    $0x4,%edi
call   1030 <CMT1_delay_10us@plt>
mov    $0x6,%edi
call   1060 <OLED_wrcmd@plt>
mov    $0x4,%edi
call   1030 <CMT1_delay_10us@plt>
mov    $0x7f,%edi
call   1050 <OLED_contrast@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<OLED_init>:
push   %rax
mov    $0x1,%edi
call   1060 <OLED_wrcmd@plt>
mov    $0x2,%edi
call   1040 <CMT1_delay_ms@plt>
mov    $0x2,%edi
call   1060 <OLED_wrcmd@plt>
mov    $0x2,%edi
call   1040 <CMT1_delay_ms@plt>
mov    $0xc,%edi
call   1060 <OLED_wrcmd@plt>
mov    $0x4,%edi
call   1030 <CMT1_delay_10us@plt>
mov    $0x6,%edi
call   1060 <OLED_wrcmd@plt>
mov    $0x4,%edi
call   1030 <CMT1_delay_10us@plt>
mov    $0x7f,%edi
pop    %rax
jmp    1050 <OLED_contrast@plt>

LLVM IR (-O0):
define void @OLED_init() {
%1 = call i32 @OLED_wrcmd(i32 1)
%2 = call i32 @CMT1_delay_ms(i32 2)
%3 = call i32 @OLED_wrcmd(i32 2)
%4 = call i32 @CMT1_delay_ms(i32 2)
%5 = call i32 @OLED_wrcmd(i32 12)
%6 = call i32 @CMT1_delay_10us(i32 4)
%7 = call i32 @OLED_wrcmd(i32 6)
%8 = call i32 @CMT1_delay_10us(i32 4)
%9 = call i32 @OLED_contrast(i32 127)
ret void
}

LLVM IR (-O2):
define void @OLED_init() {
%1 = tail call i32 @OLED_wrcmd(i32 1)
%2 = tail call i32 @CMT1_delay_ms(i32 2)
%3 = tail call i32 @OLED_wrcmd(i32 2)
%4 = tail call i32 @CMT1_delay_ms(i32 2)
%5 = tail call i32 @OLED_wrcmd(i32 12)
%6 = tail call i32 @CMT1_delay_10us(i32 4)
%7 = tail call i32 @OLED_wrcmd(i32 6)
%8 = tail call i32 @CMT1_delay_10us(i32 4)
%9 = tail call i32 @OLED_contrast(i32 127)
ret void
}
/* Variables and functions */
double log(double);
double zs_to_bit(double zs, int n0, int n1) {
  return zs + log((double)(n0 * n1)) / 0.69314718055994530942;
}


x86 assembly (clang, -O0):
<zs_to_bit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0xc(%rbp),%eax
imul   -0x10(%rbp),%eax
cvtsi2sd %eax,%xmm0
call   1030 <log@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
movsd  0xeb3(%rip),%xmm2
divsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zs_to_bit>:
push   %rax
movsd  %xmm0,(%rsp)
imul   %esi,%edi
xorps  %xmm0,%xmm0
cvtsi2sd %edi,%xmm0
call   1030 <log@plt>
divsd  0xed3(%rip),%xmm0
addsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @zs_to_bit(double %0, i32 %1, i32 %2) {
%4 = alloca double
%5 = alloca i32
%6 = alloca i32
store double %0, double* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load double, double* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = mul nsw i32 %8, %9
%11 = sitofp i32 %10 to double
%12 = call double @log(double %11)
%13 = fdiv double %12, 0x3FE62E42FEFA39EF
%14 = fadd double %7, %13
ret double %14
}

LLVM IR (-O2):
define double @zs_to_bit(double %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %2, %1
%5 = sitofp i32 %4 to double
%6 = tail call double @log(double %5)
%7 = fdiv double %6, 0x3FE62E42FEFA39EF
%8 = fadd double %7, %0
ret double %8
}
/* Type definitions */
typedef int /*<<< orphan*/ sqlite3_file;

/* Variables and functions */
int scmSectorSize(sqlite3_file *pFile) { return 0; }


x86 assembly (clang, -O0):
<scmSectorSize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scmSectorSize>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @scmSectorSize(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @scmSectorSize(i32* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ DH;
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int /*<<< orphan*/ *BIO_new_mem_buf(char *, int /*<<< orphan*/);
int /*<<< orphan*/ BIO_vfree(int /*<<< orphan*/ *);
int /*<<< orphan*/ *PEM_read_bio_DHparams(int /*<<< orphan*/ *,
                                          int /*<<< orphan*/ *,
                                          int /*<<< orphan*/ *,
                                          int /*<<< orphan*/ *);
int /*<<< orphan*/ strlen(char const *);
DH *parseDH(const char *dhStr) {
  BIO *bio = BIO_new_mem_buf((char *)dhStr, strlen(dhStr));
  DH *dh = PEM_read_bio_DHparams(bio, NULL, NULL, NULL);
  BIO_vfree(bio);
  return dh;
}


x86 assembly (clang, -O0):
<parseDH>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    %eax,%esi
call   1060 <BIO_new_mem_buf@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%ecx
mov    %rcx,%rsi
mov    %rcx,%rdx
call   1050 <PEM_read_bio_DHparams@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <BIO_vfree@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parseDH>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1060 <BIO_new_mem_buf@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
call   1050 <PEM_read_bio_DHparams@plt>
mov    %rax,%r14
mov    %rbx,%rdi
call   1030 <BIO_vfree@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32* @parseDH(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
%4 = alloca i32*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = load i8*, i8** %2
%7 = call i32 @strlen(i8* %6)
%8 = call i32* @BIO_new_mem_buf(i8* %5, i32 %7)
store i32* %8, i32** %3
%9 = load i32*, i32** %3
%10 = call i32* @PEM_read_bio_DHparams(i32* %9, i32* null, i32* null, i32* null)
store i32* %10, i32** %4
%11 = load i32*, i32** %3
%12 = call i32 @BIO_vfree(i32* %11)
%13 = load i32*, i32** %4
ret i32* %13
}

LLVM IR (-O2):
define i32* @parseDH(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32* @BIO_new_mem_buf(i8* %0, i32 %2)
%4 = tail call i32* @PEM_read_bio_DHparams(i32* %3, i32* null, i32* null, i32* null)
%5 = tail call i32 @BIO_vfree(i32* %3)
ret i32* %4
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *, int /*<<< orphan*/);
int write_doubles_to_defined_output_file(int n, double *a) {
  int i, *b, fail;
  fail = _ada_use_c2phc(160, &n, b, a, 0);
  return fail;
}


x86 assembly (clang, -O0):
<write_doubles_to_defined_output_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x20(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    $0xa0,%edi
lea    -0x4(%rbp),%rsi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_doubles_to_defined_output_file>:
push   %rax
mov    %rsi,%rcx
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0xa0,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @write_doubles_to_defined_output_file(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca double*
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
store i32 %0, i32* %3
store double* %1, double** %4
%8 = load i32*, i32** %6
%9 = load double*, double** %4
%10 = call i32 @_ada_use_c2phc(i32 160, i32* %3, i32* %8, double* %9, i32 0)
store i32 %10, i32* %7
%11 = load i32, i32* %7
ret i32 %11
}

LLVM IR (-O2):
define i32 @write_doubles_to_defined_output_file(i32 %0, double* %1) {
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 @_ada_use_c2phc(i32 160, i32* %3, i32* undef, double* %1, i32 0)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ write(char *, char *, char *);
void function_name(char *name) { write("csv-task.csv", "%s,", name); }


x86 assembly (clang, -O0):
<function_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xedf(%rip),%rsi
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<function_name>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xeec(%rip),%rsi
jmp    1030 <write@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"csv-task.csv\00"
@.str.1 = [4 x i8] c"%s,\00"
define void @function_name(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @write(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"csv-task.csv\00"
@.str.1 = [4 x i8] c"%s,\00"
define void @function_name(i8* %0) {
%2 = tail call i32 @write(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
void tracev(const char *fmt, va_list va) {}


x86 assembly (clang, -O0):
<tracev>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tracev>:
ret

LLVM IR (-O0):
define void @tracev(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @tracev(i8* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ find_track_regex(char *);
int main(int argc, char *argv[]) {
  char *pattern = "F.*F.*";
  find_track_regex(pattern);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <find_track_regex@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <find_track_regex@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"F.*F.*\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8** %6
%7 = load i8*, i8** %6
%8 = call i32 @find_track_regex(i8* %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"F.*F.*\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @find_track_regex(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ mask;
typedef int __u8;

/* Variables and functions */
const char *strxf_mask8(__u8 mask) {
  static char str[16];
  const int sn = sizeof(mask) * 8 - 1;
  __u8 b;
  int i = 0;
  for (b = (1 << sn); b > 0; b >>= 1)
    str[i++] = ((b & mask) ? '1' : '0');
  str[i] = '\0';
  return str;
}


x86 assembly (clang, -O0):
<strxf_mask8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1f,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x80000000,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    1164 <strxf_mask8+0x64>
mov    -0xc(%rbp),%edx
and    -0x4(%rbp),%edx
mov    $0x30,%eax
mov    $0x31,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %al,%dl
mov    -0x10(%rbp),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,-0x10(%rbp)
movslq %eax,%rcx
lea    0x2edd(%rip),%rax
mov    %dl,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    111c <strxf_mask8+0x1c>
movslq -0x10(%rbp),%rcx
lea    0x2ec1(%rip),%rax
movb   $0x0,(%rax,%rcx,1)
lea    0x2eb6(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strxf_mask8>:
movb   $0x0,0x2f29(%rip)
lea    0x2f22(%rip),%rax
ret

LLVM IR (-O0):
@strxf_mask8.str = internal global [16 x i8] zeroinitializer
define i8* @strxf_mask8(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
store i32 31, i32* %3
store i32 0, i32* %5
store i32 -2147483648, i32* %4
br label %6
6: ; preds = %21, %1
%7 = load i32, i32* %4
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %24
9: ; preds = %6
%10 = load i32, i32* %4
%11 = load i32, i32* %2
%12 = and i32 %10, %11
%13 = icmp ne i32 %12, 0
%14 = zext i1 %13 to i64
%15 = select i1 %13, i32 49, i32 48
%16 = trunc i32 %15 to i8
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 1
store i32 %18, i32* %5
%19 = sext i32 %17 to i64
%20 = getelementptr inbounds [16 x i8], [16 x i8]* @strxf_mask8.str, i64 0, i64 %19
store i8 %16, i8* %20
br label %21
21: ; preds = %9
%22 = load i32, i32* %4
%23 = ashr i32 %22, 1
store i32 %23, i32* %4
br label %6
24: ; preds = %6
%25 = load i32, i32* %5
%26 = sext i32 %25 to i64
%27 = getelementptr inbounds [16 x i8], [16 x i8]* @strxf_mask8.str, i64 0, i64 %26
store i8 0, i8* %27
ret i8* getelementptr inbounds ([16 x i8], [16 x i8]* @strxf_mask8.str, i64 0, i64 0)
}

LLVM IR (-O2):
@strxf_mask8.str = internal global [16 x i8] zeroinitializer
define i8* @strxf_mask8(i32 %0) {
store i8 0, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @strxf_mask8.str, i64 0, i64 0)
ret i8* getelementptr inbounds ([16 x i8], [16 x i8]* @strxf_mask8.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ functionsGrammar();
int /*<<< orphan*/ includeGrammar();
void program() {
  includeGrammar();
  functionsGrammar();
}


x86 assembly (clang, -O0):
<program>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <includeGrammar@plt>
mov    $0x0,%al
call   1040 <functionsGrammar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<program>:
push   %rax
xor    %eax,%eax
call   1030 <includeGrammar@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <functionsGrammar@plt>

LLVM IR (-O0):
define void @program() {
%1 = call i32 (...) @includeGrammar()
%2 = call i32 (...) @functionsGrammar()
ret void
}

LLVM IR (-O2):
define void @program() {
%1 = tail call i32 (...) @includeGrammar()
%2 = tail call i32 (...) @functionsGrammar()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __halt();
void fn11A4() { __halt(); }


x86 assembly (clang, -O0):
<fn11A4>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__halt@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn11A4>:
xor    %eax,%eax
jmp    1030 <__halt@plt>

LLVM IR (-O0):
define void @fn11A4() {
%1 = call i32 (...) @__halt()
ret void
}

LLVM IR (-O2):
define void @fn11A4() {
%1 = tail call i32 (...) @__halt()
ret void
}
/* Variables and functions */
int drand48();
int /*<<< orphan*/ random_bytes(unsigned char *, int);
void chap_md5_generate_challenge(unsigned char *cp) {
  int clen;
  clen = (int)(drand48() * (24 - 16)) + 16;
  *cp++ = clen;
  random_bytes(cp, clen);
}


x86 assembly (clang, -O0):
<chap_md5_generate_challenge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <drand48@plt>
shl    $0x3,%eax
add    $0x10,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <random_bytes@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chap_md5_generate_challenge>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <drand48@plt>
lea    0x10(,%rax,8),%esi
mov    %sil,(%rbx)
add    $0x1,%rbx
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <random_bytes@plt>

LLVM IR (-O0):
define void @chap_md5_generate_challenge(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = call i32 (...) @drand48()
%5 = mul nsw i32 %4, 8
%6 = add nsw i32 %5, 16
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = trunc i32 %7 to i8
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
store i8 %8, i8* %9
%11 = load i8*, i8** %2
%12 = load i32, i32* %3
%13 = call i32 @random_bytes(i8* %11, i32 %12)
ret void
}

LLVM IR (-O2):
define void @chap_md5_generate_challenge(i8* %0) {
%2 = tail call i32 (...) @drand48()
%3 = shl nsw i32 %2, 3
%4 = add nsw i32 %3, 16
%5 = trunc i32 %4 to i8
%6 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %5, i8* %0
%7 = tail call i32 @random_bytes(i8* %6, i32 %4)
ret void
}
char *langRomTypeMegaSCSI() { return "MEGA-SCSI"; }


x86 assembly (clang, -O0):
<langRomTypeMegaSCSI>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langRomTypeMegaSCSI>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [10 x i8] c"MEGA-SCSI\00"
define i8* @langRomTypeMegaSCSI() {
ret i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [10 x i8] c"MEGA-SCSI\00"
define i8* @langRomTypeMegaSCSI() {
ret i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0)
}
void g_param_spec_int64() {}


x86 assembly (clang, -O0):
<g_param_spec_int64>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_param_spec_int64>:
ret

LLVM IR (-O0):
define void @g_param_spec_int64() {
ret void
}

LLVM IR (-O2):
define void @g_param_spec_int64() {
ret void
}
void test_0(float x, int *out) { *--out = (int)x; }


x86 assembly (clang, -O0):
<test_0>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
cvttss2si -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0xfffffffffffffffc,%rdx
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_0>:
cvttss2si %xmm0,%eax
mov    %eax,-0x4(%rdi)
ret

LLVM IR (-O0):
define void @test_0(float %0, i32* %1) {
%3 = alloca float
%4 = alloca i32*
store float %0, float* %3
store i32* %1, i32** %4
%5 = load float, float* %3
%6 = fptosi float %5 to i32
%7 = load i32*, i32** %4
%8 = getelementptr inbounds i32, i32* %7, i32 -1
store i32* %8, i32** %4
store i32 %6, i32* %8
ret void
}

LLVM IR (-O2):
define void @test_0(float %0, i32* nocapture writeonly %1) {
%3 = fptosi float %0 to i32
%4 = getelementptr inbounds i32, i32* %1, i64 -1
store i32 %3, i32* %4
ret void
}
unsigned int elf_hash(const unsigned char *name) {
  unsigned int h = 0, g;
  while (*name) {
    h = (h << 4) + *(name++);
    if ((g = h & 0xf0000000))
      h ^= g >> 24;
    h ^= g;
  }
  return h;
}


x86 assembly (clang, -O0):
<elf_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1167 <elf_hash+0x67>
mov    -0xc(%rbp),%eax
shl    $0x4,%eax
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movzbl (%rcx),%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xf0000000,%eax
mov    %eax,-0x10(%rbp)
cmp    $0x0,%eax
je     1159 <elf_hash+0x59>
mov    -0x10(%rbp),%eax
shr    $0x18,%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    110f <elf_hash+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<elf_hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1135 <elf_hash+0x35>
add    $0x1,%rdi
xor    %edx,%edx
nopl   0x0(%rax)
shl    $0x4,%edx
movzbl %cl,%eax
add    %edx,%eax
mov    %eax,%ecx
shr    $0x18,%ecx
and    $0xfffffff0,%ecx
and    $0xfffffff,%eax
xor    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
mov    %eax,%edx
test   %cl,%cl
jne    1110 <elf_hash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @elf_hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %5
5: ; preds = %25, %1
%6 = load i8*, i8** %2
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %29
9: ; preds = %5
%10 = load i32, i32* %3
%11 = shl i32 %10, 4
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %2
%14 = load i8, i8* %12
%15 = zext i8 %14 to i32
%16 = add i32 %11, %15
store i32 %16, i32* %3
%17 = load i32, i32* %3
%18 = and i32 %17, -268435456
store i32 %18, i32* %4
%19 = icmp ne i32 %18, 0
br i1 %19, label %20, label %25
20: ; preds = %9
%21 = load i32, i32* %4
%22 = lshr i32 %21, 24
%23 = load i32, i32* %3
%24 = xor i32 %23, %22
store i32 %24, i32* %3
br label %25
25: ; preds = %20, %9
%26 = load i32, i32* %4
%27 = load i32, i32* %3
%28 = xor i32 %27, %26
store i32 %28, i32* %3
br label %5
29: ; preds = %5
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @elf_hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %18, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %16, %4 ], [ %2, %1 ]
%6 = phi i8* [ %9, %4 ], [ %0, %1 ]
%7 = phi i32 [ %15, %4 ], [ 0, %1 ]
%8 = shl i32 %7, 4
%9 = getelementptr inbounds i8, i8* %6, i64 1
%10 = zext i8 %5 to i32
%11 = add i32 %8, %10
%12 = lshr i32 %11, 24
%13 = and i32 %12, 240
%14 = and i32 %11, 268435455
%15 = xor i32 %14, %13
%16 = load i8, i8* %9
%17 = icmp eq i8 %16, 0
br i1 %17, label %18, label %4
18: ; preds = %4, %1
%19 = phi i32 [ 0, %1 ], [ %15, %4 ]
ret i32 %19
}
/* Variables and functions */
int /*<<< orphan*/ O_CREAT;
int /*<<< orphan*/ O_RDONLY;
int /*<<< orphan*/ O_WRONLY;
int /*<<< orphan*/ print_constant(char *, int /*<<< orphan*/);
int main(void) {
  print_constant("syscall-o-rdonly", O_RDONLY);
  print_constant("syscall-o-wronly", O_WRONLY);
  print_constant("syscall-o-creat", O_CREAT);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%esi
lea    0xed1(%rip),%rdi
call   1030 <print_constant@plt>
mov    0x2e8d(%rip),%rax
mov    (%rax),%esi
lea    0xecd(%rip),%rdi
call   1030 <print_constant@plt>
mov    0x2ea8(%rip),%rax
mov    (%rax),%esi
lea    0xec9(%rip),%rdi
call   1030 <print_constant@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
lea    0xedf(%rip),%rdi
call   1030 <print_constant@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%esi
lea    0xedb(%rip),%rdi
call   1030 <print_constant@plt>
mov    0x2eb6(%rip),%rax
mov    (%rax),%esi
lea    0xed7(%rip),%rdi
call   1030 <print_constant@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"syscall-o-rdonly\00"
@O_RDONLY = global i32 0
@.str.1 = [17 x i8] c"syscall-o-wronly\00"
@O_WRONLY = global i32 0
@.str.2 = [16 x i8] c"syscall-o-creat\00"
@O_CREAT = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @O_RDONLY
%3 = call i32 @print_constant(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = load i32, i32* @O_WRONLY
%5 = call i32 @print_constant(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i32 %4)
%6 = load i32, i32* @O_CREAT
%7 = call i32 @print_constant(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [17 x i8] c"syscall-o-rdonly\00"
@O_RDONLY = global i32 0
@.str.1 = [17 x i8] c"syscall-o-wronly\00"
@O_WRONLY = global i32 0
@.str.2 = [16 x i8] c"syscall-o-creat\00"
@O_CREAT = global i32 0
define i32 @main() {
%1 = load i32, i32* @O_RDONLY
%2 = tail call i32 @print_constant(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = load i32, i32* @O_WRONLY
%4 = tail call i32 @print_constant(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i32 %3)
%5 = load i32, i32* @O_CREAT
%6 = tail call i32 @print_constant(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Variables and functions */
int check_force_gs1(int const);
int gs1_compliant(const int symbology) {
  int result = check_force_gs1(symbology);
  switch (symbology) {
  case 23:
  case 92:
  case 71:
  case 141:
  case 24:
  case 58:
  case 115:
  case 145:
  case 144:
    result = 1;
    break;
  }
  return result;
}


x86 assembly (clang, -O0):
<gs1_compliant>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <check_force_gs1@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
add    $0xffffffe9,%eax
sub    $0x2,%eax
jb     11aa <gs1_compliant+0x9a>
jmp    113d <gs1_compliant+0x2d>
mov    -0xc(%rbp),%eax
sub    $0x3a,%eax
je     11aa <gs1_compliant+0x9a>
jmp    114e <gs1_compliant+0x3e>
mov    -0xc(%rbp),%eax
sub    $0x47,%eax
je     11aa <gs1_compliant+0x9a>
jmp    115f <gs1_compliant+0x4f>
mov    -0xc(%rbp),%eax
sub    $0x5c,%eax
je     11aa <gs1_compliant+0x9a>
jmp    1170 <gs1_compliant+0x60>
mov    -0xc(%rbp),%eax
sub    $0x73,%eax
je     11aa <gs1_compliant+0x9a>
jmp    1181 <gs1_compliant+0x71>
mov    -0xc(%rbp),%eax
sub    $0x8d,%eax
je     11aa <gs1_compliant+0x9a>
jmp    1194 <gs1_compliant+0x84>
mov    -0xc(%rbp),%eax
add    $0xffffff70,%eax
sub    $0x1,%eax
ja     11b1 <gs1_compliant+0xa1>
jmp    11aa <gs1_compliant+0x9a>
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gs1_compliant>:
push   %rbx
mov    %edi,%ebx
call   1030 <check_force_gs1@plt>
lea    -0x5c(%rbx),%ecx
cmp    $0x35,%ecx
ja     1130 <gs1_compliant+0x20>
movabs $0x32000000800001,%rdx
bt     %rcx,%rdx
jb     1148 <gs1_compliant+0x38>
add    $0xffffffe9,%ebx
cmp    $0x30,%ebx
ja     114d <gs1_compliant+0x3d>
movabs $0x1000800000003,%rcx
bt     %rbx,%rcx
jae    114d <gs1_compliant+0x3d>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @gs1_compliant(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @check_force_gs1(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %2
switch i32 %6, label %8 [
i32 23, label %7
i32 92, label %7
i32 71, label %7
i32 141, label %7
i32 24, label %7
i32 58, label %7
i32 115, label %7
i32 145, label %7
i32 144, label %7
]
7: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1
store i32 1, i32* %3
br label %8
8: ; preds = %1, %7
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @gs1_compliant(i32 %0) {
%2 = tail call i32 @check_force_gs1(i32 %0)
switch i32 %0, label %4 [
i32 23, label %3
i32 92, label %3
i32 71, label %3
i32 141, label %3
i32 24, label %3
i32 58, label %3
i32 115, label %3
i32 145, label %3
i32 144, label %3
]
3: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1
br label %4
4: ; preds = %1, %3
%5 = phi i32 [ %2, %1 ], [ 1, %3 ]
ret i32 %5
}
char *protocol_str(int protocol) { return protocol == 1 ? "TCP" : "UDP"; }


x86 assembly (clang, -O0):
<protocol_str>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xef3(%rip),%rax
lea    0xee8(%rip),%rcx
cmp    $0x1,%edx
cmove  %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<protocol_str>:
cmp    $0x1,%edi
lea    0xef6(%rip),%rcx
lea    0xef3(%rip),%rax
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"TCP\00"
@.str.1 = [4 x i8] c"UDP\00"
define i8* @protocol_str(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1
%5 = zext i1 %4 to i64
%6 = select i1 %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0)
ret i8* %6
}

LLVM IR (-O2):
@.str = [4 x i8] c"TCP\00"
@.str.1 = [4 x i8] c"UDP\00"
define i8* @protocol_str(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = select i1 %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ cftbsub(int, double *);
int /*<<< orphan*/ cftfsub(int, double *);
void cdft(int n, int isgn, double *a) {
  if (isgn >= 0) {
    cftfsub(n, a);
  } else {
    cftbsub(n, a);
  }
}


x86 assembly (clang, -O0):
<cdft>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     114d <cdft+0x2d>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <cftfsub@plt>
jmp    1159 <cdft+0x39>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <cftbsub@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cdft>:
test   %esi,%esi
js     112c <cdft+0xc>
mov    %rdx,%rsi
jmp    1040 <cftfsub@plt>
mov    %rdx,%rsi
jmp    1030 <cftbsub@plt>

LLVM IR (-O0):
define void @cdft(i32 %0, i32 %1, double* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca double*
store i32 %0, i32* %4
store i32 %1, i32* %5
store double* %2, double** %6
%7 = load i32, i32* %5
%8 = icmp sge i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = load i32, i32* %4
%11 = load double*, double** %6
%12 = call i32 @cftfsub(i32 %10, double* %11)
br label %17
13: ; preds = %3
%14 = load i32, i32* %4
%15 = load double*, double** %6
%16 = call i32 @cftbsub(i32 %14, double* %15)
br label %17
17: ; preds = %13, %9
ret void
}

LLVM IR (-O2):
define void @cdft(i32 %0, i32 %1, double* %2) {
%4 = icmp sgt i32 %1, -1
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 @cftfsub(i32 %0, double* %2)
br label %9
7: ; preds = %3
%8 = tail call i32 @cftbsub(i32 %0, double* %2)
br label %9
9: ; preds = %7, %5
ret void
}