xunge/DecIR huggingface dataset:
void termop_indexrev(struct ansiseq *s) {
  tnc_log_log(
      7, 4, -1,
      "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
      "2022-01-22/02-19-57/repos/fstd/telnetcat/refs/heads/devel/src/xterm.c",
      338, __func__, "unhandled");
  ansiseq_dump(s);
}


x86 assembly (clang, -O0):
<termop_indexrev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x7,%edi
mov    $0x4,%esi
mov    $0xffffffff,%edx
lea    0xebe(%rip),%rcx
mov    $0x152,%r8d
lea    0xf37(%rip),%r9
lea    0xf40(%rip),%rax
mov    %rax,(%rsp)
mov    $0x0,%al
call   1030 <tnc_log_log@plt>
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <ansiseq_dump@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<termop_indexrev>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0xf67(%rip),%rax
mov    %rax,(%rsp)
lea    0xec6(%rip),%rcx
lea    0xf45(%rip),%r9
mov    $0x7,%edi
mov    $0x4,%esi
mov    $0xffffffff,%edx
mov    $0x152,%r8d
xor    %eax,%eax
call   1030 <tnc_log_log@plt>
mov    %rbx,%rdi
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1040 <ansiseq_dump@plt>

LLVM IR (-O0):
%struct.ansiseq = type opaque
@.str = [134 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/fstd/telnetcat/refs/heads/devel/src/xterm.c\00"
@__func__.termop_indexrev = [16 x i8] c"termop_indexrev\00"
@.str.1 = [10 x i8] c"unhandled\00"
define void @termop_indexrev(%struct.ansiseq* %0) {
%2 = alloca %struct.ansiseq*
store %struct.ansiseq* %0, %struct.ansiseq** %2
%3 = call i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @tnc_log_log to i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...)*)(i32 7, i32 4, i32 -1, i8* getelementptr inbounds ([134 x i8], [134 x i8]* @.str, i64 0, i64 0), i32 338, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @__func__.termop_indexrev, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%4 = load %struct.ansiseq*, %struct.ansiseq** %2
%5 = call i32 (%struct.ansiseq*, ...) bitcast (i32 (...)* @ansiseq_dump to i32 (%struct.ansiseq*, ...)*)(%struct.ansiseq* %4)
ret void
}

LLVM IR (-O2):
%struct.ansiseq = type opaque
@.str = [134 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/fstd/telnetcat/refs/heads/devel/src/xterm.c\00"
@__func__.termop_indexrev = [16 x i8] c"termop_indexrev\00"
@.str.1 = [10 x i8] c"unhandled\00"
define void @termop_indexrev(%struct.ansiseq* %0) {
%2 = tail call i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @tnc_log_log to i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...)*)(i32 7, i32 4, i32 -1, i8* getelementptr inbounds ([134 x i8], [134 x i8]* @.str, i64 0, i64 0), i32 338, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @__func__.termop_indexrev, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 (%struct.ansiseq*, ...) bitcast (i32 (...)* @ansiseq_dump to i32 (%struct.ansiseq*, ...)*)(%struct.ansiseq* %0)
ret void
}
int ascending(int num0, int num1) { return num0 > num1; }


x86 assembly (clang, -O0):
<ascending>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ascending>:
xor    %eax,%eax
cmp    %esi,%edi
setg   %al
ret

LLVM IR (-O0):
define i32 @ascending(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @ascending(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void onKeyboard(unsigned char key, int x, int y) {
  switch (key) {
  case 27:
    exit(0);
    break;
  default:
    break;
  }
}


x86 assembly (clang, -O0):
<onKeyboard>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x1(%rbp),%al
sub    $0x1b,%al
jne    113b <onKeyboard+0x2b>
jmp    1134 <onKeyboard+0x24>
xor    %edi,%edi
call   1030 <exit@plt>
jmp    1140 <onKeyboard+0x30>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<onKeyboard>:
cmp    $0x1b,%dil
je     1117 <onKeyboard+0x7>
ret
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @onKeyboard(i8 zeroext %0, i32 %1, i32 %2) {
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
store i8 %0, i8* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
switch i32 %8, label %11 [
i32 27, label %9
]
9: ; preds = %3
%10 = call i32 @exit(i32 0)
unreachable
11: ; preds = %3
br label %12
12: ; preds = %11
ret void
}

LLVM IR (-O2):
define void @onKeyboard(i8 zeroext %0, i32 %1, i32 %2) {
%4 = icmp eq i8 %0, 27
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 @exit(i32 0)
unreachable
7: ; preds = %3
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;

/* Variables and functions */
void LCD_SetBacklight(uint8_t backlight) {
  if (backlight) {
    (*(volatile unsigned long *)(0x3FFFC000 + 0x18)) = (1 << 11);
  } else {
    (*(volatile unsigned long *)(0x3FFFC000 + 0x1C)) = (1 << 11);
  }
}


x86 assembly (clang, -O0):
<LCD_SetBacklight>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1124 <LCD_SetBacklight+0x24>
mov    $0x3fffc018,%eax
movq   $0x800,(%rax)
jmp    1130 <LCD_SetBacklight+0x30>
mov    $0x3fffc01c,%eax
movq   $0x800,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCD_SetBacklight>:
xor    %eax,%eax
test   %rdi,%rdi
sete   %al
movq   $0x800,0x3fffc018(,%rax,4)
ret

LLVM IR (-O0):
define void @LCD_SetBacklight(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
store volatile i64 2048, i64* inttoptr (i64 1073725464 to i64*)
br label %7
6: ; preds = %1
store volatile i64 2048, i64* inttoptr (i64 1073725468 to i64*)
br label %7
7: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
define void @LCD_SetBacklight(i64 %0) {
%2 = icmp eq i64 %0, 0
%3 = select i1 %2, i64* inttoptr (i64 1073725468 to i64*), i64* inttoptr (i64 1073725464 to i64*)
store volatile i64 2048, i64* %3
ret void
}
/* Variables and functions */
int _mkdir(char const *);
int util_mkdir(const char *path) { return _mkdir(path); }


x86 assembly (clang, -O0):
<util_mkdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_mkdir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_mkdir>:
jmp    1030 <_mkdir@plt>

LLVM IR (-O0):
define i32 @util_mkdir(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @_mkdir(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @util_mkdir(i8* %0) {
%2 = tail call i32 @_mkdir(i8* %0)
ret i32 %2
}
int is_dotdot(const char *name) {
  if (name[0] == '.') {
    switch (name[1]) {
    case '\0':
      return 1;
    case '.':
      return name[2] == '\0';
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<is_dotdot>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2e,%eax
jne    116d <is_dotdot+0x6d>
mov    -0x10(%rbp),%rax
movsbl 0x1(%rax),%eax
mov    %eax,-0x14(%rbp)
test   %eax,%eax
je     1141 <is_dotdot+0x41>
jmp    1130 <is_dotdot+0x30>
mov    -0x14(%rbp),%eax
sub    $0x2e,%eax
je     114d <is_dotdot+0x4d>
jmp    1168 <is_dotdot+0x68>
movl   $0x1,-0x4(%rbp)
jmp    1174 <is_dotdot+0x74>
mov    -0x10(%rbp),%rax
movsbl 0x2(%rax),%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    1174 <is_dotdot+0x74>
jmp    116d <is_dotdot+0x6d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_dotdot>:
cmpb   $0x2e,(%rdi)
jne    111c <is_dotdot+0x1c>
movsbl 0x1(%rdi),%eax
test   %eax,%eax
je     111f <is_dotdot+0x1f>
cmp    $0x2e,%eax
jne    111c <is_dotdot+0x1c>
xor    %eax,%eax
cmpb   $0x0,0x2(%rdi)
sete   %al
ret
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_dotdot(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 46
br i1 %8, label %9, label %23
9: ; preds = %1
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
switch i32 %13, label %22 [
i32 0, label %14
i32 46, label %15
]
14: ; preds = %9
store i32 1, i32* %2
br label %24
15: ; preds = %9
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i64 2
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 0
%21 = zext i1 %20 to i32
store i32 %21, i32* %2
br label %24
22: ; preds = %9
br label %23
23: ; preds = %22, %1
store i32 0, i32* %2
br label %24
24: ; preds = %23, %15, %14
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @is_dotdot(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 46
br i1 %3, label %4, label %13
4: ; preds = %1
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
switch i32 %7, label %13 [
i32 0, label %14
i32 46, label %8
]
8: ; preds = %4
%9 = getelementptr inbounds i8, i8* %0, i64 2
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
%12 = zext i1 %11 to i32
br label %14
13: ; preds = %4, %1
br label %14
14: ; preds = %4, %13, %8
%15 = phi i32 [ 0, %13 ], [ %12, %8 ], [ 1, %4 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ app_init();
int /*<<< orphan*/ buf_destroy();
int /*<<< orphan*/ buf_init();
int /*<<< orphan*/ getter();
int main(int argc, char *argv[]) {
  app_init();
  buf_init();
  getter();
  buf_destroy();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <app_init@plt>
mov    $0x0,%al
call   1040 <buf_init@plt>
mov    $0x0,%al
call   1050 <getter@plt>
mov    $0x0,%al
call   1060 <buf_destroy@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <app_init@plt>
xor    %eax,%eax
call   1040 <buf_init@plt>
xor    %eax,%eax
call   1050 <getter@plt>
xor    %eax,%eax
call   1060 <buf_destroy@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @app_init()
%7 = call i32 (...) @buf_init()
%8 = call i32 (...) @getter()
%9 = call i32 (...) @buf_destroy()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @app_init()
%4 = tail call i32 (...) @buf_init()
%5 = tail call i32 (...) @getter()
%6 = tail call i32 (...) @buf_destroy()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void speex_free(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<speex_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<speex_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @speex_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @speex_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
const char *librtaAbout_LongNotice(void) {
  return "Copyright (c) 2017 Cisco and/or its affiliates.\nLicensed under the "
         "Apache License, Version 2.0 (the \"License\");\nyou may not use this "
         "file except in compliance with the License.\nYou may obtain a copy "
         "of the License at:\n\n    "
         "http://www.apache.org/licenses/LICENSE-2.0\n\nUnless required by "
         "applicable law or agreed to in writing, software\ndistributed under "
         "the License is distributed on an \"AS IS\" BASIS,\nWITHOUT "
         "WARRANTIES OR CONDITIONS OF ANY KIND, either express or "
         "implied.\nSee the License for the specific language governing "
         "permissions and\nlimitations under the License.\n";
}


x86 assembly (clang, -O0):
<librtaAbout_LongNotice>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<librtaAbout_LongNotice>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [574 x i8] c"Copyright (c) 2017 Cisco and/or its affiliates.\0ALicensed under the Apache License, Version 2.0 (the \22License\22);\0Ayou may not use this file except in compliance with the License.\0AYou may obtain a copy of the License at:\0A\0A http://www.apache.org/licenses/LICENSE-2.0\0A\0AUnless required by applicable law or agreed to in writing, software\0Adistributed under the License is distributed on an \22AS IS\22 BASIS,\0AWITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\0ASee the License for the specific language governing permissions and\0Alimitations under the License.\0A\00"
define i8* @librtaAbout_LongNotice() {
ret i8* getelementptr inbounds ([574 x i8], [574 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [574 x i8] c"Copyright (c) 2017 Cisco and/or its affiliates.\0ALicensed under the Apache License, Version 2.0 (the \22License\22);\0Ayou may not use this file except in compliance with the License.\0AYou may obtain a copy of the License at:\0A\0A http://www.apache.org/licenses/LICENSE-2.0\0A\0AUnless required by applicable law or agreed to in writing, software\0Adistributed under the License is distributed on an \22AS IS\22 BASIS,\0AWITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\0ASee the License for the specific language governing permissions and\0Alimitations under the License.\0A\00"
define i8* @librtaAbout_LongNotice() {
ret i8* getelementptr inbounds ([574 x i8], [574 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int putc_unlocked(char, int /*<<< orphan*/ *);
int fputchar(FILE *out, char outchar) { return putc_unlocked(outchar, out); }


x86 assembly (clang, -O0):
<fputchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
mov    -0x8(%rbp),%rsi
movsbl %al,%edi
call   1030 <putc_unlocked@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fputchar>:
mov    %rdi,%rax
mov    %esi,%edi
mov    %rax,%rsi
jmp    1030 <putc_unlocked@plt>

LLVM IR (-O0):
define i32 @fputchar(i32* %0, i8 signext %1) {
%3 = alloca i32*
%4 = alloca i8
store i32* %0, i32** %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i32*, i32** %3
%7 = call i32 @putc_unlocked(i8 signext %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @fputchar(i32* nocapture %0, i8 signext %1) {
%3 = tail call i32 @putc_unlocked(i8 signext %1, i32* %0)
ret i32 %3
}
int f(int a, int b) {
  int c = a * 2;
  c += b;
  return c;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    (%rsi,%rdi,2),%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = mul nsw i32 %6, 2
store i32 %7, i32* %5
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = add nsw i32 %9, %8
store i32 %10, i32* %5
%11 = load i32, i32* %5
ret i32 %11
}

LLVM IR (-O2):
define i32 @f(i32 %0, i32 %1) {
%3 = shl nsw i32 %0, 1
%4 = add nsw i32 %3, %1
ret i32 %4
}
void RGB565ToARGBRow_C() {}


x86 assembly (clang, -O0):
<RGB565ToARGBRow_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RGB565ToARGBRow_C>:
ret

LLVM IR (-O0):
define void @RGB565ToARGBRow_C() {
ret void
}

LLVM IR (-O2):
define void @RGB565ToARGBRow_C() {
ret void
}
double Fraction_of_Day(int hr, int mi, int se) {
  return ((hr + (mi + se / 60.0) / 60.0) / 24.0);
}


x86 assembly (clang, -O0):
<Fraction_of_Day>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
cvtsi2sdl -0x8(%rbp),%xmm1
cvtsi2sdl -0xc(%rbp),%xmm2
movsd  0xee4(%rip),%xmm3
divsd  %xmm3,%xmm2
addsd  %xmm2,%xmm1
movsd  0xed4(%rip),%xmm2
divsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
movsd  0xebc(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Fraction_of_Day>:
cvtsi2sd %edi,%xmm1
cvtsi2sd %esi,%xmm2
cvtsi2sd %edx,%xmm0
movsd  0xeec(%rip),%xmm3
divsd  %xmm3,%xmm0
addsd  %xmm2,%xmm0
divsd  %xmm3,%xmm0
addsd  %xmm1,%xmm0
divsd  0xedc(%rip),%xmm0
ret

LLVM IR (-O0):
define double @Fraction_of_Day(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = sitofp i32 %7 to double
%9 = load i32, i32* %5
%10 = sitofp i32 %9 to double
%11 = load i32, i32* %6
%12 = sitofp i32 %11 to double
%13 = fdiv double %12, 6.000000e+01
%14 = fadd double %10, %13
%15 = fdiv double %14, 6.000000e+01
%16 = fadd double %8, %15
%17 = fdiv double %16, 2.400000e+01
ret double %17
}

LLVM IR (-O2):
define double @Fraction_of_Day(i32 %0, i32 %1, i32 %2) {
%4 = sitofp i32 %0 to double
%5 = sitofp i32 %1 to double
%6 = sitofp i32 %2 to double
%7 = fdiv double %6, 6.000000e+01
%8 = fadd double %7, %5
%9 = fdiv double %8, 6.000000e+01
%10 = fadd double %9, %4
%11 = fdiv double %10, 2.400000e+01
ret double %11
}
/* Type definitions */
struct io_file {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __iofile_close(struct io_file *);
int /*<<< orphan*/ free(struct io_file *);
void iofile_close(struct io_file *mf) {
  if (mf == NULL)
    return;
  __iofile_close(mf);
  free(mf);
}


x86 assembly (clang, -O0):
<iofile_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113c <iofile_close+0x1c>
jmp    114e <iofile_close+0x2e>
mov    -0x8(%rbp),%rdi
call   1040 <__iofile_close@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iofile_close>:
test   %rdi,%rdi
je     1137 <iofile_close+0x17>
push   %rbx
mov    %rdi,%rbx
call   1040 <__iofile_close@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
%struct.io_file = type { i32 }
define void @iofile_close(%struct.io_file* %0) {
%2 = alloca %struct.io_file*
store %struct.io_file* %0, %struct.io_file** %2
%3 = load %struct.io_file*, %struct.io_file** %2
%4 = icmp eq %struct.io_file* %3, null
br i1 %4, label %5, label %6
5: ; preds = %1
br label %11
6: ; preds = %1
%7 = load %struct.io_file*, %struct.io_file** %2
%8 = call i32 @__iofile_close(%struct.io_file* %7)
%9 = load %struct.io_file*, %struct.io_file** %2
%10 = call i32 @free(%struct.io_file* %9)
br label %11
11: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
%struct.io_file = type { i32 }
define void @iofile_close(%struct.io_file* %0) {
%2 = icmp eq %struct.io_file* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i32 @__iofile_close(%struct.io_file* %0)
%5 = tail call i32 @free(%struct.io_file* %0)
br label %6
6: ; preds = %1, %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int /*<<< orphan*/ SIG_SETMASK;
scalar_t__ sigaddset(int /*<<< orphan*/ *, int);
int sigprocmask(int /*<<< orphan*/, int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int sighold(int sig) {
  sigset_t set;
  sigprocmask(SIG_SETMASK, NULL, &set);
  if (sigaddset(&set, sig) < 0)
    return -1;
  return sigprocmask(SIG_SETMASK, &set, NULL);
}


x86 assembly (clang, -O0):
<sighold>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
xor    %eax,%eax
mov    %eax,%esi
lea    -0xc(%rbp),%rdx
call   1030 <sigprocmask@plt>
mov    -0x8(%rbp),%esi
lea    -0xc(%rbp),%rdi
call   1040 <sigaddset@plt>
cmp    $0x0,%rax
jge    1163 <sighold+0x43>
movl   $0xffffffff,-0x4(%rbp)
jmp    117c <sighold+0x5c>
mov    0x2e7e(%rip),%rax
mov    (%rax),%edi
lea    -0xc(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <sigprocmask@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sighold>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
mov    0x2eb6(%rip),%r15
mov    (%r15),%edi
lea    0xc(%rsp),%r14
xor    %esi,%esi
mov    %r14,%rdx
call   1030 <sigprocmask@plt>
mov    %r14,%rdi
mov    %ebx,%esi
call   1040 <sigaddset@plt>
test   %rax,%rax
js     1164 <sighold+0x44>
mov    (%r15),%edi
lea    0xc(%rsp),%rsi
xor    %edx,%edx
call   1030 <sigprocmask@plt>
jmp    1169 <sighold+0x49>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@SIG_SETMASK = global i32 0
define i32 @sighold(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* @SIG_SETMASK
%6 = call i32 @sigprocmask(i32 %5, i32* null, i32* %4)
%7 = load i32, i32* %3
%8 = call i64 @sigaddset(i32* %4, i32 %7)
%9 = icmp slt i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 -1, i32* %2
br label %14
11: ; preds = %1
%12 = load i32, i32* @SIG_SETMASK
%13 = call i32 @sigprocmask(i32 %12, i32* %4, i32* null)
store i32 %13, i32* %2
br label %14
14: ; preds = %11, %10
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
@SIG_SETMASK = global i32 0
define i32 @sighold(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = load i32, i32* @SIG_SETMASK
%5 = call i32 @sigprocmask(i32 %4, i32* null, i32* %2)
%6 = call i64 @sigaddset(i32* %2, i32 %0)
%7 = icmp slt i64 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %1
%9 = load i32, i32* @SIG_SETMASK
%10 = call i32 @sigprocmask(i32 %9, i32* %2, i32* null)
br label %11
11: ; preds = %1, %8
%12 = phi i32 [ %10, %8 ], [ -1, %1 ]
ret i32 %12
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t Ch(uint64_t x, uint64_t y, uint64_t z) { return z ^ (x & (y ^ z)); }


x86 assembly (clang, -O0):
<Ch>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x4(%rbp),%ecx
mov    -0x8(%rbp),%edx
xor    -0xc(%rbp),%edx
and    %edx,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Ch>:
mov    %esi,%eax
xor    %edx,%eax
and    %edi,%eax
xor    %edx,%eax
ret

LLVM IR (-O0):
define i32 @Ch(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = xor i32 %9, %10
%12 = and i32 %8, %11
%13 = xor i32 %7, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @Ch(i32 %0, i32 %1, i32 %2) {
%4 = xor i32 %2, %1
%5 = and i32 %4, %0
%6 = xor i32 %5, %2
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ I2C_I2CStop();
void I2C_ScbModeStop(void) { I2C_I2CStop(); }


x86 assembly (clang, -O0):
<I2C_ScbModeStop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <I2C_I2CStop@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2C_ScbModeStop>:
xor    %eax,%eax
jmp    1030 <I2C_I2CStop@plt>

LLVM IR (-O0):
define void @I2C_ScbModeStop() {
%1 = call i32 (...) @I2C_I2CStop()
ret void
}

LLVM IR (-O2):
define void @I2C_ScbModeStop() {
%1 = tail call i32 (...) @I2C_I2CStop()
ret void
}
/* Type definitions */
struct remove_args_info {
  int dummy;
};

/* Variables and functions */
int remove_cmdline_parser2(int, char **, struct remove_args_info *,
                           int /*<<< orphan*/, int, int);
int remove_cmdline_parser(int argc, char **argv,
                          struct remove_args_info *args_info) {
  return remove_cmdline_parser2(argc, argv, args_info, 0, 1, 1);
}


x86 assembly (clang, -O0):
<remove_cmdline_parser>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
mov    $0x1,%r9d
mov    %r9d,%r8d
call   1030 <remove_cmdline_parser2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_cmdline_parser>:
xor    %ecx,%ecx
mov    $0x1,%r8d
mov    $0x1,%r9d
jmp    1030 <remove_cmdline_parser2@plt>

LLVM IR (-O0):
%struct.remove_args_info = type { i32 }
define i32 @remove_cmdline_parser(i32 %0, i8** %1, %struct.remove_args_info* %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca %struct.remove_args_info*
store i32 %0, i32* %4
store i8** %1, i8*** %5
store %struct.remove_args_info* %2, %struct.remove_args_info** %6
%7 = load i32, i32* %4
%8 = load i8**, i8*** %5
%9 = load %struct.remove_args_info*, %struct.remove_args_info** %6
%10 = call i32 @remove_cmdline_parser2(i32 %7, i8** %8, %struct.remove_args_info* %9, i32 0, i32 1, i32 1)
ret i32 %10
}

LLVM IR (-O2):
%struct.remove_args_info = type { i32 }
define i32 @remove_cmdline_parser(i32 %0, i8** %1, %struct.remove_args_info* %2) {
%4 = tail call i32 @remove_cmdline_parser2(i32 %0, i8** %1, %struct.remove_args_info* %2, i32 0, i32 1, i32 1)
ret i32 %4
}
void dummyvideo_ViWidthChanged(void) {}


x86 assembly (clang, -O0):
<dummyvideo_ViWidthChanged>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummyvideo_ViWidthChanged>:
ret

LLVM IR (-O0):
define void @dummyvideo_ViWidthChanged() {
ret void
}

LLVM IR (-O2):
define void @dummyvideo_ViWidthChanged() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int read_from_socket(int, char *);
void *recieve(void *args) {
  char buf[256];
  int sockfd = (int)args;
  int d;
  while (1) {
    d = read_from_socket(sockfd, buf);
    if (d > 0)
      printf("			<< %s\n", buf);
  }
  return NULL;
}


x86 assembly (clang, -O0):
<recieve>:
push   %rbp
mov    %rsp,%rbp
sub    $0x120,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,-0x114(%rbp)
mov    -0x114(%rbp),%edi
lea    -0x110(%rbp),%rsi
call   1040 <read_from_socket@plt>
mov    %eax,-0x118(%rbp)
cmpl   $0x0,-0x118(%rbp)
jle    1171 <recieve+0x51>
lea    -0x110(%rbp),%rsi
lea    0xe94(%rip),%rdi
call   1030 <printf@plt>
jmp    1139 <recieve+0x19>

x86 assembly (clang, -O2):
<recieve>:
push   %r15
push   %r14
push   %rbx
sub    $0x100,%rsp
mov    %rdi,%rbx
mov    %rsp,%r14
lea    0xec7(%rip),%r15
nopl   0x0(%rax)
mov    %ebx,%edi
mov    %r14,%rsi
call   1040 <read_from_socket@plt>
test   %eax,%eax
jle    1140 <recieve+0x20>
mov    %r15,%rdi
mov    %r14,%rsi
call   1030 <printf@plt>
jmp    1140 <recieve+0x20>

LLVM IR (-O0):
@.str = [10 x i8] c"\09\09\09<< %s\0A\00"
define i8* @recieve(i8* %0) {
%2 = alloca i8*
%3 = alloca [256 x i8]
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %2
%6 = load i8*, i8** %2
%7 = ptrtoint i8* %6 to i32
store i32 %7, i32* %4
br label %8
8: ; preds = %1, %17
%9 = load i32, i32* %4
%10 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%11 = call i32 @read_from_socket(i32 %9, i8* %10)
store i32 %11, i32* %5
%12 = load i32, i32* %5
%13 = icmp sgt i32 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %8
%15 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%16 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %15)
br label %17
17: ; preds = %14, %8
br label %8
}

LLVM IR (-O2):
@.str = [10 x i8] c"\09\09\09<< %s\0A\00"
define noalias i8* @recieve(i8* %0) {
%2 = alloca [256 x i8]
%3 = getelementptr inbounds [256 x i8], [256 x i8]* %2, i64 0, i64 0
%4 = ptrtoint i8* %0 to i64
%5 = trunc i64 %4 to i32
br label %6
6: ; preds = %11, %1
%7 = call i32 @read_from_socket(i32 %5, i8* %3)
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %3)
br label %11
11: ; preds = %9, %6
br label %6
}
int Volta(int direcao) {
  if (direcao == 8)
    return 4;
  if (direcao == 4)
    return 8;
  if (direcao == 2)
    return 1;
  if (direcao == 1)
    return 2;
}


x86 assembly (clang, -O0):
<Volta>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x8,-0x8(%rbp)
jne    111d <Volta+0x1d>
movl   $0x4,-0x4(%rbp)
jmp    115a <Volta+0x5a>
cmpl   $0x4,-0x8(%rbp)
jne    1133 <Volta+0x33>
movl   $0x8,-0x4(%rbp)
jmp    115a <Volta+0x5a>
cmpl   $0x2,-0x8(%rbp)
jne    1149 <Volta+0x49>
movl   $0x1,-0x4(%rbp)
jmp    115a <Volta+0x5a>
cmpl   $0x1,-0x8(%rbp)
jne    115a <Volta+0x5a>
movl   $0x2,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Volta>:
add    $0xffffffff,%edi
mov    $0x4,%eax
cmp    $0x3,%edi
ja     111a <Volta+0x1a>
movslq %edi,%rax
lea    0xee9(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @Volta(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 8
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 4, i32* %2
br label %19
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 4
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 8, i32* %2
br label %19
11: ; preds = %7
%12 = load i32, i32* %3
%13 = icmp eq i32 %12, 2
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 1, i32* %2
br label %19
15: ; preds = %11
%16 = load i32, i32* %3
%17 = icmp eq i32 %16, 1
br i1 %17, label %18, label %19
18: ; preds = %15
store i32 2, i32* %2
br label %19
19: ; preds = %6, %10, %14, %18, %15
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
@switch.table.Volta = [4 x i32] [i32 2, i32 1, i32 4, i32 8]
define i32 @Volta(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 4
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [4 x i32], [4 x i32]* @switch.table.Volta, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 4, %1 ], [ %7, %4 ]
ret i32 %9
}
void trigger_voice(int addr) {}


x86 assembly (clang, -O0):
<trigger_voice>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<trigger_voice>:
ret

LLVM IR (-O0):
define void @trigger_voice(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @trigger_voice(i32 %0) {
ret void
}
int lingot_audio_alsa_register(void) { return 0; }


x86 assembly (clang, -O0):
<lingot_audio_alsa_register>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lingot_audio_alsa_register>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @lingot_audio_alsa_register() {
ret i32 0
}

LLVM IR (-O2):
define i32 @lingot_audio_alsa_register() {
ret i32 0
}
void bs2login_is_not_here() {}


x86 assembly (clang, -O0):
<bs2login_is_not_here>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bs2login_is_not_here>:
ret

LLVM IR (-O0):
define void @bs2login_is_not_here() {
ret void
}

LLVM IR (-O2):
define void @bs2login_is_not_here() {
ret void
}
/* Variables and functions */
unsigned int load_runtime_reg(unsigned int, int);
int /*<<< orphan*/ store_runtime_reg(unsigned int, int, unsigned int);
void I2OFIFOOverflowIntDisable(unsigned int eumbbar) {
  unsigned int val = load_runtime_reg(eumbbar, 0x0104);
  val |= 0x00000180;
  store_runtime_reg(eumbbar, 0x0104, val);
}


x86 assembly (clang, -O0):
<I2OFIFOOverflowIntDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x104,%esi
call   1040 <load_runtime_reg@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
or     $0x180,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    $0x104,%esi
call   1030 <store_runtime_reg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2OFIFOOverflowIntDisable>:
push   %rbx
mov    %edi,%ebx
mov    $0x104,%esi
call   1040 <load_runtime_reg@plt>
or     $0x180,%eax
mov    %ebx,%edi
mov    $0x104,%esi
mov    %eax,%edx
pop    %rbx
jmp    1030 <store_runtime_reg@plt>

LLVM IR (-O0):
define void @I2OFIFOOverflowIntDisable(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @load_runtime_reg(i32 %4, i32 260)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = or i32 %6, 384
store i32 %7, i32* %3
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = call i32 @store_runtime_reg(i32 %8, i32 260, i32 %9)
ret void
}

LLVM IR (-O2):
define void @I2OFIFOOverflowIntDisable(i32 %0) {
%2 = tail call i32 @load_runtime_reg(i32 %0, i32 260)
%3 = or i32 %2, 384
%4 = tail call i32 @store_runtime_reg(i32 %0, i32 260, i32 %3)
ret void
}
void free_2d(char **arr, int n) {
  int i;
  for (i = 0; i < n; i++)
    free(arr[i]);
  free(arr);
}


x86 assembly (clang, -O0):
<free_2d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1151 <free_2d+0x41>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <free_2d+0x16>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_2d>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
test   %esi,%esi
jle    1142 <free_2d+0x32>
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <free@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <free_2d+0x20>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_2d(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
%5 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %16, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i8**, i8*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8*, i8** %11, i64 %13
%15 = load i8*, i8** %14
br label %16
16: ; preds = %10
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 1
store i32 %18, i32* %5
br label %6
19: ; preds = %6
%20 = load i8**, i8*** %3
%21 = bitcast i8** %20 to i8*
ret void
}

LLVM IR (-O2):
define void @free_2d(i8** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %12
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %10, %6 ]
%8 = getelementptr inbounds i8*, i8** %0, i64 %7
%9 = load i8*, i8** %8
tail call void @free(i8* %9)
%10 = add nuw nsw i64 %7, 1
%11 = icmp eq i64 %10, %5
br i1 %11, label %12, label %6
12: ; preds = %6, %2
%13 = bitcast i8** %0 to i8*
tail call void @free(i8* %13)
ret void
}
short foo(a, c)
short a;
char c;
{ return 3; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%cx
mov    %sil,%al
mov    %cx,-0x2(%rbp)
mov    %al,-0x3(%rbp)
mov    $0x3,%ax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    $0x3,%ax
ret

LLVM IR (-O0):
define signext i16 @foo(i32 %0, i32 %1) {
%3 = alloca i16
%4 = alloca i8
%5 = trunc i32 %0 to i16
%6 = trunc i32 %1 to i8
store i16 %5, i16* %3
store i8 %6, i8* %4
ret i16 3
}

LLVM IR (-O2):
define signext i16 @foo(i32 %0, i32 %1) {
ret i16 3
}
void enable_interrupts(void) { __asm__ volatile("sti"); }


x86 assembly (clang, -O0):
<enable_interrupts>:
push   %rbp
mov    %rsp,%rbp
sti
pop    %rbp
ret

x86 assembly (clang, -O2):
<enable_interrupts>:
sti
ret

LLVM IR (-O0):
define void @enable_interrupts() {
ret void
}

LLVM IR (-O2):
define void @enable_interrupts() {
tail call void asm sideeffect "sti", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
bailout() {
  fprintf(stderr, "tbl quits\n");
  exit(1);
}


x86 assembly (clang, -O0):
<bailout>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<bailout>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [11 x i8] c"tbl quits\0A\00"
define i32 @bailout() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [11 x i8] c"tbl quits\0A\00"
define i32 @bailout() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
signed precise_fraction_sexp(signed v) { return v << 16; }


x86 assembly (clang, -O0):
<precise_fraction_sexp>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x10,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<precise_fraction_sexp>:
mov    %edi,%eax
shl    $0x10,%eax
ret

LLVM IR (-O0):
define i32 @precise_fraction_sexp(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 16
ret i32 %4
}

LLVM IR (-O2):
define i32 @precise_fraction_sexp(i32 %0) {
%2 = shl i32 %0, 16
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ terminal_puts(char *);
void ata_init() { terminal_puts("ata_init();\n"); }


x86 assembly (clang, -O0):
<ata_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <terminal_puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ata_init>:
lea    0xee9(%rip),%rdi
jmp    1030 <terminal_puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"ata_init();\0A\00"
define void @ata_init() {
%1 = call i32 @terminal_puts(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"ata_init();\0A\00"
define void @ata_init() {
%1 = tail call i32 @terminal_puts(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ flashrom_chip_write(unsigned long, int);
int /*<<< orphan*/ flashrom_wait_toggle_bit(unsigned long);
void flashrom_sector_erase(unsigned long address) {
  flashrom_chip_write(0x5555, 0xAA);
  flashrom_chip_write(0x2AAA, 0x55);
  flashrom_chip_write(0x5555, 0x80);
  flashrom_chip_write(0x5555, 0xAA);
  flashrom_chip_write(0x2AAA, 0x55);
  flashrom_chip_write(address, 0x30);
  flashrom_wait_toggle_bit(address);
}


x86 assembly (clang, -O0):
<flashrom_sector_erase>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x5555,%edi
mov    $0xaa,%esi
call   1030 <flashrom_chip_write@plt>
mov    $0x2aaa,%edi
mov    $0x55,%esi
call   1030 <flashrom_chip_write@plt>
mov    $0x5555,%edi
mov    $0x80,%esi
call   1030 <flashrom_chip_write@plt>
mov    $0x5555,%edi
mov    $0xaa,%esi
call   1030 <flashrom_chip_write@plt>
mov    $0x2aaa,%edi
mov    $0x55,%esi
call   1030 <flashrom_chip_write@plt>
mov    -0x8(%rbp),%rdi
mov    $0x30,%esi
call   1030 <flashrom_chip_write@plt>
mov    -0x8(%rbp),%rdi
call   1040 <flashrom_wait_toggle_bit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flashrom_sector_erase>:
push   %rbx
mov    %rdi,%rbx
mov    $0x5555,%edi
mov    $0xaa,%esi
call   1030 <flashrom_chip_write@plt>
mov    $0x2aaa,%edi
mov    $0x55,%esi
call   1030 <flashrom_chip_write@plt>
mov    $0x5555,%edi
mov    $0x80,%esi
call   1030 <flashrom_chip_write@plt>
mov    $0x5555,%edi
mov    $0xaa,%esi
call   1030 <flashrom_chip_write@plt>
mov    $0x2aaa,%edi
mov    $0x55,%esi
call   1030 <flashrom_chip_write@plt>
mov    %rbx,%rdi
mov    $0x30,%esi
call   1030 <flashrom_chip_write@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <flashrom_wait_toggle_bit@plt>

LLVM IR (-O0):
define void @flashrom_sector_erase(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = call i32 @flashrom_chip_write(i64 21845, i32 170)
%4 = call i32 @flashrom_chip_write(i64 10922, i32 85)
%5 = call i32 @flashrom_chip_write(i64 21845, i32 128)
%6 = call i32 @flashrom_chip_write(i64 21845, i32 170)
%7 = call i32 @flashrom_chip_write(i64 10922, i32 85)
%8 = load i64, i64* %2
%9 = call i32 @flashrom_chip_write(i64 %8, i32 48)
%10 = load i64, i64* %2
%11 = call i32 @flashrom_wait_toggle_bit(i64 %10)
ret void
}

LLVM IR (-O2):
define void @flashrom_sector_erase(i64 %0) {
%2 = tail call i32 @flashrom_chip_write(i64 21845, i32 170)
%3 = tail call i32 @flashrom_chip_write(i64 10922, i32 85)
%4 = tail call i32 @flashrom_chip_write(i64 21845, i32 128)
%5 = tail call i32 @flashrom_chip_write(i64 21845, i32 170)
%6 = tail call i32 @flashrom_chip_write(i64 10922, i32 85)
%7 = tail call i32 @flashrom_chip_write(i64 %0, i32 48)
%8 = tail call i32 @flashrom_wait_toggle_bit(i64 %0)
ret void
}
void foo(void) {
  const char *s;
  s = __FUNCTION__;
  s = __PRETTY_FUNCTION__;
  s = __extension__ __FUNCTION__;
  s = __extension__ __PRETTY_FUNCTION__;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xeee(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xedf(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xed8(%rip),%rax
mov    %rax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
@__FUNCTION__.foo = [4 x i8] c"foo\00"
@__PRETTY_FUNCTION__.foo = [15 x i8] c"void foo(void)\00"
define void @foo() {
%1 = alloca i8*
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @__FUNCTION__.foo, i64 0, i64 0), i8** %1
store i8* getelementptr inbounds ([15 x i8], [15 x i8]* @__PRETTY_FUNCTION__.foo, i64 0, i64 0), i8** %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @__FUNCTION__.foo, i64 0, i64 0), i8** %1
store i8* getelementptr inbounds ([15 x i8], [15 x i8]* @__PRETTY_FUNCTION__.foo, i64 0, i64 0), i8** %1
ret void
}

LLVM IR (-O2):
define void @foo() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ hoc_pushx(int);
int /*<<< orphan*/ hoc_ret();
hoc_ploty() {
  hoc_ret();
  hoc_pushx(0.);
}


x86 assembly (clang, -O0):
<hoc_ploty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <hoc_ret@plt>
xor    %edi,%edi
call   1040 <hoc_pushx@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hoc_ploty>:
push   %rax
xor    %eax,%eax
call   1030 <hoc_ret@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <hoc_pushx@plt>

LLVM IR (-O0):
define i32 @hoc_ploty() {
%1 = alloca i32
%2 = call i32 (...) @hoc_ret()
%3 = call i32 @hoc_pushx(i32 0)
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @hoc_ploty() {
%1 = tail call i32 (...) @hoc_ret()
%2 = tail call i32 @hoc_pushx(i32 0)
ret i32 undef
}
int hash_ptr(void *ptr) {
  long long hash_long = (long long)ptr;
  int hash_int = (int)hash_long ^ (int)(hash_long << sizeof(int));
  return hash_int;
}


x86 assembly (clang, -O0):
<hash_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x10(%rbp),%rcx
shl    $0x4,%rcx
xor    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_ptr>:
mov    %edi,%eax
shl    $0x4,%eax
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @hash_ptr(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = ptrtoint i8* %5 to i64
store i64 %6, i64* %3
%7 = load i64, i64* %3
%8 = trunc i64 %7 to i32
%9 = load i64, i64* %3
%10 = shl i64 %9, 4
%11 = trunc i64 %10 to i32
%12 = xor i32 %8, %11
store i32 %12, i32* %4
%13 = load i32, i32* %4
ret i32 %13
}

LLVM IR (-O2):
define i32 @hash_ptr(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i32
%4 = shl i32 %3, 4
%5 = xor i32 %4, %3
ret i32 %5
}
/* Variables and functions */
char *string_escape_character_array(char *, char *, char *);
char *string_escape_quote(char *destination, char *source) {
  return string_escape_character_array(destination, source, "'");
}


x86 assembly (clang, -O0):
<string_escape_quote>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    0xed1(%rip),%rdx
call   1030 <string_escape_character_array@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_escape_quote>:
lea    0xee9(%rip),%rdx
jmp    1030 <string_escape_character_array@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"'\00"
define i8* @string_escape_quote(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @string_escape_character_array(i8* %5, i8* %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i8* %7
}

LLVM IR (-O2):
@.str = [2 x i8] c"'\00"
define i8* @string_escape_quote(i8* %0, i8* %1) {
%3 = tail call i8* @string_escape_character_array(i8* %0, i8* %1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i8* %3
}
long double f_ld(long double x) { return x; }


x86 assembly (clang, -O0):
<f_ld>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_ld>:
fldt   0x8(%rsp)
ret

LLVM IR (-O0):
define x86_fp80 @f_ld(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
ret x86_fp80 %3
}

LLVM IR (-O2):
define x86_fp80 @f_ld(x86_fp80 returned %0) {
ret x86_fp80 %0
}
const char *loader_HS_get_type(void) { return "HeaderSave"; }


x86 assembly (clang, -O0):
<loader_HS_get_type>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<loader_HS_get_type>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [11 x i8] c"HeaderSave\00"
define i8* @loader_HS_get_type() {
ret i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [11 x i8] c"HeaderSave\00"
define i8* @loader_HS_get_type() {
ret i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int f338(int *);
int f339(int *p) { return f338(p); }


x86 assembly (clang, -O0):
<f339>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f338@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f339>:
jmp    1030 <f338@plt>

LLVM IR (-O0):
define i32 @f339(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f338(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f339(i32* %0) {
%2 = tail call i32 @f338(i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ strcat(char *, char *);
int /*<<< orphan*/ strcpy(char *, char *);
void strcat_Good() {
  char str[8];
  strcpy(str, "abc");
  strcat(str, "defg");
}


x86 assembly (clang, -O0):
<strcat_Good>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
lea    0xecd(%rip),%rsi
call   1030 <strcpy@plt>
lea    -0x8(%rbp),%rdi
lea    0xec1(%rip),%rsi
call   1040 <strcat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcat_Good>:
push   %rbx
sub    $0x10,%rsp
lea    0xed4(%rip),%rsi
lea    0x8(%rsp),%rbx
mov    %rbx,%rdi
call   1030 <strcpy@plt>
lea    0xec4(%rip),%rsi
mov    %rbx,%rdi
call   1040 <strcat@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"abc\00"
@.str.1 = [5 x i8] c"defg\00"
define void @strcat_Good() {
%1 = alloca [8 x i8]
%2 = getelementptr inbounds [8 x i8], [8 x i8]* %1, i64 0, i64 0
%3 = call i32 @strcpy(i8* %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%4 = getelementptr inbounds [8 x i8], [8 x i8]* %1, i64 0, i64 0
%5 = call i32 @strcat(i8* %4, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"abc\00"
@.str.1 = [5 x i8] c"defg\00"
define void @strcat_Good() {
%1 = alloca [8 x i8]
%2 = getelementptr inbounds [8 x i8], [8 x i8]* %1, i64 0, i64 0
%3 = call i32 @strcpy(i8* %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @strcat(i8* %2, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}