xunge/DecIR huggingface dataset:
int count_typenames(char **typenames) {
  if (typenames == 0) {
    return 0;
  }
  int i = 0;
  for (char **name = typenames; *name; ++name) {
    ++i;
  }
  return i;
}


x86 assembly (clang, -O0):
<count_typenames>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    111f <count_typenames+0x1f>
movl   $0x0,-0x4(%rbp)
jmp    115c <count_typenames+0x5c>
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmpq   $0x0,(%rax)
je     1156 <count_typenames+0x56>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x20(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x20(%rbp)
jmp    112e <count_typenames+0x2e>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_typenames>:
xor    %eax,%eax
test   %rdi,%rdi
je     111c <count_typenames+0x1c>
cmpq   $0x0,(%rdi)
je     111c <count_typenames+0x1c>
xor    %eax,%eax
nop
cmpq   $0x0,0x8(%rdi,%rax,8)
lea    0x1(%rax),%rax
jne    1110 <count_typenames+0x10>
ret

LLVM IR (-O0):
define i32 @count_typenames(i8** %0) {
%2 = alloca i32
%3 = alloca i8**
%4 = alloca i32
%5 = alloca i8**
store i8** %0, i8*** %3
%6 = load i8**, i8*** %3
%7 = icmp eq i8** %6, null
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %23
9: ; preds = %1
store i32 0, i32* %4
%10 = load i8**, i8*** %3
store i8** %10, i8*** %5
br label %11
11: ; preds = %18, %9
%12 = load i8**, i8*** %5
%13 = load i8*, i8** %12
%14 = icmp ne i8* %13, null
br i1 %14, label %15, label %21
15: ; preds = %11
%16 = load i32, i32* %4
%17 = add nsw i32 %16, 1
store i32 %17, i32* %4
br label %18
18: ; preds = %15
%19 = load i8**, i8*** %5
%20 = getelementptr inbounds i8*, i8** %19, i32 1
store i8** %20, i8*** %5
br label %11
21: ; preds = %11
%22 = load i32, i32* %4
store i32 %22, i32* %2
br label %23
23: ; preds = %21, %8
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @count_typenames(i8** %0) {
%2 = icmp eq i8** %0, null
br i1 %2, label %13, label %3
3: ; preds = %1
%4 = load i8*, i8** %0
%5 = icmp eq i8* %4, null
br i1 %5, label %13, label %6
6: ; preds = %3, %6
%7 = phi i8** [ %10, %6 ], [ %0, %3 ]
%8 = phi i32 [ %9, %6 ], [ 0, %3 ]
%9 = add nuw nsw i32 %8, 1
%10 = getelementptr inbounds i8*, i8** %7, i64 1
%11 = load i8*, i8** %10
%12 = icmp eq i8* %11, null
br i1 %12, label %13, label %6
13: ; preds = %6, %3, %1
%14 = phi i32 [ 0, %1 ], [ 0, %3 ], [ %9, %6 ]
ret i32 %14
}
void log_printf(const char *format, ...) {}


x86 assembly (clang, -O0):
<log_printf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_printf>:
ret

LLVM IR (-O0):
define void @log_printf(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @log_printf(i8* nocapture %0, ...) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ nrf_802154_pib_pan_id_set(int /*<<< orphan*/ const *);
void nrf_802154_pan_id_set(const uint8_t *p_pan_id) {
  nrf_802154_pib_pan_id_set(p_pan_id);
}


x86 assembly (clang, -O0):
<nrf_802154_pan_id_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <nrf_802154_pib_pan_id_set@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf_802154_pan_id_set>:
jmp    1030 <nrf_802154_pib_pan_id_set@plt>

LLVM IR (-O0):
define void @nrf_802154_pan_id_set(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @nrf_802154_pib_pan_id_set(i32* %3)
ret void
}

LLVM IR (-O2):
define void @nrf_802154_pan_id_set(i32* %0) {
%2 = tail call i32 @nrf_802154_pib_pan_id_set(i32* %0)
ret void
}
int edflib_version(void) { return 109; }


x86 assembly (clang, -O0):
<edflib_version>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6d,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<edflib_version>:
mov    $0x6d,%eax
ret

LLVM IR (-O0):
define i32 @edflib_version() {
ret i32 109
}

LLVM IR (-O2):
define i32 @edflib_version() {
ret i32 109
}
int fun1344() { return 1344; }


x86 assembly (clang, -O0):
<fun1344>:
push   %rbp
mov    %rsp,%rbp
mov    $0x540,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1344>:
mov    $0x540,%eax
ret

LLVM IR (-O0):
define i32 @fun1344() {
ret i32 1344
}

LLVM IR (-O2):
define i32 @fun1344() {
ret i32 1344
}
/* Variables and functions */
int /*<<< orphan*/ ResumeThread20(unsigned long);
void resumethread(unsigned long thi) { ResumeThread20(thi); }


x86 assembly (clang, -O0):
<resumethread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ResumeThread20@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<resumethread>:
jmp    1030 <ResumeThread20@plt>

LLVM IR (-O0):
define void @resumethread(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @ResumeThread20(i64 %3)
ret void
}

LLVM IR (-O2):
define void @resumethread(i64 %0) {
%2 = tail call i32 @ResumeThread20(i64 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void handleQuitRequest() { printf("Function unimplemented!\n"); }


x86 assembly (clang, -O0):
<handleQuitRequest>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<handleQuitRequest>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"Function unimplemented!\0A\00"
define void @handleQuitRequest() {
%1 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [24 x i8] c"Function unimplemented!\00"
define void @handleQuitRequest() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str, i64 0, i64 0))
ret void
}
double LSKeyframeAnimationFunctionEaseOutBack(double t, double b, double c,
                                              double d) {
  const double s = 1.70158;
  return c * ((t = t / d - 1) * t * ((s + 1) * t + s) + 1) + b;
}


x86 assembly (clang, -O0):
<LSKeyframeAnimationFunctionEaseOutBack>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  0xef0(%rip),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm2
divsd  -0x20(%rbp),%xmm2
movsd  0xec4(%rip),%xmm1
subsd  %xmm1,%xmm2
movsd  %xmm2,-0x8(%rbp)
mulsd  -0x8(%rbp),%xmm2
movsd  -0x8(%rbp),%xmm1
movsd  0xeb1(%rip),%xmm3
mulsd  %xmm3,%xmm1
movsd  0xead(%rip),%xmm3
addsd  %xmm3,%xmm1
mulsd  %xmm1,%xmm2
movsd  0xe8d(%rip),%xmm1
addsd  %xmm1,%xmm2
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<LSKeyframeAnimationFunctionEaseOutBack>:
divsd  %xmm3,%xmm0
addsd  0xef4(%rip),%xmm0
movapd %xmm0,%xmm3
mulsd  0xef0(%rip),%xmm0
mulsd  %xmm3,%xmm3
addsd  0xeec(%rip),%xmm0
mulsd  %xmm3,%xmm0
addsd  0xee8(%rip),%xmm0
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @LSKeyframeAnimationFunctionEaseOutBack(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
%9 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
store double 1.701580e+00, double* %9
%10 = load double, double* %7
%11 = load double, double* %5
%12 = load double, double* %8
%13 = fdiv double %11, %12
%14 = fsub double %13, 1.000000e+00
store double %14, double* %5
%15 = load double, double* %5
%16 = fmul double %14, %15
%17 = load double, double* %5
%18 = call double @llvm.fmuladd.f64(double 2.701580e+00, double %17, double 1.701580e+00)
%19 = call double @llvm.fmuladd.f64(double %16, double %18, double 1.000000e+00)
%20 = load double, double* %6
%21 = call double @llvm.fmuladd.f64(double %10, double %19, double %20)
ret double %21
}

LLVM IR (-O2):
define double @LSKeyframeAnimationFunctionEaseOutBack(double %0, double %1, double %2, double %3) {
%5 = fdiv double %0, %3
%6 = fadd double %5, -1.000000e+00
%7 = fmul double %6, %6
%8 = tail call double @llvm.fmuladd.f64(double %6, double 2.701580e+00, double 1.701580e+00)
%9 = tail call double @llvm.fmuladd.f64(double %7, double %8, double 1.000000e+00)
%10 = tail call double @llvm.fmuladd.f64(double %2, double %9, double %1)
ret double %10
}
/* Type definitions */
struct hwtest_ctx {
  int dummy;
};

/* Variables and functions */
int nv84_ptherm_prep(struct hwtest_ctx *);
int nv84_sensor_calibration_prep(struct hwtest_ctx *ctx) {
  return nv84_ptherm_prep(ctx);
}


x86 assembly (clang, -O0):
<nv84_sensor_calibration_prep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <nv84_ptherm_prep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nv84_sensor_calibration_prep>:
jmp    1030 <nv84_ptherm_prep@plt>

LLVM IR (-O0):
%struct.hwtest_ctx = type { i32 }
define i32 @nv84_sensor_calibration_prep(%struct.hwtest_ctx* %0) {
%2 = alloca %struct.hwtest_ctx*
store %struct.hwtest_ctx* %0, %struct.hwtest_ctx** %2
%3 = load %struct.hwtest_ctx*, %struct.hwtest_ctx** %2
%4 = call i32 @nv84_ptherm_prep(%struct.hwtest_ctx* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.hwtest_ctx = type { i32 }
define i32 @nv84_sensor_calibration_prep(%struct.hwtest_ctx* %0) {
%2 = tail call i32 @nv84_ptherm_prep(%struct.hwtest_ctx* %0)
ret i32 %2
}
int cue_msf_2_sector(int minute, int second, int frame) {
  return frame + (second + minute * 60) * 75;
}


x86 assembly (clang, -O0):
<cue_msf_2_sector>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   $0x3c,-0x4(%rbp),%edx
add    %edx,%ecx
imul   $0x4b,%ecx,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cue_msf_2_sector>:
imul   $0x3c,%edi,%eax
add    %esi,%eax
imul   $0x4b,%eax,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @cue_msf_2_sector(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %4
%10 = mul nsw i32 %9, 60
%11 = add nsw i32 %8, %10
%12 = mul nsw i32 %11, 75
%13 = add nsw i32 %7, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @cue_msf_2_sector(i32 %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %0, 60
%5 = add nsw i32 %4, %1
%6 = mul nsw i32 %5, 75
%7 = add nsw i32 %6, %2
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ IF_netGetVal(char);
void IF_netDepth(void) { IF_netGetVal('d'); }


x86 assembly (clang, -O0):
<IF_netDepth>:
push   %rbp
mov    %rsp,%rbp
mov    $0x64,%edi
call   1030 <IF_netGetVal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<IF_netDepth>:
mov    $0x64,%edi
jmp    1030 <IF_netGetVal@plt>

LLVM IR (-O0):
define void @IF_netDepth() {
%1 = call i32 @IF_netGetVal(i8 signext 100)
ret void
}

LLVM IR (-O2):
define void @IF_netDepth() {
%1 = tail call i32 @IF_netGetVal(i8 signext 100)
ret void
}
/* Variables and functions */
char *strrchr(char *, char);
char *basename(char *filename) {
  char *p = strrchr(filename, '/');
  if (!p) {
    p = strrchr(filename, '\\');
  }
  return p ? p + 1 : (char *)filename;
}


x86 assembly (clang, -O0):
<basename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2f,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114b <basename+0x3b>
mov    -0x8(%rbp),%rdi
mov    $0x5c,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1167 <basename+0x57>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    116f <basename+0x5f>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<basename>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2f,%esi
call   1030 <strrchr@plt>
test   %rax,%rax
jne    1130 <basename+0x20>
mov    %rbx,%rdi
mov    $0x5c,%esi
call   1030 <strrchr@plt>
lea    0x1(%rax),%rcx
test   %rax,%rax
cmove  %rbx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @basename(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strrchr(i8* %4, i8 signext 47)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %11, label %8
8: ; preds = %1
%9 = load i8*, i8** %2
%10 = call i8* @strrchr(i8* %9, i8 signext 92)
store i8* %10, i8** %3
br label %11
11: ; preds = %8, %1
%12 = load i8*, i8** %3
%13 = icmp ne i8* %12, null
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i64 1
br label %19
17: ; preds = %11
%18 = load i8*, i8** %2
br label %19
19: ; preds = %17, %14
%20 = phi i8* [ %16, %14 ], [ %18, %17 ]
ret i8* %20
}

LLVM IR (-O2):
define i8* @basename(i8* %0) {
%2 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 47)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 92)
br label %6
6: ; preds = %4, %1
%7 = phi i8* [ %2, %1 ], [ %5, %4 ]
%8 = icmp eq i8* %7, null
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = select i1 %8, i8* %0, i8* %9
ret i8* %10
}
/* Variables and functions */
int /*<<< orphan*/ SIGTTIN;
int /*<<< orphan*/ SIG_DFL;
int getpid();
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ signal(int /*<<< orphan*/, int /*<<< orphan*/);
void sig_ttin_handler(int signo) {
  printf("process[%d] get SIGTTIN\n", getpid());
  signal(SIGTTIN, SIG_DFL);
}


x86 assembly (clang, -O0):
<sig_ttin_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,%esi
lea    0xeb5(%rip),%rdi
call   1040 <printf@plt>
mov    0x2e91(%rip),%rax
mov    (%rax),%edi
mov    0x2e78(%rip),%rax
mov    (%rax),%esi
call   1050 <signal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_ttin_handler>:
push   %rax
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xec1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
mov    0x2e82(%rip),%rax
mov    (%rax),%esi
pop    %rax
jmp    1050 <signal@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"process[%d] get SIGTTIN\0A\00"
@SIGTTIN = global i32 0
@SIG_DFL = global i32 0
define void @sig_ttin_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @getpid()
%4 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* @SIGTTIN
%6 = load i32, i32* @SIG_DFL
%7 = call i32 @signal(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"process[%d] get SIGTTIN\0A\00"
@SIGTTIN = global i32 0
@SIG_DFL = global i32 0
define void @sig_ttin_handler(i32 %0) {
%2 = tail call i32 (...) @getpid()
%3 = tail call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = load i32, i32* @SIGTTIN
%5 = load i32, i32* @SIG_DFL
%6 = tail call i32 @signal(i32 %4, i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ phone_log_view_hide();
void phoneui_backend_phone_log_hide() { phone_log_view_hide(); }


x86 assembly (clang, -O0):
<phoneui_backend_phone_log_hide>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <phone_log_view_hide@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<phoneui_backend_phone_log_hide>:
xor    %eax,%eax
jmp    1030 <phone_log_view_hide@plt>

LLVM IR (-O0):
define void @phoneui_backend_phone_log_hide() {
%1 = call i32 (...) @phone_log_view_hide()
ret void
}

LLVM IR (-O2):
define void @phoneui_backend_phone_log_hide() {
%1 = tail call i32 (...) @phone_log_view_hide()
ret void
}
/* Variables and functions */
int fire(char *);
int main(int argc, char **argv) { return fire("/dev/usb/hiddev0"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <fire@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xee9(%rip),%rdi
jmp    1030 <fire@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"/dev/usb/hiddev0\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @fire(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret i32 %6
}

LLVM IR (-O2):
@.str = [17 x i8] c"/dev/usb/hiddev0\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @fire(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ htonll(int /*<<< orphan*/);
int /*<<< orphan*/ memcpy(char *, int /*<<< orphan*/ *, int);
char *write64Int(char *buf, uint64_t value) {
  uint64_t temp = htonll(value);
  memcpy(buf, &temp, sizeof(uint64_t));
  return buf + sizeof(uint64_t);
}


x86 assembly (clang, -O0):
<write64Int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <htonll@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x4,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write64Int>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %esi,%edi
call   1040 <htonll@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
add    $0x4,%rbx
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i8* @write64Int(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = call i32 @htonll(i32 %6)
store i32 %7, i32* %5
%8 = load i8*, i8** %3
%9 = call i32 @memcpy(i8* %8, i32* %5, i32 4)
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 4
ret i8* %11
}

LLVM IR (-O2):
define i8* @write64Int(i8* %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = tail call i32 @htonll(i32 %1)
store i32 %5, i32* %3
%6 = call i32 @memcpy(i8* %0, i32* %3, i32 4)
%7 = getelementptr inbounds i8, i8* %0, i64 4
ret i8* %7
}
void do_update_word_count(int *words, int *words_in_line) {
  ++*words;
  ++*words_in_line;
}


x86 assembly (clang, -O0):
<do_update_word_count>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_update_word_count>:
addl   $0x1,(%rdi)
addl   $0x1,(%rsi)
ret

LLVM IR (-O0):
define void @do_update_word_count(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = add nsw i32 %6, 1
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = add nsw i32 %9, 1
store i32 %10, i32* %8
ret void
}

LLVM IR (-O2):
define void @do_update_word_count(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = add nsw i32 %3, 1
store i32 %4, i32* %0
%5 = load i32, i32* %1
%6 = add nsw i32 %5, 1
store i32 %6, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TestIfGoodThingHitsBadThing(int, int, int /*<<< orphan*/);
void TestIfFriendTouchesBadThing(int x, int y) {
  TestIfGoodThingHitsBadThing(x, y, 0);
}


x86 assembly (clang, -O0):
<TestIfFriendTouchesBadThing>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
xor    %edx,%edx
call   1030 <TestIfGoodThingHitsBadThing@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TestIfFriendTouchesBadThing>:
xor    %edx,%edx
jmp    1030 <TestIfGoodThingHitsBadThing@plt>

LLVM IR (-O0):
define void @TestIfFriendTouchesBadThing(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @TestIfGoodThingHitsBadThing(i32 %5, i32 %6, i32 0)
ret void
}

LLVM IR (-O2):
define void @TestIfFriendTouchesBadThing(i32 %0, i32 %1) {
%3 = tail call i32 @TestIfGoodThingHitsBadThing(i32 %0, i32 %1, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GL_PROJECTION;
int /*<<< orphan*/ glClearColor(float, float, float, float);
int /*<<< orphan*/ glLoadIdentity();
int /*<<< orphan*/ glMatrixMode(int /*<<< orphan*/);
int /*<<< orphan*/ glOrtho(float, float, float, float, float, float);
void init(void) {
  glClearColor(0.0f, 0.0f, 0.0f, 0.0f);
  glMatrixMode(GL_PROJECTION);
  glLoadIdentity();
  glOrtho(0.0f, 1.0f, 0.0f, 1.0f, -1.0f, 1.0f);
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
xorps  %xmm3,%xmm3
movaps %xmm3,%xmm0
movaps %xmm3,%xmm1
movaps %xmm3,%xmm2
call   1050 <glClearColor@plt>
mov    0x2e84(%rip),%rax
mov    (%rax),%edi
call   1030 <glMatrixMode@plt>
mov    $0x0,%al
call   1060 <glLoadIdentity@plt>
xorps  %xmm2,%xmm2
movss  0xe8b(%rip),%xmm5
movss  0xe87(%rip),%xmm4
movaps %xmm2,%xmm0
movaps %xmm5,%xmm1
movaps %xmm5,%xmm3
call   1040 <glOrtho@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
push   %rax
xorps  %xmm0,%xmm0
xorps  %xmm1,%xmm1
xorps  %xmm2,%xmm2
xorps  %xmm3,%xmm3
call   1050 <glClearColor@plt>
mov    0x2e87(%rip),%rax
mov    (%rax),%edi
call   1030 <glMatrixMode@plt>
xor    %eax,%eax
call   1060 <glLoadIdentity@plt>
movss  0xe91(%rip),%xmm4
movss  0xe8d(%rip),%xmm1
xorps  %xmm0,%xmm0
xorps  %xmm2,%xmm2
movaps %xmm1,%xmm3
movaps %xmm1,%xmm5
pop    %rax
jmp    1040 <glOrtho@plt>

LLVM IR (-O0):
@GL_PROJECTION = global i32 0
define void @init() {
%1 = call i32 @glClearColor(float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00)
%2 = load i32, i32* @GL_PROJECTION
%3 = call i32 @glMatrixMode(i32 %2)
%4 = call i32 (...) @glLoadIdentity()
%5 = call i32 @glOrtho(float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00)
ret void
}

LLVM IR (-O2):
@GL_PROJECTION = global i32 0
define void @init() {
%1 = tail call i32 @glClearColor(float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00)
%2 = load i32, i32* @GL_PROJECTION
%3 = tail call i32 @glMatrixMode(i32 %2)
%4 = tail call i32 (...) @glLoadIdentity()
%5 = tail call i32 @glOrtho(float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00)
ret void
}
/* Variables and functions */
int com_parse_char_command(char *, char *, char);
int com_parse_board_string(char *response, char *board_string) {
  return com_parse_char_command(board_string, response, 'b');
}


x86 assembly (clang, -O0):
<com_parse_board_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    $0x62,%edx
call   1030 <com_parse_char_command@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<com_parse_board_string>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
mov    $0x62,%edx
jmp    1030 <com_parse_char_command@plt>

LLVM IR (-O0):
define i32 @com_parse_board_string(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i8*, i8** %3
%7 = call i32 @com_parse_char_command(i8* %5, i8* %6, i8 signext 98)
ret i32 %7
}

LLVM IR (-O2):
define i32 @com_parse_board_string(i8* %0, i8* %1) {
%3 = tail call i32 @com_parse_char_command(i8* %1, i8* %0, i8 signext 98)
ret i32 %3
}
void f(void) { (const void *)"ABC"; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
ret

LLVM IR (-O0):
@.str = [4 x i8] c"ABC\00"
define void @f() {
ret void
}

LLVM IR (-O2):
define void @f() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
char *openconnect_get_peer_cert_hash(void *);
int /*<<< orphan*/ printf(char *, char *);
int validate_peer_cert(void *_vpninfo, const char *reason) {
  printf("%s\n", openconnect_get_peer_cert_hash(_vpninfo));
  exit(0);
}


x86 assembly (clang, -O0):
<validate_peer_cert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <openconnect_get_peer_cert_hash@plt>
mov    %rax,%rsi
lea    0xead(%rip),%rdi
call   1040 <printf@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<validate_peer_cert>:
push   %rax
call   1030 <openconnect_get_peer_cert_hash@plt>
lea    0xec3(%rip),%rdi
mov    %rax,%rsi
call   1040 <printf@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @validate_peer_cert(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i8* @openconnect_get_peer_cert_hash(i8* %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @validate_peer_cert(i8* %0, i8* nocapture readnone %1) {
%3 = tail call i8* @openconnect_get_peer_cert_hash(i8* %0)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = tail call i32 @exit(i32 0)
unreachable
}
int sys_poll(struct tcb *tcp) { return 0; }


x86 assembly (clang, -O0):
<sys_poll>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_poll>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.tcb = type opaque
define i32 @sys_poll(%struct.tcb* %0) {
%2 = alloca %struct.tcb*
store %struct.tcb* %0, %struct.tcb** %2
ret i32 0
}

LLVM IR (-O2):
%struct.tcb = type opaque
define i32 @sys_poll(%struct.tcb* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
struct init_action {
  int dummy;
};

/* Variables and functions */
int run(struct init_action *);
int wait(int *);
int waitfor(struct init_action *a) {
  int pid;
  int status, wpid;
  pid = run(a);
  while (1) {
    wpid = wait(&status);
    if (wpid > 0 && wpid != pid) {
      continue;
    }
    if (wpid == pid)
      break;
  }
  return wpid;
}


x86 assembly (clang, -O0):
<waitfor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <run@plt>
mov    %eax,-0xc(%rbp)
lea    -0x10(%rbp),%rdi
call   1040 <wait@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jle    115f <waitfor+0x3f>
mov    -0x14(%rbp),%eax
cmp    -0xc(%rbp),%eax
je     115f <waitfor+0x3f>
jmp    1138 <waitfor+0x18>
mov    -0x14(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    1170 <waitfor+0x50>
jmp    1175 <waitfor+0x55>
jmp    1138 <waitfor+0x18>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<waitfor>:
push   %r14
push   %rbx
push   %rax
call   1030 <run@plt>
mov    %eax,%ebx
lea    0x4(%rsp),%r14
mov    %r14,%rdi
call   1040 <wait@plt>
test   %eax,%eax
setle  %cl
cmp    %ebx,%eax
sete   %dl
or     %cl,%dl
cmp    $0x1,%dl
jne    1130 <waitfor+0x10>
cmp    %ebx,%eax
jne    1130 <waitfor+0x10>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.init_action = type { i32 }
define i32 @waitfor(%struct.init_action* %0) {
%2 = alloca %struct.init_action*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store %struct.init_action* %0, %struct.init_action** %2
%6 = load %struct.init_action*, %struct.init_action** %2
%7 = call i32 @run(%struct.init_action* %6)
store i32 %7, i32* %3
br label %8
8: ; preds = %1, %16, %22
%9 = call i32 @wait(i32* %4)
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %17
12: ; preds = %8
%13 = load i32, i32* %5
%14 = load i32, i32* %3
%15 = icmp ne i32 %13, %14
br i1 %15, label %16, label %17
16: ; preds = %12
br label %8
17: ; preds = %12, %8
%18 = load i32, i32* %5
%19 = load i32, i32* %3
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %22
21: ; preds = %17
br label %23
22: ; preds = %17
br label %8
23: ; preds = %21
%24 = load i32, i32* %5
ret i32 %24
}

LLVM IR (-O2):
%struct.init_action = type { i32 }
define i32 @waitfor(%struct.init_action* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = tail call i32 @run(%struct.init_action* %0)
br label %5
5: ; preds = %5, %1
%6 = call i32 @wait(i32* %2)
%7 = icmp slt i32 %6, 1
%8 = icmp eq i32 %6, %4
%9 = select i1 %7, i1 true, i1 %8
%10 = select i1 %9, i1 %8, i1 false
br i1 %10, label %11, label %5
11: ; preds = %5
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ merge(long long *, long long, long long, long long);
void mergesort(long long int *a, long long int lb, long long int ub) {
  long long int mid = (lb + ub) / 2;
  if (lb < ub) {
    mergesort(a, lb, mid);
    mergesort(a, mid + 1, ub);
    merge(a, lb, mid, ub);
  }
}


x86 assembly (clang, -O0):
<mergesort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
add    -0x18(%rbp),%rax
mov    $0x2,%ecx
cqto
idiv   %rcx
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jge    1193 <mergesort+0x73>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1040 <mergesort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x20(%rbp),%rsi
add    $0x1,%rsi
mov    -0x18(%rbp),%rdx
call   1040 <mergesort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x18(%rbp),%rcx
call   1030 <merge@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mergesort>:
cmp    %rdx,%rsi
jge    117a <mergesort+0x5a>
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%r12
mov    %rdi,%r15
lea    (%rdx,%rsi,1),%rax
mov    %rax,%rbx
shr    $0x3f,%rbx
add    %rax,%rbx
sar    %rbx
mov    %rbx,%rdx
call   1040 <mergesort@plt>
lea    0x1(%rbx),%rsi
mov    %r15,%rdi
mov    %r14,%rdx
call   1040 <mergesort@plt>
mov    %r15,%rdi
mov    %r12,%rsi
mov    %rbx,%rdx
mov    %r14,%rcx
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <merge@plt>
ret

LLVM IR (-O0):
define void @mergesort(i64* %0, i64 %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = add nsw i64 %8, %9
%11 = sdiv i64 %10, 2
store i64 %11, i64* %7
%12 = load i64, i64* %5
%13 = load i64, i64* %6
%14 = icmp slt i64 %12, %13
br i1 %14, label %15, label %28
15: ; preds = %3
%16 = load i64*, i64** %4
%17 = load i64, i64* %5
%18 = load i64, i64* %7
%19 = load i64*, i64** %4
%20 = load i64, i64* %7
%21 = add nsw i64 %20, 1
%22 = load i64, i64* %6
%23 = load i64*, i64** %4
%24 = load i64, i64* %5
%25 = load i64, i64* %7
%26 = load i64, i64* %6
%27 = call i32 @merge(i64* %23, i64 %24, i64 %25, i64 %26)
br label %28
28: ; preds = %15, %3
ret void
}

LLVM IR (-O2):
define void @mergesort(i64* %0, i64 %1, i64 %2) {
%4 = add nsw i64 %2, %1
%5 = sdiv i64 %4, 2
%6 = icmp slt i64 %1, %2
br i1 %6, label %8, label %7
7: ; preds = %3, %8
ret void
8: ; preds = %3
tail call void @mergesort(i64* %0, i64 %1, i64 %5)
%9 = add nsw i64 %5, 1
tail call void @mergesort(i64* %0, i64 %9, i64 %2)
%10 = tail call i32 @merge(i64* %0, i64 %1, i64 %5, i64 %2)
br label %7
}
double B1(u)
double u;
{
  double tmp = 1.0 - u;
  return (3 * u * (tmp * tmp));
}


x86 assembly (clang, -O0):
<B1>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm0
subsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xedd(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mulsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<B1>:
movsd  0xef8(%rip),%xmm1
subsd  %xmm0,%xmm1
mulsd  0xef4(%rip),%xmm0
mulsd  %xmm1,%xmm1
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @B1(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fsub double 1.000000e+00, %4
store double %5, double* %3
%6 = load double, double* %2
%7 = fmul double 3.000000e+00, %6
%8 = load double, double* %3
%9 = load double, double* %3
%10 = fmul double %8, %9
%11 = fmul double %7, %10
ret double %11
}

LLVM IR (-O2):
define double @B1(double %0) {
%2 = fsub double 1.000000e+00, %0
%3 = fmul double %0, 3.000000e+00
%4 = fmul double %2, %2
%5 = fmul double %3, %4
ret double %5
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
scalar_t__ unlink(char *);
void free_tmp(void) {
  if (unlink(".tmpdisk"))
    perror("unlink");
}


x86 assembly (clang, -O0):
<free_tmp>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <unlink@plt>
cmp    $0x0,%rax
je     1146 <free_tmp+0x26>
lea    0xec8(%rip),%rdi
call   1040 <perror@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_tmp>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <unlink@plt>
test   %rax,%rax
jne    1134 <free_tmp+0x14>
pop    %rax
ret
lea    0xece(%rip),%rdi
pop    %rax
jmp    1040 <perror@plt>

LLVM IR (-O0):
@.str = [9 x i8] c".tmpdisk\00"
@.str.1 = [7 x i8] c"unlink\00"
define void @free_tmp() {
%1 = call i64 @unlink(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = call i32 @perror(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c".tmpdisk\00"
@.str.1 = [7 x i8] c"unlink\00"
define void @free_tmp() {
%1 = tail call i64 @unlink(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @perror(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
ret void
}
int test_imm_D5uint16_mem(unsigned short *val) {
  return ((*val) & (-0xD5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D5uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffff2b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D5uint16_mem>:
movzwl (%rdi),%eax
test   $0xff2b,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D5uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -213
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_D5uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -213
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ perfTest();
int /*<<< orphan*/ test1();
int /*<<< orphan*/ test2();
int /*<<< orphan*/ test3();
int /*<<< orphan*/ test4();
int main(int argc, const char *argv[]) {
  test1();
  test2();
  test3();
  test4();
  perfTest();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1050 <test1@plt>
mov    $0x0,%al
call   1070 <test2@plt>
mov    $0x0,%al
call   1040 <test3@plt>
mov    $0x0,%al
call   1060 <test4@plt>
mov    $0x0,%al
call   1030 <perfTest@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <test1@plt>
xor    %eax,%eax
call   1070 <test2@plt>
xor    %eax,%eax
call   1040 <test3@plt>
xor    %eax,%eax
call   1060 <test4@plt>
xor    %eax,%eax
call   1030 <perfTest@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @test1()
%7 = call i32 (...) @test2()
%8 = call i32 (...) @test3()
%9 = call i32 (...) @test4()
%10 = call i32 (...) @perfTest()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @test1()
%4 = tail call i32 (...) @test2()
%5 = tail call i32 (...) @test3()
%6 = tail call i32 (...) @test4()
%7 = tail call i32 (...) @perfTest()
ret i32 0
}
void swap(int arr[], int i, int j) {
  int tmp;
  tmp = arr[i];
  arr[i] = arr[j];
  arr[j] = tmp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
store i32 %12, i32* %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
store i32 %17, i32* %21
%22 = load i32, i32* %7
%23 = load i32*, i32** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
store i32 %9, i32* %5
store i32 %6, i32* %8
ret void
}
unsigned _utf8_decoding_width(unsigned char header) {
  unsigned n = 0;
  if ((header & 0xc0) == 0x80)
    return 0;
  else if (!(header & 0x80))
    return 1;
  while (((header << n) & 0x80) > 0)
    ++n;
  return n;
}


x86 assembly (clang, -O0):
<_utf8_decoding_width>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movl   $0x0,-0xc(%rbp)
movzbl -0x5(%rbp),%eax
and    $0xc0,%eax
cmp    $0x80,%eax
jne    1131 <_utf8_decoding_width+0x31>
movl   $0x0,-0x4(%rbp)
jmp    1184 <_utf8_decoding_width+0x84>
movzbl -0x5(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
jne    114f <_utf8_decoding_width+0x4f>
movl   $0x1,-0x4(%rbp)
jmp    1184 <_utf8_decoding_width+0x84>
jmp    1154 <_utf8_decoding_width+0x54>
jmp    1159 <_utf8_decoding_width+0x59>
movzbl -0x5(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    %cl,%eax
and    $0x80,%eax
cmp    $0x0,%eax
jle    117e <_utf8_decoding_width+0x7e>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1159 <_utf8_decoding_width+0x59>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_utf8_decoding_width>:
mov    %edi,%eax
and    $0xffffffc0,%eax
xor    %ecx,%ecx
cmp    $0x80,%eax
je     112b <_utf8_decoding_width+0x2b>
mov    $0x1,%ecx
test   $0x80,%dil
je     112b <_utf8_decoding_width+0x2b>
mov    $0xffffffff,%ecx
xchg   %ax,%ax
add    $0x1,%ecx
mov    %edi,%eax
shl    %cl,%eax
test   $0x80,%al
jne    1120 <_utf8_decoding_width+0x20>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @_utf8_decoding_width(i8 zeroext %0) {
%2 = alloca i32
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 0, i32* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = and i32 %6, 192
%8 = icmp eq i32 %7, 128
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 0, i32* %2
br label %30
10: ; preds = %1
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = and i32 %12, 128
%14 = icmp ne i32 %13, 0
br i1 %14, label %16, label %15
15: ; preds = %10
store i32 1, i32* %2
br label %30
16: ; preds = %10
br label %17
17: ; preds = %16
br label %18
18: ; preds = %25, %17
%19 = load i8, i8* %3
%20 = zext i8 %19 to i32
%21 = load i32, i32* %4
%22 = shl i32 %20, %21
%23 = and i32 %22, 128
%24 = icmp sgt i32 %23, 0
br i1 %24, label %25, label %28
25: ; preds = %18
%26 = load i32, i32* %4
%27 = add i32 %26, 1
store i32 %27, i32* %4
br label %18
28: ; preds = %18
%29 = load i32, i32* %4
store i32 %29, i32* %2
br label %30
30: ; preds = %28, %15, %9
%31 = load i32, i32* %2
ret i32 %31
}

LLVM IR (-O2):
define i32 @_utf8_decoding_width(i8 zeroext %0) {
%2 = zext i8 %0 to i32
%3 = and i32 %2, 192
%4 = icmp eq i32 %3, 128
br i1 %4, label %14, label %5
5: ; preds = %1
%6 = and i32 %2, 128
%7 = icmp eq i32 %6, 0
br i1 %7, label %14, label %8
8: ; preds = %5, %8
%9 = phi i32 [ %13, %8 ], [ 0, %5 ]
%10 = lshr i32 128, %9
%11 = and i32 %10, %2
%12 = icmp eq i32 %11, 0
%13 = add i32 %9, 1
br i1 %12, label %14, label %8
14: ; preds = %8, %5, %1
%15 = phi i32 [ 0, %1 ], [ 1, %5 ], [ %9, %8 ]
ret i32 %15
}
int is_in_interval(float val, float bound_inf, float bound_sup) {
  if (val < bound_inf)
    return (0);
  if (val > bound_sup)
    return (0);
  return (1);
}


x86 assembly (clang, -O0):
<is_in_interval>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  %xmm2,-0x10(%rbp)
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1132 <is_in_interval+0x32>
movl   $0x0,-0x4(%rbp)
jmp    1154 <is_in_interval+0x54>
movss  -0x8(%rbp),%xmm0
ucomiss -0x10(%rbp),%xmm0
jbe    114d <is_in_interval+0x4d>
movl   $0x0,-0x4(%rbp)
jmp    1154 <is_in_interval+0x54>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_in_interval>:
ucomiss %xmm0,%xmm1
setbe  %al
ucomiss %xmm2,%xmm0
setbe  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_in_interval(float %0, float %1, float %2) {
%4 = alloca i32
%5 = alloca float
%6 = alloca float
%7 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
%8 = load float, float* %5
%9 = load float, float* %6
%10 = fcmp olt float %8, %9
br i1 %10, label %11, label %12
11: ; preds = %3
store i32 0, i32* %4
br label %18
12: ; preds = %3
%13 = load float, float* %5
%14 = load float, float* %7
%15 = fcmp ogt float %13, %14
br i1 %15, label %16, label %17
16: ; preds = %12
store i32 0, i32* %4
br label %18
17: ; preds = %12
store i32 1, i32* %4
br label %18
18: ; preds = %17, %16, %11
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
define i32 @is_in_interval(float %0, float %1, float %2) {
%4 = fcmp uge float %0, %1
%5 = fcmp ule float %0, %2
%6 = and i1 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
unsigned short inw(unsigned short port) {
  unsigned short r;
  asm volatile("inw %1, %0" : "=a"(r) : "dN"(port));
  return r;
}


x86 assembly (clang, -O0):
<inw>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%ax
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inw>:
mov    %edi,%edx
in     (%dx),%ax
ret

LLVM IR (-O0):
define zeroext i16 @inw(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i16 asm sideeffect "inw $1, $0", "={ax},{dx}N,~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i16 %5, i16* %3
%6 = load i16, i16* %3
ret i16 %6
}

LLVM IR (-O2):
define zeroext i16 @inw(i16 zeroext %0) {
%2 = tail call i16 asm sideeffect "inw $1, $0", "={ax},{dx}N,~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i16 %2
}
/* Variables and functions */
size_t strcspn(char *, char *);
char *newLineDestroyer(char *line) {
  line[strcspn(line, "\n")] = 0;
  return line;
}


x86 assembly (clang, -O0):
<newLineDestroyer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed1(%rip),%rsi
call   1030 <strcspn@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<newLineDestroyer>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <strcspn@plt>
movb   $0x0,(%rbx,%rax,1)
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define i8* @newLineDestroyer(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strcspn(i8* %4, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%6 = getelementptr inbounds i8, i8* %3, i64 %5
store i8 0, i8* %6
%7 = load i8*, i8** %2
ret i8* %7
}

LLVM IR (-O2):
@.str = [2 x i8] c"\0A\00"
define i8* @newLineDestroyer(i8* returned %0) {
%2 = tail call i64 @strcspn(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = getelementptr inbounds i8, i8* %0, i64 %2
store i8 0, i8* %3
ret i8* %0
}
float r(double theta) { return 0; }


x86 assembly (clang, -O0):
<r>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<r>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @r(double %0) {
%2 = alloca double
store double %0, double* %2
ret float 0.000000e+00
}

LLVM IR (-O2):
define float @r(double %0) {
ret float 0.000000e+00
}
void setf(p, a, s) struct h8_opcode *p;
char *a;
int s;
{
  printf("tmp = GET_CCR();\n");
  printf("tmp %s= srca;\n", a);
}


x86 assembly (clang, -O0):
<setf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
lea    0xed6(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%rsi
lea    0xed6(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setf>:
push   %rbx
mov    %rsi,%rbx
lea    0xee4(%rip),%rdi
call   1030 <puts@plt>
lea    0xec9(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
pop    %rbx
jmp    1040 <printf@plt>

LLVM IR (-O0):
%struct.h8_opcode = type opaque
@.str = [18 x i8] c"tmp = GET_CCR();\0A\00"
@.str.1 = [15 x i8] c"tmp %s= srca;\0A\00"
define void @setf(%struct.h8_opcode* %0, i8* %1, i32 %2) {
%4 = alloca %struct.h8_opcode*
%5 = alloca i8*
%6 = alloca i32
store %struct.h8_opcode* %0, %struct.h8_opcode** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%8 = load i8*, i8** %5
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i8* %8)
ret void
}

LLVM IR (-O2):
%struct.h8_opcode = type opaque
@.str.1 = [15 x i8] c"tmp %s= srca;\0A\00"
@str = [17 x i8] c"tmp = GET_CCR();\00"
define void @setf(%struct.h8_opcode* nocapture readnone %0, i8* %1, i32 %2) {
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i8* %1)
ret void
}