xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ b();
int main(int argc, char **argv) {
  b();
  b();
  b();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <b@plt>
mov    $0x0,%al
call   1030 <b@plt>
mov    $0x0,%al
call   1030 <b@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <b@plt>
xor    %eax,%eax
call   1030 <b@plt>
xor    %eax,%eax
call   1030 <b@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @b()
%7 = call i32 (...) @b()
%8 = call i32 (...) @b()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @b()
%4 = tail call i32 (...) @b()
%5 = tail call i32 (...) @b()
ret i32 0
}
/* Variables and functions */
int cfg_processor_get_addr(char *, char *);
int cfg_basic_timer_get_btcnt2(void) {
  return cfg_processor_get_addr("basictimer", "btcnt2");
}


x86 assembly (clang, -O0):
<cfg_basic_timer_get_btcnt2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee9(%rip),%rsi
call   1030 <cfg_processor_get_addr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfg_basic_timer_get_btcnt2>:
lea    0xee9(%rip),%rdi
lea    0xeed(%rip),%rsi
jmp    1030 <cfg_processor_get_addr@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"basictimer\00"
@.str.1 = [7 x i8] c"btcnt2\00"
define i32 @cfg_basic_timer_get_btcnt2() {
%1 = call i32 @cfg_processor_get_addr(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [11 x i8] c"basictimer\00"
@.str.1 = [7 x i8] c"btcnt2\00"
define i32 @cfg_basic_timer_get_btcnt2() {
%1 = tail call i32 @cfg_processor_get_addr(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
ret i32 %1
}
void null_close(struct fs_node *node) {
  (void)node;
  return;
}


x86 assembly (clang, -O0):
<null_close>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_close>:
ret

LLVM IR (-O0):
%struct.fs_node = type opaque
define void @null_close(%struct.fs_node* %0) {
%2 = alloca %struct.fs_node*
store %struct.fs_node* %0, %struct.fs_node** %2
%3 = load %struct.fs_node*, %struct.fs_node** %2
ret void
}

LLVM IR (-O2):
%struct.fs_node = type opaque
define void @null_close(%struct.fs_node* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delay_until(int, int);
int get_time_high();
int get_time_low();
int main(int argc, char *argv[]) {
  int h, l;
  {
    l = get_time_low();
    h = get_time_high();
  };
  ({
    l += 10 * 1000000;
    if ((unsigned int)l < (unsigned int)10 * 1000000)
      h++;
  });
  delay_until(h, l);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1050 <get_time_low@plt>
mov    %eax,-0x18(%rbp)
mov    $0x0,%al
call   1040 <get_time_high@plt>
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
add    $0x989680,%eax
mov    %eax,-0x18(%rbp)
cmpl   $0x989680,-0x18(%rbp)
jae    117b <main+0x4b>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x18(%rbp),%esi
call   1030 <delay_until@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1050 <get_time_low@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <get_time_high@plt>
cmp    $0xff676980,%ebx
sbb    $0xffffffff,%eax
add    $0x989680,%ebx
mov    %eax,%edi
mov    %ebx,%esi
call   1030 <delay_until@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = call i32 (...) @get_time_low()
store i32 %8, i32* %7
%9 = call i32 (...) @get_time_high()
store i32 %9, i32* %6
%10 = load i32, i32* %7
%11 = add nsw i32 %10, 10000000
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = icmp ult i32 %12, 10000000
br i1 %13, label %14, label %17
14: ; preds = %2
%15 = load i32, i32* %6
%16 = add nsw i32 %15, 1
store i32 %16, i32* %6
br label %17
17: ; preds = %14, %2
%18 = load i32, i32* %6
%19 = load i32, i32* %7
%20 = call i32 @delay_until(i32 %18, i32 %19)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @get_time_low()
%4 = tail call i32 (...) @get_time_high()
%5 = icmp ugt i32 %3, -10000001
%6 = zext i1 %5 to i32
%7 = add nsw i32 %4, %6
%8 = add nsw i32 %3, 10000000
%9 = tail call i32 @delay_until(i32 %7, i32 %8)
ret i32 0
}
long cmdso_unload(void *cycle_param) { return 0; }


x86 assembly (clang, -O0):
<cmdso_unload>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmdso_unload>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @cmdso_unload(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i64 0
}

LLVM IR (-O2):
define i64 @cmdso_unload(i8* nocapture readnone %0) {
ret i64 0
}
void ft_testing_function(void) {
  int counter;
  int user_input_size;
  char *user_input;
}


x86 assembly (clang, -O0):
<ft_testing_function>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_testing_function>:
ret

LLVM IR (-O0):
define void @ft_testing_function() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8*
ret void
}

LLVM IR (-O2):
define void @ft_testing_function() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pair_content(int, short *, short *);
int color_pair_matches(int pair, int fg, int bg) {
  short pair_fg, pair_bg;
  pair_content(pair, &pair_fg, &pair_bg);
  return (pair_fg == fg && pair_bg == bg);
}


x86 assembly (clang, -O0):
<color_pair_matches>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
lea    -0xe(%rbp),%rsi
lea    -0x10(%rbp),%rdx
call   1030 <pair_content@plt>
movswl -0xe(%rbp),%ecx
xor    %eax,%eax
cmp    -0x8(%rbp),%ecx
mov    %al,-0x11(%rbp)
jne    1150 <color_pair_matches+0x40>
movswl -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<color_pair_matches>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebx
mov    %esi,%ebp
lea    0x6(%rsp),%rsi
lea    0x4(%rsp),%rdx
call   1030 <pair_content@plt>
movswl 0x6(%rsp),%ecx
xor    %ebp,%ecx
movswl 0x4(%rsp),%edx
xor    %ebx,%edx
xor    %eax,%eax
or     %ecx,%edx
sete   %al
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @color_pair_matches(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i16
%8 = alloca i16
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i32, i32* %4
%10 = call i32 @pair_content(i32 %9, i16* %7, i16* %8)
%11 = load i16, i16* %7
%12 = sext i16 %11 to i32
%13 = load i32, i32* %5
%14 = icmp eq i32 %12, %13
br i1 %14, label %15, label %20
15: ; preds = %3
%16 = load i16, i16* %8
%17 = sext i16 %16 to i32
%18 = load i32, i32* %6
%19 = icmp eq i32 %17, %18
br label %20
20: ; preds = %15, %3
%21 = phi i1 [ false, %3 ], [ %19, %15 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @color_pair_matches(i32 %0, i32 %1, i32 %2) {
%4 = alloca i16
%5 = alloca i16
%6 = bitcast i16* %4 to i8*
%7 = bitcast i16* %5 to i8*
%8 = call i32 @pair_content(i32 %0, i16* %4, i16* %5)
%9 = load i16, i16* %4
%10 = sext i16 %9 to i32
%11 = icmp eq i32 %10, %1
%12 = load i16, i16* %5
%13 = sext i16 %12 to i32
%14 = icmp eq i32 %13, %2
%15 = select i1 %11, i1 %14, i1 false
%16 = zext i1 %15 to i32
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ XBAR1_IRQ_2_3_DriverIRQHandler();
__attribute__((weak)) void XBAR1_IRQ_2_3_IRQHandler(void) {
  XBAR1_IRQ_2_3_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<XBAR1_IRQ_2_3_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <XBAR1_IRQ_2_3_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<XBAR1_IRQ_2_3_IRQHandler>:
xor    %eax,%eax
jmp    1030 <XBAR1_IRQ_2_3_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @XBAR1_IRQ_2_3_IRQHandler() {
%1 = call i32 (...) @XBAR1_IRQ_2_3_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @XBAR1_IRQ_2_3_IRQHandler() {
%1 = tail call i32 (...) @XBAR1_IRQ_2_3_DriverIRQHandler()
ret void
}
void voidFuncImplicitVarArgs() {}


x86 assembly (clang, -O0):
<voidFuncImplicitVarArgs>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<voidFuncImplicitVarArgs>:
ret

LLVM IR (-O0):
define void @voidFuncImplicitVarArgs() {
ret void
}

LLVM IR (-O2):
define void @voidFuncImplicitVarArgs() {
ret void
}
/* Type definitions */
struct Layer {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free_layer_arrays(struct Layer const *);
void neural_layer_dropout_free(const struct Layer *l) { free_layer_arrays(l); }


x86 assembly (clang, -O0):
<neural_layer_dropout_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free_layer_arrays@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<neural_layer_dropout_free>:
jmp    1030 <free_layer_arrays@plt>

LLVM IR (-O0):
%struct.Layer = type { i32 }
define void @neural_layer_dropout_free(%struct.Layer* %0) {
%2 = alloca %struct.Layer*
store %struct.Layer* %0, %struct.Layer** %2
%3 = load %struct.Layer*, %struct.Layer** %2
%4 = call i32 @free_layer_arrays(%struct.Layer* %3)
ret void
}

LLVM IR (-O2):
%struct.Layer = type { i32 }
define void @neural_layer_dropout_free(%struct.Layer* %0) {
%2 = tail call i32 @free_layer_arrays(%struct.Layer* %0)
ret void
}
int isPrime(int n) {
  if (n < 2) {
    return 0;
  }
  for (int i = n / 2; i > 1; i--) {
    if (n % i == 0) {
      return 0;
    }
  }
  return 1;
}


x86 assembly (clang, -O0):
<isPrime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    111d <isPrime+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    116b <isPrime+0x6b>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jle    1164 <isPrime+0x64>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1151 <isPrime+0x51>
movl   $0x0,-0x4(%rbp)
jmp    116b <isPrime+0x6b>
jmp    1156 <isPrime+0x56>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    112b <isPrime+0x2b>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPrime>:
xor    %ecx,%ecx
cmp    $0x2,%edi
jge    110a <isPrime+0xa>
mov    %ecx,%eax
ret
cmp    $0x4,%edi
jb     1133 <isPrime+0x33>
mov    %edi,%esi
shr    %esi
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1107 <isPrime+0x7>
lea    -0x1(%rsi),%eax
cmp    $0x3,%esi
mov    %eax,%esi
jge    1120 <isPrime+0x20>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isPrime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 2
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %25
8: ; preds = %1
%9 = load i32, i32* %3
%10 = sdiv i32 %9, 2
store i32 %10, i32* %4
br label %11
11: ; preds = %21, %8
%12 = load i32, i32* %4
%13 = icmp sgt i32 %12, 1
br i1 %13, label %14, label %24
14: ; preds = %11
%15 = load i32, i32* %3
%16 = load i32, i32* %4
%17 = srem i32 %15, %16
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %14
store i32 0, i32* %2
br label %25
20: ; preds = %14
br label %21
21: ; preds = %20
%22 = load i32, i32* %4
%23 = add nsw i32 %22, -1
store i32 %23, i32* %4
br label %11
24: ; preds = %11
store i32 1, i32* %2
br label %25
25: ; preds = %24, %19, %7
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @isPrime(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %14, label %3
3: ; preds = %1
%4 = icmp ugt i32 %0, 3
br i1 %4, label %5, label %14
5: ; preds = %3
%6 = lshr i32 %0, 1
br label %10
7: ; preds = %10
%8 = add nsw i32 %11, -1
%9 = icmp sgt i32 %11, 2
br i1 %9, label %10, label %14
10: ; preds = %5, %7
%11 = phi i32 [ %8, %7 ], [ %6, %5 ]
%12 = srem i32 %0, %11
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %7
14: ; preds = %10, %7, %3, %1
%15 = phi i32 [ 0, %1 ], [ 1, %3 ], [ 0, %10 ], [ 1, %7 ]
ret i32 %15
}
/* Variables and functions */
int fabs(double);
double log(int);
double rndu();
double rndLaplace(void) {
  double u, r;
  u = rndu() - 0.5;
  r = log(1 - 2 * fabs(u)) * 0.70710678118654752440;
  return (u >= 0 ? -r : r);
}


x86 assembly (clang, -O0):
<rndLaplace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x0,%al
call   1040 <rndu@plt>
movsd  0xec1(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <fabs@plt>
shl    $0x1,%eax
mov    $0x1,%edi
sub    %eax,%edi
call   1050 <log@plt>
movsd  0xe8f(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     11b2 <rndLaplace+0x82>
movsd  -0x10(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    11bc <rndLaplace+0x8c>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rndLaplace>:
push   %rax
xor    %eax,%eax
call   1040 <rndu@plt>
addsd  0xec0(%rip),%xmm0
movsd  %xmm0,(%rsp)
call   1030 <fabs@plt>
add    %eax,%eax
mov    $0x1,%edi
sub    %eax,%edi
call   1050 <log@plt>
mulsd  0xea8(%rip),%xmm0
movapd 0xea8(%rip),%xmm2
xorpd  %xmm0,%xmm2
xorpd  %xmm1,%xmm1
cmplesd (%rsp),%xmm1
movapd %xmm1,%xmm3
andnpd %xmm0,%xmm3
andpd  %xmm2,%xmm1
orpd   %xmm3,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @rndLaplace() {
%1 = alloca double
%2 = alloca double
%3 = call double (...) @rndu()
%4 = fsub double %3, 5.000000e-01
store double %4, double* %1
%5 = load double, double* %1
%6 = call i32 @fabs(double %5)
%7 = mul nsw i32 2, %6
%8 = sub nsw i32 1, %7
%9 = call double @log(i32 %8)
%10 = fmul double %9, 0x3FE6A09E667F3BCD
store double %10, double* %2
%11 = load double, double* %1
%12 = fcmp oge double %11, 0.000000e+00
br i1 %12, label %13, label %16
13: ; preds = %0
%14 = load double, double* %2
%15 = fneg double %14
br label %18
16: ; preds = %0
%17 = load double, double* %2
br label %18
18: ; preds = %16, %13
%19 = phi double [ %15, %13 ], [ %17, %16 ]
ret double %19
}

LLVM IR (-O2):
define double @rndLaplace() {
%1 = tail call double (...) @rndu()
%2 = fadd double %1, -5.000000e-01
%3 = tail call i32 @fabs(double %2)
%4 = mul i32 %3, -2
%5 = or i32 %4, 1
%6 = tail call double @log(i32 %5)
%7 = fmul double %6, 0x3FE6A09E667F3BCD
%8 = fcmp oge double %2, 0.000000e+00
%9 = fneg double %7
%10 = select i1 %8, double %9, double %7
ret double %10
}
int test_imm_34uint32_mem(unsigned int *val) {
  return ((*val) & (0x34 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_34uint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x34,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_34uint32_mem>:
testb  $0x34,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_34uint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 52
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_34uint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 52
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
scalar_t__ COND_CC();
int /*<<< orphan*/ EA_AY_PD_8();
int /*<<< orphan*/ m68ki_write_8(int /*<<< orphan*/, int);
void m68k_op_scc_8_pd(void) {
  m68ki_write_8(EA_AY_PD_8(), COND_CC() ? 0xff : 0);
}


x86 assembly (clang, -O0):
<m68k_op_scc_8_pd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <EA_AY_PD_8@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <COND_CC@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rcx
xor    %esi,%esi
mov    $0xff,%eax
cmp    $0x0,%rcx
cmovne %eax,%esi
call   1050 <m68ki_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_scc_8_pd>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %eax,%eax
call   1040 <EA_AY_PD_8@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <COND_CC@plt>
test   %rax,%rax
mov    $0xff,%esi
cmove  %ebp,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <m68ki_write_8@plt>

LLVM IR (-O0):
define void @m68k_op_scc_8_pd() {
%1 = call i32 (...) @EA_AY_PD_8()
%2 = call i64 (...) @COND_CC()
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 255, i32 0
%6 = call i32 @m68ki_write_8(i32 %1, i32 %5)
ret void
}

LLVM IR (-O2):
define void @m68k_op_scc_8_pd() {
%1 = tail call i32 (...) @EA_AY_PD_8()
%2 = tail call i64 (...) @COND_CC()
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 0, i32 255
%5 = tail call i32 @m68ki_write_8(i32 %1, i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ qs(float *, float **, int, int /*<<< orphan*/, int);
void quick(float *item, float **param, int Nparam, int count) {
  qs(item, param, Nparam, 0, count - 1);
}


x86 assembly (clang, -O0):
<quick>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%r8d
sub    $0x1,%r8d
xor    %ecx,%ecx
call   1030 <qs@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quick>:
lea    -0x1(%rcx),%r8d
xor    %ecx,%ecx
jmp    1030 <qs@plt>

LLVM IR (-O0):
define void @quick(float* %0, float** %1, i32 %2, i32 %3) {
%5 = alloca float*
%6 = alloca float**
%7 = alloca i32
%8 = alloca i32
store float* %0, float** %5
store float** %1, float*** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load float*, float** %5
%10 = load float**, float*** %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = sub nsw i32 %12, 1
%14 = call i32 @qs(float* %9, float** %10, i32 %11, i32 0, i32 %13)
ret void
}

LLVM IR (-O2):
define void @quick(float* %0, float** %1, i32 %2, i32 %3) {
%5 = add nsw i32 %3, -1
%6 = tail call i32 @qs(float* %0, float** %1, i32 %2, i32 0, i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ f(int);
int main() { f(5); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%edi
call   1030 <f@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
call   1030 <f@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @f(i32 5)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @f(i32 5)
ret i32 0
}
/* Type definitions */
struct i8x_object {
  int dummy;
};
struct i8x_func {
  int dummy;
};

/* Variables and functions */
scalar_t__ i8x_ob_unref(struct i8x_object *);
struct i8x_func *__attribute__((always_)) i8x_func_unref(struct i8x_func *x) {
  return (struct i8x_func *)i8x_ob_unref((struct i8x_object *)x);
}


x86 assembly (clang, -O0):
<i8x_func_unref>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <i8x_ob_unref@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i8x_func_unref>:
jmp    1030 <i8x_ob_unref@plt>

LLVM IR (-O0):
%struct.i8x_func = type { i32 }
%struct.i8x_object = type { i32 }
define %struct.i8x_func* @i8x_func_unref(%struct.i8x_func* %0) {
%2 = alloca %struct.i8x_func*
store %struct.i8x_func* %0, %struct.i8x_func** %2
%3 = load %struct.i8x_func*, %struct.i8x_func** %2
%4 = bitcast %struct.i8x_func* %3 to %struct.i8x_object*
%5 = call i64 @i8x_ob_unref(%struct.i8x_object* %4)
%6 = inttoptr i64 %5 to %struct.i8x_func*
ret %struct.i8x_func* %6
}

LLVM IR (-O2):
%struct.i8x_func = type { i32 }
%struct.i8x_object = type { i32 }
define %struct.i8x_func* @i8x_func_unref(%struct.i8x_func* %0) {
%2 = bitcast %struct.i8x_func* %0 to %struct.i8x_object*
%3 = tail call i64 @i8x_ob_unref(%struct.i8x_object* %2)
%4 = inttoptr i64 %3 to %struct.i8x_func*
ret %struct.i8x_func* %4
}
/* Variables and functions */
long long and_ll(long long *, long long *);
long long intr_wrap_510(long long p1, long long p2) { return and_ll(&p1, &p2); }


x86 assembly (clang, -O0):
<intr_wrap_510>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <and_ll@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intr_wrap_510>:
sub    $0x18,%rsp
mov    %rdi,0x10(%rsp)
mov    %rsi,0x8(%rsp)
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rsi
call   1030 <and_ll@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i64 @intr_wrap_510(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = call i64 @and_ll(i64* %3, i64* %4)
ret i64 %5
}

LLVM IR (-O2):
define i64 @intr_wrap_510(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = call i64 @and_ll(i64* %3, i64* %4)
ret i64 %5
}
void rcu_scheduler_starting(void) {}


x86 assembly (clang, -O0):
<rcu_scheduler_starting>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcu_scheduler_starting>:
ret

LLVM IR (-O0):
define void @rcu_scheduler_starting() {
ret void
}

LLVM IR (-O2):
define void @rcu_scheduler_starting() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ MyThreadExit();
int /*<<< orphan*/ MyThreadYield();
int /*<<< orphan*/ printf(char *);
void t2(void *dummy) {
  printf("t2 start\n");
  MyThreadYield();
  printf("t2 again\n");
  MyThreadExit();
}


x86 assembly (clang, -O0):
<t2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1050 <MyThreadYield@plt>
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <MyThreadExit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t2>:
push   %rax
lea    0xec8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1050 <MyThreadYield@plt>
lea    0xebe(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <MyThreadExit@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"t2 start\0A\00"
@.str.1 = [10 x i8] c"t2 again\0A\00"
define void @t2(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%4 = call i32 (...) @MyThreadYield()
%5 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%6 = call i32 (...) @MyThreadExit()
ret void
}

LLVM IR (-O2):
@str = [9 x i8] c"t2 start\00"
@str.2 = [9 x i8] c"t2 again\00"
define void @t2(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 (...) @MyThreadYield()
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str.2, i64 0, i64 0))
%5 = tail call i32 (...) @MyThreadExit()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fatal(char *);
void display_usage(void) {
  fatal("Incorrect arguments \n\tannsim <graph> <terms> <annotations 1> "
        "<annotations 2>\n");
}


x86 assembly (clang, -O0):
<display_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <fatal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <fatal@plt>

LLVM IR (-O0):
@.str = [78 x i8] c"Incorrect arguments \0A\09annsim <graph> <terms> <annotations 1> <annotations 2>\0A\00"
define void @display_usage() {
%1 = call i32 @fatal(i8* getelementptr inbounds ([78 x i8], [78 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [78 x i8] c"Incorrect arguments \0A\09annsim <graph> <terms> <annotations 1> <annotations 2>\0A\00"
define void @display_usage() {
%1 = tail call i32 @fatal(i8* getelementptr inbounds ([78 x i8], [78 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
bool _backlight_init(void) {
  (*(volatile unsigned long *)0x80000334) |= 0x2;
  (*(volatile unsigned long *)0x80000330) |= 0x2;
  return true;
}


x86 assembly (clang, -O0):
<_backlight_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x80000334,%eax
mov    (%rax),%rcx
or     $0x2,%rcx
mov    $0x80000334,%eax
mov    %rcx,(%rax)
mov    $0x80000330,%eax
mov    (%rax),%rcx
or     $0x2,%rcx
mov    $0x80000330,%eax
mov    %rcx,(%rax)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_backlight_init>:
mov    $0x80000330,%eax
orq    $0x2,0x4(%rax)
orq    $0x2,(%rax)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @_backlight_init() {
%1 = load volatile i64, i64* inttoptr (i64 2147484468 to i64*)
%2 = or i64 %1, 2
store volatile i64 %2, i64* inttoptr (i64 2147484468 to i64*)
%3 = load volatile i64, i64* inttoptr (i64 2147484464 to i64*)
%4 = or i64 %3, 2
store volatile i64 %4, i64* inttoptr (i64 2147484464 to i64*)
ret i32 1
}

LLVM IR (-O2):
define i32 @_backlight_init() {
%1 = load volatile i64, i64* inttoptr (i64 2147484468 to i64*)
%2 = or i64 %1, 2
store volatile i64 %2, i64* inttoptr (i64 2147484468 to i64*)
%3 = load volatile i64, i64* inttoptr (i64 2147484464 to i64*)
%4 = or i64 %3, 2
store volatile i64 %4, i64* inttoptr (i64 2147484464 to i64*)
ret i32 1
}
/* Variables and functions */
char *put_integer_r(unsigned int const, int /*<<< orphan*/, unsigned int const,
                    char const, char *const);
char *put_uint_r(const unsigned v, const unsigned w, const char wc,
                 char *const e) {
  return put_integer_r(v, 0, w, wc, e);
}


x86 assembly (clang, -O0):
<put_uint_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dl,%al
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    -0x9(%rbp),%al
mov    -0x18(%rbp),%r8
xor    %esi,%esi
movsbl %al,%ecx
call   1030 <put_integer_r@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_uint_r>:
mov    %rcx,%r8
mov    %edx,%ecx
mov    %esi,%edx
xor    %esi,%esi
jmp    1030 <put_integer_r@plt>

LLVM IR (-O0):
define i8* @put_uint_r(i32 %0, i32 %1, i8 signext %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8
%8 = alloca i8*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8 %2, i8* %7
store i8* %3, i8** %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i8, i8* %7
%12 = load i8*, i8** %8
%13 = call i8* @put_integer_r(i32 %9, i32 0, i32 %10, i8 signext %11, i8* %12)
ret i8* %13
}

LLVM IR (-O2):
define i8* @put_uint_r(i32 %0, i32 %1, i8 signext %2, i8* %3) {
%5 = tail call i8* @put_integer_r(i32 %0, i32 0, i32 %1, i8 signext %2, i8* %3)
ret i8* %5
}
/* Variables and functions */
int global_init();
int nanoev_init() { return global_init(); }


x86 assembly (clang, -O0):
<nanoev_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <global_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nanoev_init>:
xor    %eax,%eax
jmp    1030 <global_init@plt>

LLVM IR (-O0):
define i32 @nanoev_init() {
%1 = call i32 (...) @global_init()
ret i32 %1
}

LLVM IR (-O2):
define i32 @nanoev_init() {
%1 = tail call i32 (...) @global_init()
ret i32 %1
}
void dummy1(int x) {}


x86 assembly (clang, -O0):
<dummy1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy1>:
ret

LLVM IR (-O0):
define void @dummy1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @dummy1(i32 %0) {
ret void
}
/* Variables and functions */
char *clonestr(char *);
char *InstantDEX_tradehistory() {
  return (clonestr("{\"error\":\"API is not yet\"}"));
}


x86 assembly (clang, -O0):
<InstantDEX_tradehistory>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <clonestr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<InstantDEX_tradehistory>:
lea    0xee9(%rip),%rdi
jmp    1030 <clonestr@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"{\22error\22:\22API is not yet\22}\00"
define i8* @InstantDEX_tradehistory() {
%1 = call i8* @clonestr(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [27 x i8] c"{\22error\22:\22API is not yet\22}\00"
define i8* @InstantDEX_tradehistory() {
%1 = tail call i8* @clonestr(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_get_home_dir_malloc() {
  printf("NOT IMPLEMENTED:"
         "pa_get_home_dir_malloc"
         "\n");
}


x86 assembly (clang, -O0):
<pa_get_home_dir_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_get_home_dir_malloc>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [40 x i8] c"NOT IMPLEMENTED:pa_get_home_dir_malloc\0A\00"
define i32 @pa_get_home_dir_malloc() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [39 x i8] c"NOT IMPLEMENTED:pa_get_home_dir_malloc\00"
define i32 @pa_get_home_dir_malloc() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ XInitThreads();
void ROMlib_XInitThreads(void) { XInitThreads(); }


x86 assembly (clang, -O0):
<ROMlib_XInitThreads>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <XInitThreads@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ROMlib_XInitThreads>:
xor    %eax,%eax
jmp    1030 <XInitThreads@plt>

LLVM IR (-O0):
define void @ROMlib_XInitThreads() {
%1 = call i32 (...) @XInitThreads()
ret void
}

LLVM IR (-O2):
define void @ROMlib_XInitThreads() {
%1 = tail call i32 (...) @XInitThreads()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ audio_ic_set_effect_mode();
int /*<<< orphan*/ menu_numeric_toggle(void *, int, int /*<<< orphan*/, int);
void audio_effect_mode_toggle(void *priv, int delta) {
  menu_numeric_toggle(priv, delta, 0, 5);
  audio_ic_set_effect_mode();
}


x86 assembly (clang, -O0):
<audio_effect_mode_toggle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %edx,%edx
mov    $0x5,%ecx
call   1030 <menu_numeric_toggle@plt>
mov    $0x0,%al
call   1040 <audio_ic_set_effect_mode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<audio_effect_mode_toggle>:
push   %rax
xor    %edx,%edx
mov    $0x5,%ecx
call   1030 <menu_numeric_toggle@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <audio_ic_set_effect_mode@plt>

LLVM IR (-O0):
define void @audio_effect_mode_toggle(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @menu_numeric_toggle(i8* %5, i32 %6, i32 0, i32 5)
%8 = call i32 (...) @audio_ic_set_effect_mode()
ret void
}

LLVM IR (-O2):
define void @audio_effect_mode_toggle(i8* %0, i32 %1) {
%3 = tail call i32 @menu_numeric_toggle(i8* %0, i32 %1, i32 0, i32 5)
%4 = tail call i32 (...) @audio_ic_set_effect_mode()
ret void
}
void XTextPropertyToStringList() {}


x86 assembly (clang, -O0):
<XTextPropertyToStringList>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XTextPropertyToStringList>:
ret

LLVM IR (-O0):
define void @XTextPropertyToStringList() {
ret void
}

LLVM IR (-O2):
define void @XTextPropertyToStringList() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ COLOR_PAIR(int);
int /*<<< orphan*/ attron(int /*<<< orphan*/);
int /*<<< orphan*/ getmaxyx(int /*<<< orphan*/, int, int);
int /*<<< orphan*/ move(int, int);
int /*<<< orphan*/ printw(char *, int);
int /*<<< orphan*/ refresh();
int /*<<< orphan*/ stdscr;
void ncount(int ncount) {
  int maxrow;
  int maxcol;
  getmaxyx(stdscr, maxrow, maxcol);
  attron(COLOR_PAIR(1));
  move(7, maxcol - 8);
  printw("%d ", ncount);
  refresh();
}


x86 assembly (clang, -O0):
<ncount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2e76(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1040 <getmaxyx@plt>
mov    $0x1,%edi
call   1060 <COLOR_PAIR@plt>
mov    %eax,%edi
call   1030 <attron@plt>
mov    -0xc(%rbp),%esi
sub    $0x8,%esi
mov    $0x7,%edi
call   1080 <move@plt>
mov    -0x4(%rbp),%esi
lea    0xe56(%rip),%rdi
call   1050 <printw@plt>
mov    $0x0,%al
call   1070 <refresh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ncount>:
push   %rbx
mov    %edi,%ebx
mov    0x2e7e(%rip),%rax
mov    (%rax),%edi
call   1040 <getmaxyx@plt>
mov    $0x1,%edi
call   1060 <COLOR_PAIR@plt>
mov    %eax,%edi
call   1030 <attron@plt>
mov    $0x7,%edi
call   1080 <move@plt>
lea    0xe6d(%rip),%rdi
mov    %ebx,%esi
call   1050 <printw@plt>
xor    %eax,%eax
pop    %rbx
jmp    1070 <refresh@plt>

LLVM IR (-O0):
@stdscr = global i32 0
@.str = [4 x i8] c"%d \00"
define void @ncount(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* @stdscr
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @getmaxyx(i32 %5, i32 %6, i32 %7)
%9 = call i32 @COLOR_PAIR(i32 1)
%10 = call i32 @attron(i32 %9)
%11 = load i32, i32* %4
%12 = sub nsw i32 %11, 8
%13 = call i32 @move(i32 7, i32 %12)
%14 = load i32, i32* %2
%15 = call i32 @printw(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %14)
%16 = call i32 (...) @refresh()
ret void
}

LLVM IR (-O2):
@stdscr = global i32 0
@.str = [4 x i8] c"%d \00"
define void @ncount(i32 %0) {
%2 = load i32, i32* @stdscr
%3 = tail call i32 @getmaxyx(i32 %2, i32 undef, i32 undef)
%4 = tail call i32 @COLOR_PAIR(i32 1)
%5 = tail call i32 @attron(i32 %4)
%6 = tail call i32 @move(i32 7, i32 undef)
%7 = tail call i32 @printw(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
%8 = tail call i32 (...) @refresh()
ret void
}
/* Type definitions */
typedef scalar_t__ int8_t;
typedef int int32_t;

/* Variables and functions */
void convert_float_to_int24(float sinus, void *buf) {
  int32_t sinus_f_i;
  sinus_f_i = (int32_t)sinus;
  *((int8_t *)(buf + 0)) = (int8_t)(sinus_f_i & 0xff);
  *((int8_t *)(buf + 1)) = (int8_t)((sinus_f_i >> 8) & 0xff);
  *((int8_t *)(buf + 2)) = (int8_t)((sinus_f_i >> 16) & 0xff);
}


x86 assembly (clang, -O0):
<convert_float_to_int24>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
cvttss2si -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    $0xff,%eax
movslq %eax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x14(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
movslq %eax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,0x1(%rax)
mov    -0x14(%rbp),%eax
sar    $0x10,%eax
and    $0xff,%eax
movslq %eax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,0x2(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<convert_float_to_int24>:
cvttss2si %xmm0,%eax
movzbl %al,%ecx
mov    %rcx,(%rdi)
movzbl %ah,%ecx
mov    %rcx,0x1(%rdi)
shr    $0x10,%eax
movzbl %al,%eax
mov    %rax,0x2(%rdi)
ret

LLVM IR (-O0):
define void @convert_float_to_int24(float %0, i8* %1) {
%3 = alloca float
%4 = alloca i8*
%5 = alloca i32
store float %0, float* %3
store i8* %1, i8** %4
%6 = load float, float* %3
%7 = fptosi float %6 to i32
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = and i32 %8, 255
%10 = sext i32 %9 to i64
%11 = load i8*, i8** %4
%12 = getelementptr i8, i8* %11, i64 0
%13 = bitcast i8* %12 to i64*
store i64 %10, i64* %13
%14 = load i32, i32* %5
%15 = ashr i32 %14, 8
%16 = and i32 %15, 255
%17 = sext i32 %16 to i64
%18 = load i8*, i8** %4
%19 = getelementptr i8, i8* %18, i64 1
%20 = bitcast i8* %19 to i64*
store i64 %17, i64* %20
%21 = load i32, i32* %5
%22 = ashr i32 %21, 16
%23 = and i32 %22, 255
%24 = sext i32 %23 to i64
%25 = load i8*, i8** %4
%26 = getelementptr i8, i8* %25, i64 2
%27 = bitcast i8* %26 to i64*
store i64 %24, i64* %27
ret void
}

LLVM IR (-O2):
define void @convert_float_to_int24(float %0, i8* nocapture writeonly %1) {
%3 = fptosi float %0 to i32
%4 = and i32 %3, 255
%5 = zext i32 %4 to i64
%6 = bitcast i8* %1 to i64*
store i64 %5, i64* %6
%7 = lshr i32 %3, 8
%8 = and i32 %7, 255
%9 = zext i32 %8 to i64
%10 = getelementptr i8, i8* %1, i64 1
%11 = bitcast i8* %10 to i64*
store i64 %9, i64* %11
%12 = lshr i32 %3, 16
%13 = and i32 %12, 255
%14 = zext i32 %13 to i64
%15 = getelementptr i8, i8* %1, i64 2
%16 = bitcast i8* %15 to i64*
store i64 %14, i64* %16
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cpuid(int *, int *, int *, int *);
void __cpuid(int a[4], int b) {
  a[0] = b;
  a[2] = 0;
  cpuid(&a[0], &a[1], &a[2], &a[3]);
}


x86 assembly (clang, -O0):
<__cpuid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
movl   $0x0,0x8(%rax)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
add    $0x4,%rsi
mov    -0x8(%rbp),%rdx
add    $0x8,%rdx
mov    -0x8(%rbp),%rcx
add    $0xc,%rcx
call   1030 <cpuid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__cpuid>:
mov    %esi,(%rdi)
lea    0x8(%rdi),%rdx
movl   $0x0,0x8(%rdi)
lea    0x4(%rdi),%rsi
lea    0xc(%rdi),%rcx
jmp    1030 <cpuid@plt>

LLVM IR (-O0):
define void @__cpuid(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 0
store i32 %5, i32* %7
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 2
store i32 0, i32* %9
%10 = load i32*, i32** %3
%11 = getelementptr inbounds i32, i32* %10, i64 0
%12 = load i32*, i32** %3
%13 = getelementptr inbounds i32, i32* %12, i64 1
%14 = load i32*, i32** %3
%15 = getelementptr inbounds i32, i32* %14, i64 2
%16 = load i32*, i32** %3
%17 = getelementptr inbounds i32, i32* %16, i64 3
%18 = call i32 @cpuid(i32* %11, i32* %13, i32* %15, i32* %17)
ret void
}

LLVM IR (-O2):
define void @__cpuid(i32* %0, i32 %1) {
store i32 %1, i32* %0
%3 = getelementptr inbounds i32, i32* %0, i64 2
store i32 0, i32* %3
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = getelementptr inbounds i32, i32* %0, i64 3
%6 = tail call i32 @cpuid(i32* %0, i32* %4, i32* %3, i32* %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dump_stuff_be(void *, unsigned int);
int /*<<< orphan*/ printf(char *, char *);
void dump_stuff_be_msg(const void *msg, void *x, unsigned int size) {
  printf("%s : ", (char *)msg);
  dump_stuff_be(x, size);
}


x86 assembly (clang, -O0):
<dump_stuff_be_msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec2(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <dump_stuff_be@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dump_stuff_be_msg>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebp
mov    %rsi,%rbx
mov    %rdi,%rsi
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <dump_stuff_be@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"%s : \00"
define void @dump_stuff_be_msg(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %7)
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 @dump_stuff_be(i8* %9, i32 %10)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"%s : \00"
define void @dump_stuff_be_msg(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %0)
%5 = tail call i32 @dump_stuff_be(i8* %1, i32 %2)
ret void
}
int buggy() {
  int x = 0;
  return 5 / x;
}


x86 assembly (clang, -O0):
<buggy>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x5,%eax
cltd
idivl  -0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<buggy>:
ret

LLVM IR (-O0):
define i32 @buggy() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
%3 = sdiv i32 5, %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @buggy() {
ret i32 poison
}
void ansic_c_ast_render_placeholder(void) {}


x86 assembly (clang, -O0):
<ansic_c_ast_render_placeholder>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ansic_c_ast_render_placeholder>:
ret

LLVM IR (-O0):
define void @ansic_c_ast_render_placeholder() {
ret void
}

LLVM IR (-O2):
define void @ansic_c_ast_render_placeholder() {
ret void
}
void matrixSubtract() {}


x86 assembly (clang, -O0):
<matrixSubtract>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<matrixSubtract>:
ret

LLVM IR (-O0):
define void @matrixSubtract() {
ret void
}

LLVM IR (-O2):
define void @matrixSubtract() {
ret void
}
int comp(const void *e1, const void *e2) {
  int f = *(int *)e1, s = *(int *)e2;
  return f > s ? 1 : (f == s ? 0 : -1);
}


x86 assembly (clang, -O0):
<comp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
jle    1137 <comp+0x37>
mov    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    114c <comp+0x4c>
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%esi
mov    $0xffffffff,%eax
xor    %ecx,%ecx
cmp    %esi,%edx
cmove  %ecx,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<comp>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
xor    %edx,%edx
cmp    %ecx,%eax
setne  %dl
neg    %edx
cmp    %ecx,%eax
mov    $0x1,%eax
cmovle %edx,%eax
ret

LLVM IR (-O0):
define i32 @comp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
%9 = load i32, i32* %8
store i32 %9, i32* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i32*
%12 = load i32, i32* %11
store i32 %12, i32* %6
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = icmp sgt i32 %13, %14
br i1 %15, label %16, label %17
16: ; preds = %2
br label %23
17: ; preds = %2
%18 = load i32, i32* %5
%19 = load i32, i32* %6
%20 = icmp eq i32 %18, %19
%21 = zext i1 %20 to i64
%22 = select i1 %20, i32 0, i32 -1
br label %23
23: ; preds = %17, %16
%24 = phi i32 [ 1, %16 ], [ %22, %17 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @comp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp sgt i32 %4, %6
%8 = icmp ne i32 %4, %6
%9 = sext i1 %8 to i32
%10 = select i1 %7, i32 1, i32 %9
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ isdigit(char const);
int is_only_digits(const char *str) {
  for (; *str; ++str) {
    if (!isdigit(*str))
      return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<is_only_digits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1160 <is_only_digits+0x50>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%eax
jne    114a <is_only_digits+0x3a>
movl   $0x0,-0x4(%rbp)
jmp    1167 <is_only_digits+0x57>
jmp    114f <is_only_digits+0x3f>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    111c <is_only_digits+0xc>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_only_digits>:
push   %rbp
push   %rbx
push   %rax
mov    (%rdi),%al
mov    $0x1,%ebp
test   %al,%al
je     114b <is_only_digits+0x3b>
mov    %rdi,%rbx
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
nop
movsbl %al,%edi
call   1030 <isdigit@plt>
test   %eax,%eax
je     1149 <is_only_digits+0x39>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <is_only_digits+0x20>
jmp    114b <is_only_digits+0x3b>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @is_only_digits(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %15, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %18
8: ; preds = %4
%9 = load i8*, i8** %3
%10 = load i8, i8* %9
%11 = call i32 @isdigit(i8 signext %10)
%12 = icmp ne i32 %11, 0
br i1 %12, label %14, label %13
13: ; preds = %8
store i32 0, i32* %2
br label %19
14: ; preds = %8
br label %15
15: ; preds = %14
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %3
br label %4
18: ; preds = %4
store i32 1, i32* %2
br label %19
19: ; preds = %18, %13
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @is_only_digits(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %7
4: ; preds = %7
%5 = load i8, i8* %12
%6 = icmp eq i8 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %1, %4
%8 = phi i8 [ %5, %4 ], [ %2, %1 ]
%9 = phi i8* [ %12, %4 ], [ %0, %1 ]
%10 = tail call i32 @isdigit(i8 signext %8)
%11 = icmp eq i32 %10, 0
%12 = getelementptr inbounds i8, i8* %9, i64 1
br i1 %11, label %13, label %4
13: ; preds = %7, %4, %1
%14 = phi i32 [ 1, %1 ], [ 1, %4 ], [ 0, %7 ]
ret i32 %14
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ be32toh(int /*<<< orphan*/);
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, void *, int);
uint32_t pbe32_to_h(void *v) {
  uint32_t u;
  memcpy(&u, v, sizeof(uint32_t));
  return be32toh(u);
}


x86 assembly (clang, -O0):
<pbe32_to_h>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    -0xc(%rbp),%edi
call   1040 <be32toh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pbe32_to_h>:
push   %rax
mov    %rdi,%rsi
lea    0x4(%rsp),%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    0x4(%rsp),%edi
call   1040 <be32toh@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @pbe32_to_h(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @memcpy(i32* %3, i8* %4, i32 4)
%6 = load i32, i32* %3
%7 = call i32 @be32toh(i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @pbe32_to_h(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @memcpy(i32* %2, i8* %0, i32 4)
%5 = load i32, i32* %2
%6 = call i32 @be32toh(i32 %5)
ret i32 %6
}
int get_closest_leaf_distance(struct node *root, struct node *temp) {
  return -1;
}


x86 assembly (clang, -O0):
<get_closest_leaf_distance>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_closest_leaf_distance>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.node = type opaque
define i32 @get_closest_leaf_distance(%struct.node* %0, %struct.node* %1) {
%3 = alloca %struct.node*
%4 = alloca %struct.node*
store %struct.node* %0, %struct.node** %3
store %struct.node* %1, %struct.node** %4
ret i32 -1
}

LLVM IR (-O2):
%struct.node = type opaque
define i32 @get_closest_leaf_distance(%struct.node* nocapture readnone %0, %struct.node* nocapture readnone %1) {
ret i32 -1
}