xunge/DecIR huggingface dataset:
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
void *calloc(size_t num, size_t size) {
  void *ptr = malloc(num * size);
  memset(ptr, 0, num * size);
  return ptr;
}


x86 assembly (clang, -O0):
<calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
imul   -0x10(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rdx
imul   -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
imul   %rsi,%rbx
mov    %rbx,%rdi
call   1040 <malloc@plt>
mov    %rax,%r14
mov    %rax,%rdi
xor    %esi,%esi
mov    %rbx,%rdx
call   1030 <memset@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @calloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = mul i64 %6, %7
%9 = call i8* @malloc(i64 %8)
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = load i64, i64* %3
%12 = load i64, i64* %4
%13 = mul i64 %11, %12
%14 = call i32 @memset(i8* %10, i32 0, i64 %13)
%15 = load i8*, i8** %5
ret i8* %15
}

LLVM IR (-O2):
define i8* @calloc(i64 %0, i64 %1) {
%3 = mul i64 %1, %0
%4 = tail call i8* @malloc(i64 %3)
%5 = tail call i32 @memset(i8* %4, i32 0, i64 %3)
ret i8* %4
}
void timeLift(int power, int time) {}


x86 assembly (clang, -O0):
<timeLift>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<timeLift>:
ret

LLVM IR (-O0):
define void @timeLift(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @timeLift(i32 %0, i32 %1) {
ret void
}
void XtGetApplicationResources() {}


x86 assembly (clang, -O0):
<XtGetApplicationResources>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XtGetApplicationResources>:
ret

LLVM IR (-O0):
define void @XtGetApplicationResources() {
ret void
}

LLVM IR (-O2):
define void @XtGetApplicationResources() {
ret void
}
int test_imm_5Fuint32_reg(unsigned int val) {
  return ((val) & (0x5F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Fuint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x5f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Fuint32_reg>:
test   $0x5f,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Fuint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 95
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_5Fuint32_reg(i32 %0) {
%2 = and i32 %0, 95
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ num;

/* Variables and functions */
int /*<<< orphan*/ SwapWord(char *, int);
unsigned short big2littleus(unsigned short num) {
  SwapWord((char *)&num, sizeof(num));
  return num;
}


x86 assembly (clang, -O0):
<big2littleus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
lea    -0x2(%rbp),%rdi
mov    $0x2,%esi
call   1030 <SwapWord@plt>
movzwl -0x2(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<big2littleus>:
push   %rax
mov    %di,0x6(%rsp)
lea    0x6(%rsp),%rdi
mov    $0x2,%esi
call   1030 <SwapWord@plt>
movzwl 0x6(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define zeroext i16 @big2littleus(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = bitcast i16* %2 to i8*
%4 = call i32 @SwapWord(i8* %3, i32 2)
%5 = load i16, i16* %2
ret i16 %5
}

LLVM IR (-O2):
define zeroext i16 @big2littleus(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = bitcast i16* %2 to i8*
%4 = call i32 @SwapWord(i8* %3, i32 2)
%5 = load i16, i16* %2
ret i16 %5
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void init_gpio() {
  (*((volatile uint32_t *)0xE0200C00)) = 0x00001111;
  (*((volatile uint32_t *)0xE0200C04)) = 0x00;
}


x86 assembly (clang, -O0):
<init_gpio>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe0200c00,%eax
movl   $0x1111,(%rax)
mov    $0xe0200c04,%eax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_gpio>:
mov    $0xe0200c00,%eax
movl   $0x1111,(%rax)
movl   $0x0,0x4(%rax)
ret

LLVM IR (-O0):
define void @init_gpio() {
store volatile i32 4369, i32* inttoptr (i64 3760196608 to i32*)
store volatile i32 0, i32* inttoptr (i64 3760196612 to i32*)
ret void
}

LLVM IR (-O2):
define void @init_gpio() {
store volatile i32 4369, i32* inttoptr (i64 3760196608 to i32*)
store volatile i32 0, i32* inttoptr (i64 3760196612 to i32*)
ret void
}
/* Variables and functions */
scalar_t__ inc_addr(void *, int);
scalar_t__ shim_readlink(char const *, char *, int);
int bad_readlink(void *addr) {
  return (int)shim_readlink((const char *)addr, (char *)inc_addr(addr, 1),
                            8192);
}


x86 assembly (clang, -O0):
<bad_readlink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <inc_addr@plt>
mov    -0x10(%rbp),%rdi
mov    %rax,%rsi
mov    $0x2000,%edx
call   1040 <shim_readlink@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bad_readlink>:
push   %rbx
mov    %rdi,%rbx
mov    $0x1,%esi
call   1030 <inc_addr@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
mov    $0x2000,%edx
pop    %rbx
jmp    1040 <shim_readlink@plt>

LLVM IR (-O0):
define i32 @bad_readlink(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @inc_addr(i8* %4, i32 1)
%6 = inttoptr i64 %5 to i8*
%7 = call i64 @shim_readlink(i8* %3, i8* %6, i32 8192)
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @bad_readlink(i8* %0) {
%2 = tail call i64 @inc_addr(i8* %0, i32 1)
%3 = inttoptr i64 %2 to i8*
%4 = tail call i64 @shim_readlink(i8* %0, i8* %3, i32 8192)
%5 = trunc i64 %4 to i32
ret i32 %5
}
int erdStdItemSeparators(char t) {
  return ((t == '\t') + (t == ' ') + (t == '\n'));
}


x86 assembly (clang, -O0):
<erdStdItemSeparators>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x9,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
movsbl -0x1(%rbp),%ecx
cmp    $0x20,%ecx
sete   %cl
and    $0x1,%cl
movzbl %cl,%ecx
add    %ecx,%eax
movsbl -0x1(%rbp),%ecx
cmp    $0xa,%ecx
sete   %cl
and    $0x1,%cl
movzbl %cl,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<erdStdItemSeparators>:
xor    %eax,%eax
cmp    $0x9,%dil
sete   %al
xor    %ecx,%ecx
cmp    $0x20,%dil
sete   %cl
add    %eax,%ecx
xor    %eax,%eax
cmp    $0xa,%dil
sete   %al
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @erdStdItemSeparators(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 9
%6 = zext i1 %5 to i32
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 32
%10 = zext i1 %9 to i32
%11 = add nsw i32 %6, %10
%12 = load i8, i8* %2
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 10
%15 = zext i1 %14 to i32
%16 = add nsw i32 %11, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @erdStdItemSeparators(i8 signext %0) {
%2 = icmp eq i8 %0, 9
%3 = zext i1 %2 to i32
%4 = icmp eq i8 %0, 32
%5 = zext i1 %4 to i32
%6 = add nuw nsw i32 %3, %5
%7 = icmp eq i8 %0, 10
%8 = zext i1 %7 to i32
%9 = add nuw nsw i32 %6, %8
ret i32 %9
}
/* Variables and functions */
scalar_t__ is_ws(char const);
const char *skip_ws(const char *text) {
  while (is_ws(text[0])) {
    ++text;
  }
  return text;
}


x86 assembly (clang, -O0):
<skip_ws>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <is_ws@plt>
cmp    $0x0,%rax
je     1143 <skip_ws+0x33>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <skip_ws+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_ws>:
push   %rbx
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rbx
nopl   0x0(%rax,%rax,1)
movsbl 0x1(%rbx),%edi
add    $0x1,%rbx
call   1030 <is_ws@plt>
test   %rax,%rax
jne    1120 <skip_ws+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @skip_ws(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %9, %1
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = call i64 @is_ws(i8 signext %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %2
br label %3
12: ; preds = %3
%13 = load i8*, i8** %2
ret i8* %13
}

LLVM IR (-O2):
define i8* @skip_ws(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %7, %2 ]
%4 = load i8, i8* %3
%5 = tail call i64 @is_ws(i8 signext %4)
%6 = icmp eq i64 %5, 0
%7 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i8* %3
}
/* Type definitions */
struct ramNode {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct ramNode *);
void free_ramNode(struct ramNode *rn) { free(rn); }


x86 assembly (clang, -O0):
<free_ramNode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_ramNode>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.ramNode = type { i32 }
define void @free_ramNode(%struct.ramNode* %0) {
%2 = alloca %struct.ramNode*
store %struct.ramNode* %0, %struct.ramNode** %2
%3 = load %struct.ramNode*, %struct.ramNode** %2
%4 = call i32 @free(%struct.ramNode* %3)
ret void
}

LLVM IR (-O2):
%struct.ramNode = type { i32 }
define void @free_ramNode(%struct.ramNode* nocapture %0) {
%2 = tail call i32 @free(%struct.ramNode* %0)
ret void
}
void __attribute__((__warning__("curl_easy_getinfo expects a pointer to "
                                "'struct curl_slist *' for this info")))
__attribute__((__unused__)) __attribute__((__no__))
_curl_easy_getinfo_err_curl_slist(void) {
  __asm__("");
}


x86 assembly (clang, -O0):
<_curl_easy_getinfo_err_curl_slist>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_curl_easy_getinfo_err_curl_slist>:
ret

LLVM IR (-O0):
define void @_curl_easy_getinfo_err_curl_slist() {
ret void
}

LLVM IR (-O2):
define void @_curl_easy_getinfo_err_curl_slist() {
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ usage(int);
int /*<<< orphan*/ warnx(char *, char *);
char *flagusage(char *flag) {
  warnx("flag requires an argument: %s", flag);
  usage(5);
}


x86 assembly (clang, -O0):
<flagusage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <warnx@plt>
mov    $0x5,%edi
call   1040 <usage@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flagusage>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <warnx@plt>
mov    $0x5,%edi
pop    %rax
jmp    1040 <usage@plt>

LLVM IR (-O0):
@.str = [30 x i8] c"flag requires an argument: %s\00"
define i8* @flagusage(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @warnx(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @usage(i32 5)
%7 = load i8*, i8** %2
ret i8* %7
}

LLVM IR (-O2):
@.str = [30 x i8] c"flag requires an argument: %s\00"
define noalias i8* @flagusage(i8* %0) {
%2 = tail call i32 @warnx(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @usage(i32 5)
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ test_parser_sourcefile(char *, char *);
int /*<<< orphan*/ test_parser_verify_parse(int /*<<< orphan*/, char *, char *,
                                            char *, int /*<<< orphan*/);
void test_boo_block_comment() {
  test_parser_verify_parse(test_parser_sourcefile("boo", " /*comment*/"), "boo",
                           "", "/*comment*/", 0);
}


x86 assembly (clang, -O0):
<test_boo_block_comment>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xed2(%rip),%rsi
call   1030 <test_parser_sourcefile@plt>
mov    %eax,%edi
lea    0xec0(%rip),%rsi
lea    0xec9(%rip),%rdx
lea    0xeb7(%rip),%rcx
xor    %r8d,%r8d
call   1040 <test_parser_verify_parse@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_boo_block_comment>:
push   %rbx
lea    0xed8(%rip),%rbx
lea    0xed5(%rip),%rsi
mov    %rbx,%rdi
call   1030 <test_parser_sourcefile@plt>
lea    0xed2(%rip),%rdx
lea    0xec0(%rip),%rcx
mov    %eax,%edi
mov    %rbx,%rsi
xor    %r8d,%r8d
pop    %rbx
jmp    1040 <test_parser_verify_parse@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"boo\00"
@.str.1 = [13 x i8] c" /*comment*/\00"
@.str.2 = [1 x i8] zeroinitializer
@.str.3 = [12 x i8] c"/*comment*/\00"
define void @test_boo_block_comment() {
%1 = call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
%2 = call i32 @test_parser_verify_parse(i32 %1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.3, i64 0, i64 0), i32 0)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"boo\00"
@.str.1 = [13 x i8] c" /*comment*/\00"
@.str.2 = [1 x i8] zeroinitializer
@.str.3 = [12 x i8] c"/*comment*/\00"
define void @test_boo_block_comment() {
%1 = tail call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @test_parser_verify_parse(i32 %1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.3, i64 0, i64 0), i32 0)
ret void
}
void gtk_container_class_install_child_property() {}


x86 assembly (clang, -O0):
<gtk_container_class_install_child_property>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_container_class_install_child_property>:
ret

LLVM IR (-O0):
define void @gtk_container_class_install_child_property() {
ret void
}

LLVM IR (-O2):
define void @gtk_container_class_install_child_property() {
ret void
}
/* Type definitions */
struct timespec {
  scalar_t__ tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_MONOTONIC;
int /*<<< orphan*/ assert(int);
int clock_gettime(int /*<<< orphan*/, struct timespec *);
double GetNanoTimed(void) {
  struct timespec ts;
  int h = clock_gettime(CLOCK_MONOTONIC, &ts);
  assert(!h);
  return (double)ts.tv_sec + (double)ts.tv_nsec * 1e-9;
}


x86 assembly (clang, -O0):
<GetNanoTimed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
lea    -0x10(%rbp),%rsi
call   1030 <clock_gettime@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
cvtsi2sdq -0x8(%rbp),%xmm1
cvtsi2sdq -0x10(%rbp),%xmm0
movsd  0xe9c(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetNanoTimed>:
sub    $0x18,%rsp
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
lea    0x8(%rsp),%rsi
call   1030 <clock_gettime@plt>
xor    %edi,%edi
test   %eax,%eax
sete   %dil
call   1040 <assert@plt>
cvtsi2sdq 0x10(%rsp),%xmm1
cvtsi2sdq 0x8(%rsp),%xmm0
mulsd  0xea6(%rip),%xmm0
addsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
@CLOCK_MONOTONIC = global i32 0
define double @GetNanoTimed() {
%1 = alloca %struct.timespec
%2 = alloca i32
%3 = load i32, i32* @CLOCK_MONOTONIC
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %1)
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
%10 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 1
%11 = load i64, i64* %10
%12 = sitofp i64 %11 to double
%13 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 0
%14 = load i64, i64* %13
%15 = sitofp i64 %14 to double
%16 = call double @llvm.fmuladd.f64(double %15, double 1.000000e-09, double %12)
ret double %16
}

LLVM IR (-O2):
%struct.timespec = type { i64, i64 }
@CLOCK_MONOTONIC = global i32 0
define double @GetNanoTimed() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = load i32, i32* @CLOCK_MONOTONIC
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %1)
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%9 = load i64, i64* %8
%10 = sitofp i64 %9 to double
%11 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%12 = load i64, i64* %11
%13 = sitofp i64 %12 to double
%14 = call double @llvm.fmuladd.f64(double %13, double 1.000000e-09, double %10)
ret double %14
}
/* Type definitions */
typedef int /*<<< orphan*/ SSL;

/* Variables and functions */
int ssl3_shutdown(int /*<<< orphan*/ *);
int dtls1_shutdown(SSL *s) {
  int ret;
  ret = ssl3_shutdown(s);
  return ret;
}


x86 assembly (clang, -O0):
<dtls1_shutdown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ssl3_shutdown@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dtls1_shutdown>:
jmp    1030 <ssl3_shutdown@plt>

LLVM IR (-O0):
define i32 @dtls1_shutdown(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @ssl3_shutdown(i32* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @dtls1_shutdown(i32* %0) {
%2 = tail call i32 @ssl3_shutdown(i32* %0)
ret i32 %2
}
void prepare_sim2_or_3_const_device_(long *Mesh_pointer,
                                     int *islice_selected_rec,
                                     int *islice_selected_rec_size,
                                     int *nadj_rec_local, int *nrec) {}


x86 assembly (clang, -O0):
<prepare_sim2_or_3_const_device_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<prepare_sim2_or_3_const_device_>:
ret

LLVM IR (-O0):
define void @prepare_sim2_or_3_const_device_(i64* %0, i32* %1, i32* %2, i32* %3, i32* %4) {
%6 = alloca i64*
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca i32*
store i64* %0, i64** %6
store i32* %1, i32** %7
store i32* %2, i32** %8
store i32* %3, i32** %9
store i32* %4, i32** %10
ret void
}

LLVM IR (-O2):
define void @prepare_sim2_or_3_const_device_(i64* nocapture %0, i32* nocapture %1, i32* nocapture %2, i32* nocapture %3, i32* nocapture %4) {
ret void
}
/* Variables and functions */
unsigned int *sn_io_addr(unsigned long);
int /*<<< orphan*/ sn_mmiob();
void __sn_outl(unsigned int val, unsigned long port) {
  volatile unsigned int *addr;
  if ((addr = sn_io_addr(port))) {
    *addr = val;
    sn_mmiob();
  }
}


x86 assembly (clang, -O0):
<__sn_outl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <sn_io_addr@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
je     1156 <__sn_outl+0x36>
mov    -0x4(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    $0x0,%al
call   1040 <sn_mmiob@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sn_outl>:
push   %rbx
mov    %edi,%ebx
mov    %rsi,%rdi
call   1030 <sn_io_addr@plt>
test   %rax,%rax
je     113a <__sn_outl+0x1a>
mov    %ebx,(%rax)
xor    %eax,%eax
pop    %rbx
jmp    1040 <sn_mmiob@plt>
pop    %rbx
ret

LLVM IR (-O0):
define void @__sn_outl(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i32*
store i32 %0, i32* %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = call i32* @sn_io_addr(i64 %6)
store i32* %7, i32** %5
%8 = icmp ne i32* %7, null
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i32, i32* %3
%11 = load i32*, i32** %5
store volatile i32 %10, i32* %11
%12 = call i32 (...) @sn_mmiob()
br label %13
13: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
define void @__sn_outl(i32 %0, i64 %1) {
%3 = tail call i32* @sn_io_addr(i64 %1)
%4 = icmp eq i32* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
store volatile i32 %0, i32* %3
%6 = tail call i32 (...) @sn_mmiob()
br label %7
7: ; preds = %5, %2
ret void
}
/* Variables and functions */
bool opt_validate_checksum(int options) { return (options & 1) == 0; }


x86 assembly (clang, -O0):
<opt_validate_checksum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<opt_validate_checksum>:
mov    %edi,%eax
not    %eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @opt_validate_checksum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 1
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @opt_validate_checksum(i32 %0) {
%2 = and i32 %0, 1
%3 = xor i32 %2, 1
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ SSL;

/* Variables and functions */
int SSL_TLSEXT_ERR_NOACK;
int cb_server_rejects_npn(SSL *s, const unsigned char **data, unsigned int *len,
                          void *arg) {
  return (SSL_TLSEXT_ERR_NOACK);
}


x86 assembly (clang, -O0):
<cb_server_rejects_npn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cb_server_rejects_npn>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@SSL_TLSEXT_ERR_NOACK = global i32 0
define i32 @cb_server_rejects_npn(i32* %0, i8** %1, i32* %2, i8* %3) {
%5 = alloca i32*
%6 = alloca i8**
%7 = alloca i32*
%8 = alloca i8*
store i32* %0, i32** %5
store i8** %1, i8*** %6
store i32* %2, i32** %7
store i8* %3, i8** %8
%9 = load i32, i32* @SSL_TLSEXT_ERR_NOACK
ret i32 %9
}

LLVM IR (-O2):
@SSL_TLSEXT_ERR_NOACK = global i32 0
define i32 @cb_server_rejects_npn(i32* nocapture readnone %0, i8** nocapture readnone %1, i32* nocapture readnone %2, i8* nocapture readnone %3) {
%5 = load i32, i32* @SSL_TLSEXT_ERR_NOACK
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
main() { printf("%\n", sizeof(int)); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 4)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(double **);
int /*<<< orphan*/ hyperplane_destroy(double *);
void eigg_hyperplane_ary_destroy(double **hyperplane_ary, int num_hyperplanes) {
  int i = 0;
  for (i = 0; i < num_hyperplanes; ++i) {
    hyperplane_destroy(hyperplane_ary[i]);
  }
  free(hyperplane_ary);
}


x86 assembly (clang, -O0):
<eigg_hyperplane_ary_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1168 <eigg_hyperplane_ary_destroy+0x48>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1040 <hyperplane_destroy@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    113d <eigg_hyperplane_ary_destroy+0x1d>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eigg_hyperplane_ary_destroy>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
test   %esi,%esi
jle    1152 <eigg_hyperplane_ary_destroy+0x32>
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1040 <hyperplane_destroy@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1140 <eigg_hyperplane_ary_destroy+0x20>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @eigg_hyperplane_ary_destroy(double** %0, i32 %1) {
%3 = alloca double**
%4 = alloca i32
%5 = alloca i32
store double** %0, double*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load double**, double*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds double*, double** %11, i64 %13
%15 = load double*, double** %14
%16 = call i32 @hyperplane_destroy(double* %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = load double**, double*** %3
%22 = call i32 @free(double** %21)
ret void
}

LLVM IR (-O2):
define void @eigg_hyperplane_ary_destroy(double** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds double*, double** %0, i64 %7
%9 = load double*, double** %8
%10 = tail call i32 @hyperplane_destroy(double* %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = tail call i32 @free(double** %0)
ret void
}
int energymon_is_exclusive_cray_pm_energy(void) { return 0; }


x86 assembly (clang, -O0):
<energymon_is_exclusive_cray_pm_energy>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<energymon_is_exclusive_cray_pm_energy>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @energymon_is_exclusive_cray_pm_energy() {
ret i32 0
}

LLVM IR (-O2):
define i32 @energymon_is_exclusive_cray_pm_energy() {
ret i32 0
}
/* Type definitions */
typedef scalar_t__ volatile uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ _TimerBaseValid(scalar_t__ volatile);
void TimerIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags) {
  ASSERT(_TimerBaseValid(ui32Base));
  (*((volatile uint32_t *)(ui32Base + 0x00000018))) &= ~(ui32IntFlags);
}


x86 assembly (clang, -O0):
<TimerIntDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <_TimerBaseValid@plt>
mov    %eax,%edi
call   1030 <ASSERT@plt>
mov    -0x10(%rbp),%rdx
xor    $0xffffffffffffffff,%rdx
mov    -0x8(%rbp),%rax
mov    0x18(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x18(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerIntDisable>:
sub    $0x18,%rsp
mov    %rdi,0x8(%rsp)
mov    %rsi,0x10(%rsp)
mov    0x8(%rsp),%rdi
call   1040 <_TimerBaseValid@plt>
mov    %eax,%edi
call   1030 <ASSERT@plt>
mov    0x10(%rsp),%rax
not    %rax
mov    0x8(%rsp),%rcx
and    %rax,0x18(%rcx)
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @TimerIntDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %3
%6 = call i32 @_TimerBaseValid(i64 %5)
%7 = call i32 @ASSERT(i32 %6)
%8 = load volatile i64, i64* %4
%9 = xor i64 %8, -1
%10 = load volatile i64, i64* %3
%11 = add nsw i64 %10, 24
%12 = inttoptr i64 %11 to i64*
%13 = load volatile i64, i64* %12
%14 = and i64 %13, %9
store volatile i64 %14, i64* %12
ret void
}

LLVM IR (-O2):
define void @TimerIntDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %3
%6 = tail call i32 @_TimerBaseValid(i64 %5)
%7 = tail call i32 @ASSERT(i32 %6)
%8 = load volatile i64, i64* %4
%9 = xor i64 %8, -1
%10 = load volatile i64, i64* %3
%11 = add nsw i64 %10, 24
%12 = inttoptr i64 %11 to i64*
%13 = load volatile i64, i64* %12
%14 = and i64 %13, %9
store volatile i64 %14, i64* %12
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ a;

/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ test_palindrome(char const *, int, int);
void test8(void) {
  const char a[] = {'a', 'B', 'c', 'D', 'E', 'E', 'D', 'c', 'B', 'a'};
  test_palindrome(a, sizeof(a), 1);
  test_palindrome(a, sizeof(a), 2);
  printf("\n");
}


x86 assembly (clang, -O0):
<test8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xed1(%rip),%rax
mov    %rax,-0xa(%rbp)
mov    0xece(%rip),%ax
mov    %ax,-0x2(%rbp)
lea    -0xa(%rbp),%rdi
mov    $0xa,%esi
mov    $0x1,%edx
call   1040 <test_palindrome@plt>
lea    -0xa(%rbp),%rdi
mov    $0xa,%esi
mov    $0x2,%edx
call   1040 <test_palindrome@plt>
lea    0xe9f(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test8>:
push   %rbx
sub    $0x10,%rsp
movabs $0x6344454544634261,%rax
45 44 63
mov    %rax,(%rsp)
movw   $0x6142,0x8(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0xa,%esi
mov    $0x1,%edx
call   1040 <test_palindrome@plt>
mov    %rbx,%rdi
mov    $0xa,%esi
mov    $0x2,%edx
call   1040 <test_palindrome@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.test8.a = [10 x i8] c"aBcDEEDcBa"
@.str = [2 x i8] c"\0A\00"
define void @test8() {
%1 = alloca [10 x i8]
%2 = bitcast [10 x i8]* %1 to i8*
%3 = getelementptr inbounds [10 x i8], [10 x i8]* %1, i64 0, i64 0
%4 = call i32 @test_palindrome(i8* %3, i32 10, i32 1)
%5 = getelementptr inbounds [10 x i8], [10 x i8]* %1, i64 0, i64 0
%6 = call i32 @test_palindrome(i8* %5, i32 10, i32 2)
%7 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__const.test8.a = [10 x i8] c"aBcDEEDcBa"
define void @test8() {
%1 = alloca [10 x i8]
%2 = getelementptr inbounds [10 x i8], [10 x i8]* %1, i64 0, i64 0
%3 = call i32 @test_palindrome(i8* %2, i32 10, i32 1)
%4 = call i32 @test_palindrome(i8* %2, i32 10, i32 2)
%5 = call i32 @putchar(i32 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, int *);
int main() {
  int A, B;
  scanf(" %d %d", &A, &B);
  printf("PROD = %d\n", A * B);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1040 <scanf@plt>
mov    -0x8(%rbp),%esi
imul   -0xc(%rbp),%esi
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <scanf@plt>
mov    (%rsp),%esi
imul   0x4(%rsp),%esi
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c" %d %d\00"
@.str.1 = [11 x i8] c"PROD = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32* %2, i32* %3)
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = mul nsw i32 %5, %6
%8 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c" %d %d\00"
@.str.1 = [11 x i8] c"PROD = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2)
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = mul nsw i32 %7, %6
%9 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ ptsinc(int /*<<< orphan*/ *, int /*<<< orphan*/);
uint64_t ptsadd(uint64_t pts1, uint64_t pts2) {
  ptsinc(&pts1, pts2);
  return pts1;
}


x86 assembly (clang, -O0):
<ptsadd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    -0x4(%rbp),%rdi
call   1030 <ptsinc@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptsadd>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1030 <ptsinc@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ptsadd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i32 @ptsinc(i32* %3, i32 %5)
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @ptsadd(i32 %0, i32 %1) {
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 @ptsinc(i32* %3, i32 %1)
%5 = load i32, i32* %3
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ posix_binary_file_read(char *, char **, size_t *, int *);
void ext_status_read(char **buffer, size_t *buffer_size,
                     bool *needs_deallocation) {
  posix_binary_file_read("kaa_status.bin", buffer, buffer_size,
                         needs_deallocation);
}


x86 assembly (clang, -O0):
<ext_status_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
lea    0xec9(%rip),%rdi
call   1030 <posix_binary_file_read@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ext_status_read>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee0(%rip),%rdi
jmp    1030 <posix_binary_file_read@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"kaa_status.bin\00"
define void @ext_status_read(i8** %0, i64* %1, i32* %2) {
%4 = alloca i8**
%5 = alloca i64*
%6 = alloca i32*
store i8** %0, i8*** %4
store i64* %1, i64** %5
store i32* %2, i32** %6
%7 = load i8**, i8*** %4
%8 = load i64*, i64** %5
%9 = load i32*, i32** %6
%10 = call i32 @posix_binary_file_read(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8** %7, i64* %8, i32* %9)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"kaa_status.bin\00"
define void @ext_status_read(i8** %0, i64* %1, i32* %2) {
%4 = tail call i32 @posix_binary_file_read(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8** %0, i64* %1, i32* %2)
ret void
}
void g_byte_array_remove_index() {}


x86 assembly (clang, -O0):
<g_byte_array_remove_index>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_byte_array_remove_index>:
ret

LLVM IR (-O0):
define void @g_byte_array_remove_index() {
ret void
}

LLVM IR (-O2):
define void @g_byte_array_remove_index() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int sum_pow(int, int);
int main() {
  int count = 3;
  int exp = 4;
  printf("%d", sum_pow(3, 4));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
movl   $0x4,-0xc(%rbp)
mov    $0x3,%edi
mov    $0x4,%esi
call   1030 <sum_pow@plt>
mov    %eax,%esi
lea    0xeab(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x3,%edi
mov    $0x4,%esi
call   1030 <sum_pow@plt>
lea    0xec9(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 3, i32* %2
store i32 4, i32* %3
%4 = call i32 @sum_pow(i32 3, i32 4)
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @sum_pow(i32 3, i32 4)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void unlambdamarkovcircuit(void) { printf("unlambdamarkovcircuit\n"); }


x86 assembly (clang, -O0):
<unlambdamarkovcircuit>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<unlambdamarkovcircuit>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"unlambdamarkovcircuit\0A\00"
define void @unlambdamarkovcircuit() {
%1 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [22 x i8] c"unlambdamarkovcircuit\00"
define void @unlambdamarkovcircuit() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
ret void
}
int fcitx_utf8_valid_start(char c) {
  unsigned char uc = (unsigned char)c;
  if (!(uc & 0x80))
    return 1;
  if (!(uc & 0x40))
    return 0;
  return uc < 0xfe;
}


x86 assembly (clang, -O0):
<fcitx_utf8_valid_start>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
mov    %al,-0x6(%rbp)
movzbl -0x6(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
jne    112e <fcitx_utf8_valid_start+0x2e>
movl   $0x1,-0x4(%rbp)
jmp    115e <fcitx_utf8_valid_start+0x5e>
movzbl -0x6(%rbp),%eax
and    $0x40,%eax
cmp    $0x0,%eax
jne    114a <fcitx_utf8_valid_start+0x4a>
movl   $0x0,-0x4(%rbp)
jmp    115e <fcitx_utf8_valid_start+0x5e>
movzbl -0x6(%rbp),%eax
cmp    $0xfe,%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fcitx_utf8_valid_start>:
mov    $0x1,%eax
test   $0x80,%dil
je     111c <fcitx_utf8_valid_start+0x1c>
xor    %eax,%eax
test   $0x40,%dil
je     111c <fcitx_utf8_valid_start+0x1c>
xor    %eax,%eax
cmp    $0xfe,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @fcitx_utf8_valid_start(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
%5 = load i8, i8* %3
store i8 %5, i8* %4
%6 = load i8, i8* %4
%7 = zext i8 %6 to i32
%8 = and i32 %7, 128
%9 = icmp ne i32 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %1
store i32 1, i32* %2
br label %22
11: ; preds = %1
%12 = load i8, i8* %4
%13 = zext i8 %12 to i32
%14 = and i32 %13, 64
%15 = icmp ne i32 %14, 0
br i1 %15, label %17, label %16
16: ; preds = %11
store i32 0, i32* %2
br label %22
17: ; preds = %11
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = icmp slt i32 %19, 254
%21 = zext i1 %20 to i32
store i32 %21, i32* %2
br label %22
22: ; preds = %17, %16, %10
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @fcitx_utf8_valid_start(i8 signext %0) {
%2 = zext i8 %0 to i32
%3 = and i32 %2, 128
%4 = icmp eq i32 %3, 0
br i1 %4, label %11, label %5
5: ; preds = %1
%6 = and i32 %2, 64
%7 = icmp eq i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %5
%9 = icmp ult i8 %0, -2
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %5, %1, %8
%12 = phi i32 [ %10, %8 ], [ 1, %1 ], [ 0, %5 ]
ret i32 %12
}
/* Variables and functions */
int fabs(double);
double sin(double);
double sinc(double x) { return (fabs(x) < 1e-10) ? 1.0 : (sin(x) / x); }


x86 assembly (clang, -O0):
<sinc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <fabs@plt>
cvtsi2sd %eax,%xmm1
movsd  0xebd(%rip),%xmm0
ucomisd %xmm1,%xmm0
jbe    115f <sinc+0x3f>
movsd  0xeb3(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    1173 <sinc+0x53>
movsd  -0x8(%rbp),%xmm0
call   1040 <sin@plt>
divsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sinc>:
push   %rax
movsd  %xmm0,(%rsp)
call   1030 <fabs@plt>
test   %eax,%eax
jle    1140 <sinc+0x20>
movsd  (%rsp),%xmm0
call   1040 <sin@plt>
divsd  (%rsp),%xmm0
pop    %rax
ret
movsd  0xeb8(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @sinc(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @fabs(double %3)
%5 = sitofp i32 %4 to double
%6 = fcmp olt double %5, 1.000000e-10
br i1 %6, label %7, label %8
7: ; preds = %1
br label %13
8: ; preds = %1
%9 = load double, double* %2
%10 = call double @sin(double %9)
%11 = load double, double* %2
%12 = fdiv double %10, %11
br label %13
13: ; preds = %8, %7
%14 = phi double [ 1.000000e+00, %7 ], [ %12, %8 ]
ret double %14
}

LLVM IR (-O2):
define double @sinc(double %0) {
%2 = tail call i32 @fabs(double %0)
%3 = icmp slt i32 %2, 1
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call double @sin(double %0)
%6 = fdiv double %5, %0
br label %7
7: ; preds = %1, %4
%8 = phi double [ %6, %4 ], [ 1.000000e+00, %1 ]
ret double %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_login_monitor_get_timeout(void *m, uint64_t *timeout_usec) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_login_monitor_get_timeout>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ecb(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_login_monitor_get_timeout>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_login_monitor_get_timeout(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i32, i32* @EINVAL
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_login_monitor_get_timeout(i8* nocapture readnone %0, i32* nocapture readnone %1) {
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ abs(double);
void test_int(int i, unsigned u, long long ll, float f, double d) {
  (void)abs(i);
  (void)abs(u);
  int llabs;
  (void)llabs;
  (void)abs(ll);
  (void)abs(f);
  (void)abs(d);
}


x86 assembly (clang, -O0):
<test_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
movsd  %xmm1,-0x20(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
call   1030 <abs@plt>
mov    -0x8(%rbp),%eax
cvtsi2sd %rax,%xmm0
call   1030 <abs@plt>
cvtsi2sdq -0x10(%rbp),%xmm0
call   1030 <abs@plt>
movss  -0x14(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
call   1030 <abs@plt>
movsd  -0x20(%rbp),%xmm0
call   1030 <abs@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_int>:
push   %rbp
push   %rbx
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
movss  %xmm0,0xc(%rsp)
mov    %rdx,%rbx
mov    %esi,%ebp
xorps  %xmm0,%xmm0
cvtsi2sd %edi,%xmm0
call   1030 <abs@plt>
mov    %ebp,%eax
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
call   1030 <abs@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rbx,%xmm0
call   1030 <abs@plt>
movss  0xc(%rsp),%xmm0
cvtss2sd %xmm0,%xmm0
call   1030 <abs@plt>
movsd  0x10(%rsp),%xmm0
add    $0x18,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <abs@plt>

LLVM IR (-O0):
define void @test_int(i32 %0, i32 %1, i64 %2, float %3, double %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i64
%9 = alloca float
%10 = alloca double
%11 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i64 %2, i64* %8
store float %3, float* %9
store double %4, double* %10
%12 = load i32, i32* %6
%13 = sitofp i32 %12 to double
%14 = call i32 @abs(double %13)
%15 = load i32, i32* %7
%16 = uitofp i32 %15 to double
%17 = call i32 @abs(double %16)
%18 = load i32, i32* %11
%19 = load i64, i64* %8
%20 = sitofp i64 %19 to double
%21 = call i32 @abs(double %20)
%22 = load float, float* %9
%23 = fpext float %22 to double
%24 = call i32 @abs(double %23)
%25 = load double, double* %10
%26 = call i32 @abs(double %25)
ret void
}

LLVM IR (-O2):
define void @test_int(i32 %0, i32 %1, i64 %2, float %3, double %4) {
%6 = sitofp i32 %0 to double
%7 = tail call i32 @abs(double %6)
%8 = uitofp i32 %1 to double
%9 = tail call i32 @abs(double %8)
%10 = sitofp i64 %2 to double
%11 = tail call i32 @abs(double %10)
%12 = fpext float %3 to double
%13 = tail call i32 @abs(double %12)
%14 = tail call i32 @abs(double %4)
ret void
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ barrier();
int /*<<< orphan*/ simd();
int main(void) {
  simd();
  barrier();
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <simd@plt>
mov    $0x0,%al
call   1030 <barrier@plt>
mov    0x2e9c(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <simd@plt>
xor    %eax,%eax
call   1030 <barrier@plt>
mov    0x2eaa(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @simd()
%3 = call i32 (...) @barrier()
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 (...) @simd()
%2 = tail call i32 (...) @barrier()
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}