#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int get_cputype(int);
int get_vendor();
int /*<<< orphan*/ have_cpuid();
scalar_t__ support_avx();
int /*<<< orphan*/ support_avx2();
int /*<<< orphan*/ support_avx512();
int get_coretype(void) {
  int family, exfamily, model, exmodel, vendor, stepping;
  if (!have_cpuid())
    return 1;
  family = get_cputype(4);
  exfamily = get_cputype(1);
  model = get_cputype(5);
  exmodel = get_cputype(2);
  stepping = get_cputype(9);
  vendor = get_vendor();
  if (vendor == 1) {
    switch (family) {
    case 4:
      return 1;
    case 5:
      return 2;
    case 6:
      switch (exmodel) {
      case 0:
        switch (model) {
        case 0:
        case 1:
        case 2:
        case 3:
        case 4:
        case 5:
        case 6:
          return 14;
        case 7:
          return 4;
        case 8:
        case 10:
        case 11:
          return 5;
        case 9:
        case 13:
        case 14:
          return 8;
        case 15:
          return 14;
        }
        break;
      case 1:
        switch (model) {
        case 6:
          return 14;
        case 7:
          return 15;
        case 10:
        case 11:
        case 14:
        case 15:
          return 17;
        case 12:
          return 18;
        case 13:
          return 16;
        }
        break;
      case 2:
        switch (model) {
        case 5:
          return 17;
        case 10:
          if (support_avx())
            return 20;
          else
            return 17;
        case 12:
          return 17;
        case 13:
          if (support_avx())
            return 20;
          else
            return 17;
        case 14:
        case 15:
          return 17;
        }
        break;
      case 3:
        switch (model) {
        case 7:
          return 18;
        case 10:
        case 14:
          if (support_avx())
            return 20;
          else
            return 17;
        case 12:
        case 15:
          if (support_avx())
            return 24;
          else
            return 17;
        case 13:
          if (support_avx())
            return 24;
          else
            return 17;
        }
        break;
      case 4:
        switch (model) {
        case 5:
        case 6:
          if (support_avx())
            return 24;
          else
            return 17;
        case 7:
        case 15:
          if (support_avx())
            return 24;
          else
            return 17;
        case 14:
          if (support_avx())
            return 24;
          else
            return 17;
        case 12:
        case 13:
          return 17;
        }
        break;
      case 10:
        switch (model) {
        case 5:
        case 6:
          if (support_avx())
            return 24;
          else
            return 17;
        case 7:
          if (support_avx2())
            return 24;
          if (support_avx())
            return 20;
          else
            return 17;
        }
      case 5:
        switch (model) {
        case 6:
          if (support_avx())
            return 24;
          else
            return 17;
        case 5:
          if (support_avx())
            return 24;
          else
            return 17;
        case 14:
          if (support_avx())
            return 24;
          else
            return 17;
        case 7:
          if (support_avx())
            return 24;
          else
            return 17;
        case 12:
          return 17;
        }
        break;
      case 6:
        if (model == 6)
          if (support_avx())
            return 24;
          else
            return 17;
        if (model == 10)
          if (support_avx())
            return 24;
          else
            return 17;
        break;
      case 7:
        if (model == 10)
          return 17;
        if (model == 14)
          if (support_avx())
            return 24;
          else
            return 17;
        break;
      case 9:
      case 8:
        if (model == 12) {
          if (support_avx512())
            return 28;
          if (support_avx2())
            return 24;
          if (support_avx())
            return 20;
          else
            return 17;
        }
        if (model == 14) {
          if (support_avx())
            return 24;
          else
            return 17;
        }
      }
      break;
    case 15:
      if (model <= 0x2)
        return 6;
      else
        return 7;
    }
  }
  if (vendor == 3) {
    if (family <= 0x5)
      return 1;
    if (family <= 0xe)
      return 11;
    if (family == 0xf) {
      if ((exfamily == 0) || (exfamily == 2))
        return 10;
      else if (exfamily == 5)
        return 21;
      else if (exfamily == 6) {
        switch (model) {
        case 1:
          if (support_avx())
            return 22;
          else
            return 11;
        case 2:
        case 3:
          if (support_avx())
            return 23;
          else
            return 11;
        case 5:
          if (support_avx())
            return 26;
          else
            return 11;
        case 0:
        case 8:
          switch (exmodel) {
          case 1:
            if (support_avx())
              return 23;
            else
              return 11;
          case 3:
            if (support_avx())
              return 25;
            else
              return 11;
          case 6:
            if (support_avx())
              return 26;
            else
              return 11;
          }
          break;
        }
      } else if (exfamily == 8 || exfamily == 10) {
        switch (model) {
        case 1:
        case 8:
        default:
          if (support_avx())
            return 27;
          else
            return 11;
        }
      } else {
        return 11;
      }
    }
  }
  if (vendor == 11) {
    if (family == 0xf) {
      if (exfamily == 9) {
        if (support_avx())
          return 27;
        else
          return 11;
      } else {
        return 11;
      }
    }
  }
  if (vendor == 6) {
    switch (family) {
    case 0x6:
      if (model == 0xf && stepping < 0xe)
        return 19;
      return 17;
    default:
      if (family >= 0x7)
        return 17;
      else
        return 12;
    }
  }
  if (vendor == 12) {
    return 17;
  }
  return 0;
}


x86 assembly (clang, -O0):
<get_coretype>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
mov    $0x0,%al
call   1080 <have_cpuid@plt>
cmp    $0x0,%eax
jne    1187 <get_coretype+0x27>
movl   $0x1,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x4,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x8(%rbp)
mov    $0x1,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0xc(%rbp)
mov    $0x5,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x10(%rbp)
mov    $0x2,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x14(%rbp)
mov    $0x9,%edi
call   1030 <get_cputype@plt>
mov    %eax,-0x1c(%rbp)
mov    $0x0,%al
call   1050 <get_vendor@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x1,-0x18(%rbp)
jne    1821 <get_coretype+0x6c1>
mov    -0x8(%rbp),%eax
add    $0xfffffffc,%eax
mov    %eax,%ecx
mov    %rcx,-0x28(%rbp)
sub    $0xb,%eax
ja     181c <get_coretype+0x6bc>
mov    -0x28(%rbp),%rax
lea    0xe04(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x2,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    -0x14(%rbp),%eax
mov    %rax,-0x30(%rbp)
sub    $0xa,%rax
ja     17f5 <get_coretype+0x695>
mov    -0x30(%rbp),%rax
lea    0xdf7(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x10(%rbp),%eax
mov    %rax,-0x38(%rbp)
sub    $0xf,%rax
ja     12a3 <get_coretype+0x143>
mov    -0x38(%rbp),%rax
lea    0xeca(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0xe,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x4,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x5,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x8,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0xe,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
jmp    17f5 <get_coretype+0x695>
mov    -0x10(%rbp),%eax
add    $0xfffffffa,%eax
mov    %eax,%ecx
mov    %rcx,-0x40(%rbp)
sub    $0x9,%eax
ja     130d <get_coretype+0x1ad>
mov    -0x40(%rbp),%rax
lea    0xe38(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0xe,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0xf,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x12,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x10,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
jmp    17f5 <get_coretype+0x695>
mov    -0x10(%rbp),%eax
add    $0xfffffffb,%eax
mov    %eax,%ecx
mov    %rcx,-0x48(%rbp)
sub    $0xa,%eax
ja     13b1 <get_coretype+0x251>
mov    -0x48(%rbp),%rax
lea    0xda2(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     1364 <get_coretype+0x204>
movl   $0x14,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     1399 <get_coretype+0x239>
movl   $0x14,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
jmp    17f5 <get_coretype+0x695>
mov    -0x10(%rbp),%eax
add    $0xfffffff9,%eax
mov    %eax,%ecx
mov    %rcx,-0x50(%rbp)
sub    $0x8,%eax
ja     1466 <get_coretype+0x306>
mov    -0x50(%rbp),%rax
lea    0xcda(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x12,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     1408 <get_coretype+0x2a8>
movl   $0x14,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     1431 <get_coretype+0x2d1>
movl   $0x18,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     145a <get_coretype+0x2fa>
movl   $0x18,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
jmp    17f5 <get_coretype+0x695>
mov    -0x10(%rbp),%eax
add    $0xfffffffb,%eax
mov    %eax,%ecx
mov    %rcx,-0x58(%rbp)
sub    $0xa,%eax
ja     151b <get_coretype+0x3bb>
mov    -0x58(%rbp),%rax
lea    0xbf9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     14b1 <get_coretype+0x351>
movl   $0x18,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     14da <get_coretype+0x37a>
movl   $0x18,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     1503 <get_coretype+0x3a3>
movl   $0x18,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
jmp    17f5 <get_coretype+0x695>
mov    -0x10(%rbp),%eax
mov    %eax,-0x5c(%rbp)
add    $0xfffffffb,%eax
sub    $0x2,%eax
jb     1548 <get_coretype+0x3e8>
jmp    1537 <get_coretype+0x3d7>
mov    -0x5c(%rbp),%eax
sub    $0x7,%eax
je     1571 <get_coretype+0x411>
jmp    15b6 <get_coretype+0x456>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     1565 <get_coretype+0x405>
movl   $0x18,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x0,%al
call   1070 <support_avx2@plt>
cmp    $0x0,%eax
je     158d <get_coretype+0x42d>
movl   $0x18,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     15aa <get_coretype+0x44a>
movl   $0x14,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
jmp    15bb <get_coretype+0x45b>
mov    -0x10(%rbp),%eax
add    $0xfffffffb,%eax
mov    %eax,%ecx
mov    %rcx,-0x68(%rbp)
sub    $0x9,%eax
ja     1694 <get_coretype+0x534>
mov    -0x68(%rbp),%rax
lea    0xa81(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     1601 <get_coretype+0x4a1>
movl   $0x18,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     162a <get_coretype+0x4ca>
movl   $0x18,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     1653 <get_coretype+0x4f3>
movl   $0x18,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     167c <get_coretype+0x51c>
movl   $0x18,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
jmp    17f5 <get_coretype+0x695>
cmpl   $0x6,-0x10(%rbp)
jne    16cc <get_coretype+0x56c>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     16c0 <get_coretype+0x560>
movl   $0x18,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
cmpl   $0xa,-0x10(%rbp)
jne    16ff <get_coretype+0x59f>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     16f3 <get_coretype+0x593>
movl   $0x18,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
jmp    17f5 <get_coretype+0x695>
cmpl   $0xa,-0x10(%rbp)
jne    171a <get_coretype+0x5ba>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
cmpl   $0xe,-0x10(%rbp)
jne    174d <get_coretype+0x5ed>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     1741 <get_coretype+0x5e1>
movl   $0x18,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
jmp    17f5 <get_coretype+0x695>
cmpl   $0xc,-0x10(%rbp)
jne    17bd <get_coretype+0x65d>
mov    $0x0,%al
call   1040 <support_avx512@plt>
cmp    $0x0,%eax
je     1778 <get_coretype+0x618>
movl   $0x1c,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x0,%al
call   1070 <support_avx2@plt>
cmp    $0x0,%eax
je     1794 <get_coretype+0x634>
movl   $0x18,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     17b1 <get_coretype+0x651>
movl   $0x14,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
cmpl   $0xe,-0x10(%rbp)
jne    17f0 <get_coretype+0x690>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     17e4 <get_coretype+0x684>
movl   $0x18,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
jmp    17f5 <get_coretype+0x695>
jmp    181c <get_coretype+0x6bc>
cmpl   $0x2,-0x10(%rbp)
jg     1810 <get_coretype+0x6b0>
movl   $0x6,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x7,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
jmp    1821 <get_coretype+0x6c1>
cmpl   $0x3,-0x18(%rbp)
jne    1a83 <get_coretype+0x923>
cmpl   $0x5,-0x8(%rbp)
jg     1841 <get_coretype+0x6e1>
movl   $0x1,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
cmpl   $0xe,-0x8(%rbp)
jg     1857 <get_coretype+0x6f7>
movl   $0xb,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
cmpl   $0xf,-0x8(%rbp)
jne    1a7e <get_coretype+0x91e>
cmpl   $0x0,-0xc(%rbp)
je     1875 <get_coretype+0x715>
cmpl   $0x2,-0xc(%rbp)
jne    1881 <get_coretype+0x721>
movl   $0xa,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
cmpl   $0x5,-0xc(%rbp)
jne    1897 <get_coretype+0x737>
movl   $0x15,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
cmpl   $0x6,-0xc(%rbp)
jne    19fc <get_coretype+0x89c>
mov    -0x10(%rbp),%eax
mov    %rax,-0x70(%rbp)
sub    $0x8,%rax
ja     19f7 <get_coretype+0x897>
mov    -0x70(%rbp),%rax
lea    0x8ab(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     18e3 <get_coretype+0x783>
movl   $0x16,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0xb,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     190c <get_coretype+0x7ac>
movl   $0x17,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0xb,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     1935 <get_coretype+0x7d5>
movl   $0x1a,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0xb,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    -0x14(%rbp),%eax
mov    %eax,-0x74(%rbp)
sub    $0x1,%eax
je     1977 <get_coretype+0x817>
jmp    1955 <get_coretype+0x7f5>
mov    -0x74(%rbp),%eax
sub    $0x3,%eax
je     19a0 <get_coretype+0x840>
jmp    1966 <get_coretype+0x806>
mov    -0x74(%rbp),%eax
sub    $0x6,%eax
je     19c9 <get_coretype+0x869>
jmp    19f2 <get_coretype+0x892>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     1994 <get_coretype+0x834>
movl   $0x17,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0xb,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     19bd <get_coretype+0x85d>
movl   $0x19,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0xb,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     19e6 <get_coretype+0x886>
movl   $0x1a,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0xb,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
jmp    19f7 <get_coretype+0x897>
jmp    1a6f <get_coretype+0x90f>
cmpl   $0x8,-0xc(%rbp)
je     1a10 <get_coretype+0x8b0>
cmpl   $0xa,-0xc(%rbp)
jne    1a63 <get_coretype+0x903>
mov    -0x10(%rbp),%eax
mov    %eax,-0x78(%rbp)
sub    $0x1,%eax
je     1a35 <get_coretype+0x8d5>
jmp    1a24 <get_coretype+0x8c4>
mov    -0x78(%rbp),%eax
sub    $0x8,%eax
jne    1a3a <get_coretype+0x8da>
jmp    1a35 <get_coretype+0x8d5>
jmp    1a3a <get_coretype+0x8da>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     1a57 <get_coretype+0x8f7>
movl   $0x1b,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0xb,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0xb,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
jmp    1a74 <get_coretype+0x914>
jmp    1a79 <get_coretype+0x919>
jmp    1a7e <get_coretype+0x91e>
jmp    1a83 <get_coretype+0x923>
cmpl   $0xb,-0x18(%rbp)
jne    1adb <get_coretype+0x97b>
cmpl   $0xf,-0x8(%rbp)
jne    1ad6 <get_coretype+0x976>
cmpl   $0x9,-0xc(%rbp)
jne    1aca <get_coretype+0x96a>
mov    $0x0,%al
call   1060 <support_avx@plt>
cmp    $0x0,%rax
je     1abe <get_coretype+0x95e>
movl   $0x1b,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0xb,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0xb,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
jmp    1adb <get_coretype+0x97b>
cmpl   $0x6,-0x18(%rbp)
jne    1b44 <get_coretype+0x9e4>
mov    -0x8(%rbp),%eax
sub    $0x6,%eax
jne    1b22 <get_coretype+0x9c2>
jmp    1af6 <get_coretype+0x996>
cmpl   $0xf,-0x10(%rbp)
jne    1b16 <get_coretype+0x9b6>
cmpl   $0xe,-0x1c(%rbp)
jge    1b16 <get_coretype+0x9b6>
movl   $0x13,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
cmpl   $0x7,-0x8(%rbp)
jl     1b38 <get_coretype+0x9d8>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0xc,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
cmpl   $0xc,-0x18(%rbp)
jne    1b5a <get_coretype+0x9fa>
movl   $0x11,-0x4(%rbp)
jmp    1b61 <get_coretype+0xa01>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_coretype>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
xor    %eax,%eax
call   1080 <have_cpuid@plt>
test   %eax,%eax
je     1201 <get_coretype+0xa1>
mov    $0x4,%edi
call   1030 <get_cputype@plt>
mov    %eax,%ebp
mov    $0x1,%r13d
mov    $0x1,%edi
call   1030 <get_cputype@plt>
mov    %eax,%r12d
mov    $0x5,%edi
call   1030 <get_cputype@plt>
mov    %eax,%r14d
mov    $0x2,%edi
call   1030 <get_cputype@plt>
mov    %eax,%r15d
mov    $0x9,%edi
call   1030 <get_cputype@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <get_vendor@plt>
cmp    $0x3,%eax
je     120c <get_coretype+0xac>
cmp    $0x1,%eax
jne    12a3 <get_coretype+0x143>
add    $0xfffffffc,%ebp
cmp    $0xb,%ebp
ja     148d <get_coretype+0x32d>
mov    $0x1,%r13d
lea    0xe37(%rip),%rax
movslq (%rax,%rbp,4),%rcx
add    %rax,%rcx
jmp    *%rcx
mov    $0x2,%r13d
jmp    14d3 <get_coretype+0x373>
mov    $0x1,%r13d
jmp    14d3 <get_coretype+0x373>
cmp    $0x6,%ebp
jl     14d3 <get_coretype+0x373>
mov    $0xb,%r13d
cmp    $0xf,%ebp
jb     14d3 <get_coretype+0x373>
jne    148d <get_coretype+0x32d>
mov    %r12d,%eax
and    $0xfffffffd,%eax
je     1383 <get_coretype+0x223>
cmp    $0x5,%r12d
je     138e <get_coretype+0x22e>
cmp    $0x6,%r12d
jne    1399 <get_coretype+0x239>
cmp    $0x8,%r14d
ja     148d <get_coretype+0x32d>
mov    %r14d,%eax
lea    0xda2(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
cmp    $0x6,%r15d
je     150f <get_coretype+0x3af>
cmp    $0x3,%r15d
je     1545 <get_coretype+0x3e5>
cmp    $0x1,%r15d
jne    148d <get_coretype+0x32d>
xor    %eax,%eax
call   1060 <support_avx@plt>
test   %rax,%rax
mov    $0xb,%eax
mov    $0x17,%r13d
cmove  %eax,%r13d
jmp    14d3 <get_coretype+0x373>
cmp    $0xb,%eax
jne    12db <get_coretype+0x17b>
cmp    $0xf,%ebp
jne    12db <get_coretype+0x17b>
mov    $0xb,%r13d
cmp    $0x9,%r12d
jne    14d3 <get_coretype+0x373>
xor    %eax,%eax
call   1060 <support_avx@plt>
xor    %r13d,%r13d
test   %rax,%rax
setne  %r13b
shl    $0x4,%r13d
or     $0xb,%r13d
jmp    14d3 <get_coretype+0x373>
cmp    $0xc,%eax
je     1492 <get_coretype+0x332>
cmp    $0x6,%eax
jne    148d <get_coretype+0x32d>
cmp    $0x6,%ebp
jne    1370 <get_coretype+0x210>
cmp    $0xf,%r14d
sete   %al
cmp    $0xe,%ebx
setl   %cl
and    %al,%cl
movzbl %cl,%eax
lea    (%rax,%rax,1),%r13d
add    $0x11,%r13d
jmp    14d3 <get_coretype+0x373>
cmp    $0xa,%r15d
ja     148d <get_coretype+0x32d>
mov    %r15d,%eax
lea    0xd2f(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
cmp    $0xe,%r14d
je     14ba <get_coretype+0x35a>
cmp    $0xc,%r14d
jne    148d <get_coretype+0x32d>
xor    %eax,%eax
call   1040 <support_avx512@plt>
mov    $0x1c,%r13d
test   %eax,%eax
jne    14d3 <get_coretype+0x373>
jmp    14e5 <get_coretype+0x385>
xor    %r13d,%r13d
cmp    $0x3,%r14d
setl   %r13b
xor    $0x7,%r13d
jmp    14d3 <get_coretype+0x373>
setg   %al
movzbl %al,%eax
lea    (%rax,%rax,4),%r13d
add    $0xc,%r13d
jmp    14d3 <get_coretype+0x373>
mov    $0xa,%r13d
jmp    14d3 <get_coretype+0x373>
mov    $0x15,%r13d
jmp    14d3 <get_coretype+0x373>
cmp    $0x8,%eax
je     12bd <get_coretype+0x15d>
jmp    14d3 <get_coretype+0x373>
cmp    $0x10,%r14d
jae    148d <get_coretype+0x32d>
movslq %r14d,%rax
lea    0xd65(%rip),%rcx
jmp    13d5 <get_coretype+0x275>
add    $0xfffffffa,%r14d
cmp    $0xa,%r14d
jae    148d <get_coretype+0x32d>
movslq %r14d,%rax
lea    0xd8b(%rip),%rcx
mov    (%rcx,%rax,4),%r13d
jmp    14d3 <get_coretype+0x373>
cmp    $0xf,%r14d
ja     148d <get_coretype+0x32d>
mov    $0x11,%r13d
mov    $0xd020,%eax
bt     %r14d,%eax
jb     14d3 <get_coretype+0x373>
cmp    $0xa,%r14d
je     14f6 <get_coretype+0x396>
cmp    $0xd,%r14d
je     14f6 <get_coretype+0x396>
jmp    148d <get_coretype+0x32d>
add    $0xfffffff9,%r14d
cmp    $0x8,%r14d
ja     148d <get_coretype+0x32d>
mov    $0x12,%r13d
lea    0xcd2(%rip),%rax
movslq (%rax,%r14,4),%rcx
add    %rax,%rcx
jmp    *%rcx
add    $0xfffffffb,%r14d
cmp    $0xa,%r14d
ja     148d <get_coretype+0x32d>
mov    $0x11,%r13d
lea    0xc86(%rip),%rax
movslq (%rax,%r14,4),%rcx
add    %rax,%rcx
jmp    *%rcx
add    $0xfffffffb,%r14d
cmp    $0x9,%r14d
ja     148d <get_coretype+0x32d>
mov    $0x11,%r13d
lea    0xc16(%rip),%rax
movslq (%rax,%r14,4),%rcx
add    %rax,%rcx
jmp    *%rcx
cmp    $0xa,%r14d
je     14ba <get_coretype+0x35a>
cmp    $0x6,%r14d
je     14ba <get_coretype+0x35a>
jmp    148d <get_coretype+0x32d>
cmp    $0xa,%r14d
je     1492 <get_coretype+0x332>
cmp    $0xe,%r14d
je     14ba <get_coretype+0x35a>
xor    %r13d,%r13d
jmp    14d3 <get_coretype+0x373>
mov    $0x11,%r13d
jmp    14d3 <get_coretype+0x373>
add    $0xfffffffb,%r14d
cmp    $0x9,%r14d
ja     148d <get_coretype+0x32d>
mov    $0x11,%r13d
lea    0xbf7(%rip),%rax
movslq (%rax,%r14,4),%rcx
add    %rax,%rcx
jmp    *%rcx
xor    %eax,%eax
call   1060 <support_avx@plt>
test   %rax,%rax
mov    $0x11,%eax
mov    $0x18,%r13d
cmove  %eax,%r13d
mov    %r13d,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret
xor    %eax,%eax
call   1070 <support_avx2@plt>
mov    $0x18,%r13d
test   %eax,%eax
jne    14d3 <get_coretype+0x373>
xor    %eax,%eax
call   1060 <support_avx@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
lea    (%rcx,%rcx,2),%r13d
add    $0x11,%r13d
jmp    14d3 <get_coretype+0x373>
xor    %eax,%eax
call   1060 <support_avx@plt>
test   %rax,%rax
mov    $0xb,%eax
mov    $0x1a,%r13d
cmove  %eax,%r13d
jmp    14d3 <get_coretype+0x373>
xor    %eax,%eax
call   1060 <support_avx@plt>
test   %rax,%rax
mov    $0xb,%eax
mov    $0x16,%r13d
cmove  %eax,%r13d
jmp    14d3 <get_coretype+0x373>
xor    %eax,%eax
call   1060 <support_avx@plt>
test   %rax,%rax
mov    $0xb,%eax
mov    $0x19,%r13d
cmove  %eax,%r13d
jmp    14d3 <get_coretype+0x373>

LLVM IR (-O0):
define i32 @get_coretype() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = call i32 (...) @have_cpuid()
%9 = icmp ne i32 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %0
store i32 1, i32* %1
br label %321
11: ; preds = %0
%12 = call i32 @get_cputype(i32 4)
store i32 %12, i32* %2
%13 = call i32 @get_cputype(i32 1)
store i32 %13, i32* %3
%14 = call i32 @get_cputype(i32 5)
store i32 %14, i32* %4
%15 = call i32 @get_cputype(i32 2)
store i32 %15, i32* %5
%16 = call i32 @get_cputype(i32 9)
store i32 %16, i32* %7
%17 = call i32 (...) @get_vendor()
store i32 %17, i32* %6
%18 = load i32, i32* %6
%19 = icmp eq i32 %18, 1
br i1 %19, label %20, label %199
20: ; preds = %11
%21 = load i32, i32* %2
switch i32 %21, label %198 [
i32 4, label %22
i32 5, label %23
i32 6, label %24
i32 15, label %193
]
22: ; preds = %20
store i32 1, i32* %1
br label %321
23: ; preds = %20
store i32 2, i32* %1
br label %321
24: ; preds = %20
%25 = load i32, i32* %5
switch i32 %25, label %192 [
i32 0, label %26
i32 1, label %34
i32 2, label %42
i32 3, label %58
i32 4, label %77
i32 10, label %96
i32 5, label %113
i32 6, label %137
i32 7, label %154
i32 9, label %167
i32 8, label %167
]
26: ; preds = %24
%27 = load i32, i32* %4
switch i32 %27, label %33 [
i32 0, label %28
i32 1, label %28
i32 2, label %28
i32 3, label %28
i32 4, label %28
i32 5, label %28
i32 6, label %28
i32 7, label %29
i32 8, label %30
i32 10, label %30
i32 11, label %30
i32 9, label %31
i32 13, label %31
i32 14, label %31
i32 15, label %32
]
28: ; preds = %26, %26, %26, %26, %26, %26, %26
store i32 14, i32* %1
br label %321
29: ; preds = %26
store i32 4, i32* %1
br label %321
30: ; preds = %26, %26, %26
store i32 5, i32* %1
br label %321
31: ; preds = %26, %26, %26
store i32 8, i32* %1
br label %321
32: ; preds = %26
store i32 14, i32* %1
br label %321
33: ; preds = %26
br label %192
34: ; preds = %24
%35 = load i32, i32* %4
switch i32 %35, label %41 [
i32 6, label %36
i32 7, label %37
i32 10, label %38
i32 11, label %38
i32 14, label %38
i32 15, label %38
i32 12, label %39
i32 13, label %40
]
36: ; preds = %34
store i32 14, i32* %1
br label %321
37: ; preds = %34
store i32 15, i32* %1
br label %321
38: ; preds = %34, %34, %34, %34
store i32 17, i32* %1
br label %321
39: ; preds = %34
store i32 18, i32* %1
br label %321
40: ; preds = %34
store i32 16, i32* %1
br label %321
41: ; preds = %34
br label %192
42: ; preds = %24
%43 = load i32, i32* %4
switch i32 %43, label %57 [
i32 5, label %44
i32 10, label %45
i32 12, label %50
i32 13, label %51
i32 14, label %56
i32 15, label %56
]
44: ; preds = %42
store i32 17, i32* %1
br label %321
45: ; preds = %42
%46 = call i64 (...) @support_avx()
%47 = icmp ne i64 %46, 0
br i1 %47, label %48, label %49
48: ; preds = %45
store i32 20, i32* %1
br label %321
49: ; preds = %45
store i32 17, i32* %1
br label %321
50: ; preds = %42
store i32 17, i32* %1
br label %321
51: ; preds = %42
%52 = call i64 (...) @support_avx()
%53 = icmp ne i64 %52, 0
br i1 %53, label %54, label %55
54: ; preds = %51
store i32 20, i32* %1
br label %321
55: ; preds = %51
store i32 17, i32* %1
br label %321
56: ; preds = %42, %42
store i32 17, i32* %1
br label %321
57: ; preds = %42
br label %192
58: ; preds = %24
%59 = load i32, i32* %4
switch i32 %59, label %76 [
i32 7, label %60
i32 10, label %61
i32 14, label %61
i32 12, label %66
i32 15, label %66
i32 13, label %71
]
60: ; preds = %58
store i32 18, i32* %1
br label %321
61: ; preds = %58, %58
%62 = call i64 (...) @support_avx()
%63 = icmp ne i64 %62, 0
br i1 %63, label %64, label %65
64: ; preds = %61
store i32 20, i32* %1
br label %321
65: ; preds = %61
store i32 17, i32* %1
br label %321
66: ; preds = %58, %58
%67 = call i64 (...) @support_avx()
%68 = icmp ne i64 %67, 0
br i1 %68, label %69, label %70
69: ; preds = %66
store i32 24, i32* %1
br label %321
70: ; preds = %66
store i32 17, i32* %1
br label %321
71: ; preds = %58
%72 = call i64 (...) @support_avx()
%73 = icmp ne i64 %72, 0
br i1 %73, label %74, label %75
74: ; preds = %71
store i32 24, i32* %1
br label %321
75: ; preds = %71
store i32 17, i32* %1
br label %321
76: ; preds = %58
br label %192
77: ; preds = %24
%78 = load i32, i32* %4
switch i32 %78, label %95 [
i32 5, label %79
i32 6, label %79
i32 7, label %84
i32 15, label %84
i32 14, label %89
i32 12, label %94
i32 13, label %94
]
79: ; preds = %77, %77
%80 = call i64 (...) @support_avx()
%81 = icmp ne i64 %80, 0
br i1 %81, label %82, label %83
82: ; preds = %79
store i32 24, i32* %1
br label %321
83: ; preds = %79
store i32 17, i32* %1
br label %321
84: ; preds = %77, %77
%85 = call i64 (...) @support_avx()
%86 = icmp ne i64 %85, 0
br i1 %86, label %87, label %88
87: ; preds = %84
store i32 24, i32* %1
br label %321
88: ; preds = %84
store i32 17, i32* %1
br label %321
89: ; preds = %77
%90 = call i64 (...) @support_avx()
%91 = icmp ne i64 %90, 0
br i1 %91, label %92, label %93
92: ; preds = %89
store i32 24, i32* %1
br label %321
93: ; preds = %89
store i32 17, i32* %1
br label %321
94: ; preds = %77, %77
store i32 17, i32* %1
br label %321
95: ; preds = %77
br label %192
96: ; preds = %24
%97 = load i32, i32* %4
switch i32 %97, label %112 [
i32 5, label %98
i32 6, label %98
i32 7, label %103
]
98: ; preds = %96, %96
%99 = call i64 (...) @support_avx()
%100 = icmp ne i64 %99, 0
br i1 %100, label %101, label %102
101: ; preds = %98
store i32 24, i32* %1
br label %321
102: ; preds = %98
store i32 17, i32* %1
br label %321
103: ; preds = %96
%104 = call i32 (...) @support_avx2()
%105 = icmp ne i32 %104, 0
br i1 %105, label %106, label %107
106: ; preds = %103
store i32 24, i32* %1
br label %321
107: ; preds = %103
%108 = call i64 (...) @support_avx()
%109 = icmp ne i64 %108, 0
br i1 %109, label %110, label %111
110: ; preds = %107
store i32 20, i32* %1
br label %321
111: ; preds = %107
store i32 17, i32* %1
br label %321
112: ; preds = %96
br label %113
113: ; preds = %24, %112
%114 = load i32, i32* %4
switch i32 %114, label %136 [
i32 6, label %115
i32 5, label %120
i32 14, label %125
i32 7, label %130
i32 12, label %135
]
115: ; preds = %113
%116 = call i64 (...) @support_avx()
%117 = icmp ne i64 %116, 0
br i1 %117, label %118, label %119
118: ; preds = %115
store i32 24, i32* %1
br label %321
119: ; preds = %115
store i32 17, i32* %1
br label %321
120: ; preds = %113
%121 = call i64 (...) @support_avx()
%122 = icmp ne i64 %121, 0
br i1 %122, label %123, label %124
123: ; preds = %120
store i32 24, i32* %1
br label %321
124: ; preds = %120
store i32 17, i32* %1
br label %321
125: ; preds = %113
%126 = call i64 (...) @support_avx()
%127 = icmp ne i64 %126, 0
br i1 %127, label %128, label %129
128: ; preds = %125
store i32 24, i32* %1
br label %321
129: ; preds = %125
store i32 17, i32* %1
br label %321
130: ; preds = %113
%131 = call i64 (...) @support_avx()
%132 = icmp ne i64 %131, 0
br i1 %132, label %133, label %134
133: ; preds = %130
store i32 24, i32* %1
br label %321
134: ; preds = %130
store i32 17, i32* %1
br label %321
135: ; preds = %113
store i32 17, i32* %1
br label %321
136: ; preds = %113
br label %192
137: ; preds = %24
%138 = load i32, i32* %4
%139 = icmp eq i32 %138, 6
br i1 %139, label %140, label %145
140: ; preds = %137
%141 = call i64 (...) @support_avx()
%142 = icmp ne i64 %141, 0
br i1 %142, label %143, label %144
143: ; preds = %140
store i32 24, i32* %1
br label %321
144: ; preds = %140
store i32 17, i32* %1
br label %321
145: ; preds = %137
%146 = load i32, i32* %4
%147 = icmp eq i32 %146, 10
br i1 %147, label %148, label %153
148: ; preds = %145
%149 = call i64 (...) @support_avx()
%150 = icmp ne i64 %149, 0
br i1 %150, label %151, label %152
151: ; preds = %148
store i32 24, i32* %1
br label %321
152: ; preds = %148
store i32 17, i32* %1
br label %321
153: ; preds = %145
br label %192
154: ; preds = %24
%155 = load i32, i32* %4
%156 = icmp eq i32 %155, 10
br i1 %156, label %157, label %158
157: ; preds = %154
store i32 17, i32* %1
br label %321
158: ; preds = %154
%159 = load i32, i32* %4
%160 = icmp eq i32 %159, 14
br i1 %160, label %161, label %166
161: ; preds = %158
%162 = call i64 (...) @support_avx()
%163 = icmp ne i64 %162, 0
br i1 %163, label %164, label %165
164: ; preds = %161
store i32 24, i32* %1
br label %321
165: ; preds = %161
store i32 17, i32* %1
br label %321
166: ; preds = %158
br label %192
167: ; preds = %24, %24
%168 = load i32, i32* %4
%169 = icmp eq i32 %168, 12
br i1 %169, label %170, label %183
170: ; preds = %167
%171 = call i32 (...) @support_avx512()
%172 = icmp ne i32 %171, 0
br i1 %172, label %173, label %174
173: ; preds = %170
store i32 28, i32* %1
br label %321
174: ; preds = %170
%175 = call i32 (...) @support_avx2()
%176 = icmp ne i32 %175, 0
br i1 %176, label %177, label %178
177: ; preds = %174
store i32 24, i32* %1
br label %321
178: ; preds = %174
%179 = call i64 (...) @support_avx()
%180 = icmp ne i64 %179, 0
br i1 %180, label %181, label %182
181: ; preds = %178
store i32 20, i32* %1
br label %321
182: ; preds = %178
store i32 17, i32* %1
br label %321
183: ; preds = %167
%184 = load i32, i32* %4
%185 = icmp eq i32 %184, 14
br i1 %185, label %186, label %191
186: ; preds = %183
%187 = call i64 (...) @support_avx()
%188 = icmp ne i64 %187, 0
br i1 %188, label %189, label %190
189: ; preds = %186
store i32 24, i32* %1
br label %321
190: ; preds = %186
store i32 17, i32* %1
br label %321
191: ; preds = %183
br label %192
192: ; preds = %191, %24, %166, %153, %136, %95, %76, %57, %41, %33
br label %198
193: ; preds = %20
%194 = load i32, i32* %4
%195 = icmp sle i32 %194, 2
br i1 %195, label %196, label %197
196: ; preds = %193
store i32 6, i32* %1
br label %321
197: ; preds = %193
store i32 7, i32* %1
br label %321
198: ; preds = %20, %192
br label %199
199: ; preds = %198, %11
%200 = load i32, i32* %6
%201 = icmp eq i32 %200, 3
br i1 %201, label %202, label %282
202: ; preds = %199
%203 = load i32, i32* %2
%204 = icmp sle i32 %203, 5
br i1 %204, label %205, label %206
205: ; preds = %202
store i32 1, i32* %1
br label %321
206: ; preds = %202
%207 = load i32, i32* %2
%208 = icmp sle i32 %207, 14
br i1 %208, label %209, label %210
209: ; preds = %206
store i32 11, i32* %1
br label %321
210: ; preds = %206
%211 = load i32, i32* %2
%212 = icmp eq i32 %211, 15
br i1 %212, label %213, label %281
213: ; preds = %210
%214 = load i32, i32* %3
%215 = icmp eq i32 %214, 0
br i1 %215, label %219, label %216
216: ; preds = %213
%217 = load i32, i32* %3
%218 = icmp eq i32 %217, 2
br i1 %218, label %219, label %220
219: ; preds = %216, %213
store i32 10, i32* %1
br label %321
220: ; preds = %216
%221 = load i32, i32* %3
%222 = icmp eq i32 %221, 5
br i1 %222, label %223, label %224
223: ; preds = %220
store i32 21, i32* %1
br label %321
224: ; preds = %220
%225 = load i32, i32* %3
%226 = icmp eq i32 %225, 6
br i1 %226, label %227, label %263
227: ; preds = %224
%228 = load i32, i32* %4
switch i32 %228, label %262 [
i32 1, label %229
i32 2, label %234
i32 3, label %234
i32 5, label %239
i32 0, label %244
i32 8, label %244
]
229: ; preds = %227
%230 = call i64 (...) @support_avx()
%231 = icmp ne i64 %230, 0
br i1 %231, label %232, label %233
232: ; preds = %229
store i32 22, i32* %1
br label %321
233: ; preds = %229
store i32 11, i32* %1
br label %321
234: ; preds = %227, %227
%235 = call i64 (...) @support_avx()
%236 = icmp ne i64 %235, 0
br i1 %236, label %237, label %238
237: ; preds = %234
store i32 23, i32* %1
br label %321
238: ; preds = %234
store i32 11, i32* %1
br label %321
239: ; preds = %227
%240 = call i64 (...) @support_avx()
%241 = icmp ne i64 %240, 0
br i1 %241, label %242, label %243
242: ; preds = %239
store i32 26, i32* %1
br label %321
243: ; preds = %239
store i32 11, i32* %1
br label %321
244: ; preds = %227, %227
%245 = load i32, i32* %5
switch i32 %245, label %261 [
i32 1, label %246
i32 3, label %251
i32 6, label %256
]
246: ; preds = %244
%247 = call i64 (...) @support_avx()
%248 = icmp ne i64 %247, 0
br i1 %248, label %249, label %250
249: ; preds = %246
store i32 23, i32* %1
br label %321
250: ; preds = %246
store i32 11, i32* %1
br label %321
251: ; preds = %244
%252 = call i64 (...) @support_avx()
%253 = icmp ne i64 %252, 0
br i1 %253, label %254, label %255
254: ; preds = %251
store i32 25, i32* %1
br label %321
255: ; preds = %251
store i32 11, i32* %1
br label %321
256: ; preds = %244
%257 = call i64 (...) @support_avx()
%258 = icmp ne i64 %257, 0
br i1 %258, label %259, label %260
259: ; preds = %256
store i32 26, i32* %1
br label %321
260: ; preds = %256
store i32 11, i32* %1
br label %321
261: ; preds = %244
br label %262
262: ; preds = %227, %261
br label %278
263: ; preds = %224
%264 = load i32, i32* %3
%265 = icmp eq i32 %264, 8
br i1 %265, label %269, label %266
266: ; preds = %263
%267 = load i32, i32* %3
%268 = icmp eq i32 %267, 10
br i1 %268, label %269, label %277
269: ; preds = %266, %263
%270 = load i32, i32* %4
switch i32 %270, label %272 [
i32 1, label %271
i32 8, label %271
]
271: ; preds = %269, %269
br label %272
272: ; preds = %269, %271
%273 = call i64 (...) @support_avx()
%274 = icmp ne i64 %273, 0
br i1 %274, label %275, label %276
275: ; preds = %272
store i32 27, i32* %1
br label %321
276: ; preds = %272
store i32 11, i32* %1
br label %321
277: ; preds = %266
store i32 11, i32* %1
br label %321
278: ; preds = %262
br label %279
279: ; preds = %278
br label %280
280: ; preds = %279
br label %281
281: ; preds = %280, %210
br label %282
282: ; preds = %281, %199
%283 = load i32, i32* %6
%284 = icmp eq i32 %283, 11
br i1 %284, label %285, label %298
285: ; preds = %282
%286 = load i32, i32* %2
%287 = icmp eq i32 %286, 15
br i1 %287, label %288, label %297
288: ; preds = %285
%289 = load i32, i32* %3
%290 = icmp eq i32 %289, 9
br i1 %290, label %291, label %296
291: ; preds = %288
%292 = call i64 (...) @support_avx()
%293 = icmp ne i64 %292, 0
br i1 %293, label %294, label %295
294: ; preds = %291
store i32 27, i32* %1
br label %321
295: ; preds = %291
store i32 11, i32* %1
br label %321
296: ; preds = %288
store i32 11, i32* %1
br label %321
297: ; preds = %285
br label %298
298: ; preds = %297, %282
%299 = load i32, i32* %6
%300 = icmp eq i32 %299, 6
br i1 %300, label %301, label %316
301: ; preds = %298
%302 = load i32, i32* %2
switch i32 %302, label %311 [
i32 6, label %303
]
303: ; preds = %301
%304 = load i32, i32* %4
%305 = icmp eq i32 %304, 15
br i1 %305, label %306, label %310
306: ; preds = %303
%307 = load i32, i32* %7
%308 = icmp slt i32 %307, 14
br i1 %308, label %309, label %310
309: ; preds = %306
store i32 19, i32* %1
br label %321
310: ; preds = %306, %303
store i32 17, i32* %1
br label %321
311: ; preds = %301
%312 = load i32, i32* %2
%313 = icmp sge i32 %312, 7
br i1 %313, label %314, label %315
314: ; preds = %311
store i32 17, i32* %1
br label %321
315: ; preds = %311
store i32 12, i32* %1
br label %321
316: ; preds = %298
%317 = load i32, i32* %6
%318 = icmp eq i32 %317, 12
br i1 %318, label %319, label %320
319: ; preds = %316
store i32 17, i32* %1
br label %321
320: ; preds = %316
store i32 0, i32* %1
br label %321
321: ; preds = %320, %319, %315, %314, %310, %309, %296, %295, %294, %277, %276, %275, %260, %259, %255, %254, %250, %249, %243, %242, %238, %237, %233, %232, %223, %219, %209, %205, %197, %196, %190, %189, %182, %181, %177, %173, %165, %164, %157, %152, %151, %144, %143, %135, %134, %133, %129, %128, %124, %123, %119, %118, %111, %110, %106, %102, %101, %94, %93, %92, %88, %87, %83, %82, %75, %74, %70, %69, %65, %64, %60, %56, %55, %54, %50, %49, %48, %44, %40, %39, %38, %37, %36, %32, %31, %30, %29, %28, %23, %22, %10
%322 = load i32, i32* %1
ret i32 %322
}

LLVM IR (-O2):
@switch.table.get_coretype = [16 x i32] [i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 4, i32 5, i32 8, i32 5, i32 5, i32 0, i32 8, i32 8, i32 14]
@switch.table.get_coretype.1 = [10 x i32] [i32 14, i32 15, i32 0, i32 0, i32 17, i32 17, i32 18, i32 16, i32 17, i32 17]
define i32 @get_coretype() {
%1 = tail call i32 (...) @have_cpuid()
%2 = icmp eq i32 %1, 0
br i1 %2, label %186, label %3
3: ; preds = %0
%4 = tail call i32 @get_cputype(i32 4)
%5 = tail call i32 @get_cputype(i32 1)
%6 = tail call i32 @get_cputype(i32 5)
%7 = tail call i32 @get_cputype(i32 2)
%8 = tail call i32 @get_cputype(i32 9)
%9 = tail call i32 (...) @get_vendor()
switch i32 %9, label %156 [
i32 1, label %10
i32 3, label %114
]
10: ; preds = %3
switch i32 %4, label %177 [
i32 4, label %186
i32 5, label %11
i32 6, label %12
i32 15, label %111
]
11: ; preds = %10
br label %186
12: ; preds = %10
switch i32 %7, label %177 [
i32 0, label %13
i32 1, label %15
i32 2, label %18
i32 3, label %27
i32 4, label %40
i32 10, label %53
i32 5, label %65
i32 6, label %82
i32 7, label %91
i32 9, label %96
i32 8, label %96
]
13: ; preds = %12
%14 = icmp ult i32 %6, 16
br i1 %14, label %178, label %177
15: ; preds = %12
%16 = add i32 %6, -6
%17 = icmp ult i32 %16, 10
br i1 %17, label %182, label %177
18: ; preds = %12
switch i32 %6, label %177 [
i32 5, label %186
i32 10, label %19
i32 12, label %186
i32 13, label %23
i32 14, label %186
i32 15, label %186
]
19: ; preds = %18
%20 = tail call i64 (...) @support_avx()
%21 = icmp eq i64 %20, 0
%22 = select i1 %21, i32 17, i32 20
br label %186
23: ; preds = %18
%24 = tail call i64 (...) @support_avx()
%25 = icmp eq i64 %24, 0
%26 = select i1 %25, i32 17, i32 20
br label %186
27: ; preds = %12
switch i32 %6, label %177 [
i32 7, label %186
i32 10, label %28
i32 14, label %28
i32 12, label %32
i32 15, label %32
i32 13, label %36
]
28: ; preds = %27, %27
%29 = tail call i64 (...) @support_avx()
%30 = icmp eq i64 %29, 0
%31 = select i1 %30, i32 17, i32 20
br label %186
32: ; preds = %27, %27
%33 = tail call i64 (...) @support_avx()
%34 = icmp eq i64 %33, 0
%35 = select i1 %34, i32 17, i32 24
br label %186
36: ; preds = %27
%37 = tail call i64 (...) @support_avx()
%38 = icmp eq i64 %37, 0
%39 = select i1 %38, i32 17, i32 24
br label %186
40: ; preds = %12
switch i32 %6, label %177 [
i32 5, label %41
i32 6, label %41
i32 7, label %45
i32 15, label %45
i32 14, label %49
i32 12, label %186
i32 13, label %186
]
41: ; preds = %40, %40
%42 = tail call i64 (...) @support_avx()
%43 = icmp eq i64 %42, 0
%44 = select i1 %43, i32 17, i32 24
br label %186
45: ; preds = %40, %40
%46 = tail call i64 (...) @support_avx()
%47 = icmp eq i64 %46, 0
%48 = select i1 %47, i32 17, i32 24
br label %186
49: ; preds = %40
%50 = tail call i64 (...) @support_avx()
%51 = icmp eq i64 %50, 0
%52 = select i1 %51, i32 17, i32 24
br label %186
53: ; preds = %12
switch i32 %6, label %177 [
i32 5, label %54
i32 6, label %54
i32 7, label %58
i32 14, label %74
i32 12, label %186
]
54: ; preds = %53, %53
%55 = tail call i64 (...) @support_avx()
%56 = icmp eq i64 %55, 0
%57 = select i1 %56, i32 17, i32 24
br label %186
58: ; preds = %53
%59 = tail call i32 (...) @support_avx2()
%60 = icmp eq i32 %59, 0
br i1 %60, label %61, label %186
61: ; preds = %58
%62 = tail call i64 (...) @support_avx()
%63 = icmp eq i64 %62, 0
%64 = select i1 %63, i32 17, i32 20
br label %186
65: ; preds = %12
switch i32 %6, label %177 [
i32 6, label %66
i32 5, label %70
i32 14, label %74
i32 7, label %78
i32 12, label %186
]
66: ; preds = %65
%67 = tail call i64 (...) @support_avx()
%68 = icmp eq i64 %67, 0
%69 = select i1 %68, i32 17, i32 24
br label %186
70: ; preds = %65
%71 = tail call i64 (...) @support_avx()
%72 = icmp eq i64 %71, 0
%73 = select i1 %72, i32 17, i32 24
br label %186
74: ; preds = %53, %65
%75 = tail call i64 (...) @support_avx()
%76 = icmp eq i64 %75, 0
%77 = select i1 %76, i32 17, i32 24
br label %186
78: ; preds = %65
%79 = tail call i64 (...) @support_avx()
%80 = icmp eq i64 %79, 0
%81 = select i1 %80, i32 17, i32 24
br label %186
82: ; preds = %12
switch i32 %6, label %177 [
i32 6, label %83
i32 10, label %87
]
83: ; preds = %82
%84 = tail call i64 (...) @support_avx()
%85 = icmp eq i64 %84, 0
%86 = select i1 %85, i32 17, i32 24
br label %186
87: ; preds = %82
%88 = tail call i64 (...) @support_avx()
%89 = icmp eq i64 %88, 0
%90 = select i1 %89, i32 17, i32 24
br label %186
91: ; preds = %12
switch i32 %6, label %177 [
i32 10, label %186
i32 14, label %92
]
92: ; preds = %91
%93 = tail call i64 (...) @support_avx()
%94 = icmp eq i64 %93, 0
%95 = select i1 %94, i32 17, i32 24
br label %186
96: ; preds = %12, %12
switch i32 %6, label %177 [
i32 12, label %97
i32 14, label %107
]
97: ; preds = %96
%98 = tail call i32 (...) @support_avx512()
%99 = icmp eq i32 %98, 0
br i1 %99, label %100, label %186
100: ; preds = %97
%101 = tail call i32 (...) @support_avx2()
%102 = icmp eq i32 %101, 0
br i1 %102, label %103, label %186
103: ; preds = %100
%104 = tail call i64 (...) @support_avx()
%105 = icmp eq i64 %104, 0
%106 = select i1 %105, i32 17, i32 20
br label %186
107: ; preds = %96
%108 = tail call i64 (...) @support_avx()
%109 = icmp eq i64 %108, 0
%110 = select i1 %109, i32 17, i32 24
br label %186
111: ; preds = %10
%112 = icmp slt i32 %6, 3
%113 = select i1 %112, i32 6, i32 7
br label %186
114: ; preds = %3
%115 = icmp slt i32 %4, 6
br i1 %115, label %186, label %116
116: ; preds = %114
%117 = icmp ult i32 %4, 15
br i1 %117, label %186, label %118
118: ; preds = %116
%119 = icmp eq i32 %4, 15
br i1 %119, label %120, label %177
120: ; preds = %118
%121 = and i32 %5, -3
%122 = icmp eq i32 %121, 0
br i1 %122, label %186, label %123
123: ; preds = %120
switch i32 %5, label %150 [
i32 5, label %186
i32 6, label %124
]
124: ; preds = %123
switch i32 %6, label %177 [
i32 1, label %125
i32 2, label %129
i32 3, label %129
i32 5, label %133
i32 0, label %137
i32 8, label %137
]
125: ; preds = %124
%126 = tail call i64 (...) @support_avx()
%127 = icmp eq i64 %126, 0
%128 = select i1 %127, i32 11, i32 22
br label %186
129: ; preds = %124, %124
%130 = tail call i64 (...) @support_avx()
%131 = icmp eq i64 %130, 0
%132 = select i1 %131, i32 11, i32 23
br label %186
133: ; preds = %124
%134 = tail call i64 (...) @support_avx()
%135 = icmp eq i64 %134, 0
%136 = select i1 %135, i32 11, i32 26
br label %186
137: ; preds = %124, %124
switch i32 %7, label %177 [
i32 1, label %138
i32 3, label %142
i32 6, label %146
]
138: ; preds = %137
%139 = tail call i64 (...) @support_avx()
%140 = icmp eq i64 %139, 0
%141 = select i1 %140, i32 11, i32 23
br label %186
142: ; preds = %137
%143 = tail call i64 (...) @support_avx()
%144 = icmp eq i64 %143, 0
%145 = select i1 %144, i32 11, i32 25
br label %186
146: ; preds = %137
%147 = tail call i64 (...) @support_avx()
%148 = icmp eq i64 %147, 0
%149 = select i1 %148, i32 11, i32 26
br label %186
150: ; preds = %123
%151 = icmp eq i32 %121, 8
br i1 %151, label %152, label %186
152: ; preds = %150
%153 = tail call i64 (...) @support_avx()
%154 = icmp eq i64 %153, 0
%155 = select i1 %154, i32 11, i32 27
br label %186
156: ; preds = %3
%157 = icmp eq i32 %9, 11
%158 = icmp eq i32 %4, 15
%159 = select i1 %157, i1 %158, i1 false
br i1 %159, label %160, label %166
160: ; preds = %156
%161 = icmp eq i32 %5, 9
br i1 %161, label %162, label %186
162: ; preds = %160
%163 = tail call i64 (...) @support_avx()
%164 = icmp eq i64 %163, 0
%165 = select i1 %164, i32 11, i32 27
br label %186
166: ; preds = %156
switch i32 %9, label %177 [
i32 6, label %167
i32 12, label %186
]
167: ; preds = %166
%168 = icmp eq i32 %4, 6
br i1 %168, label %169, label %174
169: ; preds = %167
%170 = icmp eq i32 %6, 15
%171 = icmp slt i32 %8, 14
%172 = select i1 %170, i1 %171, i1 false
%173 = select i1 %172, i32 19, i32 17
br label %186
174: ; preds = %167
%175 = icmp sgt i32 %4, 6
%176 = select i1 %175, i32 17, i32 12
br label %186
177: ; preds = %15, %13, %12, %18, %27, %40, %65, %10, %53, %82, %91, %96, %118, %124, %137, %166
br label %186
178: ; preds = %13
%179 = sext i32 %6 to i64
%180 = getelementptr inbounds [16 x i32], [16 x i32]* @switch.table.get_coretype, i64 0, i64 %179
%181 = load i32, i32* %180
br label %186
182: ; preds = %15
%183 = sext i32 %16 to i64
%184 = getelementptr inbounds [10 x i32], [10 x i32]* @switch.table.get_coretype.1, i64 0, i64 %183
%185 = load i32, i32* %184
br label %186
186: ; preds = %182, %178, %166, %174, %169, %160, %162, %150, %152, %146, %142, %138, %133, %129, %125, %123, %120, %116, %114, %111, %107, %103, %100, %97, %92, %91, %87, %83, %65, %53, %78, %74, %70, %66, %61, %58, %54, %40, %40, %49, %45, %41, %36, %32, %28, %27, %18, %18, %23, %18, %19, %18, %10, %0, %177, %11
%187 = phi i32 [ 0, %177 ], [ 2, %11 ], [ 1, %0 ], [ 1, %10 ], [ 17, %18 ], [ %22, %19 ], [ 17, %18 ], [ %26, %23 ], [ 17, %18 ], [ 17, %18 ], [ 18, %27 ], [ %31, %28 ], [ %35, %32 ], [ %39, %36 ], [ %44, %41 ], [ %48, %45 ], [ %52, %49 ], [ 17, %40 ], [ 17, %40 ], [ %57, %54 ], [ 24, %58 ], [ %64, %61 ], [ %69, %66 ], [ %73, %70 ], [ %77, %74 ], [ %81, %78 ], [ 17, %53 ], [ 17, %65 ], [ %86, %83 ], [ %90, %87 ], [ 17, %91 ], [ %95, %92 ], [ 28, %97 ], [ 24, %100 ], [ %106, %103 ], [ %110, %107 ], [ %113, %111 ], [ 1, %114 ], [ 11, %116 ], [ 10, %120 ], [ 21, %123 ], [ %128, %125 ], [ %132, %129 ], [ %136, %133 ], [ %141, %138 ], [ %145, %142 ], [ %149, %146 ], [ %155, %152 ], [ 11, %150 ], [ %165, %162 ], [ 11, %160 ], [ %173, %169 ], [ %176, %174 ], [ 17, %166 ], [ %181, %178 ], [ %185, %182 ]
ret i32 %187
}