xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ RSA;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int ASN1_item_i2d_fp(int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                     int /*<<< orphan*/ *);
int /*<<< orphan*/ RSAPrivateKey_it;
int i2d_RSAPrivateKey_fp(FILE *fp, RSA *rsa) {
  return ASN1_item_i2d_fp(&RSAPrivateKey_it, fp, rsa);
}


x86 assembly (clang, -O0):
<i2d_RSAPrivateKey_fp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    0x2eb1(%rip),%rdi
call   1030 <ASN1_item_i2d_fp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_RSAPrivateKey_fp>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    0x2ec3(%rip),%rdi
jmp    1030 <ASN1_item_i2d_fp@plt>

LLVM IR (-O0):
@RSAPrivateKey_it = global i32 0
define i32 @i2d_RSAPrivateKey_fp(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @ASN1_item_i2d_fp(i32* @RSAPrivateKey_it, i32* %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
@RSAPrivateKey_it = global i32 0
define i32 @i2d_RSAPrivateKey_fp(i32* %0, i32* %1) {
%3 = tail call i32 @ASN1_item_i2d_fp(i32* @RSAPrivateKey_it, i32* %0, i32* %1)
ret i32 %3
}
int is_lower(char ch) {
  if (ch >= 'a' && ch <= 'z')
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<is_lower>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1130 <is_lower+0x30>
movsbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
jg     1130 <is_lower+0x30>
movl   $0x1,-0x4(%rbp)
jmp    1137 <is_lower+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_lower>:
add    $0x9f,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_lower(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 97
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 122
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %13
12: ; preds = %7, %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @is_lower(i8 signext %0) {
%2 = add i8 %0, -97
%3 = icmp ult i8 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int debug_vfprintf(int /*<<< orphan*/ *, int, char const *, int /*<<< orphan*/);
int debug_vprintf(int log_level, const char *format, va_list arg) {
  return debug_vfprintf(NULL, log_level, format, arg);
}


x86 assembly (clang, -O0):
<debug_vprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
xor    %eax,%eax
mov    %eax,%edi
call   1030 <debug_vfprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_vprintf>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%esi
xor    %edi,%edi
jmp    1030 <debug_vfprintf@plt>

LLVM IR (-O0):
define i32 @debug_vprintf(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @debug_vfprintf(i32* null, i32 %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @debug_vprintf(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @debug_vfprintf(i32* null, i32 %0, i8* %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void keyPressed(unsigned char key, int x, int y) {
  switch (key) {
  case 'a':
    exit(0);
  default:;
  }
}


x86 assembly (clang, -O0):
<keyPressed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x1(%rbp),%al
sub    $0x61,%al
jne    113b <keyPressed+0x2b>
jmp    1134 <keyPressed+0x24>
xor    %edi,%edi
call   1030 <exit@plt>
jmp    1140 <keyPressed+0x30>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<keyPressed>:
cmp    $0x61,%dil
je     1117 <keyPressed+0x7>
ret
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @keyPressed(i8 zeroext %0, i32 %1, i32 %2) {
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
store i8 %0, i8* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
switch i32 %8, label %11 [
i32 97, label %9
]
9: ; preds = %3
%10 = call i32 @exit(i32 0)
unreachable
11: ; preds = %3
br label %12
12: ; preds = %11
ret void
}

LLVM IR (-O2):
define void @keyPressed(i8 zeroext %0, i32 %1, i32 %2) {
%4 = icmp eq i8 %0, 97
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 @exit(i32 0)
unreachable
7: ; preds = %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
double printd(double X) {
  printf("%f\n", X);
  return 0;
}


x86 assembly (clang, -O0):
<printd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
xorps  %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printd>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xorps  %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%f\0A\00"
define double @printd(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %3)
ret double 0.000000e+00
}

LLVM IR (-O2):
@.str = [4 x i8] c"%f\0A\00"
define double @printd(double %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %0)
ret double 0.000000e+00
}
int xxx_memcopy(void *src, void *dst, unsigned int len) {
  char *p;
  char *n;
  p = src;
  while (len--) {
    *n++ = *p++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<xxx_memcopy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x14(%rbp)
cmp    $0x0,%eax
je     1152 <xxx_memcopy+0x52>
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x20(%rbp)
mov    (%rax),%cl
mov    -0x28(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x28(%rbp)
mov    %cl,(%rax)
jmp    1117 <xxx_memcopy+0x17>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xxx_memcopy>:
test   %edx,%edx
je     1123 <xxx_memcopy+0x13>
push   %rax
mov    %edx,%edx
mov    %rdi,%rsi
call   1030 <memcpy@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @xxx_memcopy(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%9 = load i8*, i8** %4
store i8* %9, i8** %7
br label %10
10: ; preds = %14, %3
%11 = load i32, i32* %6
%12 = add i32 %11, -1
store i32 %12, i32* %6
%13 = icmp ne i32 %11, 0
br i1 %13, label %14, label %20
14: ; preds = %10
%15 = load i8*, i8** %7
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %7
%17 = load i8, i8* %15
%18 = load i8*, i8** %8
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %8
store i8 %17, i8* %18
br label %10
20: ; preds = %10
ret i32 0
}

LLVM IR (-O2):
define i32 @xxx_memcopy(i8* nocapture %0, i8* nocapture readnone %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %7
7: ; preds = %5, %3
ret i32 0
}
/* Type definitions */
struct perf_event_attr {
  int dummy;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ __NR_perf_event_open;
int syscall(int /*<<< orphan*/, struct perf_event_attr *, int /*<<< orphan*/,
            int, int, unsigned long);
int perf_event_open(struct perf_event_attr *hw_event, pid_t pid, int cpu,
                    int group_fd, unsigned long flags) {
  int ret;
  ret = syscall(__NR_perf_event_open, hw_event, pid, cpu, group_fd, flags);
  return ret;
}


x86 assembly (clang, -O0):
<perf_event_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    -0x20(%rbp),%r9
call   1030 <syscall@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perf_event_open>:
mov    %r8,%r9
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2ebc(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.perf_event_attr = type { i32 }
@__NR_perf_event_open = global i32 0
define i32 @perf_event_open(%struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4) {
%6 = alloca %struct.perf_event_attr*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i64
%11 = alloca i32
store %struct.perf_event_attr* %0, %struct.perf_event_attr** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i64 %4, i64* %10
%12 = load i32, i32* @__NR_perf_event_open
%13 = load %struct.perf_event_attr*, %struct.perf_event_attr** %6
%14 = load i32, i32* %7
%15 = load i32, i32* %8
%16 = load i32, i32* %9
%17 = load i64, i64* %10
%18 = call i32 @syscall(i32 %12, %struct.perf_event_attr* %13, i32 %14, i32 %15, i32 %16, i64 %17)
store i32 %18, i32* %11
%19 = load i32, i32* %11
ret i32 %19
}

LLVM IR (-O2):
%struct.perf_event_attr = type { i32 }
@__NR_perf_event_open = global i32 0
define i32 @perf_event_open(%struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4) {
%6 = load i32, i32* @__NR_perf_event_open
%7 = tail call i32 @syscall(i32 %6, %struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4)
ret i32 %7
}
/* Type definitions */
struct tm {
  int dummy;
};

/* Variables and functions */
size_t strftime(char *, size_t, char const *, struct tm const *);
__attribute__((__weak__, __always___)) size_t
softboundcets_strftime(char *s, size_t max, const char *format,
                       const struct tm *tm) {
  return strftime(s, max, format, tm);
}


x86 assembly (clang, -O0):
<softboundcets_strftime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <strftime@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundcets_strftime>:
jmp    1030 <strftime@plt>

LLVM IR (-O0):
%struct.tm = type { i32 }
define weak i64 @softboundcets_strftime(i8* %0, i64 %1, i8* %2, %struct.tm* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca %struct.tm*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store %struct.tm* %3, %struct.tm** %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = load i8*, i8** %7
%12 = load %struct.tm*, %struct.tm** %8
%13 = call i64 @strftime(i8* %9, i64 %10, i8* %11, %struct.tm* %12)
ret i64 %13
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define weak i64 @softboundcets_strftime(i8* %0, i64 %1, i8* %2, %struct.tm* %3) {
%5 = tail call i64 @strftime(i8* %0, i64 %1, i8* %2, %struct.tm* %3)
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage() {
  printf("ucw FILE [ARG1] [ARG2] ... \n");
  printf("\n");
  printf("(U)niversal (C)Cache (W)rapper\n");
  printf("Set LD_PRELOAD to libucw.so and execute FILE.\n\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf44(%rip),%rdi
call   1030 <printf@plt>
lea    0xeea(%rip),%rdi
call   1030 <printf@plt>
lea    0xefe(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <puts@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
lea    0xede(%rip),%rdi
call   1040 <puts@plt>
lea    0xef1(%rip),%rdi
pop    %rax
jmp    1040 <puts@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"ucw FILE [ARG1] [ARG2] ... \0A\00"
@.str.1 = [2 x i8] c"\0A\00"
@.str.2 = [32 x i8] c"(U)niversal (C)Cache (W)rapper\0A\00"
@.str.3 = [48 x i8] c"Set LD_PRELOAD to libucw.so and execute FILE.\0A\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [28 x i8] c"ucw FILE [ARG1] [ARG2] ... \00"
@str.4 = [31 x i8] c"(U)niversal (C)Cache (W)rapper\00"
@str.5 = [47 x i8] c"Set LD_PRELOAD to libucw.so and execute FILE.\0A\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @putchar(i32 10)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str.4, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([47 x i8], [47 x i8]* @str.5, i64 0, i64 0))
ret void
}
int skip_space(const char *s, unsigned int offset) {
  while ((s[offset] == ' ') || (s[offset] == '\t'))
    offset++;
  return offset;
}


x86 assembly (clang, -O0):
<skip_space>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
movsbl (%rax,%rcx,1),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0xd(%rbp)
je     1138 <skip_space+0x38>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
movsbl (%rax,%rcx,1),%eax
cmp    $0x9,%eax
sete   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1148 <skip_space+0x48>
jmp    1156 <skip_space+0x56>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110b <skip_space+0xb>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_space>:
mov    %esi,%eax
jmp    1113 <skip_space+0x13>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
add    $0x1,%eax
mov    %eax,%ecx
movzbl (%rdi,%rcx,1),%ecx
cmp    $0x20,%cl
je     1110 <skip_space+0x10>
cmp    $0x9,%cl
je     1110 <skip_space+0x10>
ret

LLVM IR (-O0):
define i32 @skip_space(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %23, %2
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = zext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 32
br i1 %12, label %21, label %13
13: ; preds = %5
%14 = load i8*, i8** %3
%15 = load i32, i32* %4
%16 = zext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 9
br label %21
21: ; preds = %13, %5
%22 = phi i1 [ true, %5 ], [ %20, %13 ]
br i1 %22, label %23, label %26
23: ; preds = %21
%24 = load i32, i32* %4
%25 = add i32 %24, 1
store i32 %25, i32* %4
br label %5
26: ; preds = %21
%27 = load i32, i32* %4
ret i32 %27
}

LLVM IR (-O2):
define i32 @skip_space(i8* nocapture %0, i32 %1) {
br label %3
3: ; preds = %8, %2
%4 = phi i32 [ %1, %2 ], [ %9, %8 ]
%5 = zext i32 %4 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = load i8, i8* %6
switch i8 %7, label %10 [
i8 32, label %8
i8 9, label %8
]
8: ; preds = %3, %3
%9 = add i32 %4, 1
br label %3
10: ; preds = %3
ret i32 %4
}
/* Type definitions */
struct server_attr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ recv_response_data(struct server_attr *);
int /*<<< orphan*/ recv_response_header(struct server_attr *);
void recv_response(struct server_attr *attr) {
  recv_response_header(attr);
  recv_response_data(attr);
}


x86 assembly (clang, -O0):
<recv_response>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <recv_response_header@plt>
mov    -0x8(%rbp),%rdi
call   1030 <recv_response_data@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<recv_response>:
push   %rbx
mov    %rdi,%rbx
call   1040 <recv_response_header@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <recv_response_data@plt>

LLVM IR (-O0):
%struct.server_attr = type { i32 }
define void @recv_response(%struct.server_attr* %0) {
%2 = alloca %struct.server_attr*
store %struct.server_attr* %0, %struct.server_attr** %2
%3 = load %struct.server_attr*, %struct.server_attr** %2
%4 = call i32 @recv_response_header(%struct.server_attr* %3)
%5 = load %struct.server_attr*, %struct.server_attr** %2
%6 = call i32 @recv_response_data(%struct.server_attr* %5)
ret void
}

LLVM IR (-O2):
%struct.server_attr = type { i32 }
define void @recv_response(%struct.server_attr* %0) {
%2 = tail call i32 @recv_response_header(%struct.server_attr* %0)
%3 = tail call i32 @recv_response_data(%struct.server_attr* %0)
ret void
}
void gdk_display_get_screen() {}


x86 assembly (clang, -O0):
<gdk_display_get_screen>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_display_get_screen>:
ret

LLVM IR (-O0):
define void @gdk_display_get_screen() {
ret void
}

LLVM IR (-O2):
define void @gdk_display_get_screen() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ns2sisa(int, float, char);
void ns2sisa_(int *isid, float *alpha, char *trans) {
  ns2sisa(*isid, *alpha, *trans);
}


x86 assembly (clang, -O0):
<ns2sisa_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x18(%rbp),%rax
movsbl (%rax),%esi
call   1030 <ns2sisa@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ns2sisa_>:
mov    (%rdi),%edi
movss  (%rsi),%xmm0
movsbl (%rdx),%esi
jmp    1030 <ns2sisa@plt>

LLVM IR (-O0):
define void @ns2sisa_(i32* %0, float* %1, i8* %2) {
%4 = alloca i32*
%5 = alloca float*
%6 = alloca i8*
store i32* %0, i32** %4
store float* %1, float** %5
store i8* %2, i8** %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = load float*, float** %5
%10 = load float, float* %9
%11 = load i8*, i8** %6
%12 = load i8, i8* %11
%13 = call i32 @ns2sisa(i32 %8, float %10, i8 signext %12)
ret void
}

LLVM IR (-O2):
define void @ns2sisa_(i32* nocapture %0, float* nocapture %1, i8* nocapture %2) {
%4 = load i32, i32* %0
%5 = load float, float* %1
%6 = load i8, i8* %2
%7 = tail call i32 @ns2sisa(i32 %4, float %5, i8 signext %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Print_Array(int *, int);
int /*<<< orphan*/ Shell_Sort(int *, int);
int main() {
  int array[] = {12, 34, 54, 2, 3};
  int size = 5;
  Shell_Sort(array, size);
  Print_Array(array, size);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xec5(%rip),%eax
mov    %eax,-0x10(%rbp)
movl   $0x5,-0x24(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%esi
call   1030 <Shell_Sort@plt>
lea    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%esi
call   1040 <Print_Array@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x20,%rsp
mov    0xee5(%rip),%eax
mov    %eax,0x10(%rsp)
movaps 0xeca(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x5,%esi
call   1030 <Shell_Sort@plt>
mov    %rbx,%rdi
mov    $0x5,%esi
call   1040 <Print_Array@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.array = [5 x i32] [i32 12, i32 34, i32 54, i32 2, i32 3]
define i32 @main() {
%1 = alloca i32
%2 = alloca [5 x i32]
%3 = alloca i32
store i32 0, i32* %1
%4 = bitcast [5 x i32]* %2 to i8*
store i32 5, i32* %3
%5 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%6 = load i32, i32* %3
%7 = call i32 @Shell_Sort(i32* %5, i32 %6)
%8 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%9 = load i32, i32* %3
%10 = call i32 @Print_Array(i32* %8, i32 %9)
ret i32 0
}

LLVM IR (-O2):
@__const.main.array = [5 x i32] [i32 12, i32 34, i32 54, i32 2, i32 3]
define i32 @main() {
%1 = alloca [5 x i32]
%2 = bitcast [5 x i32]* %1 to i8*
%3 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%4 = call i32 @Shell_Sort(i32* %3, i32 5)
%5 = call i32 @Print_Array(i32* %3, i32 5)
ret i32 0
}
long Long_inc(long x) { return x + 1; }


x86 assembly (clang, -O0):
<Long_inc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Long_inc>:
lea    0x1(%rdi),%rax
ret

LLVM IR (-O0):
define i64 @Long_inc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 1
ret i64 %4
}

LLVM IR (-O2):
define i64 @Long_inc(i64 %0) {
%2 = add nsw i64 %0, 1
ret i64 %2
}
unsigned int _divsuchar(signed char x, signed char y) {
  return ((int)((unsigned char)x) / (int)y);
}


x86 assembly (clang, -O0):
<_divsuchar>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x1(%rbp),%eax
movsbl -0x2(%rbp),%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<_divsuchar>:
movzbl %dil,%eax
xor    %edx,%edx
idiv   %si
cwtl
ret

LLVM IR (-O0):
define i32 @_divsuchar(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i8, i8* %4
%8 = sext i8 %7 to i32
%9 = sdiv i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @_divsuchar(i8 signext %0, i8 signext %1) {
%3 = zext i8 %0 to i16
%4 = sext i8 %1 to i16
%5 = sdiv i16 %3, %4
%6 = sext i16 %5 to i32
ret i32 %6
}
char *getstr(char *id, char **cpp) {
  (void)id;
  (void)cpp;
  return (0);
}


x86 assembly (clang, -O0):
<getstr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getstr>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @getstr(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
%5 = load i8*, i8** %3
%6 = load i8**, i8*** %4
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @getstr(i8* nocapture readnone %0, i8** nocapture readnone %1) {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ pmf_generic(int, unsigned long, int);
void pmf_response_time(int pid, unsigned long int time) {
  pmf_generic(pid, time, 1);
}


x86 assembly (clang, -O0):
<pmf_response_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <pmf_generic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmf_response_time>:
mov    $0x1,%edx
jmp    1030 <pmf_generic@plt>

LLVM IR (-O0):
define void @pmf_response_time(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = load i32, i32* %3
%6 = load i64, i64* %4
%7 = call i32 @pmf_generic(i32 %5, i64 %6, i32 1)
ret void
}

LLVM IR (-O2):
define void @pmf_response_time(i32 %0, i64 %1) {
%3 = tail call i32 @pmf_generic(i32 %0, i64 %1, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ estr_write(char *);
void print_spaces(int n) {
  char buffer[80];
  int i;
  if (n <= 0)
    return;
  for (i = 0; i < n; i++)
    buffer[i] = ' ';
  buffer[i] = '\0';
  estr_write(buffer);
}


x86 assembly (clang, -O0):
<print_spaces>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jg     112a <print_spaces+0x1a>
jmp    1166 <print_spaces+0x56>
movl   $0x0,-0x64(%rbp)
mov    -0x64(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1154 <print_spaces+0x44>
movslq -0x64(%rbp),%rax
movb   $0x20,-0x60(%rbp,%rax,1)
mov    -0x64(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x64(%rbp)
jmp    1131 <print_spaces+0x21>
movslq -0x64(%rbp),%rax
movb   $0x0,-0x60(%rbp,%rax,1)
lea    -0x60(%rbp),%rdi
call   1030 <estr_write@plt>
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_spaces>:
test   %edi,%edi
jle    1153 <print_spaces+0x33>
push   %r14
push   %rbx
sub    $0x58,%rsp
mov    %edi,%ebx
mov    %rsp,%r14
mov    %r14,%rdi
mov    $0x20,%esi
mov    %rbx,%rdx
call   1040 <memset@plt>
movb   $0x0,(%rsp,%rbx,1)
mov    %r14,%rdi
call   1030 <estr_write@plt>
add    $0x58,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @print_spaces(i32 %0) {
%2 = alloca i32
%3 = alloca [80 x i8]
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = icmp sle i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
br label %26
8: ; preds = %1
store i32 0, i32* %4
br label %9
9: ; preds = %17, %8
%10 = load i32, i32* %4
%11 = load i32, i32* %2
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %20
13: ; preds = %9
%14 = load i32, i32* %4
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds [80 x i8], [80 x i8]* %3, i64 0, i64 %15
store i8 32, i8* %16
br label %17
17: ; preds = %13
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %9
20: ; preds = %9
%21 = load i32, i32* %4
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds [80 x i8], [80 x i8]* %3, i64 0, i64 %22
store i8 0, i8* %23
%24 = getelementptr inbounds [80 x i8], [80 x i8]* %3, i64 0, i64 0
%25 = call i32 @estr_write(i8* %24)
br label %26
26: ; preds = %20, %7
ret void
}

LLVM IR (-O2):
define void @print_spaces(i32 %0) {
%2 = alloca [80 x i8]
%3 = getelementptr inbounds [80 x i8], [80 x i8]* %2, i64 0, i64 0
%4 = icmp slt i32 %0, 1
br i1 %4, label %11, label %5
5: ; preds = %1
%6 = getelementptr inbounds [80 x i8], [80 x i8]* %2, i64 0, i64 0
%7 = zext i32 %0 to i64
%8 = zext i32 %0 to i64
%9 = getelementptr inbounds [80 x i8], [80 x i8]* %2, i64 0, i64 %8
store i8 0, i8* %9
%10 = call i32 @estr_write(i8* %3)
br label %11
11: ; preds = %1, %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void b_desc() { printf("\n\x1b[34m\tbenchmarks\x1b[0m\n\n"); }


x86 assembly (clang, -O0):
<b_desc>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_desc>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"\0A\1B[34m\09benchmarks\1B[0m\0A\0A\00"
define void @b_desc() {
%1 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [23 x i8] c"\0A\1B[34m\09benchmarks\1B[0m\0A\00"
define void @b_desc() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
ret void
}
char *skip_whitespace(char *pnt) {
  while (*pnt <= ' ')
    pnt++;
  return pnt;
}


x86 assembly (clang, -O0):
<skip_whitespace>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
jg     1129 <skip_whitespace+0x29>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <skip_whitespace+0x8>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_whitespace>:
mov    %rdi,%rax
add    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x21,0x1(%rax)
lea    0x1(%rax),%rax
jl     1110 <skip_whitespace+0x10>
ret

LLVM IR (-O0):
define i8* @skip_whitespace(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp sle i32 %6, 32
br i1 %7, label %8, label %11
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
br label %3
11: ; preds = %3
%12 = load i8*, i8** %2
ret i8* %12
}

LLVM IR (-O2):
define i8* @skip_whitespace(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %6, %2 ]
%4 = load i8, i8* %3
%5 = icmp slt i8 %4, 33
%6 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %5, label %2, label %7
7: ; preds = %2
ret i8* %3
}
/* Type definitions */
struct node {
  int dummy;
};

/* Variables and functions */
struct node *sortLinkedList(struct node *head) {
  return NULL;
}


x86 assembly (clang, -O0):
<sortLinkedList>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sortLinkedList>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.node = type { i32 }
define %struct.node* @sortLinkedList(%struct.node* %0) {
%2 = alloca %struct.node*
store %struct.node* %0, %struct.node** %2
ret %struct.node* null
}

LLVM IR (-O2):
%struct.node = type { i32 }
define noalias %struct.node* @sortLinkedList(%struct.node* nocapture readnone %0) {
ret %struct.node* null
}
/* Variables and functions */
int /*<<< orphan*/ draw_hex_table();
int /*<<< orphan*/ draw_oct_table();
int main() {
  draw_hex_table();
  draw_oct_table();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <draw_hex_table@plt>
mov    $0x0,%al
call   1040 <draw_oct_table@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <draw_hex_table@plt>
xor    %eax,%eax
call   1040 <draw_oct_table@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @draw_hex_table()
%3 = call i32 (...) @draw_oct_table()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @draw_hex_table()
%2 = tail call i32 (...) @draw_oct_table()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_3253() {
  Assert_real((isqrt(3253) == 57),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              1335, ("Integer square root of 3253 should be 57"));
}


x86 assembly (clang, -O0):
<t_sqrt_3253>:
push   %rbp
mov    %rsp,%rbp
mov    $0xcb5,%edi
call   1030 <isqrt@plt>
cmp    $0x39,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0x537,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_3253>:
push   %rax
mov    $0xcb5,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0x39,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0x537,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [41 x i8] c"Integer square root of 3253 should be 57\00"
define void @t_sqrt_3253() {
%1 = call i32 @isqrt(i32 3253)
%2 = icmp eq i32 %1, 57
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1335, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [41 x i8] c"Integer square root of 3253 should be 57\00"
define void @t_sqrt_3253() {
%1 = tail call i32 @isqrt(i32 3253)
%2 = icmp eq i32 %1, 57
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1335, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void save_results() {}


x86 assembly (clang, -O0):
<save_results>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<save_results>:
ret

LLVM IR (-O0):
define void @save_results() {
ret void
}

LLVM IR (-O2):
define void @save_results() {
ret void
}
int xmlUCSIsArabicPresentationFormsA(int code) {
  return (((code >= 0xFB50) && (code <= 0xFDFF)));
}


x86 assembly (clang, -O0):
<xmlUCSIsArabicPresentationFormsA>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0xfb50,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1126 <xmlUCSIsArabicPresentationFormsA+0x26>
cmpl   $0xfdff,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmlUCSIsArabicPresentationFormsA>:
add    $0xffff04b0,%edi
xor    %eax,%eax
cmp    $0x2b0,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @xmlUCSIsArabicPresentationFormsA(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 64336
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 65023
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @xmlUCSIsArabicPresentationFormsA(i32 %0) {
%2 = add i32 %0, -64336
%3 = icmp ult i32 %2, 688
%4 = zext i1 %3 to i32
ret i32 %4
}
void g_rand_int() {}


x86 assembly (clang, -O0):
<g_rand_int>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_rand_int>:
ret

LLVM IR (-O0):
define void @g_rand_int() {
ret void
}

LLVM IR (-O2):
define void @g_rand_int() {
ret void
}
int MAIN() {
  int a = 1, b = 2, c;
  int result = 1;
  c = a * b;
  result = func(a - 1, b * 2, c, a - c) * result;
  write(result);
  write("\n");
  return 0;
}


x86 assembly (clang, -O0):
<MAIN>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
movl   $0x1,-0x10(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
mov    -0x8(%rbp),%esi
shl    $0x1,%esi
mov    -0xc(%rbp),%edx
mov    -0x4(%rbp),%ecx
sub    -0xc(%rbp),%ecx
mov    $0x0,%al
call   1040 <func@plt>
imul   -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%edi
mov    $0x0,%al
call   1030 <write@plt>
lea    0xe85(%rip),%rdi
mov    $0x0,%al
call   1030 <write@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MAIN>:
push   %rax
xor    %edi,%edi
mov    $0x4,%esi
mov    $0x2,%edx
mov    $0xffffffff,%ecx
xor    %eax,%eax
call   1040 <func@plt>
mov    %eax,%edi
xor    %eax,%eax
call   1030 <write@plt>
lea    0xeb7(%rip),%rdi
xor    %eax,%eax
call   1030 <write@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define i32 @MAIN() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 1, i32* %1
store i32 2, i32* %2
store i32 1, i32* %4
%5 = load i32, i32* %1
%6 = load i32, i32* %2
%7 = mul nsw i32 %5, %6
store i32 %7, i32* %3
%8 = load i32, i32* %1
%9 = sub nsw i32 %8, 1
%10 = load i32, i32* %2
%11 = mul nsw i32 %10, 2
%12 = load i32, i32* %3
%13 = load i32, i32* %1
%14 = load i32, i32* %3
%15 = sub nsw i32 %13, %14
%16 = call i32 (i32, i32, i32, i32, ...) bitcast (i32 (...)* @func to i32 (i32, i32, i32, i32, ...)*)(i32 %9, i32 %11, i32 %12, i32 %15)
%17 = load i32, i32* %4
%18 = mul nsw i32 %16, %17
store i32 %18, i32* %4
%19 = load i32, i32* %4
%20 = call i32 (i32, ...) bitcast (i32 (...)* @write to i32 (i32, ...)*)(i32 %19)
%21 = call i32 (i8*, ...) bitcast (i32 (...)* @write to i32 (i8*, ...)*)(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [2 x i8] c"\0A\00"
define i32 @MAIN() {
%1 = tail call i32 (i32, i32, i32, i32, ...) bitcast (i32 (...)* @func to i32 (i32, i32, i32, i32, ...)*)(i32 0, i32 4, i32 2, i32 -1)
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @write to i32 (i32, ...)*)(i32 %1)
%3 = tail call i32 (i8*, ...) bitcast (i32 (...)* @write to i32 (i8*, ...)*)(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int valid_home(char const *);
bool valid_shell(const char *p) { return valid_home(p); }


x86 assembly (clang, -O0):
<valid_shell>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <valid_home@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<valid_shell>:
jmp    1030 <valid_home@plt>

LLVM IR (-O0):
define i32 @valid_shell(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @valid_home(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @valid_shell(i8* %0) {
%2 = tail call i32 @valid_home(i8* %0)
ret i32 %2
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t rol(uint32_t n, int k) { return (n << k) | (n >> (32 - k)); }


x86 assembly (clang, -O0):
<rol>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
mov    $0x20,%ecx
sub    -0x8(%rbp),%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rol>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
neg    %cl
sar    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rol(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sub nsw i32 32, %9
%11 = ashr i32 %8, %10
%12 = or i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @rol(i32 %0, i32 %1) {
%3 = shl i32 %0, %1
%4 = sub nsw i32 32, %1
%5 = ashr i32 %0, %4
%6 = or i32 %5, %3
ret i32 %6
}
int indexNodeSize(int blockSize) { return (4) + (24) * blockSize; }


x86 assembly (clang, -O0):
<indexNodeSize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0x18,-0x4(%rbp),%eax
add    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<indexNodeSize>:
shl    $0x3,%edi
lea    (%rdi,%rdi,2),%eax
or     $0x4,%eax
ret

LLVM IR (-O0):
define i32 @indexNodeSize(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 24, %3
%5 = add nsw i32 4, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @indexNodeSize(i32 %0) {
%2 = mul nsw i32 %0, 24
%3 = or i32 %2, 4
ret i32 %3
}
/* Variables and functions */
int Q_stricmpn(char const *, char const *, int);
int Q_stricmp(const char *s1, const char *s2) {
  return Q_stricmpn(s1, s2, 99999);
}


x86 assembly (clang, -O0):
<Q_stricmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1869f,%edx
call   1030 <Q_stricmpn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Q_stricmp>:
mov    $0x1869f,%edx
jmp    1030 <Q_stricmpn@plt>

LLVM IR (-O0):
define i32 @Q_stricmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @Q_stricmpn(i8* %5, i8* %6, i32 99999)
ret i32 %7
}

LLVM IR (-O2):
define i32 @Q_stricmp(i8* %0, i8* %1) {
%3 = tail call i32 @Q_stricmpn(i8* %0, i8* %1, i32 99999)
ret i32 %3
}
int test_imm_0Cuint8_mem(unsigned char *val) {
  return ((*val) & (0x0C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Cuint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xc,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Cuint8_mem>:
testb  $0xc,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Cuint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 12
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_0Cuint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 12
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void efree(void *p) { free(p); }


x86 assembly (clang, -O0):
<efree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<efree>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @efree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @efree(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
void *splay_tree_xmalloc_allocate(size, data)
int size;
void *data __attribute__((__unused__));
{ return xmalloc(size); }


x86 assembly (clang, -O0):
<splay_tree_xmalloc_allocate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1030 <xmalloc@plt>
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<splay_tree_xmalloc_allocate>:
push   %rax
xor    %eax,%eax
call   1030 <xmalloc@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i8* @splay_tree_xmalloc_allocate(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = call i32 (i32, ...) bitcast (i32 (...)* @xmalloc to i32 (i32, ...)*)(i32 %5)
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i8*
ret i8* %8
}

LLVM IR (-O2):
define i8* @splay_tree_xmalloc_allocate(i32 %0, i8* nocapture readnone %1) {
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @xmalloc to i32 (i32, ...)*)(i32 %0)
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}
int imu_convert16(unsigned char msb, unsigned char lsb) {
  return (signed short)((msb << 8) | lsb);
}


x86 assembly (clang, -O0):
<imu_convert16>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<imu_convert16>:
shl    $0x8,%edi
or     %esi,%edi
movswl %di,%eax
ret

LLVM IR (-O0):
define i32 @imu_convert16(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = shl i32 %6, 8
%8 = load i8, i8* %4
%9 = zext i8 %8 to i32
%10 = or i32 %7, %9
%11 = trunc i32 %10 to i16
%12 = sext i16 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @imu_convert16(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i16
%4 = shl nuw i16 %3, 8
%5 = zext i8 %1 to i16
%6 = or i16 %4, %5
%7 = sext i16 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ SerialWriteString(char *);
void iRobot_Drive(unsigned short velocity_high, unsigned short velocity_low,
                  unsigned short radius_high, unsigned short radius_low) {
  char data[] = {137, velocity_high, velocity_low, radius_high, radius_low};
  SerialWriteString(data);
}


x86 assembly (clang, -O0):
<iRobot_Drive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %cx,%ax
mov    %dx,%cx
mov    %si,%dx
mov    %di,%si
mov    %si,-0x2(%rbp)
mov    %dx,-0x4(%rbp)
mov    %cx,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
movb   $0x89,-0xd(%rbp)
mov    -0x2(%rbp),%ax
mov    %al,-0xc(%rbp)
mov    -0x4(%rbp),%ax
mov    %al,-0xb(%rbp)
mov    -0x6(%rbp),%ax
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%ax
mov    %al,-0x9(%rbp)
lea    -0xd(%rbp),%rdi
call   1030 <SerialWriteString@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iRobot_Drive>:
push   %rax
movb   $0x89,0x3(%rsp)
mov    %dil,0x4(%rsp)
mov    %sil,0x5(%rsp)
mov    %dl,0x6(%rsp)
mov    %cl,0x7(%rsp)
lea    0x3(%rsp),%rdi
call   1030 <SerialWriteString@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @iRobot_Drive(i16 zeroext %0, i16 zeroext %1, i16 zeroext %2, i16 zeroext %3) {
%5 = alloca i16
%6 = alloca i16
%7 = alloca i16
%8 = alloca i16
%9 = alloca [5 x i8]
store i16 %0, i16* %5
store i16 %1, i16* %6
store i16 %2, i16* %7
store i16 %3, i16* %8
%10 = getelementptr inbounds [5 x i8], [5 x i8]* %9, i64 0, i64 0
store i8 -119, i8* %10
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i16, i16* %5
%13 = trunc i16 %12 to i8
store i8 %13, i8* %11
%14 = getelementptr inbounds i8, i8* %11, i64 1
%15 = load i16, i16* %6
%16 = trunc i16 %15 to i8
store i8 %16, i8* %14
%17 = getelementptr inbounds i8, i8* %14, i64 1
%18 = load i16, i16* %7
%19 = trunc i16 %18 to i8
store i8 %19, i8* %17
%20 = getelementptr inbounds i8, i8* %17, i64 1
%21 = load i16, i16* %8
%22 = trunc i16 %21 to i8
store i8 %22, i8* %20
%23 = getelementptr inbounds [5 x i8], [5 x i8]* %9, i64 0, i64 0
%24 = call i32 @SerialWriteString(i8* %23)
ret void
}

LLVM IR (-O2):
define void @iRobot_Drive(i16 zeroext %0, i16 zeroext %1, i16 zeroext %2, i16 zeroext %3) {
%5 = alloca [5 x i8]
%6 = getelementptr inbounds [5 x i8], [5 x i8]* %5, i64 0, i64 0
store i8 -119, i8* %6
%7 = getelementptr inbounds [5 x i8], [5 x i8]* %5, i64 0, i64 1
%8 = trunc i16 %0 to i8
store i8 %8, i8* %7
%9 = getelementptr inbounds [5 x i8], [5 x i8]* %5, i64 0, i64 2
%10 = trunc i16 %1 to i8
store i8 %10, i8* %9
%11 = getelementptr inbounds [5 x i8], [5 x i8]* %5, i64 0, i64 3
%12 = trunc i16 %2 to i8
store i8 %12, i8* %11
%13 = getelementptr inbounds [5 x i8], [5 x i8]* %5, i64 0, i64 4
%14 = trunc i16 %3 to i8
store i8 %14, i8* %13
%15 = call i32 @SerialWriteString(i8* %6)
ret void
}
int EseRamSize(int size) {
  int i = 0;
  size /= 0x20000;
  do {
    if ((size >>= 1) == 0) {
      break;
    }
    ++i;
  } while (i < 3);
  return i;
}


x86 assembly (clang, -O0):
<EseRamSize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20000,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
jne    1133 <EseRamSize+0x33>
jmp    1146 <EseRamSize+0x46>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x3,-0x8(%rbp)
jl     111c <EseRamSize+0x1c>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<EseRamSize>:
lea    0x1ffff(%rdi),%ecx
test   %edi,%edi
cmovns %edi,%ecx
sar    $0x11,%ecx
xor    %eax,%eax
cmp    $0x2,%ecx
jb     112a <EseRamSize+0x2a>
mov    $0x1,%eax
cmp    $0x4,%ecx
jb     112a <EseRamSize+0x2a>
cmp    $0x8,%ecx
mov    $0x3,%eax
sbb    $0x0,%eax
ret

LLVM IR (-O0):
define i32 @EseRamSize(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = sdiv i32 %4, 131072
store i32 %5, i32* %2
br label %6
6: ; preds = %14, %1
%7 = load i32, i32* %2
%8 = ashr i32 %7, 1
store i32 %8, i32* %2
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %6
br label %17
11: ; preds = %6
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %14
14: ; preds = %11
%15 = load i32, i32* %3
%16 = icmp slt i32 %15, 3
br i1 %16, label %6, label %17
17: ; preds = %14, %10
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @EseRamSize(i32 %0) {
%2 = sdiv i32 %0, 131072
%3 = icmp ult i32 %2, 2
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = icmp ult i32 %2, 4
br i1 %5, label %9, label %6
6: ; preds = %4
%7 = icmp ult i32 %2, 8
%8 = select i1 %7, i32 2, i32 3
br label %9
9: ; preds = %6, %4, %1
%10 = phi i32 [ 0, %1 ], [ 1, %4 ], [ %8, %6 ]
ret i32 %10
}