xunge/DecIR huggingface dataset:
int ft_isalpha(int c) {
  if ((c >= 'a' && c <= 'z') || (c >= 'A' && c <= 'Z'))
    return (1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<ft_isalpha>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x61,-0x8(%rbp)
jl     111b <ft_isalpha+0x1b>
cmpl   $0x7a,-0x8(%rbp)
jle    112f <ft_isalpha+0x2f>
cmpl   $0x41,-0x8(%rbp)
jl     113b <ft_isalpha+0x3b>
cmpl   $0x5a,-0x8(%rbp)
jg     113b <ft_isalpha+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    1142 <ft_isalpha+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isalpha>:
and    $0xffffffdf,%edi
add    $0xffffffbf,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @ft_isalpha(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 122
br i1 %8, label %15, label %9
9: ; preds = %6, %1
%10 = load i32, i32* %3
%11 = icmp sge i32 %10, 65
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = load i32, i32* %3
%14 = icmp sle i32 %13, 90
br i1 %14, label %15, label %16
15: ; preds = %12, %6
store i32 1, i32* %2
br label %17
16: ; preds = %12, %9
store i32 0, i32* %2
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @ft_isalpha(i32 %0) {
%2 = and i32 %0, -33
%3 = add i32 %2, -65
%4 = icmp ult i32 %3, 26
%5 = zext i1 %4 to i32
ret i32 %5
}
unsigned short SetBit(unsigned short pin, unsigned char number,
                      unsigned char bin_value) {
  return (bin_value ? pin | (0x0001 << number) : pin & ~(0x0001 << number));
}


x86 assembly (clang, -O0):
<SetBit>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %di,%dx
mov    %dx,-0x2(%rbp)
mov    %cl,-0x3(%rbp)
mov    %al,-0x4(%rbp)
movzbl -0x4(%rbp),%eax
cmp    $0x0,%eax
je     113e <SetBit+0x3e>
movzwl -0x2(%rbp),%eax
movzbl -0x3(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
jmp    1157 <SetBit+0x57>
movzwl -0x2(%rbp),%eax
movzbl -0x3(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetBit>:
mov    %edi,%eax
bts    %esi,%eax
btr    %esi,%edi
test   %edx,%edx
cmove  %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @SetBit(i16 zeroext %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i16
%5 = alloca i8
%6 = alloca i8
store i16 %0, i16* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %3
%11 = load i16, i16* %4
%12 = zext i16 %11 to i32
%13 = load i8, i8* %5
%14 = zext i8 %13 to i32
%15 = shl i32 1, %14
%16 = or i32 %12, %15
br label %25
17: ; preds = %3
%18 = load i16, i16* %4
%19 = zext i16 %18 to i32
%20 = load i8, i8* %5
%21 = zext i8 %20 to i32
%22 = shl i32 1, %21
%23 = xor i32 %22, -1
%24 = and i32 %19, %23
br label %25
25: ; preds = %17, %10
%26 = phi i32 [ %16, %10 ], [ %24, %17 ]
%27 = trunc i32 %26 to i16
ret i16 %27
}

LLVM IR (-O2):
define zeroext i16 @SetBit(i16 zeroext %0, i8 zeroext %1, i8 zeroext %2) {
%4 = icmp eq i8 %2, 0
%5 = zext i16 %0 to i32
%6 = zext i8 %1 to i32
%7 = shl nuw i32 1, %6
%8 = or i32 %7, %5
%9 = xor i32 %7, -1
%10 = and i32 %9, %5
%11 = select i1 %4, i32 %10, i32 %8
%12 = trunc i32 %11 to i16
ret i16 %12
}
/* Variables and functions */
scalar_t__ listen(int, int);
int /*<<< orphan*/ log_warn(char *);
int control_listen(int fd) {
  if (fd != -1 && listen(fd, 5)) {
    log_warn("control_listen: listen");
    return (-1);
  }
  return (0);
}


x86 assembly (clang, -O0):
<control_listen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0xffffffff,-0x8(%rbp)
je     1164 <control_listen+0x44>
mov    -0x8(%rbp),%edi
mov    $0x5,%esi
call   1030 <listen@plt>
cmp    $0x0,%rax
je     1164 <control_listen+0x44>
lea    0xead(%rip),%rdi
call   1040 <log_warn@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    116b <control_listen+0x4b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<control_listen>:
push   %rbx
xor    %ebx,%ebx
cmp    $0xffffffff,%edi
je     1148 <control_listen+0x28>
mov    $0x5,%esi
call   1030 <listen@plt>
test   %rax,%rax
je     1148 <control_listen+0x28>
lea    0xec2(%rip),%rdi
call   1040 <log_warn@plt>
mov    $0xffffffff,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"control_listen: listen\00"
define i32 @control_listen(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, -1
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i32, i32* %3
%8 = call i64 @listen(i32 %7, i32 5)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %6
%11 = call i32 @log_warn(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %2
br label %13
12: ; preds = %6, %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %10
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
@.str = [23 x i8] c"control_listen: listen\00"
define i32 @control_listen(i32 %0) {
%2 = icmp eq i32 %0, -1
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = tail call i64 @listen(i32 %0, i32 5)
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @log_warn(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %1, %3, %6
%9 = phi i32 [ -1, %6 ], [ 0, %3 ], [ 0, %1 ]
ret i32 %9
}
void XOR(int *A, int B, int C) { *A = B * C; }


x86 assembly (clang, -O0):
<XOR>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
imul   -0x10(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<XOR>:
imul   %edx,%esi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @XOR(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = load i32, i32* %6
%9 = mul nsw i32 %7, %8
%10 = load i32*, i32** %4
store i32 %9, i32* %10
ret void
}

LLVM IR (-O2):
define void @XOR(i32* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %2, %1
store i32 %4, i32* %0
ret void
}
const char *LXTextureTypeID() {
  static const char *s = "LXTexture";
  return s;
}


x86 assembly (clang, -O0):
<LXTextureTypeID>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f15(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LXTextureTypeID>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@LXTextureTypeID.s = internal global i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i32 0, i32 0)
@.str = [10 x i8] c"LXTexture\00"
define i8* @LXTextureTypeID() {
%1 = load i8*, i8** @LXTextureTypeID.s
ret i8* %1
}

LLVM IR (-O2):
@.str = [10 x i8] c"LXTexture\00"
define i8* @LXTextureTypeID() {
ret i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int isnan_d(float);
int isnan_f(float);
int isnan_ld(float);
int isinf_f(float x) {
  return (sizeof(x - x) == sizeof(long double) ? isnan_ld(x - x)
          : sizeof(x - x) == sizeof(double)    ? isnan_d(x - x)
                                               : isnan_f(x - x));
}


x86 assembly (clang, -O0):
<isinf_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
subss  -0x4(%rbp),%xmm0
call   1030 <isnan_f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isinf_f>:
subss  %xmm0,%xmm0
jmp    1030 <isnan_f@plt>

LLVM IR (-O0):
define i32 @isinf_f(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fsub float %3, %4
%6 = call i32 @isnan_f(float %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @isinf_f(float %0) {
%2 = fsub float %0, %0
%3 = tail call i32 @isnan_f(float %2)
ret i32 %3
}
void iris_call_submit_result(struct pdu *pdu) {}


x86 assembly (clang, -O0):
<iris_call_submit_result>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<iris_call_submit_result>:
ret

LLVM IR (-O0):
%struct.pdu = type opaque
define void @iris_call_submit_result(%struct.pdu* %0) {
%2 = alloca %struct.pdu*
store %struct.pdu* %0, %struct.pdu** %2
ret void
}

LLVM IR (-O2):
%struct.pdu = type opaque
define void @iris_call_submit_result(%struct.pdu* nocapture %0) {
ret void
}
/* Variables and functions */
scalar_t__ strtol(char const *, char **, int);
int stcd_i(const char *pszString, int *pi) {
  char *pc;
  *pi = (int)strtol(pszString, &pc, 10);
  return pc - pszString;
}


x86 assembly (clang, -O0):
<stcd_i>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x18(%rbp),%rsi
mov    $0xa,%edx
call   1030 <strtol@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stcd_i>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    %rsp,%rsi
mov    $0xa,%edx
call   1030 <strtol@plt>
mov    %eax,(%r14)
mov    (%rsp),%eax
sub    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @stcd_i(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i8*
store i8* %0, i8** %3
store i32* %1, i32** %4
%6 = load i8*, i8** %3
%7 = call i64 @strtol(i8* %6, i8** %5, i32 10)
%8 = trunc i64 %7 to i32
%9 = load i32*, i32** %4
store i32 %8, i32* %9
%10 = load i8*, i8** %5
%11 = load i8*, i8** %3
%12 = ptrtoint i8* %10 to i64
%13 = ptrtoint i8* %11 to i64
%14 = sub i64 %12, %13
%15 = trunc i64 %14 to i32
ret i32 %15
}

LLVM IR (-O2):
define i32 @stcd_i(i8* %0, i32* nocapture writeonly %1) {
%3 = alloca i8*
%4 = bitcast i8** %3 to i8*
%5 = call i64 @strtol(i8* %0, i8** %3, i32 10)
%6 = trunc i64 %5 to i32
store i32 %6, i32* %1
%7 = load i8*, i8** %3
%8 = ptrtoint i8* %7 to i64
%9 = ptrtoint i8* %0 to i64
%10 = sub i64 %8, %9
%11 = trunc i64 %10 to i32
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printd(int);
int main() { printd(-123456); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffe1dc0,%edi
call   1030 <printd@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xfffe1dc0,%edi
call   1030 <printd@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @printd(i32 -123456)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @printd(i32 -123456)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ sequence;

/* Variables and functions */
char control_letter(size_t rest) {
  const char sequence[] = "TRWAGMYFPDXBNJZSQVHLCKE";
  if (rest >= sizeof(sequence)) {
    return '.';
  } else {
    return sequence[rest];
  }
}


x86 assembly (clang, -O0):
<control_letter>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    0xef1(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xeee(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xeeb(%rip),%rax
mov    %rax,-0x20(%rbp)
cmpq   $0x18,-0x10(%rbp)
jb     113d <control_letter+0x3d>
movb   $0x2e,-0x1(%rbp)
jmp    1148 <control_letter+0x48>
mov    -0x10(%rbp),%rax
mov    -0x30(%rbp,%rax,1),%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<control_letter>:
mov    $0x2e,%al
cmp    $0x17,%rdi
ja     1112 <control_letter+0x12>
lea    0xef1(%rip),%rax
mov    (%rdi,%rax,1),%al
ret

LLVM IR (-O0):
@__const.control_letter.sequence = [24 x i8] c"TRWAGMYFPDXBNJZSQVHLCKE\00"
define signext i8 @control_letter(i64 %0) {
%2 = alloca i8
%3 = alloca i64
%4 = alloca [24 x i8]
store i64 %0, i64* %3
%5 = bitcast [24 x i8]* %4 to i8*
%6 = load i64, i64* %3
%7 = icmp uge i64 %6, 24
br i1 %7, label %8, label %9
8: ; preds = %1
store i8 46, i8* %2
br label %13
9: ; preds = %1
%10 = load i64, i64* %3
%11 = getelementptr inbounds [24 x i8], [24 x i8]* %4, i64 0, i64 %10
%12 = load i8, i8* %11
store i8 %12, i8* %2
br label %13
13: ; preds = %9, %8
%14 = load i8, i8* %2
ret i8 %14
}

LLVM IR (-O2):
@__const.control_letter.sequence = [24 x i8] c"TRWAGMYFPDXBNJZSQVHLCKE\00"
define signext i8 @control_letter(i64 %0) {
%2 = icmp ugt i64 %0, 23
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = getelementptr inbounds [24 x i8], [24 x i8]* @__const.control_letter.sequence, i64 0, i64 %0
%5 = load i8, i8* %4
br label %6
6: ; preds = %1, %3
%7 = phi i8 [ %5, %3 ], [ 46, %1 ]
ret i8 %7
}
/* Variables and functions */
int exact_square(int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int number, c;
  scanf("%d", &number);
  c = exact_square(number);
  printf("%d", c);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1040 <exact_square@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xe9c(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xec4(%rip),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1050 <scanf@plt>
mov    0xc(%rsp),%edi
call   1040 <exact_square@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = call i32 @exact_square(i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @exact_square(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}
int toi_cluster_init(void) { return 0; }


x86 assembly (clang, -O0):
<toi_cluster_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<toi_cluster_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @toi_cluster_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @toi_cluster_init() {
ret i32 0
}
void __attribute__((constructor)) libConWeDo(void) {}


x86 assembly (clang, -O0):
<libConWeDo>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libConWeDo>:
ret

LLVM IR (-O0):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @libConWeDo, i8* null }]
define void @libConWeDo() {
ret void
}

LLVM IR (-O2):
@llvm.global_ctors = appending global [0 x { i32, void ()*, i8* }] zeroinitializer
define void @libConWeDo() {
ret void
}
OP(fd, d0) { op_d0(); }


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <op_d0@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
xor    %eax,%eax
jmp    1030 <op_d0@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @op_d0()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @op_d0()
ret i32 undef
}
int array_wrap() {}


x86 assembly (clang, -O0):
<array_wrap>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<array_wrap>:
ret

LLVM IR (-O0):
define i32 @array_wrap() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @array_wrap() {
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm_and_si128(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ _mm_andnot_si128(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ _mm_cmpgt_epi32(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ _mm_or_si128(int /*<<< orphan*/, int /*<<< orphan*/);
extern __attribute__((__gnu___, __always___, __artificial__)) __m128i
_MM_MAX_EPI32(__m128i a, __m128i b) {
  __m128i cmp, resa, resb;
  cmp = _mm_cmpgt_epi32(a, b);
  resa = _mm_and_si128(cmp, a);
  resb = _mm_andnot_si128(cmp, b);
  return _mm_or_si128(resa, resb);
}


x86 assembly (clang, -O0):
<_MM_MAX_EPI32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_cmpgt_epi32@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x4(%rbp),%esi
call   1060 <_mm_and_si128@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1050 <_mm_andnot_si128@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%edi
mov    -0x14(%rbp),%esi
call   1040 <_mm_or_si128@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_MM_MAX_EPI32>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %edi,%ebp
call   1030 <_mm_cmpgt_epi32@plt>
mov    %eax,%ebx
mov    %eax,%edi
mov    %ebp,%esi
call   1060 <_mm_and_si128@plt>
mov    %eax,%ebp
mov    %ebx,%edi
mov    %r14d,%esi
call   1050 <_mm_andnot_si128@plt>
mov    %ebp,%edi
mov    %eax,%esi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <_mm_or_si128@plt>

LLVM IR (-O0):
define i32 @_MM_MAX_EPI32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @_mm_cmpgt_epi32(i32 %8, i32 %9)
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = load i32, i32* %3
%13 = call i32 @_mm_and_si128(i32 %11, i32 %12)
store i32 %13, i32* %6
%14 = load i32, i32* %5
%15 = load i32, i32* %4
%16 = call i32 @_mm_andnot_si128(i32 %14, i32 %15)
store i32 %16, i32* %7
%17 = load i32, i32* %6
%18 = load i32, i32* %7
%19 = call i32 @_mm_or_si128(i32 %17, i32 %18)
ret i32 %19
}

LLVM IR (-O2):
define i32 @_MM_MAX_EPI32(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmpgt_epi32(i32 %0, i32 %1)
%4 = tail call i32 @_mm_and_si128(i32 %3, i32 %0)
%5 = tail call i32 @_mm_andnot_si128(i32 %3, i32 %1)
%6 = tail call i32 @_mm_or_si128(i32 %4, i32 %5)
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_STRING;

/* Variables and functions */
scalar_t__ ASN1_item_new(int /*<<< orphan*/ *);
int /*<<< orphan*/ DISPLAYTEXT_it;
ASN1_STRING *DISPLAYTEXT_new(void) {
  return (ASN1_STRING *)ASN1_item_new(&DISPLAYTEXT_it);
}


x86 assembly (clang, -O0):
<DISPLAYTEXT_new>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rdi
call   1030 <ASN1_item_new@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DISPLAYTEXT_new>:
mov    0x2ec9(%rip),%rdi
jmp    1030 <ASN1_item_new@plt>

LLVM IR (-O0):
@DISPLAYTEXT_it = global i32 0
define i32* @DISPLAYTEXT_new() {
%1 = call i64 @ASN1_item_new(i32* @DISPLAYTEXT_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}

LLVM IR (-O2):
@DISPLAYTEXT_it = global i32 0
define i32* @DISPLAYTEXT_new() {
%1 = tail call i64 @ASN1_item_new(i32* @DISPLAYTEXT_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}
/* Type definitions */
struct meat_main_impl {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/
meat_main_impl_game_list_report(struct meat_main_impl *const);
int /*<<< orphan*/ meat_main_impl_show_range(struct meat_main_impl *const);
int meat_main_impl_dispatch(struct meat_main_impl *const p_main) {
  int i_result;
  meat_main_impl_show_range(p_main);
  meat_main_impl_game_list_report(p_main);
  i_result = 0;
  return i_result;
}


x86 assembly (clang, -O0):
<meat_main_impl_dispatch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <meat_main_impl_show_range@plt>
mov    -0x8(%rbp),%rdi
call   1030 <meat_main_impl_game_list_report@plt>
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<meat_main_impl_dispatch>:
push   %rbx
mov    %rdi,%rbx
call   1040 <meat_main_impl_show_range@plt>
mov    %rbx,%rdi
call   1030 <meat_main_impl_game_list_report@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.meat_main_impl = type { i32 }
define i32 @meat_main_impl_dispatch(%struct.meat_main_impl* %0) {
%2 = alloca %struct.meat_main_impl*
%3 = alloca i32
store %struct.meat_main_impl* %0, %struct.meat_main_impl** %2
%4 = load %struct.meat_main_impl*, %struct.meat_main_impl** %2
%5 = call i32 @meat_main_impl_show_range(%struct.meat_main_impl* %4)
%6 = load %struct.meat_main_impl*, %struct.meat_main_impl** %2
%7 = call i32 @meat_main_impl_game_list_report(%struct.meat_main_impl* %6)
store i32 0, i32* %3
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
%struct.meat_main_impl = type { i32 }
define i32 @meat_main_impl_dispatch(%struct.meat_main_impl* %0) {
%2 = tail call i32 @meat_main_impl_show_range(%struct.meat_main_impl* %0)
%3 = tail call i32 @meat_main_impl_game_list_report(%struct.meat_main_impl* %0)
ret i32 0
}
double __drem(x, y)
double x, y;
{ return __remainder(x, y); }


x86 assembly (clang, -O0):
<__drem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mov    $0x2,%al
call   1030 <__remainder@plt>
cvtsi2sd %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__drem>:
push   %rax
mov    $0x2,%al
call   1030 <__remainder@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @__drem(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call i32 (double, double, ...) bitcast (i32 (...)* @__remainder to i32 (double, double, ...)*)(double %5, double %6)
%8 = sitofp i32 %7 to double
ret double %8
}

LLVM IR (-O2):
define double @__drem(double %0, double %1) {
%3 = tail call i32 (double, double, ...) bitcast (i32 (...)* @__remainder to i32 (double, double, ...)*)(double %0, double %1)
%4 = sitofp i32 %3 to double
ret double %4
}
unsigned char HEX2BCD(unsigned char x) {
  unsigned char ourvalue = ((((x) / 10) << 4) + (x) % 10);
  return ourvalue;
}


x86 assembly (clang, -O0):
<HEX2BCD>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
shl    $0x4,%eax
mov    %eax,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x8(%rbp),%eax
add    %edx,%eax
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HEX2BCD>:
mov    %edi,%eax
imul   $0xcd,%edi,%ecx
shr    $0xb,%ecx
mov    %ecx,%edx
shl    $0x4,%dl
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %cl,%al
or     %dl,%al
ret

LLVM IR (-O0):
define zeroext i8 @HEX2BCD(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = zext i8 %4 to i32
%6 = sdiv i32 %5, 10
%7 = shl i32 %6, 4
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = srem i32 %9, 10
%11 = add nsw i32 %7, %10
%12 = trunc i32 %11 to i8
store i8 %12, i8* %3
%13 = load i8, i8* %3
ret i8 %13
}

LLVM IR (-O2):
define zeroext i8 @HEX2BCD(i8 zeroext %0) {
%2 = udiv i8 %0, 10
%3 = shl i8 %2, 4
%4 = urem i8 %0, 10
%5 = or i8 %3, %4
ret i8 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ zwave_sendClassCommand(unsigned int, int, int,
                                          unsigned char *, int);
void zwavecmd_thermostat_setmode(unsigned int id, int mode) {
  unsigned char buf[256];
  printf("mode is %d\n", mode);
  buf[0] = mode;
  zwave_sendClassCommand(id, 0x40, 0x01, buf, 1);
}


x86 assembly (clang, -O0):
<zwavecmd_thermostat_setmode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
mov    %al,-0x110(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x110(%rbp),%rcx
mov    $0x40,%esi
mov    $0x1,%r8d
mov    %r8d,%edx
call   1040 <zwave_sendClassCommand@plt>
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zwavecmd_thermostat_setmode>:
push   %rbp
push   %rbx
sub    $0x108,%rsp
mov    %esi,%ebx
mov    %edi,%ebp
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
mov    %bl,(%rsp)
mov    %rsp,%rcx
mov    %ebp,%edi
mov    $0x40,%esi
mov    $0x1,%edx
mov    $0x1,%r8d
call   1040 <zwave_sendClassCommand@plt>
add    $0x108,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [12 x i8] c"mode is %d\0A\00"
define void @zwavecmd_thermostat_setmode(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca [256 x i8]
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = load i32, i32* %4
%9 = trunc i32 %8 to i8
%10 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
store i8 %9, i8* %10
%11 = load i32, i32* %3
%12 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%13 = call i32 @zwave_sendClassCommand(i32 %11, i32 64, i32 1, i8* %12, i32 1)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"mode is %d\0A\00"
define void @zwavecmd_thermostat_setmode(i32 %0, i32 %1) {
%3 = alloca [256 x i8]
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%5 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %1)
%6 = trunc i32 %1 to i8
store i8 %6, i8* %4
%7 = call i32 @zwave_sendClassCommand(i32 %0, i32 64, i32 1, i8* %4, i32 1)
ret void
}
unsigned long djb2(unsigned char *str) {
  unsigned long hash = 5381;
  int c;
  while ((c = *str++))
    hash = ((hash << 5) + hash) + c;
  return hash;
}


x86 assembly (clang, -O0):
<djb2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1505,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     114a <djb2+0x4a>
mov    -0x10(%rbp),%rax
shl    $0x5,%rax
add    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <djb2+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<djb2>:
mov    (%rdi),%cl
test   %cl,%cl
je     112c <djb2+0x2c>
add    $0x1,%rdi
mov    $0x1505,%eax
nop
mov    %rax,%rdx
shl    $0x5,%rdx
add    %rax,%rdx
movzbl %cl,%eax
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <djb2+0x10>
ret
mov    $0x1505,%eax
ret

LLVM IR (-O0):
define i64 @djb2(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
store i64 5381, i64* %3
br label %5
5: ; preds = %11, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
%9 = zext i8 %8 to i32
store i32 %9, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %5
%12 = load i64, i64* %3
%13 = shl i64 %12, 5
%14 = load i64, i64* %3
%15 = add i64 %13, %14
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = add i64 %15, %17
store i64 %18, i64* %3
br label %5
19: ; preds = %5
%20 = load i64, i64* %3
ret i64 %20
}

LLVM IR (-O2):
define i64 @djb2(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = phi i64 [ %11, %4 ], [ 5381, %1 ]
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = mul i64 %7, 33
%10 = zext i8 %5 to i64
%11 = add i64 %9, %10
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ 5381, %1 ], [ %11, %4 ]
ret i64 %15
}
int maiorQuem(int idade1, int idade2) {
  if (idade1 > idade2) {
    return 1;
  } else {
    return 2;
  }
}


x86 assembly (clang, -O0):
<maiorQuem>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1122 <maiorQuem+0x22>
movl   $0x1,-0x4(%rbp)
jmp    1129 <maiorQuem+0x29>
movl   $0x2,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<maiorQuem>:
xor    %ecx,%ecx
cmp    %esi,%edi
setg   %cl
mov    $0x2,%eax
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @maiorQuem(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, i32* %3
br label %11
10: ; preds = %2
store i32 2, i32* %3
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @maiorQuem(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 1, i32 2
ret i32 %4
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ y_root;
};
typedef TYPE_1__ XPointerMovedEvent;

/* Variables and functions */
int get_XPointerMovedEvent_y_root(void *_p) {
  return (int)((XPointerMovedEvent *)_p)->y_root;
}


x86 assembly (clang, -O0):
<get_XPointerMovedEvent_y_root>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XPointerMovedEvent_y_root>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XPointerMovedEvent_y_root(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XPointerMovedEvent_y_root(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf("usage: hex <number>\n");
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"usage: hex <number>\0A\00"
@EXIT_FAILURE = global i32 0
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_FAILURE
%3 = call i32 @exit(i32 %2)
unreachable
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
@str = [20 x i8] c"usage: hex <number>\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_FAILURE
%3 = tail call i32 @exit(i32 %2)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ f();
int /*<<< orphan*/ g();
int /*<<< orphan*/ h();
int main(int x) {
  f();
  h();
  g();
  h();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <f@plt>
mov    $0x0,%al
call   1030 <h@plt>
mov    $0x0,%al
call   1050 <g@plt>
mov    $0x0,%al
call   1030 <h@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <f@plt>
xor    %eax,%eax
call   1030 <h@plt>
xor    %eax,%eax
call   1050 <g@plt>
xor    %eax,%eax
call   1030 <h@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @f()
%4 = call i32 (...) @h()
%5 = call i32 (...) @g()
%6 = call i32 (...) @h()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0) {
%2 = tail call i32 (...) @f()
%3 = tail call i32 (...) @h()
%4 = tail call i32 (...) @g()
%5 = tail call i32 (...) @h()
ret i32 0
}
/* Variables and functions */
int fibonacci(int);
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int number = 0, total, number2, counter = 0, entered;
  printf("Enter the number: ");
  scanf("%d", &entered);
  total = fibonacci(entered);
  printf("Fibonacci is: %d\n", total);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0x14(%rbp)
lea    0xeac(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xeb1(%rip),%rdi
lea    -0x18(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x18(%rbp),%edi
call   1040 <fibonacci@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xe96(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xecd(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
call   1040 <fibonacci@plt>
lea    0xeb6(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"Enter the number: \00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [18 x i8] c"Fibonacci is: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 0, i32* %5
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %6)
%9 = load i32, i32* %6
%10 = call i32 @fibonacci(i32 %9)
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.2, i64 0, i64 0), i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [19 x i8] c"Enter the number: \00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [18 x i8] c"Fibonacci is: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @fibonacci(i32 %5)
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str.2, i64 0, i64 0), i32 %6)
ret i32 0
}
void swap(double *x, double *y) {
  double temp;
  temp = *x;
  *x = *y;
  *y = temp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
movsd  -0x18(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
movsd  (%rdi),%xmm0
movsd  (%rsi),%xmm1
movsd  %xmm1,(%rdi)
movsd  %xmm0,(%rsi)
ret

LLVM IR (-O0):
define void @swap(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
%5 = alloca double
store double* %0, double** %3
store double* %1, double** %4
%6 = load double*, double** %3
%7 = load double, double* %6
store double %7, double* %5
%8 = load double*, double** %4
%9 = load double, double* %8
%10 = load double*, double** %3
store double %9, double* %10
%11 = load double, double* %5
%12 = load double*, double** %4
store double %11, double* %12
ret void
}

LLVM IR (-O2):
define void @swap(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %0
%4 = load double, double* %1
store double %4, double* %0
store double %3, double* %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ addbyte(int);
int /*<<< orphan*/ addlong(int /*<<< orphan*/);
int LOAD_REG_IMM(uint32_t imm) {
  int host_reg = 3;
  addbyte(0xb8 | 3);
  addlong(imm);
  return host_reg;
}


x86 assembly (clang, -O0):
<LOAD_REG_IMM>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
mov    $0xbb,%edi
call   1040 <addbyte@plt>
mov    -0x4(%rbp),%edi
call   1030 <addlong@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LOAD_REG_IMM>:
push   %rbx
mov    %edi,%ebx
mov    $0xbb,%edi
call   1040 <addbyte@plt>
mov    %ebx,%edi
call   1030 <addlong@plt>
mov    $0x3,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @LOAD_REG_IMM(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 3, i32* %3
%4 = call i32 @addbyte(i32 187)
%5 = load i32, i32* %2
%6 = call i32 @addlong(i32 %5)
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @LOAD_REG_IMM(i32 %0) {
%2 = tail call i32 @addbyte(i32 187)
%3 = tail call i32 @addlong(i32 %0)
ret i32 3
}
long long next2_to_n(long long x) {
  long long i = 1;
  while (i < x)
    i <<= 1;
  return i;
}


x86 assembly (clang, -O0):
<next2_to_n>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x8(%rbp),%rax
jge    112f <next2_to_n+0x2f>
mov    -0x10(%rbp),%rax
shl    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <next2_to_n+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<next2_to_n>:
mov    $0x1,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
mov    %rcx,%rax
add    %rcx,%rcx
cmp    %rdi,%rax
jl     1110 <next2_to_n+0x10>
ret

LLVM IR (-O0):
define i64 @next2_to_n(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
store i64 1, i64* %3
br label %4
4: ; preds = %8, %1
%5 = load i64, i64* %3
%6 = load i64, i64* %2
%7 = icmp slt i64 %5, %6
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i64, i64* %3
%10 = shl i64 %9, 1
store i64 %10, i64* %3
br label %4
11: ; preds = %4
%12 = load i64, i64* %3
ret i64 %12
}

LLVM IR (-O2):
define i64 @next2_to_n(i64 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 1, %1 ], [ %5, %2 ]
%4 = icmp slt i64 %3, %0
%5 = shl i64 %3, 1
br i1 %4, label %2, label %6
6: ; preds = %2
ret i64 %3
}
/* Variables and functions */
float coshf(float);
float sinhf(float);
float tanhf(float x) { return sinhf(x) / coshf(x); }


x86 assembly (clang, -O0):
<tanhf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1040 <sinhf@plt>
movss  %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <coshf@plt>
movaps %xmm0,%xmm1
movss  -0x8(%rbp),%xmm0
divss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tanhf>:
push   %rax
movss  %xmm0,(%rsp)
call   1040 <sinhf@plt>
movss  %xmm0,0x4(%rsp)
movss  (%rsp),%xmm0
call   1030 <coshf@plt>
movss  0x4(%rsp),%xmm1
divss  %xmm0,%xmm1
movaps %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @tanhf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @sinhf(float %3)
%5 = load float, float* %2
%6 = call float @coshf(float %5)
%7 = fdiv float %4, %6
ret float %7
}

LLVM IR (-O2):
define float @tanhf(float %0) {
%2 = tail call float @sinhf(float %0)
%3 = tail call float @coshf(float %0)
%4 = fdiv float %2, %3
ret float %4
}
/* Type definitions */
typedef int /*<<< orphan*/ EVP_MD_CTX;

/* Variables and functions */
int /*<<< orphan*/ EVP_MD_CTX_cleanup(int /*<<< orphan*/ *);
int /*<<< orphan*/ free(int /*<<< orphan*/ *);
void EVP_MD_CTX_free(EVP_MD_CTX *ctx) {
  if (ctx == NULL)
    return;
  EVP_MD_CTX_cleanup(ctx);
  free(ctx);
}


x86 assembly (clang, -O0):
<EVP_MD_CTX_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113c <EVP_MD_CTX_free+0x1c>
jmp    114e <EVP_MD_CTX_free+0x2e>
mov    -0x8(%rbp),%rdi
call   1040 <EVP_MD_CTX_cleanup@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EVP_MD_CTX_free>:
test   %rdi,%rdi
je     1137 <EVP_MD_CTX_free+0x17>
push   %rbx
mov    %rdi,%rbx
call   1040 <EVP_MD_CTX_cleanup@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @EVP_MD_CTX_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = icmp eq i32* %3, null
br i1 %4, label %5, label %6
5: ; preds = %1
br label %11
6: ; preds = %1
%7 = load i32*, i32** %2
%8 = call i32 @EVP_MD_CTX_cleanup(i32* %7)
%9 = load i32*, i32** %2
%10 = call i32 @free(i32* %9)
br label %11
11: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
define void @EVP_MD_CTX_free(i32* %0) {
%2 = icmp eq i32* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i32 @EVP_MD_CTX_cleanup(i32* %0)
%5 = tail call i32 @free(i32* %0)
br label %6
6: ; preds = %1, %3
ret void
}
int calculate(int (*p)(int), int n) { return (p(n)); }


x86 assembly (clang, -O0):
<calculate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%edi
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculate>:
mov    %rdi,%rax
mov    %esi,%edi
jmp    *%rax

LLVM IR (-O0):
define i32 @calculate(i32 (i32)* %0, i32 %1) {
%3 = alloca i32 (i32)*
%4 = alloca i32
store i32 (i32)* %0, i32 (i32)** %3
store i32 %1, i32* %4
%5 = load i32 (i32)*, i32 (i32)** %3
%6 = load i32, i32* %4
%7 = call i32 %5(i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @calculate(i32 (i32)* nocapture %0, i32 %1) {
%3 = tail call i32 %0(i32 %1)
ret i32 %3
}
/* Variables and functions */
int u32_eq(const void *a, size_t na, const void *b, size_t nb) {
  (void)a;
  (void)b;
  return na == nb;
}


x86 assembly (clang, -O0):
<u32_eq>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x20(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<u32_eq>:
xor    %eax,%eax
cmp    %rcx,%rsi
sete   %al
ret

LLVM IR (-O0):
define i32 @u32_eq(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %7
%11 = load i64, i64* %6
%12 = load i64, i64* %8
%13 = icmp eq i64 %11, %12
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @u32_eq(i8* nocapture readnone %0, i64 %1, i8* nocapture readnone %2, i64 %3) {
%5 = icmp eq i64 %1, %3
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ bar();
int /*<<< orphan*/ foo();
int /*<<< orphan*/ omp_set_nested(int);
int main() {
  omp_set_nested(1);
#pragma omp parallel num_threads(2)
#pragma omp single
  foo();
#pragma omp parallel num_threads(2)
#pragma omp single
  bar();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
call   1040 <omp_set_nested@plt>
mov    $0x0,%al
call   1050 <foo@plt>
mov    $0x0,%al
call   1030 <bar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1040 <omp_set_nested@plt>
xor    %eax,%eax
call   1050 <foo@plt>
xor    %eax,%eax
call   1030 <bar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @omp_set_nested(i32 1)
%3 = call i32 (...) @foo()
%4 = call i32 (...) @bar()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @omp_set_nested(i32 1)
%2 = tail call i32 (...) @foo()
%3 = tail call i32 (...) @bar()
ret i32 0
}
int grib_get_bit(const unsigned char *p, long bitp) {
  p += (bitp >> 3);
  return (*p & (1 << (7 - (bitp % 8))));
}


x86 assembly (clang, -O0):
<grib_get_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
sar    $0x3,%rax
add    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    $0x8,%ecx
cqto
idiv   %rcx
mov    -0x14(%rbp),%eax
mov    $0x7,%ecx
sub    %rdx,%rcx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<grib_get_bit>:
mov    %rsi,%rax
sar    $0x3,%rax
movzbl (%rdi,%rax,1),%edx
lea    0x7(%rsi),%eax
test   %rsi,%rsi
cmovns %esi,%eax
and    $0xf8,%eax
sub    %eax,%esi
mov    $0x7,%cl
sub    %sil,%cl
mov    $0x1,%eax
shl    %cl,%eax
and    %edx,%eax
ret

LLVM IR (-O0):
define i32 @grib_get_bit(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = ashr i64 %5, 3
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i64 %6
store i8* %8, i8** %3
%9 = load i8*, i8** %3
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i64, i64* %4
%13 = srem i64 %12, 8
%14 = sub nsw i64 7, %13
%15 = trunc i64 %14 to i32
%16 = shl i32 1, %15
%17 = and i32 %11, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @grib_get_bit(i8* nocapture %0, i64 %1) {
%3 = ashr i64 %1, 3
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = srem i64 %1, 8
%8 = trunc i64 %7 to i32
%9 = sub nsw i32 7, %8
%10 = shl nuw nsw i32 1, %9
%11 = and i32 %10, %6
ret i32 %11
}
unsigned long long int fibonacci() {
  static unsigned long long int first = 1;
  static unsigned long long int second = 1;
  unsigned long long int out = first + second;
  first = second;
  second = out;
  return out;
}


x86 assembly (clang, -O0):
<fibonacci>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f15(%rip),%rax
add    0x2f16(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    0x2f0b(%rip),%rax
mov    %rax,0x2efc(%rip)
mov    -0x8(%rbp),%rax
mov    %rax,0x2ef9(%rip)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibonacci>:
mov    0x2f21(%rip),%rcx
mov    0x2f12(%rip),%rax
add    %rcx,%rax
mov    %rcx,0x2f08(%rip)
mov    %rax,0x2f09(%rip)
ret

LLVM IR (-O0):
@fibonacci.first = internal global i64 1
@fibonacci.second = internal global i64 1
define i64 @fibonacci() {
%1 = alloca i64
%2 = load i64, i64* @fibonacci.first
%3 = load i64, i64* @fibonacci.second
%4 = add i64 %2, %3
store i64 %4, i64* %1
%5 = load i64, i64* @fibonacci.second
store i64 %5, i64* @fibonacci.first
%6 = load i64, i64* %1
store i64 %6, i64* @fibonacci.second
%7 = load i64, i64* %1
ret i64 %7
}

LLVM IR (-O2):
@fibonacci.first = internal unnamed_addr global i64 1
@fibonacci.second = internal unnamed_addr global i64 1
define i64 @fibonacci() {
%1 = load i64, i64* @fibonacci.first
%2 = load i64, i64* @fibonacci.second
%3 = add i64 %2, %1
store i64 %2, i64* @fibonacci.first
store i64 %3, i64* @fibonacci.second
ret i64 %3
}