xunge/DecIR huggingface dataset:
/* Type definitions */
struct timeval {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assert(struct timeval *);
int /*<<< orphan*/ timeval_add(struct timeval *, struct timeval *,
                               struct timeval *);
int /*<<< orphan*/ timeval_millisecond_init(struct timeval *, unsigned int);
void timeval_add_ms(struct timeval *a, unsigned int ms,
                    struct timeval *result) {
  struct timeval b;
  assert(a);
  assert(result);
  timeval_millisecond_init(&b, ms);
  timeval_add(a, &b, result);
}


x86 assembly (clang, -O0):
<timeval_add_ms>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <assert@plt>
mov    -0x18(%rbp),%rdi
call   1040 <assert@plt>
mov    -0xc(%rbp),%esi
lea    -0x20(%rbp),%rdi
call   1050 <timeval_millisecond_init@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rdx
lea    -0x20(%rbp),%rsi
call   1030 <timeval_add@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timeval_add_ms>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %esi,%r14d
mov    %rdi,%rbp
call   1040 <assert@plt>
mov    %rbx,%rdi
call   1040 <assert@plt>
mov    %rsp,%r15
mov    %r15,%rdi
mov    %r14d,%esi
call   1050 <timeval_millisecond_init@plt>
mov    %rbp,%rdi
mov    %r15,%rsi
mov    %rbx,%rdx
call   1030 <timeval_add@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
%struct.timeval = type { i32 }
define void @timeval_add_ms(%struct.timeval* %0, i32 %1, %struct.timeval* %2) {
%4 = alloca %struct.timeval*
%5 = alloca i32
%6 = alloca %struct.timeval*
%7 = alloca %struct.timeval
store %struct.timeval* %0, %struct.timeval** %4
store i32 %1, i32* %5
store %struct.timeval* %2, %struct.timeval** %6
%8 = load %struct.timeval*, %struct.timeval** %4
%9 = call i32 @assert(%struct.timeval* %8)
%10 = load %struct.timeval*, %struct.timeval** %6
%11 = call i32 @assert(%struct.timeval* %10)
%12 = load i32, i32* %5
%13 = call i32 @timeval_millisecond_init(%struct.timeval* %7, i32 %12)
%14 = load %struct.timeval*, %struct.timeval** %4
%15 = load %struct.timeval*, %struct.timeval** %6
%16 = call i32 @timeval_add(%struct.timeval* %14, %struct.timeval* %7, %struct.timeval* %15)
ret void
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
define void @timeval_add_ms(%struct.timeval* %0, i32 %1, %struct.timeval* %2) {
%4 = alloca %struct.timeval
%5 = bitcast %struct.timeval* %4 to i8*
%6 = tail call i32 @assert(%struct.timeval* %0)
%7 = tail call i32 @assert(%struct.timeval* %2)
%8 = call i32 @timeval_millisecond_init(%struct.timeval* %4, i32 %1)
%9 = call i32 @timeval_add(%struct.timeval* %0, %struct.timeval* %4, %struct.timeval* %2)
ret void
}
int test_imm_63int16_mem(short *val) {
  return ((*val) & (0x63 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_63int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0x63,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_63int16_mem>:
testb  $0x63,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_63int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 99
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_63int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 99
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct cec_msg {
  int /*<<< orphan*/ *msg;
};
typedef int /*<<< orphan*/ __u8;

/* Variables and functions */
void cec_ops_timer_cleared_status(const struct cec_msg *msg,
                                  __u8 *timer_cleared_status) {
  *timer_cleared_status = msg->msg[2];
}


x86 assembly (clang, -O0):
<cec_ops_timer_cleared_status>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    0x8(%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cec_ops_timer_cleared_status>:
mov    (%rdi),%rax
mov    0x8(%rax),%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
%struct.cec_msg = type { i32* }
define void @cec_ops_timer_cleared_status(%struct.cec_msg* %0, i32* %1) {
%3 = alloca %struct.cec_msg*
%4 = alloca i32*
store %struct.cec_msg* %0, %struct.cec_msg** %3
store i32* %1, i32** %4
%5 = load %struct.cec_msg*, %struct.cec_msg** %3
%6 = getelementptr inbounds %struct.cec_msg, %struct.cec_msg* %5, i32 0, i32 0
%7 = load i32*, i32** %6
%8 = getelementptr inbounds i32, i32* %7, i64 2
%9 = load i32, i32* %8
%10 = load i32*, i32** %4
store i32 %9, i32* %10
ret void
}

LLVM IR (-O2):
%struct.cec_msg = type { i32* }
define void @cec_ops_timer_cleared_status(%struct.cec_msg* nocapture %0, i32* nocapture writeonly %1) {
%3 = getelementptr inbounds %struct.cec_msg, %struct.cec_msg* %0, i64 0, i32 0
%4 = load i32*, i32** %3
%5 = getelementptr inbounds i32, i32* %4, i64 2
%6 = load i32, i32* %5
store i32 %6, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ e_shrri(int, int);
int /*<<< orphan*/ ra_mchange(int, int);
int ra_mgetv(int);
void co_shr_i(int ra, int rb, int z) {
  int mab;
  mab = ra_mgetv(rb);
  ra_mchange(mab, ra);
  e_shrri(mab, z);
}


x86 assembly (clang, -O0):
<co_shr_i>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <ra_mgetv@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%edi
mov    -0x4(%rbp),%esi
call   1050 <ra_mchange@plt>
mov    -0x10(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <e_shrri@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<co_shr_i>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %edi,%ebp
mov    %esi,%edi
call   1040 <ra_mgetv@plt>
mov    %eax,%ebx
mov    %eax,%edi
mov    %ebp,%esi
call   1050 <ra_mchange@plt>
mov    %ebx,%edi
mov    %r14d,%esi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <e_shrri@plt>

LLVM IR (-O0):
define void @co_shr_i(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = call i32 @ra_mgetv(i32 %8)
store i32 %9, i32* %7
%10 = load i32, i32* %7
%11 = load i32, i32* %4
%12 = call i32 @ra_mchange(i32 %10, i32 %11)
%13 = load i32, i32* %7
%14 = load i32, i32* %6
%15 = call i32 @e_shrri(i32 %13, i32 %14)
ret void
}

LLVM IR (-O2):
define void @co_shr_i(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @ra_mgetv(i32 %1)
%5 = tail call i32 @ra_mchange(i32 %4, i32 %0)
%6 = tail call i32 @e_shrri(i32 %4, i32 %2)
ret void
}
int dup(f) { return (0); }


x86 assembly (clang, -O0):
<dup>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dup>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dup(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @dup(i32 %0) {
ret i32 0
}
long foo2(x, y)
register int x;
register long y;
{ return x - y; }


x86 assembly (clang, -O0):
<foo2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movslq -0x4(%rbp),%rax
sub    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo2>:
movslq %edi,%rax
sub    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @foo2(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = load i32, i32* %3
%6 = sext i32 %5 to i64
%7 = load i64, i64* %4
%8 = sub nsw i64 %6, %7
ret i64 %8
}

LLVM IR (-O2):
define i64 @foo2(i32 %0, i64 %1) {
%3 = sext i32 %0 to i64
%4 = sub nsw i64 %3, %1
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ LCD_write_byte(int, int /*<<< orphan*/);
void LCD_home(void) { LCD_write_byte(0x02, 0); }


x86 assembly (clang, -O0):
<LCD_home>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
xor    %esi,%esi
call   1030 <LCD_write_byte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCD_home>:
mov    $0x2,%edi
xor    %esi,%esi
jmp    1030 <LCD_write_byte@plt>

LLVM IR (-O0):
define void @LCD_home() {
%1 = call i32 @LCD_write_byte(i32 2, i32 0)
ret void
}

LLVM IR (-O2):
define void @LCD_home() {
%1 = tail call i32 @LCD_write_byte(i32 2, i32 0)
ret void
}
/* Variables and functions */
scalar_t__ getFrameForPage(int *, int);
int isPageMapped(int *table, int page) {
  if (getFrameForPage(table, page) != 0)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<isPageMapped>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <getFrameForPage@plt>
cmp    $0x0,%rax
je     1141 <isPageMapped+0x31>
movl   $0x1,-0x4(%rbp)
jmp    1148 <isPageMapped+0x38>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPageMapped>:
push   %rax
call   1030 <getFrameForPage@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @isPageMapped(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
%6 = load i32*, i32** %4
%7 = load i32, i32* %5
%8 = call i64 @getFrameForPage(i32* %6, i32 %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 1, i32* %3
br label %12
11: ; preds = %2
store i32 0, i32* %3
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @isPageMapped(i32* %0, i32 %1) {
%3 = tail call i64 @getFrameForPage(i32* %0, i32 %1)
%4 = icmp ne i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
scalar_t__ RAND_MAX;
scalar_t__ rand();
float distributions_uniform(float a, float b) {
  return (a + (b - a) * ((float)rand() / (float)RAND_MAX));
}


x86 assembly (clang, -O0):
<distributions_uniform>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
subss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
movss  -0x10(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
cvtsi2ss %rax,%xmm2
mov    0x2e90(%rip),%rax
cvtsi2ssq (%rax),%xmm3
divss  %xmm3,%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<distributions_uniform>:
push   %rax
movss  %xmm0,0x4(%rsp)
subss  %xmm0,%xmm1
movss  %xmm1,(%rsp)
xor    %eax,%eax
call   1030 <rand@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
mov    0x2eb2(%rip),%rax
xorps  %xmm1,%xmm1
cvtsi2ssq (%rax),%xmm1
divss  %xmm1,%xmm0
mulss  (%rsp),%xmm0
addss  0x4(%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define float @distributions_uniform(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = load float, float* %3
%8 = fsub float %6, %7
%9 = call i64 (...) @rand()
%10 = sitofp i64 %9 to float
%11 = load i64, i64* @RAND_MAX
%12 = sitofp i64 %11 to float
%13 = fdiv float %10, %12
%14 = call float @llvm.fmuladd.f32(float %8, float %13, float %5)
ret float %14
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define float @distributions_uniform(float %0, float %1) {
%3 = fsub float %1, %0
%4 = tail call i64 (...) @rand()
%5 = sitofp i64 %4 to float
%6 = load i64, i64* @RAND_MAX
%7 = sitofp i64 %6 to float
%8 = fdiv float %5, %7
%9 = tail call float @llvm.fmuladd.f32(float %3, float %8, float %0)
ret float %9
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
scalar_t__ send(int, char *, int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
void send_response(int client_fd, char *response) {
  if (send(client_fd, response, strlen(response), 0) < 0) {
    perror("send_response: send");
  }
}


x86 assembly (clang, -O0):
<send_response>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
xor    %ecx,%ecx
call   1040 <send@plt>
cmp    $0x0,%rax
jge    117c <send_response+0x4c>
lea    0xe89(%rip),%rdi
call   1050 <perror@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_response>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
xor    %ecx,%ecx
call   1040 <send@plt>
test   %rax,%rax
js     115a <send_response+0x2a>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
lea    0xe9f(%rip),%rdi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <perror@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"send_response: send\00"
define void @send_response(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i64 @send(i32 %5, i8* %6, i32 %8, i32 0)
%10 = icmp slt i64 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = call i32 @perror(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %2
ret void
}

LLVM IR (-O2):
@.str = [20 x i8] c"send_response: send\00"
define void @send_response(i32 %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i64 @send(i32 %0, i8* %1, i32 %3, i32 0)
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @perror(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %2
ret void
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMRCA_set(void) { return U_WMRCORENONE_set("U_WMRCA"); }


x86 assembly (clang, -O0):
<U_WMRCA_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRCA_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMRCA\00"
define i8* @U_WMRCA_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMRCA\00"
define i8* @U_WMRCA_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ lua_pushnil();
int /*<<< orphan*/ lua_pushnumber(int);
void pushresult(int i) {
  if (i)
    lua_pushnumber(1);
  else
    lua_pushnil();
}


x86 assembly (clang, -O0):
<pushresult>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1144 <pushresult+0x24>
mov    $0x1,%edi
call   1030 <lua_pushnumber@plt>
jmp    114b <pushresult+0x2b>
mov    $0x0,%al
call   1040 <lua_pushnil@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pushresult>:
test   %edi,%edi
je     112e <pushresult+0xe>
mov    $0x1,%edi
jmp    1030 <lua_pushnumber@plt>
xor    %eax,%eax
jmp    1040 <lua_pushnil@plt>

LLVM IR (-O0):
define void @pushresult(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @lua_pushnumber(i32 1)
br label %9
7: ; preds = %1
%8 = call i32 (...) @lua_pushnil()
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @pushresult(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @lua_pushnumber(i32 1)
br label %7
5: ; preds = %1
%6 = tail call i32 (...) @lua_pushnil()
br label %7
7: ; preds = %5, %3
ret void
}
int CountDay(long date) {
  int d = 0;
  date = date % 100;
  d = (int)date;
  return (d);
}


x86 assembly (clang, -O0):
<CountDay>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x64,%ecx
cqto
idiv   %rcx
mov    %rdx,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CountDay>:
movabs $0xa3d70a3d70a3d70b,%rcx
0a d7 a3
mov    %rdi,%rax
imul   %rcx
add    %rdi,%rdx
mov    %rdx,%rax
shr    $0x3f,%rax
shr    $0x6,%rdx
add    %eax,%edx
imul   $0x64,%edx,%eax
sub    %eax,%edi
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @CountDay(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
store i32 0, i32* %3
%4 = load i64, i64* %2
%5 = srem i64 %4, 100
store i64 %5, i64* %2
%6 = load i64, i64* %2
%7 = trunc i64 %6 to i32
store i32 %7, i32* %3
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @CountDay(i64 %0) {
%2 = srem i64 %0, 100
%3 = trunc i64 %2 to i32
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
size_t fread(void *, size_t, size_t, int /*<<< orphan*/ *);
size_t hread(void *ptr, size_t size, size_t count, FILE *stream) {
  return fread(ptr, size, count, stream);
}


x86 assembly (clang, -O0):
<hread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <fread@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hread>:
jmp    1030 <fread@plt>

LLVM IR (-O0):
define i64 @hread(i8* %0, i64 %1, i64 %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i32*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i32* %3, i32** %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = load i64, i64* %7
%12 = load i32*, i32** %8
%13 = call i64 @fread(i8* %9, i64 %10, i64 %11, i32* %12)
ret i64 %13
}

LLVM IR (-O2):
define i64 @hread(i8* nocapture %0, i64 %1, i64 %2, i32* nocapture %3) {
%5 = tail call i64 @fread(i8* %0, i64 %1, i64 %2, i32* %3)
ret i64 %5
}
char readSerial() {
  volatile char *serial_base = (char *)0x20000000;
  char ready = 0;
  while (!ready) {
    ready = *(serial_base + 1);
  }
  char val = *serial_base;
  return val;
}


x86 assembly (clang, -O0):
<readSerial>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20000000,%eax
mov    %rax,-0x8(%rbp)
movb   $0x0,-0x9(%rbp)
cmpb   $0x0,-0x9(%rbp)
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1127 <readSerial+0x27>
jmp    1136 <readSerial+0x36>
mov    -0x8(%rbp),%rax
mov    0x1(%rax),%al
mov    %al,-0x9(%rbp)
jmp    1111 <readSerial+0x11>
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    %al,-0xa(%rbp)
movsbl -0xa(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readSerial>:
cmpb   $0x0,0x20000001
je     1100 <readSerial>
mov    0x20000000,%al
ret

LLVM IR (-O0):
define signext i8 @readSerial() {
%1 = alloca i8*
%2 = alloca i8
%3 = alloca i8
store i8* inttoptr (i64 536870912 to i8*), i8** %1
store i8 0, i8* %2
br label %4
4: ; preds = %8, %0
%5 = load i8, i8* %2
%6 = icmp ne i8 %5, 0
%7 = xor i1 %6, true
br i1 %7, label %8, label %12
8: ; preds = %4
%9 = load i8*, i8** %1
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load volatile i8, i8* %10
store i8 %11, i8* %2
br label %4
12: ; preds = %4
%13 = load i8*, i8** %1
%14 = load volatile i8, i8* %13
store i8 %14, i8* %3
%15 = load i8, i8* %3
ret i8 %15
}

LLVM IR (-O2):
define signext i8 @readSerial() {
br label %1
1: ; preds = %0, %1
%2 = load volatile i8, i8* inttoptr (i64 536870913 to i8*)
%3 = icmp eq i8 %2, 0
br i1 %3, label %1, label %4
4: ; preds = %1
%5 = load volatile i8, i8* inttoptr (i64 536870912 to i8*)
ret i8 %5
}
/* Variables and functions */
int connectsock(char const *, char const *, char *);
int connectUDP(const char *host, const char *service) {
  return connectsock(host, service, "udp");
}


x86 assembly (clang, -O0):
<connectUDP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    0xed1(%rip),%rdx
call   1030 <connectsock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<connectUDP>:
lea    0xee9(%rip),%rdx
jmp    1030 <connectsock@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"udp\00"
define i32 @connectUDP(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @connectsock(i8* %5, i8* %6, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i32 %7
}

LLVM IR (-O2):
@.str = [4 x i8] c"udp\00"
define i32 @connectUDP(i8* %0, i8* %1) {
%3 = tail call i32 @connectsock(i8* %0, i8* %1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ add_local_bin_to_path();
int /*<<< orphan*/ set_path(char *);
void add_standard_unix_to_path(void) {
  add_local_bin_to_path();
  set_path("/bin:/usr/bin:/etc");
}


x86 assembly (clang, -O0):
<add_standard_unix_to_path>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <add_local_bin_to_path@plt>
lea    0xece(%rip),%rdi
call   1040 <set_path@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_standard_unix_to_path>:
push   %rax
xor    %eax,%eax
call   1030 <add_local_bin_to_path@plt>
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1040 <set_path@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"/bin:/usr/bin:/etc\00"
define void @add_standard_unix_to_path() {
%1 = call i32 (...) @add_local_bin_to_path()
%2 = call i32 @set_path(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"/bin:/usr/bin:/etc\00"
define void @add_standard_unix_to_path() {
%1 = tail call i32 (...) @add_local_bin_to_path()
%2 = tail call i32 @set_path(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ die(char *, char *);
void usage(char *name) {
  die("Usage %s [-h][-a][-l][-e][-c] library\n"
      "Display the contents of a z80asm library file\n"
      "\n"
      "-a\tShow all\n"
      "-l\tShow local symbols\n"
      "-e\tShow expression patches\n"
      "-c\tShow code dump\n"
      "-h\tDisplay this help\n",
      name);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <die@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <die@plt>

LLVM IR (-O0):
@.str = [186 x i8] c"Usage %s [-h][-a][-l][-e][-c] library\0ADisplay the contents of a z80asm library file\0A\0A-a\09Show all\0A-l\09Show local symbols\0A-e\09Show expression patches\0A-c\09Show code dump\0A-h\09Display this help\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @die(i8* getelementptr inbounds ([186 x i8], [186 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [186 x i8] c"Usage %s [-h][-a][-l][-e][-c] library\0ADisplay the contents of a z80asm library file\0A\0A-a\09Show all\0A-l\09Show local symbols\0A-e\09Show expression patches\0A-c\09Show code dump\0A-h\09Display this help\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 @die(i8* getelementptr inbounds ([186 x i8], [186 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ buffer;

/* Variables and functions */
int /*<<< orphan*/ test(char *, char *, int);
int main(void) {
  char buffer[1024];
  test(buffer, "hello world", sizeof(buffer));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x400,%rsp
lea    -0x400(%rbp),%rdi
lea    0xed7(%rip),%rsi
mov    $0x400,%edx
call   1030 <test@plt>
xor    %eax,%eax
add    $0x400,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x408,%rsp
lea    0xee2(%rip),%rsi
mov    %rsp,%rdi
mov    $0x400,%edx
call   1030 <test@plt>
xor    %eax,%eax
add    $0x408,%rsp
ret

LLVM IR (-O0):
@.str = [12 x i8] c"hello world\00"
define i32 @main() {
%1 = alloca [1024 x i8]
%2 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 0
%3 = call i32 @test(i8* %2, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 1024)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"hello world\00"
define i32 @main() {
%1 = alloca [1024 x i8]
%2 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 0
%3 = call i32 @test(i8* %2, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 1024)
ret i32 0
}
void sum_sse(float *restrict v, int n) {}


x86 assembly (clang, -O0):
<sum_sse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum_sse>:
ret

LLVM IR (-O0):
define void @sum_sse(float* noalias %0, i32 %1) {
%3 = alloca float*
%4 = alloca i32
store float* %0, float** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @sum_sse(float* noalias nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
double Q_random(int *);
float Q_crandom(int *seed) { return 2.0 * (Q_random(seed) - 0.5); }


x86 assembly (clang, -O0):
<Q_crandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <Q_random@plt>
movaps %xmm0,%xmm1
movsd  0xed8(%rip),%xmm0
subsd  %xmm0,%xmm1
movsd  0xec4(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Q_crandom>:
push   %rax
call   1030 <Q_random@plt>
addsd  0xee2(%rip),%xmm0
addsd  %xmm0,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @Q_crandom(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call double @Q_random(i32* %3)
%5 = fsub double %4, 5.000000e-01
%6 = fmul double 2.000000e+00, %5
%7 = fptrunc double %6 to float
ret float %7
}

LLVM IR (-O2):
define float @Q_crandom(i32* %0) {
%2 = tail call double @Q_random(i32* %0)
%3 = fadd double %2, -5.000000e-01
%4 = fmul double %3, 2.000000e+00
%5 = fptrunc double %4 to float
ret float %5
}
/* Variables and functions */
int strlen(char *);
long hash(char *word) {
  long result = 42;
  int i;
  for (i = 0; i < strlen(word); i++) {
    result += word[i] * (i + 1);
  }
  return result;
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x2a,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
cmp    %ecx,%eax
jge    1174 <hash+0x64>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
mov    -0x14(%rbp),%ecx
add    $0x1,%ecx
imul   %ecx,%eax
cltq
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112b <hash+0x1b>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
mov    $0x2a,%r15d
test   %eax,%eax
jle    1150 <hash+0x40>
xor    %ebx,%ebx
nopl   0x0(%rax)
movsbl (%r14,%rbx,1),%eax
add    $0x1,%rbx
imul   %ebx,%eax
cltq
add    %rax,%r15
mov    %r14,%rdi
call   1030 <strlen@plt>
cltq
cmp    %rax,%rbx
jl     1130 <hash+0x20>
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
store i64 42, i64* %3
store i32 0, i32* %4
br label %5
5: ; preds = %23, %1
%6 = load i32, i32* %4
%7 = load i8*, i8** %2
%8 = call i32 @strlen(i8* %7)
%9 = icmp slt i32 %6, %8
br i1 %9, label %10, label %26
10: ; preds = %5
%11 = load i8*, i8** %2
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 1
%19 = mul nsw i32 %16, %18
%20 = sext i32 %19 to i64
%21 = load i64, i64* %3
%22 = add nsw i64 %21, %20
store i64 %22, i64* %3
br label %23
23: ; preds = %10
%24 = load i32, i32* %4
%25 = add nsw i32 %24, 1
store i32 %25, i32* %4
br label %5
26: ; preds = %5
%27 = load i64, i64* %3
ret i64 %27
}

LLVM IR (-O2):
define i64 @hash(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %18
4: ; preds = %1, %4
%5 = phi i64 [ %10, %4 ], [ 0, %1 ]
%6 = phi i64 [ %14, %4 ], [ 42, %1 ]
%7 = getelementptr inbounds i8, i8* %0, i64 %5
%8 = load i8, i8* %7
%9 = sext i8 %8 to i64
%10 = add nuw nsw i64 %5, 1
%11 = mul i64 %10, %9
%12 = shl i64 %11, 32
%13 = ashr exact i64 %12, 32
%14 = add nsw i64 %6, %13
%15 = tail call i32 @strlen(i8* %0)
%16 = sext i32 %15 to i64
%17 = icmp slt i64 %10, %16
br i1 %17, label %4, label %18
18: ; preds = %4, %1
%19 = phi i64 [ 42, %1 ], [ %14, %4 ]
ret i64 %19
}
unsigned long get_phy_address(unsigned long laddr) {
  unsigned long offset = laddr & 0x1000;
  unsigned long paddr =
      (*((unsigned long *)(0x200000 + (laddr >> 12)))) & 0xFFFFF000;
  return (paddr + offset);
}


x86 assembly (clang, -O0):
<get_phy_address>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x1000,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
shr    $0xc,%rcx
add    $0x200000,%rcx
movabs $0xfffff000,%rax
and    (%rcx),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_phy_address>:
mov    %edi,%ecx
and    $0x1000,%ecx
shr    $0xc,%rdi
mov    0x200000(%rdi),%rax
and    $0xfffff000,%eax
add    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @get_phy_address(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %2
%5 = load i64, i64* %2
%6 = and i64 %5, 4096
store i64 %6, i64* %3
%7 = load i64, i64* %2
%8 = lshr i64 %7, 12
%9 = add i64 2097152, %8
%10 = inttoptr i64 %9 to i64*
%11 = load i64, i64* %10
%12 = and i64 %11, 4294963200
store i64 %12, i64* %4
%13 = load i64, i64* %4
%14 = load i64, i64* %3
%15 = add i64 %13, %14
ret i64 %15
}

LLVM IR (-O2):
define i64 @get_phy_address(i64 %0) {
%2 = and i64 %0, 4096
%3 = lshr i64 %0, 12
%4 = add nuw nsw i64 %3, 2097152
%5 = inttoptr i64 %4 to i64*
%6 = load i64, i64* %5
%7 = and i64 %6, 4294963200
%8 = add nuw nsw i64 %7, %2
ret i64 %8
}
void g_date_get_year() {}


x86 assembly (clang, -O0):
<g_date_get_year>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_date_get_year>:
ret

LLVM IR (-O0):
define void @g_date_get_year() {
ret void
}

LLVM IR (-O2):
define void @g_date_get_year() {
ret void
}
unsigned pvr2_tex_mem_addr_32_to_64(unsigned offs) {
  unsigned offs32 = offs & 0x007ffffc;
  unsigned offs64;
  if (offs32 >= ((0x057fffff - 0x05000000 + 1) / 2))
    offs64 = (offs32 - ((0x057fffff - 0x05000000 + 1) / 2)) * 2 + 4;
  else
    offs64 = offs32 * 2;
  return offs64 | (offs & 3);
}


x86 assembly (clang, -O0):
<pvr2_tex_mem_addr_32_to_64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x7ffffc,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x400000,-0x8(%rbp)
jb     1135 <pvr2_tex_mem_addr_32_to_64+0x35>
mov    -0x8(%rbp),%eax
sub    $0x400000,%eax
shl    $0x1,%eax
add    $0x4,%eax
mov    %eax,-0xc(%rbp)
jmp    113e <pvr2_tex_mem_addr_32_to_64+0x3e>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x4(%rbp),%ecx
and    $0x3,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pvr2_tex_mem_addr_32_to_64>:
mov    %edi,%eax
and    $0x7ffffc,%eax
lea    (%rax,%rax,1),%ecx
cmp    $0x400000,%eax
lea    -0x7ffffc(%rax,%rax,1),%eax
cmovb  %ecx,%eax
and    $0x3,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @pvr2_tex_mem_addr_32_to_64(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = and i32 %5, 8388604
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp uge i32 %7, 4194304
br i1 %8, label %9, label %14
9: ; preds = %1
%10 = load i32, i32* %3
%11 = sub i32 %10, 4194304
%12 = mul i32 %11, 2
%13 = add i32 %12, 4
store i32 %13, i32* %4
br label %17
14: ; preds = %1
%15 = load i32, i32* %3
%16 = mul i32 %15, 2
store i32 %16, i32* %4
br label %17
17: ; preds = %14, %9
%18 = load i32, i32* %4
%19 = load i32, i32* %2
%20 = and i32 %19, 3
%21 = or i32 %18, %20
ret i32 %21
}

LLVM IR (-O2):
define i32 @pvr2_tex_mem_addr_32_to_64(i32 %0) {
%2 = and i32 %0, 8388604
%3 = icmp ugt i32 %2, 4194303
%4 = shl nuw nsw i32 %2, 1
%5 = add nsw i32 %4, -8388604
%6 = select i1 %3, i32 %5, i32 %4
%7 = and i32 %0, 3
%8 = or i32 %6, %7
ret i32 %8
}
/* Type definitions */
struct timeval {
  double tv_usec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
double diff_us(struct timeval *endt, struct timeval *startt) {
  double res;
  res = (double)(endt->tv_sec - startt->tv_sec) * 1.0e6 +
        (endt->tv_usec - startt->tv_usec);
  return res;
}


x86 assembly (clang, -O0):
<diff_us>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
mov    -0x10(%rbp),%rcx
sub    0x8(%rcx),%rax
cvtsi2sd %rax,%xmm0
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x10(%rbp),%rax
subsd  (%rax),%xmm1
movsd  0xec7(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<diff_us>:
mov    0x8(%rdi),%rax
sub    0x8(%rsi),%rax
cvtsi2sd %rax,%xmm0
movsd  (%rdi),%xmm1
subsd  (%rsi),%xmm1
mulsd  0xee3(%rip),%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
%struct.timeval = type { double, i64 }
define double @diff_us(%struct.timeval* %0, %struct.timeval* %1) {
%3 = alloca %struct.timeval*
%4 = alloca %struct.timeval*
%5 = alloca double
store %struct.timeval* %0, %struct.timeval** %3
store %struct.timeval* %1, %struct.timeval** %4
%6 = load %struct.timeval*, %struct.timeval** %3
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %6, i32 0, i32 1
%8 = load i64, i64* %7
%9 = load %struct.timeval*, %struct.timeval** %4
%10 = getelementptr inbounds %struct.timeval, %struct.timeval* %9, i32 0, i32 1
%11 = load i64, i64* %10
%12 = sub nsw i64 %8, %11
%13 = sitofp i64 %12 to double
%14 = load %struct.timeval*, %struct.timeval** %3
%15 = getelementptr inbounds %struct.timeval, %struct.timeval* %14, i32 0, i32 0
%16 = load double, double* %15
%17 = load %struct.timeval*, %struct.timeval** %4
%18 = getelementptr inbounds %struct.timeval, %struct.timeval* %17, i32 0, i32 0
%19 = load double, double* %18
%20 = fsub double %16, %19
%21 = call double @llvm.fmuladd.f64(double %13, double 1.000000e+06, double %20)
store double %21, double* %5
%22 = load double, double* %5
ret double %22
}

LLVM IR (-O2):
%struct.timeval = type { double, i64 }
define double @diff_us(%struct.timeval* nocapture %0, %struct.timeval* nocapture %1) {
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
%4 = load i64, i64* %3
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%6 = load i64, i64* %5
%7 = sub nsw i64 %4, %6
%8 = sitofp i64 %7 to double
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
%10 = load double, double* %9
%11 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%12 = load double, double* %11
%13 = fsub double %10, %12
%14 = tail call double @llvm.fmuladd.f64(double %8, double 1.000000e+06, double %13)
ret double %14
}
void foo1a() {}


x86 assembly (clang, -O0):
<foo1a>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo1a>:
ret

LLVM IR (-O0):
define void @foo1a() {
ret void
}

LLVM IR (-O2):
define void @foo1a() {
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint16_t;
typedef int /*<<< orphan*/ p;

/* Variables and functions */
uint16_t libcperciva_le16dec(const void *pp) {
  const uint8_t *p = (uint8_t const *)pp;
  return (uint16_t)((uint16_t)(p[0]) + ((uint16_t)(p[1]) << 8));
}


x86 assembly (clang, -O0):
<libcperciva_le16dec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    -0x10(%rbp),%rcx
mov    0x8(%rcx),%rcx
shl    $0x8,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<libcperciva_le16dec>:
mov    0x8(%rdi),%eax
shl    $0x8,%eax
add    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @libcperciva_le16dec(i8* %0) {
%2 = alloca i8*
%3 = alloca i64*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i64*
store i64* %5, i64** %3
%6 = load i64*, i64** %3
%7 = getelementptr inbounds i64, i64* %6, i64 0
%8 = load i64, i64* %7
%9 = trunc i64 %8 to i32
%10 = load i64*, i64** %3
%11 = getelementptr inbounds i64, i64* %10, i64 1
%12 = load i64, i64* %11
%13 = trunc i64 %12 to i32
%14 = shl i32 %13, 8
%15 = add nsw i32 %9, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @libcperciva_le16dec(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
%5 = getelementptr inbounds i8, i8* %0, i64 8
%6 = bitcast i8* %5 to i64*
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
%9 = shl i32 %8, 8
%10 = add nsw i32 %9, %4
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isascii(int);
void t_isascii_0xa5() {
  Assert_real((isascii(165) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              830, ("isascii should be 0 for 0xa5"));
}


x86 assembly (clang, -O0):
<t_isascii_0xa5>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa5,%edi
call   1030 <isascii@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x33e,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0xa5>:
push   %rax
mov    $0xa5,%edi
call   1030 <isascii@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x33e,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xa5\00"
define void @t_isascii_0xa5() {
%1 = call i64 @isascii(i32 165)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 830, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xa5\00"
define void @t_isascii_0xa5() {
%1 = tail call i64 @isascii(i32 165)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 830, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
float bmi_metric(float m, float h) {
  float bmi;
  bmi = m / ((h / 100) * (h / 100));
  return bmi;
}


x86 assembly (clang, -O0):
<bmi_metric>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movss  0xee0(%rip),%xmm2
divss  %xmm2,%xmm1
movss  -0x8(%rbp),%xmm2
movss  0xecf(%rip),%xmm3
divss  %xmm3,%xmm2
mulss  %xmm2,%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<bmi_metric>:
divss  0xef8(%rip),%xmm1
mulss  %xmm1,%xmm1
divss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @bmi_metric(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %3
store float %1, float* %4
%6 = load float, float* %3
%7 = load float, float* %4
%8 = fdiv float %7, 1.000000e+02
%9 = load float, float* %4
%10 = fdiv float %9, 1.000000e+02
%11 = fmul float %8, %10
%12 = fdiv float %6, %11
store float %12, float* %5
%13 = load float, float* %5
ret float %13
}

LLVM IR (-O2):
define float @bmi_metric(float %0, float %1) {
%3 = fdiv float %1, 1.000000e+02
%4 = fmul float %3, %3
%5 = fdiv float %0, %4
ret float %5
}
int pipe(f)
int f[2];
{ return _pipe(f); }


x86 assembly (clang, -O0):
<pipe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <_pipe@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pipe>:
xor    %eax,%eax
jmp    1030 <_pipe@plt>

LLVM IR (-O0):
define i32 @pipe(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 (i32*, ...) bitcast (i32 (...)* @_pipe to i32 (i32*, ...)*)(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @pipe(i32* %0) {
%2 = tail call i32 (i32*, ...) bitcast (i32 (...)* @_pipe to i32 (i32*, ...)*)(i32* %0)
ret i32 %2
}
/* Type definitions */
struct volperm_args_info {
  int dummy;
};

/* Variables and functions */
int volperm_cmdline_parser2(int, char **, struct volperm_args_info *,
                            int /*<<< orphan*/, int, int);
int volperm_cmdline_parser(int argc, char **argv,
                           struct volperm_args_info *args_info) {
  return volperm_cmdline_parser2(argc, argv, args_info, 0, 1, 1);
}


x86 assembly (clang, -O0):
<volperm_cmdline_parser>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
mov    $0x1,%r9d
mov    %r9d,%r8d
call   1030 <volperm_cmdline_parser2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<volperm_cmdline_parser>:
xor    %ecx,%ecx
mov    $0x1,%r8d
mov    $0x1,%r9d
jmp    1030 <volperm_cmdline_parser2@plt>

LLVM IR (-O0):
%struct.volperm_args_info = type { i32 }
define i32 @volperm_cmdline_parser(i32 %0, i8** %1, %struct.volperm_args_info* %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca %struct.volperm_args_info*
store i32 %0, i32* %4
store i8** %1, i8*** %5
store %struct.volperm_args_info* %2, %struct.volperm_args_info** %6
%7 = load i32, i32* %4
%8 = load i8**, i8*** %5
%9 = load %struct.volperm_args_info*, %struct.volperm_args_info** %6
%10 = call i32 @volperm_cmdline_parser2(i32 %7, i8** %8, %struct.volperm_args_info* %9, i32 0, i32 1, i32 1)
ret i32 %10
}

LLVM IR (-O2):
%struct.volperm_args_info = type { i32 }
define i32 @volperm_cmdline_parser(i32 %0, i8** %1, %struct.volperm_args_info* %2) {
%4 = tail call i32 @volperm_cmdline_parser2(i32 %0, i8** %1, %struct.volperm_args_info* %2, i32 0, i32 1, i32 1)
ret i32 %4
}
void gdk_utf8_to_compound_text() {}


x86 assembly (clang, -O0):
<gdk_utf8_to_compound_text>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_utf8_to_compound_text>:
ret

LLVM IR (-O0):
define void @gdk_utf8_to_compound_text() {
ret void
}

LLVM IR (-O2):
define void @gdk_utf8_to_compound_text() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void error() { printf("ERROR!"); }


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<error>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"ERROR!\00"
define void @error() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"ERROR!\00"
define void @error() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
int mmc_init(void) {
  volatile unsigned int *flag =
      ((void *)((char *)(0x0404b200 << 2) + (0xf << 2)));
  if (!(*flag & 1)) {
  }
  *(volatile unsigned int *)((void *)((char *)(0x0404b200 << 2) + (0 << 2))) =
      0;
  return 0;
}


x86 assembly (clang, -O0):
<mmc_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1012c800,%eax
add    $0x3c,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0x1,%eax
cmp    $0x0,%eax
jne    1128 <mmc_init+0x28>
jmp    1128 <mmc_init+0x28>
mov    $0x1012c800,%eax
movl   $0x0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmc_init>:
mov    0x1012c83c,%eax
movl   $0x0,0x1012c800
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mmc_init() {
%1 = alloca i32*
store i32* bitcast (i8* getelementptr inbounds (i8, i8* inttoptr (i64 269666304 to i8*), i64 60) to i32*), i32** %1
%2 = load i32*, i32** %1
%3 = load volatile i32, i32* %2
%4 = and i32 %3, 1
%5 = icmp ne i32 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %0
br label %7
7: ; preds = %6, %0
store volatile i32 0, i32* inttoptr (i64 269666304 to i32*)
ret i32 0
}

LLVM IR (-O2):
define i32 @mmc_init() {
%1 = load volatile i32, i32* inttoptr (i64 269666364 to i32*)
store volatile i32 0, i32* inttoptr (i64 269666304 to i32*)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ latent(int);
void propagate_latent_1_latent(int a1) { latent(a1); }


x86 assembly (clang, -O0):
<propagate_latent_1_latent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <latent@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<propagate_latent_1_latent>:
jmp    1030 <latent@plt>

LLVM IR (-O0):
define void @propagate_latent_1_latent(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @latent(i32 %3)
ret void
}

LLVM IR (-O2):
define void @propagate_latent_1_latent(i32 %0) {
%2 = tail call i32 @latent(i32 %0)
ret void
}
/* Variables and functions */
double ceil(double);
double SDL_ceil(double x) { return ceil(x); }


x86 assembly (clang, -O0):
<SDL_ceil>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <ceil@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SDL_ceil>:
jmp    1030 <ceil@plt>

LLVM IR (-O0):
define double @SDL_ceil(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @llvm.ceil.f64(double %3)
ret double %4
}

LLVM IR (-O2):
define double @SDL_ceil(double %0) {
%2 = tail call double @llvm.ceil.f64(double %0)
ret double %2
}
void outb(char c, unsigned long i) {}


x86 assembly (clang, -O0):
<outb>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outb>:
ret

LLVM IR (-O0):
define void @outb(i8 signext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
store i8 %0, i8* %3
store i64 %1, i64* %4
ret void
}

LLVM IR (-O2):
define void @outb(i8 signext %0, i64 %1) {
ret void
}
/* Variables and functions */
int mrf24j40_read_short_ctrl_reg(int);
int /*<<< orphan*/ mrf24j40_write_short_ctrl_reg(int, int);
void mrf24j40_clear_coordinator(void) {
  mrf24j40_write_short_ctrl_reg(0x00,
                                mrf24j40_read_short_ctrl_reg(0x00) & ~(1 << 3));
}


x86 assembly (clang, -O0):
<mrf24j40_clear_coordinator>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <mrf24j40_read_short_ctrl_reg@plt>
mov    %eax,%esi
and    $0xfffffff7,%esi
xor    %edi,%edi
call   1040 <mrf24j40_write_short_ctrl_reg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mrf24j40_clear_coordinator>:
push   %rax
xor    %edi,%edi
call   1030 <mrf24j40_read_short_ctrl_reg@plt>
and    $0xfffffff7,%eax
xor    %edi,%edi
mov    %eax,%esi
pop    %rax
jmp    1040 <mrf24j40_write_short_ctrl_reg@plt>

LLVM IR (-O0):
define void @mrf24j40_clear_coordinator() {
%1 = call i32 @mrf24j40_read_short_ctrl_reg(i32 0)
%2 = and i32 %1, -9
%3 = call i32 @mrf24j40_write_short_ctrl_reg(i32 0, i32 %2)
ret void
}

LLVM IR (-O2):
define void @mrf24j40_clear_coordinator() {
%1 = tail call i32 @mrf24j40_read_short_ctrl_reg(i32 0)
%2 = and i32 %1, -9
%3 = tail call i32 @mrf24j40_write_short_ctrl_reg(i32 0, i32 %2)
ret void
}