#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
int getopt(int, char **, char *);
int /*<<< orphan*/ intel_get_pci_device();
int /*<<< orphan*/ intel_register_access_fini();
int /*<<< orphan*/ intel_register_access_init(int /*<<< orphan*/,
                                              int /*<<< orphan*/);
scalar_t__ iopl(int);
scalar_t__ optind;
int /*<<< orphan*/ sscanf(char *, char *, int /*<<< orphan*/ *);
int /*<<< orphan*/ usage(char const *);
int /*<<< orphan*/ write_reg(int /*<<< orphan*/, int /*<<< orphan*/, int);
int main(int argc, char *argv[]) {
  bool use_mmio = false;
  int ret = 0;
  uint32_t reg, val;
  int ch;
  const char *cmdname = argv[0];
  while ((ch = getopt(argc, argv, "m")) != -1) {
    switch (ch) {
    case 'm':
      use_mmio = true;
      break;
    default:
      break;
    }
  }
  argc -= optind;
  argv += optind;
  if (argc < 2) {
    usage(cmdname);
    return 1;
  }
  sscanf(argv[0], "0x%x", &reg);
  sscanf(argv[1], "0x%x", &val);
  if (use_mmio)
    intel_register_access_init(intel_get_pci_device(), 0);
  else
    assert(iopl(3) == 0);
  write_reg(reg, val, use_mmio);
  if (use_mmio)
    intel_register_access_fini();
  else
    iopl(0);
  return ret;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x30(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
lea    0xe33(%rip),%rdx
call   10a0 <getopt@plt>
mov    %eax,-0x24(%rbp)
cmp    $0xffffffff,%eax
je     1205 <main+0x75>
mov    -0x24(%rbp),%eax
sub    $0x6d,%eax
jne    11fb <main+0x6b>
jmp    11ef <main+0x5f>
movl   $0x1,-0x14(%rbp)
jmp    1200 <main+0x70>
jmp    1200 <main+0x70>
jmp    11bf <main+0x2f>
mov    0x2ddc(%rip),%rax
mov    (%rax),%rcx
movslq -0x8(%rbp),%rax
sub    %rcx,%rax
mov    %eax,-0x8(%rbp)
mov    0x2dc8(%rip),%rax
mov    (%rax),%rax
shl    $0x3,%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    124e <main+0xbe>
mov    -0x30(%rbp),%rdi
call   1080 <usage@plt>
movl   $0x1,-0x4(%rbp)
jmp    12e8 <main+0x158>
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
lea    0xda6(%rip),%rsi
lea    -0x1c(%rbp),%rdx
call   1070 <sscanf@plt>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
lea    0xd8e(%rip),%rsi
lea    -0x20(%rbp),%rdx
call   1070 <sscanf@plt>
cmpl   $0x0,-0x14(%rbp)
je     129c <main+0x10c>
mov    $0x0,%al
call   10b0 <intel_get_pci_device@plt>
mov    %eax,%edi
xor    %esi,%esi
call   1090 <intel_register_access_init@plt>
jmp    12b7 <main+0x127>
mov    $0x3,%edi
call   1040 <iopl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1060 <assert@plt>
mov    -0x1c(%rbp),%edi
mov    -0x20(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1030 <write_reg@plt>
cmpl   $0x0,-0x14(%rbp)
je     12db <main+0x14b>
mov    $0x0,%al
call   1050 <intel_register_access_fini@plt>
jmp    12e2 <main+0x152>
xor    %edi,%edi
call   1040 <iopl@plt>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    (%rsi),%r15
xor    %r14d,%r14d
mov    $0x1,%r13b
lea    0xe50(%rip),%r12
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %r12,%rdx
call   10a0 <getopt@plt>
cmp    $0x6d,%eax
je     11c9 <main+0x39>
cmp    $0xffffffff,%eax
jne    11b0 <main+0x20>
jmp    11d4 <main+0x44>
mov    $0x1,%r14d
xor    %r13d,%r13d
jmp    11b0 <main+0x20>
mov    0x2e0d(%rip),%rax
mov    (%rax),%r12
sub    %r12d,%ebp
cmp    $0x1,%ebp
jg     11f8 <main+0x68>
mov    %r15,%rdi
call   1080 <usage@plt>
mov    $0x1,%ebx
jmp    127f <main+0xef>
mov    (%rbx,%r12,8),%rdi
lea    0xdff(%rip),%rbp
lea    0x4(%rsp),%rdx
mov    %rbp,%rsi
call   1070 <sscanf@plt>
mov    0x8(%rbx,%r12,8),%rdi
mov    %rsp,%rdx
mov    %rbp,%rsi
call   1070 <sscanf@plt>
test   $0x1,%r13b
je     1257 <main+0xc7>
mov    $0x3,%edi
call   1040 <iopl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
call   1060 <assert@plt>
mov    0x4(%rsp),%edi
mov    (%rsp),%esi
xor    %ebx,%ebx
xor    %edx,%edx
call   1030 <write_reg@plt>
xor    %edi,%edi
call   1040 <iopl@plt>
jmp    127f <main+0xef>
xor    %ebx,%ebx
xor    %eax,%eax
call   10b0 <intel_get_pci_device@plt>
mov    %eax,%edi
xor    %esi,%esi
call   1090 <intel_register_access_init@plt>
mov    0x4(%rsp),%edi
mov    (%rsp),%esi
mov    %r14d,%edx
call   1030 <write_reg@plt>
xor    %eax,%eax
call   1050 <intel_register_access_fini@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@.str = [2 x i8] c"m\00"
@optind = global i64 0
@.str.1 = [5 x i8] c"0x%x\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
store i32 0, i32* %7
%12 = load i8**, i8*** %5
%13 = getelementptr inbounds i8*, i8** %12, i64 0
%14 = load i8*, i8** %13
store i8* %14, i8** %11
br label %15
15: ; preds = %24, %2
%16 = load i32, i32* %4
%17 = load i8**, i8*** %5
%18 = call i32 @getopt(i32 %16, i8** %17, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32 %18, i32* %10
%19 = icmp ne i32 %18, -1
br i1 %19, label %20, label %25
20: ; preds = %15
%21 = load i32, i32* %10
switch i32 %21, label %23 [
i32 109, label %22
]
22: ; preds = %20
store i32 1, i32* %6
br label %24
23: ; preds = %20
br label %24
24: ; preds = %23, %22
br label %15
25: ; preds = %15
%26 = load i64, i64* @optind
%27 = load i32, i32* %4
%28 = sext i32 %27 to i64
%29 = sub nsw i64 %28, %26
%30 = trunc i64 %29 to i32
store i32 %30, i32* %4
%31 = load i64, i64* @optind
%32 = load i8**, i8*** %5
%33 = getelementptr inbounds i8*, i8** %32, i64 %31
store i8** %33, i8*** %5
%34 = load i32, i32* %4
%35 = icmp slt i32 %34, 2
br i1 %35, label %36, label %39
36: ; preds = %25
%37 = load i8*, i8** %11
%38 = call i32 @usage(i8* %37)
store i32 1, i32* %3
br label %71
39: ; preds = %25
%40 = load i8**, i8*** %5
%41 = getelementptr inbounds i8*, i8** %40, i64 0
%42 = load i8*, i8** %41
%43 = call i32 @sscanf(i8* %42, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32* %8)
%44 = load i8**, i8*** %5
%45 = getelementptr inbounds i8*, i8** %44, i64 1
%46 = load i8*, i8** %45
%47 = call i32 @sscanf(i8* %46, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32* %9)
%48 = load i32, i32* %6
%49 = icmp ne i32 %48, 0
br i1 %49, label %50, label %53
50: ; preds = %39
%51 = call i32 (...) @intel_get_pci_device()
%52 = call i32 @intel_register_access_init(i32 %51, i32 0)
br label %58
53: ; preds = %39
%54 = call i64 @iopl(i32 3)
%55 = icmp eq i64 %54, 0
%56 = zext i1 %55 to i32
%57 = call i32 @assert(i32 %56)
br label %58
58: ; preds = %53, %50
%59 = load i32, i32* %8
%60 = load i32, i32* %9
%61 = load i32, i32* %6
%62 = call i32 @write_reg(i32 %59, i32 %60, i32 %61)
%63 = load i32, i32* %6
%64 = icmp ne i32 %63, 0
br i1 %64, label %65, label %67
65: ; preds = %58
%66 = call i32 (...) @intel_register_access_fini()
br label %69
67: ; preds = %58
%68 = call i64 @iopl(i32 0)
br label %69
69: ; preds = %67, %65
%70 = load i32, i32* %7
store i32 %70, i32* %3
br label %71
71: ; preds = %69, %36
%72 = load i32, i32* %3
ret i32 %72
}

LLVM IR (-O2):
@.str = [2 x i8] c"m\00"
@optind = global i64 0
@.str.1 = [5 x i8] c"0x%x\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %3 to i8*
%6 = bitcast i32* %4 to i8*
%7 = load i8*, i8** %1
br label %8
8: ; preds = %11, %2
%9 = phi i1 [ true, %2 ], [ false, %11 ]
%10 = phi i32 [ 0, %2 ], [ 1, %11 ]
br label %11
11: ; preds = %8, %11
%12 = tail call i32 @getopt(i32 %0, i8** %1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
switch i32 %12, label %11 [
i32 -1, label %13
i32 109, label %8
]
13: ; preds = %11
%14 = load i64, i64* @optind
%15 = trunc i64 %14 to i32
%16 = sub i32 %0, %15
%17 = getelementptr inbounds i8*, i8** %1, i64 %14
%18 = icmp slt i32 %16, 2
br i1 %18, label %19, label %21
19: ; preds = %13
%20 = tail call i32 @usage(i8* %7)
br label %43
21: ; preds = %13
%22 = load i8*, i8** %17
%23 = call i32 @sscanf(i8* %22, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32* %3)
%24 = getelementptr inbounds i8*, i8** %17, i64 1
%25 = load i8*, i8** %24
%26 = call i32 @sscanf(i8* %25, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32* %4)
br i1 %9, label %34, label %27
27: ; preds = %21
%28 = call i32 (...) @intel_get_pci_device()
%29 = call i32 @intel_register_access_init(i32 %28, i32 0)
%30 = load i32, i32* %3
%31 = load i32, i32* %4
%32 = call i32 @write_reg(i32 %30, i32 %31, i32 %10)
%33 = call i32 (...) @intel_register_access_fini()
br label %43
34: ; preds = %21
%35 = call i64 @iopl(i32 3)
%36 = icmp eq i64 %35, 0
%37 = zext i1 %36 to i32
%38 = call i32 @assert(i32 %37)
%39 = load i32, i32* %3
%40 = load i32, i32* %4
%41 = call i32 @write_reg(i32 %39, i32 %40, i32 0)
%42 = call i64 @iopl(i32 0)
br label %43
43: ; preds = %27, %34, %19
%44 = phi i32 [ 1, %19 ], [ 0, %34 ], [ 0, %27 ]
ret i32 %44
}