xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void speck_round(uint32_t *a, uint32_t *b, const uint32_t key) {
  *a = key ^ ((((*a) >> ((8) & 0x1F)) | ((*a) << (0x20 - ((8) & 0x1F)))) + *b);
  *b = *a ^ (((*b) << ((3) & 0x1F)) | ((*b) >> (0x20 - ((3) & 0x1F))));
}


x86 assembly (clang, -O0):
<speck_round>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
sar    $0x8,%eax
mov    -0x8(%rbp),%rdx
mov    (%rdx),%edx
shl    $0x18,%edx
or     %edx,%eax
mov    -0x10(%rbp),%rdx
add    (%rdx),%eax
xor    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
shl    $0x3,%eax
mov    -0x10(%rbp),%rdx
mov    (%rdx),%edx
sar    $0x1d,%edx
or     %edx,%eax
xor    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<speck_round>:
mov    (%rdi),%eax
mov    %eax,%ecx
sar    $0x8,%ecx
shl    $0x18,%eax
or     %ecx,%eax
add    (%rsi),%eax
xor    %edx,%eax
mov    %eax,(%rdi)
mov    (%rsi),%ecx
lea    0x0(,%rcx,8),%edx
sar    $0x1d,%ecx
or     %edx,%ecx
xor    %eax,%ecx
mov    %ecx,(%rsi)
ret

LLVM IR (-O0):
define void @speck_round(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = ashr i32 %9, 8
%11 = load i32*, i32** %4
%12 = load i32, i32* %11
%13 = shl i32 %12, 24
%14 = or i32 %10, %13
%15 = load i32*, i32** %5
%16 = load i32, i32* %15
%17 = add nsw i32 %14, %16
%18 = xor i32 %7, %17
%19 = load i32*, i32** %4
store i32 %18, i32* %19
%20 = load i32*, i32** %4
%21 = load i32, i32* %20
%22 = load i32*, i32** %5
%23 = load i32, i32* %22
%24 = shl i32 %23, 3
%25 = load i32*, i32** %5
%26 = load i32, i32* %25
%27 = ashr i32 %26, 29
%28 = or i32 %24, %27
%29 = xor i32 %21, %28
%30 = load i32*, i32** %5
store i32 %29, i32* %30
ret void
}

LLVM IR (-O2):
define void @speck_round(i32* nocapture %0, i32* nocapture %1, i32 %2) {
%4 = load i32, i32* %0
%5 = ashr i32 %4, 8
%6 = shl i32 %4, 24
%7 = or i32 %5, %6
%8 = load i32, i32* %1
%9 = add nsw i32 %7, %8
%10 = xor i32 %9, %2
store i32 %10, i32* %0
%11 = load i32, i32* %1
%12 = shl i32 %11, 3
%13 = ashr i32 %11, 29
%14 = or i32 %12, %13
%15 = xor i32 %14, %10
store i32 %15, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ native_irq_disable();
void arch_local_irq_disable(void) { native_irq_disable(); }


x86 assembly (clang, -O0):
<arch_local_irq_disable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <native_irq_disable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_local_irq_disable>:
xor    %eax,%eax
jmp    1030 <native_irq_disable@plt>

LLVM IR (-O0):
define void @arch_local_irq_disable() {
%1 = call i32 (...) @native_irq_disable()
ret void
}

LLVM IR (-O2):
define void @arch_local_irq_disable() {
%1 = tail call i32 (...) @native_irq_disable()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert_in_range_2(int, int);
int /*<<< orphan*/ assert_in_wide_range(int);
int /*<<< orphan*/ clang_analyzer_eval(int);
void greater_or_equal(int m, int n) {
  assert_in_range_2(m, n);
  if (m > n)
    return;
  assert_in_wide_range(m - n);
  clang_analyzer_eval(n >= m);
}


x86 assembly (clang, -O0):
<greater_or_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <assert_in_range_2@plt>
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    115a <greater_or_equal+0x2a>
jmp    1178 <greater_or_equal+0x48>
mov    -0x4(%rbp),%edi
sub    -0x8(%rbp),%edi
call   1040 <assert_in_wide_range@plt>
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <clang_analyzer_eval@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<greater_or_equal>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %edi,%ebx
call   1030 <assert_in_range_2@plt>
sub    %ebp,%ebx
jle    1147 <greater_or_equal+0x17>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %ebx,%edi
call   1040 <assert_in_wide_range@plt>
mov    $0x1,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <clang_analyzer_eval@plt>

LLVM IR (-O0):
define void @greater_or_equal(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @assert_in_range_2(i32 %5, i32 %6)
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = icmp sgt i32 %8, %9
br i1 %10, label %11, label %12
11: ; preds = %2
br label %22
12: ; preds = %2
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = sub nsw i32 %13, %14
%16 = call i32 @assert_in_wide_range(i32 %15)
%17 = load i32, i32* %4
%18 = load i32, i32* %3
%19 = icmp sge i32 %17, %18
%20 = zext i1 %19 to i32
%21 = call i32 @clang_analyzer_eval(i32 %20)
br label %22
22: ; preds = %12, %11
ret void
}

LLVM IR (-O2):
define void @greater_or_equal(i32 %0, i32 %1) {
%3 = tail call i32 @assert_in_range_2(i32 %0, i32 %1)
%4 = icmp sgt i32 %0, %1
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = sub nsw i32 %0, %1
%7 = tail call i32 @assert_in_wide_range(i32 %6)
%8 = tail call i32 @clang_analyzer_eval(i32 1)
br label %9
9: ; preds = %2, %5
ret void
}
int fun889() { return 889; }


x86 assembly (clang, -O0):
<fun889>:
push   %rbp
mov    %rsp,%rbp
mov    $0x379,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun889>:
mov    $0x379,%eax
ret

LLVM IR (-O0):
define i32 @fun889() {
ret i32 889
}

LLVM IR (-O2):
define i32 @fun889() {
ret i32 889
}
/* Variables and functions */
char *convStrDup(char *);
scalar_t__ setCharSetConversion(char *, char *);
char *pathConvCharset(char *to, char *from, char *str) {
  if (setCharSetConversion(to, from) == 0)
    return convStrDup(str);
  return NULL;
}


x86 assembly (clang, -O0):
<pathConvCharset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <setCharSetConversion@plt>
cmp    $0x0,%rax
jne    115d <pathConvCharset+0x3d>
mov    -0x20(%rbp),%rdi
call   1030 <convStrDup@plt>
mov    %rax,-0x8(%rbp)
jmp    1165 <pathConvCharset+0x45>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathConvCharset>:
push   %rbx
mov    %rdx,%rbx
call   1040 <setCharSetConversion@plt>
test   %rax,%rax
je     1132 <pathConvCharset+0x12>
xor    %eax,%eax
pop    %rbx
ret
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <convStrDup@plt>

LLVM IR (-O0):
define i8* @pathConvCharset(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = call i64 @setCharSetConversion(i8* %8, i8* %9)
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %3
%13 = load i8*, i8** %7
%14 = call i8* @convStrDup(i8* %13)
store i8* %14, i8** %4
br label %16
15: ; preds = %3
store i8* null, i8** %4
br label %16
16: ; preds = %15, %12
%17 = load i8*, i8** %4
ret i8* %17
}

LLVM IR (-O2):
define i8* @pathConvCharset(i8* %0, i8* %1, i8* %2) {
%4 = tail call i64 @setCharSetConversion(i8* %0, i8* %1)
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i8* @convStrDup(i8* %2)
br label %8
8: ; preds = %3, %6
%9 = phi i8* [ %7, %6 ], [ null, %3 ]
ret i8* %9
}
int energia() {}


x86 assembly (clang, -O0):
<energia>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<energia>:
ret

LLVM IR (-O0):
define i32 @energia() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @energia() {
ret i32 undef
}
int __atomic_dec(volatile int *ptr) { return __sync_fetch_and_sub(ptr, 1); }


x86 assembly (clang, -O0):
<__atomic_dec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0xffffffff,%eax
lock xadd %eax,(%rcx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__atomic_dec>:
mov    $0xffffffff,%eax
lock xadd %eax,(%rdi)
ret

LLVM IR (-O0):
define i32 @__atomic_dec(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = atomicrmw sub i32* %3, i32 1 seq_cst
ret i32 %4
}

LLVM IR (-O2):
define i32 @__atomic_dec(i32* nocapture %0) {
%2 = atomicrmw sub i32* %0, i32 1 seq_cst
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ fakultaet(int);
int main(int argc, char const *argv[]) {
  fakultaet(5);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x5,%edi
call   1030 <fakultaet@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
call   1030 <fakultaet@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @fakultaet(i32 5)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @fakultaet(i32 5)
ret i32 0
}
void AddRight(int *vector, int *length_vector, int value) {
  ;
  ;
  ;
  vector[*length_vector] = value;
  ;
  (*length_vector)++;
  ;
}


x86 assembly (clang, -O0):
<AddRight>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
movslq (%rcx),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<AddRight>:
movslq (%rsi),%rax
mov    %edx,(%rdi,%rax,4)
addl   $0x1,(%rsi)
ret

LLVM IR (-O0):
define void @AddRight(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32*, i32** %4
%9 = load i32*, i32** %5
%10 = load i32, i32* %9
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, i32* %8, i64 %11
store i32 %7, i32* %12
%13 = load i32*, i32** %5
%14 = load i32, i32* %13
%15 = add nsw i32 %14, 1
store i32 %15, i32* %13
ret void
}

LLVM IR (-O2):
define void @AddRight(i32* nocapture writeonly %0, i32* nocapture %1, i32 %2) {
%4 = load i32, i32* %1
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i32, i32* %0, i64 %5
store i32 %2, i32* %6
%7 = load i32, i32* %1
%8 = add nsw i32 %7, 1
store i32 %8, i32* %1
ret void
}
int test_imm_9Aint8_reg(signed char val) {
  return ((val) & (-0x9A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Aint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff66,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Aint8_reg>:
test   $0xffffff66,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Aint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -154
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_9Aint8_reg(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = and i32 %2, -154
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void PLineDestroy() {}


x86 assembly (clang, -O0):
<PLineDestroy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PLineDestroy>:
ret

LLVM IR (-O0):
define void @PLineDestroy() {
ret void
}

LLVM IR (-O2):
define void @PLineDestroy() {
ret void
}
/* Type definitions */
struct YsGLSL3DRenderer {
  int dummy;
};

/* Variables and functions */
struct YsGLSL3DRenderer *YsGLSLCreateVariColorPerPixShading3DRenderer();
struct YsGLSL3DRenderer *
YsGLSLCreateMonoColorPerPixShadingWithTexCoord3DRenderer(void) {
  return YsGLSLCreateVariColorPerPixShading3DRenderer();
}


x86 assembly (clang, -O0):
<YsGLSLCreateMonoColorPerPixShadingWithTexCoord3DRenderer>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <YsGLSLCreateVariColorPerPixShading3DRenderer@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<YsGLSLCreateMonoColorPerPixShadingWithTexCoord3DRenderer>:
xor    %eax,%eax
jmp    1030 <YsGLSLCreateVariColorPerPixShading3DRenderer@plt>

LLVM IR (-O0):
%struct.YsGLSL3DRenderer = type { i32 }
define %struct.YsGLSL3DRenderer* @YsGLSLCreateMonoColorPerPixShadingWithTexCoord3DRenderer() {
%1 = call %struct.YsGLSL3DRenderer* (...) @YsGLSLCreateVariColorPerPixShading3DRenderer()
ret %struct.YsGLSL3DRenderer* %1
}

LLVM IR (-O2):
%struct.YsGLSL3DRenderer = type { i32 }
define %struct.YsGLSL3DRenderer* @YsGLSLCreateMonoColorPerPixShadingWithTexCoord3DRenderer() {
%1 = tail call %struct.YsGLSL3DRenderer* (...) @YsGLSLCreateVariColorPerPixShading3DRenderer()
ret %struct.YsGLSL3DRenderer* %1
}
void gdk_gc_set_clip_origin() {}


x86 assembly (clang, -O0):
<gdk_gc_set_clip_origin>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_gc_set_clip_origin>:
ret

LLVM IR (-O0):
define void @gdk_gc_set_clip_origin() {
ret void
}

LLVM IR (-O2):
define void @gdk_gc_set_clip_origin() {
ret void
}
float finn_vec2_dot(float *lhs, float *rhs) {
  return (lhs[0] * rhs[0]) + (lhs[1] * rhs[1]);
}


x86 assembly (clang, -O0):
<finn_vec2_dot>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm1
mov    -0x10(%rbp),%rax
mulss  0x4(%rax),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<finn_vec2_dot>:
movss  0x4(%rdi),%xmm1
mulss  0x4(%rsi),%xmm1
movss  (%rdi),%xmm0
mulss  (%rsi),%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @finn_vec2_dot(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = getelementptr inbounds float, float* %5, i64 0
%7 = load float, float* %6
%8 = load float*, float** %4
%9 = getelementptr inbounds float, float* %8, i64 0
%10 = load float, float* %9
%11 = load float*, float** %3
%12 = getelementptr inbounds float, float* %11, i64 1
%13 = load float, float* %12
%14 = load float*, float** %4
%15 = getelementptr inbounds float, float* %14, i64 1
%16 = load float, float* %15
%17 = fmul float %13, %16
%18 = call float @llvm.fmuladd.f32(float %7, float %10, float %17)
ret float %18
}

LLVM IR (-O2):
define float @finn_vec2_dot(float* nocapture %0, float* nocapture %1) {
%3 = load float, float* %0
%4 = load float, float* %1
%5 = getelementptr inbounds float, float* %0, i64 1
%6 = load float, float* %5
%7 = getelementptr inbounds float, float* %1, i64 1
%8 = load float, float* %7
%9 = fmul float %6, %8
%10 = tail call float @llvm.fmuladd.f32(float %3, float %4, float %9)
ret float %10
}
/* Type definitions */
struct katcl_parse {
  int dummy;
};

/* Variables and functions */
int is_type_parse_katcl(struct katcl_parse *, char);
int is_inform_parse_katcl(struct katcl_parse *p) {
  return is_type_parse_katcl(p, '#');
}


x86 assembly (clang, -O0):
<is_inform_parse_katcl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x23,%esi
call   1030 <is_type_parse_katcl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_inform_parse_katcl>:
mov    $0x23,%esi
jmp    1030 <is_type_parse_katcl@plt>

LLVM IR (-O0):
%struct.katcl_parse = type { i32 }
define i32 @is_inform_parse_katcl(%struct.katcl_parse* %0) {
%2 = alloca %struct.katcl_parse*
store %struct.katcl_parse* %0, %struct.katcl_parse** %2
%3 = load %struct.katcl_parse*, %struct.katcl_parse** %2
%4 = call i32 @is_type_parse_katcl(%struct.katcl_parse* %3, i8 signext 35)
ret i32 %4
}

LLVM IR (-O2):
%struct.katcl_parse = type { i32 }
define i32 @is_inform_parse_katcl(%struct.katcl_parse* %0) {
%2 = tail call i32 @is_type_parse_katcl(%struct.katcl_parse* %0, i8 signext 35)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ line_24064(int, int, int, int);
void line(int x1, int y1, int x2, int y2) { line_24064(x1, y1, x2, y2); }


x86 assembly (clang, -O0):
<line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1030 <line_24064@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<line>:
jmp    1030 <line_24064@plt>

LLVM IR (-O0):
define void @line(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @line_24064(i32 %9, i32 %10, i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
define void @line(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @line_24064(i32 %0, i32 %1, i32 %2, i32 %3)
ret void
}
int hal_debugger_connected(void) { return 0; }


x86 assembly (clang, -O0):
<hal_debugger_connected>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hal_debugger_connected>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hal_debugger_connected() {
ret i32 0
}

LLVM IR (-O2):
define i32 @hal_debugger_connected() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __aeabi_memset(void *, unsigned long, int /*<<< orphan*/);
void __aeabi_memclr(void *m, unsigned long n) { __aeabi_memset(m, n, 0); }


x86 assembly (clang, -O0):
<__aeabi_memclr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <__aeabi_memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__aeabi_memclr>:
xor    %edx,%edx
jmp    1030 <__aeabi_memset@plt>

LLVM IR (-O0):
define void @__aeabi_memclr(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @__aeabi_memset(i8* %5, i64 %6, i32 0)
ret void
}

LLVM IR (-O2):
define void @__aeabi_memclr(i8* %0, i64 %1) {
%3 = tail call i32 @__aeabi_memset(i8* %0, i64 %1, i32 0)
ret void
}
void gtk_cell_layout_pack_start() {}


x86 assembly (clang, -O0):
<gtk_cell_layout_pack_start>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_cell_layout_pack_start>:
ret

LLVM IR (-O0):
define void @gtk_cell_layout_pack_start() {
ret void
}

LLVM IR (-O2):
define void @gtk_cell_layout_pack_start() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("x86_64");
  return 0;
  printf("generic");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"x86_64\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"x86_64\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
char encodeCell(int i) {
  switch (i) {
  case 1:
    return 'O';
  case 2:
    return '.';
  default:
    return '/';
  }
}


x86 assembly (clang, -O0):
<encodeCell>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x1,%eax
je     112c <encodeCell+0x2c>
jmp    111b <encodeCell+0x1b>
mov    -0xc(%rbp),%eax
sub    $0x2,%eax
je     1135 <encodeCell+0x35>
jmp    113e <encodeCell+0x3e>
movb   $0x4f,-0x1(%rbp)
jmp    1142 <encodeCell+0x42>
movb   $0x2e,-0x1(%rbp)
jmp    1142 <encodeCell+0x42>
movb   $0x2f,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<encodeCell>:
cmp    $0x2,%edi
sete   %al
xor    $0x2f,%al
cmp    $0x1,%edi
movzbl %al,%ecx
mov    $0x4f,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @encodeCell(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %7 [
i32 1, label %5
i32 2, label %6
]
5: ; preds = %1
store i8 79, i8* %2
br label %8
6: ; preds = %1
store i8 46, i8* %2
br label %8
7: ; preds = %1
store i8 47, i8* %2
br label %8
8: ; preds = %7, %6, %5
%9 = load i8, i8* %2
ret i8 %9
}

LLVM IR (-O2):
define signext i8 @encodeCell(i32 %0) {
%2 = icmp eq i32 %0, 2
%3 = select i1 %2, i8 46, i8 47
%4 = icmp eq i32 %0, 1
%5 = select i1 %4, i8 79, i8 %3
ret i8 %5
}
/* Variables and functions */
scalar_t__ in_first_type_qualifier();
scalar_t__ in_first_type_specifier();
int in_first_specifier_qualifier_list(void) {
  return (in_first_type_specifier() || in_first_type_qualifier());
}


x86 assembly (clang, -O0):
<in_first_specifier_qualifier_list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <in_first_type_specifier@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x1(%rbp)
jne    1152 <in_first_specifier_qualifier_list+0x32>
mov    $0x0,%al
call   1040 <in_first_type_qualifier@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<in_first_specifier_qualifier_list>:
push   %rax
xor    %eax,%eax
call   1030 <in_first_type_specifier@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <in_first_specifier_qualifier_list+0x17>
pop    %rcx
ret
xor    %eax,%eax
call   1040 <in_first_type_qualifier@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @in_first_specifier_qualifier_list() {
%1 = call i64 (...) @in_first_type_specifier()
%2 = icmp ne i64 %1, 0
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = call i64 (...) @in_first_type_qualifier()
%5 = icmp ne i64 %4, 0
br label %6
6: ; preds = %3, %0
%7 = phi i1 [ true, %0 ], [ %5, %3 ]
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @in_first_specifier_qualifier_list() {
%1 = tail call i64 (...) @in_first_type_specifier()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %7
3: ; preds = %0
%4 = tail call i64 (...) @in_first_type_qualifier()
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %0
%8 = phi i32 [ 1, %0 ], [ %6, %3 ]
ret i32 %8
}
/* Type definitions */
struct message_s {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ close_serving_thread(int);
int read_head(int, struct message_s *);
void read_head_C(int threadfd, struct message_s *msg) {
  if (read_head(threadfd, msg) == -1)
    close_serving_thread(threadfd);
}


x86 assembly (clang, -O0):
<read_head_C>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <read_head@plt>
cmp    $0xffffffff,%eax
jne    114c <read_head_C+0x2c>
mov    -0x4(%rbp),%edi
call   1030 <close_serving_thread@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_head_C>:
push   %rbx
mov    %edi,%ebx
call   1040 <read_head@plt>
cmp    $0xffffffff,%eax
je     112f <read_head_C+0xf>
pop    %rbx
ret
mov    %ebx,%edi
pop    %rbx
jmp    1030 <close_serving_thread@plt>

LLVM IR (-O0):
%struct.message_s = type { i32 }
define void @read_head_C(i32 %0, %struct.message_s* %1) {
%3 = alloca i32
%4 = alloca %struct.message_s*
store i32 %0, i32* %3
store %struct.message_s* %1, %struct.message_s** %4
%5 = load i32, i32* %3
%6 = load %struct.message_s*, %struct.message_s** %4
%7 = call i32 @read_head(i32 %5, %struct.message_s* %6)
%8 = icmp eq i32 %7, -1
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load i32, i32* %3
%11 = call i32 @close_serving_thread(i32 %10)
br label %12
12: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
%struct.message_s = type { i32 }
define void @read_head_C(i32 %0, %struct.message_s* %1) {
%3 = tail call i32 @read_head(i32 %0, %struct.message_s* %1)
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @close_serving_thread(i32 %0)
br label %7
7: ; preds = %5, %2
ret void
}
void *mutex_allocate(void) { return (void *)1; }


x86 assembly (clang, -O0):
<mutex_allocate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mutex_allocate>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i8* @mutex_allocate() {
ret i8* inttoptr (i64 1 to i8*)
}

LLVM IR (-O2):
define i8* @mutex_allocate() {
ret i8* inttoptr (i64 1 to i8*)
}
/* Type definitions */
struct timeval {
  int dummy;
};

/* Variables and functions */
int fptr_capi20_waitformessage(unsigned int, struct timeval *);
scalar_t__ loadlib();
unsigned capi20_waitformessage(unsigned ApplID, struct timeval *TimeOut) {
  if (loadlib() < 0)
    return 0x1009;
  return fptr_capi20_waitformessage(ApplID, TimeOut);
}


x86 assembly (clang, -O0):
<capi20_waitformessage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <loadlib@plt>
cmp    $0x0,%rax
jge    114c <capi20_waitformessage+0x2c>
movl   $0x1009,-0x4(%rbp)
jmp    115b <capi20_waitformessage+0x3b>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <fptr_capi20_waitformessage@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<capi20_waitformessage>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <loadlib@plt>
test   %rax,%rax
js     1144 <capi20_waitformessage+0x24>
mov    %ebp,%edi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <fptr_capi20_waitformessage@plt>
mov    $0x1009,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.timeval = type { i32 }
define i32 @capi20_waitformessage(i32 %0, %struct.timeval* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca %struct.timeval*
store i32 %0, i32* %4
store %struct.timeval* %1, %struct.timeval** %5
%6 = call i64 (...) @loadlib()
%7 = icmp slt i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 4105, i32* %3
br label %13
9: ; preds = %2
%10 = load i32, i32* %4
%11 = load %struct.timeval*, %struct.timeval** %5
%12 = call i32 @fptr_capi20_waitformessage(i32 %10, %struct.timeval* %11)
store i32 %12, i32* %3
br label %13
13: ; preds = %9, %8
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
define i32 @capi20_waitformessage(i32 %0, %struct.timeval* %1) {
%3 = tail call i64 (...) @loadlib()
%4 = icmp slt i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @fptr_capi20_waitformessage(i32 %0, %struct.timeval* %1)
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ %6, %5 ], [ 4105, %2 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ main();
void start() { main(); }


x86 assembly (clang, -O0):
<start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <main@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<start>:
xor    %eax,%eax
jmp    1030 <main@plt>

LLVM IR (-O0):
define void @start() {
%1 = call i32 (...) @main()
ret void
}

LLVM IR (-O2):
define void @start() {
%1 = tail call i32 (...) @main()
ret void
}
/* Variables and functions */
char *Malloc(size_t);
int /*<<< orphan*/ strcpy(char *, char const *);
size_t strlen(char const *);
char *copystr(const char *from) {
  size_t l = strlen(from);
  char *retval = Malloc((l + 1) * sizeof(char));
  strcpy(retval, from);
  return retval;
}


x86 assembly (clang, -O0):
<copystr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <strlen@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
add    $0x1,%rdi
shl    $0x0,%rdi
call   1030 <Malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <strcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copystr>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1050 <strlen@plt>
lea    0x1(%rax),%rdi
call   1030 <Malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1040 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @copystr(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i64 @strlen(i8* %5)
store i64 %6, i64* %3
%7 = load i64, i64* %3
%8 = add i64 %7, 1
%9 = mul i64 %8, 1
%10 = call i8* @Malloc(i64 %9)
store i8* %10, i8** %4
%11 = load i8*, i8** %4
%12 = load i8*, i8** %2
%13 = call i32 @strcpy(i8* %11, i8* %12)
%14 = load i8*, i8** %4
ret i8* %14
}

LLVM IR (-O2):
define i8* @copystr(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add i64 %2, 1
%4 = tail call i8* @Malloc(i64 %3)
%5 = tail call i32 @strcpy(i8* %4, i8* %0)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ EIO;
int /*<<< orphan*/ errno;
__attribute__((weak)) int open(const char *buf, int flags, int mode) {
  (void)buf;
  (void)flags;
  (void)mode;
  errno = EIO;
  return (-1);
}


x86 assembly (clang, -O0):
<open>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    0x2ecb(%rip),%rax
mov    (%rax),%ecx
mov    0x2eba(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<open>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@EIO = global i32 0
@errno = global i32 0
define weak i32 @open(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = load i32, i32* @EIO
store i32 %10, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@EIO = global i32 0
@errno = global i32 0
define weak i32 @open(i8* %0, i32 %1, i32 %2) {
%4 = load i32, i32* @EIO
store i32 %4, i32* @errno
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ filter_r2(double *, double *, double *, int);
void F2(double *x, double *y, double *t, int len) { filter_r2(x, y, t, len); }


x86 assembly (clang, -O0):
<F2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <filter_r2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<F2>:
jmp    1030 <filter_r2@plt>

LLVM IR (-O0):
define void @F2(double* %0, double* %1, double* %2, i32 %3) {
%5 = alloca double*
%6 = alloca double*
%7 = alloca double*
%8 = alloca i32
store double* %0, double** %5
store double* %1, double** %6
store double* %2, double** %7
store i32 %3, i32* %8
%9 = load double*, double** %5
%10 = load double*, double** %6
%11 = load double*, double** %7
%12 = load i32, i32* %8
%13 = call i32 @filter_r2(double* %9, double* %10, double* %11, i32 %12)
ret void
}

LLVM IR (-O2):
define void @F2(double* %0, double* %1, double* %2, i32 %3) {
%5 = tail call i32 @filter_r2(double* %0, double* %1, double* %2, i32 %3)
ret void
}
char *fun(int num) {
  char s[100];
  int i = 0;
  while (num) {
    s[i] = num % 10 + '0';
    num /= 10;
    i++;
  }
  s[i] = '\0';
}


x86 assembly (clang, -O0):
<fun>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
movl   $0x0,-0x74(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     114c <fun+0x4c>
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
add    $0x30,%edx
mov    %dl,%cl
movslq -0x74(%rbp),%rax
mov    %cl,-0x70(%rbp,%rax,1)
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
mov    -0x74(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x74(%rbp)
jmp    110e <fun+0xe>
movslq -0x74(%rbp),%rax
movb   $0x0,-0x70(%rbp,%rax,1)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun>:
ret

LLVM IR (-O0):
define i8* @fun(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca [100 x i8]
%5 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %5
br label %6
6: ; preds = %9, %1
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %21
9: ; preds = %6
%10 = load i32, i32* %3
%11 = srem i32 %10, 10
%12 = add nsw i32 %11, 48
%13 = trunc i32 %12 to i8
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds [100 x i8], [100 x i8]* %4, i64 0, i64 %15
store i8 %13, i8* %16
%17 = load i32, i32* %3
%18 = sdiv i32 %17, 10
store i32 %18, i32* %3
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %6
21: ; preds = %6
%22 = load i32, i32* %5
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds [100 x i8], [100 x i8]* %4, i64 0, i64 %23
store i8 0, i8* %24
%25 = load i8*, i8** %2
ret i8* %25
}

LLVM IR (-O2):
define noalias i8* @fun(i32 %0) {
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void default_case() { printf("default case\n"); }


x86 assembly (clang, -O0):
<default_case>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_case>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"default case\0A\00"
define void @default_case() {
%1 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [13 x i8] c"default case\00"
define void @default_case() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct request {
  int dummy;
};

/* Variables and functions */
int blk_rq_cur_bytes(struct request const *);
__attribute__((always_)) unsigned int
blk_rq_cur_sectors(const struct request *rq) {
  return blk_rq_cur_bytes(rq) >> 9;
}


x86 assembly (clang, -O0):
<blk_rq_cur_sectors>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <blk_rq_cur_bytes@plt>
sar    $0x9,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<blk_rq_cur_sectors>:
push   %rax
call   1030 <blk_rq_cur_bytes@plt>
sar    $0x9,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.request = type { i32 }
define i32 @blk_rq_cur_sectors(%struct.request* %0) {
%2 = alloca %struct.request*
store %struct.request* %0, %struct.request** %2
%3 = load %struct.request*, %struct.request** %2
%4 = call i32 @blk_rq_cur_bytes(%struct.request* %3)
%5 = ashr i32 %4, 9
ret i32 %5
}

LLVM IR (-O2):
%struct.request = type { i32 }
define i32 @blk_rq_cur_sectors(%struct.request* %0) {
%2 = tail call i32 @blk_rq_cur_bytes(%struct.request* %0)
%3 = ashr i32 %2, 9
ret i32 %3
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int IoSetDeviceInterfaceState(int SymbolicLinkName, int Enable) {
  {
    int tmp_ndt_9;
    tmp_ndt_9 = __VERIFIER_nondet_int();
    if (tmp_ndt_9 == 0) {
      goto switch_7_0;
    } else {
      goto switch_7_default;
      if (0) {
      switch_7_0:
        return (0);
      switch_7_default:;
        return (-1073741823);
      } else {
      }
    }
  }
}


x86 assembly (clang, -O0):
<IoSetDeviceInterfaceState>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    1137 <IoSetDeviceInterfaceState+0x27>
jmp    113c <IoSetDeviceInterfaceState+0x2c>
jmp    1148 <IoSetDeviceInterfaceState+0x38>
movl   $0x0,-0x4(%rbp)
jmp    114f <IoSetDeviceInterfaceState+0x3f>
movl   $0xc0000001,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IoSetDeviceInterfaceState>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
test   %eax,%eax
mov    $0xc0000001,%ecx
cmovne %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @IoSetDeviceInterfaceState(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %7, i32* %6
%8 = load i32, i32* %6
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
br label %14
11: ; preds = %2
br label %15
12: ; No predecessors!
br i1 false, label %13, label %16
13: ; preds = %12
br label %14
14: ; preds = %13, %10
store i32 0, i32* %3
br label %18
15: ; preds = %11
store i32 -1073741823, i32* %3
br label %18
16: ; preds = %12
br label %17
17: ; preds = %16
br label %18
18: ; preds = %14, %15, %17
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @IoSetDeviceInterfaceState(i32 %0, i32 %1) {
%3 = tail call i32 (...) @__VERIFIER_nondet_int()
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 0, i32 -1073741823
ret i32 %5
}
int is_prime(int number) {
  int i, digit;
  i = 2;
  digit = 1;
  if (number == 0 || number == 1 || number == 2) {
    return 0;
  }
  while (i < number) {
    if (number % i == 0) {
      digit = 0;
      break;
    }
    i++;
  }
  return digit;
}


x86 assembly (clang, -O0):
<is_prime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1133 <is_prime+0x33>
cmpl   $0x1,-0x8(%rbp)
je     1133 <is_prime+0x33>
cmpl   $0x2,-0x8(%rbp)
jne    113f <is_prime+0x3f>
movl   $0x0,-0x4(%rbp)
jmp    1180 <is_prime+0x80>
jmp    1144 <is_prime+0x44>
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    117a <is_prime+0x7a>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    116c <is_prime+0x6c>
movl   $0x0,-0x10(%rbp)
jmp    117a <is_prime+0x7a>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1144 <is_prime+0x44>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_prime>:
xor    %ecx,%ecx
cmp    $0x3,%edi
jae    110a <is_prime+0xa>
mov    %ecx,%eax
ret
jl     1130 <is_prime+0x30>
mov    $0x2,%esi
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1107 <is_prime+0x7>
add    $0x1,%esi
cmp    %esi,%edi
jne    1120 <is_prime+0x20>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 2, i32* %4
store i32 1, i32* %5
%6 = load i32, i32* %3
%7 = icmp eq i32 %6, 0
br i1 %7, label %14, label %8
8: ; preds = %1
%9 = load i32, i32* %3
%10 = icmp eq i32 %9, 1
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = load i32, i32* %3
%13 = icmp eq i32 %12, 2
br i1 %13, label %14, label %15
14: ; preds = %11, %8, %1
store i32 0, i32* %2
br label %31
15: ; preds = %11
br label %16
16: ; preds = %26, %15
%17 = load i32, i32* %4
%18 = load i32, i32* %3
%19 = icmp slt i32 %17, %18
br i1 %19, label %20, label %29
20: ; preds = %16
%21 = load i32, i32* %3
%22 = load i32, i32* %4
%23 = srem i32 %21, %22
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %26
25: ; preds = %20
store i32 0, i32* %5
br label %29
26: ; preds = %20
%27 = load i32, i32* %4
%28 = add nsw i32 %27, 1
store i32 %28, i32* %4
br label %16
29: ; preds = %25, %16
%30 = load i32, i32* %5
store i32 %30, i32* %2
br label %31
31: ; preds = %29, %14
%32 = load i32, i32* %2
ret i32 %32
}

LLVM IR (-O2):
define i32 @is_prime(i32 %0) {
%2 = icmp ult i32 %0, 3
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = icmp sgt i32 %0, 2
br i1 %4, label %7, label %12
5: ; preds = %7
%6 = icmp eq i32 %11, %0
br i1 %6, label %12, label %7
7: ; preds = %3, %5
%8 = phi i32 [ %11, %5 ], [ 2, %3 ]
%9 = srem i32 %0, %8
%10 = icmp eq i32 %9, 0
%11 = add nuw nsw i32 %8, 1
br i1 %10, label %12, label %5
12: ; preds = %7, %5, %3, %1
%13 = phi i32 [ 0, %1 ], [ 1, %3 ], [ 0, %7 ], [ 1, %5 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ efree(void *);
void phvolt_wrapper_free(void *pointer) { efree(pointer); }


x86 assembly (clang, -O0):
<phvolt_wrapper_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <efree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<phvolt_wrapper_free>:
jmp    1030 <efree@plt>

LLVM IR (-O0):
define void @phvolt_wrapper_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @efree(i8* %3)
ret void
}

LLVM IR (-O2):
define void @phvolt_wrapper_free(i8* %0) {
%2 = tail call i32 @efree(i8* %0)
ret void
}
char num_to_base(int num) {
  switch (num) {
  case 0:
    return 'C';
  case 1:
    return 'A';
  case 2:
    return 'T';
  case 3:
    return 'G';
  default:
    return 'N';
  }
}


x86 assembly (clang, -O0):
<num_to_base>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %rax,-0x10(%rbp)
sub    $0x3,%rax
ja     1150 <num_to_base+0x50>
mov    -0x10(%rbp),%rax
lea    0xedd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movb   $0x43,-0x1(%rbp)
jmp    1154 <num_to_base+0x54>
movb   $0x41,-0x1(%rbp)
jmp    1154 <num_to_base+0x54>
movb   $0x54,-0x1(%rbp)
jmp    1154 <num_to_base+0x54>
movb   $0x47,-0x1(%rbp)
jmp    1154 <num_to_base+0x54>
movb   $0x4e,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<num_to_base>:
lea    0x0(,%rdi,8),%ecx
mov    $0x47544143,%edx
shr    %cl,%edx
cmp    $0x4,%edi
mov    $0x4e,%eax
cmovb  %edx,%eax
ret

LLVM IR (-O0):
define signext i8 @num_to_base(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 0, label %5
i32 1, label %6
i32 2, label %7
i32 3, label %8
]
5: ; preds = %1
store i8 67, i8* %2
br label %10
6: ; preds = %1
store i8 65, i8* %2
br label %10
7: ; preds = %1
store i8 84, i8* %2
br label %10
8: ; preds = %1
store i8 71, i8* %2
br label %10
9: ; preds = %1
store i8 78, i8* %2
br label %10
10: ; preds = %9, %8, %7, %6, %5
%11 = load i8, i8* %2
ret i8 %11
}

LLVM IR (-O2):
define signext i8 @num_to_base(i32 %0) {
%2 = icmp ult i32 %0, 4
%3 = shl i32 %0, 3
%4 = lshr i32 1196704067, %3
%5 = trunc i32 %4 to i8
%6 = select i1 %2, i8 %5, i8 78
ret i8 %6
}
/* Type definitions */
typedef scalar_t__ uint64_t;

/* Variables and functions */
int cmp_uint64_t(const void *a, const void *b) {
  return *(uint64_t *)a < *(uint64_t *)b   ? -1
         : *(uint64_t *)a > *(uint64_t *)b ? 1
                                           : 0;
}


x86 assembly (clang, -O0):
<cmp_uint64_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%rax
jge    112d <cmp_uint64_t+0x2d>
mov    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
jmp    114b <cmp_uint64_t+0x4b>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %rsi,%rdx
cmovg  %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp_uint64_t>:
mov    (%rdi),%rax
xor    %ecx,%ecx
cmp    (%rsi),%rax
setg   %cl
mov    $0xffffffff,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @cmp_uint64_t(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i64*
%7 = load i64, i64* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i64*
%10 = load i64, i64* %9
%11 = icmp slt i64 %7, %10
br i1 %11, label %12, label %13
12: ; preds = %2
br label %23
13: ; preds = %2
%14 = load i8*, i8** %3
%15 = bitcast i8* %14 to i64*
%16 = load i64, i64* %15
%17 = load i8*, i8** %4
%18 = bitcast i8* %17 to i64*
%19 = load i64, i64* %18
%20 = icmp sgt i64 %16, %19
%21 = zext i1 %20 to i64
%22 = select i1 %20, i32 1, i32 0
br label %23
23: ; preds = %13, %12
%24 = phi i32 [ -1, %12 ], [ %22, %13 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @cmp_uint64_t(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = load i64, i64* %3
%5 = bitcast i8* %1 to i64*
%6 = load i64, i64* %5
%7 = icmp slt i64 %4, %6
%8 = icmp sgt i64 %4, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
int XSetPointerMapping() {}


x86 assembly (clang, -O0):
<XSetPointerMapping>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XSetPointerMapping>:
ret

LLVM IR (-O0):
define i32 @XSetPointerMapping() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @XSetPointerMapping() {
ret i32 undef
}
int findEmptyIndex(int *grid) {
  int length = 9 * 9;
  int i;
  for (i = 0; i < length; i++) {
    if (*(grid + i) == 0) {
      return i;
    }
  }
  return -1;
}


x86 assembly (clang, -O0):
<findEmptyIndex>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x51,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1152 <findEmptyIndex+0x52>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
cmpl   $0x0,(%rax,%rcx,4)
jne    113f <findEmptyIndex+0x3f>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1159 <findEmptyIndex+0x59>
jmp    1144 <findEmptyIndex+0x44>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1116 <findEmptyIndex+0x16>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<findEmptyIndex>:
mov    $0x2,%eax
cs nopw 0x0(%rax,%rax,1)
nop
cmpl   $0x0,-0x8(%rdi,%rax,4)
je     1134 <findEmptyIndex+0x34>
cmpl   $0x0,-0x4(%rdi,%rax,4)
je     1139 <findEmptyIndex+0x39>
cmpl   $0x0,(%rdi,%rax,4)
je     1138 <findEmptyIndex+0x38>
add    $0x3,%rax
cmp    $0x53,%rax
jne    1110 <findEmptyIndex+0x10>
mov    $0xffffffff,%eax
ret
add    $0xfffffffffffffffe,%rax
ret
add    $0xffffffffffffffff,%rax
ret

LLVM IR (-O0):
define i32 @findEmptyIndex(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 81, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %20, %1
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %23
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %19
17: ; preds = %10
%18 = load i32, i32* %5
store i32 %18, i32* %2
br label %24
19: ; preds = %10
br label %20
20: ; preds = %19
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
store i32 %22, i32* %5
br label %6
23: ; preds = %6
store i32 -1, i32* %2
br label %24
24: ; preds = %23, %17
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @findEmptyIndex(i32* nocapture %0) {
br label %2
2: ; preds = %17, %1
%3 = phi i64 [ 0, %1 ], [ %18, %17 ]
%4 = getelementptr inbounds i32, i32* %0, i64 %3
%5 = load i32, i32* %4
%6 = icmp eq i32 %5, 0
br i1 %6, label %20, label %7
7: ; preds = %2
%8 = add nuw nsw i64 %3, 1
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = icmp eq i32 %10, 0
br i1 %11, label %20, label %12
12: ; preds = %7
%13 = add nuw nsw i64 %3, 2
%14 = getelementptr inbounds i32, i32* %0, i64 %13
%15 = load i32, i32* %14
%16 = icmp eq i32 %15, 0
br i1 %16, label %20, label %17
17: ; preds = %12
%18 = add nuw nsw i64 %3, 3
%19 = icmp eq i64 %18, 81
br i1 %19, label %23, label %2
20: ; preds = %12, %7, %2
%21 = phi i64 [ %3, %2 ], [ %8, %7 ], [ %13, %12 ]
%22 = trunc i64 %21 to i32
br label %23
23: ; preds = %17, %20
%24 = phi i32 [ %22, %20 ], [ -1, %17 ]
ret i32 %24
}