xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ _dictPanic(char *);
void *zmalloc(size_t);
void *_dictAlloc(size_t size) {
  void *p = zmalloc(size);
  if (p == NULL)
    _dictPanic("Out of memory");
  return p;
}


x86 assembly (clang, -O0):
<_dictAlloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <zmalloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <_dictAlloc+0x30>
lea    0xeb5(%rip),%rdi
call   1040 <_dictPanic@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dictAlloc>:
push   %rbx
call   1030 <zmalloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <_dictAlloc+0x1a>
lea    0xecb(%rip),%rdi
call   1040 <_dictPanic@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Out of memory\00"
define i8* @_dictAlloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @zmalloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @_dictPanic(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [14 x i8] c"Out of memory\00"
define i8* @_dictAlloc(i64 %0) {
%2 = tail call i8* @zmalloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @_dictPanic(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Variables and functions */
unsigned int exynos_5410_gpio_read(unsigned int);
int /*<<< orphan*/ exynos_5410_gpio_write_mask(unsigned int, unsigned int,
                                               unsigned int);
void odroid_xu_gpio_toggle_27() {
  unsigned int bank_offset = 0x0C60;
  unsigned int bit_index = 1;
  unsigned int d = exynos_5410_gpio_read(bank_offset);
  d ^= (1U << bit_index);
  exynos_5410_gpio_write_mask(bank_offset, d, (1U << bit_index));
}


x86 assembly (clang, -O0):
<odroid_xu_gpio_toggle_27>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xc60,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <exynos_5410_gpio_read@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
call   1030 <exynos_5410_gpio_write_mask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<odroid_xu_gpio_toggle_27>:
push   %rax
mov    $0xc60,%edi
call   1040 <exynos_5410_gpio_read@plt>
xor    $0x2,%eax
mov    $0xc60,%edi
mov    %eax,%esi
mov    $0x2,%edx
pop    %rax
jmp    1030 <exynos_5410_gpio_write_mask@plt>

LLVM IR (-O0):
define void @odroid_xu_gpio_toggle_27() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 3168, i32* %1
store i32 1, i32* %2
%4 = load i32, i32* %1
%5 = call i32 @exynos_5410_gpio_read(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %2
%7 = shl i32 1, %6
%8 = load i32, i32* %3
%9 = xor i32 %8, %7
store i32 %9, i32* %3
%10 = load i32, i32* %1
%11 = load i32, i32* %3
%12 = load i32, i32* %2
%13 = shl i32 1, %12
%14 = call i32 @exynos_5410_gpio_write_mask(i32 %10, i32 %11, i32 %13)
ret void
}

LLVM IR (-O2):
define void @odroid_xu_gpio_toggle_27() {
%1 = tail call i32 @exynos_5410_gpio_read(i32 3168)
%2 = xor i32 %1, 2
%3 = tail call i32 @exynos_5410_gpio_write_mask(i32 3168, i32 %2, i32 2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ets_delay_us(int /*<<< orphan*/);
__attribute__((always_)) __attribute__((flatten)) void os_delay_us(uint32_t s) {
  ets_delay_us(s);
}


x86 assembly (clang, -O0):
<os_delay_us>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ets_delay_us@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_delay_us>:
jmp    1030 <ets_delay_us@plt>

LLVM IR (-O0):
define void @os_delay_us(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ets_delay_us(i32 %3)
ret void
}

LLVM IR (-O2):
define void @os_delay_us(i32 %0) {
%2 = tail call i32 @ets_delay_us(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *);
void sprint_jmp_DPTR(char *str) {
  sprintf(str, "JMP   @A+DPTR                   ");
}


x86 assembly (clang, -O0):
<sprint_jmp_DPTR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sprint_jmp_DPTR>:
movups 0xf09(%rip),%xmm0
movups %xmm0,0x10(%rdi)
movups 0xeee(%rip),%xmm0
movups %xmm0,(%rdi)
movb   $0x0,0x20(%rdi)
ret

LLVM IR (-O0):
@.str = [33 x i8] c"JMP @A+DPTR \00"
define void @sprint_jmp_DPTR(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @sprintf(i8* %3, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"JMP @A+DPTR \00"
define void @sprint_jmp_DPTR(i8* nocapture writeonly %0) {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 dereferenceable(33) %0, i8* align 1 dereferenceable(33) getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i64 33, i1 false)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ execv(char *, char **);
int /*<<< orphan*/ exit(int);
int fork();
int run(char **cmd) {
  int pid = fork();
  if (pid == 0) {
    execv(cmd[0], cmd);
    exit(1);
  }
  return pid;
}


x86 assembly (clang, -O0):
<run>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1050 <fork@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    116a <run+0x3a>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <execv@plt>
mov    $0x1,%edi
call   1030 <exit@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<run>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1050 <fork@plt>
test   %eax,%eax
je     1141 <run+0x11>
pop    %rbx
ret
mov    (%rbx),%rdi
mov    %rbx,%rsi
call   1040 <execv@plt>
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @run(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
%4 = call i32 (...) @fork()
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %1
%8 = load i8**, i8*** %2
%9 = getelementptr inbounds i8*, i8** %8, i64 0
%10 = load i8*, i8** %9
%11 = load i8**, i8*** %2
%12 = call i32 @execv(i8* %10, i8** %11)
%13 = call i32 @exit(i32 1)
unreachable
14: ; preds = %1
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @run(i8** %0) {
%2 = tail call i32 (...) @fork()
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = load i8*, i8** %0
%6 = tail call i32 @execv(i8* %5, i8** %0)
%7 = tail call i32 @exit(i32 1)
unreachable
8: ; preds = %1
ret i32 %2
}
/* Variables and functions */
long f(int);
long main() {
  long g;
  g = f(5);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x5,%edi
call   1030 <f@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x5,%edi
jmp    1030 <f@plt>

LLVM IR (-O0):
define i64 @main() {
%1 = alloca i64
%2 = alloca i64
%3 = call i64 @f(i32 5)
store i64 %3, i64* %2
%4 = load i64, i64* %1
ret i64 %4
}

LLVM IR (-O2):
define i64 @main() {
%1 = tail call i64 @f(i32 5)
ret i64 undef
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
int /*<<< orphan*/ puts(char *);
int main(void) {
  char *temp = "0";
  putchar(*temp);
  putchar(*(temp + 1));
  if (*temp)
    puts("temp[0] is true");
  if (*(temp + 1))
    puts("temp[1] is true");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <putchar@plt>
mov    -0x10(%rbp),%rax
movsbl 0x1(%rax),%edi
call   1030 <putchar@plt>
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     116c <main+0x4c>
lea    0xe9b(%rip),%rdi
call   1040 <puts@plt>
mov    -0x10(%rbp),%rax
cmpb   $0x0,0x1(%rax)
je     1186 <main+0x66>
lea    0xe91(%rip),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x30,%edi
call   1030 <putchar@plt>
xor    %edi,%edi
call   1030 <putchar@plt>
lea    0xec7(%rip),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"0\00"
@.str.1 = [16 x i8] c"temp[0] is true\00"
@.str.2 = [16 x i8] c"temp[1] is true\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = call i32 @putchar(i8 signext %4)
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = load i8, i8* %7
%9 = call i32 @putchar(i8 signext %8)
%10 = load i8*, i8** %2
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %0
%14 = call i32 @puts(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
br label %15
15: ; preds = %13, %0
%16 = load i8*, i8** %2
%17 = getelementptr inbounds i8, i8* %16, i64 1
%18 = load i8, i8* %17
%19 = icmp ne i8 %18, 0
br i1 %19, label %20, label %22
20: ; preds = %15
%21 = call i32 @puts(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i64 0, i64 0))
br label %22
22: ; preds = %20, %15
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [16 x i8] c"temp[0] is true\00"
define i32 @main() {
%1 = tail call i32 @putchar(i8 signext 48)
%2 = tail call i32 @putchar(i8 signext 0)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int rand_partition(int *, int, int);
void rand_quicksort(int *A, int p, int r) {
  int q;
  if (p < r) {
    q = rand_partition(A, p, r);
    rand_quicksort(A, p, q - 1);
    rand_quicksort(A, q + 1, r);
  }
}


x86 assembly (clang, -O0):
<rand_quicksort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <rand_quicksort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1040 <rand_partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1030 <rand_quicksort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1030 <rand_quicksort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_quicksort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <rand_quicksort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1040 <rand_partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1030 <rand_quicksort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <rand_quicksort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @rand_quicksort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @rand_partition(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @rand_quicksort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @rand_partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @rand_quicksort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ link_failure_tanhl();
scalar_t__ tanhl(long double);
void test_tanhl(long double ld) {
  if (tanhl(ld) != tanhl(ld))
    link_failure_tanhl();
}


x86 assembly (clang, -O0):
<test_tanhl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <tanhl@plt>
mov    %rax,-0x18(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <tanhl@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
je     1163 <test_tanhl+0x43>
mov    $0x0,%al
call   1040 <link_failure_tanhl@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_tanhl>:
push   %rbx
sub    $0x20,%rsp
fldt   0x30(%rsp)
fld    %st(0)
fstpt  0x14(%rsp)
fstpt  (%rsp)
call   1030 <tanhl@plt>
mov    %rax,%rbx
fldt   0x14(%rsp)
fstpt  (%rsp)
call   1030 <tanhl@plt>
cmp    %rax,%rbx
jne    1151 <test_tanhl+0x31>
add    $0x20,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
jmp    1040 <link_failure_tanhl@plt>

LLVM IR (-O0):
define void @test_tanhl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call i64 @tanhl(x86_fp80 %3)
%5 = load x86_fp80, x86_fp80* %2
%6 = call i64 @tanhl(x86_fp80 %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_tanhl()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_tanhl(x86_fp80 %0) {
%2 = tail call i64 @tanhl(x86_fp80 %0)
%3 = tail call i64 @tanhl(x86_fp80 %0)
%4 = icmp eq i64 %2, %3
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @link_failure_tanhl()
br label %7
7: ; preds = %5, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int main() {
  char *c, *d;
  c = "a";
  d = "b";
  ;
  if (c[0] != 'p' || d[0] != 'q')
    abort();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    0xec1(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x70,%eax
jne    1165 <main+0x45>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x71,%eax
je     116c <main+0x4c>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"a\00"
@.str.1 = [2 x i8] c"b\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8** %2
store i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i8** %3
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 112
br i1 %8, label %15, label %9
9: ; preds = %0
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 0
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp ne i32 %13, 113
br i1 %14, label %15, label %17
15: ; preds = %9, %0
%16 = call i32 (...) @abort()
unreachable
17: ; preds = %9
%18 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char **argv) {
  if (0) {
    printf("condition evaluated as true\n");
  } else {
    printf("condition evaluated as false\n");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [30 x i8] c"condition evaluated as false\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [29 x i8] c"condition evaluated as false\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ put32(unsigned int);
int /*<<< orphan*/ put8(int);
void mov_reg32_preg64preg64pimm32(int reg1, int reg2, int reg3,
                                  unsigned int imm32) {
  put8(0x8B);
  put8((reg1 << 3) | 0x84);
  put8(reg2 | (reg3 << 3));
  put32(imm32);
}


x86 assembly (clang, -O0):
<mov_reg32_preg64preg64pimm32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    $0x8b,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     $0x84,%edi
call   1030 <put8@plt>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%eax
shl    $0x3,%eax
or     %eax,%edi
call   1030 <put8@plt>
mov    -0x10(%rbp),%edi
call   1040 <put32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mov_reg32_preg64preg64pimm32>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%r14d
mov    %edx,%ebp
mov    %esi,%r15d
mov    %edi,%ebx
mov    $0x8b,%edi
call   1030 <put8@plt>
shl    $0x3,%ebx
or     $0x84,%ebx
mov    %ebx,%edi
call   1030 <put8@plt>
shl    $0x3,%ebp
or     %r15d,%ebp
mov    %ebp,%edi
call   1030 <put8@plt>
mov    %r14d,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1040 <put32@plt>

LLVM IR (-O0):
define void @mov_reg32_preg64preg64pimm32(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = call i32 @put8(i32 139)
%10 = load i32, i32* %5
%11 = shl i32 %10, 3
%12 = or i32 %11, 132
%13 = call i32 @put8(i32 %12)
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = shl i32 %15, 3
%17 = or i32 %14, %16
%18 = call i32 @put8(i32 %17)
%19 = load i32, i32* %8
%20 = call i32 @put32(i32 %19)
ret void
}

LLVM IR (-O2):
define void @mov_reg32_preg64preg64pimm32(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @put8(i32 139)
%6 = shl i32 %0, 3
%7 = or i32 %6, 132
%8 = tail call i32 @put8(i32 %7)
%9 = shl i32 %2, 3
%10 = or i32 %9, %1
%11 = tail call i32 @put8(i32 %10)
%12 = tail call i32 @put32(i32 %3)
ret void
}
void gtk_accel_map_load_scanner() {}


x86 assembly (clang, -O0):
<gtk_accel_map_load_scanner>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_accel_map_load_scanner>:
ret

LLVM IR (-O0):
define void @gtk_accel_map_load_scanner() {
ret void
}

LLVM IR (-O2):
define void @gtk_accel_map_load_scanner() {
ret void
}
int Parrot_str_indexed(int i, char *string, int index) { return string[index]; }


x86 assembly (clang, -O0):
<Parrot_str_indexed>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Parrot_str_indexed>:
movslq %edx,%rax
movsbl (%rsi,%rax,1),%eax
ret

LLVM IR (-O0):
define i32 @Parrot_str_indexed(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %5
%8 = load i32, i32* %6
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @Parrot_str_indexed(i32 %0, i8* nocapture %1, i32 %2) {
%4 = sext i32 %2 to i64
%5 = getelementptr inbounds i8, i8* %1, i64 %4
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ EX_SOFTWARE;
int /*<<< orphan*/ pfpanic(char *, unsigned short, unsigned short, char const *,
                           char const *, int, int, int /*<<< orphan*/);
void __pfpanic_signal(unsigned short _syslog, unsigned short _verbose,
                      const char *_function_name, const char *_file_name,
                      int _line_number, int _errno) {
  pfpanic("Unable to send signal", _syslog, _verbose, _function_name,
          _file_name, _line_number, _errno, EX_SOFTWARE);
}


x86 assembly (clang, -O0):
<__pfpanic_signal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %si,%ax
mov    %di,%si
mov    %si,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9d,-0x20(%rbp)
mov    -0x2(%rbp),%si
mov    -0x4(%rbp),%dx
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
mov    -0x1c(%rbp),%r9d
mov    -0x20(%rbp),%r10d
mov    0x2e8b(%rip),%rax
mov    (%rax),%eax
lea    0xea2(%rip),%rdi
movzwl %si,%esi
movzwl %dx,%edx
mov    %r10d,(%rsp)
mov    %eax,0x8(%rsp)
call   1030 <pfpanic@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__pfpanic_signal>:
push   %rax
mov    %r9d,%r10d
mov    %r8d,%r9d
mov    %rcx,%r8
mov    %rdx,%rcx
mov    %esi,%edx
mov    %edi,%esi
mov    0x2eb8(%rip),%rdi
mov    (%rdi),%eax
lea    0xecf(%rip),%rdi
push   %rax
push   %r10
call   1030 <pfpanic@plt>
add    $0x10,%rsp
pop    %rax
ret

LLVM IR (-O0):
@.str = [22 x i8] c"Unable to send signal\00"
@EX_SOFTWARE = global i32 0
define void @__pfpanic_signal(i16 zeroext %0, i16 zeroext %1, i8* %2, i8* %3, i32 %4, i32 %5) {
%7 = alloca i16
%8 = alloca i16
%9 = alloca i8*
%10 = alloca i8*
%11 = alloca i32
%12 = alloca i32
store i16 %0, i16* %7
store i16 %1, i16* %8
store i8* %2, i8** %9
store i8* %3, i8** %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = load i16, i16* %7
%14 = load i16, i16* %8
%15 = load i8*, i8** %9
%16 = load i8*, i8** %10
%17 = load i32, i32* %11
%18 = load i32, i32* %12
%19 = load i32, i32* @EX_SOFTWARE
%20 = call i32 @pfpanic(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i16 zeroext %13, i16 zeroext %14, i8* %15, i8* %16, i32 %17, i32 %18, i32 %19)
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"Unable to send signal\00"
@EX_SOFTWARE = global i32 0
define void @__pfpanic_signal(i16 zeroext %0, i16 zeroext %1, i8* %2, i8* %3, i32 %4, i32 %5) {
%7 = load i32, i32* @EX_SOFTWARE
%8 = tail call i32 @pfpanic(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i16 zeroext %0, i16 zeroext %1, i8* %2, i8* %3, i32 %4, i32 %5, i32 %7)
ret void
}
const char *get_usage(void) {
  return "spc_playlet_dec usage:\n"
         "\t--cpu_mem    | -c <cpu memory configuration filepath>\n"
         "\t--rom        | -r <original rom filepath>\n"
         "\t--xml        | -x <input xml playlet filepath>\n"
         "\t--version    | -v <version>\n"
         "\t--help       | -h <help>\n";
}


x86 assembly (clang, -O0):
<get_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_usage>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [225 x i8] c"spc_playlet_dec usage:\0A\09--cpu_mem | -c <cpu memory configuration filepath>\0A\09--rom | -r <original rom filepath>\0A\09--xml | -x <input xml playlet filepath>\0A\09--version | -v <version>\0A\09--help | -h <help>\0A\00"
define i8* @get_usage() {
ret i8* getelementptr inbounds ([225 x i8], [225 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [225 x i8] c"spc_playlet_dec usage:\0A\09--cpu_mem | -c <cpu memory configuration filepath>\0A\09--rom | -r <original rom filepath>\0A\09--xml | -x <input xml playlet filepath>\0A\09--version | -v <version>\0A\09--help | -h <help>\0A\00"
define i8* @get_usage() {
ret i8* getelementptr inbounds ([225 x i8], [225 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t getHoTTTelemetryProviderBaudRate(void) { return 19200; }


x86 assembly (clang, -O0):
<getHoTTTelemetryProviderBaudRate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4b00,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getHoTTTelemetryProviderBaudRate>:
mov    $0x4b00,%eax
ret

LLVM IR (-O0):
define i32 @getHoTTTelemetryProviderBaudRate() {
ret i32 19200
}

LLVM IR (-O2):
define i32 @getHoTTTelemetryProviderBaudRate() {
ret i32 19200
}
void RTAvlroGCPtrDestroy(void) {}


x86 assembly (clang, -O0):
<RTAvlroGCPtrDestroy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvlroGCPtrDestroy>:
ret

LLVM IR (-O0):
define void @RTAvlroGCPtrDestroy() {
ret void
}

LLVM IR (-O2):
define void @RTAvlroGCPtrDestroy() {
ret void
}
float decode_uchar_as_float(unsigned char x) {
  signed char s = (signed char)x;
  return s / 64.0;
}


x86 assembly (clang, -O0):
<decode_uchar_as_float>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
cvtsi2sd %eax,%xmm0
movsd  0xee0(%rip),%xmm1
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode_uchar_as_float>:
movsbl %dil,%eax
cvtsi2sd %eax,%xmm0
mulsd  0xef0(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @decode_uchar_as_float(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %2
%4 = load i8, i8* %2
store i8 %4, i8* %3
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
%7 = sitofp i32 %6 to double
%8 = fdiv double %7, 6.400000e+01
%9 = fptrunc double %8 to float
ret float %9
}

LLVM IR (-O2):
define float @decode_uchar_as_float(i8 zeroext %0) {
%2 = sitofp i8 %0 to double
%3 = fmul double %2, 1.562500e-02
%4 = fptrunc double %3 to float
ret float %4
}
const char *str_expr_assign() { return "assignment"; }


x86 assembly (clang, -O0):
<str_expr_assign>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_expr_assign>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [11 x i8] c"assignment\00"
define i8* @str_expr_assign() {
ret i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [11 x i8] c"assignment\00"
define i8* @str_expr_assign() {
ret i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
float sqrtf(int /*<<< orphan*/);
int /*<<< orphan*/ stdlib_strided_snanvariancewd(int /*<<< orphan*/ const,
                                                 float const, float const *,
                                                 int /*<<< orphan*/ const);
float stdlib_strided_snanstdevwd(const int64_t N, const float correction,
                                 const float *X, const int64_t stride) {
  return sqrtf(stdlib_strided_snanvariancewd(N, correction, X, stride));
}


x86 assembly (clang, -O0):
<stdlib_strided_snanstdevwd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
movss  -0x8(%rbp),%xmm0
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <stdlib_strided_snanvariancewd@plt>
mov    %eax,%edi
call   1040 <sqrtf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stdlib_strided_snanstdevwd>:
push   %rax
call   1030 <stdlib_strided_snanvariancewd@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <sqrtf@plt>

LLVM IR (-O0):
define float @stdlib_strided_snanstdevwd(i32 %0, float %1, float* %2, i32 %3) {
%5 = alloca i32
%6 = alloca float
%7 = alloca float*
%8 = alloca i32
store i32 %0, i32* %5
store float %1, float* %6
store float* %2, float** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load float, float* %6
%11 = load float*, float** %7
%12 = load i32, i32* %8
%13 = call i32 @stdlib_strided_snanvariancewd(i32 %9, float %10, float* %11, i32 %12)
%14 = call float @sqrtf(i32 %13)
ret float %14
}

LLVM IR (-O2):
define float @stdlib_strided_snanstdevwd(i32 %0, float %1, float* %2, i32 %3) {
%5 = tail call i32 @stdlib_strided_snanvariancewd(i32 %0, float %1, float* %2, i32 %3)
%6 = tail call float @sqrtf(i32 %5)
ret float %6
}
int *getFlag(int *array, int x, int y, int z, int *n) {
  return array + z * n[2] * n[1] + y * n[2] + x;
}


x86 assembly (clang, -O0):
<getFlag>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x14(%rbp),%ecx
mov    -0x20(%rbp),%rdx
imul   0x8(%rdx),%ecx
mov    -0x20(%rbp),%rdx
imul   0x4(%rdx),%ecx
movslq %ecx,%rcx
shl    $0x2,%rcx
add    %rcx,%rax
mov    -0x10(%rbp),%ecx
mov    -0x20(%rbp),%rdx
imul   0x8(%rdx),%ecx
movslq %ecx,%rcx
shl    $0x2,%rcx
add    %rcx,%rax
movslq -0xc(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getFlag>:
mov    0x8(%r8),%eax
imul   %eax,%ecx
movslq 0x4(%r8),%r8
movslq %ecx,%rcx
imul   %r8,%rcx
lea    (%rdi,%rcx,4),%rcx
imul   %eax,%edx
movslq %edx,%rax
lea    (%rcx,%rax,4),%rax
movslq %esi,%rcx
lea    (%rax,%rcx,4),%rax
ret

LLVM IR (-O0):
define i32* @getFlag(i32* %0, i32 %1, i32 %2, i32 %3, i32* %4) {
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32*
store i32* %0, i32** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32* %4, i32** %10
%11 = load i32*, i32** %6
%12 = load i32, i32* %9
%13 = load i32*, i32** %10
%14 = getelementptr inbounds i32, i32* %13, i64 2
%15 = load i32, i32* %14
%16 = mul nsw i32 %12, %15
%17 = load i32*, i32** %10
%18 = getelementptr inbounds i32, i32* %17, i64 1
%19 = load i32, i32* %18
%20 = mul nsw i32 %16, %19
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i32, i32* %11, i64 %21
%23 = load i32, i32* %8
%24 = load i32*, i32** %10
%25 = getelementptr inbounds i32, i32* %24, i64 2
%26 = load i32, i32* %25
%27 = mul nsw i32 %23, %26
%28 = sext i32 %27 to i64
%29 = getelementptr inbounds i32, i32* %22, i64 %28
%30 = load i32, i32* %7
%31 = sext i32 %30 to i64
%32 = getelementptr inbounds i32, i32* %29, i64 %31
ret i32* %32
}

LLVM IR (-O2):
define i32* @getFlag(i32* readnone %0, i32 %1, i32 %2, i32 %3, i32* nocapture %4) {
%6 = getelementptr inbounds i32, i32* %4, i64 2
%7 = load i32, i32* %6
%8 = mul nsw i32 %7, %3
%9 = getelementptr inbounds i32, i32* %4, i64 1
%10 = load i32, i32* %9
%11 = mul nsw i32 %8, %10
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %0, i64 %12
%14 = mul nsw i32 %7, %2
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = sext i32 %1 to i64
%18 = getelementptr inbounds i32, i32* %16, i64 %17
ret i32* %18
}
double power(double n, int p) {
  double pow = 1;
  for (int i = 1; i <= p; i++)
    pow *= n;
  return pow;
}


x86 assembly (clang, -O0):
<power>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
movsd  0xeec(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
movl   $0x1,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     1149 <power+0x49>
movsd  -0x8(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1120 <power+0x20>
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<power>:
test   %edi,%edi
jle    111b <power+0x1b>
lea    -0x1(%rdi),%ecx
mov    %edi,%eax
and    $0x7,%eax
cmp    $0x7,%ecx
jae    1124 <power+0x24>
movsd  0xee7(%rip),%xmm1
jmp    1155 <power+0x55>
movsd  0xedd(%rip),%xmm0
ret
and    $0xfffffff8,%edi
movsd  0xed1(%rip),%xmm1
nop
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
add    $0xfffffff8,%edi
jne    1130 <power+0x30>
test   %eax,%eax
je     1169 <power+0x69>
nopl   0x0(%rax)
mulsd  %xmm0,%xmm1
add    $0xffffffff,%eax
jne    1160 <power+0x60>
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @power(double %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
%5 = alloca double
%6 = alloca i32
store double %0, double* %3
store i32 %1, i32* %4
store double 1.000000e+00, double* %5
store i32 1, i32* %6
br label %7
7: ; preds = %15, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp sle i32 %8, %9
br i1 %10, label %11, label %18
11: ; preds = %7
%12 = load double, double* %3
%13 = load double, double* %5
%14 = fmul double %13, %12
store double %14, double* %5
br label %15
15: ; preds = %11
%16 = load i32, i32* %6
%17 = add nsw i32 %16, 1
store i32 %17, i32* %6
br label %7
18: ; preds = %7
%19 = load double, double* %5
ret double %19
}

LLVM IR (-O2):
define double @power(double %0, i32 %1) {
%3 = icmp slt i32 %1, 1
br i1 %3, label %20, label %4
4: ; preds = %2
%5 = add i32 %1, -1
%6 = and i32 %1, 7
%7 = icmp ult i32 %5, 7
br i1 %7, label %10, label %8
8: ; preds = %4
%9 = and i32 %1, -8
br label %22
10: ; preds = %22, %4
%11 = phi double [ undef, %4 ], [ %32, %22 ]
%12 = phi double [ 1.000000e+00, %4 ], [ %32, %22 ]
%13 = icmp eq i32 %6, 0
br i1 %13, label %20, label %14
14: ; preds = %10, %14
%15 = phi double [ %17, %14 ], [ %12, %10 ]
%16 = phi i32 [ %18, %14 ], [ 0, %10 ]
%17 = fmul double %15, %0
%18 = add i32 %16, 1
%19 = icmp eq i32 %18, %6
br i1 %19, label %20, label %14
20: ; preds = %10, %14, %2
%21 = phi double [ 1.000000e+00, %2 ], [ %11, %10 ], [ %17, %14 ]
ret double %21
22: ; preds = %22, %8
%23 = phi double [ 1.000000e+00, %8 ], [ %32, %22 ]
%24 = phi i32 [ 0, %8 ], [ %33, %22 ]
%25 = fmul double %23, %0
%26 = fmul double %25, %0
%27 = fmul double %26, %0
%28 = fmul double %27, %0
%29 = fmul double %28, %0
%30 = fmul double %29, %0
%31 = fmul double %30, %0
%32 = fmul double %31, %0
%33 = add i32 %24, 8
%34 = icmp eq i32 %33, %9
br i1 %34, label %10, label %22
}
void *a(unsigned x) { return __builtin_return_address(0); }


x86 assembly (clang, -O0):
<a>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<a>:
mov    (%rsp),%rax
ret

LLVM IR (-O0):
define i8* @a(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i8* @llvm.returnaddress(i32 0)
ret i8* %3
}

LLVM IR (-O2):
define i8* @a(i32 %0) {
%2 = tail call i8* @llvm.returnaddress(i32 0)
ret i8* %2
}
/* Variables and functions */
scalar_t__ bproc_libadd(char *);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
void add_lib(char *libname) {
  if (bproc_libadd(libname)) {
    perror(libname);
    exit(1);
  }
}


x86 assembly (clang, -O0):
<add_lib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <bproc_libadd@plt>
cmp    $0x0,%rax
je     1162 <add_lib+0x32>
mov    -0x8(%rbp),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_lib>:
push   %rbx
mov    %rdi,%rbx
call   1030 <bproc_libadd@plt>
test   %rax,%rax
jne    1140 <add_lib+0x10>
pop    %rbx
ret
mov    %rbx,%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define void @add_lib(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @bproc_libadd(i8* %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i32 @perror(i8* %7)
%9 = call i32 @exit(i32 1)
unreachable
10: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @add_lib(i8* %0) {
%2 = tail call i64 @bproc_libadd(i8* %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @perror(i8* %0)
%6 = tail call i32 @exit(i32 1)
unreachable
7: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ emit(char *);
void getcondition_l_s_ns(void) {
  emit("push eax\n");
  emit("neg al\n");
  emit("xor al,ah\n");
  emit("pop eax\n");
}


x86 assembly (clang, -O0):
<getcondition_l_s_ns>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <emit@plt>
lea    0xee3(%rip),%rdi
call   1030 <emit@plt>
lea    0xedf(%rip),%rdi
call   1030 <emit@plt>
lea    0xede(%rip),%rdi
call   1030 <emit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getcondition_l_s_ns>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <emit@plt>
lea    0xee6(%rip),%rdi
call   1030 <emit@plt>
lea    0xee2(%rip),%rdi
call   1030 <emit@plt>
lea    0xee1(%rip),%rdi
pop    %rax
jmp    1030 <emit@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"push eax\0A\00"
@.str.1 = [8 x i8] c"neg al\0A\00"
@.str.2 = [11 x i8] c"xor al,ah\0A\00"
@.str.3 = [9 x i8] c"pop eax\0A\00"
define void @getcondition_l_s_ns() {
%1 = call i32 @emit(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @emit(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @emit(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @emit(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"push eax\0A\00"
@.str.1 = [8 x i8] c"neg al\0A\00"
@.str.2 = [11 x i8] c"xor al,ah\0A\00"
@.str.3 = [9 x i8] c"pop eax\0A\00"
define void @getcondition_l_s_ns() {
%1 = tail call i32 @emit(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @emit(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @emit(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @emit(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.3, i64 0, i64 0))
ret void
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ malloc_error(size_t);
void *cmalloc(size_t n) {
  void *q = malloc(n);
  if (q == NULL)
    malloc_error(n);
  return q;
}


x86 assembly (clang, -O0):
<cmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114d <cmalloc+0x2d>
mov    -0x8(%rbp),%rdi
call   1040 <malloc_error@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmalloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113c <cmalloc+0x1c>
mov    %r14,%rdi
call   1040 <malloc_error@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @cmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i64, i64* %2
%10 = call i32 @malloc_error(i64 %9)
br label %11
11: ; preds = %8, %1
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define noalias i8* @cmalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @malloc_error(i64 %0)
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_message_option() {
  printf("========== Options ===========\n"
         "|    l.query qemu status     |\n"
         "|    s.launch qemu           |\n"
         "|    k.kill qemu             |\n"
         "|    c.get vm cpu affinity   |\n"
         "|    h.print options         |\n"
         "|    q.quit                  |\n"
         "========== Options ===========\n\n\n");
}


x86 assembly (clang, -O0):
<print_message_option>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_message_option>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [251 x i8] c"========== Options ===========\0A| l.query qemu status |\0A| s.launch qemu |\0A| k.kill qemu |\0A| c.get vm cpu affinity |\0A| h.print options |\0A| q.quit |\0A========== Options ===========\0A\0A\0A\00"
define void @print_message_option() {
%1 = call i32 @printf(i8* getelementptr inbounds ([251 x i8], [251 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [250 x i8] c"========== Options ===========\0A| l.query qemu status |\0A| s.launch qemu |\0A| k.kill qemu |\0A| c.get vm cpu affinity |\0A| h.print options |\0A| q.quit |\0A========== Options ===========\0A\0A\00"
define void @print_message_option() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([250 x i8], [250 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ draw_polygon(int, int, int, int);
void colorcube() {
  draw_polygon(0, 3, 2, 1);
  draw_polygon(0, 4, 7, 3);
  draw_polygon(1, 2, 6, 5);
  draw_polygon(3, 7, 6, 2);
  draw_polygon(4, 5, 6, 7);
  draw_polygon(0, 1, 5, 4);
}


x86 assembly (clang, -O0):
<colorcube>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0x3,%esi
mov    $0x2,%edx
mov    $0x1,%ecx
call   1030 <draw_polygon@plt>
xor    %edi,%edi
mov    $0x4,%esi
mov    $0x7,%edx
mov    $0x3,%ecx
call   1030 <draw_polygon@plt>
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x6,%edx
mov    $0x5,%ecx
call   1030 <draw_polygon@plt>
mov    $0x3,%edi
mov    $0x7,%esi
mov    $0x6,%edx
mov    $0x2,%ecx
call   1030 <draw_polygon@plt>
mov    $0x4,%edi
mov    $0x5,%esi
mov    $0x6,%edx
mov    $0x7,%ecx
call   1030 <draw_polygon@plt>
xor    %edi,%edi
mov    $0x1,%esi
mov    $0x5,%edx
mov    $0x4,%ecx
call   1030 <draw_polygon@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<colorcube>:
push   %rax
xor    %edi,%edi
mov    $0x3,%esi
mov    $0x2,%edx
mov    $0x1,%ecx
call   1030 <draw_polygon@plt>
xor    %edi,%edi
mov    $0x4,%esi
mov    $0x7,%edx
mov    $0x3,%ecx
call   1030 <draw_polygon@plt>
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x6,%edx
mov    $0x5,%ecx
call   1030 <draw_polygon@plt>
mov    $0x3,%edi
mov    $0x7,%esi
mov    $0x6,%edx
mov    $0x2,%ecx
call   1030 <draw_polygon@plt>
mov    $0x4,%edi
mov    $0x5,%esi
mov    $0x6,%edx
mov    $0x7,%ecx
call   1030 <draw_polygon@plt>
xor    %edi,%edi
mov    $0x1,%esi
mov    $0x5,%edx
mov    $0x4,%ecx
pop    %rax
jmp    1030 <draw_polygon@plt>

LLVM IR (-O0):
define void @colorcube() {
%1 = call i32 @draw_polygon(i32 0, i32 3, i32 2, i32 1)
%2 = call i32 @draw_polygon(i32 0, i32 4, i32 7, i32 3)
%3 = call i32 @draw_polygon(i32 1, i32 2, i32 6, i32 5)
%4 = call i32 @draw_polygon(i32 3, i32 7, i32 6, i32 2)
%5 = call i32 @draw_polygon(i32 4, i32 5, i32 6, i32 7)
%6 = call i32 @draw_polygon(i32 0, i32 1, i32 5, i32 4)
ret void
}

LLVM IR (-O2):
define void @colorcube() {
%1 = tail call i32 @draw_polygon(i32 0, i32 3, i32 2, i32 1)
%2 = tail call i32 @draw_polygon(i32 0, i32 4, i32 7, i32 3)
%3 = tail call i32 @draw_polygon(i32 1, i32 2, i32 6, i32 5)
%4 = tail call i32 @draw_polygon(i32 3, i32 7, i32 6, i32 2)
%5 = tail call i32 @draw_polygon(i32 4, i32 5, i32 6, i32 7)
%6 = tail call i32 @draw_polygon(i32 0, i32 1, i32 5, i32 4)
ret void
}
int series() {
  static int x = 0;
  x += 2;
  return x;
}


x86 assembly (clang, -O0):
<series>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f1a(%rip),%eax
add    $0x2,%eax
mov    %eax,0x2f11(%rip)
mov    0x2f0b(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<series>:
mov    0x2f1e(%rip),%eax
add    $0x2,%eax
mov    %eax,0x2f15(%rip)
ret

LLVM IR (-O0):
@series.x = internal global i32 0
define i32 @series() {
%1 = load i32, i32* @series.x
%2 = add nsw i32 %1, 2
store i32 %2, i32* @series.x
%3 = load i32, i32* @series.x
ret i32 %3
}

LLVM IR (-O2):
@series.x = internal unnamed_addr global i32 0
define i32 @series() {
%1 = load i32, i32* @series.x
%2 = add nsw i32 %1, 2
store i32 %2, i32* @series.x
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void help10(void) {
  printf("  d                 dump 256 bytes starting at PC\n");
  printf("  d  <addr>         dump 256 bytes starting at <addr>\n");
  printf("  d  <addr> <cnt>   dump <cnt> bytes starting at <addr>\n");
}


x86 assembly (clang, -O0):
<help10>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf0c(%rip),%rdi
call   1030 <printf@plt>
lea    0xf37(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<help10>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf0e(%rip),%rdi
call   1030 <puts@plt>
lea    0xf38(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [51 x i8] c" d dump 256 bytes starting at PC\0A\00"
@.str.1 = [55 x i8] c" d <addr> dump 256 bytes starting at <addr>\0A\00"
@.str.2 = [57 x i8] c" d <addr> <cnt> dump <cnt> bytes starting at <addr>\0A\00"
define void @help10() {
%1 = call i32 @printf(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [50 x i8] c" d dump 256 bytes starting at PC\00"
@str.3 = [54 x i8] c" d <addr> dump 256 bytes starting at <addr>\00"
@str.4 = [56 x i8] c" d <addr> <cnt> dump <cnt> bytes starting at <addr>\00"
define void @help10() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([50 x i8], [50 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([54 x i8], [54 x i8]* @str.3, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([56 x i8], [56 x i8]* @str.4, i64 0, i64 0))
ret void
}
void TimerCompare3Set(unsigned long ulBase, unsigned long ulCompare3) {

  ;
  ;
  (*((volatile unsigned long *)(ulBase + 0x0000003C))) = ulCompare3;
}


x86 assembly (clang, -O0):
<TimerCompare3Set>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x3c(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerCompare3Set>:
mov    %rsi,0x3c(%rdi)
ret

LLVM IR (-O0):
define void @TimerCompare3Set(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add i64 %6, 60
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @TimerCompare3Set(i64 %0, i64 %1) {
%3 = add i64 %0, 60
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}