#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint8_t;
typedef unsigned int uint16_t;

/* Variables and functions */
int hdlc_set_addr(uint8_t *buf, uint8_t addr_size, uint16_t upper,
                  uint16_t lower) {
  int ret = 0;
  switch (addr_size) {
  case 1:
    buf[0] = ((uint8_t)(upper << 1U)) | 0x01U;
    break;
  case 2:
    buf[0] = ((uint8_t)(upper << 1U)) & 0x7EU;
    buf[1] = ((uint8_t)(lower << 1U)) | 0x01U;
    break;
  case 4:
    buf[0] = ((uint8_t)(upper >> 7U)) & 0x7EU;
    buf[1] = ((uint8_t)(upper << 1U)) & 0x7EU;
    buf[2] = ((uint8_t)(lower >> 7U)) & 0x7EU;
    buf[3] = ((uint8_t)(lower << 1U)) | 0x01U;
    break;
  default:
    ret = -5;
  }
  return ret;
}


x86 assembly (clang, -O0):
<hdlc_set_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
sub    $0x1,%eax
je     114e <hdlc_set_addr+0x4e>
jmp    112c <hdlc_set_addr+0x2c>
mov    -0x1c(%rbp),%eax
sub    $0x2,%eax
je     1162 <hdlc_set_addr+0x62>
jmp    113d <hdlc_set_addr+0x3d>
mov    -0x1c(%rbp),%eax
sub    $0x4,%eax
je     1186 <hdlc_set_addr+0x86>
jmp    11ca <hdlc_set_addr+0xca>
mov    -0x10(%rbp),%ecx
shl    $0x1,%ecx
or     $0x1,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
jmp    11d1 <hdlc_set_addr+0xd1>
mov    -0x10(%rbp),%ecx
shl    $0x1,%ecx
and    $0x7e,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
shl    $0x1,%ecx
or     $0x1,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
jmp    11d1 <hdlc_set_addr+0xd1>
mov    -0x10(%rbp),%ecx
shr    $0x7,%ecx
and    $0x7e,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%ecx
shl    $0x1,%ecx
and    $0x7e,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0x14(%rbp),%ecx
shr    $0x7,%ecx
and    $0x7e,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0x14(%rbp),%ecx
shl    $0x1,%ecx
or     $0x1,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0xc(%rax)
jmp    11d1 <hdlc_set_addr+0xd1>
movl   $0xfffffffb,-0x18(%rbp)
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdlc_set_addr>:
cmp    $0x4,%esi
je     111e <hdlc_set_addr+0x1e>
cmp    $0x2,%esi
je     1146 <hdlc_set_addr+0x46>
mov    $0xfffffffb,%eax
cmp    $0x1,%esi
jne    1158 <hdlc_set_addr+0x58>
lea    (%rdx,%rdx,1),%eax
add    $0x1,%eax
mov    %eax,(%rdi)
jmp    1156 <hdlc_set_addr+0x56>
mov    %edx,%eax
shr    $0x7,%eax
and    $0x7e,%eax
mov    %eax,(%rdi)
add    %edx,%edx
and    $0x7e,%edx
mov    %edx,0x4(%rdi)
mov    %ecx,%eax
shr    $0x7,%eax
and    $0x7e,%eax
mov    %eax,0x8(%rdi)
lea    (%rcx,%rcx,1),%eax
add    $0x1,%eax
mov    %eax,0xc(%rdi)
jmp    1156 <hdlc_set_addr+0x56>
add    %edx,%edx
and    $0x7e,%edx
mov    %edx,(%rdi)
lea    (%rcx,%rcx,1),%eax
add    $0x1,%eax
mov    %eax,0x4(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hdlc_set_addr(i32* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
store i32 0, i32* %9
%10 = load i32, i32* %6
switch i32 %10, label %49 [
i32 1, label %11
i32 2, label %17
i32 4, label %28
]
11: ; preds = %4
%12 = load i32, i32* %7
%13 = shl i32 %12, 1
%14 = or i32 %13, 1
%15 = load i32*, i32** %5
%16 = getelementptr inbounds i32, i32* %15, i64 0
store i32 %14, i32* %16
br label %50
17: ; preds = %4
%18 = load i32, i32* %7
%19 = shl i32 %18, 1
%20 = and i32 %19, 126
%21 = load i32*, i32** %5
%22 = getelementptr inbounds i32, i32* %21, i64 0
store i32 %20, i32* %22
%23 = load i32, i32* %8
%24 = shl i32 %23, 1
%25 = or i32 %24, 1
%26 = load i32*, i32** %5
%27 = getelementptr inbounds i32, i32* %26, i64 1
store i32 %25, i32* %27
br label %50
28: ; preds = %4
%29 = load i32, i32* %7
%30 = lshr i32 %29, 7
%31 = and i32 %30, 126
%32 = load i32*, i32** %5
%33 = getelementptr inbounds i32, i32* %32, i64 0
store i32 %31, i32* %33
%34 = load i32, i32* %7
%35 = shl i32 %34, 1
%36 = and i32 %35, 126
%37 = load i32*, i32** %5
%38 = getelementptr inbounds i32, i32* %37, i64 1
store i32 %36, i32* %38
%39 = load i32, i32* %8
%40 = lshr i32 %39, 7
%41 = and i32 %40, 126
%42 = load i32*, i32** %5
%43 = getelementptr inbounds i32, i32* %42, i64 2
store i32 %41, i32* %43
%44 = load i32, i32* %8
%45 = shl i32 %44, 1
%46 = or i32 %45, 1
%47 = load i32*, i32** %5
%48 = getelementptr inbounds i32, i32* %47, i64 3
store i32 %46, i32* %48
br label %50
49: ; preds = %4
store i32 -5, i32* %9
br label %50
50: ; preds = %49, %28, %17, %11
%51 = load i32, i32* %9
ret i32 %51
}

LLVM IR (-O2):
define i32 @hdlc_set_addr(i32* nocapture writeonly %0, i32 %1, i32 %2, i32 %3) {
switch i32 %1, label %26 [
i32 1, label %5
i32 2, label %8
i32 4, label %14
]
5: ; preds = %4
%6 = shl i32 %2, 1
%7 = or i32 %6, 1
store i32 %7, i32* %0
br label %26
8: ; preds = %4
%9 = shl i32 %2, 1
%10 = and i32 %9, 126
store i32 %10, i32* %0
%11 = shl i32 %3, 1
%12 = or i32 %11, 1
%13 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %12, i32* %13
br label %26
14: ; preds = %4
%15 = lshr i32 %2, 7
%16 = and i32 %15, 126
store i32 %16, i32* %0
%17 = shl i32 %2, 1
%18 = and i32 %17, 126
%19 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %18, i32* %19
%20 = lshr i32 %3, 7
%21 = and i32 %20, 126
%22 = getelementptr inbounds i32, i32* %0, i64 2
store i32 %21, i32* %22
%23 = shl i32 %3, 1
%24 = or i32 %23, 1
%25 = getelementptr inbounds i32, i32* %0, i64 3
store i32 %24, i32* %25
br label %26
26: ; preds = %4, %14, %8, %5
%27 = phi i32 [ 0, %14 ], [ 0, %8 ], [ 0, %5 ], [ -5, %4 ]
ret i32 %27
}