xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ WARN_ON(int);
void gpio_unexport(unsigned gpio) { WARN_ON(1); }


x86 assembly (clang, -O0):
<gpio_unexport>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <WARN_ON@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_unexport>:
mov    $0x1,%edi
jmp    1030 <WARN_ON@plt>

LLVM IR (-O0):
define void @gpio_unexport(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @WARN_ON(i32 1)
ret void
}

LLVM IR (-O2):
define void @gpio_unexport(i32 %0) {
%2 = tail call i32 @WARN_ON(i32 1)
ret void
}
int cmp(const void *a, const void *b) {
  if (((int *)a)[1] == ((int *)b)[1]) {
    return ((int *)b)[0] - ((int *)a)[0];
  } else {
    return ((int *)a)[1] - ((int *)b)[1];
  }
}


x86 assembly (clang, -O0):
<cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%eax
mov    -0x18(%rbp),%rcx
cmp    0x4(%rcx),%eax
jne    1134 <cmp+0x34>
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
mov    %eax,-0x4(%rbp)
jmp    1145 <cmp+0x45>
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%eax
mov    -0x18(%rbp),%rcx
sub    0x4(%rcx),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp>:
mov    0x4(%rdi),%eax
sub    0x4(%rsi),%eax
jne    110c <cmp+0xc>
mov    (%rsi),%eax
sub    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @cmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i32*
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to i32*
%12 = getelementptr inbounds i32, i32* %11, i64 1
%13 = load i32, i32* %12
%14 = icmp eq i32 %9, %13
br i1 %14, label %15, label %25
15: ; preds = %2
%16 = load i8*, i8** %5
%17 = bitcast i8* %16 to i32*
%18 = getelementptr inbounds i32, i32* %17, i64 0
%19 = load i32, i32* %18
%20 = load i8*, i8** %4
%21 = bitcast i8* %20 to i32*
%22 = getelementptr inbounds i32, i32* %21, i64 0
%23 = load i32, i32* %22
%24 = sub nsw i32 %19, %23
store i32 %24, i32* %3
br label %35
25: ; preds = %2
%26 = load i8*, i8** %4
%27 = bitcast i8* %26 to i32*
%28 = getelementptr inbounds i32, i32* %27, i64 1
%29 = load i32, i32* %28
%30 = load i8*, i8** %5
%31 = bitcast i8* %30 to i32*
%32 = getelementptr inbounds i32, i32* %31, i64 1
%33 = load i32, i32* %32
%34 = sub nsw i32 %29, %33
store i32 %34, i32* %3
br label %35
35: ; preds = %25, %15
%36 = load i32, i32* %3
ret i32 %36
}

LLVM IR (-O2):
define i32 @cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 4
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
%6 = getelementptr inbounds i8, i8* %1, i64 4
%7 = bitcast i8* %6 to i32*
%8 = load i32, i32* %7
%9 = icmp eq i32 %5, %8
br i1 %9, label %10, label %16
10: ; preds = %2
%11 = bitcast i8* %1 to i32*
%12 = bitcast i8* %0 to i32*
%13 = load i32, i32* %11
%14 = load i32, i32* %12
%15 = sub nsw i32 %13, %14
br label %18
16: ; preds = %2
%17 = sub nsw i32 %5, %8
br label %18
18: ; preds = %16, %10
%19 = phi i32 [ %15, %10 ], [ %17, %16 ]
ret i32 %19
}
/* Variables and functions */
void *allocator_A72A7595(size_t, size_t);
void *calloc(size_t nitems, size_t size) {
  return allocator_A72A7595(nitems, size);
}


x86 assembly (clang, -O0):
<calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <allocator_A72A7595@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calloc>:
jmp    1030 <allocator_A72A7595@plt>

LLVM IR (-O0):
define i8* @calloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i8* @allocator_A72A7595(i64 %5, i64 %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @calloc(i64 %0, i64 %1) {
%3 = tail call i8* @allocator_A72A7595(i64 %0, i64 %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ init(char *);
int ok();
int /*<<< orphan*/ test();
int main() {
  init("control flow");
  test();
  return ok();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
call   1040 <init@plt>
mov    $0x0,%al
call   1050 <test@plt>
mov    $0x0,%al
call   1030 <ok@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
call   1040 <init@plt>
xor    %eax,%eax
call   1050 <test@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <ok@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"control flow\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @init(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @test()
%4 = call i32 (...) @ok()
ret i32 %4
}

LLVM IR (-O2):
@.str = [13 x i8] c"control flow\00"
define i32 @main() {
%1 = tail call i32 @init(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @test()
%3 = tail call i32 (...) @ok()
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ ajTextinExit();
int /*<<< orphan*/ ajTextoutExit();
void ajTextExit(void) {
  ajTextinExit();
  ajTextoutExit();
  return;
}


x86 assembly (clang, -O0):
<ajTextExit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ajTextinExit@plt>
mov    $0x0,%al
call   1040 <ajTextoutExit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ajTextExit>:
push   %rax
xor    %eax,%eax
call   1030 <ajTextinExit@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <ajTextoutExit@plt>

LLVM IR (-O0):
define void @ajTextExit() {
%1 = call i32 (...) @ajTextinExit()
%2 = call i32 (...) @ajTextoutExit()
ret void
}

LLVM IR (-O2):
define void @ajTextExit() {
%1 = tail call i32 (...) @ajTextinExit()
%2 = tail call i32 (...) @ajTextoutExit()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
void _clrscr(void) { system("clear"); }


x86 assembly (clang, -O0):
<_clrscr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <system@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_clrscr>:
lea    0xee9(%rip),%rdi
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"clear\00"
define void @_clrscr() {
%1 = call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"clear\00"
define void @_clrscr() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int32_t;

/* Variables and functions */
int /*<<< orphan*/ Interpolate_3(int /*<<< orphan*/, int, int /*<<< orphan*/,
                                 int, int /*<<< orphan*/, int, int);
u_int32_t Interp9(u_int32_t c1, u_int32_t c2, u_int32_t c3) {
  return Interpolate_3(c1, 2, c2, 3, c3, 3, 3);
}


x86 assembly (clang, -O0):
<Interp9>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%r8d
mov    $0x2,%esi
mov    $0x3,%r9d
mov    %r9d,%ecx
movl   $0x3,(%rsp)
call   1030 <Interpolate_3@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Interp9>:
push   %rax
mov    %edx,%r8d
mov    %esi,%edx
movl   $0x3,(%rsp)
mov    $0x2,%esi
mov    $0x3,%ecx
mov    $0x3,%r9d
call   1030 <Interpolate_3@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @Interp9(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @Interpolate_3(i32 %7, i32 2, i32 %8, i32 3, i32 %9, i32 3, i32 3)
ret i32 %10
}

LLVM IR (-O2):
define i32 @Interp9(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @Interpolate_3(i32 %0, i32 2, i32 %1, i32 3, i32 %2, i32 3, i32 3)
ret i32 %4
}
void __stack_chk_fail(void) {
  for (;;)
    ;
}


x86 assembly (clang, -O0):
<__stack_chk_fail>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <__stack_chk_fail+0x9>
jmp    1109 <__stack_chk_fail+0x9>

x86 assembly (clang, -O2):
<__stack_chk_fail>:
jmp    1100 <__stack_chk_fail>

LLVM IR (-O0):
define void @__stack_chk_fail() {
br label %1
1: ; preds = %1, %0
br label %1
}

LLVM IR (-O2):
define void @__stack_chk_fail() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
int strlen(char *);
char *strncpy(char *, char *, int);
char *strcpy(char *dest, char *src) {
  int countSrc = strlen(src);
  return strncpy(dest, src, countSrc);
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <strncpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <strncpy@plt>

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = call i32 @strlen(i8* %6)
store i32 %7, i32* %5
%8 = load i8*, i8** %3
%9 = load i8*, i8** %4
%10 = load i32, i32* %5
%11 = call i8* @strncpy(i8* %8, i8* %9, i32 %10)
ret i8* %11
}

LLVM IR (-O2):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i8* @strncpy(i8* %0, i8* %1, i32 %3)
ret i8* %4
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int MurmurHash64A(unsigned char *, size_t, int);
int hll_pat_len(unsigned char *ele, size_t elesize, long *regp) {
  uint64_t hash, bit, index;
  int count;
  hash = MurmurHash64A(ele, elesize, 0xadc83b19ULL);
  index = hash & ((1 << 14) - 1);
  hash |= ((uint64_t)1 << 63);
  bit = (1 << 14);
  count = 1;
  while ((hash & bit) == 0) {
    count++;
    bit <<= 1;
  }
  *regp = (int)index;
  return count;
}


x86 assembly (clang, -O0):
<hll_pat_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0xadc83b19,%edx
call   1030 <MurmurHash64A@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
and    $0x3fff,%eax
mov    %eax,-0x24(%rbp)
or     -0x1c(%rbp),%eax
mov    %eax,-0x1c(%rbp)
movl   $0x4000,-0x20(%rbp)
movl   $0x1,-0x28(%rbp)
mov    -0x1c(%rbp),%eax
and    -0x20(%rbp),%eax
cmp    $0x0,%eax
jne    117e <hll_pat_len+0x6e>
mov    -0x28(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x28(%rbp)
mov    -0x20(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    1158 <hll_pat_len+0x48>
movslq -0x24(%rbp),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x28(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hll_pat_len>:
push   %rbx
mov    %rdx,%rbx
mov    $0xadc83b19,%edx
call   1030 <MurmurHash64A@plt>
and    $0x3fff,%eax
mov    %rax,(%rbx)
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @hll_pat_len(i8* %0, i64 %1, i64* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64* %2, i64** %6
%11 = load i8*, i8** %4
%12 = load i64, i64* %5
%13 = call i32 @MurmurHash64A(i8* %11, i64 %12, i32 -1379386599)
store i32 %13, i32* %7
%14 = load i32, i32* %7
%15 = and i32 %14, 16383
store i32 %15, i32* %9
%16 = load i32, i32* %7
%17 = or i32 %16, poison
store i32 %17, i32* %7
store i32 16384, i32* %8
store i32 1, i32* %10
br label %18
18: ; preds = %23, %3
%19 = load i32, i32* %7
%20 = load i32, i32* %8
%21 = and i32 %19, %20
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %28
23: ; preds = %18
%24 = load i32, i32* %10
%25 = add nsw i32 %24, 1
store i32 %25, i32* %10
%26 = load i32, i32* %8
%27 = shl i32 %26, 1
store i32 %27, i32* %8
br label %18
28: ; preds = %18
%29 = load i32, i32* %9
%30 = sext i32 %29 to i64
%31 = load i64*, i64** %6
store i64 %30, i64* %31
%32 = load i32, i32* %10
ret i32 %32
}

LLVM IR (-O2):
define i32 @hll_pat_len(i8* %0, i64 %1, i64* nocapture writeonly %2) {
%4 = tail call i32 @MurmurHash64A(i8* %0, i64 %1, i32 -1379386599)
%5 = and i32 %4, 16383
%6 = zext i32 %5 to i64
store i64 %6, i64* %2
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int show_mainl_usage() {
  char response[80];
  printf("\n\nNot enough parameters:"
         "\n"
         "\n usage: mainl in-file k_diffuse k_specular eta"
         " Light-x y z (n.n)"
         " "
         "\n");
  return (1);
}


x86 assembly (clang, -O0):
<show_mainl_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_mainl_usage>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [93 x i8] c"\0A\0ANot enough parameters:\0A\0A usage: mainl in-file k_diffuse k_specular eta Light-x y z (n.n) \0A\00"
define i32 @show_mainl_usage() {
%1 = alloca [80 x i8]
%2 = call i32 @printf(i8* getelementptr inbounds ([93 x i8], [93 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@str = [92 x i8] c"\0A\0ANot enough parameters:\0A\0A usage: mainl in-file k_diffuse k_specular eta Light-x y z (n.n) \00"
define i32 @show_mainl_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([92 x i8], [92 x i8]* @str, i64 0, i64 0))
ret i32 1
}
/* Variables and functions */
int verifstrformat(char *, char *);
int verifnumregnat(char *chaine) {
  return verifstrformat("######-###-##", chaine);
}


x86 assembly (clang, -O0):
<verifnumregnat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <verifstrformat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<verifnumregnat>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <verifstrformat@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"######-###-##\00"
define i32 @verifnumregnat(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @verifstrformat(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 %4
}

LLVM IR (-O2):
@.str = [14 x i8] c"######-###-##\00"
define i32 @verifnumregnat(i8* %0) {
%2 = tail call i32 @verifstrformat(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fprintf(int /*<<< orphan*/ *, char *);
int fprint_routefilter_help(FILE *out) {
  return fprintf(out,
                 "Routes can be filtered on:\n"
                 " -prefix\n"
                 " -mask\n"
                 " -gw\n"
                 " -device\n"
                 " -comment\n"
                 " -Any Extended Attribute attached to the route\n"
                 "\n"
                 "operator are :\n"
                 "- '=' (EQUALS)\n"
                 "- '#' (DIFFERENT)\n"
                 "- '<' (numerically inferior)\n"
                 "- '>' (numerically superior)\n"
                 "- '{' (is included (for prefixes))\n"
                 "- '}' (includes (for prefixes))\n"
                 "- '~' (st_scanf regular expression)\n"
                 "- '%%' (st_scanf case insensitive regular expression)\n");
}


x86 assembly (clang, -O0):
<fprint_routefilter_help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fprint_routefilter_help>:
lea    0xee9(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [379 x i8] c"Routes can be filtered on:\0A -prefix\0A -mask\0A -gw\0A -device\0A -comment\0A -Any Extended Attribute attached to the route\0A\0Aoperator are :\0A- '=' (EQUALS)\0A- '#' (DIFFERENT)\0A- '<' (numerically inferior)\0A- '>' (numerically superior)\0A- '{' (is included (for prefixes))\0A- '}' (includes (for prefixes))\0A- '~' (st_scanf regular expression)\0A- '%%' (st_scanf case insensitive regular expression)\0A\00"
define i32 @fprint_routefilter_help(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([379 x i8], [379 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [379 x i8] c"Routes can be filtered on:\0A -prefix\0A -mask\0A -gw\0A -device\0A -comment\0A -Any Extended Attribute attached to the route\0A\0Aoperator are :\0A- '=' (EQUALS)\0A- '#' (DIFFERENT)\0A- '<' (numerically inferior)\0A- '>' (numerically superior)\0A- '{' (is included (for prefixes))\0A- '}' (includes (for prefixes))\0A- '~' (st_scanf regular expression)\0A- '%%' (st_scanf case insensitive regular expression)\0A\00"
define i32 @fprint_routefilter_help(i32* nocapture %0) {
%2 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([379 x i8], [379 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void SysCtlPeripheralPowerOff(uint32_t ui32Peripheral) {
  ;
  (*((volatile uint32_t
          *)(((uint32_t)(0x400fe900 + ((ui32Peripheral & 0xff00) >> 8)) &
              0xF0000000) |
             0x02000000 |
             (((uint32_t)(0x400fe900 + ((ui32Peripheral & 0xff00) >> 8)) &
               0x000FFFFF)
              << 5) |
             ((ui32Peripheral & 0xff) << 2)))) = 0;
}


x86 assembly (clang, -O0):
<SysCtlPeripheralPowerOff>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
sar    $0x8,%eax
add    $0x400fe900,%eax
and    $0xf0000000,%eax
or     $0x2000000,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
sar    $0x8,%ecx
add    $0x400fe900,%ecx
and    $0xfffff,%ecx
shl    $0x5,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
shl    $0x2,%ecx
or     %ecx,%eax
mov    %eax,%eax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlPeripheralPowerOff>:
movzbl %dil,%eax
shr    $0x3,%edi
and    $0x1fe0,%edi
shl    $0x2,%eax
or     %edi,%eax
movl   $0x0,0x43fd2000(%rax)
ret

LLVM IR (-O0):
define void @SysCtlPeripheralPowerOff(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 65280
%5 = ashr i32 %4, 8
%6 = add nsw i32 1074784512, %5
%7 = and i32 %6, -268435456
%8 = or i32 %7, 33554432
%9 = load i32, i32* %2
%10 = and i32 %9, 65280
%11 = ashr i32 %10, 8
%12 = add nsw i32 1074784512, %11
%13 = and i32 %12, 1048575
%14 = shl i32 %13, 5
%15 = or i32 %8, %14
%16 = load i32, i32* %2
%17 = and i32 %16, 255
%18 = shl i32 %17, 2
%19 = or i32 %15, %18
%20 = zext i32 %19 to i64
%21 = inttoptr i64 %20 to i32*
store volatile i32 0, i32* %21
ret void
}

LLVM IR (-O2):
define void @SysCtlPeripheralPowerOff(i32 %0) {
%2 = lshr i32 %0, 3
%3 = and i32 %2, 8160
%4 = shl i32 %0, 2
%5 = and i32 %4, 1020
%6 = or i32 %5, %3
%7 = or i32 %6, 1140662272
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store volatile i32 0, i32* %9
ret void
}
int xmlNoNetExists(const char *URL) { return (0); }


x86 assembly (clang, -O0):
<xmlNoNetExists>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmlNoNetExists>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @xmlNoNetExists(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @xmlNoNetExists(i8* nocapture readnone %0) {
ret i32 0
}
int funcdef2() { return 0; }


x86 assembly (clang, -O0):
<funcdef2>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<funcdef2>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @funcdef2() {
ret i32 0
}

LLVM IR (-O2):
define i32 @funcdef2() {
ret i32 0
}
int foo(int v1[], int v2[]) {
  int r, i, j;
  for (j = 0; j < 64; j++)
    for (i = 0; i < 64; i++)
      r = v1[j] + v2[i];
  return r;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x1c(%rbp)
cmpl   $0x40,-0x1c(%rbp)
jge    1168 <foo+0x68>
movl   $0x0,-0x18(%rbp)
cmpl   $0x40,-0x18(%rbp)
jge    1155 <foo+0x55>
mov    -0x8(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    -0x10(%rbp),%rcx
movslq -0x18(%rbp),%rdx
add    (%rcx,%rdx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1124 <foo+0x24>
jmp    115a <foo+0x5a>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1113 <foo+0x13>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    0xfc(%rsi),%eax
add    0xfc(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @foo(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
store i32 0, i32* %7
br label %8
8: ; preds = %31, %2
%9 = load i32, i32* %7
%10 = icmp slt i32 %9, 64
br i1 %10, label %11, label %34
11: ; preds = %8
store i32 0, i32* %6
br label %12
12: ; preds = %27, %11
%13 = load i32, i32* %6
%14 = icmp slt i32 %13, 64
br i1 %14, label %15, label %30
15: ; preds = %12
%16 = load i32*, i32** %3
%17 = load i32, i32* %7
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i32, i32* %16, i64 %18
%20 = load i32, i32* %19
%21 = load i32*, i32** %4
%22 = load i32, i32* %6
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i32, i32* %21, i64 %23
%25 = load i32, i32* %24
%26 = add nsw i32 %20, %25
store i32 %26, i32* %5
br label %27
27: ; preds = %15
%28 = load i32, i32* %6
%29 = add nsw i32 %28, 1
store i32 %29, i32* %6
br label %12
30: ; preds = %12
br label %31
31: ; preds = %30
%32 = load i32, i32* %7
%33 = add nsw i32 %32, 1
store i32 %33, i32* %7
br label %8
34: ; preds = %8
%35 = load i32, i32* %5
ret i32 %35
}

LLVM IR (-O2):
define i32 @foo(i32* nocapture %0, i32* nocapture %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 63
%4 = load i32, i32* %3
%5 = getelementptr inbounds i32, i32* %1, i64 63
%6 = load i32, i32* %5
%7 = add nsw i32 %6, %4
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ __u8;
typedef int /*<<< orphan*/ __s32;

/* Variables and functions */
int /*<<< orphan*/ i2c_smbus_access(int, int /*<<< orphan*/, int /*<<< orphan*/,
                                    int /*<<< orphan*/, int /*<<< orphan*/);
__s32 i2c_smbus_write_quick(int file, __u8 value) {
  return i2c_smbus_access(file, value, 0, 0, 0);
}


x86 assembly (clang, -O0):
<i2c_smbus_write_quick>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
xor    %r8d,%r8d
mov    %r8d,%edx
mov    %r8d,%ecx
call   1030 <i2c_smbus_access@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_smbus_write_quick>:
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <i2c_smbus_access@plt>

LLVM IR (-O0):
define i32 @i2c_smbus_write_quick(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @i2c_smbus_access(i32 %5, i32 %6, i32 0, i32 0, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @i2c_smbus_write_quick(i32 %0, i32 %1) {
%3 = tail call i32 @i2c_smbus_access(i32 %0, i32 %1, i32 0, i32 0, i32 0)
ret i32 %3
}
int PDC_print(cmd, byte, port)
int cmd;
int byte;
int port;
{}


x86 assembly (clang, -O0):
<PDC_print>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PDC_print>:
ret

LLVM IR (-O0):
define i32 @PDC_print(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %4
ret i32 %8
}

LLVM IR (-O2):
define i32 @PDC_print(i32 %0, i32 %1, i32 %2) {
ret i32 undef
}
long long szus() { return 0xffff00007fffffffLL; }


x86 assembly (clang, -O0):
<szus>:
push   %rbp
mov    %rsp,%rbp
movabs $0xffff00007fffffff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<szus>:
movabs $0xffff00007fffffff,%rax
ret

LLVM IR (-O0):
define i64 @szus() {
ret i64 -281472829227009
}

LLVM IR (-O2):
define i64 @szus() {
ret i64 -281472829227009
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void app_main(void) { printf("User application is loaded and running.\n"); }


x86 assembly (clang, -O0):
<app_main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<app_main>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [41 x i8] c"User application is loaded and running.\0A\00"
define void @app_main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [40 x i8] c"User application is loaded and running.\00"
define void @app_main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([40 x i8], [40 x i8]* @str, i64 0, i64 0))
ret void
}
void insert_at_end(int a, int b) {}


x86 assembly (clang, -O0):
<insert_at_end>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<insert_at_end>:
ret

LLVM IR (-O0):
define void @insert_at_end(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @insert_at_end(i32 %0, i32 %1) {
ret void
}
int pth_pth_uctx_switch(void *p1, void *p2) {}


x86 assembly (clang, -O0):
<pth_pth_uctx_switch>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pth_pth_uctx_switch>:
ret

LLVM IR (-O0):
define i32 @pth_pth_uctx_switch(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @pth_pth_uctx_switch(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ GL_FLAT;
int /*<<< orphan*/ glClearColor(double, double, double, double);
int /*<<< orphan*/ glShadeModel(int /*<<< orphan*/);
void clip_init(void) {
  glClearColor(0.0, 0.0, 0.0, 0.0);
  glShadeModel(GL_FLAT);
}


x86 assembly (clang, -O0):
<clip_init>:
push   %rbp
mov    %rsp,%rbp
xorps  %xmm3,%xmm3
movaps %xmm3,%xmm0
movaps %xmm3,%xmm1
movaps %xmm3,%xmm2
call   1030 <glClearColor@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
call   1040 <glShadeModel@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clip_init>:
push   %rax
xorps  %xmm0,%xmm0
xorps  %xmm1,%xmm1
xorps  %xmm2,%xmm2
xorps  %xmm3,%xmm3
call   1030 <glClearColor@plt>
mov    0x2eaf(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <glShadeModel@plt>

LLVM IR (-O0):
@GL_FLAT = global i32 0
define void @clip_init() {
%1 = call i32 @glClearColor(double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00)
%2 = load i32, i32* @GL_FLAT
%3 = call i32 @glShadeModel(i32 %2)
ret void
}

LLVM IR (-O2):
@GL_FLAT = global i32 0
define void @clip_init() {
%1 = tail call i32 @glClearColor(double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00)
%2 = load i32, i32* @GL_FLAT
%3 = tail call i32 @glShadeModel(i32 %2)
ret void
}
int md_revalidate(struct gendisk *disk) {
  int a;
  return a;
}


x86 assembly (clang, -O0):
<md_revalidate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<md_revalidate>:
ret

LLVM IR (-O0):
%struct.gendisk = type opaque
define i32 @md_revalidate(%struct.gendisk* %0) {
%2 = alloca %struct.gendisk*
%3 = alloca i32
store %struct.gendisk* %0, %struct.gendisk** %2
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
%struct.gendisk = type opaque
define i32 @md_revalidate(%struct.gendisk* nocapture readnone %0) {
ret i32 undef
}
void copia(void) {
  int i;
  extern char linea[], linea_max[];
  i = 0;
  while ((*(linea_max + i) = *(linea + i)) != '\0') {
    i++;
  }
}


x86 assembly (clang, -O0):
<copia>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movslq -0x4(%rbp),%rcx
mov    0x2eda(%rip),%rax
mov    (%rax,%rcx,1),%al
movslq -0x4(%rbp),%rdx
mov    0x2eb4(%rip),%rcx
mov    %al,(%rcx,%rdx,1)
movsbl %al,%eax
cmp    $0x0,%eax
je     1141 <copia+0x41>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <copia+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<copia>:
xor    %eax,%eax
mov    0x2ee7(%rip),%rsi
mov    0x2ec8(%rip),%rdx
movzbl (%rsi,%rax,1),%ecx
mov    %cl,(%rdx,%rax,1)
add    $0x1,%rax
test   %cl,%cl
jne    1110 <copia+0x10>
ret

LLVM IR (-O0):
@linea = external global [0 x i8]
@linea_max = external global [0 x i8]
define void @copia() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %12, %0
%3 = load i32, i32* %1
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* getelementptr inbounds ([0 x i8], [0 x i8]* @linea, i64 0, i64 0), i64 %4
%6 = load i8, i8* %5
%7 = load i32, i32* %1
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* getelementptr inbounds ([0 x i8], [0 x i8]* @linea_max, i64 0, i64 0), i64 %8
store i8 %6, i8* %9
%10 = sext i8 %6 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = load i32, i32* %1
%14 = add nsw i32 %13, 1
store i32 %14, i32* %1
br label %2
15: ; preds = %2
ret void
}

LLVM IR (-O2):
@linea = external global [0 x i8]
@linea_max = external global [0 x i8]
define void @copia() {
br label %1
1: ; preds = %1, %0
%2 = phi i64 [ %7, %1 ], [ 0, %0 ]
%3 = getelementptr inbounds [0 x i8], [0 x i8]* @linea, i64 0, i64 %2
%4 = load i8, i8* %3
%5 = getelementptr inbounds [0 x i8], [0 x i8]* @linea_max, i64 0, i64 %2
store i8 %4, i8* %5
%6 = icmp eq i8 %4, 0
%7 = add nuw i64 %2, 1
br i1 %6, label %8, label %1
8: ; preds = %1
ret void
}
/* Variables and functions */
long FD_SETSIZE;
long __NFDBITS;
int /*<<< orphan*/ __chk_fail();
long int __fdelt_chk(long int d) {
  if (d >= FD_SETSIZE)
    __chk_fail();
  return d / __NFDBITS;
}


x86 assembly (clang, -O0):
<__fdelt_chk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2eb9(%rip),%rcx
cmp    (%rcx),%rax
jl     1137 <__fdelt_chk+0x27>
mov    $0x0,%al
call   1030 <__chk_fail@plt>
mov    -0x8(%rbp),%rax
mov    0x2e8e(%rip),%rcx
cqto
idivq  (%rcx)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__fdelt_chk>:
push   %rbx
mov    %rdi,%rbx
mov    0x2ec5(%rip),%rax
cmp    %rdi,(%rax)
jg     1127 <__fdelt_chk+0x17>
xor    %eax,%eax
call   1030 <__chk_fail@plt>
mov    0x2ea2(%rip),%rax
mov    (%rax),%rcx
mov    %rbx,%rax
or     %rcx,%rax
shr    $0x20,%rax
je     1147 <__fdelt_chk+0x37>
mov    %rbx,%rax
cqto
idiv   %rcx
pop    %rbx
ret
mov    %ebx,%eax
xor    %edx,%edx
div    %ecx
pop    %rbx
ret

LLVM IR (-O0):
@FD_SETSIZE = global i64 0
@__NFDBITS = global i64 0
define i64 @__fdelt_chk(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = load i64, i64* @FD_SETSIZE
%5 = icmp sge i64 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 (...) @__chk_fail()
br label %8
8: ; preds = %6, %1
%9 = load i64, i64* %2
%10 = load i64, i64* @__NFDBITS
%11 = sdiv i64 %9, %10
ret i64 %11
}

LLVM IR (-O2):
@FD_SETSIZE = global i64 0
@__NFDBITS = global i64 0
define i64 @__fdelt_chk(i64 %0) {
%2 = load i64, i64* @FD_SETSIZE
%3 = icmp sgt i64 %2, %0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 (...) @__chk_fail()
br label %6
6: ; preds = %4, %1
%7 = load i64, i64* @__NFDBITS
%8 = sdiv i64 %0, %7
ret i64 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputws(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
void uninitvar_fputws(void) {
  wchar_t *string;
  FILE *stream;
  (void)fputws(string, stream);
}


x86 assembly (clang, -O0):
<uninitvar_fputws>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <fputws@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_fputws>:
jmp    1030 <fputws@plt>

LLVM IR (-O0):
define void @uninitvar_fputws() {
%1 = alloca i32*
%2 = alloca i32*
%3 = load i32*, i32** %1
%4 = load i32*, i32** %2
%5 = call i32 @fputws(i32* %3, i32* %4)
ret void
}

LLVM IR (-O2):
define void @uninitvar_fputws() {
%1 = tail call i32 @fputws(i32* undef, i32* undef)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void usage(void) {
  fputs("Usage: mount [-a] [-t type] name [path].\n", stderr);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%esi
lea    0xecc(%rip),%rdi
call   1030 <fputs@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
lea    0xecf(%rip),%rdi
call   1030 <fputs@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [42 x i8] c"Usage: mount [-a] [-t type] name [path].\0A\00"
@stderr = global i32 0
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [42 x i8] c"Usage: mount [-a] [-t type] name [path].\0A\00"
@stderr = global i32 0
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int zt_feelings_randnum();
int zt_feelings_wannatalk(int probability) {
  int randnum = zt_feelings_randnum();
  if (randnum > probability)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<zt_feelings_wannatalk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <zt_feelings_randnum@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    113d <zt_feelings_wannatalk+0x2d>
movl   $0x0,-0x4(%rbp)
jmp    1144 <zt_feelings_wannatalk+0x34>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zt_feelings_wannatalk>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <zt_feelings_randnum@plt>
xor    %ecx,%ecx
cmp    %ebx,%eax
setle  %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @zt_feelings_wannatalk(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = call i32 (...) @zt_feelings_randnum()
store i32 %5, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 0, i32* %2
br label %11
10: ; preds = %1
store i32 1, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @zt_feelings_wannatalk(i32 %0) {
%2 = tail call i32 (...) @zt_feelings_randnum()
%3 = icmp sle i32 %2, %0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ shutdown(int, int);
void socket_close(int sock) { shutdown(sock, 2); }


x86 assembly (clang, -O0):
<socket_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x2,%esi
call   1030 <shutdown@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<socket_close>:
mov    $0x2,%esi
jmp    1030 <shutdown@plt>

LLVM IR (-O0):
define void @socket_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @shutdown(i32 %3, i32 2)
ret void
}

LLVM IR (-O2):
define void @socket_close(i32 %0) {
%2 = tail call i32 @shutdown(i32 %0, i32 2)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int cichlid_rotate_right_32(int, int);
uint32_t Sigma0(uint32_t x) {
  return cichlid_rotate_right_32(x, 2) ^ cichlid_rotate_right_32(x, 13) ^
         cichlid_rotate_right_32(x, 22);
}


x86 assembly (clang, -O0):
<Sigma0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x2,%esi
call   1030 <cichlid_rotate_right_32@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xd,%esi
call   1030 <cichlid_rotate_right_32@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
xor    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x16,%esi
call   1030 <cichlid_rotate_right_32@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
xor    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sigma0>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%ebx
mov    $0x2,%esi
call   1030 <cichlid_rotate_right_32@plt>
mov    %eax,%r14d
mov    %ebx,%edi
mov    $0xd,%esi
call   1030 <cichlid_rotate_right_32@plt>
mov    %eax,%ebp
xor    %r14d,%ebp
mov    %ebx,%edi
mov    $0x16,%esi
call   1030 <cichlid_rotate_right_32@plt>
xor    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @Sigma0(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @cichlid_rotate_right_32(i32 %3, i32 2)
%5 = load i32, i32* %2
%6 = call i32 @cichlid_rotate_right_32(i32 %5, i32 13)
%7 = xor i32 %4, %6
%8 = load i32, i32* %2
%9 = call i32 @cichlid_rotate_right_32(i32 %8, i32 22)
%10 = xor i32 %7, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @Sigma0(i32 %0) {
%2 = tail call i32 @cichlid_rotate_right_32(i32 %0, i32 2)
%3 = tail call i32 @cichlid_rotate_right_32(i32 %0, i32 13)
%4 = xor i32 %3, %2
%5 = tail call i32 @cichlid_rotate_right_32(i32 %0, i32 22)
%6 = xor i32 %4, %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("Hello World.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hello World.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [13 x i8] c"Hello World.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void show_usage(void) {
  printf("Usage:\n");
  printf("	resolveip -h\n");
  printf("	resolveip [-t timeout] hostname\n");
  printf("	resolveip -4 [-t timeout] hostname\n");
  printf("	resolveip -6 [-t timeout] hostname\n");
  exit(255);
}


x86 assembly (clang, -O0):
<show_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
lea    0xed4(%rip),%rdi
call   1030 <printf@plt>
lea    0xeea(%rip),%rdi
call   1030 <printf@plt>
lea    0xf03(%rip),%rdi
call   1030 <printf@plt>
mov    $0xff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<show_usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
lea    0xed3(%rip),%rdi
call   1030 <puts@plt>
lea    0xed5(%rip),%rdi
call   1030 <puts@plt>
lea    0xeea(%rip),%rdi
call   1030 <puts@plt>
lea    0xf02(%rip),%rdi
call   1030 <puts@plt>
mov    $0xff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"Usage:\0A\00"
@.str.1 = [15 x i8] c"\09resolveip -h\0A\00"
@.str.2 = [34 x i8] c"\09resolveip [-t timeout] hostname\0A\00"
@.str.3 = [37 x i8] c"\09resolveip -4 [-t timeout] hostname\0A\00"
@.str.4 = [37 x i8] c"\09resolveip -6 [-t timeout] hostname\0A\00"
define void @show_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.3, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.4, i64 0, i64 0))
%6 = call i32 @exit(i32 255)
unreachable
}

LLVM IR (-O2):
@str = [7 x i8] c"Usage:\00"
@str.5 = [14 x i8] c"\09resolveip -h\00"
@str.6 = [33 x i8] c"\09resolveip [-t timeout] hostname\00"
@str.7 = [36 x i8] c"\09resolveip -4 [-t timeout] hostname\00"
@str.8 = [36 x i8] c"\09resolveip -6 [-t timeout] hostname\00"
define void @show_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str.5, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @str.6, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str.7, i64 0, i64 0))
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str.8, i64 0, i64 0))
%6 = tail call i32 @exit(i32 255)
unreachable
}
void invlpg(void *m) { __asm__ volatile("invlpg (%0)" : : "b"(m) : "memory"); }


x86 assembly (clang, -O0):
<invlpg>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rbx
invlpg (%rbx)
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<invlpg>:
push   %rbx
mov    %rdi,%rbx
invlpg (%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @invlpg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @invlpg(i8* %0) {
tail call void asm sideeffect "invlpg ($0)", "{bx},~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ GLint;

/* Variables and functions */
int /*<<< orphan*/ glRasterPos2iv(int /*<<< orphan*/ *);
void RasterPos2iv(GLint v[2]) { glRasterPos2iv(v); }


x86 assembly (clang, -O0):
<RasterPos2iv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <glRasterPos2iv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RasterPos2iv>:
jmp    1030 <glRasterPos2iv@plt>

LLVM IR (-O0):
define void @RasterPos2iv(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @glRasterPos2iv(i32* %3)
ret void
}

LLVM IR (-O2):
define void @RasterPos2iv(i32* %0) {
%2 = tail call i32 @glRasterPos2iv(i32* %0)
ret void
}
void rop3_80_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = ~*D;
  stk1 = T & stk2;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_80_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
xor    $0xffffffff,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_80_0_0>:
mov    (%rdi),%al
not    %al
and    %dl,%al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_80_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = xor i32 %11, -1
%13 = trunc i32 %12 to i8
store i8 %13, i8* %8
%14 = load i8, i8* %6
%15 = zext i8 %14 to i32
%16 = load i8, i8* %8
%17 = zext i8 %16 to i32
%18 = and i32 %15, %17
%19 = trunc i32 %18 to i8
store i8 %19, i8* %7
%20 = load i8, i8* %7
%21 = load i8*, i8** %4
store i8 %20, i8* %21
ret void
}

LLVM IR (-O2):
define void @rop3_80_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %4, -1
%6 = and i8 %5, %2
store i8 %6, i8* %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ rdmsr(int);
uint32_t vmcs_revision(void) { return rdmsr(0x00000480); }


x86 assembly (clang, -O0):
<vmcs_revision>:
push   %rbp
mov    %rsp,%rbp
mov    $0x480,%edi
call   1030 <rdmsr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vmcs_revision>:
mov    $0x480,%edi
jmp    1030 <rdmsr@plt>

LLVM IR (-O0):
define i32 @vmcs_revision() {
%1 = call i32 @rdmsr(i32 1152)
ret i32 %1
}

LLVM IR (-O2):
define i32 @vmcs_revision() {
%1 = tail call i32 @rdmsr(i32 1152)
ret i32 %1
}
int hash_fn(const char *key, int table_size) {
  unsigned int hashed = 0;
  const char *c;
  int bits_per_int = sizeof(unsigned int) * 8;
  for (c = key; *c; c++) {
    hashed = (hashed << 5) | (hashed >> (bits_per_int - 5));
    hashed ^= *c;
  }
  return hashed % table_size;
}


x86 assembly (clang, -O0):
<hash_fn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x20,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     1164 <hash_fn+0x64>
mov    -0x10(%rbp),%eax
shl    $0x5,%eax
mov    -0x10(%rbp),%edx
mov    -0x1c(%rbp),%ecx
sub    $0x5,%ecx
shr    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
xor    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1121 <hash_fn+0x21>
mov    -0x10(%rbp),%eax
xor    %edx,%edx
divl   -0xc(%rbp)
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_fn>:
mov    (%rdi),%cl
test   %cl,%cl
je     1125 <hash_fn+0x25>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
rol    $0x5,%eax
movsbl %cl,%ecx
xor    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash_fn+0x10>
jmp    1127 <hash_fn+0x27>
xor    %eax,%eax
xor    %edx,%edx
div    %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @hash_fn(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 32, i32* %7
%8 = load i8*, i8** %3
store i8* %8, i8** %6
br label %9
9: ; preds = %26, %2
%10 = load i8*, i8** %6
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %29
13: ; preds = %9
%14 = load i32, i32* %5
%15 = shl i32 %14, 5
%16 = load i32, i32* %5
%17 = load i32, i32* %7
%18 = sub nsw i32 %17, 5
%19 = lshr i32 %16, %18
%20 = or i32 %15, %19
store i32 %20, i32* %5
%21 = load i8*, i8** %6
%22 = load i8, i8* %21
%23 = sext i8 %22 to i32
%24 = load i32, i32* %5
%25 = xor i32 %24, %23
store i32 %25, i32* %5
br label %26
26: ; preds = %13
%27 = load i8*, i8** %6
%28 = getelementptr inbounds i8, i8* %27, i32 1
store i8* %28, i8** %6
br label %9
29: ; preds = %9
%30 = load i32, i32* %5
%31 = load i32, i32* %4
%32 = urem i32 %30, %31
ret i32 %32
}

LLVM IR (-O2):
define i32 @hash_fn(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %13, %5 ], [ %3, %2 ]
%7 = phi i32 [ %11, %5 ], [ 0, %2 ]
%8 = phi i8* [ %12, %5 ], [ %0, %2 ]
%9 = tail call i32 @llvm.fshl.i32(i32 %7, i32 %7, i32 5)
%10 = sext i8 %6 to i32
%11 = xor i32 %9, %10
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %2
%16 = phi i32 [ 0, %2 ], [ %11, %5 ]
%17 = urem i32 %16, %1
ret i32 %17
}