unsigned short IPCLiteMtoCClearBits(unsigned long ulFlag,
                                    unsigned long ulAddress,
                                    unsigned long ulMask,
                                    unsigned short usLength,
                                    unsigned long ulStatusFlag) {
  unsigned short returnStatus;
  if ((*((volatile unsigned long *)(0x400FB700 + 0x000000010))) &
      (ulFlag | ulStatusFlag)) {
    returnStatus = 0x0001;
  } else {
    if (usLength == 0x00000001) {
      (*((volatile unsigned long *)(0x400FB700 + 0x000000030))) = 0x00000003;
      (*((volatile unsigned long *)(0x400FB700 + 0x000000034))) = ulAddress;
      (*((volatile unsigned long *)(0x400FB700 + 0x000000038))) =
          ulMask & (0x0000FFFF);
    } else if (usLength == 0x00000002) {
      (*((volatile unsigned long *)(0x400FB700 + 0x000000030))) = 0x00000004;
      (*((volatile unsigned long *)(0x400FB700 + 0x000000034))) = ulAddress;
      (*((volatile unsigned long *)(0x400FB700 + 0x000000038))) = ulMask;
    }
    (*((volatile unsigned long *)(0x400FB700 + 0x000000008))) |=
        (ulFlag | ulStatusFlag);
    returnStatus = 0x0000;
  }
  return returnStatus;
}


x86 assembly (clang, -O0):
<IPCLiteMtoCClearBits>:
push   %rbp
mov    %rsp,%rbp
mov    %cx,%ax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ax,-0x1a(%rbp)
mov    %r8,-0x28(%rbp)
mov    $0x400fb710,%eax
mov    (%rax),%rax
mov    -0x8(%rbp),%rcx
or     -0x28(%rbp),%rcx
and    %rcx,%rax
cmp    $0x0,%rax
je     1143 <IPCLiteMtoCClearBits+0x43>
movw   $0x1,-0x2a(%rbp)
jmp    11d7 <IPCLiteMtoCClearBits+0xd7>
movzwl -0x1a(%rbp),%eax
cmp    $0x1,%eax
jne    1180 <IPCLiteMtoCClearBits+0x80>
mov    $0x400fb730,%eax
movq   $0x3,(%rax)
mov    -0x10(%rbp),%rcx
mov    $0x400fb734,%eax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rcx
and    $0xffff,%rcx
mov    $0x400fb738,%eax
mov    %rcx,(%rax)
jmp    11b6 <IPCLiteMtoCClearBits+0xb6>
movzwl -0x1a(%rbp),%eax
cmp    $0x2,%eax
jne    11b1 <IPCLiteMtoCClearBits+0xb1>
mov    $0x400fb730,%eax
movq   $0x4,(%rax)
mov    -0x10(%rbp),%rcx
mov    $0x400fb734,%eax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rcx
mov    $0x400fb738,%eax
mov    %rcx,(%rax)
jmp    11b6 <IPCLiteMtoCClearBits+0xb6>
mov    -0x8(%rbp),%rax
or     -0x28(%rbp),%rax
mov    $0x400fb708,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0x400fb708,%eax
mov    %rcx,(%rax)
movw   $0x0,-0x2a(%rbp)
movzwl -0x2a(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IPCLiteMtoCClearBits>:
or     %r8,%rdi
mov    0x400fb710,%r8
40
mov    $0x1,%ax
and    %rdi,%r8
je     1115 <IPCLiteMtoCClearBits+0x15>
ret
cmp    $0x2,%cx
je     113a <IPCLiteMtoCClearBits+0x3a>
cmp    $0x1,%cx
jne    1156 <IPCLiteMtoCClearBits+0x56>
movq   $0x3,0x400fb730
mov    %rsi,0x400fb734
40
movzwl %dx,%edx
jmp    114e <IPCLiteMtoCClearBits+0x4e>
movq   $0x4,0x400fb730
mov    %rsi,0x400fb734
40
mov    %rdx,0x400fb738
40
or     %rdi,0x400fb708
40
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i16 @IPCLiteMtoCClearBits(i64 %0, i64 %1, i64 %2, i16 zeroext %3, i64 %4) {
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i16
%10 = alloca i64
%11 = alloca i16
store i64 %0, i64* %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i16 %3, i16* %9
store i64 %4, i64* %10
%12 = load volatile i64, i64* inttoptr (i64 1074771728 to i64*)
%13 = load i64, i64* %6
%14 = load i64, i64* %10
%15 = or i64 %13, %14
%16 = and i64 %12, %15
%17 = icmp ne i64 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %5
store i16 1, i16* %11
br label %41
19: ; preds = %5
%20 = load i16, i16* %9
%21 = zext i16 %20 to i32
%22 = icmp eq i32 %21, 1
br i1 %22, label %23, label %27
23: ; preds = %19
store volatile i64 3, i64* inttoptr (i64 1074771760 to i64*)
%24 = load i64, i64* %7
store volatile i64 %24, i64* inttoptr (i64 1074771764 to i64*)
%25 = load i64, i64* %8
%26 = and i64 %25, 65535
store volatile i64 %26, i64* inttoptr (i64 1074771768 to i64*)
br label %35
27: ; preds = %19
%28 = load i16, i16* %9
%29 = zext i16 %28 to i32
%30 = icmp eq i32 %29, 2
br i1 %30, label %31, label %34
31: ; preds = %27
store volatile i64 4, i64* inttoptr (i64 1074771760 to i64*)
%32 = load i64, i64* %7
store volatile i64 %32, i64* inttoptr (i64 1074771764 to i64*)
%33 = load i64, i64* %8
store volatile i64 %33, i64* inttoptr (i64 1074771768 to i64*)
br label %34
34: ; preds = %31, %27
br label %35
35: ; preds = %34, %23
%36 = load i64, i64* %6
%37 = load i64, i64* %10
%38 = or i64 %36, %37
%39 = load volatile i64, i64* inttoptr (i64 1074771720 to i64*)
%40 = or i64 %39, %38
store volatile i64 %40, i64* inttoptr (i64 1074771720 to i64*)
store i16 0, i16* %11
br label %41
41: ; preds = %35, %18
%42 = load i16, i16* %11
ret i16 %42
}

LLVM IR (-O2):
define zeroext i16 @IPCLiteMtoCClearBits(i64 %0, i64 %1, i64 %2, i16 zeroext %3, i64 %4) {
%6 = load volatile i64, i64* inttoptr (i64 1074771728 to i64*)
%7 = or i64 %4, %0
%8 = and i64 %6, %7
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %19
10: ; preds = %5
switch i16 %3, label %16 [
i16 1, label %11
i16 2, label %13
]
11: ; preds = %10
store volatile i64 3, i64* inttoptr (i64 1074771760 to i64*)
store volatile i64 %1, i64* inttoptr (i64 1074771764 to i64*)
%12 = and i64 %2, 65535
br label %14
13: ; preds = %10
store volatile i64 4, i64* inttoptr (i64 1074771760 to i64*)
store volatile i64 %1, i64* inttoptr (i64 1074771764 to i64*)
br label %14
14: ; preds = %11, %13
%15 = phi i64 [ %2, %13 ], [ %12, %11 ]
store volatile i64 %15, i64* inttoptr (i64 1074771768 to i64*)
br label %16
16: ; preds = %14, %10
%17 = load volatile i64, i64* inttoptr (i64 1074771720 to i64*)
%18 = or i64 %17, %7
store volatile i64 %18, i64* inttoptr (i64 1074771720 to i64*)
br label %19
19: ; preds = %5, %16
%20 = phi i16 [ 0, %16 ], [ 1, %5 ]
ret i16 %20
}