#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
int _TimerBaseValid(int);
void TimerControlWaitOnTrigger(uint32_t ui32Base, uint32_t ui32Timer,
                               bool bWait) {
  ASSERT(_TimerBaseValid(ui32Base));
  ASSERT((ui32Timer == 0x000000ff) || (ui32Timer == 0x0000ff00) ||
         (ui32Timer == 0x0000ffff));
  if ((ui32Timer & 0x000000ff) != 0) {
    if (bWait) {
      (*((volatile uint32_t *)(ui32Base + 0x00000004))) |= 0x00000040;
    } else {
      (*((volatile uint32_t *)(ui32Base + 0x00000004))) &= ~(0x00000040);
    }
  }
  if ((ui32Timer & 0x0000ff00) != 0) {
    if (bWait) {
      (*((volatile uint32_t *)(ui32Base + 0x00000008))) |= 0x00000040;
    } else {
      (*((volatile uint32_t *)(ui32Base + 0x00000008))) &= ~(0x00000040);
    }
  }
}


x86 assembly (clang, -O0):
<TimerControlWaitOnTrigger>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <_TimerBaseValid@plt>
mov    %eax,%edi
call   1030 <ASSERT@plt>
mov    $0x1,%al
cmpl   $0xff,-0x8(%rbp)
mov    %al,-0xd(%rbp)
je     1171 <TimerControlWaitOnTrigger+0x51>
mov    $0x1,%al
cmpl   $0xff00,-0x8(%rbp)
mov    %al,-0xd(%rbp)
je     1171 <TimerControlWaitOnTrigger+0x51>
cmpl   $0xffff,-0x8(%rbp)
sete   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%eax
and    $0xff,%eax
cmp    $0x0,%eax
je     11c1 <TimerControlWaitOnTrigger+0xa1>
cmpl   $0x0,-0xc(%rbp)
je     11ad <TimerControlWaitOnTrigger+0x8d>
mov    -0x4(%rbp),%eax
add    $0x4,%eax
cltq
mov    (%rax),%ecx
or     $0x40,%ecx
mov    %ecx,(%rax)
jmp    11bc <TimerControlWaitOnTrigger+0x9c>
mov    -0x4(%rbp),%eax
add    $0x4,%eax
cltq
mov    (%rax),%ecx
and    $0xffffffbf,%ecx
mov    %ecx,(%rax)
jmp    11c1 <TimerControlWaitOnTrigger+0xa1>
mov    -0x8(%rbp),%eax
and    $0xff00,%eax
cmp    $0x0,%eax
je     1204 <TimerControlWaitOnTrigger+0xe4>
cmpl   $0x0,-0xc(%rbp)
je     11f0 <TimerControlWaitOnTrigger+0xd0>
mov    -0x4(%rbp),%eax
add    $0x8,%eax
cltq
mov    (%rax),%ecx
or     $0x40,%ecx
mov    %ecx,(%rax)
jmp    11ff <TimerControlWaitOnTrigger+0xdf>
mov    -0x4(%rbp),%eax
add    $0x8,%eax
cltq
mov    (%rax),%ecx
and    $0xffffffbf,%ecx
mov    %ecx,(%rax)
jmp    1204 <TimerControlWaitOnTrigger+0xe4>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerControlWaitOnTrigger>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %edi,%ebx
call   1040 <_TimerBaseValid@plt>
mov    %eax,%edi
call   1030 <ASSERT@plt>
mov    $0x1,%edi
cmp    $0xff,%ebp
je     1158 <TimerControlWaitOnTrigger+0x38>
cmp    $0xff00,%ebp
je     1158 <TimerControlWaitOnTrigger+0x38>
xor    %edi,%edi
cmp    $0xffff,%ebp
sete   %dil
call   1030 <ASSERT@plt>
test   %bpl,%bpl
je     1173 <TimerControlWaitOnTrigger+0x53>
movslq %ebx,%rax
mov    0x4(%rax),%ecx
test   %r14d,%r14d
je     1189 <TimerControlWaitOnTrigger+0x69>
or     $0x40,%ecx
mov    %ecx,0x4(%rax)
test   $0xff00,%ebp
je     119e <TimerControlWaitOnTrigger+0x7e>
test   %r14d,%r14d
je     1197 <TimerControlWaitOnTrigger+0x77>
movslq %ebx,%rax
orl    $0x40,0x8(%rax)
jmp    119e <TimerControlWaitOnTrigger+0x7e>
and    $0xffffffbf,%ecx
mov    %ecx,0x4(%rax)
test   $0xff00,%ebp
je     119e <TimerControlWaitOnTrigger+0x7e>
movslq %ebx,%rax
andl   $0xffffffbf,0x8(%rax)
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @TimerControlWaitOnTrigger(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = call i32 @_TimerBaseValid(i32 %7)
%9 = call i32 @ASSERT(i32 %8)
%10 = load i32, i32* %5
%11 = icmp eq i32 %10, 255
br i1 %11, label %18, label %12
12: ; preds = %3
%13 = load i32, i32* %5
%14 = icmp eq i32 %13, 65280
br i1 %14, label %18, label %15
15: ; preds = %12
%16 = load i32, i32* %5
%17 = icmp eq i32 %16, 65535
br label %18
18: ; preds = %15, %12, %3
%19 = phi i1 [ true, %12 ], [ true, %3 ], [ %17, %15 ]
%20 = zext i1 %19 to i32
%21 = call i32 @ASSERT(i32 %20)
%22 = load i32, i32* %5
%23 = and i32 %22, 255
%24 = icmp ne i32 %23, 0
br i1 %24, label %25, label %43
25: ; preds = %18
%26 = load i32, i32* %6
%27 = icmp ne i32 %26, 0
br i1 %27, label %28, label %35
28: ; preds = %25
%29 = load i32, i32* %4
%30 = add nsw i32 %29, 4
%31 = sext i32 %30 to i64
%32 = inttoptr i64 %31 to i32*
%33 = load volatile i32, i32* %32
%34 = or i32 %33, 64
store volatile i32 %34, i32* %32
br label %42
35: ; preds = %25
%36 = load i32, i32* %4
%37 = add nsw i32 %36, 4
%38 = sext i32 %37 to i64
%39 = inttoptr i64 %38 to i32*
%40 = load volatile i32, i32* %39
%41 = and i32 %40, -65
store volatile i32 %41, i32* %39
br label %42
42: ; preds = %35, %28
br label %43
43: ; preds = %42, %18
%44 = load i32, i32* %5
%45 = and i32 %44, 65280
%46 = icmp ne i32 %45, 0
br i1 %46, label %47, label %65
47: ; preds = %43
%48 = load i32, i32* %6
%49 = icmp ne i32 %48, 0
br i1 %49, label %50, label %57
50: ; preds = %47
%51 = load i32, i32* %4
%52 = add nsw i32 %51, 8
%53 = sext i32 %52 to i64
%54 = inttoptr i64 %53 to i32*
%55 = load volatile i32, i32* %54
%56 = or i32 %55, 64
store volatile i32 %56, i32* %54
br label %64
57: ; preds = %47
%58 = load i32, i32* %4
%59 = add nsw i32 %58, 8
%60 = sext i32 %59 to i64
%61 = inttoptr i64 %60 to i32*
%62 = load volatile i32, i32* %61
%63 = and i32 %62, -65
store volatile i32 %63, i32* %61
br label %64
64: ; preds = %57, %50
br label %65
65: ; preds = %64, %43
ret void
}

LLVM IR (-O2):
define void @TimerControlWaitOnTrigger(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @_TimerBaseValid(i32 %0)
%5 = tail call i32 @ASSERT(i32 %4)
switch i32 %1, label %6 [
i32 65280, label %9
i32 255, label %9
]
6: ; preds = %3
%7 = icmp eq i32 %1, 65535
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %3, %3, %6
%10 = phi i32 [ 1, %3 ], [ %8, %6 ], [ 1, %3 ]
%11 = tail call i32 @ASSERT(i32 %10)
%12 = and i32 %1, 255
%13 = icmp eq i32 %12, 0
br i1 %13, label %22, label %14
14: ; preds = %9
%15 = icmp eq i32 %2, 0
%16 = add nsw i32 %0, 4
%17 = sext i32 %16 to i64
%18 = inttoptr i64 %17 to i32*
%19 = load volatile i32, i32* %18
br i1 %15, label %25, label %20
20: ; preds = %14
%21 = or i32 %19, 64
store volatile i32 %21, i32* %18
br label %22
22: ; preds = %20, %9
%23 = and i32 %1, 65280
%24 = icmp eq i32 %23, 0
br i1 %24, label %43, label %29
25: ; preds = %14
%26 = and i32 %19, -65
store volatile i32 %26, i32* %18
%27 = and i32 %1, 65280
%28 = icmp eq i32 %27, 0
br i1 %28, label %43, label %37
29: ; preds = %22
%30 = icmp eq i32 %2, 0
br i1 %30, label %37, label %31
31: ; preds = %29
%32 = add nsw i32 %0, 8
%33 = sext i32 %32 to i64
%34 = inttoptr i64 %33 to i32*
%35 = load volatile i32, i32* %34
%36 = or i32 %35, 64
store volatile i32 %36, i32* %34
br label %43
37: ; preds = %25, %29
%38 = add nsw i32 %0, 8
%39 = sext i32 %38 to i64
%40 = inttoptr i64 %39 to i32*
%41 = load volatile i32, i32* %40
%42 = and i32 %41, -65
store volatile i32 %42, i32* %40
br label %43
43: ; preds = %25, %31, %37, %22
ret void
}