void nand_addr(unsigned int addr) {
  unsigned int col = addr % 2048;
  unsigned int page = addr / 2048;
  volatile int i;
  (*(volatile unsigned char *)0x4E00000C) = col & 0xff;
  for (i = 0; i < 10; i++)
    ;
  (*(volatile unsigned char *)0x4E00000C) = (col >> 8) & 0xff;
  for (i = 0; i < 10; i++)
    ;
  (*(volatile unsigned char *)0x4E00000C) = page & 0xff;
  for (i = 0; i < 10; i++)
    ;
  (*(volatile unsigned char *)0x4E00000C) = (page >> 8) & 0xff;
  for (i = 0; i < 10; i++)
    ;
  (*(volatile unsigned char *)0x4E00000C) = (page >> 16) & 0xff;
  for (i = 0; i < 10; i++)
    ;
}


x86 assembly (clang, -O0):
<nand_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x7ff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0xb,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    $0x4e00000c,%eax
mov    %cl,(%rax)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    $0xa,%eax
jge    1152 <nand_addr+0x52>
jmp    1144 <nand_addr+0x44>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1133 <nand_addr+0x33>
mov    -0x8(%rbp),%eax
shr    $0x8,%eax
and    $0xff,%eax
mov    %al,%cl
mov    $0x4e00000c,%eax
mov    %cl,(%rax)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    $0xa,%eax
jge    118c <nand_addr+0x8c>
jmp    117e <nand_addr+0x7e>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    116d <nand_addr+0x6d>
mov    -0xc(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    $0x4e00000c,%eax
mov    %cl,(%rax)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    $0xa,%eax
jge    11c3 <nand_addr+0xc3>
jmp    11b5 <nand_addr+0xb5>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    11a4 <nand_addr+0xa4>
mov    -0xc(%rbp),%eax
shr    $0x8,%eax
and    $0xff,%eax
mov    %al,%cl
mov    $0x4e00000c,%eax
mov    %cl,(%rax)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    $0xa,%eax
jge    11fd <nand_addr+0xfd>
jmp    11ef <nand_addr+0xef>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    11de <nand_addr+0xde>
mov    -0xc(%rbp),%eax
shr    $0x10,%eax
and    $0xff,%eax
mov    %al,%cl
mov    $0x4e00000c,%eax
mov    %cl,(%rax)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    $0xa,%eax
jge    1237 <nand_addr+0x137>
jmp    1229 <nand_addr+0x129>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1218 <nand_addr+0x118>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nand_addr>:
mov    %dil,0x4e00000c
4e
movl   $0x0,-0x4(%rsp)
mov    -0x4(%rsp),%eax
cmp    $0x9,%eax
jg     112e <nand_addr+0x2e>
nopl   0x0(%rax)
addl   $0x1,-0x4(%rsp)
mov    -0x4(%rsp),%eax
cmp    $0xa,%eax
jl     1120 <nand_addr+0x20>
mov    %edi,%eax
shr    $0xb,%eax
mov    %edi,%ecx
shr    $0x8,%ecx
and    $0x7,%cl
mov    %cl,0x4e00000c
movl   $0x0,-0x4(%rsp)
mov    -0x4(%rsp),%ecx
cmp    $0x9,%ecx
jg     116e <nand_addr+0x6e>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
addl   $0x1,-0x4(%rsp)
mov    -0x4(%rsp),%ecx
cmp    $0xa,%ecx
jl     1160 <nand_addr+0x60>
mov    %al,0x4e00000c
movl   $0x0,-0x4(%rsp)
mov    -0x4(%rsp),%eax
cmp    $0x9,%eax
jg     119e <nand_addr+0x9e>
cs nopw 0x0(%rax,%rax,1)
addl   $0x1,-0x4(%rsp)
mov    -0x4(%rsp),%eax
cmp    $0xa,%eax
jl     1190 <nand_addr+0x90>
mov    %edi,%eax
shr    $0x13,%eax
mov    %al,0x4e00000c
movl   $0x0,-0x4(%rsp)
mov    -0x4(%rsp),%eax
cmp    $0x9,%eax
jg     11ce <nand_addr+0xce>
nopl   0x0(%rax,%rax,1)
addl   $0x1,-0x4(%rsp)
mov    -0x4(%rsp),%eax
cmp    $0xa,%eax
jl     11c0 <nand_addr+0xc0>
shr    $0x1b,%edi
mov    %dil,0x4e00000c
4e
movl   $0x0,-0x4(%rsp)
mov    -0x4(%rsp),%eax
cmp    $0x9,%eax
jg     11fe <nand_addr+0xfe>
nopw   0x0(%rax,%rax,1)
addl   $0x1,-0x4(%rsp)
mov    -0x4(%rsp),%eax
cmp    $0xa,%eax
jl     11f0 <nand_addr+0xf0>
ret

LLVM IR (-O0):
define void @nand_addr(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = urem i32 %6, 2048
store i32 %7, i32* %3
%8 = load i32, i32* %2
%9 = udiv i32 %8, 2048
store i32 %9, i32* %4
%10 = load i32, i32* %3
%11 = and i32 %10, 255
%12 = trunc i32 %11 to i8
store volatile i8 %12, i8* inttoptr (i64 1308622860 to i8*)
store volatile i32 0, i32* %5
br label %13
13: ; preds = %17, %1
%14 = load volatile i32, i32* %5
%15 = icmp slt i32 %14, 10
br i1 %15, label %16, label %20
16: ; preds = %13
br label %17
17: ; preds = %16
%18 = load volatile i32, i32* %5
%19 = add nsw i32 %18, 1
store volatile i32 %19, i32* %5
br label %13
20: ; preds = %13
%21 = load i32, i32* %3
%22 = lshr i32 %21, 8
%23 = and i32 %22, 255
%24 = trunc i32 %23 to i8
store volatile i8 %24, i8* inttoptr (i64 1308622860 to i8*)
store volatile i32 0, i32* %5
br label %25
25: ; preds = %29, %20
%26 = load volatile i32, i32* %5
%27 = icmp slt i32 %26, 10
br i1 %27, label %28, label %32
28: ; preds = %25
br label %29
29: ; preds = %28
%30 = load volatile i32, i32* %5
%31 = add nsw i32 %30, 1
store volatile i32 %31, i32* %5
br label %25
32: ; preds = %25
%33 = load i32, i32* %4
%34 = and i32 %33, 255
%35 = trunc i32 %34 to i8
store volatile i8 %35, i8* inttoptr (i64 1308622860 to i8*)
store volatile i32 0, i32* %5
br label %36
36: ; preds = %40, %32
%37 = load volatile i32, i32* %5
%38 = icmp slt i32 %37, 10
br i1 %38, label %39, label %43
39: ; preds = %36
br label %40
40: ; preds = %39
%41 = load volatile i32, i32* %5
%42 = add nsw i32 %41, 1
store volatile i32 %42, i32* %5
br label %36
43: ; preds = %36
%44 = load i32, i32* %4
%45 = lshr i32 %44, 8
%46 = and i32 %45, 255
%47 = trunc i32 %46 to i8
store volatile i8 %47, i8* inttoptr (i64 1308622860 to i8*)
store volatile i32 0, i32* %5
br label %48
48: ; preds = %52, %43
%49 = load volatile i32, i32* %5
%50 = icmp slt i32 %49, 10
br i1 %50, label %51, label %55
51: ; preds = %48
br label %52
52: ; preds = %51
%53 = load volatile i32, i32* %5
%54 = add nsw i32 %53, 1
store volatile i32 %54, i32* %5
br label %48
55: ; preds = %48
%56 = load i32, i32* %4
%57 = lshr i32 %56, 16
%58 = and i32 %57, 255
%59 = trunc i32 %58 to i8
store volatile i8 %59, i8* inttoptr (i64 1308622860 to i8*)
store volatile i32 0, i32* %5
br label %60
60: ; preds = %64, %55
%61 = load volatile i32, i32* %5
%62 = icmp slt i32 %61, 10
br i1 %62, label %63, label %67
63: ; preds = %60
br label %64
64: ; preds = %63
%65 = load volatile i32, i32* %5
%66 = add nsw i32 %65, 1
store volatile i32 %66, i32* %5
br label %60
67: ; preds = %60
ret void
}

LLVM IR (-O2):
define void @nand_addr(i32 %0) {
%2 = alloca i32
%3 = lshr i32 %0, 11
%4 = bitcast i32* %2 to i8*
%5 = trunc i32 %0 to i8
store volatile i8 %5, i8* inttoptr (i64 1308622860 to i8*)
store volatile i32 0, i32* %2
%6 = load volatile i32, i32* %2
%7 = icmp slt i32 %6, 10
br i1 %7, label %8, label %13
8: ; preds = %1, %8
%9 = load volatile i32, i32* %2
%10 = add nsw i32 %9, 1
store volatile i32 %10, i32* %2
%11 = load volatile i32, i32* %2
%12 = icmp slt i32 %11, 10
br i1 %12, label %8, label %13
13: ; preds = %8, %1
%14 = lshr i32 %0, 8
%15 = trunc i32 %14 to i8
%16 = and i8 %15, 7
store volatile i8 %16, i8* inttoptr (i64 1308622860 to i8*)
store volatile i32 0, i32* %2
%17 = load volatile i32, i32* %2
%18 = icmp slt i32 %17, 10
br i1 %18, label %19, label %24
19: ; preds = %13, %19
%20 = load volatile i32, i32* %2
%21 = add nsw i32 %20, 1
store volatile i32 %21, i32* %2
%22 = load volatile i32, i32* %2
%23 = icmp slt i32 %22, 10
br i1 %23, label %19, label %24
24: ; preds = %19, %13
%25 = trunc i32 %3 to i8
store volatile i8 %25, i8* inttoptr (i64 1308622860 to i8*)
store volatile i32 0, i32* %2
%26 = load volatile i32, i32* %2
%27 = icmp slt i32 %26, 10
br i1 %27, label %28, label %33
28: ; preds = %24, %28
%29 = load volatile i32, i32* %2
%30 = add nsw i32 %29, 1
store volatile i32 %30, i32* %2
%31 = load volatile i32, i32* %2
%32 = icmp slt i32 %31, 10
br i1 %32, label %28, label %33
33: ; preds = %28, %24
%34 = lshr i32 %0, 19
%35 = trunc i32 %34 to i8
store volatile i8 %35, i8* inttoptr (i64 1308622860 to i8*)
store volatile i32 0, i32* %2
%36 = load volatile i32, i32* %2
%37 = icmp slt i32 %36, 10
br i1 %37, label %38, label %43
38: ; preds = %33, %38
%39 = load volatile i32, i32* %2
%40 = add nsw i32 %39, 1
store volatile i32 %40, i32* %2
%41 = load volatile i32, i32* %2
%42 = icmp slt i32 %41, 10
br i1 %42, label %38, label %43
43: ; preds = %38, %33
%44 = lshr i32 %0, 27
%45 = trunc i32 %44 to i8
store volatile i8 %45, i8* inttoptr (i64 1308622860 to i8*)
store volatile i32 0, i32* %2
%46 = load volatile i32, i32* %2
%47 = icmp slt i32 %46, 10
br i1 %47, label %48, label %53
48: ; preds = %43, %48
%49 = load volatile i32, i32* %2
%50 = add nsw i32 %49, 1
store volatile i32 %50, i32* %2
%51 = load volatile i32, i32* %2
%52 = icmp slt i32 %51, 10
br i1 %52, label %48, label %53
53: ; preds = %48, %43
ret void
}