#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned short sio_read_reg(int);
int /*<<< orphan*/ sio_set_index_data_reg();
int /*<<< orphan*/ sio_write_reg(int, unsigned char);
unsigned short acc_i2c_set_base_address(unsigned char busnum, short adr) {
  unsigned short ab_base_addr;
  if (!sio_set_index_data_reg())
    return (0);
  if (busnum == 1)
    sio_write_reg(0x7, 0x5);
  if (busnum == 2)
    sio_write_reg(0x7, 0x6);
  if (adr == -1) {
    ab_base_addr = sio_read_reg(0x60);
    ab_base_addr = ab_base_addr << 8;
    ab_base_addr |= sio_read_reg(0x61);
    if (ab_base_addr != 0)
      return ab_base_addr;
    else
      adr = (busnum == 1 ? 0x810 : 0x820);
  }
  sio_write_reg(0x61, (unsigned char)(adr & 0xFF));
  sio_write_reg(0x60, (unsigned char)(adr >> 8));
  return adr;
}


x86 assembly (clang, -O0):
<acc_i2c_set_base_address>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %dil,%cl
mov    %cl,-0x3(%rbp)
mov    %ax,-0x6(%rbp)
mov    $0x0,%al
call   1050 <sio_set_index_data_reg@plt>
cmp    $0x0,%eax
jne    1160 <acc_i2c_set_base_address+0x30>
movw   $0x0,-0x2(%rbp)
jmp    123e <acc_i2c_set_base_address+0x10e>
movzbl -0x3(%rbp),%eax
cmp    $0x1,%eax
jne    117c <acc_i2c_set_base_address+0x4c>
mov    $0x7,%edi
mov    $0x5,%esi
call   1030 <sio_write_reg@plt>
movzbl -0x3(%rbp),%eax
cmp    $0x2,%eax
jne    1198 <acc_i2c_set_base_address+0x68>
mov    $0x7,%edi
mov    $0x6,%esi
call   1030 <sio_write_reg@plt>
movswl -0x6(%rbp),%eax
cmp    $0xffffffff,%eax
jne    120c <acc_i2c_set_base_address+0xdc>
mov    $0x60,%edi
call   1040 <sio_read_reg@plt>
mov    %ax,-0x8(%rbp)
movzwl -0x8(%rbp),%eax
shl    $0x8,%eax
mov    %ax,-0x8(%rbp)
mov    $0x61,%edi
call   1040 <sio_read_reg@plt>
movzwl %ax,%ecx
movzwl -0x8(%rbp),%eax
or     %ecx,%eax
mov    %ax,-0x8(%rbp)
movzwl -0x8(%rbp),%eax
cmp    $0x0,%eax
je     11ef <acc_i2c_set_base_address+0xbf>
mov    -0x8(%rbp),%ax
mov    %ax,-0x2(%rbp)
jmp    123e <acc_i2c_set_base_address+0x10e>
movzbl -0x3(%rbp),%edx
mov    $0x820,%eax
mov    $0x810,%ecx
cmp    $0x1,%edx
cmove  %ecx,%eax
mov    %ax,-0x6(%rbp)
jmp    120c <acc_i2c_set_base_address+0xdc>
movswl -0x6(%rbp),%eax
and    $0xff,%eax
mov    $0x61,%edi
movzbl %al,%esi
call   1030 <sio_write_reg@plt>
movswl -0x6(%rbp),%eax
sar    $0x8,%eax
mov    $0x60,%edi
movzbl %al,%esi
call   1030 <sio_write_reg@plt>
mov    -0x6(%rbp),%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acc_i2c_set_base_address>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebx
mov    %edi,%r14d
xor    %eax,%eax
call   1050 <sio_set_index_data_reg@plt>
test   %eax,%eax
je     1189 <acc_i2c_set_base_address+0x59>
mov    $0x5,%al
cmp    $0x1,%r14b
je     1154 <acc_i2c_set_base_address+0x24>
mov    $0x6,%al
cmp    $0x2,%r14b
jne    1161 <acc_i2c_set_base_address+0x31>
movzbl %al,%esi
mov    $0x7,%edi
call   1030 <sio_write_reg@plt>
cmp    $0xffff,%bx
je     118d <acc_i2c_set_base_address+0x5d>
movzwl %bx,%ebp
movzbl %bpl,%esi
mov    $0x61,%edi
call   1030 <sio_write_reg@plt>
shr    $0x8,%ebp
mov    $0x60,%edi
mov    %ebp,%esi
call   1030 <sio_write_reg@plt>
jmp    11ad <acc_i2c_set_base_address+0x7d>
xor    %ebx,%ebx
jmp    11ad <acc_i2c_set_base_address+0x7d>
mov    $0x60,%edi
call   1040 <sio_read_reg@plt>
mov    %eax,%ebp
shl    $0x8,%ebp
mov    $0x61,%edi
call   1040 <sio_read_reg@plt>
mov    %eax,%ebx
or     %bp,%bx
je     11b4 <acc_i2c_set_base_address+0x84>
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret
xor    %ebx,%ebx
cmp    $0x1,%r14b
setne  %bl
shl    $0x4,%ebx
add    $0x810,%ebx
jmp    1167 <acc_i2c_set_base_address+0x37>

LLVM IR (-O0):
define zeroext i16 @acc_i2c_set_base_address(i8 zeroext %0, i16 signext %1) {
%3 = alloca i16
%4 = alloca i8
%5 = alloca i16
%6 = alloca i16
store i8 %0, i8* %4
store i16 %1, i16* %5
%7 = call i32 (...) @sio_set_index_data_reg()
%8 = icmp ne i32 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %2
store i16 0, i16* %3
br label %63
10: ; preds = %2
%11 = load i8, i8* %4
%12 = zext i8 %11 to i32
%13 = icmp eq i32 %12, 1
br i1 %13, label %14, label %16
14: ; preds = %10
%15 = call i32 @sio_write_reg(i32 7, i8 zeroext 5)
br label %16
16: ; preds = %14, %10
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = icmp eq i32 %18, 2
br i1 %19, label %20, label %22
20: ; preds = %16
%21 = call i32 @sio_write_reg(i32 7, i8 zeroext 6)
br label %22
22: ; preds = %20, %16
%23 = load i16, i16* %5
%24 = sext i16 %23 to i32
%25 = icmp eq i32 %24, -1
br i1 %25, label %26, label %51
26: ; preds = %22
%27 = call zeroext i16 @sio_read_reg(i32 96)
store i16 %27, i16* %6
%28 = load i16, i16* %6
%29 = zext i16 %28 to i32
%30 = shl i32 %29, 8
%31 = trunc i32 %30 to i16
store i16 %31, i16* %6
%32 = call zeroext i16 @sio_read_reg(i32 97)
%33 = zext i16 %32 to i32
%34 = load i16, i16* %6
%35 = zext i16 %34 to i32
%36 = or i32 %35, %33
%37 = trunc i32 %36 to i16
store i16 %37, i16* %6
%38 = load i16, i16* %6
%39 = zext i16 %38 to i32
%40 = icmp ne i32 %39, 0
br i1 %40, label %41, label %43
41: ; preds = %26
%42 = load i16, i16* %6
store i16 %42, i16* %3
br label %63
43: ; preds = %26
%44 = load i8, i8* %4
%45 = zext i8 %44 to i32
%46 = icmp eq i32 %45, 1
%47 = zext i1 %46 to i64
%48 = select i1 %46, i32 2064, i32 2080
%49 = trunc i32 %48 to i16
store i16 %49, i16* %5
br label %50
50: ; preds = %43
br label %51
51: ; preds = %50, %22
%52 = load i16, i16* %5
%53 = sext i16 %52 to i32
%54 = and i32 %53, 255
%55 = trunc i32 %54 to i8
%56 = call i32 @sio_write_reg(i32 97, i8 zeroext %55)
%57 = load i16, i16* %5
%58 = sext i16 %57 to i32
%59 = ashr i32 %58, 8
%60 = trunc i32 %59 to i8
%61 = call i32 @sio_write_reg(i32 96, i8 zeroext %60)
%62 = load i16, i16* %5
store i16 %62, i16* %3
br label %63
63: ; preds = %51, %41, %9
%64 = load i16, i16* %3
ret i16 %64
}

LLVM IR (-O2):
define zeroext i16 @acc_i2c_set_base_address(i8 zeroext %0, i16 signext %1) {
%3 = tail call i32 (...) @sio_set_index_data_reg()
%4 = icmp eq i32 %3, 0
br i1 %4, label %29, label %5
5: ; preds = %2
%6 = icmp eq i8 %0, 1
br i1 %6, label %9, label %7
7: ; preds = %5
%8 = icmp eq i8 %0, 2
br i1 %8, label %9, label %12
9: ; preds = %7, %5
%10 = phi i8 [ 5, %5 ], [ 6, %7 ]
%11 = tail call i32 @sio_write_reg(i32 7, i8 zeroext %10)
br label %12
12: ; preds = %9, %7
%13 = icmp eq i16 %1, -1
br i1 %13, label %14, label %22
14: ; preds = %12
%15 = tail call zeroext i16 @sio_read_reg(i32 96)
%16 = shl i16 %15, 8
%17 = tail call zeroext i16 @sio_read_reg(i32 97)
%18 = or i16 %16, %17
%19 = icmp eq i16 %18, 0
br i1 %19, label %20, label %29
20: ; preds = %14
%21 = select i1 %6, i16 2064, i16 2080
br label %22
22: ; preds = %20, %12
%23 = phi i16 [ %21, %20 ], [ %1, %12 ]
%24 = trunc i16 %23 to i8
%25 = tail call i32 @sio_write_reg(i32 97, i8 zeroext %24)
%26 = lshr i16 %23, 8
%27 = trunc i16 %26 to i8
%28 = tail call i32 @sio_write_reg(i32 96, i8 zeroext %27)
br label %29
29: ; preds = %14, %2, %22
%30 = phi i16 [ %23, %22 ], [ 0, %2 ], [ %18, %14 ]
ret i16 %30
}