xunge/DecIR huggingface dataset:
float interpolate(float v0, float v1, float t) { return (1 - t) * v0 + t * v1; }


x86 assembly (clang, -O0):
<interpolate>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  0xee5(%rip),%xmm0
subss  -0xc(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
movss  -0xc(%rbp),%xmm1
mulss  -0x8(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<interpolate>:
movss  0xef8(%rip),%xmm3
subss  %xmm2,%xmm3
mulss  %xmm2,%xmm1
mulss  %xmm3,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @interpolate(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %6
%8 = fsub float 1.000000e+00, %7
%9 = load float, float* %4
%10 = load float, float* %6
%11 = load float, float* %5
%12 = fmul float %10, %11
%13 = call float @llvm.fmuladd.f32(float %8, float %9, float %12)
ret float %13
}

LLVM IR (-O2):
define float @interpolate(float %0, float %1, float %2) {
%4 = fsub float 1.000000e+00, %2
%5 = fmul float %1, %2
%6 = tail call float @llvm.fmuladd.f32(float %4, float %0, float %5)
ret float %6
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M304_f(char *s) {
  debug("M304_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M304_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M304_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M304_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M304_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M304_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M304_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
double smooth(double x) { return 3 * x * x - 2 * x * x * x; }


x86 assembly (clang, -O0):
<smooth>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm2
movsd  0xedd(%rip),%xmm1
mulsd  -0x8(%rbp),%xmm1
mulsd  -0x8(%rbp),%xmm1
mulsd  -0x8(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<smooth>:
movsd  0xef8(%rip),%xmm1
mulsd  %xmm0,%xmm1
movsd  0xef4(%rip),%xmm2
mulsd  %xmm0,%xmm2
mulsd  %xmm0,%xmm2
mulsd  %xmm0,%xmm2
mulsd  %xmm1,%xmm0
addsd  %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @smooth(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double 3.000000e+00, %3
%5 = load double, double* %2
%6 = load double, double* %2
%7 = fmul double 2.000000e+00, %6
%8 = load double, double* %2
%9 = fmul double %7, %8
%10 = load double, double* %2
%11 = fmul double %9, %10
%12 = fneg double %11
%13 = call double @llvm.fmuladd.f64(double %4, double %5, double %12)
ret double %13
}

LLVM IR (-O2):
define double @smooth(double %0) {
%2 = fmul double %0, 3.000000e+00
%3 = fmul double %0, -2.000000e+00
%4 = fmul double %3, %0
%5 = fmul double %4, %0
%6 = tail call double @llvm.fmuladd.f64(double %2, double %0, double %5)
ret double %6
}
int testInlineRet(int arg) { return arg + arg; }


x86 assembly (clang, -O0):
<testInlineRet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<testInlineRet>:
lea    (%rdi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @testInlineRet(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = add nsw i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @testInlineRet(i32 %0) {
%2 = shl nsw i32 %0, 1
ret i32 %2
}
void __attribute__((destructor)) __do_global_dtors_aux(void) {}


x86 assembly (clang, -O0):
<__do_global_dtors_aux>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__do_global_dtors_aux>:
ret

LLVM IR (-O0):
@llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__do_global_dtors_aux, i8* null }]
define void @__do_global_dtors_aux() {
ret void
}

LLVM IR (-O2):
@llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__do_global_dtors_aux, i8* null }]
define void @__do_global_dtors_aux() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clear_buffer();
int /*<<< orphan*/ printf(char *, char const *);
void pause(const char *msg) {
  printf("%s", msg);
  clear_buffer();
}


x86 assembly (clang, -O0):
<pause>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <clear_buffer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pause>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <clear_buffer@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @pause(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 (...) @clear_buffer()
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @pause(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 (...) @clear_buffer()
ret void
}
/* Type definitions */
struct splay {
  int dummy;
};

/* Variables and functions */
void const *sp_find(struct splay *, void const *);
const void *sp_access(struct splay *self, const void *key) {
  return sp_find(self, key);
}


x86 assembly (clang, -O0):
<sp_access>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <sp_find@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sp_access>:
jmp    1030 <sp_find@plt>

LLVM IR (-O0):
%struct.splay = type { i32 }
define i8* @sp_access(%struct.splay* %0, i8* %1) {
%3 = alloca %struct.splay*
%4 = alloca i8*
store %struct.splay* %0, %struct.splay** %3
store i8* %1, i8** %4
%5 = load %struct.splay*, %struct.splay** %3
%6 = load i8*, i8** %4
%7 = call i8* @sp_find(%struct.splay* %5, i8* %6)
ret i8* %7
}

LLVM IR (-O2):
%struct.splay = type { i32 }
define i8* @sp_access(%struct.splay* %0, i8* %1) {
%3 = tail call i8* @sp_find(%struct.splay* %0, i8* %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ local_mcu_Pin1_set__E();
void pollen_parts_Led1_on__E() {
  { local_mcu_Pin1_set__E(); }
}


x86 assembly (clang, -O0):
<pollen_parts_Led1_on__E>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <local_mcu_Pin1_set__E@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pollen_parts_Led1_on__E>:
xor    %eax,%eax
jmp    1030 <local_mcu_Pin1_set__E@plt>

LLVM IR (-O0):
define void @pollen_parts_Led1_on__E() {
%1 = call i32 (...) @local_mcu_Pin1_set__E()
ret void
}

LLVM IR (-O2):
define void @pollen_parts_Led1_on__E() {
%1 = tail call i32 (...) @local_mcu_Pin1_set__E()
ret void
}
/* Type definitions */
typedef int uintmax_t;

/* Variables and functions */
char const *fmt_human(int, int);
int pscanf(char *, char *, int *);
const char *cpu_freq(void) {
  uintmax_t freq;
  if (pscanf("/sys/devices/system/cpu/cpu0/cpufreq/"
             "scaling_cur_freq",
             "%ju", &freq) != 1) {
    return NULL;
  }
  return fmt_human(freq * 1000, 1000);
}


x86 assembly (clang, -O0):
<cpu_freq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
lea    0xf00(%rip),%rsi
lea    -0xc(%rbp),%rdx
call   1030 <pscanf@plt>
cmp    $0x1,%eax
je     1155 <cpu_freq+0x35>
movq   $0x0,-0x8(%rbp)
jmp    116a <cpu_freq+0x4a>
imul   $0x3e8,-0xc(%rbp),%edi
mov    $0x3e8,%esi
call   1040 <fmt_human@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_freq>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xf07(%rip),%rsi
lea    0x4(%rsp),%rdx
call   1030 <pscanf@plt>
cmp    $0x1,%eax
jne    1152 <cpu_freq+0x32>
imul   $0x3e8,0x4(%rsp),%edi
mov    $0x3e8,%esi
call   1040 <fmt_human@plt>
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [54 x i8] c"/sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq\00"
@.str.1 = [4 x i8] c"%ju\00"
define i8* @cpu_freq() {
%1 = alloca i8*
%2 = alloca i32
%3 = call i32 @pscanf(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%4 = icmp ne i32 %3, 1
br i1 %4, label %5, label %6
5: ; preds = %0
store i8* null, i8** %1
br label %10
6: ; preds = %0
%7 = load i32, i32* %2
%8 = mul nsw i32 %7, 1000
%9 = call i8* @fmt_human(i32 %8, i32 1000)
store i8* %9, i8** %1
br label %10
10: ; preds = %6, %5
%11 = load i8*, i8** %1
ret i8* %11
}

LLVM IR (-O2):
@.str = [54 x i8] c"/sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq\00"
@.str.1 = [4 x i8] c"%ju\00"
define i8* @cpu_freq() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @pscanf(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%4 = icmp eq i32 %3, 1
br i1 %4, label %5, label %9
5: ; preds = %0
%6 = load i32, i32* %1
%7 = mul nsw i32 %6, 1000
%8 = call i8* @fmt_human(i32 %7, i32 1000)
br label %9
9: ; preds = %0, %5
%10 = phi i8* [ %8, %5 ], [ null, %0 ]
ret i8* %10
}
/* Type definitions */
struct statx {
  int dummy;
};
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ syscall(int, int, char const *, unsigned int, unsigned int,
                           struct statx *);
ssize_t missing_statx(int dfd, const char *filename, unsigned flags,
                      unsigned int mask, struct statx *buffer) {
  return syscall(332, dfd, filename, flags, mask, buffer);
}


x86 assembly (clang, -O0):
<missing_statx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
mov    -0x20(%rbp),%r9
mov    $0x14c,%edi
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<missing_statx>:
mov    %r8,%r9
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0x14c,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.statx = type { i32 }
define i32 @missing_statx(i32 %0, i8* %1, i32 %2, i32 %3, %struct.statx* %4) {
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
%10 = alloca %struct.statx*
store i32 %0, i32* %6
store i8* %1, i8** %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store %struct.statx* %4, %struct.statx** %10
%11 = load i32, i32* %6
%12 = load i8*, i8** %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load %struct.statx*, %struct.statx** %10
%16 = call i32 @syscall(i32 332, i32 %11, i8* %12, i32 %13, i32 %14, %struct.statx* %15)
ret i32 %16
}

LLVM IR (-O2):
%struct.statx = type { i32 }
define i32 @missing_statx(i32 %0, i8* %1, i32 %2, i32 %3, %struct.statx* %4) {
%6 = tail call i32 @syscall(i32 332, i32 %0, i8* %1, i32 %2, i32 %3, %struct.statx* %4)
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
size_t write_FP_BE(int /*<<< orphan*/ *, double const *, int);
size_t float64WriteToFP(FILE *fp, const double *data) {
  return write_FP_BE(fp, data, sizeof(double));
}


x86 assembly (clang, -O0):
<float64WriteToFP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x8,%edx
call   1030 <write_FP_BE@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<float64WriteToFP>:
mov    $0x8,%edx
jmp    1030 <write_FP_BE@plt>

LLVM IR (-O0):
define i64 @float64WriteToFP(i32* %0, double* %1) {
%3 = alloca i32*
%4 = alloca double*
store i32* %0, i32** %3
store double* %1, double** %4
%5 = load i32*, i32** %3
%6 = load double*, double** %4
%7 = call i64 @write_FP_BE(i32* %5, double* %6, i32 8)
ret i64 %7
}

LLVM IR (-O2):
define i64 @float64WriteToFP(i32* %0, double* %1) {
%3 = tail call i64 @write_FP_BE(i32* %0, double* %1, i32 8)
ret i64 %3
}
__attribute__((visibility("default"))) int libtest_main() { return 0; }


x86 assembly (clang, -O0):
<libtest_main>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<libtest_main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @libtest_main() {
ret i32 0
}

LLVM IR (-O2):
define i32 @libtest_main() {
ret i32 0
}
void rotate_point3d_quat(struct vector3d *p0, struct quat *qr,
                         struct vector3d *pr) {}


x86 assembly (clang, -O0):
<rotate_point3d_quat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotate_point3d_quat>:
ret

LLVM IR (-O0):
%struct.quat = type opaque
%struct.vector3d = type opaque
define void @rotate_point3d_quat(%struct.vector3d* %0, %struct.quat* %1, %struct.vector3d* %2) {
%4 = alloca %struct.vector3d*
%5 = alloca %struct.quat*
%6 = alloca %struct.vector3d*
store %struct.vector3d* %0, %struct.vector3d** %4
store %struct.quat* %1, %struct.quat** %5
store %struct.vector3d* %2, %struct.vector3d** %6
ret void
}

LLVM IR (-O2):
%struct.quat = type opaque
%struct.vector3d = type opaque
define void @rotate_point3d_quat(%struct.vector3d* nocapture %0, %struct.quat* nocapture %1, %struct.vector3d* nocapture %2) {
ret void
}
/* Type definitions */
struct vec3 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ vec3_min(float *, float *, float *);
__attribute__((always_)) struct vec3 *
psvec3_min(struct vec3 *result, struct vec3 *a, struct vec3 *b) {
  vec3_min((float *)result, (float *)a, (float *)b);
  return result;
}


x86 assembly (clang, -O0):
<psvec3_min>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <vec3_min@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec3_min>:
push   %rbx
mov    %rdi,%rbx
call   1030 <vec3_min@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vec3 = type { i32 }
define %struct.vec3* @psvec3_min(%struct.vec3* %0, %struct.vec3* %1, %struct.vec3* %2) {
%4 = alloca %struct.vec3*
%5 = alloca %struct.vec3*
%6 = alloca %struct.vec3*
store %struct.vec3* %0, %struct.vec3** %4
store %struct.vec3* %1, %struct.vec3** %5
store %struct.vec3* %2, %struct.vec3** %6
%7 = load %struct.vec3*, %struct.vec3** %4
%8 = bitcast %struct.vec3* %7 to float*
%9 = load %struct.vec3*, %struct.vec3** %5
%10 = bitcast %struct.vec3* %9 to float*
%11 = load %struct.vec3*, %struct.vec3** %6
%12 = bitcast %struct.vec3* %11 to float*
%13 = call i32 @vec3_min(float* %8, float* %10, float* %12)
%14 = load %struct.vec3*, %struct.vec3** %4
ret %struct.vec3* %14
}

LLVM IR (-O2):
%struct.vec3 = type { i32 }
define %struct.vec3* @psvec3_min(%struct.vec3* returned %0, %struct.vec3* %1, %struct.vec3* %2) {
%4 = bitcast %struct.vec3* %0 to float*
%5 = bitcast %struct.vec3* %1 to float*
%6 = bitcast %struct.vec3* %2 to float*
%7 = tail call i32 @vec3_min(float* %4, float* %5, float* %6)
ret %struct.vec3* %0
}
void __attribute__((weak)) func(void) {}


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
ret

LLVM IR (-O0):
define weak void @func() {
ret void
}

LLVM IR (-O2):
define weak void @func() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isgraph(int);
void t_isgraph_0xbd() {
  Assert_real((isgraph(189) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              950, ("isgraph should be 0 for 0xbd"));
}


x86 assembly (clang, -O0):
<t_isgraph_0xbd>:
push   %rbp
mov    %rsp,%rbp
mov    $0xbd,%edi
call   1040 <isgraph@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3b6,%edx
lea    0xf5b(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0xbd>:
push   %rax
mov    $0xbd,%edi
call   1040 <isgraph@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3b6,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0xbd\00"
define void @t_isgraph_0xbd() {
%1 = call i64 @isgraph(i32 189)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 950, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0xbd\00"
define void @t_isgraph_0xbd() {
%1 = tail call i64 @isgraph(i32 189)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 950, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef scalar_t__ darray;

/* Variables and functions */
int /*<<< orphan*/ free(int *);
void darray_free(void *darray) {
  if (darray != NULL) {
    free(((int *)(darray)-2));
  }
}


x86 assembly (clang, -O0):
<darray_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1134 <darray_free+0x24>
mov    -0x8(%rbp),%rdi
add    $0xfffffffffffffff8,%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<darray_free>:
test   %rdi,%rdi
je     111e <darray_free+0xe>
add    $0xfffffffffffffff8,%rdi
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @darray_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = bitcast i8* %6 to i32*
%8 = getelementptr inbounds i32, i32* %7, i64 -2
%9 = call i32 @free(i32* %8)
br label %10
10: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @darray_free(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = getelementptr inbounds i8, i8* %0, i64 -8
%5 = bitcast i8* %4 to i32*
%6 = tail call i32 @free(i32* %5)
br label %7
7: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int, int);
void color(int foreground, int background) {
  int type = 22;
  if (foreground > 7) {
    type = 1;
    foreground -= 8;
  }
  printf("%c[%d;%d;%dm", 0x1B, type, foreground + 30, background + 40);
}


x86 assembly (clang, -O0):
<color>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x16,-0xc(%rbp)
cmpl   $0x7,-0x4(%rbp)
jle    113f <color+0x2f>
movl   $0x1,-0xc(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x8,%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%edx
mov    -0x4(%rbp),%ecx
add    $0x1e,%ecx
mov    -0x8(%rbp),%r8d
add    $0x28,%r8d
lea    0xea9(%rip),%rdi
mov    $0x1b,%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<color>:
lea    -0x8(%rdi),%ecx
cmp    $0x8,%edi
cmovl  %edi,%ecx
mov    $0x1,%eax
mov    $0x16,%edx
cmovge %eax,%edx
add    $0x1e,%ecx
lea    0x28(%rsi),%r8d
lea    0xecc(%rip),%rdi
mov    $0x1b,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"%c[%d;%d;%dm\00"
define void @color(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 22, i32* %5
%6 = load i32, i32* %3
%7 = icmp sgt i32 %6, 7
br i1 %7, label %8, label %11
8: ; preds = %2
store i32 1, i32* %5
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 8
store i32 %10, i32* %3
br label %11
11: ; preds = %8, %2
%12 = load i32, i32* %5
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 30
%15 = load i32, i32* %4
%16 = add nsw i32 %15, 40
%17 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 27, i32 %12, i32 %14, i32 %16)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"%c[%d;%d;%dm\00"
define void @color(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, 7
%4 = add nsw i32 %0, -8
%5 = select i1 %3, i32 %4, i32 %0
%6 = select i1 %3, i32 1, i32 22
%7 = add nsw i32 %5, 30
%8 = add nsw i32 %1, 40
%9 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 27, i32 %6, i32 %7, i32 %8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char const *);
void err_sys(const char *function) {
  perror(function);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<err_sys>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    0x2ea4(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<err_sys>:
push   %rax
call   1030 <perror@plt>
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
define void @err_sys(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = load i32, i32* @EXIT_FAILURE
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
define void @err_sys(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = load i32, i32* @EXIT_FAILURE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printArgs(int, char **);
int main(int argc, char *argv[]) {
  printArgs(argc, argv);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <printArgs@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <printArgs@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @printArgs(i32 %6, i8** %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @printArgs(i32 %0, i8** %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int rem = 0;
  rem = 3 % 8;
  printf("%d \n", rem);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x3,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x3,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%d \0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 3, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"%d \0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 3)
ret i32 0
}
void copy(char b[], int beg, char t[]) {
  int i;
  for (i = beg; b[i] != '\n'; i++)
    t[i - beg] = b[i];
}


x86 assembly (clang, -O0):
<copy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0xa,%eax
je     1153 <copy+0x53>
mov    -0x8(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x18(%rbp),%rax
mov    -0x1c(%rbp),%ecx
sub    -0xc(%rbp),%ecx
movslq %ecx,%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1115 <copy+0x15>
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy>:
movslq %esi,%rcx
mov    (%rdi,%rcx,1),%al
cmp    $0xa,%al
je     112f <copy+0x2f>
add    %rdi,%rcx
add    $0x1,%rcx
xor    %esi,%esi
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %al,(%rdx,%rsi,1)
movzbl (%rcx,%rsi,1),%eax
add    $0x1,%rsi
cmp    $0xa,%al
jne    1120 <copy+0x20>
ret

LLVM IR (-O0):
define void @copy(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%8 = load i32, i32* %5
store i32 %8, i32* %7
br label %9
9: ; preds = %29, %3
%10 = load i8*, i8** %4
%11 = load i32, i32* %7
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 10
br i1 %16, label %17, label %32
17: ; preds = %9
%18 = load i8*, i8** %4
%19 = load i32, i32* %7
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
%22 = load i8, i8* %21
%23 = load i8*, i8** %6
%24 = load i32, i32* %7
%25 = load i32, i32* %5
%26 = sub nsw i32 %24, %25
%27 = sext i32 %26 to i64
%28 = getelementptr inbounds i8, i8* %23, i64 %27
store i8 %22, i8* %28
br label %29
29: ; preds = %17
%30 = load i32, i32* %7
%31 = add nsw i32 %30, 1
store i32 %31, i32* %7
br label %9
32: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @copy(i8* nocapture %0, i32 %1, i8* nocapture writeonly %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 10
br i1 %7, label %17, label %8
8: ; preds = %3, %8
%9 = phi i64 [ %13, %8 ], [ %4, %3 ]
%10 = phi i8 [ %15, %8 ], [ %6, %3 ]
%11 = sub nsw i64 %9, %4
%12 = getelementptr inbounds i8, i8* %2, i64 %11
store i8 %10, i8* %12
%13 = add i64 %9, 1
%14 = getelementptr inbounds i8, i8* %0, i64 %13
%15 = load i8, i8* %14
%16 = icmp eq i8 %15, 10
br i1 %16, label %17, label %8
17: ; preds = %8, %3
ret void
}
int caesar(char c) {
  int cae;
  if (c > 30) {
    c = c - 30;
    cae = (int)c;
    return cae;
  } else if (c == '\n') {
    return 0;
  } else if (c == '\011') {
    return 1;
  } else {
    return -1;
  }
}


x86 assembly (clang, -O0):
<caesar>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x1e,%eax
jle    1133 <caesar+0x33>
movsbl -0x5(%rbp),%eax
sub    $0x1e,%eax
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    116c <caesar+0x6c>
movsbl -0x5(%rbp),%eax
cmp    $0xa,%eax
jne    114c <caesar+0x4c>
movl   $0x0,-0x4(%rbp)
jmp    116c <caesar+0x6c>
movsbl -0x5(%rbp),%eax
cmp    $0x9,%eax
jne    1165 <caesar+0x65>
movl   $0x1,-0x4(%rbp)
jmp    116c <caesar+0x6c>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<caesar>:
cmp    $0x1f,%dil
jl     110f <caesar+0xf>
add    $0xe2,%dil
movzbl %dil,%eax
ret
xor    %eax,%eax
cmp    $0x9,%dil
sete   %al
lea    (%rax,%rax,1),%ecx
add    $0xffffffff,%ecx
xor    %eax,%eax
cmp    $0xa,%dil
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @caesar(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
%7 = icmp sgt i32 %6, 30
br i1 %7, label %8, label %16
8: ; preds = %1
%9 = load i8, i8* %3
%10 = sext i8 %9 to i32
%11 = sub nsw i32 %10, 30
%12 = trunc i32 %11 to i8
store i8 %12, i8* %3
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
store i32 %14, i32* %4
%15 = load i32, i32* %4
store i32 %15, i32* %2
br label %27
16: ; preds = %1
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 10
br i1 %19, label %20, label %21
20: ; preds = %16
store i32 0, i32* %2
br label %27
21: ; preds = %16
%22 = load i8, i8* %3
%23 = sext i8 %22 to i32
%24 = icmp eq i32 %23, 9
br i1 %24, label %25, label %26
25: ; preds = %21
store i32 1, i32* %2
br label %27
26: ; preds = %21
store i32 -1, i32* %2
br label %27
27: ; preds = %26, %25, %20, %8
%28 = load i32, i32* %2
ret i32 %28
}

LLVM IR (-O2):
define i32 @caesar(i8 signext %0) {
%2 = icmp sgt i8 %0, 30
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = add nsw i8 %0, -30
%5 = zext i8 %4 to i32
br label %11
6: ; preds = %1
%7 = icmp eq i8 %0, 9
%8 = select i1 %7, i32 1, i32 -1
%9 = icmp eq i8 %0, 10
%10 = select i1 %9, i32 0, i32 %8
br label %11
11: ; preds = %6, %3
%12 = phi i32 [ %5, %3 ], [ %10, %6 ]
ret i32 %12
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int realtek_mst_i2c_spi_read_register(int, int, int *);
int realtek_mst_i2c_spi_write_register(int, int, int);
int realtek_mst_i2c_spi_reset_mpu(int fd) {
  int ret = 0;
  uint8_t val = 0;
  ret |= realtek_mst_i2c_spi_read_register(fd, 0xEE, &val);
  ret |= realtek_mst_i2c_spi_write_register(fd, 0xEE, (val & 0xFD) | 0x02);
  return ret;
}


x86 assembly (clang, -O0):
<realtek_mst_i2c_spi_reset_mpu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xee,%esi
lea    -0xc(%rbp),%rdx
call   1030 <realtek_mst_i2c_spi_read_register@plt>
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%edx
and    $0xfd,%edx
or     $0x2,%edx
mov    $0xee,%esi
call   1040 <realtek_mst_i2c_spi_write_register@plt>
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<realtek_mst_i2c_spi_reset_mpu>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rdx
mov    $0xee,%esi
call   1030 <realtek_mst_i2c_spi_read_register@plt>
mov    %eax,%ebp
movzbl 0x4(%rsp),%edx
or     $0x2,%edx
mov    %ebx,%edi
mov    $0xee,%esi
call   1040 <realtek_mst_i2c_spi_write_register@plt>
or     %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @realtek_mst_i2c_spi_reset_mpu(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
%5 = load i32, i32* %2
%6 = call i32 @realtek_mst_i2c_spi_read_register(i32 %5, i32 238, i32* %4)
%7 = load i32, i32* %3
%8 = or i32 %7, %6
store i32 %8, i32* %3
%9 = load i32, i32* %2
%10 = load i32, i32* %4
%11 = and i32 %10, 253
%12 = or i32 %11, 2
%13 = call i32 @realtek_mst_i2c_spi_write_register(i32 %9, i32 238, i32 %12)
%14 = load i32, i32* %3
%15 = or i32 %14, %13
store i32 %15, i32* %3
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @realtek_mst_i2c_spi_reset_mpu(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%4 = call i32 @realtek_mst_i2c_spi_read_register(i32 %0, i32 238, i32* %2)
%5 = load i32, i32* %2
%6 = and i32 %5, 253
%7 = or i32 %6, 2
%8 = call i32 @realtek_mst_i2c_spi_write_register(i32 %0, i32 238, i32 %7)
%9 = or i32 %8, %4
ret i32 %9
}
int SecKeychainSearchCopyNext() { return -4; }


x86 assembly (clang, -O0):
<SecKeychainSearchCopyNext>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffffffc,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SecKeychainSearchCopyNext>:
mov    $0xfffffffc,%eax
ret

LLVM IR (-O0):
define i32 @SecKeychainSearchCopyNext() {
ret i32 -4
}

LLVM IR (-O2):
define i32 @SecKeychainSearchCopyNext() {
ret i32 -4
}
int get_x(int pair) { return pair & 1023; }


x86 assembly (clang, -O0):
<get_x>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x3ff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_x>:
mov    %edi,%eax
and    $0x3ff,%eax
ret

LLVM IR (-O0):
define i32 @get_x(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 1023
ret i32 %4
}

LLVM IR (-O2):
define i32 @get_x(i32 %0) {
%2 = and i32 %0, 1023
ret i32 %2
}
/* Type definitions */
typedef int __le16;

/* Variables and functions */
int __cpu_to_le16(int);
int ieee80211_has_protected(__le16 fc) {
  return (fc & __cpu_to_le16(0x4000)) != 0;
}


x86 assembly (clang, -O0):
<ieee80211_has_protected>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x4000,%edi
call   1030 <__cpu_to_le16@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ieee80211_has_protected>:
push   %rbx
mov    %edi,%ebx
mov    $0x4000,%edi
call   1030 <__cpu_to_le16@plt>
xor    %ecx,%ecx
test   %ebx,%eax
setne  %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ieee80211_has_protected(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__cpu_to_le16(i32 16384)
%5 = and i32 %3, %4
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @ieee80211_has_protected(i32 %0) {
%2 = tail call i32 @__cpu_to_le16(i32 16384)
%3 = and i32 %2, %0
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
unsigned long gcd(unsigned long n, unsigned long m) {
  while (m > 0) {
    unsigned long temp = n % m;
    n = m;
    m = temp;
  }
  return n;
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jbe    113c <gcd+0x3c>
mov    -0x8(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    110c <gcd+0xc>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %rdi,%rax
test   %rsi,%rsi
je     1135 <gcd+0x35>
mov    %rsi,%rdx
jmp    111d <gcd+0x1d>
nopl   (%rax)
xor    %edx,%edx
div    %rcx
mov    %rcx,%rax
test   %rdx,%rdx
je     1132 <gcd+0x32>
mov    %rdx,%rcx
mov    %rax,%rdx
or     %rcx,%rdx
shr    $0x20,%rdx
jne    1110 <gcd+0x10>
xor    %edx,%edx
div    %ecx
jmp    1115 <gcd+0x15>
mov    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @gcd(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
br label %6
6: ; preds = %9, %2
%7 = load i64, i64* %4
%8 = icmp ugt i64 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %6
%10 = load i64, i64* %3
%11 = load i64, i64* %4
%12 = urem i64 %10, %11
store i64 %12, i64* %5
%13 = load i64, i64* %4
store i64 %13, i64* %3
%14 = load i64, i64* %5
store i64 %14, i64* %4
br label %6
15: ; preds = %6
%16 = load i64, i64* %3
ret i64 %16
}

LLVM IR (-O2):
define i64 @gcd(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %6, %4 ], [ %0, %2 ]
%6 = phi i64 [ %7, %4 ], [ %1, %2 ]
%7 = urem i64 %5, %6
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i64 [ %0, %2 ], [ %6, %4 ]
ret i64 %10
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char *, int);
void ft_putendl_fd(char const *s, int fd) {
  while (*s)
    write(fd, s++, 1);
  write(fd, "\n", 1);
}


x86 assembly (clang, -O0):
<ft_putendl_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     114d <ft_putendl_fd+0x3d>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%rsi
mov    %rsi,%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    $0x1,%edx
call   1030 <write@plt>
jmp    111f <ft_putendl_fd+0xf>
mov    -0xc(%rbp),%edi
lea    0xea9(%rip),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putendl_fd>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
cmpb   $0x0,(%rdi)
je     113d <ft_putendl_fd+0x2d>
mov    %rdi,%rbx
nop
lea    0x1(%rbx),%rbp
mov    %r14d,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1030 <write@plt>
cmpb   $0x0,0x1(%rbx)
mov    %rbp,%rbx
jne    1120 <ft_putendl_fd+0x10>
lea    0xebc(%rip),%rsi
mov    %r14d,%edi
mov    $0x1,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <write@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @ft_putendl_fd(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %9, %2
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %5
%10 = load i32, i32* %4
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %3
%13 = call i32 @write(i32 %10, i8* %11, i32 1)
br label %5
14: ; preds = %5
%15 = load i32, i32* %4
%16 = call i32 @write(i32 %15, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"\0A\00"
define void @ft_putendl_fd(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %11, label %5
5: ; preds = %2, %5
%6 = phi i8* [ %7, %5 ], [ %0, %2 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = tail call i32 @write(i32 %1, i8* %6, i32 1)
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %5
11: ; preds = %5, %2
%12 = tail call i32 @write(i32 %1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}
void OS_Dummy(void) {}


x86 assembly (clang, -O0):
<OS_Dummy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OS_Dummy>:
ret

LLVM IR (-O0):
define void @OS_Dummy() {
ret void
}

LLVM IR (-O2):
define void @OS_Dummy() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_sanity();
void test_suite() { test_sanity(); }


x86 assembly (clang, -O0):
<test_suite>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <test_sanity@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_suite>:
xor    %eax,%eax
jmp    1030 <test_sanity@plt>

LLVM IR (-O0):
define void @test_suite() {
%1 = call i32 (...) @test_sanity()
ret void
}

LLVM IR (-O2):
define void @test_suite() {
%1 = tail call i32 (...) @test_sanity()
ret void
}
d() {}


x86 assembly (clang, -O0):
<d>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d>:
ret

LLVM IR (-O0):
define i32 @d() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @d() {
ret i32 undef
}
/* Type definitions */
typedef unsigned long uint32_t;

/* Variables and functions */
void I2CSlaveIntClear(uint32_t ui32Base, uint32_t ui32IntFlags) {
  ;
  (*((volatile unsigned long *)(0x40002000 + 0x00000018))) = ui32IntFlags;
}


x86 assembly (clang, -O0):
<I2CSlaveIntClear>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    $0x40002018,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CSlaveIntClear>:
mov    %rsi,0x40002018
40
ret

LLVM IR (-O0):
define void @I2CSlaveIntClear(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
store volatile i64 %5, i64* inttoptr (i64 1073750040 to i64*)
ret void
}

LLVM IR (-O2):
define void @I2CSlaveIntClear(i64 %0, i64 %1) {
store volatile i64 %1, i64* inttoptr (i64 1073750040 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
__attribute((always_)) void realloc() {
  int local = 5;
  {
    int local2 = 3;
    abort();
  }
}


x86 assembly (clang, -O0):
<realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x5,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<realloc>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @realloc() {
%1 = alloca i32
%2 = alloca i32
store i32 5, i32* %1
store i32 3, i32* %2
%3 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define void @realloc() {
%1 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ outb(int, int);
void serial_init(void) {
  outb((0x3f8 + 1), 0x00);
  outb((0x3f8 + 3), 0x80);
  outb((0x3f8 + 0), 0x01);
  outb((0x3f8 + 1), 0x00);
  outb((0x3f8 + 3), 0x03);
}


x86 assembly (clang, -O0):
<serial_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3f9,%edi
xor    %esi,%esi
call   1030 <outb@plt>
mov    $0x3fb,%edi
mov    $0x80,%esi
call   1030 <outb@plt>
mov    $0x3f8,%edi
mov    $0x1,%esi
call   1030 <outb@plt>
mov    $0x3f9,%edi
xor    %esi,%esi
call   1030 <outb@plt>
mov    $0x3fb,%edi
mov    $0x3,%esi
call   1030 <outb@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_init>:
push   %rax
mov    $0x3f9,%edi
xor    %esi,%esi
call   1030 <outb@plt>
mov    $0x3fb,%edi
mov    $0x80,%esi
call   1030 <outb@plt>
mov    $0x3f8,%edi
mov    $0x1,%esi
call   1030 <outb@plt>
mov    $0x3f9,%edi
xor    %esi,%esi
call   1030 <outb@plt>
mov    $0x3fb,%edi
mov    $0x3,%esi
pop    %rax
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @serial_init() {
%1 = call i32 @outb(i32 1017, i32 0)
%2 = call i32 @outb(i32 1019, i32 128)
%3 = call i32 @outb(i32 1016, i32 1)
%4 = call i32 @outb(i32 1017, i32 0)
%5 = call i32 @outb(i32 1019, i32 3)
ret void
}

LLVM IR (-O2):
define void @serial_init() {
%1 = tail call i32 @outb(i32 1017, i32 0)
%2 = tail call i32 @outb(i32 1019, i32 128)
%3 = tail call i32 @outb(i32 1016, i32 1)
%4 = tail call i32 @outb(i32 1017, i32 0)
%5 = tail call i32 @outb(i32 1019, i32 3)
ret void
}
void read_rapl_data(const int socket, struct rapl_data *r) {}


x86 assembly (clang, -O0):
<read_rapl_data>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_rapl_data>:
ret

LLVM IR (-O0):
%struct.rapl_data = type opaque
define void @read_rapl_data(i32 %0, %struct.rapl_data* %1) {
%3 = alloca i32
%4 = alloca %struct.rapl_data*
store i32 %0, i32* %3
store %struct.rapl_data* %1, %struct.rapl_data** %4
ret void
}

LLVM IR (-O2):
%struct.rapl_data = type opaque
define void @read_rapl_data(i32 %0, %struct.rapl_data* nocapture %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm_or_si128(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ _mm_set1_epi8(int);
int /*<<< orphan*/ _mm_subs_epu8(int /*<<< orphan*/, int /*<<< orphan*/);
void checkSmallerThan0xF4(__m128i current_bytes, __m128i *has_error) {
  *has_error = _mm_or_si128(*has_error,
                            _mm_subs_epu8(current_bytes, _mm_set1_epi8(0xF4)));
}


x86 assembly (clang, -O0):
<checkSmallerThan0xF4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    $0xf4,%edi
call   1030 <_mm_set1_epi8@plt>
mov    -0x18(%rbp),%edi
mov    %eax,%esi
call   1040 <_mm_subs_epu8@plt>
mov    -0x14(%rbp),%edi
mov    %eax,%esi
call   1050 <_mm_or_si128@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkSmallerThan0xF4>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %edi,%ebp
mov    (%rsi),%r14d
mov    $0xf4,%edi
call   1030 <_mm_set1_epi8@plt>
mov    %ebp,%edi
mov    %eax,%esi
call   1040 <_mm_subs_epu8@plt>
mov    %r14d,%edi
mov    %eax,%esi
call   1050 <_mm_or_si128@plt>
mov    %eax,(%rbx)
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @checkSmallerThan0xF4(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = load i32, i32* %5
%7 = load i32, i32* %3
%8 = call i32 @_mm_set1_epi8(i32 244)
%9 = call i32 @_mm_subs_epu8(i32 %7, i32 %8)
%10 = call i32 @_mm_or_si128(i32 %6, i32 %9)
%11 = load i32*, i32** %4
store i32 %10, i32* %11
ret void
}

LLVM IR (-O2):
define void @checkSmallerThan0xF4(i32 %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = tail call i32 @_mm_set1_epi8(i32 244)
%5 = tail call i32 @_mm_subs_epu8(i32 %0, i32 %4)
%6 = tail call i32 @_mm_or_si128(i32 %3, i32 %5)
store i32 %6, i32* %1
ret void
}
/* Variables and functions */
scalar_t__ genrand_int32();
double genrand_real1(void) {
  return (double)genrand_int32() * (1.0 / 4294967295.0);
}


x86 assembly (clang, -O0):
<genrand_real1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <genrand_int32@plt>
cvtsi2sd %rax,%xmm0
movsd  0xed8(%rip),%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<genrand_real1>:
push   %rax
xor    %eax,%eax
call   1030 <genrand_int32@plt>
cvtsi2sd %rax,%xmm0
mulsd  0xedb(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @genrand_real1() {
%1 = call i64 (...) @genrand_int32()
%2 = sitofp i64 %1 to double
%3 = fmul double %2, 0x3DF0000000100000
ret double %3
}

LLVM IR (-O2):
define double @genrand_real1() {
%1 = tail call i64 (...) @genrand_int32()
%2 = sitofp i64 %1 to double
%3 = fmul double %2, 0x3DF0000000100000
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Hello, ");
  printf("world");
  printf("\n");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <printf@plt>
lea    0xed4(%rip),%rdi
call   1040 <printf@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"Hello, \00"
@.str.1 = [6 x i8] c"world\00"
@.str.2 = [2 x i8] c"\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"Hello, \00"
@.str.1 = [6 x i8] c"world\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @putchar(i32 10)
ret i32 0
}