xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ isalpha(char);
scalar_t__ isdigit(char);
int czy_znak_jest_slowny(char c) { return isalpha(c) || isdigit(c); }


x86 assembly (clang, -O0):
<czy_znak_jest_slowny>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1040 <isalpha@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x2(%rbp)
jne    115c <czy_znak_jest_slowny+0x3c>
movsbl -0x1(%rbp),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<czy_znak_jest_slowny>:
push   %rbx
mov    %edi,%ebx
call   1040 <isalpha@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <czy_znak_jest_slowny+0x17>
pop    %rbx
ret
movsbl %bl,%edi
call   1030 <isdigit@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @czy_znak_jest_slowny(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @isalpha(i8 signext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = call i64 @isdigit(i8 signext %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @czy_znak_jest_slowny(i8 signext %0) {
%2 = tail call i64 @isalpha(i8 signext %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @isdigit(i8 signext %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
int clickplc_exe_InterruptReturn_dec(unsigned char *stream, void *obj) {
  int encsize = 4;
  return (encsize);
}


x86 assembly (clang, -O0):
<clickplc_exe_InterruptReturn_dec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x4,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clickplc_exe_InterruptReturn_dec>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @clickplc_exe_InterruptReturn_dec(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 4, i32* %5
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @clickplc_exe_InterruptReturn_dec(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 4
}
void omap5_ion_init(void) { return; }


x86 assembly (clang, -O0):
<omap5_ion_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<omap5_ion_init>:
ret

LLVM IR (-O0):
define void @omap5_ion_init() {
ret void
}

LLVM IR (-O2):
define void @omap5_ion_init() {
ret void
}
void console_madness_begin() {}


x86 assembly (clang, -O0):
<console_madness_begin>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<console_madness_begin>:
ret

LLVM IR (-O0):
define void @console_madness_begin() {
ret void
}

LLVM IR (-O2):
define void @console_madness_begin() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _hmt_register_covercase(char *, char *);
void _hmt_covercase_HMM_DotQuaternion_init(void) {
  _hmt_register_covercase("HMM_DotQuaternion", "1");
}


x86 assembly (clang, -O0):
<_hmt_covercase_HMM_DotQuaternion_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xef0(%rip),%rsi
call   1030 <_hmt_register_covercase@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_hmt_covercase_HMM_DotQuaternion_init>:
lea    0xee9(%rip),%rdi
lea    0xef4(%rip),%rsi
jmp    1030 <_hmt_register_covercase@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"HMM_DotQuaternion\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_DotQuaternion_init() {
%1 = call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"HMM_DotQuaternion\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_DotQuaternion_init() {
%1 = tail call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void pathcon_nm4_decref(void) {}


x86 assembly (clang, -O0):
<pathcon_nm4_decref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm4_decref>:
ret

LLVM IR (-O0):
define void @pathcon_nm4_decref() {
ret void
}

LLVM IR (-O2):
define void @pathcon_nm4_decref() {
ret void
}
/* Type definitions */
typedef int __pid_t;

/* Variables and functions */
int getpgrp();
int /*<<< orphan*/ printf(char *, int);
int main() {
  __pid_t pgrp = getpgrp();
  printf("pgrp %d\n", pgrp);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <getpgrp@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <getpgrp@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"pgrp %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = call i32 (...) @getpgrp()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"pgrp %d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @getpgrp()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ strcat(char *, char *);
int /*<<< orphan*/ strcpy(char *, char *);
int /*<<< orphan*/ system(char *);
void mkdir(char *c_file) {
  char c_aux[500];
  strcpy(c_aux, "mkdir -p ");
  strcat(c_aux, c_file);
  system(c_aux);
}


x86 assembly (clang, -O0):
<mkdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x200,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x200(%rbp),%rdi
lea    0xeb3(%rip),%rsi
call   1030 <strcpy@plt>
lea    -0x200(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1050 <strcat@plt>
lea    -0x200(%rbp),%rdi
call   1040 <system@plt>
add    $0x200,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mkdir>:
push   %r14
push   %rbx
sub    $0x1f8,%rsp
mov    %rdi,%rbx
lea    0xebc(%rip),%rsi
mov    %rsp,%r14
mov    %r14,%rdi
call   1030 <strcpy@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1050 <strcat@plt>
mov    %r14,%rdi
call   1040 <system@plt>
add    $0x1f8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [10 x i8] c"mkdir -p \00"
define void @mkdir(i8* %0) {
%2 = alloca i8*
%3 = alloca [500 x i8]
store i8* %0, i8** %2
%4 = getelementptr inbounds [500 x i8], [500 x i8]* %3, i64 0, i64 0
%5 = call i32 @strcpy(i8* %4, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%6 = getelementptr inbounds [500 x i8], [500 x i8]* %3, i64 0, i64 0
%7 = load i8*, i8** %2
%8 = call i32 @strcat(i8* %6, i8* %7)
%9 = getelementptr inbounds [500 x i8], [500 x i8]* %3, i64 0, i64 0
%10 = call i32 @system(i8* %9)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"mkdir -p \00"
define void @mkdir(i8* %0) {
%2 = alloca [500 x i8]
%3 = getelementptr inbounds [500 x i8], [500 x i8]* %2, i64 0, i64 0
%4 = call i32 @strcpy(i8* %3, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @strcat(i8* %3, i8* %0)
%6 = call i32 @system(i8* %3)
ret void
}
/* Variables and functions */
int func(int);
int /*<<< orphan*/ printf(char *, int);
main() {
  int i;
  long result = 0;
  for (i = 1; i <= 100; i++) {
    result += i;
  }
  printf("result[1-100] = %d\n", result);
  printf("result[1-250] = %d\n", func(250));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x64,-0x8(%rbp)
jg     1162 <main+0x42>
movslq -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    113e <main+0x1e>
mov    -0x10(%rbp),%rax
mov    %eax,%esi
lea    0xe91(%rip),%rdi
call   1030 <printf@plt>
mov    $0xfa,%edi
call   1040 <func@plt>
mov    %eax,%esi
lea    0xe8d(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
mov    $0x13ba,%esi
call   1030 <printf@plt>
mov    $0xfa,%edi
call   1040 <func@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"result[1-100] = %d\0A\00"
@.str.1 = [20 x i8] c"result[1-250] = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i64
store i32 0, i32* %1
store i64 0, i64* %3
store i32 1, i32* %2
br label %4
4: ; preds = %12, %0
%5 = load i32, i32* %2
%6 = icmp sle i32 %5, 100
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32, i32* %2
%9 = sext i32 %8 to i64
%10 = load i64, i64* %3
%11 = add nsw i64 %10, %9
store i64 %11, i64* %3
br label %12
12: ; preds = %7
%13 = load i32, i32* %2
%14 = add nsw i32 %13, 1
store i32 %14, i32* %2
br label %4
15: ; preds = %4
%16 = load i64, i64* %3
%17 = trunc i64 %16 to i32
%18 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %17)
%19 = call i32 @func(i32 250)
%20 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0), i32 %19)
%21 = load i32, i32* %1
ret i32 %21
}

LLVM IR (-O2):
@.str = [20 x i8] c"result[1-100] = %d\0A\00"
@.str.1 = [20 x i8] c"result[1-250] = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 5050)
%2 = tail call i32 @func(i32 250)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0), i32 %2)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ wint_t;

/* Variables and functions */
int isalpha(int /*<<< orphan*/);
int iswalpha(wint_t wc) { return isalpha(wc); }


x86 assembly (clang, -O0):
<iswalpha>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <isalpha@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iswalpha>:
jmp    1030 <isalpha@plt>

LLVM IR (-O0):
define i32 @iswalpha(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @isalpha(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @iswalpha(i32 %0) {
%2 = tail call i32 @isalpha(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ GPSTimeHandle();
int /*<<< orphan*/ UAVObjRequestUpdate(int /*<<< orphan*/);
void GPSTimeRequestUpdate() { UAVObjRequestUpdate(GPSTimeHandle()); }


x86 assembly (clang, -O0):
<GPSTimeRequestUpdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GPSTimeHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjRequestUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPSTimeRequestUpdate>:
push   %rax
xor    %eax,%eax
call   1030 <GPSTimeHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjRequestUpdate@plt>

LLVM IR (-O0):
define void @GPSTimeRequestUpdate() {
%1 = call i32 (...) @GPSTimeHandle()
%2 = call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}

LLVM IR (-O2):
define void @GPSTimeRequestUpdate() {
%1 = tail call i32 (...) @GPSTimeHandle()
%2 = tail call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}
/* Variables and functions */
long double __qerf(long double);
long double qerf_(long double *arg) { return (__qerf(*arg)); }


x86 assembly (clang, -O0):
<qerf_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
fldt   (%rax)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <__qerf@plt>
fld    %st(0)
fstp   %st(0)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qerf_>:
sub    $0x18,%rsp
fldt   (%rdi)
fstpt  (%rsp)
call   1030 <__qerf@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @qerf_(x86_fp80* %0) {
%2 = alloca x86_fp80*
store x86_fp80* %0, x86_fp80** %2
%3 = load x86_fp80*, x86_fp80** %2
%4 = load x86_fp80, x86_fp80* %3
%5 = call x86_fp80 @__qerf(x86_fp80 %4)
ret x86_fp80 %5
}

LLVM IR (-O2):
define x86_fp80 @qerf_(x86_fp80* nocapture %0) {
%2 = load x86_fp80, x86_fp80* %0
%3 = tail call x86_fp80 @__qerf(x86_fp80 %2)
ret x86_fp80 %3
}
/* Variables and functions */
int /*<<< orphan*/ Coba();
int /*<<< orphan*/ tambah_datamhs();
int /*<<< orphan*/ tampil_data();
int main() {
  tambah_datamhs();
  tampil_data();
  Coba();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <tambah_datamhs@plt>
mov    $0x0,%al
call   1050 <tampil_data@plt>
mov    $0x0,%al
call   1040 <Coba@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <tambah_datamhs@plt>
xor    %eax,%eax
call   1050 <tampil_data@plt>
xor    %eax,%eax
call   1040 <Coba@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @tambah_datamhs()
%3 = call i32 (...) @tampil_data()
%4 = call i32 (...) @Coba()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @tambah_datamhs()
%2 = tail call i32 (...) @tampil_data()
%3 = tail call i32 (...) @Coba()
ret i32 0
}
/* Variables and functions */
scalar_t__ strlen(char *);
scalar_t__ strstr(char *, char const *);
int check_env(char *haystack, const char *needle) {
  size_t index = 0;
  while (index < (4125)) {
    if (strstr(haystack + index, needle))
      return (1);
    index += strlen(haystack) + 1;
  }
  return (0);
}


x86 assembly (clang, -O0):
<check_env>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
cmpq   $0x101d,-0x20(%rbp)
jae    1187 <check_env+0x67>
mov    -0x10(%rbp),%rdi
add    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <strstr@plt>
cmp    $0x0,%rax
je     116d <check_env+0x4d>
movl   $0x1,-0x4(%rbp)
jmp    118e <check_env+0x6e>
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%rax
add    -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
jmp    1138 <check_env+0x18>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_env>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
xor    %ebx,%ebx
nopl   (%rax)
lea    (%r15,%rbx,1),%rdi
mov    %r14,%rsi
call   1040 <strstr@plt>
test   %rax,%rax
jne    115d <check_env+0x3d>
mov    %r15,%rdi
call   1030 <strlen@plt>
add    %rax,%rbx
add    $0x1,%rbx
cmp    $0x101d,%rbx
jb     1130 <check_env+0x10>
xor    %eax,%eax
jmp    1162 <check_env+0x42>
mov    $0x1,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @check_env(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 0, i64* %6
br label %7
7: ; preds = %18, %2
%8 = load i64, i64* %6
%9 = icmp ult i64 %8, 4125
br i1 %9, label %10, label %24
10: ; preds = %7
%11 = load i8*, i8** %4
%12 = load i64, i64* %6
%13 = getelementptr inbounds i8, i8* %11, i64 %12
%14 = load i8*, i8** %5
%15 = call i64 @strstr(i8* %13, i8* %14)
%16 = icmp ne i64 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %10
store i32 1, i32* %3
br label %25
18: ; preds = %10
%19 = load i8*, i8** %4
%20 = call i64 @strlen(i8* %19)
%21 = add nsw i64 %20, 1
%22 = load i64, i64* %6
%23 = add i64 %22, %21
store i64 %23, i64* %6
br label %7
24: ; preds = %7
store i32 0, i32* %3
br label %25
25: ; preds = %24, %17
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @check_env(i8* %0, i8* %1) {
br label %3
3: ; preds = %2, %8
%4 = phi i64 [ 0, %2 ], [ %11, %8 ]
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = tail call i64 @strstr(i8* %5, i8* %1)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %3
%9 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%10 = add nuw nsw i64 %4, 1
%11 = add i64 %10, %9
%12 = icmp ult i64 %11, 4125
br i1 %12, label %3, label %13
13: ; preds = %8, %3
%14 = phi i32 [ 1, %3 ], [ 0, %8 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0xaa() {
  Assert_real((isupper(170) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              855, ("isupper should be 0 for 0xaa"));
}


x86 assembly (clang, -O0):
<t_isupper_0xaa>:
push   %rbp
mov    %rsp,%rbp
mov    $0xaa,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x357,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0xaa>:
push   %rax
mov    $0xaa,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x357,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0xaa\00"
define void @t_isupper_0xaa() {
%1 = call i64 @isupper(i32 170)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 855, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0xaa\00"
define void @t_isupper_0xaa() {
%1 = tail call i64 @isupper(i32 170)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 855, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
const int myFunction3(int const i[5], int const j[]) {
  if (i[3] == 0)
    return j[5];
  else {
    return j[0];
  }
}


x86 assembly (clang, -O0):
<myFunction3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpl   $0x0,0xc(%rax)
jne    1129 <myFunction3+0x29>
mov    -0x18(%rbp),%rax
mov    0x14(%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    1132 <myFunction3+0x32>
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<myFunction3>:
cmpl   $0x0,0xc(%rdi)
lea    0x14(%rsi),%rax
cmovne %rsi,%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
define i32 @myFunction3(i32* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
%6 = load i32*, i32** %4
%7 = getelementptr inbounds i32, i32* %6, i64 3
%8 = load i32, i32* %7
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = load i32*, i32** %5
%12 = getelementptr inbounds i32, i32* %11, i64 5
%13 = load i32, i32* %12
store i32 %13, i32* %3
br label %18
14: ; preds = %2
%15 = load i32*, i32** %5
%16 = getelementptr inbounds i32, i32* %15, i64 0
%17 = load i32, i32* %16
store i32 %17, i32* %3
br label %18
18: ; preds = %14, %10
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @myFunction3(i32* nocapture %0, i32* nocapture %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i64 5, i64 0
%7 = getelementptr i32, i32* %1, i64 %6
%8 = load i32, i32* %7
ret i32 %8
}
long double func2(long double x) {
  if (x > 0.0)
    return x;
  else if (x < 0.0)
    return -x;
  else
    return x;
}


x86 assembly (clang, -O0):
<func2>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x20(%rbp)
fldz
fxch   %st(1)
fucomip %st(1),%st
fstp   %st(0)
jbe    112b <func2+0x2b>
jmp    1120 <func2+0x20>
fldt   -0x20(%rbp)
fstpt  -0x10(%rbp)
jmp    1152 <func2+0x52>
fldt   -0x20(%rbp)
fldz
fucomip %st(1),%st
fstp   %st(0)
jbe    114c <func2+0x4c>
jmp    113f <func2+0x3f>
fldt   -0x20(%rbp)
fchs
fstpt  -0x10(%rbp)
jmp    1152 <func2+0x52>
fldt   -0x20(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<func2>:
fldt   0x8(%rsp)
fldz
fucomip %st(1),%st
fld    %st(0)
fchs
fxch   %st(1)
fcmovnbe %st(1),%st
fstp   %st(1)
ret

LLVM IR (-O0):
define x86_fp80 @func2(x86_fp80 %0) {
%2 = alloca x86_fp80
%3 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
%4 = load x86_fp80, x86_fp80* %3
%5 = fcmp ogt x86_fp80 %4, 0xK00000000000000000000
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load x86_fp80, x86_fp80* %3
store x86_fp80 %7, x86_fp80* %2
br label %16
8: ; preds = %1
%9 = load x86_fp80, x86_fp80* %3
%10 = fcmp olt x86_fp80 %9, 0xK00000000000000000000
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load x86_fp80, x86_fp80* %3
%13 = fneg x86_fp80 %12
store x86_fp80 %13, x86_fp80* %2
br label %16
14: ; preds = %8
%15 = load x86_fp80, x86_fp80* %3
store x86_fp80 %15, x86_fp80* %2
br label %16
16: ; preds = %14, %11, %6
%17 = load x86_fp80, x86_fp80* %2
ret x86_fp80 %17
}

LLVM IR (-O2):
define x86_fp80 @func2(x86_fp80 %0) {
%2 = fcmp olt x86_fp80 %0, 0xK00000000000000000000
%3 = fneg x86_fp80 %0
%4 = select i1 %2, x86_fp80 %3, x86_fp80 %0
ret x86_fp80 %4
}
int try(char *a, int d) { return a + d > a; }


x86 assembly (clang, -O0):
<try>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
add    %rcx,%rax
cmp    -0x8(%rbp),%rax
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<try>:
xor    %eax,%eax
test   %esi,%esi
setg   %al
ret

LLVM IR (-O0):
define i32 @try(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8*, i8** %3
%10 = icmp ugt i8* %8, %9
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @try(i8* nocapture readnone %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
int main_stop(int argc, char **argv) {
  (void)argc, (void)argv;
  return 0;
}


x86 assembly (clang, -O0):
<main_stop>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main_stop>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main_stop(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i8**, i8*** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main_stop(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double *, double, char const *);
void cpp_overload2(double *p1, const char *p2) {
  printf("CPP Two params: %p (%f) %s\n", p1, *p1, p2);
}


x86 assembly (clang, -O0):
<cpp_overload2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rdx
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpp_overload2>:
mov    %rsi,%rdx
mov    %rdi,%rsi
movsd  (%rdi),%xmm0
lea    0xedf(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"CPP Two params: %p (%f) %s\0A\00"
define void @cpp_overload2(double* %0, i8* %1) {
%3 = alloca double*
%4 = alloca i8*
store double* %0, double** %3
store i8* %1, i8** %4
%5 = load double*, double** %3
%6 = load double*, double** %3
%7 = load double, double* %6
%8 = load i8*, i8** %4
%9 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), double* %5, double %7, i8* %8)
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c"CPP Two params: %p (%f) %s\0A\00"
define void @cpp_overload2(double* %0, i8* %1) {
%3 = load double, double* %0
%4 = tail call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), double* %0, double %3, i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ hello();
int main(int argc, char **argv) {
  hello();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <hello@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <hello@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @hello()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @hello()
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;

/* Variables and functions */
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
void getSeed() {
  time_t t;
  t = time(NULL);
  srand(t);
}


x86 assembly (clang, -O0):
<getSeed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <srand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getSeed>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @getSeed() {
%1 = alloca i32
%2 = call i32 @time(i32* null)
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @srand(i32 %3)
ret void
}

LLVM IR (-O2):
define void @getSeed() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 @srand(i32 %1)
ret void
}
/* Variables and functions */
scalar_t__ local_mcu_TimerMilli_isRunning__E();
int /*<<< orphan*/ local_mcu_TimerMilli_stop__E();
void pollen_time_TimerManager_stop__E() {
  if (local_mcu_TimerMilli_isRunning__E()) {
    local_mcu_TimerMilli_stop__E();
  }
}


x86 assembly (clang, -O0):
<pollen_time_TimerManager_stop__E>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <local_mcu_TimerMilli_isRunning__E@plt>
cmp    $0x0,%rax
je     113c <pollen_time_TimerManager_stop__E+0x1c>
mov    $0x0,%al
call   1030 <local_mcu_TimerMilli_stop__E@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pollen_time_TimerManager_stop__E>:
push   %rax
xor    %eax,%eax
call   1040 <local_mcu_TimerMilli_isRunning__E@plt>
test   %rax,%rax
je     1135 <pollen_time_TimerManager_stop__E+0x15>
xor    %eax,%eax
pop    %rcx
jmp    1030 <local_mcu_TimerMilli_stop__E@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @pollen_time_TimerManager_stop__E() {
%1 = call i64 (...) @local_mcu_TimerMilli_isRunning__E()
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = call i32 (...) @local_mcu_TimerMilli_stop__E()
br label %5
5: ; preds = %3, %0
ret void
}

LLVM IR (-O2):
define void @pollen_time_TimerManager_stop__E() {
%1 = tail call i64 (...) @local_mcu_TimerMilli_isRunning__E()
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @local_mcu_TimerMilli_stop__E()
br label %5
5: ; preds = %3, %0
ret void
}
void equeue_tick_init(void) {}


x86 assembly (clang, -O0):
<equeue_tick_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<equeue_tick_init>:
ret

LLVM IR (-O0):
define void @equeue_tick_init() {
ret void
}

LLVM IR (-O2):
define void @equeue_tick_init() {
ret void
}
void print_progr_pm(char perc_f, char perc_t, char *size_f, char *size_t,
                    char *bps, char eta_s, char eta_m, char eta_h) {
  printf("\rFile: %3d%% of %s @ %s/s  Total: %3d%% of %s ETA %02d:%02d:%02d   ",
         perc_f, size_f, bps, perc_t, size_t, eta_h, eta_m, eta_s);
  return;
}


x86 assembly (clang, -O0):
<print_progr_pm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %r9b,%al
mov    0x18(%rbp),%r9b
mov    0x10(%rbp),%r9b
mov    %dil,-0x1(%rbp)
mov    %sil,-0x2(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    %al,-0x21(%rbp)
movsbl -0x1(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
movsbl -0x2(%rbp),%r8d
mov    -0x18(%rbp),%r9
movsbl 0x18(%rbp),%r11d
movsbl 0x10(%rbp),%r10d
movsbl -0x21(%rbp),%eax
lea    0xe9c(%rip),%rdi
mov    %r11d,(%rsp)
mov    %r10d,0x8(%rsp)
mov    %eax,0x10(%rsp)
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_progr_pm>:
push   %rbx
mov    %r9d,%r10d
mov    %rcx,%r9
mov    %esi,%eax
mov    %edi,%esi
movsbl 0x18(%rsp),%r11d
movsbl 0x10(%rsp),%ebx
sub    $0x8,%rsp
lea    0xecf(%rip),%rdi
mov    %r8,%rcx
mov    %eax,%r8d
xor    %eax,%eax
push   %r10
push   %rbx
push   %r11
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [68 x i8] c"\0DFile: %3d%% of %s @ %s/s Total: %3d%% of %s ETA %02d:%02d:%02d \00"
define void @print_progr_pm(i8 signext %0, i8 signext %1, i8* %2, i8* %3, i8* %4, i8 signext %5, i8 signext %6, i8 signext %7) {
%9 = alloca i8
%10 = alloca i8
%11 = alloca i8*
%12 = alloca i8*
%13 = alloca i8*
%14 = alloca i8
%15 = alloca i8
%16 = alloca i8
store i8 %0, i8* %9
store i8 %1, i8* %10
store i8* %2, i8** %11
store i8* %3, i8** %12
store i8* %4, i8** %13
store i8 %5, i8* %14
store i8 %6, i8* %15
store i8 %7, i8* %16
%17 = load i8, i8* %9
%18 = sext i8 %17 to i32
%19 = load i8*, i8** %11
%20 = load i8*, i8** %13
%21 = load i8, i8* %10
%22 = sext i8 %21 to i32
%23 = load i8*, i8** %12
%24 = load i8, i8* %16
%25 = sext i8 %24 to i32
%26 = load i8, i8* %15
%27 = sext i8 %26 to i32
%28 = load i8, i8* %14
%29 = sext i8 %28 to i32
%30 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([68 x i8], [68 x i8]* @.str, i64 0, i64 0), i32 %18, i8* %19, i8* %20, i32 %22, i8* %23, i32 %25, i32 %27, i32 %29)
ret void
}

LLVM IR (-O2):
@.str = [68 x i8] c"\0DFile: %3d%% of %s @ %s/s Total: %3d%% of %s ETA %02d:%02d:%02d \00"
define void @print_progr_pm(i8 signext %0, i8 signext %1, i8* %2, i8* %3, i8* %4, i8 signext %5, i8 signext %6, i8 signext %7) {
%9 = sext i8 %0 to i32
%10 = sext i8 %1 to i32
%11 = sext i8 %7 to i32
%12 = sext i8 %6 to i32
%13 = sext i8 %5 to i32
%14 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([68 x i8], [68 x i8]* @.str, i64 0, i64 0), i32 %9, i8* %2, i8* %4, i32 %10, i8* %3, i32 %11, i32 %12, i32 %13)
ret void
}
void sg_swap_destroy_comp(void) {}


x86 assembly (clang, -O0):
<sg_swap_destroy_comp>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sg_swap_destroy_comp>:
ret

LLVM IR (-O0):
define void @sg_swap_destroy_comp() {
ret void
}

LLVM IR (-O2):
define void @sg_swap_destroy_comp() {
ret void
}
int pass(str)
char *str;
{ printf("PASS: %s\n", str); }


x86 assembly (clang, -O0):
<pass>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xed9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pass>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"PASS: %s\0A\00"
define i32 @pass(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
@.str = [10 x i8] c"PASS: %s\0A\00"
define i32 @pass(i8* %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 undef
}
/* Type definitions */
typedef long long int64_t;

/* Variables and functions */
long long bytes2gbll(int64_t bytes) { return (bytes + (1ll << 30) - 1) >> 30; }


x86 assembly (clang, -O0):
<bytes2gbll>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x40000000,%rax
sub    $0x1,%rax
sar    $0x1e,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bytes2gbll>:
lea    0x3fffffff(%rdi),%rax
sar    $0x1e,%rax
ret

LLVM IR (-O0):
define i64 @bytes2gbll(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 1073741824
%5 = sub nsw i64 %4, 1
%6 = ashr i64 %5, 30
ret i64 %6
}

LLVM IR (-O2):
define i64 @bytes2gbll(i64 %0) {
%2 = add nsw i64 %0, 1073741823
%3 = ashr i64 %2, 30
ret i64 %3
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void ads8568_init_pinmux(void) {
  *(volatile uint32_t *)(0x01c14000 + 0x144) = 0x18018111;
  *(volatile uint32_t *)(0x01c14000 + 0x14c) = 0x11188822;
  *(volatile uint32_t *)(0x01c14000 + 0x158) = 0x88222822;
  *(volatile uint32_t *)(0x01c14000 + 0x15c) = 0x28888888;
  *(volatile uint32_t *)(0x01c14000 + 0x160) = 0x88888882;
  *(volatile uint32_t *)(0x01c14000 + 0x164) = 0x00188818;
  return;
}


x86 assembly (clang, -O0):
<ads8568_init_pinmux>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1c14144,%eax
movl   $0x18018111,(%rax)
mov    $0x1c1414c,%eax
movl   $0x11188822,(%rax)
mov    $0x1c14158,%eax
movl   $0x88222822,(%rax)
mov    $0x1c1415c,%eax
movl   $0x28888888,(%rax)
mov    $0x1c14160,%eax
movl   $0x88888882,(%rax)
mov    $0x1c14164,%eax
movl   $0x188818,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ads8568_init_pinmux>:
movl   $0x18018111,0x1c14144
11 81 01 18
movl   $0x11188822,0x1c1414c
22 88 18 11
movl   $0x88222822,0x1c14158
22 28 22 88
movl   $0x28888888,0x1c1415c
88 88 88 28
movl   $0x88888882,0x1c14160
82 88 88 88
movl   $0x188818,0x1c14164
ret

LLVM IR (-O0):
define void @ads8568_init_pinmux() {
store volatile i32 402751761, i32* inttoptr (i64 29442372 to i32*)
store volatile i32 286820386, i32* inttoptr (i64 29442380 to i32*)
store volatile i32 -2011027422, i32* inttoptr (i64 29442392 to i32*)
store volatile i32 680036488, i32* inttoptr (i64 29442396 to i32*)
store volatile i32 -2004318078, i32* inttoptr (i64 29442400 to i32*)
store volatile i32 1607704, i32* inttoptr (i64 29442404 to i32*)
ret void
}

LLVM IR (-O2):
define void @ads8568_init_pinmux() {
store volatile i32 402751761, i32* inttoptr (i64 29442372 to i32*)
store volatile i32 286820386, i32* inttoptr (i64 29442380 to i32*)
store volatile i32 -2011027422, i32* inttoptr (i64 29442392 to i32*)
store volatile i32 680036488, i32* inttoptr (i64 29442396 to i32*)
store volatile i32 -2004318078, i32* inttoptr (i64 29442400 to i32*)
store volatile i32 1607704, i32* inttoptr (i64 29442404 to i32*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CL_RegisterSounds();
int /*<<< orphan*/ S_Init();
int /*<<< orphan*/ S_Shutdown();
void CL_Snd_Restart_f(void) {
  S_Shutdown();
  S_Init();
  CL_RegisterSounds();
}


x86 assembly (clang, -O0):
<CL_Snd_Restart_f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <S_Shutdown@plt>
mov    $0x0,%al
call   1050 <S_Init@plt>
mov    $0x0,%al
call   1030 <CL_RegisterSounds@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CL_Snd_Restart_f>:
push   %rax
xor    %eax,%eax
call   1040 <S_Shutdown@plt>
xor    %eax,%eax
call   1050 <S_Init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <CL_RegisterSounds@plt>

LLVM IR (-O0):
define void @CL_Snd_Restart_f() {
%1 = call i32 (...) @S_Shutdown()
%2 = call i32 (...) @S_Init()
%3 = call i32 (...) @CL_RegisterSounds()
ret void
}

LLVM IR (-O2):
define void @CL_Snd_Restart_f() {
%1 = tail call i32 (...) @S_Shutdown()
%2 = tail call i32 (...) @S_Init()
%3 = tail call i32 (...) @CL_RegisterSounds()
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
int main(int argc, char **argv) {
  int *a, *b, *c, *d;
  a = (int *)malloc(sizeof(int));
  b = a;
  c = b;
  d = c;
  a = NULL;
  b = NULL;
  c = NULL;
  d = NULL;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x30(%rbp)
movq   $0x0,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
movq   $0x0,-0x30(%rbp)
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
call   1030 <malloc@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%10 = call i64 @malloc(i32 4)
%11 = inttoptr i64 %10 to i32*
store i32* %11, i32** %6
%12 = load i32*, i32** %6
store i32* %12, i32** %7
%13 = load i32*, i32** %7
store i32* %13, i32** %8
%14 = load i32*, i32** %8
store i32* %14, i32** %9
store i32* null, i32** %6
store i32* null, i32** %7
store i32* null, i32** %8
store i32* null, i32** %9
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 @malloc(i32 4)
ret i32 0
}
_Noreturn int f(void) { return 0; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @f() {
ret i32 0
}

LLVM IR (-O2):
define i32 @f() {
ret i32 0
}
unsigned int *v(const void *bin) {
  return (unsigned int *)(bin + sizeof(float));
}


x86 assembly (clang, -O0):
<v>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x4,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<v>:
lea    0x4(%rdi),%rax
ret

LLVM IR (-O0):
define i32* @v(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr i8, i8* %3, i64 4
%5 = bitcast i8* %4 to i32*
ret i32* %5
}

LLVM IR (-O2):
define i32* @v(i8* readnone %0) {
%2 = getelementptr i8, i8* %0, i64 4
%3 = bitcast i8* %2 to i32*
ret i32* %3
}
void swift_getEnumCaseSinglePayload(void) {}


x86 assembly (clang, -O0):
<swift_getEnumCaseSinglePayload>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swift_getEnumCaseSinglePayload>:
ret

LLVM IR (-O0):
define void @swift_getEnumCaseSinglePayload() {
ret void
}

LLVM IR (-O2):
define void @swift_getEnumCaseSinglePayload() {
ret void
}
/* Variables and functions */
char *tokenParser(char *, char *, int /*<<< orphan*/, char *);
char *uniprotIDParser(char *header) {
  return tokenParser(header, ".\t \n", 0, "uniprotIDParser");
}


x86 assembly (clang, -O0):
<uniprotIDParser>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
xor    %edx,%edx
lea    0xed5(%rip),%rcx
call   1030 <tokenParser@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uniprotIDParser>:
lea    0xee9(%rip),%rsi
lea    0xee7(%rip),%rcx
xor    %edx,%edx
jmp    1030 <tokenParser@plt>

LLVM IR (-O0):
@.str = [5 x i8] c".\09 \0A\00"
@.str.1 = [16 x i8] c"uniprotIDParser\00"
define i8* @uniprotIDParser(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @tokenParser(i8* %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 0, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
ret i8* %4
}

LLVM IR (-O2):
@.str = [5 x i8] c".\09 \0A\00"
@.str.1 = [16 x i8] c"uniprotIDParser\00"
define i8* @uniprotIDParser(i8* %0) {
%2 = tail call i8* @tokenParser(i8* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 0, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
ret i8* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ __u32;

/* Variables and functions */
int ceph_frag_bits(int /*<<< orphan*/);
int ceph_frag_value(int /*<<< orphan*/);
int ceph_frag_is_left_child(__u32 f) {
  return ceph_frag_bits(f) > 0 &&
         (ceph_frag_value(f) & (0x1000000 >> ceph_frag_bits(f))) == 0;
}


x86 assembly (clang, -O0):
<ceph_frag_is_left_child>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ceph_frag_bits@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x5(%rbp)
jle    116f <ceph_frag_is_left_child+0x4f>
mov    -0x4(%rbp),%edi
call   1040 <ceph_frag_value@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ceph_frag_bits@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
mov    $0x1000000,%edx
sar    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceph_frag_is_left_child>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
call   1030 <ceph_frag_bits@plt>
test   %eax,%eax
jle    114f <ceph_frag_is_left_child+0x2f>
mov    %ebx,%edi
call   1040 <ceph_frag_value@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1030 <ceph_frag_bits@plt>
mov    %eax,%ecx
shl    %cl,%ebp
xor    %eax,%eax
test   $0x1000000,%ebp
sete   %al
jmp    1151 <ceph_frag_is_left_child+0x31>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @ceph_frag_is_left_child(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ceph_frag_bits(i32 %3)
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i32 @ceph_frag_value(i32 %7)
%9 = load i32, i32* %2
%10 = call i32 @ceph_frag_bits(i32 %9)
%11 = ashr i32 16777216, %10
%12 = and i32 %8, %11
%13 = icmp eq i32 %12, 0
br label %14
14: ; preds = %6, %1
%15 = phi i1 [ false, %1 ], [ %13, %6 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @ceph_frag_is_left_child(i32 %0) {
%2 = tail call i32 @ceph_frag_bits(i32 %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = tail call i32 @ceph_frag_value(i32 %0)
%6 = tail call i32 @ceph_frag_bits(i32 %0)
%7 = lshr i32 16777216, %6
%8 = and i32 %7, %5
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %10, %4 ]
ret i32 %12
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void SHAMD5IntClear(uint32_t ui32Base, uint32_t ui32IntFlags) {
  ;

  ;
  (*((volatile unsigned long *)(ui32Base + 0xFFFFC01C))) =
      (((ui32IntFlags & 0x00010000) >> 14) |
       ((ui32IntFlags & 0x00020000) >> 16) |
       ((ui32IntFlags & 0x00040000) >> 19));
}


x86 assembly (clang, -O0):
<SHAMD5IntClear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x10000,%eax
sar    $0xe,%eax
mov    -0x8(%rbp),%ecx
and    $0x20000,%ecx
sar    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    $0x40000,%ecx
sar    $0x13,%ecx
or     %ecx,%eax
movslq %eax,%rcx
mov    -0x4(%rbp),%eax
add    $0xffffc01c,%eax
mov    %eax,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAMD5IntClear>:
mov    %esi,%eax
shr    $0xe,%eax
and    $0x4,%eax
shr    $0x10,%esi
and    $0x2,%esi
or     %eax,%esi
add    $0xffffc01c,%edi
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @SHAMD5IntClear(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 65536
%7 = ashr i32 %6, 14
%8 = load i32, i32* %4
%9 = and i32 %8, 131072
%10 = ashr i32 %9, 16
%11 = or i32 %7, %10
%12 = load i32, i32* %4
%13 = and i32 %12, 262144
%14 = ashr i32 %13, 19
%15 = or i32 %11, %14
%16 = sext i32 %15 to i64
%17 = load i32, i32* %3
%18 = add i32 %17, -16356
%19 = zext i32 %18 to i64
%20 = inttoptr i64 %19 to i64*
store volatile i64 %16, i64* %20
ret void
}

LLVM IR (-O2):
define void @SHAMD5IntClear(i32 %0, i32 %1) {
%3 = lshr i32 %1, 14
%4 = and i32 %3, 4
%5 = lshr i32 %1, 16
%6 = and i32 %5, 2
%7 = or i32 %4, %6
%8 = zext i32 %7 to i64
%9 = add i32 %0, -16356
%10 = zext i32 %9 to i64
%11 = inttoptr i64 %10 to i64*
store volatile i64 %8, i64* %11
ret void
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int syscon_create_evaluator(void) {
  int fail, *a, *b;
  double *c;
  fail = _ada_use_c2phc(147, a, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<syscon_create_evaluator>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x93,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscon_create_evaluator>:
mov    $0x93,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @syscon_create_evaluator() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca double*
%5 = load i32*, i32** %2
%6 = load i32*, i32** %3
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 147, i32* %5, i32* %6, double* %7)
store i32 %8, i32* %1
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
define i32 @syscon_create_evaluator() {
%1 = tail call i32 @_ada_use_c2phc(i32 147, i32* undef, i32* undef, double* undef)
ret i32 %1
}
/* Type definitions */
struct ndm_ptrvec_t {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ndm_ptrvec_remove(struct ndm_ptrvec_t *, int /*<<< orphan*/);
void ndm_ptrvec_pop_front(struct ndm_ptrvec_t *v) { ndm_ptrvec_remove(v, 0); }


x86 assembly (clang, -O0):
<ndm_ptrvec_pop_front>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <ndm_ptrvec_remove@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ndm_ptrvec_pop_front>:
xor    %esi,%esi
jmp    1030 <ndm_ptrvec_remove@plt>

LLVM IR (-O0):
%struct.ndm_ptrvec_t = type { i32 }
define void @ndm_ptrvec_pop_front(%struct.ndm_ptrvec_t* %0) {
%2 = alloca %struct.ndm_ptrvec_t*
store %struct.ndm_ptrvec_t* %0, %struct.ndm_ptrvec_t** %2
%3 = load %struct.ndm_ptrvec_t*, %struct.ndm_ptrvec_t** %2
%4 = call i32 @ndm_ptrvec_remove(%struct.ndm_ptrvec_t* %3, i32 0)
ret void
}

LLVM IR (-O2):
%struct.ndm_ptrvec_t = type { i32 }
define void @ndm_ptrvec_pop_front(%struct.ndm_ptrvec_t* %0) {
%2 = tail call i32 @ndm_ptrvec_remove(%struct.ndm_ptrvec_t* %0, i32 0)
ret void
}
void fix_thread_affinities(void) {}


x86 assembly (clang, -O0):
<fix_thread_affinities>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fix_thread_affinities>:
ret

LLVM IR (-O0):
define void @fix_thread_affinities() {
ret void
}

LLVM IR (-O2):
define void @fix_thread_affinities() {
ret void
}
int isascii(int c) { return (c <= 127); }


x86 assembly (clang, -O0):
<isascii>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x7f,-0x4(%rbp)
setle  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isascii>:
xor    %eax,%eax
cmp    $0x80,%edi
setl   %al
ret

LLVM IR (-O0):
define i32 @isascii(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 %3, 127
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @isascii(i32 %0) {
%2 = icmp slt i32 %0, 128
%3 = zext i1 %2 to i32
ret i32 %3
}