xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ rowmajor_kosherp(int, int const *);
int fftwf_many_kosherp(int rnk, const int *n, int howmany) {
  return (howmany >= 0) && rowmajor_kosherp(rnk, n);
}


x86 assembly (clang, -O0):
<fftwf_many_kosherp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x14(%rbp)
mov    %al,-0x15(%rbp)
jl     1147 <fftwf_many_kosherp+0x37>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <rowmajor_kosherp@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fftwf_many_kosherp>:
test   %edx,%edx
js     112a <fftwf_many_kosherp+0x1a>
push   %rax
call   1030 <rowmajor_kosherp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
add    $0x8,%rsp
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fftwf_many_kosherp(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = icmp sge i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %3
%10 = load i32, i32* %4
%11 = load i32*, i32** %5
%12 = call i64 @rowmajor_kosherp(i32 %10, i32* %11)
%13 = icmp ne i64 %12, 0
br label %14
14: ; preds = %9, %3
%15 = phi i1 [ false, %3 ], [ %13, %9 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @fftwf_many_kosherp(i32 %0, i32* %1, i32 %2) {
%4 = icmp sgt i32 %2, -1
br i1 %4, label %5, label %9
5: ; preds = %3
%6 = tail call i64 @rowmajor_kosherp(i32 %0, i32* %1)
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %5, %3
%10 = phi i32 [ 0, %3 ], [ %8, %5 ]
ret i32 %10
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int get_sum(uint32_t cs) { return cs & ((1 << (19)) - 1); }


x86 assembly (clang, -O0):
<get_sum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x7ffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_sum>:
mov    %edi,%eax
and    $0x7ffff,%eax
ret

LLVM IR (-O0):
define i32 @get_sum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 524287
ret i32 %4
}

LLVM IR (-O2):
define i32 @get_sum(i32 %0) {
%2 = and i32 %0, 524287
ret i32 %2
}
void __DELETE_java_lang_Thread_State(void *me, void *client_data) {}


x86 assembly (clang, -O0):
<__DELETE_java_lang_Thread_State>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__DELETE_java_lang_Thread_State>:
ret

LLVM IR (-O0):
define void @__DELETE_java_lang_Thread_State(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @__DELETE_java_lang_Thread_State(i8* nocapture %0, i8* nocapture %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fclose(int /*<<< orphan*/ *);
int fs_close(FILE *file) { return fclose(file); }


x86 assembly (clang, -O0):
<fs_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fclose@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fs_close>:
jmp    1030 <fclose@plt>

LLVM IR (-O0):
define i32 @fs_close(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fclose(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @fs_close(i32* nocapture %0) {
%2 = tail call i32 @fclose(i32* %0)
ret i32 %2
}
int wait(int *status) { return 0; }


x86 assembly (clang, -O0):
<wait>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @wait(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @wait(i32* nocapture readnone %0) {
ret i32 0
}
int random2(int a, int b) { return a; }


x86 assembly (clang, -O0):
<random2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<random2>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @random2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
ret i32 %5
}

LLVM IR (-O2):
define i32 @random2(i32 returned %0, i32 %1) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
extern void xmlrpc_client_event_loop_finish_asynch(void) {
  char *routine = "xmlrpc_client_event_loop_finish_asynch";
  {
    fprintf(stderr, "%s: xmlrpc not implemented\n", routine);
    exit(1);
  }
}


x86 assembly (clang, -O0):
<xmlrpc_client_event_loop_finish_asynch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xee0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<xmlrpc_client_event_loop_finish_asynch>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xef6(%rip),%rsi
lea    0xec8(%rip),%rdx
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [39 x i8] c"xmlrpc_client_event_loop_finish_asynch\00"
@stderr = global i32 0
@.str.1 = [28 x i8] c"%s: xmlrpc not implemented\0A\00"
define void @xmlrpc_client_event_loop_finish_asynch() {
%1 = alloca i8*
store i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i32, i32* @stderr
%3 = load i8*, i8** %1
%4 = call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [39 x i8] c"xmlrpc_client_event_loop_finish_asynch\00"
@stderr = global i32 0
@.str.1 = [28 x i8] c"%s: xmlrpc not implemented\0A\00"
define void @xmlrpc_client_event_loop_finish_asynch() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ report_error(int, char *, char *, int);
void error_read_line(char *fname, int line) {
  report_error(1, "Error reading %s, line %d\n", fname, line);
}


x86 assembly (clang, -O0):
<error_read_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
mov    $0x1,%edi
lea    0xece(%rip),%rsi
call   1030 <report_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<error_read_line>:
mov    %esi,%ecx
mov    %rdi,%rdx
lea    0xee4(%rip),%rsi
mov    $0x1,%edi
jmp    1030 <report_error@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"Error reading %s, line %d\0A\00"
define void @error_read_line(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @report_error(i32 1, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"Error reading %s, line %d\0A\00"
define void @error_read_line(i8* %0, i32 %1) {
%3 = tail call i32 @report_error(i32 1, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
ret void
}
void f(int *p, void (*func)(int *)) { func(p); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdi
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
jmp    *%rsi

LLVM IR (-O0):
define void @f(i32* %0, void (i32*)* %1) {
%3 = alloca i32*
%4 = alloca void (i32*)*
store i32* %0, i32** %3
store void (i32*)* %1, void (i32*)** %4
%5 = load void (i32*)*, void (i32*)** %4
%6 = load i32*, i32** %3
ret void
}

LLVM IR (-O2):
define void @f(i32* %0, void (i32*)* nocapture %1) {
tail call void %1(i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ serverFree();
void interruptHandler(int signal) {
  serverFree();
  exit(0);
}


x86 assembly (clang, -O0):
<interruptHandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <serverFree@plt>
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<interruptHandler>:
push   %rax
xor    %eax,%eax
call   1040 <serverFree@plt>
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @interruptHandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @serverFree()
%4 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @interruptHandler(i32 %0) {
%2 = tail call i32 (...) @serverFree()
%3 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int shmdt(void *);
int mtor_shmdt(void *shm_ptr) { return (shmdt(shm_ptr)); }


x86 assembly (clang, -O0):
<mtor_shmdt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <shmdt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mtor_shmdt>:
jmp    1030 <shmdt@plt>

LLVM IR (-O0):
define i32 @mtor_shmdt(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @shmdt(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @mtor_shmdt(i8* %0) {
%2 = tail call i32 @shmdt(i8* %0)
ret i32 %2
}
int open_tcpip_client(char *ip, int port) {}


x86 assembly (clang, -O0):
<open_tcpip_client>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_tcpip_client>:
ret

LLVM IR (-O0):
define i32 @open_tcpip_client(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @open_tcpip_client(i8* nocapture readnone %0, i32 %1) {
ret i32 undef
}
float GeometryKelemen(float NdotL, float NdotV, float VdotH) {
  return NdotL * NdotV / (VdotH * VdotH);
}


x86 assembly (clang, -O0):
<GeometryKelemen>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
mulss  -0xc(%rbp),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<GeometryKelemen>:
mulss  %xmm1,%xmm0
mulss  %xmm2,%xmm2
divss  %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @GeometryKelemen(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = fmul float %7, %8
%10 = load float, float* %6
%11 = load float, float* %6
%12 = fmul float %10, %11
%13 = fdiv float %9, %12
ret float %13
}

LLVM IR (-O2):
define float @GeometryKelemen(float %0, float %1, float %2) {
%4 = fmul float %0, %1
%5 = fmul float %2, %2
%6 = fdiv float %4, %5
ret float %6
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ print_telephone_words(char *, char *, int /*<<< orphan*/,
                                         int);
int main() {
  char *number = "67012";
  char *tmp = (char *)malloc(7 * sizeof(char));
  print_telephone_words(number, tmp, 0, 5);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    $0x7,%edi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
xor    %edx,%edx
mov    $0x5,%ecx
call   1040 <print_telephone_words@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x7,%edi
call   1030 <malloc@plt>
lea    0xece(%rip),%rdi
mov    %rax,%rsi
xor    %edx,%edx
mov    $0x5,%ecx
call   1040 <print_telephone_words@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"67012\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %2
%4 = call i64 @malloc(i32 7)
%5 = inttoptr i64 %4 to i8*
store i8* %5, i8** %3
%6 = load i8*, i8** %2
%7 = load i8*, i8** %3
%8 = call i32 @print_telephone_words(i8* %6, i8* %7, i32 0, i32 5)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"67012\00"
define i32 @main() {
%1 = tail call i64 @malloc(i32 7)
%2 = inttoptr i64 %1 to i8*
%3 = tail call i32 @print_telephone_words(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %2, i32 0, i32 5)
ret i32 0
}
f_f(float f) {
  void f_d(double);
  f_d(f);
}


x86 assembly (clang, -O0):
<f_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
call   1030 <f_d@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_f>:
cvtss2sd %xmm0,%xmm0
jmp    1030 <f_d@plt>

LLVM IR (-O0):
define i32 @f_f(float %0) {
%2 = alloca i32
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = fpext float %4 to double
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @f_f(float %0) {
%2 = fpext float %0 to double
tail call void @f_d(double %2)
ret i32 undef
}
/* Variables and functions */
scalar_t__ mock(char *);
char *cf_s_seq_pkt(char *s) { return (char *)mock(s); }


x86 assembly (clang, -O0):
<cf_s_seq_pkt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cf_s_seq_pkt>:
jmp    1030 <mock@plt>

LLVM IR (-O0):
define i8* @cf_s_seq_pkt(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @mock(i8* %3)
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}

LLVM IR (-O2):
define i8* @cf_s_seq_pkt(i8* %0) {
%2 = tail call i64 @mock(i8* %0)
%3 = inttoptr i64 %2 to i8*
ret i8* %3
}
/* Variables and functions */
scalar_t__ intlen(int);
size_t bulklen(size_t len) {
  return (size_t)(1 + intlen((int)len) + 2 + (int)len + 2);
}


x86 assembly (clang, -O0):
<bulklen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%edi
call   1030 <intlen@plt>
add    $0x1,%rax
add    $0x2,%rax
mov    -0x8(%rbp),%rcx
movslq %ecx,%rcx
add    %rcx,%rax
add    $0x2,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bulklen>:
push   %rbx
mov    %rdi,%rbx
call   1030 <intlen@plt>
movslq %ebx,%rcx
add    %rcx,%rax
add    $0x5,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @bulklen(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
%5 = call i64 @intlen(i32 %4)
%6 = add nsw i64 1, %5
%7 = add nsw i64 %6, 2
%8 = load i64, i64* %2
%9 = trunc i64 %8 to i32
%10 = sext i32 %9 to i64
%11 = add nsw i64 %7, %10
%12 = add nsw i64 %11, 2
ret i64 %12
}

LLVM IR (-O2):
define i64 @bulklen(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = tail call i64 @intlen(i32 %2)
%4 = shl i64 %0, 32
%5 = ashr exact i64 %4, 32
%6 = add nsw i64 %5, 5
%7 = add i64 %6, %3
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ VIM_SIF_I2cReadByte(unsigned char, unsigned char *);
void SensorGetReg_HV7131RP(unsigned char uAddr, unsigned short *uVal) {
  VIM_SIF_I2cReadByte((unsigned char)uAddr, (unsigned char *)uVal);
}


x86 assembly (clang, -O0):
<SensorGetReg_HV7131RP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x1(%rbp),%al
mov    -0x10(%rbp),%rsi
movzbl %al,%edi
call   1030 <VIM_SIF_I2cReadByte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SensorGetReg_HV7131RP>:
jmp    1030 <VIM_SIF_I2cReadByte@plt>

LLVM IR (-O0):
define void @SensorGetReg_HV7131RP(i8 zeroext %0, i16* %1) {
%3 = alloca i8
%4 = alloca i16*
store i8 %0, i8* %3
store i16* %1, i16** %4
%5 = load i8, i8* %3
%6 = load i16*, i16** %4
%7 = bitcast i16* %6 to i8*
%8 = call i32 @VIM_SIF_I2cReadByte(i8 zeroext %5, i8* %7)
ret void
}

LLVM IR (-O2):
define void @SensorGetReg_HV7131RP(i8 zeroext %0, i16* %1) {
%3 = bitcast i16* %1 to i8*
%4 = tail call i32 @VIM_SIF_I2cReadByte(i8 zeroext %0, i8* %3)
ret void
}
int get() { return 1; }


x86 assembly (clang, -O0):
<get>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @get() {
ret i32 1
}

LLVM IR (-O2):
define i32 @get() {
ret i32 1
}
/* Type definitions */
struct iphdr {
  int /*<<< orphan*/ tos;
};
typedef int /*<<< orphan*/ __u8;

/* Variables and functions */
__u8 ipv4_get_dsfield(const struct iphdr *iph) { return iph->tos; }


x86 assembly (clang, -O0):
<ipv4_get_dsfield>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipv4_get_dsfield>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.iphdr = type { i32 }
define i32 @ipv4_get_dsfield(%struct.iphdr* %0) {
%2 = alloca %struct.iphdr*
store %struct.iphdr* %0, %struct.iphdr** %2
%3 = load %struct.iphdr*, %struct.iphdr** %2
%4 = getelementptr inbounds %struct.iphdr, %struct.iphdr* %3, i32 0, i32 0
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
%struct.iphdr = type { i32 }
define i32 @ipv4_get_dsfield(%struct.iphdr* nocapture %0) {
%2 = getelementptr inbounds %struct.iphdr, %struct.iphdr* %0, i64 0, i32 0
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ quit();
int /*<<< orphan*/ stderr;
void interrupted(int signum) {
  fprintf(stderr, ("\nInterrupted.\n"));
  quit();
  _exit(-1);
}


x86 assembly (clang, -O0):
<interrupted>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2e9e(%rip),%rax
mov    (%rax),%edi
lea    0xeb5(%rip),%rsi
call   1050 <fprintf@plt>
mov    $0x0,%al
call   1040 <quit@plt>
mov    $0xffffffff,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<interrupted>:
push   %rax
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
lea    0xebf(%rip),%rsi
call   1050 <fprintf@plt>
xor    %eax,%eax
call   1040 <quit@plt>
mov    $0xffffffff,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [15 x i8] c"\0AInterrupted.\0A\00"
define void @interrupted(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%5 = call i32 (...) @quit()
%6 = call i32 @_exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [15 x i8] c"\0AInterrupted.\0A\00"
define void @interrupted(i32 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 (...) @quit()
%5 = tail call i32 @_exit(i32 -1)
unreachable
}
int netsnmp_generic_add_row(void *table, void *row) {}


x86 assembly (clang, -O0):
<netsnmp_generic_add_row>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<netsnmp_generic_add_row>:
ret

LLVM IR (-O0):
define i32 @netsnmp_generic_add_row(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @netsnmp_generic_add_row(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 undef
}
int test_imm_79uint32_reg(unsigned int val) {
  return ((val) & (0x79 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_79uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x79,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_79uint32_reg>:
test   $0x79,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_79uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 121
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_79uint32_reg(i32 %0) {
%2 = and i32 %0, 121
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int test1(float a, int b) { return __builtin_isless(a, b); }


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
movss  -0x4(%rbp),%xmm1
cvtsi2ssl -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
cvtsi2ss %edi,%xmm1
xor    %eax,%eax
ucomiss %xmm0,%xmm1
seta   %al
ret

LLVM IR (-O0):
define i32 @test1(float %0, i32 %1) {
%3 = alloca float
%4 = alloca i32
store float %0, float* %3
store i32 %1, i32* %4
%5 = load float, float* %3
%6 = load i32, i32* %4
%7 = sitofp i32 %6 to float
%8 = fcmp olt float %5, %7
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @test1(float %0, i32 %1) {
%3 = sitofp i32 %1 to float
%4 = fcmp ogt float %3, %0
%5 = zext i1 %4 to i32
ret i32 %5
}
int fun_base_2(int a, int b) { return 0; }


x86 assembly (clang, -O0):
<fun_base_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_base_2>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fun_base_2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @fun_base_2(i32 %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
long rand();
long random_value(long min_value, long max_value) {
  return ((min_value >= max_value)
              ? min_value
              : min_value + (rand() % (max_value - min_value + 1)));
}


x86 assembly (clang, -O0):
<random_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jl     113b <random_value+0x2b>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    1166 <random_value+0x56>
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x10(%rbp),%rcx
sub    -0x8(%rbp),%rcx
add    $0x1,%rcx
cqto
idiv   %rcx
mov    -0x20(%rbp),%rax
add    %rdx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_value>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
sub    %rdi,%rbx
jle    1144 <random_value+0x34>
xor    %eax,%eax
call   1030 <rand@plt>
add    $0x1,%rbx
mov    %rax,%rcx
or     %rbx,%rcx
shr    $0x20,%rcx
je     113d <random_value+0x2d>
cqto
idiv   %rbx
jmp    1141 <random_value+0x31>
xor    %edx,%edx
div    %ebx
add    %rdx,%r14
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @random_value(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sge i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %19
10: ; preds = %2
%11 = load i64, i64* %3
%12 = call i64 (...) @rand()
%13 = load i64, i64* %4
%14 = load i64, i64* %3
%15 = sub nsw i64 %13, %14
%16 = add nsw i64 %15, 1
%17 = srem i64 %12, %16
%18 = add nsw i64 %11, %17
br label %19
19: ; preds = %10, %8
%20 = phi i64 [ %9, %8 ], [ %18, %10 ]
ret i64 %20
}

LLVM IR (-O2):
define i64 @random_value(i64 %0, i64 %1) {
%3 = icmp sgt i64 %1, %0
br i1 %3, label %4, label %10
4: ; preds = %2
%5 = tail call i64 (...) @rand()
%6 = sub i64 1, %0
%7 = add i64 %6, %1
%8 = srem i64 %5, %7
%9 = add nsw i64 %8, %0
br label %10
10: ; preds = %2, %4
%11 = phi i64 [ %9, %4 ], [ %0, %2 ]
ret i64 %11
}
/* Variables and functions */
int sci_get_chip_id();
int soc_id_is_sc8735gv0(void) {
  return ((sci_get_chip_id() & (0xFFFFF000)) == ((0x8730b000) & (0xFFFFF000)));
}


x86 assembly (clang, -O0):
<soc_id_is_sc8735gv0>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sci_get_chip_id@plt>
and    $0xfffff000,%eax
cmp    $0x8730b000,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<soc_id_is_sc8735gv0>:
push   %rax
xor    %eax,%eax
call   1030 <sci_get_chip_id@plt>
and    $0xfffff000,%eax
xor    %ecx,%ecx
cmp    $0x8730b000,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @soc_id_is_sc8735gv0() {
%1 = call i32 (...) @sci_get_chip_id()
%2 = and i32 %1, -4096
%3 = icmp eq i32 %2, -2026852352
%4 = zext i1 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @soc_id_is_sc8735gv0() {
%1 = tail call i32 (...) @sci_get_chip_id()
%2 = and i32 %1, -4096
%3 = icmp eq i32 %2, -2026852352
%4 = zext i1 %3 to i32
ret i32 %4
}
int test_imm_ECuint8_reg(unsigned char val) {
  return ((val) & (0xEC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_ECuint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xec,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_ECuint8_reg>:
test   $0xec,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_ECuint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 236
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_ECuint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -20
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int EAC_OBJ_ln2nid(const char *s) { return EAC_OBJ_ln2nid(s); }


x86 assembly (clang, -O0):
<EAC_OBJ_ln2nid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <EAC_OBJ_ln2nid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EAC_OBJ_ln2nid>:
jmp    1100 <EAC_OBJ_ln2nid>

LLVM IR (-O0):
define i32 @EAC_OBJ_ln2nid(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @EAC_OBJ_ln2nid(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @EAC_OBJ_ln2nid(i8* nocapture readnone %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
int main() { return 5 / 4; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
unsigned min(unsigned a, unsigned b, unsigned c) {
  if (a <= b) {
    if (a <= c)
      return a;
    else
      return c;
  }
  if (b <= c)
    return b;
  else
    return c;
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
ja     113b <min+0x3b>
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
ja     1130 <min+0x30>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1158 <min+0x58>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1158 <min+0x58>
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
ja     1152 <min+0x52>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1158 <min+0x58>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %esi,%eax
cmp    %edx,%esi
cmova  %edx,%eax
cmp    %edi,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp ule i32 %8, %9
br i1 %10, label %11, label %19
11: ; preds = %3
%12 = load i32, i32* %5
%13 = load i32, i32* %7
%14 = icmp ule i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = load i32, i32* %5
store i32 %16, i32* %4
br label %27
17: ; preds = %11
%18 = load i32, i32* %7
store i32 %18, i32* %4
br label %27
19: ; preds = %3
%20 = load i32, i32* %6
%21 = load i32, i32* %7
%22 = icmp ule i32 %20, %21
br i1 %22, label %23, label %25
23: ; preds = %19
%24 = load i32, i32* %6
store i32 %24, i32* %4
br label %27
25: ; preds = %19
%26 = load i32, i32* %7
store i32 %26, i32* %4
br label %27
27: ; preds = %25, %23, %17, %15
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1, i32 %2) {
%4 = icmp ugt i32 %1, %2
%5 = select i1 %4, i32 %2, i32 %1
%6 = icmp ult i32 %5, %0
%7 = select i1 %6, i32 %5, i32 %0
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ SIGUSR1;
int /*<<< orphan*/ kill(int /*<<< orphan*/, int /*<<< orphan*/);
void NOTIFY(pid_t pid) { kill(pid, SIGUSR1); }


x86 assembly (clang, -O0):
<NOTIFY>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ec3(%rip),%rax
mov    (%rax),%esi
call   1030 <kill@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NOTIFY>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
jmp    1030 <kill@plt>

LLVM IR (-O0):
@SIGUSR1 = global i32 0
define void @NOTIFY(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIGUSR1
%5 = call i32 @kill(i32 %3, i32 %4)
ret void
}

LLVM IR (-O2):
@SIGUSR1 = global i32 0
define void @NOTIFY(i32 %0) {
%2 = load i32, i32* @SIGUSR1
%3 = tail call i32 @kill(i32 %0, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fatal(char *, int);
void *malloc(int);
void *xmalloc(int size) {
  void *ptr;
  ptr = malloc(size);
  if (ptr)
    return ptr;
  fatal("mDaemon error message: malloc(%d) failed", size);
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     114f <xmalloc+0x2f>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    115e <xmalloc+0x3e>
mov    -0xc(%rbp),%esi
lea    0xea7(%rip),%rdi
call   1040 <fatal@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1140 <xmalloc+0x20>
lea    0xec7(%rip),%rdi
mov    %ebp,%esi
call   1040 <fatal@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [41 x i8] c"mDaemon error message: malloc(%d) failed\00"
define i8* @xmalloc(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i8* @malloc(i32 %5)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i8*, i8** %4
store i8* %10, i8** %2
br label %14
11: ; preds = %1
%12 = load i32, i32* %3
%13 = call i32 @fatal(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 %12)
br label %14
14: ; preds = %11, %9
%15 = load i8*, i8** %2
ret i8* %15
}

LLVM IR (-O2):
@.str = [41 x i8] c"mDaemon error message: malloc(%d) failed\00"
define noalias i8* @xmalloc(i32 %0) {
%2 = tail call i8* @malloc(i32 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @fatal(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 %0)
br label %6
6: ; preds = %1, %4
ret i8* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputc(int, int /*<<< orphan*/ *);
void put8(FILE *f, int c) { fputc((c & 0xff), f); }


x86 assembly (clang, -O0):
<put8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
and    $0xff,%edi
mov    -0x8(%rbp),%rsi
call   1030 <fputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<put8>:
mov    %rdi,%rax
movzbl %sil,%edi
mov    %rax,%rsi
jmp    1030 <fputc@plt>

LLVM IR (-O0):
define void @put8(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 255
%7 = load i32*, i32** %3
%8 = call i32 @fputc(i32 %6, i32* %7)
ret void
}

LLVM IR (-O2):
define void @put8(i32* nocapture %0, i32 %1) {
%3 = and i32 %1, 255
%4 = tail call i32 @fputc(i32 %3, i32* %0)
ret void
}
/* Variables and functions */
double pow(double, int);
double f_c(double ndvi, double ndvi_min, double ndvi_max) {
  if ((ndvi_max - ndvi_min) == 0.0)
    return (pow(ndvi - ndvi_min, 2));
  else
    return (pow(((ndvi - ndvi_min) / (ndvi_max - ndvi_min)), 2));
}


x86 assembly (clang, -O0):
<f_c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  %xmm2,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
subsd  -0x18(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    1162 <f_c+0x52>
jp     1162 <f_c+0x52>
movsd  -0x10(%rbp),%xmm0
subsd  -0x18(%rbp),%xmm0
mov    $0x2,%edi
call   1030 <pow@plt>
movsd  %xmm0,-0x8(%rbp)
jmp    1189 <f_c+0x79>
movsd  -0x10(%rbp),%xmm0
subsd  -0x18(%rbp),%xmm0
movsd  -0x20(%rbp),%xmm1
subsd  -0x18(%rbp),%xmm1
divsd  %xmm1,%xmm0
mov    $0x2,%edi
call   1030 <pow@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_c>:
subsd  %xmm1,%xmm2
subsd  %xmm1,%xmm0
xorpd  %xmm1,%xmm1
cmpeqsd %xmm2,%xmm1
movsd  0xed7(%rip),%xmm3
andpd  %xmm1,%xmm3
andnpd %xmm2,%xmm1
orpd   %xmm1,%xmm3
divsd  %xmm3,%xmm0
mov    $0x2,%edi
jmp    1030 <pow@plt>

LLVM IR (-O0):
define double @f_c(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
%8 = load double, double* %7
%9 = load double, double* %6
%10 = fsub double %8, %9
%11 = fcmp oeq double %10, 0.000000e+00
br i1 %11, label %12, label %17
12: ; preds = %3
%13 = load double, double* %5
%14 = load double, double* %6
%15 = fsub double %13, %14
%16 = call double @pow(double %15, i32 2)
store double %16, double* %4
br label %26
17: ; preds = %3
%18 = load double, double* %5
%19 = load double, double* %6
%20 = fsub double %18, %19
%21 = load double, double* %7
%22 = load double, double* %6
%23 = fsub double %21, %22
%24 = fdiv double %20, %23
%25 = call double @pow(double %24, i32 2)
store double %25, double* %4
br label %26
26: ; preds = %17, %12
%27 = load double, double* %4
ret double %27
}

LLVM IR (-O2):
define double @f_c(double %0, double %1, double %2) {
%4 = fsub double %2, %1
%5 = fcmp oeq double %4, 0.000000e+00
%6 = fsub double %0, %1
%7 = select i1 %5, double 1.000000e+00, double %4
%8 = fdiv double %6, %7
%9 = tail call double @pow(double %8, i32 2)
ret double %9
}
int do_077() { return 77; }


x86 assembly (clang, -O0):
<do_077>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4d,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_077>:
mov    $0x4d,%eax
ret

LLVM IR (-O0):
define i32 @do_077() {
ret i32 77
}

LLVM IR (-O2):
define i32 @do_077() {
ret i32 77
}
double divide(double a, double b) { return a / b; }


x86 assembly (clang, -O0):
<divide>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
divsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<divide>:
divsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @divide(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fdiv double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @divide(double %0, double %1) {
%3 = fdiv double %0, %1
ret double %3
}
long int fab(long int n) {
  if ((n == 0) || (n == 1))
    return (n);
  else
    return (fab(n - 2) + fab(n - 1));
}


x86 assembly (clang, -O0):
<fab>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1132 <fab+0x22>
cmpq   $0x1,-0x10(%rbp)
jne    113f <fab+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    116b <fab+0x5b>
mov    -0x10(%rbp),%rdi
sub    $0x2,%rdi
call   1030 <fab@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
sub    $0x1,%rdi
call   1030 <fab@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fab>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %r14d,%r14d
cmp    $0x2,%rdi
jb     113b <fab+0x2b>
lea    -0x2(%rbx),%rdi
call   1030 <fab@plt>
add    $0xffffffffffffffff,%rbx
add    %rax,%r14
cmp    $0x1,%rbx
ja     1120 <fab+0x10>
mov    $0x1,%ebx
add    %rbx,%r14
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @fab(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp eq i64 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i64, i64* %3
%8 = icmp eq i64 %7, 1
br i1 %8, label %9, label %11
9: ; preds = %6, %1
%10 = load i64, i64* %3
store i64 %10, i64* %2
br label %19
11: ; preds = %6
%12 = load i64, i64* %3
%13 = sub nsw i64 %12, 2
%14 = call i64 @fab(i64 %13)
%15 = load i64, i64* %3
%16 = sub nsw i64 %15, 1
%17 = call i64 @fab(i64 %16)
%18 = add nsw i64 %14, %17
store i64 %18, i64* %2
br label %19
19: ; preds = %11, %9
%20 = load i64, i64* %2
ret i64 %20
}

LLVM IR (-O2):
define i64 @fab(i64 %0) {
%2 = icmp ult i64 %0, 2
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %8, %3 ], [ %0, %1 ]
%5 = phi i64 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i64 %4, -2
%7 = tail call i64 @fab(i64 %6)
%8 = add nsw i64 %4, -1
%9 = add nsw i64 %7, %5
%10 = icmp ult i64 %8, 2
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i64 [ 0, %1 ], [ %9, %3 ]
%13 = phi i64 [ %0, %1 ], [ 1, %3 ]
%14 = add nsw i64 %13, %12
ret i64 %14
}
int execute_setpgid() { return 0; }


x86 assembly (clang, -O0):
<execute_setpgid>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_setpgid>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_setpgid() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_setpgid() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "usage: ypset [-d domain] [-h host] server\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [43 x i8] c"usage: ypset [-d domain] [-h host] server\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [43 x i8] c"usage: ypset [-d domain] [-h host] server\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ base_of_client_free_data(void *);
void free_data(void *data) { base_of_client_free_data(data); }


x86 assembly (clang, -O0):
<free_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <base_of_client_free_data@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_data>:
jmp    1030 <base_of_client_free_data@plt>

LLVM IR (-O0):
define void @free_data(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @base_of_client_free_data(i8* %3)
ret void
}

LLVM IR (-O2):
define void @free_data(i8* %0) {
%2 = tail call i32 @base_of_client_free_data(i8* %0)
ret void
}
void proc_nr_files(void) { nsc_assert(0, __func__); }


x86 assembly (clang, -O0):
<proc_nr_files>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
mov    $0x0,%al
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<proc_nr_files>:
lea    0xee9(%rip),%rsi
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
@__func__.proc_nr_files = [14 x i8] c"proc_nr_files\00"
define void @proc_nr_files() {
%1 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @__func__.proc_nr_files, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.proc_nr_files = [14 x i8] c"proc_nr_files\00"
define void @proc_nr_files() {
%1 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @__func__.proc_nr_files, i64 0, i64 0))
ret void
}
void algorithm_test(void) {}


x86 assembly (clang, -O0):
<algorithm_test>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<algorithm_test>:
ret

LLVM IR (-O0):
define void @algorithm_test() {
ret void
}

LLVM IR (-O2):
define void @algorithm_test() {
ret void
}
__attribute__((no)) void foo(long *sa, int n) {
  int i;
  for (i = 0; i < n; i++)
    sa[i] = 0;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    113c <foo+0x3c>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movq   $0x0,(%rax,%rcx,8)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1112 <foo+0x12>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
test   %esi,%esi
jle    1126 <foo+0x16>
push   %rax
mov    %esi,%edx
shl    $0x3,%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @foo(i64* %0, i32 %1) {
%3 = alloca i64*
%4 = alloca i32
%5 = alloca i32
store i64* %0, i64** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %15, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load i64*, i64** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i64, i64* %11, i64 %13
store i64 0, i64* %14
br label %15
15: ; preds = %10
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
br label %6
18: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @foo(i64* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = bitcast i64* %0 to i8*
%6 = zext i32 %1 to i64
%7 = shl nuw nsw i64 %6, 3
br label %8
8: ; preds = %4, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free_expression(void *);
void free_pattern(void *pat) {
  if (pat == NULL || pat == ((void *)(-1)) || pat == ((void *)(-2)) ||
      pat == ((void *)(-3)))
    return;
  free_expression(pat);
}


x86 assembly (clang, -O0):
<free_pattern>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     115a <free_pattern+0x4a>
mov    $0xffffffffffffffff,%rax
cmp    %rax,-0x8(%rbp)
je     115a <free_pattern+0x4a>
mov    $0xfffffffffffffffe,%rax
cmp    %rax,-0x8(%rbp)
je     115a <free_pattern+0x4a>
mov    $0xfffffffffffffffd,%rax
cmp    %rax,-0x8(%rbp)
jne    115f <free_pattern+0x4f>
jmp    1168 <free_pattern+0x58>
mov    -0x8(%rbp),%rdi
call   1030 <free_expression@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_pattern>:
lea    0x3(%rdi),%rax
cmp    $0x4,%rax
jae    111b <free_pattern+0xb>
ret
jmp    1030 <free_expression@plt>

LLVM IR (-O0):
define void @free_pattern(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
br i1 %4, label %14, label %5
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = icmp eq i8* %6, inttoptr (i64 -1 to i8*)
br i1 %7, label %14, label %8
8: ; preds = %5
%9 = load i8*, i8** %2
%10 = icmp eq i8* %9, inttoptr (i64 -2 to i8*)
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = load i8*, i8** %2
%13 = icmp eq i8* %12, inttoptr (i64 -3 to i8*)
br i1 %13, label %14, label %15
14: ; preds = %11, %8, %5, %1
br label %18
15: ; preds = %11
%16 = load i8*, i8** %2
%17 = call i32 @free_expression(i8* %16)
br label %18
18: ; preds = %15, %14
ret void
}

LLVM IR (-O2):
define void @free_pattern(i8* %0) {
%2 = ptrtoint i8* %0 to i64
switch i64 %2, label %3 [
i64 -1, label %5
i64 -2, label %5
i64 -3, label %5
i64 0, label %5
]
3: ; preds = %1
%4 = tail call i32 @free_expression(i8* %0)
br label %5
5: ; preds = %1, %1, %1, %1, %3
ret void
}
/* Type definitions */
struct gstr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ str_append(struct gstr *, char const *);
void expr_print_gstr_helper(void *data, const char *str) {
  str_append((struct gstr *)data, str);
}


x86 assembly (clang, -O0):
<expr_print_gstr_helper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <str_append@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expr_print_gstr_helper>:
jmp    1030 <str_append@plt>

LLVM IR (-O0):
%struct.gstr = type { i32 }
define void @expr_print_gstr_helper(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to %struct.gstr*
%7 = load i8*, i8** %4
%8 = call i32 @str_append(%struct.gstr* %6, i8* %7)
ret void
}

LLVM IR (-O2):
%struct.gstr = type { i32 }
define void @expr_print_gstr_helper(i8* %0, i8* %1) {
%3 = bitcast i8* %0 to %struct.gstr*
%4 = tail call i32 @str_append(%struct.gstr* %3, i8* %1)
ret void
}
int ValidGenerator(int gen) {
  switch (gen) {
  case 0:
  case 1:
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<ValidGenerator>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
ja     1124 <ValidGenerator+0x24>
jmp    1118 <ValidGenerator+0x18>
movl   $0x1,-0x4(%rbp)
jmp    112b <ValidGenerator+0x2b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ValidGenerator>:
xor    %eax,%eax
cmp    $0x2,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @ValidGenerator(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 0, label %5
i32 1, label %5
]
5: ; preds = %1, %1
store i32 1, i32* %2
br label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @ValidGenerator(i32 %0) {
%2 = icmp ult i32 %0, 2
%3 = zext i1 %2 to i32
ret i32 %3
}
char test_char_4(char a, char b, char c, char d) { return 0xc9; }


x86 assembly (clang, -O0):
<test_char_4>:
push   %rbp
mov    %rsp,%rbp
mov    %cl,%al
mov    %dl,%cl
mov    %sil,%dl
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %dl,-0x2(%rbp)
mov    %cl,-0x3(%rbp)
mov    %al,-0x4(%rbp)
mov    $0xc9,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_char_4>:
mov    $0xc9,%al
ret

LLVM IR (-O0):
define signext i8 @test_char_4(i8 signext %0, i8 signext %1, i8 signext %2, i8 signext %3) {
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8 %0, i8* %5
store i8 %1, i8* %6
store i8 %2, i8* %7
store i8 %3, i8* %8
ret i8 -55
}

LLVM IR (-O2):
define signext i8 @test_char_4(i8 signext %0, i8 signext %1, i8 signext %2, i8 signext %3) {
ret i8 -55
}