xunge/DecIR huggingface dataset:
/* Variables and functions */
int FE_ALL_EXCEPT;
int get_fpc();
int /*<<< orphan*/ set_fpc(int);
int feclearexcept(int mask) {
  mask &= FE_ALL_EXCEPT;
  set_fpc(get_fpc() & ~mask);
  return 0;
}


x86 assembly (clang, -O0):
<feclearexcept>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2eae(%rip),%rax
mov    (%rax),%eax
and    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <get_fpc@plt>
mov    %eax,%edi
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
and    %eax,%edi
call   1030 <set_fpc@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<feclearexcept>:
push   %rbx
mov    %edi,%ebx
mov    0x2eb6(%rip),%rax
and    (%rax),%ebx
xor    %eax,%eax
call   1040 <get_fpc@plt>
not    %ebx
and    %eax,%ebx
mov    %ebx,%edi
call   1030 <set_fpc@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@FE_ALL_EXCEPT = global i32 0
define i32 @feclearexcept(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @FE_ALL_EXCEPT
%4 = load i32, i32* %2
%5 = and i32 %4, %3
store i32 %5, i32* %2
%6 = call i32 (...) @get_fpc()
%7 = load i32, i32* %2
%8 = xor i32 %7, -1
%9 = and i32 %6, %8
%10 = call i32 @set_fpc(i32 %9)
ret i32 0
}

LLVM IR (-O2):
@FE_ALL_EXCEPT = global i32 0
define i32 @feclearexcept(i32 %0) {
%2 = load i32, i32* @FE_ALL_EXCEPT
%3 = and i32 %2, %0
%4 = tail call i32 (...) @get_fpc()
%5 = xor i32 %3, -1
%6 = and i32 %4, %5
%7 = tail call i32 @set_fpc(i32 %6)
ret i32 0
}
void testCNarrowing() {
  float a = {222222222222L};
  long b = 222222222222L;
  float c = {b};
}


x86 assembly (clang, -O0):
<testCNarrowing>:
push   %rbp
mov    %rsp,%rbp
movss  0xef4(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
movabs $0x33bd7a038e,%rax
mov    %rax,-0x10(%rbp)
cvtsi2ssq -0x10(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<testCNarrowing>:
ret

LLVM IR (-O0):
define void @testCNarrowing() {
%1 = alloca float
%2 = alloca i64
%3 = alloca float
store float 0x4249DEBD00000000, float* %1
store i64 222222222222, i64* %2
%4 = load i64, i64* %2
%5 = sitofp i64 %4 to float
store float %5, float* %3
ret void
}

LLVM IR (-O2):
define void @testCNarrowing() {
ret void
}
void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}


x86 assembly (clang, -O0):
<hw_resend_irq>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<hw_resend_irq>:
ret

LLVM IR (-O0):
%struct.hw_interrupt_type = type opaque
define void @hw_resend_irq(%struct.hw_interrupt_type* %0, i32 %1) {
%3 = alloca %struct.hw_interrupt_type*
%4 = alloca i32
store %struct.hw_interrupt_type* %0, %struct.hw_interrupt_type** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.hw_interrupt_type = type opaque
define void @hw_resend_irq(%struct.hw_interrupt_type* nocapture %0, i32 %1) {
ret void
}
float rangelimitf(float x, float min, float max) {
  if (x < min)
    x = min;
  if (x > max)
    x = max;
  return x;
}


x86 assembly (clang, -O0):
<rangelimitf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1130 <rangelimitf+0x30>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    1149 <rangelimitf+0x49>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<rangelimitf>:
maxss  %xmm0,%xmm1
minss  %xmm1,%xmm2
movaps %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @rangelimitf(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = fcmp olt float %7, %8
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load float, float* %5
store float %11, float* %4
br label %12
12: ; preds = %10, %3
%13 = load float, float* %4
%14 = load float, float* %6
%15 = fcmp ogt float %13, %14
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load float, float* %6
store float %17, float* %4
br label %18
18: ; preds = %16, %12
%19 = load float, float* %4
ret float %19
}

LLVM IR (-O2):
define float @rangelimitf(float %0, float %1, float %2) {
%4 = fcmp olt float %0, %1
%5 = select i1 %4, float %1, float %0
%6 = fcmp ogt float %5, %2
%7 = select i1 %6, float %2, float %5
ret float %7
}
/* Variables and functions */
int /*<<< orphan*/ SDHC_DriverIRQHandler();
__attribute__((weak)) void SDHC_IRQHandler(void) { SDHC_DriverIRQHandler(); }


x86 assembly (clang, -O0):
<SDHC_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <SDHC_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SDHC_IRQHandler>:
xor    %eax,%eax
jmp    1030 <SDHC_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @SDHC_IRQHandler() {
%1 = call i32 (...) @SDHC_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @SDHC_IRQHandler() {
%1 = tail call i32 (...) @SDHC_DriverIRQHandler()
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ printf(char *, int);
void foo(int **a) {
  int *b = (int *)malloc(sizeof(*b));
  *b = 1;
  *a = b;
  printf("before a = %d\n", **a);
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%esi
lea    0xea1(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbx
mov    %rdi,%rbx
mov    $0x4,%edi
call   1040 <malloc@plt>
movl   $0x1,(%rax)
mov    %rax,(%rbx)
lea    0xec2(%rip),%rdi
mov    $0x1,%esi
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"before a = %d\0A\00"
define void @foo(i32** %0) {
%2 = alloca i32**
%3 = alloca i32*
store i32** %0, i32*** %2
%4 = call i64 @malloc(i32 4)
%5 = inttoptr i64 %4 to i32*
store i32* %5, i32** %3
%6 = load i32*, i32** %3
store i32 1, i32* %6
%7 = load i32*, i32** %3
%8 = load i32**, i32*** %2
store i32* %7, i32** %8
%9 = load i32**, i32*** %2
%10 = load i32*, i32** %9
%11 = load i32, i32* %10
%12 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %11)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"before a = %d\0A\00"
define void @foo(i32** nocapture writeonly %0) {
%2 = tail call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32 1, i32* %3
store i32* %3, i32** %0
%4 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}
/* Variables and functions */
double __ocml_len3_f64(double, double, double);
double norm3d(double x, double y, double z) { return __ocml_len3_f64(x, y, z); }


x86 assembly (clang, -O0):
<norm3d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
call   1030 <__ocml_len3_f64@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<norm3d>:
jmp    1030 <__ocml_len3_f64@plt>

LLVM IR (-O0):
define double @norm3d(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = load double, double* %6
%10 = call double @__ocml_len3_f64(double %7, double %8, double %9)
ret double %10
}

LLVM IR (-O2):
define double @norm3d(double %0, double %1, double %2) {
%4 = tail call double @__ocml_len3_f64(double %0, double %1, double %2)
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ printw(char *);
void ion_cmd_who() { printw("\n\rwho command\n\r\n\r"); }


x86 assembly (clang, -O0):
<ion_cmd_who>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printw@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ion_cmd_who>:
lea    0xee9(%rip),%rdi
jmp    1030 <printw@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"\0A\0Dwho command\0A\0D\0A\0D\00"
define void @ion_cmd_who() {
%1 = call i32 @printw(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"\0A\0Dwho command\0A\0D\0A\0D\00"
define void @ion_cmd_who() {
%1 = tail call i32 @printw(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret void
}
int SPMCSR(void) { return 0x37; }


x86 assembly (clang, -O0):
<SPMCSR>:
push   %rbp
mov    %rsp,%rbp
mov    $0x37,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPMCSR>:
mov    $0x37,%eax
ret

LLVM IR (-O0):
define i32 @SPMCSR() {
ret i32 55
}

LLVM IR (-O2):
define i32 @SPMCSR() {
ret i32 55
}
/* Variables and functions */
unsigned char si475xFMRX_get_rssi();
unsigned char si47xxFMRX_get_rssi(void) { return si475xFMRX_get_rssi(); }


x86 assembly (clang, -O0):
<si47xxFMRX_get_rssi>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <si475xFMRX_get_rssi@plt>
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<si47xxFMRX_get_rssi>:
xor    %eax,%eax
jmp    1030 <si475xFMRX_get_rssi@plt>

LLVM IR (-O0):
define zeroext i8 @si47xxFMRX_get_rssi() {
%1 = call zeroext i8 (...) @si475xFMRX_get_rssi()
ret i8 %1
}

LLVM IR (-O2):
define zeroext i8 @si47xxFMRX_get_rssi() {
%1 = tail call zeroext i8 (...) @si475xFMRX_get_rssi()
ret i8 %1
}
/* Variables and functions */
int /*<<< orphan*/ yas_kxdm_write_reg_byte(int, int);
int yas_kxdm_power_down(void) {
  yas_kxdm_write_reg_byte(0x20, 0x07);
  yas_kxdm_write_reg_byte(0x23, 0);
  return (0);
}


x86 assembly (clang, -O0):
<yas_kxdm_power_down>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20,%edi
mov    $0x7,%esi
call   1030 <yas_kxdm_write_reg_byte@plt>
mov    $0x23,%edi
xor    %esi,%esi
call   1030 <yas_kxdm_write_reg_byte@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<yas_kxdm_power_down>:
push   %rax
mov    $0x20,%edi
mov    $0x7,%esi
call   1030 <yas_kxdm_write_reg_byte@plt>
mov    $0x23,%edi
xor    %esi,%esi
call   1030 <yas_kxdm_write_reg_byte@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @yas_kxdm_power_down() {
%1 = call i32 @yas_kxdm_write_reg_byte(i32 32, i32 7)
%2 = call i32 @yas_kxdm_write_reg_byte(i32 35, i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @yas_kxdm_power_down() {
%1 = tail call i32 @yas_kxdm_write_reg_byte(i32 32, i32 7)
%2 = tail call i32 @yas_kxdm_write_reg_byte(i32 35, i32 0)
ret i32 0
}
int global_init() { return 0; }


x86 assembly (clang, -O0):
<global_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<global_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @global_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @global_init() {
ret i32 0
}
void fa28(void) {
a:
  ({
    P01A:
      goto P01A;
      ({
        p012A:
          goto p012A;
          goto a;
        P012A:
          goto P012A;
          0;
      });
    P01B:
      goto P01B;
      ({
        P013A:
          goto P013A;
          0;
      });
    P01C:
      goto P01C;
      0;
  });
P0B:
  goto P0B;
  ({
    P02A:
      goto P02A;
      ({
        P024A:
          goto P024A;
          0;
      });
    P02B:
      goto P02B;
      ({
        P025A:
          goto P025A;
          0;
      });
    P02C:
      goto P02C;
      0;
  });
P0C:
  goto P0C;
  0;
P0D:
  goto P0D;
}


x86 assembly (clang, -O0):
<fa28>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <fa28+0x9>
jmp    1109 <fa28+0x9>

x86 assembly (clang, -O2):
<fa28>:
jmp    1100 <fa28>

LLVM IR (-O0):
define void @fa28() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
br label %7
7: ; preds = %0
br label %8
8: ; preds = %8, %7
br label %8
9: ; No predecessors!
br label %10
10: ; preds = %10, %9
br label %10
11: ; preds = %11
br label %11
12: ; preds = %12
br label %12
13: ; No predecessors!
br label %14
14: ; preds = %14, %13
br label %14
15: ; preds = %15
br label %15
16: ; preds = %16
br label %16
17: ; No predecessors!
br label %18
18: ; preds = %18, %17
br label %18
19: ; No predecessors!
br label %20
20: ; preds = %20, %19
br label %20
21: ; preds = %21
br label %21
22: ; No predecessors!
br label %23
23: ; preds = %23, %22
br label %23
24: ; preds = %24
br label %24
25: ; preds = %25
br label %25
26: ; preds = %26
br label %26
}

LLVM IR (-O2):
define void @fa28() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ UARTBaseValid(unsigned long);
unsigned long UARTTxIntModeGet(unsigned long ulBase) {
  DEBUG_ASSERT(UARTBaseValid(ulBase));
  return ((*((volatile unsigned long *)(ulBase + 0x00000030))) &
          (0x00000010 | 0x00000000));
}


x86 assembly (clang, -O0):
<UARTTxIntModeGet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <UARTBaseValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
mov    0x30(%rax),%rax
and    $0x10,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTTxIntModeGet>:
push   %rbx
mov    %rdi,%rbx
call   1040 <UARTBaseValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    0x30(%rbx),%rax
and    $0x10,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @UARTTxIntModeGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @UARTBaseValid(i64 %3)
%5 = call i32 @DEBUG_ASSERT(i32 %4)
%6 = load i64, i64* %2
%7 = add i64 %6, 48
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = and i64 %9, 16
ret i64 %10
}

LLVM IR (-O2):
define i64 @UARTTxIntModeGet(i64 %0) {
%2 = tail call i32 @UARTBaseValid(i64 %0)
%3 = tail call i32 @DEBUG_ASSERT(i32 %2)
%4 = add i64 %0, 48
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, 16
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
int /*<<< orphan*/ nrerror(char *);
void free_dvector(double *v, long nl, long nh) {
  if (nh < 0)
    nrerror("free_vector; nh must be >=0");
  free((char *)(v + nl - 1));
}


x86 assembly (clang, -O0):
<free_dvector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jge    114b <free_dvector+0x2b>
lea    0xeba(%rip),%rdi
call   1040 <nrerror@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
shl    $0x3,%rax
add    %rax,%rdi
add    $0xfffffffffffffff8,%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_dvector>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
test   %rdx,%rdx
jns    113b <free_dvector+0x1b>
lea    0xeca(%rip),%rdi
call   1040 <nrerror@plt>
lea    (%rbx,%r14,8),%rdi
add    $0xfffffffffffffff8,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"free_vector; nh must be >=0\00"
define void @free_dvector(double* %0, i64 %1, i64 %2) {
%4 = alloca double*
%5 = alloca i64
%6 = alloca i64
store double* %0, double** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %6
%8 = icmp slt i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %3
%10 = call i32 @nrerror(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %3
%12 = load double*, double** %4
%13 = load i64, i64* %5
%14 = getelementptr inbounds double, double* %12, i64 %13
%15 = getelementptr inbounds double, double* %14, i64 -1
%16 = bitcast double* %15 to i8*
%17 = call i32 @free(i8* %16)
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c"free_vector; nh must be >=0\00"
define void @free_dvector(double* nocapture %0, i64 %1, i64 %2) {
%4 = icmp slt i64 %2, 0
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 @nrerror(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %3
%8 = getelementptr inbounds double, double* %0, i64 %1
%9 = getelementptr inbounds double, double* %8, i64 -1
%10 = bitcast double* %9 to i8*
%11 = tail call i32 @free(i8* %10)
ret void
}
void ff_hevc_put_hevc_uni_epel_v48_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_epel_v48_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_epel_v48_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_epel_v48_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_epel_v48_10_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char const *, int);
int /*<<< orphan*/ memset(char *, int /*<<< orphan*/, int);
void _copy_name(char *name, const char *buffer, size_t sz) {
  if (sz < 16) {
    memcpy(name, buffer, sz);
    memset(name + sz, 0, 16 - sz);
  } else {
    memcpy(name, buffer, 16);
  }
}


x86 assembly (clang, -O0):
<_copy_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x10,-0x18(%rbp)
jae    1171 <_copy_name+0x51>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rax
mov    %eax,%edx
call   1040 <memcpy@plt>
mov    -0x8(%rbp),%rdi
add    -0x18(%rbp),%rdi
mov    $0x10,%eax
sub    -0x18(%rbp),%rax
mov    %eax,%edx
xor    %esi,%esi
call   1030 <memset@plt>
jmp    1183 <_copy_name+0x63>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x10,%edx
call   1040 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_copy_name>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
cmp    $0xf,%rdx
ja     1153 <_copy_name+0x33>
mov    %rdx,%rbx
mov    %r14,%rdi
call   1040 <memcpy@plt>
add    %rbx,%r14
mov    $0x10,%edx
sub    %ebx,%edx
mov    %r14,%rdi
xor    %esi,%esi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <memset@plt>
mov    %r14,%rdi
mov    $0x10,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <memcpy@plt>

LLVM IR (-O0):
define void @_copy_name(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i64, i64* %6
%8 = icmp ult i64 %7, 16
br i1 %8, label %9, label %22
9: ; preds = %3
%10 = load i8*, i8** %4
%11 = load i8*, i8** %5
%12 = load i64, i64* %6
%13 = trunc i64 %12 to i32
%14 = call i32 @memcpy(i8* %10, i8* %11, i32 %13)
%15 = load i8*, i8** %4
%16 = load i64, i64* %6
%17 = getelementptr inbounds i8, i8* %15, i64 %16
%18 = load i64, i64* %6
%19 = sub i64 16, %18
%20 = trunc i64 %19 to i32
%21 = call i32 @memset(i8* %17, i32 0, i32 %20)
br label %26
22: ; preds = %3
%23 = load i8*, i8** %4
%24 = load i8*, i8** %5
%25 = call i32 @memcpy(i8* %23, i8* %24, i32 16)
br label %26
26: ; preds = %22, %9
ret void
}

LLVM IR (-O2):
define void @_copy_name(i8* %0, i8* %1, i64 %2) {
%4 = icmp ult i64 %2, 16
br i1 %4, label %5, label %11
5: ; preds = %3
%6 = trunc i64 %2 to i32
%7 = tail call i32 @memcpy(i8* %0, i8* %1, i32 %6)
%8 = getelementptr inbounds i8, i8* %0, i64 %2
%9 = sub nuw nsw i32 16, %6
%10 = tail call i32 @memset(i8* %8, i32 0, i32 %9)
br label %13
11: ; preds = %3
%12 = tail call i32 @memcpy(i8* %0, i8* %1, i32 16)
br label %13
13: ; preds = %11, %5
ret void
}
int pfpu_is_reserved(int reg) {
  return (reg == (0)) || (reg == (1)) || (reg == (2)) || (reg == (127));
}


x86 assembly (clang, -O0):
<pfpu_is_reserved>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <pfpu_is_reserved+0x3e>
mov    $0x1,%al
cmpl   $0x1,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <pfpu_is_reserved+0x3e>
mov    $0x1,%al
cmpl   $0x2,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <pfpu_is_reserved+0x3e>
cmpl   $0x7f,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pfpu_is_reserved>:
cmp    $0x3,%edi
setb   %al
cmp    $0x7f,%edi
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @pfpu_is_reserved(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 0
br i1 %4, label %14, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 1
br i1 %7, label %14, label %8
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 2
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 127
br label %14
14: ; preds = %11, %8, %5, %1
%15 = phi i1 [ true, %8 ], [ true, %5 ], [ true, %1 ], [ %13, %11 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @pfpu_is_reserved(i32 %0) {
%2 = icmp ult i32 %0, 3
%3 = icmp eq i32 %0, 127
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int interrupt(int, int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/,
              int /*<<< orphan*/);
char readChar() { return interrupt(0x16, 0, 0, 0, 0) & 0xFF; }


x86 assembly (clang, -O0):
<readChar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x16,%edi
xor    %r8d,%r8d
mov    %r8d,%esi
mov    %r8d,%edx
mov    %r8d,%ecx
call   1030 <interrupt@plt>
and    $0xff,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readChar>:
push   %rax
mov    $0x16,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
call   1030 <interrupt@plt>
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @readChar() {
%1 = call i32 @interrupt(i32 22, i32 0, i32 0, i32 0, i32 0)
%2 = and i32 %1, 255
%3 = trunc i32 %2 to i8
ret i8 %3
}

LLVM IR (-O2):
define signext i8 @readChar() {
%1 = tail call i32 @interrupt(i32 22, i32 0, i32 0, i32 0, i32 0)
%2 = trunc i32 %1 to i8
ret i8 %2
}
/* Type definitions */
struct pci_dev {
  int dummy;
};

/* Variables and functions */
int pci_read_long(struct pci_dev *, int);
int via_init_spi(struct pci_dev *, int);
int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) {
  return via_init_spi(dev, pci_read_long(dev, 0xbc) << 8);
}


x86 assembly (clang, -O0):
<enable_flash_vt8237s_spi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xbc,%esi
call   1040 <pci_read_long@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
shl    $0x8,%esi
call   1030 <via_init_spi@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<enable_flash_vt8237s_spi>:
push   %rbx
mov    %rdi,%rbx
mov    $0xbc,%esi
call   1040 <pci_read_long@plt>
shl    $0x8,%eax
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1030 <via_init_spi@plt>

LLVM IR (-O0):
%struct.pci_dev = type { i32 }
define i32 @enable_flash_vt8237s_spi(%struct.pci_dev* %0, i8* %1) {
%3 = alloca %struct.pci_dev*
%4 = alloca i8*
store %struct.pci_dev* %0, %struct.pci_dev** %3
store i8* %1, i8** %4
%5 = load %struct.pci_dev*, %struct.pci_dev** %3
%6 = load %struct.pci_dev*, %struct.pci_dev** %3
%7 = call i32 @pci_read_long(%struct.pci_dev* %6, i32 188)
%8 = shl i32 %7, 8
%9 = call i32 @via_init_spi(%struct.pci_dev* %5, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
%struct.pci_dev = type { i32 }
define i32 @enable_flash_vt8237s_spi(%struct.pci_dev* %0, i8* nocapture readnone %1) {
%3 = tail call i32 @pci_read_long(%struct.pci_dev* %0, i32 188)
%4 = shl i32 %3, 8
%5 = tail call i32 @via_init_spi(%struct.pci_dev* %0, i32 %4)
ret i32 %5
}
int test_imm_12uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x12 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_12uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x12,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_12uint64_midword_reg>:
test   $0x120000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_12uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 18
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_12uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 1179648
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ volatile uint8_t;

/* Variables and functions */
void volatile_fetch_or_u8(uint8_t *dest, uint8_t val) {
  *((volatile uint8_t *)dest) |= val;
}


x86 assembly (clang, -O0):
<volatile_fetch_or_u8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<volatile_fetch_or_u8>:
mov    %esi,-0x4(%rsp)
mov    -0x4(%rsp),%eax
or     %eax,(%rdi)
ret

LLVM IR (-O0):
define void @volatile_fetch_or_u8(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store volatile i32 %1, i32* %4
%5 = load volatile i32, i32* %4
%6 = load i32*, i32** %3
%7 = load volatile i32, i32* %6
%8 = or i32 %7, %5
store volatile i32 %8, i32* %6
ret void
}

LLVM IR (-O2):
define void @volatile_fetch_or_u8(i32* %0, i32 %1) {
%3 = alloca i32
store volatile i32 %1, i32* %3
%4 = load volatile i32, i32* %3
%5 = load volatile i32, i32* %0
%6 = or i32 %5, %4
store volatile i32 %6, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ help(int /*<<< orphan*/);
int /*<<< orphan*/ interpretar(int, char **);
int main(int argc, char *argv[]) {
  if (argc == 1)
    help(0);
  else
    interpretar(argc, argv);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    114c <main+0x2c>
xor    %edi,%edi
call   1030 <help@plt>
jmp    1158 <main+0x38>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <interpretar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x1,%edi
jne    112f <main+0xf>
xor    %edi,%edi
call   1030 <help@plt>
jmp    1134 <main+0x14>
call   1040 <interpretar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 @help(i32 0)
br label %14
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i8**, i8*** %5
%13 = call i32 @interpretar(i32 %11, i8** %12)
br label %14
14: ; preds = %10, %8
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = icmp eq i32 %0, 1
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @help(i32 0)
br label %8
6: ; preds = %2
%7 = tail call i32 @interpretar(i32 %0, i8** %1)
br label %8
8: ; preds = %6, %4
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, char *, char *);
char *strdup(char *);
char *get_sys_string(char *table_name, char *attribute_name) {
  char buffer[1024];
  sprintf(buffer,
          "echo \"alter table %s drop %s;\"	|"
          "sql.e 2>&1 				|"
          "html_paragraph_wrapper",
          table_name, attribute_name);
  return strdup(buffer);
}


x86 assembly (clang, -O0):
<get_sys_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x410,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x410(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xeb7(%rip),%rsi
call   1030 <sprintf@plt>
lea    -0x410(%rbp),%rdi
call   1040 <strdup@plt>
add    $0x410,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_sys_string>:
push   %rbx
sub    $0x400,%rsp
mov    %rsi,%rcx
mov    %rdi,%rdx
lea    0xecb(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1030 <sprintf@plt>
mov    %rbx,%rdi
call   1040 <strdup@plt>
add    $0x400,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [71 x i8] c"echo \22alter table %s drop %s;\22\09|sql.e 2>&1 \09\09\09\09|html_paragraph_wrapper\00"
define i8* @get_sys_string(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca [1024 x i8]
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = getelementptr inbounds [1024 x i8], [1024 x i8]* %5, i64 0, i64 0
%7 = load i8*, i8** %3
%8 = load i8*, i8** %4
%9 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([71 x i8], [71 x i8]* @.str, i64 0, i64 0), i8* %7, i8* %8)
%10 = getelementptr inbounds [1024 x i8], [1024 x i8]* %5, i64 0, i64 0
%11 = call i8* @strdup(i8* %10)
ret i8* %11
}

LLVM IR (-O2):
@.str = [71 x i8] c"echo \22alter table %s drop %s;\22\09|sql.e 2>&1 \09\09\09\09|html_paragraph_wrapper\00"
define noalias i8* @get_sys_string(i8* %0, i8* %1) {
%3 = alloca [1024 x i8]
%4 = getelementptr inbounds [1024 x i8], [1024 x i8]* %3, i64 0, i64 0
%5 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([71 x i8], [71 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%6 = call i8* @strdup(i8* %4)
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ Recurse();
int /*<<< orphan*/ c(char *);
void TailRecurse() {
  c("r>");
  c("drop");
  Recurse();
}


x86 assembly (clang, -O0):
<TailRecurse>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <c@plt>
lea    0xecc(%rip),%rdi
call   1040 <c@plt>
mov    $0x0,%al
call   1030 <Recurse@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TailRecurse>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <c@plt>
lea    0xecf(%rip),%rdi
call   1040 <c@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <Recurse@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"r>\00"
@.str.1 = [5 x i8] c"drop\00"
define void @TailRecurse() {
%1 = call i32 @c(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @c(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 (...) @Recurse()
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"r>\00"
@.str.1 = [5 x i8] c"drop\00"
define void @TailRecurse() {
%1 = tail call i32 @c(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @c(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 (...) @Recurse()
ret void
}
/* Variables and functions */
int EOF;
int getchar();
int /*<<< orphan*/ printf(char *, int);
main() {
  int c;
  while (c != EOF) {
    c = getchar();
    printf("%d", c);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%eax
mov    0x2eaf(%rip),%rcx
cmp    (%rcx),%eax
je     115f <main+0x3f>
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeab(%rip),%rdi
call   1030 <printf@plt>
jmp    112f <main+0xf>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r14
push   %rbx
lea    0xed5(%rip),%r14
mov    0x2eb6(%rip),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
xor    %eax,%eax
call   1040 <getchar@plt>
mov    %eax,%ebp
mov    %r14,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
cmp    (%rbx),%ebp
jne    1140 <main+0x20>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@EOF = global i32 0
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %7, %0
%4 = load i32, i32* %2
%5 = load i32, i32* @EOF
%6 = icmp ne i32 %4, %5
br i1 %6, label %7, label %11
7: ; preds = %3
%8 = call i32 (...) @getchar()
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %9)
br label %3
11: ; preds = %3
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
@EOF = global i32 0
@.str = [3 x i8] c"%d\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 (...) @getchar()
%3 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = load i32, i32* @EOF
%5 = icmp eq i32 %2, %4
br i1 %5, label %6, label %1
6: ; preds = %1
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ do_trans(char *, char *);
int main(int argc, char **argv) {
  if (argc == 3)
    do_trans(argv[1], argv[2]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x3,-0x8(%rbp)
jne    1145 <main+0x35>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
mov    -0x10(%rbp),%rax
mov    0x10(%rax),%rsi
call   1030 <do_trans@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
cmp    $0x3,%edi
jne    1127 <main+0x17>
push   %rax
mov    0x8(%rsi),%rdi
mov    0x10(%rsi),%rsi
call   1030 <do_trans@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 3
br i1 %7, label %8, label %16
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 1
%11 = load i8*, i8** %10
%12 = load i8**, i8*** %5
%13 = getelementptr inbounds i8*, i8** %12, i64 2
%14 = load i8*, i8** %13
%15 = call i32 @do_trans(i8* %11, i8* %14)
br label %16
16: ; preds = %8, %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 3
br i1 %3, label %4, label %10
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = getelementptr inbounds i8*, i8** %1, i64 2
%8 = load i8*, i8** %7
%9 = tail call i32 @do_trans(i8* %6, i8* %8)
br label %10
10: ; preds = %4, %2
ret i32 0
}
void TC5_IRQHandler(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<TC5_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <TC5_IRQHandler+0x9>
jmp    1109 <TC5_IRQHandler+0x9>

x86 assembly (clang, -O2):
<TC5_IRQHandler>:
jmp    1100 <TC5_IRQHandler>

LLVM IR (-O0):
define void @TC5_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @TC5_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
scalar_t__ second_smallest(int *, int);
int test_one_element() {
  int input[] = {0};
  return second_smallest(input, 1) == 0;
}


x86 assembly (clang, -O0):
<test_one_element>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
lea    -0x4(%rbp),%rdi
mov    $0x1,%esi
call   1040 <second_smallest@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_one_element>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rdi
mov    $0x1,%esi
call   1030 <second_smallest@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @test_one_element() {
%1 = alloca [1 x i32]
%2 = bitcast [1 x i32]* %1 to i8*
%3 = getelementptr inbounds [1 x i32], [1 x i32]* %1, i64 0, i64 0
%4 = call i64 @second_smallest(i32* %3, i32 1)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @test_one_element() {
%1 = alloca [1 x i32]
%2 = bitcast [1 x i32]* %1 to i8*
%3 = getelementptr inbounds [1 x i32], [1 x i32]* %1, i64 0, i64 0
store i32 0, i32* %3
%4 = call i64 @second_smallest(i32* %3, i32 1)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int rand();
void init_IDX(int *IDX, int reserved) {
  int i;
  for (i = 0; i < 16383; i++) {
    IDX[i] = reserved + rand() % (128 - reserved);
  }
}


x86 assembly (clang, -O0):
<init_IDX>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x3fff,-0x10(%rbp)
jge    116b <init_IDX+0x5b>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x80,%ecx
sub    -0xc(%rbp),%ecx
cltd
idiv   %ecx
mov    %edx,%eax
mov    -0x14(%rbp),%edx
add    %eax,%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <init_IDX+0x16>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_IDX>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %esi,%r15d
mov    %rdi,%r14
mov    $0x80,%ebp
sub    %esi,%ebp
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %ebp
add    %r15d,%edx
mov    %edx,(%r14,%rbx,4)
add    $0x1,%rbx
cmp    $0x3fff,%rbx
jne    1130 <init_IDX+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @init_IDX(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %20, %2
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 16383
br i1 %8, label %9, label %23
9: ; preds = %6
%10 = load i32, i32* %4
%11 = call i32 (...) @rand()
%12 = load i32, i32* %4
%13 = sub nsw i32 128, %12
%14 = srem i32 %11, %13
%15 = add nsw i32 %10, %14
%16 = load i32*, i32** %3
%17 = load i32, i32* %5
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i32, i32* %16, i64 %18
store i32 %15, i32* %19
br label %20
20: ; preds = %9
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
store i32 %22, i32* %5
br label %6
23: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @init_IDX(i32* nocapture writeonly %0, i32 %1) {
%3 = sub nsw i32 128, %1
br label %4
4: ; preds = %2, %4
%5 = phi i64 [ 0, %2 ], [ %10, %4 ]
%6 = tail call i32 (...) @rand()
%7 = srem i32 %6, %3
%8 = add nsw i32 %7, %1
%9 = getelementptr inbounds i32, i32* %0, i64 %5
store i32 %8, i32* %9
%10 = add nuw nsw i64 %5, 1
%11 = icmp eq i64 %10, 16383
br i1 %11, label %12, label %4
12: ; preds = %4
ret void
}
/* Variables and functions */
int visibility();
int visibility_check() { return visibility() == 2; }


x86 assembly (clang, -O0):
<visibility_check>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <visibility@plt>
cmp    $0x2,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<visibility_check>:
push   %rax
xor    %eax,%eax
call   1030 <visibility@plt>
xor    %ecx,%ecx
cmp    $0x2,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @visibility_check() {
%1 = call i32 (...) @visibility()
%2 = icmp eq i32 %1, 2
%3 = zext i1 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @visibility_check() {
%1 = tail call i32 (...) @visibility()
%2 = icmp eq i32 %1, 2
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ blinkdash();
int /*<<< orphan*/ blinkdot();
int /*<<< orphan*/ sleep(double);
int blinkK() {
  blinkdash();
  blinkdot();
  blinkdash();
  sleep(1.5);
  return 0;
}


x86 assembly (clang, -O0):
<blinkK>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <blinkdash@plt>
mov    $0x0,%al
call   1030 <blinkdot@plt>
mov    $0x0,%al
call   1040 <blinkdash@plt>
movsd  0xeaf(%rip),%xmm0
call   1050 <sleep@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<blinkK>:
push   %rax
xor    %eax,%eax
call   1040 <blinkdash@plt>
xor    %eax,%eax
call   1030 <blinkdot@plt>
xor    %eax,%eax
call   1040 <blinkdash@plt>
movsd  0xeb2(%rip),%xmm0
call   1050 <sleep@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @blinkK() {
%1 = call i32 (...) @blinkdash()
%2 = call i32 (...) @blinkdot()
%3 = call i32 (...) @blinkdash()
%4 = call i32 @sleep(double 1.500000e+00)
ret i32 0
}

LLVM IR (-O2):
define i32 @blinkK() {
%1 = tail call i32 (...) @blinkdash()
%2 = tail call i32 (...) @blinkdot()
%3 = tail call i32 (...) @blinkdash()
%4 = tail call i32 @sleep(double 1.500000e+00)
ret i32 0
}
/* Variables and functions */
scalar_t__ LZ4_compressBound(int);
int LZ4_compressHC_limitedOutput(char const *, char *, int, scalar_t__);
int LZ4_compressHC(const char *source, char *dest, int inputSize) {
  return LZ4_compressHC_limitedOutput(source, dest, inputSize,
                                      LZ4_compressBound(inputSize) + 1);
}


x86 assembly (clang, -O0):
<LZ4_compressHC>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%edi
call   1030 <LZ4_compressBound@plt>
mov    -0x28(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x18(%rbp),%edx
mov    %rax,%rcx
add    $0x1,%rcx
call   1040 <LZ4_compressHC_limitedOutput@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZ4_compressHC>:
push   %r15
push   %r14
push   %rbx
mov    %edx,%ebx
mov    %rsi,%r14
mov    %rdi,%r15
mov    %edx,%edi
call   1030 <LZ4_compressBound@plt>
lea    0x1(%rax),%rcx
mov    %r15,%rdi
mov    %r14,%rsi
mov    %ebx,%edx
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <LZ4_compressHC_limitedOutput@plt>

LLVM IR (-O0):
define i32 @LZ4_compressHC(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = load i32, i32* %6
%11 = call i64 @LZ4_compressBound(i32 %10)
%12 = add nsw i64 %11, 1
%13 = call i32 @LZ4_compressHC_limitedOutput(i8* %7, i8* %8, i32 %9, i64 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @LZ4_compressHC(i8* %0, i8* %1, i32 %2) {
%4 = tail call i64 @LZ4_compressBound(i32 %2)
%5 = add nsw i64 %4, 1
%6 = tail call i32 @LZ4_compressHC_limitedOutput(i8* %0, i8* %1, i32 %2, i64 %5)
ret i32 %6
}
int ConsumirDato(int dato, double *total) { *total = *total + dato; }


x86 assembly (clang, -O0):
<ConsumirDato>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
cvtsi2sdl -0x8(%rbp),%xmm1
addsd  %xmm1,%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ConsumirDato>:
cvtsi2sd %edi,%xmm0
addsd  (%rsi),%xmm0
movsd  %xmm0,(%rsi)
ret

LLVM IR (-O0):
define i32 @ConsumirDato(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca double*
store i32 %0, i32* %4
store double* %1, double** %5
%6 = load double*, double** %5
%7 = load double, double* %6
%8 = load i32, i32* %4
%9 = sitofp i32 %8 to double
%10 = fadd double %7, %9
%11 = load double*, double** %5
store double %10, double* %11
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @ConsumirDato(i32 %0, double* nocapture %1) {
%3 = load double, double* %1
%4 = sitofp i32 %0 to double
%5 = fadd double %3, %4
store double %5, double* %1
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Hello World!\n");
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e9e(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"Hello World!\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @EXIT_SUCCESS
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
@str = [13 x i8] c"Hello World!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
%3 = tail call i32 @exit(i32 %2)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ write(char *);
int zero() {
  write("0\n");
  return 0;
}


x86 assembly (clang, -O0):
<zero>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <write@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zero>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <write@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"0\0A\00"
define i32 @zero() {
%1 = call i32 @write(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"0\0A\00"
define i32 @zero() {
%1 = tail call i32 @write(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void my_int_func(int x) { printf("%d\n", x); }


x86 assembly (clang, -O0):
<my_int_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_int_func>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @my_int_func(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @my_int_func(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
char *getenv(char *);
int /*<<< orphan*/ printf(char *, ...);
int main(int argc, char *argv[]) {
  char *chArr;
  if (NULL != getenv(argv[1])) {
    chArr = getenv(argv[1]);
    printf("%s\n", chArr);
  } else {
    printf("don't have this Envi\n");
  }
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <getenv@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
je     1189 <main+0x59>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <getenv@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
lea    0xe83(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
jmp    1197 <main+0x67>
lea    0xe74(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rdi
call   1030 <getenv@plt>
test   %rax,%rax
jne    1148 <main+0x18>
lea    0xeba(%rip),%rdi
jmp    114b <main+0x1b>
mov    %rax,%rdi
call   1040 <puts@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [22 x i8] c"don't have this Envi\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i8**, i8*** %5
%8 = getelementptr inbounds i8*, i8** %7, i64 1
%9 = load i8*, i8** %8
%10 = call i8* @getenv(i8* %9)
%11 = icmp ne i8* null, %10
br i1 %11, label %12, label %19
12: ; preds = %2
%13 = load i8**, i8*** %5
%14 = getelementptr inbounds i8*, i8** %13, i64 1
%15 = load i8*, i8** %14
%16 = call i8* @getenv(i8* %15)
store i8* %16, i8** %6
%17 = load i8*, i8** %6
%18 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %17)
br label %21
19: ; preds = %2
%20 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0))
br label %21
21: ; preds = %19, %12
%22 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [21 x i8] c"don't have this Envi\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i8* @getenv(i8* %4)
%6 = icmp eq i8* %5, null
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = tail call i32 @puts(i8* %5)
br label %11
9: ; preds = %2
%10 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
br label %11
11: ; preds = %9, %7
%12 = tail call i32 @exit(i32 0)
unreachable
}