xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ malloc(scalar_t__);
int /*<<< orphan*/ strcat(char *, char const *);
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
char *concat_strings(const char *a, const char *b) {
  char *new = (char *)malloc(strlen(a) + strlen(b) + 1);
  strcpy(new, a);
  strcat(new, b);
  return new;
}


x86 assembly (clang, -O0):
<concat_strings>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x20(%rbp),%rdi
add    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1060 <strcat@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<concat_strings>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%r12
call   1040 <strlen@plt>
mov    %rax,%r15
mov    %r14,%rdi
call   1040 <strlen@plt>
lea    (%r15,%rax,1),%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r12,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1060 <strcat@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @concat_strings(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i64 @strlen(i8* %6)
%8 = load i8*, i8** %4
%9 = call i64 @strlen(i8* %8)
%10 = add nsw i64 %7, %9
%11 = add nsw i64 %10, 1
%12 = call i64 @malloc(i64 %11)
%13 = inttoptr i64 %12 to i8*
store i8* %13, i8** %5
%14 = load i8*, i8** %5
%15 = load i8*, i8** %3
%16 = call i32 @strcpy(i8* %14, i8* %15)
%17 = load i8*, i8** %5
%18 = load i8*, i8** %4
%19 = call i32 @strcat(i8* %17, i8* %18)
%20 = load i8*, i8** %5
ret i8* %20
}

LLVM IR (-O2):
define i8* @concat_strings(i8* %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%5 = add i64 %3, 1
%6 = add i64 %5, %4
%7 = tail call i64 @malloc(i64 %6)
%8 = inttoptr i64 %7 to i8*
%9 = tail call i32 @strcpy(i8* %8, i8* %0)
%10 = tail call i32 @strcat(i8* %8, i8* %1)
ret i8* %8
}
int fun229() { return 229; }


x86 assembly (clang, -O0):
<fun229>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun229>:
mov    $0xe5,%eax
ret

LLVM IR (-O0):
define i32 @fun229() {
ret i32 229
}

LLVM IR (-O2):
define i32 @fun229() {
ret i32 229
}
void bar2() {}


x86 assembly (clang, -O0):
<bar2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar2>:
ret

LLVM IR (-O0):
define void @bar2() {
ret void
}

LLVM IR (-O2):
define void @bar2() {
ret void
}
/* Variables and functions */
int are_equal(int *, int *, int);
int /*<<< orphan*/ calculate(int *, int *, int);
int test_one_zero() {
  int input[] = {4, 7, 0, 1, 5};
  int expected[] = {0, 0, 140, 0, 0};
  int output[5];
  calculate(input, output, 5);
  return are_equal(output, expected, 5);
}


x86 assembly (clang, -O0):
<test_one_zero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    0xed1(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xece(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xecc(%rip),%eax
mov    %eax,-0x10(%rbp)
mov    0xed2(%rip),%rax
mov    %rax,-0x40(%rbp)
mov    0xecf(%rip),%rax
mov    %rax,-0x38(%rbp)
mov    0xecd(%rip),%eax
mov    %eax,-0x30(%rbp)
lea    -0x20(%rbp),%rdi
lea    -0x60(%rbp),%rsi
mov    $0x5,%edx
call   1030 <calculate@plt>
lea    -0x60(%rbp),%rdi
lea    -0x40(%rbp),%rsi
mov    $0x5,%edx
call   1040 <are_equal@plt>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_one_zero>:
push   %rbx
sub    $0x60,%rsp
mov    0xee5(%rip),%eax
mov    %eax,0x30(%rsp)
movaps 0xeca(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
mov    0xeef(%rip),%eax
mov    %eax,0x10(%rsp)
movaps 0xed4(%rip),%xmm0
movaps %xmm0,(%rsp)
lea    0x20(%rsp),%rdi
lea    0x40(%rsp),%rbx
mov    %rbx,%rsi
mov    $0x5,%edx
call   1030 <calculate@plt>
mov    %rsp,%rsi
mov    %rbx,%rdi
mov    $0x5,%edx
call   1040 <are_equal@plt>
add    $0x60,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.test_one_zero.input = [5 x i32] [i32 4, i32 7, i32 0, i32 1, i32 5]
@__const.test_one_zero.expected = [5 x i32] [i32 0, i32 0, i32 140, i32 0, i32 0]
define i32 @test_one_zero() {
%1 = alloca [5 x i32]
%2 = alloca [5 x i32]
%3 = alloca [5 x i32]
%4 = bitcast [5 x i32]* %1 to i8*
%5 = bitcast [5 x i32]* %2 to i8*
%6 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%7 = getelementptr inbounds [5 x i32], [5 x i32]* %3, i64 0, i64 0
%8 = call i32 @calculate(i32* %6, i32* %7, i32 5)
%9 = getelementptr inbounds [5 x i32], [5 x i32]* %3, i64 0, i64 0
%10 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%11 = call i32 @are_equal(i32* %9, i32* %10, i32 5)
ret i32 %11
}

LLVM IR (-O2):
@__const.test_one_zero.input = [5 x i32] [i32 4, i32 7, i32 0, i32 1, i32 5]
@__const.test_one_zero.expected = [5 x i32] [i32 0, i32 0, i32 140, i32 0, i32 0]
define i32 @test_one_zero() {
%1 = alloca [5 x i32]
%2 = alloca [5 x i32]
%3 = alloca [5 x i32]
%4 = bitcast [5 x i32]* %1 to i8*
%5 = bitcast [5 x i32]* %2 to i8*
%6 = bitcast [5 x i32]* %3 to i8*
%7 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%8 = getelementptr inbounds [5 x i32], [5 x i32]* %3, i64 0, i64 0
%9 = call i32 @calculate(i32* %7, i32* %8, i32 5)
%10 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%11 = call i32 @are_equal(i32* %8, i32* %10, i32 5)
ret i32 %11
}
/* Type definitions */
typedef int uint8_t;
struct cmsghdr {
  int dummy;
};

/* Variables and functions */
scalar_t__ CMSG_DATA(struct cmsghdr const *);
int /*<<< orphan*/ printf(char *, int const);
void print_tos(const struct cmsghdr *c) {
  const uint8_t *tos = (const uint8_t *)CMSG_DATA(c);
  printf("IP_TOS, {tos=%x}", *tos);
}


x86 assembly (clang, -O0):
<print_tos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <CMSG_DATA@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
lea    0xeba(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_tos>:
push   %rax
call   1030 <CMSG_DATA@plt>
mov    (%rax),%esi
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1040 <printf@plt>

LLVM IR (-O0):
%struct.cmsghdr = type { i32 }
@.str = [17 x i8] c"IP_TOS, {tos=%x}\00"
define void @print_tos(%struct.cmsghdr* %0) {
%2 = alloca %struct.cmsghdr*
%3 = alloca i32*
store %struct.cmsghdr* %0, %struct.cmsghdr** %2
%4 = load %struct.cmsghdr*, %struct.cmsghdr** %2
%5 = call i64 @CMSG_DATA(%struct.cmsghdr* %4)
%6 = inttoptr i64 %5 to i32*
store i32* %6, i32** %3
%7 = load i32*, i32** %3
%8 = load i32, i32* %7
%9 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %8)
ret void
}

LLVM IR (-O2):
%struct.cmsghdr = type { i32 }
@.str = [17 x i8] c"IP_TOS, {tos=%x}\00"
define void @print_tos(%struct.cmsghdr* %0) {
%2 = tail call i64 @CMSG_DATA(%struct.cmsghdr* %0)
%3 = inttoptr i64 %2 to i32*
%4 = load i32, i32* %3
%5 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}
/* Variables and functions */
#define EBUSY 129
#define EINVAL 128
const char *err_to_str(int errnum) {
  switch (errnum) {
  case 0:
    return "success";
  case EBUSY:
    return "EBUSY";
  case EINVAL:
    return "EINVAL";
  default:
    return "?";
  }
}


x86 assembly (clang, -O0):
<err_to_str>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
test   %eax,%eax
je     1140 <err_to_str+0x40>
jmp    111a <err_to_str+0x1a>
mov    -0x10(%rbp),%eax
sub    $0x80,%eax
je     1160 <err_to_str+0x60>
jmp    112d <err_to_str+0x2d>
mov    -0x10(%rbp),%eax
sub    $0x81,%eax
je     1150 <err_to_str+0x50>
jmp    1170 <err_to_str+0x70>
lea    0xeb9(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    117b <err_to_str+0x7b>
lea    0xeb1(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    117b <err_to_str+0x7b>
lea    0xea7(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    117b <err_to_str+0x7b>
lea    0xe9e(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<err_to_str>:
test   %edi,%edi
je     111c <err_to_str+0x1c>
cmp    $0x80,%edi
je     1124 <err_to_str+0x24>
cmp    $0x81,%edi
jne    112c <err_to_str+0x2c>
lea    0xeed(%rip),%rax
ret
lea    0xedd(%rip),%rax
ret
lea    0xee3(%rip),%rax
ret
lea    0xee2(%rip),%rax
ret

LLVM IR (-O0):
@.str = [8 x i8] c"success\00"
@.str.1 = [6 x i8] c"EBUSY\00"
@.str.2 = [7 x i8] c"EINVAL\00"
@.str.3 = [2 x i8] c"?\00"
define i8* @err_to_str(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %8 [
i32 0, label %5
i32 129, label %6
i32 128, label %7
]
5: ; preds = %1
store i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8** %2
br label %9
6: ; preds = %1
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %9
7: ; preds = %1
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.2, i64 0, i64 0), i8** %2
br label %9
8: ; preds = %1
store i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i64 0, i64 0), i8** %2
br label %9
9: ; preds = %8, %7, %6, %5
%10 = load i8*, i8** %2
ret i8* %10
}

LLVM IR (-O2):
@.str = [8 x i8] c"success\00"
@.str.1 = [6 x i8] c"EBUSY\00"
@.str.2 = [7 x i8] c"EINVAL\00"
@.str.3 = [2 x i8] c"?\00"
define i8* @err_to_str(i32 %0) {
switch i32 %0, label %4 [
i32 0, label %5
i32 129, label %2
i32 128, label %3
]
2: ; preds = %1
br label %5
3: ; preds = %1
br label %5
4: ; preds = %1
br label %5
5: ; preds = %1, %4, %3, %2
%6 = phi i8* [ getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i64 0, i64 0), %4 ], [ getelementptr inbounds ([7 x i8], [7 x i8]* @.str.2, i64 0, i64 0), %3 ], [ getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), %2 ], [ getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), %1 ]
ret i8* %6
}
int test_imm_7Fint16_reg(short val) {
  return ((val) & (-0x7F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Fint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffff81,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Fint16_reg>:
test   $0xff81,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Fint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -127
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_7Fint16_reg(i16 signext %0) {
%2 = and i16 %0, -127
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ ssize_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ free(char *);
scalar_t__ getline(char **, size_t *, int /*<<< orphan*/ *);
char *_getline(FILE *__stream) {
  char *__lineptr = NULL;
  size_t __n = 0;
  ssize_t __ssize_t = getline(&__lineptr, &__n, __stream);
  if (__ssize_t < 0) {
    free(__lineptr);
    __lineptr = NULL;
  }
  return __lineptr;
}


x86 assembly (clang, -O0):
<_getline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rdx
lea    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1040 <getline@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jge    116d <_getline+0x4d>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_getline>:
sub    $0x18,%rsp
mov    %rdi,%rdx
movq   $0x0,0x8(%rsp)
movq   $0x0,0x10(%rsp)
lea    0x8(%rsp),%rdi
lea    0x10(%rsp),%rsi
call   1040 <getline@plt>
mov    %rax,%rcx
mov    0x8(%rsp),%rax
test   %rcx,%rcx
js     115a <_getline+0x3a>
add    $0x18,%rsp
ret
mov    %rax,%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i8* @_getline(i32* %0) {
%2 = alloca i32*
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i32* %0, i32** %2
store i8* null, i8** %3
store i64 0, i64* %4
%6 = load i32*, i32** %2
%7 = call i64 @getline(i8** %3, i64* %4, i32* %6)
store i64 %7, i64* %5
%8 = load i64, i64* %5
%9 = icmp slt i64 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load i8*, i8** %3
%12 = call i32 @free(i8* %11)
store i8* null, i8** %3
br label %13
13: ; preds = %10, %1
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
define i8* @_getline(i32* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = bitcast i8** %2 to i8*
store i8* null, i8** %2
%5 = bitcast i64* %3 to i8*
store i64 0, i64* %3
%6 = call i64 @getline(i8** %2, i64* %3, i32* %0)
%7 = icmp slt i64 %6, 0
%8 = load i8*, i8** %2
br i1 %7, label %9, label %11
9: ; preds = %1
%10 = call i32 @free(i8* %8)
br label %11
11: ; preds = %1, %9
%12 = phi i8* [ null, %9 ], [ %8, %1 ]
ret i8* %12
}
/* Type definitions */
struct rx_nfa_edge {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(char *);
void rx_free_nfa_edge(struct rx_nfa_edge *e) { free((char *)e); }


x86 assembly (clang, -O0):
<rx_free_nfa_edge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rx_free_nfa_edge>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.rx_nfa_edge = type { i32 }
define void @rx_free_nfa_edge(%struct.rx_nfa_edge* %0) {
%2 = alloca %struct.rx_nfa_edge*
store %struct.rx_nfa_edge* %0, %struct.rx_nfa_edge** %2
%3 = load %struct.rx_nfa_edge*, %struct.rx_nfa_edge** %2
%4 = bitcast %struct.rx_nfa_edge* %3 to i8*
%5 = call i32 @free(i8* %4)
ret void
}

LLVM IR (-O2):
%struct.rx_nfa_edge = type { i32 }
define void @rx_free_nfa_edge(%struct.rx_nfa_edge* nocapture %0) {
%2 = bitcast %struct.rx_nfa_edge* %0 to i8*
%3 = tail call i32 @free(i8* %2)
ret void
}
int abs(int j) { return (j < 0) ? (-j) : j; }


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    111e <abs+0x1e>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1124 <abs+0x24>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = sub nsw i32 0, %6
br label %10
8: ; preds = %1
%9 = load i32, i32* %2
br label %10
10: ; preds = %8, %5
%11 = phi i32 [ %7, %5 ], [ %9, %8 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
/* Type definitions */
struct sqlConnection {
  int dummy;
};
struct slInt {
  int dummy;
};

/* Variables and functions */
struct slInt *matchingExtId(struct sqlConnection *, char *, char *);
struct slInt *visiGeneSelectRefSeq(struct sqlConnection *conn, char *acc) {
  return matchingExtId(conn, acc, "refSeq");
}


x86 assembly (clang, -O0):
<visiGeneSelectRefSeq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    0xed1(%rip),%rdx
call   1030 <matchingExtId@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<visiGeneSelectRefSeq>:
lea    0xee9(%rip),%rdx
jmp    1030 <matchingExtId@plt>

LLVM IR (-O0):
%struct.slInt = type { i32 }
%struct.sqlConnection = type { i32 }
@.str = [7 x i8] c"refSeq\00"
define %struct.slInt* @visiGeneSelectRefSeq(%struct.sqlConnection* %0, i8* %1) {
%3 = alloca %struct.sqlConnection*
%4 = alloca i8*
store %struct.sqlConnection* %0, %struct.sqlConnection** %3
store i8* %1, i8** %4
%5 = load %struct.sqlConnection*, %struct.sqlConnection** %3
%6 = load i8*, i8** %4
%7 = call %struct.slInt* @matchingExtId(%struct.sqlConnection* %5, i8* %6, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret %struct.slInt* %7
}

LLVM IR (-O2):
%struct.slInt = type { i32 }
%struct.sqlConnection = type { i32 }
@.str = [7 x i8] c"refSeq\00"
define %struct.slInt* @visiGeneSelectRefSeq(%struct.sqlConnection* %0, i8* %1) {
%3 = tail call %struct.slInt* @matchingExtId(%struct.sqlConnection* %0, i8* %1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret %struct.slInt* %3
}
int nop() { return (1); }


x86 assembly (clang, -O0):
<nop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nop>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @nop() {
ret i32 1
}

LLVM IR (-O2):
define i32 @nop() {
ret i32 1
}
/* Type definitions */
struct pkt_t {
  int dummy;
};
typedef size_t ssize_t;

/* Variables and functions */
void utcp_log_send_error(const struct pkt_t *pkt, size_t len, ssize_t sent,
                         bool drop) {
  if (sent != len) {
    if (sent > len) {
      ;
    } else if (sent >= 0) {
      ;
    } else if (sent == -2) {
      ;
    } else {
      ;
    }
  } else if (drop) {
    ;
  }
}


x86 assembly (clang, -O0):
<utcp_log_send_error>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
je     1168 <utcp_log_send_error+0x68>
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jbe    1134 <utcp_log_send_error+0x34>
jmp    1163 <utcp_log_send_error+0x63>
cmpq   $0x0,-0x18(%rbp)
jb     1144 <utcp_log_send_error+0x44>
jmp    115e <utcp_log_send_error+0x5e>
cmpq   $0xfffffffffffffffe,-0x18(%rbp)
jne    1154 <utcp_log_send_error+0x54>
jmp    1159 <utcp_log_send_error+0x59>
jmp    1159 <utcp_log_send_error+0x59>
jmp    115e <utcp_log_send_error+0x5e>
jmp    1163 <utcp_log_send_error+0x63>
jmp    117c <utcp_log_send_error+0x7c>
cmpl   $0x0,-0x1c(%rbp)
je     1177 <utcp_log_send_error+0x77>
jmp    1177 <utcp_log_send_error+0x77>
jmp    117c <utcp_log_send_error+0x7c>
pop    %rbp
ret

x86 assembly (clang, -O2):
<utcp_log_send_error>:
ret

LLVM IR (-O0):
%struct.pkt_t = type { i32 }
define void @utcp_log_send_error(%struct.pkt_t* %0, i64 %1, i64 %2, i32 %3) {
%5 = alloca %struct.pkt_t*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i32
store %struct.pkt_t* %0, %struct.pkt_t** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i32 %3, i32* %8
%9 = load i64, i64* %7
%10 = load i64, i64* %6
%11 = icmp ne i64 %9, %10
br i1 %11, label %12, label %29
12: ; preds = %4
%13 = load i64, i64* %7
%14 = load i64, i64* %6
%15 = icmp ugt i64 %13, %14
br i1 %15, label %16, label %17
16: ; preds = %12
br label %28
17: ; preds = %12
%18 = load i64, i64* %7
%19 = icmp uge i64 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %17
br label %27
21: ; preds = %17
%22 = load i64, i64* %7
%23 = icmp eq i64 %22, -2
br i1 %23, label %24, label %25
24: ; preds = %21
br label %26
25: ; preds = %21
br label %26
26: ; preds = %25, %24
br label %27
27: ; preds = %26, %20
br label %28
28: ; preds = %27, %16
br label %34
29: ; preds = %4
%30 = load i32, i32* %8
%31 = icmp ne i32 %30, 0
br i1 %31, label %32, label %33
32: ; preds = %29
br label %33
33: ; preds = %32, %29
br label %34
34: ; preds = %33, %28
ret void
}

LLVM IR (-O2):
%struct.pkt_t = type { i32 }
define void @utcp_log_send_error(%struct.pkt_t* nocapture %0, i64 %1, i64 %2, i32 %3) {
ret void
}
/* Type definitions */
struct Cache {
  int dummy;
};

/* Variables and functions */
scalar_t__ malloc(int);
struct Cache **initializeCacheHashTable(int cacheSize) {
  struct Cache **cache =
      (struct Cache **)malloc(cacheSize * sizeof(struct Cache *));
  for (int i = 0; i < cacheSize; i++) {
    cache[i] = (struct Cache *)0;
  }
  return cache;
}


x86 assembly (clang, -O0):
<initializeCacheHashTable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
shl    $0x3,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    115f <initializeCacheHashTable+0x4f>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movq   $0x0,(%rax,%rcx,8)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1135 <initializeCacheHashTable+0x25>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initializeCacheHashTable>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
lea    0x0(,%rbx,8),%edi
call   1040 <malloc@plt>
mov    %rax,%r14
test   %ebx,%ebx
jle    1149 <initializeCacheHashTable+0x29>
mov    %ebx,%edx
shl    $0x3,%rdx
mov    %r14,%rdi
xor    %esi,%esi
call   1030 <memset@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.Cache = type { i32 }
define %struct.Cache** @initializeCacheHashTable(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.Cache**
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = sext i32 %5 to i64
%7 = mul i64 %6, 8
%8 = trunc i64 %7 to i32
%9 = call i64 @malloc(i32 %8)
%10 = inttoptr i64 %9 to %struct.Cache**
store %struct.Cache** %10, %struct.Cache*** %3
store i32 0, i32* %4
br label %11
11: ; preds = %20, %1
%12 = load i32, i32* %4
%13 = load i32, i32* %2
%14 = icmp slt i32 %12, %13
br i1 %14, label %15, label %23
15: ; preds = %11
%16 = load %struct.Cache**, %struct.Cache*** %3
%17 = load i32, i32* %4
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds %struct.Cache*, %struct.Cache** %16, i64 %18
store %struct.Cache* null, %struct.Cache** %19
br label %20
20: ; preds = %15
%21 = load i32, i32* %4
%22 = add nsw i32 %21, 1
store i32 %22, i32* %4
br label %11
23: ; preds = %11
%24 = load %struct.Cache**, %struct.Cache*** %3
ret %struct.Cache** %24
}

LLVM IR (-O2):
%struct.Cache = type { i32 }
define %struct.Cache** @initializeCacheHashTable(i32 %0) {
%2 = shl i32 %0, 3
%3 = tail call i64 @malloc(i32 %2)
%4 = icmp sgt i32 %0, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = inttoptr i64 %3 to i8*
%7 = zext i32 %0 to i64
%8 = shl nuw nsw i64 %7, 3
br label %9
9: ; preds = %5, %1
%10 = inttoptr i64 %3 to %struct.Cache**
ret %struct.Cache** %10
}
int get_max_message_size() { return 0; }


x86 assembly (clang, -O0):
<get_max_message_size>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_max_message_size>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_max_message_size() {
ret i32 0
}

LLVM IR (-O2):
define i32 @get_max_message_size() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *, int);
void HariMain(void) {
  printf("hello, world : %s %d\n", "aaa", 10);
  exit(0);
}


x86 assembly (clang, -O0):
<HariMain>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xee4(%rip),%rsi
mov    $0xa,%edx
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<HariMain>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xee7(%rip),%rsi
mov    $0xa,%edx
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"hello, world : %s %d\0A\00"
@.str.1 = [4 x i8] c"aaa\00"
define void @HariMain() {
%1 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 10)
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [22 x i8] c"hello, world : %s %d\0A\00"
@.str.1 = [4 x i8] c"aaa\00"
define void @HariMain() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 10)
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isgraph(int);
void t_isgraph_0x77() {
  Assert_real((isgraph(119)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              600, ("isgraph should be 1 for w"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x77>:
push   %rbp
mov    %rsp,%rbp
mov    $0x77,%edi
call   1040 <isgraph@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x258,%edx
lea    0xf65(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x77>:
push   %rax
mov    $0x77,%edi
call   1040 <isgraph@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x258,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for w\00"
define void @t_isgraph_0x77() {
%1 = call i32 @isgraph(i32 119)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 600, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for w\00"
define void @t_isgraph_0x77() {
%1 = tail call i32 @isgraph(i32 119)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 600, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
struct vec2 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ vec2_clamp(float *, float *, float *, float *);
__attribute__((always_)) struct vec2 *psvec2_clamp(struct vec2 *result,
                                                   struct vec2 *a,
                                                   struct vec2 *lower,
                                                   struct vec2 *higher) {
  vec2_clamp((float *)result, (float *)a, (float *)lower, (float *)higher);
  return result;
}


x86 assembly (clang, -O0):
<psvec2_clamp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <vec2_clamp@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec2_clamp>:
push   %rbx
mov    %rdi,%rbx
call   1030 <vec2_clamp@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vec2 = type { i32 }
define %struct.vec2* @psvec2_clamp(%struct.vec2* %0, %struct.vec2* %1, %struct.vec2* %2, %struct.vec2* %3) {
%5 = alloca %struct.vec2*
%6 = alloca %struct.vec2*
%7 = alloca %struct.vec2*
%8 = alloca %struct.vec2*
store %struct.vec2* %0, %struct.vec2** %5
store %struct.vec2* %1, %struct.vec2** %6
store %struct.vec2* %2, %struct.vec2** %7
store %struct.vec2* %3, %struct.vec2** %8
%9 = load %struct.vec2*, %struct.vec2** %5
%10 = bitcast %struct.vec2* %9 to float*
%11 = load %struct.vec2*, %struct.vec2** %6
%12 = bitcast %struct.vec2* %11 to float*
%13 = load %struct.vec2*, %struct.vec2** %7
%14 = bitcast %struct.vec2* %13 to float*
%15 = load %struct.vec2*, %struct.vec2** %8
%16 = bitcast %struct.vec2* %15 to float*
%17 = call i32 @vec2_clamp(float* %10, float* %12, float* %14, float* %16)
%18 = load %struct.vec2*, %struct.vec2** %5
ret %struct.vec2* %18
}

LLVM IR (-O2):
%struct.vec2 = type { i32 }
define %struct.vec2* @psvec2_clamp(%struct.vec2* returned %0, %struct.vec2* %1, %struct.vec2* %2, %struct.vec2* %3) {
%5 = bitcast %struct.vec2* %0 to float*
%6 = bitcast %struct.vec2* %1 to float*
%7 = bitcast %struct.vec2* %2 to float*
%8 = bitcast %struct.vec2* %3 to float*
%9 = tail call i32 @vec2_clamp(float* %5, float* %6, float* %7, float* %8)
ret %struct.vec2* %0
}
/* Variables and functions */
float frand();
int nrand(int n) {
  float r = frand();
  int m = (int)(r * n) + 1;
  if (m > n) {
    m = n;
  }
  return m;
}


x86 assembly (clang, -O0):
<nrand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <frand@plt>
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
cvtsi2ssl -0x4(%rbp),%xmm1
mulss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jle    1151 <nrand+0x41>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrand>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <frand@plt>
cvtsi2ss %ebx,%xmm1
mulss  %xmm0,%xmm1
cvttss2si %xmm1,%ecx
lea    0x1(%rcx),%eax
cmp    %ebx,%ecx
cmovge %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @nrand(i32 %0) {
%2 = alloca i32
%3 = alloca float
%4 = alloca i32
store i32 %0, i32* %2
%5 = call float (...) @frand()
store float %5, float* %3
%6 = load float, float* %3
%7 = load i32, i32* %2
%8 = sitofp i32 %7 to float
%9 = fmul float %6, %8
%10 = fptosi float %9 to i32
%11 = add nsw i32 %10, 1
store i32 %11, i32* %4
%12 = load i32, i32* %4
%13 = load i32, i32* %2
%14 = icmp sgt i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %1
%16 = load i32, i32* %2
store i32 %16, i32* %4
br label %17
17: ; preds = %15, %1
%18 = load i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
define i32 @nrand(i32 %0) {
%2 = tail call float (...) @frand()
%3 = sitofp i32 %0 to float
%4 = fmul float %2, %3
%5 = fptosi float %4 to i32
%6 = add nsw i32 %5, 1
%7 = icmp slt i32 %5, %0
%8 = select i1 %7, i32 %6, i32 %0
ret i32 %8
}
/* Variables and functions */
int make_server_socket_q(int, int);
extern int make_server_socket(int port) {
  return make_server_socket_q(port, 1);
}


x86 assembly (clang, -O0):
<make_server_socket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <make_server_socket_q@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_server_socket>:
mov    $0x1,%esi
jmp    1030 <make_server_socket_q@plt>

LLVM IR (-O0):
define i32 @make_server_socket(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @make_server_socket_q(i32 %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @make_server_socket(i32 %0) {
%2 = tail call i32 @make_server_socket_q(i32 %0, i32 1)
ret i32 %2
}
void tegra_rtc_set_trigger(unsigned long cycles) { return; }


x86 assembly (clang, -O0):
<tegra_rtc_set_trigger>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tegra_rtc_set_trigger>:
ret

LLVM IR (-O0):
define void @tegra_rtc_set_trigger(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret void
}

LLVM IR (-O2):
define void @tegra_rtc_set_trigger(i64 %0) {
ret void
}
int trailingZeroes(int n) {
  if (n < 5) {
    return 0;
  }
  return n / 5 + trailingZeroes(n / 5);
}


x86 assembly (clang, -O0):
<trailingZeroes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jge    1131 <trailingZeroes+0x21>
movl   $0x0,-0x4(%rbp)
jmp    115b <trailingZeroes+0x4b>
mov    -0x8(%rbp),%eax
mov    $0x5,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x5,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1030 <trailingZeroes@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trailingZeroes>:
xor    %eax,%eax
cmp    $0x5,%edi
jl     1123 <trailingZeroes+0x23>
xor    %eax,%eax
mov    $0xcccccccd,%ecx
xchg   %ax,%ax
mov    %edi,%edx
imul   %rcx,%rdx
shr    $0x22,%rdx
add    %edx,%eax
cmp    $0x18,%edi
mov    %edx,%edi
ja     1110 <trailingZeroes+0x10>
ret

LLVM IR (-O0):
define i32 @trailingZeroes(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 5
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %14
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sdiv i32 %8, 5
%10 = load i32, i32* %3
%11 = sdiv i32 %10, 5
%12 = call i32 @trailingZeroes(i32 %11)
%13 = add nsw i32 %9, %12
store i32 %13, i32* %2
br label %14
14: ; preds = %7, %6
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @trailingZeroes(i32 %0) {
%2 = icmp slt i32 %0, 5
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ %0, %1 ]
%5 = phi i32 [ %7, %3 ], [ 0, %1 ]
%6 = udiv i32 %4, 5
%7 = add nuw nsw i32 %6, %5
%8 = icmp ult i32 %4, 25
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %10
}
/* Variables and functions */
scalar_t__ foo(int, int);
int main() {
  int a = 10;
  int b = 0;
  if ((b != 0) && foo(a, b))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1158 <main+0x48>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <foo@plt>
cmp    $0x0,%rax
je     1158 <main+0x48>
movl   $0x1,-0x4(%rbp)
jmp    115f <main+0x4f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 10, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %0
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = call i64 @foo(i32 %7, i32 %8)
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %6
store i32 1, i32* %1
br label %13
12: ; preds = %6, %0
store i32 0, i32* %1
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %1
ret i32 %14
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void bitops_unset(unsigned char *val, int bit) {
  int pos = bit >> 3;
  int idx = bit & 0x7;
  val[pos] &= ~(1 << idx);
}


x86 assembly (clang, -O0):
<bitops_unset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x3,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
and    $0x7,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%ecx
mov    $0x1,%esi
shl    %cl,%esi
xor    $0xffffffff,%esi
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movzbl (%rax,%rcx,1),%edx
and    %esi,%edx
mov    %dl,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitops_unset>:
mov    %esi,%ecx
mov    %esi,%eax
sar    $0x3,%eax
and    $0x7,%cl
mov    $0x1,%edx
shl    %cl,%edx
cltq
not    %dl
and    %dl,(%rdi,%rax,1)
ret

LLVM IR (-O0):
define void @bitops_unset(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = ashr i32 %7, 3
store i32 %8, i32* %5
%9 = load i32, i32* %4
%10 = and i32 %9, 7
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = shl i32 1, %11
%13 = xor i32 %12, -1
%14 = load i8*, i8** %3
%15 = load i32, i32* %5
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = zext i8 %18 to i32
%20 = and i32 %19, %13
%21 = trunc i32 %20 to i8
store i8 %21, i8* %17
ret void
}

LLVM IR (-O2):
define void @bitops_unset(i8* nocapture %0, i32 %1) {
%3 = ashr i32 %1, 3
%4 = and i32 %1, 7
%5 = shl nuw nsw i32 1, %4
%6 = sext i32 %3 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = trunc i32 %5 to i8
%10 = xor i8 %9, -1
%11 = and i8 %8, %10
store i8 %11, i8* %7
ret void
}
/* Variables and functions */
double ddot_(int *, double const *, int *, double const *, int *);
double call_ddot(int n, const double *x, int incx, const double *y, int incy) {
  return ddot_(&n, x, &incx, y, &incy);
}


x86 assembly (clang, -O0):
<call_ddot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rcx
lea    -0x4(%rbp),%rdi
lea    -0x14(%rbp),%rdx
lea    -0x24(%rbp),%r8
call   1030 <ddot_@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_ddot>:
sub    $0x18,%rsp
mov    %edi,0x14(%rsp)
mov    %edx,0x10(%rsp)
mov    %r8d,0xc(%rsp)
lea    0x14(%rsp),%rdi
lea    0x10(%rsp),%rdx
lea    0xc(%rsp),%r8
call   1030 <ddot_@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @call_ddot(i32 %0, double* %1, i32 %2, double* %3, i32 %4) {
%6 = alloca i32
%7 = alloca double*
%8 = alloca i32
%9 = alloca double*
%10 = alloca i32
store i32 %0, i32* %6
store double* %1, double** %7
store i32 %2, i32* %8
store double* %3, double** %9
store i32 %4, i32* %10
%11 = load double*, double** %7
%12 = load double*, double** %9
%13 = call double @ddot_(i32* %6, double* %11, i32* %8, double* %12, i32* %10)
ret double %13
}

LLVM IR (-O2):
define double @call_ddot(i32 %0, double* %1, i32 %2, double* %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %6
store i32 %2, i32* %7
store i32 %4, i32* %8
%9 = call double @ddot_(i32* %6, double* %1, i32* %7, double* %3, i32* %8)
ret double %9
}
void gdk_window_set_accept_focus() {}


x86 assembly (clang, -O0):
<gdk_window_set_accept_focus>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_window_set_accept_focus>:
ret

LLVM IR (-O0):
define void @gdk_window_set_accept_focus() {
ret void
}

LLVM IR (-O2):
define void @gdk_window_set_accept_focus() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ql_writebyte(unsigned long, unsigned short);
void SetMemW(unsigned long address, unsigned short value) {
  ql_writebyte(address, (value >> 8) & 255);
  ql_writebyte(address + 1, (value & 255));
}


x86 assembly (clang, -O0):
<SetMemW>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
movzwl -0xa(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
movzwl %ax,%esi
call   1030 <ql_writebyte@plt>
mov    -0x8(%rbp),%rdi
add    $0x1,%rdi
movzwl -0xa(%rbp),%eax
and    $0xff,%eax
movzwl %ax,%esi
call   1030 <ql_writebyte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetMemW>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
shr    $0x8,%esi
call   1030 <ql_writebyte@plt>
add    $0x1,%rbx
movzbl %bpl,%esi
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <ql_writebyte@plt>

LLVM IR (-O0):
define void @SetMemW(i64 %0, i16 zeroext %1) {
%3 = alloca i64
%4 = alloca i16
store i64 %0, i64* %3
store i16 %1, i16* %4
%5 = load i64, i64* %3
%6 = load i16, i16* %4
%7 = zext i16 %6 to i32
%8 = ashr i32 %7, 8
%9 = and i32 %8, 255
%10 = trunc i32 %9 to i16
%11 = call i32 @ql_writebyte(i64 %5, i16 zeroext %10)
%12 = load i64, i64* %3
%13 = add i64 %12, 1
%14 = load i16, i16* %4
%15 = zext i16 %14 to i32
%16 = and i32 %15, 255
%17 = trunc i32 %16 to i16
%18 = call i32 @ql_writebyte(i64 %13, i16 zeroext %17)
ret void
}

LLVM IR (-O2):
define void @SetMemW(i64 %0, i16 zeroext %1) {
%3 = lshr i16 %1, 8
%4 = tail call i32 @ql_writebyte(i64 %0, i16 zeroext %3)
%5 = add i64 %0, 1
%6 = and i16 %1, 255
%7 = tail call i32 @ql_writebyte(i64 %5, i16 zeroext %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0x3b() {
  Assert_real((isalpha(59) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              300, ("isalpha should be 0 for ;"));
}


x86 assembly (clang, -O0):
<t_isalpha_0x3b>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3b,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x12c,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0x3b>:
push   %rax
mov    $0x3b,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x12c,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 0 for ;\00"
define void @t_isalpha_0x3b() {
%1 = call i64 @isalpha(i32 59)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 300, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 0 for ;\00"
define void @t_isalpha_0x3b() {
%1 = tail call i64 @isalpha(i32 59)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 300, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int test_imm_E3uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0xE3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E3uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0xe3,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E3uint64_midword_reg>:
test   $0xe30000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E3uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 227
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E3uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 14876672
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void HandleSSLError() { int val; }


x86 assembly (clang, -O0):
<HandleSSLError>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HandleSSLError>:
ret

LLVM IR (-O0):
define void @HandleSSLError() {
%1 = alloca i32
ret void
}

LLVM IR (-O2):
define void @HandleSSLError() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRNOTIMPLEMENTED_swap(char *, int);
void U_WMRC5_swap(char *record, int torev) {
  U_WMRNOTIMPLEMENTED_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMRC5_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRNOTIMPLEMENTED_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRC5_swap>:
jmp    1030 <U_WMRNOTIMPLEMENTED_swap@plt>

LLVM IR (-O0):
define void @U_WMRC5_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMRC5_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %0, i32 %1)
ret void
}
/* Variables and functions */
int socknonblock(int);
int unixnonblock(int sock) { return socknonblock(sock); }


x86 assembly (clang, -O0):
<unixnonblock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <socknonblock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unixnonblock>:
jmp    1030 <socknonblock@plt>

LLVM IR (-O0):
define i32 @unixnonblock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @socknonblock(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @unixnonblock(i32 %0) {
%2 = tail call i32 @socknonblock(i32 %0)
ret i32 %2
}
void TELEMETRY_SetType(int type) { (void)type; }


x86 assembly (clang, -O0):
<TELEMETRY_SetType>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TELEMETRY_SetType>:
ret

LLVM IR (-O0):
define void @TELEMETRY_SetType(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret void
}

LLVM IR (-O2):
define void @TELEMETRY_SetType(i32 %0) {
ret void
}
/* Variables and functions */
int pipe2(int *, int /*<<< orphan*/);
int pipe(int fildes[2]) { return pipe2(fildes, 0); }


x86 assembly (clang, -O0):
<pipe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <pipe2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pipe>:
xor    %esi,%esi
jmp    1030 <pipe2@plt>

LLVM IR (-O0):
define i32 @pipe(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @pipe2(i32* %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @pipe(i32* %0) {
%2 = tail call i32 @pipe2(i32* %0, i32 0)
ret i32 %2
}
/* Variables and functions */
int unary_n(char *);
int onearg(char *argv[]) { return unary_n(argv[0]); }


x86 assembly (clang, -O0):
<onearg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <unary_n@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<onearg>:
mov    (%rdi),%rdi
jmp    1030 <unary_n@plt>

LLVM IR (-O0):
define i32 @onearg(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = getelementptr inbounds i8*, i8** %3, i64 0
%5 = load i8*, i8** %4
%6 = call i32 @unary_n(i8* %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @onearg(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = tail call i32 @unary_n(i8* %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ simple_va_fun(int, ...);
int main(int argc, char *argv[]) {
  simple_va_fun(100);
  simple_va_fun(100, 200);
  simple_va_fun(100, 200, 'a');
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x64,%edi
mov    $0x0,%al
call   1030 <simple_va_fun@plt>
mov    $0x64,%edi
mov    $0xc8,%esi
mov    $0x0,%al
call   1030 <simple_va_fun@plt>
mov    $0x64,%edi
mov    $0xc8,%esi
mov    $0x61,%edx
mov    $0x0,%al
call   1030 <simple_va_fun@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x64,%edi
xor    %eax,%eax
call   1030 <simple_va_fun@plt>
mov    $0x64,%edi
mov    $0xc8,%esi
xor    %eax,%eax
call   1030 <simple_va_fun@plt>
mov    $0x64,%edi
mov    $0xc8,%esi
mov    $0x61,%edx
xor    %eax,%eax
call   1030 <simple_va_fun@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (i32, ...) @simple_va_fun(i32 100)
%7 = call i32 (i32, ...) @simple_va_fun(i32 100, i32 200)
%8 = call i32 (i32, ...) @simple_va_fun(i32 100, i32 200, i32 97)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (i32, ...) @simple_va_fun(i32 100)
%4 = tail call i32 (i32, ...) @simple_va_fun(i32 100, i32 200)
%5 = tail call i32 (i32, ...) @simple_va_fun(i32 100, i32 200, i32 97)
ret i32 0
}