xunge/DecIR huggingface dataset:
int test1(const char *s1c, const char *s2c, int n) {
  int i = 0;
  while (i < n && s1c[i] == s2c[i]) {
    i++;
  }
  return i;
}


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%ecx
xor    %eax,%eax
cmp    -0x14(%rbp),%ecx
mov    %al,-0x19(%rbp)
jge    1147 <test1+0x47>
mov    -0x8(%rbp),%rax
movslq -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
mov    -0x10(%rbp),%rcx
movslq -0x18(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
cmp    %ecx,%eax
sete   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
test   $0x1,%al
jne    1157 <test1+0x57>
jmp    1165 <test1+0x65>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1116 <test1+0x16>
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
test   %edx,%edx
jle    1125 <test1+0x25>
mov    %edx,%ecx
xor    %eax,%eax
nopl   0x0(%rax,%rax,1)
movzbl (%rdi,%rax,1),%edx
cmp    (%rsi,%rax,1),%dl
jne    1124 <test1+0x24>
add    $0x1,%rax
cmp    %rax,%rcx
jne    1110 <test1+0x10>
mov    %ecx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test1(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %28, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %26
12: ; preds = %8
%13 = load i8*, i8** %4
%14 = load i32, i32* %7
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = load i8*, i8** %5
%20 = load i32, i32* %7
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i8, i8* %19, i64 %21
%23 = load i8, i8* %22
%24 = sext i8 %23 to i32
%25 = icmp eq i32 %18, %24
br label %26
26: ; preds = %12, %8
%27 = phi i1 [ false, %8 ], [ %25, %12 ]
br i1 %27, label %28, label %31
28: ; preds = %26
%29 = load i32, i32* %7
%30 = add nsw i32 %29, 1
store i32 %30, i32* %7
br label %8
31: ; preds = %26
%32 = load i32, i32* %7
ret i32 %32
}

LLVM IR (-O2):
define i32 @test1(i8* nocapture %0, i8* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %19
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %7
7: ; preds = %5, %14
%8 = phi i64 [ 0, %5 ], [ %15, %14 ]
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = load i8, i8* %9
%11 = getelementptr inbounds i8, i8* %1, i64 %8
%12 = load i8, i8* %11
%13 = icmp eq i8 %10, %12
br i1 %13, label %14, label %17
14: ; preds = %7
%15 = add nuw nsw i64 %8, 1
%16 = icmp eq i64 %15, %6
br i1 %16, label %19, label %7
17: ; preds = %7
%18 = trunc i64 %8 to i32
br label %19
19: ; preds = %14, %17, %3
%20 = phi i32 [ 0, %3 ], [ %18, %17 ], [ %2, %14 ]
ret i32 %20
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_add_ps(int /*<<< orphan*/, int /*<<< orphan*/);
scalar_t__ _mm_cvtss_f32(int /*<<< orphan*/);
int /*<<< orphan*/ _mm_setzero_ps();
int main(void) {
  __m128 a = _mm_add_ps(_mm_setzero_ps(), _mm_setzero_ps());
  return (int)_mm_cvtss_f32(a);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <_mm_setzero_ps@plt>
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1050 <_mm_setzero_ps@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%esi
call   1040 <_mm_add_ps@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <_mm_cvtss_f32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1050 <_mm_setzero_ps@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <_mm_setzero_ps@plt>
mov    %ebx,%edi
mov    %eax,%esi
call   1040 <_mm_add_ps@plt>
mov    %eax,%edi
pop    %rbx
jmp    1030 <_mm_cvtss_f32@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @_mm_setzero_ps()
%4 = call i32 (...) @_mm_setzero_ps()
%5 = call i32 @_mm_add_ps(i32 %3, i32 %4)
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = call i64 @_mm_cvtss_f32(i32 %6)
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @_mm_setzero_ps()
%2 = tail call i32 (...) @_mm_setzero_ps()
%3 = tail call i32 @_mm_add_ps(i32 %1, i32 %2)
%4 = tail call i64 @_mm_cvtss_f32(i32 %3)
%5 = trunc i64 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void report_error_and_exit(char *error_msg) {
  fprintf(stderr, "Error: %s\n", error_msg);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<report_error_and_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e8c(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<report_error_and_exit>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [11 x i8] c"Error: %s\0A\00"
@EXIT_FAILURE = global i32 0
define void @report_error_and_exit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @EXIT_FAILURE
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [11 x i8] c"Error: %s\0A\00"
@EXIT_FAILURE = global i32 0
define void @report_error_and_exit(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @EXIT_FAILURE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int arg4(int a1, int a2, int a3, int a4) {
  printf("%d\n", a1 + a2 + a3 + a4);
  return a4;
}


x86 assembly (clang, -O0):
<arg4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%esi
add    -0x8(%rbp),%esi
add    -0xc(%rbp),%esi
add    -0x10(%rbp),%esi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arg4>:
push   %rbx
mov    %ecx,%ebx
add    %edi,%esi
add    %edx,%esi
add    %ecx,%esi
lea    0xee0(%rip),%rdi
call   1030 <printf@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @arg4(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = add nsw i32 %9, %10
%12 = load i32, i32* %7
%13 = add nsw i32 %11, %12
%14 = load i32, i32* %8
%15 = add nsw i32 %13, %14
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
%17 = load i32, i32* %8
ret i32 %17
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @arg4(i32 %0, i32 %1, i32 %2, i32 returned %3) {
%5 = add nsw i32 %1, %0
%6 = add nsw i32 %5, %2
%7 = add nsw i32 %6, %3
%8 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 %3
}
/* Variables and functions */
int sn_decode_int(char **, char *);
int sn_decode_value(char **, char *, int, char **);
int sn_decode_bin(char **p, char *end, char **result) {
  int len = sn_decode_int(p, end);
  if (len < 0)
    return len;
  return sn_decode_value(p, end, len, result);
}


x86 assembly (clang, -O0):
<sn_decode_bin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <sn_decode_int@plt>
mov    %eax,-0x24(%rbp)
cmpl   $0x0,-0x24(%rbp)
jge    1159 <sn_decode_bin+0x39>
mov    -0x24(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1170 <sn_decode_bin+0x50>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x24(%rbp),%edx
mov    -0x20(%rbp),%rcx
call   1040 <sn_decode_value@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sn_decode_bin>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
call   1030 <sn_decode_int@plt>
test   %eax,%eax
js     114c <sn_decode_bin+0x2c>
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %eax,%edx
mov    %r14,%rcx
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <sn_decode_value@plt>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @sn_decode_bin(i8** %0, i8* %1, i8** %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
%7 = alloca i8**
%8 = alloca i32
store i8** %0, i8*** %5
store i8* %1, i8** %6
store i8** %2, i8*** %7
%9 = load i8**, i8*** %5
%10 = load i8*, i8** %6
%11 = call i32 @sn_decode_int(i8** %9, i8* %10)
store i32 %11, i32* %8
%12 = load i32, i32* %8
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %3
%15 = load i32, i32* %8
store i32 %15, i32* %4
br label %22
16: ; preds = %3
%17 = load i8**, i8*** %5
%18 = load i8*, i8** %6
%19 = load i32, i32* %8
%20 = load i8**, i8*** %7
%21 = call i32 @sn_decode_value(i8** %17, i8* %18, i32 %19, i8** %20)
store i32 %21, i32* %4
br label %22
22: ; preds = %16, %14
%23 = load i32, i32* %4
ret i32 %23
}

LLVM IR (-O2):
define i32 @sn_decode_bin(i8** %0, i8* %1, i8** %2) {
%4 = tail call i32 @sn_decode_int(i8** %0, i8* %1)
%5 = icmp slt i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @sn_decode_value(i8** %0, i8* %1, i32 %4, i8** %2)
br label %8
8: ; preds = %3, %6
%9 = phi i32 [ %7, %6 ], [ %4, %3 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ _sort_quick(int *, int /*<<< orphan*/, size_t);
void sort_quick(int *arr, size_t length) {
  if (length < 2)
    return;
  _sort_quick(arr, 0, length - 1);
}


x86 assembly (clang, -O0):
<sort_quick>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x2,-0x10(%rbp)
jae    1130 <sort_quick+0x20>
jmp    1143 <sort_quick+0x33>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
sub    $0x1,%rdx
xor    %esi,%esi
call   1030 <_sort_quick@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sort_quick>:
cmp    $0x2,%rsi
jae    1117 <sort_quick+0x7>
ret
mov    %rsi,%rdx
add    $0xffffffffffffffff,%rdx
xor    %esi,%esi
jmp    1030 <_sort_quick@plt>

LLVM IR (-O0):
define void @sort_quick(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
store i32* %0, i32** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = icmp ult i64 %5, 2
br i1 %6, label %7, label %8
7: ; preds = %2
br label %13
8: ; preds = %2
%9 = load i32*, i32** %3
%10 = load i64, i64* %4
%11 = sub i64 %10, 1
%12 = call i32 @_sort_quick(i32* %9, i32 0, i64 %11)
br label %13
13: ; preds = %8, %7
ret void
}

LLVM IR (-O2):
define void @sort_quick(i32* %0, i64 %1) {
%3 = icmp ult i64 %1, 2
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = add i64 %1, -1
%6 = tail call i32 @_sort_quick(i32* %0, i32 0, i64 %5)
br label %7
7: ; preds = %2, %4
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t ADCIntStatusEx(uint32_t ui32Base, bool bMasked) {
  uint32_t ui32Temp;
  ;
  if (bMasked) {
    ui32Temp = (*((volatile uint32_t *)(ui32Base + 0x0000000C)));
  } else {
    ui32Temp = (*((volatile uint32_t *)(ui32Base + 0x00000004)));
    if (ui32Temp & 0x00010000) {
      ui32Temp |= (0x00080000 | 0x00040000 | 0x00020000 | 0x00010000);
    }
  }
  return (ui32Temp);
}


x86 assembly (clang, -O0):
<ADCIntStatusEx>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1126 <ADCIntStatusEx+0x26>
mov    -0x4(%rbp),%eax
add    $0xc,%eax
cltq
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
jmp    1154 <ADCIntStatusEx+0x54>
mov    -0x4(%rbp),%eax
add    $0x4,%eax
cltq
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x10000,%eax
cmp    $0x0,%eax
je     114f <ADCIntStatusEx+0x4f>
mov    -0xc(%rbp),%eax
or     $0xf0000,%eax
mov    %eax,-0xc(%rbp)
jmp    1154 <ADCIntStatusEx+0x54>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCIntStatusEx>:
movslq %edi,%rax
test   %esi,%esi
je     110b <ADCIntStatusEx+0xb>
mov    0xc(%rax),%eax
ret
mov    0x4(%rax),%ecx
mov    %ecx,%eax
or     $0xf0000,%eax
test   $0x10000,%ecx
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ADCIntStatusEx(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 12
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
%13 = load volatile i32, i32* %12
store i32 %13, i32* %5
br label %27
14: ; preds = %2
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 4
%17 = sext i32 %16 to i64
%18 = inttoptr i64 %17 to i32*
%19 = load volatile i32, i32* %18
store i32 %19, i32* %5
%20 = load i32, i32* %5
%21 = and i32 %20, 65536
%22 = icmp ne i32 %21, 0
br i1 %22, label %23, label %26
23: ; preds = %14
%24 = load i32, i32* %5
%25 = or i32 %24, 983040
store i32 %25, i32* %5
br label %26
26: ; preds = %23, %14
br label %27
27: ; preds = %26, %8
%28 = load i32, i32* %5
ret i32 %28
}

LLVM IR (-O2):
define i32 @ADCIntStatusEx(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = add nsw i32 %0, 12
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
%8 = load volatile i32, i32* %7
br label %18
9: ; preds = %2
%10 = add nsw i32 %0, 4
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
%13 = load volatile i32, i32* %12
%14 = and i32 %13, 65536
%15 = icmp eq i32 %14, 0
%16 = or i32 %13, 983040
%17 = select i1 %15, i32 %13, i32 %16
br label %18
18: ; preds = %9, %4
%19 = phi i32 [ %8, %4 ], [ %17, %9 ]
ret i32 %19
}
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_eval(int);
void mixedSignedness1(int a) {
  unsigned max = (~0U);
  clang_analyzer_eval(a < max);
  clang_analyzer_eval((a + 2) < max);
  clang_analyzer_eval((a + 2U) < max);
}


x86 assembly (clang, -O0):
<mixedSignedness1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0xffffffff,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setb   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <clang_analyzer_eval@plt>
mov    -0x4(%rbp),%eax
add    $0x2,%eax
cmp    -0x8(%rbp),%eax
setb   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <clang_analyzer_eval@plt>
mov    -0x4(%rbp),%eax
add    $0x2,%eax
cmp    -0x8(%rbp),%eax
setb   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <clang_analyzer_eval@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mixedSignedness1>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %edi,%edi
cmp    $0xffffffff,%ebx
setne  %dil
call   1030 <clang_analyzer_eval@plt>
xor    %ebp,%ebp
cmp    $0xfffffffd,%ebx
setne  %bpl
mov    %ebp,%edi
call   1030 <clang_analyzer_eval@plt>
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <clang_analyzer_eval@plt>

LLVM IR (-O0):
define void @mixedSignedness1(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 -1, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = icmp ult i32 %4, %5
%7 = zext i1 %6 to i32
%8 = call i32 @clang_analyzer_eval(i32 %7)
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 2
%11 = load i32, i32* %3
%12 = icmp ult i32 %10, %11
%13 = zext i1 %12 to i32
%14 = call i32 @clang_analyzer_eval(i32 %13)
%15 = load i32, i32* %2
%16 = add i32 %15, 2
%17 = load i32, i32* %3
%18 = icmp ult i32 %16, %17
%19 = zext i1 %18 to i32
%20 = call i32 @clang_analyzer_eval(i32 %19)
ret void
}

LLVM IR (-O2):
define void @mixedSignedness1(i32 %0) {
%2 = icmp ne i32 %0, -1
%3 = zext i1 %2 to i32
%4 = tail call i32 @clang_analyzer_eval(i32 %3)
%5 = icmp ne i32 %0, -3
%6 = zext i1 %5 to i32
%7 = tail call i32 @clang_analyzer_eval(i32 %6)
%8 = tail call i32 @clang_analyzer_eval(i32 %6)
ret void
}
void desloca(int *v, int ult, int pos_novo) {
  int i;
  for (i = ult + 1; i > pos_novo; i--) {
    v[i] = v[i - 1];
  }
}


x86 assembly (clang, -O0):
<desloca>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    114c <desloca+0x4c>
mov    -0x8(%rbp),%rax
mov    -0x14(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
jmp    1117 <desloca+0x17>
pop    %rbp
ret

x86 assembly (clang, -O2):
<desloca>:
cmp    %edx,%esi
jl     1123 <desloca+0x23>
add    $0x1,%esi
movslq %esi,%rcx
movslq %edx,%rax
nopl   (%rax)
mov    -0x4(%rdi,%rcx,4),%edx
mov    %edx,(%rdi,%rcx,4)
lea    -0x1(%rcx),%rdx
mov    %rdx,%rcx
cmp    %rax,%rdx
jg     1110 <desloca+0x10>
ret

LLVM IR (-O0):
define void @desloca(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = add nsw i32 %8, 1
store i32 %9, i32* %7
br label %10
10: ; preds = %25, %3
%11 = load i32, i32* %7
%12 = load i32, i32* %6
%13 = icmp sgt i32 %11, %12
br i1 %13, label %14, label %28
14: ; preds = %10
%15 = load i32*, i32** %4
%16 = load i32, i32* %7
%17 = sub nsw i32 %16, 1
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i32, i32* %15, i64 %18
%20 = load i32, i32* %19
%21 = load i32*, i32** %4
%22 = load i32, i32* %7
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i32, i32* %21, i64 %23
store i32 %20, i32* %24
br label %25
25: ; preds = %14
%26 = load i32, i32* %7
%27 = add nsw i32 %26, -1
store i32 %27, i32* %7
br label %10
28: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @desloca(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %16, label %5
5: ; preds = %3
%6 = add i32 %1, 1
%7 = sext i32 %6 to i64
%8 = sext i32 %2 to i64
br label %9
9: ; preds = %5, %9
%10 = phi i64 [ %7, %5 ], [ %11, %9 ]
%11 = add nsw i64 %10, -1
%12 = getelementptr inbounds i32, i32* %0, i64 %11
%13 = load i32, i32* %12
%14 = getelementptr inbounds i32, i32* %0, i64 %10
store i32 %13, i32* %14
%15 = icmp sgt i64 %11, %8
br i1 %15, label %9, label %16
16: ; preds = %9, %3
ret void
}
int char_array_ident(char *s, char *t, int n) {
  int i;
  for (i = 0; i < n; i++)
    if (s[i] != t[i])
      return 0;
  return 1;
}


x86 assembly (clang, -O0):
<char_array_ident>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
movl   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%eax
cmp    -0x1c(%rbp),%eax
jge    1161 <char_array_ident+0x61>
mov    -0x10(%rbp),%rax
movslq -0x20(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
mov    -0x18(%rbp),%rcx
movslq -0x20(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
cmp    %ecx,%eax
je     114e <char_array_ident+0x4e>
movl   $0x0,-0x4(%rbp)
jmp    1168 <char_array_ident+0x68>
jmp    1153 <char_array_ident+0x53>
mov    -0x20(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    1116 <char_array_ident+0x16>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<char_array_ident>:
mov    $0x1,%eax
test   %edx,%edx
jle    1122 <char_array_ident+0x22>
mov    %edx,%r8d
xor    %edx,%edx
xchg   %ax,%ax
movzbl (%rdi,%rdx,1),%ecx
cmp    (%rsi,%rdx,1),%cl
jne    1123 <char_array_ident+0x23>
add    $0x1,%rdx
cmp    %rdx,%r8
jne    1110 <char_array_ident+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @char_array_ident(i8* %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %29, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %7
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %32
13: ; preds = %9
%14 = load i8*, i8** %5
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = load i8*, i8** %6
%21 = load i32, i32* %8
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %20, i64 %22
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
%26 = icmp ne i32 %19, %25
br i1 %26, label %27, label %28
27: ; preds = %13
store i32 0, i32* %4
br label %33
28: ; preds = %13
br label %29
29: ; preds = %28
%30 = load i32, i32* %8
%31 = add nsw i32 %30, 1
store i32 %31, i32* %8
br label %9
32: ; preds = %9
store i32 1, i32* %4
br label %33
33: ; preds = %32, %27
%34 = load i32, i32* %4
ret i32 %34
}

LLVM IR (-O2):
define i32 @char_array_ident(i8* nocapture %0, i8* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %9
7: ; preds = %9
%8 = icmp eq i64 %16, %6
br i1 %8, label %17, label %9
9: ; preds = %5, %7
%10 = phi i64 [ 0, %5 ], [ %16, %7 ]
%11 = getelementptr inbounds i8, i8* %0, i64 %10
%12 = load i8, i8* %11
%13 = getelementptr inbounds i8, i8* %1, i64 %10
%14 = load i8, i8* %13
%15 = icmp eq i8 %12, %14
%16 = add nuw nsw i64 %10, 1
br i1 %15, label %7, label %17
17: ; preds = %9, %7, %3
%18 = phi i32 [ 1, %3 ], [ 1, %7 ], [ 0, %9 ]
ret i32 %18
}
int max(int a, int b) { return (a > b ? a : b); }


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <max+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <max+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @max(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @max(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Type definitions */
struct bufferevent {
  int dummy;
};

/* Variables and functions */
scalar_t__ bufferevent_write(struct bufferevent *, char *, int);
int /*<<< orphan*/ die(char *);
void beep(struct bufferevent *restrict bev) {
  if (0 != bufferevent_write(bev, "\a", 1))
    die("Unable to beep :)");
}


x86 assembly (clang, -O0):
<beep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec9(%rip),%rsi
mov    $0x1,%edx
call   1040 <bufferevent_write@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
je     115b <beep+0x3b>
lea    0xeac(%rip),%rdi
call   1030 <die@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<beep>:
push   %rax
lea    0xed8(%rip),%rsi
mov    $0x1,%edx
call   1040 <bufferevent_write@plt>
test   %rax,%rax
je     1144 <beep+0x24>
lea    0xec4(%rip),%rdi
pop    %rax
jmp    1030 <die@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.bufferevent = type { i32 }
@.str = [2 x i8] c"\07\00"
@.str.1 = [18 x i8] c"Unable to beep :)\00"
define void @beep(%struct.bufferevent* noalias %0) {
%2 = alloca %struct.bufferevent*
store %struct.bufferevent* %0, %struct.bufferevent** %2
%3 = load %struct.bufferevent*, %struct.bufferevent** %2
%4 = call i64 @bufferevent_write(%struct.bufferevent* %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
%5 = icmp ne i64 0, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @die(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
%struct.bufferevent = type { i32 }
@.str = [2 x i8] c"\07\00"
@.str.1 = [18 x i8] c"Unable to beep :)\00"
define void @beep(%struct.bufferevent* noalias %0) {
%2 = tail call i64 @bufferevent_write(%struct.bufferevent* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @die(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
scalar_t__ rotsArePrime(int);
int main(int argc, char **argv) {
  int tally = 1;
  for (int i = 3; i < 1000000; i += 2) {
    if (rotsArePrime(i))
      tally++;
  }
  printf("tally: %d\n", tally);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
movl   $0x3,-0x18(%rbp)
cmpl   $0xf4240,-0x18(%rbp)
jge    117f <main+0x5f>
mov    -0x18(%rbp),%edi
call   1040 <rotsArePrime@plt>
cmp    $0x0,%rax
je     116c <main+0x4c>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1171 <main+0x51>
mov    -0x18(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x18(%rbp)
jmp    1144 <main+0x24>
mov    -0x14(%rbp),%esi
lea    0xe77(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
mov    $0x1,%ebx
nopl   (%rax)
add    $0x2,%ebp
mov    %ebp,%edi
call   1040 <rotsArePrime@plt>
cmp    $0x1,%rax
sbb    $0xffffffff,%ebx
cmp    $0xf423e,%ebp
jb     1130 <main+0x10>
lea    0xeb0(%rip),%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [11 x i8] c"tally: %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %6
store i32 3, i32* %7
br label %8
8: ; preds = %19, %2
%9 = load i32, i32* %7
%10 = icmp slt i32 %9, 1000000
br i1 %10, label %11, label %22
11: ; preds = %8
%12 = load i32, i32* %7
%13 = call i64 @rotsArePrime(i32 %12)
%14 = icmp ne i64 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %11
%16 = load i32, i32* %6
%17 = add nsw i32 %16, 1
store i32 %17, i32* %6
br label %18
18: ; preds = %15, %11
br label %19
19: ; preds = %18
%20 = load i32, i32* %7
%21 = add nsw i32 %20, 2
store i32 %21, i32* %7
br label %8
22: ; preds = %8
%23 = load i32, i32* %6
%24 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %23)
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
@.str = [11 x i8] c"tally: %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
br label %5
3: ; preds = %5
%4 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %11)
ret i32 0
5: ; preds = %2, %5
%6 = phi i32 [ 3, %2 ], [ %12, %5 ]
%7 = phi i32 [ 1, %2 ], [ %11, %5 ]
%8 = tail call i64 @rotsArePrime(i32 %6)
%9 = icmp ne i64 %8, 0
%10 = zext i1 %9 to i32
%11 = add nuw nsw i32 %7, %10
%12 = add nuw nsw i32 %6, 2
%13 = icmp ult i32 %6, 999998
br i1 %13, label %5, label %3
}
/* Variables and functions */
float sin(float x) { return x - ((x * x) / (1 * 2 * 3)); }


x86 assembly (clang, -O0):
<sin>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm1
mulss  -0x4(%rbp),%xmm1
movss  0xee0(%rip),%xmm2
divss  %xmm2,%xmm1
subss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sin>:
movaps %xmm0,%xmm1
mulss  %xmm0,%xmm1
divss  0xef1(%rip),%xmm1
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @sin(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = load float, float* %2
%6 = fmul float %4, %5
%7 = fdiv float %6, 6.000000e+00
%8 = fsub float %3, %7
ret float %8
}

LLVM IR (-O2):
define float @sin(float %0) {
%2 = fmul float %0, %0
%3 = fdiv float %2, 6.000000e+00
%4 = fsub float %0, %3
ret float %4
}
/* Variables and functions */
int snprintf(char *, int, char *, char *);
int write(int, char *, int);
int pubsub_textline_sudirribe(int fd, char *name) {
  int r;
  char buf[1024];
  r = snprintf(buf, 1024, "SUBSCRIBE %s\r\n", name);
  return write(fd, buf, r);
}


x86 assembly (clang, -O0):
<pubsub_textline_sudirribe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x420,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x420(%rbp),%rdi
mov    -0x10(%rbp),%rcx
mov    $0x400,%esi
lea    0xeb7(%rip),%rdx
call   1040 <snprintf@plt>
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x420(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <write@plt>
add    $0x420,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pubsub_textline_sudirribe>:
push   %r14
push   %rbx
sub    $0x408,%rsp
mov    %rsi,%rcx
mov    %edi,%ebx
lea    0xeca(%rip),%rdx
mov    %rsp,%r14
mov    %r14,%rdi
mov    $0x400,%esi
call   1040 <snprintf@plt>
mov    %ebx,%edi
mov    %r14,%rsi
mov    %eax,%edx
call   1030 <write@plt>
add    $0x408,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [15 x i8] c"SUBSCRIBE %s\0D\0A\00"
define i32 @pubsub_textline_sudirribe(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca [1024 x i8]
store i32 %0, i32* %3
store i8* %1, i8** %4
%7 = getelementptr inbounds [1024 x i8], [1024 x i8]* %6, i64 0, i64 0
%8 = load i8*, i8** %4
%9 = call i32 @snprintf(i8* %7, i32 1024, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %8)
store i32 %9, i32* %5
%10 = load i32, i32* %3
%11 = getelementptr inbounds [1024 x i8], [1024 x i8]* %6, i64 0, i64 0
%12 = load i32, i32* %5
%13 = call i32 @write(i32 %10, i8* %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
@.str = [15 x i8] c"SUBSCRIBE %s\0D\0A\00"
define i32 @pubsub_textline_sudirribe(i32 %0, i8* %1) {
%3 = alloca [1024 x i8]
%4 = getelementptr inbounds [1024 x i8], [1024 x i8]* %3, i64 0, i64 0
%5 = call i32 @snprintf(i8* %4, i32 1024, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %1)
%6 = call i32 @write(i32 %0, i8* %4, i32 %5)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ DirectIndexedXE1(int);
int /*<<< orphan*/ STZ8(int /*<<< orphan*/);
void Op74E1(void) { STZ8(DirectIndexedXE1(2)); }


x86 assembly (clang, -O0):
<Op74E1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <DirectIndexedXE1@plt>
mov    %eax,%edi
call   1040 <STZ8@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Op74E1>:
push   %rax
mov    $0x2,%edi
call   1030 <DirectIndexedXE1@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <STZ8@plt>

LLVM IR (-O0):
define void @Op74E1() {
%1 = call i32 @DirectIndexedXE1(i32 2)
%2 = call i32 @STZ8(i32 %1)
ret void
}

LLVM IR (-O2):
define void @Op74E1() {
%1 = tail call i32 @DirectIndexedXE1(i32 2)
%2 = tail call i32 @STZ8(i32 %1)
ret void
}
int console_init(void) {
  (*(volatile unsigned int *)((0x3FF0000 + 0xD000)) = (0x03));
  (*(volatile unsigned int *)((0x3FF0000 + 0xD004)) = (0x09));
  (*(volatile unsigned int *)((0x3FF0000 + 0xD014)) = (0x500));
  return 0;
}


x86 assembly (clang, -O0):
<console_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3ffd000,%eax
movl   $0x3,(%rax)
mov    $0x3ffd004,%eax
movl   $0x9,(%rax)
mov    $0x3ffd014,%eax
movl   $0x500,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<console_init>:
movl   $0x3,0x3ffd000
movl   $0x9,0x3ffd004
movl   $0x500,0x3ffd014
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @console_init() {
store volatile i32 3, i32* inttoptr (i64 67096576 to i32*)
store volatile i32 9, i32* inttoptr (i64 67096580 to i32*)
store volatile i32 1280, i32* inttoptr (i64 67096596 to i32*)
ret i32 0
}

LLVM IR (-O2):
define i32 @console_init() {
store volatile i32 3, i32* inttoptr (i64 67096576 to i32*)
store volatile i32 9, i32* inttoptr (i64 67096580 to i32*)
store volatile i32 1280, i32* inttoptr (i64 67096596 to i32*)
ret i32 0
}
long SBREAK(incr)
long *incr;
{
  long *retptr;
  retptr = sbreak(*incr);
  if (retptr == (long *)-1)
    return (-1);
  return ((long)retptr);
}


x86 assembly (clang, -O0):
<SBREAK>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
mov    $0x0,%al
call   1030 <sbreak@plt>
cltq
mov    %rax,-0x18(%rbp)
mov    $0xffffffffffffffff,%rax
cmp    %rax,-0x18(%rbp)
jne    114e <SBREAK+0x3e>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    1156 <SBREAK+0x46>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SBREAK>:
push   %rax
mov    (%rdi),%rdi
xor    %eax,%eax
call   1030 <sbreak@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i64 @SBREAK(i64* %0) {
%2 = alloca i64
%3 = alloca i64*
%4 = alloca i64*
store i64* %0, i64** %3
%5 = load i64*, i64** %3
%6 = load i64, i64* %5
%7 = call i32 (i64, ...) bitcast (i32 (...)* @sbreak to i32 (i64, ...)*)(i64 %6)
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i64*
store i64* %9, i64** %4
%10 = load i64*, i64** %4
%11 = icmp eq i64* %10, inttoptr (i64 -1 to i64*)
br i1 %11, label %12, label %13
12: ; preds = %1
store i64 -1, i64* %2
br label %16
13: ; preds = %1
%14 = load i64*, i64** %4
%15 = ptrtoint i64* %14 to i64
store i64 %15, i64* %2
br label %16
16: ; preds = %13, %12
%17 = load i64, i64* %2
ret i64 %17
}

LLVM IR (-O2):
define i64 @SBREAK(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = tail call i32 (i64, ...) bitcast (i32 (...)* @sbreak to i32 (i64, ...)*)(i64 %2)
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i64*
%6 = icmp eq i64* %5, inttoptr (i64 -1 to i64*)
%7 = select i1 %6, i64 -1, i64 %4
ret i64 %7
}
/* Type definitions */
struct stat {
  size_t st_size;
};

/* Variables and functions */
int fstat(int, struct stat *);
size_t file_size(int file_descriptor) {
  struct stat s;
  if (fstat(file_descriptor, &s) == -1)
    return 0;
  else
    return s.st_size;
}


x86 assembly (clang, -O0):
<file_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
lea    -0x18(%rbp),%rsi
call   1030 <fstat@plt>
cmp    $0xffffffff,%eax
jne    113d <file_size+0x2d>
movq   $0x0,-0x8(%rbp)
jmp    1145 <file_size+0x35>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_size>:
push   %rax
mov    %rsp,%rsi
call   1030 <fstat@plt>
cmp    $0xffffffff,%eax
je     1124 <file_size+0x14>
mov    (%rsp),%rax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i64 }
define i64 @file_size(i32 %0) {
%2 = alloca i64
%3 = alloca i32
%4 = alloca %struct.stat
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i32 @fstat(i32 %5, %struct.stat* %4)
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %9
8: ; preds = %1
store i64 0, i64* %2
br label %12
9: ; preds = %1
%10 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%11 = load i64, i64* %10
store i64 %11, i64* %2
br label %12
12: ; preds = %9, %8
%13 = load i64, i64* %2
ret i64 %13
}

LLVM IR (-O2):
%struct.stat = type { i64 }
define i64 @file_size(i32 %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i32 @fstat(i32 %0, %struct.stat* %2)
%5 = icmp eq i32 %4, -1
%6 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%7 = load i64, i64* %6
%8 = select i1 %5, i64 0, i64 %7
ret i64 %8
}
int compar(int key1, int key2) { return key1 - key2; }


x86 assembly (clang, -O0):
<compar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compar>:
mov    %edi,%eax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @compar(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @compar(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
ret i32 %3
}
/* Variables and functions */
int PAPI_remove_event(int, int);
void PAPIF_REMOVE_EVENT(int *EventSet, int *Event, int *check) {
  *check = PAPI_remove_event(*EventSet, *Event);
}


x86 assembly (clang, -O0):
<PAPIF_REMOVE_EVENT>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
call   1030 <PAPI_remove_event@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PAPIF_REMOVE_EVENT>:
push   %rbx
mov    %rdx,%rbx
mov    (%rdi),%edi
mov    (%rsi),%esi
call   1030 <PAPI_remove_event@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @PAPIF_REMOVE_EVENT(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = load i32*, i32** %5
%10 = load i32, i32* %9
%11 = call i32 @PAPI_remove_event(i32 %8, i32 %10)
%12 = load i32*, i32** %6
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @PAPIF_REMOVE_EVENT(i32* nocapture %0, i32* nocapture %1, i32* nocapture writeonly %2) {
%4 = load i32, i32* %0
%5 = load i32, i32* %1
%6 = tail call i32 @PAPI_remove_event(i32 %4, i32 %5)
store i32 %6, i32* %2
ret void
}
/* Type definitions */
struct _similarity {
  int dummy;
};

/* Variables and functions */
float sqrtf(float);
float similarity_tf(struct _similarity *_sml, float freq) {
  return sqrtf(freq);
}


x86 assembly (clang, -O0):
<similarity_tf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
call   1030 <sqrtf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<similarity_tf>:
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     111d <similarity_tf+0xd>
sqrtss %xmm0,%xmm0
ret
jmp    1030 <sqrtf@plt>

LLVM IR (-O0):
%struct._similarity = type { i32 }
define float @similarity_tf(%struct._similarity* %0, float %1) {
%3 = alloca %struct._similarity*
%4 = alloca float
store %struct._similarity* %0, %struct._similarity** %3
store float %1, float* %4
%5 = load float, float* %4
%6 = call float @sqrtf(float %5)
ret float %6
}

LLVM IR (-O2):
%struct._similarity = type { i32 }
define float @similarity_tf(%struct._similarity* nocapture readnone %0, float %1) {
%3 = tail call float @sqrtf(float %1)
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void genksyms_usage(void) {
  fputs(
      "Usage:\n"
      "genksyms [-adDTwqhV] > /path/to/.tmp_obj.ver\n"
      "\n"
      "  -a                    Select architecture\n"
      "  -d                    Increment the debug level (repeatable)\n"
      "  -D                    Dump expanded symbol defs (for debugging only)\n"
      "  -r file               Read reference symbols from a file\n"
      "  -T file               Dump expanded types into file\n"
      "  -p                    Preserve reference modversions or fail\n"
      "  -w                    Enable warnings\n"
      "  -q                    Disable warnings (default)\n"
      "  -h                    Print this message\n"
      "  -V                    Print the release version\n",
      stderr);
}


x86 assembly (clang, -O0):
<genksyms_usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <fputs@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<genksyms_usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
lea    0xee0(%rip),%rdi
jmp    1030 <fputs@plt>

LLVM IR (-O0):
@.str = [592 x i8] c"Usage:\0Agenksyms [-adDTwqhV] > /path/to/.tmp_obj.ver\0A\0A -a Select architecture\0A -d Increment the debug level (repeatable)\0A -D Dump expanded symbol defs (for debugging only)\0A -r file Read reference symbols from a file\0A -T file Dump expanded types into file\0A -p Preserve reference modversions or fail\0A -w Enable warnings\0A -q Disable warnings (default)\0A -h Print this message\0A -V Print the release version\0A\00"
@stderr = global i32 0
define void @genksyms_usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([592 x i8], [592 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [592 x i8] c"Usage:\0Agenksyms [-adDTwqhV] > /path/to/.tmp_obj.ver\0A\0A -a Select architecture\0A -d Increment the debug level (repeatable)\0A -D Dump expanded symbol defs (for debugging only)\0A -r file Read reference symbols from a file\0A -T file Dump expanded types into file\0A -p Preserve reference modversions or fail\0A -w Enable warnings\0A -q Disable warnings (default)\0A -h Print this message\0A -V Print the release version\0A\00"
@stderr = global i32 0
define void @genksyms_usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([592 x i8], [592 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
int hashtbl_int_equals(const void *a, const void *b) {
  return *((const int *)a) == *((const int *)b);
}


x86 assembly (clang, -O0):
<hashtbl_int_equals>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashtbl_int_equals>:
mov    (%rdi),%ecx
xor    %eax,%eax
cmp    (%rsi),%ecx
sete   %al
ret

LLVM IR (-O0):
define i32 @hashtbl_int_equals(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = icmp eq i32 %7, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @hashtbl_int_equals(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp eq i32 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ O_WRONLY;
int /*<<< orphan*/ close(int);
int open(char *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char const *);
int /*<<< orphan*/ write(int, char const *, int /*<<< orphan*/);
void kmsg_print(const char *msg) {
  int fd = open("/dev/kmsg", O_WRONLY);
  if (fd > 0) {
    write(fd, msg, strlen(msg));
    close(fd);
  }
}


x86 assembly (clang, -O0):
<kmsg_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e85(%rip),%rax
mov    (%rax),%esi
lea    0xea4(%rip),%rdi
call   1060 <open@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    119b <kmsg_print+0x5b>
mov    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <write@plt>
mov    -0xc(%rbp),%edi
call   1050 <close@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kmsg_print>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2e8b(%rip),%rax
mov    (%rax),%esi
lea    0xeaa(%rip),%rdi
call   1060 <open@plt>
test   %eax,%eax
jle    1182 <kmsg_print+0x42>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1040 <strlen@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <write@plt>
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <close@plt>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [10 x i8] c"/dev/kmsg\00"
@O_WRONLY = global i32 0
define void @kmsg_print(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i32, i32* @O_WRONLY
%5 = call i32 @open(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %16
8: ; preds = %1
%9 = load i32, i32* %3
%10 = load i8*, i8** %2
%11 = load i8*, i8** %2
%12 = call i32 @strlen(i8* %11)
%13 = call i32 @write(i32 %9, i8* %10, i32 %12)
%14 = load i32, i32* %3
%15 = call i32 @close(i32 %14)
br label %16
16: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"/dev/kmsg\00"
@O_WRONLY = global i32 0
define void @kmsg_print(i8* %0) {
%2 = load i32, i32* @O_WRONLY
%3 = tail call i32 @open(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = tail call i32 @strlen(i8* %0)
%7 = tail call i32 @write(i32 %3, i8* %0, i32 %6)
%8 = tail call i32 @close(i32 %3)
br label %9
9: ; preds = %5, %1
ret void
}
/* Variables and functions */
unsigned long mainCounter(int);
unsigned long Counter() { return mainCounter(1); }


x86 assembly (clang, -O0):
<Counter>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <mainCounter@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Counter>:
mov    $0x1,%edi
jmp    1030 <mainCounter@plt>

LLVM IR (-O0):
define i64 @Counter() {
%1 = call i64 @mainCounter(i32 1)
ret i64 %1
}

LLVM IR (-O2):
define i64 @Counter() {
%1 = tail call i64 @mainCounter(i32 1)
ret i64 %1
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void SysCtlGPIOAHBDisable(uint32_t ui32GPIOPeripheral) {

  ;
  (*((volatile uint32_t *)(0x400FE06C))) &= ~(1 << (ui32GPIOPeripheral & 0xF));
}


x86 assembly (clang, -O0):
<SysCtlGPIOAHBDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
and    $0xf,%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
mov    $0x400fe06c,%ecx
mov    (%rcx),%ecx
and    %eax,%ecx
mov    $0x400fe06c,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlGPIOAHBDisable>:
mov    %edi,%ecx
and    $0xf,%cl
mov    $0xfffffffe,%eax
rol    %cl,%eax
and    %eax,0x400fe06c
ret

LLVM IR (-O0):
define void @SysCtlGPIOAHBDisable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 15
%5 = shl i32 1, %4
%6 = xor i32 %5, -1
%7 = load volatile i32, i32* inttoptr (i64 1074782316 to i32*)
%8 = and i32 %7, %6
store volatile i32 %8, i32* inttoptr (i64 1074782316 to i32*)
ret void
}

LLVM IR (-O2):
define void @SysCtlGPIOAHBDisable(i32 %0) {
%2 = and i32 %0, 15
%3 = shl nuw nsw i32 1, %2
%4 = xor i32 %3, -1
%5 = load volatile i32, i32* inttoptr (i64 1074782316 to i32*)
%6 = and i32 %5, %4
store volatile i32 %6, i32* inttoptr (i64 1074782316 to i32*)
ret void
}