xunge/DecIR huggingface dataset:
/* Variables and functions */
int a0_0();
int a0_0_special() { return a0_0(); }


x86 assembly (clang, -O0):
<a0_0_special>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <a0_0@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<a0_0_special>:
xor    %eax,%eax
jmp    1030 <a0_0@plt>

LLVM IR (-O0):
define i32 @a0_0_special() {
%1 = call i32 (...) @a0_0()
ret i32 %1
}

LLVM IR (-O2):
define i32 @a0_0_special() {
%1 = tail call i32 (...) @a0_0()
ret i32 %1
}
void Vector_Scale(double out[3], double v[3], double scale) {
  for (int c = 0; c < 3; c++) {
    out[c] = v[c] * scale;
  }
}


x86 assembly (clang, -O0):
<Vector_Scale>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movsd  %xmm0,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
cmpl   $0x3,-0x1c(%rbp)
jge    114f <Vector_Scale+0x4f>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
mulsd  -0x18(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movsd  %xmm0,(%rax,%rcx,8)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1118 <Vector_Scale+0x18>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Vector_Scale>:
movsd  (%rsi),%xmm1
mulsd  %xmm0,%xmm1
movsd  %xmm1,(%rdi)
movsd  0x8(%rsi),%xmm1
mulsd  %xmm0,%xmm1
movsd  %xmm1,0x8(%rdi)
mulsd  0x10(%rsi),%xmm0
movsd  %xmm0,0x10(%rdi)
ret

LLVM IR (-O0):
define void @Vector_Scale(double* %0, double* %1, double %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca double
%7 = alloca i32
store double* %0, double** %4
store double* %1, double** %5
store double %2, double* %6
store i32 0, i32* %7
br label %8
8: ; preds = %23, %3
%9 = load i32, i32* %7
%10 = icmp slt i32 %9, 3
br i1 %10, label %11, label %26
11: ; preds = %8
%12 = load double*, double** %5
%13 = load i32, i32* %7
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds double, double* %12, i64 %14
%16 = load double, double* %15
%17 = load double, double* %6
%18 = fmul double %16, %17
%19 = load double*, double** %4
%20 = load i32, i32* %7
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds double, double* %19, i64 %21
store double %18, double* %22
br label %23
23: ; preds = %11
%24 = load i32, i32* %7
%25 = add nsw i32 %24, 1
store i32 %25, i32* %7
br label %8
26: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @Vector_Scale(double* nocapture writeonly %0, double* nocapture %1, double %2) {
%4 = load double, double* %1
%5 = fmul double %4, %2
store double %5, double* %0
%6 = getelementptr inbounds double, double* %1, i64 1
%7 = load double, double* %6
%8 = fmul double %7, %2
%9 = getelementptr inbounds double, double* %0, i64 1
store double %8, double* %9
%10 = getelementptr inbounds double, double* %1, i64 2
%11 = load double, double* %10
%12 = fmul double %11, %2
%13 = getelementptr inbounds double, double* %0, i64 2
store double %12, double* %13
ret void
}
int get_bif_type(int ibr, int ntot, int lab) {
  int type = 1;
  if (ibr < 0 && ntot < 0)
    type = 3;
  if (ibr < 0 && ntot > 0)
    type = 4;
  if (ibr > 0 && ntot > 0)
    type = 2;
  if (ibr > 0 && ntot < 0)
    type = 1;
  return (type);
}


x86 assembly (clang, -O0):
<get_bif_type>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    112f <get_bif_type+0x2f>
cmpl   $0x0,-0x8(%rbp)
jge    112f <get_bif_type+0x2f>
movl   $0x3,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    114a <get_bif_type+0x4a>
cmpl   $0x0,-0x8(%rbp)
jle    114a <get_bif_type+0x4a>
movl   $0x4,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1165 <get_bif_type+0x65>
cmpl   $0x0,-0x8(%rbp)
jle    1165 <get_bif_type+0x65>
movl   $0x2,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1180 <get_bif_type+0x80>
cmpl   $0x0,-0x8(%rbp)
jge    1180 <get_bif_type+0x80>
movl   $0x1,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_bif_type>:
mov    %esi,%eax
and    %edi,%eax
shr    $0x1e,%eax
or     $0x1,%eax
test   %esi,%esi
mov    $0x4,%ecx
cmovle %eax,%ecx
test   %edi,%edi
cmovns %eax,%ecx
test   %esi,%esi
mov    $0x2,%edx
cmovle %ecx,%edx
test   %edi,%edi
cmovle %ecx,%edx
test   %esi,%esi
mov    $0x1,%eax
cmovns %edx,%eax
test   %edi,%edi
cmovle %edx,%eax
ret

LLVM IR (-O0):
define i32 @get_bif_type(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 1, i32* %7
%8 = load i32, i32* %4
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i32, i32* %5
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %10
store i32 3, i32* %7
br label %14
14: ; preds = %13, %10, %3
%15 = load i32, i32* %4
%16 = icmp slt i32 %15, 0
br i1 %16, label %17, label %21
17: ; preds = %14
%18 = load i32, i32* %5
%19 = icmp sgt i32 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %17
store i32 4, i32* %7
br label %21
21: ; preds = %20, %17, %14
%22 = load i32, i32* %4
%23 = icmp sgt i32 %22, 0
br i1 %23, label %24, label %28
24: ; preds = %21
%25 = load i32, i32* %5
%26 = icmp sgt i32 %25, 0
br i1 %26, label %27, label %28
27: ; preds = %24
store i32 2, i32* %7
br label %28
28: ; preds = %27, %24, %21
%29 = load i32, i32* %4
%30 = icmp sgt i32 %29, 0
br i1 %30, label %31, label %35
31: ; preds = %28
%32 = load i32, i32* %5
%33 = icmp slt i32 %32, 0
br i1 %33, label %34, label %35
34: ; preds = %31
store i32 1, i32* %7
br label %35
35: ; preds = %34, %31, %28
%36 = load i32, i32* %7
ret i32 %36
}

LLVM IR (-O2):
define i32 @get_bif_type(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, 0
%5 = icmp slt i32 %1, 0
%6 = and i32 %1, %0
%7 = icmp slt i32 %6, 0
%8 = select i1 %7, i32 3, i32 1
%9 = icmp sgt i32 %1, 0
%10 = and i1 %4, %9
%11 = select i1 %10, i32 4, i32 %8
%12 = icmp sgt i32 %0, 0
%13 = and i1 %12, %9
%14 = select i1 %13, i32 2, i32 %11
%15 = and i1 %12, %5
%16 = select i1 %15, i32 1, i32 %14
ret i32 %16
}
/* Type definitions */
struct mntent {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int addmntent(FILE *fp, const struct mntent *mnt) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<addmntent>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ed5(%rip),%rax
mov    (%rax),%ecx
mov    0x2ebc(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<addmntent>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.mntent = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @addmntent(i32* %0, %struct.mntent* %1) {
%3 = alloca i32*
%4 = alloca %struct.mntent*
store i32* %0, i32** %3
store %struct.mntent* %1, %struct.mntent** %4
%5 = load i32, i32* @ENOSYS
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
%struct.mntent = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @addmntent(i32* nocapture readnone %0, %struct.mntent* nocapture readnone %1) {
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}
int getAreaForLedX(int ind, int areasX) {
  return (int)(((float)ind / (float)((73) + (0) - (0))) * (float)areasX);
}


x86 assembly (clang, -O0):
<getAreaForLedX>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
movss  0xee9(%rip),%xmm1
divss  %xmm1,%xmm0
cvtsi2ssl -0x8(%rbp),%xmm1
mulss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getAreaForLedX>:
cvtsi2ss %edi,%xmm0
divss  0xef4(%rip),%xmm0
cvtsi2ss %esi,%xmm1
mulss  %xmm0,%xmm1
cvttss2si %xmm1,%eax
ret

LLVM IR (-O0):
define i32 @getAreaForLedX(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = sitofp i32 %5 to float
%7 = fdiv float %6, 7.300000e+01
%8 = load i32, i32* %4
%9 = sitofp i32 %8 to float
%10 = fmul float %7, %9
%11 = fptosi float %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @getAreaForLedX(i32 %0, i32 %1) {
%3 = sitofp i32 %0 to float
%4 = fdiv float %3, 7.300000e+01
%5 = sitofp i32 %1 to float
%6 = fmul float %4, %5
%7 = fptosi float %6 to i32
ret i32 %7
}
/* Variables and functions */
char *op_get_current();
int /*<<< orphan*/ strcpy(char *, char const *);
void get_output_plugin(unsigned int id, char *buf) {
  const char *value = op_get_current();
  if (value)
    strcpy(buf, value);
}


x86 assembly (clang, -O0):
<get_output_plugin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <op_get_current@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1152 <get_output_plugin+0x32>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <strcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_output_plugin>:
push   %rbx
mov    %rsi,%rbx
xor    %eax,%eax
call   1030 <op_get_current@plt>
test   %rax,%rax
je     113c <get_output_plugin+0x1c>
mov    %rbx,%rdi
mov    %rax,%rsi
pop    %rbx
jmp    1040 <strcpy@plt>
pop    %rbx
ret

LLVM IR (-O0):
define void @get_output_plugin(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = call i8* (...) @op_get_current()
store i8* %6, i8** %5
%7 = load i8*, i8** %5
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i8*, i8** %4
%11 = load i8*, i8** %5
%12 = call i32 @strcpy(i8* %10, i8* %11)
br label %13
13: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
define void @get_output_plugin(i32 %0, i8* %1) {
%3 = tail call i8* (...) @op_get_current()
%4 = icmp eq i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @strcpy(i8* %1, i8* %3)
br label %7
7: ; preds = %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _reverse(char *);
void _itoa(int n, char *s) {
  char *str = s;
  while (n) {
    *s = n % 10 + '0';
    s++;
    n = n / 10;
  }
  *s = '\0';
  _reverse(str);
}


x86 assembly (clang, -O0):
<_itoa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1166 <_itoa+0x56>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
add    $0x30,%edx
mov    %dl,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    1127 <_itoa+0x17>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x18(%rbp),%rdi
call   1030 <_reverse@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_itoa>:
mov    %rsi,%r8
mov    %rsi,%rax
test   %edi,%edi
je     1154 <_itoa+0x44>
mov    %r8,%rax
nopl   (%rax)
movslq %edi,%rcx
imul   $0x66666667,%rcx,%rdi
mov    %rdi,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rdi
add    %edx,%edi
lea    (%rdi,%rdi,1),%edx
lea    (%rdx,%rdx,4),%edx
mov    %ecx,%esi
sub    %edx,%esi
add    $0x30,%sil
mov    %sil,(%rax)
add    $0x1,%rax
add    $0x9,%ecx
cmp    $0x12,%ecx
ja     1120 <_itoa+0x10>
movb   $0x0,(%rax)
mov    %r8,%rdi
jmp    1030 <_reverse@plt>

LLVM IR (-O0):
define void @_itoa(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
store i8* %6, i8** %5
br label %7
7: ; preds = %10, %2
%8 = load i32, i32* %3
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %20
10: ; preds = %7
%11 = load i32, i32* %3
%12 = srem i32 %11, 10
%13 = add nsw i32 %12, 48
%14 = trunc i32 %13 to i8
%15 = load i8*, i8** %4
store i8 %14, i8* %15
%16 = load i8*, i8** %4
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %4
%18 = load i32, i32* %3
%19 = sdiv i32 %18, 10
store i32 %19, i32* %3
br label %7
20: ; preds = %7
%21 = load i8*, i8** %4
store i8 0, i8* %21
%22 = load i8*, i8** %5
%23 = call i32 @_reverse(i8* %22)
ret void
}

LLVM IR (-O2):
define void @_itoa(i32 %0, i8* %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %14, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %11, %4 ], [ %0, %2 ]
%6 = phi i8* [ %10, %4 ], [ %1, %2 ]
%7 = srem i32 %5, 10
%8 = trunc i32 %7 to i8
%9 = add nsw i8 %8, 48
store i8 %9, i8* %6
%10 = getelementptr inbounds i8, i8* %6, i64 1
%11 = sdiv i32 %5, 10
%12 = add i32 %5, 9
%13 = icmp ult i32 %12, 19
br i1 %13, label %14, label %4
14: ; preds = %4, %2
%15 = phi i8* [ %1, %2 ], [ %10, %4 ]
store i8 0, i8* %15
%16 = tail call i32 @_reverse(i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void mat_fact() { printf("inside mat_fact\n"); }


x86 assembly (clang, -O0):
<mat_fact>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mat_fact>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"inside mat_fact\0A\00"
define void @mat_fact() {
%1 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [16 x i8] c"inside mat_fact\00"
define void @mat_fact() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
ret void
}
int Vector_insert(int value) {}


x86 assembly (clang, -O0):
<Vector_insert>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Vector_insert>:
ret

LLVM IR (-O0):
define i32 @Vector_insert(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @Vector_insert(i32 %0) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ AbsoluteIndexedXX1(int);
int /*<<< orphan*/ ROL16(int /*<<< orphan*/, int);
void Op3EM0X1(void) { ROL16(AbsoluteIndexedXX1(3), 0xFFFFFF); }


x86 assembly (clang, -O0):
<Op3EM0X1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <AbsoluteIndexedXX1@plt>
mov    %eax,%edi
mov    $0xffffff,%esi
call   1040 <ROL16@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Op3EM0X1>:
push   %rax
mov    $0x3,%edi
call   1030 <AbsoluteIndexedXX1@plt>
mov    %eax,%edi
mov    $0xffffff,%esi
pop    %rax
jmp    1040 <ROL16@plt>

LLVM IR (-O0):
define void @Op3EM0X1() {
%1 = call i32 @AbsoluteIndexedXX1(i32 3)
%2 = call i32 @ROL16(i32 %1, i32 16777215)
ret void
}

LLVM IR (-O2):
define void @Op3EM0X1() {
%1 = tail call i32 @AbsoluteIndexedXX1(i32 3)
%2 = tail call i32 @ROL16(i32 %1, i32 16777215)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void MEMORY_RELEASE(void *p) {
  if (p)
    free(p);
}


x86 assembly (clang, -O0):
<MEMORY_RELEASE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <MEMORY_RELEASE+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MEMORY_RELEASE>:
test   %rdi,%rdi
je     111a <MEMORY_RELEASE+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @MEMORY_RELEASE(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @MEMORY_RELEASE(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
int determineSign(int num) { return (num > 0) ? 1 : (num < 0) ? -1 : 0; }


x86 assembly (clang, -O0):
<determineSign>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    111e <determineSign+0x1e>
mov    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1131 <determineSign+0x31>
mov    -0x4(%rbp),%edx
xor    %eax,%eax
mov    $0xffffffff,%ecx
cmp    $0x0,%edx
cmovl  %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<determineSign>:
xor    %ecx,%ecx
test   %edi,%edi
setne  %cl
neg    %ecx
test   %edi,%edi
mov    $0x1,%eax
cmovle %ecx,%eax
ret

LLVM IR (-O0):
define i32 @determineSign(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %11
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp slt i32 %7, 0
%9 = zext i1 %8 to i64
%10 = select i1 %8, i32 -1, i32 0
br label %11
11: ; preds = %6, %5
%12 = phi i32 [ 1, %5 ], [ %10, %6 ]
ret i32 %12
}

LLVM IR (-O2):
define i32 @determineSign(i32 %0) {
%2 = icmp ne i32 %0, 0
%3 = sext i1 %2 to i32
%4 = icmp slt i32 %0, 1
%5 = select i1 %4, i32 %3, i32 1
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ init_genrand(unsigned long);
void SetSeed(unsigned long seed) { init_genrand(seed); }


x86 assembly (clang, -O0):
<SetSeed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <init_genrand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetSeed>:
jmp    1030 <init_genrand@plt>

LLVM IR (-O0):
define void @SetSeed(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @init_genrand(i64 %3)
ret void
}

LLVM IR (-O2):
define void @SetSeed(i64 %0) {
%2 = tail call i32 @init_genrand(i64 %0)
ret void
}
int OmronWriteFloat(int plc_id, char type, unsigned short addr, float *data) {
  return -1;
}


x86 assembly (clang, -O0):
<OmronWriteFloat>:
push   %rbp
mov    %rsp,%rbp
mov    %dx,%ax
mov    %sil,%dl
mov    %edi,-0x4(%rbp)
mov    %dl,-0x5(%rbp)
mov    %ax,-0x8(%rbp)
mov    %rcx,-0x10(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OmronWriteFloat>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @OmronWriteFloat(i32 %0, i8 signext %1, i16 zeroext %2, float* %3) {
%5 = alloca i32
%6 = alloca i8
%7 = alloca i16
%8 = alloca float*
store i32 %0, i32* %5
store i8 %1, i8* %6
store i16 %2, i16* %7
store float* %3, float** %8
ret i32 -1
}

LLVM IR (-O2):
define i32 @OmronWriteFloat(i32 %0, i8 signext %1, i16 zeroext %2, float* nocapture readnone %3) {
ret i32 -1
}
void io_start(void) { ; }


x86 assembly (clang, -O0):
<io_start>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<io_start>:
ret

LLVM IR (-O0):
define void @io_start() {
ret void
}

LLVM IR (-O2):
define void @io_start() {
ret void
}
imm0indreg1(r0, r1, x0, x1, p0, p1) double r0, r1;
double *p0, *p1;
{
  if (22 <= (*p1))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<imm0indreg1>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
mov    %edi,-0x1c(%rbp)
mov    %esi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
mov    -0x30(%rbp),%rax
movsd  (%rax),%xmm0
movsd  0xed4(%rip),%xmm1
ucomisd %xmm1,%xmm0
jb     1142 <imm0indreg1+0x42>
movl   $0x1,-0x4(%rbp)
jmp    1149 <imm0indreg1+0x49>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<imm0indreg1>:
movsd  (%rcx),%xmm0
xor    %eax,%eax
ucomisd 0xef2(%rip),%xmm0
setae  %al
ret

LLVM IR (-O0):
define i32 @imm0indreg1(double %0, double %1, i32 %2, i32 %3, double* %4, double* %5) {
%7 = alloca i32
%8 = alloca double
%9 = alloca double
%10 = alloca i32
%11 = alloca i32
%12 = alloca double*
%13 = alloca double*
store double %0, double* %8
store double %1, double* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store double* %4, double** %12
store double* %5, double** %13
%14 = load double*, double** %13
%15 = load double, double* %14
%16 = fcmp ole double 2.200000e+01, %15
br i1 %16, label %17, label %18
17: ; preds = %6
store i32 1, i32* %7
br label %19
18: ; preds = %6
store i32 0, i32* %7
br label %19
19: ; preds = %18, %17
%20 = load i32, i32* %7
ret i32 %20
}

LLVM IR (-O2):
define i32 @imm0indreg1(double %0, double %1, i32 %2, i32 %3, double* nocapture readnone %4, double* nocapture %5) {
%7 = load double, double* %5
%8 = fcmp oge double %7, 2.200000e+01
%9 = zext i1 %8 to i32
ret i32 %9
}
void UARTFIFODisable(unsigned long ulBase) {
  ;
  (*((volatile unsigned long *)(ulBase + 0x0000002C))) &= ~(0x00000010);
}


x86 assembly (clang, -O0):
<UARTFIFODisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2c(%rax),%rcx
and    $0xffffffffffffffef,%rcx
mov    %rcx,0x2c(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTFIFODisable>:
andq   $0xffffffffffffffef,0x2c(%rdi)
ret

LLVM IR (-O0):
define void @UARTFIFODisable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 44
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, -17
store volatile i64 %7, i64* %5
ret void
}

LLVM IR (-O2):
define void @UARTFIFODisable(i64 %0) {
%2 = add i64 %0, 44
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = and i64 %4, -17
store volatile i64 %5, i64* %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;
struct helium_channel {
  int dummy;
};

/* Variables and functions */
int _helium_channel_send(struct helium_channel *, int, int,
                         int /*<<< orphan*/ *, int /*<<< orphan*/,
                         int /*<<< orphan*/ *);
int helium_channel_ping(struct helium_channel *channel, uint16_t *token) {
  return _helium_channel_send(channel, 0x09, 0x0A, NULL, 0, token);
}


x86 assembly (clang, -O0):
<helium_channel_ping>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%r9
mov    $0x9,%esi
mov    $0xa,%edx
xor    %eax,%eax
mov    %eax,%ecx
xor    %r8d,%r8d
call   1030 <_helium_channel_send@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<helium_channel_ping>:
mov    %rsi,%r9
mov    $0x9,%esi
mov    $0xa,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <_helium_channel_send@plt>

LLVM IR (-O0):
%struct.helium_channel = type { i32 }
define i32 @helium_channel_ping(%struct.helium_channel* %0, i32* %1) {
%3 = alloca %struct.helium_channel*
%4 = alloca i32*
store %struct.helium_channel* %0, %struct.helium_channel** %3
store i32* %1, i32** %4
%5 = load %struct.helium_channel*, %struct.helium_channel** %3
%6 = load i32*, i32** %4
%7 = call i32 @_helium_channel_send(%struct.helium_channel* %5, i32 9, i32 10, i32* null, i32 0, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.helium_channel = type { i32 }
define i32 @helium_channel_ping(%struct.helium_channel* %0, i32* %1) {
%3 = tail call i32 @_helium_channel_send(%struct.helium_channel* %0, i32 9, i32 10, i32* null, i32 0, i32* %1)
ret i32 %3
}
unsigned long tf_bL(signed char x, unsigned long c) { return c / 3; }


x86 assembly (clang, -O0):
<tf_bL>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    $0x3,%ecx
xor    %edx,%edx
div    %rcx
pop    %rbp
ret

x86 assembly (clang, -O2):
<tf_bL>:
mov    %rsi,%rax
movabs $0xaaaaaaaaaaaaaaab,%rcx
aa aa aa
mul    %rcx
mov    %rdx,%rax
shr    %rax
ret

LLVM IR (-O0):
define i64 @tf_bL(i8 signext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
store i8 %0, i8* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = udiv i64 %5, 3
ret i64 %6
}

LLVM IR (-O2):
define i64 @tf_bL(i8 signext %0, i64 %1) {
%3 = udiv i64 %1, 3
ret i64 %3
}
void handle_39(sig) int sig;
{}


x86 assembly (clang, -O0):
<handle_39>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_39>:
ret

LLVM IR (-O0):
define void @handle_39(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @handle_39(i32 %0) {
ret void
}
/* Variables and functions */
float tanhf(float);
void sTanh_process(float bIn, float *bOut) { *bOut = tanhf(bIn); }


x86 assembly (clang, -O0):
<sTanh_process>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <tanhf@plt>
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sTanh_process>:
push   %rbx
mov    %rdi,%rbx
call   1030 <tanhf@plt>
movss  %xmm0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @sTanh_process(float %0, float* %1) {
%3 = alloca float
%4 = alloca float*
store float %0, float* %3
store float* %1, float** %4
%5 = load float, float* %3
%6 = call float @tanhf(float %5)
%7 = load float*, float** %4
store float %6, float* %7
ret void
}

LLVM IR (-O2):
define void @sTanh_process(float %0, float* nocapture writeonly %1) {
%3 = tail call float @tanhf(float %0)
store float %3, float* %1
ret void
}
/* Variables and functions */
scalar_t__ getgid();
scalar_t__ getuid();
int serverIsPrivileged(void) { return getuid() == 0 && getgid() == 0; }


x86 assembly (clang, -O0):
<serverIsPrivileged>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getuid@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x1(%rbp)
jne    1152 <serverIsPrivileged+0x32>
mov    $0x0,%al
call   1040 <getgid@plt>
cmp    $0x0,%rax
sete   %al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serverIsPrivileged>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <getuid@plt>
test   %rax,%rax
jne    113e <serverIsPrivileged+0x1e>
xor    %eax,%eax
call   1040 <getgid@plt>
xor    %ebx,%ebx
test   %rax,%rax
sete   %bl
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @serverIsPrivileged() {
%1 = call i64 (...) @getuid()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = call i64 (...) @getgid()
%5 = icmp eq i64 %4, 0
br label %6
6: ; preds = %3, %0
%7 = phi i1 [ false, %0 ], [ %5, %3 ]
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @serverIsPrivileged() {
%1 = tail call i64 (...) @getuid()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %7
3: ; preds = %0
%4 = tail call i64 (...) @getgid()
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %0
%8 = phi i32 [ 0, %0 ], [ %6, %3 ]
ret i32 %8
}
int compar(const void *a, const void *b) { return *(int *)a - *(int *)b; }


x86 assembly (clang, -O0):
<compar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compar>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @compar(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @compar(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}
struct sync_pt_info *sync_pt_info(struct sync_fence_info_data *info,
                                  struct sync_pt_info *itr) {
  return 0;
}


x86 assembly (clang, -O0):
<sync_pt_info>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sync_pt_info>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.sync_fence_info_data = type opaque
%struct.sync_pt_info = type opaque
define %struct.sync_pt_info* @sync_pt_info(%struct.sync_fence_info_data* %0, %struct.sync_pt_info* %1) {
%3 = alloca %struct.sync_fence_info_data*
%4 = alloca %struct.sync_pt_info*
store %struct.sync_fence_info_data* %0, %struct.sync_fence_info_data** %3
store %struct.sync_pt_info* %1, %struct.sync_pt_info** %4
ret %struct.sync_pt_info* null
}

LLVM IR (-O2):
%struct.sync_fence_info_data = type opaque
%struct.sync_pt_info = type opaque
define noalias %struct.sync_pt_info* @sync_pt_info(%struct.sync_fence_info_data* nocapture readnone %0, %struct.sync_pt_info* nocapture readnone %1) {
ret %struct.sync_pt_info* null
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char *, char *);
void smbios_str_print(FILE *f, char *str, char *label) {
  if (str)
    fprintf(f, "    %s: \"%s\"\n", label, str);
}


x86 assembly (clang, -O0):
<smbios_str_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1147 <smbios_str_print+0x37>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xebe(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smbios_str_print>:
test   %rsi,%rsi
je     1124 <smbios_str_print+0x14>
mov    %rsi,%rcx
lea    0xee1(%rip),%rsi
jmp    1030 <fprintf@plt>
ret

LLVM IR (-O0):
@.str = [14 x i8] c" %s: \22%s\22\0A\00"
define void @smbios_str_print(i32* %0, i8* %1, i8* %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i8*
store i32* %0, i32** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %5
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %14
9: ; preds = %3
%10 = load i32*, i32** %4
%11 = load i8*, i8** %6
%12 = load i8*, i8** %5
%13 = call i32 @fprintf(i32* %10, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %11, i8* %12)
br label %14
14: ; preds = %9, %3
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c" %s: \22%s\22\0A\00"
define void @smbios_str_print(i32* nocapture %0, i8* %1, i8* %2) {
%4 = icmp eq i8* %1, null
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %2, i8* %1)
br label %7
7: ; preds = %5, %3
ret void
}
/* Type definitions */
struct stack_st_OPENSSL_STRING {
  int dummy;
};
typedef int /*<<< orphan*/ OPENSSL_STACK;

/* Variables and functions */
int OPENSSL_sk_insert(int /*<<< orphan*/ *, void const *, int);
int sk_OPENSSL_STRING_insert(struct stack_st_OPENSSL_STRING *sk, char *ptr,
                             int idx) {
  return OPENSSL_sk_insert((OPENSSL_STACK *)sk, (const void *)ptr, idx);
}


x86 assembly (clang, -O0):
<sk_OPENSSL_STRING_insert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <OPENSSL_sk_insert@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sk_OPENSSL_STRING_insert>:
jmp    1030 <OPENSSL_sk_insert@plt>

LLVM IR (-O0):
%struct.stack_st_OPENSSL_STRING = type { i32 }
define i32 @sk_OPENSSL_STRING_insert(%struct.stack_st_OPENSSL_STRING* %0, i8* %1, i32 %2) {
%4 = alloca %struct.stack_st_OPENSSL_STRING*
%5 = alloca i8*
%6 = alloca i32
store %struct.stack_st_OPENSSL_STRING* %0, %struct.stack_st_OPENSSL_STRING** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load %struct.stack_st_OPENSSL_STRING*, %struct.stack_st_OPENSSL_STRING** %4
%8 = bitcast %struct.stack_st_OPENSSL_STRING* %7 to i32*
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 @OPENSSL_sk_insert(i32* %8, i8* %9, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
%struct.stack_st_OPENSSL_STRING = type { i32 }
define i32 @sk_OPENSSL_STRING_insert(%struct.stack_st_OPENSSL_STRING* %0, i8* %1, i32 %2) {
%4 = getelementptr %struct.stack_st_OPENSSL_STRING, %struct.stack_st_OPENSSL_STRING* %0, i64 0, i32 0
%5 = tail call i32 @OPENSSL_sk_insert(i32* %4, i8* %1, i32 %2)
ret i32 %5
}
int minmax(int i1, int i2) {
  return (((i1) > (i2)) ? (i1) : (i2)) - (((i1) < (i2)) ? (i1) : (i2));
}


x86 assembly (clang, -O0):
<minmax>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <minmax+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <minmax+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1144 <minmax+0x44>
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    114a <minmax+0x4a>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
mov    -0x14(%rbp),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<minmax>:
cmp    %esi,%edi
mov    %esi,%eax
cmovg  %edi,%eax
cmovl  %edi,%esi
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @minmax(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
%14 = load i32, i32* %3
%15 = load i32, i32* %4
%16 = icmp slt i32 %14, %15
br i1 %16, label %17, label %19
17: ; preds = %12
%18 = load i32, i32* %3
br label %21
19: ; preds = %12
%20 = load i32, i32* %4
br label %21
21: ; preds = %19, %17
%22 = phi i32 [ %18, %17 ], [ %20, %19 ]
%23 = sub nsw i32 %13, %22
ret i32 %23
}

LLVM IR (-O2):
define i32 @minmax(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
%5 = icmp slt i32 %0, %1
%6 = select i1 %5, i32 %0, i32 %1
%7 = sub nsw i32 %4, %6
ret i32 %7
}
unsigned char __atomic_load_1(const volatile void *atom, int memorder) {
  return *(volatile unsigned char *)atom;
}


x86 assembly (clang, -O0):
<__atomic_load_1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__atomic_load_1>:
mov    (%rdi),%al
ret

LLVM IR (-O0):
define zeroext i8 @__atomic_load_1(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load volatile i8, i8* %5
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @__atomic_load_1(i8* %0, i32 %1) {
%3 = load volatile i8, i8* %0
ret i8 %3
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int solcon_number_of_dobldobl_solutions(int *length) {
  int *a, fail;
  double *c;
  fail = _ada_use_c2phc(342, a, length, c);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_number_of_dobldobl_solutions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x156,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_number_of_dobldobl_solutions>:
mov    %rdi,%rdx
mov    $0x156,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @solcon_number_of_dobldobl_solutions(i32* %0) {
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca i32
%5 = alloca double*
store i32* %0, i32** %2
%6 = load i32*, i32** %3
%7 = load i32*, i32** %2
%8 = load double*, double** %5
%9 = call i32 @_ada_use_c2phc(i32 342, i32* %6, i32* %7, double* %8)
store i32 %9, i32* %4
%10 = load i32, i32* %4
ret i32 %10
}

LLVM IR (-O2):
define i32 @solcon_number_of_dobldobl_solutions(i32* %0) {
%2 = tail call i32 @_ada_use_c2phc(i32 342, i32* undef, i32* %0, double* undef)
ret i32 %2
}
/* Type definitions */
struct graph {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ graph_add_vertex(struct graph *, int);
void graph_init_vertices(struct graph *g, int *vertices, int size) {
  int i;
  for (i = 0; i < size; i++) {
    graph_add_vertex(g, vertices[i]);
  }
}


x86 assembly (clang, -O0):
<graph_init_vertices>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1158 <graph_init_vertices+0x48>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
call   1030 <graph_add_vertex@plt>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    112a <graph_init_vertices+0x1a>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<graph_init_vertices>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %edx,%edx
jle    1145 <graph_init_vertices+0x35>
mov    %rsi,%r14
mov    %rdi,%r15
mov    %edx,%r12d
xor    %ebx,%ebx
nopw   0x0(%rax,%rax,1)
mov    (%r14,%rbx,4),%esi
mov    %r15,%rdi
call   1030 <graph_add_vertex@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <graph_init_vertices+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.graph = type { i32 }
define void @graph_init_vertices(%struct.graph* %0, i32* %1, i32 %2) {
%4 = alloca %struct.graph*
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
store %struct.graph* %0, %struct.graph** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %20, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %23
12: ; preds = %8
%13 = load %struct.graph*, %struct.graph** %4
%14 = load i32*, i32** %5
%15 = load i32, i32* %7
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = call i32 @graph_add_vertex(%struct.graph* %13, i32 %18)
br label %20
20: ; preds = %12
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
store i32 %22, i32* %7
br label %8
23: ; preds = %8
ret void
}

LLVM IR (-O2):
%struct.graph = type { i32 }
define void @graph_init_vertices(%struct.graph* %0, i32* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %14
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %7
7: ; preds = %5, %7
%8 = phi i64 [ 0, %5 ], [ %12, %7 ]
%9 = getelementptr inbounds i32, i32* %1, i64 %8
%10 = load i32, i32* %9
%11 = tail call i32 @graph_add_vertex(%struct.graph* %0, i32 %10)
%12 = add nuw nsw i64 %8, 1
%13 = icmp eq i64 %12, %6
br i1 %13, label %14, label %7
14: ; preds = %7, %3
ret void
}
int FqCompare(const void *vp, const void *vq) {
  const float *p = vp;
  const float *q = vq;
  if (*p > *q)
    return (1);
  else if (*p < *q)
    return (-1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<FqCompare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x28(%rbp),%rax
ucomiss (%rax),%xmm0
jbe    113d <FqCompare+0x3d>
movl   $0x1,-0x4(%rbp)
jmp    1169 <FqCompare+0x69>
mov    -0x20(%rbp),%rax
movss  (%rax),%xmm1
mov    -0x28(%rbp),%rax
movss  (%rax),%xmm0
ucomiss %xmm1,%xmm0
jbe    1162 <FqCompare+0x62>
movl   $0xffffffff,-0x4(%rbp)
jmp    1169 <FqCompare+0x69>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FqCompare>:
movss  (%rdi),%xmm0
movss  (%rsi),%xmm1
xor    %ecx,%ecx
ucomiss %xmm0,%xmm1
seta   %cl
neg    %ecx
ucomiss %xmm1,%xmm0
mov    $0x1,%eax
cmovbe %ecx,%eax
ret

LLVM IR (-O0):
define i32 @FqCompare(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca float*
%7 = alloca float*
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to float*
store float* %9, float** %6
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to float*
store float* %11, float** %7
%12 = load float*, float** %6
%13 = load float, float* %12
%14 = load float*, float** %7
%15 = load float, float* %14
%16 = fcmp ogt float %13, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 1, i32* %3
br label %26
18: ; preds = %2
%19 = load float*, float** %6
%20 = load float, float* %19
%21 = load float*, float** %7
%22 = load float, float* %21
%23 = fcmp olt float %20, %22
br i1 %23, label %24, label %25
24: ; preds = %18
store i32 -1, i32* %3
br label %26
25: ; preds = %18
store i32 0, i32* %3
br label %26
26: ; preds = %25, %24, %17
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @FqCompare(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to float*
%4 = bitcast i8* %1 to float*
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp ogt float %5, %6
%8 = fcmp olt float %5, %6
%9 = sext i1 %8 to i32
%10 = select i1 %7, i32 1, i32 %9
ret i32 %10
}
double compute_weighted_credits(int class1_credits, double class1_grade,
                                int class2_credits, double class2_grade,
                                int class3_credits, double class3_grade) {
  double weighted_credits = 0;
  weighted_credits = (class1_credits * class1_grade) +
                     (class2_credits * class2_grade) +
                     (class3_credits * class3_grade);
  return weighted_credits;
}


x86 assembly (clang, -O0):
<compute_weighted_credits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
movsd  %xmm1,-0x20(%rbp)
mov    %edx,-0x24(%rbp)
movsd  %xmm2,-0x30(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x38(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm2
cvtsi2sdl -0x14(%rbp),%xmm0
mulsd  -0x20(%rbp),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
cvtsi2sdl -0x24(%rbp),%xmm0
movsd  -0x30(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x38(%rbp)
movsd  -0x38(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<compute_weighted_credits>:
cvtsi2sd %edi,%xmm3
cvtsi2sd %esi,%xmm4
mulsd  %xmm1,%xmm4
mulsd  %xmm3,%xmm0
addsd  %xmm4,%xmm0
xorps  %xmm1,%xmm1
cvtsi2sd %edx,%xmm1
mulsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @compute_weighted_credits(i32 %0, double %1, i32 %2, double %3, i32 %4, double %5) {
%7 = alloca i32
%8 = alloca double
%9 = alloca i32
%10 = alloca double
%11 = alloca i32
%12 = alloca double
%13 = alloca double
store i32 %0, i32* %7
store double %1, double* %8
store i32 %2, i32* %9
store double %3, double* %10
store i32 %4, i32* %11
store double %5, double* %12
store double 0.000000e+00, double* %13
%14 = load i32, i32* %7
%15 = sitofp i32 %14 to double
%16 = load double, double* %8
%17 = load i32, i32* %9
%18 = sitofp i32 %17 to double
%19 = load double, double* %10
%20 = fmul double %18, %19
%21 = call double @llvm.fmuladd.f64(double %15, double %16, double %20)
%22 = load i32, i32* %11
%23 = sitofp i32 %22 to double
%24 = load double, double* %12
%25 = call double @llvm.fmuladd.f64(double %23, double %24, double %21)
store double %25, double* %13
%26 = load double, double* %13
ret double %26
}

LLVM IR (-O2):
define double @compute_weighted_credits(i32 %0, double %1, i32 %2, double %3, i32 %4, double %5) {
%7 = sitofp i32 %0 to double
%8 = sitofp i32 %2 to double
%9 = fmul double %8, %3
%10 = tail call double @llvm.fmuladd.f64(double %7, double %1, double %9)
%11 = sitofp i32 %4 to double
%12 = tail call double @llvm.fmuladd.f64(double %11, double %5, double %10)
ret double %12
}
__attribute__((no, noclone)) unsigned __int128 t173_5sub(signed __int128 x) {
  unsigned __int128 r;
  if (__builtin_sub_overflow(x, (signed __int128)(4), &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t173_5sub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rdx
mov    -0x28(%rbp),%rcx
mov    %rcx,%r9
sar    $0x3f,%r9
add    $0xfffffffffffffffc,%rdx
adc    $0xffffffffffffffff,%rcx
mov    %r9,%r8
adc    $0xffffffffffffffff,%r8
adc    $0xffffffffffffffff,%r9
mov    %r8d,%eax
and    $0x1,%eax
mov    %eax,%esi
mov    %rsi,%rax
neg    %rax
mov    %rax,%rdi
xor    %r9,%rdi
xor    %r8,%rax
or     %rdi,%rax
or     %rsi,%rax
setne  %al
mov    %rdx,-0x40(%rbp)
mov    %rcx,-0x38(%rbp)
test   $0x1,%al
jne    1187 <t173_5sub+0x77>
jmp    118e <t173_5sub+0x7e>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t173_5sub>:
push   %r14
push   %rbx
push   %rax
xor    %eax,%eax
mov    %rdi,%r14
add    $0xfffffffffffffffc,%r14
mov    %rsi,%rbx
adc    $0xffffffffffffffff,%rbx
mov    $0x3,%ecx
cmp    %rdi,%rcx
sbb    %rsi,%rax
jl     1138 <t173_5sub+0x28>
xor    %eax,%eax
call   1030 <bar@plt>
mov    %r14,%rax
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define { i64, i64 } @t173_5sub(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = bitcast i128* %4 to { i64, i64 }*
%8 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 0
store i64 %0, i64* %8
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 1
store i64 %1, i64* %9
%10 = load i128, i128* %4
store i128 %10, i128* %5
%11 = load i128, i128* %5
%12 = sext i128 %11 to i129
%13 = call { i129, i1 } @llvm.ssub.with.overflow.i129(i129 %12, i129 4)
%14 = extractvalue { i129, i1 } %13, 1
%15 = extractvalue { i129, i1 } %13, 0
%16 = trunc i129 %15 to i128
%17 = zext i128 %16 to i129
%18 = icmp ne i129 %15, %17
%19 = or i1 %14, %18
store i128 %16, i128* %6
br i1 %19, label %20, label %22
20: ; preds = %2
%21 = call i32 (...) @bar()
br label %22
22: ; preds = %20, %2
%23 = load i128, i128* %6
store i128 %23, i128* %3
%24 = bitcast i128* %3 to { i64, i64 }*
%25 = load { i64, i64 }, { i64, i64 }* %24
ret { i64, i64 } %25
}

LLVM IR (-O2):
define { i64, i64 } @t173_5sub(i64 %0, i64 %1) {
%3 = zext i64 %1 to i128
%4 = shl nuw i128 %3, 64
%5 = zext i64 %0 to i128
%6 = or i128 %4, %5
%7 = zext i128 %6 to i129
%8 = add nsw i129 %7, -4
%9 = icmp slt i128 %6, 4
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = tail call i32 (...) @bar()
br label %12
12: ; preds = %10, %2
%13 = trunc i129 %8 to i64
%14 = lshr i129 %8, 64
%15 = trunc i129 %14 to i64
%16 = insertvalue { i64, i64 } poison, i64 %13, 0
%17 = insertvalue { i64, i64 } %16, i64 %15, 1
ret { i64, i64 } %17
}
/* Variables and functions */
void *calloc(size_t, size_t);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void *xcalloc(size_t nmemb, size_t size) {
  void *ptr = calloc(nmemb, size);
  if (!ptr) {
    fprintf(stderr, "Out of memory, calloc failed\n");
    exit(1);
  }
  return ptr;
}


x86 assembly (clang, -O0):
<xcalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    117b <xcalloc+0x4b>
mov    0x2e7d(%rip),%rax
mov    (%rax),%edi
lea    0xe94(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xcalloc>:
push   %rax
call   1030 <calloc@plt>
test   %rax,%rax
je     113d <xcalloc+0xd>
pop    %rcx
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [30 x i8] c"Out of memory, calloc failed\0A\00"
define i8* @xcalloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i8* @calloc(i64 %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %15, label %11
11: ; preds = %2
%12 = load i32, i32* @stderr
%13 = call i32 @fprintf(i32 %12, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%14 = call i32 @exit(i32 1)
unreachable
15: ; preds = %2
%16 = load i8*, i8** %5
ret i8* %16
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [30 x i8] c"Out of memory, calloc failed\0A\00"
define noalias i8* @xcalloc(i64 %0, i64 %1) {
%3 = tail call i8* @calloc(i64 %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%8 = tail call i32 @exit(i32 1)
unreachable
9: ; preds = %2
ret i8* %3
}