xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_eval(int);
int strncmp(char *, char *, int);
void strncmp_diff_length_1() {
  char *x = "123";
  char *y = "23456";
  clang_analyzer_eval(strncmp(x, y, 5) == -1);
}


x86 assembly (clang, -O0):
<strncmp_diff_length_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x5,%edx
call   1030 <strncmp@plt>
cmp    $0xffffffff,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <clang_analyzer_eval@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncmp_diff_length_1>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xed5(%rip),%rsi
mov    $0x5,%edx
call   1030 <strncmp@plt>
xor    %edi,%edi
cmp    $0xffffffff,%eax
sete   %dil
pop    %rax
jmp    1040 <clang_analyzer_eval@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"123\00"
@.str.1 = [6 x i8] c"23456\00"
define void @strncmp_diff_length_1() {
%1 = alloca i8*
%2 = alloca i8*
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %1
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %1
%4 = load i8*, i8** %2
%5 = call i32 @strncmp(i8* %3, i8* %4, i32 5)
%6 = icmp eq i32 %5, -1
%7 = zext i1 %6 to i32
%8 = call i32 @clang_analyzer_eval(i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"123\00"
@.str.1 = [6 x i8] c"23456\00"
define void @strncmp_diff_length_1() {
%1 = tail call i32 @strncmp(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 5)
%2 = icmp eq i32 %1, -1
%3 = zext i1 %2 to i32
%4 = tail call i32 @clang_analyzer_eval(i32 %3)
ret void
}
/* Variables and functions */
int id(int);
int id2(int x) {
  if (x == 0)
    return 0;
  int ret = id(x - 1) + 1;
  if (ret > 3)
    return 3;
  return ret;
}


x86 assembly (clang, -O0):
<id2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1131 <id2+0x21>
movl   $0x0,-0x4(%rbp)
jmp    115e <id2+0x4e>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <id@plt>
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x3,-0xc(%rbp)
jle    1158 <id2+0x48>
movl   $0x3,-0x4(%rbp)
jmp    115e <id2+0x4e>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<id2>:
test   %edi,%edi
je     1130 <id2+0x20>
push   %rax
add    $0xffffffff,%edi
call   1030 <id@plt>
lea    0x1(%rax),%ecx
cmp    $0x3,%eax
mov    $0x3,%eax
cmovl  %ecx,%eax
add    $0x8,%rsp
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @id2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %18
8: ; preds = %1
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 1
%11 = call i32 @id(i32 %10)
%12 = add nsw i32 %11, 1
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = icmp sgt i32 %13, 3
br i1 %14, label %15, label %16
15: ; preds = %8
store i32 3, i32* %2
br label %18
16: ; preds = %8
%17 = load i32, i32* %4
store i32 %17, i32* %2
br label %18
18: ; preds = %16, %15, %7
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @id2(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = add nsw i32 %0, -1
%5 = tail call i32 @id(i32 %4)
%6 = add nsw i32 %5, 1
%7 = icmp slt i32 %5, 3
%8 = select i1 %7, i32 %6, i32 3
br label %9
9: ; preds = %1, %3
%10 = phi i32 [ %8, %3 ], [ 0, %1 ]
ret i32 %10
}
/* Variables and functions */
int sign_extend(unsigned int, int);
int extract_17(unsigned word) {
  return sign_extend(
      ((word) >> (31 - (28)) & ((1 << ((28) - (19) + 1)) - 1)) |
          ((word) >> (31 - (29)) & ((1 << ((29) - (29) + 1)) - 1)) << 10 |
          ((word) >> (31 - (15)) & ((1 << ((15) - (11) + 1)) - 1)) << 11 |
          (word & 0x1) << 16,
      17);
}


x86 assembly (clang, -O0):
<extract_17>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
shr    $0x3,%edi
and    $0x3ff,%edi
mov    -0x4(%rbp),%eax
shr    $0x2,%eax
and    $0x1,%eax
shl    $0xa,%eax
or     %eax,%edi
mov    -0x4(%rbp),%eax
shr    $0x10,%eax
and    $0x1f,%eax
shl    $0xb,%eax
or     %eax,%edi
mov    -0x4(%rbp),%eax
and    $0x1,%eax
shl    $0x10,%eax
or     %eax,%edi
mov    $0x11,%esi
call   1030 <sign_extend@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<extract_17>:
mov    %edi,%eax
shr    $0x3,%eax
and    $0x3ff,%eax
mov    %edi,%ecx
and    $0x4,%ecx
shl    $0x8,%ecx
or     %eax,%ecx
mov    %edi,%eax
shr    $0x5,%eax
and    $0xf800,%eax
or     %ecx,%eax
and    $0x1,%edi
shl    $0x10,%edi
or     %eax,%edi
mov    $0x11,%esi
jmp    1030 <sign_extend@plt>

LLVM IR (-O0):
define i32 @extract_17(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 3
%5 = and i32 %4, 1023
%6 = load i32, i32* %2
%7 = lshr i32 %6, 2
%8 = and i32 %7, 1
%9 = shl i32 %8, 10
%10 = or i32 %5, %9
%11 = load i32, i32* %2
%12 = lshr i32 %11, 16
%13 = and i32 %12, 31
%14 = shl i32 %13, 11
%15 = or i32 %10, %14
%16 = load i32, i32* %2
%17 = and i32 %16, 1
%18 = shl i32 %17, 16
%19 = or i32 %15, %18
%20 = call i32 @sign_extend(i32 %19, i32 17)
ret i32 %20
}

LLVM IR (-O2):
define i32 @extract_17(i32 %0) {
%2 = lshr i32 %0, 3
%3 = and i32 %2, 1023
%4 = shl i32 %0, 8
%5 = and i32 %4, 1024
%6 = or i32 %3, %5
%7 = lshr i32 %0, 5
%8 = and i32 %7, 63488
%9 = or i32 %6, %8
%10 = shl i32 %0, 16
%11 = and i32 %10, 65536
%12 = or i32 %9, %11
%13 = tail call i32 @sign_extend(i32 %12, i32 17)
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ WVP_Done();
void DLLUnRegister() { WVP_Done(); }


x86 assembly (clang, -O0):
<DLLUnRegister>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <WVP_Done@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DLLUnRegister>:
xor    %eax,%eax
jmp    1030 <WVP_Done@plt>

LLVM IR (-O0):
define void @DLLUnRegister() {
%1 = call i32 (...) @WVP_Done()
ret void
}

LLVM IR (-O2):
define void @DLLUnRegister() {
%1 = tail call i32 (...) @WVP_Done()
ret void
}
void TMS_HIGH() {
  *(volatile unsigned long *)((void *)0xfffff400 + 0x30) = (1 << (7));
}


x86 assembly (clang, -O0):
<TMS_HIGH>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffff400,%eax
movq   $0x80,0x30(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TMS_HIGH>:
mov    $0xfffff430,%eax
movq   $0x80,(%rax)
ret

LLVM IR (-O0):
define void @TMS_HIGH() {
store volatile i64 128, i64* bitcast (i8* getelementptr (i8, i8* inttoptr (i64 4294964224 to i8*), i64 48) to i64*)
ret void
}

LLVM IR (-O2):
define void @TMS_HIGH() {
store volatile i64 128, i64* inttoptr (i64 4294964272 to i64*)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputc(unsigned long, int /*<<< orphan*/ *);
void fputi32(unsigned long in, FILE *f) {
  fputc(in, f);
  fputc(in >> 8, f);
  fputc(in >> 16, f);
  fputc(in >> 24, f);
}


x86 assembly (clang, -O0):
<fputi32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
mov    -0x8(%rbp),%rdi
shr    $0x8,%rdi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
mov    -0x8(%rbp),%rdi
shr    $0x10,%rdi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
mov    -0x8(%rbp),%rdi
shr    $0x18,%rdi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fputi32>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <fputc@plt>
mov    %rbx,%rdi
shr    $0x8,%rdi
mov    %r14,%rsi
call   1030 <fputc@plt>
mov    %rbx,%rdi
shr    $0x10,%rdi
mov    %r14,%rsi
call   1030 <fputc@plt>
shr    $0x18,%rbx
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fputc@plt>

LLVM IR (-O0):
define void @fputi32(i64 %0, i32* %1) {
%3 = alloca i64
%4 = alloca i32*
store i64 %0, i64* %3
store i32* %1, i32** %4
%5 = load i64, i64* %3
%6 = load i32*, i32** %4
%7 = call i32 @fputc(i64 %5, i32* %6)
%8 = load i64, i64* %3
%9 = lshr i64 %8, 8
%10 = load i32*, i32** %4
%11 = call i32 @fputc(i64 %9, i32* %10)
%12 = load i64, i64* %3
%13 = lshr i64 %12, 16
%14 = load i32*, i32** %4
%15 = call i32 @fputc(i64 %13, i32* %14)
%16 = load i64, i64* %3
%17 = lshr i64 %16, 24
%18 = load i32*, i32** %4
%19 = call i32 @fputc(i64 %17, i32* %18)
ret void
}

LLVM IR (-O2):
define void @fputi32(i64 %0, i32* nocapture %1) {
%3 = tail call i32 @fputc(i64 %0, i32* %1)
%4 = lshr i64 %0, 8
%5 = tail call i32 @fputc(i64 %4, i32* %1)
%6 = lshr i64 %0, 16
%7 = tail call i32 @fputc(i64 %6, i32* %1)
%8 = lshr i64 %0, 24
%9 = tail call i32 @fputc(i64 %8, i32* %1)
ret void
}
void badDiffOutput(buf) char const *buf;
{ rcsfaterror("bad diff output line: %s", buf); }


x86 assembly (clang, -O0):
<badDiffOutput>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
mov    $0x0,%al
call   1030 <rcsfaterror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<badDiffOutput>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
xor    %eax,%eax
jmp    1030 <rcsfaterror@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"bad diff output line: %s\00"
define void @badDiffOutput(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @rcsfaterror to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"bad diff output line: %s\00"
define void @badDiffOutput(i8* %0) {
%2 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @rcsfaterror to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
void BinIOSwap4(const uint8_t *src, uint8_t *dst) {
  *(dst + 3) = *(src + 0);
  *(dst + 2) = *(src + 1);
  *(dst + 1) = *(src + 2);
  *(dst + 0) = *(src + 3);
}


x86 assembly (clang, -O0):
<BinIOSwap4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0xc(%rax)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<BinIOSwap4>:
mov    (%rdi),%eax
mov    %eax,0xc(%rsi)
mov    0x4(%rdi),%eax
mov    %eax,0x8(%rsi)
mov    0x8(%rdi),%eax
mov    %eax,0x4(%rsi)
mov    0xc(%rdi),%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @BinIOSwap4(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 0
%7 = load i32, i32* %6
%8 = load i32*, i32** %4
%9 = getelementptr inbounds i32, i32* %8, i64 3
store i32 %7, i32* %9
%10 = load i32*, i32** %3
%11 = getelementptr inbounds i32, i32* %10, i64 1
%12 = load i32, i32* %11
%13 = load i32*, i32** %4
%14 = getelementptr inbounds i32, i32* %13, i64 2
store i32 %12, i32* %14
%15 = load i32*, i32** %3
%16 = getelementptr inbounds i32, i32* %15, i64 2
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = getelementptr inbounds i32, i32* %18, i64 1
store i32 %17, i32* %19
%20 = load i32*, i32** %3
%21 = getelementptr inbounds i32, i32* %20, i64 3
%22 = load i32, i32* %21
%23 = load i32*, i32** %4
%24 = getelementptr inbounds i32, i32* %23, i64 0
store i32 %22, i32* %24
ret void
}

LLVM IR (-O2):
define void @BinIOSwap4(i32* nocapture %0, i32* nocapture writeonly %1) {
%3 = load i32, i32* %0
%4 = getelementptr inbounds i32, i32* %1, i64 3
store i32 %3, i32* %4
%5 = getelementptr inbounds i32, i32* %0, i64 1
%6 = load i32, i32* %5
%7 = getelementptr inbounds i32, i32* %1, i64 2
store i32 %6, i32* %7
%8 = getelementptr inbounds i32, i32* %0, i64 2
%9 = load i32, i32* %8
%10 = getelementptr inbounds i32, i32* %1, i64 1
store i32 %9, i32* %10
%11 = getelementptr inbounds i32, i32* %0, i64 3
%12 = load i32, i32* %11
store i32 %12, i32* %1
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int count_bits(uint32_t n) {
  unsigned int c;
  c = n - ((n >> 1) & 0x55555555);
  c = ((c >> 2) & 0x33333333) + (c & 0x33333333);
  c = ((c >> 4) + c) & 0x0F0F0F0F;
  c = ((c >> 8) + c) & 0x00FF00FF;
  c = ((c >> 16) + c) & 0x0000FFFF;
  return c;
}


x86 assembly (clang, -O0):
<count_bits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x1,%ecx
and    $0x55555555,%ecx
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x2,%eax
and    $0x33333333,%eax
mov    -0x8(%rbp),%ecx
and    $0x33333333,%ecx
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x4,%eax
add    -0x8(%rbp),%eax
and    $0xf0f0f0f,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x8,%eax
add    -0x8(%rbp),%eax
and    $0xff00ff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x10,%eax
add    -0x8(%rbp),%eax
and    $0xffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_bits>:
mov    %edi,%eax
shr    %eax
and    $0x55555555,%eax
sub    %eax,%edi
mov    %edi,%eax
shr    $0x2,%eax
and    $0x33333333,%eax
and    $0x33333333,%edi
add    %eax,%edi
mov    %edi,%eax
shr    $0x4,%eax
add    %edi,%eax
and    $0xf0f0f0f,%eax
mov    %eax,%ecx
shr    $0x8,%ecx
add    %eax,%ecx
mov    %ecx,%eax
shr    $0x10,%eax
add    %ecx,%eax
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @count_bits(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* %2
%6 = ashr i32 %5, 1
%7 = and i32 %6, 1431655765
%8 = sub nsw i32 %4, %7
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = lshr i32 %9, 2
%11 = and i32 %10, 858993459
%12 = load i32, i32* %3
%13 = and i32 %12, 858993459
%14 = add i32 %11, %13
store i32 %14, i32* %3
%15 = load i32, i32* %3
%16 = lshr i32 %15, 4
%17 = load i32, i32* %3
%18 = add i32 %16, %17
%19 = and i32 %18, 252645135
store i32 %19, i32* %3
%20 = load i32, i32* %3
%21 = lshr i32 %20, 8
%22 = load i32, i32* %3
%23 = add i32 %21, %22
%24 = and i32 %23, 16711935
store i32 %24, i32* %3
%25 = load i32, i32* %3
%26 = lshr i32 %25, 16
%27 = load i32, i32* %3
%28 = add i32 %26, %27
%29 = and i32 %28, 65535
store i32 %29, i32* %3
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @count_bits(i32 %0) {
%2 = lshr i32 %0, 1
%3 = and i32 %2, 1431655765
%4 = sub nsw i32 %0, %3
%5 = lshr i32 %4, 2
%6 = and i32 %5, 858993459
%7 = and i32 %4, 858993459
%8 = add nuw nsw i32 %6, %7
%9 = lshr i32 %8, 4
%10 = add nuw nsw i32 %9, %8
%11 = and i32 %10, 252645135
%12 = lshr i32 %11, 8
%13 = add nuw nsw i32 %12, %11
%14 = lshr i32 %13, 16
%15 = and i32 %14, 31
%16 = add nuw nsw i32 %15, %13
%17 = and i32 %16, 63
ret i32 %17
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int padcon_standard_initialize_parameter_homotopy(int idx, int verbose) {
  int fail;
  int precision = 0;
  int pars[2];
  double *c;
  pars[0] = idx;
  pars[1] = verbose;
  fail = _ada_use_c2phc4c(878, &precision, pars, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<padcon_standard_initialize_parameter_homotopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
lea    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x36e,%edi
lea    -0x10(%rbp),%rsi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<padcon_standard_initialize_parameter_homotopy>:
sub    $0x18,%rsp
movl   $0x0,0xc(%rsp)
mov    %edi,0x10(%rsp)
mov    %esi,0x14(%rsp)
lea    0xc(%rsp),%rsi
lea    0x10(%rsp),%rdx
mov    $0x36e,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @padcon_standard_initialize_parameter_homotopy(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca [2 x i32]
%8 = alloca double*
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %6
%9 = load i32, i32* %3
%10 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 0
store i32 %9, i32* %10
%11 = load i32, i32* %4
%12 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 1
store i32 %11, i32* %12
%13 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 0
%14 = load double*, double** %8
%15 = call i32 @_ada_use_c2phc4c(i32 878, i32* %6, i32* %13, double* %14, i32 0)
store i32 %15, i32* %5
%16 = load i32, i32* %5
ret i32 %16
}

LLVM IR (-O2):
define i32 @padcon_standard_initialize_parameter_homotopy(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca [2 x i32]
%5 = bitcast i32* %3 to i8*
store i32 0, i32* %3
%6 = bitcast [2 x i32]* %4 to i8*
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 0
store i32 %0, i32* %7
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 1
store i32 %1, i32* %8
%9 = call i32 @_ada_use_c2phc4c(i32 878, i32* %3, i32* %7, double* undef, i32 0)
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ ReadUint32Le(void const *, int /*<<< orphan*/ *);
int /*<<< orphan*/ memcpy(float *, int /*<<< orphan*/ *, int);
int32_t ReadFloatLe(const void *in, float *value) {
  uint32_t u32;
  int32_t length = ReadUint32Le(in, &u32);
  memcpy(value, &u32, sizeof(*value));
  return length;
}


x86 assembly (clang, -O0):
<ReadFloatLe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x14(%rbp),%rsi
call   1040 <ReadUint32Le@plt>
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x14(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReadFloatLe>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
lea    0xc(%rsp),%r14
mov    %r14,%rsi
call   1040 <ReadUint32Le@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
mov    %r14,%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    %ebp,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @ReadFloatLe(i8* %0, float* %1) {
%3 = alloca i8*
%4 = alloca float*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store float* %1, float** %4
%7 = load i8*, i8** %3
%8 = call i32 @ReadUint32Le(i8* %7, i32* %5)
store i32 %8, i32* %6
%9 = load float*, float** %4
%10 = call i32 @memcpy(float* %9, i32* %5, i32 4)
%11 = load i32, i32* %6
ret i32 %11
}

LLVM IR (-O2):
define i32 @ReadFloatLe(i8* %0, float* %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @ReadUint32Le(i8* %0, i32* %3)
%6 = call i32 @memcpy(float* %1, i32* %3, i32 4)
ret i32 %5
}
/* Variables and functions */
char *pbc_malloc(int);
int /*<<< orphan*/ strcpy(char *, char const *);
int strlen(char const *);
char *pbc_strdup(const char *s) {
  int len = strlen(s);
  char *res = pbc_malloc(len + 1);
  strcpy(res, s);
  return res;
}


x86 assembly (clang, -O0):
<pbc_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
add    $0x1,%edi
call   1030 <pbc_malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <strcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pbc_strdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1050 <strlen@plt>
lea    0x1(%rax),%edi
call   1030 <pbc_malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1040 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @pbc_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 1
%9 = call i8* @pbc_malloc(i32 %8)
store i8* %9, i8** %4
%10 = load i8*, i8** %4
%11 = load i8*, i8** %2
%12 = call i32 @strcpy(i8* %10, i8* %11)
%13 = load i8*, i8** %4
ret i8* %13
}

LLVM IR (-O2):
define i8* @pbc_strdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = tail call i8* @pbc_malloc(i32 %3)
%5 = tail call i32 @strcpy(i8* %4, i8* %0)
ret i8* %4
}
long long longlong_ignoring_signedint(long long x, signed int y) { return x; }


x86 assembly (clang, -O0):
<longlong_ignoring_signedint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<longlong_ignoring_signedint>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @longlong_ignoring_signedint(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @longlong_ignoring_signedint(i64 returned %0, i32 %1) {
ret i64 %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  double money = 1e6;
  int i = 0;
  while (money > 0) {
    i++;
    money *= 1.08;
    money -= 1e5;
  }
  printf("%d years\n", i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movsd  0xed9(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    117b <main+0x6b>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
movsd  0xeba(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xe9b(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    1133 <main+0x23>
mov    -0x14(%rbp),%esi
lea    0xe93(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x15,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"%d years\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca i32
store i32 0, i32* %1
store double 1.000000e+06, double* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %0
%5 = load double, double* %2
%6 = fcmp ogt double %5, 0.000000e+00
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
%10 = load double, double* %2
%11 = fmul double %10, 1.080000e+00
store double %11, double* %2
%12 = load double, double* %2
%13 = fsub double %12, 1.000000e+05
store double %13, double* %2
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
%16 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %15)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"%d years\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 21)
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ red_mask;
};
typedef TYPE_1__ Visual;

/* Variables and functions */
unsigned long get_Visual_red_mask(void *_p) {
  return (unsigned long)((Visual *)_p)->red_mask;
}


x86 assembly (clang, -O0):
<get_Visual_red_mask>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_Visual_red_mask>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_Visual_red_mask(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_Visual_red_mask(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
uint16_t eqntohuint16(const uint8_t *data) { return *(uint16_t *)data; }


x86 assembly (clang, -O0):
<eqntohuint16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<eqntohuint16>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @eqntohuint16(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @eqntohuint16(i32* nocapture %0) {
%2 = load i32, i32* %0
ret i32 %2
}
int test_imm_6Auint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x6A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Auint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x6a,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Auint64_highword_mem>:
testb  $0x6a,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Auint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 106
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_6Auint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 455266533376
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int power2(int x) {
  fprintf(stderr, "fast power2()\n");
  return x * x;
}


x86 assembly (clang, -O0):
<power2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
lea    0xed5(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<power2>:
push   %rbx
mov    %edi,%ebx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
call   1030 <fprintf@plt>
imul   %ebx,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [15 x i8] c"fast power2()\0A\00"
define i32 @power2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* %2
%6 = load i32, i32* %2
%7 = mul nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [15 x i8] c"fast power2()\0A\00"
define i32 @power2(i32 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%4 = mul nsw i32 %0, %0
ret i32 %4
}
void putchar1(int c) { asm volatile("out %%al, %%dx" : : "a"(c), "d"(0x3f8)); }


x86 assembly (clang, -O0):
<putchar1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3f8,%edx
out    %al,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<putchar1>:
mov    %edi,%eax
mov    $0x3f8,%edx
out    %al,(%dx)
ret

LLVM IR (-O0):
define void @putchar1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret void
}

LLVM IR (-O2):
define void @putchar1(i32 %0) {
tail call void asm sideeffect "out %al, %dx", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i32 %0, i32 1016)
ret void
}
/* Type definitions */
typedef unsigned long uint32_t;

/* Variables and functions */
void PRCMMcuUldoConfigure(uint32_t ui32Enable) {
  (*((volatile unsigned long
          *)(((unsigned long)(0x40082000 + 0x0000000C) & 0xF0000000) |
             0x02000000 |
             (((unsigned long)(0x40082000 + 0x0000000C) & 0x000FFFFF) << 5) |
             ((0) << 2)))) = ui32Enable;
}


x86 assembly (clang, -O0):
<PRCMMcuUldoConfigure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x43040180,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PRCMMcuUldoConfigure>:
mov    %rdi,0x43040180
43
ret

LLVM IR (-O0):
define void @PRCMMcuUldoConfigure(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
store volatile i64 %3, i64* inttoptr (i64 1124336000 to i64*)
ret void
}

LLVM IR (-O2):
define void @PRCMMcuUldoConfigure(i64 %0) {
store volatile i64 %0, i64* inttoptr (i64 1124336000 to i64*)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ feof(int /*<<< orphan*/ *);
int fgetc(int /*<<< orphan*/ *);
void blKillLine(FILE *fp) {
  int ch;
  ch = fgetc(fp);
  while (ch != '\n' && !feof(fp))
    ch = fgetc(fp);
}


x86 assembly (clang, -O0):
<blKillLine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0xa,-0xc(%rbp)
mov    %al,-0xd(%rbp)
je     115b <blKillLine+0x3b>
mov    -0x8(%rbp),%rdi
call   1040 <feof@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    116b <blKillLine+0x4b>
jmp    117c <blKillLine+0x5c>
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %eax,-0xc(%rbp)
jmp    1138 <blKillLine+0x18>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<blKillLine>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
call   1030 <fgetc@plt>
cmp    $0xa,%eax
je     114b <blKillLine+0x2b>
mov    %rbx,%rdi
call   1040 <feof@plt>
test   %eax,%eax
jne    114b <blKillLine+0x2b>
mov    %rbx,%rdi
jmp    1130 <blKillLine+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @blKillLine(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @fgetc(i32* %4)
store i32 %5, i32* %3
br label %6
6: ; preds = %16, %1
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 10
br i1 %8, label %9, label %14
9: ; preds = %6
%10 = load i32*, i32** %2
%11 = call i32 @feof(i32* %10)
%12 = icmp ne i32 %11, 0
%13 = xor i1 %12, true
br label %14
14: ; preds = %9, %6
%15 = phi i1 [ false, %6 ], [ %13, %9 ]
br i1 %15, label %16, label %19
16: ; preds = %14
%17 = load i32*, i32** %2
%18 = call i32 @fgetc(i32* %17)
store i32 %18, i32* %3
br label %6
19: ; preds = %14
ret void
}

LLVM IR (-O2):
define void @blKillLine(i32* nocapture %0) {
%2 = tail call i32 @fgetc(i32* %0)
%3 = icmp eq i32 %2, 10
br i1 %3, label %10, label %4
4: ; preds = %1, %7
%5 = tail call i32 @feof(i32* %0)
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %4
%8 = tail call i32 @fgetc(i32* %0)
%9 = icmp eq i32 %8, 10
br i1 %9, label %10, label %4
10: ; preds = %4, %7, %1
ret void
}
void *utilDataTransferHostToDevice(void *src, unsigned int numbytes,
                                   unsigned int freeHostMem) {
  return src;
}


x86 assembly (clang, -O0):
<utilDataTransferHostToDevice>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utilDataTransferHostToDevice>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @utilDataTransferHostToDevice(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
ret i8* %7
}

LLVM IR (-O2):
define i8* @utilDataTransferHostToDevice(i8* readnone returned %0, i32 %1, i32 %2) {
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char const *);
void func1() {
  int a = 0;
  char const b[] = "Hello!";
  printf("func1...%i...%s\n", a, b);
}


x86 assembly (clang, -O0):
<func1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xedb(%rip),%eax
mov    %eax,-0xb(%rbp)
mov    0xed5(%rip),%ax
mov    %ax,-0x7(%rbp)
mov    0xecd(%rip),%al
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%esi
lea    -0xb(%rbp),%rdx
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func1>:
push   %rax
movl   $0x216f6c,0x3(%rsp)
movl   $0x6c6c6548,(%rsp)
lea    0xee0(%rip),%rdi
mov    %rsp,%rdx
xor    %esi,%esi
call   1030 <printf@plt>
pop    %rax
ret

LLVM IR (-O0):
@__const.func1.b = [7 x i8] c"Hello!\00"
@.str = [17 x i8] c"func1...%i...%s\0A\00"
define void @func1() {
%1 = alloca i32
%2 = alloca [7 x i8]
store i32 0, i32* %1
%3 = bitcast [7 x i8]* %2 to i8*
%4 = load i32, i32* %1
%5 = getelementptr inbounds [7 x i8], [7 x i8]* %2, i64 0, i64 0
%6 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %4, i8* %5)
ret void
}

LLVM IR (-O2):
@__const.func1.b = [7 x i8] c"Hello!\00"
@.str = [17 x i8] c"func1...%i...%s\0A\00"
define void @func1() {
%1 = alloca [7 x i8]
%2 = getelementptr inbounds [7 x i8], [7 x i8]* %1, i64 0, i64 0
%3 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 0, i8* %2)
ret void
}
regx0adrx1(r0, r1, x0, x1, p0, p1) double r0, r1;
double *p0, *p1;
{
  if ((p0[x0]) <= (((double *)(11111111 & ~(__alignof__(double) - 1)))[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<regx0adrx1>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
mov    %edi,-0x1c(%rbp)
mov    %esi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
mov    -0x28(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm1
movslq -0x20(%rbp),%rcx
mov    $0xa98ac0,%eax
movsd  (%rax,%rcx,8),%xmm0
ucomisd %xmm1,%xmm0
jb     114d <regx0adrx1+0x4d>
movl   $0x1,-0x4(%rbp)
jmp    1154 <regx0adrx1+0x54>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<regx0adrx1>:
movslq %edi,%rcx
movslq %esi,%rax
movsd  0xa98ac0(,%rax,8),%xmm0
xor    %eax,%eax
ucomisd (%rdx,%rcx,8),%xmm0
setae  %al
ret

LLVM IR (-O0):
define i32 @regx0adrx1(double %0, double %1, i32 %2, i32 %3, double* %4, double* %5) {
%7 = alloca i32
%8 = alloca double
%9 = alloca double
%10 = alloca i32
%11 = alloca i32
%12 = alloca double*
%13 = alloca double*
store double %0, double* %8
store double %1, double* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store double* %4, double** %12
store double* %5, double** %13
%14 = load double*, double** %12
%15 = load i32, i32* %10
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds double, double* %14, i64 %16
%18 = load double, double* %17
%19 = load i32, i32* %11
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds double, double* inttoptr (i64 11111104 to double*), i64 %20
%22 = load double, double* %21
%23 = fcmp ole double %18, %22
br i1 %23, label %24, label %25
24: ; preds = %6
store i32 1, i32* %7
br label %26
25: ; preds = %6
store i32 0, i32* %7
br label %26
26: ; preds = %25, %24
%27 = load i32, i32* %7
ret i32 %27
}

LLVM IR (-O2):
define i32 @regx0adrx1(double %0, double %1, i32 %2, i32 %3, double* nocapture %4, double* nocapture readnone %5) {
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds double, double* %4, i64 %7
%9 = load double, double* %8
%10 = sext i32 %3 to i64
%11 = getelementptr inbounds double, double* inttoptr (i64 11111104 to double*), i64 %10
%12 = load double, double* %11
%13 = fcmp ole double %9, %12
%14 = zext i1 %13 to i32
ret i32 %14
}
unsigned char LIB_Utils_DownCase(unsigned char ubyCh) {
  if ('A' <= ubyCh && ubyCh <= 'Z')
    return ubyCh + 'a' - 'A';
  else
    return ubyCh;
}


x86 assembly (clang, -O0):
<LIB_Utils_DownCase>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%ecx
mov    $0x41,%eax
cmp    %ecx,%eax
jg     113a <LIB_Utils_DownCase+0x3a>
movzbl -0x2(%rbp),%eax
cmp    $0x5a,%eax
jg     113a <LIB_Utils_DownCase+0x3a>
movzbl -0x2(%rbp),%eax
add    $0x61,%eax
sub    $0x41,%eax
mov    %al,-0x1(%rbp)
jmp    1140 <LIB_Utils_DownCase+0x40>
mov    -0x2(%rbp),%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LIB_Utils_DownCase>:
lea    -0x41(%rdi),%eax
lea    0x20(%rdi),%ecx
cmp    $0x1a,%al
movzbl %cl,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @LIB_Utils_DownCase(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = icmp sle i32 65, %5
br i1 %6, label %7, label %17
7: ; preds = %1
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = icmp sle i32 %9, 90
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = add nsw i32 %13, 97
%15 = sub nsw i32 %14, 65
%16 = trunc i32 %15 to i8
store i8 %16, i8* %2
br label %19
17: ; preds = %7, %1
%18 = load i8, i8* %3
store i8 %18, i8* %2
br label %19
19: ; preds = %17, %11
%20 = load i8, i8* %2
ret i8 %20
}

LLVM IR (-O2):
define zeroext i8 @LIB_Utils_DownCase(i8 zeroext %0) {
%2 = add i8 %0, -65
%3 = icmp ult i8 %2, 26
%4 = add i8 %0, 32
%5 = select i1 %3, i8 %4, i8 %0
ret i8 %5
}
double chpl_macro_NAN(void) {
  double x;
  *(unsigned long long int *)&x = 0x7ff8000000000001ULL;
  return x;
}


x86 assembly (clang, -O0):
<chpl_macro_NAN>:
push   %rbp
mov    %rsp,%rbp
movabs $0x7ff8000000000001,%rax
mov    %rax,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<chpl_macro_NAN>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @chpl_macro_NAN() {
%1 = alloca double
%2 = bitcast double* %1 to i64*
store i64 9221120237041090561, i64* %2
%3 = load double, double* %1
ret double %3
}

LLVM IR (-O2):
define double @chpl_macro_NAN() {
ret double 0x7FF8000000000001
}
long long foo(int *b) { return 10 * (long long)*b; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movslq (%rax),%rax
imul   $0xa,%rax,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
movslq (%rdi),%rax
add    %rax,%rax
lea    (%rax,%rax,4),%rax
ret

LLVM IR (-O0):
define i64 @foo(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = sext i32 %4 to i64
%6 = mul nsw i64 10, %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @foo(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = sext i32 %2 to i64
%4 = mul nsw i64 %3, 10
ret i64 %4
}
unsigned long fnv1hash(unsigned char *str) {
  unsigned long hash = 0;
  while (*str) {
    hash *= (0x01000193UL);
    hash ^= *str++;
  }
  return hash;
}


x86 assembly (clang, -O0):
<fnv1hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1148 <fnv1hash+0x48>
imul   $0x1000193,-0x10(%rbp),%rax
01
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%eax
xor    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <fnv1hash+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fnv1hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1129 <fnv1hash+0x29>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
imul   $0x1000193,%rax,%rdx
movzbl %cl,%eax
xor    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <fnv1hash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @fnv1hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %4
%9 = load i64, i64* %3
%10 = mul i64 %9, 16777619
store i64 %10, i64* %3
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
%13 = load i8, i8* %11
%14 = zext i8 %13 to i64
%15 = load i64, i64* %3
%16 = xor i64 %15, %14
store i64 %16, i64* %3
br label %4
17: ; preds = %4
%18 = load i64, i64* %3
ret i64 %18
}

LLVM IR (-O2):
define i64 @fnv1hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i64 [ %11, %4 ], [ 0, %1 ]
%7 = phi i8* [ %9, %4 ], [ %0, %1 ]
%8 = mul i64 %6, 16777619
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = zext i8 %5 to i64
%11 = xor i64 %8, %10
%12 = load i8, i8* %9
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ 0, %1 ], [ %11, %4 ]
ret i64 %15
}
/* Variables and functions */
char *strtok(char *restrict str, const char *restrict delim) { return NULL; }


x86 assembly (clang, -O0):
<strtok>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtok>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @strtok(i8* noalias %0, i8* noalias %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @strtok(i8* noalias nocapture readnone %0, i8* noalias nocapture readnone %1) {
ret i8* null
}
/* Variables and functions */
scalar_t__ func1();
scalar_t__ func2();
int main() { return func1() + func2() == 0 ? 0 : 1; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <func1@plt>
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1040 <func2@plt>
mov    -0x10(%rbp),%rdx
add    %rax,%rdx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%rdx
cmove  %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1030 <func1@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1040 <func2@plt>
xor    %ecx,%ecx
add    %rbx,%rax
setne  %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 (...) @func1()
%3 = call i64 (...) @func2()
%4 = add nsw i64 %2, %3
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 0, i32 1
ret i32 %7
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 (...) @func1()
%2 = tail call i64 (...) @func2()
%3 = sub i64 0, %2
%4 = icmp ne i64 %1, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int read_dobldobl_target_system_without_solutions(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(872, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<read_dobldobl_target_system_without_solutions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x368,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_dobldobl_target_system_without_solutions>:
mov    $0x368,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @read_dobldobl_target_system_without_solutions() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 872, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @read_dobldobl_target_system_without_solutions() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 872, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
void wpas_dbus_signal_scan_done(struct wpa_supplicant *wpa_s, int success) {}


x86 assembly (clang, -O0):
<wpas_dbus_signal_scan_done>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpas_dbus_signal_scan_done>:
ret

LLVM IR (-O0):
%struct.wpa_supplicant = type opaque
define void @wpas_dbus_signal_scan_done(%struct.wpa_supplicant* %0, i32 %1) {
%3 = alloca %struct.wpa_supplicant*
%4 = alloca i32
store %struct.wpa_supplicant* %0, %struct.wpa_supplicant** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.wpa_supplicant = type opaque
define void @wpas_dbus_signal_scan_done(%struct.wpa_supplicant* nocapture %0, i32 %1) {
ret void
}
int gamma_dummy_init(void *state) { return 0; }


x86 assembly (clang, -O0):
<gamma_dummy_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gamma_dummy_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @gamma_dummy_init(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @gamma_dummy_init(i8* nocapture readnone %0) {
ret i32 0
}
__attribute__((no, noclone)) unsigned __int128 t105_2mul(signed char y) {
  unsigned char x = (17);
  unsigned __int128 r;
  if (__builtin_mul_overflow(x, y, &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t105_2mul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %dil,%al
mov    %al,-0x11(%rbp)
movb   $0x11,-0x12(%rbp)
movzbl -0x12(%rbp),%eax
mov    %rax,-0x48(%rbp)
movsbq -0x11(%rbp),%rdx
mov    %rdx,%rcx
sar    $0x3f,%rcx
mov    %eax,%edi
mov    %ecx,%esi
imul   %edi,%esi
mov    %esi,-0x3c(%rbp)
mul    %rdx
mov    %rax,%rsi
mov    -0x48(%rbp),%rax
mov    %rsi,-0x38(%rbp)
mov    %rdx,%rdi
mul    %rcx
mov    %rax,%rcx
mov    -0x3c(%rbp),%eax
mov    %rdx,%rsi
mov    -0x38(%rbp),%rdx
add    %rdi,%rcx
adc    %sil,%al
and    $0x1,%al
mov    %rdx,-0x30(%rbp)
mov    %rcx,-0x28(%rbp)
test   $0x1,%al
jne    117e <t105_2mul+0x6e>
jmp    1185 <t105_2mul+0x75>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x30(%rbp),%rax
mov    -0x28(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t105_2mul>:
push   %r14
push   %rbx
push   %rax
movslq %edi,%rcx
mov    %rcx,%rax
sar    $0x3f,%rax
mov    $0x11,%ebx
mul    %rbx
mov    %rax,%rsi
mov    %rcx,%rax
mul    %rbx
mov    %rax,%r14
mov    %rdx,%rbx
add    %rsi,%rbx
test   %dil,%dil
jns    1144 <t105_2mul+0x34>
xor    %eax,%eax
call   1030 <bar@plt>
mov    %r14,%rax
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define { i64, i64 } @t105_2mul(i8 signext %0) {
%2 = alloca i128
%3 = alloca i8
%4 = alloca i8
%5 = alloca i128
store i8 %0, i8* %3
store i8 17, i8* %4
%6 = load i8, i8* %4
%7 = load i8, i8* %3
%8 = zext i8 %6 to i129
%9 = sext i8 %7 to i129
%10 = call { i129, i1 } @llvm.smul.with.overflow.i129(i129 %8, i129 %9)
%11 = extractvalue { i129, i1 } %10, 1
%12 = extractvalue { i129, i1 } %10, 0
%13 = trunc i129 %12 to i128
%14 = zext i128 %13 to i129
%15 = icmp ne i129 %12, %14
%16 = or i1 %11, %15
store i128 %13, i128* %5
br i1 %16, label %17, label %19
17: ; preds = %1
%18 = call i32 (...) @bar()
br label %19
19: ; preds = %17, %1
%20 = load i128, i128* %5
store i128 %20, i128* %2
%21 = bitcast i128* %2 to { i64, i64 }*
%22 = load { i64, i64 }, { i64, i64 }* %21
ret { i64, i64 } %22
}

LLVM IR (-O2):
define { i64, i64 } @t105_2mul(i8 signext %0) {
%2 = sext i8 %0 to i129
%3 = mul nsw i129 %2, 17
%4 = icmp slt i8 %0, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 (...) @bar()
br label %7
7: ; preds = %5, %1
%8 = trunc i129 %3 to i64
%9 = lshr i129 %3, 64
%10 = trunc i129 %9 to i64
%11 = insertvalue { i64, i64 } poison, i64 %8, 0
%12 = insertvalue { i64, i64 } %11, i64 %10, 1
ret { i64, i64 } %12
}
void on_motion_notify(union ui_state *state, int button, int x, int y) {}


x86 assembly (clang, -O0):
<on_motion_notify>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<on_motion_notify>:
ret

LLVM IR (-O0):
%union.ui_state = type opaque
define void @on_motion_notify(%union.ui_state* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca %union.ui_state*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store %union.ui_state* %0, %union.ui_state** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret void
}

LLVM IR (-O2):
%union.ui_state = type opaque
define void @on_motion_notify(%union.ui_state* nocapture %0, i32 %1, i32 %2, i32 %3) {
ret void
}