xunge/DecIR huggingface dataset:
int __ocl_clz_int(int src) {
  int bit = ((int)1) << (32 - 1);
  int n;
  for (n = 0; n < 32; n++, bit >>= 1) {
    if (src & bit)
      break;
  }
  return n;
}


x86 assembly (clang, -O0):
<__ocl_clz_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x80000000,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x20,-0xc(%rbp)
jge    114f <__ocl_clz_int+0x4f>
mov    -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
cmp    $0x0,%eax
je     1133 <__ocl_clz_int+0x33>
jmp    114f <__ocl_clz_int+0x4f>
jmp    1138 <__ocl_clz_int+0x38>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1115 <__ocl_clz_int+0x15>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ocl_clz_int>:
test   %edi,%edi
js     1123 <__ocl_clz_int+0x23>
mov    $0x80000000,%ecx
xor    %eax,%eax
nopl   0x0(%rax,%rax,1)
mov    %eax,%edx
lea    0x1(%rdx),%eax
cmp    $0x1e,%edx
ja     1122 <__ocl_clz_int+0x22>
sar    %ecx
mov    %ecx,%edx
and    %edi,%edx
je     1110 <__ocl_clz_int+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__ocl_clz_int(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 -2147483648, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %15, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 32
br i1 %7, label %8, label %20
8: ; preds = %5
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = and i32 %9, %10
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %8
br label %20
14: ; preds = %8
br label %15
15: ; preds = %14
%16 = load i32, i32* %4
%17 = add nsw i32 %16, 1
store i32 %17, i32* %4
%18 = load i32, i32* %3
%19 = ashr i32 %18, 1
store i32 %19, i32* %3
br label %5
20: ; preds = %13, %5
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @__ocl_clz_int(i32 %0) {
%2 = icmp sgt i32 %0, -1
br i1 %2, label %3, label %12
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = phi i32 [ %7, %3 ], [ -2147483648, %1 ]
%6 = add nuw nsw i32 %4, 1
%7 = ashr i32 %5, 1
%8 = icmp ult i32 %4, 31
%9 = and i32 %7, %0
%10 = icmp eq i32 %9, 0
%11 = select i1 %8, i1 %10, i1 false
br i1 %11, label %3, label %12
12: ; preds = %3, %1
%13 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ strcat(char *, char *);
void gps_is_on(char ch[]) {
  char *s = "00670070007357285DE54F5C";
  char *douhao = "002C";
  strcat(ch, s);
  strcat(ch, douhao);
}


x86 assembly (clang, -O0):
<gps_is_on>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    0xeeb(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcat@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <strcat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gps_is_on>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <strcat@plt>
lea    0xef2(%rip),%rsi
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <strcat@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"00670070007357285DE54F5C\00"
@.str.1 = [5 x i8] c"002C\00"
define void @gps_is_on(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
store i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8** %3
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8** %4
%5 = load i8*, i8** %2
%6 = load i8*, i8** %3
%7 = call i32 @strcat(i8* %5, i8* %6)
%8 = load i8*, i8** %2
%9 = load i8*, i8** %4
%10 = call i32 @strcat(i8* %8, i8* %9)
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"00670070007357285DE54F5C\00"
@.str.1 = [5 x i8] c"002C\00"
define void @gps_is_on(i8* %0) {
%2 = tail call i32 @strcat(i8* %0, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @strcat(i8* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *malloc(int);
int /*<<< orphan*/ sprintf(char *, char *, int);
char *toString(int a) {
  char *str = malloc(sizeof(int));
  sprintf(str, "%d", a);
  return str;
  free(str);
}


x86 assembly (clang, -O0):
<toString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%edx
lea    0xeb9(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toString>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,%rbx
lea    0xec7(%rip),%rsi
mov    %rax,%rdi
mov    %ebp,%edx
call   1040 <sprintf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i8* @toString(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = call i8* @malloc(i32 4)
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = load i32, i32* %2
%7 = call i32 @sprintf(i8* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = load i8*, i8** %3
ret i8* %8
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define noalias i8* @toString(i32 %0) {
%2 = tail call dereferenceable_or_null(4) i8* @malloc(i32 4)
%3 = tail call i32 @sprintf(i8* dereferenceable(1) %2, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i8* %2
}
unsigned int bitRead(unsigned int value, unsigned int bit) {
  return (((value) >> (bit)) & 0x01);
}


x86 assembly (clang, -O0):
<bitRead>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitRead>:
mov    %esi,%ecx
mov    %edi,%eax
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @bitRead(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = lshr i32 %5, %6
%8 = and i32 %7, 1
ret i32 %8
}

LLVM IR (-O2):
define i32 @bitRead(i32 %0, i32 %1) {
%3 = lshr i32 %0, %1
%4 = and i32 %3, 1
ret i32 %4
}
/* Type definitions */
struct b_tonegen {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ setMIDIDrawBar(struct b_tonegen *, int, unsigned char);
void setDrawbar23(void *d, unsigned char v) {
  setMIDIDrawBar((struct b_tonegen *)d, 23, v);
}


x86 assembly (clang, -O0):
<setDrawbar23>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x17,%esi
movzbl -0x9(%rbp),%edx
call   1030 <setMIDIDrawBar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setDrawbar23>:
mov    %esi,%edx
mov    $0x17,%esi
jmp    1030 <setMIDIDrawBar@plt>

LLVM IR (-O0):
%struct.b_tonegen = type { i32 }
define void @setDrawbar23(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to %struct.b_tonegen*
%7 = load i8, i8* %4
%8 = call i32 @setMIDIDrawBar(%struct.b_tonegen* %6, i32 23, i8 zeroext %7)
ret void
}

LLVM IR (-O2):
%struct.b_tonegen = type { i32 }
define void @setDrawbar23(i8* %0, i8 zeroext %1) {
%3 = bitcast i8* %0 to %struct.b_tonegen*
%4 = tail call i32 @setMIDIDrawBar(%struct.b_tonegen* %3, i32 23, i8 zeroext %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ atoi(char *);
int half(int /*<<< orphan*/);
int main(int argc, char *argv[]) { return half(atoi(argv[1])); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <atoi@plt>
mov    %eax,%edi
call   1030 <half@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rdi
call   1040 <atoi@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <half@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %5
%7 = getelementptr inbounds i8*, i8** %6, i64 1
%8 = load i8*, i8** %7
%9 = call i32 @atoi(i8* %8)
%10 = call i32 @half(i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @atoi(i8* %4)
%6 = tail call i32 @half(i32 %5)
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ c;

/* Variables and functions */
int /*<<< orphan*/ write(int, char *, int);
void ft_putchar_fd(char c, int fd) { write(fd, &c, sizeof(c)); }


x86 assembly (clang, -O0):
<ft_putchar_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
lea    -0x1(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putchar_fd>:
push   %rax
mov    %esi,%eax
mov    %dil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    %eax,%edi
mov    $0x1,%edx
call   1030 <write@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @ft_putchar_fd(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i32 @write(i32 %5, i8* %3, i32 1)
ret void
}

LLVM IR (-O2):
define void @ft_putchar_fd(i8 signext %0, i32 %1) {
%3 = alloca i8
store i8 %0, i8* %3
%4 = call i32 @write(i32 %1, i8* %3, i32 1)
ret void
}
void MSP430TimerM$CompareB3$fired(void) { TimerM$AlarmCompare$fired(); }


x86 assembly (clang, -O0):
<MSP430TimerM$CompareB3$fired>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <TimerM$AlarmCompare$fired@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MSP430TimerM$CompareB3$fired>:
xor    %eax,%eax
jmp    1030 <TimerM$AlarmCompare$fired@plt>

LLVM IR (-O0):
define void @"MSP430TimerM$CompareB3$fired"() {
%1 = call i32 (...) @"TimerM$AlarmCompare$fired"()
ret void
}

LLVM IR (-O2):
define void @"MSP430TimerM$CompareB3$fired"() {
%1 = tail call i32 (...) @"TimerM$AlarmCompare$fired"()
ret void
}
/* Variables and functions */
void EA_EndRegular(int client, float thinktime) {}


x86 assembly (clang, -O0):
<EA_EndRegular>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<EA_EndRegular>:
ret

LLVM IR (-O0):
define void @EA_EndRegular(i32 %0, float %1) {
%3 = alloca i32
%4 = alloca float
store i32 %0, i32* %3
store float %1, float* %4
ret void
}

LLVM IR (-O2):
define void @EA_EndRegular(i32 %0, float %1) {
ret void
}
int RECOIL_GetG3R3B2Color(int c) {
  return (c & 28) * 73 >> 3 << 16 | (c >> 5) * 73 >> 1 << 8 | (c & 3) * 85;
}


x86 assembly (clang, -O0):
<RECOIL_GetG3R3B2Color>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1c,%eax
imul   $0x49,%eax,%eax
sar    $0x3,%eax
shl    $0x10,%eax
mov    -0x4(%rbp),%ecx
sar    $0x5,%ecx
imul   $0x49,%ecx,%ecx
sar    $0x1,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0x3,%ecx
imul   $0x55,%ecx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RECOIL_GetG3R3B2Color>:
mov    %edi,%eax
and    $0x1c,%eax
imul   $0x92000,%eax,%eax
and    $0xff0000,%eax
mov    %edi,%ecx
sar    $0x5,%ecx
imul   $0x2480,%ecx,%ecx
and    $0xffffff00,%ecx
or     %eax,%ecx
and    $0x3,%edi
imul   $0x55,%edi,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @RECOIL_GetG3R3B2Color(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 28
%5 = mul nsw i32 %4, 73
%6 = ashr i32 %5, 3
%7 = shl i32 %6, 16
%8 = load i32, i32* %2
%9 = ashr i32 %8, 5
%10 = mul nsw i32 %9, 73
%11 = ashr i32 %10, 1
%12 = shl i32 %11, 8
%13 = or i32 %7, %12
%14 = load i32, i32* %2
%15 = and i32 %14, 3
%16 = mul nsw i32 %15, 85
%17 = or i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @RECOIL_GetG3R3B2Color(i32 %0) {
%2 = and i32 %0, 28
%3 = mul nuw nsw i32 %2, 598016
%4 = and i32 %3, 16711680
%5 = ashr i32 %0, 5
%6 = mul i32 %5, 9344
%7 = and i32 %6, -256
%8 = or i32 %4, %7
%9 = and i32 %0, 3
%10 = mul nuw nsw i32 %9, 85
%11 = or i32 %8, %10
ret i32 %11
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ fc_host_get_statistic(char *, char const *);
uint64_t fc_stat_invalid_crc_count(const char *host) {
  return fc_host_get_statistic("invalid_crc_count", host);
}


x86 assembly (clang, -O0):
<fc_stat_invalid_crc_count>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <fc_host_get_statistic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc_stat_invalid_crc_count>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <fc_host_get_statistic@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"invalid_crc_count\00"
define i32 @fc_stat_invalid_crc_count(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @fc_host_get_statistic(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 %4
}

LLVM IR (-O2):
@.str = [18 x i8] c"invalid_crc_count\00"
define i32 @fc_stat_invalid_crc_count(i8* %0) {
%2 = tail call i32 @fc_host_get_statistic(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int _NSIG;
int syscall_cp(int, int /*<<< orphan*/ const *, int);
int sigsuspend(const sigset_t *mask) {
  return syscall_cp(179, mask, _NSIG / 8);
}


x86 assembly (clang, -O0):
<sigsuspend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    0x2ec9(%rip),%rax
mov    (%rax),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %eax,%edx
mov    $0xb3,%edi
call   1030 <syscall_cp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigsuspend>:
mov    %rdi,%rsi
mov    0x2ed6(%rip),%rax
mov    (%rax),%eax
lea    0x7(%rax),%edx
test   %eax,%eax
cmovns %eax,%edx
sar    $0x3,%edx
mov    $0xb3,%edi
jmp    1030 <syscall_cp@plt>

LLVM IR (-O0):
@_NSIG = global i32 0
define i32 @sigsuspend(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* @_NSIG
%5 = sdiv i32 %4, 8
%6 = call i32 @syscall_cp(i32 179, i32* %3, i32 %5)
ret i32 %6
}

LLVM IR (-O2):
@_NSIG = global i32 0
define i32 @sigsuspend(i32* %0) {
%2 = load i32, i32* @_NSIG
%3 = sdiv i32 %2, 8
%4 = tail call i32 @syscall_cp(i32 179, i32* %0, i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage() {
  printf("Usage: httpv <options> \n"
         " Options: \n"
         " -b, --body <b> data for socket, default <'GET / HTTP/1.1\\r\\nHost: "
         "localhost\\r\\n\\r\\n'> \n"
         " -P, --port <P> port of host \n"
         " -t, --threads <N> Number of threads to use \n"
         " -f, --file <F> Load ip file \n"
         " -0, --title <T> match title \n"
         " -1, --servername <S> match server \n"
         " \n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [297 x i8] c"Usage: httpv <options> \0A Options: \0A -b, --body <b> data for socket, default <'GET / HTTP/1.1\\r\\nHost: localhost\\r\\n\\r\\n'> \0A -P, --port <P> port of host \0A -t, --threads <N> Number of threads to use \0A -f, --file <F> Load ip file \0A -0, --title <T> match title \0A -1, --servername <S> match server \0A \0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([297 x i8], [297 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [296 x i8] c"Usage: httpv <options> \0A Options: \0A -b, --body <b> data for socket, default <'GET / HTTP/1.1\\r\\nHost: localhost\\r\\n\\r\\n'> \0A -P, --port <P> port of host \0A -t, --threads <N> Number of threads to use \0A -f, --file <F> Load ip file \0A -0, --title <T> match title \0A -1, --servername <S> match server \0A \00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([296 x i8], [296 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
char *strchr(const char *s, int c) {
  for (; *s != (char)c; s++) {
    if (*s == 0) {
      return NULL;
    }
  }
  return (char *)s;
}


x86 assembly (clang, -O0):
<strchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    -0x14(%rbp),%ecx
movsbl %cl,%ecx
cmp    %ecx,%eax
je     1153 <strchr+0x53>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    113d <strchr+0x3d>
movq   $0x0,-0x8(%rbp)
jmp    115b <strchr+0x5b>
jmp    1142 <strchr+0x42>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110b <strchr+0xb>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strchr>:
mov    %rdi,%rax
movsbl %sil,%ecx
movsbl (%rdi),%edx
cmp    %edx,%ecx
je     1120 <strchr+0x20>
xchg   %ax,%ax
test   %dl,%dl
je     1121 <strchr+0x21>
movsbl 0x1(%rax),%edx
add    $0x1,%rax
cmp    %edx,%ecx
jne    1110 <strchr+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @strchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
br label %6
6: ; preds = %21, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i32, i32* %5
%11 = trunc i32 %10 to i8
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %9, %12
br i1 %13, label %14, label %24
14: ; preds = %6
%15 = load i8*, i8** %4
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %14
store i8* null, i8** %3
br label %26
20: ; preds = %14
br label %21
21: ; preds = %20
%22 = load i8*, i8** %4
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %4
br label %6
24: ; preds = %6
%25 = load i8*, i8** %4
store i8* %25, i8** %3
br label %26
26: ; preds = %24, %19
%27 = load i8*, i8** %3
ret i8* %27
}

LLVM IR (-O2):
define i8* @strchr(i8* %0, i32 %1) {
%3 = shl i32 %1, 24
%4 = ashr exact i32 %3, 24
%5 = load i8, i8* %0
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %4, %6
br i1 %7, label %17, label %8
8: ; preds = %2, %12
%9 = phi i8 [ %14, %12 ], [ %5, %2 ]
%10 = phi i8* [ %13, %12 ], [ %0, %2 ]
%11 = icmp eq i8 %9, 0
br i1 %11, label %17, label %12
12: ; preds = %8
%13 = getelementptr inbounds i8, i8* %10, i64 1
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %4, %15
br i1 %16, label %17, label %8
17: ; preds = %8, %12, %2
%18 = phi i8* [ %0, %2 ], [ %13, %12 ], [ null, %8 ]
ret i8* %18
}
/* Type definitions */
typedef unsigned int uint64_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ pcg_rotr_32(unsigned int, unsigned int);
uint32_t pcg_output_xsh_rr_64_32(uint64_t state) {
  return pcg_rotr_32(((state >> 18u) ^ state) >> 27u, state >> 59u);
}


x86 assembly (clang, -O0):
<pcg_output_xsh_rr_64_32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
shr    $0x12,%edi
xor    -0x4(%rbp),%edi
shr    $0x1b,%edi
mov    -0x4(%rbp),%esi
mov    $0x3b,%ecx
shr    %cl,%esi
call   1030 <pcg_rotr_32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcg_output_xsh_rr_64_32>:
shr    $0x1b,%edi
jmp    1030 <pcg_rotr_32@plt>

LLVM IR (-O0):
define i32 @pcg_output_xsh_rr_64_32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 18
%5 = load i32, i32* %2
%6 = xor i32 %4, %5
%7 = lshr i32 %6, 27
%8 = load i32, i32* %2
%9 = lshr i32 %8, 59
%10 = call i32 @pcg_rotr_32(i32 %7, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @pcg_output_xsh_rr_64_32(i32 %0) {
%2 = lshr i32 %0, 27
%3 = tail call i32 @pcg_rotr_32(i32 %2, i32 poison)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void bz_internal_error(int errcode) { exit(1); }


x86 assembly (clang, -O0):
<bz_internal_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<bz_internal_error>:
push   %rax
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @bz_internal_error(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @bz_internal_error(i32 %0) {
%2 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char const *);
void pdie(const char *s) {
  perror(s);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<pdie>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    0x2ea4(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<pdie>:
push   %rax
call   1030 <perror@plt>
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
define void @pdie(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = load i32, i32* @EXIT_FAILURE
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
define void @pdie(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = load i32, i32* @EXIT_FAILURE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int udp_flood(char *target_host[], int target_port) {
  printf("UDP FLOOD NOT AVAILABLE\n");
  exit(0);
}


x86 assembly (clang, -O0):
<udp_flood>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<udp_flood>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"UDP FLOOD NOT AVAILABLE\0A\00"
define i32 @udp_flood(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
%5 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [24 x i8] c"UDP FLOOD NOT AVAILABLE\00"
define i32 @udp_flood(i8** nocapture readnone %0, i32 %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void tschuss() { printf("Tschüss!\n"); }


x86 assembly (clang, -O0):
<tschuss>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tschuss>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"Tsch\C3\BCss!\0A\00"
define void @tschuss() {
%1 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [10 x i8] c"Tsch\C3\BCss!\00"
define void @tschuss() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0))
ret void
}
short __ocl_rotate_short(short src1, short src2) {
  short lshift = src2 & ((1 << 4) - 1);
  short overflow = (src1 >> (16 - lshift)) & ((((short)1) << lshift) - 1);
  return (src1 << lshift) | overflow;
}


x86 assembly (clang, -O0):
<__ocl_rotate_short>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movswl -0x4(%rbp),%eax
and    $0xf,%eax
mov    %ax,-0x6(%rbp)
movswl -0x2(%rbp),%eax
movswl -0x6(%rbp),%edx
mov    $0x10,%ecx
sub    %edx,%ecx
sar    %cl,%eax
movswl -0x6(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
sub    $0x1,%ecx
and    %ecx,%eax
mov    %ax,-0x8(%rbp)
movswl -0x2(%rbp),%eax
movswl -0x6(%rbp),%ecx
shl    %cl,%eax
movswl -0x8(%rbp),%ecx
or     %ecx,%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ocl_rotate_short>:
and    $0xf,%esi
mov    $0x10,%cl
sub    %sil,%cl
mov    %edi,%edx
sar    %cl,%edx
mov    $0xffffffff,%eax
mov    %esi,%ecx
shl    %cl,%eax
not    %eax
and    %edx,%eax
shl    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define signext i16 @__ocl_rotate_short(i16 signext %0, i16 signext %1) {
%3 = alloca i16
%4 = alloca i16
%5 = alloca i16
%6 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%7 = load i16, i16* %4
%8 = sext i16 %7 to i32
%9 = and i32 %8, 15
%10 = trunc i32 %9 to i16
store i16 %10, i16* %5
%11 = load i16, i16* %3
%12 = sext i16 %11 to i32
%13 = load i16, i16* %5
%14 = sext i16 %13 to i32
%15 = sub nsw i32 16, %14
%16 = ashr i32 %12, %15
%17 = load i16, i16* %5
%18 = sext i16 %17 to i32
%19 = shl i32 1, %18
%20 = sub nsw i32 %19, 1
%21 = and i32 %16, %20
%22 = trunc i32 %21 to i16
store i16 %22, i16* %6
%23 = load i16, i16* %3
%24 = sext i16 %23 to i32
%25 = load i16, i16* %5
%26 = sext i16 %25 to i32
%27 = shl i32 %24, %26
%28 = load i16, i16* %6
%29 = sext i16 %28 to i32
%30 = or i32 %27, %29
%31 = trunc i32 %30 to i16
ret i16 %31
}

LLVM IR (-O2):
define signext i16 @__ocl_rotate_short(i16 signext %0, i16 signext %1) {
%3 = and i16 %1, 15
%4 = sext i16 %0 to i32
%5 = zext i16 %3 to i32
%6 = sub nuw nsw i32 16, %5
%7 = ashr i32 %4, %6
%8 = shl nsw i32 -1, %5
%9 = xor i32 %8, -1
%10 = and i32 %7, %9
%11 = shl nsw i32 %4, %5
%12 = or i32 %10, %11
%13 = trunc i32 %12 to i16
ret i16 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void main() { printf("%d", -1 >> 2); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0xffffffff,%esi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xee9(%rip),%rdi
mov    $0xffffffff,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 -1)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 -1)
ret void
}
/* Type definitions */
typedef scalar_t__ __v8qi;
typedef scalar_t__ __m64;

/* Variables and functions */
__m64 __attribute__((__always___, __nodebug__))
_mm_sub_pi8(__m64 __m1, __m64 __m2) {
  return (__m64)((__v8qi)__m1 - (__v8qi)__m2);
}


x86 assembly (clang, -O0):
<_mm_sub_pi8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sub    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mm_sub_pi8>:
mov    %rdi,%rax
sub    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @_mm_sub_pi8(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = sub nsw i64 %5, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @_mm_sub_pi8(i64 %0, i64 %1) {
%3 = sub nsw i64 %0, %1
ret i64 %3
}
void debug_init(void) {}


x86 assembly (clang, -O0):
<debug_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_init>:
ret

LLVM IR (-O0):
define void @debug_init() {
ret void
}

LLVM IR (-O2):
define void @debug_init() {
ret void
}
void _M2_ramps_finish(__attribute__((unused)) int argc,
                      __attribute__((unused)) char *argv[]) {}


x86 assembly (clang, -O0):
<_M2_ramps_finish>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_M2_ramps_finish>:
ret

LLVM IR (-O0):
define void @_M2_ramps_finish(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret void
}

LLVM IR (-O2):
define void @_M2_ramps_finish(i32 %0, i8** nocapture %1) {
ret void
}
int p_worker_stat_reset() { return -142; }


x86 assembly (clang, -O0):
<p_worker_stat_reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffff72,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<p_worker_stat_reset>:
mov    $0xffffff72,%eax
ret

LLVM IR (-O0):
define i32 @p_worker_stat_reset() {
ret i32 -142
}

LLVM IR (-O2):
define i32 @p_worker_stat_reset() {
ret i32 -142
}
/* Variables and functions */
int /*<<< orphan*/ ReverseGPIOP__0__In__set();
void ReverseGPIOP__0__Out__clr(void) { ReverseGPIOP__0__In__set(); }


x86 assembly (clang, -O0):
<ReverseGPIOP__0__Out__clr>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ReverseGPIOP__0__In__set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReverseGPIOP__0__Out__clr>:
xor    %eax,%eax
jmp    1030 <ReverseGPIOP__0__In__set@plt>

LLVM IR (-O0):
define void @ReverseGPIOP__0__Out__clr() {
%1 = call i32 (...) @ReverseGPIOP__0__In__set()
ret void
}

LLVM IR (-O2):
define void @ReverseGPIOP__0__Out__clr() {
%1 = tail call i32 (...) @ReverseGPIOP__0__In__set()
ret void
}
void g(void) {
  if (1) {
    f(({
      __label__ x;
    x:
      (unsigned long)&&x;
    }));
  }
  f(({
    __label__ x;
  x:
    (unsigned long)&&x;
  }));
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x7(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <f@plt>
lea    -0x7(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1030 <f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
push   %rax
lea    -0x8(%rip),%rdi
xor    %eax,%eax
call   1030 <f@plt>
add    $0x8,%rsp
lea    -0x7(%rip),%rdi
xor    %eax,%eax
jmp    1030 <f@plt>

LLVM IR (-O0):
define void @g() {
%1 = alloca i64
%2 = alloca i64
br label %3
3: ; preds = %9, %0
store i64 ptrtoint (i8* blockaddress(@g, %3) to i64), i64* %1
%4 = load i64, i64* %1
%5 = call i32 (i64, ...) bitcast (i32 (...)* @f to i32 (i64, ...)*)(i64 %4)
br label %6
6: ; preds = %9, %3
store i64 ptrtoint (i8* blockaddress(@g, %6) to i64), i64* %2
%7 = load i64, i64* %2
%8 = call i32 (i64, ...) bitcast (i32 (...)* @f to i32 (i64, ...)*)(i64 %7)
ret void
9: ; No predecessors!
indirectbr i8* undef, [label %3, label %6]
}

LLVM IR (-O2):
define void @g() {
br label %1
1: ; preds = %0
%2 = tail call i32 (i64, ...) bitcast (i32 (...)* @f to i32 (i64, ...)*)(i64 ptrtoint (i8* blockaddress(@g, %1) to i64))
br label %3
3: ; preds = %1
%4 = tail call i32 (i64, ...) bitcast (i32 (...)* @f to i32 (i64, ...)*)(i64 ptrtoint (i8* blockaddress(@g, %3) to i64))
ret void
}
void fphandler(sig) int sig;
{
  { printf("%s\n", "Floating point exception."); };
}


x86 assembly (clang, -O0):
<fphandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
lea    0xedb(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fphandler>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [26 x i8] c"Floating point exception.\00"
define void @fphandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str.1 = [26 x i8] c"Floating point exception.\00"
define void @fphandler(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ baz(int);
void bar(void) {
  int j = 0;
#pragma omp parallel shared(j)
  {
    j++;
#pragma omp for
    for (j = 0; j < 2; j++)
      baz(j);
  }
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
movl   $0x0,-0x4(%rbp)
cmpl   $0x2,-0x4(%rbp)
jge    114f <bar+0x3f>
mov    -0x4(%rbp),%edi
call   1030 <baz@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    112f <bar+0x1f>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
push   %rax
xor    %edi,%edi
call   1030 <baz@plt>
mov    $0x1,%edi
pop    %rax
jmp    1030 <baz@plt>

LLVM IR (-O0):
define void @bar() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
%3 = add nsw i32 %2, 1
store i32 %3, i32* %1
store i32 0, i32* %1
br label %4
4: ; preds = %10, %0
%5 = load i32, i32* %1
%6 = icmp slt i32 %5, 2
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i32, i32* %1
%9 = call i32 @baz(i32 %8)
br label %10
10: ; preds = %7
%11 = load i32, i32* %1
%12 = add nsw i32 %11, 1
store i32 %12, i32* %1
br label %4
13: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @bar() {
%1 = tail call i32 @baz(i32 0)
%2 = tail call i32 @baz(i32 1)
ret void
}
mupcase(ch) register int ch;
{ return ((ch & (~0177)) | upcase(ch)); }


x86 assembly (clang, -O0):
<mupcase>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffffff80,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1030 <upcase@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
or     %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mupcase>:
push   %rbx
mov    %edi,%ebx
and    $0xffffff80,%ebx
xor    %eax,%eax
call   1030 <upcase@plt>
or     %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @mupcase(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -128
%5 = load i32, i32* %2
%6 = call i32 (i32, ...) bitcast (i32 (...)* @upcase to i32 (i32, ...)*)(i32 %5)
%7 = or i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @mupcase(i32 %0) {
%2 = and i32 %0, -128
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @upcase to i32 (i32, ...)*)(i32 %0)
%4 = or i32 %3, %2
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
int /*<<< orphan*/ putc(int, int /*<<< orphan*/ *);
void p_restore_cursor(FILE *p, int reg) {
  {
    fprintf(p, "\033[C");
    {
      (void)putc(((1) & 0xFF), (p));
      (void)putc((((1) & 0xFF00) >> 8), (p));
    };
  };
  (void)putc(reg + '\220', p);
}


x86 assembly (clang, -O0):
<p_restore_cursor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec6(%rip),%rsi
call   1040 <fprintf@plt>
mov    -0x8(%rbp),%rsi
mov    $0x1,%edi
call   1030 <putc@plt>
mov    -0x8(%rbp),%rsi
xor    %edi,%edi
call   1030 <putc@plt>
mov    -0xc(%rbp),%edi
add    $0xffffff90,%edi
mov    -0x8(%rbp),%rsi
call   1030 <putc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<p_restore_cursor>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
lea    0xed1(%rip),%rdi
mov    $0x3,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1040 <fwrite@plt>
mov    $0x1,%edi
mov    %rbx,%rsi
call   1030 <putc@plt>
xor    %edi,%edi
mov    %rbx,%rsi
call   1030 <putc@plt>
add    $0xffffff90,%ebp
mov    %ebp,%edi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <putc@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"\1B[C\00"
define void @p_restore_cursor(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%7 = load i32*, i32** %3
%8 = call i32 @putc(i32 1, i32* %7)
%9 = load i32*, i32** %3
%10 = call i32 @putc(i32 0, i32* %9)
%11 = load i32, i32* %4
%12 = add nsw i32 %11, -112
%13 = load i32*, i32** %3
%14 = call i32 @putc(i32 %12, i32* %13)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"\1B[C\00"
define void @p_restore_cursor(i32* nocapture %0, i32 %1) {
%3 = tail call i64 @fwrite(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 3, i64 1, i32* %0)
%4 = tail call i32 @putc(i32 1, i32* %0)
%5 = tail call i32 @putc(i32 0, i32* %0)
%6 = add nsw i32 %1, -112
%7 = tail call i32 @putc(i32 %6, i32* %0)
ret void
}
int ctz(const unsigned int mask) { return __builtin_ctz(mask); }


x86 assembly (clang, -O0):
<ctz>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
bsf    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctz>:
bsf    %edi,%eax
ret

LLVM IR (-O0):
define i32 @ctz(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @llvm.cttz.i32(i32 %3, i1 true)
ret i32 %4
}

LLVM IR (-O2):
define i32 @ctz(i32 %0) {
%2 = tail call i32 @llvm.cttz.i32(i32 %0, i1 true)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(double *, double const *, int);
void copyv(const double *a, const int n, double *b) {
  memcpy(b, a, sizeof(double) * n);
}


x86 assembly (clang, -O0):
<copyv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
movslq -0xc(%rbp),%rax
shl    $0x3,%rax
mov    %eax,%edx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copyv>:
mov    %rdx,%rcx
mov    %rdi,%rax
lea    0x0(,%rsi,8),%edx
mov    %rcx,%rdi
mov    %rax,%rsi
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @copyv(double* %0, i32 %1, double* %2) {
%4 = alloca double*
%5 = alloca i32
%6 = alloca double*
store double* %0, double** %4
store i32 %1, i32* %5
store double* %2, double** %6
%7 = load double*, double** %6
%8 = load double*, double** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = mul i64 8, %10
%12 = trunc i64 %11 to i32
%13 = call i32 @memcpy(double* %7, double* %8, i32 %12)
ret void
}

LLVM IR (-O2):
define void @copyv(double* %0, i32 %1, double* %2) {
%4 = shl i32 %1, 3
%5 = tail call i32 @memcpy(double* %2, double* %0, i32 %4)
ret void
}
/* Type definitions */
struct lineFile {
  int dummy;
};
struct dnaSeq {
  int dummy;
};

/* Variables and functions */
struct dnaSeq *faReadAllMixableInLf(struct lineFile *, int /*<<< orphan*/, int);
struct dnaSeq *faReadAllMixedInLf(struct lineFile *lf) {
  return faReadAllMixableInLf(lf, 0, 1);
}


x86 assembly (clang, -O0):
<faReadAllMixedInLf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x1,%edx
call   1030 <faReadAllMixableInLf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<faReadAllMixedInLf>:
xor    %esi,%esi
mov    $0x1,%edx
jmp    1030 <faReadAllMixableInLf@plt>

LLVM IR (-O0):
%struct.dnaSeq = type { i32 }
%struct.lineFile = type { i32 }
define %struct.dnaSeq* @faReadAllMixedInLf(%struct.lineFile* %0) {
%2 = alloca %struct.lineFile*
store %struct.lineFile* %0, %struct.lineFile** %2
%3 = load %struct.lineFile*, %struct.lineFile** %2
%4 = call %struct.dnaSeq* @faReadAllMixableInLf(%struct.lineFile* %3, i32 0, i32 1)
ret %struct.dnaSeq* %4
}

LLVM IR (-O2):
%struct.dnaSeq = type { i32 }
%struct.lineFile = type { i32 }
define %struct.dnaSeq* @faReadAllMixedInLf(%struct.lineFile* %0) {
%2 = tail call %struct.dnaSeq* @faReadAllMixableInLf(%struct.lineFile* %0, i32 0, i32 1)
ret %struct.dnaSeq* %2
}
/* Type definitions */
struct quat {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ quat_lerp(float *, float *, float *, float);
__attribute__((always_)) struct quat *
psquat_lerp(struct quat *result, struct quat *a, struct quat *b, float p) {
  quat_lerp((float *)result, (float *)a, (float *)b, p);
  return result;
}


x86 assembly (clang, -O0):
<psquat_lerp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movss  %xmm0,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
movss  -0x1c(%rbp),%xmm0
call   1030 <quat_lerp@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psquat_lerp>:
push   %rbx
mov    %rdi,%rbx
call   1030 <quat_lerp@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.quat = type { i32 }
define %struct.quat* @psquat_lerp(%struct.quat* %0, %struct.quat* %1, %struct.quat* %2, float %3) {
%5 = alloca %struct.quat*
%6 = alloca %struct.quat*
%7 = alloca %struct.quat*
%8 = alloca float
store %struct.quat* %0, %struct.quat** %5
store %struct.quat* %1, %struct.quat** %6
store %struct.quat* %2, %struct.quat** %7
store float %3, float* %8
%9 = load %struct.quat*, %struct.quat** %5
%10 = bitcast %struct.quat* %9 to float*
%11 = load %struct.quat*, %struct.quat** %6
%12 = bitcast %struct.quat* %11 to float*
%13 = load %struct.quat*, %struct.quat** %7
%14 = bitcast %struct.quat* %13 to float*
%15 = load float, float* %8
%16 = call i32 @quat_lerp(float* %10, float* %12, float* %14, float %15)
%17 = load %struct.quat*, %struct.quat** %5
ret %struct.quat* %17
}

LLVM IR (-O2):
%struct.quat = type { i32 }
define %struct.quat* @psquat_lerp(%struct.quat* returned %0, %struct.quat* %1, %struct.quat* %2, float %3) {
%5 = bitcast %struct.quat* %0 to float*
%6 = bitcast %struct.quat* %1 to float*
%7 = bitcast %struct.quat* %2 to float*
%8 = tail call i32 @quat_lerp(float* %5, float* %6, float* %7, float %3)
ret %struct.quat* %0
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;
struct udev {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ vsyslog(int, char const *, int /*<<< orphan*/);
void logging_msg(struct udev *udev, int priority, const char *file, int line,
                 const char *fn, const char *format, va_list args) {
  vsyslog(priority, format, args);
}


x86 assembly (clang, -O0):
<logging_msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0x10(%rbp),%eax
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x30(%rbp),%rsi
mov    0x10(%rbp),%edx
call   1030 <vsyslog@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<logging_msg>:
mov    %esi,%edi
mov    0x8(%rsp),%edx
mov    %r9,%rsi
jmp    1030 <vsyslog@plt>

LLVM IR (-O0):
%struct.udev = type { i32 }
define void @logging_msg(%struct.udev* %0, i32 %1, i8* %2, i32 %3, i8* %4, i8* %5, i32 %6) {
%8 = alloca %struct.udev*
%9 = alloca i32
%10 = alloca i8*
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i8*
%14 = alloca i32
store %struct.udev* %0, %struct.udev** %8
store i32 %1, i32* %9
store i8* %2, i8** %10
store i32 %3, i32* %11
store i8* %4, i8** %12
store i8* %5, i8** %13
store i32 %6, i32* %14
%15 = load i32, i32* %9
%16 = load i8*, i8** %13
%17 = load i32, i32* %14
%18 = call i32 @vsyslog(i32 %15, i8* %16, i32 %17)
ret void
}

LLVM IR (-O2):
%struct.udev = type { i32 }
define void @logging_msg(%struct.udev* nocapture readnone %0, i32 %1, i8* nocapture readnone %2, i32 %3, i8* nocapture readnone %4, i8* %5, i32 %6) {
%8 = tail call i32 @vsyslog(i32 %1, i8* %5, i32 %6)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int32_t;

/* Variables and functions */
scalar_t__ u8_charlen(int /*<<< orphan*/);
size_t u8_codingsize(u_int32_t *wcstr, size_t n) {
  size_t i, c = 0;
  for (i = 0; i < n; i++)
    c += u8_charlen(wcstr[i]);
  return c;
}


x86 assembly (clang, -O0):
<u8_codingsize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x20(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1167 <u8_codingsize+0x57>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    (%rax,%rcx,4),%edi
call   1030 <u8_charlen@plt>
add    -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1130 <u8_codingsize+0x20>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<u8_codingsize>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %rsi,%rsi
je     1147 <u8_codingsize+0x37>
mov    %rsi,%r14
mov    %rdi,%r15
xor    %r12d,%r12d
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%edi
call   1030 <u8_charlen@plt>
add    %rax,%r12
add    $0x1,%rbx
cmp    %rbx,%r14
jne    1130 <u8_codingsize+0x20>
jmp    114a <u8_codingsize+0x3a>
xor    %r12d,%r12d
mov    %r12,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @u8_codingsize(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i32* %0, i32** %3
store i64 %1, i64* %4
store i64 0, i64* %6
store i64 0, i64* %5
br label %7
7: ; preds = %19, %2
%8 = load i64, i64* %5
%9 = load i64, i64* %4
%10 = icmp ult i64 %8, %9
br i1 %10, label %11, label %22
11: ; preds = %7
%12 = load i32*, i32** %3
%13 = load i64, i64* %5
%14 = getelementptr inbounds i32, i32* %12, i64 %13
%15 = load i32, i32* %14
%16 = call i64 @u8_charlen(i32 %15)
%17 = load i64, i64* %6
%18 = add i64 %17, %16
store i64 %18, i64* %6
br label %19
19: ; preds = %11
%20 = load i64, i64* %5
%21 = add i64 %20, 1
store i64 %21, i64* %5
br label %7
22: ; preds = %7
%23 = load i64, i64* %6
ret i64 %23
}

LLVM IR (-O2):
define i64 @u8_codingsize(i32* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %13, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %10, %4 ], [ 0, %2 ]
%6 = phi i64 [ %11, %4 ], [ 0, %2 ]
%7 = getelementptr inbounds i32, i32* %0, i64 %6
%8 = load i32, i32* %7
%9 = tail call i64 @u8_charlen(i32 %8)
%10 = add i64 %9, %5
%11 = add nuw i64 %6, 1
%12 = icmp eq i64 %11, %1
br i1 %12, label %13, label %4
13: ; preds = %4, %2
%14 = phi i64 [ 0, %2 ], [ %10, %4 ]
ret i64 %14
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ f1();
int main(void) {
  f1();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <f1@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <f1@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @f1()
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @f1()
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
unsigned int htonl(unsigned int);
int /*<<< orphan*/ memcpy(char *, unsigned char *, int);
void htod(unsigned int n, char *len) {
  union {
    unsigned int i;
    unsigned char c[4];
  } tmp;
  tmp.i = htonl(n);
  memcpy(len, &tmp.c[1], 3);
}


x86 assembly (clang, -O0):
<htod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <htonl@plt>
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
add    $0x1,%rsi
mov    $0x3,%edx
call   1040 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<htod>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
call   1030 <htonl@plt>
mov    %eax,0x8(%rsp)
lea    0x9(%rsp),%rsi
mov    %rbx,%rdi
mov    $0x3,%edx
call   1040 <memcpy@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%union.anon = type { i32 }
define void @htod(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca %union.anon
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i32, i32* %3
%7 = call i32 @htonl(i32 %6)
%8 = bitcast %union.anon* %5 to i32*
store i32 %7, i32* %8
%9 = load i8*, i8** %4
%10 = bitcast %union.anon* %5 to [4 x i8]*
%11 = getelementptr inbounds [4 x i8], [4 x i8]* %10, i64 0, i64 1
%12 = call i32 @memcpy(i8* %9, i8* %11, i32 3)
ret void
}

LLVM IR (-O2):
%union.anon = type { i32 }
define void @htod(i32 %0, i8* %1) {
%3 = alloca %union.anon
%4 = bitcast %union.anon* %3 to i8*
%5 = tail call i32 @htonl(i32 %0)
%6 = getelementptr inbounds %union.anon, %union.anon* %3, i64 0, i32 0
store i32 %5, i32* %6
%7 = bitcast %union.anon* %3 to [4 x i8]*
%8 = getelementptr inbounds [4 x i8], [4 x i8]* %7, i64 0, i64 1
%9 = call i32 @memcpy(i8* %1, i8* %8, i32 3)
ret void
}
void g_timer_new() {}


x86 assembly (clang, -O0):
<g_timer_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_timer_new>:
ret

LLVM IR (-O0):
define void @g_timer_new() {
ret void
}

LLVM IR (-O2):
define void @g_timer_new() {
ret void
}