xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ yield();
void f_pong2(void) {
  int i;
  for (i = 0; i < 500; i++) {
    printf("1");
    printf("2");
    yield();
  }
}


x86 assembly (clang, -O0):
<f_pong2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x1f4,-0x4(%rbp)
jge    1169 <f_pong2+0x49>
lea    0xebd(%rip),%rdi
call   1040 <printf@plt>
lea    0xeb3(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <yield@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    112f <f_pong2+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_pong2>:
push   %rbx
mov    $0x1f4,%ebx
cs nopw 0x0(%rax,%rax,1)
mov    $0x31,%edi
call   1030 <putchar@plt>
mov    $0x32,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
call   1040 <yield@plt>
add    $0xffffffff,%ebx
jne    1130 <f_pong2+0x10>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"1\00"
@.str.1 = [2 x i8] c"2\00"
define void @f_pong2() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %9, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 500
br i1 %4, label %5, label %12
5: ; preds = %2
%6 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%8 = call i32 (...) @yield()
br label %9
9: ; preds = %5
%10 = load i32, i32* %1
%11 = add nsw i32 %10, 1
store i32 %11, i32* %1
br label %2
12: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @f_pong2() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %6, %1 ]
%3 = tail call i32 @putchar(i32 49)
%4 = tail call i32 @putchar(i32 50)
%5 = tail call i32 (...) @yield()
%6 = add nuw nsw i32 %2, 1
%7 = icmp eq i32 %6, 500
br i1 %7, label %8, label %1
8: ; preds = %1
ret void
}
int so_setfl(int fd, int flags, int mask, int require) {
  return so_rstfl(fd, &(int){0}, flags, mask, require);
}


x86 assembly (clang, -O0):
<so_setfl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    -0x10(%rbp),%r8d
lea    -0x14(%rbp),%rsi
mov    $0x0,%al
call   1030 <so_rstfl@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<so_setfl>:
push   %rax
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rsi
xor    %eax,%eax
call   1030 <so_rstfl@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @so_setfl(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %5
store i32 0, i32* %9
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = call i32 (i32, i32*, i32, i32, i32, ...) bitcast (i32 (...)* @so_rstfl to i32 (i32, i32*, i32, i32, i32, ...)*)(i32 %10, i32* %9, i32 %11, i32 %12, i32 %13)
ret i32 %14
}

LLVM IR (-O2):
define i32 @so_setfl(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
store i32 0, i32* %5
%6 = call i32 (i32, i32*, i32, i32, i32, ...) bitcast (i32 (...)* @so_rstfl to i32 (i32, i32*, i32, i32, i32, ...)*)(i32 %0, i32* %5, i32 %1, i32 %2, i32 %3)
ret i32 %6
}
unsigned long foo(unsigned char c) {
  unsigned long l;
  unsigned int i;
  i = ((unsigned int)c) << 8;
  i |= ((unsigned int)c) << 20;
  asm volatile("" :::);
  i = i & 0x0ff0ff00;
  asm volatile("" :::);
  l = (unsigned long)i;
  return l;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0x14(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x14,%eax
or     -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    $0xff0ff00,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    %edi,%eax
imul   $0x100100,%rax,%rax
ret

LLVM IR (-O0):
define i64 @foo(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i64
%4 = alloca i32
store i8 %0, i8* %2
%5 = load i8, i8* %2
%6 = zext i8 %5 to i32
%7 = shl i32 %6, 8
store i32 %7, i32* %4
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = shl i32 %9, 20
%11 = load i32, i32* %4
%12 = or i32 %11, %10
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = and i32 %13, 267452160
store i32 %14, i32* %4
%15 = load i32, i32* %4
%16 = zext i32 %15 to i64
store i64 %16, i64* %3
%17 = load i64, i64* %3
ret i64 %17
}

LLVM IR (-O2):
define i64 @foo(i8 zeroext %0) {
%2 = zext i8 %0 to i64
%3 = mul nuw nsw i64 %2, 1048832
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
ret i64 %3
}
/* Variables and functions */
char const *getenv(char *);
const char *docker_machine_name() { return getenv("DOCKER_MACHINE_NAME"); }


x86 assembly (clang, -O0):
<docker_machine_name>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <getenv@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<docker_machine_name>:
lea    0xee9(%rip),%rdi
jmp    1030 <getenv@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"DOCKER_MACHINE_NAME\00"
define i8* @docker_machine_name() {
%1 = call i8* @getenv(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [20 x i8] c"DOCKER_MACHINE_NAME\00"
define i8* @docker_machine_name() {
%1 = tail call i8* @getenv(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ scanf(char *, int *);
void completa_vetor(int *vetor, int tamanho_do_vetor) {
  int i;
  for (i = 0; i < tamanho_do_vetor; i++) {
    scanf("%d", &vetor[i]);
  }
}


x86 assembly (clang, -O0):
<completa_vetor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    115b <completa_vetor+0x4b>
mov    -0x8(%rbp),%rsi
movslq -0x10(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rsi
lea    0xeb8(%rip),%rdi
call   1030 <scanf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <completa_vetor+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<completa_vetor>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1145 <completa_vetor+0x35>
mov    %rdi,%rbx
mov    %esi,%r15d
lea    0xeda(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <scanf@plt>
add    $0x4,%rbx
add    $0xffffffffffffffff,%r15
jne    1130 <completa_vetor+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @completa_vetor(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %16, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %14)
br label %16
16: ; preds = %10
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 1
store i32 %18, i32* %5
br label %6
19: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @completa_vetor(i32* %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %12
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %10, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = tail call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %8)
%10 = add nuw nsw i64 %7, 1
%11 = icmp eq i64 %10, %5
br i1 %11, label %12, label %6
12: ; preds = %6, %2
ret void
}
int floatToInt(float input) { return (int)(input + 0.5); }


x86 assembly (clang, -O0):
<floatToInt>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xee6(%rip),%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<floatToInt>:
cvtss2sd %xmm0,%xmm0
addsd  0xef4(%rip),%xmm0
cvttsd2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @floatToInt(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fadd double %4, 5.000000e-01
%6 = fptosi double %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @floatToInt(float %0) {
%2 = fpext float %0 to double
%3 = fadd double %2, 5.000000e-01
%4 = fptosi double %3 to i32
ret i32 %4
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_session_get_tty(const char *session, char **tty) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_session_get_tty>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ecb(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_session_get_tty>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_session_get_tty(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
%5 = load i32, i32* @EINVAL
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_session_get_tty(i8* nocapture readnone %0, i8** nocapture readnone %1) {
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}
double normalize_angle(double angle) {
  if (angle <= -180) {
    return angle + 360.0;
  } else if (angle > 180) {
    return angle - 360.0;
  } else {
    return angle;
  }
}


x86 assembly (clang, -O0):
<normalize_angle>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  0xeef(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
jb     1133 <normalize_angle+0x33>
movsd  0xeec(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    116f <normalize_angle+0x6f>
movsd  -0x10(%rbp),%xmm0
movsd  0xec8(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    1165 <normalize_angle+0x65>
movsd  -0x10(%rbp),%xmm0
movsd  0xeb9(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    116f <normalize_angle+0x6f>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<normalize_angle>:
movsd  0xef8(%rip),%xmm1
ucomisd %xmm0,%xmm1
jae    1121 <normalize_angle+0x21>
ucomisd 0xefa(%rip),%xmm0
jbe    1120 <normalize_angle+0x20>
addsd  0xef8(%rip),%xmm0
ret
addsd  0xedf(%rip),%xmm0
ret

LLVM IR (-O0):
define double @normalize_angle(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp ole double %4, -1.800000e+02
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load double, double* %3
%8 = fadd double %7, 3.600000e+02
store double %8, double* %2
br label %17
9: ; preds = %1
%10 = load double, double* %3
%11 = fcmp ogt double %10, 1.800000e+02
br i1 %11, label %12, label %15
12: ; preds = %9
%13 = load double, double* %3
%14 = fsub double %13, 3.600000e+02
store double %14, double* %2
br label %17
15: ; preds = %9
%16 = load double, double* %3
store double %16, double* %2
br label %17
17: ; preds = %15, %12, %6
%18 = load double, double* %2
ret double %18
}

LLVM IR (-O2):
define double @normalize_angle(double %0) {
%2 = fcmp ugt double %0, -1.800000e+02
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = fadd double %0, 3.600000e+02
br label %9
5: ; preds = %1
%6 = fcmp ogt double %0, 1.800000e+02
br i1 %6, label %7, label %9
7: ; preds = %5
%8 = fadd double %0, -3.600000e+02
br label %9
9: ; preds = %5, %7, %3
%10 = phi double [ %4, %3 ], [ %8, %7 ], [ %0, %5 ]
ret double %10
}
/* Variables and functions */
unsigned int UINT_MAX;
unsigned add_u(unsigned augend, unsigned addend) {
  if ((UINT_MAX - addend) < augend)
    return UINT_MAX;
  return (addend + augend);
}


x86 assembly (clang, -O0):
<add_u>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2ed7(%rip),%rax
mov    (%rax),%eax
sub    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jae    1130 <add_u+0x30>
mov    0x2ec2(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    1139 <add_u+0x39>
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_u>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%ecx
mov    %ecx,%edx
sub    %esi,%edx
lea    (%rsi,%rdi,1),%eax
cmp    %edi,%edx
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
@UINT_MAX = global i32 0
define i32 @add_u(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* @UINT_MAX
%7 = load i32, i32* %5
%8 = sub i32 %6, %7
%9 = load i32, i32* %4
%10 = icmp ult i32 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = load i32, i32* @UINT_MAX
store i32 %12, i32* %3
br label %17
13: ; preds = %2
%14 = load i32, i32* %5
%15 = load i32, i32* %4
%16 = add i32 %14, %15
store i32 %16, i32* %3
br label %17
17: ; preds = %13, %11
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
@UINT_MAX = global i32 0
define i32 @add_u(i32 %0, i32 %1) {
%3 = load i32, i32* @UINT_MAX
%4 = sub i32 %3, %1
%5 = icmp ult i32 %4, %0
%6 = add i32 %1, %0
%7 = select i1 %5, i32 %3, i32 %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ VIDEO_PLAY;
int ioctl(int, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
int videoPlay(int fd) {
  int ans;
  if ((ans = ioctl(fd, VIDEO_PLAY)) < 0) {
    perror("VIDEO PLAY: ");
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<videoPlay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
call   1030 <ioctl@plt>
mov    %eax,-0xc(%rbp)
cmp    $0x0,%eax
jge    1160 <videoPlay+0x40>
lea    0xeb1(%rip),%rdi
call   1040 <perror@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1167 <videoPlay+0x47>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<videoPlay>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
call   1030 <ioctl@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
js     1139 <videoPlay+0x19>
pop    %rcx
ret
lea    0xec0(%rip),%rdi
call   1040 <perror@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@VIDEO_PLAY = global i32 0
@.str = [13 x i8] c"VIDEO PLAY: \00"
define i32 @videoPlay(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = load i32, i32* @VIDEO_PLAY
%7 = call i32 @ioctl(i32 %5, i32 %6)
store i32 %7, i32* %4
%8 = icmp slt i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = call i32 @perror(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %2
br label %12
11: ; preds = %1
store i32 0, i32* %2
br label %12
12: ; preds = %11, %9
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@VIDEO_PLAY = global i32 0
@.str = [13 x i8] c"VIDEO PLAY: \00"
define i32 @videoPlay(i32 %0) {
%2 = load i32, i32* @VIDEO_PLAY
%3 = tail call i32 @ioctl(i32 %0, i32 %2)
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @perror(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %1, %5
%8 = phi i32 [ -1, %5 ], [ 0, %1 ]
ret i32 %8
}
int my_strcmp(const char *s1, const char *s2) {
  for (; *s1 == *s2; s1++, s2++) {
    if (!(*s1))
      return (0);
  }
  return (*s1 - *s2);
}


x86 assembly (clang, -O0):
<my_strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    -0x18(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jne    115d <my_strcmp+0x5d>
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
jne    113b <my_strcmp+0x3b>
movl   $0x0,-0x4(%rbp)
jmp    1170 <my_strcmp+0x70>
jmp    1140 <my_strcmp+0x40>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    110c <my_strcmp+0xc>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    -0x18(%rbp),%rcx
movsbl (%rcx),%ecx
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_strcmp>:
mov    (%rdi),%al
mov    (%rsi),%dl
cmp    %dl,%al
jne    1124 <my_strcmp+0x24>
mov    $0x1,%ecx
nopl   (%rax)
test   %al,%al
je     112d <my_strcmp+0x2d>
movzbl (%rdi,%rcx,1),%eax
movzbl (%rsi,%rcx,1),%edx
add    $0x1,%rcx
cmp    %dl,%al
je     1110 <my_strcmp+0x10>
movsbl %dl,%ecx
movsbl %al,%eax
sub    %ecx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @my_strcmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
br label %6
6: ; preds = %20, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i8*, i8** %5
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %9, %12
br i1 %13, label %14, label %25
14: ; preds = %6
%15 = load i8*, i8** %4
%16 = load i8, i8* %15
%17 = icmp ne i8 %16, 0
br i1 %17, label %19, label %18
18: ; preds = %14
store i32 0, i32* %3
br label %33
19: ; preds = %14
br label %20
20: ; preds = %19
%21 = load i8*, i8** %4
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %4
%23 = load i8*, i8** %5
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %5
br label %6
25: ; preds = %6
%26 = load i8*, i8** %4
%27 = load i8, i8* %26
%28 = sext i8 %27 to i32
%29 = load i8*, i8** %5
%30 = load i8, i8* %29
%31 = sext i8 %30 to i32
%32 = sub nsw i32 %28, %31
store i32 %32, i32* %3
br label %33
33: ; preds = %25, %18
%34 = load i32, i32* %3
ret i32 %34
}

LLVM IR (-O2):
define i32 @my_strcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
%5 = icmp eq i8 %3, %4
br i1 %5, label %6, label %17
6: ; preds = %2, %11
%7 = phi i8 [ %14, %11 ], [ %3, %2 ]
%8 = phi i8* [ %13, %11 ], [ %1, %2 ]
%9 = phi i8* [ %12, %11 ], [ %0, %2 ]
%10 = icmp eq i8 %7, 0
br i1 %10, label %23, label %11
11: ; preds = %6
%12 = getelementptr inbounds i8, i8* %9, i64 1
%13 = getelementptr inbounds i8, i8* %8, i64 1
%14 = load i8, i8* %12
%15 = load i8, i8* %13
%16 = icmp eq i8 %14, %15
br i1 %16, label %6, label %17
17: ; preds = %11, %2
%18 = phi i8 [ %3, %2 ], [ %14, %11 ]
%19 = phi i8 [ %4, %2 ], [ %15, %11 ]
%20 = sext i8 %19 to i32
%21 = sext i8 %18 to i32
%22 = sub nsw i32 %21, %20
br label %23
23: ; preds = %6, %17
%24 = phi i32 [ %22, %17 ], [ 0, %6 ]
ret i32 %24
}
/* Variables and functions */
scalar_t__ write_com_4bit(int);
void lcd_normal() {
  write_com_4bit(0x0004 | 0x0002);
  while (write_com_4bit(0x0100) != 0)
    ;
}


x86 assembly (clang, -O0):
<lcd_normal>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
call   1030 <write_com_4bit@plt>
mov    $0x100,%edi
call   1030 <write_com_4bit@plt>
cmp    $0x0,%rax
je     1137 <lcd_normal+0x27>
jmp    111e <lcd_normal+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcd_normal>:
push   %rax
mov    $0x6,%edi
call   1030 <write_com_4bit@plt>
nopl   0x0(%rax,%rax,1)
mov    $0x100,%edi
call   1030 <write_com_4bit@plt>
test   %rax,%rax
jne    1120 <lcd_normal+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @lcd_normal() {
%1 = call i64 @write_com_4bit(i32 6)
br label %2
2: ; preds = %5, %0
%3 = call i64 @write_com_4bit(i32 256)
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %2
br label %2
6: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @lcd_normal() {
%1 = tail call i64 @write_com_4bit(i32 6)
br label %2
2: ; preds = %2, %0
%3 = tail call i64 @write_com_4bit(i32 256)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %2
5: ; preds = %2
ret void
}
/* Variables and functions */
scalar_t__ isupper(char);
unsigned tolower(char c) {
  if (isupper(c)) {
    return c - 'A' + 'a';
  } else {
    return c;
  }
}


x86 assembly (clang, -O0):
<tolower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
je     1143 <tolower+0x33>
movsbl -0x5(%rbp),%eax
sub    $0x41,%eax
add    $0x61,%eax
mov    %eax,-0x4(%rbp)
jmp    114a <tolower+0x3a>
movsbl -0x5(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tolower>:
push   %rbx
mov    %edi,%ebx
call   1030 <isupper@plt>
lea    0x20(%rbx),%ecx
test   %rax,%rax
cmove  %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @tolower(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = call i64 @isupper(i8 signext %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = sub nsw i32 %9, 65
%11 = add nsw i32 %10, 97
store i32 %11, i32* %2
br label %15
12: ; preds = %1
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
store i32 %14, i32* %2
br label %15
15: ; preds = %12, %7
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @tolower(i8 signext %0) {
%2 = tail call i64 @isupper(i8 signext %0)
%3 = icmp eq i64 %2, 0
%4 = sext i8 %0 to i32
%5 = add nsw i32 %4, 32
%6 = select i1 %3, i32 %4, i32 %5
ret i32 %6
}
/* Variables and functions */
int machine_proto();
int proto2(int);
int f(int i) { return i + machine_proto() + proto2(i); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1040 <machine_proto@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <proto2@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <machine_proto@plt>
mov    %eax,%ebp
add    %ebx,%ebp
mov    %ebx,%edi
call   1030 <proto2@plt>
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (...) @machine_proto()
%5 = add nsw i32 %3, %4
%6 = load i32, i32* %2
%7 = call i32 @proto2(i32 %6)
%8 = add nsw i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = tail call i32 (...) @machine_proto()
%3 = add nsw i32 %2, %0
%4 = tail call i32 @proto2(i32 %0)
%5 = add nsw i32 %3, %4
ret i32 %5
}
unsigned int eruConfigureOGU0(unsigned int exocon) {
  (*((volatile unsigned int *const)(0x40010600 + 0x20))) = exocon;
  return 0;
}


x86 assembly (clang, -O0):
<eruConfigureOGU0>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x40010620,%eax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<eruConfigureOGU0>:
mov    %edi,0x40010620
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @eruConfigureOGU0(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store volatile i32 %3, i32* inttoptr (i64 1073808928 to i32*)
ret i32 0
}

LLVM IR (-O2):
define i32 @eruConfigureOGU0(i32 %0) {
store volatile i32 %0, i32* inttoptr (i64 1073808928 to i32*)
ret i32 0
}
int bit_pos(unsigned long flag) {
  int i;
  for (i = 0; i < 0x4 * 8; i++)
    if (((flag) & (1 << (i))) != 0)
      break;
  return i;
}


x86 assembly (clang, -O0):
<bit_pos>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x20,-0xc(%rbp)
jge    1151 <bit_pos+0x51>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
movslq %ecx,%rcx
and    %rcx,%rax
cmp    $0x0,%rax
je     113e <bit_pos+0x3e>
jmp    1151 <bit_pos+0x51>
jmp    1143 <bit_pos+0x43>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <bit_pos+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit_pos>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    $0x1,%edx
mov    %eax,%ecx
shl    %cl,%edx
movslq %edx,%rcx
test   %rdi,%rcx
jne    116c <bit_pos+0x6c>
lea    0x1(%rax),%ecx
mov    $0x1,%edx
shl    %cl,%edx
movslq %edx,%rcx
test   %rdi,%rcx
jne    1165 <bit_pos+0x65>
lea    0x2(%rax),%ecx
mov    $0x1,%edx
shl    %cl,%edx
movslq %edx,%rcx
test   %rdi,%rcx
jne    1169 <bit_pos+0x69>
lea    0x3(%rax),%ecx
mov    $0x1,%edx
shl    %cl,%edx
movslq %edx,%rcx
test   %rdi,%rcx
jne    116d <bit_pos+0x6d>
add    $0x4,%eax
cmp    $0x20,%eax
jne    1110 <bit_pos+0x10>
mov    $0x20,%eax
ret
add    $0x1,%eax
ret
add    $0x2,%eax
ret
add    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @bit_pos(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
store i32 0, i32* %3
br label %4
4: ; preds = %16, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 32
br i1 %6, label %7, label %19
7: ; preds = %4
%8 = load i64, i64* %2
%9 = load i32, i32* %3
%10 = shl i32 1, %9
%11 = sext i32 %10 to i64
%12 = and i64 %8, %11
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %7
br label %19
15: ; preds = %7
br label %16
16: ; preds = %15
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 1
store i32 %18, i32* %3
br label %4
19: ; preds = %14, %4
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @bit_pos(i64 %0) {
br label %2
2: ; preds = %26, %1
%3 = phi i32 [ 0, %1 ], [ %27, %26 ]
%4 = shl nuw i32 1, %3
%5 = sext i32 %4 to i64
%6 = and i64 %5, %0
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %29
8: ; preds = %2
%9 = or i32 %3, 1
%10 = shl nuw i32 1, %9
%11 = sext i32 %10 to i64
%12 = and i64 %11, %0
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %29
14: ; preds = %8
%15 = or i32 %3, 2
%16 = shl nuw i32 1, %15
%17 = sext i32 %16 to i64
%18 = and i64 %17, %0
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %29
20: ; preds = %14
%21 = or i32 %3, 3
%22 = shl nuw i32 1, %21
%23 = sext i32 %22 to i64
%24 = and i64 %23, %0
%25 = icmp eq i64 %24, 0
br i1 %25, label %26, label %29
26: ; preds = %20
%27 = add nuw nsw i32 %3, 4
%28 = icmp eq i32 %27, 32
br i1 %28, label %29, label %2
29: ; preds = %26, %20, %14, %8, %2
%30 = phi i32 [ %3, %2 ], [ %9, %8 ], [ %15, %14 ], [ %21, %20 ], [ 32, %26 ]
ret i32 %30
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0xec() {
  Assert_real((isodigit(236) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              1185, ("isodigit should be 0 for 0xec"));
}


x86 assembly (clang, -O0):
<t_isodigit_0xec>:
push   %rbp
mov    %rsp,%rbp
mov    $0xec,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4a1,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0xec>:
push   %rax
mov    $0xec,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x4a1,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0xec\00"
define void @t_isodigit_0xec() {
%1 = call i64 @isodigit(i32 236)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1185, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0xec\00"
define void @t_isodigit_0xec() {
%1 = tail call i64 @isodigit(i32 236)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1185, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
struct confline {
  int dummy;
};
struct cnfnode {
  int dummy;
};

/* Variables and functions */
struct confline *parse_ifupdown_iface(struct confline *, struct cnfnode *);
struct confline *parse_ifupdown_mapping(struct confline *cl_root,
                                        struct cnfnode *cn_root) {
  return parse_ifupdown_iface(cl_root, cn_root);
}


x86 assembly (clang, -O0):
<parse_ifupdown_mapping>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <parse_ifupdown_iface@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_ifupdown_mapping>:
jmp    1030 <parse_ifupdown_iface@plt>

LLVM IR (-O0):
%struct.confline = type { i32 }
%struct.cnfnode = type { i32 }
define %struct.confline* @parse_ifupdown_mapping(%struct.confline* %0, %struct.cnfnode* %1) {
%3 = alloca %struct.confline*
%4 = alloca %struct.cnfnode*
store %struct.confline* %0, %struct.confline** %3
store %struct.cnfnode* %1, %struct.cnfnode** %4
%5 = load %struct.confline*, %struct.confline** %3
%6 = load %struct.cnfnode*, %struct.cnfnode** %4
%7 = call %struct.confline* @parse_ifupdown_iface(%struct.confline* %5, %struct.cnfnode* %6)
ret %struct.confline* %7
}

LLVM IR (-O2):
%struct.confline = type { i32 }
%struct.cnfnode = type { i32 }
define %struct.confline* @parse_ifupdown_mapping(%struct.confline* %0, %struct.cnfnode* %1) {
%3 = tail call %struct.confline* @parse_ifupdown_iface(%struct.confline* %0, %struct.cnfnode* %1)
ret %struct.confline* %3
}
void eeprom_sleep() {
  do {
  } while (0);
}


x86 assembly (clang, -O0):
<eeprom_sleep>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <eeprom_sleep+0x9>
jmp    110e <eeprom_sleep+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<eeprom_sleep>:
ret

LLVM IR (-O0):
define void @eeprom_sleep() {
br label %1
1: ; preds = %0
br label %2
2: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @eeprom_sleep() {
ret void
}
void first_Seqstr(_loc, _Base_Seqstr) int *_loc, *_Base_Seqstr;
{ Seqstr_FIRST_FNC_OBJ(_loc, _Base_Seqstr); }


x86 assembly (clang, -O0):
<first_Seqstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1030 <Seqstr_FIRST_FNC_OBJ@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<first_Seqstr>:
xor    %eax,%eax
jmp    1030 <Seqstr_FIRST_FNC_OBJ@plt>

LLVM IR (-O0):
define void @first_Seqstr(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 (i32*, i32*, ...) bitcast (i32 (...)* @Seqstr_FIRST_FNC_OBJ to i32 (i32*, i32*, ...)*)(i32* %5, i32* %6)
ret void
}

LLVM IR (-O2):
define void @first_Seqstr(i32* %0, i32* %1) {
%3 = tail call i32 (i32*, i32*, ...) bitcast (i32 (...)* @Seqstr_FIRST_FNC_OBJ to i32 (i32*, i32*, ...)*)(i32* %0, i32* %1)
ret void
}
/* Type definitions */
typedef scalar_t__ uint64_t;
struct timespec {
  scalar_t__ tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_MONOTONIC;
int /*<<< orphan*/ clock_gettime(int /*<<< orphan*/, struct timespec *);
void init_lfsrandom64(uint64_t *r) {
  struct timespec now;
  clock_gettime(CLOCK_MONOTONIC, &now);
  *r = (uint64_t)now.tv_nsec;
}


x86 assembly (clang, -O0):
<init_lfsrandom64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    -0x10(%rbp),%rsi
call   1030 <clock_gettime@plt>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_lfsrandom64>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0x8(%rsp),%rsi
call   1030 <clock_gettime@plt>
mov    0x8(%rsp),%rax
mov    %rax,(%rbx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.timespec = type { i64 }
@CLOCK_MONOTONIC = global i32 0
define void @init_lfsrandom64(i64* %0) {
%2 = alloca i64*
%3 = alloca %struct.timespec
store i64* %0, i64** %2
%4 = load i32, i32* @CLOCK_MONOTONIC
%5 = call i32 @clock_gettime(i32 %4, %struct.timespec* %3)
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
%7 = load i64, i64* %6
%8 = load i64*, i64** %2
store i64 %7, i64* %8
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i64 }
@CLOCK_MONOTONIC = global i32 0
define void @init_lfsrandom64(i64* nocapture writeonly %0) {
%2 = alloca %struct.timespec
%3 = bitcast %struct.timespec* %2 to i8*
%4 = load i32, i32* @CLOCK_MONOTONIC
%5 = call i32 @clock_gettime(i32 %4, %struct.timespec* %2)
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 0
%7 = load i64, i64* %6
store i64 %7, i64* %0
ret void
}
struct s3c24x0_memctl *s3c24x0_get_base_memctl(void) {
  return (struct s3c24x0_memctl *)0x14000000;
}


x86 assembly (clang, -O0):
<s3c24x0_get_base_memctl>:
push   %rbp
mov    %rsp,%rbp
mov    $0x14000000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<s3c24x0_get_base_memctl>:
mov    $0x14000000,%eax
ret

LLVM IR (-O0):
%struct.s3c24x0_memctl = type opaque
define %struct.s3c24x0_memctl* @s3c24x0_get_base_memctl() {
ret %struct.s3c24x0_memctl* inttoptr (i64 335544320 to %struct.s3c24x0_memctl*)
}

LLVM IR (-O2):
%struct.s3c24x0_memctl = type opaque
define %struct.s3c24x0_memctl* @s3c24x0_get_base_memctl() {
ret %struct.s3c24x0_memctl* inttoptr (i64 335544320 to %struct.s3c24x0_memctl*)
}
int test_imm_05int64_lowword_reg(long long val) {
  return ((val) & (0x05 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_05int64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x5,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_05int64_lowword_reg>:
test   $0x5,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_05int64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 5
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_05int64_lowword_reg(i64 %0) {
%2 = and i64 %0, 5
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int while_upto20(int m) {
  while (m < 20) {
    int l = 0;
    m++;
  }
  return m;
}


x86 assembly (clang, -O0):
<while_upto20>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x14,-0x4(%rbp)
jge    1126 <while_upto20+0x26>
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1107 <while_upto20+0x7>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<while_upto20>:
cmp    $0x15,%edi
mov    $0x14,%eax
cmovge %edi,%eax
ret

LLVM IR (-O0):
define i32 @while_upto20(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 20
br i1 %6, label %7, label %10
7: ; preds = %4
store i32 0, i32* %3
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
store i32 %9, i32* %2
br label %4
10: ; preds = %4
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @while_upto20(i32 %0) {
%2 = call i32 @llvm.smax.i32(i32 %0, i32 20)
ret i32 %2
}
void wifi_rsp_sme_start_wps(const struct wifi_msg_sme_start_wps_rsp_t *msg) {}


x86 assembly (clang, -O0):
<wifi_rsp_sme_start_wps>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifi_rsp_sme_start_wps>:
ret

LLVM IR (-O0):
%struct.wifi_msg_sme_start_wps_rsp_t = type opaque
define void @wifi_rsp_sme_start_wps(%struct.wifi_msg_sme_start_wps_rsp_t* %0) {
%2 = alloca %struct.wifi_msg_sme_start_wps_rsp_t*
store %struct.wifi_msg_sme_start_wps_rsp_t* %0, %struct.wifi_msg_sme_start_wps_rsp_t** %2
ret void
}

LLVM IR (-O2):
%struct.wifi_msg_sme_start_wps_rsp_t = type opaque
define void @wifi_rsp_sme_start_wps(%struct.wifi_msg_sme_start_wps_rsp_t* nocapture %0) {
ret void
}
/* Type definitions */
struct fb {
  int dummy;
};

/* Variables and functions */
scalar_t__ cursorIn(struct fb *, int, int, int, int);
int /*<<< orphan*/ hideCursor(struct fb *);
void hideCursorIn(struct fb *self, int l, int r, int t, int b) {
  if (cursorIn(self, l, r, t, b))
    hideCursor(self);
}


x86 assembly (clang, -O0):
<hideCursorIn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
call   1040 <cursorIn@plt>
cmp    $0x0,%rax
je     1162 <hideCursorIn+0x42>
mov    -0x8(%rbp),%rdi
call   1030 <hideCursor@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hideCursorIn>:
push   %rbx
mov    %rdi,%rbx
call   1040 <cursorIn@plt>
test   %rax,%rax
je     1137 <hideCursorIn+0x17>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <hideCursor@plt>
pop    %rbx
ret

LLVM IR (-O0):
%struct.fb = type { i32 }
define void @hideCursorIn(%struct.fb* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca %struct.fb*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store %struct.fb* %0, %struct.fb** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load %struct.fb*, %struct.fb** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i64 @cursorIn(%struct.fb* %11, i32 %12, i32 %13, i32 %14, i32 %15)
%17 = icmp ne i64 %16, 0
br i1 %17, label %18, label %21
18: ; preds = %5
%19 = load %struct.fb*, %struct.fb** %6
%20 = call i32 @hideCursor(%struct.fb* %19)
br label %21
21: ; preds = %18, %5
ret void
}

LLVM IR (-O2):
%struct.fb = type { i32 }
define void @hideCursorIn(%struct.fb* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i64 @cursorIn(%struct.fb* %0, i32 %1, i32 %2, i32 %3, i32 %4)
%7 = icmp eq i64 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %5
%9 = tail call i32 @hideCursor(%struct.fb* %0)
br label %10
10: ; preds = %8, %5
ret void
}
float ftoc(float f) {
  float c;
  c = (5.0 / 9.0) * (f - 32.0);
  return c;
}


x86 assembly (clang, -O0):
<ftoc>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xeee(%rip),%xmm0
subsd  %xmm0,%xmm1
movsd  0xeda(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ftoc>:
cvtss2sd %xmm0,%xmm0
addsd  0xef4(%rip),%xmm0
mulsd  0xef4(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @ftoc(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = fpext float %4 to double
%6 = fsub double %5, 3.200000e+01
%7 = fmul double 0x3FE1C71C71C71C72, %6
%8 = fptrunc double %7 to float
store float %8, float* %3
%9 = load float, float* %3
ret float %9
}

LLVM IR (-O2):
define float @ftoc(float %0) {
%2 = fpext float %0 to double
%3 = fadd double %2, -3.200000e+01
%4 = fmul double %3, 0x3FE1C71C71C71C72
%5 = fptrunc double %4 to float
ret float %5
}
int do_821() { return 821; }


x86 assembly (clang, -O0):
<do_821>:
push   %rbp
mov    %rsp,%rbp
mov    $0x335,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_821>:
mov    $0x335,%eax
ret

LLVM IR (-O0):
define i32 @do_821() {
ret i32 821
}

LLVM IR (-O2):
define i32 @do_821() {
ret i32 821
}
int tolower(int c) { return (c >= 'A' && c <= 'Z') ? (c - 'A' + 'a') : c; }


x86 assembly (clang, -O0):
<tolower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x41,-0x4(%rbp)
jl     112c <tolower+0x2c>
cmpl   $0x5a,-0x4(%rbp)
jg     112c <tolower+0x2c>
mov    -0x4(%rbp),%eax
sub    $0x41,%eax
add    $0x61,%eax
mov    %eax,-0x8(%rbp)
jmp    1132 <tolower+0x32>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tolower>:
lea    -0x41(%rdi),%ecx
lea    0x20(%rdi),%eax
cmp    $0x1a,%ecx
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @tolower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 65
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 90
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = load i32, i32* %2
%10 = sub nsw i32 %9, 65
%11 = add nsw i32 %10, 97
br label %14
12: ; preds = %5, %1
%13 = load i32, i32* %2
br label %14
14: ; preds = %12, %8
%15 = phi i32 [ %11, %8 ], [ %13, %12 ]
ret i32 %15
}

LLVM IR (-O2):
define i32 @tolower(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = add nsw i32 %0, 32
%5 = select i1 %3, i32 %4, i32 %0
ret i32 %5
}
void __delay_cycles(unsigned int n) {
  __asm__ __volatile__("1: \n"
                       " dec %[n] \n"
                       " jne 1b \n"
                       : [n] "+r"(n));
}


x86 assembly (clang, -O0):
<__delay_cycles>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
dec    %eax
jne    110a <__delay_cycles+0xa>
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__delay_cycles>:
dec    %edi
jne    1100 <__delay_cycles>
ret

LLVM IR (-O0):
define void @__delay_cycles(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 asm sideeffect "1: \0A dec $0 \0A jne 1b \0A", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %3)
store i32 %4, i32* %2
ret void
}

LLVM IR (-O2):
define void @__delay_cycles(i32 %0) {
%2 = tail call i32 asm sideeffect "1: \0A dec $0 \0A jne 1b \0A", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %0)
ret void
}
/* Type definitions */
typedef union sigval {
  int dummy;
} sigval;

/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void notify_func2(union sigval sigval) { puts("notify_func2"); }


x86 assembly (clang, -O0):
<notify_func2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
lea    0xede(%rip),%rdi
call   1030 <puts@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<notify_func2>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
%union.sigval = type { i32 }
@.str = [13 x i8] c"notify_func2\00"
define void @notify_func2(i32 %0) {
%2 = alloca %union.sigval
%3 = getelementptr inbounds %union.sigval, %union.sigval* %2, i32 0, i32 0
store i32 %0, i32* %3
%4 = call i32 @puts(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"notify_func2\00"
define void @notify_func2(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ opt_err_alloc(size_t);
void *realloc(void *, size_t);
void *opt_realloc(void *p, size_t n) {
  void *t = realloc(p, n);
  if (t == NULL) {
    opt_err_alloc(n);
  }
  return t;
}


x86 assembly (clang, -O0):
<opt_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1155 <opt_realloc+0x35>
mov    -0x10(%rbp),%rdi
call   1030 <opt_err_alloc@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<opt_realloc>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
call   1040 <realloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113c <opt_realloc+0x1c>
mov    %r14,%rdi
call   1030 <opt_err_alloc@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @opt_realloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = load i64, i64* %4
%13 = call i32 @opt_err_alloc(i64 %12)
br label %14
14: ; preds = %11, %2
%15 = load i8*, i8** %5
ret i8* %15
}

LLVM IR (-O2):
define noalias i8* @opt_realloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @opt_err_alloc(i64 %1)
br label %7
7: ; preds = %5, %2
ret i8* %3
}
void byteorder_swap_pointer_16_copy(unsigned char *src, unsigned char *dst) {
  dst[1] = src[0];
  dst[0] = src[1];
}


x86 assembly (clang, -O0):
<byteorder_swap_pointer_16_copy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x8(%rbp),%rax
mov    0x1(%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<byteorder_swap_pointer_16_copy>:
mov    (%rdi),%al
mov    %al,0x1(%rsi)
mov    0x1(%rdi),%al
mov    %al,(%rsi)
ret

LLVM IR (-O0):
define void @byteorder_swap_pointer_16_copy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 0
%7 = load i8, i8* %6
%8 = load i8*, i8** %4
%9 = getelementptr inbounds i8, i8* %8, i64 1
store i8 %7, i8* %9
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %11
%13 = load i8*, i8** %4
%14 = getelementptr inbounds i8, i8* %13, i64 0
store i8 %12, i8* %14
ret void
}

LLVM IR (-O2):
define void @byteorder_swap_pointer_16_copy(i8* nocapture %0, i8* nocapture writeonly %1) {
%3 = load i8, i8* %0
%4 = getelementptr inbounds i8, i8* %1, i64 1
store i8 %3, i8* %4
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
store i8 %6, i8* %1
ret void
}
int d_ne_rm2(double a1, double *a2) { return !(((a1) != (*a2))); }


x86 assembly (clang, -O0):
<d_ne_rm2>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    -0x10(%rbp),%rax
ucomisd (%rax),%xmm0
setne  %al
setp   %cl
or     %cl,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d_ne_rm2>:
cmpeqsd (%rdi),%xmm0
movq   %xmm0,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @d_ne_rm2(double %0, double* %1) {
%3 = alloca double
%4 = alloca double*
store double %0, double* %3
store double* %1, double** %4
%5 = load double, double* %3
%6 = load double*, double** %4
%7 = load double, double* %6
%8 = fcmp une double %5, %7
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @d_ne_rm2(double %0, double* nocapture %1) {
%3 = load double, double* %1
%4 = fcmp oeq double %3, %0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ assign(int *, int);
int /*<<< orphan*/ free(int *);
scalar_t__ malloc(int);
void potentially_null_pointer_passed_as_argument() {
  int *p = NULL;
  p = (int *)malloc(sizeof(int));
  assign(p, 42);
  free(p);
}


x86 assembly (clang, -O0):
<potentially_null_pointer_passed_as_argument>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2a,%esi
call   1050 <assign@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<potentially_null_pointer_passed_as_argument>:
push   %rbx
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    $0x2a,%esi
call   1050 <assign@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @potentially_null_pointer_passed_as_argument() {
%1 = alloca i32*
store i32* null, i32** %1
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32* %3, i32** %1
%4 = load i32*, i32** %1
%5 = call i32 @assign(i32* %4, i32 42)
%6 = load i32*, i32** %1
%7 = call i32 @free(i32* %6)
ret void
}

LLVM IR (-O2):
define void @potentially_null_pointer_passed_as_argument() {
%1 = tail call i64 @malloc(i32 4)
%2 = inttoptr i64 %1 to i32*
%3 = tail call i32 @assign(i32* %2, i32 42)
%4 = tail call i32 @free(i32* %2)
ret void
}