#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;
struct cache_description {
  int dummy;
};

/* Variables and functions */
scalar_t__ cpu_check_cache_list(struct cache_description const *, int, int *,
                                int *);
int cpu_check_cache_list_by_register(const struct cache_description *cache_list,
                                     uint32_t reg_value, uint32_t *cache_size,
                                     uint32_t *cache_line) {
  if (cpu_check_cache_list(cache_list, (reg_value >> 24) & 0xffu, cache_size,
                           cache_line))
    return 1;
  if (cpu_check_cache_list(cache_list, (reg_value >> 16) & 0xffu, cache_size,
                           cache_line))
    return 1;
  if (cpu_check_cache_list(cache_list, (reg_value >> 8) & 0xffu, cache_size,
                           cache_line))
    return 1;
  if (cpu_check_cache_list(cache_list, reg_value & 0xffu, cache_size,
                           cache_line))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<cpu_check_cache_list_by_register>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
sar    $0x18,%esi
and    $0xff,%esi
mov    -0x20(%rbp),%rdx
mov    -0x28(%rbp),%rcx
call   1030 <cpu_check_cache_list@plt>
cmp    $0x0,%rax
je     115a <cpu_check_cache_list_by_register+0x4a>
movl   $0x1,-0x4(%rbp)
jmp    11f7 <cpu_check_cache_list_by_register+0xe7>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
sar    $0x10,%esi
and    $0xff,%esi
mov    -0x20(%rbp),%rdx
mov    -0x28(%rbp),%rcx
call   1030 <cpu_check_cache_list@plt>
cmp    $0x0,%rax
je     118d <cpu_check_cache_list_by_register+0x7d>
movl   $0x1,-0x4(%rbp)
jmp    11f7 <cpu_check_cache_list_by_register+0xe7>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
sar    $0x8,%esi
and    $0xff,%esi
mov    -0x20(%rbp),%rdx
mov    -0x28(%rbp),%rcx
call   1030 <cpu_check_cache_list@plt>
cmp    $0x0,%rax
je     11c0 <cpu_check_cache_list_by_register+0xb0>
movl   $0x1,-0x4(%rbp)
jmp    11f7 <cpu_check_cache_list_by_register+0xe7>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
and    $0xff,%esi
mov    -0x20(%rbp),%rdx
mov    -0x28(%rbp),%rcx
call   1030 <cpu_check_cache_list@plt>
cmp    $0x0,%rax
je     11f0 <cpu_check_cache_list_by_register+0xe0>
movl   $0x1,-0x4(%rbp)
jmp    11f7 <cpu_check_cache_list_by_register+0xe7>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_check_cache_list_by_register>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %rcx,%r14
mov    %rdx,%r15
mov    %esi,%ebx
mov    %rdi,%rbp
mov    %esi,%eax
shr    $0x18,%eax
mov    %eax,%esi
call   1030 <cpu_check_cache_list@plt>
mov    $0x1,%r12d
test   %rax,%rax
jne    1186 <cpu_check_cache_list_by_register+0x76>
mov    %ebx,%eax
shr    $0x10,%eax
movzbl %al,%esi
mov    %rbp,%rdi
mov    %r15,%rdx
mov    %r14,%rcx
call   1030 <cpu_check_cache_list@plt>
test   %rax,%rax
jne    1186 <cpu_check_cache_list_by_register+0x76>
movzbl %bh,%esi
mov    %rbp,%rdi
mov    %r15,%rdx
mov    %r14,%rcx
call   1030 <cpu_check_cache_list@plt>
test   %rax,%rax
jne    1186 <cpu_check_cache_list_by_register+0x76>
movzbl %bl,%esi
mov    %rbp,%rdi
mov    %r15,%rdx
mov    %r14,%rcx
call   1030 <cpu_check_cache_list@plt>
xor    %r12d,%r12d
test   %rax,%rax
setne  %r12b
mov    %r12d,%eax
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
%struct.cache_description = type { i32 }
define i32 @cpu_check_cache_list_by_register(%struct.cache_description* %0, i32 %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca %struct.cache_description*
%7 = alloca i32
%8 = alloca i32*
%9 = alloca i32*
store %struct.cache_description* %0, %struct.cache_description** %6
store i32 %1, i32* %7
store i32* %2, i32** %8
store i32* %3, i32** %9
%10 = load %struct.cache_description*, %struct.cache_description** %6
%11 = load i32, i32* %7
%12 = ashr i32 %11, 24
%13 = and i32 %12, 255
%14 = load i32*, i32** %8
%15 = load i32*, i32** %9
%16 = call i64 @cpu_check_cache_list(%struct.cache_description* %10, i32 %13, i32* %14, i32* %15)
%17 = icmp ne i64 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %4
store i32 1, i32* %5
br label %49
19: ; preds = %4
%20 = load %struct.cache_description*, %struct.cache_description** %6
%21 = load i32, i32* %7
%22 = ashr i32 %21, 16
%23 = and i32 %22, 255
%24 = load i32*, i32** %8
%25 = load i32*, i32** %9
%26 = call i64 @cpu_check_cache_list(%struct.cache_description* %20, i32 %23, i32* %24, i32* %25)
%27 = icmp ne i64 %26, 0
br i1 %27, label %28, label %29
28: ; preds = %19
store i32 1, i32* %5
br label %49
29: ; preds = %19
%30 = load %struct.cache_description*, %struct.cache_description** %6
%31 = load i32, i32* %7
%32 = ashr i32 %31, 8
%33 = and i32 %32, 255
%34 = load i32*, i32** %8
%35 = load i32*, i32** %9
%36 = call i64 @cpu_check_cache_list(%struct.cache_description* %30, i32 %33, i32* %34, i32* %35)
%37 = icmp ne i64 %36, 0
br i1 %37, label %38, label %39
38: ; preds = %29
store i32 1, i32* %5
br label %49
39: ; preds = %29
%40 = load %struct.cache_description*, %struct.cache_description** %6
%41 = load i32, i32* %7
%42 = and i32 %41, 255
%43 = load i32*, i32** %8
%44 = load i32*, i32** %9
%45 = call i64 @cpu_check_cache_list(%struct.cache_description* %40, i32 %42, i32* %43, i32* %44)
%46 = icmp ne i64 %45, 0
br i1 %46, label %47, label %48
47: ; preds = %39
store i32 1, i32* %5
br label %49
48: ; preds = %39
store i32 0, i32* %5
br label %49
49: ; preds = %48, %47, %38, %28, %18
%50 = load i32, i32* %5
ret i32 %50
}

LLVM IR (-O2):
%struct.cache_description = type { i32 }
define i32 @cpu_check_cache_list_by_register(%struct.cache_description* %0, i32 %1, i32* %2, i32* %3) {
%5 = lshr i32 %1, 24
%6 = tail call i64 @cpu_check_cache_list(%struct.cache_description* %0, i32 %5, i32* %2, i32* %3)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %23
8: ; preds = %4
%9 = lshr i32 %1, 16
%10 = and i32 %9, 255
%11 = tail call i64 @cpu_check_cache_list(%struct.cache_description* %0, i32 %10, i32* %2, i32* %3)
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %23
13: ; preds = %8
%14 = lshr i32 %1, 8
%15 = and i32 %14, 255
%16 = tail call i64 @cpu_check_cache_list(%struct.cache_description* %0, i32 %15, i32* %2, i32* %3)
%17 = icmp eq i64 %16, 0
br i1 %17, label %18, label %23
18: ; preds = %13
%19 = and i32 %1, 255
%20 = tail call i64 @cpu_check_cache_list(%struct.cache_description* %0, i32 %19, i32* %2, i32* %3)
%21 = icmp ne i64 %20, 0
%22 = zext i1 %21 to i32
br label %23
23: ; preds = %18, %13, %8, %4
%24 = phi i32 [ 1, %4 ], [ 1, %8 ], [ 1, %13 ], [ %22, %18 ]
ret i32 %24
}