xunge/DecIR huggingface dataset:
/* Variables and functions */
int getpagesize();
int get_page_size(void) {
  int ret;
  ret = getpagesize();
  if (!ret)
    ret = 4096;
  return (ret);
}


x86 assembly (clang, -O0):
<get_page_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getpagesize@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1133 <get_page_size+0x23>
movl   $0x1000,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_page_size>:
push   %rax
xor    %eax,%eax
call   1030 <getpagesize@plt>
test   %eax,%eax
mov    $0x1000,%ecx
cmove  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @get_page_size() {
%1 = alloca i32
%2 = call i32 (...) @getpagesize()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp ne i32 %3, 0
br i1 %4, label %6, label %5
5: ; preds = %0
store i32 4096, i32* %1
br label %6
6: ; preds = %5, %0
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_page_size() {
%1 = tail call i32 (...) @getpagesize()
%2 = icmp eq i32 %1, 0
%3 = select i1 %2, i32 4096, i32 %1
ret i32 %3
}
/* Variables and functions */
double HUGE_VAL;
bool is_negative_zero(double x) { return (1.0 / x == -HUGE_VAL); }


x86 assembly (clang, -O0):
<is_negative_zero>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
divsd  -0x8(%rbp),%xmm0
mov    0x2ecb(%rip),%rax
movsd  (%rax),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
ucomisd %xmm1,%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_negative_zero>:
movsd  0xef8(%rip),%xmm1
mov    0x2ed9(%rip),%rax
movsd  (%rax),%xmm2
xorpd  0xef5(%rip),%xmm2
divsd  %xmm0,%xmm1
cmpeqsd %xmm1,%xmm2
movq   %xmm2,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
@HUGE_VAL = global double 0.000000e+00
define i32 @is_negative_zero(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double 1.000000e+00, %3
%5 = load double, double* @HUGE_VAL
%6 = fneg double %5
%7 = fcmp oeq double %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
@HUGE_VAL = global double 0.000000e+00
define i32 @is_negative_zero(double %0) {
%2 = fdiv double 1.000000e+00, %0
%3 = load double, double* @HUGE_VAL
%4 = fneg double %3
%5 = fcmp oeq double %2, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int joe() {
  printf("joe\n");
  return 1;
}


x86 assembly (clang, -O0):
<joe>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<joe>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"joe\0A\00"
define i32 @joe() {
%1 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@str = [4 x i8] c"joe\00"
define i32 @joe() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @str, i64 0, i64 0))
ret i32 1
}
int char_to_int(unsigned char c[4]) {
  int i;
  i = c[0] * 256 * 256 * 256 + c[1] * 256 * 256 + c[2] * 256 + c[3];
  return i;
}


x86 assembly (clang, -O0):
<char_to_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
shl    $0x8,%eax
shl    $0x8,%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
shl    $0x8,%ecx
add    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x8,%ecx
add    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<char_to_int>:
mov    (%rdi),%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @char_to_int(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = mul nsw i32 %7, 256
%9 = mul nsw i32 %8, 256
%10 = mul nsw i32 %9, 256
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i64 1
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
%15 = mul nsw i32 %14, 256
%16 = mul nsw i32 %15, 256
%17 = add nsw i32 %10, %16
%18 = load i8*, i8** %2
%19 = getelementptr inbounds i8, i8* %18, i64 2
%20 = load i8, i8* %19
%21 = zext i8 %20 to i32
%22 = mul nsw i32 %21, 256
%23 = add nsw i32 %17, %22
%24 = load i8*, i8** %2
%25 = getelementptr inbounds i8, i8* %24, i64 3
%26 = load i8, i8* %25
%27 = zext i8 %26 to i32
%28 = add nsw i32 %23, %27
store i32 %28, i32* %3
%29 = load i32, i32* %3
ret i32 %29
}

LLVM IR (-O2):
define i32 @char_to_int(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = shl nuw nsw i32 %3, 24
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = shl nuw nsw i32 %7, 16
%9 = or i32 %8, %4
%10 = getelementptr inbounds i8, i8* %0, i64 2
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = shl nuw nsw i32 %12, 8
%14 = or i32 %9, %13
%15 = getelementptr inbounds i8, i8* %0, i64 3
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = or i32 %14, %17
ret i32 %18
}
/* Variables and functions */
unsigned int reg_read32(int);
int /*<<< orphan*/ reg_write32(int, unsigned int);
void pic_disablefiq(unsigned int fiq) {
  reg_write32(0x14000028, reg_read32(0x14000028) & ~fiq);
}


x86 assembly (clang, -O0):
<pic_disablefiq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x14000028,%edi
call   1030 <reg_read32@plt>
mov    %eax,%esi
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
and    %eax,%esi
mov    $0x14000028,%edi
call   1040 <reg_write32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pic_disablefiq>:
push   %rbx
mov    %edi,%ebx
mov    $0x14000028,%edi
call   1030 <reg_read32@plt>
not    %ebx
and    %eax,%ebx
mov    $0x14000028,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1040 <reg_write32@plt>

LLVM IR (-O0):
define void @pic_disablefiq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @reg_read32(i32 335544360)
%4 = load i32, i32* %2
%5 = xor i32 %4, -1
%6 = and i32 %3, %5
%7 = call i32 @reg_write32(i32 335544360, i32 %6)
ret void
}

LLVM IR (-O2):
define void @pic_disablefiq(i32 %0) {
%2 = tail call i32 @reg_read32(i32 335544360)
%3 = xor i32 %0, -1
%4 = and i32 %2, %3
%5 = tail call i32 @reg_write32(i32 335544360, i32 %4)
ret void
}
void clearEnv() {}


x86 assembly (clang, -O0):
<clearEnv>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clearEnv>:
ret

LLVM IR (-O0):
define void @clearEnv() {
ret void
}

LLVM IR (-O2):
define void @clearEnv() {
ret void
}
unsigned int igcd(unsigned int x, unsigned int y) {
  unsigned int r;
  if (y == 0)
    return x;
  while ((r = x % y) != 0)
    x = y, y = r;
  return y;
}


x86 assembly (clang, -O0):
<igcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    111f <igcd+0x1f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114f <igcd+0x4f>
jmp    1124 <igcd+0x24>
mov    -0x8(%rbp),%eax
xor    %edx,%edx
divl   -0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmp    $0x0,%edx
je     1149 <igcd+0x49>
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1124 <igcd+0x24>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<igcd>:
mov    %edi,%eax
test   %esi,%esi
je     111e <igcd+0x1e>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
xor    %edx,%edx
div    %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <igcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @igcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %22
11: ; preds = %2
br label %12
12: ; preds = %17, %11
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = urem i32 %13, %14
store i32 %15, i32* %6
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %12
%18 = load i32, i32* %5
store i32 %18, i32* %4
%19 = load i32, i32* %6
store i32 %19, i32* %5
br label %12
20: ; preds = %12
%21 = load i32, i32* %5
store i32 %21, i32* %3
br label %22
22: ; preds = %20, %9
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @igcd(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %6, %4 ], [ %0, %2 ]
%6 = phi i32 [ %7, %4 ], [ %1, %2 ]
%7 = urem i32 %5, %6
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %6, %4 ]
ret i32 %10
}
void cfree(ptr) void *ptr;
{ free(ptr); }


x86 assembly (clang, -O0):
<cfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfree>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @cfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @cfree(i8* nocapture %0) {
tail call void @free(i8* %0)
ret void
}
/* Type definitions */
struct pattern {
  int dummy;
};

/* Variables and functions */
int offset(int, int /*<<< orphan*/, int, int);
scalar_t__ owl_escape_value(int);
int autohelperowl_attackpat54(struct pattern *patt, int transformation,
                              int move, int color, int action) {
  int a;
  (void)patt;
  (void)color;
  (void)action;
  a = offset(-1, 0, move, transformation);
  return owl_escape_value(a) > 0;
}


x86 assembly (clang, -O0):
<autohelperowl_attackpat54>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x10(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    $0xffffffff,%edi
xor    %esi,%esi
call   1040 <offset@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%edi
call   1030 <owl_escape_value@plt>
cmp    $0x0,%rax
setg   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<autohelperowl_attackpat54>:
push   %rax
mov    %esi,%ecx
mov    $0xffffffff,%edi
xor    %esi,%esi
call   1040 <offset@plt>
mov    %eax,%edi
call   1030 <owl_escape_value@plt>
xor    %ecx,%ecx
test   %rax,%rax
setg   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.pattern = type { i32 }
define i32 @autohelperowl_attackpat54(%struct.pattern* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca %struct.pattern*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store %struct.pattern* %0, %struct.pattern** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%12 = load %struct.pattern*, %struct.pattern** %6
%13 = load i32, i32* %9
%14 = load i32, i32* %10
%15 = load i32, i32* %8
%16 = load i32, i32* %7
%17 = call i32 @offset(i32 -1, i32 0, i32 %15, i32 %16)
store i32 %17, i32* %11
%18 = load i32, i32* %11
%19 = call i64 @owl_escape_value(i32 %18)
%20 = icmp sgt i64 %19, 0
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
%struct.pattern = type { i32 }
define i32 @autohelperowl_attackpat54(%struct.pattern* nocapture readnone %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @offset(i32 -1, i32 0, i32 %2, i32 %1)
%7 = tail call i64 @owl_escape_value(i32 %6)
%8 = icmp sgt i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Type definitions */
struct wl_proxy {
  int dummy;
};
struct wl_data_device_listener {
  int dummy;
};
struct wl_data_device {
  int dummy;
};

/* Variables and functions */
int wl_proxy_add_listener(struct wl_proxy *, void (*)(), void *);
int wl_data_device_add_listener(struct wl_data_device *wl_data_device,
                                const struct wl_data_device_listener *listener,
                                void *data) {
  return wl_proxy_add_listener((struct wl_proxy *)wl_data_device,
                               (void (**)(void))listener, data);
}


x86 assembly (clang, -O0):
<wl_data_device_add_listener>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <wl_proxy_add_listener@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wl_data_device_add_listener>:
jmp    1030 <wl_proxy_add_listener@plt>

LLVM IR (-O0):
%struct.wl_data_device = type { i32 }
%struct.wl_data_device_listener = type { i32 }
%struct.wl_proxy = type { i32 }
define i32 @wl_data_device_add_listener(%struct.wl_data_device* %0, %struct.wl_data_device_listener* %1, i8* %2) {
%4 = alloca %struct.wl_data_device*
%5 = alloca %struct.wl_data_device_listener*
%6 = alloca i8*
store %struct.wl_data_device* %0, %struct.wl_data_device** %4
store %struct.wl_data_device_listener* %1, %struct.wl_data_device_listener** %5
store i8* %2, i8** %6
%7 = load %struct.wl_data_device*, %struct.wl_data_device** %4
%8 = bitcast %struct.wl_data_device* %7 to %struct.wl_proxy*
%9 = load %struct.wl_data_device_listener*, %struct.wl_data_device_listener** %5
%10 = bitcast %struct.wl_data_device_listener* %9 to void ()**
%11 = bitcast void ()** %10 to void (...)*
%12 = load i8*, i8** %6
%13 = call i32 @wl_proxy_add_listener(%struct.wl_proxy* %8, void (...)* %11, i8* %12)
ret i32 %13
}

LLVM IR (-O2):
%struct.wl_data_device = type { i32 }
%struct.wl_data_device_listener = type { i32 }
%struct.wl_proxy = type { i32 }
define i32 @wl_data_device_add_listener(%struct.wl_data_device* %0, %struct.wl_data_device_listener* %1, i8* %2) {
%4 = bitcast %struct.wl_data_device* %0 to %struct.wl_proxy*
%5 = bitcast %struct.wl_data_device_listener* %1 to void (...)*
%6 = tail call i32 @wl_proxy_add_listener(%struct.wl_proxy* %4, void (...)* %5, i8* %2)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void die_help() {
  fprintf(stderr, "\n"
                  "Options: \n"
                  "  -r bitrate_Hz\n"
                  "  -c channel_count\n"
                  "  -i input_file\n"
                  "  -s size of a single channel's sample (bytes)\n"
                  "  -n output file name (prepended with track number)\n");
  exit(1);
}


x86 assembly (clang, -O0):
<die_help>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<die_help>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [162 x i8] c"\0AOptions: \0A -r bitrate_Hz\0A -c channel_count\0A -i input_file\0A -s size of a single channel's sample (bytes)\0A -n output file name (prepended with track number)\0A\00"
define void @die_help() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [162 x i8] c"\0AOptions: \0A -r bitrate_Hz\0A -c channel_count\0A -i input_file\0A -s size of a single channel's sample (bytes)\0A -n output file name (prepended with track number)\0A\00"
define void @die_help() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int pigpio_command(int, int, unsigned int, int /*<<< orphan*/, int);
int serial_data_available(int pi, unsigned handle) {
  return pigpio_command(pi, 82, handle, 0, 1);
}


x86 assembly (clang, -O0):
<serial_data_available>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    $0x52,%esi
xor    %ecx,%ecx
mov    $0x1,%r8d
call   1030 <pigpio_command@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_data_available>:
mov    %esi,%edx
mov    $0x52,%esi
xor    %ecx,%ecx
mov    $0x1,%r8d
jmp    1030 <pigpio_command@plt>

LLVM IR (-O0):
define i32 @serial_data_available(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @pigpio_command(i32 %5, i32 82, i32 %6, i32 0, i32 1)
ret i32 %7
}

LLVM IR (-O2):
define i32 @serial_data_available(i32 %0, i32 %1) {
%3 = tail call i32 @pigpio_command(i32 %0, i32 82, i32 %1, i32 0, i32 1)
ret i32 %3
}
/* Variables and functions */
char *strndup(char const *, size_t);
char *strdup(const char *s) { return strndup(s, ~((size_t)0)); }


x86 assembly (clang, -O0):
<strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xffffffffffffffff,%rsi
call   1030 <strndup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdup>:
mov    $0xffffffffffffffff,%rsi
jmp    1030 <strndup@plt>

LLVM IR (-O0):
define i8* @strdup(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @strndup(i8* %3, i64 -1)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @strdup(i8* nocapture %0) {
%2 = tail call i8* @strndup(i8* %0, i64 -1)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ SysCtlClockSet(int);
void Init(void) {
  SysCtlClockSet(0x01C00000 | 0x00000000 | 0x00000000 | 0x00000380);
}


x86 assembly (clang, -O0):
<Init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1c00380,%edi
call   1030 <SysCtlClockSet@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Init>:
mov    $0x1c00380,%edi
jmp    1030 <SysCtlClockSet@plt>

LLVM IR (-O0):
define void @Init() {
%1 = call i32 @SysCtlClockSet(i32 29361024)
ret void
}

LLVM IR (-O2):
define void @Init() {
%1 = tail call i32 @SysCtlClockSet(i32 29361024)
ret void
}
__attribute__((always_)) void smp_mb__after_lock(void) {
  __asm__ __volatile__("" : : : "memory");
}


x86 assembly (clang, -O0):
<smp_mb__after_lock>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smp_mb__after_lock>:
ret

LLVM IR (-O0):
define void @smp_mb__after_lock() {
ret void
}

LLVM IR (-O2):
define void @smp_mb__after_lock() {
tail call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
int util_test_lib_func() { return 2 * 2; }


x86 assembly (clang, -O0):
<util_test_lib_func>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_test_lib_func>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @util_test_lib_func() {
ret i32 4
}

LLVM IR (-O2):
define i32 @util_test_lib_func() {
ret i32 4
}
char toUpper(char c) {
  if (c >= 'a' && c <= 'z')
    c = (char)(c - 'a' + 'A');
  return c;
}


x86 assembly (clang, -O0):
<toUpper>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x61,%eax
jl     1131 <toUpper+0x31>
movsbl -0x1(%rbp),%eax
cmp    $0x7a,%eax
jg     1131 <toUpper+0x31>
movsbl -0x1(%rbp),%eax
sub    $0x61,%eax
add    $0x41,%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<toUpper>:
lea    -0x61(%rdi),%eax
lea    -0x20(%rdi),%ecx
cmp    $0x1a,%al
movzbl %cl,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @toUpper(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %16
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 122
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = sub nsw i32 %12, 97
%14 = add nsw i32 %13, 65
%15 = trunc i32 %14 to i8
store i8 %15, i8* %2
br label %16
16: ; preds = %10, %6, %1
%17 = load i8, i8* %2
ret i8 %17
}

LLVM IR (-O2):
define signext i8 @toUpper(i8 signext %0) {
%2 = add i8 %0, -97
%3 = icmp ult i8 %2, 26
%4 = add i8 %0, -32
%5 = select i1 %3, i8 %4, i8 %0
ret i8 %5
}
int _check_region(const char *val) {
  return !(val[0] == val[1] && val[0] == '0');
}


x86 assembly (clang, -O0):
<_check_region>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
mov    -0x8(%rbp),%rax
movsbl 0x1(%rax),%edx
xor    %eax,%eax
cmp    %edx,%ecx
mov    %al,-0x9(%rbp)
jne    1134 <_check_region+0x34>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x30,%eax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_check_region>:
mov    (%rdi),%cl
mov    0x1(%rdi),%dl
xor    $0x30,%cl
xor    $0x30,%dl
xor    %eax,%eax
or     %cl,%dl
setne  %al
ret

LLVM IR (-O0):
define i32 @_check_region(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %6, %10
br i1 %11, label %12, label %18
12: ; preds = %1
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i64 0
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 48
br label %18
18: ; preds = %12, %1
%19 = phi i1 [ false, %1 ], [ %17, %12 ]
%20 = xor i1 %19, true
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
define i32 @_check_region(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = getelementptr inbounds i8, i8* %0, i64 1
%4 = load i8, i8* %3
%5 = icmp ne i8 %2, 48
%6 = icmp ne i8 %4, 48
%7 = or i1 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
void nseel_asm_mod_op_end(void) {}


x86 assembly (clang, -O0):
<nseel_asm_mod_op_end>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nseel_asm_mod_op_end>:
ret

LLVM IR (-O0):
define void @nseel_asm_mod_op_end() {
ret void
}

LLVM IR (-O2):
define void @nseel_asm_mod_op_end() {
ret void
}
void ptrace_sandbox_permit_mremap(struct pt_sandbox *p_sandbox) {
  (void)p_sandbox;
}


x86 assembly (clang, -O0):
<ptrace_sandbox_permit_mremap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptrace_sandbox_permit_mremap>:
ret

LLVM IR (-O0):
%struct.pt_sandbox = type opaque
define void @ptrace_sandbox_permit_mremap(%struct.pt_sandbox* %0) {
%2 = alloca %struct.pt_sandbox*
store %struct.pt_sandbox* %0, %struct.pt_sandbox** %2
%3 = load %struct.pt_sandbox*, %struct.pt_sandbox** %2
ret void
}

LLVM IR (-O2):
%struct.pt_sandbox = type opaque
define void @ptrace_sandbox_permit_mremap(%struct.pt_sandbox* nocapture %0) {
ret void
}
/* Variables and functions */
int hfind_nl(char *buf, size_t len) {
  int i;
  for (i = 1; i <= (int)len; i++)
    if (*buf++ == '\n')
      return (i);
  return (len);
}


x86 assembly (clang, -O0):
<hfind_nl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movl   $0x1,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    -0x18(%rbp),%rcx
cmp    %ecx,%eax
jg     115b <hfind_nl+0x5b>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
cmp    $0xa,%eax
jne    1148 <hfind_nl+0x48>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1162 <hfind_nl+0x62>
jmp    114d <hfind_nl+0x4d>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1113 <hfind_nl+0x13>
mov    -0x18(%rbp),%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hfind_nl>:
mov    %rsi,%rax
test   %eax,%eax
jle    111e <hfind_nl+0x1e>
xor    %ecx,%ecx
nopl   0x0(%rax)
cmpb   $0xa,(%rdi,%rcx,1)
je     111f <hfind_nl+0x1f>
add    $0x1,%rcx
cmp    %ecx,%eax
jne    1110 <hfind_nl+0x10>
ret
add    $0x1,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @hfind_nl(i8* %0, i64 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32
store i8* %0, i8** %4
store i64 %1, i64* %5
store i32 1, i32* %6
br label %7
7: ; preds = %21, %2
%8 = load i32, i32* %6
%9 = load i64, i64* %5
%10 = trunc i64 %9 to i32
%11 = icmp sle i32 %8, %10
br i1 %11, label %12, label %24
12: ; preds = %7
%13 = load i8*, i8** %4
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %4
%15 = load i8, i8* %13
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 10
br i1 %17, label %18, label %20
18: ; preds = %12
%19 = load i32, i32* %6
store i32 %19, i32* %3
br label %27
20: ; preds = %12
br label %21
21: ; preds = %20
%22 = load i32, i32* %6
%23 = add nsw i32 %22, 1
store i32 %23, i32* %6
br label %7
24: ; preds = %7
%25 = load i64, i64* %5
%26 = trunc i64 %25 to i32
store i32 %26, i32* %3
br label %27
27: ; preds = %24, %18
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @hfind_nl(i8* nocapture %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = icmp slt i32 %3, 1
br i1 %4, label %14, label %5
5: ; preds = %2, %10
%6 = phi i32 [ %12, %10 ], [ 1, %2 ]
%7 = phi i8* [ %11, %10 ], [ %0, %2 ]
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, 10
br i1 %9, label %14, label %10
10: ; preds = %5
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = add nuw i32 %6, 1
%13 = icmp eq i32 %6, %3
br i1 %13, label %14, label %5
14: ; preds = %5, %10, %2
%15 = phi i32 [ %3, %2 ], [ %6, %5 ], [ %3, %10 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void printHelp(char *progname) {
  fprintf(stderr,
          "Solver for %s problem. Options:\n"
          "\t-h    \tThis help.\n"
          "\t-l    \tLoop detection (default: no).\n"
          "\t-u    \tMake updates (default: no).\n"
          "\t-i <n>\tSolve the problem with # max impasses = <n> (default: "
          "2*h(s_0)).\n"
          "\t-m <n>\tMax minutes to run (default: 30).\n"
          "\t-N <n>\tBuffer size (default: 1000).\n"
          "\t-r <n>\tSet the random seed to <n> (default: 100).\n",
          progname);
  exit(0);
}


x86 assembly (clang, -O0):
<printHelp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<printHelp>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [329 x i8] c"Solver for %s problem. Options:\0A\09-h \09This help.\0A\09-l \09Loop detection (default: no).\0A\09-u \09Make updates (default: no).\0A\09-i <n>\09Solve the problem with # max impasses = <n> (default: 2*h(s_0)).\0A\09-m <n>\09Max minutes to run (default: 30).\0A\09-N <n>\09Buffer size (default: 1000).\0A\09-r <n>\09Set the random seed to <n> (default: 100).\0A\00"
define void @printHelp(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([329 x i8], [329 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [329 x i8] c"Solver for %s problem. Options:\0A\09-h \09This help.\0A\09-l \09Loop detection (default: no).\0A\09-u \09Make updates (default: no).\0A\09-i <n>\09Solve the problem with # max impasses = <n> (default: 2*h(s_0)).\0A\09-m <n>\09Max minutes to run (default: 30).\0A\09-N <n>\09Buffer size (default: 1000).\0A\09-r <n>\09Set the random seed to <n> (default: 100).\0A\00"
define void @printHelp(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([329 x i8], [329 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ errno;
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
char *strerror(int /*<<< orphan*/);
void print_err() {
  printf("Error: %s\n", strerror(errno));
  exit(-2);
}


x86 assembly (clang, -O0):
<print_err>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
mov    %rax,%rsi
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
mov    $0xfffffffe,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<print_err>:
push   %rax
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
lea    0xeba(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
mov    $0xfffffffe,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"Error: %s\0A\00"
@errno = global i32 0
define void @print_err() {
%1 = load i32, i32* @errno
%2 = call i8* @strerror(i32 %1)
%3 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = call i32 @exit(i32 -2)
unreachable
}

LLVM IR (-O2):
@.str = [11 x i8] c"Error: %s\0A\00"
@errno = global i32 0
define void @print_err() {
%1 = load i32, i32* @errno
%2 = tail call i8* @strerror(i32 %1)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = tail call i32 @exit(i32 -2)
unreachable
}
__attribute__((always_, unused)) void
ips_clear_bit(int nr, volatile unsigned long *addr) {
  asm volatile("lock "
               "btrl %1,%0"
               : "=m"(*addr)
               : "dIr"(nr));
}


x86 assembly (clang, -O0):
<ips_clear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
lock btr %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ips_clear_bit>:
lock btr %edi,(%rsi)
ret

LLVM IR (-O0):
define void @ips_clear_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
%6 = load i32, i32* %3
ret void
}

LLVM IR (-O2):
define void @ips_clear_bit(i32 %0, i64* %1) {
tail call void asm sideeffect "lock btrl $1,$0", "=*m,{dx}Ir,~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %1, i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_format_info_free() {
  printf("NOT IMPLEMENTED:"
         "pa_format_info_free"
         "\n");
}


x86 assembly (clang, -O0):
<pa_format_info_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_format_info_free>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"NOT IMPLEMENTED:pa_format_info_free\0A\00"
define i32 @pa_format_info_free() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [36 x i8] c"NOT IMPLEMENTED:pa_format_info_free\00"
define i32 @pa_format_info_free() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
void a4() {}


x86 assembly (clang, -O0):
<a4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<a4>:
ret

LLVM IR (-O0):
define void @a4() {
ret void
}

LLVM IR (-O2):
define void @a4() {
ret void
}
/* Variables and functions */
int httpRespCode(int, char *);
int httpRedirectUrl(char *uri, int code) {
  if (code != 301)
    code = 302;
  return httpRespCode(code, uri);
}


x86 assembly (clang, -O0):
<httpRedirectUrl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x12d,-0xc(%rbp)
je     1133 <httpRedirectUrl+0x23>
movl   $0x12e,-0xc(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%rsi
call   1030 <httpRespCode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<httpRedirectUrl>:
mov    %rdi,%rax
xor    %ecx,%ecx
cmp    $0x12d,%esi
sete   %cl
mov    $0x12e,%edi
sub    %ecx,%edi
mov    %rax,%rsi
jmp    1030 <httpRespCode@plt>

LLVM IR (-O0):
define i32 @httpRedirectUrl(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 301
br i1 %6, label %7, label %8
7: ; preds = %2
store i32 302, i32* %4
br label %8
8: ; preds = %7, %2
%9 = load i32, i32* %4
%10 = load i8*, i8** %3
%11 = call i32 @httpRespCode(i32 %9, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @httpRedirectUrl(i8* %0, i32 %1) {
%3 = icmp eq i32 %1, 301
%4 = select i1 %3, i32 301, i32 302
%5 = tail call i32 @httpRespCode(i32 %4, i8* %0)
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ socklen_t;
typedef int /*<<< orphan*/ __SOCKADDR_ARG;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int __libc_accept4(int fd, __SOCKADDR_ARG addr, socklen_t *addr_len,
                   int flags) {
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<__libc_accept4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    0x2ebc(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__libc_accept4>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @__libc_accept4(i32 %0, i32 %1, i32* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32 %3, i32* %8
%9 = load i32, i32* @ENOSYS
%10 = call i32 @__set_errno(i32 %9)
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @__libc_accept4(i32 %0, i32 %1, i32* nocapture readnone %2, i32 %3) {
%5 = load i32, i32* @ENOSYS
%6 = tail call i32 @__set_errno(i32 %5)
ret i32 -1
}
/* Type definitions */
typedef int /*<<< orphan*/ size;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int *, unsigned char const *, int);
int unpackValueInt(unsigned char const **data) {
  int size;
  memcpy(&size, *data, sizeof(size));
  *data += sizeof(size);
  return size;
}


x86 assembly (clang, -O0):
<unpackValueInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rsi
lea    -0xc(%rbp),%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x4,%rcx
mov    %rcx,(%rax)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unpackValueInt>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    (%rdi),%rsi
lea    0xc(%rsp),%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
addq   $0x4,(%rbx)
mov    0xc(%rsp),%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @unpackValueInt(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
%6 = call i32 @memcpy(i32* %3, i8* %5, i32 4)
%7 = load i8**, i8*** %2
%8 = load i8*, i8** %7
%9 = getelementptr inbounds i8, i8* %8, i64 4
store i8* %9, i8** %7
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @unpackValueInt(i8** nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = load i8*, i8** %0
%5 = call i32 @memcpy(i32* %2, i8* %4, i32 4)
%6 = load i8*, i8** %0
%7 = getelementptr inbounds i8, i8* %6, i64 4
store i8* %7, i8** %0
%8 = load i32, i32* %2
ret i32 %8
}
int fifo_mod(int n) { return (n >= 1024) ? n - 1024 : n; }


x86 assembly (clang, -O0):
<fifo_mod>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x400,-0x4(%rbp)
jl     1124 <fifo_mod+0x24>
mov    -0x4(%rbp),%eax
sub    $0x400,%eax
mov    %eax,-0x8(%rbp)
jmp    112a <fifo_mod+0x2a>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fifo_mod>:
lea    -0x400(%rdi),%eax
cmp    $0x400,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @fifo_mod(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 1024
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = sub nsw i32 %6, 1024
br label %10
8: ; preds = %1
%9 = load i32, i32* %2
br label %10
10: ; preds = %8, %5
%11 = phi i32 [ %7, %5 ], [ %9, %8 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @fifo_mod(i32 %0) {
%2 = icmp sgt i32 %0, 1023
%3 = add nsw i32 %0, -1024
%4 = select i1 %2, i32 %3, i32 %0
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ cl_int;
typedef scalar_t__ cl_event;

/* Variables and functions */
int /*<<< orphan*/ syscall(int, int, unsigned int *);
cl_int clRetainEvent(cl_event event) {
  unsigned int sys_args[1];
  sys_args[0] = (unsigned int)event;
  return (cl_int)syscall(325, 1046, sys_args);
}


x86 assembly (clang, -O0):
<clRetainEvent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,-0xc(%rbp)
lea    -0xc(%rbp),%rdx
mov    $0x145,%edi
mov    $0x416,%esi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clRetainEvent>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rdx
mov    $0x145,%edi
mov    $0x416,%esi
call   1030 <syscall@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @clRetainEvent(i64 %0) {
%2 = alloca i64
%3 = alloca [1 x i32]
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = trunc i64 %4 to i32
%6 = getelementptr inbounds [1 x i32], [1 x i32]* %3, i64 0, i64 0
store i32 %5, i32* %6
%7 = getelementptr inbounds [1 x i32], [1 x i32]* %3, i64 0, i64 0
%8 = call i32 @syscall(i32 325, i32 1046, i32* %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @clRetainEvent(i64 %0) {
%2 = alloca [1 x i32]
%3 = bitcast [1 x i32]* %2 to i8*
%4 = trunc i64 %0 to i32
%5 = getelementptr inbounds [1 x i32], [1 x i32]* %2, i64 0, i64 0
store i32 %4, i32* %5
%6 = call i32 @syscall(i32 325, i32 1046, i32* %5)
ret i32 %6
}
/* Variables and functions */
char *strdup(char const *);
int /*<<< orphan*/ xalloc_die();
char *xstrdup(const char *s) {
  char *p;
  if (!(p = strdup(s))) {
    xalloc_die();
  }
  return p;
}


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strdup@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    114a <xstrdup+0x2a>
mov    $0x0,%al
call   1030 <xalloc_die@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
push   %rbx
call   1040 <strdup@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1135 <xstrdup+0x15>
xor    %eax,%eax
call   1030 <xalloc_die@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strdup(i8* %4)
store i8* %5, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = call i32 (...) @xalloc_die()
br label %9
9: ; preds = %7, %1
%10 = load i8*, i8** %3
ret i8* %10
}

LLVM IR (-O2):
define noalias i8* @xstrdup(i8* nocapture %0) {
%2 = tail call i8* @strdup(i8* %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 (...) @xalloc_die()
br label %6
6: ; preds = %4, %1
ret i8* %2
}
int test_imm_33uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x33 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_33uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x33,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_33uint64_lowword_reg>:
test   $0x33,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_33uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 51
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_33uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 51
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ outsb(unsigned int, void *, unsigned long);
void nsp_multi_write_1(unsigned int BaseAddr, unsigned int Register, void *buf,
                       unsigned long count) {
  outsb(BaseAddr + Register, buf, count);
}


x86 assembly (clang, -O0):
<nsp_multi_write_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
add    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <outsb@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nsp_multi_write_1>:
add    %esi,%edi
mov    %rdx,%rsi
mov    %rcx,%rdx
jmp    1030 <outsb@plt>

LLVM IR (-O0):
define void @nsp_multi_write_1(i32 %0, i32 %1, i8* %2, i64 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i64
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = add i32 %9, %10
%12 = load i8*, i8** %7
%13 = load i64, i64* %8
%14 = call i32 @outsb(i32 %11, i8* %12, i64 %13)
ret void
}

LLVM IR (-O2):
define void @nsp_multi_write_1(i32 %0, i32 %1, i8* %2, i64 %3) {
%5 = add i32 %1, %0
%6 = tail call i32 @outsb(i32 %5, i8* %2, i64 %3)
ret void
}
/* Variables and functions */
int DeleteKey(int);
int DeleteProcess(int pid) { return DeleteKey(pid); }


x86 assembly (clang, -O0):
<DeleteProcess>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <DeleteKey@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DeleteProcess>:
jmp    1030 <DeleteKey@plt>

LLVM IR (-O0):
define i32 @DeleteProcess(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @DeleteKey(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @DeleteProcess(i32 %0) {
%2 = tail call i32 @DeleteKey(i32 %0)
ret i32 %2
}
int do_274() { return 274; }


x86 assembly (clang, -O0):
<do_274>:
push   %rbp
mov    %rsp,%rbp
mov    $0x112,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_274>:
mov    $0x112,%eax
ret

LLVM IR (-O0):
define i32 @do_274() {
ret i32 274
}

LLVM IR (-O2):
define i32 @do_274() {
ret i32 274
}
int valid_bo(value)
long value;
{
  switch (value & 0x14) {
  default:
  case 0:
    return 1;
  case 0x4:
    return (value & 0x2) == 0;
  case 0x10:
    return (value & 0x8) == 0;
  case 0x14:
    return value == 0x14;
  }
}


x86 assembly (clang, -O0):
<valid_bo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x14,%eax
mov    %rax,-0x18(%rbp)
sub    $0x14,%rax
ja     1131 <valid_bo+0x31>
mov    -0x18(%rbp),%rax
lea    0xed8(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
jmp    1136 <valid_bo+0x36>
movl   $0x1,-0x4(%rbp)
jmp    118a <valid_bo+0x8a>
mov    -0x10(%rbp),%rax
and    $0x2,%rax
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    118a <valid_bo+0x8a>
mov    -0x10(%rbp),%rax
and    $0x8,%rax
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    118a <valid_bo+0x8a>
cmpq   $0x14,-0x10(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<valid_bo>:
mov    %rdi,%rcx
shr    $0x2,%rcx
and    $0x5,%ecx
mov    $0x1,%al
lea    0xeed(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
test   $0x2,%dil
jmp    112c <valid_bo+0x2c>
cmp    $0x14,%rdi
jmp    112c <valid_bo+0x2c>
test   $0x8,%dil
sete   %al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @valid_bo(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = and i64 %4, 20
switch i64 %5, label %6 [
i64 0, label %7
i64 4, label %8
i64 16, label %13
i64 20, label %18
]
6: ; preds = %1
br label %7
7: ; preds = %1, %6
store i32 1, i32* %2
br label %22
8: ; preds = %1
%9 = load i64, i64* %3
%10 = and i64 %9, 2
%11 = icmp eq i64 %10, 0
%12 = zext i1 %11 to i32
store i32 %12, i32* %2
br label %22
13: ; preds = %1
%14 = load i64, i64* %3
%15 = and i64 %14, 8
%16 = icmp eq i64 %15, 0
%17 = zext i1 %16 to i32
store i32 %17, i32* %2
br label %22
18: ; preds = %1
%19 = load i64, i64* %3
%20 = icmp eq i64 %19, 20
%21 = zext i1 %20 to i32
store i32 %21, i32* %2
br label %22
22: ; preds = %18, %13, %8, %7
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @valid_bo(i64 %0) {
%2 = lshr i64 %0, 2
%3 = and i64 %2, 5
switch i64 %3, label %4 [
i64 0, label %13
i64 1, label %5
i64 4, label %8
i64 5, label %11
]
4: ; preds = %1
unreachable
5: ; preds = %1
%6 = and i64 %0, 2
%7 = icmp eq i64 %6, 0
br label %13
8: ; preds = %1
%9 = and i64 %0, 8
%10 = icmp eq i64 %9, 0
br label %13
11: ; preds = %1
%12 = icmp eq i64 %0, 20
br label %13
13: ; preds = %1, %11, %8, %5
%14 = phi i1 [ %12, %11 ], [ %10, %8 ], [ %7, %5 ], [ true, %1 ]
%15 = zext i1 %14 to i32
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int /*<<< orphan*/);
unsigned long I2CIntNumberGet(unsigned long);
int /*<<< orphan*/ I2CMasterBaseValid(unsigned long);
int /*<<< orphan*/ IntEnable(unsigned long);
int /*<<< orphan*/ IntRegister(unsigned long, void (*)());
void I2CIntRegister(unsigned long ulBase, void (*pfnHandler)(void)) {
  unsigned long ulInt;
  DEBUG_ASSERT(I2CMasterBaseValid(ulBase));
  ulInt = I2CIntNumberGet(ulBase);
  IntRegister(ulInt, pfnHandler);
  IntEnable(ulInt);
}


x86 assembly (clang, -O0):
<I2CIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <I2CMasterBaseValid@plt>
mov    %eax,%edi
call   1070 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rdi
call   1040 <I2CIntNumberGet@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1060 <IntRegister@plt>
mov    -0x18(%rbp),%rdi
call   1030 <IntEnable@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CIntRegister>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1050 <I2CMasterBaseValid@plt>
mov    %eax,%edi
call   1070 <DEBUG_ASSERT@plt>
mov    %rbx,%rdi
call   1040 <I2CIntNumberGet@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1060 <IntRegister@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @I2CIntRegister(i64 %0, void ()* %1) {
%3 = alloca i64
%4 = alloca void ()*
%5 = alloca i64
store i64 %0, i64* %3
store void ()* %1, void ()** %4
%6 = load i64, i64* %3
%7 = call i32 @I2CMasterBaseValid(i64 %6)
%8 = call i32 @DEBUG_ASSERT(i32 %7)
%9 = load i64, i64* %3
%10 = call i64 @I2CIntNumberGet(i64 %9)
store i64 %10, i64* %5
%11 = load i64, i64* %5
%12 = load void ()*, void ()** %4
%13 = bitcast void ()* %12 to void (...)*
%14 = call i32 @IntRegister(i64 %11, void (...)* %13)
%15 = load i64, i64* %5
%16 = call i32 @IntEnable(i64 %15)
ret void
}

LLVM IR (-O2):
define void @I2CIntRegister(i64 %0, void ()* %1) {
%3 = tail call i32 @I2CMasterBaseValid(i64 %0)
%4 = tail call i32 @DEBUG_ASSERT(i32 %3)
%5 = tail call i64 @I2CIntNumberGet(i64 %0)
%6 = bitcast void ()* %1 to void (...)*
%7 = tail call i32 @IntRegister(i64 %5, void (...)* %6)
%8 = tail call i32 @IntEnable(i64 %5)
ret void
}
char f3(char c) { return -(c & 63) & 31; }


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
and    $0x3f,%ecx
xor    %eax,%eax
sub    %ecx,%eax
and    $0x1f,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
mov    %edi,%eax
neg    %al
and    $0x1f,%al
ret

LLVM IR (-O0):
define signext i8 @f3(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 63
%6 = sub nsw i32 0, %5
%7 = and i32 %6, 31
%8 = trunc i32 %7 to i8
ret i8 %8
}

LLVM IR (-O2):
define signext i8 @f3(i8 signext %0) {
%2 = sub i8 0, %0
%3 = and i8 %2, 31
ret i8 %3
}