xunge/DecIR huggingface dataset:
int encryption_before_mount(struct fstab *fstab) { return 0; }


x86 assembly (clang, -O0):
<encryption_before_mount>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<encryption_before_mount>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.fstab = type opaque
define i32 @encryption_before_mount(%struct.fstab* %0) {
%2 = alloca %struct.fstab*
store %struct.fstab* %0, %struct.fstab** %2
ret i32 0
}

LLVM IR (-O2):
%struct.fstab = type opaque
define i32 @encryption_before_mount(%struct.fstab* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
scalar_t__ malloc(int);
int /*<<< orphan*/ mergeSort2(int *, int, int, int *);
void mergeSort(int *array, int begining, int end) {
  int length_new_array = end - begining + 1;
  int *aux_array = (int *)malloc(length_new_array * sizeof(int));
  mergeSort2(array, begining, end, aux_array);
  free(aux_array);
}


x86 assembly (clang, -O0):
<mergeSort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
sub    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
movslq -0x14(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x20(%rbp),%rcx
call   1040 <mergeSort2@plt>
mov    -0x20(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mergeSort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r15d
mov    %esi,%ebp
mov    %rdi,%r14
mov    %edx,%eax
sub    %esi,%eax
lea    0x4(,%rax,4),%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %r14,%rdi
mov    %ebp,%esi
mov    %r15d,%edx
mov    %rax,%rcx
call   1040 <mergeSort2@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @mergeSort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32*
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i32, i32* %6
%10 = load i32, i32* %5
%11 = sub nsw i32 %9, %10
%12 = add nsw i32 %11, 1
store i32 %12, i32* %7
%13 = load i32, i32* %7
%14 = sext i32 %13 to i64
%15 = mul i64 %14, 4
%16 = trunc i64 %15 to i32
%17 = call i64 @malloc(i32 %16)
%18 = inttoptr i64 %17 to i32*
store i32* %18, i32** %8
%19 = load i32*, i32** %4
%20 = load i32, i32* %5
%21 = load i32, i32* %6
%22 = load i32*, i32** %8
%23 = call i32 @mergeSort2(i32* %19, i32 %20, i32 %21, i32* %22)
%24 = load i32*, i32** %8
%25 = call i32 @free(i32* %24)
ret void
}

LLVM IR (-O2):
define void @mergeSort(i32* %0, i32 %1, i32 %2) {
%4 = sub nsw i32 %2, %1
%5 = shl i32 %4, 2
%6 = add i32 %5, 4
%7 = tail call i64 @malloc(i32 %6)
%8 = inttoptr i64 %7 to i32*
%9 = tail call i32 @mergeSort2(i32* %0, i32 %1, i32 %2, i32* %8)
%10 = tail call i32 @free(i32* %8)
ret void
}
int test_imm_EAuint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0xEA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_EAuint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0xea,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_EAuint64_midword_reg>:
test   $0xea0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_EAuint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 234
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_EAuint64_midword_reg(i64 %0) {
%2 = and i64 %0, 15335424
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void rule_neural_cond_cover(const struct XCSF *xcsf, const struct Cl *c,
                            const double *x) {
  (void)xcsf;
  (void)c;
  (void)x;
}


x86 assembly (clang, -O0):
<rule_neural_cond_cover>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rule_neural_cond_cover>:
ret

LLVM IR (-O0):
%struct.XCSF = type opaque
%struct.Cl = type opaque
define void @rule_neural_cond_cover(%struct.XCSF* %0, %struct.Cl* %1, double* %2) {
%4 = alloca %struct.XCSF*
%5 = alloca %struct.Cl*
%6 = alloca double*
store %struct.XCSF* %0, %struct.XCSF** %4
store %struct.Cl* %1, %struct.Cl** %5
store double* %2, double** %6
%7 = load %struct.XCSF*, %struct.XCSF** %4
%8 = load %struct.Cl*, %struct.Cl** %5
%9 = load double*, double** %6
ret void
}

LLVM IR (-O2):
%struct.XCSF = type opaque
%struct.Cl = type opaque
define void @rule_neural_cond_cover(%struct.XCSF* nocapture %0, %struct.Cl* nocapture %1, double* nocapture %2) {
ret void
}
void X509_NAME_free(void) {}


x86 assembly (clang, -O0):
<X509_NAME_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_NAME_free>:
ret

LLVM IR (-O0):
define void @X509_NAME_free() {
ret void
}

LLVM IR (-O2):
define void @X509_NAME_free() {
ret void
}
void init_bench() {}


x86 assembly (clang, -O0):
<init_bench>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_bench>:
ret

LLVM IR (-O0):
define void @init_bench() {
ret void
}

LLVM IR (-O2):
define void @init_bench() {
ret void
}
int lmn_gen_ruleset_id() {
  static int ruleset_next_id = 1;
  return ruleset_next_id++;
}


x86 assembly (clang, -O0):
<lmn_gen_ruleset_id>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f16(%rip),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,0x2f0b(%rip)
pop    %rbp
ret

x86 assembly (clang, -O2):
<lmn_gen_ruleset_id>:
mov    0x2f1a(%rip),%eax
lea    0x1(%rax),%ecx
mov    %ecx,0x2f11(%rip)
ret

LLVM IR (-O0):
@lmn_gen_ruleset_id.ruleset_next_id = internal global i32 1
define i32 @lmn_gen_ruleset_id() {
%1 = load i32, i32* @lmn_gen_ruleset_id.ruleset_next_id
%2 = add nsw i32 %1, 1
store i32 %2, i32* @lmn_gen_ruleset_id.ruleset_next_id
ret i32 %1
}

LLVM IR (-O2):
@lmn_gen_ruleset_id.ruleset_next_id = internal unnamed_addr global i32 1
define i32 @lmn_gen_ruleset_id() {
%1 = load i32, i32* @lmn_gen_ruleset_id.ruleset_next_id
%2 = add nsw i32 %1, 1
store i32 %2, i32* @lmn_gen_ruleset_id.ruleset_next_id
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ merge(int *, int, int, int);
void mergesort(int arr[], int left, int right) {
  if (right > left) {
    int mid = (left + right) / 2;
    mergesort(arr, left, mid);
    mergesort(arr, mid + 1, right);
    merge(arr, left, right, mid);
  }
}


x86 assembly (clang, -O0):
<mergesort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1182 <mergesort+0x62>
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1040 <mergesort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <mergesort@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x14(%rbp),%ecx
call   1030 <merge@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mergesort>:
cmp    %esi,%edx
jle    1172 <mergesort+0x52>
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %esi,%r12d
mov    %rdi,%r15
lea    (%r14,%r12,1),%eax
mov    %eax,%ebx
shr    $0x1f,%ebx
add    %eax,%ebx
sar    %ebx
mov    %ebx,%edx
call   1040 <mergesort@plt>
lea    0x1(%rbx),%esi
mov    %r15,%rdi
mov    %r14d,%edx
call   1040 <mergesort@plt>
mov    %r15,%rdi
mov    %r12d,%esi
mov    %r14d,%edx
mov    %ebx,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <merge@plt>
ret

LLVM IR (-O0):
define void @mergesort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = icmp sgt i32 %8, %9
br i1 %10, label %11, label %28
11: ; preds = %3
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = add nsw i32 %12, %13
%15 = sdiv i32 %14, 2
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = load i32*, i32** %4
%20 = load i32, i32* %7
%21 = add nsw i32 %20, 1
%22 = load i32, i32* %6
%23 = load i32*, i32** %4
%24 = load i32, i32* %5
%25 = load i32, i32* %6
%26 = load i32, i32* %7
%27 = call i32 @merge(i32* %23, i32 %24, i32 %25, i32 %26)
br label %28
28: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @mergesort(i32* %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %2, %1
br i1 %4, label %6, label %5
5: ; preds = %3, %6
ret void
6: ; preds = %3
%7 = add nsw i32 %2, %1
%8 = sdiv i32 %7, 2
tail call void @mergesort(i32* %0, i32 %1, i32 %8)
%9 = add nsw i32 %8, 1
tail call void @mergesort(i32* %0, i32 %9, i32 %2)
%10 = tail call i32 @merge(i32* %0, i32 %1, i32 %2, i32 %8)
br label %5
}
/* Variables and functions */
char *addColor(char *, char *);
char *cyan(char *str) { return addColor("36", str); }


x86 assembly (clang, -O0):
<cyan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <addColor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cyan>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <addColor@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"36\00"
define i8* @cyan(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @addColor(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i8* %4
}

LLVM IR (-O2):
@.str = [3 x i8] c"36\00"
define i8* @cyan(i8* %0) {
%2 = tail call i8* @addColor(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i8* %2
}
void enableLCDDisplay(void) {
  (*(volatile unsigned int *)(0x77100000)) |= 3;
  (*(volatile unsigned int *)(0x77100020)) |= 1;
  return;
}


x86 assembly (clang, -O0):
<enableLCDDisplay>:
push   %rbp
mov    %rsp,%rbp
mov    $0x77100000,%eax
mov    (%rax),%ecx
or     $0x3,%ecx
mov    $0x77100000,%eax
mov    %ecx,(%rax)
mov    $0x77100020,%eax
mov    (%rax),%ecx
or     $0x1,%ecx
mov    $0x77100020,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<enableLCDDisplay>:
orl    $0x3,0x77100000
03
orl    $0x1,0x77100020
01
ret

LLVM IR (-O0):
define void @enableLCDDisplay() {
%1 = load volatile i32, i32* inttoptr (i64 1997537280 to i32*)
%2 = or i32 %1, 3
store volatile i32 %2, i32* inttoptr (i64 1997537280 to i32*)
%3 = load volatile i32, i32* inttoptr (i64 1997537312 to i32*)
%4 = or i32 %3, 1
store volatile i32 %4, i32* inttoptr (i64 1997537312 to i32*)
ret void
}

LLVM IR (-O2):
define void @enableLCDDisplay() {
%1 = load volatile i32, i32* inttoptr (i64 1997537280 to i32*)
%2 = or i32 %1, 3
store volatile i32 %2, i32* inttoptr (i64 1997537280 to i32*)
%3 = load volatile i32, i32* inttoptr (i64 1997537312 to i32*)
%4 = or i32 %3, 1
store volatile i32 %4, i32* inttoptr (i64 1997537312 to i32*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ isdigit(int);
int all_digit(const char *str) {
  for (; *str != '\0'; str++)
    if (!isdigit((int)*str))
      return 0;
  return 1;
}


x86 assembly (clang, -O0):
<all_digit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1163 <all_digit+0x53>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%eax
jne    114d <all_digit+0x3d>
movl   $0x0,-0x4(%rbp)
jmp    116a <all_digit+0x5a>
jmp    1152 <all_digit+0x42>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    111c <all_digit+0xc>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<all_digit>:
mov    (%rdi),%cl
mov    $0x1,%eax
test   %cl,%cl
je     1126 <all_digit+0x26>
add    $0x1,%rdi
nop
movsbl %cl,%ecx
add    $0xffffffd0,%ecx
cmp    $0xa,%ecx
jae    1127 <all_digit+0x27>
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <all_digit+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @all_digit(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %17, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %20
9: ; preds = %4
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = call i32 @isdigit(i32 %12)
%14 = icmp ne i32 %13, 0
br i1 %14, label %16, label %15
15: ; preds = %9
store i32 0, i32* %2
br label %21
16: ; preds = %9
br label %17
17: ; preds = %16
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
br label %4
20: ; preds = %4
store i32 1, i32* %2
br label %21
21: ; preds = %20, %15
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @all_digit(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %7
4: ; preds = %7
%5 = load i8, i8* %13
%6 = icmp eq i8 %5, 0
br i1 %6, label %14, label %7
7: ; preds = %1, %4
%8 = phi i8 [ %5, %4 ], [ %2, %1 ]
%9 = phi i8* [ %13, %4 ], [ %0, %1 ]
%10 = sext i8 %8 to i32
%11 = add nsw i32 %10, -48
%12 = icmp ult i32 %11, 10
%13 = getelementptr inbounds i8, i8* %9, i64 1
br i1 %12, label %4, label %14
14: ; preds = %7, %4, %1
%15 = phi i32 [ 1, %1 ], [ 1, %4 ], [ 0, %7 ]
ret i32 %15
}
long fun_a(unsigned long x) {
  long val = 0;
  while (x) {
    val ^= x;
    x >>= 1;
  }
  return val & 1;
}


x86 assembly (clang, -O0):
<fun_a>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1138 <fun_a+0x38>
mov    -0x8(%rbp),%rax
xor    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1110 <fun_a+0x10>
mov    -0x10(%rbp),%rax
and    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_a>:
xor    %eax,%eax
test   %rdi,%rdi
je     1122 <fun_a+0x22>
mov    %rdi,%rcx
nopw   0x0(%rax,%rax,1)
xor    %rdi,%rax
shr    %rcx
cmp    $0x1,%rdi
mov    %rcx,%rdi
ja     1110 <fun_a+0x10>
and    $0x1,%eax
ret

LLVM IR (-O0):
define i64 @fun_a(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
store i64 0, i64* %3
br label %4
4: ; preds = %7, %1
%5 = load i64, i64* %2
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i64, i64* %2
%9 = load i64, i64* %3
%10 = xor i64 %9, %8
store i64 %10, i64* %3
%11 = load i64, i64* %2
%12 = lshr i64 %11, 1
store i64 %12, i64* %2
br label %4
13: ; preds = %4
%14 = load i64, i64* %3
%15 = and i64 %14, 1
ret i64 %15
}

LLVM IR (-O2):
define i64 @fun_a(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %6, %3 ], [ 0, %1 ]
%5 = phi i64 [ %7, %3 ], [ %0, %1 ]
%6 = xor i64 %4, %5
%7 = lshr i64 %5, 1
%8 = icmp ult i64 %5, 2
br i1 %8, label %9, label %3
9: ; preds = %3
%10 = and i64 %6, 1
br label %11
11: ; preds = %9, %1
%12 = phi i64 [ 0, %1 ], [ %10, %9 ]
ret i64 %12
}
/* Type definitions */
struct timespec {
  int tv_sec;
  long tv_nsec;
};

/* Variables and functions */
void double_to_timespec(double d, struct timespec *ts) {
  ts->tv_sec = (int)d;
  ts->tv_nsec = (long)(1000000000.0 * (d - ts->tv_sec));
  return;
}


x86 assembly (clang, -O0):
<double_to_timespec>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
cvttsd2si -0x8(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
movsd  -0x8(%rbp),%xmm1
mov    -0x10(%rbp),%rax
cvtsi2sdl (%rax),%xmm0
subsd  %xmm0,%xmm1
movsd  0xecf(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<double_to_timespec>:
cvttsd2si %xmm0,%eax
cvttpd2dq %xmm0,%xmm1
cvtdq2pd %xmm1,%xmm1
subsd  %xmm1,%xmm0
mulsd  0xee8(%rip),%xmm0
mov    %eax,(%rdi)
cvttsd2si %xmm0,%rax
mov    %rax,0x8(%rdi)
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i64 }
define void @double_to_timespec(double %0, %struct.timespec* %1) {
%3 = alloca double
%4 = alloca %struct.timespec*
store double %0, double* %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load double, double* %3
%6 = fptosi double %5 to i32
%7 = load %struct.timespec*, %struct.timespec** %4
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %7, i32 0, i32 0
store i32 %6, i32* %8
%9 = load double, double* %3
%10 = load %struct.timespec*, %struct.timespec** %4
%11 = getelementptr inbounds %struct.timespec, %struct.timespec* %10, i32 0, i32 0
%12 = load i32, i32* %11
%13 = sitofp i32 %12 to double
%14 = fsub double %9, %13
%15 = fmul double 1.000000e+09, %14
%16 = fptosi double %15 to i64
%17 = load %struct.timespec*, %struct.timespec** %4
%18 = getelementptr inbounds %struct.timespec, %struct.timespec* %17, i32 0, i32 1
store i64 %16, i64* %18
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i64 }
define void @double_to_timespec(double %0, %struct.timespec* nocapture writeonly %1) {
%3 = fptosi double %0 to i32
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
store i32 %3, i32* %4
%5 = sitofp i32 %3 to double
%6 = fsub double %0, %5
%7 = fmul double %6, 1.000000e+09
%8 = fptosi double %7 to i64
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
store i64 %8, i64* %9
ret void
}
/* Variables and functions */
int /*<<< orphan*/ h2o__fatal(char *);
void *malloc(size_t);
void *h2o_mem_alloc(size_t sz) {
  void *p = malloc(sz);
  if (p == NULL)
    h2o__fatal("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/tamediadigital/h2o/refs/"
               "heads/master/include/h2o/memory.h"
               ":"
               "312"
               ":"
               "no memory");
  return p;
}


x86 assembly (clang, -O0):
<h2o_mem_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <h2o_mem_alloc+0x30>
lea    0xeb5(%rip),%rdi
call   1030 <h2o__fatal@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h2o_mem_alloc>:
push   %rbx
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <h2o_mem_alloc+0x1a>
lea    0xecb(%rip),%rdi
call   1030 <h2o__fatal@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/tamediadigital/h2o/refs/heads/master/include/h2o/memory.h:312:no memory\00"
define i8* @h2o_mem_alloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @h2o__fatal(i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/tamediadigital/h2o/refs/heads/master/include/h2o/memory.h:312:no memory\00"
define noalias i8* @h2o_mem_alloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @h2o__fatal(i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ sleep(int);
int main() {
  int i = 1;
  for (i = 0; i < 1000; i++) {
    printf("i=%d\n", i);
    sleep(1);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x3e8,-0x8(%rbp)
jge    1171 <main+0x51>
mov    -0x8(%rbp),%esi
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <sleep@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    113d <main+0x1d>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xed3(%rip),%r14
nopl   (%rax)
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <sleep@plt>
add    $0x1,%ebx
cmp    $0x3e8,%ebx
jne    1130 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [6 x i8] c"i=%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
store i32 0, i32* %2
br label %3
3: ; preds = %10, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 1000
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = load i32, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = call i32 @sleep(i32 1)
br label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %3
13: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"i=%d\0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %5, %1 ]
%3 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = tail call i32 @sleep(i32 1)
%5 = add nuw nsw i32 %2, 1
%6 = icmp eq i32 %5, 1000
br i1 %6, label %7, label %1
7: ; preds = %1
ret i32 0
}
void outportl(unsigned short port, unsigned long data) {
  __asm__ __volatile__("outl %%eax, %%dx" : : "d"(port), "a"(data));
}


x86 assembly (clang, -O0):
<outportl>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x2(%rbp),%dx
mov    -0x10(%rbp),%rax
out    %eax,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outportl>:
mov    %rsi,%rax
mov    %edi,%edx
out    %eax,(%dx)
ret

LLVM IR (-O0):
define void @outportl(i16 zeroext %0, i64 %1) {
%3 = alloca i16
%4 = alloca i64
store i16 %0, i16* %3
store i64 %1, i64* %4
%5 = load i16, i16* %3
%6 = load i64, i64* %4
ret void
}

LLVM IR (-O2):
define void @outportl(i16 zeroext %0, i64 %1) {
tail call void asm sideeffect "outl %eax, %dx", "{dx},{ax},~{dirflag},~{fpsr},~{flags}"(i16 %0, i64 %1)
ret void
}
void swap(int *x, int *y) {
  *x = *x ^ *y;
  *y = *y ^ *x;
  *x = *x ^ *y;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
xor    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
xor    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
xor    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rsi),%eax
xor    (%rdi),%eax
mov    %eax,(%rdi)
xor    (%rsi),%eax
mov    %eax,(%rsi)
xor    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = xor i32 %6, %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32*, i32** %4
%12 = load i32, i32* %11
%13 = load i32*, i32** %3
%14 = load i32, i32* %13
%15 = xor i32 %12, %14
%16 = load i32*, i32** %4
store i32 %15, i32* %16
%17 = load i32*, i32** %3
%18 = load i32, i32* %17
%19 = load i32*, i32** %4
%20 = load i32, i32* %19
%21 = xor i32 %18, %20
%22 = load i32*, i32** %3
store i32 %21, i32* %22
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = xor i32 %4, %3
store i32 %5, i32* %0
%6 = load i32, i32* %1
%7 = xor i32 %6, %5
store i32 %7, i32* %1
%8 = load i32, i32* %0
%9 = xor i32 %8, %7
store i32 %9, i32* %0
ret void
}
unsigned int cmpfunc(const void *a, const void *b) {
  return (*(unsigned int *)a - *(unsigned int *)b);
}


x86 assembly (clang, -O0):
<cmpfunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmpfunc>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @cmpfunc(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @cmpfunc(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub i32 %4, %6
ret i32 %7
}
int test_imm_4Auint32_mem(unsigned int *val) {
  return ((*val) & (0x4A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_4Auint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x4a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_4Auint32_mem>:
testb  $0x4a,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_4Auint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 74
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_4Auint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 74
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct target {
  int dummy;
};
struct dm_interface {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ DM_STATUS_TABLE_FLAG;
int status_cmd(struct dm_interface *, char const *, struct target **,
               int /*<<< orphan*/);
int dm_table(struct dm_interface *dmi, const char *name,
             struct target **targets) {
  return status_cmd(dmi, name, targets, DM_STATUS_TABLE_FLAG);
}


x86 assembly (clang, -O0):
<dm_table>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    0x2eb1(%rip),%rax
mov    (%rax),%ecx
call   1030 <status_cmd@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dm_table>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%ecx
jmp    1030 <status_cmd@plt>

LLVM IR (-O0):
%struct.dm_interface = type { i32 }
%struct.target = type { i32 }
@DM_STATUS_TABLE_FLAG = global i32 0
define i32 @dm_table(%struct.dm_interface* %0, i8* %1, %struct.target** %2) {
%4 = alloca %struct.dm_interface*
%5 = alloca i8*
%6 = alloca %struct.target**
store %struct.dm_interface* %0, %struct.dm_interface** %4
store i8* %1, i8** %5
store %struct.target** %2, %struct.target*** %6
%7 = load %struct.dm_interface*, %struct.dm_interface** %4
%8 = load i8*, i8** %5
%9 = load %struct.target**, %struct.target*** %6
%10 = load i32, i32* @DM_STATUS_TABLE_FLAG
%11 = call i32 @status_cmd(%struct.dm_interface* %7, i8* %8, %struct.target** %9, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
%struct.dm_interface = type { i32 }
%struct.target = type { i32 }
@DM_STATUS_TABLE_FLAG = global i32 0
define i32 @dm_table(%struct.dm_interface* %0, i8* %1, %struct.target** %2) {
%4 = load i32, i32* @DM_STATUS_TABLE_FLAG
%5 = tail call i32 @status_cmd(%struct.dm_interface* %0, i8* %1, %struct.target** %2, i32 %4)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ strcat(char *, char *);
int /*<<< orphan*/ strcpy(char *, char *);
void strcatMia(char *dest, char *src1, char *src2) {
  strcpy(dest, "");
  strcpy(dest, src1);
  strcat(dest, src2);
}


x86 assembly (clang, -O0):
<strcatMia>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec1(%rip),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <strcat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcatMia>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
lea    0xecb(%rip),%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <strcat@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define void @strcatMia(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = call i32 @strcpy(i8* %7, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%9 = load i8*, i8** %4
%10 = load i8*, i8** %5
%11 = call i32 @strcpy(i8* %9, i8* %10)
%12 = load i8*, i8** %4
%13 = load i8*, i8** %6
%14 = call i32 @strcat(i8* %12, i8* %13)
ret void
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define void @strcatMia(i8* %0, i8* %1, i8* %2) {
%4 = tail call i32 @strcpy(i8* %0, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 @strcpy(i8* %0, i8* %1)
%6 = tail call i32 @strcat(i8* %0, i8* %2)
ret void
}
/* Variables and functions */
int rand();
int randomRange(int min, int max) { return rand() % (max - min + 1) + min; }


x86 assembly (clang, -O0):
<randomRange>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randomRange>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
sub    %ebp,%ebx
add    $0x1,%ebx
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @randomRange(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @rand()
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = add nsw i32 %8, 1
%10 = srem i32 %5, %9
%11 = load i32, i32* %3
%12 = add nsw i32 %10, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @randomRange(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = sub i32 1, %0
%5 = add i32 %4, %1
%6 = srem i32 %3, %5
%7 = add nsw i32 %6, %0
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printArr(int *, int);
int /*<<< orphan*/ quickSort(int *, int /*<<< orphan*/, int);
int main() {
  int arr[] = {10, 4, 2, 23, 18};
  quickSort(arr, 0, 5);
  printArr(arr, 5);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xec5(%rip),%eax
mov    %eax,-0x10(%rbp)
lea    -0x20(%rbp),%rdi
xor    %esi,%esi
mov    $0x5,%edx
call   1040 <quickSort@plt>
lea    -0x20(%rbp),%rdi
mov    $0x5,%esi
call   1030 <printArr@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x20,%rsp
mov    0xee5(%rip),%eax
mov    %eax,0x10(%rsp)
movaps 0xeca(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
xor    %esi,%esi
mov    $0x5,%edx
call   1040 <quickSort@plt>
mov    %rbx,%rdi
mov    $0x5,%esi
call   1030 <printArr@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.arr = [5 x i32] [i32 10, i32 4, i32 2, i32 23, i32 18]
define i32 @main() {
%1 = alloca i32
%2 = alloca [5 x i32]
store i32 0, i32* %1
%3 = bitcast [5 x i32]* %2 to i8*
%4 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%5 = call i32 @quickSort(i32* %4, i32 0, i32 5)
%6 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%7 = call i32 @printArr(i32* %6, i32 5)
ret i32 0
}

LLVM IR (-O2):
@__const.main.arr = [5 x i32] [i32 10, i32 4, i32 2, i32 23, i32 18]
define i32 @main() {
%1 = alloca [5 x i32]
%2 = bitcast [5 x i32]* %1 to i8*
%3 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%4 = call i32 @quickSort(i32* %3, i32 0, i32 5)
%5 = call i32 @printArr(i32* %3, i32 5)
ret i32 0
}
/* Variables and functions */
int PAPI_reset(int);
void PAPIF_RESET(int *EventSet, int *check) { *check = PAPI_reset(*EventSet); }


x86 assembly (clang, -O0):
<PAPIF_RESET>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <PAPI_reset@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PAPIF_RESET>:
push   %rbx
mov    %rsi,%rbx
mov    (%rdi),%edi
call   1030 <PAPI_reset@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @PAPIF_RESET(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = call i32 @PAPI_reset(i32 %6)
%8 = load i32*, i32** %4
store i32 %7, i32* %8
ret void
}

LLVM IR (-O2):
define void @PAPIF_RESET(i32* nocapture %0, i32* nocapture writeonly %1) {
%3 = load i32, i32* %0
%4 = tail call i32 @PAPI_reset(i32 %3)
store i32 %4, i32* %1
ret void
}
unsigned int ceil_shift_mul(unsigned int a, unsigned int b) {
  return ((((a) + (1 << (b)) - 1) >> (b)) << (b));
}


x86 assembly (clang, -O0):
<ceil_shift_mul>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
sub    $0x1,%eax
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceil_shift_mul>:
mov    %esi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
add    %edi,%eax
add    $0xffffffff,%eax
shr    %cl,%eax
shl    %cl,%eax
ret

LLVM IR (-O0):
define i32 @ceil_shift_mul(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 1, %6
%8 = add i32 %5, %7
%9 = sub i32 %8, 1
%10 = load i32, i32* %4
%11 = lshr i32 %9, %10
%12 = load i32, i32* %4
%13 = shl i32 %11, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @ceil_shift_mul(i32 %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = add i32 %0, -1
%5 = add i32 %4, %3
%6 = shl nsw i32 -1, %1
%7 = and i32 %5, %6
ret i32 %7
}
int test_imm_90int16_reg(short val) {
  return ((val) & (0x90 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_90int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x90,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_90int16_reg>:
test   $0x90,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_90int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 144
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_90int16_reg(i16 signext %0) {
%2 = and i16 %0, 144
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void simdpreparefpu(void) {}


x86 assembly (clang, -O0):
<simdpreparefpu>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<simdpreparefpu>:
ret

LLVM IR (-O0):
define void @simdpreparefpu() {
ret void
}

LLVM IR (-O2):
define void @simdpreparefpu() {
ret void
}
double fatorial(double n) {
  double r = 1, f;
  for (f = 1; f <= n; f++) {
    r = r * f;
  }
  return r;
}


x86 assembly (clang, -O0):
<fatorial>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xee2(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jb     115d <fatorial+0x5d>
movsd  -0x10(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xeb2(%rip),%xmm0
addsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1123 <fatorial+0x23>
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fatorial>:
movsd  0xef8(%rip),%xmm1
ucomisd %xmm1,%xmm0
jb     112e <fatorial+0x2e>
movsd  0xeea(%rip),%xmm2
movapd %xmm2,%xmm3
movapd %xmm2,%xmm1
xchg   %ax,%ax
mulsd  %xmm3,%xmm1
addsd  %xmm2,%xmm3
ucomisd %xmm3,%xmm0
jae    1120 <fatorial+0x20>
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @fatorial(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %2
store double 1.000000e+00, double* %3
store double 1.000000e+00, double* %4
br label %5
5: ; preds = %13, %1
%6 = load double, double* %4
%7 = load double, double* %2
%8 = fcmp ole double %6, %7
br i1 %8, label %9, label %16
9: ; preds = %5
%10 = load double, double* %3
%11 = load double, double* %4
%12 = fmul double %10, %11
store double %12, double* %3
br label %13
13: ; preds = %9
%14 = load double, double* %4
%15 = fadd double %14, 1.000000e+00
store double %15, double* %4
br label %5
16: ; preds = %5
%17 = load double, double* %3
ret double %17
}

LLVM IR (-O2):
define double @fatorial(double %0) {
%2 = fcmp ult double %0, 1.000000e+00
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi double [ %7, %3 ], [ 1.000000e+00, %1 ]
%5 = phi double [ %6, %3 ], [ 1.000000e+00, %1 ]
%6 = fmul double %5, %4
%7 = fadd double %4, 1.000000e+00
%8 = fcmp ugt double %7, %0
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi double [ 1.000000e+00, %1 ], [ %6, %3 ]
ret double %10
}
/* Variables and functions */
int /*<<< orphan*/ ClockInit();
int /*<<< orphan*/ HwwdtDisable();
void SystemInit(void) {
  HwwdtDisable();
  ClockInit();
}


x86 assembly (clang, -O0):
<SystemInit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <HwwdtDisable@plt>
mov    $0x0,%al
call   1030 <ClockInit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SystemInit>:
push   %rax
xor    %eax,%eax
call   1040 <HwwdtDisable@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <ClockInit@plt>

LLVM IR (-O0):
define void @SystemInit() {
%1 = call i32 (...) @HwwdtDisable()
%2 = call i32 (...) @ClockInit()
ret void
}

LLVM IR (-O2):
define void @SystemInit() {
%1 = tail call i32 (...) @HwwdtDisable()
%2 = tail call i32 (...) @ClockInit()
ret void
}
void soru_4(int dizi[], int N) {}


x86 assembly (clang, -O0):
<soru_4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<soru_4>:
ret

LLVM IR (-O0):
define void @soru_4(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @soru_4(i32* nocapture %0, i32 %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ WINDOW;

/* Variables and functions */
int /*<<< orphan*/ delwin(int /*<<< orphan*/ *);
void yatzy_ui_scoreboard_destroy(WINDOW *win) { delwin(win); }


x86 assembly (clang, -O0):
<yatzy_ui_scoreboard_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <delwin@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yatzy_ui_scoreboard_destroy>:
jmp    1030 <delwin@plt>

LLVM IR (-O0):
define void @yatzy_ui_scoreboard_destroy(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @delwin(i32* %3)
ret void
}

LLVM IR (-O2):
define void @yatzy_ui_scoreboard_destroy(i32* %0) {
%2 = tail call i32 @delwin(i32* %0)
ret void
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ defineclutter();
int /*<<< orphan*/ definedoors();
int /*<<< orphan*/ defineroom();
int /*<<< orphan*/ defineroomfile();
int makeroom(void) {
  defineroom();
  definedoors();
  defineclutter();
  defineroomfile();
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<makeroom>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <defineroom@plt>
mov    $0x0,%al
call   1060 <definedoors@plt>
mov    $0x0,%al
call   1050 <defineclutter@plt>
mov    $0x0,%al
call   1040 <defineroomfile@plt>
mov    0x2e79(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<makeroom>:
push   %rax
xor    %eax,%eax
call   1030 <defineroom@plt>
xor    %eax,%eax
call   1060 <definedoors@plt>
xor    %eax,%eax
call   1050 <defineclutter@plt>
xor    %eax,%eax
call   1040 <defineroomfile@plt>
mov    0x2e7c(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @makeroom() {
%1 = call i32 (...) @defineroom()
%2 = call i32 (...) @definedoors()
%3 = call i32 (...) @defineclutter()
%4 = call i32 (...) @defineroomfile()
%5 = load i32, i32* @EXIT_SUCCESS
ret i32 %5
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @makeroom() {
%1 = tail call i32 (...) @defineroom()
%2 = tail call i32 (...) @definedoors()
%3 = tail call i32 (...) @defineclutter()
%4 = tail call i32 (...) @defineroomfile()
%5 = load i32, i32* @EXIT_SUCCESS
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ m5_util(int /*<<< orphan*/, int /*<<< orphan*/ *);
int /*<<< orphan*/ usage();
void do_util(int argc, char *argv[]) {
  if (argc < 1)
    usage();
  uint64_t *callno = (uint64_t *)argv[0];
  m5_util(*callno, NULL);
}


x86 assembly (clang, -O0):
<do_util>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x4(%rbp)
jge    1140 <do_util+0x20>
mov    $0x0,%al
call   1030 <usage@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%edi
xor    %eax,%eax
mov    %eax,%esi
call   1040 <m5_util@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_util>:
push   %rbx
mov    %rsi,%rbx
test   %edi,%edi
jg     112f <do_util+0xf>
xor    %eax,%eax
call   1030 <usage@plt>
mov    (%rbx),%rax
mov    (%rax),%edi
xor    %esi,%esi
pop    %rbx
jmp    1040 <m5_util@plt>

LLVM IR (-O0):
define void @do_util(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32*
store i32 %0, i32* %3
store i8** %1, i8*** %4
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 1
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 (...) @usage()
br label %10
10: ; preds = %8, %2
%11 = load i8**, i8*** %4
%12 = getelementptr inbounds i8*, i8** %11, i64 0
%13 = load i8*, i8** %12
%14 = bitcast i8* %13 to i32*
store i32* %14, i32** %5
%15 = load i32*, i32** %5
%16 = load i32, i32* %15
%17 = call i32 @m5_util(i32 %16, i32* null)
ret void
}

LLVM IR (-O2):
define void @do_util(i32 %0, i8** nocapture %1) {
%3 = icmp slt i32 %0, 1
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 (...) @usage()
br label %6
6: ; preds = %4, %2
%7 = bitcast i8** %1 to i32**
%8 = load i32*, i32** %7
%9 = load i32, i32* %8
%10 = tail call i32 @m5_util(i32 %9, i32* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Hello GitHub\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hello GitHub\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [13 x i8] c"Hello GitHub\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret i32 0
}
void gtk_scrolled_window_get_policy() {}


x86 assembly (clang, -O0):
<gtk_scrolled_window_get_policy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_scrolled_window_get_policy>:
ret

LLVM IR (-O0):
define void @gtk_scrolled_window_get_policy() {
ret void
}

LLVM IR (-O2):
define void @gtk_scrolled_window_get_policy() {
ret void
}
void __writel(unsigned int val, void *addr) {
  *(volatile unsigned int *)addr = val;
}


x86 assembly (clang, -O0):
<__writel>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__writel>:
mov    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @__writel(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i32*
store volatile i32 %5, i32* %7
ret void
}

LLVM IR (-O2):
define void @__writel(i32 %0, i8* %1) {
%3 = bitcast i8* %1 to i32*
store volatile i32 %0, i32* %3
ret void
}
int rfbi_init(void) { return 0; }


x86 assembly (clang, -O0):
<rfbi_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rfbi_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @rfbi_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @rfbi_init() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printk(char *);
void portabook_ext_cleanup_module(void) {
  printk("portabook_ext is unloaded!\n");
}


x86 assembly (clang, -O0):
<portabook_ext_cleanup_module>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printk@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<portabook_ext_cleanup_module>:
lea    0xee9(%rip),%rdi
jmp    1030 <printk@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"portabook_ext is unloaded!\0A\00"
define void @portabook_ext_cleanup_module() {
%1 = call i32 @printk(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c"portabook_ext is unloaded!\0A\00"
define void @portabook_ext_cleanup_module() {
%1 = tail call i32 @printk(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
ret void
}