void pnx833x_gpio_setup_irq(int when, unsigned int pin) {
  switch (when) {
  case 1:
    do {
      ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                     0xF020))) &= ~(1 << (pin)));
    } while (0);
    do {
      ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                     0xF024))) &= ~(1 << (pin)));
    } while (0);
    do {
      ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                     0xF028))) |= (1 << (pin)));
    } while (0);
    break;
  case 2:
    do {
      ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                     0xF020))) &= ~(1 << (pin)));
    } while (0);
    do {
      ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                     0xF024))) |= (1 << (pin)));
    } while (0);
    do {
      ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                     0xF028))) &= ~(1 << (pin)));
    } while (0);
    break;
  case 3:
    do {
      ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                     0xF020))) |= (1 << (pin)));
    } while (0);
    do {
      ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                     0xF024))) |= (1 << (pin)));
    } while (0);
    do {
      ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                     0xF028))) &= ~(1 << (pin)));
    } while (0);
    break;
  case 4:
    do {
      ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                     0xF020))) |= (1 << (pin)));
    } while (0);
    do {
      ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                     0xF024))) &= ~(1 << (pin)));
    } while (0);
    do {
      ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                     0xF028))) |= (1 << (pin)));
    } while (0);
    break;
  case 5:
    do {
      ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                     0xF020))) |= (1 << (pin)));
    } while (0);
    do {
      ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                     0xF024))) |= (1 << (pin)));
    } while (0);
    do {
      ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                     0xF028))) |= (1 << (pin)));
    } while (0);
    break;
  default:
    do {
      ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                     0xF020))) &= ~(1 << (pin)));
    } while (0);
    do {
      ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                     0xF024))) &= ~(1 << (pin)));
    } while (0);
    do {
      ((*((volatile unsigned long *)((0xa0000000ul + 0x17E00000ul) +
                                     0xF028))) &= ~(1 << (pin)));
    } while (0);
    break;
  }
}


x86 assembly (clang, -O0):
<pnx833x_gpio_setup_irq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x4,%eax
ja     137a <pnx833x_gpio_setup_irq+0x27a>
mov    -0x10(%rbp),%rax
lea    0xed6(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
jmp    1138 <pnx833x_gpio_setup_irq+0x38>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
cltq
mov    $0xb7e0f020,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0xb7e0f020,%eax
mov    %rcx,(%rax)
jmp    115f <pnx833x_gpio_setup_irq+0x5f>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
cltq
mov    $0xb7e0f024,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0xb7e0f024,%eax
mov    %rcx,(%rax)
jmp    1186 <pnx833x_gpio_setup_irq+0x86>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    $0xb7e0f028,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0xb7e0f028,%eax
mov    %rcx,(%rax)
jmp    13f4 <pnx833x_gpio_setup_irq+0x2f4>
jmp    11af <pnx833x_gpio_setup_irq+0xaf>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
cltq
mov    $0xb7e0f020,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0xb7e0f020,%eax
mov    %rcx,(%rax)
jmp    11d6 <pnx833x_gpio_setup_irq+0xd6>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    $0xb7e0f024,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0xb7e0f024,%eax
mov    %rcx,(%rax)
jmp    11fa <pnx833x_gpio_setup_irq+0xfa>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
cltq
mov    $0xb7e0f028,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0xb7e0f028,%eax
mov    %rcx,(%rax)
jmp    13f4 <pnx833x_gpio_setup_irq+0x2f4>
jmp    1226 <pnx833x_gpio_setup_irq+0x126>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    $0xb7e0f020,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0xb7e0f020,%eax
mov    %rcx,(%rax)
jmp    124a <pnx833x_gpio_setup_irq+0x14a>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    $0xb7e0f024,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0xb7e0f024,%eax
mov    %rcx,(%rax)
jmp    126e <pnx833x_gpio_setup_irq+0x16e>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
cltq
mov    $0xb7e0f028,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0xb7e0f028,%eax
mov    %rcx,(%rax)
jmp    13f4 <pnx833x_gpio_setup_irq+0x2f4>
jmp    129a <pnx833x_gpio_setup_irq+0x19a>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    $0xb7e0f020,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0xb7e0f020,%eax
mov    %rcx,(%rax)
jmp    12be <pnx833x_gpio_setup_irq+0x1be>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
cltq
mov    $0xb7e0f024,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0xb7e0f024,%eax
mov    %rcx,(%rax)
jmp    12e5 <pnx833x_gpio_setup_irq+0x1e5>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    $0xb7e0f028,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0xb7e0f028,%eax
mov    %rcx,(%rax)
jmp    13f4 <pnx833x_gpio_setup_irq+0x2f4>
jmp    130e <pnx833x_gpio_setup_irq+0x20e>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    $0xb7e0f020,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0xb7e0f020,%eax
mov    %rcx,(%rax)
jmp    1332 <pnx833x_gpio_setup_irq+0x232>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    $0xb7e0f024,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0xb7e0f024,%eax
mov    %rcx,(%rax)
jmp    1356 <pnx833x_gpio_setup_irq+0x256>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    $0xb7e0f028,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0xb7e0f028,%eax
mov    %rcx,(%rax)
jmp    13f4 <pnx833x_gpio_setup_irq+0x2f4>
jmp    137f <pnx833x_gpio_setup_irq+0x27f>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
cltq
mov    $0xb7e0f020,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0xb7e0f020,%eax
mov    %rcx,(%rax)
jmp    13a6 <pnx833x_gpio_setup_irq+0x2a6>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
cltq
mov    $0xb7e0f024,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0xb7e0f024,%eax
mov    %rcx,(%rax)
jmp    13cd <pnx833x_gpio_setup_irq+0x2cd>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
cltq
mov    $0xb7e0f028,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0xb7e0f028,%eax
mov    %rcx,(%rax)
jmp    13f4 <pnx833x_gpio_setup_irq+0x2f4>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pnx833x_gpio_setup_irq>:
mov    %esi,%ecx
mov    $0xb7e0f020,%eax
add    $0xffffffff,%edi
cmp    $0x4,%edi
ja     113f <pnx833x_gpio_setup_irq+0x3f>
lea    0xeea(%rip),%rdx
movslq (%rdx,%rdi,4),%rsi
add    %rdx,%rsi
jmp    *%rsi
mov    $0x1,%edx
shl    %cl,%edx
mov    $0xfffffffe,%esi
rol    %cl,%esi
movslq %esi,%rcx
and    %rcx,(%rax)
and    %rcx,0x4(%rax)
movslq %edx,%rdx
jmp    11c1 <pnx833x_gpio_setup_irq+0xc1>
mov    $0xfffffffe,%edx
rol    %cl,%edx
movslq %edx,%rdx
and    %rdx,(%rax)
and    %rdx,0x4(%rax)
jmp    118a <pnx833x_gpio_setup_irq+0x8a>
mov    $0x1,%esi
shl    %cl,%esi
mov    $0xfffffffe,%edx
rol    %cl,%edx
movslq %edx,%rdx
and    %rdx,(%rax)
movslq %esi,%rcx
or     %rcx,0x4(%rax)
jmp    118a <pnx833x_gpio_setup_irq+0x8a>
mov    $0x1,%edx
shl    %cl,%edx
movslq %edx,%rdx
or     %rdx,(%rax)
or     %rdx,0x4(%rax)
mov    $0xfffffffe,%edx
rol    %cl,%edx
movslq %edx,%rdx
and    0x8(%rax),%rdx
mov    %rdx,0x8(%rax)
ret
mov    $0x1,%edx
shl    %cl,%edx
movslq %edx,%rdx
or     %rdx,(%rax)
mov    $0xfffffffe,%esi
rol    %cl,%esi
movslq %esi,%rcx
and    %rcx,0x4(%rax)
jmp    11c1 <pnx833x_gpio_setup_irq+0xc1>
mov    $0x1,%edx
shl    %cl,%edx
movslq %edx,%rdx
or     %rdx,(%rax)
or     %rdx,0x4(%rax)
or     0x8(%rax),%rdx
mov    %rdx,0x8(%rax)
ret

LLVM IR (-O0):
define void @pnx833x_gpio_setup_irq(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
switch i32 %5, label %122 [
i32 1, label %6
i32 2, label %30
i32 3, label %54
i32 4, label %77
i32 5, label %100
]
6: ; preds = %2
br label %7
7: ; preds = %6
%8 = load i32, i32* %4
%9 = shl i32 1, %8
%10 = xor i32 %9, -1
%11 = sext i32 %10 to i64
%12 = load volatile i64, i64* inttoptr (i64 3084972064 to i64*)
%13 = and i64 %12, %11
store volatile i64 %13, i64* inttoptr (i64 3084972064 to i64*)
br label %14
14: ; preds = %7
br label %15
15: ; preds = %14
%16 = load i32, i32* %4
%17 = shl i32 1, %16
%18 = xor i32 %17, -1
%19 = sext i32 %18 to i64
%20 = load volatile i64, i64* inttoptr (i64 3084972068 to i64*)
%21 = and i64 %20, %19
store volatile i64 %21, i64* inttoptr (i64 3084972068 to i64*)
br label %22
22: ; preds = %15
br label %23
23: ; preds = %22
%24 = load i32, i32* %4
%25 = shl i32 1, %24
%26 = sext i32 %25 to i64
%27 = load volatile i64, i64* inttoptr (i64 3084972072 to i64*)
%28 = or i64 %27, %26
store volatile i64 %28, i64* inttoptr (i64 3084972072 to i64*)
br label %29
29: ; preds = %23
br label %147
30: ; preds = %2
br label %31
31: ; preds = %30
%32 = load i32, i32* %4
%33 = shl i32 1, %32
%34 = xor i32 %33, -1
%35 = sext i32 %34 to i64
%36 = load volatile i64, i64* inttoptr (i64 3084972064 to i64*)
%37 = and i64 %36, %35
store volatile i64 %37, i64* inttoptr (i64 3084972064 to i64*)
br label %38
38: ; preds = %31
br label %39
39: ; preds = %38
%40 = load i32, i32* %4
%41 = shl i32 1, %40
%42 = sext i32 %41 to i64
%43 = load volatile i64, i64* inttoptr (i64 3084972068 to i64*)
%44 = or i64 %43, %42
store volatile i64 %44, i64* inttoptr (i64 3084972068 to i64*)
br label %45
45: ; preds = %39
br label %46
46: ; preds = %45
%47 = load i32, i32* %4
%48 = shl i32 1, %47
%49 = xor i32 %48, -1
%50 = sext i32 %49 to i64
%51 = load volatile i64, i64* inttoptr (i64 3084972072 to i64*)
%52 = and i64 %51, %50
store volatile i64 %52, i64* inttoptr (i64 3084972072 to i64*)
br label %53
53: ; preds = %46
br label %147
54: ; preds = %2
br label %55
55: ; preds = %54
%56 = load i32, i32* %4
%57 = shl i32 1, %56
%58 = sext i32 %57 to i64
%59 = load volatile i64, i64* inttoptr (i64 3084972064 to i64*)
%60 = or i64 %59, %58
store volatile i64 %60, i64* inttoptr (i64 3084972064 to i64*)
br label %61
61: ; preds = %55
br label %62
62: ; preds = %61
%63 = load i32, i32* %4
%64 = shl i32 1, %63
%65 = sext i32 %64 to i64
%66 = load volatile i64, i64* inttoptr (i64 3084972068 to i64*)
%67 = or i64 %66, %65
store volatile i64 %67, i64* inttoptr (i64 3084972068 to i64*)
br label %68
68: ; preds = %62
br label %69
69: ; preds = %68
%70 = load i32, i32* %4
%71 = shl i32 1, %70
%72 = xor i32 %71, -1
%73 = sext i32 %72 to i64
%74 = load volatile i64, i64* inttoptr (i64 3084972072 to i64*)
%75 = and i64 %74, %73
store volatile i64 %75, i64* inttoptr (i64 3084972072 to i64*)
br label %76
76: ; preds = %69
br label %147
77: ; preds = %2
br label %78
78: ; preds = %77
%79 = load i32, i32* %4
%80 = shl i32 1, %79
%81 = sext i32 %80 to i64
%82 = load volatile i64, i64* inttoptr (i64 3084972064 to i64*)
%83 = or i64 %82, %81
store volatile i64 %83, i64* inttoptr (i64 3084972064 to i64*)
br label %84
84: ; preds = %78
br label %85
85: ; preds = %84
%86 = load i32, i32* %4
%87 = shl i32 1, %86
%88 = xor i32 %87, -1
%89 = sext i32 %88 to i64
%90 = load volatile i64, i64* inttoptr (i64 3084972068 to i64*)
%91 = and i64 %90, %89
store volatile i64 %91, i64* inttoptr (i64 3084972068 to i64*)
br label %92
92: ; preds = %85
br label %93
93: ; preds = %92
%94 = load i32, i32* %4
%95 = shl i32 1, %94
%96 = sext i32 %95 to i64
%97 = load volatile i64, i64* inttoptr (i64 3084972072 to i64*)
%98 = or i64 %97, %96
store volatile i64 %98, i64* inttoptr (i64 3084972072 to i64*)
br label %99
99: ; preds = %93
br label %147
100: ; preds = %2
br label %101
101: ; preds = %100
%102 = load i32, i32* %4
%103 = shl i32 1, %102
%104 = sext i32 %103 to i64
%105 = load volatile i64, i64* inttoptr (i64 3084972064 to i64*)
%106 = or i64 %105, %104
store volatile i64 %106, i64* inttoptr (i64 3084972064 to i64*)
br label %107
107: ; preds = %101
br label %108
108: ; preds = %107
%109 = load i32, i32* %4
%110 = shl i32 1, %109
%111 = sext i32 %110 to i64
%112 = load volatile i64, i64* inttoptr (i64 3084972068 to i64*)
%113 = or i64 %112, %111
store volatile i64 %113, i64* inttoptr (i64 3084972068 to i64*)
br label %114
114: ; preds = %108
br label %115
115: ; preds = %114
%116 = load i32, i32* %4
%117 = shl i32 1, %116
%118 = sext i32 %117 to i64
%119 = load volatile i64, i64* inttoptr (i64 3084972072 to i64*)
%120 = or i64 %119, %118
store volatile i64 %120, i64* inttoptr (i64 3084972072 to i64*)
br label %121
121: ; preds = %115
br label %147
122: ; preds = %2
br label %123
123: ; preds = %122
%124 = load i32, i32* %4
%125 = shl i32 1, %124
%126 = xor i32 %125, -1
%127 = sext i32 %126 to i64
%128 = load volatile i64, i64* inttoptr (i64 3084972064 to i64*)
%129 = and i64 %128, %127
store volatile i64 %129, i64* inttoptr (i64 3084972064 to i64*)
br label %130
130: ; preds = %123
br label %131
131: ; preds = %130
%132 = load i32, i32* %4
%133 = shl i32 1, %132
%134 = xor i32 %133, -1
%135 = sext i32 %134 to i64
%136 = load volatile i64, i64* inttoptr (i64 3084972068 to i64*)
%137 = and i64 %136, %135
store volatile i64 %137, i64* inttoptr (i64 3084972068 to i64*)
br label %138
138: ; preds = %131
br label %139
139: ; preds = %138
%140 = load i32, i32* %4
%141 = shl i32 1, %140
%142 = xor i32 %141, -1
%143 = sext i32 %142 to i64
%144 = load volatile i64, i64* inttoptr (i64 3084972072 to i64*)
%145 = and i64 %144, %143
store volatile i64 %145, i64* inttoptr (i64 3084972072 to i64*)
br label %146
146: ; preds = %139
br label %147
147: ; preds = %146, %121, %99, %76, %53, %29
ret void
}

LLVM IR (-O2):
define void @pnx833x_gpio_setup_irq(i32 %0, i32 %1) {
switch i32 %0, label %56 [
i32 1, label %3
i32 2, label %14
i32 3, label %25
i32 4, label %36
i32 5, label %47
]
3: ; preds = %2
%4 = shl nuw i32 1, %1
%5 = xor i32 %4, -1
%6 = sext i32 %5 to i64
%7 = load volatile i64, i64* inttoptr (i64 3084972064 to i64*)
%8 = and i64 %7, %6
store volatile i64 %8, i64* inttoptr (i64 3084972064 to i64*)
%9 = load volatile i64, i64* inttoptr (i64 3084972068 to i64*)
%10 = and i64 %9, %6
store volatile i64 %10, i64* inttoptr (i64 3084972068 to i64*)
%11 = sext i32 %4 to i64
%12 = load volatile i64, i64* inttoptr (i64 3084972072 to i64*)
%13 = or i64 %12, %11
br label %66
14: ; preds = %2
%15 = shl nuw i32 1, %1
%16 = xor i32 %15, -1
%17 = sext i32 %16 to i64
%18 = load volatile i64, i64* inttoptr (i64 3084972064 to i64*)
%19 = and i64 %18, %17
store volatile i64 %19, i64* inttoptr (i64 3084972064 to i64*)
%20 = sext i32 %15 to i64
%21 = load volatile i64, i64* inttoptr (i64 3084972068 to i64*)
%22 = or i64 %21, %20
store volatile i64 %22, i64* inttoptr (i64 3084972068 to i64*)
%23 = load volatile i64, i64* inttoptr (i64 3084972072 to i64*)
%24 = and i64 %23, %17
br label %66
25: ; preds = %2
%26 = shl nuw i32 1, %1
%27 = sext i32 %26 to i64
%28 = load volatile i64, i64* inttoptr (i64 3084972064 to i64*)
%29 = or i64 %28, %27
store volatile i64 %29, i64* inttoptr (i64 3084972064 to i64*)
%30 = load volatile i64, i64* inttoptr (i64 3084972068 to i64*)
%31 = or i64 %30, %27
store volatile i64 %31, i64* inttoptr (i64 3084972068 to i64*)
%32 = xor i32 %26, -1
%33 = sext i32 %32 to i64
%34 = load volatile i64, i64* inttoptr (i64 3084972072 to i64*)
%35 = and i64 %34, %33
br label %66
36: ; preds = %2
%37 = shl nuw i32 1, %1
%38 = sext i32 %37 to i64
%39 = load volatile i64, i64* inttoptr (i64 3084972064 to i64*)
%40 = or i64 %39, %38
store volatile i64 %40, i64* inttoptr (i64 3084972064 to i64*)
%41 = xor i32 %37, -1
%42 = sext i32 %41 to i64
%43 = load volatile i64, i64* inttoptr (i64 3084972068 to i64*)
%44 = and i64 %43, %42
store volatile i64 %44, i64* inttoptr (i64 3084972068 to i64*)
%45 = load volatile i64, i64* inttoptr (i64 3084972072 to i64*)
%46 = or i64 %45, %38
br label %66
47: ; preds = %2
%48 = shl nuw i32 1, %1
%49 = sext i32 %48 to i64
%50 = load volatile i64, i64* inttoptr (i64 3084972064 to i64*)
%51 = or i64 %50, %49
store volatile i64 %51, i64* inttoptr (i64 3084972064 to i64*)
%52 = load volatile i64, i64* inttoptr (i64 3084972068 to i64*)
%53 = or i64 %52, %49
store volatile i64 %53, i64* inttoptr (i64 3084972068 to i64*)
%54 = load volatile i64, i64* inttoptr (i64 3084972072 to i64*)
%55 = or i64 %54, %49
br label %66
56: ; preds = %2
%57 = shl nuw i32 1, %1
%58 = xor i32 %57, -1
%59 = sext i32 %58 to i64
%60 = load volatile i64, i64* inttoptr (i64 3084972064 to i64*)
%61 = and i64 %60, %59
store volatile i64 %61, i64* inttoptr (i64 3084972064 to i64*)
%62 = load volatile i64, i64* inttoptr (i64 3084972068 to i64*)
%63 = and i64 %62, %59
store volatile i64 %63, i64* inttoptr (i64 3084972068 to i64*)
%64 = load volatile i64, i64* inttoptr (i64 3084972072 to i64*)
%65 = and i64 %64, %59
br label %66
66: ; preds = %56, %47, %36, %25, %14, %3
%67 = phi i64 [ %65, %56 ], [ %55, %47 ], [ %46, %36 ], [ %35, %25 ], [ %24, %14 ], [ %13, %3 ]
store volatile i64 %67, i64* inttoptr (i64 3084972072 to i64*)
ret void
}