xunge/DecIR huggingface dataset:
int isv(char c) {
  if (c == 'a' || c == 'e' || c == 'i' || c == 'o' || c == 'u') {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<isv>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
je     114b <isv+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x65,%eax
je     114b <isv+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x69,%eax
je     114b <isv+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x6f,%eax
je     114b <isv+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x75,%eax
jne    1157 <isv+0x57>
movl   $0x1,-0x4(%rbp)
jmp    115e <isv+0x5e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isv>:
add    $0x9f,%dil
ror    %dil
xor    %eax,%eax
cmp    $0xa,%dil
ja     111d <isv+0x1d>
movsbq %dil,%rax
lea    0xee6(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @isv(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 97
br i1 %6, label %23, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 101
br i1 %10, label %23, label %11
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 105
br i1 %14, label %23, label %15
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 111
br i1 %18, label %23, label %19
19: ; preds = %15
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %21, 117
br i1 %22, label %23, label %24
23: ; preds = %19, %15, %11, %7, %1
store i32 1, i32* %2
br label %25
24: ; preds = %19
store i32 0, i32* %2
br label %25
25: ; preds = %24, %23
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
@switch.table.isv = [11 x i32] [i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 1]
define i32 @isv(i8 signext %0) {
%2 = add i8 %0, -97
%3 = tail call i8 @llvm.fshl.i8(i8 %2, i8 %2, i8 7)
%4 = icmp ult i8 %3, 11
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = sext i8 %3 to i64
%7 = getelementptr inbounds [11 x i32], [11 x i32]* @switch.table.isv, i64 0, i64 %6
%8 = load i32, i32* %7
br label %9
9: ; preds = %1, %5
%10 = phi i32 [ %8, %5 ], [ 0, %1 ]
ret i32 %10
}
unsigned long SysCtlUSBPLLConfigGet(void) {
  unsigned long ulReturn;
  ulReturn =
      (*((volatile unsigned long *)(0x400FB824))) & (0x0000001F | 0x00000300);
  ulReturn |= ((*((volatile unsigned long *)(0x400FB820))) & 0x00000001) << 31;
  ulReturn |= ((*((volatile unsigned long *)(0x400FB820))) & 0x00000002) << 29;
  return ulReturn;
}


x86 assembly (clang, -O0):
<SysCtlUSBPLLConfigGet>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400fb824,%eax
mov    (%rax),%rax
and    $0x31f,%rax
mov    %rax,-0x8(%rbp)
mov    $0x400fb820,%eax
mov    (%rax),%rax
and    $0x1,%rax
shl    $0x1f,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    $0x400fb820,%eax
mov    (%rax),%rax
and    $0x2,%rax
shl    $0x1d,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlUSBPLLConfigGet>:
mov    0x400fb824,%rax
40
and    $0x31f,%eax
mov    0x400fb820,%rcx
40
shl    $0x1f,%ecx
or     %rax,%rcx
mov    0x400fb820,%rax
40
and    $0x2,%eax
shl    $0x1d,%rax
or     %rcx,%rax
ret

LLVM IR (-O0):
define i64 @SysCtlUSBPLLConfigGet() {
%1 = alloca i64
%2 = load volatile i64, i64* inttoptr (i64 1074772004 to i64*)
%3 = and i64 %2, 799
store i64 %3, i64* %1
%4 = load volatile i64, i64* inttoptr (i64 1074772000 to i64*)
%5 = and i64 %4, 1
%6 = shl i64 %5, 31
%7 = load i64, i64* %1
%8 = or i64 %7, %6
store i64 %8, i64* %1
%9 = load volatile i64, i64* inttoptr (i64 1074772000 to i64*)
%10 = and i64 %9, 2
%11 = shl i64 %10, 29
%12 = load i64, i64* %1
%13 = or i64 %12, %11
store i64 %13, i64* %1
%14 = load i64, i64* %1
ret i64 %14
}

LLVM IR (-O2):
define i64 @SysCtlUSBPLLConfigGet() {
%1 = load volatile i64, i64* inttoptr (i64 1074772004 to i64*)
%2 = and i64 %1, 799
%3 = load volatile i64, i64* inttoptr (i64 1074772000 to i64*)
%4 = shl i64 %3, 31
%5 = and i64 %4, 2147483648
%6 = or i64 %5, %2
%7 = load volatile i64, i64* inttoptr (i64 1074772000 to i64*)
%8 = shl i64 %7, 29
%9 = and i64 %8, 1073741824
%10 = or i64 %6, %9
ret i64 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void binario(int n) {
  if (n > 1)
    binario(n / 2);
  if (n % 2 != 0)
    printf(" 1 ");
  else
    printf(" 0 ");
  return;
}


x86 assembly (clang, -O0):
<binario>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jle    1147 <binario+0x27>
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1040 <binario@plt>
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     116c <binario+0x4c>
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
jmp    1178 <binario+0x58>
lea    0xe91(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<binario>:
push   %rbx
mov    %edi,%ebx
cmp    $0x2,%edi
jl     1131 <binario+0x11>
mov    %ebx,%edi
shr    %edi
call   1040 <binario@plt>
test   $0x1,%bl
lea    0xec9(%rip),%rax
lea    0xebe(%rip),%rdi
cmove  %rax,%rdi
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c" 1 \00"
@.str.1 = [4 x i8] c" 0 \00"
define void @binario(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 1
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = sdiv i32 %6, 2
br label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = srem i32 %9, 2
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
br label %16
14: ; preds = %8
%15 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
br label %16
16: ; preds = %14, %12
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c" 1 \00"
@.str.1 = [4 x i8] c" 0 \00"
define void @binario(i32 %0) {
%2 = icmp sgt i32 %0, 1
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = lshr i32 %0, 1
tail call void @binario(i32 %4)
br label %5
5: ; preds = %3, %1
%6 = and i32 %0, 1
%7 = icmp eq i32 %6, 0
%8 = select i1 %7, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
%9 = tail call i32 @printf(i8* dereferenceable(1) %8)
ret void
}
int recebe_buffer(struct v4l2_buffer *v4l2_buf, struct v4l2_t_buf *buf) {
  return 0;
}


x86 assembly (clang, -O0):
<recebe_buffer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<recebe_buffer>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.v4l2_buffer = type opaque
%struct.v4l2_t_buf = type opaque
define i32 @recebe_buffer(%struct.v4l2_buffer* %0, %struct.v4l2_t_buf* %1) {
%3 = alloca %struct.v4l2_buffer*
%4 = alloca %struct.v4l2_t_buf*
store %struct.v4l2_buffer* %0, %struct.v4l2_buffer** %3
store %struct.v4l2_t_buf* %1, %struct.v4l2_t_buf** %4
ret i32 0
}

LLVM IR (-O2):
%struct.v4l2_buffer = type opaque
%struct.v4l2_t_buf = type opaque
define i32 @recebe_buffer(%struct.v4l2_buffer* nocapture readnone %0, %struct.v4l2_t_buf* nocapture readnone %1) {
ret i32 0
}
char *return_buf(char *buf) { return buf + 10; }


x86 assembly (clang, -O0):
<return_buf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0xa,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<return_buf>:
lea    0xa(%rdi),%rax
ret

LLVM IR (-O0):
define i8* @return_buf(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 10
ret i8* %4
}

LLVM IR (-O2):
define i8* @return_buf(i8* readnone %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 10
ret i8* %2
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
scalar_t__ ERR;
scalar_t__ endwin();
uint8_t ccbi_endwin() { return ((endwin()) == ERR ? 0 : 1); }


x86 assembly (clang, -O0):
<ccbi_endwin>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <endwin@plt>
mov    %rax,%rdx
mov    0x2ec3(%rip),%rax
mov    (%rax),%rsi
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    %rsi,%rdx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccbi_endwin>:
push   %rax
xor    %eax,%eax
call   1030 <endwin@plt>
mov    0x2ec9(%rip),%rdx
xor    %ecx,%ecx
cmp    (%rdx),%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@ERR = global i64 0
define i32 @ccbi_endwin() {
%1 = call i64 (...) @endwin()
%2 = load i64, i64* @ERR
%3 = icmp eq i64 %1, %2
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 0, i32 1
ret i32 %5
}

LLVM IR (-O2):
@ERR = global i64 0
define i32 @ccbi_endwin() {
%1 = tail call i64 (...) @endwin()
%2 = load i64, i64* @ERR
%3 = icmp ne i64 %1, %2
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int fastio_close(int fd) { close(fd); }


x86 assembly (clang, -O0):
<fastio_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <close@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fastio_close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define i32 @fastio_close(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 @close(i32 %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @fastio_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret i32 undef
}
int setbits(int x, int p, int n, int y) {
  int x1 = ~0 << (p + 1);
  int x2 = ~(~0 << (p - n + 1));
  int x3 = x1 | x2;
  int x4 = x & x3;
  int y1 = y << (p - n + 1);
  int r = x4 ^ y1;
  return r;
}


x86 assembly (clang, -O0):
<setbits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
mov    $0xffffffff,%eax
shl    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%ecx
sub    -0xc(%rbp),%ecx
add    $0x1,%ecx
mov    $0xffffffff,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x4(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x10(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    -0xc(%rbp),%ecx
add    $0x1,%ecx
shl    %cl,%eax
mov    %eax,-0x24(%rbp)
mov    -0x20(%rbp),%eax
xor    -0x24(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x28(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setbits>:
mov    %ecx,%eax
lea    0x1(%rsi),%ecx
mov    $0xffffffff,%r8d
mov    $0xffffffff,%r9d
shl    %cl,%r9d
sub    %edx,%esi
lea    0x1(%rsi),%ecx
shl    %cl,%r8d
not    %r8d
or     %r9d,%r8d
and    %edi,%r8d
shl    %cl,%eax
xor    %r8d,%eax
ret

LLVM IR (-O0):
define i32 @setbits(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%15 = load i32, i32* %6
%16 = add nsw i32 %15, 1
%17 = shl i32 -1, %16
store i32 %17, i32* %9
%18 = load i32, i32* %6
%19 = load i32, i32* %7
%20 = sub nsw i32 %18, %19
%21 = add nsw i32 %20, 1
%22 = shl i32 -1, %21
%23 = xor i32 %22, -1
store i32 %23, i32* %10
%24 = load i32, i32* %9
%25 = load i32, i32* %10
%26 = or i32 %24, %25
store i32 %26, i32* %11
%27 = load i32, i32* %5
%28 = load i32, i32* %11
%29 = and i32 %27, %28
store i32 %29, i32* %12
%30 = load i32, i32* %8
%31 = load i32, i32* %6
%32 = load i32, i32* %7
%33 = sub nsw i32 %31, %32
%34 = add nsw i32 %33, 1
%35 = shl i32 %30, %34
store i32 %35, i32* %13
%36 = load i32, i32* %12
%37 = load i32, i32* %13
%38 = xor i32 %36, %37
store i32 %38, i32* %14
%39 = load i32, i32* %14
ret i32 %39
}

LLVM IR (-O2):
define i32 @setbits(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = add nsw i32 %1, 1
%6 = shl nsw i32 -1, %5
%7 = sub nsw i32 %1, %2
%8 = add nsw i32 %7, 1
%9 = shl nsw i32 -1, %8
%10 = xor i32 %9, -1
%11 = or i32 %6, %10
%12 = and i32 %11, %0
%13 = shl i32 %3, %8
%14 = xor i32 %12, %13
ret i32 %14
}
int pxCmpInt(const void *pL, const void *pR) {
  if (*(const int *)pL < *(const int *)pR)
    return -1;
  if (*(const int *)pL > *(const int *)pR)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<pxCmpInt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
jge    112a <pxCmpInt+0x2a>
movl   $0xffffffff,-0x4(%rbp)
jmp    114f <pxCmpInt+0x4f>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
jle    1148 <pxCmpInt+0x48>
movl   $0x1,-0x4(%rbp)
jmp    114f <pxCmpInt+0x4f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pxCmpInt>:
mov    (%rdi),%eax
xor    %ecx,%ecx
cmp    (%rsi),%eax
setg   %cl
mov    $0xffffffff,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @pxCmpInt(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i32*
%8 = load i32, i32* %7
%9 = load i8*, i8** %5
%10 = bitcast i8* %9 to i32*
%11 = load i32, i32* %10
%12 = icmp slt i32 %8, %11
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 -1, i32* %3
br label %24
14: ; preds = %2
%15 = load i8*, i8** %4
%16 = bitcast i8* %15 to i32*
%17 = load i32, i32* %16
%18 = load i8*, i8** %5
%19 = bitcast i8* %18 to i32*
%20 = load i32, i32* %19
%21 = icmp sgt i32 %17, %20
br i1 %21, label %22, label %23
22: ; preds = %14
store i32 1, i32* %3
br label %24
23: ; preds = %14
store i32 0, i32* %3
br label %24
24: ; preds = %23, %22, %13
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @pxCmpInt(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp slt i32 %4, %6
%8 = icmp sgt i32 %4, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
void MAID_register_address(void *p) {}


x86 assembly (clang, -O0):
<MAID_register_address>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<MAID_register_address>:
ret

LLVM IR (-O0):
define void @MAID_register_address(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @MAID_register_address(i8* nocapture %0) {
ret void
}
void interpret() { return; }


x86 assembly (clang, -O0):
<interpret>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<interpret>:
ret

LLVM IR (-O0):
define void @interpret() {
ret void
}

LLVM IR (-O2):
define void @interpret() {
ret void
}
int test8() { return 0; }


x86 assembly (clang, -O0):
<test8>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test8>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test8() {
ret i32 0
}

LLVM IR (-O2):
define i32 @test8() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void deux(void) { printf("deux\n"); }


x86 assembly (clang, -O0):
<deux>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<deux>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"deux\0A\00"
define void @deux() {
%1 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [5 x i8] c"deux\00"
define void @deux() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0))
ret void
}
void copy(char to[], char from[]) {
  int i = 0;
  while ((to[1] = from[i]) != '\0') {
    ++i;
  }
}


x86 assembly (clang, -O0):
<copy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    -0x8(%rbp),%rcx
mov    %al,0x1(%rcx)
movsbl %al,%eax
cmp    $0x0,%eax
je     113f <copy+0x3f>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <copy+0x13>
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy>:
movzbl (%rsi),%eax
mov    %al,0x1(%rdi)
add    $0x1,%rsi
test   %al,%al
jne    1100 <copy>
ret

LLVM IR (-O0):
define void @copy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
br label %6
6: ; preds = %16, %2
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i64 1
store i8 %11, i8* %13
%14 = sext i8 %11 to i32
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %19
16: ; preds = %6
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 1
store i32 %18, i32* %5
br label %6
19: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @copy(i8* nocapture writeonly %0, i8* nocapture %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 1
br label %4
4: ; preds = %4, %2
%5 = phi i64 [ %9, %4 ], [ 0, %2 ]
%6 = getelementptr inbounds i8, i8* %1, i64 %5
%7 = load i8, i8* %6
store i8 %7, i8* %3
%8 = icmp eq i8 %7, 0
%9 = add nuw i64 %5, 1
br i1 %8, label %10, label %4
10: ; preds = %4
ret void
}
void main() {
  __asm__("movl $0, %eax;"
          "movl $1, %ebx;");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%eax
mov    $0x1,%ebx
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x0,%eax
mov    $0x1,%ebx
ret

LLVM IR (-O0):
define void @main() {
ret void
}

LLVM IR (-O2):
define void @main() {
tail call void asm sideeffect "movl $$0, %eax;movl $$1, %ebx;", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
int bcdToDec(char b) { return (b / 16) * 10 + (b % 16); }


x86 assembly (clang, -O0):
<bcdToDec>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
mov    $0x10,%ecx
cltd
idiv   %ecx
imul   $0xa,%eax,%eax
mov    %eax,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
mov    $0x10,%ecx
cltd
idiv   %ecx
mov    -0x8(%rbp),%eax
add    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcdToDec>:
mov    %edi,%eax
sar    $0x7,%al
shr    $0x4,%al
add    %dil,%al
mov    %eax,%ecx
sar    $0x4,%cl
movzbl %cl,%ecx
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
movsbl %cl,%ecx
and    $0xf0,%al
sub    %al,%dil
movsbl %dil,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @bcdToDec(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = sdiv i32 %4, 16
%6 = mul nsw i32 %5, 10
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = srem i32 %8, 16
%10 = add nsw i32 %6, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @bcdToDec(i8 signext %0) {
%2 = sdiv i8 %0, 16
%3 = mul nsw i8 %2, 10
%4 = sext i8 %3 to i32
%5 = srem i8 %0, 16
%6 = sext i8 %5 to i32
%7 = add nsw i32 %4, %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void printUsage(void) { printf("getopt -a ap -bbp -c op -d\n"); }


x86 assembly (clang, -O0):
<printUsage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<printUsage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"getopt -a ap -bbp -c op -d\0A\00"
define void @printUsage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [27 x i8] c"getopt -a ap -bbp -c op -d\00"
define void @printUsage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CheckRunningInMainThread(char *);
int /*<<< orphan*/ DoXOPAlert(int, char const *, char const *);
void XOPOKAlert(const char *title, const char *message) {
  if (!CheckRunningInMainThread("XOPOKAlert"))
    return;
  DoXOPAlert(1504, title, message);
}


x86 assembly (clang, -O0):
<XOPOKAlert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec9(%rip),%rdi
call   1030 <CheckRunningInMainThread@plt>
cmp    $0x0,%eax
jne    114a <XOPOKAlert+0x2a>
jmp    115c <XOPOKAlert+0x3c>
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0x5e0,%edi
call   1040 <DoXOPAlert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XOPOKAlert>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0xecf(%rip),%rdi
call   1030 <CheckRunningInMainThread@plt>
test   %eax,%eax
je     1151 <XOPOKAlert+0x31>
mov    $0x5e0,%edi
mov    %rbx,%rsi
mov    %r14,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <DoXOPAlert@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [11 x i8] c"XOPOKAlert\00"
define void @XOPOKAlert(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = call i32 @CheckRunningInMainThread(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %2
br label %12
8: ; preds = %2
%9 = load i8*, i8** %3
%10 = load i8*, i8** %4
%11 = call i32 @DoXOPAlert(i32 1504, i8* %9, i8* %10)
br label %12
12: ; preds = %8, %7
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"XOPOKAlert\00"
define void @XOPOKAlert(i8* %0, i8* %1) {
%3 = tail call i32 @CheckRunningInMainThread(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @DoXOPAlert(i32 1504, i8* %0, i8* %1)
br label %7
7: ; preds = %2, %5
ret void
}
void mt_stats_lock() {}


x86 assembly (clang, -O0):
<mt_stats_lock>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mt_stats_lock>:
ret

LLVM IR (-O0):
define void @mt_stats_lock() {
ret void
}

LLVM IR (-O2):
define void @mt_stats_lock() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned long long);
unsigned long long rdtsc();
int main() {
  unsigned long long coldstart = 0;
  unsigned long long start = 0;
  unsigned long long end = 0;
  unsigned long long i = 0;
  coldstart = rdtsc();
  start = rdtsc();
  for (i = 0; i < 1000; i++) {
  }
  end = rdtsc();
  printf("%llu", (end - start));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
mov    $0x0,%al
call   1040 <rdtsc@plt>
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1040 <rdtsc@plt>
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x28(%rbp)
cmpq   $0x3e8,-0x28(%rbp)
jae    1191 <main+0x71>
jmp    1180 <main+0x60>
mov    -0x28(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x28(%rbp)
jmp    116d <main+0x4d>
mov    $0x0,%al
call   1040 <rdtsc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rsi
sub    -0x18(%rbp),%rsi
lea    0xe55(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <rdtsc@plt>
xor    %eax,%eax
call   1040 <rdtsc@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1040 <rdtsc@plt>
sub    %rbx,%rax
lea    0xebd(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%llu\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i32 0, i32* %1
store i64 0, i64* %2
store i64 0, i64* %3
store i64 0, i64* %4
store i64 0, i64* %5
%6 = call i64 (...) @rdtsc()
store i64 %6, i64* %2
%7 = call i64 (...) @rdtsc()
store i64 %7, i64* %3
store i64 0, i64* %5
br label %8
8: ; preds = %12, %0
%9 = load i64, i64* %5
%10 = icmp ult i64 %9, 1000
br i1 %10, label %11, label %15
11: ; preds = %8
br label %12
12: ; preds = %11
%13 = load i64, i64* %5
%14 = add i64 %13, 1
store i64 %14, i64* %5
br label %8
15: ; preds = %8
%16 = call i64 (...) @rdtsc()
store i64 %16, i64* %4
%17 = load i64, i64* %4
%18 = load i64, i64* %3
%19 = sub i64 %17, %18
%20 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 %19)
%21 = load i32, i32* %1
ret i32 %21
}

LLVM IR (-O2):
@.str = [5 x i8] c"%llu\00"
define i32 @main() {
%1 = tail call i64 (...) @rdtsc()
%2 = tail call i64 (...) @rdtsc()
%3 = tail call i64 (...) @rdtsc()
%4 = sub i64 %3, %2
%5 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 %4)
ret i32 0
}
char ccnl_debugLevelToChar(int level) {
  switch (level) {
  case 0:
    return 'F';
  case 1:
    return 'E';
  case 2:
    return 'W';
  case 3:
    return 'I';
  case 4:
    return 'D';
  case 5:
    return 'V';
  case 6:
    return 'T';
  default:
    return '?';
  }
}


x86 assembly (clang, -O0):
<ccnl_debugLevelToChar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %rax,-0x10(%rbp)
sub    $0x6,%rax
ja     116b <ccnl_debugLevelToChar+0x6b>
mov    -0x10(%rbp),%rax
lea    0xedd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movb   $0x46,-0x1(%rbp)
jmp    116f <ccnl_debugLevelToChar+0x6f>
movb   $0x45,-0x1(%rbp)
jmp    116f <ccnl_debugLevelToChar+0x6f>
movb   $0x57,-0x1(%rbp)
jmp    116f <ccnl_debugLevelToChar+0x6f>
movb   $0x49,-0x1(%rbp)
jmp    116f <ccnl_debugLevelToChar+0x6f>
movb   $0x44,-0x1(%rbp)
jmp    116f <ccnl_debugLevelToChar+0x6f>
movb   $0x56,-0x1(%rbp)
jmp    116f <ccnl_debugLevelToChar+0x6f>
movb   $0x54,-0x1(%rbp)
jmp    116f <ccnl_debugLevelToChar+0x6f>
movb   $0x3f,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccnl_debugLevelToChar>:
lea    0x0(,%rdi,8),%ecx
movabs $0x54564449574546,%rdx
shr    %cl,%rdx
cmp    $0x7,%edi
mov    $0x3f,%eax
cmovb  %edx,%eax
ret

LLVM IR (-O0):
define signext i8 @ccnl_debugLevelToChar(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %12 [
i32 0, label %5
i32 1, label %6
i32 2, label %7
i32 3, label %8
i32 4, label %9
i32 5, label %10
i32 6, label %11
]
5: ; preds = %1
store i8 70, i8* %2
br label %13
6: ; preds = %1
store i8 69, i8* %2
br label %13
7: ; preds = %1
store i8 87, i8* %2
br label %13
8: ; preds = %1
store i8 73, i8* %2
br label %13
9: ; preds = %1
store i8 68, i8* %2
br label %13
10: ; preds = %1
store i8 86, i8* %2
br label %13
11: ; preds = %1
store i8 84, i8* %2
br label %13
12: ; preds = %1
store i8 63, i8* %2
br label %13
13: ; preds = %12, %11, %10, %9, %8, %7, %6, %5
%14 = load i8, i8* %2
ret i8 %14
}

LLVM IR (-O2):
define signext i8 @ccnl_debugLevelToChar(i32 %0) {
%2 = icmp ult i32 %0, 7
%3 = zext i32 %0 to i56
%4 = shl nuw nsw i56 %3, 3
%5 = lshr i56 23738749331916102, %4
%6 = trunc i56 %5 to i8
%7 = select i1 %2, i8 %6, i8 63
ret i8 %7
}
void ctable_write_eeprom() {}


x86 assembly (clang, -O0):
<ctable_write_eeprom>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctable_write_eeprom>:
ret

LLVM IR (-O0):
define void @ctable_write_eeprom() {
ret void
}

LLVM IR (-O2):
define void @ctable_write_eeprom() {
ret void
}
/* Variables and functions */
int send_msg(int, char *);
int NOT_FOUND(int fd) { return send_msg(fd, "HTTP/1.1 404 Not Found\r\n\r\n"); }


x86 assembly (clang, -O0):
<NOT_FOUND>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xedb(%rip),%rsi
call   1030 <send_msg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NOT_FOUND>:
lea    0xee9(%rip),%rsi
jmp    1030 <send_msg@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"HTTP/1.1 404 Not Found\0D\0A\0D\0A\00"
define i32 @NOT_FOUND(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @send_msg(i32 %3, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [27 x i8] c"HTTP/1.1 404 Not Found\0D\0A\0D\0A\00"
define i32 @NOT_FOUND(i32 %0) {
%2 = tail call i32 @send_msg(i32 %0, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
int three() { return 3; }


x86 assembly (clang, -O0):
<three>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<three>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @three() {
ret i32 3
}

LLVM IR (-O2):
define i32 @three() {
ret i32 3
}
/* Variables and functions */
int /*<<< orphan*/ HplMsp430GeneralIOP__28__IO__set();
void Msp430GpioC__12__HplGeneralIO__set(void) {
  HplMsp430GeneralIOP__28__IO__set();
}


x86 assembly (clang, -O0):
<Msp430GpioC__12__HplGeneralIO__set>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMsp430GeneralIOP__28__IO__set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430GpioC__12__HplGeneralIO__set>:
xor    %eax,%eax
jmp    1030 <HplMsp430GeneralIOP__28__IO__set@plt>

LLVM IR (-O0):
define void @Msp430GpioC__12__HplGeneralIO__set() {
%1 = call i32 (...) @HplMsp430GeneralIOP__28__IO__set()
ret void
}

LLVM IR (-O2):
define void @Msp430GpioC__12__HplGeneralIO__set() {
%1 = tail call i32 (...) @HplMsp430GeneralIOP__28__IO__set()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void Derived_destroy(void *this) {
  printf("Derived"
         "::destroy()\n");
}


x86 assembly (clang, -O0):
<Derived_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Derived_destroy>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"Derived::destroy()\0A\00"
define void @Derived_destroy(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [19 x i8] c"Derived::destroy()\00"
define void @Derived_destroy(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
ret void
}
double casimir_T_SI_to_scaled(double T_SI, double ScriptL) {
  return 2 * 3.141592653589793238462643383279502884197169L * 1.3806488e-23 *
         ScriptL / 3.161526510740123e-26 * T_SI;
}


x86 assembly (clang, -O0):
<casimir_T_SI_to_scaled>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
fldl   -0x10(%rbp)
fldt   0xee9(%rip)
fmulp  %st,%st(1)
fldl   0xef1(%rip)
fdivrp %st,%st(1)
fldl   -0x8(%rbp)
fmulp  %st,%st(1)
fstpl  -0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<casimir_T_SI_to_scaled>:
movsd  %xmm1,-0x10(%rsp)
fldt   0xef4(%rip)
fmull  -0x10(%rsp)
fdivl  0xefa(%rip)
movsd  %xmm0,-0x8(%rsp)
fmull  -0x8(%rsp)
fstpl  -0x18(%rsp)
movsd  -0x18(%rsp),%xmm0
ret

LLVM IR (-O0):
define double @casimir_T_SI_to_scaled(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %4
%6 = fpext double %5 to x86_fp80
%7 = fmul x86_fp80 0xK3FB5D1BEDBC684460C74, %6
%8 = fdiv x86_fp80 %7, 0xK3FAA9C8D1C1B2EB73000
%9 = load double, double* %3
%10 = fpext double %9 to x86_fp80
%11 = fmul x86_fp80 %8, %10
%12 = fptrunc x86_fp80 %11 to double
ret double %12
}

LLVM IR (-O2):
define double @casimir_T_SI_to_scaled(double %0, double %1) {
%3 = fpext double %1 to x86_fp80
%4 = fmul x86_fp80 %3, 0xK3FB5D1BEDBC684460C74
%5 = fdiv x86_fp80 %4, 0xK3FAA9C8D1C1B2EB73000
%6 = fpext double %0 to x86_fp80
%7 = fmul x86_fp80 %5, %6
%8 = fptrunc x86_fp80 %7 to double
ret double %8
}
void seed_search_zero_stats(void) {
  ;
  ;
  ;
  ;
}


x86 assembly (clang, -O0):
<seed_search_zero_stats>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<seed_search_zero_stats>:
ret

LLVM IR (-O0):
define void @seed_search_zero_stats() {
ret void
}

LLVM IR (-O2):
define void @seed_search_zero_stats() {
ret void
}
void save_player(char *name) {}


x86 assembly (clang, -O0):
<save_player>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<save_player>:
ret

LLVM IR (-O0):
define void @save_player(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @save_player(i8* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
unsigned char getc(int /*<<< orphan*/ *);
unsigned int read_dword(FILE *fp) {
  unsigned char b0, b1, b2, b3;
  b0 = getc(fp);
  b1 = getc(fp);
  b2 = getc(fp);
  b3 = getc(fp);
  return ((((((b3 << 8) | b2) << 8) | b1) << 8) | b0);
}


x86 assembly (clang, -O0):
<read_dword>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getc@plt>
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getc@plt>
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getc@plt>
mov    %al,-0xb(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getc@plt>
mov    %al,-0xc(%rbp)
movzbl -0xc(%rbp),%eax
shl    $0x8,%eax
movzbl -0xb(%rbp),%ecx
or     %ecx,%eax
shl    $0x8,%eax
movzbl -0xa(%rbp),%ecx
or     %ecx,%eax
shl    $0x8,%eax
movzbl -0x9(%rbp),%ecx
or     %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_dword>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <getc@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <getc@plt>
mov    %eax,%r14d
mov    %rbx,%rdi
call   1030 <getc@plt>
mov    %eax,%r15d
mov    %rbx,%rdi
call   1030 <getc@plt>
movzbl %al,%eax
movzbl %r15b,%ecx
shl    $0x10,%eax
shl    $0x8,%ecx
or     %eax,%ecx
movzbl %r14b,%edx
or     %ecx,%edx
shl    $0x8,%edx
movzbl %bpl,%eax
or     %edx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @read_dword(i32* %0) {
%2 = alloca i32*
%3 = alloca i8
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
store i32* %0, i32** %2
%7 = load i32*, i32** %2
%8 = call zeroext i8 @getc(i32* %7)
store i8 %8, i8* %3
%9 = load i32*, i32** %2
%10 = call zeroext i8 @getc(i32* %9)
store i8 %10, i8* %4
%11 = load i32*, i32** %2
%12 = call zeroext i8 @getc(i32* %11)
store i8 %12, i8* %5
%13 = load i32*, i32** %2
%14 = call zeroext i8 @getc(i32* %13)
store i8 %14, i8* %6
%15 = load i8, i8* %6
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 8
%18 = load i8, i8* %5
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
%21 = shl i32 %20, 8
%22 = load i8, i8* %4
%23 = zext i8 %22 to i32
%24 = or i32 %21, %23
%25 = shl i32 %24, 8
%26 = load i8, i8* %3
%27 = zext i8 %26 to i32
%28 = or i32 %25, %27
ret i32 %28
}

LLVM IR (-O2):
define i32 @read_dword(i32* nocapture %0) {
%2 = tail call zeroext i8 @getc(i32* %0)
%3 = tail call zeroext i8 @getc(i32* %0)
%4 = tail call zeroext i8 @getc(i32* %0)
%5 = tail call zeroext i8 @getc(i32* %0)
%6 = zext i8 %5 to i32
%7 = zext i8 %4 to i32
%8 = shl nuw nsw i32 %6, 16
%9 = shl nuw nsw i32 %7, 8
%10 = or i32 %8, %9
%11 = zext i8 %3 to i32
%12 = or i32 %10, %11
%13 = shl nuw i32 %12, 8
%14 = zext i8 %2 to i32
%15 = or i32 %13, %14
ret i32 %15
}
int test_imm_34uint32_reg(unsigned int val) {
  return ((val) & (0x34 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_34uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x34,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_34uint32_reg>:
test   $0x34,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_34uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 52
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_34uint32_reg(i32 %0) {
%2 = and i32 %0, 52
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ WriteInstruction(char *);
void CR_Fall(void) { WriteInstruction("call ifall"); }


x86 assembly (clang, -O0):
<CR_Fall>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <WriteInstruction@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CR_Fall>:
lea    0xee9(%rip),%rdi
jmp    1030 <WriteInstruction@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"call ifall\00"
define void @CR_Fall() {
%1 = call i32 @WriteInstruction(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"call ifall\00"
define void @CR_Fall() {
%1 = tail call i32 @WriteInstruction(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int fh_edge_main(int, char **, int);
int main(int argc, char **argv) { return fh_edge_main(argc, argv, 1); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <fh_edge_main@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%edx
jmp    1030 <fh_edge_main@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @fh_edge_main(i32 %6, i8** %7, i32 1)
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @fh_edge_main(i32 %0, i8** %1, i32 1)
ret i32 %3
}
int ivlim(int x, int m, int M) { return x < m ? m : (x > M ? M : x); }


x86 assembly (clang, -O0):
<ivlim>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1124 <ivlim+0x24>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1147 <ivlim+0x47>
mov    -0x4(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    113b <ivlim+0x3b>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1141 <ivlim+0x41>
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ivlim>:
mov    %edx,%eax
cmp    %edx,%edi
cmovle %edi,%eax
cmp    %esi,%edi
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define i32 @ivlim(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load i32, i32* %5
br label %22
12: ; preds = %3
%13 = load i32, i32* %4
%14 = load i32, i32* %6
%15 = icmp sgt i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load i32, i32* %6
br label %20
18: ; preds = %12
%19 = load i32, i32* %4
br label %20
20: ; preds = %18, %16
%21 = phi i32 [ %17, %16 ], [ %19, %18 ]
br label %22
22: ; preds = %20, %10
%23 = phi i32 [ %11, %10 ], [ %21, %20 ]
ret i32 %23
}

LLVM IR (-O2):
define i32 @ivlim(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, %1
%5 = icmp sgt i32 %0, %2
%6 = select i1 %5, i32 %2, i32 %0
%7 = select i1 %4, i32 %1, i32 %6
ret i32 %7
}
/* Type definitions */
typedef int pid_t;

/* Variables and functions */
int /*<<< orphan*/ O_RDONLY;
int open(char *, int /*<<< orphan*/);
int /*<<< orphan*/ sprintf(char *, char *, int);
int openmap(pid_t pid) {
  char buf[32], *ptr;
  if (pid) {
    sprintf(buf, "/proc/%d/maps", pid);
    ptr = buf;
  } else {
    ptr = "/proc/self/maps";
  }
  return open(ptr, O_RDONLY);
}


x86 assembly (clang, -O0):
<openmap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1155 <openmap+0x35>
lea    -0x30(%rbp),%rdi
mov    -0x4(%rbp),%edx
lea    0xebd(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x30(%rbp),%rax
mov    %rax,-0x38(%rbp)
jmp    1160 <openmap+0x40>
lea    0xeb2(%rip),%rax
mov    %rax,-0x38(%rbp)
mov    -0x38(%rbp),%rdi
mov    0x2e7d(%rip),%rax
mov    (%rax),%esi
call   1030 <open@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<openmap>:
push   %rbx
sub    $0x20,%rsp
test   %edi,%edi
je     113f <openmap+0x1f>
mov    %edi,%edx
mov    %rsp,%rbx
lea    0xecb(%rip),%rsi
mov    %rbx,%rdi
call   1040 <sprintf@plt>
jmp    1146 <openmap+0x26>
lea    0xec8(%rip),%rbx
mov    0x2e9b(%rip),%rax
mov    (%rax),%esi
mov    %rbx,%rdi
call   1030 <open@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"/proc/%d/maps\00"
@.str.1 = [16 x i8] c"/proc/self/maps\00"
@O_RDONLY = global i32 0
define i32 @openmap(i32 %0) {
%2 = alloca i32
%3 = alloca [32 x i8]
%4 = alloca i8*
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = getelementptr inbounds [32 x i8], [32 x i8]* %3, i64 0, i64 0
%9 = load i32, i32* %2
%10 = call i32 @sprintf(i8* %8, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = getelementptr inbounds [32 x i8], [32 x i8]* %3, i64 0, i64 0
store i8* %11, i8** %4
br label %13
12: ; preds = %1
store i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i8** %4
br label %13
13: ; preds = %12, %7
%14 = load i8*, i8** %4
%15 = load i32, i32* @O_RDONLY
%16 = call i32 @open(i8* %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
@.str = [14 x i8] c"/proc/%d/maps\00"
@.str.1 = [16 x i8] c"/proc/self/maps\00"
@O_RDONLY = global i32 0
define i32 @openmap(i32 %0) {
%2 = alloca [32 x i8]
%3 = getelementptr inbounds [32 x i8], [32 x i8]* %2, i64 0, i64 0
%4 = icmp eq i32 %0, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %0)
br label %7
7: ; preds = %1, %5
%8 = phi i8* [ %3, %5 ], [ getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), %1 ]
%9 = load i32, i32* @O_RDONLY
%10 = call i32 @open(i8* %8, i32 %9)
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ pwmOff();
int /*<<< orphan*/ pwmOn();
int /*<<< orphan*/ system(char *);
void indietro() {
  printf("INDIETRO\n\r");
  pwmOff();
  pwmOn();
  system("echo  15500000 > /sys/class/pwm/pwmchip0/pwm0/duty_cycle");
  system("echo  1450000 > /sys/class/pwm/pwmchip0/pwm1/duty_cycle");
}


x86 assembly (clang, -O0):
<indietro>:
push   %rbp
mov    %rsp,%rbp
lea    0xeb5(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1060 <pwmOff@plt>
mov    $0x0,%al
call   1050 <pwmOn@plt>
lea    0xea6(%rip),%rdi
call   1030 <system@plt>
lea    0xed3(%rip),%rdi
call   1030 <system@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<indietro>:
push   %rax
lea    0xeb8(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
call   1060 <pwmOff@plt>
xor    %eax,%eax
call   1050 <pwmOn@plt>
lea    0xea9(%rip),%rdi
call   1030 <system@plt>
lea    0xed6(%rip),%rdi
pop    %rax
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"INDIETRO\0A\0D\00"
@.str.1 = [57 x i8] c"echo 15500000 > /sys/class/pwm/pwmchip0/pwm0/duty_cycle\00"
@.str.2 = [56 x i8] c"echo 1450000 > /sys/class/pwm/pwmchip0/pwm1/duty_cycle\00"
define void @indietro() {
%1 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @pwmOff()
%3 = call i32 (...) @pwmOn()
%4 = call i32 @system(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str.1, i64 0, i64 0))
%5 = call i32 @system(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"INDIETRO\0A\0D\00"
@.str.1 = [57 x i8] c"echo 15500000 > /sys/class/pwm/pwmchip0/pwm0/duty_cycle\00"
@.str.2 = [56 x i8] c"echo 1450000 > /sys/class/pwm/pwmchip0/pwm1/duty_cycle\00"
define void @indietro() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @pwmOff()
%3 = tail call i32 (...) @pwmOn()
%4 = tail call i32 @system(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 @system(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str.2, i64 0, i64 0))
ret void
}
int norm2(double *t) {
  unsigned e, f, g;
  f = ((((unsigned *)t)[1]) >> 1);
  e = ((unsigned *)t)[1];
  f += 0x1FF80000;
  g = (e & 0x000FFFFF);
  f &= 0xFFF00000;
  ((int *)t)[1] = g + 0x40000000 - (e & 0x00100000);
  return (f);
}


x86 assembly (clang, -O0):
<norm2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
shr    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1ff80000,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
and    $0xfffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
and    $0xfff00000,%eax
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%ecx
add    $0x40000000,%ecx
mov    -0xc(%rbp),%eax
and    $0x100000,%eax
sub    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<norm2>:
mov    0x4(%rdi),%ecx
mov    %ecx,%eax
shr    %eax
add    $0x1ff80000,%eax
mov    %ecx,%edx
and    $0xfffff,%edx
and    $0xfff00000,%eax
or     $0x40000000,%edx
and    $0x100000,%ecx
sub    %ecx,%edx
mov    %edx,0x4(%rdi)
ret

LLVM IR (-O0):
define i32 @norm2(double* %0) {
%2 = alloca double*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store double* %0, double** %2
%6 = load double*, double** %2
%7 = bitcast double* %6 to i32*
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = lshr i32 %9, 1
store i32 %10, i32* %4
%11 = load double*, double** %2
%12 = bitcast double* %11 to i32*
%13 = getelementptr inbounds i32, i32* %12, i64 1
%14 = load i32, i32* %13
store i32 %14, i32* %3
%15 = load i32, i32* %4
%16 = add i32 %15, 536346624
store i32 %16, i32* %4
%17 = load i32, i32* %3
%18 = and i32 %17, 1048575
store i32 %18, i32* %5
%19 = load i32, i32* %4
%20 = and i32 %19, -1048576
store i32 %20, i32* %4
%21 = load i32, i32* %5
%22 = add i32 %21, 1073741824
%23 = load i32, i32* %3
%24 = and i32 %23, 1048576
%25 = sub i32 %22, %24
%26 = load double*, double** %2
%27 = bitcast double* %26 to i32*
%28 = getelementptr inbounds i32, i32* %27, i64 1
store i32 %25, i32* %28
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @norm2(double* nocapture %0) {
%2 = bitcast double* %0 to i32*
%3 = getelementptr inbounds i32, i32* %2, i64 1
%4 = load i32, i32* %3
%5 = lshr i32 %4, 1
%6 = add nuw i32 %5, 536346624
%7 = and i32 %4, 1048575
%8 = and i32 %6, -1048576
%9 = or i32 %7, 1073741824
%10 = and i32 %4, 1048576
%11 = sub nuw nsw i32 %9, %10
store i32 %11, i32* %3
ret i32 %8
}