xunge/DecIR huggingface dataset:
/* Variables and functions */
double nextDouble();
void rndVector(double *vector, int nbCol) {
  for (int i = 0; i < nbCol; i++) {
    vector[i] = nextDouble();
  }
}


x86 assembly (clang, -O0):
<rndVector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1154 <rndVector+0x44>
mov    $0x0,%al
call   1030 <nextDouble@plt>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movsd  %xmm0,(%rax,%rcx,8)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <rndVector+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rndVector>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1146 <rndVector+0x36>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <nextDouble@plt>
movsd  %xmm0,(%r14,%rbx,8)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <rndVector+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @rndVector(double* %0, i32 %1) {
%3 = alloca double*
%4 = alloca i32
%5 = alloca i32
store double* %0, double** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %16, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = call double (...) @nextDouble()
%12 = load double*, double** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds double, double* %12, i64 %14
store double %11, double* %15
br label %16
16: ; preds = %10
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 1
store i32 %18, i32* %5
br label %6
19: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @rndVector(double* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %7
6: ; preds = %7, %2
ret void
7: ; preds = %4, %7
%8 = phi i64 [ 0, %4 ], [ %11, %7 ]
%9 = tail call double (...) @nextDouble()
%10 = getelementptr inbounds double, double* %0, i64 %8
store double %9, double* %10
%11 = add nuw nsw i64 %8, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %6, label %7
}
/* Variables and functions */
int /*<<< orphan*/ abort();
char *gets(char *s) {
  ;
  abort();
  return 0;
}


x86 assembly (clang, -O0):
<gets>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<gets>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i8* @gets(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define noalias i8* @gets(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int i2cslave_Read(int /*<<< orphan*/);
unsigned i2c0slave_Read(void) { return i2cslave_Read(0); }


x86 assembly (clang, -O0):
<i2c0slave_Read>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <i2cslave_Read@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c0slave_Read>:
xor    %edi,%edi
jmp    1030 <i2cslave_Read@plt>

LLVM IR (-O0):
define i32 @i2c0slave_Read() {
%1 = call i32 @i2cslave_Read(i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @i2c0slave_Read() {
%1 = tail call i32 @i2cslave_Read(i32 0)
ret i32 %1
}
int test_imm_C1uint8_mem(unsigned char *val) {
  return ((*val) & (0xC1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C1uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xc1,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C1uint8_mem>:
testb  $0xc1,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C1uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 193
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C1uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -63
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int is_square(int c) {
  int j = 1;
  c = c % 3;
  while (j < 3) {
    if (c == ((j * j) % 3))
      return (1);
    j++;
  }
  return (0);
}


x86 assembly (clang, -O0):
<is_square>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
cmpl   $0x3,-0xc(%rbp)
jge    1160 <is_square+0x60>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
mov    -0x10(%rbp),%eax
cmp    %edx,%eax
jne    1152 <is_square+0x52>
movl   $0x1,-0x4(%rbp)
jmp    1167 <is_square+0x67>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    111c <is_square+0x1c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_square>:
movslq %edi,%rcx
imul   $0x55555556,%rcx,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rax
add    %edx,%eax
lea    (%rax,%rax,2),%eax
sub    %eax,%ecx
xor    %eax,%eax
cmp    $0x1,%ecx
sete   %al
ret

LLVM IR (-O0):
define i32 @is_square(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 1, i32* %4
%5 = load i32, i32* %3
%6 = srem i32 %5, 3
store i32 %6, i32* %3
br label %7
7: ; preds = %18, %1
%8 = load i32, i32* %4
%9 = icmp slt i32 %8, 3
br i1 %9, label %10, label %21
10: ; preds = %7
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = load i32, i32* %4
%14 = mul nsw i32 %12, %13
%15 = srem i32 %14, 3
%16 = icmp eq i32 %11, %15
br i1 %16, label %17, label %18
17: ; preds = %10
store i32 1, i32* %2
br label %22
18: ; preds = %10
%19 = load i32, i32* %4
%20 = add nsw i32 %19, 1
store i32 %20, i32* %4
br label %7
21: ; preds = %7
store i32 0, i32* %2
br label %22
22: ; preds = %21, %17
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @is_square(i32 %0) {
%2 = srem i32 %0, 3
%3 = icmp eq i32 %2, 1
%4 = zext i1 %3 to i32
ret i32 %4
}
int test_imm_BDint16_reg(short val) {
  return ((val) & (0xBD << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_BDint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xbd,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_BDint16_reg>:
test   $0xbd,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_BDint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 189
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_BDint16_reg(i16 signext %0) {
%2 = and i16 %0, 189
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int strchr(char *, int);
int isspace(int c) { return strchr(" \n\t", c); }


x86 assembly (clang, -O0):
<isspace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <strchr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isspace>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <strchr@plt>

LLVM IR (-O0):
@.str = [4 x i8] c" \0A\09\00"
define i32 @isspace(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @strchr(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 %4
}

LLVM IR (-O2):
@.str = [4 x i8] c" \0A\09\00"
define i32 @isspace(i32 %0) {
%2 = tail call i32 @strchr(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i32 %2
}
const char *pathconN_nm4_name_out(int i) {
  switch (i) {
  case 0:
    return "o0";
  case 1:
    return "o1";
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<pathconN_nm4_name_out>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
test   %eax,%eax
je     112b <pathconN_nm4_name_out+0x2b>
jmp    111a <pathconN_nm4_name_out+0x1a>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
je     113b <pathconN_nm4_name_out+0x3b>
jmp    114b <pathconN_nm4_name_out+0x4b>
lea    0xece(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <pathconN_nm4_name_out+0x53>
lea    0xec1(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <pathconN_nm4_name_out+0x53>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathconN_nm4_name_out>:
xor    %ecx,%ecx
cmp    $0x1,%edi
lea    0xef7(%rip),%rax
cmove  %rax,%rcx
test   %edi,%edi
lea    0xee7(%rip),%rax
cmovne %rcx,%rax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"o0\00"
@.str.1 = [3 x i8] c"o1\00"
define i8* @pathconN_nm4_name_out(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %7 [
i32 0, label %5
i32 1, label %6
]
5: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %2
br label %8
6: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %8
7: ; preds = %1
store i8* null, i8** %2
br label %8
8: ; preds = %7, %6, %5
%9 = load i8*, i8** %2
ret i8* %9
}

LLVM IR (-O2):
@.str = [3 x i8] c"o0\00"
@.str.1 = [3 x i8] c"o1\00"
define i8* @pathconN_nm4_name_out(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = select i1 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* null
%4 = icmp eq i32 %0, 0
%5 = select i1 %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3
ret i8* %5
}
/* Variables and functions */
int xstrcmp(char *const, char *const);
int cmpsort(const void *p1, const void *p2) {
  return xstrcmp(*(char *const *)p1, *(char *const *)p2);
}


x86 assembly (clang, -O0):
<cmpsort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <xstrcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmpsort>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <xstrcmp@plt>

LLVM IR (-O0):
define i32 @cmpsort(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i8**
%7 = load i8*, i8** %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i8**
%10 = load i8*, i8** %9
%11 = call i32 @xstrcmp(i8* %7, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @cmpsort(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @xstrcmp(i8* %4, i8* %6)
ret i32 %7
}
void ff_hevc_put_hevc_bi_w_epel_hv8_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_epel_hv8_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_epel_hv8_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_epel_hv8_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_epel_hv8_12_sse4() {
ret void
}
int has_sendfile(void) { return 0; }


x86 assembly (clang, -O0):
<has_sendfile>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<has_sendfile>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @has_sendfile() {
ret i32 0
}

LLVM IR (-O2):
define i32 @has_sendfile() {
ret i32 0
}
void maximize(int *result, int value) {
  *result = *result > value ? *result : value;
}


x86 assembly (clang, -O0):
<maximize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
cmp    -0xc(%rbp),%eax
jle    1128 <maximize+0x28>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
jmp    112e <maximize+0x2e>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<maximize>:
mov    (%rdi),%eax
cmp    %esi,%eax
cmovg  %eax,%esi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @maximize(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load i32, i32* %4
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load i32*, i32** %3
%11 = load i32, i32* %10
br label %14
12: ; preds = %2
%13 = load i32, i32* %4
br label %14
14: ; preds = %12, %9
%15 = phi i32 [ %11, %9 ], [ %13, %12 ]
%16 = load i32*, i32** %3
store i32 %15, i32* %16
ret void
}

LLVM IR (-O2):
define void @maximize(i32* nocapture %0, i32 %1) {
%3 = load i32, i32* %0
%4 = icmp sgt i32 %3, %1
%5 = select i1 %4, i32 %3, i32 %1
store i32 %5, i32* %0
ret void
}
void MergeUVRow_AVX2() {}


x86 assembly (clang, -O0):
<MergeUVRow_AVX2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MergeUVRow_AVX2>:
ret

LLVM IR (-O0):
define void @MergeUVRow_AVX2() {
ret void
}

LLVM IR (-O2):
define void @MergeUVRow_AVX2() {
ret void
}
/* Type definitions */
typedef char *int64_t;

/* Variables and functions */
int64_t atomic_fetchadd64(volatile void *ptr, int64_t addend) {
  int64_t result;
  __asm__ __volatile__("lock\n\txadd"
                       "q"
                       " %0,%1"
                       : "=r"(result), "=m"(*(volatile int64_t *)ptr)
                       : "0"(addend), "m"(*(volatile int64_t *)ptr)
                       : "memory");
  return result;
}


x86 assembly (clang, -O0):
<atomic_fetchadd64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
lock xadd %rax,(%rcx)
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_fetchadd64>:
mov    %rsi,%rax
lock xadd %rax,(%rdi)
ret

LLVM IR (-O0):
define i8* @atomic_fetchadd64(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i8**
%8 = load i8*, i8** %4
%9 = load i8*, i8** %3
%10 = bitcast i8* %9 to i8**
%11 = call i8* asm sideeffect "lock\0A\09xaddq $0,$1", "=r,=*m,0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i8** elementtype(i8*) %7, i8* %8, i8** elementtype(i8*) %10)
store i8* %11, i8** %5
%12 = load i8*, i8** %5
ret i8* %12
}

LLVM IR (-O2):
define i8* @atomic_fetchadd64(i8* %0, i8* %1) {
%3 = bitcast i8* %0 to i8**
%4 = tail call i8* asm sideeffect "lock\0A\09xaddq $0,$1", "=r,=*m,0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i8** elementtype(i8*) %3, i8* %1, i8** elementtype(i8*) %3)
ret i8* %4
}
int test_imm_A7uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0xA7 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A7uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0xa7,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A7uint64_highword_mem>:
testb  $0xa7,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A7uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 167
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_A7uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 717259538432
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char, char *);
int main() {
  printf("Hola %c %s\n", 'a', "todos");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x61,%esi
lea    0xeda(%rip),%rdx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xeed(%rip),%rdx
mov    $0x61,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"Hola %c %s\0A\00"
@.str.1 = [6 x i8] c"todos\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8 signext 97, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"Hola %c %s\0A\00"
@.str.1 = [6 x i8] c"todos\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8 signext 97, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ WatchdogEnable();
void WatchdogIntEnable(void) { WatchdogEnable(); }


x86 assembly (clang, -O0):
<WatchdogIntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <WatchdogEnable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<WatchdogIntEnable>:
xor    %eax,%eax
jmp    1030 <WatchdogEnable@plt>

LLVM IR (-O0):
define void @WatchdogIntEnable() {
%1 = call i32 (...) @WatchdogEnable()
ret void
}

LLVM IR (-O2):
define void @WatchdogIntEnable() {
%1 = tail call i32 (...) @WatchdogEnable()
ret void
}
void type_adts_placeholder(void) {}


x86 assembly (clang, -O0):
<type_adts_placeholder>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<type_adts_placeholder>:
ret

LLVM IR (-O0):
define void @type_adts_placeholder() {
ret void
}

LLVM IR (-O2):
define void @type_adts_placeholder() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ help();
int /*<<< orphan*/ initialize();
int /*<<< orphan*/ process(int, char **);
int main(int argc, char *argv[]) {
  initialize();
  if (argc < 2) {
    help();
    return 1;
  }
  process(argc, argv);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <initialize@plt>
cmpl   $0x2,-0x8(%rbp)
jge    116a <main+0x3a>
mov    $0x0,%al
call   1050 <help@plt>
movl   $0x1,-0x4(%rbp)
jmp    117d <main+0x4d>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <process@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %edi,%ebp
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <initialize@plt>
cmp    $0x1,%ebp
jg     1155 <main+0x25>
xor    %eax,%eax
call   1050 <help@plt>
mov    $0x1,%ebx
jmp    115f <main+0x2f>
mov    %ebp,%edi
mov    %r14,%rsi
call   1030 <process@plt>
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @initialize()
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 2
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 (...) @help()
store i32 1, i32* %3
br label %15
11: ; preds = %2
%12 = load i32, i32* %4
%13 = load i8**, i8*** %5
%14 = call i32 @process(i32 %12, i8** %13)
store i32 0, i32* %3
br label %15
15: ; preds = %11, %9
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 (...) @initialize()
%4 = icmp slt i32 %0, 2
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 (...) @help()
br label %9
7: ; preds = %2
%8 = tail call i32 @process(i32 %0, i8** %1)
br label %9
9: ; preds = %7, %5
%10 = phi i32 [ 1, %5 ], [ 0, %7 ]
ret i32 %10
}
int cvmx_helper_setup_red(int pass_thresh, int drop_thresh) { return 0; }


x86 assembly (clang, -O0):
<cvmx_helper_setup_red>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvmx_helper_setup_red>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @cvmx_helper_setup_red(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @cvmx_helper_setup_red(i32 %0, i32 %1) {
ret i32 0
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int64_t signum(int64_t a) { return (a >> 63) - ((-a) >> 63); }


x86 assembly (clang, -O0):
<signum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3f,%ecx
sar    %cl,%eax
xor    %edx,%edx
sub    -0x4(%rbp),%edx
mov    $0x3f,%ecx
sar    %cl,%edx
mov    %edx,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signum>:
ret

LLVM IR (-O0):
define i32 @signum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 63
%5 = load i32, i32* %2
%6 = sub nsw i32 0, %5
%7 = ashr i32 %6, 63
%8 = sub nsw i32 %4, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @signum(i32 %0) {
ret i32 poison
}
/* Variables and functions */
int /*<<< orphan*/ shmobile_cpuidle_init();
int /*<<< orphan*/ shmobile_suspend_init();
void shmobile_init_late(void) {
  shmobile_suspend_init();
  shmobile_cpuidle_init();
}


x86 assembly (clang, -O0):
<shmobile_init_late>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <shmobile_suspend_init@plt>
mov    $0x0,%al
call   1030 <shmobile_cpuidle_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmobile_init_late>:
push   %rax
xor    %eax,%eax
call   1040 <shmobile_suspend_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <shmobile_cpuidle_init@plt>

LLVM IR (-O0):
define void @shmobile_init_late() {
%1 = call i32 (...) @shmobile_suspend_init()
%2 = call i32 (...) @shmobile_cpuidle_init()
ret void
}

LLVM IR (-O2):
define void @shmobile_init_late() {
%1 = tail call i32 (...) @shmobile_suspend_init()
%2 = tail call i32 (...) @shmobile_cpuidle_init()
ret void
}
/* Variables and functions */
int natoi(const char *str, size_t len) {
  unsigned int i, r = 0;
  for (i = 0; i < len; i++) {
    r *= 10;
    r += str[i] - '0';
  }
  return r;
}


x86 assembly (clang, -O0):
<natoi>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x18(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%rax
jae    1150 <natoi+0x50>
imul   $0xa,-0x18(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x14(%rbp),%ecx
movsbl (%rax,%rcx,1),%eax
sub    $0x30,%eax
add    -0x18(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    111a <natoi+0x1a>
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<natoi>:
test   %rsi,%rsi
je     1126 <natoi+0x26>
xor    %ecx,%ecx
xor    %eax,%eax
nopl   0x0(%rax)
lea    (%rax,%rax,4),%eax
movsbl (%rdi,%rcx,1),%edx
lea    (%rdx,%rax,2),%eax
add    $0xffffffd0,%eax
add    $0x1,%ecx
cmp    %rsi,%rcx
jb     1110 <natoi+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @natoi(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i64 %1, i64* %4
store i32 0, i32* %6
store i32 0, i32* %5
br label %7
7: ; preds = %24, %2
%8 = load i32, i32* %5
%9 = zext i32 %8 to i64
%10 = load i64, i64* %4
%11 = icmp ult i64 %9, %10
br i1 %11, label %12, label %27
12: ; preds = %7
%13 = load i32, i32* %6
%14 = mul i32 %13, 10
store i32 %14, i32* %6
%15 = load i8*, i8** %3
%16 = load i32, i32* %5
%17 = zext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
%20 = sext i8 %19 to i32
%21 = sub nsw i32 %20, 48
%22 = load i32, i32* %6
%23 = add i32 %22, %21
store i32 %23, i32* %6
br label %24
24: ; preds = %12
%25 = load i32, i32* %5
%26 = add i32 %25, 1
store i32 %26, i32* %5
br label %7
27: ; preds = %7
%28 = load i32, i32* %6
ret i32 %28
}

LLVM IR (-O2):
define i32 @natoi(i8* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %16, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %14, %4 ], [ 0, %2 ]
%6 = phi i32 [ %12, %4 ], [ 0, %2 ]
%7 = mul i32 %6, 10
%8 = getelementptr inbounds i8, i8* %0, i64 %5
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = add i32 %7, -48
%12 = add i32 %11, %10
%13 = add nuw nsw i64 %5, 1
%14 = and i64 %13, 4294967295
%15 = icmp ult i64 %14, %1
br i1 %15, label %4, label %16
16: ; preds = %4, %2
%17 = phi i32 [ 0, %2 ], [ %12, %4 ]
ret i32 %17
}
int add_mod_int(int a, int b, int m) {
  a += b;
  if (a >= m)
    a -= m;
  return a;
}


x86 assembly (clang, -O0):
<add_mod_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0xc(%rbp),%eax
jl     112d <add_mod_int+0x2d>
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_mod_int>:
lea    (%rdi,%rsi,1),%eax
xor    %ecx,%ecx
cmp    %edx,%eax
cmovge %edx,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @add_mod_int(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = add nsw i32 %8, %7
store i32 %9, i32* %4
%10 = load i32, i32* %4
%11 = load i32, i32* %6
%12 = icmp sge i32 %10, %11
br i1 %12, label %13, label %17
13: ; preds = %3
%14 = load i32, i32* %6
%15 = load i32, i32* %4
%16 = sub nsw i32 %15, %14
store i32 %16, i32* %4
br label %17
17: ; preds = %13, %3
%18 = load i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
define i32 @add_mod_int(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %1, %0
%5 = icmp slt i32 %4, %2
%6 = select i1 %5, i32 0, i32 %2
%7 = sub nsw i32 %4, %6
ret i32 %7
}
/* Variables and functions */
size_t rnd(int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char const *);
char rndchar(const char *s) { return s[rnd(strlen(s))]; }


x86 assembly (clang, -O0):
<rndchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%edi
call   1040 <rnd@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
movsbl (%rax,%rcx,1),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rndchar>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %eax,%edi
call   1040 <rnd@plt>
mov    (%rbx,%rax,1),%al
pop    %rbx
ret

LLVM IR (-O0):
define signext i8 @rndchar(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = call i64 @rnd(i32 %5)
%7 = getelementptr inbounds i8, i8* %3, i64 %6
%8 = load i8, i8* %7
ret i8 %8
}

LLVM IR (-O2):
define signext i8 @rndchar(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i64 @rnd(i32 %2)
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
ret i8 %5
}
long long Fibonacci(unsigned int n) {
  if (n == 0) {
    return 0;
  }
  if (n == 1) {
    return 1;
  }
  return Fibonacci(n - 1) + Fibonacci(n - 2);
}


x86 assembly (clang, -O0):
<Fibonacci>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1132 <Fibonacci+0x22>
movq   $0x0,-0x8(%rbp)
jmp    1171 <Fibonacci+0x61>
cmpl   $0x1,-0xc(%rbp)
jne    1149 <Fibonacci+0x39>
movq   $0x1,-0x8(%rbp)
jmp    1171 <Fibonacci+0x61>
mov    -0xc(%rbp),%edi
sub    $0x1,%edi
call   1030 <Fibonacci@plt>
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%edi
sub    $0x2,%edi
call   1030 <Fibonacci@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Fibonacci>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %r14d,%r14d
test   %ebx,%ebx
je     1137 <Fibonacci+0x27>
nopl   (%rax)
cmp    $0x1,%ebx
je     113b <Fibonacci+0x2b>
lea    -0x1(%rbx),%edi
call   1030 <Fibonacci@plt>
add    %rax,%r14
add    $0xfffffffe,%ebx
test   %ebx,%ebx
jne    1120 <Fibonacci+0x10>
xor    %eax,%eax
jmp    1140 <Fibonacci+0x30>
mov    $0x1,%eax
add    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @Fibonacci(i32 %0) {
%2 = alloca i64
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 0, i64* %2
br label %19
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %7
store i64 1, i64* %2
br label %19
11: ; preds = %7
%12 = load i32, i32* %3
%13 = sub i32 %12, 1
%14 = call i64 @Fibonacci(i32 %13)
%15 = load i32, i32* %3
%16 = sub i32 %15, 2
%17 = call i64 @Fibonacci(i32 %16)
%18 = add nsw i64 %14, %17
store i64 %18, i64* %2
br label %19
19: ; preds = %11, %10, %6
%20 = load i64, i64* %2
ret i64 %20
}

LLVM IR (-O2):
define i64 @Fibonacci(i32 %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i64 [ 0, %1 ], [ %9, %5 ]
%4 = phi i32 [ %0, %1 ], [ %8, %5 ]
switch i32 %4, label %5 [
i32 0, label %10
i32 1, label %11
]
5: ; preds = %2
%6 = add i32 %4, -1
%7 = tail call i64 @Fibonacci(i32 %6)
%8 = add i32 %4, -2
%9 = add nsw i64 %7, %3
br label %2
10: ; preds = %2
br label %11
11: ; preds = %2, %10
%12 = phi i64 [ 0, %10 ], [ 1, %2 ]
%13 = add nsw i64 %12, %3
ret i64 %13
}
void third(int arg3) {
  int var3 = arg3;
  int *a = 0;
  a[0] = var3;
}


x86 assembly (clang, -O0):
<third>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define void @third(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %2
%5 = load i32, i32* %2
store i32 %5, i32* %3
store i32* null, i32** %4
%6 = load i32, i32* %3
%7 = load i32*, i32** %4
%8 = getelementptr inbounds i32, i32* %7, i64 0
store i32 %6, i32* %8
ret void
}

LLVM IR (-O2):
/* Variables and functions */
int /*<<< orphan*/ fwrite(unsigned long long *, int, int, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void write_key_iv(unsigned long long int *iv) { fwrite(iv, 64, 8, stderr); }


x86 assembly (clang, -O0):
<write_key_iv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rax
mov    (%rax),%ecx
mov    $0x40,%esi
mov    $0x8,%edx
call   1030 <fwrite@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_key_iv>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%ecx
mov    $0x40,%esi
mov    $0x8,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@stderr = global i32 0
define void @write_key_iv(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i32, i32* @stderr
%5 = call i32 @fwrite(i64* %3, i32 64, i32 8, i32 %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
define void @write_key_iv(i64* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fwrite(i64* %0, i32 64, i32 8, i32 %2)
ret void
}
void anx_dbg_event(const char *name, int status) {}


x86 assembly (clang, -O0):
<anx_dbg_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<anx_dbg_event>:
ret

LLVM IR (-O0):
define void @anx_dbg_event(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @anx_dbg_event(i8* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ PrintWarning();
int /*<<< orphan*/ RedrawKeys();
void SetLFlFile() {
  RedrawKeys();
  PrintWarning();
}


x86 assembly (clang, -O0):
<SetLFlFile>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <RedrawKeys@plt>
mov    $0x0,%al
call   1030 <PrintWarning@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetLFlFile>:
push   %rax
xor    %eax,%eax
call   1040 <RedrawKeys@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <PrintWarning@plt>

LLVM IR (-O0):
define void @SetLFlFile() {
%1 = call i32 (...) @RedrawKeys()
%2 = call i32 (...) @PrintWarning()
ret void
}

LLVM IR (-O2):
define void @SetLFlFile() {
%1 = tail call i32 (...) @RedrawKeys()
%2 = tail call i32 (...) @PrintWarning()
ret void
}
void TestReturn(void) {}


x86 assembly (clang, -O0):
<TestReturn>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TestReturn>:
ret

LLVM IR (-O0):
define void @TestReturn() {
ret void
}

LLVM IR (-O2):
define void @TestReturn() {
ret void
}
double fadd(double a, double b) { return a + b; }


x86 assembly (clang, -O0):
<fadd>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fadd>:
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @fadd(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fadd double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @fadd(double %0, double %1) {
%3 = fadd double %0, %1
ret double %3
}
void rop3_84_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = T | S;
  stk2 = ~stk2;
  stk1 = *D | stk2;
  stk1 = ~stk1;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_84_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0x9(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_84_1_1>:
or     %edx,%esi
and    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_84_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8, i8* %6
%10 = zext i8 %9 to i32
%11 = load i8, i8* %5
%12 = zext i8 %11 to i32
%13 = or i32 %10, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %8
%15 = load i8, i8* %8
%16 = zext i8 %15 to i32
%17 = xor i32 %16, -1
%18 = trunc i32 %17 to i8
store i8 %18, i8* %8
%19 = load i8*, i8** %4
%20 = load i8, i8* %19
%21 = zext i8 %20 to i32
%22 = load i8, i8* %8
%23 = zext i8 %22 to i32
%24 = or i32 %21, %23
%25 = trunc i32 %24 to i8
store i8 %25, i8* %7
%26 = load i8, i8* %7
%27 = zext i8 %26 to i32
%28 = xor i32 %27, -1
%29 = trunc i32 %28 to i8
store i8 %29, i8* %7
%30 = load i8, i8* %7
%31 = zext i8 %30 to i32
%32 = load i8, i8* %5
%33 = zext i8 %32 to i32
%34 = xor i32 %33, -1
%35 = and i32 %31, %34
%36 = load i8, i8* %6
%37 = zext i8 %36 to i32
%38 = xor i32 %37, -1
%39 = and i32 %35, %38
%40 = load i8*, i8** %4
%41 = load i8, i8* %40
%42 = zext i8 %41 to i32
%43 = load i8, i8* %5
%44 = zext i8 %43 to i32
%45 = and i32 %42, %44
%46 = or i32 %39, %45
%47 = load i8*, i8** %4
%48 = load i8, i8* %47
%49 = zext i8 %48 to i32
%50 = load i8, i8* %6
%51 = zext i8 %50 to i32
%52 = and i32 %49, %51
%53 = or i32 %46, %52
%54 = trunc i32 %53 to i8
%55 = load i8*, i8** %4
store i8 %54, i8* %55
ret void
}

LLVM IR (-O2):
define void @rop3_84_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %2, %1
%6 = and i8 %4, %5
store i8 %6, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __builtin_arm_mcr2(int, int /*<<< orphan*/, unsigned int,
                                      int, int /*<<< orphan*/, int);
void mcr2(unsigned a) { __builtin_arm_mcr2(15, 0, a, 13, 0, 3); }


x86 assembly (clang, -O0):
<mcr2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0xf,%edi
xor    %r8d,%r8d
mov    $0xd,%ecx
mov    $0x3,%r9d
mov    %r8d,%esi
call   1030 <__builtin_arm_mcr2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mcr2>:
mov    %edi,%edx
mov    $0xf,%edi
xor    %esi,%esi
mov    $0xd,%ecx
xor    %r8d,%r8d
mov    $0x3,%r9d
jmp    1030 <__builtin_arm_mcr2@plt>

LLVM IR (-O0):
define void @mcr2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__builtin_arm_mcr2(i32 15, i32 0, i32 %3, i32 13, i32 0, i32 3)
ret void
}

LLVM IR (-O2):
define void @mcr2(i32 %0) {
%2 = tail call i32 @__builtin_arm_mcr2(i32 15, i32 0, i32 %0, i32 13, i32 0, i32 3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ core3_print(char *, char *, char const *);
void U_EMRSELECTCLIPPATH_print(const char *contents) {
  core3_print("U_EMRSELECTCLIPPATH", "iMode:", contents);
}


x86 assembly (clang, -O0):
<U_EMRSELECTCLIPPATH_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xee6(%rip),%rsi
call   1030 <core3_print@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRSELECTCLIPPATH_print>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xef3(%rip),%rsi
jmp    1030 <core3_print@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"U_EMRSELECTCLIPPATH\00"
@.str.1 = [7 x i8] c"iMode:\00"
define void @U_EMRSELECTCLIPPATH_print(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @core3_print(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [20 x i8] c"U_EMRSELECTCLIPPATH\00"
@.str.1 = [7 x i8] c"iMode:\00"
define void @U_EMRSELECTCLIPPATH_print(i8* %0) {
%2 = tail call i32 @core3_print(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int syscall(int, char const *);
int __pthread_chdir(const char *path) { return syscall(348, path); }


x86 assembly (clang, -O0):
<__pthread_chdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x15c,%edi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__pthread_chdir>:
mov    %rdi,%rsi
mov    $0x15c,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @__pthread_chdir(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @syscall(i32 348, i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @__pthread_chdir(i8* %0) {
%2 = tail call i32 @syscall(i32 348, i8* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ uart_tx_byte(int);
void dummy(void) { uart_tx_byte(5); }


x86 assembly (clang, -O0):
<dummy>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%edi
call   1030 <uart_tx_byte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy>:
mov    $0x5,%edi
jmp    1030 <uart_tx_byte@plt>

LLVM IR (-O0):
define void @dummy() {
%1 = call i32 @uart_tx_byte(i32 5)
ret void
}

LLVM IR (-O2):
define void @dummy() {
%1 = tail call i32 @uart_tx_byte(i32 5)
ret void
}
void *test_anti_range_90(int n) {
  extern void *alloc_anti_range_90(int) __attribute__((alloc_size(1)));
  if (0x7fffffff - 2 <= n && n <= 0x7fffffff - 1)
    n = 0x7fffffff - 2 - 1;
  return alloc_anti_range_90(n);
}


x86 assembly (clang, -O0):
<test_anti_range_90>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x7ffffffd,%eax
cmp    -0x4(%rbp),%eax
jg     113d <test_anti_range_90+0x2d>
cmpl   $0x7ffffffe,-0x4(%rbp)
jg     113d <test_anti_range_90+0x2d>
movl   $0x7ffffffc,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <alloc_anti_range_90@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_anti_range_90>:
lea    -0x7ffffffd(%rdi),%eax
cmp    $0x2,%eax
mov    $0x7ffffffc,%eax
cmovb  %eax,%edi
jmp    1030 <alloc_anti_range_90@plt>

LLVM IR (-O0):
define i8* @test_anti_range_90(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 2147483645, %3
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 2147483646
br i1 %7, label %8, label %9
8: ; preds = %5
store i32 2147483644, i32* %2
br label %9
9: ; preds = %8, %5, %1
%10 = load i32, i32* %2
%11 = call i8* @alloc_anti_range_90(i32 %10)
ret i8* %11
}

LLVM IR (-O2):
define i8* @test_anti_range_90(i32 %0) {
%2 = add i32 %0, -2147483645
%3 = icmp ult i32 %2, 2
%4 = select i1 %3, i32 2147483644, i32 %0
%5 = tail call i8* @alloc_anti_range_90(i32 %4)
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ test_keypair();
int /*<<< orphan*/ test_keypair_add();
int /*<<< orphan*/ test_xonly_pubkey();
int /*<<< orphan*/ test_xonly_pubkey_comparison();
int /*<<< orphan*/ test_xonly_pubkey_tweak();
int /*<<< orphan*/ test_xonly_pubkey_tweak_check();
int /*<<< orphan*/ test_xonly_pubkey_tweak_recursive();
void run_extrakeys_tests(void) {
  test_xonly_pubkey();
  test_xonly_pubkey_tweak();
  test_xonly_pubkey_tweak_check();
  test_xonly_pubkey_tweak_recursive();
  test_xonly_pubkey_comparison();
  test_keypair();
  test_keypair_add();
}


x86 assembly (clang, -O0):
<run_extrakeys_tests>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <test_xonly_pubkey@plt>
mov    $0x0,%al
call   1060 <test_xonly_pubkey_tweak@plt>
mov    $0x0,%al
call   1070 <test_xonly_pubkey_tweak_check@plt>
mov    $0x0,%al
call   1090 <test_xonly_pubkey_tweak_recursive@plt>
mov    $0x0,%al
call   1080 <test_xonly_pubkey_comparison@plt>
mov    $0x0,%al
call   1050 <test_keypair@plt>
mov    $0x0,%al
call   1040 <test_keypair_add@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<run_extrakeys_tests>:
push   %rax
xor    %eax,%eax
call   1030 <test_xonly_pubkey@plt>
xor    %eax,%eax
call   1060 <test_xonly_pubkey_tweak@plt>
xor    %eax,%eax
call   1070 <test_xonly_pubkey_tweak_check@plt>
xor    %eax,%eax
call   1090 <test_xonly_pubkey_tweak_recursive@plt>
xor    %eax,%eax
call   1080 <test_xonly_pubkey_comparison@plt>
xor    %eax,%eax
call   1050 <test_keypair@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <test_keypair_add@plt>

LLVM IR (-O0):
define void @run_extrakeys_tests() {
%1 = call i32 (...) @test_xonly_pubkey()
%2 = call i32 (...) @test_xonly_pubkey_tweak()
%3 = call i32 (...) @test_xonly_pubkey_tweak_check()
%4 = call i32 (...) @test_xonly_pubkey_tweak_recursive()
%5 = call i32 (...) @test_xonly_pubkey_comparison()
%6 = call i32 (...) @test_keypair()
%7 = call i32 (...) @test_keypair_add()
ret void
}

LLVM IR (-O2):
define void @run_extrakeys_tests() {
%1 = tail call i32 (...) @test_xonly_pubkey()
%2 = tail call i32 (...) @test_xonly_pubkey_tweak()
%3 = tail call i32 (...) @test_xonly_pubkey_tweak_check()
%4 = tail call i32 (...) @test_xonly_pubkey_tweak_recursive()
%5 = tail call i32 (...) @test_xonly_pubkey_comparison()
%6 = tail call i32 (...) @test_keypair()
%7 = tail call i32 (...) @test_keypair_add()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ KAPI_save_as_header_name(int /*<<< orphan*/ *, char *);
int /*<<< orphan*/ fwrite(char *, int, int, int /*<<< orphan*/ *);
void KAPI_save_as_header_name_list(FILE *fp, char *pch) {
  FILE *fpTmp = fp;
  KAPI_save_as_header_name(fp, pch);
  fwrite(",", sizeof(char), 1, fpTmp);
}


x86 assembly (clang, -O0):
<KAPI_save_as_header_name_list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <KAPI_save_as_header_name@plt>
mov    -0x18(%rbp),%rcx
lea    0xeb0(%rip),%rdi
mov    $0x1,%edx
mov    %edx,%esi
call   1040 <fwrite@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<KAPI_save_as_header_name_list>:
push   %rbx
mov    %rdi,%rbx
call   1040 <KAPI_save_as_header_name@plt>
mov    $0x2c,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <fputc@plt>

LLVM IR (-O0):
@.str = [2 x i8] c",\00"
define void @KAPI_save_as_header_name_list(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
%5 = alloca i32*
store i32* %0, i32** %3
store i8* %1, i8** %4
%6 = load i32*, i32** %3
store i32* %6, i32** %5
%7 = load i32*, i32** %3
%8 = load i8*, i8** %4
%9 = call i32 @KAPI_save_as_header_name(i32* %7, i8* %8)
%10 = load i32*, i32** %5
%11 = call i32 @fwrite(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1, i32 1, i32* %10)
ret void
}

LLVM IR (-O2):
define void @KAPI_save_as_header_name_list(i32* %0, i8* %1) {
%3 = tail call i32 @KAPI_save_as_header_name(i32* %0, i8* %1)
%4 = tail call i32 @fputc(i32 44, i32* %0)
ret void
}
void draw2s_(x, y) short *x, *y;
{ draw((float)*x, (float)*y, 0.0); }


x86 assembly (clang, -O0):
<draw2s_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%eax
cvtsi2ss %eax,%xmm0
cvtss2sd %xmm0,%xmm0
mov    -0x10(%rbp),%rax
movswl (%rax),%eax
cvtsi2ss %eax,%xmm1
cvtss2sd %xmm1,%xmm1
xorps  %xmm2,%xmm2
mov    $0x3,%al
call   1030 <draw@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<draw2s_>:
movswl (%rdi),%eax
cvtsi2sd %eax,%xmm0
movswl (%rsi),%eax
cvtsi2sd %eax,%xmm1
xorps  %xmm2,%xmm2
mov    $0x3,%al
jmp    1030 <draw@plt>

LLVM IR (-O0):
define void @draw2s_(i16* %0, i16* %1) {
%3 = alloca i16*
%4 = alloca i16*
store i16* %0, i16** %3
store i16* %1, i16** %4
%5 = load i16*, i16** %3
%6 = load i16, i16* %5
%7 = sitofp i16 %6 to float
%8 = fpext float %7 to double
%9 = load i16*, i16** %4
%10 = load i16, i16* %9
%11 = sitofp i16 %10 to float
%12 = fpext float %11 to double
%13 = call i32 (double, double, double, ...) bitcast (i32 (...)* @draw to i32 (double, double, double, ...)*)(double %8, double %12, double 0.000000e+00)
ret void
}

LLVM IR (-O2):
define void @draw2s_(i16* nocapture %0, i16* nocapture %1) {
%3 = load i16, i16* %0
%4 = sitofp i16 %3 to double
%5 = load i16, i16* %1
%6 = sitofp i16 %5 to double
%7 = tail call i32 (double, double, double, ...) bitcast (i32 (...)* @draw to i32 (double, double, double, ...)*)(double %4, double %6, double 0.000000e+00)
ret void
}
/* Variables and functions */
int osrandom_rand_bytes(unsigned char *, int);
int osrandom_pseudo_rand_bytes(unsigned char *buffer, int size) {
  int res = osrandom_rand_bytes(buffer, size);
  if (res == 0) {
    return -1;
  } else {
    return res;
  }
}


x86 assembly (clang, -O0):
<osrandom_pseudo_rand_bytes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <osrandom_rand_bytes@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jne    1144 <osrandom_pseudo_rand_bytes+0x34>
movl   $0xffffffff,-0x4(%rbp)
jmp    114a <osrandom_pseudo_rand_bytes+0x3a>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<osrandom_pseudo_rand_bytes>:
push   %rax
call   1030 <osrandom_rand_bytes@plt>
cmp    $0x1,%eax
sbb    %ecx,%ecx
or     %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @osrandom_pseudo_rand_bytes(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = call i32 @osrandom_rand_bytes(i8* %7, i32 %8)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %2
store i32 -1, i32* %3
br label %15
13: ; preds = %2
%14 = load i32, i32* %6
store i32 %14, i32* %3
br label %15
15: ; preds = %13, %12
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @osrandom_pseudo_rand_bytes(i8* %0, i32 %1) {
%3 = tail call i32 @osrandom_rand_bytes(i8* %0, i32 %1)
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -1, i32 %3
ret i32 %5
}