xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
size_t check_FAT16(uint64_t num_cluster) {
  if (num_cluster < 4087)
    return 4087;
  else if (num_cluster < 65527)
    return num_cluster;
  return 0;
}


x86 assembly (clang, -O0):
<check_FAT16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
cmpl   $0xff7,-0xc(%rbp)
jge    1121 <check_FAT16+0x21>
movq   $0xff7,-0x8(%rbp)
jmp    1148 <check_FAT16+0x48>
cmpl   $0xfff7,-0xc(%rbp)
jge    113b <check_FAT16+0x3b>
movslq -0xc(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1148 <check_FAT16+0x48>
jmp    1140 <check_FAT16+0x40>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_FAT16>:
xor    %eax,%eax
cmp    $0xfff7,%edi
cmovl  %edi,%eax
cmp    $0xff7,%edi
mov    $0xff7,%ecx
cmovge %eax,%ecx
movslq %ecx,%rax
ret

LLVM IR (-O0):
define i64 @check_FAT16(i32 %0) {
%2 = alloca i64
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 4087
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 4087, i64* %2
br label %15
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 65527
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = load i32, i32* %3
%12 = sext i32 %11 to i64
store i64 %12, i64* %2
br label %15
13: ; preds = %7
br label %14
14: ; preds = %13
store i64 0, i64* %2
br label %15
15: ; preds = %14, %10, %6
%16 = load i64, i64* %2
ret i64 %16
}

LLVM IR (-O2):
define i64 @check_FAT16(i32 %0) {
%2 = icmp slt i32 %0, 4087
%3 = icmp slt i32 %0, 65527
%4 = select i1 %3, i32 %0, i32 0
%5 = select i1 %2, i32 4087, i32 %4
%6 = sext i32 %5 to i64
ret i64 %6
}
void Host_SwapGraphicsBuffers(void) {}


x86 assembly (clang, -O0):
<Host_SwapGraphicsBuffers>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Host_SwapGraphicsBuffers>:
ret

LLVM IR (-O0):
define void @Host_SwapGraphicsBuffers() {
ret void
}

LLVM IR (-O2):
define void @Host_SwapGraphicsBuffers() {
ret void
}
void pixie_lower_thread_priority() {}


x86 assembly (clang, -O0):
<pixie_lower_thread_priority>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pixie_lower_thread_priority>:
ret

LLVM IR (-O0):
define void @pixie_lower_thread_priority() {
ret void
}

LLVM IR (-O2):
define void @pixie_lower_thread_priority() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo1();
int /*<<< orphan*/ putchar(char);
int foo2(void) {
  foo1();
  putchar('a');
  return 0;
}


x86 assembly (clang, -O0):
<foo2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <foo1@plt>
mov    $0x61,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo2>:
push   %rax
xor    %eax,%eax
call   1040 <foo1@plt>
mov    $0x61,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @foo2() {
%1 = call i32 (...) @foo1()
%2 = call i32 @putchar(i8 signext 97)
ret i32 0
}

LLVM IR (-O2):
define i32 @foo2() {
%1 = tail call i32 (...) @foo1()
%2 = tail call i32 @putchar(i8 signext 97)
ret i32 0
}
/* Variables and functions */
double __expm1(double);
double __sgn1(double);
double tanh(double __x) {
  register double __exm1 = __expm1(__x);
  return __exm1 / (__exm1 + 2.0) * __sgn1(-__x);
}


x86 assembly (clang, -O0):
<tanh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__expm1@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xeb7(%rip),%xmm1
addsd  -0x10(%rbp),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
call   1040 <__sgn1@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
mulsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tanh>:
sub    $0x28,%rsp
movapd %xmm0,0x10(%rsp)
call   1030 <__expm1@plt>
movsd  0xec9(%rip),%xmm1
addsd  %xmm0,%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,0x8(%rsp)
movapd 0x10(%rsp),%xmm0
xorpd  0xebd(%rip),%xmm0
call   1040 <__sgn1@plt>
mulsd  0x8(%rsp),%xmm0
add    $0x28,%rsp
ret

LLVM IR (-O0):
define double @tanh(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = call double @__expm1(double %4)
store double %5, double* %3
%6 = load double, double* %3
%7 = load double, double* %3
%8 = fadd double %7, 2.000000e+00
%9 = fdiv double %6, %8
%10 = load double, double* %2
%11 = fneg double %10
%12 = call double @__sgn1(double %11)
%13 = fmul double %9, %12
ret double %13
}

LLVM IR (-O2):
define double @tanh(double %0) {
%2 = tail call double @__expm1(double %0)
%3 = fadd double %2, 2.000000e+00
%4 = fdiv double %2, %3
%5 = fneg double %0
%6 = tail call double @__sgn1(double %5)
%7 = fmul double %6, %4
ret double %7
}
/* Type definitions */
struct sembuf {
  int sem_op;
  int /*<<< orphan*/ sem_flg;
  scalar_t__ sem_num;
};

/* Variables and functions */
int /*<<< orphan*/ SEM_UNDO;
int semop(int, struct sembuf *, int);
int spsem_get(int sem_id) {
  struct sembuf sem_buf;
  sem_buf.sem_num = 0;
  sem_buf.sem_op = -1;
  sem_buf.sem_flg = SEM_UNDO;
  if (semop(sem_id, &sem_buf, 1) == -1) {
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<spsem_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
movl   $0xffffffff,-0x18(%rbp)
mov    0x2ebf(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%edi
lea    -0x18(%rbp),%rsi
mov    $0x1,%edx
call   1030 <semop@plt>
cmp    $0xffffffff,%eax
jne    115c <spsem_get+0x4c>
movl   $0x0,-0x4(%rbp)
jmp    1163 <spsem_get+0x53>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spsem_get>:
sub    $0x18,%rsp
movq   $0x0,0x10(%rsp)
movl   $0xffffffff,0x8(%rsp)
ff
mov    0x2ec4(%rip),%rax
mov    (%rax),%eax
mov    %eax,0xc(%rsp)
lea    0x8(%rsp),%rsi
mov    $0x1,%edx
call   1030 <semop@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
setne  %cl
mov    %ecx,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.sembuf = type { i32, i32, i64 }
@SEM_UNDO = global i32 0
define i32 @spsem_get(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca %struct.sembuf
store i32 %0, i32* %3
%5 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %4, i32 0, i32 2
store i64 0, i64* %5
%6 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %4, i32 0, i32 0
store i32 -1, i32* %6
%7 = load i32, i32* @SEM_UNDO
%8 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %4, i32 0, i32 1
store i32 %7, i32* %8
%9 = load i32, i32* %3
%10 = call i32 @semop(i32 %9, %struct.sembuf* %4, i32 1)
%11 = icmp eq i32 %10, -1
br i1 %11, label %12, label %13
12: ; preds = %1
store i32 0, i32* %2
br label %14
13: ; preds = %1
store i32 1, i32* %2
br label %14
14: ; preds = %13, %12
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
%struct.sembuf = type { i32, i32, i64 }
@SEM_UNDO = global i32 0
define i32 @spsem_get(i32 %0) {
%2 = alloca %struct.sembuf
%3 = bitcast %struct.sembuf* %2 to i8*
%4 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %2, i64 0, i32 2
store i64 0, i64* %4
%5 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %2, i64 0, i32 0
store i32 -1, i32* %5
%6 = load i32, i32* @SEM_UNDO
%7 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %2, i64 0, i32 1
store i32 %6, i32* %7
%8 = call i32 @semop(i32 %0, %struct.sembuf* %2, i32 1)
%9 = icmp ne i32 %8, -1
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
scalar_t__ getpid();
uint64_t getMachineId() { return (uint64_t)getpid() % (2 << (2)); }


x86 assembly (clang, -O0):
<getMachineId>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getpid@plt>
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getMachineId>:
push   %rax
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0x7(%rax),%ecx
test   %eax,%eax
cmovns %eax,%ecx
and    $0xfffffff8,%ecx
sub    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @getMachineId() {
%1 = call i64 (...) @getpid()
%2 = trunc i64 %1 to i32
%3 = srem i32 %2, 8
ret i32 %3
}

LLVM IR (-O2):
define i32 @getMachineId() {
%1 = tail call i64 (...) @getpid()
%2 = trunc i64 %1 to i32
%3 = srem i32 %2, 8
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ Machine_Check(int, char *);
void set_word(int32_t id, int32_t addr, int32_t value) {
  Machine_Check(0x00000008 | 0x00000002, "pio_term registers are byte wide");
}


x86 assembly (clang, -O0):
<set_word>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    $0xa,%edi
lea    0xed3(%rip),%rsi
call   1030 <Machine_Check@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_word>:
lea    0xee9(%rip),%rsi
mov    $0xa,%edi
jmp    1030 <Machine_Check@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"pio_term registers are byte wide\00"
define void @set_word(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = call i32 @Machine_Check(i32 10, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"pio_term registers are byte wide\00"
define void @set_word(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @Machine_Check(i32 10, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ inithermitcat(long, double, double *, double *);
int /*<<< orphan*/ initlaguerrecat(long, double, double *, double *);
void initgammacat(long categs, double alpha, double *rate, double *probcat) {
  if (alpha >= 100.0)
    inithermitcat(categs, alpha, rate, probcat);
  else
    initlaguerrecat(categs, alpha, rate, probcat);
}


x86 assembly (clang, -O0):
<initgammacat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xeba(%rip),%xmm1
ucomisd %xmm1,%xmm0
jb     116b <initgammacat+0x4b>
mov    -0x8(%rbp),%rdi
movsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1040 <inithermitcat@plt>
jmp    1181 <initgammacat+0x61>
mov    -0x8(%rbp),%rdi
movsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <initlaguerrecat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initgammacat>:
ucomisd 0xed8(%rip),%xmm0
jae    112f <initgammacat+0xf>
jmp    1030 <initlaguerrecat@plt>
jmp    1040 <inithermitcat@plt>

LLVM IR (-O0):
define void @initgammacat(i64 %0, double %1, double* %2, double* %3) {
%5 = alloca i64
%6 = alloca double
%7 = alloca double*
%8 = alloca double*
store i64 %0, i64* %5
store double %1, double* %6
store double* %2, double** %7
store double* %3, double** %8
%9 = load double, double* %6
%10 = fcmp oge double %9, 1.000000e+02
br i1 %10, label %11, label %17
11: ; preds = %4
%12 = load i64, i64* %5
%13 = load double, double* %6
%14 = load double*, double** %7
%15 = load double*, double** %8
%16 = call i32 @inithermitcat(i64 %12, double %13, double* %14, double* %15)
br label %23
17: ; preds = %4
%18 = load i64, i64* %5
%19 = load double, double* %6
%20 = load double*, double** %7
%21 = load double*, double** %8
%22 = call i32 @initlaguerrecat(i64 %18, double %19, double* %20, double* %21)
br label %23
23: ; preds = %17, %11
ret void
}

LLVM IR (-O2):
define void @initgammacat(i64 %0, double %1, double* %2, double* %3) {
%5 = fcmp ult double %1, 1.000000e+02
br i1 %5, label %8, label %6
6: ; preds = %4
%7 = tail call i32 @inithermitcat(i64 %0, double %1, double* %2, double* %3)
br label %10
8: ; preds = %4
%9 = tail call i32 @initlaguerrecat(i64 %0, double %1, double* %2, double* %3)
br label %10
10: ; preds = %8, %6
ret void
}
/* Variables and functions */
size_t simple_parse(char const *, size_t, char);
size_t protocol_parser_carbon(const char *instr, size_t inlen) {
  return simple_parse(instr, inlen, ' ');
}


x86 assembly (clang, -O0):
<protocol_parser_carbon>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x20,%edx
call   1030 <simple_parse@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<protocol_parser_carbon>:
mov    $0x20,%edx
jmp    1030 <simple_parse@plt>

LLVM IR (-O0):
define i64 @protocol_parser_carbon(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i64 @simple_parse(i8* %5, i64 %6, i8 signext 32)
ret i64 %7
}

LLVM IR (-O2):
define i64 @protocol_parser_carbon(i8* %0, i64 %1) {
%3 = tail call i64 @simple_parse(i8* %0, i64 %1, i8 signext 32)
ret i64 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ *malloc(int);
uint8_t *do_cast() {
  uint32_t *p = malloc(sizeof(uint32_t) * 8);
  return (uint8_t *)p;
}


x86 assembly (clang, -O0):
<do_cast>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x20,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_cast>:
mov    $0x20,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i32* @do_cast() {
%1 = alloca i32*
%2 = call i32* @malloc(i32 32)
store i32* %2, i32** %1
%3 = load i32*, i32** %1
ret i32* %3
}

LLVM IR (-O2):
define noalias i32* @do_cast() {
%1 = tail call i32* @malloc(i32 32)
ret i32* %1
}
void swap(int *a, int x, int y) {
  int tmp;
  tmp = a[x];
  a[x] = a[y];
  a[y] = tmp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
store i32 %12, i32* %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
store i32 %17, i32* %21
%22 = load i32, i32* %7
%23 = load i32*, i32** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
store i32 %9, i32* %5
store i32 %6, i32* %8
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ temp;

/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ memset(char *, int /*<<< orphan*/, int);
char *strchr(char *, char);
int /*<<< orphan*/ strcpy(char *, char *);
char *getvalue(char *s) {
  char *temp = malloc(255), *c;
  memset(temp, 0, sizeof(temp));
  if ((c = strchr(s, '=')) != NULL) {
    strcpy(temp, (c + 1));
  }
  return temp;
}


x86 assembly (clang, -O0):
<getvalue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xff,%edi
call   1060 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
mov    $0x8,%edx
call   1050 <memset@plt>
mov    -0x8(%rbp),%rdi
mov    $0x3d,%esi
call   1040 <strchr@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
je     1197 <getvalue+0x57>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
add    $0x1,%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getvalue>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    $0xff,%edi
call   1060 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %esi,%esi
mov    $0x8,%edx
call   1050 <memset@plt>
mov    %r14,%rdi
mov    $0x3d,%esi
call   1040 <strchr@plt>
test   %rax,%rax
je     1184 <getvalue+0x44>
add    $0x1,%rax
mov    %rbx,%rdi
mov    %rax,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @getvalue(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
%5 = call i8* @malloc(i32 255)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @memset(i8* %6, i32 0, i32 8)
%8 = load i8*, i8** %2
%9 = call i8* @strchr(i8* %8, i8 signext 61)
store i8* %9, i8** %4
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %16
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = load i8*, i8** %4
%14 = getelementptr inbounds i8, i8* %13, i64 1
%15 = call i32 @strcpy(i8* %12, i8* %14)
br label %16
16: ; preds = %11, %1
%17 = load i8*, i8** %3
ret i8* %17
}

LLVM IR (-O2):
define i8* @getvalue(i8* %0) {
%2 = tail call dereferenceable_or_null(255) i8* @malloc(i32 255)
%3 = tail call i32 @memset(i8* %2, i32 0, i32 8)
%4 = tail call i8* @strchr(i8* dereferenceable(1) %0, i8 signext 61)
%5 = icmp eq i8* %4, null
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = getelementptr inbounds i8, i8* %4, i64 1
%8 = tail call i32 @strcpy(i8* %2, i8* %7)
br label %9
9: ; preds = %6, %1
ret i8* %2
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t get_rt(int32_t instruction) { return (instruction & 0x001f0000) >> 16; }


x86 assembly (clang, -O0):
<get_rt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1f0000,%eax
sar    $0x10,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_rt>:
mov    %edi,%eax
shr    $0x10,%eax
and    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @get_rt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 2031616
%5 = ashr i32 %4, 16
ret i32 %5
}

LLVM IR (-O2):
define i32 @get_rt(i32 %0) {
%2 = lshr i32 %0, 16
%3 = and i32 %2, 31
ret i32 %3
}
/* Variables and functions */
double ceil(double);
double floor(double);
double tillwhole(double loc, double vel) {
  if (vel > 0)
    return ceil(loc) - loc;
  return floor(loc) - loc;
}


x86 assembly (clang, -O0):
<tillwhole>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    115d <tillwhole+0x3d>
movsd  -0x10(%rbp),%xmm0
call   1030 <ceil@plt>
subsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1171 <tillwhole+0x51>
movsd  -0x10(%rbp),%xmm0
call   1040 <floor@plt>
subsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tillwhole>:
push   %rax
xorpd  %xmm2,%xmm2
ucomisd %xmm2,%xmm1
movsd  %xmm0,(%rsp)
jbe    1137 <tillwhole+0x17>
call   1030 <ceil@plt>
jmp    113c <tillwhole+0x1c>
call   1040 <floor@plt>
subsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @tillwhole(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %5
%7 = fcmp ogt double %6, 0.000000e+00
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load double, double* %4
%10 = call double @llvm.ceil.f64(double %9)
%11 = load double, double* %4
%12 = fsub double %10, %11
store double %12, double* %3
br label %18
13: ; preds = %2
%14 = load double, double* %4
%15 = call double @llvm.floor.f64(double %14)
%16 = load double, double* %4
%17 = fsub double %15, %16
store double %17, double* %3
br label %18
18: ; preds = %13, %8
%19 = load double, double* %3
ret double %19
}

LLVM IR (-O2):
define double @tillwhole(double %0, double %1) {
%3 = fcmp ogt double %1, 0.000000e+00
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call double @llvm.ceil.f64(double %0)
br label %8
6: ; preds = %2
%7 = tail call double @llvm.floor.f64(double %0)
br label %8
8: ; preds = %6, %4
%9 = phi double [ %5, %4 ], [ %7, %6 ]
%10 = fsub double %9, %0
ret double %10
}
/* Variables and functions */
int /*<<< orphan*/ helloworld();
int main() {
  helloworld();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <helloworld@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <helloworld@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @helloworld()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @helloworld()
ret i32 0
}
void final_check(const struct ebt_u_entry *entry,
                 const struct ebt_entry_watcher *watcher, const char *name,
                 unsigned int hookmask, unsigned int time) {
  return;
}


x86 assembly (clang, -O0):
<final_check>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<final_check>:
ret

LLVM IR (-O0):
%struct.ebt_u_entry = type opaque
%struct.ebt_entry_watcher = type opaque
define void @final_check(%struct.ebt_u_entry* %0, %struct.ebt_entry_watcher* %1, i8* %2, i32 %3, i32 %4) {
%6 = alloca %struct.ebt_u_entry*
%7 = alloca %struct.ebt_entry_watcher*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
store %struct.ebt_u_entry* %0, %struct.ebt_u_entry** %6
store %struct.ebt_entry_watcher* %1, %struct.ebt_entry_watcher** %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
ret void
}

LLVM IR (-O2):
%struct.ebt_u_entry = type opaque
%struct.ebt_entry_watcher = type opaque
define void @final_check(%struct.ebt_u_entry* nocapture %0, %struct.ebt_entry_watcher* nocapture %1, i8* nocapture %2, i32 %3, i32 %4) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ StudentModel_displayStudentInfo(char *);
void Controller_displayStudentInfo(char studentNumber[]) {
  StudentModel_displayStudentInfo(studentNumber);
}


x86 assembly (clang, -O0):
<Controller_displayStudentInfo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <StudentModel_displayStudentInfo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Controller_displayStudentInfo>:
jmp    1030 <StudentModel_displayStudentInfo@plt>

LLVM IR (-O0):
define void @Controller_displayStudentInfo(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @StudentModel_displayStudentInfo(i8* %3)
ret void
}

LLVM IR (-O2):
define void @Controller_displayStudentInfo(i8* %0) {
%2 = tail call i32 @StudentModel_displayStudentInfo(i8* %0)
ret void
}
int get_pulses(int i) { return i < 8 ? i : (8 + (i & 7)) << ((i >> 3) - 1); }


x86 assembly (clang, -O0):
<get_pulses>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x8,-0x4(%rbp)
jge    111c <get_pulses+0x1c>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1133 <get_pulses+0x33>
mov    -0x4(%rbp),%eax
and    $0x7,%eax
add    $0x8,%eax
mov    -0x4(%rbp),%ecx
sar    $0x3,%ecx
sub    $0x1,%ecx
shl    %cl,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_pulses>:
mov    %edi,%eax
cmp    $0x8,%edi
jl     111a <get_pulses+0x1a>
mov    %eax,%edx
and    $0x7,%edx
or     $0x8,%edx
shr    $0x3,%eax
add    $0xff,%al
mov    %eax,%ecx
shl    %cl,%edx
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @get_pulses(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 8
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i32, i32* %2
br label %15
7: ; preds = %1
%8 = load i32, i32* %2
%9 = and i32 %8, 7
%10 = add nsw i32 8, %9
%11 = load i32, i32* %2
%12 = ashr i32 %11, 3
%13 = sub nsw i32 %12, 1
%14 = shl i32 %10, %13
br label %15
15: ; preds = %7, %5
%16 = phi i32 [ %6, %5 ], [ %14, %7 ]
ret i32 %16
}

LLVM IR (-O2):
define i32 @get_pulses(i32 %0) {
%2 = icmp slt i32 %0, 8
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = and i32 %0, 7
%5 = or i32 %4, 8
%6 = lshr i32 %0, 3
%7 = add nsw i32 %6, -1
%8 = shl i32 %5, %7
br label %9
9: ; preds = %1, %3
%10 = phi i32 [ %8, %3 ], [ %0, %1 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ put32(unsigned long);
int /*<<< orphan*/ put8(int);
void cmp_m32_imm32(void *_m32, unsigned long imm32) {
  unsigned long *m32 = (unsigned long *)_m32;
  put8(0x81);
  put8(0x3D);
  put32((unsigned long)(m32));
  put32(imm32);
}


x86 assembly (clang, -O0):
<cmp_m32_imm32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    $0x81,%edi
call   1030 <put8@plt>
mov    $0x3d,%edi
call   1030 <put8@plt>
mov    -0x18(%rbp),%rdi
call   1040 <put32@plt>
mov    -0x10(%rbp),%rdi
call   1040 <put32@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp_m32_imm32>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    $0x81,%edi
call   1030 <put8@plt>
mov    $0x3d,%edi
call   1030 <put8@plt>
mov    %rbx,%rdi
call   1040 <put32@plt>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <put32@plt>

LLVM IR (-O0):
define void @cmp_m32_imm32(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i64*
store i64* %7, i64** %5
%8 = call i32 @put8(i32 129)
%9 = call i32 @put8(i32 61)
%10 = load i64*, i64** %5
%11 = ptrtoint i64* %10 to i64
%12 = call i32 @put32(i64 %11)
%13 = load i64, i64* %4
%14 = call i32 @put32(i64 %13)
ret void
}

LLVM IR (-O2):
define void @cmp_m32_imm32(i8* %0, i64 %1) {
%3 = tail call i32 @put8(i32 129)
%4 = tail call i32 @put8(i32 61)
%5 = ptrtoint i8* %0 to i64
%6 = tail call i32 @put32(i64 %5)
%7 = tail call i32 @put32(i64 %1)
ret void
}
int test_imm_24int8_reg(signed char val) {
  return ((val) & (-0x24 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_24int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffffdc,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_24int8_reg>:
test   $0xdc,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_24int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -36
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_24int8_reg(i8 signext %0) {
%2 = and i8 %0, -36
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
long double fmal(long double x, long double y, long double z) {
  return x * y + z;
}


x86 assembly (clang, -O0):
<fmal>:
push   %rbp
mov    %rsp,%rbp
fldt   0x30(%rbp)
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fstpt  -0x30(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
fldt   -0x30(%rbp)
fxch   %st(2)
fmulp  %st,%st(1)
faddp  %st,%st(1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmal>:
fldt   0x28(%rsp)
fldt   0x18(%rsp)
fldt   0x8(%rsp)
fmulp  %st,%st(1)
faddp  %st,%st(1)
ret

LLVM IR (-O0):
define x86_fp80 @fmal(x86_fp80 %0, x86_fp80 %1, x86_fp80 %2) {
%4 = alloca x86_fp80
%5 = alloca x86_fp80
%6 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %4
store x86_fp80 %1, x86_fp80* %5
store x86_fp80 %2, x86_fp80* %6
%7 = load x86_fp80, x86_fp80* %4
%8 = load x86_fp80, x86_fp80* %5
%9 = load x86_fp80, x86_fp80* %6
%10 = call x86_fp80 @llvm.fmuladd.f80(x86_fp80 %7, x86_fp80 %8, x86_fp80 %9)
ret x86_fp80 %10
}

LLVM IR (-O2):
define x86_fp80 @fmal(x86_fp80 %0, x86_fp80 %1, x86_fp80 %2) {
%4 = tail call x86_fp80 @llvm.fmuladd.f80(x86_fp80 %0, x86_fp80 %1, x86_fp80 %2)
ret x86_fp80 %4
}
/* Variables and functions */
int /*<<< orphan*/ mark_cur(char);
void mark_jump(void) { mark_cur('\''); }


x86 assembly (clang, -O0):
<mark_jump>:
push   %rbp
mov    %rsp,%rbp
mov    $0x27,%edi
call   1030 <mark_cur@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mark_jump>:
mov    $0x27,%edi
jmp    1030 <mark_cur@plt>

LLVM IR (-O0):
define void @mark_jump() {
%1 = call i32 @mark_cur(i8 signext 39)
ret void
}

LLVM IR (-O2):
define void @mark_jump() {
%1 = tail call i32 @mark_cur(i8 signext 39)
ret void
}
void av_opt_find() {}


x86 assembly (clang, -O0):
<av_opt_find>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_opt_find>:
ret

LLVM IR (-O0):
define void @av_opt_find() {
ret void
}

LLVM IR (-O2):
define void @av_opt_find() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Wreg(int);
int /*<<< orphan*/ Ws(char *);
void wrdddddrrrr(int code) {
  int d = (code >> 4) & 0x1f;
  int r = ((code >> 5) & 0x10) | (code & 0x0f);
  Wreg(d);
  Ws(", ");
  Wreg(r);
}


x86 assembly (clang, -O0):
<wrdddddrrrr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
and    $0x1f,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x5,%eax
and    $0x10,%eax
mov    -0x4(%rbp),%ecx
and    $0xf,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <Wreg@plt>
lea    0xea6(%rip),%rdi
call   1030 <Ws@plt>
mov    -0xc(%rbp),%edi
call   1040 <Wreg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrdddddrrrr>:
push   %rbx
mov    %edi,%ebx
shr    $0x4,%edi
and    $0x1f,%edi
mov    %ebx,%eax
shr    $0x5,%eax
and    $0x10,%eax
and    $0xf,%ebx
or     %eax,%ebx
call   1040 <Wreg@plt>
lea    0xebe(%rip),%rdi
call   1030 <Ws@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <Wreg@plt>

LLVM IR (-O0):
@.str = [3 x i8] c", \00"
define void @wrdddddrrrr(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = ashr i32 %5, 4
%7 = and i32 %6, 31
store i32 %7, i32* %3
%8 = load i32, i32* %2
%9 = ashr i32 %8, 5
%10 = and i32 %9, 16
%11 = load i32, i32* %2
%12 = and i32 %11, 15
%13 = or i32 %10, %12
store i32 %13, i32* %4
%14 = load i32, i32* %3
%15 = call i32 @Wreg(i32 %14)
%16 = call i32 @Ws(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%17 = load i32, i32* %4
%18 = call i32 @Wreg(i32 %17)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c", \00"
define void @wrdddddrrrr(i32 %0) {
%2 = lshr i32 %0, 4
%3 = and i32 %2, 31
%4 = lshr i32 %0, 5
%5 = and i32 %4, 16
%6 = and i32 %0, 15
%7 = or i32 %5, %6
%8 = tail call i32 @Wreg(i32 %3)
%9 = tail call i32 @Ws(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%10 = tail call i32 @Wreg(i32 %7)
ret void
}
int has_tcpinfo(void) { return 1; }


x86 assembly (clang, -O0):
<has_tcpinfo>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<has_tcpinfo>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @has_tcpinfo() {
ret i32 1
}

LLVM IR (-O2):
define i32 @has_tcpinfo() {
ret i32 1
}
int board_get_ip(char *ipstr, char *snstr, char *gwstr) {
  ((void)ipstr);
  ((void)snstr);
  ((void)gwstr);
  return 0;
}


x86 assembly (clang, -O0):
<board_get_ip>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<board_get_ip>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @board_get_ip(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
ret i32 0
}

LLVM IR (-O2):
define i32 @board_get_ip(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
ret i32 0
}
unsigned int pal_dma_start_from_device(void *dma_target_buf,
                                       unsigned int length, void *host,
                                       void *dev) {
  return 0;
}


x86 assembly (clang, -O0):
<pal_dma_start_from_device>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pal_dma_start_from_device>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pal_dma_start_from_device(i8* %0, i32 %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
ret i32 0
}

LLVM IR (-O2):
define i32 @pal_dma_start_from_device(i8* nocapture readnone %0, i32 %1, i8* nocapture readnone %2, i8* nocapture readnone %3) {
ret i32 0
}
double val_at(double p[], int i, int j, int m, int n) { return p[i + j * m]; }


x86 assembly (clang, -O0):
<val_at>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    -0x10(%rbp),%edx
imul   -0x14(%rbp),%edx
add    %edx,%ecx
movslq %ecx,%rcx
movsd  (%rax,%rcx,8),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<val_at>:
imul   %ecx,%edx
add    %esi,%edx
movslq %edx,%rax
movsd  (%rdi,%rax,8),%xmm0
ret

LLVM IR (-O0):
define double @val_at(double* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca double*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store double* %0, double** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load double*, double** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = mul nsw i32 %13, %14
%16 = add nsw i32 %12, %15
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds double, double* %11, i64 %17
%19 = load double, double* %18
ret double %19
}

LLVM IR (-O2):
define double @val_at(double* nocapture %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = mul nsw i32 %3, %2
%7 = add nsw i32 %6, %1
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds double, double* %0, i64 %8
%10 = load double, double* %9
ret double %10
}
/* Variables and functions */
int /*<<< orphan*/ use_s1();
int main() {
  use_s1();
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <use_s1@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <use_s1@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @use_s1()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @use_s1()
ret i32 0
}
int ft_isprint(int c) { return (c >= 32 && c <= 126); }


x86 assembly (clang, -O0):
<ft_isprint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <ft_isprint+0x20>
cmpl   $0x7e,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isprint>:
add    $0xffffffe0,%edi
xor    %eax,%eax
cmp    $0x5f,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @ft_isprint(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 32
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 126
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @ft_isprint(i32 %0) {
%2 = add i32 %0, -32
%3 = icmp ult i32 %2, 95
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ OCSP_REQUEST;

/* Variables and functions */
scalar_t__ ASN1_item_new(int /*<<< orphan*/ *);
int /*<<< orphan*/ OCSP_REQUEST_it;
OCSP_REQUEST *OCSP_REQUEST_new(void) {
  return (OCSP_REQUEST *)ASN1_item_new(&OCSP_REQUEST_it);
}


x86 assembly (clang, -O0):
<OCSP_REQUEST_new>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rdi
call   1030 <ASN1_item_new@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<OCSP_REQUEST_new>:
mov    0x2ec9(%rip),%rdi
jmp    1030 <ASN1_item_new@plt>

LLVM IR (-O0):
@OCSP_REQUEST_it = global i32 0
define i32* @OCSP_REQUEST_new() {
%1 = call i64 @ASN1_item_new(i32* @OCSP_REQUEST_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}

LLVM IR (-O2):
@OCSP_REQUEST_it = global i32 0
define i32* @OCSP_REQUEST_new() {
%1 = tail call i64 @ASN1_item_new(i32* @OCSP_REQUEST_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ checkFileOpening(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char const *, char const *);
FILE *openFile(const char *file, const char *opentype) {
  FILE *filePtr = fopen(file, opentype);
  checkFileOpening(filePtr);
  return filePtr;
}


x86 assembly (clang, -O0):
<openFile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <checkFileOpening@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<openFile>:
push   %rbx
call   1040 <fopen@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1030 <checkFileOpening@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i32* @openFile(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i32* @fopen(i8* %6, i8* %7)
store i32* %8, i32** %5
%9 = load i32*, i32** %5
%10 = call i32 @checkFileOpening(i32* %9)
%11 = load i32*, i32** %5
ret i32* %11
}

LLVM IR (-O2):
define i32* @openFile(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32* @fopen(i8* %0, i8* %1)
%4 = tail call i32 @checkFileOpening(i32* %3)
ret i32* %3
}
/* Variables and functions */
int /*<<< orphan*/ insertLog(char *, char *);
int /*<<< orphan*/ mapCheatSeeAll();
void input_cheat_seeall(void) {
  mapCheatSeeAll();
  insertLog(
      "INFO: "
      "\"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
      "2022-01-22/02-19-57/repos/LauriM/Gunhack/refs/heads/master/src/input.c\""
      ":"
      "109",
      "Using see all cheat");
}


x86 assembly (clang, -O0):
<input_cheat_seeall>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <mapCheatSeeAll@plt>
lea    0xece(%rip),%rdi
lea    0xf5a(%rip),%rsi
call   1030 <insertLog@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<input_cheat_seeall>:
push   %rax
xor    %eax,%eax
call   1040 <mapCheatSeeAll@plt>
lea    0xed1(%rip),%rdi
lea    0xf5d(%rip),%rsi
pop    %rax
jmp    1030 <insertLog@plt>

LLVM IR (-O0):
@.str = [147 x i8] c"INFO: \22/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/LauriM/Gunhack/refs/heads/master/src/input.c\22:109\00"
@.str.1 = [20 x i8] c"Using see all cheat\00"
define void @input_cheat_seeall() {
%1 = call i32 (...) @mapCheatSeeAll()
%2 = call i32 @insertLog(i8* getelementptr inbounds ([147 x i8], [147 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [147 x i8] c"INFO: \22/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/LauriM/Gunhack/refs/heads/master/src/input.c\22:109\00"
@.str.1 = [20 x i8] c"Using see all cheat\00"
define void @input_cheat_seeall() {
%1 = tail call i32 (...) @mapCheatSeeAll()
%2 = tail call i32 @insertLog(i8* getelementptr inbounds ([147 x i8], [147 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int /*<<< orphan*/ tabuada(int);
int main() {
  int num;
  printf("Informe o numero a ser calculado: ");
  scanf("%d", &num);
  tabuada(num);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
lea    0xed1(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1050 <tabuada@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
lea    0xedf(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%edi
call   1050 <tabuada@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [35 x i8] c"Informe o numero a ser calculado: \00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = call i32 @tabuada(i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [35 x i8] c"Informe o numero a ser calculado: \00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @tabuada(i32 %5)
ret i32 0
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMRD4_get(void) { return U_WMRCORENONE_get("U_WMRD4"); }


x86 assembly (clang, -O0):
<U_WMRD4_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRD4_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMRD4\00"
define i32 @U_WMRD4_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMRD4\00"
define i32 @U_WMRD4_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
_Bool and (_Bool x, _Bool y) { return x && y; }


x86 assembly (clang, -O0):
<and>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
and    $0x1,%cl
mov    %cl,-0x1(%rbp)
and    $0x1,%al
mov    %al,-0x2(%rbp)
xor    %eax,%eax
testb  $0x1,-0x1(%rbp)
mov    %al,-0x3(%rbp)
je     112a <and+0x2a>
mov    -0x2(%rbp),%al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<and>:
mov    %edi,%eax
and    %esi,%eax
ret

LLVM IR (-O0):
define zeroext i1 @and(i1 zeroext %0, i1 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = zext i1 %0 to i8
store i8 %5, i8* %3
%6 = zext i1 %1 to i8
store i8 %6, i8* %4
%7 = load i8, i8* %3
%8 = trunc i8 %7 to i1
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load i8, i8* %4
%11 = trunc i8 %10 to i1
br label %12
12: ; preds = %9, %2
%13 = phi i1 [ false, %2 ], [ %11, %9 ]
ret i1 %13
}

LLVM IR (-O2):
define zeroext i1 @and(i1 zeroext %0, i1 zeroext %1) {
%3 = and i1 %0, %1
ret i1 %3
}
/* Variables and functions */
scalar_t__ CSLP_PollChar();
int getch();
int CSLP_GetChar() {
  int retVal = 0;
  if (CSLP_PollChar() > 0) {
    retVal = getch();
  }
  return retVal;
}


x86 assembly (clang, -O0):
<CSLP_GetChar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <CSLP_PollChar@plt>
cmp    $0x0,%rax
jle    114a <CSLP_GetChar+0x2a>
mov    $0x0,%al
call   1040 <getch@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CSLP_GetChar>:
push   %rax
xor    %eax,%eax
call   1030 <CSLP_PollChar@plt>
test   %rax,%rax
jle    1135 <CSLP_GetChar+0x15>
xor    %eax,%eax
pop    %rcx
jmp    1040 <getch@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @CSLP_GetChar() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 (...) @CSLP_PollChar()
%3 = icmp sgt i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @getch()
store i32 %5, i32* %1
br label %6
6: ; preds = %4, %0
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
define i32 @CSLP_GetChar() {
%1 = tail call i64 (...) @CSLP_PollChar()
%2 = icmp sgt i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @getch()
br label %5
5: ; preds = %3, %0
%6 = phi i32 [ %4, %3 ], [ 0, %0 ]
ret i32 %6
}
unsigned long long int m64p_swap64(unsigned long long int x) {
  return ((x & 0x00000000000000FFULL) << 56) |
         ((x & 0x000000000000FF00ULL) << 40) |
         ((x & 0x0000000000FF0000ULL) << 24) |
         ((x & 0x00000000FF000000ULL) << 8) |
         ((x & 0x000000FF00000000ULL) >> 8) |
         ((x & 0x0000FF0000000000ULL) >> 24) |
         ((x & 0x00FF000000000000ULL) >> 40) |
         ((x & 0xFF00000000000000ULL) >> 56);
}


x86 assembly (clang, -O0):
<m64p_swap64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0xff,%rax
shl    $0x38,%rax
mov    -0x8(%rbp),%rcx
and    $0xff00,%rcx
shl    $0x28,%rcx
or     %rcx,%rax
mov    -0x8(%rbp),%rcx
and    $0xff0000,%rcx
shl    $0x18,%rcx
or     %rcx,%rax
movabs $0xff000000,%rcx
and    -0x8(%rbp),%rcx
shl    $0x8,%rcx
or     %rcx,%rax
movabs $0xff00000000,%rcx
and    -0x8(%rbp),%rcx
shr    $0x8,%rcx
or     %rcx,%rax
movabs $0xff0000000000,%rcx
and    -0x8(%rbp),%rcx
shr    $0x18,%rcx
or     %rcx,%rax
movabs $0xff000000000000,%rcx
and    -0x8(%rbp),%rcx
shr    $0x28,%rcx
or     %rcx,%rax
movabs $0xff00000000000000,%rcx
and    -0x8(%rbp),%rcx
shr    $0x38,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<m64p_swap64>:
mov    %rdi,%rax
bswap  %rax
ret

LLVM IR (-O0):
define i64 @m64p_swap64(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 255
%5 = shl i64 %4, 56
%6 = load i64, i64* %2
%7 = and i64 %6, 65280
%8 = shl i64 %7, 40
%9 = or i64 %5, %8
%10 = load i64, i64* %2
%11 = and i64 %10, 16711680
%12 = shl i64 %11, 24
%13 = or i64 %9, %12
%14 = load i64, i64* %2
%15 = and i64 %14, 4278190080
%16 = shl i64 %15, 8
%17 = or i64 %13, %16
%18 = load i64, i64* %2
%19 = and i64 %18, 1095216660480
%20 = lshr i64 %19, 8
%21 = or i64 %17, %20
%22 = load i64, i64* %2
%23 = and i64 %22, 280375465082880
%24 = lshr i64 %23, 24
%25 = or i64 %21, %24
%26 = load i64, i64* %2
%27 = and i64 %26, 71776119061217280
%28 = lshr i64 %27, 40
%29 = or i64 %25, %28
%30 = load i64, i64* %2
%31 = and i64 %30, -72057594037927936
%32 = lshr i64 %31, 56
%33 = or i64 %29, %32
ret i64 %33
}

LLVM IR (-O2):
define i64 @m64p_swap64(i64 %0) {
%2 = tail call i64 @llvm.bswap.i64(i64 %0)
ret i64 %2
}