xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ chrlcaps(char);
char *strcasechr(char *in, char c) {
  while (*in) {
    if (chrlcaps(*in) == chrlcaps(c))
      break;
    in++;
  }
  return in;
}


x86 assembly (clang, -O0):
<strcasechr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     116e <strcasechr+0x5e>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <chrlcaps@plt>
mov    %rax,-0x18(%rbp)
movsbl -0x9(%rbp),%edi
call   1030 <chrlcaps@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
jne    115d <strcasechr+0x4d>
jmp    116e <strcasechr+0x5e>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1122 <strcasechr+0x12>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcasechr>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%al
test   %al,%al
je     1154 <strcasechr+0x44>
movsbl %sil,%r14d
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movsbl %al,%edi
call   1030 <chrlcaps@plt>
mov    %rax,%rbp
mov    %r14d,%edi
call   1030 <chrlcaps@plt>
cmp    %rax,%rbp
je     1154 <strcasechr+0x44>
movzbl 0x1(%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <strcasechr+0x20>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @strcasechr(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
br label %5
5: ; preds = %17, %2
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %20
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = call i64 @chrlcaps(i8 signext %11)
%13 = load i8, i8* %4
%14 = call i64 @chrlcaps(i8 signext %13)
%15 = icmp eq i64 %12, %14
br i1 %15, label %16, label %17
16: ; preds = %9
br label %20
17: ; preds = %9
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
br label %5
20: ; preds = %16, %5
%21 = load i8*, i8** %3
ret i8* %21
}

LLVM IR (-O2):
define i8* @strcasechr(i8* %0, i8 signext %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %11
%6 = phi i8 [ %13, %11 ], [ %3, %2 ]
%7 = phi i8* [ %12, %11 ], [ %0, %2 ]
%8 = tail call i64 @chrlcaps(i8 signext %6)
%9 = tail call i64 @chrlcaps(i8 signext %1)
%10 = icmp eq i64 %8, %9
br i1 %10, label %15, label %11
11: ; preds = %5
%12 = getelementptr inbounds i8, i8* %7, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %11, %5, %2
%16 = phi i8* [ %0, %2 ], [ %7, %5 ], [ %12, %11 ]
ret i8* %16
}
/* Variables and functions */
int /*<<< orphan*/ return_struct_vd1();
int /*<<< orphan*/ take_struct_vd1(int /*<<< orphan*/);
void test_struct_vd1() { take_struct_vd1(return_struct_vd1()); }


x86 assembly (clang, -O0):
<test_struct_vd1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <return_struct_vd1@plt>
mov    %eax,%edi
call   1030 <take_struct_vd1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_struct_vd1>:
push   %rax
xor    %eax,%eax
call   1040 <return_struct_vd1@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <take_struct_vd1@plt>

LLVM IR (-O0):
define void @test_struct_vd1() {
%1 = call i32 (...) @return_struct_vd1()
%2 = call i32 @take_struct_vd1(i32 %1)
ret void
}

LLVM IR (-O2):
define void @test_struct_vd1() {
%1 = tail call i32 (...) @return_struct_vd1()
%2 = tail call i32 @take_struct_vd1(i32 %1)
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
__attribute__((always_)) int64_t cvtInt64FromZigZag(const uint64_t value) {
  return (int64_t)((value >> 1) ^ (~(value & 1) + 1));
}


x86 assembly (clang, -O0):
<cvtInt64FromZigZag>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    -0x4(%rbp),%ecx
and    $0x1,%ecx
xor    $0xffffffff,%ecx
add    $0x1,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvtInt64FromZigZag>:
mov    %edi,%eax
sar    %eax
and    $0x1,%edi
neg    %edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @cvtInt64FromZigZag(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 1
%5 = load i32, i32* %2
%6 = and i32 %5, 1
%7 = xor i32 %6, -1
%8 = add nsw i32 %7, 1
%9 = xor i32 %4, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @cvtInt64FromZigZag(i32 %0) {
%2 = ashr i32 %0, 1
%3 = and i32 %0, 1
%4 = sub nsw i32 0, %3
%5 = xor i32 %2, %4
ret i32 %5
}
int ascending(int a, int b) { return a > b; }


x86 assembly (clang, -O0):
<ascending>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ascending>:
xor    %eax,%eax
cmp    %esi,%edi
setg   %al
ret

LLVM IR (-O0):
define i32 @ascending(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @ascending(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ foo();
void fn1(void) {
  if (0)
    foo();
  else
    switch (0)
      ;
}


x86 assembly (clang, -O0):
<fn1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn1>:
ret

LLVM IR (-O0):
define void @fn1() {
ret void
}

LLVM IR (-O2):
define void @fn1() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gca_cycle_left(void *, size_t, size_t, size_t);
void gca_cycle_right(void *_ptr, size_t n, size_t es, size_t shift) {
  if (!n || !shift)
    return;
  shift = shift % n;
  gca_cycle_left(_ptr, n, es, n - shift);
}


x86 assembly (clang, -O0):
<gca_cycle_right>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     113e <gca_cycle_right+0x2e>
cmpq   $0x0,-0x20(%rbp)
jne    1143 <gca_cycle_right+0x33>
jmp    116c <gca_cycle_right+0x5c>
mov    -0x20(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x10(%rbp),%rcx
sub    -0x20(%rbp),%rcx
call   1030 <gca_cycle_left@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gca_cycle_right>:
test   %rsi,%rsi
je     1133 <gca_cycle_right+0x23>
mov    %rcx,%rax
test   %rcx,%rcx
je     1133 <gca_cycle_right+0x23>
mov    %rdx,%r8
mov    %rax,%rcx
or     %rsi,%rcx
shr    $0x20,%rcx
je     1134 <gca_cycle_right+0x24>
xor    %edx,%edx
div    %rsi
jmp    1138 <gca_cycle_right+0x28>
ret
xor    %edx,%edx
div    %esi
mov    %rsi,%rcx
sub    %rdx,%rcx
mov    %r8,%rdx
jmp    1030 <gca_cycle_left@plt>

LLVM IR (-O0):
define void @gca_cycle_right(i8* %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %6
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %4
%12 = load i64, i64* %8
%13 = icmp ne i64 %12, 0
br i1 %13, label %15, label %14
14: ; preds = %11, %4
br label %26
15: ; preds = %11
%16 = load i64, i64* %8
%17 = load i64, i64* %6
%18 = urem i64 %16, %17
store i64 %18, i64* %8
%19 = load i8*, i8** %5
%20 = load i64, i64* %6
%21 = load i64, i64* %7
%22 = load i64, i64* %6
%23 = load i64, i64* %8
%24 = sub i64 %22, %23
%25 = call i32 @gca_cycle_left(i8* %19, i64 %20, i64 %21, i64 %24)
br label %26
26: ; preds = %15, %14
ret void
}

LLVM IR (-O2):
define void @gca_cycle_right(i8* %0, i64 %1, i64 %2, i64 %3) {
%5 = icmp ne i64 %1, 0
%6 = icmp ne i64 %3, 0
%7 = and i1 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %4
%9 = urem i64 %3, %1
%10 = sub i64 %1, %9
%11 = tail call i32 @gca_cycle_left(i8* %0, i64 %1, i64 %2, i64 %10)
br label %12
12: ; preds = %4, %8
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void gen_updn(FILE *outfile, int up) {
  if (up > 0) {
    fprintf(outfile, "UP");
  } else {
    fprintf(outfile, "DN");
  }
}


x86 assembly (clang, -O0):
<gen_updn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    113e <gen_updn+0x2e>
mov    -0x8(%rbp),%rdi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
jmp    114e <gen_updn+0x3e>
mov    -0x8(%rbp),%rdi
lea    0xeba(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_updn>:
mov    %rdi,%rcx
test   %esi,%esi
lea    0xee4(%rip),%rax
lea    0xee0(%rip),%rdi
cmovg  %rax,%rdi
mov    $0x2,%esi
mov    $0x1,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"UP\00"
@.str.1 = [3 x i8] c"DN\00"
define void @gen_updn(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32*, i32** %3
%9 = call i32 @fprintf(i32* %8, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
br label %13
10: ; preds = %2
%11 = load i32*, i32** %3
%12 = call i32 @fprintf(i32* %11, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
br label %13
13: ; preds = %10, %7
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"UP\00"
@.str.1 = [3 x i8] c"DN\00"
define void @gen_updn(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
%4 = select i1 %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0)
%5 = tail call i64 @fwrite(i8* %4, i64 2, i64 1, i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ len(char *);
char *popString();
int /*<<< orphan*/ pushNumber(int /*<<< orphan*/);
void basLen() {
  char *string;
  string = popString();
  pushNumber(len(string));
}


x86 assembly (clang, -O0):
<basLen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <popString@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <len@plt>
mov    %eax,%edi
call   1050 <pushNumber@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<basLen>:
push   %rax
xor    %eax,%eax
call   1040 <popString@plt>
mov    %rax,%rdi
call   1030 <len@plt>
mov    %eax,%edi
pop    %rax
jmp    1050 <pushNumber@plt>

LLVM IR (-O0):
define void @basLen() {
%1 = alloca i8*
%2 = call i8* (...) @popString()
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = call i32 @len(i8* %3)
%5 = call i32 @pushNumber(i32 %4)
ret void
}

LLVM IR (-O2):
define void @basLen() {
%1 = tail call i8* (...) @popString()
%2 = tail call i32 @len(i8* %1)
%3 = tail call i32 @pushNumber(i32 %2)
ret void
}
int socketpair(int domain, int type, int protocol, int sv[2]) {
  ;
  return -1;
}


x86 assembly (clang, -O0):
<socketpair>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<socketpair>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @socketpair(i32 %0, i32 %1, i32 %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32* %3, i32** %8
ret i32 -1
}

LLVM IR (-O2):
define i32 @socketpair(i32 %0, i32 %1, i32 %2, i32* nocapture readnone %3) {
ret i32 -1
}
__attribute__((no, noclone)) signed __int128 t115_5mul(unsigned __int128 x) {
  signed __int128 r;
  if (__builtin_mul_overflow(x, (signed __int128)(-1), &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t115_5mul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rdx
mov    -0x28(%rbp),%rsi
xor    %eax,%eax
mov    %rdx,%rcx
neg    %rcx
mov    %eax,%ecx
sbb    %rsi,%rcx
neg    %rdx
movabs $0x8000000000000000,%rax
sbb    %rsi,%rax
setb   %al
mov    %rdx,-0x40(%rbp)
mov    %rcx,-0x38(%rbp)
test   $0x1,%al
jne    116d <t115_5mul+0x5d>
jmp    1174 <t115_5mul+0x64>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t115_5mul>:
push   %r14
push   %rbx
push   %rax
xor    %r14d,%r14d
mov    %rdi,%rbx
neg    %rbx
sbb    %rsi,%r14
cmp    $0x1,%rdi
movabs $0x8000000000000000,%rax
sbb    %rax,%rsi
jb     113a <t115_5mul+0x2a>
xor    %eax,%eax
call   1030 <bar@plt>
mov    %rbx,%rax
mov    %r14,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define { i64, i64 } @t115_5mul(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = bitcast i128* %4 to { i64, i64 }*
%8 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 0
store i64 %0, i64* %8
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 1
store i64 %1, i64* %9
%10 = load i128, i128* %4
store i128 %10, i128* %5
%11 = load i128, i128* %5
%12 = call { i128, i1 } @llvm.umul.with.overflow.i128(i128 1, i128 %11)
%13 = extractvalue { i128, i1 } %12, 1
%14 = extractvalue { i128, i1 } %12, 0
%15 = icmp ugt i128 %14, -170141183460469231731687303715884105728
%16 = or i1 %13, %15
%17 = sub i128 0, %14
%18 = select i1 true, i128 %17, i128 %14
store i128 %18, i128* %6
br i1 %16, label %19, label %21
19: ; preds = %2
%20 = call i32 (...) @bar()
br label %21
21: ; preds = %19, %2
%22 = load i128, i128* %6
store i128 %22, i128* %3
%23 = bitcast i128* %3 to { i64, i64 }*
%24 = load { i64, i64 }, { i64, i64 }* %23
ret { i64, i64 } %24
}

LLVM IR (-O2):
define { i64, i64 } @t115_5mul(i64 %0, i64 %1) {
%3 = zext i64 %1 to i128
%4 = shl nuw i128 %3, 64
%5 = zext i64 %0 to i128
%6 = or i128 %4, %5
%7 = icmp ugt i128 %6, -170141183460469231731687303715884105728
%8 = sub i128 0, %6
br i1 %7, label %9, label %11
9: ; preds = %2
%10 = tail call i32 (...) @bar()
br label %11
11: ; preds = %9, %2
%12 = trunc i128 %8 to i64
%13 = lshr i128 %8, 64
%14 = trunc i128 %13 to i64
%15 = insertvalue { i64, i64 } poison, i64 %12, 0
%16 = insertvalue { i64, i64 } %15, i64 %14, 1
ret { i64, i64 } %16
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct kvm_cpuid_entry2 {
  int dummy;
};

/* Variables and functions */
struct kvm_cpuid_entry2 *kvm_get_supported_cpuid_index(int /*<<< orphan*/,
                                                       int /*<<< orphan*/);
struct kvm_cpuid_entry2 *kvm_get_supported_cpuid_entry(uint32_t function) {
  return kvm_get_supported_cpuid_index(function, 0);
}


x86 assembly (clang, -O0):
<kvm_get_supported_cpuid_entry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1030 <kvm_get_supported_cpuid_index@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kvm_get_supported_cpuid_entry>:
xor    %esi,%esi
jmp    1030 <kvm_get_supported_cpuid_index@plt>

LLVM IR (-O0):
%struct.kvm_cpuid_entry2 = type { i32 }
define %struct.kvm_cpuid_entry2* @kvm_get_supported_cpuid_entry(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call %struct.kvm_cpuid_entry2* @kvm_get_supported_cpuid_index(i32 %3, i32 0)
ret %struct.kvm_cpuid_entry2* %4
}

LLVM IR (-O2):
%struct.kvm_cpuid_entry2 = type { i32 }
define %struct.kvm_cpuid_entry2* @kvm_get_supported_cpuid_entry(i32 %0) {
%2 = tail call %struct.kvm_cpuid_entry2* @kvm_get_supported_cpuid_index(i32 %0, i32 0)
ret %struct.kvm_cpuid_entry2* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fputc(int, int /*<<< orphan*/ *);
int putc(int ch, FILE *stream) { return fputc(ch, stream); }


x86 assembly (clang, -O0):
<putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putc>:
jmp    1030 <fputc@plt>

LLVM IR (-O0):
define i32 @putc(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = call i32 @fputc(i32 %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @putc(i32 %0, i32* nocapture %1) {
%3 = tail call i32 @fputc(i32 %0, i32* %1)
ret i32 %3
}
const char *detect_libc(void) { return "glibc-2.1"; }


x86 assembly (clang, -O0):
<detect_libc>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<detect_libc>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [10 x i8] c"glibc-2.1\00"
define i8* @detect_libc() {
ret i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [10 x i8] c"glibc-2.1\00"
define i8* @detect_libc() {
ret i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0)
}
int test_imm_BFuint8_reg(unsigned char val) {
  return ((val) & (-0xBF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_BFuint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffff41,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_BFuint8_reg>:
test   $0x41,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_BFuint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -191
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_BFuint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 65
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
double L0_z(double, double, double, double);
double L1_z(double sign, double xi, double et, double qq) {
  double l0_z = L0_z(sign, xi, et, qq);
  return xi * l0_z;
}


x86 assembly (clang, -O0):
<L1_z>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
movsd  -0x20(%rbp),%xmm3
call   1030 <L0_z@plt>
movsd  %xmm0,-0x28(%rbp)
movsd  -0x10(%rbp),%xmm0
mulsd  -0x28(%rbp),%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<L1_z>:
push   %rax
movsd  %xmm1,(%rsp)
call   1030 <L0_z@plt>
mulsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @L1_z(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
%9 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%10 = load double, double* %5
%11 = load double, double* %6
%12 = load double, double* %7
%13 = load double, double* %8
%14 = call double @L0_z(double %10, double %11, double %12, double %13)
store double %14, double* %9
%15 = load double, double* %6
%16 = load double, double* %9
%17 = fmul double %15, %16
ret double %17
}

LLVM IR (-O2):
define double @L1_z(double %0, double %1, double %2, double %3) {
%5 = tail call double @L0_z(double %0, double %1, double %2, double %3)
%6 = fmul double %5, %1
ret double %6
}
int acpi_get_hp_hw_control_from_firmware(struct pci_dev *bridge) { return 0; }


x86 assembly (clang, -O0):
<acpi_get_hp_hw_control_from_firmware>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<acpi_get_hp_hw_control_from_firmware>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.pci_dev = type opaque
define i32 @acpi_get_hp_hw_control_from_firmware(%struct.pci_dev* %0) {
%2 = alloca %struct.pci_dev*
store %struct.pci_dev* %0, %struct.pci_dev** %2
ret i32 0
}

LLVM IR (-O2):
%struct.pci_dev = type opaque
define i32 @acpi_get_hp_hw_control_from_firmware(%struct.pci_dev* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ barrier_point();
int /*<<< orphan*/ pthread_exit(int /*<<< orphan*/);
int /*<<< orphan*/ sleep(int);
void *thread_task(void *param) {
  sleep(1);
  barrier_point();
  pthread_exit(0);
}


x86 assembly (clang, -O0):
<thread_task>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x1,%edi
call   1050 <sleep@plt>
mov    $0x0,%al
call   1030 <barrier_point@plt>
xor    %edi,%edi
call   1040 <pthread_exit@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread_task>:
push   %rax
mov    $0x1,%edi
call   1050 <sleep@plt>
xor    %eax,%eax
call   1030 <barrier_point@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <pthread_exit@plt>

LLVM IR (-O0):
define i8* @thread_task(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = call i32 @sleep(i32 1)
%5 = call i32 (...) @barrier_point()
%6 = call i32 @pthread_exit(i32 0)
%7 = load i8*, i8** %2
ret i8* %7
}

LLVM IR (-O2):
define noalias i8* @thread_task(i8* nocapture readnone %0) {
%2 = tail call i32 @sleep(i32 1)
%3 = tail call i32 (...) @barrier_point()
%4 = tail call i32 @pthread_exit(i32 0)
ret i8* undef
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int mode;
};
struct TYPE_4__ {
  TYPE_1__ xcrossing;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xcrossing_mode(void *_p, int _v) {
  ((XEvent *)_p)->xcrossing.mode = (int)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xcrossing_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xcrossing_mode>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xcrossing_mode(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xcrossing_mode(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
double psi_to_bar(double psi) { return psi / 14.5037738; }


x86 assembly (clang, -O0):
<psi_to_bar>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<psi_to_bar>:
divsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @psi_to_bar(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 0x402D01EEA3B729CD
ret double %4
}

LLVM IR (-O2):
define double @psi_to_bar(double %0) {
%2 = fdiv double %0, 0x402D01EEA3B729CD
ret double %2
}
/* Variables and functions */
int F_OK;
int access(char const *, int);
int core_directory_verify_existence(const char *directory) {
  int mode;
  int result;
  mode = F_OK;
  result = access(directory, mode);
  if (result != -1) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<core_directory_verify_existence>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    0x2eb5(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <access@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0xffffffff,-0x18(%rbp)
je     114d <core_directory_verify_existence+0x3d>
movl   $0x1,-0x4(%rbp)
jmp    1154 <core_directory_verify_existence+0x44>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<core_directory_verify_existence>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
call   1030 <access@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@F_OK = global i32 0
define i32 @core_directory_verify_existence(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
%6 = load i32, i32* @F_OK
store i32 %6, i32* %4
%7 = load i8*, i8** %3
%8 = load i32, i32* %4
%9 = call i32 @access(i8* %7, i32 %8)
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = icmp ne i32 %10, -1
br i1 %11, label %12, label %13
12: ; preds = %1
store i32 1, i32* %2
br label %14
13: ; preds = %1
store i32 0, i32* %2
br label %14
14: ; preds = %13, %12
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
@F_OK = global i32 0
define i32 @core_directory_verify_existence(i8* nocapture %0) {
%2 = load i32, i32* @F_OK
%3 = tail call i32 @access(i8* %0, i32 %2)
%4 = icmp ne i32 %3, -1
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int /*<<< orphan*/ EINVAL;
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int __fchmod(int fd, mode_t mode) {
  if (fd < 0) {
    __set_errno(EINVAL);
    return -1;
  }
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<__fchmod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1142 <__fchmod+0x32>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1157 <__fchmod+0x47>
mov    0x2e9f(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__fchmod>:
push   %rax
test   %edi,%edi
jns    111e <__fchmod+0xe>
mov    0x2ebc(%rip),%rax
jmp    1125 <__fchmod+0x15>
mov    0x2ec3(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@EINVAL = global i32 0
@ENOSYS = global i32 0
define i32 @__fchmod(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* @EINVAL
%10 = call i32 @__set_errno(i32 %9)
store i32 -1, i32* %3
br label %14
11: ; preds = %2
%12 = load i32, i32* @ENOSYS
%13 = call i32 @__set_errno(i32 %12)
store i32 -1, i32* %3
br label %14
14: ; preds = %11, %8
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
@EINVAL = global i32 0
@ENOSYS = global i32 0
define i32 @__fchmod(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, 0
%4 = load i32, i32* @EINVAL
%5 = load i32, i32* @ENOSYS
%6 = select i1 %3, i32 %4, i32 %5
%7 = tail call i32 @__set_errno(i32 %6)
ret i32 -1
}
void DiagExit(int iRet) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<DiagExit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <DiagExit+0x7>

x86 assembly (clang, -O2):
<DiagExit>:
jmp    1100 <DiagExit>

LLVM IR (-O0):
define void @DiagExit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %1, %3
br label %3
}

LLVM IR (-O2):
define void @DiagExit(i32 %0) {
br label %2
2: ; preds = %1, %2
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ i2cWriteRegister(int, int, int);
void mcuReboot(void) {
  i2cWriteRegister(3, 0x20, 1 << 2);
  while (1)
    ;
}


x86 assembly (clang, -O0):
<mcuReboot>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
mov    $0x20,%esi
mov    $0x4,%edx
call   1030 <i2cWriteRegister@plt>
jmp    1128 <mcuReboot+0x18>

x86 assembly (clang, -O2):
<mcuReboot>:
push   %rax
mov    $0x3,%edi
mov    $0x20,%esi
mov    $0x4,%edx
call   1030 <i2cWriteRegister@plt>
cs nopw 0x0(%rax,%rax,1)
nop
jmp    1130 <mcuReboot+0x20>

LLVM IR (-O0):
define void @mcuReboot() {
%1 = call i32 @i2cWriteRegister(i32 3, i32 32, i32 4)
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
define void @mcuReboot() {
%1 = tail call i32 @i2cWriteRegister(i32 3, i32 32, i32 4)
br label %2
2: ; preds = %0, %2
br label %2
}
signed long int signedlongint_ignoring_unsignedshort(signed long int x,
                                                     unsigned short y) {
  return x;
}


x86 assembly (clang, -O0):
<signedlongint_ignoring_unsignedshort>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signedlongint_ignoring_unsignedshort>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @signedlongint_ignoring_unsignedshort(i64 %0, i16 zeroext %1) {
%3 = alloca i64
%4 = alloca i16
store i64 %0, i64* %3
store i16 %1, i16* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @signedlongint_ignoring_unsignedshort(i64 returned %0, i16 zeroext %1) {
ret i64 %0
}
/* Type definitions */
struct timeval {
  int tv_sec;
  int tv_usec;
};

/* Variables and functions */
int timeDiff(struct timeval *tv1, struct timeval *tv2) {
  return (tv2->tv_sec - tv1->tv_sec) * 1000000 + tv2->tv_usec - tv1->tv_usec;
}


x86 assembly (clang, -O0):
<timeDiff>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x8(%rbp),%rcx
sub    (%rcx),%eax
imul   $0xf4240,%eax,%eax
mov    -0x10(%rbp),%rcx
add    0x4(%rcx),%eax
mov    -0x8(%rbp),%rcx
sub    0x4(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<timeDiff>:
mov    (%rsi),%eax
sub    (%rdi),%eax
imul   $0xf4240,%eax,%eax
add    0x4(%rsi),%eax
sub    0x4(%rdi),%eax
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define i32 @timeDiff(%struct.timeval* %0, %struct.timeval* %1) {
%3 = alloca %struct.timeval*
%4 = alloca %struct.timeval*
store %struct.timeval* %0, %struct.timeval** %3
store %struct.timeval* %1, %struct.timeval** %4
%5 = load %struct.timeval*, %struct.timeval** %4
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %5, i32 0, i32 0
%7 = load i32, i32* %6
%8 = load %struct.timeval*, %struct.timeval** %3
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %8, i32 0, i32 0
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
%12 = mul nsw i32 %11, 1000000
%13 = load %struct.timeval*, %struct.timeval** %4
%14 = getelementptr inbounds %struct.timeval, %struct.timeval* %13, i32 0, i32 1
%15 = load i32, i32* %14
%16 = add nsw i32 %12, %15
%17 = load %struct.timeval*, %struct.timeval** %3
%18 = getelementptr inbounds %struct.timeval, %struct.timeval* %17, i32 0, i32 1
%19 = load i32, i32* %18
%20 = sub nsw i32 %16, %19
ret i32 %20
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define i32 @timeDiff(%struct.timeval* nocapture %0, %struct.timeval* nocapture %1) {
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%4 = load i32, i32* %3
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
%8 = mul nsw i32 %7, 1000000
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%10 = load i32, i32* %9
%11 = add nsw i32 %8, %10
%12 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
%13 = load i32, i32* %12
%14 = sub i32 %11, %13
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ DMA11_DriverIRQHandler();
__attribute__((weak)) void DMA11_IRQHandler(void) { DMA11_DriverIRQHandler(); }


x86 assembly (clang, -O0):
<DMA11_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DMA11_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMA11_IRQHandler>:
xor    %eax,%eax
jmp    1030 <DMA11_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @DMA11_IRQHandler() {
%1 = call i32 (...) @DMA11_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @DMA11_IRQHandler() {
%1 = tail call i32 (...) @DMA11_DriverIRQHandler()
ret void
}
double side(double x1, double y1, double x2, double y2, double x, double y) {
  return (y2 - y1) * (x - x1) + (-x2 + x1) * (y - y1);
}


x86 assembly (clang, -O0):
<side>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  %xmm4,-0x28(%rbp)
movsd  %xmm5,-0x30(%rbp)
movsd  -0x20(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
movsd  -0x28(%rbp),%xmm2
subsd  -0x8(%rbp),%xmm2
movsd  -0x18(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
addsd  -0x8(%rbp),%xmm1
movsd  -0x30(%rbp),%xmm3
subsd  -0x10(%rbp),%xmm3
mulsd  %xmm3,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<side>:
subsd  %xmm1,%xmm3
subsd  %xmm0,%xmm4
mulsd  %xmm3,%xmm4
subsd  %xmm2,%xmm0
subsd  %xmm1,%xmm5
mulsd  %xmm5,%xmm0
addsd  %xmm4,%xmm0
ret

LLVM IR (-O0):
define double @side(double %0, double %1, double %2, double %3, double %4, double %5) {
%7 = alloca double
%8 = alloca double
%9 = alloca double
%10 = alloca double
%11 = alloca double
%12 = alloca double
store double %0, double* %7
store double %1, double* %8
store double %2, double* %9
store double %3, double* %10
store double %4, double* %11
store double %5, double* %12
%13 = load double, double* %10
%14 = load double, double* %8
%15 = fsub double %13, %14
%16 = load double, double* %11
%17 = load double, double* %7
%18 = fsub double %16, %17
%19 = load double, double* %9
%20 = fneg double %19
%21 = load double, double* %7
%22 = fadd double %20, %21
%23 = load double, double* %12
%24 = load double, double* %8
%25 = fsub double %23, %24
%26 = fmul double %22, %25
%27 = call double @llvm.fmuladd.f64(double %15, double %18, double %26)
ret double %27
}

LLVM IR (-O2):
define double @side(double %0, double %1, double %2, double %3, double %4, double %5) {
%7 = fsub double %3, %1
%8 = fsub double %4, %0
%9 = fsub double %0, %2
%10 = fsub double %5, %1
%11 = fmul double %9, %10
%12 = tail call double @llvm.fmuladd.f64(double %7, double %8, double %11)
ret double %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
void print_solution() { printf("Solution is: %d\n", 0); }


x86 assembly (clang, -O0):
<print_solution>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_solution>:
lea    0xee9(%rip),%rdi
xor    %esi,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"Solution is: %d\0A\00"
define void @print_solution() {
%1 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 0)
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"Solution is: %d\0A\00"
define void @print_solution() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ log_any(char const *, int, char const *);
void log_info(const char *type, int code, const char *msg) {
  log_any(type, code, msg);
}


x86 assembly (clang, -O0):
<log_info>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1030 <log_any@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_info>:
jmp    1030 <log_any@plt>

LLVM IR (-O0):
define void @log_info(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = call i32 @log_any(i8* %7, i32 %8, i8* %9)
ret void
}

LLVM IR (-O2):
define void @log_info(i8* %0, i32 %1, i8* %2) {
%4 = tail call i32 @log_any(i8* %0, i32 %1, i8* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lcd_cmd_transmit(int);
void lcd_new_msg_second_line(void) {
  lcd_cmd_transmit(0x38);
  lcd_cmd_transmit(0xC0);
  lcd_cmd_transmit(0x06);
}


x86 assembly (clang, -O0):
<lcd_new_msg_second_line>:
push   %rbp
mov    %rsp,%rbp
mov    $0x38,%edi
call   1030 <lcd_cmd_transmit@plt>
mov    $0xc0,%edi
call   1030 <lcd_cmd_transmit@plt>
mov    $0x6,%edi
call   1030 <lcd_cmd_transmit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcd_new_msg_second_line>:
push   %rax
mov    $0x38,%edi
call   1030 <lcd_cmd_transmit@plt>
mov    $0xc0,%edi
call   1030 <lcd_cmd_transmit@plt>
mov    $0x6,%edi
pop    %rax
jmp    1030 <lcd_cmd_transmit@plt>

LLVM IR (-O0):
define void @lcd_new_msg_second_line() {
%1 = call i32 @lcd_cmd_transmit(i32 56)
%2 = call i32 @lcd_cmd_transmit(i32 192)
%3 = call i32 @lcd_cmd_transmit(i32 6)
ret void
}

LLVM IR (-O2):
define void @lcd_new_msg_second_line() {
%1 = tail call i32 @lcd_cmd_transmit(i32 56)
%2 = tail call i32 @lcd_cmd_transmit(i32 192)
%3 = tail call i32 @lcd_cmd_transmit(i32 6)
ret void
}
void test1_MoreArrays_markUsed__E() {}


x86 assembly (clang, -O0):
<test1_MoreArrays_markUsed__E>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1_MoreArrays_markUsed__E>:
ret

LLVM IR (-O0):
define void @test1_MoreArrays_markUsed__E() {
ret void
}

LLVM IR (-O2):
define void @test1_MoreArrays_markUsed__E() {
ret void
}
int test_imm_70int8_mem(signed char *val) {
  return ((*val) & (0x70 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_70int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0x70,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_70int8_mem>:
testb  $0x70,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_70int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 112
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_70int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 112
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
void __word_memcpy(uint16_t *restrict dest, const uint16_t *restrict src,
                   size_t n) {
  while (n--)
    *dest++ = *src++;
}


x86 assembly (clang, -O0):
<__word_memcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x18(%rbp)
cmp    $0x0,%rax
je     1150 <__word_memcpy+0x50>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x4,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
jmp    1110 <__word_memcpy+0x10>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__word_memcpy>:
test   %rdx,%rdx
je     1123 <__word_memcpy+0x13>
push   %rax
shl    $0x2,%rdx
call   1030 <memcpy@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @__word_memcpy(i32* noalias %0, i32* noalias %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i64
store i32* %0, i32** %4
store i32* %1, i32** %5
store i64 %2, i64* %6
br label %7
7: ; preds = %11, %3
%8 = load i64, i64* %6
%9 = add i64 %8, -1
store i64 %9, i64* %6
%10 = icmp ne i64 %8, 0
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i32*, i32** %5
%13 = getelementptr inbounds i32, i32* %12, i32 1
store i32* %13, i32** %5
%14 = load i32, i32* %12
%15 = load i32*, i32** %4
%16 = getelementptr inbounds i32, i32* %15, i32 1
store i32* %16, i32** %4
store i32 %14, i32* %15
br label %7
17: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @__word_memcpy(i32* noalias nocapture writeonly %0, i32* noalias nocapture %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %9, label %5
5: ; preds = %3
%6 = bitcast i32* %1 to i8*
%7 = bitcast i32* %0 to i8*
%8 = shl nuw i64 %2, 2
br label %9
9: ; preds = %5, %3
ret void
}
float half_of(float k) { return (k / 2); }


x86 assembly (clang, -O0):
<half_of>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xeea(%rip),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<half_of>:
mulss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @half_of(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fdiv float %3, 2.000000e+00
ret float %4
}

LLVM IR (-O2):
define float @half_of(float %0) {
%2 = fmul float %0, 5.000000e-01
ret float %2
}
int fn11(int n) {
  if (++n == 10)
    return 666;
  else if (++n == 10)
    return 9;
  return 0;
}


x86 assembly (clang, -O0):
<fn11>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmp    $0xa,%eax
jne    1125 <fn11+0x25>
movl   $0x29a,-0x4(%rbp)
jmp    114f <fn11+0x4f>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmp    $0xa,%eax
jne    1143 <fn11+0x43>
movl   $0x9,-0x4(%rbp)
jmp    114f <fn11+0x4f>
jmp    1148 <fn11+0x48>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn11>:
xor    %eax,%eax
cmp    $0x8,%edi
sete   %al
lea    (%rax,%rax,8),%ecx
cmp    $0x9,%edi
mov    $0x29a,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @fn11(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = add nsw i32 %4, 1
store i32 %5, i32* %3
%6 = icmp eq i32 %5, 10
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 666, i32* %2
br label %15
8: ; preds = %1
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
%11 = icmp eq i32 %10, 10
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 9, i32* %2
br label %15
13: ; preds = %8
br label %14
14: ; preds = %13
store i32 0, i32* %2
br label %15
15: ; preds = %14, %12, %7
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @fn11(i32 %0) {
%2 = icmp eq i32 %0, 8
%3 = select i1 %2, i32 9, i32 0
%4 = icmp eq i32 %0, 9
%5 = select i1 %4, i32 666, i32 %3
ret i32 %5
}
void logperror(int prio, const char *s) {}


x86 assembly (clang, -O0):
<logperror>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<logperror>:
ret

LLVM IR (-O0):
define void @logperror(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @logperror(i32 %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void *sat_free(void *mem) {
  if (mem)
    free(mem);
  return 0;
}


x86 assembly (clang, -O0):
<sat_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <sat_free+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sat_free>:
test   %rdi,%rdi
je     111f <sat_free+0xf>
push   %rax
call   1030 <free@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @sat_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @sat_free(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
int main(void) {
  float result_normal;
  float result_cast;
  result_normal = 2 / 5;
  result_cast = (float)2 / (float)5;
  printf("result_normal = %f\n", result_normal);
  printf("result_cast = %f\n", result_cast);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xorps  %xmm0,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  0xed1(%rip),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
movss  -0xc(%rbp),%xmm0
lea    0xec7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeec(%rip),%rdi
xorps  %xmm0,%xmm0
call   1030 <printf@plt>
lea    0xef1(%rip),%rdi
movss  0xed1(%rip),%xmm0
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"result_normal = %f\0A\00"
@.str.1 = [18 x i8] c"result_cast = %f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca float
%3 = alloca float
store i32 0, i32* %1
store float 0.000000e+00, float* %2
store float 0x3FD99999A0000000, float* %3
%4 = load float, float* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), float %4)
%6 = load float, float* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0), float %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [20 x i8] c"result_normal = %f\0A\00"
@.str.1 = [18 x i8] c"result_cast = %f\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), float 0.000000e+00)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0), float 0x3FD99999A0000000)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_srl_si64(int /*<<< orphan*/, int /*<<< orphan*/);
__m64 test_mm_srl_si64(__m64 a, __m64 b) { return _mm_srl_si64(a, b); }


x86 assembly (clang, -O0):
<test_mm_srl_si64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_srl_si64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_srl_si64>:
jmp    1030 <_mm_srl_si64@plt>

LLVM IR (-O0):
define i32 @test_mm_srl_si64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_srl_si64(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_srl_si64(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_srl_si64(i32 %0, i32 %1)
ret i32 %3
}
int ueld_os_chvt(int vt) { return 0; }


x86 assembly (clang, -O0):
<ueld_os_chvt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ueld_os_chvt>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ueld_os_chvt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @ueld_os_chvt(i32 %0) {
ret i32 0
}
/* Type definitions */
struct userrec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cmd_mns_mask(char, struct userrec *, int, char *);
void cmd_mns_ban(struct userrec *u, int idx, char *par) {
  cmd_mns_mask('b', u, idx, par);
}


x86 assembly (clang, -O0):
<cmd_mns_ban>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    $0x62,%edi
call   1030 <cmd_mns_mask@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_mns_ban>:
mov    %rdx,%rcx
mov    %esi,%edx
mov    %rdi,%rsi
mov    $0x62,%edi
jmp    1030 <cmd_mns_mask@plt>

LLVM IR (-O0):
%struct.userrec = type { i32 }
define void @cmd_mns_ban(%struct.userrec* %0, i32 %1, i8* %2) {
%4 = alloca %struct.userrec*
%5 = alloca i32
%6 = alloca i8*
store %struct.userrec* %0, %struct.userrec** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load %struct.userrec*, %struct.userrec** %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = call i32 @cmd_mns_mask(i8 signext 98, %struct.userrec* %7, i32 %8, i8* %9)
ret void
}

LLVM IR (-O2):
%struct.userrec = type { i32 }
define void @cmd_mns_ban(%struct.userrec* %0, i32 %1, i8* %2) {
%4 = tail call i32 @cmd_mns_mask(i8 signext 98, %struct.userrec* %0, i32 %1, i8* %2)
ret void
}