xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ strv_isempty(char **);
char **strv_skip(char **l, size_t n) {
  while (n > 0) {
    if (strv_isempty(l))
      return l;
    l++, n--;
  }
  return l;
}


x86 assembly (clang, -O0):
<strv_skip>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jbe    1168 <strv_skip+0x58>
mov    -0x10(%rbp),%rdi
call   1030 <strv_isempty@plt>
cmp    $0x0,%rax
je     114b <strv_skip+0x3b>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1170 <strv_skip+0x60>
mov    -0x10(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x18(%rbp)
jmp    1120 <strv_skip+0x10>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strv_skip>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
test   %rsi,%rsi
je     1137 <strv_skip+0x27>
mov    %rsi,%r14
nop
mov    %rbx,%rdi
call   1030 <strv_isempty@plt>
test   %rax,%rax
jne    1137 <strv_skip+0x27>
add    $0x8,%rbx
add    $0xffffffffffffffff,%r14
jne    1120 <strv_skip+0x10>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8** @strv_skip(i8** %0, i64 %1) {
%3 = alloca i8**
%4 = alloca i8**
%5 = alloca i64
store i8** %0, i8*** %4
store i64 %1, i64* %5
br label %6
6: ; preds = %15, %2
%7 = load i64, i64* %5
%8 = icmp ugt i64 %7, 0
br i1 %8, label %9, label %20
9: ; preds = %6
%10 = load i8**, i8*** %4
%11 = call i64 @strv_isempty(i8** %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %9
%14 = load i8**, i8*** %4
store i8** %14, i8*** %3
br label %22
15: ; preds = %9
%16 = load i8**, i8*** %4
%17 = getelementptr inbounds i8*, i8** %16, i32 1
store i8** %17, i8*** %4
%18 = load i64, i64* %5
%19 = add i64 %18, -1
store i64 %19, i64* %5
br label %6
20: ; preds = %6
%21 = load i8**, i8*** %4
store i8** %21, i8*** %3
br label %22
22: ; preds = %20, %13
%23 = load i8**, i8*** %3
ret i8** %23
}

LLVM IR (-O2):
define i8** @strv_skip(i8** %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %13, label %4
4: ; preds = %2, %9
%5 = phi i64 [ %11, %9 ], [ %1, %2 ]
%6 = phi i8** [ %10, %9 ], [ %0, %2 ]
%7 = tail call i64 @strv_isempty(i8** %6)
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %4
%10 = getelementptr inbounds i8*, i8** %6, i64 1
%11 = add i64 %5, -1
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %9, %2
%14 = phi i8** [ %0, %2 ], [ %10, %9 ], [ %6, %4 ]
ret i8** %14
}
void I_NoAppServicesLeaveLobby(void) {}


x86 assembly (clang, -O0):
<I_NoAppServicesLeaveLobby>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I_NoAppServicesLeaveLobby>:
ret

LLVM IR (-O0):
define void @I_NoAppServicesLeaveLobby() {
ret void
}

LLVM IR (-O2):
define void @I_NoAppServicesLeaveLobby() {
ret void
}
int strncmp(const char *s1, const char *s2, unsigned long count) {
  while (count--)
    if (*s1++ != *s2++)
      return *(unsigned char *)(s1 - 1) - *(unsigned char *)(s2 - 1);
  return 0;
}


x86 assembly (clang, -O0):
<strncmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x20(%rbp)
cmp    $0x0,%rax
je     1174 <strncmp+0x74>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
movsbl (%rcx),%ecx
cmp    %ecx,%eax
je     116f <strncmp+0x6f>
mov    -0x10(%rbp),%rax
movzbl -0x1(%rax),%eax
mov    -0x18(%rbp),%rcx
movzbl -0x1(%rcx),%ecx
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    117b <strncmp+0x7b>
jmp    1110 <strncmp+0x10>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncmp>:
xor    %eax,%eax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
cmp    %rcx,%rdx
je     112e <strncmp+0x2e>
movzbl (%rdi,%rcx,1),%r8d
movzbl (%rsi,%rcx,1),%r9d
add    $0x1,%rcx
cmp    %r9b,%r8b
je     1110 <strncmp+0x10>
sub    %r9d,%r8d
mov    %r8d,%eax
ret

LLVM IR (-O0):
define i32 @strncmp(i8* %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
br label %8
8: ; preds = %32, %3
%9 = load i64, i64* %7
%10 = add i64 %9, -1
store i64 %10, i64* %7
%11 = icmp ne i64 %9, 0
br i1 %11, label %12, label %33
12: ; preds = %8
%13 = load i8*, i8** %5
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %5
%15 = load i8, i8* %13
%16 = sext i8 %15 to i32
%17 = load i8*, i8** %6
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %6
%19 = load i8, i8* %17
%20 = sext i8 %19 to i32
%21 = icmp ne i32 %16, %20
br i1 %21, label %22, label %32
22: ; preds = %12
%23 = load i8*, i8** %5
%24 = getelementptr inbounds i8, i8* %23, i64 -1
%25 = load i8, i8* %24
%26 = zext i8 %25 to i32
%27 = load i8*, i8** %6
%28 = getelementptr inbounds i8, i8* %27, i64 -1
%29 = load i8, i8* %28
%30 = zext i8 %29 to i32
%31 = sub nsw i32 %26, %30
store i32 %31, i32* %4
br label %34
32: ; preds = %12
br label %8
33: ; preds = %8
store i32 0, i32* %4
br label %34
34: ; preds = %33, %22
%35 = load i32, i32* %4
ret i32 %35
}

LLVM IR (-O2):
define i32 @strncmp(i8* nocapture %0, i8* nocapture %1, i64 %2) {
br label %4
4: ; preds = %9, %3
%5 = phi i8* [ %0, %3 ], [ %11, %9 ]
%6 = phi i8* [ %1, %3 ], [ %13, %9 ]
%7 = phi i64 [ %2, %3 ], [ %10, %9 ]
%8 = icmp eq i64 %7, 0
br i1 %8, label %20, label %9
9: ; preds = %4
%10 = add i64 %7, -1
%11 = getelementptr inbounds i8, i8* %5, i64 1
%12 = load i8, i8* %5
%13 = getelementptr inbounds i8, i8* %6, i64 1
%14 = load i8, i8* %6
%15 = icmp eq i8 %12, %14
br i1 %15, label %4, label %16
16: ; preds = %9
%17 = zext i8 %12 to i32
%18 = zext i8 %14 to i32
%19 = sub nsw i32 %17, %18
br label %20
20: ; preds = %4, %16
%21 = phi i32 [ %19, %16 ], [ 0, %4 ]
ret i32 %21
}
/* Variables and functions */
int spg_refine_cell(double **, double **, int *, int, double);
void spg_refine_cell_(double lattice[3][3], double position[][3], int types[],
                      int *num_atom, double *symprec) {
  int num_atom_bravais;
  num_atom_bravais =
      spg_refine_cell(lattice, position, types, *num_atom, *symprec);
  *num_atom = num_atom_bravais;
}


x86 assembly (clang, -O0):
<spg_refine_cell_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rax
mov    (%rax),%ecx
mov    -0x28(%rbp),%rax
movsd  (%rax),%xmm0
call   1030 <spg_refine_cell@plt>
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spg_refine_cell_>:
push   %rbx
mov    %rcx,%rbx
mov    (%rcx),%ecx
movsd  (%r8),%xmm0
call   1030 <spg_refine_cell@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @spg_refine_cell_([3 x double]* %0, [3 x double]* %1, i32* %2, i32* %3, double* %4) {
%6 = alloca [3 x double]*
%7 = alloca [3 x double]*
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca double*
%11 = alloca i32
store [3 x double]* %0, [3 x double]** %6
store [3 x double]* %1, [3 x double]** %7
store i32* %2, i32** %8
store i32* %3, i32** %9
store double* %4, double** %10
%12 = load [3 x double]*, [3 x double]** %6
%13 = bitcast [3 x double]* %12 to double**
%14 = load [3 x double]*, [3 x double]** %7
%15 = bitcast [3 x double]* %14 to double**
%16 = load i32*, i32** %8
%17 = load i32*, i32** %9
%18 = load i32, i32* %17
%19 = load double*, double** %10
%20 = load double, double* %19
%21 = call i32 @spg_refine_cell(double** %13, double** %15, i32* %16, i32 %18, double %20)
store i32 %21, i32* %11
%22 = load i32, i32* %11
%23 = load i32*, i32** %9
store i32 %22, i32* %23
ret void
}

LLVM IR (-O2):
define void @spg_refine_cell_([3 x double]* %0, [3 x double]* %1, i32* %2, i32* nocapture %3, double* nocapture %4) {
%6 = bitcast [3 x double]* %0 to double**
%7 = bitcast [3 x double]* %1 to double**
%8 = load i32, i32* %3
%9 = load double, double* %4
%10 = tail call i32 @spg_refine_cell(double** %6, double** %7, i32* %2, i32 %8, double %9)
store i32 %10, i32* %3
ret void
}
int main() {
  char c = 'c';
  char d = 'd';
  return d - c;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movb   $0x63,-0x5(%rbp)
movb   $0x64,-0x6(%rbp)
movsbl -0x6(%rbp),%eax
movsbl -0x5(%rbp),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i8
store i32 0, i32* %1
store i8 99, i8* %2
store i8 100, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = load i8, i8* %2
%7 = sext i8 %6 to i32
%8 = sub nsw i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
/* Type definitions */
struct nlmsghdr {
  int /*<<< orphan*/ nlmsg_len;
};
struct nlattr {
  int dummy;
};

/* Variables and functions */
int NLMSG_ALIGN(int /*<<< orphan*/);
struct nlattr *nh_tail(struct nlmsghdr *nh) {
  return (struct nlattr *)((char *)nh + NLMSG_ALIGN(nh->nlmsg_len));
}


x86 assembly (clang, -O0):
<nh_tail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <NLMSG_ALIGN@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nh_tail>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%edi
call   1030 <NLMSG_ALIGN@plt>
cltq
add    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.nlattr = type { i32 }
%struct.nlmsghdr = type { i32 }
define %struct.nlattr* @nh_tail(%struct.nlmsghdr* %0) {
%2 = alloca %struct.nlmsghdr*
store %struct.nlmsghdr* %0, %struct.nlmsghdr** %2
%3 = load %struct.nlmsghdr*, %struct.nlmsghdr** %2
%4 = bitcast %struct.nlmsghdr* %3 to i8*
%5 = load %struct.nlmsghdr*, %struct.nlmsghdr** %2
%6 = getelementptr inbounds %struct.nlmsghdr, %struct.nlmsghdr* %5, i32 0, i32 0
%7 = load i32, i32* %6
%8 = call i32 @NLMSG_ALIGN(i32 %7)
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %4, i64 %9
%11 = bitcast i8* %10 to %struct.nlattr*
ret %struct.nlattr* %11
}

LLVM IR (-O2):
%struct.nlattr = type { i32 }
%struct.nlmsghdr = type { i32 }
define %struct.nlattr* @nh_tail(%struct.nlmsghdr* %0) {
%2 = bitcast %struct.nlmsghdr* %0 to i8*
%3 = getelementptr inbounds %struct.nlmsghdr, %struct.nlmsghdr* %0, i64 0, i32 0
%4 = load i32, i32* %3
%5 = tail call i32 @NLMSG_ALIGN(i32 %4)
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds i8, i8* %2, i64 %6
%8 = bitcast i8* %7 to %struct.nlattr*
ret %struct.nlattr* %8
}
int __attribute__((no)) bar(short *p) {
  unsigned int a = *p;
  asm volatile("nop");
  asm volatile("nop" : : "D"(a));
  return 0;
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%eax
mov    %eax,-0xc(%rbp)
nop
mov    -0xc(%rbp),%edi
nop
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
movswl (%rdi),%edi
nop
nop
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @bar(i16* %0) {
%2 = alloca i16*
%3 = alloca i32
store i16* %0, i16** %2
%4 = load i16*, i16** %2
%5 = load i16, i16* %4
%6 = sext i16 %5 to i32
store i32 %6, i32* %3
%7 = load i32, i32* %3
ret i32 0
}

LLVM IR (-O2):
define i32 @bar(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = sext i16 %2 to i32
tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "nop", "{di},~{dirflag},~{fpsr},~{flags}"(i32 %3)
ret i32 0
}
int arch_write_val_locked(int val) { return val < 0; }


x86 assembly (clang, -O0):
<arch_write_val_locked>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_write_val_locked>:
mov    %edi,%eax
shr    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @arch_write_val_locked(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @arch_write_val_locked(i32 %0) {
%2 = lshr i32 %0, 31
ret i32 %2
}
int f(int x) { return x * 2; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    (%rdi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 2
ret i32 %4
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = shl nsw i32 %0, 1
ret i32 %2
}
double mag_sqrd(const double _z) { return _z * _z; }


x86 assembly (clang, -O0):
<mag_sqrd>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mag_sqrd>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @mag_sqrd(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @mag_sqrd(double %0) {
%2 = fmul double %0, %0
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0xf8() {
  Assert_real((isalpha(248) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              1245, ("isalpha should be 0 for 0xf8"));
}


x86 assembly (clang, -O0):
<t_isalpha_0xf8>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf8,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4dd,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0xf8>:
push   %rax
mov    $0xf8,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4dd,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xf8\00"
define void @t_isalpha_0xf8() {
%1 = call i64 @isalpha(i32 248)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1245, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xf8\00"
define void @t_isalpha_0xf8() {
%1 = tail call i64 @isalpha(i32 248)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1245, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TIOCLINUX;
int /*<<< orphan*/ ioctl(int, int /*<<< orphan*/, int *);
void unblank_screen() {
  int i = 4;
  ioctl(1, TIOCLINUX, &i);
}


x86 assembly (clang, -O0):
<unblank_screen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x4,-0x4(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%esi
mov    $0x1,%edi
lea    -0x4(%rbp),%rdx
call   1030 <ioctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unblank_screen>:
push   %rax
movl   $0x4,0x4(%rsp)
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
lea    0x4(%rsp),%rdx
mov    $0x1,%edi
call   1030 <ioctl@plt>
pop    %rax
ret

LLVM IR (-O0):
@TIOCLINUX = global i32 0
define void @unblank_screen() {
%1 = alloca i32
store i32 4, i32* %1
%2 = load i32, i32* @TIOCLINUX
%3 = call i32 @ioctl(i32 1, i32 %2, i32* %1)
ret void
}

LLVM IR (-O2):
@TIOCLINUX = global i32 0
define void @unblank_screen() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 4, i32* %1
%3 = load i32, i32* @TIOCLINUX
%4 = call i32 @ioctl(i32 1, i32 %3, i32* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void tos_help(void) {
  printf("tos help:\n"
         "          TOS Name                Hex Value           Typical Uses\n"
         "\n"
         "       Minimum Delay                 10               ftp, telnet\n"
         "       Maximum Throughput            08               ftp-data\n"
         "       Maximum Reliability           04               snmp\n"
         "       Minimum Cost                  02               nntp\n");
  exit(0);
}


x86 assembly (clang, -O0):
<tos_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<tos_help>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [326 x i8] c"tos help:\0A TOS Name Hex Value Typical Uses\0A\0A Minimum Delay 10 ftp, telnet\0A Maximum Throughput 08 ftp-data\0A Maximum Reliability 04 snmp\0A Minimum Cost 02 nntp\0A\00"
define void @tos_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([326 x i8], [326 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [325 x i8] c"tos help:\0A TOS Name Hex Value Typical Uses\0A\0A Minimum Delay 10 ftp, telnet\0A Maximum Throughput 08 ftp-data\0A Maximum Reliability 04 snmp\0A Minimum Cost 02 nntp\00"
define void @tos_help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([325 x i8], [325 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ assert_context_process();
void schedule(void) {
  {
    assert_context_process();
    return;
  }
}


x86 assembly (clang, -O0):
<schedule>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <assert_context_process@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<schedule>:
xor    %eax,%eax
jmp    1030 <assert_context_process@plt>

LLVM IR (-O0):
define void @schedule() {
%1 = call i32 (...) @assert_context_process()
ret void
}

LLVM IR (-O2):
define void @schedule() {
%1 = tail call i32 (...) @assert_context_process()
ret void
}
unsigned char *serialize_char(unsigned char *dest, char *src, int len) {
  assert(dest);
  assert(src);
  assert(len);
  memcpy(dest, src, len);
  dest += len;
  return dest;
}


x86 assembly (clang, -O0):
<serialize_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <assert@plt>
mov    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1030 <assert@plt>
mov    -0x14(%rbp),%edi
mov    $0x0,%al
call   1030 <assert@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movslq -0x14(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x14(%rbp),%ecx
mov    -0x8(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serialize_char>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%ebp
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <assert@plt>
mov    %r14,%rdi
xor    %eax,%eax
call   1030 <assert@plt>
mov    %ebp,%edi
xor    %eax,%eax
call   1030 <assert@plt>
movslq %ebp,%rbp
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %rbp,%rdx
call   1040 <memcpy@plt>
add    %rbp,%rbx
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @serialize_char(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = call i32 (i8*, ...) bitcast (i32 (...)* @assert to i32 (i8*, ...)*)(i8* %7)
%9 = load i8*, i8** %5
%10 = call i32 (i8*, ...) bitcast (i32 (...)* @assert to i32 (i8*, ...)*)(i8* %9)
%11 = load i32, i32* %6
%12 = call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 %11)
%13 = load i8*, i8** %4
%14 = load i8*, i8** %5
%15 = load i32, i32* %6
%16 = sext i32 %15 to i64
%17 = load i32, i32* %6
%18 = load i8*, i8** %4
%19 = sext i32 %17 to i64
%20 = getelementptr inbounds i8, i8* %18, i64 %19
store i8* %20, i8** %4
%21 = load i8*, i8** %4
ret i8* %21
}

LLVM IR (-O2):
define i8* @serialize_char(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 (i8*, ...) bitcast (i32 (...)* @assert to i32 (i8*, ...)*)(i8* %0)
%5 = tail call i32 (i8*, ...) bitcast (i32 (...)* @assert to i32 (i8*, ...)*)(i8* %1)
%6 = tail call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 %2)
%7 = sext i32 %2 to i64
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 %7, i1 false)
%8 = getelementptr inbounds i8, i8* %0, i64 %7
ret i8* %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint32_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
uint16_t eeprom_read_word(const uint16_t *addr) {
  uint32_t offset = (uint32_t)addr;
  if (offset >= 2048 - 1)
    return 0;
  return *(uint16_t *)(&((uint8_t *)0x14000000)[offset]);
}


x86 assembly (clang, -O0):
<eeprom_read_word>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
cmpl   $0x7ff,-0x14(%rbp)
jl     1128 <eeprom_read_word+0x28>
movl   $0x0,-0x4(%rbp)
jmp    1137 <eeprom_read_word+0x37>
movslq -0x14(%rbp),%rcx
mov    $0x14000000,%eax
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<eeprom_read_word>:
xor    %eax,%eax
cmp    $0x7fe,%edi
jg     1114 <eeprom_read_word+0x14>
movslq %edi,%rax
mov    0x14000000(,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @eeprom_read_word(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
%5 = load i32*, i32** %3
%6 = ptrtoint i32* %5 to i32
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp sge i32 %7, 2047
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 0, i32* %2
br label %15
10: ; preds = %1
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* inttoptr (i64 335544320 to i32*), i64 %12
%14 = load i32, i32* %13
store i32 %14, i32* %2
br label %15
15: ; preds = %10, %9
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @eeprom_read_word(i32* %0) {
%2 = ptrtoint i32* %0 to i64
%3 = trunc i64 %2 to i32
%4 = icmp sgt i32 %3, 2046
br i1 %4, label %10, label %5
5: ; preds = %1
%6 = shl i64 %2, 32
%7 = ashr exact i64 %6, 32
%8 = getelementptr inbounds i32, i32* inttoptr (i64 335544320 to i32*), i64 %7
%9 = load i32, i32* %8
br label %10
10: ; preds = %1, %5
%11 = phi i32 [ %9, %5 ], [ 0, %1 ]
ret i32 %11
}
int str_len(char *s) {
  int i = 0;
  for (; s[i] != '\0'; i++)
    ;
  return i;
}


x86 assembly (clang, -O0):
<str_len>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1137 <str_len+0x37>
jmp    1129 <str_len+0x29>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <str_len+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_len>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <str_len+0x10>
ret

LLVM IR (-O0):
define i32 @str_len(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %13, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %4
br label %13
13: ; preds = %12
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %4
16: ; preds = %4
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @str_len(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
/* Type definitions */
struct mat4 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mat4_lerp(float *, float *, float *, float);
__attribute__((always_)) struct mat4 *
psmat4_lerp(struct mat4 *result, struct mat4 *a, struct mat4 *b, float p) {
  mat4_lerp((float *)result, (float *)a, (float *)b, p);
  return result;
}


x86 assembly (clang, -O0):
<psmat4_lerp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movss  %xmm0,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
movss  -0x1c(%rbp),%xmm0
call   1030 <mat4_lerp@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psmat4_lerp>:
push   %rbx
mov    %rdi,%rbx
call   1030 <mat4_lerp@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.mat4 = type { i32 }
define %struct.mat4* @psmat4_lerp(%struct.mat4* %0, %struct.mat4* %1, %struct.mat4* %2, float %3) {
%5 = alloca %struct.mat4*
%6 = alloca %struct.mat4*
%7 = alloca %struct.mat4*
%8 = alloca float
store %struct.mat4* %0, %struct.mat4** %5
store %struct.mat4* %1, %struct.mat4** %6
store %struct.mat4* %2, %struct.mat4** %7
store float %3, float* %8
%9 = load %struct.mat4*, %struct.mat4** %5
%10 = bitcast %struct.mat4* %9 to float*
%11 = load %struct.mat4*, %struct.mat4** %6
%12 = bitcast %struct.mat4* %11 to float*
%13 = load %struct.mat4*, %struct.mat4** %7
%14 = bitcast %struct.mat4* %13 to float*
%15 = load float, float* %8
%16 = call i32 @mat4_lerp(float* %10, float* %12, float* %14, float %15)
%17 = load %struct.mat4*, %struct.mat4** %5
ret %struct.mat4* %17
}

LLVM IR (-O2):
%struct.mat4 = type { i32 }
define %struct.mat4* @psmat4_lerp(%struct.mat4* returned %0, %struct.mat4* %1, %struct.mat4* %2, float %3) {
%5 = bitcast %struct.mat4* %0 to float*
%6 = bitcast %struct.mat4* %1 to float*
%7 = bitcast %struct.mat4* %2 to float*
%8 = tail call i32 @mat4_lerp(float* %5, float* %6, float* %7, float %3)
ret %struct.mat4* %0
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void std_alloc_fail(void) {
  fprintf(stderr, "Memory allocation failure\n");
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<std_alloc_fail>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<std_alloc_fail>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [27 x i8] c"Memory allocation failure\0A\00"
@EXIT_FAILURE = global i32 0
define void @std_alloc_fail() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @EXIT_FAILURE
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [27 x i8] c"Memory allocation failure\0A\00"
@EXIT_FAILURE = global i32 0
define void @std_alloc_fail() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @EXIT_FAILURE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ rot13(char *);
int main(int argc, char **argv) {
  char **args = argv;
  if (argc < 2) {
    printf("Usage: %s [text]\n", *argv);
    return 0;
  }
  rot13(*(args + 8));
  printf("\n");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    1169 <main+0x49>
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xeaa(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
movl   $0x0,-0x4(%rbp)
jmp    1184 <main+0x64>
mov    -0x18(%rbp),%rax
mov    0x40(%rax),%rdi
call   1030 <rot13@plt>
lea    0xe93(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x1,%edi
jg     1149 <main+0x19>
mov    (%rsi),%rsi
lea    0xec0(%rip),%rdi
xor    %eax,%eax
call   1050 <printf@plt>
jmp    115c <main+0x2c>
mov    0x40(%rsi),%rdi
call   1040 <rot13@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"Usage: %s [text]\0A\00"
@.str.1 = [2 x i8] c"\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i8**, i8*** %5
store i8** %7, i8*** %6
%8 = load i32, i32* %4
%9 = icmp slt i32 %8, 2
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = load i8**, i8*** %5
%12 = load i8*, i8** %11
%13 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %12)
store i32 0, i32* %3
br label %20
14: ; preds = %2
%15 = load i8**, i8*** %6
%16 = getelementptr inbounds i8*, i8** %15, i64 8
%17 = load i8*, i8** %16
%18 = call i32 @rot13(i8* %17)
%19 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
br label %20
20: ; preds = %14, %10
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
@.str = [18 x i8] c"Usage: %s [text]\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = load i8*, i8** %1
%6 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %5)
br label %12
7: ; preds = %2
%8 = getelementptr inbounds i8*, i8** %1, i64 8
%9 = load i8*, i8** %8
%10 = tail call i32 @rot13(i8* %9)
%11 = tail call i32 @putchar(i32 10)
br label %12
12: ; preds = %7, %4
ret i32 0
}
/* Type definitions */
struct stat {
  int st_mode;
};

/* Variables and functions */
int S_IXUSR;
scalar_t__ stat(char const *, struct stat *);
int fsop_path_exec_owner(const char *path) {
  struct stat st;
  if (stat(path, &st) < 0)
    return -1;
  return (st.st_mode & S_IXUSR);
}


x86 assembly (clang, -O0):
<fsop_path_exec_owner>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <stat@plt>
cmp    $0x0,%rax
jge    113f <fsop_path_exec_owner+0x2f>
movl   $0xffffffff,-0x4(%rbp)
jmp    114e <fsop_path_exec_owner+0x3e>
mov    -0x18(%rbp),%eax
mov    0x2e9f(%rip),%rcx
and    (%rcx),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsop_path_exec_owner>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
mov    0x2ec8(%rip),%rcx
mov    (%rcx),%ecx
and    (%rsp),%ecx
test   %rax,%rax
mov    $0xffffffff,%eax
cmovns %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
@S_IXUSR = global i32 0
define i32 @fsop_path_exec_owner(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.stat
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @stat(i8* %5, %struct.stat* %4)
%7 = icmp slt i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 -1, i32* %2
br label %14
9: ; preds = %1
%10 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%11 = load i32, i32* %10
%12 = load i32, i32* @S_IXUSR
%13 = and i32 %11, %12
store i32 %13, i32* %2
br label %14
14: ; preds = %9, %8
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
%struct.stat = type { i32 }
@S_IXUSR = global i32 0
define i32 @fsop_path_exec_owner(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp slt i64 %4, 0
%6 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%7 = load i32, i32* %6
%8 = load i32, i32* @S_IXUSR
%9 = and i32 %8, %7
%10 = select i1 %5, i32 -1, i32 %9
ret i32 %10
}
const char *__malidrv_build_info(void) {
  return "malidrv:  API_VERSION=401 REPO_URL=heads/cm1_smdk "
         "REVISION=r4p0-00rel0-Emerald-JB420-2B19R2-4821-g609748a "
         "CHANGED_REVISION=Emerald-JB420-2B19R2-4821-g609748a "
         "CHANGE_DATE=2013-12-11 17:02:41 +0800 BUILD_DATE=Sat Dec 21 04:05:11 "
         "CST 2013 BUILD=release TARGET_PLATFORM=pegasus-m400 "
         "MALI_PLATFORM=pegasus-m400 KDIR= "
         "OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING=y "
         "USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 "
         "USING_POWER_PERFORMANCE_POLICY= MALI_UPPER_HALF_SCHEDULING=1";
}


x86 assembly (clang, -O0):
<__malidrv_build_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__malidrv_build_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [490 x i8] c"malidrv: API_VERSION=401 REPO_URL=heads/cm1_smdk REVISION=r4p0-00rel0-Emerald-JB420-2B19R2-4821-g609748a CHANGED_REVISION=Emerald-JB420-2B19R2-4821-g609748a CHANGE_DATE=2013-12-11 17:02:41 +0800 BUILD_DATE=Sat Dec 21 04:05:11 CST 2013 BUILD=release TARGET_PLATFORM=pegasus-m400 MALI_PLATFORM=pegasus-m400 KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING=y USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 USING_POWER_PERFORMANCE_POLICY= MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([490 x i8], [490 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [490 x i8] c"malidrv: API_VERSION=401 REPO_URL=heads/cm1_smdk REVISION=r4p0-00rel0-Emerald-JB420-2B19R2-4821-g609748a CHANGED_REVISION=Emerald-JB420-2B19R2-4821-g609748a CHANGE_DATE=2013-12-11 17:02:41 +0800 BUILD_DATE=Sat Dec 21 04:05:11 CST 2013 BUILD=release TARGET_PLATFORM=pegasus-m400 MALI_PLATFORM=pegasus-m400 KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING=y USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 USING_POWER_PERFORMANCE_POLICY= MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([490 x i8], [490 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ create_modes();
int main(int argc, char **argv) { create_modes(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <create_modes@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <create_modes@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @create_modes()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @create_modes()
ret i32 0
}
void sort_list(struct node *head) {}


x86 assembly (clang, -O0):
<sort_list>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sort_list>:
ret

LLVM IR (-O0):
%struct.node = type opaque
define void @sort_list(%struct.node* %0) {
%2 = alloca %struct.node*
store %struct.node* %0, %struct.node** %2
ret void
}

LLVM IR (-O2):
%struct.node = type opaque
define void @sort_list(%struct.node* nocapture %0) {
ret void
}
/* Variables and functions */
scalar_t__ strcmp(char *, char *);
bool isParenthese(char *exp) {
  return strcmp(exp, "(") == 0 || strcmp(exp, ")") == 0;
}


x86 assembly (clang, -O0):
<isParenthese>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x9(%rbp)
je     1158 <isParenthese+0x48>
mov    -0x8(%rbp),%rdi
lea    0xeb9(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isParenthese>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <strcmp@plt>
test   %rax,%rax
je     1141 <isParenthese+0x31>
lea    0xed6(%rip),%rsi
mov    %rbx,%rdi
call   1030 <strcmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
pop    %rbx
ret
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"(\00"
@.str.1 = [2 x i8] c")\00"
define i32 @isParenthese(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @strcmp(i8* %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%5 = icmp eq i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i64 @strcmp(i8* %7, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%9 = icmp eq i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
@.str = [2 x i8] c"(\00"
@.str.1 = [2 x i8] c")\00"
define i32 @isParenthese(i8* %0) {
%2 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ rotr(int *, int *, int *, int *);
int /*<<< orphan*/ scanf(char *, int *, int *, int *, int *);
int main() {
  int a, b, c, n;
  scanf("%d %d %d %d", &a, &b, &c, &n);
  rotr(&a, &b, &c, &n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%r8
call   1030 <scanf@plt>
lea    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
lea    -0x10(%rbp),%rdx
lea    -0x14(%rbp),%rcx
call   1040 <rotr@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %r12
push   %rbx
sub    $0x18,%rsp
lea    0xece(%rip),%rdi
lea    0x14(%rsp),%rbx
lea    0x10(%rsp),%r14
lea    0xc(%rsp),%r15
lea    0x8(%rsp),%r12
mov    %rbx,%rsi
mov    %r14,%rdx
mov    %r15,%rcx
mov    %r12,%r8
call   1030 <scanf@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
mov    %r12,%rcx
call   1040 <rotr@plt>
xor    %eax,%eax
add    $0x18,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [12 x i8] c"%d %d %d %d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
%6 = call i32 @scanf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32* %2, i32* %3, i32* %4, i32* %5)
%7 = call i32 @rotr(i32* %2, i32* %3, i32* %4, i32* %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"%d %d %d %d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %1 to i8*
%6 = bitcast i32* %2 to i8*
%7 = bitcast i32* %3 to i8*
%8 = bitcast i32* %4 to i8*
%9 = call i32 @scanf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2, i32* %3, i32* %4)
%10 = call i32 @rotr(i32* %1, i32* %2, i32* %3, i32* %4)
ret i32 0
}
void _debug(char *format, ...) {}


x86 assembly (clang, -O0):
<_debug>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_debug>:
ret

LLVM IR (-O0):
define void @_debug(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @_debug(i8* nocapture %0, ...) {
ret void
}
/* Variables and functions */
scalar_t__ memcpy(int /*<<< orphan*/, char const *, size_t);
int strlen(char const *);
int /*<<< orphan*/ xmalloc(size_t);
char *xstrdup(const char *s) {
  size_t l = strlen(s) + 1;
  return (char *)memcpy(xmalloc(l), s, l);
}


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <xmalloc@plt>
mov    %eax,%edi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1050 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <strlen@plt>
add    $0x1,%eax
movslq %eax,%rbx
mov    %rbx,%rdi
call   1040 <xmalloc@plt>
mov    %eax,%edi
mov    %r14,%rsi
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1050 <memcpy@plt>

LLVM IR (-O0):
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = add nsw i32 %5, 1
%7 = sext i32 %6 to i64
store i64 %7, i64* %3
%8 = load i64, i64* %3
%9 = call i32 @xmalloc(i64 %8)
%10 = load i8*, i8** %2
%11 = load i64, i64* %3
%12 = call i64 @memcpy(i32 %9, i8* %10, i64 %11)
%13 = inttoptr i64 %12 to i8*
ret i8* %13
}

LLVM IR (-O2):
define i8* @xstrdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = sext i32 %3 to i64
%5 = tail call i32 @xmalloc(i64 %4)
%6 = tail call i64 @memcpy(i32 %5, i8* %0, i64 %4)
%7 = inttoptr i64 %6 to i8*
ret i8* %7
}
/* Variables and functions */
int shim_enosys(int /*<<< orphan*/, int);
int shim_sysfs(int option, ...) { return shim_enosys(0, option); }


x86 assembly (clang, -O0):
<shim_sysfs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
xor    %edi,%edi
call   1030 <shim_enosys@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shim_sysfs>:
mov    %edi,%esi
xor    %edi,%edi
jmp    1030 <shim_enosys@plt>

LLVM IR (-O0):
define i32 @shim_sysfs(i32 %0, ...) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @shim_enosys(i32 0, i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @shim_sysfs(i32 %0, ...) {
%2 = tail call i32 @shim_enosys(i32 0, i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void T_free(void *block) {
  if (block != NULL) {
    free(block);
  }
}


x86 assembly (clang, -O0):
<T_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <T_free+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<T_free>:
test   %rdi,%rdi
je     111a <T_free+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @T_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @T_free(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
int div0(int x) { return 1 / x; }


x86 assembly (clang, -O0):
<div0>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
cltd
idivl  -0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<div0>:
lea    0x1(%rdi),%ecx
xor    %eax,%eax
cmp    $0x3,%ecx
cmovb  %edi,%eax
ret

LLVM IR (-O0):
define i32 @div0(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 1, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @div0(i32 %0) {
%2 = add i32 %0, 1
%3 = icmp ult i32 %2, 3
%4 = select i1 %3, i32 %0, i32 0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ writestr(char *);
void newline() { writestr("\r\n"); }


x86 assembly (clang, -O0):
<newline>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <writestr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<newline>:
lea    0xee9(%rip),%rdi
jmp    1030 <writestr@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"\0D\0A\00"
define void @newline() {
%1 = call i32 @writestr(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"\0D\0A\00"
define void @newline() {
%1 = tail call i32 @writestr(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}
int Bematech_FI_NumeroLoja(Var, Retorno) {
  return Formata("\x1b|35|15|\x1b", Var, Retorno);
}


x86 assembly (clang, -O0):
<Bematech_FI_NumeroLoja>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xed5(%rip),%rdi
mov    $0x0,%al
call   1030 <Formata@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Bematech_FI_NumeroLoja>:
mov    %esi,%edx
mov    %edi,%esi
lea    0xee5(%rip),%rdi
xor    %eax,%eax
jmp    1030 <Formata@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"\1B|35|15|\1B\00"
define i32 @Bematech_FI_NumeroLoja(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 (i8*, i32, i32, ...) bitcast (i32 (...)* @Formata to i32 (i8*, i32, i32, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
@.str = [10 x i8] c"\1B|35|15|\1B\00"
define i32 @Bematech_FI_NumeroLoja(i32 %0, i32 %1) {
%3 = tail call i32 (i8*, i32, i32, ...) bitcast (i32 (...)* @Formata to i32 (i8*, i32, i32, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1)
ret i32 %3
}
void umem_panic(void) {}


x86 assembly (clang, -O0):
<umem_panic>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<umem_panic>:
ret

LLVM IR (-O0):
define void @umem_panic() {
ret void
}

LLVM IR (-O2):
define void @umem_panic() {
ret void
}