xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned long long);
void cx_UnsignedLongLongInt_print(unsigned long long int *const value) {
  printf("%lluULL", *value);
}


x86 assembly (clang, -O0):
<cx_UnsignedLongLongInt_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rsi
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cx_UnsignedLongLongInt_print>:
mov    (%rdi),%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"%lluULL\00"
define void @cx_UnsignedLongLongInt_print(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i64 %4)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"%lluULL\00"
define void @cx_UnsignedLongLongInt_print(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i64 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ tab_show_next();
int controller_tab_next(int k) {
  tab_show_next();
  return 0;
}


x86 assembly (clang, -O0):
<controller_tab_next>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <tab_show_next@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<controller_tab_next>:
push   %rax
xor    %eax,%eax
call   1030 <tab_show_next@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @controller_tab_next(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @tab_show_next()
ret i32 0
}

LLVM IR (-O2):
define i32 @controller_tab_next(i32 %0) {
%2 = tail call i32 (...) @tab_show_next()
ret i32 0
}
void i2o_ECPublicKey(void) {}


x86 assembly (clang, -O0):
<i2o_ECPublicKey>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2o_ECPublicKey>:
ret

LLVM IR (-O0):
define void @i2o_ECPublicKey() {
ret void
}

LLVM IR (-O2):
define void @i2o_ECPublicKey() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128d;

/* Variables and functions */
int /*<<< orphan*/ _mm_cmpngt_pd(int /*<<< orphan*/, int /*<<< orphan*/);
__m128d test_mm_cmpngt_pd(__m128d A, __m128d B) { return _mm_cmpngt_pd(A, B); }


x86 assembly (clang, -O0):
<test_mm_cmpngt_pd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_cmpngt_pd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cmpngt_pd>:
jmp    1030 <_mm_cmpngt_pd@plt>

LLVM IR (-O0):
define i32 @test_mm_cmpngt_pd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_cmpngt_pd(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_cmpngt_pd(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmpngt_pd(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ nc_thread_done();
int /*<<< orphan*/ printf(char *);
void toggle_red_fn(void *stack) {
  (void)stack;
  printf("\n Toggle RED led\n");
  nc_thread_done();
}


x86 assembly (clang, -O0):
<toggle_red_fn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <nc_thread_done@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toggle_red_fn>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <nc_thread_done@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"\0A Toggle RED led\0A\00"
define void @toggle_red_fn(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%5 = call i32 (...) @nc_thread_done()
ret void
}

LLVM IR (-O2):
@str = [17 x i8] c"\0A Toggle RED led\00"
define void @toggle_red_fn(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 (...) @nc_thread_done()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, long);
int /*<<< orphan*/ usleep(int);
void *worker(void *arg) {
  long i = (long)arg;
  printf("Thread %ld alive\n", i);
  usleep(100);
  printf("aaaaand thread %ld exiting.\n", i);
}


x86 assembly (clang, -O0):
<worker>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
mov    $0x64,%edi
call   1040 <usleep@plt>
mov    -0x18(%rbp),%rsi
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<worker>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
mov    $0x64,%edi
call   1040 <usleep@plt>
lea    0xece(%rip),%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"Thread %ld alive\0A\00"
@.str.1 = [29 x i8] c"aaaaand thread %ld exiting.\0A\00"
define i8* @worker(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = ptrtoint i8* %5 to i64
store i64 %6, i64* %4
%7 = load i64, i64* %4
%8 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i64 %7)
%9 = call i32 @usleep(i32 100)
%10 = load i64, i64* %4
%11 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0), i64 %10)
%12 = load i8*, i8** %2
ret i8* %12
}

LLVM IR (-O2):
@.str = [18 x i8] c"Thread %ld alive\0A\00"
@.str.1 = [29 x i8] c"aaaaand thread %ld exiting.\0A\00"
define noalias i8* @worker(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i64 %2)
%4 = tail call i32 @usleep(i32 100)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0), i64 %2)
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ time_2();
int main() {
  time_2();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <time_2@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <time_2@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @time_2()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @time_2()
ret i32 0
}
int fun235() { return 235; }


x86 assembly (clang, -O0):
<fun235>:
push   %rbp
mov    %rsp,%rbp
mov    $0xeb,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun235>:
mov    $0xeb,%eax
ret

LLVM IR (-O0):
define i32 @fun235() {
ret i32 235
}

LLVM IR (-O2):
define i32 @fun235() {
ret i32 235
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ islower(int);
void t_islower_0xdf() {
  Assert_real((islower(223) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              1120, ("islower should be 0 for 0xdf"));
}


x86 assembly (clang, -O0):
<t_islower_0xdf>:
push   %rbp
mov    %rsp,%rbp
mov    $0xdf,%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x460,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0xdf>:
push   %rax
mov    $0xdf,%edi
call   1030 <islower@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x460,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xdf\00"
define void @t_islower_0xdf() {
%1 = call i64 @islower(i32 223)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1120, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xdf\00"
define void @t_islower_0xdf() {
%1 = tail call i64 @islower(i32 223)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1120, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
unsigned bch15_5_encode(unsigned _x) {
  return (-(_x & 1) & 0x0537) ^ (-(_x >> 1 & 1) & 0x0A6E) ^
         (-(_x >> 2 & 1) & 0x11EB) ^ (-(_x >> 3 & 1) & 0x23D6) ^
         (-(_x >> 4 & 1) & 0x429B);
}


x86 assembly (clang, -O0):
<bch15_5_encode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
and    $0x1,%ecx
xor    %eax,%eax
sub    %ecx,%eax
and    $0x537,%eax
mov    -0x4(%rbp),%edx
shr    $0x1,%edx
and    $0x1,%edx
xor    %ecx,%ecx
sub    %edx,%ecx
and    $0xa6e,%ecx
xor    %ecx,%eax
mov    -0x4(%rbp),%edx
shr    $0x2,%edx
and    $0x1,%edx
xor    %ecx,%ecx
sub    %edx,%ecx
and    $0x11eb,%ecx
xor    %ecx,%eax
mov    -0x4(%rbp),%edx
shr    $0x3,%edx
and    $0x1,%edx
xor    %ecx,%ecx
sub    %edx,%ecx
and    $0x23d6,%ecx
xor    %ecx,%eax
mov    -0x4(%rbp),%edx
shr    $0x4,%edx
and    $0x1,%edx
xor    %ecx,%ecx
sub    %edx,%ecx
and    $0x429b,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bch15_5_encode>:
mov    %edi,%eax
and    $0x1,%eax
neg    %eax
and    $0x537,%eax
mov    %edi,%ecx
shr    %ecx
and    $0x1,%ecx
neg    %ecx
and    $0xa6e,%ecx
xor    %eax,%ecx
mov    %edi,%edx
shr    $0x2,%edx
and    $0x1,%edx
neg    %edx
and    $0x11eb,%edx
mov    %edi,%eax
shr    $0x3,%eax
and    $0x1,%eax
neg    %eax
and    $0x23d6,%eax
xor    %edx,%eax
xor    %ecx,%eax
shr    $0x4,%edi
and    $0x1,%edi
neg    %edi
and    $0x429b,%edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @bch15_5_encode(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 1
%5 = sub i32 0, %4
%6 = and i32 %5, 1335
%7 = load i32, i32* %2
%8 = lshr i32 %7, 1
%9 = and i32 %8, 1
%10 = sub i32 0, %9
%11 = and i32 %10, 2670
%12 = xor i32 %6, %11
%13 = load i32, i32* %2
%14 = lshr i32 %13, 2
%15 = and i32 %14, 1
%16 = sub i32 0, %15
%17 = and i32 %16, 4587
%18 = xor i32 %12, %17
%19 = load i32, i32* %2
%20 = lshr i32 %19, 3
%21 = and i32 %20, 1
%22 = sub i32 0, %21
%23 = and i32 %22, 9174
%24 = xor i32 %18, %23
%25 = load i32, i32* %2
%26 = lshr i32 %25, 4
%27 = and i32 %26, 1
%28 = sub i32 0, %27
%29 = and i32 %28, 17051
%30 = xor i32 %24, %29
ret i32 %30
}

LLVM IR (-O2):
define i32 @bch15_5_encode(i32 %0) {
%2 = and i32 %0, 1
%3 = sub nsw i32 0, %2
%4 = and i32 %3, 1335
%5 = lshr i32 %0, 1
%6 = and i32 %5, 1
%7 = sub nsw i32 0, %6
%8 = and i32 %7, 2670
%9 = xor i32 %8, %4
%10 = lshr i32 %0, 2
%11 = and i32 %10, 1
%12 = sub nsw i32 0, %11
%13 = and i32 %12, 4587
%14 = xor i32 %9, %13
%15 = lshr i32 %0, 3
%16 = and i32 %15, 1
%17 = sub nsw i32 0, %16
%18 = and i32 %17, 9174
%19 = xor i32 %14, %18
%20 = lshr i32 %0, 4
%21 = and i32 %20, 1
%22 = sub nsw i32 0, %21
%23 = and i32 %22, 17051
%24 = xor i32 %19, %23
ret i32 %24
}
/* Type definitions */
struct vm_area_struct {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ BUG();
int hugepage_madvise(struct vm_area_struct *vma, unsigned long *vm_flags,
                     int advice) {
  BUG();
  return 0;
}


x86 assembly (clang, -O0):
<hugepage_madvise>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0x0,%al
call   1030 <BUG@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hugepage_madvise>:
push   %rax
xor    %eax,%eax
call   1030 <BUG@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.vm_area_struct = type { i32 }
define i32 @hugepage_madvise(%struct.vm_area_struct* %0, i64* %1, i32 %2) {
%4 = alloca %struct.vm_area_struct*
%5 = alloca i64*
%6 = alloca i32
store %struct.vm_area_struct* %0, %struct.vm_area_struct** %4
store i64* %1, i64** %5
store i32 %2, i32* %6
%7 = call i32 (...) @BUG()
ret i32 0
}

LLVM IR (-O2):
%struct.vm_area_struct = type { i32 }
define i32 @hugepage_madvise(%struct.vm_area_struct* nocapture readnone %0, i64* nocapture readnone %1, i32 %2) {
%4 = tail call i32 (...) @BUG()
ret i32 0
}
unsigned char leds_arch_get(void) { return 0; }


x86 assembly (clang, -O0):
<leds_arch_get>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<leds_arch_get>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i8 @leds_arch_get() {
ret i8 0
}

LLVM IR (-O2):
define zeroext i8 @leds_arch_get() {
ret i8 0
}
int bit_distance000(char d[]) { return 0; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @bit_distance000(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @bit_distance000(i8* nocapture readnone %0) {
ret i32 0
}
void put_device(void) { nsc_assert(0, __func__); }


x86 assembly (clang, -O0):
<put_device>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
mov    $0x0,%al
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_device>:
lea    0xee9(%rip),%rsi
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
@__func__.put_device = [11 x i8] c"put_device\00"
define void @put_device() {
%1 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @__func__.put_device, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.put_device = [11 x i8] c"put_device\00"
define void @put_device() {
%1 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @__func__.put_device, i64 0, i64 0))
ret void
}
double F(double v, double s, double a1, double a2, double a3) {
  double r;
  r = s / (s - 1.0);
  return (a1 + 1.0) / v + a3 / (r + v) - (a1 + a2 + a3 + 2) / (1.0 + v);
}


x86 assembly (clang, -O0):
<F>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  %xmm4,-0x28(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  0xed1(%rip),%xmm2
subsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  0xebc(%rip),%xmm0
addsd  -0x18(%rbp),%xmm0
divsd  -0x8(%rbp),%xmm0
movsd  -0x28(%rbp),%xmm1
movsd  -0x30(%rbp),%xmm2
addsd  -0x8(%rbp),%xmm2
divsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
movsd  -0x18(%rbp),%xmm1
addsd  -0x20(%rbp),%xmm1
addsd  -0x28(%rbp),%xmm1
movsd  0xe8c(%rip),%xmm2
addsd  %xmm2,%xmm1
movsd  0xe78(%rip),%xmm2
addsd  -0x8(%rbp),%xmm2
divsd  %xmm2,%xmm1
subsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<F>:
movsd  0xef8(%rip),%xmm5
addsd  %xmm1,%xmm5
divsd  %xmm5,%xmm1
addsd  %xmm0,%xmm1
addsd  %xmm2,%xmm3
addsd  %xmm4,%xmm3
unpcklpd %xmm3,%xmm2
addpd  0xee8(%rip),%xmm2
divsd  %xmm1,%xmm4
movsd  0xed4(%rip),%xmm1
addsd  %xmm0,%xmm1
unpcklpd %xmm1,%xmm0
divpd  %xmm0,%xmm2
addsd  %xmm2,%xmm4
unpckhpd %xmm2,%xmm2
subsd  %xmm2,%xmm4
movapd %xmm4,%xmm0
ret

LLVM IR (-O0):
define double @F(double %0, double %1, double %2, double %3, double %4) {
%6 = alloca double
%7 = alloca double
%8 = alloca double
%9 = alloca double
%10 = alloca double
%11 = alloca double
store double %0, double* %6
store double %1, double* %7
store double %2, double* %8
store double %3, double* %9
store double %4, double* %10
%12 = load double, double* %7
%13 = load double, double* %7
%14 = fsub double %13, 1.000000e+00
%15 = fdiv double %12, %14
store double %15, double* %11
%16 = load double, double* %8
%17 = fadd double %16, 1.000000e+00
%18 = load double, double* %6
%19 = fdiv double %17, %18
%20 = load double, double* %10
%21 = load double, double* %11
%22 = load double, double* %6
%23 = fadd double %21, %22
%24 = fdiv double %20, %23
%25 = fadd double %19, %24
%26 = load double, double* %8
%27 = load double, double* %9
%28 = fadd double %26, %27
%29 = load double, double* %10
%30 = fadd double %28, %29
%31 = fadd double %30, 2.000000e+00
%32 = load double, double* %6
%33 = fadd double 1.000000e+00, %32
%34 = fdiv double %31, %33
%35 = fsub double %25, %34
ret double %35
}

LLVM IR (-O2):
define double @F(double %0, double %1, double %2, double %3, double %4) {
%6 = fadd double %1, -1.000000e+00
%7 = fdiv double %1, %6
%8 = fadd double %7, %0
%9 = fdiv double %4, %8
%10 = fadd double %2, %3
%11 = fadd double %10, %4
%12 = insertelement <2 x double> poison, double %2, i64 0
%13 = insertelement <2 x double> %12, double %11, i64 1
%14 = fadd <2 x double> %13, <double 1.000000e+00, double 2.000000e+00>
%15 = fadd double %0, 1.000000e+00
%16 = insertelement <2 x double> poison, double %0, i64 0
%17 = insertelement <2 x double> %16, double %15, i64 1
%18 = fdiv <2 x double> %14, %17
%19 = extractelement <2 x double> %18, i64 0
%20 = fadd double %19, %9
%21 = extractelement <2 x double> %18, i64 1
%22 = fsub double %20, %21
ret double %22
}
/* Type definitions */
struct t_config_option {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ gui_buffer_notify_set_all();
void config_weechat_notify_change_cb(void *data,
                                     struct t_config_option *option) {
  (void)data;
  (void)option;
  gui_buffer_notify_set_all();
}


x86 assembly (clang, -O0):
<config_weechat_notify_change_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <gui_buffer_notify_set_all@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_weechat_notify_change_cb>:
xor    %eax,%eax
jmp    1030 <gui_buffer_notify_set_all@plt>

LLVM IR (-O0):
%struct.t_config_option = type { i32 }
define void @config_weechat_notify_change_cb(i8* %0, %struct.t_config_option* %1) {
%3 = alloca i8*
%4 = alloca %struct.t_config_option*
store i8* %0, i8** %3
store %struct.t_config_option* %1, %struct.t_config_option** %4
%5 = load i8*, i8** %3
%6 = load %struct.t_config_option*, %struct.t_config_option** %4
%7 = call i32 (...) @gui_buffer_notify_set_all()
ret void
}

LLVM IR (-O2):
%struct.t_config_option = type { i32 }
define void @config_weechat_notify_change_cb(i8* nocapture readnone %0, %struct.t_config_option* nocapture readnone %1) {
%3 = tail call i32 (...) @gui_buffer_notify_set_all()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_assert(int);
int main(void) {
  int array[10];
  int *ptrs[10];
  int i;
  for (i = 1; i < 11; ++i)
    ptrs[i - 1] = &array[i % 10];
  ptrs[0] = &array[9];
  *ptrs[0] = 1;
  array[0] = 2;
  test_assert(*ptrs[9] == 2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x90,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x84(%rbp)
cmpl   $0xb,-0x84(%rbp)
jge    1179 <main+0x69>
mov    -0x84(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
movslq %edx,%rax
lea    -0x30(%rbp),%rcx
shl    $0x2,%rax
add    %rax,%rcx
mov    -0x84(%rbp),%eax
sub    $0x1,%eax
cltq
mov    %rcx,-0x80(%rbp,%rax,8)
mov    -0x84(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x84(%rbp)
jmp    112c <main+0x1c>
lea    -0x30(%rbp),%rax
add    $0x24,%rax
mov    %rax,-0x80(%rbp)
mov    -0x80(%rbp),%rax
movl   $0x1,(%rax)
movl   $0x2,-0x30(%rbp)
mov    -0x38(%rbp),%rax
cmpl   $0x2,(%rax)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <test_assert@plt>
xor    %eax,%eax
add    $0x90,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <test_assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [10 x i32]
%3 = alloca [10 x i32*]
%4 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %4
br label %5
5: ; preds = %17, %0
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 11
br i1 %7, label %8, label %20
8: ; preds = %5
%9 = load i32, i32* %4
%10 = srem i32 %9, 10
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds [10 x i32], [10 x i32]* %2, i64 0, i64 %11
%13 = load i32, i32* %4
%14 = sub nsw i32 %13, 1
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds [10 x i32*], [10 x i32*]* %3, i64 0, i64 %15
store i32* %12, i32** %16
br label %17
17: ; preds = %8
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %5
20: ; preds = %5
%21 = getelementptr inbounds [10 x i32], [10 x i32]* %2, i64 0, i64 9
%22 = getelementptr inbounds [10 x i32*], [10 x i32*]* %3, i64 0, i64 0
store i32* %21, i32** %22
%23 = getelementptr inbounds [10 x i32*], [10 x i32*]* %3, i64 0, i64 0
%24 = load i32*, i32** %23
store i32 1, i32* %24
%25 = getelementptr inbounds [10 x i32], [10 x i32]* %2, i64 0, i64 0
store i32 2, i32* %25
%26 = getelementptr inbounds [10 x i32*], [10 x i32*]* %3, i64 0, i64 9
%27 = load i32*, i32** %26
%28 = load i32, i32* %27
%29 = icmp eq i32 %28, 2
%30 = zext i1 %29 to i32
%31 = call i32 @test_assert(i32 %30)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = call i32 @test_assert(i32 1)
ret i32 0
}
/* Variables and functions */
int *malloc(int);
int *mistake1() {
  int *buf = malloc(sizeof(int) * 6);
  buf[0] = 1;
  int i;
  for (i = 1; i < 6; i++) {
    buf[i] = i;
  }
  return buf;
}


x86 assembly (clang, -O0):
<mistake1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x18,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
movl   $0x1,-0xc(%rbp)
cmpl   $0x6,-0xc(%rbp)
jge    115d <mistake1+0x4d>
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1137 <mistake1+0x27>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mistake1>:
push   %rax
mov    $0x18,%edi
call   1030 <malloc@plt>
movaps 0xede(%rip),%xmm0
movups %xmm0,(%rax)
movabs $0x500000004,%rcx
mov    %rcx,0x10(%rax)
pop    %rcx
ret

LLVM IR (-O0):
define i32* @mistake1() {
%1 = alloca i32*
%2 = alloca i32
%3 = call i32* @malloc(i32 24)
store i32* %3, i32** %1
%4 = load i32*, i32** %1
%5 = getelementptr inbounds i32, i32* %4, i64 0
store i32 1, i32* %5
store i32 1, i32* %2
br label %6
6: ; preds = %15, %0
%7 = load i32, i32* %2
%8 = icmp slt i32 %7, 6
br i1 %8, label %9, label %18
9: ; preds = %6
%10 = load i32, i32* %2
%11 = load i32*, i32** %1
%12 = load i32, i32* %2
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
store i32 %10, i32* %14
br label %15
15: ; preds = %9
%16 = load i32, i32* %2
%17 = add nsw i32 %16, 1
store i32 %17, i32* %2
br label %6
18: ; preds = %6
%19 = load i32*, i32** %1
ret i32* %19
}

LLVM IR (-O2):
define noalias i32* @mistake1() {
%1 = tail call i32* @malloc(i32 24)
%2 = bitcast i32* %1 to <4 x i32>*
store <4 x i32> <i32 1, i32 1, i32 2, i32 3>, <4 x i32>* %2
%3 = getelementptr inbounds i32, i32* %1, i64 4
store i32 4, i32* %3
%4 = getelementptr inbounds i32, i32* %1, i64 5
store i32 5, i32* %4
ret i32* %1
}
int rankMax(unsigned int e) {
  int i;
  int k, l;
  i = 32 - 1;
  k = (e >> i & 0x1) == 1;
  l = (e >> (i - 1) & 0x1) == 1;
  if (k == 1) {
    if (l == 1) {
      return 4;
    } else {
      return 3;
    }
  } else {
    if (l == 1) {
      return 2;
    } else {
      return 1;
    }
  }
}


x86 assembly (clang, -O0):
<rankMax>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x1f,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
shr    %cl,%eax
and    $0x1,%eax
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
shr    %cl,%eax
and    $0x1,%eax
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x1,-0x10(%rbp)
jne    116f <rankMax+0x6f>
cmpl   $0x1,-0x14(%rbp)
jne    1163 <rankMax+0x63>
movl   $0x4,-0x4(%rbp)
jmp    118c <rankMax+0x8c>
movl   $0x3,-0x4(%rbp)
jmp    118c <rankMax+0x8c>
cmpl   $0x1,-0x14(%rbp)
jne    1185 <rankMax+0x85>
movl   $0x2,-0x4(%rbp)
jmp    118c <rankMax+0x8c>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rankMax>:
mov    %edi,%eax
and    $0x40000000,%eax
shr    $0x1e,%edi
and    $0xfffffffe,%edi
cmp    $0x1,%eax
sbb    $0x0,%edi
lea    0x2(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @rankMax(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 31, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = lshr i32 %7, %8
%10 = and i32 %9, 1
%11 = icmp eq i32 %10, 1
%12 = zext i1 %11 to i32
store i32 %12, i32* %5
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = sub nsw i32 %14, 1
%16 = lshr i32 %13, %15
%17 = and i32 %16, 1
%18 = icmp eq i32 %17, 1
%19 = zext i1 %18 to i32
store i32 %19, i32* %6
%20 = load i32, i32* %5
%21 = icmp eq i32 %20, 1
br i1 %21, label %22, label %27
22: ; preds = %1
%23 = load i32, i32* %6
%24 = icmp eq i32 %23, 1
br i1 %24, label %25, label %26
25: ; preds = %22
store i32 4, i32* %2
br label %32
26: ; preds = %22
store i32 3, i32* %2
br label %32
27: ; preds = %1
%28 = load i32, i32* %6
%29 = icmp eq i32 %28, 1
br i1 %29, label %30, label %31
30: ; preds = %27
store i32 2, i32* %2
br label %32
31: ; preds = %27
store i32 1, i32* %2
br label %32
32: ; preds = %31, %30, %26, %25
%33 = load i32, i32* %2
ret i32 %33
}

LLVM IR (-O2):
define i32 @rankMax(i32 %0) {
%2 = icmp slt i32 %0, 0
%3 = and i32 %0, 1073741824
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 3, i32 4
%6 = select i1 %4, i32 1, i32 2
%7 = select i1 %2, i32 %5, i32 %6
ret i32 %7
}
int sgs_gethex(int c) {
  return ((c) >= '0' && (c) <= '9')
             ? ((c) - '0')
             : (((c) >= 'a' && (c) <= 'f') ? ((c) - 'a' + 10)
                                           : ((c) - 'A' + 10));
}


x86 assembly (clang, -O0):
<sgs_gethex>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x30,-0x4(%rbp)
jl     1129 <sgs_gethex+0x29>
cmpl   $0x39,-0x4(%rbp)
jg     1129 <sgs_gethex+0x29>
mov    -0x4(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x8(%rbp)
jmp    1160 <sgs_gethex+0x60>
cmpl   $0x61,-0x4(%rbp)
jl     114e <sgs_gethex+0x4e>
cmpl   $0x66,-0x4(%rbp)
jg     114e <sgs_gethex+0x4e>
mov    -0x4(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %eax,-0xc(%rbp)
jmp    115a <sgs_gethex+0x5a>
mov    -0x4(%rbp),%eax
sub    $0x41,%eax
add    $0xa,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sgs_gethex>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%eax
jb     111a <sgs_gethex+0x1a>
lea    -0x61(%rdi),%eax
cmp    $0x5,%eax
ja     1115 <sgs_gethex+0x15>
add    $0xffffffa9,%edi
jmp    1118 <sgs_gethex+0x18>
add    $0xffffffc9,%edi
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @sgs_gethex(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 48
br i1 %4, label %5, label %11
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 57
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i32, i32* %2
%10 = sub nsw i32 %9, 48
br label %27
11: ; preds = %5, %1
%12 = load i32, i32* %2
%13 = icmp sge i32 %12, 97
br i1 %13, label %14, label %21
14: ; preds = %11
%15 = load i32, i32* %2
%16 = icmp sle i32 %15, 102
br i1 %16, label %17, label %21
17: ; preds = %14
%18 = load i32, i32* %2
%19 = sub nsw i32 %18, 97
%20 = add nsw i32 %19, 10
br label %25
21: ; preds = %14, %11
%22 = load i32, i32* %2
%23 = sub nsw i32 %22, 65
%24 = add nsw i32 %23, 10
br label %25
25: ; preds = %21, %17
%26 = phi i32 [ %20, %17 ], [ %24, %21 ]
br label %27
27: ; preds = %25, %8
%28 = phi i32 [ %10, %8 ], [ %26, %25 ]
ret i32 %28
}

LLVM IR (-O2):
define i32 @sgs_gethex(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = add i32 %0, -97
%6 = icmp ult i32 %5, 6
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = add nsw i32 %0, -87
br label %11
9: ; preds = %4
%10 = add nsw i32 %0, -55
br label %11
11: ; preds = %1, %7, %9
%12 = phi i32 [ %8, %7 ], [ %10, %9 ], [ %2, %1 ]
ret i32 %12
}
int PDC_set_rows(rows)
int rows;
{ return (0); }


x86 assembly (clang, -O0):
<PDC_set_rows>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PDC_set_rows>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @PDC_set_rows(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @PDC_set_rows(i32 %0) {
ret i32 0
}
raise(c) char c;
{
  if ((c >= 'a') & (c <= 'z'))
    c = c - 'a' + 'A';
  return (c);
}


x86 assembly (clang, -O0):
<raise>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x61,%eax
setge  %al
and    $0x1,%al
movzbl %al,%eax
movsbl -0x1(%rbp),%ecx
cmp    $0x7a,%ecx
setle  %cl
and    $0x1,%cl
movzbl %cl,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     1141 <raise+0x41>
movsbl -0x1(%rbp),%eax
sub    $0x61,%eax
add    $0x41,%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<raise>:
shl    $0x18,%edi
lea    -0x60000001(%rdi),%ecx
lea    -0x20000000(%rdi),%eax
cmp    $0x1affffff,%ecx
cmovae %edi,%eax
sar    $0x18,%eax
ret

LLVM IR (-O0):
define i32 @raise(i32 %0) {
%2 = alloca i8
%3 = trunc i32 %0 to i8
store i8 %3, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 97
%7 = zext i1 %6 to i32
%8 = load i8, i8* %2
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 122
%11 = zext i1 %10 to i32
%12 = and i32 %7, %11
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %20
14: ; preds = %1
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = sub nsw i32 %16, 97
%18 = add nsw i32 %17, 65
%19 = trunc i32 %18 to i8
store i8 %19, i8* %2
br label %20
20: ; preds = %14, %1
%21 = load i8, i8* %2
%22 = sext i8 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @raise(i32 %0) {
%2 = shl i32 %0, 24
%3 = add i32 %2, -1610612737
%4 = icmp ult i32 %3, 452984831
%5 = add i32 %2, -536870912
%6 = select i1 %4, i32 %5, i32 %2
%7 = ashr exact i32 %6, 24
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int main(void) {
  fprintf(stderr, "\x1B[31m\e[1m"
                  "This is not the command you are looking for.\n"
                  "You probably want to run 'python3 -m pytest test/' instead"
                  "\e[0m\n");
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
lea    0xed1(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [118 x i8] c"\1B[31m\1B[1mThis is not the command you are looking for.\0AYou probably want to run 'python3 -m pytest test/' instead\1B[0m\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @stderr
%3 = call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([118 x i8], [118 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [118 x i8] c"\1B[31m\1B[1mThis is not the command you are looking for.\0AYou probably want to run 'python3 -m pytest test/' instead\1B[0m\0A\00"
define i32 @main() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([118 x i8], [118 x i8]* @.str, i64 0, i64 0))
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_iochannel_write() {
  printf("NOT IMPLEMENTED:"
         "pa_iochannel_write"
         "\n");
}


x86 assembly (clang, -O0):
<pa_iochannel_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_iochannel_write>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"NOT IMPLEMENTED:pa_iochannel_write\0A\00"
define i32 @pa_iochannel_write() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [35 x i8] c"NOT IMPLEMENTED:pa_iochannel_write\00"
define i32 @pa_iochannel_write() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
sub4(i) int i;
{ return i + (5 - i); }


x86 assembly (clang, -O0):
<sub4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x5,%ecx
sub    -0x4(%rbp),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub4>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @sub4(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 5, %4
%6 = add nsw i32 %3, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @sub4(i32 %0) {
ret i32 5
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ wait(int *);
void close_pipe(int fd) {
  close(fd);
  int status;
  wait(&status);
}


x86 assembly (clang, -O0):
<close_pipe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
lea    -0x8(%rbp),%rdi
call   1040 <wait@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_pipe>:
push   %rax
call   1030 <close@plt>
lea    0x4(%rsp),%rdi
call   1040 <wait@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @close_pipe(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @close(i32 %4)
%6 = call i32 @wait(i32* %3)
ret void
}

LLVM IR (-O2):
define void @close_pipe(i32 %0) {
%2 = alloca i32
%3 = tail call i32 @close(i32 %0)
%4 = bitcast i32* %2 to i8*
%5 = call i32 @wait(i32* %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sizes;

/* Variables and functions */
int test_loopback_all_sizes(int, int *, int);
int test_loopback_unaligned(int fd) {
  int sizes[] = {
      41,           16 + 8,       (1024 * 3) + 1,  (16 * 2) + 2,
      (16 * 3) + 3, (16 * 4) + 4, (1024),          (1024 * 3),
      (1024) + 16,  (1024) + 15,  (1024) + 8 * 16, (1024) + 8,
  };
  return test_loopback_all_sizes(fd, sizes,
                                 (int)(sizeof(sizes) / sizeof((sizes)[0])));
}


x86 assembly (clang, -O0):
<test_loopback_unaligned>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x40(%rbp),%rdi
lea    0xeca(%rip),%rsi
mov    $0x30,%edx
call   1040 <memcpy@plt>
mov    -0x4(%rbp),%edi
lea    -0x40(%rbp),%rsi
mov    $0xc,%edx
call   1030 <test_loopback_all_sizes@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_loopback_unaligned>:
sub    $0x38,%rsp
movaps 0xf05(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xee9(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xecd(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rsi
mov    $0xc,%edx
call   1030 <test_loopback_all_sizes@plt>
add    $0x38,%rsp
ret

LLVM IR (-O0):
@__const.test_loopback_unaligned.sizes = [12 x i32] [i32 41, i32 24, i32 3073, i32 34, i32 51, i32 68, i32 1024, i32 3072, i32 1040, i32 1039, i32 1152, i32 1032]
define i32 @test_loopback_unaligned(i32 %0) {
%2 = alloca i32
%3 = alloca [12 x i32]
store i32 %0, i32* %2
%4 = bitcast [12 x i32]* %3 to i8*
%5 = load i32, i32* %2
%6 = getelementptr inbounds [12 x i32], [12 x i32]* %3, i64 0, i64 0
%7 = call i32 @test_loopback_all_sizes(i32 %5, i32* %6, i32 12)
ret i32 %7
}

LLVM IR (-O2):
@__const.test_loopback_unaligned.sizes = [12 x i32] [i32 41, i32 24, i32 3073, i32 34, i32 51, i32 68, i32 1024, i32 3072, i32 1040, i32 1039, i32 1152, i32 1032]
define i32 @test_loopback_unaligned(i32 %0) {
%2 = alloca [12 x i32]
%3 = bitcast [12 x i32]* %2 to i8*
%4 = getelementptr inbounds [12 x i32], [12 x i32]* %2, i64 0, i64 0
%5 = call i32 @test_loopback_all_sizes(i32 %0, i32* %4, i32 12)
ret i32 %5
}
float smoothstep(const float min, const float max, const float input) {
  float r = (input - min) / (max - min);
  return r * r * (3.0f - 2.0f * r);
}


x86 assembly (clang, -O0):
<smoothstep>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
subss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
subss  -0x4(%rbp),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
mulss  -0x10(%rbp),%xmm0
movss  -0x10(%rbp),%xmm2
addss  %xmm2,%xmm2
movss  0xeb5(%rip),%xmm1
subss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<smoothstep>:
subss  %xmm0,%xmm2
subss  %xmm0,%xmm1
divss  %xmm1,%xmm2
movaps %xmm2,%xmm1
mulss  %xmm2,%xmm1
addss  %xmm2,%xmm2
movss  0xee1(%rip),%xmm0
subss  %xmm2,%xmm0
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @smoothstep(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%8 = load float, float* %6
%9 = load float, float* %4
%10 = fsub float %8, %9
%11 = load float, float* %5
%12 = load float, float* %4
%13 = fsub float %11, %12
%14 = fdiv float %10, %13
store float %14, float* %7
%15 = load float, float* %7
%16 = load float, float* %7
%17 = fmul float %15, %16
%18 = load float, float* %7
%19 = call float @llvm.fmuladd.f32(float -2.000000e+00, float %18, float 3.000000e+00)
%20 = fmul float %17, %19
ret float %20
}

LLVM IR (-O2):
define float @smoothstep(float %0, float %1, float %2) {
%4 = fsub float %2, %0
%5 = fsub float %1, %0
%6 = fdiv float %4, %5
%7 = fmul float %6, %6
%8 = tail call float @llvm.fmuladd.f32(float %6, float -2.000000e+00, float 3.000000e+00)
%9 = fmul float %7, %8
ret float %9
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *);
void stop(char *message) {
  printf("\n \t %s \n\n", message);
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<stop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<stop>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"\0A \09 %s \0A\0A\00"
@EXIT_SUCCESS = global i32 0
define void @stop(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = load i32, i32* @EXIT_SUCCESS
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@.str = [10 x i8] c"\0A \09 %s \0A\0A\00"
@EXIT_SUCCESS = global i32 0
define void @stop(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = load i32, i32* @EXIT_SUCCESS
%4 = tail call i32 @exit(i32 %3)
unreachable
}
long max(long v1, long v2) { return v1 < v2 ? v2 : v1; }


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1127 <max+0x27>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <max+0x2f>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
mov    %rdi,%rax
cmp    %rsi,%rdi
cmovl  %rsi,%rax
ret

LLVM IR (-O0):
define i64 @max(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %4
br label %12
10: ; preds = %2
%11 = load i64, i64* %3
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @max(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = select i1 %3, i64 %1, i64 %0
ret i64 %4
}
int child3() {
  int a = 0;
  int ii;
  for (ii = 0; ii < 6; ++ii)
    a += ii;
  return a;
}


x86 assembly (clang, -O0):
<child3>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x6,-0x8(%rbp)
jge    1133 <child3+0x33>
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <child3+0x12>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<child3>:
mov    $0xf,%eax
ret

LLVM IR (-O0):
define i32 @child3() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %10, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 6
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = load i32, i32* %2
%8 = load i32, i32* %1
%9 = add nsw i32 %8, %7
store i32 %9, i32* %1
br label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %3
13: ; preds = %3
%14 = load i32, i32* %1
ret i32 %14
}

LLVM IR (-O2):
define i32 @child3() {
ret i32 15
}
int kasan_populate_vmalloc(unsigned long start, unsigned long size) {
  return 0;
}


x86 assembly (clang, -O0):
<kasan_populate_vmalloc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kasan_populate_vmalloc>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @kasan_populate_vmalloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @kasan_populate_vmalloc(i64 %0, i64 %1) {
ret i32 0
}
void wrf_num_bytes_between_(a, b, n) char *a;
char *b;
int *n;
{
  *n = a - b;
  if (*n < 0)
    *n = -(*n);
}


x86 assembly (clang, -O0):
<wrf_num_bytes_between_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
cmpl   $0x0,(%rax)
jge    113e <wrf_num_bytes_between_+0x3e>
mov    -0x18(%rbp),%rax
xor    %ecx,%ecx
sub    (%rax),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrf_num_bytes_between_>:
sub    %esi,%edi
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
mov    %eax,(%rdx)
ret

LLVM IR (-O0):
define void @wrf_num_bytes_between_(i8* %0, i8* %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32* %2, i32** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = ptrtoint i8* %7 to i64
%10 = ptrtoint i8* %8 to i64
%11 = sub i64 %9, %10
%12 = trunc i64 %11 to i32
%13 = load i32*, i32** %6
store i32 %12, i32* %13
%14 = load i32*, i32** %6
%15 = load i32, i32* %14
%16 = icmp slt i32 %15, 0
br i1 %16, label %17, label %22
17: ; preds = %3
%18 = load i32*, i32** %6
%19 = load i32, i32* %18
%20 = sub nsw i32 0, %19
%21 = load i32*, i32** %6
store i32 %20, i32* %21
br label %22
22: ; preds = %17, %3
ret void
}

LLVM IR (-O2):
define void @wrf_num_bytes_between_(i8* %0, i8* %1, i32* nocapture writeonly %2) {
%4 = ptrtoint i8* %0 to i64
%5 = ptrtoint i8* %1 to i64
%6 = sub i64 %4, %5
%7 = trunc i64 %6 to i32
%8 = tail call i32 @llvm.abs.i32(i32 %7, i1 true)
store i32 %8, i32* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dtoi(float);
int /*<<< orphan*/ g2_set_QP(int /*<<< orphan*/, float, int /*<<< orphan*/);
void g2_set_qp_(float *dev, float *d, float *shape) {
  g2_set_QP(dtoi(*dev), *d, dtoi(*shape));
}


x86 assembly (clang, -O0):
<g2_set_qp_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
call   1040 <dtoi@plt>
mov    %eax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
movss  %xmm0,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
movss  (%rax),%xmm0
call   1040 <dtoi@plt>
mov    -0x20(%rbp),%edi
movss  -0x1c(%rbp),%xmm0
mov    %eax,%esi
call   1030 <g2_set_QP@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g2_set_qp_>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rdx,%r14
mov    %rsi,%rbx
movss  (%rdi),%xmm0
call   1040 <dtoi@plt>
mov    %eax,%ebp
movss  (%rbx),%xmm0
movss  %xmm0,0xc(%rsp)
movss  (%r14),%xmm0
call   1040 <dtoi@plt>
mov    %ebp,%edi
movss  0xc(%rsp),%xmm0
mov    %eax,%esi
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <g2_set_QP@plt>

LLVM IR (-O0):
define void @g2_set_qp_(float* %0, float* %1, float* %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float*
store float* %0, float** %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float*, float** %4
%8 = load float, float* %7
%9 = call i32 @dtoi(float %8)
%10 = load float*, float** %5
%11 = load float, float* %10
%12 = load float*, float** %6
%13 = load float, float* %12
%14 = call i32 @dtoi(float %13)
%15 = call i32 @g2_set_QP(i32 %9, float %11, i32 %14)
ret void
}

LLVM IR (-O2):
define void @g2_set_qp_(float* nocapture %0, float* nocapture %1, float* nocapture %2) {
%4 = load float, float* %0
%5 = tail call i32 @dtoi(float %4)
%6 = load float, float* %1
%7 = load float, float* %2
%8 = tail call i32 @dtoi(float %7)
%9 = tail call i32 @g2_set_QP(i32 %5, float %6, i32 %8)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ X509;
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int /*<<< orphan*/ X509_FLAG_COMPAT;
int X509_print_ex(int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                  int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ XN_FLAG_COMPAT;
int X509_print(BIO *bp, X509 *x) {
  return X509_print_ex(bp, x, XN_FLAG_COMPAT, X509_FLAG_COMPAT);
}


x86 assembly (clang, -O0):
<X509_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2eb1(%rip),%rax
mov    (%rax),%edx
mov    0x2eb0(%rip),%rax
mov    (%rax),%ecx
call   1030 <X509_print_ex@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_print>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edx
mov    0x2ec8(%rip),%rax
mov    (%rax),%ecx
jmp    1030 <X509_print_ex@plt>

LLVM IR (-O0):
@XN_FLAG_COMPAT = global i32 0
@X509_FLAG_COMPAT = global i32 0
define i32 @X509_print(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = load i32, i32* @XN_FLAG_COMPAT
%8 = load i32, i32* @X509_FLAG_COMPAT
%9 = call i32 @X509_print_ex(i32* %5, i32* %6, i32 %7, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
@XN_FLAG_COMPAT = global i32 0
@X509_FLAG_COMPAT = global i32 0
define i32 @X509_print(i32* %0, i32* %1) {
%3 = load i32, i32* @XN_FLAG_COMPAT
%4 = load i32, i32* @X509_FLAG_COMPAT
%5 = tail call i32 @X509_print_ex(i32* %0, i32* %1, i32 %3, i32 %4)
ret i32 %5
}
void changeArray(int array[]) {}


x86 assembly (clang, -O0):
<changeArray>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<changeArray>:
ret

LLVM IR (-O0):
define void @changeArray(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @changeArray(i32* nocapture %0) {
ret void
}