#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void SHAMD5ConfigSet(uint32_t ui32Base, uint32_t ui32Mode) {
  ASSERT(ui32Base == 0x44034000);
  ASSERT((ui32Mode == 0x00000018) || (ui32Mode == 0x0000001a) ||
         (ui32Mode == 0x0000001c) || (ui32Mode == 0x0000001e) ||
         (ui32Mode == 0x00000000) || (ui32Mode == 0x00000002) ||
         (ui32Mode == 0x00000004) || (ui32Mode == 0x00000006));
  (*((volatile uint32_t *)(ui32Base + 0x00000044))) = ui32Mode;
}


x86 assembly (clang, -O0):
<SHAMD5ConfigSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x44034000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    $0x1,%al
cmpl   $0x18,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     11a5 <SHAMD5ConfigSet+0x95>
mov    $0x1,%al
cmpl   $0x1a,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     11a5 <SHAMD5ConfigSet+0x95>
mov    $0x1,%al
cmpl   $0x1c,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     11a5 <SHAMD5ConfigSet+0x95>
mov    $0x1,%al
cmpl   $0x1e,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     11a5 <SHAMD5ConfigSet+0x95>
mov    $0x1,%al
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     11a5 <SHAMD5ConfigSet+0x95>
mov    $0x1,%al
cmpl   $0x2,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     11a5 <SHAMD5ConfigSet+0x95>
mov    $0x1,%al
cmpl   $0x4,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     11a5 <SHAMD5ConfigSet+0x95>
cmpl   $0x6,-0x8(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x44,%eax
cltq
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAMD5ConfigSet>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
cmp    $0x44034000,%ebp
sete   %dil
call   1030 <ASSERT@plt>
mov    %ebx,%eax
ror    %eax
cmp    $0x10,%eax
jae    1140 <SHAMD5ConfigSet+0x30>
mov    $0x1,%edi
mov    $0xf007,%ecx
bt     %eax,%ecx
jb     1149 <SHAMD5ConfigSet+0x39>
xor    %edi,%edi
cmp    $0x6,%ebx
sete   %dil
call   1030 <ASSERT@plt>
movslq %ebp,%rax
mov    %ebx,0x44(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @SHAMD5ConfigSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1141063680
%7 = zext i1 %6 to i32
%8 = call i32 @ASSERT(i32 %7)
%9 = load i32, i32* %4
%10 = icmp eq i32 %9, 24
br i1 %10, label %32, label %11
11: ; preds = %2
%12 = load i32, i32* %4
%13 = icmp eq i32 %12, 26
br i1 %13, label %32, label %14
14: ; preds = %11
%15 = load i32, i32* %4
%16 = icmp eq i32 %15, 28
br i1 %16, label %32, label %17
17: ; preds = %14
%18 = load i32, i32* %4
%19 = icmp eq i32 %18, 30
br i1 %19, label %32, label %20
20: ; preds = %17
%21 = load i32, i32* %4
%22 = icmp eq i32 %21, 0
br i1 %22, label %32, label %23
23: ; preds = %20
%24 = load i32, i32* %4
%25 = icmp eq i32 %24, 2
br i1 %25, label %32, label %26
26: ; preds = %23
%27 = load i32, i32* %4
%28 = icmp eq i32 %27, 4
br i1 %28, label %32, label %29
29: ; preds = %26
%30 = load i32, i32* %4
%31 = icmp eq i32 %30, 6
br label %32
32: ; preds = %29, %26, %23, %20, %17, %14, %11, %2
%33 = phi i1 [ true, %26 ], [ true, %23 ], [ true, %20 ], [ true, %17 ], [ true, %14 ], [ true, %11 ], [ true, %2 ], [ %31, %29 ]
%34 = zext i1 %33 to i32
%35 = call i32 @ASSERT(i32 %34)
%36 = load i32, i32* %4
%37 = load i32, i32* %3
%38 = add nsw i32 %37, 68
%39 = sext i32 %38 to i64
%40 = inttoptr i64 %39 to i32*
store volatile i32 %36, i32* %40
ret void
}

LLVM IR (-O2):
define void @SHAMD5ConfigSet(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 1141063680
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = tail call i32 @llvm.fshl.i32(i32 %1, i32 %1, i32 31)
%7 = icmp ult i32 %6, 16
br i1 %7, label %11, label %8
8: ; preds = %11, %2
%9 = icmp eq i32 %1, 6
%10 = zext i1 %9 to i32
br label %16
11: ; preds = %2
%12 = trunc i32 %6 to i16
%13 = lshr i16 -4089, %12
%14 = and i16 %13, 1
%15 = icmp eq i16 %14, 0
br i1 %15, label %8, label %16
16: ; preds = %11, %8
%17 = phi i32 [ %10, %8 ], [ 1, %11 ]
%18 = tail call i32 @ASSERT(i32 %17)
%19 = add nsw i32 %0, 68
%20 = sext i32 %19 to i64
%21 = inttoptr i64 %20 to i32*
store volatile i32 %1, i32* %21
ret void
}