xunge/DecIR huggingface dataset:
void free_el_vector(v, nl, nh) long nh, nl;
struct el **v;
{
  free((char *)(v + nl - 1));
}


x86 assembly (clang, -O0):
<free_el_vector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
shl    $0x3,%rax
add    %rax,%rdi
add    $0xfffffffffffffff8,%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_el_vector>:
lea    (%rdi,%rsi,8),%rdi
add    $0xfffffffffffffff8,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.el = type opaque
define void @free_el_vector(%struct.el** %0, i64 %1, i64 %2) {
%4 = alloca %struct.el**
%5 = alloca i64
%6 = alloca i64
store %struct.el** %0, %struct.el*** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load %struct.el**, %struct.el*** %4
%8 = load i64, i64* %5
%9 = getelementptr inbounds %struct.el*, %struct.el** %7, i64 %8
%10 = getelementptr inbounds %struct.el*, %struct.el** %9, i64 -1
%11 = bitcast %struct.el** %10 to i8*
ret void
}

LLVM IR (-O2):
%struct.el = type opaque
define void @free_el_vector(%struct.el** nocapture %0, i64 %1, i64 %2) {
%4 = getelementptr inbounds %struct.el*, %struct.el** %0, i64 %1
%5 = getelementptr inbounds %struct.el*, %struct.el** %4, i64 -1
%6 = bitcast %struct.el** %5 to i8*
tail call void @free(i8* %6)
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int y;
};
typedef TYPE_1__ XKeyEvent;

/* Variables and functions */
void set_XKeyEvent_y(void *_p, int _v) { ((XKeyEvent *)_p)->y = (int)_v; }


x86 assembly (clang, -O0):
<set_XKeyEvent_y>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XKeyEvent_y>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XKeyEvent_y(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XKeyEvent_y(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
void set_icon(char *filename) {}


x86 assembly (clang, -O0):
<set_icon>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_icon>:
ret

LLVM IR (-O0):
define void @set_icon(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @set_icon(i8* nocapture %0) {
ret void
}
int needswap(void) {
  union {
    short s;
    char c[2];
  } u;
  u.s = 1;
  return ((int)(u.c[0]));
}


x86 assembly (clang, -O0):
<needswap>:
push   %rbp
mov    %rsp,%rbp
movw   $0x1,-0x8(%rbp)
movsbl -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<needswap>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%union.anon = type { i16 }
define i32 @needswap() {
%1 = alloca %union.anon
%2 = bitcast %union.anon* %1 to i16*
store i16 1, i16* %2
%3 = bitcast %union.anon* %1 to [2 x i8]*
%4 = getelementptr inbounds [2 x i8], [2 x i8]* %3, i64 0, i64 0
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @needswap() {
ret i32 1
}
void _Block_release(void) {}


x86 assembly (clang, -O0):
<_Block_release>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Block_release>:
ret

LLVM IR (-O0):
define void @_Block_release() {
ret void
}

LLVM IR (-O2):
define void @_Block_release() {
ret void
}
void foo(void) {
#pragma acc data
  ;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo() {
ret void
}

LLVM IR (-O2):
define void @foo() {
ret void
}
/* Variables and functions */
void *_memcpy_forward(void *, void const *, size_t);
void *memcpy(void *restrict dest, const void *restrict src, size_t count) {
  return _memcpy_forward((void *)dest, (const void *)src, count);
}


x86 assembly (clang, -O0):
<memcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <_memcpy_forward@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcpy>:
jmp    1030 <_memcpy_forward@plt>

LLVM IR (-O0):
define i8* @memcpy(i8* noalias %0, i8* noalias %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i8* @_memcpy_forward(i8* %7, i8* %8, i64 %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @memcpy(i8* noalias %0, i8* noalias %1, i64 %2) {
%4 = tail call i8* @_memcpy_forward(i8* %0, i8* %1, i64 %2)
ret i8* %4
}
/* Type definitions */
struct user_regs_struct {
  int dummy;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ PTRACE_SETREGS;
int ptrace(int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/ *,
           struct user_regs_struct *);
int ptrace_setregs(pid_t pid, struct user_regs_struct *regs) {
  return ptrace(PTRACE_SETREGS, pid, NULL, regs);
}


x86 assembly (clang, -O0):
<ptrace_setregs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rcx
xor    %eax,%eax
mov    %eax,%edx
call   1030 <ptrace@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptrace_setregs>:
mov    %rsi,%rcx
mov    %edi,%esi
mov    0x2ecc(%rip),%rax
mov    (%rax),%edi
xor    %edx,%edx
jmp    1030 <ptrace@plt>

LLVM IR (-O0):
%struct.user_regs_struct = type { i32 }
@PTRACE_SETREGS = global i32 0
define i32 @ptrace_setregs(i32 %0, %struct.user_regs_struct* %1) {
%3 = alloca i32
%4 = alloca %struct.user_regs_struct*
store i32 %0, i32* %3
store %struct.user_regs_struct* %1, %struct.user_regs_struct** %4
%5 = load i32, i32* @PTRACE_SETREGS
%6 = load i32, i32* %3
%7 = load %struct.user_regs_struct*, %struct.user_regs_struct** %4
%8 = call i32 @ptrace(i32 %5, i32 %6, i32* null, %struct.user_regs_struct* %7)
ret i32 %8
}

LLVM IR (-O2):
%struct.user_regs_struct = type { i32 }
@PTRACE_SETREGS = global i32 0
define i32 @ptrace_setregs(i32 %0, %struct.user_regs_struct* %1) {
%3 = load i32, i32* @PTRACE_SETREGS
%4 = tail call i32 @ptrace(i32 %3, i32 %0, i32* null, %struct.user_regs_struct* %1)
ret i32 %4
}
int test_imm_F8uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0xF8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F8uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0xf8,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F8uint64_highword_mem>:
testb  $0xf8,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F8uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 248
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_F8uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 1065151889408
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int c074(void) { return 0; }


x86 assembly (clang, -O0):
<c074>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c074>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @c074() {
ret i32 0
}

LLVM IR (-O2):
define i32 @c074() {
ret i32 0
}
int efi_rtc_open(struct inode *inode, struct file *file) {
  { return (0); }
}


x86 assembly (clang, -O0):
<efi_rtc_open>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<efi_rtc_open>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.inode = type opaque
%struct.file = type opaque
define i32 @efi_rtc_open(%struct.inode* %0, %struct.file* %1) {
%3 = alloca %struct.inode*
%4 = alloca %struct.file*
store %struct.inode* %0, %struct.inode** %3
store %struct.file* %1, %struct.file** %4
ret i32 0
}

LLVM IR (-O2):
%struct.inode = type opaque
%struct.file = type opaque
define i32 @efi_rtc_open(%struct.inode* nocapture readnone %0, %struct.file* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __softboundmpx_abort();
__attribute__((__weak__, __always___)) void
__softboundmpx_spatial_store_dereference_check(void *base, void *bound,
                                               void *ptr, size_t size_of_type) {
  if ((ptr < base) || ((void *)((char *)ptr + size_of_type) > bound)) {
    __softboundmpx_abort();
  }
}


x86 assembly (clang, -O0):
<__softboundmpx_spatial_store_dereference_check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x8(%rbp),%rax
jb     1148 <__softboundmpx_spatial_store_dereference_check+0x38>
mov    -0x18(%rbp),%rax
add    -0x20(%rbp),%rax
cmp    -0x10(%rbp),%rax
jbe    114f <__softboundmpx_spatial_store_dereference_check+0x3f>
mov    $0x0,%al
call   1030 <__softboundmpx_abort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__softboundmpx_spatial_store_dereference_check>:
cmp    %rdi,%rdx
jb     111e <__softboundmpx_spatial_store_dereference_check+0xe>
add    %rcx,%rdx
cmp    %rsi,%rdx
ja     111e <__softboundmpx_spatial_store_dereference_check+0xe>
ret
xor    %eax,%eax
jmp    1030 <__softboundmpx_abort@plt>

LLVM IR (-O0):
define weak void @__softboundmpx_spatial_store_dereference_check(i8* %0, i8* %1, i8* %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i64
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%9 = load i8*, i8** %7
%10 = load i8*, i8** %5
%11 = icmp ult i8* %9, %10
br i1 %11, label %18, label %12
12: ; preds = %4
%13 = load i8*, i8** %7
%14 = load i64, i64* %8
%15 = getelementptr inbounds i8, i8* %13, i64 %14
%16 = load i8*, i8** %6
%17 = icmp ugt i8* %15, %16
br i1 %17, label %18, label %20
18: ; preds = %12, %4
%19 = call i32 (...) @__softboundmpx_abort()
br label %20
20: ; preds = %18, %12
ret void
}

LLVM IR (-O2):
define weak void @__softboundmpx_spatial_store_dereference_check(i8* %0, i8* %1, i8* %2, i64 %3) {
%5 = icmp ult i8* %2, %0
%6 = getelementptr inbounds i8, i8* %2, i64 %3
%7 = icmp ugt i8* %6, %1
%8 = select i1 %5, i1 true, i1 %7
br i1 %8, label %9, label %11
9: ; preds = %4
%10 = tail call i32 (...) @__softboundmpx_abort()
br label %11
11: ; preds = %4, %9
ret void
}
extern int sfvfs_fsnode_open(struct sfvfs_fs *sfs, struct sfvfs_fsnode *node) {
  return 0;
}


x86 assembly (clang, -O0):
<sfvfs_fsnode_open>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sfvfs_fsnode_open>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.sfvfs_fs = type opaque
%struct.sfvfs_fsnode = type opaque
define i32 @sfvfs_fsnode_open(%struct.sfvfs_fs* %0, %struct.sfvfs_fsnode* %1) {
%3 = alloca %struct.sfvfs_fs*
%4 = alloca %struct.sfvfs_fsnode*
store %struct.sfvfs_fs* %0, %struct.sfvfs_fs** %3
store %struct.sfvfs_fsnode* %1, %struct.sfvfs_fsnode** %4
ret i32 0
}

LLVM IR (-O2):
%struct.sfvfs_fs = type opaque
%struct.sfvfs_fsnode = type opaque
define i32 @sfvfs_fsnode_open(%struct.sfvfs_fs* nocapture readnone %0, %struct.sfvfs_fsnode* nocapture readnone %1) {
ret i32 0
}
void X509v3_delete_ext(void) {}


x86 assembly (clang, -O0):
<X509v3_delete_ext>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509v3_delete_ext>:
ret

LLVM IR (-O0):
define void @X509v3_delete_ext() {
ret void
}

LLVM IR (-O2):
define void @X509v3_delete_ext() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_floats();
int main(void) {
  test_floats();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_floats@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_floats@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_floats()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_floats()
ret i32 0
}
char *hash_plugin_summary(void) {
  return ("mscash2 \tDomain cached credentials v2 plugin");
}


x86 assembly (clang, -O0):
<hash_plugin_summary>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_plugin_summary>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [45 x i8] c"mscash2 \09Domain cached credentials v2 plugin\00"
define i8* @hash_plugin_summary() {
ret i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [45 x i8] c"mscash2 \09Domain cached credentials v2 plugin\00"
define i8* @hash_plugin_summary() {
ret i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void print_usage(void) {
  fprintf(stderr,
          "Usage: generic_buffer [options]...\n"
          "Capture, convert and output data from IIO device buffer\n"
          "  -c <n>     Do n conversions\n"
          "  -e         Disable wait for event (new data)\n"
          "  -g         Use trigger-less mode\n"
          "  -l <n>     Set buffer length to n samples\n"
          "  -n <name>  Set device name (mandatory)\n"
          "  -t <name>  Set trigger name\n"
          "  -w <n>     Set delay between reads in us (event-less mode)\n");
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [380 x i8] c"Usage: generic_buffer [options]...\0ACapture, convert and output data from IIO device buffer\0A -c <n> Do n conversions\0A -e Disable wait for event (new data)\0A -g Use trigger-less mode\0A -l <n> Set buffer length to n samples\0A -n <name> Set device name (mandatory)\0A -t <name> Set trigger name\0A -w <n> Set delay between reads in us (event-less mode)\0A\00"
define void @print_usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([380 x i8], [380 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [380 x i8] c"Usage: generic_buffer [options]...\0ACapture, convert and output data from IIO device buffer\0A -c <n> Do n conversions\0A -e Disable wait for event (new data)\0A -g Use trigger-less mode\0A -l <n> Set buffer length to n samples\0A -n <name> Set device name (mandatory)\0A -t <name> Set trigger name\0A -w <n> Set delay between reads in us (event-less mode)\0A\00"
define void @print_usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([380 x i8], [380 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ getpid();
scalar_t__ pidof(char *);
int status(char *exec) {
  int rc = 0;
  rc = pidof(exec) == getpid() ? 1 : 0;
  return rc;
}


x86 assembly (clang, -O0):
<status>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <pidof@plt>
mov    %rax,-0x18(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    -0x18(%rbp),%rdx
mov    %rax,%rsi
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %rsi,%rdx
cmove  %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<status>:
push   %rbx
call   1040 <pidof@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1030 <getpid@plt>
xor    %ecx,%ecx
cmp    %rax,%rbx
sete   %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @status(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%4 = load i8*, i8** %2
%5 = call i64 @pidof(i8* %4)
%6 = call i64 (...) @getpid()
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 1, i32 0
store i32 %9, i32* %3
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @status(i8* %0) {
%2 = tail call i64 @pidof(i8* %0)
%3 = tail call i64 (...) @getpid()
%4 = icmp eq i64 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ BaseGun_ShotMultiplierUpdate();
int /*<<< orphan*/ Input_Handle();
void PlayerPreThink(void) {
  Input_Handle();
  BaseGun_ShotMultiplierUpdate();
}


x86 assembly (clang, -O0):
<PlayerPreThink>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Input_Handle@plt>
mov    $0x0,%al
call   1040 <BaseGun_ShotMultiplierUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PlayerPreThink>:
push   %rax
xor    %eax,%eax
call   1030 <Input_Handle@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <BaseGun_ShotMultiplierUpdate@plt>

LLVM IR (-O0):
define void @PlayerPreThink() {
%1 = call i32 (...) @Input_Handle()
%2 = call i32 (...) @BaseGun_ShotMultiplierUpdate()
ret void
}

LLVM IR (-O2):
define void @PlayerPreThink() {
%1 = tail call i32 (...) @Input_Handle()
%2 = tail call i32 (...) @BaseGun_ShotMultiplierUpdate()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ log_connection_msg;

/* Variables and functions */
int /*<<< orphan*/ log_event(char *);
int /*<<< orphan*/ snprintf(char *, int, char *, char const *);
void http_server_log_connect(const char *ipaddr) {
  char log_connection_msg[128];
  snprintf(log_connection_msg, sizeof(log_connection_msg) - 1,
           "[HTTP] Incoming request from: %s", ipaddr);
  log_event(log_connection_msg);
}


x86 assembly (clang, -O0):
<http_server_log_connect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x90,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x90(%rbp),%rdi
mov    -0x8(%rbp),%rcx
mov    $0x7f,%esi
lea    0xeba(%rip),%rdx
call   1030 <snprintf@plt>
lea    -0x90(%rbp),%rdi
call   1040 <log_event@plt>
add    $0x90,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<http_server_log_connect>:
push   %rbx
sub    $0x80,%rsp
mov    %rdi,%rcx
lea    0xece(%rip),%rdx
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x7f,%esi
call   1030 <snprintf@plt>
mov    %rbx,%rdi
call   1040 <log_event@plt>
add    $0x80,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [33 x i8] c"[HTTP] Incoming request from: %s\00"
define void @http_server_log_connect(i8* %0) {
%2 = alloca i8*
%3 = alloca [128 x i8]
store i8* %0, i8** %2
%4 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 0
%5 = load i8*, i8** %2
%6 = call i32 @snprintf(i8* %4, i32 127, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 0
%8 = call i32 @log_event(i8* %7)
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"[HTTP] Incoming request from: %s\00"
define void @http_server_log_connect(i8* %0) {
%2 = alloca [128 x i8]
%3 = getelementptr inbounds [128 x i8], [128 x i8]* %2, i64 0, i64 0
%4 = call i32 @snprintf(i8* %3, i32 127, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8* %0)
%5 = call i32 @log_event(i8* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pr_inf_skip(char *, char const *);
int stress_loop_supported(const char *name) {
  pr_inf_skip("%s: stressor will be skipped, loop is not available\n", name);
  return -1;
}


x86 assembly (clang, -O0):
<stress_loop_supported>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <pr_inf_skip@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stress_loop_supported>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
call   1030 <pr_inf_skip@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [53 x i8] c"%s: stressor will be skipped, loop is not available\0A\00"
define i32 @stress_loop_supported(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @pr_inf_skip(i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 -1
}

LLVM IR (-O2):
@.str = [53 x i8] c"%s: stressor will be skipped, loop is not available\0A\00"
define i32 @stress_loop_supported(i8* %0) {
%2 = tail call i32 @pr_inf_skip(i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 -1
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ SYS_lseek;
int /*<<< orphan*/ syscall_3(int /*<<< orphan*/, long, long, int);
int fseek(FILE *fp, long offset, int whence) {
  syscall_3(SYS_lseek, (long int)fp, offset, whence);
  return 0;
}


x86 assembly (clang, -O0):
<fseek>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
call   1030 <syscall_3@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fseek>:
push   %rax
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <syscall_3@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@SYS_lseek = global i32 0
define i32 @fseek(i32* %0, i64 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i64
%6 = alloca i32
store i32* %0, i32** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i32, i32* @SYS_lseek
%8 = load i32*, i32** %4
%9 = ptrtoint i32* %8 to i64
%10 = load i64, i64* %5
%11 = load i32, i32* %6
%12 = call i32 @syscall_3(i32 %7, i64 %9, i64 %10, i32 %11)
ret i32 0
}

LLVM IR (-O2):
@SYS_lseek = global i32 0
define i32 @fseek(i32* %0, i64 %1, i32 %2) {
%4 = load i32, i32* @SYS_lseek
%5 = ptrtoint i32* %0 to i64
%6 = tail call i32 @syscall_3(i32 %4, i64 %5, i64 %1, i32 %2)
ret i32 0
}
int a_cas(volatile int *p, int t, int s) {
  return __sync_val_compare_and_swap(p, t, s);
}


x86 assembly (clang, -O0):
<a_cas>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%eax
mov    -0x10(%rbp),%edx
lock cmpxchg %edx,(%rcx)
sete   %cl
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_cas>:
mov    %esi,%eax
lock cmpxchg %edx,(%rdi)
ret

LLVM IR (-O0):
define i32 @a_cas(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = cmpxchg i32* %7, i32 %8, i32 %9 seq_cst seq_cst
%11 = extractvalue { i32, i1 } %10, 0
ret i32 %11
}

LLVM IR (-O2):
define i32 @a_cas(i32* nocapture %0, i32 %1, i32 %2) {
%4 = cmpxchg i32* %0, i32 %1, i32 %2 seq_cst seq_cst
%5 = extractvalue { i32, i1 } %4, 0
ret i32 %5
}
/* Variables and functions */
signed char ClampChar(int i) {
  if (i < -128) {
    return -128;
  }
  if (i > 127) {
    return 127;
  }
  return i;
}


x86 assembly (clang, -O0):
<ClampChar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0xffffff80,-0x8(%rbp)
jge    111a <ClampChar+0x1a>
movb   $0x80,-0x1(%rbp)
jmp    1133 <ClampChar+0x33>
cmpl   $0x7f,-0x8(%rbp)
jle    112d <ClampChar+0x2d>
movb   $0x7f,-0x1(%rbp)
jmp    1133 <ClampChar+0x33>
mov    -0x8(%rbp),%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ClampChar>:
cmp    $0x7f,%edi
mov    $0x7f,%ecx
cmovl  %edi,%ecx
cmp    $0xffffff81,%ecx
mov    $0x80,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @ClampChar(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, -128
br i1 %5, label %6, label %7
6: ; preds = %1
store i8 -128, i8* %2
br label %14
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp sgt i32 %8, 127
br i1 %9, label %10, label %11
10: ; preds = %7
store i8 127, i8* %2
br label %14
11: ; preds = %7
%12 = load i32, i32* %3
%13 = trunc i32 %12 to i8
store i8 %13, i8* %2
br label %14
14: ; preds = %11, %10, %6
%15 = load i8, i8* %2
ret i8 %15
}

LLVM IR (-O2):
define signext i8 @ClampChar(i32 %0) {
%2 = icmp slt i32 %0, 127
%3 = select i1 %2, i32 %0, i32 127
%4 = icmp sgt i32 %3, -128
%5 = select i1 %4, i32 %3, i32 -128
%6 = trunc i32 %5 to i8
ret i8 %6
}
/* Variables and functions */
void *memdup(void const *, size_t);
scalar_t__ size_multiply_overflow(size_t, size_t);
__attribute__((__alloc_size__(2, 3))) void *
memdup_multiply(const void *p, size_t size, size_t need) {
  if (size_multiply_overflow(size, need))
    return NULL;
  return memdup(p, size * need);
}


x86 assembly (clang, -O0):
<memdup_multiply>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <size_multiply_overflow@plt>
cmp    $0x0,%rax
je     1158 <memdup_multiply+0x38>
movq   $0x0,-0x8(%rbp)
jmp    116e <memdup_multiply+0x4e>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
imul   -0x20(%rbp),%rsi
call   1040 <memdup@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memdup_multiply>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%rbx
mov    %rsi,%r15
mov    %rdi,%r14
mov    %rsi,%rdi
mov    %rdx,%rsi
call   1030 <size_multiply_overflow@plt>
test   %rax,%rax
je     1146 <memdup_multiply+0x26>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret
imul   %r15,%rbx
mov    %r14,%rdi
mov    %rbx,%rsi
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <memdup@plt>

LLVM IR (-O0):
define i8* @memdup_multiply(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%8 = load i64, i64* %6
%9 = load i64, i64* %7
%10 = call i64 @size_multiply_overflow(i64 %8, i64 %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %3
store i8* null, i8** %4
br label %19
13: ; preds = %3
%14 = load i8*, i8** %5
%15 = load i64, i64* %6
%16 = load i64, i64* %7
%17 = mul i64 %15, %16
%18 = call i8* @memdup(i8* %14, i64 %17)
store i8* %18, i8** %4
br label %19
19: ; preds = %13, %12
%20 = load i8*, i8** %4
ret i8* %20
}

LLVM IR (-O2):
define i8* @memdup_multiply(i8* %0, i64 %1, i64 %2) {
%4 = tail call i64 @size_multiply_overflow(i64 %1, i64 %2)
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = mul i64 %2, %1
%8 = tail call i8* @memdup(i8* %0, i64 %7)
br label %9
9: ; preds = %3, %6
%10 = phi i8* [ %8, %6 ], [ null, %3 ]
ret i8* %10
}
/* Variables and functions */
void *MAP_FAILED;
int /*<<< orphan*/ MAP_SHARED;
int PROT_READ;
int PROT_WRITE;
void *mmap(int /*<<< orphan*/ *, size_t, int, int /*<<< orphan*/, int,
           int /*<<< orphan*/);
void *pmem_map_msync(int fd, size_t len) {
  void *base;
  if ((base = mmap(NULL, len, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0)) ==
      MAP_FAILED)
    return NULL;
  return base;
}


x86 assembly (clang, -O0):
<pmem_map_msync>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
mov    0x2ece(%rip),%rax
mov    (%rax),%edx
mov    0x2e9d(%rip),%rax
or     (%rax),%edx
mov    0x2eac(%rip),%rax
mov    (%rax),%ecx
mov    -0xc(%rbp),%r8d
xor    %eax,%eax
mov    %eax,%edi
xor    %r9d,%r9d
call   1030 <mmap@plt>
mov    %rax,-0x20(%rbp)
mov    0x2e6f(%rip),%rcx
cmp    (%rcx),%rax
jne    116f <pmem_map_msync+0x5f>
movq   $0x0,-0x8(%rbp)
jmp    1177 <pmem_map_msync+0x67>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmem_map_msync>:
push   %rbx
mov    %edi,%r8d
mov    0x2edd(%rip),%rax
mov    0x2eae(%rip),%rcx
mov    (%rcx),%edx
or     (%rax),%edx
mov    0x2ebb(%rip),%rax
mov    (%rax),%ecx
xor    %ebx,%ebx
xor    %edi,%edi
xor    %r9d,%r9d
call   1030 <mmap@plt>
mov    0x2e86(%rip),%rcx
cmp    (%rcx),%rax
cmove  %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@PROT_READ = global i32 0
@PROT_WRITE = global i32 0
@MAP_SHARED = global i32 0
@MAP_FAILED = global i8* null
define i8* @pmem_map_msync(i32 %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i64
%6 = alloca i8*
store i32 %0, i32* %4
store i64 %1, i64* %5
%7 = load i64, i64* %5
%8 = load i32, i32* @PROT_READ
%9 = load i32, i32* @PROT_WRITE
%10 = or i32 %8, %9
%11 = load i32, i32* @MAP_SHARED
%12 = load i32, i32* %4
%13 = call i8* @mmap(i32* null, i64 %7, i32 %10, i32 %11, i32 %12, i32 0)
store i8* %13, i8** %6
%14 = load i8*, i8** @MAP_FAILED
%15 = icmp eq i8* %13, %14
br i1 %15, label %16, label %17
16: ; preds = %2
store i8* null, i8** %3
br label %19
17: ; preds = %2
%18 = load i8*, i8** %6
store i8* %18, i8** %3
br label %19
19: ; preds = %17, %16
%20 = load i8*, i8** %3
ret i8* %20
}

LLVM IR (-O2):
@PROT_READ = global i32 0
@PROT_WRITE = global i32 0
@MAP_SHARED = global i32 0
@MAP_FAILED = global i8* null
define i8* @pmem_map_msync(i32 %0, i64 %1) {
%3 = load i32, i32* @PROT_READ
%4 = load i32, i32* @PROT_WRITE
%5 = or i32 %4, %3
%6 = load i32, i32* @MAP_SHARED
%7 = tail call i8* @mmap(i32* null, i64 %1, i32 %5, i32 %6, i32 %0, i32 0)
%8 = load i8*, i8** @MAP_FAILED
%9 = icmp eq i8* %7, %8
%10 = select i1 %9, i8* null, i8* %7
ret i8* %10
}
/* Type definitions */
struct CONSOLE {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cons_putstr0(struct CONSOLE *, char *);
int inthandler0d(int *esp) {
  struct CONSOLE *cons = (struct CONSOLE *)*((int *)0x0fec);
  cons_putstr0(cons, "\nINT 0D :\n General Protected Exception.\n");
  return 1;
}


x86 assembly (clang, -O0):
<inthandler0d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xfec,%eax
movslq (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xecd(%rip),%rsi
call   1030 <cons_putstr0@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inthandler0d>:
push   %rax
movslq 0xfec,%rdi
lea    0xee0(%rip),%rsi
call   1030 <cons_putstr0@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.CONSOLE = type { i32 }
@.str = [41 x i8] c"\0AINT 0D :\0A General Protected Exception.\0A\00"
define i32 @inthandler0d(i32* %0) {
%2 = alloca i32*
%3 = alloca %struct.CONSOLE*
store i32* %0, i32** %2
%4 = load i32, i32* inttoptr (i64 4076 to i32*)
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to %struct.CONSOLE*
store %struct.CONSOLE* %6, %struct.CONSOLE** %3
%7 = load %struct.CONSOLE*, %struct.CONSOLE** %3
%8 = call i32 @cons_putstr0(%struct.CONSOLE* %7, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
%struct.CONSOLE = type { i32 }
@.str = [41 x i8] c"\0AINT 0D :\0A General Protected Exception.\0A\00"
define i32 @inthandler0d(i32* nocapture readnone %0) {
%2 = load i32, i32* inttoptr (i64 4076 to i32*)
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to %struct.CONSOLE*
%5 = tail call i32 @cons_putstr0(%struct.CONSOLE* %4, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ IGRAPH_FINALLY_FREE();
void igraph_error_handler_ignore(const char *reason, const char *file, int line,
                                 int igraph_errno) {
  IGRAPH_FINALLY_FREE();
}


x86 assembly (clang, -O0):
<igraph_error_handler_ignore>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    $0x0,%al
call   1030 <IGRAPH_FINALLY_FREE@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<igraph_error_handler_ignore>:
xor    %eax,%eax
jmp    1030 <IGRAPH_FINALLY_FREE@plt>

LLVM IR (-O0):
define void @igraph_error_handler_ignore(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = call i32 (...) @IGRAPH_FINALLY_FREE()
ret void
}

LLVM IR (-O2):
define void @igraph_error_handler_ignore(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2, i32 %3) {
%5 = tail call i32 (...) @IGRAPH_FINALLY_FREE()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ rcu_sched_qs(int);
void rcu_virt_note_context_switch(int cpu) { rcu_sched_qs(cpu); }


x86 assembly (clang, -O0):
<rcu_virt_note_context_switch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <rcu_sched_qs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcu_virt_note_context_switch>:
jmp    1030 <rcu_sched_qs@plt>

LLVM IR (-O0):
define void @rcu_virt_note_context_switch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @rcu_sched_qs(i32 %3)
ret void
}

LLVM IR (-O2):
define void @rcu_virt_note_context_switch(i32 %0) {
%2 = tail call i32 @rcu_sched_qs(i32 %0)
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ fd_nrf8001_set_tx_power_error(int);
int /*<<< orphan*/ fd_nrf8001_set_tx_power_success();
void fd_nrf8001_dispatch_set_tx_power_response(uint8_t status,
                                               uint8_t *response_data
                                               __attribute__((unused)),
                                               uint32_t response_data_length
                                               __attribute__((unused))) {
  if (status != 0x00) {
    fd_nrf8001_set_tx_power_error(status);
    return;
  }
  fd_nrf8001_set_tx_power_success();
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1149 <fd_nrf8001_dispatch_set_tx_power_response+0x29>
mov    -0x4(%rbp),%edi
call   1040 <fd_nrf8001_set_tx_power_error@plt>
jmp    1150 <fd_nrf8001_dispatch_set_tx_power_response+0x30>
mov    $0x0,%al
call   1030 <fd_nrf8001_set_tx_power_success@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
test   %edi,%edi
je     1129 <fd_nrf8001_dispatch_set_tx_power_response+0x9>
jmp    1040 <fd_nrf8001_set_tx_power_error@plt>
xor    %eax,%eax
jmp    1030 <fd_nrf8001_set_tx_power_success@plt>

LLVM IR (-O0):
define void @fd_nrf8001_dispatch_set_tx_power_response(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = load i32, i32* %4
%11 = call i32 @fd_nrf8001_set_tx_power_error(i32 %10)
br label %14
12: ; preds = %3
%13 = call i32 (...) @fd_nrf8001_set_tx_power_success()
br label %14
14: ; preds = %12, %9
ret void
}

LLVM IR (-O2):
define void @fd_nrf8001_dispatch_set_tx_power_response(i32 %0, i32* nocapture readnone %1, i32 %2) {
%4 = icmp eq i32 %0, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @fd_nrf8001_set_tx_power_error(i32 %0)
br label %9
7: ; preds = %3
%8 = tail call i32 (...) @fd_nrf8001_set_tx_power_success()
br label %9
9: ; preds = %7, %5
ret void
}
void *xchg64(void **dst, void *newval) {
  void *ret = newval;
  asm volatile("xchgq %0, %1" : "+r"(ret), "+m"(*dst) : : "memory", "cc");
  return ret;
}


x86 assembly (clang, -O0):
<xchg64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x8(%rbp),%rcx
xchg   %rax,(%rcx)
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xchg64>:
mov    %rsi,%rax
xchg   %rax,(%rdi)
ret

LLVM IR (-O0):
define i8* @xchg64(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
%5 = alloca i8*
store i8** %0, i8*** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
store i8* %6, i8** %5
%7 = load i8*, i8** %5
%8 = load i8**, i8*** %3
%9 = call i8* asm sideeffect "xchgq $0, $1", "=r,=*m,0,*m,~{memory},~{cc},~{dirflag},~{fpsr},~{flags}"(i8** elementtype(i8*) %8, i8* %7, i8** elementtype(i8*) %8)
store i8* %9, i8** %5
%10 = load i8*, i8** %5
ret i8* %10
}

LLVM IR (-O2):
define i8* @xchg64(i8** %0, i8* %1) {
%3 = tail call i8* asm sideeffect "xchgq $0, $1", "=r,=*m,0,*m,~{memory},~{cc},~{dirflag},~{fpsr},~{flags}"(i8** elementtype(i8*) %0, i8* %1, i8** elementtype(i8*) %0)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ function_which_gives_up(int *);
scalar_t__ malloc(int);
void coverage6(int *x) {
  for (int i = 0; i < 3; ++i) {
    function_which_gives_up(x);
  }
  char *m = (char *)malloc(12);
}


x86 assembly (clang, -O0):
<coverage6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x3,-0xc(%rbp)
jge    1154 <coverage6+0x34>
mov    -0x8(%rbp),%rdi
call   1030 <function_which_gives_up@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1133 <coverage6+0x13>
mov    $0xc,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<coverage6>:
push   %rbx
mov    %rdi,%rbx
call   1030 <function_which_gives_up@plt>
mov    %rbx,%rdi
call   1030 <function_which_gives_up@plt>
mov    %rbx,%rdi
call   1030 <function_which_gives_up@plt>
mov    $0xc,%edi
pop    %rbx
jmp    1040 <malloc@plt>

LLVM IR (-O0):
define void @coverage6(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i8*
store i32* %0, i32** %2
store i32 0, i32* %3
br label %5
5: ; preds = %11, %1
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 3
br i1 %7, label %8, label %14
8: ; preds = %5
%9 = load i32*, i32** %2
%10 = call i32 @function_which_gives_up(i32* %9)
br label %11
11: ; preds = %8
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %5
14: ; preds = %5
%15 = call i64 @malloc(i32 12)
%16 = inttoptr i64 %15 to i8*
store i8* %16, i8** %4
ret void
}

LLVM IR (-O2):
define void @coverage6(i32* %0) {
%2 = tail call i32 @function_which_gives_up(i32* %0)
%3 = tail call i32 @function_which_gives_up(i32* %0)
%4 = tail call i32 @function_which_gives_up(i32* %0)
%5 = tail call i64 @malloc(i32 12)
ret void
}
long double fmodl(long double x, long double y) {
  long double res = 0.0L;
  asm("1:\tfprem\n\t"
      "fstsw   %%ax\n\t"
      "sahf\n\t"
      "jp      1b\n\t"
      "fstp    %%st(1)"
      : "=t"(res)
      : "0"(x), "u"(y)
      : "ax", "st(1)");
  return res;
}


x86 assembly (clang, -O0):
<fmodl>:
push   %rbp
mov    %rsp,%rbp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldz
fstpt  -0x30(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
fxch   %st(1)
fprem
fstsw  %ax
sahf
jp     111d <fmodl+0x1d>
fstp   %st(1)
fstpt  -0x30(%rbp)
fldt   -0x30(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmodl>:
fldt   0x8(%rsp)
fldt   0x18(%rsp)
fxch   %st(1)
fprem
fstsw  %ax
sahf
jp     110a <fmodl+0xa>
fstp   %st(1)
ret

LLVM IR (-O0):
define x86_fp80 @fmodl(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
%5 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
store x86_fp80 0xK00000000000000000000, x86_fp80* %5
%6 = load x86_fp80, x86_fp80* %3
%7 = load x86_fp80, x86_fp80* %4
%8 = call x86_fp80 asm "1:\09fprem\0A\09fstsw %ax\0A\09sahf\0A\09jp 1b\0A\09fstp %st(1)", "={st},0,{st(1)},~{ax},~{st(1)},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %6, x86_fp80 %7)
store x86_fp80 %8, x86_fp80* %5
%9 = load x86_fp80, x86_fp80* %5
ret x86_fp80 %9
}

LLVM IR (-O2):
define x86_fp80 @fmodl(x86_fp80 %0, x86_fp80 %1) {
%3 = tail call x86_fp80 asm "1:\09fprem\0A\09fstsw %ax\0A\09sahf\0A\09jp 1b\0A\09fstp %st(1)", "={st},0,{st(1)},~{ax},~{st(1)},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %0, x86_fp80 %1)
ret x86_fp80 %3
}
void stosb(void *addr, int data, int cnt) {
  asm volatile("rep stosb"
               : "=D"(addr), "=c"(cnt)
               : "0"(addr), "1"(cnt), "a"(data)
               : "memory", "cc");
}


x86 assembly (clang, -O0):
<stosb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%eax
rep stos %al,%es:(%rdi)
mov    %rdi,-0x8(%rbp)
mov    %ecx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<stosb>:
mov    %edx,%ecx
mov    %esi,%eax
rep stos %al,%es:(%rdi)
ret

LLVM IR (-O0):
define void @stosb(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = call { i8*, i32 } asm sideeffect "rep stosb", "={di},={cx},0,1,{ax},~{memory},~{cc},~{dirflag},~{fpsr},~{flags}"(i8* %7, i32 %8, i32 %9)
%11 = extractvalue { i8*, i32 } %10, 0
%12 = extractvalue { i8*, i32 } %10, 1
store i8* %11, i8** %4
store i32 %12, i32* %6
ret void
}

LLVM IR (-O2):
define void @stosb(i8* %0, i32 %1, i32 %2) {
%4 = tail call { i8*, i32 } asm sideeffect "rep stosb", "={di},={cx},0,1,{ax},~{memory},~{cc},~{dirflag},~{fpsr},~{flags}"(i8* %0, i32 %2, i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_spinlock_t;

/* Variables and functions */
int /*<<< orphan*/ pthread_spin_destroy(int /*<<< orphan*/ *);
int /*<<< orphan*/ pthread_spin_init(int /*<<< orphan*/ *, int /*<<< orphan*/);
int /*<<< orphan*/ pthread_spin_lock(int /*<<< orphan*/ *);
int /*<<< orphan*/ pthread_spin_unlock(int /*<<< orphan*/ *);
int main(int argc, char **buffer) {
  pthread_spinlock_t lock;
  pthread_spin_init(&lock, 0);
  pthread_spin_lock(&lock);
  pthread_spin_unlock(&lock);
  pthread_spin_destroy(&lock);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x14(%rbp),%rdi
xor    %esi,%esi
call   1040 <pthread_spin_init@plt>
lea    -0x14(%rbp),%rdi
call   1030 <pthread_spin_lock@plt>
lea    -0x14(%rbp),%rdi
call   1050 <pthread_spin_unlock@plt>
lea    -0x14(%rbp),%rdi
call   1060 <pthread_spin_destroy@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
xor    %esi,%esi
call   1040 <pthread_spin_init@plt>
mov    %rbx,%rdi
call   1030 <pthread_spin_lock@plt>
mov    %rbx,%rdi
call   1050 <pthread_spin_unlock@plt>
mov    %rbx,%rdi
call   1060 <pthread_spin_destroy@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 @pthread_spin_init(i32* %6, i32 0)
%8 = call i32 @pthread_spin_lock(i32* %6)
%9 = call i32 @pthread_spin_unlock(i32* %6)
%10 = call i32 @pthread_spin_destroy(i32* %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @pthread_spin_init(i32* %3, i32 0)
%6 = call i32 @pthread_spin_lock(i32* %3)
%7 = call i32 @pthread_spin_unlock(i32* %3)
%8 = call i32 @pthread_spin_destroy(i32* %3)
ret i32 0
}
/* Variables and functions */
float NAN;
int main(void) {
  float x = NAN;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    0x2ee6(%rip),%rax
movss  (%rax),%xmm0
movss  %xmm0,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@NAN = global float 0.000000e+00
define i32 @main() {
%1 = alloca i32
%2 = alloca float
store i32 0, i32* %1
%3 = load float, float* @NAN
store float %3, float* %2
ret i32 0
}

LLVM IR (-O2):
@NAN = global float 0.000000e+00
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ init_genrand(unsigned long);
void genrand_seed(unsigned long s) { init_genrand(s); }


x86 assembly (clang, -O0):
<genrand_seed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <init_genrand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genrand_seed>:
jmp    1030 <init_genrand@plt>

LLVM IR (-O0):
define void @genrand_seed(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @init_genrand(i64 %3)
ret void
}

LLVM IR (-O2):
define void @genrand_seed(i64 %0) {
%2 = tail call i32 @init_genrand(i64 %0)
ret void
}
int sub(int lhs, int rhs) { return lhs - rhs; }


x86 assembly (clang, -O0):
<sub>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub>:
mov    %edi,%eax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @sub(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @sub(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
ret i32 %3
}
int main() { return 4 + 2; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x6,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 6
}

LLVM IR (-O2):
define i32 @main() {
ret i32 6
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void *realloc(void *, size_t);
void *reallocf(void *ptr, size_t len) {
  void *ptr2 = realloc(ptr, len);
  if (!ptr2) {
    free(ptr);
    return NULL;
  }
  return ptr2;
}


x86 assembly (clang, -O0):
<reallocf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1162 <reallocf+0x42>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
movq   $0x0,-0x8(%rbp)
jmp    116a <reallocf+0x4a>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reallocf>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <realloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113c <reallocf+0x1c>
mov    %r14,%rdi
call   1030 <free@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @reallocf(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = call i8* @realloc(i8* %7, i64 %8)
store i8* %9, i8** %6
%10 = load i8*, i8** %6
%11 = icmp ne i8* %10, null
br i1 %11, label %15, label %12
12: ; preds = %2
%13 = load i8*, i8** %4
%14 = call i32 @free(i8* %13)
store i8* null, i8** %3
br label %17
15: ; preds = %2
%16 = load i8*, i8** %6
store i8* %16, i8** %3
br label %17
17: ; preds = %15, %12
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
define noalias i8* @reallocf(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @free(i8* %0)
br label %7
7: ; preds = %2, %5
ret i8* %3
}