#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ IntEnable(unsigned long);
int /*<<< orphan*/ IntRegister(unsigned long, void (*)());
void UARTIntRegister(unsigned long ulBase, void (*pfnHandler)(void)) {
  unsigned long ulInt;
  ;
  ulInt = ((ulBase == 0x4000C000)   ? 21
           : (ulBase == 0x4000D000) ? 22
           : (ulBase == 0x4000E000) ? 49
           : (ulBase == 0x4000F000) ? 75
                                    : 76);
  IntRegister(ulInt, pfnHandler);
  IntEnable(ulInt);
}


x86 assembly (clang, -O0):
<UARTIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x4000c000,-0x8(%rbp)
40
jne    114b <UARTIntRegister+0x2b>
mov    $0x15,%eax
mov    %eax,-0x1c(%rbp)
jmp    11a8 <UARTIntRegister+0x88>
cmpq   $0x4000d000,-0x8(%rbp)
40
jne    1166 <UARTIntRegister+0x46>
mov    $0x16,%eax
mov    %eax,-0x20(%rbp)
jmp    11a2 <UARTIntRegister+0x82>
cmpq   $0x4000e000,-0x8(%rbp)
40
jne    1181 <UARTIntRegister+0x61>
mov    $0x31,%eax
mov    %eax,-0x24(%rbp)
jmp    119c <UARTIntRegister+0x7c>
mov    -0x8(%rbp),%rdx
mov    $0x4c,%eax
mov    $0x4b,%ecx
cmp    $0x4000f000,%rdx
cmove  %ecx,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <IntRegister@plt>
mov    -0x18(%rbp),%rdi
call   1030 <IntEnable@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTIntRegister>:
push   %rbx
cmp    $0x4000c000,%rdi
je     1143 <UARTIntRegister+0x23>
cmp    $0x4000d000,%rdi
je     114a <UARTIntRegister+0x2a>
cmp    $0x4000e000,%rdi
jne    1151 <UARTIntRegister+0x31>
mov    $0x31,%ebx
jmp    1165 <UARTIntRegister+0x45>
mov    $0x15,%ebx
jmp    1165 <UARTIntRegister+0x45>
mov    $0x16,%ebx
jmp    1165 <UARTIntRegister+0x45>
xor    %eax,%eax
cmp    $0x4000f000,%rdi
sete   %al
mov    $0x4c,%ebx
sub    %rax,%rbx
mov    %rbx,%rdi
call   1040 <IntRegister@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @UARTIntRegister(i64 %0, void ()* %1) {
%3 = alloca i64
%4 = alloca void ()*
%5 = alloca i64
store i64 %0, i64* %3
store void ()* %1, void ()** %4
%6 = load i64, i64* %3
%7 = icmp eq i64 %6, 1073790976
br i1 %7, label %8, label %9
8: ; preds = %2
br label %26
9: ; preds = %2
%10 = load i64, i64* %3
%11 = icmp eq i64 %10, 1073795072
br i1 %11, label %12, label %13
12: ; preds = %9
br label %24
13: ; preds = %9
%14 = load i64, i64* %3
%15 = icmp eq i64 %14, 1073799168
br i1 %15, label %16, label %17
16: ; preds = %13
br label %22
17: ; preds = %13
%18 = load i64, i64* %3
%19 = icmp eq i64 %18, 1073803264
%20 = zext i1 %19 to i64
%21 = select i1 %19, i32 75, i32 76
br label %22
22: ; preds = %17, %16
%23 = phi i32 [ 49, %16 ], [ %21, %17 ]
br label %24
24: ; preds = %22, %12
%25 = phi i32 [ 22, %12 ], [ %23, %22 ]
br label %26
26: ; preds = %24, %8
%27 = phi i32 [ 21, %8 ], [ %25, %24 ]
%28 = sext i32 %27 to i64
store i64 %28, i64* %5
%29 = load i64, i64* %5
%30 = load void ()*, void ()** %4
%31 = bitcast void ()* %30 to void (...)*
%32 = call i32 @IntRegister(i64 %29, void (...)* %31)
%33 = load i64, i64* %5
%34 = call i32 @IntEnable(i64 %33)
ret void
}

LLVM IR (-O2):
define void @UARTIntRegister(i64 %0, void ()* %1) {
switch i64 %0, label %3 [
i64 1073790976, label %8
i64 1073795072, label %6
i64 1073799168, label %7
]
3: ; preds = %2
%4 = icmp eq i64 %0, 1073803264
%5 = select i1 %4, i64 75, i64 76
br label %8
6: ; preds = %2
br label %8
7: ; preds = %2
br label %8
8: ; preds = %2, %7, %6, %3
%9 = phi i64 [ 21, %2 ], [ %5, %3 ], [ 22, %6 ], [ 49, %7 ]
%10 = bitcast void ()* %1 to void (...)*
%11 = tail call i32 @IntRegister(i64 %9, void (...)* %10)
%12 = tail call i32 @IntEnable(i64 %9)
ret void
}