xunge/DecIR huggingface dataset:
/* Type definitions */
struct darray {
  int dummy;
};

/* Variables and functions */
int darray_is_empty_locked(struct darray *);
int /*<<< orphan*/ darray_lock(struct darray *);
int /*<<< orphan*/ darray_unlock(struct darray *);
bool darray_is_empty(struct darray *a) {
  bool ret;
  darray_lock(a);
  ret = darray_is_empty_locked(a);
  darray_unlock(a);
  return ret;
}


x86 assembly (clang, -O0):
<darray_is_empty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <darray_lock@plt>
mov    -0x8(%rbp),%rdi
call   1040 <darray_is_empty_locked@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <darray_unlock@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<darray_is_empty>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <darray_lock@plt>
mov    %rbx,%rdi
call   1040 <darray_is_empty_locked@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1050 <darray_unlock@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.darray = type { i32 }
define i32 @darray_is_empty(%struct.darray* %0) {
%2 = alloca %struct.darray*
%3 = alloca i32
store %struct.darray* %0, %struct.darray** %2
%4 = load %struct.darray*, %struct.darray** %2
%5 = call i32 @darray_lock(%struct.darray* %4)
%6 = load %struct.darray*, %struct.darray** %2
%7 = call i32 @darray_is_empty_locked(%struct.darray* %6)
store i32 %7, i32* %3
%8 = load %struct.darray*, %struct.darray** %2
%9 = call i32 @darray_unlock(%struct.darray* %8)
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
%struct.darray = type { i32 }
define i32 @darray_is_empty(%struct.darray* %0) {
%2 = tail call i32 @darray_lock(%struct.darray* %0)
%3 = tail call i32 @darray_is_empty_locked(%struct.darray* %0)
%4 = tail call i32 @darray_unlock(%struct.darray* %0)
ret i32 %3
}
/* Type definitions */
struct feed_prompt {
  int dummy;
};
struct feed_line {
  int dummy;
};

/* Variables and functions */
struct feed_line *feed_prompt_get(struct feed_prompt *const, unsigned int);
struct feed_line *feed_prompt_get1(struct feed_prompt *const p_prompt) {
  return feed_prompt_get(p_prompt, 0u);
}


x86 assembly (clang, -O0):
<feed_prompt_get1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <feed_prompt_get@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<feed_prompt_get1>:
xor    %esi,%esi
jmp    1030 <feed_prompt_get@plt>

LLVM IR (-O0):
%struct.feed_line = type { i32 }
%struct.feed_prompt = type { i32 }
define %struct.feed_line* @feed_prompt_get1(%struct.feed_prompt* %0) {
%2 = alloca %struct.feed_prompt*
store %struct.feed_prompt* %0, %struct.feed_prompt** %2
%3 = load %struct.feed_prompt*, %struct.feed_prompt** %2
%4 = call %struct.feed_line* @feed_prompt_get(%struct.feed_prompt* %3, i32 0)
ret %struct.feed_line* %4
}

LLVM IR (-O2):
%struct.feed_line = type { i32 }
%struct.feed_prompt = type { i32 }
define %struct.feed_line* @feed_prompt_get1(%struct.feed_prompt* %0) {
%2 = tail call %struct.feed_line* @feed_prompt_get(%struct.feed_prompt* %0, i32 0)
ret %struct.feed_line* %2
}
/* Variables and functions */
int /*<<< orphan*/ sp_reset();
fw_reset() { sp_reset(); }


x86 assembly (clang, -O0):
<fw_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <sp_reset@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fw_reset>:
xor    %eax,%eax
jmp    1030 <sp_reset@plt>

LLVM IR (-O0):
define i32 @fw_reset() {
%1 = alloca i32
%2 = call i32 (...) @sp_reset()
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @fw_reset() {
%1 = tail call i32 (...) @sp_reset()
ret i32 undef
}
void emvpn_core_socket_error(struct emvpn_socket *v) {}


x86 assembly (clang, -O0):
<emvpn_core_socket_error>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<emvpn_core_socket_error>:
ret

LLVM IR (-O0):
%struct.emvpn_socket = type opaque
define void @emvpn_core_socket_error(%struct.emvpn_socket* %0) {
%2 = alloca %struct.emvpn_socket*
store %struct.emvpn_socket* %0, %struct.emvpn_socket** %2
ret void
}

LLVM IR (-O2):
%struct.emvpn_socket = type opaque
define void @emvpn_core_socket_error(%struct.emvpn_socket* nocapture %0) {
ret void
}
int d_bgt_rr2(double a1, double a2) { return !(__builtin_isgreater(a1, a2)); }


x86 assembly (clang, -O0):
<d_bgt_rr2>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
seta   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d_bgt_rr2>:
xor    %eax,%eax
ucomisd %xmm1,%xmm0
setbe  %al
ret

LLVM IR (-O0):
define i32 @d_bgt_rr2(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp ogt double %5, %6
%8 = xor i1 %7, true
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @d_bgt_rr2(double %0, double %1) {
%3 = fcmp ule double %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
int fn4(int a, int b) {
  int tem1 = b & a;
  int tem2 = b ^ a;
  return tem1 | tem2;
}


x86 assembly (clang, -O0):
<fn4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
or     -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn4>:
mov    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @fn4(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = load i32, i32* %3
%9 = and i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %4
%11 = load i32, i32* %3
%12 = xor i32 %10, %11
store i32 %12, i32* %6
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = or i32 %13, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @fn4(i32 %0, i32 %1) {
%3 = or i32 %1, %0
ret i32 %3
}
/* Type definitions */
struct hlist_node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __hlist_del(struct hlist_node *);
__attribute__((always_)) void hlist_del(struct hlist_node *n) {
  __hlist_del(n);
}


x86 assembly (clang, -O0):
<hlist_del>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__hlist_del@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hlist_del>:
jmp    1030 <__hlist_del@plt>

LLVM IR (-O0):
%struct.hlist_node = type { i32 }
define void @hlist_del(%struct.hlist_node* %0) {
%2 = alloca %struct.hlist_node*
store %struct.hlist_node* %0, %struct.hlist_node** %2
%3 = load %struct.hlist_node*, %struct.hlist_node** %2
%4 = call i32 @__hlist_del(%struct.hlist_node* %3)
ret void
}

LLVM IR (-O2):
%struct.hlist_node = type { i32 }
define void @hlist_del(%struct.hlist_node* %0) {
%2 = tail call i32 @__hlist_del(%struct.hlist_node* %0)
ret void
}
void ui_new_chain(const int section_number) { (void)section_number; }


x86 assembly (clang, -O0):
<ui_new_chain>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ui_new_chain>:
ret

LLVM IR (-O0):
define void @ui_new_chain(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret void
}

LLVM IR (-O2):
define void @ui_new_chain(i32 %0) {
ret void
}
int test_imm_11int64_lowword_reg(long long val) {
  return ((val) & (0x11 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_11int64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x11,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_11int64_lowword_reg>:
test   $0x11,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_11int64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 17
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_11int64_lowword_reg(i64 %0) {
%2 = and i64 %0, 17
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int *fn_test2(void) {
  int arr[3];
  arr[0] = 10;
  arr[1] = 11;
  arr[2] = 12;
  return arr;
}


x86 assembly (clang, -O0):
<fn_test2>:
push   %rbp
mov    %rsp,%rbp
movl   $0xa,-0xc(%rbp)
movl   $0xb,-0x8(%rbp)
movl   $0xc,-0x4(%rbp)
lea    -0xc(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_test2>:
lea    -0xc(%rsp),%rax
ret

LLVM IR (-O0):
define i32* @fn_test2() {
%1 = alloca [3 x i32]
%2 = getelementptr inbounds [3 x i32], [3 x i32]* %1, i64 0, i64 0
store i32 10, i32* %2
%3 = getelementptr inbounds [3 x i32], [3 x i32]* %1, i64 0, i64 1
store i32 11, i32* %3
%4 = getelementptr inbounds [3 x i32], [3 x i32]* %1, i64 0, i64 2
store i32 12, i32* %4
%5 = getelementptr inbounds [3 x i32], [3 x i32]* %1, i64 0, i64 0
ret i32* %5
}

LLVM IR (-O2):
define noalias i32* @fn_test2() {
%1 = alloca [3 x i32]
%2 = bitcast [3 x i32]* %1 to i8*
%3 = getelementptr inbounds [3 x i32], [3 x i32]* %1, i64 0, i64 0
ret i32* %3
}
int silk_max_int(int a, int b) { return (((a) > (b)) ? (a) : (b)); }


x86 assembly (clang, -O0):
<silk_max_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <silk_max_int+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <silk_max_int+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<silk_max_int>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @silk_max_int(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @silk_max_int(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ is_prime(long);
long next_prime(long x) {
  while (!is_prime(x)) {
    x++;
  }
  return x;
}


x86 assembly (clang, -O0):
<next_prime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <is_prime@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    113a <next_prime+0x2a>
jmp    114b <next_prime+0x3b>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <next_prime+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_prime>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rbx,%rdi
call   1030 <is_prime@plt>
add    $0x1,%rbx
test   %eax,%eax
je     1120 <next_prime+0x10>
add    $0xffffffffffffffff,%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @next_prime(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
br label %3
3: ; preds = %8, %1
%4 = load i64, i64* %2
%5 = call i32 @is_prime(i64 %4)
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
br i1 %7, label %8, label %11
8: ; preds = %3
%9 = load i64, i64* %2
%10 = add nsw i64 %9, 1
store i64 %10, i64* %2
br label %3
11: ; preds = %3
%12 = load i64, i64* %2
ret i64 %12
}

LLVM IR (-O2):
define i64 @next_prime(i64 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %0, %1 ], [ %6, %2 ]
%4 = tail call i32 @is_prime(i64 %3)
%5 = icmp eq i32 %4, 0
%6 = add nsw i64 %3, 1
br i1 %5, label %2, label %7
7: ; preds = %2
ret i64 %3
}
/* Type definitions */
struct genlist_link {
  int dummy;
};
struct fileinfo_list_link {
  int dummy;
};

/* Variables and functions */
scalar_t__ genlist_link_prev(struct genlist_link const *);
struct fileinfo_list_link *
fileinfo_list_link_prev(const struct fileinfo_list_link *plink) {
  return ((struct fileinfo_list_link *)genlist_link_prev(
      (const struct genlist_link *)plink));
}


x86 assembly (clang, -O0):
<fileinfo_list_link_prev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <genlist_link_prev@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fileinfo_list_link_prev>:
jmp    1030 <genlist_link_prev@plt>

LLVM IR (-O0):
%struct.fileinfo_list_link = type { i32 }
%struct.genlist_link = type { i32 }
define %struct.fileinfo_list_link* @fileinfo_list_link_prev(%struct.fileinfo_list_link* %0) {
%2 = alloca %struct.fileinfo_list_link*
store %struct.fileinfo_list_link* %0, %struct.fileinfo_list_link** %2
%3 = load %struct.fileinfo_list_link*, %struct.fileinfo_list_link** %2
%4 = bitcast %struct.fileinfo_list_link* %3 to %struct.genlist_link*
%5 = call i64 @genlist_link_prev(%struct.genlist_link* %4)
%6 = inttoptr i64 %5 to %struct.fileinfo_list_link*
ret %struct.fileinfo_list_link* %6
}

LLVM IR (-O2):
%struct.fileinfo_list_link = type { i32 }
%struct.genlist_link = type { i32 }
define %struct.fileinfo_list_link* @fileinfo_list_link_prev(%struct.fileinfo_list_link* %0) {
%2 = bitcast %struct.fileinfo_list_link* %0 to %struct.genlist_link*
%3 = tail call i64 @genlist_link_prev(%struct.genlist_link* %2)
%4 = inttoptr i64 %3 to %struct.fileinfo_list_link*
ret %struct.fileinfo_list_link* %4
}
int flags_lib(void) { return 0; }


x86 assembly (clang, -O0):
<flags_lib>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flags_lib>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @flags_lib() {
ret i32 0
}

LLVM IR (-O2):
define i32 @flags_lib() {
ret i32 0
}
int snd_pcm_plug_slave_format(int format, const struct snd_mask *format_mask) {
  return format;
}


x86 assembly (clang, -O0):
<snd_pcm_plug_slave_format>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<snd_pcm_plug_slave_format>:
mov    %edi,%eax
ret

LLVM IR (-O0):
%struct.snd_mask = type opaque
define i32 @snd_pcm_plug_slave_format(i32 %0, %struct.snd_mask* %1) {
%3 = alloca i32
%4 = alloca %struct.snd_mask*
store i32 %0, i32* %3
store %struct.snd_mask* %1, %struct.snd_mask** %4
%5 = load i32, i32* %3
ret i32 %5
}

LLVM IR (-O2):
%struct.snd_mask = type opaque
define i32 @snd_pcm_plug_slave_format(i32 returned %0, %struct.snd_mask* nocapture readnone %1) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ lookNarray(char *, unsigned int);
void lookreal32array_(void *x, unsigned int *n) {
  lookNarray((char *)x, (*n * 32));
}


x86 assembly (clang, -O0):
<lookreal32array_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
shl    $0x5,%esi
call   1030 <lookNarray@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lookreal32array_>:
mov    (%rsi),%esi
shl    $0x5,%esi
jmp    1030 <lookNarray@plt>

LLVM IR (-O0):
define void @lookreal32array_(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i32*, i32** %4
%7 = load i32, i32* %6
%8 = mul i32 %7, 32
%9 = call i32 @lookNarray(i8* %5, i32 %8)
ret void
}

LLVM IR (-O2):
define void @lookreal32array_(i8* %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = shl i32 %3, 5
%5 = tail call i32 @lookNarray(i8* %0, i32 %4)
ret void
}
int main() {
  int src = 1;
  int dst;
  asm("mov %1, %0\n\t"
      "add $1, %0"
      : "=r"(dst)
      : "r"(src));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
%4 = load i32, i32* %2
%5 = call i32 asm "mov $1, $0\0A\09add $$1, $0", "=r,r,~{dirflag},~{fpsr},~{flags}"(i32 %4)
store i32 %5, i32* %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 asm "mov $1, $0\0A\09add $$1, $0", "=r,r,~{dirflag},~{fpsr},~{flags}"(i32 1)
ret i32 0
}
void PKCS7_ISSUER_AND_SERIAL_new(void) {}


x86 assembly (clang, -O0):
<PKCS7_ISSUER_AND_SERIAL_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PKCS7_ISSUER_AND_SERIAL_new>:
ret

LLVM IR (-O0):
define void @PKCS7_ISSUER_AND_SERIAL_new() {
ret void
}

LLVM IR (-O2):
define void @PKCS7_ISSUER_AND_SERIAL_new() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ GLuint;
typedef int /*<<< orphan*/ GLsizei;

/* Variables and functions */
int /*<<< orphan*/ glGenLists(int /*<<< orphan*/);
GLuint GenLists(GLsizei range) { return glGenLists(range); }


x86 assembly (clang, -O0):
<GenLists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <glGenLists@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GenLists>:
jmp    1030 <glGenLists@plt>

LLVM IR (-O0):
define i32 @GenLists(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @glGenLists(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @GenLists(i32 %0) {
%2 = tail call i32 @glGenLists(i32 %0)
ret i32 %2
}
const char *get_name(void) { return "Gmu Log Bot v0.1"; }


x86 assembly (clang, -O0):
<get_name>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_name>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Gmu Log Bot v0.1\00"
define i8* @get_name() {
ret i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [17 x i8] c"Gmu Log Bot v0.1\00"
define i8* @get_name() {
ret i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct sStreamCodec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ StreamEncoder_PutU16(struct sStreamCodec *, unsigned short);
void StreamEncoder_PutS16(struct sStreamCodec *p, signed short s16) {
  StreamEncoder_PutU16(p, (unsigned short)s16);
}


x86 assembly (clang, -O0):
<StreamEncoder_PutS16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
movzwl -0xa(%rbp),%esi
call   1030 <StreamEncoder_PutU16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<StreamEncoder_PutS16>:
movzwl %si,%esi
jmp    1030 <StreamEncoder_PutU16@plt>

LLVM IR (-O0):
%struct.sStreamCodec = type { i32 }
define void @StreamEncoder_PutS16(%struct.sStreamCodec* %0, i16 signext %1) {
%3 = alloca %struct.sStreamCodec*
%4 = alloca i16
store %struct.sStreamCodec* %0, %struct.sStreamCodec** %3
store i16 %1, i16* %4
%5 = load %struct.sStreamCodec*, %struct.sStreamCodec** %3
%6 = load i16, i16* %4
%7 = call i32 @StreamEncoder_PutU16(%struct.sStreamCodec* %5, i16 zeroext %6)
ret void
}

LLVM IR (-O2):
%struct.sStreamCodec = type { i32 }
define void @StreamEncoder_PutS16(%struct.sStreamCodec* %0, i16 signext %1) {
%3 = tail call i32 @StreamEncoder_PutU16(%struct.sStreamCodec* %0, i16 zeroext %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage() {
  extern char *__progname;
  fprintf(stderr, "usage: %s\n", __progname);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
mov    0x2e9c(%rip),%rax
mov    (%rax),%rdx
lea    0xec2(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
mov    0x2e9f(%rip),%rax
mov    (%rax),%rdx
lea    0xec5(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [11 x i8] c"usage: %s\0A\00"
@__progname = external global i8*
define void @usage() {
%1 = load i32, i32* @stderr
%2 = load i8*, i8** @__progname
%3 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [11 x i8] c"usage: %s\0A\00"
@__progname = external global i8*
define void @usage() {
%1 = load i32, i32* @stderr
%2 = load i8*, i8** @__progname
%3 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void sig_int(int signo) { printf("SIGINT caught\n"); }


x86 assembly (clang, -O0):
<sig_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_int>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"SIGINT caught\0A\00"
define void @sig_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [14 x i8] c"SIGINT caught\00"
define void @sig_int(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ genrand_int32();
double genrand_real3() {
  return ((((double)genrand_int32()) + 0.5) * (1.0 / 4294967296.0));
}


x86 assembly (clang, -O0):
<genrand_real3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <genrand_int32@plt>
cvtsi2sd %rax,%xmm0
movsd  0xee0(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  0xecc(%rip),%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<genrand_real3>:
push   %rax
xor    %eax,%eax
call   1030 <genrand_int32@plt>
cvtsi2sd %rax,%xmm0
addsd  0xedb(%rip),%xmm0
mulsd  0xedb(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @genrand_real3() {
%1 = call i64 (...) @genrand_int32()
%2 = sitofp i64 %1 to double
%3 = fadd double %2, 5.000000e-01
%4 = fmul double %3, 0x3DF0000000000000
ret double %4
}

LLVM IR (-O2):
define double @genrand_real3() {
%1 = tail call i64 (...) @genrand_int32()
%2 = sitofp i64 %1 to double
%3 = fadd double %2, 5.000000e-01
%4 = fmul double %3, 0x3DF0000000000000
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
void *tf(void *arg) {
  while (1)
    sleep(100);
  return NULL;
}


x86 assembly (clang, -O0):
<tf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x64,%edi
call   1030 <sleep@plt>
jmp    111c <tf+0xc>

x86 assembly (clang, -O2):
<tf>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x64,%edi
call   1030 <sleep@plt>
jmp    1120 <tf+0x10>

LLVM IR (-O0):
define i8* @tf(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %1, %3
%4 = call i32 @sleep(i32 100)
br label %3
}

LLVM IR (-O2):
define noalias i8* @tf(i8* nocapture readnone %0) {
br label %2
2: ; preds = %1, %2
%3 = tail call i32 @sleep(i32 100)
br label %2
}
/* Variables and functions */
unsigned char *blake2b_buffer(unsigned char *, unsigned char const *, size_t,
                              unsigned char const *, size_t);
unsigned char *hash_buffer_blake2b_key(unsigned char *out,
                                       const unsigned char *in, size_t in_len,
                                       const unsigned char *key,
                                       size_t key_len) {
  return blake2b_buffer(out, in, in_len, key, key_len);
}


x86 assembly (clang, -O0):
<hash_buffer_blake2b_key>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
call   1030 <blake2b_buffer@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_buffer_blake2b_key>:
jmp    1030 <blake2b_buffer@plt>

LLVM IR (-O0):
define i8* @hash_buffer_blake2b_key(i8* %0, i8* %1, i64 %2, i8* %3, i64 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i8*
%10 = alloca i64
store i8* %0, i8** %6
store i8* %1, i8** %7
store i64 %2, i64* %8
store i8* %3, i8** %9
store i64 %4, i64* %10
%11 = load i8*, i8** %6
%12 = load i8*, i8** %7
%13 = load i64, i64* %8
%14 = load i8*, i8** %9
%15 = load i64, i64* %10
%16 = call i8* @blake2b_buffer(i8* %11, i8* %12, i64 %13, i8* %14, i64 %15)
ret i8* %16
}

LLVM IR (-O2):
define i8* @hash_buffer_blake2b_key(i8* %0, i8* %1, i64 %2, i8* %3, i64 %4) {
%6 = tail call i8* @blake2b_buffer(i8* %0, i8* %1, i64 %2, i8* %3, i64 %4)
ret i8* %6
}
double dlt(double x, double y) { return ((double)(x < y)); }


x86 assembly (clang, -O0):
<dlt>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
cvtsi2sd %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dlt>:
cmpltsd %xmm1,%xmm0
movsd  0xef3(%rip),%xmm1
andpd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @dlt(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp olt double %5, %6
%8 = zext i1 %7 to i32
%9 = sitofp i32 %8 to double
ret double %9
}

LLVM IR (-O2):
define double @dlt(double %0, double %1) {
%3 = fcmp olt double %0, %1
%4 = uitofp i1 %3 to double
ret double %4
}
void f3(long long i) {}


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
ret

LLVM IR (-O0):
define void @f3(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret void
}

LLVM IR (-O2):
define void @f3(i64 %0) {
ret void
}
int is_in_array(int value, int *array, int size) {
  int index;
  for (index = 0; index < size; index++) {
    if (array[index] == value)
      return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<is_in_array>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1154 <is_in_array+0x54>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x8(%rbp),%eax
jne    1141 <is_in_array+0x41>
movl   $0x1,-0x4(%rbp)
jmp    115b <is_in_array+0x5b>
jmp    1146 <is_in_array+0x46>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1115 <is_in_array+0x15>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_in_array>:
test   %edx,%edx
jle    111e <is_in_array+0x1e>
mov    %edx,%eax
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
cmp    %edi,(%rsi,%rcx,4)
je     1121 <is_in_array+0x21>
add    $0x1,%rcx
cmp    %rcx,%rax
jne    1110 <is_in_array+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_in_array(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %23, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %7
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %26
13: ; preds = %9
%14 = load i32*, i32** %6
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %5
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %22
21: ; preds = %13
store i32 1, i32* %4
br label %27
22: ; preds = %13
br label %23
23: ; preds = %22
%24 = load i32, i32* %8
%25 = add nsw i32 %24, 1
store i32 %25, i32* %8
br label %9
26: ; preds = %9
store i32 0, i32* %4
br label %27
27: ; preds = %26, %21
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @is_in_array(i32 %0, i32* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %15
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %9
7: ; preds = %9
%8 = icmp eq i64 %14, %6
br i1 %8, label %15, label %9
9: ; preds = %5, %7
%10 = phi i64 [ 0, %5 ], [ %14, %7 ]
%11 = getelementptr inbounds i32, i32* %1, i64 %10
%12 = load i32, i32* %11
%13 = icmp eq i32 %12, %0
%14 = add nuw nsw i64 %10, 1
br i1 %13, label %15, label %7
15: ; preds = %9, %7, %3
%16 = phi i32 [ 0, %3 ], [ 0, %7 ], [ 1, %9 ]
ret i32 %16
}
int del(int x, int y) { return x - y > 0 ? x - y : y - x; }


x86 assembly (clang, -O0):
<del>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
cmp    $0x0,%eax
jle    1127 <del+0x27>
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1130 <del+0x30>
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<del>:
sub    %esi,%edi
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @del(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = sub nsw i32 %10, %11
br label %17
13: ; preds = %2
%14 = load i32, i32* %4
%15 = load i32, i32* %3
%16 = sub nsw i32 %14, %15
br label %17
17: ; preds = %13, %9
%18 = phi i32 [ %12, %9 ], [ %16, %13 ]
ret i32 %18
}

LLVM IR (-O2):
define i32 @del(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
%4 = tail call i32 @llvm.abs.i32(i32 %3, i1 false)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ h(int *, int);
void g(int *a) {
  int b;
  b = *a + 1;
  while (b >= 0) {
    h(&b, *a);
    *a = b + 1;
  }
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jl     1152 <g+0x42>
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
lea    -0xc(%rbp),%rdi
call   1030 <h@plt>
mov    -0xc(%rbp),%ecx
add    $0x1,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
jmp    1128 <g+0x18>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
push   %r14
push   %rbx
push   %rax
mov    (%rdi),%esi
lea    0x1(%rsi),%eax
mov    %eax,0x4(%rsp)
cmp    $0xffffffff,%esi
jl     1145 <g+0x35>
mov    %rdi,%rbx
lea    0x4(%rsp),%r14
nopw   0x0(%rax,%rax,1)
mov    %r14,%rdi
call   1030 <h@plt>
mov    0x4(%rsp),%eax
lea    0x1(%rax),%esi
mov    %esi,(%rbx)
test   %eax,%eax
jns    1130 <g+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @g(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
%6 = add nsw i32 %5, 1
store i32 %6, i32* %3
br label %7
7: ; preds = %10, %1
%8 = load i32, i32* %3
%9 = icmp sge i32 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %7
%11 = load i32*, i32** %2
%12 = load i32, i32* %11
%13 = call i32 @h(i32* %3, i32 %12)
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
%16 = load i32*, i32** %2
store i32 %15, i32* %16
br label %7
17: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @g(i32* nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = load i32, i32* %0
%5 = add nsw i32 %4, 1
store i32 %5, i32* %2
%6 = icmp sgt i32 %4, -2
br i1 %6, label %7, label %13
7: ; preds = %1, %7
%8 = phi i32 [ %11, %7 ], [ %4, %1 ]
%9 = call i32 @h(i32* %2, i32 %8)
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
store i32 %11, i32* %0
%12 = icmp sgt i32 %10, -1
br i1 %12, label %7, label %13
13: ; preds = %7, %1
ret void
}
/* Type definitions */
typedef int cl_device_type;

/* Variables and functions */
#define CL_DEVICE_TYPE_ACCELERATOR 132
#define CL_DEVICE_TYPE_ALL 131
#define CL_DEVICE_TYPE_CPU 130
#define CL_DEVICE_TYPE_DEFAULT 129
#define CL_DEVICE_TYPE_GPU 128
bool valid_device_type(cl_device_type device_type) {
  switch (device_type) {
  case CL_DEVICE_TYPE_DEFAULT:
  case CL_DEVICE_TYPE_CPU:
  case CL_DEVICE_TYPE_GPU:
  case CL_DEVICE_TYPE_ACCELERATOR:
  case CL_DEVICE_TYPE_ALL:
    return true;
  default:
    return false;
  }
}


x86 assembly (clang, -O0):
<valid_device_type>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffff80,%eax
sub    $0x4,%eax
ja     1127 <valid_device_type+0x27>
jmp    111b <valid_device_type+0x1b>
movl   $0x1,-0x4(%rbp)
jmp    112e <valid_device_type+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<valid_device_type>:
add    $0xffffff80,%edi
xor    %eax,%eax
cmp    $0x5,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @valid_device_type(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 129, label %5
i32 130, label %5
i32 128, label %5
i32 132, label %5
i32 131, label %5
]
5: ; preds = %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @valid_device_type(i32 %0) {
%2 = add i32 %0, -128
%3 = icmp ult i32 %2, 5
%4 = zext i1 %3 to i32
ret i32 %4
}
double addvals(double *param) { return param[0] + param[1]; }


x86 assembly (clang, -O0):
<addvals>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x8(%rbp),%rax
addsd  0x8(%rax),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<addvals>:
movsd  (%rdi),%xmm0
addsd  0x8(%rdi),%xmm0
ret

LLVM IR (-O0):
define double @addvals(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = load double*, double** %2
%7 = getelementptr inbounds double, double* %6, i64 1
%8 = load double, double* %7
%9 = fadd double %5, %8
ret double %9
}

LLVM IR (-O2):
define double @addvals(double* nocapture %0) {
%2 = load double, double* %0
%3 = getelementptr inbounds double, double* %0, i64 1
%4 = load double, double* %3
%5 = fadd double %2, %4
ret double %5
}
/* Type definitions */
typedef int /*<<< orphan*/ cwd;

/* Variables and functions */
int /*<<< orphan*/ getcwd(char *, int);
int /*<<< orphan*/ printf(char *, char *);
void printPrompt() {
  char cwd[1024];
  getcwd(cwd, sizeof(cwd));
  printf("[\033[1;33m%s\033[0m]shell\033[1;36m$\033[0m ", cwd);
}


x86 assembly (clang, -O0):
<printPrompt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x400,%rsp
lea    -0x400(%rbp),%rdi
mov    $0x400,%esi
call   1040 <getcwd@plt>
lea    -0x400(%rbp),%rsi
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
add    $0x400,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printPrompt>:
push   %rbx
sub    $0x400,%rsp
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x400,%esi
call   1040 <getcwd@plt>
lea    0xec1(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
add    $0x400,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [34 x i8] c"[\1B[1;33m%s\1B[0m]shell\1B[1;36m$\1B[0m \00"
define void @printPrompt() {
%1 = alloca [1024 x i8]
%2 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 0
%3 = call i32 @getcwd(i8* %2, i32 1024)
%4 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 0
%5 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@.str = [34 x i8] c"[\1B[1;33m%s\1B[0m]shell\1B[1;36m$\1B[0m \00"
define void @printPrompt() {
%1 = alloca [1024 x i8]
%2 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 0
%3 = call i32 @getcwd(i8* %2, i32 1024)
%4 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* %2)
ret void
}
int digval(char c) {
  if (c < 58) {
    return c - 48;
  } else {
    return c - 87;
  }
}


x86 assembly (clang, -O0):
<digval>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x3a,%eax
jge    1126 <digval+0x26>
movsbl -0x5(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    1130 <digval+0x30>
movsbl -0x5(%rbp),%eax
sub    $0x57,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<digval>:
lea    -0x57(%rdi),%ecx
lea    -0x30(%rdi),%eax
cmp    $0x3a,%dil
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @digval(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp slt i32 %5, 58
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = sub nsw i32 %9, 48
store i32 %10, i32* %2
br label %15
11: ; preds = %1
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %13, 87
store i32 %14, i32* %2
br label %15
15: ; preds = %11, %7
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @digval(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = icmp slt i8 %0, 58
%4 = select i1 %3, i32 -48, i32 -87
%5 = add nsw i32 %4, %2
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ glClearColor(float, float, float, float);
int /*<<< orphan*/ glLoadIdentity();
int /*<<< orphan*/ gluOrtho2D(int /*<<< orphan*/, int, int, int /*<<< orphan*/);
void initGL() {
  glClearColor(0.0f, 0.0f, 0.0f, 1.0f);
  glLoadIdentity();
  gluOrtho2D(0, 300, 300, 0);
}


x86 assembly (clang, -O0):
<initGL>:
push   %rbp
mov    %rsp,%rbp
xorps  %xmm2,%xmm2
movss  0xec1(%rip),%xmm3
movaps %xmm2,%xmm0
movaps %xmm2,%xmm1
call   1030 <glClearColor@plt>
mov    $0x0,%al
call   1040 <glLoadIdentity@plt>
xor    %ecx,%ecx
mov    $0x12c,%edx
mov    %ecx,%edi
mov    %edx,%esi
call   1050 <gluOrtho2D@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<initGL>:
push   %rax
movss  0xec7(%rip),%xmm3
xorps  %xmm0,%xmm0
xorps  %xmm1,%xmm1
xorps  %xmm2,%xmm2
call   1030 <glClearColor@plt>
xor    %eax,%eax
call   1040 <glLoadIdentity@plt>
xor    %edi,%edi
mov    $0x12c,%esi
mov    $0x12c,%edx
xor    %ecx,%ecx
pop    %rax
jmp    1050 <gluOrtho2D@plt>

LLVM IR (-O0):
define void @initGL() {
%1 = call i32 @glClearColor(float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00)
%2 = call i32 (...) @glLoadIdentity()
%3 = call i32 @gluOrtho2D(i32 0, i32 300, i32 300, i32 0)
ret void
}

LLVM IR (-O2):
define void @initGL() {
%1 = tail call i32 @glClearColor(float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00)
%2 = tail call i32 (...) @glLoadIdentity()
%3 = tail call i32 @gluOrtho2D(i32 0, i32 300, i32 300, i32 0)
ret void
}
int syncint_encode(int value) {
  int out, mask = 0x7F;
  while (mask ^ 0x7FFFFFFF) {
    out = value & ~mask;
    out <<= 1;
    out |= value & mask;
    mask = ((mask + 1) << 8) - 1;
    value = out;
  }
  return out;
}


x86 assembly (clang, -O0):
<syncint_encode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x7f,-0xc(%rbp)
mov    -0xc(%rbp),%eax
xor    $0x7fffffff,%eax
cmp    $0x0,%eax
je     115c <syncint_encode+0x5c>
mov    -0x4(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    -0xc(%rbp),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
shl    $0x8,%eax
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    110e <syncint_encode+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<syncint_encode>:
mov    %edi,%eax
and    $0x3f80,%eax
mov    %edi,%ecx
and    $0x7f,%ecx
lea    (%rcx,%rax,2),%eax
mov    %edi,%ecx
and    $0x1fc000,%ecx
lea    (%rax,%rcx,4),%eax
and    $0xffe00000,%edi
lea    (%rax,%rdi,8),%eax
ret

LLVM IR (-O0):
define i32 @syncint_encode(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 127, i32* %4
br label %5
5: ; preds = %9, %1
%6 = load i32, i32* %4
%7 = xor i32 %6, 2147483647
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %26
9: ; preds = %5
%10 = load i32, i32* %2
%11 = load i32, i32* %4
%12 = xor i32 %11, -1
%13 = and i32 %10, %12
store i32 %13, i32* %3
%14 = load i32, i32* %3
%15 = shl i32 %14, 1
store i32 %15, i32* %3
%16 = load i32, i32* %2
%17 = load i32, i32* %4
%18 = and i32 %16, %17
%19 = load i32, i32* %3
%20 = or i32 %19, %18
store i32 %20, i32* %3
%21 = load i32, i32* %4
%22 = add nsw i32 %21, 1
%23 = shl i32 %22, 8
%24 = sub nsw i32 %23, 1
store i32 %24, i32* %4
%25 = load i32, i32* %3
store i32 %25, i32* %2
br label %5
26: ; preds = %5
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @syncint_encode(i32 %0) {
%2 = shl i32 %0, 1
%3 = and i32 %2, 32512
%4 = and i32 %0, 127
%5 = or i32 %3, %4
%6 = shl i32 %0, 2
%7 = and i32 %6, 8323072
%8 = or i32 %7, %5
%9 = shl i32 %0, 3
%10 = and i32 %9, -16777216
%11 = or i32 %10, %8
ret i32 %11
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int system_input(char **);
uint8_t char_input(void) {
  char *ptr;
  uint8_t res;
  res = system_input(&ptr);
  if (res == 13 && *ptr)
    res = *ptr;
  return res;
}


x86 assembly (clang, -O0):
<char_input>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
call   1030 <system_input@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0xd,-0xc(%rbp)
jne    1148 <char_input+0x38>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1148 <char_input+0x38>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<char_input>:
push   %rax
mov    %rsp,%rdi
call   1030 <system_input@plt>
cmp    $0xd,%eax
jne    1132 <char_input+0x22>
mov    (%rsp),%rax
movzbl (%rax),%eax
test   %al,%al
mov    $0xd,%ecx
cmovne %eax,%ecx
movsbl %cl,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @char_input() {
%1 = alloca i8*
%2 = alloca i32
%3 = call i32 @system_input(i8** %1)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 13
br i1 %5, label %6, label %15
6: ; preds = %0
%7 = load i8*, i8** %1
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %6
%12 = load i8*, i8** %1
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
store i32 %14, i32* %2
br label %15
15: ; preds = %11, %6, %0
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @char_input() {
%1 = alloca i8*
%2 = bitcast i8** %1 to i8*
%3 = call i32 @system_input(i8** %1)
%4 = icmp eq i32 %3, 13
br i1 %4, label %5, label %11
5: ; preds = %0
%6 = load i8*, i8** %1
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
%9 = select i1 %8, i8 13, i8 %7
%10 = sext i8 %9 to i32
br label %11
11: ; preds = %5, %0
%12 = phi i32 [ %3, %0 ], [ %10, %5 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ assert(char *);
int /*<<< orphan*/ memcpy(char *, char *, unsigned int);
char *strings_alloc(unsigned int);
char *strings_from_array(char *array, unsigned int length) {
  assert(array);
  char *ret = strings_alloc(length + 1);
  memcpy(ret, array, length * sizeof(char));
  ret[length] = '\0';
  return ret;
}


x86 assembly (clang, -O0):
<strings_from_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <assert@plt>
mov    -0xc(%rbp),%edi
add    $0x1,%edi
call   1030 <strings_alloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%eax
shl    $0x0,%rax
mov    %eax,%edx
call   1050 <memcpy@plt>
mov    -0x18(%rbp),%rax
mov    -0xc(%rbp),%ecx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strings_from_array>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %esi,%r15d
mov    %rdi,%r14
call   1040 <assert@plt>
lea    0x1(%r15),%edi
call   1030 <strings_alloc@plt>
mov    %rax,%rbx
mov    %r15d,%r12d
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15d,%edx
call   1050 <memcpy@plt>
movb   $0x0,(%rbx,%r12,1)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @strings_from_array(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = call i32 @assert(i8* %6)
%8 = load i32, i32* %4
%9 = add i32 %8, 1
%10 = call i8* @strings_alloc(i32 %9)
store i8* %10, i8** %5
%11 = load i8*, i8** %5
%12 = load i8*, i8** %3
%13 = load i32, i32* %4
%14 = zext i32 %13 to i64
%15 = mul i64 %14, 1
%16 = trunc i64 %15 to i32
%17 = call i32 @memcpy(i8* %11, i8* %12, i32 %16)
%18 = load i8*, i8** %5
%19 = load i32, i32* %4
%20 = zext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
store i8 0, i8* %21
%22 = load i8*, i8** %5
ret i8* %22
}

LLVM IR (-O2):
define i8* @strings_from_array(i8* %0, i32 %1) {
%3 = tail call i32 @assert(i8* %0)
%4 = add i32 %1, 1
%5 = tail call i8* @strings_alloc(i32 %4)
%6 = zext i32 %1 to i64
%7 = tail call i32 @memcpy(i8* %5, i8* %0, i32 %1)
%8 = getelementptr inbounds i8, i8* %5, i64 %6
store i8 0, i8* %8
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M562_f(char *s) {
  debug("M562_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M562_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M562_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M562_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M562_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M562_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M562_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ test_dynmap_collision();
int /*<<< orphan*/ test_dynmap_normal();
void test_dynmap(void) {
  test_dynmap_normal();
  test_dynmap_collision();
}


x86 assembly (clang, -O0):
<test_dynmap>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <test_dynmap_normal@plt>
mov    $0x0,%al
call   1040 <test_dynmap_collision@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_dynmap>:
push   %rax
xor    %eax,%eax
call   1030 <test_dynmap_normal@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <test_dynmap_collision@plt>

LLVM IR (-O0):
define void @test_dynmap() {
%1 = call i32 (...) @test_dynmap_normal()
%2 = call i32 (...) @test_dynmap_collision()
ret void
}

LLVM IR (-O2):
define void @test_dynmap() {
%1 = tail call i32 (...) @test_dynmap_normal()
%2 = tail call i32 (...) @test_dynmap_collision()
ret void
}