xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void printArray(int arrayToPrint[], int numberOfElements) {
  for (int i = 0; i < numberOfElements; i++) {
    printf("Element %i is %i\n", i, arrayToPrint[i]);
  }
}


x86 assembly (clang, -O0):
<printArray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    115a <printArray+0x4a>
mov    -0x10(%rbp),%esi
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <printArray+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printArray>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1147 <printArray+0x37>
mov    %rdi,%r14
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r15
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,4),%edx
mov    %r15,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <printArray+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [18 x i8] c"Element %i is %i\0A\00"
define void @printArray(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = load i32, i32* %5
%12 = load i32*, i32** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
%16 = load i32, i32* %15
%17 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %11, i32 %16)
br label %18
18: ; preds = %10
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %6
21: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"Element %i is %i\0A\00"
define void @printArray(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %7
6: ; preds = %7, %2
ret void
7: ; preds = %4, %7
%8 = phi i64 [ 0, %4 ], [ %13, %7 ]
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = trunc i64 %8 to i32
%12 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %11, i32 %10)
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %5
br i1 %14, label %6, label %7
}
OP(ed, dc) {}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
ret

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
ret i32 undef
}
/* Variables and functions */
int FNM_PATHNAME;
int octave_fnm_pathname_wrapper(void) { return FNM_PATHNAME; }


x86 assembly (clang, -O0):
<octave_fnm_pathname_wrapper>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<octave_fnm_pathname_wrapper>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@FNM_PATHNAME = global i32 0
define i32 @octave_fnm_pathname_wrapper() {
%1 = load i32, i32* @FNM_PATHNAME
ret i32 %1
}

LLVM IR (-O2):
@FNM_PATHNAME = global i32 0
define i32 @octave_fnm_pathname_wrapper() {
%1 = load i32, i32* @FNM_PATHNAME
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ OAL_OBTAIN_SEMAPHORE();
int /*<<< orphan*/ OAL_RELEASE_SEMAPHORE();
int spi_bulkwrite(void *, unsigned short, unsigned char, unsigned char *, int);
signed int fc8180_spib_bytewrite(void *handle, unsigned short addr,
                                 unsigned char data) {
  signed int res;
  unsigned char command = 0x00;
  OAL_OBTAIN_SEMAPHORE();
  res = spi_bulkwrite(handle, addr, command, (unsigned char *)&data, 1);
  OAL_RELEASE_SEMAPHORE();
  return res;
}


x86 assembly (clang, -O0):
<fc8180_spib_bytewrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dl,%al
mov    %si,%cx
mov    %rdi,-0x8(%rbp)
mov    %cx,-0xa(%rbp)
mov    %al,-0xb(%rbp)
movb   $0x0,-0x11(%rbp)
mov    $0x0,%al
call   1050 <OAL_OBTAIN_SEMAPHORE@plt>
mov    -0x8(%rbp),%rdi
mov    -0xa(%rbp),%ax
lea    -0xb(%rbp),%rcx
mov    $0x1,%r8d
movzwl %ax,%esi
movzbl -0x11(%rbp),%edx
call   1040 <spi_bulkwrite@plt>
mov    %eax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <OAL_RELEASE_SEMAPHORE@plt>
mov    -0x10(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc8180_spib_bytewrite>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    %dl,0x7(%rsp)
xor    %eax,%eax
call   1050 <OAL_OBTAIN_SEMAPHORE@plt>
lea    0x7(%rsp),%rcx
mov    %rbx,%rdi
mov    %ebp,%esi
xor    %edx,%edx
mov    $0x1,%r8d
call   1040 <spi_bulkwrite@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <OAL_RELEASE_SEMAPHORE@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fc8180_spib_bytewrite(i8* %0, i16 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i16
%6 = alloca i8
%7 = alloca i32
%8 = alloca i8
store i8* %0, i8** %4
store i16 %1, i16* %5
store i8 %2, i8* %6
store i8 0, i8* %8
%9 = call i32 (...) @OAL_OBTAIN_SEMAPHORE()
%10 = load i8*, i8** %4
%11 = load i16, i16* %5
%12 = load i8, i8* %8
%13 = call i32 @spi_bulkwrite(i8* %10, i16 zeroext %11, i8 zeroext %12, i8* %6, i32 1)
store i32 %13, i32* %7
%14 = call i32 (...) @OAL_RELEASE_SEMAPHORE()
%15 = load i32, i32* %7
ret i32 %15
}

LLVM IR (-O2):
define i32 @fc8180_spib_bytewrite(i8* %0, i16 zeroext %1, i8 zeroext %2) {
%4 = alloca i8
store i8 %2, i8* %4
%5 = tail call i32 (...) @OAL_OBTAIN_SEMAPHORE()
%6 = call i32 @spi_bulkwrite(i8* %0, i16 zeroext %1, i8 zeroext 0, i8* %4, i32 1)
%7 = call i32 (...) @OAL_RELEASE_SEMAPHORE()
ret i32 %6
}
int create_disk_dev(char *basedir) { return 0; }


x86 assembly (clang, -O0):
<create_disk_dev>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_disk_dev>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @create_disk_dev(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @create_disk_dev(i8* nocapture readnone %0) {
ret i32 0
}
int dummy(int arg) { return arg + 12; }


x86 assembly (clang, -O0):
<dummy>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xc,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy>:
lea    0xc(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @dummy(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 12
ret i32 %4
}

LLVM IR (-O2):
define i32 @dummy(i32 %0) {
%2 = add nsw i32 %0, 12
ret i32 %2
}
int od_count_overlapping8x8(int bsize) {
  int non_overlapped_count_8x8;
  ;
  non_overlapped_count_8x8 = 1 << (bsize - 1);
  return 2 * non_overlapped_count_8x8 - 1;
}


x86 assembly (clang, -O0):
<od_count_overlapping8x8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<od_count_overlapping8x8>:
lea    -0x1(%rdi),%ecx
mov    $0x2,%eax
shl    %cl,%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @od_count_overlapping8x8(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 %4, 1
%6 = shl i32 1, %5
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = mul nsw i32 2, %7
%9 = sub nsw i32 %8, 1
ret i32 %9
}

LLVM IR (-O2):
define i32 @od_count_overlapping8x8(i32 %0) {
%2 = add nsw i32 %0, -1
%3 = shl i32 2, %2
%4 = add nsw i32 %3, -1
ret i32 %4
}
void update_log(int iterator, const char *action) {}


x86 assembly (clang, -O0):
<update_log>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<update_log>:
ret

LLVM IR (-O0):
define void @update_log(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @update_log(i32 %0, i8* nocapture %1) {
ret void
}
int swapx(int a, int b, int (*pf)(int, int)) { return (*pf)(a, b); }


x86 assembly (clang, -O0):
<swapx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swapx>:
jmp    *%rdx

LLVM IR (-O0):
define i32 @swapx(i32 %0, i32 %1, i32 (i32, i32)* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32 (i32, i32)*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 (i32, i32)* %2, i32 (i32, i32)** %6
%7 = load i32 (i32, i32)*, i32 (i32, i32)** %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = call i32 %7(i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @swapx(i32 %0, i32 %1, i32 (i32, i32)* nocapture %2) {
%4 = tail call i32 %2(i32 %0, i32 %1)
ret i32 %4
}
int countZeros(int n) {
  int count = 0;
  while (n % 10 == 0) {
    count++;
    n /= 10;
  }
  return count;
}


x86 assembly (clang, -O0):
<countZeros>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    113e <countZeros+0x3e>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    110e <countZeros+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<countZeros>:
imul   $0xcccccccd,%edi,%ecx
add    $0x19999998,%ecx
ror    %ecx
xor    %eax,%eax
cmp    $0x19999998,%ecx
ja     1150 <countZeros+0x50>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
add    $0x1,%eax
movslq %edi,%rcx
imul   $0x66666667,%rcx,%rdi
mov    %rdi,%rcx
shr    $0x3f,%rcx
sar    $0x22,%rdi
add    %ecx,%edi
imul   $0xcccccccd,%edi,%ecx
add    $0x19999998,%ecx
ror    %ecx
cmp    $0x19999999,%ecx
jb     1120 <countZeros+0x20>
ret

LLVM IR (-O0):
define i32 @countZeros(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %2
%6 = srem i32 %5, 10
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
%11 = load i32, i32* %2
%12 = sdiv i32 %11, 10
store i32 %12, i32* %2
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @countZeros(i32 %0) {
%2 = srem i32 %0, 10
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = phi i32 [ %8, %4 ], [ %0, %1 ]
%7 = add nuw nsw i32 %5, 1
%8 = sdiv i32 %6, 10
%9 = srem i32 %8, 10
%10 = icmp eq i32 %9, 0
br i1 %10, label %4, label %11
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %12
}
void ioport_unmap(void *addr) {}


x86 assembly (clang, -O0):
<ioport_unmap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ioport_unmap>:
ret

LLVM IR (-O0):
define void @ioport_unmap(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @ioport_unmap(i8* nocapture %0) {
ret void
}
/* Variables and functions */
unsigned long long C_STRTOULL(char *, char **, int);
int main() {
  char *p = "123";
  char *endptrp;
  unsigned long long ull;
  ull = C_STRTOULL(p, &endptrp, 10);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
mov    $0xa,%edx
call   1030 <C_STRTOULL@plt>
mov    %rax,-0x20(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    %rsp,%rsi
mov    $0xa,%edx
call   1030 <C_STRTOULL@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"123\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
store i32 0, i32* %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %2
%5 = load i8*, i8** %2
%6 = call i64 @C_STRTOULL(i8* %5, i8** %3, i32 10)
store i64 %6, i64* %4
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"123\00"
define i32 @main() {
%1 = alloca i8*
%2 = bitcast i8** %1 to i8*
%3 = call i64 @C_STRTOULL(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %1, i32 10)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0xc9() {
  Assert_real((isalpha(201) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              1010, ("isalpha should be 0 for 0xc9"));
}


x86 assembly (clang, -O0):
<t_isalpha_0xc9>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc9,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3f2,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0xc9>:
push   %rax
mov    $0xc9,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3f2,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xc9\00"
define void @t_isalpha_0xc9() {
%1 = call i64 @isalpha(i32 201)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1010, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xc9\00"
define void @t_isalpha_0xc9() {
%1 = tail call i64 @isalpha(i32 201)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1010, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int read(int, char *, int);
int /*<<< orphan*/ write(int, char *, int);
void echo_lines(int csock) {
  char buf[256];
  int r;
  while ((r = read(csock, buf, 256)) > 0) {
    (void)write(csock, buf, r);
  }
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<echo_lines>:
push   %rbp
mov    %rsp,%rbp
sub    $0x120,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x110(%rbp),%rsi
mov    $0x100,%edx
call   1040 <read@plt>
mov    %eax,-0x114(%rbp)
cmp    $0x0,%eax
jle    117b <echo_lines+0x4b>
mov    -0x4(%rbp),%edi
lea    -0x110(%rbp),%rsi
mov    -0x114(%rbp),%edx
call   1030 <write@plt>
jmp    113e <echo_lines+0xe>
mov    0x2e5e(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<echo_lines>:
push   %r14
push   %rbx
sub    $0x108,%rsp
mov    %edi,%ebx
mov    %rsp,%rsi
mov    $0x100,%edx
call   1040 <read@plt>
test   %eax,%eax
jle    116f <echo_lines+0x3f>
mov    %rsp,%r14
mov    %ebx,%edi
mov    %r14,%rsi
mov    %eax,%edx
call   1030 <write@plt>
mov    %ebx,%edi
mov    %r14,%rsi
mov    $0x100,%edx
call   1040 <read@plt>
test   %eax,%eax
jg     1150 <echo_lines+0x20>
mov    0x2e6a(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define void @echo_lines(i32 %0) {
%2 = alloca i32
%3 = alloca [256 x i8]
%4 = alloca i32
store i32 %0, i32* %2
br label %5
5: ; preds = %10, %1
%6 = load i32, i32* %2
%7 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%8 = call i32 @read(i32 %6, i8* %7, i32 256)
store i32 %8, i32* %4
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %15
10: ; preds = %5
%11 = load i32, i32* %2
%12 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%13 = load i32, i32* %4
%14 = call i32 @write(i32 %11, i8* %12, i32 %13)
br label %5
15: ; preds = %5
%16 = load i32, i32* @EXIT_SUCCESS
%17 = call i32 @exit(i32 %16)
unreachable
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define void @echo_lines(i32 %0) {
%2 = alloca [256 x i8]
%3 = getelementptr inbounds [256 x i8], [256 x i8]* %2, i64 0, i64 0
%4 = call i32 @read(i32 %0, i8* %3, i32 256)
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1, %6
%7 = phi i32 [ %9, %6 ], [ %4, %1 ]
%8 = call i32 @write(i32 %0, i8* %3, i32 %7)
%9 = call i32 @read(i32 %0, i8* %3, i32 256)
%10 = icmp sgt i32 %9, 0
br i1 %10, label %6, label %11
11: ; preds = %6, %1
%12 = load i32, i32* @EXIT_SUCCESS
%13 = tail call i32 @exit(i32 %12)
unreachable
}
int test_imm_DAint8_mem(signed char *val) {
  return ((*val) & (-0xDA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DAint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xffffff26,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DAint8_mem>:
movsbl (%rdi),%eax
test   $0xffffff26,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DAint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, -218
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_DAint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
%4 = and i32 %3, -218
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i32 -40, i32 -20
ret i32 %6
}
indreg0adrreg1(r0, r1, x0, x1, p0, p1) int r0, r1;
int *p0, *p1;
{
  if ((*p0) <= (p1[1111111 / 4]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<indreg0adrreg1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%eax
mov    -0x28(%rbp),%rcx
cmp    0x10f444(%rcx),%eax
jg     113a <indreg0adrreg1+0x3a>
movl   $0x1,-0x4(%rbp)
jmp    1141 <indreg0adrreg1+0x41>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<indreg0adrreg1>:
mov    (%r8),%ecx
xor    %eax,%eax
cmp    0x10f444(%r9),%ecx
setle  %al
ret

LLVM IR (-O0):
define i32 @indreg0adrreg1(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32*, i32** %12
%15 = load i32, i32* %14
%16 = load i32*, i32** %13
%17 = getelementptr inbounds i32, i32* %16, i64 277777
%18 = load i32, i32* %17
%19 = icmp sle i32 %15, %18
br i1 %19, label %20, label %21
20: ; preds = %6
store i32 1, i32* %7
br label %22
21: ; preds = %6
store i32 0, i32* %7
br label %22
22: ; preds = %21, %20
%23 = load i32, i32* %7
ret i32 %23
}

LLVM IR (-O2):
define i32 @indreg0adrreg1(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture %4, i32* nocapture %5) {
%7 = load i32, i32* %4
%8 = getelementptr inbounds i32, i32* %5, i64 277777
%9 = load i32, i32* %8
%10 = icmp sle i32 %7, %9
%11 = zext i1 %10 to i32
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ gui_bar_item_update(char *);
int gui_bar_item_signal_cb(const void *pointer, void *data, const char *signal,
                           const char *type_data, void *signal_data) {
  (void)data;
  (void)signal;
  (void)type_data;
  (void)signal_data;
  gui_bar_item_update((char *)pointer);
  return 0;
}


x86 assembly (clang, -O0):
<gui_bar_item_signal_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <gui_bar_item_update@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gui_bar_item_signal_cb>:
push   %rax
call   1030 <gui_bar_item_update@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gui_bar_item_signal_cb(i8* %0, i8* %1, i8* %2, i8* %3, i8* %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i8*
store i8* %0, i8** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i8* %3, i8** %9
store i8* %4, i8** %10
%11 = load i8*, i8** %7
%12 = load i8*, i8** %8
%13 = load i8*, i8** %9
%14 = load i8*, i8** %10
%15 = load i8*, i8** %6
%16 = call i32 @gui_bar_item_update(i8* %15)
ret i32 0
}

LLVM IR (-O2):
define i32 @gui_bar_item_signal_cb(i8* %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i8* nocapture readnone %3, i8* nocapture readnone %4) {
%6 = tail call i32 @gui_bar_item_update(i8* %0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ outbyte(int /*<<< orphan*/);
int write(int file, char *ptr, int len) {
  int todo;
  for (todo = 0; todo < len; todo++)
    outbyte(*ptr++);
  return len;
}


x86 assembly (clang, -O0):
<write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    115a <write+0x4a>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%edi
call   1030 <outbyte@plt>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1129 <write+0x19>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r14d
test   %edx,%edx
jle    1142 <write+0x32>
mov    %rsi,%r15
mov    %r14d,%ebp
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
movsbl (%r15,%rbx,1),%edi
call   1030 <outbyte@plt>
add    $0x1,%rbx
cmp    %ebx,%ebp
jne    1130 <write+0x20>
mov    %r14d,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @write(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %18, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %21
12: ; preds = %8
%13 = load i8*, i8** %5
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %5
%15 = load i8, i8* %13
%16 = sext i8 %15 to i32
%17 = call i32 @outbyte(i32 %16)
br label %18
18: ; preds = %12
%19 = load i32, i32* %7
%20 = add nsw i32 %19, 1
store i32 %20, i32* %7
br label %8
21: ; preds = %8
%22 = load i32, i32* %6
ret i32 %22
}

LLVM IR (-O2):
define i32 @write(i32 %0, i8* nocapture %1, i32 returned %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %14
5: ; preds = %3, %5
%6 = phi i32 [ %12, %5 ], [ 0, %3 ]
%7 = phi i8* [ %8, %5 ], [ %1, %3 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %7
%10 = sext i8 %9 to i32
%11 = tail call i32 @outbyte(i32 %10)
%12 = add nuw nsw i32 %6, 1
%13 = icmp eq i32 %12, %2
br i1 %13, label %14, label %5
14: ; preds = %5, %3
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ glColor4ub(unsigned char, unsigned char, unsigned char,
                              unsigned char);
void Color4ub(unsigned char r, unsigned char g, unsigned char b,
              unsigned char a) {
  glColor4ub(r, g, b, a);
}


x86 assembly (clang, -O0):
<Color4ub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %cl,%al
mov    %dl,%cl
mov    %sil,%dl
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %dl,-0x2(%rbp)
mov    %cl,-0x3(%rbp)
mov    %al,-0x4(%rbp)
mov    -0x1(%rbp),%dl
mov    -0x2(%rbp),%cl
mov    -0x3(%rbp),%al
movzbl %dl,%edi
movzbl %cl,%esi
movzbl %al,%edx
movzbl -0x4(%rbp),%ecx
call   1030 <glColor4ub@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Color4ub>:
jmp    1030 <glColor4ub@plt>

LLVM IR (-O0):
define void @Color4ub(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8 %0, i8* %5
store i8 %1, i8* %6
store i8 %2, i8* %7
store i8 %3, i8* %8
%9 = load i8, i8* %5
%10 = load i8, i8* %6
%11 = load i8, i8* %7
%12 = load i8, i8* %8
%13 = call i32 @glColor4ub(i8 zeroext %9, i8 zeroext %10, i8 zeroext %11, i8 zeroext %12)
ret void
}

LLVM IR (-O2):
define void @Color4ub(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = tail call i32 @glColor4ub(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3)
ret void
}
void foo295() {}


x86 assembly (clang, -O0):
<foo295>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo295>:
ret

LLVM IR (-O0):
define void @foo295() {
ret void
}

LLVM IR (-O2):
define void @foo295() {
ret void
}
long long diff(long long x, long long y) { return x > y ? x - y : y - x; }


x86 assembly (clang, -O0):
<diff>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jle    112b <diff+0x2b>
mov    -0x8(%rbp),%rax
sub    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    1137 <diff+0x37>
mov    -0x10(%rbp),%rax
sub    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<diff>:
mov    %rdi,%rax
sub    %rsi,%rax
neg    %rax
sub    %rsi,%rdi
cmovg  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @diff(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sgt i64 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i64, i64* %3
%10 = load i64, i64* %4
%11 = sub nsw i64 %9, %10
br label %16
12: ; preds = %2
%13 = load i64, i64* %4
%14 = load i64, i64* %3
%15 = sub nsw i64 %13, %14
br label %16
16: ; preds = %12, %8
%17 = phi i64 [ %11, %8 ], [ %15, %12 ]
ret i64 %17
}

LLVM IR (-O2):
define i64 @diff(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, %1
%4 = sub nsw i64 %0, %1
%5 = sub nsw i64 %1, %0
%6 = select i1 %3, i64 %4, i64 %5
ret i64 %6
}
void empeg_write_bulk_callback(struct urb *urb, struct pt_regs *regs) {}


x86 assembly (clang, -O0):
<empeg_write_bulk_callback>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<empeg_write_bulk_callback>:
ret

LLVM IR (-O0):
%struct.urb = type opaque
%struct.pt_regs = type opaque
define void @empeg_write_bulk_callback(%struct.urb* %0, %struct.pt_regs* %1) {
%3 = alloca %struct.urb*
%4 = alloca %struct.pt_regs*
store %struct.urb* %0, %struct.urb** %3
store %struct.pt_regs* %1, %struct.pt_regs** %4
ret void
}

LLVM IR (-O2):
%struct.urb = type opaque
%struct.pt_regs = type opaque
define void @empeg_write_bulk_callback(%struct.urb* nocapture %0, %struct.pt_regs* nocapture %1) {
ret void
}
/* Variables and functions */
int id();
int main() { return id(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <id@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <id@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @id()
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @id()
ret i32 %1
}
unsigned long rgb2long(unsigned long r, unsigned long g, unsigned long b) {
  return ((r & 0xff) << 16) + ((g & 0xff) << 8) + (b & 0xff);
}


x86 assembly (clang, -O0):
<rgb2long>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
and    $0xff,%rax
shl    $0x10,%rax
mov    -0x10(%rbp),%rcx
and    $0xff,%rcx
shl    $0x8,%rcx
add    %rcx,%rax
mov    -0x18(%rbp),%rcx
and    $0xff,%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgb2long>:
movzbl %dil,%eax
shl    $0x10,%rax
shl    $0x8,%esi
movzwl %si,%ecx
or     %rax,%rcx
movzbl %dl,%eax
or     %rcx,%rax
ret

LLVM IR (-O0):
define i64 @rgb2long(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = and i64 %7, 255
%9 = shl i64 %8, 16
%10 = load i64, i64* %5
%11 = and i64 %10, 255
%12 = shl i64 %11, 8
%13 = add i64 %9, %12
%14 = load i64, i64* %6
%15 = and i64 %14, 255
%16 = add i64 %13, %15
ret i64 %16
}

LLVM IR (-O2):
define i64 @rgb2long(i64 %0, i64 %1, i64 %2) {
%4 = shl i64 %0, 16
%5 = and i64 %4, 16711680
%6 = shl i64 %1, 8
%7 = and i64 %6, 65280
%8 = or i64 %7, %5
%9 = and i64 %2, 255
%10 = or i64 %8, %9
ret i64 %10
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int main(void) {
  fprintf(stderr, "__NR_sigprocmask not supported on this platform\n");
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
lea    0xed1(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [49 x i8] c"__NR_sigprocmask not supported on this platform\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @stderr
%3 = call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [49 x i8] c"__NR_sigprocmask not supported on this platform\0A\00"
define i32 @main() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void EEPROMIntEnable(uint32_t ui32IntFlags) {
  ;
  (*((volatile uint32_t *)(0x400AF040))) |= 0x00000001;
  (*((volatile uint32_t *)(0x400FD010))) |= 0x00000004;
}


x86 assembly (clang, -O0):
<EEPROMIntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x400af040,%eax
mov    (%rax),%ecx
or     $0x1,%ecx
mov    $0x400af040,%eax
mov    %ecx,(%rax)
mov    $0x400fd010,%eax
mov    (%rax),%ecx
or     $0x4,%ecx
mov    $0x400fd010,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<EEPROMIntEnable>:
orl    $0x1,0x400af040
01
orl    $0x4,0x400fd010
04
ret

LLVM IR (-O0):
define void @EEPROMIntEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load volatile i32, i32* inttoptr (i64 1074458688 to i32*)
%4 = or i32 %3, 1
store volatile i32 %4, i32* inttoptr (i64 1074458688 to i32*)
%5 = load volatile i32, i32* inttoptr (i64 1074778128 to i32*)
%6 = or i32 %5, 4
store volatile i32 %6, i32* inttoptr (i64 1074778128 to i32*)
ret void
}

LLVM IR (-O2):
define void @EEPROMIntEnable(i32 %0) {
%2 = load volatile i32, i32* inttoptr (i64 1074458688 to i32*)
%3 = or i32 %2, 1
store volatile i32 %3, i32* inttoptr (i64 1074458688 to i32*)
%4 = load volatile i32, i32* inttoptr (i64 1074778128 to i32*)
%5 = or i32 %4, 4
store volatile i32 %5, i32* inttoptr (i64 1074778128 to i32*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ilogbl(long double);
long double scalbnl(long double, int /*<<< orphan*/);
long double significandl(long double x) { return scalbnl(x, -ilogbl(x)); }


x86 assembly (clang, -O0):
<significandl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fld    %st(0)
fstpt  -0x1c(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <ilogbl@plt>
fldt   -0x1c(%rbp)
mov    %eax,%edi
neg    %edi
mov    %rsp,%rax
fstpt  (%rax)
call   1040 <scalbnl@plt>
fld    %st(0)
fstp   %st(0)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<significandl>:
sub    $0x18,%rsp
fldt   0x20(%rsp)
fstpt  (%rsp)
call   1030 <ilogbl@plt>
neg    %eax
mov    %eax,%edi
add    $0x18,%rsp
jmp    1040 <scalbnl@plt>

LLVM IR (-O0):
define x86_fp80 @significandl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = load x86_fp80, x86_fp80* %2
%5 = call i32 @ilogbl(x86_fp80 %4)
%6 = sub nsw i32 0, %5
%7 = call x86_fp80 @scalbnl(x86_fp80 %3, i32 %6)
ret x86_fp80 %7
}

LLVM IR (-O2):
define x86_fp80 @significandl(x86_fp80 %0) {
%2 = tail call i32 @ilogbl(x86_fp80 %0)
%3 = sub nsw i32 0, %2
%4 = tail call x86_fp80 @scalbnl(x86_fp80 %0, i32 %3)
ret x86_fp80 %4
}
char *get_error_type(int errornum) {
  (void)errornum;
  return "HTTP/1.1 404 Not Found"
         "\r\n";
}


x86 assembly (clang, -O0):
<get_error_type>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
lea    0xef2(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_error_type>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [25 x i8] c"HTTP/1.1 404 Not Found\0D\0A\00"
define i8* @get_error_type(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [25 x i8] c"HTTP/1.1 404 Not Found\0D\0A\00"
define i8* @get_error_type(i32 %0) {
ret i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
int /*<<< orphan*/ HibernateWriteComplete();
void HibernateClockSelect(unsigned long ulClockInput) {
  DEBUG_ASSERT((ulClockInput == 0x00000004) || (ulClockInput == 0x00000000));
  (*((volatile unsigned long *)(0x400FC010))) =
      ulClockInput |
      ((*((volatile unsigned long *)(0x400FC010))) & ~0x00000004);
  HibernateWriteComplete();
}


x86 assembly (clang, -O0):
<HibernateClockSelect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%al
cmpq   $0x4,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     1147 <HibernateClockSelect+0x27>
cmpq   $0x0,-0x8(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rcx
mov    $0x400fc010,%eax
mov    (%rax),%rax
and    $0xfffffffffffffffb,%rax
or     %rax,%rcx
mov    $0x400fc010,%eax
mov    %rcx,(%rax)
mov    $0x0,%al
call   1030 <HibernateWriteComplete@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateClockSelect>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
test   $0xfffffffffffffffb,%rbx
sete   %dil
call   1040 <DEBUG_ASSERT@plt>
mov    0x400fc010,%rax
40
and    $0xfffffffffffffffb,%rax
or     %rbx,%rax
mov    %rax,0x400fc010
40
xor    %eax,%eax
pop    %rbx
jmp    1030 <HibernateWriteComplete@plt>

LLVM IR (-O0):
define void @HibernateClockSelect(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp eq i64 %3, 4
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i64, i64* %2
%7 = icmp eq i64 %6, 0
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = call i32 @DEBUG_ASSERT(i32 %10)
%12 = load i64, i64* %2
%13 = load volatile i64, i64* inttoptr (i64 1074774032 to i64*)
%14 = and i64 %13, -5
%15 = or i64 %12, %14
store volatile i64 %15, i64* inttoptr (i64 1074774032 to i64*)
%16 = call i32 (...) @HibernateWriteComplete()
ret void
}

LLVM IR (-O2):
define void @HibernateClockSelect(i64 %0) {
%2 = and i64 %0, -5
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
%5 = tail call i32 @DEBUG_ASSERT(i32 %4)
%6 = load volatile i64, i64* inttoptr (i64 1074774032 to i64*)
%7 = and i64 %6, -5
%8 = or i64 %7, %0
store volatile i64 %8, i64* inttoptr (i64 1074774032 to i64*)
%9 = tail call i32 (...) @HibernateWriteComplete()
ret void
}
int test_imm_90uint16_reg(unsigned short val) {
  return ((val) & (-0x90 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_90uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff70,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_90uint16_reg>:
test   $0xff70,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_90uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -144
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_90uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -144
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void radeon_kfd_fini(void) {}


x86 assembly (clang, -O0):
<radeon_kfd_fini>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<radeon_kfd_fini>:
ret

LLVM IR (-O0):
define void @radeon_kfd_fini() {
ret void
}

LLVM IR (-O2):
define void @radeon_kfd_fini() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void check(int i) {
  if (i == 0x1234) {
    printf("ok\n");
  }
}


x86 assembly (clang, -O0):
<check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1234,-0x4(%rbp)
jne    1134 <check+0x24>
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check>:
cmp    $0x1234,%edi
jne    1124 <check+0x14>
lea    0xee1(%rip),%rdi
jmp    1030 <puts@plt>
ret

LLVM IR (-O0):
@.str = [4 x i8] c"ok\0A\00"
define void @check(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 4660
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
@str = [3 x i8] c"ok\00"
define void @check(i32 %0) {
%2 = icmp eq i32 %0, 4660
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @str, i64 0, i64 0))
br label %5
5: ; preds = %3, %1
ret void
}
int test_imm_96int16_mem(short *val) {
  return ((*val) & (0x96 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_96int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0x96,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_96int16_mem>:
testb  $0x96,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_96int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 150
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_96int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 150
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
bool should_ignore_line(const char *buf) {
  if (buf[0] == '^' || buf[0] == '#' || buf[0] == '.' || buf[0] == '@')
    return true;
  return false;
}


x86 assembly (clang, -O0):
<should_ignore_line>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x5e,%eax
je     1148 <should_ignore_line+0x48>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x23,%eax
je     1148 <should_ignore_line+0x48>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2e,%eax
je     1148 <should_ignore_line+0x48>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x40,%eax
jne    1154 <should_ignore_line+0x54>
movl   $0x1,-0x4(%rbp)
jmp    115b <should_ignore_line+0x5b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<should_ignore_line>:
mov    (%rdi),%cl
add    $0xdd,%cl
cmp    $0x3b,%cl
ja     1123 <should_ignore_line+0x23>
mov    $0x1,%eax
movzbl %cl,%ecx
movabs $0x800000020000801,%rdx
bt     %rcx,%rdx
jae    1123 <should_ignore_line+0x23>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @should_ignore_line(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 94
br i1 %8, label %27, label %9
9: ; preds = %1
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 0
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 35
br i1 %14, label %27, label %15
15: ; preds = %9
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i64 0
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 46
br i1 %20, label %27, label %21
21: ; preds = %15
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i64 0
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
%26 = icmp eq i32 %25, 64
br i1 %26, label %27, label %28
27: ; preds = %21, %15, %9, %1
store i32 1, i32* %2
br label %29
28: ; preds = %21
store i32 0, i32* %2
br label %29
29: ; preds = %28, %27
%30 = load i32, i32* %2
ret i32 %30
}

LLVM IR (-O2):
define i32 @should_ignore_line(i8* nocapture %0) {
%2 = load i8, i8* %0
switch i8 %2, label %3 [
i8 94, label %4
i8 35, label %4
i8 46, label %4
i8 64, label %4
]
3: ; preds = %1
br label %4
4: ; preds = %1, %1, %1, %1, %3
%5 = phi i32 [ 0, %3 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ bubble_sort_refine(int *, int);
int *get_random_arr(int);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ show(int *, int);
int main() {
  int len = 25;
  int *arr = get_random_arr(len);
  printf("ori\n");
  show(arr, len);
  bubble_sort_refine(arr, len);
  printf("sorted\n");
  show(arr, len);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x19,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <get_random_arr@plt>
mov    %rax,-0x10(%rbp)
lea    0xe97(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%esi
call   1050 <show@plt>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%esi
call   1060 <bubble_sort_refine@plt>
lea    0xe78(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%esi
call   1050 <show@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x19,%edi
call   1040 <get_random_arr@plt>
mov    %rax,%rbx
lea    0xeab(%rip),%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
mov    $0x19,%esi
call   1050 <show@plt>
mov    %rbx,%rdi
mov    $0x19,%esi
call   1060 <bubble_sort_refine@plt>
lea    0xe89(%rip),%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
mov    $0x19,%esi
call   1050 <show@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"ori\0A\00"
@.str.1 = [8 x i8] c"sorted\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
store i32 0, i32* %1
store i32 25, i32* %2
%4 = load i32, i32* %2
%5 = call i32* @get_random_arr(i32 %4)
store i32* %5, i32** %3
%6 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%7 = load i32*, i32** %3
%8 = load i32, i32* %2
%9 = call i32 @show(i32* %7, i32 %8)
%10 = load i32*, i32** %3
%11 = load i32, i32* %2
%12 = call i32 @bubble_sort_refine(i32* %10, i32 %11)
%13 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
%14 = load i32*, i32** %3
%15 = load i32, i32* %2
%16 = call i32 @show(i32* %14, i32 %15)
ret i32 0
}

LLVM IR (-O2):
@str = [4 x i8] c"ori\00"
@str.2 = [7 x i8] c"sorted\00"
define i32 @main() {
%1 = tail call i32* @get_random_arr(i32 25)
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @show(i32* %1, i32 25)
%4 = tail call i32 @bubble_sort_refine(i32* %1, i32 25)
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str.2, i64 0, i64 0))
%6 = tail call i32 @show(i32* %1, i32 25)
ret i32 0
}
int main() {
  switch (3) {}
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
/* Variables and functions */
int stricmp(char const *, char const *);
int mystricmp(const char *str1, const char *str2) {
  if (!str1) {
    if (str2)
      return -1;
    return 0;
  }
  if (!str2)
    return 1;
  return stricmp(str1, str2);
}


x86 assembly (clang, -O0):
<mystricmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114e <mystricmp+0x3e>
cmpq   $0x0,-0x18(%rbp)
je     1142 <mystricmp+0x32>
movl   $0xffffffff,-0x4(%rbp)
jmp    1175 <mystricmp+0x65>
movl   $0x0,-0x4(%rbp)
jmp    1175 <mystricmp+0x65>
cmpq   $0x0,-0x18(%rbp)
jne    1165 <mystricmp+0x55>
movl   $0x1,-0x4(%rbp)
jmp    1175 <mystricmp+0x65>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <stricmp@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mystricmp>:
test   %rdi,%rdi
je     111f <mystricmp+0xf>
test   %rsi,%rsi
je     1125 <mystricmp+0x15>
jmp    1030 <stricmp@plt>
neg    %rsi
sbb    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @mystricmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %13, label %8
8: ; preds = %2
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %12
11: ; preds = %8
store i32 -1, i32* %3
br label %21
12: ; preds = %8
store i32 0, i32* %3
br label %21
13: ; preds = %2
%14 = load i8*, i8** %5
%15 = icmp ne i8* %14, null
br i1 %15, label %17, label %16
16: ; preds = %13
store i32 1, i32* %3
br label %21
17: ; preds = %13
%18 = load i8*, i8** %4
%19 = load i8*, i8** %5
%20 = call i32 @stricmp(i8* %18, i8* %19)
store i32 %20, i32* %3
br label %21
21: ; preds = %17, %16, %12, %11
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @mystricmp(i8* %0, i8* %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = icmp ne i8* %1, null
%6 = sext i1 %5 to i32
br label %11
7: ; preds = %2
%8 = icmp eq i8* %1, null
br i1 %8, label %11, label %9
9: ; preds = %7
%10 = tail call i32 @stricmp(i8* %0, i8* %1)
br label %11
11: ; preds = %7, %4, %9
%12 = phi i32 [ %10, %9 ], [ %6, %4 ], [ 1, %7 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ _cause(int);
void _cause_dbe() { _cause(4); }


x86 assembly (clang, -O0):
<_cause_dbe>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
call   1030 <_cause@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_cause_dbe>:
mov    $0x4,%edi
jmp    1030 <_cause@plt>

LLVM IR (-O0):
define void @_cause_dbe() {
%1 = call i32 @_cause(i32 4)
ret void
}

LLVM IR (-O2):
define void @_cause_dbe() {
%1 = tail call i32 @_cause(i32 4)
ret void
}