xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ vecNd_scalarDiv_new(double *, double const *, double const,
                                       int);
void vec3d_scalarDiv_new(double result[3], const double v[3],
                         const double scalar) {
  vecNd_scalarDiv_new(result, v, scalar, 3);
}


x86 assembly (clang, -O0):
<vec3d_scalarDiv_new>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movsd  %xmm0,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movsd  -0x18(%rbp),%xmm0
mov    $0x3,%edx
call   1030 <vecNd_scalarDiv_new@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec3d_scalarDiv_new>:
mov    $0x3,%edx
jmp    1030 <vecNd_scalarDiv_new@plt>

LLVM IR (-O0):
define void @vec3d_scalarDiv_new(double* %0, double* %1, double %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca double
store double* %0, double** %4
store double* %1, double** %5
store double %2, double* %6
%7 = load double*, double** %4
%8 = load double*, double** %5
%9 = load double, double* %6
%10 = call i32 @vecNd_scalarDiv_new(double* %7, double* %8, double %9, i32 3)
ret void
}

LLVM IR (-O2):
define void @vec3d_scalarDiv_new(double* %0, double* %1, double %2) {
%4 = tail call i32 @vecNd_scalarDiv_new(double* %0, double* %1, double %2, i32 3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_getgrgid_malloc() {
  printf("NOT IMPLEMENTED:"
         "pa_getgrgid_malloc"
         "\n");
}


x86 assembly (clang, -O0):
<pa_getgrgid_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_getgrgid_malloc>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"NOT IMPLEMENTED:pa_getgrgid_malloc\0A\00"
define i32 @pa_getgrgid_malloc() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [35 x i8] c"NOT IMPLEMENTED:pa_getgrgid_malloc\00"
define i32 @pa_getgrgid_malloc() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
int gettimeofday(struct timeval *restrict tp, void *restrict tzp) { return 0; }


x86 assembly (clang, -O0):
<gettimeofday>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gettimeofday>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.timeval = type opaque
define i32 @gettimeofday(%struct.timeval* noalias %0, i8* noalias %1) {
%3 = alloca %struct.timeval*
%4 = alloca i8*
store %struct.timeval* %0, %struct.timeval** %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
%struct.timeval = type opaque
define i32 @gettimeofday(%struct.timeval* noalias nocapture readnone %0, i8* noalias nocapture readnone %1) {
ret i32 0
}
int signExtend(int value, int size) {
  int signMask = 1 << (size - 1);
  int negMask = 0xffffffff << (size - 1);
  if (value & signMask)
    value |= negMask;
  return value;
}


x86 assembly (clang, -O0):
<signExtend>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
mov    $0xffffffff,%eax
shl    %cl,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    -0xc(%rbp),%eax
cmp    $0x0,%eax
je     1142 <signExtend+0x42>
mov    -0x10(%rbp),%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signExtend>:
add    $0xff,%sil
movzbl %sil,%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
xor    %eax,%eax
bt     %ecx,%edi
cmovb  %edx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @signExtend(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = sub nsw i32 %7, 1
%9 = shl i32 1, %8
store i32 %9, i32* %5
%10 = load i32, i32* %4
%11 = sub nsw i32 %10, 1
%12 = shl i32 -1, %11
store i32 %12, i32* %6
%13 = load i32, i32* %3
%14 = load i32, i32* %5
%15 = and i32 %13, %14
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %21
17: ; preds = %2
%18 = load i32, i32* %6
%19 = load i32, i32* %3
%20 = or i32 %19, %18
store i32 %20, i32* %3
br label %21
21: ; preds = %17, %2
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @signExtend(i32 %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = shl nuw i32 1, %3
%5 = and i32 %4, %0
%6 = icmp eq i32 %5, 0
%7 = shl nsw i32 -1, %3
%8 = select i1 %6, i32 0, i32 %7
%9 = or i32 %8, %0
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ sqlite3_value;
typedef int /*<<< orphan*/ sqlite3_context;

/* Variables and functions */
int /*<<< orphan*/ EVP_sha256();
int /*<<< orphan*/ sqlite3_digest_type(int /*<<< orphan*/ *, int,
                                       int /*<<< orphan*/ **,
                                       int /*<<< orphan*/);
void sqlite3_digest_sha256(sqlite3_context *context, int argc,
                           sqlite3_value **argv) {
  sqlite3_digest_type(context, argc, argv, EVP_sha256());
}


x86 assembly (clang, -O0):
<sqlite3_digest_sha256>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    $0x0,%al
call   1040 <EVP_sha256@plt>
mov    -0x30(%rbp),%rdi
mov    -0x24(%rbp),%esi
mov    -0x20(%rbp),%rdx
mov    %eax,%ecx
call   1030 <sqlite3_digest_type@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqlite3_digest_sha256>:
push   %rbp
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %esi,%ebp
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <EVP_sha256@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r14,%rdx
mov    %eax,%ecx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <sqlite3_digest_type@plt>

LLVM IR (-O0):
define void @sqlite3_digest_sha256(i32* %0, i32 %1, i32** %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32**
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32** %2, i32*** %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = load i32**, i32*** %6
%10 = call i32 (...) @EVP_sha256()
%11 = call i32 @sqlite3_digest_type(i32* %7, i32 %8, i32** %9, i32 %10)
ret void
}

LLVM IR (-O2):
define void @sqlite3_digest_sha256(i32* %0, i32 %1, i32** %2) {
%4 = tail call i32 (...) @EVP_sha256()
%5 = tail call i32 @sqlite3_digest_type(i32* %0, i32 %1, i32** %2, i32 %4)
ret void
}
int get_flash_params_count(void) { return 94; }


x86 assembly (clang, -O0):
<get_flash_params_count>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5e,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_flash_params_count>:
mov    $0x5e,%eax
ret

LLVM IR (-O0):
define i32 @get_flash_params_count() {
ret i32 94
}

LLVM IR (-O2):
define i32 @get_flash_params_count() {
ret i32 94
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, char const *, int const);
void test_assert_true(int boolean, const char *expr, const char *filename,
                      const int line) {
  if (!boolean) {
    printf("Test %s failed at %s:%d\n", expr, filename, line);
  }
}


x86 assembly (clang, -O0):
<test_assert_true>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1147 <test_assert_true+0x37>
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_assert_true>:
test   %edi,%edi
je     1115 <test_assert_true+0x5>
ret
lea    0xee4(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"Test %s failed at %s:%d\0A\00"
define void @test_assert_true(i32 %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = icmp ne i32 %9, 0
br i1 %10, label %16, label %11
11: ; preds = %4
%12 = load i8*, i8** %6
%13 = load i8*, i8** %7
%14 = load i32, i32* %8
%15 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %12, i8* %13, i32 %14)
br label %16
16: ; preds = %11, %4
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"Test %s failed at %s:%d\0A\00"
define void @test_assert_true(i32 %0, i8* %1, i8* %2, i32 %3) {
%5 = icmp eq i32 %0, 0
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %1, i8* %2, i32 %3)
br label %8
8: ; preds = %6, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *);
int /*<<< orphan*/ strlen(char *);
int /*<<< orphan*/ usleep(int);
int /*<<< orphan*/ write(int, char *, int /*<<< orphan*/);
void rate(int fd) {
  char cmd[6];
  sprintf(cmd, "SW07;");
  write(fd, cmd, strlen(cmd));
  usleep(100e3);
}


x86 assembly (clang, -O0):
<rate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
lea    -0xa(%rbp),%rdi
lea    0xeaa(%rip),%rsi
call   1050 <sprintf@plt>
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
lea    -0xa(%rbp),%rax
mov    %rax,-0x18(%rbp)
lea    -0xa(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <write@plt>
mov    $0x186a0,%edi
call   1060 <usleep@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rate>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
movw   $0x3b,0x4(%rsp)
movl   $0x37305753,(%rsp)
mov    %rsp,%r14
mov    %r14,%rdi
call   1040 <strlen@plt>
mov    %ebx,%edi
mov    %r14,%rsi
mov    %eax,%edx
call   1030 <write@plt>
mov    $0x186a0,%edi
call   1050 <usleep@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [6 x i8] c"SW07;\00"
define void @rate(i32 %0) {
%2 = alloca i32
%3 = alloca [6 x i8]
store i32 %0, i32* %2
%4 = getelementptr inbounds [6 x i8], [6 x i8]* %3, i64 0, i64 0
%5 = call i32 @sprintf(i8* %4, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* %2
%7 = getelementptr inbounds [6 x i8], [6 x i8]* %3, i64 0, i64 0
%8 = getelementptr inbounds [6 x i8], [6 x i8]* %3, i64 0, i64 0
%9 = call i32 @strlen(i8* %8)
%10 = call i32 @write(i32 %6, i8* %7, i32 %9)
%11 = call i32 @usleep(i32 100000)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"SW07;\00"
define void @rate(i32 %0) {
%2 = alloca [6 x i8]
%3 = getelementptr inbounds [6 x i8], [6 x i8]* %2, i64 0, i64 0
%4 = call i32 @strlen(i8* %3)
%5 = call i32 @write(i32 %0, i8* %3, i32 %4)
%6 = call i32 @usleep(i32 100000)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ M_Iterate();
void Use_Algo_Rej_Code() { M_Iterate(); }


x86 assembly (clang, -O0):
<Use_Algo_Rej_Code>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <M_Iterate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Use_Algo_Rej_Code>:
xor    %eax,%eax
jmp    1030 <M_Iterate@plt>

LLVM IR (-O0):
define void @Use_Algo_Rej_Code() {
%1 = call i32 (...) @M_Iterate()
ret void
}

LLVM IR (-O2):
define void @Use_Algo_Rej_Code() {
%1 = tail call i32 (...) @M_Iterate()
ret void
}
load_new_dll() {}


x86 assembly (clang, -O0):
<load_new_dll>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_new_dll>:
ret

LLVM IR (-O0):
define i32 @load_new_dll() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @load_new_dll() {
ret i32 undef
}
void __yotta_dummy_lib_symbol_compiler_polyfill() {}


x86 assembly (clang, -O0):
<__yotta_dummy_lib_symbol_compiler_polyfill>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__yotta_dummy_lib_symbol_compiler_polyfill>:
ret

LLVM IR (-O0):
define void @__yotta_dummy_lib_symbol_compiler_polyfill() {
ret void
}

LLVM IR (-O2):
define void @__yotta_dummy_lib_symbol_compiler_polyfill() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ RegWriteA_lc898122(int, int);
void SetPanTiltMode_lc898122(unsigned char UcPnTmod) {
  switch (UcPnTmod) {
  case 0x00:
    RegWriteA_lc898122(0x0109, 0x00);
    break;
  case 0x01:
    RegWriteA_lc898122(0x0109, 0x01);
    break;
  }
}


x86 assembly (clang, -O0):
<SetPanTiltMode_lc898122>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
mov    %eax,-0x8(%rbp)
test   %eax,%eax
je     1143 <SetPanTiltMode_lc898122+0x33>
jmp    1132 <SetPanTiltMode_lc898122+0x22>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
je     1154 <SetPanTiltMode_lc898122+0x44>
jmp    1163 <SetPanTiltMode_lc898122+0x53>
mov    $0x109,%edi
xor    %esi,%esi
call   1030 <RegWriteA_lc898122@plt>
jmp    1163 <SetPanTiltMode_lc898122+0x53>
mov    $0x109,%edi
mov    $0x1,%esi
call   1030 <RegWriteA_lc898122@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetPanTiltMode_lc898122>:
test   %edi,%edi
je     1129 <SetPanTiltMode_lc898122+0x19>
cmp    $0x1,%dil
jne    1135 <SetPanTiltMode_lc898122+0x25>
mov    $0x1,%esi
mov    $0x109,%edi
jmp    1030 <RegWriteA_lc898122@plt>
xor    %esi,%esi
mov    $0x109,%edi
jmp    1030 <RegWriteA_lc898122@plt>
ret

LLVM IR (-O0):
define void @SetPanTiltMode_lc898122(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
switch i32 %4, label %9 [
i32 0, label %5
i32 1, label %7
]
5: ; preds = %1
%6 = call i32 @RegWriteA_lc898122(i32 265, i32 0)
br label %9
7: ; preds = %1
%8 = call i32 @RegWriteA_lc898122(i32 265, i32 1)
br label %9
9: ; preds = %1, %7, %5
ret void
}

LLVM IR (-O2):
define void @SetPanTiltMode_lc898122(i8 zeroext %0) {
switch i8 %0, label %6 [
i8 0, label %3
i8 1, label %2
]
2: ; preds = %1
br label %3
3: ; preds = %1, %2
%4 = phi i32 [ 1, %2 ], [ 0, %1 ]
%5 = tail call i32 @RegWriteA_lc898122(i32 265, i32 %4)
br label %6
6: ; preds = %3, %1
ret void
}
double sd2eps(unsigned int sigdig) {
  double eps = 1;
  while (sigdig > 0) {
    eps *= 0.1;
    sigdig -= 1;
  }
  return eps;
}


x86 assembly (clang, -O0):
<sd2eps>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movsd  0xef1(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jbe    113e <sd2eps+0x3e>
movsd  0xee2(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1114 <sd2eps+0x14>
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd2eps>:
test   %edi,%edi
je     1134 <sd2eps+0x34>
lea    -0x1(%rdi),%eax
mov    %edi,%ecx
and    $0x7,%ecx
je     113d <sd2eps+0x3d>
xor    %edx,%edx
movsd  0xee8(%rip),%xmm0
movsd  0xee8(%rip),%xmm1
mulsd  %xmm1,%xmm0
add    $0x1,%edx
cmp    %edx,%ecx
jne    1120 <sd2eps+0x20>
sub    %edx,%edi
cmp    $0x7,%eax
jae    114a <sd2eps+0x4a>
jmp    1185 <sd2eps+0x85>
movsd  0xec4(%rip),%xmm0
ret
movsd  0xebb(%rip),%xmm0
cmp    $0x7,%eax
jb     1185 <sd2eps+0x85>
movsd  0xeb6(%rip),%xmm1
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
add    $0xfffffff8,%edi
jne    1160 <sd2eps+0x60>
ret

LLVM IR (-O0):
define double @sd2eps(i32 %0) {
%2 = alloca i32
%3 = alloca double
store i32 %0, i32* %2
store double 1.000000e+00, double* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ugt i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load double, double* %3
%9 = fmul double %8, 1.000000e-01
store double %9, double* %3
%10 = load i32, i32* %2
%11 = sub i32 %10, 1
store i32 %11, i32* %2
br label %4
12: ; preds = %4
%13 = load double, double* %3
ret double %13
}

LLVM IR (-O2):
define double @sd2eps(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %33, label %3
3: ; preds = %1
%4 = add i32 %0, -1
%5 = and i32 %0, 7
%6 = icmp eq i32 %5, 0
br i1 %6, label %15, label %7
7: ; preds = %3, %7
%8 = phi double [ %11, %7 ], [ 1.000000e+00, %3 ]
%9 = phi i32 [ %12, %7 ], [ %0, %3 ]
%10 = phi i32 [ %13, %7 ], [ 0, %3 ]
%11 = fmul double %8, 1.000000e-01
%12 = add i32 %9, -1
%13 = add i32 %10, 1
%14 = icmp eq i32 %13, %5
br i1 %14, label %15, label %7
15: ; preds = %7, %3
%16 = phi double [ undef, %3 ], [ %11, %7 ]
%17 = phi double [ 1.000000e+00, %3 ], [ %11, %7 ]
%18 = phi i32 [ %0, %3 ], [ %12, %7 ]
%19 = icmp ult i32 %4, 7
br i1 %19, label %33, label %20
20: ; preds = %15, %20
%21 = phi double [ %30, %20 ], [ %17, %15 ]
%22 = phi i32 [ %31, %20 ], [ %18, %15 ]
%23 = fmul double %21, 1.000000e-01
%24 = fmul double %23, 1.000000e-01
%25 = fmul double %24, 1.000000e-01
%26 = fmul double %25, 1.000000e-01
%27 = fmul double %26, 1.000000e-01
%28 = fmul double %27, 1.000000e-01
%29 = fmul double %28, 1.000000e-01
%30 = fmul double %29, 1.000000e-01
%31 = add i32 %22, -8
%32 = icmp eq i32 %31, 0
br i1 %32, label %33, label %20
33: ; preds = %15, %20, %1
%34 = phi double [ 1.000000e+00, %1 ], [ %16, %15 ], [ %30, %20 ]
ret double %34
}
/* Variables and functions */
int /*<<< orphan*/ drawPaw(int);
int /*<<< orphan*/ glPopMatrix();
int /*<<< orphan*/ glPushMatrix();
void paw(int side) {
  glPushMatrix();
  drawPaw(side);
  glPopMatrix();
}


x86 assembly (clang, -O0):
<paw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1050 <glPushMatrix@plt>
mov    -0x4(%rbp),%edi
call   1030 <drawPaw@plt>
mov    $0x0,%al
call   1040 <glPopMatrix@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<paw>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1050 <glPushMatrix@plt>
mov    %ebx,%edi
call   1030 <drawPaw@plt>
xor    %eax,%eax
pop    %rbx
jmp    1040 <glPopMatrix@plt>

LLVM IR (-O0):
define void @paw(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @glPushMatrix()
%4 = load i32, i32* %2
%5 = call i32 @drawPaw(i32 %4)
%6 = call i32 (...) @glPopMatrix()
ret void
}

LLVM IR (-O2):
define void @paw(i32 %0) {
%2 = tail call i32 (...) @glPushMatrix()
%3 = tail call i32 @drawPaw(i32 %0)
%4 = tail call i32 (...) @glPopMatrix()
ret void
}
/* Variables and functions */
int socketShutdown();
int shutdownModule(void) { return socketShutdown(); }


x86 assembly (clang, -O0):
<shutdownModule>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <socketShutdown@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<shutdownModule>:
xor    %eax,%eax
jmp    1030 <socketShutdown@plt>

LLVM IR (-O0):
define i32 @shutdownModule() {
%1 = call i32 (...) @socketShutdown()
ret i32 %1
}

LLVM IR (-O2):
define i32 @shutdownModule() {
%1 = tail call i32 (...) @socketShutdown()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ strchr(char *, int);
void uninitvar_strchr(void) {
  char *cs;
  int c;
  (void)strchr(cs, c);
}


x86 assembly (clang, -O0):
<uninitvar_strchr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <strchr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_strchr>:
jmp    1030 <strchr@plt>

LLVM IR (-O0):
define void @uninitvar_strchr() {
%1 = alloca i8*
%2 = alloca i32
%3 = load i8*, i8** %1
%4 = load i32, i32* %2
%5 = call i32 @strchr(i8* %3, i32 %4)
ret void
}

LLVM IR (-O2):
define void @uninitvar_strchr() {
%1 = tail call i32 @strchr(i8* undef, i32 undef)
ret void
}
void bitfix_reserve(void) { ; }


x86 assembly (clang, -O0):
<bitfix_reserve>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitfix_reserve>:
ret

LLVM IR (-O0):
define void @bitfix_reserve() {
ret void
}

LLVM IR (-O2):
define void @bitfix_reserve() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int rand();
int rand_int(int start, int end) {
  assert(start <= end);
  return rand() % (end - start + 1) + start;
}


x86 assembly (clang, -O0):
<rand_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setle  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    $0x0,%al
call   1040 <rand@plt>
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_int>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
sub    %ebp,%ebx
setge  %dil
call   1030 <assert@plt>
xor    %eax,%eax
call   1040 <rand@plt>
add    $0x1,%ebx
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @rand_int(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sle i32 %5, %6
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
%10 = call i32 (...) @rand()
%11 = load i32, i32* %4
%12 = load i32, i32* %3
%13 = sub nsw i32 %11, %12
%14 = add nsw i32 %13, 1
%15 = srem i32 %10, %14
%16 = load i32, i32* %3
%17 = add nsw i32 %15, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @rand_int(i32 %0, i32 %1) {
%3 = icmp sge i32 %1, %0
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = tail call i32 (...) @rand()
%7 = sub i32 1, %0
%8 = add i32 %7, %1
%9 = srem i32 %6, %8
%10 = add nsw i32 %9, %0
ret i32 %10
}
void ff_hevc_put_hevc_bi_w_epel_v8_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_epel_v8_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_epel_v8_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_epel_v8_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_epel_v8_8_sse4() {
ret void
}
/* Variables and functions */
size_t strlen(const char *s) {
  size_t n = 0;
  while (*s++)
    n++;
  return n;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,(%rax)
je     1139 <strlen+0x39>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <strlen+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
cmpb   $0x0,(%rdi)
je     111f <strlen+0x1f>
xor    %ecx,%ecx
nopw   0x0(%rax,%rax,1)
lea    0x1(%rcx),%rax
cmpb   $0x0,0x1(%rdi,%rcx,1)
mov    %rax,%rcx
jne    1110 <strlen+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = load i64, i64* %3
%11 = add i64 %10, 1
store i64 %11, i64* %3
br label %4
12: ; preds = %4
%13 = load i64, i64* %3
ret i64 %13
}

LLVM IR (-O2):
define i64 @strlen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add i64 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i64 [ 0, %1 ], [ %8, %4 ]
ret i64 %12
}
struct s3c24x0_rtc *s3c24x0_get_base_rtc(void) {
  return (struct s3c24x0_rtc *)0x15700000;
}


x86 assembly (clang, -O0):
<s3c24x0_get_base_rtc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x15700000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<s3c24x0_get_base_rtc>:
mov    $0x15700000,%eax
ret

LLVM IR (-O0):
%struct.s3c24x0_rtc = type opaque
define %struct.s3c24x0_rtc* @s3c24x0_get_base_rtc() {
ret %struct.s3c24x0_rtc* inttoptr (i64 359661568 to %struct.s3c24x0_rtc*)
}

LLVM IR (-O2):
%struct.s3c24x0_rtc = type opaque
define %struct.s3c24x0_rtc* @s3c24x0_get_base_rtc() {
ret %struct.s3c24x0_rtc* inttoptr (i64 359661568 to %struct.s3c24x0_rtc*)
}
/* Variables and functions */
int /*<<< orphan*/ receiveMessages();
int /*<<< orphan*/ sleep(int);
int main(void) {
  receiveMessages();
  int i = 10;
  while (i > 0) {
    sleep(1);
    i--;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <receiveMessages@plt>
movl   $0xa,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    115f <main+0x3f>
mov    $0x1,%edi
call   1030 <sleep@plt>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    113d <main+0x1d>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <receiveMessages@plt>
mov    $0x1,%edi
call   1030 <sleep@plt>
mov    $0x1,%edi
call   1030 <sleep@plt>
mov    $0x1,%edi
call   1030 <sleep@plt>
mov    $0x1,%edi
call   1030 <sleep@plt>
mov    $0x1,%edi
call   1030 <sleep@plt>
mov    $0x1,%edi
call   1030 <sleep@plt>
mov    $0x1,%edi
call   1030 <sleep@plt>
mov    $0x1,%edi
call   1030 <sleep@plt>
mov    $0x1,%edi
call   1030 <sleep@plt>
mov    $0x1,%edi
call   1030 <sleep@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @receiveMessages()
store i32 10, i32* %2
br label %4
4: ; preds = %7, %0
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = call i32 @sleep(i32 1)
%9 = load i32, i32* %2
%10 = add nsw i32 %9, -1
store i32 %10, i32* %2
br label %4
11: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @receiveMessages()
%2 = tail call i32 @sleep(i32 1)
%3 = tail call i32 @sleep(i32 1)
%4 = tail call i32 @sleep(i32 1)
%5 = tail call i32 @sleep(i32 1)
%6 = tail call i32 @sleep(i32 1)
%7 = tail call i32 @sleep(i32 1)
%8 = tail call i32 @sleep(i32 1)
%9 = tail call i32 @sleep(i32 1)
%10 = tail call i32 @sleep(i32 1)
%11 = tail call i32 @sleep(i32 1)
ret i32 0
}
OP(fd, e7) { op_e7(); }


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <op_e7@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
xor    %eax,%eax
jmp    1030 <op_e7@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @op_e7()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @op_e7()
ret i32 undef
}
f() { printf(1234); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4d2,%edi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0x4d2,%edi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
define i32 @f() {
%1 = alloca i32
%2 = call i32 (i8*, ...) @printf(i8* inttoptr (i64 1234 to i8*))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @f() {
%1 = tail call i32 (i8*, ...) @printf(i8* inttoptr (i64 1234 to i8*))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void const *, int);
void *mhs_malloc(int);
void *mhs_memdup(void const *mem, int size) {
  void *new_mem;
  if (mem) {
    new_mem = mhs_malloc(size);
    memcpy(new_mem, mem, size);
  } else {
    new_mem = NULL;
  }
  return (new_mem);
}


x86 assembly (clang, -O0):
<mhs_memdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     115b <mhs_memdup+0x3b>
mov    -0xc(%rbp),%edi
call   1040 <mhs_malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <memcpy@plt>
jmp    1163 <mhs_memdup+0x43>
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mhs_memdup>:
push   %rbp
push   %r14
push   %rbx
test   %rdi,%rdi
je     1149 <mhs_memdup+0x29>
mov    %esi,%r14d
mov    %rdi,%rbp
mov    %esi,%edi
call   1040 <mhs_malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %rbp,%rsi
mov    %r14d,%edx
call   1030 <memcpy@plt>
jmp    114b <mhs_memdup+0x2b>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @mhs_memdup(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %15
8: ; preds = %2
%9 = load i32, i32* %4
%10 = call i8* @mhs_malloc(i32 %9)
store i8* %10, i8** %5
%11 = load i8*, i8** %5
%12 = load i8*, i8** %3
%13 = load i32, i32* %4
%14 = call i32 @memcpy(i8* %11, i8* %12, i32 %13)
br label %16
15: ; preds = %2
store i8* null, i8** %5
br label %16
16: ; preds = %15, %8
%17 = load i8*, i8** %5
ret i8* %17
}

LLVM IR (-O2):
define i8* @mhs_memdup(i8* %0, i32 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = tail call i8* @mhs_malloc(i32 %1)
%6 = tail call i32 @memcpy(i8* %5, i8* %0, i32 %1)
br label %7
7: ; preds = %2, %4
%8 = phi i8* [ %5, %4 ], [ null, %2 ]
ret i8* %8
}
/* Variables and functions */
char *ap_cvt(double, int, int *, int *, int, char *);
char *ap_ecvt(double arg, int ndigits, int *decpt, int *sign, char *buf) {
  return (ap_cvt(arg, ndigits, decpt, sign, 1, buf));
}


x86 assembly (clang, -O0):
<ap_ecvt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    -0xc(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x28(%rbp),%r8
mov    $0x1,%ecx
call   1030 <ap_cvt@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ap_ecvt>:
mov    %rcx,%r8
mov    $0x1,%ecx
jmp    1030 <ap_cvt@plt>

LLVM IR (-O0):
define i8* @ap_ecvt(double %0, i32 %1, i32* %2, i32* %3, i8* %4) {
%6 = alloca double
%7 = alloca i32
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca i8*
store double %0, double* %6
store i32 %1, i32* %7
store i32* %2, i32** %8
store i32* %3, i32** %9
store i8* %4, i8** %10
%11 = load double, double* %6
%12 = load i32, i32* %7
%13 = load i32*, i32** %8
%14 = load i32*, i32** %9
%15 = load i8*, i8** %10
%16 = call i8* @ap_cvt(double %11, i32 %12, i32* %13, i32* %14, i32 1, i8* %15)
ret i8* %16
}

LLVM IR (-O2):
define i8* @ap_ecvt(double %0, i32 %1, i32* %2, i32* %3, i8* %4) {
%6 = tail call i8* @ap_cvt(double %0, i32 %1, i32* %2, i32* %3, i32 1, i8* %4)
ret i8* %6
}
void gkd_capability_obtain_capability_and_drop_privileges(void) {}


x86 assembly (clang, -O0):
<gkd_capability_obtain_capability_and_drop_privileges>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gkd_capability_obtain_capability_and_drop_privileges>:
ret

LLVM IR (-O0):
define void @gkd_capability_obtain_capability_and_drop_privileges() {
ret void
}

LLVM IR (-O2):
define void @gkd_capability_obtain_capability_and_drop_privileges() {
ret void
}
/* Variables and functions */
int send(int, void *, size_t, int /*<<< orphan*/);
int tcp_send(void *arg, void *buf, size_t len) {
  int *fd = (int *)arg;
  return send(*fd, buf, len, 0);
}


x86 assembly (clang, -O0):
<tcp_send>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
call   1030 <send@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcp_send>:
mov    (%rdi),%edi
xor    %ecx,%ecx
jmp    1030 <send@plt>

LLVM IR (-O0):
define i32 @tcp_send(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
store i32* %9, i32** %7
%10 = load i32*, i32** %7
%11 = load i32, i32* %10
%12 = load i8*, i8** %5
%13 = load i64, i64* %6
%14 = call i32 @send(i32 %11, i8* %12, i64 %13, i32 0)
ret i32 %14
}

LLVM IR (-O2):
define i32 @tcp_send(i8* nocapture %0, i8* %1, i64 %2) {
%4 = bitcast i8* %0 to i32*
%5 = load i32, i32* %4
%6 = tail call i32 @send(i32 %5, i8* %1, i64 %2, i32 0)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void print_usage(char *file) {
  printf("Usage:\n");
  printf("%s write <file>\n", file);
  printf("%s replay\n", file);
  printf("%s tag <string>\n", file);
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rsi
lea    0xed3(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rsi
lea    0xed2(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rsi
lea    0xecb(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
push   %rbx
mov    %rdi,%rbx
lea    0xf02(%rip),%rdi
call   1030 <puts@plt>
lea    0xec9(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xec9(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xec3(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
pop    %rbx
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"Usage:\0A\00"
@.str.1 = [17 x i8] c"%s write <file>\0A\00"
@.str.2 = [11 x i8] c"%s replay\0A\00"
@.str.3 = [17 x i8] c"%s tag <string>\0A\00"
define void @print_usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i8* %4)
%6 = load i8*, i8** %2
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0), i8* %6)
%8 = load i8*, i8** %2
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.3, i64 0, i64 0), i8* %8)
ret void
}

LLVM IR (-O2):
@.str.1 = [17 x i8] c"%s write <file>\0A\00"
@.str.2 = [11 x i8] c"%s replay\0A\00"
@.str.3 = [17 x i8] c"%s tag <string>\0A\00"
@str = [7 x i8] c"Usage:\00"
define void @print_usage(i8* %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i8* %0)
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0), i8* %0)
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @.str.3, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
struct TreeNode {
  int dummy;
};

/* Variables and functions */
int INT_MIN;
int /*<<< orphan*/ helper(struct TreeNode *, int *);
int maxPathSum(struct TreeNode *root) {
  int ret = INT_MIN;
  helper(root, &ret);
  return ret;
}


x86 assembly (clang, -O0):
<maxPathSum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1030 <helper@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<maxPathSum>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%eax
mov    %eax,0x4(%rsp)
lea    0x4(%rsp),%rsi
call   1030 <helper@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.TreeNode = type { i32 }
@INT_MIN = global i32 0
define i32 @maxPathSum(%struct.TreeNode* %0) {
%2 = alloca %struct.TreeNode*
%3 = alloca i32
store %struct.TreeNode* %0, %struct.TreeNode** %2
%4 = load i32, i32* @INT_MIN
store i32 %4, i32* %3
%5 = load %struct.TreeNode*, %struct.TreeNode** %2
%6 = call i32 @helper(%struct.TreeNode* %5, i32* %3)
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
%struct.TreeNode = type { i32 }
@INT_MIN = global i32 0
define i32 @maxPathSum(%struct.TreeNode* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = load i32, i32* @INT_MIN
store i32 %4, i32* %2
%5 = call i32 @helper(%struct.TreeNode* %0, i32* %2)
%6 = load i32, i32* %2
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ func();
int /*<<< orphan*/ funcPram(int);
int funcReturnValue();
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char **argv) {
  func();
  funcPram(40);
  printf("Hello world\n %d", funcReturnValue());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1050 <func@plt>
mov    $0x28,%edi
call   1040 <funcPram@plt>
mov    $0x0,%al
call   1060 <funcReturnValue@plt>
mov    %eax,%esi
lea    0xe89(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <func@plt>
mov    $0x28,%edi
call   1040 <funcPram@plt>
xor    %eax,%eax
call   1060 <funcReturnValue@plt>
lea    0xea0(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"Hello world\0A %d\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @func()
%7 = call i32 @funcPram(i32 40)
%8 = call i32 (...) @funcReturnValue()
%9 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"Hello world\0A %d\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @func()
%4 = tail call i32 @funcPram(i32 40)
%5 = tail call i32 (...) @funcReturnValue()
%6 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}
unsigned int hash4(unsigned int key) { return key % 1000003; }


x86 assembly (clang, -O0):
<hash4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xf4243,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash4>:
mov    %edi,%eax
mov    %edi,%ecx
imul   $0xc6f4545,%rcx,%rcx
shr    $0x20,%rcx
mov    %edi,%edx
sub    %ecx,%edx
shr    %edx
add    %ecx,%edx
shr    $0x13,%edx
imul   $0xf4243,%edx,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @hash4(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = urem i32 %3, 1000003
ret i32 %4
}

LLVM IR (-O2):
define i32 @hash4(i32 %0) {
%2 = urem i32 %0, 1000003
ret i32 %2
}
extern int foo() { return 0; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @foo() {
ret i32 0
}

LLVM IR (-O2):
define i32 @foo() {
ret i32 0
}
double test3b(double x) { return __builtin_pow(x, -5. / 3.); }


x86 assembly (clang, -O0):
<test3b>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xed6(%rip),%xmm1
call   1030 <pow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test3b>:
movsd  0xee8(%rip),%xmm1
jmp    1030 <pow@plt>

LLVM IR (-O0):
define double @test3b(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @pow(double %3, double 0xBFFAAAAAAAAAAAAB)
ret double %4
}

LLVM IR (-O2):
define double @test3b(double %0) {
%2 = tail call double @pow(double %0, double 0xBFFAAAAAAAAAAAAB)
ret double %2
}
void __DELETE_org_apache_harmony_niochar_CharsetProviderImpl_1(
    void *me, void *client_data) {}


x86 assembly (clang, -O0):
<__DELETE_org_apache_harmony_niochar_CharsetProviderImpl_1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__DELETE_org_apache_harmony_niochar_CharsetProviderImpl_1>:
ret

LLVM IR (-O0):
define void @__DELETE_org_apache_harmony_niochar_CharsetProviderImpl_1(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @__DELETE_org_apache_harmony_niochar_CharsetProviderImpl_1(i8* nocapture %0, i8* nocapture %1) {
ret void
}
void fn2(int *x, int *y) { *y = 0; }


x86 assembly (clang, -O0):
<fn2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn2>:
movl   $0x0,(%rsi)
ret

LLVM IR (-O0):
define void @fn2(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
store i32 0, i32* %5
ret void
}

LLVM IR (-O2):
define void @fn2(i32* nocapture readnone %0, i32* nocapture writeonly %1) {
store i32 0, i32* %1
ret void
}
/* Type definitions */
struct libavl_allocator {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ free(void *);
void tavl_free(struct libavl_allocator *allocator, void *block) {
  assert(allocator != NULL && block != NULL);
  free(block);
}


x86 assembly (clang, -O0):
<tavl_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x11(%rbp)
je     114b <tavl_free+0x2b>
cmpq   $0x0,-0x10(%rbp)
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tavl_free>:
push   %rbx
mov    %rsi,%rbx
test   %rdi,%rdi
setne  %al
test   %rsi,%rsi
setne  %cl
and    %al,%cl
movzbl %cl,%edi
call   1040 <assert@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.libavl_allocator = type { i32 }
define void @tavl_free(%struct.libavl_allocator* %0, i8* %1) {
%3 = alloca %struct.libavl_allocator*
%4 = alloca i8*
store %struct.libavl_allocator* %0, %struct.libavl_allocator** %3
store i8* %1, i8** %4
%5 = load %struct.libavl_allocator*, %struct.libavl_allocator** %3
%6 = icmp ne %struct.libavl_allocator* %5, null
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i8*, i8** %4
%9 = icmp ne i8* %8, null
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ false, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
%13 = call i32 @assert(i32 %12)
%14 = load i8*, i8** %4
%15 = call i32 @free(i8* %14)
ret void
}

LLVM IR (-O2):
%struct.libavl_allocator = type { i32 }
define void @tavl_free(%struct.libavl_allocator* readnone %0, i8* %1) {
%3 = icmp ne %struct.libavl_allocator* %0, null
%4 = icmp ne i8* %1, null
%5 = and i1 %3, %4
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
%8 = tail call i32 @free(i8* %1)
ret void
}
unsigned char bridge_swizzle(unsigned char pin, unsigned int slot) {
  return (((pin - 1) + slot) % 4) + 1;
}


x86 assembly (clang, -O0):
<bridge_swizzle>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
sub    $0x1,%eax
add    -0x8(%rbp),%eax
and    $0x3,%eax
add    $0x1,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bridge_swizzle>:
lea    (%rdi,%rsi,1),%eax
add    $0xff,%al
and    $0x3,%al
add    $0x1,%al
ret

LLVM IR (-O0):
define zeroext i8 @bridge_swizzle(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = sub nsw i32 %6, 1
%8 = load i32, i32* %4
%9 = add i32 %7, %8
%10 = urem i32 %9, 4
%11 = add i32 %10, 1
%12 = trunc i32 %11 to i8
ret i8 %12
}

LLVM IR (-O2):
define zeroext i8 @bridge_swizzle(i8 zeroext %0, i32 %1) {
%3 = zext i8 %0 to i32
%4 = add nuw nsw i32 %3, 3
%5 = add i32 %4, %1
%6 = trunc i32 %5 to i8
%7 = and i8 %6, 3
%8 = add nuw nsw i8 %7, 1
ret i8 %8
}
unsigned xrop3_174_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~T;
  stk2 = S & stk3;
  stk1 = D | stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_174_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_174_1_1>:
mov    %esi,%ecx
shl    $0x8,%ecx
or     %esi,%ecx
not    %ecx
or     %edi,%esi
mov    %edi,%eax
not    %al
movzbl %al,%eax
and    %ecx,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_174_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %6
%26 = load i32, i32* %10
%27 = and i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %5
%29 = load i32, i32* %9
%30 = or i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = load i32, i32* %6
%33 = xor i32 %32, -1
%34 = and i32 %31, %33
%35 = load i32, i32* %7
%36 = xor i32 %35, -1
%37 = and i32 %34, %36
%38 = load i32, i32* %5
%39 = load i32, i32* %6
%40 = and i32 %38, %39
%41 = or i32 %37, %40
%42 = load i32, i32* %5
%43 = load i32, i32* %7
%44 = and i32 %42, %43
%45 = or i32 %41, %44
ret i32 %45
}

LLVM IR (-O2):
define i32 @xrop3_174_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %1 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = xor i32 %4, -1
%6 = xor i8 %0, -1
%7 = zext i8 %6 to i32
%8 = and i32 %7, %5
%9 = or i8 %1, %0
%10 = zext i8 %9 to i32
%11 = or i32 %8, %10
ret i32 %11
}
unsigned char inb(int port) {
  unsigned char value;
  asm volatile("in"
               "b"
               " %w1, %"
               "b"
               "0"
               : "=a"(value)
               : "Nd"(port));
  return value;
}


x86 assembly (clang, -O0):
<inb>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
in     (%dx),%al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inb>:
mov    %edi,%edx
in     (%dx),%al
ret

LLVM IR (-O0):
define zeroext i8 @inb(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8 asm sideeffect "inb ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i32 %4)
store i8 %5, i8* %3
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @inb(i32 %0) {
%2 = tail call i8 asm sideeffect "inb ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i32 %0)
ret i8 %2
}