xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ cs5536_setup_onchipuart1();
int /*<<< orphan*/ cs5536_setup_onchipuart2();
void cs5536_setup_onchipuart(int uart) {
  switch (uart) {
  case 1:
    cs5536_setup_onchipuart1();
    break;
  case 2:
    cs5536_setup_onchipuart2();
    break;
  }
}


x86 assembly (clang, -O0):
<cs5536_setup_onchipuart>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
sub    $0x1,%eax
je     1150 <cs5536_setup_onchipuart+0x30>
jmp    113f <cs5536_setup_onchipuart+0x1f>
mov    -0x8(%rbp),%eax
sub    $0x2,%eax
je     115c <cs5536_setup_onchipuart+0x3c>
jmp    1163 <cs5536_setup_onchipuart+0x43>
mov    $0x0,%al
call   1040 <cs5536_setup_onchipuart1@plt>
jmp    1163 <cs5536_setup_onchipuart+0x43>
mov    $0x0,%al
call   1030 <cs5536_setup_onchipuart2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cs5536_setup_onchipuart>:
cmp    $0x2,%edi
je     1131 <cs5536_setup_onchipuart+0x11>
cmp    $0x1,%edi
jne    1138 <cs5536_setup_onchipuart+0x18>
xor    %eax,%eax
jmp    1040 <cs5536_setup_onchipuart1@plt>
xor    %eax,%eax
jmp    1030 <cs5536_setup_onchipuart2@plt>
ret

LLVM IR (-O0):
define void @cs5536_setup_onchipuart(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
switch i32 %3, label %8 [
i32 1, label %4
i32 2, label %6
]
4: ; preds = %1
%5 = call i32 (...) @cs5536_setup_onchipuart1()
br label %8
6: ; preds = %1
%7 = call i32 (...) @cs5536_setup_onchipuart2()
br label %8
8: ; preds = %1, %6, %4
ret void
}

LLVM IR (-O2):
define void @cs5536_setup_onchipuart(i32 %0) {
switch i32 %0, label %6 [
i32 1, label %2
i32 2, label %4
]
2: ; preds = %1
%3 = tail call i32 (...) @cs5536_setup_onchipuart1()
br label %6
4: ; preds = %1
%5 = tail call i32 (...) @cs5536_setup_onchipuart2()
br label %6
6: ; preds = %1, %4, %2
ret void
}
void AsmCheckBounds() { return; }


x86 assembly (clang, -O0):
<AsmCheckBounds>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AsmCheckBounds>:
ret

LLVM IR (-O0):
define void @AsmCheckBounds() {
ret void
}

LLVM IR (-O2):
define void @AsmCheckBounds() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
int /*<<< orphan*/ scanf(char *, char *);
int rev() {
  char c;
  scanf("%c", &c);
  if (c != 10)
    rev();
  printf("%c", c);
}


x86 assembly (clang, -O0):
<rev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
lea    -0x5(%rbp),%rsi
call   1050 <scanf@plt>
movsbl -0x5(%rbp),%eax
cmp    $0xa,%eax
je     115a <rev+0x2a>
call   1030 <rev@plt>
lea    0xe9f(%rip),%rdi
movsbl -0x5(%rbp),%esi
call   1040 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rev>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0x7(%rsp),%rsi
call   1050 <scanf@plt>
mov    $0xa,%al
cmpb   $0xa,0x7(%rsp)
je     1154 <rev+0x24>
call   1030 <rev@plt>
mov    0x7(%rsp),%al
movsbl %al,%esi
lea    0xea2(%rip),%rdi
call   1040 <printf@plt>
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define i32 @rev() {
%1 = alloca i32
%2 = alloca i8
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = icmp ne i32 %5, 10
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i32 @rev()
br label %9
9: ; preds = %7, %0
%10 = load i8, i8* %2
%11 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %10)
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
define i32 @rev() {
%1 = alloca i8
%2 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %1)
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 10
br i1 %4, label %8, label %5
5: ; preds = %0
%6 = call i32 @rev()
%7 = load i8, i8* %1
br label %8
8: ; preds = %5, %0
%9 = phi i8 [ %7, %5 ], [ 10, %0 ]
%10 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %9)
ret i32 undef
}
/* Type definitions */
typedef int uint_fast16_t;

/* Variables and functions */
__attribute__((unused)) uint_fast16_t cop_ld_ube16(const void *buf) {
  const unsigned char *b = buf;
  return ((uint_fast16_t)b[1] << 0) | ((uint_fast16_t)b[0] << 8);
}


x86 assembly (clang, -O0):
<cop_ld_ube16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movzbl 0x1(%rax),%eax
shl    $0x0,%eax
mov    -0x10(%rbp),%rcx
movzbl (%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cop_ld_ube16>:
movzwl (%rdi),%eax
shl    $0x10,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @cop_ld_ube16(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = shl i32 %8, 0
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 0
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = shl i32 %13, 8
%15 = or i32 %9, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @cop_ld_ube16(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 1
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = load i8, i8* %0
%6 = zext i8 %5 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = or i32 %7, %4
ret i32 %8
}
/* Type definitions */
typedef int socklen_t;
typedef int /*<<< orphan*/ reuse;

/* Variables and functions */
int /*<<< orphan*/ SOL_SOCKET;
int /*<<< orphan*/ SO_REUSEADDR;
int setsockopt(int, int /*<<< orphan*/, int /*<<< orphan*/, int *, int);
int hi_set_reuseaddr(int sd) {
  int reuse;
  socklen_t len;
  reuse = 1;
  len = sizeof(reuse);
  return setsockopt(sd, SOL_SOCKET, SO_REUSEADDR, &reuse, len);
}


x86 assembly (clang, -O0):
<hi_set_reuseaddr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x4,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eb5(%rip),%rax
mov    (%rax),%esi
mov    0x2e9c(%rip),%rax
mov    (%rax),%edx
mov    -0xc(%rbp),%r8d
lea    -0x8(%rbp),%rcx
call   1030 <setsockopt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hi_set_reuseaddr>:
push   %rax
movl   $0x1,0x4(%rsp)
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
mov    0x2eaf(%rip),%rax
mov    (%rax),%edx
lea    0x4(%rsp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
pop    %rcx
ret

LLVM IR (-O0):
@SOL_SOCKET = global i32 0
@SO_REUSEADDR = global i32 0
define i32 @hi_set_reuseaddr(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
store i32 4, i32* %4
%5 = load i32, i32* %2
%6 = load i32, i32* @SOL_SOCKET
%7 = load i32, i32* @SO_REUSEADDR
%8 = load i32, i32* %4
%9 = call i32 @setsockopt(i32 %5, i32 %6, i32 %7, i32* %3, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
@SOL_SOCKET = global i32 0
@SO_REUSEADDR = global i32 0
define i32 @hi_set_reuseaddr(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 1, i32* %2
%4 = load i32, i32* @SOL_SOCKET
%5 = load i32, i32* @SO_REUSEADDR
%6 = call i32 @setsockopt(i32 %0, i32 %4, i32 %5, i32* %2, i32 4)
ret i32 %6
}
int main() {
  int a = 15975;
  int b = 12684;
  while (1) {
    a = a % b;
    if (a == 0)
      return b;
    b = b % a;
    if (b == 0)
      return a;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x3e67,-0x8(%rbp)
movl   $0x318c,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1138 <main+0x38>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115c <main+0x5c>
mov    -0xc(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1157 <main+0x57>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115c <main+0x5c>
jmp    1119 <main+0x19>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x318c,%esi
mov    $0x3e67,%ecx
nopw   0x0(%rax,%rax,1)
mov    %ecx,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1129 <main+0x29>
mov    %edx,%ecx
mov    %esi,%eax
cltd
idiv   %ecx
mov    %edx,%esi
test   %edx,%edx
jne    1110 <main+0x10>
mov    %ecx,%eax
ret
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 15975, i32* %2
store i32 12684, i32* %3
br label %4
4: ; preds = %0, %20
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = srem i32 %5, %6
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %4
%11 = load i32, i32* %3
store i32 %11, i32* %1
br label %21
12: ; preds = %4
%13 = load i32, i32* %3
%14 = load i32, i32* %2
%15 = srem i32 %13, %14
store i32 %15, i32* %3
%16 = load i32, i32* %3
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %20
18: ; preds = %12
%19 = load i32, i32* %2
store i32 %19, i32* %1
br label %21
20: ; preds = %12
br label %4
21: ; preds = %18, %10
%22 = load i32, i32* %1
ret i32 %22
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %6, %0
%2 = phi i32 [ 15975, %0 ], [ %4, %6 ]
%3 = phi i32 [ 12684, %0 ], [ %7, %6 ]
%4 = srem i32 %2, %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = srem i32 %3, %4
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %1
9: ; preds = %6, %1
%10 = phi i32 [ %3, %1 ], [ %4, %6 ]
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ uint;

/* Variables and functions */
int /*<<< orphan*/ test_cache(int /*<<< orphan*/);
int /*<<< orphan*/ test_euclid(int /*<<< orphan*/);
int /*<<< orphan*/ test_table(int /*<<< orphan*/);
void test_all(uint p) {
  test_euclid(p);
  test_table(p);
  test_cache(p);
}


x86 assembly (clang, -O0):
<test_all>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <test_euclid@plt>
mov    -0x4(%rbp),%edi
call   1040 <test_table@plt>
mov    -0x4(%rbp),%edi
call   1050 <test_cache@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_all>:
push   %rbx
mov    %edi,%ebx
call   1030 <test_euclid@plt>
mov    %ebx,%edi
call   1040 <test_table@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1050 <test_cache@plt>

LLVM IR (-O0):
define void @test_all(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @test_euclid(i32 %3)
%5 = load i32, i32* %2
%6 = call i32 @test_table(i32 %5)
%7 = load i32, i32* %2
%8 = call i32 @test_cache(i32 %7)
ret void
}

LLVM IR (-O2):
define void @test_all(i32 %0) {
%2 = tail call i32 @test_euclid(i32 %0)
%3 = tail call i32 @test_table(i32 %0)
%4 = tail call i32 @test_cache(i32 %0)
ret void
}
const char *consume_flags(const char *fmt) {
  while (1) {
    switch (*fmt) {
    case '#':
    case '0':
    case '-':
    case ' ':
    case '+':
    case '\'':
    case 'I':
      fmt++;
      continue;
    }
    return fmt;
  }
}


x86 assembly (clang, -O0):
<consume_flags>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    %eax,-0xc(%rbp)
sub    $0x20,%eax
je     1186 <consume_flags+0x86>
jmp    1120 <consume_flags+0x20>
mov    -0xc(%rbp),%eax
sub    $0x23,%eax
je     1186 <consume_flags+0x86>
jmp    1131 <consume_flags+0x31>
mov    -0xc(%rbp),%eax
sub    $0x27,%eax
je     1186 <consume_flags+0x86>
jmp    1142 <consume_flags+0x42>
mov    -0xc(%rbp),%eax
sub    $0x2b,%eax
je     1186 <consume_flags+0x86>
jmp    1153 <consume_flags+0x53>
mov    -0xc(%rbp),%eax
sub    $0x2d,%eax
je     1186 <consume_flags+0x86>
jmp    1164 <consume_flags+0x64>
mov    -0xc(%rbp),%eax
sub    $0x30,%eax
je     1186 <consume_flags+0x86>
jmp    1175 <consume_flags+0x75>
mov    -0xc(%rbp),%eax
sub    $0x49,%eax
jne    1197 <consume_flags+0x97>
jmp    1186 <consume_flags+0x86>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <consume_flags+0x8>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<consume_flags>:
mov    %rdi,%rax
movabs $0x20000012889,%rcx
nopl   (%rax)
movsbl (%rax),%edx
add    $0xffffffe0,%edx
cmp    $0x29,%edx
ja     1127 <consume_flags+0x27>
bt     %rdx,%rcx
jae    1127 <consume_flags+0x27>
add    $0x1,%rax
jmp    1110 <consume_flags+0x10>
ret

LLVM IR (-O0):
define i8* @consume_flags(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %1, %7
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
switch i32 %6, label %10 [
i32 35, label %7
i32 48, label %7
i32 45, label %7
i32 32, label %7
i32 43, label %7
i32 39, label %7
i32 73, label %7
]
7: ; preds = %3, %3, %3, %3, %3, %3, %3
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %2
br label %3
10: ; preds = %3
%11 = load i8*, i8** %2
ret i8* %11
}

LLVM IR (-O2):
define i8* @consume_flags(i8* %0) {
br label %2
2: ; preds = %1, %6
%3 = phi i8* [ %0, %1 ], [ %7, %6 ]
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %8 [
i32 35, label %6
i32 48, label %6
i32 45, label %6
i32 32, label %6
i32 43, label %6
i32 39, label %6
i32 73, label %6
]
6: ; preds = %2, %2, %2, %2, %2, %2, %2
%7 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
8: ; preds = %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ O_CLOEXEC;
int mkostemp(char *, int /*<<< orphan*/);
int /*<<< orphan*/ unlink(char *);
int createTmpfileCloexec(char *tmpname) {
  int fd;
  fd = mkostemp(tmpname, O_CLOEXEC);
  if (fd >= 0)
    unlink(tmpname);
  return fd;
}


x86 assembly (clang, -O0):
<createTmpfileCloexec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ea1(%rip),%rax
mov    (%rax),%esi
call   1040 <mkostemp@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jl     1154 <createTmpfileCloexec+0x34>
mov    -0x8(%rbp),%rdi
call   1030 <unlink@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<createTmpfileCloexec>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2eab(%rip),%rax
mov    (%rax),%esi
call   1040 <mkostemp@plt>
mov    %eax,%ebp
test   %eax,%eax
js     1142 <createTmpfileCloexec+0x22>
mov    %rbx,%rdi
call   1030 <unlink@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@O_CLOEXEC = global i32 0
define i32 @createTmpfileCloexec(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = load i32, i32* @O_CLOEXEC
%6 = call i32 @mkostemp(i8* %4, i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp sge i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i8*, i8** %2
%11 = call i32 @unlink(i8* %10)
br label %12
12: ; preds = %9, %1
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
@O_CLOEXEC = global i32 0
define i32 @createTmpfileCloexec(i8* %0) {
%2 = load i32, i32* @O_CLOEXEC
%3 = tail call i32 @mkostemp(i8* %0, i32 %2)
%4 = icmp sgt i32 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @unlink(i8* %0)
br label %7
7: ; preds = %5, %1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ pr_info(char *);
int hello_init(void) {
  pr_info("Hello world! This module is now loaded\n");
  return 0;
}


x86 assembly (clang, -O0):
<hello_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <pr_info@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hello_init>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <pr_info@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [40 x i8] c"Hello world! This module is now loaded\0A\00"
define i32 @hello_init() {
%1 = call i32 @pr_info(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [40 x i8] c"Hello world! This module is now loaded\0A\00"
define i32 @hello_init() {
%1 = tail call i32 @pr_info(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, char *);
int /*<<< orphan*/ studly(char *);
int main() {
  char enterWord[100];
  printf("Please enter your word: ");
  scanf("%s", enterWord);
  studly(enterWord);
  printf("%s\n", enterWord);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    -0x70(%rbp),%rsi
lea    0xec1(%rip),%rdi
call   1050 <scanf@plt>
lea    -0x70(%rbp),%rdi
call   1040 <studly@plt>
lea    -0x70(%rbp),%rsi
lea    0xeab(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x70,%rsp
lea    0xeb4(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xebf(%rip),%rdi
mov    %rsp,%rbx
mov    %rbx,%rsi
call   1060 <scanf@plt>
mov    %rbx,%rdi
call   1050 <studly@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"Please enter your word: \00"
@.str.1 = [3 x i8] c"%s\00"
@.str.2 = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [100 x i8]
store i32 0, i32* %1
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%4 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %4)
%6 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%7 = call i32 @studly(i8* %6)
%8 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i8* %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [25 x i8] c"Please enter your word: \00"
@.str.1 = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca [100 x i8]
%2 = getelementptr inbounds [100 x i8], [100 x i8]* %1, i64 0, i64 0
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %2)
%5 = call i32 @studly(i8* %2)
%6 = call i32 @puts(i8* %2)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ get_pin(int /*<<< orphan*/, int /*<<< orphan*/, int, int);
uint8_t read_pin(uint8_t address, uint8_t pin) {
  return get_pin(address, pin, 0x12, 0x13);
}


x86 assembly (clang, -O0):
<read_pin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x12,%edx
mov    $0x13,%ecx
call   1030 <get_pin@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_pin>:
mov    $0x12,%edx
mov    $0x13,%ecx
jmp    1030 <get_pin@plt>

LLVM IR (-O0):
define i32 @read_pin(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @get_pin(i32 %5, i32 %6, i32 18, i32 19)
ret i32 %7
}

LLVM IR (-O2):
define i32 @read_pin(i32 %0, i32 %1) {
%3 = tail call i32 @get_pin(i32 %0, i32 %1, i32 18, i32 19)
ret i32 %3
}
void _ZN5small9TestCycleEv(struct l_class_OC_small *llvm_cbe_this) {
  struct l_class_OC_small *llvm_cbe_this_2e_addr;
  unsigned int *llvm_cbe_a;
  unsigned int *llvm_cbe_b;
  unsigned int *llvm_cbe_c;
  struct l_class_OC_small *llvm_cbe_this1;
  unsigned int *llvm_cbe_tmp;
  *(&llvm_cbe_this_2e_addr) = llvm_cbe_this;
  llvm_cbe_this1 = *(&llvm_cbe_this_2e_addr);
  *(&llvm_cbe_b) = (((unsigned int *)(&llvm_cbe_a)));
  *(&llvm_cbe_c) = (((unsigned int *)(&llvm_cbe_b)));
  *(&llvm_cbe_a) = (((unsigned int *)(&llvm_cbe_c)));
  llvm_cbe_tmp = *(&llvm_cbe_a);
  *((&(*llvm_cbe_tmp))) = 0u;
  return;
}


x86 assembly (clang, -O0):
<_ZN5small9TestCycleEv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
lea    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
lea    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
lea    -0x28(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x38(%rbp),%rax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ZN5small9TestCycleEv>:
ret

LLVM IR (-O0):
%struct.l_class_OC_small = type opaque
define void @_ZN5small9TestCycleEv(%struct.l_class_OC_small* %0) {
%2 = alloca %struct.l_class_OC_small*
%3 = alloca %struct.l_class_OC_small*
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca %struct.l_class_OC_small*
%8 = alloca i32*
store %struct.l_class_OC_small* %0, %struct.l_class_OC_small** %2
%9 = load %struct.l_class_OC_small*, %struct.l_class_OC_small** %2
store %struct.l_class_OC_small* %9, %struct.l_class_OC_small** %3
%10 = load %struct.l_class_OC_small*, %struct.l_class_OC_small** %3
store %struct.l_class_OC_small* %10, %struct.l_class_OC_small** %7
%11 = bitcast i32** %4 to i32*
store i32* %11, i32** %5
%12 = bitcast i32** %5 to i32*
store i32* %12, i32** %6
%13 = bitcast i32** %6 to i32*
store i32* %13, i32** %4
%14 = load i32*, i32** %4
store i32* %14, i32** %8
%15 = load i32*, i32** %8
store i32 0, i32* %15
ret void
}

LLVM IR (-O2):
%struct.l_class_OC_small = type opaque
define void @_ZN5small9TestCycleEv(%struct.l_class_OC_small* nocapture %0) {
ret void
}
void dump_address(char *from, char *to) {}


x86 assembly (clang, -O0):
<dump_address>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dump_address>:
ret

LLVM IR (-O0):
define void @dump_address(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @dump_address(i8* nocapture %0, i8* nocapture %1) {
ret void
}
/* Type definitions */
typedef unsigned int uint8_t;
typedef unsigned int const uint32_t;

/* Variables and functions */
uint32_t le32toh_ptr(const uint8_t *p) {
  return p[0] | (p[1] << 8U) | (p[2] << 16U) | (p[3] << 24U);
}


x86 assembly (clang, -O0):
<le32toh_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x8(%rbp),%rcx
mov    0x4(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0xc(%rcx),%ecx
shl    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<le32toh_ptr>:
mov    0x4(%rdi),%ecx
mov    0x8(%rdi),%edx
shl    $0x8,%ecx
or     (%rdi),%ecx
shl    $0x10,%edx
mov    0xc(%rdi),%eax
shl    $0x18,%eax
or     %edx,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @le32toh_ptr(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = load i32*, i32** %2
%7 = getelementptr inbounds i32, i32* %6, i64 1
%8 = load i32, i32* %7
%9 = shl i32 %8, 8
%10 = or i32 %5, %9
%11 = load i32*, i32** %2
%12 = getelementptr inbounds i32, i32* %11, i64 2
%13 = load i32, i32* %12
%14 = shl i32 %13, 16
%15 = or i32 %10, %14
%16 = load i32*, i32** %2
%17 = getelementptr inbounds i32, i32* %16, i64 3
%18 = load i32, i32* %17
%19 = shl i32 %18, 24
%20 = or i32 %15, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @le32toh_ptr(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = load i32, i32* %3
%5 = shl i32 %4, 8
%6 = or i32 %5, %2
%7 = getelementptr inbounds i32, i32* %0, i64 2
%8 = load i32, i32* %7
%9 = shl i32 %8, 16
%10 = or i32 %6, %9
%11 = getelementptr inbounds i32, i32* %0, i64 3
%12 = load i32, i32* %11
%13 = shl i32 %12, 24
%14 = or i32 %10, %13
ret i32 %14
}
/* Type definitions */
typedef scalar_t__ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ gmtime_r(scalar_t__ *, struct tm *);
int /*<<< orphan*/ perror(char *);
scalar_t__ time(scalar_t__ *);
int fetch_time(struct tm *t) {
  time_t tt;
  if (time(&tt) == ((time_t)-1)) {
    perror("time failed");
    return 1;
  }
  gmtime_r(&tt, t);
  return 0;
}


x86 assembly (clang, -O0):
<fetch_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
lea    -0x18(%rbp),%rdi
call   1040 <time@plt>
cmp    $0xffffffffffffffff,%rax
jne    1167 <fetch_time+0x37>
lea    0xeaa(%rip),%rdi
call   1050 <perror@plt>
movl   $0x1,-0x4(%rbp)
jmp    117b <fetch_time+0x4b>
mov    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdi
call   1030 <gmtime_r@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fetch_time>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0x8(%rsp),%rdi
call   1040 <time@plt>
cmp    $0xffffffffffffffff,%rax
je     115d <fetch_time+0x2d>
lea    0x8(%rsp),%rdi
mov    %rbx,%rsi
call   1030 <gmtime_r@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret
lea    0xe9c(%rip),%rdi
call   1050 <perror@plt>
mov    $0x1,%eax
jmp    1157 <fetch_time+0x27>

LLVM IR (-O0):
%struct.tm = type { i32 }
@.str = [12 x i8] c"time failed\00"
define i32 @fetch_time(%struct.tm* %0) {
%2 = alloca i32
%3 = alloca %struct.tm*
%4 = alloca i64
store %struct.tm* %0, %struct.tm** %3
%5 = call i64 @time(i64* %4)
%6 = icmp eq i64 %5, -1
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @perror(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
store i32 1, i32* %2
br label %12
9: ; preds = %1
%10 = load %struct.tm*, %struct.tm** %3
%11 = call i32 @gmtime_r(i64* %4, %struct.tm* %10)
store i32 0, i32* %2
br label %12
12: ; preds = %9, %7
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
%struct.tm = type { i32 }
@.str = [12 x i8] c"time failed\00"
define i32 @fetch_time(%struct.tm* %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = call i64 @time(i64* %2)
%5 = icmp eq i64 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @perror(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %10
8: ; preds = %1
%9 = call i32 @gmtime_r(i64* %2, %struct.tm* %0)
br label %10
10: ; preds = %8, %6
%11 = phi i32 [ 1, %6 ], [ 0, %8 ]
ret i32 %11
}
/* Variables and functions */
unsigned long jzrtc_readl(int);
int /*<<< orphan*/ jzrtc_writel(int, unsigned int);
int rtc_set_alarm(unsigned long alarm_seconds) {
  unsigned int temp;
  jzrtc_writel((0x08), jzrtc_readl((0x04)) + alarm_seconds);
  temp = jzrtc_readl((0x00));
  temp &= ~(1 << (4));
  temp |= (1 << (3)) | (1 << (2));
  jzrtc_writel((0x00), temp);
  return 0;
}


x86 assembly (clang, -O0):
<rtc_set_alarm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x4,%edi
call   1030 <jzrtc_readl@plt>
add    -0x8(%rbp),%rax
mov    %eax,%esi
mov    $0x8,%edi
call   1040 <jzrtc_writel@plt>
xor    %edi,%edi
call   1030 <jzrtc_readl@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xffffffef,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
or     $0xc,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
xor    %edi,%edi
call   1040 <jzrtc_writel@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtc_set_alarm>:
push   %rbx
mov    %rdi,%rbx
mov    $0x4,%edi
call   1030 <jzrtc_readl@plt>
add    %eax,%ebx
mov    $0x8,%edi
mov    %ebx,%esi
call   1040 <jzrtc_writel@plt>
xor    %edi,%edi
call   1030 <jzrtc_readl@plt>
and    $0xffffffe3,%eax
lea    0xc(%rax),%esi
xor    %edi,%edi
call   1040 <jzrtc_writel@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @rtc_set_alarm(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
%4 = call i64 @jzrtc_readl(i32 4)
%5 = load i64, i64* %2
%6 = add i64 %4, %5
%7 = trunc i64 %6 to i32
%8 = call i32 @jzrtc_writel(i32 8, i32 %7)
%9 = call i64 @jzrtc_readl(i32 0)
%10 = trunc i64 %9 to i32
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = and i32 %11, -17
store i32 %12, i32* %3
%13 = load i32, i32* %3
%14 = or i32 %13, 12
store i32 %14, i32* %3
%15 = load i32, i32* %3
%16 = call i32 @jzrtc_writel(i32 0, i32 %15)
ret i32 0
}

LLVM IR (-O2):
define i32 @rtc_set_alarm(i64 %0) {
%2 = tail call i64 @jzrtc_readl(i32 4)
%3 = add i64 %2, %0
%4 = trunc i64 %3 to i32
%5 = tail call i32 @jzrtc_writel(i32 8, i32 %4)
%6 = tail call i64 @jzrtc_readl(i32 0)
%7 = trunc i64 %6 to i32
%8 = and i32 %7, -29
%9 = or i32 %8, 12
%10 = tail call i32 @jzrtc_writel(i32 0, i32 %9)
ret i32 0
}
unsigned xrop3_68_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = ~D;
  stk1 = S & stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_68_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_68_1_1>:
mov    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_68_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = xor i32 %22, -1
store i32 %23, i32* %9
%24 = load i32, i32* %6
%25 = load i32, i32* %9
%26 = and i32 %24, %25
store i32 %26, i32* %8
%27 = load i32, i32* %8
%28 = load i32, i32* %6
%29 = xor i32 %28, -1
%30 = and i32 %27, %29
%31 = load i32, i32* %7
%32 = xor i32 %31, -1
%33 = and i32 %30, %32
%34 = load i32, i32* %5
%35 = load i32, i32* %6
%36 = and i32 %34, %35
%37 = or i32 %33, %36
%38 = load i32, i32* %5
%39 = load i32, i32* %7
%40 = and i32 %38, %39
%41 = or i32 %37, %40
ret i32 %41
}

LLVM IR (-O2):
define i32 @xrop3_68_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = or i8 %1, %0
%4 = zext i8 %3 to i32
ret i32 %4
}
int foo(void) {
  static struct {
    int x;
    int y;
  } a;
  a.x = 0;
  return a.y;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,0x2f16(%rip)
mov    0x2f14(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.anon = type { i32, i32 }
@foo.a = internal global %struct.anon zeroinitializer
define i32 @foo() {
store i32 0, i32* getelementptr inbounds (%struct.anon, %struct.anon* @foo.a, i32 0, i32 0)
%1 = load i32, i32* getelementptr inbounds (%struct.anon, %struct.anon* @foo.a, i32 0, i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @foo() {
ret i32 0
}
/* Variables and functions */
long roundf(float);
long lroundf(float x) { return roundf(x); }


x86 assembly (clang, -O0):
<lroundf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <roundf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lroundf>:
jmp    1030 <roundf@plt>

LLVM IR (-O0):
define i64 @lroundf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i64 @roundf(float %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @lroundf(float %0) {
%2 = tail call i64 @roundf(float %0)
ret i64 %2
}
/* Variables and functions */
double fmod(double, double);
double faom(double t) {
  return fmod(450160.398036 +
                  t * (-6962890.5431 +
                       t * (7.4722 + t * (0.007702 + t * (-0.00005939)))),
              (1296000.0)) *
         (4.848136811095359935899141e-6);
}


x86 assembly (clang, -O0):
<faom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm2
movsd  -0x8(%rbp),%xmm3
movsd  0xeef(%rip),%xmm4
mulsd  %xmm4,%xmm3
movsd  0xeeb(%rip),%xmm4
addsd  %xmm4,%xmm3
mulsd  %xmm3,%xmm2
movsd  0xecb(%rip),%xmm3
addsd  %xmm3,%xmm2
mulsd  %xmm2,%xmm1
movsd  0xeb3(%rip),%xmm2
addsd  %xmm2,%xmm1
mulsd  %xmm1,%xmm0
movsd  0xe9b(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  0xe87(%rip),%xmm1
call   1030 <fmod@plt>
movsd  0xe72(%rip),%xmm1
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<faom>:
push   %rax
movsd  0xee7(%rip),%xmm1
mulsd  %xmm0,%xmm1
addsd  0xee3(%rip),%xmm1
mulsd  %xmm0,%xmm1
addsd  0xedf(%rip),%xmm1
mulsd  %xmm0,%xmm1
addsd  0xedb(%rip),%xmm1
mulsd  %xmm1,%xmm0
addsd  0xed7(%rip),%xmm0
movsd  0xed7(%rip),%xmm1
call   1030 <fmod@plt>
mulsd  0xed2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @faom(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = load double, double* %2
%6 = load double, double* %2
%7 = call double @llvm.fmuladd.f64(double %6, double -5.939000e-05, double 0x3F7F8C21E1D2178F)
%8 = call double @llvm.fmuladd.f64(double %5, double %7, double 7.472200e+00)
%9 = call double @llvm.fmuladd.f64(double %4, double %8, double 0xC15A8FB2A2C22681)
%10 = call double @llvm.fmuladd.f64(double %3, double %9, double 0x411B79C19796BFCB)
%11 = call double @fmod(double %10, double 1.296000e+06)
%12 = fmul double %11, 0x3ED455A5B2FF8F9D
ret double %12
}

LLVM IR (-O2):
define double @faom(double %0) {
%2 = tail call double @llvm.fmuladd.f64(double %0, double -5.939000e-05, double 0x3F7F8C21E1D2178F)
%3 = tail call double @llvm.fmuladd.f64(double %0, double %2, double 7.472200e+00)
%4 = tail call double @llvm.fmuladd.f64(double %0, double %3, double 0xC15A8FB2A2C22681)
%5 = tail call double @llvm.fmuladd.f64(double %0, double %4, double 0x411B79C19796BFCB)
%6 = tail call double @fmod(double %5, double 1.296000e+06)
%7 = fmul double %6, 0x3ED455A5B2FF8F9D
ret double %7
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ stderr;
void sighandler(int sig) {
  fprintf(stderr, "\nInterupped by signal %d\n", sig);
  exit(sig);
}


x86 assembly (clang, -O0):
<sighandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%edx
lea    0xec2(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<sighandler>:
push   %rbx
mov    %edi,%ebx
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
lea    0xecd(%rip),%rsi
mov    %ebx,%edx
call   1030 <fprintf@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [26 x i8] c"\0AInterupped by signal %d\0A\00"
define void @sighandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @stderr
%4 = load i32, i32* %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = load i32, i32* %2
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [26 x i8] c"\0AInterupped by signal %d\0A\00"
define void @sighandler(i32 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 %0)
%4 = tail call i32 @exit(i32 %0)
unreachable
}
simpcalc(int principal, float rate, int time) {
  int c;
  c = (principal * rate * time) / 2;
}


x86 assembly (clang, -O0):
<simpcalc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
cvtsi2ssl -0x8(%rbp),%xmm0
mulss  -0xc(%rbp),%xmm0
cvtsi2ssl -0x10(%rbp),%xmm1
mulss  %xmm1,%xmm0
movss  0xed6(%rip),%xmm1
divss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<simpcalc>:
ret

LLVM IR (-O0):
define i32 @simpcalc(i32 %0, float %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca float
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store float %1, float* %6
store i32 %2, i32* %7
%9 = load i32, i32* %5
%10 = sitofp i32 %9 to float
%11 = load float, float* %6
%12 = fmul float %10, %11
%13 = load i32, i32* %7
%14 = sitofp i32 %13 to float
%15 = fmul float %12, %14
%16 = fdiv float %15, 2.000000e+00
%17 = fptosi float %16 to i32
store i32 %17, i32* %8
%18 = load i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
define i32 @simpcalc(i32 %0, float %1, i32 %2) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ steer(int /*<<< orphan*/);
void steer_right() { steer(0); }


x86 assembly (clang, -O0):
<steer_right>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <steer@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<steer_right>:
xor    %edi,%edi
jmp    1030 <steer@plt>

LLVM IR (-O0):
define void @steer_right() {
%1 = call i32 @steer(i32 0)
ret void
}

LLVM IR (-O2):
define void @steer_right() {
%1 = tail call i32 @steer(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void check_val(int *val) {
  int count = 0;
  if ((*val > 2) && (*val < 7))
    count++;
  else if (*val == 10)
    count--;
  printf("Count %i\n", count);
}


x86 assembly (clang, -O0):
<check_val>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0x2,(%rax)
jle    114b <check_val+0x3b>
mov    -0x8(%rbp),%rax
cmpl   $0x7,(%rax)
jge    114b <check_val+0x3b>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1166 <check_val+0x56>
mov    -0x8(%rbp),%rax
cmpl   $0xa,(%rax)
jne    1161 <check_val+0x51>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    1166 <check_val+0x56>
mov    -0xc(%rbp),%esi
lea    0xe90(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_val>:
mov    (%rdi),%eax
lea    -0x3(%rax),%ecx
xor    %edx,%edx
cmp    $0xa,%eax
sete   %dl
neg    %edx
cmp    $0x4,%ecx
mov    $0x1,%esi
cmovae %edx,%esi
lea    0xecf(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"Count %i\0A\00"
define void @check_val(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
%6 = icmp sgt i32 %5, 2
br i1 %6, label %7, label %14
7: ; preds = %1
%8 = load i32*, i32** %2
%9 = load i32, i32* %8
%10 = icmp slt i32 %9, 7
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %22
14: ; preds = %7, %1
%15 = load i32*, i32** %2
%16 = load i32, i32* %15
%17 = icmp eq i32 %16, 10
br i1 %17, label %18, label %21
18: ; preds = %14
%19 = load i32, i32* %3
%20 = add nsw i32 %19, -1
store i32 %20, i32* %3
br label %21
21: ; preds = %18, %14
br label %22
22: ; preds = %21, %11
%23 = load i32, i32* %3
%24 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %23)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"Count %i\0A\00"
define void @check_val(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = add i32 %2, -3
%4 = icmp ult i32 %3, 4
%5 = icmp eq i32 %2, 10
%6 = sext i1 %5 to i32
%7 = select i1 %4, i32 1, i32 %6
%8 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}
int test_imm_48int8_mem(signed char *val) {
  return ((*val) & (0x48 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_48int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0x48,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_48int8_mem>:
testb  $0x48,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_48int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 72
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_48int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 72
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int do_516() { return 516; }


x86 assembly (clang, -O0):
<do_516>:
push   %rbp
mov    %rsp,%rbp
mov    $0x204,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_516>:
mov    $0x204,%eax
ret

LLVM IR (-O0):
define i32 @do_516() {
ret i32 516
}

LLVM IR (-O2):
define i32 @do_516() {
ret i32 516
}
int main() {
  int a, b;
  a = b + b + b + b + b + b + b + b + b + b + b + b + b + b + b + b + b + b +
      b + b + b;
  return a;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = load i32, i32* %3
%5 = load i32, i32* %3
%6 = add nsw i32 %4, %5
%7 = load i32, i32* %3
%8 = add nsw i32 %6, %7
%9 = load i32, i32* %3
%10 = add nsw i32 %8, %9
%11 = load i32, i32* %3
%12 = add nsw i32 %10, %11
%13 = load i32, i32* %3
%14 = add nsw i32 %12, %13
%15 = load i32, i32* %3
%16 = add nsw i32 %14, %15
%17 = load i32, i32* %3
%18 = add nsw i32 %16, %17
%19 = load i32, i32* %3
%20 = add nsw i32 %18, %19
%21 = load i32, i32* %3
%22 = add nsw i32 %20, %21
%23 = load i32, i32* %3
%24 = add nsw i32 %22, %23
%25 = load i32, i32* %3
%26 = add nsw i32 %24, %25
%27 = load i32, i32* %3
%28 = add nsw i32 %26, %27
%29 = load i32, i32* %3
%30 = add nsw i32 %28, %29
%31 = load i32, i32* %3
%32 = add nsw i32 %30, %31
%33 = load i32, i32* %3
%34 = add nsw i32 %32, %33
%35 = load i32, i32* %3
%36 = add nsw i32 %34, %35
%37 = load i32, i32* %3
%38 = add nsw i32 %36, %37
%39 = load i32, i32* %3
%40 = add nsw i32 %38, %39
%41 = load i32, i32* %3
%42 = add nsw i32 %40, %41
%43 = load i32, i32* %3
%44 = add nsw i32 %42, %43
store i32 %44, i32* %2
%45 = load i32, i32* %2
ret i32 %45
}

LLVM IR (-O2):
define i32 @main() {
ret i32 undef
}
void DisableSPI2() {}


x86 assembly (clang, -O0):
<DisableSPI2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DisableSPI2>:
ret

LLVM IR (-O0):
define void @DisableSPI2() {
ret void
}

LLVM IR (-O2):
define void @DisableSPI2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ outop2str(char *);
void outldmulreg() { outop2str("LDA"); }


x86 assembly (clang, -O0):
<outldmulreg>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <outop2str@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<outldmulreg>:
lea    0xee9(%rip),%rdi
jmp    1030 <outop2str@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"LDA\00"
define void @outldmulreg() {
%1 = call i32 @outop2str(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"LDA\00"
define void @outldmulreg() {
%1 = tail call i32 @outop2str(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}
__attribute__((pure)) char *getCommandLineArg(char *const __restrict optarg) {
  return optarg;
}


x86 assembly (clang, -O0):
<getCommandLineArg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getCommandLineArg>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @getCommandLineArg(i8* noalias %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @getCommandLineArg(i8* noalias readnone returned %0) {
ret i8* %0
}
int platformOverwrite(char *s, int resume) { return 1; }


x86 assembly (clang, -O0):
<platformOverwrite>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<platformOverwrite>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @platformOverwrite(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 1
}

LLVM IR (-O2):
define i32 @platformOverwrite(i8* nocapture readnone %0, i32 %1) {
ret i32 1
}
/* Variables and functions */
int partition(int *, int, int);
void quicksort(int A[], int p, int r) {
  if (p < r - 1) {
    int q = partition(A, p, r);
    quicksort(A, p, q);
    quicksort(A, q + 1, r);
  }
}


x86 assembly (clang, -O0):
<quicksort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x10(%rbp),%ecx
sub    $0x1,%ecx
cmp    %ecx,%eax
jge    1176 <quicksort+0x56>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1040 <quicksort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quicksort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quicksort>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %edx,%r14d
lea    -0x1(%r14),%r12d
cmp    %esi,%r12d
jle    1165 <quicksort+0x45>
mov    %esi,%ebx
mov    %rdi,%r15
nopl   0x0(%rax)
mov    %r15,%rdi
mov    %ebx,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebp
mov    %r15,%rdi
mov    %ebx,%esi
mov    %eax,%edx
call   1040 <quicksort@plt>
add    $0x1,%ebp
mov    %ebp,%ebx
cmp    %ebp,%r12d
jg     1140 <quicksort+0x20>
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quicksort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = sub nsw i32 %9, 1
%11 = icmp slt i32 %8, %10
br i1 %11, label %12, label %24
12: ; preds = %3
%13 = load i32*, i32** %4
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = call i32 @partition(i32* %13, i32 %14, i32 %15)
store i32 %16, i32* %7
%17 = load i32*, i32** %4
%18 = load i32, i32* %5
%19 = load i32, i32* %7
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %12, %3
ret void
}

LLVM IR (-O2):
define void @quicksort(i32* %0, i32 %1, i32 %2) {
%4 = add nsw i32 %2, -1
%5 = icmp sgt i32 %4, %1
br i1 %5, label %6, label %11
6: ; preds = %3, %6
%7 = phi i32 [ %9, %6 ], [ %1, %3 ]
%8 = tail call i32 @partition(i32* %0, i32 %7, i32 %2)
tail call void @quicksort(i32* %0, i32 %7, i32 %8)
%9 = add nsw i32 %8, 1
%10 = icmp sgt i32 %4, %9
br i1 %10, label %6, label %11
11: ; preds = %6, %3
ret void
}