xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int net_ring_common_module_inside_align_pow2(uint32_t num) {
  int offset = 0;
  uint32_t mark1, mark2;
  do {
    offset++;
    mark1 = (1 << offset);
    mark2 = (1 << (offset + 1));
  } while (num >= mark1);
  return (1 << offset);
}


x86 assembly (clang, -O0):
<net_ring_common_module_inside_align_pow2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    110e <net_ring_common_module_inside_align_pow2+0xe>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<net_ring_common_module_inside_align_pow2>:
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    0x1(%rcx),%edx
mov    $0x2,%eax
shl    %cl,%eax
mov    %edx,%ecx
cmp    %edi,%eax
jle    1110 <net_ring_common_module_inside_align_pow2+0x10>
ret

LLVM IR (-O0):
define i32 @net_ring_common_module_inside_align_pow2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %6
6: ; preds = %14, %1
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 1
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = shl i32 1, %9
store i32 %10, i32* %4
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
%13 = shl i32 1, %12
store i32 %13, i32* %5
br label %14
14: ; preds = %6
%15 = load i32, i32* %2
%16 = load i32, i32* %4
%17 = icmp sge i32 %15, %16
br i1 %17, label %6, label %18
18: ; preds = %14
%19 = load i32, i32* %3
%20 = shl i32 1, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @net_ring_common_module_inside_align_pow2(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %4, %2 ]
%4 = add nuw nsw i32 %3, 1
%5 = shl i32 2, %3
%6 = icmp sgt i32 %5, %0
br i1 %6, label %7, label %2
7: ; preds = %2
ret i32 %5
}
int mseq(void) {
  static int x = 0x55555555;
  int x0, x28;
  x >>= 1;
  if (x & 0x00000001)
    x0 = 1;
  else
    x0 = -1;
  if (x & 0x10000000)
    x28 = 1;
  else
    x28 = -1;
  if (x0 + x28)
    x &= 0x7fffffff;
  else
    x |= 0x80000000;
  return (x0);
}


x86 assembly (clang, -O0):
<mseq>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f16(%rip),%eax
sar    $0x1,%eax
mov    %eax,0x2f0d(%rip)
mov    0x2f07(%rip),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1131 <mseq+0x31>
movl   $0x1,-0x4(%rbp)
jmp    1138 <mseq+0x38>
movl   $0xffffffff,-0x4(%rbp)
mov    0x2ee2(%rip),%eax
and    $0x10000000,%eax
cmp    $0x0,%eax
je     1158 <mseq+0x58>
movl   $0x1,-0x8(%rbp)
jmp    115f <mseq+0x5f>
movl   $0xffffffff,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
cmp    $0x0,%eax
je     1184 <mseq+0x84>
mov    0x2eac(%rip),%eax
and    $0x7fffffff,%eax
mov    %eax,0x2ea1(%rip)
jmp    1195 <mseq+0x95>
mov    0x2e96(%rip),%eax
or     $0x80000000,%eax
mov    %eax,0x2e8b(%rip)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mseq>:
mov    0x2f1a(%rip),%ecx
mov    %ecx,%eax
and    $0x2,%eax
cmp    $0x1,%eax
sbb    %eax,%eax
or     $0x1,%eax
mov    %ecx,%edx
and    $0x20000000,%edx
neg    %edx
sbb    %edx,%edx
or     $0x1,%edx
xor    %esi,%esi
cmp    %edx,%eax
sete   %sil
shld   $0x1f,%ecx,%esi
mov    %esi,0x2eec(%rip)
ret

LLVM IR (-O0):
@mseq.x = internal global i32 1431655765
define i32 @mseq() {
%1 = alloca i32
%2 = alloca i32
%3 = load i32, i32* @mseq.x
%4 = ashr i32 %3, 1
store i32 %4, i32* @mseq.x
%5 = load i32, i32* @mseq.x
%6 = and i32 %5, 1
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %0
store i32 1, i32* %1
br label %10
9: ; preds = %0
store i32 -1, i32* %1
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* @mseq.x
%12 = and i32 %11, 268435456
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %10
store i32 1, i32* %2
br label %16
15: ; preds = %10
store i32 -1, i32* %2
br label %16
16: ; preds = %15, %14
%17 = load i32, i32* %1
%18 = load i32, i32* %2
%19 = add nsw i32 %17, %18
%20 = icmp ne i32 %19, 0
br i1 %20, label %21, label %24
21: ; preds = %16
%22 = load i32, i32* @mseq.x
%23 = and i32 %22, 2147483647
store i32 %23, i32* @mseq.x
br label %27
24: ; preds = %16
%25 = load i32, i32* @mseq.x
%26 = or i32 %25, -2147483648
store i32 %26, i32* @mseq.x
br label %27
27: ; preds = %24, %21
%28 = load i32, i32* %1
ret i32 %28
}

LLVM IR (-O2):
@mseq.x = internal unnamed_addr global i32 1431655765
define i32 @mseq() {
%1 = load i32, i32* @mseq.x
%2 = lshr i32 %1, 1
%3 = and i32 %1, 2
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -1, i32 1
%6 = and i32 %1, 536870912
%7 = icmp eq i32 %6, 0
%8 = select i1 %7, i32 1, i32 -1
%9 = icmp eq i32 %5, %8
%10 = select i1 %9, i32 -2147483648, i32 0
%11 = or i32 %10, %2
store i32 %11, i32* @mseq.x
ret i32 %5
}
/* Type definitions */
typedef scalar_t__ pid_t;

/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
scalar_t__ fork();
int main() {
  pid_t child_pid = fork();
  unsigned int i = 0;
  if (child_pid > 0) {
    while (1)
      while (--i)
        ;
  } else {
    exit(0);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <fork@plt>
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
jle    1172 <main+0x52>
jmp    1151 <main+0x31>
jmp    1156 <main+0x36>
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     116d <main+0x4d>
jmp    1156 <main+0x36>
jmp    1151 <main+0x31>
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <fork@plt>
test   %rax,%rax
jle    1132 <main+0x12>
nopl   (%rax)
jmp    1130 <main+0x10>
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i32
store i32 0, i32* %1
%4 = call i64 (...) @fork()
store i64 %4, i64* %2
store i32 0, i32* %3
%5 = load i64, i64* %2
%6 = icmp sgt i64 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %0
br label %8
8: ; preds = %7, %14
br label %9
9: ; preds = %13, %8
%10 = load i32, i32* %3
%11 = add i32 %10, -1
store i32 %11, i32* %3
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %9
br label %9
14: ; preds = %9
br label %8
15: ; preds = %0
%16 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 (...) @fork()
%2 = icmp sgt i64 %1, 0
br i1 %2, label %3, label %4
3: ; preds = %0, %3
br label %3
4: ; preds = %0
%5 = tail call i32 @exit(i32 0)
unreachable
}
int test_imm_29int64_highword_reg(long long val) {
  return ((val >> 32) & (0x29 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_29int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0x29,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_29int64_highword_reg>:
movabs $0x2900000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_29int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 41
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_29int64_highword_reg(i64 %0) {
%2 = and i64 %0, 176093659136
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
scalar_t__ RAND_MAX;
int rand_r(unsigned int *seed) {
  *seed = *seed * 1103515245 + 12345;
  return (*seed % ((unsigned int)RAND_MAX + 1));
}


x86 assembly (clang, -O0):
<rand_r>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
imul   $0x41c64e6d,(%rax),%ecx
add    $0x3039,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    0x2ebd(%rip),%rcx
mov    (%rcx),%rcx
add    $0x1,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_r>:
imul   $0x41c64e6d,(%rdi),%eax
add    $0x3039,%eax
mov    %eax,(%rdi)
mov    0x2ed4(%rip),%rcx
mov    (%rcx),%ecx
add    $0x1,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%eax
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define i32 @rand_r(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = mul i32 %4, 1103515245
%6 = add i32 %5, 12345
%7 = load i32*, i32** %2
store i32 %6, i32* %7
%8 = load i32*, i32** %2
%9 = load i32, i32* %8
%10 = load i64, i64* @RAND_MAX
%11 = trunc i64 %10 to i32
%12 = add i32 %11, 1
%13 = urem i32 %9, %12
ret i32 %13
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define i32 @rand_r(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = mul i32 %2, 1103515245
%4 = add i32 %3, 12345
store i32 %4, i32* %0
%5 = load i64, i64* @RAND_MAX
%6 = trunc i64 %5 to i32
%7 = add i32 %6, 1
%8 = urem i32 %4, %7
ret i32 %8
}
void notify_and_cleanup() {}


x86 assembly (clang, -O0):
<notify_and_cleanup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<notify_and_cleanup>:
ret

LLVM IR (-O0):
define void @notify_and_cleanup() {
ret void
}

LLVM IR (-O2):
define void @notify_and_cleanup() {
ret void
}
unsigned int _check_times(unsigned x, unsigned y) {
  unsigned long long whole_ans =
      ((unsigned long long)x) * ((unsigned long long)y);
  unsigned word_ans = (unsigned)whole_ans;
  if (word_ans < whole_ans || word_ans > (1 << 28))
    (_throw_badalloc_fn("/scratch/repos/new/home/jordi_armengol_estape/"
                        "c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/"
                        "cyclone/refs/heads/master/bin/genfiles/cifc.c",
                        284));
  return word_ans;
}


x86 assembly (clang, -O0):
<_check_times>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%rax
jb     114d <_check_times+0x3d>
cmpl   $0x10000000,-0x14(%rbp)
jbe    1160 <_check_times+0x50>
lea    0xeac(%rip),%rdi
mov    $0x11c,%esi
mov    $0x0,%al
call   1030 <_throw_badalloc_fn@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_check_times>:
push   %rbx
mov    %edi,%eax
mul    %esi
mov    %eax,%ebx
jo     1121 <_check_times+0x11>
cmp    $0x10000001,%ebx
jb     1134 <_check_times+0x24>
lea    0xed8(%rip),%rdi
mov    $0x11c,%esi
xor    %eax,%eax
call   1030 <_throw_badalloc_fn@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [145 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/cifc.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = zext i32 %7 to i64
%9 = load i32, i32* %4
%10 = zext i32 %9 to i64
%11 = mul i64 %8, %10
store i64 %11, i64* %5
%12 = load i64, i64* %5
%13 = trunc i64 %12 to i32
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = zext i32 %14 to i64
%16 = load i64, i64* %5
%17 = icmp ult i64 %15, %16
br i1 %17, label %21, label %18
18: ; preds = %2
%19 = load i32, i32* %6
%20 = icmp ugt i32 %19, 268435456
br i1 %20, label %21, label %23
21: ; preds = %18, %2
%22 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([145 x i8], [145 x i8]* @.str, i64 0, i64 0), i32 284)
br label %23
23: ; preds = %21, %18
%24 = load i32, i32* %6
ret i32 %24
}

LLVM IR (-O2):
@.str = [145 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/cifc.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %0, i32 %1)
%4 = extractvalue { i32, i1 } %3, 0
%5 = extractvalue { i32, i1 } %3, 1
%6 = icmp ugt i32 %4, 268435456
%7 = or i1 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([145 x i8], [145 x i8]* @.str, i64 0, i64 0), i32 284)
br label %10
10: ; preds = %2, %8
ret i32 %4
}
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_REALTIME;
int /*<<< orphan*/ clock_gettime(int /*<<< orphan*/, struct timespec *);
int main(int argc, char **argv) {
  struct timespec ts;
  clock_gettime(CLOCK_REALTIME, &ts);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
lea    -0x18(%rbp),%rsi
call   1030 <clock_gettime@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
call   1030 <clock_gettime@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
@CLOCK_REALTIME = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca %struct.timespec
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i32, i32* @CLOCK_REALTIME
%8 = call i32 @clock_gettime(i32 %7, %struct.timespec* %6)
ret i32 0
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@CLOCK_REALTIME = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca %struct.timespec
%4 = bitcast %struct.timespec* %3 to i8*
%5 = load i32, i32* @CLOCK_REALTIME
%6 = call i32 @clock_gettime(i32 %5, %struct.timespec* %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ AT_FDCWD;
int renameatx_np(int /*<<< orphan*/, char const *, int /*<<< orphan*/,
                 char const *, unsigned int);
int renamex_np(const char *old, const char *new, unsigned int flags) {
  return renameatx_np(AT_FDCWD, old, AT_FDCWD, new, flags);
}


x86 assembly (clang, -O0):
<renamex_np>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    0x2ea1(%rip),%rax
mov    (%rax),%edx
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%r8d
call   1030 <renameatx_np@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<renamex_np>:
mov    %edx,%r8d
mov    %rsi,%rcx
mov    %rdi,%rsi
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
mov    %edi,%edx
jmp    1030 <renameatx_np@plt>

LLVM IR (-O0):
@AT_FDCWD = global i32 0
define i32 @renamex_np(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* @AT_FDCWD
%8 = load i8*, i8** %4
%9 = load i32, i32* @AT_FDCWD
%10 = load i8*, i8** %5
%11 = load i32, i32* %6
%12 = call i32 @renameatx_np(i32 %7, i8* %8, i32 %9, i8* %10, i32 %11)
ret i32 %12
}

LLVM IR (-O2):
@AT_FDCWD = global i32 0
define i32 @renamex_np(i8* %0, i8* %1, i32 %2) {
%4 = load i32, i32* @AT_FDCWD
%5 = tail call i32 @renameatx_np(i32 %4, i8* %0, i32 %4, i8* %1, i32 %2)
ret i32 %5
}
int height(int n) {
  int h = 0;
  while ((n & 1) == 0) {
    h++;
    n = n >> 1;
  }
  return h;
}


x86 assembly (clang, -O0):
<height>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
jne    1134 <height+0x34>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <height+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<height>:
xor    %eax,%eax
test   $0x1,%dil
jne    111d <height+0x1d>
xor    %eax,%eax
mov    %edi,%ecx
nopl   0x0(%rax)
add    $0x1,%eax
sar    %ecx
test   $0x2,%dil
mov    %ecx,%edi
je     1110 <height+0x10>
ret

LLVM IR (-O0):
define i32 @height(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %2
%6 = and i32 %5, 1
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
%11 = load i32, i32* %2
%12 = ashr i32 %11, 1
store i32 %12, i32* %2
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @height(i32 %0) {
%2 = and i32 %0, 1
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = phi i32 [ %8, %4 ], [ %0, %1 ]
%7 = add nuw nsw i32 %5, 1
%8 = ashr i32 %6, 1
%9 = and i32 %6, 2
%10 = icmp eq i32 %9, 0
br i1 %10, label %4, label %11
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ bool_t;
typedef int /*<<< orphan*/ XDR;

/* Variables and functions */
int /*<<< orphan*/ FALSE;
int /*<<< orphan*/ TRUE;
int /*<<< orphan*/ xdr_int(int /*<<< orphan*/ *, int *);
bool_t xdr_char(XDR *xdrs, char *cp) {
  int i;
  i = (*cp);
  if (!xdr_int(xdrs, &i)) {
    return (FALSE);
  }
  *cp = i;
  return (TRUE);
}


x86 assembly (clang, -O0):
<xdr_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x1c(%rbp),%rsi
call   1030 <xdr_int@plt>
cmp    $0x0,%eax
jne    1151 <xdr_char+0x41>
mov    0x2e91(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    1168 <xdr_char+0x58>
mov    -0x1c(%rbp),%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    0x2e85(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xdr_char>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
movsbl (%rsi),%eax
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rsi
call   1030 <xdr_int@plt>
test   %eax,%eax
je     113c <xdr_char+0x2c>
mov    0xc(%rsp),%al
mov    %al,(%rbx)
mov    0x2eae(%rip),%rax
jmp    1143 <xdr_char+0x33>
mov    0x2e95(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@FALSE = global i32 0
@TRUE = global i32 0
define i32 @xdr_char(i32* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %5
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
store i32 %9, i32* %6
%10 = load i32*, i32** %4
%11 = call i32 @xdr_int(i32* %10, i32* %6)
%12 = icmp ne i32 %11, 0
br i1 %12, label %15, label %13
13: ; preds = %2
%14 = load i32, i32* @FALSE
store i32 %14, i32* %3
br label %20
15: ; preds = %2
%16 = load i32, i32* %6
%17 = trunc i32 %16 to i8
%18 = load i8*, i8** %5
store i8 %17, i8* %18
%19 = load i32, i32* @TRUE
store i32 %19, i32* %3
br label %20
20: ; preds = %15, %13
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
@FALSE = global i32 0
@TRUE = global i32 0
define i32 @xdr_char(i32* %0, i8* nocapture %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = load i8, i8* %1
%6 = sext i8 %5 to i32
store i32 %6, i32* %3
%7 = call i32 @xdr_int(i32* %0, i32* %3)
%8 = icmp eq i32 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %2
%10 = load i32, i32* %3
%11 = trunc i32 %10 to i8
store i8 %11, i8* %1
br label %12
12: ; preds = %2, %9
%13 = phi i32* [ @TRUE, %9 ], [ @FALSE, %2 ]
%14 = load i32, i32* %13
ret i32 %14
}
/* Type definitions */
typedef scalar_t__ int64_t;

/* Variables and functions */
double bson_int64_to_double(int64_t i64) { return (double)i64; }


x86 assembly (clang, -O0):
<bson_int64_to_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cvtsi2sdq -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<bson_int64_to_double>:
cvtsi2sd %rdi,%xmm0
ret

LLVM IR (-O0):
define double @bson_int64_to_double(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sitofp i64 %3 to double
ret double %4
}

LLVM IR (-O2):
define double @bson_int64_to_double(i64 %0) {
%2 = sitofp i64 %0 to double
ret double %2
}
void CFGMR3QueryU16(void) {}


x86 assembly (clang, -O0):
<CFGMR3QueryU16>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CFGMR3QueryU16>:
ret

LLVM IR (-O0):
define void @CFGMR3QueryU16() {
ret void
}

LLVM IR (-O2):
define void @CFGMR3QueryU16() {
ret void
}
void cdroff(ifilcd) int *ifilcd;
{ cdrofs(ifilcd); }


x86 assembly (clang, -O0):
<cdroff>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <cdrofs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cdroff>:
xor    %eax,%eax
jmp    1030 <cdrofs@plt>

LLVM IR (-O0):
define void @cdroff(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 (i32*, ...) bitcast (i32 (...)* @cdrofs to i32 (i32*, ...)*)(i32* %3)
ret void
}

LLVM IR (-O2):
define void @cdroff(i32* %0) {
%2 = tail call i32 (i32*, ...) bitcast (i32 (...)* @cdrofs to i32 (i32*, ...)*)(i32* %0)
ret void
}
void shift_right_zero_Bad(int x) {
  int arr[1];
  arr[1 + (0 >> x)] = 1;
}


x86 assembly (clang, -O0):
<shift_right_zero_Bad>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
xor    %eax,%eax
sar    %cl,%eax
add    $0x1,%eax
cltq
movl   $0x1,-0x8(%rbp,%rax,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<shift_right_zero_Bad>:
ret

LLVM IR (-O0):
define void @shift_right_zero_Bad(i32 %0) {
%2 = alloca i32
%3 = alloca [1 x i32]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = ashr i32 0, %4
%6 = add nsw i32 1, %5
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds [1 x i32], [1 x i32]* %3, i64 0, i64 %7
store i32 1, i32* %8
ret void
}

LLVM IR (-O2):
define void @shift_right_zero_Bad(i32 %0) {
ret void
}
void foo446() {}


x86 assembly (clang, -O0):
<foo446>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo446>:
ret

LLVM IR (-O0):
define void @foo446() {
ret void
}

LLVM IR (-O2):
define void @foo446() {
ret void
}
/* Type definitions */
typedef int pid_t;

/* Variables and functions */
scalar_t__ EINTR;
scalar_t__ errno;
int wait(int *);
pid_t r_wait(int *stat_loc) {
  int retval;
  while (((retval = wait(stat_loc)) == -1) && (errno == EINTR))
    ;
  return retval;
}


x86 assembly (clang, -O0):
<r_wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <wait@plt>
mov    %eax,%ecx
mov    %ecx,-0xc(%rbp)
xor    %eax,%eax
cmp    $0xffffffff,%ecx
mov    %al,-0xd(%rbp)
jne    1152 <r_wait+0x42>
mov    0x2ea1(%rip),%rax
mov    (%rax),%rax
mov    0x2e8f(%rip),%rcx
cmp    (%rcx),%rax
sete   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1162 <r_wait+0x52>
jmp    1167 <r_wait+0x57>
jmp    111c <r_wait+0xc>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<r_wait>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%rbx
mov    0x2ec1(%rip),%r14
mov    0x2eb2(%rip),%r15
cs nopw 0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <wait@plt>
cmp    $0xffffffff,%eax
jne    1145 <r_wait+0x35>
mov    (%r15),%rcx
cmp    %rcx,(%r14)
je     1130 <r_wait+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@errno = global i64 0
@EINTR = global i64 0
define i32 @r_wait(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
br label %4
4: ; preds = %14, %1
%5 = load i32*, i32** %2
%6 = call i32 @wait(i32* %5)
store i32 %6, i32* %3
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %12
8: ; preds = %4
%9 = load i64, i64* @errno
%10 = load i64, i64* @EINTR
%11 = icmp eq i64 %9, %10
br label %12
12: ; preds = %8, %4
%13 = phi i1 [ false, %4 ], [ %11, %8 ]
br i1 %13, label %14, label %15
14: ; preds = %12
br label %4
15: ; preds = %12
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
@errno = global i64 0
@EINTR = global i64 0
define i32 @r_wait(i32* %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 @wait(i32* %0)
%4 = icmp eq i32 %3, -1
%5 = load i64, i64* @errno
%6 = load i64, i64* @EINTR
%7 = icmp eq i64 %5, %6
%8 = select i1 %4, i1 %7, i1 false
br i1 %8, label %2, label %9
9: ; preds = %2
ret i32 %3
}
/* Variables and functions */
int isPalindrome(char *);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, char *);
int main() {
  char input[500];
  scanf("%[^\n]s", input);
  printf("%d", isPalindrome(input));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x200,%rsp
lea    -0x200(%rbp),%rsi
lea    0xeb7(%rip),%rdi
call   1050 <scanf@plt>
lea    -0x200(%rbp),%rdi
call   1040 <isPalindrome@plt>
mov    %eax,%esi
lea    0xea4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x200,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x200,%rsp
lea    0xec1(%rip),%rdi
mov    %rsp,%rbx
mov    %rbx,%rsi
call   1050 <scanf@plt>
mov    %rbx,%rdi
call   1040 <isPalindrome@plt>
lea    0xeae(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x200,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%[^\0A]s\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca [500 x i8]
%2 = getelementptr inbounds [500 x i8], [500 x i8]* %1, i64 0, i64 0
%3 = call i32 @scanf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = getelementptr inbounds [500 x i8], [500 x i8]* %1, i64 0, i64 0
%5 = call i32 @isPalindrome(i8* %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%[^\0A]s\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca [500 x i8]
%2 = getelementptr inbounds [500 x i8], [500 x i8]* %1, i64 0, i64 0
%3 = call i32 @scanf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = call i32 @isPalindrome(i8* %2)
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret i32 0
}
void X509_PURPOSE_get_by_id(void) {}


x86 assembly (clang, -O0):
<X509_PURPOSE_get_by_id>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_PURPOSE_get_by_id>:
ret

LLVM IR (-O0):
define void @X509_PURPOSE_get_by_id() {
ret void
}

LLVM IR (-O2):
define void @X509_PURPOSE_get_by_id() {
ret void
}
void BSP_GPIO_SetPinLow(unsigned int port, unsigned int pin) {
  unsigned int temp = (unsigned int)(volatile unsigned int *)0x56000004;
  volatile unsigned int *dataReg;
  unsigned int mask = 0x00000001;
  port = port << 4;
  dataReg = (volatile unsigned int *)(temp | port);
  mask = mask << pin;
  mask = !mask;
  *dataReg = *dataReg & mask;
}


x86 assembly (clang, -O0):
<BSP_GPIO_SetPinLow>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x56000004,%eax
mov    %eax,-0xc(%rbp)
movl   $0x1,-0x1c(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x4,%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
or     -0x4(%rbp),%eax
mov    %eax,%eax
mov    %rax,-0x18(%rbp)
mov    -0x1c(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
and    -0x1c(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<BSP_GPIO_SetPinLow>:
shl    $0x4,%edi
or     $0x56000004,%rdi
mov    (%rdi),%eax
movl   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @BSP_GPIO_SetPinLow(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 ptrtoint (i32* inttoptr (i64 1442840580 to i32*) to i32), i32* %5
store i32 1, i32* %7
%8 = load i32, i32* %3
%9 = shl i32 %8, 4
store i32 %9, i32* %3
%10 = load i32, i32* %5
%11 = load i32, i32* %3
%12 = or i32 %10, %11
%13 = zext i32 %12 to i64
%14 = inttoptr i64 %13 to i32*
store i32* %14, i32** %6
%15 = load i32, i32* %7
%16 = load i32, i32* %4
%17 = shl i32 %15, %16
store i32 %17, i32* %7
%18 = load i32, i32* %7
%19 = icmp ne i32 %18, 0
%20 = xor i1 %19, true
%21 = zext i1 %20 to i32
store i32 %21, i32* %7
%22 = load i32*, i32** %6
%23 = load volatile i32, i32* %22
%24 = load i32, i32* %7
%25 = and i32 %23, %24
%26 = load i32*, i32** %6
store volatile i32 %25, i32* %26
ret void
}

LLVM IR (-O2):
define void @BSP_GPIO_SetPinLow(i32 %0, i32 %1) {
%3 = shl i32 %0, 4
%4 = or i32 %3, 1442840580
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
store volatile i32 0, i32* %6
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
int main() {
  while (1) {
    int *ptr = (int *)malloc(sizeof(int));
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
jmp    111f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x4,%edi
call   1030 <malloc@plt>
jmp    1120 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32 0, i32* %1
br label %3
3: ; preds = %0, %3
%4 = call i64 @malloc(i32 4)
%5 = inttoptr i64 %4 to i32*
store i32* %5, i32** %2
br label %3
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = tail call i64 @malloc(i32 4)
br label %1
}
int main() {
  struct {
    short x, *r;
  } s1, s2;
  s1.x = 10;
  s1.r = &s1.x;
  for (int i = 0; i < sizeof(s1); i++)
    ((unsigned char *)&s2)[i] = ((unsigned char *)&s1)[i];
  return *s2.r;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movw   $0xa,-0x18(%rbp)
lea    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x2c(%rbp)
movslq -0x2c(%rbp),%rax
cmp    $0x10,%rax
jae    114c <main+0x4c>
movslq -0x2c(%rbp),%rax
mov    -0x18(%rbp,%rax,1),%cl
movslq -0x2c(%rbp),%rax
mov    %cl,-0x28(%rbp,%rax,1)
mov    -0x2c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x2c(%rbp)
jmp    1120 <main+0x20>
mov    -0x20(%rbp),%rax
movswl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0xa,%eax
ret

LLVM IR (-O0):
%struct.anon = type { i16, i16* }
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.anon
%3 = alloca %struct.anon
%4 = alloca i32
store i32 0, i32* %1
%5 = getelementptr inbounds %struct.anon, %struct.anon* %2, i32 0, i32 0
store i16 10, i16* %5
%6 = getelementptr inbounds %struct.anon, %struct.anon* %2, i32 0, i32 0
%7 = getelementptr inbounds %struct.anon, %struct.anon* %2, i32 0, i32 1
store i16* %6, i16** %7
store i32 0, i32* %4
br label %8
8: ; preds = %22, %0
%9 = load i32, i32* %4
%10 = sext i32 %9 to i64
%11 = icmp ult i64 %10, 16
br i1 %11, label %12, label %25
12: ; preds = %8
%13 = bitcast %struct.anon* %2 to i8*
%14 = load i32, i32* %4
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = bitcast %struct.anon* %3 to i8*
%19 = load i32, i32* %4
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
store i8 %17, i8* %21
br label %22
22: ; preds = %12
%23 = load i32, i32* %4
%24 = add nsw i32 %23, 1
store i32 %24, i32* %4
br label %8
25: ; preds = %8
%26 = getelementptr inbounds %struct.anon, %struct.anon* %3, i32 0, i32 1
%27 = load i16*, i16** %26
%28 = load i16, i16* %27
%29 = sext i16 %28 to i32
ret i32 %29
}

LLVM IR (-O2):
%struct.anon = type { i16, i16* }
define i32 @main() {
ret i32 10
}
int fun210() { return 210; }


x86 assembly (clang, -O0):
<fun210>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun210>:
mov    $0xd2,%eax
ret

LLVM IR (-O0):
define i32 @fun210() {
ret i32 210
}

LLVM IR (-O2):
define i32 @fun210() {
ret i32 210
}
/* Variables and functions */
int /*<<< orphan*/ vh_log(char *, int);
void vh_logOutput(char *message) { vh_log(message, 1); }


x86 assembly (clang, -O0):
<vh_logOutput>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <vh_log@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vh_logOutput>:
mov    $0x1,%esi
jmp    1030 <vh_log@plt>

LLVM IR (-O0):
define void @vh_logOutput(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @vh_log(i8* %3, i32 1)
ret void
}

LLVM IR (-O2):
define void @vh_logOutput(i8* %0) {
%2 = tail call i32 @vh_log(i8* %0, i32 1)
ret void
}
void TurnLeft(float degrees) {}


x86 assembly (clang, -O0):
<TurnLeft>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TurnLeft>:
ret

LLVM IR (-O0):
define void @TurnLeft(float %0) {
%2 = alloca float
store float %0, float* %2
ret void
}

LLVM IR (-O2):
define void @TurnLeft(float %0) {
ret void
}
void writeChar(char **pptr, char c) {
  **pptr = c;
  (*pptr)++;
}


x86 assembly (clang, -O0):
<writeChar>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<writeChar>:
mov    (%rdi),%rax
mov    %sil,(%rax)
addq   $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @writeChar(i8** %0, i8 signext %1) {
%3 = alloca i8**
%4 = alloca i8
store i8** %0, i8*** %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %6
store i8 %5, i8* %7
%8 = load i8**, i8*** %3
%9 = load i8*, i8** %8
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %8
ret void
}

LLVM IR (-O2):
define void @writeChar(i8** nocapture %0, i8 signext %1) {
%3 = load i8*, i8** %0
store i8 %1, i8* %3
%4 = load i8*, i8** %0
%5 = getelementptr inbounds i8, i8* %4, i64 1
store i8* %5, i8** %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char const *);
int printf(const char *fmt, ...) { puts(fmt); }


x86 assembly (clang, -O0):
<printf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <puts@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printf>:
jmp    1030 <puts@plt>

LLVM IR (-O0):
define i32 @printf(i8* %0, ...) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @puts(i8* %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @printf(i8* nocapture %0, ...) {
%2 = tail call i32 @puts(i8* dereferenceable(1) %0)
ret i32 undef
}
unsigned long get_mult_time(char c) {
  switch (c) {
  case 'm':
  case 'M':
    return 60;
  case 'h':
  case 'H':
    return 60 * 60;
  case 'd':
  case 'D':
    return 24 * 60 * 60;
  default:
    return 1;
  }
}


x86 assembly (clang, -O0):
<get_mult_time>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x9(%rbp)
movsbl -0x9(%rbp),%eax
mov    %eax,-0x10(%rbp)
sub    $0x44,%eax
je     118e <get_mult_time+0x8e>
jmp    111f <get_mult_time+0x1f>
mov    -0x10(%rbp),%eax
sub    $0x48,%eax
je     1181 <get_mult_time+0x81>
jmp    1130 <get_mult_time+0x30>
mov    -0x10(%rbp),%eax
sub    $0x4d,%eax
je     1174 <get_mult_time+0x74>
jmp    1141 <get_mult_time+0x41>
mov    -0x10(%rbp),%eax
sub    $0x64,%eax
je     118e <get_mult_time+0x8e>
jmp    1152 <get_mult_time+0x52>
mov    -0x10(%rbp),%eax
sub    $0x68,%eax
je     1181 <get_mult_time+0x81>
jmp    1163 <get_mult_time+0x63>
mov    -0x10(%rbp),%eax
sub    $0x6d,%eax
jne    119b <get_mult_time+0x9b>
jmp    1174 <get_mult_time+0x74>
movq   $0x3c,-0x8(%rbp)
jmp    11a3 <get_mult_time+0xa3>
movq   $0xe10,-0x8(%rbp)
jmp    11a3 <get_mult_time+0xa3>
movq   $0x15180,-0x8(%rbp)
jmp    11a3 <get_mult_time+0xa3>
movq   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_mult_time>:
add    $0xffffffbc,%edi
cmp    $0x29,%edi
ja     114a <get_mult_time+0x4a>
movabs $0x100000001,%rax
bt     %rdi,%rax
jb     1144 <get_mult_time+0x44>
movabs $0x1000000010,%rax
bt     %rdi,%rax
jb     113e <get_mult_time+0x3e>
mov    $0x3c,%eax
movabs $0x20000000200,%rcx
bt     %rdi,%rcx
jae    114a <get_mult_time+0x4a>
ret
mov    $0xe10,%eax
ret
mov    $0x15180,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i64 @get_mult_time(i8 signext %0) {
%2 = alloca i64
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %9 [
i32 109, label %6
i32 77, label %6
i32 104, label %7
i32 72, label %7
i32 100, label %8
i32 68, label %8
]
6: ; preds = %1, %1
store i64 60, i64* %2
br label %10
7: ; preds = %1, %1
store i64 3600, i64* %2
br label %10
8: ; preds = %1, %1
store i64 86400, i64* %2
br label %10
9: ; preds = %1
store i64 1, i64* %2
br label %10
10: ; preds = %9, %8, %7, %6
%11 = load i64, i64* %2
ret i64 %11
}

LLVM IR (-O2):
define i64 @get_mult_time(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %5 [
i32 109, label %6
i32 77, label %6
i32 104, label %3
i32 72, label %3
i32 100, label %4
i32 68, label %4
]
3: ; preds = %1, %1
br label %6
4: ; preds = %1, %1
br label %6
5: ; preds = %1
br label %6
6: ; preds = %1, %1, %5, %4, %3
%7 = phi i64 [ 1, %5 ], [ 86400, %4 ], [ 3600, %3 ], [ 60, %1 ], [ 60, %1 ]
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ EEwrite(unsigned int, unsigned int);
void EEword_write(unsigned int addres, unsigned int word) {
  EEwrite(addres, word >> 8 & 0x00ff);
  EEwrite(addres + 1, word & 0x00ff);
}


x86 assembly (clang, -O0):
<EEword_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
shr    $0x8,%esi
and    $0xff,%esi
call   1030 <EEwrite@plt>
mov    -0x4(%rbp),%edi
add    $0x1,%edi
mov    -0x8(%rbp),%esi
and    $0xff,%esi
call   1030 <EEwrite@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EEword_write>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%eax
mov    %edi,%ebx
movzbl %ah,%esi
mov    %eax,%ebp
call   1030 <EEwrite@plt>
add    $0x1,%ebx
movzbl %bpl,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <EEwrite@plt>

LLVM IR (-O0):
define void @EEword_write(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = lshr i32 %6, 8
%8 = and i32 %7, 255
%9 = call i32 @EEwrite(i32 %5, i32 %8)
%10 = load i32, i32* %3
%11 = add i32 %10, 1
%12 = load i32, i32* %4
%13 = and i32 %12, 255
%14 = call i32 @EEwrite(i32 %11, i32 %13)
ret void
}

LLVM IR (-O2):
define void @EEword_write(i32 %0, i32 %1) {
%3 = lshr i32 %1, 8
%4 = and i32 %3, 255
%5 = tail call i32 @EEwrite(i32 %0, i32 %4)
%6 = add i32 %0, 1
%7 = and i32 %1, 255
%8 = tail call i32 @EEwrite(i32 %6, i32 %7)
ret void
}
void DeinitOtherTranslationUnit() {}


x86 assembly (clang, -O0):
<DeinitOtherTranslationUnit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DeinitOtherTranslationUnit>:
ret

LLVM IR (-O0):
define void @DeinitOtherTranslationUnit() {
ret void
}

LLVM IR (-O2):
define void @DeinitOtherTranslationUnit() {
ret void
}
int *pick(int *a, int *b) { return b; }


x86 assembly (clang, -O0):
<pick>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pick>:
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i32* @pick(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
ret i32* %5
}

LLVM IR (-O2):
define i32* @pick(i32* nocapture readnone %0, i32* readnone returned %1) {
ret i32* %1
}
void Delay() {
  unsigned int i = 0x900000;
  while (i-- > 0) {
  }
}


x86 assembly (clang, -O0):
<Delay>:
push   %rbp
mov    %rsp,%rbp
movl   $0x900000,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
jbe    1124 <Delay+0x24>
jmp    110b <Delay+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Delay>:
ret

LLVM IR (-O0):
define void @Delay() {
%1 = alloca i32
store i32 9437184, i32* %1
br label %2
2: ; preds = %6, %0
%3 = load i32, i32* %1
%4 = add i32 %3, -1
store i32 %4, i32* %1
%5 = icmp ugt i32 %3, 0
br i1 %5, label %6, label %7
6: ; preds = %2
br label %2
7: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @Delay() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __analyzer_eval(int);
void test_range_int_gt_le(int i) {
  if (i > 3)
    if (i <= 4)
      __analyzer_eval(i == 4);
}


x86 assembly (clang, -O0):
<test_range_int_gt_le>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x3,-0x4(%rbp)
jle    1145 <test_range_int_gt_le+0x35>
cmpl   $0x4,-0x4(%rbp)
jg     1140 <test_range_int_gt_le+0x30>
cmpl   $0x4,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__analyzer_eval@plt>
jmp    1145 <test_range_int_gt_le+0x35>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_range_int_gt_le>:
cmp    $0x4,%edi
jne    111f <test_range_int_gt_le+0xf>
mov    $0x1,%edi
jmp    1030 <__analyzer_eval@plt>
ret

LLVM IR (-O0):
define void @test_range_int_gt_le(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 3
br i1 %4, label %5, label %14
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 4
br i1 %7, label %8, label %13
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 4
%11 = zext i1 %10 to i32
%12 = call i32 @__analyzer_eval(i32 %11)
br label %13
13: ; preds = %8, %5
br label %14
14: ; preds = %13, %1
ret void
}

LLVM IR (-O2):
define void @test_range_int_gt_le(i32 %0) {
%2 = icmp eq i32 %0, 4
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @__analyzer_eval(i32 1)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
float roundInt(float);
int main() {
  float delta = 0.03125;
  float a[3];
  a[1] = -0.375;
  float b = roundInt(a[1] / delta);
  assert(b == -11.0f);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  0xed8(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  0xec7(%rip),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
divss  -0x4(%rbp),%xmm0
call   1040 <roundInt@plt>
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
movss  0xe9d(%rip),%xmm1
ucomiss %xmm1,%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movss  0xed7(%rip),%xmm0
call   1040 <roundInt@plt>
cmpeqss 0xecd(%rip),%xmm0
movd   %xmm0,%edi
and    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca float
%2 = alloca [3 x float]
%3 = alloca float
store float 3.125000e-02, float* %1
%4 = getelementptr inbounds [3 x float], [3 x float]* %2, i64 0, i64 1
store float -3.750000e-01, float* %4
%5 = getelementptr inbounds [3 x float], [3 x float]* %2, i64 0, i64 1
%6 = load float, float* %5
%7 = load float, float* %1
%8 = fdiv float %6, %7
%9 = call float @roundInt(float %8)
store float %9, float* %3
%10 = load float, float* %3
%11 = fcmp oeq float %10, -1.100000e+01
%12 = zext i1 %11 to i32
%13 = call i32 @assert(i32 %12)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call float @roundInt(float -1.200000e+01)
%2 = fcmp oeq float %1, -1.100000e+01
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
ret i32 0
}
void uncompress(void) {}


x86 assembly (clang, -O0):
<uncompress>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uncompress>:
ret

LLVM IR (-O0):
define void @uncompress() {
ret void
}

LLVM IR (-O2):
define void @uncompress() {
ret void
}
unsigned char _ucTelSend(unsigned int uiLength, void const *pBuffer) {
  return (1);
}


x86 assembly (clang, -O0):
<_ucTelSend>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ucTelSend>:
mov    $0x1,%al
ret

LLVM IR (-O0):
define zeroext i8 @_ucTelSend(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret i8 1
}

LLVM IR (-O2):
define zeroext i8 @_ucTelSend(i32 %0, i8* nocapture readnone %1) {
ret i8 1
}
/* Type definitions */
typedef int /*<<< orphan*/ volatile uint32_t;

/* Variables and functions */
uint32_t read_aesrdfifo(void) { return *((volatile uint32_t *)0x1000900C); }


x86 assembly (clang, -O0):
<read_aesrdfifo>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1000900c,%eax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_aesrdfifo>:
mov    0x1000900c,%eax
ret

LLVM IR (-O0):
define i32 @read_aesrdfifo() {
%1 = load volatile i32, i32* inttoptr (i64 268472332 to i32*)
ret i32 %1
}

LLVM IR (-O2):
define i32 @read_aesrdfifo() {
%1 = load volatile i32, i32* inttoptr (i64 268472332 to i32*)
ret i32 %1
}
/* Variables and functions */
int socket(int, int, int);
int sock_raw_new(int domain, int type, int protocol) {
  return socket(domain, type, protocol);
}


x86 assembly (clang, -O0):
<sock_raw_new>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <socket@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sock_raw_new>:
jmp    1030 <socket@plt>

LLVM IR (-O0):
define i32 @sock_raw_new(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @socket(i32 %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @sock_raw_new(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @socket(i32 %0, i32 %1, i32 %2)
ret i32 %4
}
OP(ed, be) { illegal_2(); }


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <illegal_2@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
xor    %eax,%eax
jmp    1030 <illegal_2@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @illegal_2()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @illegal_2()
ret i32 undef
}