xunge/DecIR huggingface dataset:
int function_that_overflows(void) {
  volatile unsigned int data[(40)];
  volatile unsigned int i = 0;
  for (i = 0; i < ((40) + 8); i++) {
    data[i] = i;
  }
  return data[i - 1];
}


x86 assembly (clang, -O0):
<function_that_overflows>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0xa4(%rbp)
movl   $0x0,-0xa4(%rbp)
mov    -0xa4(%rbp),%eax
cmp    $0x30,%eax
jae    1154 <function_that_overflows+0x54>
mov    -0xa4(%rbp),%ecx
mov    -0xa4(%rbp),%eax
mov    %eax,%eax
mov    %ecx,-0xa0(%rbp,%rax,4)
mov    -0xa4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xa4(%rbp)
jmp    111c <function_that_overflows+0x1c>
mov    -0xa4(%rbp),%eax
sub    $0x1,%eax
mov    %eax,%eax
mov    -0xa0(%rbp,%rax,4),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<function_that_overflows>:
sub    $0x38,%rsp
movl   $0x0,-0x74(%rsp)
movl   $0x0,-0x74(%rsp)
mov    -0x74(%rsp),%eax
cmp    $0x2f,%eax
ja     113a <function_that_overflows+0x3a>
nopl   (%rax)
mov    -0x74(%rsp),%eax
mov    -0x74(%rsp),%ecx
mov    %eax,-0x70(%rsp,%rcx,4)
addl   $0x1,-0x74(%rsp)
mov    -0x74(%rsp),%eax
cmp    $0x30,%eax
jb     1120 <function_that_overflows+0x20>
mov    -0x74(%rsp),%eax
add    $0xffffffff,%eax
mov    -0x70(%rsp,%rax,4),%eax
add    $0x38,%rsp
ret

LLVM IR (-O0):
define i32 @function_that_overflows() {
%1 = alloca [40 x i32]
%2 = alloca i32
store volatile i32 0, i32* %2
store volatile i32 0, i32* %2
br label %3
3: ; preds = %11, %0
%4 = load volatile i32, i32* %2
%5 = icmp ult i32 %4, 48
br i1 %5, label %6, label %14
6: ; preds = %3
%7 = load volatile i32, i32* %2
%8 = load volatile i32, i32* %2
%9 = zext i32 %8 to i64
%10 = getelementptr inbounds [40 x i32], [40 x i32]* %1, i64 0, i64 %9
store volatile i32 %7, i32* %10
br label %11
11: ; preds = %6
%12 = load volatile i32, i32* %2
%13 = add i32 %12, 1
store volatile i32 %13, i32* %2
br label %3
14: ; preds = %3
%15 = load volatile i32, i32* %2
%16 = sub i32 %15, 1
%17 = zext i32 %16 to i64
%18 = getelementptr inbounds [40 x i32], [40 x i32]* %1, i64 0, i64 %17
%19 = load volatile i32, i32* %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @function_that_overflows() {
%1 = alloca [40 x i32]
%2 = alloca i32
%3 = bitcast [40 x i32]* %1 to i8*
%4 = bitcast i32* %2 to i8*
store volatile i32 0, i32* %2
store volatile i32 0, i32* %2
%5 = load volatile i32, i32* %2
%6 = icmp ult i32 %5, 48
br i1 %6, label %7, label %16
7: ; preds = %0, %7
%8 = load volatile i32, i32* %2
%9 = load volatile i32, i32* %2
%10 = zext i32 %9 to i64
%11 = getelementptr inbounds [40 x i32], [40 x i32]* %1, i64 0, i64 %10
store volatile i32 %8, i32* %11
%12 = load volatile i32, i32* %2
%13 = add i32 %12, 1
store volatile i32 %13, i32* %2
%14 = load volatile i32, i32* %2
%15 = icmp ult i32 %14, 48
br i1 %15, label %7, label %16
16: ; preds = %7, %0
%17 = load volatile i32, i32* %2
%18 = add i32 %17, -1
%19 = zext i32 %18 to i64
%20 = getelementptr inbounds [40 x i32], [40 x i32]* %1, i64 0, i64 %19
%21 = load volatile i32, i32* %20
ret i32 %21
}
int test_imm_8Dint8_reg(signed char val) {
  return ((val) & (0x8D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Dint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0x8d,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Dint8_reg>:
test   $0x8d,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Dint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 141
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_8Dint8_reg(i8 signext %0) {
%2 = and i8 %0, -115
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ thr1(int /*<<< orphan*/);
int /*<<< orphan*/ thr2(int /*<<< orphan*/);
int /*<<< orphan*/ thr3(int /*<<< orphan*/);
int /*<<< orphan*/ thr4(int /*<<< orphan*/);
int /*<<< orphan*/ thr5(int /*<<< orphan*/);
int /*<<< orphan*/ thr6(int /*<<< orphan*/);
int /*<<< orphan*/ thr7(int /*<<< orphan*/);
int /*<<< orphan*/ thr8(int /*<<< orphan*/);
int /*<<< orphan*/ thr9(int /*<<< orphan*/);
int main() {
__CPROVER_ASYNC_0:
  thr1(0);
__CPROVER_ASYNC_1:
  thr2(0);
__CPROVER_ASYNC_2:
  thr3(0);
__CPROVER_ASYNC_3:
  thr4(0);
__CPROVER_ASYNC_4:
  thr5(0);
__CPROVER_ASYNC_5:
  thr6(0);
__CPROVER_ASYNC_6:
  thr7(0);
__CPROVER_ASYNC_7:
  thr8(0);
__CPROVER_ASYNC_8:
  thr9(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
jmp    1199 <main+0x9>
xor    %edi,%edi
call   1030 <thr1@plt>
xor    %edi,%edi
call   1050 <thr2@plt>
xor    %edi,%edi
call   1090 <thr3@plt>
xor    %edi,%edi
call   1040 <thr4@plt>
xor    %edi,%edi
call   1080 <thr5@plt>
xor    %edi,%edi
call   1060 <thr6@plt>
xor    %edi,%edi
call   10a0 <thr7@plt>
xor    %edi,%edi
call   1070 <thr8@plt>
xor    %edi,%edi
call   10b0 <thr9@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <thr1@plt>
xor    %edi,%edi
call   1050 <thr2@plt>
xor    %edi,%edi
call   1090 <thr3@plt>
xor    %edi,%edi
call   1040 <thr4@plt>
xor    %edi,%edi
call   1080 <thr5@plt>
xor    %edi,%edi
call   1060 <thr6@plt>
xor    %edi,%edi
call   10a0 <thr7@plt>
xor    %edi,%edi
call   1070 <thr8@plt>
xor    %edi,%edi
call   10b0 <thr9@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
br label %1
1: ; preds = %0
%2 = call i32 @thr1(i32 0)
br label %3
3: ; preds = %1
%4 = call i32 @thr2(i32 0)
br label %5
5: ; preds = %3
%6 = call i32 @thr3(i32 0)
br label %7
7: ; preds = %5
%8 = call i32 @thr4(i32 0)
br label %9
9: ; preds = %7
%10 = call i32 @thr5(i32 0)
br label %11
11: ; preds = %9
%12 = call i32 @thr6(i32 0)
br label %13
13: ; preds = %11
%14 = call i32 @thr7(i32 0)
br label %15
15: ; preds = %13
%16 = call i32 @thr8(i32 0)
br label %17
17: ; preds = %15
%18 = call i32 @thr9(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @thr1(i32 0)
%2 = tail call i32 @thr2(i32 0)
%3 = tail call i32 @thr3(i32 0)
%4 = tail call i32 @thr4(i32 0)
%5 = tail call i32 @thr5(i32 0)
%6 = tail call i32 @thr6(i32 0)
%7 = tail call i32 @thr7(i32 0)
%8 = tail call i32 @thr8(i32 0)
%9 = tail call i32 @thr9(i32 0)
ret i32 0
}
int test_imm_49int32_mem(int *val) {
  return ((*val) & (0x49 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_49int32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x49,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_49int32_mem>:
testb  $0x49,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_49int32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 73
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_49int32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 73
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int dmp_pm_initialize(void) { return 0; }


x86 assembly (clang, -O0):
<dmp_pm_initialize>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dmp_pm_initialize>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dmp_pm_initialize() {
ret i32 0
}

LLVM IR (-O2):
define i32 @dmp_pm_initialize() {
ret i32 0
}
char *get_task_name_from_id(int id) { return ""; }


x86 assembly (clang, -O0):
<get_task_name_from_id>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
lea    0xef2(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_task_name_from_id>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @get_task_name_from_id(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @get_task_name_from_id(i32 %0) {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
unsigned long ReadBlobByte();
void ReadRLEImage(unsigned char *p) {
  unsigned char background_color[4] = {0, 1, 2, 3};
  long j;
  unsigned long number_planes = ReadBlobByte();
  for (j = 0; j < (long)number_planes; j++)
    *p++ = background_color[j];
}


x86 assembly (clang, -O0):
<ReadRLEImage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0xede(%rip),%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <ReadBlobByte@plt>
mov    %rax,-0x20(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x20(%rbp),%rax
jge    1170 <ReadRLEImage+0x60>
mov    -0x18(%rbp),%rax
mov    -0xc(%rbp,%rax,1),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1138 <ReadRLEImage+0x28>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReadRLEImage>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <ReadBlobByte@plt>
test   %rax,%rax
jle    1142 <ReadRLEImage+0x22>
lea    0xec9(%rip),%rsi
mov    %rbx,%rdi
mov    %rax,%rdx
call   1040 <memcpy@plt>
pop    %rbx
ret

LLVM IR (-O0):
@__const.ReadRLEImage.background_color = [4 x i8] c"\00\01\02\03"
define void @ReadRLEImage(i8* %0) {
%2 = alloca i8*
%3 = alloca [4 x i8]
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %2
%6 = bitcast [4 x i8]* %3 to i8*
%7 = call i64 (...) @ReadBlobByte()
store i64 %7, i64* %5
store i64 0, i64* %4
br label %8
8: ; preds = %18, %1
%9 = load i64, i64* %4
%10 = load i64, i64* %5
%11 = icmp slt i64 %9, %10
br i1 %11, label %12, label %21
12: ; preds = %8
%13 = load i64, i64* %4
%14 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 %13
%15 = load i8, i8* %14
%16 = load i8*, i8** %2
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %2
store i8 %15, i8* %16
br label %18
18: ; preds = %12
%19 = load i64, i64* %4
%20 = add nsw i64 %19, 1
store i64 %20, i64* %4
br label %8
21: ; preds = %8
ret void
}

LLVM IR (-O2):
@__const.ReadRLEImage.background_color = [4 x i8] c"\00\01\02\03"
define void @ReadRLEImage(i8* nocapture writeonly %0) {
%2 = tail call i64 (...) @ReadBlobByte()
%3 = icmp sgt i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %1
br label %5
5: ; preds = %4, %1
ret void
}
double f_t_k_d(double f_t_k_rep, double gamma_M) {
  return (f_t_k_rep / gamma_M);
}


x86 assembly (clang, -O0):
<f_t_k_d>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
divsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_t_k_d>:
divsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @f_t_k_d(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fdiv double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @f_t_k_d(double %0, double %1) {
%3 = fdiv double %0, %1
ret double %3
}
int foo(int arg) { return arg + 5; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
lea    0x5(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 5
ret i32 %4
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = add nsw i32 %0, 5
ret i32 %2
}
int test_imm_2Auint16_mem(unsigned short *val) {
  return ((*val) & (0x2A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_2Auint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0x2a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Auint16_mem>:
testb  $0x2a,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Auint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 42
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_2Auint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 42
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int __log2_metis(int a) {
  int i;
  for (i = 1; a > 1; i++, a = a >> 1)
    ;
  return i - 1;
}


x86 assembly (clang, -O0):
<__log2_metis>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x1,-0x4(%rbp)
jle    1134 <__log2_metis+0x34>
jmp    111d <__log2_metis+0x1d>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <__log2_metis+0xe>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__log2_metis>:
xor    %eax,%eax
cmp    $0x2,%edi
jl     111c <__log2_metis+0x1c>
xor    %eax,%eax
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
shr    %ecx
add    $0x1,%eax
cmp    $0x3,%edi
mov    %ecx,%edi
ja     1110 <__log2_metis+0x10>
ret

LLVM IR (-O0):
define i32 @__log2_metis(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 1
br i1 %6, label %7, label %13
7: ; preds = %4
br label %8
8: ; preds = %7
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
%11 = load i32, i32* %2
%12 = ashr i32 %11, 1
store i32 %12, i32* %2
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
%15 = sub nsw i32 %14, 1
ret i32 %15
}

LLVM IR (-O2):
define i32 @__log2_metis(i32 %0) {
%2 = icmp sgt i32 %0, 1
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 1, %1 ]
%5 = phi i32 [ %7, %3 ], [ %0, %1 ]
%6 = add nuw nsw i32 %4, 1
%7 = lshr i32 %5, 1
%8 = icmp ugt i32 %5, 3
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %4, %3 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
inverted(int x) {
  while (x > 0) {
    printf("%d", x % 10);
    x = x / 10;
  }
}


x86 assembly (clang, -O0):
<inverted>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1151 <inverted+0x41>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,%esi
lea    0xec7(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
jmp    111b <inverted+0xb>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inverted>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
test   %edi,%edi
jle    1153 <inverted+0x43>
mov    %edi,%ebp
lea    0xedc(%rip),%r14
mov    $0xcccccccd,%r15d
nopw   0x0(%rax,%rax,1)
mov    %ebp,%ebx
imul   %r15,%rbx
shr    $0x23,%rbx
lea    (%rbx,%rbx,1),%eax
lea    (%rax,%rax,4),%eax
mov    %ebp,%esi
sub    %eax,%esi
mov    %r14,%rdi
call   1030 <printf@plt>
cmp    $0x9,%ebp
mov    %ebx,%ebp
ja     1130 <inverted+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @inverted(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %3
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i32, i32* %3
%9 = srem i32 %8, 10
%10 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = load i32, i32* %3
%12 = sdiv i32 %11, 10
store i32 %12, i32* %3
br label %4
13: ; preds = %4
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @inverted(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ %0, %1 ]
%5 = urem i32 %4, 10
%6 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = udiv i32 %4, 10
%8 = icmp ult i32 %4, 10
br i1 %8, label %9, label %3
9: ; preds = %3, %1
ret i32 undef
}
double DegToRad(double num) {
  return (num *
          (3.14159265358979323846264338327950288419716939937510582097494459 /
           180.0));
}


x86 assembly (clang, -O0):
<DegToRad>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<DegToRad>:
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @DegToRad(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 0x3F91DF46A2529D39
ret double %4
}

LLVM IR (-O2):
define double @DegToRad(double %0) {
%2 = fmul double %0, 0x3F91DF46A2529D39
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void intro() {
  puts("This program will output three wave forms from the 104-DA12-8.");
  puts("The wave forms will be output on DACS 0 - 2.");
  puts("The wave forms will stop when the program exits.");
}


x86 assembly (clang, -O0):
<intro>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
lea    0xf18(%rip),%rdi
call   1030 <puts@plt>
lea    0xf39(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<intro>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf1b(%rip),%rdi
call   1030 <puts@plt>
lea    0xf3c(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [63 x i8] c"This program will output three wave forms from the 104-DA12-8.\00"
@.str.1 = [45 x i8] c"The wave forms will be output on DACS 0 - 2.\00"
@.str.2 = [49 x i8] c"The wave forms will stop when the program exits.\00"
define void @intro() {
%1 = call i32 @puts(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @puts(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @puts(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [63 x i8] c"This program will output three wave forms from the 104-DA12-8.\00"
@.str.1 = [45 x i8] c"The wave forms will be output on DACS 0 - 2.\00"
@.str.2 = [49 x i8] c"The wave forms will stop when the program exits.\00"
define void @intro() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([63 x i8], [63 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([45 x i8], [45 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([49 x i8], [49 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;
typedef int /*<<< orphan*/ gid_t;

/* Variables and functions */
int setgid(int /*<<< orphan*/);
int setuid(int /*<<< orphan*/);
int set_uid_gid(uid_t uid, gid_t gid) {
  if (setgid(gid) == -1)
    return -1;
  if (setuid(uid) == -1)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<set_uid_gid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <setgid@plt>
cmp    $0xffffffff,%eax
jne    114b <set_uid_gid+0x2b>
movl   $0xffffffff,-0x4(%rbp)
jmp    116f <set_uid_gid+0x4f>
mov    -0x8(%rbp),%edi
call   1040 <setuid@plt>
cmp    $0xffffffff,%eax
jne    1168 <set_uid_gid+0x48>
movl   $0xffffffff,-0x4(%rbp)
jmp    116f <set_uid_gid+0x4f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_uid_gid>:
push   %rbx
mov    %edi,%ebx
mov    %esi,%edi
call   1030 <setgid@plt>
cmp    $0xffffffff,%eax
je     1144 <set_uid_gid+0x24>
mov    %ebx,%edi
call   1040 <setuid@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0xffffffff,%ecx
sete   %al
neg    %eax
pop    %rbx
ret
mov    $0xffffffff,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @set_uid_gid(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = call i32 @setgid(i32 %6)
%8 = icmp eq i32 %7, -1
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 -1, i32* %3
br label %16
10: ; preds = %2
%11 = load i32, i32* %4
%12 = call i32 @setuid(i32 %11)
%13 = icmp eq i32 %12, -1
br i1 %13, label %14, label %15
14: ; preds = %10
store i32 -1, i32* %3
br label %16
15: ; preds = %10
store i32 0, i32* %3
br label %16
16: ; preds = %15, %14, %9
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @set_uid_gid(i32 %0, i32 %1) {
%3 = tail call i32 @setgid(i32 %1)
%4 = icmp eq i32 %3, -1
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i32 @setuid(i32 %0)
%7 = icmp eq i32 %6, -1
%8 = sext i1 %7 to i32
br label %9
9: ; preds = %5, %2
%10 = phi i32 [ -1, %2 ], [ %8, %5 ]
ret i32 %10
}
/* Variables and functions */
void some_c_func() {
  int *s = NULL;
  *s = 42;
}


x86 assembly (clang, -O0):
<some_c_func>:
push   %rbp
mov    %rsp,%rbp
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x2a,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define void @some_c_func() {
%1 = alloca i32*
store i32* null, i32** %1
%2 = load i32*, i32** %1
store i32 42, i32* %2
ret void
}

LLVM IR (-O2):
int gcd(int a, int b) {
  int t;
  if (a < b) {
    t = a;
    a = b;
    b = t;
  }
  while (b) {
    t = a % b;
    a = b;
    b = t;
  }
  return a;
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1128 <gcd+0x28>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    112d <gcd+0x2d>
cmpl   $0x0,-0x8(%rbp)
je     1152 <gcd+0x52>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    112d <gcd+0x2d>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %esi,%edx
cmp    %esi,%edi
mov    %edi,%eax
cmovl  %esi,%eax
cmovl  %edi,%edx
test   %edx,%edx
je     111d <gcd+0x1d>
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i32, i32* %3
store i32 %10, i32* %5
%11 = load i32, i32* %4
store i32 %11, i32* %3
%12 = load i32, i32* %5
store i32 %12, i32* %4
br label %13
13: ; preds = %9, %2
br label %14
14: ; preds = %17, %13
%15 = load i32, i32* %4
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %23
17: ; preds = %14
%18 = load i32, i32* %3
%19 = load i32, i32* %4
%20 = srem i32 %18, %19
store i32 %20, i32* %5
%21 = load i32, i32* %4
store i32 %21, i32* %3
%22 = load i32, i32* %5
store i32 %22, i32* %4
br label %14
23: ; preds = %14
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %1, i32 %0
%5 = select i1 %3, i32 %0, i32 %1
%6 = icmp eq i32 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %2, %7
%8 = phi i32 [ %10, %7 ], [ %5, %2 ]
%9 = phi i32 [ %8, %7 ], [ %4, %2 ]
%10 = srem i32 %9, %8
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %7
12: ; preds = %7, %2
%13 = phi i32 [ %4, %2 ], [ %8, %7 ]
ret i32 %13
}
/* Variables and functions */
int partition(long *, int, int);
void quicksort(long array[], int begin, int end) {
  if (begin < end) {
    int sep = partition(array, begin, end);
    quicksort(array, begin, sep - 1);
    quicksort(array, sep + 1, end);
  }
}


x86 assembly (clang, -O0):
<quicksort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <quicksort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quicksort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quicksort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quicksort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quicksort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quicksort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quicksort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quicksort(i64* %0, i32 %1, i32 %2) {
%4 = alloca i64*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i64* %0, i64** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i64*, i64** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partition(i64* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i64*, i64** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i64*, i64** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @quicksort(i64* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i64* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quicksort(i64* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
/* Variables and functions */
int strlen(const char *string) {
  int i;
  i = 0;
  while (*string++)
    i++;
  return i;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,(%rax)
je     1135 <strlen+0x35>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <strlen+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
cmpb   $0x0,(%rdi)
je     111c <strlen+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <strlen+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @strlen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add nuw nsw i32 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %12
}
void foo_1_1_1_2_2_1_2_2_2() {}


x86 assembly (clang, -O0):
<foo_1_1_1_2_2_1_2_2_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_1_1_1_2_2_1_2_2_2>:
ret

LLVM IR (-O0):
define void @foo_1_1_1_2_2_1_2_2_2() {
ret void
}

LLVM IR (-O2):
define void @foo_1_1_1_2_2_1_2_2_2() {
ret void
}
/* Variables and functions */
bool odd_l(long n) { return n & 1; }


x86 assembly (clang, -O0):
<odd_l>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<odd_l>:
mov    %rdi,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @odd_l(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 1
%5 = trunc i64 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @odd_l(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = and i32 %2, 1
ret i32 %3
}
unsigned int btsl_mem(char *base, int bitno) {
  unsigned char res;
  __asm__ __volatile__("btsl\t%2, %0\n\t"
                       "setc\t%1"
                       : "=m"(*base), "=q"(res)
                       : "r"(bitno));
  return res;
}


x86 assembly (clang, -O0):
<btsl_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
bts    %ecx,(%rax)
setb   %al
mov    %al,-0xd(%rbp)
movzbl -0xd(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<btsl_mem>:
bts    %esi,(%rdi)
setb   %al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @btsl_mem(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i8 asm sideeffect "btsl\09$2, $0\0A\09setc\09$1", "=*m,=q,r,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %6, i32 %7)
store i8 %8, i8* %5
%9 = load i8, i8* %5
%10 = zext i8 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @btsl_mem(i8* %0, i32 %1) {
%3 = tail call i8 asm sideeffect "btsl\09$2, $0\0A\09setc\09$1", "=*m,=q,r,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %0, i32 %1)
%4 = zext i8 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ my_recursion(int);
int main(void) {
  my_recursion(3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x3,%edi
call   1030 <my_recursion@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x3,%edi
call   1030 <my_recursion@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @my_recursion(i32 3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @my_recursion(i32 3)
ret i32 0
}
/* Variables and functions */
float nearbyintl(float);
float nearbyintf(float x) { return nearbyintl(x); }


x86 assembly (clang, -O0):
<nearbyintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <nearbyintl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nearbyintf>:
jmp    1030 <nearbyintl@plt>

LLVM IR (-O0):
define float @nearbyintf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @nearbyintl(float %3)
ret float %4
}

LLVM IR (-O2):
define float @nearbyintf(float %0) {
%2 = tail call float @nearbyintl(float %0)
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ error(char *);
void errorUnexpectedVoid(void) {
  error("Unexpected declaration or expression of type void\n");
}


x86 assembly (clang, -O0):
<errorUnexpectedVoid>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <error@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<errorUnexpectedVoid>:
lea    0xee9(%rip),%rdi
jmp    1030 <error@plt>

LLVM IR (-O0):
@.str = [51 x i8] c"Unexpected declaration or expression of type void\0A\00"
define void @errorUnexpectedVoid() {
%1 = call i32 @error(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [51 x i8] c"Unexpected declaration or expression of type void\0A\00"
define void @errorUnexpectedVoid() {
%1 = tail call i32 @error(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ b;
typedef int /*<<< orphan*/ a;

/* Variables and functions */
int /*<<< orphan*/ bubbleSort(int *, int);
int main(int argc, char *argv[]) {
  int a[] = {1, 2, 3, 4, 5};
  int b[] = {5, 4, 3, 2, 1};
  bubbleSort(a, sizeof(a) / sizeof(int));
  bubbleSort(b, sizeof(b) / sizeof(int));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xed7(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xed5(%rip),%eax
mov    %eax,-0x20(%rbp)
mov    0xedb(%rip),%rax
mov    %rax,-0x50(%rbp)
mov    0xed8(%rip),%rax
mov    %rax,-0x48(%rbp)
mov    0xed6(%rip),%eax
mov    %eax,-0x40(%rbp)
lea    -0x30(%rbp),%rdi
mov    $0x5,%esi
call   1030 <bubbleSort@plt>
lea    -0x50(%rbp),%rdi
mov    $0x5,%esi
call   1030 <bubbleSort@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x38,%rsp
mov    0xef6(%rip),%eax
mov    %eax,0x30(%rsp)
movaps 0xedb(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
mov    0xf00(%rip),%eax
mov    %eax,0x10(%rsp)
movaps 0xee5(%rip),%xmm0
movaps %xmm0,(%rsp)
lea    0x20(%rsp),%rdi
mov    $0x5,%esi
call   1030 <bubbleSort@plt>
mov    %rsp,%rdi
mov    $0x5,%esi
call   1030 <bubbleSort@plt>
xor    %eax,%eax
add    $0x38,%rsp
ret

LLVM IR (-O0):
@__const.main.a = [5 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5]
@__const.main.b = [5 x i32] [i32 5, i32 4, i32 3, i32 2, i32 1]
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca [5 x i32]
%6 = alloca [5 x i32]
store i32 %0, i32* %3
store i8** %1, i8*** %4
%7 = bitcast [5 x i32]* %5 to i8*
%8 = bitcast [5 x i32]* %6 to i8*
%9 = getelementptr inbounds [5 x i32], [5 x i32]* %5, i64 0, i64 0
%10 = call i32 @bubbleSort(i32* %9, i32 5)
%11 = getelementptr inbounds [5 x i32], [5 x i32]* %6, i64 0, i64 0
%12 = call i32 @bubbleSort(i32* %11, i32 5)
ret i32 0
}

LLVM IR (-O2):
@__const.main.a = [5 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5]
@__const.main.b = [5 x i32] [i32 5, i32 4, i32 3, i32 2, i32 1]
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [5 x i32]
%4 = alloca [5 x i32]
%5 = bitcast [5 x i32]* %3 to i8*
%6 = bitcast [5 x i32]* %4 to i8*
%7 = getelementptr inbounds [5 x i32], [5 x i32]* %3, i64 0, i64 0
%8 = call i32 @bubbleSort(i32* %7, i32 5)
%9 = getelementptr inbounds [5 x i32], [5 x i32]* %4, i64 0, i64 0
%10 = call i32 @bubbleSort(i32* %9, i32 5)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ uint16_t;
struct iovec {
  void *member_0;
  size_t member_1;
};

/* Variables and functions */
int teredo_sendv(int, struct iovec *, int, int /*<<< orphan*/,
                 int /*<<< orphan*/);
int teredo_send(int fd, const void *packet, size_t plen, uint32_t dest_ip,
                uint16_t dest_port) {
  struct iovec iov = {(void *)packet, plen};
  return teredo_sendv(fd, &iov, 1, dest_ip, dest_port);
}


x86 assembly (clang, -O0):
<teredo_send>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x1c(%rbp),%ecx
mov    -0x20(%rbp),%r8d
lea    -0x30(%rbp),%rsi
mov    $0x1,%edx
call   1030 <teredo_sendv@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<teredo_send>:
sub    $0x18,%rsp
mov    %rsi,0x8(%rsp)
mov    %rdx,0x10(%rsp)
lea    0x8(%rsp),%rsi
mov    $0x1,%edx
call   1030 <teredo_sendv@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.iovec = type { i8*, i64 }
define i32 @teredo_send(i32 %0, i8* %1, i64 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i32
%10 = alloca i32
%11 = alloca %struct.iovec
store i32 %0, i32* %6
store i8* %1, i8** %7
store i64 %2, i64* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%12 = getelementptr inbounds %struct.iovec, %struct.iovec* %11, i32 0, i32 0
%13 = load i8*, i8** %7
store i8* %13, i8** %12
%14 = getelementptr inbounds %struct.iovec, %struct.iovec* %11, i32 0, i32 1
%15 = load i64, i64* %8
store i64 %15, i64* %14
%16 = load i32, i32* %6
%17 = load i32, i32* %9
%18 = load i32, i32* %10
%19 = call i32 @teredo_sendv(i32 %16, %struct.iovec* %11, i32 1, i32 %17, i32 %18)
ret i32 %19
}

LLVM IR (-O2):
%struct.iovec = type { i8*, i64 }
define i32 @teredo_send(i32 %0, i8* %1, i64 %2, i32 %3, i32 %4) {
%6 = alloca %struct.iovec
%7 = bitcast %struct.iovec* %6 to i8*
%8 = getelementptr inbounds %struct.iovec, %struct.iovec* %6, i64 0, i32 0
store i8* %1, i8** %8
%9 = getelementptr inbounds %struct.iovec, %struct.iovec* %6, i64 0, i32 1
store i64 %2, i64* %9
%10 = call i32 @teredo_sendv(i32 %0, %struct.iovec* %6, i32 1, i32 %3, i32 %4)
ret i32 %10
}
int max_fd(void) {
  static int maxFd = 0;
  if (maxFd)
    return maxFd;
  return maxFd = 256;
}


x86 assembly (clang, -O0):
<max_fd>:
push   %rbp
mov    %rsp,%rbp
cmpl   $0x0,0x2f19(%rip)
je     111f <max_fd+0x1f>
mov    0x2f0d(%rip),%eax
mov    %eax,-0x4(%rbp)
jmp    1130 <max_fd+0x30>
movl   $0x100,0x2efb(%rip)
movl   $0x100,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max_fd>:
cmpb   $0x0,0x2f1d(%rip)
jne    1110 <max_fd+0x10>
movb   $0x1,0x2f14(%rip)
mov    $0x100,%eax
ret

LLVM IR (-O0):
@max_fd.maxFd = internal global i32 0
define i32 @max_fd() {
%1 = alloca i32
%2 = load i32, i32* @max_fd.maxFd
%3 = icmp ne i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = load i32, i32* @max_fd.maxFd
store i32 %5, i32* %1
br label %7
6: ; preds = %0
store i32 256, i32* @max_fd.maxFd
store i32 256, i32* %1
br label %7
7: ; preds = %6, %4
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
@max_fd.maxFd = internal unnamed_addr global i1 false
define i32 @max_fd() {
%1 = load i1, i1* @max_fd.maxFd
br i1 %1, label %3, label %2
2: ; preds = %0
store i1 true, i1* @max_fd.maxFd
br label %3
3: ; preds = %0, %2
ret i32 256
}
/* Variables and functions */
int /*<<< orphan*/ CAN1_IRQ0_DriverIRQHandler();
__attribute__((weak)) void CAN1_IRQ0_IRQHandler(void) {
  CAN1_IRQ0_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<CAN1_IRQ0_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <CAN1_IRQ0_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CAN1_IRQ0_IRQHandler>:
xor    %eax,%eax
jmp    1030 <CAN1_IRQ0_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @CAN1_IRQ0_IRQHandler() {
%1 = call i32 (...) @CAN1_IRQ0_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @CAN1_IRQ0_IRQHandler() {
%1 = tail call i32 (...) @CAN1_IRQ0_DriverIRQHandler()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ caller();
int main() { caller(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <caller@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <caller@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @caller()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @caller()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ CalcoloMatrice();
int /*<<< orphan*/ InputMatrice();
int /*<<< orphan*/ NumeroRigheEColonneMatrice();
int /*<<< orphan*/ StampaDati();
int main() {
  NumeroRigheEColonneMatrice();
  InputMatrice();
  CalcoloMatrice();
  StampaDati();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <NumeroRigheEColonneMatrice@plt>
mov    $0x0,%al
call   1060 <InputMatrice@plt>
mov    $0x0,%al
call   1050 <CalcoloMatrice@plt>
mov    $0x0,%al
call   1030 <StampaDati@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <NumeroRigheEColonneMatrice@plt>
xor    %eax,%eax
call   1060 <InputMatrice@plt>
xor    %eax,%eax
call   1050 <CalcoloMatrice@plt>
xor    %eax,%eax
call   1030 <StampaDati@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @NumeroRigheEColonneMatrice()
%3 = call i32 (...) @InputMatrice()
%4 = call i32 (...) @CalcoloMatrice()
%5 = call i32 (...) @StampaDati()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @NumeroRigheEColonneMatrice()
%2 = tail call i32 (...) @InputMatrice()
%3 = tail call i32 (...) @CalcoloMatrice()
%4 = tail call i32 (...) @StampaDati()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ handle_SEGV(int /*<<< orphan*/);
int gen_SEGV() {
  handle_SEGV(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_SEGV>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_SEGV@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_SEGV>:
push   %rax
xor    %edi,%edi
call   1030 <handle_SEGV@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_SEGV() {
%1 = call i32 @handle_SEGV(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_SEGV() {
%1 = tail call i32 @handle_SEGV(i32 0)
ret i32 0
}
float max(float v1, float v2) { return (v1 > v2) ? v1 : v2; }


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    112c <max+0x2c>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    1136 <max+0x36>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
maxss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @max(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp ogt float %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load float, float* %3
br label %12
10: ; preds = %2
%11 = load float, float* %4
br label %12
12: ; preds = %10, %8
%13 = phi float [ %9, %8 ], [ %11, %10 ]
ret float %13
}

LLVM IR (-O2):
define float @max(float %0, float %1) {
%3 = fcmp ogt float %0, %1
%4 = select i1 %3, float %0, float %1
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ niceprint(char *);
void sounds(void) {
  niceprint(
      "For hours, the party's travel is plagued by terrible shrieks, moans, "
      "and "
      "incoherent gibbering echoing through nearby passages, without any "
      "apparent origin. Each character must make a successful DC 11 Wisdom "
      "saving throw. On a failed save, the character's madness level increases "
      "by 1.\n\n");
}


x86 assembly (clang, -O0):
<sounds>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <niceprint@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sounds>:
lea    0xee9(%rip),%rdi
jmp    1030 <niceprint@plt>

LLVM IR (-O0):
@.str = [287 x i8] c"For hours, the party's travel is plagued by terrible shrieks, moans, and incoherent gibbering echoing through nearby passages, without any apparent origin. Each character must make a successful DC 11 Wisdom saving throw. On a failed save, the character's madness level increases by 1.\0A\0A\00"
define void @sounds() {
%1 = call i32 @niceprint(i8* getelementptr inbounds ([287 x i8], [287 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [287 x i8] c"For hours, the party's travel is plagued by terrible shrieks, moans, and incoherent gibbering echoing through nearby passages, without any apparent origin. Each character must make a successful DC 11 Wisdom saving throw. On a failed save, the character's madness level increases by 1.\0A\0A\00"
define void @sounds() {
%1 = tail call i32 @niceprint(i8* getelementptr inbounds ([287 x i8], [287 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, void *, void *, void *, int);
__attribute__((__weak__, __always___)) void
__softboundmpx_introspect_metadata(void *ptr, void *base, void *bound,
                                   int arg_no) {
  printf("[introspect_metadata]ptr=%p, base=%p, bound=%p, arg_no=%d\n", ptr,
         base, bound, arg_no);
}


x86 assembly (clang, -O0):
<__softboundmpx_introspect_metadata>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x1c(%rbp),%r8d
lea    0xec2(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__softboundmpx_introspect_metadata>:
mov    %ecx,%r8d
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xedd(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [59 x i8] c"[introspect_metadata]ptr=%p, base=%p, bound=%p, arg_no=%d\0A\00"
define weak void @__softboundmpx_introspect_metadata(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = load i32, i32* %8
%13 = call i32 @printf(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0), i8* %9, i8* %10, i8* %11, i32 %12)
ret void
}

LLVM IR (-O2):
@.str = [59 x i8] c"[introspect_metadata]ptr=%p, base=%p, bound=%p, arg_no=%d\0A\00"
define weak void @__softboundmpx_introspect_metadata(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = tail call i32 @printf(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1, i8* %2, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ UARTBaseValid(unsigned long);
unsigned long UARTRxErrorGet(unsigned long ulBase) {
  DEBUG_ASSERT(UARTBaseValid(ulBase));
  return ((*((volatile unsigned long *)(ulBase + 0x00000004))) & 0x0000000F);
}


x86 assembly (clang, -O0):
<UARTRxErrorGet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <UARTBaseValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rax
and    $0xf,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTRxErrorGet>:
push   %rbx
mov    %rdi,%rbx
call   1040 <UARTBaseValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    0x4(%rbx),%rax
and    $0xf,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @UARTRxErrorGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @UARTBaseValid(i64 %3)
%5 = call i32 @DEBUG_ASSERT(i32 %4)
%6 = load i64, i64* %2
%7 = add i64 %6, 4
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = and i64 %9, 15
ret i64 %10
}

LLVM IR (-O2):
define i64 @UARTRxErrorGet(i64 %0) {
%2 = tail call i32 @UARTBaseValid(i64 %0)
%3 = tail call i32 @DEBUG_ASSERT(i32 %2)
%4 = add i64 %0, 4
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, 15
ret i64 %7
}