xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint8_t;
typedef int uint64_t;

/* Variables and functions */
uint64_t rotl64(uint64_t x, uint8_t r) { return (x << r) | (x >> (64 - r)); }


x86 assembly (clang, -O0):
<rotl64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
mov    $0x40,%ecx
sub    -0x8(%rbp),%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotl64>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
neg    %cl
sar    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rotl64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sub nsw i32 64, %9
%11 = ashr i32 %8, %10
%12 = or i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @rotl64(i32 %0, i32 %1) {
%3 = shl i32 %0, %1
%4 = sub nsw i32 64, %1
%5 = ashr i32 %0, %4
%6 = or i32 %5, %3
ret i32 %6
}
void *atomicExchangePointer(void *volatile *var, void *nv) {
  void *ov;
  __asm__ __volatile__("xchgq %0, %1"
                       : "=r"(ov), "=m"(*var)
                       : "0"(nv), "m"(*var));
  return ov;
}


x86 assembly (clang, -O0):
<atomicExchangePointer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
xchg   %rax,(%rcx)
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomicExchangePointer>:
mov    %rsi,%rax
xchg   %rax,(%rdi)
ret

LLVM IR (-O0):
define i8* @atomicExchangePointer(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
%5 = alloca i8*
store i8** %0, i8*** %3
store i8* %1, i8** %4
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %4
%8 = load i8**, i8*** %3
%9 = call i8* asm sideeffect "xchgq $0, $1", "=r,=*m,0,*m,~{dirflag},~{fpsr},~{flags}"(i8** elementtype(i8*) %6, i8* %7, i8** elementtype(i8*) %8)
store i8* %9, i8** %5
%10 = load i8*, i8** %5
ret i8* %10
}

LLVM IR (-O2):
define i8* @atomicExchangePointer(i8** %0, i8* %1) {
%3 = tail call i8* asm sideeffect "xchgq $0, $1", "=r,=*m,0,*m,~{dirflag},~{fpsr},~{flags}"(i8** elementtype(i8*) %0, i8* %1, i8** elementtype(i8*) %0)
ret i8* %3
}
int numberOfDigits(float number) {
  int digits = 0;
  while (number >= 1) {
    number *= .1;
    digits++;
  }
  return digits;
}


x86 assembly (clang, -O0):
<numberOfDigits>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xee3(%rip),%xmm1
ucomiss %xmm1,%xmm0
jb     1152 <numberOfDigits+0x52>
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xed1(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1110 <numberOfDigits+0x10>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<numberOfDigits>:
xor    %eax,%eax
ucomiss 0xef7(%rip),%xmm0
jb     1134 <numberOfDigits+0x34>
xor    %eax,%eax
movsd  0xef3(%rip),%xmm1
movss  0xee3(%rip),%xmm2
nopl   (%rax)
cvtss2sd %xmm0,%xmm0
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x1,%eax
ucomiss %xmm2,%xmm0
jae    1120 <numberOfDigits+0x20>
ret

LLVM IR (-O0):
define i32 @numberOfDigits(float %0) {
%2 = alloca float
%3 = alloca i32
store float %0, float* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load float, float* %2
%6 = fcmp oge float %5, 1.000000e+00
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load float, float* %2
%9 = fpext float %8 to double
%10 = fmul double %9, 1.000000e-01
%11 = fptrunc double %10 to float
store float %11, float* %2
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @numberOfDigits(float %0) {
%2 = fcmp ult float %0, 1.000000e+00
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %9, %3 ], [ 0, %1 ]
%5 = phi float [ %8, %3 ], [ %0, %1 ]
%6 = fpext float %5 to double
%7 = fmul double %6, 1.000000e-01
%8 = fptrunc double %7 to float
%9 = add nuw nsw i32 %4, 1
%10 = fcmp ult float %8, 1.000000e+00
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %9, %3 ]
ret i32 %12
}
int yywrap(void) { return -1; }


x86 assembly (clang, -O0):
<yywrap>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<yywrap>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @yywrap() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @yywrap() {
ret i32 -1
}
int *pointer_arithmetic() {
  static int buf[10];
  return buf + 100;
}


x86 assembly (clang, -O0):
<pointer_arithmetic>:
push   %rbp
mov    %rsp,%rbp
lea    0x2f25(%rip),%rax
add    $0x190,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pointer_arithmetic>:
lea    0x30b9(%rip),%rax
ret

LLVM IR (-O0):
@pointer_arithmetic.buf = internal global [10 x i32] zeroinitializer
define i32* @pointer_arithmetic() {
ret i32* getelementptr inbounds ([10 x i32], [10 x i32]* @pointer_arithmetic.buf, i64 10, i64 0)
}

LLVM IR (-O2):
@pointer_arithmetic.buf = internal global [10 x i32] zeroinitializer
define i32* @pointer_arithmetic() {
ret i32* getelementptr inbounds ([10 x i32], [10 x i32]* @pointer_arithmetic.buf, i64 10, i64 0)
}
void gtk_combo_box_set_active_iter() {}


x86 assembly (clang, -O0):
<gtk_combo_box_set_active_iter>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_combo_box_set_active_iter>:
ret

LLVM IR (-O0):
define void @gtk_combo_box_set_active_iter() {
ret void
}

LLVM IR (-O2):
define void @gtk_combo_box_set_active_iter() {
ret void
}
char *numeric_arabic_to_vedic(long int number) { return 0; }


x86 assembly (clang, -O0):
<numeric_arabic_to_vedic>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<numeric_arabic_to_vedic>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @numeric_arabic_to_vedic(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @numeric_arabic_to_vedic(i64 %0) {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ compose(char *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
int main(int argc, char **argv) {
  int i;
  for (i = 1; i < argc; ++i) {
    compose(argv[i], strlen(argv[i]));
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1183 <main+0x63>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    %eax,%esi
call   1040 <compose@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    113d <main+0x1d>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
cmp    $0x2,%edi
jl     115f <main+0x3f>
mov    %rsi,%r14
mov    %edi,%r15d
mov    $0x1,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%r12
mov    %r12,%rdi
call   1030 <strlen@plt>
mov    %r12,%rdi
mov    %eax,%esi
call   1040 <compose@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1140 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %6
br label %7
7: ; preds = %24, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %27
11: ; preds = %7
%12 = load i8**, i8*** %5
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8*, i8** %12, i64 %14
%16 = load i8*, i8** %15
%17 = load i8**, i8*** %5
%18 = load i32, i32* %6
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i8*, i8** %17, i64 %19
%21 = load i8*, i8** %20
%22 = call i32 @strlen(i8* %21)
%23 = call i32 @compose(i8* %16, i32 %22)
br label %24
24: ; preds = %11
%25 = load i32, i32* %6
%26 = add nsw i32 %25, 1
store i32 %26, i32* %6
br label %7
27: ; preds = %7
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %14
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 1, %4 ], [ %12, %6 ]
%8 = getelementptr inbounds i8*, i8** %1, i64 %7
%9 = load i8*, i8** %8
%10 = tail call i32 @strlen(i8* %9)
%11 = tail call i32 @compose(i8* %9, i32 %10)
%12 = add nuw nsw i64 %7, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %14, label %6
14: ; preds = %6, %2
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ play(int);
int main(void) {
  play(2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x2,%edi
call   1030 <play@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2,%edi
call   1030 <play@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @play(i32 2)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @play(i32 2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ datagram_test();
int /*<<< orphan*/ stream_test();
int /*<<< orphan*/ unlink(char *);
int main(int argc, char *argv[]) {
  (void)unlink("/tmp/123");
  datagram_test();
  if (0)
    stream_test();
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
call   1030 <unlink@plt>
mov    $0x0,%al
call   1040 <datagram_test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <unlink@plt>
xor    %eax,%eax
call   1040 <datagram_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"/tmp/123\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @unlink(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%7 = call i32 (...) @datagram_test()
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"/tmp/123\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @unlink(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 (...) @datagram_test()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ reconos_cleanup();
void exit_signal(int sig) {
  reconos_cleanup();
  printf("[reconos-core] aborted\n");
  exit(0);
}


x86 assembly (clang, -O0):
<exit_signal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <reconos_cleanup@plt>
lea    0xeb7(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<exit_signal>:
push   %rax
xor    %eax,%eax
call   1040 <reconos_cleanup@plt>
lea    0xec1(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"[reconos-core] aborted\0A\00"
define void @exit_signal(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @reconos_cleanup()
%4 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [23 x i8] c"[reconos-core] aborted\00"
define void @exit_signal(i32 %0) {
%2 = tail call i32 (...) @reconos_cleanup()
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 @exit(i32 0)
unreachable
}
void initialize(int arr[]) { arr[0] = -999; }


x86 assembly (clang, -O0):
<initialize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0xfffffc19,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize>:
movl   $0xfffffc19,(%rdi)
ret

LLVM IR (-O0):
define void @initialize(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
store i32 -999, i32* %4
ret void
}

LLVM IR (-O2):
define void @initialize(i32* nocapture writeonly %0) {
store i32 -999, i32* %0
ret void
}
/* Variables and functions */
double fabs(double);
double epslon(double x) {
  double a, b, c, eps;
  a = 4.0e0 / 3.0e0;
  eps = 0.0e0;
  while (eps == 0.0e0) {
    b = a - 1.0e0;
    c = b + b + b;
    eps = fabs((double)(c - 1.0e0));
  }
  return (eps * fabs((double)x));
}


x86 assembly (clang, -O0):
<epslon>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    1186 <epslon+0x86>
jp     1186 <epslon+0x86>
movsd  -0x10(%rbp),%xmm0
movsd  0xec5(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
addsd  -0x18(%rbp),%xmm0
addsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
movsd  0xe9b(%rip),%xmm1
subsd  %xmm1,%xmm0
movaps 0xe98(%rip),%xmm1
pand   %xmm1,%xmm0
movsd  %xmm0,-0x28(%rbp)
jmp    111e <epslon+0x1e>
movsd  -0x28(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
movaps 0xe79(%rip),%xmm2
pand   %xmm2,%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<epslon>:
andpd  0xef8(%rip),%xmm0
mulsd  0xf00(%rip),%xmm0
ret

LLVM IR (-O0):
define double @epslon(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %2
store double 0x3FF5555555555555, double* %3
store double 0.000000e+00, double* %6
br label %7
7: ; preds = %10, %1
%8 = load double, double* %6
%9 = fcmp oeq double %8, 0.000000e+00
br i1 %9, label %10, label %21
10: ; preds = %7
%11 = load double, double* %3
%12 = fsub double %11, 1.000000e+00
store double %12, double* %4
%13 = load double, double* %4
%14 = load double, double* %4
%15 = fadd double %13, %14
%16 = load double, double* %4
%17 = fadd double %15, %16
store double %17, double* %5
%18 = load double, double* %5
%19 = fsub double %18, 1.000000e+00
%20 = call double @llvm.fabs.f64(double %19)
store double %20, double* %6
br label %7
21: ; preds = %7
%22 = load double, double* %6
%23 = load double, double* %2
%24 = call double @llvm.fabs.f64(double %23)
%25 = fmul double %22, %24
ret double %25
}

LLVM IR (-O2):
define double @epslon(double %0) {
%2 = tail call double @llvm.fabs.f64(double %0)
%3 = fmul double %2, 0x3CB0000000000000
ret double %3
}
int DRV_GET_RF_GLOCKSTATE(unsigned int *Status) { return 0; }


x86 assembly (clang, -O0):
<DRV_GET_RF_GLOCKSTATE>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DRV_GET_RF_GLOCKSTATE>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @DRV_GET_RF_GLOCKSTATE(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @DRV_GET_RF_GLOCKSTATE(i32* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int rand();
int /*<<< orphan*/ srand(unsigned int);
scalar_t__ time(int /*<<< orphan*/ *);
int indice_aleatorio(int indice_R, int X) {
  srand((unsigned)time(NULL));
  indice_R = rand() % X;
  return indice_R;
}


x86 assembly (clang, -O0):
<indice_aleatorio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
mov    $0x0,%al
call   1050 <rand@plt>
cltd
idivl  -0x8(%rbp)
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<indice_aleatorio>:
push   %rbx
mov    %esi,%ebx
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
xor    %eax,%eax
call   1050 <rand@plt>
cltd
idiv   %ebx
mov    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @indice_aleatorio(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i64 @time(i32* null)
%6 = trunc i64 %5 to i32
%7 = call i32 @srand(i32 %6)
%8 = call i32 (...) @rand()
%9 = load i32, i32* %4
%10 = srem i32 %8, %9
store i32 %10, i32* %3
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @indice_aleatorio(i32 %0, i32 %1) {
%3 = tail call i64 @time(i32* null)
%4 = trunc i64 %3 to i32
%5 = tail call i32 @srand(i32 %4)
%6 = tail call i32 (...) @rand()
%7 = srem i32 %6, %1
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void print_arr(int grades[], int elements) {
  int i;
  for (i = 0; i < elements; i++) {
    printf("%d ", grades[i]);
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<print_arr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1159 <print_arr+0x49>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <print_arr+0x16>
lea    0xea4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_arr>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1157 <print_arr+0x37>
mov    %rdi,%r15
mov    %esi,%r12d
lea    0xec7(%rip),%r14
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <print_arr+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @print_arr(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d \00"
define void @print_arr(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = tail call i32 @putchar(i32 10)
ret void
}
int mfm_valid_clock(unsigned long long accum) {
  unsigned int xclock = ~((accum >> 1) | (accum << 1)) & 0xaaaa;
  unsigned int clock = accum & 0xaaaa;
  if (xclock != clock) {
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<mfm_valid_clock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x1,%rax
mov    -0x10(%rbp),%rcx
shl    $0x1,%rcx
or     %rcx,%rax
xor    $0xffffffffffffffff,%rax
and    $0xaaaa,%rax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
and    $0xaaaa,%rax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
je     114d <mfm_valid_clock+0x4d>
movl   $0x0,-0x4(%rbp)
jmp    1154 <mfm_valid_clock+0x54>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mfm_valid_clock>:
lea    (%rdi,%rdi,1),%eax
mov    %edi,%ecx
shr    %ecx
or     %eax,%ecx
not    %ecx
and    $0xaaaa,%ecx
and    $0xaaaa,%edi
xor    %eax,%eax
cmp    %edi,%ecx
sete   %al
ret

LLVM IR (-O0):
define i32 @mfm_valid_clock(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i32
%5 = alloca i32
store i64 %0, i64* %3
%6 = load i64, i64* %3
%7 = lshr i64 %6, 1
%8 = load i64, i64* %3
%9 = shl i64 %8, 1
%10 = or i64 %7, %9
%11 = xor i64 %10, -1
%12 = and i64 %11, 43690
%13 = trunc i64 %12 to i32
store i32 %13, i32* %4
%14 = load i64, i64* %3
%15 = and i64 %14, 43690
%16 = trunc i64 %15 to i32
store i32 %16, i32* %5
%17 = load i32, i32* %4
%18 = load i32, i32* %5
%19 = icmp ne i32 %17, %18
br i1 %19, label %20, label %21
20: ; preds = %1
store i32 0, i32* %2
br label %22
21: ; preds = %1
store i32 1, i32* %2
br label %22
22: ; preds = %21, %20
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @mfm_valid_clock(i64 %0) {
%2 = lshr i64 %0, 1
%3 = shl i64 %0, 1
%4 = or i64 %2, %3
%5 = trunc i64 %4 to i32
%6 = and i32 %5, 43690
%7 = xor i32 %6, 43690
%8 = trunc i64 %0 to i32
%9 = and i32 %8, 43690
%10 = icmp eq i32 %7, %9
%11 = zext i1 %10 to i32
ret i32 %11
}
void s3c_i2c4_setname(char *name) {}


x86 assembly (clang, -O0):
<s3c_i2c4_setname>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<s3c_i2c4_setname>:
ret

LLVM IR (-O0):
define void @s3c_i2c4_setname(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @s3c_i2c4_setname(i8* nocapture %0) {
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t f3m_get_para(const uint16_t *p) {
  uint16_t v0 = ((const uint8_t *)p)[0];
  uint16_t v1 = ((const uint8_t *)p)[1];
  return (v1 << 8) | v0;
}


x86 assembly (clang, -O0):
<f3m_get_para>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
shl    $0x8,%eax
or     -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3m_get_para>:
mov    0x4(%rdi),%eax
shl    $0x8,%eax
or     (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @f3m_get_para(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 0
%7 = load i32, i32* %6
store i32 %7, i32* %3
%8 = load i32*, i32** %2
%9 = getelementptr inbounds i32, i32* %8, i64 1
%10 = load i32, i32* %9
store i32 %10, i32* %4
%11 = load i32, i32* %4
%12 = shl i32 %11, 8
%13 = load i32, i32* %3
%14 = or i32 %12, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @f3m_get_para(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = load i32, i32* %3
%5 = shl i32 %4, 8
%6 = or i32 %5, %2
ret i32 %6
}
int main(void) {
  int x;
  x + 1;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ kz_exit();
void thread_end(void) { kz_exit(); }


x86 assembly (clang, -O0):
<thread_end>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <kz_exit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread_end>:
xor    %eax,%eax
jmp    1030 <kz_exit@plt>

LLVM IR (-O0):
define void @thread_end() {
%1 = call i32 (...) @kz_exit()
ret void
}

LLVM IR (-O2):
define void @thread_end() {
%1 = tail call i32 (...) @kz_exit()
ret void
}
void foo(int *a, int *b, int *c) {
  *a = 1;
  if (*b)
    *c = 2;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x10(%rbp),%rax
cmpl   $0x0,(%rax)
je     1131 <foo+0x31>
mov    -0x18(%rbp),%rax
movl   $0x2,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
movl   $0x1,(%rdi)
cmpl   $0x0,(%rsi)
je     1111 <foo+0x11>
movl   $0x2,(%rdx)
ret

LLVM IR (-O0):
define void @foo(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
store i32 1, i32* %7
%8 = load i32*, i32** %5
%9 = load i32, i32* %8
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load i32*, i32** %6
store i32 2, i32* %12
br label %13
13: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @foo(i32* nocapture writeonly %0, i32* nocapture %1, i32* nocapture writeonly %2) {
store i32 1, i32* %0
%4 = load i32, i32* %1
%5 = icmp eq i32 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %3
store i32 2, i32* %2
br label %7
7: ; preds = %6, %3
ret void
}
/* Type definitions */
struct vec3i {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ vec3i_distance_squared(int /*<<< orphan*/ *,
                                          int /*<<< orphan*/ *);
__attribute__((always_)) int32_t psvec3i_distance_squared(struct vec3i *a,
                                                          struct vec3i *b) {
  return vec3i_distance_squared((int32_t *)a, (int32_t *)b);
}


x86 assembly (clang, -O0):
<psvec3i_distance_squared>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <vec3i_distance_squared@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec3i_distance_squared>:
jmp    1030 <vec3i_distance_squared@plt>

LLVM IR (-O0):
%struct.vec3i = type { i32 }
define i32 @psvec3i_distance_squared(%struct.vec3i* %0, %struct.vec3i* %1) {
%3 = alloca %struct.vec3i*
%4 = alloca %struct.vec3i*
store %struct.vec3i* %0, %struct.vec3i** %3
store %struct.vec3i* %1, %struct.vec3i** %4
%5 = load %struct.vec3i*, %struct.vec3i** %3
%6 = bitcast %struct.vec3i* %5 to i32*
%7 = load %struct.vec3i*, %struct.vec3i** %4
%8 = bitcast %struct.vec3i* %7 to i32*
%9 = call i32 @vec3i_distance_squared(i32* %6, i32* %8)
ret i32 %9
}

LLVM IR (-O2):
%struct.vec3i = type { i32 }
define i32 @psvec3i_distance_squared(%struct.vec3i* %0, %struct.vec3i* %1) {
%3 = getelementptr %struct.vec3i, %struct.vec3i* %0, i64 0, i32 0
%4 = getelementptr %struct.vec3i, %struct.vec3i* %1, i64 0, i32 0
%5 = tail call i32 @vec3i_distance_squared(i32* %3, i32* %4)
ret i32 %5
}
/* Variables and functions */
int posix_fallocate(int, int /*<<< orphan*/, int);
int rawfalloc(int fd, int len) { return posix_fallocate(fd, 0, len); }


x86 assembly (clang, -O0):
<rawfalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
xor    %esi,%esi
call   1030 <posix_fallocate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rawfalloc>:
mov    %esi,%edx
xor    %esi,%esi
jmp    1030 <posix_fallocate@plt>

LLVM IR (-O0):
define i32 @rawfalloc(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @posix_fallocate(i32 %5, i32 0, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @rawfalloc(i32 %0, i32 %1) {
%3 = tail call i32 @posix_fallocate(i32 %0, i32 0, i32 %1)
ret i32 %3
}
/* Type definitions */
struct sockaddr_in6 {
  int dummy;
};
struct sockaddr_in {
  int dummy;
};
struct sockaddr {
  int sa_family;
};

/* Variables and functions */
#define AF_INET 129
#define AF_INET6 128
int sock_addrlen(const struct sockaddr *sa) {
  switch (sa->sa_family) {
  case AF_INET:
    return sizeof(struct sockaddr_in);
  case AF_INET6:
    return sizeof(struct sockaddr_in6);
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<sock_addrlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
sub    $0x80,%eax
je     1140 <sock_addrlen+0x40>
jmp    1121 <sock_addrlen+0x21>
mov    -0x14(%rbp),%eax
sub    $0x81,%eax
jne    114c <sock_addrlen+0x4c>
jmp    1134 <sock_addrlen+0x34>
movl   $0x4,-0x4(%rbp)
jmp    1153 <sock_addrlen+0x53>
movl   $0x4,-0x4(%rbp)
jmp    1153 <sock_addrlen+0x53>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sock_addrlen>:
mov    (%rdi),%ecx
and    $0xfffffffe,%ecx
xor    %eax,%eax
cmp    $0x80,%ecx
sete   %al
shl    $0x2,%eax
ret

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
define i32 @sock_addrlen(%struct.sockaddr* %0) {
%2 = alloca i32
%3 = alloca %struct.sockaddr*
store %struct.sockaddr* %0, %struct.sockaddr** %3
%4 = load %struct.sockaddr*, %struct.sockaddr** %3
%5 = getelementptr inbounds %struct.sockaddr, %struct.sockaddr* %4, i32 0, i32 0
%6 = load i32, i32* %5
switch i32 %6, label %9 [
i32 129, label %7
i32 128, label %8
]
7: ; preds = %1
store i32 4, i32* %2
br label %10
8: ; preds = %1
store i32 4, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %8, %7
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
define i32 @sock_addrlen(%struct.sockaddr* nocapture %0) {
%2 = getelementptr inbounds %struct.sockaddr, %struct.sockaddr* %0, i64 0, i32 0
%3 = load i32, i32* %2
%4 = and i32 %3, -2
%5 = icmp eq i32 %4, 128
%6 = select i1 %5, i32 4, i32 0
ret i32 %6
}
/* Variables and functions */
double powf(float, int);
float dormand_prince_scale(float tol, float err) {
  float sc = 1.25 * powf(err / tol, 1. / 5.);
  return 1. / ((sc > 1. / 2.) ? sc : (1. / 2.));
}


x86 assembly (clang, -O0):
<dormand_prince_scale>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
divss  -0x4(%rbp),%xmm0
xor    %edi,%edi
call   1030 <powf@plt>
movaps %xmm0,%xmm1
movsd  0xeca(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xea4(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    1179 <dormand_prince_scale+0x69>
movss  -0xc(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    118b <dormand_prince_scale+0x7b>
movsd  0xe7f(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    118b <dormand_prince_scale+0x7b>
movsd  -0x18(%rbp),%xmm1
movsd  0xe78(%rip),%xmm0
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dormand_prince_scale>:
push   %rax
divss  %xmm0,%xmm1
movaps %xmm1,%xmm0
xor    %edi,%edi
call   1030 <powf@plt>
mulsd  0xed9(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
cvtss2sd %xmm0,%xmm0
maxsd  0xed1(%rip),%xmm0
movsd  0xed1(%rip),%xmm1
divsd  %xmm0,%xmm1
xorps  %xmm0,%xmm0
cvtsd2ss %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @dormand_prince_scale(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %3
store float %1, float* %4
%6 = load float, float* %4
%7 = load float, float* %3
%8 = fdiv float %6, %7
%9 = call double @powf(float %8, i32 0)
%10 = fmul double 1.250000e+00, %9
%11 = fptrunc double %10 to float
store float %11, float* %5
%12 = load float, float* %5
%13 = fpext float %12 to double
%14 = fcmp ogt double %13, 5.000000e-01
br i1 %14, label %15, label %18
15: ; preds = %2
%16 = load float, float* %5
%17 = fpext float %16 to double
br label %19
18: ; preds = %2
br label %19
19: ; preds = %18, %15
%20 = phi double [ %17, %15 ], [ 5.000000e-01, %18 ]
%21 = fdiv double 1.000000e+00, %20
%22 = fptrunc double %21 to float
ret float %22
}

LLVM IR (-O2):
define float @dormand_prince_scale(float %0, float %1) {
%3 = fdiv float %1, %0
%4 = tail call double @powf(float %3, i32 0)
%5 = fmul double %4, 1.250000e+00
%6 = fptrunc double %5 to float
%7 = fpext float %6 to double
%8 = fcmp ogt double %7, 5.000000e-01
%9 = select i1 %8, double %7, double 5.000000e-01
%10 = fdiv double 1.000000e+00, %9
%11 = fptrunc double %10 to float
ret float %11
}
void gtk_tree_view_set_enable_search() {}


x86 assembly (clang, -O0):
<gtk_tree_view_set_enable_search>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_view_set_enable_search>:
ret

LLVM IR (-O0):
define void @gtk_tree_view_set_enable_search() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_view_set_enable_search() {
ret void
}
/* Variables and functions */
int ksft_test_num();
int /*<<< orphan*/ printf(char *, int);
void ksft_print_cnts(void) { printf("1..%d\n", ksft_test_num()); }


x86 assembly (clang, -O0):
<ksft_print_cnts>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <ksft_test_num@plt>
mov    %eax,%esi
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ksft_print_cnts>:
push   %rax
xor    %eax,%eax
call   1040 <ksft_test_num@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"1..%d\0A\00"
define void @ksft_print_cnts() {
%1 = call i32 (...) @ksft_test_num()
%2 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"1..%d\0A\00"
define void @ksft_print_cnts() {
%1 = tail call i32 (...) @ksft_test_num()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
void RTTlsAlloc(void) {}


x86 assembly (clang, -O0):
<RTTlsAlloc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTTlsAlloc>:
ret

LLVM IR (-O0):
define void @RTTlsAlloc() {
ret void
}

LLVM IR (-O2):
define void @RTTlsAlloc() {
ret void
}
/* Type definitions */
struct stat {
  int /*<<< orphan*/ st_mode;
};

/* Variables and functions */
int S_ISREG(int /*<<< orphan*/);
int lstat(char const *, struct stat *);
int mfr_isfile(const char *path) {
  struct stat buf;
  int ok = lstat(path, &buf);
  if (ok == -1)
    return -1;
  return S_ISREG(buf.st_mode);
}


x86 assembly (clang, -O0):
<mfr_isfile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <lstat@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0xffffffff,-0x1c(%rbp)
jne    1152 <mfr_isfile+0x32>
movl   $0xffffffff,-0x4(%rbp)
jmp    115d <mfr_isfile+0x3d>
mov    -0x18(%rbp),%edi
call   1040 <S_ISREG@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mfr_isfile>:
push   %rax
mov    %rsp,%rsi
call   1030 <lstat@plt>
cmp    $0xffffffff,%eax
je     1137 <mfr_isfile+0x17>
mov    (%rsp),%edi
pop    %rax
jmp    1040 <S_ISREG@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @mfr_isfile(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.stat
%5 = alloca i32
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @lstat(i8* %6, %struct.stat* %4)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = icmp eq i32 %8, -1
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 -1, i32* %2
br label %15
11: ; preds = %1
%12 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%13 = load i32, i32* %12
%14 = call i32 @S_ISREG(i32 %13)
store i32 %14, i32* %2
br label %15
15: ; preds = %11, %10
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @mfr_isfile(i8* nocapture %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i32 @lstat(i8* %0, %struct.stat* %2)
%5 = icmp eq i32 %4, -1
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%8 = load i32, i32* %7
%9 = tail call i32 @S_ISREG(i32 %8)
br label %10
10: ; preds = %1, %6
%11 = phi i32 [ %9, %6 ], [ -1, %1 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, ...);
int /*<<< orphan*/ stderr;
int main() {
  int i;
  fprintf(stderr, "addr=%p, size=%ld\n", &i, sizeof i);
#pragma omp target enter data map(alloc : i)
#pragma omp target exit data map(present, release : i)
  fprintf(stderr, "i is present\n");
#pragma omp target exit data map(present, release : i)
  fprintf(stderr, "i is present\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
lea    0xed1(%rip),%rsi
lea    -0x8(%rbp),%rdx
mov    $0x4,%ecx
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    0x2e9a(%rip),%rax
mov    (%rax),%edi
lea    0xec4(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    0x2e83(%rip),%rax
mov    (%rax),%edi
lea    0xead(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    0x2ec5(%rip),%r14
mov    (%r14),%edi
lea    0xedb(%rip),%rsi
lea    0x4(%rsp),%rdx
mov    $0x4,%ecx
xor    %eax,%eax
call   1030 <fprintf@plt>
mov    (%r14),%edi
lea    0xed3(%rip),%rbx
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <fprintf@plt>
mov    (%r14),%edi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [19 x i8] c"addr=%p, size=%ld\0A\00"
@.str.1 = [14 x i8] c"i is present\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* @stderr
%4 = call i32 (i32, i8*, ...) @fprintf(i32 %3, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32* %2, i64 4)
%5 = load i32, i32* @stderr
%6 = call i32 (i32, i8*, ...) @fprintf(i32 %5, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
%7 = load i32, i32* @stderr
%8 = call i32 (i32, i8*, ...) @fprintf(i32 %7, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [19 x i8] c"addr=%p, size=%ld\0A\00"
@.str.1 = [14 x i8] c"i is present\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = load i32, i32* @stderr
%4 = call i32 (i32, i8*, ...) @fprintf(i32 %3, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32* %1, i64 4)
%5 = load i32, i32* @stderr
%6 = call i32 (i32, i8*, ...) @fprintf(i32 %5, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
%7 = load i32, i32* @stderr
%8 = call i32 (i32, i8*, ...) @fprintf(i32 %7, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int PckBacpSerialRqtEx(unsigned char *, int, int, unsigned int,
                       unsigned char *);
int PckBacpSerialRqt(unsigned char *pAppBuf, int nAppBufLen, unsigned int nSeq,
                     unsigned char *pFrm) {
  return PckBacpSerialRqtEx(pAppBuf, nAppBufLen, 1, nSeq, pFrm);
}


x86 assembly (clang, -O0):
<PckBacpSerialRqt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%ecx
mov    -0x18(%rbp),%r8
mov    $0x1,%edx
call   1030 <PckBacpSerialRqtEx@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PckBacpSerialRqt>:
mov    %rcx,%r8
mov    %edx,%ecx
mov    $0x1,%edx
jmp    1030 <PckBacpSerialRqtEx@plt>

LLVM IR (-O0):
define i32 @PckBacpSerialRqt(i8* %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i8*, i8** %8
%13 = call i32 @PckBacpSerialRqtEx(i8* %9, i32 %10, i32 1, i32 %11, i8* %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @PckBacpSerialRqt(i8* %0, i32 %1, i32 %2, i8* %3) {
%5 = tail call i32 @PckBacpSerialRqtEx(i8* %0, i32 %1, i32 1, i32 %2, i8* %3)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ putchar(long);
void printn(long n) {
  long a;
  if (n < 0) {
    putchar('-');
    n = -n;
  }
  a = n / 10;
  if (a != 0) {
    printn(a);
  }
  putchar(n % 10 + '0');
}


x86 assembly (clang, -O0):
<printn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jge    114b <printn+0x2b>
mov    $0x2d,%edi
call   1040 <putchar@plt>
xor    %eax,%eax
sub    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0xa,%ecx
cqto
idiv   %rcx
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1171 <printn+0x51>
mov    -0x10(%rbp),%rdi
call   1030 <printn@plt>
mov    -0x8(%rbp),%rax
mov    $0xa,%ecx
cqto
idiv   %rcx
mov    %rdx,%rdi
add    $0x30,%rdi
call   1040 <putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printn>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
test   %rdi,%rdi
jns    1139 <printn+0x19>
mov    $0x2d,%edi
call   1040 <putchar@plt>
neg    %rbx
movabs $0xcccccccccccccccd,%r14
cc cc cc
cmp    $0xa,%rbx
jb     115b <printn+0x3b>
mov    %rbx,%rax
mul    %r14
mov    %rdx,%rdi
shr    $0x3,%rdi
call   1030 <printn@plt>
mov    %rbx,%rax
mul    %r14
shr    $0x2,%rdx
and    $0xfffffffffffffffe,%rdx
lea    (%rdx,%rdx,4),%rax
sub    %rax,%rbx
or     $0x30,%rbx
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <putchar@plt>

LLVM IR (-O0):
define void @printn(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = call i32 @putchar(i64 45)
%8 = load i64, i64* %2
%9 = sub nsw i64 0, %8
store i64 %9, i64* %2
br label %10
10: ; preds = %6, %1
%11 = load i64, i64* %2
%12 = sdiv i64 %11, 10
store i64 %12, i64* %3
%13 = load i64, i64* %3
%14 = icmp ne i64 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %10
%16 = load i64, i64* %3
br label %17
17: ; preds = %15, %10
%18 = load i64, i64* %2
%19 = srem i64 %18, 10
%20 = add nsw i64 %19, 48
%21 = call i32 @putchar(i64 %20)
ret void
}

LLVM IR (-O2):
define void @printn(i64 %0) {
%2 = icmp slt i64 %0, 0
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = tail call i32 @putchar(i64 45)
%5 = sub nsw i64 0, %0
br label %6
6: ; preds = %3, %1
%7 = phi i64 [ %5, %3 ], [ %0, %1 ]
%8 = icmp ult i64 %7, 10
br i1 %8, label %11, label %9
9: ; preds = %6
%10 = udiv i64 %7, 10
tail call void @printn(i64 %10)
br label %11
11: ; preds = %9, %6
%12 = urem i64 %7, 10
%13 = or i64 %12, 48
%14 = tail call i32 @putchar(i64 %13)
ret void
}
/* Type definitions */
typedef int uint8_t;
struct list_head {
  int dummy;
};

/* Variables and functions */
uint8_t update_3592_encryption_mode(struct list_head *m, void *p, int value) {
  ;
  return 0x00;
}


x86 assembly (clang, -O0):
<update_3592_encryption_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<update_3592_encryption_mode>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.list_head = type { i32 }
define i32 @update_3592_encryption_mode(%struct.list_head* %0, i8* %1, i32 %2) {
%4 = alloca %struct.list_head*
%5 = alloca i8*
%6 = alloca i32
store %struct.list_head* %0, %struct.list_head** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
%struct.list_head = type { i32 }
define i32 @update_3592_encryption_mode(%struct.list_head* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
ret i32 0
}
void subtract(struct DynArr *stack) {}


x86 assembly (clang, -O0):
<subtract>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<subtract>:
ret

LLVM IR (-O0):
%struct.DynArr = type opaque
define void @subtract(%struct.DynArr* %0) {
%2 = alloca %struct.DynArr*
store %struct.DynArr* %0, %struct.DynArr** %2
ret void
}

LLVM IR (-O2):
%struct.DynArr = type opaque
define void @subtract(%struct.DynArr* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint8_t;

/* Variables and functions */
uint8_t hci_event_extended_inquiry_response_get_reserved(const uint8_t *event) {
  return event[10];
}


x86 assembly (clang, -O0):
<hci_event_extended_inquiry_response_get_reserved>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x28(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hci_event_extended_inquiry_response_get_reserved>:
mov    0x28(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @hci_event_extended_inquiry_response_get_reserved(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 10
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @hci_event_extended_inquiry_response_get_reserved(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 10
%3 = load i32, i32* %2
ret i32 %3
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int send_event;
};
typedef TYPE_1__ XMapEvent;

/* Variables and functions */
void set_XMapEvent_send_event(void *_p, int _v) {
  ((XMapEvent *)_p)->send_event = (int)_v;
}


x86 assembly (clang, -O0):
<set_XMapEvent_send_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XMapEvent_send_event>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XMapEvent_send_event(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XMapEvent_send_event(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int f(int);
int main() {
  int i = 0;
  while (i < 10) {
    i = 1 + f(i);
  }
  return i;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    1143 <main+0x33>
mov    -0x8(%rbp),%edi
call   1030 <f@plt>
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
call   1030 <f@plt>
lea    0x1(%rax),%edi
cmp    $0x9,%eax
jl     1120 <main+0x10>
mov    %edi,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %10
6: ; preds = %3
%7 = load i32, i32* %2
%8 = call i32 @f(i32 %7)
%9 = add nsw i32 1, %8
store i32 %9, i32* %2
br label %3
10: ; preds = %3
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @f(i32 %2)
%4 = add nsw i32 %3, 1
%5 = icmp slt i32 %3, 9
br i1 %5, label %1, label %6
6: ; preds = %1
ret i32 %4
}