xunge/DecIR huggingface dataset:
void StrClear(char *s) {
  if (s != 0)
    *s = 0;
}


x86 assembly (clang, -O0):
<StrClear>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     111a <StrClear+0x1a>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<StrClear>:
test   %rdi,%rdi
je     1108 <StrClear+0x8>
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @StrClear(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i8*, i8** %2
store i8 0, i8* %6
br label %7
7: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @StrClear(i8* writeonly %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %4, label %3
3: ; preds = %1
store i8 0, i8* %0
br label %4
4: ; preds = %3, %1
ret void
}
void gnttab_address_of() {}


x86 assembly (clang, -O0):
<gnttab_address_of>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gnttab_address_of>:
ret

LLVM IR (-O0):
define void @gnttab_address_of() {
ret void
}

LLVM IR (-O2):
define void @gnttab_address_of() {
ret void
}
/* Variables and functions */
char const *esc_shell_multi(char const **, int, char *);
const char *esc_shell(const char *str, char *buffer) {
  return esc_shell_multi(&str, 1, buffer);
}


x86 assembly (clang, -O0):
<esc_shell>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
lea    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <esc_shell_multi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<esc_shell>:
push   %rax
mov    %rsi,%rdx
mov    %rdi,(%rsp)
mov    %rsp,%rdi
mov    $0x1,%esi
call   1030 <esc_shell_multi@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i8* @esc_shell(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i8* @esc_shell_multi(i8** %3, i32 1, i8* %5)
ret i8* %6
}

LLVM IR (-O2):
define i8* @esc_shell(i8* %0, i8* %1) {
%3 = alloca i8*
store i8* %0, i8** %3
%4 = call i8* @esc_shell_multi(i8** %3, i32 1, i8* %1)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ ai_1();
int /*<<< orphan*/ ai_2();
void f14(int a) {
  extern void f14_end(void);
  if (a)
    ai_2();
  ai_1();
  f14_end();
}


x86 assembly (clang, -O0):
<f14>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     114c <f14+0x1c>
mov    $0x0,%al
call   1040 <ai_2@plt>
mov    $0x0,%al
call   1030 <ai_1@plt>
call   1050 <f14_end@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f14>:
push   %rax
test   %edi,%edi
je     113c <f14+0xc>
xor    %eax,%eax
call   1040 <ai_2@plt>
xor    %eax,%eax
call   1030 <ai_1@plt>
pop    %rax
jmp    1050 <f14_end@plt>

LLVM IR (-O0):
define void @f14(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @ai_2()
br label %7
7: ; preds = %5, %1
%8 = call i32 (...) @ai_1()
ret void
}

LLVM IR (-O2):
define void @f14(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 (...) @ai_2()
br label %5
5: ; preds = %3, %1
%6 = tail call i32 (...) @ai_1()
tail call void @f14_end()
ret void
}
int juniper_interp_get_cores(struct juniper_fpga_device *dev) { return 1; }


x86 assembly (clang, -O0):
<juniper_interp_get_cores>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<juniper_interp_get_cores>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.juniper_fpga_device = type opaque
define i32 @juniper_interp_get_cores(%struct.juniper_fpga_device* %0) {
%2 = alloca %struct.juniper_fpga_device*
store %struct.juniper_fpga_device* %0, %struct.juniper_fpga_device** %2
ret i32 1
}

LLVM IR (-O2):
%struct.juniper_fpga_device = type opaque
define i32 @juniper_interp_get_cores(%struct.juniper_fpga_device* nocapture readnone %0) {
ret i32 1
}
int fgt(float x, float y) {
  if (x > y)
    return 13;
  else
    return 140;
}


x86 assembly (clang, -O0):
<fgt>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    1129 <fgt+0x29>
movl   $0xd,-0x4(%rbp)
jmp    1130 <fgt+0x30>
movl   $0x8c,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgt>:
ucomiss %xmm1,%xmm0
mov    $0xd,%ecx
mov    $0x8c,%eax
cmova  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @fgt(float %0, float %1) {
%3 = alloca i32
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %4
%7 = load float, float* %5
%8 = fcmp ogt float %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 13, i32* %3
br label %11
10: ; preds = %2
store i32 140, i32* %3
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @fgt(float %0, float %1) {
%3 = fcmp ogt float %0, %1
%4 = select i1 %3, i32 13, i32 140
ret i32 %4
}
void create_setOf_int(void *newSet) { return; }


x86 assembly (clang, -O0):
<create_setOf_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_setOf_int>:
ret

LLVM IR (-O0):
define void @create_setOf_int(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @create_setOf_int(i8* nocapture %0) {
ret void
}
void ubi_dbg_dump_mkvol_req(const struct ubi_mkvol_req *req) { return; }


x86 assembly (clang, -O0):
<ubi_dbg_dump_mkvol_req>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ubi_dbg_dump_mkvol_req>:
ret

LLVM IR (-O0):
%struct.ubi_mkvol_req = type opaque
define void @ubi_dbg_dump_mkvol_req(%struct.ubi_mkvol_req* %0) {
%2 = alloca %struct.ubi_mkvol_req*
store %struct.ubi_mkvol_req* %0, %struct.ubi_mkvol_req** %2
ret void
}

LLVM IR (-O2):
%struct.ubi_mkvol_req = type opaque
define void @ubi_dbg_dump_mkvol_req(%struct.ubi_mkvol_req* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ serie_repetition(int);
int main(int argc, const char *argv[]) {
  int n;
  serie_repetition(n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x14(%rbp),%edi
call   1030 <serie_repetition@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <serie_repetition@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i32, i32* %6
%8 = call i32 @serie_repetition(i32 %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @serie_repetition(i32 undef)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ setenv(char const *, char const *, int);
void env_set(const char name[], const char value[]) { setenv(name, value, 1); }


x86 assembly (clang, -O0):
<env_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <setenv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<env_set>:
mov    $0x1,%edx
jmp    1030 <setenv@plt>

LLVM IR (-O0):
define void @env_set(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @setenv(i8* %5, i8* %6, i32 1)
ret void
}

LLVM IR (-O2):
define void @env_set(i8* %0, i8* %1) {
%3 = tail call i32 @setenv(i8* %0, i8* %1, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void *ba_free(void *ptr) {
  if (ptr == NULL)
    return ptr;
  ptr = (void *)ptr - sizeof(size_t);
  free(ptr);
  return NULL;
}


x86 assembly (clang, -O0):
<ba_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1134 <ba_free+0x24>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1151 <ba_free+0x41>
mov    -0x10(%rbp),%rax
add    $0xfffffffffffffff8,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ba_free>:
test   %rdi,%rdi
je     1123 <ba_free+0x13>
push   %rax
add    $0xfffffffffffffff8,%rdi
call   1030 <free@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @ba_free(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i8*, i8** %3
store i8* %7, i8** %2
br label %13
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = getelementptr i8, i8* %9, i64 -8
store i8* %10, i8** %3
%11 = load i8*, i8** %3
%12 = call i32 @free(i8* %11)
store i8* null, i8** %2
br label %13
13: ; preds = %8, %6
%14 = load i8*, i8** %2
ret i8* %14
}

LLVM IR (-O2):
define noalias i8* @ba_free(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = getelementptr i8, i8* %0, i64 -8
%5 = tail call i32 @free(i8* %4)
br label %6
6: ; preds = %1, %3
ret i8* null
}
__typeof__(strdup("")) test_strdup_157(void) { return strdup(""); }


x86 assembly (clang, -O0):
<test_strdup_157>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <strdup@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_strdup_157>:
lea    0xee9(%rip),%rdi
jmp    1030 <strdup@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @test_strdup_157() {
%1 = call i8* @strdup(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define noalias i8* @test_strdup_157() {
%1 = tail call dereferenceable_or_null(1) i8* @strdup(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
short int fn7(short int x, unsigned long long y) { return x << y; }


x86 assembly (clang, -O0):
<fn7>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
movswl -0x2(%rbp),%eax
mov    -0x10(%rbp),%rcx
shl    %cl,%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn7>:
mov    %rsi,%rcx
movzwl %di,%eax
shl    %cl,%eax
ret

LLVM IR (-O0):
define signext i16 @fn7(i16 signext %0, i64 %1) {
%3 = alloca i16
%4 = alloca i64
store i16 %0, i16* %3
store i64 %1, i64* %4
%5 = load i16, i16* %3
%6 = sext i16 %5 to i32
%7 = load i64, i64* %4
%8 = trunc i64 %7 to i32
%9 = shl i32 %6, %8
%10 = trunc i32 %9 to i16
ret i16 %10
}

LLVM IR (-O2):
define signext i16 @fn7(i16 signext %0, i64 %1) {
%3 = zext i16 %0 to i32
%4 = trunc i64 %1 to i32
%5 = shl i32 %3, %4
%6 = trunc i32 %5 to i16
ret i16 %6
}
/* Variables and functions */
int i2c_write_byte(int, int);
int display_disable() { return i2c_write_byte(0x80, 0x08); }


x86 assembly (clang, -O0):
<display_disable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x80,%edi
mov    $0x8,%esi
call   1030 <i2c_write_byte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_disable>:
mov    $0x80,%edi
mov    $0x8,%esi
jmp    1030 <i2c_write_byte@plt>

LLVM IR (-O0):
define i32 @display_disable() {
%1 = call i32 @i2c_write_byte(i32 128, i32 8)
ret i32 %1
}

LLVM IR (-O2):
define i32 @display_disable() {
%1 = tail call i32 @i2c_write_byte(i32 128, i32 8)
ret i32 %1
}
/* Type definitions */
struct module {
  int dummy;
};

/* Variables and functions */
void *module_getsym(struct module *, char const *);
int /*<<< orphan*/ printf(char *, char const *);
int testVarLL(struct module *mod, const char *name, long long int val) {
  void *var = module_getsym(mod, name);
  if (!var) {
    printf("ERROR: Can't find %s\n", name);
  }
  return *((long long int *)var) == val;
}


x86 assembly (clang, -O0):
<testVarLL>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <module_getsym@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1160 <testVarLL+0x40>
mov    -0x10(%rbp),%rsi
lea    0xea5(%rip),%rdi
call   1040 <printf@plt>
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
cmp    -0x18(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testVarLL>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
call   1030 <module_getsym@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1147 <testVarLL+0x27>
lea    0xec1(%rip),%rdi
mov    %r15,%rsi
call   1040 <printf@plt>
xor    %eax,%eax
cmp    %r14,(%rbx)
sete   %al
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.module = type { i32 }
@.str = [22 x i8] c"ERROR: Can't find %s\0A\00"
define i32 @testVarLL(%struct.module* %0, i8* %1, i64 %2) {
%4 = alloca %struct.module*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
store %struct.module* %0, %struct.module** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load %struct.module*, %struct.module** %4
%9 = load i8*, i8** %5
%10 = call i8* @module_getsym(%struct.module* %8, i8* %9)
store i8* %10, i8** %7
%11 = load i8*, i8** %7
%12 = icmp ne i8* %11, null
br i1 %12, label %16, label %13
13: ; preds = %3
%14 = load i8*, i8** %5
%15 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %14)
br label %16
16: ; preds = %13, %3
%17 = load i8*, i8** %7
%18 = bitcast i8* %17 to i64*
%19 = load i64, i64* %18
%20 = load i64, i64* %6
%21 = icmp eq i64 %19, %20
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
%struct.module = type { i32 }
@.str = [22 x i8] c"ERROR: Can't find %s\0A\00"
define i32 @testVarLL(%struct.module* %0, i8* %1, i64 %2) {
%4 = tail call i8* @module_getsym(%struct.module* %0, i8* %1)
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %1)
br label %8
8: ; preds = %6, %3
%9 = bitcast i8* %4 to i64*
%10 = load i64, i64* %9
%11 = icmp eq i64 %10, %2
%12 = zext i1 %11 to i32
ret i32 %12
}
/* Type definitions */
struct comp {
  int dummy;
};
struct BrzNullAdapt_ {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ SEND_ACKDOWN(int);
void BrzNullAdapt_ackdown(struct comp *comp, int port) {
  struct BrzNullAdapt_ *c = (struct BrzNullAdapt_ *)comp;
  SEND_ACKDOWN(1);
}


x86 assembly (clang, -O0):
<BrzNullAdapt_ackdown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    $0x1,%edi
call   1030 <SEND_ACKDOWN@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BrzNullAdapt_ackdown>:
mov    $0x1,%edi
jmp    1030 <SEND_ACKDOWN@plt>

LLVM IR (-O0):
%struct.comp = type { i32 }
%struct.BrzNullAdapt_ = type { i32 }
define void @BrzNullAdapt_ackdown(%struct.comp* %0, i32 %1) {
%3 = alloca %struct.comp*
%4 = alloca i32
%5 = alloca %struct.BrzNullAdapt_*
store %struct.comp* %0, %struct.comp** %3
store i32 %1, i32* %4
%6 = load %struct.comp*, %struct.comp** %3
%7 = bitcast %struct.comp* %6 to %struct.BrzNullAdapt_*
store %struct.BrzNullAdapt_* %7, %struct.BrzNullAdapt_** %5
%8 = call i32 @SEND_ACKDOWN(i32 1)
ret void
}

LLVM IR (-O2):
%struct.comp = type { i32 }
define void @BrzNullAdapt_ackdown(%struct.comp* nocapture readnone %0, i32 %1) {
%3 = tail call i32 @SEND_ACKDOWN(i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ f1(int);
int main(int argc, char *argv[]) {
  f1(1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%edi
call   1030 <f1@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <f1@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @f1(i32 1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @f1(i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ color_set(short, void *);
int t_color_set(short color_pair, void *opts) { color_set(color_pair, opts); }


x86 assembly (clang, -O0):
<t_color_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x6(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x6(%rbp),%ax
mov    -0x10(%rbp),%rsi
movswl %ax,%edi
call   1030 <color_set@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_color_set>:
jmp    1030 <color_set@plt>

LLVM IR (-O0):
define i32 @t_color_set(i16 signext %0, i8* %1) {
%3 = alloca i32
%4 = alloca i16
%5 = alloca i8*
store i16 %0, i16* %4
store i8* %1, i8** %5
%6 = load i16, i16* %4
%7 = load i8*, i8** %5
%8 = call i32 @color_set(i16 signext %6, i8* %7)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @t_color_set(i16 signext %0, i8* %1) {
%3 = tail call i32 @color_set(i16 signext %0, i8* %1)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ varClearAll();
void varExit(void) { varClearAll(); }


x86 assembly (clang, -O0):
<varExit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <varClearAll@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<varExit>:
xor    %eax,%eax
jmp    1030 <varClearAll@plt>

LLVM IR (-O0):
define void @varExit() {
%1 = call i32 (...) @varClearAll()
ret void
}

LLVM IR (-O2):
define void @varExit() {
%1 = tail call i32 (...) @varClearAll()
ret void
}
unsigned long hash(const char *s) {
  unsigned long h = 0;
  while (*s)
    h = (h << 5) + h + (unsigned char)*s++;
  return h;
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1147 <hash+0x47>
mov    -0x10(%rbp),%rax
shl    $0x5,%rax
add    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movzbl (%rcx),%ecx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <hash+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     112c <hash+0x2c>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
mov    %rax,%rdx
shl    $0x5,%rdx
add    %rax,%rdx
movzbl %cl,%eax
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %18
8: ; preds = %4
%9 = load i64, i64* %3
%10 = shl i64 %9, 5
%11 = load i64, i64* %3
%12 = add i64 %10, %11
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %2
%15 = load i8, i8* %13
%16 = zext i8 %15 to i64
%17 = add i64 %12, %16
store i64 %17, i64* %3
br label %4
18: ; preds = %4
%19 = load i64, i64* %3
ret i64 %19
}

LLVM IR (-O2):
define i64 @hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i64 [ %11, %4 ], [ 0, %1 ]
%7 = phi i8* [ %9, %4 ], [ %0, %1 ]
%8 = mul i64 %6, 33
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = zext i8 %5 to i64
%11 = add i64 %8, %10
%12 = load i8, i8* %9
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ 0, %1 ], [ %11, %4 ]
ret i64 %15
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int sub1(void) {
  printf("sub1\n");
  return 0;
}


x86 assembly (clang, -O0):
<sub1>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub1>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"sub1\0A\00"
define i32 @sub1() {
%1 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [5 x i8] c"sub1\00"
define i32 @sub1() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ generate_hlt_segv(int);
int /*<<< orphan*/ install_signal_handler();
int main(int argc, char **argv) {
  install_signal_handler();
  generate_hlt_segv(1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <install_signal_handler@plt>
mov    $0x1,%edi
call   1030 <generate_hlt_segv@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <install_signal_handler@plt>
mov    $0x1,%edi
call   1030 <generate_hlt_segv@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @install_signal_handler()
%7 = call i32 @generate_hlt_segv(i32 1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @install_signal_handler()
%4 = tail call i32 @generate_hlt_segv(i32 1)
ret i32 0
}
__attribute__((noreturn, weak)) void _default_exit(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<_default_exit>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <_default_exit+0x9>
jmp    1109 <_default_exit+0x9>

x86 assembly (clang, -O2):
<_default_exit>:
jmp    1100 <_default_exit>

LLVM IR (-O0):
define weak void @_default_exit() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define weak void @_default_exit() {
br label %1
1: ; preds = %0, %1
br label %1
}
void WF_EintDisable() {
  *(volatile unsigned *)(0xBF800000 + (0x100c4 + ((0) << 4))) = (1 << 4);
}


x86 assembly (clang, -O0):
<WF_EintDisable>:
push   %rbp
mov    %rsp,%rbp
mov    $0xbf8100c4,%eax
movl   $0x10,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<WF_EintDisable>:
mov    $0xbf8100c4,%eax
movl   $0x10,(%rax)
ret

LLVM IR (-O0):
define void @WF_EintDisable() {
store volatile i32 16, i32* inttoptr (i64 3212902596 to i32*)
ret void
}

LLVM IR (-O2):
define void @WF_EintDisable() {
store volatile i32 16, i32* inttoptr (i64 3212902596 to i32*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void h(void) { printf("h() called\n"); }


x86 assembly (clang, -O0):
<h>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<h>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"h() called\0A\00"
define void @h() {
%1 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [11 x i8] c"h() called\00"
define void @h() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
ret void
}
unsigned int hash_str(unsigned int buckets, void *key) {
  char *sno = (char *)key;
  unsigned int index = 0;
  while (*sno) {
    index = *sno + 4 * index;
    sno++;
  }
  return index % buckets;
}


x86 assembly (clang, -O0):
<hash_str>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     114a <hash_str+0x4a>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
mov    -0x1c(%rbp),%ecx
shl    $0x2,%ecx
add    %ecx,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    111a <hash_str+0x1a>
mov    -0x1c(%rbp),%eax
xor    %edx,%edx
divl   -0x4(%rbp)
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_str>:
mov    (%rsi),%cl
test   %cl,%cl
je     1123 <hash_str+0x23>
add    $0x1,%rsi
xor    %eax,%eax
nopl   0x0(%rax)
movsbl %cl,%ecx
lea    (%rcx,%rax,4),%eax
movzbl (%rsi),%ecx
add    $0x1,%rsi
test   %cl,%cl
jne    1110 <hash_str+0x10>
jmp    1125 <hash_str+0x25>
xor    %eax,%eax
xor    %edx,%edx
div    %edi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @hash_str(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%7 = load i8*, i8** %4
store i8* %7, i8** %5
store i32 0, i32* %6
br label %8
8: ; preds = %12, %2
%9 = load i8*, i8** %5
%10 = load i8, i8* %9
%11 = icmp ne i8 %10, 0
br i1 %11, label %12, label %21
12: ; preds = %8
%13 = load i8*, i8** %5
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = load i32, i32* %6
%17 = mul i32 4, %16
%18 = add i32 %15, %17
store i32 %18, i32* %6
%19 = load i8*, i8** %5
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %5
br label %8
21: ; preds = %8
%22 = load i32, i32* %6
%23 = load i32, i32* %3
%24 = urem i32 %22, %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @hash_str(i32 %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %13, %5 ], [ %3, %2 ]
%7 = phi i32 [ %11, %5 ], [ 0, %2 ]
%8 = phi i8* [ %12, %5 ], [ %1, %2 ]
%9 = sext i8 %6 to i32
%10 = shl i32 %7, 2
%11 = add i32 %10, %9
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %2
%16 = phi i32 [ 0, %2 ], [ %11, %5 ]
%17 = urem i32 %16, %0
ret i32 %17
}
/* Variables and functions */
int /*<<< orphan*/ test_clear();
int /*<<< orphan*/ test_itr();
int main() {
  test_clear();
  test_itr();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <test_clear@plt>
mov    $0x0,%al
call   1030 <test_itr@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <test_clear@plt>
xor    %eax,%eax
call   1030 <test_itr@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_clear()
%3 = call i32 (...) @test_itr()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_clear()
%2 = tail call i32 (...) @test_itr()
ret i32 0
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int IoRegisterDeviceInterface(int PhysicalDeviceObject, int InterfaceClassGuid,
                              int ReferenceString, int SymbolicLinkName) {
  {
    int tmp_ndt_8;
    tmp_ndt_8 = __VERIFIER_nondet_int();
    if (tmp_ndt_8 == 0) {
      goto switch_6_0;
    } else {
      goto switch_6_default;
      if (0) {
      switch_6_0:
        return (0);
      switch_6_default:;
        return (-1073741808);
      } else {
      }
    }
  }
}


x86 assembly (clang, -O0):
<IoRegisterDeviceInterface>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jne    113d <IoRegisterDeviceInterface+0x2d>
jmp    1142 <IoRegisterDeviceInterface+0x32>
jmp    114e <IoRegisterDeviceInterface+0x3e>
movl   $0x0,-0x4(%rbp)
jmp    1155 <IoRegisterDeviceInterface+0x45>
movl   $0xc0000010,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IoRegisterDeviceInterface>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
test   %eax,%eax
mov    $0xc0000010,%ecx
cmovne %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @IoRegisterDeviceInterface(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
%11 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %11, i32* %10
%12 = load i32, i32* %10
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %4
br label %18
15: ; preds = %4
br label %19
16: ; No predecessors!
br i1 false, label %17, label %20
17: ; preds = %16
br label %18
18: ; preds = %17, %14
store i32 0, i32* %5
br label %22
19: ; preds = %15
store i32 -1073741808, i32* %5
br label %22
20: ; preds = %16
br label %21
21: ; preds = %20
br label %22
22: ; preds = %18, %19, %21
%23 = load i32, i32* %5
ret i32 %23
}

LLVM IR (-O2):
define i32 @IoRegisterDeviceInterface(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 (...) @__VERIFIER_nondet_int()
%6 = icmp eq i32 %5, 0
%7 = select i1 %6, i32 0, i32 -1073741808
ret i32 %7
}
/* Variables and functions */
double exp(double);
double log(double);
double dB_to_exp(double value) {
  double x = (0.935718067 + 0.045115616 * log(exp(log(10.0) / 20.0 * (value))));
  return x;
}


x86 assembly (clang, -O0):
<dB_to_exp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xee3(%rip),%xmm0
call   1040 <log@plt>
movsd  0xece(%rip),%xmm1
divsd  %xmm1,%xmm0
mulsd  -0x8(%rbp),%xmm0
call   1030 <exp@plt>
call   1040 <log@plt>
movsd  0xea3(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xe9f(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dB_to_exp>:
push   %rax
mulsd  0xed7(%rip),%xmm0
call   1030 <exp@plt>
call   1040 <log@plt>
mulsd  0xecd(%rip),%xmm0
addsd  0xecd(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @dB_to_exp(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = call double @log(double 1.000000e+01)
%5 = fdiv double %4, 2.000000e+01
%6 = load double, double* %2
%7 = fmul double %5, %6
%8 = call double @exp(double %7)
%9 = call double @log(double %8)
%10 = call double @llvm.fmuladd.f64(double 0x3FA71964DE848DCC, double %9, double 0x3FEDF167040152A2)
store double %10, double* %3
%11 = load double, double* %3
ret double %11
}

LLVM IR (-O2):
define double @dB_to_exp(double %0) {
%2 = fmul double %0, 0x3FBD791C5F888823
%3 = tail call double @exp(double %2)
%4 = tail call double @log(double %3)
%5 = tail call double @llvm.fmuladd.f64(double %4, double 0x3FA71964DE848DCC, double 0x3FEDF167040152A2)
ret double %5
}
void argv_free(char **argv) {
  char **p;
  for (p = argv; *p; p++)
    free(*p);
  free(argv);
}


x86 assembly (clang, -O0):
<argv_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
je     114f <argv_free+0x3f>
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x10(%rbp)
jmp    1124 <argv_free+0x14>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<argv_free>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1141 <argv_free+0x31>
lea    0x8(%r14),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
call   1030 <free@plt>
mov    (%rbx),%rdi
add    $0x8,%rbx
test   %rdi,%rdi
jne    1130 <argv_free+0x20>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @argv_free(i8** %0) {
%2 = alloca i8**
%3 = alloca i8**
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
store i8** %4, i8*** %3
br label %5
5: ; preds = %12, %1
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %6
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i8**, i8*** %3
%11 = load i8*, i8** %10
br label %12
12: ; preds = %9
%13 = load i8**, i8*** %3
%14 = getelementptr inbounds i8*, i8** %13, i32 1
store i8** %14, i8*** %3
br label %5
15: ; preds = %5
%16 = load i8**, i8*** %2
%17 = bitcast i8** %16 to i8*
ret void
}

LLVM IR (-O2):
define void @argv_free(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = icmp eq i8* %2, null
br i1 %3, label %10, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %8, %4 ], [ %2, %1 ]
%6 = phi i8** [ %7, %4 ], [ %0, %1 ]
tail call void @free(i8* %5)
%7 = getelementptr inbounds i8*, i8** %6, i64 1
%8 = load i8*, i8** %7
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %4
10: ; preds = %4, %1
%11 = bitcast i8** %0 to i8*
tail call void @free(i8* %11)
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ bswap64(int /*<<< orphan*/);
int /*<<< orphan*/ memcpy(int *, int /*<<< orphan*/ *, int);
void minipack_pack_double(void *ptr, double value, size_t *sz) {
  *sz = 9;
  uint8_t *buffer = ptr;
  uint64_t *value_ptr = (uint64_t *)&value;
  uint64_t valueBytes = (uint64_t)bswap64(*value_ptr);
  buffer[0] = 0xCB;
  buffer = buffer + 1;
  memcpy(buffer, &valueBytes, 8);
}


x86 assembly (clang, -O0):
<minipack_pack_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movq   $0x9,(%rax)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
lea    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    (%rax),%edi
call   1040 <bswap64@plt>
mov    %eax,-0x2c(%rbp)
mov    -0x20(%rbp),%rax
movl   $0xcb,(%rax)
mov    -0x20(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
lea    -0x2c(%rbp),%rsi
mov    $0x8,%edx
call   1030 <memcpy@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<minipack_pack_double>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movq   $0x9,(%rsi)
movq   %xmm0,%rdi
call   1040 <bswap64@plt>
mov    %eax,0xc(%rsp)
movl   $0xcb,(%rbx)
add    $0x4,%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
mov    $0x8,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @minipack_pack_double(i8* %0, double %1, i64* %2) {
%4 = alloca i8*
%5 = alloca double
%6 = alloca i64*
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32
store i8* %0, i8** %4
store double %1, double* %5
store i64* %2, i64** %6
%10 = load i64*, i64** %6
store i64 9, i64* %10
%11 = load i8*, i8** %4
%12 = bitcast i8* %11 to i32*
store i32* %12, i32** %7
%13 = bitcast double* %5 to i32*
store i32* %13, i32** %8
%14 = load i32*, i32** %8
%15 = load i32, i32* %14
%16 = call i32 @bswap64(i32 %15)
store i32 %16, i32* %9
%17 = load i32*, i32** %7
%18 = getelementptr inbounds i32, i32* %17, i64 0
store i32 203, i32* %18
%19 = load i32*, i32** %7
%20 = getelementptr inbounds i32, i32* %19, i64 1
store i32* %20, i32** %7
%21 = load i32*, i32** %7
%22 = call i32 @memcpy(i32* %21, i32* %9, i32 8)
ret void
}

LLVM IR (-O2):
define void @minipack_pack_double(i8* %0, double %1, i64* nocapture writeonly %2) {
%4 = alloca i32
store i64 9, i64* %2
%5 = bitcast i8* %0 to i32*
%6 = bitcast i32* %4 to i8*
%7 = bitcast double %1 to i64
%8 = trunc i64 %7 to i32
%9 = tail call i32 @bswap64(i32 %8)
store i32 %9, i32* %4
store i32 203, i32* %5
%10 = getelementptr inbounds i8, i8* %0, i64 4
%11 = bitcast i8* %10 to i32*
%12 = call i32 @memcpy(i32* %11, i32* %4, i32 8)
ret void
}
emit4(arg) long arg;
{
  emit2((int)(arg));
  emit2((int)(arg >> 16));
}


x86 assembly (clang, -O0):
<emit4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,%edi
mov    $0x0,%al
call   1030 <emit2@plt>
mov    -0x10(%rbp),%rax
sar    $0x10,%rax
mov    %eax,%edi
mov    $0x0,%al
call   1030 <emit2@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit4>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <emit2@plt>
shr    $0x10,%rbx
mov    %ebx,%edi
xor    %eax,%eax
pop    %rbx
jmp    1030 <emit2@plt>

LLVM IR (-O0):
define i32 @emit4(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = trunc i64 %4 to i32
%6 = call i32 (i32, ...) bitcast (i32 (...)* @emit2 to i32 (i32, ...)*)(i32 %5)
%7 = load i64, i64* %3
%8 = ashr i64 %7, 16
%9 = trunc i64 %8 to i32
%10 = call i32 (i32, ...) bitcast (i32 (...)* @emit2 to i32 (i32, ...)*)(i32 %9)
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @emit4(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @emit2 to i32 (i32, ...)*)(i32 %2)
%4 = lshr i64 %0, 16
%5 = trunc i64 %4 to i32
%6 = tail call i32 (i32, ...) bitcast (i32 (...)* @emit2 to i32 (i32, ...)*)(i32 %5)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ pic16_core_instruction(int);
void pic16_goto100000(void) {
  pic16_core_instruction(0xEF00);
  pic16_core_instruction(0xF800);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0xef00,%edi
call   1030 <pic16_core_instruction@plt>
mov    $0xf800,%edi
call   1030 <pic16_core_instruction@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
mov    $0xef00,%edi
call   1030 <pic16_core_instruction@plt>
mov    $0xf800,%edi
pop    %rax
jmp    1030 <pic16_core_instruction@plt>

LLVM IR (-O0):
define void @pic16_goto100000() {
%1 = call i32 @pic16_core_instruction(i32 61184)
%2 = call i32 @pic16_core_instruction(i32 63488)
ret void
}

LLVM IR (-O2):
define void @pic16_goto100000() {
%1 = tail call i32 @pic16_core_instruction(i32 61184)
%2 = tail call i32 @pic16_core_instruction(i32 63488)
ret void
}
int writemask_xy(const int writemask) { return (writemask == 0x3); }


x86 assembly (clang, -O0):
<writemask_xy>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x3,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<writemask_xy>:
xor    %eax,%eax
cmp    $0x3,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @writemask_xy(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 3
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @writemask_xy(i32 %0) {
%2 = icmp eq i32 %0, 3
%3 = zext i1 %2 to i32
ret i32 %3
}
void VecSelfNegate3fv(float v[3]) {
  v[0] = -v[0];
  v[1] = -v[1];
  v[2] = -v[2];
}


x86 assembly (clang, -O0):
<VecSelfNegate3fv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<VecSelfNegate3fv>:
movaps 0xef9(%rip),%xmm0
movss  (%rdi),%xmm1
movss  0x4(%rdi),%xmm2
movss  0x8(%rdi),%xmm3
xorps  %xmm0,%xmm1
movss  %xmm1,(%rdi)
xorps  %xmm0,%xmm2
movss  %xmm2,0x4(%rdi)
xorps  %xmm0,%xmm3
movss  %xmm3,0x8(%rdi)
ret

LLVM IR (-O0):
define void @VecSelfNegate3fv(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 0
%5 = load float, float* %4
%6 = fneg float %5
%7 = load float*, float** %2
%8 = getelementptr inbounds float, float* %7, i64 0
store float %6, float* %8
%9 = load float*, float** %2
%10 = getelementptr inbounds float, float* %9, i64 1
%11 = load float, float* %10
%12 = fneg float %11
%13 = load float*, float** %2
%14 = getelementptr inbounds float, float* %13, i64 1
store float %12, float* %14
%15 = load float*, float** %2
%16 = getelementptr inbounds float, float* %15, i64 2
%17 = load float, float* %16
%18 = fneg float %17
%19 = load float*, float** %2
%20 = getelementptr inbounds float, float* %19, i64 2
store float %18, float* %20
ret void
}

LLVM IR (-O2):
define void @VecSelfNegate3fv(float* nocapture %0) {
%2 = load float, float* %0
%3 = fneg float %2
store float %3, float* %0
%4 = getelementptr inbounds float, float* %0, i64 1
%5 = load float, float* %4
%6 = fneg float %5
store float %6, float* %4
%7 = getelementptr inbounds float, float* %0, i64 2
%8 = load float, float* %7
%9 = fneg float %8
store float %9, float* %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ HangUp(int);
int WriteData(int, void *, unsigned int);
int /*<<< orphan*/ printf(char *);
int Send(int sock, void *data, unsigned int size) {
  int w;
  if ((w = WriteData(sock, data, size)) > 0)
    return (1);
  printf("uncapable of sending data\n");
  HangUp(sock);
  return -1;
}


x86 assembly (clang, -O0):
<Send>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1050 <WriteData@plt>
mov    %eax,-0x18(%rbp)
cmp    $0x0,%eax
jle    1169 <Send+0x39>
movl   $0x1,-0x4(%rbp)
jmp    1184 <Send+0x54>
lea    0xe90(%rip),%rdi
call   1040 <printf@plt>
mov    -0x8(%rbp),%edi
call   1030 <HangUp@plt>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Send>:
push   %rbx
mov    %edi,%ebx
call   1050 <WriteData@plt>
mov    %eax,%ecx
mov    $0x1,%eax
test   %ecx,%ecx
jle    1145 <Send+0x15>
pop    %rbx
ret
lea    0xeb4(%rip),%rdi
call   1030 <puts@plt>
mov    %ebx,%edi
call   1040 <HangUp@plt>
mov    $0xffffffff,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"uncapable of sending data\0A\00"
define i32 @Send(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = call i32 @WriteData(i32 %9, i8* %10, i32 %11)
store i32 %12, i32* %8
%13 = icmp sgt i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %3
store i32 1, i32* %4
br label %19
15: ; preds = %3
%16 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%17 = load i32, i32* %5
%18 = call i32 @HangUp(i32 %17)
store i32 -1, i32* %4
br label %19
19: ; preds = %15, %14
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
@str = [26 x i8] c"uncapable of sending data\00"
define i32 @Send(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @WriteData(i32 %0, i8* %1, i32 %2)
%5 = icmp sgt i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str, i64 0, i64 0))
%8 = tail call i32 @HangUp(i32 %0)
br label %9
9: ; preds = %3, %6
%10 = phi i32 [ -1, %6 ], [ 1, %3 ]
ret i32 %10
}
void handle_said_fragment(char c) {}


x86 assembly (clang, -O0):
<handle_said_fragment>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_said_fragment>:
ret

LLVM IR (-O0):
define void @handle_said_fragment(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
ret void
}

LLVM IR (-O2):
define void @handle_said_fragment(i8 signext %0) {
ret void
}
int main(void) {
  'a' >= "B";
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
@.str = [2 x i8] c"B\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
/* Type definitions */
struct mat3 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mat3_rotation_z(float *, float);
__attribute__((always_)) struct mat3 *psmat3_rotation_z(struct mat3 *result,
                                                        float angle) {
  mat3_rotation_z((float *)result, angle);
  return result;
}


x86 assembly (clang, -O0):
<psmat3_rotation_z>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
movss  -0xc(%rbp),%xmm0
call   1030 <mat3_rotation_z@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psmat3_rotation_z>:
push   %rbx
mov    %rdi,%rbx
call   1030 <mat3_rotation_z@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.mat3 = type { i32 }
define %struct.mat3* @psmat3_rotation_z(%struct.mat3* %0, float %1) {
%3 = alloca %struct.mat3*
%4 = alloca float
store %struct.mat3* %0, %struct.mat3** %3
store float %1, float* %4
%5 = load %struct.mat3*, %struct.mat3** %3
%6 = bitcast %struct.mat3* %5 to float*
%7 = load float, float* %4
%8 = call i32 @mat3_rotation_z(float* %6, float %7)
%9 = load %struct.mat3*, %struct.mat3** %3
ret %struct.mat3* %9
}

LLVM IR (-O2):
%struct.mat3 = type { i32 }
define %struct.mat3* @psmat3_rotation_z(%struct.mat3* returned %0, float %1) {
%3 = bitcast %struct.mat3* %0 to float*
%4 = tail call i32 @mat3_rotation_z(float* %3, float %1)
ret %struct.mat3* %0
}
void main(void) {
  int x;
  int y;
  int m;
  if (x == 5) {
    y = 7;
    y = x / m;
    if (x < 2) {
      int w;
      w = x;
    }
  } else {
    m = 8 + m;
  }
  return;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
cmpl   $0x5,-0x4(%rbp)
jne    1134 <main+0x34>
movl   $0x7,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %eax,-0x8(%rbp)
cmpl   $0x2,-0x4(%rbp)
jge    112f <main+0x2f>
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    113d <main+0x3d>
mov    -0xc(%rbp),%eax
add    $0x8,%eax
mov    %eax,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = load i32, i32* %1
%6 = icmp eq i32 %5, 5
br i1 %6, label %7, label %16
7: ; preds = %0
store i32 7, i32* %2
%8 = load i32, i32* %1
%9 = load i32, i32* %3
%10 = sdiv i32 %8, %9
store i32 %10, i32* %2
%11 = load i32, i32* %1
%12 = icmp slt i32 %11, 2
br i1 %12, label %13, label %15
13: ; preds = %7
%14 = load i32, i32* %1
store i32 %14, i32* %4
br label %15
15: ; preds = %13, %7
br label %19
16: ; preds = %0
%17 = load i32, i32* %3
%18 = add nsw i32 8, %17
store i32 %18, i32* %3
br label %19
19: ; preds = %16, %15
ret void
}

LLVM IR (-O2):
define void @main() {
ret void
}
/* Variables and functions */
int __bitmap_parse(char const *, unsigned int, unsigned long *, int);
int bitmap_parse(const char *buf, unsigned int buflen, unsigned long *maskp,
                 int nmaskbits) {
  return __bitmap_parse(buf, buflen, maskp, nmaskbits);
}


x86 assembly (clang, -O0):
<bitmap_parse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <__bitmap_parse@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitmap_parse>:
jmp    1030 <__bitmap_parse@plt>

LLVM IR (-O0):
define i32 @bitmap_parse(i8* %0, i32 %1, i64* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i64*
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i64* %2, i64** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = load i64*, i64** %7
%12 = load i32, i32* %8
%13 = call i32 @__bitmap_parse(i8* %9, i32 %10, i64* %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @bitmap_parse(i8* %0, i32 %1, i64* %2, i32 %3) {
%5 = tail call i32 @__bitmap_parse(i8* %0, i32 %1, i64* %2, i32 %3)
ret i32 %5
}