#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef scalar_t__ uint16_t;
typedef scalar_t__ int16_t;

/* Variables and functions */
scalar_t__ abs16(scalar_t__);
int /*<<< orphan*/ get_dreg(int /*<<< orphan*/);
scalar_t__ get_opa(int /*<<< orphan*/);
scalar_t__ mem0_read(scalar_t__);
scalar_t__ mem1_read(scalar_t__);
int /*<<< orphan*/ repeat_sad_stop(int);
int /*<<< orphan*/ set_reg(int /*<<< orphan*/, scalar_t__, int);
scalar_t__ sr_read(int);
int /*<<< orphan*/ sr_write(int, scalar_t__);
void insn_accelerated(uint32_t insn) {
  int16_t mem1, mem0;
  int16_t result = 0, temp;
  uint16_t R_a = get_opa(insn);
  uint16_t mem_reg_0 = sr_read(0);
  uint16_t mem_reg_1 = sr_read(1);
  mem1 = mem1_read((R_a + mem_reg_1));
  mem0 = mem0_read((R_a + mem_reg_0));
  temp = mem0 - mem1;
  result = abs16(temp);
  temp = sr_read(31) + result;
  sr_write(31, temp);
  if (sr_read(31) >= sr_read(30)) {
    repeat_sad_stop(4);
  }
  set_reg(get_dreg(insn), temp, 2);
}


x86 assembly (clang, -O0):
<insn_accelerated>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <get_opa@plt>
mov    %rax,-0x30(%rbp)
xor    %edi,%edi
call   1030 <sr_read@plt>
mov    %rax,-0x38(%rbp)
mov    $0x1,%edi
call   1030 <sr_read@plt>
mov    %rax,-0x40(%rbp)
mov    -0x30(%rbp),%rdi
add    -0x40(%rbp),%rdi
call   1090 <mem1_read@plt>
mov    %rax,-0x10(%rbp)
mov    -0x30(%rbp),%rdi
add    -0x38(%rbp),%rdi
call   1060 <mem0_read@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
sub    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rdi
call   1050 <abs16@plt>
mov    %rax,-0x20(%rbp)
mov    $0x1f,%edi
call   1030 <sr_read@plt>
add    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rsi
mov    $0x1f,%edi
call   1080 <sr_write@plt>
mov    $0x1f,%edi
call   1030 <sr_read@plt>
mov    %rax,-0x48(%rbp)
mov    $0x1e,%edi
call   1030 <sr_read@plt>
mov    %rax,%rcx
mov    -0x48(%rbp),%rax
cmp    %rcx,%rax
jl     1255 <insn_accelerated+0xc5>
mov    $0x4,%edi
call   1070 <repeat_sad_stop@plt>
mov    -0x4(%rbp),%edi
call   10a0 <get_dreg@plt>
mov    %eax,%edi
mov    -0x28(%rbp),%rsi
mov    $0x2,%edx
call   10b0 <set_reg@plt>
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<insn_accelerated>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edi,%r14d
call   1040 <get_opa@plt>
mov    %rax,%rbx
xor    %edi,%edi
call   1030 <sr_read@plt>
mov    %rax,%rbp
mov    $0x1,%edi
call   1030 <sr_read@plt>
lea    (%rax,%rbx,1),%rdi
call   1090 <mem1_read@plt>
mov    %rax,%r15
add    %rbx,%rbp
mov    %rbp,%rdi
call   1060 <mem0_read@plt>
sub    %r15,%rax
mov    %rax,%rdi
call   1050 <abs16@plt>
mov    %rax,%rbp
mov    $0x1f,%edi
call   1030 <sr_read@plt>
mov    %rax,%rbx
add    %rbp,%rbx
mov    $0x1f,%edi
mov    %rbx,%rsi
call   1080 <sr_write@plt>
mov    $0x1f,%edi
call   1030 <sr_read@plt>
mov    %rax,%rbp
mov    $0x1e,%edi
call   1030 <sr_read@plt>
cmp    %rax,%rbp
jl     121e <insn_accelerated+0x8e>
mov    $0x4,%edi
call   1070 <repeat_sad_stop@plt>
mov    %r14d,%edi
call   10a0 <get_dreg@plt>
mov    %eax,%edi
mov    %rbx,%rsi
mov    $0x2,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    10b0 <set_reg@plt>

LLVM IR (-O0):
define void @insn_accelerated(i32 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
store i32 %0, i32* %2
store i64 0, i64* %5
%10 = load i32, i32* %2
%11 = call i64 @get_opa(i32 %10)
store i64 %11, i64* %7
%12 = call i64 @sr_read(i32 0)
store i64 %12, i64* %8
%13 = call i64 @sr_read(i32 1)
store i64 %13, i64* %9
%14 = load i64, i64* %7
%15 = load i64, i64* %9
%16 = add nsw i64 %14, %15
%17 = call i64 @mem1_read(i64 %16)
store i64 %17, i64* %3
%18 = load i64, i64* %7
%19 = load i64, i64* %8
%20 = add nsw i64 %18, %19
%21 = call i64 @mem0_read(i64 %20)
store i64 %21, i64* %4
%22 = load i64, i64* %4
%23 = load i64, i64* %3
%24 = sub nsw i64 %22, %23
store i64 %24, i64* %6
%25 = load i64, i64* %6
%26 = call i64 @abs16(i64 %25)
store i64 %26, i64* %5
%27 = call i64 @sr_read(i32 31)
%28 = load i64, i64* %5
%29 = add nsw i64 %27, %28
store i64 %29, i64* %6
%30 = load i64, i64* %6
%31 = call i32 @sr_write(i32 31, i64 %30)
%32 = call i64 @sr_read(i32 31)
%33 = call i64 @sr_read(i32 30)
%34 = icmp sge i64 %32, %33
br i1 %34, label %35, label %37
35: ; preds = %1
%36 = call i32 @repeat_sad_stop(i32 4)
br label %37
37: ; preds = %35, %1
%38 = load i32, i32* %2
%39 = call i32 @get_dreg(i32 %38)
%40 = load i64, i64* %6
%41 = call i32 @set_reg(i32 %39, i64 %40, i32 2)
ret void
}

LLVM IR (-O2):
define void @insn_accelerated(i32 %0) {
%2 = tail call i64 @get_opa(i32 %0)
%3 = tail call i64 @sr_read(i32 0)
%4 = tail call i64 @sr_read(i32 1)
%5 = add nsw i64 %4, %2
%6 = tail call i64 @mem1_read(i64 %5)
%7 = add nsw i64 %3, %2
%8 = tail call i64 @mem0_read(i64 %7)
%9 = sub nsw i64 %8, %6
%10 = tail call i64 @abs16(i64 %9)
%11 = tail call i64 @sr_read(i32 31)
%12 = add nsw i64 %11, %10
%13 = tail call i32 @sr_write(i32 31, i64 %12)
%14 = tail call i64 @sr_read(i32 31)
%15 = tail call i64 @sr_read(i32 30)
%16 = icmp slt i64 %14, %15
br i1 %16, label %19, label %17
17: ; preds = %1
%18 = tail call i32 @repeat_sad_stop(i32 4)
br label %19
19: ; preds = %17, %1
%20 = tail call i32 @get_dreg(i32 %0)
%21 = tail call i32 @set_reg(i32 %20, i64 %12, i32 2)
ret void
}