char snck_suggest_is_special(char const c) {
  char b_special;
  if ((('a' <= c) && ('z' >= c)) || (('A' <= c) && ('Z' >= c)) ||
      (('0' <= c) && ('9' >= c)) || ('.' == c) || ('-' == c) || ('_' == c)) {
    b_special = 0;
  } else {
    b_special = 1;
  }
  return b_special;
}


x86 assembly (clang, -O0):
<snck_suggest_is_special>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x61,%eax
cmp    %ecx,%eax
jg     112c <snck_suggest_is_special+0x2c>
movsbl -0x1(%rbp),%ecx
mov    $0x7a,%eax
cmp    %ecx,%eax
jge    11a3 <snck_suggest_is_special+0xa3>
movsbl -0x1(%rbp),%ecx
mov    $0x41,%eax
cmp    %ecx,%eax
jg     114e <snck_suggest_is_special+0x4e>
movsbl -0x1(%rbp),%ecx
mov    $0x5a,%eax
cmp    %ecx,%eax
jge    11a3 <snck_suggest_is_special+0xa3>
movsbl -0x1(%rbp),%ecx
mov    $0x30,%eax
cmp    %ecx,%eax
jg     1170 <snck_suggest_is_special+0x70>
movsbl -0x1(%rbp),%ecx
mov    $0x39,%eax
cmp    %ecx,%eax
jge    11a3 <snck_suggest_is_special+0xa3>
movsbl -0x1(%rbp),%ecx
mov    $0x2e,%eax
cmp    %ecx,%eax
je     11a3 <snck_suggest_is_special+0xa3>
movsbl -0x1(%rbp),%ecx
mov    $0x2d,%eax
cmp    %ecx,%eax
je     11a3 <snck_suggest_is_special+0xa3>
movsbl -0x1(%rbp),%ecx
mov    $0x5f,%eax
cmp    %ecx,%eax
jne    11ac <snck_suggest_is_special+0xac>
movb   $0x0,-0x2(%rbp)
jmp    11b0 <snck_suggest_is_special+0xb0>
movb   $0x1,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<snck_suggest_is_special>:
lea    -0x30(%rdi),%ecx
xor    %eax,%eax
cmp    $0xa,%cl
jb     113a <snck_suggest_is_special+0x3a>
mov    %edi,%ecx
and    $0xdf,%cl
add    $0xbf,%cl
cmp    $0x1a,%cl
jb     113a <snck_suggest_is_special+0x3a>
add    $0xd3,%dil
cmp    $0x32,%dil
ja     1138 <snck_suggest_is_special+0x38>
movzbl %dil,%eax
movabs $0x4000000000003,%rcx
bt     %rax,%rcx
jae    1138 <snck_suggest_is_special+0x38>
xor    %eax,%eax
ret
mov    $0x1,%al
ret

LLVM IR (-O0):
define signext i8 @snck_suggest_is_special(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = icmp sle i32 97, %5
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %2
%9 = sext i8 %8 to i32
%10 = icmp sge i32 122, %9
br i1 %10, label %39, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %2
%13 = sext i8 %12 to i32
%14 = icmp sle i32 65, %13
br i1 %14, label %15, label %19
15: ; preds = %11
%16 = load i8, i8* %2
%17 = sext i8 %16 to i32
%18 = icmp sge i32 90, %17
br i1 %18, label %39, label %19
19: ; preds = %15, %11
%20 = load i8, i8* %2
%21 = sext i8 %20 to i32
%22 = icmp sle i32 48, %21
br i1 %22, label %23, label %27
23: ; preds = %19
%24 = load i8, i8* %2
%25 = sext i8 %24 to i32
%26 = icmp sge i32 57, %25
br i1 %26, label %39, label %27
27: ; preds = %23, %19
%28 = load i8, i8* %2
%29 = sext i8 %28 to i32
%30 = icmp eq i32 46, %29
br i1 %30, label %39, label %31
31: ; preds = %27
%32 = load i8, i8* %2
%33 = sext i8 %32 to i32
%34 = icmp eq i32 45, %33
br i1 %34, label %39, label %35
35: ; preds = %31
%36 = load i8, i8* %2
%37 = sext i8 %36 to i32
%38 = icmp eq i32 95, %37
br i1 %38, label %39, label %40
39: ; preds = %35, %31, %27, %23, %15, %7
store i8 0, i8* %3
br label %41
40: ; preds = %35
store i8 1, i8* %3
br label %41
41: ; preds = %40, %39
%42 = load i8, i8* %3
ret i8 %42
}

LLVM IR (-O2):
define signext i8 @snck_suggest_is_special(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = add i8 %0, -48
%6 = icmp ult i8 %5, 10
%7 = or i1 %6, %4
br i1 %7, label %10, label %8
8: ; preds = %1
switch i8 %0, label %9 [
i8 95, label %10
i8 46, label %10
i8 45, label %10
]
9: ; preds = %8
br label %10
10: ; preds = %1, %8, %8, %8, %9
%11 = phi i8 [ 1, %9 ], [ 0, %8 ], [ 0, %8 ], [ 0, %8 ], [ 0, %1 ]
ret i8 %11
}