xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void str_print(char *str) { printf("%s", str); }


x86 assembly (clang, -O0):
<str_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_print>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @str_print(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @str_print(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
int qd_is_zero(const double *a) { return (a[0] == 0.0) ? 1 : 0; }


x86 assembly (clang, -O0):
<qd_is_zero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
xorps  %xmm1,%xmm1
xor    %eax,%eax
mov    $0x1,%ecx
ucomisd %xmm1,%xmm0
setnp  %sil
sete   %dl
test   %sil,%dl
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<qd_is_zero>:
xorpd  %xmm0,%xmm0
cmpeqsd (%rdi),%xmm0
movq   %xmm0,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @qd_is_zero(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = fcmp oeq double %5, 0.000000e+00
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 1, i32 0
ret i32 %8
}

LLVM IR (-O2):
define i32 @qd_is_zero(double* nocapture %0) {
%2 = load double, double* %0
%3 = fcmp oeq double %2, 0.000000e+00
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ sem_wait(int *, int /*<<< orphan*/);
void sem_mutex_wait(int *semid) { sem_wait(semid, 0); }


x86 assembly (clang, -O0):
<sem_mutex_wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <sem_wait@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sem_mutex_wait>:
xor    %esi,%esi
jmp    1030 <sem_wait@plt>

LLVM IR (-O0):
define void @sem_mutex_wait(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @sem_wait(i32* %3, i32 0)
ret void
}

LLVM IR (-O2):
define void @sem_mutex_wait(i32* %0) {
%2 = tail call i32 @sem_wait(i32* %0, i32 0)
ret void
}
void z80dart(void) { return; }


x86 assembly (clang, -O0):
<z80dart>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<z80dart>:
ret

LLVM IR (-O0):
define void @z80dart() {
ret void
}

LLVM IR (-O2):
define void @z80dart() {
ret void
}
int ft_isalnum(int c) {
  if ((c >= 48 && c <= 57) || (c >= 65 && c <= 90) || (c >= 97 && c <= 122))
    return (1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<ft_isalnum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x30,-0x8(%rbp)
jl     111b <ft_isalnum+0x1b>
cmpl   $0x39,-0x8(%rbp)
jle    1143 <ft_isalnum+0x43>
cmpl   $0x41,-0x8(%rbp)
jl     112f <ft_isalnum+0x2f>
cmpl   $0x5a,-0x8(%rbp)
jle    1143 <ft_isalnum+0x43>
cmpl   $0x61,-0x8(%rbp)
jl     114f <ft_isalnum+0x4f>
cmpl   $0x7a,-0x8(%rbp)
jg     114f <ft_isalnum+0x4f>
movl   $0x1,-0x4(%rbp)
jmp    1156 <ft_isalnum+0x56>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isalnum>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%eax
setb   %al
and    $0xffffffdf,%edi
add    $0xffffffbf,%edi
cmp    $0x1a,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @ft_isalnum(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 57
br i1 %8, label %21, label %9
9: ; preds = %6, %1
%10 = load i32, i32* %3
%11 = icmp sge i32 %10, 65
br i1 %11, label %12, label %15
12: ; preds = %9
%13 = load i32, i32* %3
%14 = icmp sle i32 %13, 90
br i1 %14, label %21, label %15
15: ; preds = %12, %9
%16 = load i32, i32* %3
%17 = icmp sge i32 %16, 97
br i1 %17, label %18, label %22
18: ; preds = %15
%19 = load i32, i32* %3
%20 = icmp sle i32 %19, 122
br i1 %20, label %21, label %22
21: ; preds = %18, %12, %6
store i32 1, i32* %2
br label %23
22: ; preds = %18, %15
store i32 0, i32* %2
br label %23
23: ; preds = %22, %21
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @ft_isalnum(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = and i32 %0, -33
%5 = add i32 %4, -65
%6 = icmp ult i32 %5, 26
%7 = or i1 %3, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ StateImplP__State__toIdle(unsigned int);
void CC2420SpiP__WorkingState__toIdle(void) { StateImplP__State__toIdle(0U); }


x86 assembly (clang, -O0):
<CC2420SpiP__WorkingState__toIdle>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <StateImplP__State__toIdle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC2420SpiP__WorkingState__toIdle>:
xor    %edi,%edi
jmp    1030 <StateImplP__State__toIdle@plt>

LLVM IR (-O0):
define void @CC2420SpiP__WorkingState__toIdle() {
%1 = call i32 @StateImplP__State__toIdle(i32 0)
ret void
}

LLVM IR (-O2):
define void @CC2420SpiP__WorkingState__toIdle() {
%1 = tail call i32 @StateImplP__State__toIdle(i32 0)
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
scalar_t__ flashfsGetWriteBufferSize();
scalar_t__ flashfsTransmitBufferUsed();
uint32_t flashfsGetWriteBufferFreeSpace() {
  return flashfsGetWriteBufferSize() - flashfsTransmitBufferUsed();
}


x86 assembly (clang, -O0):
<flashfsGetWriteBufferFreeSpace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <flashfsGetWriteBufferSize@plt>
mov    %rax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <flashfsTransmitBufferUsed@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
sub    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flashfsGetWriteBufferFreeSpace>:
push   %rbx
xor    %eax,%eax
call   1040 <flashfsGetWriteBufferSize@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1030 <flashfsTransmitBufferUsed@plt>
sub    %rax,%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @flashfsGetWriteBufferFreeSpace() {
%1 = call i64 (...) @flashfsGetWriteBufferSize()
%2 = call i64 (...) @flashfsTransmitBufferUsed()
%3 = sub nsw i64 %1, %2
ret i64 %3
}

LLVM IR (-O2):
define i64 @flashfsGetWriteBufferFreeSpace() {
%1 = tail call i64 (...) @flashfsGetWriteBufferSize()
%2 = tail call i64 (...) @flashfsTransmitBufferUsed()
%3 = sub nsw i64 %1, %2
ret i64 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ once_flag;

/* Variables and functions */
int /*<<< orphan*/ __pthread_once(int /*<<< orphan*/ *, void (*)());
void call_once(once_flag *flag, void (*func)(void)) {
  __pthread_once(flag, func);
}


x86 assembly (clang, -O0):
<call_once>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <__pthread_once@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_once>:
jmp    1030 <__pthread_once@plt>

LLVM IR (-O0):
define void @call_once(i32* %0, void ()* %1) {
%3 = alloca i32*
%4 = alloca void ()*
store i32* %0, i32** %3
store void ()* %1, void ()** %4
%5 = load i32*, i32** %3
%6 = load void ()*, void ()** %4
%7 = bitcast void ()* %6 to void (...)*
%8 = call i32 @__pthread_once(i32* %5, void (...)* %7)
ret void
}

LLVM IR (-O2):
define void @call_once(i32* %0, void ()* %1) {
%3 = bitcast void ()* %1 to void (...)*
%4 = tail call i32 @__pthread_once(i32* %0, void (...)* %3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
uint16_t load_u16_little(const void *mem) { return *(uint16_t *)mem; }


x86 assembly (clang, -O0):
<load_u16_little>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_u16_little>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @load_u16_little(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @load_u16_little(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
ret i32 %3
}
void wait() {
  static volatile int c;
  c = 0;
  while (c++ < 1000000)
    ;
}


x86 assembly (clang, -O0):
<wait>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,0x2f16(%rip)
mov    0x2f10(%rip),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,0x2f05(%rip)
cmp    $0xf4240,%eax
jge    112f <wait+0x2f>
jmp    110e <wait+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait>:
movl   $0x0,0x2f1a(%rip)
nopw   0x0(%rax,%rax,1)
mov    0x2f0e(%rip),%eax
lea    0x1(%rax),%ecx
mov    %ecx,0x2f05(%rip)
cmp    $0xf4240,%eax
jl     1110 <wait+0x10>
ret

LLVM IR (-O0):
@wait.c = internal global i32 0
define void @wait() {
store volatile i32 0, i32* @wait.c
br label %1
1: ; preds = %5, %0
%2 = load volatile i32, i32* @wait.c
%3 = add nsw i32 %2, 1
store volatile i32 %3, i32* @wait.c
%4 = icmp slt i32 %2, 1000000
br i1 %4, label %5, label %6
5: ; preds = %1
br label %1
6: ; preds = %1
ret void
}

LLVM IR (-O2):
@wait.c = internal global i32 0
define void @wait() {
store volatile i32 0, i32* @wait.c
br label %1
1: ; preds = %1, %0
%2 = load volatile i32, i32* @wait.c
%3 = add nsw i32 %2, 1
store volatile i32 %3, i32* @wait.c
%4 = icmp slt i32 %2, 1000000
br i1 %4, label %1, label %5
5: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ eval_seq(char *);
int eval_seq_base(char *);
int main_eval(char *buff) {
  if (eval_seq_base(buff) == -1) {
    eval_seq(buff);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main_eval>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <eval_seq_base@plt>
cmp    $0xffffffff,%eax
jne    1147 <main_eval+0x27>
mov    -0x8(%rbp),%rdi
call   1040 <eval_seq@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main_eval>:
push   %rbx
mov    %rdi,%rbx
call   1030 <eval_seq_base@plt>
cmp    $0xffffffff,%eax
jne    1136 <main_eval+0x16>
mov    %rbx,%rdi
call   1040 <eval_seq@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main_eval(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @eval_seq_base(i8* %3)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i32 @eval_seq(i8* %7)
br label %9
9: ; preds = %6, %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main_eval(i8* %0) {
%2 = tail call i32 @eval_seq_base(i8* %0)
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @eval_seq(i8* %0)
br label %6
6: ; preds = %4, %1
ret i32 0
}
/* Type definitions */
struct timespec {
  int tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, int /*<<< orphan*/ *);
int /*<<< orphan*/ sleep(int);
int main() {
  struct timespec request, remain;
  request.tv_sec = 0;
  request.tv_nsec = 50 * 1000000;
  sleep(2);
  nanosleep(&request, NULL);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
movl   $0x2faf080,-0x18(%rbp)
mov    $0x2,%edi
call   1040 <sleep@plt>
lea    -0x18(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <nanosleep@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movq   $0x0,0x10(%rsp)
movl   $0x2faf080,0x8(%rsp)
02
mov    $0x2,%edi
call   1040 <sleep@plt>
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <nanosleep@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i64 }
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.timespec
%3 = alloca %struct.timespec
store i32 0, i32* %1
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i32 0, i32 1
store i64 0, i64* %4
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i32 0, i32 0
store i32 50000000, i32* %5
%6 = call i32 @sleep(i32 2)
%7 = call i32 @nanosleep(%struct.timespec* %2, i32* null)
ret i32 0
}

LLVM IR (-O2):
%struct.timespec = type { i32, i64 }
define i32 @main() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
store i64 0, i64* %3
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
store i32 50000000, i32* %4
%5 = tail call i32 @sleep(i32 2)
%6 = call i32 @nanosleep(%struct.timespec* %1, i32* null)
ret i32 0
}
int pathcon_nm10_work(int *sz_arg, int *sz_res, int *sz_iw, int *sz_w) {
  if (sz_arg)
    *sz_arg = 2;
  if (sz_res)
    *sz_res = 2;
  if (sz_iw)
    *sz_iw = 0;
  if (sz_w)
    *sz_w = 0;
  return 0;
}


x86 assembly (clang, -O0):
<pathcon_nm10_work>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1129 <pathcon_nm10_work+0x29>
mov    -0x8(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x10(%rbp)
je     113e <pathcon_nm10_work+0x3e>
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x18(%rbp)
je     1153 <pathcon_nm10_work+0x53>
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
cmpq   $0x0,-0x20(%rbp)
je     1168 <pathcon_nm10_work+0x68>
mov    -0x20(%rbp),%rax
movl   $0x0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm10_work>:
test   %rdi,%rdi
je     110b <pathcon_nm10_work+0xb>
movl   $0x2,(%rdi)
test   %rsi,%rsi
je     1116 <pathcon_nm10_work+0x16>
movl   $0x2,(%rsi)
test   %rdx,%rdx
je     1121 <pathcon_nm10_work+0x21>
movl   $0x0,(%rdx)
test   %rcx,%rcx
je     112c <pathcon_nm10_work+0x2c>
movl   $0x0,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pathcon_nm10_work(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %11, label %13
11: ; preds = %4
%12 = load i32*, i32** %5
store i32 2, i32* %12
br label %13
13: ; preds = %11, %4
%14 = load i32*, i32** %6
%15 = icmp ne i32* %14, null
br i1 %15, label %16, label %18
16: ; preds = %13
%17 = load i32*, i32** %6
store i32 2, i32* %17
br label %18
18: ; preds = %16, %13
%19 = load i32*, i32** %7
%20 = icmp ne i32* %19, null
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = load i32*, i32** %7
store i32 0, i32* %22
br label %23
23: ; preds = %21, %18
%24 = load i32*, i32** %8
%25 = icmp ne i32* %24, null
br i1 %25, label %26, label %28
26: ; preds = %23
%27 = load i32*, i32** %8
store i32 0, i32* %27
br label %28
28: ; preds = %26, %23
ret i32 0
}

LLVM IR (-O2):
define i32 @pathcon_nm10_work(i32* writeonly %0, i32* writeonly %1, i32* writeonly %2, i32* writeonly %3) {
%5 = icmp eq i32* %0, null
br i1 %5, label %7, label %6
6: ; preds = %4
store i32 2, i32* %0
br label %7
7: ; preds = %6, %4
%8 = icmp eq i32* %1, null
br i1 %8, label %10, label %9
9: ; preds = %7
store i32 2, i32* %1
br label %10
10: ; preds = %9, %7
%11 = icmp eq i32* %2, null
br i1 %11, label %13, label %12
12: ; preds = %10
store i32 0, i32* %2
br label %13
13: ; preds = %12, %10
%14 = icmp eq i32* %3, null
br i1 %14, label %16, label %15
15: ; preds = %13
store i32 0, i32* %3
br label %16
16: ; preds = %15, %13
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ setbitu(unsigned char *, int, int, unsigned int);
void setbits(unsigned char *buff, int pos, int len, int data) {
  if (data < 0) {
    data |= 1 << (len - 1);
  } else {
    data &= ~(1 << (len - 1));
  }
  setbitu(buff, pos, len, (unsigned int)data);
}


x86 assembly (clang, -O0):
<setbits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jge    1147 <setbits+0x37>
mov    -0x10(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
or     -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    115d <setbits+0x4d>
mov    -0x10(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
and    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x14(%rbp),%ecx
call   1030 <setbitu@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setbits>:
lea    -0x1(%rdx),%r8d
mov    %ecx,%r9d
bts    %r8d,%r9d
mov    %ecx,%eax
btr    %r8d,%eax
test   %ecx,%ecx
cmovs  %r9d,%eax
mov    %eax,%ecx
jmp    1030 <setbitu@plt>

LLVM IR (-O0):
define void @setbits(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %8
%10 = icmp slt i32 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %4
%12 = load i32, i32* %7
%13 = sub nsw i32 %12, 1
%14 = shl i32 1, %13
%15 = load i32, i32* %8
%16 = or i32 %15, %14
store i32 %16, i32* %8
br label %24
17: ; preds = %4
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = shl i32 1, %19
%21 = xor i32 %20, -1
%22 = load i32, i32* %8
%23 = and i32 %22, %21
store i32 %23, i32* %8
br label %24
24: ; preds = %17, %11
%25 = load i8*, i8** %5
%26 = load i32, i32* %6
%27 = load i32, i32* %7
%28 = load i32, i32* %8
%29 = call i32 @setbitu(i8* %25, i32 %26, i32 %27, i32 %28)
ret void
}

LLVM IR (-O2):
define void @setbits(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp slt i32 %3, 0
%6 = add nsw i32 %2, -1
%7 = shl nuw i32 1, %6
%8 = or i32 %7, %3
%9 = xor i32 %7, -1
%10 = and i32 %9, %3
%11 = select i1 %5, i32 %8, i32 %10
%12 = tail call i32 @setbitu(i8* %0, i32 %1, i32 %2, i32 %11)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
shared() {
  int *p, *q;
  {
    int abc;
    p = &abc;
  }
  {
    int abc;
    q = &abc;
  }
  if (p != q)
    abort();
}


x86 assembly (clang, -O0):
<shared>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x1c(%rbp),%rax
mov    %rax,-0x10(%rbp)
lea    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
je     113d <shared+0x2d>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shared>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @shared() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %4, i32** %2
store i32* %5, i32** %3
%6 = load i32*, i32** %2
%7 = load i32*, i32** %3
%8 = icmp ne i32* %6, %7
br i1 %8, label %9, label %11
9: ; preds = %0
%10 = call i32 (...) @abort()
unreachable
11: ; preds = %0
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
define i32 @shared() {
%1 = tail call i32 (...) @abort()
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ memcrc_r(int /*<<< orphan*/ *, unsigned char const *,
                            size_t);
void memcrc_r_eswap(uint32_t *state, const unsigned char *elems,
                    size_t num_elems, size_t elem_size) {
  memcrc_r(state, elems, num_elems * elem_size);
}


x86 assembly (clang, -O0):
<memcrc_r_eswap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
imul   -0x20(%rbp),%rdx
call   1030 <memcrc_r@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcrc_r_eswap>:
imul   %rcx,%rdx
jmp    1030 <memcrc_r@plt>

LLVM IR (-O0):
define void @memcrc_r_eswap(i32* %0, i8* %1, i64 %2, i64 %3) {
%5 = alloca i32*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i64
store i32* %0, i32** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i32*, i32** %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %7
%12 = load i64, i64* %8
%13 = mul i64 %11, %12
%14 = call i32 @memcrc_r(i32* %9, i8* %10, i64 %13)
ret void
}

LLVM IR (-O2):
define void @memcrc_r_eswap(i32* %0, i8* %1, i64 %2, i64 %3) {
%5 = mul i64 %3, %2
%6 = tail call i32 @memcrc_r(i32* %0, i8* %1, i64 %5)
ret void
}
void winsock_initialize() {}


x86 assembly (clang, -O0):
<winsock_initialize>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<winsock_initialize>:
ret

LLVM IR (-O0):
define void @winsock_initialize() {
ret void
}

LLVM IR (-O2):
define void @winsock_initialize() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ *strchr(char *, char);
int comm_isSingleTag(char *tagbuf) { return (strchr(tagbuf, '/') == NULL); }


x86 assembly (clang, -O0):
<comm_isSingleTag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2f,%esi
call   1030 <strchr@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<comm_isSingleTag>:
push   %rax
mov    $0x2f,%esi
call   1030 <strchr@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @comm_isSingleTag(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32* @strchr(i8* %3, i8 signext 47)
%5 = icmp eq i32* %4, null
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @comm_isSingleTag(i8* %0) {
%2 = tail call i32* @strchr(i8* %0, i8 signext 47)
%3 = icmp eq i32* %2, null
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ TRUE;
int /*<<< orphan*/ echo();
int /*<<< orphan*/ initscr();
int /*<<< orphan*/ keypad(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ raw();
int /*<<< orphan*/ stdscr;
void inti_curses(void) {
  initscr();
  raw();
  keypad(stdscr, TRUE);
  echo();
}


x86 assembly (clang, -O0):
<inti_curses>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <initscr@plt>
mov    $0x0,%al
call   1060 <raw@plt>
mov    0x2e8f(%rip),%rax
mov    (%rax),%edi
mov    0x2e7e(%rip),%rax
mov    (%rax),%esi
call   1040 <keypad@plt>
mov    $0x0,%al
call   1030 <echo@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<inti_curses>:
push   %rax
xor    %eax,%eax
call   1050 <initscr@plt>
xor    %eax,%eax
call   1060 <raw@plt>
mov    0x2e92(%rip),%rax
mov    (%rax),%edi
mov    0x2e81(%rip),%rax
mov    (%rax),%esi
call   1040 <keypad@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <echo@plt>

LLVM IR (-O0):
@stdscr = global i32 0
@TRUE = global i32 0
define void @inti_curses() {
%1 = call i32 (...) @initscr()
%2 = call i32 (...) @raw()
%3 = load i32, i32* @stdscr
%4 = load i32, i32* @TRUE
%5 = call i32 @keypad(i32 %3, i32 %4)
%6 = call i32 (...) @echo()
ret void
}

LLVM IR (-O2):
@stdscr = global i32 0
@TRUE = global i32 0
define void @inti_curses() {
%1 = tail call i32 (...) @initscr()
%2 = tail call i32 (...) @raw()
%3 = load i32, i32* @stdscr
%4 = load i32, i32* @TRUE
%5 = tail call i32 @keypad(i32 %3, i32 %4)
%6 = tail call i32 (...) @echo()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ not_implemented_error();
int inotify_init(void) {
  not_implemented_error();
  return -1;
}


x86 assembly (clang, -O0):
<inotify_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <not_implemented_error@plt>
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inotify_init>:
push   %rax
xor    %eax,%eax
call   1030 <not_implemented_error@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @inotify_init() {
%1 = call i32 (...) @not_implemented_error()
ret i32 -1
}

LLVM IR (-O2):
define i32 @inotify_init() {
%1 = tail call i32 (...) @not_implemented_error()
ret i32 -1
}
/* Variables and functions */
short _pico_little_short(short src) { return src; }


x86 assembly (clang, -O0):
<_pico_little_short>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_pico_little_short>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i16 @_pico_little_short(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
ret i16 %3
}

LLVM IR (-O2):
define signext i16 @_pico_little_short(i16 returned signext %0) {
ret i16 %0
}
/* Variables and functions */
int /*<<< orphan*/ curs_set(int /*<<< orphan*/);
void view_boss_mode_off(void) { curs_set(0); }


x86 assembly (clang, -O0):
<view_boss_mode_off>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <curs_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<view_boss_mode_off>:
xor    %edi,%edi
jmp    1030 <curs_set@plt>

LLVM IR (-O0):
define void @view_boss_mode_off() {
%1 = call i32 @curs_set(i32 0)
ret void
}

LLVM IR (-O2):
define void @view_boss_mode_off() {
%1 = tail call i32 @curs_set(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mempcpy(char *, char *, int);
void mempcpy4() {
  char src[] = {1, 2, 3, 4};
  char dst[10];
  mempcpy(dst + 2, src + 2, 3);
}


x86 assembly (clang, -O0):
<mempcpy4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xee2(%rip),%eax
mov    %eax,-0x4(%rbp)
lea    -0xe(%rbp),%rdi
add    $0x2,%rdi
lea    -0x4(%rbp),%rsi
add    $0x2,%rsi
mov    $0x3,%edx
call   1030 <mempcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mempcpy4>:
sub    $0x18,%rsp
movl   $0x4030201,0x8(%rsp)
04
lea    0x10(%rsp),%rdi
lea    0xa(%rsp),%rsi
mov    $0x3,%edx
call   1030 <mempcpy@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.mempcpy4.src = [4 x i8] c"\01\02\03\04"
define void @mempcpy4() {
%1 = alloca [4 x i8]
%2 = alloca [10 x i8]
%3 = bitcast [4 x i8]* %1 to i8*
%4 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%5 = getelementptr inbounds i8, i8* %4, i64 2
%6 = getelementptr inbounds [4 x i8], [4 x i8]* %1, i64 0, i64 0
%7 = getelementptr inbounds i8, i8* %6, i64 2
%8 = call i32 @mempcpy(i8* %5, i8* %7, i32 3)
ret void
}

LLVM IR (-O2):
define void @mempcpy4() {
%1 = alloca i32
%2 = alloca [10 x i8]
%3 = bitcast i32* %1 to i8*
store i32 67305985, i32* %1
%4 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%5 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 2
%6 = getelementptr inbounds i8, i8* %3, i64 2
%7 = call i32 @mempcpy(i8* %5, i8* %6, i32 3)
ret void
}
void EEPROMBlockHide(unsigned long ulBlock) {
  ;
  ;
  (*((volatile unsigned long *)(0x400AF050))) = (1 << ulBlock);
}


x86 assembly (clang, -O0):
<EEPROMBlockHide>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rcx
mov    $0x400af050,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<EEPROMBlockHide>:
mov    %rdi,%rcx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    %rax,0x400af050
40
ret

LLVM IR (-O0):
define void @EEPROMBlockHide(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
%5 = shl i32 1, %4
%6 = sext i32 %5 to i64
store volatile i64 %6, i64* inttoptr (i64 1074458704 to i64*)
ret void
}

LLVM IR (-O2):
define void @EEPROMBlockHide(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = shl nuw i32 1, %2
%4 = sext i32 %3 to i64
store volatile i64 %4, i64* inttoptr (i64 1074458704 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ENOTSUP;
int /*<<< orphan*/ errno;
int _execve(char *name, char **argv, char **env) {
  errno = ENOTSUP;
  return -1;
}


x86 assembly (clang, -O0):
<_execve>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2ed1(%rip),%rax
mov    (%rax),%ecx
mov    0x2eb8(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_execve>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOTSUP = global i32 0
@errno = global i32 0
define i32 @_execve(i8* %0, i8** %1, i8** %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i8** %2, i8*** %6
%7 = load i32, i32* @ENOTSUP
store i32 %7, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOTSUP = global i32 0
@errno = global i32 0
define i32 @_execve(i8* nocapture readnone %0, i8** nocapture readnone %1, i8** nocapture readnone %2) {
%4 = load i32, i32* @ENOTSUP
store i32 %4, i32* @errno
ret i32 -1
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ __builtin_arm_rsr(char *);
uint32_t rsr() { return __builtin_arm_rsr("1:2:3:4:5"); }


x86 assembly (clang, -O0):
<rsr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <__builtin_arm_rsr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rsr>:
lea    0xee9(%rip),%rdi
jmp    1030 <__builtin_arm_rsr@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"1:2:3:4:5\00"
define i32 @rsr() {
%1 = call i32 @__builtin_arm_rsr(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [10 x i8] c"1:2:3:4:5\00"
define i32 @rsr() {
%1 = tail call i32 @__builtin_arm_rsr(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void *usage(void) {
  printf("Usage: prime -N <value> -t <value>\n");
  printf("Example: prime -N 1000 - t 10\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
lea    0xef9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeff(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"Usage: prime -N <value> -t <value>\0A\00"
@.str.1 = [31 x i8] c"Example: prime -N 1000 - t 10\0A\00"
define i8* @usage() {
%1 = alloca i8*
%2 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.1, i64 0, i64 0))
%4 = load i8*, i8** %1
ret i8* %4
}

LLVM IR (-O2):
@str = [35 x i8] c"Usage: prime -N <value> -t <value>\00"
@str.2 = [30 x i8] c"Example: prime -N 1000 - t 10\00"
define noalias i8* @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @str.2, i64 0, i64 0))
ret i8* undef
}
short _swaps_by_addr(short *s) {
  short r[2];
  register char *p, *q;
  p = (char *)&r[1];
  q = (char *)s;
  *--p = *q++;
  *--p = *q++;
  return r[0];
}


x86 assembly (clang, -O0):
<_swaps_by_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    -0xc(%rbp),%rax
add    $0x2,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x20(%rbp)
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0xffffffffffffffff,%rdx
mov    %rdx,-0x18(%rbp)
mov    %cl,-0x1(%rax)
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x20(%rbp)
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0xffffffffffffffff,%rdx
mov    %rdx,-0x18(%rbp)
mov    %cl,-0x1(%rax)
movswl -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_swaps_by_addr>:
movzwl (%rdi),%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define signext i16 @_swaps_by_addr(i16* %0) {
%2 = alloca i16*
%3 = alloca [2 x i16]
%4 = alloca i8*
%5 = alloca i8*
store i16* %0, i16** %2
%6 = getelementptr inbounds [2 x i16], [2 x i16]* %3, i64 0, i64 1
%7 = bitcast i16* %6 to i8*
store i8* %7, i8** %4
%8 = load i16*, i16** %2
%9 = bitcast i16* %8 to i8*
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %5
%12 = load i8, i8* %10
%13 = load i8*, i8** %4
%14 = getelementptr inbounds i8, i8* %13, i32 -1
store i8* %14, i8** %4
store i8 %12, i8* %14
%15 = load i8*, i8** %5
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %5
%17 = load i8, i8* %15
%18 = load i8*, i8** %4
%19 = getelementptr inbounds i8, i8* %18, i32 -1
store i8* %19, i8** %4
store i8 %17, i8* %19
%20 = getelementptr inbounds [2 x i16], [2 x i16]* %3, i64 0, i64 0
%21 = load i16, i16* %20
ret i16 %21
}

LLVM IR (-O2):
define signext i16 @_swaps_by_addr(i16* nocapture %0) {
%2 = bitcast i16* %0 to i8*
%3 = getelementptr inbounds i8, i8* %2, i64 1
%4 = load i8, i8* %2
%5 = load i8, i8* %3
%6 = zext i8 %4 to i16
%7 = shl nuw i16 %6, 8
%8 = zext i8 %5 to i16
%9 = or i16 %7, %8
ret i16 %9
}
execlp(name, argv) char *name, *argv;
{ return (execvp(name, &argv)); }


x86 assembly (clang, -O0):
<execlp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1030 <execvp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<execlp>:
push   %rax
mov    %rsi,(%rsp)
mov    %rsp,%rsi
xor    %eax,%eax
call   1030 <execvp@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @execlp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 (i8*, i8**, ...) bitcast (i32 (...)* @execvp to i32 (i8*, i8**, ...)*)(i8* %5, i8** %4)
ret i32 %6
}

LLVM IR (-O2):
define i32 @execlp(i8* %0, i8* %1) {
%3 = alloca i8*
store i8* %1, i8** %3
%4 = call i32 (i8*, i8**, ...) bitcast (i32 (...)* @execvp to i32 (i8*, i8**, ...)*)(i8* %0, i8** %3)
ret i32 %4
}
void gtk_label_set_text_with_mnemonic() {}


x86 assembly (clang, -O0):
<gtk_label_set_text_with_mnemonic>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_label_set_text_with_mnemonic>:
ret

LLVM IR (-O0):
define void @gtk_label_set_text_with_mnemonic() {
ret void
}

LLVM IR (-O2):
define void @gtk_label_set_text_with_mnemonic() {
ret void
}
int test_imm_A2int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0xA2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A2int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0xa2,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A2int64_midword_mem>:
testb  $0xa2,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A2int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 162
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_A2int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 10616832
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int cyano(voi4d) {
  printf("Hello world\n");
  return 0;
}


x86 assembly (clang, -O0):
<cyano>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cyano>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello world\0A\00"
define i32 @cyano(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [12 x i8] c"Hello world\00"
define i32 @cyano(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ mvprintw(int, int, char *);
int /*<<< orphan*/ sprintf(char *, char *, int);
void charTest(char c, int x, int y) {
  char string[10];
  sprintf(string, "char value %d", (int)c);
  mvprintw(x, y, string);
}


x86 assembly (clang, -O0):
<charTest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
lea    -0x16(%rbp),%rdi
movsbl -0x1(%rbp),%edx
lea    0xebd(%rip),%rsi
call   1030 <sprintf@plt>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
lea    -0x16(%rbp),%rdx
call   1040 <mvprintw@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<charTest>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %edx,%ebx
mov    %esi,%ebp
mov    %edi,%edx
lea    0xecb(%rip),%rsi
lea    0x6(%rsp),%r14
mov    %r14,%rdi
call   1030 <sprintf@plt>
mov    %ebp,%edi
mov    %ebx,%esi
mov    %r14,%rdx
call   1040 <mvprintw@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [14 x i8] c"char value %d\00"
define void @charTest(i8 signext %0, i32 %1, i32 %2) {
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca [10 x i8]
store i8 %0, i8* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = getelementptr inbounds [10 x i8], [10 x i8]* %7, i64 0, i64 0
%9 = load i8, i8* %4
%10 = sext i8 %9 to i32
%11 = call i32 @sprintf(i8* %8, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %10)
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = getelementptr inbounds [10 x i8], [10 x i8]* %7, i64 0, i64 0
%15 = call i32 @mvprintw(i32 %12, i32 %13, i8* %14)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"char value %d\00"
define void @charTest(i8 signext %0, i32 %1, i32 %2) {
%4 = alloca [10 x i8]
%5 = getelementptr inbounds [10 x i8], [10 x i8]* %4, i64 0, i64 0
%6 = sext i8 %0 to i32
%7 = call i32 @sprintf(i8* %5, i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = call i32 @mvprintw(i32 %1, i32 %2, i8* %5)
ret void
}
/* Type definitions */
struct timezone {
  int dummy;
};
struct timeval {
  double tv_sec;
  int tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, struct timezone *);
double realtime() {
  struct timeval tp;
  struct timezone tzp;
  gettimeofday(&tp, &tzp);
  return tp.tv_sec + tp.tv_usec * 1e-6;
}


x86 assembly (clang, -O0):
<realtime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <gettimeofday@plt>
movsd  -0x10(%rbp),%xmm1
cvtsi2sdl -0x8(%rbp),%xmm0
movsd  0xec9(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<realtime>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
mov    %rsp,%rsi
call   1030 <gettimeofday@plt>
cvtsi2sdl 0x10(%rsp),%xmm0
mulsd  0xed1(%rip),%xmm0
addsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { double, i32 }
%struct.timezone = type { i32 }
define double @realtime() {
%1 = alloca %struct.timeval
%2 = alloca %struct.timezone
%3 = call i32 @gettimeofday(%struct.timeval* %1, %struct.timezone* %2)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%5 = load double, double* %4
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%7 = load i32, i32* %6
%8 = sitofp i32 %7 to double
%9 = call double @llvm.fmuladd.f64(double %8, double 0x3EB0C6F7A0B5ED8D, double %5)
ret double %9
}

LLVM IR (-O2):
%struct.timeval = type { double, i32 }
%struct.timezone = type { i32 }
define double @realtime() {
%1 = alloca %struct.timeval
%2 = alloca %struct.timezone
%3 = bitcast %struct.timeval* %1 to i8*
%4 = bitcast %struct.timezone* %2 to i8*
%5 = call i32 @gettimeofday(%struct.timeval* %1, %struct.timezone* %2)
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%7 = load double, double* %6
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%9 = load i32, i32* %8
%10 = sitofp i32 %9 to double
%11 = tail call double @llvm.fmuladd.f64(double %10, double 0x3EB0C6F7A0B5ED8D, double %7)
ret double %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ wait(int);
int openerror(int chan, char *fname, int test) {
  int result;
  if (result = (chan == test)) {
    printf("\n\nERROR - Cannot open %s\n\n", fname);
    wait(3);
  }
  return result;
}


x86 assembly (clang, -O0):
<openerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x14(%rbp),%eax
sete   %al
mov    %al,%cl
and    $0x1,%cl
movzbl %cl,%ecx
mov    %ecx,-0x18(%rbp)
test   $0x1,%al
jne    1153 <openerror+0x33>
jmp    116d <openerror+0x4d>
mov    -0x10(%rbp),%rsi
lea    0xea2(%rip),%rdi
call   1030 <printf@plt>
mov    $0x3,%edi
call   1040 <wait@plt>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<openerror>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebx
mov    %edi,%ebp
cmp    %edx,%edi
jne    1141 <openerror+0x21>
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
mov    $0x3,%edi
call   1040 <wait@plt>
xor    %eax,%eax
cmp    %ebx,%ebp
sete   %al
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [27 x i8] c"\0A\0AERROR - Cannot open %s\0A\0A\00"
define i32 @openerror(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %6
%10 = icmp eq i32 %8, %9
%11 = zext i1 %10 to i32
store i32 %11, i32* %7
br i1 %10, label %12, label %16
12: ; preds = %3
%13 = load i8*, i8** %5
%14 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %13)
%15 = call i32 @wait(i32 3)
br label %16
16: ; preds = %12, %3
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
@.str = [27 x i8] c"\0A\0AERROR - Cannot open %s\0A\0A\00"
define i32 @openerror(i32 %0, i8* %1, i32 %2) {
%4 = icmp eq i32 %0, %2
br i1 %4, label %5, label %8
5: ; preds = %3
%6 = tail call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %1)
%7 = tail call i32 @wait(i32 3)
br label %8
8: ; preds = %5, %3
%9 = zext i1 %4 to i32
ret i32 %9
}
int spower_register_driver(void) { return 0; }


x86 assembly (clang, -O0):
<spower_register_driver>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spower_register_driver>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @spower_register_driver() {
ret i32 0
}

LLVM IR (-O2):
define i32 @spower_register_driver() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ cmdf__default_commandloop();
void cmdf_commandloop(void) { cmdf__default_commandloop(); }


x86 assembly (clang, -O0):
<cmdf_commandloop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <cmdf__default_commandloop@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmdf_commandloop>:
xor    %eax,%eax
jmp    1030 <cmdf__default_commandloop@plt>

LLVM IR (-O0):
define void @cmdf_commandloop() {
%1 = call i32 (...) @cmdf__default_commandloop()
ret void
}

LLVM IR (-O2):
define void @cmdf_commandloop() {
%1 = tail call i32 (...) @cmdf__default_commandloop()
ret void
}
/* Variables and functions */
double fscan_double(int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
double scan_double() { return fscan_double(stdin); }


x86 assembly (clang, -O0):
<scan_double>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <fscan_double@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<scan_double>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <fscan_double@plt>

LLVM IR (-O0):
@stdin = global i32 0
define double @scan_double() {
%1 = load i32, i32* @stdin
%2 = call double @fscan_double(i32 %1)
ret double %2
}

LLVM IR (-O2):
@stdin = global i32 0
define double @scan_double() {
%1 = load i32, i32* @stdin
%2 = tail call double @fscan_double(i32 %1)
ret double %2
}
/* Variables and functions */
char *expand_abbreviations(char *);
int /*<<< orphan*/ free(char *);
int tally(char *);
int roman_to_int(char roman[]) {
  char *expanded = expand_abbreviations(roman);
  int result = tally(expanded);
  free(expanded);
  return result;
}


x86 assembly (clang, -O0):
<roman_to_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <expand_abbreviations@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <tally@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<roman_to_int>:
push   %rbp
push   %rbx
push   %rax
call   1040 <expand_abbreviations@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1050 <tally@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @roman_to_int(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i8* @expand_abbreviations(i8* %5)
store i8* %6, i8** %3
%7 = load i8*, i8** %3
%8 = call i32 @tally(i8* %7)
store i32 %8, i32* %4
%9 = load i8*, i8** %3
%10 = call i32 @free(i8* %9)
%11 = load i32, i32* %4
ret i32 %11
}

LLVM IR (-O2):
define i32 @roman_to_int(i8* %0) {
%2 = tail call i8* @expand_abbreviations(i8* %0)
%3 = tail call i32 @tally(i8* %2)
%4 = tail call i32 @free(i8* %2)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputc(char, int /*<<< orphan*/ *);
void write_string(FILE *file, char *s, int size) {
  int count;
  for (count = 0; count < size; count++)
    fputc(s[count], file);
}


x86 assembly (clang, -O0):
<write_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    115b <write_string+0x4b>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    -0x8(%rbp),%rsi
movsbl %al,%edi
call   1030 <fputc@plt>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    112a <write_string+0x1a>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_string>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %edx,%edx
jle    1146 <write_string+0x36>
mov    %rsi,%r14
mov    %rdi,%r15
mov    %edx,%r12d
xor    %ebx,%ebx
nopw   0x0(%rax,%rax,1)
movsbl (%r14,%rbx,1),%edi
mov    %r15,%rsi
call   1030 <fputc@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <write_string+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @write_string(i32* %0, i8* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %20, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %23
12: ; preds = %8
%13 = load i8*, i8** %5
%14 = load i32, i32* %7
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = load i32*, i32** %4
%19 = call i32 @fputc(i8 signext %17, i32* %18)
br label %20
20: ; preds = %12
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
store i32 %22, i32* %7
br label %8
23: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @write_string(i32* nocapture %0, i8* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %14
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %7
7: ; preds = %5, %7
%8 = phi i64 [ 0, %5 ], [ %12, %7 ]
%9 = getelementptr inbounds i8, i8* %1, i64 %8
%10 = load i8, i8* %9
%11 = tail call i32 @fputc(i8 signext %10, i32* %0)
%12 = add nuw nsw i64 %8, 1
%13 = icmp eq i64 %12, %6
br i1 %13, label %14, label %7
14: ; preds = %7, %3
ret void
}