xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ GLsizei;
typedef int /*<<< orphan*/ GLint;
typedef int /*<<< orphan*/ GLenum;

/* Variables and functions */
int /*<<< orphan*/ glCopyPixels(int /*<<< orphan*/, int /*<<< orphan*/,
                                int /*<<< orphan*/, int /*<<< orphan*/,
                                int /*<<< orphan*/);
void CopyPixels(GLint x, GLint y, GLsizei width, GLsizei height, GLenum type) {
  glCopyPixels(x, y, width, height, type);
}


x86 assembly (clang, -O0):
<CopyPixels>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
call   1030 <glCopyPixels@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CopyPixels>:
jmp    1030 <glCopyPixels@plt>

LLVM IR (-O0):
define void @CopyPixels(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i32 @glCopyPixels(i32 %11, i32 %12, i32 %13, i32 %14, i32 %15)
ret void
}

LLVM IR (-O2):
define void @CopyPixels(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @glCopyPixels(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4)
ret void
}
void process_oob(int from, unsigned char *buf) {}


x86 assembly (clang, -O0):
<process_oob>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<process_oob>:
ret

LLVM IR (-O0):
define void @process_oob(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @process_oob(i32 %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void const *, int);
void ZSTDv05_copy8(void *dst, const void *src) { memcpy(dst, src, 8); }


x86 assembly (clang, -O0):
<ZSTDv05_copy8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x8,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZSTDv05_copy8>:
mov    $0x8,%edx
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @ZSTDv05_copy8(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @memcpy(i8* %5, i8* %6, i32 8)
ret void
}

LLVM IR (-O2):
define void @ZSTDv05_copy8(i8* %0, i8* %1) {
%3 = tail call i32 @memcpy(i8* %0, i8* %1, i32 8)
ret void
}
int __nesf2(float a __attribute__((unused)), float b __attribute__((unused))) {
  return 0;
}


x86 assembly (clang, -O0):
<__nesf2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__nesf2>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__nesf2(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @__nesf2(float %0, float %1) {
ret i32 0
}
char __attribute__((visibility("default"))) func_c() { return 'c'; }


x86 assembly (clang, -O0):
<func_c>:
push   %rbp
mov    %rsp,%rbp
mov    $0x63,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_c>:
mov    $0x63,%al
ret

LLVM IR (-O0):
define signext i8 @func_c() {
ret i8 99
}

LLVM IR (-O2):
define signext i8 @func_c() {
ret i8 99
}
/* Variables and functions */
int /*<<< orphan*/ cache_sync();
int /*<<< orphan*/ cache_wait(int, int);
scalar_t__ l2x0_status();
void l2x0_clean_inv_all() {
  if (l2x0_status()) {
    (*((volatile unsigned *)(0xC4200000 + 0x7FC)) = 0xff);
    cache_wait((0xC4200000 + 0x7FC), 0xff);
    cache_sync();
  }
}


x86 assembly (clang, -O0):
<l2x0_clean_inv_all>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <l2x0_status@plt>
cmp    $0x0,%rax
je     1166 <l2x0_clean_inv_all+0x36>
mov    $0xc42007fc,%eax
movl   $0xff,(%rax)
mov    $0xc42007fc,%edi
mov    $0xff,%esi
call   1050 <cache_wait@plt>
mov    $0x0,%al
call   1030 <cache_sync@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<l2x0_clean_inv_all>:
push   %rax
xor    %eax,%eax
call   1040 <l2x0_status@plt>
test   %rax,%rax
je     115f <l2x0_clean_inv_all+0x2f>
mov    $0xc42007fc,%eax
movl   $0xff,(%rax)
mov    $0xc42007fc,%edi
mov    $0xff,%esi
call   1050 <cache_wait@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <cache_sync@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @l2x0_clean_inv_all() {
%1 = call i64 (...) @l2x0_status()
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %6
3: ; preds = %0
store volatile i32 255, i32* inttoptr (i64 3290433532 to i32*)
%4 = call i32 @cache_wait(i32 -1004533764, i32 255)
%5 = call i32 (...) @cache_sync()
br label %6
6: ; preds = %3, %0
ret void
}

LLVM IR (-O2):
define void @l2x0_clean_inv_all() {
%1 = tail call i64 (...) @l2x0_status()
%2 = icmp eq i64 %1, 0
br i1 %2, label %6, label %3
3: ; preds = %0
store volatile i32 255, i32* inttoptr (i64 3290433532 to i32*)
%4 = tail call i32 @cache_wait(i32 -1004533764, i32 255)
%5 = tail call i32 (...) @cache_sync()
br label %6
6: ; preds = %3, %0
ret void
}
void g_thread_pool_get_num_unused_threads() {}


x86 assembly (clang, -O0):
<g_thread_pool_get_num_unused_threads>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_thread_pool_get_num_unused_threads>:
ret

LLVM IR (-O0):
define void @g_thread_pool_get_num_unused_threads() {
ret void
}

LLVM IR (-O2):
define void @g_thread_pool_get_num_unused_threads() {
ret void
}
int right(int k) { return 2 * (k + 1); }


x86 assembly (clang, -O0):
<right>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<right>:
lea    (%rdi,%rdi,1),%eax
add    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @right(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
%5 = mul nsw i32 2, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @right(i32 %0) {
%2 = shl i32 %0, 1
%3 = add i32 %2, 2
ret i32 %3
}
/* Variables and functions */
scalar_t__ strcmp(char *, char *);
int analarg(int count, char *array[10], int argpos, char *arg) {
  if (argpos >= count)
    return 0;
  if (strcmp(array[argpos], arg) != 0)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<analarg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jl     113e <analarg+0x2e>
movl   $0x0,-0x4(%rbp)
jmp    1170 <analarg+0x60>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
je     1169 <analarg+0x59>
movl   $0x0,-0x4(%rbp)
jmp    1170 <analarg+0x60>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<analarg>:
xor    %eax,%eax
cmp    %edi,%edx
jge    1135 <analarg+0x25>
push   %rax
movslq %edx,%rax
mov    (%rsi,%rax,8),%rdi
mov    %rcx,%rsi
call   1030 <strcmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @analarg(i32 %0, i8** %1, i32 %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8**
%8 = alloca i32
%9 = alloca i8*
store i32 %0, i32* %6
store i8** %1, i8*** %7
store i32 %2, i32* %8
store i8* %3, i8** %9
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp sge i32 %10, %11
br i1 %12, label %13, label %14
13: ; preds = %4
store i32 0, i32* %5
br label %25
14: ; preds = %4
%15 = load i8**, i8*** %7
%16 = load i32, i32* %8
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8*, i8** %15, i64 %17
%19 = load i8*, i8** %18
%20 = load i8*, i8** %9
%21 = call i64 @strcmp(i8* %19, i8* %20)
%22 = icmp ne i64 %21, 0
br i1 %22, label %23, label %24
23: ; preds = %14
store i32 0, i32* %5
br label %25
24: ; preds = %14
store i32 1, i32* %5
br label %25
25: ; preds = %24, %23, %13
%26 = load i32, i32* %5
ret i32 %26
}

LLVM IR (-O2):
define i32 @analarg(i32 %0, i8** nocapture %1, i32 %2, i8* %3) {
%5 = icmp slt i32 %2, %0
br i1 %5, label %6, label %13
6: ; preds = %4
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i8*, i8** %1, i64 %7
%9 = load i8*, i8** %8
%10 = tail call i64 @strcmp(i8* %9, i8* %3)
%11 = icmp eq i64 %10, 0
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %6, %4
%14 = phi i32 [ 0, %4 ], [ %12, %6 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M561_f(char *s) {
  debug("M561_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M561_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M561_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M561_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M561_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M561_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M561_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
done(n) int n;
{
  _cleanup();
  exit(n);
}


x86 assembly (clang, -O0):
<done>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <_cleanup@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<done>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <_cleanup@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i32 @done(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @_cleanup()
%4 = load i32, i32* %2
unreachable
}

LLVM IR (-O2):
define i32 @done(i32 %0) {
%2 = tail call i32 (...) @_cleanup()
tail call void @exit(i32 %0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ char_array_copy__normal_scenario__is_deep_copy();
int /*<<< orphan*/ char_array_to_lower__normal_scenario__array_is_lowered();
int /*<<< orphan*/ char_array_to_upper__normal_scenario__array_is_uppered();
int /*<<< orphan*/ itoa__negative_number__is_converted();
int /*<<< orphan*/ itoa__positive_number__is_converted();
int /*<<< orphan*/ itoa__unsigned_number__is_converted();
void cm_text_tests_run(void) {
  itoa__negative_number__is_converted();
  itoa__positive_number__is_converted();
  itoa__unsigned_number__is_converted();
  char_array_to_lower__normal_scenario__array_is_lowered();
  char_array_to_upper__normal_scenario__array_is_uppered();
  char_array_copy__normal_scenario__is_deep_copy();
}


x86 assembly (clang, -O0):
<cm_text_tests_run>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1070 <itoa__negative_number__is_converted@plt>
mov    $0x0,%al
call   1080 <itoa__positive_number__is_converted@plt>
mov    $0x0,%al
call   1050 <itoa__unsigned_number__is_converted@plt>
mov    $0x0,%al
call   1040 <char_array_to_lower__normal_scenario__array_is_lowered@plt>
mov    $0x0,%al
call   1060 <char_array_to_upper__normal_scenario__array_is_uppered@plt>
mov    $0x0,%al
call   1030 <char_array_copy__normal_scenario__is_deep_copy@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cm_text_tests_run>:
push   %rax
xor    %eax,%eax
call   1070 <itoa__negative_number__is_converted@plt>
xor    %eax,%eax
call   1080 <itoa__positive_number__is_converted@plt>
xor    %eax,%eax
call   1050 <itoa__unsigned_number__is_converted@plt>
xor    %eax,%eax
call   1040 <char_array_to_lower__normal_scenario__array_is_lowered@plt>
xor    %eax,%eax
call   1060 <char_array_to_upper__normal_scenario__array_is_uppered@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <char_array_copy__normal_scenario__is_deep_copy@plt>

LLVM IR (-O0):
define void @cm_text_tests_run() {
%1 = call i32 (...) @itoa__negative_number__is_converted()
%2 = call i32 (...) @itoa__positive_number__is_converted()
%3 = call i32 (...) @itoa__unsigned_number__is_converted()
%4 = call i32 (...) @char_array_to_lower__normal_scenario__array_is_lowered()
%5 = call i32 (...) @char_array_to_upper__normal_scenario__array_is_uppered()
%6 = call i32 (...) @char_array_copy__normal_scenario__is_deep_copy()
ret void
}

LLVM IR (-O2):
define void @cm_text_tests_run() {
%1 = tail call i32 (...) @itoa__negative_number__is_converted()
%2 = tail call i32 (...) @itoa__positive_number__is_converted()
%3 = tail call i32 (...) @itoa__unsigned_number__is_converted()
%4 = tail call i32 (...) @char_array_to_lower__normal_scenario__array_is_lowered()
%5 = tail call i32 (...) @char_array_to_upper__normal_scenario__array_is_uppered()
%6 = tail call i32 (...) @char_array_copy__normal_scenario__is_deep_copy()
ret void
}
__attribute__((always_)) int unregister_trace_mm_page_alloc_zone_locked(
    void (*probe)(void *__data, struct page *page, unsigned int order,
                  int migratetype),
    void *data) {
  return -38;
}


x86 assembly (clang, -O0):
<unregister_trace_mm_page_alloc_zone_locked>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffda,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unregister_trace_mm_page_alloc_zone_locked>:
mov    $0xffffffda,%eax
ret

LLVM IR (-O0):
%struct.page = type opaque
define i32 @unregister_trace_mm_page_alloc_zone_locked(void (i8*, %struct.page*, i32, i32)* %0, i8* %1) {
%3 = alloca void (i8*, %struct.page*, i32, i32)*
%4 = alloca i8*
store void (i8*, %struct.page*, i32, i32)* %0, void (i8*, %struct.page*, i32, i32)** %3
store i8* %1, i8** %4
ret i32 -38
}

LLVM IR (-O2):
%struct.page = type opaque
define i32 @unregister_trace_mm_page_alloc_zone_locked(void (i8*, %struct.page*, i32, i32)* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 -38
}
long SPIDataPutNonBlocking(unsigned long ulBase, unsigned long ulData) {
  unsigned long ulRegVal;
  ulRegVal = (*((volatile unsigned long *)(ulBase + 0x00000130)));
  if (ulRegVal & 0x00000002) {
    (*((volatile unsigned long *)(ulBase + 0x00000138))) = ulData;
    return (1);
  }
  return (0);
}


x86 assembly (clang, -O0):
<SPIDataPutNonBlocking>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    0x130(%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
and    $0x2,%rax
cmp    $0x0,%rax
je     1149 <SPIDataPutNonBlocking+0x49>
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,0x138(%rax)
movq   $0x1,-0x8(%rbp)
jmp    1151 <SPIDataPutNonBlocking+0x51>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPIDataPutNonBlocking>:
testq  $0x2,0x130(%rdi)
jne    1110 <SPIDataPutNonBlocking+0x10>
xor    %eax,%eax
ret
mov    %rsi,0x138(%rdi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i64 @SPIDataPutNonBlocking(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%7 = load i64, i64* %4
%8 = add i64 %7, 304
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
store i64 %10, i64* %6
%11 = load i64, i64* %6
%12 = and i64 %11, 2
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %19
14: ; preds = %2
%15 = load i64, i64* %5
%16 = load i64, i64* %4
%17 = add i64 %16, 312
%18 = inttoptr i64 %17 to i64*
store volatile i64 %15, i64* %18
store i64 1, i64* %3
br label %20
19: ; preds = %2
store i64 0, i64* %3
br label %20
20: ; preds = %19, %14
%21 = load i64, i64* %3
ret i64 %21
}

LLVM IR (-O2):
define i64 @SPIDataPutNonBlocking(i64 %0, i64 %1) {
%3 = add i64 %0, 304
%4 = inttoptr i64 %3 to i64*
%5 = load volatile i64, i64* %4
%6 = and i64 %5, 2
%7 = icmp eq i64 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = add i64 %0, 312
%10 = inttoptr i64 %9 to i64*
store volatile i64 %1, i64* %10
br label %11
11: ; preds = %2, %8
%12 = phi i64 [ 1, %8 ], [ 0, %2 ]
ret i64 %12
}
int fibrec(int n) {
  if (n <= 2)
    return 1;
  return fibrec(n - 1) + fibrec(n - 2);
}


x86 assembly (clang, -O0):
<fibrec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jg     1131 <fibrec+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1154 <fibrec+0x44>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fibrec@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fibrec@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibrec>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x3,%edi
jl     1145 <fibrec+0x35>
mov    %edi,%ebx
add    $0x2,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    -0x3(%rbx),%edi
call   1030 <fibrec@plt>
add    %eax,%ebp
add    $0xfffffffe,%ebx
cmp    $0x4,%ebx
ja     1130 <fibrec+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fibrec(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 2
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %15
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i32 @fibrec(i32 %9)
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 2
%13 = call i32 @fibrec(i32 %12)
%14 = add nsw i32 %10, %13
store i32 %14, i32* %2
br label %15
15: ; preds = %7, %6
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @fibrec(i32 %0) {
%2 = icmp slt i32 %0, 3
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fibrec(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 5
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
void dummy2(void) { int j; }


x86 assembly (clang, -O0):
<dummy2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy2>:
ret

LLVM IR (-O0):
define void @dummy2() {
%1 = alloca i32
ret void
}

LLVM IR (-O2):
define void @dummy2() {
ret void
}
extern int shmem_test_lock(long *lock) { return 1; }


x86 assembly (clang, -O0):
<shmem_test_lock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmem_test_lock>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @shmem_test_lock(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @shmem_test_lock(i64* nocapture readnone %0) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printMeter100Scale();
void printSpeedometerScale(void) {
  printMeter100Scale();
  return;
}


x86 assembly (clang, -O0):
<printSpeedometerScale>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <printMeter100Scale@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<printSpeedometerScale>:
xor    %eax,%eax
jmp    1030 <printMeter100Scale@plt>

LLVM IR (-O0):
define void @printSpeedometerScale() {
%1 = call i32 (...) @printMeter100Scale()
ret void
}

LLVM IR (-O2):
define void @printSpeedometerScale() {
%1 = tail call i32 (...) @printMeter100Scale()
ret void
}
/* Variables and functions */
size_t minipack_sizeof_elem_and_data(void *);
void sky_set_noop(void *target, void *value, size_t *sz) {
  ((void)(target));
  *sz = minipack_sizeof_elem_and_data(value);
}


x86 assembly (clang, -O0):
<sky_set_noop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <minipack_sizeof_elem_and_data@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sky_set_noop>:
push   %rbx
mov    %rdx,%rbx
mov    %rsi,%rdi
call   1030 <minipack_sizeof_elem_and_data@plt>
mov    %rax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @sky_set_noop(i8* %0, i8* %1, i64* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64* %2, i64** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = call i64 @minipack_sizeof_elem_and_data(i8* %8)
%10 = load i64*, i64** %6
store i64 %9, i64* %10
ret void
}

LLVM IR (-O2):
define void @sky_set_noop(i8* nocapture readnone %0, i8* %1, i64* nocapture writeonly %2) {
%4 = tail call i64 @minipack_sizeof_elem_and_data(i8* %1)
store i64 %4, i64* %2
ret void
}
/* Variables and functions */
int cirQueueSize();
int /*<<< orphan*/ cirQueueTraverse(int *);
int dequeue(int *);
int /*<<< orphan*/ inQueue(int *, int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int queue[10];
  int data;
  inQueue(queue, 4);
  cirQueueTraverse(queue);
  data = dequeue(queue);
  printf("Queue Size=%d \n", cirQueueSize());
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
lea    -0x30(%rbp),%rdi
mov    $0x4,%esi
call   1030 <inQueue@plt>
lea    -0x30(%rbp),%rdi
call   1060 <cirQueueTraverse@plt>
lea    -0x30(%rbp),%rdi
call   1050 <dequeue@plt>
mov    %eax,-0x34(%rbp)
mov    $0x0,%al
call   1070 <cirQueueSize@plt>
mov    %eax,%esi
lea    0xe75(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x30,%rsp
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x4,%esi
call   1030 <inQueue@plt>
mov    %rbx,%rdi
call   1060 <cirQueueTraverse@plt>
mov    %rbx,%rdi
call   1050 <dequeue@plt>
xor    %eax,%eax
call   1070 <cirQueueSize@plt>
lea    0xe7d(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"Queue Size=%d \0A\00"
define i32 @main() {
%1 = alloca [10 x i32]
%2 = alloca i32
%3 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%4 = call i32 @inQueue(i32* %3, i32 4)
%5 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%6 = call i32 @cirQueueTraverse(i32* %5)
%7 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%8 = call i32 @dequeue(i32* %7)
store i32 %8, i32* %2
%9 = call i32 (...) @cirQueueSize()
%10 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"Queue Size=%d \0A\00"
define i32 @main() {
%1 = alloca [10 x i32]
%2 = bitcast [10 x i32]* %1 to i8*
%3 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%4 = call i32 @inQueue(i32* %3, i32 4)
%5 = call i32 @cirQueueTraverse(i32* %3)
%6 = call i32 @dequeue(i32* %3)
%7 = call i32 (...) @cirQueueSize()
%8 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ WRITETEST(char *);
void SetDispUnderscore() { WRITETEST("\033[4m"); }


x86 assembly (clang, -O0):
<SetDispUnderscore>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <WRITETEST@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetDispUnderscore>:
lea    0xee9(%rip),%rdi
jmp    1030 <WRITETEST@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"\1B[4m\00"
define void @SetDispUnderscore() {
%1 = call i32 @WRITETEST(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"\1B[4m\00"
define void @SetDispUnderscore() {
%1 = tail call i32 @WRITETEST(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
int iwc_error(int res) {
  switch (res) {
  case -1:
    perror("read");
    return -1;
  case -2:
    perror("lseek");
    return -1;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<iwc_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0xfffffffe,%eax
je     1158 <iwc_error+0x48>
jmp    112f <iwc_error+0x1f>
mov    -0xc(%rbp),%eax
sub    $0xffffffff,%eax
jne    1170 <iwc_error+0x60>
jmp    1140 <iwc_error+0x30>
lea    0xeb9(%rip),%rdi
call   1030 <perror@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1177 <iwc_error+0x67>
lea    0xea6(%rip),%rdi
call   1030 <perror@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1177 <iwc_error+0x67>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iwc_error>:
cmp    $0xffffffff,%edi
je     111d <iwc_error+0xd>
xor    %eax,%eax
cmp    $0xfffffffe,%edi
je     1126 <iwc_error+0x16>
ret
lea    0xedc(%rip),%rdi
jmp    112d <iwc_error+0x1d>
lea    0xed8(%rip),%rdi
push   %rax
call   1030 <perror@plt>
mov    $0xffffffff,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
@.str = [5 x i8] c"read\00"
@.str.1 = [6 x i8] c"lseek\00"
define i32 @iwc_error(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 -1, label %5
i32 -2, label %7
]
5: ; preds = %1
%6 = call i32 @perror(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %2
br label %10
7: ; preds = %1
%8 = call i32 @perror(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
store i32 -1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %7, %5
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@.str = [5 x i8] c"read\00"
@.str.1 = [6 x i8] c"lseek\00"
define i32 @iwc_error(i32 %0) {
switch i32 %0, label %6 [
i32 -1, label %3
i32 -2, label %2
]
2: ; preds = %1
br label %3
3: ; preds = %1, %2
%4 = phi i8* [ getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), %2 ], [ getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), %1 ]
%5 = tail call i32 @perror(i8* %4)
br label %6
6: ; preds = %3, %1
%7 = phi i32 [ 0, %1 ], [ -1, %3 ]
ret i32 %7
}
/* Variables and functions */
int my_function(char *);
int main() { return my_function(L"hi, World!\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <my_function@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xee9(%rip),%rdi
jmp    1030 <my_function@plt>

LLVM IR (-O0):
@.str = [12 x i32] [i32 104, i32 105, i32 44, i32 32, i32 87, i32 111, i32 114, i32 108, i32 100, i32 33, i32 10, i32 0]
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @my_function(i8* bitcast ([12 x i32]* @.str to i8*))
ret i32 %2
}

LLVM IR (-O2):
@.str = [12 x i32] [i32 104, i32 105, i32 44, i32 32, i32 87, i32 111, i32 114, i32 108, i32 100, i32 33, i32 10, i32 0]
define i32 @main() {
%1 = tail call i32 @my_function(i8* bitcast ([12 x i32]* @.str to i8*))
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ VIM_SIF_I2cReadByte(unsigned char, unsigned char *);
void SensorGetReg_BF3403(unsigned char uAddr, unsigned short *uVal) {
  VIM_SIF_I2cReadByte((unsigned char)uAddr, (unsigned char *)uVal);
}


x86 assembly (clang, -O0):
<SensorGetReg_BF3403>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x1(%rbp),%al
mov    -0x10(%rbp),%rsi
movzbl %al,%edi
call   1030 <VIM_SIF_I2cReadByte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SensorGetReg_BF3403>:
jmp    1030 <VIM_SIF_I2cReadByte@plt>

LLVM IR (-O0):
define void @SensorGetReg_BF3403(i8 zeroext %0, i16* %1) {
%3 = alloca i8
%4 = alloca i16*
store i8 %0, i8* %3
store i16* %1, i16** %4
%5 = load i8, i8* %3
%6 = load i16*, i16** %4
%7 = bitcast i16* %6 to i8*
%8 = call i32 @VIM_SIF_I2cReadByte(i8 zeroext %5, i8* %7)
ret void
}

LLVM IR (-O2):
define void @SensorGetReg_BF3403(i8 zeroext %0, i16* %1) {
%3 = bitcast i16* %1 to i8*
%4 = tail call i32 @VIM_SIF_I2cReadByte(i8 zeroext %0, i8* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int get_range_size(int, int);
double relative_part_factor_from_absolute_value(int range_begin, int range_end,
                                                int value) {
  int range_size = get_range_size(range_begin, range_end);
  int relative_value = value - range_begin;
  assert(range_size);
  return (double)relative_value / (double)range_size;
}


x86 assembly (clang, -O0):
<relative_part_factor_from_absolute_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <get_range_size@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%edi
call   1030 <assert@plt>
cvtsi2sdl -0x14(%rbp),%xmm0
cvtsi2sdl -0x10(%rbp),%xmm1
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<relative_part_factor_from_absolute_value>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%ebx
mov    %edi,%ebp
call   1040 <get_range_size@plt>
mov    %eax,%r14d
sub    %ebp,%ebx
mov    %eax,%edi
call   1030 <assert@plt>
cvtsi2sd %ebx,%xmm0
cvtsi2sd %r14d,%xmm1
divsd  %xmm1,%xmm0
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define double @relative_part_factor_from_absolute_value(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = call i32 @get_range_size(i32 %9, i32 %10)
store i32 %11, i32* %7
%12 = load i32, i32* %6
%13 = load i32, i32* %4
%14 = sub nsw i32 %12, %13
store i32 %14, i32* %8
%15 = load i32, i32* %7
%16 = call i32 @assert(i32 %15)
%17 = load i32, i32* %8
%18 = sitofp i32 %17 to double
%19 = load i32, i32* %7
%20 = sitofp i32 %19 to double
%21 = fdiv double %18, %20
ret double %21
}

LLVM IR (-O2):
define double @relative_part_factor_from_absolute_value(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @get_range_size(i32 %0, i32 %1)
%5 = sub nsw i32 %2, %0
%6 = tail call i32 @assert(i32 %4)
%7 = sitofp i32 %5 to double
%8 = sitofp i32 %4 to double
%9 = fdiv double %7, %8
ret double %9
}
indreg0adrx1(r0, r1, x0, x1, p0, p1) unsigned int r0, r1;
unsigned int *p0, *p1;
{
  if ((*p0) <= (((unsigned int *)11111111)[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<indreg0adrx1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%eax
movslq -0x14(%rbp),%rdx
mov    $0xa98ac7,%ecx
cmp    (%rcx,%rdx,4),%eax
ja     113c <indreg0adrx1+0x3c>
movl   $0x1,-0x4(%rbp)
jmp    1143 <indreg0adrx1+0x43>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<indreg0adrx1>:
mov    (%r8),%edx
movslq %ecx,%rcx
xor    %eax,%eax
cmp    0xa98ac7(,%rcx,4),%edx
setbe  %al
ret

LLVM IR (-O0):
define i32 @indreg0adrx1(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32*, i32** %12
%15 = load i32, i32* %14
%16 = load i32, i32* %11
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* inttoptr (i64 11111111 to i32*), i64 %17
%19 = load i32, i32* %18
%20 = icmp ule i32 %15, %19
br i1 %20, label %21, label %22
21: ; preds = %6
store i32 1, i32* %7
br label %23
22: ; preds = %6
store i32 0, i32* %7
br label %23
23: ; preds = %22, %21
%24 = load i32, i32* %7
ret i32 %24
}

LLVM IR (-O2):
define i32 @indreg0adrx1(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture %4, i32* nocapture readnone %5) {
%7 = load i32, i32* %4
%8 = sext i32 %3 to i64
%9 = getelementptr inbounds i32, i32* inttoptr (i64 11111111 to i32*), i64 %8
%10 = load i32, i32* %9
%11 = icmp ule i32 %7, %10
%12 = zext i1 %11 to i32
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ p();
main() { p(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <p@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <p@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @p()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @p()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ out_line_count(char const *);
int /*<<< orphan*/ printf(char const *, int, int);
void out_dec2(const char *fmt, int n1, int n2) {
  printf(fmt, n1, n2);
  out_line_count(fmt);
}


x86 assembly (clang, -O0):
<out_dec2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <printf@plt>
mov    -0x8(%rbp),%rdi
call   1040 <out_line_count@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<out_dec2>:
push   %rbx
mov    %rdi,%rbx
call   1030 <printf@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <out_line_count@plt>

LLVM IR (-O0):
define void @out_dec2(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @printf(i8* %7, i32 %8, i32 %9)
%11 = load i8*, i8** %4
%12 = call i32 @out_line_count(i8* %11)
ret void
}

LLVM IR (-O2):
define void @out_dec2(i8* %0, i32 %1, i32 %2) {
%4 = tail call i32 @printf(i8* %0, i32 %1, i32 %2)
%5 = tail call i32 @out_line_count(i8* %0)
ret void
}
/* Type definitions */
typedef unsigned long long uint64_t;

/* Variables and functions */
unsigned long long rdmsr(int);
bool apic2_is_enable(void) {
  uint64_t val = rdmsr(0x1b);
  return (val & ((1ULL << 10) | (1ULL << 11))) == ((1ULL << 10) | (1ULL << 11));
}


x86 assembly (clang, -O0):
<apic2_is_enable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1b,%edi
call   1030 <rdmsr@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0xc00,%rax
cmp    $0xc00,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<apic2_is_enable>:
push   %rax
mov    $0x1b,%edi
call   1030 <rdmsr@plt>
not    %eax
xor    %ecx,%ecx
test   $0xc00,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @apic2_is_enable() {
%1 = alloca i64
%2 = call i64 @rdmsr(i32 27)
store i64 %2, i64* %1
%3 = load i64, i64* %1
%4 = and i64 %3, 3072
%5 = icmp eq i64 %4, 3072
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @apic2_is_enable() {
%1 = tail call i64 @rdmsr(i32 27)
%2 = and i64 %1, 3072
%3 = icmp eq i64 %2, 3072
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ fatal_error(char *, char *);
int putenv(char *);
void xputenv(char *string) {
  if (putenv(string) == -1)
    fatal_error("Unable to declare `%s'\n", string);
}


x86 assembly (clang, -O0):
<xputenv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <putenv@plt>
cmp    $0xffffffff,%eax
jne    114e <xputenv+0x2e>
mov    -0x8(%rbp),%rsi
lea    0xeb7(%rip),%rdi
call   1040 <fatal_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xputenv>:
push   %rbx
mov    %rdi,%rbx
call   1030 <putenv@plt>
cmp    $0xffffffff,%eax
je     1130 <xputenv+0x10>
pop    %rbx
ret
lea    0xec9(%rip),%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <fatal_error@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"Unable to declare `%s'\0A\00"
define void @xputenv(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @putenv(i8* %3)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i32 @fatal_error(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* %7)
br label %9
9: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"Unable to declare `%s'\0A\00"
define void @xputenv(i8* %0) {
%2 = tail call i32 @putenv(i8* %0)
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @fatal_error(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %6
6: ; preds = %4, %1
ret void
}
int libtasTestFunc3() { return 1; }


x86 assembly (clang, -O0):
<libtasTestFunc3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<libtasTestFunc3>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @libtasTestFunc3() {
ret i32 1
}

LLVM IR (-O2):
define i32 @libtasTestFunc3() {
ret i32 1
}
/* Type definitions */
struct mdea_array {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mdea_error(char **, char *);
int mdea_string_node_get_array(void *p, struct mdea_array **array,
                               char **error) {
  mdea_error(error, "Expected array, got string");
  return -1;
}


x86 assembly (clang, -O0):
<mdea_string_node_get_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
lea    0xed1(%rip),%rsi
call   1030 <mdea_error@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdea_string_node_get_array>:
push   %rax
mov    %rdx,%rdi
lea    0xee5(%rip),%rsi
call   1030 <mdea_error@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.mdea_array = type { i32 }
@.str = [27 x i8] c"Expected array, got string\00"
define i32 @mdea_string_node_get_array(i8* %0, %struct.mdea_array** %1, i8** %2) {
%4 = alloca i8*
%5 = alloca %struct.mdea_array**
%6 = alloca i8**
store i8* %0, i8** %4
store %struct.mdea_array** %1, %struct.mdea_array*** %5
store i8** %2, i8*** %6
%7 = load i8**, i8*** %6
%8 = call i32 @mdea_error(i8** %7, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
%struct.mdea_array = type { i32 }
@.str = [27 x i8] c"Expected array, got string\00"
define i32 @mdea_string_node_get_array(i8* nocapture readnone %0, %struct.mdea_array** nocapture readnone %1, i8** %2) {
%4 = tail call i32 @mdea_error(i8** %2, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ send_event;
};
typedef TYPE_1__ XResizeRequestEvent;

/* Variables and functions */
int get_XResizeRequestEvent_send_event(void *_p) {
  return (int)((XResizeRequestEvent *)_p)->send_event;
}


x86 assembly (clang, -O0):
<get_XResizeRequestEvent_send_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XResizeRequestEvent_send_event>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XResizeRequestEvent_send_event(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XResizeRequestEvent_send_event(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void ux00ddr_enablereadlevelinggate(size_t ahbregaddr) {
  (*(volatile uint32_t *)((260 << 2) + (ahbregaddr))) |= (1 << 24);
  (*(volatile uint32_t *)((182 << 2) + (ahbregaddr))) |= (1 << 0);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x410,%rax
mov    (%rax),%ecx
or     $0x1000000,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
add    $0x2d8,%rax
mov    (%rax),%ecx
or     $0x1,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
orl    $0x1000000,0x410(%rdi)
orl    $0x1,0x2d8(%rdi)
ret

LLVM IR (-O0):
define void @ux00ddr_enablereadlevelinggate(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 1040, %3
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = or i32 %6, 16777216
store volatile i32 %7, i32* %5
%8 = load i64, i64* %2
%9 = add i64 728, %8
%10 = inttoptr i64 %9 to i32*
%11 = load volatile i32, i32* %10
%12 = or i32 %11, 1
store volatile i32 %12, i32* %10
ret void
}

LLVM IR (-O2):
define void @ux00ddr_enablereadlevelinggate(i64 %0) {
%2 = add i64 %0, 1040
%3 = inttoptr i64 %2 to i32*
%4 = load volatile i32, i32* %3
%5 = or i32 %4, 16777216
store volatile i32 %5, i32* %3
%6 = add i64 %0, 728
%7 = inttoptr i64 %6 to i32*
%8 = load volatile i32, i32* %7
%9 = or i32 %8, 1
store volatile i32 %9, i32* %7
ret void
}
void g_io_condition_get_type() {}


x86 assembly (clang, -O0):
<g_io_condition_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_io_condition_get_type>:
ret

LLVM IR (-O0):
define void @g_io_condition_get_type() {
ret void
}

LLVM IR (-O2):
define void @g_io_condition_get_type() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_152() {
  Assert_real((isqrt(152) == 12),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              765, ("Integer square root of 152 should be 12"));
}


x86 assembly (clang, -O0):
<t_sqrt_152>:
push   %rbp
mov    %rsp,%rbp
mov    $0x98,%edi
call   1030 <isqrt@plt>
cmp    $0xc,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0x2fd,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_152>:
push   %rax
mov    $0x98,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0xc,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0x2fd,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [40 x i8] c"Integer square root of 152 should be 12\00"
define void @t_sqrt_152() {
%1 = call i32 @isqrt(i32 152)
%2 = icmp eq i32 %1, 12
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 765, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [40 x i8] c"Integer square root of 152 should be 12\00"
define void @t_sqrt_152() {
%1 = tail call i32 @isqrt(i32 152)
%2 = icmp eq i32 %1, 12
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 765, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int cb_log(int prio, char *d, ...) { char *lbuf; }


x86 assembly (clang, -O0):
<cb_log>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cb_log>:
ret

LLVM IR (-O0):
define i32 @cb_log(i32 %0, i8* %1, ...) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @cb_log(i32 %0, i8* nocapture readnone %1, ...) {
ret i32 undef
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ strcpy(char *, char *);
int strlen(char *);
int prepare_get_payload(char *payload) {
  char staticData[] = "GET /index.html HTTP/1.1\nHost: www.target.com";
  payload = (char *)malloc(strlen(staticData) * sizeof(char));
  strcpy(payload, staticData);
  return strlen(payload);
}


x86 assembly (clang, -O0):
<prepare_get_payload>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x40(%rbp),%rdi
lea    0xea9(%rip),%rsi
mov    $0x2e,%edx
call   1050 <memcpy@plt>
lea    -0x40(%rbp),%rdi
call   1040 <strlen@plt>
cltq
shl    $0x0,%rax
mov    %eax,%edi
call   1060 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x40(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prepare_get_payload>:
push   %r14
push   %rbx
sub    $0x38,%rsp
movups 0xee0(%rip),%xmm0
movups %xmm0,0x1e(%rsp)
movaps 0xec6(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xeaa(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%r14
mov    %r14,%rdi
call   1040 <strlen@plt>
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rdi
call   1040 <strlen@plt>
add    $0x38,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@__const.prepare_get_payload.staticData = [46 x i8] c"GET /index.html HTTP/1.1\0AHost: www.target.com\00"
define i32 @prepare_get_payload(i8* %0) {
%2 = alloca i8*
%3 = alloca [46 x i8]
store i8* %0, i8** %2
%4 = bitcast [46 x i8]* %3 to i8*
%5 = getelementptr inbounds [46 x i8], [46 x i8]* %3, i64 0, i64 0
%6 = call i32 @strlen(i8* %5)
%7 = sext i32 %6 to i64
%8 = mul i64 %7, 1
%9 = trunc i64 %8 to i32
%10 = call i64 @malloc(i32 %9)
%11 = inttoptr i64 %10 to i8*
store i8* %11, i8** %2
%12 = load i8*, i8** %2
%13 = getelementptr inbounds [46 x i8], [46 x i8]* %3, i64 0, i64 0
%14 = call i32 @strcpy(i8* %12, i8* %13)
%15 = load i8*, i8** %2
%16 = call i32 @strlen(i8* %15)
ret i32 %16
}

LLVM IR (-O2):
@__const.prepare_get_payload.staticData = [46 x i8] c"GET /index.html HTTP/1.1\0AHost: www.target.com\00"
define i32 @prepare_get_payload(i8* nocapture readnone %0) {
%2 = alloca [46 x i8]
%3 = getelementptr inbounds [46 x i8], [46 x i8]* %2, i64 0, i64 0
%4 = call i32 @strlen(i8* %3)
%5 = call i64 @malloc(i32 %4)
%6 = inttoptr i64 %5 to i8*
%7 = call i32 @strcpy(i8* %6, i8* %3)
%8 = call i32 @strlen(i8* %6)
ret i32 %8
}
/* Variables and functions */
int FSE_optimalTableLog_internal(unsigned int, size_t, unsigned int, int);
unsigned FSE_optimalTableLog(unsigned maxTableLog, size_t srcSize,
                             unsigned maxSymbolValue) {
  return FSE_optimalTableLog_internal(maxTableLog, srcSize, maxSymbolValue, 2);
}


x86 assembly (clang, -O0):
<FSE_optimalTableLog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    $0x2,%ecx
call   1030 <FSE_optimalTableLog_internal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FSE_optimalTableLog>:
mov    $0x2,%ecx
jmp    1030 <FSE_optimalTableLog_internal@plt>

LLVM IR (-O0):
define i32 @FSE_optimalTableLog(i32 %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i64, i64* %5
%9 = load i32, i32* %6
%10 = call i32 @FSE_optimalTableLog_internal(i32 %7, i64 %8, i32 %9, i32 2)
ret i32 %10
}

LLVM IR (-O2):
define i32 @FSE_optimalTableLog(i32 %0, i64 %1, i32 %2) {
%4 = tail call i32 @FSE_optimalTableLog_internal(i32 %0, i64 %1, i32 %2, i32 2)
ret i32 %4
}