#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int gfx_gxm_config_read(int);
unsigned long gu1_get_core_freq(void) {
  unsigned char dir0, dir1;
  dir0 = gfx_gxm_config_read(0xFE) & 0x0F;
  dir1 = gfx_gxm_config_read(0xFF);
  if (dir1 >= 0x50) {
    switch (dir0) {
    case 0:
    case 2:
      return 133;
    case 5:
      return 166;
    case 3:
      return 200;
    case 6:
      return 233;
    case 7:
      return 266;
    case 4:
      return 300;
    case 1:
      return 333;
    default:
      return (0);
    }
  } else {
    switch (dir0) {
    case 0:
    case 2:
      return 133;
    case 7:
      return 166;
    case 1:
    case 3:
      return 200;
    case 4:
    case 6:
      return 233;
    case 5:
      return 266;
    default:
      return (0);
    }
  }
  return (0);
}


x86 assembly (clang, -O0):
<gu1_get_core_freq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0xfe,%edi
call   1030 <gfx_gxm_config_read@plt>
and    $0xf,%eax
mov    %al,-0x9(%rbp)
mov    $0xff,%edi
call   1030 <gfx_gxm_config_read@plt>
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
cmp    $0x50,%eax
jl     11d0 <gu1_get_core_freq+0xc0>
movzbl -0x9(%rbp),%eax
mov    %rax,-0x18(%rbp)
sub    $0x7,%rax
ja     11c3 <gu1_get_core_freq+0xb3>
mov    -0x18(%rbp),%rax
lea    0xec1(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movq   $0x85,-0x8(%rbp)
jmp    123f <gu1_get_core_freq+0x12f>
movq   $0xa6,-0x8(%rbp)
jmp    123f <gu1_get_core_freq+0x12f>
movq   $0xc8,-0x8(%rbp)
jmp    123f <gu1_get_core_freq+0x12f>
movq   $0xe9,-0x8(%rbp)
jmp    123f <gu1_get_core_freq+0x12f>
movq   $0x10a,-0x8(%rbp)
jmp    123f <gu1_get_core_freq+0x12f>
movq   $0x12c,-0x8(%rbp)
jmp    123f <gu1_get_core_freq+0x12f>
movq   $0x14d,-0x8(%rbp)
jmp    123f <gu1_get_core_freq+0x12f>
movq   $0x0,-0x8(%rbp)
jmp    123f <gu1_get_core_freq+0x12f>
movzbl -0x9(%rbp),%eax
mov    %rax,-0x20(%rbp)
sub    $0x7,%rax
ja     1237 <gu1_get_core_freq+0x127>
mov    -0x20(%rbp),%rax
lea    0xe13(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movq   $0x85,-0x8(%rbp)
jmp    123f <gu1_get_core_freq+0x12f>
movq   $0xa6,-0x8(%rbp)
jmp    123f <gu1_get_core_freq+0x12f>
movq   $0xc8,-0x8(%rbp)
jmp    123f <gu1_get_core_freq+0x12f>
movq   $0xe9,-0x8(%rbp)
jmp    123f <gu1_get_core_freq+0x12f>
movq   $0x10a,-0x8(%rbp)
jmp    123f <gu1_get_core_freq+0x12f>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gu1_get_core_freq>:
push   %rbx
mov    $0xfe,%edi
call   1030 <gfx_gxm_config_read@plt>
mov    %eax,%ebx
and    $0xf,%ebx
mov    $0xff,%edi
call   1030 <gfx_gxm_config_read@plt>
cmp    $0x7,%ebx
ja     1151 <gu1_get_core_freq+0x41>
and    $0xf0,%eax
cmp    $0x50,%eax
lea    0xec2(%rip),%rax
lea    0xefb(%rip),%rcx
cmovae %rax,%rcx
mov    %ebx,%eax
mov    (%rcx,%rax,8),%rax
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @gu1_get_core_freq() {
%1 = alloca i64
%2 = alloca i8
%3 = alloca i8
%4 = call i32 @gfx_gxm_config_read(i32 254)
%5 = and i32 %4, 15
%6 = trunc i32 %5 to i8
store i8 %6, i8* %2
%7 = call i32 @gfx_gxm_config_read(i32 255)
%8 = trunc i32 %7 to i8
store i8 %8, i8* %3
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = icmp sge i32 %10, 80
br i1 %11, label %12, label %23
12: ; preds = %0
%13 = load i8, i8* %2
%14 = zext i8 %13 to i32
switch i32 %14, label %22 [
i32 0, label %15
i32 2, label %15
i32 5, label %16
i32 3, label %17
i32 6, label %18
i32 7, label %19
i32 4, label %20
i32 1, label %21
]
15: ; preds = %12, %12
store i64 133, i64* %1
br label %32
16: ; preds = %12
store i64 166, i64* %1
br label %32
17: ; preds = %12
store i64 200, i64* %1
br label %32
18: ; preds = %12
store i64 233, i64* %1
br label %32
19: ; preds = %12
store i64 266, i64* %1
br label %32
20: ; preds = %12
store i64 300, i64* %1
br label %32
21: ; preds = %12
store i64 333, i64* %1
br label %32
22: ; preds = %12
store i64 0, i64* %1
br label %32
23: ; preds = %0
%24 = load i8, i8* %2
%25 = zext i8 %24 to i32
switch i32 %25, label %31 [
i32 0, label %26
i32 2, label %26
i32 7, label %27
i32 1, label %28
i32 3, label %28
i32 4, label %29
i32 6, label %29
i32 5, label %30
]
26: ; preds = %23, %23
store i64 133, i64* %1
br label %32
27: ; preds = %23
store i64 166, i64* %1
br label %32
28: ; preds = %23, %23
store i64 200, i64* %1
br label %32
29: ; preds = %23, %23
store i64 233, i64* %1
br label %32
30: ; preds = %23
store i64 266, i64* %1
br label %32
31: ; preds = %23
store i64 0, i64* %1
br label %32
32: ; preds = %31, %30, %29, %28, %27, %26, %22, %21, %20, %19, %18, %17, %16, %15
%33 = load i64, i64* %1
ret i64 %33
}

LLVM IR (-O2):
@switch.table.gu1_get_core_freq = [8 x i64] [i64 133, i64 333, i64 133, i64 200, i64 300, i64 166, i64 233, i64 266]
@switch.table.gu1_get_core_freq.1 = [8 x i64] [i64 133, i64 200, i64 133, i64 200, i64 233, i64 266, i64 233, i64 166]
define i64 @gu1_get_core_freq() {
%1 = tail call i32 @gfx_gxm_config_read(i32 254)
%2 = and i32 %1, 15
%3 = tail call i32 @gfx_gxm_config_read(i32 255)
%4 = icmp ult i32 %2, 8
br i1 %4, label %5, label %12
5: ; preds = %0
%6 = and i32 %3, 240
%7 = icmp ugt i32 %6, 79
%8 = select i1 %7, [8 x i64]* @switch.table.gu1_get_core_freq, [8 x i64]* @switch.table.gu1_get_core_freq.1
%9 = zext i32 %2 to i64
%10 = getelementptr inbounds [8 x i64], [8 x i64]* %8, i64 0, i64 %9
%11 = load i64, i64* %10
br label %12
12: ; preds = %0, %5
%13 = phi i64 [ %11, %5 ], [ 0, %0 ]
ret i64 %13
}