xunge/DecIR huggingface dataset:
/* Type definitions */
typedef scalar_t__ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
int sancus_drzd(ssize_t v, ssize_t a, ssize_t b) {
  assert((v >= a) && (v <= b));
  return (int)v;
}


x86 assembly (clang, -O0):
<sancus_drzd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rcx
xor    %eax,%eax
cmp    -0x10(%rbp),%rcx
mov    %al,-0x19(%rbp)
jl     1145 <sancus_drzd+0x35>
mov    -0x8(%rbp),%rax
cmp    -0x18(%rbp),%rax
setle  %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sancus_drzd>:
push   %rbx
mov    %rdi,%rbx
cmp    %rsi,%rdi
setge  %al
cmp    %rdx,%rdi
setle  %cl
and    %al,%cl
movzbl %cl,%edi
call   1030 <assert@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @sancus_drzd(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = icmp sge i64 %7, %8
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i64, i64* %4
%12 = load i64, i64* %6
%13 = icmp sle i64 %11, %12
br label %14
14: ; preds = %10, %3
%15 = phi i1 [ false, %3 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
%17 = call i32 @assert(i32 %16)
%18 = load i64, i64* %4
%19 = trunc i64 %18 to i32
ret i32 %19
}

LLVM IR (-O2):
define i32 @sancus_drzd(i64 %0, i64 %1, i64 %2) {
%4 = icmp sge i64 %0, %1
%5 = icmp sle i64 %0, %2
%6 = and i1 %4, %5
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
%9 = trunc i64 %0 to i32
ret i32 %9
}
int f6(int x, int y) {
  int s = (x >= 0);
  int t = (y >= 0);
  return s == t;
}


x86 assembly (clang, -O0):
<f6>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f6>:
mov    %edi,%eax
xor    %esi,%eax
not    %eax
shr    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @f6(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = icmp sge i32 %7, 0
%9 = zext i1 %8 to i32
store i32 %9, i32* %5
%10 = load i32, i32* %4
%11 = icmp sge i32 %10, 0
%12 = zext i1 %11 to i32
store i32 %12, i32* %6
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = icmp eq i32 %13, %14
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @f6(i32 %0, i32 %1) {
%3 = xor i32 %0, %1
%4 = xor i32 %3, -1
%5 = lshr i32 %4, 31
ret i32 %5
}
void autonomous13() {}


x86 assembly (clang, -O0):
<autonomous13>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<autonomous13>:
ret

LLVM IR (-O0):
define void @autonomous13() {
ret void
}

LLVM IR (-O2):
define void @autonomous13() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ align(char const *, char const *);
int main(int argc, char *argv[]) {
  const char *a = "aabbccddZZ";
  const char *b = "bbFF";
  if (argc > 2) {
    a = argv[1];
    b = argv[2];
  }
  align(a, b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    0xed3(%rip),%rax
mov    %rax,-0x20(%rbp)
cmpl   $0x2,-0x8(%rbp)
jle    115e <main+0x4e>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    0x10(%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <align@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x3,%edi
jl     1120 <main+0x10>
mov    0x8(%rsi),%rdi
mov    0x10(%rsi),%rsi
jmp    112e <main+0x1e>
lea    0xee4(%rip),%rsi
lea    0xed2(%rip),%rdi
call   1030 <align@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"aabbccddZZ\00"
@.str.1 = [5 x i8] c"bbFF\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
%7 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8** %6
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8** %7
%8 = load i32, i32* %4
%9 = icmp sgt i32 %8, 2
br i1 %9, label %10, label %17
10: ; preds = %2
%11 = load i8**, i8*** %5
%12 = getelementptr inbounds i8*, i8** %11, i64 1
%13 = load i8*, i8** %12
store i8* %13, i8** %6
%14 = load i8**, i8*** %5
%15 = getelementptr inbounds i8*, i8** %14, i64 2
%16 = load i8*, i8** %15
store i8* %16, i8** %7
br label %17
17: ; preds = %10, %2
%18 = load i8*, i8** %6
%19 = load i8*, i8** %7
%20 = call i32 @align(i8* %18, i8* %19)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"aabbccddZZ\00"
@.str.1 = [5 x i8] c"bbFF\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 2
br i1 %3, label %4, label %9
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = getelementptr inbounds i8*, i8** %1, i64 2
%8 = load i8*, i8** %7
br label %9
9: ; preds = %4, %2
%10 = phi i8* [ %6, %4 ], [ getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), %2 ]
%11 = phi i8* [ %8, %4 ], [ getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), %2 ]
%12 = tail call i32 @align(i8* %10, i8* %11)
ret i32 0
}
char a(void) { return 'a'; }


x86 assembly (clang, -O0):
<a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x61,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<a>:
mov    $0x61,%al
ret

LLVM IR (-O0):
define signext i8 @a() {
ret i8 97
}

LLVM IR (-O2):
define signext i8 @a() {
ret i8 97
}
/* Type definitions */
struct pci_dev {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ pci_write_config_byte(struct pci_dev *, int, int);
void quirk_sp1011(struct pci_dev *dev) {
  pci_write_config_byte(dev, 0x64, 0xff);
}


x86 assembly (clang, -O0):
<quirk_sp1011>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x64,%esi
mov    $0xff,%edx
call   1030 <pci_write_config_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quirk_sp1011>:
mov    $0x64,%esi
mov    $0xff,%edx
jmp    1030 <pci_write_config_byte@plt>

LLVM IR (-O0):
%struct.pci_dev = type { i32 }
define void @quirk_sp1011(%struct.pci_dev* %0) {
%2 = alloca %struct.pci_dev*
store %struct.pci_dev* %0, %struct.pci_dev** %2
%3 = load %struct.pci_dev*, %struct.pci_dev** %2
%4 = call i32 @pci_write_config_byte(%struct.pci_dev* %3, i32 100, i32 255)
ret void
}

LLVM IR (-O2):
%struct.pci_dev = type { i32 }
define void @quirk_sp1011(%struct.pci_dev* %0) {
%2 = tail call i32 @pci_write_config_byte(%struct.pci_dev* %0, i32 100, i32 255)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ UART_writeDecU64(int /*<<< orphan*/, int);
void UART_writeDecU32(uint32_t v) { UART_writeDecU64(v, 10); }


x86 assembly (clang, -O0):
<UART_writeDecU32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xa,%esi
call   1030 <UART_writeDecU64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UART_writeDecU32>:
mov    $0xa,%esi
jmp    1030 <UART_writeDecU64@plt>

LLVM IR (-O0):
define void @UART_writeDecU32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @UART_writeDecU64(i32 %3, i32 10)
ret void
}

LLVM IR (-O2):
define void @UART_writeDecU32(i32 %0) {
%2 = tail call i32 @UART_writeDecU64(i32 %0, i32 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ArdBir1(int, int);
void ArdBir() { ArdBir1(6, 1); }


x86 assembly (clang, -O0):
<ArdBir>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
mov    $0x1,%esi
call   1030 <ArdBir1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ArdBir>:
mov    $0x6,%edi
mov    $0x1,%esi
jmp    1030 <ArdBir1@plt>

LLVM IR (-O0):
define void @ArdBir() {
%1 = call i32 @ArdBir1(i32 6, i32 1)
ret void
}

LLVM IR (-O2):
define void @ArdBir() {
%1 = tail call i32 @ArdBir1(i32 6, i32 1)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, int, int);
int /*<<< orphan*/ stderr;
bool bad_page_value(char *field_name, uint8_t value) {
  fprintf(stderr, "Bad mod page field %s value %d (0x%02x)\n", field_name,
          value, value);
  return false;
}


x86 assembly (clang, -O0):
<bad_page_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
mov    -0xc(%rbp),%r8d
lea    0xec6(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bad_page_value>:
push   %rax
mov    %esi,%ecx
mov    %rdi,%rdx
mov    0x2ec3(%rip),%rax
mov    (%rax),%edi
lea    0xeda(%rip),%rsi
mov    %ecx,%r8d
call   1030 <fprintf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [41 x i8] c"Bad mod page field %s value %d (0x%02x)\0A\00"
define i32 @bad_page_value(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = load i32, i32* %4
%9 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i8* %6, i32 %7, i32 %8)
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [41 x i8] c"Bad mod page field %s value %d (0x%02x)\0A\00"
define i32 @bad_page_value(i8* %0, i32 %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1, i32 %1)
ret i32 0
}
const char *ve_name(struct ve_struct *ve) { return "0"; }


x86 assembly (clang, -O0):
<ve_name>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    0xef1(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ve_name>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
%struct.ve_struct = type opaque
@.str = [2 x i8] c"0\00"
define i8* @ve_name(%struct.ve_struct* %0) {
%2 = alloca %struct.ve_struct*
store %struct.ve_struct* %0, %struct.ve_struct** %2
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
%struct.ve_struct = type opaque
@.str = [2 x i8] c"0\00"
define i8* @ve_name(%struct.ve_struct* nocapture readnone %0) {
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ UARTSendChar(char);
void put_char(void *arg, char c) { UARTSendChar(c); }


x86 assembly (clang, -O0):
<put_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movsbl -0x9(%rbp),%edi
call   1030 <UARTSendChar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_char>:
mov    %esi,%edi
jmp    1030 <UARTSendChar@plt>

LLVM IR (-O0):
define void @put_char(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = call i32 @UARTSendChar(i8 signext %5)
ret void
}

LLVM IR (-O2):
define void @put_char(i8* nocapture readnone %0, i8 signext %1) {
%3 = tail call i32 @UARTSendChar(i8 signext %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char *, int);
char *memory_alloc(long, char *, int);
void *adt_copy_char(const void *data) {
  char *data2;
  ((data2) = memory_alloc((long)sizeof *(data2),
                          "/scratch/repos/new/home/jordi_armengol_estape/"
                          "c-scraper/outputs/2022-01-22/02-19-57/repos/"
                          "Jianlong-Peng/myADT/refs/heads/master/src/mtools.c",
                          26));
  memcpy(data2, (char *)data, sizeof(char));
  return (void *)data2;
}


x86 assembly (clang, -O0):
<adt_copy_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%edi
lea    0xec8(%rip),%rsi
mov    $0x1a,%edx
call   1030 <memory_alloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    $0x1,%edx
call   1040 <memcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<adt_copy_char>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
lea    0xed2(%rip),%rsi
mov    $0x1,%edi
mov    $0x1a,%edx
call   1030 <memory_alloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    $0x1,%edx
call   1040 <memcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [141 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Jianlong-Peng/myADT/refs/heads/master/src/mtools.c\00"
define i8* @adt_copy_char(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = call i8* @memory_alloc(i64 1, i8* getelementptr inbounds ([141 x i8], [141 x i8]* @.str, i64 0, i64 0), i32 26)
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = load i8*, i8** %2
%7 = call i32 @memcpy(i8* %5, i8* %6, i32 1)
%8 = load i8*, i8** %3
ret i8* %8
}

LLVM IR (-O2):
@.str = [141 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Jianlong-Peng/myADT/refs/heads/master/src/mtools.c\00"
define i8* @adt_copy_char(i8* %0) {
%2 = tail call i8* @memory_alloc(i64 1, i8* getelementptr inbounds ([141 x i8], [141 x i8]* @.str, i64 0, i64 0), i32 26)
%3 = tail call i32 @memcpy(i8* %2, i8* %0, i32 1)
ret i8* %2
}
void SHA256(void) {}


x86 assembly (clang, -O0):
<SHA256>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHA256>:
ret

LLVM IR (-O0):
define void @SHA256() {
ret void
}

LLVM IR (-O2):
define void @SHA256() {
ret void
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMRAC_get(void) { return U_WMRCORENONE_get("U_WMRAC"); }


x86 assembly (clang, -O0):
<U_WMRAC_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRAC_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMRAC\00"
define i32 @U_WMRAC_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMRAC\00"
define i32 @U_WMRAC_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void boxless_cstate_table_footer(__attribute__((unused)) void *report_data) {
  printf("\n");
}


x86 assembly (clang, -O0):
<boxless_cstate_table_footer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<boxless_cstate_table_footer>:
mov    $0xa,%edi
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @boxless_cstate_table_footer(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
define void @boxless_cstate_table_footer(i8* nocapture readnone %0) {
%2 = tail call i32 @putchar(i32 10)
ret void
}
int calculate_percentage(float curr, float full) {
  return (int)(curr / full * 100.0f + 0.5f);
}


x86 assembly (clang, -O0):
<calculate_percentage>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
divss  -0x8(%rbp),%xmm0
movss  0xee0(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xed8(%rip),%xmm1
addss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculate_percentage>:
divss  %xmm1,%xmm0
mulss  0xef4(%rip),%xmm0
addss  0xef0(%rip),%xmm0
cvttss2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @calculate_percentage(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fdiv float %5, %6
%8 = call float @llvm.fmuladd.f32(float %7, float 1.000000e+02, float 5.000000e-01)
%9 = fptosi float %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @calculate_percentage(float %0, float %1) {
%3 = fdiv float %0, %1
%4 = tail call float @llvm.fmuladd.f32(float %3, float 1.000000e+02, float 5.000000e-01)
%5 = fptosi float %4 to i32
ret i32 %5
}
unsigned long long ClearLowestBitLL(unsigned long long x) {
  return x & (x - 1);
}


x86 assembly (clang, -O0):
<ClearLowestBitLL>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    $0x1,%rcx
and    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ClearLowestBitLL>:
lea    -0x1(%rdi),%rax
and    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @ClearLowestBitLL(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = load i64, i64* %2
%5 = sub i64 %4, 1
%6 = and i64 %3, %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @ClearLowestBitLL(i64 %0) {
%2 = add i64 %0, -1
%3 = and i64 %2, %0
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ do_at_tests();
int /*<<< orphan*/ do_bitfield_tests();
int /*<<< orphan*/ do_block_tests();
int /*<<< orphan*/ do_children_tests();
int /*<<< orphan*/ do_frozen_tests();
int /*<<< orphan*/ do_locals_tests();
int /*<<< orphan*/ do_special_tests();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int main(int argc, char *argv[]) {
  do_locals_tests();
  do_block_tests();
  do_children_tests();
  do_special_tests();
  do_frozen_tests();
  do_at_tests();
  do_bitfield_tests();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1080 <do_locals_tests@plt>
mov    $0x0,%al
call   1060 <do_block_tests@plt>
mov    $0x0,%al
call   1070 <do_children_tests@plt>
mov    $0x0,%al
call   1040 <do_special_tests@plt>
mov    $0x0,%al
call   1090 <do_frozen_tests@plt>
mov    $0x0,%al
call   1050 <do_at_tests@plt>
mov    $0x0,%al
call   1030 <do_bitfield_tests@plt>
xor    %edi,%edi
call   10a0 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1080 <do_locals_tests@plt>
xor    %eax,%eax
call   1060 <do_block_tests@plt>
xor    %eax,%eax
call   1070 <do_children_tests@plt>
xor    %eax,%eax
call   1040 <do_special_tests@plt>
xor    %eax,%eax
call   1090 <do_frozen_tests@plt>
xor    %eax,%eax
call   1050 <do_at_tests@plt>
xor    %eax,%eax
call   1030 <do_bitfield_tests@plt>
xor    %edi,%edi
call   10a0 <exit@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @do_locals_tests()
%7 = call i32 (...) @do_block_tests()
%8 = call i32 (...) @do_children_tests()
%9 = call i32 (...) @do_special_tests()
%10 = call i32 (...) @do_frozen_tests()
%11 = call i32 (...) @do_at_tests()
%12 = call i32 (...) @do_bitfield_tests()
%13 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @do_locals_tests()
%4 = tail call i32 (...) @do_block_tests()
%5 = tail call i32 (...) @do_children_tests()
%6 = tail call i32 (...) @do_special_tests()
%7 = tail call i32 (...) @do_frozen_tests()
%8 = tail call i32 (...) @do_at_tests()
%9 = tail call i32 (...) @do_bitfield_tests()
%10 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int floor(int);
int Calc_Tax(int TaxableAmtCents) {
  int PrptyTaxCents;
  PrptyTaxCents = floor((TaxableAmtCents * 0.0105) + 0.5);
  return PrptyTaxCents;
}


x86 assembly (clang, -O0):
<Calc_Tax>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
movsd  0xed8(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xed4(%rip),%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <floor@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Calc_Tax>:
cvtsi2sd %edi,%xmm0
mulsd  0xee4(%rip),%xmm0
addsd  0xee4(%rip),%xmm0
cvttsd2si %xmm0,%edi
jmp    1030 <floor@plt>

LLVM IR (-O0):
define i32 @Calc_Tax(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sitofp i32 %4 to double
%6 = call double @llvm.fmuladd.f64(double %5, double 1.050000e-02, double 5.000000e-01)
%7 = fptosi double %6 to i32
%8 = call i32 @floor(i32 %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @Calc_Tax(i32 %0) {
%2 = sitofp i32 %0 to double
%3 = tail call double @llvm.fmuladd.f64(double %2, double 1.050000e-02, double 5.000000e-01)
%4 = fptosi double %3 to i32
%5 = tail call i32 @floor(i32 %4)
ret i32 %5
}
void msecwait(int msec) {
  volatile int i, j;
  for (i = 0; i < msec; i++)
    for (j = 0; j < 1588; j++)
      ;
}


x86 assembly (clang, -O0):
<msecwait>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1155 <msecwait+0x55>
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    $0x634,%eax
jge    1142 <msecwait+0x42>
jmp    1134 <msecwait+0x34>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1121 <msecwait+0x21>
jmp    1147 <msecwait+0x47>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <msecwait+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<msecwait>:
movl   $0x0,-0x4(%rsp)
jmp    1115 <msecwait+0x15>
nopw   0x0(%rax,%rax,1)
addl   $0x1,-0x4(%rsp)
mov    -0x4(%rsp),%eax
cmp    %edi,%eax
jge    1142 <msecwait+0x42>
movl   $0x0,-0x8(%rsp)
mov    -0x8(%rsp),%eax
cmp    $0x633,%eax
jg     1110 <msecwait+0x10>
addl   $0x1,-0x8(%rsp)
mov    -0x8(%rsp),%eax
cmp    $0x634,%eax
jl     1130 <msecwait+0x30>
jmp    1110 <msecwait+0x10>
ret

LLVM IR (-O0):
define void @msecwait(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store volatile i32 0, i32* %3
br label %5
5: ; preds = %18, %1
%6 = load volatile i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %21
9: ; preds = %5
store volatile i32 0, i32* %4
br label %10
10: ; preds = %14, %9
%11 = load volatile i32, i32* %4
%12 = icmp slt i32 %11, 1588
br i1 %12, label %13, label %17
13: ; preds = %10
br label %14
14: ; preds = %13
%15 = load volatile i32, i32* %4
%16 = add nsw i32 %15, 1
store volatile i32 %16, i32* %4
br label %10
17: ; preds = %10
br label %18
18: ; preds = %17
%19 = load volatile i32, i32* %3
%20 = add nsw i32 %19, 1
store volatile i32 %20, i32* %3
br label %5
21: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @msecwait(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = bitcast i32* %2 to i8*
%5 = bitcast i32* %3 to i8*
store volatile i32 0, i32* %2
%6 = load volatile i32, i32* %2
%7 = icmp slt i32 %6, %0
br i1 %7, label %8, label %21
8: ; preds = %1, %16
store volatile i32 0, i32* %3
%9 = load volatile i32, i32* %3
%10 = icmp slt i32 %9, 1588
br i1 %10, label %11, label %16
11: ; preds = %8, %11
%12 = load volatile i32, i32* %3
%13 = add nsw i32 %12, 1
store volatile i32 %13, i32* %3
%14 = load volatile i32, i32* %3
%15 = icmp slt i32 %14, 1588
br i1 %15, label %11, label %16
16: ; preds = %11, %8
%17 = load volatile i32, i32* %2
%18 = add nsw i32 %17, 1
store volatile i32 %18, i32* %2
%19 = load volatile i32, i32* %2
%20 = icmp slt i32 %19, %0
br i1 %20, label %8, label %21
21: ; preds = %16, %1
ret void
}
int atsas_int_parse_footer(struct saxs_document *doc,
                           const struct line *firstline,
                           const struct line *lastline) {
  return 0;
}


x86 assembly (clang, -O0):
<atsas_int_parse_footer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atsas_int_parse_footer>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.saxs_document = type opaque
%struct.line = type opaque
define i32 @atsas_int_parse_footer(%struct.saxs_document* %0, %struct.line* %1, %struct.line* %2) {
%4 = alloca %struct.saxs_document*
%5 = alloca %struct.line*
%6 = alloca %struct.line*
store %struct.saxs_document* %0, %struct.saxs_document** %4
store %struct.line* %1, %struct.line** %5
store %struct.line* %2, %struct.line** %6
ret i32 0
}

LLVM IR (-O2):
%struct.saxs_document = type opaque
%struct.line = type opaque
define i32 @atsas_int_parse_footer(%struct.saxs_document* nocapture readnone %0, %struct.line* nocapture readnone %1, %struct.line* nocapture readnone %2) {
ret i32 0
}
void tux3_set_mapping_bdi(struct inode *inode) {}


x86 assembly (clang, -O0):
<tux3_set_mapping_bdi>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tux3_set_mapping_bdi>:
ret

LLVM IR (-O0):
%struct.inode = type opaque
define void @tux3_set_mapping_bdi(%struct.inode* %0) {
%2 = alloca %struct.inode*
store %struct.inode* %0, %struct.inode** %2
ret void
}

LLVM IR (-O2):
%struct.inode = type opaque
define void @tux3_set_mapping_bdi(%struct.inode* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sla_evp_(double *, double *, double *, double *, double *,
                            double *);
void slaEvp(double date, double deqx, double dvb[3], double dpb[3],
            double dvh[3], double dph[3]) {
  sla_evp_(&date, &deqx, dvb, dpb, dvh, dph);
}


x86 assembly (clang, -O0):
<slaEvp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
mov    %rsi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    -0x30(%rbp),%r9
lea    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <sla_evp_@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<slaEvp>:
sub    $0x18,%rsp
mov    %rcx,%r9
mov    %rdx,%r8
mov    %rsi,%rcx
mov    %rdi,%rdx
movsd  %xmm0,0x10(%rsp)
movsd  %xmm1,0x8(%rsp)
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rsi
call   1030 <sla_evp_@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @slaEvp(double %0, double %1, double* %2, double* %3, double* %4, double* %5) {
%7 = alloca double
%8 = alloca double
%9 = alloca double*
%10 = alloca double*
%11 = alloca double*
%12 = alloca double*
store double %0, double* %7
store double %1, double* %8
store double* %2, double** %9
store double* %3, double** %10
store double* %4, double** %11
store double* %5, double** %12
%13 = load double*, double** %9
%14 = load double*, double** %10
%15 = load double*, double** %11
%16 = load double*, double** %12
%17 = call i32 @sla_evp_(double* %7, double* %8, double* %13, double* %14, double* %15, double* %16)
ret void
}

LLVM IR (-O2):
define void @slaEvp(double %0, double %1, double* %2, double* %3, double* %4, double* %5) {
%7 = alloca double
%8 = alloca double
store double %0, double* %7
store double %1, double* %8
%9 = call i32 @sla_evp_(double* %7, double* %8, double* %2, double* %3, double* %4, double* %5)
ret void
}
int test_imm_EEint16_reg(short val) {
  return ((val) & (-0xEE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_EEint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffff12,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_EEint16_reg>:
test   $0xff12,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_EEint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -238
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_EEint16_reg(i16 signext %0) {
%2 = and i16 %0, -238
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ assert(int /*<<< orphan*/);
scalar_t__ do_free_d(void *, int, char const *);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void xfree_d(void *ptr, int line, const char *file) {
  if ((!!(do_free_d(ptr, line, file) != 0))) {
    fputs("Unable to free memory in xfree.\nAborting now.\n", stderr);
    abort();
    do {
      assert((0) && ("assertion failed in ASSUME_UNREACHABLE"));
    } while (0);
  }
}


x86 assembly (clang, -O0):
<xfree_d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1050 <do_free_d@plt>
cmp    $0x0,%rax
je     1179 <xfree_d+0x49>
mov    0x2e7c(%rip),%rax
mov    (%rax),%esi
lea    0xe93(%rip),%rdi
call   1040 <fputs@plt>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfree_d>:
push   %rax
call   1050 <do_free_d@plt>
test   %rax,%rax
jne    113d <xfree_d+0xd>
pop    %rax
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%esi
lea    0xeb3(%rip),%rdi
call   1040 <fputs@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@.str = [47 x i8] c"Unable to free memory in xfree.\0AAborting now.\0A\00"
@stderr = global i32 0
define void @xfree_d(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = call i64 @do_free_d(i8* %7, i32 %8, i8* %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %3
%13 = load i32, i32* @stderr
%14 = call i32 @fputs(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i32 %13)
%15 = call i32 (...) @abort()
unreachable
16: ; preds = %3
ret void
}

LLVM IR (-O2):
@.str = [47 x i8] c"Unable to free memory in xfree.\0AAborting now.\0A\00"
@stderr = global i32 0
define void @xfree_d(i8* %0, i32 %1, i8* %2) {
%4 = tail call i64 @do_free_d(i8* %0, i32 %1, i8* %2)
%5 = icmp eq i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %3
%7 = load i32, i32* @stderr
%8 = tail call i32 @fputs(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = tail call i32 (...) @abort()
unreachable
10: ; preds = %3
ret void
}
/* Variables and functions */
int intel_piix4_gpo_set(int, int /*<<< orphan*/);
int intel_piix4_gpo18_lower(void) { return intel_piix4_gpo_set(18, 0); }


x86 assembly (clang, -O0):
<intel_piix4_gpo18_lower>:
push   %rbp
mov    %rsp,%rbp
mov    $0x12,%edi
xor    %esi,%esi
call   1030 <intel_piix4_gpo_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<intel_piix4_gpo18_lower>:
mov    $0x12,%edi
xor    %esi,%esi
jmp    1030 <intel_piix4_gpo_set@plt>

LLVM IR (-O0):
define i32 @intel_piix4_gpo18_lower() {
%1 = call i32 @intel_piix4_gpo_set(i32 18, i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @intel_piix4_gpo18_lower() {
%1 = tail call i32 @intel_piix4_gpo_set(i32 18, i32 0)
ret i32 %1
}
/* Variables and functions */
float fmin(float, float);
float red(float ratio) {
  return fmin(1.0f, 0.209f * ratio * ratio * ratio - 2.49f * ratio * ratio +
                        3.0f * ratio + 0.0109f);
}


x86 assembly (clang, -O0):
<red>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  0xeeb(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
movss  0xed0(%rip),%xmm1
mulss  -0x4(%rbp),%xmm1
mulss  -0x4(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  -0x4(%rbp),%xmm1
movss  0xea0(%rip),%xmm2
mulss  %xmm2,%xmm1
addss  %xmm0,%xmm1
movss  0xe8c(%rip),%xmm0
addss  %xmm0,%xmm1
movss  0xe7c(%rip),%xmm0
call   1030 <fmin@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<red>:
movss  0xef8(%rip),%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm0,%xmm1
movss  0xeec(%rip),%xmm2
mulss  %xmm0,%xmm2
mulss  %xmm0,%xmm2
mulss  %xmm0,%xmm1
addss  %xmm2,%xmm1
mulss  0xed8(%rip),%xmm0
addss  %xmm1,%xmm0
addss  0xed0(%rip),%xmm0
minss  0xecc(%rip),%xmm0
ret

LLVM IR (-O0):
define float @red(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float 0x3FCAC08320000000, %3
%5 = load float, float* %2
%6 = fmul float %4, %5
%7 = load float, float* %2
%8 = load float, float* %2
%9 = fmul float 0x4003EB8520000000, %8
%10 = load float, float* %2
%11 = fmul float %9, %10
%12 = fneg float %11
%13 = call float @llvm.fmuladd.f32(float %6, float %7, float %12)
%14 = load float, float* %2
%15 = call float @llvm.fmuladd.f32(float 3.000000e+00, float %14, float %13)
%16 = fadd float %15, 0x3F8652BD40000000
%17 = call float @fmin(float 1.000000e+00, float %16)
ret float %17
}

LLVM IR (-O2):
define float @red(float %0) {
%2 = fmul float %0, 0x3FCAC08320000000
%3 = fmul float %2, %0
%4 = fmul float %0, 0xC003EB8520000000
%5 = fmul float %4, %0
%6 = tail call float @llvm.fmuladd.f32(float %3, float %0, float %5)
%7 = tail call float @llvm.fmuladd.f32(float %0, float 3.000000e+00, float %6)
%8 = fadd float %7, 0x3F8652BD40000000
%9 = tail call nsz float @llvm.minnum.f32(float %8, float 1.000000e+00)
ret float %9
}
int GetCompileMinute(void) {
  int minute = ((("16:58:43"[3] - '0') * 10) + ("16:58:43"[4] - '0'));
  return (minute);
}


x86 assembly (clang, -O0):
<GetCompileMinute>:
push   %rbp
mov    %rsp,%rbp
movsbl 0xef8(%rip),%eax
sub    $0x30,%eax
imul   $0xa,%eax,%eax
movsbl 0xeec(%rip),%ecx
sub    $0x30,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetCompileMinute>:
mov    $0x3a,%eax
ret

LLVM IR (-O0):
@.str = [9 x i8] c"16:58:43\00"
define i32 @GetCompileMinute() {
%1 = alloca i32
%2 = load i8, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 3)
%3 = sext i8 %2 to i32
%4 = sub nsw i32 %3, 48
%5 = mul nsw i32 %4, 10
%6 = load i8, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 4)
%7 = sext i8 %6 to i32
%8 = sub nsw i32 %7, 48
%9 = add nsw i32 %5, %8
store i32 %9, i32* %1
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
define i32 @GetCompileMinute() {
ret i32 58
}
/* Variables and functions */
int /*<<< orphan*/ perror(char const *);
void assume_valid_fd(const char *failurer, int s) {
  if (s == -1) {
    perror(failurer);
  }
}


x86 assembly (clang, -O0):
<assume_valid_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0xffffffff,-0xc(%rbp)
jne    1132 <assume_valid_fd+0x22>
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assume_valid_fd>:
cmp    $0xffffffff,%esi
je     1116 <assume_valid_fd+0x6>
ret
jmp    1030 <perror@plt>

LLVM IR (-O0):
define void @assume_valid_fd(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i8*, i8** %3
%9 = call i32 @perror(i8* %8)
br label %10
10: ; preds = %7, %2
ret void
}

LLVM IR (-O2):
define void @assume_valid_fd(i8* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, -1
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @perror(i8* %0)
br label %6
6: ; preds = %4, %2
ret void
}
int main() {
  int int_bits = 8 * sizeof(int);
  int value = 1 << int_bits - 1;
  return 2 * value + 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x20,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 32, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 %4, 1
%6 = shl i32 1, %5
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = mul nsw i32 2, %7
%9 = add nsw i32 %8, 1
ret i32 %9
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
unsigned char digit_char(unsigned char c) {
  if (c < 10) {
    return c + '0';
  }
  return (c - 10) + 'a';
}


x86 assembly (clang, -O0):
<digit_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
cmp    $0xa,%eax
jge    1126 <digit_char+0x26>
movzbl -0x2(%rbp),%eax
add    $0x30,%eax
mov    %al,-0x1(%rbp)
jmp    1133 <digit_char+0x33>
movzbl -0x2(%rbp),%eax
sub    $0xa,%eax
add    $0x61,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<digit_char>:
cmp    $0xa,%dil
mov    $0x30,%ecx
mov    $0x57,%eax
cmovb  %ecx,%eax
add    %dil,%al
ret

LLVM IR (-O0):
define zeroext i8 @digit_char(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = icmp slt i32 %5, 10
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = add nsw i32 %9, 48
%11 = trunc i32 %10 to i8
store i8 %11, i8* %2
br label %18
12: ; preds = %1
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = sub nsw i32 %14, 10
%16 = add nsw i32 %15, 97
%17 = trunc i32 %16 to i8
store i8 %17, i8* %2
br label %18
18: ; preds = %12, %7
%19 = load i8, i8* %2
ret i8 %19
}

LLVM IR (-O2):
define zeroext i8 @digit_char(i8 zeroext %0) {
%2 = icmp ult i8 %0, 10
%3 = select i1 %2, i8 48, i8 87
%4 = add i8 %3, %0
ret i8 %4
}
/* Type definitions */
struct i2c_client {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ i2c_master_send(struct i2c_client *, char *, int);
void ad7160_i2c_wakeup(void *dev) {
  struct i2c_client *client = dev;
  char dummy = 0;
  i2c_master_send(client, &dummy, 1);
}


x86 assembly (clang, -O0):
<ad7160_i2c_wakeup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
movb   $0x0,-0x11(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x11(%rbp),%rsi
mov    $0x1,%edx
call   1030 <i2c_master_send@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ad7160_i2c_wakeup>:
push   %rax
movb   $0x0,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x1,%edx
call   1030 <i2c_master_send@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.i2c_client = type { i32 }
define void @ad7160_i2c_wakeup(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.i2c_client*
%4 = alloca i8
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = bitcast i8* %5 to %struct.i2c_client*
store %struct.i2c_client* %6, %struct.i2c_client** %3
store i8 0, i8* %4
%7 = load %struct.i2c_client*, %struct.i2c_client** %3
%8 = call i32 @i2c_master_send(%struct.i2c_client* %7, i8* %4, i32 1)
ret void
}

LLVM IR (-O2):
%struct.i2c_client = type { i32 }
define void @ad7160_i2c_wakeup(i8* %0) {
%2 = alloca i8
%3 = bitcast i8* %0 to %struct.i2c_client*
store i8 0, i8* %2
%4 = call i32 @i2c_master_send(%struct.i2c_client* %3, i8* %2, i32 1)
ret void
}
/* Type definitions */
typedef scalar_t__ pid_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ SIGCHLD;
int /*<<< orphan*/ SIGHUP;
int /*<<< orphan*/ SIG_IGN;
int /*<<< orphan*/ STDERR_FILENO;
int /*<<< orphan*/ STDIN_FILENO;
int /*<<< orphan*/ STDOUT_FILENO;
int /*<<< orphan*/ chdir(char *);
int /*<<< orphan*/ close(int /*<<< orphan*/);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
scalar_t__ fork();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
int /*<<< orphan*/ logM(char *);
scalar_t__ setsid();
int /*<<< orphan*/ signal(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ umask(int /*<<< orphan*/);
void deamonize() {
  if (1)
    return;
  pid_t pid;
  pid = fork();
  if (pid < 0) {
    logM("Errore nella fork");
    exit(EXIT_FAILURE);
  }
  if (pid > 0) {
    logM("Prima fork\n");
    exit(EXIT_SUCCESS);
  }
  if (setsid() < 0) {
    logM("Errore sessione leader\n");
    exit(EXIT_FAILURE);
  }
  signal(SIGCHLD, SIG_IGN);
  signal(SIGHUP, SIG_IGN);
  pid = fork();
  if (pid < 0) {
    FILE *fp = fopen("Log.txt", "a");
    fprintf(fp, "Errore nella fork 2\n");
    fclose(fp);
    exit(EXIT_FAILURE);
  }
  if (pid > 0) {
    logM("Seconda fork.\n");
    exit(EXIT_SUCCESS);
  }
  umask(0);
  chdir(
      "/home/isaacisback/Programmazione/programmazionedisistema/Linux/Server");
  close(STDIN_FILENO);
  close(STDOUT_FILENO);
  close(STDERR_FILENO);
}


x86 assembly (clang, -O0):
<deamonize>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<deamonize>:
ret

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
@EXIT_SUCCESS = global i32 0
@SIGCHLD = global i32 0
@SIGHUP = global i32 0
@SIG_IGN = global i32 0
@STDERR_FILENO = global i32 0
@STDIN_FILENO = global i32 0
@STDOUT_FILENO = global i32 0
define void @deamonize() {
%1 = alloca i64
ret void
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
@EXIT_SUCCESS = global i32 0
@SIGCHLD = global i32 0
@SIGHUP = global i32 0
@SIG_IGN = global i32 0
@STDERR_FILENO = global i32 0
@STDIN_FILENO = global i32 0
@STDOUT_FILENO = global i32 0
define void @deamonize() {
ret void
}
char *local(void) {
  static char nomex[12] = "aaaaaaaaaa";
  char nome[12] = "programador";
  char *ponteiro = nome;
  return ponteiro;
}


x86 assembly (clang, -O0):
<local>:
push   %rbp
mov    %rsp,%rbp
mov    0xef5(%rip),%rax
mov    %rax,-0xc(%rbp)
mov    0xef3(%rip),%eax
mov    %eax,-0x4(%rbp)
lea    -0xc(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<local>:
lea    -0xc(%rsp),%rax
ret

LLVM IR (-O0):
@local.nomex = internal global [12 x i8] c"aaaaaaaaaa\00\00"
@__const.local.nome = [12 x i8] c"programador\00"
define i8* @local() {
%1 = alloca [12 x i8]
%2 = alloca i8*
%3 = bitcast [12 x i8]* %1 to i8*
%4 = getelementptr inbounds [12 x i8], [12 x i8]* %1, i64 0, i64 0
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define noalias i8* @local() {
%1 = alloca [12 x i8]
%2 = getelementptr inbounds [12 x i8], [12 x i8]* %1, i64 0, i64 0
ret i8* %2
}
/* Variables and functions */
int fn_sq_ch_65_ch_110_ch_110_ch_111_ch_116_ch_97_ch_116_ch_105_ch_111_ch_110(
    char const *);
int fn_al_sq_ch_65_ch_110_ch_110_ch_111_ch_116_ch_97_ch_116_ch_105_ch_111_ch_110(
    const char *text) {
  int pos = 0;
  pos =
      fn_sq_ch_65_ch_110_ch_110_ch_111_ch_116_ch_97_ch_116_ch_105_ch_111_ch_110(
          text);
  if (pos != -1)
    return pos;
  return -1;
}


x86 assembly (clang, -O0):
<fn_al_sq_ch_65_ch_110_ch_110_ch_111_ch_116_ch_97_ch_116_ch_105_ch_111_ch_110>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <fn_sq_ch_65_ch_110_ch_110_ch_111_ch_116_ch_97_ch_116_ch_105_ch_111_ch_110@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xffffffff,-0x14(%rbp)
je     1144 <fn_al_sq_ch_65_ch_110_ch_110_ch_111_ch_116_ch_97_ch_116_ch_105_ch_111_ch_110+0x34>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114b <fn_al_sq_ch_65_ch_110_ch_110_ch_111_ch_116_ch_97_ch_116_ch_105_ch_111_ch_110+0x3b>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_al_sq_ch_65_ch_110_ch_110_ch_111_ch_116_ch_97_ch_116_ch_105_ch_111_ch_110>:
jmp    1030 <fn_sq_ch_65_ch_110_ch_110_ch_111_ch_116_ch_97_ch_116_ch_105_ch_111_ch_110@plt>

LLVM IR (-O0):
define i32 @fn_al_sq_ch_65_ch_110_ch_110_ch_111_ch_116_ch_97_ch_116_ch_105_ch_111_ch_110(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @fn_sq_ch_65_ch_110_ch_110_ch_111_ch_116_ch_97_ch_116_ch_105_ch_111_ch_110(i8* %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, -1
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i32, i32* %4
store i32 %10, i32* %2
br label %12
11: ; preds = %1
store i32 -1, i32* %2
br label %12
12: ; preds = %11, %9
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @fn_al_sq_ch_65_ch_110_ch_110_ch_111_ch_116_ch_97_ch_116_ch_105_ch_111_ch_110(i8* %0) {
%2 = tail call i32 @fn_sq_ch_65_ch_110_ch_110_ch_111_ch_116_ch_97_ch_116_ch_105_ch_111_ch_110(i8* %0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ off_t;

/* Variables and functions */
int /*<<< orphan*/ __SYSCALL_LL_E(int /*<<< orphan*/);
int syscall(int, int, int, int /*<<< orphan*/, int /*<<< orphan*/);
int fallocate(int fd, int mode, off_t base, off_t len) {
  return syscall(352, fd, mode, __SYSCALL_LL_E(base), __SYSCALL_LL_E(len));
}


x86 assembly (clang, -O0):
<fallocate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <__SYSCALL_LL_E@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%edi
call   1040 <__SYSCALL_LL_E@plt>
mov    -0x1c(%rbp),%esi
mov    -0x18(%rbp),%edx
mov    -0x14(%rbp),%ecx
mov    %eax,%r8d
mov    $0x160,%edi
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fallocate>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%ebx
mov    %esi,%r14d
mov    %edi,%r15d
mov    %edx,%edi
call   1040 <__SYSCALL_LL_E@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1040 <__SYSCALL_LL_E@plt>
mov    $0x160,%edi
mov    %r15d,%esi
mov    %r14d,%edx
mov    %ebp,%ecx
mov    %eax,%r8d
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @fallocate(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = call i32 @__SYSCALL_LL_E(i32 %11)
%13 = load i32, i32* %8
%14 = call i32 @__SYSCALL_LL_E(i32 %13)
%15 = call i32 @syscall(i32 352, i32 %9, i32 %10, i32 %12, i32 %14)
ret i32 %15
}

LLVM IR (-O2):
define i32 @fallocate(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @__SYSCALL_LL_E(i32 %2)
%6 = tail call i32 @__SYSCALL_LL_E(i32 %3)
%7 = tail call i32 @syscall(i32 352, i32 %0, i32 %1, i32 %5, i32 %6)
ret i32 %7
}
/* Variables and functions */
int atoi(int /*<<< orphan*/);
int /*<<< orphan*/ getStrVal(char const *);
int getIntVal(const char *sz) { return atoi(getStrVal(sz)); }


x86 assembly (clang, -O0):
<getIntVal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <getStrVal@plt>
mov    %eax,%edi
call   1030 <atoi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getIntVal>:
push   %rax
call   1040 <getStrVal@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <atoi@plt>

LLVM IR (-O0):
define i32 @getIntVal(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @getStrVal(i8* %3)
%5 = call i32 @atoi(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @getIntVal(i8* %0) {
%2 = tail call i32 @getStrVal(i8* %0)
%3 = tail call i32 @atoi(i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ return_struct_d5();
int /*<<< orphan*/ take_struct_d5(int /*<<< orphan*/);
void test_struct_d5() { take_struct_d5(return_struct_d5()); }


x86 assembly (clang, -O0):
<test_struct_d5>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <return_struct_d5@plt>
mov    %eax,%edi
call   1030 <take_struct_d5@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_struct_d5>:
push   %rax
xor    %eax,%eax
call   1040 <return_struct_d5@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <take_struct_d5@plt>

LLVM IR (-O0):
define void @test_struct_d5() {
%1 = call i32 (...) @return_struct_d5()
%2 = call i32 @take_struct_d5(i32 %1)
ret void
}

LLVM IR (-O2):
define void @test_struct_d5() {
%1 = tail call i32 (...) @return_struct_d5()
%2 = tail call i32 @take_struct_d5(i32 %1)
ret void
}