#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int atoi(int /*<<< orphan*/);
int detect_cpu();
int disable_prefetch_core2(int);
int disable_prefetch_nhm(int);
int enable_prefetch_core2(int);
int enable_prefetch_nhm(int);
int /*<<< orphan*/ exit(int);
int getopt(int, char **, char *);
int /*<<< orphan*/ optarg;
scalar_t__ opterr;
int /*<<< orphan*/ printf(char *, ...);
int main(int argc, char **argv) {
  int c;
  int core = -1;
  int result = -1;
  int disable = 1;
  int core2 = 0;
  printf("\n");
  opterr = 0;
  while ((c = getopt(argc, argv, "c:deh")) != -1) {
    switch (c) {
    case 'c':
      core = atoi(optarg);
      break;
    case 'd':
      disable = 1;
      break;
    case 'e':
      disable = 0;
      break;
    case 'h':
      printf("Usage: %s [-c core] [-d] [-e] [-h]\n\n", argv[0]);
      exit(0);
    default:
      exit(-1);
    }
  }
  core2 = detect_cpu();
  if (core2 < 0) {
    printf("Unsupported CPU type\n");
    return -1;
  }
  if (disable) {
    if (core2) {
      result = disable_prefetch_core2(core);
    } else {
      result = disable_prefetch_nhm(core);
    }
  } else {
    if (core2) {
      result = enable_prefetch_core2(core);
    } else {
      result = enable_prefetch_nhm(core);
    }
  }
  if (result < 0) {
    printf("Unable to access prefetch MSR.\n");
    printf("* Verify you have an Intel Nehalem or newer processor\n");
    printf("* You will probably need to run as root\n");
    printf("* Make sure the msr module is installed\n");
    printf("\n");
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0xffffffff,-0x18(%rbp)
movl   $0xffffffff,-0x1c(%rbp)
movl   $0x1,-0x20(%rbp)
movl   $0x0,-0x24(%rbp)
lea    0xe78(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
mov    0x2e01(%rip),%rax
movq   $0x0,(%rax)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
lea    0xe2c(%rip),%rdx
call   1080 <getopt@plt>
mov    %eax,-0x14(%rbp)
cmp    $0xffffffff,%eax
je     127f <main+0xef>
mov    -0x14(%rbp),%eax
add    $0xffffff9d,%eax
mov    %eax,%ecx
mov    %rcx,-0x30(%rbp)
sub    $0x5,%eax
ja     1270 <main+0xe0>
mov    -0x30(%rbp),%rax
lea    0xde3(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    0x2dcb(%rip),%rax
mov    (%rax),%edi
call   1090 <atoi@plt>
mov    %eax,-0x18(%rbp)
jmp    127a <main+0xea>
movl   $0x1,-0x20(%rbp)
jmp    127a <main+0xea>
movl   $0x0,-0x20(%rbp)
jmp    127a <main+0xea>
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xdbc(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
xor    %edi,%edi
call   10a0 <exit@plt>
mov    $0xffffffff,%edi
call   10a0 <exit@plt>
jmp    11de <main+0x4e>
mov    $0x0,%al
call   1050 <detect_cpu@plt>
mov    %eax,-0x24(%rbp)
cmpl   $0x0,-0x24(%rbp)
jge    12ad <main+0x11d>
lea    0xda9(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    136e <main+0x1de>
cmpl   $0x0,-0x20(%rbp)
je     12e1 <main+0x151>
cmpl   $0x0,-0x24(%rbp)
je     12d1 <main+0x141>
mov    -0x18(%rbp),%edi
call   1070 <disable_prefetch_core2@plt>
mov    %eax,-0x1c(%rbp)
jmp    12dc <main+0x14c>
mov    -0x18(%rbp),%edi
call   10b0 <disable_prefetch_nhm@plt>
mov    %eax,-0x1c(%rbp)
jmp    130b <main+0x17b>
cmpl   $0x0,-0x24(%rbp)
je     12fb <main+0x16b>
mov    -0x18(%rbp),%edi
call   1060 <enable_prefetch_core2@plt>
mov    %eax,-0x1c(%rbp)
jmp    1306 <main+0x176>
mov    -0x18(%rbp),%edi
call   1030 <enable_prefetch_nhm@plt>
mov    %eax,-0x1c(%rbp)
jmp    130b <main+0x17b>
cmpl   $0x0,-0x1c(%rbp)
jge    1367 <main+0x1d7>
lea    0xd3d(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
lea    0xd4f(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
lea    0xd78(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
lea    0xd93(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
lea    0xced(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    136e <main+0x1de>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
mov    %rsi,%r12
mov    %edi,%r13d
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    0x2e06(%rip),%rax
movq   $0x0,(%rax)
mov    $0x1,%ebx
mov    $0xffffffff,%r14d
lea    0xe2d(%rip),%r15
lea    0xe0e(%rip),%rbp
mov    %ebx,%eax
jmp    1202 <main+0x52>
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
mov    %eax,%ebx
mov    %r13d,%edi
mov    %r12,%rsi
mov    %r15,%rdx
call   10a0 <getopt@plt>
lea    -0x63(%rax),%ecx
cmp    $0x5,%ecx
ja     123c <main+0x8c>
mov    $0x1,%eax
movslq 0x0(%rbp,%rcx,4),%rcx
add    %rbp,%rcx
jmp    *%rcx
mov    0x2dc8(%rip),%rax
mov    (%rax),%edi
call   10b0 <atoi@plt>
mov    %eax,%r14d
jmp    11f2 <main+0x42>
cmp    $0xffffffff,%eax
jne    12dd <main+0x12d>
xor    %eax,%eax
call   1070 <detect_cpu@plt>
test   %eax,%eax
js     1262 <main+0xb2>
mov    %r14d,%edi
test   %ebx,%ebx
je     1270 <main+0xc0>
test   %eax,%eax
je     127b <main+0xcb>
call   1090 <disable_prefetch_core2@plt>
jmp    1287 <main+0xd7>
lea    0xe7f(%rip),%rdi
call   1040 <puts@plt>
jmp    12c7 <main+0x117>
test   %eax,%eax
je     1282 <main+0xd2>
call   1080 <enable_prefetch_core2@plt>
jmp    1287 <main+0xd7>
call   10d0 <disable_prefetch_nhm@plt>
jmp    1287 <main+0xd7>
call   1050 <enable_prefetch_nhm@plt>
xor    %ecx,%ecx
test   %eax,%eax
jns    12cc <main+0x11c>
lea    0xdaf(%rip),%rdi
call   1040 <puts@plt>
lea    0xdc2(%rip),%rdi
call   1040 <puts@plt>
lea    0xdec(%rip),%rdi
call   1040 <puts@plt>
lea    0xe08(%rip),%rdi
call   1040 <puts@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0xffffffff,%ecx
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret
mov    $0xffffffff,%edi
call   10c0 <exit@plt>
mov    (%r12),%rsi
lea    0xd2c(%rip),%rdi
xor    %eax,%eax
call   1060 <printf@plt>
xor    %edi,%edi
call   10c0 <exit@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
@opterr = global i64 0
@.str.1 = [6 x i8] c"c:deh\00"
@optarg = global i32 0
@.str.2 = [37 x i8] c"Usage: %s [-c core] [-d] [-e] [-h]\0A\0A\00"
@.str.3 = [22 x i8] c"Unsupported CPU type\0A\00"
@.str.4 = [32 x i8] c"Unable to access prefetch MSR.\0A\00"
@.str.5 = [55 x i8] c"* Verify you have an Intel Nehalem or newer processor\0A\00"
@.str.6 = [41 x i8] c"* You will probably need to run as root\0A\00"
@.str.7 = [41 x i8] c"* Make sure the msr module is installed\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 -1, i32* %7
store i32 -1, i32* %8
store i32 1, i32* %9
store i32 0, i32* %10
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i64 0, i64* @opterr
br label %12
12: ; preds = %32, %2
%13 = load i32, i32* %4
%14 = load i8**, i8*** %5
%15 = call i32 @getopt(i32 %13, i8** %14, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
store i32 %15, i32* %6
%16 = icmp ne i32 %15, -1
br i1 %16, label %17, label %33
17: ; preds = %12
%18 = load i32, i32* %6
switch i32 %18, label %30 [
i32 99, label %19
i32 100, label %22
i32 101, label %23
i32 104, label %24
]
19: ; preds = %17
%20 = load i32, i32* @optarg
%21 = call i32 @atoi(i32 %20)
store i32 %21, i32* %7
br label %32
22: ; preds = %17
store i32 1, i32* %9
br label %32
23: ; preds = %17
store i32 0, i32* %9
br label %32
24: ; preds = %17
%25 = load i8**, i8*** %5
%26 = getelementptr inbounds i8*, i8** %25, i64 0
%27 = load i8*, i8** %26
%28 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.2, i64 0, i64 0), i8* %27)
%29 = call i32 @exit(i32 0)
unreachable
30: ; preds = %17
%31 = call i32 @exit(i32 -1)
unreachable
32: ; preds = %23, %22, %19
br label %12
33: ; preds = %12
%34 = call i32 (...) @detect_cpu()
store i32 %34, i32* %10
%35 = load i32, i32* %10
%36 = icmp slt i32 %35, 0
br i1 %36, label %37, label %39
37: ; preds = %33
%38 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.3, i64 0, i64 0))
store i32 -1, i32* %3
br label %72
39: ; preds = %33
%40 = load i32, i32* %9
%41 = icmp ne i32 %40, 0
br i1 %41, label %42, label %52
42: ; preds = %39
%43 = load i32, i32* %10
%44 = icmp ne i32 %43, 0
br i1 %44, label %45, label %48
45: ; preds = %42
%46 = load i32, i32* %7
%47 = call i32 @disable_prefetch_core2(i32 %46)
store i32 %47, i32* %8
br label %51
48: ; preds = %42
%49 = load i32, i32* %7
%50 = call i32 @disable_prefetch_nhm(i32 %49)
store i32 %50, i32* %8
br label %51
51: ; preds = %48, %45
br label %62
52: ; preds = %39
%53 = load i32, i32* %10
%54 = icmp ne i32 %53, 0
br i1 %54, label %55, label %58
55: ; preds = %52
%56 = load i32, i32* %7
%57 = call i32 @enable_prefetch_core2(i32 %56)
store i32 %57, i32* %8
br label %61
58: ; preds = %52
%59 = load i32, i32* %7
%60 = call i32 @enable_prefetch_nhm(i32 %59)
store i32 %60, i32* %8
br label %61
61: ; preds = %58, %55
br label %62
62: ; preds = %61, %51
%63 = load i32, i32* %8
%64 = icmp slt i32 %63, 0
br i1 %64, label %65, label %71
65: ; preds = %62
%66 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.4, i64 0, i64 0))
%67 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str.5, i64 0, i64 0))
%68 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.6, i64 0, i64 0))
%69 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.7, i64 0, i64 0))
%70 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %3
br label %72
71: ; preds = %62
store i32 0, i32* %3
br label %72
72: ; preds = %71, %65, %37
%73 = load i32, i32* %3
ret i32 %73
}

LLVM IR (-O2):
@opterr = global i64 0
@.str.1 = [6 x i8] c"c:deh\00"
@optarg = global i32 0
@.str.2 = [37 x i8] c"Usage: %s [-c core] [-d] [-e] [-h]\0A\0A\00"
@str = [31 x i8] c"Unable to access prefetch MSR.\00"
@str.8 = [54 x i8] c"* Verify you have an Intel Nehalem or newer processor\00"
@str.9 = [40 x i8] c"* You will probably need to run as root\00"
@str.10 = [40 x i8] c"* Make sure the msr module is installed\00"
@str.11 = [21 x i8] c"Unsupported CPU type\00"
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @putchar(i32 10)
store i64 0, i64* @opterr
br label %4
4: ; preds = %12, %2
%5 = phi i32 [ %14, %12 ], [ -1, %2 ]
%6 = phi i32 [ %8, %12 ], [ 1, %2 ]
br label %7
7: ; preds = %10, %4
%8 = phi i32 [ %6, %4 ], [ %11, %10 ]
%9 = tail call i32 @getopt(i32 %0, i8** %1, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
switch i32 %9, label %20 [
i32 -1, label %22
i32 99, label %12
i32 100, label %10
i32 101, label %15
i32 104, label %16
]
10: ; preds = %7, %15
%11 = phi i32 [ 0, %15 ], [ 1, %7 ]
br label %7
12: ; preds = %7
%13 = load i32, i32* @optarg
%14 = tail call i32 @atoi(i32 %13)
br label %4
15: ; preds = %7
br label %10
16: ; preds = %7
%17 = load i8*, i8** %1
%18 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @.str.2, i64 0, i64 0), i8* %17)
%19 = tail call i32 @exit(i32 0)
unreachable
20: ; preds = %7
%21 = tail call i32 @exit(i32 -1)
unreachable
22: ; preds = %7
%23 = tail call i32 (...) @detect_cpu()
%24 = icmp slt i32 %23, 0
br i1 %24, label %25, label %27
25: ; preds = %22
%26 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str.11, i64 0, i64 0))
br label %49
27: ; preds = %22
%28 = icmp eq i32 %8, 0
%29 = icmp eq i32 %23, 0
br i1 %28, label %35, label %30
30: ; preds = %27
br i1 %29, label %33, label %31
31: ; preds = %30
%32 = tail call i32 @disable_prefetch_core2(i32 %5)
br label %40
33: ; preds = %30
%34 = tail call i32 @disable_prefetch_nhm(i32 %5)
br label %40
35: ; preds = %27
br i1 %29, label %38, label %36
36: ; preds = %35
%37 = tail call i32 @enable_prefetch_core2(i32 %5)
br label %40
38: ; preds = %35
%39 = tail call i32 @enable_prefetch_nhm(i32 %5)
br label %40
40: ; preds = %36, %38, %31, %33
%41 = phi i32 [ %32, %31 ], [ %34, %33 ], [ %37, %36 ], [ %39, %38 ]
%42 = icmp slt i32 %41, 0
br i1 %42, label %43, label %49
43: ; preds = %40
%44 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
%45 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([54 x i8], [54 x i8]* @str.8, i64 0, i64 0))
%46 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([40 x i8], [40 x i8]* @str.9, i64 0, i64 0))
%47 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([40 x i8], [40 x i8]* @str.10, i64 0, i64 0))
%48 = tail call i32 @putchar(i32 10)
br label %49
49: ; preds = %40, %43, %25
%50 = phi i32 [ -1, %25 ], [ -1, %43 ], [ 0, %40 ]
ret i32 %50
}