xunge/DecIR huggingface dataset:
int the_function(int x, int y) {
  int i;
  __asm__ volatile("int3;");
  for (i = 0; i < x; i++) {
    y *= 5;
    y--;
  }
  return y;
}


x86 assembly (clang, -O0):
<the_function>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
int3
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    113c <the_function+0x3c>
imul   $0x5,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1112 <the_function+0x12>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<the_function>:
mov    %esi,%eax
int3
test   %edi,%edi
jle    114b <the_function+0x4b>
lea    -0x1(%rdi),%edx
mov    %edi,%ecx
and    $0x7,%ecx
cmp    $0x7,%edx
jb     1130 <the_function+0x30>
and    $0xfffffff8,%edi
nopw   0x0(%rax,%rax,1)
imul   $0x5f5e1,%eax,%eax
add    $0xfffe8288,%eax
add    $0xfffffff8,%edi
jne    1120 <the_function+0x20>
test   %ecx,%ecx
je     114b <the_function+0x4b>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    (%rax,%rax,4),%eax
add    $0xffffffff,%eax
add    $0xffffffff,%ecx
jne    1140 <the_function+0x40>
ret

LLVM IR (-O0):
define i32 @the_function(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %15, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load i32, i32* %4
%12 = mul nsw i32 %11, 5
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = add nsw i32 %13, -1
store i32 %14, i32* %4
br label %15
15: ; preds = %10
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
br label %6
18: ; preds = %6
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
define i32 @the_function(i32 %0, i32 %1) {
tail call void asm sideeffect "int3;", "~{dirflag},~{fpsr},~{flags}"()
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %28
4: ; preds = %2
%5 = add i32 %0, -1
%6 = and i32 %0, 7
%7 = icmp ult i32 %5, 7
br i1 %7, label %17, label %8
8: ; preds = %4
%9 = and i32 %0, -8
br label %10
10: ; preds = %10, %8
%11 = phi i32 [ %1, %8 ], [ %14, %10 ]
%12 = phi i32 [ 0, %8 ], [ %15, %10 ]
%13 = mul i32 %11, 390625
%14 = add i32 %13, -97656
%15 = add i32 %12, 8
%16 = icmp eq i32 %15, %9
br i1 %16, label %17, label %10
17: ; preds = %10, %4
%18 = phi i32 [ undef, %4 ], [ %14, %10 ]
%19 = phi i32 [ %1, %4 ], [ %14, %10 ]
%20 = icmp eq i32 %6, 0
br i1 %20, label %28, label %21
21: ; preds = %17, %21
%22 = phi i32 [ %25, %21 ], [ %19, %17 ]
%23 = phi i32 [ %26, %21 ], [ 0, %17 ]
%24 = mul nsw i32 %22, 5
%25 = add nsw i32 %24, -1
%26 = add i32 %23, 1
%27 = icmp eq i32 %26, %6
br i1 %27, label %28, label %21
28: ; preds = %17, %21, %2
%29 = phi i32 [ %1, %2 ], [ %18, %17 ], [ %25, %21 ]
ret i32 %29
}
/* Type definitions */
struct fatx_fs {
  int dummy;
};
struct fatx_dir {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ fatx_print(struct fatx_fs *, int, char *);
int fatx_close_dir(struct fatx_fs *fs, struct fatx_dir *dir) {
  fatx_print(fs, 5, "fatx_close_dir()\n");
  return 0;
}


x86 assembly (clang, -O0):
<fatx_close_dir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x5,%esi
lea    0xed0(%rip),%rdx
call   1030 <fatx_print@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fatx_close_dir>:
push   %rax
lea    0xee8(%rip),%rdx
mov    $0x5,%esi
call   1030 <fatx_print@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.fatx_fs = type { i32 }
%struct.fatx_dir = type { i32 }
@.str = [18 x i8] c"fatx_close_dir()\0A\00"
define i32 @fatx_close_dir(%struct.fatx_fs* %0, %struct.fatx_dir* %1) {
%3 = alloca %struct.fatx_fs*
%4 = alloca %struct.fatx_dir*
store %struct.fatx_fs* %0, %struct.fatx_fs** %3
store %struct.fatx_dir* %1, %struct.fatx_dir** %4
%5 = load %struct.fatx_fs*, %struct.fatx_fs** %3
%6 = call i32 @fatx_print(%struct.fatx_fs* %5, i32 5, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
%struct.fatx_fs = type { i32 }
%struct.fatx_dir = type { i32 }
@.str = [18 x i8] c"fatx_close_dir()\0A\00"
define i32 @fatx_close_dir(%struct.fatx_fs* %0, %struct.fatx_dir* nocapture readnone %1) {
%3 = tail call i32 @fatx_print(%struct.fatx_fs* %0, i32 5, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ drv_RB_outw(unsigned char const);
int /*<<< orphan*/ ndelay(int const);
void drv_RB_command(const unsigned char cmd, const int delay) {
  drv_RB_outw(0x0100 | cmd);
  ndelay(60);
  drv_RB_outw(cmd);
  ndelay(delay * 1000);
}


x86 assembly (clang, -O0):
<drv_RB_command>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
or     $0x100,%eax
movzbl %al,%edi
call   1030 <drv_RB_outw@plt>
mov    $0x3c,%edi
call   1040 <ndelay@plt>
movzbl -0x1(%rbp),%edi
call   1030 <drv_RB_outw@plt>
imul   $0x3e8,-0x8(%rbp),%edi
call   1040 <ndelay@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drv_RB_command>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <drv_RB_outw@plt>
mov    $0x3c,%edi
call   1040 <ndelay@plt>
mov    %ebp,%edi
call   1030 <drv_RB_outw@plt>
imul   $0x3e8,%ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <ndelay@plt>

LLVM IR (-O0):
define void @drv_RB_command(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = or i32 256, %6
%8 = trunc i32 %7 to i8
%9 = call i32 @drv_RB_outw(i8 zeroext %8)
%10 = call i32 @ndelay(i32 60)
%11 = load i8, i8* %3
%12 = call i32 @drv_RB_outw(i8 zeroext %11)
%13 = load i32, i32* %4
%14 = mul nsw i32 %13, 1000
%15 = call i32 @ndelay(i32 %14)
ret void
}

LLVM IR (-O2):
define void @drv_RB_command(i8 zeroext %0, i32 %1) {
%3 = tail call i32 @drv_RB_outw(i8 zeroext %0)
%4 = tail call i32 @ndelay(i32 60)
%5 = tail call i32 @drv_RB_outw(i8 zeroext %0)
%6 = mul nsw i32 %1, 1000
%7 = tail call i32 @ndelay(i32 %6)
ret void
}
double nan(const char *tagp) { return 0.0 / 0.0; }


x86 assembly (clang, -O0):
<nan>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  0xef0(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<nan>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @nan(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret double 0x7FF8000000000000
}

LLVM IR (-O2):
define double @nan(i8* nocapture readnone %0) {
ret double 0x7FF8000000000000
}
void ECAPCounterControl(unsigned int baseAdd, unsigned int flag) {
  if (flag) {
    (*((volatile unsigned short *)(baseAdd + (0x2A)))) |= (0x0010u);
  } else {
    (*((volatile unsigned short *)(baseAdd + (0x2A)))) &= ~(0x0010u);
  }
}


x86 assembly (clang, -O0):
<ECAPCounterControl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112d <ECAPCounterControl+0x2d>
mov    -0x4(%rbp),%eax
add    $0x2a,%eax
mov    %eax,%eax
mov    (%rax),%cx
movzwl %cx,%ecx
or     $0x10,%ecx
mov    %cx,(%rax)
jmp    1141 <ECAPCounterControl+0x41>
mov    -0x4(%rbp),%eax
add    $0x2a,%eax
mov    %eax,%eax
mov    (%rax),%cx
movzwl %cx,%ecx
and    $0xffffffef,%ecx
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ECAPCounterControl>:
xor    %eax,%eax
test   %esi,%esi
setne  %al
add    $0x2a,%edi
movzwl (%rdi),%ecx
and    $0xffffffef,%ecx
shl    $0x4,%eax
or     %ecx,%eax
mov    %ax,(%rdi)
ret

LLVM IR (-O0):
define void @ECAPCounterControl(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %16
7: ; preds = %2
%8 = load i32, i32* %3
%9 = add i32 %8, 42
%10 = zext i32 %9 to i64
%11 = inttoptr i64 %10 to i16*
%12 = load volatile i16, i16* %11
%13 = zext i16 %12 to i32
%14 = or i32 %13, 16
%15 = trunc i32 %14 to i16
store volatile i16 %15, i16* %11
br label %25
16: ; preds = %2
%17 = load i32, i32* %3
%18 = add i32 %17, 42
%19 = zext i32 %18 to i64
%20 = inttoptr i64 %19 to i16*
%21 = load volatile i16, i16* %20
%22 = zext i16 %21 to i32
%23 = and i32 %22, -17
%24 = trunc i32 %23 to i16
store volatile i16 %24, i16* %20
br label %25
25: ; preds = %16, %7
ret void
}

LLVM IR (-O2):
define void @ECAPCounterControl(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = add i32 %0, 42
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i16*
%7 = load volatile i16, i16* %6
%8 = and i16 %7, -17
%9 = select i1 %3, i16 0, i16 16
%10 = or i16 %8, %9
store volatile i16 %10, i16* %6
ret void
}
int test_imm_7Duint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0x7D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Duint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0x7d,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Duint64_highword_reg>:
movabs $0x7d00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Duint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 125
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_7Duint64_highword_reg(i64 %0) {
%2 = and i64 %0, 536870912000
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ esp_rom_crc8_be(int /*<<< orphan*/,
                                   int /*<<< orphan*/ const *,
                                   int /*<<< orphan*/);
uint8_t esp_crc8_be(uint8_t crc, uint8_t const *buf, uint32_t len) {
  return esp_rom_crc8_be(crc, buf, len);
}


x86 assembly (clang, -O0):
<esp_crc8_be>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <esp_rom_crc8_be@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<esp_crc8_be>:
jmp    1030 <esp_rom_crc8_be@plt>

LLVM IR (-O0):
define i32 @esp_crc8_be(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32*, i32** %5
%9 = load i32, i32* %6
%10 = call i32 @esp_rom_crc8_be(i32 %7, i32* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @esp_crc8_be(i32 %0, i32* %1, i32 %2) {
%4 = tail call i32 @esp_rom_crc8_be(i32 %0, i32* %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void usage(const char *name) {
  fprintf(stderr, "Usage: %s <port>\n", name);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e8c(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [18 x i8] c"Usage: %s <port>\0A\00"
@EXIT_FAILURE = global i32 0
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @EXIT_FAILURE
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [18 x i8] c"Usage: %s <port>\0A\00"
@EXIT_FAILURE = global i32 0
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @EXIT_FAILURE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ f(int *);
int main() {
  int a[5];
  f(a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x20(%rbp),%rdi
call   1030 <f@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
mov    %rsp,%rdi
call   1030 <f@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [5 x i32]
store i32 0, i32* %1
%3 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%4 = call i32 @f(i32* %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [5 x i32]
%2 = bitcast [5 x i32]* %1 to i8*
%3 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%4 = call i32 @f(i32* %3)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ send(int, void const *, size_t, int);
ssize_t mysend(int sockfd, const void *buf, size_t len, int flags) {
  return send(sockfd, buf, len, flags);
}


x86 assembly (clang, -O0):
<mysend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <send@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mysend>:
jmp    1030 <send@plt>

LLVM IR (-O0):
define i32 @mysend(i32 %0, i8* %1, i64 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %7
%12 = load i32, i32* %8
%13 = call i32 @send(i32 %9, i8* %10, i64 %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @mysend(i32 %0, i8* %1, i64 %2, i32 %3) {
%5 = tail call i32 @send(i32 %0, i8* %1, i64 %2, i32 %3)
ret i32 %5
}
void test95_Test_targetInit__I() {}


x86 assembly (clang, -O0):
<test95_Test_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test95_Test_targetInit__I>:
ret

LLVM IR (-O0):
define void @test95_Test_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test95_Test_targetInit__I() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char *);
int main(int argc, char **argv) {
  int i;
  for (i = 0; i < argc; i++) {
    printf("command line argv[%d] is %s\n", i, argv[i]);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1162 <main+0x52>
mov    -0x14(%rbp),%esi
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rdx
lea    0xeb1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112d <main+0x1d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %edi,%edi
jle    1147 <main+0x37>
mov    %rsi,%r14
mov    %edi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r15
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdx
mov    %r15,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [29 x i8] c"command line argv[%d] is %s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
br label %7
7: ; preds = %19, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %22
11: ; preds = %7
%12 = load i32, i32* %6
%13 = load i8**, i8*** %5
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8*, i8** %13, i64 %15
%17 = load i8*, i8** %16
%18 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %12, i8* %17)
br label %19
19: ; preds = %11
%20 = load i32, i32* %6
%21 = add nsw i32 %20, 1
store i32 %21, i32* %6
br label %7
22: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
@.str = [29 x i8] c"command line argv[%d] is %s\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %14
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %12, %6 ]
%8 = getelementptr inbounds i8*, i8** %1, i64 %7
%9 = load i8*, i8** %8
%10 = trunc i64 %7 to i32
%11 = tail call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %10, i8* %9)
%12 = add nuw nsw i64 %7, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %14, label %6
14: ; preds = %6, %2
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void SIGSEGV_handler(int signal) { usleep(1000); }


x86 assembly (clang, -O0):
<SIGSEGV_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x3e8,%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SIGSEGV_handler>:
mov    $0x3e8,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @SIGSEGV_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @usleep(i32 1000)
ret void
}

LLVM IR (-O2):
define void @SIGSEGV_handler(i32 %0) {
%2 = tail call i32 @usleep(i32 1000)
ret void
}
unsigned f2(unsigned abcd[]) { return abcd[1] ^ abcd[2] ^ abcd[3]; }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
mov    -0x8(%rbp),%rcx
xor    0x8(%rcx),%eax
mov    -0x8(%rbp),%rcx
xor    0xc(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
mov    0x8(%rdi),%eax
xor    0x4(%rdi),%eax
xor    0xc(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @f2(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 1
%5 = load i32, i32* %4
%6 = load i32*, i32** %2
%7 = getelementptr inbounds i32, i32* %6, i64 2
%8 = load i32, i32* %7
%9 = xor i32 %5, %8
%10 = load i32*, i32** %2
%11 = getelementptr inbounds i32, i32* %10, i64 3
%12 = load i32, i32* %11
%13 = xor i32 %9, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @f2(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 1
%3 = load i32, i32* %2
%4 = getelementptr inbounds i32, i32* %0, i64 2
%5 = load i32, i32* %4
%6 = xor i32 %5, %3
%7 = getelementptr inbounds i32, i32* %0, i64 3
%8 = load i32, i32* %7
%9 = xor i32 %6, %8
ret i32 %9
}
void function(void) { printf("This is %s\n", __func__); }


x86 assembly (clang, -O0):
<function>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xeea(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<function>:
lea    0xee9(%rip),%rdi
lea    0xeee(%rip),%rsi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"This is %s\0A\00"
@__func__.function = [9 x i8] c"function\00"
define void @function() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @__func__.function, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"This is %s\0A\00"
@__func__.function = [9 x i8] c"function\00"
define void @function() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @__func__.function, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, int);
int /*<<< orphan*/ stderr;
int rtlsdr_rpc_read_eeprom(void *dev, uint8_t *data, uint8_t offset,
                           uint16_t len) {
  fprintf(stderr, "[u] %s,%u\n",
          "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
          "2022-01-22/02-19-57/repos/Excalibur201010/librtlsdr_direct_sp/refs/"
          "heads/master/src/rtlsdr_rpc.c",
          734);
  return -1;
}


x86 assembly (clang, -O0):
<rtlsdr_rpc_read_eeprom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
lea    0xeca(%rip),%rsi
lea    0xece(%rip),%rdx
mov    $0x2de,%ecx
call   1030 <fprintf@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtlsdr_rpc_read_eeprom>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
lea    0xee3(%rip),%rdx
mov    $0x2de,%ecx
call   1030 <fprintf@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [11 x i8] c"[u] %s,%u\0A\00"
@.str.1 = [161 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Excalibur201010/librtlsdr_direct_sp/refs/heads/master/src/rtlsdr_rpc.c\00"
define i32 @rtlsdr_rpc_read_eeprom(i8* %0, i32* %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([161 x i8], [161 x i8]* @.str.1, i64 0, i64 0), i32 734)
ret i32 -1
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [11 x i8] c"[u] %s,%u\0A\00"
@.str.1 = [161 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Excalibur201010/librtlsdr_direct_sp/refs/heads/master/src/rtlsdr_rpc.c\00"
define i32 @rtlsdr_rpc_read_eeprom(i8* nocapture readnone %0, i32* nocapture readnone %1, i32 %2, i32 %3) {
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([161 x i8], [161 x i8]* @.str.1, i64 0, i64 0), i32 734)
ret i32 -1
}
/* Type definitions */
struct Mytype {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct Mytype *);
int /*<<< orphan*/ printf(char *);
void free_Mytype(struct Mytype *p) {
  printf("freeing Mytype\n");
  free(p);
}


x86 assembly (clang, -O0):
<free_Mytype>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1040 <printf@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_Mytype>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
call   1040 <puts@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.Mytype = type { i32 }
@.str = [16 x i8] c"freeing Mytype\0A\00"
define void @free_Mytype(%struct.Mytype* %0) {
%2 = alloca %struct.Mytype*
store %struct.Mytype* %0, %struct.Mytype** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%4 = load %struct.Mytype*, %struct.Mytype** %2
%5 = call i32 @free(%struct.Mytype* %4)
ret void
}

LLVM IR (-O2):
%struct.Mytype = type { i32 }
@str = [15 x i8] c"freeing Mytype\00"
define void @free_Mytype(%struct.Mytype* nocapture %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @free(%struct.Mytype* %0)
ret void
}
int dummyinput_RomOpen(void) { return 1; }


x86 assembly (clang, -O0):
<dummyinput_RomOpen>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummyinput_RomOpen>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @dummyinput_RomOpen() {
ret i32 1
}

LLVM IR (-O2):
define i32 @dummyinput_RomOpen() {
ret i32 1
}
void RTVfsChainElementRegisterProvider(void) {}


x86 assembly (clang, -O0):
<RTVfsChainElementRegisterProvider>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTVfsChainElementRegisterProvider>:
ret

LLVM IR (-O0):
define void @RTVfsChainElementRegisterProvider() {
ret void
}

LLVM IR (-O2):
define void @RTVfsChainElementRegisterProvider() {
ret void
}
void ptlc_bcrypt_dispose() {}


x86 assembly (clang, -O0):
<ptlc_bcrypt_dispose>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptlc_bcrypt_dispose>:
ret

LLVM IR (-O0):
define void @ptlc_bcrypt_dispose() {
ret void
}

LLVM IR (-O2):
define void @ptlc_bcrypt_dispose() {
ret void
}
int test_imm_78uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x78 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_78uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x78,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_78uint64_midword_reg>:
test   $0x780000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_78uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 120
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_78uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 7864320
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct tms {
  int dummy;
};
typedef int clock_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int times(struct tms *);
int main(void) {
  int i;
  clock_t start, end;
  struct tms tms_start, tms_end;
  start = times(&tms_start);
  end = times(&tms_end);
  printf("start clock time : %d\n", start);
  printf("end   clock time : %d\n", end);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x18(%rbp),%rdi
call   1040 <times@plt>
mov    %eax,-0xc(%rbp)
lea    -0x20(%rbp),%rdi
call   1040 <times@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%esi
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%esi
lea    0xeb7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
sub    $0x18,%rsp
lea    0x10(%rsp),%rdi
call   1040 <times@plt>
mov    %eax,%ebx
lea    0x8(%rsp),%rdi
call   1040 <times@plt>
mov    %eax,%ebp
lea    0xebb(%rip),%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
lea    0xec4(%rip),%rdi
mov    %ebp,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.tms = type { i32 }
@.str = [23 x i8] c"start clock time : %d\0A\00"
@.str.1 = [23 x i8] c"end clock time : %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca %struct.tms
%6 = alloca %struct.tms
store i32 0, i32* %1
%7 = call i32 @times(%struct.tms* %5)
store i32 %7, i32* %3
%8 = call i32 @times(%struct.tms* %6)
store i32 %8, i32* %4
%9 = load i32, i32* %3
%10 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = load i32, i32* %4
%12 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i32 %11)
ret i32 0
}

LLVM IR (-O2):
%struct.tms = type { i32 }
@.str = [23 x i8] c"start clock time : %d\0A\00"
@.str.1 = [23 x i8] c"end clock time : %d\0A\00"
define i32 @main() {
%1 = alloca %struct.tms
%2 = alloca %struct.tms
%3 = bitcast %struct.tms* %1 to i8*
%4 = bitcast %struct.tms* %2 to i8*
%5 = call i32 @times(%struct.tms* %1)
%6 = call i32 @times(%struct.tms* %2)
%7 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %5)
%8 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret i32 0
}
char *ptr(char *text, int pos) { return &text[pos]; }


x86 assembly (clang, -O0):
<ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptr>:
movslq %esi,%rax
add    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @ptr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
ret i8* %8
}

LLVM IR (-O2):
define i8* @ptr(i8* readnone %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i8, i8* %0, i64 %3
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ ant_debug_sock(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void ant_debug_sock_url(int sock, char *url) {
  ant_debug_sock(sock);
  fprintf(stderr, "url = %s\n", url);
}


x86 assembly (clang, -O0):
<ant_debug_sock_url>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ant_debug_sock@plt>
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
lea    0xeb5(%rip),%rsi
call   1040 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ant_debug_sock_url>:
push   %rbx
mov    %rsi,%rbx
call   1030 <ant_debug_sock@plt>
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
lea    0xec7(%rip),%rsi
mov    %rbx,%rdx
pop    %rbx
jmp    1040 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [10 x i8] c"url = %s\0A\00"
define void @ant_debug_sock_url(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = call i32 @ant_debug_sock(i32 %5)
%7 = load i32, i32* @stderr
%8 = load i8*, i8** %4
%9 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %8)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [10 x i8] c"url = %s\0A\00"
define void @ant_debug_sock_url(i32 %0, i8* %1) {
%3 = tail call i32 @ant_debug_sock(i32 %0)
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %1)
ret void
}
/* Variables and functions */
void *realloc(void *, size_t);
void *cdf_realloc(const char *file __attribute__((__unused__)),
                  size_t line __attribute__((__unused__)), void *p, size_t n) {
  ;
  return realloc(p, n);
}


x86 assembly (clang, -O0):
<cdf_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <realloc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cdf_realloc>:
mov    %rdx,%rdi
mov    %rcx,%rsi
jmp    1030 <realloc@plt>

LLVM IR (-O0):
define i8* @cdf_realloc(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%9 = load i8*, i8** %7
%10 = load i64, i64* %8
%11 = call i8* @realloc(i8* %9, i64 %10)
ret i8* %11
}

LLVM IR (-O2):
define noalias i8* @cdf_realloc(i8* nocapture readnone %0, i64 %1, i8* nocapture %2, i64 %3) {
%5 = tail call i8* @realloc(i8* %2, i64 %3)
ret i8* %5
}
/* Variables and functions */
int min(int, int);
int max(int a, int b) { return a + b - min(a, b); }


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <min@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
sub    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
push   %rbx
lea    (%rsi,%rdi,1),%ebx
call   1030 <min@plt>
sub    %eax,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @max(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @min(i32 %8, i32 %9)
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @max(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
%4 = tail call i32 @min(i32 %0, i32 %1)
%5 = sub i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_memblock_unref_fixed() {
  printf("NOT IMPLEMENTED:"
         "pa_memblock_unref_fixed"
         "\n");
}


x86 assembly (clang, -O0):
<pa_memblock_unref_fixed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_memblock_unref_fixed>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [41 x i8] c"NOT IMPLEMENTED:pa_memblock_unref_fixed\0A\00"
define i32 @pa_memblock_unref_fixed() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [40 x i8] c"NOT IMPLEMENTED:pa_memblock_unref_fixed\00"
define i32 @pa_memblock_unref_fixed() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([40 x i8], [40 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void data_abort_handler(void) {
  puts("data abort\n");
  puts("spinning forever...\n");
  for (;;)
    ;
}


x86 assembly (clang, -O0):
<data_abort_handler>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
jmp    112c <data_abort_handler+0x1c>

x86 assembly (clang, -O2):
<data_abort_handler>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
nopl   0x0(%rax)
jmp    1130 <data_abort_handler+0x20>

LLVM IR (-O0):
@.str = [12 x i8] c"data abort\0A\00"
@.str.1 = [21 x i8] c"spinning forever...\0A\00"
define void @data_abort_handler() {
%1 = call i32 @puts(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @puts(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0))
br label %3
3: ; preds = %3, %0
br label %3
}

LLVM IR (-O2):
@.str = [12 x i8] c"data abort\0A\00"
@.str.1 = [21 x i8] c"spinning forever...\0A\00"
define void @data_abort_handler() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0))
br label %3
3: ; preds = %3, %0
br label %3
}
/* Variables and functions */
int /*<<< orphan*/ setup();
void mousePressed() { setup(); }


x86 assembly (clang, -O0):
<mousePressed>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <setup@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mousePressed>:
xor    %eax,%eax
jmp    1030 <setup@plt>

LLVM IR (-O0):
define void @mousePressed() {
%1 = call i32 (...) @setup()
ret void
}

LLVM IR (-O2):
define void @mousePressed() {
%1 = tail call i32 (...) @setup()
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int depth;
};
typedef TYPE_1__ XImage;

/* Variables and functions */
void set_XImage_depth(void *_p, int _v) { ((XImage *)_p)->depth = (int)_v; }


x86 assembly (clang, -O0):
<set_XImage_depth>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XImage_depth>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XImage_depth(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XImage_depth(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void gpio_pwm_decrease_intensity(uint32_t const index) {}


x86 assembly (clang, -O0):
<gpio_pwm_decrease_intensity>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_pwm_decrease_intensity>:
ret

LLVM IR (-O0):
define void @gpio_pwm_decrease_intensity(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @gpio_pwm_decrease_intensity(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ A(int *);
int /*<<< orphan*/ A2(int *);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char **argv) {
  int a;
  int *p = NULL;
  A2(&a);
  printf("a = 0x%x\n", a);
  A(p);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x20(%rbp)
lea    -0x14(%rbp),%rdi
call   1050 <A2@plt>
mov    -0x14(%rbp),%esi
lea    0xe9f(%rip),%rdi
call   1030 <printf@plt>
mov    -0x20(%rbp),%rdi
call   1040 <A@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0x4(%rsp),%rdi
call   1050 <A2@plt>
mov    0x4(%rsp),%esi
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <A@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"a = 0x%x\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32* null, i32** %7
%8 = call i32 @A2(i32* %6)
%9 = load i32, i32* %6
%10 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = load i32*, i32** %7
%12 = call i32 @A(i32* %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"a = 0x%x\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @A2(i32* %3)
%6 = load i32, i32* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = call i32 @A(i32* null)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ usleep(unsigned long);
void delay(long t) { usleep((unsigned long)t); }


x86 assembly (clang, -O0):
<delay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay>:
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @delay(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @usleep(i64 %3)
ret void
}

LLVM IR (-O2):
define void @delay(i64 %0) {
%2 = tail call i32 @usleep(i64 %0)
ret void
}
int isPower2(int x) { return !(x & (x + ~0)) & !(x >> 31 & 0x1) & !!x; }


x86 assembly (clang, -O0):
<isPower2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
add    $0xffffffff,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    -0x4(%rbp),%ecx
sar    $0x1f,%ecx
and    $0x1,%ecx
cmp    $0x0,%ecx
setne  %cl
xor    $0xff,%cl
and    $0x1,%cl
movzbl %cl,%ecx
and    %ecx,%eax
cmpl   $0x0,-0x4(%rbp)
setne  %cl
xor    $0xff,%cl
xor    $0xff,%cl
and    $0x1,%cl
movzbl %cl,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPower2>:
lea    -0x1(%rdi),%eax
xor    %ecx,%ecx
test   %eax,%edi
sete   %cl
mov    %edi,%edx
not    %edx
shr    $0x1f,%edx
xor    %eax,%eax
test   %edi,%edi
setne  %al
and    %edx,%eax
and    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @isPower2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = add nsw i32 %4, -1
%6 = and i32 %3, %5
%7 = icmp ne i32 %6, 0
%8 = xor i1 %7, true
%9 = zext i1 %8 to i32
%10 = load i32, i32* %2
%11 = ashr i32 %10, 31
%12 = and i32 %11, 1
%13 = icmp ne i32 %12, 0
%14 = xor i1 %13, true
%15 = zext i1 %14 to i32
%16 = and i32 %9, %15
%17 = load i32, i32* %2
%18 = icmp ne i32 %17, 0
%19 = xor i1 %18, true
%20 = xor i1 %19, true
%21 = zext i1 %20 to i32
%22 = and i32 %16, %21
ret i32 %22
}

LLVM IR (-O2):
define i32 @isPower2(i32 %0) {
%2 = tail call i32 @llvm.ctpop.i32(i32 %0)
%3 = icmp ult i32 %2, 2
%4 = zext i1 %3 to i32
%5 = xor i32 %0, -1
%6 = lshr i32 %5, 31
%7 = icmp ne i32 %0, 0
%8 = zext i1 %7 to i32
%9 = and i32 %6, %8
%10 = and i32 %9, %4
ret i32 %10
}
void stPauseHandle_() { return; }


x86 assembly (clang, -O0):
<stPauseHandle_>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stPauseHandle_>:
ret

LLVM IR (-O0):
define void @stPauseHandle_() {
ret void
}

LLVM IR (-O2):
define void @stPauseHandle_() {
ret void
}
int isPrim(int n) {
  int i = 0;
  if (n == 2)
    return 1;
  for (i = 2; i < n; i++) {
    if ((n % i) == 0) {
      return 0;
    }
  }
  return 1;
}


x86 assembly (clang, -O0):
<isPrim>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x2,-0x8(%rbp)
jne    1124 <isPrim+0x24>
movl   $0x1,-0x4(%rbp)
jmp    116d <isPrim+0x6d>
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1166 <isPrim+0x66>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1153 <isPrim+0x53>
movl   $0x0,-0x4(%rbp)
jmp    116d <isPrim+0x6d>
jmp    1158 <isPrim+0x58>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112b <isPrim+0x2b>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPrim>:
mov    $0x1,%ecx
cmp    $0x3,%edi
jl     1120 <isPrim+0x20>
mov    $0x2,%esi
nop
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1123 <isPrim+0x23>
add    $0x1,%esi
cmp    %esi,%edi
jne    1110 <isPrim+0x10>
mov    %ecx,%eax
ret
xor    %ecx,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @isPrim(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 2
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %24
8: ; preds = %1
store i32 2, i32* %4
br label %9
9: ; preds = %20, %8
%10 = load i32, i32* %4
%11 = load i32, i32* %3
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %23
13: ; preds = %9
%14 = load i32, i32* %3
%15 = load i32, i32* %4
%16 = srem i32 %14, %15
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %13
store i32 0, i32* %2
br label %24
19: ; preds = %13
br label %20
20: ; preds = %19
%21 = load i32, i32* %4
%22 = add nsw i32 %21, 1
store i32 %22, i32* %4
br label %9
23: ; preds = %9
store i32 1, i32* %2
br label %24
24: ; preds = %23, %18, %7
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @isPrim(i32 %0) {
%2 = icmp sgt i32 %0, 2
br i1 %2, label %5, label %10
3: ; preds = %5
%4 = icmp eq i32 %9, %0
br i1 %4, label %10, label %5
5: ; preds = %1, %3
%6 = phi i32 [ %9, %3 ], [ 2, %1 ]
%7 = srem i32 %0, %6
%8 = icmp eq i32 %7, 0
%9 = add nuw nsw i32 %6, 1
br i1 %8, label %10, label %3
10: ; preds = %5, %3, %1
%11 = phi i32 [ 1, %1 ], [ 0, %5 ], [ 1, %3 ]
ret i32 %11
}
int foo(int n, int b[], int size) {
  int a[n], i;
  for (i = 0; i < size; i++) {
    a[i] = b[i];
  }
  return i;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x20(%rbp)
lea    0xf(,%rax,4),%rdx
and    $0xfffffffffffffff0,%rdx
mov    %rsp,%rcx
sub    %rdx,%rcx
mov    %rcx,-0x38(%rbp)
mov    %rcx,%rsp
mov    %rax,-0x28(%rbp)
movl   $0x0,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1170 <foo+0x70>
mov    -0x38(%rbp),%rax
mov    -0x10(%rbp),%rcx
movslq -0x2c(%rbp),%rdx
mov    (%rcx,%rdx,4),%edx
movslq -0x2c(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x2c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x2c(%rbp)
jmp    1140 <foo+0x40>
mov    -0x2c(%rbp),%eax
mov    -0x20(%rbp),%rcx
mov    %rcx,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
test   %edx,%edx
cmovg  %edx,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%10 = load i32, i32* %4
%11 = zext i32 %10 to i64
%12 = call i8* @llvm.stacksave()
store i8* %12, i8** %7
%13 = alloca i32, i64 %11
store i64 %11, i64* %8
store i32 0, i32* %9
br label %14
14: ; preds = %27, %3
%15 = load i32, i32* %9
%16 = load i32, i32* %6
%17 = icmp slt i32 %15, %16
br i1 %17, label %18, label %30
18: ; preds = %14
%19 = load i32*, i32** %5
%20 = load i32, i32* %9
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i32, i32* %19, i64 %21
%23 = load i32, i32* %22
%24 = load i32, i32* %9
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %13, i64 %25
store i32 %23, i32* %26
br label %27
27: ; preds = %18
%28 = load i32, i32* %9
%29 = add nsw i32 %28, 1
store i32 %29, i32* %9
br label %14
30: ; preds = %14
%31 = load i32, i32* %9
%32 = load i8*, i8** %7
ret i32 %31
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i32* nocapture readnone %1, i32 %2) {
%4 = call i32 @llvm.smax.i32(i32 %2, i32 0)
ret i32 %4
}
unsigned int test_loop_ubyte_101(void) {
  unsigned int i;
  volatile unsigned int s = 0;
  for (i = 0; i < 101; i++)
    s++;
  return s;
}


x86 assembly (clang, -O0):
<test_loop_ubyte_101>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0x4(%rbp)
cmpl   $0x65,-0x4(%rbp)
jae    1133 <test_loop_ubyte_101+0x33>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1112 <test_loop_ubyte_101+0x12>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_loop_ubyte_101>:
movl   $0x0,-0x4(%rsp)
mov    $0x64,%eax
nopl   (%rax)
addl   $0x1,-0x4(%rsp)
test   %eax,%eax
je     112d <test_loop_ubyte_101+0x2d>
addl   $0x1,-0x4(%rsp)
addl   $0x1,-0x4(%rsp)
addl   $0x1,-0x4(%rsp)
add    $0xfffffffc,%eax
jmp    1110 <test_loop_ubyte_101+0x10>
mov    -0x4(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @test_loop_ubyte_101() {
%1 = alloca i32
%2 = alloca i32
store volatile i32 0, i32* %2
store i32 0, i32* %1
br label %3
3: ; preds = %9, %0
%4 = load i32, i32* %1
%5 = icmp ult i32 %4, 101
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = load volatile i32, i32* %2
%8 = add i32 %7, 1
store volatile i32 %8, i32* %2
br label %9
9: ; preds = %6
%10 = load i32, i32* %1
%11 = add i32 %10, 1
store i32 %11, i32* %1
br label %3
12: ; preds = %3
%13 = load volatile i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @test_loop_ubyte_101() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store volatile i32 0, i32* %1
br label %3
3: ; preds = %8, %0
%4 = phi i32 [ 0, %0 ], [ %15, %8 ]
%5 = load volatile i32, i32* %1
%6 = add i32 %5, 1
store volatile i32 %6, i32* %1
%7 = icmp eq i32 %4, 100
br i1 %7, label %16, label %8
8: ; preds = %3
%9 = load volatile i32, i32* %1
%10 = add i32 %9, 1
store volatile i32 %10, i32* %1
%11 = load volatile i32, i32* %1
%12 = add i32 %11, 1
store volatile i32 %12, i32* %1
%13 = load volatile i32, i32* %1
%14 = add i32 %13, 1
store volatile i32 %14, i32* %1
%15 = add nuw nsw i32 %4, 4
br label %3
16: ; preds = %3
%17 = load volatile i32, i32* %1
ret i32 %17
}