xunge/DecIR huggingface dataset:
signed int calcuate_num_blocks(unsigned long long total_msgs) {
  signed int num_meta_blocks = (total_msgs / (4096 / sizeof(signed long long)));
  if (total_msgs % (4096 / sizeof(signed long long)) > 0)
    num_meta_blocks += 1;
  return num_meta_blocks;
}


x86 assembly (clang, -O0):
<calcuate_num_blocks>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x9,%rax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
and    $0x1ff,%rax
cmp    $0x0,%rax
jbe    1130 <calcuate_num_blocks+0x30>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calcuate_num_blocks>:
mov    %rdi,%rax
shr    $0x9,%rax
and    $0x1ff,%edi
cmp    $0x1,%rdi
sbb    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @calcuate_num_blocks(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = udiv i64 %4, 512
%6 = trunc i64 %5 to i32
store i32 %6, i32* %3
%7 = load i64, i64* %2
%8 = urem i64 %7, 512
%9 = icmp ugt i64 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %13
13: ; preds = %10, %1
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @calcuate_num_blocks(i64 %0) {
%2 = lshr i64 %0, 9
%3 = trunc i64 %2 to i32
%4 = and i64 %0, 511
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i32
%7 = add nsw i32 %6, %3
ret i32 %7
}
void USBHostPwrConfig(unsigned long ulBase, unsigned long ulFlags) {
  ;

  ;
  (*((volatile unsigned long *)(ulBase + 0x00000430))) = ulFlags >> 16;
  (*((volatile unsigned short *)(ulBase + 0x00000400))) =
      (ulFlags | ((*((volatile unsigned short *)(ulBase + 0x00000400))) &
                  ~(0x00000300 | 0x00000040 | 0x00000020 | 0x00000003)));
}


x86 assembly (clang, -O0):
<USBHostPwrConfig>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
shr    $0x10,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x430(%rax)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
mov    0x400(%rcx),%cx
movzwl %cx,%ecx
and    $0xfffffc9c,%ecx
movslq %ecx,%rcx
or     %rcx,%rax
mov    %ax,%cx
mov    -0x8(%rbp),%rax
mov    %cx,0x400(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBHostPwrConfig>:
mov    %rsi,%rax
shr    $0x10,%rax
mov    %rax,0x430(%rdi)
movzwl 0x400(%rdi),%eax
and    $0xfffffc9c,%eax
or     %eax,%esi
mov    %si,0x400(%rdi)
ret

LLVM IR (-O0):
define void @USBHostPwrConfig(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = lshr i64 %5, 16
%7 = load i64, i64* %3
%8 = add i64 %7, 1072
%9 = inttoptr i64 %8 to i64*
store volatile i64 %6, i64* %9
%10 = load i64, i64* %4
%11 = load i64, i64* %3
%12 = add i64 %11, 1024
%13 = inttoptr i64 %12 to i16*
%14 = load volatile i16, i16* %13
%15 = zext i16 %14 to i32
%16 = and i32 %15, -868
%17 = sext i32 %16 to i64
%18 = or i64 %10, %17
%19 = trunc i64 %18 to i16
%20 = load i64, i64* %3
%21 = add i64 %20, 1024
%22 = inttoptr i64 %21 to i16*
store volatile i16 %19, i16* %22
ret void
}

LLVM IR (-O2):
define void @USBHostPwrConfig(i64 %0, i64 %1) {
%3 = lshr i64 %1, 16
%4 = add i64 %0, 1072
%5 = inttoptr i64 %4 to i64*
store volatile i64 %3, i64* %5
%6 = add i64 %0, 1024
%7 = inttoptr i64 %6 to i16*
%8 = load volatile i16, i16* %7
%9 = and i16 %8, -868
%10 = trunc i64 %1 to i16
%11 = or i16 %9, %10
store volatile i16 %11, i16* %7
ret void
}
void *miniwget2(const char *host, unsigned short port, const char *path,
                int *size, char *addr_str, int addr_str_len,
                unsigned int scope_id) {
  char *respbuffer;
  respbuffer = miniwget3(host, port, path, size, addr_str, addr_str_len, "1.1",
                         scope_id);
  return respbuffer;
}


x86 assembly (clang, -O0):
<miniwget2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %si,%ax
mov    0x10(%rbp),%esi
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9d,-0x2c(%rbp)
mov    -0x8(%rbp),%rdi
movzwl -0xa(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    -0x2c(%rbp),%r9d
mov    0x10(%rbp),%eax
lea    0xea8(%rip),%r10
mov    %r10,(%rsp)
mov    %eax,0x8(%rsp)
mov    $0x0,%al
call   1030 <miniwget3@plt>
cltq
mov    %rax,-0x38(%rbp)
mov    -0x38(%rbp),%rax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<miniwget2>:
push   %rax
mov    0x10(%rsp),%r10d
lea    0xee3(%rip),%r11
xor    %eax,%eax
push   %r10
push   %r11
call   1030 <miniwget3@plt>
add    $0x10,%rsp
cltq
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"1.1\00"
define i8* @miniwget2(i8* %0, i16 zeroext %1, i8* %2, i32* %3, i8* %4, i32 %5, i32 %6) {
%8 = alloca i8*
%9 = alloca i16
%10 = alloca i8*
%11 = alloca i32*
%12 = alloca i8*
%13 = alloca i32
%14 = alloca i32
%15 = alloca i8*
store i8* %0, i8** %8
store i16 %1, i16* %9
store i8* %2, i8** %10
store i32* %3, i32** %11
store i8* %4, i8** %12
store i32 %5, i32* %13
store i32 %6, i32* %14
%16 = load i8*, i8** %8
%17 = load i16, i16* %9
%18 = zext i16 %17 to i32
%19 = load i8*, i8** %10
%20 = load i32*, i32** %11
%21 = load i8*, i8** %12
%22 = load i32, i32* %13
%23 = load i32, i32* %14
%24 = call i32 (i8*, i32, i8*, i32*, i8*, i32, i8*, i32, ...) bitcast (i32 (...)* @miniwget3 to i32 (i8*, i32, i8*, i32*, i8*, i32, i8*, i32, ...)*)(i8* %16, i32 %18, i8* %19, i32* %20, i8* %21, i32 %22, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %23)
%25 = sext i32 %24 to i64
%26 = inttoptr i64 %25 to i8*
store i8* %26, i8** %15
%27 = load i8*, i8** %15
ret i8* %27
}

LLVM IR (-O2):
@.str = [4 x i8] c"1.1\00"
define i8* @miniwget2(i8* %0, i16 zeroext %1, i8* %2, i32* %3, i8* %4, i32 %5, i32 %6) {
%8 = zext i16 %1 to i32
%9 = tail call i32 (i8*, i32, i8*, i32*, i8*, i32, i8*, i32, ...) bitcast (i32 (...)* @miniwget3 to i32 (i8*, i32, i8*, i32*, i8*, i32, i8*, i32, ...)*)(i8* %0, i32 %8, i8* %2, i32* %3, i8* %4, i32 %5, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
%10 = sext i32 %9 to i64
%11 = inttoptr i64 %10 to i8*
ret i8* %11
}
int dlclose(void *handle) { return (0); }


x86 assembly (clang, -O0):
<dlclose>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dlclose>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dlclose(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @dlclose(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ delay(int);
int /*<<< orphan*/ mbus_remote_register_write(int, int, int);
void set_pmu_sleep_clk_high() {
  mbus_remote_register_write(0x6, 0x19,
                             ((0 << 13) | (1 << 9) | (1 << 5) | (1)));
  delay(100);
  mbus_remote_register_write(0x6, 0x19,
                             ((0 << 13) | (1 << 9) | (1 << 5) | (1)));
  delay(100);
  mbus_remote_register_write(0x6, 0x15,
                             ((0 << 19) | (0 << 18) | (0 << 17) | (3 << 14) |
                              (0 << 13) | (1 << 9) | (1 << 5) | (6)));
  delay(100 * 10);
}


x86 assembly (clang, -O0):
<set_pmu_sleep_clk_high>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
mov    $0x19,%esi
mov    $0x221,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
call   1030 <delay@plt>
mov    $0x6,%edi
mov    $0x19,%esi
mov    $0x221,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
call   1030 <delay@plt>
mov    $0x6,%edi
mov    $0x15,%esi
mov    $0xc226,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x3e8,%edi
call   1030 <delay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_pmu_sleep_clk_high>:
push   %rax
mov    $0x6,%edi
mov    $0x19,%esi
mov    $0x221,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
call   1030 <delay@plt>
mov    $0x6,%edi
mov    $0x19,%esi
mov    $0x221,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
call   1030 <delay@plt>
mov    $0x6,%edi
mov    $0x15,%esi
mov    $0xc226,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x3e8,%edi
pop    %rax
jmp    1030 <delay@plt>

LLVM IR (-O0):
define void @set_pmu_sleep_clk_high() {
%1 = call i32 @mbus_remote_register_write(i32 6, i32 25, i32 545)
%2 = call i32 @delay(i32 100)
%3 = call i32 @mbus_remote_register_write(i32 6, i32 25, i32 545)
%4 = call i32 @delay(i32 100)
%5 = call i32 @mbus_remote_register_write(i32 6, i32 21, i32 49702)
%6 = call i32 @delay(i32 1000)
ret void
}

LLVM IR (-O2):
define void @set_pmu_sleep_clk_high() {
%1 = tail call i32 @mbus_remote_register_write(i32 6, i32 25, i32 545)
%2 = tail call i32 @delay(i32 100)
%3 = tail call i32 @mbus_remote_register_write(i32 6, i32 25, i32 545)
%4 = tail call i32 @delay(i32 100)
%5 = tail call i32 @mbus_remote_register_write(i32 6, i32 21, i32 49702)
%6 = tail call i32 @delay(i32 1000)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int /*<<< orphan*/ printf(char *);
int creat(const char *path __attribute__((unused)),
          mode_t mode __attribute__((unused))) {
  printf("creat\n");
  errno = ENOSYS;
  return (-1);
}


x86 assembly (clang, -O0):
<creat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eb6(%rip),%rax
mov    (%rax),%ecx
mov    0x2e9d(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<creat>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2ec4(%rip),%rax
mov    (%rax),%eax
mov    0x2eab(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"creat\0A\00"
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @creat(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* @ENOSYS
store i32 %6, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
@str = [6 x i8] c"creat\00"
define i32 @creat(i8* nocapture readnone %0, i32 %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
%4 = load i32, i32* @ENOSYS
store i32 %4, i32* @errno
ret i32 -1
}
void edmini_v2_init(void) {}


x86 assembly (clang, -O0):
<edmini_v2_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<edmini_v2_init>:
ret

LLVM IR (-O0):
define void @edmini_v2_init() {
ret void
}

LLVM IR (-O2):
define void @edmini_v2_init() {
ret void
}
void RealTimeClockOn(void) {}


x86 assembly (clang, -O0):
<RealTimeClockOn>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RealTimeClockOn>:
ret

LLVM IR (-O0):
define void @RealTimeClockOn() {
ret void
}

LLVM IR (-O2):
define void @RealTimeClockOn() {
ret void
}
/* Variables and functions */
int BIT(int);
int wpa_key_mgmt_sha256(int akm) {
  return !!(akm & (BIT(8) | BIT(7) | BIT(15)));
}


x86 assembly (clang, -O0):
<wpa_key_mgmt_sha256>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x8,%edi
call   1030 <BIT@plt>
mov    %eax,-0x10(%rbp)
mov    $0x7,%edi
call   1030 <BIT@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    $0xf,%edi
call   1030 <BIT@plt>
mov    -0xc(%rbp),%ecx
mov    %eax,%edx
mov    -0x8(%rbp),%eax
or     %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpa_key_mgmt_sha256>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%r14d
mov    $0x8,%edi
call   1030 <BIT@plt>
mov    %eax,%ebp
mov    $0x7,%edi
call   1030 <BIT@plt>
mov    %eax,%ebx
or     %ebp,%ebx
mov    $0xf,%edi
call   1030 <BIT@plt>
or     %ebx,%eax
xor    %ecx,%ecx
test   %r14d,%eax
setne  %cl
mov    %ecx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @wpa_key_mgmt_sha256(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @BIT(i32 8)
%5 = call i32 @BIT(i32 7)
%6 = or i32 %4, %5
%7 = call i32 @BIT(i32 15)
%8 = or i32 %6, %7
%9 = and i32 %3, %8
%10 = icmp ne i32 %9, 0
%11 = xor i1 %10, true
%12 = xor i1 %11, true
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @wpa_key_mgmt_sha256(i32 %0) {
%2 = tail call i32 @BIT(i32 8)
%3 = tail call i32 @BIT(i32 7)
%4 = or i32 %3, %2
%5 = tail call i32 @BIT(i32 15)
%6 = or i32 %4, %5
%7 = and i32 %6, %0
%8 = icmp ne i32 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void const *, size_t);
void __attribute__((weak))
__aeabi_memcpy8_impl(void *dest, const void *src, size_t n) {
  memcpy(dest, src, n);
}


x86 assembly (clang, -O0):
<__aeabi_memcpy8_impl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__aeabi_memcpy8_impl>:
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define weak void @__aeabi_memcpy8_impl(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @memcpy(i8* %7, i8* %8, i64 %9)
ret void
}

LLVM IR (-O2):
define weak void @__aeabi_memcpy8_impl(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @memcpy(i8* %0, i8* %1, i64 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Cmd_Argv(int);
int /*<<< orphan*/ Com_Error(int /*<<< orphan*/, char *, int /*<<< orphan*/);
void Com_Error_f(void) { Com_Error(0, "%s", Cmd_Argv(1)); }


x86 assembly (clang, -O0):
<Com_Error_f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <Cmd_Argv@plt>
mov    %eax,%edx
xor    %edi,%edi
lea    0xec7(%rip),%rsi
call   1040 <Com_Error@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Com_Error_f>:
push   %rax
mov    $0x1,%edi
call   1030 <Cmd_Argv@plt>
lea    0xece(%rip),%rsi
xor    %edi,%edi
mov    %eax,%edx
pop    %rax
jmp    1040 <Com_Error@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @Com_Error_f() {
%1 = call i32 @Cmd_Argv(i32 1)
%2 = call i32 @Com_Error(i32 0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @Com_Error_f() {
%1 = tail call i32 @Cmd_Argv(i32 1)
%2 = tail call i32 @Com_Error(i32 0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
float sgn(float inp) {
  if (inp > 0)
    return 1.0;
  if (inp < 0)
    return -1.0;
  if (inp == 0)
    return 0.0;
}


x86 assembly (clang, -O0):
<sgn>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jbe    112c <sgn+0x2c>
movss  0xee2(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    116a <sgn+0x6a>
xorps  %xmm0,%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    114b <sgn+0x4b>
movss  0xebf(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    116a <sgn+0x6a>
movss  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jne    116a <sgn+0x6a>
jp     116a <sgn+0x6a>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sgn>:
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jbe    1111 <sgn+0x11>
movss  0xef0(%rip),%xmm0
ret
ucomiss %xmm0,%xmm1
jbe    111f <sgn+0x1f>
movss  0xee6(%rip),%xmm0
ret
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @sgn(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = fcmp ogt float %4, 0.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
store float 1.000000e+00, float* %2
br label %15
7: ; preds = %1
%8 = load float, float* %3
%9 = fcmp olt float %8, 0.000000e+00
br i1 %9, label %10, label %11
10: ; preds = %7
store float -1.000000e+00, float* %2
br label %15
11: ; preds = %7
%12 = load float, float* %3
%13 = fcmp oeq float %12, 0.000000e+00
br i1 %13, label %14, label %15
14: ; preds = %11
store float 0.000000e+00, float* %2
br label %15
15: ; preds = %6, %10, %14, %11
%16 = load float, float* %2
ret float %16
}

LLVM IR (-O2):
define float @sgn(float %0) {
%2 = fcmp ogt float %0, 0.000000e+00
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = fcmp olt float %0, 0.000000e+00
br i1 %4, label %6, label %5
5: ; preds = %3
br label %6
6: ; preds = %5, %3, %1
%7 = phi float [ 1.000000e+00, %1 ], [ -1.000000e+00, %3 ], [ 0.000000e+00, %5 ]
ret float %7
}
char *strchrnul(const char *s, int c) {
  char *i;
  for (i = (char *)s; *i != '\0'; ++i) {
    if (*i == c) {
      return i;
    }
  }
  return i;
}


x86 assembly (clang, -O0):
<strchrnul>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1156 <strchrnul+0x56>
mov    -0x20(%rbp),%rax
movsbl (%rax),%eax
cmp    -0x14(%rbp),%eax
jne    1140 <strchrnul+0x40>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    115e <strchrnul+0x5e>
jmp    1145 <strchrnul+0x45>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1113 <strchrnul+0x13>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strchrnul>:
mov    %rdi,%rax
add    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
movsbl 0x1(%rax),%ecx
add    $0x1,%rax
test   %ecx,%ecx
je     1120 <strchrnul+0x20>
cmp    %esi,%ecx
jne    1110 <strchrnul+0x10>
ret

LLVM IR (-O0):
define i8* @strchrnul(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i8*, i8** %4
store i8* %7, i8** %6
br label %8
8: ; preds = %22, %2
%9 = load i8*, i8** %6
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %25
13: ; preds = %8
%14 = load i8*, i8** %6
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = load i32, i32* %5
%18 = icmp eq i32 %16, %17
br i1 %18, label %19, label %21
19: ; preds = %13
%20 = load i8*, i8** %6
store i8* %20, i8** %3
br label %27
21: ; preds = %13
br label %22
22: ; preds = %21
%23 = load i8*, i8** %6
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %6
br label %8
25: ; preds = %8
%26 = load i8*, i8** %6
store i8* %26, i8** %3
br label %27
27: ; preds = %25, %19
%28 = load i8*, i8** %3
ret i8* %28
}

LLVM IR (-O2):
define i8* @strchrnul(i8* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %10, %3 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = sext i8 %5 to i32
%8 = icmp eq i32 %7, %1
%9 = or i1 %6, %8
%10 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %9, label %11, label %3
11: ; preds = %3
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ entab(char *);
int /*<<< orphan*/ printf(char *, char *);
scalar_t__ readline(char *, int);
int main() {
  char line[1024];
  while ((readline(line, 1024)) > 0) {
    entab(line);
    printf("%s", line);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x410,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x410(%rbp),%rdi
mov    $0x400,%esi
call   1040 <readline@plt>
cmp    $0x0,%rax
jle    1181 <main+0x51>
lea    -0x410(%rbp),%rdi
call   1050 <entab@plt>
lea    -0x410(%rbp),%rsi
lea    0xe89(%rip),%rdi
call   1030 <printf@plt>
jmp    1142 <main+0x12>
mov    -0x4(%rbp),%eax
add    $0x410,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
sub    $0x408,%rsp
mov    %rsp,%rdi
mov    $0x400,%esi
call   1040 <readline@plt>
test   %rax,%rax
jle    1185 <main+0x55>
mov    %rsp,%rbx
lea    0xeaa(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1050 <entab@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x400,%esi
call   1040 <readline@plt>
test   %rax,%rax
jg     1160 <main+0x30>
xor    %eax,%eax
add    $0x408,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [1024 x i8]
store i32 0, i32* %1
br label %3
3: ; preds = %7, %0
%4 = getelementptr inbounds [1024 x i8], [1024 x i8]* %2, i64 0, i64 0
%5 = call i64 @readline(i8* %4, i32 1024)
%6 = icmp sgt i64 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %3
%8 = getelementptr inbounds [1024 x i8], [1024 x i8]* %2, i64 0, i64 0
%9 = call i32 @entab(i8* %8)
%10 = getelementptr inbounds [1024 x i8], [1024 x i8]* %2, i64 0, i64 0
%11 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %10)
br label %3
12: ; preds = %3
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca [1024 x i8]
%2 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 0
%3 = call i64 @readline(i8* %2, i32 1024)
%4 = icmp sgt i64 %3, 0
br i1 %4, label %5, label %10
5: ; preds = %0, %5
%6 = call i32 @entab(i8* %2)
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %2)
%8 = call i64 @readline(i8* %2, i32 1024)
%9 = icmp sgt i64 %8, 0
br i1 %9, label %5, label %10
10: ; preds = %5, %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sopa();
int main() {
  sopa();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <sopa@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <sopa@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @sopa()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @sopa()
ret i32 0
}
/* Variables and functions */
char *calloc(int, int);
char *make_string(int n, char c) {
  int i;
  char *str = calloc(n + 1, 1);
  char *p = str;
  for (i = 0; i < n; i++) {
    *p++ = c;
  }
  *p = 0;
  return str;
}


x86 assembly (clang, -O0):
<make_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%edi
add    $0x1,%edi
mov    $0x1,%esi
call   1030 <calloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1172 <make_string+0x62>
mov    -0x5(%rbp),%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1144 <make_string+0x34>
mov    -0x20(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_string>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebp
mov    %edi,%ebx
lea    0x1(%rbx),%edi
mov    $0x1,%esi
call   1040 <calloc@plt>
mov    %rax,%r14
test   %ebx,%ebx
jle    1155 <make_string+0x35>
mov    %ebx,%edx
movzbl %bpl,%esi
mov    %r14,%rdi
call   1030 <memset@plt>
add    $0xffffffff,%ebx
lea    (%rbx,%r14,1),%rax
add    $0x1,%rax
movb   $0x0,(%rax)
mov    %r14,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @make_string(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
store i32 %0, i32* %3
store i8 %1, i8* %4
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
%10 = call i8* @calloc(i32 %9, i32 1)
store i8* %10, i8** %6
%11 = load i8*, i8** %6
store i8* %11, i8** %7
store i32 0, i32* %5
br label %12
12: ; preds = %20, %2
%13 = load i32, i32* %5
%14 = load i32, i32* %3
%15 = icmp slt i32 %13, %14
br i1 %15, label %16, label %23
16: ; preds = %12
%17 = load i8, i8* %4
%18 = load i8*, i8** %7
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %7
store i8 %17, i8* %18
br label %20
20: ; preds = %16
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
store i32 %22, i32* %5
br label %12
23: ; preds = %12
%24 = load i8*, i8** %7
store i8 0, i8* %24
%25 = load i8*, i8** %6
ret i8* %25
}

LLVM IR (-O2):
define noalias i8* @make_string(i32 %0, i8 signext %1) {
%3 = add nsw i32 %0, 1
%4 = tail call i8* @calloc(i32 %3, i32 1)
%5 = icmp sgt i32 %0, 0
br i1 %5, label %6, label %12
6: ; preds = %2
%7 = zext i32 %0 to i64
%8 = add nsw i32 %0, -1
%9 = zext i32 %8 to i64
%10 = add nuw nsw i64 %9, 1
%11 = getelementptr i8, i8* %4, i64 %10
br label %12
12: ; preds = %6, %2
%13 = phi i8* [ %4, %2 ], [ %11, %6 ]
store i8 0, i8* %13
ret i8* %4
}
/* Variables and functions */
double cos(int);
int drand();
int log(int);
double sqrt(int);
double rand_normal_r() {
  return sqrt(-2 * log(drand())) * cos(2 * (3.141592653589793) * drand());
}


x86 assembly (clang, -O0):
<rand_normal_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <drand@plt>
mov    %eax,%edi
call   1050 <log@plt>
imul   $0xfffffffe,%eax,%edi
call   1060 <sqrt@plt>
movsd  %xmm0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <drand@plt>
cvtsi2sd %eax,%xmm1
movsd  0xe87(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1040 <cos@plt>
movaps %xmm0,%xmm1
movsd  -0x8(%rbp),%xmm0
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_normal_r>:
push   %rax
xor    %eax,%eax
call   1030 <drand@plt>
mov    %eax,%edi
call   1050 <log@plt>
lea    (%rax,%rax,1),%edi
neg    %edi
call   1060 <sqrt@plt>
movsd  %xmm0,(%rsp)
xor    %eax,%eax
call   1030 <drand@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
mulsd  0xe8c(%rip),%xmm0
cvttsd2si %xmm0,%edi
call   1040 <cos@plt>
mulsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @rand_normal_r() {
%1 = call i32 (...) @drand()
%2 = call i32 @log(i32 %1)
%3 = mul nsw i32 -2, %2
%4 = call double @sqrt(i32 %3)
%5 = call i32 (...) @drand()
%6 = sitofp i32 %5 to double
%7 = fmul double 0x401921FB54442D18, %6
%8 = fptosi double %7 to i32
%9 = call double @cos(i32 %8)
%10 = fmul double %4, %9
ret double %10
}

LLVM IR (-O2):
define double @rand_normal_r() {
%1 = tail call i32 (...) @drand()
%2 = tail call i32 @log(i32 %1)
%3 = mul nsw i32 %2, -2
%4 = tail call double @sqrt(i32 %3)
%5 = tail call i32 (...) @drand()
%6 = sitofp i32 %5 to double
%7 = fmul double %6, 0x401921FB54442D18
%8 = fptosi double %7 to i32
%9 = tail call double @cos(i32 %8)
%10 = fmul double %4, %9
ret double %10
}
reg0regx1_set(r0, r1, x0, x1, p0, p1) short r0, r1;
short *p0, *p1;
{ r0 = (p1[x1]); }


x86 assembly (clang, -O0):
<reg0regx1_set>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,2),%ax
mov    %ax,-0x6(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg0regx1_set>:
ret

LLVM IR (-O0):
define i32 @reg0regx1_set(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16*, i16** %13
%17 = load i32, i32* %11
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i16, i16* %16, i64 %18
%20 = load i16, i16* %19
store i16 %20, i16* %8
%21 = load i32, i32* %7
ret i32 %21
}

LLVM IR (-O2):
define i32 @reg0regx1_set(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture readnone %5) {
ret i32 undef
}
/* Type definitions */
struct vm_area_struct {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ flush_tlb_one(unsigned long);
void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) {
  flush_tlb_one(addr);
}


x86 assembly (clang, -O0):
<flush_tlb_page>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <flush_tlb_one@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flush_tlb_page>:
mov    %rsi,%rdi
jmp    1030 <flush_tlb_one@plt>

LLVM IR (-O0):
%struct.vm_area_struct = type { i32 }
define void @flush_tlb_page(%struct.vm_area_struct* %0, i64 %1) {
%3 = alloca %struct.vm_area_struct*
%4 = alloca i64
store %struct.vm_area_struct* %0, %struct.vm_area_struct** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = call i32 @flush_tlb_one(i64 %5)
ret void
}

LLVM IR (-O2):
%struct.vm_area_struct = type { i32 }
define void @flush_tlb_page(%struct.vm_area_struct* nocapture readnone %0, i64 %1) {
%3 = tail call i32 @flush_tlb_one(i64 %1)
ret void
}
/* Type definitions */
struct spindly_phys {
  int dummy;
};
typedef int /*<<< orphan*/ free;

/* Variables and functions */
void spindly_phys_cleanup(struct spindly_phys *phys) {
  if (phys) {
    (free)(phys);
  }
}


x86 assembly (clang, -O0):
<spindly_phys_cleanup>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1113 <spindly_phys_cleanup+0x13>
pop    %rbp
ret

x86 assembly (clang, -O2):
<spindly_phys_cleanup>:
ret

LLVM IR (-O0):
%struct.spindly_phys = type { i32 }
define void @spindly_phys_cleanup(%struct.spindly_phys* %0) {
%2 = alloca %struct.spindly_phys*
store %struct.spindly_phys* %0, %struct.spindly_phys** %2
%3 = load %struct.spindly_phys*, %struct.spindly_phys** %2
%4 = icmp ne %struct.spindly_phys* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load %struct.spindly_phys*, %struct.spindly_phys** %2
%7 = ptrtoint %struct.spindly_phys* %6 to i32
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
%struct.spindly_phys = type { i32 }
define void @spindly_phys_cleanup(%struct.spindly_phys* nocapture %0) {
ret void
}
char decode64Char3(char ci3, char ci4) { return ((ci3 << 6) | ci4); }


x86 assembly (clang, -O0):
<decode64Char3>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%eax
shl    $0x6,%eax
movsbl -0x2(%rbp),%ecx
or     %ecx,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode64Char3>:
mov    %edi,%eax
shl    $0x6,%al
or     %sil,%al
ret

LLVM IR (-O0):
define signext i8 @decode64Char3(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
%7 = shl i32 %6, 6
%8 = load i8, i8* %4
%9 = sext i8 %8 to i32
%10 = or i32 %7, %9
%11 = trunc i32 %10 to i8
ret i8 %11
}

LLVM IR (-O2):
define signext i8 @decode64Char3(i8 signext %0, i8 signext %1) {
%3 = shl i8 %0, 6
%4 = or i8 %3, %1
ret i8 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char **argv) {
  printf("Hello OpenWrt\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Hello OpenWrt\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [14 x i8] c"Hello OpenWrt\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ vx86_NBSB_Write(int, unsigned char, unsigned long);
void sb_Write(unsigned char offset, unsigned long val) {
  vx86_NBSB_Write(2, offset, val);
}


x86 assembly (clang, -O0):
<sb_Write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x1(%rbp),%al
mov    -0x10(%rbp),%rdx
mov    $0x2,%edi
movzbl %al,%esi
call   1030 <vx86_NBSB_Write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sb_Write>:
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0x2,%edi
jmp    1030 <vx86_NBSB_Write@plt>

LLVM IR (-O0):
define void @sb_Write(i8 zeroext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
store i8 %0, i8* %3
store i64 %1, i64* %4
%5 = load i8, i8* %3
%6 = load i64, i64* %4
%7 = call i32 @vx86_NBSB_Write(i32 2, i8 zeroext %5, i64 %6)
ret void
}

LLVM IR (-O2):
define void @sb_Write(i8 zeroext %0, i64 %1) {
%3 = tail call i32 @vx86_NBSB_Write(i32 2, i8 zeroext %0, i64 %1)
ret void
}
void proc21() {}


x86 assembly (clang, -O0):
<proc21>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<proc21>:
ret

LLVM IR (-O0):
define void @proc21() {
ret void
}

LLVM IR (-O2):
define void @proc21() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ default_handler();
__attribute__((weak)) void DMA1_Stream3_IRQHandler() { default_handler(); }


x86 assembly (clang, -O0):
<DMA1_Stream3_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <default_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMA1_Stream3_IRQHandler>:
xor    %eax,%eax
jmp    1030 <default_handler@plt>

LLVM IR (-O0):
define weak void @DMA1_Stream3_IRQHandler() {
%1 = call i32 (...) @default_handler()
ret void
}

LLVM IR (-O2):
define weak void @DMA1_Stream3_IRQHandler() {
%1 = tail call i32 (...) @default_handler()
ret void
}
void qd_alloc_initialize(void) {}


x86 assembly (clang, -O0):
<qd_alloc_initialize>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qd_alloc_initialize>:
ret

LLVM IR (-O0):
define void @qd_alloc_initialize() {
ret void
}

LLVM IR (-O2):
define void @qd_alloc_initialize() {
ret void
}
void mtd_free_parsed_partitions(struct mtd_partition *parts,
                                unsigned int nparts) {
  return;
}


x86 assembly (clang, -O0):
<mtd_free_parsed_partitions>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mtd_free_parsed_partitions>:
ret

LLVM IR (-O0):
%struct.mtd_partition = type opaque
define void @mtd_free_parsed_partitions(%struct.mtd_partition* %0, i32 %1) {
%3 = alloca %struct.mtd_partition*
%4 = alloca i32
store %struct.mtd_partition* %0, %struct.mtd_partition** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.mtd_partition = type opaque
define void @mtd_free_parsed_partitions(%struct.mtd_partition* nocapture %0, i32 %1) {
ret void
}
void k_centers_approx(double *vects, int M, int N, int K, double *centers) {}


x86 assembly (clang, -O0):
<k_centers_approx>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<k_centers_approx>:
ret

LLVM IR (-O0):
define void @k_centers_approx(double* %0, i32 %1, i32 %2, i32 %3, double* %4) {
%6 = alloca double*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca double*
store double* %0, double** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store double* %4, double** %10
ret void
}

LLVM IR (-O2):
define void @k_centers_approx(double* nocapture %0, i32 %1, i32 %2, i32 %3, double* nocapture %4) {
ret void
}
void asm1() {}


x86 assembly (clang, -O0):
<asm1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<asm1>:
ret

LLVM IR (-O0):
define void @asm1() {
ret void
}

LLVM IR (-O2):
define void @asm1() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ islower(int);
void t_islower_0xb7() {
  Assert_real((islower(183) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              920, ("islower should be 0 for 0xb7"));
}


x86 assembly (clang, -O0):
<t_islower_0xb7>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb7,%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x398,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0xb7>:
push   %rax
mov    $0xb7,%edi
call   1030 <islower@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x398,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xb7\00"
define void @t_islower_0xb7() {
%1 = call i64 @islower(i32 183)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 920, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xb7\00"
define void @t_islower_0xb7() {
%1 = tail call i64 @islower(i32 183)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 920, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void fill_digits(int *digits, int value) {
  int index = 0;
  do {
    digits[index++] = value % 10;
    value /= 10;
  } while (value > 0);
}


x86 assembly (clang, -O0):
<fill_digits>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%ecx
mov    %ecx,%esi
add    $0x1,%esi
mov    %esi,-0x10(%rbp)
movslq %ecx,%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jg     1112 <fill_digits+0x12>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fill_digits>:
movslq %esi,%rax
imul   $0x66666667,%rax,%rsi
mov    %rsi,%rcx
shr    $0x3f,%rcx
sar    $0x22,%rsi
add    %ecx,%esi
lea    (%rsi,%rsi,1),%ecx
lea    (%rcx,%rcx,4),%ecx
mov    %eax,%edx
sub    %ecx,%edx
mov    %edx,(%rdi)
add    $0x4,%rdi
cmp    $0x9,%eax
jg     1100 <fill_digits>
ret

LLVM IR (-O0):
define void @fill_digits(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %16, %2
%7 = load i32, i32* %4
%8 = srem i32 %7, 10
%9 = load i32*, i32** %3
%10 = load i32, i32* %5
%11 = add nsw i32 %10, 1
store i32 %11, i32* %5
%12 = sext i32 %10 to i64
%13 = getelementptr inbounds i32, i32* %9, i64 %12
store i32 %8, i32* %13
%14 = load i32, i32* %4
%15 = sdiv i32 %14, 10
store i32 %15, i32* %4
br label %16
16: ; preds = %6
%17 = load i32, i32* %4
%18 = icmp sgt i32 %17, 0
br i1 %18, label %6, label %19
19: ; preds = %16
ret void
}

LLVM IR (-O2):
define void @fill_digits(i32* nocapture writeonly %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i64 [ %7, %3 ], [ 0, %2 ]
%5 = phi i32 [ %9, %3 ], [ %1, %2 ]
%6 = srem i32 %5, 10
%7 = add nuw i64 %4, 1
%8 = getelementptr inbounds i32, i32* %0, i64 %4
store i32 %6, i32* %8
%9 = sdiv i32 %5, 10
%10 = icmp sgt i32 %5, 9
br i1 %10, label %3, label %11
11: ; preds = %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
osinit(char *banner) { printf("%s\n", banner); }


x86 assembly (clang, -O0):
<osinit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<osinit>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @osinit(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @osinit(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 undef
}
int test_imm_CEint8_reg(signed char val) {
  return ((val) & (0xCE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CEint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xce,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CEint8_reg>:
test   $0xce,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CEint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 206
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_CEint8_reg(i8 signext %0) {
%2 = and i8 %0, -50
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ VirtualizeTimerC__1__TimerFrom__getNow();
int /*<<< orphan*/ VirtualizeTimerC__1__fireTimers(int /*<<< orphan*/);
void VirtualizeTimerC__1__TimerFrom__fired(void) {
  VirtualizeTimerC__1__fireTimers(VirtualizeTimerC__1__TimerFrom__getNow());
}


x86 assembly (clang, -O0):
<VirtualizeTimerC__1__TimerFrom__fired>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <VirtualizeTimerC__1__TimerFrom__getNow@plt>
mov    %eax,%edi
call   1030 <VirtualizeTimerC__1__fireTimers@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<VirtualizeTimerC__1__TimerFrom__fired>:
push   %rax
xor    %eax,%eax
call   1040 <VirtualizeTimerC__1__TimerFrom__getNow@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <VirtualizeTimerC__1__fireTimers@plt>

LLVM IR (-O0):
define void @VirtualizeTimerC__1__TimerFrom__fired() {
%1 = call i32 (...) @VirtualizeTimerC__1__TimerFrom__getNow()
%2 = call i32 @VirtualizeTimerC__1__fireTimers(i32 %1)
ret void
}

LLVM IR (-O2):
define void @VirtualizeTimerC__1__TimerFrom__fired() {
%1 = tail call i32 (...) @VirtualizeTimerC__1__TimerFrom__getNow()
%2 = tail call i32 @VirtualizeTimerC__1__fireTimers(i32 %1)
ret void
}
int digval(int c) {
  int val = -1;
  if ((c >= '0') && (c <= '9')) {
    val = c - '0';
  }
  return val;
}


x86 assembly (clang, -O0):
<digval>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0xffffffff,-0x8(%rbp)
cmpl   $0x30,-0x4(%rbp)
jl     112b <digval+0x2b>
cmpl   $0x39,-0x4(%rbp)
jg     112b <digval+0x2b>
mov    -0x4(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<digval>:
lea    -0x30(%rdi),%ecx
cmp    $0xa,%ecx
mov    $0xffffffff,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @digval(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 -1, i32* %3
%4 = load i32, i32* %2
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp sle i32 %7, 57
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %2
%11 = sub nsw i32 %10, 48
store i32 %11, i32* %3
br label %12
12: ; preds = %9, %6, %1
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @digval(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = select i1 %3, i32 %2, i32 -1
ret i32 %4
}
/* Type definitions */
typedef int int64_t;
typedef int d;

/* Variables and functions */
int64_t blob_htonll(int64_t d) {
  return (((d)&0xff) << (64 - 8 * 1)) | (((d >> 8) & 0xff) << (64 - 8 * 2)) |
         (((d >> 16) & 0xff) << (64 - 8 * 3)) |
         (((d >> 24) & 0xff) << (64 - 8 * 4)) |
         (((d >> 32) & 0xff) << (64 - 8 * 5)) |
         (((d >> 40) & 0xff) << (64 - 8 * 6)) |
         (((d >> 48) & 0xff) << (64 - 8 * 7)) | (((d >> 56) & 0xff));
}


x86 assembly (clang, -O0):
<blob_htonll>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    $0x38,%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
sar    $0x8,%edx
and    $0xff,%edx
mov    $0x30,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%edx
sar    $0x10,%edx
and    $0xff,%edx
mov    $0x28,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%edx
sar    $0x18,%edx
and    $0xff,%edx
mov    $0x20,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%edx
mov    $0x20,%ecx
sar    %cl,%edx
mov    %edx,%ecx
and    $0xff,%ecx
shl    $0x18,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%edx
mov    $0x28,%ecx
sar    %cl,%edx
mov    %edx,%ecx
and    $0xff,%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%edx
mov    $0x30,%ecx
sar    %cl,%edx
mov    %edx,%ecx
and    $0xff,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%edx
mov    $0x38,%ecx
sar    %cl,%edx
mov    %edx,%ecx
and    $0xff,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<blob_htonll>:
ret

LLVM IR (-O0):
define i32 @blob_htonll(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
%5 = shl i32 %4, 56
%6 = load i32, i32* %2
%7 = ashr i32 %6, 8
%8 = and i32 %7, 255
%9 = shl i32 %8, 48
%10 = or i32 %5, %9
%11 = load i32, i32* %2
%12 = ashr i32 %11, 16
%13 = and i32 %12, 255
%14 = shl i32 %13, 40
%15 = or i32 %10, %14
%16 = load i32, i32* %2
%17 = ashr i32 %16, 24
%18 = and i32 %17, 255
%19 = shl i32 %18, 32
%20 = or i32 %15, %19
%21 = load i32, i32* %2
%22 = ashr i32 %21, 32
%23 = and i32 %22, 255
%24 = shl i32 %23, 24
%25 = or i32 %20, %24
%26 = load i32, i32* %2
%27 = ashr i32 %26, 40
%28 = and i32 %27, 255
%29 = shl i32 %28, 16
%30 = or i32 %25, %29
%31 = load i32, i32* %2
%32 = ashr i32 %31, 48
%33 = and i32 %32, 255
%34 = shl i32 %33, 8
%35 = or i32 %30, %34
%36 = load i32, i32* %2
%37 = ashr i32 %36, 56
%38 = and i32 %37, 255
%39 = or i32 %35, %38
ret i32 %39
}

LLVM IR (-O2):
define i32 @blob_htonll(i32 %0) {
ret i32 poison
}