xunge/DecIR huggingface dataset:
/* Variables and functions */
int fibonacci(int);
int fibonacciRecursive(int element) {
  if ((element == 0) || (element == 1)) {
    return element;
  }
  return fibonacci(element - 1) + fibonacci(element - 2);
}


x86 assembly (clang, -O0):
<fibonacciRecursive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112f <fibonacciRecursive+0x1f>
cmpl   $0x1,-0x8(%rbp)
jne    113a <fibonacciRecursive+0x2a>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115d <fibonacciRecursive+0x4d>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fibonacci@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fibonacci@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibonacciRecursive>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
cmp    $0x2,%edi
jb     1132 <fibonacciRecursive+0x22>
lea    -0x1(%rbx),%edi
call   1030 <fibonacci@plt>
mov    %eax,%ebp
add    $0xfffffffe,%ebx
mov    %ebx,%edi
call   1030 <fibonacci@plt>
mov    %eax,%ebx
add    %ebp,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fibonacciRecursive(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %11
9: ; preds = %6, %1
%10 = load i32, i32* %3
store i32 %10, i32* %2
br label %19
11: ; preds = %6
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 1
%14 = call i32 @fibonacci(i32 %13)
%15 = load i32, i32* %3
%16 = sub nsw i32 %15, 2
%17 = call i32 @fibonacci(i32 %16)
%18 = add nsw i32 %14, %17
store i32 %18, i32* %2
br label %19
19: ; preds = %11, %9
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @fibonacciRecursive(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = add nsw i32 %0, -1
%5 = tail call i32 @fibonacci(i32 %4)
%6 = add nsw i32 %0, -2
%7 = tail call i32 @fibonacci(i32 %6)
%8 = add nsw i32 %7, %5
br label %9
9: ; preds = %1, %3
%10 = phi i32 [ %8, %3 ], [ %0, %1 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ SIGTERM;
int /*<<< orphan*/ SIG_IGN;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ signal(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ sleep(int);
int main() {
  signal(SIGTERM, SIG_IGN);
  while (1)
    sleep(20);
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eb2(%rip),%rax
mov    (%rax),%edi
mov    0x2ea1(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
mov    $0x14,%edi
call   1040 <sleep@plt>
jmp    1146 <main+0x26>

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
mov    0x2eaf(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
nopl   0x0(%rax,%rax,1)
mov    $0x14,%edi
call   1040 <sleep@plt>
jmp    1140 <main+0x20>

LLVM IR (-O0):
@SIGTERM = global i32 0
@SIG_IGN = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @SIGTERM
%3 = load i32, i32* @SIG_IGN
%4 = call i32 @signal(i32 %2, i32 %3)
br label %5
5: ; preds = %0, %5
%6 = call i32 @sleep(i32 20)
br label %5
}

LLVM IR (-O2):
@SIGTERM = global i32 0
@SIG_IGN = global i32 0
define i32 @main() {
%1 = load i32, i32* @SIGTERM
%2 = load i32, i32* @SIG_IGN
%3 = tail call i32 @signal(i32 %1, i32 %2)
br label %4
4: ; preds = %0, %4
%5 = tail call i32 @sleep(i32 20)
br label %4
}
/* Variables and functions */
int /*<<< orphan*/ Sound_Play(int, int);
void Tone1() { Sound_Play(659, 250); }


x86 assembly (clang, -O0):
<Tone1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x293,%edi
mov    $0xfa,%esi
call   1030 <Sound_Play@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Tone1>:
mov    $0x293,%edi
mov    $0xfa,%esi
jmp    1030 <Sound_Play@plt>

LLVM IR (-O0):
define void @Tone1() {
%1 = call i32 @Sound_Play(i32 659, i32 250)
ret void
}

LLVM IR (-O2):
define void @Tone1() {
%1 = tail call i32 @Sound_Play(i32 659, i32 250)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ atomic_bool;

/* Variables and functions */
int /*<<< orphan*/ atomic_store(int /*<<< orphan*/ *, int);
void stdatomic_write_bool(atomic_bool *b, bool replacement) {
  atomic_store(b, replacement);
}


x86 assembly (clang, -O0):
<stdatomic_write_bool>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <atomic_store@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stdatomic_write_bool>:
jmp    1030 <atomic_store@plt>

LLVM IR (-O0):
define void @stdatomic_write_bool(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @atomic_store(i32* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @stdatomic_write_bool(i32* %0, i32 %1) {
%3 = tail call i32 @atomic_store(i32* %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memmove(char *, char *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
char *trim_space(char *s) {
  while (*s == ' ')
    memmove(s, s + 1, strlen(s));
  return s;
}


x86 assembly (clang, -O0):
<trim_space>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
jne    116d <trim_space+0x4d>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    %eax,%edx
call   1040 <memmove@plt>
jmp    112c <trim_space+0xc>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trim_space>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
cmpb   $0x20,(%rdi)
jne    114a <trim_space+0x2a>
lea    0x1(%rbx),%r14
mov    %rbx,%rdi
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %eax,%edx
call   1040 <memmove@plt>
cmpb   $0x20,(%rbx)
je     1130 <trim_space+0x10>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @trim_space(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, 32
br i1 %7, label %8, label %15
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8*, i8** %2
%13 = call i32 @strlen(i8* %12)
%14 = call i32 @memmove(i8* %9, i8* %11, i32 %13)
br label %3
15: ; preds = %3
%16 = load i8*, i8** %2
ret i8* %16
}

LLVM IR (-O2):
define i8* @trim_space(i8* returned %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 32
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = getelementptr inbounds i8, i8* %0, i64 1
br label %6
6: ; preds = %4, %6
%7 = tail call i32 @strlen(i8* %0)
%8 = tail call i32 @memmove(i8* %0, i8* %5, i32 %7)
%9 = load i8, i8* %0
%10 = icmp eq i8 %9, 32
br i1 %10, label %6, label %11
11: ; preds = %6, %1
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ LOG_INFO;
int /*<<< orphan*/ syslog(int /*<<< orphan*/, char *, char const *);
void aquacc_log(const char *msg) {
  syslog(LOG_INFO, "%s", msg);
  return;
}


x86 assembly (clang, -O0):
<aquacc_log>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <syslog@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aquacc_log>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <syslog@plt>

LLVM IR (-O0):
@LOG_INFO = global i32 0
@.str = [3 x i8] c"%s\00"
define void @aquacc_log(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @LOG_INFO
%4 = load i8*, i8** %2
%5 = call i32 @syslog(i32 %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@LOG_INFO = global i32 0
@.str = [3 x i8] c"%s\00"
define void @aquacc_log(i8* %0) {
%2 = load i32, i32* @LOG_INFO
%3 = tail call i32 @syslog(i32 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
uint32_t EPINonBlockingReadAvail(uint32_t ui32Base) {
  ASSERT(ui32Base == 0x400D0000);
  return ((*((volatile uint32_t *)(ui32Base + 0x0000006C))));
}


x86 assembly (clang, -O0):
<EPINonBlockingReadAvail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x400d0000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x6c,%eax
cltq
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EPINonBlockingReadAvail>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
cmp    $0x400d0000,%ebx
sete   %dil
call   1030 <ASSERT@plt>
movslq %ebx,%rax
mov    0x6c(%rax),%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @EPINonBlockingReadAvail(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1074593792
%5 = zext i1 %4 to i32
%6 = call i32 @ASSERT(i32 %5)
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 108
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
%11 = load volatile i32, i32* %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @EPINonBlockingReadAvail(i32 %0) {
%2 = icmp eq i32 %0, 1074593792
%3 = zext i1 %2 to i32
%4 = tail call i32 @ASSERT(i32 %3)
%5 = add nsw i32 %0, 108
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
%8 = load volatile i32, i32* %7
ret i32 %8
}
void type_3_data_transfer(void) {}


x86 assembly (clang, -O0):
<type_3_data_transfer>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<type_3_data_transfer>:
ret

LLVM IR (-O0):
define void @type_3_data_transfer() {
ret void
}

LLVM IR (-O2):
define void @type_3_data_transfer() {
ret void
}
void g_io_channel_set_buffer_size() {}


x86 assembly (clang, -O0):
<g_io_channel_set_buffer_size>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_io_channel_set_buffer_size>:
ret

LLVM IR (-O0):
define void @g_io_channel_set_buffer_size() {
ret void
}

LLVM IR (-O2):
define void @g_io_channel_set_buffer_size() {
ret void
}
/* Variables and functions */
char *strstr(char *, char *);
char *header_end(char *buf) { return strstr(buf, "\r\n\r\n"); }


x86 assembly (clang, -O0):
<header_end>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strstr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<header_end>:
lea    0xee9(%rip),%rsi
jmp    1030 <strstr@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"\0D\0A\0D\0A\00"
define i8* @header_end(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @strstr(i8* %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i8* %4
}

LLVM IR (-O2):
@.str = [5 x i8] c"\0D\0A\0D\0A\00"
define i8* @header_end(i8* %0) {
%2 = tail call i8* @strstr(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i8* %2
}
/* Type definitions */
typedef scalar_t__ *n;
typedef size_t i;

/* Variables and functions */
int vec_ele(size_t n, int *a, size_t i, size_t j) {
  return a[((i) * (n) + (j))];
}


x86 assembly (clang, -O0):
<vec_ele>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
imul   -0x8(%rbp),%rcx
add    -0x20(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec_ele>:
imul   %rdx,%rdi
add    %rcx,%rdi
mov    (%rsi,%rdi,4),%eax
ret

LLVM IR (-O0):
define i32 @vec_ele(i64 %0, i32* %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i32*
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i32* %1, i32** %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i32*, i32** %6
%10 = load i64, i64* %7
%11 = load i64, i64* %5
%12 = mul i64 %10, %11
%13 = load i64, i64* %8
%14 = add i64 %12, %13
%15 = getelementptr inbounds i32, i32* %9, i64 %14
%16 = load i32, i32* %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @vec_ele(i64 %0, i32* nocapture %1, i64 %2, i64 %3) {
%5 = mul i64 %2, %0
%6 = add i64 %5, %3
%7 = getelementptr inbounds i32, i32* %1, i64 %6
%8 = load i32, i32* %7
ret i32 %8
}
/* Type definitions */
struct config_ring_buffer {
  int dummy;
};

/* Variables and functions */
int config_ring_buffer_size(struct config_ring_buffer const *);
__attribute__((unused)) bool
config_ring_buffer_full(const struct config_ring_buffer *rb) {
  return config_ring_buffer_size(rb) == (4);
}


x86 assembly (clang, -O0):
<config_ring_buffer_full>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <config_ring_buffer_size@plt>
cmp    $0x4,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_ring_buffer_full>:
push   %rax
call   1030 <config_ring_buffer_size@plt>
xor    %ecx,%ecx
cmp    $0x4,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.config_ring_buffer = type { i32 }
define i32 @config_ring_buffer_full(%struct.config_ring_buffer* %0) {
%2 = alloca %struct.config_ring_buffer*
store %struct.config_ring_buffer* %0, %struct.config_ring_buffer** %2
%3 = load %struct.config_ring_buffer*, %struct.config_ring_buffer** %2
%4 = call i32 @config_ring_buffer_size(%struct.config_ring_buffer* %3)
%5 = icmp eq i32 %4, 4
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
%struct.config_ring_buffer = type { i32 }
define i32 @config_ring_buffer_full(%struct.config_ring_buffer* %0) {
%2 = tail call i32 @config_ring_buffer_size(%struct.config_ring_buffer* %0)
%3 = icmp eq i32 %2, 4
%4 = zext i1 %3 to i32
ret i32 %4
}
void tst() {}


x86 assembly (clang, -O0):
<tst>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tst>:
ret

LLVM IR (-O0):
define void @tst() {
ret void
}

LLVM IR (-O2):
define void @tst() {
ret void
}
/* Variables and functions */
double d_prod(float *, float *);
double intr_wrap_175(float p1, float p2) { return d_prod(&p1, &p2); }


x86 assembly (clang, -O0):
<intr_wrap_175>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
call   1030 <d_prod@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intr_wrap_175>:
push   %rax
movss  %xmm0,0x4(%rsp)
movss  %xmm1,(%rsp)
lea    0x4(%rsp),%rdi
mov    %rsp,%rsi
call   1030 <d_prod@plt>
pop    %rax
ret

LLVM IR (-O0):
define double @intr_wrap_175(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = call double @d_prod(float* %3, float* %4)
ret double %5
}

LLVM IR (-O2):
define double @intr_wrap_175(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = call double @d_prod(float* %3, float* %4)
ret double %5
}
int test_imm_73int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0x73 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_73int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0x73,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_73int64_midword_mem>:
testb  $0x73,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_73int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 115
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_73int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 7536640
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
unsigned __bump_up(unsigned n) {
  unsigned base = 1;
  --n;
  while (base < sizeof n * 8) {
    n |= n >> base;
    base *= 2;
  }
  ++n;
  n += (n == 0);
  return n;
}


x86 assembly (clang, -O0):
<__bump_up>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
cmp    $0x20,%rax
jae    1140 <__bump_up+0x40>
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1117 <__bump_up+0x17>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__bump_up>:
lea    -0x1(%rdi),%eax
mov    %eax,%ecx
shr    %ecx
or     %eax,%ecx
mov    %ecx,%eax
shr    $0x2,%eax
or     %ecx,%eax
mov    %eax,%ecx
shr    $0x4,%ecx
or     %eax,%ecx
mov    %ecx,%edx
shr    $0x8,%edx
or     %ecx,%edx
mov    %edx,%eax
shr    $0x10,%eax
or     %edx,%eax
add    $0x1,%eax
adc    $0x0,%eax
ret

LLVM IR (-O0):
define i32 @__bump_up(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
%4 = load i32, i32* %2
%5 = add i32 %4, -1
store i32 %5, i32* %2
br label %6
6: ; preds = %10, %1
%7 = load i32, i32* %3
%8 = zext i32 %7 to i64
%9 = icmp ult i64 %8, 32
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load i32, i32* %2
%12 = load i32, i32* %3
%13 = lshr i32 %11, %12
%14 = load i32, i32* %2
%15 = or i32 %14, %13
store i32 %15, i32* %2
%16 = load i32, i32* %3
%17 = mul i32 %16, 2
store i32 %17, i32* %3
br label %6
18: ; preds = %6
%19 = load i32, i32* %2
%20 = add i32 %19, 1
store i32 %20, i32* %2
%21 = load i32, i32* %2
%22 = icmp eq i32 %21, 0
%23 = zext i1 %22 to i32
%24 = load i32, i32* %2
%25 = add i32 %24, %23
store i32 %25, i32* %2
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @__bump_up(i32 %0) {
%2 = add i32 %0, -1
%3 = lshr i32 %2, 1
%4 = or i32 %3, %2
%5 = lshr i32 %4, 2
%6 = or i32 %5, %4
%7 = lshr i32 %6, 4
%8 = or i32 %7, %6
%9 = lshr i32 %8, 8
%10 = or i32 %9, %8
%11 = lshr i32 %10, 16
%12 = or i32 %11, %10
%13 = add i32 %12, 1
%14 = icmp eq i32 %13, 0
%15 = zext i1 %14 to i32
%16 = add i32 %13, %15
ret i32 %16
}
/* Variables and functions */
int /*<<< orphan*/ hid_check_request();
void usbcb_check_other_req() { hid_check_request(); }


x86 assembly (clang, -O0):
<usbcb_check_other_req>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <hid_check_request@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usbcb_check_other_req>:
xor    %eax,%eax
jmp    1030 <hid_check_request@plt>

LLVM IR (-O0):
define void @usbcb_check_other_req() {
%1 = call i32 (...) @hid_check_request()
ret void
}

LLVM IR (-O2):
define void @usbcb_check_other_req() {
%1 = tail call i32 (...) @hid_check_request()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ minmaxsqr_par(double *, size_t, double *, double *);
double middlesqr_par(double *data, size_t length) {
  double min, max;
  minmaxsqr_par(data, length, &min, &max);
  return (min + max) / 2.0;
}


x86 assembly (clang, -O0):
<middlesqr_par>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdx
lea    -0x20(%rbp),%rcx
call   1030 <minmaxsqr_par@plt>
movsd  -0x18(%rbp),%xmm0
addsd  -0x20(%rbp),%xmm0
movsd  0xeb9(%rip),%xmm1
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<middlesqr_par>:
sub    $0x18,%rsp
lea    0x10(%rsp),%rdx
lea    0x8(%rsp),%rcx
call   1030 <minmaxsqr_par@plt>
movsd  0x10(%rsp),%xmm0
addsd  0x8(%rsp),%xmm0
mulsd  0xec9(%rip),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @middlesqr_par(double* %0, i64 %1) {
%3 = alloca double*
%4 = alloca i64
%5 = alloca double
%6 = alloca double
store double* %0, double** %3
store i64 %1, i64* %4
%7 = load double*, double** %3
%8 = load i64, i64* %4
%9 = call i32 @minmaxsqr_par(double* %7, i64 %8, double* %5, double* %6)
%10 = load double, double* %5
%11 = load double, double* %6
%12 = fadd double %10, %11
%13 = fdiv double %12, 2.000000e+00
ret double %13
}

LLVM IR (-O2):
define double @middlesqr_par(double* %0, i64 %1) {
%3 = alloca double
%4 = alloca double
%5 = bitcast double* %3 to i8*
%6 = bitcast double* %4 to i8*
%7 = call i32 @minmaxsqr_par(double* %0, i64 %1, double* %3, double* %4)
%8 = load double, double* %3
%9 = load double, double* %4
%10 = fadd double %8, %9
%11 = fmul double %10, 5.000000e-01
ret double %11
}
/* Variables and functions */
int main(int argc, char **argv) {
  size_t size = 16;
  char p[size];
  p[16] = 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x10,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
mov    %rsp,%rax
mov    %rax,-0x20(%rbp)
mov    %rcx,%rdx
add    $0xf,%rdx
and    $0xfffffffffffffff0,%rdx
mov    %rsp,%rax
sub    %rdx,%rax
mov    %rax,%rsp
mov    %rcx,-0x28(%rbp)
movb   $0x0,0x10(%rax)
mov    -0x20(%rbp),%rax
mov    %rax,%rsp
xor    %eax,%eax
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i64
%6 = alloca i8*
%7 = alloca i64
store i32 %0, i32* %3
store i8** %1, i8*** %4
store i64 16, i64* %5
%8 = load i64, i64* %5
%9 = call i8* @llvm.stacksave()
store i8* %9, i8** %6
%10 = alloca i8, i64 %8
store i64 %8, i64* %7
%11 = getelementptr inbounds i8, i8* %10, i64 16
store i8 0, i8* %11
%12 = load i8*, i8** %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t byte_clamp_other(int v) { return v < 0 ? 0 : (v > 255 ? 255 : v); }


x86 assembly (clang, -O0):
<byte_clamp_other>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    111b <byte_clamp_other+0x1b>
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    1141 <byte_clamp_other+0x41>
cmpl   $0xff,-0x4(%rbp)
jle    1135 <byte_clamp_other+0x35>
mov    $0xff,%eax
mov    %eax,-0xc(%rbp)
jmp    113b <byte_clamp_other+0x3b>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<byte_clamp_other>:
cmp    $0xff,%edi
mov    $0xff,%ecx
cmovl  %edi,%ecx
xor    %eax,%eax
test   %ecx,%ecx
cmovns %ecx,%eax
ret

LLVM IR (-O0):
define i32 @byte_clamp_other(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %14
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp sgt i32 %7, 255
br i1 %8, label %9, label %10
9: ; preds = %6
br label %12
10: ; preds = %6
%11 = load i32, i32* %2
br label %12
12: ; preds = %10, %9
%13 = phi i32 [ 255, %9 ], [ %11, %10 ]
br label %14
14: ; preds = %12, %5
%15 = phi i32 [ 0, %5 ], [ %13, %12 ]
ret i32 %15
}

LLVM IR (-O2):
define i32 @byte_clamp_other(i32 %0) {
%2 = icmp slt i32 %0, 255
%3 = select i1 %2, i32 %0, i32 255
%4 = icmp sgt i32 %3, 0
%5 = select i1 %4, i32 %3, i32 0
ret i32 %5
}
double csft(double x) {
  if (x < 0.0) {
    return (x + 1.0);
  } else if (x >= 1.0) {
    return (x - 1.0);
  } else {
    return (x);
  }
}


x86 assembly (clang, -O0):
<csft>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    112e <csft+0x2e>
movsd  0xee1(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    116a <csft+0x6a>
movsd  -0x10(%rbp),%xmm0
movsd  0xec5(%rip),%xmm1
ucomisd %xmm1,%xmm0
jb     1160 <csft+0x60>
movsd  -0x10(%rbp),%xmm0
movsd  0xeae(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    116a <csft+0x6a>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<csft>:
xorpd  %xmm1,%xmm1
ucomisd %xmm0,%xmm1
jbe    1113 <csft+0x13>
addsd  0xeee(%rip),%xmm0
ret
ucomisd 0xee5(%rip),%xmm0
jb     1125 <csft+0x25>
addsd  0xee3(%rip),%xmm0
ret

LLVM IR (-O0):
define double @csft(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp olt double %4, 0.000000e+00
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load double, double* %3
%8 = fadd double %7, 1.000000e+00
store double %8, double* %2
br label %17
9: ; preds = %1
%10 = load double, double* %3
%11 = fcmp oge double %10, 1.000000e+00
br i1 %11, label %12, label %15
12: ; preds = %9
%13 = load double, double* %3
%14 = fsub double %13, 1.000000e+00
store double %14, double* %2
br label %17
15: ; preds = %9
%16 = load double, double* %3
store double %16, double* %2
br label %17
17: ; preds = %15, %12, %6
%18 = load double, double* %2
ret double %18
}

LLVM IR (-O2):
define double @csft(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = fadd double %0, 1.000000e+00
br label %9
5: ; preds = %1
%6 = fcmp ult double %0, 1.000000e+00
br i1 %6, label %9, label %7
7: ; preds = %5
%8 = fadd double %0, -1.000000e+00
br label %9
9: ; preds = %5, %7, %3
%10 = phi double [ %4, %3 ], [ %8, %7 ], [ %0, %5 ]
ret double %10
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
unsigned msr_get_bit(uint64_t val, int bit) {
  return ((val & (1 << bit)) != 0);
}


x86 assembly (clang, -O0):
<msr_get_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<msr_get_bit>:
mov    %esi,%ecx
mov    %edi,%eax
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @msr_get_bit(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 1, %6
%8 = and i32 %5, %7
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @msr_get_bit(i32 %0, i32 %1) {
%3 = lshr i32 %0, %1
%4 = and i32 %3, 1
ret i32 %4
}
int test_imm_65uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0x65 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_65uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x65,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_65uint64_lowword_mem>:
testb  $0x65,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_65uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 101
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_65uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 101
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ genkat();
int main() {
  genkat();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <genkat@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <genkat@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @genkat()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @genkat()
ret i32 0
}
int func2() {
  int i = 0;
  i += 20;
  return i;
}


x86 assembly (clang, -O0):
<func2>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x14,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func2>:
mov    $0x14,%eax
ret

LLVM IR (-O0):
define i32 @func2() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
%3 = add nsw i32 %2, 20
store i32 %3, i32* %1
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @func2() {
ret i32 20
}
/* Type definitions */
typedef int /*<<< orphan*/ XModifierKeymap;

/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ malloc(int);
void *alloc_XModifierKeymap(void) {
  XModifierKeymap *_p = (XModifierKeymap *)malloc(sizeof(XModifierKeymap));
  if (_p == NULL)
    abort();
  return (void *)_p;
}


x86 assembly (clang, -O0):
<alloc_XModifierKeymap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1148 <alloc_XModifierKeymap+0x28>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_XModifierKeymap>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
test   %rax,%rax
je     1132 <alloc_XModifierKeymap+0x12>
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i8* @alloc_XModifierKeymap() {
%1 = alloca i32*
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32* %3, i32** %1
%4 = load i32*, i32** %1
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 (...) @abort()
unreachable
8: ; preds = %0
%9 = load i32*, i32** %1
%10 = bitcast i32* %9 to i8*
ret i8* %10
}

LLVM IR (-O2):
define i8* @alloc_XModifierKeymap() {
%1 = tail call i64 @malloc(i32 4)
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = inttoptr i64 %1 to i8*
ret i8* %6
}
/* Variables and functions */
int memReadPeak();
double memUsed();
double memUsedPeak() {
  double peak = memReadPeak() * 1024;
  return peak == 0 ? memUsed() : peak;
}


x86 assembly (clang, -O0):
<memUsedPeak>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <memReadPeak@plt>
shl    $0xa,%eax
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    1164 <memUsedPeak+0x44>
jp     1164 <memUsedPeak+0x44>
mov    $0x0,%al
call   1030 <memUsed@plt>
movsd  %xmm0,-0x10(%rbp)
jmp    116e <memUsedPeak+0x4e>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memUsedPeak>:
push   %rax
xor    %eax,%eax
call   1040 <memReadPeak@plt>
test   %eax,%eax
je     1135 <memUsedPeak+0x15>
shl    $0xa,%eax
cvtsi2sd %eax,%xmm0
pop    %rax
ret
xor    %eax,%eax
pop    %rcx
jmp    1030 <memUsed@plt>

LLVM IR (-O0):
define double @memUsedPeak() {
%1 = alloca double
%2 = call i32 (...) @memReadPeak()
%3 = mul nsw i32 %2, 1024
%4 = sitofp i32 %3 to double
store double %4, double* %1
%5 = load double, double* %1
%6 = fcmp oeq double %5, 0.000000e+00
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call double (...) @memUsed()
br label %11
9: ; preds = %0
%10 = load double, double* %1
br label %11
11: ; preds = %9, %7
%12 = phi double [ %8, %7 ], [ %10, %9 ]
ret double %12
}

LLVM IR (-O2):
define double @memUsedPeak() {
%1 = tail call i32 (...) @memReadPeak()
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call double (...) @memUsed()
br label %8
5: ; preds = %0
%6 = shl nsw i32 %1, 10
%7 = sitofp i32 %6 to double
br label %8
8: ; preds = %5, %3
%9 = phi double [ %4, %3 ], [ %7, %5 ]
ret double %9
}
long CG_im17(i)
long i;
{
  return (((i & 0x10000) >> 16) | ((i & 0x0f800) << 5) | ((i & 0x00400) >> 8) |
          ((i & 0x003ff) << 3));
}


x86 assembly (clang, -O0):
<CG_im17>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x10000,%rax
sar    $0x10,%rax
mov    -0x8(%rbp),%rcx
and    $0xf800,%rcx
shl    $0x5,%rcx
or     %rcx,%rax
mov    -0x8(%rbp),%rcx
and    $0x400,%rcx
sar    $0x8,%rcx
or     %rcx,%rax
mov    -0x8(%rbp),%rcx
and    $0x3ff,%rcx
shl    $0x3,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_im17>:
mov    %edi,%eax
shr    $0x10,%eax
and    $0x1,%eax
mov    %edi,%ecx
shl    $0x5,%ecx
and    $0x1f0000,%ecx
or     %rax,%rcx
mov    %rdi,%rax
shr    $0x8,%rax
and    $0x4,%eax
or     %rcx,%rax
and    $0x3ff,%edi
lea    (%rax,%rdi,8),%rax
ret

LLVM IR (-O0):
define i64 @CG_im17(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 65536
%5 = ashr i64 %4, 16
%6 = load i64, i64* %2
%7 = and i64 %6, 63488
%8 = shl i64 %7, 5
%9 = or i64 %5, %8
%10 = load i64, i64* %2
%11 = and i64 %10, 1024
%12 = ashr i64 %11, 8
%13 = or i64 %9, %12
%14 = load i64, i64* %2
%15 = and i64 %14, 1023
%16 = shl i64 %15, 3
%17 = or i64 %13, %16
ret i64 %17
}

LLVM IR (-O2):
define i64 @CG_im17(i64 %0) {
%2 = lshr i64 %0, 16
%3 = and i64 %2, 1
%4 = shl i64 %0, 5
%5 = and i64 %4, 2031616
%6 = or i64 %3, %5
%7 = lshr i64 %0, 8
%8 = and i64 %7, 4
%9 = or i64 %6, %8
%10 = shl i64 %0, 3
%11 = and i64 %10, 8184
%12 = or i64 %9, %11
ret i64 %12
}
int spal(dummy)
int dummy;
{
  return 0;
  dummy = dummy;
}


x86 assembly (clang, -O0):
<spal>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spal>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @spal(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @spal(i32 %0) {
ret i32 0
}
void call_func(void) {}


x86 assembly (clang, -O0):
<call_func>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_func>:
ret

LLVM IR (-O0):
define void @call_func() {
ret void
}

LLVM IR (-O2):
define void @call_func() {
ret void
}
/* Type definitions */
typedef char uint8_t;

/* Variables and functions */
int /*<<< orphan*/ append_char(char);
void putc_wrap(uint8_t c, int wrap, int *len) {
  if (wrap && *len >= wrap) {
    append_char('\n');
    *len = 0;
  }
  append_char(c);
  (*len)++;
}


x86 assembly (clang, -O0):
<putc_wrap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1152 <putc_wrap+0x42>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
cmp    -0x8(%rbp),%eax
jl     1152 <putc_wrap+0x42>
mov    $0xa,%edi
call   1030 <append_char@plt>
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
movsbl -0x1(%rbp),%edi
call   1030 <append_char@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putc_wrap>:
push   %rbp
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %edi,%ebp
test   %esi,%esi
je     1130 <putc_wrap+0x20>
cmp    %esi,(%rbx)
jl     1130 <putc_wrap+0x20>
mov    $0xa,%edi
call   1030 <append_char@plt>
movl   $0x0,(%rbx)
movsbl %bpl,%edi
call   1030 <append_char@plt>
addl   $0x1,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @putc_wrap(i8 signext %0, i32 %1, i32* %2) {
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32*
store i8 %0, i8* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32, i32* %5
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %3
%10 = load i32*, i32** %6
%11 = load i32, i32* %10
%12 = load i32, i32* %5
%13 = icmp sge i32 %11, %12
br i1 %13, label %14, label %17
14: ; preds = %9
%15 = call i32 @append_char(i8 signext 10)
%16 = load i32*, i32** %6
store i32 0, i32* %16
br label %17
17: ; preds = %14, %9, %3
%18 = load i8, i8* %4
%19 = call i32 @append_char(i8 signext %18)
%20 = load i32*, i32** %6
%21 = load i32, i32* %20
%22 = add nsw i32 %21, 1
store i32 %22, i32* %20
ret void
}

LLVM IR (-O2):
define void @putc_wrap(i8 signext %0, i32 %1, i32* nocapture %2) {
%4 = icmp eq i32 %1, 0
br i1 %4, label %10, label %5
5: ; preds = %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, %1
br i1 %7, label %10, label %8
8: ; preds = %5
%9 = tail call i32 @append_char(i8 signext 10)
store i32 0, i32* %2
br label %10
10: ; preds = %8, %5, %3
%11 = tail call i32 @append_char(i8 signext %0)
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 1
store i32 %13, i32* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ACTUALLY_FREEING_PAGES(size_t);
int /*<<< orphan*/ LOGICALLY_FREEING_PAGES(size_t);
int /*<<< orphan*/ free(void *);
void free_pages(void *p, size_t len) {
  ACTUALLY_FREEING_PAGES(len);
  LOGICALLY_FREEING_PAGES(len);
  free(p);
}


x86 assembly (clang, -O0):
<free_pages>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <ACTUALLY_FREEING_PAGES@plt>
mov    -0x10(%rbp),%rdi
call   1050 <LOGICALLY_FREEING_PAGES@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_pages>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <ACTUALLY_FREEING_PAGES@plt>
mov    %rbx,%rdi
call   1050 <LOGICALLY_FREEING_PAGES@plt>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_pages(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = call i32 @ACTUALLY_FREEING_PAGES(i64 %5)
%7 = load i64, i64* %4
%8 = call i32 @LOGICALLY_FREEING_PAGES(i64 %7)
%9 = load i8*, i8** %3
%10 = call i32 @free(i8* %9)
ret void
}

LLVM IR (-O2):
define void @free_pages(i8* nocapture %0, i64 %1) {
%3 = tail call i32 @ACTUALLY_FREEING_PAGES(i64 %1)
%4 = tail call i32 @LOGICALLY_FREEING_PAGES(i64 %1)
%5 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
unsigned int floor(float);
unsigned int arrotondamento(float x) { return floor(x + .5); }


x86 assembly (clang, -O0):
<arrotondamento>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xed2(%rip),%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
call   1030 <floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arrotondamento>:
addss  0xee8(%rip),%xmm0
jmp    1030 <floor@plt>

LLVM IR (-O0):
define i32 @arrotondamento(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fadd double %4, 5.000000e-01
%6 = fptrunc double %5 to float
%7 = call i32 @floor(float %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @arrotondamento(float %0) {
%2 = fadd float %0, 5.000000e-01
%3 = tail call i32 @floor(float %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ dwt_write16bitoffsetreg(int, int, int);
void dwt_setfinegraintxseq(int enable) {
  if (enable) {
    dwt_write16bitoffsetreg(0x36, 0x26, 0x0B74);
  } else {
    dwt_write16bitoffsetreg(0x36, 0x26, 0x0);
  }
}


x86 assembly (clang, -O0):
<dwt_setfinegraintxseq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     113e <dwt_setfinegraintxseq+0x2e>
mov    $0x36,%edi
mov    $0x26,%esi
mov    $0xb74,%edx
call   1030 <dwt_write16bitoffsetreg@plt>
jmp    114f <dwt_setfinegraintxseq+0x3f>
mov    $0x36,%edi
mov    $0x26,%esi
xor    %edx,%edx
call   1030 <dwt_write16bitoffsetreg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dwt_setfinegraintxseq>:
test   %edi,%edi
mov    $0xb74,%edx
cmove  %edi,%edx
mov    $0x36,%edi
mov    $0x26,%esi
jmp    1030 <dwt_write16bitoffsetreg@plt>

LLVM IR (-O0):
define void @dwt_setfinegraintxseq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @dwt_write16bitoffsetreg(i32 54, i32 38, i32 2932)
br label %9
7: ; preds = %1
%8 = call i32 @dwt_write16bitoffsetreg(i32 54, i32 38, i32 0)
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @dwt_setfinegraintxseq(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i32 0, i32 2932
%4 = tail call i32 @dwt_write16bitoffsetreg(i32 54, i32 38, i32 %3)
ret void
}
float Square(float a) { return a * a; }


x86 assembly (clang, -O0):
<Square>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Square>:
mulss  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @Square(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fmul float %3, %4
ret float %5
}

LLVM IR (-O2):
define float @Square(float %0) {
%2 = fmul float %0, %0
ret float %2
}
/* Variables and functions */
scalar_t__ PushChoice();
int /*<<< orphan*/ bla();
int /*<<< orphan*/ boeh();
main() {
  if (PushChoice() == 0) {
    bla();
  } else {
    boeh();
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <PushChoice@plt>
cmp    $0x0,%rax
jne    115c <main+0x2c>
mov    $0x0,%al
call   1040 <bla@plt>
jmp    1163 <main+0x33>
mov    $0x0,%al
call   1030 <boeh@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <PushChoice@plt>
test   %rax,%rax
je     1146 <main+0x16>
xor    %eax,%eax
call   1030 <boeh@plt>
jmp    114d <main+0x1d>
xor    %eax,%eax
call   1040 <bla@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 (...) @PushChoice()
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @bla()
br label %8
6: ; preds = %0
%7 = call i32 (...) @boeh()
br label %8
8: ; preds = %6, %4
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 (...) @PushChoice()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @bla()
br label %7
5: ; preds = %0
%6 = tail call i32 (...) @boeh()
br label %7
7: ; preds = %5, %3
ret i32 0
}
int do_233() { return 233; }


x86 assembly (clang, -O0):
<do_233>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe9,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_233>:
mov    $0xe9,%eax
ret

LLVM IR (-O0):
define i32 @do_233() {
ret i32 233
}

LLVM IR (-O2):
define i32 @do_233() {
ret i32 233
}
void func12(int *ptr1, int *ptr2) {
  if (ptr1 || !ptr1) {
    *ptr1 = 100;
    *ptr2 = 200;
    return;
  } else {
    *ptr1 = 300;
    *ptr2 = 400;
  }
  *ptr1 = 500;
  *ptr2 = 600;
}


x86 assembly (clang, -O0):
<func12>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1122 <func12+0x22>
cmpq   $0x0,-0x8(%rbp)
jne    113b <func12+0x3b>
mov    -0x8(%rbp),%rax
movl   $0x64,(%rax)
mov    -0x10(%rbp),%rax
movl   $0xc8,(%rax)
jmp    1163 <func12+0x63>
mov    -0x8(%rbp),%rax
movl   $0x12c,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x190,(%rax)
mov    -0x8(%rbp),%rax
movl   $0x1f4,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x258,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<func12>:
movl   $0x64,(%rdi)
movl   $0xc8,(%rsi)
ret

LLVM IR (-O0):
define void @func12(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = icmp ne i32* %5, null
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32*, i32** %3
%9 = icmp ne i32* %8, null
br i1 %9, label %13, label %10
10: ; preds = %7, %2
%11 = load i32*, i32** %3
store i32 100, i32* %11
%12 = load i32*, i32** %4
store i32 200, i32* %12
br label %19
13: ; preds = %7
%14 = load i32*, i32** %3
store i32 300, i32* %14
%15 = load i32*, i32** %4
store i32 400, i32* %15
br label %16
16: ; preds = %13
%17 = load i32*, i32** %3
store i32 500, i32* %17
%18 = load i32*, i32** %4
store i32 600, i32* %18
br label %19
19: ; preds = %16, %10
ret void
}

LLVM IR (-O2):
define void @func12(i32* nocapture writeonly %0, i32* nocapture writeonly %1) {
store i32 100, i32* %0
store i32 200, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sfree(void *);
void tnode_const_hookfree(void *hook) {
  sfree(hook);
  return;
}


x86 assembly (clang, -O0):
<tnode_const_hookfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <sfree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tnode_const_hookfree>:
jmp    1030 <sfree@plt>

LLVM IR (-O0):
define void @tnode_const_hookfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @sfree(i8* %3)
ret void
}

LLVM IR (-O2):
define void @tnode_const_hookfree(i8* %0) {
%2 = tail call i32 @sfree(i8* %0)
ret void
}
unsigned int test_4(unsigned int x, unsigned int y) { return x | (1 << y); }


x86 assembly (clang, -O0):
<test_4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_4>:
mov    %edi,%eax
bts    %esi,%eax
ret

LLVM IR (-O0):
define i32 @test_4(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 1, %6
%8 = or i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_4(i32 %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = or i32 %3, %0
ret i32 %4
}
unsigned int SDBMHash(char *str) {
  unsigned int hash = 0;
  while (*str) {
    hash = (*str++) + (hash << 6) + (hash << 16) - hash;
  }
  return (hash & 0x7FFFFFFF) % 101;
}


x86 assembly (clang, -O0):
<SDBMHash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1149 <SDBMHash+0x49>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
mov    -0xc(%rbp),%ecx
shl    $0x6,%ecx
add    %ecx,%eax
mov    -0xc(%rbp),%ecx
shl    $0x10,%ecx
add    %ecx,%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    110f <SDBMHash+0xf>
mov    -0xc(%rbp),%eax
and    $0x7fffffff,%eax
mov    $0x65,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SDBMHash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1147 <SDBMHash+0x47>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
movsbl %cl,%ecx
imul   $0x1003f,%eax,%eax
add    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <SDBMHash+0x10>
and    $0x7fffffff,%eax
imul   $0x446f8657,%rax,%rcx
shr    $0x20,%rcx
mov    %eax,%edx
sub    %ecx,%edx
shr    %edx
add    %ecx,%edx
shr    $0x6,%edx
imul   $0x65,%edx,%ecx
sub    %ecx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @SDBMHash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %21
8: ; preds = %4
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
%11 = load i8, i8* %9
%12 = sext i8 %11 to i32
%13 = load i32, i32* %3
%14 = shl i32 %13, 6
%15 = add i32 %12, %14
%16 = load i32, i32* %3
%17 = shl i32 %16, 16
%18 = add i32 %15, %17
%19 = load i32, i32* %3
%20 = sub i32 %18, %19
store i32 %20, i32* %3
br label %4
21: ; preds = %4
%22 = load i32, i32* %3
%23 = and i32 %22, 2147483647
%24 = urem i32 %23, 101
ret i32 %24
}

LLVM IR (-O2):
define i32 @SDBMHash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %17, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 0, %1 ]
%7 = phi i8* [ %8, %4 ], [ %0, %1 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = sext i8 %5 to i32
%10 = mul i32 %6, 65599
%11 = add i32 %10, %9
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4
%15 = and i32 %11, 2147483647
%16 = urem i32 %15, 101
br label %17
17: ; preds = %14, %1
%18 = phi i32 [ 0, %1 ], [ %16, %14 ]
ret i32 %18
}