xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ call_module(char *);
int /*<<< orphan*/ outrigger_module(char *, float);
int /*<<< orphan*/ sprintf(char *, char *, int /*<<< orphan*/);
void outrigger(float length) {
  static int outrignum = 0;
  char outrig[30];
  sprintf(outrig, "outrig_%d", outrignum++);
  outrigger_module(outrig, length);
  call_module(outrig);
}


x86 assembly (clang, -O0):
<outrigger>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movss  %xmm0,-0x4(%rbp)
lea    -0x30(%rbp),%rdi
mov    0x2ef5(%rip),%edx
mov    %edx,%eax
add    $0x1,%eax
mov    %eax,0x2eea(%rip)
lea    0xea7(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x30(%rbp),%rdi
movss  -0x4(%rbp),%xmm0
call   1050 <outrigger_module@plt>
lea    -0x30(%rbp),%rdi
call   1030 <call_module@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outrigger>:
push   %rbx
sub    $0x30,%rsp
movss  %xmm0,0xc(%rsp)
mov    0x2efb(%rip),%edx
lea    0x1(%rdx),%eax
mov    %eax,0x2ef2(%rip)
lea    0xeaf(%rip),%rsi
lea    0x10(%rsp),%rbx
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
movss  0xc(%rsp),%xmm0
call   1050 <outrigger_module@plt>
mov    %rbx,%rdi
call   1030 <call_module@plt>
add    $0x30,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@outrigger.outrignum = internal global i32 0
@.str = [10 x i8] c"outrig_%d\00"
define void @outrigger(float %0) {
%2 = alloca float
%3 = alloca [30 x i8]
store float %0, float* %2
%4 = getelementptr inbounds [30 x i8], [30 x i8]* %3, i64 0, i64 0
%5 = load i32, i32* @outrigger.outrignum
%6 = add nsw i32 %5, 1
store i32 %6, i32* @outrigger.outrignum
%7 = call i32 @sprintf(i8* %4, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %5)
%8 = getelementptr inbounds [30 x i8], [30 x i8]* %3, i64 0, i64 0
%9 = load float, float* %2
%10 = call i32 @outrigger_module(i8* %8, float %9)
%11 = getelementptr inbounds [30 x i8], [30 x i8]* %3, i64 0, i64 0
%12 = call i32 @call_module(i8* %11)
ret void
}

LLVM IR (-O2):
@outrigger.outrignum = internal unnamed_addr global i32 0
@.str = [10 x i8] c"outrig_%d\00"
define void @outrigger(float %0) {
%2 = alloca [30 x i8]
%3 = getelementptr inbounds [30 x i8], [30 x i8]* %2, i64 0, i64 0
%4 = load i32, i32* @outrigger.outrignum
%5 = add nsw i32 %4, 1
store i32 %5, i32* @outrigger.outrignum
%6 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %4)
%7 = call i32 @outrigger_module(i8* %3, float %0)
%8 = call i32 @call_module(i8* %3)
ret void
}
/* Variables and functions */
double fabsf(float);
int aspectRatioMatch(float aspectRatio1, float aspectRatio2) {
  if (fabsf(aspectRatio2 - aspectRatio1) <= (0.01))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<aspectRatioMatch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
subss  -0x8(%rbp),%xmm0
call   1030 <fabsf@plt>
movaps %xmm0,%xmm1
movsd  0xec4(%rip),%xmm0
ucomisd %xmm1,%xmm0
jb     1152 <aspectRatioMatch+0x42>
movl   $0x1,-0x4(%rbp)
jmp    1159 <aspectRatioMatch+0x49>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aspectRatioMatch>:
push   %rax
subss  %xmm0,%xmm1
movaps %xmm1,%xmm0
call   1030 <fabsf@plt>
movsd  0xedb(%rip),%xmm1
xor    %eax,%eax
ucomisd %xmm0,%xmm1
setae  %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @aspectRatioMatch(float %0, float %1) {
%3 = alloca i32
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %5
%7 = load float, float* %4
%8 = fsub float %6, %7
%9 = call double @fabsf(float %8)
%10 = fcmp ole double %9, 1.000000e-02
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 1, i32* %3
br label %13
12: ; preds = %2
store i32 0, i32* %3
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @aspectRatioMatch(float %0, float %1) {
%3 = fsub float %1, %0
%4 = tail call double @fabsf(float %3)
%5 = fcmp ole double %4, 1.000000e-02
%6 = zext i1 %5 to i32
ret i32 %6
}
long long f2(long long x) { return x < 0 ? x : -x; }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jge    1120 <f2+0x20>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    112a <f2+0x2a>
xor    %eax,%eax
sub    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
mov    %rdi,%rax
neg    %rax
cmovns %rdi,%rax
ret

LLVM IR (-O0):
define i64 @f2(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp slt i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i64, i64* %2
br label %10
7: ; preds = %1
%8 = load i64, i64* %2
%9 = sub nsw i64 0, %8
br label %10
10: ; preds = %7, %5
%11 = phi i64 [ %6, %5 ], [ %9, %7 ]
ret i64 %11
}

LLVM IR (-O2):
define i64 @f2(i64 %0) {
%2 = tail call i64 @llvm.abs.i64(i64 %0, i1 false)
%3 = sub i64 0, %2
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *, char *, int);
int fso(int a) {
  printf("%s: %s %s This is a shared functio - 3asd - %f\n",
         "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
         "2022-01-22/02-19-57/repos/jarogames/gregory/refs/heads/master/"
         "concepts/cpp/Funq.c",
         "Mar 15 2022", "16:29:08", a * 1.0);
  return 16;
}


x86 assembly (clang, -O0):
<fso>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
movsd  0xed8(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%r8d
lea    0xed0(%rip),%rdi
lea    0xef9(%rip),%rsi
lea    0xf84(%rip),%rdx
lea    0xf89(%rip),%rcx
call   1030 <printf@plt>
mov    $0x10,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fso>:
push   %rax
mov    %edi,%r8d
lea    0xee5(%rip),%rdi
lea    0xf0e(%rip),%rsi
lea    0xf99(%rip),%rdx
lea    0xf9e(%rip),%rcx
call   1030 <printf@plt>
mov    $0x10,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [48 x i8] c"%s: %s %s This is a shared functio - 3asd - %f\0A\00"
@.str.1 = [146 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/jarogames/gregory/refs/heads/master/concepts/cpp/Funq.c\00"
@.str.2 = [12 x i8] c"Mar 15 2022\00"
@.str.3 = [9 x i8] c"16:29:08\00"
define i32 @fso(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sitofp i32 %3 to double
%5 = fmul double %4, 1.000000e+00
%6 = fptosi double %5 to i32
%7 = call i32 @printf(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([146 x i8], [146 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.3, i64 0, i64 0), i32 %6)
ret i32 16
}

LLVM IR (-O2):
@.str = [48 x i8] c"%s: %s %s This is a shared functio - 3asd - %f\0A\00"
@.str.1 = [146 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/jarogames/gregory/refs/heads/master/concepts/cpp/Funq.c\00"
@.str.2 = [12 x i8] c"Mar 15 2022\00"
@.str.3 = [9 x i8] c"16:29:08\00"
define i32 @fso(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([146 x i8], [146 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.3, i64 0, i64 0), i32 %0)
ret i32 16
}
unsigned int parse_to_uint(unsigned char *data) {
  return (unsigned int)*data << 24 | (unsigned int)*(data + 1) << 16 |
         (unsigned int)*(data + 2) << 8 | (unsigned int)*(data + 3);
}


x86 assembly (clang, -O0):
<parse_to_uint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_to_uint>:
mov    (%rdi),%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @parse_to_uint(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = shl i32 %5, 24
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 16
%12 = or i32 %6, %11
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i64 2
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 8
%18 = or i32 %12, %17
%19 = load i8*, i8** %2
%20 = getelementptr inbounds i8, i8* %19, i64 3
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = or i32 %18, %22
ret i32 %23
}

LLVM IR (-O2):
define i32 @parse_to_uint(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = shl nuw i32 %3, 24
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = shl nuw nsw i32 %7, 16
%9 = or i32 %8, %4
%10 = getelementptr inbounds i8, i8* %0, i64 2
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = shl nuw nsw i32 %12, 8
%14 = or i32 %9, %13
%15 = getelementptr inbounds i8, i8* %0, i64 3
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = or i32 %14, %17
ret i32 %18
}
/* Type definitions */
typedef int ushort;

/* Variables and functions */
ushort limdbl2ushort(double d) {
  if (d < 0)
    return 0;
  else if (d > 64000)
    return 64000;
  else
    return d;
}


x86 assembly (clang, -O0):
<limdbl2ushort>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1123 <limdbl2ushort+0x23>
movl   $0x0,-0x4(%rbp)
jmp    114e <limdbl2ushort+0x4e>
movsd  -0x10(%rbp),%xmm0
movsd  0xed0(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    1146 <limdbl2ushort+0x46>
movl   $0xfa00,-0x4(%rbp)
jmp    114e <limdbl2ushort+0x4e>
cvttsd2si -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<limdbl2ushort>:
xor    %eax,%eax
xorpd  %xmm1,%xmm1
ucomisd %xmm0,%xmm1
ja     111f <limdbl2ushort+0x1f>
mov    $0xfa00,%eax
ucomisd 0xee7(%rip),%xmm0
ja     111f <limdbl2ushort+0x1f>
cvttsd2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @limdbl2ushort(double %0) {
%2 = alloca i32
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp olt double %4, 0.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %14
7: ; preds = %1
%8 = load double, double* %3
%9 = fcmp ogt double %8, 6.400000e+04
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 64000, i32* %2
br label %14
11: ; preds = %7
%12 = load double, double* %3
%13 = fptosi double %12 to i32
store i32 %13, i32* %2
br label %14
14: ; preds = %11, %10, %6
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @limdbl2ushort(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = fcmp ogt double %0, 6.400000e+04
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = fptosi double %0 to i32
br label %7
7: ; preds = %3, %1, %5
%8 = phi i32 [ %6, %5 ], [ 0, %1 ], [ 64000, %3 ]
ret i32 %8
}
/* Variables and functions */
int inb(int);
int is_transmit_empty(int port) { return inb(port + 5) & 0x20; }


x86 assembly (clang, -O0):
<is_transmit_empty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
add    $0x5,%edi
call   1030 <inb@plt>
and    $0x20,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_transmit_empty>:
push   %rax
add    $0x5,%edi
call   1030 <inb@plt>
and    $0x20,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @is_transmit_empty(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 5
%5 = call i32 @inb(i32 %4)
%6 = and i32 %5, 32
ret i32 %6
}

LLVM IR (-O2):
define i32 @is_transmit_empty(i32 %0) {
%2 = add nsw i32 %0, 5
%3 = tail call i32 @inb(i32 %2)
%4 = and i32 %3, 32
ret i32 %4
}
int is_prime(int num) {
  int i;
  for (i = 2; i <= num / 2; i++) {
    if (num % i == 0) {
      return 0;
    }
  }
  return 1;
}


x86 assembly (clang, -O0):
<is_prime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
cmp    %ecx,%eax
jg     115b <is_prime+0x5b>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1148 <is_prime+0x48>
movl   $0x0,-0x4(%rbp)
jmp    1162 <is_prime+0x62>
jmp    114d <is_prime+0x4d>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <is_prime+0xe>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_prime>:
mov    $0x1,%r8d
cmp    $0x4,%edi
jl     1137 <is_prime+0x37>
mov    %edi,%esi
shr    %esi
neg    %esi
mov    $0x2,%ecx
cs nopw 0x0(%rax,%rax,1)
mov    %edi,%eax
cltd
idiv   %ecx
test   %edx,%edx
je     113b <is_prime+0x3b>
lea    (%rsi,%rcx,1),%eax
add    $0x1,%eax
add    $0x1,%ecx
cmp    $0x1,%eax
jne    1120 <is_prime+0x20>
mov    %r8d,%eax
ret
xor    %r8d,%r8d
mov    %r8d,%eax
ret

LLVM IR (-O0):
define i32 @is_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 2, i32* %4
br label %5
5: ; preds = %17, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sdiv i32 %7, 2
%9 = icmp sle i32 %6, %8
br i1 %9, label %10, label %20
10: ; preds = %5
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = srem i32 %11, %12
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %10
store i32 0, i32* %2
br label %21
16: ; preds = %10
br label %17
17: ; preds = %16
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %5
20: ; preds = %5
store i32 1, i32* %2
br label %21
21: ; preds = %20, %15
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @is_prime(i32 %0) {
%2 = icmp slt i32 %0, 4
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = lshr i32 %0, 1
br label %8
5: ; preds = %8
%6 = add nuw nsw i32 %9, 1
%7 = icmp eq i32 %9, %4
br i1 %7, label %12, label %8
8: ; preds = %3, %5
%9 = phi i32 [ %6, %5 ], [ 2, %3 ]
%10 = srem i32 %0, %9
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %5
12: ; preds = %8, %5, %1
%13 = phi i32 [ 1, %1 ], [ 1, %5 ], [ 0, %8 ]
ret i32 %13
}
void wutil_shutdown(void) {}


x86 assembly (clang, -O0):
<wutil_shutdown>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wutil_shutdown>:
ret

LLVM IR (-O0):
define void @wutil_shutdown() {
ret void
}

LLVM IR (-O2):
define void @wutil_shutdown() {
ret void
}
void InterruptDisable(int InterruptSource) {
  ((volatile unsigned long *)(0xE000E000 + (0x180)))[(InterruptSource >> 5)] =
      1 << (InterruptSource & 31);
}


x86 assembly (clang, -O0):
<InterruptDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
and    $0x1f,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rdx
mov    -0x4(%rbp),%eax
sar    $0x5,%eax
movslq %eax,%rcx
mov    $0xe000e180,%eax
mov    %rdx,(%rax,%rcx,8)
pop    %rbp
ret

x86 assembly (clang, -O2):
<InterruptDisable>:
mov    %edi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
sar    $0x5,%ecx
movslq %ecx,%rcx
mov    $0xe000e180,%edx
mov    %rax,(%rdx,%rcx,8)
ret

LLVM IR (-O0):
define void @InterruptDisable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 31
%5 = shl i32 1, %4
%6 = sext i32 %5 to i64
%7 = load i32, i32* %2
%8 = ashr i32 %7, 5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i64, i64* inttoptr (i64 3758154112 to i64*), i64 %9
store volatile i64 %6, i64* %10
ret void
}

LLVM IR (-O2):
define void @InterruptDisable(i32 %0) {
%2 = and i32 %0, 31
%3 = shl nuw i32 1, %2
%4 = sext i32 %3 to i64
%5 = ashr i32 %0, 5
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds i64, i64* inttoptr (i64 3758154112 to i64*), i64 %6
store volatile i64 %4, i64* %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cng_put_pixel(int, int);
int Affiche3(int x, int y) { cng_put_pixel(-y, x); }


x86 assembly (clang, -O0):
<Affiche3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %edi,%edi
sub    -0xc(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <cng_put_pixel@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Affiche3>:
mov    %edi,%eax
neg    %esi
mov    %esi,%edi
mov    %eax,%esi
jmp    1030 <cng_put_pixel@plt>

LLVM IR (-O0):
define i32 @Affiche3(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = sub nsw i32 0, %6
%8 = load i32, i32* %4
%9 = call i32 @cng_put_pixel(i32 %7, i32 %8)
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @Affiche3(i32 %0, i32 %1) {
%3 = sub nsw i32 0, %1
%4 = tail call i32 @cng_put_pixel(i32 %3, i32 %0)
ret i32 undef
}
void HashDjb2_C() {}


x86 assembly (clang, -O0):
<HashDjb2_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HashDjb2_C>:
ret

LLVM IR (-O0):
define void @HashDjb2_C() {
ret void
}

LLVM IR (-O2):
define void @HashDjb2_C() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int /*<<< orphan*/ convert_to_signed(int /*<<< orphan*/);
int /*<<< orphan*/ read_var();
int64_t read_svar(void) { return convert_to_signed(read_var()); }


x86 assembly (clang, -O0):
<read_svar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <read_var@plt>
mov    %eax,%edi
call   1030 <convert_to_signed@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_svar>:
push   %rax
xor    %eax,%eax
call   1040 <read_var@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <convert_to_signed@plt>

LLVM IR (-O0):
define i32 @read_svar() {
%1 = call i32 (...) @read_var()
%2 = call i32 @convert_to_signed(i32 %1)
ret i32 %2
}

LLVM IR (-O2):
define i32 @read_svar() {
%1 = tail call i32 (...) @read_var()
%2 = tail call i32 @convert_to_signed(i32 %1)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int main(int argc, char *argv[]) {
  char buf[] = "hello world !!!";
  printf("_____%d\n", sizeof(buf) / sizeof(*buf));
  printf("%c\n", *buf);
  printf("%s\n", buf);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0xed3(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xed0(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    0xecd(%rip),%rdi
mov    $0x10,%esi
mov    $0x0,%al
call   1030 <printf@plt>
movsbl -0x20(%rbp),%esi
lea    0xebf(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    -0x20(%rbp),%rsi
lea    0xeb1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movaps 0xed5(%rip),%xmm0
movaps %xmm0,(%rsp)
lea    0xeda(%rip),%rdi
mov    $0x10,%esi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xed0(%rip),%rdi
mov    $0x68,%esi
xor    %eax,%eax
call   1040 <printf@plt>
mov    %rsp,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.buf = [16 x i8] c"hello world !!!\00"
@.str = [9 x i8] c"_____%d\0A\00"
@.str.1 = [4 x i8] c"%c\0A\00"
@.str.2 = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [16 x i8]
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = bitcast [16 x i8]* %6 to i8*
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 16)
%9 = getelementptr inbounds [16 x i8], [16 x i8]* %6, i64 0, i64 0
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %11)
%13 = getelementptr inbounds [16 x i8], [16 x i8]* %6, i64 0, i64 0
%14 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i8* %13)
ret i32 0
}

LLVM IR (-O2):
@__const.main.buf = [16 x i8] c"hello world !!!\00"
@.str = [9 x i8] c"_____%d\0A\00"
@.str.1 = [4 x i8] c"%c\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [16 x i8]
%4 = getelementptr inbounds [16 x i8], [16 x i8]* %3, i64 0, i64 0
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 16)
%6 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 104)
%7 = call i32 @puts(i8* %4)
ret i32 0
}
void ARGBToYJRow_C() {}


x86 assembly (clang, -O0):
<ARGBToYJRow_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBToYJRow_C>:
ret

LLVM IR (-O0):
define void @ARGBToYJRow_C() {
ret void
}

LLVM IR (-O2):
define void @ARGBToYJRow_C() {
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int read_quaddobl_start_system(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(243, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<read_quaddobl_start_system>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0xf3,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_quaddobl_start_system>:
mov    $0xf3,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @read_quaddobl_start_system() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 243, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @read_quaddobl_start_system() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 243, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
unsigned long clz(unsigned long x) {
  if (x != 0)
    return __builtin_clzl(x);
  return sizeof(unsigned long) * 8;
}


x86 assembly (clang, -O0):
<clz>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     112a <clz+0x2a>
mov    -0x10(%rbp),%rax
bsr    %rax,%rax
xor    $0x3f,%rax
cltq
mov    %rax,-0x8(%rbp)
jmp    1132 <clz+0x32>
movq   $0x40,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clz>:
test   %rdi,%rdi
je     110e <clz+0xe>
bsr    %rdi,%rax
xor    $0x3f,%rax
ret
mov    $0x40,%eax
ret

LLVM IR (-O0):
define i64 @clz(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i64, i64* %3
%8 = call i64 @llvm.ctlz.i64(i64 %7, i1 true)
%9 = trunc i64 %8 to i32
%10 = sext i32 %9 to i64
store i64 %10, i64* %2
br label %12
11: ; preds = %1
store i64 64, i64* %2
br label %12
12: ; preds = %11, %6
%13 = load i64, i64* %2
ret i64 %13
}

LLVM IR (-O2):
define i64 @clz(i64 %0) {
%2 = tail call i64 @llvm.ctlz.i64(i64 %0, i1 false)
ret i64 %2
}
int test_parse(void) { return 0; }


x86 assembly (clang, -O0):
<test_parse>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_parse>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test_parse() {
ret i32 0
}

LLVM IR (-O2):
define i32 @test_parse() {
ret i32 0
}
void glmSubtractVector2d(double result[2], const double v1[2],
                         const double v2[2]) {
  result[0] = v1[0] - v2[0];
  result[1] = v1[1] - v2[1];
}


x86 assembly (clang, -O0):
<glmSubtractVector2d>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x18(%rbp),%rax
subsd  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x18(%rbp),%rax
subsd  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmSubtractVector2d>:
movsd  (%rsi),%xmm0
subsd  (%rdx),%xmm0
movsd  %xmm0,(%rdi)
movsd  0x8(%rsi),%xmm0
subsd  0x8(%rdx),%xmm0
movsd  %xmm0,0x8(%rdi)
ret

LLVM IR (-O0):
define void @glmSubtractVector2d(double* %0, double* %1, double* %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca double*
store double* %0, double** %4
store double* %1, double** %5
store double* %2, double** %6
%7 = load double*, double** %5
%8 = getelementptr inbounds double, double* %7, i64 0
%9 = load double, double* %8
%10 = load double*, double** %6
%11 = getelementptr inbounds double, double* %10, i64 0
%12 = load double, double* %11
%13 = fsub double %9, %12
%14 = load double*, double** %4
%15 = getelementptr inbounds double, double* %14, i64 0
store double %13, double* %15
%16 = load double*, double** %5
%17 = getelementptr inbounds double, double* %16, i64 1
%18 = load double, double* %17
%19 = load double*, double** %6
%20 = getelementptr inbounds double, double* %19, i64 1
%21 = load double, double* %20
%22 = fsub double %18, %21
%23 = load double*, double** %4
%24 = getelementptr inbounds double, double* %23, i64 1
store double %22, double* %24
ret void
}

LLVM IR (-O2):
define void @glmSubtractVector2d(double* nocapture writeonly %0, double* nocapture %1, double* nocapture %2) {
%4 = load double, double* %1
%5 = load double, double* %2
%6 = fsub double %4, %5
store double %6, double* %0
%7 = getelementptr inbounds double, double* %1, i64 1
%8 = load double, double* %7
%9 = getelementptr inbounds double, double* %2, i64 1
%10 = load double, double* %9
%11 = fsub double %8, %10
%12 = getelementptr inbounds double, double* %0, i64 1
store double %11, double* %12
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ getpid();
pid_t tcgetpgrp(int fd) { return getpid(); }


x86 assembly (clang, -O0):
<tcgetpgrp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcgetpgrp>:
xor    %eax,%eax
jmp    1030 <getpid@plt>

LLVM IR (-O0):
define i32 @tcgetpgrp(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @getpid()
ret i32 %3
}

LLVM IR (-O2):
define i32 @tcgetpgrp(i32 %0) {
%2 = tail call i32 (...) @getpid()
ret i32 %2
}
/* Variables and functions */
bool nrf52_errata_64(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_64>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_64>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_64() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_64() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ test_parser_sourcefile(char *, char *);
int /*<<< orphan*/ test_parser_verify_entity(int /*<<< orphan*/, char *,
                                             char *);
void test_rexx_comment_entities() {
  test_parser_verify_entity(test_parser_sourcefile("rexx", " /*comment*/"),
                            "comment", "/*comment*/");
}


x86 assembly (clang, -O0):
<test_rexx_comment_entities>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xed3(%rip),%rsi
call   1030 <test_parser_sourcefile@plt>
mov    %eax,%edi
lea    0xed2(%rip),%rsi
lea    0xebf(%rip),%rdx
call   1040 <test_parser_verify_entity@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_rexx_comment_entities>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xed6(%rip),%rsi
call   1030 <test_parser_sourcefile@plt>
lea    0xed7(%rip),%rsi
lea    0xec4(%rip),%rdx
mov    %eax,%edi
pop    %rax
jmp    1040 <test_parser_verify_entity@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"rexx\00"
@.str.1 = [13 x i8] c" /*comment*/\00"
@.str.2 = [8 x i8] c"comment\00"
@.str.3 = [12 x i8] c"/*comment*/\00"
define void @test_rexx_comment_entities() {
%1 = call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
%2 = call i32 @test_parser_verify_entity(i32 %1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"rexx\00"
@.str.1 = [13 x i8] c" /*comment*/\00"
@.str.2 = [8 x i8] c"comment\00"
@.str.3 = [12 x i8] c"/*comment*/\00"
define void @test_rexx_comment_entities() {
%1 = tail call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @test_parser_verify_entity(i32 %1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.3, i64 0, i64 0))
ret void
}
/* Variables and functions */
float floor(float);
float divf(float x, float y) { return (floor(x / y)); }


x86 assembly (clang, -O0):
<divf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
divss  -0x8(%rbp),%xmm0
call   1030 <floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<divf>:
divss  %xmm1,%xmm0
jmp    1030 <floorf@plt>

LLVM IR (-O0):
define float @divf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fdiv float %5, %6
%8 = call float @floor(float %7)
ret float %8
}

LLVM IR (-O2):
define float @divf(float %0, float %1) {
%3 = fdiv float %0, %1
%4 = tail call float @llvm.floor.f32(float %3)
ret float %4
}
/* Type definitions */
struct List {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ SPC_MSG(int /*<<< orphan*/, char const *);
int file_process(const char *path, struct List *module_list) {
  SPC_MSG(0, path);
  return 0;
}


x86 assembly (clang, -O0):
<file_process>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
xor    %edi,%edi
call   1030 <SPC_MSG@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_process>:
push   %rax
mov    %rdi,%rsi
xor    %edi,%edi
call   1030 <SPC_MSG@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.List = type { i32 }
define i32 @file_process(i8* %0, %struct.List* %1) {
%3 = alloca i8*
%4 = alloca %struct.List*
store i8* %0, i8** %3
store %struct.List* %1, %struct.List** %4
%5 = load i8*, i8** %3
%6 = call i32 @SPC_MSG(i32 0, i8* %5)
ret i32 0
}

LLVM IR (-O2):
%struct.List = type { i32 }
define i32 @file_process(i8* %0, %struct.List* nocapture readnone %1) {
%3 = tail call i32 @SPC_MSG(i32 0, i8* %0)
ret i32 0
}
unsigned int hexok(char c) {
  if (('0' <= c && c <= '9') || ('a' <= c && c <= 'f') ||
      ('A' <= c && c <= 'F'))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<hexok>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%ecx
mov    $0x30,%eax
cmp    %ecx,%eax
jg     1128 <hexok+0x28>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jle    1164 <hexok+0x64>
movsbl -0x5(%rbp),%ecx
mov    $0x61,%eax
cmp    %ecx,%eax
jg     1146 <hexok+0x46>
movsbl -0x5(%rbp),%eax
cmp    $0x66,%eax
jle    1164 <hexok+0x64>
movsbl -0x5(%rbp),%ecx
mov    $0x41,%eax
cmp    %ecx,%eax
jg     1170 <hexok+0x70>
movsbl -0x5(%rbp),%eax
cmp    $0x46,%eax
jg     1170 <hexok+0x70>
movl   $0x1,-0x4(%rbp)
jmp    1177 <hexok+0x77>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hexok>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%al
setb   %al
and    $0xdf,%dil
add    $0xbf,%dil
cmp    $0x6,%dil
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @hexok(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sle i32 48, %5
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %27, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp sle i32 97, %13
br i1 %14, label %15, label %19
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp sle i32 %17, 102
br i1 %18, label %27, label %19
19: ; preds = %15, %11
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp sle i32 65, %21
br i1 %22, label %23, label %28
23: ; preds = %19
%24 = load i8, i8* %3
%25 = sext i8 %24 to i32
%26 = icmp sle i32 %25, 70
br i1 %26, label %27, label %28
27: ; preds = %23, %15, %7
store i32 1, i32* %2
br label %29
28: ; preds = %23, %19
store i32 0, i32* %2
br label %29
29: ; preds = %28, %27
%30 = load i32, i32* %2
ret i32 %30
}

LLVM IR (-O2):
define i32 @hexok(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = and i8 %0, -33
%5 = add i8 %4, -65
%6 = icmp ult i8 %5, 6
%7 = or i1 %3, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
size_t fwrite(void const *, int, size_t, void *);
int send_fp_chars(void *arg, const void *buf, int len) {
  if (!arg)
    return 1;
  if (fwrite(buf, 1, (size_t)len, arg) != (size_t)len)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<send_fp_chars>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    113a <send_fp_chars+0x2a>
movl   $0x1,-0x4(%rbp)
jmp    1170 <send_fp_chars+0x60>
mov    -0x18(%rbp),%rdi
movslq -0x1c(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    $0x1,%esi
call   1030 <fwrite@plt>
movslq -0x1c(%rbp),%rcx
cmp    %rcx,%rax
je     1169 <send_fp_chars+0x59>
movl   $0x0,-0x4(%rbp)
jmp    1170 <send_fp_chars+0x60>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_fp_chars>:
test   %rdi,%rdi
je     1139 <send_fp_chars+0x29>
push   %rbx
mov    %rdi,%rcx
movslq %edx,%rbx
mov    %rsi,%rdi
mov    $0x1,%esi
mov    %rbx,%rdx
call   1030 <fwrite@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rbx,%rcx
sete   %al
pop    %rbx
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @send_fp_chars(i8* %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%8 = load i8*, i8** %5
%9 = icmp ne i8* %8, null
br i1 %9, label %11, label %10
10: ; preds = %3
store i32 1, i32* %4
br label %22
11: ; preds = %3
%12 = load i8*, i8** %6
%13 = load i32, i32* %7
%14 = sext i32 %13 to i64
%15 = load i8*, i8** %5
%16 = call i64 @fwrite(i8* %12, i32 1, i64 %14, i8* %15)
%17 = load i32, i32* %7
%18 = sext i32 %17 to i64
%19 = icmp ne i64 %16, %18
br i1 %19, label %20, label %21
20: ; preds = %11
store i32 0, i32* %4
br label %22
21: ; preds = %11
store i32 1, i32* %4
br label %22
22: ; preds = %21, %20, %10
%23 = load i32, i32* %4
ret i32 %23
}

LLVM IR (-O2):
define i32 @send_fp_chars(i8* %0, i8* nocapture %1, i32 %2) {
%4 = icmp eq i8* %0, null
br i1 %4, label %10, label %5
5: ; preds = %3
%6 = sext i32 %2 to i64
%7 = tail call i64 @fwrite(i8* %1, i32 1, i64 %6, i8* %0)
%8 = icmp eq i64 %7, %6
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %5, %3
%11 = phi i32 [ 1, %3 ], [ %9, %5 ]
ret i32 %11
}
void rop3_59_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = ~*D;
  stk2 = T | stk3;
  stk1 = S & stk2;
  stk1 = ~stk1;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_59_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_59_0_0>:
mov    (%rdi),%al
not    %al
or     %dl,%al
and    %sil,%al
not    %al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_59_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = xor i32 %12, -1
%14 = trunc i32 %13 to i8
store i8 %14, i8* %9
%15 = load i8, i8* %6
%16 = zext i8 %15 to i32
%17 = load i8, i8* %9
%18 = zext i8 %17 to i32
%19 = or i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %8
%21 = load i8, i8* %5
%22 = zext i8 %21 to i32
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = and i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %7
%27 = load i8, i8* %7
%28 = zext i8 %27 to i32
%29 = xor i32 %28, -1
%30 = trunc i32 %29 to i8
store i8 %30, i8* %7
%31 = load i8, i8* %7
%32 = load i8*, i8** %4
store i8 %31, i8* %32
ret void
}

LLVM IR (-O2):
define void @rop3_59_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %4, -1
%6 = or i8 %5, %2
%7 = and i8 %6, %1
%8 = xor i8 %7, -1
store i8 %8, i8* %0
ret void
}
int silly(x, y) { return x - y; }


x86 assembly (clang, -O0):
<silly>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<silly>:
mov    %edi,%eax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @silly(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @silly(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
ret i32 %3
}
void ff_hevc_put_hevc_uni_w_epel_hv48_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_epel_hv48_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_epel_hv48_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_epel_hv48_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_epel_hv48_10_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pthread_yield(int /*<<< orphan*/ *);
void pegasus_yield(void) { pthread_yield(NULL); }


x86 assembly (clang, -O0):
<pegasus_yield>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1030 <pthread_yield@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pegasus_yield>:
xor    %edi,%edi
jmp    1030 <pthread_yield@plt>

LLVM IR (-O0):
define void @pegasus_yield() {
%1 = call i32 @pthread_yield(i32* null)
ret void
}

LLVM IR (-O2):
define void @pegasus_yield() {
%1 = tail call i32 @pthread_yield(i32* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ MIPS_SET_BIT(int, int);
void xburst_cgm_gate_compress() { MIPS_SET_BIT((0xB0000000 + 0x28), 5); }


x86 assembly (clang, -O0):
<xburst_cgm_gate_compress>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb0000028,%edi
mov    $0x5,%esi
call   1030 <MIPS_SET_BIT@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xburst_cgm_gate_compress>:
mov    $0xb0000028,%edi
mov    $0x5,%esi
jmp    1030 <MIPS_SET_BIT@plt>

LLVM IR (-O0):
define void @xburst_cgm_gate_compress() {
%1 = call i32 @MIPS_SET_BIT(i32 -1342177240, i32 5)
ret void
}

LLVM IR (-O2):
define void @xburst_cgm_gate_compress() {
%1 = tail call i32 @MIPS_SET_BIT(i32 -1342177240, i32 5)
ret void
}
unsigned long ALIGN_POWER2(unsigned long u) {
  if (u == 0)
    return 0;
  if (u == 1)
    return 1;
  if (__builtin_clzl(u - 1UL) < 1)
    return 0;
  return 1UL << (sizeof(u) * 8 - __builtin_clzl(u - 1UL));
}


x86 assembly (clang, -O0):
<ALIGN_POWER2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1120 <ALIGN_POWER2+0x20>
movq   $0x0,-0x8(%rbp)
jmp    1184 <ALIGN_POWER2+0x84>
cmpq   $0x1,-0x10(%rbp)
jne    1138 <ALIGN_POWER2+0x38>
movq   $0x1,-0x8(%rbp)
jmp    1184 <ALIGN_POWER2+0x84>
mov    -0x10(%rbp),%rax
sub    $0x1,%rax
bsr    %rax,%rax
xor    $0x3f,%rax
cmp    $0x1,%eax
jge    115e <ALIGN_POWER2+0x5e>
movq   $0x0,-0x8(%rbp)
jmp    1184 <ALIGN_POWER2+0x84>
mov    -0x10(%rbp),%rax
sub    $0x1,%rax
bsr    %rax,%rax
xor    $0x3f,%rax
cltq
mov    $0x40,%ecx
sub    %rax,%rcx
mov    $0x1,%eax
shl    %cl,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ALIGN_POWER2>:
mov    %rdi,%rax
test   %rdi,%rdi
je     112c <ALIGN_POWER2+0x2c>
cmp    $0x1,%rax
jne    1114 <ALIGN_POWER2+0x14>
mov    $0x1,%eax
ret
add    $0xffffffffffffffff,%rax
bsr    %rax,%rcx
xor    $0x3f,%rcx
je     112d <ALIGN_POWER2+0x2d>
neg    %cl
mov    $0x1,%eax
shl    %cl,%rax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @ALIGN_POWER2(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 0, i64* %2
br label %26
7: ; preds = %1
%8 = load i64, i64* %3
%9 = icmp eq i64 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %7
store i64 1, i64* %2
br label %26
11: ; preds = %7
%12 = load i64, i64* %3
%13 = sub i64 %12, 1
%14 = call i64 @llvm.ctlz.i64(i64 %13, i1 true)
%15 = trunc i64 %14 to i32
%16 = icmp slt i32 %15, 1
br i1 %16, label %17, label %18
17: ; preds = %11
store i64 0, i64* %2
br label %26
18: ; preds = %11
%19 = load i64, i64* %3
%20 = sub i64 %19, 1
%21 = call i64 @llvm.ctlz.i64(i64 %20, i1 true)
%22 = trunc i64 %21 to i32
%23 = sext i32 %22 to i64
%24 = sub i64 64, %23
%25 = shl i64 1, %24
store i64 %25, i64* %2
br label %26
26: ; preds = %18, %17, %10, %6
%27 = load i64, i64* %2
ret i64 %27
}

LLVM IR (-O2):
define i64 @ALIGN_POWER2(i64 %0) {
switch i64 %0, label %3 [
i64 0, label %10
i64 1, label %2
]
2: ; preds = %1
br label %10
3: ; preds = %1
%4 = add i64 %0, -1
%5 = tail call i64 @llvm.ctlz.i64(i64 %4, i1 true)
%6 = icmp eq i64 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %3
%8 = sub nuw nsw i64 64, %5
%9 = shl nuw i64 1, %8
br label %10
10: ; preds = %3, %1, %7, %2
%11 = phi i64 [ 1, %2 ], [ %9, %7 ], [ %0, %1 ], [ 0, %3 ]
ret i64 %11
}
/* Variables and functions */
int /*<<< orphan*/ return_struct_l3();
int /*<<< orphan*/ take_struct_l3(int /*<<< orphan*/);
void test_struct_l3() { take_struct_l3(return_struct_l3()); }


x86 assembly (clang, -O0):
<test_struct_l3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <return_struct_l3@plt>
mov    %eax,%edi
call   1030 <take_struct_l3@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_struct_l3>:
push   %rax
xor    %eax,%eax
call   1040 <return_struct_l3@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <take_struct_l3@plt>

LLVM IR (-O0):
define void @test_struct_l3() {
%1 = call i32 (...) @return_struct_l3()
%2 = call i32 @take_struct_l3(i32 %1)
ret void
}

LLVM IR (-O2):
define void @test_struct_l3() {
%1 = tail call i32 (...) @return_struct_l3()
%2 = tail call i32 @take_struct_l3(i32 %1)
ret void
}
unsigned long long pow_ull(unsigned int p, unsigned int l) {
  unsigned long long ret = 1;
  while (l) {
    if (l & 1)
      ret *= p;
    p *= p;
    l >>= 1;
  }
  return ret;
}


x86 assembly (clang, -O0):
<pow_ull>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movq   $0x1,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     114f <pow_ull+0x4f>
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1137 <pow_ull+0x37>
mov    -0x4(%rbp),%eax
imul   -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <pow_ull+0x12>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pow_ull>:
mov    $0x1,%eax
test   %esi,%esi
je     113a <pow_ull+0x3a>
mov    $0x1,%r8d
mov    %esi,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
test   $0x1,%sil
mov    %edi,%ecx
cmove  %r8d,%ecx
imul   %rcx,%rax
imul   %edi,%edi
shr    %edx
cmp    $0x1,%esi
mov    %edx,%esi
ja     1120 <pow_ull+0x20>
ret

LLVM IR (-O0):
define i64 @pow_ull(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
store i32 %0, i32* %3
store i32 %1, i32* %4
store i64 1, i64* %5
br label %6
6: ; preds = %18, %2
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %24
9: ; preds = %6
%10 = load i32, i32* %4
%11 = and i32 %10, 1
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %18
13: ; preds = %9
%14 = load i32, i32* %3
%15 = zext i32 %14 to i64
%16 = load i64, i64* %5
%17 = mul i64 %16, %15
store i64 %17, i64* %5
br label %18
18: ; preds = %13, %9
%19 = load i32, i32* %3
%20 = load i32, i32* %3
%21 = mul i32 %20, %19
store i32 %21, i32* %3
%22 = load i32, i32* %4
%23 = lshr i32 %22, 1
store i32 %23, i32* %4
br label %6
24: ; preds = %6
%25 = load i64, i64* %5
ret i64 %25
}

LLVM IR (-O2):
define i64 @pow_ull(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %16, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %12, %4 ], [ 1, %2 ]
%6 = phi i32 [ %14, %4 ], [ %1, %2 ]
%7 = phi i32 [ %13, %4 ], [ %0, %2 ]
%8 = and i32 %6, 1
%9 = icmp eq i32 %8, 0
%10 = select i1 %9, i32 1, i32 %7
%11 = zext i32 %10 to i64
%12 = mul i64 %5, %11
%13 = mul i32 %7, %7
%14 = lshr i32 %6, 1
%15 = icmp ult i32 %6, 2
br i1 %15, label %16, label %4
16: ; preds = %4, %2
%17 = phi i64 [ 1, %2 ], [ %12, %4 ]
ret i64 %17
}
/* Variables and functions */
int EXIT_SUCCESS;
int history(const char *pname, const char *fname, int argc, const char **argv) {
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<history>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<history>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @history(i8* %0, i8* %1, i32 %2, i8** %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8**
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i8** %3, i8*** %8
%9 = load i32, i32* @EXIT_SUCCESS
ret i32 %9
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @history(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2, i8** nocapture readnone %3) {
%5 = load i32, i32* @EXIT_SUCCESS
ret i32 %5
}
/* Type definitions */
typedef char *uint64_t;

/* Variables and functions */
uint64_t ROL64_30(uint64_t x) {
  __asm__("rolq $30, %0" : "=r"(x) : "0"(x));
  return x;
}


x86 assembly (clang, -O0):
<ROL64_30>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
rol    $0x1e,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ROL64_30>:
mov    %rdi,%rax
rol    $0x1e,%rax
ret

LLVM IR (-O0):
define i8* @ROL64_30(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* asm "rolq $$30, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define i8* @ROL64_30(i8* readnone %0) {
%2 = tail call i8* asm "rolq $$30, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret i8* %2
}
void cdrtbk() {}


x86 assembly (clang, -O0):
<cdrtbk>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cdrtbk>:
ret

LLVM IR (-O0):
define void @cdrtbk() {
ret void
}

LLVM IR (-O2):
define void @cdrtbk() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void print_string(char *s) { fputs(s, stdout); }


x86 assembly (clang, -O0):
<print_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rax
mov    (%rax),%esi
call   1030 <fputs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_string>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <fputs@plt>

LLVM IR (-O0):
@stdout = global i32 0
define void @print_string(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @stdout
%5 = call i32 @fputs(i8* %3, i32 %4)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @print_string(i8* %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @fputs(i8* %0, i32 %2)
ret void
}