xunge/DecIR huggingface dataset:
/* Variables and functions */
int isprint(int);
int isgraph(int c) {
  if (c == ' ') {
    return 0;
  }
  return isprint(c);
}


x86 assembly (clang, -O0):
<isgraph>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x20,-0x8(%rbp)
jne    1131 <isgraph+0x21>
movl   $0x0,-0x4(%rbp)
jmp    113c <isgraph+0x2c>
mov    -0x8(%rbp),%edi
call   1030 <isprint@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isgraph>:
cmp    $0x20,%edi
jne    1118 <isgraph+0x8>
xor    %eax,%eax
ret
jmp    1030 <isprint@plt>

LLVM IR (-O0):
define i32 @isgraph(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 32
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = call i32 @isprint(i32 %8)
store i32 %9, i32* %2
br label %10
10: ; preds = %7, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @isgraph(i32 %0) {
%2 = icmp eq i32 %0, 32
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @isprint(i32 %0)
br label %5
5: ; preds = %1, %3
%6 = phi i32 [ %4, %3 ], [ 0, %1 ]
ret i32 %6
}
/* Variables and functions */
int *__builtin_brev_ldw(int *, int *, int);
int *brev_store_elimination_test1(int *ptr, int mod) {
  int dst = 100;
  return __builtin_brev_ldw(ptr, &dst, mod);
}


x86 assembly (clang, -O0):
<brev_store_elimination_test1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x64,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
lea    -0x10(%rbp),%rsi
call   1030 <__builtin_brev_ldw@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<brev_store_elimination_test1>:
push   %rax
mov    %esi,%edx
movl   $0x64,0x4(%rsp)
lea    0x4(%rsp),%rsi
call   1030 <__builtin_brev_ldw@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32* @brev_store_elimination_test1(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 100, i32* %5
%6 = load i32*, i32** %3
%7 = load i32, i32* %4
%8 = call i32* @__builtin_brev_ldw(i32* %6, i32* %5, i32 %7)
ret i32* %8
}

LLVM IR (-O2):
define i32* @brev_store_elimination_test1(i32* %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
store i32 100, i32* %3
%5 = call i32* @__builtin_brev_ldw(i32* %0, i32* %3, i32 %1)
ret i32* %5
}
/* Variables and functions */
int /*<<< orphan*/ SIGALRM;
int /*<<< orphan*/ SIG_DFL;
int /*<<< orphan*/ alarm(int /*<<< orphan*/);
int /*<<< orphan*/ signal(int /*<<< orphan*/, int /*<<< orphan*/);
void terminate() {
  alarm(0);
  signal(SIGALRM, SIG_DFL);
}


x86 assembly (clang, -O0):
<terminate>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <alarm@plt>
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
mov    0x2e9d(%rip),%rax
mov    (%rax),%esi
call   1040 <signal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<terminate>:
push   %rax
xor    %edi,%edi
call   1030 <alarm@plt>
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
mov    0x2ea0(%rip),%rax
mov    (%rax),%esi
pop    %rax
jmp    1040 <signal@plt>

LLVM IR (-O0):
@SIGALRM = global i32 0
@SIG_DFL = global i32 0
define void @terminate() {
%1 = call i32 @alarm(i32 0)
%2 = load i32, i32* @SIGALRM
%3 = load i32, i32* @SIG_DFL
%4 = call i32 @signal(i32 %2, i32 %3)
ret void
}

LLVM IR (-O2):
@SIGALRM = global i32 0
@SIG_DFL = global i32 0
define void @terminate() {
%1 = tail call i32 @alarm(i32 0)
%2 = load i32, i32* @SIGALRM
%3 = load i32, i32* @SIG_DFL
%4 = tail call i32 @signal(i32 %2, i32 %3)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ IntDisable(int);
int /*<<< orphan*/ IntUnregister(int);
void UARTTXIntUnregister(uint32_t ui32Base) {
  uint32_t ui32Int;
  ;
  ui32Int = ((ui32Base == 0x00007200) ? 0x610902 : 0x630904);
  IntDisable(ui32Int);
  IntUnregister(ui32Int);
}


x86 assembly (clang, -O0):
<UARTTXIntUnregister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0x630904,%eax
mov    $0x610902,%ecx
cmp    $0x7200,%edx
cmove  %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <IntDisable@plt>
mov    -0x8(%rbp),%edi
call   1040 <IntUnregister@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTTXIntUnregister>:
push   %rbx
cmp    $0x7200,%edi
mov    $0x610902,%eax
mov    $0x630904,%ebx
cmove  %eax,%ebx
mov    %ebx,%edi
call   1030 <IntDisable@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <IntUnregister@plt>

LLVM IR (-O0):
define void @UARTTXIntUnregister(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 29184
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 6359298, i32 6490372
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = call i32 @IntDisable(i32 %8)
%10 = load i32, i32* %3
%11 = call i32 @IntUnregister(i32 %10)
ret void
}

LLVM IR (-O2):
define void @UARTTXIntUnregister(i32 %0) {
%2 = icmp eq i32 %0, 29184
%3 = select i1 %2, i32 6359298, i32 6490372
%4 = tail call i32 @IntDisable(i32 %3)
%5 = tail call i32 @IntUnregister(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ p(char *);
int /*<<< orphan*/ p_good();
int /*<<< orphan*/ p_newline();
void evening() {
  p_good();
  p("evening");
  p_newline();
}


x86 assembly (clang, -O0):
<evening>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <p_good@plt>
lea    0xebe(%rip),%rdi
call   1040 <p@plt>
mov    $0x0,%al
call   1030 <p_newline@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<evening>:
push   %rax
xor    %eax,%eax
call   1050 <p_good@plt>
lea    0xec1(%rip),%rdi
call   1040 <p@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <p_newline@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"evening\00"
define void @evening() {
%1 = call i32 (...) @p_good()
%2 = call i32 @p(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @p_newline()
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"evening\00"
define void @evening() {
%1 = tail call i32 (...) @p_good()
%2 = tail call i32 @p(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @p_newline()
ret void
}
void lgdt(unsigned long *desc) { __asm__ volatile("lgdt %0" : : "m"(*desc)); }


x86 assembly (clang, -O0):
<lgdt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
lgdt   (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<lgdt>:
lgdt   (%rdi)
ret

LLVM IR (-O0):
define void @lgdt(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
ret void
}

LLVM IR (-O2):
define void @lgdt(i64* %0) {
tail call void asm sideeffect "lgdt $0", "*m,~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ deactivate_mark();
int /*<<< orphan*/ minibuf_error(char *);
int cancel(void) {
  deactivate_mark();
  minibuf_error("Quit");
  return 0;
}


x86 assembly (clang, -O0):
<cancel>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <deactivate_mark@plt>
lea    0xece(%rip),%rdi
call   1030 <minibuf_error@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cancel>:
push   %rax
xor    %eax,%eax
call   1040 <deactivate_mark@plt>
lea    0xed1(%rip),%rdi
call   1030 <minibuf_error@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"Quit\00"
define i32 @cancel() {
%1 = call i32 (...) @deactivate_mark()
%2 = call i32 @minibuf_error(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"Quit\00"
define i32 @cancel() {
%1 = tail call i32 (...) @deactivate_mark()
%2 = tail call i32 @minibuf_error(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
void __attribute__((cold)) f2(int x) {
  register float f asm("%xmm1") = x;
  asm volatile("" ::"x"(f));
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm1
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
cvtsi2ss %edi,%xmm1
ret
cs nopw 0x0(%rax,%rax,1)
nop

LLVM IR (-O0):
define void @f2(i32 %0) {
%2 = alloca i32
%3 = alloca float
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sitofp i32 %4 to float
store float %5, float* %3
%6 = load float, float* %3
ret void
}

LLVM IR (-O2):
define void @f2(i32 %0) {
%2 = sitofp i32 %0 to float
tail call void asm sideeffect "", "{xmm1},~{dirflag},~{fpsr},~{flags}"(float %2)
ret void
}
int ho_strcmp(const char *s1, const char *s2) {
  char *s = (char *)s1;
  int c;
  while (!(c = *s - *s2) && *s)
    s++, s2++;
  return c;
}


x86 assembly (clang, -O0):
<ho_strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%ecx
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
sub    %eax,%ecx
mov    %ecx,-0x1c(%rbp)
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x1d(%rbp)
jne    1145 <ho_strcmp+0x45>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x1d(%rbp)
mov    -0x1d(%rbp),%al
test   $0x1,%al
jne    1155 <ho_strcmp+0x55>
jmp    1172 <ho_strcmp+0x72>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1114 <ho_strcmp+0x14>
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ho_strcmp>:
movsbl (%rdi),%ecx
movsbl (%rsi),%edx
mov    %ecx,%eax
sub    %edx,%eax
jne    1138 <ho_strcmp+0x38>
test   %cl,%cl
je     1138 <ho_strcmp+0x38>
mov    $0x1,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
movsbl (%rdi,%rcx,1),%edx
movsbl (%rsi,%rcx,1),%r8d
mov    %edx,%eax
sub    %r8d,%eax
jne    1138 <ho_strcmp+0x38>
add    $0x1,%rcx
test   %dl,%dl
jne    1120 <ho_strcmp+0x20>
ret

LLVM IR (-O0):
define i32 @ho_strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
br label %8
8: ; preds = %24, %2
%9 = load i8*, i8** %5
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = sub nsw i32 %11, %14
store i32 %15, i32* %6
%16 = icmp ne i32 %15, 0
br i1 %16, label %22, label %17
17: ; preds = %8
%18 = load i8*, i8** %5
%19 = load i8, i8* %18
%20 = sext i8 %19 to i32
%21 = icmp ne i32 %20, 0
br label %22
22: ; preds = %17, %8
%23 = phi i1 [ false, %8 ], [ %21, %17 ]
br i1 %23, label %24, label %29
24: ; preds = %22
%25 = load i8*, i8** %5
%26 = getelementptr inbounds i8, i8* %25, i32 1
store i8* %26, i8** %5
%27 = load i8*, i8** %4
%28 = getelementptr inbounds i8, i8* %27, i32 1
store i8* %28, i8** %4
br label %8
29: ; preds = %22
%30 = load i32, i32* %6
ret i32 %30
}

LLVM IR (-O2):
define i32 @ho_strcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = sext i8 %3 to i32
%5 = load i8, i8* %1
%6 = sext i8 %5 to i32
%7 = sub nsw i32 %4, %6
%8 = icmp ne i32 %7, 0
%9 = icmp eq i8 %3, 0
%10 = select i1 %8, i1 true, i1 %9
br i1 %10, label %24, label %11
11: ; preds = %2, %11
%12 = phi i8* [ %15, %11 ], [ %1, %2 ]
%13 = phi i8* [ %14, %11 ], [ %0, %2 ]
%14 = getelementptr inbounds i8, i8* %13, i64 1
%15 = getelementptr inbounds i8, i8* %12, i64 1
%16 = load i8, i8* %14
%17 = sext i8 %16 to i32
%18 = load i8, i8* %15
%19 = sext i8 %18 to i32
%20 = sub nsw i32 %17, %19
%21 = icmp ne i32 %20, 0
%22 = icmp eq i8 %16, 0
%23 = select i1 %21, i1 true, i1 %22
br i1 %23, label %24, label %11
24: ; preds = %11, %2
%25 = phi i32 [ %7, %2 ], [ %20, %11 ]
ret i32 %25
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_channel_position_from_string() {
  printf("NOT IMPLEMENTED:"
         "pa_channel_position_from_string"
         "\n");
}


x86 assembly (clang, -O0):
<pa_channel_position_from_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_channel_position_from_string>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [49 x i8] c"NOT IMPLEMENTED:pa_channel_position_from_string\0A\00"
define i32 @pa_channel_position_from_string() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [48 x i8] c"NOT IMPLEMENTED:pa_channel_position_from_string\00"
define i32 @pa_channel_position_from_string() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([48 x i8], [48 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
int char_type_counter(char *string, char type) {
  int counter = 0;
  while (*string != '\0') {
    if (*string == type)
      counter++;
    string++;
  }
  return counter;
}


x86 assembly (clang, -O0):
<char_type_counter>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1152 <char_type_counter+0x52>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jne    1141 <char_type_counter+0x41>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1115 <char_type_counter+0x15>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<char_type_counter>:
mov    (%rdi),%cl
test   %cl,%cl
je     1126 <char_type_counter+0x26>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
xor    %edx,%edx
cmp    %sil,%cl
sete   %dl
add    %edx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <char_type_counter+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @char_type_counter(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i32
store i8* %0, i8** %3
store i8 %1, i8* %4
store i32 0, i32* %5
br label %6
6: ; preds = %21, %2
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %24
11: ; preds = %6
%12 = load i8*, i8** %3
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = load i8, i8* %4
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %14, %16
br i1 %17, label %18, label %21
18: ; preds = %11
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %21
21: ; preds = %18, %11
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %3
br label %6
24: ; preds = %6
%25 = load i32, i32* %5
ret i32 %25
}

LLVM IR (-O2):
define i32 @char_type_counter(i8* nocapture %0, i8 signext %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %13, %5 ], [ %3, %2 ]
%7 = phi i32 [ %11, %5 ], [ 0, %2 ]
%8 = phi i8* [ %12, %5 ], [ %0, %2 ]
%9 = icmp eq i8 %6, %1
%10 = zext i1 %9 to i32
%11 = add nuw nsw i32 %7, %10
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %2
%16 = phi i32 [ 0, %2 ], [ %11, %5 ]
ret i32 %16
}
void regulator_bulk_free(int num_consumers,
                         struct regulator_bulk_data *consumers) {}


x86 assembly (clang, -O0):
<regulator_bulk_free>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<regulator_bulk_free>:
ret

LLVM IR (-O0):
%struct.regulator_bulk_data = type opaque
define void @regulator_bulk_free(i32 %0, %struct.regulator_bulk_data* %1) {
%3 = alloca i32
%4 = alloca %struct.regulator_bulk_data*
store i32 %0, i32* %3
store %struct.regulator_bulk_data* %1, %struct.regulator_bulk_data** %4
ret void
}

LLVM IR (-O2):
%struct.regulator_bulk_data = type opaque
define void @regulator_bulk_free(i32 %0, %struct.regulator_bulk_data* nocapture %1) {
ret void
}
/* Type definitions */
typedef unsigned int uint32_t;

/* Variables and functions */
uint32_t rol32(uint32_t word, unsigned int shift) {
  return (word << shift) | (word >> (32 - shift));
}


x86 assembly (clang, -O0):
<rol32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
mov    $0x20,%ecx
sub    -0x8(%rbp),%ecx
shr    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rol32>:
mov    %esi,%ecx
mov    %edi,%eax
rol    %cl,%eax
ret

LLVM IR (-O0):
define i32 @rol32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sub i32 32, %9
%11 = lshr i32 %8, %10
%12 = or i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @rol32(i32 %0, i32 %1) {
%3 = shl i32 %0, %1
%4 = sub i32 32, %1
%5 = lshr i32 %0, %4
%6 = or i32 %5, %3
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ EOPNOTSUPP;
int /*<<< orphan*/ errno;
int set_reuseaddr(int fd, void *optval, int optlen) {
  errno = EOPNOTSUPP;
  return -1;
}


x86 assembly (clang, -O0):
<set_reuseaddr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2ecb(%rip),%rax
mov    (%rax),%ecx
mov    0x2eba(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_reuseaddr>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@EOPNOTSUPP = global i32 0
@errno = global i32 0
define i32 @set_reuseaddr(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* @EOPNOTSUPP
store i32 %7, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@EOPNOTSUPP = global i32 0
@errno = global i32 0
define i32 @set_reuseaddr(i32 %0, i8* nocapture readnone %1, i32 %2) {
%4 = load i32, i32* @EOPNOTSUPP
store i32 %4, i32* @errno
ret i32 -1
}
/* Variables and functions */
int istrncasecmp(char const *, char const *, size_t, int);
size_t strlen(char const *);
int istrcasecmp(const char *n1, const char *n2, int casemap) {
  size_t l1 = strlen(n1);
  size_t l2 = strlen(n2);
  return istrncasecmp(n1, n2, (l1 < l2) ? (l1 + 1) : (l2 + 1), casemap);
}


x86 assembly (clang, -O0):
<istrcasecmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x28(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x28(%rbp),%rax
jae    117c <istrcasecmp+0x5c>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x40(%rbp)
jmp    1188 <istrcasecmp+0x68>
mov    -0x28(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x40(%rbp)
mov    -0x30(%rbp),%rsi
mov    -0x38(%rbp),%rdi
mov    -0x40(%rbp),%rdx
mov    -0x14(%rbp),%ecx
call   1040 <istrncasecmp@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<istrcasecmp>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %rsi,%r15
mov    %rdi,%rbp
call   1030 <strlen@plt>
mov    %rax,%rbx
mov    %r15,%rdi
call   1030 <strlen@plt>
cmp    %rax,%rbx
cmovae %rax,%rbx
add    $0x1,%rbx
mov    %rbp,%rdi
mov    %r15,%rsi
mov    %rbx,%rdx
mov    %r14d,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1040 <istrncasecmp@plt>

LLVM IR (-O0):
define i32 @istrcasecmp(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i64
%8 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%9 = load i8*, i8** %4
%10 = call i64 @strlen(i8* %9)
store i64 %10, i64* %7
%11 = load i8*, i8** %5
%12 = call i64 @strlen(i8* %11)
store i64 %12, i64* %8
%13 = load i8*, i8** %4
%14 = load i8*, i8** %5
%15 = load i64, i64* %7
%16 = load i64, i64* %8
%17 = icmp ult i64 %15, %16
br i1 %17, label %18, label %21
18: ; preds = %3
%19 = load i64, i64* %7
%20 = add i64 %19, 1
br label %24
21: ; preds = %3
%22 = load i64, i64* %8
%23 = add i64 %22, 1
br label %24
24: ; preds = %21, %18
%25 = phi i64 [ %20, %18 ], [ %23, %21 ]
%26 = load i32, i32* %6
%27 = call i32 @istrncasecmp(i8* %13, i8* %14, i64 %25, i32 %26)
ret i32 %27
}

LLVM IR (-O2):
define i32 @istrcasecmp(i8* %0, i8* %1, i32 %2) {
%4 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%5 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%6 = icmp ult i64 %4, %5
%7 = select i1 %6, i64 %4, i64 %5
%8 = add i64 %7, 1
%9 = tail call i32 @istrncasecmp(i8* %0, i8* %1, i64 %8, i32 %2)
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int, char *);
scalar_t__ system(char *);
int start_record(char *str) {
  char buf[128] = {0};
  int sec;
  sec = (900 * 1000);
  sprintf(buf, "raspivid -t %d -o /home/pi/rec/%s", sec, str);
  if (system(buf))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<start_record>:
push   %rbp
mov    %rsp,%rbp
sub    $0xa0,%rsp
mov    %rdi,-0x10(%rbp)
lea    -0x90(%rbp),%rdi
xor    %esi,%esi
mov    $0x80,%edx
call   1040 <memset@plt>
movl   $0xdbba0,-0x94(%rbp)
lea    -0x90(%rbp),%rdi
mov    -0x94(%rbp),%edx
mov    -0x10(%rbp),%rcx
lea    0xe8c(%rip),%rsi
call   1050 <sprintf@plt>
lea    -0x90(%rbp),%rdi
call   1030 <system@plt>
cmp    $0x0,%rax
je     119b <start_record+0x6b>
movl   $0x1,-0x4(%rbp)
jmp    11a2 <start_record+0x72>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xa0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<start_record>:
push   %rbx
sub    $0x80,%rsp
mov    %rdi,%rcx
xorps  %xmm0,%xmm0
movaps %xmm0,0x70(%rsp)
movaps %xmm0,0x60(%rsp)
movaps %xmm0,0x50(%rsp)
movaps %xmm0,0x40(%rsp)
movaps %xmm0,0x30(%rsp)
movaps %xmm0,0x20(%rsp)
movaps %xmm0,0x10(%rsp)
movaps %xmm0,(%rsp)
lea    0xea4(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0xdbba0,%edx
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <system@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
add    $0x80,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [34 x i8] c"raspivid -t %d -o /home/pi/rec/%s\00"
define i32 @start_record(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca [128 x i8]
%5 = alloca i32
store i8* %0, i8** %3
%6 = bitcast [128 x i8]* %4 to i8*
store i32 900000, i32* %5
%7 = getelementptr inbounds [128 x i8], [128 x i8]* %4, i64 0, i64 0
%8 = load i32, i32* %5
%9 = load i8*, i8** %3
%10 = call i32 @sprintf(i8* %7, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i32 %8, i8* %9)
%11 = getelementptr inbounds [128 x i8], [128 x i8]* %4, i64 0, i64 0
%12 = call i64 @system(i8* %11)
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %1
store i32 1, i32* %2
br label %16
15: ; preds = %1
store i32 0, i32* %2
br label %16
16: ; preds = %15, %14
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
@.str = [34 x i8] c"raspivid -t %d -o /home/pi/rec/%s\00"
define i32 @start_record(i8* %0) {
%2 = alloca [128 x i8]
%3 = getelementptr inbounds [128 x i8], [128 x i8]* %2, i64 0, i64 0
%4 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i32 900000, i8* %0)
%5 = call i64 @system(i8* %3)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
long fib(long n) {
  if (n < 2)
    return n;
  return fib(n - 2) + fib(n - 1);
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x2,-0x10(%rbp)
jge    1134 <fib+0x24>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1160 <fib+0x50>
mov    -0x10(%rbp),%rdi
sub    $0x2,%rdi
call   1030 <fib@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
sub    $0x1,%rdi
call   1030 <fib@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
cmp    $0x2,%rdi
jge    1122 <fib+0x12>
xor    %r14d,%r14d
jmp    114b <fib+0x3b>
add    $0x1,%rbx
xor    %r14d,%r14d
nopl   0x0(%rax)
lea    -0x3(%rbx),%rdi
call   1030 <fib@plt>
add    %rax,%r14
add    $0xffffffffffffffff,%rbx
cmp    $0x2,%rbx
ja     1130 <fib+0x20>
mov    $0x1,%ebx
add    %rbx,%r14
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @fib(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp slt i64 %4, 2
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i64, i64* %3
store i64 %7, i64* %2
br label %16
8: ; preds = %1
%9 = load i64, i64* %3
%10 = sub nsw i64 %9, 2
%11 = call i64 @fib(i64 %10)
%12 = load i64, i64* %3
%13 = sub nsw i64 %12, 1
%14 = call i64 @fib(i64 %13)
%15 = add nsw i64 %11, %14
store i64 %15, i64* %2
br label %16
16: ; preds = %8, %6
%17 = load i64, i64* %2
ret i64 %17
}

LLVM IR (-O2):
define i64 @fib(i64 %0) {
%2 = icmp slt i64 %0, 2
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %8, %3 ], [ %0, %1 ]
%5 = phi i64 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i64 %4, -2
%7 = tail call i64 @fib(i64 %6)
%8 = add nsw i64 %4, -1
%9 = add nsw i64 %7, %5
%10 = icmp ult i64 %4, 3
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i64 [ 0, %1 ], [ %9, %3 ]
%13 = phi i64 [ %0, %1 ], [ 1, %3 ]
%14 = add nsw i64 %13, %12
ret i64 %14
}
/* Variables and functions */
long double cos(long double);
long double sin(long double);
void sincosl(long double x, long double *psin, long double *pcos) {
  *psin = sin(x);
  *pcos = cos(x);
}


x86 assembly (clang, -O0):
<sincosl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
mov    %rdi,-0x18(%rbp)
mov    %rsi,-0x20(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <sin@plt>
mov    -0x18(%rbp),%rax
fstpt  (%rax)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1040 <cos@plt>
mov    -0x20(%rbp),%rax
fstpt  (%rax)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sincosl>:
push   %r14
push   %rbx
sub    $0x28,%rsp
mov    %rsi,%r14
mov    %rdi,%rbx
fldt   0x40(%rsp)
fld    %st(0)
fstpt  0x1c(%rsp)
fstpt  (%rsp)
call   1030 <sin@plt>
fstpt  (%rbx)
fldt   0x1c(%rsp)
fstpt  (%rsp)
call   1040 <cos@plt>
fstpt  (%r14)
add    $0x28,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @sincosl(x86_fp80 %0, x86_fp80* %1, x86_fp80* %2) {
%4 = alloca x86_fp80
%5 = alloca x86_fp80*
%6 = alloca x86_fp80*
store x86_fp80 %0, x86_fp80* %4
store x86_fp80* %1, x86_fp80** %5
store x86_fp80* %2, x86_fp80** %6
%7 = load x86_fp80, x86_fp80* %4
%8 = call x86_fp80 @sin(x86_fp80 %7)
%9 = load x86_fp80*, x86_fp80** %5
store x86_fp80 %8, x86_fp80* %9
%10 = load x86_fp80, x86_fp80* %4
%11 = call x86_fp80 @cos(x86_fp80 %10)
%12 = load x86_fp80*, x86_fp80** %6
store x86_fp80 %11, x86_fp80* %12
ret void
}

LLVM IR (-O2):
define void @sincosl(x86_fp80 %0, x86_fp80* nocapture writeonly %1, x86_fp80* nocapture writeonly %2) {
%4 = tail call x86_fp80 @sin(x86_fp80 %0)
store x86_fp80 %4, x86_fp80* %1
%5 = tail call x86_fp80 @cos(x86_fp80 %0)
store x86_fp80 %5, x86_fp80* %2
ret void
}
/* Variables and functions */
unsigned int peek(int, int);
void BiosGetTicks(unsigned ticks[2]) {
  unsigned low, high1, high2;
  high2 = peek(0x40, 0x6E);
  do {
    high1 = high2;
    low = peek(0x40, 0x6C);
    high2 = peek(0x40, 0x6E);
  } while (high1 != high2);
  ticks[0] = low;
  ticks[1] = high2;
}


x86 assembly (clang, -O0):
<BiosGetTicks>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x40,%edi
mov    $0x6e,%esi
call   1030 <peek@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    $0x40,%edi
mov    $0x6c,%esi
call   1030 <peek@plt>
mov    %eax,-0xc(%rbp)
mov    $0x40,%edi
mov    $0x6e,%esi
call   1030 <peek@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x14(%rbp),%eax
jne    112e <BiosGetTicks+0x1e>
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BiosGetTicks>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
mov    $0x40,%edi
mov    $0x6e,%esi
call   1030 <peek@plt>
cs nopw 0x0(%rax,%rax,1)
mov    %eax,%ebx
mov    $0x40,%edi
mov    $0x6c,%esi
call   1030 <peek@plt>
mov    %eax,%ebp
mov    $0x40,%edi
mov    $0x6e,%esi
call   1030 <peek@plt>
cmp    %eax,%ebx
jne    1130 <BiosGetTicks+0x20>
mov    %ebp,(%r14)
mov    %ebx,0x4(%r14)
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @BiosGetTicks(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %2
%6 = call i32 @peek(i32 64, i32 110)
store i32 %6, i32* %5
br label %7
7: ; preds = %11, %1
%8 = load i32, i32* %5
store i32 %8, i32* %4
%9 = call i32 @peek(i32 64, i32 108)
store i32 %9, i32* %3
%10 = call i32 @peek(i32 64, i32 110)
store i32 %10, i32* %5
br label %11
11: ; preds = %7
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = icmp ne i32 %12, %13
br i1 %14, label %7, label %15
15: ; preds = %11
%16 = load i32, i32* %3
%17 = load i32*, i32** %2
%18 = getelementptr inbounds i32, i32* %17, i64 0
store i32 %16, i32* %18
%19 = load i32, i32* %5
%20 = load i32*, i32** %2
%21 = getelementptr inbounds i32, i32* %20, i64 1
store i32 %19, i32* %21
ret void
}

LLVM IR (-O2):
define void @BiosGetTicks(i32* nocapture writeonly %0) {
%2 = tail call i32 @peek(i32 64, i32 110)
br label %3
3: ; preds = %3, %1
%4 = phi i32 [ %2, %1 ], [ %6, %3 ]
%5 = tail call i32 @peek(i32 64, i32 108)
%6 = tail call i32 @peek(i32 64, i32 110)
%7 = icmp eq i32 %4, %6
br i1 %7, label %8, label %3
8: ; preds = %3
store i32 %5, i32* %0
%9 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %4, i32* %9
ret void
}
unsigned long DRV_WIFI_CLR_RX_FCTL(unsigned long para1, unsigned long para2) {
  return 0;
}


x86 assembly (clang, -O0):
<DRV_WIFI_CLR_RX_FCTL>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DRV_WIFI_CLR_RX_FCTL>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @DRV_WIFI_CLR_RX_FCTL(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
ret i64 0
}

LLVM IR (-O2):
define i64 @DRV_WIFI_CLR_RX_FCTL(i64 %0, i64 %1) {
ret i64 0
}
int fltrep_narrow_round(d, e)
int d[2];
int e[1];
{ return fltrep_narrow(d, e); }


x86 assembly (clang, -O0):
<fltrep_narrow_round>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1030 <fltrep_narrow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fltrep_narrow_round>:
xor    %eax,%eax
jmp    1030 <fltrep_narrow@plt>

LLVM IR (-O0):
define i32 @fltrep_narrow_round(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 (i32*, i32*, ...) bitcast (i32 (...)* @fltrep_narrow to i32 (i32*, i32*, ...)*)(i32* %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @fltrep_narrow_round(i32* %0, i32* %1) {
%3 = tail call i32 (i32*, i32*, ...) bitcast (i32 (...)* @fltrep_narrow to i32 (i32*, i32*, ...)*)(i32* %0, i32* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ ot(char *);
defbyte() { ot("byte\t"); }


x86 assembly (clang, -O0):
<defbyte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <ot@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<defbyte>:
lea    0xee9(%rip),%rdi
jmp    1030 <ot@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"byte\09\00"
define i32 @defbyte() {
%1 = alloca i32
%2 = call i32 @ot(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [6 x i8] c"byte\09\00"
define i32 @defbyte() {
%1 = tail call i32 @ot(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int rand();
int getRand(int min, int max) { return rand() % (max - min + 1) + min; }


x86 assembly (clang, -O0):
<getRand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getRand>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
sub    %ebp,%ebx
add    $0x1,%ebx
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @getRand(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @rand()
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = add nsw i32 %8, 1
%10 = srem i32 %5, %9
%11 = load i32, i32* %3
%12 = add nsw i32 %10, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @getRand(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = sub i32 1, %0
%5 = add i32 %4, %1
%6 = srem i32 %3, %5
%7 = add nsw i32 %6, %0
ret i32 %7
}
int rand_int(int seed) {
  int a = 16807;
  int q = 127773;
  int r = 2836;
  int m = 2147483647;
  int hi = seed / q;
  int lo = seed % q;
  int x = a * lo - r * hi;
  return x > 0 ? x : x + m;
}


x86 assembly (clang, -O0):
<rand_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x41a7,-0x8(%rbp)
movl   $0x1f31d,-0xc(%rbp)
movl   $0xb14,-0x10(%rbp)
movl   $0x7fffffff,-0x14(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %eax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
imul   -0x1c(%rbp),%eax
mov    -0x10(%rbp),%ecx
imul   -0x18(%rbp),%ecx
sub    %ecx,%eax
mov    %eax,-0x20(%rbp)
cmpl   $0x0,-0x20(%rbp)
jle    115f <rand_int+0x5f>
mov    -0x20(%rbp),%eax
mov    %eax,-0x24(%rbp)
jmp    1168 <rand_int+0x68>
mov    -0x20(%rbp),%eax
add    -0x14(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_int>:
movslq %edi,%rax
imul   $0xffffffff834e0b5f,%rax,%rcx
shr    $0x20,%rcx
add    %eax,%ecx
mov    %ecx,%edx
shr    $0x1f,%edx
sar    $0x10,%ecx
add    %edx,%ecx
imul   $0x1f31d,%ecx,%edx
sub    %edx,%eax
imul   $0x41a7,%eax,%eax
imul   $0xfffff4ec,%ecx,%ecx
lea    (%rcx,%rax,1),%edx
test   %edx,%edx
lea    0x7fffffff(%rcx,%rax,1),%eax
cmovg  %edx,%eax
ret

LLVM IR (-O0):
define i32 @rand_int(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %2
store i32 16807, i32* %3
store i32 127773, i32* %4
store i32 2836, i32* %5
store i32 2147483647, i32* %6
%10 = load i32, i32* %2
%11 = load i32, i32* %4
%12 = sdiv i32 %10, %11
store i32 %12, i32* %7
%13 = load i32, i32* %2
%14 = load i32, i32* %4
%15 = srem i32 %13, %14
store i32 %15, i32* %8
%16 = load i32, i32* %3
%17 = load i32, i32* %8
%18 = mul nsw i32 %16, %17
%19 = load i32, i32* %5
%20 = load i32, i32* %7
%21 = mul nsw i32 %19, %20
%22 = sub nsw i32 %18, %21
store i32 %22, i32* %9
%23 = load i32, i32* %9
%24 = icmp sgt i32 %23, 0
br i1 %24, label %25, label %27
25: ; preds = %1
%26 = load i32, i32* %9
br label %31
27: ; preds = %1
%28 = load i32, i32* %9
%29 = load i32, i32* %6
%30 = add nsw i32 %28, %29
br label %31
31: ; preds = %27, %25
%32 = phi i32 [ %26, %25 ], [ %30, %27 ]
ret i32 %32
}

LLVM IR (-O2):
define i32 @rand_int(i32 %0) {
%2 = sdiv i32 %0, 127773
%3 = srem i32 %0, 127773
%4 = mul nsw i32 %3, 16807
%5 = mul nsw i32 %2, -2836
%6 = add i32 %5, %4
%7 = icmp sgt i32 %6, 0
%8 = add nsw i32 %6, 2147483647
%9 = select i1 %7, i32 %6, i32 %8
ret i32 %9
}
/* Variables and functions */
char *__strncat(char *, char const *, size_t);
char *strncat(char *dest, const char *src, size_t n) {
  return __strncat(dest, src, n);
}


x86 assembly (clang, -O0):
<strncat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <__strncat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncat>:
jmp    1030 <__strncat@plt>

LLVM IR (-O0):
define i8* @strncat(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i8* @__strncat(i8* %7, i8* %8, i64 %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @strncat(i8* %0, i8* %1, i64 %2) {
%4 = tail call i8* @__strncat(i8* %0, i8* %1, i64 %2)
ret i8* %4
}
/* Variables and functions */
void *parse_args(char *input_str) { return NULL; }


x86 assembly (clang, -O0):
<parse_args>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_args>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @parse_args(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @parse_args(i8* nocapture readnone %0) {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
scalar_t__ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ init_gpio(int);
int /*<<< orphan*/ init_pwm(int);
scalar_t__ open_mem();
int /*<<< orphan*/ set_realtime();
void init_rpi() {
  set_realtime();
  if (open_mem() != EXIT_SUCCESS) {
    exit(EXIT_FAILURE);
  }
  init_gpio(0x20000000);
  init_pwm(0x20000000);
}


x86 assembly (clang, -O0):
<init_rpi>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <set_realtime@plt>
mov    $0x0,%al
call   1040 <open_mem@plt>
mov    0x2e6f(%rip),%rcx
cmp    (%rcx),%rax
je     1180 <init_rpi+0x30>
mov    0x2e67(%rip),%rax
mov    (%rax),%edi
call   1070 <exit@plt>
mov    $0x20000000,%edi
call   1060 <init_gpio@plt>
mov    $0x20000000,%edi
call   1050 <init_pwm@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_rpi>:
push   %rax
xor    %eax,%eax
call   1030 <set_realtime@plt>
xor    %eax,%eax
call   1040 <open_mem@plt>
mov    0x2e72(%rip),%rcx
cmp    (%rcx),%rax
jne    1180 <init_rpi+0x30>
mov    $0x20000000,%edi
call   1060 <init_gpio@plt>
mov    $0x20000000,%edi
pop    %rax
jmp    1050 <init_pwm@plt>
mov    0x2e59(%rip),%rax
mov    (%rax),%edi
call   1070 <exit@plt>

LLVM IR (-O0):
@EXIT_SUCCESS = global i64 0
@EXIT_FAILURE = global i32 0
define void @init_rpi() {
%1 = call i32 (...) @set_realtime()
%2 = call i64 (...) @open_mem()
%3 = load i64, i64* @EXIT_SUCCESS
%4 = icmp ne i64 %2, %3
br i1 %4, label %5, label %8
5: ; preds = %0
%6 = load i32, i32* @EXIT_FAILURE
%7 = call i32 @exit(i32 %6)
unreachable
8: ; preds = %0
%9 = call i32 @init_gpio(i32 536870912)
%10 = call i32 @init_pwm(i32 536870912)
ret void
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i64 0
@EXIT_FAILURE = global i32 0
define void @init_rpi() {
%1 = tail call i32 (...) @set_realtime()
%2 = tail call i64 (...) @open_mem()
%3 = load i64, i64* @EXIT_SUCCESS
%4 = icmp eq i64 %2, %3
br i1 %4, label %8, label %5
5: ; preds = %0
%6 = load i32, i32* @EXIT_FAILURE
%7 = tail call i32 @exit(i32 %6)
unreachable
8: ; preds = %0
%9 = tail call i32 @init_gpio(i32 536870912)
%10 = tail call i32 @init_pwm(i32 536870912)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void print_usage(char *pname) { printf("USAGE:%s\n", pname); }


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"USAGE:%s\0A\00"
define void @print_usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"USAGE:%s\0A\00"
define void @print_usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
struct mempool {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mp_end(struct mempool *, int /*<<< orphan*/ *);
void *mp_grow(struct mempool *, unsigned int);
int /*<<< orphan*/ mp_open_fast(struct mempool *, void *);
void *mp_realloc_fast(struct mempool *pool, void *ptr, unsigned size) {
  mp_open_fast(pool, ptr);
  ptr = mp_grow(pool, size);
  mp_end(pool, (uint8_t *)ptr + size);
  return ptr;
}


x86 assembly (clang, -O0):
<mp_realloc_fast>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <mp_open_fast@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <mp_grow@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%eax
shl    $0x2,%rax
add    %rax,%rsi
call   1050 <mp_end@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp_realloc_fast>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rdi,%rbx
call   1030 <mp_open_fast@plt>
mov    %rbx,%rdi
mov    %r14d,%esi
call   1040 <mp_grow@plt>
mov    %rax,%rbp
mov    %r14d,%eax
lea    0x0(,%rax,4),%rsi
add    %rbp,%rsi
mov    %rbx,%rdi
call   1050 <mp_end@plt>
mov    %rbp,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
%struct.mempool = type { i32 }
define i8* @mp_realloc_fast(%struct.mempool* %0, i8* %1, i32 %2) {
%4 = alloca %struct.mempool*
%5 = alloca i8*
%6 = alloca i32
store %struct.mempool* %0, %struct.mempool** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load %struct.mempool*, %struct.mempool** %4
%8 = load i8*, i8** %5
%9 = call i32 @mp_open_fast(%struct.mempool* %7, i8* %8)
%10 = load %struct.mempool*, %struct.mempool** %4
%11 = load i32, i32* %6
%12 = call i8* @mp_grow(%struct.mempool* %10, i32 %11)
store i8* %12, i8** %5
%13 = load %struct.mempool*, %struct.mempool** %4
%14 = load i8*, i8** %5
%15 = bitcast i8* %14 to i32*
%16 = load i32, i32* %6
%17 = zext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %15, i64 %17
%19 = call i32 @mp_end(%struct.mempool* %13, i32* %18)
%20 = load i8*, i8** %5
ret i8* %20
}

LLVM IR (-O2):
%struct.mempool = type { i32 }
define i8* @mp_realloc_fast(%struct.mempool* %0, i8* %1, i32 %2) {
%4 = tail call i32 @mp_open_fast(%struct.mempool* %0, i8* %1)
%5 = tail call i8* @mp_grow(%struct.mempool* %0, i32 %2)
%6 = bitcast i8* %5 to i32*
%7 = zext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %6, i64 %7
%9 = tail call i32 @mp_end(%struct.mempool* %0, i32* %8)
ret i8* %5
}
link_error() {}


x86 assembly (clang, -O0):
<link_error>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<link_error>:
ret

LLVM IR (-O0):
define i32 @link_error() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @link_error() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void pc(char *s, int o) {
  int ch;
  ch = *(char *)((int)s + o) & 255;
  if (ch < 32)
    ch = '.';
  printf("%c", ch);
}


x86 assembly (clang, -O0):
<pc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    -0xc(%rbp),%eax
cltq
movsbl (%rax),%eax
and    $0xff,%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x20,-0x10(%rbp)
jge    1144 <pc+0x34>
movl   $0x2e,-0x10(%rbp)
mov    -0x10(%rbp),%esi
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pc>:
movslq %edi,%rax
movslq %esi,%rcx
movzbl (%rax,%rcx,1),%eax
cmp    $0x20,%al
mov    $0x2e,%ecx
cmovae %eax,%ecx
movzbl %cl,%esi
lea    0xed2(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define void @pc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = ptrtoint i8* %6 to i32
%8 = load i32, i32* %4
%9 = add nsw i32 %7, %8
%10 = sext i32 %9 to i64
%11 = inttoptr i64 %10 to i8*
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = and i32 %13, 255
store i32 %14, i32* %5
%15 = load i32, i32* %5
%16 = icmp slt i32 %15, 32
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 46, i32* %5
br label %18
18: ; preds = %17, %2
%19 = load i32, i32* %5
%20 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %19)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
define void @pc(i8* %0, i32 %1) {
%3 = ptrtoint i8* %0 to i64
%4 = trunc i64 %3 to i32
%5 = add nsw i32 %4, %1
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i8*
%8 = load i8, i8* %7
%9 = icmp ult i8 %8, 32
%10 = select i1 %9, i8 46, i8 %8
%11 = zext i8 %10 to i32
%12 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %11)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ XEvent;
typedef int /*<<< orphan*/ Widget;
typedef int /*<<< orphan*/ String;
typedef int /*<<< orphan*/ Cardinal;

/* Variables and functions */
int /*<<< orphan*/ XtCloseDisplay(int /*<<< orphan*/);
int /*<<< orphan*/ XtDisplay(int /*<<< orphan*/);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void quit(Widget w, XEvent *event, String *params, Cardinal *num_params) {
  XtCloseDisplay(XtDisplay(w));
  exit(0);
}


x86 assembly (clang, -O0):
<quit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <XtDisplay@plt>
mov    %eax,%edi
call   1050 <XtCloseDisplay@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<quit>:
push   %rax
call   1030 <XtDisplay@plt>
mov    %eax,%edi
call   1050 <XtCloseDisplay@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @quit(i32 %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32, i32* %5
%10 = call i32 @XtDisplay(i32 %9)
%11 = call i32 @XtCloseDisplay(i32 %10)
%12 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @quit(i32 %0, i32* nocapture readnone %1, i32* nocapture readnone %2, i32* nocapture readnone %3) {
%5 = tail call i32 @XtDisplay(i32 %0)
%6 = tail call i32 @XtCloseDisplay(i32 %5)
%7 = tail call i32 @exit(i32 0)
unreachable
}
void XtVaOpenApplication() {}


x86 assembly (clang, -O0):
<XtVaOpenApplication>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XtVaOpenApplication>:
ret

LLVM IR (-O0):
define void @XtVaOpenApplication() {
ret void
}

LLVM IR (-O2):
define void @XtVaOpenApplication() {
ret void
}