xunge/DecIR huggingface dataset:
/* Variables and functions */
char *mystrchr(char *str, char *ch) {
  while (*str) {
    if (*str == ch[0])
      return str;
    *str++;
  }
  return NULL;
}


x86 assembly (clang, -O0):
<mystrchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     114d <mystrchr+0x4d>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    -0x18(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jne    113c <mystrchr+0x3c>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1155 <mystrchr+0x55>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110c <mystrchr+0xc>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mystrchr>:
mov    (%rdi),%cl
test   %cl,%cl
je     1120 <mystrchr+0x20>
mov    %rdi,%rax
mov    (%rsi),%dl
nopl   0x0(%rax,%rax,1)
cmp    %dl,%cl
je     1122 <mystrchr+0x22>
movzbl 0x1(%rax),%ecx
add    $0x1,%rax
test   %cl,%cl
jne    1110 <mystrchr+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @mystrchr(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
br label %6
6: ; preds = %21, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %25
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = load i8*, i8** %5
%15 = getelementptr inbounds i8, i8* %14, i64 0
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %13, %17
br i1 %18, label %19, label %21
19: ; preds = %10
%20 = load i8*, i8** %4
store i8* %20, i8** %3
br label %26
21: ; preds = %10
%22 = load i8*, i8** %4
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %4
%24 = load i8, i8* %22
br label %6
25: ; preds = %6
store i8* null, i8** %3
br label %26
26: ; preds = %25, %19
%27 = load i8*, i8** %3
ret i8* %27
}

LLVM IR (-O2):
define i8* @mystrchr(i8* %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2
%6 = load i8, i8* %1
br label %7
7: ; preds = %5, %11
%8 = phi i8 [ %3, %5 ], [ %13, %11 ]
%9 = phi i8* [ %0, %5 ], [ %12, %11 ]
%10 = icmp eq i8 %8, %6
br i1 %10, label %15, label %11
11: ; preds = %7
%12 = getelementptr inbounds i8, i8* %9, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %7
15: ; preds = %7, %11, %2
%16 = phi i8* [ null, %2 ], [ null, %11 ], [ %9, %7 ]
ret i8* %16
}
/* Type definitions */
struct nl_addr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ nl_addr_put(struct nl_addr *);
void _nl_auto_nl_addr_fcn(struct nl_addr **v) {
  if (*v)
    nl_addr_put(*v);
}


x86 assembly (clang, -O0):
<_nl_auto_nl_addr_fcn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     1136 <_nl_auto_nl_addr_fcn+0x26>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <nl_addr_put@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_nl_auto_nl_addr_fcn>:
mov    (%rdi),%rdi
test   %rdi,%rdi
je     111d <_nl_auto_nl_addr_fcn+0xd>
jmp    1030 <nl_addr_put@plt>
ret

LLVM IR (-O0):
%struct.nl_addr = type { i32 }
define void @_nl_auto_nl_addr_fcn(%struct.nl_addr** %0) {
%2 = alloca %struct.nl_addr**
store %struct.nl_addr** %0, %struct.nl_addr*** %2
%3 = load %struct.nl_addr**, %struct.nl_addr*** %2
%4 = load %struct.nl_addr*, %struct.nl_addr** %3
%5 = icmp ne %struct.nl_addr* %4, null
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load %struct.nl_addr**, %struct.nl_addr*** %2
%8 = load %struct.nl_addr*, %struct.nl_addr** %7
%9 = call i32 @nl_addr_put(%struct.nl_addr* %8)
br label %10
10: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
%struct.nl_addr = type { i32 }
define void @_nl_auto_nl_addr_fcn(%struct.nl_addr** nocapture %0) {
%2 = load %struct.nl_addr*, %struct.nl_addr** %0
%3 = icmp eq %struct.nl_addr* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @nl_addr_put(%struct.nl_addr* %2)
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gen_strrchr(char *, int, char *);
int /*<<< orphan*/ init_buff(char *, int const);
int mksym_i32();
char *strrchr(char *, int);
void test_strrchr() {
  const int len = 5;
  char s[len];
  init_buff(s, len);
  int c = mksym_i32();
  char *res = strrchr(s, c);
  gen_strrchr(s, c, res);
}


x86 assembly (clang, -O0):
<test_strrchr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x5,-0x4(%rbp)
mov    %rsp,%rax
mov    %rax,-0x10(%rbp)
lea    -0x30(%rbp),%rdi
mov    $0x5,%esi
call   1060 <init_buff@plt>
mov    $0x0,%al
call   1050 <mksym_i32@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    -0x30(%rbp),%rdi
call   1030 <strrchr@plt>
mov    %rax,-0x20(%rbp)
mov    -0x14(%rbp),%esi
mov    -0x20(%rbp),%rdx
lea    -0x30(%rbp),%rdi
call   1040 <gen_strrchr@plt>
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_strrchr>:
push   %rbp
push   %rbx
push   %rax
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x5,%esi
call   1060 <init_buff@plt>
xor    %eax,%eax
call   1050 <mksym_i32@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <strrchr@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %rax,%rdx
call   1040 <gen_strrchr@plt>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @test_strrchr() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i32 5, i32* %1
%5 = call i8* @llvm.stacksave()
store i8* %5, i8** %2
%6 = alloca i8, i64 5
%7 = call i32 @init_buff(i8* %6, i32 5)
%8 = call i32 (...) @mksym_i32()
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = call i8* @strrchr(i8* %6, i32 %9)
store i8* %10, i8** %4
%11 = load i32, i32* %3
%12 = load i8*, i8** %4
%13 = call i32 @gen_strrchr(i8* %6, i32 %11, i8* %12)
%14 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @test_strrchr() {
%1 = alloca [5 x i8]
%2 = getelementptr inbounds [5 x i8], [5 x i8]* %1, i64 0, i64 0
%3 = call i32 @init_buff(i8* %2, i32 5)
%4 = call i32 (...) @mksym_i32()
%5 = call i8* @strrchr(i8* %2, i32 %4)
%6 = call i32 @gen_strrchr(i8* %2, i32 %4, i8* %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void close_and_clean(int fd) { close(fd); }


x86 assembly (clang, -O0):
<close_and_clean>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_and_clean>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @close_and_clean(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret void
}

LLVM IR (-O2):
define void @close_and_clean(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret void
}
void check(int cond) {
  if (!cond) {
  ERROR:
    goto ERROR;
  }
}


x86 assembly (clang, -O0):
<check>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    111b <check+0x1b>
jmp    1116 <check+0x16>
jmp    1116 <check+0x16>
pop    %rbp
ret

x86 assembly (clang, -O2):
<check>:
test   %edi,%edi
je     1110 <check+0x10>
ret
cs nopw 0x0(%rax,%rax,1)
nop
jmp    1110 <check+0x10>

LLVM IR (-O0):
define void @check(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
br label %6
6: ; preds = %6, %5
br label %6
7: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @check(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %3, label %4
3: ; preds = %1, %3
br label %3
4: ; preds = %1
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t htonl(uint32_t hostlong) {
  return (hostlong << 24) | ((hostlong && 0xff00) << 8) |
         ((hostlong && 0xff0000) >> 8) | (hostlong >> 24);
}


x86 assembly (clang, -O0):
<htonl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x18,%eax
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1129 <htonl+0x29>
mov    $0x1,%al
mov    %al,-0x5(%rbp)
jmp    1129 <htonl+0x29>
mov    -0xc(%rbp),%eax
mov    -0x5(%rbp),%cl
and    $0x1,%cl
movzbl %cl,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0x14(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0xd(%rbp)
je     1156 <htonl+0x56>
mov    $0x1,%al
mov    %al,-0xd(%rbp)
jmp    1156 <htonl+0x56>
mov    -0x14(%rbp),%eax
mov    -0xd(%rbp),%cl
and    $0x1,%cl
movzbl %cl,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
sar    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<htonl>:
xor    %eax,%eax
test   %edi,%edi
setne  %al
mov    %edi,%ecx
shl    $0x18,%ecx
shl    $0x8,%eax
or     %ecx,%eax
sar    $0x18,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @htonl(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 24
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
br label %8
8: ; preds = %7, %1
%9 = phi i1 [ false, %1 ], [ true, %7 ]
%10 = zext i1 %9 to i32
%11 = shl i32 %10, 8
%12 = or i32 %4, %11
%13 = load i32, i32* %2
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %8
br label %16
16: ; preds = %15, %8
%17 = phi i1 [ false, %8 ], [ true, %15 ]
%18 = zext i1 %17 to i32
%19 = ashr i32 %18, 8
%20 = or i32 %12, %19
%21 = load i32, i32* %2
%22 = ashr i32 %21, 24
%23 = or i32 %20, %22
ret i32 %23
}

LLVM IR (-O2):
define i32 @htonl(i32 %0) {
%2 = shl i32 %0, 24
%3 = icmp eq i32 %0, 0
%4 = select i1 %3, i32 0, i32 256
%5 = or i32 %4, %2
%6 = ashr i32 %0, 24
%7 = or i32 %5, %6
ret i32 %7
}
int gcd(int num1, int num2) {
  return ((num2 == 0) ? num1 : gcd(num2, num1 % num2));
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1133 <gcd+0x23>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1147 <gcd+0x37>
mov    -0x8(%rbp),%edi
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%esi
call   1030 <gcd@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %edi,%eax
test   %esi,%esi
je     111d <gcd+0x1d>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = load i32, i32* %3
br label %15
9: ; preds = %2
%10 = load i32, i32* %4
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = srem i32 %11, %12
%14 = call i32 @gcd(i32 %10, i32 %13)
br label %15
15: ; preds = %9, %7
%16 = phi i32 [ %8, %7 ], [ %14, %9 ]
ret i32 %16
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = phi i32 [ %5, %4 ], [ %0, %2 ]
%7 = srem i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %5, %4 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
void kotlinclib_print_byte(char message) { printf("%d", message); }


x86 assembly (clang, -O0):
<kotlinclib_print_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
lea    0xedb(%rip),%rdi
movsbl -0x1(%rbp),%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kotlinclib_print_byte>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @kotlinclib_print_byte(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @kotlinclib_print_byte(i8 signext %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %0)
ret void
}
void VMR3GetStateName(void) {}


x86 assembly (clang, -O0):
<VMR3GetStateName>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VMR3GetStateName>:
ret

LLVM IR (-O0):
define void @VMR3GetStateName() {
ret void
}

LLVM IR (-O2):
define void @VMR3GetStateName() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ MFRC522_WriteRegister(int, int);
void MFRC522_Reset(void) { MFRC522_WriteRegister(0x01, 0x0F); }


x86 assembly (clang, -O0):
<MFRC522_Reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
mov    $0xf,%esi
call   1030 <MFRC522_WriteRegister@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MFRC522_Reset>:
mov    $0x1,%edi
mov    $0xf,%esi
jmp    1030 <MFRC522_WriteRegister@plt>

LLVM IR (-O0):
define void @MFRC522_Reset() {
%1 = call i32 @MFRC522_WriteRegister(i32 1, i32 15)
ret void
}

LLVM IR (-O2):
define void @MFRC522_Reset() {
%1 = tail call i32 @MFRC522_WriteRegister(i32 1, i32 15)
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ prg32setBank0(int);
void m34setParams8XXX(uint16_t addr, uint8_t val) {
  (void)addr;
  prg32setBank0((val & 0xF) << 15);
}


x86 assembly (clang, -O0):
<m34setParams8XXX>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
and    $0xf,%edi
shl    $0xf,%edi
call   1030 <prg32setBank0@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m34setParams8XXX>:
mov    %esi,%edi
and    $0xf,%edi
shl    $0xf,%edi
jmp    1030 <prg32setBank0@plt>

LLVM IR (-O0):
define void @m34setParams8XXX(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = and i32 %6, 15
%8 = shl i32 %7, 15
%9 = call i32 @prg32setBank0(i32 %8)
ret void
}

LLVM IR (-O2):
define void @m34setParams8XXX(i32 %0, i32 %1) {
%3 = shl i32 %1, 15
%4 = and i32 %3, 491520
%5 = tail call i32 @prg32setBank0(i32 %4)
ret void
}
/* Variables and functions */
char *getConfigText(char *, int);
scalar_t__ isDbOpen();
int /*<<< orphan*/ strcpy(char *, char *);
void getLogPath(char *path) {
  char *configValue;
  if ((isDbOpen() == 0) ||
      (configValue = getConfigText("cap.logpath", 1)) == NULL) {
    strcpy(path, "/var/log/bitmeter/"
                 "bitmeter.log");
  } else {
    strcpy(path, configValue);
  }
}


x86 assembly (clang, -O0):
<getLogPath>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <isDbOpen@plt>
cmp    $0x0,%rax
je     116c <getLogPath+0x3c>
lea    0xeac(%rip),%rdi
mov    $0x1,%esi
call   1030 <getConfigText@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    1181 <getLogPath+0x51>
mov    -0x8(%rbp),%rdi
lea    0xe95(%rip),%rsi
call   1050 <strcpy@plt>
jmp    118e <getLogPath+0x5e>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <strcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getLogPath>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <isDbOpen@plt>
test   %rax,%rax
je     1162 <getLogPath+0x32>
lea    0xeb9(%rip),%rdi
mov    $0x1,%esi
call   1030 <getConfigText@plt>
test   %rax,%rax
je     1162 <getLogPath+0x32>
mov    %rbx,%rdi
mov    %rax,%rsi
pop    %rbx
jmp    1050 <strcpy@plt>
lea    0xea3(%rip),%rsi
mov    %rbx,%rdi
pop    %rbx
jmp    1050 <strcpy@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"cap.logpath\00"
@.str.1 = [31 x i8] c"/var/log/bitmeter/bitmeter.log\00"
define void @getLogPath(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = call i64 (...) @isDbOpen()
%5 = icmp eq i64 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = call i8* @getConfigText(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 1)
store i8* %7, i8** %3
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %12
9: ; preds = %6, %1
%10 = load i8*, i8** %2
%11 = call i32 @strcpy(i8* %10, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.1, i64 0, i64 0))
br label %16
12: ; preds = %6
%13 = load i8*, i8** %2
%14 = load i8*, i8** %3
%15 = call i32 @strcpy(i8* %13, i8* %14)
br label %16
16: ; preds = %12, %9
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"cap.logpath\00"
@.str.1 = [31 x i8] c"/var/log/bitmeter/bitmeter.log\00"
define void @getLogPath(i8* %0) {
%2 = tail call i64 (...) @isDbOpen()
%3 = icmp eq i64 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i8* @getConfigText(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 1)
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %9
7: ; preds = %4, %1
%8 = tail call i32 @strcpy(i8* %0, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.1, i64 0, i64 0))
br label %11
9: ; preds = %4
%10 = tail call i32 @strcpy(i8* %0, i8* %5)
br label %11
11: ; preds = %9, %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *const, void *const, size_t const);
void cpintern_string_copy_cbuf(void *restrict const src,
                               char *restrict const tgt, size_t const l) {
  memcpy(tgt, src, l);
}


x86 assembly (clang, -O0):
<cpintern_string_copy_cbuf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpintern_string_copy_cbuf>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @cpintern_string_copy_cbuf(i8* noalias %0, i8* noalias %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i8*, i8** %4
%9 = load i64, i64* %6
%10 = call i32 @memcpy(i8* %7, i8* %8, i64 %9)
ret void
}

LLVM IR (-O2):
define void @cpintern_string_copy_cbuf(i8* noalias %0, i8* noalias %1, i64 %2) {
%4 = tail call i32 @memcpy(i8* %1, i8* %0, i64 %2)
ret void
}
/* Type definitions */
struct timespec {
  int dummy;
};
typedef int /*<<< orphan*/ sigset_t;
typedef int /*<<< orphan*/ siginfo_t;

/* Variables and functions */
int /*<<< orphan*/ sigemptyset(int /*<<< orphan*/ *);
int sigtimedwait(int /*<<< orphan*/ *, int /*<<< orphan*/ *, struct timespec *);
void test(void) {
  sigset_t set;
  siginfo_t info;
  struct timespec timeout;
  int result;
  (void)sigemptyset(&set);
  result = sigtimedwait(&set, &info, &timeout);
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x4(%rbp),%rdi
call   1040 <sigemptyset@plt>
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
lea    -0x10(%rbp),%rdx
call   1030 <sigtimedwait@plt>
mov    %eax,-0x14(%rbp)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
call   1040 <sigemptyset@plt>
lea    0x8(%rsp),%rsi
mov    %rsp,%rdx
mov    %rbx,%rdi
call   1030 <sigtimedwait@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
define void @test() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca %struct.timespec
%4 = alloca i32
%5 = call i32 @sigemptyset(i32* %1)
%6 = call i32 @sigtimedwait(i32* %1, i32* %2, %struct.timespec* %3)
store i32 %6, i32* %4
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
define void @test() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca %struct.timespec
%4 = bitcast i32* %1 to i8*
%5 = bitcast i32* %2 to i8*
%6 = bitcast %struct.timespec* %3 to i8*
%7 = call i32 @sigemptyset(i32* %1)
%8 = call i32 @sigtimedwait(i32* %1, i32* %2, %struct.timespec* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ srand(unsigned int);
scalar_t__ time(int /*<<< orphan*/ *);
void InitPetName() { srand((unsigned int)time(NULL)); }


x86 assembly (clang, -O0):
<InitPetName>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<InitPetName>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @InitPetName() {
%1 = call i64 @time(i32* null)
%2 = trunc i64 %1 to i32
%3 = call i32 @srand(i32 %2)
ret void
}

LLVM IR (-O2):
define void @InitPetName() {
%1 = tail call i64 @time(i32* null)
%2 = trunc i64 %1 to i32
%3 = tail call i32 @srand(i32 %2)
ret void
}
void gtk_tree_path_new_first() {}


x86 assembly (clang, -O0):
<gtk_tree_path_new_first>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_path_new_first>:
ret

LLVM IR (-O0):
define void @gtk_tree_path_new_first() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_path_new_first() {
ret void
}
int get_screen_offset(int col, int row) { return (row * 80 + col) << 1; }


x86 assembly (clang, -O0):
<get_screen_offset>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
imul   $0x50,-0x8(%rbp),%eax
add    -0x4(%rbp),%eax
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_screen_offset>:
lea    (%rsi,%rsi,4),%eax
shl    $0x4,%eax
add    %edi,%eax
add    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_screen_offset(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = mul nsw i32 %5, 80
%7 = load i32, i32* %3
%8 = add nsw i32 %6, %7
%9 = shl i32 %8, 1
ret i32 %9
}

LLVM IR (-O2):
define i32 @get_screen_offset(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, 80
%4 = add nsw i32 %3, %0
%5 = shl i32 %4, 1
ret i32 %5
}
/* Type definitions */
struct work_struct {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
bool schedule_work(struct work_struct *work) {
  assert(0);
  return true;
}


x86 assembly (clang, -O0):
<schedule_work>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
call   1030 <assert@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<schedule_work>:
push   %rax
xor    %edi,%edi
call   1030 <assert@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.work_struct = type { i32 }
define i32 @schedule_work(%struct.work_struct* %0) {
%2 = alloca %struct.work_struct*
store %struct.work_struct* %0, %struct.work_struct** %2
%3 = call i32 @assert(i32 0)
ret i32 1
}

LLVM IR (-O2):
%struct.work_struct = type { i32 }
define i32 @schedule_work(%struct.work_struct* nocapture readnone %0) {
%2 = tail call i32 @assert(i32 0)
ret i32 1
}
/* Variables and functions */
int ioctl(int, int, void *);
int iwinfo_ioctl_socket();
int iwinfo_ioctl(int cmd, void *ifr) {
  int s = iwinfo_ioctl_socket();
  return ioctl(s, cmd, ifr);
}


x86 assembly (clang, -O0):
<iwinfo_ioctl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <iwinfo_ioctl_socket@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1040 <ioctl@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iwinfo_ioctl>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <iwinfo_ioctl_socket@plt>
mov    %eax,%edi
mov    %ebp,%esi
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <ioctl@plt>

LLVM IR (-O0):
define i32 @iwinfo_ioctl(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = call i32 (...) @iwinfo_ioctl_socket()
store i32 %6, i32* %5
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = load i8*, i8** %4
%10 = call i32 @ioctl(i32 %7, i32 %8, i8* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @iwinfo_ioctl(i32 %0, i8* %1) {
%3 = tail call i32 (...) @iwinfo_ioctl_socket()
%4 = tail call i32 @ioctl(i32 %3, i32 %0, i8* %1)
ret i32 %4
}
int vga_setlinearaddressing(void) { return 0; }


x86 assembly (clang, -O0):
<vga_setlinearaddressing>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vga_setlinearaddressing>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @vga_setlinearaddressing() {
ret i32 0
}

LLVM IR (-O2):
define i32 @vga_setlinearaddressing() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned int);
unsigned int sleep(int);
int main(void) {
  unsigned int unslept = sleep(1);
  printf("unslept %d\n", unslept);
  return unslept == 0 ? 0 : 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
call   1040 <sleep@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmove  %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x1,%edi
call   1040 <sleep@plt>
mov    %eax,%ebx
lea    0xecc(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
test   %ebx,%ebx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"unslept %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @sleep(i32 1)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 0, i32 1
ret i32 %9
}

LLVM IR (-O2):
@.str = [12 x i8] c"unslept %d\0A\00"
define i32 @main() {
%1 = tail call i32 @sleep(i32 1)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = icmp ne i32 %1, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
void rcu_irq_enter(void) {}


x86 assembly (clang, -O0):
<rcu_irq_enter>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcu_irq_enter>:
ret

LLVM IR (-O0):
define void @rcu_irq_enter() {
ret void
}

LLVM IR (-O2):
define void @rcu_irq_enter() {
ret void
}
/* Type definitions */
struct event_base {
  int dummy;
};
typedef int /*<<< orphan*/ evutil_socket_t;

/* Variables and functions */
int /*<<< orphan*/ event_base_loopexit(struct event_base *,
                                       int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *);
void doexit(evutil_socket_t sig, short events, void *ptr) {
  printf("\nGot Signal!\n");
  ;
  struct event_base *base = (struct event_base *)ptr;
  event_base_loopexit(base, NULL);
}


x86 assembly (clang, -O0):
<doexit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %si,%ax
mov    %edi,-0x4(%rbp)
mov    %ax,-0x6(%rbp)
mov    %rdx,-0x10(%rbp)
lea    0xec3(%rip),%rdi
call   1040 <printf@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <event_base_loopexit@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<doexit>:
push   %rbx
mov    %rdx,%rbx
lea    0xed5(%rip),%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
xor    %esi,%esi
pop    %rbx
jmp    1040 <event_base_loopexit@plt>

LLVM IR (-O0):
%struct.event_base = type { i32 }
@.str = [14 x i8] c"\0AGot Signal!\0A\00"
define void @doexit(i32 %0, i16 signext %1, i8* %2) {
%4 = alloca i32
%5 = alloca i16
%6 = alloca i8*
%7 = alloca %struct.event_base*
store i32 %0, i32* %4
store i16 %1, i16* %5
store i8* %2, i8** %6
%8 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%9 = load i8*, i8** %6
%10 = bitcast i8* %9 to %struct.event_base*
store %struct.event_base* %10, %struct.event_base** %7
%11 = load %struct.event_base*, %struct.event_base** %7
%12 = call i32 @event_base_loopexit(%struct.event_base* %11, i32* null)
ret void
}

LLVM IR (-O2):
%struct.event_base = type { i32 }
@str = [13 x i8] c"\0AGot Signal!\00"
define void @doexit(i32 %0, i16 signext %1, i8* %2) {
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
%5 = bitcast i8* %2 to %struct.event_base*
%6 = tail call i32 @event_base_loopexit(%struct.event_base* %5, i32* null)
ret void
}
int flag_is_changeable_p(unsigned long flag) {
  unsigned long f1, f2;
  __asm__ volatile("pushf\n\t"
                   "pushf\n\t"
                   "pop %0\n\t"
                   "mov %0,%1\n\t"
                   "xor %2,%0\n\t"
                   "push %0\n\t"
                   "popf\n\t"
                   "pushf\n\t"
                   "pop %0\n\t"
                   "popf\n\t"
                   : "=&r"(f1), "=&r"(f2)
                   : "ir"(flag));
  return ((f1 ^ f2) & flag) != 0;
}


x86 assembly (clang, -O0):
<flag_is_changeable_p>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
pushf
pushf
pop    %rcx
mov    %rcx,%rax
xor    %rdx,%rcx
push   %rcx
popf
pushf
pop    %rcx
popf
mov    %rcx,-0x10(%rbp)
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
xor    -0x18(%rbp),%rax
and    -0x8(%rbp),%rax
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flag_is_changeable_p>:
pushf
pushf
pop    %rcx
mov    %rcx,%rax
xor    %rdi,%rcx
push   %rcx
popf
pushf
pop    %rcx
popf
xor    %rax,%rcx
xor    %eax,%eax
test   %rdi,%rcx
setne  %al
ret

LLVM IR (-O0):
define i32 @flag_is_changeable_p(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %2
%5 = load i64, i64* %2
%6 = call { i64, i64 } asm sideeffect "pushf\0A\09pushf\0A\09pop $0\0A\09mov $0,$1\0A\09xor $2,$0\0A\09push $0\0A\09popf\0A\09pushf\0A\09pop $0\0A\09popf\0A\09", "=&r,=&r,ir,~{dirflag},~{fpsr},~{flags}"(i64 %5)
%7 = extractvalue { i64, i64 } %6, 0
%8 = extractvalue { i64, i64 } %6, 1
store i64 %7, i64* %3
store i64 %8, i64* %4
%9 = load i64, i64* %3
%10 = load i64, i64* %4
%11 = xor i64 %9, %10
%12 = load i64, i64* %2
%13 = and i64 %11, %12
%14 = icmp ne i64 %13, 0
%15 = zext i1 %14 to i32
ret i32 %15
}

LLVM IR (-O2):
define i32 @flag_is_changeable_p(i64 %0) {
%2 = tail call { i64, i64 } asm sideeffect "pushf\0A\09pushf\0A\09pop $0\0A\09mov $0,$1\0A\09xor $2,$0\0A\09push $0\0A\09popf\0A\09pushf\0A\09pop $0\0A\09popf\0A\09", "=&r,=&r,ir,~{dirflag},~{fpsr},~{flags}"(i64 %0)
%3 = extractvalue { i64, i64 } %2, 0
%4 = extractvalue { i64, i64 } %2, 1
%5 = xor i64 %3, %4
%6 = and i64 %5, %0
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i32
ret i32 %8
}
int pow2(int in) { return in * in; }


x86 assembly (clang, -O0):
<pow2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pow2>:
mov    %edi,%eax
imul   %edi,%eax
ret

LLVM IR (-O0):
define i32 @pow2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @pow2(i32 %0) {
%2 = mul nsw i32 %0, %0
ret i32 %2
}
void otherAuton() {}


x86 assembly (clang, -O0):
<otherAuton>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<otherAuton>:
ret

LLVM IR (-O0):
define void @otherAuton() {
ret void
}

LLVM IR (-O2):
define void @otherAuton() {
ret void
}
double max(double x, double y) { return (x > y ? x : y); }


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    112d <max+0x2d>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1137 <max+0x37>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
maxsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @max(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp ogt double %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load double, double* %3
br label %12
10: ; preds = %2
%11 = load double, double* %4
br label %12
12: ; preds = %10, %8
%13 = phi double [ %9, %8 ], [ %11, %10 ]
ret double %13
}

LLVM IR (-O2):
define double @max(double %0, double %1) {
%3 = fcmp ogt double %0, %1
%4 = select i1 %3, double %0, double %1
ret double %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t npow2(uint32_t v) {
  v--;
  v |= v >> 1;
  v |= v >> 2;
  v |= v >> 4;
  v |= v >> 8;
  v |= v >> 16;
  v++;
  return v;
}


x86 assembly (clang, -O0):
<npow2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x2,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<npow2>:
lea    -0x1(%rdi),%eax
mov    %eax,%ecx
sar    %ecx
or     %eax,%ecx
mov    %ecx,%eax
sar    $0x2,%eax
or     %ecx,%eax
mov    %eax,%ecx
sar    $0x4,%ecx
or     %eax,%ecx
mov    %ecx,%edx
sar    $0x8,%edx
or     %ecx,%edx
mov    %edx,%eax
sar    $0x10,%eax
or     %edx,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @npow2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, -1
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = ashr i32 %5, 1
%7 = load i32, i32* %2
%8 = or i32 %7, %6
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = ashr i32 %9, 2
%11 = load i32, i32* %2
%12 = or i32 %11, %10
store i32 %12, i32* %2
%13 = load i32, i32* %2
%14 = ashr i32 %13, 4
%15 = load i32, i32* %2
%16 = or i32 %15, %14
store i32 %16, i32* %2
%17 = load i32, i32* %2
%18 = ashr i32 %17, 8
%19 = load i32, i32* %2
%20 = or i32 %19, %18
store i32 %20, i32* %2
%21 = load i32, i32* %2
%22 = ashr i32 %21, 16
%23 = load i32, i32* %2
%24 = or i32 %23, %22
store i32 %24, i32* %2
%25 = load i32, i32* %2
%26 = add nsw i32 %25, 1
store i32 %26, i32* %2
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @npow2(i32 %0) {
%2 = add nsw i32 %0, -1
%3 = ashr i32 %2, 1
%4 = or i32 %3, %2
%5 = ashr i32 %4, 2
%6 = or i32 %5, %4
%7 = ashr i32 %6, 4
%8 = or i32 %7, %6
%9 = ashr i32 %8, 8
%10 = or i32 %9, %8
%11 = ashr i32 %10, 16
%12 = or i32 %11, %10
%13 = add nsw i32 %12, 1
ret i32 %13
}
void ff_hevc_put_hevc_qpel_v48_10_avx2() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_qpel_v48_10_avx2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_qpel_v48_10_avx2>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_qpel_v48_10_avx2() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_qpel_v48_10_avx2() {
ret void
}
void hrtimer_cancel(void) { nsc_assert(0, __func__); }


x86 assembly (clang, -O0):
<hrtimer_cancel>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
mov    $0x0,%al
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hrtimer_cancel>:
lea    0xee9(%rip),%rsi
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
@__func__.hrtimer_cancel = [15 x i8] c"hrtimer_cancel\00"
define void @hrtimer_cancel() {
%1 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @__func__.hrtimer_cancel, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.hrtimer_cancel = [15 x i8] c"hrtimer_cancel\00"
define void @hrtimer_cancel() {
%1 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @__func__.hrtimer_cancel, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char, char);
int main() {
  printf("El %c = %d\n", 's', 's');
  printf("El %c = %d\n", 'o', 'o');
  printf("El %c = %d\n", '*', '*');
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x73,%edx
mov    %edx,%esi
call   1030 <printf@plt>
lea    0xec7(%rip),%rdi
mov    $0x6f,%edx
mov    %edx,%esi
call   1030 <printf@plt>
lea    0xeb4(%rip),%rdi
mov    $0x2a,%edx
mov    %edx,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0x73,%esi
mov    $0x73,%edx
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x6f,%esi
mov    $0x6f,%edx
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x2a,%esi
mov    $0x2a,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"El %c = %d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8 signext 115, i8 signext 115)
%3 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8 signext 111, i8 signext 111)
%4 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8 signext 42, i8 signext 42)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"El %c = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8 signext 115, i8 signext 115)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8 signext 111, i8 signext 111)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8 signext 42, i8 signext 42)
ret i32 0
}
int return_three() { return 3; }


x86 assembly (clang, -O0):
<return_three>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<return_three>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @return_three() {
ret i32 3
}

LLVM IR (-O2):
define i32 @return_three() {
ret i32 3
}
/* Variables and functions */
int /*<<< orphan*/ put8(unsigned int);
void mov_reg32_preg64(unsigned int reg1, unsigned int reg2) {
  put8(0x8B);
  put8((reg1 << 3) | reg2);
}


x86 assembly (clang, -O0):
<mov_reg32_preg64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x8b,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     -0x8(%rbp),%edi
call   1030 <put8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mov_reg32_preg64>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x8b,%edi
call   1030 <put8@plt>
shl    $0x3,%ebp
or     %ebx,%ebp
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @mov_reg32_preg64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @put8(i32 139)
%6 = load i32, i32* %3
%7 = shl i32 %6, 3
%8 = load i32, i32* %4
%9 = or i32 %7, %8
%10 = call i32 @put8(i32 %9)
ret void
}

LLVM IR (-O2):
define void @mov_reg32_preg64(i32 %0, i32 %1) {
%3 = tail call i32 @put8(i32 139)
%4 = shl i32 %0, 3
%5 = or i32 %4, %1
%6 = tail call i32 @put8(i32 %5)
ret void
}
int do_510() { return 510; }


x86 assembly (clang, -O0):
<do_510>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1fe,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_510>:
mov    $0x1fe,%eax
ret

LLVM IR (-O0):
define i32 @do_510() {
ret i32 510
}

LLVM IR (-O2):
define i32 @do_510() {
ret i32 510
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char const *, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void simple_write(const char *str) {
  fputs(str, stdout);
  fflush(stdout);
}


x86 assembly (clang, -O0):
<simple_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ea9(%rip),%rax
mov    (%rax),%esi
call   1030 <fputs@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<simple_write>:
push   %rbx
mov    0x2eb8(%rip),%rbx
mov    (%rbx),%esi
call   1030 <fputs@plt>
mov    (%rbx),%edi
pop    %rbx
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@stdout = global i32 0
define void @simple_write(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @stdout
%5 = call i32 @fputs(i8* %3, i32 %4)
%6 = load i32, i32* @stdout
%7 = call i32 @fflush(i32 %6)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @simple_write(i8* %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @fputs(i8* %0, i32 %2)
%4 = load i32, i32* @stdout
%5 = tail call i32 @fflush(i32 %4)
ret void
}
float _mul(float operando1, float operando2) { return operando1 * operando2; }


x86 assembly (clang, -O0):
<_mul>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mul>:
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @_mul(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fmul float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @_mul(float %0, float %1) {
%3 = fmul float %0, %1
ret float %3
}
int aesni_supported(void) {
  static int done = 0;
  static unsigned int c = 0;
  if (!done) {
    asm("movl  $1, %%eax   \n\t"
        "cpuid             \n\t"
        : "=c"(c)
        :
        : "eax", "ebx", "edx");
    done = 1;
  }
  return ((c & 0x02000000u) != 0);
}


x86 assembly (clang, -O0):
<aesni_supported>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
cmpl   $0x0,0x2f18(%rip)
jne    1129 <aesni_supported+0x29>
mov    $0x1,%eax
cpuid
mov    %ecx,0x2f09(%rip)
movl   $0x1,0x2efb(%rip)
mov    0x2ef9(%rip),%eax
and    $0x2000000,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<aesni_supported>:
push   %rbx
cmpb   $0x1,0x2f1c(%rip)
jne    1112 <aesni_supported+0x12>
mov    0x2f18(%rip),%eax
jmp    1128 <aesni_supported+0x28>
mov    $0x1,%eax
cpuid
mov    %ecx,%eax
mov    %ecx,0x2f07(%rip)
movb   $0x1,0x2efc(%rip)
shr    $0x19,%eax
and    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@aesni_supported.done = internal global i32 0
@aesni_supported.c = internal global i32 0
define i32 @aesni_supported() {
%1 = load i32, i32* @aesni_supported.done
%2 = icmp ne i32 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = call i32 asm "movl $$1, %eax \0A\09cpuid \0A\09", "={cx},~{eax},~{ebx},~{edx},~{dirflag},~{fpsr},~{flags}"()
store i32 %4, i32* @aesni_supported.c
store i32 1, i32* @aesni_supported.done
br label %5
5: ; preds = %3, %0
%6 = load i32, i32* @aesni_supported.c
%7 = and i32 %6, 33554432
%8 = icmp ne i32 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
@aesni_supported.done = internal unnamed_addr global i1 false
@aesni_supported.c = internal unnamed_addr global i32 0
define i32 @aesni_supported() {
%1 = load i1, i1* @aesni_supported.done
br i1 %1, label %2, label %4
2: ; preds = %0
%3 = load i32, i32* @aesni_supported.c
br label %6
4: ; preds = %0
%5 = tail call i32 asm "movl $$1, %eax \0A\09cpuid \0A\09", "={cx},~{eax},~{ebx},~{edx},~{dirflag},~{fpsr},~{flags}"()
store i32 %5, i32* @aesni_supported.c
store i1 true, i1* @aesni_supported.done
br label %6
6: ; preds = %2, %4
%7 = phi i32 [ %3, %2 ], [ %5, %4 ]
%8 = lshr i32 %7, 25
%9 = and i32 %8, 1
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ scanf(char *, int *);
int inputint(char *c, int num) {
  printf("Inserisci %s\n", c);
  scanf("%d", &num);
  return num;
}


x86 assembly (clang, -O0):
<inputint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
lea    0xec8(%rip),%rdi
lea    -0xc(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inputint>:
push   %rax
mov    %rdi,%rax
mov    %esi,0x4(%rsp)
lea    0xed1(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
lea    0xed0(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Inserisci %s\0A\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @inputint(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %4)
%8 = load i32, i32* %4
ret i32 %8
}

LLVM IR (-O2):
@.str = [14 x i8] c"Inserisci %s\0A\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @inputint(i8* %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %0)
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %3)
%6 = load i32, i32* %3
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ foo2();
void bar(void) { foo2(); }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <foo2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
xor    %eax,%eax
jmp    1030 <foo2@plt>

LLVM IR (-O0):
define void @bar() {
%1 = call i32 (...) @foo2()
ret void
}

LLVM IR (-O2):
define void @bar() {
%1 = tail call i32 (...) @foo2()
ret void
}
/* Variables and functions */
int i2c_smbus_read_byte_data(int, int);
int odroidI2CReadReg8(int fd, int reg) {
  return i2c_smbus_read_byte_data(fd, reg);
}


x86 assembly (clang, -O0):
<odroidI2CReadReg8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <i2c_smbus_read_byte_data@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<odroidI2CReadReg8>:
jmp    1030 <i2c_smbus_read_byte_data@plt>

LLVM IR (-O0):
define i32 @odroidI2CReadReg8(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @i2c_smbus_read_byte_data(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @odroidI2CReadReg8(i32 %0, i32 %1) {
%3 = tail call i32 @i2c_smbus_read_byte_data(i32 %0, i32 %1)
ret i32 %3
}
/* Type definitions */
typedef int gid_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
gid_t getegid(void) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<getegid>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec4(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getegid>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @getegid() {
%1 = load i32, i32* @ENOSYS
store i32 %1, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @getegid() {
%1 = load i32, i32* @ENOSYS
store i32 %1, i32* @errno
ret i32 -1
}
int test_imm_D5int32_mem(int *val) {
  return ((*val) & (0xD5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D5int32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xd5,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D5int32_mem>:
testb  $0xd5,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D5int32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 213
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D5int32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 213
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}