xunge/DecIR huggingface dataset:
unsigned int __read_4(void *ptr) {
  unsigned int data = *(unsigned int *)ptr;
  return data;
}


x86 assembly (clang, -O0):
<__read_4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__read_4>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @__read_4(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
%6 = load i32, i32* %5
store i32 %6, i32* %3
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @__read_4(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
ret i32 %3
}
float cubicEaseInf(float p) { return p * p * p; }


x86 assembly (clang, -O0):
<cubicEaseInf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<cubicEaseInf>:
movaps %xmm0,%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @cubicEaseInf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fmul float %3, %4
%6 = load float, float* %2
%7 = fmul float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @cubicEaseInf(float %0) {
%2 = fmul float %0, %0
%3 = fmul float %2, %0
ret float %3
}
/* Type definitions */
struct genlist {
  int dummy;
};
struct entry_list_link {
  int dummy;
};
struct entry_list {
  int dummy;
};

/* Variables and functions */
scalar_t__ genlist_head(struct genlist const *);
struct entry_list_link *entry_list_head(const struct entry_list *tthis) {
  return (struct entry_list_link *)genlist_head((const struct genlist *)tthis);
}


x86 assembly (clang, -O0):
<entry_list_head>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <genlist_head@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<entry_list_head>:
jmp    1030 <genlist_head@plt>

LLVM IR (-O0):
%struct.entry_list_link = type { i32 }
%struct.entry_list = type { i32 }
%struct.genlist = type { i32 }
define %struct.entry_list_link* @entry_list_head(%struct.entry_list* %0) {
%2 = alloca %struct.entry_list*
store %struct.entry_list* %0, %struct.entry_list** %2
%3 = load %struct.entry_list*, %struct.entry_list** %2
%4 = bitcast %struct.entry_list* %3 to %struct.genlist*
%5 = call i64 @genlist_head(%struct.genlist* %4)
%6 = inttoptr i64 %5 to %struct.entry_list_link*
ret %struct.entry_list_link* %6
}

LLVM IR (-O2):
%struct.entry_list_link = type { i32 }
%struct.entry_list = type { i32 }
%struct.genlist = type { i32 }
define %struct.entry_list_link* @entry_list_head(%struct.entry_list* %0) {
%2 = bitcast %struct.entry_list* %0 to %struct.genlist*
%3 = tail call i64 @genlist_head(%struct.genlist* %2)
%4 = inttoptr i64 %3 to %struct.entry_list_link*
ret %struct.entry_list_link* %4
}
void machine_info() {}


x86 assembly (clang, -O0):
<machine_info>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<machine_info>:
ret

LLVM IR (-O0):
define void @machine_info() {
ret void
}

LLVM IR (-O2):
define void @machine_info() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ WrError(int);
int AddrError(int Num) {
  WrError(Num);
  return -1;
}


x86 assembly (clang, -O0):
<AddrError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <WrError@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AddrError>:
push   %rax
call   1030 <WrError@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @AddrError(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @WrError(i32 %3)
ret i32 -1
}

LLVM IR (-O2):
define i32 @AddrError(i32 %0) {
%2 = tail call i32 @WrError(i32 %0)
ret i32 -1
}
int sub_lib_method() { return 1337; }


x86 assembly (clang, -O0):
<sub_lib_method>:
push   %rbp
mov    %rsp,%rbp
mov    $0x539,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub_lib_method>:
mov    $0x539,%eax
ret

LLVM IR (-O0):
define i32 @sub_lib_method() {
ret i32 1337
}

LLVM IR (-O2):
define i32 @sub_lib_method() {
ret i32 1337
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void init(uint32_t *a0, uint32_t *a1) {
  *a0 = 0;
  *a1 = 1;
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
movl   $0x0,(%rdi)
movl   $0x1,(%rsi)
ret

LLVM IR (-O0):
define void @init(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
store i32 0, i32* %5
%6 = load i32*, i32** %4
store i32 1, i32* %6
ret void
}

LLVM IR (-O2):
define void @init(i32* nocapture writeonly %0, i32* nocapture writeonly %1) {
store i32 0, i32* %0
store i32 1, i32* %1
ret void
}
/* Type definitions */
typedef scalar_t__ const wchar_t;

/* Variables and functions */
wchar_t *wcschr(const wchar_t *hay, wchar_t ned) {
  while (*hay) {
    if (*hay == ned)
      return (wchar_t *)hay;
    hay++;
  }
  return NULL;
}


x86 assembly (clang, -O0):
<wcschr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
je     1149 <wcschr+0x49>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
cmp    -0x18(%rbp),%rax
jne    1138 <wcschr+0x38>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1151 <wcschr+0x51>
mov    -0x10(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x10(%rbp)
jmp    110c <wcschr+0xc>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcschr>:
mov    (%rdi),%rcx
test   %rcx,%rcx
je     1122 <wcschr+0x22>
mov    %rdi,%rax
nopl   0x0(%rax,%rax,1)
cmp    %rsi,%rcx
je     1124 <wcschr+0x24>
mov    0x8(%rax),%rcx
add    $0x8,%rax
test   %rcx,%rcx
jne    1110 <wcschr+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64* @wcschr(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64*
%5 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
br label %6
6: ; preds = %17, %2
%7 = load i64*, i64** %4
%8 = load i64, i64* %7
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i64*, i64** %4
%12 = load i64, i64* %11
%13 = load i64, i64* %5
%14 = icmp eq i64 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %10
%16 = load i64*, i64** %4
store i64* %16, i64** %3
br label %21
17: ; preds = %10
%18 = load i64*, i64** %4
%19 = getelementptr inbounds i64, i64* %18, i32 1
store i64* %19, i64** %4
br label %6
20: ; preds = %6
store i64* null, i64** %3
br label %21
21: ; preds = %20, %15
%22 = load i64*, i64** %3
ret i64* %22
}

LLVM IR (-O2):
define i64* @wcschr(i64* %0, i64 %1) {
%3 = load i64, i64* %0
%4 = icmp eq i64 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %9
%6 = phi i64 [ %11, %9 ], [ %3, %2 ]
%7 = phi i64* [ %10, %9 ], [ %0, %2 ]
%8 = icmp eq i64 %6, %1
br i1 %8, label %13, label %9
9: ; preds = %5
%10 = getelementptr inbounds i64, i64* %7, i64 1
%11 = load i64, i64* %10
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %9, %2
%14 = phi i64* [ null, %2 ], [ null, %9 ], [ %7, %5 ]
ret i64* %14
}
/* Variables and functions */
int htoi(char *);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  printf("\n%d\n", htoi("49276d206b696c6c696e6720796f757220627261696e206c696b65"
                        "206120706f69736f6e6f7573206d757368726f6f6d"));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xecf(%rip),%rdi
call   1040 <htoi@plt>
mov    %eax,%esi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xedd(%rip),%rdi
call   1040 <htoi@plt>
lea    0xecc(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"\0A%d\0A\00"
@.str.1 = [97 x i8] c"49276d206b696c6c696e6720796f757220627261696e206c696b65206120706f69736f6e6f7573206d757368726f6f6d\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @htoi(i8* getelementptr inbounds ([97 x i8], [97 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"\0A%d\0A\00"
@.str.1 = [97 x i8] c"49276d206b696c6c696e6720796f757220627261696e206c696b65206120706f69736f6e6f7573206d757368726f6f6d\00"
define i32 @main() {
%1 = tail call i32 @htoi(i8* getelementptr inbounds ([97 x i8], [97 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
int fn1(p1) { return 1 >> p1; }


x86 assembly (clang, -O0):
<fn1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x1,%eax
sar    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn1>:
mov    %edi,%ecx
mov    $0x1,%eax
shr    %cl,%eax
ret

LLVM IR (-O0):
define i32 @fn1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 1, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @fn1(i32 %0) {
%2 = lshr i32 1, %0
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ mvaddch(int, int, char);
int seas(void) {
  mvaddch(4, 1, 'S');
  mvaddch(6, 1, 'E');
  mvaddch(8, 1, 'A');
  mvaddch(10, 1, 'S');
  mvaddch(12, 1, 'O');
  mvaddch(14, 1, 'N');
  mvaddch(16, 1, '`');
  mvaddch(18, 1, 'S');
  return (0);
}


x86 assembly (clang, -O0):
<seas>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
mov    $0x1,%esi
mov    $0x53,%edx
call   1030 <mvaddch@plt>
mov    $0x6,%edi
mov    $0x1,%esi
mov    $0x45,%edx
call   1030 <mvaddch@plt>
mov    $0x8,%edi
mov    $0x1,%esi
mov    $0x41,%edx
call   1030 <mvaddch@plt>
mov    $0xa,%edi
mov    $0x1,%esi
mov    $0x53,%edx
call   1030 <mvaddch@plt>
mov    $0xc,%edi
mov    $0x1,%esi
mov    $0x4f,%edx
call   1030 <mvaddch@plt>
mov    $0xe,%edi
mov    $0x1,%esi
mov    $0x4e,%edx
call   1030 <mvaddch@plt>
mov    $0x10,%edi
mov    $0x1,%esi
mov    $0x60,%edx
call   1030 <mvaddch@plt>
mov    $0x12,%edi
mov    $0x1,%esi
mov    $0x53,%edx
call   1030 <mvaddch@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<seas>:
push   %rax
mov    $0x4,%edi
mov    $0x1,%esi
mov    $0x53,%edx
call   1030 <mvaddch@plt>
mov    $0x6,%edi
mov    $0x1,%esi
mov    $0x45,%edx
call   1030 <mvaddch@plt>
mov    $0x8,%edi
mov    $0x1,%esi
mov    $0x41,%edx
call   1030 <mvaddch@plt>
mov    $0xa,%edi
mov    $0x1,%esi
mov    $0x53,%edx
call   1030 <mvaddch@plt>
mov    $0xc,%edi
mov    $0x1,%esi
mov    $0x4f,%edx
call   1030 <mvaddch@plt>
mov    $0xe,%edi
mov    $0x1,%esi
mov    $0x4e,%edx
call   1030 <mvaddch@plt>
mov    $0x10,%edi
mov    $0x1,%esi
mov    $0x60,%edx
call   1030 <mvaddch@plt>
mov    $0x12,%edi
mov    $0x1,%esi
mov    $0x53,%edx
call   1030 <mvaddch@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @seas() {
%1 = call i32 @mvaddch(i32 4, i32 1, i8 signext 83)
%2 = call i32 @mvaddch(i32 6, i32 1, i8 signext 69)
%3 = call i32 @mvaddch(i32 8, i32 1, i8 signext 65)
%4 = call i32 @mvaddch(i32 10, i32 1, i8 signext 83)
%5 = call i32 @mvaddch(i32 12, i32 1, i8 signext 79)
%6 = call i32 @mvaddch(i32 14, i32 1, i8 signext 78)
%7 = call i32 @mvaddch(i32 16, i32 1, i8 signext 96)
%8 = call i32 @mvaddch(i32 18, i32 1, i8 signext 83)
ret i32 0
}

LLVM IR (-O2):
define i32 @seas() {
%1 = tail call i32 @mvaddch(i32 4, i32 1, i8 signext 83)
%2 = tail call i32 @mvaddch(i32 6, i32 1, i8 signext 69)
%3 = tail call i32 @mvaddch(i32 8, i32 1, i8 signext 65)
%4 = tail call i32 @mvaddch(i32 10, i32 1, i8 signext 83)
%5 = tail call i32 @mvaddch(i32 12, i32 1, i8 signext 79)
%6 = tail call i32 @mvaddch(i32 14, i32 1, i8 signext 78)
%7 = tail call i32 @mvaddch(i32 16, i32 1, i8 signext 96)
%8 = tail call i32 @mvaddch(i32 18, i32 1, i8 signext 83)
ret i32 0
}
unsigned int pop2(unsigned int x) {
  unsigned int n;
  n = (x >> 1) & 0x77777777;
  x -= n;
  n = (x >> 1) & 0x77777777;
  x -= n;
  n = (x >> 1) & 0x77777777;
  x -= n;
  x = (x + (x >> 4)) & 0x0F0F0F0F;
  x *= 0x01010101;
  return x >> 24;
}


x86 assembly (clang, -O0):
<pop2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
and    $0x77777777,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
and    $0x77777777,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
and    $0x77777777,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
shr    $0x4,%ecx
add    %ecx,%eax
and    $0xf0f0f0f,%eax
mov    %eax,-0x4(%rbp)
imul   $0x1010101,-0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x18,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pop2>:
mov    %edi,%eax
shr    %eax
and    $0x77777777,%eax
sub    %eax,%edi
mov    %edi,%eax
shr    %eax
and    $0x77777777,%eax
sub    %eax,%edi
mov    %edi,%eax
shr    %eax
and    $0x77777777,%eax
sub    %eax,%edi
mov    %edi,%eax
shr    $0x4,%eax
add    %edi,%eax
and    $0xf0f0f0f,%eax
imul   $0x1010101,%eax,%eax
shr    $0x18,%eax
ret

LLVM IR (-O0):
define i32 @pop2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = lshr i32 %4, 1
%6 = and i32 %5, 2004318071
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = load i32, i32* %2
%9 = sub i32 %8, %7
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = lshr i32 %10, 1
%12 = and i32 %11, 2004318071
store i32 %12, i32* %3
%13 = load i32, i32* %3
%14 = load i32, i32* %2
%15 = sub i32 %14, %13
store i32 %15, i32* %2
%16 = load i32, i32* %2
%17 = lshr i32 %16, 1
%18 = and i32 %17, 2004318071
store i32 %18, i32* %3
%19 = load i32, i32* %3
%20 = load i32, i32* %2
%21 = sub i32 %20, %19
store i32 %21, i32* %2
%22 = load i32, i32* %2
%23 = load i32, i32* %2
%24 = lshr i32 %23, 4
%25 = add i32 %22, %24
%26 = and i32 %25, 252645135
store i32 %26, i32* %2
%27 = load i32, i32* %2
%28 = mul i32 %27, 16843009
store i32 %28, i32* %2
%29 = load i32, i32* %2
%30 = lshr i32 %29, 24
ret i32 %30
}

LLVM IR (-O2):
define i32 @pop2(i32 %0) {
%2 = lshr i32 %0, 1
%3 = and i32 %2, 2004318071
%4 = sub i32 %0, %3
%5 = lshr i32 %4, 1
%6 = and i32 %5, 2004318071
%7 = sub i32 %4, %6
%8 = lshr i32 %7, 1
%9 = and i32 %8, 2004318071
%10 = sub i32 %7, %9
%11 = lshr i32 %10, 4
%12 = add i32 %11, %10
%13 = and i32 %12, 252645135
%14 = mul i32 %13, 16843009
%15 = lshr i32 %14, 24
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *malloc(int);
void process_something(int size) {
  if (size < 0)
    return;
  if (size > size + 2)
    return;
  char *string = malloc(2);
  string[0] = 'f';
  if (string)
    free(string);
}


x86 assembly (clang, -O0):
<process_something>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    113a <process_something+0x1a>
jmp    1179 <process_something+0x59>
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
add    $0x2,%ecx
cmp    %ecx,%eax
jle    1150 <process_something+0x30>
jmp    1179 <process_something+0x59>
mov    $0x2,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movb   $0x66,(%rax)
cmpq   $0x0,-0x10(%rbp)
je     1179 <process_something+0x59>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<process_something>:
test   %edi,%edi
js     113b <process_something+0x1b>
push   %rax
mov    $0x2,%edi
call   1040 <malloc@plt>
movb   $0x66,(%rax)
mov    %rax,%rdi
pop    %rax
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @process_something(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
br label %22
7: ; preds = %1
%8 = load i32, i32* %2
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 2
%11 = icmp sgt i32 %8, %10
br i1 %11, label %12, label %13
12: ; preds = %7
br label %22
13: ; preds = %7
%14 = call i8* @malloc(i32 2)
store i8* %14, i8** %3
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i64 0
store i8 102, i8* %16
%17 = load i8*, i8** %3
%18 = icmp ne i8* %17, null
br i1 %18, label %19, label %22
19: ; preds = %13
%20 = load i8*, i8** %3
%21 = call i32 @free(i8* %20)
br label %22
22: ; preds = %6, %12, %19, %13
ret void
}

LLVM IR (-O2):
define void @process_something(i32 %0) {
%2 = icmp slt i32 %0, 0
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call dereferenceable_or_null(2) i8* @malloc(i32 2)
store i8 102, i8* %4
%5 = tail call i32 @free(i8* %4)
br label %6
6: ; preds = %1, %3
ret void
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int stat(char const *, struct stat *);
int sys_isfile(const char *filename) {
  int ret;
  struct stat tmp;
  ret = stat(filename, &tmp);
  if (ret == -1)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<sys_isfile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <stat@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xffffffff,-0x14(%rbp)
jne    1142 <sys_isfile+0x32>
movl   $0x0,-0x4(%rbp)
jmp    1149 <sys_isfile+0x39>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_isfile>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @sys_isfile(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
%5 = alloca %struct.stat
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @stat(i8* %6, %struct.stat* %5)
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = icmp eq i32 %8, -1
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 0, i32* %2
br label %12
11: ; preds = %1
store i32 1, i32* %2
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @sys_isfile(i8* nocapture %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i32 @stat(i8* %0, %struct.stat* %2)
%5 = icmp ne i32 %4, -1
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int vlist_inq_att(int, int, int, char const *, size_t, double *);
int vlistInqAttFlt(int vlistID, int varID, const char *name, int mlen,
                   double *dp) {
  return vlist_inq_att(252, vlistID, varID, name, (size_t)mlen * sizeof(double),
                       dp);
}


x86 assembly (clang, -O0):
<vlistInqAttFlt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0x10(%rbp),%rcx
movslq -0x14(%rbp),%r8
shl    $0x3,%r8
mov    -0x20(%rbp),%r9
mov    $0xfc,%edi
call   1030 <vlist_inq_att@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vlistInqAttFlt>:
mov    %r8,%r9
mov    %rdx,%rax
mov    %esi,%edx
mov    %edi,%esi
movslq %ecx,%r8
shl    $0x3,%r8
mov    $0xfc,%edi
mov    %rax,%rcx
jmp    1030 <vlist_inq_att@plt>

LLVM IR (-O0):
define i32 @vlistInqAttFlt(i32 %0, i32 %1, i8* %2, i32 %3, double* %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
%10 = alloca double*
store i32 %0, i32* %6
store i32 %1, i32* %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store double* %4, double** %10
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i8*, i8** %8
%14 = load i32, i32* %9
%15 = sext i32 %14 to i64
%16 = mul i64 %15, 8
%17 = load double*, double** %10
%18 = call i32 @vlist_inq_att(i32 252, i32 %11, i32 %12, i8* %13, i64 %16, double* %17)
ret i32 %18
}

LLVM IR (-O2):
define i32 @vlistInqAttFlt(i32 %0, i32 %1, i8* %2, i32 %3, double* %4) {
%6 = sext i32 %3 to i64
%7 = shl nsw i64 %6, 3
%8 = tail call i32 @vlist_inq_att(i32 252, i32 %0, i32 %1, i8* %2, i64 %7, double* %4)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void efree(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<efree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<efree>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @efree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @efree(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
int dect_is_RFPI_Packet(unsigned char *packet) {
  if ((packet[5] & 0xe0) == 0x60)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<dect_is_RFPI_Packet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movzbl 0x5(%rax),%eax
and    $0xe0,%eax
cmp    $0x60,%eax
jne    112a <dect_is_RFPI_Packet+0x2a>
movl   $0x1,-0x4(%rbp)
jmp    1131 <dect_is_RFPI_Packet+0x31>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dect_is_RFPI_Packet>:
mov    0x5(%rdi),%cl
and    $0xe0,%cl
xor    %eax,%eax
cmp    $0x60,%cl
sete   %al
ret

LLVM IR (-O0):
define i32 @dect_is_RFPI_Packet(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8, i8* %4, i64 5
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = and i32 %7, 224
%9 = icmp eq i32 %8, 96
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 1, i32* %2
br label %12
11: ; preds = %1
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @dect_is_RFPI_Packet(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 5
%3 = load i8, i8* %2
%4 = and i8 %3, -32
%5 = icmp eq i8 %4, 96
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Type definitions */
struct timespec {
  int dummy;
};
typedef int /*<<< orphan*/ clockid_t;

/* Variables and functions */
int /*<<< orphan*/ SYS_clock_gettime;
int syscall(int /*<<< orphan*/, int /*<<< orphan*/, struct timespec *);
int clock_gettime_syscall_wrapper(clockid_t id, struct timespec *ts) {
  return syscall(SYS_clock_gettime, id, ts);
}


x86 assembly (clang, -O0):
<clock_gettime_syscall_wrapper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eca(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clock_gettime_syscall_wrapper>:
mov    %rsi,%rdx
mov    %edi,%esi
mov    0x2ed4(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.timespec = type { i32 }
@SYS_clock_gettime = global i32 0
define i32 @clock_gettime_syscall_wrapper(i32 %0, %struct.timespec* %1) {
%3 = alloca i32
%4 = alloca %struct.timespec*
store i32 %0, i32* %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load i32, i32* @SYS_clock_gettime
%6 = load i32, i32* %3
%7 = load %struct.timespec*, %struct.timespec** %4
%8 = call i32 @syscall(i32 %5, i32 %6, %struct.timespec* %7)
ret i32 %8
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@SYS_clock_gettime = global i32 0
define i32 @clock_gettime_syscall_wrapper(i32 %0, %struct.timespec* %1) {
%3 = load i32, i32* @SYS_clock_gettime
%4 = tail call i32 @syscall(i32 %3, i32 %0, %struct.timespec* %1)
ret i32 %4
}
void pred_constant_free(const struct XCSF *xcsf, const struct Cl *c) {
  (void)xcsf;
  (void)c;
}


x86 assembly (clang, -O0):
<pred_constant_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pred_constant_free>:
ret

LLVM IR (-O0):
%struct.XCSF = type opaque
%struct.Cl = type opaque
define void @pred_constant_free(%struct.XCSF* %0, %struct.Cl* %1) {
%3 = alloca %struct.XCSF*
%4 = alloca %struct.Cl*
store %struct.XCSF* %0, %struct.XCSF** %3
store %struct.Cl* %1, %struct.Cl** %4
%5 = load %struct.XCSF*, %struct.XCSF** %3
%6 = load %struct.Cl*, %struct.Cl** %4
ret void
}

LLVM IR (-O2):
%struct.XCSF = type opaque
%struct.Cl = type opaque
define void @pred_constant_free(%struct.XCSF* nocapture %0, %struct.Cl* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ getegid();
int /*<<< orphan*/ geteuid();
int /*<<< orphan*/ getgid();
int /*<<< orphan*/ getpgid(int /*<<< orphan*/);
int /*<<< orphan*/ getpid();
int /*<<< orphan*/ getppid();
int /*<<< orphan*/ getsid(int /*<<< orphan*/);
int /*<<< orphan*/ getuid();
int main(int argc, char *argv[]) {
  getpid();
  getppid();
  getpgid(0);
  getsid(0);
  getuid();
  geteuid();
  getgid();
  getegid();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    $0x0,%al
call   10a0 <getppid@plt>
xor    %edi,%edi
call   1090 <getpgid@plt>
xor    %edi,%edi
call   1050 <getsid@plt>
mov    $0x0,%al
call   1040 <getuid@plt>
mov    $0x0,%al
call   1060 <geteuid@plt>
mov    $0x0,%al
call   1070 <getgid@plt>
mov    $0x0,%al
call   1080 <getegid@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <getpid@plt>
xor    %eax,%eax
call   10a0 <getppid@plt>
xor    %edi,%edi
call   1090 <getpgid@plt>
xor    %edi,%edi
call   1050 <getsid@plt>
xor    %eax,%eax
call   1040 <getuid@plt>
xor    %eax,%eax
call   1060 <geteuid@plt>
xor    %eax,%eax
call   1070 <getgid@plt>
xor    %eax,%eax
call   1080 <getegid@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @getpid()
%7 = call i32 (...) @getppid()
%8 = call i32 @getpgid(i32 0)
%9 = call i32 @getsid(i32 0)
%10 = call i32 (...) @getuid()
%11 = call i32 (...) @geteuid()
%12 = call i32 (...) @getgid()
%13 = call i32 (...) @getegid()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @getpid()
%4 = tail call i32 (...) @getppid()
%5 = tail call i32 @getpgid(i32 0)
%6 = tail call i32 @getsid(i32 0)
%7 = tail call i32 (...) @getuid()
%8 = tail call i32 (...) @geteuid()
%9 = tail call i32 (...) @getgid()
%10 = tail call i32 (...) @getegid()
ret i32 0
}
/* Type definitions */
struct ibv_qp_init_attr {
  int dummy;
};
struct ibv_qp {
  int dummy;
};
struct ibv_pd {
  int dummy;
};

/* Variables and functions */
struct ibv_qp *_create_qp(struct ibv_pd *, struct ibv_qp_init_attr *);
int /*<<< orphan*/ dmtcp_plugin_disable_ckpt();
int /*<<< orphan*/ dmtcp_plugin_enable_ckpt();
struct ibv_qp *ibv_create_qp(struct ibv_pd *pd,
                             struct ibv_qp_init_attr *qp_init_attr) {
  dmtcp_plugin_disable_ckpt();
  struct ibv_qp *user_copy = _create_qp(pd, qp_init_attr);
  dmtcp_plugin_enable_ckpt();
  return user_copy;
}


x86 assembly (clang, -O0):
<ibv_create_qp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <dmtcp_plugin_disable_ckpt@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <_create_qp@plt>
mov    %rax,-0x18(%rbp)
mov    $0x0,%al
call   1050 <dmtcp_plugin_enable_ckpt@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ibv_create_qp>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <dmtcp_plugin_disable_ckpt@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <_create_qp@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1050 <dmtcp_plugin_enable_ckpt@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.ibv_qp = type { i32 }
%struct.ibv_pd = type { i32 }
%struct.ibv_qp_init_attr = type { i32 }
define %struct.ibv_qp* @ibv_create_qp(%struct.ibv_pd* %0, %struct.ibv_qp_init_attr* %1) {
%3 = alloca %struct.ibv_pd*
%4 = alloca %struct.ibv_qp_init_attr*
%5 = alloca %struct.ibv_qp*
store %struct.ibv_pd* %0, %struct.ibv_pd** %3
store %struct.ibv_qp_init_attr* %1, %struct.ibv_qp_init_attr** %4
%6 = call i32 (...) @dmtcp_plugin_disable_ckpt()
%7 = load %struct.ibv_pd*, %struct.ibv_pd** %3
%8 = load %struct.ibv_qp_init_attr*, %struct.ibv_qp_init_attr** %4
%9 = call %struct.ibv_qp* @_create_qp(%struct.ibv_pd* %7, %struct.ibv_qp_init_attr* %8)
store %struct.ibv_qp* %9, %struct.ibv_qp** %5
%10 = call i32 (...) @dmtcp_plugin_enable_ckpt()
%11 = load %struct.ibv_qp*, %struct.ibv_qp** %5
ret %struct.ibv_qp* %11
}

LLVM IR (-O2):
%struct.ibv_qp = type { i32 }
%struct.ibv_pd = type { i32 }
%struct.ibv_qp_init_attr = type { i32 }
define %struct.ibv_qp* @ibv_create_qp(%struct.ibv_pd* %0, %struct.ibv_qp_init_attr* %1) {
%3 = tail call i32 (...) @dmtcp_plugin_disable_ckpt()
%4 = tail call %struct.ibv_qp* @_create_qp(%struct.ibv_pd* %0, %struct.ibv_qp_init_attr* %1)
%5 = tail call i32 (...) @dmtcp_plugin_enable_ckpt()
ret %struct.ibv_qp* %4
}
void endTerm() {}


x86 assembly (clang, -O0):
<endTerm>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<endTerm>:
ret

LLVM IR (-O0):
define void @endTerm() {
ret void
}

LLVM IR (-O2):
define void @endTerm() {
ret void
}
int charIn(char c, char *choices) {
  char *x = choices;
  do {
    if (*(x++) == c)
      return x - choices;
  } while (*x);
  return 0;
}


x86 assembly (clang, -O0):
<charIn>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
movsbl (%rax),%eax
movsbl -0x5(%rbp),%ecx
cmp    %ecx,%eax
jne    1147 <charIn+0x47>
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
mov    %eax,-0x4(%rbp)
jmp    1160 <charIn+0x60>
jmp    114c <charIn+0x4c>
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
jne    1116 <charIn+0x16>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<charIn>:
mov    (%rsi),%cl
mov    $0x1,%eax
nopw   0x0(%rax,%rax,1)
cmp    %dil,%cl
je     1123 <charIn+0x23>
movzbl (%rsi,%rax,1),%ecx
add    $0x1,%rax
test   %cl,%cl
jne    1110 <charIn+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @charIn(i8 signext %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i8*
%6 = alloca i8*
store i8 %0, i8* %4
store i8* %1, i8** %5
%7 = load i8*, i8** %5
store i8* %7, i8** %6
br label %8
8: ; preds = %24, %2
%9 = load i8*, i8** %6
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %6
%11 = load i8, i8* %9
%12 = sext i8 %11 to i32
%13 = load i8, i8* %4
%14 = sext i8 %13 to i32
%15 = icmp eq i32 %12, %14
br i1 %15, label %16, label %23
16: ; preds = %8
%17 = load i8*, i8** %6
%18 = load i8*, i8** %5
%19 = ptrtoint i8* %17 to i64
%20 = ptrtoint i8* %18 to i64
%21 = sub i64 %19, %20
%22 = trunc i64 %21 to i32
store i32 %22, i32* %3
br label %29
23: ; preds = %8
br label %24
24: ; preds = %23
%25 = load i8*, i8** %6
%26 = load i8, i8* %25
%27 = icmp ne i8 %26, 0
br i1 %27, label %8, label %28
28: ; preds = %24
store i32 0, i32* %3
br label %29
29: ; preds = %28, %16
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @charIn(i8 signext %0, i8* %1) {
%3 = load i8, i8* %1
br label %4
4: ; preds = %14, %2
%5 = phi i8 [ %3, %2 ], [ %15, %14 ]
%6 = phi i8* [ %1, %2 ], [ %7, %14 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = icmp eq i8 %5, %0
br i1 %8, label %9, label %14
9: ; preds = %4
%10 = ptrtoint i8* %7 to i64
%11 = ptrtoint i8* %1 to i64
%12 = sub i64 %10, %11
%13 = trunc i64 %12 to i32
br label %17
14: ; preds = %4
%15 = load i8, i8* %7
%16 = icmp eq i8 %15, 0
br i1 %16, label %17, label %4
17: ; preds = %14, %9
%18 = phi i32 [ %13, %9 ], [ 0, %14 ]
ret i32 %18
}
/* Type definitions */
typedef int /*<<< orphan*/ FTSENT;

/* Variables and functions */
int modcmp(int /*<<< orphan*/ const *, int /*<<< orphan*/ const *);
int revmodcmp(const FTSENT *a, const FTSENT *b) { return (modcmp(b, a)); }


x86 assembly (clang, -O0):
<revmodcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <modcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<revmodcmp>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
jmp    1030 <modcmp@plt>

LLVM IR (-O0):
define i32 @revmodcmp(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = load i32*, i32** %3
%7 = call i32 @modcmp(i32* %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @revmodcmp(i32* %0, i32* %1) {
%3 = tail call i32 @modcmp(i32* %1, i32* %0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ syscall1(int);
void idle() { syscall1(505); }


x86 assembly (clang, -O0):
<idle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1f9,%edi
call   1030 <syscall1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<idle>:
mov    $0x1f9,%edi
jmp    1030 <syscall1@plt>

LLVM IR (-O0):
define void @idle() {
%1 = call i32 @syscall1(i32 505)
ret void
}

LLVM IR (-O2):
define void @idle() {
%1 = tail call i32 @syscall1(i32 505)
ret void
}
int ref_macc(int a, int b, int *accum, _Bool accum_clr) {
  static acc_reg = 0;
  if (accum_clr)
    acc_reg = 0;
  acc_reg += a * b;
  *accum = acc_reg;
}


x86 assembly (clang, -O0):
<ref_macc>:
push   %rbp
mov    %rsp,%rbp
mov    %cl,%al
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
and    $0x1,%al
mov    %al,-0x19(%rbp)
testb  $0x1,-0x19(%rbp)
je     1129 <ref_macc+0x29>
movl   $0x0,0x2efb(%rip)
mov    -0x8(%rbp),%eax
imul   -0xc(%rbp),%eax
add    0x2eee(%rip),%eax
mov    %eax,0x2ee8(%rip)
mov    0x2ee2(%rip),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ref_macc>:
xor    %eax,%eax
test   %ecx,%ecx
jne    110c <ref_macc+0xc>
mov    0x2f18(%rip),%eax
imul   %edi,%esi
add    %eax,%esi
mov    %esi,0x2f0d(%rip)
mov    %esi,(%rdx)
ret

LLVM IR (-O0):
@ref_macc.acc_reg = internal global i32 0
define i32 @ref_macc(i32 %0, i32 %1, i32* %2, i1 zeroext %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32*
%9 = alloca i8
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32* %2, i32** %8
%10 = zext i1 %3 to i8
store i8 %10, i8* %9
%11 = load i8, i8* %9
%12 = trunc i8 %11 to i1
br i1 %12, label %13, label %14
13: ; preds = %4
store i32 0, i32* @ref_macc.acc_reg
br label %14
14: ; preds = %13, %4
%15 = load i32, i32* %6
%16 = load i32, i32* %7
%17 = mul nsw i32 %15, %16
%18 = load i32, i32* @ref_macc.acc_reg
%19 = add nsw i32 %18, %17
store i32 %19, i32* @ref_macc.acc_reg
%20 = load i32, i32* @ref_macc.acc_reg
%21 = load i32*, i32** %8
store i32 %20, i32* %21
%22 = load i32, i32* %5
ret i32 %22
}

LLVM IR (-O2):
@ref_macc.acc_reg = internal unnamed_addr global i32 0
define i32 @ref_macc(i32 %0, i32 %1, i32* nocapture writeonly %2, i1 zeroext %3) {
%5 = load i32, i32* @ref_macc.acc_reg
%6 = select i1 %3, i32 0, i32 %5
%7 = mul nsw i32 %1, %0
%8 = add nsw i32 %6, %7
store i32 %8, i32* @ref_macc.acc_reg
store i32 %8, i32* %2
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ test_int_no1(int, int);
int main(const int argc, char *const argv[]) { test_int_no1(1, 2); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%edi
mov    $0x2,%esi
call   1030 <test_int_no1@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
mov    $0x2,%esi
call   1030 <test_int_no1@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @test_int_no1(i32 1, i32 2)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @test_int_no1(i32 1, i32 2)
ret i32 0
}
void V(sid) int sid;
{
  semcall(sid, 1);
  return;
}


x86 assembly (clang, -O0):
<V>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
mov    $0x0,%al
call   1030 <semcall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<V>:
mov    $0x1,%esi
xor    %eax,%eax
jmp    1030 <semcall@plt>

LLVM IR (-O0):
define void @V(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (i32, i32, ...) bitcast (i32 (...)* @semcall to i32 (i32, i32, ...)*)(i32 %3, i32 1)
ret void
}

LLVM IR (-O2):
define void @V(i32 %0) {
%2 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @semcall to i32 (i32, i32, ...)*)(i32 %0, i32 1)
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
void test(int **p) {
  int *q = (int *)malloc(sizeof(int));
  while (1) {
    *p = q;
    q++;
  }
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x18(%rbp)
mov    %rax,-0x10(%rbp)
jmp    112a <test+0x1a>

x86 assembly (clang, -O2):
<test>:
push   %rax
mov    $0x4,%edi
call   1030 <malloc@plt>
nopl   0x0(%rax,%rax,1)
jmp    1120 <test+0x10>

LLVM IR (-O0):
define void @test(i32** %0) {
%2 = alloca i32**
%3 = alloca i32*
store i32** %0, i32*** %2
%4 = call i64 @malloc(i32 4)
%5 = inttoptr i64 %4 to i32*
store i32* %5, i32** %3
br label %6
6: ; preds = %1, %6
%7 = load i32*, i32** %3
%8 = load i32**, i32*** %2
store i32* %7, i32** %8
%9 = load i32*, i32** %3
%10 = getelementptr inbounds i32, i32* %9, i32 1
store i32* %10, i32** %3
br label %6
}

LLVM IR (-O2):
define void @test(i32** nocapture writeonly %0) {
%2 = tail call i64 @malloc(i32 4)
br label %3
3: ; preds = %3, %1
br label %3
}
void tosMemory_pokeReal(int base, int offs, double value) {
  *((double *)(base + offs)) = value;
}


x86 assembly (clang, -O0):
<tosMemory_pokeReal>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
cltq
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tosMemory_pokeReal>:
movslq %esi,%rax
movslq %edi,%rcx
movsd  %xmm0,(%rax,%rcx,1)
ret

LLVM IR (-O0):
define void @tosMemory_pokeReal(i32 %0, i32 %1, double %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca double
store i32 %0, i32* %4
store i32 %1, i32* %5
store double %2, double* %6
%7 = load double, double* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = add nsw i32 %8, %9
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to double*
store double %7, double* %12
ret void
}

LLVM IR (-O2):
define void @tosMemory_pokeReal(i32 %0, i32 %1, double %2) {
%4 = add nsw i32 %1, %0
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to double*
store double %2, double* %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ft_putstr(char *);
int read(int /*<<< orphan*/, char *, int);
void on_empty(void) {
  char buffer[29000 + 1];
  int ret;
  while ((ret = read(0, buffer, 29000))) {
    buffer[ret] = '\0';
    ft_putstr(buffer);
  }
}


x86 assembly (clang, -O0):
<on_empty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x7160,%rsp
lea    -0x7150(%rbp),%rsi
xor    %edi,%edi
mov    $0x7148,%edx
call   1030 <read@plt>
mov    %eax,-0x7154(%rbp)
cmp    $0x0,%eax
je     116d <on_empty+0x4d>
movslq -0x7154(%rbp),%rax
movb   $0x0,-0x7150(%rbp,%rax,1)
lea    -0x7150(%rbp),%rdi
call   1040 <ft_putstr@plt>
jmp    112b <on_empty+0xb>
add    $0x7160,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<on_empty>:
push   %rbx
sub    $0x7150,%rsp
mov    %rsp,%rsi
xor    %edi,%edi
mov    $0x7148,%edx
call   1030 <read@plt>
test   %eax,%eax
je     1161 <on_empty+0x41>
mov    %rsp,%rbx
xchg   %ax,%ax
cltq
movb   $0x0,(%rsp,%rax,1)
mov    %rbx,%rdi
call   1040 <ft_putstr@plt>
xor    %edi,%edi
mov    %rbx,%rsi
mov    $0x7148,%edx
call   1030 <read@plt>
test   %eax,%eax
jne    1140 <on_empty+0x20>
add    $0x7150,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @on_empty() {
%1 = alloca [29001 x i8]
%2 = alloca i32
br label %3
3: ; preds = %7, %0
%4 = getelementptr inbounds [29001 x i8], [29001 x i8]* %1, i64 0, i64 0
%5 = call i32 @read(i32 0, i8* %4, i32 29000)
store i32 %5, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i32, i32* %2
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds [29001 x i8], [29001 x i8]* %1, i64 0, i64 %9
store i8 0, i8* %10
%11 = getelementptr inbounds [29001 x i8], [29001 x i8]* %1, i64 0, i64 0
%12 = call i32 @ft_putstr(i8* %11)
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @on_empty() {
%1 = alloca [29001 x i8]
%2 = getelementptr inbounds [29001 x i8], [29001 x i8]* %1, i64 0, i64 0
%3 = call i32 @read(i32 0, i8* %2, i32 29000)
%4 = icmp eq i32 %3, 0
br i1 %4, label %12, label %5
5: ; preds = %0, %5
%6 = phi i32 [ %10, %5 ], [ %3, %0 ]
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds [29001 x i8], [29001 x i8]* %1, i64 0, i64 %7
store i8 0, i8* %8
%9 = call i32 @ft_putstr(i8* %2)
%10 = call i32 @read(i32 0, i8* %2, i32 29000)
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %5
12: ; preds = %5, %0
ret void
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
void TRNGIntDisable(uint32_t ui32IntFlags) {

  ;
  (*((volatile unsigned long *)(0x40028000 + 0x0000000C))) &= ~ui32IntFlags;
}


x86 assembly (clang, -O0):
<TRNGIntDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xor    $0xffffffffffffffff,%rax
mov    $0x4002800c,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0x4002800c,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TRNGIntDisable>:
mov    %rdi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
not    %rax
and    %rax,0x4002800c
40
ret

LLVM IR (-O0):
define void @TRNGIntDisable(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = xor i64 %3, -1
%5 = load volatile i64, i64* inttoptr (i64 1073905676 to i64*)
%6 = and i64 %5, %4
store volatile i64 %6, i64* inttoptr (i64 1073905676 to i64*)
ret void
}

LLVM IR (-O2):
define void @TRNGIntDisable(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = xor i64 %3, -1
%5 = load volatile i64, i64* inttoptr (i64 1073905676 to i64*)
%6 = and i64 %5, %4
store volatile i64 %6, i64* inttoptr (i64 1073905676 to i64*)
ret void
}
void amsynth_lash_init() {}


x86 assembly (clang, -O0):
<amsynth_lash_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<amsynth_lash_init>:
ret

LLVM IR (-O0):
define void @amsynth_lash_init() {
ret void
}

LLVM IR (-O2):
define void @amsynth_lash_init() {
ret void
}
/* Type definitions */
typedef int ssize_t;
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ mill_msleep(int /*<<< orphan*/, char *);
int send(int, char *, int, int /*<<< orphan*/);
__attribute__((no)) void trigger(int fd, int64_t deadline) {
  mill_msleep((deadline), "/scratch/repos/new/home/jordi_armengol_estape/"
                          "c-scraper/outputs/2022-01-22/02-19-57/repos/"
                          "dailypips/libmill/refs/heads/master/tests/fdwait.c"
                          ":"
                          "36");
  ssize_t sz = send(fd, "A", 1, 0);
  assert(sz == 1);
}


x86 assembly (clang, -O0):
<trigger>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
lea    0xeb8(%rip),%rsi
call   1050 <mill_msleep@plt>
mov    -0x4(%rbp),%edi
lea    0xf39(%rip),%rsi
mov    $0x1,%edx
xor    %ecx,%ecx
call   1030 <send@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trigger>:
push   %rbx
mov    %esi,%eax
mov    %edi,%ebx
lea    0xec4(%rip),%rsi
mov    %eax,%edi
call   1050 <mill_msleep@plt>
lea    0xf46(%rip),%rsi
mov    %ebx,%edi
mov    $0x1,%edx
xor    %ecx,%ecx
call   1030 <send@plt>
xor    %edi,%edi
cmp    $0x1,%eax
sete   %dil
pop    %rbx
jmp    1040 <assert@plt>

LLVM IR (-O0):
@.str = [144 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/dailypips/libmill/refs/heads/master/tests/fdwait.c:36\00"
@.str.1 = [2 x i8] c"A\00"
define void @trigger(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = call i32 @mill_msleep(i32 %6, i8* getelementptr inbounds ([144 x i8], [144 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* %3
%9 = call i32 @send(i32 %8, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32 1, i32 0)
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = icmp eq i32 %10, 1
%12 = zext i1 %11 to i32
%13 = call i32 @assert(i32 %12)
ret void
}

LLVM IR (-O2):
@.str = [144 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/dailypips/libmill/refs/heads/master/tests/fdwait.c:36\00"
@.str.1 = [2 x i8] c"A\00"
define void @trigger(i32 %0, i32 %1) {
%3 = tail call i32 @mill_msleep(i32 %1, i8* getelementptr inbounds ([144 x i8], [144 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @send(i32 %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32 1, i32 0)
%5 = icmp eq i32 %4, 1
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
ret void
}
/* Variables and functions */
scalar_t__ __get_ticks();
unsigned int s_get_ticks(void) { return (unsigned int)__get_ticks(); }


x86 assembly (clang, -O0):
<s_get_ticks>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__get_ticks@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_get_ticks>:
xor    %eax,%eax
jmp    1030 <__get_ticks@plt>

LLVM IR (-O0):
define i32 @s_get_ticks() {
%1 = call i64 (...) @__get_ticks()
%2 = trunc i64 %1 to i32
ret i32 %2
}

LLVM IR (-O2):
define i32 @s_get_ticks() {
%1 = tail call i64 (...) @__get_ticks()
%2 = trunc i64 %1 to i32
ret i32 %2
}