xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ mbstowcs(int /*<<< orphan*/ *, char const *, size_t);
void uninitvar_mbstowcs(wchar_t *d, const char *s, size_t m) {
  wchar_t *dest;
  char *src;
  size_t max;
  (void)mbstowcs(dest, s, m);
  (void)mbstowcs(d, src, m);
  (void)mbstowcs(d, s, max);
  (void)mbstowcs(d, s, m);
}


x86 assembly (clang, -O0):
<uninitvar_mbstowcs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <mbstowcs@plt>
mov    -0x8(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <mbstowcs@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x30(%rbp),%rdx
call   1030 <mbstowcs@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <mbstowcs@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_mbstowcs>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
call   1030 <mbstowcs@plt>
mov    %rbx,%rdi
mov    %r14,%rdx
call   1030 <mbstowcs@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
call   1030 <mbstowcs@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <mbstowcs@plt>

LLVM IR (-O0):
define void @uninitvar_mbstowcs(i32* %0, i8* %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32*
%8 = alloca i8*
%9 = alloca i64
store i32* %0, i32** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%10 = load i32*, i32** %7
%11 = load i8*, i8** %5
%12 = load i64, i64* %6
%13 = call i32 @mbstowcs(i32* %10, i8* %11, i64 %12)
%14 = load i32*, i32** %4
%15 = load i8*, i8** %8
%16 = load i64, i64* %6
%17 = call i32 @mbstowcs(i32* %14, i8* %15, i64 %16)
%18 = load i32*, i32** %4
%19 = load i8*, i8** %5
%20 = load i64, i64* %9
%21 = call i32 @mbstowcs(i32* %18, i8* %19, i64 %20)
%22 = load i32*, i32** %4
%23 = load i8*, i8** %5
%24 = load i64, i64* %6
%25 = call i32 @mbstowcs(i32* %22, i8* %23, i64 %24)
ret void
}

LLVM IR (-O2):
define void @uninitvar_mbstowcs(i32* %0, i8* %1, i64 %2) {
%4 = tail call i32 @mbstowcs(i32* undef, i8* %1, i64 %2)
%5 = tail call i32 @mbstowcs(i32* %0, i8* undef, i64 %2)
%6 = tail call i32 @mbstowcs(i32* %0, i8* %1, i64 undef)
%7 = tail call i32 @mbstowcs(i32* %0, i8* %1, i64 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
msg(char *x) { perror(x); }


x86 assembly (clang, -O0):
<msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <perror@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msg>:
jmp    1030 <perror@plt>

LLVM IR (-O0):
define i32 @msg(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @perror(i8* %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @msg(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ islower(int);
void t_islower_0x3d() {
  Assert_real((islower(61) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              310, ("islower should be 0 for ="));
}


x86 assembly (clang, -O0):
<t_islower_0x3d>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3d,%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x136,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0x3d>:
push   %rax
mov    $0x3d,%edi
call   1030 <islower@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x136,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [26 x i8] c"islower should be 0 for =\00"
define void @t_islower_0x3d() {
%1 = call i64 @islower(i32 61)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 310, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [26 x i8] c"islower should be 0 for =\00"
define void @t_islower_0x3d() {
%1 = tail call i64 @islower(i32 61)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 310, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int main(void) {
  int var;
  var = 0;
  var = var + 1;
  var = var - 0;
  var = var * 10;
  var = var / 1;
  var = var % 9;
  var = var & 10;
  var = var | 10;
  var = var ^ 1000;
  var = var == var;
  var = var != 50;
  var = var > 1000;
  var = var < 1000;
  var = var >= 9;
  var = var <= 10;
  var = (var + 10, 9);
  return var;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x0,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x1,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x9,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xa,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
or     $0xa,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x3e8,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x8(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x32,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x3e8,-0x8(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x3e8,-0x8(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x9,-0x8(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
setle  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
movl   $0x9,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x9,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = sub nsw i32 %5, 0
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = mul nsw i32 %7, 10
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = sdiv i32 %9, 1
store i32 %10, i32* %2
%11 = load i32, i32* %2
%12 = srem i32 %11, 9
store i32 %12, i32* %2
%13 = load i32, i32* %2
%14 = and i32 %13, 10
store i32 %14, i32* %2
%15 = load i32, i32* %2
%16 = or i32 %15, 10
store i32 %16, i32* %2
%17 = load i32, i32* %2
%18 = xor i32 %17, 1000
store i32 %18, i32* %2
%19 = load i32, i32* %2
%20 = load i32, i32* %2
%21 = icmp eq i32 %19, %20
%22 = zext i1 %21 to i32
store i32 %22, i32* %2
%23 = load i32, i32* %2
%24 = icmp ne i32 %23, 50
%25 = zext i1 %24 to i32
store i32 %25, i32* %2
%26 = load i32, i32* %2
%27 = icmp sgt i32 %26, 1000
%28 = zext i1 %27 to i32
store i32 %28, i32* %2
%29 = load i32, i32* %2
%30 = icmp slt i32 %29, 1000
%31 = zext i1 %30 to i32
store i32 %31, i32* %2
%32 = load i32, i32* %2
%33 = icmp sge i32 %32, 9
%34 = zext i1 %33 to i32
store i32 %34, i32* %2
%35 = load i32, i32* %2
%36 = icmp sle i32 %35, 10
%37 = zext i1 %36 to i32
store i32 %37, i32* %2
%38 = load i32, i32* %2
%39 = add nsw i32 %38, 10
store i32 9, i32* %2
%40 = load i32, i32* %2
ret i32 %40
}

LLVM IR (-O2):
define i32 @main() {
ret i32 9
}
void flush_i_cache() {
  volatile unsigned char *addr;
  for (addr = ((unsigned char *)0x12000000);
       addr < ((unsigned char *)0x12000000) + (128 * 16 * 4) * 2; addr += 16)
    *addr;
  for (addr = ((unsigned char *)0xc0020000) + 0x0000f000;
       addr <= ((unsigned char *)0xc0020000) + 0x0000f000 + 128 * 32;
       addr += 32)
    *(unsigned long *)addr = 0;
}


x86 assembly (clang, -O0):
<flush_i_cache>:
push   %rbp
mov    %rsp,%rbp
mov    $0x12000000,%eax
mov    %rax,-0x8(%rbp)
mov    $0x12000000,%eax
add    $0x4000,%rax
cmp    %rax,-0x8(%rbp)
jae    1139 <flush_i_cache+0x39>
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    -0x8(%rbp),%rax
add    $0x10,%rax
mov    %rax,-0x8(%rbp)
jmp    110d <flush_i_cache+0xd>
mov    $0xc0020000,%eax
add    $0xf000,%rax
mov    %rax,-0x8(%rbp)
mov    $0xc0020000,%eax
add    $0x10000,%rax
cmp    %rax,-0x8(%rbp)
ja     1179 <flush_i_cache+0x79>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
mov    -0x8(%rbp),%rax
add    $0x20,%rax
mov    %rax,-0x8(%rbp)
jmp    1148 <flush_i_cache+0x48>
pop    %rbp
ret

x86 assembly (clang, -O2):
<flush_i_cache>:
mov    $0x12000000,%eax
cs nopw 0x0(%rax,%rax,1)
nop
movzbl (%rax),%ecx
add    $0x10,%rax
cmp    $0x12004000,%rax
jb     1110 <flush_i_cache+0x10>
mov    $0xc002f000,%eax
lea    0x1000(%rax),%rcx
nopl   0x0(%rax,%rax,1)
movq   $0x0,(%rax)
add    $0x20,%rax
cmp    %rcx,%rax
jbe    1130 <flush_i_cache+0x30>
ret

LLVM IR (-O0):
define void @flush_i_cache() {
%1 = alloca i8*
store i8* inttoptr (i64 301989888 to i8*), i8** %1
br label %2
2: ; preds = %8, %0
%3 = load i8*, i8** %1
%4 = icmp ult i8* %3, getelementptr inbounds (i8, i8* inttoptr (i64 301989888 to i8*), i64 16384)
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = load i8*, i8** %1
%7 = load volatile i8, i8* %6
br label %8
8: ; preds = %5
%9 = load i8*, i8** %1
%10 = getelementptr inbounds i8, i8* %9, i64 16
store i8* %10, i8** %1
br label %2
11: ; preds = %2
store i8* getelementptr inbounds (i8, i8* inttoptr (i64 3221356544 to i8*), i64 61440), i8** %1
br label %12
12: ; preds = %18, %11
%13 = load i8*, i8** %1
%14 = icmp ule i8* %13, getelementptr inbounds (i8, i8* inttoptr (i64 3221356544 to i8*), i64 65536)
br i1 %14, label %15, label %21
15: ; preds = %12
%16 = load i8*, i8** %1
%17 = bitcast i8* %16 to i64*
store i64 0, i64* %17
br label %18
18: ; preds = %15
%19 = load i8*, i8** %1
%20 = getelementptr inbounds i8, i8* %19, i64 32
store i8* %20, i8** %1
br label %12
21: ; preds = %12
ret void
}

LLVM IR (-O2):
define void @flush_i_cache() {
br label %1
1: ; preds = %0, %1
%2 = phi i8* [ inttoptr (i64 301989888 to i8*), %0 ], [ %4, %1 ]
%3 = load volatile i8, i8* %2
%4 = getelementptr inbounds i8, i8* %2, i64 16
%5 = icmp ult i8* %4, inttoptr (i64 302006272 to i8*)
br i1 %5, label %1, label %6
6: ; preds = %1, %6
%7 = phi i8* [ %9, %6 ], [ inttoptr (i64 3221417984 to i8*), %1 ]
%8 = bitcast i8* %7 to i64*
store i64 0, i64* %8
%9 = getelementptr inbounds i8, i8* %7, i64 32
%10 = icmp ugt i8* %9, inttoptr (i64 3221422080 to i8*)
br i1 %10, label %11, label %6
11: ; preds = %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ use_stuff(int);
int h(int a, int b) {
  int i;
  for (i = 8; i <= b; i++)
    use_stuff(a + 8);
}


x86 assembly (clang, -O0):
<h>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x8,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     114a <h+0x3a>
mov    -0x8(%rbp),%edi
add    $0x8,%edi
call   1030 <use_stuff@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1125 <h+0x15>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h>:
push   %rbp
push   %rbx
push   %rax
cmp    $0x8,%esi
jl     113c <h+0x2c>
mov    %esi,%ebx
mov    %edi,%ebp
add    $0x8,%ebp
add    $0xfffffff9,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %ebp,%edi
call   1030 <use_stuff@plt>
add    $0xffffffff,%ebx
jne    1130 <h+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @h(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 8, i32* %6
br label %7
7: ; preds = %15, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = icmp sle i32 %8, %9
br i1 %10, label %11, label %18
11: ; preds = %7
%12 = load i32, i32* %4
%13 = add nsw i32 %12, 8
%14 = call i32 @use_stuff(i32 %13)
br label %15
15: ; preds = %11
%16 = load i32, i32* %6
%17 = add nsw i32 %16, 1
store i32 %17, i32* %6
br label %7
18: ; preds = %7
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @h(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, 8
br i1 %3, label %11, label %4
4: ; preds = %2
%5 = add nsw i32 %0, 8
br label %6
6: ; preds = %4, %6
%7 = phi i32 [ 8, %4 ], [ %9, %6 ]
%8 = tail call i32 @use_stuff(i32 %5)
%9 = add nuw i32 %7, 1
%10 = icmp eq i32 %7, %1
br i1 %10, label %11, label %6
11: ; preds = %6, %2
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ int16_t;

/* Variables and functions */
int /*<<< orphan*/ leconvert_uint16_from(int /*<<< orphan*/);
int16_t leconvert_int16_from(int16_t little) {
  return leconvert_uint16_from(little);
}


x86 assembly (clang, -O0):
<leconvert_int16_from>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <leconvert_uint16_from@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<leconvert_int16_from>:
jmp    1030 <leconvert_uint16_from@plt>

LLVM IR (-O0):
define i32 @leconvert_int16_from(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @leconvert_uint16_from(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @leconvert_int16_from(i32 %0) {
%2 = tail call i32 @leconvert_uint16_from(i32 %0)
ret i32 %2
}
int subfunc() { return 42; }


x86 assembly (clang, -O0):
<subfunc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<subfunc>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @subfunc() {
ret i32 42
}

LLVM IR (-O2):
define i32 @subfunc() {
ret i32 42
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0xec() {
  Assert_real((isalnum(236) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              1185, ("isalnum should be 0 for 0xec"));
}


x86 assembly (clang, -O0):
<t_isalnum_0xec>:
push   %rbp
mov    %rsp,%rbp
mov    $0xec,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4a1,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0xec>:
push   %rax
mov    $0xec,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4a1,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xec\00"
define void @t_isalnum_0xec() {
%1 = call i64 @isalnum(i32 236)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1185, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xec\00"
define void @t_isalnum_0xec() {
%1 = tail call i64 @isalnum(i32 236)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1185, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ saa7114_read_reg(int, unsigned char *);
int /*<<< orphan*/ saa7114_write_reg(int, unsigned char);
int saa7114_set_decoder_luminance_filter(unsigned char lufi) {
  unsigned char data;
  saa7114_read_reg(0x09, &data);
  saa7114_write_reg(0x09, (unsigned char)((data & ~0x0F) | (lufi & 0x0F)));
  return (0);
}


x86 assembly (clang, -O0):
<saa7114_set_decoder_luminance_filter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x9,%edi
lea    -0x2(%rbp),%rsi
call   1040 <saa7114_read_reg@plt>
movzbl -0x2(%rbp),%eax
and    $0xfffffff0,%eax
movzbl -0x1(%rbp),%ecx
and    $0xf,%ecx
or     %ecx,%eax
mov    $0x9,%edi
movzbl %al,%esi
call   1030 <saa7114_write_reg@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<saa7114_set_decoder_luminance_filter>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
lea    0xf(%rsp),%rsi
mov    $0x9,%edi
call   1040 <saa7114_read_reg@plt>
mov    0xf(%rsp),%al
and    $0xf0,%al
and    $0xf,%bl
or     %al,%bl
movzbl %bl,%esi
mov    $0x9,%edi
call   1030 <saa7114_write_reg@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @saa7114_set_decoder_luminance_filter(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %2
%4 = call i32 @saa7114_read_reg(i32 9, i8* %3)
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = and i32 %6, -16
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = and i32 %9, 15
%11 = or i32 %7, %10
%12 = trunc i32 %11 to i8
%13 = call i32 @saa7114_write_reg(i32 9, i8 zeroext %12)
ret i32 0
}

LLVM IR (-O2):
define i32 @saa7114_set_decoder_luminance_filter(i8 zeroext %0) {
%2 = alloca i8
%3 = call i32 @saa7114_read_reg(i32 9, i8* %2)
%4 = load i8, i8* %2
%5 = and i8 %4, -16
%6 = and i8 %0, 15
%7 = or i8 %5, %6
%8 = call i32 @saa7114_write_reg(i32 9, i8 zeroext %7)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
__attribute__((visibility("hidden"))) void rmw_free(void *pointer) {
  free(pointer);
}


x86 assembly (clang, -O0):
<rmw_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rmw_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define hidden void @rmw_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define hidden void @rmw_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
char *NamedElement_metaClassName(void *const this) { return "NamedElement"; }


x86 assembly (clang, -O0):
<NamedElement_metaClassName>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    0xef1(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<NamedElement_metaClassName>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [13 x i8] c"NamedElement\00"
define i8* @NamedElement_metaClassName(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [13 x i8] c"NamedElement\00"
define i8* @NamedElement_metaClassName(i8* nocapture readnone %0) {
ret i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void g_crash(const char *msg) {
  fprintf(stderr, "g_crash called: %s\n", msg);
  *(int *)0x50FF8001 = 12345;
}


x86 assembly (clang, -O0):
<g_crash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x50ff8001,%eax
movl   $0x3039,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_crash>:
push   %rax
mov    %rdi,%rdx
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
movl   $0x3039,0x50ff8001
pop    %rax
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [20 x i8] c"g_crash called: %s\0A\00"
define void @g_crash(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %4)
store i32 12345, i32* inttoptr (i64 1358921729 to i32*)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [20 x i8] c"g_crash called: %s\0A\00"
define void @g_crash(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %0)
store i32 12345, i32* inttoptr (i64 1358921729 to i32*)
ret void
}
float call_minf(float a, float b) { return ((a) < (b) ? (a) : (b)); }


x86 assembly (clang, -O0):
<call_minf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1130 <call_minf+0x30>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    113a <call_minf+0x3a>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_minf>:
minss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @call_minf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp olt float %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load float, float* %3
br label %12
10: ; preds = %2
%11 = load float, float* %4
br label %12
12: ; preds = %10, %8
%13 = phi float [ %9, %8 ], [ %11, %10 ]
ret float %13
}

LLVM IR (-O2):
define float @call_minf(float %0, float %1) {
%3 = fcmp olt float %0, %1
%4 = select i1 %3, float %0, float %1
ret float %4
}
/* Variables and functions */
double sin(double);
double circle(double x, double r) { return (r * sin(3.1415926535 * x)); }


x86 assembly (clang, -O0):
<circle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xecc(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
call   1030 <sin@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
mulsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<circle>:
push   %rax
movsd  %xmm1,(%rsp)
mulsd  0xee2(%rip),%xmm0
call   1030 <sin@plt>
mulsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @circle(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %4
%6 = load double, double* %3
%7 = fmul double 0x400921FB54411744, %6
%8 = call double @sin(double %7)
%9 = fmul double %5, %8
ret double %9
}

LLVM IR (-O2):
define double @circle(double %0, double %1) {
%3 = fmul double %0, 0x400921FB54411744
%4 = tail call double @sin(double %3)
%5 = fmul double %4, %1
ret double %5
}
int test_imm_5Bint32_reg(int val) { return ((val) & (0x5B << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_5Bint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x5b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Bint32_reg>:
test   $0x5b,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Bint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 91
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_5Bint32_reg(i32 %0) {
%2 = and i32 %0, 91
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void __attribute__((weak)) wwdg_isr() { debug_handler(__FUNCTION__); }


x86 assembly (clang, -O0):
<wwdg_isr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <debug_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wwdg_isr>:
lea    0xee9(%rip),%rdi
xor    %eax,%eax
jmp    1030 <debug_handler@plt>

LLVM IR (-O0):
@__FUNCTION__.wwdg_isr = [9 x i8] c"wwdg_isr\00"
define weak void @wwdg_isr() {
%1 = call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @__FUNCTION__.wwdg_isr, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__FUNCTION__.wwdg_isr = [9 x i8] c"wwdg_isr\00"
define weak void @wwdg_isr() {
%1 = tail call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @__FUNCTION__.wwdg_isr, i64 0, i64 0))
ret void
}
int DB_EndReadHeader_Native(void *db) { return 0; }


x86 assembly (clang, -O0):
<DB_EndReadHeader_Native>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DB_EndReadHeader_Native>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @DB_EndReadHeader_Native(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @DB_EndReadHeader_Native(i8* nocapture readnone %0) {
ret i32 0
}
void pci_free_irq_vectors(struct pci_dev *dev) {}


x86 assembly (clang, -O0):
<pci_free_irq_vectors>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_free_irq_vectors>:
ret

LLVM IR (-O0):
%struct.pci_dev = type opaque
define void @pci_free_irq_vectors(%struct.pci_dev* %0) {
%2 = alloca %struct.pci_dev*
store %struct.pci_dev* %0, %struct.pci_dev** %2
ret void
}

LLVM IR (-O2):
%struct.pci_dev = type opaque
define void @pci_free_irq_vectors(%struct.pci_dev* nocapture %0) {
ret void
}
/* Type definitions */
struct modify_args_info {
  int dummy;
};

/* Variables and functions */
int EXIT_SUCCESS;
int modify_cmdline_parser_required(struct modify_args_info *args_info,
                                   const char *prog_name) {
  (void)(args_info);
  (void)(prog_name);
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<modify_cmdline_parser_required>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ecd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<modify_cmdline_parser_required>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
%struct.modify_args_info = type { i32 }
@EXIT_SUCCESS = global i32 0
define i32 @modify_cmdline_parser_required(%struct.modify_args_info* %0, i8* %1) {
%3 = alloca %struct.modify_args_info*
%4 = alloca i8*
store %struct.modify_args_info* %0, %struct.modify_args_info** %3
store i8* %1, i8** %4
%5 = load %struct.modify_args_info*, %struct.modify_args_info** %3
%6 = load i8*, i8** %4
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}

LLVM IR (-O2):
%struct.modify_args_info = type { i32 }
@EXIT_SUCCESS = global i32 0
define i32 @modify_cmdline_parser_required(%struct.modify_args_info* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}
void av_frame_copy() {}


x86 assembly (clang, -O0):
<av_frame_copy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_frame_copy>:
ret

LLVM IR (-O0):
define void @av_frame_copy() {
ret void
}

LLVM IR (-O2):
define void @av_frame_copy() {
ret void
}
int is_name_tchar(int c) {
  return (c >= 'A' && c <= 'Z') || (c >= 'a' && c <= 'z') || (c == '_');
}


x86 assembly (clang, -O0):
<is_name_tchar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x41,-0x4(%rbp)
jl     1120 <is_name_tchar+0x20>
mov    $0x1,%al
cmpl   $0x5a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1143 <is_name_tchar+0x43>
cmpl   $0x61,-0x4(%rbp)
jl     1139 <is_name_tchar+0x39>
mov    $0x1,%al
cmpl   $0x7a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1143 <is_name_tchar+0x43>
cmpl   $0x5f,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_name_tchar>:
mov    %edi,%eax
and    $0xffffffdf,%eax
add    $0xffffffbf,%eax
cmp    $0x1a,%eax
setb   %al
cmp    $0x5f,%edi
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_name_tchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 65
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 90
br i1 %7, label %17, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 97
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 122
br i1 %13, label %17, label %14
14: ; preds = %11, %8
%15 = load i32, i32* %2
%16 = icmp eq i32 %15, 95
br label %17
17: ; preds = %14, %11, %5
%18 = phi i1 [ true, %11 ], [ true, %5 ], [ %16, %14 ]
%19 = zext i1 %18 to i32
ret i32 %19
}

LLVM IR (-O2):
define i32 @is_name_tchar(i32 %0) {
%2 = and i32 %0, -33
%3 = add i32 %2, -65
%4 = icmp ult i32 %3, 26
%5 = icmp eq i32 %0, 95
%6 = or i1 %5, %4
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int ls_costN_nm8_f0(double const **, double **, int *, double *, int);
int ls_costN_nm8(const double **arg, double **res, int *iw, double *w,
                 int mem) {
  return ls_costN_nm8_f0(arg, res, iw, w, mem);
}


x86 assembly (clang, -O0):
<ls_costN_nm8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x24(%rbp),%r8d
call   1030 <ls_costN_nm8_f0@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_costN_nm8>:
jmp    1030 <ls_costN_nm8_f0@plt>

LLVM IR (-O0):
define i32 @ls_costN_nm8(double** %0, double** %1, i32* %2, double* %3, i32 %4) {
%6 = alloca double**
%7 = alloca double**
%8 = alloca i32*
%9 = alloca double*
%10 = alloca i32
store double** %0, double*** %6
store double** %1, double*** %7
store i32* %2, i32** %8
store double* %3, double** %9
store i32 %4, i32* %10
%11 = load double**, double*** %6
%12 = load double**, double*** %7
%13 = load i32*, i32** %8
%14 = load double*, double** %9
%15 = load i32, i32* %10
%16 = call i32 @ls_costN_nm8_f0(double** %11, double** %12, i32* %13, double* %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @ls_costN_nm8(double** %0, double** %1, i32* %2, double* %3, i32 %4) {
%6 = tail call i32 @ls_costN_nm8_f0(double** %0, double** %1, i32* %2, double* %3, i32 %4)
ret i32 %6
}
void mulvf(double *result, const double m) {
  result[0] *= m;
  result[1] *= m;
  result[2] *= m;
}


x86 assembly (clang, -O0):
<mulvf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
mulsd  (%rax),%xmm0
movsd  %xmm0,(%rax)
movsd  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
mulsd  0x8(%rax),%xmm0
movsd  %xmm0,0x8(%rax)
movsd  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
mulsd  0x10(%rax),%xmm0
movsd  %xmm0,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mulvf>:
movupd (%rdi),%xmm1
movapd %xmm0,%xmm2
unpcklpd %xmm0,%xmm2
mulpd  %xmm1,%xmm2
movupd %xmm2,(%rdi)
mulsd  0x10(%rdi),%xmm0
movsd  %xmm0,0x10(%rdi)
ret

LLVM IR (-O0):
define void @mulvf(double* %0, double %1) {
%3 = alloca double*
%4 = alloca double
store double* %0, double** %3
store double %1, double* %4
%5 = load double, double* %4
%6 = load double*, double** %3
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = fmul double %8, %5
store double %9, double* %7
%10 = load double, double* %4
%11 = load double*, double** %3
%12 = getelementptr inbounds double, double* %11, i64 1
%13 = load double, double* %12
%14 = fmul double %13, %10
store double %14, double* %12
%15 = load double, double* %4
%16 = load double*, double** %3
%17 = getelementptr inbounds double, double* %16, i64 2
%18 = load double, double* %17
%19 = fmul double %18, %15
store double %19, double* %17
ret void
}

LLVM IR (-O2):
define void @mulvf(double* nocapture %0, double %1) {
%3 = bitcast double* %0 to <2 x double>*
%4 = load <2 x double>, <2 x double>* %3
%5 = insertelement <2 x double> poison, double %1, i64 0
%6 = shufflevector <2 x double> %5, <2 x double> poison, <2 x i32> zeroinitializer
%7 = fmul <2 x double> %4, %6
%8 = bitcast double* %0 to <2 x double>*
store <2 x double> %7, <2 x double>* %8
%9 = getelementptr inbounds double, double* %0, i64 2
%10 = load double, double* %9
%11 = fmul double %10, %1
store double %11, double* %9
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void short_range(void) {
  unsigned short max = -1;
  signed short min = (max - 1) / 2 + 1;
  printf("\tshort:\n");
  printf("\t\tSigned minimum = %d\n", min);
  printf("\t\tUnsigned maximum = %u\n", max);
}


x86 assembly (clang, -O0):
<short_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movw   $0xffff,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
sub    $0x1,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
add    $0x1,%eax
mov    %ax,-0x4(%rbp)
lea    0xec5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
movswl -0x4(%rbp),%esi
lea    0xebc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
movzwl -0x2(%rbp),%esi
lea    0xec1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<short_range>:
push   %rax
lea    0xf08(%rip),%rdi
call   1030 <puts@plt>
lea    0xecc(%rip),%rdi
mov    $0xffff8000,%esi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xed0(%rip),%rdi
mov    $0xffff,%esi
xor    %eax,%eax
pop    %rcx
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"\09short:\0A\00"
@.str.1 = [23 x i8] c"\09\09Signed minimum = %d\0A\00"
@.str.2 = [25 x i8] c"\09\09Unsigned maximum = %u\0A\00"
define void @short_range() {
%1 = alloca i16
%2 = alloca i16
store i16 -1, i16* %1
%3 = load i16, i16* %1
%4 = zext i16 %3 to i32
%5 = sub nsw i32 %4, 1
%6 = sdiv i32 %5, 2
%7 = add nsw i32 %6, 1
%8 = trunc i32 %7 to i16
store i16 %8, i16* %2
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%10 = load i16, i16* %2
%11 = sext i16 %10 to i32
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i32 %11)
%13 = load i16, i16* %1
%14 = zext i16 %13 to i32
%15 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0), i32 %14)
ret void
}

LLVM IR (-O2):
@.str.1 = [23 x i8] c"\09\09Signed minimum = %d\0A\00"
@.str.2 = [25 x i8] c"\09\09Unsigned maximum = %u\0A\00"
@str = [8 x i8] c"\09short:\00"
define void @short_range() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i32 -32768)
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0), i32 65535)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ const *,
                          int);
void cvt_u8RGB_u8RGB(const uint8_t *src, uint8_t *dest, int w) {
  memcpy(dest, src, w * 3);
}


x86 assembly (clang, -O0):
<cvt_u8RGB_u8RGB>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
imul   $0x3,-0x14(%rbp),%edx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvt_u8RGB_u8RGB>:
mov    %rdi,%rax
lea    (%rdx,%rdx,2),%edx
mov    %rsi,%rdi
mov    %rax,%rsi
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @cvt_u8RGB_u8RGB(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %6
%10 = mul nsw i32 %9, 3
%11 = call i32 @memcpy(i32* %7, i32* %8, i32 %10)
ret void
}

LLVM IR (-O2):
define void @cvt_u8RGB_u8RGB(i32* %0, i32* %1, i32 %2) {
%4 = mul nsw i32 %2, 3
%5 = tail call i32 @memcpy(i32* %1, i32* %0, i32 %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ EPOLLIN;
int /*<<< orphan*/ EPOLLOUT;
uint32_t ns_epf_to_evflags(unsigned int epf) {
  uint32_t result = 0;
  if (epf & (1 << 0))
    result |= EPOLLIN;
  if (epf & (1 << 1))
    result |= EPOLLOUT;
  return result;
}


x86 assembly (clang, -O0):
<ns_epf_to_evflags>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     112c <ns_epf_to_evflags+0x2c>
mov    0x2ec4(%rip),%rax
mov    (%rax),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     114a <ns_epf_to_evflags+0x4a>
mov    0x2e96(%rip),%rax
mov    (%rax),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ns_epf_to_evflags>:
mov    %edi,%eax
and    $0x1,%eax
neg    %eax
mov    0x2eda(%rip),%rcx
and    (%rcx),%eax
shl    $0x1e,%edi
sar    $0x1f,%edi
mov    0x2ebb(%rip),%rcx
and    (%rcx),%edi
or     %edi,%eax
ret

LLVM IR (-O0):
@EPOLLIN = global i32 0
@EPOLLOUT = global i32 0
define i32 @ns_epf_to_evflags(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = and i32 %4, 1
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i32, i32* @EPOLLIN
%9 = load i32, i32* %3
%10 = or i32 %9, %8
store i32 %10, i32* %3
br label %11
11: ; preds = %7, %1
%12 = load i32, i32* %2
%13 = and i32 %12, 2
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %19
15: ; preds = %11
%16 = load i32, i32* @EPOLLOUT
%17 = load i32, i32* %3
%18 = or i32 %17, %16
store i32 %18, i32* %3
br label %19
19: ; preds = %15, %11
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
@EPOLLIN = global i32 0
@EPOLLOUT = global i32 0
define i32 @ns_epf_to_evflags(i32 %0) {
%2 = and i32 %0, 1
%3 = icmp eq i32 %2, 0
%4 = load i32, i32* @EPOLLIN
%5 = select i1 %3, i32 0, i32 %4
%6 = and i32 %0, 2
%7 = icmp eq i32 %6, 0
%8 = load i32, i32* @EPOLLOUT
%9 = select i1 %7, i32 0, i32 %8
%10 = or i32 %9, %5
ret i32 %10
}
/* Variables and functions */
double drand2();
int ranb1(int n, double p) {
  int cnt = 0, i;
  for (i = 0; i < n; i++) {
    if ((drand2()) <= p)
      ++cnt;
  }
  return cnt;
}


x86 assembly (clang, -O0):
<ranb1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movsd  %xmm0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    116f <ranb1+0x5f>
mov    $0x0,%al
call   1030 <drand2@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jb     115c <ranb1+0x4c>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1161 <ranb1+0x51>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    112e <ranb1+0x1e>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ranb1>:
push   %rbp
push   %rbx
push   %rax
test   %edi,%edi
jle    113a <ranb1+0x2a>
mov    %edi,%ebx
xor    %ebp,%ebp
movsd  %xmm0,(%rsp)
xor    %eax,%eax
call   1030 <drand2@plt>
movsd  (%rsp),%xmm1
ucomisd %xmm0,%xmm1
sbb    $0xffffffff,%ebp
add    $0xffffffff,%ebx
jne    1120 <ranb1+0x10>
jmp    113c <ranb1+0x2c>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @ranb1(i32 %0, double %1) {
%3 = alloca i32
%4 = alloca double
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store double %1, double* %4
store i32 0, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %19, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %3
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %22
11: ; preds = %7
%12 = call double (...) @drand2()
%13 = load double, double* %4
%14 = fcmp ole double %12, %13
br i1 %14, label %15, label %18
15: ; preds = %11
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
br label %18
18: ; preds = %15, %11
br label %19
19: ; preds = %18
%20 = load i32, i32* %6
%21 = add nsw i32 %20, 1
store i32 %21, i32* %6
br label %7
22: ; preds = %7
%23 = load i32, i32* %5
ret i32 %23
}

LLVM IR (-O2):
define i32 @ranb1(i32 %0, double %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %13
4: ; preds = %2, %4
%5 = phi i32 [ %11, %4 ], [ 0, %2 ]
%6 = phi i32 [ %10, %4 ], [ 0, %2 ]
%7 = tail call double (...) @drand2()
%8 = fcmp ole double %7, %1
%9 = zext i1 %8 to i32
%10 = add nuw nsw i32 %6, %9
%11 = add nuw nsw i32 %5, 1
%12 = icmp eq i32 %11, %0
br i1 %12, label %13, label %4
13: ; preds = %4, %2
%14 = phi i32 [ 0, %2 ], [ %10, %4 ]
ret i32 %14
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void ADI16SetValBit(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask,
                    uint32_t ui32Val) {
  uint32_t ui32RegOffset;
  ;
  ;
  ;
  ;
  ui32RegOffset = 0x00000080 + ((ui32Reg << 1) & 0xFC);
  (*((volatile unsigned long *)(ui32Base + ui32RegOffset))) =
      (ui32Mask << 16) | ui32Val;
}


x86 assembly (clang, -O0):
<ADI16SetValBit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
and    $0xfc,%eax
add    $0x80,%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x10,%eax
or     -0x10(%rbp),%eax
movslq %eax,%rcx
mov    -0x4(%rbp),%eax
add    -0x14(%rbp),%eax
cltq
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADI16SetValBit>:
and    $0x7e,%esi
shl    $0x10,%edx
or     %ecx,%edx
movslq %edx,%rax
lea    (%rdi,%rsi,2),%ecx
add    $0x80,%ecx
movslq %ecx,%rcx
mov    %rax,(%rcx)
ret

LLVM IR (-O0):
define void @ADI16SetValBit(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %6
%11 = shl i32 %10, 1
%12 = and i32 %11, 252
%13 = add nsw i32 128, %12
store i32 %13, i32* %9
%14 = load i32, i32* %7
%15 = shl i32 %14, 16
%16 = load i32, i32* %8
%17 = or i32 %15, %16
%18 = sext i32 %17 to i64
%19 = load i32, i32* %5
%20 = load i32, i32* %9
%21 = add nsw i32 %19, %20
%22 = sext i32 %21 to i64
%23 = inttoptr i64 %22 to i64*
store volatile i64 %18, i64* %23
ret void
}

LLVM IR (-O2):
define void @ADI16SetValBit(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = shl i32 %1, 1
%6 = and i32 %5, 252
%7 = shl i32 %2, 16
%8 = or i32 %7, %3
%9 = sext i32 %8 to i64
%10 = add i32 %0, 128
%11 = add i32 %10, %6
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i64*
store volatile i64 %9, i64* %13
ret void
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
void PWMOutputFault(uint32_t ui32Base, uint32_t ui32PWMOutBits,
                    bool bFaultSuppress) {
  ;

  ;
  if (bFaultSuppress == 1) {
    (*((volatile unsigned long *)(ui32Base + 0x00000010))) |= ui32PWMOutBits;
  } else {
    (*((volatile unsigned long *)(ui32Base + 0x00000010))) &= ~(ui32PWMOutBits);
  }
}


x86 assembly (clang, -O0):
<PWMOutputFault>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x1,-0x14(%rbp)
jne    1131 <PWMOutputFault+0x31>
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x10(%rax)
jmp    1148 <PWMOutputFault+0x48>
mov    -0x10(%rbp),%rdx
xor    $0xffffffffffffffff,%rdx
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMOutputFault>:
mov    %rdi,-0x10(%rsp)
mov    %rsi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
cmp    $0x1,%edx
jne    111e <PWMOutputFault+0x1e>
mov    -0x10(%rsp),%rcx
or     %rax,0x10(%rcx)
ret
not    %rax
mov    -0x10(%rsp),%rcx
and    %rax,0x10(%rcx)
ret

LLVM IR (-O0):
define void @PWMOutputFault(i64 %0, i64 %1, i32 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i32
store volatile i64 %0, i64* %4
store volatile i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %16
9: ; preds = %3
%10 = load volatile i64, i64* %5
%11 = load volatile i64, i64* %4
%12 = add i64 %11, 16
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
%15 = or i64 %14, %10
store volatile i64 %15, i64* %13
br label %24
16: ; preds = %3
%17 = load volatile i64, i64* %5
%18 = xor i64 %17, -1
%19 = load volatile i64, i64* %4
%20 = add i64 %19, 16
%21 = inttoptr i64 %20 to i64*
%22 = load volatile i64, i64* %21
%23 = and i64 %22, %18
store volatile i64 %23, i64* %21
br label %24
24: ; preds = %16, %9
ret void
}

LLVM IR (-O2):
define void @PWMOutputFault(i64 %0, i64 %1, i32 %2) {
%4 = alloca i64
%5 = alloca i64
store volatile i64 %0, i64* %4
store volatile i64 %1, i64* %5
%6 = icmp eq i32 %2, 1
%7 = load volatile i64, i64* %5
br i1 %6, label %8, label %14
8: ; preds = %3
%9 = load volatile i64, i64* %4
%10 = add i64 %9, 16
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = or i64 %12, %7
store volatile i64 %13, i64* %11
br label %21
14: ; preds = %3
%15 = xor i64 %7, -1
%16 = load volatile i64, i64* %4
%17 = add i64 %16, 16
%18 = inttoptr i64 %17 to i64*
%19 = load volatile i64, i64* %18
%20 = and i64 %19, %15
store volatile i64 %20, i64* %18
br label %21
21: ; preds = %14, %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DMA15_DriverIRQHandler();
__attribute__((weak)) void DMA15_IRQHandler(void) { DMA15_DriverIRQHandler(); }


x86 assembly (clang, -O0):
<DMA15_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DMA15_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMA15_IRQHandler>:
xor    %eax,%eax
jmp    1030 <DMA15_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @DMA15_IRQHandler() {
%1 = call i32 (...) @DMA15_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @DMA15_IRQHandler() {
%1 = tail call i32 (...) @DMA15_DriverIRQHandler()
ret void
}