int isLeadByte(unsigned int cp, unsigned char ucByte) {
  switch (cp) {
  case 932:
    if ((ucByte > 0x80) && (ucByte < 0xa0))
      return 1;
    if ((ucByte > 0xdf) && (ucByte < 0xfd))
      return 1;
    else
      return 0;
  case 936:
    if ((ucByte > 0xa0) && (ucByte < 0xff))
      return 1;
    else
      return 0;
  case 949:
  case 950:
    if ((ucByte > 0x80) && (ucByte < 0xff))
      return 1;
    else
      return 0;
  case 1361:
    if ((ucByte > 0x83) && (ucByte < 0xd4))
      return 1;
    if ((ucByte > 0xd8) && (ucByte < 0xdf))
      return 1;
    if ((ucByte > 0xdf) && (ucByte < 0xfa))
      return 1;
    else
      return 0;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<isLeadByte>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %edi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
sub    $0x3a4,%eax
je     115f <isLeadByte+0x5f>
jmp    1123 <isLeadByte+0x23>
mov    -0x10(%rbp),%eax
sub    $0x3a8,%eax
je     11bf <isLeadByte+0xbf>
jmp    1136 <isLeadByte+0x36>
mov    -0x10(%rbp),%eax
add    $0xfffffc4b,%eax
sub    $0x2,%eax
jb     11f5 <isLeadByte+0xf5>
jmp    114c <isLeadByte+0x4c>
mov    -0x10(%rbp),%eax
sub    $0x551,%eax
je     122b <isLeadByte+0x12b>
jmp    12b5 <isLeadByte+0x1b5>
movzbl -0x9(%rbp),%eax
cmp    $0x80,%eax
jle    1189 <isLeadByte+0x89>
movzbl -0x9(%rbp),%eax
cmp    $0xa0,%eax
jge    1189 <isLeadByte+0x89>
movl   $0x1,-0x4(%rbp)
jmp    12bc <isLeadByte+0x1bc>
movzbl -0x9(%rbp),%eax
cmp    $0xdf,%eax
jle    11b3 <isLeadByte+0xb3>
movzbl -0x9(%rbp),%eax
cmp    $0xfd,%eax
jge    11b3 <isLeadByte+0xb3>
movl   $0x1,-0x4(%rbp)
jmp    12bc <isLeadByte+0x1bc>
movl   $0x0,-0x4(%rbp)
jmp    12bc <isLeadByte+0x1bc>
movzbl -0x9(%rbp),%eax
cmp    $0xa0,%eax
jle    11e9 <isLeadByte+0xe9>
movzbl -0x9(%rbp),%eax
cmp    $0xff,%eax
jge    11e9 <isLeadByte+0xe9>
movl   $0x1,-0x4(%rbp)
jmp    12bc <isLeadByte+0x1bc>
movl   $0x0,-0x4(%rbp)
jmp    12bc <isLeadByte+0x1bc>
movzbl -0x9(%rbp),%eax
cmp    $0x80,%eax
jle    121f <isLeadByte+0x11f>
movzbl -0x9(%rbp),%eax
cmp    $0xff,%eax
jge    121f <isLeadByte+0x11f>
movl   $0x1,-0x4(%rbp)
jmp    12bc <isLeadByte+0x1bc>
movl   $0x0,-0x4(%rbp)
jmp    12bc <isLeadByte+0x1bc>
movzbl -0x9(%rbp),%eax
cmp    $0x83,%eax
jle    1255 <isLeadByte+0x155>
movzbl -0x9(%rbp),%eax
cmp    $0xd4,%eax
jge    1255 <isLeadByte+0x155>
movl   $0x1,-0x4(%rbp)
jmp    12bc <isLeadByte+0x1bc>
movzbl -0x9(%rbp),%eax
cmp    $0xd8,%eax
jle    127f <isLeadByte+0x17f>
movzbl -0x9(%rbp),%eax
cmp    $0xdf,%eax
jge    127f <isLeadByte+0x17f>
movl   $0x1,-0x4(%rbp)
jmp    12bc <isLeadByte+0x1bc>
movzbl -0x9(%rbp),%eax
cmp    $0xdf,%eax
jle    12a9 <isLeadByte+0x1a9>
movzbl -0x9(%rbp),%eax
cmp    $0xfa,%eax
jge    12a9 <isLeadByte+0x1a9>
movl   $0x1,-0x4(%rbp)
jmp    12bc <isLeadByte+0x1bc>
movl   $0x0,-0x4(%rbp)
jmp    12bc <isLeadByte+0x1bc>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isLeadByte>:
xor    %eax,%eax
cmp    $0x3b4,%edi
jle    111f <isLeadByte+0x1f>
lea    -0x3b5(%rdi),%ecx
cmp    $0x2,%ecx
jae    1139 <isLeadByte+0x39>
add    $0x7f,%sil
cmp    $0x7e,%sil
jmp    116f <isLeadByte+0x6f>
cmp    $0x3a4,%edi
je     115d <isLeadByte+0x5d>
cmp    $0x3a8,%edi
jne    1172 <isLeadByte+0x72>
add    $0x5f,%sil
cmp    $0x5e,%sil
jmp    116f <isLeadByte+0x6f>
cmp    $0x551,%edi
jne    1172 <isLeadByte+0x72>
lea    0x7c(%rsi),%ecx
mov    $0x1,%al
cmp    $0x50,%cl
jb     1172 <isLeadByte+0x72>
lea    0x27(%rsi),%ecx
cmp    $0x6,%cl
jb     1172 <isLeadByte+0x72>
add    $0x20,%sil
cmp    $0x1a,%sil
jmp    116f <isLeadByte+0x6f>
lea    0x7f(%rsi),%ecx
mov    $0x1,%al
cmp    $0x1f,%cl
jb     1172 <isLeadByte+0x72>
add    $0x20,%sil
cmp    $0x1d,%sil
setb   %al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @isLeadByte(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8
store i32 %0, i32* %4
store i8 %1, i8* %5
%6 = load i32, i32* %4
switch i32 %6, label %74 [
i32 932, label %7
i32 936, label %26
i32 949, label %36
i32 950, label %36
i32 1361, label %46
]
7: ; preds = %2
%8 = load i8, i8* %5
%9 = zext i8 %8 to i32
%10 = icmp sgt i32 %9, 128
br i1 %10, label %11, label %16
11: ; preds = %7
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = icmp slt i32 %13, 160
br i1 %14, label %15, label %16
15: ; preds = %11
store i32 1, i32* %3
br label %75
16: ; preds = %11, %7
%17 = load i8, i8* %5
%18 = zext i8 %17 to i32
%19 = icmp sgt i32 %18, 223
br i1 %19, label %20, label %25
20: ; preds = %16
%21 = load i8, i8* %5
%22 = zext i8 %21 to i32
%23 = icmp slt i32 %22, 253
br i1 %23, label %24, label %25
24: ; preds = %20
store i32 1, i32* %3
br label %75
25: ; preds = %20, %16
store i32 0, i32* %3
br label %75
26: ; preds = %2
%27 = load i8, i8* %5
%28 = zext i8 %27 to i32
%29 = icmp sgt i32 %28, 160
br i1 %29, label %30, label %35
30: ; preds = %26
%31 = load i8, i8* %5
%32 = zext i8 %31 to i32
%33 = icmp slt i32 %32, 255
br i1 %33, label %34, label %35
34: ; preds = %30
store i32 1, i32* %3
br label %75
35: ; preds = %30, %26
store i32 0, i32* %3
br label %75
36: ; preds = %2, %2
%37 = load i8, i8* %5
%38 = zext i8 %37 to i32
%39 = icmp sgt i32 %38, 128
br i1 %39, label %40, label %45
40: ; preds = %36
%41 = load i8, i8* %5
%42 = zext i8 %41 to i32
%43 = icmp slt i32 %42, 255
br i1 %43, label %44, label %45
44: ; preds = %40
store i32 1, i32* %3
br label %75
45: ; preds = %40, %36
store i32 0, i32* %3
br label %75
46: ; preds = %2
%47 = load i8, i8* %5
%48 = zext i8 %47 to i32
%49 = icmp sgt i32 %48, 131
br i1 %49, label %50, label %55
50: ; preds = %46
%51 = load i8, i8* %5
%52 = zext i8 %51 to i32
%53 = icmp slt i32 %52, 212
br i1 %53, label %54, label %55
54: ; preds = %50
store i32 1, i32* %3
br label %75
55: ; preds = %50, %46
%56 = load i8, i8* %5
%57 = zext i8 %56 to i32
%58 = icmp sgt i32 %57, 216
br i1 %58, label %59, label %64
59: ; preds = %55
%60 = load i8, i8* %5
%61 = zext i8 %60 to i32
%62 = icmp slt i32 %61, 223
br i1 %62, label %63, label %64
63: ; preds = %59
store i32 1, i32* %3
br label %75
64: ; preds = %59, %55
%65 = load i8, i8* %5
%66 = zext i8 %65 to i32
%67 = icmp sgt i32 %66, 223
br i1 %67, label %68, label %73
68: ; preds = %64
%69 = load i8, i8* %5
%70 = zext i8 %69 to i32
%71 = icmp slt i32 %70, 250
br i1 %71, label %72, label %73
72: ; preds = %68
store i32 1, i32* %3
br label %75
73: ; preds = %68, %64
store i32 0, i32* %3
br label %75
74: ; preds = %2
store i32 0, i32* %3
br label %75
75: ; preds = %74, %73, %72, %63, %54, %45, %44, %35, %34, %25, %24, %15
%76 = load i32, i32* %3
ret i32 %76
}

LLVM IR (-O2):
define i32 @isLeadByte(i32 %0, i8 zeroext %1) {
switch i32 %0, label %24 [
i32 932, label %3
i32 936, label %9
i32 949, label %12
i32 950, label %12
i32 1361, label %15
]
3: ; preds = %2
%4 = add i8 %1, 127
%5 = icmp ult i8 %4, 31
br i1 %5, label %24, label %6
6: ; preds = %3
%7 = add i8 %1, 32
%8 = icmp ult i8 %7, 29
br label %24
9: ; preds = %2
%10 = add i8 %1, 95
%11 = icmp ult i8 %10, 94
br label %24
12: ; preds = %2, %2
%13 = add i8 %1, 127
%14 = icmp ult i8 %13, 126
br label %24
15: ; preds = %2
%16 = add i8 %1, 124
%17 = icmp ult i8 %16, 80
%18 = add i8 %1, 39
%19 = icmp ult i8 %18, 6
%20 = or i1 %17, %19
br i1 %20, label %24, label %21
21: ; preds = %15
%22 = add i8 %1, 32
%23 = icmp ult i8 %22, 26
br label %24
24: ; preds = %2, %21, %15, %12, %9, %6, %3
%25 = phi i1 [ true, %3 ], [ %8, %6 ], [ %11, %9 ], [ %14, %12 ], [ true, %15 ], [ %23, %21 ], [ false, %2 ]
%26 = zext i1 %25 to i32
ret i32 %26
}