xunge/DecIR huggingface dataset:
/* Variables and functions */
float RAND_MAX;
scalar_t__ rand();
float random_float(const float min, const float max) {
  if (max == min)
    return min;
  return (max - min) * ((float)rand() / RAND_MAX) + min;
}


x86 assembly (clang, -O0):
<random_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
jne    1146 <random_float+0x36>
jp     1146 <random_float+0x36>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1183 <random_float+0x73>
movss  -0xc(%rbp),%xmm0
subss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
movss  -0x10(%rbp),%xmm0
cvtsi2ss %rax,%xmm2
mov    0x2e7b(%rip),%rax
divss  (%rax),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_float>:
ucomiss %xmm0,%xmm1
jne    1118 <random_float+0x8>
jp     1118 <random_float+0x8>
ret
push   %rax
subss  %xmm0,%xmm1
movss  %xmm1,(%rsp)
xor    %eax,%eax
movss  %xmm0,0x4(%rsp)
call   1030 <rand@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
mov    0x2eaa(%rip),%rax
divss  (%rax),%xmm0
mulss  (%rsp),%xmm0
addss  0x4(%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global float 0.000000e+00
define float @random_float(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %5
%7 = load float, float* %4
%8 = fcmp oeq float %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load float, float* %4
store float %10, float* %3
br label %21
11: ; preds = %2
%12 = load float, float* %5
%13 = load float, float* %4
%14 = fsub float %12, %13
%15 = call i64 (...) @rand()
%16 = sitofp i64 %15 to float
%17 = load float, float* @RAND_MAX
%18 = fdiv float %16, %17
%19 = load float, float* %4
%20 = call float @llvm.fmuladd.f32(float %14, float %18, float %19)
store float %20, float* %3
br label %21
21: ; preds = %11, %9
%22 = load float, float* %3
ret float %22
}

LLVM IR (-O2):
@RAND_MAX = global float 0.000000e+00
define float @random_float(float %0, float %1) {
%3 = fcmp oeq float %1, %0
br i1 %3, label %11, label %4
4: ; preds = %2
%5 = fsub float %1, %0
%6 = tail call i64 (...) @rand()
%7 = sitofp i64 %6 to float
%8 = load float, float* @RAND_MAX
%9 = fdiv float %7, %8
%10 = tail call float @llvm.fmuladd.f32(float %5, float %9, float %0)
br label %11
11: ; preds = %2, %4
%12 = phi float [ %10, %4 ], [ %0, %2 ]
ret float %12
}
void EA_EndRegular(int client, float thinktime) {}


x86 assembly (clang, -O0):
<EA_EndRegular>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<EA_EndRegular>:
ret

LLVM IR (-O0):
define void @EA_EndRegular(i32 %0, float %1) {
%3 = alloca i32
%4 = alloca float
store i32 %0, i32* %3
store float %1, float* %4
ret void
}

LLVM IR (-O2):
define void @EA_EndRegular(i32 %0, float %1) {
ret void
}
void foo_2_1_1_1_2_1_2_1_2() {}


x86 assembly (clang, -O0):
<foo_2_1_1_1_2_1_2_1_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_1_1_1_2_1_2_1_2>:
ret

LLVM IR (-O0):
define void @foo_2_1_1_1_2_1_2_1_2() {
ret void
}

LLVM IR (-O2):
define void @foo_2_1_1_1_2_1_2_1_2() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ SSL;

/* Variables and functions */
int SSL_read(int /*<<< orphan*/ *, char *, size_t);
int read(int, char *, size_t);
__attribute__((always_)) int tmail_sock_read(void *fd, char *bf, size_t sz,
                                             bool protected
                                             __attribute__((__unused__))) {
  if (protected)
    return SSL_read((SSL *)fd, bf, sz);
  return read(*(int *)fd, bf, sz);
}


x86 assembly (clang, -O0):
<tmail_sock_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %ecx,-0x24(%rbp)
cmpl   $0x0,-0x24(%rbp)
je     115a <tmail_sock_read+0x3a>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <SSL_read@plt>
mov    %eax,-0x4(%rbp)
jmp    1170 <tmail_sock_read+0x50>
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1040 <read@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tmail_sock_read>:
test   %ecx,%ecx
je     1129 <tmail_sock_read+0x9>
jmp    1030 <SSL_read@plt>
mov    (%rdi),%edi
jmp    1040 <read@plt>

LLVM IR (-O0):
define i32 @tmail_sock_read(i8* %0, i8* %1, i64 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i64 %2, i64* %8
store i32 %3, i32* %9
%10 = load i32, i32* %9
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %18
12: ; preds = %4
%13 = load i8*, i8** %6
%14 = bitcast i8* %13 to i32*
%15 = load i8*, i8** %7
%16 = load i64, i64* %8
%17 = call i32 @SSL_read(i32* %14, i8* %15, i64 %16)
store i32 %17, i32* %5
br label %25
18: ; preds = %4
%19 = load i8*, i8** %6
%20 = bitcast i8* %19 to i32*
%21 = load i32, i32* %20
%22 = load i8*, i8** %7
%23 = load i64, i64* %8
%24 = call i32 @read(i32 %21, i8* %22, i64 %23)
store i32 %24, i32* %5
br label %25
25: ; preds = %18, %12
%26 = load i32, i32* %5
ret i32 %26
}

LLVM IR (-O2):
define i32 @tmail_sock_read(i8* %0, i8* %1, i64 %2, i32 %3) {
%5 = icmp eq i32 %3, 0
%6 = bitcast i8* %0 to i32*
br i1 %5, label %9, label %7
7: ; preds = %4
%8 = tail call i32 @SSL_read(i32* %6, i8* %1, i64 %2)
br label %12
9: ; preds = %4
%10 = load i32, i32* %6
%11 = tail call i32 @read(i32 %10, i8* %1, i64 %2)
br label %12
12: ; preds = %9, %7
%13 = phi i32 [ %8, %7 ], [ %11, %9 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ main();
void ResetISR(void) { main(); }


x86 assembly (clang, -O0):
<ResetISR>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <main@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ResetISR>:
xor    %eax,%eax
jmp    1030 <main@plt>

LLVM IR (-O0):
define void @ResetISR() {
%1 = call i32 (...) @main()
ret void
}

LLVM IR (-O2):
define void @ResetISR() {
%1 = tail call i32 (...) @main()
ret void
}
void MemOverlay_ChangeNtfy(void) {}


x86 assembly (clang, -O0):
<MemOverlay_ChangeNtfy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MemOverlay_ChangeNtfy>:
ret

LLVM IR (-O0):
define void @MemOverlay_ChangeNtfy() {
ret void
}

LLVM IR (-O2):
define void @MemOverlay_ChangeNtfy() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ getwd(char *);
int mywd(char *wd) { getwd(wd); }


x86 assembly (clang, -O0):
<mywd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <getwd@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mywd>:
jmp    1030 <getwd@plt>

LLVM IR (-O0):
define i32 @mywd(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @getwd(i8* %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @mywd(i8* %0) {
%2 = tail call i32 @getwd(i8* %0)
ret i32 undef
}
void av_dump_format() {}


x86 assembly (clang, -O0):
<av_dump_format>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_dump_format>:
ret

LLVM IR (-O0):
define void @av_dump_format() {
ret void
}

LLVM IR (-O2):
define void @av_dump_format() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void ft_strdel(char **ap) {
  if (ap) {
    if (*ap != NULL)
      free(*ap);
    *ap = NULL;
  }
}


x86 assembly (clang, -O0):
<ft_strdel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     114c <ft_strdel+0x3c>
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     1141 <ft_strdel+0x31>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strdel>:
test   %rdi,%rdi
je     112e <ft_strdel+0x1e>
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1126 <ft_strdel+0x16>
call   1030 <free@plt>
movq   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @ft_strdel(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = icmp ne i8** %3, null
br i1 %4, label %5, label %15
5: ; preds = %1
%6 = load i8**, i8*** %2
%7 = load i8*, i8** %6
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %13
9: ; preds = %5
%10 = load i8**, i8*** %2
%11 = load i8*, i8** %10
%12 = call i32 @free(i8* %11)
br label %13
13: ; preds = %9, %5
%14 = load i8**, i8*** %2
store i8* null, i8** %14
br label %15
15: ; preds = %13, %1
ret void
}

LLVM IR (-O2):
define void @ft_strdel(i8** %0) {
%2 = icmp eq i8** %0, null
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = load i8*, i8** %0
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @free(i8* %4)
br label %8
8: ; preds = %6, %3
store i8* null, i8** %0
br label %9
9: ; preds = %8, %1
ret void
}
int main(int argc, char **argv) {
  ;
  ;
  ;
  ;
  ;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
char *fun_06(char *x, char *y, int z, int *zz) {
  *zz = ((x[1] & x[2]) == 0) + z;
  return &x[3];
}


x86 assembly (clang, -O0):
<fun_06>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
movsbl 0x1(%rax),%eax
mov    -0x8(%rbp),%rcx
movsbl 0x2(%rcx),%ecx
and    %ecx,%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%ecx
add    -0x14(%rbp),%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
add    $0x3,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_06>:
mov    0x2(%rdi),%al
and    0x1(%rdi),%al
cmp    $0x1,%al
adc    $0x0,%edx
mov    %edx,(%rcx)
lea    0x3(%rdi),%rax
ret

LLVM IR (-O0):
define i8* @fun_06(i8* %0, i8* %1, i32 %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32* %3, i32** %8
%9 = load i8*, i8** %5
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = load i8*, i8** %5
%14 = getelementptr inbounds i8, i8* %13, i64 2
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = and i32 %12, %16
%18 = icmp eq i32 %17, 0
%19 = zext i1 %18 to i32
%20 = load i32, i32* %7
%21 = add nsw i32 %19, %20
%22 = load i32*, i32** %8
store i32 %21, i32* %22
%23 = load i8*, i8** %5
%24 = getelementptr inbounds i8, i8* %23, i64 3
ret i8* %24
}

LLVM IR (-O2):
define i8* @fun_06(i8* %0, i8* nocapture readnone %1, i32 %2, i32* nocapture writeonly %3) {
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = getelementptr inbounds i8, i8* %0, i64 2
%8 = load i8, i8* %7
%9 = and i8 %8, %6
%10 = icmp eq i8 %9, 0
%11 = zext i1 %10 to i32
%12 = add nsw i32 %11, %2
store i32 %12, i32* %3
%13 = getelementptr inbounds i8, i8* %0, i64 3
ret i8* %13
}
int in_array(int needle, int *haystack, int length) {
  for (int i = 0; i < length; i++) {
    if (needle == haystack[i]) {
      return i;
    }
  }
  return -1;
}


x86 assembly (clang, -O0):
<in_array>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1153 <in_array+0x53>
mov    -0x8(%rbp),%eax
mov    -0x10(%rbp),%rcx
movslq -0x18(%rbp),%rdx
cmp    (%rcx,%rdx,4),%eax
jne    1140 <in_array+0x40>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115a <in_array+0x5a>
jmp    1145 <in_array+0x45>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1115 <in_array+0x15>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<in_array>:
mov    $0xffffffff,%eax
test   %edx,%edx
jle    111e <in_array+0x1e>
mov    %edx,%edx
xor    %ecx,%ecx
nopl   (%rax)
cmp    %edi,(%rsi,%rcx,4)
je     111f <in_array+0x1f>
add    $0x1,%rcx
cmp    %rcx,%rdx
jne    1110 <in_array+0x10>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @in_array(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %24, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %7
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %27
13: ; preds = %9
%14 = load i32, i32* %5
%15 = load i32*, i32** %6
%16 = load i32, i32* %8
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %15, i64 %17
%19 = load i32, i32* %18
%20 = icmp eq i32 %14, %19
br i1 %20, label %21, label %23
21: ; preds = %13
%22 = load i32, i32* %8
store i32 %22, i32* %4
br label %28
23: ; preds = %13
br label %24
24: ; preds = %23
%25 = load i32, i32* %8
%26 = add nsw i32 %25, 1
store i32 %26, i32* %8
br label %9
27: ; preds = %9
store i32 -1, i32* %4
br label %28
28: ; preds = %27, %21
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @in_array(i32 %0, i32* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %7
7: ; preds = %5, %12
%8 = phi i64 [ 0, %5 ], [ %13, %12 ]
%9 = getelementptr inbounds i32, i32* %1, i64 %8
%10 = load i32, i32* %9
%11 = icmp eq i32 %10, %0
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %6
br i1 %14, label %17, label %7
15: ; preds = %7
%16 = trunc i64 %8 to i32
br label %17
17: ; preds = %12, %15, %3
%18 = phi i32 [ -1, %3 ], [ %16, %15 ], [ -1, %12 ]
ret i32 %18
}
/* Variables and functions */
int rhino_main(int, char **);
int main(int argc, char **argv) { return rhino_main(argc, argv); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <rhino_main@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
jmp    1030 <rhino_main@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @rhino_main(i32 %6, i8** %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @rhino_main(i32 %0, i8** %1)
ret i32 %3
}
/* Type definitions */
struct rlimit {
  scalar_t__ rlim_max;
  scalar_t__ rlim_cur;
};

/* Variables and functions */
int /*<<< orphan*/ RLIMIT_CORE;
int /*<<< orphan*/ eprintf(char *);
scalar_t__ setrlimit(int /*<<< orphan*/, struct rlimit *);
int pw_init(void) {
  struct rlimit rlim;
  rlim.rlim_cur = 0;
  rlim.rlim_max = 0;
  if (setrlimit(RLIMIT_CORE, &rlim) < 0)
    eprintf("setrlimit:");
  return 0;
}


x86 assembly (clang, -O0):
<pw_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
lea    -0x10(%rbp),%rsi
call   1030 <setrlimit@plt>
cmp    $0x0,%rax
jge    1160 <pw_init+0x40>
lea    0xea5(%rip),%rdi
call   1040 <eprintf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pw_init>:
sub    $0x18,%rsp
xorps  %xmm0,%xmm0
movaps %xmm0,(%rsp)
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
call   1030 <setrlimit@plt>
test   %rax,%rax
jns    114d <pw_init+0x2d>
lea    0xeb8(%rip),%rdi
call   1040 <eprintf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.rlimit = type { i64, i64 }
@RLIMIT_CORE = global i32 0
@.str = [11 x i8] c"setrlimit:\00"
define i32 @pw_init() {
%1 = alloca %struct.rlimit
%2 = getelementptr inbounds %struct.rlimit, %struct.rlimit* %1, i32 0, i32 1
store i64 0, i64* %2
%3 = getelementptr inbounds %struct.rlimit, %struct.rlimit* %1, i32 0, i32 0
store i64 0, i64* %3
%4 = load i32, i32* @RLIMIT_CORE
%5 = call i64 @setrlimit(i32 %4, %struct.rlimit* %1)
%6 = icmp slt i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i32 @eprintf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %0
ret i32 0
}

LLVM IR (-O2):
%struct.rlimit = type { i64, i64 }
@RLIMIT_CORE = global i32 0
@.str = [11 x i8] c"setrlimit:\00"
define i32 @pw_init() {
%1 = alloca %struct.rlimit
%2 = bitcast %struct.rlimit* %1 to i8*
%3 = bitcast %struct.rlimit* %1 to i8*
%4 = load i32, i32* @RLIMIT_CORE
%5 = call i64 @setrlimit(i32 %4, %struct.rlimit* %1)
%6 = icmp slt i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i32 @eprintf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %0
ret i32 0
}
int test_imm_E6uint8_reg(unsigned char val) {
  return ((val) & (-0xE6 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E6uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffff1a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E6uint8_reg>:
test   $0x1a,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E6uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -230
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E6uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 26
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
char *lowerString(char *s) {
  while (*s != 0) {
    if (*s >= 'A' && *s <= 'Z')
      *s = *s - 'A' + 'a';
    s++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<lowerString>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     115e <lowerString+0x5e>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x41,%eax
jl     114d <lowerString+0x4d>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x5a,%eax
jg     114d <lowerString+0x4d>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
sub    $0x41,%eax
add    $0x61,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <lowerString+0x8>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lowerString>:
mov    (%rdi),%al
test   %al,%al
je     112a <lowerString+0x2a>
add    $0x1,%rdi
jmp    111b <lowerString+0x1b>
nopl   0x0(%rax)
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
je     112a <lowerString+0x2a>
lea    -0x41(%rax),%ecx
cmp    $0x19,%cl
ja     1110 <lowerString+0x10>
add    $0x20,%al
mov    %al,-0x1(%rdi)
jmp    1110 <lowerString+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @lowerString(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %26, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %29
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp sge i32 %11, 65
br i1 %12, label %13, label %26
13: ; preds = %8
%14 = load i8*, i8** %2
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp sle i32 %16, 90
br i1 %17, label %18, label %26
18: ; preds = %13
%19 = load i8*, i8** %2
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = sub nsw i32 %21, 65
%23 = add nsw i32 %22, 97
%24 = trunc i32 %23 to i8
%25 = load i8*, i8** %2
store i8 %24, i8* %25
br label %26
26: ; preds = %18, %13, %8
%27 = load i8*, i8** %2
%28 = getelementptr inbounds i8, i8* %27, i32 1
store i8* %28, i8** %2
br label %3
29: ; preds = %3
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @lowerString(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %11
%5 = phi i8 [ %13, %11 ], [ %2, %1 ]
%6 = phi i8* [ %12, %11 ], [ %0, %1 ]
%7 = add i8 %5, -65
%8 = icmp ult i8 %7, 26
br i1 %8, label %9, label %11
9: ; preds = %4
%10 = add nuw nsw i8 %5, 32
store i8 %10, i8* %6
br label %11
11: ; preds = %9, %4
%12 = getelementptr inbounds i8, i8* %6, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %11, %1
ret i8* null
}
/* Type definitions */
typedef scalar_t__ int32_t;

/* Variables and functions */
scalar_t__ roundf(float const);
void round_w_s(const float *source, int32_t *dest) {
  *dest = (int32_t)roundf(*source);
}


x86 assembly (clang, -O0):
<round_w_s>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
call   1030 <roundf@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_w_s>:
push   %rbx
mov    %rsi,%rbx
movss  (%rdi),%xmm0
call   1030 <roundf@plt>
mov    %rax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @round_w_s(float* %0, i64* %1) {
%3 = alloca float*
%4 = alloca i64*
store float* %0, float** %3
store i64* %1, i64** %4
%5 = load float*, float** %3
%6 = load float, float* %5
%7 = call i64 @roundf(float %6)
%8 = load i64*, i64** %4
store i64 %7, i64* %8
ret void
}

LLVM IR (-O2):
define void @round_w_s(float* nocapture %0, i64* nocapture writeonly %1) {
%3 = load float, float* %0
%4 = tail call i64 @roundf(float %3)
store i64 %4, i64* %1
ret void
}
int hashCode(int key) { return key % 20; }


x86 assembly (clang, -O0):
<hashCode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashCode>:
movslq %edi,%rax
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @hashCode(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 20
ret i32 %4
}

LLVM IR (-O2):
define i32 @hashCode(i32 %0) {
%2 = srem i32 %0, 20
ret i32 %2
}
OP(dd, de) { op_de(); }


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <op_de@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
xor    %eax,%eax
jmp    1030 <op_de@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @op_de()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @op_de()
ret i32 undef
}
/* Variables and functions */
void b_test() {
  int *s = NULL;
  *s = 42 + 3;
}


x86 assembly (clang, -O0):
<b_test>:
push   %rbp
mov    %rsp,%rbp
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x2d,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define void @b_test() {
%1 = alloca i32*
store i32* null, i32** %1
%2 = load i32*, i32** %1
store i32 45, i32* %2
ret void
}

LLVM IR (-O2):
int dpm_sysfs_add(struct device *dev) { return 0; }


x86 assembly (clang, -O0):
<dpm_sysfs_add>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dpm_sysfs_add>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.device = type opaque
define i32 @dpm_sysfs_add(%struct.device* %0) {
%2 = alloca %struct.device*
store %struct.device* %0, %struct.device** %2
ret i32 0
}

LLVM IR (-O2):
%struct.device = type opaque
define i32 @dpm_sysfs_add(%struct.device* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ err(char *);
void recieveFromChild(int signo) { err("parent exit"); }


x86 assembly (clang, -O0):
<recieveFromChild>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <err@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<recieveFromChild>:
lea    0xee9(%rip),%rdi
jmp    1030 <err@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"parent exit\00"
define void @recieveFromChild(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @err(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"parent exit\00"
define void @recieveFromChild(i32 %0) {
%2 = tail call i32 @err(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ return_struct_c1();
int /*<<< orphan*/ take_struct_c1(int /*<<< orphan*/);
void test_struct_c1() { take_struct_c1(return_struct_c1()); }


x86 assembly (clang, -O0):
<test_struct_c1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <return_struct_c1@plt>
mov    %eax,%edi
call   1040 <take_struct_c1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_struct_c1>:
push   %rax
xor    %eax,%eax
call   1030 <return_struct_c1@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <take_struct_c1@plt>

LLVM IR (-O0):
define void @test_struct_c1() {
%1 = call i32 (...) @return_struct_c1()
%2 = call i32 @take_struct_c1(i32 %1)
ret void
}

LLVM IR (-O2):
define void @test_struct_c1() {
%1 = tail call i32 (...) @return_struct_c1()
%2 = tail call i32 @take_struct_c1(i32 %1)
ret void
}
/* Variables and functions */
int chdir(char const *);
int system_chdir(const char *path) { return chdir(path); }


x86 assembly (clang, -O0):
<system_chdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <chdir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<system_chdir>:
jmp    1030 <chdir@plt>

LLVM IR (-O0):
define i32 @system_chdir(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @chdir(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @system_chdir(i8* %0) {
%2 = tail call i32 @chdir(i8* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ NVIC_SystemReset();
void reset_do_soft_reset(void) {
  while (1) {
    NVIC_SystemReset();
  }
}


x86 assembly (clang, -O0):
<reset_do_soft_reset>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <reset_do_soft_reset+0x9>
mov    $0x0,%al
call   1030 <NVIC_SystemReset@plt>
jmp    1119 <reset_do_soft_reset+0x9>

x86 assembly (clang, -O2):
<reset_do_soft_reset>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <NVIC_SystemReset@plt>
jmp    1120 <reset_do_soft_reset+0x10>

LLVM IR (-O0):
define void @reset_do_soft_reset() {
br label %1
1: ; preds = %0, %1
%2 = call i32 (...) @NVIC_SystemReset()
br label %1
}

LLVM IR (-O2):
define void @reset_do_soft_reset() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 (...) @NVIC_SystemReset()
br label %1
}
void qos_cooling_unregister(struct thermal_cooling_device *cdev) { return; }


x86 assembly (clang, -O0):
<qos_cooling_unregister>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<qos_cooling_unregister>:
ret

LLVM IR (-O0):
%struct.thermal_cooling_device = type opaque
define void @qos_cooling_unregister(%struct.thermal_cooling_device* %0) {
%2 = alloca %struct.thermal_cooling_device*
store %struct.thermal_cooling_device* %0, %struct.thermal_cooling_device** %2
ret void
}

LLVM IR (-O2):
%struct.thermal_cooling_device = type opaque
define void @qos_cooling_unregister(%struct.thermal_cooling_device* nocapture %0) {
ret void
}
unsigned long long reverse(unsigned long long number) {
  unsigned long long res = 0;
  while (number) {
    res *= 10;
    res += number % 10;
    number /= 10;
  }
  return res;
}


x86 assembly (clang, -O0):
<reverse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1151 <reverse+0x51>
imul   $0xa,-0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    $0xa,%ecx
xor    %edx,%edx
div    %rcx
add    -0x10(%rbp),%rdx
mov    %rdx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    $0xa,%ecx
xor    %edx,%edx
div    %rcx
mov    %rax,-0x8(%rbp)
jmp    1110 <reverse+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse>:
test   %rdi,%rdi
je     114a <reverse+0x4a>
mov    %rdi,%rcx
xor    %eax,%eax
movabs $0xcccccccccccccccd,%r8
cc cc cc
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    (%rax,%rax,4),%rsi
mov    %rcx,%rax
mul    %r8
shr    $0x3,%rdx
lea    (%rdx,%rdx,1),%rax
lea    (%rax,%rax,4),%rax
mov    %rcx,%rdi
sub    %rax,%rdi
lea    (%rdi,%rsi,2),%rax
cmp    $0x9,%rcx
mov    %rdx,%rcx
ja     1120 <reverse+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @reverse(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
store i64 0, i64* %3
br label %4
4: ; preds = %7, %1
%5 = load i64, i64* %2
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = load i64, i64* %3
%9 = mul i64 %8, 10
store i64 %9, i64* %3
%10 = load i64, i64* %2
%11 = urem i64 %10, 10
%12 = load i64, i64* %3
%13 = add i64 %12, %11
store i64 %13, i64* %3
%14 = load i64, i64* %2
%15 = udiv i64 %14, 10
store i64 %15, i64* %2
br label %4
16: ; preds = %4
%17 = load i64, i64* %3
ret i64 %17
}

LLVM IR (-O2):
define i64 @reverse(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %8, %3 ], [ 0, %1 ]
%5 = phi i64 [ %9, %3 ], [ %0, %1 ]
%6 = mul i64 %4, 10
%7 = urem i64 %5, 10
%8 = add i64 %6, %7
%9 = udiv i64 %5, 10
%10 = icmp ult i64 %5, 10
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i64 [ 0, %1 ], [ %8, %3 ]
ret i64 %12
}
void TIM1_OC2_IRQHandler(void) {}


x86 assembly (clang, -O0):
<TIM1_OC2_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TIM1_OC2_IRQHandler>:
ret

LLVM IR (-O0):
define void @TIM1_OC2_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @TIM1_OC2_IRQHandler() {
ret void
}
/* Variables and functions */
scalar_t__ RAND_MAX;
int random();
double random_double() {
  int x;
  double f;
  x = random();
  f = (double)x / (double)RAND_MAX;
  return f;
}


x86 assembly (clang, -O0):
<random_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <random@plt>
mov    %eax,-0x4(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
mov    0x2eba(%rip),%rax
cvtsi2sdq (%rax),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_double>:
push   %rax
xor    %eax,%eax
call   1030 <random@plt>
cvtsi2sd %eax,%xmm0
mov    0x2ec5(%rip),%rax
cvtsi2sdq (%rax),%xmm1
divsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define double @random_double() {
%1 = alloca i32
%2 = alloca double
%3 = call i32 (...) @random()
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = sitofp i32 %4 to double
%6 = load i64, i64* @RAND_MAX
%7 = sitofp i64 %6 to double
%8 = fdiv double %5, %7
store double %8, double* %2
%9 = load double, double* %2
ret double %9
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define double @random_double() {
%1 = tail call i32 (...) @random()
%2 = sitofp i32 %1 to double
%3 = load i64, i64* @RAND_MAX
%4 = sitofp i64 %3 to double
%5 = fdiv double %2, %4
ret double %5
}
/* Variables and functions */
double log(scalar_t__);
scalar_t__ sqrt(double);
double acosh(double x) { return log(x + sqrt(x * x - 1)); }


x86 assembly (clang, -O0):
<acosh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeb3(%rip),%xmm1
addsd  %xmm1,%xmm0
call   1040 <sqrt@plt>
movsd  -0x10(%rbp),%xmm0
cvtsi2sd %rax,%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rdi
call   1030 <log@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acosh>:
push   %rax
movsd  %xmm0,(%rsp)
mulsd  %xmm0,%xmm0
addsd  0xece(%rip),%xmm0
call   1040 <sqrt@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
addsd  (%rsp),%xmm0
cvttsd2si %xmm0,%rdi
pop    %rax
jmp    1030 <log@plt>

LLVM IR (-O0):
define double @acosh(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = load double, double* %2
%6 = call double @llvm.fmuladd.f64(double %4, double %5, double -1.000000e+00)
%7 = call i64 @sqrt(double %6)
%8 = sitofp i64 %7 to double
%9 = fadd double %3, %8
%10 = fptosi double %9 to i64
%11 = call double @log(i64 %10)
ret double %11
}

LLVM IR (-O2):
define double @acosh(double %0) {
%2 = tail call double @llvm.fmuladd.f64(double %0, double %0, double -1.000000e+00)
%3 = tail call i64 @sqrt(double %2)
%4 = sitofp i64 %3 to double
%5 = fadd double %4, %0
%6 = fptosi double %5 to i64
%7 = tail call double @log(i64 %6)
ret double %7
}
extern float bits_to_float(unsigned a) { return *((float *)&a); }


x86 assembly (clang, -O0):
<bits_to_float>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<bits_to_float>:
movd   %edi,%xmm0
ret

LLVM IR (-O0):
define float @bits_to_float(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = bitcast i32* %2 to float*
%4 = load float, float* %3
ret float %4
}

LLVM IR (-O2):
define float @bits_to_float(i32 %0) {
%2 = bitcast i32 %0 to float
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ isspace(char const);
char *skip_non_whitespace(const char str[]) {
  while (!isspace(*str) && *str != '\0') {
    ++str;
  }
  return (char *)str;
}


x86 assembly (clang, -O0):
<skip_non_whitespace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    1148 <skip_non_whitespace+0x38>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    1158 <skip_non_whitespace+0x48>
jmp    1169 <skip_non_whitespace+0x59>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <skip_non_whitespace+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_non_whitespace>:
push   %rbx
mov    %rdi,%rbx
movsbl (%rdi),%edi
nopw   0x0(%rax,%rax,1)
call   1030 <isspace@plt>
test   %eax,%eax
jne    1138 <skip_non_whitespace+0x28>
cmpb   $0x0,(%rbx)
je     1138 <skip_non_whitespace+0x28>
movsbl 0x1(%rbx),%edi
add    $0x1,%rbx
jmp    1120 <skip_non_whitespace+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @skip_non_whitespace(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %15, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = call i32 @isspace(i8 signext %5)
%7 = icmp ne i32 %6, 0
br i1 %7, label %13, label %8
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br label %13
13: ; preds = %8, %3
%14 = phi i1 [ false, %3 ], [ %12, %8 ]
br i1 %14, label %15, label %18
15: ; preds = %13
%16 = load i8*, i8** %2
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %2
br label %3
18: ; preds = %13
%19 = load i8*, i8** %2
ret i8* %19
}

LLVM IR (-O2):
define i8* @skip_non_whitespace(i8* %0) {
%2 = load i8, i8* %0
%3 = tail call i32 @isspace(i8 signext %2)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %14
5: ; preds = %1, %9
%6 = phi i8* [ %10, %9 ], [ %0, %1 ]
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %5
%10 = getelementptr inbounds i8, i8* %6, i64 1
%11 = load i8, i8* %10
%12 = tail call i32 @isspace(i8 signext %11)
%13 = icmp eq i32 %12, 0
br i1 %13, label %5, label %14
14: ; preds = %5, %9, %1
%15 = phi i8* [ %0, %1 ], [ %10, %9 ], [ %6, %5 ]
ret i8* %15
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int /*<<< orphan*/ rr__write(int /*<<< orphan*/);
void rr_rel(int64_t relid) {
  rr__write(0);
  rr__write(relid);
}


x86 assembly (clang, -O0):
<rr_rel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
call   1030 <rr__write@plt>
mov    -0x4(%rbp),%edi
call   1030 <rr__write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rr_rel>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
call   1030 <rr__write@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <rr__write@plt>

LLVM IR (-O0):
define void @rr_rel(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @rr__write(i32 0)
%4 = load i32, i32* %2
%5 = call i32 @rr__write(i32 %4)
ret void
}

LLVM IR (-O2):
define void @rr_rel(i32 %0) {
%2 = tail call i32 @rr__write(i32 0)
%3 = tail call i32 @rr__write(i32 %0)
ret void
}
int get_left_most_group_right_bound(int row_index, int group_size) {
  return ((row_index - (row_index % group_size)) + group_size) - 1;
}


x86 assembly (clang, -O0):
<get_left_most_group_right_bound>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    -0xc(%rbp),%eax
sub    %edx,%eax
add    -0x8(%rbp),%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_left_most_group_right_bound>:
mov    %edi,%eax
cltd
idiv   %esi
lea    (%rdi,%rsi,1),%eax
not    %edx
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @get_left_most_group_right_bound(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = srem i32 %6, %7
%9 = sub nsw i32 %5, %8
%10 = load i32, i32* %4
%11 = add nsw i32 %9, %10
%12 = sub nsw i32 %11, 1
ret i32 %12
}

LLVM IR (-O2):
define i32 @get_left_most_group_right_bound(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
%4 = add i32 %0, -1
%5 = add i32 %4, %1
%6 = sub i32 %5, %3
ret i32 %6
}
void glDrawBuffers(void) { return; }


x86 assembly (clang, -O0):
<glDrawBuffers>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glDrawBuffers>:
ret

LLVM IR (-O0):
define void @glDrawBuffers() {
ret void
}

LLVM IR (-O2):
define void @glDrawBuffers() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int main(int argc, char *argv[]) {
  char people = 0;
#pragma omp single
  { people = 1; }
  if (people != 1)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movb   $0x0,-0x11(%rbp)
movb   $0x1,-0x11(%rbp)
movsbl -0x11(%rbp),%eax
cmp    $0x1,%eax
je     1142 <main+0x32>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8 0, i8* %6
store i8 1, i8* %6
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 1
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = call i32 (...) @abort()
unreachable
12: ; preds = %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
void freeImageDocumentChar(struct imageDocumentChar *targetChar) {
  if (targetChar) {
  }
}


x86 assembly (clang, -O0):
<freeImageDocumentChar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1118 <freeImageDocumentChar+0x18>
jmp    1118 <freeImageDocumentChar+0x18>
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeImageDocumentChar>:
ret

LLVM IR (-O0):
%struct.imageDocumentChar = type opaque
define void @freeImageDocumentChar(%struct.imageDocumentChar* %0) {
%2 = alloca %struct.imageDocumentChar*
store %struct.imageDocumentChar* %0, %struct.imageDocumentChar** %2
%3 = load %struct.imageDocumentChar*, %struct.imageDocumentChar** %2
%4 = icmp ne %struct.imageDocumentChar* %3, null
br i1 %4, label %5, label %6
5: ; preds = %1
br label %6
6: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
%struct.imageDocumentChar = type opaque
define void @freeImageDocumentChar(%struct.imageDocumentChar* nocapture %0) {
ret void
}
void *ConvertToPhysicalAddress(volatile void *addr) {
  unsigned virt = (unsigned)addr;
  unsigned phys;
  if (virt & 0x80000000) {
    if (virt & 0x40000000) {
      phys = virt;
    } else {
      phys = virt & 0x1fffffff;
    }
  } else {
    phys = virt + 0x40000000;
  }
  return (void *)phys;
}


x86 assembly (clang, -O0):
<ConvertToPhysicalAddress>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x80000000,%eax
cmp    $0x0,%eax
je     114c <ConvertToPhysicalAddress+0x4c>
mov    -0xc(%rbp),%eax
and    $0x40000000,%eax
cmp    $0x0,%eax
je     113c <ConvertToPhysicalAddress+0x3c>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1147 <ConvertToPhysicalAddress+0x47>
mov    -0xc(%rbp),%eax
and    $0x1fffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    1157 <ConvertToPhysicalAddress+0x57>
mov    -0xc(%rbp),%eax
add    $0x40000000,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ConvertToPhysicalAddress>:
test   %edi,%edi
js     1111 <ConvertToPhysicalAddress+0x11>
add    $0x40000000,%rdi
mov    %rdi,%rax
mov    %eax,%eax
ret
mov    %edi,%eax
and    $0x1fffffff,%eax
test   $0x40000000,%edi
cmovne %rdi,%rax
mov    %eax,%eax
ret

LLVM IR (-O0):
define i8* @ConvertToPhysicalAddress(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = ptrtoint i8* %5 to i32
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = and i32 %7, -2147483648
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %20
10: ; preds = %1
%11 = load i32, i32* %3
%12 = and i32 %11, 1073741824
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %10
%15 = load i32, i32* %3
store i32 %15, i32* %4
br label %19
16: ; preds = %10
%17 = load i32, i32* %3
%18 = and i32 %17, 536870911
store i32 %18, i32* %4
br label %19
19: ; preds = %16, %14
br label %23
20: ; preds = %1
%21 = load i32, i32* %3
%22 = add i32 %21, 1073741824
store i32 %22, i32* %4
br label %23
23: ; preds = %20, %19
%24 = load i32, i32* %4
%25 = zext i32 %24 to i64
%26 = inttoptr i64 %25 to i8*
ret i8* %26
}

LLVM IR (-O2):
define i8* @ConvertToPhysicalAddress(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i32
%4 = icmp sgt i32 %3, -1
br i1 %4, label %10, label %5
5: ; preds = %1
%6 = and i32 %3, 1073741824
%7 = icmp eq i32 %6, 0
%8 = and i64 %2, 536870911
%9 = select i1 %7, i64 %8, i64 %2
br label %12
10: ; preds = %1
%11 = add i64 %2, 1073741824
br label %12
12: ; preds = %5, %10
%13 = phi i64 [ %11, %10 ], [ %9, %5 ]
%14 = and i64 %13, 4294967295
%15 = inttoptr i64 %14 to i8*
ret i8* %15
}
/* Variables and functions */
int /*<<< orphan*/ gen_opi(int);
void gen_opl(int op) { gen_opi(op); }


x86 assembly (clang, -O0):
<gen_opl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <gen_opi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_opl>:
jmp    1030 <gen_opi@plt>

LLVM IR (-O0):
define void @gen_opl(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @gen_opi(i32 %3)
ret void
}

LLVM IR (-O2):
define void @gen_opl(i32 %0) {
%2 = tail call i32 @gen_opi(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int output(char *);
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char **argv) {
  if (argc < 2) {
    printf("Syntax: %s <input file>\n", argv[0]);
    exit(1);
  }
  return output(argv[1]);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    116d <main+0x3d>
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xea2(%rip),%rdi
call   1040 <printf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <output@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x1,%edi
jle    1140 <main+0x10>
mov    0x8(%rsi),%rdi
pop    %rax
jmp    1030 <output@plt>
mov    (%rsi),%rsi
lea    0xeb6(%rip),%rdi
call   1040 <printf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"Syntax: %s <input file>\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 2
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 0
%11 = load i8*, i8** %10
%12 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %11)
%13 = call i32 @exit(i32 1)
unreachable
14: ; preds = %2
%15 = load i8**, i8*** %5
%16 = getelementptr inbounds i8*, i8** %15, i64 1
%17 = load i8*, i8** %16
%18 = call i32 @output(i8* %17)
ret i32 %18
}

LLVM IR (-O2):
@.str = [25 x i8] c"Syntax: %s <input file>\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = load i8*, i8** %1
%6 = tail call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = tail call i32 @exit(i32 1)
unreachable
8: ; preds = %2
%9 = getelementptr inbounds i8*, i8** %1, i64 1
%10 = load i8*, i8** %9
%11 = tail call i32 @output(i8* %10)
ret i32 %11
}
void kol_wnd_define(unsigned x, unsigned y, unsigned w, unsigned h, unsigned cs,
                    unsigned b, char *t) {
  asm volatile("int $0x40" ::"a"(0), "b"(x * 65536 + w), "c"(y * 65536 + h),
               "d"(cs), "D"(t), "S"(b));
}


x86 assembly (clang, -O0):
<kol_wnd_define>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    0x10(%rbp),%rax
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9d,-0x20(%rbp)
mov    -0xc(%rbp),%ebx
shl    $0x10,%ebx
add    -0x14(%rbp),%ebx
mov    -0x10(%rbp),%ecx
shl    $0x10,%ecx
add    -0x18(%rbp),%ecx
mov    -0x1c(%rbp),%edx
mov    0x10(%rbp),%rdi
mov    -0x20(%rbp),%esi
xor    %eax,%eax
int    $0x40
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<kol_wnd_define>:
push   %rbx
mov    0x10(%rsp),%r10
shl    $0x10,%edi
lea    (%rdi,%rdx,1),%ebx
shl    $0x10,%esi
add    %esi,%ecx
xor    %eax,%eax
mov    %r10,%rdi
mov    %r9d,%esi
mov    %r8d,%edx
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define void @kol_wnd_define(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i8* %6) {
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i8*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32 %4, i32* %12
store i32 %5, i32* %13
store i8* %6, i8** %14
%15 = load i32, i32* %8
%16 = mul i32 %15, 65536
%17 = load i32, i32* %10
%18 = add i32 %16, %17
%19 = load i32, i32* %9
%20 = mul i32 %19, 65536
%21 = load i32, i32* %11
%22 = add i32 %20, %21
%23 = load i32, i32* %12
%24 = load i8*, i8** %14
%25 = load i32, i32* %13
ret void
}

LLVM IR (-O2):
define void @kol_wnd_define(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i8* %6) {
%8 = shl i32 %0, 16
%9 = add i32 %8, %2
%10 = shl i32 %1, 16
%11 = add i32 %10, %3
tail call void asm sideeffect "int $$0x40", "{ax},{bx},{cx},{dx},{di},{si},~{dirflag},~{fpsr},~{flags}"(i32 0, i32 %9, i32 %11, i32 %4, i8* %6, i32 %5)
ret void
}
void timer_warn(void) {}


x86 assembly (clang, -O0):
<timer_warn>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timer_warn>:
ret

LLVM IR (-O0):
define void @timer_warn() {
ret void
}

LLVM IR (-O2):
define void @timer_warn() {
ret void
}