xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int safe_atou16_full(char const *, int /*<<< orphan*/, int /*<<< orphan*/ *);
int safe_atou16(const char *s, uint16_t *ret) {
  return safe_atou16_full(s, 0, ret);
}


x86 assembly (clang, -O0):
<safe_atou16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <safe_atou16_full@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_atou16>:
mov    %rsi,%rdx
xor    %esi,%esi
jmp    1030 <safe_atou16_full@plt>

LLVM IR (-O0):
define i32 @safe_atou16(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i32*, i32** %4
%7 = call i32 @safe_atou16_full(i8* %5, i32 0, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @safe_atou16(i8* %0, i32* %1) {
%3 = tail call i32 @safe_atou16_full(i8* %0, i32 0, i32* %1)
ret i32 %3
}
int __attribute__((no)) bar(unsigned short x, short y) { return x * y; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movzwl -0x2(%rbp),%eax
movswl -0x4(%rbp),%ecx
imul   %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @bar(i16 zeroext %0, i16 signext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = load i16, i16* %4
%8 = sext i16 %7 to i32
%9 = mul nsw i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @bar(i16 zeroext %0, i16 signext %1) {
%3 = zext i16 %0 to i32
%4 = sext i16 %1 to i32
%5 = mul nsw i32 %4, %3
ret i32 %5
}
int main(void) {
  int x;
  { return (x == (x != 0)); }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%eax
cmpl   $0x0,-0x8(%rbp)
setne  %cl
and    $0x1,%cl
movzbl %cl,%ecx
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i32
%7 = icmp eq i32 %3, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ memset(short *, int /*<<< orphan*/, int);
void s_shortclr(short *ip1, int cnt) { memset(ip1, 0, cnt * sizeof(*ip1)); }


x86 assembly (clang, -O0):
<s_shortclr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
movslq -0xc(%rbp),%rax
shl    $0x1,%rax
mov    %eax,%edx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_shortclr>:
lea    (%rsi,%rsi,1),%edx
xor    %esi,%esi
jmp    1030 <memset@plt>

LLVM IR (-O0):
define void @s_shortclr(i16* %0, i32 %1) {
%3 = alloca i16*
%4 = alloca i32
store i16* %0, i16** %3
store i32 %1, i32* %4
%5 = load i16*, i16** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = mul i64 %7, 2
%9 = trunc i64 %8 to i32
%10 = call i32 @memset(i16* %5, i32 0, i32 %9)
ret void
}

LLVM IR (-O2):
define void @s_shortclr(i16* %0, i32 %1) {
%3 = shl i32 %1, 1
%4 = tail call i32 @memset(i16* %0, i32 0, i32 %3)
ret void
}
int fun981() { return 981; }


x86 assembly (clang, -O0):
<fun981>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3d5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun981>:
mov    $0x3d5,%eax
ret

LLVM IR (-O0):
define i32 @fun981() {
ret i32 981
}

LLVM IR (-O2):
define i32 @fun981() {
ret i32 981
}
/* Variables and functions */
int isNull(void *ptr) { return ptr == NULL; }


x86 assembly (clang, -O0):
<isNull>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isNull>:
xor    %eax,%eax
test   %rdi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @isNull(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @isNull(i8* readnone %0) {
%2 = icmp eq i8* %0, null
%3 = zext i1 %2 to i32
ret i32 %3
}
int is_prime(unsigned long int number) {
  if (number <= 1)
    return 0;
  unsigned long int i;
  for (i = 2; i * i <= number; i++) {
    if (number % i == 0)
      return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<is_prime>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x1,-0x10(%rbp)
ja     111f <is_prime+0x1f>
movl   $0x0,-0x4(%rbp)
jmp    1179 <is_prime+0x79>
movq   $0x2,-0x18(%rbp)
mov    -0x18(%rbp),%rax
imul   -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
ja     1172 <is_prime+0x72>
mov    -0x10(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x18(%rbp)
cmp    $0x0,%rdx
jne    115c <is_prime+0x5c>
movl   $0x0,-0x4(%rbp)
jmp    1179 <is_prime+0x79>
jmp    1161 <is_prime+0x61>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1127 <is_prime+0x27>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_prime>:
xor    %ecx,%ecx
cmp    $0x2,%rdi
jb     115b <is_prime+0x5b>
mov    $0x1,%ecx
cmp    $0x4,%rdi
jb     115b <is_prime+0x5b>
mov    $0x2,%esi
nopl   0x0(%rax,%rax,1)
mov    %rdi,%rax
or     %rsi,%rax
shr    $0x20,%rax
je     1140 <is_prime+0x40>
mov    %rdi,%rax
xor    %edx,%edx
div    %rsi
test   %rdx,%rdx
jne    114b <is_prime+0x4b>
jmp    115e <is_prime+0x5e>
nopl   0x0(%rax,%rax,1)
mov    %edi,%eax
xor    %edx,%edx
div    %esi
test   %rdx,%rdx
je     115e <is_prime+0x5e>
add    $0x1,%rsi
mov    %rsi,%rax
imul   %rsi,%rax
cmp    %rdi,%rax
jbe    1120 <is_prime+0x20>
mov    %ecx,%eax
ret
xor    %ecx,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @is_prime(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
%5 = load i64, i64* %3
%6 = icmp ule i64 %5, 1
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %26
8: ; preds = %1
store i64 2, i64* %4
br label %9
9: ; preds = %22, %8
%10 = load i64, i64* %4
%11 = load i64, i64* %4
%12 = mul i64 %10, %11
%13 = load i64, i64* %3
%14 = icmp ule i64 %12, %13
br i1 %14, label %15, label %25
15: ; preds = %9
%16 = load i64, i64* %3
%17 = load i64, i64* %4
%18 = urem i64 %16, %17
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %15
store i32 0, i32* %2
br label %26
21: ; preds = %15
br label %22
22: ; preds = %21
%23 = load i64, i64* %4
%24 = add i64 %23, 1
store i64 %24, i64* %4
br label %9
25: ; preds = %9
store i32 1, i32* %2
br label %26
26: ; preds = %25, %20, %7
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @is_prime(i64 %0) {
%2 = icmp ult i64 %0, 2
br i1 %2, label %13, label %3
3: ; preds = %1
%4 = icmp ult i64 %0, 4
br i1 %4, label %13, label %8
5: ; preds = %8
%6 = mul i64 %12, %12
%7 = icmp ugt i64 %6, %0
br i1 %7, label %13, label %8
8: ; preds = %3, %5
%9 = phi i64 [ %12, %5 ], [ 2, %3 ]
%10 = urem i64 %0, %9
%11 = icmp eq i64 %10, 0
%12 = add i64 %9, 1
br i1 %11, label %13, label %5
13: ; preds = %5, %8, %3, %1
%14 = phi i32 [ 0, %1 ], [ 1, %3 ], [ 1, %5 ], [ 0, %8 ]
ret i32 %14
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef scalar_t__ volatile uint32_t;

/* Variables and functions */
void USBLPMIntEnable(uint32_t ui32Base, uint32_t ui32Ints) {
  ;
  (*((volatile uint8_t *)(ui32Base + 0x00000363))) |= ui32Ints;
}


x86 assembly (clang, -O0):
<USBLPMIntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x363(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x363(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBLPMIntEnable>:
mov    %rdi,-0x8(%rsp)
mov    %rsi,-0x10(%rsp)
mov    -0x10(%rsp),%rax
mov    -0x8(%rsp),%rcx
or     %rax,0x363(%rcx)
ret

LLVM IR (-O0):
define void @USBLPMIntEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = load volatile i64, i64* %3
%7 = add nsw i64 %6, 867
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = or i64 %9, %5
store volatile i64 %10, i64* %8
ret void
}

LLVM IR (-O2):
define void @USBLPMIntEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = load volatile i64, i64* %3
%7 = add nsw i64 %6, 867
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = or i64 %9, %5
store volatile i64 %10, i64* %8
ret void
}
int greaterThan(int lhs, int rhs) { return lhs > rhs; }


x86 assembly (clang, -O0):
<greaterThan>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<greaterThan>:
xor    %eax,%eax
cmp    %esi,%edi
setg   %al
ret

LLVM IR (-O0):
define i32 @greaterThan(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @greaterThan(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int rand();
unsigned int get_random_int(unsigned int max) {
  int r;
  float s;
  r = rand();
  s = (float)(r & 0x7fff) / (float)0x7fff;
  return (s * max);
}


x86 assembly (clang, -O0):
<get_random_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
call   1030 <rand@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x7fff,%eax
cvtsi2ss %eax,%xmm0
movss  0xec7(%rip),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
mov    -0x4(%rbp),%eax
cvtsi2ss %rax,%xmm1
mulss  %xmm1,%xmm0
cvttss2si %xmm0,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_random_int>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
and    $0x7fff,%eax
cvtsi2ss %eax,%xmm0
divss  0xed5(%rip),%xmm0
mov    %ebx,%eax
cvtsi2ss %rax,%xmm1
mulss  %xmm0,%xmm1
cvttss2si %xmm1,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @get_random_int(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca float
store i32 %0, i32* %2
%5 = call i32 (...) @rand()
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = and i32 %6, 32767
%8 = sitofp i32 %7 to float
%9 = fdiv float %8, 3.276700e+04
store float %9, float* %4
%10 = load float, float* %4
%11 = load i32, i32* %2
%12 = uitofp i32 %11 to float
%13 = fmul float %10, %12
%14 = fptoui float %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @get_random_int(i32 %0) {
%2 = tail call i32 (...) @rand()
%3 = and i32 %2, 32767
%4 = sitofp i32 %3 to float
%5 = fdiv float %4, 3.276700e+04
%6 = uitofp i32 %0 to float
%7 = fmul float %5, %6
%8 = fptoui float %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ escreveVet(int *, int);
int /*<<< orphan*/ leVet(int *, int);
int main() {
  int vet1[5], vet2[5];
  leVet(vet1, 5);
  leVet(vet2, 5);
  escreveVet(vet1, 5);
  escreveVet(vet2, 5);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x20(%rbp),%rdi
mov    $0x5,%esi
call   1040 <leVet@plt>
lea    -0x40(%rbp),%rdi
mov    $0x5,%esi
call   1040 <leVet@plt>
lea    -0x20(%rbp),%rdi
mov    $0x5,%esi
call   1030 <escreveVet@plt>
lea    -0x40(%rbp),%rdi
mov    $0x5,%esi
call   1030 <escreveVet@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
sub    $0x38,%rsp
lea    0x20(%rsp),%r14
mov    %r14,%rdi
mov    $0x5,%esi
call   1040 <leVet@plt>
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x5,%esi
call   1040 <leVet@plt>
mov    %r14,%rdi
mov    $0x5,%esi
call   1030 <escreveVet@plt>
mov    %rbx,%rdi
mov    $0x5,%esi
call   1030 <escreveVet@plt>
xor    %eax,%eax
add    $0x38,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [5 x i32]
%3 = alloca [5 x i32]
store i32 0, i32* %1
%4 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%5 = call i32 @leVet(i32* %4, i32 5)
%6 = getelementptr inbounds [5 x i32], [5 x i32]* %3, i64 0, i64 0
%7 = call i32 @leVet(i32* %6, i32 5)
%8 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%9 = call i32 @escreveVet(i32* %8, i32 5)
%10 = getelementptr inbounds [5 x i32], [5 x i32]* %3, i64 0, i64 0
%11 = call i32 @escreveVet(i32* %10, i32 5)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [5 x i32]
%2 = alloca [5 x i32]
%3 = bitcast [5 x i32]* %1 to i8*
%4 = bitcast [5 x i32]* %2 to i8*
%5 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%6 = call i32 @leVet(i32* %5, i32 5)
%7 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%8 = call i32 @leVet(i32* %7, i32 5)
%9 = call i32 @escreveVet(i32* %5, i32 5)
%10 = call i32 @escreveVet(i32* %7, i32 5)
ret i32 0
}
float fabsf(float x) {
  float r;
  __asm__ __volatile__("fabs" : "=t"(r) : "0"(x));
  return r;
}


x86 assembly (clang, -O0):
<fabsf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
flds   -0xc(%rbp)
fabs
fstps  -0x10(%rbp)
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fabsf>:
movss  %xmm0,-0x4(%rsp)
flds   -0x4(%rsp)
fabs
fstps  -0x8(%rsp)
movss  -0x8(%rsp),%xmm0
ret

LLVM IR (-O0):
define float @fabsf(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = call float asm sideeffect "fabs", "={st},0,~{dirflag},~{fpsr},~{flags}"(float %4)
store float %5, float* %3
%6 = load float, float* %3
ret float %6
}

LLVM IR (-O2):
define float @fabsf(float %0) {
%2 = tail call float asm sideeffect "fabs", "={st},0,~{dirflag},~{fpsr},~{flags}"(float %0)
ret float %2
}
int test_bit(int nr, const volatile unsigned long *addr) {
  return 1UL &
         (addr[((nr) / (sizeof(long) * 8))] >> (nr & ((sizeof(long) * 8) - 1)));
}


x86 assembly (clang, -O0):
<test_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rcx
shr    $0x6,%rcx
mov    (%rax,%rcx,8),%rax
movslq -0x4(%rbp),%rcx
and    $0x3f,%rcx
shr    %cl,%rax
and    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_bit>:
movslq %edi,%rcx
mov    %rcx,%rax
shr    $0x6,%rax
mov    (%rsi,%rax,8),%rax
shr    %cl,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @test_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = udiv i64 %7, 64
%9 = getelementptr inbounds i64, i64* %5, i64 %8
%10 = load volatile i64, i64* %9
%11 = load i32, i32* %3
%12 = sext i32 %11 to i64
%13 = and i64 %12, 63
%14 = lshr i64 %10, %13
%15 = and i64 1, %14
%16 = trunc i64 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @test_bit(i32 %0, i64* %1) {
%3 = sext i32 %0 to i64
%4 = lshr i64 %3, 6
%5 = getelementptr inbounds i64, i64* %1, i64 %4
%6 = load volatile i64, i64* %5
%7 = and i64 %3, 63
%8 = lshr i64 %6, %7
%9 = trunc i64 %8 to i32
%10 = and i32 %9, 1
ret i32 %10
}
/* Variables and functions */
int tcflush(int fd, int queue_selector) { return 0; }


x86 assembly (clang, -O0):
<tcflush>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcflush>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @tcflush(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @tcflush(i32 %0, i32 %1) {
ret i32 0
}
/* Type definitions */
struct timezone {
  int dummy;
};
struct timeval {
  int tv_sec;
  int tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, struct timezone *);
unsigned long GetTickCount() {
  struct timeval tv;
  gettimeofday(&tv, (struct timezone *)NULL);
  return (tv.tv_sec * 1000) + (tv.tv_usec / 1000);
}


x86 assembly (clang, -O0):
<GetTickCount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
imul   $0x3e8,-0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetTickCount>:
push   %rax
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
movslq (%rsp),%rax
imul   $0x3e8,%rax,%rcx
movslq 0x4(%rsp),%rax
imul   $0x10624dd3,%rax,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rax
add    %edx,%eax
cltq
add    %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
%struct.timezone = type { i32 }
define i64 @GetTickCount() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, %struct.timezone* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load i32, i32* %3
%5 = mul nsw i32 %4, 1000
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%7 = load i32, i32* %6
%8 = sdiv i32 %7, 1000
%9 = add nsw i32 %5, %8
%10 = sext i32 %9 to i64
ret i64 %10
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
%struct.timezone = type { i32 }
define i64 @GetTickCount() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, %struct.timezone* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load i32, i32* %4
%6 = mul nsw i32 %5, 1000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%8 = load i32, i32* %7
%9 = sdiv i32 %8, 1000
%10 = add nsw i32 %9, %6
%11 = sext i32 %10 to i64
ret i64 %11
}
int sandbox_issue_extension(const char *path, char **ext_token) { return -1; }


x86 assembly (clang, -O0):
<sandbox_issue_extension>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sandbox_issue_extension>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @sandbox_issue_extension(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
ret i32 -1
}

LLVM IR (-O2):
define i32 @sandbox_issue_extension(i8* nocapture readnone %0, i8** nocapture readnone %1) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char const *);
void die(const char *what) {
  perror(what);
  exit(1);
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<die>:
push   %rax
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @die(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @die(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int dal_reg_tbl_write(unsigned int, unsigned int, unsigned int *, unsigned int);
int emac1_reg_tbl_set(unsigned int dev_id, unsigned int reg_addr,
                      unsigned int *pvalue, unsigned int width) {
  return dal_reg_tbl_write(dev_id, reg_addr + 0x8000, pvalue, width);
}


x86 assembly (clang, -O0):
<emac1_reg_tbl_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
add    $0x8000,%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
call   1030 <dal_reg_tbl_write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emac1_reg_tbl_set>:
add    $0x8000,%esi
jmp    1030 <dal_reg_tbl_write@plt>

LLVM IR (-O0):
define i32 @emac1_reg_tbl_set(i32 %0, i32 %1, i32* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = add i32 %10, 32768
%12 = load i32*, i32** %7
%13 = load i32, i32* %8
%14 = call i32 @dal_reg_tbl_write(i32 %9, i32 %11, i32* %12, i32 %13)
ret i32 %14
}

LLVM IR (-O2):
define i32 @emac1_reg_tbl_set(i32 %0, i32 %1, i32* %2, i32 %3) {
%5 = add i32 %1, 32768
%6 = tail call i32 @dal_reg_tbl_write(i32 %0, i32 %5, i32* %2, i32 %3)
ret i32 %6
}
void sec_getlog_trim(unsigned int *val) { *val = (*val) & 0x0FFFFFFF; }


x86 assembly (clang, -O0):
<sec_getlog_trim>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
and    $0xfffffff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sec_getlog_trim>:
andb   $0xf,0x3(%rdi)
ret

LLVM IR (-O0):
define void @sec_getlog_trim(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 268435455
%6 = load i32*, i32** %2
store i32 %5, i32* %6
ret void
}

LLVM IR (-O2):
define void @sec_getlog_trim(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 268435455
store i32 %3, i32* %0
ret void
}
/* Variables and functions */
int f(int);
int g(int);
int main() { return f(1) - g(1); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <f@plt>
mov    %eax,-0x8(%rbp)
mov    $0x1,%edi
call   1040 <g@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
sub    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x1,%edi
call   1030 <f@plt>
mov    %eax,%ebx
mov    $0x1,%edi
call   1040 <g@plt>
sub    %eax,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @f(i32 1)
%3 = call i32 @g(i32 1)
%4 = sub nsw i32 %2, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @f(i32 1)
%2 = tail call i32 @g(i32 1)
%3 = sub nsw i32 %1, %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ unhandled_exception();
void Dummy_Handler(void) { unhandled_exception(); }


x86 assembly (clang, -O0):
<Dummy_Handler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <unhandled_exception@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Dummy_Handler>:
xor    %eax,%eax
jmp    1030 <unhandled_exception@plt>

LLVM IR (-O0):
define void @Dummy_Handler() {
%1 = call i32 (...) @unhandled_exception()
ret void
}

LLVM IR (-O2):
define void @Dummy_Handler() {
%1 = tail call i32 (...) @unhandled_exception()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
char *itob(int /*<<< orphan*/, int, char *);
char *uint32tob(uint32_t in, char *out) { return itob(in, 32, out); }


x86 assembly (clang, -O0):
<uint32tob>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rdx
mov    $0x20,%esi
call   1030 <itob@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uint32tob>:
mov    %rsi,%rdx
mov    $0x20,%esi
jmp    1030 <itob@plt>

LLVM IR (-O0):
define i8* @uint32tob(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i8* @itob(i32 %5, i32 32, i8* %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @uint32tob(i32 %0, i8* %1) {
%3 = tail call i8* @itob(i32 %0, i32 32, i8* %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ uart_puts(char *);
void protocol_commanderror() { uart_puts("!\n"); }


x86 assembly (clang, -O0):
<protocol_commanderror>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <uart_puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<protocol_commanderror>:
lea    0xee9(%rip),%rdi
jmp    1030 <uart_puts@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"!\0A\00"
define void @protocol_commanderror() {
%1 = call i32 @uart_puts(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"!\0A\00"
define void @protocol_commanderror() {
%1 = tail call i32 @uart_puts(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int isPrimeInner(int, int);
int isPrime(int original) { return isPrimeInner(original, 1); }


x86 assembly (clang, -O0):
<isPrime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <isPrimeInner@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPrime>:
mov    $0x1,%esi
jmp    1030 <isPrimeInner@plt>

LLVM IR (-O0):
define i32 @isPrime(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @isPrimeInner(i32 %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @isPrime(i32 %0) {
%2 = tail call i32 @isPrimeInner(i32 %0, i32 1)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int main(void) {
  puts("DMA is working");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"DMA is working\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @puts(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c"DMA is working\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ baz();
int g(int x) {
  if (x) {
    baz();
    return 0;
  } else {
    baz();
    return 1;
  }
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1138 <g+0x28>
mov    $0x0,%al
call   1030 <baz@plt>
movl   $0x0,-0x4(%rbp)
jmp    1146 <g+0x36>
mov    $0x0,%al
call   1030 <baz@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
push   %rbx
xor    %ebx,%ebx
test   %edi,%edi
sete   %bl
xor    %eax,%eax
call   1030 <baz@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @g(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 (...) @baz()
store i32 0, i32* %2
br label %10
8: ; preds = %1
%9 = call i32 (...) @baz()
store i32 1, i32* %2
br label %10
10: ; preds = %8, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @g(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = tail call i32 (...) @baz()
%4 = zext i1 %2 to i32
ret i32 %4
}
/* Variables and functions */
int O_APPEND;
int O_CREAT;
int O_WRONLY;
int fdevent_open_cloexec(char const *const, int, int, int);
int fdlog_file_open_fd(const char *const fn) {
  int flags = O_APPEND | O_WRONLY | O_CREAT;
  return fdevent_open_cloexec(fn, 1, flags, 0644);
}


x86 assembly (clang, -O0):
<fdlog_file_open_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ea5(%rip),%rax
mov    (%rax),%eax
mov    0x2ea4(%rip),%rcx
or     (%rcx),%eax
mov    0x2ec3(%rip),%rcx
or     (%rcx),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    $0x1,%esi
mov    $0x1a4,%ecx
call   1030 <fdevent_open_cloexec@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdlog_file_open_fd>:
mov    0x2eb1(%rip),%rax
mov    0x2eb2(%rip),%rcx
mov    (%rcx),%edx
or     (%rax),%edx
mov    0x2ecf(%rip),%rax
or     (%rax),%edx
mov    $0x1,%esi
mov    $0x1a4,%ecx
jmp    1030 <fdevent_open_cloexec@plt>

LLVM IR (-O0):
@O_APPEND = global i32 0
@O_WRONLY = global i32 0
@O_CREAT = global i32 0
define i32 @fdlog_file_open_fd(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i32, i32* @O_APPEND
%5 = load i32, i32* @O_WRONLY
%6 = or i32 %4, %5
%7 = load i32, i32* @O_CREAT
%8 = or i32 %6, %7
store i32 %8, i32* %3
%9 = load i8*, i8** %2
%10 = load i32, i32* %3
%11 = call i32 @fdevent_open_cloexec(i8* %9, i32 1, i32 %10, i32 420)
ret i32 %11
}

LLVM IR (-O2):
@O_APPEND = global i32 0
@O_WRONLY = global i32 0
@O_CREAT = global i32 0
define i32 @fdlog_file_open_fd(i8* %0) {
%2 = load i32, i32* @O_APPEND
%3 = load i32, i32* @O_WRONLY
%4 = or i32 %3, %2
%5 = load i32, i32* @O_CREAT
%6 = or i32 %4, %5
%7 = tail call i32 @fdevent_open_cloexec(i8* %0, i32 1, i32 %6, i32 420)
ret i32 %7
}
int mywait(pid)
int pid;
{
  int status;
  if (pid != -1) {
    while (wait(&status) != pid) {
      ;
    }
    if (status != 0) {
      if ((status & 0xff) == 0) {
        status = status >> 8;
      }
    }
  } else {
    status = -1;
  }
  return status;
}


x86 assembly (clang, -O0):
<mywait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
je     1171 <mywait+0x61>
jmp    112a <mywait+0x1a>
lea    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <wait@plt>
cmp    -0x4(%rbp),%eax
je     1143 <mywait+0x33>
jmp    112a <mywait+0x1a>
cmpl   $0x0,-0x8(%rbp)
je     116c <mywait+0x5c>
mov    -0x8(%rbp),%eax
and    $0xff,%eax
cmp    $0x0,%eax
jne    1167 <mywait+0x57>
mov    -0x8(%rbp),%eax
sar    $0x8,%eax
mov    %eax,-0x8(%rbp)
jmp    116c <mywait+0x5c>
jmp    1178 <mywait+0x68>
movl   $0xffffffff,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mywait>:
cmp    $0xffffffff,%edi
je     1149 <mywait+0x39>
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
lea    0x4(%rsp),%r14
mov    %r14,%rdi
xor    %eax,%eax
call   1030 <wait@plt>
cmp    %ebx,%eax
jne    1120 <mywait+0x10>
mov    0x4(%rsp),%ecx
mov    %ecx,%eax
sar    $0x8,%eax
test   %cl,%cl
cmovne %ecx,%eax
test   %ecx,%ecx
cmove  %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @mywait(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, -1
br i1 %5, label %6, label %24
6: ; preds = %1
br label %7
7: ; preds = %11, %6
%8 = call i32 (i32*, ...) bitcast (i32 (...)* @wait to i32 (i32*, ...)*)(i32* %3)
%9 = load i32, i32* %2
%10 = icmp ne i32 %8, %9
br i1 %10, label %11, label %12
11: ; preds = %7
br label %7
12: ; preds = %7
%13 = load i32, i32* %3
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %23
15: ; preds = %12
%16 = load i32, i32* %3
%17 = and i32 %16, 255
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %22
19: ; preds = %15
%20 = load i32, i32* %3
%21 = ashr i32 %20, 8
store i32 %21, i32* %3
br label %22
22: ; preds = %19, %15
br label %23
23: ; preds = %22, %12
br label %25
24: ; preds = %1
store i32 -1, i32* %3
br label %25
25: ; preds = %24, %23
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @mywait(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = icmp eq i32 %0, -1
br i1 %4, label %16, label %5
5: ; preds = %1, %5
%6 = call i32 (i32*, ...) bitcast (i32 (...)* @wait to i32 (i32*, ...)*)(i32* %2)
%7 = icmp eq i32 %6, %0
br i1 %7, label %8, label %5
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp ne i32 %9, 0
%11 = and i32 %9, 255
%12 = icmp eq i32 %11, 0
%13 = and i1 %10, %12
%14 = ashr i32 %9, 8
%15 = select i1 %13, i32 %14, i32 %9
br label %16
16: ; preds = %8, %1
%17 = phi i32 [ %15, %8 ], [ -1, %1 ]
ret i32 %17
}
double gsl_log1p(const double x) {
  volatile double y, z;
  y = 1 + x;
  z = y - 1;
  return log(y) - (z - x) / y;
}


x86 assembly (clang, -O0):
<gsl_log1p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xedb(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xec4(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <log@plt>
movsd  -0x18(%rbp),%xmm1
subsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm2
divsd  %xmm2,%xmm1
subsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gsl_log1p>:
sub    $0x18,%rsp
movsd  %xmm0,0x8(%rsp)
movsd  0xede(%rip),%xmm1
addsd  %xmm0,%xmm1
movsd  %xmm1,(%rsp)
movsd  (%rsp),%xmm0
addsd  0xed0(%rip),%xmm0
movsd  %xmm0,0x10(%rsp)
movsd  (%rsp),%xmm0
call   1030 <log@plt>
movsd  0x10(%rsp),%xmm1
subsd  0x8(%rsp),%xmm1
divsd  (%rsp),%xmm1
subsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @gsl_log1p(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %2
%5 = load double, double* %2
%6 = fadd double 1.000000e+00, %5
store volatile double %6, double* %3
%7 = load volatile double, double* %3
%8 = fsub double %7, 1.000000e+00
store volatile double %8, double* %4
%9 = load volatile double, double* %3
%10 = call double @log(double %9)
%11 = load volatile double, double* %4
%12 = load double, double* %2
%13 = fsub double %11, %12
%14 = load volatile double, double* %3
%15 = fdiv double %13, %14
%16 = fsub double %10, %15
ret double %16
}

LLVM IR (-O2):
define double @gsl_log1p(double %0) {
%2 = alloca double
%3 = alloca double
%4 = bitcast double* %2 to i8*
%5 = bitcast double* %3 to i8*
%6 = fadd double %0, 1.000000e+00
store volatile double %6, double* %2
%7 = load volatile double, double* %2
%8 = fadd double %7, -1.000000e+00
store volatile double %8, double* %3
%9 = load volatile double, double* %2
%10 = tail call double @log(double %9)
%11 = load volatile double, double* %3
%12 = fsub double %11, %0
%13 = load volatile double, double* %2
%14 = fdiv double %12, %13
%15 = fsub double %10, %14
ret double %15
}
int dwc3_otg_id_value(struct dwc3_otg *dwc_otg) { return 0; }


x86 assembly (clang, -O0):
<dwc3_otg_id_value>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dwc3_otg_id_value>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.dwc3_otg = type opaque
define i32 @dwc3_otg_id_value(%struct.dwc3_otg* %0) {
%2 = alloca %struct.dwc3_otg*
store %struct.dwc3_otg* %0, %struct.dwc3_otg** %2
ret i32 0
}

LLVM IR (-O2):
%struct.dwc3_otg = type opaque
define i32 @dwc3_otg_id_value(%struct.dwc3_otg* nocapture readnone %0) {
ret i32 0
}
int xmlUCSIsYiSyllables(int code) {
  return (((code >= 0xA000) && (code <= 0xA48F)));
}


x86 assembly (clang, -O0):
<xmlUCSIsYiSyllables>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0xa000,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1126 <xmlUCSIsYiSyllables+0x26>
cmpl   $0xa48f,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmlUCSIsYiSyllables>:
add    $0xffff6000,%edi
xor    %eax,%eax
cmp    $0x490,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @xmlUCSIsYiSyllables(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 40960
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 42127
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @xmlUCSIsYiSyllables(i32 %0) {
%2 = add i32 %0, -40960
%3 = icmp ult i32 %2, 1168
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int uint64_t;
struct timeval {
  int tv_sec;
  scalar_t__ tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
uint64_t getCurrentTime() {
  struct timeval now;
  gettimeofday(&now, NULL);
  uint64_t now64 = now.tv_sec;
  now64 *= 1000000;
  now64 += (now.tv_usec);
  return now64;
}


x86 assembly (clang, -O0):
<getCurrentTime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
mov    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
imul   $0xf4240,-0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rcx
movslq -0x14(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getCurrentTime>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
imul   $0xf4240,0x8(%rsp),%eax
add    0x10(%rsp),%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i64 }
define i32 @getCurrentTime() {
%1 = alloca %struct.timeval
%2 = alloca i32
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%5 = load i32, i32* %4
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = mul nsw i32 %6, 1000000
store i32 %7, i32* %2
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%9 = load i64, i64* %8
%10 = load i32, i32* %2
%11 = sext i32 %10 to i64
%12 = add nsw i64 %11, %9
%13 = trunc i64 %12 to i32
store i32 %13, i32* %2
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
%struct.timeval = type { i32, i64 }
define i32 @getCurrentTime() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load i32, i32* %4
%6 = mul nsw i32 %5, 1000000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%8 = load i64, i64* %7
%9 = trunc i64 %8 to i32
%10 = add i32 %6, %9
ret i32 %10
}
long test_long_4(long a, long b, long c, long d) { return a * b * c * d; }


x86 assembly (clang, -O0):
<test_long_4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
imul   -0x10(%rbp),%rax
imul   -0x18(%rbp),%rax
imul   -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_long_4>:
mov    %rdx,%rax
imul   %rsi,%rdi
imul   %rcx,%rax
imul   %rdi,%rax
ret

LLVM IR (-O0):
define i64 @test_long_4(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %5
%10 = load i64, i64* %6
%11 = mul nsw i64 %9, %10
%12 = load i64, i64* %7
%13 = mul nsw i64 %11, %12
%14 = load i64, i64* %8
%15 = mul nsw i64 %13, %14
ret i64 %15
}

LLVM IR (-O2):
define i64 @test_long_4(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = mul nsw i64 %1, %0
%6 = mul nsw i64 %5, %2
%7 = mul nsw i64 %6, %3
ret i64 %7
}
char *shift_args(int *argc, char ***argv) {
  char *shifted_arg = **argv;
  (*argc)--;
  (*argv)++;
  return shifted_arg;
}


x86 assembly (clang, -O0):
<shift_args>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
add    $0xffffffff,%ecx
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
add    $0x8,%rcx
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shift_args>:
mov    (%rsi),%rcx
mov    (%rcx),%rax
addl   $0xffffffff,(%rdi)
add    $0x8,%rcx
mov    %rcx,(%rsi)
ret

LLVM IR (-O0):
define i8* @shift_args(i32* %0, i8*** %1) {
%3 = alloca i32*
%4 = alloca i8***
%5 = alloca i8*
store i32* %0, i32** %3
store i8*** %1, i8**** %4
%6 = load i8***, i8**** %4
%7 = load i8**, i8*** %6
%8 = load i8*, i8** %7
store i8* %8, i8** %5
%9 = load i32*, i32** %3
%10 = load i32, i32* %9
%11 = add nsw i32 %10, -1
store i32 %11, i32* %9
%12 = load i8***, i8**** %4
%13 = load i8**, i8*** %12
%14 = getelementptr inbounds i8*, i8** %13, i32 1
store i8** %14, i8*** %12
%15 = load i8*, i8** %5
ret i8* %15
}

LLVM IR (-O2):
define i8* @shift_args(i32* nocapture %0, i8*** nocapture %1) {
%3 = load i8**, i8*** %1
%4 = load i8*, i8** %3
%5 = load i32, i32* %0
%6 = add nsw i32 %5, -1
store i32 %6, i32* %0
%7 = getelementptr inbounds i8*, i8** %3, i64 1
store i8** %7, i8*** %1
ret i8* %4
}
/* Type definitions */
typedef int /*<<< orphan*/ sem_t;
typedef int /*<<< orphan*/ s1;

/* Variables and functions */
int /*<<< orphan*/ memset(int /*<<< orphan*/ *, int, int);
int /*<<< orphan*/ sem_destroy(int /*<<< orphan*/ *);
int sem_init(int /*<<< orphan*/ *, int /*<<< orphan*/, int /*<<< orphan*/);
int sem_post(int /*<<< orphan*/ *);
int sem_wait(int /*<<< orphan*/ *);
int /*<<< orphan*/ start_watchdog();
int main(void) {
  int r;
  sem_t s1;
  start_watchdog();
  r = sem_init(&s1, 0, ~0);
  r = sem_init(&s1, 0, 0);
  memset(&s1, 0x55, sizeof(s1));
  r = sem_wait(&s1);
  r = sem_post(&s1);
  sem_destroy(&s1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <start_watchdog@plt>
lea    -0xc(%rbp),%rdi
xor    %esi,%esi
mov    $0xffffffff,%edx
call   1070 <sem_init@plt>
mov    %eax,-0x8(%rbp)
lea    -0xc(%rbp),%rdi
xor    %edx,%edx
mov    %edx,%esi
call   1070 <sem_init@plt>
mov    %eax,-0x8(%rbp)
lea    -0xc(%rbp),%rdi
mov    $0x55,%esi
mov    $0x4,%edx
call   1050 <memset@plt>
lea    -0xc(%rbp),%rdi
call   1040 <sem_wait@plt>
mov    %eax,-0x8(%rbp)
lea    -0xc(%rbp),%rdi
call   1060 <sem_post@plt>
mov    %eax,-0x8(%rbp)
lea    -0xc(%rbp),%rdi
call   1080 <sem_destroy@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
xor    %eax,%eax
call   1030 <start_watchdog@plt>
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
xor    %esi,%esi
mov    $0xffffffff,%edx
call   1070 <sem_init@plt>
mov    %rbx,%rdi
xor    %esi,%esi
xor    %edx,%edx
call   1070 <sem_init@plt>
mov    %rbx,%rdi
mov    $0x55,%esi
mov    $0x4,%edx
call   1050 <memset@plt>
mov    %rbx,%rdi
call   1040 <sem_wait@plt>
mov    %rbx,%rdi
call   1060 <sem_post@plt>
mov    %rbx,%rdi
call   1080 <sem_destroy@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @start_watchdog()
%5 = call i32 @sem_init(i32* %3, i32 0, i32 -1)
store i32 %5, i32* %2
%6 = call i32 @sem_init(i32* %3, i32 0, i32 0)
store i32 %6, i32* %2
%7 = call i32 @memset(i32* %3, i32 85, i32 4)
%8 = call i32 @sem_wait(i32* %3)
store i32 %8, i32* %2
%9 = call i32 @sem_post(i32* %3)
store i32 %9, i32* %2
%10 = call i32 @sem_destroy(i32* %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 (...) @start_watchdog()
%4 = call i32 @sem_init(i32* %1, i32 0, i32 -1)
%5 = call i32 @sem_init(i32* %1, i32 0, i32 0)
%6 = call i32 @memset(i32* %1, i32 85, i32 4)
%7 = call i32 @sem_wait(i32* %1)
%8 = call i32 @sem_post(i32* %1)
%9 = call i32 @sem_destroy(i32* %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "usage: daytimesrv [options]\n");
  fprintf(stderr, "  -h  show this message\n");
  fprintf(stderr, "  -p  port to listen on\n");
  exit(2);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2ea0(%rip),%rax
mov    (%rax),%edi
lea    0xed4(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e8b(%rip),%rax
mov    (%rax),%edi
lea    0xed8(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    0x2eb8(%rip),%rbx
mov    (%rbx),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xede(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xee9(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [29 x i8] c"usage: daytimesrv [options]\0A\00"
@.str.1 = [25 x i8] c" -h show this message\0A\00"
@.str.2 = [25 x i8] c" -p port to listen on\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i64 0, i64 0))
%5 = load i32, i32* @stderr
%6 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0))
%7 = call i32 @exit(i32 2)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [29 x i8] c"usage: daytimesrv [options]\0A\00"
@.str.1 = [25 x i8] c" -h show this message\0A\00"
@.str.2 = [25 x i8] c" -p port to listen on\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i64 0, i64 0))
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0))
%7 = tail call i32 @exit(i32 2)
unreachable
}
int adis16204_initialize_ring(struct iio_ring_buffer *ring) { return 0; }


x86 assembly (clang, -O0):
<adis16204_initialize_ring>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adis16204_initialize_ring>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.iio_ring_buffer = type opaque
define i32 @adis16204_initialize_ring(%struct.iio_ring_buffer* %0) {
%2 = alloca %struct.iio_ring_buffer*
store %struct.iio_ring_buffer* %0, %struct.iio_ring_buffer** %2
ret i32 0
}

LLVM IR (-O2):
%struct.iio_ring_buffer = type opaque
define i32 @adis16204_initialize_ring(%struct.iio_ring_buffer* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int f21(int *);
int f22(int *p) { return f21(p); }


x86 assembly (clang, -O0):
<f22>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f21@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f22>:
jmp    1030 <f21@plt>

LLVM IR (-O0):
define i32 @f22(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f21(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f22(i32* %0) {
%2 = tail call i32 @f21(i32* %0)
ret i32 %2
}