xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/ *);
void info_usage(FILE *fp) {
  fputs("usage: unrez info [<options>] <file>...\n", fp);
}


x86 assembly (clang, -O0):
<info_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <fputs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<info_usage>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
mov    $0x28,%esi
mov    $0x1,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@.str = [41 x i8] c"usage: unrez info [<options>] <file>...\0A\00"
define void @info_usage(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fputs(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32* %3)
ret void
}

LLVM IR (-O2):
@.str = [41 x i8] c"usage: unrez info [<options>] <file>...\0A\00"
define void @info_usage(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i64 40, i64 1, i32* %0)
ret void
}
int f_blg_mr1(float *a1, float a2) {
  return (__builtin_islessgreater(*a1, a2));
}


x86 assembly (clang, -O0):
<f_blg_mr1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
ucomiss -0xc(%rbp),%xmm0
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_blg_mr1>:
xor    %eax,%eax
ucomiss (%rdi),%xmm0
setne  %al
ret

LLVM IR (-O0):
define i32 @f_blg_mr1(float* %0, float %1) {
%3 = alloca float*
%4 = alloca float
store float* %0, float** %3
store float %1, float* %4
%5 = load float*, float** %3
%6 = load float, float* %5
%7 = load float, float* %4
%8 = fcmp one float %6, %7
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @f_blg_mr1(float* nocapture %0, float %1) {
%3 = load float, float* %0
%4 = fcmp one float %3, %1
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
void FanIntClear(unsigned long ulBase, unsigned long ulFlags) {
  DEBUG_ASSERT(ulBase == 0x40084000);
  (*((volatile unsigned long *)(ulBase + 0x0000009C))) = ulFlags;
}


x86 assembly (clang, -O0):
<FanIntClear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x40084000,-0x8(%rbp)
40
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x9c(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FanIntClear>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %edi,%edi
cmp    $0x40084000,%rbx
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
mov    %r14,0x9c(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @FanIntClear(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 1074282496
%7 = zext i1 %6 to i32
%8 = call i32 @DEBUG_ASSERT(i32 %7)
%9 = load i64, i64* %4
%10 = load i64, i64* %3
%11 = add i64 %10, 156
%12 = inttoptr i64 %11 to i64*
store volatile i64 %9, i64* %12
ret void
}

LLVM IR (-O2):
define void @FanIntClear(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, 1074282496
%4 = zext i1 %3 to i32
%5 = tail call i32 @DEBUG_ASSERT(i32 %4)
%6 = add i64 %0, 156
%7 = inttoptr i64 %6 to i64*
store volatile i64 %1, i64* %7
ret void
}
void FalseArray(int *ptr, int wordsqty) {
  int i;
  i = 1;
  while (i <= wordsqty) {
    *ptr = 0;
    ptr++;
    i++;
  }
}


x86 assembly (clang, -O0):
<FalseArray>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     1142 <FalseArray+0x42>
mov    -0x8(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x8(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1112 <FalseArray+0x12>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FalseArray>:
test   %esi,%esi
jle    1126 <FalseArray+0x16>
push   %rax
mov    %esi,%edx
shl    $0x2,%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @FalseArray(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 1, i32* %5
br label %6
6: ; preds = %10, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp sle i32 %7, %8
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i32*, i32** %3
store i32 0, i32* %11
%12 = load i32*, i32** %3
%13 = getelementptr inbounds i32, i32* %12, i32 1
store i32* %13, i32** %3
%14 = load i32, i32* %5
%15 = add nsw i32 %14, 1
store i32 %15, i32* %5
br label %6
16: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @FalseArray(i32* nocapture writeonly %0, i32 %1) {
%3 = icmp slt i32 %1, 1
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = bitcast i32* %0 to i8*
%6 = zext i32 %1 to i64
%7 = shl nuw nsw i64 %6, 2
br label %8
8: ; preds = %4, %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fputc(int, int /*<<< orphan*/ *);
int putc(int c, FILE *stream) { return (fputc(c, stream)); }


x86 assembly (clang, -O0):
<putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putc>:
jmp    1030 <fputc@plt>

LLVM IR (-O0):
define i32 @putc(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = call i32 @fputc(i32 %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @putc(i32 %0, i32* nocapture %1) {
%3 = tail call i32 @fputc(i32 %0, i32* %1)
ret i32 %3
}
int dprec(void) { return 0; }


x86 assembly (clang, -O0):
<dprec>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dprec>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dprec() {
ret i32 0
}

LLVM IR (-O2):
define i32 @dprec() {
ret i32 0
}
/* Variables and functions */
int readline_internal_charloop();
int /*<<< orphan*/ readline_internal_setup();
char *readline_internal_teardown(int);
char *readline_internal() {
  int eof;
  readline_internal_setup();
  eof = readline_internal_charloop();
  return (readline_internal_teardown(eof));
}


x86 assembly (clang, -O0):
<readline_internal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <readline_internal_setup@plt>
mov    $0x0,%al
call   1050 <readline_internal_charloop@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <readline_internal_teardown@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readline_internal>:
push   %rax
xor    %eax,%eax
call   1040 <readline_internal_setup@plt>
xor    %eax,%eax
call   1050 <readline_internal_charloop@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <readline_internal_teardown@plt>

LLVM IR (-O0):
define i8* @readline_internal() {
%1 = alloca i32
%2 = call i32 (...) @readline_internal_setup()
%3 = call i32 (...) @readline_internal_charloop()
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = call i8* @readline_internal_teardown(i32 %4)
ret i8* %5
}

LLVM IR (-O2):
define i8* @readline_internal() {
%1 = tail call i32 (...) @readline_internal_setup()
%2 = tail call i32 (...) @readline_internal_charloop()
%3 = tail call i8* @readline_internal_teardown(i32 %2)
ret i8* %3
}
/* Variables and functions */
int rand();
int getRandomNum() {
  int res = 1 + rand() % 12;
  return res;
}


x86 assembly (clang, -O0):
<getRandomNum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0xc,%ecx
cltd
idiv   %ecx
add    $0x1,%edx
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getRandomNum>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x2aaaaaab,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x21,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,2),%ecx
neg    %ecx
add    %ecx,%eax
add    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @getRandomNum() {
%1 = alloca i32
%2 = call i32 (...) @rand()
%3 = srem i32 %2, 12
%4 = add nsw i32 1, %3
store i32 %4, i32* %1
%5 = load i32, i32* %1
ret i32 %5
}

LLVM IR (-O2):
define i32 @getRandomNum() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 12
%3 = add nsw i32 %2, 1
ret i32 %3
}
/* Type definitions */
struct v4l2_audio {
  int dummy;
};
typedef int /*<<< orphan*/ a;

/* Variables and functions */
int main(void) {
  struct v4l2_audio a;
  (void)a;
  return sizeof(a);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
%struct.v4l2_audio = type { i32 }
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.v4l2_audio
store i32 0, i32* %1
ret i32 4
}

LLVM IR (-O2):
define i32 @main() {
ret i32 4
}
/* Variables and functions */
int /*<<< orphan*/ hoic_sw(int, int);
int hdoip_cli_vtb(int fd, int fdr, char **argv, int argc) {
  hoic_sw(fd, (0x31000005));
  return 0;
}


x86 assembly (clang, -O0):
<hdoip_cli_vtb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x31000005,%esi
call   1030 <hoic_sw@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdoip_cli_vtb>:
push   %rax
mov    $0x31000005,%esi
call   1030 <hoic_sw@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @hdoip_cli_vtb(i32 %0, i32 %1, i8** %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8**
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8** %2, i8*** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = call i32 @hoic_sw(i32 %9, i32 822083589)
ret i32 0
}

LLVM IR (-O2):
define i32 @hdoip_cli_vtb(i32 %0, i32 %1, i8** nocapture readnone %2, i32 %3) {
%5 = tail call i32 @hoic_sw(i32 %0, i32 822083589)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ my_put_char(char const);
int string_length(char const *);
void reverse_string(char const *str) {
  int t = string_length(str) - 1;
  if (str == NULL)
    return;
  while (t >= 0) {
    my_put_char(str[t]);
    t--;
  }
}


x86 assembly (clang, -O0):
<reverse_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <string_length@plt>
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    114b <reverse_string+0x2b>
jmp    1179 <reverse_string+0x59>
jmp    1150 <reverse_string+0x30>
cmpl   $0x0,-0xc(%rbp)
jl     1179 <reverse_string+0x59>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1040 <my_put_char@plt>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    1150 <reverse_string+0x30>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse_string>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <string_length@plt>
test   %r14,%r14
je     1157 <reverse_string+0x37>
test   %eax,%eax
jle    1157 <reverse_string+0x37>
mov    %eax,%ebx
add    $0x1,%rbx
nopl   0x0(%rax,%rax,1)
lea    -0x2(%rbx),%eax
movsbl (%r14,%rax,1),%edi
call   1040 <my_put_char@plt>
add    $0xffffffffffffffff,%rbx
cmp    $0x1,%rbx
ja     1140 <reverse_string+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @reverse_string(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @string_length(i8* %4)
%6 = sub nsw i32 %5, 1
store i32 %6, i32* %3
%7 = load i8*, i8** %2
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %10
9: ; preds = %1
br label %23
10: ; preds = %1
br label %11
11: ; preds = %14, %10
%12 = load i32, i32* %3
%13 = icmp sge i32 %12, 0
br i1 %13, label %14, label %23
14: ; preds = %11
%15 = load i8*, i8** %2
%16 = load i32, i32* %3
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
%20 = call i32 @my_put_char(i8 signext %19)
%21 = load i32, i32* %3
%22 = add nsw i32 %21, -1
store i32 %22, i32* %3
br label %11
23: ; preds = %9, %11
ret void
}

LLVM IR (-O2):
define void @reverse_string(i8* %0) {
%2 = tail call i32 @string_length(i8* %0)
%3 = icmp ne i8* %0, null
%4 = icmp sgt i32 %2, 0
%5 = select i1 %3, i1 %4, i1 false
br i1 %5, label %6, label %16
6: ; preds = %1
%7 = zext i32 %2 to i64
br label %8
8: ; preds = %6, %8
%9 = phi i64 [ %7, %6 ], [ %10, %8 ]
%10 = add nsw i64 %9, -1
%11 = and i64 %10, 4294967295
%12 = getelementptr inbounds i8, i8* %0, i64 %11
%13 = load i8, i8* %12
%14 = tail call i32 @my_put_char(i8 signext %13)
%15 = icmp ugt i64 %9, 1
br i1 %15, label %8, label %16
16: ; preds = %8, %1
ret void
}
void MUSIC_SetMidiChannelVolume(int channel, int volume) {}


x86 assembly (clang, -O0):
<MUSIC_SetMidiChannelVolume>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<MUSIC_SetMidiChannelVolume>:
ret

LLVM IR (-O0):
define void @MUSIC_SetMidiChannelVolume(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @MUSIC_SetMidiChannelVolume(i32 %0, i32 %1) {
ret void
}
int sum_all(int number) {
  int ret = 0;
  (number <= 0) || (ret = sum_all(number - 1));
  return number + ret;
}


x86 assembly (clang, -O0):
<sum_all>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    $0x1,%al
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x9(%rbp)
jle    1148 <sum_all+0x38>
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1030 <sum_all@plt>
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum_all>:
push   %rbx
mov    %edi,%ebx
test   %edi,%edi
jle    1121 <sum_all+0x11>
lea    -0x1(%rbx),%edi
call   1030 <sum_all@plt>
jmp    1123 <sum_all+0x13>
xor    %eax,%eax
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @sum_all(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = icmp sle i32 %4, 0
br i1 %5, label %11, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 1
%9 = call i32 @sum_all(i32 %8)
store i32 %9, i32* %3
%10 = icmp ne i32 %9, 0
br label %11
11: ; preds = %6, %1
%12 = phi i1 [ true, %1 ], [ %10, %6 ]
%13 = zext i1 %12 to i32
%14 = load i32, i32* %2
%15 = load i32, i32* %3
%16 = add nsw i32 %14, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @sum_all(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = add nsw i32 %0, -1
%5 = tail call i32 @sum_all(i32 %4)
br label %6
6: ; preds = %3, %1
%7 = phi i32 [ 0, %1 ], [ %5, %3 ]
%8 = add nsw i32 %7, %0
ret i32 %8
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void I2CSlaveIntDisable(uint32_t ui32Base) {
  ;
  (*((volatile unsigned long *)(ui32Base + 0x0000080C))) &= ~0x00000001;
}


x86 assembly (clang, -O0):
<I2CSlaveIntDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x80c(%rax),%rcx
and    $0xfffffffffffffffe,%rcx
mov    %rcx,0x80c(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CSlaveIntDisable>:
andq   $0xfffffffffffffffe,0x80c(%rdi)
fe
ret

LLVM IR (-O0):
define void @I2CSlaveIntDisable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 2060
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, -2
store volatile i64 %7, i64* %5
ret void
}

LLVM IR (-O2):
define void @I2CSlaveIntDisable(i64 %0) {
%2 = add nsw i64 %0, 2060
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = and i64 %4, -2
store volatile i64 %5, i64* %3
ret void
}
char *locv(longint)
long longint;
{
  static char locvbuf[12];
  sprintf(locvbuf, "%ld", longint);
  return locvbuf;
}


x86 assembly (clang, -O0):
<locv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0x2f02(%rip),%rdi
lea    0xed2(%rip),%rsi
mov    $0x0,%al
call   1030 <sprintf@plt>
lea    0x2eed(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<locv>:
push   %rbx
mov    %rdi,%rdx
lea    0x2f0e(%rip),%rbx
lea    0xede(%rip),%rsi
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <sprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@locv.locvbuf = internal global [12 x i8] zeroinitializer
@.str = [4 x i8] c"%ld\00"
define i8* @locv(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 (i8*, i8*, ...) @sprintf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @locv.locvbuf, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %3)
ret i8* getelementptr inbounds ([12 x i8], [12 x i8]* @locv.locvbuf, i64 0, i64 0)
}

LLVM IR (-O2):
@locv.locvbuf = internal global [12 x i8] zeroinitializer
@.str = [4 x i8] c"%ld\00"
define i8* @locv(i64 %0) {
%2 = tail call i32 (i8*, i8*, ...) @sprintf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @locv.locvbuf, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %0)
ret i8* getelementptr inbounds ([12 x i8], [12 x i8]* @locv.locvbuf, i64 0, i64 0)
}
void tree_sitter_javascript_external_scanner_deserialize(void *p, const char *b,
                                                         unsigned n) {}


x86 assembly (clang, -O0):
<tree_sitter_javascript_external_scanner_deserialize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tree_sitter_javascript_external_scanner_deserialize>:
ret

LLVM IR (-O0):
define void @tree_sitter_javascript_external_scanner_deserialize(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
define void @tree_sitter_javascript_external_scanner_deserialize(i8* nocapture %0, i8* nocapture %1, i32 %2) {
ret void
}
/* Variables and functions */
int __real__xlsmpSyncWorkShareItemL2(long, long, long, long);
int /*<<< orphan*/ idle_metric_blame_shift_idle();
int /*<<< orphan*/ idle_metric_blame_shift_work();
int __wrap__xlsmpSyncWorkShareItemL2(long x, long y, long z, long other) {
  int ret;
  ;
  idle_metric_blame_shift_idle();
  ret = __real__xlsmpSyncWorkShareItemL2(x, y, z, other);
  idle_metric_blame_shift_work();
  ;
  return ret;
}


x86 assembly (clang, -O0):
<__wrap__xlsmpSyncWorkShareItemL2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    $0x0,%al
call   1050 <idle_metric_blame_shift_idle@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1040 <__real__xlsmpSyncWorkShareItemL2@plt>
mov    %eax,-0x24(%rbp)
mov    $0x0,%al
call   1030 <idle_metric_blame_shift_work@plt>
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__wrap__xlsmpSyncWorkShareItemL2>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rcx,%r14
mov    %rdx,%r15
mov    %rsi,%r12
mov    %rdi,%rbx
xor    %eax,%eax
call   1050 <idle_metric_blame_shift_idle@plt>
mov    %rbx,%rdi
mov    %r12,%rsi
mov    %r15,%rdx
mov    %r14,%rcx
call   1040 <__real__xlsmpSyncWorkShareItemL2@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <idle_metric_blame_shift_work@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @__wrap__xlsmpSyncWorkShareItemL2(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i32
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%10 = call i32 (...) @idle_metric_blame_shift_idle()
%11 = load i64, i64* %5
%12 = load i64, i64* %6
%13 = load i64, i64* %7
%14 = load i64, i64* %8
%15 = call i32 @__real__xlsmpSyncWorkShareItemL2(i64 %11, i64 %12, i64 %13, i64 %14)
store i32 %15, i32* %9
%16 = call i32 (...) @idle_metric_blame_shift_work()
%17 = load i32, i32* %9
ret i32 %17
}

LLVM IR (-O2):
define i32 @__wrap__xlsmpSyncWorkShareItemL2(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = tail call i32 (...) @idle_metric_blame_shift_idle()
%6 = tail call i32 @__real__xlsmpSyncWorkShareItemL2(i64 %0, i64 %1, i64 %2, i64 %3)
%7 = tail call i32 (...) @idle_metric_blame_shift_work()
ret i32 %6
}
void isa_write8(unsigned short port, unsigned char val) {
  *(char *)((void *)(0xfe000000 | (port))) = val;
}


x86 assembly (clang, -O0):
<isa_write8>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%cl
movzwl -0x2(%rbp),%eax
or     $0xfe000000,%eax
mov    %eax,%eax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<isa_write8>:
mov    %edi,%eax
mov    $0xfe000000,%ecx
mov    %sil,(%rax,%rcx,1)
ret

LLVM IR (-O0):
define void @isa_write8(i16 zeroext %0, i8 zeroext %1) {
%3 = alloca i16
%4 = alloca i8
store i16 %0, i16* %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i16, i16* %3
%7 = zext i16 %6 to i32
%8 = or i32 -33554432, %7
%9 = zext i32 %8 to i64
%10 = inttoptr i64 %9 to i8*
store i8 %5, i8* %10
ret void
}

LLVM IR (-O2):
define void @isa_write8(i16 zeroext %0, i8 zeroext %1) {
%3 = zext i16 %0 to i64
%4 = or i64 %3, 4261412864
%5 = inttoptr i64 %4 to i8*
store i8 %1, i8* %5
ret void
}
char foo(char c) { return c; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @foo(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
ret i8 %3
}

LLVM IR (-O2):
define signext i8 @foo(i8 returned signext %0) {
ret i8 %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void clrScr(void) { printf("\x01B[2J\x01B[H"); }


x86 assembly (clang, -O0):
<clrScr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clrScr>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"\1B[2J\1B[H\00"
define void @clrScr() {
%1 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"\1B[2J\1B[H\00"
define void @clrScr() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int /*<<< orphan*/ normal_life_ok(int /*<<< orphan*/ *);
int normal_ok2() {
  pthread_mutex_t m;
  normal_life_ok(&m);
}


x86 assembly (clang, -O0):
<normal_ok2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
call   1030 <normal_life_ok@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<normal_ok2>:
push   %rax
lea    0x4(%rsp),%rdi
call   1030 <normal_life_ok@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @normal_ok2() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 @normal_life_ok(i32* %2)
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @normal_ok2() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @normal_life_ok(i32* %1)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
main() { printf("Enjoy C programming!\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"Enjoy C programming!\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [21 x i8] c"Enjoy C programming!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
double exp(double);
__attribute__((__weak__, __always___)) double softboundcets_exp(double x) {
  return exp(x);
}


x86 assembly (clang, -O0):
<softboundcets_exp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <exp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundcets_exp>:
jmp    1030 <exp@plt>

LLVM IR (-O0):
define weak double @softboundcets_exp(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @exp(double %3)
ret double %4
}

LLVM IR (-O2):
define weak double @softboundcets_exp(double %0) {
%2 = tail call double @exp(double %0)
ret double %2
}
void test_skip(void) {}


x86 assembly (clang, -O0):
<test_skip>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_skip>:
ret

LLVM IR (-O0):
define void @test_skip() {
ret void
}

LLVM IR (-O2):
define void @test_skip() {
ret void
}
void getgpos_(x, y, z, w) float *x, *y, *z, *w;
{ getgpos(x, y, z, w); }


x86 assembly (clang, -O0):
<getgpos_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x0,%al
call   1030 <getgpos@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getgpos_>:
xor    %eax,%eax
jmp    1030 <getgpos@plt>

LLVM IR (-O0):
define void @getgpos_(float* %0, float* %1, float* %2, float* %3) {
%5 = alloca float*
%6 = alloca float*
%7 = alloca float*
%8 = alloca float*
store float* %0, float** %5
store float* %1, float** %6
store float* %2, float** %7
store float* %3, float** %8
%9 = load float*, float** %5
%10 = load float*, float** %6
%11 = load float*, float** %7
%12 = load float*, float** %8
%13 = call i32 (float*, float*, float*, float*, ...) bitcast (i32 (...)* @getgpos to i32 (float*, float*, float*, float*, ...)*)(float* %9, float* %10, float* %11, float* %12)
ret void
}

LLVM IR (-O2):
define void @getgpos_(float* %0, float* %1, float* %2, float* %3) {
%5 = tail call i32 (float*, float*, float*, float*, ...) bitcast (i32 (...)* @getgpos to i32 (float*, float*, float*, float*, ...)*)(float* %0, float* %1, float* %2, float* %3)
ret void
}
int Cyc_JumpAnalysis_hash_ptr(void *s) { return (int)s; }


x86 assembly (clang, -O0):
<Cyc_JumpAnalysis_hash_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_JumpAnalysis_hash_ptr>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i32 @Cyc_JumpAnalysis_hash_ptr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @Cyc_JumpAnalysis_hash_ptr(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i32
ret i32 %3
}
int comp(const void *a, const void *b) { return (*(int *)a) - (*(int *)b); }


x86 assembly (clang, -O0):
<comp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<comp>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @comp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @comp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int32_t ev3_ultrasonic_sensor_listen(int32_t port) { return 0; }


x86 assembly (clang, -O0):
<ev3_ultrasonic_sensor_listen>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ev3_ultrasonic_sensor_listen>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ev3_ultrasonic_sensor_listen(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @ev3_ultrasonic_sensor_listen(i32 %0) {
ret i32 0
}
/* Variables and functions */
int random();
int rand_r(unsigned int *seedp) { return random(); }


x86 assembly (clang, -O0):
<rand_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <random@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_r>:
xor    %eax,%eax
jmp    1030 <random@plt>

LLVM IR (-O0):
define i32 @rand_r(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = call i32 (...) @random()
ret i32 %3
}

LLVM IR (-O2):
define i32 @rand_r(i32* nocapture readnone %0) {
%2 = tail call i32 (...) @random()
ret i32 %2
}
/* Type definitions */
struct ulz {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void ulz_flush(struct ulz *u) { fflush(stdout); }


x86 assembly (clang, -O0):
<ulz_flush>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
call   1030 <fflush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ulz_flush>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
jmp    1030 <fflush@plt>

LLVM IR (-O0):
%struct.ulz = type { i32 }
@stdout = global i32 0
define void @ulz_flush(%struct.ulz* %0) {
%2 = alloca %struct.ulz*
store %struct.ulz* %0, %struct.ulz** %2
%3 = load i32, i32* @stdout
%4 = call i32 @fflush(i32 %3)
ret void
}

LLVM IR (-O2):
%struct.ulz = type { i32 }
@stdout = global i32 0
define void @ulz_flush(%struct.ulz* nocapture readnone %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @fflush(i32 %2)
ret void
}
void gtk_tree_store_set_valist() {}


x86 assembly (clang, -O0):
<gtk_tree_store_set_valist>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_store_set_valist>:
ret

LLVM IR (-O0):
define void @gtk_tree_store_set_valist() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_store_set_valist() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double, double, double);
void ASRT_PrintFailDouble(double expected, double actual, double delta) {
  printf("\n  Expected: %f, Actual: %f, Delta: %f", expected, actual, delta);
}


x86 assembly (clang, -O0):
<ASRT_PrintFailDouble>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASRT_PrintFailDouble>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [39 x i8] c"\0A Expected: %f, Actual: %f, Delta: %f\00"
define void @ASRT_PrintFailDouble(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = load double, double* %6
%10 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), double %7, double %8, double %9)
ret void
}

LLVM IR (-O2):
@.str = [39 x i8] c"\0A Expected: %f, Actual: %f, Delta: %f\00"
define void @ASRT_PrintFailDouble(double %0, double %1, double %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), double %0, double %1, double %2)
ret void
}
long InterlockedCompareExchange(volatile long *const Destination,
                                const long Exchange, const long Comperand) {
  return __sync_val_compare_and_swap(Destination, Comperand, Exchange);
}


x86 assembly (clang, -O0):
<InterlockedCompareExchange>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rdx
lock cmpxchg %rdx,(%rcx)
sete   %cl
pop    %rbp
ret

x86 assembly (clang, -O2):
<InterlockedCompareExchange>:
mov    %rdx,%rax
lock cmpxchg %rsi,(%rdi)
ret

LLVM IR (-O0):
define i64 @InterlockedCompareExchange(i64* %0, i64 %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64*, i64** %4
%8 = load i64, i64* %6
%9 = load i64, i64* %5
%10 = cmpxchg i64* %7, i64 %8, i64 %9 seq_cst seq_cst
%11 = extractvalue { i64, i1 } %10, 0
ret i64 %11
}

LLVM IR (-O2):
define i64 @InterlockedCompareExchange(i64* nocapture %0, i64 %1, i64 %2) {
%4 = cmpxchg i64* %0, i64 %2, i64 %1 seq_cst seq_cst
%5 = extractvalue { i64, i1 } %4, 0
ret i64 %5
}
void rt_init_robin(void) { ; }


x86 assembly (clang, -O0):
<rt_init_robin>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rt_init_robin>:
ret

LLVM IR (-O0):
define void @rt_init_robin() {
ret void
}

LLVM IR (-O2):
define void @rt_init_robin() {
ret void
}
/* Variables and functions */
char *malloc(int);
int rand();
char *realloc(char *, int);
int /*<<< orphan*/ strcpy(char *, char *);
char *fn56() {
  char *result;
  result = malloc(20 + rand() % 20);
  result = realloc(result, 30 + rand() % 20);
  strcpy((char *)result, "fn56");
  return result;
}


x86 assembly (clang, -O0):
<fn56>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1060 <rand@plt>
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    %edx,%edi
add    $0x14,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1060 <rand@plt>
mov    -0x10(%rbp),%rdi
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    %edx,%esi
add    $0x1e,%esi
call   1050 <realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xe67(%rip),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn56>:
push   %rbx
xor    %eax,%eax
call   1060 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%edi
add    $0x14,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1060 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%esi
add    $0x1e,%esi
mov    %rbx,%rdi
call   1050 <realloc@plt>
mov    %rax,%rbx
lea    0xe4f(%rip),%rsi
mov    %rax,%rdi
call   1030 <strcpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"fn56\00"
define i8* @fn56() {
%1 = alloca i8*
%2 = call i32 (...) @rand()
%3 = srem i32 %2, 20
%4 = add nsw i32 20, %3
%5 = call i8* @malloc(i32 %4)
store i8* %5, i8** %1
%6 = load i8*, i8** %1
%7 = call i32 (...) @rand()
%8 = srem i32 %7, 20
%9 = add nsw i32 30, %8
%10 = call i8* @realloc(i8* %6, i32 %9)
store i8* %10, i8** %1
%11 = load i8*, i8** %1
%12 = call i32 @strcpy(i8* %11, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%13 = load i8*, i8** %1
ret i8* %13
}

LLVM IR (-O2):
@.str = [5 x i8] c"fn56\00"
define i8* @fn56() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 20
%3 = add nsw i32 %2, 20
%4 = tail call i8* @malloc(i32 %3)
%5 = tail call i32 (...) @rand()
%6 = srem i32 %5, 20
%7 = add nsw i32 %6, 30
%8 = tail call i8* @realloc(i8* %4, i32 %7)
%9 = tail call i32 @strcpy(i8* %8, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i8* %8
}
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_eval(int);
void testPromotionOnlyTypes(int a, char b) {
  if (a == b) {
    clang_analyzer_eval(
        a <= (char)((unsigned char)(~0U) & ((unsigned char)(~0U) >> 1)));
  }
}


x86 assembly (clang, -O0):
<testPromotionOnlyTypes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%eax
movsbl -0x5(%rbp),%ecx
cmp    %ecx,%eax
jne    1141 <testPromotionOnlyTypes+0x31>
cmpl   $0x7f,-0x4(%rbp)
setle  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <clang_analyzer_eval@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testPromotionOnlyTypes>:
cmp    %edi,%esi
jne    111e <testPromotionOnlyTypes+0xe>
mov    $0x1,%edi
jmp    1030 <clang_analyzer_eval@plt>
ret

LLVM IR (-O0):
define void @testPromotionOnlyTypes(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
%5 = load i32, i32* %3
%6 = load i8, i8* %4
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %5, %7
br i1 %8, label %9, label %14
9: ; preds = %2
%10 = load i32, i32* %3
%11 = icmp sle i32 %10, 127
%12 = zext i1 %11 to i32
%13 = call i32 @clang_analyzer_eval(i32 %12)
br label %14
14: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
define void @testPromotionOnlyTypes(i32 %0, i8 signext %1) {
%3 = sext i8 %1 to i32
%4 = icmp eq i32 %3, %0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @clang_analyzer_eval(i32 1)
br label %7
7: ; preds = %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ nrf_drv_radio802154_swi_notify_busy_channel();
void nrf_drv_radio802154_notify_busy_channel(void) {
  nrf_drv_radio802154_swi_notify_busy_channel();
}


x86 assembly (clang, -O0):
<nrf_drv_radio802154_notify_busy_channel>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <nrf_drv_radio802154_swi_notify_busy_channel@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf_drv_radio802154_notify_busy_channel>:
xor    %eax,%eax
jmp    1030 <nrf_drv_radio802154_swi_notify_busy_channel@plt>

LLVM IR (-O0):
define void @nrf_drv_radio802154_notify_busy_channel() {
%1 = call i32 (...) @nrf_drv_radio802154_swi_notify_busy_channel()
ret void
}

LLVM IR (-O2):
define void @nrf_drv_radio802154_notify_busy_channel() {
%1 = tail call i32 (...) @nrf_drv_radio802154_swi_notify_busy_channel()
ret void
}
/* Variables and functions */
void *f(double);
void test_f(int iv, float fv, double dv) {
  int *ip = f(iv);
  float *fp = f(fv);
  double *dp = f(dv);
}


x86 assembly (clang, -O0):
<test_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
call   1030 <f@plt>
mov    %rax,-0x18(%rbp)
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
call   1030 <f@plt>
mov    %rax,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <f@plt>
mov    %rax,-0x28(%rbp)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_f>:
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
movss  %xmm0,0xc(%rsp)
xorps  %xmm0,%xmm0
cvtsi2sd %edi,%xmm0
call   1030 <f@plt>
movss  0xc(%rsp),%xmm0
cvtss2sd %xmm0,%xmm0
call   1030 <f@plt>
movsd  0x10(%rsp),%xmm0
add    $0x18,%rsp
jmp    1030 <f@plt>

LLVM IR (-O0):
define void @test_f(i32 %0, float %1, double %2) {
%4 = alloca i32
%5 = alloca float
%6 = alloca double
%7 = alloca i32*
%8 = alloca float*
%9 = alloca double*
store i32 %0, i32* %4
store float %1, float* %5
store double %2, double* %6
%10 = load i32, i32* %4
%11 = sitofp i32 %10 to double
%12 = call i8* @f(double %11)
%13 = bitcast i8* %12 to i32*
store i32* %13, i32** %7
%14 = load float, float* %5
%15 = fpext float %14 to double
%16 = call i8* @f(double %15)
%17 = bitcast i8* %16 to float*
store float* %17, float** %8
%18 = load double, double* %6
%19 = call i8* @f(double %18)
%20 = bitcast i8* %19 to double*
store double* %20, double** %9
ret void
}

LLVM IR (-O2):
define void @test_f(i32 %0, float %1, double %2) {
%4 = sitofp i32 %0 to double
%5 = tail call i8* @f(double %4)
%6 = fpext float %1 to double
%7 = tail call i8* @f(double %6)
%8 = tail call i8* @f(double %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("!!!Hello World!!!");
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"!!!Hello World!!!\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@.str = [18 x i8] c"!!!Hello World!!!\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i32 1
}
int f_lt_cr1(float a1) { return (((100) < (a1))); }


x86 assembly (clang, -O0):
<f_lt_cr1>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xeea(%rip),%xmm1
ucomiss %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_lt_cr1>:
xor    %eax,%eax
ucomiss 0xef7(%rip),%xmm0
seta   %al
ret

LLVM IR (-O0):
define i32 @f_lt_cr1(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp olt float 1.000000e+02, %3
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @f_lt_cr1(float %0) {
%2 = fcmp ogt float %0, 1.000000e+02
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_cond_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int /*<<< orphan*/ *);
int /*<<< orphan*/ abort();
int /*<<< orphan*/ log_error(int, char *);
int pthread_cond_signal(int /*<<< orphan*/ *);
int conditionSignal(pthread_cond_t *cond) {
  ASSERT(cond);
  int retval;
  retval = pthread_cond_signal(cond);
  if (retval != 0) {
    log_error(retval, "Error pthread_cond_signal()");
    abort();
  }
  return retval;
}


x86 assembly (clang, -O0):
<conditionSignal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1060 <ASSERT@plt>
mov    -0x8(%rbp),%rdi
call   1050 <pthread_cond_signal@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1181 <conditionSignal+0x41>
mov    -0xc(%rbp),%edi
lea    0xe8b(%rip),%rsi
call   1040 <log_error@plt>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<conditionSignal>:
push   %rbx
mov    %rdi,%rbx
call   1060 <ASSERT@plt>
mov    %rbx,%rdi
call   1050 <pthread_cond_signal@plt>
test   %eax,%eax
jne    1159 <conditionSignal+0x19>
xor    %eax,%eax
pop    %rbx
ret
lea    0xea0(%rip),%rsi
mov    %eax,%edi
call   1040 <log_error@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"Error pthread_cond_signal()\00"
define i32 @conditionSignal(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @ASSERT(i32* %4)
%6 = load i32*, i32** %2
%7 = call i32 @pthread_cond_signal(i32* %6)
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %1
%11 = load i32, i32* %3
%12 = call i32 @log_error(i32 %11, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
%13 = call i32 (...) @abort()
unreachable
14: ; preds = %1
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
@.str = [28 x i8] c"Error pthread_cond_signal()\00"
define i32 @conditionSignal(i32* %0) {
%2 = tail call i32 @ASSERT(i32* %0)
%3 = tail call i32 @pthread_cond_signal(i32* %0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = tail call i32 @log_error(i32 %3, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 (...) @abort()
unreachable
8: ; preds = %1
ret i32 0
}
int caones(unsigned int x) { return __builtin_popcount(x); }


x86 assembly (clang, -O0):
<caones>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    %ecx,%eax
shr    %eax
and    $0x55555555,%eax
sub    %eax,%ecx
mov    %ecx,%eax
and    $0x33333333,%eax
shr    $0x2,%ecx
and    $0x33333333,%ecx
add    %ecx,%eax
mov    %eax,%ecx
shr    $0x4,%ecx
add    %ecx,%eax
and    $0xf0f0f0f,%eax
imul   $0x1010101,%eax,%eax
shr    $0x18,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<caones>:
mov    %edi,%eax
shr    %eax
and    $0x55555555,%eax
sub    %eax,%edi
mov    %edi,%eax
and    $0x33333333,%eax
shr    $0x2,%edi
and    $0x33333333,%edi
add    %eax,%edi
mov    %edi,%eax
shr    $0x4,%eax
add    %edi,%eax
and    $0xf0f0f0f,%eax
imul   $0x1010101,%eax,%eax
shr    $0x18,%eax
ret

LLVM IR (-O0):
define i32 @caones(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @llvm.ctpop.i32(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @caones(i32 %0) {
%2 = tail call i32 @llvm.ctpop.i32(i32 %0)
ret i32 %2
}
int decompressor_impl_buffer_copy_nominally_needpage(
    struct microfs_sb_info *sbi, void *data) {
  (void)sbi;
  (void)data;
  return 0;
}


x86 assembly (clang, -O0):
<decompressor_impl_buffer_copy_nominally_needpage>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<decompressor_impl_buffer_copy_nominally_needpage>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.microfs_sb_info = type opaque
define i32 @decompressor_impl_buffer_copy_nominally_needpage(%struct.microfs_sb_info* %0, i8* %1) {
%3 = alloca %struct.microfs_sb_info*
%4 = alloca i8*
store %struct.microfs_sb_info* %0, %struct.microfs_sb_info** %3
store i8* %1, i8** %4
%5 = load %struct.microfs_sb_info*, %struct.microfs_sb_info** %3
%6 = load i8*, i8** %4
ret i32 0
}

LLVM IR (-O2):
%struct.microfs_sb_info = type opaque
define i32 @decompressor_impl_buffer_copy_nominally_needpage(%struct.microfs_sb_info* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 0
}
void INT_Excep_SSI0_SSIRXI0(void) {}


x86 assembly (clang, -O0):
<INT_Excep_SSI0_SSIRXI0>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_SSI0_SSIRXI0>:
ret

LLVM IR (-O0):
define void @INT_Excep_SSI0_SSIRXI0() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_SSI0_SSIRXI0() {
ret void
}