int VIC_setup_irq(int intnum, void *IRQHandler) {
  int vector;
  for (vector = 0; vector < 32; vector++) {
    if (((((&(*((volatile unsigned long *)0xFFFFF200))))[vector]) & 0x20) == 0)
      break;
    if (((((&(*((volatile unsigned long *)0xFFFFF200))))[vector]) & 0x1f) ==
        (unsigned int)intnum)
      break;
  }
  if (vector >= 16)
    return -1;
  (*((volatile unsigned long *)0xFFFFF00C)) &= ~(1 << intnum);
  (&((*((volatile unsigned long *)0xFFFFF100))))[vector] =
      (unsigned int)IRQHandler;
  ((&(*((volatile unsigned long *)0xFFFFF200))))[vector] = 0x20 | intnum;
  (*((volatile unsigned long *)0xFFFFF010)) |= 1 << intnum;
  return vector;
}


x86 assembly (clang, -O0):
<VIC_setup_irq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x20,-0x14(%rbp)
jge    1171 <VIC_setup_irq+0x71>
movslq -0x14(%rbp),%rcx
mov    $0xfffff200,%eax
mov    (%rax,%rcx,8),%rax
and    $0x20,%rax
cmp    $0x0,%rax
jne    113c <VIC_setup_irq+0x3c>
jmp    1171 <VIC_setup_irq+0x71>
movslq -0x14(%rbp),%rcx
mov    $0xfffff200,%eax
mov    (%rax,%rcx,8),%rax
and    $0x1f,%rax
mov    -0x8(%rbp),%ecx
cmp    %rcx,%rax
jne    115e <VIC_setup_irq+0x5e>
jmp    1171 <VIC_setup_irq+0x71>
jmp    1163 <VIC_setup_irq+0x63>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1112 <VIC_setup_irq+0x12>
cmpl   $0x10,-0x14(%rbp)
jl     1187 <VIC_setup_irq+0x87>
movl   $0xffffffff,-0x4(%rbp)
jmp    11f9 <VIC_setup_irq+0xf9>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
cltq
mov    $0xfffff00c,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0xfffff00c,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
mov    %eax,%eax
mov    %eax,%edx
movslq -0x14(%rbp),%rcx
mov    $0xfffff100,%eax
mov    %rdx,(%rax,%rcx,8)
mov    -0x8(%rbp),%eax
or     $0x20,%eax
movslq %eax,%rdx
movslq -0x14(%rbp),%rcx
mov    $0xfffff200,%eax
mov    %rdx,(%rax,%rcx,8)
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    $0xfffff010,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0xfffff010,%eax
mov    %rcx,(%rax)
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<VIC_setup_irq>:
mov    $0xfffff00c,%r8d
mov    %edi,%eax
xor    %edx,%edx
nopw   0x0(%rax,%rax,1)
testq  $0x20,0x1f4(%r8,%rdx,8)
je     1166 <VIC_setup_irq+0x66>
mov    0x1f4(%r8,%rdx,8),%rcx
and    $0x1f,%ecx
cmp    %rax,%rcx
je     1166 <VIC_setup_irq+0x66>
testq  $0x20,0x1fc(%r8,%rdx,8)
je     115c <VIC_setup_irq+0x5c>
mov    0x1fc(%r8,%rdx,8),%rcx
and    $0x1f,%ecx
cmp    %rax,%rcx
je     1162 <VIC_setup_irq+0x62>
add    $0x2,%rdx
cmp    $0x20,%rdx
jne    1110 <VIC_setup_irq+0x10>
mov    $0xffffffff,%eax
ret
add    $0x1,%rdx
jmp    1166 <VIC_setup_irq+0x66>
or     $0x1,%rdx
mov    $0xffffffff,%eax
cmp    $0xf,%edx
ja     11aa <VIC_setup_irq+0xaa>
mov    $0x1,%r9d
mov    %edi,%ecx
shl    %cl,%r9d
mov    $0xfffffffe,%eax
rol    %cl,%eax
cltq
and    %rax,(%r8)
mov    %esi,%eax
mov    %edx,%ecx
mov    %rax,0xf4(%r8,%rcx,8)
or     $0x20,%edi
movslq %edi,%rax
mov    %rax,0x1f4(%r8,%rcx,8)
movslq %r9d,%rax
or     %rax,0x4(%r8)
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @VIC_setup_irq(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 0, i32* %6
br label %7
7: ; preds = %29, %2
%8 = load i32, i32* %6
%9 = icmp slt i32 %8, 32
br i1 %9, label %10, label %32
10: ; preds = %7
%11 = load i32, i32* %6
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i64, i64* inttoptr (i64 4294963712 to i64*), i64 %12
%14 = load volatile i64, i64* %13
%15 = and i64 %14, 32
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %10
br label %32
18: ; preds = %10
%19 = load i32, i32* %6
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i64, i64* inttoptr (i64 4294963712 to i64*), i64 %20
%22 = load volatile i64, i64* %21
%23 = and i64 %22, 31
%24 = load i32, i32* %4
%25 = zext i32 %24 to i64
%26 = icmp eq i64 %23, %25
br i1 %26, label %27, label %28
27: ; preds = %18
br label %32
28: ; preds = %18
br label %29
29: ; preds = %28
%30 = load i32, i32* %6
%31 = add nsw i32 %30, 1
store i32 %31, i32* %6
br label %7
32: ; preds = %27, %17, %7
%33 = load i32, i32* %6
%34 = icmp sge i32 %33, 16
br i1 %34, label %35, label %36
35: ; preds = %32
store i32 -1, i32* %3
br label %61
36: ; preds = %32
%37 = load i32, i32* %4
%38 = shl i32 1, %37
%39 = xor i32 %38, -1
%40 = sext i32 %39 to i64
%41 = load volatile i64, i64* inttoptr (i64 4294963212 to i64*)
%42 = and i64 %41, %40
store volatile i64 %42, i64* inttoptr (i64 4294963212 to i64*)
%43 = load i8*, i8** %5
%44 = ptrtoint i8* %43 to i32
%45 = zext i32 %44 to i64
%46 = load i32, i32* %6
%47 = sext i32 %46 to i64
%48 = getelementptr inbounds i64, i64* inttoptr (i64 4294963456 to i64*), i64 %47
store volatile i64 %45, i64* %48
%49 = load i32, i32* %4
%50 = or i32 32, %49
%51 = sext i32 %50 to i64
%52 = load i32, i32* %6
%53 = sext i32 %52 to i64
%54 = getelementptr inbounds i64, i64* inttoptr (i64 4294963712 to i64*), i64 %53
store volatile i64 %51, i64* %54
%55 = load i32, i32* %4
%56 = shl i32 1, %55
%57 = sext i32 %56 to i64
%58 = load volatile i64, i64* inttoptr (i64 4294963216 to i64*)
%59 = or i64 %58, %57
store volatile i64 %59, i64* inttoptr (i64 4294963216 to i64*)
%60 = load i32, i32* %6
store i32 %60, i32* %3
br label %61
61: ; preds = %36, %35
%62 = load i32, i32* %3
ret i32 %62
}

LLVM IR (-O2):
define i32 @VIC_setup_irq(i32 %0, i8* %1) {
%3 = zext i32 %0 to i64
br label %4
4: ; preds = %24, %2
%5 = phi i64 [ 0, %2 ], [ %25, %24 ]
%6 = getelementptr inbounds i64, i64* inttoptr (i64 4294963712 to i64*), i64 %5
%7 = load volatile i64, i64* %6
%8 = and i64 %7, 32
%9 = icmp eq i64 %8, 0
br i1 %9, label %27, label %10
10: ; preds = %4
%11 = load volatile i64, i64* %6
%12 = and i64 %11, 31
%13 = icmp eq i64 %12, %3
br i1 %13, label %27, label %14
14: ; preds = %10
%15 = or i64 %5, 1
%16 = getelementptr inbounds i64, i64* inttoptr (i64 4294963712 to i64*), i64 %15
%17 = load volatile i64, i64* %16
%18 = and i64 %17, 32
%19 = icmp eq i64 %18, 0
br i1 %19, label %27, label %20
20: ; preds = %14
%21 = load volatile i64, i64* %16
%22 = and i64 %21, 31
%23 = icmp eq i64 %22, %3
br i1 %23, label %27, label %24
24: ; preds = %20
%25 = add nuw nsw i64 %5, 2
%26 = icmp eq i64 %25, 32
br i1 %26, label %47, label %4
27: ; preds = %20, %14, %10, %4
%28 = phi i64 [ %5, %10 ], [ %5, %4 ], [ %15, %14 ], [ %15, %20 ]
%29 = trunc i64 %28 to i32
%30 = icmp ugt i32 %29, 15
br i1 %30, label %47, label %31
31: ; preds = %27
%32 = shl nuw i32 1, %0
%33 = xor i32 %32, -1
%34 = sext i32 %33 to i64
%35 = load volatile i64, i64* inttoptr (i64 4294963212 to i64*)
%36 = and i64 %35, %34
store volatile i64 %36, i64* inttoptr (i64 4294963212 to i64*)
%37 = ptrtoint i8* %1 to i64
%38 = and i64 %37, 4294967295
%39 = and i64 %28, 4294967295
%40 = getelementptr inbounds i64, i64* inttoptr (i64 4294963456 to i64*), i64 %39
store volatile i64 %38, i64* %40
%41 = or i32 %0, 32
%42 = sext i32 %41 to i64
%43 = getelementptr inbounds i64, i64* inttoptr (i64 4294963712 to i64*), i64 %39
store volatile i64 %42, i64* %43
%44 = sext i32 %32 to i64
%45 = load volatile i64, i64* inttoptr (i64 4294963216 to i64*)
%46 = or i64 %45, %44
store volatile i64 %46, i64* inttoptr (i64 4294963216 to i64*)
br label %47
47: ; preds = %24, %27, %31
%48 = phi i32 [ %29, %31 ], [ -1, %27 ], [ -1, %24 ]
ret i32 %48
}