xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ autovars(int, int);
int /*<<< orphan*/ foo();
int /*<<< orphan*/ init0();
int /*<<< orphan*/ localscopes(int /*<<< orphan*/);
main() {
  init0();
  foo();
  autovars(5, 6);
  localscopes(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1060 <init0@plt>
mov    $0x0,%al
call   1050 <foo@plt>
mov    $0x5,%edi
mov    $0x6,%esi
call   1030 <autovars@plt>
xor    %edi,%edi
call   1040 <localscopes@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <init0@plt>
xor    %eax,%eax
call   1050 <foo@plt>
mov    $0x5,%edi
mov    $0x6,%esi
call   1030 <autovars@plt>
xor    %edi,%edi
call   1040 <localscopes@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @init0()
%2 = call i32 (...) @foo()
%3 = call i32 @autovars(i32 5, i32 6)
%4 = call i32 @localscopes(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @init0()
%2 = tail call i32 (...) @foo()
%3 = tail call i32 @autovars(i32 5, i32 6)
%4 = tail call i32 @localscopes(i32 0)
ret i32 0
}
/* Variables and functions */
int alloc_pagecache(int, int);
int alloc_pagecache_50M(const char *cgroup, void *arg) {
  int fd = (long)arg;
  return alloc_pagecache(fd, (50 << 20));
}


x86 assembly (clang, -O0):
<alloc_pagecache_50M>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    $0x3200000,%esi
call   1030 <alloc_pagecache@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_pagecache_50M>:
mov    %rsi,%rdi
mov    $0x3200000,%esi
jmp    1030 <alloc_pagecache@plt>

LLVM IR (-O0):
define i32 @alloc_pagecache_50M(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = ptrtoint i8* %6 to i64
%8 = trunc i64 %7 to i32
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = call i32 @alloc_pagecache(i32 %9, i32 52428800)
ret i32 %10
}

LLVM IR (-O2):
define i32 @alloc_pagecache_50M(i8* nocapture readnone %0, i8* %1) {
%3 = ptrtoint i8* %1 to i64
%4 = trunc i64 %3 to i32
%5 = tail call i32 @alloc_pagecache(i32 %4, i32 52428800)
ret i32 %5
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t rotateR_fun_int32_t(int32_t x, int32_t i) {
  if ((i %= 32) == 0)
    return x;
  return (x << (32 - i)) | ((0x7fffffff >> (i - 1)) & (x >> i));
}


x86 assembly (clang, -O0):
<rotateR_fun_int32_t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    %edx,-0xc(%rbp)
cmp    $0x0,%edx
jne    112c <rotateR_fun_int32_t+0x2c>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115b <rotateR_fun_int32_t+0x5b>
mov    -0x8(%rbp),%eax
mov    $0x20,%ecx
sub    -0xc(%rbp),%ecx
shl    %cl,%eax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x7fffffff,%edx
sar    %cl,%edx
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
sar    %cl,%edx
mov    -0x10(%rbp),%ecx
and    %edx,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotateR_fun_int32_t>:
mov    %edi,%eax
lea    0x1f(%rsi),%ecx
test   %esi,%esi
cmovns %esi,%ecx
and    $0xffffffe0,%ecx
sub    %ecx,%esi
je     112b <rotateR_fun_int32_t+0x2b>
mov    %esi,%ecx
neg    %cl
mov    %eax,%edx
shl    %cl,%edx
lea    -0x1(%rsi),%ecx
mov    $0x7fffffff,%edi
shr    %cl,%edi
mov    %esi,%ecx
sar    %cl,%eax
and    %edi,%eax
or     %edx,%eax
ret

LLVM IR (-O0):
define i32 @rotateR_fun_int32_t(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = srem i32 %6, 32
store i32 %7, i32* %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %24
11: ; preds = %2
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = sub nsw i32 32, %13
%15 = shl i32 %12, %14
%16 = load i32, i32* %5
%17 = sub nsw i32 %16, 1
%18 = ashr i32 2147483647, %17
%19 = load i32, i32* %4
%20 = load i32, i32* %5
%21 = ashr i32 %19, %20
%22 = and i32 %18, %21
%23 = or i32 %15, %22
store i32 %23, i32* %3
br label %24
24: ; preds = %11, %9
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @rotateR_fun_int32_t(i32 %0, i32 %1) {
%3 = srem i32 %1, 32
%4 = icmp eq i32 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2
%6 = sub nsw i32 32, %3
%7 = shl i32 %0, %6
%8 = add nsw i32 %3, -1
%9 = lshr i32 2147483647, %8
%10 = ashr i32 %0, %3
%11 = and i32 %9, %10
%12 = or i32 %11, %7
br label %13
13: ; preds = %2, %5
%14 = phi i32 [ %12, %5 ], [ %0, %2 ]
ret i32 %14
}
void *parallel_sum(void *ptr) {
  int i, j;
  int *p = (int *)ptr;
  for (i = 0; i < 10000; i++) {
    for (j = 0; j < 10000; j++) {
      *p += j;
    }
  }
}


x86 assembly (clang, -O0):
<parallel_sum>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x2710,-0x14(%rbp)
jge    1164 <parallel_sum+0x64>
movl   $0x0,-0x18(%rbp)
cmpl   $0x2710,-0x18(%rbp)
jge    1151 <parallel_sum+0x51>
mov    -0x18(%rbp),%ecx
mov    -0x20(%rbp),%rax
add    (%rax),%ecx
mov    %ecx,(%rax)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    112b <parallel_sum+0x2b>
jmp    1156 <parallel_sum+0x56>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1117 <parallel_sum+0x17>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parallel_sum>:
addl   $0x67579780,(%rdi)
ret

LLVM IR (-O0):
define i8* @parallel_sum(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i8* %0, i8** %3
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %6
store i32 0, i32* %4
br label %9
9: ; preds = %25, %1
%10 = load i32, i32* %4
%11 = icmp slt i32 %10, 10000
br i1 %11, label %12, label %28
12: ; preds = %9
store i32 0, i32* %5
br label %13
13: ; preds = %21, %12
%14 = load i32, i32* %5
%15 = icmp slt i32 %14, 10000
br i1 %15, label %16, label %24
16: ; preds = %13
%17 = load i32, i32* %5
%18 = load i32*, i32** %6
%19 = load i32, i32* %18
%20 = add nsw i32 %19, %17
store i32 %20, i32* %18
br label %21
21: ; preds = %16
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %13
24: ; preds = %13
br label %25
25: ; preds = %24
%26 = load i32, i32* %4
%27 = add nsw i32 %26, 1
store i32 %27, i32* %4
br label %9
28: ; preds = %9
%29 = load i8*, i8** %2
ret i8* %29
}

LLVM IR (-O2):
define noalias i8* @parallel_sum(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = add i32 %3, 1733793664
store i32 %4, i32* %2
ret i8* undef
}
/* Variables and functions */
bool isWhite(int k) {
  return k == '\n' || k == '\t' || k == '\r' || k == ' ' || k == '\v';
}


x86 assembly (clang, -O0):
<isWhite>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0xa,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     114d <isWhite+0x4d>
mov    $0x1,%al
cmpl   $0x9,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     114d <isWhite+0x4d>
mov    $0x1,%al
cmpl   $0xd,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     114d <isWhite+0x4d>
mov    $0x1,%al
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     114d <isWhite+0x4d>
cmpl   $0xb,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isWhite>:
cmp    $0x20,%edi
ja     111d <isWhite+0x1d>
mov    $0x1,%eax
mov    %edi,%ecx
movabs $0x100002600,%rdx
bt     %rcx,%rdx
jae    111d <isWhite+0x1d>
ret
xor    %eax,%eax
cmp    $0xb,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @isWhite(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 10
br i1 %4, label %17, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 9
br i1 %7, label %17, label %8
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 13
br i1 %10, label %17, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 32
br i1 %13, label %17, label %14
14: ; preds = %11
%15 = load i32, i32* %2
%16 = icmp eq i32 %15, 11
br label %17
17: ; preds = %14, %11, %8, %5, %1
%18 = phi i1 [ true, %11 ], [ true, %8 ], [ true, %5 ], [ true, %1 ], [ %16, %14 ]
%19 = zext i1 %18 to i32
ret i32 %19
}

LLVM IR (-O2):
define i32 @isWhite(i32 %0) {
switch i32 %0, label %2 [
i32 32, label %5
i32 13, label %5
i32 10, label %5
i32 9, label %5
]
2: ; preds = %1
%3 = icmp eq i32 %0, 11
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
int errno;
int *errno_location(void) { return &errno; }


x86 assembly (clang, -O0):
<errno_location>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<errno_location>:
mov    0x2ed9(%rip),%rax
ret

LLVM IR (-O0):
@errno = global i32 0
define i32* @errno_location() {
ret i32* @errno
}

LLVM IR (-O2):
@errno = global i32 0
define i32* @errno_location() {
ret i32* @errno
}
/* Variables and functions */
int const AbsInt(int const);
int ClampInt(const int x, const int min, const int max) {
  return min + ((AbsInt(x - min) - AbsInt(x - max) + max - min) >> 1);
}


x86 assembly (clang, -O0):
<ClampInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
sub    -0x8(%rbp),%edi
call   1030 <AbsInt@plt>
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
sub    -0xc(%rbp),%edi
call   1030 <AbsInt@plt>
mov    -0x14(%rbp),%ecx
mov    %eax,%edx
mov    -0x10(%rbp),%eax
sub    %edx,%ecx
add    -0xc(%rbp),%ecx
sub    -0x8(%rbp),%ecx
sar    $0x1,%ecx
add    %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ClampInt>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %esi,%r15d
mov    %edi,%ebx
sub    %esi,%edi
call   1030 <AbsInt@plt>
mov    %eax,%ebp
sub    %r14d,%ebx
mov    %ebx,%edi
call   1030 <AbsInt@plt>
add    %r14d,%ebp
add    %r15d,%eax
sub    %eax,%ebp
sar    %ebp
add    %r15d,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @ClampInt(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = sub nsw i32 %8, %9
%11 = call i32 @AbsInt(i32 %10)
%12 = load i32, i32* %4
%13 = load i32, i32* %6
%14 = sub nsw i32 %12, %13
%15 = call i32 @AbsInt(i32 %14)
%16 = sub nsw i32 %11, %15
%17 = load i32, i32* %6
%18 = add nsw i32 %16, %17
%19 = load i32, i32* %5
%20 = sub nsw i32 %18, %19
%21 = ashr i32 %20, 1
%22 = add nsw i32 %7, %21
ret i32 %22
}

LLVM IR (-O2):
define i32 @ClampInt(i32 %0, i32 %1, i32 %2) {
%4 = sub nsw i32 %0, %1
%5 = tail call i32 @AbsInt(i32 %4)
%6 = sub nsw i32 %0, %2
%7 = tail call i32 @AbsInt(i32 %6)
%8 = add i32 %5, %2
%9 = add i32 %7, %1
%10 = sub i32 %8, %9
%11 = ashr i32 %10, 1
%12 = add nsw i32 %11, %1
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ scalDiv(float *, float);
float sqrt(float);
void norm(float vec[3]) {
  float c = sqrt(vec[0] * vec[0] + vec[1] * vec[1] + vec[2] * vec[2]);
  scalDiv(vec, c);
}


x86 assembly (clang, -O0):
<norm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm1
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    -0x8(%rbp),%rax
mulss  0x4(%rax),%xmm0
mulss  %xmm2,%xmm1
addss  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
call   1040 <sqrt@plt>
movss  %xmm0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
movss  -0xc(%rbp),%xmm0
call   1030 <scalDiv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<norm>:
push   %rbx
mov    %rdi,%rbx
movss  (%rdi),%xmm1
movss  0x4(%rdi),%xmm0
mulss  %xmm0,%xmm0
mulss  %xmm1,%xmm1
addss  %xmm0,%xmm1
movss  0x8(%rdi),%xmm0
mulss  %xmm0,%xmm0
addss  %xmm1,%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     1154 <norm+0x34>
sqrtss %xmm0,%xmm0
jmp    1159 <norm+0x39>
call   1040 <sqrt@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <scalDiv@plt>

LLVM IR (-O0):
define void @norm(float* %0) {
%2 = alloca float*
%3 = alloca float
store float* %0, float** %2
%4 = load float*, float** %2
%5 = getelementptr inbounds float, float* %4, i64 0
%6 = load float, float* %5
%7 = load float*, float** %2
%8 = getelementptr inbounds float, float* %7, i64 0
%9 = load float, float* %8
%10 = load float*, float** %2
%11 = getelementptr inbounds float, float* %10, i64 1
%12 = load float, float* %11
%13 = load float*, float** %2
%14 = getelementptr inbounds float, float* %13, i64 1
%15 = load float, float* %14
%16 = fmul float %12, %15
%17 = call float @llvm.fmuladd.f32(float %6, float %9, float %16)
%18 = load float*, float** %2
%19 = getelementptr inbounds float, float* %18, i64 2
%20 = load float, float* %19
%21 = load float*, float** %2
%22 = getelementptr inbounds float, float* %21, i64 2
%23 = load float, float* %22
%24 = call float @llvm.fmuladd.f32(float %20, float %23, float %17)
%25 = call float @sqrt(float %24)
store float %25, float* %3
%26 = load float*, float** %2
%27 = load float, float* %3
%28 = call i32 @scalDiv(float* %26, float %27)
ret void
}

LLVM IR (-O2):
define void @norm(float* %0) {
%2 = load float, float* %0
%3 = getelementptr inbounds float, float* %0, i64 1
%4 = load float, float* %3
%5 = fmul float %4, %4
%6 = tail call float @llvm.fmuladd.f32(float %2, float %2, float %5)
%7 = getelementptr inbounds float, float* %0, i64 2
%8 = load float, float* %7
%9 = tail call float @llvm.fmuladd.f32(float %8, float %8, float %6)
%10 = tail call float @sqrt(float %9)
%11 = tail call i32 @scalDiv(float* %0, float %10)
ret void
}
/* Type definitions */
typedef unsigned int uint64_t;

/* Variables and functions */
__attribute__((always_)) uint64_t bitw_ror_64(const uint64_t bit_sequence,
                                              const unsigned int shift) {
  return (bit_sequence >> shift) | (bit_sequence << (64 - shift));
}


x86 assembly (clang, -O0):
<bitw_ror_64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
mov    -0x4(%rbp),%edx
mov    $0x40,%ecx
sub    -0x8(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitw_ror_64>:
mov    %esi,%ecx
mov    %edi,%eax
shr    %cl,%eax
neg    %cl
shl    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @bitw_ror_64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = lshr i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sub i32 64, %9
%11 = shl i32 %8, %10
%12 = or i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @bitw_ror_64(i32 %0, i32 %1) {
%3 = lshr i32 %0, %1
%4 = sub i32 64, %1
%5 = shl i32 %0, %4
%6 = or i32 %5, %3
ret i32 %6
}
/* Variables and functions */
void __nv_sincosf(float, float *, float *);
void sincosf(float __a, float *__sptr, float *__cptr) {
  return __nv_sincosf(__a, __sptr, __cptr);
}


x86 assembly (clang, -O0):
<sincosf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movss  -0x4(%rbp),%xmm0
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <__nv_sincosf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sincosf>:
jmp    1030 <__nv_sincosf@plt>

LLVM IR (-O0):
define void @sincosf(float %0, float* %1, float* %2) {
%4 = alloca float
%5 = alloca float*
%6 = alloca float*
store float %0, float* %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float, float* %4
%8 = load float*, float** %5
%9 = load float*, float** %6
ret void
}

LLVM IR (-O2):
define void @sincosf(float %0, float* %1, float* %2) {
tail call void @__nv_sincosf(float %0, float* %1, float* %2)
ret void
}
/* Variables and functions */
size_t greater_pow2(size_t total_size) {
  int bits = 0;
  size_t div2 = total_size;
  size_t value;
  for (; div2 > 1; div2 >>= 1)
    bits++;
  value = (1 << bits);
  if (value == total_size)
    return value;
  else
    return (value << 1);
}


x86 assembly (clang, -O0):
<greater_pow2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
cmpq   $0x1,-0x20(%rbp)
jbe    113c <greater_pow2+0x3c>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x20(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1117 <greater_pow2+0x17>
mov    -0x14(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
cmp    -0x10(%rbp),%rax
jne    1167 <greater_pow2+0x67>
mov    -0x28(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1173 <greater_pow2+0x73>
mov    -0x28(%rbp),%rax
shl    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<greater_pow2>:
xor    %ecx,%ecx
cmp    $0x2,%rdi
jb     111f <greater_pow2+0x1f>
xor    %ecx,%ecx
mov    %rdi,%rax
mov    %rdi,%rdx
add    $0x1,%ecx
shr    %rdx
cmp    $0x3,%rax
mov    %rdx,%rax
ja     1110 <greater_pow2+0x10>
mov    $0x1,%eax
shl    %cl,%eax
cltq
cmp    %rdi,%rax
setne  %cl
shl    %cl,%rax
ret

LLVM IR (-O0):
define i64 @greater_pow2(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %3
store i32 0, i32* %4
%7 = load i64, i64* %3
store i64 %7, i64* %5
br label %8
8: ; preds = %14, %1
%9 = load i64, i64* %5
%10 = icmp ugt i64 %9, 1
br i1 %10, label %11, label %17
11: ; preds = %8
%12 = load i32, i32* %4
%13 = add nsw i32 %12, 1
store i32 %13, i32* %4
br label %14
14: ; preds = %11
%15 = load i64, i64* %5
%16 = lshr i64 %15, 1
store i64 %16, i64* %5
br label %8
17: ; preds = %8
%18 = load i32, i32* %4
%19 = shl i32 1, %18
%20 = sext i32 %19 to i64
store i64 %20, i64* %6
%21 = load i64, i64* %6
%22 = load i64, i64* %3
%23 = icmp eq i64 %21, %22
br i1 %23, label %24, label %26
24: ; preds = %17
%25 = load i64, i64* %6
store i64 %25, i64* %2
br label %29
26: ; preds = %17
%27 = load i64, i64* %6
%28 = shl i64 %27, 1
store i64 %28, i64* %2
br label %29
29: ; preds = %26, %24
%30 = load i64, i64* %2
ret i64 %30
}

LLVM IR (-O2):
define i64 @greater_pow2(i64 %0) {
%2 = icmp ugt i64 %0, 1
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i64 [ %7, %3 ], [ %0, %1 ]
%5 = phi i32 [ %6, %3 ], [ 0, %1 ]
%6 = add nuw nsw i32 %5, 1
%7 = lshr i64 %4, 1
%8 = icmp ugt i64 %4, 3
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %6, %3 ]
%11 = shl nuw i32 1, %10
%12 = sext i32 %11 to i64
%13 = icmp ne i64 %12, %0
%14 = zext i1 %13 to i64
%15 = shl nsw i64 %12, %14
ret i64 %15
}
void SuiteSparse_finish(void) { ; }


x86 assembly (clang, -O0):
<SuiteSparse_finish>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SuiteSparse_finish>:
ret

LLVM IR (-O0):
define void @SuiteSparse_finish() {
ret void
}

LLVM IR (-O2):
define void @SuiteSparse_finish() {
ret void
}
int __attribute__((no, noclone)) get_input(void) { return 0; }


x86 assembly (clang, -O0):
<get_input>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_input>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_input() {
ret i32 0
}

LLVM IR (-O2):
define i32 @get_input() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ Elf64_Rel;

/* Variables and functions */
int fn_is_fake_mcount64(Elf64_Rel const *rp) { return 0; }


x86 assembly (clang, -O0):
<fn_is_fake_mcount64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_is_fake_mcount64>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fn_is_fake_mcount64(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @fn_is_fake_mcount64(i32* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
char *_trim_right(char *, char *);
size_t strlen(char *);
char *trim_right(char *str) {
  if (!str)
    return NULL;
  size_t len = strlen(str);
  if (!len)
    return str;
  return _trim_right(str + len - 1, str);
}


x86 assembly (clang, -O0):
<trim_right>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1144 <trim_right+0x24>
movq   $0x0,-0x8(%rbp)
jmp    1182 <trim_right+0x62>
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1169 <trim_right+0x49>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1182 <trim_right+0x62>
mov    -0x10(%rbp),%rdi
add    -0x18(%rbp),%rdi
add    $0xffffffffffffffff,%rdi
mov    -0x10(%rbp),%rsi
call   1040 <_trim_right@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trim_right>:
push   %rbx
test   %rdi,%rdi
je     1144 <trim_right+0x24>
mov    %rdi,%rbx
call   1030 <strlen@plt>
test   %rax,%rax
je     1146 <trim_right+0x26>
lea    (%rbx,%rax,1),%rdi
add    $0xffffffffffffffff,%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <_trim_right@plt>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @trim_right(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %8, label %7
7: ; preds = %1
store i8* null, i8** %2
br label %22
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i64 @strlen(i8* %9)
store i64 %10, i64* %4
%11 = load i64, i64* %4
%12 = icmp ne i64 %11, 0
br i1 %12, label %15, label %13
13: ; preds = %8
%14 = load i8*, i8** %3
store i8* %14, i8** %2
br label %22
15: ; preds = %8
%16 = load i8*, i8** %3
%17 = load i64, i64* %4
%18 = getelementptr inbounds i8, i8* %16, i64 %17
%19 = getelementptr inbounds i8, i8* %18, i64 -1
%20 = load i8*, i8** %3
%21 = call i8* @_trim_right(i8* %19, i8* %20)
store i8* %21, i8** %2
br label %22
22: ; preds = %15, %13, %7
%23 = load i8*, i8** %2
ret i8* %23
}

LLVM IR (-O2):
define i8* @trim_right(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = tail call i64 @strlen(i8* %0)
%5 = icmp eq i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %3
%7 = getelementptr inbounds i8, i8* %0, i64 %4
%8 = getelementptr inbounds i8, i8* %7, i64 -1
%9 = tail call i8* @_trim_right(i8* %8, i8* %0)
br label %10
10: ; preds = %6, %3, %1
%11 = phi i8* [ null, %1 ], [ %9, %6 ], [ %0, %3 ]
ret i8* %11
}
void ux500_ci_dbg_console(void) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @ux500_ci_dbg_console() {
ret void
}

LLVM IR (-O2):
define void @ux500_ci_dbg_console() {
ret void
}
/* Type definitions */
struct stat {
  long st_size;
};

/* Variables and functions */
scalar_t__ stat(char *, struct stat *);
long file_size(char *file_name) {
  struct stat st;
  if (stat(file_name, &st) == 0)
    return st.st_size;
  return 0;
}


x86 assembly (clang, -O0):
<file_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <stat@plt>
cmp    $0x0,%rax
jne    1140 <file_size+0x30>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1148 <file_size+0x38>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_size>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
test   %rax,%rax
jne    1124 <file_size+0x14>
mov    (%rsp),%rax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i64 }
define i64 @file_size(i8* %0) {
%2 = alloca i64
%3 = alloca i8*
%4 = alloca %struct.stat
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @stat(i8* %5, %struct.stat* %4)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%10 = load i64, i64* %9
store i64 %10, i64* %2
br label %12
11: ; preds = %1
store i64 0, i64* %2
br label %12
12: ; preds = %11, %8
%13 = load i64, i64* %2
ret i64 %13
}

LLVM IR (-O2):
%struct.stat = type { i64 }
define i64 @file_size(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i64 %4, 0
%6 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%7 = load i64, i64* %6
%8 = select i1 %5, i64 %7, i64 0
ret i64 %8
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void boxFree(void *box) { free(box); }


x86 assembly (clang, -O0):
<boxFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<boxFree>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @boxFree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @boxFree(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int machdep_sys_waitsys(int /*<<< orphan*/, int *, int, int *);
machdep_sys_wait3(int *b, int c, int *d) {
  return (machdep_sys_waitsys(0, b, c, d));
}


x86 assembly (clang, -O0):
<machdep_sys_wait3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
xor    %edi,%edi
call   1030 <machdep_sys_waitsys@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<machdep_sys_wait3>:
mov    %rdx,%rcx
mov    %esi,%edx
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <machdep_sys_waitsys@plt>

LLVM IR (-O0):
define i32 @machdep_sys_wait3(i32* %0, i32 %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32*
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = load i32*, i32** %6
%10 = call i32 @machdep_sys_waitsys(i32 0, i32* %7, i32 %8, i32* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @machdep_sys_wait3(i32* %0, i32 %1, i32* %2) {
%4 = tail call i32 @machdep_sys_waitsys(i32 0, i32* %0, i32 %1, i32* %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ memory_Free(char *, scalar_t__);
scalar_t__ strlen(char *);
void string_StringFree(char *String) {
  memory_Free(String, strlen(String) + 1);
}


x86 assembly (clang, -O0):
<string_StringFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x10(%rbp),%rdi
mov    %rax,%rsi
add    $0x1,%rsi
call   1030 <memory_Free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_StringFree>:
push   %rbx
mov    %rdi,%rbx
call   1040 <strlen@plt>
lea    0x1(%rax),%rsi
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <memory_Free@plt>

LLVM IR (-O0):
define void @string_StringFree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i32 @memory_Free(i8* %3, i64 %6)
ret void
}

LLVM IR (-O2):
define void @string_StringFree(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i32 @memory_Free(i8* %0, i64 %3)
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
void f() {
  int *z;
  z = (int *)malloc(4);
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0x4,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define void @f() {
%1 = alloca i32*
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32* %3, i32** %1
ret void
}

LLVM IR (-O2):
define void @f() {
%1 = tail call i64 @malloc(i32 4)
ret void
}
/* Variables and functions */
double pow(double, double);
double double_pow(double base, double power) { return pow(base, power); }


x86 assembly (clang, -O0):
<double_pow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <pow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<double_pow>:
jmp    1030 <pow@plt>

LLVM IR (-O0):
define double @double_pow(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @pow(double %5, double %6)
ret double %7
}

LLVM IR (-O2):
define double @double_pow(double %0, double %1) {
%3 = tail call double @pow(double %0, double %1)
ret double %3
}
short int cast_int_short(int x) { return (short int)x; }


x86 assembly (clang, -O0):
<cast_int_short>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<cast_int_short>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i16 @cast_int_short(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i16
ret i16 %4
}

LLVM IR (-O2):
define signext i16 @cast_int_short(i32 %0) {
%2 = trunc i32 %0 to i16
ret i16 %2
}
void Act_Frig(void) { ; }


x86 assembly (clang, -O0):
<Act_Frig>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Act_Frig>:
ret

LLVM IR (-O0):
define void @Act_Frig() {
ret void
}

LLVM IR (-O2):
define void @Act_Frig() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ e_and();
int /*<<< orphan*/ e_imm();
void e_and_imm() {
  e_imm();
  e_and();
}


x86 assembly (clang, -O0):
<e_and_imm>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <e_imm@plt>
mov    $0x0,%al
call   1030 <e_and@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_and_imm>:
push   %rax
xor    %eax,%eax
call   1040 <e_imm@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <e_and@plt>

LLVM IR (-O0):
define void @e_and_imm() {
%1 = call i32 (...) @e_imm()
%2 = call i32 (...) @e_and()
ret void
}

LLVM IR (-O2):
define void @e_and_imm() {
%1 = tail call i32 (...) @e_imm()
%2 = tail call i32 (...) @e_and()
ret void
}
void gtk_icon_view_set_pixbuf_column() {}


x86 assembly (clang, -O0):
<gtk_icon_view_set_pixbuf_column>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_icon_view_set_pixbuf_column>:
ret

LLVM IR (-O0):
define void @gtk_icon_view_set_pixbuf_column() {
ret void
}

LLVM IR (-O2):
define void @gtk_icon_view_set_pixbuf_column() {
ret void
}
int update(unsigned char *app, unsigned char *username,
           unsigned char *password) {}


x86 assembly (clang, -O0):
<update>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<update>:
ret

LLVM IR (-O0):
define i32 @update(i8* %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
%8 = load i32, i32* %4
ret i32 %8
}

LLVM IR (-O2):
define i32 @update(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
ret i32 undef
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
int compare_u32(const void *v1, const void *v2) {
  uint32_t a = *(uint32_t *)v1;
  uint32_t b = *(uint32_t *)v2;
  if (a < b) {
    return -1;
  } else if (b < a) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<compare_u32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x28(%rbp),%rax
jge    113c <compare_u32+0x3c>
movl   $0xffffffff,-0x4(%rbp)
jmp    115d <compare_u32+0x5d>
mov    -0x28(%rbp),%rax
cmp    -0x20(%rbp),%rax
jge    1156 <compare_u32+0x56>
movl   $0x1,-0x4(%rbp)
jmp    115d <compare_u32+0x5d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_u32>:
mov    (%rdi),%rax
mov    (%rsi),%rcx
xor    %edx,%edx
cmp    %rax,%rcx
setl   %dl
mov    $0xffffffff,%eax
cmovle %edx,%eax
ret

LLVM IR (-O0):
define i32 @compare_u32(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i64*
%10 = load i64, i64* %9
store i64 %10, i64* %6
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to i64*
%13 = load i64, i64* %12
store i64 %13, i64* %7
%14 = load i64, i64* %6
%15 = load i64, i64* %7
%16 = icmp slt i64 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 -1, i32* %3
br label %24
18: ; preds = %2
%19 = load i64, i64* %7
%20 = load i64, i64* %6
%21 = icmp slt i64 %19, %20
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 1, i32* %3
br label %24
23: ; preds = %18
store i32 0, i32* %3
br label %24
24: ; preds = %23, %22, %17
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @compare_u32(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = load i64, i64* %3
%5 = bitcast i8* %1 to i64*
%6 = load i64, i64* %5
%7 = icmp slt i64 %4, %6
%8 = icmp slt i64 %6, %4
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ Test();
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Program started.\n");
  Test();
  printf("Program ends.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <Test@plt>
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <Test@plt>
lea    0xed6(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"Program started.\0A\00"
@.str.1 = [15 x i8] c"Program ends.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @Test()
%4 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [17 x i8] c"Program started.\00"
@str.2 = [14 x i8] c"Program ends.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @Test()
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
long lon_deg_to_mm(double x) { return (long)(x * 6356752.3142 * 0.017453292); }


x86 assembly (clang, -O0):
<lon_deg_to_mm>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xee2(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lon_deg_to_mm>:
mulsd  0xef8(%rip),%xmm0
mulsd  0xef8(%rip),%xmm0
cvttsd2si %xmm0,%rax
ret

LLVM IR (-O0):
define i64 @lon_deg_to_mm(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 0x41583FC4141BDA51
%5 = fmul double %4, 0x3F91DF469963E11D
%6 = fptosi double %5 to i64
ret i64 %6
}

LLVM IR (-O2):
define i64 @lon_deg_to_mm(double %0) {
%2 = fmul double %0, 0x41583FC4141BDA51
%3 = fmul double %2, 0x3F91DF469963E11D
%4 = fptosi double %3 to i64
ret i64 %4
}
/* Type definitions */
struct timeval {
  double tv_sec;
  int tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
double seconds() {
  struct timeval tv;
  gettimeofday(&tv, NULL);
  return tv.tv_sec + tv.tv_usec * 1e-6;
}


x86 assembly (clang, -O0):
<seconds>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
movsd  -0x10(%rbp),%xmm1
cvtsi2sdl -0x8(%rbp),%xmm0
movsd  0xec9(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<seconds>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
cvtsi2sdl 0x10(%rsp),%xmm0
mulsd  0xed2(%rip),%xmm0
addsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { double, i32 }
define double @seconds() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load double, double* %3
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%6 = load i32, i32* %5
%7 = sitofp i32 %6 to double
%8 = call double @llvm.fmuladd.f64(double %7, double 0x3EB0C6F7A0B5ED8D, double %4)
ret double %8
}

LLVM IR (-O2):
%struct.timeval = type { double, i32 }
define double @seconds() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load double, double* %4
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%7 = load i32, i32* %6
%8 = sitofp i32 %7 to double
%9 = tail call double @llvm.fmuladd.f64(double %8, double 0x3EB0C6F7A0B5ED8D, double %5)
ret double %9
}
int test_imm_DFint64_lowword_reg(long long val) {
  return ((val) & (0xDF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DFint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xdf,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DFint64_lowword_reg>:
test   $0xdf,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DFint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 223
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_DFint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 223
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct peEventLoop {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void fun_peBeforesleepProc(struct peEventLoop *el) {
  ((void)el);
  printf("peBeforeSleepProc runned!!!\n");
}


x86 assembly (clang, -O0):
<fun_peBeforesleepProc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_peBeforesleepProc>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
%struct.peEventLoop = type { i32 }
@.str = [29 x i8] c"peBeforeSleepProc runned!!!\0A\00"
define void @fun_peBeforesleepProc(%struct.peEventLoop* %0) {
%2 = alloca %struct.peEventLoop*
store %struct.peEventLoop* %0, %struct.peEventLoop** %2
%3 = load %struct.peEventLoop*, %struct.peEventLoop** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.peEventLoop = type { i32 }
@str = [28 x i8] c"peBeforeSleepProc runned!!!\00"
define void @fun_peBeforesleepProc(%struct.peEventLoop* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ f1();
void f4(void) { f1(); }


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <f1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
xor    %eax,%eax
jmp    1030 <f1@plt>

LLVM IR (-O0):
define void @f4() {
%1 = call i32 (...) @f1()
ret void
}

LLVM IR (-O2):
define void @f4() {
%1 = tail call i32 (...) @f1()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ trap_ConfigString(int, char const *);
void G_Match_SetAutorecordState(const char *state) {
  trap_ConfigString(15, state);
}


x86 assembly (clang, -O0):
<G_Match_SetAutorecordState>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0xf,%edi
call   1030 <trap_ConfigString@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<G_Match_SetAutorecordState>:
mov    %rdi,%rsi
mov    $0xf,%edi
jmp    1030 <trap_ConfigString@plt>

LLVM IR (-O0):
define void @G_Match_SetAutorecordState(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @trap_ConfigString(i32 15, i8* %3)
ret void
}

LLVM IR (-O2):
define void @G_Match_SetAutorecordState(i8* %0) {
%2 = tail call i32 @trap_ConfigString(i32 15, i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void ct_usleep(int usecond) { usleep(usecond); }


x86 assembly (clang, -O0):
<ct_usleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ct_usleep>:
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @ct_usleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @usleep(i32 %3)
ret void
}

LLVM IR (-O2):
define void @ct_usleep(i32 %0) {
%2 = tail call i32 @usleep(i32 %0)
ret void
}
/* Variables and functions */
int aft3dsurfmeshrefiner(int *, double *, int *, int *, int *, int, int,
                         int /*<<< orphan*/);
int surface_refine(int *nV, double *vertex, int *nF, int *face,
                   int *facematerial, int maxnV, int maxnF) {
  return aft3dsurfmeshrefiner(nV, vertex, nF, face, facematerial, maxnV, maxnF,
                              0);
}


x86 assembly (clang, -O0):
<surface_refine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x10(%rbp),%eax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9d,-0x2c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    -0x2c(%rbp),%r9d
mov    0x10(%rbp),%eax
xor    %r10d,%r10d
mov    %eax,(%rsp)
movl   $0x0,0x8(%rsp)
call   1030 <aft3dsurfmeshrefiner@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<surface_refine>:
push   %rax
mov    0x10(%rsp),%eax
push   $0x0
push   %rax
call   1030 <aft3dsurfmeshrefiner@plt>
add    $0x10,%rsp
pop    %rcx
ret

LLVM IR (-O0):
define i32 @surface_refine(i32* %0, double* %1, i32* %2, i32* %3, i32* %4, i32 %5, i32 %6) {
%8 = alloca i32*
%9 = alloca double*
%10 = alloca i32*
%11 = alloca i32*
%12 = alloca i32*
%13 = alloca i32
%14 = alloca i32
store i32* %0, i32** %8
store double* %1, double** %9
store i32* %2, i32** %10
store i32* %3, i32** %11
store i32* %4, i32** %12
store i32 %5, i32* %13
store i32 %6, i32* %14
%15 = load i32*, i32** %8
%16 = load double*, double** %9
%17 = load i32*, i32** %10
%18 = load i32*, i32** %11
%19 = load i32*, i32** %12
%20 = load i32, i32* %13
%21 = load i32, i32* %14
%22 = call i32 @aft3dsurfmeshrefiner(i32* %15, double* %16, i32* %17, i32* %18, i32* %19, i32 %20, i32 %21, i32 0)
ret i32 %22
}

LLVM IR (-O2):
define i32 @surface_refine(i32* %0, double* %1, i32* %2, i32* %3, i32* %4, i32 %5, i32 %6) {
%8 = tail call i32 @aft3dsurfmeshrefiner(i32* %0, double* %1, i32* %2, i32* %3, i32* %4, i32 %5, i32 %6, i32 0)
ret i32 %8
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void ts_packet_set_not_scrambled(uint8_t *ts_packet) {
  ts_packet[3] = ts_packet[3] & ~0xc0;
}


x86 assembly (clang, -O0):
<ts_packet_set_not_scrambled>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%ecx
and    $0xffffff3f,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ts_packet_set_not_scrambled>:
andb   $0x3f,0xc(%rdi)
ret

LLVM IR (-O0):
define void @ts_packet_set_not_scrambled(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 3
%5 = load i32, i32* %4
%6 = and i32 %5, -193
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 3
store i32 %6, i32* %8
ret void
}

LLVM IR (-O2):
define void @ts_packet_set_not_scrambled(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 3
%3 = load i32, i32* %2
%4 = and i32 %3, -193
store i32 %4, i32* %2
ret void
}
void init_fstein_dither(int line) { ; }


x86 assembly (clang, -O0):
<init_fstein_dither>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_fstein_dither>:
ret

LLVM IR (-O0):
define void @init_fstein_dither(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @init_fstein_dither(i32 %0) {
ret void
}
int bc_epoll_del_evt() {
  int ret = -1;
  return ret;
}


x86 assembly (clang, -O0):
<bc_epoll_del_evt>:
push   %rbp
mov    %rsp,%rbp
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bc_epoll_del_evt>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @bc_epoll_del_evt() {
%1 = alloca i32
store i32 -1, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @bc_epoll_del_evt() {
ret i32 -1
}
int test_imm_1Dint8_mem(signed char *val) {
  return ((*val) & (0x1D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Dint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0x1d,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Dint8_mem>:
testb  $0x1d,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Dint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 29
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_1Dint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 29
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void updateSeriesCommunityRating(unsigned int seriesID,
                                 unsigned short communityRating) {
  return;
}


x86 assembly (clang, -O0):
<updateSeriesCommunityRating>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %edi,-0x4(%rbp)
mov    %ax,-0x6(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<updateSeriesCommunityRating>:
ret

LLVM IR (-O0):
define void @updateSeriesCommunityRating(i32 %0, i16 zeroext %1) {
%3 = alloca i32
%4 = alloca i16
store i32 %0, i32* %3
store i16 %1, i16* %4
ret void
}

LLVM IR (-O2):
define void @updateSeriesCommunityRating(i32 %0, i16 zeroext %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void set_g1_special_char() { fputs("\033)0", stdout); }


x86 assembly (clang, -O0):
<set_g1_special_char>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <fputs@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_g1_special_char>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
lea    0xee0(%rip),%rdi
jmp    1030 <fputs@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"\1B)0\00"
@stdout = global i32 0
define void @set_g1_special_char() {
%1 = load i32, i32* @stdout
%2 = call i32 @fputs(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"\1B)0\00"
@stdout = global i32 0
define void @set_g1_special_char() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}