xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int usage(void) {
  printf(
      "bxvrrpd3 version 0.1 (implementation of RFC 5798)\n"
      "Usage: bxvrrpd3 -i ifname -v vrid [OPTIONS] ipaddr\n"
      "	-d, --daemonize  : Run as daemon\n"
      "	-i, --ifname     : the LAN interface name to run on\n"
      "	-v, --vrid       : the id of the virtual server [1-255]\n"
      "	-n, --no-preempt : Set non-preempt mode (dfl: preemptible)\n"
      "	-p, --prio       : Set local priority (dfl: 100)\n"
      "	-I, --interval   : Set advertisement interval (in csec) (dfl: 100)\n"
      "	-h, --help       : help message\n"
      "	    --verbose    : (No implementation)\n"
      "	ipaddr   : the ip address(es) of the virtual server\n");
  return 0;
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [550 x i8] c"bxvrrpd3 version 0.1 (implementation of RFC 5798)\0AUsage: bxvrrpd3 -i ifname -v vrid [OPTIONS] ipaddr\0A\09-d, --daemonize : Run as daemon\0A\09-i, --ifname : the LAN interface name to run on\0A\09-v, --vrid : the id of the virtual server [1-255]\0A\09-n, --no-preempt : Set non-preempt mode (dfl: preemptible)\0A\09-p, --prio : Set local priority (dfl: 100)\0A\09-I, --interval : Set advertisement interval (in csec) (dfl: 100)\0A\09-h, --help : help message\0A\09 --verbose : (No implementation)\0A\09ipaddr : the ip address(es) of the virtual server\0A\00"
define i32 @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([550 x i8], [550 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [549 x i8] c"bxvrrpd3 version 0.1 (implementation of RFC 5798)\0AUsage: bxvrrpd3 -i ifname -v vrid [OPTIONS] ipaddr\0A\09-d, --daemonize : Run as daemon\0A\09-i, --ifname : the LAN interface name to run on\0A\09-v, --vrid : the id of the virtual server [1-255]\0A\09-n, --no-preempt : Set non-preempt mode (dfl: preemptible)\0A\09-p, --prio : Set local priority (dfl: 100)\0A\09-I, --interval : Set advertisement interval (in csec) (dfl: 100)\0A\09-h, --help : help message\0A\09 --verbose : (No implementation)\0A\09ipaddr : the ip address(es) of the virtual server\00"
define i32 @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([549 x i8], [549 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct ip {
  int /*<<< orphan*/ ip_off;
};

/* Variables and functions */
int IP_OFFMASK;
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int ntohs(int /*<<< orphan*/);
int IsIpv4Fragment(struct ip *hdr) {
  assert(hdr != NULL);
  if ((ntohs(hdr->ip_off) & IP_OFFMASK) != 0) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<IsIpv4Fragment>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
call   1040 <ntohs@plt>
mov    0x2e98(%rip),%rcx
and    (%rcx),%eax
cmp    $0x0,%eax
je     1167 <IsIpv4Fragment+0x47>
movl   $0x1,-0x4(%rbp)
jmp    116e <IsIpv4Fragment+0x4e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IsIpv4Fragment>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1030 <assert@plt>
mov    (%rbx),%edi
call   1040 <ntohs@plt>
mov    0x2ea8(%rip),%rdx
xor    %ecx,%ecx
test   %eax,(%rdx)
setne  %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.ip = type { i32 }
@IP_OFFMASK = global i32 0
define i32 @IsIpv4Fragment(%struct.ip* %0) {
%2 = alloca i32
%3 = alloca %struct.ip*
store %struct.ip* %0, %struct.ip** %3
%4 = load %struct.ip*, %struct.ip** %3
%5 = icmp ne %struct.ip* %4, null
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
%8 = load %struct.ip*, %struct.ip** %3
%9 = getelementptr inbounds %struct.ip, %struct.ip* %8, i32 0, i32 0
%10 = load i32, i32* %9
%11 = call i32 @ntohs(i32 %10)
%12 = load i32, i32* @IP_OFFMASK
%13 = and i32 %11, %12
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %1
store i32 1, i32* %2
br label %17
16: ; preds = %1
store i32 0, i32* %2
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
%struct.ip = type { i32 }
@IP_OFFMASK = global i32 0
define i32 @IsIpv4Fragment(%struct.ip* %0) {
%2 = icmp ne %struct.ip* %0, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = getelementptr inbounds %struct.ip, %struct.ip* %0, i64 0, i32 0
%6 = load i32, i32* %5
%7 = tail call i32 @ntohs(i32 %6)
%8 = load i32, i32* @IP_OFFMASK
%9 = and i32 %8, %7
%10 = icmp ne i32 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}
int here_you_can_insert_your_native_methods() { return 0; }


x86 assembly (clang, -O0):
<here_you_can_insert_your_native_methods>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<here_you_can_insert_your_native_methods>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @here_you_can_insert_your_native_methods() {
ret i32 0
}

LLVM IR (-O2):
define i32 @here_you_can_insert_your_native_methods() {
ret i32 0
}
int cmp_int(const void *p1, const void *p2) {
  return *(const int *)p2 - *(const int *)p1;
}


x86 assembly (clang, -O0):
<cmp_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x8(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp_int>:
mov    (%rsi),%eax
sub    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @cmp_int(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %3
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @cmp_int(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %1 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %0 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}
const char *get_commands() {
  static const char *commands = "hello start\n"
                                "uorb start\n"
                                "simulator start -s\n"
                                "barosim start\n"
                                "adcsim start\n"
                                "accelsim start\n"
                                "gyrosim start\n"
                                "list_devices\n"
                                "list_topics\n"
                                "list_tasks\n"
                                "param show *\n"
                                "rgbled start\n";
  return commands;
}


x86 assembly (clang, -O0):
<get_commands>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f15(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_commands>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@get_commands.commands = internal global i8* getelementptr inbounds ([161 x i8], [161 x i8]* @.str, i32 0, i32 0)
@.str = [161 x i8] c"hello start\0Auorb start\0Asimulator start -s\0Abarosim start\0Aadcsim start\0Aaccelsim start\0Agyrosim start\0Alist_devices\0Alist_topics\0Alist_tasks\0Aparam show *\0Argbled start\0A\00"
define i8* @get_commands() {
%1 = load i8*, i8** @get_commands.commands
ret i8* %1
}

LLVM IR (-O2):
@.str = [161 x i8] c"hello start\0Auorb start\0Asimulator start -s\0Abarosim start\0Aadcsim start\0Aaccelsim start\0Agyrosim start\0Alist_devices\0Alist_topics\0Alist_tasks\0Aparam show *\0Argbled start\0A\00"
define i8* @get_commands() {
ret i8* getelementptr inbounds ([161 x i8], [161 x i8]* @.str, i64 0, i64 0)
}
int ceal_tvsig_comma_needed(int clear, int set) {
  static int needed_bit = 0;
  int out = needed_bit;
  if (clear)
    needed_bit = 0;
  if (set)
    needed_bit = 1;
  return out;
}


x86 assembly (clang, -O0):
<ceal_tvsig_comma_needed>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    0x2f14(%rip),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1127 <ceal_tvsig_comma_needed+0x27>
movl   $0x0,0x2efd(%rip)
cmpl   $0x0,-0x8(%rbp)
je     113b <ceal_tvsig_comma_needed+0x3b>
movl   $0x1,0x2ee9(%rip)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceal_tvsig_comma_needed>:
movzbl 0x2f1d(%rip),%eax
or     %esi,%edi
je     1114 <ceal_tvsig_comma_needed+0x14>
test   %esi,%esi
setne  0x2f10(%rip)
ret

LLVM IR (-O0):
@ceal_tvsig_comma_needed.needed_bit = internal global i32 0
define i32 @ceal_tvsig_comma_needed(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* @ceal_tvsig_comma_needed.needed_bit
store i32 %6, i32* %5
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 0, i32* @ceal_tvsig_comma_needed.needed_bit
br label %10
10: ; preds = %9, %2
%11 = load i32, i32* %4
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %10
store i32 1, i32* @ceal_tvsig_comma_needed.needed_bit
br label %14
14: ; preds = %13, %10
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
@ceal_tvsig_comma_needed.needed_bit = internal unnamed_addr global i1 false
define i32 @ceal_tvsig_comma_needed(i32 %0, i32 %1) {
%3 = load i1, i1* @ceal_tvsig_comma_needed.needed_bit
%4 = or i32 %1, %0
%5 = icmp eq i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = icmp ne i32 %1, 0
store i1 %7, i1* @ceal_tvsig_comma_needed.needed_bit
br label %8
8: ; preds = %2, %6
%9 = zext i1 %3 to i32
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ Check_TP();
int /*<<< orphan*/ Start_TP();
void main() {
  Start_TP();
  while (1) {
    Check_TP();
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Start_TP@plt>
mov    $0x0,%al
call   1040 <Check_TP@plt>
jmp    112b <main+0xb>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <Start_TP@plt>
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1040 <Check_TP@plt>
jmp    1130 <main+0x10>

LLVM IR (-O0):
define void @main() {
%1 = call i32 (...) @Start_TP()
br label %2
2: ; preds = %0, %2
%3 = call i32 (...) @Check_TP()
br label %2
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 (...) @Start_TP()
br label %2
2: ; preds = %0, %2
%3 = tail call i32 (...) @Check_TP()
br label %2
}
void kol_paint_string(unsigned x, unsigned y, char *s, unsigned c) {
  asm("int $0x40" ::"a"(4), "b"(x * 65536 + y), "c"(c), "d"(s));
}


x86 assembly (clang, -O0):
<kol_paint_string>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0xc(%rbp),%ebx
shl    $0x10,%ebx
add    -0x10(%rbp),%ebx
mov    -0x1c(%rbp),%ecx
mov    -0x18(%rbp),%rdx
mov    $0x4,%eax
int    $0x40
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<kol_paint_string>:
push   %rbx
shl    $0x10,%edi
lea    (%rdi,%rsi,1),%ebx
mov    $0x4,%eax
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define void @kol_paint_string(i32 %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = mul i32 %9, 65536
%11 = load i32, i32* %6
%12 = add i32 %10, %11
%13 = load i32, i32* %8
%14 = load i8*, i8** %7
ret void
}

LLVM IR (-O2):
define void @kol_paint_string(i32 %0, i32 %1, i8* %2, i32 %3) {
%5 = shl i32 %0, 16
%6 = add i32 %5, %1
tail call void asm sideeffect "int $$0x40", "{ax},{bx},{cx},{dx},~{dirflag},~{fpsr},~{flags}"(i32 4, i32 %6, i32 %3, i8* %2)
ret void
}
/* Variables and functions */
int bmm050_compensate_X(short, unsigned short);
signed int bmm050_compensate_X_s32(signed short mdata_x,
                                   unsigned short data_R) {
  signed int retval;
  retval = bmm050_compensate_X(mdata_x, data_R);
  if (retval == (signed int)-32768)
    retval = ((signed int)(-2147483647 - 1));
  return retval;
}


x86 assembly (clang, -O0):
<bmm050_compensate_X_s32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x2(%rbp),%ax
movswl %ax,%edi
movzwl -0x4(%rbp),%esi
call   1030 <bmm050_compensate_X@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0xffff8000,-0x8(%rbp)
jne    114d <bmm050_compensate_X_s32+0x3d>
movl   $0x80000000,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bmm050_compensate_X_s32>:
push   %rax
call   1030 <bmm050_compensate_X@plt>
cmp    $0xffff8000,%eax
mov    $0x80000000,%ecx
cmove  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @bmm050_compensate_X_s32(i16 signext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
%5 = alloca i32
store i16 %0, i16* %3
store i16 %1, i16* %4
%6 = load i16, i16* %3
%7 = load i16, i16* %4
%8 = call i32 @bmm050_compensate_X(i16 signext %6, i16 zeroext %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp eq i32 %9, -32768
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 -2147483648, i32* %5
br label %12
12: ; preds = %11, %2
%13 = load i32, i32* %5
ret i32 %13
}

LLVM IR (-O2):
define i32 @bmm050_compensate_X_s32(i16 signext %0, i16 zeroext %1) {
%3 = tail call i32 @bmm050_compensate_X(i16 signext %0, i16 zeroext %1)
%4 = icmp eq i32 %3, -32768
%5 = select i1 %4, i32 -2147483648, i32 %3
ret i32 %5
}
/* Variables and functions */
unsigned short swap16(unsigned short);
unsigned short ntohs(unsigned short val) { return swap16(val); }


x86 assembly (clang, -O0):
<ntohs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edi
call   1030 <swap16@plt>
movzwl %ax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ntohs>:
jmp    1030 <swap16@plt>

LLVM IR (-O0):
define zeroext i16 @ntohs(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = call zeroext i16 @swap16(i16 zeroext %3)
ret i16 %4
}

LLVM IR (-O2):
define zeroext i16 @ntohs(i16 zeroext %0) {
%2 = tail call zeroext i16 @swap16(i16 zeroext %0)
ret i16 %2
}
void BN_clear(void) {}


x86 assembly (clang, -O0):
<BN_clear>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_clear>:
ret

LLVM IR (-O0):
define void @BN_clear() {
ret void
}

LLVM IR (-O2):
define void @BN_clear() {
ret void
}
int pldummy_hpgl(void) { return 0; }


x86 assembly (clang, -O0):
<pldummy_hpgl>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pldummy_hpgl>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pldummy_hpgl() {
ret i32 0
}

LLVM IR (-O2):
define i32 @pldummy_hpgl() {
ret i32 0
}
/* Variables and functions */
unsigned short __lzcnt16(unsigned short);
unsigned short test__lzcnt16(unsigned short x) { return __lzcnt16(x); }


x86 assembly (clang, -O0):
<test__lzcnt16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edi
call   1030 <__lzcnt16@plt>
movzwl %ax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test__lzcnt16>:
jmp    1030 <__lzcnt16@plt>

LLVM IR (-O0):
define zeroext i16 @test__lzcnt16(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = call zeroext i16 @__lzcnt16(i16 zeroext %3)
ret i16 %4
}

LLVM IR (-O2):
define zeroext i16 @test__lzcnt16(i16 zeroext %0) {
%2 = tail call zeroext i16 @__lzcnt16(i16 zeroext %0)
ret i16 %2
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *);
int /*<<< orphan*/ strlen(char *);
int /*<<< orphan*/ usleep(int);
int /*<<< orphan*/ write(int, char *, int /*<<< orphan*/);
void tune(int fd) {
  char cmd[7];
  sprintf(cmd, "SWT19;");
  write(fd, cmd, strlen(cmd));
  usleep(100e3);
}


x86 assembly (clang, -O0):
<tune>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
lea    -0xb(%rbp),%rdi
lea    0xeaa(%rip),%rsi
call   1050 <sprintf@plt>
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
lea    -0xb(%rbp),%rax
mov    %rax,-0x18(%rbp)
lea    -0xb(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <write@plt>
mov    $0x186a0,%edi
call   1060 <usleep@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tune>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
movl   $0x3b3931,0x3(%rsp)
movl   $0x31545753,(%rsp)
mov    %rsp,%r14
mov    %r14,%rdi
call   1040 <strlen@plt>
mov    %ebx,%edi
mov    %r14,%rsi
mov    %eax,%edx
call   1030 <write@plt>
mov    $0x186a0,%edi
call   1050 <usleep@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [7 x i8] c"SWT19;\00"
define void @tune(i32 %0) {
%2 = alloca i32
%3 = alloca [7 x i8]
store i32 %0, i32* %2
%4 = getelementptr inbounds [7 x i8], [7 x i8]* %3, i64 0, i64 0
%5 = call i32 @sprintf(i8* %4, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* %2
%7 = getelementptr inbounds [7 x i8], [7 x i8]* %3, i64 0, i64 0
%8 = getelementptr inbounds [7 x i8], [7 x i8]* %3, i64 0, i64 0
%9 = call i32 @strlen(i8* %8)
%10 = call i32 @write(i32 %6, i8* %7, i32 %9)
%11 = call i32 @usleep(i32 100000)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"SWT19;\00"
define void @tune(i32 %0) {
%2 = alloca [7 x i8]
%3 = getelementptr inbounds [7 x i8], [7 x i8]* %2, i64 0, i64 0
%4 = call i32 @strlen(i8* %3)
%5 = call i32 @write(i32 %0, i8* %3, i32 %4)
%6 = call i32 @usleep(i32 100000)
ret void
}
void SSL_get_certificate(void) {}


x86 assembly (clang, -O0):
<SSL_get_certificate>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSL_get_certificate>:
ret

LLVM IR (-O0):
define void @SSL_get_certificate() {
ret void
}

LLVM IR (-O2):
define void @SSL_get_certificate() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ wcscspn(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
void uninivar_wcscspn(void) {
  wchar_t *cs;
  wchar_t *ct;
  (void)wcscspn(cs, ct);
}


x86 assembly (clang, -O0):
<uninivar_wcscspn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <wcscspn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninivar_wcscspn>:
jmp    1030 <wcscspn@plt>

LLVM IR (-O0):
define void @uninivar_wcscspn() {
%1 = alloca i32*
%2 = alloca i32*
%3 = load i32*, i32** %1
%4 = load i32*, i32** %2
%5 = call i32 @wcscspn(i32* %3, i32* %4)
ret void
}

LLVM IR (-O2):
define void @uninivar_wcscspn() {
%1 = tail call i32 @wcscspn(i32* undef, i32* undef)
ret void
}
void halt(void) { __asm__ __volatile__("hlt"); }


x86 assembly (clang, -O0):
<halt>:
push   %rbp
mov    %rsp,%rbp
hlt
pop    %rbp
ret

x86 assembly (clang, -O2):
<halt>:
hlt
ret

LLVM IR (-O0):
define void @halt() {
ret void
}

LLVM IR (-O2):
define void @halt() {
tail call void asm sideeffect "hlt", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
unsigned long long wcstoull(const wchar_t *nptr, wchar_t **endptr, int base) {
  assert(0);
  return 0;
}


x86 assembly (clang, -O0):
<wcstoull>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %edi,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcstoull>:
push   %rax
xor    %edi,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @wcstoull(i32* %0, i32** %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32**
%6 = alloca i32
store i32* %0, i32** %4
store i32** %1, i32*** %5
store i32 %2, i32* %6
%7 = call i32 @assert(i32 0)
ret i64 0
}

LLVM IR (-O2):
define i64 @wcstoull(i32* nocapture readnone %0, i32** nocapture readnone %1, i32 %2) {
%4 = tail call i32 @assert(i32 0)
ret i64 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ write_glyph(int);
int main(int argc, char **argv) {
  int i;
  printf("; Autogenerated by makechr\n");
  for (i = 0; i < 256; i++) {
    write_glyph(i);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
movl   $0x0,-0x14(%rbp)
cmpl   $0x100,-0x14(%rbp)
jge    116c <main+0x4c>
mov    -0x14(%rbp),%edi
call   1040 <write_glyph@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1149 <main+0x29>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %ebx,%ebx
nop
mov    %ebx,%edi
call   1040 <write_glyph@plt>
add    $0x1,%ebx
cmp    $0x100,%ebx
jne    1130 <main+0x10>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"; Autogenerated by makechr\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
store i32 0, i32* %6
br label %8
8: ; preds = %14, %2
%9 = load i32, i32* %6
%10 = icmp slt i32 %9, 256
br i1 %10, label %11, label %17
11: ; preds = %8
%12 = load i32, i32* %6
%13 = call i32 @write_glyph(i32 %12)
br label %14
14: ; preds = %11
%15 = load i32, i32* %6
%16 = add nsw i32 %15, 1
store i32 %16, i32* %6
br label %8
17: ; preds = %8
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
@str = [27 x i8] c"; Autogenerated by makechr\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @str, i64 0, i64 0))
br label %4
4: ; preds = %2, %4
%5 = phi i32 [ 0, %2 ], [ %7, %4 ]
%6 = tail call i32 @write_glyph(i32 %5)
%7 = add nuw nsw i32 %5, 1
%8 = icmp eq i32 %7, 256
br i1 %8, label %9, label %4
9: ; preds = %4
ret i32 0
}
void msm_trigger_wdog_bite(void) {}


x86 assembly (clang, -O0):
<msm_trigger_wdog_bite>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msm_trigger_wdog_bite>:
ret

LLVM IR (-O0):
define void @msm_trigger_wdog_bite() {
ret void
}

LLVM IR (-O2):
define void @msm_trigger_wdog_bite() {
ret void
}
unsigned int char_to_uint(char buffer) { return buffer - 48; }


x86 assembly (clang, -O0):
<char_to_uint>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
sub    $0x30,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<char_to_uint>:
lea    -0x30(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @char_to_uint(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = sub nsw i32 %4, 48
ret i32 %5
}

LLVM IR (-O2):
define i32 @char_to_uint(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add nsw i32 %2, -48
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ codeln(char *);
int /*<<< orphan*/ commentln(char *);
int /*<<< orphan*/ popIndent();
int /*<<< orphan*/ pushIndent();
int /*<<< orphan*/ vspace(int);
void legacyGain() {
  vspace(3);
  commentln("Legacy function");
  codeln("void set7bitGain (unsigned char b) {");
  pushIndent();
  popIndent();
  codeln("}");
}


x86 assembly (clang, -O0):
<legacyGain>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1060 <vspace@plt>
lea    0xe9b(%rip),%rdi
call   1050 <commentln@plt>
lea    0xe9f(%rip),%rdi
call   1040 <codeln@plt>
mov    $0x0,%al
call   1030 <pushIndent@plt>
mov    $0x0,%al
call   1070 <popIndent@plt>
lea    0xeaa(%rip),%rdi
call   1040 <codeln@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<legacyGain>:
push   %rax
mov    $0x3,%edi
call   1060 <vspace@plt>
lea    0xe9e(%rip),%rdi
call   1050 <commentln@plt>
lea    0xea2(%rip),%rdi
call   1040 <codeln@plt>
xor    %eax,%eax
call   1030 <pushIndent@plt>
xor    %eax,%eax
call   1070 <popIndent@plt>
lea    0xead(%rip),%rdi
pop    %rax
jmp    1040 <codeln@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"Legacy function\00"
@.str.1 = [37 x i8] c"void set7bitGain (unsigned char b) {\00"
@.str.2 = [2 x i8] c"}\00"
define void @legacyGain() {
%1 = call i32 @vspace(i32 3)
%2 = call i32 @commentln(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @codeln(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.1, i64 0, i64 0))
%4 = call i32 (...) @pushIndent()
%5 = call i32 (...) @popIndent()
%6 = call i32 @codeln(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"Legacy function\00"
@.str.1 = [37 x i8] c"void set7bitGain (unsigned char b) {\00"
@.str.2 = [2 x i8] c"}\00"
define void @legacyGain() {
%1 = tail call i32 @vspace(i32 3)
%2 = tail call i32 @commentln(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @codeln(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i32 (...) @pushIndent()
%5 = tail call i32 (...) @popIndent()
%6 = tail call i32 @codeln(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
ret void
}
void EUSCIA1_IRQHandler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<EUSCIA1_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <EUSCIA1_IRQHandler+0x9>
jmp    1109 <EUSCIA1_IRQHandler+0x9>

x86 assembly (clang, -O2):
<EUSCIA1_IRQHandler>:
jmp    1100 <EUSCIA1_IRQHandler>

LLVM IR (-O0):
define void @EUSCIA1_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @EUSCIA1_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int strcmp(char *, char *);
int main(void) {
  char *s1 = "mobile";
  char *s2 = "Mobile";
  int result = strcmp(s1, s2);
  printf("Result: %d", result);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    0xec6(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <strcmp@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%esi
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"mobile\00"
@.str.1 = [7 x i8] c"Mobile\00"
@.str.2 = [11 x i8] c"Result: %d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i32 0, i32* %1
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8** %2
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8** %3
%5 = load i8*, i8** %2
%6 = load i8*, i8** %3
%7 = call i32 @strcmp(i8* %5, i8* %6)
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str.2 = [11 x i8] c"Result: %d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0), i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("MAIN\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"MAIN\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [5 x i8] c"MAIN\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  printf("EXECUTING CLONE\n");
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e97(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"EXECUTING CLONE\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%7 = load i32, i32* @EXIT_SUCCESS
%8 = call i32 @exit(i32 %7)
unreachable
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
@str = [16 x i8] c"EXECUTING CLONE\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
%4 = load i32, i32* @EXIT_SUCCESS
%5 = tail call i32 @exit(i32 %4)
unreachable
}
int ft_count_jump(int type, int label_size) {
  if (type == 1)
    return (1);
  else if (type == 2)
    return (2 + 2 * (1 - label_size));
  else if (type == 3)
    return (2);
  else
    return (0);
}


x86 assembly (clang, -O0):
<ft_count_jump>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1120 <ft_count_jump+0x20>
movl   $0x1,-0x4(%rbp)
jmp    115d <ft_count_jump+0x5d>
cmpl   $0x2,-0x8(%rbp)
jne    1140 <ft_count_jump+0x40>
mov    $0x1,%eax
sub    -0xc(%rbp),%eax
shl    $0x1,%eax
add    $0x2,%eax
mov    %eax,-0x4(%rbp)
jmp    115d <ft_count_jump+0x5d>
cmpl   $0x3,-0x8(%rbp)
jne    1156 <ft_count_jump+0x56>
movl   $0x2,-0x4(%rbp)
jmp    115d <ft_count_jump+0x5d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_count_jump>:
mov    %edi,%eax
cmp    $0x1,%edi
je     1123 <ft_count_jump+0x23>
cmp    $0x3,%eax
je     111b <ft_count_jump+0x1b>
cmp    $0x2,%eax
jne    1121 <ft_count_jump+0x21>
add    %esi,%esi
mov    $0x4,%eax
sub    %esi,%eax
ret
mov    $0x2,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ft_count_jump(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 1, i32* %3
br label %22
9: ; preds = %2
%10 = load i32, i32* %4
%11 = icmp eq i32 %10, 2
br i1 %11, label %12, label %17
12: ; preds = %9
%13 = load i32, i32* %5
%14 = sub nsw i32 1, %13
%15 = mul nsw i32 2, %14
%16 = add nsw i32 2, %15
store i32 %16, i32* %3
br label %22
17: ; preds = %9
%18 = load i32, i32* %4
%19 = icmp eq i32 %18, 3
br i1 %19, label %20, label %21
20: ; preds = %17
store i32 2, i32* %3
br label %22
21: ; preds = %17
store i32 0, i32* %3
br label %22
22: ; preds = %21, %20, %12, %8
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @ft_count_jump(i32 %0, i32 %1) {
switch i32 %0, label %7 [
i32 1, label %8
i32 2, label %3
i32 3, label %6
]
3: ; preds = %2
%4 = mul i32 %1, -2
%5 = add i32 %4, 4
br label %8
6: ; preds = %2
br label %8
7: ; preds = %2
br label %8
8: ; preds = %2, %7, %6, %3
%9 = phi i32 [ %5, %3 ], [ 2, %6 ], [ 0, %7 ], [ %0, %2 ]
ret i32 %9
}
void clear_inputs_gen_random_ID_5738() {}


x86 assembly (clang, -O0):
<clear_inputs_gen_random_ID_5738>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_inputs_gen_random_ID_5738>:
ret

LLVM IR (-O0):
define void @clear_inputs_gen_random_ID_5738() {
ret void
}

LLVM IR (-O2):
define void @clear_inputs_gen_random_ID_5738() {
ret void
}
XAllowEvents() {}


x86 assembly (clang, -O0):
<XAllowEvents>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XAllowEvents>:
ret

LLVM IR (-O0):
define i32 @XAllowEvents() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @XAllowEvents() {
ret i32 undef
}
void g_flush() {}


x86 assembly (clang, -O0):
<g_flush>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_flush>:
ret

LLVM IR (-O0):
define void @g_flush() {
ret void
}

LLVM IR (-O2):
define void @g_flush() {
ret void
}
int lookup_module_symbol_name(unsigned long addr, char *symname) { return -34; }


x86 assembly (clang, -O0):
<lookup_module_symbol_name>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffde,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lookup_module_symbol_name>:
mov    $0xffffffde,%eax
ret

LLVM IR (-O0):
define i32 @lookup_module_symbol_name(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
ret i32 -34
}

LLVM IR (-O2):
define i32 @lookup_module_symbol_name(i64 %0, i8* nocapture readnone %1) {
ret i32 -34
}
void errInspectionInit(int fd, const struct addrinfo *addrs) {}


x86 assembly (clang, -O0):
<errInspectionInit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<errInspectionInit>:
ret

LLVM IR (-O0):
%struct.addrinfo = type opaque
define void @errInspectionInit(i32 %0, %struct.addrinfo* %1) {
%3 = alloca i32
%4 = alloca %struct.addrinfo*
store i32 %0, i32* %3
store %struct.addrinfo* %1, %struct.addrinfo** %4
ret void
}

LLVM IR (-O2):
%struct.addrinfo = type opaque
define void @errInspectionInit(i32 %0, %struct.addrinfo* nocapture %1) {
ret void
}
/* Type definitions */
struct sched_param {
  int dummy;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int sched_setscheduler(pid_t pid, int policy, const struct sched_param *param) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<sched_setscheduler>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    0x2ed3(%rip),%rax
mov    (%rax),%ecx
mov    0x2eba(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sched_setscheduler>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.sched_param = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @sched_setscheduler(i32 %0, i32 %1, %struct.sched_param* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca %struct.sched_param*
store i32 %0, i32* %4
store i32 %1, i32* %5
store %struct.sched_param* %2, %struct.sched_param** %6
%7 = load i32, i32* @ENOSYS
store i32 %7, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
%struct.sched_param = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @sched_setscheduler(i32 %0, i32 %1, %struct.sched_param* nocapture readnone %2) {
%4 = load i32, i32* @ENOSYS
store i32 %4, i32* @errno
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char const *argv[]) {
  unsigned int n[] = {30, 40, 50, 60, 70, 80};
  int *p = n;
  printf("*p++ %d\n", *p++);
  printf("*p %d\n", *p);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xed7(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xed4(%rip),%rax
mov    %rax,-0x20(%rbp)
lea    -0x30(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x38(%rbp),%rax
mov    %rax,%rcx
add    $0x4,%rcx
mov    %rcx,-0x38(%rbp)
mov    (%rax),%esi
lea    0xeb8(%rip),%rdi
call   1030 <printf@plt>
mov    -0x38(%rbp),%rax
mov    (%rax),%esi
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1e,%esi
call   1030 <printf@plt>
lea    0xee0(%rip),%rdi
mov    $0x28,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.main.n = [6 x i32] [i32 30, i32 40, i32 50, i32 60, i32 70, i32 80]
@.str = [9 x i8] c"*p++ %d\0A\00"
@.str.1 = [7 x i8] c"*p %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca [6 x i32]
%6 = alloca i32*
store i32 %0, i32* %3
store i8** %1, i8*** %4
%7 = bitcast [6 x i32]* %5 to i8*
%8 = getelementptr inbounds [6 x i32], [6 x i32]* %5, i64 0, i64 0
store i32* %8, i32** %6
%9 = load i32*, i32** %6
%10 = getelementptr inbounds i32, i32* %9, i32 1
store i32* %10, i32** %6
%11 = load i32, i32* %9
%12 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i32 %14)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"*p++ %d\0A\00"
@.str.1 = [7 x i8] c"*p %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 30)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i32 40)
ret i32 0
}
void gtk_paint_vline() {}


x86 assembly (clang, -O0):
<gtk_paint_vline>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_paint_vline>:
ret

LLVM IR (-O0):
define void @gtk_paint_vline() {
ret void
}

LLVM IR (-O2):
define void @gtk_paint_vline() {
ret void
}
/* Variables and functions */
void initArgs(char *args[]) {
  for (int i = 0; i < 20; i++) {
    args[i] = NULL;
  }
}


x86 assembly (clang, -O0):
<initArgs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x14,-0xc(%rbp)
jge    1137 <initArgs+0x37>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movq   $0x0,(%rax,%rcx,8)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <initArgs+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<initArgs>:
xorps  %xmm0,%xmm0
movups %xmm0,0x90(%rdi)
movups %xmm0,0x80(%rdi)
movups %xmm0,0x70(%rdi)
movups %xmm0,0x60(%rdi)
movups %xmm0,0x50(%rdi)
movups %xmm0,0x40(%rdi)
movups %xmm0,0x30(%rdi)
movups %xmm0,0x20(%rdi)
movups %xmm0,0x10(%rdi)
movups %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @initArgs(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 20
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i8**, i8*** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8*, i8** %8, i64 %10
store i8* null, i8** %11
br label %12
12: ; preds = %7
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @initArgs(i8** nocapture writeonly %0) {
%2 = bitcast i8** %0 to i8*
ret void
}
void printfUART_double(double d) {}


x86 assembly (clang, -O0):
<printfUART_double>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<printfUART_double>:
ret

LLVM IR (-O0):
define void @printfUART_double(double %0) {
%2 = alloca double
store double %0, double* %2
ret void
}

LLVM IR (-O2):
define void @printfUART_double(double %0) {
ret void
}
/* Variables and functions */
scalar_t__ strlen(char *);
int /*<<< orphan*/ strncmp(char *, char *, scalar_t__);
int strequal(char *str1, char *str2) {
  if (strlen(str1) != strlen(str2))
    return 0;
  return (!strncmp(str1, str2, strlen(str1)));
}


x86 assembly (clang, -O0):
<strequal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
cmp    %rcx,%rax
je     1162 <strequal+0x42>
movl   $0x0,-0x4(%rbp)
jmp    119b <strequal+0x7b>
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x30(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    %rax,%rdx
call   1030 <strncmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strequal>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1040 <strlen@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1040 <strlen@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rbx
jne    115c <strequal+0x3c>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
call   1030 <strncmp@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
sete   %al
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @strequal(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = call i64 @strlen(i8* %6)
%8 = load i8*, i8** %5
%9 = call i64 @strlen(i8* %8)
%10 = icmp ne i64 %7, %9
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 0, i32* %3
br label %21
12: ; preds = %2
%13 = load i8*, i8** %4
%14 = load i8*, i8** %5
%15 = load i8*, i8** %4
%16 = call i64 @strlen(i8* %15)
%17 = call i32 @strncmp(i8* %13, i8* %14, i64 %16)
%18 = icmp ne i32 %17, 0
%19 = xor i1 %18, true
%20 = zext i1 %19 to i32
store i32 %20, i32* %3
br label %21
21: ; preds = %12, %11
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @strequal(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %10
6: ; preds = %2
%7 = tail call i32 @strncmp(i8* %0, i8* %1, i64 %3)
%8 = icmp eq i32 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %2, %6
%11 = phi i32 [ %9, %6 ], [ 0, %2 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
int *malloc(int);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char *argv[]) {
  int *foo = malloc(4);
  free(foo);
  int number = *foo;
  printf("Use: %d\n", number);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x4,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%esi
lea    0xe97(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x4,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1030 <free@plt>
mov    (%rbx),%esi
lea    0xeb1(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"Use: %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
%7 = call i32* @malloc(i32 4)
store i32* %7, i32** %5
%8 = load i32*, i32** %5
%9 = call i32 @free(i32* %8)
%10 = load i32*, i32** %5
%11 = load i32, i32* %10
store i32 %11, i32* %6
%12 = load i32, i32* %6
%13 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"Use: %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32* @malloc(i32 4)
%4 = tail call i32 @free(i32* %3)
%5 = load i32, i32* %3
%6 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Variables and functions */
float strtof(char const *, int /*<<< orphan*/);
float cstring_to_float(const char *s) { return (s != 0) ? strtof(s, 0) : 0.0; }


x86 assembly (clang, -O0):
<cstring_to_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1140 <cstring_to_float+0x30>
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <strtof@plt>
cvtss2sd %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    114d <cstring_to_float+0x3d>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    114d <cstring_to_float+0x3d>
movsd  -0x10(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cstring_to_float>:
test   %rdi,%rdi
je     111c <cstring_to_float+0xc>
xor    %esi,%esi
jmp    1030 <strtof@plt>
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @cstring_to_float(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call float @strtof(i8* %6, i32 0)
%8 = fpext float %7 to double
br label %10
9: ; preds = %1
br label %10
10: ; preds = %9, %5
%11 = phi double [ %8, %5 ], [ 0.000000e+00, %9 ]
%12 = fptrunc double %11 to float
ret float %12
}

LLVM IR (-O2):
define float @cstring_to_float(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call float @strtof(i8* %0, i32 0)
br label %5
5: ; preds = %1, %3
%6 = phi float [ %4, %3 ], [ 0.000000e+00, %1 ]
ret float %6
}
signed short int
signedshortint_ignoring_unsignedshortint(signed short int x,
                                         unsigned short int y) {
  return x;
}


x86 assembly (clang, -O0):
<signedshortint_ignoring_unsignedshortint>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movswl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signedshortint_ignoring_unsignedshortint>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i16 @signedshortint_ignoring_unsignedshortint(i16 signext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
ret i16 %5
}

LLVM IR (-O2):
define signext i16 @signedshortint_ignoring_unsignedshortint(i16 returned signext %0, i16 zeroext %1) {
ret i16 %0
}
unsigned int rol32(unsigned int x, unsigned int j) {
  return (((x & 0xFFFFFFFF) >> (32 - j)) | (x << j)) & 0xFFFFFFFF;
}


x86 assembly (clang, -O0):
<rol32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffffffff,%eax
mov    $0x20,%ecx
sub    -0x8(%rbp),%ecx
shr    %cl,%eax
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
and    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rol32>:
mov    %esi,%ecx
mov    %edi,%eax
rol    %cl,%eax
ret

LLVM IR (-O0):
define i32 @rol32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = and i32 %5, -1
%7 = load i32, i32* %4
%8 = sub i32 32, %7
%9 = lshr i32 %6, %8
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = shl i32 %10, %11
%13 = or i32 %9, %12
%14 = and i32 %13, -1
ret i32 %14
}

LLVM IR (-O2):
define i32 @rol32(i32 %0, i32 %1) {
%3 = sub i32 32, %1
%4 = lshr i32 %0, %3
%5 = shl i32 %0, %1
%6 = or i32 %4, %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int entry() { printf("Entry.\n"); }


x86 assembly (clang, -O0):
<entry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<entry>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"Entry.\0A\00"
define i32 @entry() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [7 x i8] c"Entry.\00"
define i32 @entry() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
ret i32 undef
}