#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
struct arm_instruction {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int, int, int, ...);
int t2ev_mul32(unsigned opcode, unsigned address,
               struct arm_instruction *instruction, char *cp) {
  int ra = (opcode >> 12) & 0xf;
  switch (opcode & 0x007000f0) {
  case 0:
    if (ra == 0xf)
      sprintf(cp, "MUL\tr%d, r%d, r%d", (int)(opcode >> 8) & 0xf,
              (int)(opcode >> 16) & 0xf, (int)(opcode >> 0) & 0xf);
    else
      sprintf(cp, "MLA\tr%d, r%d, r%d, r%d", (int)(opcode >> 8) & 0xf,
              (int)(opcode >> 16) & 0xf, (int)(opcode >> 0) & 0xf, ra);
    break;
  case 0x10:
    sprintf(cp, "MLS\tr%d, r%d, r%d, r%d", (int)(opcode >> 8) & 0xf,
            (int)(opcode >> 16) & 0xf, (int)(opcode >> 0) & 0xf, ra);
    break;
  default:
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<t2ev_mul32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%eax
shr    $0xc,%eax
and    $0xf,%eax
mov    %eax,-0x24(%rbp)
mov    -0x8(%rbp),%eax
and    $0x7000f0,%eax
mov    %eax,-0x28(%rbp)
je     1159 <t2ev_mul32+0x49>
jmp    1148 <t2ev_mul32+0x38>
mov    -0x28(%rbp),%eax
sub    $0x10,%eax
je     11d1 <t2ev_mul32+0xc1>
jmp    120a <t2ev_mul32+0xfa>
cmpl   $0xf,-0x24(%rbp)
jne    1198 <t2ev_mul32+0x88>
mov    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%edx
shr    $0x8,%edx
and    $0xf,%edx
mov    -0x8(%rbp),%ecx
shr    $0x10,%ecx
and    $0xf,%ecx
mov    -0x8(%rbp),%r8d
shr    $0x0,%r8d
and    $0xf,%r8d
lea    0xe74(%rip),%rsi
mov    $0x0,%al
call   1030 <sprintf@plt>
jmp    11cc <t2ev_mul32+0xbc>
mov    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%edx
shr    $0x8,%edx
and    $0xf,%edx
mov    -0x8(%rbp),%ecx
shr    $0x10,%ecx
and    $0xf,%ecx
mov    -0x8(%rbp),%r8d
shr    $0x0,%r8d
and    $0xf,%r8d
mov    -0x24(%rbp),%r9d
lea    0xe4d(%rip),%rsi
mov    $0x0,%al
call   1030 <sprintf@plt>
jmp    1216 <t2ev_mul32+0x106>
mov    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%edx
shr    $0x8,%edx
and    $0xf,%edx
mov    -0x8(%rbp),%ecx
shr    $0x10,%ecx
and    $0xf,%ecx
mov    -0x8(%rbp),%r8d
shr    $0x0,%r8d
and    $0xf,%r8d
mov    -0x24(%rbp),%r9d
lea    0xe2b(%rip),%rsi
mov    $0x0,%al
call   1030 <sprintf@plt>
jmp    1216 <t2ev_mul32+0x106>
movl   $0xffffffff,-0x4(%rbp)
jmp    121d <t2ev_mul32+0x10d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t2ev_mul32>:
push   %rbx
mov    %edi,%r8d
mov    %edi,%r9d
shr    $0xc,%r9d
and    $0xf,%r9d
mov    %edi,%eax
and    $0x7000f0,%eax
cmp    $0x10,%eax
je     1167 <t2ev_mul32+0x57>
mov    $0xffffffff,%ebx
test   %eax,%eax
jne    119b <t2ev_mul32+0x8b>
mov    %r8d,%edx
shr    $0x8,%edx
and    $0xf,%edx
mov    %r8d,%eax
shr    $0x10,%eax
and    $0xf,%eax
and    $0xf,%r8d
cmp    $0xf,%r9d
jne    1186 <t2ev_mul32+0x76>
lea    0xea9(%rip),%rsi
xor    %ebx,%ebx
mov    %rcx,%rdi
mov    %eax,%ecx
xor    %eax,%eax
call   1030 <sprintf@plt>
jmp    119b <t2ev_mul32+0x8b>
mov    %r8d,%edx
shr    $0x8,%edx
and    $0xf,%edx
mov    %r8d,%eax
shr    $0x10,%eax
and    $0xf,%eax
and    $0xf,%r8d
lea    0xea5(%rip),%rsi
jmp    118d <t2ev_mul32+0x7d>
lea    0xe85(%rip),%rsi
xor    %ebx,%ebx
mov    %rcx,%rdi
mov    %eax,%ecx
xor    %eax,%eax
call   1030 <sprintf@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.arm_instruction = type { i32 }
@.str = [18 x i8] c"MUL\09r%d, r%d, r%d\00"
@.str.1 = [23 x i8] c"MLA\09r%d, r%d, r%d, r%d\00"
@.str.2 = [23 x i8] c"MLS\09r%d, r%d, r%d, r%d\00"
define i32 @t2ev_mul32(i32 %0, i32 %1, %struct.arm_instruction* %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca %struct.arm_instruction*
%9 = alloca i8*
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store %struct.arm_instruction* %2, %struct.arm_instruction** %8
store i8* %3, i8** %9
%11 = load i32, i32* %6
%12 = lshr i32 %11, 12
%13 = and i32 %12, 15
store i32 %13, i32* %10
%14 = load i32, i32* %6
%15 = and i32 %14, 7340272
switch i32 %15, label %58 [
i32 0, label %16
i32 16, label %45
]
16: ; preds = %4
%17 = load i32, i32* %10
%18 = icmp eq i32 %17, 15
br i1 %18, label %19, label %31
19: ; preds = %16
%20 = load i8*, i8** %9
%21 = load i32, i32* %6
%22 = lshr i32 %21, 8
%23 = and i32 %22, 15
%24 = load i32, i32* %6
%25 = lshr i32 %24, 16
%26 = and i32 %25, 15
%27 = load i32, i32* %6
%28 = lshr i32 %27, 0
%29 = and i32 %28, 15
%30 = call i32 (i8*, i8*, i32, i32, i32, ...) @sprintf(i8* %20, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %23, i32 %26, i32 %29)
br label %44
31: ; preds = %16
%32 = load i8*, i8** %9
%33 = load i32, i32* %6
%34 = lshr i32 %33, 8
%35 = and i32 %34, 15
%36 = load i32, i32* %6
%37 = lshr i32 %36, 16
%38 = and i32 %37, 15
%39 = load i32, i32* %6
%40 = lshr i32 %39, 0
%41 = and i32 %40, 15
%42 = load i32, i32* %10
%43 = call i32 (i8*, i8*, i32, i32, i32, ...) @sprintf(i8* %32, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i32 %35, i32 %38, i32 %41, i32 %42)
br label %44
44: ; preds = %31, %19
br label %59
45: ; preds = %4
%46 = load i8*, i8** %9
%47 = load i32, i32* %6
%48 = lshr i32 %47, 8
%49 = and i32 %48, 15
%50 = load i32, i32* %6
%51 = lshr i32 %50, 16
%52 = and i32 %51, 15
%53 = load i32, i32* %6
%54 = lshr i32 %53, 0
%55 = and i32 %54, 15
%56 = load i32, i32* %10
%57 = call i32 (i8*, i8*, i32, i32, i32, ...) @sprintf(i8* %46, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.2, i64 0, i64 0), i32 %49, i32 %52, i32 %55, i32 %56)
br label %59
58: ; preds = %4
store i32 -1, i32* %5
br label %60
59: ; preds = %45, %44
store i32 0, i32* %5
br label %60
60: ; preds = %59, %58
%61 = load i32, i32* %5
ret i32 %61
}

LLVM IR (-O2):
%struct.arm_instruction = type { i32 }
@.str = [18 x i8] c"MUL\09r%d, r%d, r%d\00"
@.str.1 = [23 x i8] c"MLA\09r%d, r%d, r%d, r%d\00"
@.str.2 = [23 x i8] c"MLS\09r%d, r%d, r%d, r%d\00"
define i32 @t2ev_mul32(i32 %0, i32 %1, %struct.arm_instruction* nocapture readnone %2, i8* nocapture writeonly %3) {
%5 = lshr i32 %0, 12
%6 = and i32 %5, 15
%7 = and i32 %0, 7340272
switch i32 %7, label %26 [
i32 0, label %8
i32 16, label %19
]
8: ; preds = %4
%9 = icmp eq i32 %6, 15
%10 = lshr i32 %0, 8
%11 = and i32 %10, 15
%12 = lshr i32 %0, 16
%13 = and i32 %12, 15
%14 = and i32 %0, 15
br i1 %9, label %15, label %17
15: ; preds = %8
%16 = tail call i32 (i8*, i8*, i32, i32, i32, ...) @sprintf(i8* dereferenceable(1) %3, i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %11, i32 %13, i32 %14)
br label %26
17: ; preds = %8
%18 = tail call i32 (i8*, i8*, i32, i32, i32, ...) @sprintf(i8* dereferenceable(1) %3, i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i32 %11, i32 %13, i32 %14, i32 %6)
br label %26
19: ; preds = %4
%20 = lshr i32 %0, 8
%21 = and i32 %20, 15
%22 = lshr i32 %0, 16
%23 = and i32 %22, 15
%24 = and i32 %0, 15
%25 = tail call i32 (i8*, i8*, i32, i32, i32, ...) @sprintf(i8* dereferenceable(1) %3, i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @.str.2, i64 0, i64 0), i32 %21, i32 %23, i32 %24, i32 %6)
br label %26
26: ; preds = %19, %17, %15, %4
%27 = phi i32 [ -1, %4 ], [ 0, %15 ], [ 0, %17 ], [ 0, %19 ]
ret i32 %27
}