xunge/DecIR huggingface dataset:
unsigned xrop3_241_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D | S;
  stk2 = ~stk2;
  stk1 = T | stk2;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_241_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
or     -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_241_0_0>:
mov    %esi,%eax
shl    $0x8,%eax
or     %esi,%eax
not    %edi
shl    $0x8,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_241_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %6
%24 = or i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %9
%26 = xor i32 %25, -1
store i32 %26, i32* %9
%27 = load i32, i32* %7
%28 = load i32, i32* %9
%29 = or i32 %27, %28
store i32 %29, i32* %8
%30 = load i32, i32* %8
ret i32 %30
}

LLVM IR (-O2):
define i32 @xrop3_241_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = zext i8 %1 to i32
%5 = mul nuw nsw i32 %4, 257
%6 = xor i32 %3, -1
%7 = shl nsw i32 %6, 8
%8 = or i32 %5, %7
ret i32 %8
}
__attribute__((always_, unused)) unsigned char inb(unsigned short port) {
  unsigned char value;
  asm volatile("inb %1, %0" : "=a"(value) : "Nd"(port));
  return value;
}


x86 assembly (clang, -O0):
<inb>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%al
mov    %al,-0x3(%rbp)
movzbl -0x3(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inb>:
mov    %edi,%edx
in     (%dx),%al
ret

LLVM IR (-O0):
define zeroext i8 @inb(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i8
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i8 asm sideeffect "inb $1, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i8 %5, i8* %3
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @inb(i16 zeroext %0) {
%2 = tail call i8 asm sideeffect "inb $1, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i8 %2
}
unsigned int loop07(int n) {
  static unsigned int ucnt = 0;
  if (n > 0) {
    ucnt++;
    n /= 2;
    loop07(n);
    loop07(n);
  }
  return ucnt;
}


x86 assembly (clang, -O0):
<loop07>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1152 <loop07+0x42>
mov    0x2f01(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2ef8(%rip)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <loop07@plt>
mov    -0x4(%rbp),%edi
call   1030 <loop07@plt>
mov    0x2ed4(%rip),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loop07>:
push   %rbx
test   %edi,%edi
jle    112e <loop07+0x1e>
mov    %edi,%ebx
addl   $0x1,0x2f0e(%rip)
shr    %ebx
mov    %ebx,%edi
call   1030 <loop07@plt>
mov    %ebx,%edi
call   1030 <loop07@plt>
mov    0x2ef8(%rip),%eax
pop    %rbx
ret

LLVM IR (-O0):
@loop07.ucnt = internal global i32 0
define i32 @loop07(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %14
5: ; preds = %1
%6 = load i32, i32* @loop07.ucnt
%7 = add i32 %6, 1
store i32 %7, i32* @loop07.ucnt
%8 = load i32, i32* %2
%9 = sdiv i32 %8, 2
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = call i32 @loop07(i32 %10)
%12 = load i32, i32* %2
%13 = call i32 @loop07(i32 %12)
br label %14
14: ; preds = %5, %1
%15 = load i32, i32* @loop07.ucnt
ret i32 %15
}

LLVM IR (-O2):
@loop07.ucnt = internal unnamed_addr global i32 0
define i32 @loop07(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %9
3: ; preds = %1
%4 = load i32, i32* @loop07.ucnt
%5 = add i32 %4, 1
store i32 %5, i32* @loop07.ucnt
%6 = lshr i32 %0, 1
%7 = tail call i32 @loop07(i32 %6)
%8 = tail call i32 @loop07(i32 %6)
br label %9
9: ; preds = %3, %1
%10 = load i32, i32* @loop07.ucnt
ret i32 %10
}
/* Type definitions */
struct timeval {
  long tv_sec;
  double tv_usec;
};

/* Variables and functions */
void sectotv(double sec, struct timeval *tv) {
  long floor = (long)sec;
  tv->tv_sec = floor;
  tv->tv_usec = (sec - floor) * 1000 * 1000;
}


x86 assembly (clang, -O0):
<sectotv>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
cvttsd2si -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
movsd  -0x8(%rbp),%xmm0
cvtsi2sdq -0x18(%rbp),%xmm1
subsd  %xmm1,%xmm0
movsd  0xec7(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xebb(%rip),%xmm1
mulsd  %xmm1,%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sectotv>:
cvttsd2si %xmm0,%rax
mov    %rax,(%rdi)
cvtsi2sd %rax,%xmm1
subsd  %xmm1,%xmm0
movsd  0xee7(%rip),%xmm1
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,0x8(%rdi)
ret

LLVM IR (-O0):
%struct.timeval = type { i64, double }
define void @sectotv(double %0, %struct.timeval* %1) {
%3 = alloca double
%4 = alloca %struct.timeval*
%5 = alloca i64
store double %0, double* %3
store %struct.timeval* %1, %struct.timeval** %4
%6 = load double, double* %3
%7 = fptosi double %6 to i64
store i64 %7, i64* %5
%8 = load i64, i64* %5
%9 = load %struct.timeval*, %struct.timeval** %4
%10 = getelementptr inbounds %struct.timeval, %struct.timeval* %9, i32 0, i32 0
store i64 %8, i64* %10
%11 = load double, double* %3
%12 = load i64, i64* %5
%13 = sitofp i64 %12 to double
%14 = fsub double %11, %13
%15 = fmul double %14, 1.000000e+03
%16 = fmul double %15, 1.000000e+03
%17 = load %struct.timeval*, %struct.timeval** %4
%18 = getelementptr inbounds %struct.timeval, %struct.timeval* %17, i32 0, i32 1
store double %16, double* %18
ret void
}

LLVM IR (-O2):
%struct.timeval = type { i64, double }
define void @sectotv(double %0, %struct.timeval* nocapture writeonly %1) {
%3 = fptosi double %0 to i64
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
store i64 %3, i64* %4
%5 = sitofp i64 %3 to double
%6 = fsub double %0, %5
%7 = fmul double %6, 1.000000e+03
%8 = fmul double %7, 1.000000e+03
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
store double %8, double* %9
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
scalar_t__ system(char *);
void test_subprocess(void) { assert(system("./test sub") == 0); }


x86 assembly (clang, -O0):
<test_subprocess>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <system@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_subprocess>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <system@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
pop    %rax
jmp    1040 <assert@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"./test sub\00"
define void @test_subprocess() {
%1 = call i64 @system(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @assert(i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"./test sub\00"
define void @test_subprocess() {
%1 = tail call i64 @system(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
ret void
}
/* Variables and functions */
int atoi(char *);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ towers(int, char, char, char);
int main(int argc, char *argv[]) {
  int ndisk;
  if (argc < 2)
    ndisk = 3;
  else
    ndisk = atoi(argv[1]);
  towers(ndisk, 'A', 'B', 'C');
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    115c <main+0x2c>
movl   $0x3,-0x14(%rbp)
jmp    116c <main+0x3c>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <atoi@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    $0x41,%esi
mov    $0x42,%edx
mov    $0x43,%ecx
call   1050 <towers@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    %edi,%eax
mov    $0x3,%edi
cmp    $0x2,%eax
jl     1148 <main+0x18>
mov    0x8(%rsi),%rdi
call   1030 <atoi@plt>
mov    %eax,%edi
mov    $0x41,%esi
mov    $0x42,%edx
mov    $0x43,%ecx
call   1050 <towers@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 2
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 3, i32* %6
br label %15
10: ; preds = %2
%11 = load i8**, i8*** %5
%12 = getelementptr inbounds i8*, i8** %11, i64 1
%13 = load i8*, i8** %12
%14 = call i32 @atoi(i8* %13)
store i32 %14, i32* %6
br label %15
15: ; preds = %10, %9
%16 = load i32, i32* %6
%17 = call i32 @towers(i32 %16, i8 signext 65, i8 signext 66, i8 signext 67)
%18 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = tail call i32 @atoi(i8* %6)
br label %8
8: ; preds = %2, %4
%9 = phi i32 [ %7, %4 ], [ 3, %2 ]
%10 = tail call i32 @towers(i32 %9, i8 signext 65, i8 signext 66, i8 signext 67)
%11 = tail call i32 @exit(i32 0)
unreachable
}
void mem_cgroup_end_migration(struct page *page) {}


x86 assembly (clang, -O0):
<mem_cgroup_end_migration>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_cgroup_end_migration>:
ret

LLVM IR (-O0):
%struct.page = type opaque
define void @mem_cgroup_end_migration(%struct.page* %0) {
%2 = alloca %struct.page*
store %struct.page* %0, %struct.page** %2
ret void
}

LLVM IR (-O2):
%struct.page = type opaque
define void @mem_cgroup_end_migration(%struct.page* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ writeCommand(char *);
void controlDisable(void) { writeCommand("CRD"); }


x86 assembly (clang, -O0):
<controlDisable>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <writeCommand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<controlDisable>:
lea    0xee9(%rip),%rdi
jmp    1030 <writeCommand@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"CRD\00"
define void @controlDisable() {
%1 = call i32 @writeCommand(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"CRD\00"
define void @controlDisable() {
%1 = tail call i32 @writeCommand(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}
int islb(char *p) { return *p == '\n' || *p == '\r'; }


x86 assembly (clang, -O0):
<islb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
mov    $0x1,%al
cmp    $0xa,%ecx
mov    %al,-0x9(%rbp)
je     112d <islb+0x2d>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xd,%eax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<islb>:
mov    (%rdi),%al
cmp    $0xa,%al
sete   %cl
cmp    $0xd,%al
sete   %al
or     %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @islb(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 10
br i1 %6, label %12, label %7
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 13
br label %12
12: ; preds = %7, %1
%13 = phi i1 [ true, %1 ], [ %11, %7 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @islb(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 10
%4 = icmp eq i8 %2, 13
%5 = or i1 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
int sys_chdir(int fd, const char *path) {}


x86 assembly (clang, -O0):
<sys_chdir>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_chdir>:
ret

LLVM IR (-O0):
define i32 @sys_chdir(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @sys_chdir(i32 %0, i8* nocapture readnone %1) {
ret i32 undef
}
int main(void) {
  short x;
  short *p = &x;
  x = (short)p;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
lea    -0x6(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %ax,-0x6(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i16
%3 = alloca i16*
store i32 0, i32* %1
store i16* %2, i16** %3
%4 = load i16*, i16** %3
%5 = ptrtoint i16* %4 to i16
store i16 %5, i16* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void I422ToYUY2Row_NEON() {}


x86 assembly (clang, -O0):
<I422ToYUY2Row_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I422ToYUY2Row_NEON>:
ret

LLVM IR (-O0):
define void @I422ToYUY2Row_NEON() {
ret void
}

LLVM IR (-O2):
define void @I422ToYUY2Row_NEON() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ send_exchange_data();
int main() {
  send_exchange_data();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <send_exchange_data@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <send_exchange_data@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @send_exchange_data()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @send_exchange_data()
ret i32 0
}
int fun871() { return 871; }


x86 assembly (clang, -O0):
<fun871>:
push   %rbp
mov    %rsp,%rbp
mov    $0x367,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun871>:
mov    $0x367,%eax
ret

LLVM IR (-O0):
define i32 @fun871() {
ret i32 871
}

LLVM IR (-O2):
define i32 @fun871() {
ret i32 871
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M451_f(char *s) {
  debug("M451_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M451_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M451_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M451_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M451_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M451_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M451_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
/* Type definitions */
typedef int /*<<< orphan*/ volatile uint32_t;

/* Variables and functions */
uint32_t HibernateRTCTrimGet(void) {
  return ((*((volatile uint32_t *)(0x400FC024))));
}


x86 assembly (clang, -O0):
<HibernateRTCTrimGet>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400fc024,%eax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateRTCTrimGet>:
mov    0x400fc024,%eax
ret

LLVM IR (-O0):
define i32 @HibernateRTCTrimGet() {
%1 = load volatile i32, i32* inttoptr (i64 1074774052 to i32*)
ret i32 %1
}

LLVM IR (-O2):
define i32 @HibernateRTCTrimGet() {
%1 = load volatile i32, i32* inttoptr (i64 1074774052 to i32*)
ret i32 %1
}
/* Type definitions */
typedef char *int64_t;

/* Variables and functions */
int64_t zero_sub64(int64_t in) {
  int64_t out;
  asm("sub %%rax, %%rbx" : "=b"(out) : "a"(in), "0"(0));
  return out;
}


x86 assembly (clang, -O0):
<zero_sub64>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%ebx
sub    %rax,%rbx
mov    %rbx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<zero_sub64>:
push   %rbx
mov    %rdi,%rax
xor    %ebx,%ebx
sub    %rax,%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @zero_sub64(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* asm "sub %rax, %rbx", "={bx},{ax},0,~{dirflag},~{fpsr},~{flags}"(i8* %4, i64 0)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
ret i8* %6
}

LLVM IR (-O2):
define i8* @zero_sub64(i8* readnone %0) {
%2 = tail call i8* asm "sub %rax, %rbx", "={bx},{ax},0,~{dirflag},~{fpsr},~{flags}"(i8* %0, i64 0)
ret i8* %2
}
/* Variables and functions */
scalar_t__ is_attr_val(char const);
char *skip_attr_val(const char *s, int sz) {
  while (sz > 0 && is_attr_val(*s)) {
    s++;
    sz--;
  }
  return (char *)s;
}


x86 assembly (clang, -O0):
<skip_attr_val>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0xc(%rbp)
mov    %al,-0xd(%rbp)
jle    1144 <skip_attr_val+0x34>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <is_attr_val@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1154 <skip_attr_val+0x44>
jmp    116e <skip_attr_val+0x5e>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    111f <skip_attr_val+0xf>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_attr_val>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
test   %esi,%esi
jle    1139 <skip_attr_val+0x29>
mov    %esi,%ebp
add    $0x1,%ebp
nop
movsbl (%rbx),%edi
call   1030 <is_attr_val@plt>
test   %rax,%rax
je     1139 <skip_attr_val+0x29>
add    $0x1,%rbx
add    $0xffffffff,%ebp
cmp    $0x1,%ebp
jg     1120 <skip_attr_val+0x10>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @skip_attr_val(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %15, %2
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %5
%9 = load i8*, i8** %3
%10 = load i8, i8* %9
%11 = call i64 @is_attr_val(i8 signext %10)
%12 = icmp ne i64 %11, 0
br label %13
13: ; preds = %8, %5
%14 = phi i1 [ false, %5 ], [ %12, %8 ]
br i1 %14, label %15, label %20
15: ; preds = %13
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %3
%18 = load i32, i32* %4
%19 = add nsw i32 %18, -1
store i32 %19, i32* %4
br label %5
20: ; preds = %13
%21 = load i8*, i8** %3
ret i8* %21
}

LLVM IR (-O2):
define i8* @skip_attr_val(i8* %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %14
4: ; preds = %2, %10
%5 = phi i32 [ %12, %10 ], [ %1, %2 ]
%6 = phi i8* [ %11, %10 ], [ %0, %2 ]
%7 = load i8, i8* %6
%8 = tail call i64 @is_attr_val(i8 signext %7)
%9 = icmp eq i64 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %4
%11 = getelementptr inbounds i8, i8* %6, i64 1
%12 = add nsw i32 %5, -1
%13 = icmp sgt i32 %5, 1
br i1 %13, label %4, label %14
14: ; preds = %4, %10, %2
%15 = phi i8* [ %0, %2 ], [ %11, %10 ], [ %6, %4 ]
ret i8* %15
}
/* Variables and functions */
scalar_t__ strncmp(char *, char *, int);
int /*<<< orphan*/ system(char *);
int main(int argc, char *argv[]) {
  if (strncmp(argv[1], "gcc", 3) == 0) {
    system("bash -c /usr/local/scripts/iPorts/gcc/install.sh");
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
lea    0xebb(%rip),%rsi
mov    $0x3,%edx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
jne    1165 <main+0x45>
lea    0xea4(%rip),%rdi
call   1040 <system@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rdi
lea    0xed4(%rip),%rsi
mov    $0x3,%edx
call   1030 <strncmp@plt>
test   %rax,%rax
jne    1147 <main+0x27>
lea    0xec2(%rip),%rdi
call   1040 <system@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"gcc\00"
@.str.1 = [49 x i8] c"bash -c /usr/local/scripts/iPorts/gcc/install.sh\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %5
%7 = getelementptr inbounds i8*, i8** %6, i64 1
%8 = load i8*, i8** %7
%9 = call i64 @strncmp(i8* %8, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 3)
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = call i32 @system(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str.1, i64 0, i64 0))
br label %13
13: ; preds = %11, %2
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
@.str = [4 x i8] c"gcc\00"
@.str.1 = [49 x i8] c"bash -c /usr/local/scripts/iPorts/gcc/install.sh\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i64 @strncmp(i8* %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 3)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = tail call i32 @system(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str.1, i64 0, i64 0))
br label %9
9: ; preds = %7, %2
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
unsigned int be8get(void *p, uint8_t *v) {
  uint8_t *a;
  a = p;
  *v = a[0];
  return 1;
}


x86 assembly (clang, -O0):
<be8get>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<be8get>:
mov    (%rdi),%eax
mov    %eax,(%rsi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @be8get(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %5
%8 = load i32*, i32** %5
%9 = getelementptr inbounds i32, i32* %8, i64 0
%10 = load i32, i32* %9
%11 = load i32*, i32** %4
store i32 %10, i32* %11
ret i32 1
}

LLVM IR (-O2):
define i32 @be8get(i8* nocapture %0, i32* nocapture writeonly %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
store i32 %4, i32* %1
ret i32 1
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ u_decode(char const **, char const *, char const *);
int u_decode_n(uint32_t *result, const char *u, size_t n) {
  const char *q;
  *result = u_decode(&q, u, u + n);
  return (int)(q - u);
}


x86 assembly (clang, -O0):
<u_decode_n>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x10(%rbp),%rdx
add    -0x18(%rbp),%rdx
lea    -0x20(%rbp),%rdi
call   1030 <u_decode@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<u_decode_n>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
add    %rsi,%rdx
mov    %rsp,%rdi
call   1030 <u_decode@plt>
mov    %eax,(%r14)
mov    (%rsp),%eax
sub    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @u_decode_n(i32* %0, i8* %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
store i32* %0, i32** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i8*, i8** %5
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = getelementptr inbounds i8, i8* %9, i64 %10
%12 = call i32 @u_decode(i8** %7, i8* %8, i8* %11)
%13 = load i32*, i32** %4
store i32 %12, i32* %13
%14 = load i8*, i8** %7
%15 = load i8*, i8** %5
%16 = ptrtoint i8* %14 to i64
%17 = ptrtoint i8* %15 to i64
%18 = sub i64 %16, %17
%19 = trunc i64 %18 to i32
ret i32 %19
}

LLVM IR (-O2):
define i32 @u_decode_n(i32* nocapture writeonly %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = bitcast i8** %4 to i8*
%6 = getelementptr inbounds i8, i8* %1, i64 %2
%7 = call i32 @u_decode(i8** %4, i8* %1, i8* %6)
store i32 %7, i32* %0
%8 = load i8*, i8** %4
%9 = ptrtoint i8* %8 to i64
%10 = ptrtoint i8* %1 to i64
%11 = sub i64 %9, %10
%12 = trunc i64 %11 to i32
ret i32 %12
}
/* Variables and functions */
bool vf_noop(void) { return true; }


x86 assembly (clang, -O0):
<vf_noop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vf_noop>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @vf_noop() {
ret i32 1
}

LLVM IR (-O2):
define i32 @vf_noop() {
ret i32 1
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ fork();
int getpid();
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  printf("my pid is %d\n", getpid());
  fork();
  fork();
  fork();
  printf("my pid is %d\n", getpid());
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,%esi
lea    0xeb1(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <fork@plt>
mov    $0x0,%al
call   1050 <fork@plt>
mov    $0x0,%al
call   1050 <fork@plt>
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,%esi
lea    0xe87(%rip),%rdi
call   1040 <printf@plt>
mov    0x2e5b(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xec1(%rip),%rbx
mov    %rbx,%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
call   1050 <fork@plt>
xor    %eax,%eax
call   1050 <fork@plt>
xor    %eax,%eax
call   1050 <fork@plt>
xor    %eax,%eax
call   1030 <getpid@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1040 <printf@plt>
mov    0x2e6a(%rip),%rax
mov    (%rax),%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"my pid is %d\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @getpid()
%3 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = call i32 (...) @fork()
%5 = call i32 (...) @fork()
%6 = call i32 (...) @fork()
%7 = call i32 (...) @getpid()
%8 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = load i32, i32* @EXIT_SUCCESS
ret i32 %9
}

LLVM IR (-O2):
@.str = [14 x i8] c"my pid is %d\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 (...) @getpid()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 (...) @fork()
%4 = tail call i32 (...) @fork()
%5 = tail call i32 (...) @fork()
%6 = tail call i32 (...) @getpid()
%7 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = load i32, i32* @EXIT_SUCCESS
ret i32 %8
}
/* Type definitions */
struct timeval {
  long long tv_usec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
long long tv2us(struct timeval *ptv) {
  return ((((long long)ptv->tv_sec) * 1000000) + ptv->tv_usec);
}


x86 assembly (clang, -O0):
<tv2us>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
imul   $0xf4240,0x8(%rax),%rax
mov    -0x8(%rbp),%rcx
add    (%rcx),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tv2us>:
imul   $0xf4240,0x8(%rdi),%rax
add    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.timeval = type { i64, i64 }
define i64 @tv2us(%struct.timeval* %0) {
%2 = alloca %struct.timeval*
store %struct.timeval* %0, %struct.timeval** %2
%3 = load %struct.timeval*, %struct.timeval** %2
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i32 0, i32 1
%5 = load i64, i64* %4
%6 = mul nsw i64 %5, 1000000
%7 = load %struct.timeval*, %struct.timeval** %2
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %7, i32 0, i32 0
%9 = load i64, i64* %8
%10 = add nsw i64 %6, %9
ret i64 %10
}

LLVM IR (-O2):
%struct.timeval = type { i64, i64 }
define i64 @tv2us(%struct.timeval* nocapture %0) {
%2 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
%3 = load i64, i64* %2
%4 = mul nsw i64 %3, 1000000
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
%6 = load i64, i64* %5
%7 = add nsw i64 %4, %6
ret i64 %7
}
int no_action(void *dummy) { return 0; }


x86 assembly (clang, -O0):
<no_action>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<no_action>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @no_action(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @no_action(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int *_zero_arr_plus_int_fn(int *, int, int, char const *, unsigned int);
int *_zero_arr_inplace_plus_post_int_fn(int **x, int orig_i,
                                        const char *filename, unsigned lineno) {
  int *_zap_res = *x;
  *x = _zero_arr_plus_int_fn(_zap_res, 1, orig_i, filename, lineno);
  return _zap_res;
}


x86 assembly (clang, -O0):
<_zero_arr_inplace_plus_post_int_fn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    -0x1c(%rbp),%r8d
mov    $0x1,%esi
call   1030 <_zero_arr_plus_int_fn@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x28(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_zero_arr_inplace_plus_post_int_fn>:
push   %r14
push   %rbx
push   %rax
mov    %ecx,%r8d
mov    %rdx,%rcx
mov    %esi,%edx
mov    %rdi,%rbx
mov    (%rdi),%r14
mov    %r14,%rdi
mov    $0x1,%esi
call   1030 <_zero_arr_plus_int_fn@plt>
mov    %rax,(%rbx)
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32* @_zero_arr_inplace_plus_post_int_fn(i32** %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i32**
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32*
store i32** %0, i32*** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%10 = load i32**, i32*** %5
%11 = load i32*, i32** %10
store i32* %11, i32** %9
%12 = load i32*, i32** %9
%13 = load i32, i32* %6
%14 = load i8*, i8** %7
%15 = load i32, i32* %8
%16 = call i32* @_zero_arr_plus_int_fn(i32* %12, i32 1, i32 %13, i8* %14, i32 %15)
%17 = load i32**, i32*** %5
store i32* %16, i32** %17
%18 = load i32*, i32** %9
ret i32* %18
}

LLVM IR (-O2):
define i32* @_zero_arr_inplace_plus_post_int_fn(i32** nocapture %0, i32 %1, i8* %2, i32 %3) {
%5 = load i32*, i32** %0
%6 = tail call i32* @_zero_arr_plus_int_fn(i32* %5, i32 1, i32 %1, i8* %2, i32 %3)
store i32* %6, i32** %0
ret i32* %5
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int write_standard_target_system(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(12, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<write_standard_target_system>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0xc,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_standard_target_system>:
mov    $0xc,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @write_standard_target_system() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 12, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @write_standard_target_system() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 12, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
double f4(double x) { return x * x * x - 2 * x * x - 4 * x + 8; }


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm1
mulsd  -0x8(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm2
movsd  0xef0(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
movsd  -0x8(%rbp),%xmm0
movsd  0xeb2(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xe9a(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
movapd %xmm0,%xmm1
mulsd  %xmm0,%xmm1
movsd  0xef0(%rip),%xmm2
mulsd  %xmm0,%xmm2
mulsd  %xmm0,%xmm2
mulsd  %xmm0,%xmm1
mulsd  0xee4(%rip),%xmm0
addsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
addsd  0xedc(%rip),%xmm0
ret

LLVM IR (-O0):
define double @f4(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
%6 = load double, double* %2
%7 = load double, double* %2
%8 = fmul double 2.000000e+00, %7
%9 = load double, double* %2
%10 = fmul double %8, %9
%11 = fneg double %10
%12 = call double @llvm.fmuladd.f64(double %5, double %6, double %11)
%13 = load double, double* %2
%14 = call double @llvm.fmuladd.f64(double -4.000000e+00, double %13, double %12)
%15 = fadd double %14, 8.000000e+00
ret double %15
}

LLVM IR (-O2):
define double @f4(double %0) {
%2 = fmul double %0, %0
%3 = fmul double %0, -2.000000e+00
%4 = fmul double %3, %0
%5 = tail call double @llvm.fmuladd.f64(double %2, double %0, double %4)
%6 = tail call double @llvm.fmuladd.f64(double %0, double -4.000000e+00, double %5)
%7 = fadd double %6, 8.000000e+00
ret double %7
}
/* Variables and functions */
float floorf(float);
void vec2_floor(float *dst) {
  dst[0] = floorf(dst[0]);
  dst[1] = floorf(dst[1]);
}


x86 assembly (clang, -O0):
<vec2_floor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
call   1030 <floorf@plt>
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm0
call   1030 <floorf@plt>
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec2_floor>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movss  (%rdi),%xmm0
movss  0x4(%rdi),%xmm1
movss  %xmm1,0xc(%rsp)
call   1030 <floorf@plt>
movss  %xmm0,(%rbx)
movss  0xc(%rsp),%xmm0
call   1030 <floorf@plt>
movss  %xmm0,0x4(%rbx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @vec2_floor(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 0
%5 = load float, float* %4
%6 = call float @llvm.floor.f32(float %5)
%7 = load float*, float** %2
%8 = getelementptr inbounds float, float* %7, i64 0
store float %6, float* %8
%9 = load float*, float** %2
%10 = getelementptr inbounds float, float* %9, i64 1
%11 = load float, float* %10
%12 = call float @llvm.floor.f32(float %11)
%13 = load float*, float** %2
%14 = getelementptr inbounds float, float* %13, i64 1
store float %12, float* %14
ret void
}

LLVM IR (-O2):
define void @vec2_floor(float* nocapture %0) {
%2 = load float, float* %0
%3 = tail call float @llvm.floor.f32(float %2)
store float %3, float* %0
%4 = getelementptr inbounds float, float* %0, i64 1
%5 = load float, float* %4
%6 = tail call float @llvm.floor.f32(float %5)
store float %6, float* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int func_c(char arg) {
  printf("func_c\n");
  return 2;
}


x86 assembly (clang, -O0):
<func_c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
mov    $0x2,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_c>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x2,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"func_c\0A\00"
define i32 @func_c(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 2
}

LLVM IR (-O2):
@str = [7 x i8] c"func_c\00"
define i32 @func_c(i8 signext %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
ret i32 2
}
void cbor_null_indef_array_start_callback(void *_ctx) {}


x86 assembly (clang, -O0):
<cbor_null_indef_array_start_callback>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbor_null_indef_array_start_callback>:
ret

LLVM IR (-O0):
define void @cbor_null_indef_array_start_callback(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @cbor_null_indef_array_start_callback(i8* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ stdout;
int vfprintf(int /*<<< orphan*/, char const *, int /*<<< orphan*/);
int vprintf(const char *format, va_list ap) {
  return vfprintf(stdout, format, ap);
}


x86 assembly (clang, -O0):
<vprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <vfprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vprintf>:
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2ec4(%rip),%rax
mov    (%rax),%edi
jmp    1030 <vfprintf@plt>

LLVM IR (-O0):
@stdout = global i32 0
define i32 @vprintf(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stdout
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @vfprintf(i32 %5, i8* %6, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
@stdout = global i32 0
define i32 @vprintf(i8* %0, i32 %1) {
%3 = load i32, i32* @stdout
%4 = tail call i32 @vfprintf(i32 %3, i8* %0, i32 %1)
ret i32 %4
}
int spc_state(char line[], int i) {
  while (line[i] == ' ') {
    ++i;
  }
  return i;
}


x86 assembly (clang, -O0):
<spc_state>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x20,%eax
jne    112e <spc_state+0x2e>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110b <spc_state+0xb>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spc_state>:
movslq %esi,%rcx
lea    -0x1(%rcx),%eax
add    %rcx,%rdi
nopl   0x0(%rax)
add    $0x1,%eax
cmpb   $0x20,(%rdi)
lea    0x1(%rdi),%rdi
je     1110 <spc_state+0x10>
ret

LLVM IR (-O0):
define i32 @spc_state(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %13, %2
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 32
br i1 %12, label %13, label %16
13: ; preds = %5
%14 = load i32, i32* %4
%15 = add nsw i32 %14, 1
store i32 %15, i32* %4
br label %5
16: ; preds = %5
%17 = load i32, i32* %4
ret i32 %17
}

LLVM IR (-O2):
define i32 @spc_state(i8* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
br label %4
4: ; preds = %4, %2
%5 = phi i64 [ %9, %4 ], [ %3, %2 ]
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 32
%9 = add i64 %5, 1
br i1 %8, label %4, label %10
10: ; preds = %4
%11 = trunc i64 %5 to i32
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ _pmu(int);
int pigpio_command(int, int, unsigned int, size_t, int /*<<< orphan*/);
int recvMax(int, void *, size_t, int);
int bb_serial_read(int pi, unsigned user_gpio, void *buf, size_t bufSize) {
  int bytes;
  bytes = pigpio_command(pi, 43, user_gpio, bufSize, 0);
  if (bytes > 0) {
    bytes = recvMax(pi, buf, bufSize, bytes);
  }
  _pmu(pi);
  return bytes;
}


x86 assembly (clang, -O0):
<bb_serial_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    $0x2b,%esi
xor    %r8d,%r8d
call   1040 <pigpio_command@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jle    1180 <bb_serial_read+0x50>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1050 <recvMax@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_pmu@plt>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bb_serial_read>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rcx,%r14
mov    %rdx,%r15
mov    %esi,%edx
mov    %edi,%ebx
mov    $0x2b,%esi
xor    %r8d,%r8d
call   1040 <pigpio_command@plt>
mov    %eax,%ebp
test   %eax,%eax
jle    1165 <bb_serial_read+0x35>
mov    %ebx,%edi
mov    %r15,%rsi
mov    %r14,%rdx
mov    %ebp,%ecx
call   1050 <recvMax@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1030 <_pmu@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @bb_serial_read(i32 %0, i32 %1, i8* %2, i64 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = load i64, i64* %8
%13 = call i32 @pigpio_command(i32 %10, i32 43, i32 %11, i64 %12, i32 0)
store i32 %13, i32* %9
%14 = load i32, i32* %9
%15 = icmp sgt i32 %14, 0
br i1 %15, label %16, label %22
16: ; preds = %4
%17 = load i32, i32* %5
%18 = load i8*, i8** %7
%19 = load i64, i64* %8
%20 = load i32, i32* %9
%21 = call i32 @recvMax(i32 %17, i8* %18, i64 %19, i32 %20)
store i32 %21, i32* %9
br label %22
22: ; preds = %16, %4
%23 = load i32, i32* %5
%24 = call i32 @_pmu(i32 %23)
%25 = load i32, i32* %9
ret i32 %25
}

LLVM IR (-O2):
define i32 @bb_serial_read(i32 %0, i32 %1, i8* %2, i64 %3) {
%5 = tail call i32 @pigpio_command(i32 %0, i32 43, i32 %1, i64 %3, i32 0)
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = tail call i32 @recvMax(i32 %0, i8* %2, i64 %3, i32 %5)
br label %9
9: ; preds = %7, %4
%10 = phi i32 [ %8, %7 ], [ %5, %4 ]
%11 = tail call i32 @_pmu(i32 %0)
ret i32 %10
}
void f_long(long b) { f_long(0); }


x86 assembly (clang, -O0):
<f_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1030 <f_long@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_long>:
jmp    1100 <f_long>

LLVM IR (-O0):
define void @f_long(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret void
}

LLVM IR (-O2):
define void @f_long(i64 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int fw_is_complete(uint8_t *data, int len) {
  return (len >= 3) && (data[1] <= len - 2);
}


x86 assembly (clang, -O0):
<fw_is_complete>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x3,-0xc(%rbp)
mov    %al,-0xd(%rbp)
jl     112f <fw_is_complete+0x2f>
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
mov    -0xc(%rbp),%ecx
sub    $0x2,%ecx
cmp    %ecx,%eax
setle  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fw_is_complete>:
xor    %eax,%eax
cmp    $0x3,%esi
jl     1112 <fw_is_complete+0x12>
add    $0xfffffffe,%esi
xor    %eax,%eax
cmp    %esi,0x4(%rdi)
setle  %al
ret

LLVM IR (-O0):
define i32 @fw_is_complete(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp sge i32 %5, 3
br i1 %6, label %7, label %14
7: ; preds = %2
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 1
%10 = load i32, i32* %9
%11 = load i32, i32* %4
%12 = sub nsw i32 %11, 2
%13 = icmp sle i32 %10, %12
br label %14
14: ; preds = %7, %2
%15 = phi i1 [ false, %2 ], [ %13, %7 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @fw_is_complete(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 2
br i1 %3, label %4, label %10
4: ; preds = %2
%5 = getelementptr inbounds i32, i32* %0, i64 1
%6 = load i32, i32* %5
%7 = add nsw i32 %1, -2
%8 = icmp sle i32 %6, %7
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %4, %2
%11 = phi i32 [ 0, %2 ], [ %9, %4 ]
ret i32 %11
}