xunge/DecIR huggingface dataset:
/* Type definitions */
struct list_elem {
  int dummy;
};
struct list {
  int dummy;
};

/* Variables and functions */
struct list_elem *list_front(struct list *);
int /*<<< orphan*/ list_remove(struct list_elem *);
struct list_elem *list_pop_front(struct list *list) {
  struct list_elem *front = list_front(list);
  list_remove(front);
  return front;
}


x86 assembly (clang, -O0):
<list_pop_front>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <list_front@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <list_remove@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_pop_front>:
push   %rbx
call   1030 <list_front@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <list_remove@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.list_elem = type { i32 }
%struct.list = type { i32 }
define %struct.list_elem* @list_pop_front(%struct.list* %0) {
%2 = alloca %struct.list*
%3 = alloca %struct.list_elem*
store %struct.list* %0, %struct.list** %2
%4 = load %struct.list*, %struct.list** %2
%5 = call %struct.list_elem* @list_front(%struct.list* %4)
store %struct.list_elem* %5, %struct.list_elem** %3
%6 = load %struct.list_elem*, %struct.list_elem** %3
%7 = call i32 @list_remove(%struct.list_elem* %6)
%8 = load %struct.list_elem*, %struct.list_elem** %3
ret %struct.list_elem* %8
}

LLVM IR (-O2):
%struct.list_elem = type { i32 }
%struct.list = type { i32 }
define %struct.list_elem* @list_pop_front(%struct.list* %0) {
%2 = tail call %struct.list_elem* @list_front(%struct.list* %0)
%3 = tail call i32 @list_remove(%struct.list_elem* %2)
ret %struct.list_elem* %2
}
/* Type definitions */
struct __sk_buff {
  int dummy;
};
typedef int /*<<< orphan*/ __u8;
typedef int /*<<< orphan*/ __u32;

/* Variables and functions */
void cilium_dbg_capture(struct __sk_buff *skb, __u8 type, __u32 arg1) {}


x86 assembly (clang, -O0):
<cilium_dbg_capture>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cilium_dbg_capture>:
ret

LLVM IR (-O0):
%struct.__sk_buff = type { i32 }
define void @cilium_dbg_capture(%struct.__sk_buff* %0, i32 %1, i32 %2) {
%4 = alloca %struct.__sk_buff*
%5 = alloca i32
%6 = alloca i32
store %struct.__sk_buff* %0, %struct.__sk_buff** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
%struct.__sk_buff = type { i32 }
define void @cilium_dbg_capture(%struct.__sk_buff* nocapture %0, i32 %1, i32 %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ efree(void *);
void zephir_wrapper_free(void *pointer) { efree(pointer); }


x86 assembly (clang, -O0):
<zephir_wrapper_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <efree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zephir_wrapper_free>:
jmp    1030 <efree@plt>

LLVM IR (-O0):
define void @zephir_wrapper_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @efree(i8* %3)
ret void
}

LLVM IR (-O2):
define void @zephir_wrapper_free(i8* %0) {
%2 = tail call i32 @efree(i8* %0)
ret void
}
/* Type definitions */
struct comp {
  int dummy;
};
struct BrzBar_ {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ SEND_ACKDOWN(int);
int /*<<< orphan*/ SEND_ACKDOWN_DELAYED(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ SEND_DATAOFF_DELAYED(int /*<<< orphan*/, int);
void BrzBar_reqdown(struct comp *comp, int port) {
  struct BrzBar_ *c = (struct BrzBar_ *)comp;
  if (port == 0) {
    SEND_ACKDOWN_DELAYED(0, 0);
    SEND_DATAOFF_DELAYED(0, 1);
  } else {
    SEND_ACKDOWN(port);
  }
}


x86 assembly (clang, -O0):
<BrzBar_reqdown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    116b <BrzBar_reqdown+0x3b>
xor    %esi,%esi
mov    %esi,%edi
call   1040 <SEND_ACKDOWN_DELAYED@plt>
xor    %edi,%edi
mov    $0x1,%esi
call   1050 <SEND_DATAOFF_DELAYED@plt>
jmp    1173 <BrzBar_reqdown+0x43>
mov    -0xc(%rbp),%edi
call   1030 <SEND_ACKDOWN@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BrzBar_reqdown>:
test   %esi,%esi
je     113b <BrzBar_reqdown+0xb>
mov    %esi,%edi
jmp    1030 <SEND_ACKDOWN@plt>
push   %rax
xor    %edi,%edi
xor    %esi,%esi
call   1040 <SEND_ACKDOWN_DELAYED@plt>
xor    %edi,%edi
mov    $0x1,%esi
pop    %rax
jmp    1050 <SEND_DATAOFF_DELAYED@plt>

LLVM IR (-O0):
%struct.comp = type { i32 }
%struct.BrzBar_ = type { i32 }
define void @BrzBar_reqdown(%struct.comp* %0, i32 %1) {
%3 = alloca %struct.comp*
%4 = alloca i32
%5 = alloca %struct.BrzBar_*
store %struct.comp* %0, %struct.comp** %3
store i32 %1, i32* %4
%6 = load %struct.comp*, %struct.comp** %3
%7 = bitcast %struct.comp* %6 to %struct.BrzBar_*
store %struct.BrzBar_* %7, %struct.BrzBar_** %5
%8 = load i32, i32* %4
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %2
%11 = call i32 @SEND_ACKDOWN_DELAYED(i32 0, i32 0)
%12 = call i32 @SEND_DATAOFF_DELAYED(i32 0, i32 1)
br label %16
13: ; preds = %2
%14 = load i32, i32* %4
%15 = call i32 @SEND_ACKDOWN(i32 %14)
br label %16
16: ; preds = %13, %10
ret void
}

LLVM IR (-O2):
%struct.comp = type { i32 }
define void @BrzBar_reqdown(%struct.comp* nocapture readnone %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = tail call i32 @SEND_ACKDOWN_DELAYED(i32 0, i32 0)
%6 = tail call i32 @SEND_DATAOFF_DELAYED(i32 0, i32 1)
br label %9
7: ; preds = %2
%8 = tail call i32 @SEND_ACKDOWN(i32 %1)
br label %9
9: ; preds = %7, %4
ret void
}
int check_overflow(void *bufp, int mem_size) {
  char *index = 0;
  index = (char *)bufp;
  if ((index) &&
      ((*((unsigned char *)(index - 1))) == ((unsigned char)(0xff))) &&
      (*((unsigned char *)(index + mem_size)) == ((unsigned char)(0xff)))) {
    return 0;
  } else {
    return -1;
  }
}


x86 assembly (clang, -O0):
<check_overflow>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     115c <check_overflow+0x5c>
mov    -0x20(%rbp),%rax
movzbl -0x1(%rax),%eax
cmp    $0xff,%eax
jne    115c <check_overflow+0x5c>
mov    -0x20(%rbp),%rax
movslq -0x14(%rbp),%rcx
movzbl (%rax,%rcx,1),%eax
cmp    $0xff,%eax
jne    115c <check_overflow+0x5c>
movl   $0x0,-0x4(%rbp)
jmp    1163 <check_overflow+0x63>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_overflow>:
test   %rdi,%rdi
je     1114 <check_overflow+0x14>
cmpb   $0xff,-0x1(%rdi)
jne    1114 <check_overflow+0x14>
movslq %esi,%rax
cmpb   $0xff,(%rdi,%rax,1)
je     111a <check_overflow+0x1a>
mov    $0xffffffff,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @check_overflow(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* null, i8** %6
%7 = load i8*, i8** %4
store i8* %7, i8** %6
%8 = load i8*, i8** %6
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %25
10: ; preds = %2
%11 = load i8*, i8** %6
%12 = getelementptr inbounds i8, i8* %11, i64 -1
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
%15 = icmp eq i32 %14, 255
br i1 %15, label %16, label %25
16: ; preds = %10
%17 = load i8*, i8** %6
%18 = load i32, i32* %5
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i8, i8* %17, i64 %19
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = icmp eq i32 %22, 255
br i1 %23, label %24, label %25
24: ; preds = %16
store i32 0, i32* %3
br label %26
25: ; preds = %16, %10, %2
store i32 -1, i32* %3
br label %26
26: ; preds = %25, %24
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @check_overflow(i8* %0, i32 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %13, label %4
4: ; preds = %2
%5 = getelementptr inbounds i8, i8* %0, i64 -1
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, -1
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = sext i32 %1 to i64
%10 = getelementptr inbounds i8, i8* %0, i64 %9
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, -1
br i1 %12, label %14, label %13
13: ; preds = %8, %4, %2
br label %14
14: ; preds = %8, %13
%15 = phi i32 [ -1, %13 ], [ 0, %8 ]
ret i32 %15
}
float test_atanhf(float x) { return __builtin_atanhf(x); }


x86 assembly (clang, -O0):
<test_atanhf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <atanhf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_atanhf>:
jmp    1030 <atanhf@plt>

LLVM IR (-O0):
define float @test_atanhf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @atanhf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @test_atanhf(float %0) {
%2 = tail call float @atanhf(float %0)
ret float %2
}
/* Variables and functions */
int MAP_ANONYMOUS;
int MAP_PRIVATE;
int PROT_READ;
int PROT_WRITE;
scalar_t__ errno;
int /*<<< orphan*/ mmap(int /*<<< orphan*/, int, int, int, int, int);
int main(void) {
  mmap(0, 4096, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, -1,
       0x7fff0000LL * 0x1000);
  return errno != 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2ed2(%rip),%rax
mov    (%rax),%edx
mov    0x2e99(%rip),%rax
or     (%rax),%edx
mov    0x2e88(%rip),%rax
mov    (%rax),%ecx
mov    0x2e9f(%rip),%rax
or     (%rax),%ecx
xor    %edi,%edi
mov    $0x1000,%esi
mov    $0xffffffff,%r8d
mov    $0xf0000000,%r9d
call   1030 <mmap@plt>
mov    0x2e6e(%rip),%rax
cmpq   $0x0,(%rax)
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ee0(%rip),%rax
mov    0x2ea9(%rip),%rcx
mov    (%rcx),%edx
or     (%rax),%edx
mov    0x2e96(%rip),%rax
mov    0x2eaf(%rip),%rcx
mov    (%rcx),%ecx
or     (%rax),%ecx
xor    %edi,%edi
mov    $0x1000,%esi
mov    $0xffffffff,%r8d
mov    $0xf0000000,%r9d
call   1030 <mmap@plt>
mov    0x2e7c(%rip),%rcx
xor    %eax,%eax
cmpq   $0x0,(%rcx)
setne  %al
pop    %rcx
ret

LLVM IR (-O0):
@PROT_READ = global i32 0
@PROT_WRITE = global i32 0
@MAP_PRIVATE = global i32 0
@MAP_ANONYMOUS = global i32 0
@errno = global i64 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @PROT_READ
%3 = load i32, i32* @PROT_WRITE
%4 = or i32 %2, %3
%5 = load i32, i32* @MAP_PRIVATE
%6 = load i32, i32* @MAP_ANONYMOUS
%7 = or i32 %5, %6
%8 = call i32 @mmap(i32 0, i32 4096, i32 %4, i32 %7, i32 -1, i32 -268435456)
%9 = load i64, i64* @errno
%10 = icmp ne i64 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
@PROT_READ = global i32 0
@PROT_WRITE = global i32 0
@MAP_PRIVATE = global i32 0
@MAP_ANONYMOUS = global i32 0
@errno = global i64 0
define i32 @main() {
%1 = load i32, i32* @PROT_READ
%2 = load i32, i32* @PROT_WRITE
%3 = or i32 %2, %1
%4 = load i32, i32* @MAP_PRIVATE
%5 = load i32, i32* @MAP_ANONYMOUS
%6 = or i32 %5, %4
%7 = tail call i32 @mmap(i32 0, i32 4096, i32 %3, i32 %6, i32 -1, i32 -268435456)
%8 = load i64, i64* @errno
%9 = icmp ne i64 %8, 0
%10 = zext i1 %9 to i32
ret i32 %10
}
void ntp_clear(void) {}


x86 assembly (clang, -O0):
<ntp_clear>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ntp_clear>:
ret

LLVM IR (-O0):
define void @ntp_clear() {
ret void
}

LLVM IR (-O2):
define void @ntp_clear() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __builtin_arm_wfi();
void wfi() { __builtin_arm_wfi(); }


x86 assembly (clang, -O0):
<wfi>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__builtin_arm_wfi@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wfi>:
xor    %eax,%eax
jmp    1030 <__builtin_arm_wfi@plt>

LLVM IR (-O0):
define void @wfi() {
%1 = call i32 (...) @__builtin_arm_wfi()
ret void
}

LLVM IR (-O2):
define void @wfi() {
%1 = tail call i32 (...) @__builtin_arm_wfi()
ret void
}
void RTThreadFromNative(void) {}


x86 assembly (clang, -O0):
<RTThreadFromNative>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTThreadFromNative>:
ret

LLVM IR (-O0):
define void @RTThreadFromNative() {
ret void
}

LLVM IR (-O2):
define void @RTThreadFromNative() {
ret void
}
float Linear__easeInOut(float t, float b, float c, float d, float p0,
                        float p1) {
  return c * t / d + b;
}


x86 assembly (clang, -O0):
<Linear__easeInOut>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  %xmm4,-0x14(%rbp)
movss  %xmm5,-0x18(%rbp)
movss  -0xc(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
divss  -0x10(%rbp),%xmm0
addss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Linear__easeInOut>:
mulss  %xmm2,%xmm0
divss  %xmm3,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @Linear__easeInOut(float %0, float %1, float %2, float %3, float %4, float %5) {
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
%11 = alloca float
%12 = alloca float
store float %0, float* %7
store float %1, float* %8
store float %2, float* %9
store float %3, float* %10
store float %4, float* %11
store float %5, float* %12
%13 = load float, float* %9
%14 = load float, float* %7
%15 = fmul float %13, %14
%16 = load float, float* %10
%17 = fdiv float %15, %16
%18 = load float, float* %8
%19 = fadd float %17, %18
ret float %19
}

LLVM IR (-O2):
define float @Linear__easeInOut(float %0, float %1, float %2, float %3, float %4, float %5) {
%7 = fmul float %0, %2
%8 = fdiv float %7, %3
%9 = fadd float %8, %1
ret float %9
}
/* Variables and functions */
int /*<<< orphan*/ len(char const *);
int /*<<< orphan*/ write(int, char const *, int /*<<< orphan*/);
int p_exit(const char *str, int exitval) {
  write(2, str, len(str));
  return (exitval);
}


x86 assembly (clang, -O0):
<p_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <len@plt>
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
mov    $0x2,%edi
call   1040 <write@plt>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<p_exit>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <len@plt>
mov    $0x2,%edi
mov    %rbx,%rsi
mov    %eax,%edx
call   1040 <write@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @p_exit(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @len(i8* %6)
%8 = call i32 @write(i32 2, i8* %5, i32 %7)
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @p_exit(i8* %0, i32 returned %1) {
%3 = tail call i32 @len(i8* %0)
%4 = tail call i32 @write(i32 2, i8* %0, i32 %3)
ret i32 %1
}
/* Variables and functions */
float ldexpf(float s, float s2) { return (float)ldexpf((double)s, (double)s2); }


x86 assembly (clang, -O0):
<ldexpf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  -0x8(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
cvtsd2ss %xmm1,%xmm1
call   1030 <ldexpf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ldexpf>:
jmp    1100 <ldexpf>

LLVM IR (-O0):
define float @ldexpf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = fpext float %5 to double
%7 = fptrunc double %6 to float
%8 = load float, float* %4
%9 = fpext float %8 to double
%10 = fptrunc double %9 to float
%11 = call float @ldexpf(float %7, float %10)
ret float %11
}

LLVM IR (-O2):
define float @ldexpf(float %0, float %1) {
br label %3
3: ; preds = %3, %2
br label %3
}
/* Variables and functions */
double RAND_MAX;
double rand();
double drand() { return (rand() + 1.0) / (RAND_MAX + 1.0); }


x86 assembly (clang, -O0):
<drand>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
movsd  0xedd(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  0xed1(%rip),%xmm1
mov    0x2eb2(%rip),%rax
addsd  (%rax),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<drand>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
movsd  0xee0(%rip),%xmm1
addsd  %xmm1,%xmm0
mov    0x2ebd(%rip),%rax
addsd  (%rax),%xmm1
divsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global double 0.000000e+00
define double @drand() {
%1 = call double (...) @rand()
%2 = fadd double %1, 1.000000e+00
%3 = load double, double* @RAND_MAX
%4 = fadd double %3, 1.000000e+00
%5 = fdiv double %2, %4
ret double %5
}

LLVM IR (-O2):
@RAND_MAX = global double 0.000000e+00
define double @drand() {
%1 = tail call double (...) @rand()
%2 = fadd double %1, 1.000000e+00
%3 = load double, double* @RAND_MAX
%4 = fadd double %3, 1.000000e+00
%5 = fdiv double %2, %4
ret double %5
}
/* Variables and functions */
int /*<<< orphan*/ lcd_clear(int);
void s_default_destroy(void) { lcd_clear(0x000); }


x86 assembly (clang, -O0):
<s_default_destroy>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <lcd_clear@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_default_destroy>:
xor    %edi,%edi
jmp    1030 <lcd_clear@plt>

LLVM IR (-O0):
define void @s_default_destroy() {
%1 = call i32 @lcd_clear(i32 0)
ret void
}

LLVM IR (-O2):
define void @s_default_destroy() {
%1 = tail call i32 @lcd_clear(i32 0)
ret void
}
/* Variables and functions */
void *__libc_malloc(size_t);
int /*<<< orphan*/ printf(char *);
void *mymalloc(size_t size) {
  printf("mymalloc\n");
  return __libc_malloc(size);
}


x86 assembly (clang, -O0):
<mymalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rdi
call   1040 <__libc_malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mymalloc>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <__libc_malloc@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"mymalloc\0A\00"
define i8* @mymalloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%4 = load i64, i64* %2
%5 = call i8* @__libc_malloc(i64 %4)
ret i8* %5
}

LLVM IR (-O2):
@str = [9 x i8] c"mymalloc\00"
define i8* @mymalloc(i64 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str, i64 0, i64 0))
%3 = tail call i8* @__libc_malloc(i64 %0)
ret i8* %3
}
/* Variables and functions */
void GLimp_Shutdown(void) {}


x86 assembly (clang, -O0):
<GLimp_Shutdown>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GLimp_Shutdown>:
ret

LLVM IR (-O0):
define void @GLimp_Shutdown() {
ret void
}

LLVM IR (-O2):
define void @GLimp_Shutdown() {
ret void
}
double ls_cost_nm6_sq(double x) { return x * x; }


x86 assembly (clang, -O0):
<ls_cost_nm6_sq>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_cost_nm6_sq>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @ls_cost_nm6_sq(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @ls_cost_nm6_sq(double %0) {
%2 = fmul double %0, %0
ret double %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ fscanf(int /*<<< orphan*/ *, char *, int *);
int read_pid(char *pid_file) {
  FILE *f;
  int pid;
  if (!(f = fopen(pid_file, "r"))) {
    return 0;
  }
  fscanf(f, "%d", &pid);
  fclose(f);
  return pid;
}


x86 assembly (clang, -O0):
<read_pid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xeb9(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    1166 <read_pid+0x36>
movl   $0x0,-0x4(%rbp)
jmp    1189 <read_pid+0x59>
mov    -0x18(%rbp),%rdi
lea    0xe91(%rip),%rsi
lea    -0x1c(%rbp),%rdx
call   1040 <fscanf@plt>
mov    -0x18(%rbp),%rdi
call   1030 <fclose@plt>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_pid>:
push   %rbx
sub    $0x10,%rsp
lea    0xec4(%rip),%rsi
call   1050 <fopen@plt>
test   %rax,%rax
je     116b <read_pid+0x3b>
mov    %rax,%rbx
lea    0xeb2(%rip),%rsi
lea    0xc(%rsp),%rdx
mov    %rax,%rdi
call   1040 <fscanf@plt>
mov    %rbx,%rdi
call   1030 <fclose@plt>
mov    0xc(%rsp),%eax
jmp    116d <read_pid+0x3d>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"r\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @read_pid(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i32
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = call i32* @fopen(i8* %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %7, i32** %4
%8 = icmp ne i32* %7, null
br i1 %8, label %10, label %9
9: ; preds = %1
store i32 0, i32* %2
br label %16
10: ; preds = %1
%11 = load i32*, i32** %4
%12 = call i32 @fscanf(i32* %11, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %5)
%13 = load i32*, i32** %4
%14 = call i32 @fclose(i32* %13)
%15 = load i32, i32* %5
store i32 %15, i32* %2
br label %16
16: ; preds = %10, %9
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
@.str = [2 x i8] c"r\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @read_pid(i8* nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%5 = icmp eq i32* %4, null
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = call i32 @fscanf(i32* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%8 = call i32 @fclose(i32* %4)
%9 = load i32, i32* %2
br label %10
10: ; preds = %1, %6
%11 = phi i32 [ %9, %6 ], [ 0, %1 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned int);
unsigned int reverse_bits(int);
int main() {
  unsigned u;
  u = reverse_bits(0x00ffffff);
  printf("u(%x)\n", u);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xffffff,%edi
call   1030 <reverse_bits@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeba(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xffffff,%edi
call   1030 <reverse_bits@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"u(%x)\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @reverse_bits(i32 16777215)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"u(%x)\0A\00"
define i32 @main() {
%1 = tail call i32 @reverse_bits(i32 16777215)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isodigit(int);
void t_isodigit_0x36() {
  Assert_real((isodigit(54)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              275, ("isodigit should be 1 for 6"));
}


x86 assembly (clang, -O0):
<t_isodigit_0x36>:
push   %rbp
mov    %rsp,%rbp
mov    $0x36,%edi
call   1040 <isodigit@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x113,%edx
lea    0xf66(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0x36>:
push   %rax
mov    $0x36,%edi
call   1040 <isodigit@plt>
lea    0xece(%rip),%rsi
lea    0xf70(%rip),%rcx
mov    %eax,%edi
mov    $0x113,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 1 for 6\00"
define void @t_isodigit_0x36() {
%1 = call i32 @isodigit(i32 54)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 275, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 1 for 6\00"
define void @t_isodigit_0x36() {
%1 = tail call i32 @isodigit(i32 54)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 275, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void *apr_atomic_casptr(volatile void **mem, void *with, const void *cmp) {
  return (void *)__sync_val_compare_and_swap(mem, cmp, with);
}


x86 assembly (clang, -O0):
<apr_atomic_casptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rdx
lock cmpxchg %rdx,(%rcx)
sete   %cl
pop    %rbp
ret

x86 assembly (clang, -O2):
<apr_atomic_casptr>:
mov    %rdx,%rax
lock cmpxchg %rsi,(%rdi)
ret

LLVM IR (-O0):
define i8* @apr_atomic_casptr(i8** %0, i8* %1, i8* %2) {
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca i8*
store i8** %0, i8*** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8**, i8*** %4
%8 = bitcast i8** %7 to i64*
%9 = load i8*, i8** %6
%10 = ptrtoint i8* %9 to i64
%11 = load i8*, i8** %5
%12 = ptrtoint i8* %11 to i64
%13 = cmpxchg i64* %8, i64 %10, i64 %12 seq_cst seq_cst
%14 = extractvalue { i64, i1 } %13, 0
%15 = inttoptr i64 %14 to i8*
ret i8* %15
}

LLVM IR (-O2):
define i8* @apr_atomic_casptr(i8** nocapture %0, i8* %1, i8* %2) {
%4 = bitcast i8** %0 to i64*
%5 = ptrtoint i8* %2 to i64
%6 = ptrtoint i8* %1 to i64
%7 = cmpxchg i64* %4, i64 %5, i64 %6 seq_cst seq_cst
%8 = extractvalue { i64, i1 } %7, 0
%9 = inttoptr i64 %8 to i8*
ret i8* %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void ERROR_FUNC() { printf("ERROR!"); }


x86 assembly (clang, -O0):
<ERROR_FUNC>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ERROR_FUNC>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"ERROR!\00"
define void @ERROR_FUNC() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"ERROR!\00"
define void @ERROR_FUNC() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int ethtool_bitrate(char const *);
int wireless_bitrate(char const *);
int device_bitrate(const char *ifname) {
  int speed_c, speed_w;
  speed_c = ethtool_bitrate(ifname);
  speed_w = wireless_bitrate(ifname);
  return (speed_c == 0 ? speed_w : speed_c);
}


x86 assembly (clang, -O0):
<device_bitrate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <ethtool_bitrate@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <wireless_bitrate@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1159 <device_bitrate+0x39>
mov    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    115f <device_bitrate+0x3f>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<device_bitrate>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <ethtool_bitrate@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <wireless_bitrate@plt>
test   %ebp,%ebp
cmovne %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @device_bitrate(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @ethtool_bitrate(i8* %5)
store i32 %6, i32* %3
%7 = load i8*, i8** %2
%8 = call i32 @wireless_bitrate(i8* %7)
store i32 %8, i32* %4
%9 = load i32, i32* %3
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %1
%12 = load i32, i32* %4
br label %15
13: ; preds = %1
%14 = load i32, i32* %3
br label %15
15: ; preds = %13, %11
%16 = phi i32 [ %12, %11 ], [ %14, %13 ]
ret i32 %16
}

LLVM IR (-O2):
define i32 @device_bitrate(i8* %0) {
%2 = tail call i32 @ethtool_bitrate(i8* %0)
%3 = tail call i32 @wireless_bitrate(i8* %0)
%4 = icmp eq i32 %2, 0
%5 = select i1 %4, i32 %3, i32 %2
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ YM2612_write(int, int);
void YM2612_disableDAC() {
  YM2612_write(0, 0x2B);
  YM2612_write(1, 0x00);
}


x86 assembly (clang, -O0):
<YM2612_disableDAC>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0x2b,%esi
call   1030 <YM2612_write@plt>
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <YM2612_write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<YM2612_disableDAC>:
push   %rax
xor    %edi,%edi
mov    $0x2b,%esi
call   1030 <YM2612_write@plt>
mov    $0x1,%edi
xor    %esi,%esi
pop    %rax
jmp    1030 <YM2612_write@plt>

LLVM IR (-O0):
define void @YM2612_disableDAC() {
%1 = call i32 @YM2612_write(i32 0, i32 43)
%2 = call i32 @YM2612_write(i32 1, i32 0)
ret void
}

LLVM IR (-O2):
define void @YM2612_disableDAC() {
%1 = tail call i32 @YM2612_write(i32 0, i32 43)
%2 = tail call i32 @YM2612_write(i32 1, i32 0)
ret void
}
/* Variables and functions */
int fib(int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("%d\n", fib(10));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xa,%edi
call   1040 <fib@plt>
mov    %eax,%esi
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
call   1040 <fib@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @fib(i32 10)
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @fib(i32 10)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
void timeR_mark_bcode(unsigned int bin_id) {}


x86 assembly (clang, -O0):
<timeR_mark_bcode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<timeR_mark_bcode>:
ret

LLVM IR (-O0):
define void @timeR_mark_bcode(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @timeR_mark_bcode(i32 %0) {
ret void
}
void(writew)(unsigned short b, void volatile *addr) {
  unsigned short volatile *mem_3;
  {
    mem_3 = (unsigned short volatile *)addr;
    (*mem_3) = (unsigned short volatile)b;
    return;
  }
}


x86 assembly (clang, -O0):
<writew>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x2(%rbp),%cx
mov    -0x18(%rbp),%rax
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<writew>:
mov    %di,(%rsi)
ret

LLVM IR (-O0):
define void @writew(i16 zeroext %0, i8* %1) {
%3 = alloca i16
%4 = alloca i8*
%5 = alloca i16*
store i16 %0, i16* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i16*
store i16* %7, i16** %5
%8 = load i16, i16* %3
%9 = load i16*, i16** %5
store volatile i16 %8, i16* %9
ret void
}

LLVM IR (-O2):
define void @writew(i16 zeroext %0, i8* %1) {
%3 = bitcast i8* %1 to i16*
store volatile i16 %0, i16* %3
ret void
}
struct Elem *allocElem() {
  return 0;
}


x86 assembly (clang, -O0):
<allocElem>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<allocElem>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.Elem = type opaque
define %struct.Elem* @allocElem() {
ret %struct.Elem* null
}

LLVM IR (-O2):
%struct.Elem = type opaque
define noalias %struct.Elem* @allocElem() {
ret %struct.Elem* null
}
void swap(int *array, int i, int j) {
  int tmp;
  tmp = array[i];
  array[i] = array[j];
  array[j] = tmp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
store i32 %12, i32* %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
store i32 %17, i32* %21
%22 = load i32, i32* %7
%23 = load i32*, i32** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
store i32 %9, i32* %5
store i32 %6, i32* %8
ret void
}
/* Variables and functions */
double interp_high_order_dx_1(double, double *, double *, int, int, double,
                              int);
double interp_high_order_dx_ex(double x0, double *x, double *y, int n,
                               int order, double dx) {
  return (interp_high_order_dx_1(x0, x, y, n, order, dx, 1));
}


x86 assembly (clang, -O0):
<interp_high_order_dx_ex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    %ecx,-0x20(%rbp)
movsd  %xmm1,-0x28(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
mov    -0x20(%rbp),%ecx
movsd  -0x28(%rbp),%xmm1
mov    $0x1,%r8d
call   1030 <interp_high_order_dx_1@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<interp_high_order_dx_ex>:
mov    $0x1,%r8d
jmp    1030 <interp_high_order_dx_1@plt>

LLVM IR (-O0):
define double @interp_high_order_dx_ex(double %0, double* %1, double* %2, i32 %3, i32 %4, double %5) {
%7 = alloca double
%8 = alloca double*
%9 = alloca double*
%10 = alloca i32
%11 = alloca i32
%12 = alloca double
store double %0, double* %7
store double* %1, double** %8
store double* %2, double** %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store double %5, double* %12
%13 = load double, double* %7
%14 = load double*, double** %8
%15 = load double*, double** %9
%16 = load i32, i32* %10
%17 = load i32, i32* %11
%18 = load double, double* %12
%19 = call double @interp_high_order_dx_1(double %13, double* %14, double* %15, i32 %16, i32 %17, double %18, i32 1)
ret double %19
}

LLVM IR (-O2):
define double @interp_high_order_dx_ex(double %0, double* %1, double* %2, i32 %3, i32 %4, double %5) {
%7 = tail call double @interp_high_order_dx_1(double %0, double* %1, double* %2, i32 %3, i32 %4, double %5, i32 1)
ret double %7
}
/* Variables and functions */
int /*<<< orphan*/ test_san();
int main() {
  test_san();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_san@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_san@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_san()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_san()
ret i32 0
}
unsigned xrop3_85_0_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  stk1 = ~D;
  return (stk1 & S) | (stk1 & (~T)) | (T & (~S) & D);
}


x86 assembly (clang, -O0):
<xrop3_85_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_85_0_1>:
mov    %esi,%eax
not    %eax
or     %edi,%eax
shl    $0x8,%eax
not    %edi
and    %esi,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_85_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
store i32 %14, i32* %6
%15 = load i8, i8* %4
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 8
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
store i32 %20, i32* %7
%21 = load i32, i32* %5
%22 = xor i32 %21, -1
store i32 %22, i32* %8
%23 = load i32, i32* %8
%24 = load i32, i32* %6
%25 = and i32 %23, %24
%26 = load i32, i32* %8
%27 = load i32, i32* %7
%28 = xor i32 %27, -1
%29 = and i32 %26, %28
%30 = or i32 %25, %29
%31 = load i32, i32* %7
%32 = load i32, i32* %6
%33 = xor i32 %32, -1
%34 = and i32 %31, %33
%35 = load i32, i32* %5
%36 = and i32 %34, %35
%37 = or i32 %30, %36
ret i32 %37
}

LLVM IR (-O2):
define i32 @xrop3_85_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = zext i8 %1 to i32
%5 = xor i32 %4, -1
%6 = or i32 %5, %3
%7 = shl nsw i32 %6, 8
%8 = xor i32 %3, -1
%9 = and i32 %8, %4
%10 = or i32 %7, %9
ret i32 %10
}
/* Variables and functions */
int *GetTokenCounterAddress();
int DecrementTokenCount(void) {
  int *pcount = GetTokenCounterAddress();
  *pcount = *pcount - 1;
  return *pcount;
}


x86 assembly (clang, -O0):
<DecrementTokenCount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <GetTokenCounterAddress@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
sub    $0x1,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DecrementTokenCount>:
push   %rax
xor    %eax,%eax
call   1030 <GetTokenCounterAddress@plt>
mov    (%rax),%ecx
add    $0xffffffff,%ecx
mov    %ecx,(%rax)
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @DecrementTokenCount() {
%1 = alloca i32*
%2 = call i32* (...) @GetTokenCounterAddress()
store i32* %2, i32** %1
%3 = load i32*, i32** %1
%4 = load i32, i32* %3
%5 = sub nsw i32 %4, 1
%6 = load i32*, i32** %1
store i32 %5, i32* %6
%7 = load i32*, i32** %1
%8 = load i32, i32* %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @DecrementTokenCount() {
%1 = tail call i32* (...) @GetTokenCounterAddress()
%2 = load i32, i32* %1
%3 = add nsw i32 %2, -1
store i32 %3, i32* %1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printg(char *);
int main() {
  printg("hello\nWelcome to take a look at my code\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printg@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printg@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [41 x i8] c"hello\0AWelcome to take a look at my code\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printg(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [41 x i8] c"hello\0AWelcome to take a look at my code\0A\00"
define i32 @main() {
%1 = tail call i32 @printg(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
double M_PI;
double M_PI_2;
double wind_dir_from_angle_rad(double rad) {
  double w = M_PI + M_PI_2 - rad;
  while (w > 2 * M_PI)
    w -= (2 * M_PI);
  return w;
}


x86 assembly (clang, -O0):
<wind_dir_from_angle_rad>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    0x2ed8(%rip),%rax
movsd  (%rax),%xmm0
mov    0x2ec5(%rip),%rax
addsd  (%rax),%xmm0
subsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xeca(%rip),%xmm1
mov    0x2eab(%rip),%rax
mulsd  (%rax),%xmm1
ucomisd %xmm1,%xmm0
jbe    116d <wind_dir_from_angle_rad+0x6d>
mov    0x2e96(%rip),%rax
movsd  (%rax),%xmm1
movsd  -0x10(%rbp),%xmm0
addsd  %xmm1,%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    1129 <wind_dir_from_angle_rad+0x29>
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<wind_dir_from_angle_rad>:
movapd %xmm0,%xmm1
mov    0x2edd(%rip),%rax
movsd  (%rax),%xmm2
mov    0x2eca(%rip),%rax
movsd  (%rax),%xmm0
addsd  %xmm2,%xmm0
subsd  %xmm1,%xmm0
addsd  %xmm2,%xmm2
ucomisd %xmm2,%xmm0
jbe    113a <wind_dir_from_angle_rad+0x3a>
nopl   0x0(%rax)
subsd  %xmm2,%xmm0
ucomisd %xmm2,%xmm0
ja     1130 <wind_dir_from_angle_rad+0x30>
ret

LLVM IR (-O0):
@M_PI = global double 0.000000e+00
@M_PI_2 = global double 0.000000e+00
define double @wind_dir_from_angle_rad(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* @M_PI
%5 = load double, double* @M_PI_2
%6 = fadd double %4, %5
%7 = load double, double* %2
%8 = fsub double %6, %7
store double %8, double* %3
br label %9
9: ; preds = %14, %1
%10 = load double, double* %3
%11 = load double, double* @M_PI
%12 = fmul double 2.000000e+00, %11
%13 = fcmp ogt double %10, %12
br i1 %13, label %14, label %18
14: ; preds = %9
%15 = load double, double* @M_PI
%16 = load double, double* %3
%17 = call double @llvm.fmuladd.f64(double -2.000000e+00, double %15, double %16)
store double %17, double* %3
br label %9
18: ; preds = %9
%19 = load double, double* %3
ret double %19
}

LLVM IR (-O2):
@M_PI = global double 0.000000e+00
@M_PI_2 = global double 0.000000e+00
define double @wind_dir_from_angle_rad(double %0) {
%2 = load double, double* @M_PI
%3 = load double, double* @M_PI_2
%4 = fadd double %2, %3
%5 = fsub double %4, %0
%6 = fmul double %2, 2.000000e+00
%7 = fcmp ogt double %5, %6
br i1 %7, label %8, label %12
8: ; preds = %1, %8
%9 = phi double [ %10, %8 ], [ %5, %1 ]
%10 = tail call double @llvm.fmuladd.f64(double %2, double -2.000000e+00, double %9)
%11 = fcmp ogt double %10, %6
br i1 %11, label %8, label %12
12: ; preds = %8, %1
%13 = phi double [ %5, %1 ], [ %10, %8 ]
ret double %13
}
/* Variables and functions */
int /*<<< orphan*/ begin_match();
int /*<<< orphan*/ end_match();
int step_match();
void simulator1() {
  begin_match();
  while (step_match() != 2) {
  }
  end_match();
}


x86 assembly (clang, -O0):
<simulator1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <begin_match@plt>
mov    $0x0,%al
call   1030 <step_match@plt>
cmp    $0x2,%eax
je     1150 <simulator1+0x20>
jmp    113b <simulator1+0xb>
mov    $0x0,%al
call   1050 <end_match@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<simulator1>:
push   %rax
xor    %eax,%eax
call   1040 <begin_match@plt>
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <step_match@plt>
cmp    $0x2,%eax
jne    1140 <simulator1+0x10>
xor    %eax,%eax
pop    %rcx
jmp    1050 <end_match@plt>

LLVM IR (-O0):
define void @simulator1() {
%1 = call i32 (...) @begin_match()
br label %2
2: ; preds = %5, %0
%3 = call i32 (...) @step_match()
%4 = icmp ne i32 %3, 2
br i1 %4, label %5, label %6
5: ; preds = %2
br label %2
6: ; preds = %2
%7 = call i32 (...) @end_match()
ret void
}

LLVM IR (-O2):
define void @simulator1() {
%1 = tail call i32 (...) @begin_match()
br label %2
2: ; preds = %2, %0
%3 = tail call i32 (...) @step_match()
%4 = icmp eq i32 %3, 2
br i1 %4, label %5, label %2
5: ; preds = %2
%6 = tail call i32 (...) @end_match()
ret void
}
/* Variables and functions */
int ppc_cpu_current();
bool ppc_cpu_is_e200(void) { return (ppc_cpu_current() & 0xff80) == 0x8100; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ppc_cpu_current@plt>
and    $0xff80,%eax
cmp    $0x8100,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
xor    %eax,%eax
call   1030 <ppc_cpu_current@plt>
and    $0xff80,%eax
xor    %ecx,%ecx
cmp    $0x8100,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ppc_cpu_is_e200() {
%1 = call i32 (...) @ppc_cpu_current()
%2 = and i32 %1, 65408
%3 = icmp eq i32 %2, 33024
%4 = zext i1 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @ppc_cpu_is_e200() {
%1 = tail call i32 (...) @ppc_cpu_current()
%2 = and i32 %1, 65408
%3 = icmp eq i32 %2, 33024
%4 = zext i1 %3 to i32
ret i32 %4
}
int utos3(unsigned int value) {
  return (value & 0x800000) ? -(signed)(value ^ 0xffffff) - 1 : value;
}


x86 assembly (clang, -O0):
<utos3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x800000,%eax
cmp    $0x0,%eax
je     1130 <utos3+0x30>
mov    -0x4(%rbp),%ecx
xor    $0xffffff,%ecx
xor    %eax,%eax
sub    %ecx,%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1136 <utos3+0x36>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utos3>:
mov    %edi,%eax
xor    $0xff000000,%eax
test   $0x800000,%edi
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @utos3(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 8388608
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %2
%8 = xor i32 %7, 16777215
%9 = sub nsw i32 0, %8
%10 = sub nsw i32 %9, 1
br label %13
11: ; preds = %1
%12 = load i32, i32* %2
br label %13
13: ; preds = %11, %6
%14 = phi i32 [ %10, %6 ], [ %12, %11 ]
ret i32 %14
}

LLVM IR (-O2):
define i32 @utos3(i32 %0) {
%2 = and i32 %0, 8388608
%3 = icmp eq i32 %2, 0
%4 = xor i32 %0, -16777216
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
long time_dummy(long *t) { return (365 * 24 * 60 * 60 * (2016 - 1970)); }


x86 assembly (clang, -O0):
<time_dummy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x56774100,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_dummy>:
mov    $0x56774100,%eax
ret

LLVM IR (-O0):
define i64 @time_dummy(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
ret i64 1450656000
}

LLVM IR (-O2):
define i64 @time_dummy(i64* nocapture readnone %0) {
ret i64 1450656000
}