xunge/DecIR huggingface dataset:
int is_option(char *arg) {
  if (arg[0] == '-') {
    switch (arg[1]) {
    case 0:
      return 0;
    case '-':
      return 2;
    default:
      return 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<is_option>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2d,%eax
jne    1165 <is_option+0x65>
mov    -0x10(%rbp),%rax
movsbl 0x1(%rax),%eax
mov    %eax,-0x14(%rbp)
test   %eax,%eax
je     1141 <is_option+0x41>
jmp    1130 <is_option+0x30>
mov    -0x14(%rbp),%eax
sub    $0x2d,%eax
je     114d <is_option+0x4d>
jmp    1159 <is_option+0x59>
movl   $0x0,-0x4(%rbp)
jmp    116c <is_option+0x6c>
movl   $0x2,-0x4(%rbp)
jmp    116c <is_option+0x6c>
movl   $0x1,-0x4(%rbp)
jmp    116c <is_option+0x6c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_option>:
xor    %eax,%eax
cmpb   $0x2d,(%rdi)
jne    111c <is_option+0x1c>
mov    0x1(%rdi),%cl
xor    %edx,%edx
cmp    $0x2d,%cl
sete   %dl
add    $0x1,%edx
xor    %eax,%eax
test   %cl,%cl
cmovne %edx,%eax
ret

LLVM IR (-O0):
define i32 @is_option(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 45
br i1 %8, label %9, label %17
9: ; preds = %1
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
switch i32 %13, label %16 [
i32 0, label %14
i32 45, label %15
]
14: ; preds = %9
store i32 0, i32* %2
br label %18
15: ; preds = %9
store i32 2, i32* %2
br label %18
16: ; preds = %9
store i32 1, i32* %2
br label %18
17: ; preds = %1
store i32 0, i32* %2
br label %18
18: ; preds = %17, %16, %15, %14
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @is_option(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 45
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 45
%8 = select i1 %7, i32 2, i32 1
%9 = icmp eq i8 %6, 0
%10 = select i1 %9, i32 0, i32 %8
br label %11
11: ; preds = %1, %4
%12 = phi i32 [ %10, %4 ], [ 0, %1 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
int strlen(char const *);
char *strstr(char *, char const *);
char *del_str_all(char *str, const char *del) {
  int len;
  char *pos;
  len = strlen(del);
  while ((pos = strstr(str, del)) != NULL) {
    strcpy(pos, pos + len);
  }
  return str;
}


x86 assembly (clang, -O0):
<del_str_all>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <strstr@plt>
mov    %rax,-0x20(%rbp)
cmp    $0x0,%rax
je     1180 <del_str_all+0x50>
mov    -0x20(%rbp),%rdi
mov    -0x20(%rbp),%rsi
movslq -0x14(%rbp),%rax
add    %rax,%rsi
call   1030 <strcpy@plt>
jmp    114c <del_str_all+0x1c>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<del_str_all>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %eax,%ebp
mov    %r14,%rdi
mov    %rbx,%rsi
call   1050 <strstr@plt>
test   %rax,%rax
je     117c <del_str_all+0x4c>
movslq %ebp,%rbp
nopw   0x0(%rax,%rax,1)
lea    (%rax,%rbp,1),%rsi
mov    %rax,%rdi
call   1030 <strcpy@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1050 <strstr@plt>
test   %rax,%rax
jne    1160 <del_str_all+0x30>
mov    %r14,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @del_str_all(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
store i32 %8, i32* %5
br label %9
9: ; preds = %14, %2
%10 = load i8*, i8** %3
%11 = load i8*, i8** %4
%12 = call i8* @strstr(i8* %10, i8* %11)
store i8* %12, i8** %6
%13 = icmp ne i8* %12, null
br i1 %13, label %14, label %21
14: ; preds = %9
%15 = load i8*, i8** %6
%16 = load i8*, i8** %6
%17 = load i32, i32* %5
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
%20 = call i32 @strcpy(i8* %15, i8* %19)
br label %9
21: ; preds = %9
%22 = load i8*, i8** %3
ret i8* %22
}

LLVM IR (-O2):
define i8* @del_str_all(i8* returned %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i8* @strstr(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
%5 = icmp eq i8* %4, null
br i1 %5, label %14, label %6
6: ; preds = %2
%7 = sext i32 %3 to i64
br label %8
8: ; preds = %6, %8
%9 = phi i8* [ %4, %6 ], [ %12, %8 ]
%10 = getelementptr inbounds i8, i8* %9, i64 %7
%11 = tail call i32 @strcpy(i8* %9, i8* %10)
%12 = tail call i8* @strstr(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
%13 = icmp eq i8* %12, null
br i1 %13, label %14, label %8
14: ; preds = %8, %2
ret i8* %0
}
/* Variables and functions */
int usleep(unsigned int);
int av_usleep(unsigned usec) { return usleep(usec); }


x86 assembly (clang, -O0):
<av_usleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_usleep>:
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define i32 @av_usleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @usleep(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @av_usleep(i32 %0) {
%2 = tail call i32 @usleep(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ printf(char *, int, int, int);
int main(int argc, char *argv[]) {
  int a, b, c;
  int fi = 0;
  assert(fi != 0);
  b = 4, c = 5, a = 6;
  printf("%d,%d,%d", a, b, c);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x20(%rbp)
cmpl   $0x0,-0x20(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
movl   $0x4,-0x18(%rbp)
movl   $0x5,-0x1c(%rbp)
movl   $0x6,-0x14(%rbp)
mov    -0x14(%rbp),%esi
mov    -0x18(%rbp),%edx
mov    -0x1c(%rbp),%ecx
lea    0xe8d(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <assert@plt>
lea    0xed1(%rip),%rdi
mov    $0x6,%esi
mov    $0x4,%edx
mov    $0x5,%ecx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"%d,%d,%d\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %9
%10 = load i32, i32* %9
%11 = icmp ne i32 %10, 0
%12 = zext i1 %11 to i32
%13 = call i32 @assert(i32 %12)
store i32 4, i32* %7
store i32 5, i32* %8
store i32 6, i32* %6
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = load i32, i32* %8
%17 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %14, i32 %15, i32 %16)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"%d,%d,%d\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @assert(i32 0)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 6, i32 4, i32 5)
ret i32 0
}
int hash(char *key) {
  int i = 0, j = 0;
  if (!key)
    return 0;
  while (key[j]) {
    i += key[j++];
  }
  return i % 1024;
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    112d <hash+0x2d>
movl   $0x0,-0x4(%rbp)
jmp    1173 <hash+0x73>
jmp    1132 <hash+0x32>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1165 <hash+0x65>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0x18(%rbp)
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
add    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1132 <hash+0x32>
mov    -0x14(%rbp),%eax
mov    $0x400,%ecx
cltd
idiv   %ecx
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
xor    %eax,%eax
test   %rdi,%rdi
je     1143 <hash+0x43>
mov    (%rdi),%cl
test   %cl,%cl
je     1143 <hash+0x43>
add    $0x1,%rdi
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movsbl %cl,%ecx
add    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1120 <hash+0x20>
lea    0x3ff(%rax),%ecx
test   %eax,%eax
cmovns %eax,%ecx
and    $0xfffffc00,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @hash(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
store i32 0, i32* %5
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %9, label %8
8: ; preds = %1
store i32 0, i32* %2
br label %30
9: ; preds = %1
br label %10
10: ; preds = %17, %9
%11 = load i8*, i8** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i8, i8* %14
%16 = icmp ne i8 %15, 0
br i1 %16, label %17, label %27
17: ; preds = %10
%18 = load i8*, i8** %3
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
%21 = sext i32 %19 to i64
%22 = getelementptr inbounds i8, i8* %18, i64 %21
%23 = load i8, i8* %22
%24 = sext i8 %23 to i32
%25 = load i32, i32* %4
%26 = add nsw i32 %25, %24
store i32 %26, i32* %4
br label %10
27: ; preds = %10
%28 = load i32, i32* %4
%29 = srem i32 %28, 1024
store i32 %29, i32* %2
br label %30
30: ; preds = %27, %8
%31 = load i32, i32* %2
ret i32 %31
}

LLVM IR (-O2):
define i32 @hash(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %18, label %3
3: ; preds = %1
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %18, label %6
6: ; preds = %3, %6
%7 = phi i64 [ %10, %6 ], [ 0, %3 ]
%8 = phi i8 [ %14, %6 ], [ %4, %3 ]
%9 = phi i32 [ %12, %6 ], [ 0, %3 ]
%10 = add nuw nsw i64 %7, 1
%11 = sext i8 %8 to i32
%12 = add nsw i32 %9, %11
%13 = getelementptr inbounds i8, i8* %0, i64 %10
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %6
16: ; preds = %6
%17 = srem i32 %12, 1024
br label %18
18: ; preds = %3, %16, %1
%19 = phi i32 [ 0, %1 ], [ 0, %3 ], [ %17, %16 ]
ret i32 %19
}
unsigned xrop3_21_0_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = T & S;
  stk1 = D | stk2;
  stk1 = ~stk1;
  return (stk1 & S) | (stk1 & (~T)) | (T & (~S) & D);
}


x86 assembly (clang, -O0):
<xrop3_21_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_21_0_1>:
mov    %edi,%ecx
shl    $0x8,%ecx
not    %edi
and    %esi,%edi
mov    %esi,%eax
shl    $0x8,%eax
mov    %eax,%edx
not    %edx
and    %ecx,%edx
xor    $0xffffff00,%eax
or     %edx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_21_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %7
%23 = load i32, i32* %6
%24 = and i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %5
%26 = load i32, i32* %9
%27 = or i32 %25, %26
store i32 %27, i32* %8
%28 = load i32, i32* %8
%29 = xor i32 %28, -1
store i32 %29, i32* %8
%30 = load i32, i32* %8
%31 = load i32, i32* %6
%32 = and i32 %30, %31
%33 = load i32, i32* %8
%34 = load i32, i32* %7
%35 = xor i32 %34, -1
%36 = and i32 %33, %35
%37 = or i32 %32, %36
%38 = load i32, i32* %7
%39 = load i32, i32* %6
%40 = xor i32 %39, -1
%41 = and i32 %38, %40
%42 = load i32, i32* %5
%43 = and i32 %41, %42
%44 = or i32 %37, %43
ret i32 %44
}

LLVM IR (-O2):
define i32 @xrop3_21_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = zext i8 %1 to i32
%6 = shl nuw nsw i32 %5, 8
%7 = xor i32 %6, -1
%8 = and i32 %4, %7
%9 = xor i32 %6, -256
%10 = or i32 %8, %9
%11 = xor i32 %3, -1
%12 = and i32 %11, %5
%13 = or i32 %10, %12
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, ...);
int main() {
  int v1;
  int v2;
  int vsum;
  int all_in_one = 5;
  v1 = 1;
  v2 = 2;
  vsum = v1 + v2;
  printf("The sum of %i and %i is %i\n", v1, v2, vsum);
  printf("all_in_one => %i\n", all_in_one);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x5,-0x10(%rbp)
movl   $0x1,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
lea    0xeba(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%esi
lea    0xec5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1,%esi
mov    $0x2,%edx
mov    $0x3,%ecx
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xee7(%rip),%rdi
mov    $0x5,%esi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"The sum of %i and %i is %i\0A\00"
@.str.1 = [18 x i8] c"all_in_one => %i\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 5, i32* %4
store i32 1, i32* %1
store i32 2, i32* %2
%5 = load i32, i32* %1
%6 = load i32, i32* %2
%7 = add nsw i32 %5, %6
store i32 %7, i32* %3
%8 = load i32, i32* %1
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %8, i32 %9, i32 %10)
%12 = load i32, i32* %4
%13 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0), i32 %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [28 x i8] c"The sum of %i and %i is %i\0A\00"
@.str.1 = [18 x i8] c"all_in_one => %i\0A\00"
define i32 @main() {
%1 = tail call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 1, i32 2, i32 3)
%2 = tail call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0), i32 5)
ret i32 0
}
int test_imm_F2uint8_mem(unsigned char *val) {
  return ((*val) & (0xF2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F2uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xf2,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F2uint8_mem>:
testb  $0xf2,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F2uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 242
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_F2uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -14
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void RTDbgModCreateDeferred(void) {}


x86 assembly (clang, -O0):
<RTDbgModCreateDeferred>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTDbgModCreateDeferred>:
ret

LLVM IR (-O0):
define void @RTDbgModCreateDeferred() {
ret void
}

LLVM IR (-O2):
define void @RTDbgModCreateDeferred() {
ret void
}
/* Variables and functions */
int SIGINT;
int SIGQUIT;
int /*<<< orphan*/ printf(char *);
void my_func(int sign_no) {
  if (sign_no == SIGINT)
    printf(" i have got SIGINT \n");
  else if (sign_no == SIGQUIT)
    printf("i have got SIGQUIT\n");
}


x86 assembly (clang, -O0):
<my_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ec3(%rip),%rcx
cmp    (%rcx),%eax
jne    113e <my_func+0x2e>
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
jmp    1161 <my_func+0x51>
mov    -0x4(%rbp),%eax
mov    0x2e98(%rip),%rcx
cmp    (%rcx),%eax
jne    115c <my_func+0x4c>
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
jmp    1161 <my_func+0x51>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_func>:
mov    0x2ed1(%rip),%rax
cmp    %edi,(%rax)
jne    1127 <my_func+0x17>
lea    0xef1(%rip),%rdi
jmp    1030 <puts@plt>
mov    0x2eb2(%rip),%rax
cmp    %edi,(%rax)
jne    113e <my_func+0x2e>
lea    0xec7(%rip),%rdi
jmp    1030 <puts@plt>
ret

LLVM IR (-O0):
@SIGINT = global i32 0
@.str = [21 x i8] c" i have got SIGINT \0A\00"
@SIGQUIT = global i32 0
@.str.1 = [20 x i8] c"i have got SIGQUIT\0A\00"
define void @my_func(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIGINT
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
br label %15
8: ; preds = %1
%9 = load i32, i32* %2
%10 = load i32, i32* @SIGQUIT
%11 = icmp eq i32 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0))
br label %14
14: ; preds = %12, %8
br label %15
15: ; preds = %14, %6
ret void
}

LLVM IR (-O2):
@SIGINT = global i32 0
@SIGQUIT = global i32 0
@str = [19 x i8] c"i have got SIGQUIT\00"
@str.2 = [20 x i8] c" i have got SIGINT \00"
define void @my_func(i32 %0) {
%2 = load i32, i32* @SIGINT
%3 = icmp eq i32 %2, %0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = load i32, i32* @SIGQUIT
%6 = icmp eq i32 %5, %0
br i1 %6, label %7, label %10
7: ; preds = %4, %1
%8 = phi i8* [ getelementptr inbounds ([20 x i8], [20 x i8]* @str.2, i64 0, i64 0), %1 ], [ getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0), %4 ]
%9 = tail call i32 @puts(i8* dereferenceable(1) %8)
br label %10
10: ; preds = %7, %4
ret void
}
void ixp2000_reg_wrb(volatile void *reg, unsigned long val) {
  unsigned long dummy;
  *((volatile unsigned long *)reg) = val;
  dummy = *((volatile unsigned long *)reg);
  __asm__ __volatile__("mov %0, %0" : "+r"(dummy));
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rax
mov    %rax,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    %rsi,(%rdi)
mov    (%rdi),%rax
mov    %rax,%rax
ret

LLVM IR (-O0):
define void @ixp2000_reg_wrb(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i64*
store volatile i64 %6, i64* %8
%9 = load i8*, i8** %3
%10 = bitcast i8* %9 to i64*
%11 = load volatile i64, i64* %10
store i64 %11, i64* %5
%12 = load i64, i64* %5
%13 = call i64 asm sideeffect "mov $0, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i64 %12)
store i64 %13, i64* %5
ret void
}

LLVM IR (-O2):
define void @ixp2000_reg_wrb(i8* %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store volatile i64 %1, i64* %3
%4 = load volatile i64, i64* %3
%5 = tail call i64 asm sideeffect "mov $0, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i64 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ itc_net_close_n_reclose();
int /*<<< orphan*/ itc_net_close_p_multi_times();
int itc_net_close_main(void) {
  itc_net_close_p_multi_times();
  itc_net_close_n_reclose();
  return 0;
}


x86 assembly (clang, -O0):
<itc_net_close_main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <itc_net_close_p_multi_times@plt>
mov    $0x0,%al
call   1030 <itc_net_close_n_reclose@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<itc_net_close_main>:
push   %rax
xor    %eax,%eax
call   1040 <itc_net_close_p_multi_times@plt>
xor    %eax,%eax
call   1030 <itc_net_close_n_reclose@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @itc_net_close_main() {
%1 = call i32 (...) @itc_net_close_p_multi_times()
%2 = call i32 (...) @itc_net_close_n_reclose()
ret i32 0
}

LLVM IR (-O2):
define i32 @itc_net_close_main() {
%1 = tail call i32 (...) @itc_net_close_p_multi_times()
%2 = tail call i32 (...) @itc_net_close_n_reclose()
ret i32 0
}
/* Variables and functions */
int wycc_type_flags(int);
int wycc_type_is_negate(int id) {
  int flgs = wycc_type_flags(id);
  if (flgs & 4) {
    return 1;
  };
  return 0;
}


x86 assembly (clang, -O0):
<wycc_type_is_negate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <wycc_type_flags@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x4,%eax
cmp    $0x0,%eax
je     1141 <wycc_type_is_negate+0x31>
movl   $0x1,-0x4(%rbp)
jmp    1148 <wycc_type_is_negate+0x38>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wycc_type_is_negate>:
push   %rax
call   1030 <wycc_type_flags@plt>
shr    $0x2,%eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @wycc_type_is_negate(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i32 @wycc_type_flags(i32 %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = and i32 %7, 4
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 1, i32* %2
br label %12
11: ; preds = %1
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @wycc_type_is_negate(i32 %0) {
%2 = tail call i32 @wycc_type_flags(i32 %0)
%3 = lshr i32 %2, 2
%4 = and i32 %3, 1
ret i32 %4
}
/* Variables and functions */
int strlen(char *);
char *vfs_basename(char *path) {
  char *bname = path + strlen(path);
  while (*(bname - 1) != '/' && bname >= path) {
    bname--;
  }
  return bname;
}


x86 assembly (clang, -O0):
<vfs_basename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl -0x1(%rax),%ecx
xor    %eax,%eax
cmp    $0x2f,%ecx
mov    %al,-0x19(%rbp)
je     1161 <vfs_basename+0x51>
mov    -0x10(%rbp),%rax
cmp    -0x8(%rbp),%rax
setae  %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
test   $0x1,%al
jne    1171 <vfs_basename+0x61>
jmp    1182 <vfs_basename+0x72>
mov    -0x10(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x10(%rbp)
jmp    113d <vfs_basename+0x2d>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vfs_basename>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
movslq %eax,%rcx
add    %rbx,%rcx
nop
lea    -0x1(%rcx),%rax
cmpb   $0x2f,-0x1(%rcx)
je     1132 <vfs_basename+0x22>
cmp    %rbx,%rcx
mov    %rax,%rcx
jae    1120 <vfs_basename+0x10>
add    $0x1,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @vfs_basename(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %4, i64 %7
store i8* %8, i8** %3
br label %9
9: ; preds = %21, %1
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 -1
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp ne i32 %13, 47
br i1 %14, label %15, label %19
15: ; preds = %9
%16 = load i8*, i8** %3
%17 = load i8*, i8** %2
%18 = icmp uge i8* %16, %17
br label %19
19: ; preds = %15, %9
%20 = phi i1 [ false, %9 ], [ %18, %15 ]
br i1 %20, label %21, label %24
21: ; preds = %19
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i32 -1
store i8* %23, i8** %3
br label %9
24: ; preds = %19
%25 = load i8*, i8** %3
ret i8* %25
}

LLVM IR (-O2):
define i8* @vfs_basename(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = sext i32 %2 to i64
%4 = getelementptr inbounds i8, i8* %0, i64 %3
br label %5
5: ; preds = %5, %1
%6 = phi i8* [ %4, %1 ], [ %7, %5 ]
%7 = getelementptr inbounds i8, i8* %6, i64 -1
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 47
%10 = icmp uge i8* %6, %0
%11 = select i1 %9, i1 %10, i1 false
br i1 %11, label %5, label %12
12: ; preds = %5
ret i8* %6
}
int execle(const char *path, const char *arg0, ...) {
  anvil_syslog(0, "%s unimplemented\n", __FUNCTION__);
  while (1)
    ;
  return 0;
}


x86 assembly (clang, -O0):
<execle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
lea    0xed7(%rip),%rsi
lea    0xee2(%rip),%rdx
mov    $0x0,%al
call   1030 <anvil_syslog@plt>
jmp    1137 <execle+0x27>

x86 assembly (clang, -O2):
<execle>:
push   %rax
lea    0xee8(%rip),%rsi
lea    0xef3(%rip),%rdx
xor    %edi,%edi
xor    %eax,%eax
call   1030 <anvil_syslog@plt>
nopl   0x0(%rax,%rax,1)
jmp    1130 <execle+0x20>

LLVM IR (-O0):
@.str = [18 x i8] c"%s unimplemented\0A\00"
@__FUNCTION__.execle = [7 x i8] c"execle\00"
define i32 @execle(i8* %0, i8* %1, ...) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @__FUNCTION__.execle, i64 0, i64 0))
br label %6
6: ; preds = %2, %6
br label %6
}

LLVM IR (-O2):
@.str = [18 x i8] c"%s unimplemented\0A\00"
@__FUNCTION__.execle = [7 x i8] c"execle\00"
define i32 @execle(i8* nocapture readnone %0, i8* nocapture readnone %1, ...) {
%3 = tail call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @__FUNCTION__.execle, i64 0, i64 0))
br label %4
4: ; preds = %2, %4
br label %4
}
int test_imm_1Cuint8_mem(unsigned char *val) {
  return ((*val) & (0x1C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Cuint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0x1c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Cuint8_mem>:
testb  $0x1c,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Cuint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 28
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_1Cuint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 28
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int test_imm_7Buint8_mem(unsigned char *val) {
  return ((*val) & (0x7B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Buint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0x7b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Buint8_mem>:
testb  $0x7b,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Buint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 123
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_7Buint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 123
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ width;
};
struct TYPE_4__ {
  TYPE_1__ xconfigurerequest;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
int get_XEvent_xconfigurerequest_width(void *_p) {
  return (int)((XEvent *)_p)->xconfigurerequest.width;
}


x86 assembly (clang, -O0):
<get_XEvent_xconfigurerequest_width>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xconfigurerequest_width>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i32 @get_XEvent_xconfigurerequest_width(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_XEvent_xconfigurerequest_width(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
void change_bit(int nr, volatile unsigned long *addr) {
  asm volatile("btcl %1,%0" : "+m"(*(volatile long *)(addr)) : "Ir"(nr));
}


x86 assembly (clang, -O0):
<change_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
btc    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<change_bit>:
btc    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @change_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
%6 = load i32, i32* %3
ret void
}

LLVM IR (-O2):
define void @change_bit(i32 %0, i64* %1) {
tail call void asm sideeffect "btcl $1,$0", "=*m,Ir,*m,~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %1, i32 %0, i64* elementtype(i64) %1)
ret void
}
int power8_offcore_num(void) { return (3); }


x86 assembly (clang, -O0):
<power8_offcore_num>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<power8_offcore_num>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @power8_offcore_num() {
ret i32 3
}

LLVM IR (-O2):
define i32 @power8_offcore_num() {
ret i32 3
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
char *fgets(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ stdin;
int /*<<< orphan*/ stdout;
char *input() {
  static char buf[1024];
  printf("\n> ");
  fflush(stdout);
  return fgets(buf, 1024, stdin);
}


x86 assembly (clang, -O0):
<input>:
push   %rbp
mov    %rsp,%rbp
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e91(%rip),%rax
mov    (%rax),%edi
call   1050 <fflush@plt>
mov    0x2e93(%rip),%rax
mov    (%rax),%edx
lea    0x2ef2(%rip),%rdi
mov    $0x400,%esi
call   1040 <fgets@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<input>:
push   %rax
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e94(%rip),%rax
mov    (%rax),%edi
call   1050 <fflush@plt>
mov    0x2e96(%rip),%rax
mov    (%rax),%edx
lea    0x2ef5(%rip),%rdi
mov    $0x400,%esi
pop    %rax
jmp    1040 <fgets@plt>

LLVM IR (-O0):
@input.buf = internal global [1024 x i8] zeroinitializer
@.str = [4 x i8] c"\0A> \00"
@stdout = global i32 0
@stdin = global i32 0
define i8* @input() {
%1 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @stdout
%3 = call i32 @fflush(i32 %2)
%4 = load i32, i32* @stdin
%5 = call i8* @fgets(i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @input.buf, i64 0, i64 0), i32 1024, i32 %4)
ret i8* %5
}

LLVM IR (-O2):
@input.buf = internal global [1024 x i8] zeroinitializer
@.str = [4 x i8] c"\0A> \00"
@stdout = global i32 0
@stdin = global i32 0
define i8* @input() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @stdout
%3 = tail call i32 @fflush(i32 %2)
%4 = load i32, i32* @stdin
%5 = tail call i8* @fgets(i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @input.buf, i64 0, i64 0), i32 1024, i32 %4)
ret i8* %5
}
char test_45_0(char *mem) { return __atomic_fetch_sub(mem + 4, 1, 4); }


x86 assembly (clang, -O0):
<test_45_0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
movb   $0x1,-0x9(%rbp)
mov    -0x9(%rbp),%al
neg    %al
lock xadd %al,0x4(%rcx)
mov    %al,-0xa(%rbp)
movsbl -0xa(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_45_0>:
mov    $0xff,%al
lock xadd %al,0x4(%rdi)
ret

LLVM IR (-O0):
define signext i8 @test_45_0(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
%4 = alloca i8
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i64 4
store i8 1, i8* %3
%7 = load i8, i8* %3
%8 = atomicrmw sub i8* %6, i8 %7 acq_rel
store i8 %8, i8* %4
%9 = load i8, i8* %4
ret i8 %9
}

LLVM IR (-O2):
define signext i8 @test_45_0(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 4
%3 = atomicrmw sub i8* %2, i8 1 acq_rel
ret i8 %3
}
/* Variables and functions */
size_t strlen(char *);
void strcatc(char *str, char c) {
  str[strlen(str) + 1] = 0;
  str[strlen(str)] = c;
}


x86 assembly (clang, -O0):
<strcatc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,%rcx
mov    -0x28(%rbp),%rax
movb   $0x0,0x1(%rax,%rcx,1)
mov    -0x9(%rbp),%al
mov    %al,-0x19(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x19(%rbp),%dl
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
mov    %dl,(%rax,%rcx,1)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcatc>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <strlen@plt>
movb   $0x0,0x1(%rax,%rbx,1)
mov    %rbx,%rdi
call   1030 <strlen@plt>
mov    %bpl,(%rbx,%rax,1)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @strcatc(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %3
%7 = call i64 @strlen(i8* %6)
%8 = add i64 %7, 1
%9 = getelementptr inbounds i8, i8* %5, i64 %8
store i8 0, i8* %9
%10 = load i8, i8* %4
%11 = load i8*, i8** %3
%12 = load i8*, i8** %3
%13 = call i64 @strlen(i8* %12)
%14 = getelementptr inbounds i8, i8* %11, i64 %13
store i8 %10, i8* %14
ret void
}

LLVM IR (-O2):
define void @strcatc(i8* nocapture %0, i8 signext %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = add i64 %3, 1
%5 = getelementptr inbounds i8, i8* %0, i64 %4
store i8 0, i8* %5
%6 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%7 = getelementptr inbounds i8, i8* %0, i64 %6
store i8 %1, i8* %7
ret void
}
unsigned darken_input_fmts() { return (1 << 1) | (1 << 0); }


x86 assembly (clang, -O0):
<darken_input_fmts>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<darken_input_fmts>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @darken_input_fmts() {
ret i32 3
}

LLVM IR (-O2):
define i32 @darken_input_fmts() {
ret i32 3
}
void _uart_init() {
  int divisor;
  *((volatile unsigned char *)(0x90000000 + 2)) = 0x01 | 0x02 | 0x04 | 0xC0;
  *((volatile unsigned char *)(0x90000000 + 1)) = 0x00;
  *((volatile unsigned char *)(0x90000000 + 3)) = 0x03 & ~(0x04 | 0x08);
  divisor = 25000000 / (16 * 115200);
  *((volatile unsigned char *)(0x90000000 + 3)) |= 0x80;
  *((volatile unsigned char *)(0x90000000 + 0)) = divisor & 0x000000ff;
  *((volatile unsigned char *)(0x90000000 + 1)) = (divisor >> 8) & 0x000000ff;
  *((volatile unsigned char *)(0x90000000 + 3)) &= ~(0x80);
}


x86 assembly (clang, -O0):
<_uart_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x90000002,%eax
movb   $0xc7,(%rax)
mov    $0x90000001,%eax
movb   $0x0,(%rax)
mov    $0x90000003,%eax
movb   $0x3,(%rax)
movl   $0xd,-0x4(%rbp)
mov    $0x90000003,%eax
mov    (%rax),%al
movzbl %al,%eax
or     $0x80,%eax
mov    %al,%cl
mov    $0x90000003,%eax
mov    %cl,(%rax)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    $0x90000000,%eax
mov    %cl,(%rax)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    %al,%cl
mov    $0x90000001,%eax
mov    %cl,(%rax)
mov    $0x90000003,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0xffffff7f,%eax
mov    %al,%cl
mov    $0x90000003,%eax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_uart_init>:
mov    $0x90000003,%eax
movb   $0xc7,-0x1(%rax)
movb   $0x0,-0x2(%rax)
movb   $0x3,(%rax)
orb    $0x80,(%rax)
movb   $0xd,-0x3(%rax)
movb   $0x0,-0x2(%rax)
andb   $0x7f,(%rax)
ret

LLVM IR (-O0):
define void @_uart_init() {
%1 = alloca i32
store volatile i8 -57, i8* inttoptr (i64 2415919106 to i8*)
store volatile i8 0, i8* inttoptr (i64 2415919105 to i8*)
store volatile i8 3, i8* inttoptr (i64 2415919107 to i8*)
store i32 13, i32* %1
%2 = load volatile i8, i8* inttoptr (i64 2415919107 to i8*)
%3 = zext i8 %2 to i32
%4 = or i32 %3, 128
%5 = trunc i32 %4 to i8
store volatile i8 %5, i8* inttoptr (i64 2415919107 to i8*)
%6 = load i32, i32* %1
%7 = and i32 %6, 255
%8 = trunc i32 %7 to i8
store volatile i8 %8, i8* inttoptr (i64 2415919104 to i8*)
%9 = load i32, i32* %1
%10 = ashr i32 %9, 8
%11 = and i32 %10, 255
%12 = trunc i32 %11 to i8
store volatile i8 %12, i8* inttoptr (i64 2415919105 to i8*)
%13 = load volatile i8, i8* inttoptr (i64 2415919107 to i8*)
%14 = zext i8 %13 to i32
%15 = and i32 %14, -129
%16 = trunc i32 %15 to i8
store volatile i8 %16, i8* inttoptr (i64 2415919107 to i8*)
ret void
}

LLVM IR (-O2):
define void @_uart_init() {
store volatile i8 -57, i8* inttoptr (i64 2415919106 to i8*)
store volatile i8 0, i8* inttoptr (i64 2415919105 to i8*)
store volatile i8 3, i8* inttoptr (i64 2415919107 to i8*)
%1 = load volatile i8, i8* inttoptr (i64 2415919107 to i8*)
%2 = or i8 %1, -128
store volatile i8 %2, i8* inttoptr (i64 2415919107 to i8*)
store volatile i8 13, i8* inttoptr (i64 2415919104 to i8*)
store volatile i8 0, i8* inttoptr (i64 2415919105 to i8*)
%3 = load volatile i8, i8* inttoptr (i64 2415919107 to i8*)
%4 = and i8 %3, 127
store volatile i8 %4, i8* inttoptr (i64 2415919107 to i8*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ hello_world();
int /*<<< orphan*/ printf(char *);
int main() {
  int a;
  int b;
  int c;
  a = 1;
  b = a + 5;
  c = a + b;
  printf("calling sub\n");
  hello_world();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x5,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
lea    0xeb8(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <hello_world@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <hello_world@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"calling sub\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 1, i32* %1
%4 = load i32, i32* %1
%5 = add nsw i32 %4, 5
store i32 %5, i32* %2
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = add nsw i32 %6, %7
store i32 %8, i32* %3
%9 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%10 = call i32 (...) @hello_world()
ret i32 0
}

LLVM IR (-O2):
@str = [12 x i8] c"calling sub\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @hello_world()
ret i32 0
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
void *malloc(int);
void *__attribute__((malloc)) __dpl_malloc32(int32_t n) {
  void *ptr;
  int32_t *p = NULL;
  ptr = malloc(sizeof(int32_t) * (n + 1));
  if (ptr) {
    p = (int32_t *)ptr;
    p[0] = n;
    p++;
  } else {
  }
  return (void *)p;
}


x86 assembly (clang, -O0):
<__dpl_malloc32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
cltq
shl    $0x2,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1167 <__dpl_malloc32+0x57>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x18(%rbp)
jmp    116c <__dpl_malloc32+0x5c>
jmp    116c <__dpl_malloc32+0x5c>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__dpl_malloc32>:
push   %rbx
mov    %edi,%ebx
lea    0x4(,%rbx,4),%edi
call   1030 <malloc@plt>
test   %rax,%rax
je     112c <__dpl_malloc32+0x1c>
mov    %ebx,(%rax)
add    $0x4,%rax
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define noalias i8* @__dpl_malloc32(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32*
store i32 %0, i32* %2
store i32* null, i32** %4
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 1
%7 = sext i32 %6 to i64
%8 = mul i64 4, %7
%9 = trunc i64 %8 to i32
%10 = call i8* @malloc(i32 %9)
store i8* %10, i8** %3
%11 = load i8*, i8** %3
%12 = icmp ne i8* %11, null
br i1 %12, label %13, label %21
13: ; preds = %1
%14 = load i8*, i8** %3
%15 = bitcast i8* %14 to i32*
store i32* %15, i32** %4
%16 = load i32, i32* %2
%17 = load i32*, i32** %4
%18 = getelementptr inbounds i32, i32* %17, i64 0
store i32 %16, i32* %18
%19 = load i32*, i32** %4
%20 = getelementptr inbounds i32, i32* %19, i32 1
store i32* %20, i32** %4
br label %22
21: ; preds = %1
br label %22
22: ; preds = %21, %13
%23 = load i32*, i32** %4
%24 = bitcast i32* %23 to i8*
ret i8* %24
}

LLVM IR (-O2):
define noalias i8* @__dpl_malloc32(i32 %0) {
%2 = shl i32 %0, 2
%3 = add i32 %2, 4
%4 = tail call i8* @malloc(i32 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = bitcast i8* %4 to i32*
store i32 %0, i32* %7
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = bitcast i32* %8 to i8*
br label %10
10: ; preds = %1, %6
%11 = phi i8* [ %9, %6 ], [ null, %1 ]
ret i8* %11
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ jsend(char const *, int);
int jsock(char const *, int);
void jsendh(const char *jcommand, const char *jhost, int jport) {
  int sock = jsock(jhost, jport);
  jsend(jcommand, sock);
  close(sock);
}


x86 assembly (clang, -O0):
<jsendh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1050 <jsock@plt>
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%esi
call   1040 <jsend@plt>
mov    -0x18(%rbp),%edi
call   1030 <close@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jsendh>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    %rsi,%rdi
mov    %edx,%esi
call   1050 <jsock@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
mov    %eax,%esi
call   1040 <jsend@plt>
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @jsendh(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @jsock(i8* %8, i32 %9)
store i32 %10, i32* %7
%11 = load i8*, i8** %4
%12 = load i32, i32* %7
%13 = call i32 @jsend(i8* %11, i32 %12)
%14 = load i32, i32* %7
%15 = call i32 @close(i32 %14)
ret void
}

LLVM IR (-O2):
define void @jsendh(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @jsock(i8* %1, i32 %2)
%5 = tail call i32 @jsend(i8* %0, i32 %4)
%6 = tail call i32 @close(i32 %4)
ret void
}
int fun920() { return 920; }


x86 assembly (clang, -O0):
<fun920>:
push   %rbp
mov    %rsp,%rbp
mov    $0x398,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun920>:
mov    $0x398,%eax
ret

LLVM IR (-O0):
define i32 @fun920() {
ret i32 920
}

LLVM IR (-O2):
define i32 @fun920() {
ret i32 920
}
/* Variables and functions */
int /*<<< orphan*/ RLIMIT_DATA;
int /*<<< orphan*/ cdecl_func__RLIMIT_DATA(int /*<<< orphan*/);
void cdecl_expr__RLIMIT_DATA() { cdecl_func__RLIMIT_DATA(RLIMIT_DATA); }


x86 assembly (clang, -O0):
<cdecl_expr__RLIMIT_DATA>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <cdecl_func__RLIMIT_DATA@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cdecl_expr__RLIMIT_DATA>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <cdecl_func__RLIMIT_DATA@plt>

LLVM IR (-O0):
@RLIMIT_DATA = global i32 0
define void @cdecl_expr__RLIMIT_DATA() {
%1 = load i32, i32* @RLIMIT_DATA
%2 = call i32 @cdecl_func__RLIMIT_DATA(i32 %1)
ret void
}

LLVM IR (-O2):
@RLIMIT_DATA = global i32 0
define void @cdecl_expr__RLIMIT_DATA() {
%1 = load i32, i32* @RLIMIT_DATA
%2 = tail call i32 @cdecl_func__RLIMIT_DATA(i32 %1)
ret void
}
/* Variables and functions */
int diminuto_ipc_close(int);
int diminuto_ipcl_close(int fd) { return diminuto_ipc_close(fd); }


x86 assembly (clang, -O0):
<diminuto_ipcl_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <diminuto_ipc_close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<diminuto_ipcl_close>:
jmp    1030 <diminuto_ipc_close@plt>

LLVM IR (-O0):
define i32 @diminuto_ipcl_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @diminuto_ipc_close(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @diminuto_ipcl_close(i32 %0) {
%2 = tail call i32 @diminuto_ipc_close(i32 %0)
ret i32 %2
}