xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int prev = 1;
  int cur = 2;
  int sum = 0;
  while (cur < 4000000) {
    sum += cur;
    prev += 2 * cur;
    cur = 2 * prev - cur;
  }
  printf("Problem 2: %d\n", sum);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x3d0900,-0xc(%rbp)
jge    1167 <main+0x57>
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1134 <main+0x24>
mov    -0x10(%rbp),%esi
lea    0xe8f(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
mov    $0x2,%ecx
xor    %esi,%esi
nopl   0x0(%rax)
add    %ecx,%esi
lea    (%rax,%rcx,2),%eax
lea    (%rax,%rax,1),%edx
sub    %ecx,%edx
mov    %edx,%ecx
cmp    $0x3d0900,%edx
jl     1120 <main+0x10>
push   %rax
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Problem 2: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
store i32 2, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %8, %0
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 4000000
br i1 %7, label %8, label %20
8: ; preds = %5
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = add nsw i32 %10, %9
store i32 %11, i32* %4
%12 = load i32, i32* %3
%13 = mul nsw i32 2, %12
%14 = load i32, i32* %2
%15 = add nsw i32 %14, %13
store i32 %15, i32* %2
%16 = load i32, i32* %2
%17 = mul nsw i32 2, %16
%18 = load i32, i32* %3
%19 = sub nsw i32 %17, %18
store i32 %19, i32* %3
br label %5
20: ; preds = %5
%21 = load i32, i32* %4
%22 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %21)
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c"Problem 2: %d\0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %5, %1 ]
%3 = phi i32 [ 2, %0 ], [ %9, %1 ]
%4 = phi i32 [ 1, %0 ], [ %7, %1 ]
%5 = add nsw i32 %2, %3
%6 = shl nsw i32 %3, 1
%7 = add nsw i32 %6, %4
%8 = shl nsw i32 %7, 1
%9 = sub nsw i32 %8, %3
%10 = icmp slt i32 %9, 4000000
br i1 %10, label %1, label %11
11: ; preds = %1
%12 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}
int ftruncate(fd, length) { return -1; }


x86 assembly (clang, -O0):
<ftruncate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ftruncate>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @ftruncate(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 -1
}

LLVM IR (-O2):
define i32 @ftruncate(i32 %0, i32 %1) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ print(int **);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ set_to_zero(int **);
int main() {
  int a[5][3] = {2, 1, 0, 3, 4, 5, 1, 2, 3, 4, 0, 1, 2, 3, 4};
  print(a);
  printf("------------------\n");
  set_to_zero(a);
  print(a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x40(%rbp),%rdi
lea    0xea6(%rip),%rsi
mov    $0x3c,%edx
call   1060 <memcpy@plt>
lea    -0x40(%rbp),%rdi
call   1050 <print@plt>
lea    0xec8(%rip),%rdi
call   1040 <printf@plt>
lea    -0x40(%rbp),%rdi
call   1030 <set_to_zero@plt>
lea    -0x40(%rbp),%rdi
call   1050 <print@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x40,%rsp
movups 0xef0(%rip),%xmm0
movups %xmm0,0x2c(%rsp)
movaps 0xed8(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xebc(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xea0(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1050 <print@plt>
lea    0xec6(%rip),%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1040 <set_to_zero@plt>
mov    %rbx,%rdi
call   1050 <print@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.a = [5 x [3 x i32]] [[3 x i32] [i32 2, i32 1, i32 0], [3 x i32] [i32 3, i32 4, i32 5], [3 x i32] [i32 1, i32 2, i32 3], [3 x i32] [i32 4, i32 0, i32 1], [3 x i32] [i32 2, i32 3, i32 4]]
@.str = [20 x i8] c"------------------\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [5 x [3 x i32]]
store i32 0, i32* %1
%3 = bitcast [5 x [3 x i32]]* %2 to i8*
%4 = getelementptr inbounds [5 x [3 x i32]], [5 x [3 x i32]]* %2, i64 0, i64 0
%5 = bitcast [3 x i32]* %4 to i32**
%6 = call i32 @print(i32** %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%8 = getelementptr inbounds [5 x [3 x i32]], [5 x [3 x i32]]* %2, i64 0, i64 0
%9 = bitcast [3 x i32]* %8 to i32**
%10 = call i32 @set_to_zero(i32** %9)
%11 = getelementptr inbounds [5 x [3 x i32]], [5 x [3 x i32]]* %2, i64 0, i64 0
%12 = bitcast [3 x i32]* %11 to i32**
%13 = call i32 @print(i32** %12)
ret i32 0
}

LLVM IR (-O2):
@__const.main.a = [5 x [3 x i32]] [[3 x i32] [i32 2, i32 1, i32 0], [3 x i32] [i32 3, i32 4, i32 5], [3 x i32] [i32 1, i32 2, i32 3], [3 x i32] [i32 4, i32 0, i32 1], [3 x i32] [i32 2, i32 3, i32 4]]
@str = [19 x i8] c"------------------\00"
define i32 @main() {
%1 = alloca [5 x [3 x i32]]
%2 = bitcast [5 x [3 x i32]]* %1 to i8*
%3 = bitcast [5 x [3 x i32]]* %1 to i32**
%4 = call i32 @print(i32** %3)
%5 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
%6 = call i32 @set_to_zero(i32** %3)
%7 = call i32 @print(i32** %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ EINVAL;
long __fpathconf(int /*<<< orphan*/, int);
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
long int __pathconf(const char *path, int name) {
  if (path == NULL) {
    __set_errno(EINVAL);
    return -1;
  }
  return __fpathconf(0, name);
}


x86 assembly (clang, -O0):
<__pathconf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1155 <__pathconf+0x35>
mov    0x2e9f(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    1163 <__pathconf+0x43>
mov    -0x14(%rbp),%esi
xor    %edi,%edi
call   1040 <__fpathconf@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__pathconf>:
test   %rdi,%rdi
je     112c <__pathconf+0xc>
xor    %edi,%edi
jmp    1040 <__fpathconf@plt>
push   %rax
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffffffffffff,%rax
pop    %rcx
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i64 @__pathconf(i8* %0, i32 %1) {
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i8*, i8** %4
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* @EINVAL
%10 = call i32 @__set_errno(i32 %9)
store i64 -1, i64* %3
br label %14
11: ; preds = %2
%12 = load i32, i32* %5
%13 = call i64 @__fpathconf(i32 0, i32 %12)
store i64 %13, i64* %3
br label %14
14: ; preds = %11, %8
%15 = load i64, i64* %3
ret i64 %15
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i64 @__pathconf(i8* readnone %0, i32 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = load i32, i32* @EINVAL
%6 = tail call i32 @__set_errno(i32 %5)
br label %9
7: ; preds = %2
%8 = tail call i64 @__fpathconf(i32 0, i32 %1)
br label %9
9: ; preds = %7, %4
%10 = phi i64 [ -1, %4 ], [ %8, %7 ]
ret i64 %10
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
typedef int /*<<< orphan*/ __uid_t;
struct TYPE_2__ {
  char *pw_name;
};

/* Variables and functions */
TYPE_1__ *getpwuid(int /*<<< orphan*/);
char *get_pw_name(__uid_t uid) { return getpwuid(uid)->pw_name; }


x86 assembly (clang, -O0):
<get_pw_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <getpwuid@plt>
mov    (%rax),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_pw_name>:
push   %rax
call   1030 <getpwuid@plt>
mov    (%rax),%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i8* }
define i8* @get_pw_name(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call %struct.TYPE_2__* @getpwuid(i32 %3)
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i8*, i8** %5
ret i8* %6
}

LLVM IR (-O2):
%struct.TYPE_2__ = type { i8* }
define i8* @get_pw_name(i32 %0) {
%2 = tail call %struct.TYPE_2__* @getpwuid(i32 %0)
%3 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %2, i64 0, i32 0
%4 = load i8*, i8** %3
ret i8* %4
}
/* Variables and functions */
int rand();
bool randbit() { return ((rand() % 2) == 0) ? false : true; }


x86 assembly (clang, -O0):
<randbit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<randbit>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @randbit() {
%1 = call i32 (...) @rand()
%2 = srem i32 %1, 2
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 0, i32 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @randbit() {
%1 = tail call i32 (...) @rand()
%2 = and i32 %1, 1
ret i32 %2
}
/* Variables and functions */
int cos(double);
double sin(double);
double functionTest2(double x) { return x * sin(x) - 2 * cos(x); }


x86 assembly (clang, -O0):
<functionTest2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <sin@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <cos@plt>
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
shl    $0x1,%eax
cvtsi2sd %eax,%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<functionTest2>:
sub    $0x18,%rsp
movsd  %xmm0,0x8(%rsp)
call   1030 <sin@plt>
movsd  %xmm0,0x10(%rsp)
movsd  0x8(%rsp),%xmm0
call   1040 <cos@plt>
add    %eax,%eax
cvtsi2sd %eax,%xmm1
movsd  0x10(%rsp),%xmm0
mulsd  0x8(%rsp),%xmm0
subsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @functionTest2(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = call double @sin(double %4)
%6 = load double, double* %2
%7 = call i32 @cos(double %6)
%8 = mul nsw i32 2, %7
%9 = sitofp i32 %8 to double
%10 = fneg double %9
%11 = call double @llvm.fmuladd.f64(double %3, double %5, double %10)
ret double %11
}

LLVM IR (-O2):
define double @functionTest2(double %0) {
%2 = tail call double @sin(double %0)
%3 = tail call i32 @cos(double %0)
%4 = shl nsw i32 %3, 1
%5 = sitofp i32 %4 to double
%6 = fneg double %5
%7 = tail call double @llvm.fmuladd.f64(double %0, double %2, double %6)
ret double %7
}
void Back() {}


x86 assembly (clang, -O0):
<Back>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Back>:
ret

LLVM IR (-O0):
define void @Back() {
ret void
}

LLVM IR (-O2):
define void @Back() {
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int set_quaddobl_state_to_silent(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(688, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<set_quaddobl_state_to_silent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x2b0,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_quaddobl_state_to_silent>:
mov    $0x2b0,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @set_quaddobl_state_to_silent() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 688, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @set_quaddobl_state_to_silent() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 688, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
void outb(unsigned char v, int p) {
  __asm__ __volatile__("outb %b0, %w1" : : "a"(v), "Nd"(p));
}


x86 assembly (clang, -O0):
<outb>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x1(%rbp),%al
mov    -0x8(%rbp),%edx
out    %al,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outb>:
mov    %esi,%edx
mov    %edi,%eax
out    %al,(%dx)
ret

LLVM IR (-O0):
define void @outb(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i8, i8* %3
%6 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
define void @outb(i8 zeroext %0, i32 %1) {
tail call void asm sideeffect "outb ${0:b}, ${1:w}", "{ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i8 %0, i32 %1)
ret void
}
/* Variables and functions */
int isprint(unsigned char);
int isprint_c(char c) { return isprint((unsigned char)c); }


x86 assembly (clang, -O0):
<isprint_c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <isprint@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isprint_c>:
movzbl %dil,%edi
jmp    1030 <isprint@plt>

LLVM IR (-O0):
define i32 @isprint_c(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @isprint(i8 zeroext %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @isprint_c(i8 signext %0) {
%2 = tail call i32 @isprint(i8 zeroext %0)
ret i32 %2
}
int A(int i, int j) { return ((i + j) * (i + j + 1) / 2 + i + 1); }


x86 assembly (clang, -O0):
<A>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
add    -0x8(%rbp),%ecx
add    $0x1,%ecx
imul   %ecx,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
add    -0x4(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<A>:
lea    (%rsi,%rdi,1),%eax
lea    (%rsi,%rdi,1),%ecx
add    $0x1,%ecx
imul   %eax,%ecx
mov    %ecx,%eax
shr    $0x1f,%eax
add    %ecx,%eax
sar    %eax
add    %edi,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @A(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = add nsw i32 %8, %9
%11 = add nsw i32 %10, 1
%12 = mul nsw i32 %7, %11
%13 = sdiv i32 %12, 2
%14 = load i32, i32* %3
%15 = add nsw i32 %13, %14
%16 = add nsw i32 %15, 1
ret i32 %16
}

LLVM IR (-O2):
define i32 @A(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
%4 = add nsw i32 %3, 1
%5 = mul nsw i32 %4, %3
%6 = sdiv i32 %5, 2
%7 = add i32 %0, 1
%8 = add i32 %7, %6
ret i32 %8
}
/* Type definitions */
typedef int const __u32;

/* Variables and functions */
__u32 sz_blkceil(const __u32 size, const __u32 blksz) {
  return size == 0 ? blksz : ((size - 1) | (blksz - 1)) + 1;
}


x86 assembly (clang, -O0):
<sz_blkceil>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    111f <sz_blkceil+0x1f>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1133 <sz_blkceil+0x33>
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
or     %ecx,%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sz_blkceil>:
lea    -0x1(%rdi),%ecx
lea    -0x1(%rsi),%eax
or     %ecx,%eax
add    $0x1,%eax
cmp    $0x1,%edi
cmovb  %esi,%eax
ret

LLVM IR (-O0):
define i32 @sz_blkceil(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = load i32, i32* %4
br label %16
9: ; preds = %2
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 1
%12 = load i32, i32* %4
%13 = sub nsw i32 %12, 1
%14 = or i32 %11, %13
%15 = add nsw i32 %14, 1
br label %16
16: ; preds = %9, %7
%17 = phi i32 [ %8, %7 ], [ %15, %9 ]
ret i32 %17
}

LLVM IR (-O2):
define i32 @sz_blkceil(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
%4 = add nsw i32 %0, -1
%5 = add nsw i32 %1, -1
%6 = or i32 %5, %4
%7 = add nsw i32 %6, 1
%8 = select i1 %3, i32 %1, i32 %7
ret i32 %8
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
typedef int /*<<< orphan*/ __uid_t;
struct TYPE_2__ {
  int /*<<< orphan*/ pw_uid;
};

/* Variables and functions */
TYPE_1__ *getpwuid(int /*<<< orphan*/);
__uid_t get_pw_uid(__uid_t uid) { return getpwuid(uid)->pw_uid; }


x86 assembly (clang, -O0):
<get_pw_uid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <getpwuid@plt>
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_pw_uid>:
push   %rax
call   1030 <getpwuid@plt>
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define i32 @get_pw_uid(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call %struct.TYPE_2__* @getpwuid(i32 %3)
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
%struct.TYPE_2__ = type { i32 }
define i32 @get_pw_uid(i32 %0) {
%2 = tail call %struct.TYPE_2__* @getpwuid(i32 %0)
%3 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %2, i64 0, i32 0
%4 = load i32, i32* %3
ret i32 %4
}
int kronecker(int x, int y) {
  if (x == y)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<kronecker>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    1122 <kronecker+0x22>
movl   $0x1,-0x4(%rbp)
jmp    1129 <kronecker+0x29>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kronecker>:
xor    %eax,%eax
cmp    %esi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @kronecker(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp eq i32 %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, i32* %3
br label %11
10: ; preds = %2
store i32 0, i32* %3
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @kronecker(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint32_t;
typedef int uint16_t;

/* Variables and functions */
uint32_t to_time(uint16_t cdn, uint8_t h, uint8_t m, uint8_t s) {
  uint32_t t;
  t = cdn;
  t *= 24;
  t += h;
  t *= 60;
  t += m;
  t *= 60;
  t += s;
  return t;
}


x86 assembly (clang, -O0):
<to_time>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x24(%rbp)
imul   $0x18,-0x24(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x10(%rbp),%rcx
movslq -0x24(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x24(%rbp)
imul   $0x3c,-0x24(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x18(%rbp),%rcx
movslq -0x24(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x24(%rbp)
imul   $0x3c,-0x24(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x20(%rbp),%rcx
movslq -0x24(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<to_time>:
lea    (%rdi,%rdi,2),%eax
lea    (%rsi,%rax,8),%eax
imul   $0x3c,%eax,%eax
add    %eax,%edx
imul   $0x3c,%edx,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @to_time(i32 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i32
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i32
store i32 %0, i32* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%10 = load i32, i32* %5
store i32 %10, i32* %9
%11 = load i32, i32* %9
%12 = mul nsw i32 %11, 24
store i32 %12, i32* %9
%13 = load i64, i64* %6
%14 = load i32, i32* %9
%15 = sext i32 %14 to i64
%16 = add nsw i64 %15, %13
%17 = trunc i64 %16 to i32
store i32 %17, i32* %9
%18 = load i32, i32* %9
%19 = mul nsw i32 %18, 60
store i32 %19, i32* %9
%20 = load i64, i64* %7
%21 = load i32, i32* %9
%22 = sext i32 %21 to i64
%23 = add nsw i64 %22, %20
%24 = trunc i64 %23 to i32
store i32 %24, i32* %9
%25 = load i32, i32* %9
%26 = mul nsw i32 %25, 60
store i32 %26, i32* %9
%27 = load i64, i64* %8
%28 = load i32, i32* %9
%29 = sext i32 %28 to i64
%30 = add nsw i64 %29, %27
%31 = trunc i64 %30 to i32
store i32 %31, i32* %9
%32 = load i32, i32* %9
ret i32 %32
}

LLVM IR (-O2):
define i32 @to_time(i32 %0, i64 %1, i64 %2, i64 %3) {
%5 = mul nsw i32 %0, 24
%6 = trunc i64 %1 to i32
%7 = add i32 %5, %6
%8 = mul nsw i32 %7, 60
%9 = trunc i64 %2 to i32
%10 = add i32 %8, %9
%11 = mul nsw i32 %10, 60
%12 = trunc i64 %3 to i32
%13 = add i32 %11, %12
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ I2C_HAL_SDA_IN_MODE();
void I2C_SDA_HIGH(void) { I2C_HAL_SDA_IN_MODE(); }


x86 assembly (clang, -O0):
<I2C_SDA_HIGH>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <I2C_HAL_SDA_IN_MODE@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2C_SDA_HIGH>:
xor    %eax,%eax
jmp    1030 <I2C_HAL_SDA_IN_MODE@plt>

LLVM IR (-O0):
define void @I2C_SDA_HIGH() {
%1 = call i32 (...) @I2C_HAL_SDA_IN_MODE()
ret void
}

LLVM IR (-O2):
define void @I2C_SDA_HIGH() {
%1 = tail call i32 (...) @I2C_HAL_SDA_IN_MODE()
ret void
}
const char *ucdn_get_unicode_version(void) { return "8.0.0"; }


x86 assembly (clang, -O0):
<ucdn_get_unicode_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ucdn_get_unicode_version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"8.0.0\00"
define i8* @ucdn_get_unicode_version() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"8.0.0\00"
define i8* @ucdn_get_unicode_version() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
int RANK_Y(int sq) { return sq >> 4; }


x86 assembly (clang, -O0):
<RANK_Y>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RANK_Y>:
mov    %edi,%eax
sar    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @RANK_Y(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 4
ret i32 %4
}

LLVM IR (-O2):
define i32 @RANK_Y(i32 %0) {
%2 = ashr i32 %0, 4
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_rcp_ss(int /*<<< orphan*/);
__m128 test_rcp_ss(__m128 x) { return _mm_rcp_ss(x); }


x86 assembly (clang, -O0):
<test_rcp_ss>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_mm_rcp_ss@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_rcp_ss>:
jmp    1030 <_mm_rcp_ss@plt>

LLVM IR (-O0):
define i32 @test_rcp_ss(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_mm_rcp_ss(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test_rcp_ss(i32 %0) {
%2 = tail call i32 @_mm_rcp_ss(i32 %0)
ret i32 %2
}
void ff_hevc_put_hevc_bi_w_pel_pixels4_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_pel_pixels4_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_pel_pixels4_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_pel_pixels4_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_pel_pixels4_12_sse4() {
ret void
}
int ls_costN_nm6_n_out(void) { return 2; }


x86 assembly (clang, -O0):
<ls_costN_nm6_n_out>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_costN_nm6_n_out>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @ls_costN_nm6_n_out() {
ret i32 2
}

LLVM IR (-O2):
define i32 @ls_costN_nm6_n_out() {
ret i32 2
}
void gtk_expander_get_expanded() {}


x86 assembly (clang, -O0):
<gtk_expander_get_expanded>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_expander_get_expanded>:
ret

LLVM IR (-O0):
define void @gtk_expander_get_expanded() {
ret void
}

LLVM IR (-O2):
define void @gtk_expander_get_expanded() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0x20() {
  Assert_real((isupper(32) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              165, ("isupper should be 0 for  "));
}


x86 assembly (clang, -O0):
<t_isupper_0x20>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xa5,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0x20>:
push   %rax
mov    $0x20,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0xa5,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [26 x i8] c"isupper should be 0 for \00"
define void @t_isupper_0x20() {
%1 = call i64 @isupper(i32 32)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 165, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [26 x i8] c"isupper should be 0 for \00"
define void @t_isupper_0x20() {
%1 = tail call i64 @isupper(i32 32)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 165, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void _clean_fsmev(void *input) {
  if (input)
    free(input);
}


x86 assembly (clang, -O0):
<_clean_fsmev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <_clean_fsmev+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_clean_fsmev>:
test   %rdi,%rdi
je     111a <_clean_fsmev+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @_clean_fsmev(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @_clean_fsmev(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
double Normal(double, double);
double Chisquare(long n) {
  long i;
  double z, x = 0.0;
  for (i = 0; i < n; i++) {
    z = Normal(0.0, 1.0);
    x += z * z;
  }
  return (x);
}


x86 assembly (clang, -O0):
<Chisquare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x20(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x8(%rbp),%rax
jge    117c <Chisquare+0x6c>
xorps  %xmm0,%xmm0
movsd  0xebb(%rip),%xmm1
call   1030 <Normal@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm2
movsd  -0x20(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    112c <Chisquare+0x1c>
movsd  -0x20(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Chisquare>:
push   %rbx
sub    $0x10,%rsp
test   %rdi,%rdi
jle    1169 <Chisquare+0x59>
mov    %rdi,%rbx
xorpd  %xmm0,%xmm0
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movsd  %xmm0,0x8(%rsp)
xorpd  %xmm0,%xmm0
movsd  0xebe(%rip),%xmm1
call   1030 <Normal@plt>
mulsd  %xmm0,%xmm0
movsd  0x8(%rsp),%xmm1
addsd  %xmm0,%xmm1
movsd  %xmm1,0x8(%rsp)
movsd  0x8(%rsp),%xmm0
add    $0xffffffffffffffff,%rbx
jne    1130 <Chisquare+0x20>
jmp    116d <Chisquare+0x5d>
xorpd  %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define double @Chisquare(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca double
%5 = alloca double
store i64 %0, i64* %2
store double 0.000000e+00, double* %5
store i64 0, i64* %3
br label %6
6: ; preds = %16, %1
%7 = load i64, i64* %3
%8 = load i64, i64* %2
%9 = icmp slt i64 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = call double @Normal(double 0.000000e+00, double 1.000000e+00)
store double %11, double* %4
%12 = load double, double* %4
%13 = load double, double* %4
%14 = load double, double* %5
%15 = call double @llvm.fmuladd.f64(double %12, double %13, double %14)
store double %15, double* %5
br label %16
16: ; preds = %10
%17 = load i64, i64* %3
%18 = add nsw i64 %17, 1
store i64 %18, i64* %3
br label %6
19: ; preds = %6
%20 = load double, double* %5
ret double %20
}

LLVM IR (-O2):
define double @Chisquare(i64 %0) {
%2 = icmp sgt i64 %0, 0
br i1 %2, label %3, label %10
3: ; preds = %1, %3
%4 = phi double [ %7, %3 ], [ 0.000000e+00, %1 ]
%5 = phi i64 [ %8, %3 ], [ 0, %1 ]
%6 = tail call double @Normal(double 0.000000e+00, double 1.000000e+00)
%7 = tail call double @llvm.fmuladd.f64(double %6, double %6, double %4)
%8 = add nuw nsw i64 %5, 1
%9 = icmp eq i64 %8, %0
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi double [ 0.000000e+00, %1 ], [ %7, %3 ]
ret double %11
}
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_eval(int);
scalar_t__ strcmp(char *, char *);
void strcmp_diff_length_1() {
  char *x = "123";
  char *y = "23456";
  clang_analyzer_eval(strcmp(x, y) < 0);
}


x86 assembly (clang, -O0):
<strcmp_diff_length_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <clang_analyzer_eval@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp_diff_length_1>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xed5(%rip),%rsi
call   1030 <strcmp@plt>
shr    $0x3f,%rax
mov    %eax,%edi
pop    %rax
jmp    1040 <clang_analyzer_eval@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"123\00"
@.str.1 = [6 x i8] c"23456\00"
define void @strcmp_diff_length_1() {
%1 = alloca i8*
%2 = alloca i8*
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %1
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %1
%4 = load i8*, i8** %2
%5 = call i64 @strcmp(i8* %3, i8* %4)
%6 = icmp slt i64 %5, 0
%7 = zext i1 %6 to i32
%8 = call i32 @clang_analyzer_eval(i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"123\00"
@.str.1 = [6 x i8] c"23456\00"
define void @strcmp_diff_length_1() {
%1 = tail call i64 @strcmp(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%2 = lshr i64 %1, 63
%3 = trunc i64 %2 to i32
%4 = tail call i32 @clang_analyzer_eval(i32 %3)
ret void
}
/* Variables and functions */
scalar_t__ f(int);
main() {
  return ({
           int i = 5;
           3 + f(i + 1);
         }) +
         2;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
mov    -0x8(%rbp),%edi
add    $0x1,%edi
call   1030 <f@plt>
add    $0x3,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x2,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x6,%edi
call   1030 <f@plt>
add    $0x5,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i64
store i32 0, i32* %1
store i32 5, i32* %2
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
%6 = call i64 @f(i32 %5)
%7 = add nsw i64 3, %6
store i64 %7, i64* %3
%8 = load i64, i64* %3
%9 = add nsw i64 %8, 2
%10 = trunc i64 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @f(i32 6)
%2 = trunc i64 %1 to i32
%3 = add i32 %2, 5
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ setplane_x(unsigned char);
int /*<<< orphan*/ setplane_y(unsigned char);
int /*<<< orphan*/ setplane_z(unsigned char);
void setplane(char axis, unsigned char i) {
  switch (axis) {
  case 1:
    setplane_x(i);
    break;
  case 2:
    setplane_y(i);
    break;
  case 3:
    setplane_z(i);
    break;
  }
}


x86 assembly (clang, -O0):
<setplane>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%eax
mov    %eax,-0x8(%rbp)
sub    $0x1,%eax
je     117b <setplane+0x4b>
jmp    1159 <setplane+0x29>
mov    -0x8(%rbp),%eax
sub    $0x2,%eax
je     1189 <setplane+0x59>
jmp    116a <setplane+0x3a>
mov    -0x8(%rbp),%eax
sub    $0x3,%eax
je     1197 <setplane+0x67>
jmp    11a0 <setplane+0x70>
movzbl -0x2(%rbp),%edi
call   1050 <setplane_x@plt>
jmp    11a0 <setplane+0x70>
movzbl -0x2(%rbp),%edi
call   1030 <setplane_y@plt>
jmp    11a0 <setplane+0x70>
movzbl -0x2(%rbp),%edi
call   1040 <setplane_z@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setplane>:
cmp    $0x3,%edi
je     1148 <setplane+0x18>
cmp    $0x2,%edi
je     1151 <setplane+0x21>
cmp    $0x1,%edi
jne    115a <setplane+0x2a>
movzbl %sil,%edi
jmp    1050 <setplane_x@plt>
movzbl %sil,%edi
jmp    1040 <setplane_z@plt>
movzbl %sil,%edi
jmp    1030 <setplane_y@plt>
ret

LLVM IR (-O0):
define void @setplane(i8 signext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
switch i32 %6, label %16 [
i32 1, label %7
i32 2, label %10
i32 3, label %13
]
7: ; preds = %2
%8 = load i8, i8* %4
%9 = call i32 @setplane_x(i8 zeroext %8)
br label %16
10: ; preds = %2
%11 = load i8, i8* %4
%12 = call i32 @setplane_y(i8 zeroext %11)
br label %16
13: ; preds = %2
%14 = load i8, i8* %4
%15 = call i32 @setplane_z(i8 zeroext %14)
br label %16
16: ; preds = %2, %13, %10, %7
ret void
}

LLVM IR (-O2):
define void @setplane(i8 signext %0, i8 zeroext %1) {
%3 = sext i8 %0 to i32
switch i32 %3, label %10 [
i32 1, label %4
i32 2, label %6
i32 3, label %8
]
4: ; preds = %2
%5 = tail call i32 @setplane_x(i8 zeroext %1)
br label %10
6: ; preds = %2
%7 = tail call i32 @setplane_y(i8 zeroext %1)
br label %10
8: ; preds = %2
%9 = tail call i32 @setplane_z(i8 zeroext %1)
br label %10
10: ; preds = %2, %8, %6, %4
ret void
}
int chk_proc_fpu(void) {
  unsigned long fi;
  __asm__ volatile("mov $1, %%eax\n"
                   "cpuid\n"
                   : "=d"(fi)
                   :
                   : "eax");
  return fi & (1 << 0);
}


x86 assembly (clang, -O0):
<chk_proc_fpu>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
cpuid
mov    %rdx,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<chk_proc_fpu>:
mov    $0x1,%eax
cpuid
mov    %rdx,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @chk_proc_fpu() {
%1 = alloca i64
%2 = call i64 asm sideeffect "mov $$1, %eax\0Acpuid\0A", "={dx},~{eax},~{dirflag},~{fpsr},~{flags}"()
store i64 %2, i64* %1
%3 = load i64, i64* %1
%4 = and i64 %3, 1
%5 = trunc i64 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @chk_proc_fpu() {
%1 = tail call i64 asm sideeffect "mov $$1, %eax\0Acpuid\0A", "={dx},~{eax},~{dirflag},~{fpsr},~{flags}"()
%2 = trunc i64 %1 to i32
%3 = and i32 %2, 1
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int32_t;
struct timespec {
  int dummy;
};

/* Variables and functions */
int FUTEX_WAIT_REQUEUE_PI;
int /*<<< orphan*/ SYS_futex;
int syscall(int /*<<< orphan*/, int /*<<< orphan*/ *, int, int /*<<< orphan*/,
            struct timespec *, int /*<<< orphan*/ *, int /*<<< orphan*/);
int futex_wait_requeue_pi(u_int32_t *uaddr, u_int32_t val, u_int32_t *uaddr2,
                          struct timespec *timeout, int opflags) {
  return syscall(SYS_futex, uaddr, FUTEX_WAIT_REQUEUE_PI | opflags, val,
                 timeout, uaddr2, 0);
}


x86 assembly (clang, -O0):
<futex_wait_requeue_pi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    0x2ea9(%rip),%rax
mov    (%rax),%edx
or     -0x24(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    -0x20(%rbp),%r8
mov    -0x18(%rbp),%r9
xor    %eax,%eax
movl   $0x0,(%rsp)
call   1030 <syscall@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<futex_wait_requeue_pi>:
push   %rax
mov    %rcx,%rax
mov    %rdx,%r9
mov    %esi,%ecx
mov    %rdi,%rsi
mov    0x2eb5(%rip),%rdx
mov    (%rdx),%edi
mov    0x2ebc(%rip),%rdx
or     (%rdx),%r8d
movl   $0x0,(%rsp)
mov    %r8d,%edx
mov    %rax,%r8
call   1030 <syscall@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
@SYS_futex = global i32 0
@FUTEX_WAIT_REQUEUE_PI = global i32 0
define i32 @futex_wait_requeue_pi(i32* %0, i32 %1, i32* %2, %struct.timespec* %3, i32 %4) {
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32*
%9 = alloca %struct.timespec*
%10 = alloca i32
store i32* %0, i32** %6
store i32 %1, i32* %7
store i32* %2, i32** %8
store %struct.timespec* %3, %struct.timespec** %9
store i32 %4, i32* %10
%11 = load i32, i32* @SYS_futex
%12 = load i32*, i32** %6
%13 = load i32, i32* @FUTEX_WAIT_REQUEUE_PI
%14 = load i32, i32* %10
%15 = or i32 %13, %14
%16 = load i32, i32* %7
%17 = load %struct.timespec*, %struct.timespec** %9
%18 = load i32*, i32** %8
%19 = call i32 @syscall(i32 %11, i32* %12, i32 %15, i32 %16, %struct.timespec* %17, i32* %18, i32 0)
ret i32 %19
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@SYS_futex = global i32 0
@FUTEX_WAIT_REQUEUE_PI = global i32 0
define i32 @futex_wait_requeue_pi(i32* %0, i32 %1, i32* %2, %struct.timespec* %3, i32 %4) {
%6 = load i32, i32* @SYS_futex
%7 = load i32, i32* @FUTEX_WAIT_REQUEUE_PI
%8 = or i32 %7, %4
%9 = tail call i32 @syscall(i32 %6, i32* %0, i32 %8, i32 %1, %struct.timespec* %3, i32* %2, i32 0)
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int strcspn(char const *, char const *);
int main() {
  int len;
  const char str1[] = "ABCDEF4960910";
  const char str2[] = "013";
  len = strcspn(str1, str2);
  printf("First matched character is at %d\n", len + 1);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x16(%rbp)
mov    0xec8(%rip),%eax
mov    %eax,-0xe(%rbp)
mov    0xec2(%rip),%ax
mov    %ax,-0xa(%rbp)
mov    0xeba(%rip),%eax
mov    %eax,-0x1a(%rbp)
lea    -0x16(%rbp),%rdi
lea    -0x1a(%rbp),%rsi
call   1040 <strcspn@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
add    $0x1,%esi
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0xa,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.main.str1 = [14 x i8] c"ABCDEF4960910\00"
@__const.main.str2 = [4 x i8] c"013\00"
@.str = [34 x i8] c"First matched character is at %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [14 x i8]
%4 = alloca [4 x i8]
store i32 0, i32* %1
%5 = bitcast [14 x i8]* %3 to i8*
%6 = bitcast [4 x i8]* %4 to i8*
%7 = getelementptr inbounds [14 x i8], [14 x i8]* %3, i64 0, i64 0
%8 = getelementptr inbounds [4 x i8], [4 x i8]* %4, i64 0, i64 0
%9 = call i32 @strcspn(i8* %7, i8* %8)
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
%12 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [34 x i8] c"First matched character is at %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i32 10)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm_setzero_si128();
int /*<<< orphan*/ _mm_unpacklo_epi8(int /*<<< orphan*/, int /*<<< orphan*/);
extern __attribute__((__gnu___, __always___, __artificial__)) __m128i
_MM_CVTEPU8_EPI16(__m128i a) {
  __m128i zero = _mm_setzero_si128();
  return _mm_unpacklo_epi8(a, zero);
}


x86 assembly (clang, -O0):
<_MM_CVTEPU8_EPI16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <_mm_setzero_si128@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_unpacklo_epi8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_MM_CVTEPU8_EPI16>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <_mm_setzero_si128@plt>
mov    %ebx,%edi
mov    %eax,%esi
pop    %rbx
jmp    1030 <_mm_unpacklo_epi8@plt>

LLVM IR (-O0):
define i32 @_MM_CVTEPU8_EPI16(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 (...) @_mm_setzero_si128()
store i32 %4, i32* %3
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = call i32 @_mm_unpacklo_epi8(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @_MM_CVTEPU8_EPI16(i32 %0) {
%2 = tail call i32 (...) @_mm_setzero_si128()
%3 = tail call i32 @_mm_unpacklo_epi8(i32 %0, i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("%07d\n", 1024);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x400,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x400,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%07d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 1024)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%07d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 1024)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ ndelay_on(int);
int open_write(char *);
int /*<<< orphan*/ write(int, char *, int);
void triggerpull() {
  int fd;
  fd = open_write("lock/trigger");
  if (fd >= 0) {
    ndelay_on(fd);
    write(fd, "", 1);
    close(fd);
  }
}


x86 assembly (clang, -O0):
<triggerpull>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xeb1(%rip),%rdi
call   1060 <open_write@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     1185 <triggerpull+0x45>
mov    -0x4(%rbp),%edi
call   1050 <ndelay_on@plt>
mov    -0x4(%rbp),%edi
lea    0xe99(%rip),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
mov    -0x4(%rbp),%edi
call   1040 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<triggerpull>:
push   %rbx
lea    0xeb8(%rip),%rdi
call   1060 <open_write@plt>
test   %eax,%eax
js     1175 <triggerpull+0x35>
mov    %eax,%ebx
mov    %eax,%edi
call   1050 <ndelay_on@plt>
lea    0xeab(%rip),%rsi
mov    %ebx,%edi
mov    $0x1,%edx
call   1030 <write@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <close@plt>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"lock/trigger\00"
@.str.1 = [1 x i8] zeroinitializer
define void @triggerpull() {
%1 = alloca i32
%2 = call i32 @open_write(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %12
5: ; preds = %0
%6 = load i32, i32* %1
%7 = call i32 @ndelay_on(i32 %6)
%8 = load i32, i32* %1
%9 = call i32 @write(i32 %8, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), i32 1)
%10 = load i32, i32* %1
%11 = call i32 @close(i32 %10)
br label %12
12: ; preds = %5, %0
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"lock/trigger\00"
@.str.1 = [1 x i8] zeroinitializer
define void @triggerpull() {
%1 = tail call i32 @open_write(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%2 = icmp sgt i32 %1, -1
br i1 %2, label %3, label %7
3: ; preds = %0
%4 = tail call i32 @ndelay_on(i32 %1)
%5 = tail call i32 @write(i32 %1, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), i32 1)
%6 = tail call i32 @close(i32 %1)
br label %7
7: ; preds = %3, %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void helloworld() { puts("Hello C World\n"); }


x86 assembly (clang, -O0):
<helloworld>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<helloworld>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"Hello C World\0A\00"
define void @helloworld() {
%1 = call i32 @puts(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"Hello C World\0A\00"
define void @helloworld() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int any_decrqss(char const *, char *);
int rpt_DECSLCK(const char *the_title) { return any_decrqss(the_title, " v"); }


x86 assembly (clang, -O0):
<rpt_DECSLCK>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <any_decrqss@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpt_DECSLCK>:
lea    0xee9(%rip),%rsi
jmp    1030 <any_decrqss@plt>

LLVM IR (-O0):
@.str = [3 x i8] c" v\00"
define i32 @rpt_DECSLCK(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @any_decrqss(i8* %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [3 x i8] c" v\00"
define i32 @rpt_DECSLCK(i8* %0) {
%2 = tail call i32 @any_decrqss(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}