xunge/DecIR huggingface dataset:
long __mulpsi3(long a, long b) { return a * b; }


x86 assembly (clang, -O0):
<__mulpsi3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
imul   -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__mulpsi3>:
mov    %rdi,%rax
imul   %rsi,%rax
ret

LLVM IR (-O0):
define i64 @__mulpsi3(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = mul nsw i64 %5, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @__mulpsi3(i64 %0, i64 %1) {
%3 = mul nsw i64 %1, %0
ret i64 %3
}
double map2check_non_det_double() { return 0; }


x86 assembly (clang, -O0):
<map2check_non_det_double>:
push   %rbp
mov    %rsp,%rbp
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<map2check_non_det_double>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @map2check_non_det_double() {
ret double 0.000000e+00
}

LLVM IR (-O2):
define double @map2check_non_det_double() {
ret double 0.000000e+00
}
float fconstrain(float n_var0, float n_var1, float n_var2) {
  if (n_var2 < n_var0) {
    return n_var0;
  } else {
    if (n_var2 > n_var1) {
      return n_var1;
    } else {
      return n_var2;
    }
  }
}


x86 assembly (clang, -O0):
<fconstrain>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  %xmm2,-0x10(%rbp)
movss  -0x10(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1135 <fconstrain+0x35>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    115d <fconstrain+0x5d>
movss  -0x10(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    1153 <fconstrain+0x53>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    115d <fconstrain+0x5d>
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fconstrain>:
minss  %xmm2,%xmm1
cmpltss %xmm0,%xmm2
andps  %xmm2,%xmm0
andnps %xmm1,%xmm2
orps   %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @fconstrain(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
%8 = load float, float* %7
%9 = load float, float* %5
%10 = fcmp olt float %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load float, float* %5
store float %12, float* %4
br label %21
13: ; preds = %3
%14 = load float, float* %7
%15 = load float, float* %6
%16 = fcmp ogt float %14, %15
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = load float, float* %6
store float %18, float* %4
br label %21
19: ; preds = %13
%20 = load float, float* %7
store float %20, float* %4
br label %21
21: ; preds = %19, %17, %11
%22 = load float, float* %4
ret float %22
}

LLVM IR (-O2):
define float @fconstrain(float %0, float %1, float %2) {
%4 = fcmp olt float %2, %0
%5 = fcmp ogt float %2, %1
%6 = select i1 %5, float %1, float %2
%7 = select i1 %4, float %0, float %6
ret float %7
}
/* Type definitions */
struct dirent {
  int dummy;
};
typedef int /*<<< orphan*/ DIR;

/* Variables and functions */
struct dirent *diterate(int /*<<< orphan*/ *, int);
int filecount(DIR *dir, int filter) {
  struct dirent *entry;
  int count = 0;
  while ((entry = diterate(dir, filter))) {
    count++;
  }
  return count;
}


x86 assembly (clang, -O0):
<filecount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <diterate@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
je     114e <filecount+0x3e>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1126 <filecount+0x16>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<filecount>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %rdi,%rbx
mov    $0xffffffff,%ebp
nop
mov    %rbx,%rdi
mov    %r14d,%esi
call   1030 <diterate@plt>
add    $0x1,%ebp
test   %rax,%rax
jne    1120 <filecount+0x10>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
%struct.dirent = type { i32 }
define i32 @filecount(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca %struct.dirent*
%6 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %6
br label %7
7: ; preds = %12, %2
%8 = load i32*, i32** %3
%9 = load i32, i32* %4
%10 = call %struct.dirent* @diterate(i32* %8, i32 %9)
store %struct.dirent* %10, %struct.dirent** %5
%11 = icmp ne %struct.dirent* %10, null
br i1 %11, label %12, label %15
12: ; preds = %7
%13 = load i32, i32* %6
%14 = add nsw i32 %13, 1
store i32 %14, i32* %6
br label %7
15: ; preds = %7
%16 = load i32, i32* %6
ret i32 %16
}

LLVM IR (-O2):
%struct.dirent = type { i32 }
define i32 @filecount(i32* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ 0, %2 ], [ %7, %3 ]
%5 = tail call %struct.dirent* @diterate(i32* %0, i32 %1)
%6 = icmp eq %struct.dirent* %5, null
%7 = add nuw nsw i32 %4, 1
br i1 %6, label %8, label %3
8: ; preds = %3
ret i32 %4
}
void SET_DIGIT(unsigned int *v, int i) {
  v[i / (sizeof(unsigned int) * 8)] |= 1U << (i % (sizeof(unsigned int) * 8));
}


x86 assembly (clang, -O0):
<SET_DIGIT>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movslq -0xc(%rbp),%rax
and    $0x1f,%rax
mov    %eax,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
shr    $0x5,%rcx
or     (%rax,%rcx,4),%edx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SET_DIGIT>:
movslq %esi,%rcx
mov    $0x1,%eax
shl    %cl,%eax
shr    $0x5,%rcx
or     %eax,(%rdi,%rcx,4)
ret

LLVM IR (-O0):
define void @SET_DIGIT(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = sext i32 %5 to i64
%7 = urem i64 %6, 32
%8 = trunc i64 %7 to i32
%9 = shl i32 1, %8
%10 = load i32*, i32** %3
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = udiv i64 %12, 32
%14 = getelementptr inbounds i32, i32* %10, i64 %13
%15 = load i32, i32* %14
%16 = or i32 %15, %9
store i32 %16, i32* %14
ret void
}

LLVM IR (-O2):
define void @SET_DIGIT(i32* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = and i32 %1, 31
%5 = shl nuw i32 1, %4
%6 = lshr i64 %3, 5
%7 = getelementptr inbounds i32, i32* %0, i64 %6
%8 = load i32, i32* %7
%9 = or i32 %8, %5
store i32 %9, i32* %7
ret void
}
void l1_dataB_jump(void) {
  int (*foo)(void);
  foo = (void *)((0xFF900000));
  (*foo)();
}


x86 assembly (clang, -O0):
<l1_dataB_jump>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xff900000,%eax
mov    %rax,-0x8(%rbp)
call   *-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<l1_dataB_jump>:
mov    $0xff900000,%eax
jmp    *%rax

LLVM IR (-O0):
define void @l1_dataB_jump() {
%1 = alloca i32 ()*
store i32 ()* inttoptr (i64 4287627264 to i32 ()*), i32 ()** %1
%2 = load i32 ()*, i32 ()** %1
%3 = call i32 %2()
ret void
}

LLVM IR (-O2):
define void @l1_dataB_jump() {
%1 = tail call i32 inttoptr (i64 4287627264 to i32 ()*)()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ shdr;
typedef int /*<<< orphan*/ Elf32_Shdr;

/* Variables and functions */
int /*<<< orphan*/ memset(char *, int /*<<< orphan*/, int);
int /*<<< orphan*/ write(int, int /*<<< orphan*/ *, int);
void mk_shdr_null(int of) {
  Elf32_Shdr shdr;
  memset((char *)&shdr, 0, sizeof(shdr));
  write(of, &shdr, sizeof(shdr));
}


x86 assembly (clang, -O0):
<mk_shdr_null>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1040 <memset@plt>
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mk_shdr_null>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
lea    0x4(%rsp),%r14
mov    %r14,%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1040 <memset@plt>
mov    %ebx,%edi
mov    %r14,%rsi
mov    $0x4,%edx
call   1030 <write@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @mk_shdr_null(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = bitcast i32* %3 to i8*
%5 = call i32 @memset(i8* %4, i32 0, i32 4)
%6 = load i32, i32* %2
%7 = call i32 @write(i32 %6, i32* %3, i32 4)
ret void
}

LLVM IR (-O2):
define void @mk_shdr_null(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @memset(i8* %3, i32 0, i32 4)
%5 = call i32 @write(i32 %0, i32* %2, i32 4)
ret void
}
/* Variables and functions */
char *malloc(size_t);
int /*<<< orphan*/ strncpy(char *, char const *, size_t);
char *strndup(const char *start, size_t len) {
  char *out = malloc((len + 1) * sizeof(char));
  strncpy(out, start, len);
  out[len] = '\0';
  return out;
}


x86 assembly (clang, -O0):
<strndup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
add    $0x1,%rdi
shl    $0x0,%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <strncpy@plt>
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strndup>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
lea    0x1(%rsi),%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1030 <strncpy@plt>
movb   $0x0,(%rbx,%r15,1)
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @strndup(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = add i64 %6, 1
%8 = mul i64 %7, 1
%9 = call i8* @malloc(i64 %8)
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = load i8*, i8** %3
%12 = load i64, i64* %4
%13 = call i32 @strncpy(i8* %10, i8* %11, i64 %12)
%14 = load i8*, i8** %5
%15 = load i64, i64* %4
%16 = getelementptr inbounds i8, i8* %14, i64 %15
store i8 0, i8* %16
%17 = load i8*, i8** %5
ret i8* %17
}

LLVM IR (-O2):
define i8* @strndup(i8* %0, i64 %1) {
%3 = add i64 %1, 1
%4 = tail call i8* @malloc(i64 %3)
%5 = tail call i32 @strncpy(i8* %4, i8* %0, i64 %1)
%6 = getelementptr inbounds i8, i8* %4, i64 %1
store i8 0, i8* %6
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ test(int);
void minimal() {
  int a = 123;
  int *p = &a;
  test(*p == 123);
  *p = 50;
  test(a == 50);
  test(*p == 50);
  test(a == *p);
}


x86 assembly (clang, -O0):
<minimal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x7b,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpl   $0x7b,(%rax)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <test@plt>
mov    -0x10(%rbp),%rax
movl   $0x32,(%rax)
cmpl   $0x32,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <test@plt>
mov    -0x10(%rbp),%rax
cmpl   $0x32,(%rax)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <test@plt>
mov    -0x4(%rbp),%eax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <test@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<minimal>:
push   %rax
mov    $0x1,%edi
call   1030 <test@plt>
mov    $0x1,%edi
call   1030 <test@plt>
mov    $0x1,%edi
call   1030 <test@plt>
mov    $0x1,%edi
pop    %rax
jmp    1030 <test@plt>

LLVM IR (-O0):
define void @minimal() {
%1 = alloca i32
%2 = alloca i32*
store i32 123, i32* %1
store i32* %1, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 123
%6 = zext i1 %5 to i32
%7 = call i32 @test(i32 %6)
%8 = load i32*, i32** %2
store i32 50, i32* %8
%9 = load i32, i32* %1
%10 = icmp eq i32 %9, 50
%11 = zext i1 %10 to i32
%12 = call i32 @test(i32 %11)
%13 = load i32*, i32** %2
%14 = load i32, i32* %13
%15 = icmp eq i32 %14, 50
%16 = zext i1 %15 to i32
%17 = call i32 @test(i32 %16)
%18 = load i32, i32* %1
%19 = load i32*, i32** %2
%20 = load i32, i32* %19
%21 = icmp eq i32 %18, %20
%22 = zext i1 %21 to i32
%23 = call i32 @test(i32 %22)
ret void
}

LLVM IR (-O2):
define void @minimal() {
%1 = tail call i32 @test(i32 1)
%2 = tail call i32 @test(i32 1)
%3 = tail call i32 @test(i32 1)
%4 = tail call i32 @test(i32 1)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
#define COLOR_BLACK 135
#define COLOR_BLUE 134
#define COLOR_CYAN 133
#define COLOR_GREEN 132
#define COLOR_MAGENTA 131
#define COLOR_RED 130
#define COLOR_WHITE 129
#define COLOR_YELLOW 128
uint8_t ReverseColor(uint8_t value) {
  value &= 0x07;
  switch (value) {
  case COLOR_BLACK:
    return COLOR_WHITE;
    break;
  case COLOR_BLUE:
    return COLOR_YELLOW;
    break;
  case COLOR_GREEN:
    return COLOR_RED;
    break;
  case COLOR_CYAN:
    return COLOR_MAGENTA;
    break;
  case COLOR_RED:
    return COLOR_GREEN;
    break;
  case COLOR_MAGENTA:
    return COLOR_CYAN;
    break;
  case COLOR_YELLOW:
    return COLOR_BLUE;
    break;
  case COLOR_WHITE:
    return COLOR_BLACK;
    break;
  }
  return COLOR_BLACK;
}


x86 assembly (clang, -O0):
<ReverseColor>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x7,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffff80,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x7,%eax
ja     1199 <ReverseColor+0x99>
mov    -0x10(%rbp),%rax
lea    0xed0(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x81,-0x4(%rbp)
jmp    11a0 <ReverseColor+0xa0>
movl   $0x80,-0x4(%rbp)
jmp    11a0 <ReverseColor+0xa0>
movl   $0x82,-0x4(%rbp)
jmp    11a0 <ReverseColor+0xa0>
movl   $0x83,-0x4(%rbp)
jmp    11a0 <ReverseColor+0xa0>
movl   $0x84,-0x4(%rbp)
jmp    11a0 <ReverseColor+0xa0>
movl   $0x85,-0x4(%rbp)
jmp    11a0 <ReverseColor+0xa0>
movl   $0x86,-0x4(%rbp)
jmp    11a0 <ReverseColor+0xa0>
movl   $0x87,-0x4(%rbp)
jmp    11a0 <ReverseColor+0xa0>
movl   $0x87,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReverseColor>:
mov    $0x87,%eax
ret

LLVM IR (-O0):
define i32 @ReverseColor(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = and i32 %4, 7
store i32 %5, i32* %3
%6 = load i32, i32* %3
switch i32 %6, label %15 [
i32 135, label %7
i32 134, label %8
i32 132, label %9
i32 133, label %10
i32 130, label %11
i32 131, label %12
i32 128, label %13
i32 129, label %14
]
7: ; preds = %1
store i32 129, i32* %2
br label %16
8: ; preds = %1
store i32 128, i32* %2
br label %16
9: ; preds = %1
store i32 130, i32* %2
br label %16
10: ; preds = %1
store i32 131, i32* %2
br label %16
11: ; preds = %1
store i32 132, i32* %2
br label %16
12: ; preds = %1
store i32 133, i32* %2
br label %16
13: ; preds = %1
store i32 134, i32* %2
br label %16
14: ; preds = %1
store i32 135, i32* %2
br label %16
15: ; preds = %1
store i32 135, i32* %2
br label %16
16: ; preds = %15, %14, %13, %12, %11, %10, %9, %8, %7
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @ReverseColor(i32 %0) {
ret i32 135
}
__attribute__((no, noclone)) unsigned __int128 t158_3add(signed __int128 y) {
  unsigned __int128 r;
  if (__builtin_add_overflow((signed __int128)(3), y, &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t158_3add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rdx
mov    -0x28(%rbp),%rcx
mov    %rcx,%r9
sar    $0x3f,%r9
add    $0x3,%rdx
adc    $0x0,%rcx
mov    %r9,%r8
adc    $0x0,%r8
adc    $0x0,%r9
mov    %r8d,%eax
and    $0x1,%eax
mov    %eax,%esi
mov    %rsi,%rax
neg    %rax
mov    %rax,%rdi
xor    %r9,%rdi
xor    %r8,%rax
or     %rdi,%rax
or     %rsi,%rax
setne  %al
mov    %rdx,-0x40(%rbp)
mov    %rcx,-0x38(%rbp)
test   $0x1,%al
jne    1187 <t158_3add+0x77>
jmp    118e <t158_3add+0x7e>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t158_3add>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
add    $0x3,%r14
mov    %rsi,%rbx
adc    $0x0,%rbx
mov    $0xfffffffffffffffc,%rax
cmp    %rdi,%rax
mov    $0xffffffffffffffff,%rax
sbb    %rsi,%rax
jl     113f <t158_3add+0x2f>
xor    %eax,%eax
call   1030 <bar@plt>
mov    %r14,%rax
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define { i64, i64 } @t158_3add(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = bitcast i128* %4 to { i64, i64 }*
%8 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 0
store i64 %0, i64* %8
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 1
store i64 %1, i64* %9
%10 = load i128, i128* %4
store i128 %10, i128* %5
%11 = load i128, i128* %5
%12 = sext i128 %11 to i129
%13 = call { i129, i1 } @llvm.sadd.with.overflow.i129(i129 3, i129 %12)
%14 = extractvalue { i129, i1 } %13, 1
%15 = extractvalue { i129, i1 } %13, 0
%16 = trunc i129 %15 to i128
%17 = zext i128 %16 to i129
%18 = icmp ne i129 %15, %17
%19 = or i1 %14, %18
store i128 %16, i128* %6
br i1 %19, label %20, label %22
20: ; preds = %2
%21 = call i32 (...) @bar()
br label %22
22: ; preds = %20, %2
%23 = load i128, i128* %6
store i128 %23, i128* %3
%24 = bitcast i128* %3 to { i64, i64 }*
%25 = load { i64, i64 }, { i64, i64 }* %24
ret { i64, i64 } %25
}

LLVM IR (-O2):
define { i64, i64 } @t158_3add(i64 %0, i64 %1) {
%3 = zext i64 %1 to i128
%4 = shl nuw i128 %3, 64
%5 = zext i64 %0 to i128
%6 = or i128 %4, %5
%7 = zext i128 %6 to i129
%8 = add nuw i129 %7, 3
%9 = icmp slt i128 %6, -3
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = tail call i32 (...) @bar()
br label %12
12: ; preds = %10, %2
%13 = trunc i129 %8 to i64
%14 = lshr i129 %8, 64
%15 = trunc i129 %14 to i64
%16 = insertvalue { i64, i64 } poison, i64 %13, 0
%17 = insertvalue { i64, i64 } %16, i64 %15, 1
ret { i64, i64 } %17
}
/* Variables and functions */
int /*<<< orphan*/ uart_send(int);
int uart_putc(int c) {
  if (c == '\n') {
    uart_send('\r');
  }
  uart_send(c);
  return 0;
}


x86 assembly (clang, -O0):
<uart_putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jne    112f <uart_putc+0x1f>
mov    $0xd,%edi
call   1030 <uart_send@plt>
mov    -0x4(%rbp),%edi
call   1030 <uart_send@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_putc>:
push   %rbx
mov    %edi,%ebx
cmp    $0xa,%edi
jne    1122 <uart_putc+0x12>
mov    $0xd,%edi
call   1030 <uart_send@plt>
mov    %ebx,%edi
call   1030 <uart_send@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @uart_putc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 10
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @uart_send(i32 13)
br label %7
7: ; preds = %5, %1
%8 = load i32, i32* %2
%9 = call i32 @uart_send(i32 %8)
ret i32 0
}

LLVM IR (-O2):
define i32 @uart_putc(i32 %0) {
%2 = icmp eq i32 %0, 10
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @uart_send(i32 13)
br label %5
5: ; preds = %3, %1
%6 = tail call i32 @uart_send(i32 %0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ SetPixel150(unsigned long, unsigned long, unsigned long);
void setpixel(unsigned long x, unsigned long y, unsigned long c) {
  SetPixel150(x, y, c);
}


x86 assembly (clang, -O0):
<setpixel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <SetPixel150@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setpixel>:
jmp    1030 <SetPixel150@plt>

LLVM IR (-O0):
define void @setpixel(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = call i32 @SetPixel150(i64 %7, i64 %8, i64 %9)
ret void
}

LLVM IR (-O2):
define void @setpixel(i64 %0, i64 %1, i64 %2) {
%4 = tail call i32 @SetPixel150(i64 %0, i64 %1, i64 %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ hash_bytes(char const *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char const *);
uint64_t hash_string(const char *s) { return hash_bytes(s, strlen(s)); }


x86 assembly (clang, -O0):
<hash_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1040 <hash_bytes@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_string>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <hash_bytes@plt>

LLVM IR (-O0):
define i32 @hash_string(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = call i32 @hash_bytes(i8* %3, i32 %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @hash_string(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32 @hash_bytes(i8* %0, i32 %2)
ret i32 %3
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int _IO_read_end;
  int _IO_read_ptr;
};

/* Variables and functions */
int /*<<< orphan*/ getchar();
TYPE_1__ *stdin;
void fflushin(void) {
  int aux, i;
  aux = stdin->_IO_read_end - stdin->_IO_read_ptr;
  for (i = 0; i < aux; i++)
    getchar();
}


x86 assembly (clang, -O0):
<fflushin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec9(%rip),%rax
mov    (%rax),%rax
mov    (%rax),%eax
mov    0x2ebd(%rip),%rcx
mov    (%rcx),%rcx
sub    0x4(%rcx),%eax
mov    %eax,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    115c <fflushin+0x4c>
mov    $0x0,%al
call   1030 <getchar@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    113b <fflushin+0x2b>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fflushin>:
push   %rbx
mov    0x2ed0(%rip),%rax
mov    (%rax),%rax
mov    (%rax),%ebx
sub    0x4(%rax),%ebx
test   %ebx,%ebx
jle    113c <fflushin+0x2c>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
xor    %eax,%eax
call   1030 <getchar@plt>
add    $0xffffffff,%ebx
jne    1130 <fflushin+0x20>
pop    %rbx
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32, i32 }
@stdin = global %struct.TYPE_2__* null
define void @fflushin() {
%1 = alloca i32
%2 = alloca i32
%3 = load %struct.TYPE_2__*, %struct.TYPE_2__** @stdin
%4 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %3, i32 0, i32 0
%5 = load i32, i32* %4
%6 = load %struct.TYPE_2__*, %struct.TYPE_2__** @stdin
%7 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %6, i32 0, i32 1
%8 = load i32, i32* %7
%9 = sub nsw i32 %5, %8
store i32 %9, i32* %1
store i32 0, i32* %2
br label %10
10: ; preds = %16, %0
%11 = load i32, i32* %2
%12 = load i32, i32* %1
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %19
14: ; preds = %10
%15 = call i32 (...) @getchar()
br label %16
16: ; preds = %14
%17 = load i32, i32* %2
%18 = add nsw i32 %17, 1
store i32 %18, i32* %2
br label %10
19: ; preds = %10
ret void
}

LLVM IR (-O2):
%struct.TYPE_2__ = type { i32, i32 }
@stdin = global %struct.TYPE_2__* null
define void @fflushin() {
%1 = load %struct.TYPE_2__*, %struct.TYPE_2__** @stdin
%2 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %1, i64 0, i32 0
%3 = load i32, i32* %2
%4 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %1, i64 0, i32 1
%5 = load i32, i32* %4
%6 = sub i32 %3, %5
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %0, %8
%9 = phi i32 [ %11, %8 ], [ 0, %0 ]
%10 = tail call i32 (...) @getchar()
%11 = add nuw nsw i32 %9, 1
%12 = icmp eq i32 %11, %6
br i1 %12, label %13, label %8
13: ; preds = %8, %0
ret void
}
int __log2(int value) {
  int value_orig = value;
  int x = 0;
  while (value != 1) {
    value >>= 1;
    x++;
  }
  if (1 << x != value_orig)
    return -1;
  return x;
}


x86 assembly (clang, -O0):
<__log2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
je     1135 <__log2+0x35>
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1114 <__log2+0x14>
mov    -0x10(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cmp    -0xc(%rbp),%eax
je     1154 <__log2+0x54>
movl   $0xffffffff,-0x4(%rbp)
jmp    115a <__log2+0x5a>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__log2>:
xor    %ecx,%ecx
cmp    $0x1,%edi
je     111a <__log2+0x1a>
xor    %ecx,%ecx
mov    %edi,%eax
nopl   0x0(%rax,%rax,1)
sar    %eax
add    $0x1,%ecx
cmp    $0x1,%eax
jne    1110 <__log2+0x10>
mov    $0x1,%eax
shl    %cl,%eax
cmp    %edi,%eax
mov    $0xffffffff,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @__log2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
%6 = load i32, i32* %3
store i32 %6, i32* %4
store i32 0, i32* %5
br label %7
7: ; preds = %10, %1
%8 = load i32, i32* %3
%9 = icmp ne i32 %8, 1
br i1 %9, label %10, label %15
10: ; preds = %7
%11 = load i32, i32* %3
%12 = ashr i32 %11, 1
store i32 %12, i32* %3
%13 = load i32, i32* %5
%14 = add nsw i32 %13, 1
store i32 %14, i32* %5
br label %7
15: ; preds = %7
%16 = load i32, i32* %5
%17 = shl i32 1, %16
%18 = load i32, i32* %4
%19 = icmp ne i32 %17, %18
br i1 %19, label %20, label %21
20: ; preds = %15
store i32 -1, i32* %2
br label %23
21: ; preds = %15
%22 = load i32, i32* %5
store i32 %22, i32* %2
br label %23
23: ; preds = %21, %20
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @__log2(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = ashr i32 %5, 1
%7 = add nuw nsw i32 %4, 1
%8 = icmp eq i32 %6, 1
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %7, %3 ]
%11 = shl nuw i32 1, %10
%12 = icmp eq i32 %11, %0
%13 = select i1 %12, i32 %10, i32 -1
ret i32 %13
}
int foo(int a, int b) { return a * a + b * b; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   -0x8(%rbp),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
imul   %edi,%edi
imul   %esi,%esi
lea    (%rsi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %3
%7 = mul nsw i32 %5, %6
%8 = load i32, i32* %4
%9 = load i32, i32* %4
%10 = mul nsw i32 %8, %9
%11 = add nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i32 %1) {
%3 = mul nsw i32 %0, %0
%4 = mul nsw i32 %1, %1
%5 = add nuw nsw i32 %4, %3
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ __ESBMC_assume(char *);
int /*<<< orphan*/ free(char *);
char *malloc(int);
int func() {
  char *memoryArea = malloc(10);
  __ESBMC_assume(memoryArea);
  char *newArea = malloc(10);
  __ESBMC_assume(newArea);
  memoryArea = newArea;
  free(memoryArea);
}


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0xa,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <__ESBMC_assume@plt>
mov    $0xa,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <__ESBMC_assume@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
push   %rbx
mov    $0xa,%edi
call   1050 <malloc@plt>
mov    %rax,%rdi
call   1040 <__ESBMC_assume@plt>
mov    $0xa,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <__ESBMC_assume@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define i32 @func() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
%4 = call i8* @malloc(i32 10)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @__ESBMC_assume(i8* %5)
%7 = call i8* @malloc(i32 10)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = call i32 @__ESBMC_assume(i8* %8)
%10 = load i8*, i8** %3
store i8* %10, i8** %2
%11 = load i8*, i8** %2
%12 = call i32 @free(i8* %11)
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @func() {
%1 = tail call dereferenceable_or_null(10) i8* @malloc(i32 10)
%2 = tail call i32 @__ESBMC_assume(i8* %1)
%3 = tail call dereferenceable_or_null(10) i8* @malloc(i32 10)
%4 = tail call i32 @__ESBMC_assume(i8* %3)
%5 = tail call i32 @free(i8* %3)
ret i32 undef
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void mp2vseq_set_bitrate(uint8_t *p_mp2vseq, uint32_t i_bitrate) {
  p_mp2vseq[8] = i_bitrate >> 10;
  p_mp2vseq[9] = (i_bitrate >> 2) & 0xff;
  p_mp2vseq[10] &= 0x3f;
  p_mp2vseq[10] |= (i_bitrate << 6) & 0xff;
}


x86 assembly (clang, -O0):
<mp2vseq_set_bitrate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
sar    $0xa,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x20(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x2,%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x24(%rax)
mov    -0x8(%rbp),%rax
mov    0x28(%rax),%ecx
and    $0x3f,%ecx
mov    %ecx,0x28(%rax)
mov    -0xc(%rbp),%ecx
shl    $0x6,%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
or     0x28(%rax),%ecx
mov    %ecx,0x28(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp2vseq_set_bitrate>:
mov    %esi,%eax
sar    $0xa,%eax
mov    %eax,0x20(%rdi)
mov    %esi,%eax
shr    $0x2,%eax
movzbl %al,%eax
mov    %eax,0x24(%rdi)
mov    0x28(%rdi),%eax
and    $0x3f,%eax
shl    $0x6,%esi
movzbl %sil,%ecx
or     %eax,%ecx
mov    %ecx,0x28(%rdi)
ret

LLVM IR (-O0):
define void @mp2vseq_set_bitrate(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 10
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 8
store i32 %6, i32* %8
%9 = load i32, i32* %4
%10 = ashr i32 %9, 2
%11 = and i32 %10, 255
%12 = load i32*, i32** %3
%13 = getelementptr inbounds i32, i32* %12, i64 9
store i32 %11, i32* %13
%14 = load i32*, i32** %3
%15 = getelementptr inbounds i32, i32* %14, i64 10
%16 = load i32, i32* %15
%17 = and i32 %16, 63
store i32 %17, i32* %15
%18 = load i32, i32* %4
%19 = shl i32 %18, 6
%20 = and i32 %19, 255
%21 = load i32*, i32** %3
%22 = getelementptr inbounds i32, i32* %21, i64 10
%23 = load i32, i32* %22
%24 = or i32 %23, %20
store i32 %24, i32* %22
ret void
}

LLVM IR (-O2):
define void @mp2vseq_set_bitrate(i32* nocapture %0, i32 %1) {
%3 = ashr i32 %1, 10
%4 = getelementptr inbounds i32, i32* %0, i64 8
store i32 %3, i32* %4
%5 = lshr i32 %1, 2
%6 = and i32 %5, 255
%7 = getelementptr inbounds i32, i32* %0, i64 9
store i32 %6, i32* %7
%8 = getelementptr inbounds i32, i32* %0, i64 10
%9 = load i32, i32* %8
%10 = and i32 %9, 63
%11 = shl i32 %1, 6
%12 = and i32 %11, 192
%13 = or i32 %10, %12
store i32 %13, i32* %8
ret void
}
/* Type definitions */
struct parameter {
  int dummy;
};

/* Variables and functions */
int pcommand(int, char *);
int com_open(int p0, struct parameter *param) {
  int retval;
  (void)(param);
  if ((retval = pcommand(p0, "set open")) != 0)
    return retval;
  else
    return 9;
}


x86 assembly (clang, -O0):
<com_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
lea    0xed7(%rip),%rsi
call   1030 <pcommand@plt>
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     1145 <com_open+0x35>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114c <com_open+0x3c>
movl   $0x9,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<com_open>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <pcommand@plt>
test   %eax,%eax
mov    $0x9,%ecx
cmove  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.parameter = type { i32 }
@.str = [9 x i8] c"set open\00"
define i32 @com_open(i32 %0, %struct.parameter* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca %struct.parameter*
%6 = alloca i32
store i32 %0, i32* %4
store %struct.parameter* %1, %struct.parameter** %5
%7 = load %struct.parameter*, %struct.parameter** %5
%8 = load i32, i32* %4
%9 = call i32 @pcommand(i32 %8, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
store i32 %9, i32* %6
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = load i32, i32* %6
store i32 %12, i32* %3
br label %14
13: ; preds = %2
store i32 9, i32* %3
br label %14
14: ; preds = %13, %11
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
%struct.parameter = type { i32 }
@.str = [9 x i8] c"set open\00"
define i32 @com_open(i32 %0, %struct.parameter* nocapture readnone %1) {
%3 = tail call i32 @pcommand(i32 %0, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 9, i32 %3
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(int argc, const char *argv[]) {
  int howICare = 100;
  char null = '\0';
  int dontCare = howICare * null;
  printf("You should care %d%%! \n", dontCare);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x64,-0x14(%rbp)
movb   $0x0,-0x15(%rbp)
mov    -0x14(%rbp),%eax
movsbl -0x15(%rbp),%ecx
imul   %ecx,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%esi
lea    0xeb8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [24 x i8] c"You should care %d%%! \0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i8
%8 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 100, i32* %6
store i8 0, i8* %7
%9 = load i32, i32* %6
%10 = load i8, i8* %7
%11 = sext i8 %10 to i32
%12 = mul nsw i32 %9, %11
store i32 %12, i32* %8
%13 = load i32, i32* %8
%14 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %13)
ret i32 0
}

LLVM IR (-O2):
@.str = [24 x i8] c"You should care %d%%! \0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 0)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ SHA_CTX;

/* Variables and functions */
int /*<<< orphan*/ SHA1_Update(int /*<<< orphan*/ *, void *, size_t);
int write(int, void *, size_t);
int sha1_write(SHA_CTX *ctx, int fd, void *buf, size_t size) {
  SHA1_Update(ctx, buf, size);
  return write(fd, buf, size);
}


x86 assembly (clang, -O0):
<sha1_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1040 <SHA1_Update@plt>
mov    -0xc(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sha1_write>:
push   %rbp
push   %r14
push   %rbx
mov    %rcx,%r14
mov    %rdx,%rbx
mov    %esi,%ebp
mov    %rdx,%rsi
mov    %rcx,%rdx
call   1040 <SHA1_Update@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %r14,%rdx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <write@plt>

LLVM IR (-O0):
define i32 @sha1_write(i32* %0, i32 %1, i8* %2, i64 %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i64
store i32* %0, i32** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%9 = load i32*, i32** %5
%10 = load i8*, i8** %7
%11 = load i64, i64* %8
%12 = call i32 @SHA1_Update(i32* %9, i8* %10, i64 %11)
%13 = load i32, i32* %6
%14 = load i8*, i8** %7
%15 = load i64, i64* %8
%16 = call i32 @write(i32 %13, i8* %14, i64 %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @sha1_write(i32* %0, i32 %1, i8* %2, i64 %3) {
%5 = tail call i32 @SHA1_Update(i32* %0, i8* %2, i64 %3)
%6 = tail call i32 @write(i32 %1, i8* %2, i64 %3)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ vp8_short_fdct4x4_c(short *, short *, int);
void vp8_short_fdct8x4_c(short *input, short *output, int pitch) {
  vp8_short_fdct4x4_c(input, output, pitch);
  vp8_short_fdct4x4_c(input + 4, output + 16, pitch);
}


x86 assembly (clang, -O0):
<vp8_short_fdct8x4_c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <vp8_short_fdct4x4_c@plt>
mov    -0x8(%rbp),%rdi
add    $0x8,%rdi
mov    -0x10(%rbp),%rsi
add    $0x20,%rsi
mov    -0x14(%rbp),%edx
call   1030 <vp8_short_fdct4x4_c@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vp8_short_fdct8x4_c>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
call   1030 <vp8_short_fdct4x4_c@plt>
add    $0x8,%rbp
add    $0x20,%rbx
mov    %rbp,%rdi
mov    %rbx,%rsi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <vp8_short_fdct4x4_c@plt>

LLVM IR (-O0):
define void @vp8_short_fdct8x4_c(i16* %0, i16* %1, i32 %2) {
%4 = alloca i16*
%5 = alloca i16*
%6 = alloca i32
store i16* %0, i16** %4
store i16* %1, i16** %5
store i32 %2, i32* %6
%7 = load i16*, i16** %4
%8 = load i16*, i16** %5
%9 = load i32, i32* %6
%10 = call i32 @vp8_short_fdct4x4_c(i16* %7, i16* %8, i32 %9)
%11 = load i16*, i16** %4
%12 = getelementptr inbounds i16, i16* %11, i64 4
%13 = load i16*, i16** %5
%14 = getelementptr inbounds i16, i16* %13, i64 16
%15 = load i32, i32* %6
%16 = call i32 @vp8_short_fdct4x4_c(i16* %12, i16* %14, i32 %15)
ret void
}

LLVM IR (-O2):
define void @vp8_short_fdct8x4_c(i16* %0, i16* %1, i32 %2) {
%4 = tail call i32 @vp8_short_fdct4x4_c(i16* %0, i16* %1, i32 %2)
%5 = getelementptr inbounds i16, i16* %0, i64 4
%6 = getelementptr inbounds i16, i16* %1, i64 16
%7 = tail call i32 @vp8_short_fdct4x4_c(i16* %5, i16* %6, i32 %2)
ret void
}
void supereagle_generic_output(void *data, unsigned *out_width,
                               unsigned *out_height, unsigned width,
                               unsigned height) {
  *out_width = width * 2;
  *out_height = height * 2;
}


x86 assembly (clang, -O0):
<supereagle_generic_output>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    -0x1c(%rbp),%ecx
shl    $0x1,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x20(%rbp),%ecx
shl    $0x1,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<supereagle_generic_output>:
add    %ecx,%ecx
mov    %ecx,(%rsi)
add    %r8d,%r8d
mov    %r8d,(%rdx)
ret

LLVM IR (-O0):
define void @supereagle_generic_output(i8* %0, i32* %1, i32* %2, i32 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %6
store i32* %1, i32** %7
store i32* %2, i32** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %9
%12 = mul i32 %11, 2
%13 = load i32*, i32** %7
store i32 %12, i32* %13
%14 = load i32, i32* %10
%15 = mul i32 %14, 2
%16 = load i32*, i32** %8
store i32 %15, i32* %16
ret void
}

LLVM IR (-O2):
define void @supereagle_generic_output(i8* nocapture readnone %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2, i32 %3, i32 %4) {
%6 = shl i32 %3, 1
store i32 %6, i32* %1
%7 = shl i32 %4, 1
store i32 %7, i32* %2
ret void
}
/* Variables and functions */
void *_mm_malloc(size_t, int);
void *chgemm_alloc(size_t size) { return _mm_malloc(size, 64); }


x86 assembly (clang, -O0):
<chgemm_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x40,%esi
call   1030 <_mm_malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chgemm_alloc>:
mov    $0x40,%esi
jmp    1030 <_mm_malloc@plt>

LLVM IR (-O0):
define i8* @chgemm_alloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @_mm_malloc(i64 %3, i32 64)
ret i8* %4
}

LLVM IR (-O2):
define i8* @chgemm_alloc(i64 %0) {
%2 = tail call i8* @_mm_malloc(i64 %0, i32 64)
ret i8* %2
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ get_pci_addr(int, int, int, int);
int /*<<< orphan*/ inw(int);
int /*<<< orphan*/ outl(int, int /*<<< orphan*/);
uint16_t pci_read_conf_word(uint8_t bus, uint8_t dev, uint8_t func,
                            uint8_t offset) {
  uint32_t addr = get_pci_addr(bus, dev, func, offset);
  outl(0x0CF8, addr);
  if ((offset & 0x02) == 0)
    return inw(0x0CFC);
  else
    return inw(0x0CFE);
}


x86 assembly (clang, -O0):
<pci_read_conf_word>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x14(%rbp),%ecx
call   1050 <get_pci_addr@plt>
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%esi
mov    $0xcf8,%edi
call   1040 <outl@plt>
mov    -0x14(%rbp),%eax
and    $0x2,%eax
cmp    $0x0,%eax
jne    1186 <pci_read_conf_word+0x56>
mov    $0xcfc,%edi
call   1030 <inw@plt>
mov    %eax,-0x4(%rbp)
jmp    1193 <pci_read_conf_word+0x63>
mov    $0xcfe,%edi
call   1030 <inw@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_read_conf_word>:
push   %rbx
mov    %ecx,%ebx
call   1050 <get_pci_addr@plt>
mov    $0xcf8,%edi
mov    %eax,%esi
call   1040 <outl@plt>
and    $0x2,%ebx
or     $0xcfc,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <inw@plt>

LLVM IR (-O0):
define i32 @pci_read_conf_word(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = call i32 @get_pci_addr(i32 %11, i32 %12, i32 %13, i32 %14)
store i32 %15, i32* %10
%16 = load i32, i32* %10
%17 = call i32 @outl(i32 3320, i32 %16)
%18 = load i32, i32* %9
%19 = and i32 %18, 2
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %23
21: ; preds = %4
%22 = call i32 @inw(i32 3324)
store i32 %22, i32* %5
br label %25
23: ; preds = %4
%24 = call i32 @inw(i32 3326)
store i32 %24, i32* %5
br label %25
25: ; preds = %23, %21
%26 = load i32, i32* %5
ret i32 %26
}

LLVM IR (-O2):
define i32 @pci_read_conf_word(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @get_pci_addr(i32 %0, i32 %1, i32 %2, i32 %3)
%6 = tail call i32 @outl(i32 3320, i32 %5)
%7 = and i32 %3, 2
%8 = or i32 %7, 3324
%9 = tail call i32 @inw(i32 %8)
ret i32 %9
}
int f(int a) {
  if (a != 2) {
    a = a > 0 ? a : -a;
    if (a == 2)
      return 0;
    return 1;
  }
  return 1;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
je     1156 <f+0x56>
cmpl   $0x0,-0x8(%rbp)
jle    1126 <f+0x26>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    112e <f+0x2e>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jne    114a <f+0x4a>
movl   $0x0,-0x4(%rbp)
jmp    115d <f+0x5d>
movl   $0x1,-0x4(%rbp)
jmp    115d <f+0x5d>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
cmp    $0x2,%edi
sete   %al
mov    %edi,%ecx
neg    %ecx
cmovs  %edi,%ecx
cmp    $0x2,%ecx
setne  %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 2
br i1 %5, label %6, label %20
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = load i32, i32* %3
br label %14
11: ; preds = %6
%12 = load i32, i32* %3
%13 = sub nsw i32 0, %12
br label %14
14: ; preds = %11, %9
%15 = phi i32 [ %10, %9 ], [ %13, %11 ]
store i32 %15, i32* %3
%16 = load i32, i32* %3
%17 = icmp eq i32 %16, 2
br i1 %17, label %18, label %19
18: ; preds = %14
store i32 0, i32* %2
br label %21
19: ; preds = %14
store i32 1, i32* %2
br label %21
20: ; preds = %1
store i32 1, i32* %2
br label %21
21: ; preds = %20, %19, %18
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = icmp eq i32 %0, 2
%3 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
%4 = icmp ne i32 %3, 2
%5 = select i1 %2, i1 true, i1 %4
%6 = zext i1 %5 to i32
ret i32 %6
}
void out_word(int port, int value) {
  __asm__("movl	%0, %%eax;		        movl %1, %%edx;		       "
          " outw %%ax, %%dx;"
          :
          : "r"(value), "r"(port)
          : "%eax", "%edx");
}


x86 assembly (clang, -O0):
<out_word>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%esi
mov    %ecx,%eax
mov    %esi,%edx
out    %ax,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<out_word>:
mov    %esi,%eax
mov    %edi,%edx
out    %ax,(%dx)
ret

LLVM IR (-O0):
define void @out_word(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
ret void
}

LLVM IR (-O2):
define void @out_word(i32 %0, i32 %1) {
tail call void asm sideeffect "movl\09$0, %eax;\09\09 movl $1, %edx;\09\09 outw %ax, %dx;", "r,r,~{eax},~{edx},~{dirflag},~{fpsr},~{flags}"(i32 %1, i32 %0)
ret void
}