xunge/DecIR huggingface dataset:
int ast_hashtab_compare_ints(const void *a, const void *b) {
  int ai = *((int *)a);
  int bi = *((int *)b);
  if (ai < bi)
    return -1;
  else if (ai == bi)
    return 0;
  else
    return 1;
}


x86 assembly (clang, -O0):
<ast_hashtab_compare_ints>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x20(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x20(%rbp),%eax
jge    1136 <ast_hashtab_compare_ints+0x36>
movl   $0xffffffff,-0x4(%rbp)
jmp    1155 <ast_hashtab_compare_ints+0x55>
mov    -0x1c(%rbp),%eax
cmp    -0x20(%rbp),%eax
jne    114e <ast_hashtab_compare_ints+0x4e>
movl   $0x0,-0x4(%rbp)
jmp    1155 <ast_hashtab_compare_ints+0x55>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ast_hashtab_compare_ints>:
mov    (%rdi),%eax
xor    %ecx,%ecx
cmp    (%rsi),%eax
setne  %cl
mov    $0xffffffff,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ast_hashtab_compare_ints(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
store i32 %10, i32* %6
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to i32*
%13 = load i32, i32* %12
store i32 %13, i32* %7
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = icmp slt i32 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 -1, i32* %3
br label %24
18: ; preds = %2
%19 = load i32, i32* %6
%20 = load i32, i32* %7
%21 = icmp eq i32 %19, %20
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 0, i32* %3
br label %24
23: ; preds = %18
store i32 1, i32* %3
br label %24
24: ; preds = %23, %22, %17
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @ast_hashtab_compare_ints(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp slt i32 %4, %6
%8 = icmp ne i32 %4, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
/* Type definitions */
struct map_iter {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct map_iter *);
void map_iter_free(struct map_iter *iter) {
  if (iter != NULL)
    free(iter);
}


x86 assembly (clang, -O0):
<map_iter_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <map_iter_free+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<map_iter_free>:
test   %rdi,%rdi
je     111a <map_iter_free+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
%struct.map_iter = type { i32 }
define void @map_iter_free(%struct.map_iter* %0) {
%2 = alloca %struct.map_iter*
store %struct.map_iter* %0, %struct.map_iter** %2
%3 = load %struct.map_iter*, %struct.map_iter** %2
%4 = icmp ne %struct.map_iter* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load %struct.map_iter*, %struct.map_iter** %2
%7 = call i32 @free(%struct.map_iter* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
%struct.map_iter = type { i32 }
define void @map_iter_free(%struct.map_iter* %0) {
%2 = icmp eq %struct.map_iter* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(%struct.map_iter* %0)
br label %5
5: ; preds = %3, %1
ret void
}
int d_le_rr2(double a1, double a2) { return !(((a1) <= (a2))); }


x86 assembly (clang, -O0):
<d_le_rr2>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
setae  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d_le_rr2>:
xor    %eax,%eax
ucomisd %xmm0,%xmm1
setb   %al
ret

LLVM IR (-O0):
define i32 @d_le_rr2(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp ole double %5, %6
%8 = xor i1 %7, true
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @d_le_rr2(double %0, double %1) {
%3 = fcmp ugt double %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
int open(f, m)
char *f;
{ return (0); }


x86 assembly (clang, -O0):
<open>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<open>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @open(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @open(i8* nocapture readnone %0, i32 %1) {
ret i32 0
}
long round_off_heading_int(long n, long m) {
  long unbounded_rounded;
  if (n < 0)
    unbounded_rounded = m * (long)((n - (long)(m / 2)) / m);
  else
    unbounded_rounded = m * (long)((n + (long)(m / 2)) / m);
  return unbounded_rounded;
}


x86 assembly (clang, -O0):
<round_off_heading_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
jge    1159 <round_off_heading_int+0x59>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    $0x2,%ecx
cqto
idiv   %rcx
mov    %rax,%rcx
mov    -0x28(%rbp),%rax
sub    %rcx,%rax
cqto
idivq  -0x10(%rbp)
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
imul   %rcx,%rax
mov    %rax,-0x18(%rbp)
jmp    1196 <round_off_heading_int+0x96>
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x10(%rbp),%rax
mov    $0x2,%ecx
cqto
idiv   %rcx
mov    %rax,%rcx
mov    -0x38(%rbp),%rax
add    %rcx,%rax
cqto
idivq  -0x10(%rbp)
mov    %rax,%rcx
mov    -0x30(%rbp),%rax
imul   %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_off_heading_int>:
mov    %rdi,%rax
not    %rax
shr    $0x3f,%rax
lea    -0x2(,%rax,4),%rcx
ff
mov    %rsi,%rax
or     %rcx,%rax
shr    $0x20,%rax
je     112b <round_off_heading_int+0x2b>
mov    %rsi,%rax
cqto
idiv   %rcx
mov    %rax,%rcx
jmp    1133 <round_off_heading_int+0x33>
mov    %esi,%eax
xor    %edx,%edx
div    %ecx
mov    %eax,%ecx
add    %rdi,%rcx
mov    %rcx,%rax
or     %rsi,%rax
shr    $0x20,%rax
je     114c <round_off_heading_int+0x4c>
mov    %rcx,%rax
cqto
idiv   %rsi
jmp    1152 <round_off_heading_int+0x52>
mov    %ecx,%eax
xor    %edx,%edx
div    %esi
sub    %rdx,%rcx
mov    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @round_off_heading_int(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = icmp slt i64 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %2
%9 = load i64, i64* %4
%10 = load i64, i64* %3
%11 = load i64, i64* %4
%12 = sdiv i64 %11, 2
%13 = sub nsw i64 %10, %12
%14 = load i64, i64* %4
%15 = sdiv i64 %13, %14
%16 = mul nsw i64 %9, %15
store i64 %16, i64* %5
br label %26
17: ; preds = %2
%18 = load i64, i64* %4
%19 = load i64, i64* %3
%20 = load i64, i64* %4
%21 = sdiv i64 %20, 2
%22 = add nsw i64 %19, %21
%23 = load i64, i64* %4
%24 = sdiv i64 %22, %23
%25 = mul nsw i64 %18, %24
store i64 %25, i64* %5
br label %26
26: ; preds = %17, %8
%27 = load i64, i64* %5
ret i64 %27
}

LLVM IR (-O2):
define i64 @round_off_heading_int(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, 0
%4 = select i1 %3, i64 -2, i64 2
%5 = sdiv i64 %1, %4
%6 = add i64 %5, %0
%7 = srem i64 %6, %1
%8 = sub i64 %6, %7
ret i64 %8
}
void voidFunc() {}


x86 assembly (clang, -O0):
<voidFunc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<voidFunc>:
ret

LLVM IR (-O0):
define void @voidFunc() {
ret void
}

LLVM IR (-O2):
define void @voidFunc() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Timemark(short *);
long getNow(void) {
  short v[7];
  Timemark(v);
  return (((long)v[3] * 10000000L) + ((long)v[4] * 100000L) +
          ((long)v[5] * 1000) + (long)v[6]);
}


x86 assembly (clang, -O0):
<getNow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0xe(%rbp),%rdi
call   1030 <Timemark@plt>
movswq -0x8(%rbp),%rax
imul   $0x989680,%rax,%rax
movswq -0x6(%rbp),%rcx
imul   $0x186a0,%rcx,%rcx
add    %rcx,%rax
movswq -0x4(%rbp),%rcx
imul   $0x3e8,%rcx,%rcx
add    %rcx,%rax
movswq -0x2(%rbp),%rcx
add    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getNow>:
sub    $0x18,%rsp
lea    0xa(%rsp),%rdi
call   1030 <Timemark@plt>
movswq 0x10(%rsp),%rax
imul   $0x989680,%rax,%rax
movswq 0x12(%rsp),%rcx
imul   $0x186a0,%rcx,%rcx
add    %rax,%rcx
movswq 0x14(%rsp),%rax
imul   $0x3e8,%rax,%rdx
add    %rcx,%rdx
movswq 0x16(%rsp),%rax
add    %rdx,%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i64 @getNow() {
%1 = alloca [7 x i16]
%2 = getelementptr inbounds [7 x i16], [7 x i16]* %1, i64 0, i64 0
%3 = call i32 @Timemark(i16* %2)
%4 = getelementptr inbounds [7 x i16], [7 x i16]* %1, i64 0, i64 3
%5 = load i16, i16* %4
%6 = sext i16 %5 to i64
%7 = mul nsw i64 %6, 10000000
%8 = getelementptr inbounds [7 x i16], [7 x i16]* %1, i64 0, i64 4
%9 = load i16, i16* %8
%10 = sext i16 %9 to i64
%11 = mul nsw i64 %10, 100000
%12 = add nsw i64 %7, %11
%13 = getelementptr inbounds [7 x i16], [7 x i16]* %1, i64 0, i64 5
%14 = load i16, i16* %13
%15 = sext i16 %14 to i64
%16 = mul nsw i64 %15, 1000
%17 = add nsw i64 %12, %16
%18 = getelementptr inbounds [7 x i16], [7 x i16]* %1, i64 0, i64 6
%19 = load i16, i16* %18
%20 = sext i16 %19 to i64
%21 = add nsw i64 %17, %20
ret i64 %21
}

LLVM IR (-O2):
define i64 @getNow() {
%1 = alloca [7 x i16]
%2 = bitcast [7 x i16]* %1 to i8*
%3 = getelementptr inbounds [7 x i16], [7 x i16]* %1, i64 0, i64 0
%4 = call i32 @Timemark(i16* %3)
%5 = getelementptr inbounds [7 x i16], [7 x i16]* %1, i64 0, i64 3
%6 = load i16, i16* %5
%7 = sext i16 %6 to i64
%8 = mul nsw i64 %7, 10000000
%9 = getelementptr inbounds [7 x i16], [7 x i16]* %1, i64 0, i64 4
%10 = load i16, i16* %9
%11 = sext i16 %10 to i64
%12 = mul nsw i64 %11, 100000
%13 = add nsw i64 %12, %8
%14 = getelementptr inbounds [7 x i16], [7 x i16]* %1, i64 0, i64 5
%15 = load i16, i16* %14
%16 = sext i16 %15 to i64
%17 = mul nsw i64 %16, 1000
%18 = add nsw i64 %13, %17
%19 = getelementptr inbounds [7 x i16], [7 x i16]* %1, i64 0, i64 6
%20 = load i16, i16* %19
%21 = sext i16 %20 to i64
%22 = add nsw i64 %18, %21
ret i64 %22
}
/* Variables and functions */
int /*<<< orphan*/ foo(int *);
int main() {
  int val = 5;
  foo(&val);
  return val;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
call   1030 <foo@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x5,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1030 <foo@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 5, i32* %2
%3 = call i32 @foo(i32* %2)
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 5, i32* %1
%3 = call i32 @foo(i32* %1)
%4 = load i32, i32* %1
ret i32 %4
}
unsigned normal4x_generic_input_fmts(void) { return (1 << 1) | (1 << 0); }


x86 assembly (clang, -O0):
<normal4x_generic_input_fmts>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<normal4x_generic_input_fmts>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @normal4x_generic_input_fmts() {
ret i32 3
}

LLVM IR (-O2):
define i32 @normal4x_generic_input_fmts() {
ret i32 3
}
/* Variables and functions */
void I_BeginRead(void) {}


x86 assembly (clang, -O0):
<I_BeginRead>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I_BeginRead>:
ret

LLVM IR (-O0):
define void @I_BeginRead() {
ret void
}

LLVM IR (-O2):
define void @I_BeginRead() {
ret void
}
int GetDistExtraBitsValue(int dist) {
  if (dist < 5) {
    return 0;
  } else {
    int l = 31 ^ __builtin_clz(dist - 1);
    return (dist - (1 + (1 << l))) & ((1 << (l - 1)) - 1);
  }
}


x86 assembly (clang, -O0):
<GetDistExtraBitsValue>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jge    111d <GetDistExtraBitsValue+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    115a <GetDistExtraBitsValue+0x5a>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
bsr    %eax,%eax
xor    $0x1f,%eax
xor    $0x1f,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
add    $0x1,%ecx
sub    %ecx,%eax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
sub    $0x1,%ecx
and    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetDistExtraBitsValue>:
xor    %eax,%eax
cmp    $0x5,%edi
jl     112a <GetDistExtraBitsValue+0x2a>
lea    -0x1(%rdi),%eax
bsr    %eax,%ecx
mov    $0xfffffffe,%edx
rol    %cl,%edx
mov    %ecx,%eax
xor    $0x1f,%eax
mov    $0x1e,%cl
sub    %al,%cl
mov    $0xffffffff,%eax
shl    %cl,%eax
add    %edi,%edx
not    %eax
and    %edx,%eax
ret

LLVM IR (-O0):
define i32 @GetDistExtraBitsValue(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 5
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %23
8: ; preds = %1
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 1
%11 = call i32 @llvm.ctlz.i32(i32 %10, i1 true)
%12 = xor i32 31, %11
store i32 %12, i32* %4
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = shl i32 1, %14
%16 = add nsw i32 1, %15
%17 = sub nsw i32 %13, %16
%18 = load i32, i32* %4
%19 = sub nsw i32 %18, 1
%20 = shl i32 1, %19
%21 = sub nsw i32 %20, 1
%22 = and i32 %17, %21
store i32 %22, i32* %2
br label %23
23: ; preds = %8, %7
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @GetDistExtraBitsValue(i32 %0) {
%2 = icmp slt i32 %0, 5
br i1 %2, label %14, label %3
3: ; preds = %1
%4 = add nsw i32 %0, -1
%5 = tail call i32 @llvm.ctlz.i32(i32 %4, i1 true)
%6 = xor i32 %5, 31
%7 = shl nuw i32 1, %6
%8 = xor i32 %7, -1
%9 = add i32 %8, %0
%10 = sub nsw i32 30, %5
%11 = shl nsw i32 -1, %10
%12 = xor i32 %11, -1
%13 = and i32 %9, %12
br label %14
14: ; preds = %1, %3
%15 = phi i32 [ %13, %3 ], [ 0, %1 ]
ret i32 %15
}
/* Variables and functions */
int fseek(void *, int, int);
int file_seek(void *f, int offset, int whence) {
  return fseek(f, offset, whence);
}


x86 assembly (clang, -O0):
<file_seek>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <fseek@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_seek>:
jmp    1030 <fseek@plt>

LLVM IR (-O0):
define i32 @file_seek(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @fseek(i8* %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @file_seek(i8* nocapture %0, i32 %1, i32 %2) {
%4 = tail call i32 @fseek(i8* %0, i32 %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
__attribute__((visibility("default"))) const char *
sd_bus_message_get_sender(void *m) {
  return NULL;
}


x86 assembly (clang, -O0):
<sd_bus_message_get_sender>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_message_get_sender>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @sd_bus_message_get_sender(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @sd_bus_message_get_sender(i8* nocapture readnone %0) {
ret i8* null
}
__attribute__((section(".text.dummy"))) void _dummy(void) {
  asm volatile(".long 0x00000000\n"
               ".long 0x00000000\n"
               ".long 0x00000000\n"
               ".long 0x00000000\n"
               ".long 0x00000000\n"
               ".long 0x00000000\n"
               ".long 0x00000000\n"
               ".long 0x00000000\n"
               ".long 0x00000000\n"
               ".long 0x00000000\n"
               ".long 0x00000000\n"
               ".long 0x00000000\n");
}


x86 assembly (clang, -O0):
<_dummy>:
push   %rbp
mov    %rsp,%rbp
...
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dummy>:
...
ret

LLVM IR (-O0):
define void @_dummy() section ".text.dummy" {
ret void
}

LLVM IR (-O2):
define void @_dummy() section ".text.dummy" {
tail call void asm sideeffect ".long 0x00000000\0A.long 0x00000000\0A.long 0x00000000\0A.long 0x00000000\0A.long 0x00000000\0A.long 0x00000000\0A.long 0x00000000\0A.long 0x00000000\0A.long 0x00000000\0A.long 0x00000000\0A.long 0x00000000\0A.long 0x00000000\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
AX0I1(r0, r1, x0, x1, p0, p1) short r0, r1;
short *p0, *p1;
{
  if ((((short *)10000000)[x0]) <= 33)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<AX0I1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
movslq -0xc(%rbp),%rcx
mov    $0x989680,%eax
movswl (%rax,%rcx,2),%eax
cmp    $0x21,%eax
jg     1141 <AX0I1+0x41>
movl   $0x1,-0x4(%rbp)
jmp    1148 <AX0I1+0x48>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<AX0I1>:
movslq %edx,%rcx
xor    %eax,%eax
cmpw   $0x22,0x989680(%rcx,%rcx,1)
setl   %al
ret

LLVM IR (-O0):
define i32 @AX0I1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i32, i32* %10
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i16, i16* inttoptr (i64 10000000 to i16*), i64 %17
%19 = load i16, i16* %18
%20 = sext i16 %19 to i32
%21 = icmp sle i32 %20, 33
br i1 %21, label %22, label %23
22: ; preds = %6
store i32 1, i32* %7
br label %24
23: ; preds = %6
store i32 0, i32* %7
br label %24
24: ; preds = %23, %22
%25 = load i32, i32* %7
ret i32 %25
}

LLVM IR (-O2):
define i32 @AX0I1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture readnone %5) {
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i16, i16* inttoptr (i64 10000000 to i16*), i64 %7
%9 = load i16, i16* %8
%10 = icmp slt i16 %9, 34
%11 = zext i1 %10 to i32
ret i32 %11
}
unsigned int fn1(int p1, int p2) { return 0; }


x86 assembly (clang, -O0):
<fn1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn1>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fn1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @fn1(i32 %0, i32 %1) {
ret i32 0
}
int round_nearest(float f) {
  return ((f < 0) ? ((int)(f - 0.5f)) : ((int)(f + 0.5f)));
}


x86 assembly (clang, -O0):
<round_nearest>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
xorps  %xmm0,%xmm0
ucomiss -0x4(%rbp),%xmm0
jbe    1133 <round_nearest+0x33>
movss  -0x4(%rbp),%xmm0
movss  0xedd(%rip),%xmm1
subss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
mov    %eax,-0x8(%rbp)
jmp    1147 <round_nearest+0x47>
movss  0xec5(%rip),%xmm0
addss  -0x4(%rbp),%xmm0
cvttss2si %xmm0,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_nearest>:
xorps  %xmm1,%xmm1
xor    %eax,%eax
ucomiss %xmm0,%xmm1
seta   %al
lea    0xeee(%rip),%rcx
addss  (%rcx,%rax,4),%xmm0
cvttss2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @round_nearest(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp olt float %3, 0.000000e+00
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load float, float* %2
%7 = fsub float %6, 5.000000e-01
%8 = fptosi float %7 to i32
br label %13
9: ; preds = %1
%10 = load float, float* %2
%11 = fadd float %10, 5.000000e-01
%12 = fptosi float %11 to i32
br label %13
13: ; preds = %9, %5
%14 = phi i32 [ %8, %5 ], [ %12, %9 ]
ret i32 %14
}

LLVM IR (-O2):
define i32 @round_nearest(float %0) {
%2 = fcmp olt float %0, 0.000000e+00
%3 = select i1 %2, float -5.000000e-01, float 5.000000e-01
%4 = fadd float %3, %0
%5 = fptosi float %4 to i32
ret i32 %5
}
/* Variables and functions */
int functiona(int, int);
int functiong(int a, int c) {
  int d = functiona(a, c);
  return d;
}


x86 assembly (clang, -O0):
<functiong>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <functiona@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<functiong>:
jmp    1030 <functiona@plt>

LLVM IR (-O0):
define i32 @functiong(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @functiona(i32 %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @functiong(i32 %0, i32 %1) {
%3 = tail call i32 @functiona(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
void *malloc(size_t);
void *memset(void *, int /*<<< orphan*/, size_t);
void *calloc_model(size_t nmemb, size_t size) {
  void *ptr = malloc(nmemb * size);
  return memset(ptr, 0, nmemb * size);
}


x86 assembly (clang, -O0):
<calloc_model>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
imul   -0x10(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    %rdi,-0x20(%rbp)
mov    -0x8(%rbp),%rdx
imul   -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calloc_model>:
push   %rax
imul   %rdi,%rsi
mov    $0x1,%edi
call   1030 <calloc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i8* @calloc_model(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = mul i64 %6, %7
%9 = call i8* @malloc(i64 %8)
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = load i64, i64* %3
%12 = load i64, i64* %4
%13 = mul i64 %11, %12
ret i8* %10
}

LLVM IR (-O2):
define noalias i8* @calloc_model(i64 %0, i64 %1) {
%3 = mul i64 %1, %0
%4 = call i8* @calloc(i64 1, i64 %3)
ret i8* %4
}
/* Variables and functions */
char opt_char(char *str, char def) {
  if (str == NULL) {
    return def;
  } else {
    return str[0];
  }
}


x86 assembly (clang, -O0):
<opt_char>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1124 <opt_char+0x24>
mov    -0x11(%rbp),%al
mov    %al,-0x1(%rbp)
jmp    112d <opt_char+0x2d>
mov    -0x10(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<opt_char>:
test   %rdi,%rdi
je     1108 <opt_char+0x8>
mov    (%rdi),%al
ret
mov    %esi,%eax
ret

LLVM IR (-O0):
define signext i8 @opt_char(i8* %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
%6 = load i8*, i8** %4
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i8, i8* %5
store i8 %9, i8* %3
br label %14
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = getelementptr inbounds i8, i8* %11, i64 0
%13 = load i8, i8* %12
store i8 %13, i8* %3
br label %14
14: ; preds = %10, %8
%15 = load i8, i8* %3
ret i8 %15
}

LLVM IR (-O2):
define signext i8 @opt_char(i8* %0, i8 signext %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = load i8, i8* %0
br label %6
6: ; preds = %2, %4
%7 = phi i8 [ %5, %4 ], [ %1, %2 ]
ret i8 %7
}
/* Variables and functions */
int /*<<< orphan*/ SIGTSTP;
int /*<<< orphan*/ SIG_IGN;
int /*<<< orphan*/ signal(int /*<<< orphan*/, int /*<<< orphan*/);
void no_tstp(void) { signal(SIGTSTP, SIG_IGN); }


x86 assembly (clang, -O0):
<no_tstp>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
mov    0x2ebc(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<no_tstp>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
jmp    1030 <signal@plt>

LLVM IR (-O0):
@SIGTSTP = global i32 0
@SIG_IGN = global i32 0
define void @no_tstp() {
%1 = load i32, i32* @SIGTSTP
%2 = load i32, i32* @SIG_IGN
%3 = call i32 @signal(i32 %1, i32 %2)
ret void
}

LLVM IR (-O2):
@SIGTSTP = global i32 0
@SIG_IGN = global i32 0
define void @no_tstp() {
%1 = load i32, i32* @SIGTSTP
%2 = load i32, i32* @SIG_IGN
%3 = tail call i32 @signal(i32 %1, i32 %2)
ret void
}
main(argc, argp) char **argp;
{
  register errors = 0;
  while (--argc > 0)
    errors |= crc32file(*++argp);
  exit(errors != 0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
jle    1174 <main+0x54>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x8,%rcx
mov    %rcx,-0x10(%rbp)
mov    0x8(%rax),%rdi
mov    $0x0,%al
call   1030 <crc32file@plt>
or     -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    113d <main+0x1d>
cmpl   $0x0,-0x14(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%ebp
xor    %edi,%edi
cmp    $0x2,%ebp
jl     1160 <main+0x40>
mov    %rsi,%r14
add    $0x8,%r14
add    $0x1,%ebp
xor    %ebx,%ebx
nopl   0x0(%rax)
mov    (%r14),%rdi
xor    %eax,%eax
call   1030 <crc32file@plt>
or     %eax,%ebx
add    $0x8,%r14
add    $0xffffffff,%ebp
cmp    $0x2,%ebp
ja     1140 <main+0x20>
xor    %edi,%edi
test   %ebx,%ebx
setne  %dil
call   1040 <exit@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
br label %7
7: ; preds = %11, %2
%8 = load i32, i32* %4
%9 = add nsw i32 %8, -1
store i32 %9, i32* %4
%10 = icmp sgt i32 %9, 0
br i1 %10, label %11, label %18
11: ; preds = %7
%12 = load i8**, i8*** %5
%13 = getelementptr inbounds i8*, i8** %12, i32 1
store i8** %13, i8*** %5
%14 = load i8*, i8** %13
%15 = call i32 (i8*, ...) bitcast (i32 (...)* @crc32file to i32 (i8*, ...)*)(i8* %14)
%16 = load i32, i32* %6
%17 = or i32 %16, %15
store i32 %17, i32* %6
br label %7
18: ; preds = %7
%19 = load i32, i32* %6
%20 = icmp ne i32 %19, 0
%21 = zext i1 %20 to i32
unreachable
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %17
4: ; preds = %2, %4
%5 = phi i32 [ %12, %4 ], [ 0, %2 ]
%6 = phi i8** [ %9, %4 ], [ %1, %2 ]
%7 = phi i32 [ %8, %4 ], [ %0, %2 ]
%8 = add nsw i32 %7, -1
%9 = getelementptr inbounds i8*, i8** %6, i64 1
%10 = load i8*, i8** %9
%11 = tail call i32 (i8*, ...) bitcast (i32 (...)* @crc32file to i32 (i8*, ...)*)(i8* %10)
%12 = or i32 %11, %5
%13 = icmp ugt i32 %7, 2
br i1 %13, label %4, label %14
14: ; preds = %4
%15 = icmp ne i32 %12, 0
%16 = zext i1 %15 to i32
br label %17
17: ; preds = %14, %2
%18 = phi i32 [ 0, %2 ], [ %16, %14 ]
tail call void @exit(i32 %18)
unreachable
}
/* Variables and functions */
scalar_t__ portWrite(char *);
int /*<<< orphan*/ snprintf(char *, int, char *, char *);
int set_TemmaRAcorrspeed(char *local_buffer) {
  char command[16];
  snprintf(command, 4, "LA%s", local_buffer);
  if (portWrite(command) < 0)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<set_TemmaRAcorrspeed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rcx
mov    $0x4,%esi
lea    0xec0(%rip),%rdx
call   1030 <snprintf@plt>
lea    -0x20(%rbp),%rdi
call   1040 <portWrite@plt>
cmp    $0x0,%rax
jge    1164 <set_TemmaRAcorrspeed+0x44>
movl   $0xffffffff,-0x4(%rbp)
jmp    116b <set_TemmaRAcorrspeed+0x4b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_TemmaRAcorrspeed>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rcx
lea    0xed1(%rip),%rdx
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x4,%esi
call   1030 <snprintf@plt>
mov    %rbx,%rdi
call   1040 <portWrite@plt>
sar    $0x3f,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"LA%s\00"
define i32 @set_TemmaRAcorrspeed(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca [16 x i8]
store i8* %0, i8** %3
%5 = getelementptr inbounds [16 x i8], [16 x i8]* %4, i64 0, i64 0
%6 = load i8*, i8** %3
%7 = call i32 @snprintf(i8* %5, i32 4, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = getelementptr inbounds [16 x i8], [16 x i8]* %4, i64 0, i64 0
%9 = call i64 @portWrite(i8* %8)
%10 = icmp slt i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %1
store i32 -1, i32* %2
br label %13
12: ; preds = %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
@.str = [5 x i8] c"LA%s\00"
define i32 @set_TemmaRAcorrspeed(i8* %0) {
%2 = alloca [16 x i8]
%3 = getelementptr inbounds [16 x i8], [16 x i8]* %2, i64 0, i64 0
%4 = call i32 @snprintf(i8* %3, i32 4, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %0)
%5 = call i64 @portWrite(i8* %3)
%6 = ashr i64 %5, 63
%7 = trunc i64 %6 to i32
ret i32 %7
}
int lastfunction(int i) {}


x86 assembly (clang, -O0):
<lastfunction>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lastfunction>:
ret

LLVM IR (-O0):
define i32 @lastfunction(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @lastfunction(i32 %0) {
ret i32 undef
}
char *xaChromIxSuffix() { return ".xao"; }


x86 assembly (clang, -O0):
<xaChromIxSuffix>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xaChromIxSuffix>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c".xao\00"
define i8* @xaChromIxSuffix() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [5 x i8] c".xao\00"
define i8* @xaChromIxSuffix() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ clearScreen();
int /*<<< orphan*/ printJackpot();
int /*<<< orphan*/ sleep(int);
void printBlinkingJackpotFor(int seconds) {
  for (int i = 0; i < seconds / 2; i++) {
    clearScreen();
    sleep(1);
    printJackpot();
    sleep(1);
  }
}


x86 assembly (clang, -O0):
<printBlinkingJackpotFor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
cmp    %ecx,%eax
jge    1190 <printBlinkingJackpotFor+0x60>
mov    $0x0,%al
call   1030 <clearScreen@plt>
mov    $0x1,%edi
call   1040 <sleep@plt>
mov    $0x0,%al
call   1050 <printJackpot@plt>
mov    $0x1,%edi
call   1040 <sleep@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1142 <printBlinkingJackpotFor+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printBlinkingJackpotFor>:
push   %rbx
cmp    $0x2,%edi
jl     1167 <printBlinkingJackpotFor+0x37>
mov    %edi,%ebx
shr    $0x1f,%ebx
add    %edi,%ebx
sar    %ebx
nop
xor    %eax,%eax
call   1030 <clearScreen@plt>
mov    $0x1,%edi
call   1040 <sleep@plt>
xor    %eax,%eax
call   1050 <printJackpot@plt>
mov    $0x1,%edi
call   1040 <sleep@plt>
add    $0xffffffff,%ebx
jne    1140 <printBlinkingJackpotFor+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @printBlinkingJackpotFor(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = sdiv i32 %6, 2
%8 = icmp slt i32 %5, %7
br i1 %8, label %9, label %17
9: ; preds = %4
%10 = call i32 (...) @clearScreen()
%11 = call i32 @sleep(i32 1)
%12 = call i32 (...) @printJackpot()
%13 = call i32 @sleep(i32 1)
br label %14
14: ; preds = %9
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %4
17: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @printBlinkingJackpotFor(i32 %0) {
%2 = sdiv i32 %0, 2
%3 = icmp sgt i32 %0, 1
br i1 %3, label %5, label %4
4: ; preds = %5, %1
ret void
5: ; preds = %1, %5
%6 = phi i32 [ %11, %5 ], [ 0, %1 ]
%7 = tail call i32 (...) @clearScreen()
%8 = tail call i32 @sleep(i32 1)
%9 = tail call i32 (...) @printJackpot()
%10 = tail call i32 @sleep(i32 1)
%11 = add nuw nsw i32 %6, 1
%12 = icmp eq i32 %11, %2
br i1 %12, label %4, label %5
}
unsigned long rdpmc(unsigned int counter) {
  unsigned long int ret = 0;
  unsigned int low, high;
  __asm__ volatile("rdpmc" : "=a"(low), "=d"(high) : "c"(counter));
  ret = (unsigned long)low | ((unsigned long)high) << 32;
  return ret;
}


x86 assembly (clang, -O0):
<rdpmc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
rdpmc
mov    %eax,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x18(%rbp),%ecx
shl    $0x20,%rcx
or     %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rdpmc>:
mov    %edi,%ecx
rdpmc
mov    %eax,%eax
shl    $0x20,%rdx
or     %rdx,%rax
ret

LLVM IR (-O0):
define i64 @rdpmc(i32 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
store i64 0, i64* %3
%6 = load i32, i32* %2
%7 = call { i32, i32 } asm sideeffect "rdpmc", "={ax},={dx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 %6)
%8 = extractvalue { i32, i32 } %7, 0
%9 = extractvalue { i32, i32 } %7, 1
store i32 %8, i32* %4
store i32 %9, i32* %5
%10 = load i32, i32* %4
%11 = zext i32 %10 to i64
%12 = load i32, i32* %5
%13 = zext i32 %12 to i64
%14 = shl i64 %13, 32
%15 = or i64 %11, %14
store i64 %15, i64* %3
%16 = load i64, i64* %3
ret i64 %16
}

LLVM IR (-O2):
define i64 @rdpmc(i32 %0) {
%2 = tail call { i32, i32 } asm sideeffect "rdpmc", "={ax},={dx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 %0)
%3 = extractvalue { i32, i32 } %2, 0
%4 = extractvalue { i32, i32 } %2, 1
%5 = zext i32 %3 to i64
%6 = zext i32 %4 to i64
%7 = shl nuw i64 %6, 32
%8 = or i64 %7, %5
ret i64 %8
}
/* Variables and functions */
int heapSort_test();
int main(int argc, char *argv[]) {
  int iRet = 0;
  iRet = heapSort_test();
  return iRet;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    $0x0,%al
call   1030 <heapSort_test@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <heapSort_test@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
%7 = call i32 (...) @heapSort_test()
store i32 %7, i32* %6
%8 = load i32, i32* %6
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @heapSort_test()
ret i32 %3
}
/* Type definitions */
struct product {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void product_ops_set_sku(struct product *product, const char *sku) {
  printf("product::set_sku()\n");
}


x86 assembly (clang, -O0):
<product_ops_set_sku>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<product_ops_set_sku>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
%struct.product = type { i32 }
@.str = [20 x i8] c"product::set_sku()\0A\00"
define void @product_ops_set_sku(%struct.product* %0, i8* %1) {
%3 = alloca %struct.product*
%4 = alloca i8*
store %struct.product* %0, %struct.product** %3
store i8* %1, i8** %4
%5 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.product = type { i32 }
@str = [19 x i8] c"product::set_sku()\00"
define void @product_ops_set_sku(%struct.product* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ m6809_trace_irq(int);
int /*<<< orphan*/ reset_state();
void m6809_trace_reset(void) {
  reset_state();
  m6809_trace_irq(0xfffe);
}


x86 assembly (clang, -O0):
<m6809_trace_reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <reset_state@plt>
mov    $0xfffe,%edi
call   1040 <m6809_trace_irq@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<m6809_trace_reset>:
push   %rax
xor    %eax,%eax
call   1030 <reset_state@plt>
mov    $0xfffe,%edi
pop    %rax
jmp    1040 <m6809_trace_irq@plt>

LLVM IR (-O0):
define void @m6809_trace_reset() {
%1 = call i32 (...) @reset_state()
%2 = call i32 @m6809_trace_irq(i32 65534)
ret void
}

LLVM IR (-O2):
define void @m6809_trace_reset() {
%1 = tail call i32 (...) @reset_state()
%2 = tail call i32 @m6809_trace_irq(i32 65534)
ret void
}
int multi_timer_check(int apic, int irq) { return 0; }


x86 assembly (clang, -O0):
<multi_timer_check>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<multi_timer_check>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @multi_timer_check(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @multi_timer_check(i32 %0, i32 %1) {
ret i32 0
}
int cam_init_rpc(const char *host_name, const char *exp_name,
                 const char *fe_name, const char *client_name,
                 const char *rpc_server) {
  return 1;
}


x86 assembly (clang, -O0):
<cam_init_rpc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cam_init_rpc>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @cam_init_rpc(i8* %0, i8* %1, i8* %2, i8* %3, i8* %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i8*
store i8* %0, i8** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i8* %3, i8** %9
store i8* %4, i8** %10
ret i32 1
}

LLVM IR (-O2):
define i32 @cam_init_rpc(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i8* nocapture readnone %3, i8* nocapture readnone %4) {
ret i32 1
}
/* Variables and functions */
double DSlater_5S_6S(double, double, double);
double DSlater_6S_5S(double rij, double xii, double xij) {
  return DSlater_5S_6S(rij, xij, xii);
}


x86 assembly (clang, -O0):
<DSlater_6S_5S>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm2
call   1030 <DSlater_5S_6S@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DSlater_6S_5S>:
movaps %xmm1,%xmm3
movaps %xmm2,%xmm1
movaps %xmm3,%xmm2
jmp    1030 <DSlater_5S_6S@plt>

LLVM IR (-O0):
define double @DSlater_6S_5S(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %6
%9 = load double, double* %5
%10 = call double @DSlater_5S_6S(double %7, double %8, double %9)
ret double %10
}

LLVM IR (-O2):
define double @DSlater_6S_5S(double %0, double %1, double %2) {
%4 = tail call double @DSlater_5S_6S(double %0, double %2, double %1)
ret double %4
}
int size_array(int *ram_seg, int nrows, int ncols) {
  int size, segs_in_col;
  segs_in_col = ((nrows - 1) >> 4) + 1;
  *ram_seg = ((ncols - 1) >> 4) + 1;
  size = ((((nrows - 1) >> 4) + 1) << 4) * ((((ncols - 1) >> 4) + 1) << 4);
  size -= ((segs_in_col << 4) - nrows) << 4;
  size -= (*ram_seg << 4) - ncols;
  return (size);
}


x86 assembly (clang, -O0):
<size_array>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
sar    $0x4,%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%ecx
sub    $0x1,%ecx
sar    $0x4,%ecx
add    $0x1,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
sar    $0x4,%eax
add    $0x1,%eax
shl    $0x4,%eax
mov    -0x10(%rbp),%ecx
sub    $0x1,%ecx
sar    $0x4,%ecx
add    $0x1,%ecx
shl    $0x4,%ecx
imul   %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%ecx
shl    $0x4,%ecx
sub    -0xc(%rbp),%ecx
shl    $0x4,%ecx
mov    -0x14(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
shl    $0x4,%ecx
sub    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<size_array>:
lea    -0x1(%rdx),%ecx
sar    $0x4,%ecx
add    $0x1,%ecx
mov    %ecx,(%rdi)
lea    0xf(%rsi),%edi
and    $0xfffffff0,%edi
shl    $0x4,%ecx
sub    %edi,%esi
shl    $0x4,%esi
lea    (%rsi,%rdx,1),%eax
sub    %ecx,%eax
imul   %edi,%ecx
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @size_array(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i32, i32* %5
%10 = sub nsw i32 %9, 1
%11 = ashr i32 %10, 4
%12 = add nsw i32 %11, 1
store i32 %12, i32* %8
%13 = load i32, i32* %6
%14 = sub nsw i32 %13, 1
%15 = ashr i32 %14, 4
%16 = add nsw i32 %15, 1
%17 = load i32*, i32** %4
store i32 %16, i32* %17
%18 = load i32, i32* %5
%19 = sub nsw i32 %18, 1
%20 = ashr i32 %19, 4
%21 = add nsw i32 %20, 1
%22 = shl i32 %21, 4
%23 = load i32, i32* %6
%24 = sub nsw i32 %23, 1
%25 = ashr i32 %24, 4
%26 = add nsw i32 %25, 1
%27 = shl i32 %26, 4
%28 = mul nsw i32 %22, %27
store i32 %28, i32* %7
%29 = load i32, i32* %8
%30 = shl i32 %29, 4
%31 = load i32, i32* %5
%32 = sub nsw i32 %30, %31
%33 = shl i32 %32, 4
%34 = load i32, i32* %7
%35 = sub nsw i32 %34, %33
store i32 %35, i32* %7
%36 = load i32*, i32** %4
%37 = load i32, i32* %36
%38 = shl i32 %37, 4
%39 = load i32, i32* %6
%40 = sub nsw i32 %38, %39
%41 = load i32, i32* %7
%42 = sub nsw i32 %41, %40
store i32 %42, i32* %7
%43 = load i32, i32* %7
ret i32 %43
}

LLVM IR (-O2):
define i32 @size_array(i32* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = add nsw i32 %2, -1
%5 = ashr i32 %4, 4
%6 = add nsw i32 %5, 1
store i32 %6, i32* %0
%7 = add i32 %1, 15
%8 = and i32 %7, -16
%9 = shl i32 %6, 4
%10 = mul nsw i32 %9, %8
%11 = sub i32 %1, %8
%12 = shl i32 %11, 4
%13 = add i32 %12, %2
%14 = sub i32 %13, %9
%15 = add i32 %14, %10
ret i32 %15
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t intrev(uint32_t i) {
  uint32_t rev = 0;
  for (uint32_t rem = 0; i; i /= 10) {
    rem = i % 10;
    rev *= 10;
    rev += rem;
  }
  return rev;
}


x86 assembly (clang, -O0):
<intrev>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1150 <intrev+0x50>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,-0xc(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    1115 <intrev+0x15>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intrev>:
xor    %eax,%eax
test   %edi,%edi
je     113f <intrev+0x3f>
cs nopw 0x0(%rax,%rax,1)
lea    (%rax,%rax,4),%eax
movslq %edi,%rcx
imul   $0x66666667,%rcx,%rdi
mov    %rdi,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rdi
add    %edx,%edi
lea    (%rdi,%rdi,1),%edx
lea    (%rdx,%rdx,4),%edx
mov    %ecx,%esi
sub    %edx,%esi
lea    (%rsi,%rax,2),%eax
add    $0x9,%ecx
cmp    $0x13,%ecx
jae    1110 <intrev+0x10>
ret

LLVM IR (-O0):
define i32 @intrev(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %2
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %19
8: ; preds = %5
%9 = load i32, i32* %2
%10 = srem i32 %9, 10
store i32 %10, i32* %4
%11 = load i32, i32* %3
%12 = mul nsw i32 %11, 10
store i32 %12, i32* %3
%13 = load i32, i32* %4
%14 = load i32, i32* %3
%15 = add nsw i32 %14, %13
store i32 %15, i32* %3
br label %16
16: ; preds = %8
%17 = load i32, i32* %2
%18 = sdiv i32 %17, 10
store i32 %18, i32* %2
br label %5
19: ; preds = %5
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @intrev(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %5, %1
%4 = phi i32 [ 0, %1 ], [ %10, %5 ]
ret i32 %4
5: ; preds = %1, %5
%6 = phi i32 [ %10, %5 ], [ 0, %1 ]
%7 = phi i32 [ %11, %5 ], [ %0, %1 ]
%8 = srem i32 %7, 10
%9 = mul nsw i32 %6, 10
%10 = add nsw i32 %9, %8
%11 = sdiv i32 %7, 10
%12 = add i32 %7, 9
%13 = icmp ult i32 %12, 19
br i1 %13, label %3, label %5
}
void ERR_reason_error_string(void) {}


x86 assembly (clang, -O0):
<ERR_reason_error_string>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ERR_reason_error_string>:
ret

LLVM IR (-O0):
define void @ERR_reason_error_string() {
ret void
}

LLVM IR (-O2):
define void @ERR_reason_error_string() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ret(int);
void z_rtrue(void) { ret(1); }


x86 assembly (clang, -O0):
<z_rtrue>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <ret@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<z_rtrue>:
mov    $0x1,%edi
jmp    1030 <ret@plt>

LLVM IR (-O0):
define void @z_rtrue() {
%1 = call i32 @ret(i32 1)
ret void
}

LLVM IR (-O2):
define void @z_rtrue() {
%1 = tail call i32 @ret(i32 1)
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *ALchorusState_New(size_t size) { return malloc(size); }


x86 assembly (clang, -O0):
<ALchorusState_New>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ALchorusState_New>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @ALchorusState_New(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @ALchorusState_New(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm_and_si128(int /*<<< orphan*/, int /*<<< orphan*/);
__m128i test_mm_and_si128(__m128i A, __m128i B) { return _mm_and_si128(A, B); }


x86 assembly (clang, -O0):
<test_mm_and_si128>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_and_si128@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_and_si128>:
jmp    1030 <_mm_and_si128@plt>

LLVM IR (-O0):
define i32 @test_mm_and_si128(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_and_si128(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_and_si128(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_and_si128(i32 %0, i32 %1)
ret i32 %3
}