xunge/DecIR huggingface dataset:
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ pac_instructions_not_nop_generic(struct __test_metadata *);
void wrapper_pac_instructions_not_nop_generic(
    struct __test_metadata *_metadata,
    struct __fixture_variant_metadata *variant) {
  pac_instructions_not_nop_generic(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_pac_instructions_not_nop_generic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pac_instructions_not_nop_generic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_pac_instructions_not_nop_generic>:
jmp    1030 <pac_instructions_not_nop_generic@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_pac_instructions_not_nop_generic(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @pac_instructions_not_nop_generic(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_pac_instructions_not_nop_generic(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @pac_instructions_not_nop_generic(%struct.__test_metadata* %0)
ret void
}
/* Type definitions */
typedef char *uint64_t;

/* Variables and functions */
uint64_t ROL64_19(uint64_t x) {
  __asm__("rolq $19, %0" : "=r"(x) : "0"(x));
  return x;
}


x86 assembly (clang, -O0):
<ROL64_19>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
rol    $0x13,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ROL64_19>:
mov    %rdi,%rax
rol    $0x13,%rax
ret

LLVM IR (-O0):
define i8* @ROL64_19(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* asm "rolq $$19, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define i8* @ROL64_19(i8* readnone %0) {
%2 = tail call i8* asm "rolq $$19, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ obfsem_keep_encode(void *, size_t, void **, size_t *);
void obfsem_keep_decode(void *in, size_t insiz, void **out, size_t *outsiz) {
  obfsem_keep_encode(in, insiz, out, outsiz);
}


x86 assembly (clang, -O0):
<obfsem_keep_decode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <obfsem_keep_encode@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<obfsem_keep_decode>:
jmp    1030 <obfsem_keep_encode@plt>

LLVM IR (-O0):
define void @obfsem_keep_decode(i8* %0, i64 %1, i8** %2, i64* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8**
%8 = alloca i64*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8** %2, i8*** %7
store i64* %3, i64** %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = load i8**, i8*** %7
%12 = load i64*, i64** %8
%13 = call i32 @obfsem_keep_encode(i8* %9, i64 %10, i8** %11, i64* %12)
ret void
}

LLVM IR (-O2):
define void @obfsem_keep_decode(i8* %0, i64 %1, i8** %2, i64* %3) {
%5 = tail call i32 @obfsem_keep_encode(i8* %0, i64 %1, i8** %2, i64* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void handle_client(int clientfd) {
  close(clientfd);
  return;
}


x86 assembly (clang, -O0):
<handle_client>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_client>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @handle_client(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret void
}

LLVM IR (-O2):
define void @handle_client(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret void
}
void foo633(int p) {}


x86 assembly (clang, -O0):
<foo633>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo633>:
ret

LLVM IR (-O0):
define void @foo633(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo633(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, void const *, size_t);
void mmio_readn(const void *addr, uint8_t *buf, size_t len) {
  memcpy(buf, addr, len);
  return;
}


x86 assembly (clang, -O0):
<mmio_readn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmio_readn>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @mmio_readn(i8* %0, i32* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i64
store i8* %0, i8** %4
store i32* %1, i32** %5
store i64 %2, i64* %6
%7 = load i32*, i32** %5
%8 = load i8*, i8** %4
%9 = load i64, i64* %6
%10 = call i32 @memcpy(i32* %7, i8* %8, i64 %9)
ret void
}

LLVM IR (-O2):
define void @mmio_readn(i8* %0, i32* %1, i64 %2) {
%4 = tail call i32 @memcpy(i32* %1, i8* %0, i64 %2)
ret void
}
A0AR1(r0, r1, x0, x1, p0, p1) short r0, r1;
short *p0, *p1;
{ (*((short *)10000000)) = (p1[1111111 / 4]); }


x86 assembly (clang, -O0):
<A0AR1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    0x87a22(%rax),%cx
mov    $0x989680,%eax
mov    %cx,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<A0AR1>:
movzwl 0x87a22(%r9),%eax
mov    %ax,0x989680
ret

LLVM IR (-O0):
define i32 @A0AR1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16*, i16** %13
%17 = getelementptr inbounds i16, i16* %16, i64 277777
%18 = load i16, i16* %17
store i16 %18, i16* inttoptr (i64 10000000 to i16*)
%19 = load i32, i32* %7
ret i32 %19
}

LLVM IR (-O2):
define i32 @A0AR1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture %5) {
%7 = getelementptr inbounds i16, i16* %5, i64 277777
%8 = load i16, i16* %7
store i16 %8, i16* inttoptr (i64 10000000 to i16*)
ret i32 undef
}
int poison_level(int poison_counter) {
  int level = 1;
  while (level * level * 5 <= poison_counter)
    level++;
  return level;
}


x86 assembly (clang, -O0):
<poison_level>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
imul   -0x8(%rbp),%eax
imul   $0x5,%eax,%eax
cmp    -0x4(%rbp),%eax
jg     112f <poison_level+0x2f>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <poison_level+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<poison_level>:
xor    %eax,%eax
mov    $0x5,%ecx
nopw   0x0(%rax,%rax,1)
add    $0x1,%eax
mov    %ecx,%edx
imul   %eax,%edx
add    $0x5,%ecx
cmp    %edi,%edx
jle    1110 <poison_level+0x10>
ret

LLVM IR (-O0):
define i32 @poison_level(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %3
%7 = mul nsw i32 %5, %6
%8 = mul nsw i32 %7, 5
%9 = load i32, i32* %2
%10 = icmp sle i32 %8, %9
br i1 %10, label %11, label %14
11: ; preds = %4
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @poison_level(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 1, %1 ], [ %7, %2 ]
%4 = mul i32 %3, 5
%5 = mul i32 %4, %3
%6 = icmp sgt i32 %5, %0
%7 = add nuw nsw i32 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i32 %3
}
void av_pix_fmt_desc_get() {}


x86 assembly (clang, -O0):
<av_pix_fmt_desc_get>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_pix_fmt_desc_get>:
ret

LLVM IR (-O0):
define void @av_pix_fmt_desc_get() {
ret void
}

LLVM IR (-O2):
define void @av_pix_fmt_desc_get() {
ret void
}
int test_imm_0Buint32_reg(unsigned int val) {
  return ((val) & (0x0B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Buint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xb,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Buint32_reg>:
test   $0xb,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Buint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 11
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_0Buint32_reg(i32 %0) {
%2 = and i32 %0, 11
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
long int cast_uchar_long_fast(unsigned char x) { return (long int)x; }


x86 assembly (clang, -O0):
<cast_uchar_long_fast>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cast_uchar_long_fast>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i64 @cast_uchar_long_fast(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i64
ret i64 %4
}

LLVM IR (-O2):
define i64 @cast_uchar_long_fast(i8 zeroext %0) {
%2 = zext i8 %0 to i64
ret i64 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fwrite(char *, int, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ stb_fput_varlenu(int /*<<< orphan*/ *, int);
int strlen(char *);
void stb_fput_string(FILE *f, char *s) {
  int len = strlen(s);
  stb_fput_varlenu(f, len);
  fwrite(s, 1, len, f);
}


x86 assembly (clang, -O0):
<stb_fput_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <stb_fput_varlenu@plt>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rcx
mov    $0x1,%esi
call   1050 <fwrite@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stb_fput_string>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %eax,%ebp
mov    %r14,%rdi
mov    %eax,%esi
call   1040 <stb_fput_varlenu@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
mov    %ebp,%edx
mov    %r14,%rcx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1050 <fwrite@plt>

LLVM IR (-O0):
define void @stb_fput_string(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
%5 = alloca i32
store i32* %0, i32** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = call i32 @strlen(i8* %6)
store i32 %7, i32* %5
%8 = load i32*, i32** %3
%9 = load i32, i32* %5
%10 = call i32 @stb_fput_varlenu(i32* %8, i32 %9)
%11 = load i8*, i8** %4
%12 = load i32, i32* %5
%13 = load i32*, i32** %3
%14 = call i32 @fwrite(i8* %11, i32 1, i32 %12, i32* %13)
ret void
}

LLVM IR (-O2):
define void @stb_fput_string(i32* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @stb_fput_varlenu(i32* %0, i32 %3)
%5 = tail call i32 @fwrite(i8* %1, i32 1, i32 %3, i32* %0)
ret void
}
/* Variables and functions */
int PSItoMB(double);
double PSItoKPA(double PSI) {
  double KPA = PSItoMB(PSI) / 10;
  return KPA;
}


x86 assembly (clang, -O0):
<PSItoKPA>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <PSItoMB@plt>
mov    $0xa,%ecx
cltd
idiv   %ecx
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PSItoKPA>:
push   %rax
call   1030 <PSItoMB@plt>
cltq
imul   $0x66666667,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x22,%rax
add    %ecx,%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @PSItoKPA(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = call i32 @PSItoMB(double %4)
%6 = sdiv i32 %5, 10
%7 = sitofp i32 %6 to double
store double %7, double* %3
%8 = load double, double* %3
ret double %8
}

LLVM IR (-O2):
define double @PSItoKPA(double %0) {
%2 = tail call i32 @PSItoMB(double %0)
%3 = sdiv i32 %2, 10
%4 = sitofp i32 %3 to double
ret double %4
}
void pthread_sigmask() {}


x86 assembly (clang, -O0):
<pthread_sigmask>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_sigmask>:
ret

LLVM IR (-O0):
define void @pthread_sigmask() {
ret void
}

LLVM IR (-O2):
define void @pthread_sigmask() {
ret void
}
void done(int x) {}


x86 assembly (clang, -O0):
<done>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<done>:
ret

LLVM IR (-O0):
define void @done(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @done(i32 %0) {
ret void
}
int test_imm_72uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x72 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_72uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x72,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_72uint64_highword_mem>:
testb  $0x72,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_72uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 114
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_72uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 489626271744
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ default_handler();
__attribute__((weak)) void CAN2_TX_IRQHandler() { default_handler(); }


x86 assembly (clang, -O0):
<CAN2_TX_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <default_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CAN2_TX_IRQHandler>:
xor    %eax,%eax
jmp    1030 <default_handler@plt>

LLVM IR (-O0):
define weak void @CAN2_TX_IRQHandler() {
%1 = call i32 (...) @default_handler()
ret void
}

LLVM IR (-O2):
define weak void @CAN2_TX_IRQHandler() {
%1 = tail call i32 (...) @default_handler()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void usage(char *argv0) {
  printf("%s [size of grid]\n", argv0);
  printf("E.g %s 19\n", argv0);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rsi
lea    0xedc(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
lea    0xee9(%rip),%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"%s [size of grid]\0A\00"
@.str.1 = [11 x i8] c"E.g %s 19\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"%s [size of grid]\0A\00"
@.str.1 = [11 x i8] c"E.g %s 19\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0xa4() {
  Assert_real((isodigit(164) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              825, ("isodigit should be 0 for 0xa4"));
}


x86 assembly (clang, -O0):
<t_isodigit_0xa4>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa4,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x339,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0xa4>:
push   %rax
mov    $0xa4,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x339,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0xa4\00"
define void @t_isodigit_0xa4() {
%1 = call i64 @isodigit(i32 164)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 825, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0xa4\00"
define void @t_isodigit_0xa4() {
%1 = tail call i64 @isodigit(i32 164)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 825, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write_int(int, int);
void write_float(int fd, float f) {
  union {
    float f;
    int i;
  } u;
  u.f = f;
  write_int(fd, u.i);
}


x86 assembly (clang, -O0):
<write_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1030 <write_int@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_float>:
movd   %xmm0,%esi
jmp    1030 <write_int@plt>

LLVM IR (-O0):
%union.anon = type { float }
define void @write_float(i32 %0, float %1) {
%3 = alloca i32
%4 = alloca float
%5 = alloca %union.anon
store i32 %0, i32* %3
store float %1, float* %4
%6 = load float, float* %4
%7 = bitcast %union.anon* %5 to float*
store float %6, float* %7
%8 = load i32, i32* %3
%9 = bitcast %union.anon* %5 to i32*
%10 = load i32, i32* %9
%11 = call i32 @write_int(i32 %8, i32 %10)
ret void
}

LLVM IR (-O2):
define void @write_float(i32 %0, float %1) {
%3 = bitcast float %1 to i32
%4 = tail call i32 @write_int(i32 %0, i32 %3)
ret void
}
void INT_Excep_CAC_MENDF(void) {}


x86 assembly (clang, -O0):
<INT_Excep_CAC_MENDF>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_CAC_MENDF>:
ret

LLVM IR (-O0):
define void @INT_Excep_CAC_MENDF() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_CAC_MENDF() {
ret void
}
/* Type definitions */
struct instance_data {
  int dummy;
};

/* Variables and functions */
int IRC_SendRawEx(struct instance_data const *, char *, char const *);
int IRC_SendQuitMessage(const struct instance_data *pID,
                        const char *szMessage) {
  return IRC_SendRawEx(pID, "QUIT :%s", szMessage);
}


x86 assembly (clang, -O0):
<IRC_SendQuitMessage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rsi
call   1030 <IRC_SendRawEx@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IRC_SendQuitMessage>:
mov    %rsi,%rdx
lea    0xee6(%rip),%rsi
jmp    1030 <IRC_SendRawEx@plt>

LLVM IR (-O0):
%struct.instance_data = type { i32 }
@.str = [9 x i8] c"QUIT :%s\00"
define i32 @IRC_SendQuitMessage(%struct.instance_data* %0, i8* %1) {
%3 = alloca %struct.instance_data*
%4 = alloca i8*
store %struct.instance_data* %0, %struct.instance_data** %3
store i8* %1, i8** %4
%5 = load %struct.instance_data*, %struct.instance_data** %3
%6 = load i8*, i8** %4
%7 = call i32 @IRC_SendRawEx(%struct.instance_data* %5, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.instance_data = type { i32 }
@.str = [9 x i8] c"QUIT :%s\00"
define i32 @IRC_SendQuitMessage(%struct.instance_data* %0, i8* %1) {
%3 = tail call i32 @IRC_SendRawEx(%struct.instance_data* %0, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %1)
ret i32 %3
}
int isidstrt(c)
char c;
{ return isalpha(c) || c == '_'; }


x86 assembly (clang, -O0):
<isidstrt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <isalpha@plt>
mov    %eax,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x2(%rbp)
jne    1144 <isidstrt+0x34>
movsbl -0x1(%rbp),%eax
cmp    $0x5f,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isidstrt>:
push   %rbx
movsbl %dil,%eax
mov    %edi,%ebx
shl    $0x18,%ebx
mov    %eax,%edi
call   1030 <isalpha@plt>
test   %eax,%eax
setne  %al
cmp    $0x5f000000,%ebx
sete   %cl
or     %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isidstrt(i32 %0) {
%2 = alloca i8
%3 = trunc i32 %0 to i8
store i8 %3, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = call i32 @isalpha(i32 %5)
%7 = icmp ne i32 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = load i8, i8* %2
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 95
br label %12
12: ; preds = %8, %1
%13 = phi i1 [ true, %1 ], [ %11, %8 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @isidstrt(i32 %0) {
%2 = shl i32 %0, 24
%3 = ashr exact i32 %2, 24
%4 = tail call i32 @isalpha(i32 %3)
%5 = icmp ne i32 %4, 0
%6 = icmp eq i32 %2, 1593835520
%7 = or i1 %6, %5
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
unsigned int read_bits(int, int /*<<< orphan*/ *);
unsigned int a1_read_4bit(FILE *in) { return read_bits(4, in); }


x86 assembly (clang, -O0):
<a1_read_4bit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x4,%edi
call   1030 <read_bits@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<a1_read_4bit>:
mov    %rdi,%rsi
mov    $0x4,%edi
jmp    1030 <read_bits@plt>

LLVM IR (-O0):
define i32 @a1_read_4bit(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @read_bits(i32 4, i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @a1_read_4bit(i32* %0) {
%2 = tail call i32 @read_bits(i32 4, i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int fn_ili(long l, int i) {
  (void)l;
  abort();
  return i;
}


x86 assembly (clang, -O0):
<fn_ili>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<fn_ili>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @fn_ili(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i64, i64* %3
%6 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define i32 @fn_ili(i64 %0, i32 %1) {
%3 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int errno;
void close_with_errno(int fd) {
  int saved_errno = errno;
  close(fd);
  errno = saved_errno;
}


x86 assembly (clang, -O0):
<close_with_errno>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
mov    -0x8(%rbp),%ecx
mov    0x2ea7(%rip),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_with_errno>:
push   %rbp
push   %rbx
push   %rax
mov    0x2ec6(%rip),%rbx
mov    (%rbx),%ebp
call   1030 <close@plt>
mov    %ebp,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i32 0
define void @close_with_errno(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* @errno
store i32 %4, i32* %3
%5 = load i32, i32* %2
%6 = call i32 @close(i32 %5)
%7 = load i32, i32* %3
store i32 %7, i32* @errno
ret void
}

LLVM IR (-O2):
@errno = global i32 0
define void @close_with_errno(i32 %0) {
%2 = load i32, i32* @errno
%3 = tail call i32 @close(i32 %0)
store i32 %2, i32* @errno
ret void
}
void USBDevDisconnect(unsigned long ulBase) {
  ;
  (*((volatile unsigned char *)(ulBase + 0x00000001))) &= (~0x00000040);
}


x86 assembly (clang, -O0):
<USBDevDisconnect>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x1(%rax),%cl
movzbl %cl,%ecx
and    $0xffffffbf,%ecx
mov    %cl,0x1(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBDevDisconnect>:
andb   $0xbf,0x1(%rdi)
ret

LLVM IR (-O0):
define void @USBDevDisconnect(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 1
%5 = inttoptr i64 %4 to i8*
%6 = load volatile i8, i8* %5
%7 = zext i8 %6 to i32
%8 = and i32 %7, -65
%9 = trunc i32 %8 to i8
store volatile i8 %9, i8* %5
ret void
}

LLVM IR (-O2):
define void @USBDevDisconnect(i64 %0) {
%2 = add i64 %0, 1
%3 = inttoptr i64 %2 to i8*
%4 = load volatile i8, i8* %3
%5 = and i8 %4, -65
store volatile i8 %5, i8* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void exec_once_0_block(void) { printf("Hello World From Bar\n"); }


x86 assembly (clang, -O0):
<exec_once_0_block>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<exec_once_0_block>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"Hello World From Bar\0A\00"
define void @exec_once_0_block() {
%1 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [21 x i8] c"Hello World From Bar\00"
define void @exec_once_0_block() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
ret void
}
__attribute__((always_)) void smp_send_reschedule(int cpu) {}


x86 assembly (clang, -O0):
<smp_send_reschedule>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<smp_send_reschedule>:
ret

LLVM IR (-O0):
define void @smp_send_reschedule(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @smp_send_reschedule(i32 %0) {
ret void
}
void serial_put_dec_nothing(unsigned int data) { return; }


x86 assembly (clang, -O0):
<serial_put_dec_nothing>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_put_dec_nothing>:
ret

LLVM IR (-O0):
define void @serial_put_dec_nothing(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @serial_put_dec_nothing(i32 %0) {
ret void
}
int tls13_server_encrypted_extensions_recv(struct tls13_ctx *ctx) { return 1; }


x86 assembly (clang, -O0):
<tls13_server_encrypted_extensions_recv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tls13_server_encrypted_extensions_recv>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.tls13_ctx = type opaque
define i32 @tls13_server_encrypted_extensions_recv(%struct.tls13_ctx* %0) {
%2 = alloca %struct.tls13_ctx*
store %struct.tls13_ctx* %0, %struct.tls13_ctx** %2
ret i32 1
}

LLVM IR (-O2):
%struct.tls13_ctx = type opaque
define i32 @tls13_server_encrypted_extensions_recv(%struct.tls13_ctx* nocapture readnone %0) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ sample_function(int, char **);
int main(int argc, char *argv[]) {
  sample_function(argc, argv);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <sample_function@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <sample_function@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @sample_function(i32 %6, i8** %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @sample_function(i32 %0, i8** %1)
ret i32 0
}
unsigned int _Get_Bits(unsigned int uval, unsigned int pos, unsigned int num) {
  return (uval >> pos) & ~(~0U << num);
}


x86 assembly (clang, -O0):
<_Get_Bits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
mov    -0xc(%rbp),%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
mov    %edx,%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Get_Bits>:
mov    %esi,%ecx
shr    %cl,%edi
mov    $0xffffffff,%eax
mov    %edx,%ecx
shl    %cl,%eax
not    %eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @_Get_Bits(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = lshr i32 %7, %8
%10 = load i32, i32* %6
%11 = shl i32 -1, %10
%12 = xor i32 %11, -1
%13 = and i32 %9, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @_Get_Bits(i32 %0, i32 %1, i32 %2) {
%4 = lshr i32 %0, %1
%5 = shl nsw i32 -1, %2
%6 = xor i32 %5, -1
%7 = and i32 %4, %6
ret i32 %7
}
int int_cmp(const void *a, const void *b) {
  const unsigned int *ia = (const unsigned int *)a;
  const unsigned int *ib = (const unsigned int *)b;
  return *ia > *ib;
}


x86 assembly (clang, -O0):
<int_cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
cmp    (%rcx),%eax
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_cmp>:
mov    (%rdi),%ecx
xor    %eax,%eax
cmp    (%rsi),%ecx
seta   %al
ret

LLVM IR (-O0):
define i32 @int_cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %5
%12 = load i32, i32* %11
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = icmp ugt i32 %12, %14
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @int_cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ugt i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
int num1bits(long x) {
  int n = 0;
  while (x != 0L) {
    if (x & 1L)
      n++;
    x >>= 1;
  }
  return n;
}


x86 assembly (clang, -O0):
<num1bits>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1146 <num1bits+0x46>
mov    -0x8(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
je     1135 <num1bits+0x35>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
sar    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <num1bits+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<num1bits>:
xor    %eax,%eax
test   %rdi,%rdi
je     1123 <num1bits+0x23>
mov    %rdi,%rcx
nopw   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
add    %edx,%eax
sar    %rcx
cmp    $0x1,%rdi
mov    %rcx,%rdi
ja     1110 <num1bits+0x10>
ret

LLVM IR (-O0):
define i32 @num1bits(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i64, i64* %2
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load i64, i64* %2
%9 = and i64 %8, 1
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %14
14: ; preds = %11, %7
%15 = load i64, i64* %2
%16 = ashr i64 %15, 1
store i64 %16, i64* %2
br label %4
17: ; preds = %4
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @num1bits(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ 0, %1 ]
%5 = phi i64 [ %9, %3 ], [ %0, %1 ]
%6 = trunc i64 %5 to i32
%7 = and i32 %6, 1
%8 = add nuw nsw i32 %7, %4
%9 = ashr i64 %5, 1
%10 = icmp ult i64 %5, 2
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %8, %3 ]
ret i32 %12
}
int security_inode_alloc(struct inode *inode) { return 0; }


x86 assembly (clang, -O0):
<security_inode_alloc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<security_inode_alloc>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.inode = type opaque
define i32 @security_inode_alloc(%struct.inode* %0) {
%2 = alloca %struct.inode*
store %struct.inode* %0, %struct.inode** %2
ret i32 0
}

LLVM IR (-O2):
%struct.inode = type opaque
define i32 @security_inode_alloc(%struct.inode* nocapture readnone %0) {
ret i32 0
}
int os_perf_callchain_smpl(void) { return (0); }


x86 assembly (clang, -O0):
<os_perf_callchain_smpl>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_perf_callchain_smpl>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @os_perf_callchain_smpl() {
ret i32 0
}

LLVM IR (-O2):
define i32 @os_perf_callchain_smpl() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ codemode(int, int, int);
int /*<<< orphan*/ error(char *);
int findmode(char *, int *);
int standard2(int code, char *label, char *mnemo, char *oper) {
  register int add;
  int value;
  add = findmode(oper, &value);
  codemode(code, add, value);
  if (add == 0) {
    error("Bad addressing mode");
  }
  return 0;
}


x86 assembly (clang, -O0):
<standard2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
lea    -0x28(%rbp),%rsi
call   1040 <findmode@plt>
mov    %eax,-0x24(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x24(%rbp),%esi
mov    -0x28(%rbp),%edx
call   1030 <codemode@plt>
cmpl   $0x0,-0x24(%rbp)
jne    117b <standard2+0x4b>
lea    0xe8a(%rip),%rdi
call   1050 <error@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<standard2>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
lea    0x4(%rsp),%rsi
mov    %rcx,%rdi
call   1040 <findmode@plt>
mov    %eax,%ebp
mov    0x4(%rsp),%edx
mov    %ebx,%edi
mov    %eax,%esi
call   1030 <codemode@plt>
test   %ebp,%ebp
jne    1161 <standard2+0x31>
lea    0xea4(%rip),%rdi
call   1050 <error@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [20 x i8] c"Bad addressing mode\00"
define i32 @standard2(i32 %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%11 = load i8*, i8** %8
%12 = call i32 @findmode(i8* %11, i32* %10)
store i32 %12, i32* %9
%13 = load i32, i32* %5
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i32 @codemode(i32 %13, i32 %14, i32 %15)
%17 = load i32, i32* %9
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %21
19: ; preds = %4
%20 = call i32 @error(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
br label %21
21: ; preds = %19, %4
ret i32 0
}

LLVM IR (-O2):
@.str = [20 x i8] c"Bad addressing mode\00"
define i32 @standard2(i32 %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i8* %3) {
%5 = alloca i32
%6 = bitcast i32* %5 to i8*
%7 = call i32 @findmode(i8* %3, i32* %5)
%8 = load i32, i32* %5
%9 = call i32 @codemode(i32 %0, i32 %7, i32 %8)
%10 = icmp eq i32 %7, 0
br i1 %10, label %11, label %13
11: ; preds = %4
%12 = call i32 @error(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %4
ret i32 0
}
int tosInt32_asInt(int x) { return x; }


x86 assembly (clang, -O0):
<tosInt32_asInt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tosInt32_asInt>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @tosInt32_asInt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @tosInt32_asInt(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int const NSIG;
int cSunMiscSignal_signalRangeCheck(int const index) {
  return ((index > 0) && (index < NSIG));
}


x86 assembly (clang, -O0):
<cSunMiscSignal_signalRangeCheck>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1128 <cSunMiscSignal_signalRangeCheck+0x28>
mov    -0x4(%rbp),%eax
mov    0x2ec0(%rip),%rcx
cmp    (%rcx),%eax
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cSunMiscSignal_signalRangeCheck>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@NSIG = constant i32 0
define i32 @cSunMiscSignal_signalRangeCheck(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* %2
%7 = load i32, i32* @NSIG
%8 = icmp slt i32 %6, %7
br label %9
9: ; preds = %5, %1
%10 = phi i1 [ false, %1 ], [ %8, %5 ]
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
@NSIG = constant i32 0
define i32 @cSunMiscSignal_signalRangeCheck(i32 %0) {
ret i32 0
}
/* Variables and functions */
bool nrf51_errata_58(void) { return false; }


x86 assembly (clang, -O0):
<nrf51_errata_58>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf51_errata_58>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf51_errata_58() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf51_errata_58() {
ret i32 0
}
/* Type definitions */
struct tms {
  scalar_t__ tms_stime;
  scalar_t__ tms_utime;
};

/* Variables and functions */
int /*<<< orphan*/ _SC_CLK_TCK;
double sysconf(int /*<<< orphan*/);
int /*<<< orphan*/ times(struct tms *);
double cputime(void) {
  struct tms t;
  times(&t);
  return (double)(t.tms_utime + t.tms_stime) / sysconf(_SC_CLK_TCK);
}


x86 assembly (clang, -O0):
<cputime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x10(%rbp),%rdi
call   1030 <times@plt>
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
cvtsi2sd %rax,%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    0x2e96(%rip),%rax
mov    (%rax),%edi
call   1040 <sysconf@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cputime>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
call   1030 <times@plt>
mov    0x8(%rsp),%rax
add    0x10(%rsp),%rax
cvtsi2sd %rax,%xmm0
movsd  %xmm0,(%rsp)
mov    0x2e97(%rip),%rax
mov    (%rax),%edi
call   1040 <sysconf@plt>
movsd  (%rsp),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.tms = type { i64, i64 }
@_SC_CLK_TCK = global i32 0
define double @cputime() {
%1 = alloca %struct.tms
%2 = call i32 @times(%struct.tms* %1)
%3 = getelementptr inbounds %struct.tms, %struct.tms* %1, i32 0, i32 1
%4 = load i64, i64* %3
%5 = getelementptr inbounds %struct.tms, %struct.tms* %1, i32 0, i32 0
%6 = load i64, i64* %5
%7 = add nsw i64 %4, %6
%8 = sitofp i64 %7 to double
%9 = load i32, i32* @_SC_CLK_TCK
%10 = call double @sysconf(i32 %9)
%11 = fdiv double %8, %10
ret double %11
}

LLVM IR (-O2):
%struct.tms = type { i64, i64 }
@_SC_CLK_TCK = global i32 0
define double @cputime() {
%1 = alloca %struct.tms
%2 = bitcast %struct.tms* %1 to i8*
%3 = call i32 @times(%struct.tms* %1)
%4 = getelementptr inbounds %struct.tms, %struct.tms* %1, i64 0, i32 1
%5 = load i64, i64* %4
%6 = getelementptr inbounds %struct.tms, %struct.tms* %1, i64 0, i32 0
%7 = load i64, i64* %6
%8 = add nsw i64 %7, %5
%9 = sitofp i64 %8 to double
%10 = load i32, i32* @_SC_CLK_TCK
%11 = tail call double @sysconf(i32 %10)
%12 = fdiv double %9, %11
ret double %12
}
int omap_set_barebox_part(struct omap_barebox_part *part) { return 0; }


x86 assembly (clang, -O0):
<omap_set_barebox_part>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<omap_set_barebox_part>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.omap_barebox_part = type opaque
define i32 @omap_set_barebox_part(%struct.omap_barebox_part* %0) {
%2 = alloca %struct.omap_barebox_part*
store %struct.omap_barebox_part* %0, %struct.omap_barebox_part** %2
ret i32 0
}

LLVM IR (-O2):
%struct.omap_barebox_part = type opaque
define i32 @omap_set_barebox_part(%struct.omap_barebox_part* nocapture readnone %0) {
ret i32 0
}
int Ack(int M, int N) {
  if (M == 0) {
    return (N + 1);
  }
  if (N == 0) {
    return (Ack(M - 1, 1));
  }
  return (Ack(M - 1, Ack(M, (N - 1))));
}


x86 assembly (clang, -O0):
<Ack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1136 <Ack+0x26>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    117c <Ack+0x6c>
cmpl   $0x0,-0xc(%rbp)
jne    1158 <Ack+0x48>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
mov    $0x1,%esi
call   1030 <Ack@plt>
mov    %eax,-0x4(%rbp)
jmp    117c <Ack+0x6c>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
sub    $0x1,%esi
call   1030 <Ack@plt>
mov    -0x10(%rbp),%edi
mov    %eax,%esi
call   1030 <Ack@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Ack>:
push   %rbx
mov    %esi,%eax
test   %edi,%edi
je     113f <Ack+0x2f>
mov    %edi,%ebx
jmp    112a <Ack+0x1a>
nopl   0x0(%rax,%rax,1)
mov    $0x1,%eax
add    $0xffffffff,%ebx
je     113f <Ack+0x2f>
test   %eax,%eax
je     1120 <Ack+0x10>
add    $0xffffffff,%eax
mov    %ebx,%edi
mov    %eax,%esi
call   1030 <Ack@plt>
add    $0xffffffff,%ebx
jne    112a <Ack+0x1a>
add    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @Ack(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* %5
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
br label %26
11: ; preds = %2
%12 = load i32, i32* %5
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %11
%15 = load i32, i32* %4
%16 = sub nsw i32 %15, 1
%17 = call i32 @Ack(i32 %16, i32 1)
store i32 %17, i32* %3
br label %26
18: ; preds = %11
%19 = load i32, i32* %4
%20 = sub nsw i32 %19, 1
%21 = load i32, i32* %4
%22 = load i32, i32* %5
%23 = sub nsw i32 %22, 1
%24 = call i32 @Ack(i32 %21, i32 %23)
%25 = call i32 @Ack(i32 %20, i32 %24)
store i32 %25, i32* %3
br label %26
26: ; preds = %18, %14, %8
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @Ack(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %4, label %7
4: ; preds = %11, %2
%5 = phi i32 [ %1, %2 ], [ %12, %11 ]
%6 = add nsw i32 %5, 1
ret i32 %6
7: ; preds = %2, %11
%8 = phi i32 [ %12, %11 ], [ %1, %2 ]
%9 = phi i32 [ %13, %11 ], [ %0, %2 ]
%10 = icmp eq i32 %8, 0
br i1 %10, label %11, label %15
11: ; preds = %7, %15
%12 = phi i32 [ %17, %15 ], [ 1, %7 ]
%13 = add nsw i32 %9, -1
%14 = icmp eq i32 %13, 0
br i1 %14, label %4, label %7
15: ; preds = %7
%16 = add nsw i32 %8, -1
%17 = tail call i32 @Ack(i32 %9, i32 %16)
br label %11
}
/* Variables and functions */
int /*<<< orphan*/ SIGHUP;
int /*<<< orphan*/ SIGINT;
int /*<<< orphan*/ SIGTERM;
int /*<<< orphan*/ SIG_IGN;
int /*<<< orphan*/ dexit(int);
int /*<<< orphan*/ signal(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ tunlink();
sigout() {
  tunlink();
  signal(SIGHUP, SIG_IGN);
  signal(SIGINT, SIG_IGN);
  signal(SIGTERM, SIG_IGN);
  dexit(1);
}


x86 assembly (clang, -O0):
<sigout>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <tunlink@plt>
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
mov    0x2e81(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
mov    0x2e83(%rip),%rax
mov    (%rax),%edi
mov    0x2e6a(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
mov    0x2e64(%rip),%rax
mov    (%rax),%edi
mov    0x2e53(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
mov    $0x1,%edi
call   1050 <dexit@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigout>:
push   %rbx
xor    %eax,%eax
call   1040 <tunlink@plt>
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
mov    0x2e88(%rip),%rbx
mov    (%rbx),%esi
call   1030 <signal@plt>
mov    0x2e8a(%rip),%rax
mov    (%rax),%edi
mov    (%rbx),%esi
call   1030 <signal@plt>
mov    0x2e72(%rip),%rax
mov    (%rax),%edi
mov    (%rbx),%esi
call   1030 <signal@plt>
mov    $0x1,%edi
pop    %rbx
jmp    1050 <dexit@plt>

LLVM IR (-O0):
@SIGHUP = global i32 0
@SIG_IGN = global i32 0
@SIGINT = global i32 0
@SIGTERM = global i32 0
define i32 @sigout() {
%1 = alloca i32
%2 = call i32 (...) @tunlink()
%3 = load i32, i32* @SIGHUP
%4 = load i32, i32* @SIG_IGN
%5 = call i32 @signal(i32 %3, i32 %4)
%6 = load i32, i32* @SIGINT
%7 = load i32, i32* @SIG_IGN
%8 = call i32 @signal(i32 %6, i32 %7)
%9 = load i32, i32* @SIGTERM
%10 = load i32, i32* @SIG_IGN
%11 = call i32 @signal(i32 %9, i32 %10)
%12 = call i32 @dexit(i32 1)
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
@SIGHUP = global i32 0
@SIG_IGN = global i32 0
@SIGINT = global i32 0
@SIGTERM = global i32 0
define i32 @sigout() {
%1 = tail call i32 (...) @tunlink()
%2 = load i32, i32* @SIGHUP
%3 = load i32, i32* @SIG_IGN
%4 = tail call i32 @signal(i32 %2, i32 %3)
%5 = load i32, i32* @SIGINT
%6 = load i32, i32* @SIG_IGN
%7 = tail call i32 @signal(i32 %5, i32 %6)
%8 = load i32, i32* @SIGTERM
%9 = load i32, i32* @SIG_IGN
%10 = tail call i32 @signal(i32 %8, i32 %9)
%11 = tail call i32 @dexit(i32 1)
ret i32 undef
}