xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t inverse_adjust_seed_24(uint32_t seed) { return seed ^ (seed << 24); }


x86 assembly (clang, -O0):
<inverse_adjust_seed_24>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
shl    $0x18,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inverse_adjust_seed_24>:
mov    %edi,%eax
shl    $0x18,%eax
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @inverse_adjust_seed_24(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = shl i32 %4, 24
%6 = xor i32 %3, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @inverse_adjust_seed_24(i32 %0) {
%2 = shl i32 %0, 24
%3 = xor i32 %2, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
void FingerboardViola(double boardLength) {
  printf("Dlugosc podstrunnicy altowki wynosi: %lf\n\n",
         (((boardLength * 0.181 * 3) + (boardLength * 0.181 * 2)) * 5) / 6);
}


x86 assembly (clang, -O0):
<FingerboardViola>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xefb(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xeee(%rip),%xmm1
mulsd  -0x8(%rbp),%xmm1
movsd  0xed9(%rip),%xmm2
mulsd  %xmm2,%xmm1
movsd  0xec5(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xead(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xe99(%rip),%xmm1
divsd  %xmm1,%xmm0
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FingerboardViola>:
mulsd  0xee8(%rip),%xmm0
movapd %xmm0,%xmm1
mulsd  0xee4(%rip),%xmm0
addsd  %xmm1,%xmm1
addsd  %xmm1,%xmm0
mulsd  0xedc(%rip),%xmm0
divsd  0xedc(%rip),%xmm0
lea    0xedd(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [43 x i8] c"Dlugosc podstrunnicy altowki wynosi: %lf\0A\0A\00"
define void @FingerboardViola(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 1.810000e-01
%5 = load double, double* %2
%6 = fmul double %5, 1.810000e-01
%7 = fmul double %6, 2.000000e+00
%8 = call double @llvm.fmuladd.f64(double %4, double 3.000000e+00, double %7)
%9 = fmul double %8, 5.000000e+00
%10 = fdiv double %9, 6.000000e+00
%11 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), double %10)
ret void
}

LLVM IR (-O2):
@.str = [43 x i8] c"Dlugosc podstrunnicy altowki wynosi: %lf\0A\0A\00"
define void @FingerboardViola(double %0) {
%2 = fmul double %0, 1.810000e-01
%3 = fmul double %2, 2.000000e+00
%4 = tail call double @llvm.fmuladd.f64(double %2, double 3.000000e+00, double %3)
%5 = fmul double %4, 5.000000e+00
%6 = fdiv double %5, 6.000000e+00
%7 = tail call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), double %6)
ret void
}
/* Variables and functions */
int NLA_ALIGN(int /*<<< orphan*/);
int /*<<< orphan*/ nla_attr_size(int);
int nla_total_size_64bit(int payload) {
  return NLA_ALIGN(nla_attr_size(payload));
}


x86 assembly (clang, -O0):
<nla_total_size_64bit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <nla_attr_size@plt>
mov    %eax,%edi
call   1040 <NLA_ALIGN@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nla_total_size_64bit>:
push   %rax
call   1030 <nla_attr_size@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <NLA_ALIGN@plt>

LLVM IR (-O0):
define i32 @nla_total_size_64bit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @nla_attr_size(i32 %3)
%5 = call i32 @NLA_ALIGN(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @nla_total_size_64bit(i32 %0) {
%2 = tail call i32 @nla_attr_size(i32 %0)
%3 = tail call i32 @NLA_ALIGN(i32 %2)
ret i32 %3
}
/* Variables and functions */
int snprintf(char *, size_t, char *, char *, int);
scalar_t__ strchr(char *, char);
int anetFormatAddr(char *buf, size_t buf_len, char *ip, int port) {
  return snprintf(buf, buf_len, strchr(ip, ':') ? "[%s]:%d" : "%s:%d", ip,
                  port);
}


x86 assembly (clang, -O0):
<anetFormatAddr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rdi
mov    $0x3a,%esi
call   1030 <strchr@plt>
mov    -0x30(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    %rax,%rcx
lea    0xea1(%rip),%rdx
lea    0xe92(%rip),%rax
cmp    $0x0,%rcx
cmovne %rax,%rdx
mov    -0x18(%rbp),%rcx
mov    -0x1c(%rbp),%r8d
call   1040 <snprintf@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<anetFormatAddr>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%r14d
mov    %rdx,%rbx
mov    %rsi,%r15
mov    %rdi,%rbp
mov    %rdx,%rdi
mov    $0x3a,%esi
call   1030 <strchr@plt>
test   %rax,%rax
lea    0xebe(%rip),%rax
lea    0xeaf(%rip),%rdx
cmove  %rax,%rdx
mov    %rbp,%rdi
mov    %r15,%rsi
mov    %rbx,%rcx
mov    %r14d,%r8d
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1040 <snprintf@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"[%s]:%d\00"
@.str.1 = [6 x i8] c"%s:%d\00"
define i32 @anetFormatAddr(i8* %0, i64 %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = load i8*, i8** %7
%12 = call i64 @strchr(i8* %11, i8 signext 58)
%13 = icmp ne i64 %12, 0
%14 = zext i1 %13 to i64
%15 = select i1 %13, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0)
%16 = load i8*, i8** %7
%17 = load i32, i32* %8
%18 = call i32 @snprintf(i8* %9, i64 %10, i8* %15, i8* %16, i32 %17)
ret i32 %18
}

LLVM IR (-O2):
@.str = [8 x i8] c"[%s]:%d\00"
@.str.1 = [6 x i8] c"%s:%d\00"
define i32 @anetFormatAddr(i8* %0, i64 %1, i8* %2, i32 %3) {
%5 = tail call i64 @strchr(i8* %2, i8 signext 58)
%6 = icmp eq i64 %5, 0
%7 = select i1 %6, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0)
%8 = tail call i32 @snprintf(i8* %0, i64 %1, i8* %7, i8* %2, i32 %3)
ret i32 %8
}
int _colorizearg(char *arg) {}


x86 assembly (clang, -O0):
<_colorizearg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_colorizearg>:
ret

LLVM IR (-O0):
define i32 @_colorizearg(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @_colorizearg(i8* nocapture readnone %0) {
ret i32 undef
}
int some_function() { return 10; }


x86 assembly (clang, -O0):
<some_function>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<some_function>:
mov    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @some_function() {
ret i32 10
}

LLVM IR (-O2):
define i32 @some_function() {
ret i32 10
}
/* Variables and functions */
int /*<<< orphan*/ getcwd(int /*<<< orphan*/ *, int /*<<< orphan*/);
char *not_null_or_die(int /*<<< orphan*/);
char *getcwd_or_die(void) { return not_null_or_die(getcwd(NULL, 0)); }


x86 assembly (clang, -O0):
<getcwd_or_die>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
xor    %esi,%esi
call   1030 <getcwd@plt>
mov    %eax,%edi
call   1040 <not_null_or_die@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getcwd_or_die>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
call   1030 <getcwd@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <not_null_or_die@plt>

LLVM IR (-O0):
define i8* @getcwd_or_die() {
%1 = call i32 @getcwd(i32* null, i32 0)
%2 = call i8* @not_null_or_die(i32 %1)
ret i8* %2
}

LLVM IR (-O2):
define i8* @getcwd_or_die() {
%1 = tail call i32 @getcwd(i32* null, i32 0)
%2 = tail call i8* @not_null_or_die(i32 %1)
ret i8* %2
}
/* Type definitions */
struct disassemble_info {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ checkrom(struct disassemble_info *, int);
int rominfo(struct disassemble_info *dd, char *b) {
  checkrom(dd, 1);
  return 0;
}


x86 assembly (clang, -O0):
<rominfo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <checkrom@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rominfo>:
push   %rax
mov    $0x1,%esi
call   1030 <checkrom@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.disassemble_info = type { i32 }
define i32 @rominfo(%struct.disassemble_info* %0, i8* %1) {
%3 = alloca %struct.disassemble_info*
%4 = alloca i8*
store %struct.disassemble_info* %0, %struct.disassemble_info** %3
store i8* %1, i8** %4
%5 = load %struct.disassemble_info*, %struct.disassemble_info** %3
%6 = call i32 @checkrom(%struct.disassemble_info* %5, i32 1)
ret i32 0
}

LLVM IR (-O2):
%struct.disassemble_info = type { i32 }
define i32 @rominfo(%struct.disassemble_info* %0, i8* nocapture readnone %1) {
%3 = tail call i32 @checkrom(%struct.disassemble_info* %0, i32 1)
ret i32 0
}
float index_to_p(int index) {
  if (index < 100) {
    return 0.0010 * index + 0.0005;
  } else {
    return 0.0100 * (index - 100) + 0.1050;
  }
}


x86 assembly (clang, -O0):
<index_to_p>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x64,-0x8(%rbp)
jge    113c <index_to_p+0x3c>
cvtsi2sdl -0x8(%rbp),%xmm0
movsd  0xef2(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeee(%rip),%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1167 <index_to_p+0x67>
mov    -0x8(%rbp),%eax
sub    $0x64,%eax
cvtsi2sd %eax,%xmm0
movsd  0xeb2(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeae(%rip),%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<index_to_p>:
cmp    $0x63,%edi
jg     111e <index_to_p+0x1e>
cvtsi2sd %edi,%xmm0
mulsd  0xeff(%rip),%xmm0
addsd  0xeff(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret
add    $0xffffff9c,%edi
cvtsi2sd %edi,%xmm0
mulsd  0xed3(%rip),%xmm0
addsd  0xed3(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @index_to_p(i32 %0) {
%2 = alloca float
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 100
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sitofp i32 %7 to double
%9 = call double @llvm.fmuladd.f64(double 1.000000e-03, double %8, double 5.000000e-04)
%10 = fptrunc double %9 to float
store float %10, float* %2
br label %17
11: ; preds = %1
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 100
%14 = sitofp i32 %13 to double
%15 = call double @llvm.fmuladd.f64(double 1.000000e-02, double %14, double 1.050000e-01)
%16 = fptrunc double %15 to float
store float %16, float* %2
br label %17
17: ; preds = %11, %6
%18 = load float, float* %2
ret float %18
}

LLVM IR (-O2):
define float @index_to_p(i32 %0) {
%2 = icmp slt i32 %0, 100
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = sitofp i32 %0 to double
%5 = tail call double @llvm.fmuladd.f64(double %4, double 1.000000e-03, double 5.000000e-04)
br label %10
6: ; preds = %1
%7 = add nsw i32 %0, -100
%8 = sitofp i32 %7 to double
%9 = tail call double @llvm.fmuladd.f64(double %8, double 1.000000e-02, double 1.050000e-01)
br label %10
10: ; preds = %6, %3
%11 = phi double [ %5, %3 ], [ %9, %6 ]
%12 = fptrunc double %11 to float
ret float %12
}
/* Variables and functions */
int charGreaterThan(void const *, void const *);
int charLessThan(const void *a, const void *b) { return charGreaterThan(b, a); }


x86 assembly (clang, -O0):
<charLessThan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <charGreaterThan@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<charLessThan>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
jmp    1030 <charGreaterThan@plt>

LLVM IR (-O0):
define i32 @charLessThan(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i8*, i8** %3
%7 = call i32 @charGreaterThan(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @charLessThan(i8* %0, i8* %1) {
%3 = tail call i32 @charGreaterThan(i8* %1, i8* %0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isgraph(int);
void t_isgraph_0x5b() {
  Assert_real((isgraph(91)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              460, ("isgraph should be 1 for ["));
}


x86 assembly (clang, -O0):
<t_isgraph_0x5b>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5b,%edi
call   1040 <isgraph@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x1cc,%edx
lea    0xf65(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x5b>:
push   %rax
mov    $0x5b,%edi
call   1040 <isgraph@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x1cc,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for [\00"
define void @t_isgraph_0x5b() {
%1 = call i32 @isgraph(i32 91)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 460, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for [\00"
define void @t_isgraph_0x5b() {
%1 = tail call i32 @isgraph(i32 91)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 460, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
double COS(statlink, x)
int *statlink;
double x;
{ return (_cos(x)); }


x86 assembly (clang, -O0):
<COS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    $0x1,%al
call   1030 <_cos@plt>
cvtsi2sd %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<COS>:
push   %rax
mov    $0x1,%al
call   1030 <_cos@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @COS(i32* %0, double %1) {
%3 = alloca i32*
%4 = alloca double
store i32* %0, i32** %3
store double %1, double* %4
%5 = load double, double* %4
%6 = call i32 (double, ...) bitcast (i32 (...)* @_cos to i32 (double, ...)*)(double %5)
%7 = sitofp i32 %6 to double
ret double %7
}

LLVM IR (-O2):
define double @COS(i32* nocapture readnone %0, double %1) {
%3 = tail call i32 (double, ...) bitcast (i32 (...)* @_cos to i32 (double, ...)*)(double %1)
%4 = sitofp i32 %3 to double
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ foo(char *, char *);
int main() {
  char a, b;
  foo(&a, &b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x5(%rbp),%rdi
lea    -0x6(%rbp),%rsi
call   1030 <foo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0x7(%rsp),%rdi
lea    0x6(%rsp),%rsi
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i8
store i32 0, i32* %1
%4 = call i32 @foo(i8* %2, i8* %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i8
%2 = alloca i8
%3 = call i32 @foo(i8* %1, i8* %2)
ret i32 0
}
/* Variables and functions */
int FD_SETSIZE;
int _isValidSocket(int fd) { return fd > (-1) && fd < FD_SETSIZE; }


x86 assembly (clang, -O0):
<_isValidSocket>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0xffffffff,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1128 <_isValidSocket+0x28>
mov    -0x4(%rbp),%eax
mov    0x2ec0(%rip),%rcx
cmp    (%rcx),%eax
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_isValidSocket>:
test   %edi,%edi
setns  %al
mov    0x2ed4(%rip),%rcx
cmp    %edi,(%rcx)
setg   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
@FD_SETSIZE = global i32 0
define i32 @_isValidSocket(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, -1
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* %2
%7 = load i32, i32* @FD_SETSIZE
%8 = icmp slt i32 %6, %7
br label %9
9: ; preds = %5, %1
%10 = phi i1 [ false, %1 ], [ %8, %5 ]
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
@FD_SETSIZE = global i32 0
define i32 @_isValidSocket(i32 %0) {
%2 = icmp sgt i32 %0, -1
%3 = load i32, i32* @FD_SETSIZE
%4 = icmp sgt i32 %3, %0
%5 = select i1 %2, i1 %4, i1 false
%6 = zext i1 %5 to i32
ret i32 %6
}
float vsFabs(float in) { return (in >= 0.f) ? in : -in; }


x86 assembly (clang, -O0):
<vsFabs>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     1129 <vsFabs+0x29>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
jmp    1140 <vsFabs+0x40>
movss  -0x4(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<vsFabs>:
movaps 0xef9(%rip),%xmm1
xorps  %xmm0,%xmm1
xorps  %xmm2,%xmm2
cmpless %xmm0,%xmm2
andps  %xmm2,%xmm0
andnps %xmm1,%xmm2
orps   %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @vsFabs(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp oge float %3, 0.000000e+00
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load float, float* %2
br label %10
7: ; preds = %1
%8 = load float, float* %2
%9 = fneg float %8
br label %10
10: ; preds = %7, %5
%11 = phi float [ %6, %5 ], [ %9, %7 ]
ret float %11
}

LLVM IR (-O2):
define float @vsFabs(float %0) {
%2 = fcmp oge float %0, 0.000000e+00
%3 = fneg float %0
%4 = select i1 %2, float %0, float %3
ret float %4
}
int ranf(max)
int max;
{
  int t;
  if (max <= 0)
    return (0);
  t = rand() >> 5;
  return (t % max);
}


x86 assembly (clang, -O0):
<ranf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jg     1131 <ranf+0x21>
movl   $0x0,-0x4(%rbp)
jmp    1148 <ranf+0x38>
mov    $0x0,%al
call   1030 <rand@plt>
sar    $0x5,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ranf>:
test   %edi,%edi
jle    1128 <ranf+0x18>
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
sar    $0x5,%eax
cltd
idiv   %ebx
mov    %edx,%eax
pop    %rbx
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ranf(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp sle i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %14
8: ; preds = %1
%9 = call i32 (...) @rand()
%10 = ashr i32 %9, 5
store i32 %10, i32* %4
%11 = load i32, i32* %4
%12 = load i32, i32* %3
%13 = srem i32 %11, %12
store i32 %13, i32* %2
br label %14
14: ; preds = %8, %7
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @ranf(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i32 (...) @rand()
%5 = ashr i32 %4, 5
%6 = srem i32 %5, %0
br label %7
7: ; preds = %1, %3
%8 = phi i32 [ %6, %3 ], [ 0, %1 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ CompileWord(int, long);
void DoChop(void) {
  CompileWord(51, -1L);
  CompileWord(16, 0L);
  CompileWord(51, 1L);
  CompileWord(16, 0L);
}


x86 assembly (clang, -O0):
<DoChop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x33,%edi
mov    $0xffffffffffffffff,%rsi
call   1030 <CompileWord@plt>
mov    $0x10,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <CompileWord@plt>
mov    $0x33,%edi
mov    $0x1,%esi
call   1030 <CompileWord@plt>
mov    $0x10,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <CompileWord@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoChop>:
push   %rax
mov    $0x33,%edi
mov    $0xffffffffffffffff,%rsi
call   1030 <CompileWord@plt>
mov    $0x10,%edi
xor    %esi,%esi
call   1030 <CompileWord@plt>
mov    $0x1,%esi
mov    $0x33,%edi
call   1030 <CompileWord@plt>
mov    $0x10,%edi
xor    %esi,%esi
pop    %rax
jmp    1030 <CompileWord@plt>

LLVM IR (-O0):
define void @DoChop() {
%1 = call i32 @CompileWord(i32 51, i64 -1)
%2 = call i32 @CompileWord(i32 16, i64 0)
%3 = call i32 @CompileWord(i32 51, i64 1)
%4 = call i32 @CompileWord(i32 16, i64 0)
ret void
}

LLVM IR (-O2):
define void @DoChop() {
%1 = tail call i32 @CompileWord(i32 51, i64 -1)
%2 = tail call i32 @CompileWord(i32 16, i64 0)
%3 = tail call i32 @CompileWord(i32 51, i64 1)
%4 = tail call i32 @CompileWord(i32 16, i64 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_mapping_table_1(int);
int /*<<< orphan*/ test_mapping_table_2();
void test_search() {
  test_mapping_table_1(0);
  test_mapping_table_1(7);
  test_mapping_table_1(77);
  test_mapping_table_1(777);
  test_mapping_table_1(5000);
  test_mapping_table_2();
}


x86 assembly (clang, -O0):
<test_search>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1040 <test_mapping_table_1@plt>
mov    $0x7,%edi
call   1040 <test_mapping_table_1@plt>
mov    $0x4d,%edi
call   1040 <test_mapping_table_1@plt>
mov    $0x309,%edi
call   1040 <test_mapping_table_1@plt>
mov    $0x1388,%edi
call   1040 <test_mapping_table_1@plt>
mov    $0x0,%al
call   1030 <test_mapping_table_2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_search>:
push   %rax
xor    %edi,%edi
call   1040 <test_mapping_table_1@plt>
mov    $0x7,%edi
call   1040 <test_mapping_table_1@plt>
mov    $0x4d,%edi
call   1040 <test_mapping_table_1@plt>
mov    $0x309,%edi
call   1040 <test_mapping_table_1@plt>
mov    $0x1388,%edi
call   1040 <test_mapping_table_1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <test_mapping_table_2@plt>

LLVM IR (-O0):
define void @test_search() {
%1 = call i32 @test_mapping_table_1(i32 0)
%2 = call i32 @test_mapping_table_1(i32 7)
%3 = call i32 @test_mapping_table_1(i32 77)
%4 = call i32 @test_mapping_table_1(i32 777)
%5 = call i32 @test_mapping_table_1(i32 5000)
%6 = call i32 (...) @test_mapping_table_2()
ret void
}

LLVM IR (-O2):
define void @test_search() {
%1 = tail call i32 @test_mapping_table_1(i32 0)
%2 = tail call i32 @test_mapping_table_1(i32 7)
%3 = tail call i32 @test_mapping_table_1(i32 77)
%4 = tail call i32 @test_mapping_table_1(i32 777)
%5 = tail call i32 @test_mapping_table_1(i32 5000)
%6 = tail call i32 (...) @test_mapping_table_2()
ret void
}
void shuffle_albums() {}


x86 assembly (clang, -O0):
<shuffle_albums>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shuffle_albums>:
ret

LLVM IR (-O0):
define void @shuffle_albums() {
ret void
}

LLVM IR (-O2):
define void @shuffle_albums() {
ret void
}
/* Variables and functions */
scalar_t__ getpid();
int /*<<< orphan*/ snprintf(char *, size_t, char *, long long);
void get_receiver_test_trid(char *trid, size_t trid_len) {
  snprintf(trid, trid_len,
           "receiver-unit"
           "/%lld",
           (long long)getpid());
}


x86 assembly (clang, -O0):
<get_receiver_test_trid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %rax,%rcx
lea    0xea7(%rip),%rdx
call   1040 <snprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_receiver_test_trid>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xec8(%rip),%rdx
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %rax,%rcx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <snprintf@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"receiver-unit/%lld\00"
define void @get_receiver_test_trid(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i64 (...) @getpid()
%8 = call i32 @snprintf(i8* %5, i64 %6, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i64 %7)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"receiver-unit/%lld\00"
define void @get_receiver_test_trid(i8* %0, i64 %1) {
%3 = tail call i64 (...) @getpid()
%4 = tail call i32 @snprintf(i8* %0, i64 %1, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i64 %3)
ret void
}
int chdir(const char *path) {
  int result;
  asm("movl $12, %%eax;"
      "int $0x80;"
      : "=a"(result)
      : "b"(path));
  return result;
}


x86 assembly (clang, -O0):
<chdir>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rbx
mov    $0xc,%eax
int    $0x80
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<chdir>:
push   %rbx
mov    %rdi,%rbx
mov    $0xc,%eax
int    $0x80
pop    %rbx
ret

LLVM IR (-O0):
define i32 @chdir(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 asm "movl $$12, %eax;int $$0x80;", "={ax},{bx},~{dirflag},~{fpsr},~{flags}"(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @chdir(i8* readnone %0) {
%2 = tail call i32 asm "movl $$12, %eax;int $$0x80;", "={ax},{bx},~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret i32 %2
}
/* Variables and functions */
int isSubsequence(char *, char *);
int /*<<< orphan*/ printf(char *, int);
int main() {
  char *s = "abc";
  char *t = "ahbgdc";
  bool issub = isSubsequence(s, t);
  printf("%d\n", issub);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    0xec3(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <isSubsequence@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%esi
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xed5(%rip),%rsi
call   1040 <isSubsequence@plt>
lea    0xed0(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"abc\00"
@.str.1 = [7 x i8] c"ahbgdc\00"
@.str.2 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i32 0, i32* %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %2
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8** %3
%5 = load i8*, i8** %2
%6 = load i8*, i8** %3
%7 = call i32 @isSubsequence(i8* %5, i8* %6)
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"abc\00"
@.str.1 = [7 x i8] c"ahbgdc\00"
@.str.2 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @isSubsequence(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int buffer_eq_icase_ssn(char const *const, char const *const, size_t const);
int buffer_eq_icase_ss(const char *const a, const size_t alen,
                       const char *const b, const size_t blen) {
  return (alen == blen) ? buffer_eq_icase_ssn(a, b, blen) : 0;
}


x86 assembly (clang, -O0):
<buffer_eq_icase_ss>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x20(%rbp),%rax
jne    114f <buffer_eq_icase_ss+0x3f>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <buffer_eq_icase_ssn@plt>
mov    %eax,-0x24(%rbp)
jmp    1159 <buffer_eq_icase_ss+0x49>
xor    %eax,%eax
mov    %eax,-0x24(%rbp)
jmp    1159 <buffer_eq_icase_ss+0x49>
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buffer_eq_icase_ss>:
cmp    %rcx,%rsi
jne    1123 <buffer_eq_icase_ss+0x13>
mov    %rsi,%rax
mov    %rdx,%rsi
mov    %rax,%rdx
jmp    1030 <buffer_eq_icase_ssn@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @buffer_eq_icase_ss(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%9 = load i64, i64* %6
%10 = load i64, i64* %8
%11 = icmp eq i64 %9, %10
br i1 %11, label %12, label %17
12: ; preds = %4
%13 = load i8*, i8** %5
%14 = load i8*, i8** %7
%15 = load i64, i64* %8
%16 = call i32 @buffer_eq_icase_ssn(i8* %13, i8* %14, i64 %15)
br label %18
17: ; preds = %4
br label %18
18: ; preds = %17, %12
%19 = phi i32 [ %16, %12 ], [ 0, %17 ]
ret i32 %19
}

LLVM IR (-O2):
define i32 @buffer_eq_icase_ss(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = icmp eq i64 %1, %3
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 @buffer_eq_icase_ssn(i8* %0, i8* %2, i64 %1)
br label %8
8: ; preds = %4, %6
%9 = phi i32 [ %7, %6 ], [ 0, %4 ]
ret i32 %9
}
/* Variables and functions */
char in(int);
int /*<<< orphan*/ out(int, int);
void main() {
  if (1 == 1) {
    out(1, 1);
    char x = in(1);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%esi
mov    %esi,%edi
call   1030 <out@plt>
mov    $0x1,%edi
call   1040 <in@plt>
mov    %al,-0x1(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
mov    $0x1,%esi
call   1030 <out@plt>
mov    $0x1,%edi
pop    %rax
jmp    1040 <in@plt>

LLVM IR (-O0):
define void @main() {
%1 = alloca i8
%2 = call i32 @out(i32 1, i32 1)
%3 = call signext i8 @in(i32 1)
store i8 %3, i8* %1
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @out(i32 1, i32 1)
%2 = tail call signext i8 @in(i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ put8(int);
void shld_reg32_reg32_cl(unsigned long reg1, unsigned long reg2) {
  put8(0x0F);
  put8(0xA5);
  put8(0xC0 | (reg2 << 3) | reg1);
}


x86 assembly (clang, -O0):
<shld_reg32_reg32_cl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xf,%edi
call   1030 <put8@plt>
mov    $0xa5,%edi
call   1030 <put8@plt>
mov    -0x10(%rbp),%rax
shl    $0x3,%rax
or     $0xc0,%rax
or     -0x8(%rbp),%rax
mov    %eax,%edi
call   1030 <put8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shld_reg32_reg32_cl>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    $0xf,%edi
call   1030 <put8@plt>
mov    $0xa5,%edi
call   1030 <put8@plt>
shl    $0x3,%r14d
or     %r14d,%ebx
or     $0xc0,%ebx
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @shld_reg32_reg32_cl(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = call i32 @put8(i32 15)
%6 = call i32 @put8(i32 165)
%7 = load i64, i64* %4
%8 = shl i64 %7, 3
%9 = or i64 192, %8
%10 = load i64, i64* %3
%11 = or i64 %9, %10
%12 = trunc i64 %11 to i32
%13 = call i32 @put8(i32 %12)
ret void
}

LLVM IR (-O2):
define void @shld_reg32_reg32_cl(i64 %0, i64 %1) {
%3 = tail call i32 @put8(i32 15)
%4 = tail call i32 @put8(i32 165)
%5 = shl i64 %1, 3
%6 = or i64 %5, %0
%7 = trunc i64 %6 to i32
%8 = or i32 %7, 192
%9 = tail call i32 @put8(i32 %8)
ret void
}
int IsOperator(char c) { return c == '+' || c == '-' || c == '*' || c == '/'; }


x86 assembly (clang, -O0):
<IsOperator>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2b,%ecx
mov    %al,-0x2(%rbp)
je     114d <IsOperator+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2d,%ecx
mov    %al,-0x2(%rbp)
je     114d <IsOperator+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2a,%ecx
mov    %al,-0x2(%rbp)
je     114d <IsOperator+0x4d>
movsbl -0x1(%rbp),%eax
cmp    $0x2f,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IsOperator>:
cmp    $0x2d,%dil
ja     1120 <IsOperator+0x20>
mov    $0x1,%eax
movzbl %dil,%ecx
movabs $0x2c0000000000,%rdx
bt     %rcx,%rdx
jae    1120 <IsOperator+0x20>
ret
xor    %eax,%eax
cmp    $0x2f,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @IsOperator(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 43
br i1 %5, label %18, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 45
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 42
br i1 %13, label %18, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 47
br label %18
18: ; preds = %14, %10, %6, %1
%19 = phi i1 [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %17, %14 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @IsOperator(i8 signext %0) {
switch i8 %0, label %2 [
i8 45, label %5
i8 43, label %5
i8 42, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 47
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
void init_shell(void) {}


x86 assembly (clang, -O0):
<init_shell>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_shell>:
ret

LLVM IR (-O0):
define void @init_shell() {
ret void
}

LLVM IR (-O2):
define void @init_shell() {
ret void
}
int tgdb_client_err_msg(struct tgdb_client_context *tcc) { return -1; }


x86 assembly (clang, -O0):
<tgdb_client_err_msg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tgdb_client_err_msg>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.tgdb_client_context = type opaque
define i32 @tgdb_client_err_msg(%struct.tgdb_client_context* %0) {
%2 = alloca %struct.tgdb_client_context*
store %struct.tgdb_client_context* %0, %struct.tgdb_client_context** %2
ret i32 -1
}

LLVM IR (-O2):
%struct.tgdb_client_context = type opaque
define i32 @tgdb_client_err_msg(%struct.tgdb_client_context* nocapture readnone %0) {
ret i32 -1
}
/* Variables and functions */
char getchar();
void eatendline(void) {
  while (getchar() != '\n') {
    ;
  }
}


x86 assembly (clang, -O0):
<eatendline>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <eatendline+0x9>
mov    $0x0,%al
call   1030 <getchar@plt>
movsbl %al,%eax
cmp    $0xa,%eax
je     1131 <eatendline+0x21>
jmp    1119 <eatendline+0x9>
pop    %rbp
ret

x86 assembly (clang, -O2):
<eatendline>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <getchar@plt>
cmp    $0xa,%al
jne    1120 <eatendline+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @eatendline() {
br label %1
1: ; preds = %5, %0
%2 = call signext i8 (...) @getchar()
%3 = sext i8 %2 to i32
%4 = icmp ne i32 %3, 10
br i1 %4, label %5, label %6
5: ; preds = %1
br label %1
6: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @eatendline() {
br label %1
1: ; preds = %1, %0
%2 = tail call signext i8 (...) @getchar()
%3 = icmp eq i8 %2, 10
br i1 %3, label %4, label %1
4: ; preds = %1
ret void
}
float stepf(float value, float step_pos) {
  return value < step_pos ? 0.0f : 1.0f;
}


x86 assembly (clang, -O0):
<stepf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
xorps  %xmm3,%xmm3
movss  0xedd(%rip),%xmm2
cmpltss %xmm1,%xmm0
movaps %xmm0,%xmm1
andps  %xmm3,%xmm1
andnps %xmm2,%xmm0
orps   %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<stepf>:
cmpltss %xmm1,%xmm0
movss  0xef3(%rip),%xmm1
andnps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @stepf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp olt float %5, %6
%8 = zext i1 %7 to i64
%9 = select i1 %7, float 0.000000e+00, float 1.000000e+00
ret float %9
}

LLVM IR (-O2):
define float @stepf(float %0, float %1) {
%3 = fcmp olt float %0, %1
%4 = select i1 %3, float 0.000000e+00, float 1.000000e+00
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ foo(char *, int /*<<< orphan*/);
int bar() {
  char c;
  foo(&c, 0);
  return c;
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x1(%rbp),%rdi
xor    %esi,%esi
call   1030 <foo@plt>
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
push   %rax
lea    0x7(%rsp),%rdi
xor    %esi,%esi
call   1030 <foo@plt>
movsbl 0x7(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @bar() {
%1 = alloca i8
%2 = call i32 @foo(i8* %1, i32 0)
%3 = load i8, i8* %1
%4 = sext i8 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @bar() {
%1 = alloca i8
%2 = call i32 @foo(i8* %1, i32 0)
%3 = load i8, i8* %1
%4 = sext i8 %3 to i32
ret i32 %4
}
void mf_w_header_chunk(format, ntracks, division) int format, ntracks, division;
{
  unsigned long ident, length;
  void write16bit(), write32bit();
  ident = 0x4d546864L;
  length = 6;
  write32bit(ident);
  write32bit(length);
  write16bit(format);
  write16bit(ntracks);
  write16bit(division);
}


x86 assembly (clang, -O0):
<mf_w_header_chunk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movq   $0x4d546864,-0x18(%rbp)
4d
movq   $0x6,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    $0x0,%al
call   1040 <write32bit@plt>
mov    -0x20(%rbp),%rdi
mov    $0x0,%al
call   1040 <write32bit@plt>
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1030 <write16bit@plt>
mov    -0x8(%rbp),%edi
mov    $0x0,%al
call   1030 <write16bit@plt>
mov    -0xc(%rbp),%edi
mov    $0x0,%al
call   1030 <write16bit@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mf_w_header_chunk>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %edi,%ebx
mov    $0x4d546864,%edi
xor    %eax,%eax
call   1040 <write32bit@plt>
mov    $0x6,%edi
xor    %eax,%eax
call   1040 <write32bit@plt>
mov    %ebx,%edi
xor    %eax,%eax
call   1030 <write16bit@plt>
mov    %ebp,%edi
xor    %eax,%eax
call   1030 <write16bit@plt>
mov    %r14d,%edi
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <write16bit@plt>

LLVM IR (-O0):
define void @mf_w_header_chunk(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i64
%8 = alloca i64
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i64 1297377380, i64* %7
store i64 6, i64* %8
%9 = load i64, i64* %7
%10 = load i64, i64* %8
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = load i32, i32* %6
ret void
}

LLVM IR (-O2):
define void @mf_w_header_chunk(i32 %0, i32 %1, i32 %2) {
tail call void (i64, ...) bitcast (void (...)* @write32bit to void (i64, ...)*)(i64 1297377380)
tail call void (i64, ...) bitcast (void (...)* @write32bit to void (i64, ...)*)(i64 6)
tail call void (i32, ...) bitcast (void (...)* @write16bit to void (i32, ...)*)(i32 %0)
tail call void (i32, ...) bitcast (void (...)* @write16bit to void (i32, ...)*)(i32 %1)
tail call void (i32, ...) bitcast (void (...)* @write16bit to void (i32, ...)*)(i32 %2)
ret void
}
long double2int(double in) {
  long retval;
  __asm__ __volatile__("fistpl %0" : "=m"(retval) : "t"(in) : "st");
  return retval;
}


x86 assembly (clang, -O0):
<double2int>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
fldl   -0x18(%rbp)
fistpl -0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<double2int>:
movsd  %xmm0,-0x10(%rsp)
fldl   -0x10(%rsp)
fistpl -0x8(%rsp)
mov    -0x8(%rsp),%rax
ret

LLVM IR (-O0):
define i64 @double2int(double %0) {
%2 = alloca double
%3 = alloca i64
store double %0, double* %2
%4 = load double, double* %2
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @double2int(double %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = load i64, i64* %2
ret i64 %4
}
/* Variables and functions */
scalar_t__ send(int, char const *, int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char const *);
int client_send_noreply(int sock, const char *message, char *result,
                        int result_len) {
  int len = 0;
  if (send(sock, message, strlen(message), 0) < 0) {
    ;
    return -1;
  }
  return len;
}


x86 assembly (clang, -O0):
<client_send_noreply>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
movl   $0x0,-0x20(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x2c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x2c(%rbp),%edi
mov    -0x28(%rbp),%rsi
mov    %eax,%edx
xor    %ecx,%ecx
call   1040 <send@plt>
cmp    $0x0,%rax
jge    117a <client_send_noreply+0x5a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1180 <client_send_noreply+0x60>
mov    -0x20(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<client_send_noreply>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
xor    %ecx,%ecx
call   1040 <send@plt>
sar    $0x3f,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @client_send_noreply(i32 %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i32 0, i32* %10
%11 = load i32, i32* %6
%12 = load i8*, i8** %7
%13 = load i8*, i8** %7
%14 = call i32 @strlen(i8* %13)
%15 = call i64 @send(i32 %11, i8* %12, i32 %14, i32 0)
%16 = icmp slt i64 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %4
store i32 -1, i32* %5
br label %20
18: ; preds = %4
%19 = load i32, i32* %10
store i32 %19, i32* %5
br label %20
20: ; preds = %18, %17
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
define i32 @client_send_noreply(i32 %0, i8* %1, i8* nocapture readnone %2, i32 %3) {
%5 = tail call i32 @strlen(i8* %1)
%6 = tail call i64 @send(i32 %0, i8* %1, i32 %5, i32 0)
%7 = ashr i64 %6, 63
%8 = trunc i64 %7 to i32
ret i32 %8
}
XClearWindow() {}


x86 assembly (clang, -O0):
<XClearWindow>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XClearWindow>:
ret

LLVM IR (-O0):
define i32 @XClearWindow() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @XClearWindow() {
ret i32 undef
}
/* Type definitions */
struct ndm_strvec_t {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ndm_strvec_truncate(struct ndm_strvec_t *,
                                       int /*<<< orphan*/);
void ndm_strvec_clear(struct ndm_strvec_t *v) { ndm_strvec_truncate(v, 0); }


x86 assembly (clang, -O0):
<ndm_strvec_clear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <ndm_strvec_truncate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ndm_strvec_clear>:
xor    %esi,%esi
jmp    1030 <ndm_strvec_truncate@plt>

LLVM IR (-O0):
%struct.ndm_strvec_t = type { i32 }
define void @ndm_strvec_clear(%struct.ndm_strvec_t* %0) {
%2 = alloca %struct.ndm_strvec_t*
store %struct.ndm_strvec_t* %0, %struct.ndm_strvec_t** %2
%3 = load %struct.ndm_strvec_t*, %struct.ndm_strvec_t** %2
%4 = call i32 @ndm_strvec_truncate(%struct.ndm_strvec_t* %3, i32 0)
ret void
}

LLVM IR (-O2):
%struct.ndm_strvec_t = type { i32 }
define void @ndm_strvec_clear(%struct.ndm_strvec_t* %0) {
%2 = tail call i32 @ndm_strvec_truncate(%struct.ndm_strvec_t* %0, i32 0)
ret void
}
int getStatesNum(char *stateVector) {
  int i, states = 0;
  for (i = 0; i < 5; i++) {
    if (stateVector[i] != 'X')
      states++;
    else
      return states;
  }
  return states;
}


x86 assembly (clang, -O0):
<getStatesNum>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x18(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x5,-0x14(%rbp)
jge    1161 <getStatesNum+0x61>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x58,%eax
je     1143 <getStatesNum+0x43>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    114e <getStatesNum+0x4e>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1167 <getStatesNum+0x67>
jmp    1153 <getStatesNum+0x53>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1116 <getStatesNum+0x16>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getStatesNum>:
xor    %eax,%eax
cmpb   $0x58,(%rdi)
je     1134 <getStatesNum+0x34>
mov    $0x1,%eax
cmpb   $0x58,0x1(%rdi)
je     1134 <getStatesNum+0x34>
mov    $0x2,%eax
cmpb   $0x58,0x2(%rdi)
je     1134 <getStatesNum+0x34>
mov    $0x3,%eax
cmpb   $0x58,0x3(%rdi)
je     1134 <getStatesNum+0x34>
xor    %eax,%eax
cmpb   $0x58,0x4(%rdi)
sete   %al
xor    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @getStatesNum(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %5
store i32 0, i32* %4
br label %6
6: ; preds = %23, %1
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 5
br i1 %8, label %9, label %26
9: ; preds = %6
%10 = load i8*, i8** %3
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 88
br i1 %16, label %17, label %20
17: ; preds = %9
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %22
20: ; preds = %9
%21 = load i32, i32* %5
store i32 %21, i32* %2
br label %28
22: ; preds = %17
br label %23
23: ; preds = %22
%24 = load i32, i32* %4
%25 = add nsw i32 %24, 1
store i32 %25, i32* %4
br label %6
26: ; preds = %6
%27 = load i32, i32* %5
store i32 %27, i32* %2
br label %28
28: ; preds = %26, %20
%29 = load i32, i32* %2
ret i32 %29
}

LLVM IR (-O2):
define i32 @getStatesNum(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 88
br i1 %3, label %21, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 88
br i1 %7, label %21, label %8
8: ; preds = %4
%9 = getelementptr inbounds i8, i8* %0, i64 2
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 88
br i1 %11, label %21, label %12
12: ; preds = %8
%13 = getelementptr inbounds i8, i8* %0, i64 3
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 88
br i1 %15, label %21, label %16
16: ; preds = %12
%17 = getelementptr inbounds i8, i8* %0, i64 4
%18 = load i8, i8* %17
%19 = icmp eq i8 %18, 88
%20 = select i1 %19, i32 4, i32 5
br label %21
21: ; preds = %16, %12, %8, %4, %1
%22 = phi i32 [ 0, %1 ], [ 1, %4 ], [ 2, %8 ], [ 3, %12 ], [ %20, %16 ]
ret i32 %22
}
void hostapd_ubus_free(struct hapd_interfaces *interfaces) {}


x86 assembly (clang, -O0):
<hostapd_ubus_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<hostapd_ubus_free>:
ret

LLVM IR (-O0):
%struct.hapd_interfaces = type opaque
define void @hostapd_ubus_free(%struct.hapd_interfaces* %0) {
%2 = alloca %struct.hapd_interfaces*
store %struct.hapd_interfaces* %0, %struct.hapd_interfaces** %2
ret void
}

LLVM IR (-O2):
%struct.hapd_interfaces = type opaque
define void @hostapd_ubus_free(%struct.hapd_interfaces* nocapture %0) {
ret void
}