xunge/DecIR huggingface dataset:
OP(ed, f9) { illegal_2(); }


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <illegal_2@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
xor    %eax,%eax
jmp    1030 <illegal_2@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @illegal_2()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @illegal_2()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int a = 10;
  printf("Positive %d\n", a);
  a = -a;
  printf("Negated %d\n", a);
  a = -a;
  printf("Positive %d\n", a);
  a *= -1;
  printf("Negated %d\n", a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xed0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xea2(%rip),%rdi
call   1030 <printf@plt>
imul   $0xffffffff,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xe99(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0xee5(%rip),%r14
mov    %r14,%rdi
mov    $0xa,%esi
call   1030 <printf@plt>
lea    0xede(%rip),%rbx
mov    %rbx,%rdi
mov    $0xfffffff6,%esi
call   1030 <printf@plt>
mov    %r14,%rdi
mov    $0xa,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0xfffffff6,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Positive %d\0A\00"
@.str.1 = [12 x i8] c"Negated %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 10, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* %2
%6 = sub nsw i32 0, %5
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 %7)
%9 = load i32, i32* %2
%10 = sub nsw i32 0, %9
store i32 %10, i32* %2
%11 = load i32, i32* %2
%12 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = load i32, i32* %2
%14 = mul nsw i32 %13, -1
store i32 %14, i32* %2
%15 = load i32, i32* %2
%16 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 %15)
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"Positive %d\0A\00"
@.str.1 = [12 x i8] c"Negated %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 10)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 -10)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 10)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 -10)
ret i32 0
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void a52_set_frmsizecod(uint8_t *p_a52, uint8_t i_frmsizecod) {
  p_a52[4] &= ~0x3f;
  p_a52[4] |= i_frmsizecod & 0x3f;
}


x86 assembly (clang, -O0):
<a52_set_frmsizecod>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%ecx
and    $0xffffffc0,%ecx
mov    %ecx,0x10(%rax)
mov    -0xc(%rbp),%ecx
and    $0x3f,%ecx
mov    -0x8(%rbp),%rax
or     0x10(%rax),%ecx
mov    %ecx,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<a52_set_frmsizecod>:
mov    0x10(%rdi),%eax
and    $0xffffffc0,%eax
and    $0x3f,%esi
or     %eax,%esi
mov    %esi,0x10(%rdi)
ret

LLVM IR (-O0):
define void @a52_set_frmsizecod(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 4
%7 = load i32, i32* %6
%8 = and i32 %7, -64
store i32 %8, i32* %6
%9 = load i32, i32* %4
%10 = and i32 %9, 63
%11 = load i32*, i32** %3
%12 = getelementptr inbounds i32, i32* %11, i64 4
%13 = load i32, i32* %12
%14 = or i32 %13, %10
store i32 %14, i32* %12
ret void
}

LLVM IR (-O2):
define void @a52_set_frmsizecod(i32* nocapture %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 4
%4 = load i32, i32* %3
%5 = and i32 %4, -64
%6 = and i32 %1, 63
%7 = or i32 %5, %6
store i32 %7, i32* %3
ret void
}
int VPX_AllocateTables(void) { return 1; }


x86 assembly (clang, -O0):
<VPX_AllocateTables>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<VPX_AllocateTables>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @VPX_AllocateTables() {
ret i32 1
}

LLVM IR (-O2):
define i32 @VPX_AllocateTables() {
ret i32 1
}
float _accumulate_for_vector_length(float total_so_far, float increment) {
  return (total_so_far + (increment * increment));
}


x86 assembly (clang, -O0):
<_accumulate_for_vector_length>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
movss  -0x8(%rbp),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_accumulate_for_vector_length>:
mulss  %xmm1,%xmm1
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @_accumulate_for_vector_length(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = load float, float* %4
%8 = call float @llvm.fmuladd.f32(float %6, float %7, float %5)
ret float %8
}

LLVM IR (-O2):
define float @_accumulate_for_vector_length(float %0, float %1) {
%3 = tail call float @llvm.fmuladd.f32(float %1, float %1, float %0)
ret float %3
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(char *);
int stat(char *, struct stat *);
char *vfs_translate_path(char const *);
int vfs_stat(char const *path, struct stat *buf) {
  char *rpath = vfs_translate_path(path);
  if (!rpath) {
    return -1;
  }
  int ret = stat(rpath, buf);
  free(rpath);
  return ret;
}


x86 assembly (clang, -O0):
<vfs_stat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <vfs_translate_path@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1164 <vfs_stat+0x34>
movl   $0xffffffff,-0x4(%rbp)
jmp    1183 <vfs_stat+0x53>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <stat@plt>
mov    %eax,-0x24(%rbp)
mov    -0x20(%rbp),%rdi
call   1030 <free@plt>
mov    -0x24(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vfs_stat>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
call   1050 <vfs_translate_path@plt>
test   %rax,%rax
je     115d <vfs_stat+0x2d>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1040 <stat@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %ebp,%eax
jmp    1162 <vfs_stat+0x32>
mov    $0xffffffff,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @vfs_stat(i8* %0, %struct.stat* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca %struct.stat*
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %4
store %struct.stat* %1, %struct.stat** %5
%8 = load i8*, i8** %4
%9 = call i8* @vfs_translate_path(i8* %8)
store i8* %9, i8** %6
%10 = load i8*, i8** %6
%11 = icmp ne i8* %10, null
br i1 %11, label %13, label %12
12: ; preds = %2
store i32 -1, i32* %3
br label %20
13: ; preds = %2
%14 = load i8*, i8** %6
%15 = load %struct.stat*, %struct.stat** %5
%16 = call i32 @stat(i8* %14, %struct.stat* %15)
store i32 %16, i32* %7
%17 = load i8*, i8** %6
%18 = call i32 @free(i8* %17)
%19 = load i32, i32* %7
store i32 %19, i32* %3
br label %20
20: ; preds = %13, %12
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @vfs_stat(i8* %0, %struct.stat* nocapture %1) {
%3 = tail call i8* @vfs_translate_path(i8* %0)
%4 = icmp eq i8* %3, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @stat(i8* %3, %struct.stat* %1)
%7 = tail call i32 @free(i8* %3)
br label %8
8: ; preds = %2, %5
%9 = phi i32 [ %6, %5 ], [ -1, %2 ]
ret i32 %9
}
/* Variables and functions */
scalar_t__ popNumber();
char *popString();
int /*<<< orphan*/ pushString(int /*<<< orphan*/);
int /*<<< orphan*/ string(int, char *);
void basString() {
  int n;
  char *_string;
  _string = popString();
  n = (int)popNumber();
  pushString(string(n, _string));
}


x86 assembly (clang, -O0):
<basString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <popString@plt>
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1060 <popNumber@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <string@plt>
mov    %eax,%edi
call   1050 <pushString@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<basString>:
push   %rbx
xor    %eax,%eax
call   1040 <popString@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1060 <popNumber@plt>
mov    %eax,%edi
mov    %rbx,%rsi
call   1030 <string@plt>
mov    %eax,%edi
pop    %rbx
jmp    1050 <pushString@plt>

LLVM IR (-O0):
define void @basString() {
%1 = alloca i32
%2 = alloca i8*
%3 = call i8* (...) @popString()
store i8* %3, i8** %2
%4 = call i64 (...) @popNumber()
%5 = trunc i64 %4 to i32
store i32 %5, i32* %1
%6 = load i32, i32* %1
%7 = load i8*, i8** %2
%8 = call i32 @string(i32 %6, i8* %7)
%9 = call i32 @pushString(i32 %8)
ret void
}

LLVM IR (-O2):
define void @basString() {
%1 = tail call i8* (...) @popString()
%2 = tail call i64 (...) @popNumber()
%3 = trunc i64 %2 to i32
%4 = tail call i32 @string(i32 %3, i8* %1)
%5 = tail call i32 @pushString(i32 %4)
ret void
}
/* Variables and functions */
int longcad(char *);
int /*<<< orphan*/ printf(char *, int);
main() {
  char *cadena = "abcd";
  printf("%d\n", longcad(cadena));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <longcad@plt>
mov    %eax,%esi
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <longcad@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"abcd\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i8*
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = call i32 @longcad(i8* %2)
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"abcd\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @longcad(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int snprintf(char *, int, char *, unsigned char);
int STR_MODULATION(char *p, int n, unsigned char mod) {
  if (mod == 0)
    return 0;
  return snprintf(p, n, "mod:%d ", mod);
}


x86 assembly (clang, -O0):
<STR_MODULATION>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dl,%al
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %al,-0x15(%rbp)
movzbl -0x15(%rbp),%eax
cmp    $0x0,%eax
jne    113d <STR_MODULATION+0x2d>
movl   $0x0,-0x4(%rbp)
jmp    1157 <STR_MODULATION+0x47>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
lea    0xeb5(%rip),%rdx
movzbl -0x15(%rbp),%ecx
call   1030 <snprintf@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<STR_MODULATION>:
test   %edx,%edx
je     1123 <STR_MODULATION+0x13>
movzbl %dl,%ecx
lea    0xee2(%rip),%rdx
jmp    1030 <snprintf@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [8 x i8] c"mod:%d \00"
define i32 @STR_MODULATION(i8* %0, i32 %1, i8 zeroext %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8 %2, i8* %7
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %3
store i32 0, i32* %4
br label %17
12: ; preds = %3
%13 = load i8*, i8** %5
%14 = load i32, i32* %6
%15 = load i8, i8* %7
%16 = call i32 @snprintf(i8* %13, i32 %14, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8 zeroext %15)
store i32 %16, i32* %4
br label %17
17: ; preds = %12, %11
%18 = load i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
@.str = [8 x i8] c"mod:%d \00"
define i32 @STR_MODULATION(i8* %0, i32 %1, i8 zeroext %2) {
%4 = icmp eq i8 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @snprintf(i8* %0, i32 %1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8 zeroext %2)
br label %7
7: ; preds = %3, %5
%8 = phi i32 [ %6, %5 ], [ 0, %3 ]
ret i32 %8
}
int test_imm_DFuint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0xDF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DFuint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0xdf,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DFuint64_highword_mem>:
testb  $0xdf,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DFuint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 223
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_DFuint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 957777707008
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void __attribute__((dllimport)) foo3() {}


x86 assembly (clang, -O0):
<foo3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo3>:
ret

LLVM IR (-O0):
define void @foo3() {
ret void
}

LLVM IR (-O2):
define void @foo3() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printw(char *, int);
charattr(int a) { printw("\e[%dm", a); }


x86 assembly (clang, -O0):
<charattr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printw@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<charattr>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printw@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"\1B[%dm\00"
define i32 @charattr(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 @printw(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
@.str = [6 x i8] c"\1B[%dm\00"
define i32 @charattr(i32 %0) {
%2 = tail call i32 @printw(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void mostrarArreglo(int *ar, int cant) {
  int i;
  for (i = 0; i < cant; i++)
    printf("\narreglo[%d] = %d", i, ar[i]);
}


x86 assembly (clang, -O0):
<mostrarArreglo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    115a <mostrarArreglo+0x4a>
mov    -0x10(%rbp),%esi
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <mostrarArreglo+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mostrarArreglo>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1147 <mostrarArreglo+0x37>
mov    %rdi,%r14
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r15
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,4),%edx
mov    %r15,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <mostrarArreglo+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [18 x i8] c"\0Aarreglo[%d] = %d\00"
define void @mostrarArreglo(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = load i32, i32* %5
%12 = load i32*, i32** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
%16 = load i32, i32* %15
%17 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %11, i32 %16)
br label %18
18: ; preds = %10
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %6
21: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"\0Aarreglo[%d] = %d\00"
define void @mostrarArreglo(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %14
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %12, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = trunc i64 %7 to i32
%11 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %10, i32 %9)
%12 = add nuw nsw i64 %7, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %14, label %6
14: ; preds = %6, %2
ret void
}
const char *I_NoAppServicesLobbyGetName(void) { return ""; }


x86 assembly (clang, -O0):
<I_NoAppServicesLobbyGetName>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<I_NoAppServicesLobbyGetName>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @I_NoAppServicesLobbyGetName() {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @I_NoAppServicesLobbyGetName() {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int uint32_t;
typedef unsigned long uint16_t;

/* Variables and functions */
void LCDIDDCommandWrite(uint32_t ui32Base, uint32_t ui32CS, uint16_t ui16Cmd) {
  uint32_t ui32Reg;
  ;
  ;
  ui32Reg = ui32CS ? 0x00000020 : 0x00000014;
  (*((volatile unsigned long *)(ui32Base + ui32Reg))) = ui16Cmd;
}


x86 assembly (clang, -O0):
<LCDIDDCommandWrite>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x8(%rbp),%edx
mov    $0x14,%eax
mov    $0x20,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x4(%rbp),%eax
add    -0x14(%rbp),%eax
cltq
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCDIDDCommandWrite>:
test   %esi,%esi
mov    $0x14,%eax
mov    $0x20,%ecx
cmove  %eax,%ecx
movslq %edi,%rax
mov    %rdx,(%rcx,%rax,1)
ret

LLVM IR (-O0):
define void @LCDIDDCommandWrite(i32 %0, i32 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i64
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%8 = load i32, i32* %5
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i64
%11 = select i1 %9, i32 32, i32 20
store i32 %11, i32* %7
%12 = load i64, i64* %6
%13 = load i32, i32* %4
%14 = load i32, i32* %7
%15 = add nsw i32 %13, %14
%16 = sext i32 %15 to i64
%17 = inttoptr i64 %16 to i64*
store volatile i64 %12, i64* %17
ret void
}

LLVM IR (-O2):
define void @LCDIDDCommandWrite(i32 %0, i32 %1, i64 %2) {
%4 = icmp eq i32 %1, 0
%5 = select i1 %4, i32 20, i32 32
%6 = add nsw i32 %5, %0
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i64*
store volatile i64 %2, i64* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void print_vec(int n, int *v) {
  int i;
  for (i = 0; i < n; i++) {
    printf("%d ", v[i]);
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<print_vec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1159 <print_vec+0x49>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <print_vec+0x16>
lea    0xea4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_vec>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %edi,%edi
jle    1157 <print_vec+0x37>
mov    %rsi,%r15
mov    %edi,%r12d
lea    0xec7(%rip),%r14
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <print_vec+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @print_vec(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %4
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d \00"
define void @print_vec(i32 %0, i32* nocapture %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %1, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = tail call i32 @putchar(i32 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __ESBMC_assume(int);
int /*<<< orphan*/ f(int, int);
int main() {
  int x, y;
  __ESBMC_assume(x > y);
  __ESBMC_assume(x >= 0);
  __ESBMC_assume((y > 15) && (y < 18));
  f(x, y);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
setg   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__ESBMC_assume@plt>
cmpl   $0x0,-0x8(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__ESBMC_assume@plt>
xor    %eax,%eax
cmpl   $0xf,-0xc(%rbp)
mov    %al,-0xd(%rbp)
jle    116c <main+0x4c>
cmpl   $0x12,-0xc(%rbp)
setl   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__ESBMC_assume@plt>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1040 <f@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <__ESBMC_assume@plt>
mov    $0x1,%edi
call   1030 <__ESBMC_assume@plt>
xor    %edi,%edi
call   1030 <__ESBMC_assume@plt>
call   1040 <f@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = icmp sgt i32 %4, %5
%7 = zext i1 %6 to i32
%8 = call i32 @__ESBMC_assume(i32 %7)
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 0
%11 = zext i1 %10 to i32
%12 = call i32 @__ESBMC_assume(i32 %11)
%13 = load i32, i32* %3
%14 = icmp sgt i32 %13, 15
br i1 %14, label %15, label %18
15: ; preds = %0
%16 = load i32, i32* %3
%17 = icmp slt i32 %16, 18
br label %18
18: ; preds = %15, %0
%19 = phi i1 [ false, %0 ], [ %17, %15 ]
%20 = zext i1 %19 to i32
%21 = call i32 @__ESBMC_assume(i32 %20)
%22 = load i32, i32* %2
%23 = load i32, i32* %3
%24 = call i32 @f(i32 %22, i32 %23)
%25 = load i32, i32* %1
ret i32 %25
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @__ESBMC_assume(i32 0)
%2 = tail call i32 @__ESBMC_assume(i32 1)
%3 = tail call i32 @__ESBMC_assume(i32 0)
%4 = tail call i32 @f(i32 undef, i32 undef)
ret i32 0
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
uint32_t min(uint32_t a, uint32_t b) { return a < b ? a : b; }


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1127 <min+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <min+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovl  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @min(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @min(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char const *);
void error(int exitcode, int where, const char *message, ...) {
  printf("%s", message);
  exit(exitcode);
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<error>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
mov    %rdx,%rsi
call   1030 <printf@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @error(i32 %0, i32 %1, i8* %2, ...) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %7)
%9 = load i32, i32* %4
%10 = call i32 @exit(i32 %9)
unreachable
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @error(i32 %0, i32 %1, i8* %2, ...) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %2)
%5 = tail call i32 @exit(i32 %0)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, double *, int);
uint64_t UsefulBufUtil_CopyDoubleToUint64(double d) {
  uint64_t u64;
  memcpy(&u64, &d, sizeof(uint64_t));
  return u64;
}


x86 assembly (clang, -O0):
<UsefulBufUtil_CopyDoubleToUint64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
lea    -0xc(%rbp),%rdi
lea    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UsefulBufUtil_CopyDoubleToUint64>:
sub    $0x18,%rsp
movsd  %xmm0,0x10(%rsp)
lea    0xc(%rsp),%rdi
lea    0x10(%rsp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    0xc(%rsp),%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @UsefulBufUtil_CopyDoubleToUint64(double %0) {
%2 = alloca double
%3 = alloca i32
store double %0, double* %2
%4 = call i32 @memcpy(i32* %3, double* %2, i32 4)
%5 = load i32, i32* %3
ret i32 %5
}

LLVM IR (-O2):
define i32 @UsefulBufUtil_CopyDoubleToUint64(double %0) {
%2 = alloca double
%3 = alloca i32
store double %0, double* %2
%4 = bitcast i32* %3 to i8*
%5 = call i32 @memcpy(i32* %3, double* %2, i32 4)
%6 = load i32, i32* %3
ret i32 %6
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;
typedef int crc;

/* Variables and functions */
uint16_t crc_ccitt_update(uint16_t crc, uint8_t data) {
  data ^= ((crc)&0xff);
  data ^= data << 4;
  return ((((uint16_t)data << 8) | ((crc) >> 8)) ^ (uint8_t)(data >> 4) ^
          ((uint16_t)data << 3));
}


x86 assembly (clang, -O0):
<crc_ccitt_update>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x4,%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x8,%eax
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
sar    $0x4,%ecx
xor    %ecx,%eax
mov    -0x8(%rbp),%ecx
shl    $0x3,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<crc_ccitt_update>:
movzbl %dil,%ecx
xor    %esi,%ecx
mov    %ecx,%eax
shl    $0x4,%eax
xor    %ecx,%eax
mov    %eax,%ecx
shl    $0x8,%ecx
sar    $0x8,%edi
or     %edi,%ecx
mov    %eax,%edx
sar    $0x4,%edx
shl    $0x3,%eax
xor    %edx,%eax
xor    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @crc_ccitt_update(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = and i32 %5, 255
%7 = load i32, i32* %4
%8 = xor i32 %7, %6
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = shl i32 %9, 4
%11 = load i32, i32* %4
%12 = xor i32 %11, %10
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = shl i32 %13, 8
%15 = load i32, i32* %3
%16 = ashr i32 %15, 8
%17 = or i32 %14, %16
%18 = load i32, i32* %4
%19 = ashr i32 %18, 4
%20 = xor i32 %17, %19
%21 = load i32, i32* %4
%22 = shl i32 %21, 3
%23 = xor i32 %20, %22
ret i32 %23
}

LLVM IR (-O2):
define i32 @crc_ccitt_update(i32 %0, i32 %1) {
%3 = and i32 %0, 255
%4 = xor i32 %3, %1
%5 = shl i32 %4, 4
%6 = xor i32 %5, %4
%7 = shl i32 %6, 8
%8 = ashr i32 %0, 8
%9 = or i32 %7, %8
%10 = ashr i32 %6, 4
%11 = shl i32 %6, 3
%12 = xor i32 %11, %10
%13 = xor i32 %12, %9
ret i32 %13
}
void RTVfsLockReleaseWriteSlow(void) {}


x86 assembly (clang, -O0):
<RTVfsLockReleaseWriteSlow>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTVfsLockReleaseWriteSlow>:
ret

LLVM IR (-O0):
define void @RTVfsLockReleaseWriteSlow() {
ret void
}

LLVM IR (-O2):
define void @RTVfsLockReleaseWriteSlow() {
ret void
}
/* Type definitions */
struct rbnode {
  int dummy;
};

/* Variables and functions */
struct rbnode *_get_parent(struct rbnode *);
struct rbnode *rb_parent(struct rbnode *node) {
  if (!node)
    goto error_ret;
  return _get_parent(node);
error_ret:
  return 0;
}


x86 assembly (clang, -O0):
<rb_parent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    112c <rb_parent+0x1c>
jmp    113e <rb_parent+0x2e>
mov    -0x10(%rbp),%rdi
call   1030 <_get_parent@plt>
mov    %rax,-0x8(%rbp)
jmp    1146 <rb_parent+0x36>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rb_parent>:
test   %rdi,%rdi
je     111a <rb_parent+0xa>
jmp    1030 <_get_parent@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.rbnode = type { i32 }
define %struct.rbnode* @rb_parent(%struct.rbnode* %0) {
%2 = alloca %struct.rbnode*
%3 = alloca %struct.rbnode*
store %struct.rbnode* %0, %struct.rbnode** %3
%4 = load %struct.rbnode*, %struct.rbnode** %3
%5 = icmp ne %struct.rbnode* %4, null
br i1 %5, label %7, label %6
6: ; preds = %1
br label %10
7: ; preds = %1
%8 = load %struct.rbnode*, %struct.rbnode** %3
%9 = call %struct.rbnode* @_get_parent(%struct.rbnode* %8)
store %struct.rbnode* %9, %struct.rbnode** %2
br label %11
10: ; preds = %6
store %struct.rbnode* null, %struct.rbnode** %2
br label %11
11: ; preds = %10, %7
%12 = load %struct.rbnode*, %struct.rbnode** %2
ret %struct.rbnode* %12
}

LLVM IR (-O2):
%struct.rbnode = type { i32 }
define %struct.rbnode* @rb_parent(%struct.rbnode* %0) {
%2 = icmp eq %struct.rbnode* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call %struct.rbnode* @_get_parent(%struct.rbnode* %0)
br label %5
5: ; preds = %1, %3
%6 = phi %struct.rbnode* [ %4, %3 ], [ null, %1 ]
ret %struct.rbnode* %6
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long window;
};
typedef TYPE_1__ XClientMessageEvent;

/* Variables and functions */
void set_XClientMessageEvent_window(void *_p, unsigned long _v) {
  ((XClientMessageEvent *)_p)->window = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XClientMessageEvent_window>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XClientMessageEvent_window>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define void @set_XClientMessageEvent_window(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @set_XClientMessageEvent_window(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Variables and functions */
char *FN_get_extension_imp(char const *);
char *strdup(char *);
char *FN_get_extension(const char *fname_or_path) {
  char *ret;
  ret = FN_get_extension_imp(fname_or_path);
  if (!ret)
    return 0;
  return strdup(ret);
}


x86 assembly (clang, -O0):
<FN_get_extension>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <FN_get_extension_imp@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1151 <FN_get_extension+0x31>
movq   $0x0,-0x8(%rbp)
jmp    115e <FN_get_extension+0x3e>
mov    -0x18(%rbp),%rdi
call   1040 <strdup@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FN_get_extension>:
push   %rax
call   1030 <FN_get_extension_imp@plt>
test   %rax,%rax
je     1134 <FN_get_extension+0x14>
mov    %rax,%rdi
pop    %rax
jmp    1040 <strdup@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @FN_get_extension(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i8* @FN_get_extension_imp(i8* %5)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %10, label %9
9: ; preds = %1
store i8* null, i8** %2
br label %13
10: ; preds = %1
%11 = load i8*, i8** %4
%12 = call i8* @strdup(i8* %11)
store i8* %12, i8** %2
br label %13
13: ; preds = %10, %9
%14 = load i8*, i8** %2
ret i8* %14
}

LLVM IR (-O2):
define noalias i8* @FN_get_extension(i8* %0) {
%2 = tail call i8* @FN_get_extension_imp(i8* %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i8* @strdup(i8* %2)
br label %6
6: ; preds = %1, %4
%7 = phi i8* [ %5, %4 ], [ null, %1 ]
ret i8* %7
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isbdigit(int);
void t_isbdigit_0xff() {
  Assert_real((isbdigit(255) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isbdigit.c",
              1280, ("isbdigit should be 0 for 0xff"));
}


x86 assembly (clang, -O0):
<t_isbdigit_0xff>:
push   %rbp
mov    %rsp,%rbp
mov    $0xff,%edi
call   1040 <isbdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x500,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isbdigit_0xff>:
push   %rax
mov    $0xff,%edi
call   1040 <isbdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x500,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0xff\00"
define void @t_isbdigit_0xff() {
%1 = call i64 @isbdigit(i32 255)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1280, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0xff\00"
define void @t_isbdigit_0xff() {
%1 = tail call i64 @isbdigit(i32 255)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1280, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int test_imm_ECuint64_lowword_reg(unsigned long long val) {
  return ((val) & (0xEC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_ECuint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xec,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_ECuint64_lowword_reg>:
test   $0xec,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_ECuint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 236
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_ECuint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 236
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int isContent(char *object) {
  if (object == NULL) {
    return 0;
  }
  if (object[0] == '\0') {
    return 0;
  }
  if (object[0] == '<') {
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<isContent>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    111f <isContent+0x1f>
movl   $0x0,-0x4(%rbp)
jmp    115e <isContent+0x5e>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    113b <isContent+0x3b>
movl   $0x0,-0x4(%rbp)
jmp    115e <isContent+0x5e>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x3c,%eax
jne    1157 <isContent+0x57>
movl   $0x0,-0x4(%rbp)
jmp    115e <isContent+0x5e>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isContent>:
test   %rdi,%rdi
je     1117 <isContent+0x17>
mov    (%rdi),%al
test   %al,%al
setne  %cl
cmp    $0x3c,%al
setne  %al
and    %cl,%al
movzbl %al,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isContent(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %22
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 0
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %7
store i32 0, i32* %2
br label %22
14: ; preds = %7
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i64 0
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 60
br i1 %19, label %20, label %21
20: ; preds = %14
store i32 0, i32* %2
br label %22
21: ; preds = %14
store i32 1, i32* %2
br label %22
22: ; preds = %21, %20, %13, %6
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @isContent(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = load i8, i8* %0
%5 = icmp ne i8 %4, 0
%6 = icmp ne i8 %4, 60
%7 = and i1 %5, %6
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %8, %3 ]
ret i32 %10
}
/* Variables and functions */
unsigned int REG_SPI_BASE(unsigned int);
__attribute__((always_)) __attribute__((flatten)) unsigned int
SPI_W0(unsigned int i) {
  return (REG_SPI_BASE(i) + 0x40);
}


x86 assembly (clang, -O0):
<SPI_W0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <REG_SPI_BASE@plt>
add    $0x40,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPI_W0>:
push   %rax
call   1030 <REG_SPI_BASE@plt>
add    $0x40,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @SPI_W0(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @REG_SPI_BASE(i32 %3)
%5 = add i32 %4, 64
ret i32 %5
}

LLVM IR (-O2):
define i32 @SPI_W0(i32 %0) {
%2 = tail call i32 @REG_SPI_BASE(i32 %0)
%3 = add i32 %2, 64
ret i32 %3
}
void replay_decode_channel() {}


x86 assembly (clang, -O0):
<replay_decode_channel>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<replay_decode_channel>:
ret

LLVM IR (-O0):
define void @replay_decode_channel() {
ret void
}

LLVM IR (-O2):
define void @replay_decode_channel() {
ret void
}
unsigned long ebp() {
  unsigned long a = 0;
  __asm__("\tmov %%rbp, %%rax\n" : "=a"(a));
  printf("%%rbp %lx\n", a);
  return a;
}


x86 assembly (clang, -O0):
<ebp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
mov    %rbp,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xece(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ebp>:
push   %rbx
mov    %rbp,%rax
mov    %rax,%rbx
lea    0xee2(%rip),%rdi
mov    %rax,%rsi
xor    %eax,%eax
call   1030 <printf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"%%rbp %lx\0A\00"
define i64 @ebp() {
%1 = alloca i64
store i64 0, i64* %1
%2 = call i64 asm "\09mov %rbp, %rax\0A", "={ax},~{dirflag},~{fpsr},~{flags}"()
store i64 %2, i64* %1
%3 = load i64, i64* %1
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i64 %3)
%5 = load i64, i64* %1
ret i64 %5
}

LLVM IR (-O2):
@.str = [11 x i8] c"%%rbp %lx\0A\00"
define i64 @ebp() {
%1 = tail call i64 asm "\09mov %rbp, %rax\0A", "={ax},~{dirflag},~{fpsr},~{flags}"()
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i64 %1)
ret i64 %1
}
/* Variables and functions */
int /*<<< orphan*/ f(int, int, int, int);
int /*<<< orphan*/ g(int, int, int, int);
int main() {
  f(1, 2, 3, 4);
  f(3, 4, 8, 9);
  g(8, 9, 3, 4);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
mov    $0x4,%ecx
call   1030 <f@plt>
mov    $0x3,%edi
mov    $0x4,%esi
mov    $0x8,%edx
mov    $0x9,%ecx
call   1030 <f@plt>
mov    $0x8,%edi
mov    $0x9,%esi
mov    $0x3,%edx
mov    $0x4,%ecx
call   1040 <g@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
mov    $0x4,%ecx
call   1030 <f@plt>
mov    $0x3,%edi
mov    $0x4,%esi
mov    $0x8,%edx
mov    $0x9,%ecx
call   1030 <f@plt>
mov    $0x8,%edi
mov    $0x9,%esi
mov    $0x3,%edx
mov    $0x4,%ecx
call   1040 <g@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @f(i32 1, i32 2, i32 3, i32 4)
%2 = call i32 @f(i32 3, i32 4, i32 8, i32 9)
%3 = call i32 @g(i32 8, i32 9, i32 3, i32 4)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @f(i32 1, i32 2, i32 3, i32 4)
%2 = tail call i32 @f(i32 3, i32 4, i32 8, i32 9)
%3 = tail call i32 @g(i32 8, i32 9, i32 3, i32 4)
ret i32 0
}
int ft_toupper(int c) {
  if (c >= 'a' && c <= 'z')
    return (c - 32);
  return (c);
}


x86 assembly (clang, -O0):
<ft_toupper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x61,-0x8(%rbp)
jl     1129 <ft_toupper+0x29>
cmpl   $0x7a,-0x8(%rbp)
jg     1129 <ft_toupper+0x29>
mov    -0x8(%rbp),%eax
sub    $0x20,%eax
mov    %eax,-0x4(%rbp)
jmp    112f <ft_toupper+0x2f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_toupper>:
lea    -0x61(%rdi),%ecx
lea    -0x20(%rdi),%eax
cmp    $0x1a,%ecx
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @ft_toupper(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 122
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 32
store i32 %11, i32* %2
br label %14
12: ; preds = %6, %1
%13 = load i32, i32* %3
store i32 %13, i32* %2
br label %14
14: ; preds = %12, %9
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @ft_toupper(i32 %0) {
%2 = add i32 %0, -97
%3 = icmp ult i32 %2, 26
%4 = add nsw i32 %0, -32
%5 = select i1 %3, i32 %4, i32 %0
ret i32 %5
}
/* Variables and functions */
int GET32(int);
int /*<<< orphan*/ PUT32(int, unsigned int);
void uart_send(unsigned int c) {
  while (1) {
    if (GET32(0x20215054) & 0x20)
      break;
  }
  PUT32(0x20215040, c);
}


x86 assembly (clang, -O0):
<uart_send>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x20215054,%edi
call   1040 <GET32@plt>
and    $0x20,%eax
cmp    $0x0,%eax
je     1146 <uart_send+0x26>
jmp    114b <uart_send+0x2b>
jmp    112b <uart_send+0xb>
mov    -0x4(%rbp),%esi
mov    $0x20215040,%edi
call   1030 <PUT32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_send>:
push   %rbx
mov    %edi,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    $0x20215054,%edi
call   1040 <GET32@plt>
test   $0x20,%al
je     1130 <uart_send+0x10>
mov    $0x20215040,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <PUT32@plt>

LLVM IR (-O0):
define void @uart_send(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %1, %8
%4 = call i32 @GET32(i32 539054164)
%5 = and i32 %4, 32
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %3
br label %9
8: ; preds = %3
br label %3
9: ; preds = %7
%10 = load i32, i32* %2
%11 = call i32 @PUT32(i32 539054144, i32 %10)
ret void
}

LLVM IR (-O2):
define void @uart_send(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 @GET32(i32 539054164)
%4 = and i32 %3, 32
%5 = icmp eq i32 %4, 0
br i1 %5, label %2, label %6
6: ; preds = %2
%7 = tail call i32 @PUT32(i32 539054144, i32 %0)
ret void
}