unsigned long long flip_F8(const unsigned long long discs_player,
                           const unsigned long long discs_opponent) {
  unsigned long long my_discs, opp_discs, r;
  unsigned long long flipped =
      (discs_opponent & 0X0000000000000200ULL) & (discs_player >> 7);
  flipped |= (discs_opponent & 0X0000000000000002ULL) & (discs_player << 1);
  my_discs = discs_player & 0X0404040404040000ULL;
  opp_discs = (discs_opponent & 0X0004040404040400ULL) | 0X03FBFBFBFBFBF800ULL;
  r = (opp_discs + 0X0000000000000400ULL) & my_discs;
  if (r != 0) {
    flipped |= (r - 1) & 0X0004040404040400ULL;
  }
  my_discs = discs_player & 0X0000804020100000ULL;
  opp_discs = (discs_opponent & 0X0000004020100800ULL) | 0X00007FBFDFEFF000ULL;
  r = (opp_discs + 0X0000000000000800ULL) & my_discs;
  if (r != 0) {
    flipped |= (r - 1) & 0X0000004020100800ULL;
  }
  my_discs = discs_player & 0X00000000000000F0ULL;
  r = (discs_opponent + 0X0000000000000008ULL) & my_discs;
  if (r != 0) {
    flipped |= (r - 1) & 0X00000000000000F8ULL;
  }
  return flipped;
}


x86 assembly (clang, -O0):
<flip_F8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x200,%rax
mov    -0x8(%rbp),%rcx
shr    $0x7,%rcx
and    %rcx,%rax
mov    %rax,-0x30(%rbp)
mov    -0x10(%rbp),%rax
and    $0x2,%rax
mov    -0x8(%rbp),%rcx
shl    $0x1,%rcx
and    %rcx,%rax
or     -0x30(%rbp),%rax
mov    %rax,-0x30(%rbp)
movabs $0x404040404040000,%rax
04 04 04
and    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movabs $0x4040404040400,%rax
and    -0x10(%rbp),%rax
movabs $0x3fbfbfbfbfbf800,%rcx
fb fb 03
or     %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x400,%rax
and    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
je     11ab <flip_F8+0xab>
mov    -0x28(%rbp),%rax
sub    $0x1,%rax
movabs $0x4040404040400,%rcx
and    %rcx,%rax
or     -0x30(%rbp),%rax
mov    %rax,-0x30(%rbp)
movabs $0x804020100000,%rax
and    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movabs $0x4020100800,%rax
and    -0x10(%rbp),%rax
movabs $0x7fbfdfeff000,%rcx
or     %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x800,%rax
and    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
je     1216 <flip_F8+0x116>
mov    -0x28(%rbp),%rax
sub    $0x1,%rax
movabs $0x4020100800,%rcx
and    %rcx,%rax
or     -0x30(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x8(%rbp),%rax
and    $0xf0,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
add    $0x8,%rax
and    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
je     1255 <flip_F8+0x155>
mov    -0x28(%rbp),%rax
sub    $0x1,%rax
and    $0xf8,%rax
or     -0x30(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flip_F8>:
mov    %edi,%eax
shr    $0x7,%eax
and    %esi,%eax
and    $0x200,%eax
lea    (%rdi,%rdi,1),%r9d
and    %esi,%r9d
and    $0x2,%r9d
or     %rax,%r9
movabs $0x4040404040400,%r8
mov    %rsi,%rax
mov    %rsi,%rdx
and    %r8,%rdx
movabs $0x3fbfbfbfbfbfc00,%rcx
fb fb 03
add    %rdx,%rcx
movabs $0x404040404040000,%rdx
04 04 04
and    %rdi,%rdx
and    %rcx,%rdx
lea    -0x1(%rdx),%rcx
and    %r8,%rcx
test   %rdx,%rdx
cmove  %rdx,%rcx
movabs $0x4020100800,%r8
and    %r8,%rax
movabs $0x7fbfdfeff800,%rdx
add    %rax,%rdx
movabs $0x804020100000,%rax
and    %rdi,%rax
and    %rdx,%rax
lea    -0x1(%rax),%rdx
and    %r8,%rdx
test   %rax,%rax
cmove  %rax,%rdx
add    $0x8,%esi
and    %edi,%esi
and    $0xf0,%esi
lea    -0x1(%rsi),%eax
and    $0xf8,%eax
test   %rsi,%rsi
cmove  %rsi,%rax
or     %r9,%rax
or     %rcx,%rax
or     %rdx,%rax
ret

LLVM IR (-O0):
define i64 @flip_F8(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%9 = load i64, i64* %4
%10 = and i64 %9, 512
%11 = load i64, i64* %3
%12 = lshr i64 %11, 7
%13 = and i64 %10, %12
store i64 %13, i64* %8
%14 = load i64, i64* %4
%15 = and i64 %14, 2
%16 = load i64, i64* %3
%17 = shl i64 %16, 1
%18 = and i64 %15, %17
%19 = load i64, i64* %8
%20 = or i64 %19, %18
store i64 %20, i64* %8
%21 = load i64, i64* %3
%22 = and i64 %21, 289360691352305664
store i64 %22, i64* %5
%23 = load i64, i64* %4
%24 = and i64 %23, 1130315200594944
%25 = or i64 %24, 287100060951115776
store i64 %25, i64* %6
%26 = load i64, i64* %6
%27 = add i64 %26, 1024
%28 = load i64, i64* %5
%29 = and i64 %27, %28
store i64 %29, i64* %7
%30 = load i64, i64* %7
%31 = icmp ne i64 %30, 0
br i1 %31, label %32, label %38
32: ; preds = %2
%33 = load i64, i64* %7
%34 = sub i64 %33, 1
%35 = and i64 %34, 1130315200594944
%36 = load i64, i64* %8
%37 = or i64 %36, %35
store i64 %37, i64* %8
br label %38
38: ; preds = %32, %2
%39 = load i64, i64* %3
%40 = and i64 %39, 141012904181760
store i64 %40, i64* %5
%41 = load i64, i64* %4
%42 = and i64 %41, 275415828480
%43 = or i64 %42, 140462072524800
store i64 %43, i64* %6
%44 = load i64, i64* %6
%45 = add i64 %44, 2048
%46 = load i64, i64* %5
%47 = and i64 %45, %46
store i64 %47, i64* %7
%48 = load i64, i64* %7
%49 = icmp ne i64 %48, 0
br i1 %49, label %50, label %56
50: ; preds = %38
%51 = load i64, i64* %7
%52 = sub i64 %51, 1
%53 = and i64 %52, 275415828480
%54 = load i64, i64* %8
%55 = or i64 %54, %53
store i64 %55, i64* %8
br label %56
56: ; preds = %50, %38
%57 = load i64, i64* %3
%58 = and i64 %57, 240
store i64 %58, i64* %5
%59 = load i64, i64* %4
%60 = add i64 %59, 8
%61 = load i64, i64* %5
%62 = and i64 %60, %61
store i64 %62, i64* %7
%63 = load i64, i64* %7
%64 = icmp ne i64 %63, 0
br i1 %64, label %65, label %71
65: ; preds = %56
%66 = load i64, i64* %7
%67 = sub i64 %66, 1
%68 = and i64 %67, 248
%69 = load i64, i64* %8
%70 = or i64 %69, %68
store i64 %70, i64* %8
br label %71
71: ; preds = %65, %56
%72 = load i64, i64* %8
ret i64 %72
}

LLVM IR (-O2):
define i64 @flip_F8(i64 %0, i64 %1) {
%3 = and i64 %1, 512
%4 = lshr i64 %0, 7
%5 = and i64 %3, %4
%6 = and i64 %1, 2
%7 = shl i64 %0, 1
%8 = and i64 %6, %7
%9 = or i64 %5, %8
%10 = and i64 %0, 289360691352305664
%11 = and i64 %1, 1130315200594944
%12 = add nuw nsw i64 %11, 287100060951116800
%13 = and i64 %10, %12
%14 = icmp eq i64 %13, 0
%15 = add nuw nsw i64 %13, 2251799813685247
%16 = and i64 %15, 1130315200594944
%17 = select i1 %14, i64 0, i64 %16
%18 = and i64 %0, 141012904181760
%19 = and i64 %1, 275415828480
%20 = add nuw nsw i64 %19, 140462072526848
%21 = and i64 %18, %20
%22 = icmp eq i64 %21, 0
%23 = add nuw nsw i64 %21, 549755813887
%24 = and i64 %23, 275415828480
%25 = select i1 %22, i64 0, i64 %24
%26 = and i64 %0, 240
%27 = add i64 %1, 8
%28 = and i64 %26, %27
%29 = icmp eq i64 %28, 0
%30 = add nuw nsw i64 %28, 255
%31 = and i64 %30, 248
%32 = select i1 %29, i64 0, i64 %31
%33 = or i64 %9, %32
%34 = or i64 %33, %17
%35 = or i64 %34, %25
ret i64 %35
}