xunge/DecIR huggingface dataset:
void Opposite(struct node *head) {}


x86 assembly (clang, -O0):
<Opposite>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Opposite>:
ret

LLVM IR (-O0):
%struct.node = type opaque
define void @Opposite(%struct.node* %0) {
%2 = alloca %struct.node*
store %struct.node* %0, %struct.node** %2
ret void
}

LLVM IR (-O2):
%struct.node = type opaque
define void @Opposite(%struct.node* nocapture %0) {
ret void
}
/* Variables and functions */
int bma222_read_reg_byte(int);
int /*<<< orphan*/ bma222_write_reg_byte(int, int);
int bma222_power_up(void) {
  bma222_write_reg_byte(0x17,
                        ((bma222_read_reg_byte(0x17) & ~0x10) | ((1) << 4)));
  bma222_write_reg_byte(0x11,
                        ((bma222_read_reg_byte(0x11) & ~0xc0) | ((0) << 6)));
  return (0);
}


x86 assembly (clang, -O0):
<bma222_power_up>:
push   %rbp
mov    %rsp,%rbp
mov    $0x17,%edi
call   1030 <bma222_read_reg_byte@plt>
mov    %eax,%esi
and    $0xffffffef,%esi
or     $0x10,%esi
mov    $0x17,%edi
call   1040 <bma222_write_reg_byte@plt>
mov    $0x11,%edi
call   1030 <bma222_read_reg_byte@plt>
mov    %eax,%esi
and    $0xffffff3f,%esi
or     $0x0,%esi
mov    $0x11,%edi
call   1040 <bma222_write_reg_byte@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bma222_power_up>:
push   %rax
mov    $0x17,%edi
call   1030 <bma222_read_reg_byte@plt>
or     $0x10,%eax
mov    $0x17,%edi
mov    %eax,%esi
call   1040 <bma222_write_reg_byte@plt>
mov    $0x11,%edi
call   1030 <bma222_read_reg_byte@plt>
and    $0xffffff3f,%eax
mov    $0x11,%edi
mov    %eax,%esi
call   1040 <bma222_write_reg_byte@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @bma222_power_up() {
%1 = call i32 @bma222_read_reg_byte(i32 23)
%2 = and i32 %1, -17
%3 = or i32 %2, 16
%4 = call i32 @bma222_write_reg_byte(i32 23, i32 %3)
%5 = call i32 @bma222_read_reg_byte(i32 17)
%6 = and i32 %5, -193
%7 = or i32 %6, 0
%8 = call i32 @bma222_write_reg_byte(i32 17, i32 %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @bma222_power_up() {
%1 = tail call i32 @bma222_read_reg_byte(i32 23)
%2 = or i32 %1, 16
%3 = tail call i32 @bma222_write_reg_byte(i32 23, i32 %2)
%4 = tail call i32 @bma222_read_reg_byte(i32 17)
%5 = and i32 %4, -193
%6 = tail call i32 @bma222_write_reg_byte(i32 17, i32 %5)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ helper_double_9_recursive(double *, int);
void helper_double_9(double *buf) { helper_double_9_recursive(buf, 9); }


x86 assembly (clang, -O0):
<helper_double_9>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x9,%esi
call   1030 <helper_double_9_recursive@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<helper_double_9>:
mov    $0x9,%esi
jmp    1030 <helper_double_9_recursive@plt>

LLVM IR (-O0):
define void @helper_double_9(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = call i32 @helper_double_9_recursive(double* %3, i32 9)
ret void
}

LLVM IR (-O2):
define void @helper_double_9(double* %0) {
%2 = tail call i32 @helper_double_9_recursive(double* %0, i32 9)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Serial_Release_Rx_Buffer();
void ANTInterface_Complete() { Serial_Release_Rx_Buffer(); }


x86 assembly (clang, -O0):
<ANTInterface_Complete>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Serial_Release_Rx_Buffer@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ANTInterface_Complete>:
xor    %eax,%eax
jmp    1030 <Serial_Release_Rx_Buffer@plt>

LLVM IR (-O0):
define void @ANTInterface_Complete() {
%1 = call i32 (...) @Serial_Release_Rx_Buffer()
ret void
}

LLVM IR (-O2):
define void @ANTInterface_Complete() {
%1 = tail call i32 (...) @Serial_Release_Rx_Buffer()
ret void
}
long pbl_BufToLong(unsigned char *buf) {
  unsigned long l = (((unsigned long)(*buf++))) << 24;
  l |= (((unsigned long)(*buf++))) << 16;
  l |= (((unsigned long)(*buf++))) << 8;
  l |= *buf;
  return (l);
}


x86 assembly (clang, -O0):
<pbl_BufToLong>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%eax
shl    $0x18,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%eax
shl    $0x10,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%eax
shl    $0x8,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pbl_BufToLong>:
mov    (%rdi),%eax
shl    $0x20,%rax
bswap  %rax
ret

LLVM IR (-O0):
define i64 @pbl_BufToLong(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i32 1
store i8* %5, i8** %2
%6 = load i8, i8* %4
%7 = zext i8 %6 to i64
%8 = shl i64 %7, 24
store i64 %8, i64* %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
%11 = load i8, i8* %9
%12 = zext i8 %11 to i64
%13 = shl i64 %12, 16
%14 = load i64, i64* %3
%15 = or i64 %14, %13
store i64 %15, i64* %3
%16 = load i8*, i8** %2
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %2
%18 = load i8, i8* %16
%19 = zext i8 %18 to i64
%20 = shl i64 %19, 8
%21 = load i64, i64* %3
%22 = or i64 %21, %20
store i64 %22, i64* %3
%23 = load i8*, i8** %2
%24 = load i8, i8* %23
%25 = zext i8 %24 to i64
%26 = load i64, i64* %3
%27 = or i64 %26, %25
store i64 %27, i64* %3
%28 = load i64, i64* %3
ret i64 %28
}

LLVM IR (-O2):
define i64 @pbl_BufToLong(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 1
%3 = load i8, i8* %0
%4 = zext i8 %3 to i64
%5 = shl nuw nsw i64 %4, 24
%6 = getelementptr inbounds i8, i8* %0, i64 2
%7 = load i8, i8* %2
%8 = zext i8 %7 to i64
%9 = shl nuw nsw i64 %8, 16
%10 = or i64 %9, %5
%11 = getelementptr inbounds i8, i8* %0, i64 3
%12 = load i8, i8* %6
%13 = zext i8 %12 to i64
%14 = shl nuw nsw i64 %13, 8
%15 = or i64 %10, %14
%16 = load i8, i8* %11
%17 = zext i8 %16 to i64
%18 = or i64 %15, %17
ret i64 %18
}
int PyDTrace_INSTANCE_DELETE_DONE_ENABLED(void) { return 0; }


x86 assembly (clang, -O0):
<PyDTrace_INSTANCE_DELETE_DONE_ENABLED>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PyDTrace_INSTANCE_DELETE_DONE_ENABLED>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @PyDTrace_INSTANCE_DELETE_DONE_ENABLED() {
ret i32 0
}

LLVM IR (-O2):
define i32 @PyDTrace_INSTANCE_DELETE_DONE_ENABLED() {
ret i32 0
}
/* Variables and functions */
int strlen(char const *);
size_t half_len(const char string[]) { return strlen(string) / 2; }


x86 assembly (clang, -O0):
<half_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    $0x2,%ecx
cltd
idiv   %ecx
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<half_len>:
push   %rax
call   1030 <strlen@plt>
mov    %eax,%ecx
shr    $0x1f,%ecx
add    %eax,%ecx
sar    %ecx
movslq %ecx,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @half_len(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strlen(i8* %3)
%5 = sdiv i32 %4, 2
%6 = sext i32 %5 to i64
ret i64 %6
}

LLVM IR (-O2):
define i64 @half_len(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = sdiv i32 %2, 2
%4 = sext i32 %3 to i64
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ SOCK_STREAM;
int j_socket_bind(int /*<<< orphan*/, char *);
int j_socket_tcp_bind(char *port) { return j_socket_bind(SOCK_STREAM, port); }


x86 assembly (clang, -O0):
<j_socket_tcp_bind>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <j_socket_bind@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<j_socket_tcp_bind>:
mov    %rdi,%rsi
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
jmp    1030 <j_socket_bind@plt>

LLVM IR (-O0):
@SOCK_STREAM = global i32 0
define i32 @j_socket_tcp_bind(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @SOCK_STREAM
%4 = load i8*, i8** %2
%5 = call i32 @j_socket_bind(i32 %3, i8* %4)
ret i32 %5
}

LLVM IR (-O2):
@SOCK_STREAM = global i32 0
define i32 @j_socket_tcp_bind(i8* %0) {
%2 = load i32, i32* @SOCK_STREAM
%3 = tail call i32 @j_socket_bind(i32 %2, i8* %0)
ret i32 %3
}
int countingNumberofOneswithModuloOperator(unsigned int n) {
  int count = 0;
  while (n) {
    if (n % 2 == 1) {
      count++;
    }
    n = n / 2;
  }
  return count;
}


x86 assembly (clang, -O0):
<countingNumberofOneswithModuloOperator>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     113e <countingNumberofOneswithModuloOperator+0x3e>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x1,%eax
jne    1130 <countingNumberofOneswithModuloOperator+0x30>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <countingNumberofOneswithModuloOperator+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<countingNumberofOneswithModuloOperator>:
xor    %eax,%eax
test   %edi,%edi
je     1120 <countingNumberofOneswithModuloOperator+0x20>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
add    %edx,%eax
shr    %ecx
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <countingNumberofOneswithModuloOperator+0x10>
ret

LLVM IR (-O0):
define i32 @countingNumberofOneswithModuloOperator(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load i32, i32* %2
%9 = urem i32 %8, 2
%10 = icmp eq i32 %9, 1
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %14
14: ; preds = %11, %7
%15 = load i32, i32* %2
%16 = udiv i32 %15, 2
store i32 %16, i32* %2
br label %4
17: ; preds = %4
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @countingNumberofOneswithModuloOperator(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = and i32 %5, 1
%7 = add nuw nsw i32 %4, %6
%8 = lshr i32 %5, 1
%9 = icmp ult i32 %5, 2
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %11
}
char *test_CRLF_in__middle_of_value() { return 0; }


x86 assembly (clang, -O0):
<test_CRLF_in__middle_of_value>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_CRLF_in__middle_of_value>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @test_CRLF_in__middle_of_value() {
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @test_CRLF_in__middle_of_value() {
ret i8* null
}
/* Variables and functions */
void *stdc_831D70A5(void *, void const *, size_t);
void *memcpy(void *dest, const void *src, size_t num) {
  return stdc_831D70A5(dest, src, num);
}


x86 assembly (clang, -O0):
<memcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <stdc_831D70A5@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcpy>:
jmp    1030 <stdc_831D70A5@plt>

LLVM IR (-O0):
define i8* @memcpy(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i8* @stdc_831D70A5(i8* %7, i8* %8, i64 %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @memcpy(i8* %0, i8* %1, i64 %2) {
%4 = tail call i8* @stdc_831D70A5(i8* %0, i8* %1, i64 %2)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int sctp_unregisterInstance(unsigned short);
int /*<<< orphan*/ stderr;
int SCTP_unregisterInstance(unsigned short instance_name) {
  int result;
  if ((result = sctp_unregisterInstance(instance_name)) != 0) {
    fprintf(stderr, "sctp_unregisterInstance: an error occured.\n");
    fflush(stderr);
  }
  return result;
}


x86 assembly (clang, -O0):
<SCTP_unregisterInstance>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edi
call   1030 <sctp_unregisterInstance@plt>
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
je     1177 <SCTP_unregisterInstance+0x47>
mov    0x2e85(%rip),%rax
mov    (%rax),%edi
lea    0xe9c(%rip),%rsi
call   1040 <fprintf@plt>
mov    0x2e70(%rip),%rax
mov    (%rax),%edi
call   1050 <fflush@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SCTP_unregisterInstance>:
push   %r14
push   %rbx
push   %rax
call   1030 <sctp_unregisterInstance@plt>
mov    %eax,%ebx
test   %eax,%eax
je     115d <SCTP_unregisterInstance+0x2d>
mov    0x2e9a(%rip),%r14
mov    (%r14),%edi
lea    0xeb0(%rip),%rsi
call   1040 <fprintf@plt>
mov    (%r14),%edi
call   1050 <fflush@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [44 x i8] c"sctp_unregisterInstance: an error occured.\0A\00"
define i32 @SCTP_unregisterInstance(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i32
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i32 @sctp_unregisterInstance(i16 zeroext %4)
store i32 %5, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i32, i32* @stderr
%9 = call i32 @fprintf(i32 %8, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
%10 = load i32, i32* @stderr
%11 = call i32 @fflush(i32 %10)
br label %12
12: ; preds = %7, %1
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [44 x i8] c"sctp_unregisterInstance: an error occured.\0A\00"
define i32 @SCTP_unregisterInstance(i16 zeroext %0) {
%2 = tail call i32 @sctp_unregisterInstance(i16 zeroext %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
%7 = load i32, i32* @stderr
%8 = tail call i32 @fflush(i32 %7)
br label %9
9: ; preds = %4, %1
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ MC_avg_x_mmx(int, int, int /*<<< orphan*/ *,
                                int /*<<< orphan*/ const *, int);
void MC_avg_x_16_mmx(uint8_t *dest, const uint8_t *ref, int stride,
                     int height) {
  MC_avg_x_mmx(16, height, dest, ref, stride);
}


x86 assembly (clang, -O0):
<MC_avg_x_16_mmx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x18(%rbp),%esi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%r8d
mov    $0x10,%edi
call   1030 <MC_avg_x_mmx@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MC_avg_x_16_mmx>:
mov    %edx,%r8d
mov    %rsi,%rax
mov    %rdi,%rdx
mov    $0x10,%edi
mov    %ecx,%esi
mov    %rax,%rcx
jmp    1030 <MC_avg_x_mmx@plt>

LLVM IR (-O0):
define void @MC_avg_x_16_mmx(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %8
%10 = load i32*, i32** %5
%11 = load i32*, i32** %6
%12 = load i32, i32* %7
%13 = call i32 @MC_avg_x_mmx(i32 16, i32 %9, i32* %10, i32* %11, i32 %12)
ret void
}

LLVM IR (-O2):
define void @MC_avg_x_16_mmx(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = tail call i32 @MC_avg_x_mmx(i32 16, i32 %3, i32* %0, i32* %1, i32 %2)
ret void
}
int pathcon_nm9_work(int *sz_arg, int *sz_res, int *sz_iw, int *sz_w) {
  if (sz_arg)
    *sz_arg = 2;
  if (sz_res)
    *sz_res = 2;
  if (sz_iw)
    *sz_iw = 0;
  if (sz_w)
    *sz_w = 0;
  return 0;
}


x86 assembly (clang, -O0):
<pathcon_nm9_work>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1129 <pathcon_nm9_work+0x29>
mov    -0x8(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x10(%rbp)
je     113e <pathcon_nm9_work+0x3e>
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x18(%rbp)
je     1153 <pathcon_nm9_work+0x53>
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
cmpq   $0x0,-0x20(%rbp)
je     1168 <pathcon_nm9_work+0x68>
mov    -0x20(%rbp),%rax
movl   $0x0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm9_work>:
test   %rdi,%rdi
je     110b <pathcon_nm9_work+0xb>
movl   $0x2,(%rdi)
test   %rsi,%rsi
je     1116 <pathcon_nm9_work+0x16>
movl   $0x2,(%rsi)
test   %rdx,%rdx
je     1121 <pathcon_nm9_work+0x21>
movl   $0x0,(%rdx)
test   %rcx,%rcx
je     112c <pathcon_nm9_work+0x2c>
movl   $0x0,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pathcon_nm9_work(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %11, label %13
11: ; preds = %4
%12 = load i32*, i32** %5
store i32 2, i32* %12
br label %13
13: ; preds = %11, %4
%14 = load i32*, i32** %6
%15 = icmp ne i32* %14, null
br i1 %15, label %16, label %18
16: ; preds = %13
%17 = load i32*, i32** %6
store i32 2, i32* %17
br label %18
18: ; preds = %16, %13
%19 = load i32*, i32** %7
%20 = icmp ne i32* %19, null
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = load i32*, i32** %7
store i32 0, i32* %22
br label %23
23: ; preds = %21, %18
%24 = load i32*, i32** %8
%25 = icmp ne i32* %24, null
br i1 %25, label %26, label %28
26: ; preds = %23
%27 = load i32*, i32** %8
store i32 0, i32* %27
br label %28
28: ; preds = %26, %23
ret i32 0
}

LLVM IR (-O2):
define i32 @pathcon_nm9_work(i32* writeonly %0, i32* writeonly %1, i32* writeonly %2, i32* writeonly %3) {
%5 = icmp eq i32* %0, null
br i1 %5, label %7, label %6
6: ; preds = %4
store i32 2, i32* %0
br label %7
7: ; preds = %6, %4
%8 = icmp eq i32* %1, null
br i1 %8, label %10, label %9
9: ; preds = %7
store i32 2, i32* %1
br label %10
10: ; preds = %9, %7
%11 = icmp eq i32* %2, null
br i1 %11, label %13, label %12
12: ; preds = %10
store i32 0, i32* %2
br label %13
13: ; preds = %12, %10
%14 = icmp eq i32* %3, null
br i1 %14, label %16, label %15
15: ; preds = %13
store i32 0, i32* %3
br label %16
16: ; preds = %15, %13
ret i32 0
}
int bitcount(unsigned long a) {
  int i = 0;
  for (; a != 0; a >>= 1)
    if (a & 1)
      i++;
  return i;
}


x86 assembly (clang, -O0):
<bitcount>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     114b <bitcount+0x4b>
mov    -0x8(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
je     1135 <bitcount+0x35>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    113a <bitcount+0x3a>
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <bitcount+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitcount>:
xor    %eax,%eax
test   %rdi,%rdi
je     1123 <bitcount+0x23>
mov    %rdi,%rcx
nopw   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
add    %edx,%eax
shr    %rcx
cmp    $0x1,%rdi
mov    %rcx,%rdi
ja     1110 <bitcount+0x10>
ret

LLVM IR (-O0):
define i32 @bitcount(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
store i32 0, i32* %3
br label %4
4: ; preds = %15, %1
%5 = load i64, i64* %2
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %18
7: ; preds = %4
%8 = load i64, i64* %2
%9 = and i64 %8, 1
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %14
14: ; preds = %11, %7
br label %15
15: ; preds = %14
%16 = load i64, i64* %2
%17 = lshr i64 %16, 1
store i64 %17, i64* %2
br label %4
18: ; preds = %4
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @bitcount(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ 0, %1 ]
%5 = phi i64 [ %9, %3 ], [ %0, %1 ]
%6 = trunc i64 %5 to i32
%7 = and i32 %6, 1
%8 = add nuw nsw i32 %7, %4
%9 = lshr i64 %5, 1
%10 = icmp ult i64 %5, 2
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %8, %3 ]
ret i32 %12
}
signed int Thrd_Get_Word(signed int t) {
  signed int Val;
  Val = Thrd_Get_Byte(t);
  signed int return_value_Thrd_Get_Byte$1;
  return_value_Thrd_Get_Byte$1 = Thrd_Get_Byte(t);
  return Val << 8 | return_value_Thrd_Get_Byte$1;
}


x86 assembly (clang, -O0):
<Thrd_Get_Word>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1030 <Thrd_Get_Byte@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1030 <Thrd_Get_Byte@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x8,%eax
or     -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Thrd_Get_Word>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <Thrd_Get_Byte@plt>
mov    %eax,%ebp
mov    %ebx,%edi
xor    %eax,%eax
call   1030 <Thrd_Get_Byte@plt>
shl    $0x8,%ebp
or     %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @Thrd_Get_Word(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call i32 (i32, ...) bitcast (i32 (...)* @Thrd_Get_Byte to i32 (i32, ...)*)(i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = call i32 (i32, ...) bitcast (i32 (...)* @Thrd_Get_Byte to i32 (i32, ...)*)(i32 %7)
store i32 %8, i32* %4
%9 = load i32, i32* %3
%10 = shl i32 %9, 8
%11 = load i32, i32* %4
%12 = or i32 %10, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @Thrd_Get_Word(i32 %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @Thrd_Get_Byte to i32 (i32, ...)*)(i32 %0)
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @Thrd_Get_Byte to i32 (i32, ...)*)(i32 %0)
%4 = shl i32 %2, 8
%5 = or i32 %4, %3
ret i32 %5
}
int hash(char *key) { return key[0] - ' '; }


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
sub    $0x20,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
movsbl (%rdi),%eax
add    $0xffffffe0,%eax
ret

LLVM IR (-O0):
define i32 @hash(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = sub nsw i32 %6, 32
ret i32 %7
}

LLVM IR (-O2):
define i32 @hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
%4 = add nsw i32 %3, -32
ret i32 %4
}
/* Variables and functions */
float __infer_nondet_float();
float erff(float x) { return __infer_nondet_float(); }


x86 assembly (clang, -O0):
<erff>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_float@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<erff>:
xor    %eax,%eax
jmp    1030 <__infer_nondet_float@plt>

LLVM IR (-O0):
define float @erff(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = call float (...) @__infer_nondet_float()
ret float %3
}

LLVM IR (-O2):
define float @erff(float %0) {
%2 = tail call float (...) @__infer_nondet_float()
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ nrf_write(int, unsigned char *, int);
void __attribute__((unused)) nrf_set_config(unsigned char config) {
  nrf_write(0x20 | 0x00, &config, 1);
}


x86 assembly (clang, -O0):
<nrf_set_config>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x20,%edi
lea    -0x1(%rbp),%rsi
mov    $0x1,%edx
call   1030 <nrf_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf_set_config>:
push   %rax
mov    %dil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x20,%edi
mov    $0x1,%edx
call   1030 <nrf_write@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @nrf_set_config(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @nrf_write(i32 32, i8* %2, i32 1)
ret void
}

LLVM IR (-O2):
define void @nrf_set_config(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @nrf_write(i32 32, i8* %2, i32 1)
ret void
}
/* Variables and functions */
char EOF;
char getchar();
int /*<<< orphan*/ printf(char *, unsigned long);
main() {
  unsigned long int lines = 0;
  char ch;
  while ((ch = getchar()) != EOF)
    if (ch == '\n')
      lines++;
  printf("%d\n", lines);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %al,-0x11(%rbp)
movsbl %al,%eax
mov    0x2e9d(%rip),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
je     1174 <main+0x54>
movsbl -0x11(%rbp),%eax
cmp    $0xa,%eax
jne    116f <main+0x4f>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1137 <main+0x17>
mov    -0x10(%rbp),%rsi
lea    0xe81(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <getchar@plt>
mov    0x2eb4(%rip),%r14
cmp    (%r14),%al
je     1156 <main+0x36>
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
xor    %ecx,%ecx
cmp    $0xa,%al
sete   %cl
add    %rcx,%rbx
xor    %eax,%eax
call   1040 <getchar@plt>
cmp    (%r14),%al
jne    1140 <main+0x20>
lea    0xea3(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@EOF = global i8 0
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i8
store i32 0, i32* %1
store i64 0, i64* %2
br label %4
4: ; preds = %17, %0
%5 = call signext i8 (...) @getchar()
store i8 %5, i8* %3
%6 = sext i8 %5 to i32
%7 = load i8, i8* @EOF
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %6, %8
br i1 %9, label %10, label %18
10: ; preds = %4
%11 = load i8, i8* %3
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 10
br i1 %13, label %14, label %17
14: ; preds = %10
%15 = load i64, i64* %2
%16 = add i64 %15, 1
store i64 %16, i64* %2
br label %17
17: ; preds = %14, %10
br label %4
18: ; preds = %4
%19 = load i64, i64* %2
%20 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %19)
%21 = load i32, i32* %1
ret i32 %21
}

LLVM IR (-O2):
@EOF = global i8 0
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call signext i8 (...) @getchar()
%2 = load i8, i8* @EOF
%3 = icmp eq i8 %1, %2
br i1 %3, label %13, label %4
4: ; preds = %0, %4
%5 = phi i8 [ %10, %4 ], [ %1, %0 ]
%6 = phi i64 [ %9, %4 ], [ 0, %0 ]
%7 = icmp eq i8 %5, 10
%8 = zext i1 %7 to i64
%9 = add i64 %6, %8
%10 = tail call signext i8 (...) @getchar()
%11 = load i8, i8* @EOF
%12 = icmp eq i8 %10, %11
br i1 %12, label %13, label %4
13: ; preds = %4, %0
%14 = phi i64 [ 0, %0 ], [ %9, %4 ]
%15 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %14)
ret i32 0
}
/* Variables and functions */
int open(char *, int);
int /*<<< orphan*/ strcat(char *, char const *);
int /*<<< orphan*/ strcpy(char *, char *);
int devopen(const char *dev, int flags) {
  char t[32];
  strcpy(t, "/dev/");
  strcat(t, dev);
  return open(t, flags);
}


x86 assembly (clang, -O0):
<devopen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    -0x30(%rbp),%rdi
lea    0xeb6(%rip),%rsi
call   1030 <strcpy@plt>
lea    -0x30(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1050 <strcat@plt>
lea    -0x30(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <open@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<devopen>:
push   %rbp
push   %r14
push   %rbx
sub    $0x20,%rsp
mov    %esi,%r14d
mov    %rdi,%rbx
lea    0xebb(%rip),%rsi
mov    %rsp,%rbp
mov    %rbp,%rdi
call   1030 <strcpy@plt>
mov    %rbp,%rdi
mov    %rbx,%rsi
call   1050 <strcat@plt>
mov    %rbp,%rdi
mov    %r14d,%esi
call   1040 <open@plt>
add    $0x20,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [6 x i8] c"/dev/\00"
define i32 @devopen(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca [32 x i8]
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = getelementptr inbounds [32 x i8], [32 x i8]* %5, i64 0, i64 0
%7 = call i32 @strcpy(i8* %6, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%8 = getelementptr inbounds [32 x i8], [32 x i8]* %5, i64 0, i64 0
%9 = load i8*, i8** %3
%10 = call i32 @strcat(i8* %8, i8* %9)
%11 = getelementptr inbounds [32 x i8], [32 x i8]* %5, i64 0, i64 0
%12 = load i32, i32* %4
%13 = call i32 @open(i8* %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
@.str = [6 x i8] c"/dev/\00"
define i32 @devopen(i8* %0, i32 %1) {
%3 = alloca [32 x i8]
%4 = getelementptr inbounds [32 x i8], [32 x i8]* %3, i64 0, i64 0
%5 = call i32 @strcpy(i8* %4, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @strcat(i8* %4, i8* %0)
%7 = call i32 @open(i8* %4, i32 %1)
ret i32 %7
}
int match_skill(const void *skill1, const void *skill2) {
  if (*(const char *)skill1 == *(const char *)skill2)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<match_skill>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    -0x18(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jne    112e <match_skill+0x2e>
movl   $0x1,-0x4(%rbp)
jmp    1135 <match_skill+0x35>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<match_skill>:
mov    (%rdi),%cl
xor    %eax,%eax
cmp    (%rsi),%cl
sete   %al
ret

LLVM IR (-O0):
define i32 @match_skill(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = load i8*, i8** %5
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %8, %11
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 1, i32* %3
br label %15
14: ; preds = %2
store i32 0, i32* %3
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @match_skill(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
%5 = icmp eq i8 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
int do_236() { return 236; }


x86 assembly (clang, -O0):
<do_236>:
push   %rbp
mov    %rsp,%rbp
mov    $0xec,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_236>:
mov    $0xec,%eax
ret

LLVM IR (-O0):
define i32 @do_236() {
ret i32 236
}

LLVM IR (-O2):
define i32 @do_236() {
ret i32 236
}
void speakup_con_update(int currcons) {}


x86 assembly (clang, -O0):
<speakup_con_update>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<speakup_con_update>:
ret

LLVM IR (-O0):
define void @speakup_con_update(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @speakup_con_update(i32 %0) {
ret void
}
/* Variables and functions */
int _di_ioctl_std(int);
int di_identify(void) { return _di_ioctl_std(0x12); }


x86 assembly (clang, -O0):
<di_identify>:
push   %rbp
mov    %rsp,%rbp
mov    $0x12,%edi
call   1030 <_di_ioctl_std@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<di_identify>:
mov    $0x12,%edi
jmp    1030 <_di_ioctl_std@plt>

LLVM IR (-O0):
define i32 @di_identify() {
%1 = call i32 @_di_ioctl_std(i32 18)
ret i32 %1
}

LLVM IR (-O2):
define i32 @di_identify() {
%1 = tail call i32 @_di_ioctl_std(i32 18)
ret i32 %1
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int ev_fd;
};
struct bufferevent {
  TYPE_1__ ev_read;
};

/* Variables and functions */
int /*<<< orphan*/ bev_disable(struct bufferevent *);
int /*<<< orphan*/ close(int);
void bev_close(struct bufferevent *bev) {
  bev_disable(bev);
  close(((bev)->ev_read.ev_fd));
  ((bev)->ev_read.ev_fd = (-1));
}


x86 assembly (clang, -O0):
<bev_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <bev_disable@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <close@plt>
mov    -0x8(%rbp),%rax
movl   $0xffffffff,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bev_close>:
push   %rbx
mov    %rdi,%rbx
call   1040 <bev_disable@plt>
mov    (%rbx),%edi
call   1030 <close@plt>
movl   $0xffffffff,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
%struct.bufferevent = type { %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32 }
define void @bev_close(%struct.bufferevent* %0) {
%2 = alloca %struct.bufferevent*
store %struct.bufferevent* %0, %struct.bufferevent** %2
%3 = load %struct.bufferevent*, %struct.bufferevent** %2
%4 = call i32 @bev_disable(%struct.bufferevent* %3)
%5 = load %struct.bufferevent*, %struct.bufferevent** %2
%6 = getelementptr inbounds %struct.bufferevent, %struct.bufferevent* %5, i32 0, i32 0
%7 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %6, i32 0, i32 0
%8 = load i32, i32* %7
%9 = call i32 @close(i32 %8)
%10 = load %struct.bufferevent*, %struct.bufferevent** %2
%11 = getelementptr inbounds %struct.bufferevent, %struct.bufferevent* %10, i32 0, i32 0
%12 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %11, i32 0, i32 0
store i32 -1, i32* %12
ret void
}

LLVM IR (-O2):
%struct.bufferevent = type { %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32 }
define void @bev_close(%struct.bufferevent* %0) {
%2 = tail call i32 @bev_disable(%struct.bufferevent* %0)
%3 = getelementptr inbounds %struct.bufferevent, %struct.bufferevent* %0, i64 0, i32 0, i32 0
%4 = load i32, i32* %3
%5 = tail call i32 @close(i32 %4)
store i32 -1, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_strlist_remove() {
  printf("NOT IMPLEMENTED:"
         "pa_strlist_remove"
         "\n");
}


x86 assembly (clang, -O0):
<pa_strlist_remove>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_strlist_remove>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"NOT IMPLEMENTED:pa_strlist_remove\0A\00"
define i32 @pa_strlist_remove() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [34 x i8] c"NOT IMPLEMENTED:pa_strlist_remove\00"
define i32 @pa_strlist_remove() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
char getchar();
void clearLineFromReadBuffer(void) {
  while (getchar() != '\n')
    ;
}


x86 assembly (clang, -O0):
<clearLineFromReadBuffer>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <clearLineFromReadBuffer+0x9>
mov    $0x0,%al
call   1030 <getchar@plt>
movsbl %al,%eax
cmp    $0xa,%eax
je     1131 <clearLineFromReadBuffer+0x21>
jmp    1119 <clearLineFromReadBuffer+0x9>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clearLineFromReadBuffer>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <getchar@plt>
cmp    $0xa,%al
jne    1120 <clearLineFromReadBuffer+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @clearLineFromReadBuffer() {
br label %1
1: ; preds = %5, %0
%2 = call signext i8 (...) @getchar()
%3 = sext i8 %2 to i32
%4 = icmp ne i32 %3, 10
br i1 %4, label %5, label %6
5: ; preds = %1
br label %1
6: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @clearLineFromReadBuffer() {
br label %1
1: ; preds = %1, %0
%2 = tail call signext i8 (...) @getchar()
%3 = icmp eq i8 %2, 10
br i1 %3, label %4, label %1
4: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ scan();
int /*<<< orphan*/ setup(char const *);
void boundary(const char *init) {
  setup(init);
  scan();
}


x86 assembly (clang, -O0):
<boundary>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <setup@plt>
mov    $0x0,%al
call   1030 <scan@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<boundary>:
push   %rax
call   1040 <setup@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <scan@plt>

LLVM IR (-O0):
define void @boundary(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @setup(i8* %3)
%5 = call i32 (...) @scan()
ret void
}

LLVM IR (-O2):
define void @boundary(i8* %0) {
%2 = tail call i32 @setup(i8* %0)
%3 = tail call i32 (...) @scan()
ret void
}
void sysfs_close_class(struct sysfs_class *class) {}


x86 assembly (clang, -O0):
<sysfs_close_class>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sysfs_close_class>:
ret

LLVM IR (-O0):
%struct.sysfs_class = type opaque
define void @sysfs_close_class(%struct.sysfs_class* %0) {
%2 = alloca %struct.sysfs_class*
store %struct.sysfs_class* %0, %struct.sysfs_class** %2
ret void
}

LLVM IR (-O2):
%struct.sysfs_class = type opaque
define void @sysfs_close_class(%struct.sysfs_class* nocapture %0) {
ret void
}
int checkLeapYear(int year) {
  if (year % 400 == 0)
    return 1;
  if (year % 100 == 0)
    return 0;
  if (year % 4 == 0)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<checkLeapYear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1127 <checkLeapYear+0x27>
movl   $0x1,-0x4(%rbp)
jmp    116e <checkLeapYear+0x6e>
mov    -0x8(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1147 <checkLeapYear+0x47>
movl   $0x0,-0x4(%rbp)
jmp    116e <checkLeapYear+0x6e>
mov    -0x8(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1167 <checkLeapYear+0x67>
movl   $0x1,-0x4(%rbp)
jmp    116e <checkLeapYear+0x6e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkLeapYear>:
imul   $0xc28f5c29,%edi,%eax
add    $0x51eb850,%eax
mov    %eax,%ecx
ror    $0x4,%ecx
cmp    $0xa3d70b,%ecx
jb     112c <checkLeapYear+0x2c>
ror    $0x2,%eax
cmp    $0x28f5c29,%eax
jb     1132 <checkLeapYear+0x32>
xor    %eax,%eax
test   $0x3,%dil
sete   %al
ret
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @checkLeapYear(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = srem i32 %4, 400
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %19
8: ; preds = %1
%9 = load i32, i32* %3
%10 = srem i32 %9, 100
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 0, i32* %2
br label %19
13: ; preds = %8
%14 = load i32, i32* %3
%15 = srem i32 %14, 4
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 1, i32* %2
br label %19
18: ; preds = %13
store i32 0, i32* %2
br label %19
19: ; preds = %18, %17, %12, %7
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @checkLeapYear(i32 %0) {
%2 = srem i32 %0, 400
%3 = icmp eq i32 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = srem i32 %0, 100
%6 = icmp eq i32 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = and i32 %0, 3
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %7, %4, %1
%12 = phi i32 [ 1, %1 ], [ 0, %4 ], [ %10, %7 ]
ret i32 %12
}
unsigned long lpc_gettimeoffset(void) { return 0; }


x86 assembly (clang, -O0):
<lpc_gettimeoffset>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lpc_gettimeoffset>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @lpc_gettimeoffset() {
ret i64 0
}

LLVM IR (-O2):
define i64 @lpc_gettimeoffset() {
ret i64 0
}
void _Block_byref_release(void *src) {}


x86 assembly (clang, -O0):
<_Block_byref_release>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Block_byref_release>:
ret

LLVM IR (-O0):
define void @_Block_byref_release(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @_Block_byref_release(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ napms(int);
int /*<<< orphan*/ refresh();
void showit(int s) {
  refresh();
  napms(s);
}


x86 assembly (clang, -O0):
<showit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <refresh@plt>
mov    -0x4(%rbp),%edi
call   1040 <napms@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<showit>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <refresh@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <napms@plt>

LLVM IR (-O0):
define void @showit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @refresh()
%4 = load i32, i32* %2
%5 = call i32 @napms(i32 %4)
ret void
}

LLVM IR (-O2):
define void @showit(i32 %0) {
%2 = tail call i32 (...) @refresh()
%3 = tail call i32 @napms(i32 %0)
ret void
}
int isoct(ch)
char ch;
{ return ((ch >= '0') && (ch <= '7')); }


x86 assembly (clang, -O0):
<isoct>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <isoct+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x37,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isoct>:
shl    $0x18,%edi
add    $0xd0ffffff,%edi
xor    %eax,%eax
cmp    $0x8ffffff,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isoct(i32 %0) {
%2 = alloca i8
%3 = trunc i32 %0 to i8
store i8 %3, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %2
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 55
br label %11
11: ; preds = %7, %1
%12 = phi i1 [ false, %1 ], [ %10, %7 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @isoct(i32 %0) {
%2 = shl i32 %0, 24
%3 = add i32 %2, -788529153
%4 = icmp ult i32 %3, 150994943
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
void *memcpy_timec(void *, void const *, size_t);
void *tc_memcpy(void *dest, const void *src, size_t n) {
  return memcpy_timec(dest, src, n);
}


x86 assembly (clang, -O0):
<tc_memcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy_timec@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tc_memcpy>:
jmp    1030 <memcpy_timec@plt>

LLVM IR (-O0):
define i8* @tc_memcpy(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i8* @memcpy_timec(i8* %7, i8* %8, i64 %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @tc_memcpy(i8* %0, i8* %1, i64 %2) {
%4 = tail call i8* @memcpy_timec(i8* %0, i8* %1, i64 %2)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ write_serial(int);
int putchar(int c) { write_serial(c); }


x86 assembly (clang, -O0):
<putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <write_serial@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putchar>:
jmp    1030 <write_serial@plt>

LLVM IR (-O0):
define i32 @putchar(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 @write_serial(i32 %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @putchar(i32 %0) {
%2 = tail call i32 @write_serial(i32 %0)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ __dbg_check_lock_from_isr();
int /*<<< orphan*/ __stats_start_measure_crit_isr();
int /*<<< orphan*/ port_lock_from_isr();
void chSysLockFromISR(void) {
  port_lock_from_isr();
  __stats_start_measure_crit_isr();
  __dbg_check_lock_from_isr();
}


x86 assembly (clang, -O0):
<chSysLockFromISR>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <port_lock_from_isr@plt>
mov    $0x0,%al
call   1050 <__stats_start_measure_crit_isr@plt>
mov    $0x0,%al
call   1040 <__dbg_check_lock_from_isr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<chSysLockFromISR>:
push   %rax
xor    %eax,%eax
call   1030 <port_lock_from_isr@plt>
xor    %eax,%eax
call   1050 <__stats_start_measure_crit_isr@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <__dbg_check_lock_from_isr@plt>

LLVM IR (-O0):
define void @chSysLockFromISR() {
%1 = call i32 (...) @port_lock_from_isr()
%2 = call i32 (...) @__stats_start_measure_crit_isr()
%3 = call i32 (...) @__dbg_check_lock_from_isr()
ret void
}

LLVM IR (-O2):
define void @chSysLockFromISR() {
%1 = tail call i32 (...) @port_lock_from_isr()
%2 = tail call i32 (...) @__stats_start_measure_crit_isr()
%3 = tail call i32 (...) @__dbg_check_lock_from_isr()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printMeter100Scale();
void printLightingVolumeScale(void) {
  printMeter100Scale();
  return;
}


x86 assembly (clang, -O0):
<printLightingVolumeScale>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <printMeter100Scale@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<printLightingVolumeScale>:
xor    %eax,%eax
jmp    1030 <printMeter100Scale@plt>

LLVM IR (-O0):
define void @printLightingVolumeScale() {
%1 = call i32 (...) @printMeter100Scale()
ret void
}

LLVM IR (-O2):
define void @printLightingVolumeScale() {
%1 = tail call i32 (...) @printMeter100Scale()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pr_info(char *, int);
int sci_get_chip_id();
int soc_id_is_sc7720v0(void) {
  pr_info("chip id is %x\n", sci_get_chip_id());
  return ((sci_get_chip_id() & (0xFFFF0000)) == ((0x88600000) & (0xFFFF0000)));
}


x86 assembly (clang, -O0):
<soc_id_is_sc7720v0>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <sci_get_chip_id@plt>
mov    %eax,%esi
lea    0xecc(%rip),%rdi
call   1030 <pr_info@plt>
mov    $0x0,%al
call   1040 <sci_get_chip_id@plt>
and    $0xffff0000,%eax
cmp    $0x88600000,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<soc_id_is_sc7720v0>:
push   %rax
xor    %eax,%eax
call   1040 <sci_get_chip_id@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <pr_info@plt>
xor    %eax,%eax
call   1040 <sci_get_chip_id@plt>
and    $0xffff0000,%eax
xor    %ecx,%ecx
cmp    $0x88600000,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"chip id is %x\0A\00"
define i32 @soc_id_is_sc7720v0() {
%1 = call i32 (...) @sci_get_chip_id()
%2 = call i32 @pr_info(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = call i32 (...) @sci_get_chip_id()
%4 = and i32 %3, -65536
%5 = icmp eq i32 %4, -2006974464
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
@.str = [15 x i8] c"chip id is %x\0A\00"
define i32 @soc_id_is_sc7720v0() {
%1 = tail call i32 (...) @sci_get_chip_id()
%2 = tail call i32 @pr_info(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 (...) @sci_get_chip_id()
%4 = and i32 %3, -65536
%5 = icmp eq i32 %4, -2006974464
%6 = zext i1 %5 to i32
ret i32 %6
}