xunge/DecIR huggingface dataset:
int get_l3_proto(void *l3_hdr) { return (*((char *)l3_hdr)) >> 4; }


x86 assembly (clang, -O0):
<get_l3_proto>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
sar    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_l3_proto>:
mov    (%rdi),%al
sar    $0x4,%al
movsbl %al,%eax
ret

LLVM IR (-O0):
define i32 @get_l3_proto(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = ashr i32 %5, 4
ret i32 %6
}

LLVM IR (-O2):
define i32 @get_l3_proto(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = ashr i8 %2, 4
%4 = sext i8 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x24() {
  Assert_real((isspace(36) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              185, ("isspace should be 0 for $"));
}


x86 assembly (clang, -O0):
<t_isspace_0x24>:
push   %rbp
mov    %rsp,%rbp
mov    $0x24,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xb9,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x24>:
push   %rax
mov    $0x24,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0xb9,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for $\00"
define void @t_isspace_0x24() {
%1 = call i64 @isspace(i32 36)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 185, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for $\00"
define void @t_isspace_0x24() {
%1 = tail call i64 @isspace(i32 36)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 185, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ SEEK_SET;
int fio_read_16(int /*<<< orphan*/ *, int);
scalar_t__ fseek(int /*<<< orphan*/ *, long, int /*<<< orphan*/);
int fio_abs_read_16(FILE *f, long offset, int is_big_endian) {
  if (fseek(f, offset, SEEK_SET) != 0)
    return -1;
  return (fio_read_16(f, is_big_endian));
}


x86 assembly (clang, -O0):
<fio_abs_read_16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    0x2e9e(%rip),%rax
mov    (%rax),%edx
call   1040 <fseek@plt>
cmp    $0x0,%rax
je     115f <fio_abs_read_16+0x3f>
movl   $0xffffffff,-0x4(%rbp)
jmp    116e <fio_abs_read_16+0x4e>
mov    -0x10(%rbp),%rdi
mov    -0x1c(%rbp),%esi
call   1030 <fio_read_16@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fio_abs_read_16>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebp
mov    %rdi,%rbx
mov    0x2eb1(%rip),%rax
mov    (%rax),%edx
call   1040 <fseek@plt>
test   %rax,%rax
je     1147 <fio_abs_read_16+0x27>
mov    $0xffffffff,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <fio_read_16@plt>

LLVM IR (-O0):
@SEEK_SET = global i32 0
define i32 @fio_abs_read_16(i32* %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i64
%7 = alloca i32
store i32* %0, i32** %5
store i64 %1, i64* %6
store i32 %2, i32* %7
%8 = load i32*, i32** %5
%9 = load i64, i64* %6
%10 = load i32, i32* @SEEK_SET
%11 = call i64 @fseek(i32* %8, i64 %9, i32 %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %3
store i32 -1, i32* %4
br label %18
14: ; preds = %3
%15 = load i32*, i32** %5
%16 = load i32, i32* %7
%17 = call i32 @fio_read_16(i32* %15, i32 %16)
store i32 %17, i32* %4
br label %18
18: ; preds = %14, %13
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
@SEEK_SET = global i32 0
define i32 @fio_abs_read_16(i32* %0, i64 %1, i32 %2) {
%4 = load i32, i32* @SEEK_SET
%5 = tail call i64 @fseek(i32* %0, i64 %1, i32 %4)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = tail call i32 @fio_read_16(i32* %0, i32 %2)
br label %9
9: ; preds = %3, %7
%10 = phi i32 [ %8, %7 ], [ -1, %3 ]
ret i32 %10
}
int Operand_ar12_decode(unsigned int *valp __attribute__((__unused__))) {
  return 0;
}


x86 assembly (clang, -O0):
<Operand_ar12_decode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Operand_ar12_decode>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Operand_ar12_decode(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @Operand_ar12_decode(i32* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ engine_id_split(char const *, char **, char **, char **,
                                   char **);
void xiag_module_id_split(const char *id, char **id_chapter, char **id_scene,
                          char **id_room, char **id_entity) {
  engine_id_split(id, id_chapter, id_scene, id_room, id_entity);
}


x86 assembly (clang, -O0):
<xiag_module_id_split>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
call   1030 <engine_id_split@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xiag_module_id_split>:
jmp    1030 <engine_id_split@plt>

LLVM IR (-O0):
define void @xiag_module_id_split(i8* %0, i8** %1, i8** %2, i8** %3, i8** %4) {
%6 = alloca i8*
%7 = alloca i8**
%8 = alloca i8**
%9 = alloca i8**
%10 = alloca i8**
store i8* %0, i8** %6
store i8** %1, i8*** %7
store i8** %2, i8*** %8
store i8** %3, i8*** %9
store i8** %4, i8*** %10
%11 = load i8*, i8** %6
%12 = load i8**, i8*** %7
%13 = load i8**, i8*** %8
%14 = load i8**, i8*** %9
%15 = load i8**, i8*** %10
%16 = call i32 @engine_id_split(i8* %11, i8** %12, i8** %13, i8** %14, i8** %15)
ret void
}

LLVM IR (-O2):
define void @xiag_module_id_split(i8* %0, i8** %1, i8** %2, i8** %3, i8** %4) {
%6 = tail call i32 @engine_id_split(i8* %0, i8** %1, i8** %2, i8** %3, i8** %4)
ret void
}
char shift_bit(char cur_val, char next_val) {
  char old_val = cur_val;
  cur_val <<= 1;
  cur_val |= next_val;
  if (old_val & 0x40)
    cur_val ^= 0x09;
  return cur_val;
}


x86 assembly (clang, -O0):
<shift_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    -0x1(%rbp),%al
mov    %al,-0x3(%rbp)
movsbl -0x1(%rbp),%eax
shl    $0x1,%eax
mov    %al,-0x1(%rbp)
movsbl -0x2(%rbp),%ecx
movsbl -0x1(%rbp),%eax
or     %ecx,%eax
mov    %al,-0x1(%rbp)
movsbl -0x3(%rbp),%eax
and    $0x40,%eax
cmp    $0x0,%eax
je     1147 <shift_bit+0x47>
movsbl -0x1(%rbp),%eax
xor    $0x9,%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shift_bit>:
lea    (%rdi,%rdi,1),%eax
or     %sil,%al
movzbl %al,%ecx
xor    $0x9,%al
test   $0x40,%dil
movzbl %al,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @shift_bit(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%6 = load i8, i8* %3
store i8 %6, i8* %5
%7 = load i8, i8* %3
%8 = sext i8 %7 to i32
%9 = shl i32 %8, 1
%10 = trunc i32 %9 to i8
store i8 %10, i8* %3
%11 = load i8, i8* %4
%12 = sext i8 %11 to i32
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = or i32 %14, %12
%16 = trunc i32 %15 to i8
store i8 %16, i8* %3
%17 = load i8, i8* %5
%18 = sext i8 %17 to i32
%19 = and i32 %18, 64
%20 = icmp ne i32 %19, 0
br i1 %20, label %21, label %26
21: ; preds = %2
%22 = load i8, i8* %3
%23 = sext i8 %22 to i32
%24 = xor i32 %23, 9
%25 = trunc i32 %24 to i8
store i8 %25, i8* %3
br label %26
26: ; preds = %21, %2
%27 = load i8, i8* %3
ret i8 %27
}

LLVM IR (-O2):
define signext i8 @shift_bit(i8 signext %0, i8 signext %1) {
%3 = shl i8 %0, 1
%4 = or i8 %3, %1
%5 = and i8 %0, 64
%6 = icmp eq i8 %5, 0
%7 = xor i8 %4, 9
%8 = select i1 %6, i8 %4, i8 %7
ret i8 %8
}
void av_camellia_alloc() {}


x86 assembly (clang, -O0):
<av_camellia_alloc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_camellia_alloc>:
ret

LLVM IR (-O0):
define void @av_camellia_alloc() {
ret void
}

LLVM IR (-O2):
define void @av_camellia_alloc() {
ret void
}
__attribute__((always_)) int hlt_works(int cpu) { return 1; }


x86 assembly (clang, -O0):
<hlt_works>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hlt_works>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @hlt_works(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @hlt_works(i32 %0) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double (*)(int));
void fun(double(f)(int)) { printf(" f: %p\n", &f); }


x86 assembly (clang, -O0):
<fun>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun>:
push   %rax
mov    %rdi,(%rsp)
lea    0xee4(%rip),%rdi
mov    %rsp,%rsi
call   1030 <printf@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [8 x i8] c" f: %p\0A\00"
define void @fun(double (i32)* %0) {
%2 = alloca double (i32)*
store double (i32)* %0, double (i32)** %2
%3 = bitcast double (i32)** %2 to double (i32)*
%4 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), double (i32)* %3)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c" f: %p\0A\00"
define void @fun(double (i32)* %0) {
%2 = alloca double (i32)*
store double (i32)* %0, double (i32)** %2
%3 = bitcast double (i32)** %2 to double (i32)*
%4 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), double (i32)* %3)
ret void
}
int __PHYSFS_platformDeinit(void) { return 1; }


x86 assembly (clang, -O0):
<__PHYSFS_platformDeinit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__PHYSFS_platformDeinit>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @__PHYSFS_platformDeinit() {
ret i32 1
}

LLVM IR (-O2):
define i32 @__PHYSFS_platformDeinit() {
ret i32 1
}
void foo_2_2_1_2_2_2_1_1_2() {}


x86 assembly (clang, -O0):
<foo_2_2_1_2_2_2_1_1_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_2_1_2_2_2_1_1_2>:
ret

LLVM IR (-O0):
define void @foo_2_2_1_2_2_2_1_1_2() {
ret void
}

LLVM IR (-O2):
define void @foo_2_2_1_2_2_2_1_1_2() {
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int syscon_quaddobl_drop_variable_by_index(int k) {
  int fail, *b;
  double *c;
  fail = _ada_use_c2phc4c(308, &k, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<syscon_quaddobl_drop_variable_by_index>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x134,%edi
lea    -0x4(%rbp),%rsi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscon_quaddobl_drop_variable_by_index>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x134,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @syscon_quaddobl_drop_variable_by_index(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32*
%5 = alloca double*
store i32 %0, i32* %2
%6 = load i32*, i32** %4
%7 = load double*, double** %5
%8 = call i32 @_ada_use_c2phc4c(i32 308, i32* %2, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @syscon_quaddobl_drop_variable_by_index(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @_ada_use_c2phc4c(i32 308, i32* %2, i32* undef, double* undef, i32 0)
ret i32 %3
}
int calculate_voltage_input(double input) { return (2048 * (1 + input)); }


x86 assembly (clang, -O0):
<calculate_voltage_input>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm1
addsd  -0x8(%rbp),%xmm1
movsd  0xee2(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculate_voltage_input>:
addsd  0xef8(%rip),%xmm0
mulsd  0xef8(%rip),%xmm0
cvttsd2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @calculate_voltage_input(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double 1.000000e+00, %3
%5 = fmul double 2.048000e+03, %4
%6 = fptosi double %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @calculate_voltage_input(double %0) {
%2 = fadd double %0, 1.000000e+00
%3 = fmul double %2, 2.048000e+03
%4 = fptosi double %3 to i32
ret i32 %4
}
/* Variables and functions */
int foo(int);
int main() { return foo(50); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x32,%edi
call   1030 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x32,%edi
jmp    1030 <foo@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @foo(i32 50)
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @foo(i32 50)
ret i32 %1
}
/* Variables and functions */
scalar_t__ __builtin_lroundf(float);
int /*<<< orphan*/ link_failure_builtin_lroundf();
void test_builtin_lroundf(float f) {
  if (__builtin_lroundf(f) != __builtin_lroundf(f))
    link_failure_builtin_lroundf();
}


x86 assembly (clang, -O0):
<test_builtin_lroundf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1040 <lroundf@plt>
mov    %rax,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
call   1040 <lroundf@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
je     115c <test_builtin_lroundf+0x3c>
mov    $0x0,%al
call   1030 <link_failure_builtin_lroundf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_builtin_lroundf>:
push   %rbx
sub    $0x10,%rsp
movss  %xmm0,0xc(%rsp)
call   1040 <lroundf@plt>
mov    %rax,%rbx
movss  0xc(%rsp),%xmm0
call   1040 <lroundf@plt>
cmp    %rax,%rbx
jne    1149 <test_builtin_lroundf+0x29>
add    $0x10,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1030 <link_failure_builtin_lroundf@plt>

LLVM IR (-O0):
define void @test_builtin_lroundf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i64 @lroundf(float %3)
%5 = load float, float* %2
%6 = call i64 @lroundf(float %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_builtin_lroundf()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_builtin_lroundf(float %0) {
%2 = tail call i64 @lroundf(float %0)
%3 = tail call i64 @lroundf(float %0)
%4 = icmp eq i64 %2, %3
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @link_failure_builtin_lroundf()
br label %7
7: ; preds = %5, %1
ret void
}
/* Variables and functions */
scalar_t__ isalpnum(char);
char popc();
int /*<<< orphan*/ pushc(char);
int /*<<< orphan*/ trash();
void pops(char *s) {
  trash();
  for (; isalpnum(*s = popc()); ++s)
    ;
  pushc(*s);
  *s = '\0';
  return;
}


x86 assembly (clang, -O0):
<pops>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <trash@plt>
mov    $0x0,%al
call   1060 <popc@plt>
mov    -0x8(%rbp),%rcx
mov    %al,(%rcx)
movsbl %al,%edi
call   1040 <isalpnum@plt>
cmp    $0x0,%rax
je     1188 <pops+0x48>
jmp    1177 <pops+0x37>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <pops+0x13>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1050 <pushc@plt>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pops>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <trash@plt>
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1060 <popc@plt>
mov    %al,(%rbx)
movsbl %al,%edi
call   1040 <isalpnum@plt>
add    $0x1,%rbx
test   %rax,%rax
jne    1150 <pops+0x10>
movsbl -0x1(%rbx),%edi
call   1050 <pushc@plt>
movb   $0x0,-0x1(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @pops(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @trash()
br label %4
4: ; preds = %10, %1
%5 = call signext i8 (...) @popc()
%6 = load i8*, i8** %2
store i8 %5, i8* %6
%7 = call i64 @isalpnum(i8 signext %5)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %4
br label %10
10: ; preds = %9
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
br label %4
13: ; preds = %4
%14 = load i8*, i8** %2
%15 = load i8, i8* %14
%16 = call i32 @pushc(i8 signext %15)
%17 = load i8*, i8** %2
store i8 0, i8* %17
ret void
}

LLVM IR (-O2):
define void @pops(i8* nocapture %0) {
%2 = tail call i32 (...) @trash()
br label %3
3: ; preds = %3, %1
%4 = phi i8* [ %0, %1 ], [ %8, %3 ]
%5 = tail call signext i8 (...) @popc()
store i8 %5, i8* %4
%6 = tail call i64 @isalpnum(i8 signext %5)
%7 = icmp eq i64 %6, 0
%8 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %7, label %9, label %3
9: ; preds = %3
%10 = load i8, i8* %4
%11 = tail call i32 @pushc(i8 signext %10)
store i8 0, i8* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ping_manager(char *);
int /*<<< orphan*/ ping_monitor(char *);
void flush_mdmon(char *container) {
  ping_manager(container);
  ping_monitor(container);
}


x86 assembly (clang, -O0):
<flush_mdmon>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ping_manager@plt>
mov    -0x8(%rbp),%rdi
call   1040 <ping_monitor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flush_mdmon>:
push   %rbx
mov    %rdi,%rbx
call   1030 <ping_manager@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <ping_monitor@plt>

LLVM IR (-O0):
define void @flush_mdmon(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @ping_manager(i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @ping_monitor(i8* %5)
ret void
}

LLVM IR (-O2):
define void @flush_mdmon(i8* %0) {
%2 = tail call i32 @ping_manager(i8* %0)
%3 = tail call i32 @ping_monitor(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isalpha(int);
void t_isalpha_0x42() {
  Assert_real((isalpha(66)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              335, ("isalpha should be 1 for B"));
}


x86 assembly (clang, -O0):
<t_isalpha_0x42>:
push   %rbp
mov    %rsp,%rbp
mov    $0x42,%edi
call   1030 <isalpha@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x14f,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0x42>:
push   %rax
mov    $0x42,%edi
call   1030 <isalpha@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x14f,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 1 for B\00"
define void @t_isalpha_0x42() {
%1 = call i32 @isalpha(i32 66)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 335, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 1 for B\00"
define void @t_isalpha_0x42() {
%1 = tail call i32 @isalpha(i32 66)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 335, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int hvt_dumpcore_write_prstatus(int fd, struct hvt *hvt, void *cookie) {
  return -1;
}


x86 assembly (clang, -O0):
<hvt_dumpcore_write_prstatus>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hvt_dumpcore_write_prstatus>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.hvt = type opaque
define i32 @hvt_dumpcore_write_prstatus(i32 %0, %struct.hvt* %1, i8* %2) {
%4 = alloca i32
%5 = alloca %struct.hvt*
%6 = alloca i8*
store i32 %0, i32* %4
store %struct.hvt* %1, %struct.hvt** %5
store i8* %2, i8** %6
ret i32 -1
}

LLVM IR (-O2):
%struct.hvt = type opaque
define i32 @hvt_dumpcore_write_prstatus(i32 %0, %struct.hvt* nocapture readnone %1, i8* nocapture readnone %2) {
ret i32 -1
}
int EnKucukBul(int *BST, int kokIndex, int elemanSayisi) {
  if ((BST[2 * kokIndex + 1] == -1) || (2 * kokIndex + 1) >= elemanSayisi)
    return kokIndex;
  else
    return EnKucukBul(BST, 2 * kokIndex + 1, elemanSayisi);
}


x86 assembly (clang, -O0):
<EnKucukBul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
shl    $0x1,%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
cmpl   $0xffffffff,(%rax,%rcx,4)
je     114e <EnKucukBul+0x3e>
mov    -0x14(%rbp),%eax
shl    $0x1,%eax
add    $0x1,%eax
cmp    -0x18(%rbp),%eax
jl     1159 <EnKucukBul+0x49>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1171 <EnKucukBul+0x61>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
shl    $0x1,%esi
add    $0x1,%esi
mov    -0x18(%rbp),%edx
call   1030 <EnKucukBul@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EnKucukBul>:
mov    %esi,%eax
lea    (%rax,%rax,1),%esi
add    $0x1,%esi
movslq %esi,%rcx
cmpl   $0xffffffff,(%rdi,%rcx,4)
je     1115 <EnKucukBul+0x15>
cmp    %edx,%esi
jl     1100 <EnKucukBul>
ret

LLVM IR (-O0):
define i32 @EnKucukBul(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32*, i32** %5
%9 = load i32, i32* %6
%10 = mul nsw i32 2, %9
%11 = add nsw i32 %10, 1
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %8, i64 %12
%14 = load i32, i32* %13
%15 = icmp eq i32 %14, -1
br i1 %15, label %22, label %16
16: ; preds = %3
%17 = load i32, i32* %6
%18 = mul nsw i32 2, %17
%19 = add nsw i32 %18, 1
%20 = load i32, i32* %7
%21 = icmp sge i32 %19, %20
br i1 %21, label %22, label %24
22: ; preds = %16, %3
%23 = load i32, i32* %6
store i32 %23, i32* %4
br label %31
24: ; preds = %16
%25 = load i32*, i32** %5
%26 = load i32, i32* %6
%27 = mul nsw i32 2, %26
%28 = add nsw i32 %27, 1
%29 = load i32, i32* %7
%30 = call i32 @EnKucukBul(i32* %25, i32 %28, i32 %29)
store i32 %30, i32* %4
br label %31
31: ; preds = %24, %22
%32 = load i32, i32* %4
ret i32 %32
}

LLVM IR (-O2):
define i32 @EnKucukBul(i32* nocapture %0, i32 %1, i32 %2) {
br label %4
4: ; preds = %4, %3
%5 = phi i32 [ %1, %3 ], [ %7, %4 ]
%6 = shl nsw i32 %5, 1
%7 = or i32 %6, 1
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = icmp ne i32 %10, -1
%12 = icmp slt i32 %7, %2
%13 = select i1 %11, i1 %12, i1 false
br i1 %13, label %4, label %14
14: ; preds = %4
ret i32 %5
}
int test_imm_86int8_mem(signed char *val) {
  return ((*val) & (-0x86 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_86int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xffffff7a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_86int8_mem>:
movsbl (%rdi),%eax
test   $0xffffff7a,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_86int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, -134
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_86int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
%4 = and i32 %3, -134
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i32 -40, i32 -20
ret i32 %6
}
void nseel_asm_exec2(void) { __asm__(""); }


x86 assembly (clang, -O0):
<nseel_asm_exec2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nseel_asm_exec2>:
ret

LLVM IR (-O0):
define void @nseel_asm_exec2() {
ret void
}

LLVM IR (-O2):
define void @nseel_asm_exec2() {
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
void test_five(int x, int y, int z) {
#pragma omp target parallel for simd collapse(2)
  for (int i = 0; i < x; i++)
    for (int i = 0; i < y; i++)
      for (int i = 0; i < z; i++)
        ;
}


x86 assembly (clang, -O0):
<test_five>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    117f <test_five+0x7f>
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    116c <test_five+0x6c>
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1159 <test_five+0x59>
jmp    114b <test_five+0x4b>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    113a <test_five+0x3a>
jmp    115e <test_five+0x5e>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1127 <test_five+0x27>
jmp    1171 <test_five+0x71>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1114 <test_five+0x14>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_five>:
ret

LLVM IR (-O0):
define void @test_five(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %10
10: ; preds = %33, %3
%11 = load i32, i32* %7
%12 = load i32, i32* %4
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %36
14: ; preds = %10
store i32 0, i32* %8
br label %15
15: ; preds = %29, %14
%16 = load i32, i32* %8
%17 = load i32, i32* %5
%18 = icmp slt i32 %16, %17
br i1 %18, label %19, label %32
19: ; preds = %15
store i32 0, i32* %9
br label %20
20: ; preds = %25, %19
%21 = load i32, i32* %9
%22 = load i32, i32* %6
%23 = icmp slt i32 %21, %22
br i1 %23, label %24, label %28
24: ; preds = %20
br label %25
25: ; preds = %24
%26 = load i32, i32* %9
%27 = add nsw i32 %26, 1
store i32 %27, i32* %9
br label %20
28: ; preds = %20
br label %29
29: ; preds = %28
%30 = load i32, i32* %8
%31 = add nsw i32 %30, 1
store i32 %31, i32* %8
br label %15
32: ; preds = %15
br label %33
33: ; preds = %32
%34 = load i32, i32* %7
%35 = add nsw i32 %34, 1
store i32 %35, i32* %7
br label %10
36: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @test_five(i32 %0, i32 %1, i32 %2) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ fputc(char, int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *);
int main() {
  FILE *textfile;
  textfile = fopen("sample.txt", "a");
  if (textfile == NULL) {
    return 1;
  }
  fputc('X', textfile);
  fclose(textfile);
  printf("\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeaa(%rip),%rdi
lea    0xeae(%rip),%rsi
call   1060 <fopen@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    117d <main+0x3d>
movl   $0x1,-0x4(%rbp)
jmp    11a7 <main+0x67>
mov    -0x10(%rbp),%rsi
mov    $0x58,%edi
call   1050 <fputc@plt>
mov    -0x10(%rbp),%rdi
call   1030 <fclose@plt>
lea    0xe72(%rip),%rdi
call   1040 <printf@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xeb8(%rip),%rdi
lea    0xebc(%rip),%rsi
call   1060 <fopen@plt>
test   %rax,%rax
je     117f <main+0x3f>
mov    %rax,%rbx
mov    $0x58,%edi
mov    %rax,%rsi
call   1050 <fputc@plt>
mov    %rbx,%rdi
call   1040 <fclose@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rbx
ret
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"sample.txt\00"
@.str.1 = [2 x i8] c"a\00"
@.str.2 = [2 x i8] c"\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32 0, i32* %1
%3 = call i32* @fopen(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %3, i32** %2
%4 = load i32*, i32** %2
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %7
6: ; preds = %0
store i32 1, i32* %1
br label %13
7: ; preds = %0
%8 = load i32*, i32** %2
%9 = call i32 @fputc(i8 signext 88, i32* %8)
%10 = load i32*, i32** %2
%11 = call i32 @fclose(i32* %10)
%12 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
store i32 0, i32* %1
br label %13
13: ; preds = %7, %6
%14 = load i32, i32* %1
ret i32 %14
}

LLVM IR (-O2):
@.str = [11 x i8] c"sample.txt\00"
@.str.1 = [2 x i8] c"a\00"
define i32 @main() {
%1 = tail call i32* @fopen(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%2 = icmp eq i32* %1, null
br i1 %2, label %7, label %3
3: ; preds = %0
%4 = tail call i32 @fputc(i8 signext 88, i32* %1)
%5 = tail call i32 @fclose(i32* %1)
%6 = tail call i32 @putchar(i32 10)
br label %7
7: ; preds = %0, %3
%8 = phi i32 [ 0, %3 ], [ 1, %0 ]
ret i32 %8
}
int ft_tolower(int c) { return ((c >= 'A' && c <= 'Z') ? (c - 'A' + 'a') : c); }


x86 assembly (clang, -O0):
<ft_tolower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x41,-0x4(%rbp)
jl     112c <ft_tolower+0x2c>
cmpl   $0x5a,-0x4(%rbp)
jg     112c <ft_tolower+0x2c>
mov    -0x4(%rbp),%eax
sub    $0x41,%eax
add    $0x61,%eax
mov    %eax,-0x8(%rbp)
jmp    1132 <ft_tolower+0x32>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_tolower>:
lea    -0x41(%rdi),%ecx
lea    0x20(%rdi),%eax
cmp    $0x1a,%ecx
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @ft_tolower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 65
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 90
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = load i32, i32* %2
%10 = sub nsw i32 %9, 65
%11 = add nsw i32 %10, 97
br label %14
12: ; preds = %5, %1
%13 = load i32, i32* %2
br label %14
14: ; preds = %12, %8
%15 = phi i32 [ %11, %8 ], [ %13, %12 ]
ret i32 %15
}

LLVM IR (-O2):
define i32 @ft_tolower(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = add nsw i32 %0, 32
%5 = select i1 %3, i32 %4, i32 %0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0x43() {
  Assert_real((iscntrl(67) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              340, ("iscntrl should be 0 for C"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0x43>:
push   %rbp
mov    %rsp,%rbp
mov    $0x43,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x154,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0x43>:
push   %rax
mov    $0x43,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x154,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for C\00"
define void @t_iscntrl_0x43() {
%1 = call i64 @iscntrl(i32 67)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 340, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for C\00"
define void @t_iscntrl_0x43() {
%1 = tail call i64 @iscntrl(i32 67)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 340, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
long g11() {
  static long l0 = (long)g11;
  return l0;
}


x86 assembly (clang, -O0):
<g11>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f15(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g11>:
mov    0x2ed9(%rip),%rax
ret

LLVM IR (-O0):
@g11.l0 = internal global i64 ptrtoint (i64 ()* @g11 to i64)
define i64 @g11() {
%1 = load i64, i64* @g11.l0
ret i64 %1
}

LLVM IR (-O2):
define i64 @g11() {
ret i64 ptrtoint (i64 ()* @g11 to i64)
}
/* Type definitions */
struct config_options {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ set_bin_refine_factors(struct config_options *, int const *);
int /*<<< orphan*/ set_bin_refine_scheme(struct config_options *, int);
void set_custom_bin_refine_factors(struct config_options *options,
                                   const int bin_refine_factors[3]) {
  set_bin_refine_factors(options, bin_refine_factors);
  set_bin_refine_scheme(options, 0x1);
}


x86 assembly (clang, -O0):
<set_custom_bin_refine_factors>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <set_bin_refine_factors@plt>
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <set_bin_refine_scheme@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_custom_bin_refine_factors>:
push   %rbx
mov    %rdi,%rbx
call   1040 <set_bin_refine_factors@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
pop    %rbx
jmp    1030 <set_bin_refine_scheme@plt>

LLVM IR (-O0):
%struct.config_options = type { i32 }
define void @set_custom_bin_refine_factors(%struct.config_options* %0, i32* %1) {
%3 = alloca %struct.config_options*
%4 = alloca i32*
store %struct.config_options* %0, %struct.config_options** %3
store i32* %1, i32** %4
%5 = load %struct.config_options*, %struct.config_options** %3
%6 = load i32*, i32** %4
%7 = call i32 @set_bin_refine_factors(%struct.config_options* %5, i32* %6)
%8 = load %struct.config_options*, %struct.config_options** %3
%9 = call i32 @set_bin_refine_scheme(%struct.config_options* %8, i32 1)
ret void
}

LLVM IR (-O2):
%struct.config_options = type { i32 }
define void @set_custom_bin_refine_factors(%struct.config_options* %0, i32* %1) {
%3 = tail call i32 @set_bin_refine_factors(%struct.config_options* %0, i32* %1)
%4 = tail call i32 @set_bin_refine_scheme(%struct.config_options* %0, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int main(void) {
  puts("PCIe interface test starting");
  puts("\r\n");
  int lR = 0;
  int lG = 0;
  int lB = 0;
  int lA = 0;
  while (1) {
    if ((*(volatile unsigned int *)(0x30000000)) == 0) {
      *(volatile unsigned int *)(0x30000090) =
          ((*(volatile unsigned int *)(0x30000080)));
    }
  }
  puts("PCIe interface test finished");
  puts("\r\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <puts@plt>
lea    0xeeb(%rip),%rdi
call   1030 <puts@plt>
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    $0x30000000,%eax
mov    (%rax),%eax
cmp    $0x0,%eax
jne    1171 <main+0x61>
mov    $0x30000080,%eax
mov    (%rax),%ecx
mov    $0x30000090,%eax
mov    %ecx,(%rax)
jmp    1153 <main+0x43>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xef9(%rip),%rdi
call   1030 <puts@plt>
nopl   0x0(%rax)
cmpl   $0x0,0x30000000
jne    1130 <main+0x20>
mov    0x30000080,%eax
mov    %eax,0x30000090
jmp    1130 <main+0x20>

LLVM IR (-O0):
@.str = [29 x i8] c"PCIe interface test starting\00"
@.str.1 = [3 x i8] c"\0D\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
%6 = call i32 @puts(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @puts(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
store i32 0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
store i32 0, i32* %5
br label %8
8: ; preds = %0, %13
%9 = load volatile i32, i32* inttoptr (i64 805306368 to i32*)
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %8
%12 = load volatile i32, i32* inttoptr (i64 805306496 to i32*)
store volatile i32 %12, i32* inttoptr (i64 805306512 to i32*)
br label %13
13: ; preds = %11, %8
br label %8
}

LLVM IR (-O2):
@.str = [29 x i8] c"PCIe interface test starting\00"
@.str.1 = [3 x i8] c"\0D\0A\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
br label %3
3: ; preds = %8, %0
%4 = load volatile i32, i32* inttoptr (i64 805306368 to i32*)
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = load volatile i32, i32* inttoptr (i64 805306496 to i32*)
store volatile i32 %7, i32* inttoptr (i64 805306512 to i32*)
br label %8
8: ; preds = %6, %3
br label %3
}
/* Variables and functions */
int /*<<< orphan*/ IF_fct_2(char);
void IF_min(void) { IF_fct_2('m'); }


x86 assembly (clang, -O0):
<IF_min>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6d,%edi
call   1030 <IF_fct_2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<IF_min>:
mov    $0x6d,%edi
jmp    1030 <IF_fct_2@plt>

LLVM IR (-O0):
define void @IF_min() {
%1 = call i32 @IF_fct_2(i8 signext 109)
ret void
}

LLVM IR (-O2):
define void @IF_min() {
%1 = tail call i32 @IF_fct_2(i8 signext 109)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, char *, char *, char *);
scalar_t__ system(char *);
size_t iptables_supports_xlock() {
  size_t ret = 0;
  char cmd[100];
  snprintf(cmd, 100, "%s %s %s", "iptables", "-w", "--version");
  if (system(cmd) == 0)
    ret = 1;
  return ret;
}


x86 assembly (clang, -O0):
<iptables_supports_xlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
movq   $0x0,-0x8(%rbp)
lea    -0x70(%rbp),%rdi
mov    $0x64,%esi
lea    0xec0(%rip),%rdx
lea    0xec2(%rip),%rcx
lea    0xec4(%rip),%r8
lea    0xec0(%rip),%r9
call   1040 <snprintf@plt>
lea    -0x70(%rbp),%rdi
call   1030 <system@plt>
cmp    $0x0,%rax
jne    1175 <iptables_supports_xlock+0x55>
movq   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iptables_supports_xlock>:
push   %rbx
sub    $0x70,%rsp
lea    0xed4(%rip),%rdx
lea    0xed6(%rip),%rcx
lea    0xed8(%rip),%r8
lea    0xed4(%rip),%r9
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x64,%esi
call   1040 <snprintf@plt>
mov    %rbx,%rdi
call   1030 <system@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %rcx,%rax
add    $0x70,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"%s %s %s\00"
@.str.1 = [9 x i8] c"iptables\00"
@.str.2 = [3 x i8] c"-w\00"
@.str.3 = [10 x i8] c"--version\00"
define i64 @iptables_supports_xlock() {
%1 = alloca i64
%2 = alloca [100 x i8]
store i64 0, i64* %1
%3 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%4 = call i32 @snprintf(i8* %3, i32 100, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0))
%5 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%6 = call i64 @system(i8* %5)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %0
store i64 1, i64* %1
br label %9
9: ; preds = %8, %0
%10 = load i64, i64* %1
ret i64 %10
}

LLVM IR (-O2):
@.str = [9 x i8] c"%s %s %s\00"
@.str.1 = [9 x i8] c"iptables\00"
@.str.2 = [3 x i8] c"-w\00"
@.str.3 = [10 x i8] c"--version\00"
define i64 @iptables_supports_xlock() {
%1 = alloca [100 x i8]
%2 = getelementptr inbounds [100 x i8], [100 x i8]* %1, i64 0, i64 0
%3 = call i32 @snprintf(i8* %2, i32 100, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0))
%4 = call i64 @system(i8* %2)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i64
ret i64 %6
}
unsigned phosphor2x_generic_output_fmts(unsigned input_fmts) {
  return input_fmts;
}


x86 assembly (clang, -O0):
<phosphor2x_generic_output_fmts>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<phosphor2x_generic_output_fmts>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @phosphor2x_generic_output_fmts(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @phosphor2x_generic_output_fmts(i32 returned %0) {
ret i32 %0
}
unsigned long long __DOUBLE_BITS(double __f) {
  union {
    double __f;
    unsigned long long __i;
  } __u;
  __u.__f = __f;
  return __u.__i;
}


x86 assembly (clang, -O0):
<__DOUBLE_BITS>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__DOUBLE_BITS>:
movq   %xmm0,%rax
ret

LLVM IR (-O0):
%union.anon = type { double }
define i64 @__DOUBLE_BITS(double %0) {
%2 = alloca double
%3 = alloca %union.anon
store double %0, double* %2
%4 = load double, double* %2
%5 = bitcast %union.anon* %3 to double*
store double %4, double* %5
%6 = bitcast %union.anon* %3 to i64*
%7 = load i64, i64* %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @__DOUBLE_BITS(double %0) {
%2 = bitcast double %0 to i64
ret i64 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fread(unsigned int *, int, int, int /*<<< orphan*/ *);
int ephcom_inint(FILE *infp) {
  unsigned u;
  static int retval;
  unsigned gnulliver32(unsigned);
  fread(&u, 4, 1, infp);
  retval = (int)gnulliver32(u);
  return (retval);
}


x86 assembly (clang, -O0):
<ephcom_inint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
lea    -0xc(%rbp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
call   1040 <fread@plt>
mov    -0xc(%rbp),%edi
call   1030 <gnulliver32@plt>
mov    %eax,0x2ee3(%rip)
mov    0x2edd(%rip),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ephcom_inint>:
push   %rax
mov    %rdi,%rcx
lea    0x4(%rsp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
call   1040 <fread@plt>
mov    0x4(%rsp),%edi
pop    %rax
jmp    1030 <gnulliver32@plt>

LLVM IR (-O0):
@ephcom_inint.retval = internal global i32 0
define i32 @ephcom_inint(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @fread(i32* %3, i32 4, i32 1, i32* %4)
%6 = load i32, i32* %3
%7 = call i32 @gnulliver32(i32 %6)
store i32 %7, i32* @ephcom_inint.retval
%8 = load i32, i32* @ephcom_inint.retval
ret i32 %8
}

LLVM IR (-O2):
define i32 @ephcom_inint(i32* nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @fread(i32* %2, i32 4, i32 1, i32* %0)
%5 = load i32, i32* %2
%6 = tail call i32 @gnulliver32(i32 %5)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ control(int /*<<< orphan*/);
int /*<<< orphan*/ nextchar();
void gin(void) { control(nextchar()); }


x86 assembly (clang, -O0):
<gin>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <nextchar@plt>
mov    %eax,%edi
call   1030 <control@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gin>:
push   %rax
xor    %eax,%eax
call   1040 <nextchar@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <control@plt>

LLVM IR (-O0):
define void @gin() {
%1 = call i32 (...) @nextchar()
%2 = call i32 @control(i32 %1)
ret void
}

LLVM IR (-O2):
define void @gin() {
%1 = tail call i32 (...) @nextchar()
%2 = tail call i32 @control(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
__attribute__((always_)) void tu_beep(void) { putchar('\a'); }


x86 assembly (clang, -O0):
<tu_beep>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7,%edi
call   1030 <putchar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tu_beep>:
mov    $0x7,%edi
jmp    1030 <putchar@plt>

LLVM IR (-O0):
define void @tu_beep() {
%1 = call i32 @putchar(i8 signext 7)
ret void
}

LLVM IR (-O2):
define void @tu_beep() {
%1 = tail call i32 @putchar(i8 signext 7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gmvwrite_surface_header(char *);
void fgmvwrite_surface_header(char *nsurf) { gmvwrite_surface_header(nsurf); }


x86 assembly (clang, -O0):
<fgmvwrite_surface_header>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <gmvwrite_surface_header@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgmvwrite_surface_header>:
jmp    1030 <gmvwrite_surface_header@plt>

LLVM IR (-O0):
define void @fgmvwrite_surface_header(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @gmvwrite_surface_header(i8* %3)
ret void
}

LLVM IR (-O2):
define void @fgmvwrite_surface_header(i8* %0) {
%2 = tail call i32 @gmvwrite_surface_header(i8* %0)
ret void
}