xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ foo(int *, int *);
int /*<<< orphan*/ printf(char *, int, int);
int main(void) {
  int a = 3, b = 1, c = 5;
  foo(&a, &b);
  foo(&b, &c);
  printf("a=%d b=%d\n", a, b);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x3,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x5,-0xc(%rbp)
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <foo@plt>
lea    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1040 <foo@plt>
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xe9c(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movl   $0x3,0x8(%rsp)
movl   $0x1,0x4(%rsp)
movl   $0x5,0xc(%rsp)
lea    0x8(%rsp),%rdi
lea    0x4(%rsp),%rbx
mov    %rbx,%rsi
call   1040 <foo@plt>
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1040 <foo@plt>
mov    0x8(%rsp),%esi
mov    0x4(%rsp),%edx
lea    0xe95(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"a=%d b=%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 3, i32* %1
store i32 1, i32* %2
store i32 5, i32* %3
%4 = call i32 @foo(i32* %1, i32* %2)
%5 = call i32 @foo(i32* %2, i32* %3)
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %6, i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"a=%d b=%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = bitcast i32* %1 to i8*
store i32 3, i32* %1
%5 = bitcast i32* %2 to i8*
store i32 1, i32* %2
%6 = bitcast i32* %3 to i8*
store i32 5, i32* %3
%7 = call i32 @foo(i32* %1, i32* %2)
%8 = call i32 @foo(i32* %2, i32* %3)
%9 = load i32, i32* %1
%10 = load i32, i32* %2
%11 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %9, i32 %10)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ TrimAnglesHandle();
int /*<<< orphan*/ UAVObjRequestUpdate(int /*<<< orphan*/);
void TrimAnglesRequestUpdate() { UAVObjRequestUpdate(TrimAnglesHandle()); }


x86 assembly (clang, -O0):
<TrimAnglesRequestUpdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <TrimAnglesHandle@plt>
mov    %eax,%edi
call   1030 <UAVObjRequestUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TrimAnglesRequestUpdate>:
push   %rax
xor    %eax,%eax
call   1040 <TrimAnglesHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <UAVObjRequestUpdate@plt>

LLVM IR (-O0):
define void @TrimAnglesRequestUpdate() {
%1 = call i32 (...) @TrimAnglesHandle()
%2 = call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}

LLVM IR (-O2):
define void @TrimAnglesRequestUpdate() {
%1 = tail call i32 (...) @TrimAnglesHandle()
%2 = tail call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}
void I422Copy() {}


x86 assembly (clang, -O0):
<I422Copy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I422Copy>:
ret

LLVM IR (-O0):
define void @I422Copy() {
ret void
}

LLVM IR (-O2):
define void @I422Copy() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ ceil(double);
int log(double);
int32_t int_log(double base, double x) {
  return ceil((double)(log(x) / log(base)));
}


x86 assembly (clang, -O0):
<int_log>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1040 <log@plt>
mov    %eax,-0x14(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <log@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
cltd
idiv   %ecx
cvtsi2sd %eax,%xmm0
call   1030 <ceil@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_log>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm0,0x8(%rsp)
movaps %xmm1,%xmm0
call   1040 <log@plt>
mov    %eax,%ebx
movsd  0x8(%rsp),%xmm0
call   1040 <log@plt>
mov    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
add    $0x10,%rsp
pop    %rbx
jmp    1030 <ceil@plt>

LLVM IR (-O0):
define i32 @int_log(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %4
%6 = call i32 @log(double %5)
%7 = load double, double* %3
%8 = call i32 @log(double %7)
%9 = sdiv i32 %6, %8
%10 = sitofp i32 %9 to double
%11 = call i32 @ceil(double %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @int_log(double %0, double %1) {
%3 = tail call i32 @log(double %1)
%4 = tail call i32 @log(double %0)
%5 = sdiv i32 %3, %4
%6 = sitofp i32 %5 to double
%7 = tail call i32 @ceil(double %6)
ret i32 %7
}
int routine2(int n) {
  int i;
#pragma acc loop
  for (i = 0; i < n; i++)
    ;
  return n + 1;
}


x86 assembly (clang, -O0):
<routine2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    112d <routine2+0x2d>
jmp    111f <routine2+0x1f>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <routine2+0xe>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<routine2>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @routine2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %4
br label %9
9: ; preds = %8
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %2
%14 = add nsw i32 %13, 1
ret i32 %14
}

LLVM IR (-O2):
define i32 @routine2(i32 %0) {
%2 = add nsw i32 %0, 1
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0xa7() {
  Assert_real((isspace(167) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              840, ("isspace should be 0 for 0xa7"));
}


x86 assembly (clang, -O0):
<t_isspace_0xa7>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa7,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x348,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0xa7>:
push   %rax
mov    $0xa7,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x348,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0xa7\00"
define void @t_isspace_0xa7() {
%1 = call i64 @isspace(i32 167)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 840, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0xa7\00"
define void @t_isspace_0xa7() {
%1 = tail call i64 @isspace(i32 167)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 840, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LCD_Write_COM(int);
int /*<<< orphan*/ LCD_Write_COM_DATA(int, int);
void LCD_Disp_Normal() {
  LCD_Write_COM_DATA(0x11, 0x6078);
  LCD_Write_COM(0x22);
}


x86 assembly (clang, -O0):
<LCD_Disp_Normal>:
push   %rbp
mov    %rsp,%rbp
mov    $0x11,%edi
mov    $0x6078,%esi
call   1030 <LCD_Write_COM_DATA@plt>
mov    $0x22,%edi
call   1040 <LCD_Write_COM@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCD_Disp_Normal>:
push   %rax
mov    $0x11,%edi
mov    $0x6078,%esi
call   1030 <LCD_Write_COM_DATA@plt>
mov    $0x22,%edi
pop    %rax
jmp    1040 <LCD_Write_COM@plt>

LLVM IR (-O0):
define void @LCD_Disp_Normal() {
%1 = call i32 @LCD_Write_COM_DATA(i32 17, i32 24696)
%2 = call i32 @LCD_Write_COM(i32 34)
ret void
}

LLVM IR (-O2):
define void @LCD_Disp_Normal() {
%1 = tail call i32 @LCD_Write_COM_DATA(i32 17, i32 24696)
%2 = tail call i32 @LCD_Write_COM(i32 34)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __analyzer_eval(int);
void test_range_float_ge_lt(float f) {
  if (f >= 4)
    if (f < 5)
      __analyzer_eval(f == 4);
}


x86 assembly (clang, -O0):
<test_range_float_ge_lt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xed6(%rip),%xmm1
ucomiss %xmm1,%xmm0
jb     116c <test_range_float_ge_lt+0x5c>
movss  0xec9(%rip),%xmm0
ucomiss -0x4(%rbp),%xmm0
jbe    1167 <test_range_float_ge_lt+0x57>
movss  -0x4(%rbp),%xmm0
movss  0xeae(%rip),%xmm1
ucomiss %xmm1,%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__analyzer_eval@plt>
jmp    116c <test_range_float_ge_lt+0x5c>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_range_float_ge_lt>:
ucomiss 0xee9(%rip),%xmm0
jb     113b <test_range_float_ge_lt+0x2b>
movss  0xee3(%rip),%xmm1
ucomiss %xmm0,%xmm1
jbe    113b <test_range_float_ge_lt+0x2b>
cmpeqss 0xed1(%rip),%xmm0
movd   %xmm0,%edi
and    $0x1,%edi
jmp    1030 <__analyzer_eval@plt>
ret

LLVM IR (-O0):
define void @test_range_float_ge_lt(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp oge float %3, 4.000000e+00
br i1 %4, label %5, label %14
5: ; preds = %1
%6 = load float, float* %2
%7 = fcmp olt float %6, 5.000000e+00
br i1 %7, label %8, label %13
8: ; preds = %5
%9 = load float, float* %2
%10 = fcmp oeq float %9, 4.000000e+00
%11 = zext i1 %10 to i32
%12 = call i32 @__analyzer_eval(i32 %11)
br label %13
13: ; preds = %8, %5
br label %14
14: ; preds = %13, %1
ret void
}

LLVM IR (-O2):
define void @test_range_float_ge_lt(float %0) {
%2 = fcmp oge float %0, 4.000000e+00
%3 = fcmp olt float %0, 5.000000e+00
%4 = and i1 %2, %3
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = fcmp oeq float %0, 4.000000e+00
%7 = zext i1 %6 to i32
%8 = tail call i32 @__analyzer_eval(i32 %7)
br label %9
9: ; preds = %5, %1
ret void
}
int check_dimspecs() { return (0); }


x86 assembly (clang, -O0):
<check_dimspecs>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_dimspecs>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @check_dimspecs() {
ret i32 0
}

LLVM IR (-O2):
define i32 @check_dimspecs() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ _k_disp();
void __attribute__((destructor)) k_detach(void) { _k_disp(); }


x86 assembly (clang, -O0):
<k_detach>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_k_disp@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<k_detach>:
xor    %eax,%eax
jmp    1030 <_k_disp@plt>

LLVM IR (-O0):
@llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @k_detach, i8* null }]
define void @k_detach() {
%1 = call i32 (...) @_k_disp()
ret void
}

LLVM IR (-O2):
@llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @k_detach, i8* null }]
define void @k_detach() {
%1 = tail call i32 (...) @_k_disp()
ret void
}
void snd_seq_set_bit(int nr, void *array) {}


x86 assembly (clang, -O0):
<snd_seq_set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<snd_seq_set_bit>:
ret

LLVM IR (-O0):
define void @snd_seq_set_bit(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @snd_seq_set_bit(i32 %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _vWriteError(int /*<<< orphan*/);
void _vPrintError(char *c) {
  while (*c)
    _vWriteError(*c++);
}


x86 assembly (clang, -O0):
<_vPrintError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1145 <_vPrintError+0x35>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <_vWriteError@plt>
jmp    111c <_vPrintError+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_vPrintError>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <_vPrintError+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <_vWriteError@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <_vPrintError+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @_vPrintError(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %2
%10 = load i8, i8* %8
%11 = sext i8 %10 to i32
%12 = call i32 @_vWriteError(i32 %11)
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @_vPrintError(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %10, %4 ], [ %2, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = sext i8 %5 to i32
%9 = tail call i32 @_vWriteError(i32 %8)
%10 = load i8, i8* %7
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
void Msp430TimerCapComP__1__Compare__default__fired(void) {}


x86 assembly (clang, -O0):
<Msp430TimerCapComP__1__Compare__default__fired>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430TimerCapComP__1__Compare__default__fired>:
ret

LLVM IR (-O0):
define void @Msp430TimerCapComP__1__Compare__default__fired() {
ret void
}

LLVM IR (-O2):
define void @Msp430TimerCapComP__1__Compare__default__fired() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int chksum(void *, int);
int /*<<< orphan*/ fwrite(void *, int, int, int /*<<< orphan*/ *);
int write_and_sum(void *dat, int size, FILE *f) {
  if (dat == 0 || size == 0)
    return 0;
  fwrite(dat, size, 1, f);
  return chksum(dat, size);
}


x86 assembly (clang, -O0):
<write_and_sum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1148 <write_and_sum+0x28>
cmpl   $0x0,-0x14(%rbp)
jne    1154 <write_and_sum+0x34>
movl   $0x0,-0x4(%rbp)
jmp    1178 <write_and_sum+0x58>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x20(%rbp),%rcx
mov    $0x1,%edx
call   1040 <fwrite@plt>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <chksum@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_and_sum>:
push   %rbp
push   %rbx
push   %rax
test   %rdi,%rdi
je     1150 <write_and_sum+0x30>
mov    %esi,%ebp
test   %esi,%esi
je     1150 <write_and_sum+0x30>
mov    %rdx,%rcx
mov    %rdi,%rbx
mov    %ebp,%esi
mov    $0x1,%edx
call   1040 <fwrite@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <chksum@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @write_and_sum(i8* %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32*
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32* %2, i32** %7
%8 = load i8*, i8** %5
%9 = icmp eq i8* %8, null
br i1 %9, label %13, label %10
10: ; preds = %3
%11 = load i32, i32* %6
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %10, %3
store i32 0, i32* %4
br label %22
14: ; preds = %10
%15 = load i8*, i8** %5
%16 = load i32, i32* %6
%17 = load i32*, i32** %7
%18 = call i32 @fwrite(i8* %15, i32 %16, i32 1, i32* %17)
%19 = load i8*, i8** %5
%20 = load i32, i32* %6
%21 = call i32 @chksum(i8* %19, i32 %20)
store i32 %21, i32* %4
br label %22
22: ; preds = %14, %13
%23 = load i32, i32* %4
ret i32 %23
}

LLVM IR (-O2):
define i32 @write_and_sum(i8* %0, i32 %1, i32* nocapture %2) {
%4 = icmp eq i8* %0, null
%5 = icmp eq i32 %1, 0
%6 = or i1 %4, %5
br i1 %6, label %10, label %7
7: ; preds = %3
%8 = tail call i32 @fwrite(i8* %0, i32 %1, i32 1, i32* %2)
%9 = tail call i32 @chksum(i8* %0, i32 %1)
br label %10
10: ; preds = %3, %7
%11 = phi i32 [ %9, %7 ], [ 0, %3 ]
ret i32 %11
}
void gtk_text_attributes_ref() {}


x86 assembly (clang, -O0):
<gtk_text_attributes_ref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_attributes_ref>:
ret

LLVM IR (-O0):
define void @gtk_text_attributes_ref() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_attributes_ref() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int int32_t;

/* Variables and functions */
uint8_t aeron_semantic_version_patch(int32_t version) {
  return (uint8_t)(version & 0xFF);
}


x86 assembly (clang, -O0):
<aeron_semantic_version_patch>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aeron_semantic_version_patch>:
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @aeron_semantic_version_patch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
ret i32 %4
}

LLVM IR (-O2):
define i32 @aeron_semantic_version_patch(i32 %0) {
%2 = and i32 %0, 255
ret i32 %2
}
int *f_2_sub(int *p) { return p; }


x86 assembly (clang, -O0):
<f_2_sub>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_2_sub>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i32* @f_2_sub(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
ret i32* %3
}

LLVM IR (-O2):
define i32* @f_2_sub(i32* readnone returned %0) {
ret i32* %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void app_main(void) { printf("app_main running\n"); }


x86 assembly (clang, -O0):
<app_main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<app_main>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"app_main running\0A\00"
define void @app_main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [17 x i8] c"app_main running\00"
define void @app_main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write(int, int *, int);
wn(int n) {
  int d = n / 10;
  int c = n % 10 + '0';
  if (d)
    wn(d);
  write(1, &c, 1);
}


x86 assembly (clang, -O0):
<wn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
add    $0x30,%edx
mov    %edx,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     115c <wn+0x3c>
mov    -0xc(%rbp),%edi
call   1040 <wn@plt>
mov    $0x1,%edx
lea    -0x10(%rbp),%rsi
mov    %edx,%edi
call   1030 <write@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wn>:
push   %rax
movslq %edi,%rax
imul   $0x66666667,%rax,%rdi
mov    %rdi,%rcx
shr    $0x3f,%rcx
sar    $0x22,%rdi
add    %ecx,%edi
lea    (%rdi,%rdi,1),%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
add    %eax,%ecx
add    $0x30,%ecx
mov    %ecx,0x4(%rsp)
add    $0x9,%eax
cmp    $0x13,%eax
jb     1156 <wn+0x36>
call   1040 <wn@plt>
lea    0x4(%rsp),%rsi
mov    $0x1,%edi
mov    $0x1,%edx
call   1030 <write@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @wn(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
%6 = load i32, i32* %3
%7 = sdiv i32 %6, 10
store i32 %7, i32* %4
%8 = load i32, i32* %3
%9 = srem i32 %8, 10
%10 = add nsw i32 %9, 48
store i32 %10, i32* %5
%11 = load i32, i32* %4
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %1
%14 = load i32, i32* %4
%15 = call i32 @wn(i32 %14)
br label %16
16: ; preds = %13, %1
%17 = call i32 @write(i32 1, i32* %5, i32 1)
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @wn(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = srem i32 %0, 10
%5 = sdiv i32 %0, 10
%6 = add nsw i32 %4, 48
store i32 %6, i32* %2
%7 = add i32 %0, 9
%8 = icmp ult i32 %7, 19
br i1 %8, label %11, label %9
9: ; preds = %1
%10 = tail call i32 @wn(i32 %5)
br label %11
11: ; preds = %9, %1
%12 = call i32 @write(i32 1, i32* %2, i32 1)
ret i32 undef
}
const char *ctm_get_date(void) { return "Mar 15 2022"; }


x86 assembly (clang, -O0):
<ctm_get_date>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctm_get_date>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [12 x i8] c"Mar 15 2022\00"
define i8* @ctm_get_date() {
ret i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [12 x i8] c"Mar 15 2022\00"
define i8* @ctm_get_date() {
ret i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int _wymum(int, int);
uint64_t _wymix(uint64_t A, uint64_t B) { return A ^ B ^ _wymum(A, B); }


x86 assembly (clang, -O0):
<_wymix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_wymum@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
xor    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_wymix>:
push   %rbx
mov    %esi,%ebx
xor    %edi,%ebx
call   1030 <_wymum@plt>
xor    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @_wymix(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = xor i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @_wymum(i32 %8, i32 %9)
%11 = xor i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @_wymix(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
%4 = tail call i32 @_wymum(i32 %0, i32 %1)
%5 = xor i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int Webcam_Init();
int GB_CameraInit(void) { return Webcam_Init(); }


x86 assembly (clang, -O0):
<GB_CameraInit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Webcam_Init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GB_CameraInit>:
xor    %eax,%eax
jmp    1030 <Webcam_Init@plt>

LLVM IR (-O0):
define i32 @GB_CameraInit() {
%1 = call i32 (...) @Webcam_Init()
ret i32 %1
}

LLVM IR (-O2):
define i32 @GB_CameraInit() {
%1 = tail call i32 (...) @Webcam_Init()
ret i32 %1
}
/* Type definitions */
typedef char *uint64_t;

/* Variables and functions */
uint64_t rrsp(void) {
  uint64_t val;
  __asm volatile("movq %%rsp,%0" : "=r"(val));
  return val;
}


x86 assembly (clang, -O0):
<rrsp>:
push   %rbp
mov    %rsp,%rbp
mov    %rsp,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rrsp>:
mov    %rsp,%rax
ret

LLVM IR (-O0):
define i8* @rrsp() {
%1 = alloca i8*
%2 = call i8* asm sideeffect "movq %rsp,$0", "=r,~{dirflag},~{fpsr},~{flags}"()
store i8* %2, i8** %1
%3 = load i8*, i8** %1
ret i8* %3
}

LLVM IR (-O2):
define i8* @rrsp() {
%1 = tail call i8* asm sideeffect "movq %rsp,$0", "=r,~{dirflag},~{fpsr},~{flags}"()
ret i8* %1
}
/* Type definitions */
struct bstree_node {
  int dummy;
};

/* Variables and functions */
struct bstree_node *__bstree_iterate(struct bstree_node const *,
                                     int /*<<< orphan*/);
struct bstree_node *bstree_prev(const struct bstree_node *node) {
  return __bstree_iterate(node, 0);
}


x86 assembly (clang, -O0):
<bstree_prev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <__bstree_iterate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bstree_prev>:
xor    %esi,%esi
jmp    1030 <__bstree_iterate@plt>

LLVM IR (-O0):
%struct.bstree_node = type { i32 }
define %struct.bstree_node* @bstree_prev(%struct.bstree_node* %0) {
%2 = alloca %struct.bstree_node*
store %struct.bstree_node* %0, %struct.bstree_node** %2
%3 = load %struct.bstree_node*, %struct.bstree_node** %2
%4 = call %struct.bstree_node* @__bstree_iterate(%struct.bstree_node* %3, i32 0)
ret %struct.bstree_node* %4
}

LLVM IR (-O2):
%struct.bstree_node = type { i32 }
define %struct.bstree_node* @bstree_prev(%struct.bstree_node* %0) {
%2 = tail call %struct.bstree_node* @__bstree_iterate(%struct.bstree_node* %0, i32 0)
ret %struct.bstree_node* %2
}
/* Variables and functions */
scalar_t__ INT_MIN;
unsigned int test2u(unsigned int x) { return x + (unsigned int)INT_MIN; }


x86 assembly (clang, -O0):
<test2u>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ed7(%rip),%rcx
mov    (%rcx),%rcx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test2u>:
mov    %edi,%eax
mov    0x2edf(%rip),%rcx
add    (%rcx),%eax
ret

LLVM IR (-O0):
@INT_MIN = global i64 0
define i32 @test2u(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i64, i64* @INT_MIN
%5 = trunc i64 %4 to i32
%6 = add i32 %3, %5
ret i32 %6
}

LLVM IR (-O2):
@INT_MIN = global i64 0
define i32 @test2u(i32 %0) {
%2 = load i64, i64* @INT_MIN
%3 = trunc i64 %2 to i32
%4 = add i32 %3, %0
ret i32 %4
}
/* Variables and functions */
double log(int);
double reciprocal_exponential_CDF(double x, double k) {
  return -(log(1 - x) / k);
}


x86 assembly (clang, -O0):
<reciprocal_exponential_CDF>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  0xed6(%rip),%xmm0
subsd  -0x8(%rbp),%xmm0
cvttsd2si %xmm0,%edi
call   1030 <log@plt>
divsd  -0x10(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reciprocal_exponential_CDF>:
push   %rax
movsd  %xmm1,(%rsp)
movsd  0xee2(%rip),%xmm1
subsd  %xmm0,%xmm1
cvttsd2si %xmm1,%edi
call   1030 <log@plt>
xorpd  0xedd(%rip),%xmm0
divsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @reciprocal_exponential_CDF(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = fsub double 1.000000e+00, %5
%7 = fptosi double %6 to i32
%8 = call double @log(i32 %7)
%9 = load double, double* %4
%10 = fdiv double %8, %9
%11 = fneg double %10
ret double %11
}

LLVM IR (-O2):
define double @reciprocal_exponential_CDF(double %0, double %1) {
%3 = fsub double 1.000000e+00, %0
%4 = fptosi double %3 to i32
%5 = tail call double @log(i32 %4)
%6 = fneg double %5
%7 = fdiv double %6, %1
ret double %7
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ free(char *);
char *malloc(int);
main(void) {
  char *array;
  int i;
  for (i = 0; i < 100; i++)
    array = malloc(10 * sizeof(char));
  free(array);
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x64,-0x14(%rbp)
jge    116c <main+0x3c>
mov    $0xa,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1146 <main+0x16>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x64,%ebx
cs nopw 0x0(%rax,%rax,1)
mov    $0xa,%edi
call   1040 <malloc@plt>
add    $0xffffffff,%ebx
jne    1140 <main+0x10>
mov    %rax,%rdi
call   1030 <free@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %3
br label %4
4: ; preds = %9, %0
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 100
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = call i8* @malloc(i32 10)
store i8* %8, i8** %2
br label %9
9: ; preds = %7
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i8*, i8** %2
%14 = call i32 @free(i8* %13)
%15 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call dereferenceable_or_null(10) i8* @malloc(i32 10)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 100
br i1 %5, label %6, label %1
6: ; preds = %1
%7 = tail call i32 @free(i8* %3)
%8 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
double __nv_rint(double);
double rint(double __a) { return __nv_rint(__a); }


x86 assembly (clang, -O0):
<rint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__nv_rint@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rint>:
jmp    1030 <__nv_rint@plt>

LLVM IR (-O0):
define double @rint(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @__nv_rint(double %3)
ret double %4
}

LLVM IR (-O2):
define double @rint(double %0) {
%2 = tail call double @__nv_rint(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ FD_CLOEXEC;
int /*<<< orphan*/ F_SETFD;
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ errno;
scalar_t__ fcntl(int, int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ log_err(int /*<<< orphan*/, char *);
void set_fd_closed_on_exec(int fd) {
  assert(fd >= 0);
  if (fcntl(fd, F_SETFD, FD_CLOEXEC) < 0)
    log_err(errno, "fcntl(F_SETFD) failed");
  return;
}


x86 assembly (clang, -O0):
<set_fd_closed_on_exec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x4(%rbp),%edi
mov    0x2e8a(%rip),%rax
mov    (%rax),%esi
mov    0x2e79(%rip),%rax
mov    (%rax),%edx
call   1030 <fcntl@plt>
cmp    $0x0,%rax
jge    1185 <set_fd_closed_on_exec+0x55>
mov    0x2e59(%rip),%rax
mov    (%rax),%edi
lea    0xe80(%rip),%rsi
call   1050 <log_err@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_fd_closed_on_exec>:
push   %rbx
mov    %edi,%ebx
not    %edi
shr    $0x1f,%edi
call   1040 <assert@plt>
mov    0x2e9c(%rip),%rax
mov    (%rax),%esi
mov    0x2e8b(%rip),%rax
mov    (%rax),%edx
mov    %ebx,%edi
call   1030 <fcntl@plt>
test   %rax,%rax
js     115d <set_fd_closed_on_exec+0x2d>
pop    %rbx
ret
mov    0x2e6c(%rip),%rax
mov    (%rax),%edi
lea    0xe93(%rip),%rsi
pop    %rbx
jmp    1050 <log_err@plt>

LLVM IR (-O0):
@F_SETFD = global i32 0
@FD_CLOEXEC = global i32 0
@errno = global i32 0
@.str = [22 x i8] c"fcntl(F_SETFD) failed\00"
define void @set_fd_closed_on_exec(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
%7 = load i32, i32* %2
%8 = load i32, i32* @F_SETFD
%9 = load i32, i32* @FD_CLOEXEC
%10 = call i64 @fcntl(i32 %7, i32 %8, i32 %9)
%11 = icmp slt i64 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %1
%13 = load i32, i32* @errno
%14 = call i32 @log_err(i32 %13, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
br label %15
15: ; preds = %12, %1
ret void
}

LLVM IR (-O2):
@F_SETFD = global i32 0
@FD_CLOEXEC = global i32 0
@errno = global i32 0
@.str = [22 x i8] c"fcntl(F_SETFD) failed\00"
define void @set_fd_closed_on_exec(i32 %0) {
%2 = xor i32 %0, -1
%3 = lshr i32 %2, 31
%4 = tail call i32 @assert(i32 %3)
%5 = load i32, i32* @F_SETFD
%6 = load i32, i32* @FD_CLOEXEC
%7 = tail call i64 @fcntl(i32 %0, i32 %5, i32 %6)
%8 = icmp slt i64 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i32, i32* @errno
%11 = tail call i32 @log_err(i32 %10, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %9, %1
ret void
}
freeReturnStruct() {}


x86 assembly (clang, -O0):
<freeReturnStruct>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeReturnStruct>:
ret

LLVM IR (-O0):
define i32 @freeReturnStruct() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @freeReturnStruct() {
ret i32 undef
}
void func_if_else(int c) {
  int a = 0;
  if (c) {
    a = 1;
  } else {
    a = 2;
  }
}


x86 assembly (clang, -O0):
<func_if_else>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1124 <func_if_else+0x24>
movl   $0x1,-0x8(%rbp)
jmp    112b <func_if_else+0x2b>
movl   $0x2,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_if_else>:
ret

LLVM IR (-O0):
define void @func_if_else(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %3
br label %8
7: ; preds = %1
store i32 2, i32* %3
br label %8
8: ; preds = %7, %6
ret void
}

LLVM IR (-O2):
define void @func_if_else(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ngen(char *, char *, int /*<<< orphan*/);
void cgdec1ib(void) { ngen("%s\t(%%rax)", "decb", 0); }


x86 assembly (clang, -O0):
<cgdec1ib>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee9(%rip),%rsi
xor    %edx,%edx
call   1030 <ngen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgdec1ib>:
lea    0xee9(%rip),%rdi
lea    0xeed(%rip),%rsi
xor    %edx,%edx
jmp    1030 <ngen@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"%s\09(%%rax)\00"
@.str.1 = [5 x i8] c"decb\00"
define void @cgdec1ib() {
%1 = call i32 @ngen(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 0)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"%s\09(%%rax)\00"
@.str.1 = [5 x i8] c"decb\00"
define void @cgdec1ib() {
%1 = tail call i32 @ngen(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 0)
ret void
}
/* Type definitions */
struct timespec {
  unsigned int tv_sec;
  unsigned int tv_nsec;
};

/* Variables and functions */
int nanosleep(struct timespec *, struct timespec *);
int msleep(unsigned ms) {
  struct timespec req, rem;
  req.tv_sec = ms / 1000;
  req.tv_nsec = (ms % 1000) * 1000000;
  return nanosleep(&req, &rem);
}


x86 assembly (clang, -O0):
<msleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
xor    %edx,%edx
div    %ecx
imul   $0xf4240,%edx,%eax
mov    %eax,-0xc(%rbp)
lea    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <nanosleep@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msleep>:
sub    $0x18,%rsp
mov    %edi,%eax
imul   $0x10624dd3,%rax,%rax
shr    $0x26,%rax
mov    %eax,0x8(%rsp)
imul   $0x3e8,%eax,%eax
sub    %eax,%edi
imul   $0xf4240,%edi,%eax
mov    %eax,0xc(%rsp)
lea    0x8(%rsp),%rdi
lea    0x10(%rsp),%rsi
call   1030 <nanosleep@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
define i32 @msleep(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.timespec
%4 = alloca %struct.timespec
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = udiv i32 %5, 1000
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
store i32 %6, i32* %7
%8 = load i32, i32* %2
%9 = urem i32 %8, 1000
%10 = mul i32 %9, 1000000
%11 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
store i32 %10, i32* %11
%12 = call i32 @nanosleep(%struct.timespec* %3, %struct.timespec* %4)
ret i32 %12
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
define i32 @msleep(i32 %0) {
%2 = alloca %struct.timespec
%3 = alloca %struct.timespec
%4 = bitcast %struct.timespec* %2 to i8*
%5 = bitcast %struct.timespec* %3 to i8*
%6 = udiv i32 %0, 1000
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 0
store i32 %6, i32* %7
%8 = urem i32 %0, 1000
%9 = mul nuw nsw i32 %8, 1000000
%10 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 1
store i32 %9, i32* %10
%11 = call i32 @nanosleep(%struct.timespec* %2, %struct.timespec* %3)
ret i32 %11
}
/* Variables and functions */
size_t prv_getBase64Size(size_t dataLen) {
  size_t result_len;
  result_len = 4 * (dataLen / 3);
  if (dataLen % 3)
    result_len += 4;
  return result_len;
}


x86 assembly (clang, -O0):
<prv_getBase64Size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x3,%ecx
xor    %edx,%edx
div    %rcx
shl    $0x2,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x3,%ecx
xor    %edx,%edx
div    %rcx
cmp    $0x0,%rdx
je     1142 <prv_getBase64Size+0x42>
mov    -0x10(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<prv_getBase64Size>:
movabs $0xaaaaaaaaaaaaaaab,%rcx
aa aa aa
mov    %rdi,%rax
mul    %rcx
add    %rdx,%rdx
and    $0xfffffffffffffffc,%rdx
imul   %rcx,%rdi
lea    0x4(%rdx),%rax
movabs $0x5555555555555556,%rcx
55 55 55
cmp    %rcx,%rdi
cmovb  %rdx,%rax
ret

LLVM IR (-O0):
define i64 @prv_getBase64Size(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = udiv i64 %4, 3
%6 = mul i64 4, %5
store i64 %6, i64* %3
%7 = load i64, i64* %2
%8 = urem i64 %7, 3
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load i64, i64* %3
%12 = add i64 %11, 4
store i64 %12, i64* %3
br label %13
13: ; preds = %10, %1
%14 = load i64, i64* %3
ret i64 %14
}

LLVM IR (-O2):
define i64 @prv_getBase64Size(i64 %0) {
%2 = udiv i64 %0, 3
%3 = shl i64 %2, 2
%4 = urem i64 %0, 3
%5 = icmp eq i64 %4, 0
%6 = add i64 %3, 4
%7 = select i1 %5, i64 %3, i64 %6
ret i64 %7
}
int _cmsQuickFloor(double val) {
  const double _lcms_double2fixmagic = 68719476736.0 * 1.5;
  union {
    double val;
    int halves[2];
  } temp;
  temp.val = val + _lcms_double2fixmagic;
  return temp.halves[0] >> 16;
}


x86 assembly (clang, -O0):
<_cmsQuickFloor>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xee2(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
sar    $0x10,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_cmsQuickFloor>:
addsd  0xef8(%rip),%xmm0
movq   %xmm0,%rax
sar    $0x10,%eax
ret

LLVM IR (-O0):
%union.anon = type { double }
define i32 @_cmsQuickFloor(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca %union.anon
store double %0, double* %2
store double 0x4238000000000000, double* %3
%5 = load double, double* %2
%6 = fadd double %5, 0x4238000000000000
%7 = bitcast %union.anon* %4 to double*
store double %6, double* %7
%8 = bitcast %union.anon* %4 to [2 x i32]*
%9 = getelementptr inbounds [2 x i32], [2 x i32]* %8, i64 0, i64 0
%10 = load i32, i32* %9
%11 = ashr i32 %10, 16
ret i32 %11
}

LLVM IR (-O2):
define i32 @_cmsQuickFloor(double %0) {
%2 = fadd double %0, 0x4238000000000000
%3 = bitcast double %2 to i64
%4 = trunc i64 %3 to i32
%5 = ashr i32 %4, 16
ret i32 %5
}
q(int a[10]) {}


x86 assembly (clang, -O0):
<q>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<q>:
ret

LLVM IR (-O0):
define i32 @q(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @q(i32* nocapture readnone %0) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, double);
void output(int index, double value) {
  if (value != 0)
    printf("%d:%g ", index, value);
}


x86 assembly (clang, -O0):
<output>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    113d <output+0x2d>
jp     113d <output+0x2d>
jmp    1151 <output+0x41>
mov    -0x4(%rbp),%esi
movsd  -0x10(%rbp),%xmm0
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<output>:
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    111c <output+0xc>
jnp    112a <output+0x1a>
mov    %edi,%esi
lea    0xedb(%rip),%rdi
jmp    1030 <printf@plt>
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%d:%g \00"
define void @output(i32 %0, double %1) {
%3 = alloca i32
%4 = alloca double
store i32 %0, i32* %3
store double %1, double* %4
%5 = load double, double* %4
%6 = fcmp une double %5, 0.000000e+00
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i32, i32* %3
%9 = load double, double* %4
%10 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %8, double %9)
br label %11
11: ; preds = %7, %2
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"%d:%g \00"
define void @output(i32 %0, double %1) {
%3 = fcmp une double %1, 0.000000e+00
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %0, double %1)
br label %6
6: ; preds = %4, %2
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ _UARTBaseValid(int);
void UARTDisableSIR(uint32_t ui32Base) {
  ASSERT(_UARTBaseValid(ui32Base));
  (*((volatile uint32_t *)(ui32Base + 0x00000030))) &=
      ~(0x00000002 | 0x00000004);
}


x86 assembly (clang, -O0):
<UARTDisableSIR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x30,%eax
cltq
mov    (%rax),%ecx
and    $0xfffffff9,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTDisableSIR>:
push   %rbx
mov    %edi,%ebx
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
movslq %ebx,%rax
andl   $0xfffffff9,0x30(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @UARTDisableSIR(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_UARTBaseValid(i32 %3)
%5 = call i32 @ASSERT(i32 %4)
%6 = load i32, i32* %2
%7 = add nsw i32 %6, 48
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
%10 = load volatile i32, i32* %9
%11 = and i32 %10, -7
store volatile i32 %11, i32* %9
ret void
}

LLVM IR (-O2):
define void @UARTDisableSIR(i32 %0) {
%2 = tail call i32 @_UARTBaseValid(i32 %0)
%3 = tail call i32 @ASSERT(i32 %2)
%4 = add nsw i32 %0, 48
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, -7
store volatile i32 %8, i32* %6
ret void
}
void NoSoundDrv_CD_Pause(int pauseon) {}


x86 assembly (clang, -O0):
<NoSoundDrv_CD_Pause>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<NoSoundDrv_CD_Pause>:
ret

LLVM IR (-O0):
define void @NoSoundDrv_CD_Pause(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @NoSoundDrv_CD_Pause(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int singleNumber(int *, int);
int main() {
  int nums[] = {1, 3, 5, 1, 5};
  int rv = singleNumber(nums, 5);
  printf("%d\n", rv);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0xed1(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xece(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xecc(%rip),%eax
mov    %eax,-0x10(%rbp)
lea    -0x20(%rbp),%rdi
mov    $0x5,%esi
call   1030 <singleNumber@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%esi
lea    0xeb2(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
mov    0xee6(%rip),%eax
mov    %eax,0x10(%rsp)
movaps 0xecb(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x5,%esi
call   1030 <singleNumber@plt>
lea    0xec7(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.nums = [5 x i32] [i32 1, i32 3, i32 5, i32 1, i32 5]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca [5 x i32]
%2 = alloca i32
%3 = bitcast [5 x i32]* %1 to i8*
%4 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%5 = call i32 @singleNumber(i32* %4, i32 5)
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@__const.main.nums = [5 x i32] [i32 1, i32 3, i32 5, i32 1, i32 5]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca [5 x i32]
%2 = bitcast [5 x i32]* %1 to i8*
%3 = getelementptr inbounds [5 x i32], [5 x i32]* %1, i64 0, i64 0
%4 = call i32 @singleNumber(i32* %3, i32 5)
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ print_float();
int /*<<< orphan*/ print_float2();
int /*<<< orphan*/ printf(char *, int);
int main() {
  int x;
  x = 12 & 10;
  printf("%d\n", x);
  x = 12 | 10;
  printf("%d\n", x);
  x = 12 ^ 10;
  printf("%d\n", x);
  x = (12 ^ -1) + 1;
  printf("%d\n", x);
  print_float();
  print_float2();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x8,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xeb7(%rip),%rdi
call   1030 <printf@plt>
movl   $0xe,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xea1(%rip),%rdi
call   1030 <printf@plt>
movl   $0x6,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xe8b(%rip),%rdi
call   1030 <printf@plt>
movl   $0xfffffff4,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xe75(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1050 <print_float@plt>
mov    $0x0,%al
call   1040 <print_float2@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xec8(%rip),%rbx
mov    %rbx,%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0xe,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x6,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0xfffffff4,%esi
call   1030 <printf@plt>
xor    %eax,%eax
call   1050 <print_float@plt>
xor    %eax,%eax
call   1040 <print_float2@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 8, i32* %1
%2 = load i32, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
store i32 14, i32* %1
%4 = load i32, i32* %1
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
store i32 6, i32* %1
%6 = load i32, i32* %1
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
store i32 -12, i32* %1
%8 = load i32, i32* %1
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %8)
%10 = call i32 (...) @print_float()
%11 = call i32 (...) @print_float2()
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 8)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 14)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 6)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 -12)
%5 = tail call i32 (...) @print_float()
%6 = tail call i32 (...) @print_float2()
ret i32 0
}