xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ lookNarray(char *, unsigned int);
void lookcomplex4array_(void *x, unsigned int *n) {
  lookNarray((char *)x, (*n * 4));
}


x86 assembly (clang, -O0):
<lookcomplex4array_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
shl    $0x2,%esi
call   1030 <lookNarray@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lookcomplex4array_>:
mov    (%rsi),%esi
shl    $0x2,%esi
jmp    1030 <lookNarray@plt>

LLVM IR (-O0):
define void @lookcomplex4array_(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i32*, i32** %4
%7 = load i32, i32* %6
%8 = mul i32 %7, 4
%9 = call i32 @lookNarray(i8* %5, i32 %8)
ret void
}

LLVM IR (-O2):
define void @lookcomplex4array_(i8* %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = shl i32 %3, 2
%5 = tail call i32 @lookNarray(i8* %0, i32 %4)
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int swap_symbols_for_quaddobl_Laurent_witness_set(int nvr, int dim) {
  int fail;
  double *c;
  fail = _ada_use_c2phc4c(821, &nvr, &dim, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<swap_symbols_for_quaddobl_Laurent_witness_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x18(%rbp),%rcx
mov    $0x335,%edi
lea    -0x4(%rbp),%rsi
lea    -0x8(%rbp),%rdx
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_symbols_for_quaddobl_Laurent_witness_set>:
push   %rax
mov    %edi,0x4(%rsp)
mov    %esi,(%rsp)
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
mov    $0x335,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @swap_symbols_for_quaddobl_Laurent_witness_set(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca double*
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load double*, double** %6
%8 = call i32 @_ada_use_c2phc4c(i32 821, i32* %3, i32* %4, double* %7, i32 0)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @swap_symbols_for_quaddobl_Laurent_witness_set(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @_ada_use_c2phc4c(i32 821, i32* %3, i32* %4, double* undef, i32 0)
ret i32 %5
}
float smnormfv(float sample_rate, float f) { return f / sample_rate; }


x86 assembly (clang, -O0):
<smnormfv>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
divss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<smnormfv>:
divss  %xmm0,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @smnormfv(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %4
%6 = load float, float* %3
%7 = fdiv float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @smnormfv(float %0, float %1) {
%3 = fdiv float %1, %0
ret float %3
}
int DOM_KeyEvent_checkModifier(unsigned long modifier) { return 0; }


x86 assembly (clang, -O0):
<DOM_KeyEvent_checkModifier>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DOM_KeyEvent_checkModifier>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @DOM_KeyEvent_checkModifier(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @DOM_KeyEvent_checkModifier(i64 %0) {
ret i32 0
}
void _unlock(unsigned int *lock) { __sync_bool_compare_and_swap(lock, 1, 0); }


x86 assembly (clang, -O0):
<_unlock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x1,%eax
xor    %edx,%edx
lock cmpxchg %edx,(%rcx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_unlock>:
xor    %ecx,%ecx
mov    $0x1,%eax
lock cmpxchg %ecx,(%rdi)
ret

LLVM IR (-O0):
define void @_unlock(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = cmpxchg i32* %3, i32 1, i32 0 seq_cst seq_cst
%5 = extractvalue { i32, i1 } %4, 1
ret void
}

LLVM IR (-O2):
define void @_unlock(i32* nocapture %0) {
%2 = cmpxchg i32* %0, i32 1, i32 0 seq_cst seq_cst
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int main(void) {
  const double SCALE = 0.333;
  double shoe, foot;
  shoe = 9.0;
  foot = SCALE * shoe + 7.31;
  printf("Shoe size (men's)    foot length\n");
  printf("%10.1f %15.2f inches\n", shoe, foot);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movsd  0xed9(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xedc(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  0xeba(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeb6(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
lea    0xeb6(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
movsd  -0x18(%rbp),%xmm0
movsd  -0x20(%rbp),%xmm1
lea    0xec0(%rip),%rdi
mov    $0x2,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xefe(%rip),%rdi
call   1030 <puts@plt>
lea    0xedc(%rip),%rdi
movsd  0xec4(%rip),%xmm0
movsd  0xec4(%rip),%xmm1
mov    $0x2,%al
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [34 x i8] c"Shoe size (men's) foot length\0A\00"
@.str.1 = [22 x i8] c"%10.1f %15.2f inches\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca double
%4 = alloca double
store i32 0, i32* %1
store double 3.330000e-01, double* %2
store double 9.000000e+00, double* %3
%5 = load double, double* %3
%6 = call double @llvm.fmuladd.f64(double 3.330000e-01, double %5, double 7.310000e+00)
store double %6, double* %4
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%8 = load double, double* %3
%9 = load double, double* %4
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), double %8, double %9)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [22 x i8] c"%10.1f %15.2f inches\0A\00"
@str = [33 x i8] c"Shoe size (men's) foot length\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), double 9.000000e+00, double 1.030700e+01)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *fgets(char *, int, int /*<<< orphan*/ *);
int strlen(char *);
int Read_String(FILE *f, char *str) {
  int l;
  if (fgets(str, 1024, f) == NULL)
    return -1;
  l = strlen(str) - 1;
  str[l] = '\0';
  return l;
}


x86 assembly (clang, -O0):
<Read_String>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    $0x400,%esi
call   1040 <fgets@plt>
cmp    $0x0,%rax
jne    1158 <Read_String+0x38>
movl   $0xffffffff,-0x4(%rbp)
jmp    1179 <Read_String+0x59>
mov    -0x18(%rbp),%rdi
call   1030 <strlen@plt>
sub    $0x1,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Read_String>:
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%rdx
mov    %rsi,%rdi
mov    $0x400,%esi
call   1040 <fgets@plt>
test   %rax,%rax
je     114e <Read_String+0x2e>
mov    %rbx,%rdi
call   1030 <strlen@plt>
cltq
movb   $0x0,-0x1(%rbx,%rax,1)
add    $0xffffffffffffffff,%rax
pop    %rbx
ret
mov    $0xffffffff,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @Read_String(i32* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %5
%8 = load i32*, i32** %4
%9 = call i32* @fgets(i8* %7, i32 1024, i32* %8)
%10 = icmp eq i32* %9, null
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 -1, i32* %3
br label %21
12: ; preds = %2
%13 = load i8*, i8** %5
%14 = call i32 @strlen(i8* %13)
%15 = sub nsw i32 %14, 1
store i32 %15, i32* %6
%16 = load i8*, i8** %5
%17 = load i32, i32* %6
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
store i8 0, i8* %19
%20 = load i32, i32* %6
store i32 %20, i32* %3
br label %21
21: ; preds = %12, %11
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @Read_String(i32* nocapture %0, i8* %1) {
%3 = tail call i32* @fgets(i8* %1, i32 1024, i32* %0)
%4 = icmp eq i32* %3, null
br i1 %4, label %10, label %5
5: ; preds = %2
%6 = tail call i32 @strlen(i8* %1)
%7 = add nsw i32 %6, -1
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %1, i64 %8
store i8 0, i8* %9
br label %10
10: ; preds = %2, %5
%11 = phi i32 [ %7, %5 ], [ -1, %2 ]
ret i32 %11
}
/* Type definitions */
struct typ {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ definition_const(struct typ const *);
size_t node_fun_min_args_count(int /*<<< orphan*/);
int /*<<< orphan*/ typ_is_function(struct typ const *);
size_t typ_function_min_arity(const struct typ *t) {
  assert(typ_is_function(t));
  return node_fun_min_args_count(definition_const(t));
}


x86 assembly (clang, -O0):
<typ_function_min_arity>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <typ_is_function@plt>
mov    %eax,%edi
call   1050 <assert@plt>
mov    -0x8(%rbp),%rdi
call   1060 <definition_const@plt>
mov    %eax,%edi
call   1030 <node_fun_min_args_count@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<typ_function_min_arity>:
push   %rbx
mov    %rdi,%rbx
call   1040 <typ_is_function@plt>
mov    %eax,%edi
call   1050 <assert@plt>
mov    %rbx,%rdi
call   1060 <definition_const@plt>
mov    %eax,%edi
pop    %rbx
jmp    1030 <node_fun_min_args_count@plt>

LLVM IR (-O0):
%struct.typ = type { i32 }
define i64 @typ_function_min_arity(%struct.typ* %0) {
%2 = alloca %struct.typ*
store %struct.typ* %0, %struct.typ** %2
%3 = load %struct.typ*, %struct.typ** %2
%4 = call i32 @typ_is_function(%struct.typ* %3)
%5 = call i32 @assert(i32 %4)
%6 = load %struct.typ*, %struct.typ** %2
%7 = call i32 @definition_const(%struct.typ* %6)
%8 = call i64 @node_fun_min_args_count(i32 %7)
ret i64 %8
}

LLVM IR (-O2):
%struct.typ = type { i32 }
define i64 @typ_function_min_arity(%struct.typ* %0) {
%2 = tail call i32 @typ_is_function(%struct.typ* %0)
%3 = tail call i32 @assert(i32 %2)
%4 = tail call i32 @definition_const(%struct.typ* %0)
%5 = tail call i64 @node_fun_min_args_count(i32 %4)
ret i64 %5
}
int switch_eg(int x, int n) {
  int result = x;
  switch (n) {
  case 100:
    result += 13;
    break;
  case 102:
    result += 10;
  case 103:
    result += 11;
    break;
  case 104:
  case 106:
    result *= result;
    break;
  default:
    result = 0;
  }
  return result;
}


x86 assembly (clang, -O0):
<switch_eg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffff9c,%eax
mov    %eax,%ecx
mov    %rcx,-0x18(%rbp)
sub    $0x6,%eax
ja     116d <switch_eg+0x6d>
mov    -0x18(%rbp),%rax
lea    0xed0(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0xc(%rbp),%eax
add    $0xd,%eax
mov    %eax,-0xc(%rbp)
jmp    1174 <switch_eg+0x74>
mov    -0xc(%rbp),%eax
add    $0xa,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0xb,%eax
mov    %eax,-0xc(%rbp)
jmp    1174 <switch_eg+0x74>
mov    -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1174 <switch_eg+0x74>
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<switch_eg>:
xor    %eax,%eax
add    $0xffffff9c,%esi
cmp    $0x6,%esi
ja     112c <switch_eg+0x2c>
lea    0xeef(%rip),%rcx
movslq (%rcx,%rsi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
imul   %edi,%edi
jmp    112a <switch_eg+0x2a>
add    $0xd,%edi
jmp    112a <switch_eg+0x2a>
add    $0xa,%edi
add    $0xb,%edi
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @switch_eg(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
store i32 %6, i32* %5
%7 = load i32, i32* %4
switch i32 %7, label %21 [
i32 100, label %8
i32 102, label %11
i32 103, label %14
i32 104, label %17
i32 106, label %17
]
8: ; preds = %2
%9 = load i32, i32* %5
%10 = add nsw i32 %9, 13
store i32 %10, i32* %5
br label %22
11: ; preds = %2
%12 = load i32, i32* %5
%13 = add nsw i32 %12, 10
store i32 %13, i32* %5
br label %14
14: ; preds = %2, %11
%15 = load i32, i32* %5
%16 = add nsw i32 %15, 11
store i32 %16, i32* %5
br label %22
17: ; preds = %2, %2
%18 = load i32, i32* %5
%19 = load i32, i32* %5
%20 = mul nsw i32 %19, %18
store i32 %20, i32* %5
br label %22
21: ; preds = %2
store i32 0, i32* %5
br label %22
22: ; preds = %21, %17, %14, %8
%23 = load i32, i32* %5
ret i32 %23
}

LLVM IR (-O2):
define i32 @switch_eg(i32 %0, i32 %1) {
switch i32 %1, label %12 [
i32 100, label %3
i32 102, label %5
i32 103, label %7
i32 104, label %10
i32 106, label %10
]
3: ; preds = %2
%4 = add nsw i32 %0, 13
br label %12
5: ; preds = %2
%6 = add nsw i32 %0, 10
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ %0, %2 ], [ %6, %5 ]
%9 = add nsw i32 %8, 11
br label %12
10: ; preds = %2, %2
%11 = mul nsw i32 %0, %0
br label %12
12: ; preds = %2, %10, %7, %3
%13 = phi i32 [ %11, %10 ], [ %9, %7 ], [ %4, %3 ], [ 0, %2 ]
ret i32 %13
}
/* Type definitions */
struct timeval {
  scalar_t__ tv_sec;
  scalar_t__ tv_usec;
};

/* Variables and functions */
bool is_timeval_initialized(struct timeval *time) {
  if (time->tv_sec == 0 && time->tv_usec == 0) {
    return true;
  } else {
    return false;
  }
}


x86 assembly (clang, -O0):
<is_timeval_initialized>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
jne    1131 <is_timeval_initialized+0x31>
mov    -0x10(%rbp),%rax
cmpq   $0x0,0x8(%rax)
jne    1131 <is_timeval_initialized+0x31>
movl   $0x1,-0x4(%rbp)
jmp    1138 <is_timeval_initialized+0x38>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_timeval_initialized>:
cmpq   $0x0,(%rdi)
jne    110d <is_timeval_initialized+0xd>
cmpq   $0x0,0x8(%rdi)
je     1110 <is_timeval_initialized+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.timeval = type { i64, i64 }
define i32 @is_timeval_initialized(%struct.timeval* %0) {
%2 = alloca i32
%3 = alloca %struct.timeval*
store %struct.timeval* %0, %struct.timeval** %3
%4 = load %struct.timeval*, %struct.timeval** %3
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %1
%9 = load %struct.timeval*, %struct.timeval** %3
%10 = getelementptr inbounds %struct.timeval, %struct.timeval* %9, i32 0, i32 1
%11 = load i64, i64* %10
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %8
store i32 1, i32* %2
br label %15
14: ; preds = %8, %1
store i32 0, i32* %2
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
%struct.timeval = type { i64, i64 }
define i32 @is_timeval_initialized(%struct.timeval* nocapture %0) {
%2 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
%3 = load i64, i64* %2
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
%7 = load i64, i64* %6
%8 = icmp eq i64 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %5, %1
br label %10
10: ; preds = %5, %9
%11 = phi i32 [ 0, %9 ], [ 1, %5 ]
ret i32 %11
}
void XDirectionalDependentDrawing() {}


x86 assembly (clang, -O0):
<XDirectionalDependentDrawing>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XDirectionalDependentDrawing>:
ret

LLVM IR (-O0):
define void @XDirectionalDependentDrawing() {
ret void
}

LLVM IR (-O2):
define void @XDirectionalDependentDrawing() {
ret void
}
/* Variables and functions */
int cfg_processor_get_addr(char *, char *);
int cfg_timer_a_get_int_a1_addr(void) {
  return cfg_processor_get_addr("timera", "inta1");
}


x86 assembly (clang, -O0):
<cfg_timer_a_get_int_a1_addr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee5(%rip),%rsi
call   1030 <cfg_processor_get_addr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfg_timer_a_get_int_a1_addr>:
lea    0xee9(%rip),%rdi
lea    0xee9(%rip),%rsi
jmp    1030 <cfg_processor_get_addr@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"timera\00"
@.str.1 = [6 x i8] c"inta1\00"
define i32 @cfg_timer_a_get_int_a1_addr() {
%1 = call i32 @cfg_processor_get_addr(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [7 x i8] c"timera\00"
@.str.1 = [6 x i8] c"inta1\00"
define i32 @cfg_timer_a_get_int_a1_addr() {
%1 = tail call i32 @cfg_processor_get_addr(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret i32 %1
}
/* Variables and functions */
unsigned int IFF_RUNNING;
signed char if_flags_RUNNING(unsigned int flags) { return flags & IFF_RUNNING; }


x86 assembly (clang, -O0):
<if_flags_RUNNING>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ed7(%rip),%rcx
and    (%rcx),%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<if_flags_RUNNING>:
mov    %edi,%eax
mov    0x2edf(%rip),%rcx
and    (%rcx),%eax
ret

LLVM IR (-O0):
@IFF_RUNNING = global i32 0
define signext i8 @if_flags_RUNNING(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @IFF_RUNNING
%5 = and i32 %3, %4
%6 = trunc i32 %5 to i8
ret i8 %6
}

LLVM IR (-O2):
@IFF_RUNNING = global i32 0
define signext i8 @if_flags_RUNNING(i32 %0) {
%2 = load i32, i32* @IFF_RUNNING
%3 = and i32 %2, %0
%4 = trunc i32 %3 to i8
ret i8 %4
}
int test_int_2(int a, int b) { return 30; }


x86 assembly (clang, -O0):
<test_int_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x1e,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_int_2>:
mov    $0x1e,%eax
ret

LLVM IR (-O0):
define i32 @test_int_2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 30
}

LLVM IR (-O2):
define i32 @test_int_2(i32 %0, i32 %1) {
ret i32 30
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Simplest test program.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [24 x i8] c"Simplest test program.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [23 x i8] c"Simplest test program.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
ret i32 0
}
void APPS_ADC_SAR_RestoreConfig(void) {}


x86 assembly (clang, -O0):
<APPS_ADC_SAR_RestoreConfig>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<APPS_ADC_SAR_RestoreConfig>:
ret

LLVM IR (-O0):
define void @APPS_ADC_SAR_RestoreConfig() {
ret void
}

LLVM IR (-O2):
define void @APPS_ADC_SAR_RestoreConfig() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cloud_agent_command();
int /*<<< orphan*/ simple();
int main() {
  simple();
  cloud_agent_command();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <simple@plt>
mov    $0x0,%al
call   1040 <cloud_agent_command@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <simple@plt>
xor    %eax,%eax
call   1040 <cloud_agent_command@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @simple()
%3 = call i32 (...) @cloud_agent_command()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @simple()
%2 = tail call i32 (...) @cloud_agent_command()
ret i32 0
}
__attribute__((no, noclone)) int f5(unsigned char x, unsigned char y) {
  int a = x;
  int b = y;
  int c = a + b;
  return c & 0x2ff;
}


x86 assembly (clang, -O0):
<f5>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x1(%rbp),%eax
mov    %eax,-0x8(%rbp)
movzbl -0x2(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    $0x2ff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f5>:
add    %esi,%edi
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @f5(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
store i32 %9, i32* %5
%10 = load i8, i8* %4
%11 = zext i8 %10 to i32
store i32 %11, i32* %6
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = add nsw i32 %12, %13
store i32 %14, i32* %7
%15 = load i32, i32* %7
%16 = and i32 %15, 767
ret i32 %16
}

LLVM IR (-O2):
define i32 @f5(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = zext i8 %1 to i32
%5 = add nuw nsw i32 %4, %3
%6 = and i32 %5, 255
ret i32 %6
}
void NoSoundDrv_MIDI_SetTempo(int tempo, int division) {}


x86 assembly (clang, -O0):
<NoSoundDrv_MIDI_SetTempo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<NoSoundDrv_MIDI_SetTempo>:
ret

LLVM IR (-O0):
define void @NoSoundDrv_MIDI_SetTempo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @NoSoundDrv_MIDI_SetTempo(i32 %0, i32 %1) {
ret void
}
void *memcpy(void *d_vp, void *s_vp, unsigned long n) {
  unsigned i;
  char *d = d_vp, *s = s_vp;
  for (i = 0; i < n; ++i)
    d[i] = s[i];
  return d_vp;
}


x86 assembly (clang, -O0):
<memcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x18(%rbp),%rax
jae    1156 <memcpy+0x56>
mov    -0x30(%rbp),%rax
mov    -0x1c(%rbp),%ecx
mov    (%rax,%rcx,1),%dl
mov    -0x28(%rbp),%rax
mov    -0x1c(%rbp),%ecx
mov    %dl,(%rax,%rcx,1)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1127 <memcpy+0x27>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcpy>:
mov    %rdi,%rax
test   %rdx,%rdx
je     111f <memcpy+0x1f>
xor    %edi,%edi
nopw   0x0(%rax,%rax,1)
movzbl (%rsi,%rdi,1),%ecx
mov    %cl,(%rax,%rdi,1)
add    $0x1,%edi
cmp    %rdx,%rdi
jb     1110 <memcpy+0x10>
ret

LLVM IR (-O0):
define i8* @memcpy(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%10 = load i8*, i8** %4
store i8* %10, i8** %8
%11 = load i8*, i8** %5
store i8* %11, i8** %9
store i32 0, i32* %7
br label %12
12: ; preds = %27, %3
%13 = load i32, i32* %7
%14 = zext i32 %13 to i64
%15 = load i64, i64* %6
%16 = icmp ult i64 %14, %15
br i1 %16, label %17, label %30
17: ; preds = %12
%18 = load i8*, i8** %9
%19 = load i32, i32* %7
%20 = zext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
%22 = load i8, i8* %21
%23 = load i8*, i8** %8
%24 = load i32, i32* %7
%25 = zext i32 %24 to i64
%26 = getelementptr inbounds i8, i8* %23, i64 %25
store i8 %22, i8* %26
br label %27
27: ; preds = %17
%28 = load i32, i32* %7
%29 = add i32 %28, 1
store i32 %29, i32* %7
br label %12
30: ; preds = %12
%31 = load i8*, i8** %4
ret i8* %31
}

LLVM IR (-O2):
define i8* @memcpy(i8* returned writeonly %0, i8* nocapture %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %13, label %5
5: ; preds = %3, %5
%6 = phi i64 [ %11, %5 ], [ 0, %3 ]
%7 = getelementptr inbounds i8, i8* %1, i64 %6
%8 = load i8, i8* %7
%9 = getelementptr inbounds i8, i8* %0, i64 %6
store i8 %8, i8* %9
%10 = add nuw nsw i64 %6, 1
%11 = and i64 %10, 4294967295
%12 = icmp ult i64 %11, %2
br i1 %12, label %5, label %13
13: ; preds = %5, %3
ret i8* %0
}
void push_ItCtx(void) {}


x86 assembly (clang, -O0):
<push_ItCtx>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<push_ItCtx>:
ret

LLVM IR (-O0):
define void @push_ItCtx() {
ret void
}

LLVM IR (-O2):
define void @push_ItCtx() {
ret void
}
/* Type definitions */
struct gengetopt_args_info {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ clear_args(struct gengetopt_args_info *);
int /*<<< orphan*/ clear_given(struct gengetopt_args_info *);
int /*<<< orphan*/ init_args_info(struct gengetopt_args_info *);
void cmdline_parser_init(struct gengetopt_args_info *args_info) {
  clear_given(args_info);
  clear_args(args_info);
  init_args_info(args_info);
}


x86 assembly (clang, -O0):
<cmdline_parser_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <clear_given@plt>
mov    -0x8(%rbp),%rdi
call   1030 <clear_args@plt>
mov    -0x8(%rbp),%rdi
call   1050 <init_args_info@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmdline_parser_init>:
push   %rbx
mov    %rdi,%rbx
call   1040 <clear_given@plt>
mov    %rbx,%rdi
call   1030 <clear_args@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1050 <init_args_info@plt>

LLVM IR (-O0):
%struct.gengetopt_args_info = type { i32 }
define void @cmdline_parser_init(%struct.gengetopt_args_info* %0) {
%2 = alloca %struct.gengetopt_args_info*
store %struct.gengetopt_args_info* %0, %struct.gengetopt_args_info** %2
%3 = load %struct.gengetopt_args_info*, %struct.gengetopt_args_info** %2
%4 = call i32 @clear_given(%struct.gengetopt_args_info* %3)
%5 = load %struct.gengetopt_args_info*, %struct.gengetopt_args_info** %2
%6 = call i32 @clear_args(%struct.gengetopt_args_info* %5)
%7 = load %struct.gengetopt_args_info*, %struct.gengetopt_args_info** %2
%8 = call i32 @init_args_info(%struct.gengetopt_args_info* %7)
ret void
}

LLVM IR (-O2):
%struct.gengetopt_args_info = type { i32 }
define void @cmdline_parser_init(%struct.gengetopt_args_info* %0) {
%2 = tail call i32 @clear_given(%struct.gengetopt_args_info* %0)
%3 = tail call i32 @clear_args(%struct.gengetopt_args_info* %0)
%4 = tail call i32 @init_args_info(%struct.gengetopt_args_info* %0)
ret void
}
/* Variables and functions */
long double __infer_nondet_long_double();
long double sqrtl(long double x) { return __infer_nondet_long_double(); }


x86 assembly (clang, -O0):
<sqrtl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
xor    %eax,%eax
call   1030 <__infer_nondet_long_double@plt>
fld    %st(0)
fstp   %st(0)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqrtl>:
xor    %eax,%eax
jmp    1030 <__infer_nondet_long_double@plt>

LLVM IR (-O0):
define x86_fp80 @sqrtl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = call x86_fp80 (...) @__infer_nondet_long_double()
ret x86_fp80 %3
}

LLVM IR (-O2):
define x86_fp80 @sqrtl(x86_fp80 %0) {
%2 = tail call x86_fp80 (...) @__infer_nondet_long_double()
ret x86_fp80 %2
}
/* Type definitions */
typedef char *uint16_t;

/* Variables and functions */
uint16_t get_cs(void) {
  uint16_t result;
  asm volatile("movw %%"
               "cs"
               ", %0"
               : "=m"(result));
  return result;
}


x86 assembly (clang, -O0):
<get_cs>:
push   %rbp
mov    %rsp,%rbp
mov    %cs,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_cs>:
mov    %cs,-0x8(%rsp)
mov    -0x8(%rsp),%rax
ret

LLVM IR (-O0):
define i8* @get_cs() {
%1 = alloca i8*
%2 = load i8*, i8** %1
ret i8* %2
}

LLVM IR (-O2):
define i8* @get_cs() {
%1 = alloca i8*
%2 = bitcast i8** %1 to i8*
%3 = load i8*, i8** %1
ret i8* %3
}
void fc58(int n) {
  {
    typedef int(*b)[n];
    {
      typedef int(*c)[n];
      0;
    }
    goto a;
    {
      typedef int(*d)[n];
      0;
    };
    typedef int(*e)[n];
    0;
  };
a : {
  typedef int(*f)[n];
  {
    typedef int(*g)[n];
    0;
  };
  {
    typedef int(*h)[n];
    0;
  };
  ;
  typedef int(*i)[n];
  0;
};
  ;
  typedef int(*j)[n];
  0;
}


x86 assembly (clang, -O0):
<fc58>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc58>:
ret

LLVM IR (-O0):
define void @fc58(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
br label %12
7: ; No predecessors!
%8 = load i32, i32* %2
%9 = zext i32 %8 to i64
%10 = load i32, i32* %2
%11 = zext i32 %10 to i64
br label %12
12: ; preds = %7, %1
%13 = load i32, i32* %2
%14 = zext i32 %13 to i64
%15 = load i32, i32* %2
%16 = zext i32 %15 to i64
%17 = load i32, i32* %2
%18 = zext i32 %17 to i64
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
%21 = load i32, i32* %2
%22 = zext i32 %21 to i64
ret void
}

LLVM IR (-O2):
define void @fc58(i32 %0) {
ret void
}
int fun(char *a) {
  if (!*a)
    return 0;
  return fun(a + 1) + 1;
}


x86 assembly (clang, -O0):
<fun>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
jne    1135 <fun+0x25>
movl   $0x0,-0x4(%rbp)
jmp    1148 <fun+0x38>
mov    -0x10(%rbp),%rdi
add    $0x1,%rdi
call   1030 <fun@plt>
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun>:
cmpb   $0x0,(%rdi)
je     111c <fun+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <fun+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fun(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 0, i32* %2
br label %13
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = call i32 @fun(i8* %10)
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %13
13: ; preds = %8, %7
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @fun(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %7, %4 ], [ %0, %1 ]
%6 = phi i32 [ %8, %4 ], [ 0, %1 ]
%7 = getelementptr inbounds i8, i8* %5, i64 1
%8 = add nuw nsw i32 %6, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %12
}
gnargs(d) int d;
{
  ot("mov.l\t&");
  onum(d);
  outstr(",%d3\n");
}


x86 assembly (clang, -O0):
<gnargs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
lea    0xebe(%rip),%rdi
mov    $0x0,%al
call   1050 <ot@plt>
mov    -0x8(%rbp),%edi
mov    $0x0,%al
call   1040 <onum@plt>
lea    0xeae(%rip),%rdi
mov    $0x0,%al
call   1030 <outstr@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gnargs>:
push   %rbx
mov    %edi,%ebx
lea    0xec6(%rip),%rdi
xor    %eax,%eax
call   1050 <ot@plt>
mov    %ebx,%edi
xor    %eax,%eax
call   1040 <onum@plt>
lea    0xeb7(%rip),%rdi
xor    %eax,%eax
pop    %rbx
jmp    1030 <outstr@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"mov.l\09&\00"
@.str.1 = [6 x i8] c",%d3\0A\00"
define i32 @gnargs(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 (i8*, ...) bitcast (i32 (...)* @ot to i32 (i8*, ...)*)(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* %3
%6 = call i32 (i32, ...) bitcast (i32 (...)* @onum to i32 (i32, ...)*)(i32 %5)
%7 = call i32 (i8*, ...) bitcast (i32 (...)* @outstr to i32 (i8*, ...)*)(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
@.str = [8 x i8] c"mov.l\09&\00"
@.str.1 = [6 x i8] c",%d3\0A\00"
define i32 @gnargs(i32 %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @ot to i32 (i8*, ...)*)(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @onum to i32 (i32, ...)*)(i32 %0)
%4 = tail call i32 (i8*, ...) bitcast (i32 (...)* @outstr to i32 (i8*, ...)*)(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
void *malloc(size_t);
void *lfs2_malloc(size_t size) { return malloc(size); }


x86 assembly (clang, -O0):
<lfs2_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lfs2_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @lfs2_malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @lfs2_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
int multiply(int a, int b) {
  int t = 0;
  for (; a > 0; a--) {
    t += b;
  }
  return t;
}


x86 assembly (clang, -O0):
<multiply>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1132 <multiply+0x32>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    1111 <multiply+0x11>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<multiply>:
imul   %edi,%esi
xor    %eax,%eax
test   %edi,%edi
cmovg  %esi,%eax
ret

LLVM IR (-O0):
define i32 @multiply(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %13, %2
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %16
9: ; preds = %6
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = add nsw i32 %11, %10
store i32 %12, i32* %5
br label %13
13: ; preds = %9
%14 = load i32, i32* %3
%15 = add nsw i32 %14, -1
store i32 %15, i32* %3
br label %6
16: ; preds = %6
%17 = load i32, i32* %5
ret i32 %17
}

LLVM IR (-O2):
define i32 @multiply(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, 0
%4 = mul i32 %1, %0
%5 = select i1 %3, i32 %4, i32 0
ret i32 %5
}
/* Variables and functions */
scalar_t__ islower(char);
char toupper(char);
void strupper(char *buf) {
  while (*buf) {
    if (islower(*buf))
      *buf = toupper(*buf);
    buf++;
  }
}


x86 assembly (clang, -O0):
<strupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1174 <strupper+0x54>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
je     1163 <strupper+0x43>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1040 <toupper@plt>
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    112c <strupper+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strupper>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1155 <strupper+0x35>
mov    %rdi,%rbx
jmp    113c <strupper+0x1c>
nopl   0x0(%rax)
movzbl 0x1(%rbx),%eax
add    $0x1,%rbx
test   %al,%al
je     1155 <strupper+0x35>
movsbl %al,%edi
call   1030 <islower@plt>
test   %rax,%rax
je     1130 <strupper+0x10>
movsbl (%rbx),%edi
call   1040 <toupper@plt>
mov    %al,(%rbx)
jmp    1130 <strupper+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @strupper(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %17, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %20
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = call i64 @islower(i8 signext %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %17
12: ; preds = %7
%13 = load i8*, i8** %2
%14 = load i8, i8* %13
%15 = call signext i8 @toupper(i8 signext %14)
%16 = load i8*, i8** %2
store i8 %15, i8* %16
br label %17
17: ; preds = %12, %7
%18 = load i8*, i8** %2
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %2
br label %3
20: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @strupper(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %12
%5 = phi i8 [ %14, %12 ], [ %2, %1 ]
%6 = phi i8* [ %13, %12 ], [ %0, %1 ]
%7 = tail call i64 @islower(i8 signext %5)
%8 = icmp eq i64 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %4
%10 = load i8, i8* %6
%11 = tail call signext i8 @toupper(i8 signext %10)
store i8 %11, i8* %6
br label %12
12: ; preds = %9, %4
%13 = getelementptr inbounds i8, i8* %6, i64 1
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %4
16: ; preds = %12, %1
ret void
}
/* Variables and functions */
scalar_t__ input_joystick_available();
char const *lang_get(char *);
const char *f_input_fire7() {
  return lang_get(input_joystick_available() ? "INPUT_JOY_FIRE7"
                                             : "INPUT_KEYB_FIRE7");
}


x86 assembly (clang, -O0):
<f_input_fire7>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <input_joystick_available@plt>
mov    %rax,%rcx
lea    0xedb(%rip),%rdi
lea    0xec4(%rip),%rax
cmp    $0x0,%rcx
cmovne %rax,%rdi
call   1030 <lang_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_input_fire7>:
push   %rax
xor    %eax,%eax
call   1040 <input_joystick_available@plt>
test   %rax,%rax
lea    0xede(%rip),%rax
lea    0xec7(%rip),%rdi
cmove  %rax,%rdi
pop    %rax
jmp    1030 <lang_get@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"INPUT_JOY_FIRE7\00"
@.str.1 = [17 x i8] c"INPUT_KEYB_FIRE7\00"
define i8* @f_input_fire7() {
%1 = call i64 (...) @input_joystick_available()
%2 = icmp ne i64 %1, 0
%3 = zext i1 %2 to i64
%4 = select i1 %2, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0)
%5 = call i8* @lang_get(i8* %4)
ret i8* %5
}

LLVM IR (-O2):
@.str = [16 x i8] c"INPUT_JOY_FIRE7\00"
@.str.1 = [17 x i8] c"INPUT_KEYB_FIRE7\00"
define i8* @f_input_fire7() {
%1 = tail call i64 (...) @input_joystick_available()
%2 = icmp eq i64 %1, 0
%3 = select i1 %2, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0)
%4 = tail call i8* @lang_get(i8* %3)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ delay_ms(int);
int /*<<< orphan*/ mcu_init();
int /*<<< orphan*/ motor_control(int);
void main() {
  mcu_init();
  while (1) {
    motor_control(1);
    delay_ms(500);
    motor_control(4);
    delay_ms(100);
    motor_control(1);
    delay_ms(500);
    motor_control(3);
    delay_ms(100);
    motor_control(2);
    delay_ms(500);
    motor_control(5);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <mcu_init@plt>
mov    $0x1,%edi
call   1040 <motor_control@plt>
mov    $0x1f4,%edi
call   1050 <delay_ms@plt>
mov    $0x4,%edi
call   1040 <motor_control@plt>
mov    $0x64,%edi
call   1050 <delay_ms@plt>
mov    $0x1,%edi
call   1040 <motor_control@plt>
mov    $0x1f4,%edi
call   1050 <delay_ms@plt>
mov    $0x3,%edi
call   1040 <motor_control@plt>
mov    $0x64,%edi
call   1050 <delay_ms@plt>
mov    $0x2,%edi
call   1040 <motor_control@plt>
mov    $0x1f4,%edi
call   1050 <delay_ms@plt>
mov    $0x5,%edi
call   1040 <motor_control@plt>
jmp    113b <main+0xb>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <mcu_init@plt>
nopl   0x0(%rax,%rax,1)
mov    $0x1,%edi
call   1040 <motor_control@plt>
mov    $0x1f4,%edi
call   1050 <delay_ms@plt>
mov    $0x4,%edi
call   1040 <motor_control@plt>
mov    $0x64,%edi
call   1050 <delay_ms@plt>
mov    $0x1,%edi
call   1040 <motor_control@plt>
mov    $0x1f4,%edi
call   1050 <delay_ms@plt>
mov    $0x3,%edi
call   1040 <motor_control@plt>
mov    $0x64,%edi
call   1050 <delay_ms@plt>
mov    $0x2,%edi
call   1040 <motor_control@plt>
mov    $0x1f4,%edi
call   1050 <delay_ms@plt>
mov    $0x5,%edi
call   1040 <motor_control@plt>
jmp    1140 <main+0x10>

LLVM IR (-O0):
define void @main() {
%1 = call i32 (...) @mcu_init()
br label %2
2: ; preds = %0, %2
%3 = call i32 @motor_control(i32 1)
%4 = call i32 @delay_ms(i32 500)
%5 = call i32 @motor_control(i32 4)
%6 = call i32 @delay_ms(i32 100)
%7 = call i32 @motor_control(i32 1)
%8 = call i32 @delay_ms(i32 500)
%9 = call i32 @motor_control(i32 3)
%10 = call i32 @delay_ms(i32 100)
%11 = call i32 @motor_control(i32 2)
%12 = call i32 @delay_ms(i32 500)
%13 = call i32 @motor_control(i32 5)
br label %2
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 (...) @mcu_init()
br label %2
2: ; preds = %0, %2
%3 = tail call i32 @motor_control(i32 1)
%4 = tail call i32 @delay_ms(i32 500)
%5 = tail call i32 @motor_control(i32 4)
%6 = tail call i32 @delay_ms(i32 100)
%7 = tail call i32 @motor_control(i32 1)
%8 = tail call i32 @delay_ms(i32 500)
%9 = tail call i32 @motor_control(i32 3)
%10 = tail call i32 @delay_ms(i32 100)
%11 = tail call i32 @motor_control(i32 2)
%12 = tail call i32 @delay_ms(i32 500)
%13 = tail call i32 @motor_control(i32 5)
br label %2
}
void ptrace_sandbox_permit_chdir(struct pt_sandbox *p_sandbox) {
  (void)p_sandbox;
}


x86 assembly (clang, -O0):
<ptrace_sandbox_permit_chdir>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptrace_sandbox_permit_chdir>:
ret

LLVM IR (-O0):
%struct.pt_sandbox = type opaque
define void @ptrace_sandbox_permit_chdir(%struct.pt_sandbox* %0) {
%2 = alloca %struct.pt_sandbox*
store %struct.pt_sandbox* %0, %struct.pt_sandbox** %2
%3 = load %struct.pt_sandbox*, %struct.pt_sandbox** %2
ret void
}

LLVM IR (-O2):
%struct.pt_sandbox = type opaque
define void @ptrace_sandbox_permit_chdir(%struct.pt_sandbox* nocapture %0) {
ret void
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMRD7_get(void) { return U_WMRCORENONE_get("U_WMRD7"); }


x86 assembly (clang, -O0):
<U_WMRD7_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRD7_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMRD7\00"
define i32 @U_WMRD7_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMRD7\00"
define i32 @U_WMRD7_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int Load(int argc, char **argv) {
  printf("Calling from Load\n");
  return 1;
}


x86 assembly (clang, -O0):
<Load>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Load>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"Calling from Load\0A\00"
define i32 @Load(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@str = [18 x i8] c"Calling from Load\00"
define i32 @Load(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0))
ret i32 1
}
/* Type definitions */
typedef scalar_t__ int32_t;

/* Variables and functions */
int /*<<< orphan*/ BindSocket(scalar_t__);
int /*<<< orphan*/ NetlinkSocketClose(scalar_t__);
scalar_t__ OpenSocket();
int32_t NetlinkSocketOpen(void) {
  int32_t fd = OpenSocket();
  if (fd >= 0 && !BindSocket(fd)) {
    NetlinkSocketClose(fd);
    fd = -1;
  }
  return fd;
}


x86 assembly (clang, -O0):
<NetlinkSocketOpen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <OpenSocket@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jl     1171 <NetlinkSocketOpen+0x41>
mov    -0x8(%rbp),%rdi
call   1050 <BindSocket@plt>
cmp    $0x0,%eax
jne    1171 <NetlinkSocketOpen+0x41>
mov    -0x8(%rbp),%rdi
call   1030 <NetlinkSocketClose@plt>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NetlinkSocketOpen>:
push   %rbx
xor    %eax,%eax
call   1040 <OpenSocket@plt>
mov    %rax,%rbx
test   %rax,%rax
js     115b <NetlinkSocketOpen+0x2b>
mov    %rbx,%rdi
call   1050 <BindSocket@plt>
test   %eax,%eax
jne    115b <NetlinkSocketOpen+0x2b>
mov    %rbx,%rdi
call   1030 <NetlinkSocketClose@plt>
mov    $0xffffffffffffffff,%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @NetlinkSocketOpen() {
%1 = alloca i64
%2 = call i64 (...) @OpenSocket()
store i64 %2, i64* %1
%3 = load i64, i64* %1
%4 = icmp sge i64 %3, 0
br i1 %4, label %5, label %12
5: ; preds = %0
%6 = load i64, i64* %1
%7 = call i32 @BindSocket(i64 %6)
%8 = icmp ne i32 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %5
%10 = load i64, i64* %1
%11 = call i32 @NetlinkSocketClose(i64 %10)
store i64 -1, i64* %1
br label %12
12: ; preds = %9, %5, %0
%13 = load i64, i64* %1
ret i64 %13
}

LLVM IR (-O2):
define i64 @NetlinkSocketOpen() {
%1 = tail call i64 (...) @OpenSocket()
%2 = icmp sgt i64 %1, -1
br i1 %2, label %3, label %8
3: ; preds = %0
%4 = tail call i32 @BindSocket(i64 %1)
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @NetlinkSocketClose(i64 %1)
br label %8
8: ; preds = %6, %3, %0
%9 = phi i64 [ %1, %3 ], [ -1, %6 ], [ %1, %0 ]
ret i64 %9
}