xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int ptr_arr;

/* Variables and functions */
int **malloc(int);
int main() {
  int a = 3;
  int b = 2;
  int **ptr_arr = malloc(sizeof(int *) * 3);
  ptr_arr[0] = &a;
  ptr_arr[1] = &b;
  ptr_arr[2] = &b;
  b = 5;
  return *(ptr_arr[0]) + *(ptr_arr[1]) + *(ptr_arr[2]);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    $0x18,%edi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
lea    -0x8(%rbp),%rcx
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rax
lea    -0xc(%rbp),%rcx
mov    %rcx,0x8(%rax)
mov    -0x18(%rbp),%rax
lea    -0xc(%rbp),%rcx
mov    %rcx,0x10(%rax)
movl   $0x5,-0xc(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
mov    0x8(%rcx),%rcx
add    (%rcx),%eax
mov    -0x18(%rbp),%rcx
mov    0x10(%rcx),%rcx
add    (%rcx),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x18,%edi
call   1030 <malloc@plt>
mov    $0xd,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32**
store i32 0, i32* %1
store i32 3, i32* %2
store i32 2, i32* %3
%5 = call i32** @malloc(i32 24)
store i32** %5, i32*** %4
%6 = load i32**, i32*** %4
%7 = getelementptr inbounds i32*, i32** %6, i64 0
store i32* %2, i32** %7
%8 = load i32**, i32*** %4
%9 = getelementptr inbounds i32*, i32** %8, i64 1
store i32* %3, i32** %9
%10 = load i32**, i32*** %4
%11 = getelementptr inbounds i32*, i32** %10, i64 2
store i32* %3, i32** %11
store i32 5, i32* %3
%12 = load i32**, i32*** %4
%13 = getelementptr inbounds i32*, i32** %12, i64 0
%14 = load i32*, i32** %13
%15 = load i32, i32* %14
%16 = load i32**, i32*** %4
%17 = getelementptr inbounds i32*, i32** %16, i64 1
%18 = load i32*, i32** %17
%19 = load i32, i32* %18
%20 = add nsw i32 %15, %19
%21 = load i32**, i32*** %4
%22 = getelementptr inbounds i32*, i32** %21, i64 2
%23 = load i32*, i32** %22
%24 = load i32, i32* %23
%25 = add nsw i32 %20, %24
ret i32 %25
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32** @malloc(i32 24)
ret i32 13
}
int test_imm_0Bint8_reg(signed char val) {
  return ((val) & (0x0B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Bint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xb,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Bint8_reg>:
test   $0xb,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Bint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 11
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_0Bint8_reg(i8 signext %0) {
%2 = and i8 %0, 11
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ outer_function();
int main(void) {
  outer_function();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <outer_function@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <outer_function@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @outer_function()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @outer_function()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ w5100_writeSn_byte(unsigned int, int, unsigned int);
void w5100_writeSnRX_RD(unsigned sock, unsigned data) {
  w5100_writeSn_byte(sock, 0x0028, data >> 8);
  w5100_writeSn_byte(sock, 0x0028 + 1, data & 0xFF);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
shr    $0x8,%edx
mov    $0x28,%esi
call   1030 <w5100_writeSn_byte@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
and    $0xff,%edx
mov    $0x29,%esi
call   1030 <w5100_writeSn_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %esi,%edx
shr    $0x8,%edx
mov    $0x28,%esi
call   1030 <w5100_writeSn_byte@plt>
movzbl %bl,%edx
mov    %ebp,%edi
mov    $0x29,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <w5100_writeSn_byte@plt>

LLVM IR (-O0):
define void @w5100_writeSnRX_RD(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = lshr i32 %6, 8
%8 = call i32 @w5100_writeSn_byte(i32 %5, i32 40, i32 %7)
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = and i32 %10, 255
%12 = call i32 @w5100_writeSn_byte(i32 %9, i32 41, i32 %11)
ret void
}

LLVM IR (-O2):
define void @w5100_writeSnRX_RD(i32 %0, i32 %1) {
%3 = lshr i32 %1, 8
%4 = tail call i32 @w5100_writeSn_byte(i32 %0, i32 40, i32 %3)
%5 = and i32 %1, 255
%6 = tail call i32 @w5100_writeSn_byte(i32 %0, i32 41, i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void unpackWithMask(unsigned int val) { printf("Unpacking bits by masking\n"); }


x86 assembly (clang, -O0):
<unpackWithMask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unpackWithMask>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"Unpacking bits by masking\0A\00"
define void @unpackWithMask(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [26 x i8] c"Unpacking bits by masking\00"
define void @unpackWithMask(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct TEvent {
  int dummy;
};

/* Variables and functions */
struct TEvent *FindEventOpcode(char cId) {
  return NULL;
}


x86 assembly (clang, -O0):
<FindEventOpcode>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FindEventOpcode>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.TEvent = type { i32 }
define %struct.TEvent* @FindEventOpcode(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
ret %struct.TEvent* null
}

LLVM IR (-O2):
%struct.TEvent = type { i32 }
define noalias %struct.TEvent* @FindEventOpcode(i8 signext %0) {
ret %struct.TEvent* null
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t rotl32(uint32_t x, int r) { return (x << r) | (x >> (32 - r)); }


x86 assembly (clang, -O0):
<rotl32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
mov    $0x20,%ecx
sub    -0x8(%rbp),%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotl32>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
neg    %cl
sar    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rotl32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sub nsw i32 32, %9
%11 = ashr i32 %8, %10
%12 = or i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @rotl32(i32 %0, i32 %1) {
%3 = shl i32 %0, %1
%4 = sub nsw i32 32, %1
%5 = ashr i32 %0, %4
%6 = or i32 %5, %3
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ FixXY(int /*<<< orphan*/, int);
void Subx(void) { FixXY(0, -5); }


x86 assembly (clang, -O0):
<Subx>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0xfffffffb,%esi
call   1030 <FixXY@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Subx>:
xor    %edi,%edi
mov    $0xfffffffb,%esi
jmp    1030 <FixXY@plt>

LLVM IR (-O0):
define void @Subx() {
%1 = call i32 @FixXY(i32 0, i32 -5)
ret void
}

LLVM IR (-O2):
define void @Subx() {
%1 = tail call i32 @FixXY(i32 0, i32 -5)
ret void
}
/* Variables and functions */
long double significand(long double);
long double significandl(long double a1) { return significand(a1); }


x86 assembly (clang, -O0):
<significandl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <significand@plt>
fld    %st(0)
fstp   %st(0)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<significandl>:
jmp    1030 <significand@plt>

LLVM IR (-O0):
define x86_fp80 @significandl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call x86_fp80 @significand(x86_fp80 %3)
ret x86_fp80 %4
}

LLVM IR (-O2):
define x86_fp80 @significandl(x86_fp80 %0) {
%2 = tail call x86_fp80 @significand(x86_fp80 %0)
ret x86_fp80 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;
struct passwd {
  int /*<<< orphan*/ pw_name;
};
typedef int /*<<< orphan*/ name;

/* Variables and functions */
struct passwd *getpwuid(int /*<<< orphan*/);
int /*<<< orphan*/ strncpy(char *, int /*<<< orphan*/, int);
char *get_name_by_uid(uid_t uid) {
  struct passwd *pwd;
  static char name[32] = {0};
  if ((pwd = getpwuid(uid)) != NULL) {
    strncpy(name, pwd->pw_name, sizeof(name) - 1);
  }
  return name;
}


x86 assembly (clang, -O0):
<get_name_by_uid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <getpwuid@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
je     1158 <get_name_by_uid+0x38>
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
lea    0x2ef2(%rip),%rdi
mov    $0x1f,%edx
call   1030 <strncpy@plt>
lea    0x2ee1(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_name_by_uid>:
push   %rax
call   1040 <getpwuid@plt>
test   %rax,%rax
je     113e <get_name_by_uid+0x1e>
mov    (%rax),%esi
lea    0x2f0c(%rip),%rdi
mov    $0x1f,%edx
call   1030 <strncpy@plt>
lea    0x2efb(%rip),%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.passwd = type { i32 }
@get_name_by_uid.name = internal global [32 x i8] zeroinitializer
define i8* @get_name_by_uid(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.passwd*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call %struct.passwd* @getpwuid(i32 %4)
store %struct.passwd* %5, %struct.passwd** %3
%6 = icmp ne %struct.passwd* %5, null
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load %struct.passwd*, %struct.passwd** %3
%9 = getelementptr inbounds %struct.passwd, %struct.passwd* %8, i32 0, i32 0
%10 = load i32, i32* %9
%11 = call i32 @strncpy(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @get_name_by_uid.name, i64 0, i64 0), i32 %10, i32 31)
br label %12
12: ; preds = %7, %1
ret i8* getelementptr inbounds ([32 x i8], [32 x i8]* @get_name_by_uid.name, i64 0, i64 0)
}

LLVM IR (-O2):
%struct.passwd = type { i32 }
@get_name_by_uid.name = internal global [32 x i8] zeroinitializer
define i8* @get_name_by_uid(i32 %0) {
%2 = tail call %struct.passwd* @getpwuid(i32 %0)
%3 = icmp eq %struct.passwd* %2, null
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = getelementptr inbounds %struct.passwd, %struct.passwd* %2, i64 0, i32 0
%6 = load i32, i32* %5
%7 = tail call i32 @strncpy(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @get_name_by_uid.name, i64 0, i64 0), i32 %6, i32 31)
br label %8
8: ; preds = %4, %1
ret i8* getelementptr inbounds ([32 x i8], [32 x i8]* @get_name_by_uid.name, i64 0, i64 0)
}
/* Variables and functions */
char *scout_h16(char const *);
char const *scout_ipv6address_rh5(char const *);
const char *scout_ipv6address_rh6(const char *c) {
  if ((c = scout_h16(c)) == NULL)
    return NULL;
  if (*(c + 1) == ':')
    return scout_ipv6address_rh5(c + 2);
  return NULL;
}


x86 assembly (clang, -O0):
<scout_ipv6address_rh6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <scout_h16@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    1150 <scout_ipv6address_rh6+0x30>
movq   $0x0,-0x8(%rbp)
jmp    117f <scout_ipv6address_rh6+0x5f>
mov    -0x10(%rbp),%rax
movsbl 0x1(%rax),%eax
cmp    $0x3a,%eax
jne    1177 <scout_ipv6address_rh6+0x57>
mov    -0x10(%rbp),%rdi
add    $0x2,%rdi
call   1040 <scout_ipv6address_rh5@plt>
mov    %rax,-0x8(%rbp)
jmp    117f <scout_ipv6address_rh6+0x5f>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scout_ipv6address_rh6>:
push   %rax
call   1030 <scout_h16@plt>
test   %rax,%rax
je     113e <scout_ipv6address_rh6+0x1e>
cmpb   $0x3a,0x1(%rax)
jne    113e <scout_ipv6address_rh6+0x1e>
add    $0x2,%rax
mov    %rax,%rdi
pop    %rax
jmp    1040 <scout_ipv6address_rh5@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @scout_ipv6address_rh6(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i8* @scout_h16(i8* %4)
store i8* %5, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %1
store i8* null, i8** %2
br label %19
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 58
br i1 %13, label %14, label %18
14: ; preds = %8
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i64 2
%17 = call i8* @scout_ipv6address_rh5(i8* %16)
store i8* %17, i8** %2
br label %19
18: ; preds = %8
store i8* null, i8** %2
br label %19
19: ; preds = %18, %14, %7
%20 = load i8*, i8** %2
ret i8* %20
}

LLVM IR (-O2):
define i8* @scout_ipv6address_rh6(i8* %0) {
%2 = tail call i8* @scout_h16(i8* %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, i8* %2, i64 1
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 58
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = getelementptr inbounds i8, i8* %2, i64 2
%10 = tail call i8* @scout_ipv6address_rh5(i8* %9)
br label %11
11: ; preds = %4, %1, %8
%12 = phi i8* [ %10, %8 ], [ null, %1 ], [ null, %4 ]
ret i8* %12
}
long nice_to_rlimit(long nice) { return (19 - nice + 1); }


x86 assembly (clang, -O0):
<nice_to_rlimit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x13,%eax
sub    -0x8(%rbp),%rax
add    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nice_to_rlimit>:
mov    $0x14,%eax
sub    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @nice_to_rlimit(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sub nsw i64 19, %3
%5 = add nsw i64 %4, 1
ret i64 %5
}

LLVM IR (-O2):
define i64 @nice_to_rlimit(i64 %0) {
%2 = sub i64 20, %0
ret i64 %2
}
int single_number(int A[], int n) {
  for (--n; n > 0; --n)
    A[0] ^= A[n];
  return A[0];
}


x86 assembly (clang, -O0):
<single_number>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    113f <single_number+0x3f>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%ecx
mov    -0x8(%rbp),%rax
xor    (%rax),%ecx
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    1114 <single_number+0x14>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<single_number>:
cmp    $0x1,%esi
jle    1123 <single_number+0x23>
mov    %esi,%ecx
mov    (%rdi),%eax
add    $0x1,%rcx
nopl   (%rax)
lea    -0x2(%rcx),%edx
xor    (%rdi,%rdx,4),%eax
mov    %eax,(%rdi)
add    $0xffffffffffffffff,%rcx
cmp    $0x2,%rcx
ja     1110 <single_number+0x10>
ret
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @single_number(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = add nsw i32 %5, -1
store i32 %6, i32* %4
br label %7
7: ; preds = %20, %2
%8 = load i32, i32* %4
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %23
10: ; preds = %7
%11 = load i32*, i32** %3
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = load i32*, i32** %3
%17 = getelementptr inbounds i32, i32* %16, i64 0
%18 = load i32, i32* %17
%19 = xor i32 %18, %15
store i32 %19, i32* %17
br label %20
20: ; preds = %10
%21 = load i32, i32* %4
%22 = add nsw i32 %21, -1
store i32 %22, i32* %4
br label %7
23: ; preds = %7
%24 = load i32*, i32** %3
%25 = getelementptr inbounds i32, i32* %24, i64 0
%26 = load i32, i32* %25
ret i32 %26
}

LLVM IR (-O2):
define i32 @single_number(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 1
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = load i32, i32* %0
br label %18
6: ; preds = %2
%7 = zext i32 %1 to i64
%8 = load i32, i32* %0
br label %9
9: ; preds = %6, %9
%10 = phi i32 [ %8, %6 ], [ %16, %9 ]
%11 = phi i64 [ %7, %6 ], [ %12, %9 ]
%12 = add nsw i64 %11, -1
%13 = and i64 %12, 4294967295
%14 = getelementptr inbounds i32, i32* %0, i64 %13
%15 = load i32, i32* %14
%16 = xor i32 %10, %15
store i32 %16, i32* %0
%17 = icmp ugt i64 %11, 2
br i1 %17, label %9, label %18
18: ; preds = %9, %4
%19 = phi i32 [ %5, %4 ], [ %16, %9 ]
ret i32 %19
}
/* Variables and functions */
scalar_t__ gfx_gxm_config_read(int);
unsigned long gu1_get_frame_buffer_base(void) {
  unsigned long base;
  base = (unsigned long)gfx_gxm_config_read(0xB8);
  base = (base & 0x03) << 30;
  if (base)
    base |= 0x00800000;
  return (base);
}


x86 assembly (clang, -O0):
<gu1_get_frame_buffer_base>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xb8,%edi
call   1030 <gfx_gxm_config_read@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x3,%rax
shl    $0x1e,%rax
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     114f <gu1_get_frame_buffer_base+0x3f>
mov    -0x8(%rbp),%rax
or     $0x800000,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gu1_get_frame_buffer_base>:
push   %rax
mov    $0xb8,%edi
call   1030 <gfx_gxm_config_read@plt>
shl    $0x1e,%eax
lea    0x800000(%rax),%rdx
xor    %ecx,%ecx
test   %eax,%eax
cmovne %rdx,%rcx
mov    %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @gu1_get_frame_buffer_base() {
%1 = alloca i64
%2 = call i64 @gfx_gxm_config_read(i32 184)
store i64 %2, i64* %1
%3 = load i64, i64* %1
%4 = and i64 %3, 3
%5 = shl i64 %4, 30
store i64 %5, i64* %1
%6 = load i64, i64* %1
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %0
%9 = load i64, i64* %1
%10 = or i64 %9, 8388608
store i64 %10, i64* %1
br label %11
11: ; preds = %8, %0
%12 = load i64, i64* %1
ret i64 %12
}

LLVM IR (-O2):
define i64 @gu1_get_frame_buffer_base() {
%1 = tail call i64 @gfx_gxm_config_read(i32 184)
%2 = shl i64 %1, 30
%3 = and i64 %2, 3221225472
%4 = icmp eq i64 %3, 0
%5 = or i64 %3, 8388608
%6 = select i1 %4, i64 0, i64 %5
ret i64 %6
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
unsigned char sat(uint64_t x) {
  if (x < 256)
    return x;
  return 255;
}


x86 assembly (clang, -O0):
<sat>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x100,-0x8(%rbp)
jge    111f <sat+0x1f>
mov    -0x8(%rbp),%eax
mov    %al,-0x1(%rbp)
jmp    1123 <sat+0x23>
movb   $0xff,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sat>:
cmp    $0x100,%edi
mov    $0xff,%eax
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @sat(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 256
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = trunc i32 %7 to i8
store i8 %8, i8* %2
br label %10
9: ; preds = %1
store i8 -1, i8* %2
br label %10
10: ; preds = %9, %6
%11 = load i8, i8* %2
ret i8 %11
}

LLVM IR (-O2):
define zeroext i8 @sat(i32 %0) {
%2 = icmp slt i32 %0, 256
%3 = trunc i32 %0 to i8
%4 = select i1 %2, i8 %3, i8 -1
ret i8 %4
}
/* Type definitions */
struct tcb {
  int dummy;
};

/* Variables and functions */
int sys_stat(struct tcb *);
int sys_stat64(struct tcb *tcp) { return sys_stat(tcp); }


x86 assembly (clang, -O0):
<sys_stat64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <sys_stat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_stat64>:
jmp    1030 <sys_stat@plt>

LLVM IR (-O0):
%struct.tcb = type { i32 }
define i32 @sys_stat64(%struct.tcb* %0) {
%2 = alloca %struct.tcb*
store %struct.tcb* %0, %struct.tcb** %2
%3 = load %struct.tcb*, %struct.tcb** %2
%4 = call i32 @sys_stat(%struct.tcb* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.tcb = type { i32 }
define i32 @sys_stat64(%struct.tcb* %0) {
%2 = tail call i32 @sys_stat(%struct.tcb* %0)
ret i32 %2
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ y_root;
};
typedef TYPE_1__ XKeyPressedEvent;

/* Variables and functions */
int get_XKeyPressedEvent_y_root(void *_p) {
  return (int)((XKeyPressedEvent *)_p)->y_root;
}


x86 assembly (clang, -O0):
<get_XKeyPressedEvent_y_root>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XKeyPressedEvent_y_root>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XKeyPressedEvent_y_root(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XKeyPressedEvent_y_root(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
void deargify(char ***argv) { return; }


x86 assembly (clang, -O0):
<deargify>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<deargify>:
ret

LLVM IR (-O0):
define void @deargify(i8*** %0) {
%2 = alloca i8***
store i8*** %0, i8**** %2
ret void
}

LLVM IR (-O2):
define void @deargify(i8*** nocapture %0) {
ret void
}
/* Type definitions */
struct sockaddr {
  int dummy;
};
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
int sane_accept(int, struct sockaddr *, int /*<<< orphan*/ *);
int zunix_accept(int fd) {
  return (sane_accept(fd, (struct sockaddr *)0, (socklen_t *)0));
}


x86 assembly (clang, -O0):
<zunix_accept>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %eax,%eax
mov    %eax,%edx
mov    %rdx,%rsi
call   1030 <sane_accept@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zunix_accept>:
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <sane_accept@plt>

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
define i32 @zunix_accept(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @sane_accept(i32 %3, %struct.sockaddr* null, i32* null)
ret i32 %4
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
define i32 @zunix_accept(i32 %0) {
%2 = tail call i32 @sane_accept(i32 %0, %struct.sockaddr* null, i32* null)
ret i32 %2
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int ROTR(int, int, int);
uint32_t SSIG1(uint32_t x) {
  return ROTR(x, 17, 32) ^ ROTR(x, 19, 32) ^ (x >> 10);
}


x86 assembly (clang, -O0):
<SSIG1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x11,%esi
mov    $0x20,%edx
call   1030 <ROTR@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x13,%esi
mov    $0x20,%edx
call   1030 <ROTR@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
xor    %ecx,%eax
mov    -0x4(%rbp),%ecx
sar    $0xa,%ecx
xor    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSIG1>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    $0x11,%esi
mov    $0x20,%edx
call   1030 <ROTR@plt>
mov    %eax,%ebp
mov    %ebx,%edi
mov    $0x13,%esi
mov    $0x20,%edx
call   1030 <ROTR@plt>
sar    $0xa,%ebx
xor    %ebp,%ebx
xor    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @SSIG1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ROTR(i32 %3, i32 17, i32 32)
%5 = load i32, i32* %2
%6 = call i32 @ROTR(i32 %5, i32 19, i32 32)
%7 = xor i32 %4, %6
%8 = load i32, i32* %2
%9 = ashr i32 %8, 10
%10 = xor i32 %7, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @SSIG1(i32 %0) {
%2 = tail call i32 @ROTR(i32 %0, i32 17, i32 32)
%3 = tail call i32 @ROTR(i32 %0, i32 19, i32 32)
%4 = ashr i32 %0, 10
%5 = xor i32 %2, %4
%6 = xor i32 %5, %3
ret i32 %6
}
/* Type definitions */
struct expression {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ expr_cg_constant_expression(struct expression *, char *);
void expr_cg_trunc(struct expression *e) {
  expr_cg_constant_expression(e, "trunc");
}


x86 assembly (clang, -O0):
<expr_cg_trunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <expr_cg_constant_expression@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expr_cg_trunc>:
lea    0xee9(%rip),%rsi
jmp    1030 <expr_cg_constant_expression@plt>

LLVM IR (-O0):
%struct.expression = type { i32 }
@.str = [6 x i8] c"trunc\00"
define void @expr_cg_trunc(%struct.expression* %0) {
%2 = alloca %struct.expression*
store %struct.expression* %0, %struct.expression** %2
%3 = load %struct.expression*, %struct.expression** %2
%4 = call i32 @expr_cg_constant_expression(%struct.expression* %3, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.expression = type { i32 }
@.str = [6 x i8] c"trunc\00"
define void @expr_cg_trunc(%struct.expression* %0) {
%2 = tail call i32 @expr_cg_constant_expression(%struct.expression* %0, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
unsigned long find_kernel_symbol(const char *symbol) { return 0xdeadbeef; }


x86 assembly (clang, -O0):
<find_kernel_symbol>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xdeadbeef,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_kernel_symbol>:
mov    $0xdeadbeef,%eax
ret

LLVM IR (-O0):
define i64 @find_kernel_symbol(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i64 3735928559
}

LLVM IR (-O2):
define i64 @find_kernel_symbol(i8* nocapture readnone %0) {
ret i64 3735928559
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_bus_add_node_enumerator(void *bus, void **slot, const char *path,
                           void *callback, void *userdata) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_bus_add_node_enumerator>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
xor    %eax,%eax
mov    0x2ebf(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_add_node_enumerator>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_bus_add_node_enumerator(i8* %0, i8** %1, i8* %2, i8* %3, i8* %4) {
%6 = alloca i8*
%7 = alloca i8**
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i8*
store i8* %0, i8** %6
store i8** %1, i8*** %7
store i8* %2, i8** %8
store i8* %3, i8** %9
store i8* %4, i8** %10
%11 = load i32, i32* @EINVAL
%12 = sub nsw i32 0, %11
ret i32 %12
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_bus_add_node_enumerator(i8* nocapture readnone %0, i8** nocapture readnone %1, i8* nocapture readnone %2, i8* nocapture readnone %3, i8* nocapture readnone %4) {
%6 = load i32, i32* @EINVAL
%7 = sub nsw i32 0, %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0xe3() {
  Assert_real((isalnum(227) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              1140, ("isalnum should be 0 for 0xe3"));
}


x86 assembly (clang, -O0):
<t_isalnum_0xe3>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe3,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x474,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0xe3>:
push   %rax
mov    $0xe3,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x474,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xe3\00"
define void @t_isalnum_0xe3() {
%1 = call i64 @isalnum(i32 227)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1140, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xe3\00"
define void @t_isalnum_0xe3() {
%1 = tail call i64 @isalnum(i32 227)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1140, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int hdd_init_nan_data_mode(struct hdd_adapter_s *adapter) { return 0; }


x86 assembly (clang, -O0):
<hdd_init_nan_data_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdd_init_nan_data_mode>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.hdd_adapter_s = type opaque
define i32 @hdd_init_nan_data_mode(%struct.hdd_adapter_s* %0) {
%2 = alloca %struct.hdd_adapter_s*
store %struct.hdd_adapter_s* %0, %struct.hdd_adapter_s** %2
ret i32 0
}

LLVM IR (-O2):
%struct.hdd_adapter_s = type opaque
define i32 @hdd_init_nan_data_mode(%struct.hdd_adapter_s* nocapture readnone %0) {
ret i32 0
}
void mcu_atmel_atmega328p_Atmega328p_shutdown__E() {}


x86 assembly (clang, -O0):
<mcu_atmel_atmega328p_Atmega328p_shutdown__E>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mcu_atmel_atmega328p_Atmega328p_shutdown__E>:
ret

LLVM IR (-O0):
define void @mcu_atmel_atmega328p_Atmega328p_shutdown__E() {
ret void
}

LLVM IR (-O2):
define void @mcu_atmel_atmega328p_Atmega328p_shutdown__E() {
ret void
}
void signal_ignore(int parm) {}


x86 assembly (clang, -O0):
<signal_ignore>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<signal_ignore>:
ret

LLVM IR (-O0):
define void @signal_ignore(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @signal_ignore(i32 %0) {
ret void
}
void proc(int *x, int *y) {}


x86 assembly (clang, -O0):
<proc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<proc>:
ret

LLVM IR (-O0):
define void @proc(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
ret void
}

LLVM IR (-O2):
define void @proc(i32* nocapture %0, i32* nocapture %1) {
ret void
}
void gtk_text_view_backward_display_line_start() {}


x86 assembly (clang, -O0):
<gtk_text_view_backward_display_line_start>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_view_backward_display_line_start>:
ret

LLVM IR (-O0):
define void @gtk_text_view_backward_display_line_start() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_view_backward_display_line_start() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ F_OK;
int access(char const *, int /*<<< orphan*/);
int file_exists_p(const char *filename) { return (access(filename, F_OK)); }


x86 assembly (clang, -O0):
<file_exists_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
call   1030 <access@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_exists_p>:
mov    0x2ec1(%rip),%rax
mov    (%rax),%esi
jmp    1030 <access@plt>

LLVM IR (-O0):
@F_OK = global i32 0
define i32 @file_exists_p(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @F_OK
%5 = call i32 @access(i8* %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@F_OK = global i32 0
define i32 @file_exists_p(i8* nocapture %0) {
%2 = load i32, i32* @F_OK
%3 = tail call i32 @access(i8* %0, i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ bf(char *, char *);
int main(int argc, char *argv[]) {
  bf("stupid_spring_string", "string");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
lea    0xeda(%rip),%rsi
call   1030 <bf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xeef(%rip),%rsi
call   1030 <bf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"stupid_spring_string\00"
@.str.1 = [7 x i8] c"string\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @bf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [21 x i8] c"stupid_spring_string\00"
@.str.1 = [7 x i8] c"string\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @bf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef scalar_t__ uint64_t;

/* Variables and functions */
uint64_t zig_addw_u64(uint64_t lhs, uint64_t rhs, uint64_t max) {
  uint64_t thresh = max - rhs;
  if (lhs > thresh) {
    return lhs - thresh - 1;
  } else {
    return lhs + rhs;
  }
}


x86 assembly (clang, -O0):
<zig_addw_u64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x20(%rbp),%rax
sub    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x28(%rbp),%rax
jle    113f <zig_addw_u64+0x3f>
mov    -0x10(%rbp),%rax
sub    -0x28(%rbp),%rax
sub    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    114b <zig_addw_u64+0x4b>
mov    -0x10(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zig_addw_u64>:
sub    %rsi,%rdx
cmp    %rdi,%rdx
not    %rdx
cmovge %rsi,%rdx
lea    (%rdx,%rdi,1),%rax
ret

LLVM IR (-O0):
define i64 @zig_addw_u64(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%9 = load i64, i64* %7
%10 = load i64, i64* %6
%11 = sub nsw i64 %9, %10
store i64 %11, i64* %8
%12 = load i64, i64* %5
%13 = load i64, i64* %8
%14 = icmp sgt i64 %12, %13
br i1 %14, label %15, label %20
15: ; preds = %3
%16 = load i64, i64* %5
%17 = load i64, i64* %8
%18 = sub nsw i64 %16, %17
%19 = sub nsw i64 %18, 1
store i64 %19, i64* %4
br label %24
20: ; preds = %3
%21 = load i64, i64* %5
%22 = load i64, i64* %6
%23 = add nsw i64 %21, %22
store i64 %23, i64* %4
br label %24
24: ; preds = %20, %15
%25 = load i64, i64* %4
ret i64 %25
}

LLVM IR (-O2):
define i64 @zig_addw_u64(i64 %0, i64 %1, i64 %2) {
%4 = sub nsw i64 %2, %1
%5 = icmp slt i64 %4, %0
%6 = xor i64 %4, -1
%7 = select i1 %5, i64 %6, i64 %1
%8 = add i64 %7, %0
ret i64 %8
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void mem_free(void **ptr_addr) {
  if (*ptr_addr != NULL) {
    free(*ptr_addr);
    *ptr_addr = NULL;
  }
}


x86 assembly (clang, -O0):
<mem_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     1141 <mem_free+0x31>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_free>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1128 <mem_free+0x18>
call   1030 <free@plt>
movq   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @mem_free(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i8**, i8*** %2
%8 = load i8*, i8** %7
%9 = call i32 @free(i8* %8)
%10 = load i8**, i8*** %2
store i8* null, i8** %10
br label %11
11: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
define void @mem_free(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = icmp eq i8* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @free(i8* %2)
store i8* null, i8** %0
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
int syscall(int);
int munlockall(void) { return syscall(153); }


x86 assembly (clang, -O0):
<munlockall>:
push   %rbp
mov    %rsp,%rbp
mov    $0x99,%edi
call   1030 <syscall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<munlockall>:
mov    $0x99,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @munlockall() {
%1 = call i32 @syscall(i32 153)
ret i32 %1
}

LLVM IR (-O2):
define i32 @munlockall() {
%1 = tail call i32 @syscall(i32 153)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ buf_flush();
int obuf_avail();
void obuf_need_space(int count) {
  if (obuf_avail() < count)
    buf_flush();
}


x86 assembly (clang, -O0):
<obuf_need_space>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <obuf_avail@plt>
cmp    -0x4(%rbp),%eax
jge    1142 <obuf_need_space+0x22>
mov    $0x0,%al
call   1040 <buf_flush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<obuf_need_space>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <obuf_avail@plt>
cmp    %ebx,%eax
jge    1136 <obuf_need_space+0x16>
xor    %eax,%eax
pop    %rbx
jmp    1040 <buf_flush@plt>
pop    %rbx
ret

LLVM IR (-O0):
define void @obuf_need_space(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @obuf_avail()
%4 = load i32, i32* %2
%5 = icmp slt i32 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 (...) @buf_flush()
br label %8
8: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
define void @obuf_need_space(i32 %0) {
%2 = tail call i32 (...) @obuf_avail()
%3 = icmp slt i32 %2, %0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 (...) @buf_flush()
br label %6
6: ; preds = %4, %1
ret void
}
int feunit_shutdown(void) { return 0; }


x86 assembly (clang, -O0):
<feunit_shutdown>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<feunit_shutdown>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @feunit_shutdown() {
ret i32 0
}

LLVM IR (-O2):
define i32 @feunit_shutdown() {
ret i32 0
}
int wsize(char w[]) {
  unsigned int i = 0;
  while (w[i++] != '\0')
    ;
  return i - 1;
}


x86 assembly (clang, -O0):
<wsize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0xc(%rbp)
mov    %ecx,%ecx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1132 <wsize+0x32>
jmp    110f <wsize+0xf>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wsize>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpb   $0x0,(%rdi,%rax,1)
jne    1110 <wsize+0x10>
ret

LLVM IR (-O0):
define i32 @wsize(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %13, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = add i32 %6, 1
store i32 %7, i32* %3
%8 = zext i32 %6 to i64
%9 = getelementptr inbounds i8, i8* %5, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %4
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
%16 = sub i32 %15, 1
ret i32 %16
}

LLVM IR (-O2):
define i32 @wsize(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %4, %2 ]
%4 = add i32 %3, 1
%5 = zext i32 %3 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
br i1 %8, label %9, label %2
9: ; preds = %2
ret i32 %3
}
int __attribute__((no)) f2(int i) { return 2 * i; }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
lea    (%rdi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @f2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 2, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @f2(i32 %0) {
%2 = shl nsw i32 %0, 1
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ vec_ctor(void **, size_t);
void *vec_new(size_t size) {
  void *ret = 0;
  vec_ctor(&ret, size);
  return ret;
}


x86 assembly (clang, -O0):
<vec_new>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
lea    -0x10(%rbp),%rdi
call   1030 <vec_ctor@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec_new>:
push   %rax
mov    %rdi,%rsi
movq   $0x0,(%rsp)
mov    %rsp,%rdi
call   1030 <vec_ctor@plt>
mov    (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @vec_new(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
store i8* null, i8** %3
%4 = load i64, i64* %2
%5 = call i32 @vec_ctor(i8** %3, i64 %4)
%6 = load i8*, i8** %3
ret i8* %6
}

LLVM IR (-O2):
define i8* @vec_new(i64 %0) {
%2 = alloca i8*
%3 = bitcast i8** %2 to i8*
store i8* null, i8** %2
%4 = call i32 @vec_ctor(i8** %2, i64 %0)
%5 = load i8*, i8** %2
ret i8* %5
}
long atomic_inc_long(volatile long *value) {
  return __sync_add_and_fetch(value, 1);
}


x86 assembly (clang, -O0):
<atomic_inc_long>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x1,%eax
lock xadd %rax,(%rcx)
add    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_inc_long>:
mov    $0x1,%eax
lock xadd %rax,(%rdi)
add    $0x1,%rax
ret

LLVM IR (-O0):
define i64 @atomic_inc_long(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = atomicrmw add i64* %3, i64 1 seq_cst
%5 = add i64 %4, 1
ret i64 %5
}

LLVM IR (-O2):
define i64 @atomic_inc_long(i64* nocapture %0) {
%2 = atomicrmw add i64* %0, i64 1 seq_cst
%3 = add i64 %2, 1
ret i64 %3
}
int media(int input[]) {
  int output = (input[0] + input[1] + input[2] + input[3]) / 4;
  return output;
}


x86 assembly (clang, -O0):
<media>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x8(%rbp),%rcx
add    0x4(%rcx),%eax
mov    -0x8(%rbp),%rcx
add    0x8(%rcx),%eax
mov    -0x8(%rbp),%rcx
add    0xc(%rcx),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<media>:
movdqu (%rdi),%xmm0
pshufd $0xee,%xmm0,%xmm1
paddd  %xmm0,%xmm1
pshufd $0x55,%xmm1,%xmm0
paddd  %xmm1,%xmm0
movd   %xmm0,%ecx
lea    0x3(%rcx),%eax
test   %ecx,%ecx
cmovns %ecx,%eax
sar    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @media(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = getelementptr inbounds i32, i32* %4, i64 0
%6 = load i32, i32* %5
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = add nsw i32 %6, %9
%11 = load i32*, i32** %2
%12 = getelementptr inbounds i32, i32* %11, i64 2
%13 = load i32, i32* %12
%14 = add nsw i32 %10, %13
%15 = load i32*, i32** %2
%16 = getelementptr inbounds i32, i32* %15, i64 3
%17 = load i32, i32* %16
%18 = add nsw i32 %14, %17
%19 = sdiv i32 %18, 4
store i32 %19, i32* %3
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @media(i32* nocapture %0) {
%2 = bitcast i32* %0 to <4 x i32>*
%3 = load <4 x i32>, <4 x i32>* %2
%4 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %3)
%5 = sdiv i32 %4, 4
ret i32 %5
}
int bittochar(char v[]) {
  int i, temp = 0;
  for (i = 0; i < 8; ++i)
    if (v[7 - i] == '1')
      temp += (1 << i);
  return temp;
}


x86 assembly (clang, -O0):
<bittochar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x8,-0xc(%rbp)
jge    115f <bittochar+0x5f>
mov    -0x8(%rbp),%rax
mov    $0x7,%ecx
sub    -0xc(%rbp),%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x31,%eax
jne    114c <bittochar+0x4c>
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1151 <bittochar+0x51>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <bittochar+0x16>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bittochar>:
xor    %eax,%eax
cmpb   $0x31,0x7(%rdi)
sete   %al
xor    %ecx,%ecx
cmpb   $0x31,0x6(%rdi)
sete   %cl
add    %ecx,%ecx
xor    %edx,%edx
cmpb   $0x31,0x5(%rdi)
sete   %dl
shl    $0x2,%edx
or     %ecx,%edx
or     %eax,%edx
movd   0x1(%rdi),%xmm0
pcmpeqb 0xecf(%rip),%xmm0
punpcklbw %xmm0,%xmm0
punpcklwd %xmm0,%xmm0
pand   0xecf(%rip),%xmm0
pshufd $0xee,%xmm0,%xmm1
por    %xmm0,%xmm1
pshufd $0x55,%xmm1,%xmm0
por    %xmm1,%xmm0
movd   %xmm0,%ecx
or     %edx,%ecx
xor    %eax,%eax
cmpb   $0x31,(%rdi)
sete   %al
shl    $0x7,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @bittochar(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %23, %1
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 8
br i1 %7, label %8, label %26
8: ; preds = %5
%9 = load i8*, i8** %2
%10 = load i32, i32* %3
%11 = sub nsw i32 7, %10
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %9, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 49
br i1 %16, label %17, label %22
17: ; preds = %8
%18 = load i32, i32* %3
%19 = shl i32 1, %18
%20 = load i32, i32* %4
%21 = add nsw i32 %20, %19
store i32 %21, i32* %4
br label %22
22: ; preds = %17, %8
br label %23
23: ; preds = %22
%24 = load i32, i32* %3
%25 = add nsw i32 %24, 1
store i32 %25, i32* %3
br label %5
26: ; preds = %5
%27 = load i32, i32* %4
ret i32 %27
}

LLVM IR (-O2):
define i32 @bittochar(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 7
%3 = load i8, i8* %2
%4 = icmp eq i8 %3, 49
%5 = zext i1 %4 to i32
%6 = getelementptr inbounds i8, i8* %0, i64 6
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 49
%9 = select i1 %8, i32 2, i32 0
%10 = getelementptr inbounds i8, i8* %0, i64 5
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 49
%13 = select i1 %12, i32 4, i32 0
%14 = getelementptr inbounds i8, i8* %0, i64 1
%15 = bitcast i8* %14 to <4 x i8>*
%16 = load <4 x i8>, <4 x i8>* %15
%17 = icmp eq <4 x i8> %16, <i8 49, i8 49, i8 49, i8 49>
%18 = select <4 x i1> %17, <4 x i32> <i32 64, i32 32, i32 16, i32 8>, <4 x i32> zeroinitializer
%19 = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %18)
%20 = or i32 %19, %13
%21 = or i32 %20, %9
%22 = or i32 %21, %5
%23 = load i8, i8* %0
%24 = icmp eq i8 %23, 49
%25 = select i1 %24, i32 128, i32 0
%26 = add nsw i32 %25, %22
ret i32 %26
}