#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ CCP1_IRQ_Init();
void PWM_in_init(int mask) {
  if (mask & (1 << 4)) {
    (*((volatile unsigned long *)0xE002C000)) =
        ((*((volatile unsigned long *)0xE002C000)) & ~(3 << 20)) | (2 << 20);
    (*((volatile unsigned long *)0xE0008028)) |= (1 << 0) | (1 << 2);
  }
  if (mask & (1 << 5)) {
    (*((volatile unsigned long *)0xE002C000)) =
        ((*((volatile unsigned long *)0xE002C000)) & ~(3 << 22)) | (2 << 22);
    (*((volatile unsigned long *)0xE0008028)) |= (1 << 3) | (1 << 5);
  }
  if (mask & (1 << 6)) {
    (*((volatile unsigned long *)0xE002C004)) =
        ((*((volatile unsigned long *)0xE002C004)) & ~(3 << 6)) | (3 << 6);
    (*((volatile unsigned long *)0xE0008028)) |= (1 << 6) | (1 << 8);
  }
  if (mask & (1 << 7)) {
    (*((volatile unsigned long *)0xE002C004)) =
        ((*((volatile unsigned long *)0xE002C004)) & ~(3 << 4)) | (1 << 4);
    (*((volatile unsigned long *)0xE0008028)) |= (1 << 9) | (1 << 11);
  }
  if (mask & ((1 << 4) | (1 << 5) | (1 << 6) | (1 << 7))) {
    (*((volatile unsigned long *)0xE0008014)) = 0;
    (*((volatile unsigned long *)0xE0008004)) = 1;
    CCP1_IRQ_Init();
  }
}


x86 assembly (clang, -O0):
<PWM_in_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x10,%eax
cmp    $0x0,%eax
je     115c <PWM_in_init+0x4c>
mov    $0xe002c000,%eax
mov    (%rax),%rcx
and    $0xffffffffffcfffff,%rcx
or     $0x200000,%rcx
mov    $0xe002c000,%eax
mov    %rcx,(%rax)
mov    $0xe0008028,%eax
mov    (%rax),%rcx
or     $0x5,%rcx
mov    $0xe0008028,%eax
mov    %rcx,(%rax)
mov    -0x4(%rbp),%eax
and    $0x20,%eax
cmp    $0x0,%eax
je     119d <PWM_in_init+0x8d>
mov    $0xe002c000,%eax
mov    (%rax),%rcx
and    $0xffffffffff3fffff,%rcx
or     $0x800000,%rcx
mov    $0xe002c000,%eax
mov    %rcx,(%rax)
mov    $0xe0008028,%eax
mov    (%rax),%rcx
or     $0x28,%rcx
mov    $0xe0008028,%eax
mov    %rcx,(%rax)
mov    -0x4(%rbp),%eax
and    $0x40,%eax
cmp    $0x0,%eax
je     11e1 <PWM_in_init+0xd1>
mov    $0xe002c004,%eax
mov    (%rax),%rcx
and    $0xffffffffffffff3f,%rcx
or     $0xc0,%rcx
mov    $0xe002c004,%eax
mov    %rcx,(%rax)
mov    $0xe0008028,%eax
mov    (%rax),%rcx
or     $0x140,%rcx
mov    $0xe0008028,%eax
mov    %rcx,(%rax)
mov    -0x4(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     1221 <PWM_in_init+0x111>
mov    $0xe002c004,%eax
mov    (%rax),%rcx
and    $0xffffffffffffffcf,%rcx
or     $0x10,%rcx
mov    $0xe002c004,%eax
mov    %rcx,(%rax)
mov    $0xe0008028,%eax
mov    (%rax),%rcx
or     $0xa00,%rcx
mov    $0xe0008028,%eax
mov    %rcx,(%rax)
mov    -0x4(%rbp),%eax
and    $0xf0,%eax
cmp    $0x0,%eax
je     1251 <PWM_in_init+0x141>
mov    $0xe0008014,%eax
movq   $0x0,(%rax)
mov    $0xe0008004,%eax
movq   $0x1,(%rax)
mov    $0x0,%al
call   1030 <CCP1_IRQ_Init@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWM_in_init>:
mov    $0xe0008028,%eax
test   $0x10,%dil
jne    1152 <PWM_in_init+0x42>
test   $0x20,%dil
jne    1178 <PWM_in_init+0x68>
test   $0x40,%dil
jne    119e <PWM_in_init+0x8e>
test   $0x80,%dil
jne    11ba <PWM_in_init+0xaa>
test   $0xf0,%dil
je     11e1 <PWM_in_init+0xd1>
movq   $0x0,-0x14(%rax)
movq   $0x1,-0x24(%rax)
xor    %eax,%eax
jmp    1030 <CCP1_IRQ_Init@plt>
mov    $0xffffffffffcfffff,%rcx
and    0x23fd8(%rax),%rcx
or     $0x200000,%rcx
mov    %rcx,0x23fd8(%rax)
orq    $0x5,(%rax)
test   $0x20,%dil
je     1121 <PWM_in_init+0x11>
mov    $0xffffffffff3fffff,%rcx
and    0x23fd8(%rax),%rcx
or     $0x800000,%rcx
mov    %rcx,0x23fd8(%rax)
orq    $0x28,(%rax)
test   $0x40,%dil
je     1127 <PWM_in_init+0x17>
orq    $0xc0,0x23fdc(%rax)
orq    $0x140,(%rax)
test   $0x80,%dil
je     1131 <PWM_in_init+0x21>
mov    0x23fdc(%rax),%rcx
and    $0xffffffffffffffcf,%rcx
or     $0x10,%rcx
mov    %rcx,0x23fdc(%rax)
orq    $0xa00,(%rax)
test   $0xf0,%dil
jne    113b <PWM_in_init+0x2b>
ret

LLVM IR (-O0):
define void @PWM_in_init(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 16
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load volatile i64, i64* inttoptr (i64 3758276608 to i64*)
%8 = and i64 %7, -3145729
%9 = or i64 %8, 2097152
store volatile i64 %9, i64* inttoptr (i64 3758276608 to i64*)
%10 = load volatile i64, i64* inttoptr (i64 3758129192 to i64*)
%11 = or i64 %10, 5
store volatile i64 %11, i64* inttoptr (i64 3758129192 to i64*)
br label %12
12: ; preds = %6, %1
%13 = load i32, i32* %2
%14 = and i32 %13, 32
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %22
16: ; preds = %12
%17 = load volatile i64, i64* inttoptr (i64 3758276608 to i64*)
%18 = and i64 %17, -12582913
%19 = or i64 %18, 8388608
store volatile i64 %19, i64* inttoptr (i64 3758276608 to i64*)
%20 = load volatile i64, i64* inttoptr (i64 3758129192 to i64*)
%21 = or i64 %20, 40
store volatile i64 %21, i64* inttoptr (i64 3758129192 to i64*)
br label %22
22: ; preds = %16, %12
%23 = load i32, i32* %2
%24 = and i32 %23, 64
%25 = icmp ne i32 %24, 0
br i1 %25, label %26, label %32
26: ; preds = %22
%27 = load volatile i64, i64* inttoptr (i64 3758276612 to i64*)
%28 = and i64 %27, -193
%29 = or i64 %28, 192
store volatile i64 %29, i64* inttoptr (i64 3758276612 to i64*)
%30 = load volatile i64, i64* inttoptr (i64 3758129192 to i64*)
%31 = or i64 %30, 320
store volatile i64 %31, i64* inttoptr (i64 3758129192 to i64*)
br label %32
32: ; preds = %26, %22
%33 = load i32, i32* %2
%34 = and i32 %33, 128
%35 = icmp ne i32 %34, 0
br i1 %35, label %36, label %42
36: ; preds = %32
%37 = load volatile i64, i64* inttoptr (i64 3758276612 to i64*)
%38 = and i64 %37, -49
%39 = or i64 %38, 16
store volatile i64 %39, i64* inttoptr (i64 3758276612 to i64*)
%40 = load volatile i64, i64* inttoptr (i64 3758129192 to i64*)
%41 = or i64 %40, 2560
store volatile i64 %41, i64* inttoptr (i64 3758129192 to i64*)
br label %42
42: ; preds = %36, %32
%43 = load i32, i32* %2
%44 = and i32 %43, 240
%45 = icmp ne i32 %44, 0
br i1 %45, label %46, label %48
46: ; preds = %42
store volatile i64 0, i64* inttoptr (i64 3758129172 to i64*)
store volatile i64 1, i64* inttoptr (i64 3758129156 to i64*)
%47 = call i32 (...) @CCP1_IRQ_Init()
br label %48
48: ; preds = %46, %42
ret void
}

LLVM IR (-O2):
define void @PWM_in_init(i32 %0) {
%2 = and i32 %0, 16
%3 = icmp eq i32 %2, 0
br i1 %3, label %10, label %4
4: ; preds = %1
%5 = load volatile i64, i64* inttoptr (i64 3758276608 to i64*)
%6 = and i64 %5, -3145729
%7 = or i64 %6, 2097152
store volatile i64 %7, i64* inttoptr (i64 3758276608 to i64*)
%8 = load volatile i64, i64* inttoptr (i64 3758129192 to i64*)
%9 = or i64 %8, 5
store volatile i64 %9, i64* inttoptr (i64 3758129192 to i64*)
br label %10
10: ; preds = %4, %1
%11 = and i32 %0, 32
%12 = icmp eq i32 %11, 0
br i1 %12, label %19, label %13
13: ; preds = %10
%14 = load volatile i64, i64* inttoptr (i64 3758276608 to i64*)
%15 = and i64 %14, -12582913
%16 = or i64 %15, 8388608
store volatile i64 %16, i64* inttoptr (i64 3758276608 to i64*)
%17 = load volatile i64, i64* inttoptr (i64 3758129192 to i64*)
%18 = or i64 %17, 40
store volatile i64 %18, i64* inttoptr (i64 3758129192 to i64*)
br label %19
19: ; preds = %13, %10
%20 = and i32 %0, 64
%21 = icmp eq i32 %20, 0
br i1 %21, label %27, label %22
22: ; preds = %19
%23 = load volatile i64, i64* inttoptr (i64 3758276612 to i64*)
%24 = or i64 %23, 192
store volatile i64 %24, i64* inttoptr (i64 3758276612 to i64*)
%25 = load volatile i64, i64* inttoptr (i64 3758129192 to i64*)
%26 = or i64 %25, 320
store volatile i64 %26, i64* inttoptr (i64 3758129192 to i64*)
br label %27
27: ; preds = %22, %19
%28 = and i32 %0, 128
%29 = icmp eq i32 %28, 0
br i1 %29, label %36, label %30
30: ; preds = %27
%31 = load volatile i64, i64* inttoptr (i64 3758276612 to i64*)
%32 = and i64 %31, -49
%33 = or i64 %32, 16
store volatile i64 %33, i64* inttoptr (i64 3758276612 to i64*)
%34 = load volatile i64, i64* inttoptr (i64 3758129192 to i64*)
%35 = or i64 %34, 2560
store volatile i64 %35, i64* inttoptr (i64 3758129192 to i64*)
br label %36
36: ; preds = %30, %27
%37 = and i32 %0, 240
%38 = icmp eq i32 %37, 0
br i1 %38, label %41, label %39
39: ; preds = %36
store volatile i64 0, i64* inttoptr (i64 3758129172 to i64*)
store volatile i64 1, i64* inttoptr (i64 3758129156 to i64*)
%40 = tail call i32 (...) @CCP1_IRQ_Init()
br label %41
41: ; preds = %39, %36
ret void
}