xunge/DecIR huggingface dataset:
/* Variables and functions */
int(Memento_checkBlock)(void *b) { return 0; }


x86 assembly (clang, -O0):
<Memento_checkBlock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Memento_checkBlock>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Memento_checkBlock(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @Memento_checkBlock(i8* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int uint64_t;
typedef int const uint32_t;
struct timespec {
  int tv_sec;
  int tv_nsec;
};

/* Variables and functions */
void long_to_timespec(const uint64_t input, struct timespec *t) {
  uint32_t nsecs = input % 1000000000;
  uint32_t secs = (input - nsecs) / 1000000000;
  t->tv_sec = secs;
  t->tv_nsec = nsecs;
}


x86 assembly (clang, -O0):
<long_to_timespec>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3b9aca00,%ecx
cltd
idiv   %ecx
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x14(%rbp),%eax
mov    $0x3b9aca00,%ecx
cltd
idiv   %ecx
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<long_to_timespec>:
movslq %edi,%rax
imul   $0x44b82fa1,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x3c,%rcx
add    %edx,%ecx
imul   $0x3b9aca00,%ecx,%edx
sub    %edx,%eax
mov    %ecx,(%rsi)
mov    %eax,0x4(%rsi)
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
define void @long_to_timespec(i32 %0, %struct.timespec* %1) {
%3 = alloca i32
%4 = alloca %struct.timespec*
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store %struct.timespec* %1, %struct.timespec** %4
%7 = load i32, i32* %3
%8 = srem i32 %7, 1000000000
store i32 %8, i32* %5
%9 = load i32, i32* %3
%10 = load i32, i32* %5
%11 = sub nsw i32 %9, %10
%12 = sdiv i32 %11, 1000000000
store i32 %12, i32* %6
%13 = load i32, i32* %6
%14 = load %struct.timespec*, %struct.timespec** %4
%15 = getelementptr inbounds %struct.timespec, %struct.timespec* %14, i32 0, i32 0
store i32 %13, i32* %15
%16 = load i32, i32* %5
%17 = load %struct.timespec*, %struct.timespec** %4
%18 = getelementptr inbounds %struct.timespec, %struct.timespec* %17, i32 0, i32 1
store i32 %16, i32* %18
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
define void @long_to_timespec(i32 %0, %struct.timespec* nocapture writeonly %1) {
%3 = srem i32 %0, 1000000000
%4 = sdiv i32 %0, 1000000000
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
store i32 %4, i32* %5
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
store i32 %3, i32* %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void func_liba() { puts("Greeting from liba!!\n"); }


x86 assembly (clang, -O0):
<func_liba>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_liba>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"Greeting from liba!!\0A\00"
define void @func_liba() {
%1 = call i32 @puts(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"Greeting from liba!!\0A\00"
define void @func_liba() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret void
}
unsigned long get_user_time(void) { return 0; }


x86 assembly (clang, -O0):
<get_user_time>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_user_time>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @get_user_time() {
ret i64 0
}

LLVM IR (-O2):
define i64 @get_user_time() {
ret i64 0
}
/* Variables and functions */
int INT_MIN;
int main(void) {
  INT_MIN % 1;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@INT_MIN = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @INT_MIN
%3 = srem i32 %2, 1
ret i32 0
}

LLVM IR (-O2):
@INT_MIN = global i32 0
define i32 @main() {
ret i32 0
}
/* Type definitions */
struct pattern {
  int dummy;
};

/* Variables and functions */
int offset(int /*<<< orphan*/, int, int, int);
int play_attack_defend_n(int, int, int, int, int);
int autohelperowl_attackpat135(struct pattern *patt, int transformation,
                               int move, int color, int action) {
  int a;
  (void)patt;
  (void)color;
  (void)action;
  a = offset(0, -1, move, transformation);
  return play_attack_defend_n((1 + 2 - (color)), 1, 1, move, a);
}


x86 assembly (clang, -O0):
<autohelperowl_attackpat135>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x10(%rbp),%edx
mov    -0xc(%rbp),%ecx
xor    %edi,%edi
mov    $0xffffffff,%esi
call   1040 <offset@plt>
mov    %eax,-0x1c(%rbp)
mov    $0x3,%edi
sub    -0x14(%rbp),%edi
mov    -0x10(%rbp),%ecx
mov    -0x1c(%rbp),%r8d
mov    $0x1,%edx
mov    %edx,%esi
call   1030 <play_attack_defend_n@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<autohelperowl_attackpat135>:
push   %rbp
push   %rbx
push   %rax
mov    %ecx,%ebx
mov    %edx,%ebp
mov    %esi,%ecx
xor    %edi,%edi
mov    $0xffffffff,%esi
call   1040 <offset@plt>
mov    $0x3,%edi
sub    %ebx,%edi
mov    $0x1,%esi
mov    $0x1,%edx
mov    %ebp,%ecx
mov    %eax,%r8d
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <play_attack_defend_n@plt>

LLVM IR (-O0):
%struct.pattern = type { i32 }
define i32 @autohelperowl_attackpat135(%struct.pattern* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca %struct.pattern*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store %struct.pattern* %0, %struct.pattern** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%12 = load %struct.pattern*, %struct.pattern** %6
%13 = load i32, i32* %9
%14 = load i32, i32* %10
%15 = load i32, i32* %8
%16 = load i32, i32* %7
%17 = call i32 @offset(i32 0, i32 -1, i32 %15, i32 %16)
store i32 %17, i32* %11
%18 = load i32, i32* %9
%19 = sub nsw i32 3, %18
%20 = load i32, i32* %8
%21 = load i32, i32* %11
%22 = call i32 @play_attack_defend_n(i32 %19, i32 1, i32 1, i32 %20, i32 %21)
ret i32 %22
}

LLVM IR (-O2):
%struct.pattern = type { i32 }
define i32 @autohelperowl_attackpat135(%struct.pattern* nocapture readnone %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @offset(i32 0, i32 -1, i32 %2, i32 %1)
%7 = sub nsw i32 3, %3
%8 = tail call i32 @play_attack_defend_n(i32 %7, i32 1, i32 1, i32 %2, i32 %6)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ ngen(char *, char *, int);
void cgdefp(int v) { ngen("%s\t%d", ".long", v); }


x86 assembly (clang, -O0):
<cgdefp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xedb(%rip),%rdi
lea    0xeda(%rip),%rsi
call   1030 <ngen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgdefp>:
mov    %edi,%edx
lea    0xee7(%rip),%rdi
lea    0xee6(%rip),%rsi
jmp    1030 <ngen@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"%s\09%d\00"
@.str.1 = [6 x i8] c".long\00"
define void @cgdefp(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ngen(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"%s\09%d\00"
@.str.1 = [6 x i8] c".long\00"
define void @cgdefp(i32 %0) {
%2 = tail call i32 @ngen(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 %0)
ret void
}
int test_imm_84int8_mem(signed char *val) {
  return ((*val) & (0x84 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_84int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0x84,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_84int8_mem>:
testb  $0x84,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_84int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 132
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_84int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -124
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ getFmt(char const *);
int /*<<< orphan*/ sscanf(char const *, int /*<<< orphan*/, int *);
long my_atoi(const char *a) {
  int i = 0;
  sscanf(a, getFmt(a), &i);
  return i;
}


x86 assembly (clang, -O0):
<my_atoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <getFmt@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
lea    -0xc(%rbp),%rdx
call   1030 <sscanf@plt>
movslq -0xc(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_atoi>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movl   $0x0,0xc(%rsp)
call   1040 <getFmt@plt>
lea    0xc(%rsp),%rdx
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <sscanf@plt>
movslq 0xc(%rsp),%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i64 @my_atoi(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%4 = load i8*, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @getFmt(i8* %5)
%7 = call i32 @sscanf(i8* %4, i32 %6, i32* %3)
%8 = load i32, i32* %3
%9 = sext i32 %8 to i64
ret i64 %9
}

LLVM IR (-O2):
define i64 @my_atoi(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%4 = tail call i32 @getFmt(i8* %0)
%5 = call i32 @sscanf(i8* %0, i32 %4, i32* %2)
%6 = load i32, i32* %2
%7 = sext i32 %6 to i64
ret i64 %7
}
/* Type definitions */
struct cpufreq_affected_cpus {
  int dummy;
};

/* Variables and functions */
struct cpufreq_affected_cpus *sysfs_get_related_cpus(unsigned int);
struct cpufreq_affected_cpus *cpufreq_get_related_cpus(unsigned int cpu) {
  return sysfs_get_related_cpus(cpu);
}


x86 assembly (clang, -O0):
<cpufreq_get_related_cpus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sysfs_get_related_cpus@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpufreq_get_related_cpus>:
jmp    1030 <sysfs_get_related_cpus@plt>

LLVM IR (-O0):
%struct.cpufreq_affected_cpus = type { i32 }
define %struct.cpufreq_affected_cpus* @cpufreq_get_related_cpus(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call %struct.cpufreq_affected_cpus* @sysfs_get_related_cpus(i32 %3)
ret %struct.cpufreq_affected_cpus* %4
}

LLVM IR (-O2):
%struct.cpufreq_affected_cpus = type { i32 }
define %struct.cpufreq_affected_cpus* @cpufreq_get_related_cpus(i32 %0) {
%2 = tail call %struct.cpufreq_affected_cpus* @sysfs_get_related_cpus(i32 %0)
ret %struct.cpufreq_affected_cpus* %2
}
/* Variables and functions */
int ft_strlen(char const *);
int /*<<< orphan*/ write(int, char const *, int);
void ft_putstr(char const *s) {
  if (!s) {
    write(1, "(null)", 6);
    return;
  }
  write(1, s, ft_strlen(s));
}


x86 assembly (clang, -O0):
<ft_putstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1152 <ft_putstr+0x32>
mov    $0x1,%edi
lea    0xebd(%rip),%rsi
mov    $0x6,%edx
call   1030 <write@plt>
jmp    1173 <ft_putstr+0x53>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <ft_strlen@plt>
mov    -0x10(%rbp),%rsi
mov    %eax,%edx
mov    $0x1,%edi
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putstr>:
test   %rdi,%rdi
je     113e <ft_putstr+0x1e>
push   %rbx
mov    %rdi,%rbx
call   1040 <ft_strlen@plt>
mov    $0x1,%edi
mov    %rbx,%rsi
mov    %eax,%edx
pop    %rbx
jmp    1030 <write@plt>
lea    0xebb(%rip),%rsi
mov    $0x1,%edi
mov    $0x6,%edx
jmp    1030 <write@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"(null)\00"
define void @ft_putstr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = call i32 @write(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 6)
br label %12
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = load i8*, i8** %2
%10 = call i32 @ft_strlen(i8* %9)
%11 = call i32 @write(i32 1, i8* %8, i32 %10)
br label %12
12: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"(null)\00"
define void @ft_putstr(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 6)
br label %8
5: ; preds = %1
%6 = tail call i32 @ft_strlen(i8* %0)
%7 = tail call i32 @write(i32 1, i8* %0, i32 %6)
br label %8
8: ; preds = %5, %3
ret void
}
/* Variables and functions */
int atoi(int /*<<< orphan*/ *);
int /*<<< orphan*/ *getenv(char *);
int getJiffy() {
  if (getenv("NETSIM_JIFFY") == NULL)
    return 500;
  else
    return (atoi(getenv("NETSIM_JIFFY")));
}


x86 assembly (clang, -O0):
<getJiffy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <getenv@plt>
cmp    $0x0,%rax
jne    114a <getJiffy+0x2a>
movl   $0x1f4,-0x4(%rbp)
jmp    1161 <getJiffy+0x41>
lea    0xeaf(%rip),%rdi
call   1030 <getenv@plt>
mov    %rax,%rdi
call   1040 <atoi@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getJiffy>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <getenv@plt>
test   %rax,%rax
je     113b <getJiffy+0x1b>
mov    %rax,%rdi
pop    %rax
jmp    1040 <atoi@plt>
mov    $0x1f4,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"NETSIM_JIFFY\00"
define i32 @getJiffy() {
%1 = alloca i32
%2 = call i32* @getenv(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32* %2, null
br i1 %3, label %4, label %5
4: ; preds = %0
store i32 500, i32* %1
br label %8
5: ; preds = %0
%6 = call i32* @getenv(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @atoi(i32* %6)
store i32 %7, i32* %1
br label %8
8: ; preds = %5, %4
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
@.str = [13 x i8] c"NETSIM_JIFFY\00"
define i32 @getJiffy() {
%1 = tail call i32* @getenv(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i32* %1, null
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @atoi(i32* %1)
br label %5
5: ; preds = %0, %3
%6 = phi i32 [ %4, %3 ], [ 500, %0 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M570_f(char *s) {
  debug("M570_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M570_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M570_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M570_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M570_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M570_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M570_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
/* Variables and functions */
scalar_t__ isupper(char);
int IloscWielkichLiter(char *Tekst) {
  int Ilosc = 0;
  for (; *Tekst; ++Tekst)
    if (isupper(*Tekst))
      ++Ilosc;
  return Ilosc;
}


x86 assembly (clang, -O0):
<IloscWielkichLiter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1165 <IloscWielkichLiter+0x55>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
je     114f <IloscWielkichLiter+0x3f>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1154 <IloscWielkichLiter+0x44>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1123 <IloscWielkichLiter+0x13>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IloscWielkichLiter>:
push   %rbp
push   %rbx
push   %rax
mov    (%rdi),%al
test   %al,%al
je     114c <IloscWielkichLiter+0x3c>
mov    %rdi,%rbx
add    $0x1,%rbx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbl %al,%edi
call   1030 <isupper@plt>
cmp    $0x1,%rax
sbb    $0xffffffff,%ebp
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <IloscWielkichLiter+0x20>
jmp    114e <IloscWielkichLiter+0x3e>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @IloscWielkichLiter(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %17, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %20
8: ; preds = %4
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = call i64 @isupper(i8 signext %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %8
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %16
16: ; preds = %13, %8
br label %17
17: ; preds = %16
%18 = load i8*, i8** %2
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %2
br label %4
20: ; preds = %4
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @IloscWielkichLiter(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %13, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 0, %1 ]
%7 = phi i8* [ %12, %4 ], [ %0, %1 ]
%8 = tail call i64 @isupper(i8 signext %5)
%9 = icmp ne i64 %8, 0
%10 = zext i1 %9 to i32
%11 = add nuw nsw i32 %6, %10
%12 = getelementptr inbounds i8, i8* %7, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %4, %1
%16 = phi i32 [ 0, %1 ], [ %11, %4 ]
ret i32 %16
}
/* Type definitions */
struct sockaddr {
  int dummy;
};
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
int real_getsockname(int, struct sockaddr *, int /*<<< orphan*/ *);
int getsockname(int fd, struct sockaddr *addr, socklen_t *addrlen) {
  return real_getsockname(fd, addr, addrlen);
}


x86 assembly (clang, -O0):
<getsockname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <real_getsockname@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getsockname>:
jmp    1030 <real_getsockname@plt>

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
define i32 @getsockname(i32 %0, %struct.sockaddr* %1, i32* %2) {
%4 = alloca i32
%5 = alloca %struct.sockaddr*
%6 = alloca i32*
store i32 %0, i32* %4
store %struct.sockaddr* %1, %struct.sockaddr** %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = load %struct.sockaddr*, %struct.sockaddr** %5
%9 = load i32*, i32** %6
%10 = call i32 @real_getsockname(i32 %7, %struct.sockaddr* %8, i32* %9)
ret i32 %10
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
define i32 @getsockname(i32 %0, %struct.sockaddr* %1, i32* %2) {
%4 = tail call i32 @real_getsockname(i32 %0, %struct.sockaddr* %1, i32* %2)
ret i32 %4
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ genstatefn(char *, char *);
int /*<<< orphan*/ unlink(char *);
void invalidate_cache(char *devid) {
  struct stat cachestat;
  char statefilename[64];
  genstatefn(statefilename, devid);
  unlink(statefilename);
}


x86 assembly (clang, -O0):
<invalidate_cache>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x50(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <genstatefn@plt>
lea    -0x50(%rbp),%rdi
call   1030 <unlink@plt>
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<invalidate_cache>:
push   %rbx
sub    $0x40,%rsp
mov    %rdi,%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <genstatefn@plt>
mov    %rbx,%rdi
call   1030 <unlink@plt>
add    $0x40,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define void @invalidate_cache(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.stat
%4 = alloca [64 x i8]
store i8* %0, i8** %2
%5 = getelementptr inbounds [64 x i8], [64 x i8]* %4, i64 0, i64 0
%6 = load i8*, i8** %2
%7 = call i32 @genstatefn(i8* %5, i8* %6)
%8 = getelementptr inbounds [64 x i8], [64 x i8]* %4, i64 0, i64 0
%9 = call i32 @unlink(i8* %8)
ret void
}

LLVM IR (-O2):
define void @invalidate_cache(i8* %0) {
%2 = alloca [64 x i8]
%3 = getelementptr inbounds [64 x i8], [64 x i8]* %2, i64 0, i64 0
%4 = call i32 @genstatefn(i8* %3, i8* %0)
%5 = call i32 @unlink(i8* %3)
ret void
}
/* Variables and functions */
unsigned long long _castf64_u64(double);
unsigned long long test_castf64_u64(double __A) { return _castf64_u64(__A); }


x86 assembly (clang, -O0):
<test_castf64_u64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <_castf64_u64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_castf64_u64>:
jmp    1030 <_castf64_u64@plt>

LLVM IR (-O0):
define i64 @test_castf64_u64(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i64 @_castf64_u64(double %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @test_castf64_u64(double %0) {
%2 = tail call i64 @_castf64_u64(double %0)
ret i64 %2
}
/* Variables and functions */
int strlen(char const *);
scalar_t__ strncmp(char const *, char const *, int);
const char *has_prefix(const char *prefix, const char *str) {
  if (strncmp(prefix, str, strlen(prefix)) == 0) {
    return str + strlen(prefix);
  } else {
    return NULL;
  }
}


x86 assembly (clang, -O0):
<has_prefix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x28(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    %eax,%edx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
jne    1188 <has_prefix+0x68>
mov    -0x18(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,%ecx
mov    -0x30(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
jmp    1190 <has_prefix+0x70>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<has_prefix>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %eax,%edx
call   1030 <strncmp@plt>
test   %rax,%rax
je     1146 <has_prefix+0x26>
xor    %r14d,%r14d
jmp    1153 <has_prefix+0x33>
mov    %rbx,%rdi
call   1040 <strlen@plt>
cltq
add    %rax,%r14
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @has_prefix(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = load i8*, i8** %5
%8 = load i8*, i8** %4
%9 = call i32 @strlen(i8* %8)
%10 = call i64 @strncmp(i8* %6, i8* %7, i32 %9)
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %18
12: ; preds = %2
%13 = load i8*, i8** %5
%14 = load i8*, i8** %4
%15 = call i32 @strlen(i8* %14)
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %13, i64 %16
store i8* %17, i8** %3
br label %19
18: ; preds = %2
store i8* null, i8** %3
br label %19
19: ; preds = %18, %12
%20 = load i8*, i8** %3
ret i8* %20
}

LLVM IR (-O2):
define i8* @has_prefix(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = tail call i64 @strncmp(i8* %0, i8* %1, i32 %3)
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %2
%7 = tail call i32 @strlen(i8* %0)
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %1, i64 %8
br label %10
10: ; preds = %2, %6
%11 = phi i8* [ %9, %6 ], [ null, %2 ]
ret i8* %11
}
/* Variables and functions */
char *ctermid(char *);
char *ctermid_r(char *s) { return (s) ? ctermid(s) : NULL; }


x86 assembly (clang, -O0):
<ctermid_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1139 <ctermid_r+0x29>
mov    -0x8(%rbp),%rdi
call   1030 <ctermid@plt>
mov    %rax,-0x10(%rbp)
jmp    1144 <ctermid_r+0x34>
xor    %eax,%eax
mov    %rax,-0x10(%rbp)
jmp    1144 <ctermid_r+0x34>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctermid_r>:
test   %rdi,%rdi
je     111a <ctermid_r+0xa>
jmp    1030 <ctermid@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @ctermid_r(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i8* @ctermid(i8* %6)
br label %9
8: ; preds = %1
br label %9
9: ; preds = %8, %5
%10 = phi i8* [ %7, %5 ], [ null, %8 ]
ret i8* %10
}

LLVM IR (-O2):
define i8* @ctermid_r(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i8* @ctermid(i8* %0)
br label %5
5: ; preds = %1, %3
%6 = phi i8* [ %4, %3 ], [ null, %1 ]
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
__attribute__((__noreturn__)) void exitfunc20(void) {
  printf("Executing exitfunc"
         "20"
         ".\n");
  exit(0);
}


x86 assembly (clang, -O0):
<exitfunc20>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<exitfunc20>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"Executing exitfunc20.\0A\00"
define void @exitfunc20() {
%1 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [22 x i8] c"Executing exitfunc20.\00"
define void @exitfunc20() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, int, int);
void inspect_fw_phexdec(const char *label, uint32_t val) {
  printf("%-23s: 0x%08x / %8u bytes\n", label, val, val);
}


x86 assembly (clang, -O0):
<inspect_fw_phexdec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0xc(%rbp),%ecx
lea    0xed0(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inspect_fw_phexdec>:
mov    %esi,%ecx
mov    %rdi,%rsi
lea    0xee4(%rip),%rdi
mov    %ecx,%edx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"%-23s: 0x%08x / %8u bytes\0A\00"
define void @inspect_fw_phexdec(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = load i32, i32* %4
%8 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %5, i32 %6, i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"%-23s: 0x%08x / %8u bytes\0A\00"
define void @inspect_fw_phexdec(i8* %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1, i32 %1)
ret void
}
/* Variables and functions */
char getchar();
void *ui_thread(void *direction_ptr) {
  for (;;) {
    char move = getchar();
    if (move == 'w' || move == 'a' || move == 's' || move == 'd') {
      *((char *)direction_ptr) = move;
    }
  }
  return NULL;
}


x86 assembly (clang, -O0):
<ui_thread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <getchar@plt>
mov    %al,-0x9(%rbp)
movsbl -0x9(%rbp),%eax
cmp    $0x77,%eax
je     115a <ui_thread+0x4a>
movsbl -0x9(%rbp),%eax
cmp    $0x61,%eax
je     115a <ui_thread+0x4a>
movsbl -0x9(%rbp),%eax
cmp    $0x73,%eax
je     115a <ui_thread+0x4a>
movsbl -0x9(%rbp),%eax
cmp    $0x64,%eax
jne    1163 <ui_thread+0x53>
mov    -0x9(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
jmp    111c <ui_thread+0xc>

x86 assembly (clang, -O2):
<ui_thread>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    $0x440009,%r14d
nopl   (%rax)
xor    %eax,%eax
call   1030 <getchar@plt>
lea    -0x61(%rax),%ecx
cmp    $0x16,%cl
ja     1120 <ui_thread+0x10>
movzbl %cl,%ecx
bt     %rcx,%r14
jae    1120 <ui_thread+0x10>
mov    %al,(%rbx)
jmp    1120 <ui_thread+0x10>

LLVM IR (-O0):
define i8* @ui_thread(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
store i8* %0, i8** %2
br label %4
4: ; preds = %24, %1
%5 = call signext i8 (...) @getchar()
store i8 %5, i8* %3
%6 = load i8, i8* %3
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 119
br i1 %8, label %21, label %9
9: ; preds = %4
%10 = load i8, i8* %3
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 97
br i1 %12, label %21, label %13
13: ; preds = %9
%14 = load i8, i8* %3
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 115
br i1 %16, label %21, label %17
17: ; preds = %13
%18 = load i8, i8* %3
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 100
br i1 %20, label %21, label %24
21: ; preds = %17, %13, %9, %4
%22 = load i8, i8* %3
%23 = load i8*, i8** %2
store i8 %22, i8* %23
br label %24
24: ; preds = %21, %17
br label %4
}

LLVM IR (-O2):
define noalias i8* @ui_thread(i8* nocapture writeonly %0) {
br label %2
2: ; preds = %4, %1
%3 = tail call signext i8 (...) @getchar()
switch i8 %3, label %4 [
i8 119, label %5
i8 115, label %5
i8 100, label %5
i8 97, label %5
]
4: ; preds = %2, %5
br label %2
5: ; preds = %2, %2, %2, %2
store i8 %3, i8* %0
br label %4
}
void s5pv210_default_sdhci1(void) {}


x86 assembly (clang, -O0):
<s5pv210_default_sdhci1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s5pv210_default_sdhci1>:
ret

LLVM IR (-O0):
define void @s5pv210_default_sdhci1() {
ret void
}

LLVM IR (-O2):
define void @s5pv210_default_sdhci1() {
ret void
}
/* Variables and functions */
int fastrand();
int frag_random(int x, int y, int foo) { return fastrand() % 255; }


x86 assembly (clang, -O0):
<frag_random>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    $0x0,%al
call   1030 <fastrand@plt>
mov    $0xff,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<frag_random>:
push   %rax
xor    %eax,%eax
call   1030 <fastrand@plt>
movslq %eax,%rcx
imul   $0xffffffff80808081,%rcx,%rax
shr    $0x20,%rax
add    %ecx,%eax
mov    %eax,%edx
shr    $0x1f,%edx
sar    $0x7,%eax
add    %edx,%eax
mov    %eax,%edx
shl    $0x8,%edx
sub    %edx,%eax
add    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @frag_random(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = call i32 (...) @fastrand()
%8 = srem i32 %7, 255
ret i32 %8
}

LLVM IR (-O2):
define i32 @frag_random(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 (...) @fastrand()
%5 = srem i32 %4, 255
ret i32 %5
}
/* Variables and functions */
int listen(int, int);
int SLLIB_listenSocket(int *sock) {
  if (listen(*sock, 5) == -1)
    return (-1);
  return 0;
}


x86 assembly (clang, -O0):
<SLLIB_listenSocket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
mov    $0x5,%esi
call   1030 <listen@plt>
cmp    $0xffffffff,%eax
jne    1141 <SLLIB_listenSocket+0x31>
movl   $0xffffffff,-0x4(%rbp)
jmp    1148 <SLLIB_listenSocket+0x38>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SLLIB_listenSocket>:
push   %rax
mov    (%rdi),%edi
mov    $0x5,%esi
call   1030 <listen@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
sete   %cl
neg    %ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @SLLIB_listenSocket(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = load i32, i32* %4
%6 = call i32 @listen(i32 %5, i32 5)
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 -1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @SLLIB_listenSocket(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @listen(i32 %2, i32 5)
%4 = icmp eq i32 %3, -1
%5 = sext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
char *ctime(int /*<<< orphan*/ *);
int /*<<< orphan*/ fflush(int /*<<< orphan*/ *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char *);
void GPS_Fmt_Print_Time(time_t Time, FILE *outf) {
  (void)fprintf(outf, "%s", ctime(&Time));
  fflush(outf);
  return;
}


x86 assembly (clang, -O0):
<GPS_Fmt_Print_Time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
lea    -0x4(%rbp),%rdi
call   1030 <ctime@plt>
mov    -0x18(%rbp),%rdi
mov    %rax,%rdx
lea    0xea2(%rip),%rsi
call   1040 <fprintf@plt>
mov    -0x10(%rbp),%rdi
call   1050 <fflush@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPS_Fmt_Print_Time>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
mov    %edi,0xc(%rsp)
lea    0xc(%rsp),%rdi
call   1030 <ctime@plt>
mov    %rax,%rdi
mov    %rbx,%rsi
call   1040 <fputs@plt>
mov    %rbx,%rdi
call   1050 <fflush@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @GPS_Fmt_Print_Time(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = call i8* @ctime(i32* %3)
%7 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = load i32*, i32** %4
%9 = call i32 @fflush(i32* %8)
ret void
}

LLVM IR (-O2):
define void @GPS_Fmt_Print_Time(i32 %0, i32* nocapture %1) {
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i8* @ctime(i32* %3)
%5 = call i32 @fputs(i8* %4, i32* %1)
%6 = call i32 @fflush(i32* %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int _mm_movemask_pi8(int /*<<< orphan*/);
int test_mm_movemask_pi8(__m64 a) { return _mm_movemask_pi8(a); }


x86 assembly (clang, -O0):
<test_mm_movemask_pi8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_mm_movemask_pi8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_movemask_pi8>:
jmp    1030 <_mm_movemask_pi8@plt>

LLVM IR (-O0):
define i32 @test_mm_movemask_pi8(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_mm_movemask_pi8(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test_mm_movemask_pi8(i32 %0) {
%2 = tail call i32 @_mm_movemask_pi8(i32 %0)
ret i32 %2
}
void g_main_loop_is_running() {}


x86 assembly (clang, -O0):
<g_main_loop_is_running>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_main_loop_is_running>:
ret

LLVM IR (-O0):
define void @g_main_loop_is_running() {
ret void
}

LLVM IR (-O2):
define void @g_main_loop_is_running() {
ret void
}
/* Variables and functions */
double rt_powd_snf(double const, double);
void power(const double a[2048], double y[2048]) {
  int k;
  for (k = 0; k < 2048; k++) {
    y[k] = rt_powd_snf(a[k], 3.0);
  }
}


x86 assembly (clang, -O0):
<power>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x800,-0x14(%rbp)
jge    1169 <power+0x59>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
movsd  0xeb7(%rip),%xmm1
call   1030 <rt_powd_snf@plt>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsd  %xmm0,(%rax,%rcx,8)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1127 <power+0x17>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<power>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
xor    %ebx,%ebx
nopl   (%rax)
movsd  (%r15,%rbx,8),%xmm0
movsd  0xed2(%rip),%xmm1
call   1030 <rt_powd_snf@plt>
movsd  %xmm0,(%r14,%rbx,8)
add    $0x1,%rbx
cmp    $0x800,%rbx
jne    1120 <power+0x10>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @power(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
%5 = alloca i32
store double* %0, double** %3
store double* %1, double** %4
store i32 0, i32* %5
br label %6
6: ; preds = %20, %2
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 2048
br i1 %8, label %9, label %23
9: ; preds = %6
%10 = load double*, double** %3
%11 = load i32, i32* %5
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds double, double* %10, i64 %12
%14 = load double, double* %13
%15 = call double @rt_powd_snf(double %14, double 3.000000e+00)
%16 = load double*, double** %4
%17 = load i32, i32* %5
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds double, double* %16, i64 %18
store double %15, double* %19
br label %20
20: ; preds = %9
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
store i32 %22, i32* %5
br label %6
23: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @power(double* nocapture %0, double* nocapture writeonly %1) {
br label %3
3: ; preds = %2, %3
%4 = phi i64 [ 0, %2 ], [ %9, %3 ]
%5 = getelementptr inbounds double, double* %0, i64 %4
%6 = load double, double* %5
%7 = tail call double @rt_powd_snf(double %6, double 3.000000e+00)
%8 = getelementptr inbounds double, double* %1, i64 %4
store double %7, double* %8
%9 = add nuw nsw i64 %4, 1
%10 = icmp eq i64 %9, 2048
br i1 %10, label %11, label %3
11: ; preds = %3
ret void
}
void testNonDiagnosableBranchArithmetic(int a, int b) {
  if (a - b) {
    *(volatile int *)0 = 1;
  }
}


x86 assembly (clang, -O0):
<testNonDiagnosableBranchArithmetic>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
cmp    $0x0,%eax
je     1121 <testNonDiagnosableBranchArithmetic+0x21>
xor    %eax,%eax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<testNonDiagnosableBranchArithmetic>:
cmp    %esi,%edi
je     110f <testNonDiagnosableBranchArithmetic+0xf>
movl   $0x1,0x0
ret

LLVM IR (-O0):
define void @testNonDiagnosableBranchArithmetic(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %2
store volatile i32 1, i32* null
br label %10
10: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
define void @testNonDiagnosableBranchArithmetic(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, %1
br i1 %3, label %5, label %4
4: ; preds = %2
store volatile i32 1, i32* null
br label %5
5: ; preds = %4, %2
ret void
}
/* Variables and functions */
void cmdline_print_cfg(void) {}


x86 assembly (clang, -O0):
<cmdline_print_cfg>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmdline_print_cfg>:
ret

LLVM IR (-O0):
define void @cmdline_print_cfg() {
ret void
}

LLVM IR (-O2):
define void @cmdline_print_cfg() {
ret void
}
/* Type definitions */
struct sched_param {
  int dummy;
};
typedef int /*<<< orphan*/ pthread_attr_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int pthread_attr_setschedparam(pthread_attr_t *a, const struct sched_param *b) {
  assert(0);
}


x86 assembly (clang, -O0):
<pthread_attr_setschedparam>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
xor    %edi,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_attr_setschedparam>:
xor    %edi,%edi
jmp    1030 <assert@plt>

LLVM IR (-O0):
%struct.sched_param = type { i32 }
define i32 @pthread_attr_setschedparam(i32* %0, %struct.sched_param* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca %struct.sched_param*
store i32* %0, i32** %4
store %struct.sched_param* %1, %struct.sched_param** %5
%6 = call i32 @assert(i32 0)
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
%struct.sched_param = type { i32 }
define i32 @pthread_attr_setschedparam(i32* nocapture readnone %0, %struct.sched_param* nocapture readnone %1) {
%3 = tail call i32 @assert(i32 0)
ret i32 undef
}
int displayTextOcurrences(void *index, unsigned char *pattern,
                          unsigned long length, unsigned int radixDisplay) {
  return 99;
}


x86 assembly (clang, -O0):
<displayTextOcurrences>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    $0x63,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<displayTextOcurrences>:
mov    $0x63,%eax
ret

LLVM IR (-O0):
define i32 @displayTextOcurrences(i8* %0, i8* %1, i64 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i32 %3, i32* %8
ret i32 99
}

LLVM IR (-O2):
define i32 @displayTextOcurrences(i8* nocapture readnone %0, i8* nocapture readnone %1, i64 %2, i32 %3) {
ret i32 99
}
int is_upperchar_space(const char c) {
  if (c == ' ')
    return 1;
  if (c >= 'A' && c <= 'Z')
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<is_upperchar_space>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x20,%eax
jne    1123 <is_upperchar_space+0x23>
movl   $0x1,-0x4(%rbp)
jmp    1150 <is_upperchar_space+0x50>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     1149 <is_upperchar_space+0x49>
movsbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jg     1149 <is_upperchar_space+0x49>
movl   $0x1,-0x4(%rbp)
jmp    1150 <is_upperchar_space+0x50>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_upperchar_space>:
cmp    $0x20,%dil
sete   %al
add    $0xbf,%dil
cmp    $0x1a,%dil
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_upperchar_space(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 32
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %18
8: ; preds = %1
%9 = load i8, i8* %3
%10 = sext i8 %9 to i32
%11 = icmp sge i32 %10, 65
br i1 %11, label %12, label %17
12: ; preds = %8
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = icmp sle i32 %14, 90
br i1 %15, label %16, label %17
16: ; preds = %12
store i32 1, i32* %2
br label %18
17: ; preds = %12, %8
store i32 0, i32* %2
br label %18
18: ; preds = %17, %16, %7
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @is_upperchar_space(i8 signext %0) {
%2 = icmp eq i8 %0, 32
%3 = add i8 %0, -65
%4 = icmp ult i8 %3, 26
%5 = or i1 %2, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRCORE_N16_swap(char *, int, int);
void U_WMRMOVETO_swap(char *record, int torev) {
  U_WMRCORE_N16_swap(record, 2, torev);
}


x86 assembly (clang, -O0):
<U_WMRMOVETO_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    $0x2,%esi
call   1030 <U_WMRCORE_N16_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRMOVETO_swap>:
mov    %esi,%edx
mov    $0x2,%esi
jmp    1030 <U_WMRCORE_N16_swap@plt>

LLVM IR (-O0):
define void @U_WMRMOVETO_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRCORE_N16_swap(i8* %5, i32 2, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMRMOVETO_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRCORE_N16_swap(i8* %0, i32 2, i32 %1)
ret void
}
/* Variables and functions */
char *make_scalar(char *, char *);
char *min(char *field) { return make_scalar("MIN", field); }


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <make_scalar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <make_scalar@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"MIN\00"
define i8* @min(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @make_scalar(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i8* %4
}

LLVM IR (-O2):
@.str = [4 x i8] c"MIN\00"
define i8* @min(i8* %0) {
%2 = tail call i8* @make_scalar(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ YvdV(int /*<<< orphan*/ *, int /*<<< orphan*/);
int /*<<< orphan*/ Zstr(char *);
void ZthrowCstringNil(char *text) { YvdV(NULL, Zstr(text)); }


x86 assembly (clang, -O0):
<ZthrowCstringNil>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <Zstr@plt>
mov    %eax,%esi
xor    %eax,%eax
mov    %eax,%edi
call   1030 <YvdV@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZthrowCstringNil>:
push   %rax
call   1040 <Zstr@plt>
xor    %edi,%edi
mov    %eax,%esi
pop    %rax
jmp    1030 <YvdV@plt>

LLVM IR (-O0):
define void @ZthrowCstringNil(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @Zstr(i8* %3)
%5 = call i32 @YvdV(i32* null, i32 %4)
ret void
}

LLVM IR (-O2):
define void @ZthrowCstringNil(i8* %0) {
%2 = tail call i32 @Zstr(i8* %0)
%3 = tail call i32 @YvdV(i32* null, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ a();
int main(int argc, char **argv) {
  a();
  a();
  a();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <a@plt>
mov    $0x0,%al
call   1030 <a@plt>
mov    $0x0,%al
call   1030 <a@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <a@plt>
xor    %eax,%eax
call   1030 <a@plt>
xor    %eax,%eax
call   1030 <a@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @a()
%7 = call i32 (...) @a()
%8 = call i32 (...) @a()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @a()
%4 = tail call i32 (...) @a()
%5 = tail call i32 (...) @a()
ret i32 0
}