xunge/DecIR huggingface dataset:
int zhead_has_mtime(const char *p) { return !!(p[4] || p[5] || p[6] || p[7]); }


x86 assembly (clang, -O0):
<zhead_has_mtime>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl 0x4(%rax),%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    115b <zhead_has_mtime+0x5b>
mov    -0x8(%rbp),%rax
movsbl 0x5(%rax),%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    115b <zhead_has_mtime+0x5b>
mov    -0x8(%rbp),%rax
movsbl 0x6(%rax),%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    115b <zhead_has_mtime+0x5b>
mov    -0x8(%rbp),%rax
movsbl 0x7(%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zhead_has_mtime>:
mov    $0x1,%eax
cmpb   $0x0,0x4(%rdi)
je     110c <zhead_has_mtime+0xc>
ret
cmpb   $0x0,0x5(%rdi)
jne    110b <zhead_has_mtime+0xb>
cmpb   $0x0,0x6(%rdi)
jne    110b <zhead_has_mtime+0xb>
xor    %eax,%eax
cmpb   $0x0,0x7(%rdi)
setne  %al
ret

LLVM IR (-O0):
define i32 @zhead_has_mtime(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 4
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %26, label %8
8: ; preds = %1
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 5
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %26, label %14
14: ; preds = %8
%15 = load i8*, i8** %2
%16 = getelementptr inbounds i8, i8* %15, i64 6
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp ne i32 %18, 0
br i1 %19, label %26, label %20
20: ; preds = %14
%21 = load i8*, i8** %2
%22 = getelementptr inbounds i8, i8* %21, i64 7
%23 = load i8, i8* %22
%24 = sext i8 %23 to i32
%25 = icmp ne i32 %24, 0
br label %26
26: ; preds = %20, %14, %8, %1
%27 = phi i1 [ true, %14 ], [ true, %8 ], [ true, %1 ], [ %25, %20 ]
%28 = xor i1 %27, true
%29 = xor i1 %28, true
%30 = zext i1 %29 to i32
ret i32 %30
}

LLVM IR (-O2):
define i32 @zhead_has_mtime(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 4
%3 = load i8, i8* %2
%4 = icmp eq i8 %3, 0
br i1 %4, label %5, label %18
5: ; preds = %1
%6 = getelementptr inbounds i8, i8* %0, i64 5
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
br i1 %8, label %9, label %18
9: ; preds = %5
%10 = getelementptr inbounds i8, i8* %0, i64 6
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %18
13: ; preds = %9
%14 = getelementptr inbounds i8, i8* %0, i64 7
%15 = load i8, i8* %14
%16 = icmp ne i8 %15, 0
%17 = zext i1 %16 to i32
br label %18
18: ; preds = %13, %9, %5, %1
%19 = phi i32 [ 1, %9 ], [ 1, %5 ], [ 1, %1 ], [ %17, %13 ]
ret i32 %19
}
/* Type definitions */
typedef int /*<<< orphan*/ a;

/* Variables and functions */
int /*<<< orphan*/ print(int *, int);
int /*<<< orphan*/ rotate(int *, int, int);
void main() {
  int a[] = {0, 1, 2, 3, 4, 5};
  int len = sizeof(a) / sizeof(a[0]);
  rotate(a, 2, len);
  print(a, len);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0xed1(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xece(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xecb(%rip),%rax
mov    %rax,-0x10(%rbp)
movl   $0x6,-0x24(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%edx
mov    $0x2,%esi
call   1040 <rotate@plt>
lea    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%esi
call   1030 <print@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x20,%rsp
mov    0xee4(%rip),%rax
mov    %rax,0x10(%rsp)
movaps 0xec8(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x2,%esi
mov    $0x6,%edx
call   1040 <rotate@plt>
mov    %rbx,%rdi
mov    $0x6,%esi
call   1030 <print@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.a = [6 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5]
define void @main() {
%1 = alloca [6 x i32]
%2 = alloca i32
%3 = bitcast [6 x i32]* %1 to i8*
store i32 6, i32* %2
%4 = getelementptr inbounds [6 x i32], [6 x i32]* %1, i64 0, i64 0
%5 = load i32, i32* %2
%6 = call i32 @rotate(i32* %4, i32 2, i32 %5)
%7 = getelementptr inbounds [6 x i32], [6 x i32]* %1, i64 0, i64 0
%8 = load i32, i32* %2
%9 = call i32 @print(i32* %7, i32 %8)
ret void
}

LLVM IR (-O2):
@__const.main.a = [6 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5]
define void @main() {
%1 = alloca [6 x i32]
%2 = bitcast [6 x i32]* %1 to i8*
%3 = getelementptr inbounds [6 x i32], [6 x i32]* %1, i64 0, i64 0
%4 = call i32 @rotate(i32* %3, i32 2, i32 6)
%5 = call i32 @print(i32* %3, i32 6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ errno;
int /*<<< orphan*/ error(char *, int /*<<< orphan*/);
scalar_t__ file_write(char *, void *, unsigned int);
int /*<<< orphan*/ strerror(int /*<<< orphan*/);
int flash_ulpmc(void *data, unsigned sz) {
  if (file_write("/dev/ulpmc-fwupdate", data, sz)) {
    error("ULPMC flashing failed: %s\n", strerror(errno));
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<flash_ulpmc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
lea    0xeb3(%rip),%rdi
call   1040 <file_write@plt>
cmp    $0x0,%rax
je     1184 <flash_ulpmc+0x54>
mov    0x2e7d(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
mov    %eax,%esi
lea    0xea1(%rip),%rdi
call   1030 <error@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    118b <flash_ulpmc+0x5b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flash_ulpmc>:
push   %rax
mov    %esi,%edx
mov    %rdi,%rsi
lea    0xec3(%rip),%rdi
call   1040 <file_write@plt>
test   %rax,%rax
je     116a <flash_ulpmc+0x3a>
mov    0x2e92(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
lea    0xeb8(%rip),%rdi
mov    %eax,%esi
call   1030 <error@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"/dev/ulpmc-fwupdate\00"
@.str.1 = [27 x i8] c"ULPMC flashing failed: %s\0A\00"
@errno = global i32 0
define i32 @flash_ulpmc(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i8*, i8** %4
%7 = load i32, i32* %5
%8 = call i64 @file_write(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %6, i32 %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = load i32, i32* @errno
%12 = call i32 @strerror(i32 %11)
%13 = call i32 @error(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i32 %12)
store i32 -1, i32* %3
br label %15
14: ; preds = %2
store i32 0, i32* %3
br label %15
15: ; preds = %14, %10
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
@.str = [20 x i8] c"/dev/ulpmc-fwupdate\00"
@.str.1 = [27 x i8] c"ULPMC flashing failed: %s\0A\00"
@errno = global i32 0
define i32 @flash_ulpmc(i8* %0, i32 %1) {
%3 = tail call i64 @file_write(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = load i32, i32* @errno
%7 = tail call i32 @strerror(i32 %6)
%8 = tail call i32 @error(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i32 %7)
br label %9
9: ; preds = %2, %5
%10 = phi i32 [ -1, %5 ], [ 0, %2 ]
ret i32 %10
}
/* Type definitions */
struct addrinfo {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ freeaddrinfo(struct addrinfo *);
void Freeaddrinfo(struct addrinfo *res) { freeaddrinfo(res); }


x86 assembly (clang, -O0):
<Freeaddrinfo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <freeaddrinfo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Freeaddrinfo>:
jmp    1030 <freeaddrinfo@plt>

LLVM IR (-O0):
%struct.addrinfo = type { i32 }
define void @Freeaddrinfo(%struct.addrinfo* %0) {
%2 = alloca %struct.addrinfo*
store %struct.addrinfo* %0, %struct.addrinfo** %2
%3 = load %struct.addrinfo*, %struct.addrinfo** %2
%4 = call i32 @freeaddrinfo(%struct.addrinfo* %3)
ret void
}

LLVM IR (-O2):
%struct.addrinfo = type { i32 }
define void @Freeaddrinfo(%struct.addrinfo* %0) {
%2 = tail call i32 @freeaddrinfo(%struct.addrinfo* %0)
ret void
}
/* Type definitions */
struct reset_control {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ WARN_ON(int);
void reset_control_put(struct reset_control *rstc) { WARN_ON(1); }


x86 assembly (clang, -O0):
<reset_control_put>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%edi
call   1030 <WARN_ON@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reset_control_put>:
mov    $0x1,%edi
jmp    1030 <WARN_ON@plt>

LLVM IR (-O0):
%struct.reset_control = type { i32 }
define void @reset_control_put(%struct.reset_control* %0) {
%2 = alloca %struct.reset_control*
store %struct.reset_control* %0, %struct.reset_control** %2
%3 = call i32 @WARN_ON(i32 1)
ret void
}

LLVM IR (-O2):
%struct.reset_control = type { i32 }
define void @reset_control_put(%struct.reset_control* nocapture readnone %0) {
%2 = tail call i32 @WARN_ON(i32 1)
ret void
}
char *search_replace_character(char *source_destination, char search_character,
                               char replace_character) {
  char *ptr = source_destination;
  while (*ptr) {
    if (*ptr == search_character)
      *ptr = replace_character;
    ptr++;
  }
  return source_destination;
}


x86 assembly (clang, -O0):
<search_replace_character>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     1155 <search_replace_character+0x55>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jne    1144 <search_replace_character+0x44>
mov    -0xa(%rbp),%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    111b <search_replace_character+0x1b>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<search_replace_character>:
mov    %rdi,%rax
mov    (%rdi),%cl
test   %cl,%cl
je     1125 <search_replace_character+0x25>
lea    0x1(%rax),%rdi
jmp    111b <search_replace_character+0x1b>
nop
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
je     1125 <search_replace_character+0x25>
cmp    %sil,%cl
jne    1110 <search_replace_character+0x10>
mov    %dl,-0x1(%rdi)
jmp    1110 <search_replace_character+0x10>
ret

LLVM IR (-O0):
define i8* @search_replace_character(i8* %0, i8 signext %1, i8 signext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8*
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%8 = load i8*, i8** %4
store i8* %8, i8** %7
br label %9
9: ; preds = %23, %3
%10 = load i8*, i8** %7
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %26
13: ; preds = %9
%14 = load i8*, i8** %7
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = load i8, i8* %5
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %16, %18
br i1 %19, label %20, label %23
20: ; preds = %13
%21 = load i8, i8* %6
%22 = load i8*, i8** %7
store i8 %21, i8* %22
br label %23
23: ; preds = %20, %13
%24 = load i8*, i8** %7
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %7
br label %9
26: ; preds = %9
%27 = load i8*, i8** %4
ret i8* %27
}

LLVM IR (-O2):
define i8* @search_replace_character(i8* returned %0, i8 signext %1, i8 signext %2) {
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %15, label %6
6: ; preds = %3, %11
%7 = phi i8 [ %13, %11 ], [ %4, %3 ]
%8 = phi i8* [ %12, %11 ], [ %0, %3 ]
%9 = icmp eq i8 %7, %1
br i1 %9, label %10, label %11
10: ; preds = %6
store i8 %2, i8* %8
br label %11
11: ; preds = %10, %6
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %6
15: ; preds = %11, %3
ret i8* %0
}
/* Variables and functions */
int accumulated_sum(int);
int main() {
  int i = 0;
  for (; i < 10; i++) {
    accumulated_sum(i);
  }
  return accumulated_sum(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    1146 <main+0x36>
mov    -0x8(%rbp),%edi
call   1030 <accumulated_sum@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %edi,%edi
call   1030 <accumulated_sum@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <accumulated_sum@plt>
mov    $0x1,%edi
call   1030 <accumulated_sum@plt>
mov    $0x2,%edi
call   1030 <accumulated_sum@plt>
mov    $0x3,%edi
call   1030 <accumulated_sum@plt>
mov    $0x4,%edi
call   1030 <accumulated_sum@plt>
mov    $0x5,%edi
call   1030 <accumulated_sum@plt>
mov    $0x6,%edi
call   1030 <accumulated_sum@plt>
mov    $0x7,%edi
call   1030 <accumulated_sum@plt>
mov    $0x8,%edi
call   1030 <accumulated_sum@plt>
mov    $0x9,%edi
call   1030 <accumulated_sum@plt>
xor    %edi,%edi
pop    %rax
jmp    1030 <accumulated_sum@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %9, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = load i32, i32* %2
%8 = call i32 @accumulated_sum(i32 %7)
br label %9
9: ; preds = %6
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
br label %3
12: ; preds = %3
%13 = call i32 @accumulated_sum(i32 0)
ret i32 %13
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @accumulated_sum(i32 0)
%2 = tail call i32 @accumulated_sum(i32 1)
%3 = tail call i32 @accumulated_sum(i32 2)
%4 = tail call i32 @accumulated_sum(i32 3)
%5 = tail call i32 @accumulated_sum(i32 4)
%6 = tail call i32 @accumulated_sum(i32 5)
%7 = tail call i32 @accumulated_sum(i32 6)
%8 = tail call i32 @accumulated_sum(i32 7)
%9 = tail call i32 @accumulated_sum(i32 8)
%10 = tail call i32 @accumulated_sum(i32 9)
%11 = tail call i32 @accumulated_sum(i32 0)
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ cache_off();
int /*<<< orphan*/ cache_on();
void set_cache(int val) {
  switch (val) {
  case 0:
    cache_off();
    break;
  case 1:
    cache_on();
    break;
  }
}


x86 assembly (clang, -O0):
<set_cache>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
test   %eax,%eax
je     114f <set_cache+0x2f>
jmp    113e <set_cache+0x1e>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
je     115b <set_cache+0x3b>
jmp    1162 <set_cache+0x42>
mov    $0x0,%al
call   1040 <cache_off@plt>
jmp    1162 <set_cache+0x42>
mov    $0x0,%al
call   1030 <cache_on@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_cache>:
cmp    $0x1,%edi
je     1130 <set_cache+0x10>
test   %edi,%edi
jne    1137 <set_cache+0x17>
xor    %eax,%eax
jmp    1040 <cache_off@plt>
xor    %eax,%eax
jmp    1030 <cache_on@plt>
ret

LLVM IR (-O0):
define void @set_cache(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
switch i32 %3, label %8 [
i32 0, label %4
i32 1, label %6
]
4: ; preds = %1
%5 = call i32 (...) @cache_off()
br label %8
6: ; preds = %1
%7 = call i32 (...) @cache_on()
br label %8
8: ; preds = %1, %6, %4
ret void
}

LLVM IR (-O2):
define void @set_cache(i32 %0) {
switch i32 %0, label %6 [
i32 0, label %2
i32 1, label %4
]
2: ; preds = %1
%3 = tail call i32 (...) @cache_off()
br label %6
4: ; preds = %1
%5 = tail call i32 (...) @cache_on()
br label %6
6: ; preds = %1, %4, %2
ret void
}
int test_imm_D5int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0xD5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D5int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0xd5,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D5int64_midword_mem>:
testb  $0xd5,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D5int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 213
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_D5int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 13959168
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ opt;

/* Variables and functions */
int setsockopt(int, int, int, int *, int);
int __sapi_sock_reset_optint(int sock, int so_lvl, int opt_name) {
  int opt = 0;
  return setsockopt(sock, so_lvl, opt_name, &opt, sizeof(opt));
}


x86 assembly (clang, -O0):
<__sapi_sock_reset_optint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    -0x10(%rbp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sapi_sock_reset_optint>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @__sapi_sock_reset_optint(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @setsockopt(i32 %8, i32 %9, i32 %10, i32* %7, i32 4)
ret i32 %11
}

LLVM IR (-O2):
define i32 @__sapi_sock_reset_optint(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = bitcast i32* %4 to i8*
store i32 0, i32* %4
%6 = call i32 @setsockopt(i32 %0, i32 %1, i32 %2, i32* %4, i32 4)
ret i32 %6
}
int ak880x_pm_init(void) { return 0; }


x86 assembly (clang, -O0):
<ak880x_pm_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ak880x_pm_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ak880x_pm_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @ak880x_pm_init() {
ret i32 0
}
/* Variables and functions */
size_t ip_hash(const void *ip, const size_t len) {
  return *(unsigned int *)&ip;
}


x86 assembly (clang, -O0):
<ip_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ip_hash>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i64 @ip_hash(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = bitcast i8** %3 to i32*
%6 = load i32, i32* %5
%7 = zext i32 %6 to i64
ret i64 %7
}

LLVM IR (-O2):
define i64 @ip_hash(i8* %0, i64 %1) {
%3 = ptrtoint i8* %0 to i64
%4 = and i64 %3, 4294967295
ret i64 %4
}
int lt_dlinit(void) { return 0; }


x86 assembly (clang, -O0):
<lt_dlinit>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lt_dlinit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @lt_dlinit() {
ret i32 0
}

LLVM IR (-O2):
define i32 @lt_dlinit() {
ret i32 0
}
void atmc_add64(volatile unsigned long long *address,
                unsigned long long value) {
  asm volatile("lock ; "
               "addq %1,%0"
               : "=m"(*address)
               : "ir"(value), "m"(*address));
}


x86 assembly (clang, -O0):
<atmc_add64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rdx
lock add %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<atmc_add64>:
lock add %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @atmc_add64(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64
store i64* %0, i64** %3
store i64 %1, i64* %4
%5 = load i64*, i64** %3
%6 = load i64, i64* %4
%7 = load i64*, i64** %3
ret void
}

LLVM IR (-O2):
define void @atmc_add64(i64* %0, i64 %1) {
tail call void asm sideeffect "lock ; addq $1,$0", "=*m,ir,*m,~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %0, i64 %1, i64* elementtype(i64) %0)
ret void
}
void kev_TODO() {}


x86 assembly (clang, -O0):
<kev_TODO>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kev_TODO>:
ret

LLVM IR (-O0):
define void @kev_TODO() {
ret void
}

LLVM IR (-O2):
define void @kev_TODO() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void usage(const char *pro) {
  fprintf(stderr, "Usage: %s <file-name>\n", pro);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [23 x i8] c"Usage: %s <file-name>\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [23 x i8] c"Usage: %s <file-name>\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("Hello World\n");
  printf("My name is Christopher Salvador Márquez Álvarez \n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello World\0A\00"
@.str.1 = [52 x i8] c"My name is Christopher Salvador M\C3\A1rquez \C3\81lvarez \0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [12 x i8] c"Hello World\00"
@str.2 = [51 x i8] c"My name is Christopher Salvador M\C3\A1rquez \C3\81lvarez \00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([51 x i8], [51 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
int test_imm_92uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x92 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_92uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x92,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_92uint64_lowword_reg>:
test   $0x92,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_92uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 146
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_92uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 146
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void write32(uint32_t address, uint32_t value) {
  (*((volatile uint32_t *)(address))) = value;
}


x86 assembly (clang, -O0):
<write32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<write32>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @write32(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = inttoptr i64 %6 to i64*
store volatile i64 %5, i64* %7
ret void
}

LLVM IR (-O2):
define void @write32(i64 %0, i64 %1) {
%3 = inttoptr i64 %0 to i64*
store volatile i64 %1, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void jsoo_get_event_args() { exit(1); }


x86 assembly (clang, -O0):
<jsoo_get_event_args>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<jsoo_get_event_args>:
push   %rax
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @jsoo_get_event_args() {
%1 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @jsoo_get_event_args() {
%1 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
unsigned long bit_mask(unsigned long);
unsigned long bitfield_extract(register unsigned long value,
                               register unsigned long start,
                               register unsigned long length) {
  return ((value >> start) & bit_mask(length));
}


x86 assembly (clang, -O0):
<bitfield_extract>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
shr    %cl,%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <bit_mask@plt>
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
and    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitfield_extract>:
push   %rbx
mov    %rsi,%rcx
mov    %rdi,%rbx
shr    %cl,%rbx
mov    %rdx,%rdi
call   1030 <bit_mask@plt>
and    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @bitfield_extract(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = lshr i64 %7, %8
%10 = load i64, i64* %6
%11 = call i64 @bit_mask(i64 %10)
%12 = and i64 %9, %11
ret i64 %12
}

LLVM IR (-O2):
define i64 @bitfield_extract(i64 %0, i64 %1, i64 %2) {
%4 = lshr i64 %0, %1
%5 = tail call i64 @bit_mask(i64 %2)
%6 = and i64 %5, %4
ret i64 %6
}
void caller_without_value_site1() {}


x86 assembly (clang, -O0):
<caller_without_value_site1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<caller_without_value_site1>:
ret

LLVM IR (-O0):
define void @caller_without_value_site1() {
ret void
}

LLVM IR (-O2):
define void @caller_without_value_site1() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
char *strstr(char *, char *);
void strstr_middle() {
  char *string = "TestString";
  Assert_real((strstr(string, "tStr") == string + 3),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/string/strstr.c",
              22, ("String should be found in middle"));
}


x86 assembly (clang, -O0):
<strstr_middle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xecd(%rip),%rsi
call   1040 <strstr@plt>
mov    -0x8(%rbp),%rcx
add    $0x3,%rcx
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xeb3(%rip),%rsi
mov    $0x16,%edx
lea    0xf4a(%rip),%rcx
call   1030 <Assert_real@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strstr_middle>:
lea    0xee9(%rip),%rsi
lea    0xf85(%rip),%rcx
mov    $0x1,%edi
mov    $0x16,%edx
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"TestString\00"
@.str.1 = [5 x i8] c"tStr\00"
@.str.2 = [163 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/string/strstr.c\00"
@.str.3 = [33 x i8] c"String should be found in middle\00"
define void @strstr_middle() {
%1 = alloca i8*
store i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = call i8* @strstr(i8* %2, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%4 = load i8*, i8** %1
%5 = getelementptr inbounds i8, i8* %4, i64 3
%6 = icmp eq i8* %3, %5
%7 = zext i1 %6 to i32
%8 = call i32 @Assert_real(i32 %7, i8* getelementptr inbounds ([163 x i8], [163 x i8]* @.str.2, i64 0, i64 0), i32 22, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str.2 = [163 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/string/strstr.c\00"
@.str.3 = [33 x i8] c"String should be found in middle\00"
define void @strstr_middle() {
%1 = tail call i32 @Assert_real(i32 1, i8* getelementptr inbounds ([163 x i8], [163 x i8]* @.str.2, i64 0, i64 0), i32 22, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.3, i64 0, i64 0))
ret void
}
int cmps(const char *s1, const char *s2, int maxlen, int decrement) {
  int res = 1;
  if (decrement) {
    __asm__ volatile("std");
  }
  __asm__ volatile("repz cmpsb\n"
                   "cmovz %2,%0\n"
                   "jge   1f\n"
                   "neg   %0\n"
                   "1:"
                   : "=r"(res)
                   : "0"(res), "r"(0), "S"(s1), "D"(s2), "c"(maxlen));
  if (decrement) {
    __asm__ volatile("cld");
  }
  return res;
}


x86 assembly (clang, -O0):
<cmps>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
movl   $0x1,-0x1c(%rbp)
cmpl   $0x0,-0x18(%rbp)
je     1124 <cmps+0x24>
std
mov    -0x1c(%rbp),%eax
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%ecx
xor    %edx,%edx
repz cmpsb %es:(%rdi),%ds:(%rsi)
cmove  %edx,%eax
jge    1141 <cmps+0x41>
neg    %eax
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x18(%rbp)
je     114f <cmps+0x4f>
cld
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmps>:
mov    %ecx,%eax
mov    %edx,%ecx
mov    %rsi,%rdx
test   %eax,%eax
je     1126 <cmps+0x26>
std
mov    $0x1,%eax
xor    %r8d,%r8d
mov    %rdi,%rsi
mov    %rdx,%rdi
repz cmpsb %es:(%rdi),%ds:(%rsi)
cmove  %r8d,%eax
jge    1124 <cmps+0x24>
neg    %eax
cld
ret
mov    $0x1,%eax
xor    %r8d,%r8d
mov    %rdi,%rsi
mov    %rdx,%rdi
repz cmpsb %es:(%rdi),%ds:(%rsi)
cmove  %r8d,%eax
jge    113e <cmps+0x3e>
neg    %eax
ret

LLVM IR (-O0):
define i32 @cmps(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
store i32 1, i32* %9
%10 = load i32, i32* %8
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %4
br label %13
13: ; preds = %12, %4
%14 = load i32, i32* %9
%15 = load i8*, i8** %5
%16 = load i8*, i8** %6
%17 = load i32, i32* %7
%18 = call i32 asm sideeffect "repz cmpsb\0Acmovz $2,$0\0Ajge 1f\0Aneg $0\0A1:", "=r,0,r,{si},{di},{cx},~{dirflag},~{fpsr},~{flags}"(i32 %14, i32 0, i8* %15, i8* %16, i32 %17)
store i32 %18, i32* %9
%19 = load i32, i32* %8
%20 = icmp ne i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %13
br label %22
22: ; preds = %21, %13
%23 = load i32, i32* %9
ret i32 %23
}

LLVM IR (-O2):
define i32 @cmps(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = icmp eq i32 %3, 0
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 asm sideeffect "repz cmpsb\0Acmovz $2,$0\0Ajge 1f\0Aneg $0\0A1:", "=r,0,r,{si},{di},{cx},~{dirflag},~{fpsr},~{flags}"(i32 1, i32 0, i8* %0, i8* %1, i32 %2)
br label %10
8: ; preds = %4
tail call void asm sideeffect "std", "~{dirflag},~{fpsr},~{flags}"()
%9 = tail call i32 asm sideeffect "repz cmpsb\0Acmovz $2,$0\0Ajge 1f\0Aneg $0\0A1:", "=r,0,r,{si},{di},{cx},~{dirflag},~{fpsr},~{flags}"(i32 1, i32 0, i8* %0, i8* %1, i32 %2)
tail call void asm sideeffect "cld", "~{dirflag},~{fpsr},~{flags}"()
br label %10
10: ; preds = %6, %8
%11 = phi i32 [ %7, %6 ], [ %9, %8 ]
ret i32 %11
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int getc(int /*<<< orphan*/ *);
unsigned int read4LE(FILE *fp) {
  unsigned int val;
  val = getc(fp);
  val |= getc(fp) << 8;
  val |= getc(fp) << 16;
  val |= getc(fp) << 24;
  return val;
}


x86 assembly (clang, -O0):
<read4LE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getc@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getc@plt>
shl    $0x8,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getc@plt>
shl    $0x10,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getc@plt>
shl    $0x18,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read4LE>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r15
call   1030 <getc@plt>
mov    %eax,%r14d
mov    %r15,%rdi
call   1030 <getc@plt>
mov    %eax,%ebp
shl    $0x8,%ebp
or     %r14d,%ebp
mov    %r15,%rdi
call   1030 <getc@plt>
mov    %eax,%ebx
shl    $0x10,%ebx
mov    %r15,%rdi
call   1030 <getc@plt>
shl    $0x18,%eax
or     %ebx,%eax
or     %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @read4LE(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @getc(i32* %4)
store i32 %5, i32* %3
%6 = load i32*, i32** %2
%7 = call i32 @getc(i32* %6)
%8 = shl i32 %7, 8
%9 = load i32, i32* %3
%10 = or i32 %9, %8
store i32 %10, i32* %3
%11 = load i32*, i32** %2
%12 = call i32 @getc(i32* %11)
%13 = shl i32 %12, 16
%14 = load i32, i32* %3
%15 = or i32 %14, %13
store i32 %15, i32* %3
%16 = load i32*, i32** %2
%17 = call i32 @getc(i32* %16)
%18 = shl i32 %17, 24
%19 = load i32, i32* %3
%20 = or i32 %19, %18
store i32 %20, i32* %3
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @read4LE(i32* nocapture %0) {
%2 = tail call i32 @getc(i32* %0)
%3 = tail call i32 @getc(i32* %0)
%4 = shl i32 %3, 8
%5 = or i32 %4, %2
%6 = tail call i32 @getc(i32* %0)
%7 = shl i32 %6, 16
%8 = or i32 %5, %7
%9 = tail call i32 @getc(i32* %0)
%10 = shl i32 %9, 24
%11 = or i32 %8, %10
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
void scanf_int() {
  int integer;
  scanf("%d", &integer);
  printf("%d\n", integer);
}


x86 assembly (clang, -O0):
<scanf_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x4(%rbp),%esi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scanf_int>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%esi
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define void @scanf_int() {
%1 = alloca i32
%2 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%3 = load i32, i32* %1
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define void @scanf_int() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret void
}
void visc_flux(const double *prim, const double *gradr, const double *gradp,
               const double *gradz, double *flux, const double *x,
               const double *n) {}


x86 assembly (clang, -O0):
<visc_flux>:
push   %rbp
mov    %rsp,%rbp
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<visc_flux>:
ret

LLVM IR (-O0):
define void @visc_flux(double* %0, double* %1, double* %2, double* %3, double* %4, double* %5, double* %6) {
%8 = alloca double*
%9 = alloca double*
%10 = alloca double*
%11 = alloca double*
%12 = alloca double*
%13 = alloca double*
%14 = alloca double*
store double* %0, double** %8
store double* %1, double** %9
store double* %2, double** %10
store double* %3, double** %11
store double* %4, double** %12
store double* %5, double** %13
store double* %6, double** %14
ret void
}

LLVM IR (-O2):
define void @visc_flux(double* nocapture %0, double* nocapture %1, double* nocapture %2, double* nocapture %3, double* nocapture %4, double* nocapture %5, double* nocapture %6) {
ret void
}
int main() {
#pragma omp declare reduction(fun                                              \
                              : struct SSS                                     \
                              : omp_out = omp_in)                              \
    initializer(init(&omp_priv, omp_orig))
  {
#pragma omp declare reduction(fun                                              \
                              : struct SSS                                     \
                              : omp_out = omp_in)                              \
    initializer(init(&omp_priv, omp_orig))
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ INC_();
int /*<<< orphan*/ c64_memAbsoluteAddrX();
void INC_absx(void) {
  c64_memAbsoluteAddrX();
  INC_();
}


x86 assembly (clang, -O0):
<INC_absx>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <c64_memAbsoluteAddrX@plt>
mov    $0x0,%al
call   1040 <INC_@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<INC_absx>:
push   %rax
xor    %eax,%eax
call   1030 <c64_memAbsoluteAddrX@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <INC_@plt>

LLVM IR (-O0):
define void @INC_absx() {
%1 = call i32 (...) @c64_memAbsoluteAddrX()
%2 = call i32 (...) @INC_()
ret void
}

LLVM IR (-O2):
define void @INC_absx() {
%1 = tail call i32 (...) @c64_memAbsoluteAddrX()
%2 = tail call i32 (...) @INC_()
ret void
}
char *strcpy(char *d, const char *s) {
  while (*s != 0) {
    *d = *s;
    d++;
    s++;
  }
  *d = 0;
  return d;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1145 <strcpy+0x45>
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110c <strcpy+0xc>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
mov    (%rsi),%cl
test   %cl,%cl
je     1121 <strcpy+0x21>
add    $0x1,%rsi
nopl   (%rax)
mov    %cl,(%rax)
add    $0x1,%rax
movzbl (%rsi),%ecx
add    $0x1,%rsi
test   %cl,%cl
jne    1110 <strcpy+0x10>
movb   $0x0,(%rax)
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %10, %2
%6 = load i8*, i8** %4
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %5
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = load i8*, i8** %3
store i8 %12, i8* %13
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %3
%16 = load i8*, i8** %4
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %4
br label %5
18: ; preds = %5
%19 = load i8*, i8** %3
store i8 0, i8* %19
%20 = load i8*, i8** %3
ret i8* %20
}

LLVM IR (-O2):
define i8* @strcpy(i8* writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %11, %5 ], [ %3, %2 ]
%7 = phi i8* [ %10, %5 ], [ %1, %2 ]
%8 = phi i8* [ %9, %5 ], [ %0, %2 ]
store i8 %6, i8* %8
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = getelementptr inbounds i8, i8* %7, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
%14 = phi i8* [ %0, %2 ], [ %9, %5 ]
store i8 0, i8* %14
ret i8* %14
}
/* Variables and functions */
char *getRegex(char *);
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char **argv) {
  for (int i = 1; i < argc; i++) {
    printf("%s", getRegex(argv[i]));
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1177 <main+0x57>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1040 <getRegex@plt>
mov    %rax,%rsi
lea    0xe9c(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    113d <main+0x1d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
cmp    $0x2,%edi
jl     115d <main+0x3d>
mov    %rsi,%r15
mov    %edi,%r12d
mov    $0x1,%ebx
lea    0xec1(%rip),%r14
nop
mov    (%r15,%rbx,8),%rdi
call   1040 <getRegex@plt>
mov    %r14,%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %6
br label %7
7: ; preds = %19, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %22
11: ; preds = %7
%12 = load i8**, i8*** %5
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8*, i8** %12, i64 %14
%16 = load i8*, i8** %15
%17 = call i8* @getRegex(i8* %16)
%18 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %17)
br label %19
19: ; preds = %11
%20 = load i32, i32* %6
%21 = add nsw i32 %20, 1
store i32 %21, i32* %6
br label %7
22: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %7
6: ; preds = %7, %2
ret i32 0
7: ; preds = %4, %7
%8 = phi i64 [ 1, %4 ], [ %13, %7 ]
%9 = getelementptr inbounds i8*, i8** %1, i64 %8
%10 = load i8*, i8** %9
%11 = tail call i8* @getRegex(i8* %10)
%12 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %11)
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %5
br i1 %14, label %6, label %7
}
/* Variables and functions */
int /*<<< orphan*/ assem_debug(char *, int, int);
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ output_w32(int);
void emit_fsqrtd(int s, int d) {
  assert(s == 31);
  assert(d == 31);
  assem_debug("fsqrtd d%d,d%d", d, s);
  output_w32(0x1e61c000 | s << 5 | d);
}


x86 assembly (clang, -O0):
<emit_fsqrtd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x1f,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
cmpl   $0x1f,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
mov    -0x8(%rbp),%esi
mov    -0x4(%rbp),%edx
lea    0xe93(%rip),%rdi
call   1030 <assem_debug@plt>
mov    -0x4(%rbp),%edi
shl    $0x5,%edi
or     $0x1e61c000,%edi
or     -0x8(%rbp),%edi
call   1040 <output_w32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_fsqrtd>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %edi,%ebx
xor    %edi,%edi
cmp    $0x1f,%ebx
sete   %dil
call   1050 <assert@plt>
xor    %edi,%edi
cmp    $0x1f,%ebp
sete   %dil
call   1050 <assert@plt>
lea    0xea6(%rip),%rdi
mov    %ebp,%esi
mov    %ebx,%edx
call   1030 <assem_debug@plt>
shl    $0x5,%ebx
or     %ebp,%ebx
or     $0x1e61c000,%ebx
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <output_w32@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"fsqrtd d%d,d%d\00"
define void @emit_fsqrtd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 31
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i32, i32* %4
%10 = icmp eq i32 %9, 31
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i32, i32* %4
%14 = load i32, i32* %3
%15 = call i32 @assem_debug(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %13, i32 %14)
%16 = load i32, i32* %3
%17 = shl i32 %16, 5
%18 = or i32 509722624, %17
%19 = load i32, i32* %4
%20 = or i32 %18, %19
%21 = call i32 @output_w32(i32 %20)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"fsqrtd d%d,d%d\00"
define void @emit_fsqrtd(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 31
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = icmp eq i32 %1, 31
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
%9 = tail call i32 @assem_debug(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %1, i32 %0)
%10 = shl i32 %0, 5
%11 = or i32 %10, %1
%12 = or i32 %11, 509722624
%13 = tail call i32 @output_w32(i32 %12)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ RESHLm(int);
void RES7HLm() { RESHLm(0x80); }


x86 assembly (clang, -O0):
<RES7HLm>:
push   %rbp
mov    %rsp,%rbp
mov    $0x80,%edi
call   1030 <RESHLm@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RES7HLm>:
mov    $0x80,%edi
jmp    1030 <RESHLm@plt>

LLVM IR (-O0):
define void @RES7HLm() {
%1 = call i32 @RESHLm(i32 128)
ret void
}

LLVM IR (-O2):
define void @RES7HLm() {
%1 = tail call i32 @RESHLm(i32 128)
ret void
}
int f_bun_rr2(float a1, float a2) { return !(__builtin_isunordered(a1, a2)); }


x86 assembly (clang, -O0):
<f_bun_rr2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
setp   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_bun_rr2>:
xor    %eax,%eax
ucomiss %xmm1,%xmm0
setnp  %al
ret

LLVM IR (-O0):
define i32 @f_bun_rr2(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp uno float %5, %6
%8 = xor i1 %7, true
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @f_bun_rr2(float %0, float %1) {
%3 = fcmp ord float %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}