xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ setExceptionCode(int);
scalar_t__ strcmp(char const *, char const *);
void validateAnnexIs(const char *pAnnex, const char *pExpected) {
  if (pAnnex == NULL || 0 != strcmp(pAnnex, pExpected))
    return ((void)setExceptionCode(4));
}


x86 assembly (clang, -O0):
<validateAnnexIs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1156 <validateAnnexIs+0x36>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
je     1160 <validateAnnexIs+0x40>
mov    $0x4,%edi
call   1040 <setExceptionCode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<validateAnnexIs>:
test   %rdi,%rdi
je     1135 <validateAnnexIs+0x15>
push   %rax
call   1030 <strcmp@plt>
test   %rax,%rax
lea    0x8(%rsp),%rsp
je     113f <validateAnnexIs+0x1f>
mov    $0x4,%edi
jmp    1040 <setExceptionCode@plt>
ret

LLVM IR (-O0):
define void @validateAnnexIs(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %12, label %7
7: ; preds = %2
%8 = load i8*, i8** %3
%9 = load i8*, i8** %4
%10 = call i64 @strcmp(i8* %8, i8* %9)
%11 = icmp ne i64 0, %10
br i1 %11, label %12, label %14
12: ; preds = %7, %2
%13 = call i64 @setExceptionCode(i32 4)
br label %14
14: ; preds = %12, %7
ret void
}

LLVM IR (-O2):
define void @validateAnnexIs(i8* %0, i8* %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = tail call i64 @strcmp(i8* %0, i8* %1)
%6 = icmp eq i64 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %4, %2
%8 = tail call i64 @setExceptionCode(i32 4)
br label %9
9: ; preds = %7, %4
ret void
}
/* Type definitions */
typedef scalar_t__ _Unwind_Word;

/* Variables and functions */
_Unwind_Word _Unwind_decode_target2(_Unwind_Word ptr) {
  _Unwind_Word tmp;
  tmp = *(_Unwind_Word *)ptr;
  if (!tmp)
    return 0;
  tmp += ptr;
  tmp = *(_Unwind_Word *)tmp;
  return tmp;
}


x86 assembly (clang, -O0):
<_Unwind_decode_target2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    112b <_Unwind_decode_target2+0x2b>
movq   $0x0,-0x8(%rbp)
jmp    114a <_Unwind_decode_target2+0x4a>
mov    -0x10(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Unwind_decode_target2>:
mov    (%rdi),%rax
test   %rax,%rax
je     110d <_Unwind_decode_target2+0xd>
mov    (%rax,%rdi,1),%rax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @_Unwind_decode_target2(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
%5 = load i64, i64* %3
%6 = inttoptr i64 %5 to i64*
%7 = load i64, i64* %6
store i64 %7, i64* %4
%8 = load i64, i64* %4
%9 = icmp ne i64 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %1
store i64 0, i64* %2
br label %19
11: ; preds = %1
%12 = load i64, i64* %3
%13 = load i64, i64* %4
%14 = add nsw i64 %13, %12
store i64 %14, i64* %4
%15 = load i64, i64* %4
%16 = inttoptr i64 %15 to i64*
%17 = load i64, i64* %16
store i64 %17, i64* %4
%18 = load i64, i64* %4
store i64 %18, i64* %2
br label %19
19: ; preds = %11, %10
%20 = load i64, i64* %2
ret i64 %20
}

LLVM IR (-O2):
define i64 @_Unwind_decode_target2(i64 %0) {
%2 = inttoptr i64 %0 to i64*
%3 = load i64, i64* %2
%4 = icmp eq i64 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = add nsw i64 %3, %0
%7 = inttoptr i64 %6 to i64*
%8 = load i64, i64* %7
br label %9
9: ; preds = %1, %5
%10 = phi i64 [ %8, %5 ], [ 0, %1 ]
ret i64 %10
}
int AddAgc(int Val1, int Val2) { return (077777 & (Val1 + Val2)); }


x86 assembly (clang, -O0):
<AddAgc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
and    $0x7fff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<AddAgc>:
lea    (%rdi,%rsi,1),%eax
and    $0x7fff,%eax
ret

LLVM IR (-O0):
define i32 @AddAgc(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
%8 = and i32 32767, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @AddAgc(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
%4 = and i32 %3, 32767
ret i32 %4
}
/* Variables and functions */
float fabs(float x) { return (x >= 0 ? x : -x); }


x86 assembly (clang, -O0):
<fabs>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     1129 <fabs+0x29>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
jmp    1140 <fabs+0x40>
movss  -0x4(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fabs>:
movaps 0xef9(%rip),%xmm1
xorps  %xmm0,%xmm1
xorps  %xmm2,%xmm2
cmpless %xmm0,%xmm2
andps  %xmm2,%xmm0
andnps %xmm1,%xmm2
orps   %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @fabs(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp oge float %3, 0.000000e+00
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load float, float* %2
br label %10
7: ; preds = %1
%8 = load float, float* %2
%9 = fneg float %8
br label %10
10: ; preds = %7, %5
%11 = phi float [ %6, %5 ], [ %9, %7 ]
ret float %11
}

LLVM IR (-O2):
define float @fabs(float %0) {
%2 = fcmp oge float %0, 0.000000e+00
%3 = fneg float %0
%4 = select i1 %2, float %0, float %3
ret float %4
}
/* Variables and functions */
int CLOCKS_PER_SEC;
int clock();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ stderr;
void Times() {
  fprintf(stderr, "Processing times: %d seconds.\n",
          (int)(clock() / CLOCKS_PER_SEC));
}


x86 assembly (clang, -O0):
<Times>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ea9(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <clock@plt>
mov    -0x4(%rbp),%edi
mov    0x2ea3(%rip),%rcx
cltd
idivl  (%rcx)
mov    %eax,%edx
lea    0xeaf(%rip),%rsi
call   1040 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Times>:
push   %rbx
mov    0x2eb0(%rip),%rax
mov    (%rax),%ebx
xor    %eax,%eax
call   1030 <clock@plt>
mov    0x2eb0(%rip),%rcx
cltd
idivl  (%rcx)
lea    0xebe(%rip),%rsi
mov    %ebx,%edi
mov    %eax,%edx
pop    %rbx
jmp    1040 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [31 x i8] c"Processing times: %d seconds.\0A\00"
@CLOCKS_PER_SEC = global i32 0
define void @Times() {
%1 = load i32, i32* @stderr
%2 = call i32 (...) @clock()
%3 = load i32, i32* @CLOCKS_PER_SEC
%4 = sdiv i32 %2, %3
%5 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [31 x i8] c"Processing times: %d seconds.\0A\00"
@CLOCKS_PER_SEC = global i32 0
define void @Times() {
%1 = load i32, i32* @stderr
%2 = tail call i32 (...) @clock()
%3 = load i32, i32* @CLOCKS_PER_SEC
%4 = sdiv i32 %2, %3
%5 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ OPLinkReceiverHandle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void OPLinkReceiverUpdated() { UAVObjUpdated(OPLinkReceiverHandle()); }


x86 assembly (clang, -O0):
<OPLinkReceiverUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <OPLinkReceiverHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<OPLinkReceiverUpdated>:
push   %rax
xor    %eax,%eax
call   1030 <OPLinkReceiverHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @OPLinkReceiverUpdated() {
%1 = call i32 (...) @OPLinkReceiverHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @OPLinkReceiverUpdated() {
%1 = tail call i32 (...) @OPLinkReceiverHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
const char *libccnxCommonAbout_MiniNotice(void) {
  return "Copyright (c) 2017 Cisco and/or its affiliates.\n";
}


x86 assembly (clang, -O0):
<libccnxCommonAbout_MiniNotice>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<libccnxCommonAbout_MiniNotice>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [49 x i8] c"Copyright (c) 2017 Cisco and/or its affiliates.\0A\00"
define i8* @libccnxCommonAbout_MiniNotice() {
ret i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [49 x i8] c"Copyright (c) 2017 Cisco and/or its affiliates.\0A\00"
define i8* @libccnxCommonAbout_MiniNotice() {
ret i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ __u64;

/* Variables and functions */
int fc_sl_check_cpu(void *s, int cpu, __u64 dline) { return 1; }


x86 assembly (clang, -O0):
<fc_sl_check_cpu>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc_sl_check_cpu>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @fc_sl_check_cpu(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i32 1
}

LLVM IR (-O2):
define i32 @fc_sl_check_cpu(i8* nocapture readnone %0, i32 %1, i32 %2) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ usart_cs(int);
int /*<<< orphan*/ usart_out_byte(int);
void wren(void) {
  usart_cs(0);
  usart_out_byte(0x06);
  usart_cs(1);
}


x86 assembly (clang, -O0):
<wren>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1040 <usart_cs@plt>
mov    $0x6,%edi
call   1030 <usart_out_byte@plt>
mov    $0x1,%edi
call   1040 <usart_cs@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wren>:
push   %rax
xor    %edi,%edi
call   1040 <usart_cs@plt>
mov    $0x6,%edi
call   1030 <usart_out_byte@plt>
mov    $0x1,%edi
pop    %rax
jmp    1040 <usart_cs@plt>

LLVM IR (-O0):
define void @wren() {
%1 = call i32 @usart_cs(i32 0)
%2 = call i32 @usart_out_byte(i32 6)
%3 = call i32 @usart_cs(i32 1)
ret void
}

LLVM IR (-O2):
define void @wren() {
%1 = tail call i32 @usart_cs(i32 0)
%2 = tail call i32 @usart_out_byte(i32 6)
%3 = tail call i32 @usart_cs(i32 1)
ret void
}
void XDestroyIC() {}


x86 assembly (clang, -O0):
<XDestroyIC>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XDestroyIC>:
ret

LLVM IR (-O0):
define void @XDestroyIC() {
ret void
}

LLVM IR (-O2):
define void @XDestroyIC() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lflush();
int /*<<< orphan*/ lprcat(char *);
int /*<<< orphan*/ nap(int);
void nogold() {
  lprcat("\nYou don't have enough gold to pay for that!");
  lflush();
  nap(2200);
}


x86 assembly (clang, -O0):
<nogold>:
push   %rbp
mov    %rsp,%rbp
lea    0xec5(%rip),%rdi
call   1050 <lprcat@plt>
mov    $0x0,%al
call   1040 <lflush@plt>
mov    $0x898,%edi
call   1030 <nap@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nogold>:
push   %rax
lea    0xec8(%rip),%rdi
call   1050 <lprcat@plt>
xor    %eax,%eax
call   1040 <lflush@plt>
mov    $0x898,%edi
pop    %rax
jmp    1030 <nap@plt>

LLVM IR (-O0):
@.str = [45 x i8] c"\0AYou don't have enough gold to pay for that!\00"
define void @nogold() {
%1 = call i32 @lprcat(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @lflush()
%3 = call i32 @nap(i32 2200)
ret void
}

LLVM IR (-O2):
@.str = [45 x i8] c"\0AYou don't have enough gold to pay for that!\00"
define void @nogold() {
%1 = tail call i32 @lprcat(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @lflush()
%3 = tail call i32 @nap(i32 2200)
ret void
}
int constraint_init(void) { return 0; }


x86 assembly (clang, -O0):
<constraint_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<constraint_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @constraint_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @constraint_init() {
ret i32 0
}
int _link(const char *old_name, const char *new_name) { return -1; }


x86 assembly (clang, -O0):
<_link>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_link>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @_link(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 -1
}

LLVM IR (-O2):
define i32 @_link(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 -1
}
/* Type definitions */
struct array_s {
  int dummy;
};

/* Variables and functions */
unsigned long array_item_remove(struct array_s *, unsigned long);
int /*<<< orphan*/ array_shrink_with_ratio(struct array_s *, float);
unsigned long array_item_remove_with_shrink(struct array_s *a, unsigned long n,
                                            float ratio) {
  unsigned long ret = array_item_remove(a, n);
  array_shrink_with_ratio(a, ratio);
  return ret;
}


x86 assembly (clang, -O0):
<array_item_remove_with_shrink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <array_item_remove@plt>
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
movss  -0x14(%rbp),%xmm0
call   1030 <array_shrink_with_ratio@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<array_item_remove_with_shrink>:
push   %r14
push   %rbx
push   %rax
movss  %xmm0,0x4(%rsp)
mov    %rdi,%rbx
call   1040 <array_item_remove@plt>
mov    %rax,%r14
mov    %rbx,%rdi
movss  0x4(%rsp),%xmm0
call   1030 <array_shrink_with_ratio@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.array_s = type { i32 }
define i64 @array_item_remove_with_shrink(%struct.array_s* %0, i64 %1, float %2) {
%4 = alloca %struct.array_s*
%5 = alloca i64
%6 = alloca float
%7 = alloca i64
store %struct.array_s* %0, %struct.array_s** %4
store i64 %1, i64* %5
store float %2, float* %6
%8 = load %struct.array_s*, %struct.array_s** %4
%9 = load i64, i64* %5
%10 = call i64 @array_item_remove(%struct.array_s* %8, i64 %9)
store i64 %10, i64* %7
%11 = load %struct.array_s*, %struct.array_s** %4
%12 = load float, float* %6
%13 = call i32 @array_shrink_with_ratio(%struct.array_s* %11, float %12)
%14 = load i64, i64* %7
ret i64 %14
}

LLVM IR (-O2):
%struct.array_s = type { i32 }
define i64 @array_item_remove_with_shrink(%struct.array_s* %0, i64 %1, float %2) {
%4 = tail call i64 @array_item_remove(%struct.array_s* %0, i64 %1)
%5 = tail call i32 @array_shrink_with_ratio(%struct.array_s* %0, float %2)
ret i64 %4
}
void RGB565ToARGBRow_SSE2() {}


x86 assembly (clang, -O0):
<RGB565ToARGBRow_SSE2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RGB565ToARGBRow_SSE2>:
ret

LLVM IR (-O0):
define void @RGB565ToARGBRow_SSE2() {
ret void
}

LLVM IR (-O2):
define void @RGB565ToARGBRow_SSE2() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char const *, char *);
int /*<<< orphan*/ fwrite(void const *, int /*<<< orphan*/, int,
                          int /*<<< orphan*/ *);
int /*<<< orphan*/ strlen(char const *);
int write_file(const char *filename, const char *value) {
  FILE *file = fopen(filename, "w");
  if (!file)
    return 1;
  fwrite((const void *)value, strlen(value), 1, file);
  fclose(file);
}


x86 assembly (clang, -O0):
<write_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xea5(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    117b <write_file+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    11a9 <write_file+0x69>
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x28(%rbp),%rdi
mov    %eax,%esi
mov    -0x20(%rbp),%rcx
mov    $0x1,%edx
call   1060 <fwrite@plt>
mov    -0x20(%rbp),%rdi
call   1030 <fclose@plt>
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_file>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
lea    0xeb2(%rip),%rsi
call   1050 <fopen@plt>
test   %rax,%rax
je     117d <write_file+0x3d>
mov    %rax,%rbx
mov    %r14,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %eax,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1060 <fwrite@plt>
mov    %rbx,%rdi
call   1030 <fclose@plt>
mov    $0x1,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [2 x i8] c"w\00"
define i32 @write_file(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %4
%8 = call i32* @fopen(i8* %7, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %8, i32** %6
%9 = load i32*, i32** %6
%10 = icmp ne i32* %9, null
br i1 %10, label %12, label %11
11: ; preds = %2
store i32 1, i32* %3
br label %20
12: ; preds = %2
%13 = load i8*, i8** %5
%14 = load i8*, i8** %5
%15 = call i32 @strlen(i8* %14)
%16 = load i32*, i32** %6
%17 = call i32 @fwrite(i8* %13, i32 %15, i32 1, i32* %16)
%18 = load i32*, i32** %6
%19 = call i32 @fclose(i32* %18)
br label %20
20: ; preds = %12, %11
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
@.str = [2 x i8] c"w\00"
define i32 @write_file(i8* nocapture %0, i8* %1) {
%3 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i32* %3, null
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i32 @strlen(i8* %1)
%7 = tail call i32 @fwrite(i8* %1, i32 %6, i32 1, i32* %3)
%8 = tail call i32 @fclose(i32* %3)
br label %9
9: ; preds = %2, %5
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ strcat(char *, char const *);
int /*<<< orphan*/ strcpy(char *, char *);
__attribute__((no, noclone)) void bar(char *p, const char *q, const char *r) {
  strcpy(p, "abcd");
  strcat(p, q);
  strcat(p, r);
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec1(%rip),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <strcat@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <strcat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
lea    0xecb(%rip),%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
call   1040 <strcat@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <strcat@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"abcd\00"
define void @bar(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = call i32 @strcpy(i8* %7, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%9 = load i8*, i8** %4
%10 = load i8*, i8** %5
%11 = call i32 @strcat(i8* %9, i8* %10)
%12 = load i8*, i8** %4
%13 = load i8*, i8** %6
%14 = call i32 @strcat(i8* %12, i8* %13)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"abcd\00"
define void @bar(i8* %0, i8* %1, i8* %2) {
%4 = tail call i32 @strcpy(i8* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 @strcat(i8* %0, i8* %1)
%6 = tail call i32 @strcat(i8* %0, i8* %2)
ret void
}
void alloc_Rat(void) {}


x86 assembly (clang, -O0):
<alloc_Rat>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_Rat>:
ret

LLVM IR (-O0):
define void @alloc_Rat() {
ret void
}

LLVM IR (-O2):
define void @alloc_Rat() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main(void) {
  int quantidade, i;
  scanf("%d", &quantidade);
  for (i = 1; i <= quantidade; i += 2) {
    printf("%d\n", i);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     116f <main+0x4f>
mov    -0xc(%rbp),%esi
lea    0xea7(%rip),%rdi
call   1030 <printf@plt>
mov    -0xc(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0xc(%rbp)
jmp    1146 <main+0x26>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0xed5(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
cmpl   $0x0,0x4(%rsp)
jle    1163 <main+0x43>
mov    $0x1,%ebx
lea    0xebb(%rip),%r14
nopl   0x0(%rax,%rax,1)
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x2,%ebx
cmp    0x4(%rsp),%ebx
jle    1150 <main+0x30>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
store i32 1, i32* %3
br label %5
5: ; preds = %12, %0
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp sle i32 %6, %7
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i32, i32* %3
%11 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %10)
br label %12
12: ; preds = %9
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 2
store i32 %14, i32* %3
br label %5
15: ; preds = %5
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 1
br i1 %5, label %12, label %6
6: ; preds = %0, %6
%7 = phi i32 [ %9, %6 ], [ 1, %0 ]
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %7)
%9 = add nuw nsw i32 %7, 2
%10 = load i32, i32* %1
%11 = icmp sgt i32 %9, %10
br i1 %11, label %12, label %6
12: ; preds = %6, %0
ret i32 0
}
int is_relative(const char *url) { return (*url == '/') ? 1 : 0; }


x86 assembly (clang, -O0):
<is_relative>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x2f,%edx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_relative>:
xor    %eax,%eax
cmpb   $0x2f,(%rdi)
sete   %al
ret

LLVM IR (-O0):
define i32 @is_relative(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 47
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 1, i32 0
ret i32 %8
}

LLVM IR (-O2):
define i32 @is_relative(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 47
%4 = zext i1 %3 to i32
ret i32 %4
}
call1e(uc1, ul, uc2, ui, uc3, us, uc4, uc5) unsigned char uc1;
unsigned long ul;
unsigned char uc2;
unsigned int ui;
unsigned char uc3;
unsigned short us;
unsigned char uc4;
unsigned char uc5;
{
  uc1 = 5;
  ul = 7;
  uc2 = 8;
  ui = 9;
  uc3 = 10;
  us = 11;
  uc4 = 12;
  uc5 = 55;
}


x86 assembly (clang, -O0):
<call1e>:
push   %rbp
mov    %rsp,%rbp
mov    %r9d,-0x2c(%rbp)
mov    %r8d,-0x28(%rbp)
mov    %ecx,-0x24(%rbp)
mov    %edx,%r8d
mov    -0x2c(%rbp),%edx
mov    %rsi,%r9
mov    -0x28(%rbp),%esi
mov    %edi,%r10d
mov    -0x24(%rbp),%edi
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%ecx
mov    %r10b,-0x5(%rbp)
mov    %r9,-0x10(%rbp)
mov    %r8b,-0x11(%rbp)
mov    %edi,-0x18(%rbp)
mov    %sil,-0x19(%rbp)
mov    %dx,-0x1c(%rbp)
mov    %cl,-0x1d(%rbp)
mov    %al,-0x1e(%rbp)
movb   $0x5,-0x5(%rbp)
movq   $0x7,-0x10(%rbp)
movb   $0x8,-0x11(%rbp)
movl   $0x9,-0x18(%rbp)
movb   $0xa,-0x19(%rbp)
movw   $0xb,-0x1c(%rbp)
movb   $0xc,-0x1d(%rbp)
movb   $0x37,-0x1e(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<call1e>:
ret

LLVM IR (-O0):
define i32 @call1e(i32 %0, i64 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) {
%9 = alloca i32
%10 = alloca i8
%11 = alloca i64
%12 = alloca i8
%13 = alloca i32
%14 = alloca i8
%15 = alloca i16
%16 = alloca i8
%17 = alloca i8
%18 = trunc i32 %0 to i8
%19 = trunc i32 %2 to i8
%20 = trunc i32 %4 to i8
%21 = trunc i32 %5 to i16
%22 = trunc i32 %6 to i8
%23 = trunc i32 %7 to i8
store i8 %18, i8* %10
store i64 %1, i64* %11
store i8 %19, i8* %12
store i32 %3, i32* %13
store i8 %20, i8* %14
store i16 %21, i16* %15
store i8 %22, i8* %16
store i8 %23, i8* %17
store i8 5, i8* %10
store i64 7, i64* %11
store i8 8, i8* %12
store i32 9, i32* %13
store i8 10, i8* %14
store i16 11, i16* %15
store i8 12, i8* %16
store i8 55, i8* %17
%24 = load i32, i32* %9
ret i32 %24
}

LLVM IR (-O2):
define i32 @call1e(i32 %0, i64 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) {
ret i32 undef
}
float f1(float x, float y) { return (x * x - 2 * x - y + 0.5); }


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
movss  0xee8(%rip),%xmm1
mulss  -0x4(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
subss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xeb5(%rip),%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
movaps %xmm0,%xmm2
addss  %xmm0,%xmm2
mulss  %xmm0,%xmm0
subss  %xmm2,%xmm0
subss  %xmm1,%xmm0
addss  0xee5(%rip),%xmm0
ret

LLVM IR (-O0):
define float @f1(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %3
%7 = load float, float* %3
%8 = fmul float 2.000000e+00, %7
%9 = fneg float %8
%10 = call float @llvm.fmuladd.f32(float %5, float %6, float %9)
%11 = load float, float* %4
%12 = fsub float %10, %11
%13 = fpext float %12 to double
%14 = fadd double %13, 5.000000e-01
%15 = fptrunc double %14 to float
ret float %15
}

LLVM IR (-O2):
define float @f1(float %0, float %1) {
%3 = fmul float %0, -2.000000e+00
%4 = tail call float @llvm.fmuladd.f32(float %0, float %0, float %3)
%5 = fsub float %4, %1
%6 = fadd float %5, 5.000000e-01
ret float %6
}
volatile char *copyright_notice(void) {
  return "Contains multiple-precision arithmetic code originally written by "
         "David Ireland,"
         " copyright (c) 2001-11 by D.I. Management Services Pty Limited "
         "<www.di-mgt.com.au>,"
         " and is used with permission.";
}


x86 assembly (clang, -O0):
<copyright_notice>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<copyright_notice>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [193 x i8] c"Contains multiple-precision arithmetic code originally written by David Ireland, copyright (c) 2001-11 by D.I. Management Services Pty Limited <www.di-mgt.com.au>, and is used with permission.\00"
define i8* @copyright_notice() {
ret i8* getelementptr inbounds ([193 x i8], [193 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [193 x i8] c"Contains multiple-precision arithmetic code originally written by David Ireland, copyright (c) 2001-11 by D.I. Management Services Pty Limited <www.di-mgt.com.au>, and is used with permission.\00"
define i8* @copyright_notice() {
ret i8* getelementptr inbounds ([193 x i8], [193 x i8]* @.str, i64 0, i64 0)
}
int test1(void) {
  int a[] = {5, (int){2}};
  return printf("%d, %d\n", a[0], a[1]);
}


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
mov    -0x4(%rbp),%edx
lea    0xed8(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
lea    0xee9(%rip),%rdi
mov    $0x5,%esi
mov    $0x2,%edx
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@__const.test1.a = [2 x i32] [i32 5, i32 2]
@.str = [8 x i8] c"%d, %d\0A\00"
define i32 @test1() {
%1 = alloca [2 x i32]
%2 = bitcast [2 x i32]* %1 to i8*
%3 = getelementptr inbounds [2 x i32], [2 x i32]* %1, i64 0, i64 0
%4 = load i32, i32* %3
%5 = getelementptr inbounds [2 x i32], [2 x i32]* %1, i64 0, i64 1
%6 = load i32, i32* %5
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
@.str = [8 x i8] c"%d, %d\0A\00"
define i32 @test1() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 5, i32 2)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
size_t ZOBRIST_ENPASSANT_FILE_INDEX(int file) {
  const size_t base = 64 * 12 + 1 + 16;
  const size_t off = file;
  const size_t index = base + off;
  assert(index >= 64 * 12 + 1 + 16);
  assert(index < 64 * 12 + 1 + 16 + 8);
  return index;
}


x86 assembly (clang, -O0):
<ZOBRIST_ENPASSANT_FILE_INDEX>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movq   $0x311,-0x10(%rbp)
movslq -0x4(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x311,%rax
mov    %rax,-0x20(%rbp)
cmpq   $0x311,-0x20(%rbp)
setae  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
cmpq   $0x319,-0x20(%rbp)
setb   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZOBRIST_ENPASSANT_FILE_INDEX>:
push   %rbx
movslq %edi,%rax
lea    0x311(%rax),%rbx
xor    %edi,%edi
cmp    $0xfffffcef,%eax
setb   %dil
call   1030 <assert@plt>
xor    %edi,%edi
cmp    $0x319,%rbx
setb   %dil
call   1030 <assert@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @ZOBRIST_ENPASSANT_FILE_INDEX(i32 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i32 %0, i32* %2
store i64 785, i64* %3
%6 = load i32, i32* %2
%7 = sext i32 %6 to i64
store i64 %7, i64* %4
%8 = load i64, i64* %4
%9 = add i64 785, %8
store i64 %9, i64* %5
%10 = load i64, i64* %5
%11 = icmp uge i64 %10, 785
%12 = zext i1 %11 to i32
%13 = call i32 @assert(i32 %12)
%14 = load i64, i64* %5
%15 = icmp ult i64 %14, 793
%16 = zext i1 %15 to i32
%17 = call i32 @assert(i32 %16)
%18 = load i64, i64* %5
ret i64 %18
}

LLVM IR (-O2):
define i64 @ZOBRIST_ENPASSANT_FILE_INDEX(i32 %0) {
%2 = sext i32 %0 to i64
%3 = add nsw i64 %2, 785
%4 = icmp ult i32 %0, -785
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
%7 = icmp ult i64 %3, 793
%8 = zext i1 %7 to i32
%9 = tail call i32 @assert(i32 %8)
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ test_clear_error();
int /*<<< orphan*/ test_nonexistent_dir();
int /*<<< orphan*/ test_open_test_dtree();
int /*<<< orphan*/ test_pass_file();
int /*<<< orphan*/ test_pass_mostly_valid();
int /*<<< orphan*/ test_pass_null();
int main(void) {
  test_pass_null();
  test_nonexistent_dir();
  test_pass_file();
  test_open_test_dtree();
  test_pass_mostly_valid();
  test_clear_error();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1060 <test_pass_null@plt>
mov    $0x0,%al
call   1040 <test_nonexistent_dir@plt>
mov    $0x0,%al
call   1030 <test_pass_file@plt>
mov    $0x0,%al
call   1070 <test_open_test_dtree@plt>
mov    $0x0,%al
call   1050 <test_pass_mostly_valid@plt>
mov    $0x0,%al
call   1080 <test_clear_error@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <test_pass_null@plt>
xor    %eax,%eax
call   1040 <test_nonexistent_dir@plt>
xor    %eax,%eax
call   1030 <test_pass_file@plt>
xor    %eax,%eax
call   1070 <test_open_test_dtree@plt>
xor    %eax,%eax
call   1050 <test_pass_mostly_valid@plt>
xor    %eax,%eax
call   1080 <test_clear_error@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @test_pass_null()
%2 = call i32 (...) @test_nonexistent_dir()
%3 = call i32 (...) @test_pass_file()
%4 = call i32 (...) @test_open_test_dtree()
%5 = call i32 (...) @test_pass_mostly_valid()
%6 = call i32 (...) @test_clear_error()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_pass_null()
%2 = tail call i32 (...) @test_nonexistent_dir()
%3 = tail call i32 (...) @test_pass_file()
%4 = tail call i32 (...) @test_open_test_dtree()
%5 = tail call i32 (...) @test_pass_mostly_valid()
%6 = tail call i32 (...) @test_clear_error()
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void SysCtlPeripheralSleepDisable(uint32_t ui32Peripheral) {
  ;
  (*((volatile uint32_t
          *)(((uint32_t)(0x400fe700 + ((ui32Peripheral & 0xff00) >> 8)) &
              0xF0000000) |
             0x02000000 |
             (((uint32_t)(0x400fe700 + ((ui32Peripheral & 0xff00) >> 8)) &
               0x000FFFFF)
              << 5) |
             ((ui32Peripheral & 0xff) << 2)))) = 0;
}


x86 assembly (clang, -O0):
<SysCtlPeripheralSleepDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
sar    $0x8,%eax
add    $0x400fe700,%eax
and    $0xf0000000,%eax
or     $0x2000000,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
sar    $0x8,%ecx
add    $0x400fe700,%ecx
and    $0xfffff,%ecx
shl    $0x5,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
shl    $0x2,%ecx
or     %ecx,%eax
mov    %eax,%eax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlPeripheralSleepDisable>:
movzbl %dil,%eax
shr    $0x3,%edi
and    $0x1fe0,%edi
shl    $0x2,%eax
or     %edi,%eax
movl   $0x0,0x43fce000(%rax)
ret

LLVM IR (-O0):
define void @SysCtlPeripheralSleepDisable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 65280
%5 = ashr i32 %4, 8
%6 = add nsw i32 1074784000, %5
%7 = and i32 %6, -268435456
%8 = or i32 %7, 33554432
%9 = load i32, i32* %2
%10 = and i32 %9, 65280
%11 = ashr i32 %10, 8
%12 = add nsw i32 1074784000, %11
%13 = and i32 %12, 1048575
%14 = shl i32 %13, 5
%15 = or i32 %8, %14
%16 = load i32, i32* %2
%17 = and i32 %16, 255
%18 = shl i32 %17, 2
%19 = or i32 %15, %18
%20 = zext i32 %19 to i64
%21 = inttoptr i64 %20 to i32*
store volatile i32 0, i32* %21
ret void
}

LLVM IR (-O2):
define void @SysCtlPeripheralSleepDisable(i32 %0) {
%2 = lshr i32 %0, 3
%3 = and i32 %2, 8160
%4 = shl i32 %0, 2
%5 = and i32 %4, 1020
%6 = or i32 %5, %3
%7 = or i32 %6, 1140645888
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store volatile i32 0, i32* %9
ret void
}
int getrusage(int who, struct rusage *usage) {
  ;
  return -1;
}


x86 assembly (clang, -O0):
<getrusage>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getrusage>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.rusage = type opaque
define i32 @getrusage(i32 %0, %struct.rusage* %1) {
%3 = alloca i32
%4 = alloca %struct.rusage*
store i32 %0, i32* %3
store %struct.rusage* %1, %struct.rusage** %4
ret i32 -1
}

LLVM IR (-O2):
%struct.rusage = type opaque
define i32 @getrusage(i32 %0, %struct.rusage* nocapture readnone %1) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ i2c_set_bus_num(unsigned int);
void I2C_SET_BUS(unsigned int bus) {
  if (0)
    i2c_set_bus_num(bus);
}


x86 assembly (clang, -O0):
<I2C_SET_BUS>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2C_SET_BUS>:
ret

LLVM IR (-O0):
define void @I2C_SET_BUS(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @I2C_SET_BUS(i32 %0) {
ret void
}
int ctoi(char source) {
  if ((source >= '0') && (source <= '9'))
    return (source - '0');
  return (source - 'A' + 10);
}


x86 assembly (clang, -O0):
<ctoi>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1133 <ctoi+0x33>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jg     1133 <ctoi+0x33>
movsbl -0x5(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    1140 <ctoi+0x40>
movsbl -0x5(%rbp),%eax
sub    $0x41,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctoi>:
lea    -0x30(%rdi),%ecx
lea    -0x37(%rdi),%edx
lea    -0x30(%rdi),%eax
cmp    $0xa,%cl
cmovae %edx,%eax
ret

LLVM IR (-O0):
define i32 @ctoi(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %15
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %13, 48
store i32 %14, i32* %2
br label %20
15: ; preds = %7, %1
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = sub nsw i32 %17, 65
%19 = add nsw i32 %18, 10
store i32 %19, i32* %2
br label %20
20: ; preds = %15, %11
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @ctoi(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add i8 %0, -48
%4 = icmp ult i8 %3, 10
%5 = select i1 %4, i32 -48, i32 -55
%6 = add nsw i32 %5, %2
ret i32 %6
}
int test_imm_2Aint16_reg(short val) {
  return ((val) & (-0x2A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_2Aint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffffd6,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Aint16_reg>:
test   $0xffd6,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Aint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -42
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_2Aint16_reg(i16 signext %0) {
%2 = and i16 %0, -42
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ CAN2_DriverIRQHandler();
__attribute__((weak)) void CAN2_IRQHandler(void) { CAN2_DriverIRQHandler(); }


x86 assembly (clang, -O0):
<CAN2_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <CAN2_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CAN2_IRQHandler>:
xor    %eax,%eax
jmp    1030 <CAN2_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @CAN2_IRQHandler() {
%1 = call i32 (...) @CAN2_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @CAN2_IRQHandler() {
%1 = tail call i32 (...) @CAN2_DriverIRQHandler()
ret void
}
/* Type definitions */
struct file_handle {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int open_by_handle_at(int mount_fd, struct file_handle *handle, int flags) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<open_by_handle_at>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2ed3(%rip),%rax
mov    (%rax),%ecx
mov    0x2eba(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_by_handle_at>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.file_handle = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @open_by_handle_at(i32 %0, %struct.file_handle* %1, i32 %2) {
%4 = alloca i32
%5 = alloca %struct.file_handle*
%6 = alloca i32
store i32 %0, i32* %4
store %struct.file_handle* %1, %struct.file_handle** %5
store i32 %2, i32* %6
%7 = load i32, i32* @ENOSYS
store i32 %7, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
%struct.file_handle = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @open_by_handle_at(i32 %0, %struct.file_handle* nocapture readnone %1, i32 %2) {
%4 = load i32, i32* @ENOSYS
store i32 %4, i32* @errno
ret i32 -1
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ assert(void *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, size_t, size_t);
void YieldUrlConnectionPairCallback(size_t src, size_t dst, void *context) {
  assert(src);
  assert(dst);
  assert(context);
  FILE *output_file = (FILE *)context;
  fprintf(output_file, "%-6lu %lu\n", src, dst);
}


x86 assembly (clang, -O0):
<YieldUrlConnectionPairCallback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x10(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x18(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xe96(%rip),%rsi
call   1040 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<YieldUrlConnectionPairCallback>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1030 <assert@plt>
mov    %r14,%rdi
call   1030 <assert@plt>
mov    %rbx,%rdi
call   1030 <assert@plt>
lea    0xeb6(%rip),%rsi
mov    %rbx,%rdi
mov    %r15,%rdx
mov    %r14,%rcx
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <fprintf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"%-6lu %lu\0A\00"
define void @YieldUrlConnectionPairCallback(i64 %0, i64 %1, i8* %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i8*
%7 = alloca i32*
store i64 %0, i64* %4
store i64 %1, i64* %5
store i8* %2, i8** %6
%8 = load i64, i64* %4
%9 = inttoptr i64 %8 to i8*
%10 = call i32 @assert(i8* %9)
%11 = load i64, i64* %5
%12 = inttoptr i64 %11 to i8*
%13 = call i32 @assert(i8* %12)
%14 = load i8*, i8** %6
%15 = call i32 @assert(i8* %14)
%16 = load i8*, i8** %6
%17 = bitcast i8* %16 to i32*
store i32* %17, i32** %7
%18 = load i32*, i32** %7
%19 = load i64, i64* %4
%20 = load i64, i64* %5
%21 = call i32 @fprintf(i32* %18, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i64 %19, i64 %20)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"%-6lu %lu\0A\00"
define void @YieldUrlConnectionPairCallback(i64 %0, i64 %1, i8* %2) {
%4 = inttoptr i64 %0 to i8*
%5 = tail call i32 @assert(i8* %4)
%6 = inttoptr i64 %1 to i8*
%7 = tail call i32 @assert(i8* %6)
%8 = tail call i32 @assert(i8* %2)
%9 = bitcast i8* %2 to i32*
%10 = tail call i32 @fprintf(i32* %9, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i64 %0, i64 %1)
ret void
}
int add_arg_to_log(struct log **l, char *arg, char *val) {}


x86 assembly (clang, -O0):
<add_arg_to_log>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_arg_to_log>:
ret

LLVM IR (-O0):
%struct.log = type opaque
define i32 @add_arg_to_log(%struct.log** %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca %struct.log**
%6 = alloca i8*
%7 = alloca i8*
store %struct.log** %0, %struct.log*** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
%8 = load i32, i32* %4
ret i32 %8
}

LLVM IR (-O2):
%struct.log = type opaque
define i32 @add_arg_to_log(%struct.log** nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int i = 10;
  int *const p = &i;
  printf("%d\n", *p);
  (*p)++;
  printf("%d\n", *p);
  i = 9;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
lea    0xea8(%rip),%rdi
call   1030 <printf@plt>
movl   $0x9,-0x8(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0xa,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0xb,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
store i32 0, i32* %1
store i32 10, i32* %2
store i32* %2, i32** %3
%4 = load i32*, i32** %3
%5 = load i32, i32* %4
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i32*, i32** %3
%8 = load i32, i32* %7
%9 = add nsw i32 %8, 1
store i32 %9, i32* %7
%10 = load i32*, i32** %3
%11 = load i32, i32* %10
%12 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %11)
store i32 9, i32* %2
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 10)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 11)
ret i32 0
}
void __attribute__((no)) HEX00_unicodeDatInit(void) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @HEX00_unicodeDatInit() {
ret void
}

LLVM IR (-O2):
define void @HEX00_unicodeDatInit() {
ret void
}
/* Variables and functions */
double fmod(double, double);
double pulse(double x, double n) {
  return n +
         2.0 * (fmod(x, 6.28318530717958647693) <
                (1.0 - n) * 3.14159265358979323846) -
         1.0;
}


x86 assembly (clang, -O0):
<pulse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xed7(%rip),%xmm1
call   1030 <fmod@plt>
movsd  -0x18(%rbp),%xmm1
movaps %xmm0,%xmm2
movsd  0xeb2(%rip),%xmm0
subsd  -0x10(%rbp),%xmm0
movsd  0xead(%rip),%xmm3
mulsd  %xmm3,%xmm0
ucomisd %xmm2,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
cvtsi2sd %eax,%xmm0
addsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
movsd  0xe81(%rip),%xmm1
subsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pulse>:
push   %rax
movsd  %xmm1,(%rsp)
movsd  0xee2(%rip),%xmm1
call   1030 <fmod@plt>
movsd  0xedd(%rip),%xmm1
movapd %xmm1,%xmm2
movsd  (%rsp),%xmm3
subsd  %xmm3,%xmm2
mulsd  0xed0(%rip),%xmm2
cmpltsd %xmm2,%xmm0
andpd  %xmm1,%xmm0
addsd  %xmm0,%xmm0
addsd  %xmm3,%xmm0
addsd  0xebf(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @pulse(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %4
%6 = load double, double* %3
%7 = call double @fmod(double %6, double 0x401921FB54442D18)
%8 = load double, double* %4
%9 = fsub double 1.000000e+00, %8
%10 = fmul double %9, 0x400921FB54442D18
%11 = fcmp olt double %7, %10
%12 = zext i1 %11 to i32
%13 = sitofp i32 %12 to double
%14 = call double @llvm.fmuladd.f64(double 2.000000e+00, double %13, double %5)
%15 = fsub double %14, 1.000000e+00
ret double %15
}

LLVM IR (-O2):
define double @pulse(double %0, double %1) {
%3 = tail call double @fmod(double %0, double 0x401921FB54442D18)
%4 = fsub double 1.000000e+00, %1
%5 = fmul double %4, 0x400921FB54442D18
%6 = fcmp olt double %3, %5
%7 = uitofp i1 %6 to double
%8 = tail call double @llvm.fmuladd.f64(double %7, double 2.000000e+00, double %1)
%9 = fadd double %8, -1.000000e+00
ret double %9
}