xunge/DecIR huggingface dataset:
struct op *list(t1, t2)
register struct op *t1, *t2;
{
  if (t1 == 0)
    return (t2);
  if (t2 == 0)
    return (t1);
  return (block(4, t1, t2, ((char **)0)));
}


x86 assembly (clang, -O0):
<list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1138 <list+0x28>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    116e <list+0x5e>
cmpq   $0x0,-0x18(%rbp)
jne    1150 <list+0x40>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    116e <list+0x5e>
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    $0x4,%edi
xor    %eax,%eax
mov    %eax,%ecx
mov    $0x0,%al
call   1030 <block@plt>
cltq
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list>:
mov    %rsi,%rax
test   %rdi,%rdi
je     1138 <list+0x28>
mov    %rdi,%rsi
test   %rax,%rax
je     1139 <list+0x29>
push   %rax
mov    $0x4,%edi
mov    %rax,%rdx
xor    %ecx,%ecx
xor    %eax,%eax
call   1030 <block@plt>
cltq
add    $0x8,%rsp
ret
mov    %rsi,%rax
ret

LLVM IR (-O0):
%struct.op = type opaque
define %struct.op* @list(%struct.op* %0, %struct.op* %1) {
%3 = alloca %struct.op*
%4 = alloca %struct.op*
%5 = alloca %struct.op*
store %struct.op* %0, %struct.op** %4
store %struct.op* %1, %struct.op** %5
%6 = load %struct.op*, %struct.op** %4
%7 = icmp eq %struct.op* %6, null
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load %struct.op*, %struct.op** %5
store %struct.op* %9, %struct.op** %3
br label %21
10: ; preds = %2
%11 = load %struct.op*, %struct.op** %5
%12 = icmp eq %struct.op* %11, null
br i1 %12, label %13, label %15
13: ; preds = %10
%14 = load %struct.op*, %struct.op** %4
store %struct.op* %14, %struct.op** %3
br label %21
15: ; preds = %10
%16 = load %struct.op*, %struct.op** %4
%17 = load %struct.op*, %struct.op** %5
%18 = call i32 (i32, %struct.op*, %struct.op*, i8**, ...) bitcast (i32 (...)* @block to i32 (i32, %struct.op*, %struct.op*, i8**, ...)*)(i32 4, %struct.op* %16, %struct.op* %17, i8** null)
%19 = sext i32 %18 to i64
%20 = inttoptr i64 %19 to %struct.op*
store %struct.op* %20, %struct.op** %3
br label %21
21: ; preds = %15, %13, %8
%22 = load %struct.op*, %struct.op** %3
ret %struct.op* %22
}

LLVM IR (-O2):
%struct.op = type opaque
define %struct.op* @list(%struct.op* %0, %struct.op* %1) {
%3 = icmp eq %struct.op* %0, null
br i1 %3, label %10, label %4
4: ; preds = %2
%5 = icmp eq %struct.op* %1, null
br i1 %5, label %10, label %6
6: ; preds = %4
%7 = tail call i32 (i32, %struct.op*, %struct.op*, i8**, ...) bitcast (i32 (...)* @block to i32 (i32, %struct.op*, %struct.op*, i8**, ...)*)(i32 4, %struct.op* %0, %struct.op* %1, i8** null)
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to %struct.op*
br label %10
10: ; preds = %4, %2, %6
%11 = phi %struct.op* [ %9, %6 ], [ %1, %2 ], [ %0, %4 ]
ret %struct.op* %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void catch_stkflt(int sig) { printf("STKFLT\n"); }


x86 assembly (clang, -O0):
<catch_stkflt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<catch_stkflt>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"STKFLT\0A\00"
define void @catch_stkflt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [7 x i8] c"STKFLT\00"
define void @catch_stkflt(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ lua_getnumber(int /*<<< orphan*/);
int /*<<< orphan*/ lua_lua2C(int);
int gettag(void) { return (int)lua_getnumber(lua_lua2C(1)); }


x86 assembly (clang, -O0):
<gettag>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1040 <lua_lua2C@plt>
mov    %eax,%edi
call   1030 <lua_getnumber@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gettag>:
push   %rax
mov    $0x1,%edi
call   1040 <lua_lua2C@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <lua_getnumber@plt>

LLVM IR (-O0):
define i32 @gettag() {
%1 = call i32 @lua_lua2C(i32 1)
%2 = call i64 @lua_getnumber(i32 %1)
%3 = trunc i64 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @gettag() {
%1 = tail call i32 @lua_lua2C(i32 1)
%2 = tail call i64 @lua_getnumber(i32 %1)
%3 = trunc i64 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void menu() {
  printf("Que voulez-vous faire ?\n");
  printf("1) Crypter un string\n");
  printf("2) Decrypter un string\n");
}


x86 assembly (clang, -O0):
<menu>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xef2(%rip),%rdi
call   1030 <printf@plt>
lea    0xefc(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<menu>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xef4(%rip),%rdi
call   1030 <puts@plt>
lea    0xefd(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"Que voulez-vous faire ?\0A\00"
@.str.1 = [22 x i8] c"1) Crypter un string\0A\00"
@.str.2 = [24 x i8] c"2) Decrypter un string\0A\00"
define void @menu() {
%1 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [24 x i8] c"Que voulez-vous faire ?\00"
@str.3 = [21 x i8] c"1) Crypter un string\00"
@str.4 = [23 x i8] c"2) Decrypter un string\00"
define void @menu() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str.3, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str.4, i64 0, i64 0))
ret void
}
int main(int argc, char *argv[]) {
  char mutable[] = "Hello";
  mutable[3] = 'X';
  printf("%s\n", mutable);
  char *immutable = "Hello";
  immutable[3] = 'X';
  printf("%s\n", immutable);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0xedb(%rip),%eax
mov    %eax,-0x16(%rbp)
mov    0xed5(%rip),%ax
mov    %ax,-0x12(%rbp)
movb   $0x58,-0x13(%rbp)
lea    -0x16(%rbp),%rsi
lea    0xec4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xeb0(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movb   $0x58,0x3(%rax)
mov    -0x20(%rbp),%rsi
lea    0xe9f(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movl   $0x6c6c6548,0x8(%rsp)
6c
movw   $0x6f,0xc(%rsp)
lea    0xed5(%rip),%rbx
movb   $0x58,0xb(%rsp)
lea    0x8(%rsp),%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.mutable = [6 x i8] c"Hello\00"
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [6 x i8] c"Hello\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca [6 x i8]
%6 = alloca i8*
store i32 %0, i32* %3
store i8** %1, i8*** %4
%7 = bitcast [6 x i8]* %5 to i8*
%8 = getelementptr inbounds [6 x i8], [6 x i8]* %5, i64 0, i64 3
store i8 88, i8* %8
%9 = getelementptr inbounds [6 x i8], [6 x i8]* %5, i64 0, i64 0
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %9)
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8** %6
%11 = load i8*, i8** %6
%12 = getelementptr inbounds i8, i8* %11, i64 3
store i8 88, i8* %12
%13 = load i8*, i8** %6
%14 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %13)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [6 x i8] c"Hello\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [6 x i8]
%4 = getelementptr inbounds [6 x i8], [6 x i8]* %3, i64 0, i64 0
%5 = getelementptr inbounds [6 x i8], [6 x i8]* %3, i64 0, i64 3
store i8 88, i8* %5
%6 = call i32 @puts(i8* %4)
%7 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
int sarwaitbar_std_open(void) { return 0; }


x86 assembly (clang, -O0):
<sarwaitbar_std_open>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sarwaitbar_std_open>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sarwaitbar_std_open() {
ret i32 0
}

LLVM IR (-O2):
define i32 @sarwaitbar_std_open() {
ret i32 0
}
int byteArraytoInt(char *b) {
  int i = 0;
  int res = 0;
  ;
  for (i = 3; i >= 0; i--) {
    res += (b[i] & 0xFF) << (8 * i);
  }
  return res;
}


x86 assembly (clang, -O0):
<byteArraytoInt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x3,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jl     1154 <byteArraytoInt+0x54>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
and    $0xff,%eax
mov    -0xc(%rbp),%ecx
shl    $0x3,%ecx
shl    %cl,%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    111d <byteArraytoInt+0x1d>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<byteArraytoInt>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @byteArraytoInt(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
store i32 0, i32* %4
store i32 3, i32* %3
br label %5
5: ; preds = %21, %1
%6 = load i32, i32* %3
%7 = icmp sge i32 %6, 0
br i1 %7, label %8, label %24
8: ; preds = %5
%9 = load i8*, i8** %2
%10 = load i32, i32* %3
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %9, i64 %11
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = and i32 %14, 255
%16 = load i32, i32* %3
%17 = mul nsw i32 8, %16
%18 = shl i32 %15, %17
%19 = load i32, i32* %4
%20 = add nsw i32 %19, %18
store i32 %20, i32* %4
br label %21
21: ; preds = %8
%22 = load i32, i32* %3
%23 = add nsw i32 %22, -1
store i32 %23, i32* %3
br label %5
24: ; preds = %5
%25 = load i32, i32* %4
ret i32 %25
}

LLVM IR (-O2):
define i32 @byteArraytoInt(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 3
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = shl nuw i32 %4, 24
%6 = getelementptr inbounds i8, i8* %0, i64 2
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = shl nuw nsw i32 %8, 16
%10 = or i32 %9, %5
%11 = getelementptr inbounds i8, i8* %0, i64 1
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = shl nuw nsw i32 %13, 8
%15 = or i32 %14, %10
%16 = load i8, i8* %0
%17 = zext i8 %16 to i32
%18 = or i32 %15, %17
ret i32 %18
}
/* Type definitions */
typedef int /*<<< orphan*/ val;
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fwrite(int /*<<< orphan*/ *, int, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ htole32(int /*<<< orphan*/);
int xdf_write_uint32(FILE *out, uint32_t val) {
  val = htole32(val);
  if (fwrite(&val, sizeof(val), 1, out) != 1)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<xdf_write_uint32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1030 <htole32@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
call   1040 <fwrite@plt>
cmp    $0x1,%eax
je     1166 <xdf_write_uint32+0x46>
movl   $0x1,-0x4(%rbp)
jmp    116d <xdf_write_uint32+0x4d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xdf_write_uint32>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %esi,%edi
call   1030 <htole32@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1040 <fwrite@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
setne  %cl
mov    %ecx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @xdf_write_uint32(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = call i32 @htole32(i32 %6)
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = call i32 @fwrite(i32* %5, i32 4, i32 1, i32* %8)
%10 = icmp ne i32 %9, 1
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 1, i32* %3
br label %13
12: ; preds = %2
store i32 0, i32* %3
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @xdf_write_uint32(i32* nocapture %0, i32 %1) {
%3 = alloca i32
%4 = tail call i32 @htole32(i32 %1)
store i32 %4, i32* %3
%5 = call i32 @fwrite(i32* %3, i32 4, i32 1, i32* %0)
%6 = icmp ne i32 %5, 1
%7 = zext i1 %6 to i32
ret i32 %7
}
const char *__malidrv_build_info(void) {
  return "malidrv:  API_VERSION=401 REPO_URL= REVISION= CHANGED_REVISION= "
         "CHANGE_DATE= BUILD_DATE=Ср. июня 17 12:30:38 KRAT 2015 BUILD=debug "
         "TARGET_PLATFORM= MALI_PLATFORM= KDIR= "
         "OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING= "
         "USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 "
         "USING_POWER_PERFORMANCE_POLICY= MALI_UPPER_HALF_SCHEDULING=1";
}


x86 assembly (clang, -O0):
<__malidrv_build_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__malidrv_build_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [352 x i8] c"malidrv: API_VERSION=401 REPO_URL= REVISION= CHANGED_REVISION= CHANGE_DATE= BUILD_DATE=\D0\A1\D1\80. \D0\B8\D1\8E\D0\BD\D1\8F 17 12:30:38 KRAT 2015 BUILD=debug TARGET_PLATFORM= MALI_PLATFORM= KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING= USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 USING_POWER_PERFORMANCE_POLICY= MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([352 x i8], [352 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [352 x i8] c"malidrv: API_VERSION=401 REPO_URL= REVISION= CHANGED_REVISION= CHANGE_DATE= BUILD_DATE=\D0\A1\D1\80. \D0\B8\D1\8E\D0\BD\D1\8F 17 12:30:38 KRAT 2015 BUILD=debug TARGET_PLATFORM= MALI_PLATFORM= KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING= USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 USING_POWER_PERFORMANCE_POLICY= MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([352 x i8], [352 x i8]* @.str, i64 0, i64 0)
}
double get_V() { return 12.0; }


x86 assembly (clang, -O0):
<get_V>:
push   %rbp
mov    %rsp,%rbp
movsd  0xef4(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_V>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @get_V() {
ret double 1.200000e+01
}

LLVM IR (-O2):
define double @get_V() {
ret double 1.200000e+01
}
/* Variables and functions */
int /*<<< orphan*/ __softboundmpx_strdup_handler(char *);
char *strndup(char const *, size_t);
__attribute__((__weak__, __always___)) char *softboundmpx_strndup(const char *s,
                                                                  size_t n) {
  char *ret_ptr = strndup(s, n);
  __softboundmpx_strdup_handler(ret_ptr);
  return ret_ptr;
}


x86 assembly (clang, -O0):
<softboundmpx_strndup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strndup@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <__softboundmpx_strdup_handler@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_strndup>:
push   %rbx
call   1030 <strndup@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <__softboundmpx_strdup_handler@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define weak i8* @softboundmpx_strndup(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @strndup(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = call i32 @__softboundmpx_strdup_handler(i8* %9)
%11 = load i8*, i8** %5
ret i8* %11
}

LLVM IR (-O2):
define weak i8* @softboundmpx_strndup(i8* %0, i64 %1) {
%3 = tail call i8* @strndup(i8* %0, i64 %1)
%4 = tail call i32 @__softboundmpx_strdup_handler(i8* %3)
ret i8* %3
}
WAVE_saw() {}


x86 assembly (clang, -O0):
<WAVE_saw>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<WAVE_saw>:
ret

LLVM IR (-O0):
define i32 @WAVE_saw() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @WAVE_saw() {
ret i32 undef
}
char caesaren(char c, int key) {
  if ((c != '\0') && (c != '\n') && (c != '\r')) {
    char out = c - key;
    return out;
  } else {
    return '\0';
  }
}


x86 assembly (clang, -O0):
<caesaren>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
mov    %esi,-0x8(%rbp)
movsbl -0x2(%rbp),%eax
cmp    $0x0,%eax
je     1149 <caesaren+0x49>
movsbl -0x2(%rbp),%eax
cmp    $0xa,%eax
je     1149 <caesaren+0x49>
movsbl -0x2(%rbp),%eax
cmp    $0xd,%eax
je     1149 <caesaren+0x49>
movsbl -0x2(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
mov    %al,-0x1(%rbp)
jmp    114d <caesaren+0x4d>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<caesaren>:
mov    %edi,%eax
cmp    $0xd,%al
ja     1117 <caesaren+0x17>
movzbl %al,%ecx
mov    $0x2401,%edx
bt     %rcx,%rdx
jae    1117 <caesaren+0x17>
xor    %eax,%eax
ret
sub    %sil,%al
ret

LLVM IR (-O0):
define signext i8 @caesaren(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i8
store i8 %0, i8* %4
store i32 %1, i32* %5
%7 = load i8, i8* %4
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %25
10: ; preds = %2
%11 = load i8, i8* %4
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 10
br i1 %13, label %14, label %25
14: ; preds = %10
%15 = load i8, i8* %4
%16 = sext i8 %15 to i32
%17 = icmp ne i32 %16, 13
br i1 %17, label %18, label %25
18: ; preds = %14
%19 = load i8, i8* %4
%20 = sext i8 %19 to i32
%21 = load i32, i32* %5
%22 = sub nsw i32 %20, %21
%23 = trunc i32 %22 to i8
store i8 %23, i8* %6
%24 = load i8, i8* %6
store i8 %24, i8* %3
br label %26
25: ; preds = %14, %10, %2
store i8 0, i8* %3
br label %26
26: ; preds = %25, %18
%27 = load i8, i8* %3
ret i8 %27
}

LLVM IR (-O2):
define signext i8 @caesaren(i8 signext %0, i32 %1) {
switch i8 %0, label %3 [
i8 13, label %6
i8 10, label %6
i8 0, label %6
]
3: ; preds = %2
%4 = trunc i32 %1 to i8
%5 = sub i8 %0, %4
br label %6
6: ; preds = %2, %2, %2, %3
%7 = phi i8 [ %5, %3 ], [ 0, %2 ], [ 0, %2 ], [ 0, %2 ]
ret i8 %7
}
void f3(int val) { *(volatile unsigned int *)0x880000UL = val; }


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x880000,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
mov    %edi,0x880000
ret

LLVM IR (-O0):
define void @f3(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store volatile i32 %3, i32* inttoptr (i64 8912896 to i32*)
ret void
}

LLVM IR (-O2):
define void @f3(i32 %0) {
store volatile i32 %0, i32* inttoptr (i64 8912896 to i32*)
ret void
}
double f4_cb_send_two_int(double (*cb)(int, int)) {
  int r1 = 44;
  int r2 = 44;
  return cb(r1, r2) + 1.0;
}


x86 assembly (clang, -O0):
<f4_cb_send_two_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x2c,-0xc(%rbp)
movl   $0x2c,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   *%rax
movsd  0xed2(%rip),%xmm1
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4_cb_send_two_int>:
push   %rax
mov    %rdi,%rax
mov    $0x2c,%edi
mov    $0x2c,%esi
call   *%rax
addsd  0xee8(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @f4_cb_send_two_int(double (i32, i32)* %0) {
%2 = alloca double (i32, i32)*
%3 = alloca i32
%4 = alloca i32
store double (i32, i32)* %0, double (i32, i32)** %2
store i32 44, i32* %3
store i32 44, i32* %4
%5 = load double (i32, i32)*, double (i32, i32)** %2
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call double %5(i32 %6, i32 %7)
%9 = fadd double %8, 1.000000e+00
ret double %9
}

LLVM IR (-O2):
define double @f4_cb_send_two_int(double (i32, i32)* nocapture %0) {
%2 = tail call double %0(i32 44, i32 44)
%3 = fadd double %2, 1.000000e+00
ret double %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int phy_delayed_standby(uint16_t us) { return 0; }


x86 assembly (clang, -O0):
<phy_delayed_standby>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<phy_delayed_standby>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @phy_delayed_standby(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @phy_delayed_standby(i32 %0) {
ret i32 0
}
unsigned int getByte(unsigned int i, unsigned int j) {
  i >>= (j - 1);
  return (i & 0xFF);
}


x86 assembly (clang, -O0):
<getByte>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
mov    -0x4(%rbp),%eax
shr    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getByte>:
lea    -0x1(%rsi),%ecx
shr    %cl,%edi
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @getByte(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = sub i32 %5, 1
%7 = load i32, i32* %3
%8 = lshr i32 %7, %6
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = and i32 %9, 255
ret i32 %10
}

LLVM IR (-O2):
define i32 @getByte(i32 %0, i32 %1) {
%3 = add i32 %1, -1
%4 = lshr i32 %0, %3
%5 = and i32 %4, 255
ret i32 %5
}
int is_int(char c) { return '0' <= c && c <= '9'; }


x86 assembly (clang, -O0):
<is_int>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
xor    %eax,%eax
mov    $0x30,%ecx
cmp    %edx,%ecx
mov    %al,-0x2(%rbp)
jg     112d <is_int+0x2d>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_int>:
add    $0xd0,%dil
xor    %eax,%eax
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_int(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sle i32 48, %4
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 57
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_int(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
unsigned int nl_calc_hash(int cat, int id1, int id2, int id3, int id4) {
  unsigned int h;
  h = id1 ^ id2 ^ id3 ^ id4 ^ (cat << 5);
  h += (h >> 6);
  return h & (1024 - 1);
}


x86 assembly (clang, -O0):
<nl_calc_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    -0x8(%rbp),%eax
xor    -0xc(%rbp),%eax
xor    -0x10(%rbp),%eax
xor    -0x14(%rbp),%eax
mov    -0x4(%rbp),%ecx
shl    $0x5,%ecx
xor    %ecx,%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
shr    $0x6,%eax
add    -0x18(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
and    $0x3ff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nl_calc_hash>:
shl    $0x5,%edi
xor    %edx,%esi
xor    %edi,%esi
xor    %r8d,%ecx
xor    %esi,%ecx
mov    %ecx,%eax
shr    $0x6,%eax
add    %ecx,%eax
and    $0x3ff,%eax
ret

LLVM IR (-O0):
define i32 @nl_calc_hash(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = xor i32 %12, %13
%15 = load i32, i32* %9
%16 = xor i32 %14, %15
%17 = load i32, i32* %10
%18 = xor i32 %16, %17
%19 = load i32, i32* %6
%20 = shl i32 %19, 5
%21 = xor i32 %18, %20
store i32 %21, i32* %11
%22 = load i32, i32* %11
%23 = lshr i32 %22, 6
%24 = load i32, i32* %11
%25 = add i32 %24, %23
store i32 %25, i32* %11
%26 = load i32, i32* %11
%27 = and i32 %26, 1023
ret i32 %27
}

LLVM IR (-O2):
define i32 @nl_calc_hash(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = shl i32 %0, 5
%7 = xor i32 %6, %1
%8 = xor i32 %7, %2
%9 = xor i32 %8, %3
%10 = xor i32 %9, %4
%11 = lshr i32 %10, 6
%12 = add i32 %11, %10
%13 = and i32 %12, 1023
ret i32 %13
}
/* Variables and functions */
double __ocml_atan2_f64(double, double);
double atan2(double x, double y) { return __ocml_atan2_f64(x, y); }


x86 assembly (clang, -O0):
<atan2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <__ocml_atan2_f64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atan2>:
jmp    1030 <__ocml_atan2_f64@plt>

LLVM IR (-O0):
define double @atan2(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @__ocml_atan2_f64(double %5, double %6)
ret double %7
}

LLVM IR (-O2):
define double @atan2(double %0, double %1) {
%3 = tail call double @__ocml_atan2_f64(double %0, double %1)
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void aa_tree_freemem(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<aa_tree_freemem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aa_tree_freemem>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @aa_tree_freemem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @aa_tree_freemem(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
scalar_t__ checkThatOnlyOneBitIsSet(int);
bool isPermutationOfPalindrome(char *phrase) {
  bool chackThatOnlyOneBitIsSet(int);
  int createBitVector(char *);
  int bitVector;
  bitVector = createBitVector(phrase);
  return bitVector == 0 || checkThatOnlyOneBitIsSet(bitVector);
}


x86 assembly (clang, -O0):
<isPermutationOfPalindrome>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <createBitVector@plt>
mov    %eax,-0xc(%rbp)
mov    $0x1,%al
cmpl   $0x0,-0xc(%rbp)
mov    %al,-0xd(%rbp)
je     1159 <isPermutationOfPalindrome+0x39>
mov    -0xc(%rbp),%edi
call   1040 <checkThatOnlyOneBitIsSet@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPermutationOfPalindrome>:
push   %rax
call   1030 <createBitVector@plt>
test   %eax,%eax
je     113e <isPermutationOfPalindrome+0x1e>
mov    %eax,%edi
call   1040 <checkThatOnlyOneBitIsSet@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rcx
ret
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @isPermutationOfPalindrome(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @createBitVector(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp eq i32 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = load i32, i32* %3
%10 = call i64 @checkThatOnlyOneBitIsSet(i32 %9)
%11 = icmp ne i64 %10, 0
br label %12
12: ; preds = %8, %1
%13 = phi i1 [ true, %1 ], [ %11, %8 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @isPermutationOfPalindrome(i8* %0) {
%2 = tail call i32 @createBitVector(i8* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = tail call i64 @checkThatOnlyOneBitIsSet(i32 %2)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
float __avr32_f32_add_fast(float, float);
float float_add(float a, float b) { return __avr32_f32_add_fast(a, b); }


x86 assembly (clang, -O0):
<float_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <__avr32_f32_add_fast@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<float_add>:
jmp    1030 <__avr32_f32_add_fast@plt>

LLVM IR (-O0):
define float @float_add(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call float @__avr32_f32_add_fast(float %5, float %6)
ret float %7
}

LLVM IR (-O2):
define float @float_add(float %0, float %1) {
%3 = tail call float @__avr32_f32_add_fast(float %0, float %1)
ret float %3
}
double absolute(double x) { return x >= 0 ? x : -x; }


x86 assembly (clang, -O0):
<absolute>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     112a <absolute+0x2a>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    114b <absolute+0x4b>
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<absolute>:
movapd 0xef8(%rip),%xmm1
xorpd  %xmm0,%xmm1
xorpd  %xmm2,%xmm2
cmplesd %xmm0,%xmm2
andpd  %xmm2,%xmm0
andnpd %xmm1,%xmm2
orpd   %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @absolute(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp oge double %3, 0.000000e+00
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load double, double* %2
br label %10
7: ; preds = %1
%8 = load double, double* %2
%9 = fneg double %8
br label %10
10: ; preds = %7, %5
%11 = phi double [ %6, %5 ], [ %9, %7 ]
ret double %11
}

LLVM IR (-O2):
define double @absolute(double %0) {
%2 = fcmp oge double %0, 0.000000e+00
%3 = fneg double %0
%4 = select i1 %2, double %0, double %3
ret double %4
}
void caller_2_2_1_2_1_1_2() {}


x86 assembly (clang, -O0):
<caller_2_2_1_2_1_1_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<caller_2_2_1_2_1_1_2>:
ret

LLVM IR (-O0):
define void @caller_2_2_1_2_1_1_2() {
ret void
}

LLVM IR (-O2):
define void @caller_2_2_1_2_1_1_2() {
ret void
}
/* Variables and functions */
int gpio_set_function(int, int);
int test_gpio(void) { return gpio_set_function(16, 1); }


x86 assembly (clang, -O0):
<test_gpio>:
push   %rbp
mov    %rsp,%rbp
mov    $0x10,%edi
mov    $0x1,%esi
call   1030 <gpio_set_function@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_gpio>:
mov    $0x10,%edi
mov    $0x1,%esi
jmp    1030 <gpio_set_function@plt>

LLVM IR (-O0):
define i32 @test_gpio() {
%1 = call i32 @gpio_set_function(i32 16, i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @test_gpio() {
%1 = tail call i32 @gpio_set_function(i32 16, i32 1)
ret i32 %1
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ serial;
};
struct TYPE_4__ {
  TYPE_1__ xcirculate;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
unsigned long get_XEvent_xcirculate_serial(void *_p) {
  return (unsigned long)((XEvent *)_p)->xcirculate.serial;
}


x86 assembly (clang, -O0):
<get_XEvent_xcirculate_serial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xcirculate_serial>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i64 @get_XEvent_xcirculate_serial(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @get_XEvent_xcirculate_serial(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ _sigblock();
int /*<<< orphan*/ _sigpause(int /*<<< orphan*/);
_pause() { _sigpause(_sigblock()); }


x86 assembly (clang, -O0):
<_pause>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <_sigblock@plt>
mov    %eax,%edi
call   1040 <_sigpause@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_pause>:
push   %rax
xor    %eax,%eax
call   1030 <_sigblock@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <_sigpause@plt>

LLVM IR (-O0):
define i32 @_pause() {
%1 = alloca i32
%2 = call i32 (...) @_sigblock()
%3 = call i32 @_sigpause(i32 %2)
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @_pause() {
%1 = tail call i32 (...) @_sigblock()
%2 = tail call i32 @_sigpause(i32 %1)
ret i32 undef
}
void ipx_Shutdown(void) {}


x86 assembly (clang, -O0):
<ipx_Shutdown>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipx_Shutdown>:
ret

LLVM IR (-O0):
define void @ipx_Shutdown() {
ret void
}

LLVM IR (-O2):
define void @ipx_Shutdown() {
ret void
}
void __rename(const char *oldfn, const char *newfn) {}


x86 assembly (clang, -O0):
<__rename>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__rename>:
ret

LLVM IR (-O0):
define void @__rename(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @__rename(i8* nocapture %0, i8* nocapture %1) {
ret void
}
void f3(void) {}


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
ret

LLVM IR (-O0):
define void @f3() {
ret void
}

LLVM IR (-O2):
define void @f3() {
ret void
}
/* Variables and functions */
long LONG_MIN;
long ft_abs(long nbr) {
  if (nbr == LONG_MIN)
    return (0);
  else if (nbr < 0)
    return (-nbr);
  else
    return (nbr);
}


x86 assembly (clang, -O0):
<ft_abs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x2ed5(%rip),%rcx
cmp    (%rcx),%rax
jne    1129 <ft_abs+0x29>
movq   $0x0,-0x8(%rbp)
jmp    114b <ft_abs+0x4b>
cmpq   $0x0,-0x10(%rbp)
jge    1143 <ft_abs+0x43>
xor    %eax,%eax
sub    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    114b <ft_abs+0x4b>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_abs>:
mov    0x2ee1(%rip),%rcx
mov    %rdi,%rdx
neg    %rdx
cmovs  %rdi,%rdx
xor    %eax,%eax
cmp    %rdi,(%rcx)
cmovne %rdx,%rax
ret

LLVM IR (-O0):
@LONG_MIN = global i64 0
define i64 @ft_abs(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = load i64, i64* @LONG_MIN
%6 = icmp eq i64 %4, %5
br i1 %6, label %7, label %8
7: ; preds = %1
store i64 0, i64* %2
br label %16
8: ; preds = %1
%9 = load i64, i64* %3
%10 = icmp slt i64 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i64, i64* %3
%13 = sub nsw i64 0, %12
store i64 %13, i64* %2
br label %16
14: ; preds = %8
%15 = load i64, i64* %3
store i64 %15, i64* %2
br label %16
16: ; preds = %14, %11, %7
%17 = load i64, i64* %2
ret i64 %17
}

LLVM IR (-O2):
@LONG_MIN = global i64 0
define i64 @ft_abs(i64 %0) {
%2 = load i64, i64* @LONG_MIN
%3 = icmp eq i64 %2, %0
%4 = tail call i64 @llvm.abs.i64(i64 %0, i1 true)
%5 = select i1 %3, i64 0, i64 %4
ret i64 %5
}
void pcp_print_psiio_stats(struct activity *a, int curr) {}


x86 assembly (clang, -O0):
<pcp_print_psiio_stats>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcp_print_psiio_stats>:
ret

LLVM IR (-O0):
%struct.activity = type opaque
define void @pcp_print_psiio_stats(%struct.activity* %0, i32 %1) {
%3 = alloca %struct.activity*
%4 = alloca i32
store %struct.activity* %0, %struct.activity** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.activity = type opaque
define void @pcp_print_psiio_stats(%struct.activity* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
size_t rand();
void InitializeArray(int *a, size_t size) {
  for (int i = 0; i < size; ++i)
    a[i] = rand() % size;
}


x86 assembly (clang, -O0):
<InitializeArray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movslq -0x14(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    115d <InitializeArray+0x4d>
mov    $0x0,%al
call   1030 <rand@plt>
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1127 <InitializeArray+0x17>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<InitializeArray>:
push   %r15
push   %r14
push   %rbx
test   %rsi,%rsi
je     115c <InitializeArray+0x4c>
mov    %rsi,%r15
mov    %rdi,%r14
xor    %ebx,%ebx
jmp    1142 <InitializeArray+0x32>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
xor    %edx,%edx
div    %r15
mov    %edx,(%r14,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%r15
je     115c <InitializeArray+0x4c>
xor    %eax,%eax
call   1030 <rand@plt>
mov    %rax,%rcx
or     %r15,%rcx
shr    $0x20,%rcx
jne    1130 <InitializeArray+0x20>
xor    %edx,%edx
div    %r15d
jmp    1135 <InitializeArray+0x25>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @InitializeArray(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = alloca i32
store i32* %0, i32** %3
store i64 %1, i64* %4
store i32 0, i32* %5
br label %6
6: ; preds = %20, %2
%7 = load i32, i32* %5
%8 = sext i32 %7 to i64
%9 = load i64, i64* %4
%10 = icmp ult i64 %8, %9
br i1 %10, label %11, label %23
11: ; preds = %6
%12 = call i64 (...) @rand()
%13 = load i64, i64* %4
%14 = urem i64 %12, %13
%15 = trunc i64 %14 to i32
%16 = load i32*, i32** %3
%17 = load i32, i32* %5
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i32, i32* %16, i64 %18
store i32 %15, i32* %19
br label %20
20: ; preds = %11
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
store i32 %22, i32* %5
br label %6
23: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @InitializeArray(i32* nocapture writeonly %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %4, label %5
4: ; preds = %5, %2
ret void
5: ; preds = %2, %5
%6 = phi i64 [ %11, %5 ], [ 0, %2 ]
%7 = tail call i64 (...) @rand()
%8 = urem i64 %7, %1
%9 = trunc i64 %8 to i32
%10 = getelementptr inbounds i32, i32* %0, i64 %6
store i32 %9, i32* %10
%11 = add nuw i64 %6, 1
%12 = icmp eq i64 %11, %1
br i1 %12, label %4, label %5
}
void *test_anti_range_50(signed char n) {
  extern void *alloc_anti_range_50(signed char) __attribute__((alloc_size(1)));
  if (0x7f - 1 <= n && n <= 0x7f - 1)
    n = 0x7f - 1 - 1;
  return alloc_anti_range_50(n);
}


x86 assembly (clang, -O0):
<test_anti_range_50>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x7e,%eax
cmp    %ecx,%eax
jg     1140 <test_anti_range_50+0x30>
movsbl -0x1(%rbp),%eax
cmp    $0x7e,%eax
jg     1140 <test_anti_range_50+0x30>
movb   $0x7d,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <alloc_anti_range_50@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_anti_range_50>:
cmp    $0x7e,%dil
mov    $0x7d,%eax
cmove  %eax,%edi
jmp    1030 <alloc_anti_range_50@plt>

LLVM IR (-O0):
define i8* @test_anti_range_50(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sle i32 126, %4
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 126
br i1 %9, label %10, label %11
10: ; preds = %6
store i8 125, i8* %2
br label %11
11: ; preds = %10, %6, %1
%12 = load i8, i8* %2
%13 = call i8* @alloc_anti_range_50(i8 signext %12)
ret i8* %13
}

LLVM IR (-O2):
define i8* @test_anti_range_50(i8 signext %0) {
%2 = icmp eq i8 %0, 126
%3 = select i1 %2, i8 125, i8 %0
%4 = tail call i8* @alloc_anti_range_50(i8 signext %3)
ret i8* %4
}
int test_imm_5Eint32_mem(int *val) {
  return ((*val) & (0x5E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Eint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x5e,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Eint32_mem>:
testb  $0x5e,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Eint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 94
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_5Eint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 94
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void raiseerror(char *message) {
  fprintf(stderr, "Error: %s\n", message);
  exit(1);
}


x86 assembly (clang, -O0):
<raiseerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<raiseerror>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [11 x i8] c"Error: %s\0A\00"
define void @raiseerror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [11 x i8] c"Error: %s\0A\00"
define void @raiseerror(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_context_get_source_output_info() {
  printf("NOT IMPLEMENTED:"
         "pa_context_get_source_output_info"
         "\n");
}


x86 assembly (clang, -O0):
<pa_context_get_source_output_info>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_context_get_source_output_info>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [51 x i8] c"NOT IMPLEMENTED:pa_context_get_source_output_info\0A\00"
define i32 @pa_context_get_source_output_info() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [50 x i8] c"NOT IMPLEMENTED:pa_context_get_source_output_info\00"
define i32 @pa_context_get_source_output_info() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([50 x i8], [50 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ PKCS7_DIGEST;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
scalar_t__ ASN1_item_d2i(int /*<<< orphan*/ **, unsigned char const **, long,
                         int /*<<< orphan*/ *);
int /*<<< orphan*/ PKCS7_DIGEST_it;
PKCS7_DIGEST *d2i_PKCS7_DIGEST(PKCS7_DIGEST **a, const unsigned char **in,
                               long len) {
  return (PKCS7_DIGEST *)ASN1_item_d2i((ASN1_VALUE **)a, in, len,
                                       &PKCS7_DIGEST_it);
}


x86 assembly (clang, -O0):
<d2i_PKCS7_DIGEST>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    0x2eb1(%rip),%rcx
call   1030 <ASN1_item_d2i@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_PKCS7_DIGEST>:
mov    0x2ed1(%rip),%rcx
jmp    1030 <ASN1_item_d2i@plt>

LLVM IR (-O0):
@PKCS7_DIGEST_it = global i32 0
define i32* @d2i_PKCS7_DIGEST(i32** %0, i8** %1, i64 %2) {
%4 = alloca i32**
%5 = alloca i8**
%6 = alloca i64
store i32** %0, i32*** %4
store i8** %1, i8*** %5
store i64 %2, i64* %6
%7 = load i32**, i32*** %4
%8 = load i8**, i8*** %5
%9 = load i64, i64* %6
%10 = call i64 @ASN1_item_d2i(i32** %7, i8** %8, i64 %9, i32* @PKCS7_DIGEST_it)
%11 = inttoptr i64 %10 to i32*
ret i32* %11
}

LLVM IR (-O2):
@PKCS7_DIGEST_it = global i32 0
define i32* @d2i_PKCS7_DIGEST(i32** %0, i8** %1, i64 %2) {
%4 = tail call i64 @ASN1_item_d2i(i32** %0, i8** %1, i64 %2, i32* @PKCS7_DIGEST_it)
%5 = inttoptr i64 %4 to i32*
ret i32* %5
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0x5c() {
  Assert_real((isalnum(92) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              465, ("isalnum should be 0 for 0x5c"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x5c>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5c,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x1d1,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x5c>:
push   %rax
mov    $0x5c,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x1d1,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x5c\00"
define void @t_isalnum_0x5c() {
%1 = call i64 @isalnum(i32 92)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 465, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x5c\00"
define void @t_isalnum_0x5c() {
%1 = tail call i64 @isalnum(i32 92)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 465, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}