xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ klock_getT2();
int getTIssue(int x) {
  int *a, *b;
  int c = 30;
  b = (int *)klock_getT2();
  while (c > 20) {
    a = (int *)klock_getT2();
    c = *a - *b;
    b = a;
  }
  return c;
}


x86 assembly (clang, -O0):
<getTIssue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x1e,-0x1c(%rbp)
mov    $0x0,%al
call   1030 <klock_getT2@plt>
mov    %rax,-0x18(%rbp)
cmpl   $0x14,-0x1c(%rbp)
jle    115e <getTIssue+0x4e>
mov    $0x0,%al
call   1030 <klock_getT2@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
sub    (%rcx),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112d <getTIssue+0x1d>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getTIssue>:
push   %rbx
xor    %eax,%eax
call   1030 <klock_getT2@plt>
mov    %rax,%rbx
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <klock_getT2@plt>
mov    %rax,%rcx
mov    (%rax),%eax
sub    (%rbx),%eax
mov    %rcx,%rbx
cmp    $0x14,%eax
jg     1120 <getTIssue+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define i32 @getTIssue(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %2
store i32 30, i32* %5
%6 = call i64 (...) @klock_getT2()
%7 = inttoptr i64 %6 to i32*
store i32* %7, i32** %4
br label %8
8: ; preds = %11, %1
%9 = load i32, i32* %5
%10 = icmp sgt i32 %9, 20
br i1 %10, label %11, label %20
11: ; preds = %8
%12 = call i64 (...) @klock_getT2()
%13 = inttoptr i64 %12 to i32*
store i32* %13, i32** %3
%14 = load i32*, i32** %3
%15 = load i32, i32* %14
%16 = load i32*, i32** %4
%17 = load i32, i32* %16
%18 = sub nsw i32 %15, %17
store i32 %18, i32* %5
%19 = load i32*, i32** %3
store i32* %19, i32** %4
br label %8
20: ; preds = %8
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
define i32 @getTIssue(i32 %0) {
%2 = tail call i64 (...) @klock_getT2()
%3 = inttoptr i64 %2 to i32*
br label %4
4: ; preds = %1, %4
%5 = phi i32* [ %3, %1 ], [ %7, %4 ]
%6 = tail call i64 (...) @klock_getT2()
%7 = inttoptr i64 %6 to i32*
%8 = load i32, i32* %7
%9 = load i32, i32* %5
%10 = sub nsw i32 %8, %9
%11 = icmp sgt i32 %10, 20
br i1 %11, label %4, label %12
12: ; preds = %4
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void failQuit(char *message) {
  fprintf(stderr, "raru critical failure: %s\n", message);
  _exit(1);
}


x86 assembly (clang, -O0):
<failQuit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<failQuit>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [27 x i8] c"raru critical failure: %s\0A\00"
define void @failQuit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @_exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [27 x i8] c"raru critical failure: %s\0A\00"
define void @failQuit(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @_exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void foobar(int b) { printf("%d\n", b); }


x86 assembly (clang, -O0):
<foobar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foobar>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @foobar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @foobar(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
const char *get_temp_directory() { return "/tmp"; }


x86 assembly (clang, -O0):
<get_temp_directory>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_temp_directory>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"/tmp\00"
define i8* @get_temp_directory() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [5 x i8] c"/tmp\00"
define i8* @get_temp_directory() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int tm_min;
};

/* Variables and functions */
struct tm *localtime(int /*<<< orphan*/ *);
int /*<<< orphan*/ time(void *);
int date_get_min(void) {
  time_t t;
  struct tm *lt;
  t = time((void *)0);
  lt = localtime(&t);
  return lt->tm_min;
}


x86 assembly (clang, -O0):
<date_get_min>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,-0x4(%rbp)
lea    -0x4(%rbp),%rdi
call   1030 <localtime@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<date_get_min>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1030 <localtime@plt>
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define i32 @date_get_min() {
%1 = alloca i32
%2 = alloca %struct.tm*
%3 = call i32 @time(i8* null)
store i32 %3, i32* %1
%4 = call %struct.tm* @localtime(i32* %1)
store %struct.tm* %4, %struct.tm** %2
%5 = load %struct.tm*, %struct.tm** %2
%6 = getelementptr inbounds %struct.tm, %struct.tm* %5, i32 0, i32 0
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define i32 @date_get_min() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @time(i8* null)
store i32 %3, i32* %1
%4 = call %struct.tm* @localtime(i32* %1)
%5 = getelementptr inbounds %struct.tm, %struct.tm* %4, i64 0, i32 0
%6 = load i32, i32* %5
ret i32 %6
}
/* Type definitions */
struct sockaddr_in {
  int /*<<< orphan*/ sin_port;
};

/* Variables and functions */
scalar_t__ ntohs(int /*<<< orphan*/);
int idrnet_sockaddr_ipv4_port(void *sockaddr) {
  struct sockaddr_in *addr = (struct sockaddr_in *)sockaddr;
  return ((int)ntohs(addr->sin_port));
}


x86 assembly (clang, -O0):
<idrnet_sockaddr_ipv4_port>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
call   1030 <ntohs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<idrnet_sockaddr_ipv4_port>:
mov    (%rdi),%edi
jmp    1030 <ntohs@plt>

LLVM IR (-O0):
%struct.sockaddr_in = type { i32 }
define i32 @idrnet_sockaddr_ipv4_port(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.sockaddr_in*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to %struct.sockaddr_in*
store %struct.sockaddr_in* %5, %struct.sockaddr_in** %3
%6 = load %struct.sockaddr_in*, %struct.sockaddr_in** %3
%7 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %6, i32 0, i32 0
%8 = load i32, i32* %7
%9 = call i64 @ntohs(i32 %8)
%10 = trunc i64 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @idrnet_sockaddr_ipv4_port(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i64 @ntohs(i32 %3)
%5 = trunc i64 %4 to i32
ret i32 %5
}
unsigned int tseDisable(void) {
  if ((*((volatile unsigned int *const)((0x40010000 + 0) + 0x3c))) &
      (1 << 29)) {
    (*((volatile unsigned int *const)((0x40010000 + 0) + 0x3c))) ^= (1 << 29);
  }
  (*((volatile unsigned int *const)(0x40010000 + 0x1024))) = 0;
  return 0;
}


x86 assembly (clang, -O0):
<tseDisable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4001003c,%eax
mov    (%rax),%eax
and    $0x20000000,%eax
cmp    $0x0,%eax
je     112d <tseDisable+0x2d>
mov    $0x4001003c,%eax
mov    (%rax),%ecx
xor    $0x20000000,%ecx
mov    $0x4001003c,%eax
mov    %ecx,(%rax)
mov    $0x40011024,%eax
movl   $0x0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tseDisable>:
testl  $0x20000000,0x4001003c
je     1118 <tseDisable+0x18>
xorl   $0x20000000,0x4001003c
movl   $0x0,0x40011024
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @tseDisable() {
%1 = load volatile i32, i32* inttoptr (i64 1073807420 to i32*)
%2 = and i32 %1, 536870912
%3 = icmp ne i32 %2, 0
br i1 %3, label %4, label %7
4: ; preds = %0
%5 = load volatile i32, i32* inttoptr (i64 1073807420 to i32*)
%6 = xor i32 %5, 536870912
store volatile i32 %6, i32* inttoptr (i64 1073807420 to i32*)
br label %7
7: ; preds = %4, %0
store volatile i32 0, i32* inttoptr (i64 1073811492 to i32*)
ret i32 0
}

LLVM IR (-O2):
define i32 @tseDisable() {
%1 = load volatile i32, i32* inttoptr (i64 1073807420 to i32*)
%2 = and i32 %1, 536870912
%3 = icmp eq i32 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %0
%5 = load volatile i32, i32* inttoptr (i64 1073807420 to i32*)
%6 = xor i32 %5, 536870912
store volatile i32 %6, i32* inttoptr (i64 1073807420 to i32*)
br label %7
7: ; preds = %4, %0
store volatile i32 0, i32* inttoptr (i64 1073811492 to i32*)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ XUnmapEvent;

/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ malloc(int);
void *alloc_XUnmapEvent(void) {
  XUnmapEvent *_p = (XUnmapEvent *)malloc(sizeof(XUnmapEvent));
  if (_p == NULL)
    abort();
  return (void *)_p;
}


x86 assembly (clang, -O0):
<alloc_XUnmapEvent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1148 <alloc_XUnmapEvent+0x28>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_XUnmapEvent>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
test   %rax,%rax
je     1132 <alloc_XUnmapEvent+0x12>
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i8* @alloc_XUnmapEvent() {
%1 = alloca i32*
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32* %3, i32** %1
%4 = load i32*, i32** %1
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 (...) @abort()
unreachable
8: ; preds = %0
%9 = load i32*, i32** %1
%10 = bitcast i32* %9 to i8*
ret i8* %10
}

LLVM IR (-O2):
define i8* @alloc_XUnmapEvent() {
%1 = tail call i64 @malloc(i32 4)
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = inttoptr i64 %1 to i8*
ret i8* %6
}
void write_int(unsigned char *buf, int value) {
  buf[0] = 0xFF & value;
  buf[1] = 0xFF & (value >> 8);
  buf[2] = 0xFF & (value >> 16);
  buf[3] = 0xFF & (value >> 24);
}


x86 assembly (clang, -O0):
<write_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0xc(%rbp),%eax
sar    $0x10,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0xc(%rbp),%eax
sar    $0x18,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_int>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @write_int(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 255, %5
%7 = trunc i32 %6 to i8
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 0
store i8 %7, i8* %9
%10 = load i32, i32* %4
%11 = ashr i32 %10, 8
%12 = and i32 255, %11
%13 = trunc i32 %12 to i8
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i64 1
store i8 %13, i8* %15
%16 = load i32, i32* %4
%17 = ashr i32 %16, 16
%18 = and i32 255, %17
%19 = trunc i32 %18 to i8
%20 = load i8*, i8** %3
%21 = getelementptr inbounds i8, i8* %20, i64 2
store i8 %19, i8* %21
%22 = load i32, i32* %4
%23 = ashr i32 %22, 24
%24 = and i32 255, %23
%25 = trunc i32 %24 to i8
%26 = load i8*, i8** %3
%27 = getelementptr inbounds i8, i8* %26, i64 3
store i8 %25, i8* %27
ret void
}

LLVM IR (-O2):
define void @write_int(i8* nocapture writeonly %0, i32 %1) {
%3 = trunc i32 %1 to i8
store i8 %3, i8* %0
%4 = lshr i32 %1, 8
%5 = trunc i32 %4 to i8
%6 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %5, i8* %6
%7 = lshr i32 %1, 16
%8 = trunc i32 %7 to i8
%9 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %8, i8* %9
%10 = lshr i32 %1, 24
%11 = trunc i32 %10 to i8
%12 = getelementptr inbounds i8, i8* %0, i64 3
store i8 %11, i8* %12
ret void
}
void ade7754_unconfigure_ring(struct iio_dev *indio_dev) {}


x86 assembly (clang, -O0):
<ade7754_unconfigure_ring>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ade7754_unconfigure_ring>:
ret

LLVM IR (-O0):
%struct.iio_dev = type opaque
define void @ade7754_unconfigure_ring(%struct.iio_dev* %0) {
%2 = alloca %struct.iio_dev*
store %struct.iio_dev* %0, %struct.iio_dev** %2
ret void
}

LLVM IR (-O2):
%struct.iio_dev = type opaque
define void @ade7754_unconfigure_ring(%struct.iio_dev* nocapture %0) {
ret void
}
/* Variables and functions */
char *sleft(char *, int);
char *sreverse(char *);
char *sright(char *str, int len) { return sreverse(sleft(sreverse(str), len)); }


x86 assembly (clang, -O0):
<sright>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <sreverse@plt>
mov    %rax,%rdi
mov    -0xc(%rbp),%esi
call   1040 <sleft@plt>
mov    %rax,%rdi
call   1030 <sreverse@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sright>:
push   %rbx
mov    %esi,%ebx
call   1030 <sreverse@plt>
mov    %rax,%rdi
mov    %ebx,%esi
call   1040 <sleft@plt>
mov    %rax,%rdi
pop    %rbx
jmp    1030 <sreverse@plt>

LLVM IR (-O0):
define i8* @sright(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i8* @sreverse(i8* %5)
%7 = load i32, i32* %4
%8 = call i8* @sleft(i8* %6, i32 %7)
%9 = call i8* @sreverse(i8* %8)
ret i8* %9
}

LLVM IR (-O2):
define i8* @sright(i8* %0, i32 %1) {
%3 = tail call i8* @sreverse(i8* %0)
%4 = tail call i8* @sleft(i8* %3, i32 %1)
%5 = tail call i8* @sreverse(i8* %4)
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ Exit(int /*<<< orphan*/);
void sig_int(int signo) { Exit(0); }


x86 assembly (clang, -O0):
<sig_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
call   1030 <Exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_int>:
xor    %edi,%edi
jmp    1030 <Exit@plt>

LLVM IR (-O0):
define void @sig_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @Exit(i32 0)
ret void
}

LLVM IR (-O2):
define void @sig_int(i32 %0) {
%2 = tail call i32 @Exit(i32 0)
ret void
}
/* Type definitions */
struct ct_section {
  int dummy;
};
struct ct_model {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ct_update_current_snapshot(struct ct_model *,
                                              struct ct_section *);
void ct_callback_entering_then(struct ct_model *model,
                               struct ct_section *section) {
  ct_update_current_snapshot(model, section);
}


x86 assembly (clang, -O0):
<ct_callback_entering_then>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <ct_update_current_snapshot@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ct_callback_entering_then>:
jmp    1030 <ct_update_current_snapshot@plt>

LLVM IR (-O0):
%struct.ct_model = type { i32 }
%struct.ct_section = type { i32 }
define void @ct_callback_entering_then(%struct.ct_model* %0, %struct.ct_section* %1) {
%3 = alloca %struct.ct_model*
%4 = alloca %struct.ct_section*
store %struct.ct_model* %0, %struct.ct_model** %3
store %struct.ct_section* %1, %struct.ct_section** %4
%5 = load %struct.ct_model*, %struct.ct_model** %3
%6 = load %struct.ct_section*, %struct.ct_section** %4
%7 = call i32 @ct_update_current_snapshot(%struct.ct_model* %5, %struct.ct_section* %6)
ret void
}

LLVM IR (-O2):
%struct.ct_model = type { i32 }
%struct.ct_section = type { i32 }
define void @ct_callback_entering_then(%struct.ct_model* %0, %struct.ct_section* %1) {
%3 = tail call i32 @ct_update_current_snapshot(%struct.ct_model* %0, %struct.ct_section* %1)
ret void
}
/* Type definitions */
struct timespec {
  scalar_t__ tv_nsec;
  scalar_t__ tv_sec;
};
typedef long long int64_t;

/* Variables and functions */
int /*<<< orphan*/ CLOCK_MONOTONIC;
int /*<<< orphan*/ clock_gettime(int /*<<< orphan*/, struct timespec *);
int64_t get_time_raw(void) {
  struct timespec ts;
  clock_gettime(CLOCK_MONOTONIC, &ts);
  return (int64_t)ts.tv_sec * 1000000000LL + (int64_t)ts.tv_nsec;
}


x86 assembly (clang, -O0):
<get_time_raw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    -0x10(%rbp),%rsi
call   1030 <clock_gettime@plt>
imul   $0x3b9aca00,-0x8(%rbp),%rax
3b
add    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_time_raw>:
sub    $0x18,%rsp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
lea    0x8(%rsp),%rsi
call   1030 <clock_gettime@plt>
imul   $0x3b9aca00,0x10(%rsp),%rax
9a 3b
add    0x8(%rsp),%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
@CLOCK_MONOTONIC = global i32 0
define i64 @get_time_raw() {
%1 = alloca %struct.timespec
%2 = load i32, i32* @CLOCK_MONOTONIC
%3 = call i32 @clock_gettime(i32 %2, %struct.timespec* %1)
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 1
%5 = load i64, i64* %4
%6 = mul nsw i64 %5, 1000000000
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 0
%8 = load i64, i64* %7
%9 = add nsw i64 %6, %8
ret i64 %9
}

LLVM IR (-O2):
%struct.timespec = type { i64, i64 }
@CLOCK_MONOTONIC = global i32 0
define i64 @get_time_raw() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = load i32, i32* @CLOCK_MONOTONIC
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %1)
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%6 = load i64, i64* %5
%7 = mul nsw i64 %6, 1000000000
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%9 = load i64, i64* %8
%10 = add nsw i64 %7, %9
ret i64 %10
}
int test_imm_C1int64_highword_reg(long long val) {
  return ((val >> 32) & (0xC1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C1int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xc1,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C1int64_highword_reg>:
movabs $0xc100000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C1int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 193
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C1int64_highword_reg(i64 %0) {
%2 = and i64 %0, 828928688128
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, unsigned int const);
char *utoa(const unsigned int val) {
  static char buf[13];
  sprintf(buf, "%u", val);
  return buf;
}


x86 assembly (clang, -O0):
<utoa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0x2f04(%rip),%rdi
lea    0xed4(%rip),%rsi
call   1030 <sprintf@plt>
lea    0x2ef1(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<utoa>:
push   %rbx
mov    %edi,%edx
lea    0x2f0f(%rip),%rbx
lea    0xedf(%rip),%rsi
mov    %rbx,%rdi
call   1030 <sprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@utoa.buf = internal global [13 x i8] zeroinitializer
@.str = [3 x i8] c"%u\00"
define i8* @utoa(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @sprintf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @utoa.buf, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i8* getelementptr inbounds ([13 x i8], [13 x i8]* @utoa.buf, i64 0, i64 0)
}

LLVM IR (-O2):
@utoa.buf = internal global [13 x i8] zeroinitializer
@.str = [3 x i8] c"%u\00"
define i8* @utoa(i32 %0) {
%2 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @utoa.buf, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i8* getelementptr inbounds ([13 x i8], [13 x i8]* @utoa.buf, i64 0, i64 0)
}
/* Variables and functions */
void *pthread_getspecific(int);
void *PyThread_get_key_value(int key) { return pthread_getspecific(key); }


x86 assembly (clang, -O0):
<PyThread_get_key_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <pthread_getspecific@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PyThread_get_key_value>:
jmp    1030 <pthread_getspecific@plt>

LLVM IR (-O0):
define i8* @PyThread_get_key_value(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @pthread_getspecific(i32 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @PyThread_get_key_value(i32 %0) {
%2 = tail call i8* @pthread_getspecific(i32 %0)
ret i8* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ EVP_PKEY_CTX;

/* Variables and functions */
int pkey_gost_encrypt_init(EVP_PKEY_CTX *ctx) { return 1; }


x86 assembly (clang, -O0):
<pkey_gost_encrypt_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pkey_gost_encrypt_init>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @pkey_gost_encrypt_init(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @pkey_gost_encrypt_init(i32* nocapture readnone %0) {
ret i32 1
}
int unregister_reboot_notifier(struct notifier_block *dummy) {
  int i;
  { return (i); }
}


x86 assembly (clang, -O0):
<unregister_reboot_notifier>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unregister_reboot_notifier>:
ret

LLVM IR (-O0):
%struct.notifier_block = type opaque
define i32 @unregister_reboot_notifier(%struct.notifier_block* %0) {
%2 = alloca %struct.notifier_block*
%3 = alloca i32
store %struct.notifier_block* %0, %struct.notifier_block** %2
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
%struct.notifier_block = type opaque
define i32 @unregister_reboot_notifier(%struct.notifier_block* nocapture readnone %0) {
ret i32 undef
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ mwidth;
};
typedef TYPE_1__ Screen;

/* Variables and functions */
int get_Screen_mwidth(void *_p) { return (int)((Screen *)_p)->mwidth; }


x86 assembly (clang, -O0):
<get_Screen_mwidth>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_Screen_mwidth>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_Screen_mwidth(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_Screen_mwidth(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
int reduzOR(int *v) {
  int i, ro;
  ro = 0x00000000;
  for (i = 0; i < 5; i++) {
    ro = ro | v[i];
  }
  return (ro);
}


x86 assembly (clang, -O0):
<reduzOR>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x5,-0xc(%rbp)
jge    113f <reduzOR+0x3f>
mov    -0x10(%rbp),%eax
mov    -0x8(%rbp),%rcx
movslq -0xc(%rbp),%rdx
or     (%rcx,%rdx,4),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <reduzOR+0x16>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reduzOR>:
movdqu 0x4(%rdi),%xmm0
pshufd $0xee,%xmm0,%xmm1
por    %xmm0,%xmm1
pshufd $0x55,%xmm1,%xmm0
por    %xmm1,%xmm0
movd   %xmm0,%eax
or     (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @reduzOR(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 5
br i1 %7, label %8, label %19
8: ; preds = %5
%9 = load i32, i32* %4
%10 = load i32*, i32** %2
%11 = load i32, i32* %3
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %10, i64 %12
%14 = load i32, i32* %13
%15 = or i32 %9, %14
store i32 %15, i32* %4
br label %16
16: ; preds = %8
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 1
store i32 %18, i32* %3
br label %5
19: ; preds = %5
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @reduzOR(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = bitcast i32* %3 to <4 x i32>*
%5 = load <4 x i32>, <4 x i32>* %4
%6 = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %5)
%7 = or i32 %6, %2
ret i32 %7
}
/* Type definitions */
typedef char *uint64_t;

/* Variables and functions */
uint64_t rcr3(void) {
  uint64_t val;
  __asm volatile("movq %%cr3,%0" : "=r"(val));
  return val;
}


x86 assembly (clang, -O0):
<rcr3>:
push   %rbp
mov    %rsp,%rbp
mov    %cr3,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcr3>:
mov    %cr3,%rax
ret

LLVM IR (-O0):
define i8* @rcr3() {
%1 = alloca i8*
%2 = call i8* asm sideeffect "movq %cr3,$0", "=r,~{dirflag},~{fpsr},~{flags}"()
store i8* %2, i8** %1
%3 = load i8*, i8** %1
ret i8* %3
}

LLVM IR (-O2):
define i8* @rcr3() {
%1 = tail call i8* asm sideeffect "movq %cr3,$0", "=r,~{dirflag},~{fpsr},~{flags}"()
ret i8* %1
}
int *f(void) {
  int a = 5;
  return &a;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
movl   $0x5,-0x4(%rbp)
lea    -0x4(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    -0x4(%rsp),%rax
ret

LLVM IR (-O0):
define i32* @f() {
%1 = alloca i32
store i32 5, i32* %1
ret i32* %1
}

LLVM IR (-O2):
define noalias i32* @f() {
%1 = alloca i32
ret i32* %1
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char);
void ft_putstr(char *str) {
  int i;
  str = &str[0];
  i = 0;
  while (str[i] != '\0') {
    ft_putchar(str[i]);
    i++;
  }
}


x86 assembly (clang, -O0):
<ft_putstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     115f <ft_putstr+0x4f>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <ft_putchar@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112b <ft_putstr+0x1b>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putstr>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <ft_putstr+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <ft_putchar@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <ft_putstr+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @ft_putstr(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
store i8* %5, i8** %2
store i32 0, i32* %3
br label %6
6: ; preds = %14, %1
%7 = load i8*, i8** %2
%8 = load i32, i32* %3
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %23
14: ; preds = %6
%15 = load i8*, i8** %2
%16 = load i32, i32* %3
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
%20 = call i32 @ft_putchar(i8 signext %19)
%21 = load i32, i32* %3
%22 = add nsw i32 %21, 1
store i32 %22, i32* %3
br label %6
23: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @ft_putstr(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8 [ %10, %4 ], [ %2, %1 ]
%7 = tail call i32 @ft_putchar(i8 signext %6)
%8 = add nuw i64 %5, 1
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
/* Variables and functions */
char *reallocf(int /*<<< orphan*/, int);
void reallocfPtrZero1() { char *r = reallocf(0, 12); }


x86 assembly (clang, -O0):
<reallocfPtrZero1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
mov    $0xc,%esi
call   1030 <reallocf@plt>
mov    %rax,-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reallocfPtrZero1>:
xor    %edi,%edi
mov    $0xc,%esi
jmp    1030 <reallocf@plt>

LLVM IR (-O0):
define void @reallocfPtrZero1() {
%1 = alloca i8*
%2 = call i8* @reallocf(i32 0, i32 12)
store i8* %2, i8** %1
ret void
}

LLVM IR (-O2):
define void @reallocfPtrZero1() {
%1 = tail call i8* @reallocf(i32 0, i32 12)
ret void
}
/* Type definitions */
struct cli_def {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cli_print(struct cli_def *, char *);
int cli_int_idle_timeout(struct cli_def *cli) {
  cli_print(cli, "Idle timeout");
  return -2;
}


x86 assembly (clang, -O0):
<cli_int_idle_timeout>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <cli_print@plt>
mov    $0xfffffffe,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cli_int_idle_timeout>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <cli_print@plt>
mov    $0xfffffffe,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.cli_def = type { i32 }
@.str = [13 x i8] c"Idle timeout\00"
define i32 @cli_int_idle_timeout(%struct.cli_def* %0) {
%2 = alloca %struct.cli_def*
store %struct.cli_def* %0, %struct.cli_def** %2
%3 = load %struct.cli_def*, %struct.cli_def** %2
%4 = call i32 @cli_print(%struct.cli_def* %3, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 -2
}

LLVM IR (-O2):
%struct.cli_def = type { i32 }
@.str = [13 x i8] c"Idle timeout\00"
define i32 @cli_int_idle_timeout(%struct.cli_def* %0) {
%2 = tail call i32 @cli_print(%struct.cli_def* %0, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 -2
}
int test_imm_F0uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0xF0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F0uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0xf0,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F0uint64_highword_mem>:
testb  $0xf0,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F0uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 240
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_F0uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 1030792151040
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ TOSH_CLR_GIO3_PIN();
void HUMIDITY_CLEAR_DATA() { TOSH_CLR_GIO3_PIN(); }


x86 assembly (clang, -O0):
<HUMIDITY_CLEAR_DATA>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <TOSH_CLR_GIO3_PIN@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HUMIDITY_CLEAR_DATA>:
xor    %eax,%eax
jmp    1030 <TOSH_CLR_GIO3_PIN@plt>

LLVM IR (-O0):
define void @HUMIDITY_CLEAR_DATA() {
%1 = call i32 (...) @TOSH_CLR_GIO3_PIN()
ret void
}

LLVM IR (-O2):
define void @HUMIDITY_CLEAR_DATA() {
%1 = tail call i32 (...) @TOSH_CLR_GIO3_PIN()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ntohl(size_t);
void proto_add_head(char *buf, size_t n) { *(uint32_t *)buf = ntohl(n); }


x86 assembly (clang, -O0):
<proto_add_head>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <ntohl@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<proto_add_head>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <ntohl@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @proto_add_head(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = call i32 @ntohl(i64 %5)
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32 %6, i32* %8
ret void
}

LLVM IR (-O2):
define void @proto_add_head(i8* nocapture writeonly %0, i64 %1) {
%3 = tail call i32 @ntohl(i64 %1)
%4 = bitcast i8* %0 to i32*
store i32 %3, i32* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int read_char_from_file(char *);
int /*<<< orphan*/ stderr;
int battery_status() {
  int b_stat = 0;
  const int ac_on = 67;
  b_stat = read_char_from_file("/sys/class/power_supply/BAT1/status");
  if (0) {
    fprintf(stderr, "BATTERY STATUS: %d\n", b_stat);
  }
  return (b_stat == ac_on);
}


x86 assembly (clang, -O0):
<battery_status>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x43,-0x8(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <read_char_from_file@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x43,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<battery_status>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <read_char_from_file@plt>
xor    %ecx,%ecx
cmp    $0x43,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [36 x i8] c"/sys/class/power_supply/BAT1/status\00"
@stderr = global i32 0
define i32 @battery_status() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 67, i32* %2
%3 = call i32 @read_char_from_file(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = icmp eq i32 %4, 67
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
@.str = [36 x i8] c"/sys/class/power_supply/BAT1/status\00"
@stderr = global i32 0
define i32 @battery_status() {
%1 = tail call i32 @read_char_from_file(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i32 %1, 67
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ sock_sendline(char *, char *, char *);
void ircproto_oper(char *oper_username, char *password) {
  sock_sendline("OPER %s %s", oper_username, password);
}


x86 assembly (clang, -O0):
<ircproto_oper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rdi
call   1030 <sock_sendline@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ircproto_oper>:
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee3(%rip),%rdi
jmp    1030 <sock_sendline@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"OPER %s %s\00"
define void @ircproto_oper(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @sock_sendline(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %5, i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"OPER %s %s\00"
define void @ircproto_oper(i8* %0, i8* %1) {
%3 = tail call i32 @sock_sendline(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
ret void
}
int main() {
  int n = 5;
  int x[3 * n];
  int i;
  for (i = 0; i < 15; i++) {
    x[i] = i;
  }
  int sum = 0;
  for (i = 0; i < 15; i++) {
    sum += x[i];
  }
  return sum;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    %ecx,%eax
lea    (%rax,%rax,2),%eax
mov    %rsp,%rcx
mov    %rcx,-0x10(%rbp)
lea    0xf(,%rax,4),%rdx
and    $0xfffffffffffffff0,%rdx
mov    %rsp,%rcx
sub    %rdx,%rcx
mov    %rcx,-0x28(%rbp)
mov    %rcx,%rsp
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
cmpl   $0xf,-0x1c(%rbp)
jge    116f <main+0x6f>
mov    -0x28(%rbp),%rax
mov    -0x1c(%rbp),%edx
movslq -0x1c(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1149 <main+0x49>
movl   $0x0,-0x20(%rbp)
movl   $0x0,-0x1c(%rbp)
cmpl   $0xf,-0x1c(%rbp)
jge    11a6 <main+0xa6>
mov    -0x28(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
add    -0x20(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    117d <main+0x7d>
mov    -0x20(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
mov    -0x4(%rbp),%eax
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x69,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i32
%6 = alloca i32
store i32 0, i32* %1
store i32 5, i32* %2
%7 = load i32, i32* %2
%8 = mul nsw i32 3, %7
%9 = zext i32 %8 to i64
%10 = call i8* @llvm.stacksave()
store i8* %10, i8** %3
%11 = alloca i32, i64 %9
store i64 %9, i64* %4
store i32 0, i32* %5
br label %12
12: ; preds = %20, %0
%13 = load i32, i32* %5
%14 = icmp slt i32 %13, 15
br i1 %14, label %15, label %23
15: ; preds = %12
%16 = load i32, i32* %5
%17 = load i32, i32* %5
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i32, i32* %11, i64 %18
store i32 %16, i32* %19
br label %20
20: ; preds = %15
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
store i32 %22, i32* %5
br label %12
23: ; preds = %12
store i32 0, i32* %6
store i32 0, i32* %5
br label %24
24: ; preds = %34, %23
%25 = load i32, i32* %5
%26 = icmp slt i32 %25, 15
br i1 %26, label %27, label %37
27: ; preds = %24
%28 = load i32, i32* %5
%29 = sext i32 %28 to i64
%30 = getelementptr inbounds i32, i32* %11, i64 %29
%31 = load i32, i32* %30
%32 = load i32, i32* %6
%33 = add nsw i32 %32, %31
store i32 %33, i32* %6
br label %34
34: ; preds = %27
%35 = load i32, i32* %5
%36 = add nsw i32 %35, 1
store i32 %36, i32* %5
br label %24
37: ; preds = %24
%38 = load i32, i32* %6
store i32 %38, i32* %1
%39 = load i8*, i8** %3
%40 = load i32, i32* %1
ret i32 %40
}

LLVM IR (-O2):
define i32 @main() {
ret i32 105
}
/* Variables and functions */
bool UT16_MUL_OVFCHK(unsigned short a, unsigned short b) {
  return (a > 0 && b > 0 && a > 0xFFFFU / b);
}


x86 assembly (clang, -O0):
<UT16_MUL_OVFCHK>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movzwl -0x2(%rbp),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x5(%rbp)
jle    1157 <UT16_MUL_OVFCHK+0x57>
movzwl -0x4(%rbp),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x5(%rbp)
jle    1157 <UT16_MUL_OVFCHK+0x57>
movzwl -0x2(%rbp),%eax
mov    %eax,-0xc(%rbp)
movzwl -0x4(%rbp),%ecx
mov    $0xffff,%eax
xor    %edx,%edx
div    %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
cmp    %ecx,%eax
seta   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<UT16_MUL_OVFCHK>:
mov    %esi,%eax
xor    %ecx,%ecx
mul    %di
seto   %cl
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @UT16_MUL_OVFCHK(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %19
8: ; preds = %2
%9 = load i16, i16* %4
%10 = zext i16 %9 to i32
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %19
12: ; preds = %8
%13 = load i16, i16* %3
%14 = zext i16 %13 to i32
%15 = load i16, i16* %4
%16 = zext i16 %15 to i32
%17 = udiv i32 65535, %16
%18 = icmp ugt i32 %14, %17
br label %19
19: ; preds = %12, %8, %2
%20 = phi i1 [ false, %8 ], [ false, %2 ], [ %18, %12 ]
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
define i32 @UT16_MUL_OVFCHK(i16 zeroext %0, i16 zeroext %1) {
%3 = tail call { i16, i1 } @llvm.umul.with.overflow.i16(i16 %1, i16 %0)
%4 = extractvalue { i16, i1 } %3, 1
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
char *strdup(char *);
char *strtok(char *, char *);
char *get_prop(char *buff) {
  char *buff2 = strdup(buff);
  char *prop = strtok(buff2, "=");
  return prop;
}


x86 assembly (clang, -O0):
<get_prop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strdup@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xebc(%rip),%rsi
call   1030 <strtok@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_prop>:
push   %rax
call   1040 <strdup@plt>
lea    0xed3(%rip),%rsi
mov    %rax,%rdi
pop    %rax
jmp    1030 <strtok@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"=\00"
define i8* @get_prop(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i8* @strdup(i8* %5)
store i8* %6, i8** %3
%7 = load i8*, i8** %3
%8 = call i8* @strtok(i8* %7, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i8* %8, i8** %4
%9 = load i8*, i8** %4
ret i8* %9
}

LLVM IR (-O2):
@.str = [2 x i8] c"=\00"
define i8* @get_prop(i8* nocapture %0) {
%2 = tail call i8* @strdup(i8* %0)
%3 = tail call i8* @strtok(i8* %2, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ seteuid(int);
int /*<<< orphan*/ strcpy(char *, unsigned char *);
void lowered_priviledge_function(unsigned char *ptr) {
  char buffer[50];
  seteuid(5);
  strcpy(buffer, ptr);
}


x86 assembly (clang, -O0):
<lowered_priviledge_function>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x5,%edi
call   1040 <seteuid@plt>
lea    -0x40(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lowered_priviledge_function>:
push   %rbx
sub    $0x40,%rsp
mov    %rdi,%rbx
mov    $0x5,%edi
call   1040 <seteuid@plt>
mov    %rsp,%rdi
mov    %rbx,%rsi
call   1030 <strcpy@plt>
add    $0x40,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @lowered_priviledge_function(i8* %0) {
%2 = alloca i8*
%3 = alloca [50 x i8]
store i8* %0, i8** %2
%4 = call i32 @seteuid(i32 5)
%5 = getelementptr inbounds [50 x i8], [50 x i8]* %3, i64 0, i64 0
%6 = load i8*, i8** %2
%7 = call i32 @strcpy(i8* %5, i8* %6)
ret void
}

LLVM IR (-O2):
define void @lowered_priviledge_function(i8* %0) {
%2 = alloca [50 x i8]
%3 = getelementptr inbounds [50 x i8], [50 x i8]* %2, i64 0, i64 0
%4 = tail call i32 @seteuid(i32 5)
%5 = call i32 @strcpy(i8* %3, i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ box_boolean(int);
int /*<<< orphan*/ dpop();
double untag_float_fast(int /*<<< orphan*/);
void primitive_float_less(void) {
  double y = untag_float_fast(dpop());
  double x = untag_float_fast(dpop());
  ;
  box_boolean(x < y);
}


x86 assembly (clang, -O0):
<primitive_float_less>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <dpop@plt>
mov    %eax,%edi
call   1050 <untag_float_fast@plt>
movsd  %xmm0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <dpop@plt>
mov    %eax,%edi
call   1050 <untag_float_fast@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <box_boolean@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<primitive_float_less>:
push   %rax
xor    %eax,%eax
call   1030 <dpop@plt>
mov    %eax,%edi
call   1050 <untag_float_fast@plt>
movsd  %xmm0,(%rsp)
xor    %eax,%eax
call   1030 <dpop@plt>
mov    %eax,%edi
call   1050 <untag_float_fast@plt>
xor    %edi,%edi
movsd  (%rsp),%xmm1
ucomisd %xmm0,%xmm1
seta   %dil
pop    %rax
jmp    1040 <box_boolean@plt>

LLVM IR (-O0):
define void @primitive_float_less() {
%1 = alloca double
%2 = alloca double
%3 = call i32 (...) @dpop()
%4 = call double @untag_float_fast(i32 %3)
store double %4, double* %1
%5 = call i32 (...) @dpop()
%6 = call double @untag_float_fast(i32 %5)
store double %6, double* %2
%7 = load double, double* %2
%8 = load double, double* %1
%9 = fcmp olt double %7, %8
%10 = zext i1 %9 to i32
%11 = call i32 @box_boolean(i32 %10)
ret void
}

LLVM IR (-O2):
define void @primitive_float_less() {
%1 = tail call i32 (...) @dpop()
%2 = tail call double @untag_float_fast(i32 %1)
%3 = tail call i32 (...) @dpop()
%4 = tail call double @untag_float_fast(i32 %3)
%5 = fcmp olt double %4, %2
%6 = zext i1 %5 to i32
%7 = tail call i32 @box_boolean(i32 %6)
ret void
}
/* Variables and functions */
int ENOSYS;
int url_mkdirfcn(const char *path, const int perm) { return -ENOSYS; }


x86 assembly (clang, -O0):
<url_mkdirfcn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
mov    0x2ed4(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<url_mkdirfcn>:
mov    0x2ee1(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @url_mkdirfcn(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @ENOSYS
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @url_mkdirfcn(i8* nocapture readnone %0, i32 %1) {
%3 = load i32, i32* @ENOSYS
%4 = sub nsw i32 0, %3
ret i32 %4
}
void functiondef2(void) {}


x86 assembly (clang, -O0):
<functiondef2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<functiondef2>:
ret

LLVM IR (-O0):
define void @functiondef2() {
ret void
}

LLVM IR (-O2):
define void @functiondef2() {
ret void
}