xunge/DecIR huggingface dataset:
int isfinitel(x)
long double x;
{
  union {
    long double d;
    unsigned short s[6];
    unsigned int i[3];
  } u;
  u.d = x;
  if (sizeof(int) == 4) {
    if ((u.s[4] & 0x7fff) != 0x7fff)
      return 1;
    return (0);
  } else {
    if ((u.s[4] & 0x7fff) != 0x7fff)
      return 1;
    return (0);
  }
}


x86 assembly (clang, -O0):
<isfinitel>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x20(%rbp)
fstpt  -0x30(%rbp)
movzwl -0x28(%rbp),%eax
and    $0x7fff,%eax
cmp    $0x7fff,%eax
je     1130 <isfinitel+0x30>
movl   $0x1,-0x4(%rbp)
jmp    1137 <isfinitel+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isfinitel>:
mov    0x10(%rsp),%ecx
not    %ecx
xor    %eax,%eax
test   $0x7fff,%ecx
setne  %al
ret

LLVM IR (-O0):
%union.anon = type { x86_fp80 }
define i32 @isfinitel(x86_fp80 %0) {
%2 = alloca i32
%3 = alloca x86_fp80
%4 = alloca %union.anon
store x86_fp80 %0, x86_fp80* %3
%5 = load x86_fp80, x86_fp80* %3
%6 = bitcast %union.anon* %4 to x86_fp80*
store x86_fp80 %5, x86_fp80* %6
%7 = bitcast %union.anon* %4 to [6 x i16]*
%8 = getelementptr inbounds [6 x i16], [6 x i16]* %7, i64 0, i64 4
%9 = load i16, i16* %8
%10 = zext i16 %9 to i32
%11 = and i32 %10, 32767
%12 = icmp ne i32 %11, 32767
br i1 %12, label %13, label %14
13: ; preds = %1
store i32 1, i32* %2
br label %15
14: ; preds = %1
store i32 0, i32* %2
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @isfinitel(x86_fp80 %0) {
%2 = bitcast x86_fp80 %0 to i80
%3 = and i80 %2, 604444463063240877801472
%4 = icmp ne i80 %3, 604444463063240877801472
%5 = zext i1 %4 to i32
ret i32 %5
}
void RTBldCfgVersionMajor(void) {}


x86 assembly (clang, -O0):
<RTBldCfgVersionMajor>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTBldCfgVersionMajor>:
ret

LLVM IR (-O0):
define void @RTBldCfgVersionMajor() {
ret void
}

LLVM IR (-O2):
define void @RTBldCfgVersionMajor() {
ret void
}
int my_str_comp(const char *big, const char *little) {
  int i;
  i = 0;
  while (little[i]) {
    if (big[i] != little[i])
      return (0);
    i++;
  }
  return (1);
}


x86 assembly (clang, -O0):
<my_str_comp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     115f <my_str_comp+0x5f>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
mov    -0x18(%rbp),%rcx
movslq -0x1c(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
cmp    %ecx,%eax
je     1151 <my_str_comp+0x51>
movl   $0x0,-0x4(%rbp)
jmp    1166 <my_str_comp+0x66>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1113 <my_str_comp+0x13>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_str_comp>:
mov    (%rsi),%cl
mov    $0x1,%eax
test   %cl,%cl
je     1122 <my_str_comp+0x22>
xor    %edx,%edx
nopl   (%rax)
cmp    %cl,(%rdi,%rdx,1)
jne    1123 <my_str_comp+0x23>
movzbl 0x1(%rsi,%rdx,1),%ecx
add    $0x1,%rdx
test   %cl,%cl
jne    1110 <my_str_comp+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @my_str_comp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 0, i32* %6
br label %7
7: ; preds = %29, %2
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = icmp ne i8 %12, 0
br i1 %13, label %14, label %32
14: ; preds = %7
%15 = load i8*, i8** %4
%16 = load i32, i32* %6
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
%20 = sext i8 %19 to i32
%21 = load i8*, i8** %5
%22 = load i32, i32* %6
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
%25 = load i8, i8* %24
%26 = sext i8 %25 to i32
%27 = icmp ne i32 %20, %26
br i1 %27, label %28, label %29
28: ; preds = %14
store i32 0, i32* %3
br label %33
29: ; preds = %14
%30 = load i32, i32* %6
%31 = add nsw i32 %30, 1
store i32 %31, i32* %6
br label %7
32: ; preds = %7
store i32 1, i32* %3
br label %33
33: ; preds = %32, %28
%34 = load i32, i32* %3
ret i32 %34
}

LLVM IR (-O2):
define i32 @my_str_comp(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %16, label %9
5: ; preds = %9
%6 = getelementptr inbounds i8, i8* %1, i64 %15
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
br i1 %8, label %16, label %9
9: ; preds = %2, %5
%10 = phi i64 [ %15, %5 ], [ 0, %2 ]
%11 = phi i8 [ %7, %5 ], [ %3, %2 ]
%12 = getelementptr inbounds i8, i8* %0, i64 %10
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, %11
%15 = add nuw i64 %10, 1
br i1 %14, label %5, label %16
16: ; preds = %9, %5, %2
%17 = phi i32 [ 1, %2 ], [ 1, %5 ], [ 0, %9 ]
ret i32 %17
}
/* Variables and functions */
double foo(double);
int main(int argc, char **argv) {
  double d;
  d = foo(1.0) + 1.0;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movsd  0xed2(%rip),%xmm0
call   1030 <foo@plt>
movsd  0xec5(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movsd  0xee7(%rip),%xmm0
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca double
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call double @foo(double 1.000000e+00)
%8 = fadd double %7, 1.000000e+00
store double %8, double* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call double @foo(double 1.000000e+00)
ret i32 0
}
void _swift_getEnumCaseSinglePayload(void) {}


x86 assembly (clang, -O0):
<_swift_getEnumCaseSinglePayload>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_swift_getEnumCaseSinglePayload>:
ret

LLVM IR (-O0):
define void @_swift_getEnumCaseSinglePayload() {
ret void
}

LLVM IR (-O2):
define void @_swift_getEnumCaseSinglePayload() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
extern void shmem_short_get(short *dest, const short *src, size_t len, int pe) {
  printf("\nOpenSHMEM Analyzer\n");
}


x86 assembly (clang, -O0):
<shmem_short_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
lea    0xed2(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmem_short_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"\0AOpenSHMEM Analyzer\0A\00"
define void @shmem_short_get(i16* %0, i16* %1, i64 %2, i32 %3) {
%5 = alloca i16*
%6 = alloca i16*
%7 = alloca i64
%8 = alloca i32
store i16* %0, i16** %5
store i16* %1, i16** %6
store i64 %2, i64* %7
store i32 %3, i32* %8
%9 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [20 x i8] c"\0AOpenSHMEM Analyzer\00"
define void @shmem_short_get(i16* nocapture readnone %0, i16* nocapture readnone %1, i64 %2, i32 %3) {
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ vrna_message_constraint_options_all();
void print_tty_constraint_full(void) { vrna_message_constraint_options_all(); }


x86 assembly (clang, -O0):
<print_tty_constraint_full>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <vrna_message_constraint_options_all@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_tty_constraint_full>:
xor    %eax,%eax
jmp    1030 <vrna_message_constraint_options_all@plt>

LLVM IR (-O0):
define void @print_tty_constraint_full() {
%1 = call i32 (...) @vrna_message_constraint_options_all()
ret void
}

LLVM IR (-O2):
define void @print_tty_constraint_full() {
%1 = tail call i32 (...) @vrna_message_constraint_options_all()
ret void
}
void math_sin(void) {
  double d = lua_check_number(1, "sin");
  lua_pushnumber(sin(((d)*3.14159265358979323846 / 180.0)));
}


x86 assembly (clang, -O0):
<math_sin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
lea    0xecc(%rip),%rsi
mov    $0x0,%al
call   1030 <lua_check_number@plt>
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  0xeac(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xe97(%rip),%xmm1
divsd  %xmm1,%xmm0
call   1040 <sin@plt>
mov    $0x1,%al
call   1050 <lua_pushnumber@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<math_sin>:
push   %rax
lea    0xed8(%rip),%rsi
mov    $0x1,%edi
xor    %eax,%eax
call   1030 <lua_check_number@plt>
cvtsi2sd %eax,%xmm0
mulsd  0xeb0(%rip),%xmm0
divsd  0xeb0(%rip),%xmm0
call   1040 <sin@plt>
mov    $0x1,%al
pop    %rcx
jmp    1050 <lua_pushnumber@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"sin\00"
define void @math_sin() {
%1 = alloca double
%2 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @lua_check_number to i32 (i32, i8*, ...)*)(i32 1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = sitofp i32 %2 to double
store double %3, double* %1
%4 = load double, double* %1
%5 = fmul double %4, 0x400921FB54442D18
%6 = fdiv double %5, 1.800000e+02
%7 = call double @sin(double %6)
%8 = call i32 (double, ...) bitcast (i32 (...)* @lua_pushnumber to i32 (double, ...)*)(double %7)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"sin\00"
define void @math_sin() {
%1 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @lua_check_number to i32 (i32, i8*, ...)*)(i32 1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%2 = sitofp i32 %1 to double
%3 = fmul double %2, 0x400921FB54442D18
%4 = fdiv double %3, 1.800000e+02
%5 = tail call double @sin(double %4)
%6 = tail call i32 (double, ...) bitcast (i32 (...)* @lua_pushnumber to i32 (double, ...)*)(double %5)
ret void
}
/* Variables and functions */
int nethack_main(int, char **);
int /*<<< orphan*/ setup_unix_environment(char *);
int nacl_main(int argc, char *argv[]) {
  setup_unix_environment(argv[0]);
  return nethack_main(argc, argv);
}


x86 assembly (clang, -O0):
<nacl_main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1040 <setup_unix_environment@plt>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <nethack_main@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nacl_main>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    (%rsi),%rdi
call   1040 <setup_unix_environment@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <nethack_main@plt>

LLVM IR (-O0):
define i32 @nacl_main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i8**, i8*** %4
%6 = getelementptr inbounds i8*, i8** %5, i64 0
%7 = load i8*, i8** %6
%8 = call i32 @setup_unix_environment(i8* %7)
%9 = load i32, i32* %3
%10 = load i8**, i8*** %4
%11 = call i32 @nethack_main(i32 %9, i8** %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @nacl_main(i32 %0, i8** %1) {
%3 = load i8*, i8** %1
%4 = tail call i32 @setup_unix_environment(i8* %3)
%5 = tail call i32 @nethack_main(i32 %0, i8** %1)
ret i32 %5
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;
typedef int int8_t;

/* Variables and functions */
void GPIO_clear_event(uint8_t pin) {
  ;
  int8_t clr1 = pin - 32;
  if (clr1 < 0)
    (*((volatile uint32_t *)(0x00200040))) = (1 << pin);
  else
    (*((volatile uint32_t *)(0x00200044))) = (1 << clr1);
}


x86 assembly (clang, -O0):
<GPIO_clear_event>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x20,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1132 <GPIO_clear_event+0x32>
mov    -0x4(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0x200040,%eax
mov    %ecx,(%rax)
jmp    1145 <GPIO_clear_event+0x45>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0x200044,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIO_clear_event>:
mov    %edi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
cmp    $0x1f,%edi
jg     1116 <GPIO_clear_event+0x16>
mov    %eax,0x200040
ret
mov    %eax,0x200044
ret

LLVM IR (-O0):
define void @GPIO_clear_event(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 %4, 32
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32, i32* %2
%10 = shl i32 1, %9
store volatile i32 %10, i32* inttoptr (i64 2097216 to i32*)
br label %14
11: ; preds = %1
%12 = load i32, i32* %3
%13 = shl i32 1, %12
store volatile i32 %13, i32* inttoptr (i64 2097220 to i32*)
br label %14
14: ; preds = %11, %8
ret void
}

LLVM IR (-O2):
define void @GPIO_clear_event(i32 %0) {
%2 = icmp slt i32 %0, 32
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = shl nuw i32 1, %0
store volatile i32 %4, i32* inttoptr (i64 2097216 to i32*)
br label %8
5: ; preds = %1
%6 = add nsw i32 %0, -32
%7 = shl nuw i32 1, %6
store volatile i32 %7, i32* inttoptr (i64 2097220 to i32*)
br label %8
8: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ luaL_check_lstr(int, int /*<<< orphan*/ *);
int /*<<< orphan*/ lua_pushobject(int /*<<< orphan*/);
int /*<<< orphan*/ lua_rawgetglobal(int /*<<< orphan*/);
void luaB_rawgetglobal(void) {
  lua_pushobject(lua_rawgetglobal((luaL_check_lstr((1), NULL))));
}


x86 assembly (clang, -O0):
<luaB_rawgetglobal>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1040 <luaL_check_lstr@plt>
mov    %eax,%edi
call   1030 <lua_rawgetglobal@plt>
mov    %eax,%edi
call   1050 <lua_pushobject@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<luaB_rawgetglobal>:
push   %rax
mov    $0x1,%edi
xor    %esi,%esi
call   1040 <luaL_check_lstr@plt>
mov    %eax,%edi
call   1030 <lua_rawgetglobal@plt>
mov    %eax,%edi
pop    %rax
jmp    1050 <lua_pushobject@plt>

LLVM IR (-O0):
define void @luaB_rawgetglobal() {
%1 = call i32 @luaL_check_lstr(i32 1, i32* null)
%2 = call i32 @lua_rawgetglobal(i32 %1)
%3 = call i32 @lua_pushobject(i32 %2)
ret void
}

LLVM IR (-O2):
define void @luaB_rawgetglobal() {
%1 = tail call i32 @luaL_check_lstr(i32 1, i32* null)
%2 = tail call i32 @lua_rawgetglobal(i32 %1)
%3 = tail call i32 @lua_pushobject(i32 %2)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t prev_block_index(uint8_t block_index) {
  if (block_index == 0) {
    block_index = 50;
  }
  block_index--;
  return (block_index);
}


x86 assembly (clang, -O0):
<prev_block_index>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1118 <prev_block_index+0x18>
movl   $0x32,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<prev_block_index>:
sub    $0x1,%edi
mov    $0x31,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @prev_block_index(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
store i32 50, i32* %2
br label %6
6: ; preds = %5, %1
%7 = load i32, i32* %2
%8 = add nsw i32 %7, -1
store i32 %8, i32* %2
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @prev_block_index(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = add nsw i32 %0, -1
%4 = select i1 %2, i32 49, i32 %3
ret i32 %4
}
unsigned kol_time_tick() { asm volatile("int $0x40" ::"a"(26), "b"(9)); }


x86 assembly (clang, -O0):
<kol_time_tick>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    $0x1a,%eax
mov    $0x9,%ebx
int    $0x40
mov    -0xc(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<kol_time_tick>:
push   %rbx
mov    $0x1a,%eax
mov    $0x9,%ebx
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define i32 @kol_time_tick() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @kol_time_tick() {
tail call void asm sideeffect "int $$0x40", "{ax},{bx},~{dirflag},~{fpsr},~{flags}"(i32 26, i32 9)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ link_failure_trunc();
scalar_t__ trunc(double);
void test_trunc(double d) {
  if (trunc(d) != trunc(d))
    link_failure_trunc();
}


x86 assembly (clang, -O0):
<test_trunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <trunc@plt>
mov    %rax,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <trunc@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
je     115c <test_trunc+0x3c>
mov    $0x0,%al
call   1030 <link_failure_trunc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_trunc>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm0,0x8(%rsp)
call   1040 <trunc@plt>
mov    %rax,%rbx
movsd  0x8(%rsp),%xmm0
call   1040 <trunc@plt>
cmp    %rax,%rbx
jne    1149 <test_trunc+0x29>
add    $0x10,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1030 <link_failure_trunc@plt>

LLVM IR (-O0):
define void @test_trunc(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i64 @trunc(double %3)
%5 = load double, double* %2
%6 = call i64 @trunc(double %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_trunc()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_trunc(double %0) {
%2 = tail call i64 @trunc(double %0)
%3 = tail call i64 @trunc(double %0)
%4 = icmp eq i64 %2, %3
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @link_failure_trunc()
br label %7
7: ; preds = %5, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
void *calloc(int, size_t);
void *allocz_(size_t sz) {
  void *allocated_memory = calloc(1, sz);
  assert(allocated_memory != NULL);
  return allocated_memory;
}


x86 assembly (clang, -O0):
<allocz_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x1,%edi
call   1030 <calloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<allocz_>:
push   %rbx
mov    %rdi,%rsi
mov    $0x1,%edi
call   1030 <calloc@plt>
mov    %rax,%rbx
xor    %edi,%edi
test   %rax,%rax
setne  %dil
call   1040 <assert@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @allocz_(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @calloc(i32 1, i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
%10 = load i8*, i8** %3
ret i8* %10
}

LLVM IR (-O2):
define i8* @allocz_(i64 %0) {
%2 = tail call i8* @calloc(i32 1, i64 %0)
%3 = icmp ne i8* %2, null
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0x75() {
  Assert_real((isodigit(117) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              590, ("isodigit should be 0 for u"));
}


x86 assembly (clang, -O0):
<t_isodigit_0x75>:
push   %rbp
mov    %rsp,%rbp
mov    $0x75,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x24e,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0x75>:
push   %rax
mov    $0x75,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x24e,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 0 for u\00"
define void @t_isodigit_0x75() {
%1 = call i64 @isodigit(i32 117)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 590, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 0 for u\00"
define void @t_isodigit_0x75() {
%1 = tail call i64 @isodigit(i32 117)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 590, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIGALRM;
int /*<<< orphan*/ signal(int /*<<< orphan*/, void (*)(int));
void sighandler(int x) { signal(SIGALRM, sighandler); }


x86 assembly (clang, -O0):
<sighandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
mov    0x2eb5(%rip),%rsi
call   1030 <signal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sighandler>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
mov    0x2ec0(%rip),%rsi
jmp    1030 <signal@plt>

LLVM IR (-O0):
@SIGALRM = global i32 0
define void @sighandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @SIGALRM
%4 = call i32 @signal(i32 %3, void (i32)* @sighandler)
ret void
}

LLVM IR (-O2):
@SIGALRM = global i32 0
define void @sighandler(i32 %0) {
%2 = load i32, i32* @SIGALRM
%3 = tail call i32 @signal(i32 %2, void (i32)* @sighandler)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ fenv_t;

/* Variables and functions */
int /*<<< orphan*/ feupdateenv(int /*<<< orphan*/ *);
void nullPointer_feupdateenv(void) {
  fenv_t *envp = 0;
  (void)feupdateenv(envp);
  (void)feupdateenv(0);
}


x86 assembly (clang, -O0):
<nullPointer_feupdateenv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <feupdateenv@plt>
xor    %eax,%eax
mov    %eax,%edi
call   1030 <feupdateenv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nullPointer_feupdateenv>:
push   %rax
xor    %edi,%edi
call   1030 <feupdateenv@plt>
xor    %edi,%edi
pop    %rax
jmp    1030 <feupdateenv@plt>

LLVM IR (-O0):
define void @nullPointer_feupdateenv() {
%1 = alloca i32*
store i32* null, i32** %1
%2 = load i32*, i32** %1
%3 = call i32 @feupdateenv(i32* %2)
%4 = call i32 @feupdateenv(i32* null)
ret void
}

LLVM IR (-O2):
define void @nullPointer_feupdateenv() {
%1 = tail call i32 @feupdateenv(i32* null)
%2 = tail call i32 @feupdateenv(i32* null)
ret void
}
/* Variables and functions */
int GetStringLength(char *);
int StringsAreEqual2(char *, int, char *, int);
int StringsAreEqual(char *first, char *second) {
  int length = GetStringLength(first);
  int length2 = GetStringLength(second);
  int output = StringsAreEqual2(first, length, second, length2);
  return output;
}


x86 assembly (clang, -O0):
<StringsAreEqual>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <GetStringLength@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <GetStringLength@plt>
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%ecx
call   1040 <StringsAreEqual2@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<StringsAreEqual>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <GetStringLength@plt>
mov    %eax,%ebp
mov    %r14,%rdi
call   1030 <GetStringLength@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r14,%rdx
mov    %eax,%ecx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <StringsAreEqual2@plt>

LLVM IR (-O0):
define i32 @StringsAreEqual(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%8 = load i8*, i8** %3
%9 = call i32 @GetStringLength(i8* %8)
store i32 %9, i32* %5
%10 = load i8*, i8** %4
%11 = call i32 @GetStringLength(i8* %10)
store i32 %11, i32* %6
%12 = load i8*, i8** %3
%13 = load i32, i32* %5
%14 = load i8*, i8** %4
%15 = load i32, i32* %6
%16 = call i32 @StringsAreEqual2(i8* %12, i32 %13, i8* %14, i32 %15)
store i32 %16, i32* %7
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
define i32 @StringsAreEqual(i8* %0, i8* %1) {
%3 = tail call i32 @GetStringLength(i8* %0)
%4 = tail call i32 @GetStringLength(i8* %1)
%5 = tail call i32 @StringsAreEqual2(i8* %0, i32 %3, i8* %1, i32 %4)
ret i32 %5
}
/* Type definitions */
struct utsname {
  char *nodename;
};

/* Variables and functions */
int /*<<< orphan*/ strncpy(char *, char *, int);
int /*<<< orphan*/ uname(struct utsname *);
char *uname_get_host_name(char *hostname, char *domain) {
  struct utsname buf;
  uname(&buf);
  strncpy(hostname, buf.nodename, 64);
  strncpy(domain, "Unknown", 64);
  return hostname;
}


x86 assembly (clang, -O0):
<uname_get_host_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x18(%rbp),%rdi
call   1040 <uname@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    $0x40,%edx
call   1030 <strncpy@plt>
mov    -0x10(%rbp),%rdi
lea    0xeaa(%rip),%rsi
mov    $0x40,%edx
call   1030 <strncpy@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uname_get_host_name>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    %rsp,%rdi
call   1040 <uname@plt>
mov    (%rsp),%rsi
mov    %rbx,%rdi
mov    $0x40,%edx
call   1030 <strncpy@plt>
lea    0xeb6(%rip),%rsi
mov    %r14,%rdi
mov    $0x40,%edx
call   1030 <strncpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.utsname = type { i8* }
@.str = [8 x i8] c"Unknown\00"
define i8* @uname_get_host_name(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca %struct.utsname
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = call i32 @uname(%struct.utsname* %5)
%7 = load i8*, i8** %3
%8 = getelementptr inbounds %struct.utsname, %struct.utsname* %5, i32 0, i32 0
%9 = load i8*, i8** %8
%10 = call i32 @strncpy(i8* %7, i8* %9, i32 64)
%11 = load i8*, i8** %4
%12 = call i32 @strncpy(i8* %11, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 64)
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
%struct.utsname = type { i8* }
@.str = [8 x i8] c"Unknown\00"
define i8* @uname_get_host_name(i8* returned %0, i8* %1) {
%3 = alloca %struct.utsname
%4 = bitcast %struct.utsname* %3 to i8*
%5 = call i32 @uname(%struct.utsname* %3)
%6 = getelementptr inbounds %struct.utsname, %struct.utsname* %3, i64 0, i32 0
%7 = load i8*, i8** %6
%8 = tail call i32 @strncpy(i8* %0, i8* %7, i32 64)
%9 = tail call i32 @strncpy(i8* %1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 64)
ret i8* %0
}
/* Type definitions */
struct rb3_head {
  int dummy;
};

/* Variables and functions */
scalar_t__ rb3_get_color_bit(struct rb3_head *, int);
int rb3_is_red(struct rb3_head *head, int dir) {
  return rb3_get_color_bit(head, dir) != 0;
}


x86 assembly (clang, -O0):
<rb3_is_red>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <rb3_get_color_bit@plt>
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rb3_is_red>:
push   %rax
call   1030 <rb3_get_color_bit@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.rb3_head = type { i32 }
define i32 @rb3_is_red(%struct.rb3_head* %0, i32 %1) {
%3 = alloca %struct.rb3_head*
%4 = alloca i32
store %struct.rb3_head* %0, %struct.rb3_head** %3
store i32 %1, i32* %4
%5 = load %struct.rb3_head*, %struct.rb3_head** %3
%6 = load i32, i32* %4
%7 = call i64 @rb3_get_color_bit(%struct.rb3_head* %5, i32 %6)
%8 = icmp ne i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
%struct.rb3_head = type { i32 }
define i32 @rb3_is_red(%struct.rb3_head* %0, i32 %1) {
%3 = tail call i64 @rb3_get_color_bit(%struct.rb3_head* %0, i32 %1)
%4 = icmp ne i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
int test_imm_6Cint64_midword_reg(long long val) {
  return ((val >> 16) & (0x6C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Cint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0x6c,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Cint64_midword_reg>:
test   $0x6c0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Cint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 108
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_6Cint64_midword_reg(i64 %0) {
%2 = and i64 %0, 7077888
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct list *const);
int /*<<< orphan*/ list_purge(struct list *const);
void list_destroy(struct list *const l) {
  list_purge(l);
  free(l);
}


x86 assembly (clang, -O0):
<list_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <list_purge@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_destroy>:
push   %rbx
mov    %rdi,%rbx
call   1040 <list_purge@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.list = type { i32 }
define void @list_destroy(%struct.list* %0) {
%2 = alloca %struct.list*
store %struct.list* %0, %struct.list** %2
%3 = load %struct.list*, %struct.list** %2
%4 = call i32 @list_purge(%struct.list* %3)
%5 = load %struct.list*, %struct.list** %2
%6 = call i32 @free(%struct.list* %5)
ret void
}

LLVM IR (-O2):
%struct.list = type { i32 }
define void @list_destroy(%struct.list* %0) {
%2 = tail call i32 @list_purge(%struct.list* %0)
%3 = tail call i32 @free(%struct.list* %0)
ret void
}
void UARTCharPut(unsigned int baseAdd, unsigned char byteTx) {
  unsigned int txEmpty;
  txEmpty = ((0x00000040u) | (0x00000020u));
  while (txEmpty !=
         ((*((volatile unsigned int *)(baseAdd + (0x14)))) & txEmpty))
    ;
  (*((volatile unsigned int *)(baseAdd + (0x0)))) = byteTx;
}


x86 assembly (clang, -O0):
<UARTCharPut>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
movl   $0x60,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x4(%rbp),%ecx
add    $0x14,%ecx
mov    %ecx,%ecx
mov    (%rcx),%ecx
and    -0xc(%rbp),%ecx
cmp    %ecx,%eax
je     1131 <UARTCharPut+0x31>
jmp    1114 <UARTCharPut+0x14>
movzbl -0x5(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x0,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTCharPut>:
lea    0x14(%rdi),%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    (%rax),%ecx
not    %ecx
test   $0x60,%cl
jne    1110 <UARTCharPut+0x10>
movzbl %sil,%eax
mov    %edi,%ecx
mov    %eax,(%rcx)
ret

LLVM IR (-O0):
define void @UARTCharPut(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i32
store i32 %0, i32* %3
store i8 %1, i8* %4
store i32 96, i32* %5
br label %6
6: ; preds = %16, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = add i32 %8, 20
%10 = zext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
%12 = load volatile i32, i32* %11
%13 = load i32, i32* %5
%14 = and i32 %12, %13
%15 = icmp ne i32 %7, %14
br i1 %15, label %16, label %17
16: ; preds = %6
br label %6
17: ; preds = %6
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = load i32, i32* %3
%21 = add i32 %20, 0
%22 = zext i32 %21 to i64
%23 = inttoptr i64 %22 to i32*
store volatile i32 %19, i32* %23
ret void
}

LLVM IR (-O2):
define void @UARTCharPut(i32 %0, i8 zeroext %1) {
%3 = add i32 %0, 20
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
br label %6
6: ; preds = %6, %2
%7 = load volatile i32, i32* %5
%8 = and i32 %7, 96
%9 = icmp eq i32 %8, 96
br i1 %9, label %10, label %6
10: ; preds = %6
%11 = zext i8 %1 to i32
%12 = zext i32 %0 to i64
%13 = inttoptr i64 %12 to i32*
store volatile i32 %11, i32* %13
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
void get_len_icf_code(uint32_t length, uint32_t *code) {
  assert(length >= 3);
  assert(length <= 258);
  *code = length + 254;
}


x86 assembly (clang, -O0):
<get_len_icf_code>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x3,-0x4(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
cmpl   $0x102,-0x4(%rbp)
setle  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%ecx
add    $0xfe,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_len_icf_code>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
xor    %edi,%edi
cmp    $0x3,%ebp
setge  %dil
call   1030 <assert@plt>
xor    %edi,%edi
cmp    $0x103,%ebp
setl   %dil
call   1030 <assert@plt>
add    $0xfe,%ebp
mov    %ebp,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @get_len_icf_code(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = icmp sge i32 %5, 3
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i32, i32* %3
%10 = icmp sle i32 %9, 258
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 254
%15 = load i32*, i32** %4
store i32 %14, i32* %15
ret void
}

LLVM IR (-O2):
define void @get_len_icf_code(i32 %0, i32* nocapture writeonly %1) {
%3 = icmp sgt i32 %0, 2
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = icmp slt i32 %0, 259
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
%9 = add nsw i32 %0, 254
store i32 %9, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ remove_me();
int main(void) {
  int a = -100;
  int b = 0;
  int c = 3;
  for (a = 0; a < 100; a++) {
    if (b > c)
      remove_me();
    b = b + 2;
    c = c + 3;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xffffff9c,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x3,-0x10(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x64,-0x8(%rbp)
jge    1178 <main+0x68>
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    1158 <main+0x48>
mov    $0x0,%al
call   1030 <remove_me@plt>
mov    -0xc(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x3,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    113b <main+0x2b>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    $0x3,%ebx
xor    %ebp,%ebp
jmp    112e <main+0x1e>
nopl   0x0(%rax)
add    $0x2,%ebp
add    $0x3,%ebx
cmp    $0xc8,%ebp
je     113b <main+0x2b>
cmp    %ebx,%ebp
jbe    1120 <main+0x10>
xor    %eax,%eax
call   1030 <remove_me@plt>
jmp    1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 -100, i32* %2
store i32 0, i32* %3
store i32 3, i32* %4
store i32 0, i32* %2
br label %5
5: ; preds = %19, %0
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 100
br i1 %7, label %8, label %22
8: ; preds = %5
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = icmp sgt i32 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = call i32 (...) @remove_me()
br label %14
14: ; preds = %12, %8
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 2
store i32 %16, i32* %3
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 3
store i32 %18, i32* %4
br label %19
19: ; preds = %14
%20 = load i32, i32* %2
%21 = add nsw i32 %20, 1
store i32 %21, i32* %2
br label %5
22: ; preds = %5
%23 = load i32, i32* %1
ret i32 %23
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %8
%2 = phi i32 [ 3, %0 ], [ %10, %8 ]
%3 = phi i32 [ 0, %0 ], [ %9, %8 ]
%4 = phi i32 [ 0, %0 ], [ %11, %8 ]
%5 = icmp ugt i32 %3, %2
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 (...) @remove_me()
br label %8
8: ; preds = %6, %1
%9 = add nuw nsw i32 %3, 2
%10 = add nuw nsw i32 %2, 3
%11 = add nuw nsw i32 %4, 1
%12 = icmp eq i32 %11, 100
br i1 %12, label %13, label %1
13: ; preds = %8
ret i32 0
}
void __swap(int *x, int *y) {
  int temp;
  temp = *x;
  *x = *y;
  *y = temp;
}


x86 assembly (clang, -O0):
<__swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__swap>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @__swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @__swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
/* Type definitions */
struct tipc_msg {
  int dummy;
};

/* Variables and functions */
int msg_bits(struct tipc_msg *, int /*<<< orphan*/, int, int);
int msg_non_seq(struct tipc_msg *m) { return msg_bits(m, 0, 20, 1); }


x86 assembly (clang, -O0):
<msg_non_seq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x14,%edx
mov    $0x1,%ecx
call   1030 <msg_bits@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msg_non_seq>:
xor    %esi,%esi
mov    $0x14,%edx
mov    $0x1,%ecx
jmp    1030 <msg_bits@plt>

LLVM IR (-O0):
%struct.tipc_msg = type { i32 }
define i32 @msg_non_seq(%struct.tipc_msg* %0) {
%2 = alloca %struct.tipc_msg*
store %struct.tipc_msg* %0, %struct.tipc_msg** %2
%3 = load %struct.tipc_msg*, %struct.tipc_msg** %2
%4 = call i32 @msg_bits(%struct.tipc_msg* %3, i32 0, i32 20, i32 1)
ret i32 %4
}

LLVM IR (-O2):
%struct.tipc_msg = type { i32 }
define i32 @msg_non_seq(%struct.tipc_msg* %0) {
%2 = tail call i32 @msg_bits(%struct.tipc_msg* %0, i32 0, i32 20, i32 1)
ret i32 %2
}
void RandomFunc(unsigned int input[1], unsigned int output[1]) {
  unsigned int state[1];
  unsigned int local1;
  {
    state[0UL] = (input[0UL] | 51238316UL) >> 3U;
    local1 = 0UL;
    while (local1 < 1UL) {
      state[0UL] <<= ((state[0UL] >> 3U) & 7U) | 1UL;
      local1 += 2UL;
    }
    output[0UL] = (state[0UL] & 144997984UL) & 434169834U;
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
or     $0x30dd5ac,%rax
shr    $0x3,%rax
mov    %eax,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    $0x1,%rax
jae    115b <RandomFunc+0x5b>
mov    -0x14(%rbp),%eax
shr    $0x3,%eax
and    $0x7,%eax
mov    %eax,%eax
mov    %eax,%ecx
or     $0x1,%rcx
mov    -0x14(%rbp),%eax
shl    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
add    $0x2,%rax
mov    %eax,-0x18(%rbp)
jmp    1126 <RandomFunc+0x26>
mov    -0x14(%rbp),%eax
and    $0x8a47e60,%rax
and    $0x19e0e7ea,%rax
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
mov    (%rdi),%eax
shl    $0x4,%eax
and    $0x8202400,%eax
or     $0x804200,%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca [1 x i32]
%6 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 0
%9 = load i32, i32* %8
%10 = zext i32 %9 to i64
%11 = or i64 %10, 51238316
%12 = lshr i64 %11, 3
%13 = trunc i64 %12 to i32
%14 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
store i32 %13, i32* %14
store i32 0, i32* %6
br label %15
15: ; preds = %19, %2
%16 = load i32, i32* %6
%17 = zext i32 %16 to i64
%18 = icmp ult i64 %17, 1
br i1 %18, label %19, label %34
19: ; preds = %15
%20 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
%21 = load i32, i32* %20
%22 = lshr i32 %21, 3
%23 = and i32 %22, 7
%24 = zext i32 %23 to i64
%25 = or i64 %24, 1
%26 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
%27 = load i32, i32* %26
%28 = trunc i64 %25 to i32
%29 = shl i32 %27, %28
store i32 %29, i32* %26
%30 = load i32, i32* %6
%31 = zext i32 %30 to i64
%32 = add i64 %31, 2
%33 = trunc i64 %32 to i32
store i32 %33, i32* %6
br label %15
34: ; preds = %15
%35 = getelementptr inbounds [1 x i32], [1 x i32]* %5, i64 0, i64 0
%36 = load i32, i32* %35
%37 = zext i32 %36 to i64
%38 = and i64 %37, 144997984
%39 = and i64 %38, 434169834
%40 = trunc i64 %39 to i32
%41 = load i32*, i32** %4
%42 = getelementptr inbounds i32, i32* %41, i64 0
store i32 %40, i32* %42
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i32* nocapture %0, i32* nocapture writeonly %1) {
%3 = load i32, i32* %0
%4 = shl i32 %3, 4
%5 = and i32 %4, 136324096
%6 = or i32 %5, 8405504
store i32 %6, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ uppercase(char *);
int main(void) {
  char test[] = "TeSt StRiNg";
  uppercase(test);
  printf("%s\n", test);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xec8(%rip),%eax
mov    %eax,-0x8(%rbp)
lea    -0x10(%rbp),%rdi
call   1040 <uppercase@plt>
lea    -0x10(%rbp),%rsi
lea    0xeb5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movabs $0x5274532074536554,%rax
53 74 52
mov    %rax,(%rsp)
movl   $0x674e69,0x8(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <uppercase@plt>
lea    0xebf(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.test = [12 x i8] c"TeSt StRiNg\00"
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [12 x i8]
store i32 0, i32* %1
%3 = bitcast [12 x i8]* %2 to i8*
%4 = getelementptr inbounds [12 x i8], [12 x i8]* %2, i64 0, i64 0
%5 = call i32 @uppercase(i8* %4)
%6 = getelementptr inbounds [12 x i8], [12 x i8]* %2, i64 0, i64 0
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %6)
ret i32 0
}

LLVM IR (-O2):
@__const.main.test = [12 x i8] c"TeSt StRiNg\00"
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca [12 x i8]
%2 = getelementptr inbounds [12 x i8], [12 x i8]* %1, i64 0, i64 0
%3 = call i32 @uppercase(i8* %2)
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %2)
ret i32 0
}
void no_param_desc(int n) { return; }


x86 assembly (clang, -O0):
<no_param_desc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<no_param_desc>:
ret

LLVM IR (-O0):
define void @no_param_desc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @no_param_desc(i32 %0) {
ret void
}
void XFindContext() {}


x86 assembly (clang, -O0):
<XFindContext>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XFindContext>:
ret

LLVM IR (-O0):
define void @XFindContext() {
ret void
}

LLVM IR (-O2):
define void @XFindContext() {
ret void
}
int test_imm_37int64_highword_reg(long long val) {
  return ((val >> 32) & (0x37 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_37int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0x37,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_37int64_highword_reg>:
movabs $0x3700000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_37int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 55
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_37int64_highword_reg(i64 %0) {
%2 = and i64 %0, 236223201280
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ outb(int, unsigned short);
void moveCursor(unsigned short pos) {
  outb(0xC00003D4, 14);
  outb(0xC00003D5, ((pos >> 8) & 0x00FF));
  outb(0xC00003D4, 15);
  outb(0xC00003D5, pos & 0x00FF);
}


x86 assembly (clang, -O0):
<moveCursor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    $0xc00003d4,%edi
mov    $0xe,%esi
call   1030 <outb@plt>
movzwl -0x2(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    $0xc00003d5,%edi
movzwl %ax,%esi
call   1030 <outb@plt>
mov    $0xc00003d4,%edi
mov    $0xf,%esi
call   1030 <outb@plt>
movzwl -0x2(%rbp),%eax
and    $0xff,%eax
mov    $0xc00003d5,%edi
movzwl %ax,%esi
call   1030 <outb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<moveCursor>:
push   %rbx
mov    %edi,%ebx
mov    $0xc00003d4,%edi
mov    $0xe,%esi
call   1030 <outb@plt>
mov    %ebx,%esi
shr    $0x8,%esi
mov    $0xc00003d5,%edi
call   1030 <outb@plt>
mov    $0xc00003d4,%edi
mov    $0xf,%esi
call   1030 <outb@plt>
movzbl %bl,%esi
mov    $0xc00003d5,%edi
pop    %rbx
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @moveCursor(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = call i32 @outb(i32 -1073740844, i16 zeroext 14)
%4 = load i16, i16* %2
%5 = zext i16 %4 to i32
%6 = ashr i32 %5, 8
%7 = and i32 %6, 255
%8 = trunc i32 %7 to i16
%9 = call i32 @outb(i32 -1073740843, i16 zeroext %8)
%10 = call i32 @outb(i32 -1073740844, i16 zeroext 15)
%11 = load i16, i16* %2
%12 = zext i16 %11 to i32
%13 = and i32 %12, 255
%14 = trunc i32 %13 to i16
%15 = call i32 @outb(i32 -1073740843, i16 zeroext %14)
ret void
}

LLVM IR (-O2):
define void @moveCursor(i16 zeroext %0) {
%2 = tail call i32 @outb(i32 -1073740844, i16 zeroext 14)
%3 = lshr i16 %0, 8
%4 = tail call i32 @outb(i32 -1073740843, i16 zeroext %3)
%5 = tail call i32 @outb(i32 -1073740844, i16 zeroext 15)
%6 = and i16 %0, 255
%7 = tail call i32 @outb(i32 -1073740843, i16 zeroext %6)
ret void
}