xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t CRC_Calc_Data(uint8_t dataValue, uint16_t crcValue) {
  uint16_t crcLow;
  crcLow = (crcValue & 0xff) ^ dataValue;
  return (crcValue >> 8) ^ (crcLow << 8) ^ (crcLow << 3) ^ (crcLow << 12) ^
         (crcLow >> 4) ^ (crcLow & 0x0f) ^ ((crcLow & 0x0f) << 7);
}


x86 assembly (clang, -O0):
<CRC_Calc_Data>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xff,%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x8,%eax
mov    -0xc(%rbp),%ecx
shl    $0x8,%ecx
xor    %ecx,%eax
mov    -0xc(%rbp),%ecx
shl    $0x3,%ecx
xor    %ecx,%eax
mov    -0xc(%rbp),%ecx
shl    $0xc,%ecx
xor    %ecx,%eax
mov    -0xc(%rbp),%ecx
sar    $0x4,%ecx
xor    %ecx,%eax
mov    -0xc(%rbp),%ecx
and    $0xf,%ecx
xor    %ecx,%eax
mov    -0xc(%rbp),%ecx
and    $0xf,%ecx
shl    $0x7,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CRC_Calc_Data>:
movzbl %sil,%eax
xor    %edi,%eax
sar    $0x8,%esi
mov    %eax,%ecx
shl    $0x8,%ecx
xor    %esi,%ecx
lea    0x0(,%rax,8),%edx
mov    %eax,%esi
shl    $0xc,%esi
xor    %edx,%esi
xor    %ecx,%esi
mov    %eax,%ecx
sar    $0x4,%ecx
and    $0xf,%eax
xor    %eax,%ecx
shl    $0x7,%eax
xor    %ecx,%eax
xor    %esi,%eax
ret

LLVM IR (-O0):
define i32 @CRC_Calc_Data(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = and i32 %6, 255
%8 = load i32, i32* %3
%9 = xor i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %4
%11 = ashr i32 %10, 8
%12 = load i32, i32* %5
%13 = shl i32 %12, 8
%14 = xor i32 %11, %13
%15 = load i32, i32* %5
%16 = shl i32 %15, 3
%17 = xor i32 %14, %16
%18 = load i32, i32* %5
%19 = shl i32 %18, 12
%20 = xor i32 %17, %19
%21 = load i32, i32* %5
%22 = ashr i32 %21, 4
%23 = xor i32 %20, %22
%24 = load i32, i32* %5
%25 = and i32 %24, 15
%26 = xor i32 %23, %25
%27 = load i32, i32* %5
%28 = and i32 %27, 15
%29 = shl i32 %28, 7
%30 = xor i32 %26, %29
ret i32 %30
}

LLVM IR (-O2):
define i32 @CRC_Calc_Data(i32 %0, i32 %1) {
%3 = and i32 %1, 255
%4 = xor i32 %3, %0
%5 = ashr i32 %1, 8
%6 = shl i32 %4, 8
%7 = xor i32 %6, %5
%8 = shl i32 %4, 3
%9 = xor i32 %7, %8
%10 = shl i32 %4, 12
%11 = xor i32 %9, %10
%12 = ashr i32 %4, 4
%13 = xor i32 %11, %12
%14 = and i32 %4, 15
%15 = xor i32 %13, %14
%16 = shl nuw nsw i32 %14, 7
%17 = xor i32 %15, %16
ret i32 %17
}
/* Variables and functions */
int /*<<< orphan*/ callee1();
int /*<<< orphan*/ callee2();
void caller1() {
  callee1();
  callee2();
}


x86 assembly (clang, -O0):
<caller1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <callee1@plt>
mov    $0x0,%al
call   1040 <callee2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<caller1>:
push   %rax
xor    %eax,%eax
call   1030 <callee1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <callee2@plt>

LLVM IR (-O0):
define void @caller1() {
%1 = call i32 (...) @callee1()
%2 = call i32 (...) @callee2()
ret void
}

LLVM IR (-O2):
define void @caller1() {
%1 = tail call i32 (...) @callee1()
%2 = tail call i32 (...) @callee2()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
void Assert(int assertion, char *error) {
  if (!assertion) {
    printf("Assertion Failed: %s\n", error);
    abort();
    exit(-1);
  }
}


x86 assembly (clang, -O0):
<Assert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1150 <Assert+0x30>
mov    -0x10(%rbp),%rsi
lea    0xebc(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Assert>:
test   %edi,%edi
je     1125 <Assert+0x5>
ret
push   %rax
lea    0xed3(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"Assertion Failed: %s\0A\00"
define void @Assert(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %2
%8 = load i8*, i8** %4
%9 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %8)
%10 = call i32 (...) @abort()
unreachable
11: ; preds = %2
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"Assertion Failed: %s\0A\00"
define void @Assert(i32 %0, i8* %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %1)
%6 = tail call i32 (...) @abort()
unreachable
7: ; preds = %2
ret void
}
int foo1(void) {
  char arr[16];
  arr[0] = 1;
  return 0;
}


x86 assembly (clang, -O0):
<foo1>:
push   %rbp
mov    %rsp,%rbp
movb   $0x1,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo1>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @foo1() {
%1 = alloca [16 x i8]
%2 = getelementptr inbounds [16 x i8], [16 x i8]* %1, i64 0, i64 0
store i8 1, i8* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @foo1() {
ret i32 0
}
/* Variables and functions */
int rom_present(char *);
int s3_virge_available(void) {
  return rom_present(L"roms/video/s3virge/s3virge.bin");
}


x86 assembly (clang, -O0):
<s3_virge_available>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <rom_present@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<s3_virge_available>:
lea    0xee9(%rip),%rdi
jmp    1030 <rom_present@plt>

LLVM IR (-O0):
@.str = [31 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 115, i32 51, i32 118, i32 105, i32 114, i32 103, i32 101, i32 47, i32 115, i32 51, i32 118, i32 105, i32 114, i32 103, i32 101, i32 46, i32 98, i32 105, i32 110, i32 0]
define i32 @s3_virge_available() {
%1 = call i32 @rom_present(i8* bitcast ([31 x i32]* @.str to i8*))
ret i32 %1
}

LLVM IR (-O2):
@.str = [31 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 115, i32 51, i32 118, i32 105, i32 114, i32 103, i32 101, i32 47, i32 115, i32 51, i32 118, i32 105, i32 114, i32 103, i32 101, i32 46, i32 98, i32 105, i32 110, i32 0]
define i32 @s3_virge_available() {
%1 = tail call i32 @rom_present(i8* bitcast ([31 x i32]* @.str to i8*))
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ header;

/* Variables and functions */
int write_stream(int, unsigned char const *, int);
int cm17a_header(int fd) {
  const unsigned char header[] = {0xD5, 0xAA};
  return write_stream(fd, header, sizeof(header));
}


x86 assembly (clang, -O0):
<cm17a_header>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0xede(%rip),%ax
mov    %ax,-0x6(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x6(%rbp),%rsi
mov    $0x2,%edx
call   1030 <write_stream@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cm17a_header>:
push   %rax
movw   $0xaad5,0x6(%rsp)
lea    0x6(%rsp),%rsi
mov    $0x2,%edx
call   1030 <write_stream@plt>
pop    %rcx
ret

LLVM IR (-O0):
@__const.cm17a_header.header = [2 x i8] c"\D5\AA"
define i32 @cm17a_header(i32 %0) {
%2 = alloca i32
%3 = alloca [2 x i8]
store i32 %0, i32* %2
%4 = bitcast [2 x i8]* %3 to i8*
%5 = load i32, i32* %2
%6 = getelementptr inbounds [2 x i8], [2 x i8]* %3, i64 0, i64 0
%7 = call i32 @write_stream(i32 %5, i8* %6, i32 2)
ret i32 %7
}

LLVM IR (-O2):
define i32 @cm17a_header(i32 %0) {
%2 = alloca i16
%3 = bitcast i16* %2 to i8*
store i16 -21803, i16* %2
%4 = call i32 @write_stream(i32 %0, i8* %3, i32 2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
int free_buffer(char *buffer) {
  if (buffer != NULL) {
    free(buffer);
    buffer = NULL;
  }
  return 0;
}


x86 assembly (clang, -O0):
<free_buffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1138 <free_buffer+0x28>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
movq   $0x0,-0x8(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_buffer>:
test   %rdi,%rdi
je     111f <free_buffer+0xf>
push   %rax
call   1030 <free@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @free_buffer(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
store i8* null, i8** %2
br label %8
8: ; preds = %5, %1
ret i32 0
}

LLVM IR (-O2):
define i32 @free_buffer(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret i32 0
}
/* Variables and functions */
unsigned int register_read(int);
int /*<<< orphan*/ register_write(int, unsigned int);
unsigned int register_read_pcie(unsigned int key) {
  register_write(0x0030, key);
  return register_read(0x0034);
}


x86 assembly (clang, -O0):
<register_read_pcie>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x30,%edi
call   1030 <register_write@plt>
mov    $0x34,%edi
call   1040 <register_read@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<register_read_pcie>:
push   %rax
mov    %edi,%esi
mov    $0x30,%edi
call   1030 <register_write@plt>
mov    $0x34,%edi
pop    %rax
jmp    1040 <register_read@plt>

LLVM IR (-O0):
define i32 @register_read_pcie(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @register_write(i32 48, i32 %3)
%5 = call i32 @register_read(i32 52)
ret i32 %5
}

LLVM IR (-O2):
define i32 @register_read_pcie(i32 %0) {
%2 = tail call i32 @register_write(i32 48, i32 %0)
%3 = tail call i32 @register_read(i32 52)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ srand(unsigned int);
scalar_t__ time(int /*<<< orphan*/ *);
void Randomize() { srand((unsigned)time(NULL)); }


x86 assembly (clang, -O0):
<Randomize>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Randomize>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @Randomize() {
%1 = call i64 @time(i32* null)
%2 = trunc i64 %1 to i32
%3 = call i32 @srand(i32 %2)
ret void
}

LLVM IR (-O2):
define void @Randomize() {
%1 = tail call i64 @time(i32* null)
%2 = trunc i64 %1 to i32
%3 = tail call i32 @srand(i32 %2)
ret void
}
const char *VigenereEncipher(const char *plaintext, const char *key) {
  return "smth";
}


x86 assembly (clang, -O0):
<VigenereEncipher>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeed(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<VigenereEncipher>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"smth\00"
define i8* @VigenereEncipher(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [5 x i8] c"smth\00"
define i8* @VigenereEncipher(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}
void gtk_font_selection_get_font_name() {}


x86 assembly (clang, -O0):
<gtk_font_selection_get_font_name>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_font_selection_get_font_name>:
ret

LLVM IR (-O0):
define void @gtk_font_selection_get_font_name() {
ret void
}

LLVM IR (-O2):
define void @gtk_font_selection_get_font_name() {
ret void
}
long fir_2_slot(double fir, long firlatlen) {
  long ifir;
  ifir = (fir * (firlatlen - 1.00));
  if (ifir < 0)
    ifir = 0;
  if (ifir >= firlatlen)
    ifir = firlatlen - 1;
  return (ifir);
}


x86 assembly (clang, -O0):
<fir_2_slot>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
cvtsi2sdq -0x10(%rbp),%xmm1
movsd  0xee0(%rip),%xmm2
subsd  %xmm2,%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jge    1144 <fir_2_slot+0x44>
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jl     115e <fir_2_slot+0x5e>
mov    -0x10(%rbp),%rax
sub    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fir_2_slot>:
cvtsi2sd %rdi,%xmm1
addsd  0xef3(%rip),%xmm1
mulsd  %xmm0,%xmm1
cvttsd2si %xmm1,%rax
xor    %ecx,%ecx
test   %rax,%rax
cmovns %rax,%rcx
lea    -0x1(%rdi),%rax
cmp    %rdi,%rcx
cmovl  %rcx,%rax
ret

LLVM IR (-O0):
define i64 @fir_2_slot(double %0, i64 %1) {
%3 = alloca double
%4 = alloca i64
%5 = alloca i64
store double %0, double* %3
store i64 %1, i64* %4
%6 = load double, double* %3
%7 = load i64, i64* %4
%8 = sitofp i64 %7 to double
%9 = fsub double %8, 1.000000e+00
%10 = fmul double %6, %9
%11 = fptosi double %10 to i64
store i64 %11, i64* %5
%12 = load i64, i64* %5
%13 = icmp slt i64 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %2
store i64 0, i64* %5
br label %15
15: ; preds = %14, %2
%16 = load i64, i64* %5
%17 = load i64, i64* %4
%18 = icmp sge i64 %16, %17
br i1 %18, label %19, label %22
19: ; preds = %15
%20 = load i64, i64* %4
%21 = sub nsw i64 %20, 1
store i64 %21, i64* %5
br label %22
22: ; preds = %19, %15
%23 = load i64, i64* %5
ret i64 %23
}

LLVM IR (-O2):
define i64 @fir_2_slot(double %0, i64 %1) {
%3 = sitofp i64 %1 to double
%4 = fadd double %3, -1.000000e+00
%5 = fmul double %4, %0
%6 = fptosi double %5 to i64
%7 = icmp sgt i64 %6, 0
%8 = select i1 %7, i64 %6, i64 0
%9 = icmp slt i64 %8, %1
%10 = add nsw i64 %1, -1
%11 = select i1 %9, i64 %8, i64 %10
ret i64 %11
}
/* Type definitions */
struct pkt_buff {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ tprintf(char *);
void dissect_opt_hop(struct pkt_buff *pkt, size_t *opt_len) {
  if (*opt_len)
    tprintf(", Option(s) recognized ");
}


x86 assembly (clang, -O0):
<dissect_opt_hop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
je     113a <dissect_opt_hop+0x2a>
lea    0xecb(%rip),%rdi
call   1030 <tprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dissect_opt_hop>:
cmpq   $0x0,(%rsi)
je     1122 <dissect_opt_hop+0x12>
lea    0xee3(%rip),%rdi
jmp    1030 <tprintf@plt>
ret

LLVM IR (-O0):
%struct.pkt_buff = type { i32 }
@.str = [24 x i8] c", Option(s) recognized \00"
define void @dissect_opt_hop(%struct.pkt_buff* %0, i64* %1) {
%3 = alloca %struct.pkt_buff*
%4 = alloca i64*
store %struct.pkt_buff* %0, %struct.pkt_buff** %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
%6 = load i64, i64* %5
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 @tprintf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %2
ret void
}

LLVM IR (-O2):
%struct.pkt_buff = type { i32 }
@.str = [24 x i8] c", Option(s) recognized \00"
define void @dissect_opt_hop(%struct.pkt_buff* nocapture readnone %0, i64* nocapture %1) {
%3 = load i64, i64* %1
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @tprintf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret void
}
/* Type definitions */
typedef int w;
typedef int uint32_t;

/* Variables and functions */
uint32_t reverse_endian32(uint32_t w) {
  return (((w) & (0xFF << (0) * 8)) << 24) | (((w) & (0xFF << (1) * 8)) << 8) |
         (((w) & (0xFF << (2) * 8)) >> 8) | (((w) & (0xFF << (3) * 8)) >> 24);
}


x86 assembly (clang, -O0):
<reverse_endian32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
shl    $0x18,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff0000,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff000000,%ecx
sar    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse_endian32>:
mov    %edi,%eax
and    $0xffffff,%eax
bswap  %eax
sar    $0x18,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @reverse_endian32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
%5 = shl i32 %4, 24
%6 = load i32, i32* %2
%7 = and i32 %6, 65280
%8 = shl i32 %7, 8
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = and i32 %10, 16711680
%12 = ashr i32 %11, 8
%13 = or i32 %9, %12
%14 = load i32, i32* %2
%15 = and i32 %14, -16777216
%16 = ashr i32 %15, 24
%17 = or i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @reverse_endian32(i32 %0) {
%2 = and i32 %0, 16777215
%3 = tail call i32 @llvm.bswap.i32(i32 %2)
%4 = ashr i32 %0, 24
%5 = or i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ fork();
int getppid();
int /*<<< orphan*/ usleep(int);
int forkbomb_fn(const char *cgroup, void *arg) {
  int ppid;
  fork();
  fork();
  ppid = getppid();
  while (getppid() == ppid)
    usleep(1000);
  return getppid() == ppid;
}


x86 assembly (clang, -O0):
<forkbomb_fn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <fork@plt>
mov    $0x0,%al
call   1040 <fork@plt>
mov    $0x0,%al
call   1030 <getppid@plt>
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1030 <getppid@plt>
cmp    -0x14(%rbp),%eax
jne    1177 <forkbomb_fn+0x47>
mov    $0x3e8,%edi
call   1050 <usleep@plt>
jmp    1158 <forkbomb_fn+0x28>
mov    $0x0,%al
call   1030 <getppid@plt>
cmp    -0x14(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<forkbomb_fn>:
push   %rbx
xor    %eax,%eax
call   1040 <fork@plt>
xor    %eax,%eax
call   1040 <fork@plt>
xor    %eax,%eax
call   1030 <getppid@plt>
mov    %eax,%ebx
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <getppid@plt>
cmp    %ebx,%eax
jne    1167 <forkbomb_fn+0x37>
mov    $0x3e8,%edi
call   1050 <usleep@plt>
jmp    1150 <forkbomb_fn+0x20>
xor    %eax,%eax
call   1030 <getppid@plt>
xor    %ecx,%ecx
cmp    %ebx,%eax
sete   %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @forkbomb_fn(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = call i32 (...) @fork()
%7 = call i32 (...) @fork()
%8 = call i32 (...) @getppid()
store i32 %8, i32* %5
br label %9
9: ; preds = %13, %2
%10 = call i32 (...) @getppid()
%11 = load i32, i32* %5
%12 = icmp eq i32 %10, %11
br i1 %12, label %13, label %15
13: ; preds = %9
%14 = call i32 @usleep(i32 1000)
br label %9
15: ; preds = %9
%16 = call i32 (...) @getppid()
%17 = load i32, i32* %5
%18 = icmp eq i32 %16, %17
%19 = zext i1 %18 to i32
ret i32 %19
}

LLVM IR (-O2):
define i32 @forkbomb_fn(i8* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = tail call i32 (...) @fork()
%4 = tail call i32 (...) @fork()
%5 = tail call i32 (...) @getppid()
%6 = tail call i32 (...) @getppid()
%7 = icmp eq i32 %6, %5
br i1 %7, label %8, label %12
8: ; preds = %2, %8
%9 = tail call i32 @usleep(i32 1000)
%10 = tail call i32 (...) @getppid()
%11 = icmp eq i32 %10, %5
br i1 %11, label %8, label %12
12: ; preds = %8, %2
%13 = tail call i32 (...) @getppid()
%14 = icmp eq i32 %13, %5
%15 = zext i1 %14 to i32
ret i32 %15
}
/* Variables and functions */
double tan(double);
double c_tan(double arg0) { return tan(arg0); }


x86 assembly (clang, -O0):
<c_tan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <tan@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_tan>:
jmp    1030 <tan@plt>

LLVM IR (-O0):
define double @c_tan(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @tan(double %3)
ret double %4
}

LLVM IR (-O2):
define double @c_tan(double %0) {
%2 = tail call double @tan(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ Zero_LogGrid(double *);
double *alloc_Grid();
double *alloc_LogGrid() {
  double *tt;
  tt = alloc_Grid();
  Zero_LogGrid(tt);
  return tt;
}


x86 assembly (clang, -O0):
<alloc_LogGrid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <alloc_Grid@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <Zero_LogGrid@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_LogGrid>:
push   %rbx
xor    %eax,%eax
call   1040 <alloc_Grid@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1030 <Zero_LogGrid@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define double* @alloc_LogGrid() {
%1 = alloca double*
%2 = call double* (...) @alloc_Grid()
store double* %2, double** %1
%3 = load double*, double** %1
%4 = call i32 @Zero_LogGrid(double* %3)
%5 = load double*, double** %1
ret double* %5
}

LLVM IR (-O2):
define double* @alloc_LogGrid() {
%1 = tail call double* (...) @alloc_Grid()
%2 = tail call i32 @Zero_LogGrid(double* %1)
ret double* %1
}
/* Variables and functions */
size_t bnode_color(size_t color_bit) { return (color_bit); }


x86 assembly (clang, -O0):
<bnode_color>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bnode_color>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @bnode_color(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
ret i64 %3
}

LLVM IR (-O2):
define i64 @bnode_color(i64 returned %0) {
ret i64 %0
}
int kbhit() { return 0; }


x86 assembly (clang, -O0):
<kbhit>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kbhit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @kbhit() {
ret i32 0
}

LLVM IR (-O2):
define i32 @kbhit() {
ret i32 0
}
int re_match(bufp, string, size, pos, regs)
struct re_pattern_buffer *bufp;
const char *string;
int size, pos;
struct re_registers *regs;
{
  int result =
      re_match_2_internal(bufp, (void *)0, 0, string, size, pos, regs, size);
  __builtin_alloca(0);
  return result;
}


x86 assembly (clang, -O0):
<re_match>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%r8d
mov    -0x18(%rbp),%r9d
mov    -0x20(%rbp),%r10
mov    -0x14(%rbp),%eax
xor    %edx,%edx
mov    %edx,%esi
xor    %edx,%edx
mov    %r10,(%rsp)
mov    %eax,0x8(%rsp)
mov    $0x0,%al
call   1030 <re_match_2_internal@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<re_match>:
push   %rax
mov    %r8,%r10
mov    %ecx,%r9d
mov    %edx,%r8d
mov    %rsi,%rcx
xor    %esi,%esi
xor    %edx,%edx
xor    %eax,%eax
push   %r8
push   %r10
call   1030 <re_match_2_internal@plt>
add    $0x10,%rsp
pop    %rcx
ret

LLVM IR (-O0):
%struct.re_pattern_buffer = type opaque
%struct.re_registers = type opaque
define i32 @re_match(%struct.re_pattern_buffer* %0, i8* %1, i32 %2, i32 %3, %struct.re_registers* %4) {
%6 = alloca %struct.re_pattern_buffer*
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
%10 = alloca %struct.re_registers*
%11 = alloca i32
store %struct.re_pattern_buffer* %0, %struct.re_pattern_buffer** %6
store i8* %1, i8** %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store %struct.re_registers* %4, %struct.re_registers** %10
%12 = load %struct.re_pattern_buffer*, %struct.re_pattern_buffer** %6
%13 = load i8*, i8** %7
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = load %struct.re_registers*, %struct.re_registers** %10
%17 = load i32, i32* %8
%18 = call i32 (%struct.re_pattern_buffer*, i8*, i32, i8*, i32, i32, %struct.re_registers*, i32, ...) bitcast (i32 (...)* @re_match_2_internal to i32 (%struct.re_pattern_buffer*, i8*, i32, i8*, i32, i32, %struct.re_registers*, i32, ...)*)(%struct.re_pattern_buffer* %12, i8* null, i32 0, i8* %13, i32 %14, i32 %15, %struct.re_registers* %16, i32 %17)
store i32 %18, i32* %11
%19 = alloca i8, i64 0
%20 = load i32, i32* %11
ret i32 %20
}

LLVM IR (-O2):
%struct.re_pattern_buffer = type opaque
%struct.re_registers = type opaque
define i32 @re_match(%struct.re_pattern_buffer* %0, i8* %1, i32 %2, i32 %3, %struct.re_registers* %4) {
%6 = tail call i32 (%struct.re_pattern_buffer*, i8*, i32, i8*, i32, i32, %struct.re_registers*, i32, ...) bitcast (i32 (...)* @re_match_2_internal to i32 (%struct.re_pattern_buffer*, i8*, i32, i8*, i32, i32, %struct.re_registers*, i32, ...)*)(%struct.re_pattern_buffer* %0, i8* null, i32 0, i8* %1, i32 %2, i32 %3, %struct.re_registers* %4, i32 %2)
ret i32 %6
}
/* Variables and functions */
char *strchr(char const *, char const);
int main(void) {
  const char p[] = "hello";
  char *q = strchr(p, p[0]);
  q[0];
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xedb(%rip),%eax
mov    %eax,-0xa(%rbp)
mov    0xed5(%rip),%ax
mov    %ax,-0x6(%rbp)
lea    -0xa(%rbp),%rdi
movsbl -0xa(%rbp),%esi
call   1030 <strchr@plt>
mov    %rax,-0x18(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@__const.main.p = [6 x i8] c"hello\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [6 x i8]
%3 = alloca i8*
store i32 0, i32* %1
%4 = bitcast [6 x i8]* %2 to i8*
%5 = getelementptr inbounds [6 x i8], [6 x i8]* %2, i64 0, i64 0
%6 = getelementptr inbounds [6 x i8], [6 x i8]* %2, i64 0, i64 0
%7 = load i8, i8* %6
%8 = call i8* @strchr(i8* %5, i8 signext %7)
store i8* %8, i8** %3
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 0
%11 = load i8, i8* %10
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
unsigned int K(int t) {
  if (t < 20)
    return 0x5A827999;
  else if (t < 40)
    return 0x6ED9EBA1;
  else if (t < 60)
    return 0x8F1BBCDC;
  return 0xCA62C1D6;
}


x86 assembly (clang, -O0):
<K>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x14,-0x8(%rbp)
jge    111d <K+0x1d>
movl   $0x5a827999,-0x4(%rbp)
jmp    115a <K+0x5a>
cmpl   $0x28,-0x8(%rbp)
jge    1133 <K+0x33>
movl   $0x6ed9eba1,-0x4(%rbp)
jmp    115a <K+0x5a>
cmpl   $0x3c,-0x8(%rbp)
jge    1149 <K+0x49>
movl   $0x8f1bbcdc,-0x4(%rbp)
jmp    115a <K+0x5a>
jmp    114e <K+0x4e>
jmp    1153 <K+0x53>
movl   $0xca62c1d6,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<K>:
mov    $0x5a827999,%eax
cmp    $0x14,%edi
jl     1124 <K+0x24>
mov    $0x6ed9eba1,%eax
cmp    $0x28,%edi
jb     1124 <K+0x24>
cmp    $0x3c,%edi
mov    $0x8f1bbcdc,%ecx
mov    $0xca62c1d6,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @K(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 20
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1518500249, i32* %2
br label %18
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 40
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 1859775393, i32* %2
br label %18
11: ; preds = %7
%12 = load i32, i32* %3
%13 = icmp slt i32 %12, 60
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 -1894007588, i32* %2
br label %18
15: ; preds = %11
br label %16
16: ; preds = %15
br label %17
17: ; preds = %16
store i32 -899497514, i32* %2
br label %18
18: ; preds = %17, %14, %10, %6
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @K(i32 %0) {
%2 = icmp slt i32 %0, 20
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = icmp ult i32 %0, 40
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = icmp ult i32 %0, 60
%7 = select i1 %6, i32 -1894007588, i32 -899497514
br label %8
8: ; preds = %5, %3, %1
%9 = phi i32 [ 1518500249, %1 ], [ 1859775393, %3 ], [ %7, %5 ]
ret i32 %9
}
int test_imm_A7uint32_mem(unsigned int *val) {
  return ((*val) & (0xA7 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A7uint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xa7,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A7uint32_mem>:
testb  $0xa7,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A7uint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 167
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A7uint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 167
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
long int lsrchlint(long int *a, long int n, long int k) {
  long int i;
  for (i = 0; i < n; i++) {
    if (*(a + i) == k)
      return i;
  }
  return -1;
}


x86 assembly (clang, -O0):
<lsrchlint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
mov    -0x28(%rbp),%rax
cmp    -0x18(%rbp),%rax
jge    115f <lsrchlint+0x5f>
mov    -0x10(%rbp),%rax
mov    -0x28(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
cmp    -0x20(%rbp),%rax
jne    1149 <lsrchlint+0x49>
mov    -0x28(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1167 <lsrchlint+0x67>
jmp    114e <lsrchlint+0x4e>
mov    -0x28(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x28(%rbp)
jmp    1118 <lsrchlint+0x18>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lsrchlint>:
mov    $0xffffffffffffffff,%rax
test   %rsi,%rsi
jle    111f <lsrchlint+0x1f>
xor    %ecx,%ecx
xchg   %ax,%ax
cmp    %rdx,(%rdi,%rcx,8)
je     1120 <lsrchlint+0x20>
add    $0x1,%rcx
cmp    %rcx,%rsi
jne    1110 <lsrchlint+0x10>
ret
mov    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @lsrchlint(i64* %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64* %0, i64** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 0, i64* %8
br label %9
9: ; preds = %23, %3
%10 = load i64, i64* %8
%11 = load i64, i64* %6
%12 = icmp slt i64 %10, %11
br i1 %12, label %13, label %26
13: ; preds = %9
%14 = load i64*, i64** %5
%15 = load i64, i64* %8
%16 = getelementptr inbounds i64, i64* %14, i64 %15
%17 = load i64, i64* %16
%18 = load i64, i64* %7
%19 = icmp eq i64 %17, %18
br i1 %19, label %20, label %22
20: ; preds = %13
%21 = load i64, i64* %8
store i64 %21, i64* %4
br label %27
22: ; preds = %13
br label %23
23: ; preds = %22
%24 = load i64, i64* %8
%25 = add nsw i64 %24, 1
store i64 %25, i64* %8
br label %9
26: ; preds = %9
store i64 -1, i64* %4
br label %27
27: ; preds = %26, %20
%28 = load i64, i64* %4
ret i64 %28
}

LLVM IR (-O2):
define i64 @lsrchlint(i64* nocapture %0, i64 %1, i64 %2) {
%4 = icmp sgt i64 %1, 0
br i1 %4, label %5, label %13
5: ; preds = %3, %10
%6 = phi i64 [ %11, %10 ], [ 0, %3 ]
%7 = getelementptr inbounds i64, i64* %0, i64 %6
%8 = load i64, i64* %7
%9 = icmp eq i64 %8, %2
br i1 %9, label %13, label %10
10: ; preds = %5
%11 = add nuw nsw i64 %6, 1
%12 = icmp eq i64 %11, %1
br i1 %12, label %13, label %5
13: ; preds = %5, %10, %3
%14 = phi i64 [ -1, %3 ], [ -1, %10 ], [ %6, %5 ]
ret i64 %14
}
unsigned rightrot(unsigned x, int n) {
  int wordlength(void);
  unsigned rbit;
  rbit = x << (wordlength() - n);
  x = x >> n;
  x = x | rbit;
  return x;
}


x86 assembly (clang, -O0):
<rightrot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
call   1030 <wordlength@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
sub    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
or     -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rightrot>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <wordlength@plt>
sub    %ebx,%eax
mov    %ebp,%edx
mov    %eax,%ecx
shl    %cl,%edx
mov    %ebx,%ecx
shr    %cl,%ebp
or     %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @rightrot(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = call i32 @wordlength()
%8 = load i32, i32* %4
%9 = sub nsw i32 %7, %8
%10 = shl i32 %6, %9
store i32 %10, i32* %5
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = lshr i32 %11, %12
store i32 %13, i32* %3
%14 = load i32, i32* %3
%15 = load i32, i32* %5
%16 = or i32 %14, %15
store i32 %16, i32* %3
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @rightrot(i32 %0, i32 %1) {
%3 = tail call i32 @wordlength()
%4 = sub nsw i32 %3, %1
%5 = shl i32 %0, %4
%6 = lshr i32 %0, %1
%7 = or i32 %5, %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void I2C_close(int i2c_fd) { close(i2c_fd); }


x86 assembly (clang, -O0):
<I2C_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2C_close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @I2C_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret void
}

LLVM IR (-O2):
define void @I2C_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret void
}
int lenmax(int len1, int len2) {
  if (len1 >= len2)
    return len1;
  else
    return len2;
}


x86 assembly (clang, -O0):
<lenmax>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jl     1121 <lenmax+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <lenmax+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lenmax>:
mov    %edi,%eax
cmp    %esi,%edi
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define i32 @lenmax(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp sge i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @lenmax(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ digitalWrite(int, int);
void set_gpio(int pin, int value) { digitalWrite(pin, value); }


x86 assembly (clang, -O0):
<set_gpio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <digitalWrite@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_gpio>:
jmp    1030 <digitalWrite@plt>

LLVM IR (-O0):
define void @set_gpio(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @digitalWrite(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @set_gpio(i32 %0, i32 %1) {
%3 = tail call i32 @digitalWrite(i32 %0, i32 %1)
ret void
}
/* Type definitions */
struct genlist {
  int dummy;
};
struct entry_list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ genlist_reverse(struct genlist *);
void entry_list_reverse(struct entry_list *tthis) {
  genlist_reverse((struct genlist *)tthis);
}


x86 assembly (clang, -O0):
<entry_list_reverse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <genlist_reverse@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<entry_list_reverse>:
jmp    1030 <genlist_reverse@plt>

LLVM IR (-O0):
%struct.entry_list = type { i32 }
%struct.genlist = type { i32 }
define void @entry_list_reverse(%struct.entry_list* %0) {
%2 = alloca %struct.entry_list*
store %struct.entry_list* %0, %struct.entry_list** %2
%3 = load %struct.entry_list*, %struct.entry_list** %2
%4 = bitcast %struct.entry_list* %3 to %struct.genlist*
%5 = call i32 @genlist_reverse(%struct.genlist* %4)
ret void
}

LLVM IR (-O2):
%struct.entry_list = type { i32 }
%struct.genlist = type { i32 }
define void @entry_list_reverse(%struct.entry_list* %0) {
%2 = bitcast %struct.entry_list* %0 to %struct.genlist*
%3 = tail call i32 @genlist_reverse(%struct.genlist* %2)
ret void
}
/* Type definitions */
struct mdl_node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ flatten_aux(struct mdl_node *);
void flatten(struct mdl_node *h) { (void)flatten_aux(h); }


x86 assembly (clang, -O0):
<flatten>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <flatten_aux@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flatten>:
jmp    1030 <flatten_aux@plt>

LLVM IR (-O0):
%struct.mdl_node = type { i32 }
define void @flatten(%struct.mdl_node* %0) {
%2 = alloca %struct.mdl_node*
store %struct.mdl_node* %0, %struct.mdl_node** %2
%3 = load %struct.mdl_node*, %struct.mdl_node** %2
%4 = call i32 @flatten_aux(%struct.mdl_node* %3)
ret void
}

LLVM IR (-O2):
%struct.mdl_node = type { i32 }
define void @flatten(%struct.mdl_node* %0) {
%2 = tail call i32 @flatten_aux(%struct.mdl_node* %0)
ret void
}
/* Variables and functions */
int PAPI_accum_counters(long long *, int);
void papif_accum_counters__(long long *values, int *array_len, int *check) {
  *check = PAPI_accum_counters(values, *array_len);
}


x86 assembly (clang, -O0):
<papif_accum_counters__>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
call   1030 <PAPI_accum_counters@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<papif_accum_counters__>:
push   %rbx
mov    %rdx,%rbx
mov    (%rsi),%esi
call   1030 <PAPI_accum_counters@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @papif_accum_counters__(i64* %0, i32* %1, i32* %2) {
%4 = alloca i64*
%5 = alloca i32*
%6 = alloca i32*
store i64* %0, i64** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i64*, i64** %4
%8 = load i32*, i32** %5
%9 = load i32, i32* %8
%10 = call i32 @PAPI_accum_counters(i64* %7, i32 %9)
%11 = load i32*, i32** %6
store i32 %10, i32* %11
ret void
}

LLVM IR (-O2):
define void @papif_accum_counters__(i64* %0, i32* nocapture %1, i32* nocapture writeonly %2) {
%4 = load i32, i32* %1
%5 = tail call i32 @PAPI_accum_counters(i64* %0, i32 %4)
store i32 %5, i32* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int main(void) { printf("%s", "hello, world\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee1(%rip),%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xee4(%rip),%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [14 x i8] c"hello, world\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@.str.1 = [14 x i8] c"hello, world\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
void LedModel_Init() {}


x86 assembly (clang, -O0):
<LedModel_Init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LedModel_Init>:
ret

LLVM IR (-O0):
define void @LedModel_Init() {
ret void
}

LLVM IR (-O2):
define void @LedModel_Init() {
ret void
}
/* Variables and functions */
scalar_t__ shim_enosys(int /*<<< orphan*/, unsigned long);
int shim_memfd_secret(unsigned long flags) {
  return (int)shim_enosys(0, flags);
}


x86 assembly (clang, -O0):
<shim_memfd_secret>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
xor    %edi,%edi
call   1030 <shim_enosys@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shim_memfd_secret>:
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <shim_enosys@plt>

LLVM IR (-O0):
define i32 @shim_memfd_secret(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @shim_enosys(i32 0, i64 %3)
%5 = trunc i64 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @shim_memfd_secret(i64 %0) {
%2 = tail call i64 @shim_enosys(i32 0, i64 %0)
%3 = trunc i64 %2 to i32
ret i32 %3
}
int test_imm_26int32_reg(int val) { return ((val) & (0x26 << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_26int32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x26,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_26int32_reg>:
test   $0x26,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_26int32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 38
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_26int32_reg(i32 %0) {
%2 = and i32 %0, 38
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int type;
};
typedef TYPE_1__ XIMStatusDrawCallbackStruct;

/* Variables and functions */
void set_XIMStatusDrawCallbackStruct_type(void *_p, int _v) {
  ((XIMStatusDrawCallbackStruct *)_p)->type = (int)_v;
}


x86 assembly (clang, -O0):
<set_XIMStatusDrawCallbackStruct_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XIMStatusDrawCallbackStruct_type>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XIMStatusDrawCallbackStruct_type(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XIMStatusDrawCallbackStruct_type(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
void set(int *a, int i, int v) { a[i] = v; }


x86 assembly (clang, -O0):
<set>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set>:
movslq %esi,%rax
mov    %edx,(%rdi,%rax,4)
ret

LLVM IR (-O0):
define void @set(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
store i32 %7, i32* %11
ret void
}

LLVM IR (-O2):
define void @set(i32* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
store i32 %2, i32* %5
ret void
}
char *binv_explain_error(int error_code) {
  return "BINV cipher has nothing to explain.";
}


x86 assembly (clang, -O0):
<binv_explain_error>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
lea    0xef2(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<binv_explain_error>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [36 x i8] c"BINV cipher has nothing to explain.\00"
define i8* @binv_explain_error(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [36 x i8] c"BINV cipher has nothing to explain.\00"
define i8* @binv_explain_error(i32 %0) {
ret i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0)
}
int x43_process_syn(struct mypacket *packet) { return 0; }


x86 assembly (clang, -O0):
<x43_process_syn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<x43_process_syn>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.mypacket = type opaque
define i32 @x43_process_syn(%struct.mypacket* %0) {
%2 = alloca %struct.mypacket*
store %struct.mypacket* %0, %struct.mypacket** %2
ret i32 0
}

LLVM IR (-O2):
%struct.mypacket = type opaque
define i32 @x43_process_syn(%struct.mypacket* nocapture readnone %0) {
ret i32 0
}
void DBGFR3RegNmQuery(void) {}


x86 assembly (clang, -O0):
<DBGFR3RegNmQuery>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DBGFR3RegNmQuery>:
ret

LLVM IR (-O0):
define void @DBGFR3RegNmQuery() {
ret void
}

LLVM IR (-O2):
define void @DBGFR3RegNmQuery() {
ret void
}
/* Variables and functions */
scalar_t__ EOF;
scalar_t__ fflush(int /*<<< orphan*/ *);
int /*<<< orphan*/ sync();
int /*<<< orphan*/ terminal_error(char *);
void sync_flush(void) {
  if ((fflush(NULL)) == EOF)
    terminal_error("fflush");
  sync();
  sync();
  sync();
}


x86 assembly (clang, -O0):
<sync_flush>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <fflush@plt>
mov    0x2ea4(%rip),%rcx
cmp    (%rcx),%rax
jne    1159 <sync_flush+0x29>
lea    0xeac(%rip),%rdi
call   1050 <terminal_error@plt>
mov    $0x0,%al
call   1030 <sync@plt>
mov    $0x0,%al
call   1030 <sync@plt>
mov    $0x0,%al
call   1030 <sync@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sync_flush>:
push   %rax
xor    %edi,%edi
call   1040 <fflush@plt>
mov    0x2ea9(%rip),%rcx
cmp    (%rcx),%rax
jne    1150 <sync_flush+0x20>
lea    0xeb5(%rip),%rdi
call   1050 <terminal_error@plt>
xor    %eax,%eax
call   1030 <sync@plt>
xor    %eax,%eax
call   1030 <sync@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <sync@plt>

LLVM IR (-O0):
@EOF = global i64 0
@.str = [7 x i8] c"fflush\00"
define void @sync_flush() {
%1 = call i64 @fflush(i32* null)
%2 = load i64, i64* @EOF
%3 = icmp eq i64 %1, %2
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @terminal_error(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
%7 = call i32 (...) @sync()
%8 = call i32 (...) @sync()
%9 = call i32 (...) @sync()
ret void
}

LLVM IR (-O2):
@EOF = global i64 0
@.str = [7 x i8] c"fflush\00"
define void @sync_flush() {
%1 = tail call i64 @fflush(i32* null)
%2 = load i64, i64* @EOF
%3 = icmp eq i64 %1, %2
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = tail call i32 @terminal_error(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
%7 = tail call i32 (...) @sync()
%8 = tail call i32 (...) @sync()
%9 = tail call i32 (...) @sync()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void B() { printf("B\n"); }


x86 assembly (clang, -O0):
<B>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<B>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"B\0A\00"
define void @B() {
%1 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [2 x i8] c"B\00"
define void @B() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str, i64 0, i64 0))
ret void
}