xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *malloc(int);
int /*<<< orphan*/ write(int, char *, int);
int main(void) {
  char *x = (char *)0x10;
  char *y;
  write(1, "A\n", 2);
  free(x);
  write(1, "B\n", 2);
  y = malloc(8);
  write(1, "C\n", 2);
  free(y);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x10,%eax
mov    %rax,-0x10(%rbp)
mov    $0x1,%edi
lea    0xeac(%rip),%rsi
mov    $0x2,%edx
call   1040 <write@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    $0x1,%edi
lea    0xe90(%rip),%rsi
mov    $0x2,%edx
call   1040 <write@plt>
mov    $0x8,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    $0x1,%edi
lea    0xe6f(%rip),%rsi
mov    $0x2,%edx
call   1040 <write@plt>
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xec8(%rip),%rsi
mov    $0x1,%edi
mov    $0x2,%edx
call   1040 <write@plt>
mov    $0x10,%edi
call   1030 <free@plt>
lea    0xeab(%rip),%rsi
mov    $0x1,%edi
mov    $0x2,%edx
call   1040 <write@plt>
mov    $0x8,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
lea    0xe8b(%rip),%rsi
mov    $0x1,%edi
mov    $0x2,%edx
call   1040 <write@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"A\0A\00"
@.str.1 = [3 x i8] c"B\0A\00"
@.str.2 = [3 x i8] c"C\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
store i32 0, i32* %1
store i8* inttoptr (i64 16 to i8*), i8** %2
%4 = call i32 @write(i32 1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 2)
%5 = load i8*, i8** %2
%6 = call i32 @free(i8* %5)
%7 = call i32 @write(i32 1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 2)
%8 = call i8* @malloc(i32 8)
store i8* %8, i8** %3
%9 = call i32 @write(i32 1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0), i32 2)
%10 = load i8*, i8** %3
%11 = call i32 @free(i8* %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"A\0A\00"
@.str.1 = [3 x i8] c"B\0A\00"
@.str.2 = [3 x i8] c"C\0A\00"
define i32 @main() {
%1 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 2)
%2 = tail call i32 @free(i8* inttoptr (i64 16 to i8*))
%3 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 2)
%4 = tail call dereferenceable_or_null(8) i8* @malloc(i32 8)
%5 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0), i32 2)
%6 = tail call i32 @free(i8* %4)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ useconds_t;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int rand();
int /*<<< orphan*/ stdout;
int /*<<< orphan*/ usleep(int /*<<< orphan*/);
void think(int p) {
  int thinkTime = rand() % 5000000 + 1;
  fprintf(stdout, "Philosopher #%d is thinking.\n", p);
  usleep((useconds_t)thinkTime);
}


x86 assembly (clang, -O0):
<think>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <rand@plt>
mov    $0x4c4b40,%ecx
cltd
idiv   %ecx
add    $0x1,%edx
mov    %edx,-0x8(%rbp)
mov    0x2e89(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%edx
lea    0xe9d(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x8(%rbp),%edi
call   1050 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<think>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <rand@plt>
cltq
imul   $0x6b5fca6b,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x35,%rcx
add    %edx,%ecx
imul   $0x4c4b40,%ecx,%ecx
neg    %ecx
lea    (%rax,%rcx,1),%ebp
add    $0x1,%ebp
mov    0x2e79(%rip),%rax
mov    (%rax),%edi
lea    0xe90(%rip),%rsi
mov    %ebx,%edx
call   1030 <fprintf@plt>
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <usleep@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [30 x i8] c"Philosopher #%d is thinking.\0A\00"
define void @think(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 (...) @rand()
%5 = srem i32 %4, 5000000
%6 = add nsw i32 %5, 1
store i32 %6, i32* %3
%7 = load i32, i32* @stdout
%8 = load i32, i32* %2
%9 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i32 %8)
%10 = load i32, i32* %3
%11 = call i32 @usleep(i32 %10)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [30 x i8] c"Philosopher #%d is thinking.\0A\00"
define void @think(i32 %0) {
%2 = tail call i32 (...) @rand()
%3 = srem i32 %2, 5000000
%4 = add nsw i32 %3, 1
%5 = load i32, i32* @stdout
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i32 %0)
%7 = tail call i32 @usleep(i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int close(int);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
void safe_close(int fildes) {
  if (close(fildes) == -1) {
    perror("safe_close - Failed to close.");
    exit(EXIT_FAILURE);
  }
}


x86 assembly (clang, -O0):
<safe_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
cmp    $0xffffffff,%eax
jne    1166 <safe_close+0x36>
lea    0xead(%rip),%rdi
call   1040 <perror@plt>
mov    0x2e81(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_close>:
push   %rax
call   1030 <close@plt>
cmp    $0xffffffff,%eax
je     113d <safe_close+0xd>
pop    %rax
ret
lea    0xebc(%rip),%rdi
call   1040 <perror@plt>
mov    0x2e90(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [30 x i8] c"safe_close - Failed to close.\00"
@EXIT_FAILURE = global i32 0
define void @safe_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = call i32 @perror(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* @EXIT_FAILURE
%9 = call i32 @exit(i32 %8)
unreachable
10: ; preds = %1
ret void
}

LLVM IR (-O2):
@.str = [30 x i8] c"safe_close - Failed to close.\00"
@EXIT_FAILURE = global i32 0
define void @safe_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i32 @perror(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* @EXIT_FAILURE
%7 = tail call i32 @exit(i32 %6)
unreachable
8: ; preds = %1
ret void
}
float fsign(float num, float sign) {
  if ((sign > 0.0f && num < 0.0f) || (sign < 0.0f && num > 0.0f))
    return -num;
  else
    return num;
}


x86 assembly (clang, -O0):
<fsign>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jbe    112c <fsign+0x2c>
xorps  %xmm0,%xmm0
ucomiss -0x8(%rbp),%xmm0
ja     114a <fsign+0x4a>
xorps  %xmm0,%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    1166 <fsign+0x66>
movss  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jbe    1166 <fsign+0x66>
movss  -0x8(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1170 <fsign+0x70>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsign>:
xorps  %xmm2,%xmm2
ucomiss %xmm0,%xmm2
jbe    110d <fsign+0xd>
ucomiss %xmm2,%xmm1
ja     111a <fsign+0x1a>
ucomiss %xmm2,%xmm0
jbe    1121 <fsign+0x21>
xorps  %xmm2,%xmm2
ucomiss %xmm1,%xmm2
jbe    1121 <fsign+0x21>
xorps  0xedf(%rip),%xmm0
ret

LLVM IR (-O0):
define float @fsign(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %5
%7 = fcmp ogt float %6, 0.000000e+00
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load float, float* %4
%10 = fcmp olt float %9, 0.000000e+00
br i1 %10, label %17, label %11
11: ; preds = %8, %2
%12 = load float, float* %5
%13 = fcmp olt float %12, 0.000000e+00
br i1 %13, label %14, label %20
14: ; preds = %11
%15 = load float, float* %4
%16 = fcmp ogt float %15, 0.000000e+00
br i1 %16, label %17, label %20
17: ; preds = %14, %8
%18 = load float, float* %4
%19 = fneg float %18
store float %19, float* %3
br label %22
20: ; preds = %14, %11
%21 = load float, float* %4
store float %21, float* %3
br label %22
22: ; preds = %20, %17
%23 = load float, float* %3
ret float %23
}

LLVM IR (-O2):
define float @fsign(float %0, float %1) {
%3 = fcmp ogt float %1, 0.000000e+00
%4 = fcmp olt float %0, 0.000000e+00
%5 = and i1 %4, %3
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = fcmp olt float %1, 0.000000e+00
%8 = fcmp ogt float %0, 0.000000e+00
%9 = and i1 %8, %7
br i1 %9, label %10, label %12
10: ; preds = %6, %2
%11 = fneg float %0
br label %12
12: ; preds = %6, %10
%13 = phi float [ %11, %10 ], [ %0, %6 ]
ret float %13
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
size_t quicly_encodev_capacity(uint64_t v) {
  if (v > 63) {
    if (v > 16383) {
      if (v > 1073741823)
        return 8;
      return 4;
    }
    return 2;
  }
  return 1;
}


x86 assembly (clang, -O0):
<quicly_encodev_capacity>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
cmpl   $0x3f,-0xc(%rbp)
jle    1152 <quicly_encodev_capacity+0x52>
cmpl   $0x3fff,-0xc(%rbp)
jle    1145 <quicly_encodev_capacity+0x45>
cmpl   $0x3fffffff,-0xc(%rbp)
jle    1138 <quicly_encodev_capacity+0x38>
movq   $0x8,-0x8(%rbp)
jmp    115a <quicly_encodev_capacity+0x5a>
movq   $0x4,-0x8(%rbp)
jmp    115a <quicly_encodev_capacity+0x5a>
movq   $0x2,-0x8(%rbp)
jmp    115a <quicly_encodev_capacity+0x5a>
movq   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<quicly_encodev_capacity>:
mov    $0x1,%eax
cmp    $0x40,%edi
jl     112a <quicly_encodev_capacity+0x2a>
mov    $0x2,%eax
cmp    $0x4000,%edi
jb     112a <quicly_encodev_capacity+0x2a>
xor    %eax,%eax
cmp    $0x40000000,%edi
setae  %al
lea    0x4(,%rax,4),%rax
ret

LLVM IR (-O0):
define i64 @quicly_encodev_capacity(i32 %0) {
%2 = alloca i64
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 63
br i1 %5, label %6, label %15
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 16383
br i1 %8, label %9, label %14
9: ; preds = %6
%10 = load i32, i32* %3
%11 = icmp sgt i32 %10, 1073741823
br i1 %11, label %12, label %13
12: ; preds = %9
store i64 8, i64* %2
br label %16
13: ; preds = %9
store i64 4, i64* %2
br label %16
14: ; preds = %6
store i64 2, i64* %2
br label %16
15: ; preds = %1
store i64 1, i64* %2
br label %16
16: ; preds = %15, %14, %13, %12
%17 = load i64, i64* %2
ret i64 %17
}

LLVM IR (-O2):
define i64 @quicly_encodev_capacity(i32 %0) {
%2 = icmp sgt i32 %0, 63
br i1 %2, label %3, label %8
3: ; preds = %1
%4 = icmp ugt i32 %0, 16383
br i1 %4, label %5, label %8
5: ; preds = %3
%6 = icmp ugt i32 %0, 1073741823
%7 = select i1 %6, i64 8, i64 4
br label %8
8: ; preds = %1, %3, %5
%9 = phi i64 [ %7, %5 ], [ 2, %3 ], [ 1, %1 ]
ret i64 %9
}
/* Variables and functions */
int /*<<< orphan*/ clear_io_bit(int, int /*<<< orphan*/);
void TOSH_MAKE_RADIO_CSN_INPUT() { clear_io_bit(-3, 0); }


x86 assembly (clang, -O0):
<TOSH_MAKE_RADIO_CSN_INPUT>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffffffd,%edi
xor    %esi,%esi
call   1030 <clear_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_MAKE_RADIO_CSN_INPUT>:
mov    $0xfffffffd,%edi
xor    %esi,%esi
jmp    1030 <clear_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_MAKE_RADIO_CSN_INPUT() {
%1 = call i32 @clear_io_bit(i32 -3, i32 0)
ret void
}

LLVM IR (-O2):
define void @TOSH_MAKE_RADIO_CSN_INPUT() {
%1 = tail call i32 @clear_io_bit(i32 -3, i32 0)
ret void
}
/* Type definitions */
struct timeval {
  scalar_t__ tv_usec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
double HostTimeNow() {
  struct timeval t;
  gettimeofday(&t, NULL);
  double mytime_second = (double)t.tv_sec + (double)t.tv_usec * 1e-6;
  return mytime_second;
}


x86 assembly (clang, -O0):
<HostTimeNow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
cvtsi2sdq -0x8(%rbp),%xmm1
cvtsi2sdq -0x10(%rbp),%xmm0
movsd  0xec7(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HostTimeNow>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
cvtsi2sdq 0x10(%rsp),%xmm1
cvtsi2sdq 0x8(%rsp),%xmm0
mulsd  0xeca(%rip),%xmm0
addsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { i64, i64 }
define double @HostTimeNow() {
%1 = alloca %struct.timeval
%2 = alloca double
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%5 = load i64, i64* %4
%6 = sitofp i64 %5 to double
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%8 = load i64, i64* %7
%9 = sitofp i64 %8 to double
%10 = call double @llvm.fmuladd.f64(double %9, double 0x3EB0C6F7A0B5ED8D, double %6)
store double %10, double* %2
%11 = load double, double* %2
ret double %11
}

LLVM IR (-O2):
%struct.timeval = type { i64, i64 }
define double @HostTimeNow() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%5 = load i64, i64* %4
%6 = sitofp i64 %5 to double
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%8 = load i64, i64* %7
%9 = sitofp i64 %8 to double
%10 = tail call double @llvm.fmuladd.f64(double %9, double 0x3EB0C6F7A0B5ED8D, double %6)
ret double %10
}
/* Variables and functions */
int /*<<< orphan*/
internal_set_shadow_preset(int /*<<< orphan*/, double, int /*<<< orphan*/,
                           int /*<<< orphan*/, int /*<<< orphan*/,
                           int /*<<< orphan*/, int, int /*<<< orphan*/);
void palette_set_shadow_factor32(double factor) {
  internal_set_shadow_preset(0, factor, 0, 0, 0, 0, 1, 0);
}


x86 assembly (clang, -O0):
<palette_set_shadow_factor32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xor    %r8d,%r8d
mov    $0x1,%r9d
mov    %r8d,%edi
mov    %r8d,%esi
mov    %r8d,%edx
mov    %r8d,%ecx
movl   $0x0,(%rsp)
call   1030 <internal_set_shadow_preset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<palette_set_shadow_factor32>:
push   %rax
movl   $0x0,(%rsp)
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
mov    $0x1,%r9d
call   1030 <internal_set_shadow_preset@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @palette_set_shadow_factor32(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @internal_set_shadow_preset(i32 0, double %3, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0)
ret void
}

LLVM IR (-O2):
define void @palette_set_shadow_factor32(double %0) {
%2 = tail call i32 @internal_set_shadow_preset(i32 0, double %0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0)
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint64_t;

/* Variables and functions */
uint64_t pes_get_pts(const uint8_t *p_pes) {
  return (((uint64_t)p_pes[9] & 0xe)) << 29 | (p_pes[10] << 22) |
         ((p_pes[11] & 0xfe) << 14) | (p_pes[12] << 7) |
         ((p_pes[13] & 0xfe) >> 1);
}


x86 assembly (clang, -O0):
<pes_get_pts>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x24(%rax),%eax
and    $0xe,%eax
shl    $0x1d,%eax
mov    -0x8(%rbp),%rcx
mov    0x28(%rcx),%ecx
shl    $0x16,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x2c(%rcx),%ecx
and    $0xfe,%ecx
shl    $0xe,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x30(%rcx),%ecx
shl    $0x7,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x34(%rcx),%ecx
and    $0xfe,%ecx
sar    $0x1,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pes_get_pts>:
mov    0x24(%rdi),%eax
mov    0x28(%rdi),%ecx
and    $0xfffffffe,%eax
shl    $0x1d,%eax
shl    $0x16,%ecx
or     %eax,%ecx
mov    0x2c(%rdi),%eax
shl    $0xe,%eax
and    $0x3f8000,%eax
or     %ecx,%eax
mov    0x30(%rdi),%ecx
shl    $0x7,%ecx
or     %eax,%ecx
mov    0x34(%rdi),%eax
shr    %eax
and    $0x7f,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @pes_get_pts(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 9
%5 = load i32, i32* %4
%6 = and i32 %5, 14
%7 = shl i32 %6, 29
%8 = load i32*, i32** %2
%9 = getelementptr inbounds i32, i32* %8, i64 10
%10 = load i32, i32* %9
%11 = shl i32 %10, 22
%12 = or i32 %7, %11
%13 = load i32*, i32** %2
%14 = getelementptr inbounds i32, i32* %13, i64 11
%15 = load i32, i32* %14
%16 = and i32 %15, 254
%17 = shl i32 %16, 14
%18 = or i32 %12, %17
%19 = load i32*, i32** %2
%20 = getelementptr inbounds i32, i32* %19, i64 12
%21 = load i32, i32* %20
%22 = shl i32 %21, 7
%23 = or i32 %18, %22
%24 = load i32*, i32** %2
%25 = getelementptr inbounds i32, i32* %24, i64 13
%26 = load i32, i32* %25
%27 = and i32 %26, 254
%28 = ashr i32 %27, 1
%29 = or i32 %23, %28
ret i32 %29
}

LLVM IR (-O2):
define i32 @pes_get_pts(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 9
%3 = load i32, i32* %2
%4 = shl i32 %3, 29
%5 = and i32 %4, -1073741824
%6 = getelementptr inbounds i32, i32* %0, i64 10
%7 = load i32, i32* %6
%8 = shl i32 %7, 22
%9 = or i32 %5, %8
%10 = getelementptr inbounds i32, i32* %0, i64 11
%11 = load i32, i32* %10
%12 = shl i32 %11, 14
%13 = and i32 %12, 4161536
%14 = or i32 %9, %13
%15 = getelementptr inbounds i32, i32* %0, i64 12
%16 = load i32, i32* %15
%17 = shl i32 %16, 7
%18 = or i32 %14, %17
%19 = getelementptr inbounds i32, i32* %0, i64 13
%20 = load i32, i32* %19
%21 = lshr i32 %20, 1
%22 = and i32 %21, 127
%23 = or i32 %18, %22
ret i32 %23
}
reverse_color(co) int co;
{
  if (co)
    return (0);
  else
    return (1);
}


x86 assembly (clang, -O0):
<reverse_color>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     111d <reverse_color+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    1124 <reverse_color+0x24>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse_color>:
xor    %eax,%eax
test   %edi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @reverse_color(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %8
7: ; preds = %1
store i32 1, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @reverse_color(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
int interpolate(int val, int rangeStart, int rangeEnd, int valStart,
                int valEnd) {
  return (rangeEnd - rangeStart) * (val - valStart) / (valEnd - valStart) +
         rangeStart;
}


x86 assembly (clang, -O0):
<interpolate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    -0xc(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    -0x10(%rbp),%ecx
imul   %ecx,%eax
mov    -0x14(%rbp),%ecx
sub    -0x10(%rbp),%ecx
cltd
idiv   %ecx
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<interpolate>:
mov    %edi,%eax
sub    %esi,%edx
sub    %ecx,%eax
imul   %edx,%eax
sub    %ecx,%r8d
cltd
idiv   %r8d
add    %esi,%eax
ret

LLVM IR (-O0):
define i32 @interpolate(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %8
%12 = load i32, i32* %7
%13 = sub nsw i32 %11, %12
%14 = load i32, i32* %6
%15 = load i32, i32* %9
%16 = sub nsw i32 %14, %15
%17 = mul nsw i32 %13, %16
%18 = load i32, i32* %10
%19 = load i32, i32* %9
%20 = sub nsw i32 %18, %19
%21 = sdiv i32 %17, %20
%22 = load i32, i32* %7
%23 = add nsw i32 %21, %22
ret i32 %23
}

LLVM IR (-O2):
define i32 @interpolate(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = sub nsw i32 %2, %1
%7 = sub nsw i32 %0, %3
%8 = mul nsw i32 %7, %6
%9 = sub nsw i32 %4, %3
%10 = sdiv i32 %8, %9
%11 = add nsw i32 %10, %1
ret i32 %11
}
int main() {
  char *s = "string";
  char st[] = "string";
  s[1] = 'h';
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
lea    0xeee(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xee4(%rip),%eax
mov    %eax,-0x17(%rbp)
mov    0xede(%rip),%ax
mov    %ax,-0x13(%rbp)
mov    0xed6(%rip),%al
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
movb   $0x68,0x1(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [7 x i8] c"string\00"
@__const.main.st = [7 x i8] c"string\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca [7 x i8]
store i32 0, i32* %1
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8** %2
%4 = bitcast [7 x i8]* %3 to i8*
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i64 1
store i8 104, i8* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void WM_Unlock(int *wmlock) {
  if ((*wmlock) != 0) {
    (*wmlock)--;
  }
}


x86 assembly (clang, -O0):
<WM_Unlock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0x0,(%rax)
je     1120 <WM_Unlock+0x20>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
add    $0xffffffff,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<WM_Unlock>:
mov    (%rdi),%eax
test   %eax,%eax
je     110b <WM_Unlock+0xb>
add    $0xffffffff,%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @WM_Unlock(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32*, i32** %2
%8 = load i32, i32* %7
%9 = add nsw i32 %8, -1
store i32 %9, i32* %7
br label %10
10: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
define void @WM_Unlock(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = icmp eq i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = add nsw i32 %2, -1
store i32 %5, i32* %0
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
void *malloc(size_t const);
void *serd_malloc_aligned(const size_t alignment, const size_t size) {
  (void)alignment;
  return malloc(size);
}


x86 assembly (clang, -O0):
<serd_malloc_aligned>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serd_malloc_aligned>:
mov    %rsi,%rdi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @serd_malloc_aligned(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i8* @malloc(i64 %6)
ret i8* %7
}

LLVM IR (-O2):
define noalias i8* @serd_malloc_aligned(i64 %0, i64 %1) {
%3 = tail call i8* @malloc(i64 %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ fd_printf(int, char *);
int write_section_header(int fd) {
  assert(fd > 1 && "Invalid file descriptor");
  fd_printf(fd, "%%%%\n");
  return 0;
}


x86 assembly (clang, -O0):
<write_section_header>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1144 <write_section_header+0x24>
mov    $0x1,%al
mov    %al,-0x5(%rbp)
jmp    1144 <write_section_header+0x24>
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%edi
lea    0xebd(%rip),%rsi
call   1040 <fd_printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_section_header>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
cmp    $0x2,%ebx
setge  %dil
call   1030 <assert@plt>
lea    0xec8(%rip),%rsi
mov    %ebx,%edi
call   1040 <fd_printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [24 x i8] c"Invalid file descriptor\00"
@.str.1 = [6 x i8] c"%%%%\0A\00"
define i32 @write_section_header(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 1
br i1 %4, label %5, label %6
5: ; preds = %1
br label %6
6: ; preds = %5, %1
%7 = phi i1 [ false, %1 ], [ true, %5 ]
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
%10 = load i32, i32* %2
%11 = call i32 @fd_printf(i32 %10, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [6 x i8] c"%%%%\0A\00"
define i32 @write_section_header(i32 %0) {
%2 = icmp sgt i32 %0, 1
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = tail call i32 @fd_printf(i32 %0, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ mat3d_scale_new(double *, double const, double const,
                                   double const);
void mat3d_scaleVec_new(double result[9], const double xyz[3]) {
  mat3d_scale_new(result, xyz[0], xyz[1], xyz[2]);
}


x86 assembly (clang, -O0):
<mat3d_scaleVec_new>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movsd  0x8(%rax),%xmm1
mov    -0x10(%rbp),%rax
movsd  0x10(%rax),%xmm2
call   1030 <mat3d_scale_new@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mat3d_scaleVec_new>:
movsd  (%rsi),%xmm0
movsd  0x8(%rsi),%xmm1
movsd  0x10(%rsi),%xmm2
jmp    1030 <mat3d_scale_new@plt>

LLVM IR (-O0):
define void @mat3d_scaleVec_new(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = load double*, double** %4
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = load double*, double** %4
%10 = getelementptr inbounds double, double* %9, i64 1
%11 = load double, double* %10
%12 = load double*, double** %4
%13 = getelementptr inbounds double, double* %12, i64 2
%14 = load double, double* %13
%15 = call i32 @mat3d_scale_new(double* %5, double %8, double %11, double %14)
ret void
}

LLVM IR (-O2):
define void @mat3d_scaleVec_new(double* %0, double* nocapture %1) {
%3 = load double, double* %1
%4 = getelementptr inbounds double, double* %1, i64 1
%5 = load double, double* %4
%6 = getelementptr inbounds double, double* %1, i64 2
%7 = load double, double* %6
%8 = tail call i32 @mat3d_scale_new(double* %0, double %3, double %5, double %7)
ret void
}
void gl_shader_deinit(void) {}


x86 assembly (clang, -O0):
<gl_shader_deinit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gl_shader_deinit>:
ret

LLVM IR (-O0):
define void @gl_shader_deinit() {
ret void
}

LLVM IR (-O2):
define void @gl_shader_deinit() {
ret void
}
void RTAvlHCPhysGetBestFit(void) {}


x86 assembly (clang, -O0):
<RTAvlHCPhysGetBestFit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvlHCPhysGetBestFit>:
ret

LLVM IR (-O0):
define void @RTAvlHCPhysGetBestFit() {
ret void
}

LLVM IR (-O2):
define void @RTAvlHCPhysGetBestFit() {
ret void
}
/* Variables and functions */
double sqrt(double);
double C1(int n) {
  return (sqrt((double)((n ? 2 : 1) * (2 * n - 1)) /
               (double)((n - 1 ? 2 : 1) * 2 * n)));
}


x86 assembly (clang, -O0):
<C1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0x1,%eax
mov    $0x2,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    -0x4(%rbp),%ecx
shl    $0x1,%ecx
sub    $0x1,%ecx
imul   %ecx,%eax
cvtsi2sd %eax,%xmm0
mov    -0x4(%rbp),%edx
sub    $0x1,%edx
mov    $0x1,%eax
mov    $0x2,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
shl    $0x1,%eax
imul   -0x4(%rbp),%eax
cvtsi2sd %eax,%xmm1
divsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<C1>:
cmp    $0x1,%edi
mov    $0x2,%eax
sbb    $0x0,%eax
xor    %ecx,%ecx
cmp    $0x1,%edi
lea    -0x1(%rdi,%rdi,1),%edx
setne  %cl
imul   %eax,%edx
cvtsi2sd %edx,%xmm0
lea    (%rcx,%rcx,1),%eax
add    $0x2,%eax
imul   %edi,%eax
cvtsi2sd %eax,%xmm1
divsd  %xmm1,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     114e <C1+0x3e>
sqrtsd %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @C1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 2, i32 1
%7 = load i32, i32* %2
%8 = mul nsw i32 2, %7
%9 = sub nsw i32 %8, 1
%10 = mul nsw i32 %6, %9
%11 = sitofp i32 %10 to double
%12 = load i32, i32* %2
%13 = sub nsw i32 %12, 1
%14 = icmp ne i32 %13, 0
%15 = zext i1 %14 to i64
%16 = select i1 %14, i32 2, i32 1
%17 = mul nsw i32 %16, 2
%18 = load i32, i32* %2
%19 = mul nsw i32 %17, %18
%20 = sitofp i32 %19 to double
%21 = fdiv double %11, %20
%22 = call double @sqrt(double %21)
ret double %22
}

LLVM IR (-O2):
define double @C1(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i32 1, i32 2
%4 = shl nsw i32 %0, 1
%5 = add nsw i32 %4, -1
%6 = mul nsw i32 %3, %5
%7 = sitofp i32 %6 to double
%8 = icmp eq i32 %0, 1
%9 = select i1 %8, i32 2, i32 4
%10 = mul nsw i32 %9, %0
%11 = sitofp i32 %10 to double
%12 = fdiv double %7, %11
%13 = tail call double @sqrt(double %12)
ret double %13
}
int test_imm_CAuint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0xCA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CAuint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0xca,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CAuint64_highword_reg>:
movabs $0xca00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CAuint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 202
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_CAuint64_highword_reg(i64 %0) {
%2 = and i64 %0, 867583393792
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t get_msgtype(uint8_t first_byte) {
  uint8_t x = first_byte >> 3;
  if ((x & 0x18) == 0x18) {
    return 24;
  } else {
    return x;
  }
}


x86 assembly (clang, -O0):
<get_msgtype>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x3,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x18,%eax
cmp    $0x18,%eax
jne    112b <get_msgtype+0x2b>
movl   $0x18,-0x4(%rbp)
jmp    1131 <get_msgtype+0x31>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_msgtype>:
mov    %edi,%eax
not    %eax
sar    $0x3,%edi
test   $0xc0,%al
mov    $0x18,%eax
cmovne %edi,%eax
ret

LLVM IR (-O0):
define i32 @get_msgtype(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = ashr i32 %5, 3
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = and i32 %7, 24
%9 = icmp eq i32 %8, 24
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 24, i32* %2
br label %13
11: ; preds = %1
%12 = load i32, i32* %4
store i32 %12, i32* %2
br label %13
13: ; preds = %11, %10
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @get_msgtype(i32 %0) {
%2 = and i32 %0, 192
%3 = icmp eq i32 %2, 192
%4 = ashr i32 %0, 3
%5 = select i1 %3, i32 24, i32 %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printi(int);
int /*<<< orphan*/ prints(char *);
toedit(int count) {
  if (count > 1) {
    printi(count);
    prints(" files to edit; ");
  }
}


x86 assembly (clang, -O0):
<toedit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    1149 <toedit+0x29>
mov    -0x8(%rbp),%edi
call   1030 <printi@plt>
lea    0xebc(%rip),%rdi
call   1040 <prints@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toedit>:
cmp    $0x2,%edi
jl     113b <toedit+0x1b>
push   %rax
call   1030 <printi@plt>
lea    0xece(%rip),%rdi
call   1040 <prints@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
@.str = [17 x i8] c" files to edit; \00"
define i32 @toedit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 1
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = call i32 @printi(i32 %7)
%9 = call i32 @prints(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %6, %1
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@.str = [17 x i8] c" files to edit; \00"
define i32 @toedit(i32 %0) {
%2 = icmp sgt i32 %0, 1
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = tail call i32 @printi(i32 %0)
%5 = tail call i32 @prints(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %3, %1
ret i32 undef
}
long kernel__Float__to_i(double self) {
  long var;
  long var1;
  var1 = (long)self;
  var = var1;
  goto RET_LABEL;
RET_LABEL:;
  return var;
}


x86 assembly (clang, -O0):
<kernel__Float__to_i>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
cvttsd2si -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kernel__Float__to_i>:
cvttsd2si %xmm0,%rax
ret

LLVM IR (-O0):
define i64 @kernel__Float__to_i(double %0) {
%2 = alloca double
%3 = alloca i64
%4 = alloca i64
store double %0, double* %2
%5 = load double, double* %2
%6 = fptosi double %5 to i64
store i64 %6, i64* %4
%7 = load i64, i64* %4
store i64 %7, i64* %3
br label %8
8: ; preds = %1
%9 = load i64, i64* %3
ret i64 %9
}

LLVM IR (-O2):
define i64 @kernel__Float__to_i(double %0) {
%2 = fptosi double %0 to i64
ret i64 %2
}
extern unsigned int __inl(unsigned short port) {
  unsigned int _v;
  __asm__ __volatile__("in"
                       "l"
                       " %"
                       "w"
                       "1,%"
                       ""
                       "0"
                       : "=a"(_v)
                       : "d"(port));
  return _v;
}


x86 assembly (clang, -O0):
<__inl>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__inl>:
mov    %edi,%edx
in     (%dx),%eax
ret

LLVM IR (-O0):
define i32 @__inl(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i32
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i32 asm sideeffect "inl ${1:w},$0", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @__inl(i16 zeroext %0) {
%2 = tail call i32 asm sideeffect "inl ${1:w},$0", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i32 %2
}
/* Variables and functions */
scalar_t__ malloc(long);
int /*<<< orphan*/ nrerror(char *);
int *ivector(long nl, long nh) {
  int *v;
  v = (int *)malloc(((nh - nl + 1 + 1) * sizeof(int)));
  if (!v)
    nrerror("Error(ivector): allocation failure\n");
  return v - nl + 1;
}


x86 assembly (clang, -O0):
<ivector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
sub    -0x8(%rbp),%rdi
add    $0x1,%rdi
add    $0x1,%rdi
shl    $0x2,%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1164 <ivector+0x44>
lea    0xea1(%rip),%rdi
call   1030 <nrerror@plt>
mov    -0x18(%rbp),%rax
xor    %ecx,%ecx
sub    -0x8(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
add    $0x4,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ivector>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
sub    %rdi,%rsi
lea    0x8(,%rsi,4),%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    114b <ivector+0x2b>
lea    0xeba(%rip),%rdi
call   1030 <nrerror@plt>
shl    $0x2,%r14
sub    %r14,%rbx
add    $0x4,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [36 x i8] c"Error(ivector): allocation failure\0A\00"
define i32* @ivector(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i32*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = load i64, i64* %3
%8 = sub nsw i64 %6, %7
%9 = add nsw i64 %8, 1
%10 = add nsw i64 %9, 1
%11 = mul i64 %10, 4
%12 = call i64 @malloc(i64 %11)
%13 = inttoptr i64 %12 to i32*
store i32* %13, i32** %5
%14 = load i32*, i32** %5
%15 = icmp ne i32* %14, null
br i1 %15, label %18, label %16
16: ; preds = %2
%17 = call i32 @nrerror(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
br label %18
18: ; preds = %16, %2
%19 = load i32*, i32** %5
%20 = load i64, i64* %3
%21 = sub i64 0, %20
%22 = getelementptr inbounds i32, i32* %19, i64 %21
%23 = getelementptr inbounds i32, i32* %22, i64 1
ret i32* %23
}

LLVM IR (-O2):
@.str = [36 x i8] c"Error(ivector): allocation failure\0A\00"
define i32* @ivector(i64 %0, i64 %1) {
%3 = sub nsw i64 %1, %0
%4 = shl i64 %3, 2
%5 = add i64 %4, 8
%6 = tail call i64 @malloc(i64 %5)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 @nrerror(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %2
%11 = inttoptr i64 %6 to i32*
%12 = sub i64 0, %0
%13 = getelementptr inbounds i32, i32* %11, i64 %12
%14 = getelementptr inbounds i32, i32* %13, i64 1
ret i32* %14
}
__typeof__(isalpha(1)) test_isalpha_13(void) { return isalpha(1); }


x86 assembly (clang, -O0):
<test_isalpha_13>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <isalpha@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_isalpha_13>:
mov    $0x1,%edi
jmp    1030 <isalpha@plt>

LLVM IR (-O0):
define i32 @test_isalpha_13() {
%1 = call i32 @isalpha(i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @test_isalpha_13() {
%1 = tail call i32 @isalpha(i32 1)
ret i32 %1
}
/* Variables and functions */
int GLUT_UP;
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ stderr;
void sbutton(int button, int state) {
  fprintf(stderr, "Spaceball button %d is %s\n", button,
          state == GLUT_UP ? "up" : "down");
}


x86 assembly (clang, -O0):
<sbutton>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    0x2ebb(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%esi
mov    0x2ea4(%rip),%rax
mov    (%rax),%r8d
lea    0xee0(%rip),%rcx
lea    0xed6(%rip),%rax
cmp    %r8d,%esi
cmove  %rax,%rcx
lea    0xead(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sbutton>:
mov    %edi,%edx
mov    0x2ec7(%rip),%rax
mov    (%rax),%edi
mov    0x2eb6(%rip),%rax
cmp    %esi,(%rax)
lea    0xef0(%rip),%rax
lea    0xeec(%rip),%rcx
cmove  %rax,%rcx
lea    0xec3(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [27 x i8] c"Spaceball button %d is %s\0A\00"
@GLUT_UP = global i32 0
@.str.1 = [3 x i8] c"up\00"
@.str.2 = [5 x i8] c"down\00"
define void @sbutton(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = load i32, i32* @GLUT_UP
%9 = icmp eq i32 %7, %8
%10 = zext i1 %9 to i64
%11 = select i1 %9, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0)
%12 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %6, i8* %11)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [27 x i8] c"Spaceball button %d is %s\0A\00"
@GLUT_UP = global i32 0
@.str.1 = [3 x i8] c"up\00"
@.str.2 = [5 x i8] c"down\00"
define void @sbutton(i32 %0, i32 %1) {
%3 = load i32, i32* @stderr
%4 = load i32, i32* @GLUT_UP
%5 = icmp eq i32 %4, %1
%6 = select i1 %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0)
%7 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %0, i8* %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ expect_true_failed(int, char const *, int);
int /*<<< orphan*/ expectation_passed();
void _expect_true(int act, const char *file, int line) {
  if ((act) == 0)
    expect_true_failed(act, file, line);
  else
    expectation_passed();
}


x86 assembly (clang, -O0):
<_expect_true>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1150 <_expect_true+0x30>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <expect_true_failed@plt>
jmp    1157 <_expect_true+0x37>
mov    $0x0,%al
call   1030 <expectation_passed@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_expect_true>:
test   %edi,%edi
je     112b <_expect_true+0xb>
xor    %eax,%eax
jmp    1030 <expectation_passed@plt>
xor    %edi,%edi
jmp    1040 <expect_true_failed@plt>

LLVM IR (-O0):
define void @_expect_true(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %3
%10 = load i32, i32* %4
%11 = load i8*, i8** %5
%12 = load i32, i32* %6
%13 = call i32 @expect_true_failed(i32 %10, i8* %11, i32 %12)
br label %16
14: ; preds = %3
%15 = call i32 (...) @expectation_passed()
br label %16
16: ; preds = %14, %9
ret void
}

LLVM IR (-O2):
define void @_expect_true(i32 %0, i8* %1, i32 %2) {
%4 = icmp eq i32 %0, 0
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 @expect_true_failed(i32 0, i8* %1, i32 %2)
br label %9
7: ; preds = %3
%8 = tail call i32 (...) @expectation_passed()
br label %9
9: ; preds = %7, %5
ret void
}
/* Variables and functions */
float RAND_MAX;
scalar_t__ rand();
unsigned int pos_rand(unsigned int min, unsigned int max) {
  return ((float)rand() / RAND_MAX) * (max - min) + min;
}


x86 assembly (clang, -O0):
<pos_rand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2ss %rax,%xmm0
mov    0x2eb7(%rip),%rax
movss  (%rax),%xmm1
divss  %xmm1,%xmm0
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
mov    %eax,%edx
sub    %edx,%ecx
cvtsi2ss %rcx,%xmm2
cvtsi2ss %rax,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
cvttss2si %xmm0,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pos_rand>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2ss %rax,%xmm0
mov    0x2ebe(%rip),%rax
divss  (%rax),%xmm0
sub    %ebp,%ebx
cvtsi2ss %rbx,%xmm1
mov    %ebp,%eax
cvtsi2ss %rax,%xmm2
mulss  %xmm0,%xmm1
addss  %xmm1,%xmm2
cvttss2si %xmm2,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@RAND_MAX = global float 0.000000e+00
define i32 @pos_rand(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i64 (...) @rand()
%6 = sitofp i64 %5 to float
%7 = load float, float* @RAND_MAX
%8 = fdiv float %6, %7
%9 = load i32, i32* %4
%10 = load i32, i32* %3
%11 = sub i32 %9, %10
%12 = uitofp i32 %11 to float
%13 = load i32, i32* %3
%14 = uitofp i32 %13 to float
%15 = call float @llvm.fmuladd.f32(float %8, float %12, float %14)
%16 = fptoui float %15 to i32
ret i32 %16
}

LLVM IR (-O2):
@RAND_MAX = global float 0.000000e+00
define i32 @pos_rand(i32 %0, i32 %1) {
%3 = tail call i64 (...) @rand()
%4 = sitofp i64 %3 to float
%5 = load float, float* @RAND_MAX
%6 = fdiv float %4, %5
%7 = sub i32 %1, %0
%8 = uitofp i32 %7 to float
%9 = uitofp i32 %0 to float
%10 = tail call float @llvm.fmuladd.f32(float %6, float %8, float %9)
%11 = fptoui float %10 to i32
ret i32 %11
}
/* Variables and functions */
int printw(char const *, int, int);
int ii_printw(const char *fmt, int i, int j) { return (printw(fmt, i, j)); }


x86 assembly (clang, -O0):
<ii_printw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <printw@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ii_printw>:
jmp    1030 <printw@plt>

LLVM IR (-O0):
define i32 @ii_printw(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @printw(i8* %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @ii_printw(i8* %0, i32 %1, i32 %2) {
%4 = tail call i32 @printw(i8* %0, i32 %1, i32 %2)
ret i32 %4
}
/* Type definitions */
typedef int uint32_t;
typedef unsigned long uint16_t;
typedef int ui32Base;

/* Variables and functions */
void PWMDeadBandEnable(uint32_t ui32Base, uint32_t ui32Gen, uint16_t ui16Rise,
                       uint16_t ui16Fall) {
  ;
  ;
  ;
  ;
  ui32Gen = ((ui32Base) + (ui32Gen));
  (*((volatile unsigned long *)(ui32Gen + 0x0000002C))) = ui16Rise;
  (*((volatile unsigned long *)(ui32Gen + 0x00000030))) = ui16Fall;
  (*((volatile unsigned long *)(ui32Gen + 0x00000028))) |= 0x00000001;
}


x86 assembly (clang, -O0):
<PWMDeadBandEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%eax
add    $0x2c,%eax
cltq
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%eax
add    $0x30,%eax
cltq
mov    %rcx,(%rax)
mov    -0x8(%rbp),%eax
add    $0x28,%eax
cltq
mov    (%rax),%rcx
or     $0x1,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMDeadBandEnable>:
movslq %esi,%rax
movslq %edi,%rsi
mov    %rdx,0x2c(%rax,%rsi,1)
mov    %rcx,0x30(%rax,%rsi,1)
orq    $0x1,0x28(%rax,%rsi,1)
ret

LLVM IR (-O0):
define void @PWMDeadBandEnable(i32 %0, i32 %1, i64 %2, i64 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i64
%8 = alloca i64
store i32 %0, i32* %5
store i32 %1, i32* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = add nsw i32 %9, %10
store i32 %11, i32* %6
%12 = load i64, i64* %7
%13 = load i32, i32* %6
%14 = add nsw i32 %13, 44
%15 = sext i32 %14 to i64
%16 = inttoptr i64 %15 to i64*
store volatile i64 %12, i64* %16
%17 = load i64, i64* %8
%18 = load i32, i32* %6
%19 = add nsw i32 %18, 48
%20 = sext i32 %19 to i64
%21 = inttoptr i64 %20 to i64*
store volatile i64 %17, i64* %21
%22 = load i32, i32* %6
%23 = add nsw i32 %22, 40
%24 = sext i32 %23 to i64
%25 = inttoptr i64 %24 to i64*
%26 = load volatile i64, i64* %25
%27 = or i64 %26, 1
store volatile i64 %27, i64* %25
ret void
}

LLVM IR (-O2):
define void @PWMDeadBandEnable(i32 %0, i32 %1, i64 %2, i64 %3) {
%5 = add nsw i32 %1, %0
%6 = add nsw i32 %5, 44
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i64*
store volatile i64 %2, i64* %8
%9 = add nsw i32 %5, 48
%10 = sext i32 %9 to i64
%11 = inttoptr i64 %10 to i64*
store volatile i64 %3, i64* %11
%12 = add nsw i32 %5, 40
%13 = sext i32 %12 to i64
%14 = inttoptr i64 %13 to i64*
%15 = load volatile i64, i64* %14
%16 = or i64 %15, 1
store volatile i64 %16, i64* %14
ret void
}