#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int fn_sq_qtg_1_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102_qtg_0_4294967295_sq_ch_47_qtg_0_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102(
    char const *);
int fn_qtg_0_1_sq_qtg_1_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102_qtg_0_4294967295_sq_ch_47_qtg_0_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102(
    const char *text) {
  int pos = 0, p = 0, count = 0;
  while (
      count < 1 &&
      (p = fn_sq_qtg_1_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102_qtg_0_4294967295_sq_ch_47_qtg_0_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102(
           text + pos)) != -1) {
    pos += p;
    count++;
  }
  if (count >= 0)
    return pos;
  return -1;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0x1c(%rbp)
mov    %al,-0x1d(%rbp)
jge    115c <fn_qtg_0_1_sq_qtg_1_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102_qtg_0_4294967295_sq_ch_47_qtg_0_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102+0x4c>
mov    -0x10(%rbp),%rdi
movslq -0x14(%rbp),%rax
add    %rax,%rdi
call   1030 <fn_sq_qtg_1_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102_qtg_0_4294967295_sq_ch_47_qtg_0_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102@plt>
mov    %eax,-0x18(%rbp)
cmp    $0xffffffff,%eax
setne  %al
mov    %al,-0x1d(%rbp)
mov    -0x1d(%rbp),%al
test   $0x1,%al
jne    116c <fn_qtg_0_1_sq_qtg_1_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102_qtg_0_4294967295_sq_ch_47_qtg_0_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102+0x5c>
jmp    1183 <fn_qtg_0_1_sq_qtg_1_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102_qtg_0_4294967295_sq_ch_47_qtg_0_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102+0x73>
mov    -0x18(%rbp),%eax
add    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1131 <fn_qtg_0_1_sq_qtg_1_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102_qtg_0_4294967295_sq_ch_47_qtg_0_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102+0x21>
cmpl   $0x0,-0x1c(%rbp)
jl     1198 <fn_qtg_0_1_sq_qtg_1_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102_qtg_0_4294967295_sq_ch_47_qtg_0_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102+0x88>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    119f <fn_qtg_0_1_sq_qtg_1_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102_qtg_0_4294967295_sq_ch_47_qtg_0_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102+0x8f>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
call   1030 <fn_sq_qtg_1_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102_qtg_0_4294967295_sq_ch_47_qtg_0_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
cmove  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fn_qtg_0_1_sq_qtg_1_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102_qtg_0_4294967295_sq_ch_47_qtg_0_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
store i32 0, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %19, %1
%8 = load i32, i32* %6
%9 = icmp slt i32 %8, 1
br i1 %9, label %10, label %17
10: ; preds = %7
%11 = load i8*, i8** %3
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = call i32 @fn_sq_qtg_1_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102_qtg_0_4294967295_sq_ch_47_qtg_0_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102(i8* %14)
store i32 %15, i32* %5
%16 = icmp ne i32 %15, -1
br label %17
17: ; preds = %10, %7
%18 = phi i1 [ false, %7 ], [ %16, %10 ]
br i1 %18, label %19, label %25
19: ; preds = %17
%20 = load i32, i32* %5
%21 = load i32, i32* %4
%22 = add nsw i32 %21, %20
store i32 %22, i32* %4
%23 = load i32, i32* %6
%24 = add nsw i32 %23, 1
store i32 %24, i32* %6
br label %7
25: ; preds = %17
%26 = load i32, i32* %6
%27 = icmp sge i32 %26, 0
br i1 %27, label %28, label %30
28: ; preds = %25
%29 = load i32, i32* %4
store i32 %29, i32* %2
br label %31
30: ; preds = %25
store i32 -1, i32* %2
br label %31
31: ; preds = %30, %28
%32 = load i32, i32* %2
ret i32 %32
}

LLVM IR (-O2):
define i32 @fn_qtg_0_1_sq_qtg_1_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102_qtg_0_4294967295_sq_ch_47_qtg_0_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102(i8* %0) {
%2 = tail call i32 @fn_sq_qtg_1_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102_qtg_0_4294967295_sq_ch_47_qtg_0_4294967295_al_sq_cl_33_33_36_36_38_46_48_59_61_61_64_91_95_95_97_122_126_126_160_55295_63744_64975_65008_65519_65533_65533_65536_131069_131072_196605_196608_262141_262144_327677_327680_393213_393216_458749_458752_524285_524288_589821_589824_655357_655360_720893_720896_786429_786432_851965_851968_917501_917504_983037_sq_ch_37_qtg_2_2_cl_48_57_65_70_91_91_97_102(i8* %0)
%3 = icmp eq i32 %2, -1
%4 = select i1 %3, i32 0, i32 %2
ret i32 %4
}