xunge/DecIR huggingface dataset:
int is_upper(char c) { return c < 91 && c > 64; }


x86 assembly (clang, -O0):
<is_upper>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x5b,%ecx
mov    %al,-0x2(%rbp)
jge    1129 <is_upper+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x40,%eax
setg   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_upper>:
add    $0xbf,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_upper(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp slt i32 %4, 91
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sgt i32 %8, 64
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_upper(i8 signext %0) {
%2 = add i8 %0, -65
%3 = icmp ult i8 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
void hp_format(const char *fmt, ...) {}


x86 assembly (clang, -O0):
<hp_format>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<hp_format>:
ret

LLVM IR (-O0):
define void @hp_format(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @hp_format(i8* nocapture %0, ...) {
ret void
}
/* Variables and functions */
int strlen(const char *str) {
  int len = 0;
  while (*str++)
    len++;
  return len;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,(%rax)
je     1135 <strlen+0x35>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <strlen+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
cmpb   $0x0,(%rdi)
je     111c <strlen+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <strlen+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @strlen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add nuw nsw i32 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %12
}
void opcode_eb() {}


x86 assembly (clang, -O0):
<opcode_eb>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<opcode_eb>:
ret

LLVM IR (-O0):
define void @opcode_eb() {
ret void
}

LLVM IR (-O2):
define void @opcode_eb() {
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int solcon_write_solution_banner_to_defined_output_file(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(139, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_write_solution_banner_to_defined_output_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x8b,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_write_solution_banner_to_defined_output_file>:
mov    $0x8b,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @solcon_write_solution_banner_to_defined_output_file() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 139, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @solcon_write_solution_banner_to_defined_output_file() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 139, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
int test_int_8(int a, int b, int c, int d, int e, int f, int g, int h) {
  return 214322534;
}


x86 assembly (clang, -O0):
<test_int_8>:
push   %rbp
mov    %rsp,%rbp
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    $0xcc64d66,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_int_8>:
mov    $0xcc64d66,%eax
ret

LLVM IR (-O0):
define i32 @test_int_8(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) {
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
store i32 %0, i32* %9
store i32 %1, i32* %10
store i32 %2, i32* %11
store i32 %3, i32* %12
store i32 %4, i32* %13
store i32 %5, i32* %14
store i32 %6, i32* %15
store i32 %7, i32* %16
ret i32 214322534
}

LLVM IR (-O2):
define i32 @test_int_8(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) {
ret i32 214322534
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void usage(char *arg0) { printf("usage: %s USEC\n", arg0); }


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"usage: %s USEC\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"usage: %s USEC\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void console_bgcolour(int colour) { printf("%c[;;%dm", 0x1B, colour + 10); }


x86 assembly (clang, -O0):
<console_bgcolour>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
add    $0xa,%edx
lea    0xed8(%rip),%rdi
mov    $0x1b,%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<console_bgcolour>:
lea    0xa(%rdi),%edx
lea    0xee6(%rip),%rdi
mov    $0x1b,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"%c[;;%dm\00"
define void @console_bgcolour(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 10
%5 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 27, i32 %4)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"%c[;;%dm\00"
define void @console_bgcolour(i32 %0) {
%2 = add nsw i32 %0, 10
%3 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 27, i32 %2)
ret void
}
int test_imm_59int8_mem(signed char *val) {
  return ((*val) & (0x59 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_59int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0x59,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_59int8_mem>:
testb  $0x59,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_59int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 89
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_59int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 89
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int dct_unlock(int write) { return 0; }


x86 assembly (clang, -O0):
<dct_unlock>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dct_unlock>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dct_unlock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @dct_unlock(i32 %0) {
ret i32 0
}
void RandomFunc(unsigned long input[1], unsigned long output[1]) {
  unsigned long state[1];
  unsigned long local1;
  {
    state[0UL] = input[0UL] + 0xffffffffff660b45UL;
    local1 = 0UL;
    while (local1 < 0UL) {
      state[local1] += state[local1];
      local1 += 2UL;
    }
    output[0UL] = state[0UL] - 0xffffffffda4ab609UL;
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
add    $0xffffffffff660b45,%rax
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jae    1158 <RandomFunc+0x58>
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp,%rax,8),%rcx
mov    -0x20(%rbp),%rax
add    -0x18(%rbp,%rax,8),%rcx
mov    %rcx,-0x18(%rbp,%rax,8)
mov    -0x20(%rbp),%rax
add    $0x2,%rax
mov    %rax,-0x20(%rbp)
jmp    1125 <RandomFunc+0x25>
mov    -0x18(%rbp),%rcx
sub    $0xffffffffda4ab609,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
mov    $0x251b553c,%eax
add    (%rdi),%rax
mov    %rax,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i64* %0, i64* %1) {
%3 = alloca i64*
%4 = alloca i64*
%5 = alloca [1 x i64]
%6 = alloca i64
store i64* %0, i64** %3
store i64* %1, i64** %4
%7 = load i64*, i64** %3
%8 = getelementptr inbounds i64, i64* %7, i64 0
%9 = load i64, i64* %8
%10 = add i64 %9, -10089659
%11 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
store i64 %10, i64* %11
store i64 0, i64* %6
br label %12
12: ; preds = %15, %2
%13 = load i64, i64* %6
%14 = icmp ult i64 %13, 0
br i1 %14, label %15, label %25
15: ; preds = %12
%16 = load i64, i64* %6
%17 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 %16
%18 = load i64, i64* %17
%19 = load i64, i64* %6
%20 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 %19
%21 = load i64, i64* %20
%22 = add i64 %21, %18
store i64 %22, i64* %20
%23 = load i64, i64* %6
%24 = add i64 %23, 2
store i64 %24, i64* %6
br label %12
25: ; preds = %12
%26 = getelementptr inbounds [1 x i64], [1 x i64]* %5, i64 0, i64 0
%27 = load i64, i64* %26
%28 = sub i64 %27, -632637943
%29 = load i64*, i64** %4
%30 = getelementptr inbounds i64, i64* %29, i64 0
store i64 %28, i64* %30
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i64* nocapture %0, i64* nocapture writeonly %1) {
%3 = load i64, i64* %0
%4 = add i64 %3, 622548284
store i64 %4, i64* %1
ret void
}
void maybe_kill_orphan_engine() {}


x86 assembly (clang, -O0):
<maybe_kill_orphan_engine>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<maybe_kill_orphan_engine>:
ret

LLVM IR (-O0):
define void @maybe_kill_orphan_engine() {
ret void
}

LLVM IR (-O2):
define void @maybe_kill_orphan_engine() {
ret void
}
unsigned int LE32(unsigned int x) {
  unsigned int n = (unsigned char)x;
  n <<= 8;
  n |= (unsigned char)(x >> 8);
  n <<= 8;
  n |= (unsigned char)(x >> 16);
  return (n << 8) | (unsigned char)(x >> 24);
}


x86 assembly (clang, -O0):
<LE32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x8,%eax
movzbl %al,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x10,%eax
movzbl %al,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x8,%eax
mov    -0x4(%rbp),%ecx
shr    $0x18,%ecx
movzbl %cl,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LE32>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @LE32(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = trunc i32 %4 to i8
%6 = zext i8 %5 to i32
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = shl i32 %7, 8
store i32 %8, i32* %3
%9 = load i32, i32* %2
%10 = lshr i32 %9, 8
%11 = trunc i32 %10 to i8
%12 = zext i8 %11 to i32
%13 = load i32, i32* %3
%14 = or i32 %13, %12
store i32 %14, i32* %3
%15 = load i32, i32* %3
%16 = shl i32 %15, 8
store i32 %16, i32* %3
%17 = load i32, i32* %2
%18 = lshr i32 %17, 16
%19 = trunc i32 %18 to i8
%20 = zext i8 %19 to i32
%21 = load i32, i32* %3
%22 = or i32 %21, %20
store i32 %22, i32* %3
%23 = load i32, i32* %3
%24 = shl i32 %23, 8
%25 = load i32, i32* %2
%26 = lshr i32 %25, 24
%27 = trunc i32 %26 to i8
%28 = zext i8 %27 to i32
%29 = or i32 %24, %28
ret i32 %29
}

LLVM IR (-O2):
define i32 @LE32(i32 %0) {
%2 = tail call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
int devm_of_pci_bridge_init(struct device *dev,
                            struct pci_host_bridge *bridge) {
  return 0;
}


x86 assembly (clang, -O0):
<devm_of_pci_bridge_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<devm_of_pci_bridge_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.device = type opaque
%struct.pci_host_bridge = type opaque
define i32 @devm_of_pci_bridge_init(%struct.device* %0, %struct.pci_host_bridge* %1) {
%3 = alloca %struct.device*
%4 = alloca %struct.pci_host_bridge*
store %struct.device* %0, %struct.device** %3
store %struct.pci_host_bridge* %1, %struct.pci_host_bridge** %4
ret i32 0
}

LLVM IR (-O2):
%struct.device = type opaque
%struct.pci_host_bridge = type opaque
define i32 @devm_of_pci_bridge_init(%struct.device* nocapture readnone %0, %struct.pci_host_bridge* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int get_seed(int *seed) {
  int *b, fail;
  double *c;
  fail = _ada_use_c2phc(997, seed, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<get_seed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x3e5,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_seed>:
mov    %rdi,%rsi
mov    $0x3e5,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @get_seed(i32* %0) {
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca i32
%5 = alloca double*
store i32* %0, i32** %2
%6 = load i32*, i32** %2
%7 = load i32*, i32** %3
%8 = load double*, double** %5
%9 = call i32 @_ada_use_c2phc(i32 997, i32* %6, i32* %7, double* %8)
store i32 %9, i32* %4
%10 = load i32, i32* %4
ret i32 %10
}

LLVM IR (-O2):
define i32 @get_seed(i32* %0) {
%2 = tail call i32 @_ada_use_c2phc(i32 997, i32* %0, i32* undef, double* undef)
ret i32 %2
}
float quat_length_squared(float *a) {
  return a[0] * a[0] + a[1] * a[1] + a[2] * a[2] + a[3] * a[3];
}


x86 assembly (clang, -O0):
<quat_length_squared>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm1
mov    -0x8(%rbp),%rax
mulss  0x4(%rax),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm1
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm2
mulss  %xmm2,%xmm1
addss  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movss  0xc(%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  0xc(%rax),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<quat_length_squared>:
movss  (%rdi),%xmm0
movss  0x4(%rdi),%xmm1
mulss  %xmm1,%xmm1
mulss  %xmm0,%xmm0
addss  %xmm1,%xmm0
movss  0x8(%rdi),%xmm1
mulss  %xmm1,%xmm1
addss  %xmm0,%xmm1
movss  0xc(%rdi),%xmm0
mulss  %xmm0,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @quat_length_squared(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 0
%5 = load float, float* %4
%6 = load float*, float** %2
%7 = getelementptr inbounds float, float* %6, i64 0
%8 = load float, float* %7
%9 = load float*, float** %2
%10 = getelementptr inbounds float, float* %9, i64 1
%11 = load float, float* %10
%12 = load float*, float** %2
%13 = getelementptr inbounds float, float* %12, i64 1
%14 = load float, float* %13
%15 = fmul float %11, %14
%16 = call float @llvm.fmuladd.f32(float %5, float %8, float %15)
%17 = load float*, float** %2
%18 = getelementptr inbounds float, float* %17, i64 2
%19 = load float, float* %18
%20 = load float*, float** %2
%21 = getelementptr inbounds float, float* %20, i64 2
%22 = load float, float* %21
%23 = call float @llvm.fmuladd.f32(float %19, float %22, float %16)
%24 = load float*, float** %2
%25 = getelementptr inbounds float, float* %24, i64 3
%26 = load float, float* %25
%27 = load float*, float** %2
%28 = getelementptr inbounds float, float* %27, i64 3
%29 = load float, float* %28
%30 = call float @llvm.fmuladd.f32(float %26, float %29, float %23)
ret float %30
}

LLVM IR (-O2):
define float @quat_length_squared(float* nocapture %0) {
%2 = load float, float* %0
%3 = getelementptr inbounds float, float* %0, i64 1
%4 = load float, float* %3
%5 = fmul float %4, %4
%6 = tail call float @llvm.fmuladd.f32(float %2, float %2, float %5)
%7 = getelementptr inbounds float, float* %0, i64 2
%8 = load float, float* %7
%9 = tail call float @llvm.fmuladd.f32(float %8, float %8, float %6)
%10 = getelementptr inbounds float, float* %0, i64 3
%11 = load float, float* %10
%12 = tail call float @llvm.fmuladd.f32(float %11, float %11, float %9)
ret float %12
}
void mmu_setup(void) { return; }


x86 assembly (clang, -O0):
<mmu_setup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmu_setup>:
ret

LLVM IR (-O0):
define void @mmu_setup() {
ret void
}

LLVM IR (-O2):
define void @mmu_setup() {
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
bool log_sense_data_saved(uint8_t *data) { return data[0] & 0x80; }


x86 assembly (clang, -O0):
<log_sense_data_saved>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0x80,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_sense_data_saved>:
mov    $0x80,%eax
and    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @log_sense_data_saved(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = and i32 %5, 128
ret i32 %6
}

LLVM IR (-O2):
define i32 @log_sense_data_saved(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 128
ret i32 %3
}
long long bit30() { return 0x0000000040000000LL; }


x86 assembly (clang, -O0):
<bit30>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40000000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit30>:
mov    $0x40000000,%eax
ret

LLVM IR (-O0):
define i64 @bit30() {
ret i64 1073741824
}

LLVM IR (-O2):
define i64 @bit30() {
ret i64 1073741824
}
/* Type definitions */
struct threadpool {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _serial_destroy(struct threadpool *);
void threadpool_destroy(struct threadpool *self) { _serial_destroy(self); }


x86 assembly (clang, -O0):
<threadpool_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_serial_destroy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<threadpool_destroy>:
jmp    1030 <_serial_destroy@plt>

LLVM IR (-O0):
%struct.threadpool = type { i32 }
define void @threadpool_destroy(%struct.threadpool* %0) {
%2 = alloca %struct.threadpool*
store %struct.threadpool* %0, %struct.threadpool** %2
%3 = load %struct.threadpool*, %struct.threadpool** %2
%4 = call i32 @_serial_destroy(%struct.threadpool* %3)
ret void
}

LLVM IR (-O2):
%struct.threadpool = type { i32 }
define void @threadpool_destroy(%struct.threadpool* %0) {
%2 = tail call i32 @_serial_destroy(%struct.threadpool* %0)
ret void
}
/* Variables and functions */
size_t pow(int, size_t);
size_t sumOfPowerOfTwoIndex(size_t);
size_t nextSumOfPowersOf2(size_t n) {
  size_t index = sumOfPowerOfTwoIndex(n);
  return n + pow(2, index);
}


x86 assembly (clang, -O0):
<nextSumOfPowersOf2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <sumOfPowerOfTwoIndex@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rsi
mov    $0x2,%edi
call   1040 <pow@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nextSumOfPowersOf2>:
push   %rbx
mov    %rdi,%rbx
call   1030 <sumOfPowerOfTwoIndex@plt>
mov    $0x2,%edi
mov    %rax,%rsi
call   1040 <pow@plt>
add    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @nextSumOfPowersOf2(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i64 @sumOfPowerOfTwoIndex(i64 %4)
store i64 %5, i64* %3
%6 = load i64, i64* %2
%7 = load i64, i64* %3
%8 = call i64 @pow(i32 2, i64 %7)
%9 = add i64 %6, %8
ret i64 %9
}

LLVM IR (-O2):
define i64 @nextSumOfPowersOf2(i64 %0) {
%2 = tail call i64 @sumOfPowerOfTwoIndex(i64 %0)
%3 = tail call i64 @pow(i32 2, i64 %2)
%4 = add i64 %3, %0
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("hello from app\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"hello from app\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [15 x i8] c"hello from app\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
unsigned int hash_func_int64_t(void *ptr) {
  int64_t v = *((int64_t *)ptr);
  if (sizeof(int64_t) > sizeof(unsigned int))
    return v ^ (v >> 32);
  else
    return v;
}


x86 assembly (clang, -O0):
<hash_func_int64_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_func_int64_t>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @hash_func_int64_t(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
%6 = load i32, i32* %5
store i32 %6, i32* %3
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @hash_func_int64_t(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ add_event_all(int, char const *);
void status_msg(const char *msg) { add_event_all(0x0f, msg); }


x86 assembly (clang, -O0):
<status_msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0xf,%edi
call   1030 <add_event_all@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<status_msg>:
mov    %rdi,%rsi
mov    $0xf,%edi
jmp    1030 <add_event_all@plt>

LLVM IR (-O0):
define void @status_msg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @add_event_all(i32 15, i8* %3)
ret void
}

LLVM IR (-O2):
define void @status_msg(i8* %0) {
%2 = tail call i32 @add_event_all(i32 15, i8* %0)
ret void
}
/* Variables and functions */
bool nrf51_errata_51(void) { return false; }


x86 assembly (clang, -O0):
<nrf51_errata_51>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf51_errata_51>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf51_errata_51() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf51_errata_51() {
ret i32 0
}
void ff_hevc_put_hevc_uni_w_qpel_v48_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_qpel_v48_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_qpel_v48_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_qpel_v48_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_qpel_v48_12_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cppUngetc(int const);
int /*<<< orphan*/ skipToMatch(char *);
int skipToNonWhite();
void skipBraces() {
  const int c = skipToNonWhite();
  if (c == '{')
    skipToMatch("{}");
  else
    cppUngetc(c);
}


x86 assembly (clang, -O0):
<skipBraces>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <skipToNonWhite@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x7b,-0x4(%rbp)
jne    115d <skipBraces+0x2d>
lea    0xead(%rip),%rdi
call   1040 <skipToMatch@plt>
jmp    1165 <skipBraces+0x35>
mov    -0x4(%rbp),%edi
call   1050 <cppUngetc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skipBraces>:
push   %rax
xor    %eax,%eax
call   1030 <skipToNonWhite@plt>
cmp    $0x7b,%eax
jne    114a <skipBraces+0x1a>
lea    0xebc(%rip),%rdi
pop    %rax
jmp    1040 <skipToMatch@plt>
mov    %eax,%edi
pop    %rax
jmp    1050 <cppUngetc@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"{}\00"
define void @skipBraces() {
%1 = alloca i32
%2 = call i32 (...) @skipToNonWhite()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, 123
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 @skipToMatch(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
br label %10
7: ; preds = %0
%8 = load i32, i32* %1
%9 = call i32 @cppUngetc(i32 %8)
br label %10
10: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"{}\00"
define void @skipBraces() {
%1 = tail call i32 (...) @skipToNonWhite()
%2 = icmp eq i32 %1, 123
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @skipToMatch(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
br label %7
5: ; preds = %0
%6 = tail call i32 @cppUngetc(i32 %1)
br label %7
7: ; preds = %5, %3
ret void
}
int execute_clock_nanosleep() { return 0; }


x86 assembly (clang, -O0):
<execute_clock_nanosleep>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_clock_nanosleep>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_clock_nanosleep() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_clock_nanosleep() {
ret i32 0
}
/* Variables and functions */
scalar_t__ CC3RandomDouble();
float CC3RandomFloat() { return (float)CC3RandomDouble(); }


x86 assembly (clang, -O0):
<CC3RandomFloat>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <CC3RandomDouble@plt>
cvtsi2ss %rax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC3RandomFloat>:
push   %rax
xor    %eax,%eax
call   1030 <CC3RandomDouble@plt>
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @CC3RandomFloat() {
%1 = call i64 (...) @CC3RandomDouble()
%2 = sitofp i64 %1 to float
ret float %2
}

LLVM IR (-O2):
define float @CC3RandomFloat() {
%1 = tail call i64 (...) @CC3RandomDouble()
%2 = sitofp i64 %1 to float
ret float %2
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_add_pi32(int /*<<< orphan*/, int /*<<< orphan*/);
__m64 test35(__m64 a, __m64 b) { return _mm_add_pi32(a, b); }


x86 assembly (clang, -O0):
<test35>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_add_pi32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test35>:
jmp    1030 <_mm_add_pi32@plt>

LLVM IR (-O0):
define i32 @test35(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_add_pi32(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test35(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_add_pi32(i32 %0, i32 %1)
ret i32 %3
}
/* Type definitions */
struct _Locale_time {
  int dummy;
};
struct _Locale_name_hint {
  int dummy;
};

/* Variables and functions */
struct _Locale_name_hint *_Locale_get_time_hint(struct _Locale_time *time) {
  return 0;
}


x86 assembly (clang, -O0):
<_Locale_get_time_hint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Locale_get_time_hint>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct._Locale_name_hint = type { i32 }
%struct._Locale_time = type { i32 }
define %struct._Locale_name_hint* @_Locale_get_time_hint(%struct._Locale_time* %0) {
%2 = alloca %struct._Locale_time*
store %struct._Locale_time* %0, %struct._Locale_time** %2
ret %struct._Locale_name_hint* null
}

LLVM IR (-O2):
%struct._Locale_name_hint = type { i32 }
%struct._Locale_time = type { i32 }
define noalias %struct._Locale_name_hint* @_Locale_get_time_hint(%struct._Locale_time* nocapture readnone %0) {
ret %struct._Locale_name_hint* null
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *get_my_exe();
int num_procs_of_exe_no_children(char *);
int num_procs_of_my_exe_no_children(void) {
  char *myexe = get_my_exe();
  int ret = -1;
  if (myexe) {
    ret = num_procs_of_exe_no_children(myexe);
    free(myexe);
  }
  return ret;
}


x86 assembly (clang, -O0):
<num_procs_of_my_exe_no_children>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <get_my_exe@plt>
mov    %rax,-0x8(%rbp)
movl   $0xffffffff,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     116a <num_procs_of_my_exe_no_children+0x3a>
mov    -0x8(%rbp),%rdi
call   1040 <num_procs_of_exe_no_children@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<num_procs_of_my_exe_no_children>:
push   %rbp
push   %rbx
push   %rax
xor    %eax,%eax
call   1050 <get_my_exe@plt>
test   %rax,%rax
je     1158 <num_procs_of_my_exe_no_children+0x28>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <num_procs_of_exe_no_children@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %ebp,%eax
jmp    115d <num_procs_of_my_exe_no_children+0x2d>
mov    $0xffffffff,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @num_procs_of_my_exe_no_children() {
%1 = alloca i8*
%2 = alloca i32
%3 = call i8* (...) @get_my_exe()
store i8* %3, i8** %1
store i32 -1, i32* %2
%4 = load i8*, i8** %1
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %11
6: ; preds = %0
%7 = load i8*, i8** %1
%8 = call i32 @num_procs_of_exe_no_children(i8* %7)
store i32 %8, i32* %2
%9 = load i8*, i8** %1
%10 = call i32 @free(i8* %9)
br label %11
11: ; preds = %6, %0
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @num_procs_of_my_exe_no_children() {
%1 = tail call i8* (...) @get_my_exe()
%2 = icmp eq i8* %1, null
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = tail call i32 @num_procs_of_exe_no_children(i8* %1)
%5 = tail call i32 @free(i8* %1)
br label %6
6: ; preds = %3, %0
%7 = phi i32 [ %4, %3 ], [ -1, %0 ]
ret i32 %7
}
unsigned fusion_uns(unsigned *p) { return p[0x12345]; }


x86 assembly (clang, -O0):
<fusion_uns>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x48d14(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fusion_uns>:
mov    0x48d14(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @fusion_uns(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 74565
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @fusion_uns(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 74565
%3 = load i32, i32* %2
ret i32 %3
}
int fun1035() { return 1035; }


x86 assembly (clang, -O0):
<fun1035>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40b,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1035>:
mov    $0x40b,%eax
ret

LLVM IR (-O0):
define i32 @fun1035() {
ret i32 1035
}

LLVM IR (-O2):
define i32 @fun1035() {
ret i32 1035
}
void gtk_scrollbar_get_type() {}


x86 assembly (clang, -O0):
<gtk_scrollbar_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_scrollbar_get_type>:
ret

LLVM IR (-O0):
define void @gtk_scrollbar_get_type() {
ret void
}

LLVM IR (-O2):
define void @gtk_scrollbar_get_type() {
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
char *allocstring(int length) {
  char *str_ptr;
  str_ptr = (char *)malloc(length + 1);
  return (str_ptr);
}


x86 assembly (clang, -O0):
<allocstring>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
add    $0x1,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<allocstring>:
add    $0x1,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @allocstring(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
%6 = call i64 @malloc(i32 %5)
%7 = inttoptr i64 %6 to i8*
store i8* %7, i8** %3
%8 = load i8*, i8** %3
ret i8* %8
}

LLVM IR (-O2):
define i8* @allocstring(i32 %0) {
%2 = add nsw i32 %0, 1
%3 = tail call i64 @malloc(i32 %2)
%4 = inttoptr i64 %3 to i8*
ret i8* %4
}
/* Variables and functions */
int TrySpinlock(int);
int BSP_TryToGeSpinlock(int id) { return TrySpinlock(id); }


x86 assembly (clang, -O0):
<BSP_TryToGeSpinlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <TrySpinlock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BSP_TryToGeSpinlock>:
jmp    1030 <TrySpinlock@plt>

LLVM IR (-O0):
define i32 @BSP_TryToGeSpinlock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @TrySpinlock(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @BSP_TryToGeSpinlock(i32 %0) {
%2 = tail call i32 @TrySpinlock(i32 %0)
ret i32 %2
}
int log_2(int value) {
  int i = 0;
  while (value >>= 1)
    i++;
  return (i);
}


x86 assembly (clang, -O0):
<log_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
je     112e <log_2+0x2e>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <log_2+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_2>:
xor    %eax,%eax
cmp    $0x2,%edi
jb     111c <log_2+0x1c>
xor    %eax,%eax
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
sar    %ecx
add    $0x1,%eax
cmp    $0x3,%edi
mov    %ecx,%edi
ja     1110 <log_2+0x10>
ret

LLVM IR (-O0):
define i32 @log_2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %2
%6 = ashr i32 %5, 1
store i32 %6, i32* %2
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
br label %4
11: ; preds = %4
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @log_2(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = ashr i32 %5, 1
%7 = add nuw nsw i32 %4, 1
%8 = icmp ult i32 %5, 4
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0x0d() {
  Assert_real((isupper(13) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              70, ("isupper should be 0 for 0x0d"));
}


x86 assembly (clang, -O0):
<t_isupper_0x0d>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x46,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0x0d>:
push   %rax
mov    $0xd,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x46,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0x0d\00"
define void @t_isupper_0x0d() {
%1 = call i64 @isupper(i32 13)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 70, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0x0d\00"
define void @t_isupper_0x0d() {
%1 = tail call i64 @isupper(i32 13)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 70, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int mlt(int x, int y) {
  if (x == 0 || y == 0)
    return 0;
  return ((x + y - 2) % (255)) + 1;
}


x86 assembly (clang, -O0):
<mlt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     111e <mlt+0x1e>
cmpl   $0x0,-0xc(%rbp)
jne    112a <mlt+0x2a>
movl   $0x0,-0x4(%rbp)
jmp    1141 <mlt+0x41>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
sub    $0x2,%eax
mov    $0xff,%ecx
cltd
idiv   %ecx
add    $0x1,%edx
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mlt>:
xor    %eax,%eax
test   %edi,%edi
je     113c <mlt+0x3c>
test   %esi,%esi
je     113c <mlt+0x3c>
lea    (%rdi,%rsi,1),%eax
lea    (%rdi,%rsi,1),%ecx
add    $0xfffffffe,%ecx
movslq %ecx,%rcx
imul   $0xffffffff80808081,%rcx,%rcx
shr    $0x20,%rcx
add    %eax,%ecx
add    $0xfffffffe,%ecx
mov    %ecx,%edx
shr    $0x1f,%edx
sar    $0x7,%ecx
add    %edx,%ecx
mov    %ecx,%edx
shl    $0x8,%edx
sub    %edx,%ecx
add    %ecx,%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @mlt(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i32, i32* %5
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %8, %2
store i32 0, i32* %3
br label %19
12: ; preds = %8
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = add nsw i32 %13, %14
%16 = sub nsw i32 %15, 2
%17 = srem i32 %16, 255
%18 = add nsw i32 %17, 1
store i32 %18, i32* %3
br label %19
19: ; preds = %12, %11
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @mlt(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
%4 = icmp eq i32 %1, 0
%5 = or i1 %3, %4
br i1 %5, label %11, label %6
6: ; preds = %2
%7 = add i32 %0, -2
%8 = add i32 %7, %1
%9 = srem i32 %8, 255
%10 = add nsw i32 %9, 1
br label %11
11: ; preds = %2, %6
%12 = phi i32 [ %10, %6 ], [ 0, %2 ]
ret i32 %12
}
void do_exception() {}


x86 assembly (clang, -O0):
<do_exception>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_exception>:
ret

LLVM IR (-O0):
define void @do_exception() {
ret void
}

LLVM IR (-O2):
define void @do_exception() {
ret void
}
int parsedOk(int *actLen, int nTaxa, int seqLen) {
  int i;
  for (i = 1; i <= nTaxa; ++i) {
    if (actLen[i] != seqLen)
      return (0);
  }
  return (1);
}


x86 assembly (clang, -O0):
<parsedOk>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
movl   $0x1,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x14(%rbp),%eax
jg     1154 <parsedOk+0x54>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x18(%rbp),%eax
je     1141 <parsedOk+0x41>
movl   $0x0,-0x4(%rbp)
jmp    115b <parsedOk+0x5b>
jmp    1146 <parsedOk+0x46>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1115 <parsedOk+0x15>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parsedOk>:
mov    $0x1,%eax
test   %esi,%esi
jle    112e <parsedOk+0x2e>
add    $0x1,%esi
mov    $0x1,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
cmp    %edx,(%rdi,%rcx,4)
jne    112f <parsedOk+0x2f>
add    $0x1,%rcx
cmp    %rcx,%rsi
jne    1120 <parsedOk+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @parsedOk(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 1, i32* %8
br label %9
9: ; preds = %23, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp sle i32 %10, %11
br i1 %12, label %13, label %26
13: ; preds = %9
%14 = load i32*, i32** %5
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %7
%20 = icmp ne i32 %18, %19
br i1 %20, label %21, label %22
21: ; preds = %13
store i32 0, i32* %4
br label %27
22: ; preds = %13
br label %23
23: ; preds = %22
%24 = load i32, i32* %8
%25 = add nsw i32 %24, 1
store i32 %25, i32* %8
br label %9
26: ; preds = %9
store i32 1, i32* %4
br label %27
27: ; preds = %26, %21
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @parsedOk(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, 1
br i1 %4, label %16, label %5
5: ; preds = %3
%6 = add nuw i32 %1, 1
%7 = zext i32 %6 to i64
br label %11
8: ; preds = %11
%9 = add nuw nsw i64 %12, 1
%10 = icmp eq i64 %9, %7
br i1 %10, label %16, label %11
11: ; preds = %5, %8
%12 = phi i64 [ 1, %5 ], [ %9, %8 ]
%13 = getelementptr inbounds i32, i32* %0, i64 %12
%14 = load i32, i32* %13
%15 = icmp eq i32 %14, %2
br i1 %15, label %8, label %16
16: ; preds = %11, %8, %3
%17 = phi i32 [ 1, %3 ], [ 1, %8 ], [ 0, %11 ]
ret i32 %17
}
/* Variables and functions */
scalar_t__ getuid();
int /*<<< orphan*/ parse_config();
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ start_worker();
int main(int argc, char *argv[]) {
  if (getuid() != 0) {
    printf("You must be running as root!\n");
    return 1;
  }
  parse_config();
  start_worker();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <getuid@plt>
cmp    $0x0,%rax
je     117f <main+0x3f>
lea    0xe92(%rip),%rdi
call   1040 <printf@plt>
movl   $0x1,-0x4(%rbp)
jmp    1194 <main+0x54>
mov    $0x0,%al
call   1060 <parse_config@plt>
mov    $0x0,%al
call   1050 <start_worker@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <getuid@plt>
test   %rax,%rax
je     1162 <main+0x22>
lea    0xeaa(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%ebx
jmp    1170 <main+0x30>
xor    %eax,%eax
call   1060 <parse_config@plt>
xor    %eax,%eax
call   1050 <start_worker@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [30 x i8] c"You must be running as root!\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i64 (...) @getuid()
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
store i32 1, i32* %3
br label %13
10: ; preds = %2
%11 = call i32 (...) @parse_config()
%12 = call i32 (...) @start_worker()
store i32 0, i32* %3
br label %13
13: ; preds = %10, %8
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
@str = [29 x i8] c"You must be running as root!\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 (...) @getuid()
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @str, i64 0, i64 0))
br label %10
7: ; preds = %2
%8 = tail call i32 (...) @parse_config()
%9 = tail call i32 (...) @start_worker()
br label %10
10: ; preds = %7, %5
%11 = phi i32 [ 1, %5 ], [ 0, %7 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ I2C_start();
int /*<<< orphan*/ I2C_stop();
int /*<<< orphan*/ I2C_write(int);
void Out_1Hz() {
  I2C_start();
  I2C_write(0xD0);
  I2C_write(0x07);
  I2C_write(0x10);
  I2C_stop();
}


x86 assembly (clang, -O0):
<Out_1Hz>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <I2C_start@plt>
mov    $0xd0,%edi
call   1050 <I2C_write@plt>
mov    $0x7,%edi
call   1050 <I2C_write@plt>
mov    $0x10,%edi
call   1050 <I2C_write@plt>
mov    $0x0,%al
call   1030 <I2C_stop@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Out_1Hz>:
push   %rax
xor    %eax,%eax
call   1040 <I2C_start@plt>
mov    $0xd0,%edi
call   1050 <I2C_write@plt>
mov    $0x7,%edi
call   1050 <I2C_write@plt>
mov    $0x10,%edi
call   1050 <I2C_write@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <I2C_stop@plt>

LLVM IR (-O0):
define void @Out_1Hz() {
%1 = call i32 (...) @I2C_start()
%2 = call i32 @I2C_write(i32 208)
%3 = call i32 @I2C_write(i32 7)
%4 = call i32 @I2C_write(i32 16)
%5 = call i32 (...) @I2C_stop()
ret void
}

LLVM IR (-O2):
define void @Out_1Hz() {
%1 = tail call i32 (...) @I2C_start()
%2 = tail call i32 @I2C_write(i32 208)
%3 = tail call i32 @I2C_write(i32 7)
%4 = tail call i32 @I2C_write(i32 16)
%5 = tail call i32 (...) @I2C_stop()
ret void
}
__attribute__((__naked__)) void SGVObjcMsgSendSuper2TrampolineSwift(void) {
  asm volatile("addq $"
               "16"
               ", "
               "%%rdi"
               "\n\t"
               "jmp "
               "_objc_msgSendSuper2"
               "\n\t"
               :
               :
               : "rsi", "rdi");
}


x86 assembly (clang, -O0):
<SGVObjcMsgSendSuper2TrampolineSwift>:
add    $0x10,%rdi
jmp    1030 <_objc_msgSendSuper2@plt>

x86 assembly (clang, -O2):
<SGVObjcMsgSendSuper2TrampolineSwift>:
add    $0x10,%rdi
jmp    1030 <_objc_msgSendSuper2@plt>

LLVM IR (-O0):
define void @SGVObjcMsgSendSuper2TrampolineSwift() {
unreachable
}

LLVM IR (-O2):
define void @SGVObjcMsgSendSuper2TrampolineSwift() {
tail call void asm sideeffect "addq $$16, %rdi\0A\09jmp _objc_msgSendSuper2\0A\09", "~{rsi},~{rdi},~{dirflag},~{fpsr},~{flags}"()
unreachable
}