xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ _exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void die(const char *msg) {
  fprintf(stderr, "%s\n", msg);
  _exit(1);
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<die>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @die(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @_exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @die(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @_exit(i32 1)
unreachable
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t __hsail_bitextract_u32(uint32_t src0, uint32_t src1, uint32_t src2) {
  uint32_t offset = src1 & (sizeof(uint32_t) * 8 - 1);
  uint32_t width = src2 & (sizeof(uint32_t) * 8 - 1);
  if (width == 0)
    return 0;
  else
    return (src0 << (sizeof(uint32_t) * 8 - width - offset)) >>
           (sizeof(uint32_t) * 8 - width);
}


x86 assembly (clang, -O0):
<__hsail_bitextract_u32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movslq -0xc(%rbp),%rax
and    $0x1f,%rax
mov    %eax,-0x14(%rbp)
movslq -0x10(%rbp),%rax
and    $0x1f,%rax
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jne    1139 <__hsail_bitextract_u32+0x39>
movl   $0x0,-0x4(%rbp)
jmp    1162 <__hsail_bitextract_u32+0x62>
mov    -0x8(%rbp),%eax
movslq -0x18(%rbp),%rdx
mov    $0x20,%ecx
sub    %rdx,%rcx
movslq -0x14(%rbp),%rdx
sub    %rdx,%rcx
shl    %cl,%eax
movslq -0x18(%rbp),%rdx
mov    $0x20,%ecx
sub    %rdx,%rcx
sar    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__hsail_bitextract_u32>:
and    $0x1f,%edx
je     111c <__hsail_bitextract_u32+0x1c>
mov    %edi,%eax
and    $0x1f,%esi
mov    $0x20,%ecx
sub    %edx,%ecx
sub    %esi,%ecx
shl    %cl,%eax
neg    %edx
mov    %edx,%ecx
sar    %cl,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__hsail_bitextract_u32(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%10 = load i32, i32* %6
%11 = sext i32 %10 to i64
%12 = and i64 %11, 31
%13 = trunc i64 %12 to i32
store i32 %13, i32* %8
%14 = load i32, i32* %7
%15 = sext i32 %14 to i64
%16 = and i64 %15, 31
%17 = trunc i64 %16 to i32
store i32 %17, i32* %9
%18 = load i32, i32* %9
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %3
store i32 0, i32* %4
br label %36
21: ; preds = %3
%22 = load i32, i32* %5
%23 = load i32, i32* %9
%24 = sext i32 %23 to i64
%25 = sub i64 32, %24
%26 = load i32, i32* %8
%27 = sext i32 %26 to i64
%28 = sub i64 %25, %27
%29 = trunc i64 %28 to i32
%30 = shl i32 %22, %29
%31 = load i32, i32* %9
%32 = sext i32 %31 to i64
%33 = sub i64 32, %32
%34 = trunc i64 %33 to i32
%35 = ashr i32 %30, %34
store i32 %35, i32* %4
br label %36
36: ; preds = %21, %20
%37 = load i32, i32* %4
ret i32 %37
}

LLVM IR (-O2):
define i32 @__hsail_bitextract_u32(i32 %0, i32 %1, i32 %2) {
%4 = and i32 %2, 31
%5 = icmp eq i32 %4, 0
br i1 %5, label %12, label %6
6: ; preds = %3
%7 = and i32 %1, 31
%8 = sub nuw nsw i32 32, %4
%9 = sub nsw i32 %8, %7
%10 = shl i32 %0, %9
%11 = ashr i32 %10, %8
br label %12
12: ; preds = %3, %6
%13 = phi i32 [ %11, %6 ], [ 0, %3 ]
ret i32 %13
}
/* Type definitions */
typedef int /*<<< orphan*/ key_t;

/* Variables and functions */
int /*<<< orphan*/ ftok(char const *, int);
key_t getKeyForFile(const char *file) { return ftok(file, 0777); }


x86 assembly (clang, -O0):
<getKeyForFile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1ff,%esi
call   1030 <ftok@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getKeyForFile>:
mov    $0x1ff,%esi
jmp    1030 <ftok@plt>

LLVM IR (-O0):
define i32 @getKeyForFile(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @ftok(i8* %3, i32 511)
ret i32 %4
}

LLVM IR (-O2):
define i32 @getKeyForFile(i8* %0) {
%2 = tail call i32 @ftok(i8* %0, i32 511)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRNOTIMPLEMENTED_swap(char *, int);
void U_WMR55_swap(char *record, int torev) {
  U_WMRNOTIMPLEMENTED_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMR55_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRNOTIMPLEMENTED_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR55_swap>:
jmp    1030 <U_WMRNOTIMPLEMENTED_swap@plt>

LLVM IR (-O0):
define void @U_WMR55_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMR55_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %0, i32 %1)
ret void
}
int octave_o_trunc_wrapper(void) { return -1; }


x86 assembly (clang, -O0):
<octave_o_trunc_wrapper>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<octave_o_trunc_wrapper>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @octave_o_trunc_wrapper() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @octave_o_trunc_wrapper() {
ret i32 -1
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ eeprom_write_block(void const *, void *, int /*<<< orphan*/);
void eeprom_update_block(const void *buf, void *addr, uint32_t len) {
  eeprom_write_block(buf, addr, len);
}


x86 assembly (clang, -O0):
<eeprom_update_block>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <eeprom_write_block@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eeprom_update_block>:
jmp    1030 <eeprom_write_block@plt>

LLVM IR (-O0):
define void @eeprom_update_block(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @eeprom_write_block(i8* %7, i8* %8, i32 %9)
ret void
}

LLVM IR (-O2):
define void @eeprom_update_block(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @eeprom_write_block(i8* %0, i8* %1, i32 %2)
ret void
}
/* Variables and functions */
int bfin_gpio_direction_input(unsigned int);
int gpio_direction_input(unsigned gpio) {
  return bfin_gpio_direction_input(gpio);
}


x86 assembly (clang, -O0):
<gpio_direction_input>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <bfin_gpio_direction_input@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_direction_input>:
jmp    1030 <bfin_gpio_direction_input@plt>

LLVM IR (-O0):
define i32 @gpio_direction_input(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @bfin_gpio_direction_input(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @gpio_direction_input(i32 %0) {
%2 = tail call i32 @bfin_gpio_direction_input(i32 %0)
ret i32 %2
}
void picodbg_dummy(void) { picodbg_dummy(); }


x86 assembly (clang, -O0):
<picodbg_dummy>:
push   %rbp
mov    %rsp,%rbp
call   1030 <picodbg_dummy@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<picodbg_dummy>:
jmp    1100 <picodbg_dummy>

LLVM IR (-O0):
define void @picodbg_dummy() {
ret void
}

LLVM IR (-O2):
define void @picodbg_dummy() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Type definitions */
typedef unsigned long uint32_t;

/* Variables and functions */
void I2SOutPointerSet(uint32_t ui32Base, uint32_t ui32NextPointer) {
  ;
  (*((volatile unsigned long *)(0x40021000 + 0x00000028))) = ui32NextPointer;
}


x86 assembly (clang, -O0):
<I2SOutPointerSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    $0x40021028,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2SOutPointerSet>:
mov    %rsi,0x40021028
40
ret

LLVM IR (-O0):
define void @I2SOutPointerSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
store volatile i64 %5, i64* inttoptr (i64 1073877032 to i64*)
ret void
}

LLVM IR (-O2):
define void @I2SOutPointerSet(i64 %0, i64 %1) {
store volatile i64 %1, i64* inttoptr (i64 1073877032 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ card_benchmark_run(int);
void card_benchmark_task_full() { card_benchmark_run(1); }


x86 assembly (clang, -O0):
<card_benchmark_task_full>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <card_benchmark_run@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<card_benchmark_task_full>:
mov    $0x1,%edi
jmp    1030 <card_benchmark_run@plt>

LLVM IR (-O0):
define void @card_benchmark_task_full() {
%1 = call i32 @card_benchmark_run(i32 1)
ret void
}

LLVM IR (-O2):
define void @card_benchmark_task_full() {
%1 = tail call i32 @card_benchmark_run(i32 1)
ret void
}
int sock_startup() { return 0; }


x86 assembly (clang, -O0):
<sock_startup>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sock_startup>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sock_startup() {
ret i32 0
}

LLVM IR (-O2):
define i32 @sock_startup() {
ret i32 0
}
jump(opc, opr) {
  register val;
  emit2(opc | opr);
  op1(opr);
}


x86 assembly (clang, -O0):
<jump>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%edi
or     -0xc(%rbp),%edi
mov    $0x0,%al
call   1040 <emit2@plt>
mov    -0xc(%rbp),%edi
mov    $0x0,%al
call   1030 <op1@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jump>:
push   %rbx
mov    %esi,%ebx
or     %esi,%edi
xor    %eax,%eax
call   1040 <emit2@plt>
mov    %ebx,%edi
xor    %eax,%eax
pop    %rbx
jmp    1030 <op1@plt>

LLVM IR (-O0):
define i32 @jump(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = or i32 %7, %8
%10 = call i32 (i32, ...) bitcast (i32 (...)* @emit2 to i32 (i32, ...)*)(i32 %9)
%11 = load i32, i32* %5
%12 = call i32 (i32, ...) bitcast (i32 (...)* @op1 to i32 (i32, ...)*)(i32 %11)
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @jump(i32 %0, i32 %1) {
%3 = or i32 %1, %0
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @emit2 to i32 (i32, ...)*)(i32 %3)
%5 = tail call i32 (i32, ...) bitcast (i32 (...)* @op1 to i32 (i32, ...)*)(i32 %1)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ addbyte(int);
void NEG_HOST_REG_W(int reg) {
  addbyte(0x66);
  if (reg & 8)
    addbyte(0x41);
  addbyte(0xf7);
  addbyte(0xd8 | (reg & 7));
}


x86 assembly (clang, -O0):
<NEG_HOST_REG_W>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x66,%edi
call   1030 <addbyte@plt>
mov    -0x4(%rbp),%eax
and    $0x8,%eax
cmp    $0x0,%eax
je     113e <NEG_HOST_REG_W+0x2e>
mov    $0x41,%edi
call   1030 <addbyte@plt>
mov    $0xf7,%edi
call   1030 <addbyte@plt>
mov    -0x4(%rbp),%edi
and    $0x7,%edi
or     $0xd8,%edi
call   1030 <addbyte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NEG_HOST_REG_W>:
push   %rbx
mov    %edi,%ebx
mov    $0x66,%edi
call   1030 <addbyte@plt>
test   $0x8,%bl
je     112c <NEG_HOST_REG_W+0x1c>
mov    $0x41,%edi
call   1030 <addbyte@plt>
mov    $0xf7,%edi
call   1030 <addbyte@plt>
and    $0x7,%ebx
or     $0xd8,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <addbyte@plt>

LLVM IR (-O0):
define void @NEG_HOST_REG_W(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @addbyte(i32 102)
%4 = load i32, i32* %2
%5 = and i32 %4, 8
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @addbyte(i32 65)
br label %9
9: ; preds = %7, %1
%10 = call i32 @addbyte(i32 247)
%11 = load i32, i32* %2
%12 = and i32 %11, 7
%13 = or i32 216, %12
%14 = call i32 @addbyte(i32 %13)
ret void
}

LLVM IR (-O2):
define void @NEG_HOST_REG_W(i32 %0) {
%2 = tail call i32 @addbyte(i32 102)
%3 = and i32 %0, 8
%4 = icmp eq i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 @addbyte(i32 65)
br label %7
7: ; preds = %5, %1
%8 = tail call i32 @addbyte(i32 247)
%9 = and i32 %0, 7
%10 = or i32 %9, 216
%11 = tail call i32 @addbyte(i32 %10)
ret void
}
void foo_2_2_1_2_2_1_1_1_1() {}


x86 assembly (clang, -O0):
<foo_2_2_1_2_2_1_1_1_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_2_1_2_2_1_1_1_1>:
ret

LLVM IR (-O0):
define void @foo_2_2_1_2_2_1_1_1_1() {
ret void
}

LLVM IR (-O2):
define void @foo_2_2_1_2_2_1_1_1_1() {
ret void
}
unsigned int rshift_rnd_us(unsigned int x, unsigned int a) {
  return (a > 0) ? ((x + (1 << (a - 1))) >> a) : x;
}


x86 assembly (clang, -O0):
<rshift_rnd_us>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jbe    1135 <rshift_rnd_us+0x35>
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
mov    -0x8(%rbp),%ecx
shr    %cl,%eax
mov    %eax,-0xc(%rbp)
jmp    113b <rshift_rnd_us+0x3b>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rshift_rnd_us>:
lea    -0x1(%rsi),%ecx
mov    $0x1,%eax
shl    %cl,%eax
add    %edi,%eax
mov    %esi,%ecx
shr    %cl,%eax
cmp    $0x1,%esi
cmovb  %edi,%eax
ret

LLVM IR (-O0):
define i32 @rshift_rnd_us(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ugt i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %2
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sub i32 %9, 1
%11 = shl i32 1, %10
%12 = add i32 %8, %11
%13 = load i32, i32* %4
%14 = lshr i32 %12, %13
br label %17
15: ; preds = %2
%16 = load i32, i32* %3
br label %17
17: ; preds = %15, %7
%18 = phi i32 [ %14, %7 ], [ %16, %15 ]
ret i32 %18
}

LLVM IR (-O2):
define i32 @rshift_rnd_us(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = add i32 %1, -1
%5 = shl nuw i32 1, %4
%6 = add i32 %5, %0
%7 = lshr i32 %6, %1
%8 = select i1 %3, i32 %0, i32 %7
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ init_app_man();
int /*<<< orphan*/ init_elab();
int /*<<< orphan*/ init_net(char *, int);
int /*<<< orphan*/ init_queue();
int /*<<< orphan*/ init_sched();
void init_all(char *net_server_ipaddr, int net_server_port) {
  init_queue();
  init_net(net_server_ipaddr, net_server_port);
  init_elab();
  init_app_man();
  init_sched();
}


x86 assembly (clang, -O0):
<init_all>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <init_queue@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <init_net@plt>
mov    $0x0,%al
call   1070 <init_elab@plt>
mov    $0x0,%al
call   1060 <init_app_man@plt>
mov    $0x0,%al
call   1050 <init_sched@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_all>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <init_queue@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
call   1040 <init_net@plt>
xor    %eax,%eax
call   1070 <init_elab@plt>
xor    %eax,%eax
call   1060 <init_app_man@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <init_sched@plt>

LLVM IR (-O0):
define void @init_all(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = call i32 (...) @init_queue()
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @init_net(i8* %6, i32 %7)
%9 = call i32 (...) @init_elab()
%10 = call i32 (...) @init_app_man()
%11 = call i32 (...) @init_sched()
ret void
}

LLVM IR (-O2):
define void @init_all(i8* %0, i32 %1) {
%3 = tail call i32 (...) @init_queue()
%4 = tail call i32 @init_net(i8* %0, i32 %1)
%5 = tail call i32 (...) @init_elab()
%6 = tail call i32 (...) @init_app_man()
%7 = tail call i32 (...) @init_sched()
ret void
}
/* Type definitions */
typedef int key_t;

/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int ftok(char const *, int);
int /*<<< orphan*/ perror(char *);
key_t safe_ftok(const char *pathname, int proj_id) {
  key_t rvalue = ftok(pathname, proj_id);
  if (rvalue == -1) {
    perror("safe_ftok - Failed to ftok");
    exit(EXIT_FAILURE);
  }
  return rvalue;
}


x86 assembly (clang, -O0):
<safe_ftok>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1050 <ftok@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0xffffffff,-0x10(%rbp)
jne    1172 <safe_ftok+0x42>
lea    0xea1(%rip),%rdi
call   1030 <perror@plt>
mov    0x2e75(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_ftok>:
push   %rax
call   1050 <ftok@plt>
cmp    $0xffffffff,%eax
je     113d <safe_ftok+0xd>
pop    %rcx
ret
lea    0xebc(%rip),%rdi
call   1030 <perror@plt>
mov    0x2e90(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"safe_ftok - Failed to ftok\00"
@EXIT_FAILURE = global i32 0
define i32 @safe_ftok(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @ftok(i8* %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp eq i32 %9, -1
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = call i32 @perror(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%13 = load i32, i32* @EXIT_FAILURE
%14 = call i32 @exit(i32 %13)
unreachable
15: ; preds = %2
%16 = load i32, i32* %5
ret i32 %16
}

LLVM IR (-O2):
@.str = [27 x i8] c"safe_ftok - Failed to ftok\00"
@EXIT_FAILURE = global i32 0
define i32 @safe_ftok(i8* %0, i32 %1) {
%3 = tail call i32 @ftok(i8* %0, i32 %1)
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = tail call i32 @perror(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%7 = load i32, i32* @EXIT_FAILURE
%8 = tail call i32 @exit(i32 %7)
unreachable
9: ; preds = %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ F_WRLCK;
int /*<<< orphan*/ flock_range_in_steps(int, int, int /*<<< orphan*/,
                                        int /*<<< orphan*/, int, int);
int pthread_self();
void *random_locker(void *arg) {
  int fd = *(int *)arg;
  int i = 0;
  int is_set = 0;
  is_set = pthread_self() % 2;
  (void)flock_range_in_steps(fd, is_set, F_WRLCK, 0, 400, 1);
  return NULL;
}


x86 assembly (clang, -O0):
<random_locker>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    $0x0,%al
call   1030 <pthread_self@plt>
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %edx,-0x14(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x14(%rbp),%esi
mov    0x2e7e(%rip),%rax
mov    (%rax),%edx
xor    %ecx,%ecx
mov    $0x190,%r8d
mov    $0x1,%r9d
call   1040 <flock_range_in_steps@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_locker>:
push   %rbx
mov    (%rdi),%ebx
xor    %eax,%eax
call   1030 <pthread_self@plt>
mov    %eax,%ecx
shr    $0x1f,%ecx
add    %eax,%ecx
and    $0xfffffffe,%ecx
sub    %ecx,%eax
mov    0x2ea3(%rip),%rcx
mov    (%rcx),%edx
mov    %ebx,%edi
mov    %eax,%esi
xor    %ecx,%ecx
mov    $0x190,%r8d
mov    $0x1,%r9d
call   1040 <flock_range_in_steps@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@F_WRLCK = global i32 0
define i8* @random_locker(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %2
%6 = load i8*, i8** %2
%7 = bitcast i8* %6 to i32*
%8 = load i32, i32* %7
store i32 %8, i32* %3
store i32 0, i32* %4
store i32 0, i32* %5
%9 = call i32 (...) @pthread_self()
%10 = srem i32 %9, 2
store i32 %10, i32* %5
%11 = load i32, i32* %3
%12 = load i32, i32* %5
%13 = load i32, i32* @F_WRLCK
%14 = call i32 @flock_range_in_steps(i32 %11, i32 %12, i32 %13, i32 0, i32 400, i32 1)
ret i8* null
}

LLVM IR (-O2):
@F_WRLCK = global i32 0
define noalias i8* @random_locker(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 (...) @pthread_self()
%5 = srem i32 %4, 2
%6 = load i32, i32* @F_WRLCK
%7 = tail call i32 @flock_range_in_steps(i32 %3, i32 %5, i32 %6, i32 0, i32 400, i32 1)
ret i8* null
}
__attribute__((unused)) int ularith_ctz(const unsigned long a) {
  ;
  return __builtin_ctzl(a);
}


x86 assembly (clang, -O0):
<ularith_ctz>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
bsf    %rax,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ularith_ctz>:
bsf    %rdi,%rax
ret

LLVM IR (-O0):
define i32 @ularith_ctz(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @llvm.cttz.i64(i64 %3, i1 true)
%5 = trunc i64 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @ularith_ctz(i64 %0) {
%2 = tail call i64 @llvm.cttz.i64(i64 %0, i1 true)
%3 = trunc i64 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ ngen(char *, char *, int);
void cgincloc(char *i, int a, int v) {
  ngen("%s\tcx,%d", "mov", v);
  ngen("%s\t[bp%+d],cx", i, a);
}


x86 assembly (clang, -O0):
<cgincloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%edx
lea    0xed4(%rip),%rdi
lea    0xed6(%rip),%rsi
call   1030 <ngen@plt>
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
lea    0xec7(%rip),%rdi
call   1030 <ngen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgincloc>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
lea    0xee1(%rip),%rdi
lea    0xee3(%rip),%rsi
call   1030 <ngen@plt>
lea    0xedb(%rip),%rdi
mov    %rbx,%rsi
mov    %ebp,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <ngen@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"%s\09cx,%d\00"
@.str.1 = [4 x i8] c"mov\00"
@.str.2 = [14 x i8] c"%s\09[bp%+d],cx\00"
define void @cgincloc(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = call i32 @ngen(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %7)
%9 = load i8*, i8** %4
%10 = load i32, i32* %5
%11 = call i32 @ngen(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.2, i64 0, i64 0), i8* %9, i32 %10)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"%s\09cx,%d\00"
@.str.1 = [4 x i8] c"mov\00"
@.str.2 = [14 x i8] c"%s\09[bp%+d],cx\00"
define void @cgincloc(i8* %0, i32 %1, i32 %2) {
%4 = tail call i32 @ngen(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %2)
%5 = tail call i32 @ngen(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.2, i64 0, i64 0), i8* %0, i32 %1)
ret void
}
float evaluation_avg(float new_val, float old_val, int i) {
  return old_val * i / (i + 1) + new_val / (i + 1);
}


x86 assembly (clang, -O0):
<evaluation_avg>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
cvtsi2ssl -0xc(%rbp),%xmm1
mulss  %xmm1,%xmm0
mov    -0xc(%rbp),%eax
add    $0x1,%eax
cvtsi2ss %eax,%xmm1
divss  %xmm1,%xmm0
movss  -0x4(%rbp),%xmm1
mov    -0xc(%rbp),%eax
add    $0x1,%eax
cvtsi2ss %eax,%xmm2
divss  %xmm2,%xmm1
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<evaluation_avg>:
cvtsi2ss %edi,%xmm2
mulss  %xmm1,%xmm2
add    $0x1,%edi
xorps  %xmm1,%xmm1
cvtsi2ss %edi,%xmm1
unpcklps %xmm0,%xmm2
shufps $0x0,%xmm1,%xmm1
divps  %xmm1,%xmm2
movaps %xmm2,%xmm0
shufps $0x55,%xmm2,%xmm0
addss  %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @evaluation_avg(float %0, float %1, i32 %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca i32
store float %0, float* %4
store float %1, float* %5
store i32 %2, i32* %6
%7 = load float, float* %5
%8 = load i32, i32* %6
%9 = sitofp i32 %8 to float
%10 = fmul float %7, %9
%11 = load i32, i32* %6
%12 = add nsw i32 %11, 1
%13 = sitofp i32 %12 to float
%14 = fdiv float %10, %13
%15 = load float, float* %4
%16 = load i32, i32* %6
%17 = add nsw i32 %16, 1
%18 = sitofp i32 %17 to float
%19 = fdiv float %15, %18
%20 = fadd float %14, %19
ret float %20
}

LLVM IR (-O2):
define float @evaluation_avg(float %0, float %1, i32 %2) {
%4 = sitofp i32 %2 to float
%5 = fmul float %4, %1
%6 = add nsw i32 %2, 1
%7 = sitofp i32 %6 to float
%8 = insertelement <2 x float> poison, float %0, i64 1
%9 = insertelement <2 x float> %8, float %5, i64 0
%10 = insertelement <2 x float> poison, float %7, i64 0
%11 = shufflevector <2 x float> %10, <2 x float> poison, <2 x i32> zeroinitializer
%12 = fdiv <2 x float> %9, %11
%13 = shufflevector <2 x float> %12, <2 x float> poison, <2 x i32> <i32 1, i32 undef>
%14 = fadd <2 x float> %12, %13
%15 = extractelement <2 x float> %14, i64 0
ret float %15
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
struct tm *localtime(int /*<<< orphan*/ *);
scalar_t__ malloc(int);
int /*<<< orphan*/ strftime(char *, int, char *, struct tm *);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
char *getTime() {
  char *time_string;
  time_string = (char *)malloc(100 * sizeof(char));
  time_t t = time(NULL);
  struct tm *p = localtime(&t);
  strftime(time_string, 100, "%F, %T", p);
  return time_string;
}


x86 assembly (clang, -O0):
<getTime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x64,%edi
call   1050 <malloc@plt>
mov    %rax,-0x8(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,-0xc(%rbp)
lea    -0xc(%rbp),%rdi
call   1030 <localtime@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rcx
mov    $0x64,%esi
lea    0xe7d(%rip),%rdx
call   1060 <strftime@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getTime>:
push   %rbx
sub    $0x10,%rsp
mov    $0x64,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rdi
call   1030 <localtime@plt>
lea    0xe92(%rip),%rdx
mov    %rbx,%rdi
mov    $0x64,%esi
mov    %rax,%rcx
call   1060 <strftime@plt>
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
@.str = [7 x i8] c"%F, %T\00"
define i8* @getTime() {
%1 = alloca i8*
%2 = alloca i32
%3 = alloca %struct.tm*
%4 = call i64 @malloc(i32 100)
%5 = inttoptr i64 %4 to i8*
store i8* %5, i8** %1
%6 = call i32 @time(i32* null)
store i32 %6, i32* %2
%7 = call %struct.tm* @localtime(i32* %2)
store %struct.tm* %7, %struct.tm** %3
%8 = load i8*, i8** %1
%9 = load %struct.tm*, %struct.tm** %3
%10 = call i32 @strftime(i8* %8, i32 100, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), %struct.tm* %9)
%11 = load i8*, i8** %1
ret i8* %11
}

LLVM IR (-O2):
%struct.tm = type { i32 }
@.str = [7 x i8] c"%F, %T\00"
define i8* @getTime() {
%1 = alloca i32
%2 = tail call i64 @malloc(i32 100)
%3 = inttoptr i64 %2 to i8*
%4 = bitcast i32* %1 to i8*
%5 = tail call i32 @time(i32* null)
store i32 %5, i32* %1
%6 = call %struct.tm* @localtime(i32* %1)
%7 = call i32 @strftime(i8* %3, i32 100, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), %struct.tm* %6)
ret i8* %3
}
void ECAPCounterPhaseValConfig(unsigned int baseAdd, unsigned int cntPhaseVal) {
  (*((volatile unsigned int *)(baseAdd + (0x4)))) = cntPhaseVal;
}


x86 assembly (clang, -O0):
<ECAPCounterPhaseValConfig>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x4,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ECAPCounterPhaseValConfig>:
add    $0x4,%edi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @ECAPCounterPhaseValConfig(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = add i32 %6, 4
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store volatile i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @ECAPCounterPhaseValConfig(i32 %0, i32 %1) {
%3 = add i32 %0, 4
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
store volatile i32 %1, i32* %5
ret void
}
void ff_hevc_v_loop_filter_luma_10_ssse3() {}


x86 assembly (clang, -O0):
<ff_hevc_v_loop_filter_luma_10_ssse3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_v_loop_filter_luma_10_ssse3>:
ret

LLVM IR (-O0):
define void @ff_hevc_v_loop_filter_luma_10_ssse3() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_v_loop_filter_luma_10_ssse3() {
ret void
}
long int hashInt(long int x) {
  x = ((x >> 16) ^ x) * 0x45d9f3b;
  x = ((x >> 16) ^ x) * 0x45d9f3b;
  x = ((x >> 16) ^ x);
  return x;
}


x86 assembly (clang, -O0):
<hashInt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
sar    $0x10,%rax
xor    -0x8(%rbp),%rax
imul   $0x45d9f3b,%rax,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
sar    $0x10,%rax
xor    -0x8(%rbp),%rax
imul   $0x45d9f3b,%rax,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
sar    $0x10,%rax
xor    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashInt>:
mov    %rdi,%rax
sar    $0x10,%rax
xor    %rdi,%rax
imul   $0x45d9f3b,%rax,%rax
mov    %rax,%rcx
sar    $0x10,%rcx
xor    %rax,%rcx
imul   $0x45d9f3b,%rcx,%rcx
mov    %rcx,%rax
sar    $0x10,%rax
xor    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @hashInt(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = load i64, i64* %2
%6 = xor i64 %4, %5
%7 = mul nsw i64 %6, 73244475
store i64 %7, i64* %2
%8 = load i64, i64* %2
%9 = ashr i64 %8, 16
%10 = load i64, i64* %2
%11 = xor i64 %9, %10
%12 = mul nsw i64 %11, 73244475
store i64 %12, i64* %2
%13 = load i64, i64* %2
%14 = ashr i64 %13, 16
%15 = load i64, i64* %2
%16 = xor i64 %14, %15
store i64 %16, i64* %2
%17 = load i64, i64* %2
ret i64 %17
}

LLVM IR (-O2):
define i64 @hashInt(i64 %0) {
%2 = ashr i64 %0, 16
%3 = xor i64 %2, %0
%4 = mul nsw i64 %3, 73244475
%5 = ashr i64 %4, 16
%6 = xor i64 %5, %4
%7 = mul nsw i64 %6, 73244475
%8 = ashr i64 %7, 16
%9 = xor i64 %8, %7
ret i64 %9
}
void enter_room() {}


x86 assembly (clang, -O0):
<enter_room>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<enter_room>:
ret

LLVM IR (-O0):
define void @enter_room() {
ret void
}

LLVM IR (-O2):
define void @enter_room() {
ret void
}
/* Variables and functions */
scalar_t__ lseek(int, long, int /*<<< orphan*/);
int read(int, char *, int);
int get(int fd, long pos, char *buf, int n) {
  if (lseek(fd, pos, 0) >= 0)
    return read(fd, buf, n);
  else
    return -1;
}


x86 assembly (clang, -O0):
<get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <lseek@plt>
cmp    $0x0,%rax
jl     1165 <get+0x45>
mov    -0x8(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1040 <read@plt>
mov    %eax,-0x4(%rbp)
jmp    116c <get+0x4c>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get>:
push   %rbp
push   %r14
push   %rbx
mov    %ecx,%r14d
mov    %rdx,%rbx
mov    %edi,%ebp
xor    %edx,%edx
call   1030 <lseek@plt>
test   %rax,%rax
js     1149 <get+0x29>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <read@plt>
mov    $0xffffffff,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @get(i32 %0, i64 %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i64
%8 = alloca i8*
%9 = alloca i32
store i32 %0, i32* %6
store i64 %1, i64* %7
store i8* %2, i8** %8
store i32 %3, i32* %9
%10 = load i32, i32* %6
%11 = load i64, i64* %7
%12 = call i64 @lseek(i32 %10, i64 %11, i32 0)
%13 = icmp sge i64 %12, 0
br i1 %13, label %14, label %19
14: ; preds = %4
%15 = load i32, i32* %6
%16 = load i8*, i8** %8
%17 = load i32, i32* %9
%18 = call i32 @read(i32 %15, i8* %16, i32 %17)
store i32 %18, i32* %5
br label %20
19: ; preds = %4
store i32 -1, i32* %5
br label %20
20: ; preds = %19, %14
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
define i32 @get(i32 %0, i64 %1, i8* nocapture %2, i32 %3) {
%5 = tail call i64 @lseek(i32 %0, i64 %1, i32 0)
%6 = icmp sgt i64 %5, -1
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = tail call i32 @read(i32 %0, i8* %2, i32 %3)
br label %9
9: ; preds = %4, %7
%10 = phi i32 [ %8, %7 ], [ -1, %4 ]
ret i32 %10
}
int d_ble_mm2(double *a1, double *a2) {
  return !(__builtin_islessequal(*a1, *a2));
}


x86 assembly (clang, -O0):
<d_ble_mm2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
ucomisd %xmm1,%xmm0
setae  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d_ble_mm2>:
movsd  (%rsi),%xmm0
xor    %eax,%eax
ucomisd (%rdi),%xmm0
setb   %al
ret

LLVM IR (-O0):
define i32 @d_ble_mm2(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = load double, double* %5
%7 = load double*, double** %4
%8 = load double, double* %7
%9 = fcmp ole double %6, %8
%10 = xor i1 %9, true
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @d_ble_mm2(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %0
%4 = load double, double* %1
%5 = fcmp ugt double %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Type definitions */
struct beri_debug {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ beri_debug_close_internal(struct beri_debug *);
int /*<<< orphan*/ free(struct beri_debug *);
void beri_debug_destroy(struct beri_debug *bdp) {
  beri_debug_close_internal(bdp);
  free(bdp);
}


x86 assembly (clang, -O0):
<beri_debug_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <beri_debug_close_internal@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<beri_debug_destroy>:
push   %rbx
mov    %rdi,%rbx
call   1040 <beri_debug_close_internal@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.beri_debug = type { i32 }
define void @beri_debug_destroy(%struct.beri_debug* %0) {
%2 = alloca %struct.beri_debug*
store %struct.beri_debug* %0, %struct.beri_debug** %2
%3 = load %struct.beri_debug*, %struct.beri_debug** %2
%4 = call i32 @beri_debug_close_internal(%struct.beri_debug* %3)
%5 = load %struct.beri_debug*, %struct.beri_debug** %2
%6 = call i32 @free(%struct.beri_debug* %5)
ret void
}

LLVM IR (-O2):
%struct.beri_debug = type { i32 }
define void @beri_debug_destroy(%struct.beri_debug* %0) {
%2 = tail call i32 @beri_debug_close_internal(%struct.beri_debug* %0)
%3 = tail call i32 @free(%struct.beri_debug* %0)
ret void
}
void ADCProcessorTrigger(unsigned long ulBase, unsigned long ulSequenceNum) {
  ;
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000028))) |=
      ((ulSequenceNum & 0xffff0000) | (1 << (ulSequenceNum & 0xf)));
}


x86 assembly (clang, -O0):
<ADCProcessorTrigger>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movabs $0xffff0000,%rdx
and    -0x10(%rbp),%rdx
mov    -0x10(%rbp),%rax
and    $0xf,%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
or     %rax,%rdx
mov    -0x8(%rbp),%rax
mov    0x28(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x28(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCProcessorTrigger>:
mov    %rsi,%rcx
mov    %ecx,%eax
and    $0xffff0000,%eax
and    $0xf,%cl
mov    $0x1,%edx
shl    %cl,%edx
or     %rax,%rdx
or     %rdx,0x28(%rdi)
ret

LLVM IR (-O0):
define void @ADCProcessorTrigger(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = and i64 %5, 4294901760
%7 = load i64, i64* %4
%8 = and i64 %7, 15
%9 = trunc i64 %8 to i32
%10 = shl i32 1, %9
%11 = sext i32 %10 to i64
%12 = or i64 %6, %11
%13 = load i64, i64* %3
%14 = add i64 %13, 40
%15 = inttoptr i64 %14 to i64*
%16 = load volatile i64, i64* %15
%17 = or i64 %16, %12
store volatile i64 %17, i64* %15
ret void
}

LLVM IR (-O2):
define void @ADCProcessorTrigger(i64 %0, i64 %1) {
%3 = and i64 %1, 4294901760
%4 = trunc i64 %1 to i32
%5 = and i32 %4, 15
%6 = shl nuw nsw i32 1, %5
%7 = zext i32 %6 to i64
%8 = or i64 %3, %7
%9 = add i64 %0, 40
%10 = inttoptr i64 %9 to i64*
%11 = load volatile i64, i64* %10
%12 = or i64 %8, %11
store volatile i64 %12, i64* %10
ret void
}
/* Variables and functions */
int /*<<< orphan*/ setjmp(int /*<<< orphan*/);
void f19(void) { setjmp(0); }


x86 assembly (clang, -O0):
<f19>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <setjmp@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f19>:
push   %rax
xor    %edi,%edi
call   1030 <setjmp@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @f19() {
%1 = call i32 @setjmp(i32 0)
ret void
}

LLVM IR (-O2):
define void @f19() {
%1 = call i32 @setjmp(i32 0)
ret void
}
int hputr8(hstring, keyword, dval)
char *hstring;
char *keyword;
double dval;
{
  char value[30];
  sprintf(value, "%g", dval);
  return (hputc(hstring, keyword, value));
}


x86 assembly (clang, -O0):
<hputr8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movsd  %xmm0,-0x18(%rbp)
lea    -0x40(%rbp),%rdi
movsd  -0x18(%rbp),%xmm0
lea    0xebb(%rip),%rsi
mov    $0x1,%al
call   1040 <sprintf@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x40(%rbp),%rdx
mov    $0x0,%al
call   1030 <hputc@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hputr8>:
push   %r15
push   %r14
push   %rbx
sub    $0x20,%rsp
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0xeca(%rip),%rsi
mov    %rsp,%r15
mov    %r15,%rdi
mov    $0x1,%al
call   1040 <sprintf@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
xor    %eax,%eax
call   1030 <hputc@plt>
add    $0x20,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%g\00"
define i32 @hputr8(i8* %0, i8* %1, double %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca double
%7 = alloca [30 x i8]
store i8* %0, i8** %4
store i8* %1, i8** %5
store double %2, double* %6
%8 = getelementptr inbounds [30 x i8], [30 x i8]* %7, i64 0, i64 0
%9 = load double, double* %6
%10 = call i32 (i8*, i8*, ...) @sprintf(i8* %8, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), double %9)
%11 = load i8*, i8** %4
%12 = load i8*, i8** %5
%13 = getelementptr inbounds [30 x i8], [30 x i8]* %7, i64 0, i64 0
%14 = call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @hputc to i32 (i8*, i8*, i8*, ...)*)(i8* %11, i8* %12, i8* %13)
ret i32 %14
}

LLVM IR (-O2):
@.str = [3 x i8] c"%g\00"
define i32 @hputr8(i8* %0, i8* %1, double %2) {
%4 = alloca [30 x i8]
%5 = getelementptr inbounds [30 x i8], [30 x i8]* %4, i64 0, i64 0
%6 = call i32 (i8*, i8*, ...) @sprintf(i8* %5, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), double %2)
%7 = call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @hputc to i32 (i8*, i8*, i8*, ...)*)(i8* %0, i8* %1, i8* %5)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ setup_gdt();
int /*<<< orphan*/ setup_idt();
int /*<<< orphan*/ setup_pgtab();
int /*<<< orphan*/ setup_pic();
int /*<<< orphan*/ setup_tss();
void cpu_init(void) {
  setup_gdt();
  setup_idt();
  setup_tss();
  setup_pic();
  setup_pgtab();
}


x86 assembly (clang, -O0):
<cpu_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <setup_gdt@plt>
mov    $0x0,%al
call   1050 <setup_idt@plt>
mov    $0x0,%al
call   1060 <setup_tss@plt>
mov    $0x0,%al
call   1040 <setup_pic@plt>
mov    $0x0,%al
call   1070 <setup_pgtab@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_init>:
push   %rax
xor    %eax,%eax
call   1030 <setup_gdt@plt>
xor    %eax,%eax
call   1050 <setup_idt@plt>
xor    %eax,%eax
call   1060 <setup_tss@plt>
xor    %eax,%eax
call   1040 <setup_pic@plt>
xor    %eax,%eax
pop    %rcx
jmp    1070 <setup_pgtab@plt>

LLVM IR (-O0):
define void @cpu_init() {
%1 = call i32 (...) @setup_gdt()
%2 = call i32 (...) @setup_idt()
%3 = call i32 (...) @setup_tss()
%4 = call i32 (...) @setup_pic()
%5 = call i32 (...) @setup_pgtab()
ret void
}

LLVM IR (-O2):
define void @cpu_init() {
%1 = tail call i32 (...) @setup_gdt()
%2 = tail call i32 (...) @setup_idt()
%3 = tail call i32 (...) @setup_tss()
%4 = tail call i32 (...) @setup_pic()
%5 = tail call i32 (...) @setup_pgtab()
ret void
}
/* Variables and functions */
int strcmp(char *, char *);
int _ht_cmp_string(void *d1, void *d2) {
  char *s1 = (char *)d1;
  char *s2 = (char *)d2;
  return strcmp(s1, s2);
}


x86 assembly (clang, -O0):
<_ht_cmp_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ht_cmp_string>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @_ht_cmp_string(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
%8 = load i8*, i8** %4
store i8* %8, i8** %6
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = call i32 @strcmp(i8* %9, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @_ht_cmp_string(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
void help_size(int rows, int cols) {}


x86 assembly (clang, -O0):
<help_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<help_size>:
ret

LLVM IR (-O0):
define void @help_size(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @help_size(i32 %0, i32 %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char *, char *);
int /*<<< orphan*/ pr_indent(int /*<<< orphan*/ *, int);
void pr_str(FILE *fp, int indent, char *title, char *s) {
  pr_indent(fp, indent);
  fprintf(fp, "%-20s = %s\n", title, s);
}


x86 assembly (clang, -O0):
<pr_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <pr_indent@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
lea    0xeaa(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pr_str>:
push   %r15
push   %r14
push   %rbx
mov    %rcx,%r14
mov    %rdx,%r15
mov    %rdi,%rbx
call   1040 <pr_indent@plt>
lea    0xec6(%rip),%rsi
mov    %rbx,%rdi
mov    %r15,%rdx
mov    %r14,%rcx
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"%-20s = %s\0A\00"
define void @pr_str(i32* %0, i32 %1, i8* %2, i8* %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
store i32* %0, i32** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i32*, i32** %5
%10 = load i32, i32* %6
%11 = call i32 @pr_indent(i32* %9, i32 %10)
%12 = load i32*, i32** %5
%13 = load i8*, i8** %7
%14 = load i8*, i8** %8
%15 = call i32 @fprintf(i32* %12, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %13, i8* %14)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"%-20s = %s\0A\00"
define void @pr_str(i32* %0, i32 %1, i8* %2, i8* %3) {
%5 = tail call i32 @pr_indent(i32* %0, i32 %1)
%6 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %2, i8* %3)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ mp2vseqdx_get_color(int const *);
uint8_t mp2vseqdx_get_transfer(const uint8_t *p_mp2vseqdx) {
  if (!mp2vseqdx_get_color(p_mp2vseqdx))
    return 1;
  return p_mp2vseqdx[6];
}


x86 assembly (clang, -O0):
<mp2vseqdx_get_transfer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <mp2vseqdx_get_color@plt>
cmp    $0x0,%eax
jne    113a <mp2vseqdx_get_transfer+0x2a>
movl   $0x1,-0x4(%rbp)
jmp    1144 <mp2vseqdx_get_transfer+0x34>
mov    -0x10(%rbp),%rax
mov    0x18(%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp2vseqdx_get_transfer>:
push   %rbx
mov    %rdi,%rbx
call   1030 <mp2vseqdx_get_color@plt>
test   %eax,%eax
je     1122 <mp2vseqdx_get_transfer+0x12>
mov    0x18(%rbx),%eax
pop    %rbx
ret
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @mp2vseqdx_get_transfer(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = call i32 @mp2vseqdx_get_color(i32* %4)
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 1, i32* %2
br label %12
8: ; preds = %1
%9 = load i32*, i32** %3
%10 = getelementptr inbounds i32, i32* %9, i64 6
%11 = load i32, i32* %10
store i32 %11, i32* %2
br label %12
12: ; preds = %8, %7
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @mp2vseqdx_get_transfer(i32* %0) {
%2 = tail call i32 @mp2vseqdx_get_color(i32* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = getelementptr inbounds i32, i32* %0, i64 6
%6 = load i32, i32* %5
br label %7
7: ; preds = %1, %4
%8 = phi i32 [ %6, %4 ], [ 1, %1 ]
ret i32 %8
}