xunge/DecIR huggingface dataset:
/* Variables and functions */
void token_incline(int *linenum) {
  if (linenum != NULL)
    (*linenum) = (*linenum) + 1;
}


x86 assembly (clang, -O0):
<token_incline>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1122 <token_incline+0x22>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<token_incline>:
test   %rdi,%rdi
je     1108 <token_incline+0x8>
addl   $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @token_incline(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = icmp ne i32* %3, null
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load i32*, i32** %2
%7 = load i32, i32* %6
%8 = add nsw i32 %7, 1
%9 = load i32*, i32** %2
store i32 %8, i32* %9
br label %10
10: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @token_incline(i32* %0) {
%2 = icmp eq i32* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = load i32, i32* %0
%5 = add nsw i32 %4, 1
store i32 %5, i32* %0
br label %6
6: ; preds = %3, %1
ret void
}
/* Variables and functions */
scalar_t__ isspace(char);
char *skip_leading(char *in_line) {
  while (in_line[0] && isspace(in_line[0]))
    in_line++;
  return in_line;
}


x86 assembly (clang, -O0):
<skip_leading>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
je     1147 <skip_leading+0x37>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    1157 <skip_leading+0x47>
jmp    1168 <skip_leading+0x58>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <skip_leading+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_leading>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%al
test   %al,%al
je     1139 <skip_leading+0x29>
nopw   0x0(%rax,%rax,1)
movsbl %al,%edi
call   1030 <isspace@plt>
test   %rax,%rax
je     1139 <skip_leading+0x29>
movzbl 0x1(%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <skip_leading+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @skip_leading(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %17, %1
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %3
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i64 0
%12 = load i8, i8* %11
%13 = call i64 @isspace(i8 signext %12)
%14 = icmp ne i64 %13, 0
br label %15
15: ; preds = %9, %3
%16 = phi i1 [ false, %3 ], [ %14, %9 ]
br i1 %16, label %17, label %20
17: ; preds = %15
%18 = load i8*, i8** %2
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %2
br label %3
20: ; preds = %15
%21 = load i8*, i8** %2
ret i8* %21
}

LLVM IR (-O2):
define i8* @skip_leading(i8* %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1, %9
%5 = phi i8 [ %11, %9 ], [ %2, %1 ]
%6 = phi i8* [ %10, %9 ], [ %0, %1 ]
%7 = tail call i64 @isspace(i8 signext %5)
%8 = icmp eq i64 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %4
%10 = getelementptr inbounds i8, i8* %6, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %9, %1
%14 = phi i8* [ %0, %1 ], [ %10, %9 ], [ %6, %4 ]
ret i8* %14
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char const *);
void throw(const char *msg) {
  perror(msg);
  exit(1);
}


x86 assembly (clang, -O0):
<throw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<throw>:
push   %rax
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @throw(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @throw(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int fnv1_hash(void **, int);
int hash_float(void *key) { return fnv1_hash(&key, sizeof(float)); }


x86 assembly (clang, -O0):
<hash_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
mov    $0x4,%esi
call   1030 <fnv1_hash@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_float>:
push   %rax
mov    %rdi,(%rsp)
mov    %rsp,%rdi
mov    $0x4,%esi
call   1030 <fnv1_hash@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @hash_float(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @fnv1_hash(i8** %2, i32 4)
ret i32 %3
}

LLVM IR (-O2):
define i32 @hash_float(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @fnv1_hash(i8** %2, i32 4)
ret i32 %3
}
int Curl_ssl_check_cxn(struct connectdata *conn) {
  (void)conn;
  return -1;
}


x86 assembly (clang, -O0):
<Curl_ssl_check_cxn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Curl_ssl_check_cxn>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.connectdata = type opaque
define i32 @Curl_ssl_check_cxn(%struct.connectdata* %0) {
%2 = alloca %struct.connectdata*
store %struct.connectdata* %0, %struct.connectdata** %2
%3 = load %struct.connectdata*, %struct.connectdata** %2
ret i32 -1
}

LLVM IR (-O2):
%struct.connectdata = type opaque
define i32 @Curl_ssl_check_cxn(%struct.connectdata* nocapture readnone %0) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ test1();
int /*<<< orphan*/ testOfFile(char const *);
int main(int argc, const char *argv[]) {
  if (2 == argc) {
    testOfFile(argv[1]);
  } else {
    test1();
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x2,%eax
cmp    -0x8(%rbp),%eax
jne    1156 <main+0x36>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <testOfFile@plt>
jmp    115d <main+0x3d>
mov    $0x0,%al
call   1040 <test1@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x2,%edi
jne    1131 <main+0x11>
mov    0x8(%rsi),%rdi
call   1030 <testOfFile@plt>
jmp    1138 <main+0x18>
xor    %eax,%eax
call   1040 <test1@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp eq i32 2, %6
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 1
%11 = load i8*, i8** %10
%12 = call i32 @testOfFile(i8* %11)
br label %15
13: ; preds = %2
%14 = call i32 (...) @test1()
br label %15
15: ; preds = %13, %8
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 2
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = tail call i32 @testOfFile(i8* %6)
br label %10
8: ; preds = %2
%9 = tail call i32 (...) @test1()
br label %10
10: ; preds = %8, %4
ret i32 0
}
int pfftw_permutation_64(int i) {
  int i1 = i % 4;
  int i2 = i / 4;
  if (i1 <= 2)
    return (i1 * 16 + i2);
  else
    return (i1 * 16 + ((i2 + 1) % 16));
}


x86 assembly (clang, -O0):
<pfftw_permutation_64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
cmpl   $0x2,-0xc(%rbp)
jg     113e <pfftw_permutation_64+0x3e>
mov    -0xc(%rbp),%eax
shl    $0x4,%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115d <pfftw_permutation_64+0x5d>
mov    -0xc(%rbp),%eax
shl    $0x4,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    $0x10,%ecx
cltd
idiv   %ecx
mov    -0x14(%rbp),%eax
add    %edx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pfftw_permutation_64>:
mov    %edi,%eax
lea    0x3(%rax),%ecx
test   %edi,%edi
cmovns %edi,%ecx
mov    %ecx,%edx
and    $0xfffffffc,%edx
sub    %edx,%eax
sar    $0x2,%ecx
cmp    $0x2,%eax
jg     111f <pfftw_permutation_64+0x1f>
shl    $0x4,%eax
add    %ecx,%eax
ret
lea    0x1(%rcx),%eax
lea    0x10(%rcx),%edx
test   %eax,%eax
cmovns %eax,%edx
and    $0xfffffff0,%edx
neg    %edx
lea    (%rcx,%rdx,1),%eax
add    $0x31,%eax
ret

LLVM IR (-O0):
define i32 @pfftw_permutation_64(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
%6 = load i32, i32* %3
%7 = srem i32 %6, 4
store i32 %7, i32* %4
%8 = load i32, i32* %3
%9 = sdiv i32 %8, 4
store i32 %9, i32* %5
%10 = load i32, i32* %4
%11 = icmp sle i32 %10, 2
br i1 %11, label %12, label %17
12: ; preds = %1
%13 = load i32, i32* %4
%14 = mul nsw i32 %13, 16
%15 = load i32, i32* %5
%16 = add nsw i32 %14, %15
store i32 %16, i32* %2
br label %24
17: ; preds = %1
%18 = load i32, i32* %4
%19 = mul nsw i32 %18, 16
%20 = load i32, i32* %5
%21 = add nsw i32 %20, 1
%22 = srem i32 %21, 16
%23 = add nsw i32 %19, %22
store i32 %23, i32* %2
br label %24
24: ; preds = %17, %12
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @pfftw_permutation_64(i32 %0) {
%2 = srem i32 %0, 4
%3 = sdiv i32 %0, 4
%4 = icmp slt i32 %2, 3
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = shl nsw i32 %2, 4
%7 = add nsw i32 %6, %3
br label %12
8: ; preds = %1
%9 = add nsw i32 %3, 1
%10 = srem i32 %9, 16
%11 = add nsw i32 %10, 48
br label %12
12: ; preds = %8, %5
%13 = phi i32 [ %7, %5 ], [ %11, %8 ]
ret i32 %13
}
mpn_random2() {}


x86 assembly (clang, -O0):
<mpn_random2>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpn_random2>:
ret

LLVM IR (-O0):
define i32 @mpn_random2() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @mpn_random2() {
ret i32 undef
}
int searchListNotFound() { return 1; }


x86 assembly (clang, -O0):
<searchListNotFound>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<searchListNotFound>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @searchListNotFound() {
ret i32 1
}

LLVM IR (-O2):
define i32 @searchListNotFound() {
ret i32 1
}
int overloaded2() { return 0; }


x86 assembly (clang, -O0):
<overloaded2>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<overloaded2>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @overloaded2() {
ret i32 0
}

LLVM IR (-O2):
define i32 @overloaded2() {
ret i32 0
}
/* Variables and functions */
double exp(double);
double ECexp(double x) {
  double y;
  double r;
  y = x;
  r = exp(y);
  return (r);
}


x86 assembly (clang, -O0):
<ECexp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <exp@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ECexp>:
jmp    1030 <exp@plt>

LLVM IR (-O0):
define double @ECexp(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %2
%5 = load double, double* %2
store double %5, double* %3
%6 = load double, double* %3
%7 = call double @exp(double %6)
store double %7, double* %4
%8 = load double, double* %4
ret double %8
}

LLVM IR (-O2):
define double @ECexp(double %0) {
%2 = tail call double @exp(double %0)
ret double %2
}
void perform_write_adios_kernels_(void) {}


x86 assembly (clang, -O0):
<perform_write_adios_kernels_>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perform_write_adios_kernels_>:
ret

LLVM IR (-O0):
define void @perform_write_adios_kernels_() {
ret void
}

LLVM IR (-O2):
define void @perform_write_adios_kernels_() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ plcvm_get_s8(int /*<<< orphan*/);
int /*<<< orphan*/ plcvm_lpm_u16();
int /*<<< orphan*/ plcvm_push(int /*<<< orphan*/);
void cb_ldm_s1_c16(void) { plcvm_push(plcvm_get_s8(plcvm_lpm_u16())); }


x86 assembly (clang, -O0):
<cb_ldm_s1_c16>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <plcvm_lpm_u16@plt>
mov    %eax,%edi
call   1050 <plcvm_get_s8@plt>
mov    %eax,%edi
call   1040 <plcvm_push@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cb_ldm_s1_c16>:
push   %rax
xor    %eax,%eax
call   1030 <plcvm_lpm_u16@plt>
mov    %eax,%edi
call   1050 <plcvm_get_s8@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <plcvm_push@plt>

LLVM IR (-O0):
define void @cb_ldm_s1_c16() {
%1 = call i32 (...) @plcvm_lpm_u16()
%2 = call i32 @plcvm_get_s8(i32 %1)
%3 = call i32 @plcvm_push(i32 %2)
ret void
}

LLVM IR (-O2):
define void @cb_ldm_s1_c16() {
%1 = tail call i32 (...) @plcvm_lpm_u16()
%2 = tail call i32 @plcvm_get_s8(i32 %1)
%3 = tail call i32 @plcvm_push(i32 %2)
ret void
}
/* Type definitions */
typedef scalar_t__ time_t;
struct timeval {
  scalar_t__ tv_sec;
};

/* Variables and functions */
time_t delta_time_in_seconds(struct timeval *t2, struct timeval *t1) {
  return t2->tv_sec - t1->tv_sec;
}


x86 assembly (clang, -O0):
<delta_time_in_seconds>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<delta_time_in_seconds>:
mov    (%rdi),%rax
sub    (%rsi),%rax
ret

LLVM IR (-O0):
%struct.timeval = type { i64 }
define i64 @delta_time_in_seconds(%struct.timeval* %0, %struct.timeval* %1) {
%3 = alloca %struct.timeval*
%4 = alloca %struct.timeval*
store %struct.timeval* %0, %struct.timeval** %3
store %struct.timeval* %1, %struct.timeval** %4
%5 = load %struct.timeval*, %struct.timeval** %3
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = load %struct.timeval*, %struct.timeval** %4
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %8, i32 0, i32 0
%10 = load i64, i64* %9
%11 = sub nsw i64 %7, %10
ret i64 %11
}

LLVM IR (-O2):
%struct.timeval = type { i64 }
define i64 @delta_time_in_seconds(%struct.timeval* nocapture %0, %struct.timeval* nocapture %1) {
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
%4 = load i64, i64* %3
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%6 = load i64, i64* %5
%7 = sub nsw i64 %4, %6
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, float *);
int main() {
  float M, K;
  printf("m/h: ");
  scanf("%f", &M);
  K = M * 3.6;
  printf("m/s para km/h: %f\n", K);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xed2(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xea2(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
lea    0xe96(%rip),%rdi
mov    $0x1,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee0(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
movss  0x4(%rsp),%xmm0
cvtss2sd %xmm0,%xmm0
mulsd  0xeae(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
cvtss2sd %xmm0,%xmm0
lea    0xeb0(%rip),%rdi
mov    $0x1,%al
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"m/h: \00"
@.str.1 = [3 x i8] c"%f\00"
@.str.2 = [19 x i8] c"m/s para km/h: %f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca float
%3 = alloca float
store i32 0, i32* %1
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), float* %2)
%6 = load float, float* %2
%7 = fpext float %6 to double
%8 = fmul double %7, 3.600000e+00
%9 = fptrunc double %8 to float
store float %9, float* %3
%10 = load float, float* %3
%11 = fpext float %10 to double
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.2, i64 0, i64 0), double %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"m/h: \00"
@.str.1 = [3 x i8] c"%f\00"
@.str.2 = [19 x i8] c"m/s para km/h: %f\0A\00"
define i32 @main() {
%1 = alloca float
%2 = bitcast float* %1 to i8*
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), float* %1)
%5 = load float, float* %1
%6 = fpext float %5 to double
%7 = fmul double %6, 3.600000e+00
%8 = fptrunc double %7 to float
%9 = fpext float %8 to double
%10 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @.str.2, i64 0, i64 0), double %9)
ret i32 0
}
long int labs(long int j) { return (j < 0) ? -j : j; }


x86 assembly (clang, -O0):
<labs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jge    1122 <labs+0x22>
xor    %eax,%eax
sub    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    112a <labs+0x2a>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<labs>:
mov    %rdi,%rax
neg    %rax
cmovs  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @labs(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp slt i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i64, i64* %2
%7 = sub nsw i64 0, %6
br label %10
8: ; preds = %1
%9 = load i64, i64* %2
br label %10
10: ; preds = %8, %5
%11 = phi i64 [ %7, %5 ], [ %9, %8 ]
ret i64 %11
}

LLVM IR (-O2):
define i64 @labs(i64 %0) {
%2 = tail call i64 @llvm.abs.i64(i64 %0, i1 true)
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int stoi(char *);
int /*<<< orphan*/ system(char *);
void main() {
  int result = stoi("1234");
  assert(result == 1234);
  system("pause");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
call   1050 <stoi@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x4d2,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
lea    0xea3(%rip),%rdi
call   1030 <system@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
call   1050 <stoi@plt>
xor    %edi,%edi
cmp    $0x4d2,%eax
sete   %dil
call   1040 <assert@plt>
lea    0xeb1(%rip),%rdi
pop    %rax
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"1234\00"
@.str.1 = [6 x i8] c"pause\00"
define void @main() {
%1 = alloca i32
%2 = call i32 @stoi(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, 1234
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
%7 = call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"1234\00"
@.str.1 = [6 x i8] c"pause\00"
define void @main() {
%1 = tail call i32 @stoi(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i32 %1, 1234
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = tail call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isbdigit(int);
void t_isbdigit_0xfb() {
  Assert_real((isbdigit(251) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isbdigit.c",
              1260, ("isbdigit should be 0 for 0xfb"));
}


x86 assembly (clang, -O0):
<t_isbdigit_0xfb>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfb,%edi
call   1040 <isbdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4ec,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isbdigit_0xfb>:
push   %rax
mov    $0xfb,%edi
call   1040 <isbdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x4ec,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0xfb\00"
define void @t_isbdigit_0xfb() {
%1 = call i64 @isbdigit(i32 251)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1260, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0xfb\00"
define void @t_isbdigit_0xfb() {
%1 = tail call i64 @isbdigit(i32 251)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1260, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void **);
void cm_nfree_2d(void **vector, size_t x_size) {
  size_t index;
  for (index = 0; index < x_size; index++) {
    free(vector[index]);
  }
  free(vector);
}


x86 assembly (clang, -O0):
<cm_nfree_2d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1158 <cm_nfree_2d+0x48>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1128 <cm_nfree_2d+0x18>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cm_nfree_2d>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
test   %rsi,%rsi
je     1142 <cm_nfree_2d+0x32>
mov    %rsi,%r15
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    (%r14,%rbx,8),%rdi
call   1030 <free@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <cm_nfree_2d+0x20>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @cm_nfree_2d(i8** %0, i64 %1) {
%3 = alloca i8**
%4 = alloca i64
%5 = alloca i64
store i8** %0, i8*** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %17, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8**, i8*** %3
%12 = load i64, i64* %5
%13 = getelementptr inbounds i8*, i8** %11, i64 %12
%14 = load i8*, i8** %13
%15 = bitcast i8* %14 to i8**
%16 = call i32 @free(i8** %15)
br label %17
17: ; preds = %10
%18 = load i64, i64* %5
%19 = add i64 %18, 1
store i64 %19, i64* %5
br label %6
20: ; preds = %6
%21 = load i8**, i8*** %3
%22 = call i32 @free(i8** %21)
ret void
}

LLVM IR (-O2):
define void @cm_nfree_2d(i8** nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %12, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %10, %4 ], [ 0, %2 ]
%6 = getelementptr inbounds i8*, i8** %0, i64 %5
%7 = bitcast i8** %6 to i8***
%8 = load i8**, i8*** %7
%9 = tail call i32 @free(i8** %8)
%10 = add nuw i64 %5, 1
%11 = icmp eq i64 %10, %1
br i1 %11, label %12, label %4
12: ; preds = %4, %2
%13 = tail call i32 @free(i8** %0)
ret void
}
int main(void) {
  int twenty = 20;
  int two = 2;
  return twenty + twenty + two;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x14,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 20, i32* %2
store i32 2, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %2
%6 = add nsw i32 %4, %5
%7 = load i32, i32* %3
%8 = add nsw i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @main() {
ret i32 42
}
/* Variables and functions */
void *__coverity_alloc__(int);
int /*<<< orphan*/ __coverity_mark_as_afm_allocated__(void *, char *);
void *H5Fcreate(const char *name, unsigned flags, void *fcpl_id,
                void *fapl_id) {
  void *id = __coverity_alloc__(10);
  __coverity_mark_as_afm_allocated__(id, "H5Fclose");
  return id;
}


x86 assembly (clang, -O0):
<H5Fcreate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    $0xa,%edi
call   1040 <__coverity_alloc__@plt>
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rdi
lea    0xeb0(%rip),%rsi
call   1030 <__coverity_mark_as_afm_allocated__@plt>
mov    -0x28(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<H5Fcreate>:
push   %rbx
mov    $0xa,%edi
call   1040 <__coverity_alloc__@plt>
mov    %rax,%rbx
lea    0xecb(%rip),%rsi
mov    %rax,%rdi
call   1030 <__coverity_mark_as_afm_allocated__@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"H5Fclose\00"
define i8* @H5Fcreate(i8* %0, i32 %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i8*
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%10 = call i8* @__coverity_alloc__(i32 10)
store i8* %10, i8** %9
%11 = load i8*, i8** %9
%12 = call i32 @__coverity_mark_as_afm_allocated__(i8* %11, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%13 = load i8*, i8** %9
ret i8* %13
}

LLVM IR (-O2):
@.str = [9 x i8] c"H5Fclose\00"
define i8* @H5Fcreate(i8* nocapture readnone %0, i32 %1, i8* nocapture readnone %2, i8* nocapture readnone %3) {
%5 = tail call i8* @__coverity_alloc__(i32 10)
%6 = tail call i32 @__coverity_mark_as_afm_allocated__(i8* %5, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret i8* %5
}
void dtot(double *dt, struct timespec *t) { return; }


x86 assembly (clang, -O0):
<dtot>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dtot>:
ret

LLVM IR (-O0):
%struct.timespec = type opaque
define void @dtot(double* %0, %struct.timespec* %1) {
%3 = alloca double*
%4 = alloca %struct.timespec*
store double* %0, double** %3
store %struct.timespec* %1, %struct.timespec** %4
ret void
}

LLVM IR (-O2):
%struct.timespec = type opaque
define void @dtot(double* nocapture %0, %struct.timespec* nocapture %1) {
ret void
}
double normalize(double value, double min, double max) {
  return (value * ((double)1 / (max - min)) + (min / (min - max)));
}


x86 assembly (clang, -O0):
<normalize>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
subsd  -0x10(%rbp),%xmm1
movsd  0xed6(%rip),%xmm2
divsd  %xmm1,%xmm2
movsd  -0x10(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm3
subsd  -0x18(%rbp),%xmm3
divsd  %xmm3,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<normalize>:
movapd %xmm1,%xmm3
subsd  %xmm2,%xmm3
subsd  %xmm1,%xmm2
movsd  0xeec(%rip),%xmm4
divsd  %xmm2,%xmm4
divsd  %xmm3,%xmm1
mulsd  %xmm4,%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @normalize(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %6
%9 = load double, double* %5
%10 = fsub double %8, %9
%11 = fdiv double 1.000000e+00, %10
%12 = load double, double* %5
%13 = load double, double* %5
%14 = load double, double* %6
%15 = fsub double %13, %14
%16 = fdiv double %12, %15
%17 = call double @llvm.fmuladd.f64(double %7, double %11, double %16)
ret double %17
}

LLVM IR (-O2):
define double @normalize(double %0, double %1, double %2) {
%4 = fsub double %2, %1
%5 = fdiv double 1.000000e+00, %4
%6 = fsub double %1, %2
%7 = fdiv double %1, %6
%8 = tail call double @llvm.fmuladd.f64(double %0, double %5, double %7)
ret double %8
}
/* Type definitions */
struct mypacket {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ send_fake_SYN_ACK(struct mypacket *, unsigned int);
int /*<<< orphan*/ usleep(int);
int x17_process_syn(struct mypacket *packet) {
  unsigned int saflags = (1 << 4);
  if (1) {
    saflags |= 1;
  }
  if (1) {
    saflags |= (1 << 1);
  }
  send_fake_SYN_ACK(packet, saflags);
  usleep(20000);
  send_fake_SYN_ACK(packet, saflags);
  usleep(20000);
  send_fake_SYN_ACK(packet, saflags);
  return 1;
}


x86 assembly (clang, -O0):
<x17_process_syn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x10,-0xc(%rbp)
mov    -0xc(%rbp),%eax
or     $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
or     $0x2,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <send_fake_SYN_ACK@plt>
mov    $0x4e20,%edi
call   1040 <usleep@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <send_fake_SYN_ACK@plt>
mov    $0x4e20,%edi
call   1040 <usleep@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <send_fake_SYN_ACK@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x17_process_syn>:
push   %rbx
mov    %rdi,%rbx
mov    $0x13,%esi
call   1030 <send_fake_SYN_ACK@plt>
mov    $0x4e20,%edi
call   1040 <usleep@plt>
mov    %rbx,%rdi
mov    $0x13,%esi
call   1030 <send_fake_SYN_ACK@plt>
mov    $0x4e20,%edi
call   1040 <usleep@plt>
mov    %rbx,%rdi
mov    $0x13,%esi
call   1030 <send_fake_SYN_ACK@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.mypacket = type { i32 }
define i32 @x17_process_syn(%struct.mypacket* %0) {
%2 = alloca %struct.mypacket*
%3 = alloca i32
store %struct.mypacket* %0, %struct.mypacket** %2
store i32 16, i32* %3
%4 = load i32, i32* %3
%5 = or i32 %4, 1
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = or i32 %6, 2
store i32 %7, i32* %3
%8 = load %struct.mypacket*, %struct.mypacket** %2
%9 = load i32, i32* %3
%10 = call i32 @send_fake_SYN_ACK(%struct.mypacket* %8, i32 %9)
%11 = call i32 @usleep(i32 20000)
%12 = load %struct.mypacket*, %struct.mypacket** %2
%13 = load i32, i32* %3
%14 = call i32 @send_fake_SYN_ACK(%struct.mypacket* %12, i32 %13)
%15 = call i32 @usleep(i32 20000)
%16 = load %struct.mypacket*, %struct.mypacket** %2
%17 = load i32, i32* %3
%18 = call i32 @send_fake_SYN_ACK(%struct.mypacket* %16, i32 %17)
ret i32 1
}

LLVM IR (-O2):
%struct.mypacket = type { i32 }
define i32 @x17_process_syn(%struct.mypacket* %0) {
%2 = tail call i32 @send_fake_SYN_ACK(%struct.mypacket* %0, i32 19)
%3 = tail call i32 @usleep(i32 20000)
%4 = tail call i32 @send_fake_SYN_ACK(%struct.mypacket* %0, i32 19)
%5 = tail call i32 @usleep(i32 20000)
%6 = tail call i32 @send_fake_SYN_ACK(%struct.mypacket* %0, i32 19)
ret i32 1
}
void xlContinue(void) {}


x86 assembly (clang, -O0):
<xlContinue>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xlContinue>:
ret

LLVM IR (-O0):
define void @xlContinue() {
ret void
}

LLVM IR (-O2):
define void @xlContinue() {
ret void
}
void CC112x_IsrCrcOk(void) {}


x86 assembly (clang, -O0):
<CC112x_IsrCrcOk>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC112x_IsrCrcOk>:
ret

LLVM IR (-O0):
define void @CC112x_IsrCrcOk() {
ret void
}

LLVM IR (-O2):
define void @CC112x_IsrCrcOk() {
ret void
}
/* Variables and functions */
scalar_t__ HTTPWrapperIsAscii(int);
int HTTPWrapperIsAlpha(int c) {
  if (HTTPWrapperIsAscii(c) > 0) {
    if ((c >= 97 && c <= 122) || (c >= 65 && c <= 90)) {
      return c;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<HTTPWrapperIsAlpha>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <HTTPWrapperIsAscii@plt>
cmp    $0x0,%rax
jle    1165 <HTTPWrapperIsAlpha+0x55>
cmpl   $0x61,-0x8(%rbp)
jl     1141 <HTTPWrapperIsAlpha+0x31>
cmpl   $0x7a,-0x8(%rbp)
jle    1155 <HTTPWrapperIsAlpha+0x45>
cmpl   $0x41,-0x8(%rbp)
jl     1160 <HTTPWrapperIsAlpha+0x50>
cmpl   $0x5a,-0x8(%rbp)
jg     1160 <HTTPWrapperIsAlpha+0x50>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    116c <HTTPWrapperIsAlpha+0x5c>
jmp    1165 <HTTPWrapperIsAlpha+0x55>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HTTPWrapperIsAlpha>:
push   %rbx
mov    %edi,%ebx
call   1030 <HTTPWrapperIsAscii@plt>
test   %rax,%rax
jle    112a <HTTPWrapperIsAlpha+0x1a>
mov    %ebx,%eax
and    $0xffffffdf,%eax
add    $0xffffffbf,%eax
cmp    $0x1a,%eax
jb     112c <HTTPWrapperIsAlpha+0x1c>
xor    %ebx,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @HTTPWrapperIsAlpha(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @HTTPWrapperIsAscii(i32 %4)
%6 = icmp sgt i64 %5, 0
br i1 %6, label %7, label %22
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp sge i32 %8, 97
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = load i32, i32* %3
%12 = icmp sle i32 %11, 122
br i1 %12, label %19, label %13
13: ; preds = %10, %7
%14 = load i32, i32* %3
%15 = icmp sge i32 %14, 65
br i1 %15, label %16, label %21
16: ; preds = %13
%17 = load i32, i32* %3
%18 = icmp sle i32 %17, 90
br i1 %18, label %19, label %21
19: ; preds = %16, %10
%20 = load i32, i32* %3
store i32 %20, i32* %2
br label %23
21: ; preds = %16, %13
br label %22
22: ; preds = %21, %1
store i32 0, i32* %2
br label %23
23: ; preds = %22, %19
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @HTTPWrapperIsAlpha(i32 %0) {
%2 = tail call i64 @HTTPWrapperIsAscii(i32 %0)
%3 = icmp sgt i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = and i32 %0, -33
%6 = add i32 %5, -65
%7 = icmp ult i32 %6, 26
br i1 %7, label %9, label %8
8: ; preds = %4, %1
br label %9
9: ; preds = %4, %8
%10 = phi i32 [ 0, %8 ], [ %0, %4 ]
ret i32 %10
}
int my_mod(int x, int y) { return (x % y); }


x86 assembly (clang, -O0):
<my_mod>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_mod>:
mov    %edi,%eax
cltd
idiv   %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @my_mod(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = srem i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @my_mod(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
ret i32 %3
}
int fun197() { return 197; }


x86 assembly (clang, -O0):
<fun197>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun197>:
mov    $0xc5,%eax
ret

LLVM IR (-O0):
define i32 @fun197() {
ret i32 197
}

LLVM IR (-O2):
define i32 @fun197() {
ret i32 197
}
/* Variables and functions */
int fatReadFile(char *, char *);
int main() {
  int returnValue = 0;
  returnValue = fatReadFile("test.img", "README.TXT");
  return returnValue;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
lea    0xed3(%rip),%rdi
lea    0xed5(%rip),%rsi
call   1030 <fatReadFile@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xee9(%rip),%rdi
lea    0xeeb(%rip),%rsi
jmp    1030 <fatReadFile@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"test.img\00"
@.str.1 = [11 x i8] c"README.TXT\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = call i32 @fatReadFile(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
store i32 %3, i32* %2
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
@.str = [9 x i8] c"test.img\00"
@.str.1 = [11 x i8] c"README.TXT\00"
define i32 @main() {
%1 = tail call i32 @fatReadFile(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ get_ir_grid_map(long *, long ***, int const, long const *,
                                   long const *);
void grg_get_ir_grid_map(long ir_grid_indices[], long (*rotations)[3][3],
                         const int num_rot, const long D_diag[3],
                         const long PS[3]) {
  get_ir_grid_map(ir_grid_indices, rotations, num_rot, D_diag, PS);
}


x86 assembly (clang, -O0):
<grg_get_ir_grid_map>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
call   1030 <get_ir_grid_map@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<grg_get_ir_grid_map>:
jmp    1030 <get_ir_grid_map@plt>

LLVM IR (-O0):
define void @grg_get_ir_grid_map(i64* %0, [3 x [3 x i64]]* %1, i32 %2, i64* %3, i64* %4) {
%6 = alloca i64*
%7 = alloca [3 x [3 x i64]]*
%8 = alloca i32
%9 = alloca i64*
%10 = alloca i64*
store i64* %0, i64** %6
store [3 x [3 x i64]]* %1, [3 x [3 x i64]]** %7
store i32 %2, i32* %8
store i64* %3, i64** %9
store i64* %4, i64** %10
%11 = load i64*, i64** %6
%12 = load [3 x [3 x i64]]*, [3 x [3 x i64]]** %7
%13 = bitcast [3 x [3 x i64]]* %12 to i64***
%14 = load i32, i32* %8
%15 = load i64*, i64** %9
%16 = load i64*, i64** %10
%17 = call i32 @get_ir_grid_map(i64* %11, i64*** %13, i32 %14, i64* %15, i64* %16)
ret void
}

LLVM IR (-O2):
define void @grg_get_ir_grid_map(i64* %0, [3 x [3 x i64]]* %1, i32 %2, i64* %3, i64* %4) {
%6 = bitcast [3 x [3 x i64]]* %1 to i64***
%7 = tail call i32 @get_ir_grid_map(i64* %0, i64*** %6, i32 %2, i64* %3, i64* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ put32(unsigned long);
int /*<<< orphan*/ put8(unsigned long);
void adc_reg32_m32(unsigned long reg32, void *_m32) {
  unsigned long *m32 = (unsigned long *)_m32;
  put8(0x13);
  put8((reg32 << 3) | 5);
  put32((unsigned long)(m32));
}


x86 assembly (clang, -O0):
<adc_reg32_m32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    $0x13,%edi
call   1030 <put8@plt>
mov    -0x8(%rbp),%rdi
shl    $0x3,%rdi
or     $0x5,%rdi
call   1030 <put8@plt>
mov    -0x18(%rbp),%rdi
call   1040 <put32@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<adc_reg32_m32>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    $0x13,%edi
call   1030 <put8@plt>
lea    0x5(,%rbx,8),%rdi
call   1030 <put8@plt>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <put32@plt>

LLVM IR (-O0):
define void @adc_reg32_m32(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i64*
store i64 %0, i64* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i64*
store i64* %7, i64** %5
%8 = call i32 @put8(i64 19)
%9 = load i64, i64* %3
%10 = shl i64 %9, 3
%11 = or i64 %10, 5
%12 = call i32 @put8(i64 %11)
%13 = load i64*, i64** %5
%14 = ptrtoint i64* %13 to i64
%15 = call i32 @put32(i64 %14)
ret void
}

LLVM IR (-O2):
define void @adc_reg32_m32(i64 %0, i8* %1) {
%3 = tail call i32 @put8(i64 19)
%4 = shl i64 %0, 3
%5 = or i64 %4, 5
%6 = tail call i32 @put8(i64 %5)
%7 = ptrtoint i8* %1 to i64
%8 = tail call i32 @put32(i64 %7)
ret void
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int x, y, z;
  x = __VERIFIER_nondet_int();
  y = __VERIFIER_nondet_int();
  z = __VERIFIER_nondet_int();
  while (x >= 0 && x <= z) {
    x = 2 * x + y;
    y = y + 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x10(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0x11(%rbp)
jl     1158 <main+0x48>
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
setle  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    1168 <main+0x58>
jmp    1182 <main+0x72>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    113d <main+0x2d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %5, i32* %2
%6 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %6, i32* %3
%7 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %7, i32* %4
br label %8
8: ; preds = %17, %0
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %8
%12 = load i32, i32* %2
%13 = load i32, i32* %4
%14 = icmp sle i32 %12, %13
br label %15
15: ; preds = %11, %8
%16 = phi i1 [ false, %8 ], [ %14, %11 ]
br i1 %16, label %17, label %24
17: ; preds = %15
%18 = load i32, i32* %2
%19 = mul nsw i32 2, %18
%20 = load i32, i32* %3
%21 = add nsw i32 %19, %20
store i32 %21, i32* %2
%22 = load i32, i32* %3
%23 = add nsw i32 %22, 1
store i32 %23, i32* %3
br label %8
24: ; preds = %15
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 (...) @__VERIFIER_nondet_int()
%3 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}
OP(ed, df) { illegal_2(); }


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <illegal_2@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
xor    %eax,%eax
jmp    1030 <illegal_2@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @illegal_2()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @illegal_2()
ret i32 undef
}
int ascii_tolower(int c) {
  if (c >= 'A' || c <= 'Z') {
    return c + ('a' - 'A');
  }
  return c;
}


x86 assembly (clang, -O0):
<ascii_tolower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x41,-0x8(%rbp)
jge    111b <ascii_tolower+0x1b>
cmpl   $0x5a,-0x8(%rbp)
jg     1129 <ascii_tolower+0x29>
mov    -0x8(%rbp),%eax
add    $0x20,%eax
mov    %eax,-0x4(%rbp)
jmp    112f <ascii_tolower+0x2f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ascii_tolower>:
lea    0x20(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @ascii_tolower(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 65
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 90
br i1 %8, label %9, label %12
9: ; preds = %6, %1
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 32
store i32 %11, i32* %2
br label %14
12: ; preds = %6
%13 = load i32, i32* %3
store i32 %13, i32* %2
br label %14
14: ; preds = %12, %9
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @ascii_tolower(i32 %0) {
%2 = add nsw i32 %0, 32
ret i32 %2
}
void readStatement2Exp(struct expRex *obj, const char *input) {}


x86 assembly (clang, -O0):
<readStatement2Exp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<readStatement2Exp>:
ret

LLVM IR (-O0):
%struct.expRex = type opaque
define void @readStatement2Exp(%struct.expRex* %0, i8* %1) {
%3 = alloca %struct.expRex*
%4 = alloca i8*
store %struct.expRex* %0, %struct.expRex** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
%struct.expRex = type opaque
define void @readStatement2Exp(%struct.expRex* nocapture %0, i8* nocapture %1) {
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef unsigned long uint32_t;

/* Variables and functions */
uint64_t TimerMatchGet64(uint32_t ui32Base) {
  uint32_t ui32High1, ui32High2, ui32Low;
  ;
  do {
    ui32High1 = (*((volatile unsigned long *)(ui32Base + 0x00000034)));
    ui32Low = (*((volatile unsigned long *)(ui32Base + 0x00000030)));
    ui32High2 = (*((volatile unsigned long *)(ui32Base + 0x00000034)));
  } while (ui32High1 != ui32High2);
  return (((uint64_t)ui32High1 << 32) | (uint64_t)ui32Low);
}


x86 assembly (clang, -O0):
<TimerMatchGet64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x34(%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0x30(%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    0x34(%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jne    1108 <TimerMatchGet64+0x8>
mov    -0x10(%rbp),%rax
mov    $0x20,%ecx
shl    %cl,%eax
mov    -0x20(%rbp),%rcx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerMatchGet64>:
mov    0x34(%rdi),%rax
mov    0x30(%rdi),%rcx
cmp    0x34(%rdi),%rax
jne    1100 <TimerMatchGet64>
ret

LLVM IR (-O0):
define i32 @TimerMatchGet64(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %2
br label %6
6: ; preds = %19, %1
%7 = load i64, i64* %2
%8 = add i64 %7, 52
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
store i64 %10, i64* %3
%11 = load i64, i64* %2
%12 = add i64 %11, 48
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
store i64 %14, i64* %5
%15 = load i64, i64* %2
%16 = add i64 %15, 52
%17 = inttoptr i64 %16 to i64*
%18 = load volatile i64, i64* %17
store i64 %18, i64* %4
br label %19
19: ; preds = %6
%20 = load i64, i64* %3
%21 = load i64, i64* %4
%22 = icmp ne i64 %20, %21
br i1 %22, label %6, label %23
23: ; preds = %19
%24 = load i64, i64* %3
%25 = trunc i64 %24 to i32
%26 = shl i32 %25, 32
%27 = load i64, i64* %5
%28 = trunc i64 %27 to i32
%29 = or i32 %26, %28
ret i32 %29
}

LLVM IR (-O2):
define i32 @TimerMatchGet64(i64 %0) {
%2 = add i64 %0, 52
%3 = inttoptr i64 %2 to i64*
%4 = add i64 %0, 48
%5 = inttoptr i64 %4 to i64*
br label %6
6: ; preds = %6, %1
%7 = load volatile i64, i64* %3
%8 = load volatile i64, i64* %5
%9 = load volatile i64, i64* %3
%10 = icmp eq i64 %7, %9
br i1 %10, label %11, label %6
11: ; preds = %6
ret i32 poison
}