xunge/DecIR huggingface dataset:
/* Variables and functions */
int errno;
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char const *, int, char *);
char *strerror(int);
void displayError(const char *on_what) {
  printf("%s: (%d)%s\n", on_what, errno, strerror(errno));
  exit(1);
}


x86 assembly (clang, -O0):
<displayError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    0x2e95(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    0x2e89(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
mov    -0x18(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    %rax,%rcx
lea    0xe91(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<displayError>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2ea3(%rip),%rax
mov    (%rax),%ebp
mov    %ebp,%edi
call   1050 <strerror@plt>
lea    0xeb3(%rip),%rdi
mov    %rbx,%rsi
mov    %ebp,%edx
mov    %rax,%rcx
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"%s: (%d)%s\0A\00"
@errno = global i32 0
define void @displayError(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @errno
%5 = load i32, i32* @errno
%6 = call i8* @strerror(i32 %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %3, i32 %4, i8* %6)
%8 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [12 x i8] c"%s: (%d)%s\0A\00"
@errno = global i32 0
define void @displayError(i8* %0) {
%2 = load i32, i32* @errno
%3 = tail call i8* @strerror(i32 %2)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %2, i8* %3)
%5 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ handle_46(int /*<<< orphan*/);
int gen_46() {
  handle_46(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_46>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_46@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_46>:
push   %rax
xor    %edi,%edi
call   1030 <handle_46@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_46() {
%1 = call i32 @handle_46(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_46() {
%1 = tail call i32 @handle_46(i32 0)
ret i32 0
}
char *ttgtpn() { return ("/dev/ttyS0"); }


x86 assembly (clang, -O0):
<ttgtpn>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ttgtpn>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [11 x i8] c"/dev/ttyS0\00"
define i8* @ttgtpn() {
ret i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [11 x i8] c"/dev/ttyS0\00"
define i8* @ttgtpn() {
ret i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0)
}
void val_delete_phoneset(void *v) { (void)v; }


x86 assembly (clang, -O0):
<val_delete_phoneset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<val_delete_phoneset>:
ret

LLVM IR (-O0):
define void @val_delete_phoneset(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @val_delete_phoneset(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcspn(char *, char *);
void uninitvar_strcspn(void) {
  char *cs;
  char *ct;
  (void)strcspn(cs, ct);
}


x86 assembly (clang, -O0):
<uninitvar_strcspn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcspn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_strcspn>:
ret

LLVM IR (-O0):
define void @uninitvar_strcspn() {
%1 = alloca i8*
%2 = alloca i8*
%3 = load i8*, i8** %1
%4 = load i8*, i8** %2
%5 = call i32 @strcspn(i8* %3, i8* %4)
ret void
}

LLVM IR (-O2):
define void @uninitvar_strcspn() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ GPIODirModeSet(int /*<<< orphan*/, int /*<<< orphan*/, int);
int /*<<< orphan*/ GPIOPadConfigSet(int /*<<< orphan*/, int /*<<< orphan*/, int,
                                    int);
void GPIOPinTypeHibernateRTCCLK(uint32_t ui32Port, uint8_t ui8Pins) {
  ;
  GPIODirModeSet(ui32Port, ui8Pins, 0x00000002);
  GPIOPadConfigSet(ui32Port, ui8Pins, 0x00000001, 0x00000008);
}


x86 assembly (clang, -O0):
<GPIOPinTypeHibernateRTCCLK>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x1,%edx
mov    $0x8,%ecx
call   1030 <GPIOPadConfigSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinTypeHibernateRTCCLK>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    %ebp,%edi
mov    %ebx,%esi
mov    $0x1,%edx
mov    $0x8,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <GPIOPadConfigSet@plt>

LLVM IR (-O0):
define void @GPIOPinTypeHibernateRTCCLK(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @GPIODirModeSet(i32 %5, i32 %6, i32 2)
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @GPIOPadConfigSet(i32 %8, i32 %9, i32 1, i32 8)
ret void
}

LLVM IR (-O2):
define void @GPIOPinTypeHibernateRTCCLK(i32 %0, i32 %1) {
%3 = tail call i32 @GPIODirModeSet(i32 %0, i32 %1, i32 2)
%4 = tail call i32 @GPIOPadConfigSet(i32 %0, i32 %1, i32 1, i32 8)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ volatile uint32_t;

/* Variables and functions */
uint32_t _aic_read32(uintptr_t addr) { return (*(volatile uint32_t *)addr); }


x86 assembly (clang, -O0):
<_aic_read32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_aic_read32>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @_aic_read32(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @_aic_read32(i64 %0) {
%2 = inttoptr i64 %0 to i32*
%3 = load volatile i32, i32* %2
ret i32 %3
}
unsigned int str_copy(char *out, const char *in) {
  unsigned int len = 0;
  while ((out[len] = in[len]))
    len++;
  return len;
}


x86 assembly (clang, -O0):
<str_copy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
mov    (%rax,%rcx,1),%al
mov    -0x8(%rbp),%rcx
mov    -0x14(%rbp),%edx
mov    %al,(%rcx,%rdx,1)
cmp    $0x0,%al
je     113d <str_copy+0x3d>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <str_copy+0x13>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_copy>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
movzbl (%rsi,%rax,1),%ecx
mov    %cl,(%rdi,%rax,1)
test   %cl,%cl
jne    1110 <str_copy+0x10>
ret

LLVM IR (-O0):
define i32 @str_copy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = zext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = load i8*, i8** %3
%13 = load i32, i32* %5
%14 = zext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
store i8 %11, i8* %15
%16 = icmp ne i8 %11, 0
br i1 %16, label %17, label %20
17: ; preds = %6
%18 = load i32, i32* %5
%19 = add i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
define i32 @str_copy(i8* nocapture writeonly %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ 0, %2 ], [ %10, %3 ]
%5 = zext i32 %4 to i64
%6 = getelementptr inbounds i8, i8* %1, i64 %5
%7 = load i8, i8* %6
%8 = getelementptr inbounds i8, i8* %0, i64 %5
store i8 %7, i8* %8
%9 = icmp eq i8 %7, 0
%10 = add i32 %4, 1
br i1 %9, label %11, label %3
11: ; preds = %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *malloc(int);
void mixedTypes(int a) {
  char *buf = malloc(1);
  int b = a + 1LL;
  if (a != 0 && (b - 1) == 0)
    return;
  int c = a + 1U;
  if (a != 0 && (c - 1) == 0)
    return;
  free(buf);
}


x86 assembly (clang, -O0):
<mixedTypes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
movslq -0x4(%rbp),%rax
add    $0x1,%rax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1162 <mixedTypes+0x42>
mov    -0x14(%rbp),%eax
sub    $0x1,%eax
cmp    $0x0,%eax
jne    1162 <mixedTypes+0x42>
jmp    1192 <mixedTypes+0x72>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1189 <mixedTypes+0x69>
mov    -0x18(%rbp),%eax
sub    $0x1,%eax
cmp    $0x0,%eax
jne    1189 <mixedTypes+0x69>
jmp    1192 <mixedTypes+0x72>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mixedTypes>:
push   %rax
mov    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,%rdi
pop    %rax
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @mixedTypes(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = call i8* @malloc(i32 1)
store i8* %6, i8** %3
%7 = load i32, i32* %2
%8 = sext i32 %7 to i64
%9 = add nsw i64 %8, 1
%10 = trunc i64 %9 to i32
store i32 %10, i32* %4
%11 = load i32, i32* %2
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %18
13: ; preds = %1
%14 = load i32, i32* %4
%15 = sub nsw i32 %14, 1
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %13
br label %31
18: ; preds = %13, %1
%19 = load i32, i32* %2
%20 = add i32 %19, 1
store i32 %20, i32* %5
%21 = load i32, i32* %2
%22 = icmp ne i32 %21, 0
br i1 %22, label %23, label %28
23: ; preds = %18
%24 = load i32, i32* %5
%25 = sub nsw i32 %24, 1
%26 = icmp eq i32 %25, 0
br i1 %26, label %27, label %28
27: ; preds = %23
br label %31
28: ; preds = %23, %18
%29 = load i8*, i8** %3
%30 = call i32 @free(i8* %29)
br label %31
31: ; preds = %28, %27, %17
ret void
}

LLVM IR (-O2):
define void @mixedTypes(i32 %0) {
%2 = tail call dereferenceable_or_null(1) i8* @malloc(i32 1)
%3 = tail call i32 @free(i8* %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __uint32_t;

/* Variables and functions */
void _write_raw(__uint32_t *ptr, __uint32_t data) {
  *((volatile __uint32_t *)ptr) = data;
}


x86 assembly (clang, -O0):
<_write_raw>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_write_raw>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @_write_raw(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
store volatile i32 %5, i32* %6
ret void
}

LLVM IR (-O2):
define void @_write_raw(i32* %0, i32 %1) {
store volatile i32 %1, i32* %0
ret void
}
int test_imm_24uint16_mem(unsigned short *val) {
  return ((*val) & (0x24 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_24uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0x24,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_24uint16_mem>:
testb  $0x24,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_24uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 36
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_24uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 36
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *, int /*<<< orphan*/);
int copy_start_solutions_to_container(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc(7, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<copy_start_solutions_to_container>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x7,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_start_solutions_to_container>:
mov    $0x7,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @copy_start_solutions_to_container() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 7, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @copy_start_solutions_to_container() {
%1 = tail call i32 @_ada_use_c2phc(i32 7, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
void msm_panic_wdt_set(unsigned int timeout) {}


x86 assembly (clang, -O0):
<msm_panic_wdt_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<msm_panic_wdt_set>:
ret

LLVM IR (-O0):
define void @msm_panic_wdt_set(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @msm_panic_wdt_set(i32 %0) {
ret void
}
/* Variables and functions */
long rand();
long one_in(long one_in_howmany) {
  if (rand() < one_in_howmany)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<one_in>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cmp    -0x10(%rbp),%rax
jge    113a <one_in+0x2a>
movq   $0x1,-0x8(%rbp)
jmp    1142 <one_in+0x32>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<one_in>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <rand@plt>
xor    %ecx,%ecx
cmp    %rbx,%rax
setl   %cl
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @one_in(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = call i64 (...) @rand()
%5 = load i64, i64* %3
%6 = icmp slt i64 %4, %5
br i1 %6, label %7, label %8
7: ; preds = %1
store i64 1, i64* %2
br label %9
8: ; preds = %1
store i64 0, i64* %2
br label %9
9: ; preds = %8, %7
%10 = load i64, i64* %2
ret i64 %10
}

LLVM IR (-O2):
define i64 @one_in(i64 %0) {
%2 = tail call i64 (...) @rand()
%3 = icmp slt i64 %2, %0
%4 = zext i1 %3 to i64
ret i64 %4
}
int fn4(int i) { return i == 1 << -1; }


x86 assembly (clang, -O0):
<fn4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmp    %eax,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn4>:
ret

LLVM IR (-O0):
define i32 @fn4(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, poison
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @fn4(i32 %0) {
ret i32 poison
}
void RTLockValidatorRecExclDelete(void) {}


x86 assembly (clang, -O0):
<RTLockValidatorRecExclDelete>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTLockValidatorRecExclDelete>:
ret

LLVM IR (-O0):
define void @RTLockValidatorRecExclDelete() {
ret void
}

LLVM IR (-O2):
define void @RTLockValidatorRecExclDelete() {
ret void
}
void instruction(void) { return; }


x86 assembly (clang, -O0):
<instruction>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<instruction>:
ret

LLVM IR (-O0):
define void @instruction() {
ret void
}

LLVM IR (-O2):
define void @instruction() {
ret void
}
void directAddressInsert(int *T, int k, int x) { T[k] = x; }


x86 assembly (clang, -O0):
<directAddressInsert>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<directAddressInsert>:
movslq %esi,%rax
mov    %edx,(%rdi,%rax,4)
ret

LLVM IR (-O0):
define void @directAddressInsert(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
store i32 %7, i32* %11
ret void
}

LLVM IR (-O2):
define void @directAddressInsert(i32* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
store i32 %2, i32* %5
ret void
}
/* Variables and functions */
int read_spi_register(int);
int spi_control_read() { return read_spi_register(0x60); }


x86 assembly (clang, -O0):
<spi_control_read>:
push   %rbp
mov    %rsp,%rbp
mov    $0x60,%edi
call   1030 <read_spi_register@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_control_read>:
mov    $0x60,%edi
jmp    1030 <read_spi_register@plt>

LLVM IR (-O0):
define i32 @spi_control_read() {
%1 = call i32 @read_spi_register(i32 96)
ret i32 %1
}

LLVM IR (-O2):
define i32 @spi_control_read() {
%1 = tail call i32 @read_spi_register(i32 96)
ret i32 %1
}
int key(int x) {
  x += 64;
  x = -x;
  x -= 96;
  return -x;
}


x86 assembly (clang, -O0):
<key>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x40,%eax
mov    %eax,-0x4(%rbp)
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x60,%eax
mov    %eax,-0x4(%rbp)
xor    %eax,%eax
sub    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<key>:
lea    0xa0(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @key(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 64
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = sub nsw i32 0, %5
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 96
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = sub nsw i32 0, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @key(i32 %0) {
%2 = add i32 %0, 160
ret i32 %2
}
/* Variables and functions */
double frexp(double, int *);
scalar_t__ ldexp(double, int);
void inv_table_flt_round(float *ftmp) {
  int exp;
  double mnt;
  float descale;
  mnt = frexp((double)*ftmp, &exp);
  descale = (float)ldexp(1.0, exp + 15);
  *ftmp += descale;
  *ftmp -= descale;
}


x86 assembly (clang, -O0):
<inv_table_flt_round>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
cvtss2sd %xmm0,%xmm0
lea    -0xc(%rbp),%rdi
call   1040 <frexp@plt>
movsd  %xmm0,-0x18(%rbp)
mov    -0xc(%rbp),%edi
add    $0xf,%edi
movsd  0xeac(%rip),%xmm0
call   1030 <ldexp@plt>
cvtsi2ss %rax,%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  -0x1c(%rbp),%xmm0
mov    -0x8(%rbp),%rax
addss  (%rax),%xmm0
movss  %xmm0,(%rax)
movss  -0x1c(%rbp),%xmm1
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
subss  %xmm1,%xmm0
movss  %xmm0,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inv_table_flt_round>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movss  (%rdi),%xmm0
cvtss2sd %xmm0,%xmm0
lea    0xc(%rsp),%rdi
call   1040 <frexp@plt>
mov    0xc(%rsp),%edi
add    $0xf,%edi
movsd  0xeb7(%rip),%xmm0
call   1030 <ldexp@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
movss  (%rbx),%xmm1
addss  %xmm0,%xmm1
subss  %xmm0,%xmm1
movss  %xmm1,(%rbx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @inv_table_flt_round(float* %0) {
%2 = alloca float*
%3 = alloca i32
%4 = alloca double
%5 = alloca float
store float* %0, float** %2
%6 = load float*, float** %2
%7 = load float, float* %6
%8 = fpext float %7 to double
%9 = call double @frexp(double %8, i32* %3)
store double %9, double* %4
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 15
%12 = call i64 @ldexp(double 1.000000e+00, i32 %11)
%13 = sitofp i64 %12 to float
store float %13, float* %5
%14 = load float, float* %5
%15 = load float*, float** %2
%16 = load float, float* %15
%17 = fadd float %16, %14
store float %17, float* %15
%18 = load float, float* %5
%19 = load float*, float** %2
%20 = load float, float* %19
%21 = fsub float %20, %18
store float %21, float* %19
ret void
}

LLVM IR (-O2):
define void @inv_table_flt_round(float* nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = load float, float* %0
%5 = fpext float %4 to double
%6 = call double @frexp(double %5, i32* %2)
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 15
%9 = tail call i64 @ldexp(double 1.000000e+00, i32 %8)
%10 = sitofp i64 %9 to float
%11 = load float, float* %0
%12 = fadd float %11, %10
%13 = fsub float %12, %10
store float %13, float* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void g_world(void) { printf("Goodbye WOrld\n"); }


x86 assembly (clang, -O0):
<g_world>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_world>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"Goodbye WOrld\0A\00"
define void @g_world() {
%1 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [14 x i8] c"Goodbye WOrld\00"
define void @g_world() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void fz_free_default(void *opaque, void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<fz_free_default>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fz_free_default>:
mov    %rsi,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @fz_free_default(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
define void @fz_free_default(i8* nocapture readnone %0, i8* nocapture %1) {
%3 = tail call i32 @free(i8* %1)
ret void
}
/* Variables and functions */
float atanf(float);
float libm_atanf(float x) { return atanf(x); }


x86 assembly (clang, -O0):
<libm_atanf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <atanf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libm_atanf>:
jmp    1030 <atanf@plt>

LLVM IR (-O0):
define float @libm_atanf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @atanf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @libm_atanf(float %0) {
%2 = tail call float @atanf(float %0)
ret float %2
}
/* Variables and functions */
bool is_big_endian() {
  unsigned int a = 0x1;
  unsigned char b = *(unsigned char *)&a;
  if (b == 0) {
    return true;
  }
  return false;
}


x86 assembly (clang, -O0):
<is_big_endian>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%al
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
cmp    $0x0,%eax
jne    112a <is_big_endian+0x2a>
movl   $0x1,-0x4(%rbp)
jmp    1131 <is_big_endian+0x31>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_big_endian>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_big_endian() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8
store i32 1, i32* %2
%4 = bitcast i32* %2 to i8*
%5 = load i8, i8* %4
store i8 %5, i8* %3
%6 = load i8, i8* %3
%7 = zext i8 %6 to i32
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %0
store i32 1, i32* %1
br label %11
10: ; preds = %0
store i32 0, i32* %1
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_big_endian() {
ret i32 0
}
/* Variables and functions */
int demoImplicitInt(int);
int /*<<< orphan*/ printf(char *, int);
int returnImplicitInt();
int main(void) {
  int x;
  int y;
  x = returnImplicitInt();
  y = demoImplicitInt(82);
  printf("x is %d\n", x);
  printf("y is %d\n", y);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <returnImplicitInt@plt>
mov    %eax,-0x8(%rbp)
mov    $0x52,%edi
call   1040 <demoImplicitInt@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%esi
lea    0xea0(%rip),%rdi
call   1030 <printf@plt>
mov    -0xc(%rbp),%esi
lea    0xe9a(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
xor    %eax,%eax
call   1050 <returnImplicitInt@plt>
mov    %eax,%ebx
mov    $0x52,%edi
call   1040 <demoImplicitInt@plt>
mov    %eax,%ebp
lea    0xeb1(%rip),%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
lea    0xeac(%rip),%rdi
mov    %ebp,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [9 x i8] c"x is %d\0A\00"
@.str.1 = [9 x i8] c"y is %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @returnImplicitInt()
store i32 %4, i32* %2
%5 = call i32 @demoImplicitInt(i32 82)
store i32 %5, i32* %3
%6 = load i32, i32* %2
%7 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = load i32, i32* %3
%9 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"x is %d\0A\00"
@.str.1 = [9 x i8] c"y is %d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @returnImplicitInt()
%2 = tail call i32 @demoImplicitInt(i32 82)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %1)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32 %2)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int vdprintf(int, char const *, int /*<<< orphan*/);
int __vdprintf(int fd, int flag, const char *fmt, va_list ap) {
  return vdprintf(fd, fmt, ap);
}


x86 assembly (clang, -O0):
<__vdprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <vdprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__vdprintf>:
mov    %rdx,%rsi
mov    %ecx,%edx
jmp    1030 <vdprintf@plt>

LLVM IR (-O0):
define i32 @__vdprintf(i32 %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %7
%11 = load i32, i32* %8
%12 = call i32 @vdprintf(i32 %9, i8* %10, i32 %11)
ret i32 %12
}

LLVM IR (-O2):
define i32 @__vdprintf(i32 %0, i32 %1, i8* %2, i32 %3) {
%5 = tail call i32 @vdprintf(i32 %0, i8* %2, i32 %3)
ret i32 %5
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ send_event;
};
struct TYPE_4__ {
  TYPE_1__ xmap;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
int get_XEvent_xmap_send_event(void *_p) {
  return (int)((XEvent *)_p)->xmap.send_event;
}


x86 assembly (clang, -O0):
<get_XEvent_xmap_send_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xmap_send_event>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i32 @get_XEvent_xmap_send_event(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_XEvent_xmap_send_event(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
float float_float_overflow(double f) { return f; }


x86 assembly (clang, -O0):
<float_float_overflow>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<float_float_overflow>:
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @float_float_overflow(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fptrunc double %3 to float
ret float %4
}

LLVM IR (-O2):
define float @float_float_overflow(double %0) {
%2 = fptrunc double %0 to float
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(void const *, void const *);
char charptr_equals(const void *o1, const void *o2) {
  if (!o1 || !o2)
    return o1 == o2;
  return !strcmp(o1, o2);
}


x86 assembly (clang, -O0):
<charptr_equals>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1136 <charptr_equals+0x26>
cmpq   $0x0,-0x18(%rbp)
jne    114e <charptr_equals+0x3e>
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %al,-0x1(%rbp)
jmp    116b <charptr_equals+0x5b>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<charptr_equals>:
test   %rdi,%rdi
je     112a <charptr_equals+0x1a>
test   %rsi,%rsi
je     112a <charptr_equals+0x1a>
push   %rax
call   1030 <strcmp@plt>
test   %eax,%eax
sete   %al
add    $0x8,%rsp
ret
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define signext i8 @charptr_equals(i8* %0, i8* %1) {
%3 = alloca i8
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %17, label %11
11: ; preds = %8, %2
%12 = load i8*, i8** %4
%13 = load i8*, i8** %5
%14 = icmp eq i8* %12, %13
%15 = zext i1 %14 to i32
%16 = trunc i32 %15 to i8
store i8 %16, i8* %3
br label %25
17: ; preds = %8
%18 = load i8*, i8** %4
%19 = load i8*, i8** %5
%20 = call i32 @strcmp(i8* %18, i8* %19)
%21 = icmp ne i32 %20, 0
%22 = xor i1 %21, true
%23 = zext i1 %22 to i32
%24 = trunc i32 %23 to i8
store i8 %24, i8* %3
br label %25
25: ; preds = %17, %11
%26 = load i8, i8* %3
ret i8 %26
}

LLVM IR (-O2):
define signext i8 @charptr_equals(i8* %0, i8* %1) {
%3 = icmp ne i8* %0, null
%4 = icmp ne i8* %1, null
%5 = and i1 %3, %4
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = icmp eq i8* %0, %1
br label %11
8: ; preds = %2
%9 = tail call i32 @strcmp(i8* %0, i8* %1)
%10 = icmp eq i32 %9, 0
br label %11
11: ; preds = %8, %6
%12 = phi i1 [ %10, %8 ], [ %7, %6 ]
%13 = zext i1 %12 to i8
ret i8 %13
}
int hazer_finalize(void) { return 0; }


x86 assembly (clang, -O0):
<hazer_finalize>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hazer_finalize>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hazer_finalize() {
ret i32 0
}

LLVM IR (-O2):
define i32 @hazer_finalize() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ thr1(int /*<<< orphan*/);
int /*<<< orphan*/ thr2(int /*<<< orphan*/);
int main() {
__CPROVER_ASYNC_1:
  thr1(0);
__CPROVER_ASYNC_2:
  thr2(0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1030 <thr1@plt>
xor    %edi,%edi
call   1040 <thr2@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <thr1@plt>
xor    %edi,%edi
call   1040 <thr2@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0
%3 = call i32 @thr1(i32 0)
br label %4
4: ; preds = %2
%5 = call i32 @thr2(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @thr1(i32 0)
%2 = tail call i32 @thr2(i32 0)
ret i32 0
}
void RTVfsFileRelease(void) {}


x86 assembly (clang, -O0):
<RTVfsFileRelease>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTVfsFileRelease>:
ret

LLVM IR (-O0):
define void @RTVfsFileRelease() {
ret void
}

LLVM IR (-O2):
define void @RTVfsFileRelease() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0x3b() {
  Assert_real((isodigit(59) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              300, ("isodigit should be 0 for ;"));
}


x86 assembly (clang, -O0):
<t_isodigit_0x3b>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3b,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x12c,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0x3b>:
push   %rax
mov    $0x3b,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x12c,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 0 for ;\00"
define void @t_isodigit_0x3b() {
%1 = call i64 @isodigit(i32 59)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 300, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 0 for ;\00"
define void @t_isodigit_0x3b() {
%1 = tail call i64 @isodigit(i32 59)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 300, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
struct nlmsghdr {
  int dummy;
};
struct nlattr {
  int dummy;
};

/* Variables and functions */
struct nlattr *nla_find(int /*<<< orphan*/, int /*<<< orphan*/, int);
int /*<<< orphan*/ nlmsg_attrdata(struct nlmsghdr const *, int);
int /*<<< orphan*/ nlmsg_attrlen(struct nlmsghdr const *, int);
struct nlattr *nlmsg_find_attr(const struct nlmsghdr *nlh, int hdrlen,
                               int attrtype) {
  return nla_find(nlmsg_attrdata(nlh, hdrlen), nlmsg_attrlen(nlh, hdrlen),
                  attrtype);
}


x86 assembly (clang, -O0):
<nlmsg_find_attr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <nlmsg_attrdata@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <nlmsg_attrlen@plt>
mov    -0x14(%rbp),%edi
mov    %eax,%esi
mov    -0x10(%rbp),%edx
call   1050 <nla_find@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nlmsg_find_attr>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <nlmsg_attrdata@plt>
mov    %eax,%r15d
mov    %rbx,%rdi
mov    %ebp,%esi
call   1040 <nlmsg_attrlen@plt>
mov    %r15d,%edi
mov    %eax,%esi
mov    %r14d,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1050 <nla_find@plt>

LLVM IR (-O0):
%struct.nlattr = type { i32 }
%struct.nlmsghdr = type { i32 }
define %struct.nlattr* @nlmsg_find_attr(%struct.nlmsghdr* %0, i32 %1, i32 %2) {
%4 = alloca %struct.nlmsghdr*
%5 = alloca i32
%6 = alloca i32
store %struct.nlmsghdr* %0, %struct.nlmsghdr** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load %struct.nlmsghdr*, %struct.nlmsghdr** %4
%8 = load i32, i32* %5
%9 = call i32 @nlmsg_attrdata(%struct.nlmsghdr* %7, i32 %8)
%10 = load %struct.nlmsghdr*, %struct.nlmsghdr** %4
%11 = load i32, i32* %5
%12 = call i32 @nlmsg_attrlen(%struct.nlmsghdr* %10, i32 %11)
%13 = load i32, i32* %6
%14 = call %struct.nlattr* @nla_find(i32 %9, i32 %12, i32 %13)
ret %struct.nlattr* %14
}

LLVM IR (-O2):
%struct.nlattr = type { i32 }
%struct.nlmsghdr = type { i32 }
define %struct.nlattr* @nlmsg_find_attr(%struct.nlmsghdr* %0, i32 %1, i32 %2) {
%4 = tail call i32 @nlmsg_attrdata(%struct.nlmsghdr* %0, i32 %1)
%5 = tail call i32 @nlmsg_attrlen(%struct.nlmsghdr* %0, i32 %1)
%6 = tail call %struct.nlattr* @nla_find(i32 %4, i32 %5, i32 %2)
ret %struct.nlattr* %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void bar() { printf("World\n"); }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"World\0A\00"
define void @bar() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [6 x i8] c"World\00"
define void @bar() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
char *malloc(long const);
int /*<<< orphan*/ memcpy(char *, char const *, long const);
int strlen(char const *);
char *strdup(const char *str) {
  const long len = strlen(str) + 1;
  char *sp = malloc(len);
  if (sp == NULL) {
    return NULL;
  }
  memcpy(sp, str, len);
  return sp;
}


x86 assembly (clang, -O0):
<strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1050 <malloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1173 <strdup+0x43>
movq   $0x0,-0x8(%rbp)
jmp    118c <strdup+0x5c>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdup>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
add    $0x1,%eax
movslq %eax,%r15
mov    %r15,%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1161 <strdup+0x31>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1040 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @strlen(i8* %6)
%8 = add nsw i32 %7, 1
%9 = sext i32 %8 to i64
store i64 %9, i64* %4
%10 = load i64, i64* %4
%11 = call i8* @malloc(i64 %10)
store i8* %11, i8** %5
%12 = load i8*, i8** %5
%13 = icmp eq i8* %12, null
br i1 %13, label %14, label %15
14: ; preds = %1
store i8* null, i8** %2
br label %21
15: ; preds = %1
%16 = load i8*, i8** %5
%17 = load i8*, i8** %3
%18 = load i64, i64* %4
%19 = call i32 @memcpy(i8* %16, i8* %17, i64 %18)
%20 = load i8*, i8** %5
store i8* %20, i8** %2
br label %21
21: ; preds = %15, %14
%22 = load i8*, i8** %2
ret i8* %22
}

LLVM IR (-O2):
define i8* @strdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = sext i32 %3 to i64
%5 = tail call i8* @malloc(i64 %4)
%6 = icmp eq i8* %5, null
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @memcpy(i8* %5, i8* %0, i64 %4)
br label %9
9: ; preds = %1, %7
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int main(void) {
  int a;
  printf("introduce un entero a: ");
  scanf("%d", &a);
  if (a % 2 == 0) {
    printf("El valor de a es par \n");
    printf("Es curioso\n");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
lea    0xed6(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1177 <main+0x57>
lea    0xeb5(%rip),%rdi
call   1030 <printf@plt>
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
call   1040 <printf@plt>
lea    0xed4(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
testb  $0x1,0x4(%rsp)
jne    116d <main+0x3d>
lea    0xebf(%rip),%rdi
call   1030 <puts@plt>
lea    0xec9(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [24 x i8] c"introduce un entero a: \00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [23 x i8] c"El valor de a es par \0A\00"
@.str.3 = [12 x i8] c"Es curioso\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = srem i32 %5, 2
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %0
%9 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.2, i64 0, i64 0))
%10 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.3, i64 0, i64 0))
br label %11
11: ; preds = %8, %0
ret i32 0
}

LLVM IR (-O2):
@.str = [24 x i8] c"introduce un entero a: \00"
@.str.1 = [3 x i8] c"%d\00"
@str = [22 x i8] c"El valor de a es par \00"
@str.4 = [11 x i8] c"Es curioso\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = and i32 %5, 1
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %0
%9 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
%10 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str.4, i64 0, i64 0))
br label %11
11: ; preds = %8, %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ calcprog_1(char *);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char *argv[]) {
  char *host;
  if (argc < 2) {
    printf("usage: %s server_host\n", argv[0]);
    exit(1);
  }
  host = argv[1];
  calcprog_1(host);
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    116d <main+0x3d>
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xea2(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <calcprog_1@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x1,%edi
jg     114f <main+0x1f>
mov    (%rsi),%rsi
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    0x8(%rsi),%rdi
call   1040 <calcprog_1@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"usage: %s server_host\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 2
br i1 %8, label %9, label %15
9: ; preds = %2
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 0
%12 = load i8*, i8** %11
%13 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %12)
%14 = call i32 @exit(i32 1)
unreachable
15: ; preds = %2
%16 = load i8**, i8*** %5
%17 = getelementptr inbounds i8*, i8** %16, i64 1
%18 = load i8*, i8** %17
store i8* %18, i8** %6
%19 = load i8*, i8** %6
%20 = call i32 @calcprog_1(i8* %19)
%21 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [23 x i8] c"usage: %s server_host\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = load i8*, i8** %1
%6 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = tail call i32 @exit(i32 1)
unreachable
8: ; preds = %2
%9 = getelementptr inbounds i8*, i8** %1, i64 1
%10 = load i8*, i8** %9
%11 = tail call i32 @calcprog_1(i8* %10)
%12 = tail call i32 @exit(i32 0)
unreachable
}
unsigned long GET_GPSET_ADDR(int pin) {
  if (pin < 29) {
    return 0x2020001CUL;
  } else {
    return 0x20200020UL;
  }
  return 0;
}


x86 assembly (clang, -O0):
<GET_GPSET_ADDR>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
cmpl   $0x1d,-0xc(%rbp)
jge    111e <GET_GPSET_ADDR+0x1e>
movq   $0x2020001c,-0x8(%rbp)
20
jmp    1126 <GET_GPSET_ADDR+0x26>
movq   $0x20200020,-0x8(%rbp)
20
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GET_GPSET_ADDR>:
xor    %eax,%eax
cmp    $0x1d,%edi
setge  %al
lea    0x2020001c(,%rax,4),%rax
20
ret

LLVM IR (-O0):
define i64 @GET_GPSET_ADDR(i32 %0) {
%2 = alloca i64
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 29
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 538968092, i64* %2
br label %8
7: ; preds = %1
store i64 538968096, i64* %2
br label %8
8: ; preds = %7, %6
%9 = load i64, i64* %2
ret i64 %9
}

LLVM IR (-O2):
define i64 @GET_GPSET_ADDR(i32 %0) {
%2 = icmp slt i32 %0, 29
%3 = select i1 %2, i64 538968092, i64 538968096
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
int /*<<< orphan*/ usleep(int);
void internal_sleep(int usecs) {
  sleep(usecs / 1000000);
  usleep(usecs % 1000000);
}


x86 assembly (clang, -O0):
<internal_sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xf4240,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1030 <sleep@plt>
mov    -0x4(%rbp),%eax
mov    $0xf4240,%ecx
cltd
idiv   %ecx
mov    %edx,%edi
call   1040 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<internal_sleep>:
push   %r14
push   %rbx
push   %rax
movslq %edi,%r14
imul   $0x431bde83,%r14,%rbx
mov    %rbx,%rax
shr    $0x3f,%rax
sar    $0x32,%rbx
add    %eax,%ebx
mov    %ebx,%edi
call   1030 <sleep@plt>
imul   $0xf4240,%ebx,%eax
sub    %eax,%r14d
mov    %r14d,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <usleep@plt>

LLVM IR (-O0):
define void @internal_sleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, 1000000
%5 = call i32 @sleep(i32 %4)
%6 = load i32, i32* %2
%7 = srem i32 %6, 1000000
%8 = call i32 @usleep(i32 %7)
ret void
}

LLVM IR (-O2):
define void @internal_sleep(i32 %0) {
%2 = sdiv i32 %0, 1000000
%3 = tail call i32 @sleep(i32 %2)
%4 = srem i32 %0, 1000000
%5 = tail call i32 @usleep(i32 %4)
ret void
}