xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ clockid_t;

/* Variables and functions */
int __timerfd(int, int /*<<< orphan*/, int, int /*<<< orphan*/);
int timerfd_create(clockid_t __clock_id, int __flags) {
  return __timerfd(-1, __clock_id, __flags, 0);
}


x86 assembly (clang, -O0):
<timerfd_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    $0xffffffff,%edi
xor    %ecx,%ecx
call   1030 <__timerfd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timerfd_create>:
mov    %esi,%edx
mov    %edi,%esi
mov    $0xffffffff,%edi
xor    %ecx,%ecx
jmp    1030 <__timerfd@plt>

LLVM IR (-O0):
define i32 @timerfd_create(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @__timerfd(i32 -1, i32 %5, i32 %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @timerfd_create(i32 %0, i32 %1) {
%3 = tail call i32 @__timerfd(i32 -1, i32 %0, i32 %1, i32 0)
ret i32 %3
}
void kol_exit() { asm volatile("int $0x40" ::"a"(-1)); }


x86 assembly (clang, -O0):
<kol_exit>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
int    $0x40
pop    %rbp
ret

x86 assembly (clang, -O2):
<kol_exit>:
mov    $0xffffffff,%eax
int    $0x40
ret

LLVM IR (-O0):
define void @kol_exit() {
ret void
}

LLVM IR (-O2):
define void @kol_exit() {
tail call void asm sideeffect "int $$0x40", "{ax},~{dirflag},~{fpsr},~{flags}"(i32 -1)
ret void
}
void __of_detach_node_sysfs(struct device_node *np) {}


x86 assembly (clang, -O0):
<__of_detach_node_sysfs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__of_detach_node_sysfs>:
ret

LLVM IR (-O0):
%struct.device_node = type opaque
define void @__of_detach_node_sysfs(%struct.device_node* %0) {
%2 = alloca %struct.device_node*
store %struct.device_node* %0, %struct.device_node** %2
ret void
}

LLVM IR (-O2):
%struct.device_node = type opaque
define void @__of_detach_node_sysfs(%struct.device_node* nocapture %0) {
ret void
}
void distribution(int time, int *hour, int *minute, int *second) {
  *hour = time / 3600;
  *minute = (time % 3600) / 60;
  *second = time % 60;
}


x86 assembly (clang, -O0):
<distribution>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xe10,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
mov    $0xe10,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
mov    $0x3c,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
mov    $0x3c,%ecx
cltd
idiv   %ecx
mov    -0x20(%rbp),%rax
mov    %edx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<distribution>:
movslq %edi,%r8
imul   $0xffffffff91a2b3c5,%r8,%rdi
shr    $0x20,%rdi
add    %r8d,%edi
mov    %edi,%eax
shr    $0x1f,%eax
sar    $0xb,%edi
add    %eax,%edi
mov    %edi,(%rsi)
imul   $0xe10,%edi,%eax
mov    %r8d,%esi
sub    %eax,%esi
movswl %si,%eax
imul   $0xffff8889,%eax,%eax
shr    $0x10,%eax
add    %esi,%eax
movzwl %ax,%eax
movswl %ax,%esi
shr    $0xf,%eax
sar    $0x5,%esi
add    %eax,%esi
movswl %si,%eax
mov    %eax,(%rdx)
imul   $0xffffffff88888889,%r8,%rax
shr    $0x20,%rax
add    %r8d,%eax
mov    %eax,%edx
shr    $0x1f,%edx
sar    $0x5,%eax
add    %edx,%eax
imul   $0x3c,%eax,%eax
sub    %eax,%r8d
mov    %r8d,(%rcx)
ret

LLVM IR (-O0):
define void @distribution(i32 %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32, i32* %5
%10 = sdiv i32 %9, 3600
%11 = load i32*, i32** %6
store i32 %10, i32* %11
%12 = load i32, i32* %5
%13 = srem i32 %12, 3600
%14 = sdiv i32 %13, 60
%15 = load i32*, i32** %7
store i32 %14, i32* %15
%16 = load i32, i32* %5
%17 = srem i32 %16, 60
%18 = load i32*, i32** %8
store i32 %17, i32* %18
ret void
}

LLVM IR (-O2):
define void @distribution(i32 %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3) {
%5 = sdiv i32 %0, 3600
store i32 %5, i32* %1
%6 = srem i32 %0, 3600
%7 = trunc i32 %6 to i16
%8 = sdiv i16 %7, 60
%9 = sext i16 %8 to i32
store i32 %9, i32* %2
%10 = srem i32 %0, 60
store i32 %10, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ return_struct_l4();
int /*<<< orphan*/ take_struct_l4(int /*<<< orphan*/);
void test_struct_l4() { take_struct_l4(return_struct_l4()); }


x86 assembly (clang, -O0):
<test_struct_l4>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <return_struct_l4@plt>
mov    %eax,%edi
call   1030 <take_struct_l4@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_struct_l4>:
push   %rax
xor    %eax,%eax
call   1040 <return_struct_l4@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <take_struct_l4@plt>

LLVM IR (-O0):
define void @test_struct_l4() {
%1 = call i32 (...) @return_struct_l4()
%2 = call i32 @take_struct_l4(i32 %1)
ret void
}

LLVM IR (-O2):
define void @test_struct_l4() {
%1 = tail call i32 (...) @return_struct_l4()
%2 = tail call i32 @take_struct_l4(i32 %1)
ret void
}
int test_imm_44uint32_reg(unsigned int val) {
  return ((val) & (0x44 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_44uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x44,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_44uint32_reg>:
test   $0x44,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_44uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 68
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_44uint32_reg(i32 %0) {
%2 = and i32 %0, 68
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int test5(int a, int b) {
  int lt = a < b;
  int eq = a == b;
  return (lt && eq);
}


x86 assembly (clang, -O0):
<test5>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x10(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0xc(%rbp)
mov    %al,-0x11(%rbp)
je     1145 <test5+0x45>
cmpl   $0x0,-0x10(%rbp)
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test5>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test5(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
%10 = zext i1 %9 to i32
store i32 %10, i32* %5
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = icmp eq i32 %11, %12
%14 = zext i1 %13 to i32
store i32 %14, i32* %6
%15 = load i32, i32* %5
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %2
%18 = load i32, i32* %6
%19 = icmp ne i32 %18, 0
br label %20
20: ; preds = %17, %2
%21 = phi i1 [ false, %2 ], [ %19, %17 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @test5(i32 %0, i32 %1) {
ret i32 0
}
int _plat__IsNvAvailable() { return 0; }


x86 assembly (clang, -O0):
<_plat__IsNvAvailable>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_plat__IsNvAvailable>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @_plat__IsNvAvailable() {
ret i32 0
}

LLVM IR (-O2):
define i32 @_plat__IsNvAvailable() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ putchar(unsigned char);
void d_raw(unsigned char *buf, unsigned len) {
  unsigned i;
  for (i = 0; i < len; i++)
    putchar(*(buf + i));
}


x86 assembly (clang, -O0):
<d_raw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jae    1150 <d_raw+0x40>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%ecx
movzbl (%rax,%rcx,1),%edi
call   1030 <putchar@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <d_raw+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d_raw>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
je     1143 <d_raw+0x33>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movzbl (%r14,%rbx,1),%edi
call   1030 <putchar@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <d_raw+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @d_raw(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp ult i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i32, i32* %5
%13 = zext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i8, i8* %14
%16 = call i32 @putchar(i8 zeroext %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @d_raw(i8* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %13, label %4
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
%10 = tail call i32 @putchar(i8 zeroext %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
__attribute__((no)) void ni(void) {}


x86 assembly (clang, -O0):
<ni>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ni>:
ret

LLVM IR (-O0):
define void @ni() {
ret void
}

LLVM IR (-O2):
define void @ni() {
ret void
}
/* Variables and functions */
int callme();
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int i, calling = 0;
  for (i = 0; i < 5; i++) {
    calling = callme();
    i++;
  }
  printf("the function have been called %d times\n", calling);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jge    1168 <main+0x48>
mov    $0x0,%al
call   1040 <callme@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    113d <main+0x1d>
mov    -0xc(%rbp),%esi
lea    0xe8e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <callme@plt>
xor    %eax,%eax
call   1040 <callme@plt>
xor    %eax,%eax
call   1040 <callme@plt>
lea    0xec3(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [40 x i8] c"the function have been called %d times\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %3
store i32 0, i32* %2
br label %4
4: ; preds = %11, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 5
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = call i32 (...) @callme()
store i32 %8, i32* %3
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 1
store i32 %10, i32* %2
br label %11
11: ; preds = %7
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 1
store i32 %13, i32* %2
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
%16 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i32 %15)
ret i32 0
}

LLVM IR (-O2):
@.str = [40 x i8] c"the function have been called %d times\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @callme()
%2 = tail call i32 (...) @callme()
%3 = tail call i32 (...) @callme()
%4 = tail call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
/* Variables and functions */
void append(char *s, char c) {
  if (s == NULL)
    return;
  for (; *s; s += 1)
    ;
  *s++ = c;
  *s++ = 0;
}


x86 assembly (clang, -O0):
<append>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    111e <append+0x1e>
jmp    116c <append+0x6c>
jmp    1123 <append+0x23>
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1146 <append+0x46>
jmp    1135 <append+0x35>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1123 <append+0x23>
mov    -0x9(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movb   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<append>:
test   %rdi,%rdi
je     1120 <append+0x20>
cs nopw 0x0(%rax,%rax,1)
nop
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <append+0x10>
mov    %sil,-0x1(%rdi)
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @append(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8*, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %2
br label %23
8: ; preds = %2
br label %9
9: ; preds = %14, %8
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %9
br label %14
14: ; preds = %13
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i64 1
store i8* %16, i8** %3
br label %9
17: ; preds = %9
%18 = load i8, i8* %4
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %3
store i8 %18, i8* %19
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %3
store i8 0, i8* %21
br label %23
23: ; preds = %17, %7
ret void
}

LLVM IR (-O2):
define void @append(i8* %0, i8 signext %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %10, label %4
4: ; preds = %2, %4
%5 = phi i8* [ %8, %4 ], [ %0, %2 ]
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
%8 = getelementptr inbounds i8, i8* %5, i64 1
br i1 %7, label %9, label %4
9: ; preds = %4
store i8 %1, i8* %5
store i8 0, i8* %8
br label %10
10: ; preds = %2, %9
ret void
}
/* Type definitions */
struct SN_env {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ SN_close_env(struct SN_env *, int /*<<< orphan*/);
extern void french_UTF_8_close_env(struct SN_env *z) { SN_close_env(z, 0); }


x86 assembly (clang, -O0):
<french_UTF_8_close_env>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <SN_close_env@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<french_UTF_8_close_env>:
xor    %esi,%esi
jmp    1030 <SN_close_env@plt>

LLVM IR (-O0):
%struct.SN_env = type { i32 }
define void @french_UTF_8_close_env(%struct.SN_env* %0) {
%2 = alloca %struct.SN_env*
store %struct.SN_env* %0, %struct.SN_env** %2
%3 = load %struct.SN_env*, %struct.SN_env** %2
%4 = call i32 @SN_close_env(%struct.SN_env* %3, i32 0)
ret void
}

LLVM IR (-O2):
%struct.SN_env = type { i32 }
define void @french_UTF_8_close_env(%struct.SN_env* %0) {
%2 = tail call i32 @SN_close_env(%struct.SN_env* %0, i32 0)
ret void
}
unsigned long long codeGen(int value) {
  unsigned long long cd = 0b001000000000000000000000000000;
  if (value < 67108864)
    cd += value;
  return cd;
}


x86 assembly (clang, -O0):
<codeGen>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movq   $0x8000000,-0x10(%rbp)
08
cmpl   $0x4000000,-0x4(%rbp)
jge    1128 <codeGen+0x28>
movslq -0x4(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<codeGen>:
movslq %edi,%rax
lea    0x8000000(%rax),%rcx
cmp    $0x4000000,%eax
mov    $0x8000000,%eax
cmovl  %rcx,%rax
ret

LLVM IR (-O0):
define i64 @codeGen(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
store i64 134217728, i64* %3
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 67108864
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sext i32 %7 to i64
%9 = load i64, i64* %3
%10 = add i64 %9, %8
store i64 %10, i64* %3
br label %11
11: ; preds = %6, %1
%12 = load i64, i64* %3
ret i64 %12
}

LLVM IR (-O2):
define i64 @codeGen(i32 %0) {
%2 = icmp slt i32 %0, 67108864
%3 = sext i32 %0 to i64
%4 = add nsw i64 %3, 134217728
%5 = select i1 %2, i64 %4, i64 134217728
ret i64 %5
}
unsigned stub_os_packet_write(const void *buf, unsigned size) { return 0; }


x86 assembly (clang, -O0):
<stub_os_packet_write>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stub_os_packet_write>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @stub_os_packet_write(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @stub_os_packet_write(i8* nocapture readnone %0, i32 %1) {
ret i32 0
}
_Complex signed char cplx6(signed char r) { return r + 2i; }


x86 assembly (clang, -O0):
<cplx6>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x9(%rbp)
movsbl -0x9(%rbp),%eax
add    $0x0,%eax
mov    %al,-0x8(%rbp)
movb   $0x2,-0x7(%rbp)
mov    -0x8(%rbp),%ax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cplx6>:
movzbl %dil,%eax
or     $0x200,%eax
ret

LLVM IR (-O0):
define i16 @cplx6(i8 signext %0) {
%2 = alloca { i8, i8 }
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = add i32 %5, 0
%7 = trunc i32 %6 to i8
%8 = getelementptr inbounds { i8, i8 }, { i8, i8 }* %2, i32 0, i32 0
%9 = getelementptr inbounds { i8, i8 }, { i8, i8 }* %2, i32 0, i32 1
store i8 %7, i8* %8
store i8 2, i8* %9
%10 = bitcast { i8, i8 }* %2 to i16*
%11 = load i16, i16* %10
ret i16 %11
}

LLVM IR (-O2):
define i16 @cplx6(i8 signext %0) {
%2 = zext i8 %0 to i16
%3 = or i16 %2, 512
ret i16 %3
}
/* Type definitions */
struct shl_pty {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ shl_pty_unref(struct shl_pty *);
void shl_pty_unref_p(struct shl_pty **pty) { shl_pty_unref(*pty); }


x86 assembly (clang, -O0):
<shl_pty_unref_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <shl_pty_unref@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shl_pty_unref_p>:
mov    (%rdi),%rdi
jmp    1030 <shl_pty_unref@plt>

LLVM IR (-O0):
%struct.shl_pty = type { i32 }
define void @shl_pty_unref_p(%struct.shl_pty** %0) {
%2 = alloca %struct.shl_pty**
store %struct.shl_pty** %0, %struct.shl_pty*** %2
%3 = load %struct.shl_pty**, %struct.shl_pty*** %2
%4 = load %struct.shl_pty*, %struct.shl_pty** %3
%5 = call i32 @shl_pty_unref(%struct.shl_pty* %4)
ret void
}

LLVM IR (-O2):
%struct.shl_pty = type { i32 }
define void @shl_pty_unref_p(%struct.shl_pty** nocapture %0) {
%2 = load %struct.shl_pty*, %struct.shl_pty** %0
%3 = tail call i32 @shl_pty_unref(%struct.shl_pty* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void cubeByValue(int n) {
  n = n * n * n;
  printf("input cube is %d\n", n);
}


x86 assembly (clang, -O0):
<cubeByValue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cubeByValue>:
mov    %edi,%esi
imul   %edi,%esi
imul   %edi,%esi
lea    0xee1(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"input cube is %d\0A\00"
define void @cubeByValue(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %3, %4
%6 = load i32, i32* %2
%7 = mul nsw i32 %5, %6
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %8)
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"input cube is %d\0A\00"
define void @cubeByValue(i32 %0) {
%2 = mul nsw i32 %0, %0
%3 = mul nsw i32 %2, %0
%4 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}
void UninitI420toRGB24() {}


x86 assembly (clang, -O0):
<UninitI420toRGB24>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UninitI420toRGB24>:
ret

LLVM IR (-O0):
define void @UninitI420toRGB24() {
ret void
}

LLVM IR (-O2):
define void @UninitI420toRGB24() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ia64_atomic_sub(int, int volatile *);
int atomic_dec(volatile int *a) { return !ia64_atomic_sub(1, a); }


x86 assembly (clang, -O0):
<atomic_dec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x1,%edi
call   1030 <ia64_atomic_sub@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_dec>:
push   %rax
mov    %rdi,%rsi
mov    $0x1,%edi
call   1030 <ia64_atomic_sub@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @atomic_dec(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @ia64_atomic_sub(i32 1, i32* %3)
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @atomic_dec(i32* %0) {
%2 = tail call i32 @ia64_atomic_sub(i32 1, i32* %0)
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
unsigned long gfx_pci_config_read(int);
int /*<<< orphan*/ gfx_pci_config_write(int, unsigned long);
void I2CAL_set_data_for_input(void) {
  unsigned short reg;
  unsigned long value;
  value = gfx_pci_config_read(
      (0x80000000 | (0x00 << 16) | (0x12 << 11) | (0 << 8) | 0x90));
  reg = (unsigned short)value;
  reg &= ~0x0008;
  value = reg;
  gfx_pci_config_write(
      (0x80000000 | (0x00 << 16) | (0x12 << 11) | (0 << 8) | 0x90), value);
}


x86 assembly (clang, -O0):
<I2CAL_set_data_for_input>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x80009090,%edi
call   1040 <gfx_pci_config_read@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
and    $0xfffffff7,%eax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    $0x80009090,%edi
call   1030 <gfx_pci_config_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CAL_set_data_for_input>:
push   %rax
mov    $0x80009090,%edi
call   1040 <gfx_pci_config_read@plt>
and    $0xfff7,%eax
mov    $0x80009090,%edi
mov    %rax,%rsi
pop    %rax
jmp    1030 <gfx_pci_config_write@plt>

LLVM IR (-O0):
define void @I2CAL_set_data_for_input() {
%1 = alloca i16
%2 = alloca i64
%3 = call i64 @gfx_pci_config_read(i32 -2147446640)
store i64 %3, i64* %2
%4 = load i64, i64* %2
%5 = trunc i64 %4 to i16
store i16 %5, i16* %1
%6 = load i16, i16* %1
%7 = zext i16 %6 to i32
%8 = and i32 %7, -9
%9 = trunc i32 %8 to i16
store i16 %9, i16* %1
%10 = load i16, i16* %1
%11 = zext i16 %10 to i64
store i64 %11, i64* %2
%12 = load i64, i64* %2
%13 = call i32 @gfx_pci_config_write(i32 -2147446640, i64 %12)
ret void
}

LLVM IR (-O2):
define void @I2CAL_set_data_for_input() {
%1 = tail call i64 @gfx_pci_config_read(i32 -2147446640)
%2 = and i64 %1, 65527
%3 = tail call i32 @gfx_pci_config_write(i32 -2147446640, i64 %2)
ret void
}
int test_imm_C2uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0xC2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C2uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0xc2,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C2uint64_highword_mem>:
testb  $0xc2,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C2uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 194
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C2uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 833223655424
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void ub_dentry_charge_nofail(struct dentry *d) {}


x86 assembly (clang, -O0):
<ub_dentry_charge_nofail>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ub_dentry_charge_nofail>:
ret

LLVM IR (-O0):
%struct.dentry = type opaque
define void @ub_dentry_charge_nofail(%struct.dentry* %0) {
%2 = alloca %struct.dentry*
store %struct.dentry* %0, %struct.dentry** %2
ret void
}

LLVM IR (-O2):
%struct.dentry = type opaque
define void @ub_dentry_charge_nofail(%struct.dentry* nocapture %0) {
ret void
}
int test_imm_A2uint16_mem(unsigned short *val) {
  return ((*val) & (-0xA2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A2uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffff5e,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A2uint16_mem>:
movzwl (%rdi),%eax
test   $0xff5e,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A2uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -162
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_A2uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -162
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int f5() {
  char *s = "hello world";
  return s[0];
}


x86 assembly (clang, -O0):
<f5>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f5>:
mov    $0x68,%eax
ret

LLVM IR (-O0):
@.str = [12 x i8] c"hello world\00"
define i32 @f5() {
%1 = alloca i8*
store i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = getelementptr inbounds i8, i8* %2, i64 0
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @f5() {
ret i32 104
}
/* Type definitions */
struct iovec {
  int dummy;
};
typedef int ssize_t;

/* Variables and functions */
ssize_t writev(int fd, const struct iovec *v, int veccount) { return -1; }


x86 assembly (clang, -O0):
<writev>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<writev>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.iovec = type { i32 }
define i32 @writev(i32 %0, %struct.iovec* %1, i32 %2) {
%4 = alloca i32
%5 = alloca %struct.iovec*
%6 = alloca i32
store i32 %0, i32* %4
store %struct.iovec* %1, %struct.iovec** %5
store i32 %2, i32* %6
ret i32 -1
}

LLVM IR (-O2):
%struct.iovec = type { i32 }
define i32 @writev(i32 %0, %struct.iovec* nocapture readnone %1, i32 %2) {
ret i32 -1
}
int exact_square(int number) {
  int i;
  for (i = 0; i <= number; i++) {
    if (number == i * i) {
      return 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<exact_square>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     114b <exact_square+0x4b>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
imul   -0xc(%rbp),%ecx
cmp    %ecx,%eax
jne    1138 <exact_square+0x38>
movl   $0x1,-0x4(%rbp)
jmp    1152 <exact_square+0x52>
jmp    113d <exact_square+0x3d>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <exact_square+0xe>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<exact_square>:
test   %edi,%edi
js     1120 <exact_square+0x20>
lea    0x1(%rdi),%eax
xor    %ecx,%ecx
nopl   0x0(%rax)
mov    %ecx,%edx
imul   %ecx,%edx
cmp    %edi,%edx
je     1123 <exact_square+0x23>
add    $0x1,%ecx
cmp    %ecx,%eax
jne    1110 <exact_square+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @exact_square(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %17, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = icmp sle i32 %6, %7
br i1 %8, label %9, label %20
9: ; preds = %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = load i32, i32* %4
%13 = mul nsw i32 %11, %12
%14 = icmp eq i32 %10, %13
br i1 %14, label %15, label %16
15: ; preds = %9
store i32 1, i32* %2
br label %21
16: ; preds = %9
br label %17
17: ; preds = %16
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %5
20: ; preds = %5
store i32 0, i32* %2
br label %21
21: ; preds = %20, %15
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @exact_square(i32 %0) {
%2 = icmp slt i32 %0, 0
br i1 %2, label %10, label %6
3: ; preds = %6
%4 = add nuw i32 %7, 1
%5 = icmp eq i32 %7, %0
br i1 %5, label %10, label %6
6: ; preds = %1, %3
%7 = phi i32 [ %4, %3 ], [ 0, %1 ]
%8 = mul nsw i32 %7, %7
%9 = icmp eq i32 %8, %0
br i1 %9, label %10, label %3
10: ; preds = %6, %3, %1
%11 = phi i32 [ 0, %1 ], [ 0, %3 ], [ 1, %6 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ code(char *);
int /*<<< orphan*/ codeln(char *);
void includeLocal(char *headerFile) {
  code("#include \"");
  code(headerFile);
  codeln("\"");
}


x86 assembly (clang, -O0):
<includeLocal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1040 <code@plt>
mov    -0x8(%rbp),%rdi
call   1040 <code@plt>
lea    0xec1(%rip),%rdi
call   1030 <codeln@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<includeLocal>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
call   1040 <code@plt>
mov    %rbx,%rdi
call   1040 <code@plt>
lea    0xeca(%rip),%rdi
pop    %rbx
jmp    1030 <codeln@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"#include \22\00"
@.str.1 = [2 x i8] c"\22\00"
define void @includeLocal(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @code(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 @code(i8* %4)
%6 = call i32 @codeln(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"#include \22\00"
@.str.1 = [2 x i8] c"\22\00"
define void @includeLocal(i8* %0) {
%2 = tail call i32 @code(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @code(i8* %0)
%4 = tail call i32 @codeln(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}
unsigned xrop3_81_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~T;
  stk2 = S & stk3;
  stk1 = D | stk2;
  stk1 = ~stk1;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_81_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_81_0_0>:
mov    %esi,%eax
shl    $0x8,%edi
shl    $0x8,%eax
not    %eax
and    %edi,%eax
xor    $0xffffff00,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_81_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %6
%26 = load i32, i32* %10
%27 = and i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %5
%29 = load i32, i32* %9
%30 = or i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = xor i32 %31, -1
store i32 %32, i32* %8
%33 = load i32, i32* %8
ret i32 %33
}

LLVM IR (-O2):
define i32 @xrop3_81_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = zext i8 %1 to i32
%6 = shl nuw nsw i32 %5, 8
%7 = xor i32 %6, -1
%8 = and i32 %4, %7
%9 = xor i32 %8, -256
ret i32 %9
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ puts(char *);
int main(void) {
  puts("hello");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <puts@plt>
mov    0x2eae(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2ebc(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"hello\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @puts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}

LLVM IR (-O2):
@.str = [6 x i8] c"hello\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
ret i32 %2
}
/* Variables and functions */
int errno;
int fetch_error(void) { return errno; }


x86 assembly (clang, -O0):
<fetch_error>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fetch_error>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@errno = global i32 0
define i32 @fetch_error() {
%1 = load i32, i32* @errno
ret i32 %1
}

LLVM IR (-O2):
@errno = global i32 0
define i32 @fetch_error() {
%1 = load i32, i32* @errno
ret i32 %1
}
void hms(int x, int *h, int *m, int *s) {
  *s = x % 60;
  x -= *s;
  x /= 60;
  *m = x % 60;
  x -= *m;
  *h = x / 60;
  return;
}


x86 assembly (clang, -O0):
<hms>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3c,%ecx
cltd
idiv   %ecx
mov    -0x20(%rbp),%rax
mov    %edx,(%rax)
mov    -0x20(%rbp),%rax
mov    (%rax),%ecx
mov    -0x4(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3c,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3c,%ecx
cltd
idiv   %ecx
mov    -0x18(%rbp),%rax
mov    %edx,(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
mov    -0x4(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3c,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<hms>:
movslq %edi,%r8
imul   $0xffffffff88888889,%r8,%r10
shr    $0x20,%r10
add    %r8d,%r10d
mov    %r10d,%edi
shr    $0x1f,%edi
sar    $0x5,%r10d
add    %edi,%r10d
imul   $0x3c,%r10d,%r9d
imul   $0xffffffff91a2b3c5,%r8,%rdi
shr    $0x20,%rdi
add    %r8d,%edi
mov    %r8d,%eax
sub    %r9d,%eax
mov    %eax,(%rcx)
movslq %r10d,%rax
imul   $0xffffffff88888889,%rax,%rcx
shr    $0x20,%rcx
add    %eax,%ecx
mov    %ecx,%r8d
shr    $0x1f,%r8d
sar    $0x5,%ecx
add    %r8d,%ecx
imul   $0x3c,%ecx,%ecx
sub    %ecx,%eax
mov    %eax,(%rdx)
mov    %edi,%eax
shr    $0x1f,%eax
sar    $0xb,%edi
add    %eax,%edi
mov    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @hms(i32 %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32, i32* %5
%10 = srem i32 %9, 60
%11 = load i32*, i32** %8
store i32 %10, i32* %11
%12 = load i32*, i32** %8
%13 = load i32, i32* %12
%14 = load i32, i32* %5
%15 = sub nsw i32 %14, %13
store i32 %15, i32* %5
%16 = load i32, i32* %5
%17 = sdiv i32 %16, 60
store i32 %17, i32* %5
%18 = load i32, i32* %5
%19 = srem i32 %18, 60
%20 = load i32*, i32** %7
store i32 %19, i32* %20
%21 = load i32*, i32** %7
%22 = load i32, i32* %21
%23 = load i32, i32* %5
%24 = sub nsw i32 %23, %22
store i32 %24, i32* %5
%25 = load i32, i32* %5
%26 = sdiv i32 %25, 60
%27 = load i32*, i32** %6
store i32 %26, i32* %27
ret void
}

LLVM IR (-O2):
define void @hms(i32 %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3) {
%5 = srem i32 %0, 60
store i32 %5, i32* %3
%6 = sdiv i32 %0, 60
%7 = srem i32 %6, 60
store i32 %7, i32* %2
%8 = sdiv i32 %0, 3600
store i32 %8, i32* %1
ret void
}
char charfromint(int i) { return (i + '0'); }


x86 assembly (clang, -O0):
<charfromint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<charfromint>:
lea    0x30(%rdi),%eax
ret

LLVM IR (-O0):
define signext i8 @charfromint(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 48
%5 = trunc i32 %4 to i8
ret i8 %5
}

LLVM IR (-O2):
define signext i8 @charfromint(i32 %0) {
%2 = trunc i32 %0 to i8
%3 = add i8 %2, 48
ret i8 %3
}
/* Variables and functions */
int /*<<< orphan*/ say(char *, int);
void hit(void) { say("Read this!", 1); }


x86 assembly (clang, -O0):
<hit>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x1,%esi
call   1030 <say@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hit>:
lea    0xee9(%rip),%rdi
mov    $0x1,%esi
jmp    1030 <say@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"Read this!\00"
define void @hit() {
%1 = call i32 @say(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"Read this!\00"
define void @hit() {
%1 = tail call i32 @say(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}
/* Variables and functions */
scalar_t__ strcmp(char *, char *);
extern int CheckReturnsStr(char *(*cb)()) {
  char *str = cb();
  if (strcmp(str, "Herps and derps"))
    return 1;
  return 7;
}


x86 assembly (clang, -O0):
<CheckReturnsStr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x0,%al
call   *-0x10(%rbp)
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
lea    0xed0(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
je     114b <CheckReturnsStr+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    1152 <CheckReturnsStr+0x42>
movl   $0x7,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CheckReturnsStr>:
push   %rax
xor    %eax,%eax
call   *%rdi
lea    0xee4(%rip),%rsi
mov    %rax,%rdi
call   1030 <strcmp@plt>
test   %rax,%rax
mov    $0x7,%ecx
mov    $0x1,%eax
cmove  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"Herps and derps\00"
define i32 @CheckReturnsStr(i8* (...)* %0) {
%2 = alloca i32
%3 = alloca i8* (...)*
%4 = alloca i8*
store i8* (...)* %0, i8* (...)** %3
%5 = load i8* (...)*, i8* (...)** %3
%6 = call i8* (...) %5()
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = call i64 @strcmp(i8* %7, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 1, i32* %2
br label %12
11: ; preds = %1
store i32 7, i32* %2
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@.str = [16 x i8] c"Herps and derps\00"
define i32 @CheckReturnsStr(i8* (...)* nocapture %0) {
%2 = tail call i8* (...) %0()
%3 = tail call i64 @strcmp(i8* %2, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 7, i32 1
ret i32 %5
}
void rt2x00crypto_tx_insert_iv(struct sk_buff *skb,
                               unsigned int header_length) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
%struct.sk_buff = type opaque
define void @rt2x00crypto_tx_insert_iv(%struct.sk_buff* %0, i32 %1) {
%3 = alloca %struct.sk_buff*
%4 = alloca i32
store %struct.sk_buff* %0, %struct.sk_buff** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.sk_buff = type opaque
define void @rt2x00crypto_tx_insert_iv(%struct.sk_buff* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
int /*<<< orphan*/ uprintn(int, int);
void printn(int n, int b) {
  if (n < 0) {
    putchar('-');
    uprintn(-n, b);
  } else
    uprintn(n, b);
}


x86 assembly (clang, -O0):
<printn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1154 <printn+0x34>
mov    $0x2d,%edi
call   1030 <putchar@plt>
xor    %edi,%edi
sub    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <uprintn@plt>
jmp    115f <printn+0x3f>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <uprintn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printn>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
test   %edi,%edi
jns    1137 <printn+0x17>
mov    $0x2d,%edi
call   1030 <putchar@plt>
neg    %ebp
mov    %ebp,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <uprintn@plt>

LLVM IR (-O0):
define void @printn(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %2
%8 = call i32 @putchar(i8 signext 45)
%9 = load i32, i32* %3
%10 = sub nsw i32 0, %9
%11 = load i32, i32* %4
%12 = call i32 @uprintn(i32 %10, i32 %11)
br label %17
13: ; preds = %2
%14 = load i32, i32* %3
%15 = load i32, i32* %4
%16 = call i32 @uprintn(i32 %14, i32 %15)
br label %17
17: ; preds = %13, %7
ret void
}

LLVM IR (-O2):
define void @printn(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, 0
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = tail call i32 @putchar(i8 signext 45)
%6 = sub nsw i32 0, %0
br label %7
7: ; preds = %2, %4
%8 = phi i32 [ %6, %4 ], [ %0, %2 ]
%9 = tail call i32 @uprintn(i32 %8, i32 %1)
ret void
}
int putchar(int c) {
  *((volatile char *)((0xffff8000) + 0)) = c;
  return c;
}


x86 assembly (clang, -O0):
<putchar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %al,%cl
mov    $0xffff8000,%eax
mov    %cl,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<putchar>:
mov    %edi,%eax
mov    $0xffff8000,%ecx
mov    %al,(%rcx)
ret

LLVM IR (-O0):
define i32 @putchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i8
store volatile i8 %4, i8* inttoptr (i64 4294934528 to i8*)
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
define i32 @putchar(i32 returned %0) {
%2 = trunc i32 %0 to i8
store volatile i8 %2, i8* inttoptr (i64 4294934528 to i8*)
ret i32 %0
}
/* Variables and functions */
size_t round_up(size_t i) { return i & 0xffffull ? ((i >> 16) + 1) << 16 : i; }


x86 assembly (clang, -O0):
<round_up>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0xffff,%rax
cmp    $0x0,%rax
je     1135 <round_up+0x35>
mov    -0x8(%rbp),%rax
shr    $0x10,%rax
add    $0x1,%rax
shl    $0x10,%rax
mov    %rax,-0x10(%rbp)
jmp    113d <round_up+0x3d>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_up>:
lea    0x10000(%rdi),%rax
and    $0xffffffffffff0000,%rax
test   %di,%di
cmove  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @round_up(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 65535
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i64, i64* %2
%8 = lshr i64 %7, 16
%9 = add i64 %8, 1
%10 = shl i64 %9, 16
br label %13
11: ; preds = %1
%12 = load i64, i64* %2
br label %13
13: ; preds = %11, %6
%14 = phi i64 [ %10, %6 ], [ %12, %11 ]
ret i64 %14
}

LLVM IR (-O2):
define i64 @round_up(i64 %0) {
%2 = and i64 %0, 65535
%3 = icmp eq i64 %2, 0
%4 = add i64 %0, 65536
%5 = and i64 %4, -65536
%6 = select i1 %3, i64 %0, i64 %5
ret i64 %6
}
/* Variables and functions */
scalar_t__ getint(int *);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int num;
  while (getint(&num) > 0) {
    printf("%d\n", num);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
call   1040 <getint@plt>
cmp    $0x0,%rax
jle    1156 <main+0x36>
mov    -0x8(%rbp),%esi
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
jmp    112f <main+0xf>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0x4(%rsp),%rdi
call   1040 <getint@plt>
test   %rax,%rax
jle    1159 <main+0x39>
lea    0xec6(%rip),%r14
lea    0x4(%rsp),%rbx
nop
mov    0x4(%rsp),%esi
mov    %r14,%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1040 <getint@plt>
test   %rax,%rax
jg     1140 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %6, %0
%4 = call i64 @getint(i32* %2)
%5 = icmp sgt i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
br label %3
9: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i64 @getint(i32* %1)
%4 = icmp sgt i64 %3, 0
br i1 %4, label %5, label %10
5: ; preds = %0, %5
%6 = load i32, i32* %1
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = call i64 @getint(i32* %1)
%9 = icmp sgt i64 %8, 0
br i1 %9, label %5, label %10
10: ; preds = %5, %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ OS_TaskRegister();
void task_17(void) {
  OS_TaskRegister();
  while (1)
    ;
  return;
}


x86 assembly (clang, -O0):
<task_17>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <OS_TaskRegister@plt>
jmp    111b <task_17+0xb>

x86 assembly (clang, -O2):
<task_17>:
push   %rax
xor    %eax,%eax
call   1030 <OS_TaskRegister@plt>
nopl   0x0(%rax,%rax,1)
jmp    1120 <task_17+0x10>

LLVM IR (-O0):
define void @task_17() {
%1 = call i32 (...) @OS_TaskRegister()
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
define void @task_17() {
%1 = tail call i32 (...) @OS_TaskRegister()
br label %2
2: ; preds = %0, %2
br label %2
}