xunge/DecIR huggingface dataset:
void swap(int *l, int i, int j) {
  int temp = l[i];
  l[i] = l[j];
  l[j] = temp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
store i32 %12, i32* %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
store i32 %17, i32* %21
%22 = load i32, i32* %7
%23 = load i32*, i32** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
store i32 %9, i32* %5
store i32 %6, i32* %8
ret void
}
/* Type definitions */
struct xdr_stream {
  int dummy;
};
typedef enum accept_stat { ____Placeholder_accept_stat } accept_stat;

/* Variables and functions */
int xdr_uint(struct xdr_stream *, int *);
int xdr_accept_stat(struct xdr_stream *stream, enum accept_stat *value) {
  return xdr_uint(stream, value);
}


x86 assembly (clang, -O0):
<xdr_accept_stat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <xdr_uint@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xdr_accept_stat>:
jmp    1030 <xdr_uint@plt>

LLVM IR (-O0):
%struct.xdr_stream = type { i32 }
define i32 @xdr_accept_stat(%struct.xdr_stream* %0, i32* %1) {
%3 = alloca %struct.xdr_stream*
%4 = alloca i32*
store %struct.xdr_stream* %0, %struct.xdr_stream** %3
store i32* %1, i32** %4
%5 = load %struct.xdr_stream*, %struct.xdr_stream** %3
%6 = load i32*, i32** %4
%7 = call i32 @xdr_uint(%struct.xdr_stream* %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.xdr_stream = type { i32 }
define i32 @xdr_accept_stat(%struct.xdr_stream* %0, i32* %1) {
%3 = tail call i32 @xdr_uint(%struct.xdr_stream* %0, i32* %1)
ret i32 %3
}
int test_imm_68uint8_mem(unsigned char *val) {
  return ((*val) & (-0x68 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_68uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffff98,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_68uint8_mem>:
testb  $0x98,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_68uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -104
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_68uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -104
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct file_handle {
  int dummy;
};

/* Variables and functions */
int syscall(int, int, char const *, struct file_handle *, int *, int);
int missing_name_to_handle_at(int fd, const char *name,
                              struct file_handle *handle, int *mnt_id,
                              int flags) {
  return syscall(303, fd, name, handle, mnt_id, flags);
}


x86 assembly (clang, -O0):
<missing_name_to_handle_at>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
mov    -0x24(%rbp),%r9d
mov    $0x12f,%edi
call   1030 <syscall@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<missing_name_to_handle_at>:
mov    %r8d,%r9d
mov    %rcx,%r8
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0x12f,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.file_handle = type { i32 }
define i32 @missing_name_to_handle_at(i32 %0, i8* %1, %struct.file_handle* %2, i32* %3, i32 %4) {
%6 = alloca i32
%7 = alloca i8*
%8 = alloca %struct.file_handle*
%9 = alloca i32*
%10 = alloca i32
store i32 %0, i32* %6
store i8* %1, i8** %7
store %struct.file_handle* %2, %struct.file_handle** %8
store i32* %3, i32** %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i8*, i8** %7
%13 = load %struct.file_handle*, %struct.file_handle** %8
%14 = load i32*, i32** %9
%15 = load i32, i32* %10
%16 = call i32 @syscall(i32 303, i32 %11, i8* %12, %struct.file_handle* %13, i32* %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
%struct.file_handle = type { i32 }
define i32 @missing_name_to_handle_at(i32 %0, i8* %1, %struct.file_handle* %2, i32* %3, i32 %4) {
%6 = tail call i32 @syscall(i32 303, i32 %0, i8* %1, %struct.file_handle* %2, i32* %3, i32 %4)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ GPIO5_Combined_0_15_DriverIRQHandler();
__attribute__((weak)) void GPIO5_Combined_0_15_IRQHandler(void) {
  GPIO5_Combined_0_15_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<GPIO5_Combined_0_15_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GPIO5_Combined_0_15_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIO5_Combined_0_15_IRQHandler>:
xor    %eax,%eax
jmp    1030 <GPIO5_Combined_0_15_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @GPIO5_Combined_0_15_IRQHandler() {
%1 = call i32 (...) @GPIO5_Combined_0_15_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @GPIO5_Combined_0_15_IRQHandler() {
%1 = tail call i32 (...) @GPIO5_Combined_0_15_DriverIRQHandler()
ret void
}
int test_imm_59int64_lowword_mem(long long *val) {
  return ((*val) & (0x59 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_59int64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x59,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_59int64_lowword_mem>:
testb  $0x59,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_59int64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 89
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_59int64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 89
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct _reent {
  int dummy;
};

/* Variables and functions */
void *valloc(size_t);
void *_valloc_r(struct _reent *ptr, size_t bytes) { return valloc(bytes); }


x86 assembly (clang, -O0):
<_valloc_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <valloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_valloc_r>:
mov    %rsi,%rdi
jmp    1030 <valloc@plt>

LLVM IR (-O0):
%struct._reent = type { i32 }
define i8* @_valloc_r(%struct._reent* %0, i64 %1) {
%3 = alloca %struct._reent*
%4 = alloca i64
store %struct._reent* %0, %struct._reent** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = call i8* @valloc(i64 %5)
ret i8* %6
}

LLVM IR (-O2):
%struct._reent = type { i32 }
define noalias i8* @_valloc_r(%struct._reent* nocapture readnone %0, i64 %1) {
%3 = tail call i8* @valloc(i64 %1)
ret i8* %3
}
/* Variables and functions */
int fact(int);
int /*<<< orphan*/ printf(char *, int);
main() {
  int v = fact(5);
  printf("fact(5)=%d\n", v);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x5,%edi
call   1040 <fact@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
call   1040 <fact@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"fact(5)=%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = call i32 @fact(i32 5)
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"fact(5)=%d\0A\00"
define i32 @main() {
%1 = tail call i32 @fact(i32 5)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int f();
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("%d\n", f());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <f@plt>
mov    %eax,%esi
lea    0xec1(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <f@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @f()
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @f()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ IntDisable(int);
int /*<<< orphan*/ IntUnregister(int);
void MPUIntUnregister(void) {
  IntDisable(4);
  IntUnregister(4);
}


x86 assembly (clang, -O0):
<MPUIntUnregister>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
call   1030 <IntDisable@plt>
mov    $0x4,%edi
call   1040 <IntUnregister@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MPUIntUnregister>:
push   %rax
mov    $0x4,%edi
call   1030 <IntDisable@plt>
mov    $0x4,%edi
pop    %rax
jmp    1040 <IntUnregister@plt>

LLVM IR (-O0):
define void @MPUIntUnregister() {
%1 = call i32 @IntDisable(i32 4)
%2 = call i32 @IntUnregister(i32 4)
ret void
}

LLVM IR (-O2):
define void @MPUIntUnregister() {
%1 = tail call i32 @IntDisable(i32 4)
%2 = tail call i32 @IntUnregister(i32 4)
ret void
}
struct sk_buff *l3mdev_ip_rcv(struct sk_buff *skb) {
  return skb;
}


x86 assembly (clang, -O0):
<l3mdev_ip_rcv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<l3mdev_ip_rcv>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
%struct.sk_buff = type opaque
define %struct.sk_buff* @l3mdev_ip_rcv(%struct.sk_buff* %0) {
%2 = alloca %struct.sk_buff*
store %struct.sk_buff* %0, %struct.sk_buff** %2
%3 = load %struct.sk_buff*, %struct.sk_buff** %2
ret %struct.sk_buff* %3
}

LLVM IR (-O2):
%struct.sk_buff = type opaque
define %struct.sk_buff* @l3mdev_ip_rcv(%struct.sk_buff* readnone returned %0) {
ret %struct.sk_buff* %0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0x8f() {
  Assert_real((isodigit(143) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              720, ("isodigit should be 0 for 0x8f"));
}


x86 assembly (clang, -O0):
<t_isodigit_0x8f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8f,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2d0,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0x8f>:
push   %rax
mov    $0x8f,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x2d0,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0x8f\00"
define void @t_isodigit_0x8f() {
%1 = call i64 @isodigit(i32 143)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 720, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0x8f\00"
define void @t_isodigit_0x8f() {
%1 = tail call i64 @isodigit(i32 143)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 720, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ GLUT_BITMAP_9_BY_15;
int /*<<< orphan*/ glColor3f(double, double, double);
int /*<<< orphan*/ glRasterPos3f(float, float, int /*<<< orphan*/);
int /*<<< orphan*/ glutBitmapString(void *, unsigned char const *);
void print_text(char *text, float x, float y) {
  glColor3f(0.0, 0.0, 0.8);
  glRasterPos3f(x, y, 0);
  glutBitmapString((void *)GLUT_BITMAP_9_BY_15, (const unsigned char *)text);
}


x86 assembly (clang, -O0):
<print_text>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  %xmm1,-0x10(%rbp)
xorps  %xmm1,%xmm1
movsd  0xeaf(%rip),%xmm2
movaps %xmm1,%xmm0
call   1040 <glColor3f@plt>
movss  -0xc(%rbp),%xmm0
movss  -0x10(%rbp),%xmm1
xor    %edi,%edi
call   1030 <glRasterPos3f@plt>
mov    0x2e77(%rip),%rax
mov    (%rax),%rdi
mov    -0x8(%rbp),%rsi
call   1050 <glutBitmapString@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_text>:
push   %rbx
sub    $0x10,%rsp
movss  %xmm1,0xc(%rsp)
movss  %xmm0,0x8(%rsp)
mov    %rdi,%rbx
movsd  0xeb4(%rip),%xmm2
xorps  %xmm0,%xmm0
xorps  %xmm1,%xmm1
call   1040 <glColor3f@plt>
movss  0x8(%rsp),%xmm0
movss  0xc(%rsp),%xmm1
xor    %edi,%edi
call   1030 <glRasterPos3f@plt>
mov    0x2e77(%rip),%rax
mov    (%rax),%rdi
mov    %rbx,%rsi
add    $0x10,%rsp
pop    %rbx
jmp    1050 <glutBitmapString@plt>

LLVM IR (-O0):
@GLUT_BITMAP_9_BY_15 = global i64 0
define void @print_text(i8* %0, float %1, float %2) {
%4 = alloca i8*
%5 = alloca float
%6 = alloca float
store i8* %0, i8** %4
store float %1, float* %5
store float %2, float* %6
%7 = call i32 @glColor3f(double 0.000000e+00, double 0.000000e+00, double 8.000000e-01)
%8 = load float, float* %5
%9 = load float, float* %6
%10 = call i32 @glRasterPos3f(float %8, float %9, i32 0)
%11 = load i64, i64* @GLUT_BITMAP_9_BY_15
%12 = inttoptr i64 %11 to i8*
%13 = load i8*, i8** %4
%14 = call i32 @glutBitmapString(i8* %12, i8* %13)
ret void
}

LLVM IR (-O2):
@GLUT_BITMAP_9_BY_15 = global i64 0
define void @print_text(i8* %0, float %1, float %2) {
%4 = tail call i32 @glColor3f(double 0.000000e+00, double 0.000000e+00, double 8.000000e-01)
%5 = tail call i32 @glRasterPos3f(float %1, float %2, i32 0)
%6 = load i64, i64* @GLUT_BITMAP_9_BY_15
%7 = inttoptr i64 %6 to i8*
%8 = tail call i32 @glutBitmapString(i8* %7, i8* %0)
ret void
}
/* Variables and functions */
int CbEmitStruct(int /*<<< orphan*/ *, char *, int /*<<< orphan*/ *,
                 int /*<<< orphan*/);
int CbStruct(char *szPic) { return CbEmitStruct(NULL, szPic, NULL, 0); }


x86 assembly (clang, -O0):
<CbStruct>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
xor    %ecx,%ecx
mov    %rdx,%rdi
call   1030 <CbEmitStruct@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CbStruct>:
mov    %rdi,%rsi
xor    %edi,%edi
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <CbEmitStruct@plt>

LLVM IR (-O0):
define i32 @CbStruct(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @CbEmitStruct(i32* null, i8* %3, i32* null, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @CbStruct(i8* %0) {
%2 = tail call i32 @CbEmitStruct(i32* null, i8* %0, i32* null, i32 0)
ret i32 %2
}
unsigned xrop3_223_0_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D & T;
  stk2 = ~stk2;
  stk1 = S | stk2;
  return (stk1 & S) | (stk1 & (~T)) | (T & (~S) & D);
}


x86 assembly (clang, -O0):
<xrop3_223_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    -0x10(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_223_0_1>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
mov    %esi,%ecx
shl    $0x8,%ecx
or     %esi,%ecx
not    %ecx
or     %esi,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_223_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %7
%24 = and i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %9
%26 = xor i32 %25, -1
store i32 %26, i32* %9
%27 = load i32, i32* %6
%28 = load i32, i32* %9
%29 = or i32 %27, %28
store i32 %29, i32* %8
%30 = load i32, i32* %8
%31 = load i32, i32* %6
%32 = and i32 %30, %31
%33 = load i32, i32* %8
%34 = load i32, i32* %7
%35 = xor i32 %34, -1
%36 = and i32 %33, %35
%37 = or i32 %32, %36
%38 = load i32, i32* %7
%39 = load i32, i32* %6
%40 = xor i32 %39, -1
%41 = and i32 %38, %40
%42 = load i32, i32* %5
%43 = and i32 %41, %42
%44 = or i32 %37, %43
ret i32 %44
}

LLVM IR (-O2):
define i32 @xrop3_223_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %6, -1
%8 = or i32 %4, %5
%9 = or i32 %8, %7
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ UFILE;

/* Variables and functions */
int /*<<< orphan*/ u_fprintf(int /*<<< orphan*/ *, char *);
void print_header(UFILE *out) {
  u_fprintf(out, "<?xml version='1.1' "
                 "encoding='UTF-8'?>\n<xhtml>\n<head/>\n<body>\n<h1>Chemical "
                 "and Crystal Data</h1>\n");
}


x86 assembly (clang, -O0):
<print_header>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <u_fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_header>:
lea    0xee9(%rip),%rsi
jmp    1030 <u_fprintf@plt>

LLVM IR (-O0):
@.str = [98 x i8] c"<?xml version='1.1' encoding='UTF-8'?>\0A<xhtml>\0A<head/>\0A<body>\0A<h1>Chemical and Crystal Data</h1>\0A\00"
define void @print_header(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @u_fprintf(i32* %3, i8* getelementptr inbounds ([98 x i8], [98 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [98 x i8] c"<?xml version='1.1' encoding='UTF-8'?>\0A<xhtml>\0A<head/>\0A<body>\0A<h1>Chemical and Crystal Data</h1>\0A\00"
define void @print_header(i32* %0) {
%2 = tail call i32 @u_fprintf(i32* %0, i8* getelementptr inbounds ([98 x i8], [98 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int intlength(int);
scalar_t__ malloc(int);
int pow(int, int);
int /*<<< orphan*/ sprintf(char *, char *);
char *to_si(float n) {
  int l = (int)n;
  int length = intlength(l);
  int primary = l / (pow(10, length));
  char *ret = (char *)malloc(sizeof(char) * 500);
  sprintf(ret, "NaN");
  return ret;
}


x86 assembly (clang, -O0):
<to_si>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
cvttss2si -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <intlength@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%esi
mov    $0xa,%edi
call   1050 <pow@plt>
mov    %eax,%ecx
mov    -0x1c(%rbp),%eax
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
mov    $0x1f4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
lea    0xe69(%rip),%rsi
call   1060 <sprintf@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<to_si>:
push   %rax
cvttss2si %xmm0,%edi
call   1030 <intlength@plt>
mov    $0xa,%edi
mov    %eax,%esi
call   1050 <pow@plt>
mov    $0x1f4,%edi
call   1040 <malloc@plt>
movl   $0x4e614e,(%rax)
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"NaN\00"
define i8* @to_si(float %0) {
%2 = alloca float
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store float %0, float* %2
%7 = load float, float* %2
%8 = fptosi float %7 to i32
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = call i32 @intlength(i32 %9)
store i32 %10, i32* %4
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = call i32 @pow(i32 10, i32 %12)
%14 = sdiv i32 %11, %13
store i32 %14, i32* %5
%15 = call i64 @malloc(i32 500)
%16 = inttoptr i64 %15 to i8*
store i8* %16, i8** %6
%17 = load i8*, i8** %6
%18 = call i32 @sprintf(i8* %17, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%19 = load i8*, i8** %6
ret i8* %19
}

LLVM IR (-O2):
define i8* @to_si(float %0) {
%2 = fptosi float %0 to i32
%3 = tail call i32 @intlength(i32 %2)
%4 = tail call i32 @pow(i32 10, i32 %3)
%5 = tail call i64 @malloc(i32 500)
%6 = inttoptr i64 %5 to i8*
%7 = inttoptr i64 %5 to i32*
store i32 5136718, i32* %7
ret i8* %6
}
int main(void) {
  printf("V128 cse:\n");
  __asm__ __volatile__("xorps  %%xmm0,%%xmm0\n\t"
                       "movaps %%xmm1,%%xmm2\n\t"
                       "addps  %%xmm0,%%xmm1\n\t"
                       "addps  %%xmm0,%%xmm2\n\t"
                       "addps  %%xmm1,%%xmm2\n\t"
                       :
                       :
                       : "xmm0", "xmm1", "st");
  printf("F64i cse:\n");
  __asm__ __volatile__("fninit\n\t"
                       "fldz\n\t"
                       "fldz\n\t"
                       "fstp %%st(4)\n\t"
                       "fstp %%st(3)\n\t"
                       "fldpi\n\t"
                       "fldpi\n\t"
                       "fsqrt\n\t"
                       "fxch %%st(1)\n\t"
                       "fsqrt\n\t"
                       "faddp %%st(1)\n\t"
                       :
                       :
                       : "st");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xorps  %xmm0,%xmm0
movaps %xmm1,%xmm2
addps  %xmm0,%xmm1
addps  %xmm0,%xmm2
addps  %xmm1,%xmm2
lea    0xec8(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
fninit
fldz
fldz
fstp   %st(4)
fstp   %st(3)
fldpi
fldpi
fsqrt
fxch   %st(1)
fsqrt
faddp  %st,%st(1)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xorps  %xmm0,%xmm0
movaps %xmm1,%xmm2
addps  %xmm0,%xmm1
addps  %xmm0,%xmm2
addps  %xmm1,%xmm2
lea    0xed7(%rip),%rdi
call   1030 <puts@plt>
fninit
fldz
fldz
fstp   %st(4)
fstp   %st(3)
fldpi
fldpi
fsqrt
fxch   %st(1)
fsqrt
faddp  %st,%st(1)
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"V128 cse:\0A\00"
@.str.1 = [11 x i8] c"F64i cse:\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [10 x i8] c"V128 cse:\00"
@str.2 = [10 x i8] c"F64i cse:\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0))
tail call void asm sideeffect "xorps %xmm0,%xmm0\0A\09movaps %xmm1,%xmm2\0A\09addps %xmm0,%xmm1\0A\09addps %xmm0,%xmm2\0A\09addps %xmm1,%xmm2\0A\09", "~{xmm0},~{xmm1},~{st},~{dirflag},~{fpsr},~{flags}"()
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str.2, i64 0, i64 0))
tail call void asm sideeffect "fninit\0A\09fldz\0A\09fldz\0A\09fstp %st(4)\0A\09fstp %st(3)\0A\09fldpi\0A\09fldpi\0A\09fsqrt\0A\09fxch %st(1)\0A\09fsqrt\0A\09faddp %st(1)\0A\09", "~{st},~{dirflag},~{fpsr},~{flags}"()
ret i32 0
}
int f() {
  const int x;
  double y;
  y = x;
  return 0;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
cvtsi2sdl -0x4(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @f() {
%1 = alloca i32
%2 = alloca double
%3 = load i32, i32* %1
%4 = sitofp i32 %3 to double
store double %4, double* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @f() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
void __flockfile(FILE *stream) {}


x86 assembly (clang, -O0):
<__flockfile>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__flockfile>:
ret

LLVM IR (-O0):
define void @__flockfile(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @__flockfile(i32* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ err_sys(char *);
int sockatmark(int);
int Sockatmark(int fd) {
  int n;
  if ((n = sockatmark(fd)) < 0)
    err_sys("sockatmark error");
  return (n);
}


x86 assembly (clang, -O0):
<Sockatmark>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sockatmark@plt>
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
jge    114b <Sockatmark+0x2b>
lea    0xeba(%rip),%rdi
call   1040 <err_sys@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sockatmark>:
push   %rbx
call   1030 <sockatmark@plt>
mov    %eax,%ebx
test   %eax,%eax
jns    1138 <Sockatmark+0x18>
lea    0xecd(%rip),%rdi
call   1040 <err_sys@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"sockatmark error\00"
define i32 @Sockatmark(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @sockatmark(i32 %4)
store i32 %5, i32* %3
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @err_sys(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %1
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
@.str = [17 x i8] c"sockatmark error\00"
define i32 @Sockatmark(i32 %0) {
%2 = tail call i32 @sockatmark(i32 %0)
%3 = icmp slt i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @err_sys(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
void __w_le_u16(const void *p, const uint16_t val) { *((uint16_t *)(p)) = val; }


x86 assembly (clang, -O0):
<__w_le_u16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__w_le_u16>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @__w_le_u16(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
store i32 %5, i32* %7
ret void
}

LLVM IR (-O2):
define void @__w_le_u16(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
scalar_t__ is_perfect(size_t);
int /*<<< orphan*/ printf(char *, size_t);
int main() {
  size_t max = 10000;
  for (size_t i = 0; i < max; i++) {
    if (is_perfect(i)) {
      printf("Liczba %ld jest doskonała\n", i);
    }
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x2710,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1186 <main+0x66>
mov    -0x18(%rbp),%rdi
call   1030 <is_perfect@plt>
cmp    $0x0,%rax
je     1170 <main+0x50>
mov    -0x18(%rbp),%rsi
lea    0xe95(%rip),%rdi
call   1040 <printf@plt>
jmp    1175 <main+0x55>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    113f <main+0x1f>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xed3(%rip),%r14
jmp    113d <main+0x1d>
nop
add    $0x1,%rbx
cmp    $0x2710,%rbx
je     1157 <main+0x37>
mov    %rbx,%rdi
call   1030 <is_perfect@plt>
test   %rax,%rax
je     1130 <main+0x10>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <printf@plt>
jmp    1130 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [28 x i8] c"Liczba %ld jest doskona\C5\82a\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64
store i32 0, i32* %1
store i64 10000, i64* %2
store i64 0, i64* %3
br label %4
4: ; preds = %16, %0
%5 = load i64, i64* %3
%6 = load i64, i64* %2
%7 = icmp ult i64 %5, %6
br i1 %7, label %8, label %19
8: ; preds = %4
%9 = load i64, i64* %3
%10 = call i64 @is_perfect(i64 %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %8
%13 = load i64, i64* %3
%14 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i64 %13)
br label %15
15: ; preds = %12, %8
br label %16
16: ; preds = %15
%17 = load i64, i64* %3
%18 = add i64 %17, 1
store i64 %18, i64* %3
br label %4
19: ; preds = %4
%20 = load i32, i32* %1
ret i32 %20
}

LLVM IR (-O2):
@.str = [28 x i8] c"Liczba %ld jest doskona\C5\82a\0A\00"
define i32 @main() {
br label %2
1: ; preds = %8
ret i32 0
2: ; preds = %0, %8
%3 = phi i64 [ 0, %0 ], [ %9, %8 ]
%4 = tail call i64 @is_perfect(i64 %3)
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i64 %3)
br label %8
8: ; preds = %2, %6
%9 = add nuw nsw i64 %3, 1
%10 = icmp eq i64 %9, 10000
br i1 %10, label %1, label %2
}
void gtk_tree_model_filter_get_type() {}


x86 assembly (clang, -O0):
<gtk_tree_model_filter_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_model_filter_get_type>:
ret

LLVM IR (-O0):
define void @gtk_tree_model_filter_get_type() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_model_filter_get_type() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SCOTCHFRANDOMRESET();
void scotchfrandomreset__() { SCOTCHFRANDOMRESET(); }


x86 assembly (clang, -O0):
<scotchfrandomreset__>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <SCOTCHFRANDOMRESET@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<scotchfrandomreset__>:
xor    %eax,%eax
jmp    1030 <SCOTCHFRANDOMRESET@plt>

LLVM IR (-O0):
define void @scotchfrandomreset__() {
%1 = call i32 (...) @SCOTCHFRANDOMRESET()
ret void
}

LLVM IR (-O2):
define void @scotchfrandomreset__() {
%1 = tail call i32 (...) @SCOTCHFRANDOMRESET()
ret void
}
int test_imm_5Cuint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0x5C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Cuint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x5c,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Cuint64_lowword_mem>:
testb  $0x5c,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Cuint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 92
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_5Cuint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 92
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
long long test_llrintf(float x) { return __builtin_llrintf(x); }


x86 assembly (clang, -O0):
<test_llrintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <llrintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_llrintf>:
jmp    1030 <llrintf@plt>

LLVM IR (-O0):
define i64 @test_llrintf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i64 @llrintf(float %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @test_llrintf(float %0) {
%2 = tail call i64 @llrintf(float %0)
ret i64 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ print_str(char *);
int vsnprintf(char *, int, char const *, int /*<<< orphan*/);
int vprintf(const char *fmt, va_list ap) {
  char buf[256];
  int r = vsnprintf(buf, 256, fmt, ap);
  buf[r] = 0;
  print_str(buf);
  return r;
}


x86 assembly (clang, -O0):
<vprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x120,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    -0x110(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
mov    $0x100,%esi
call   1030 <vsnprintf@plt>
mov    %eax,-0x114(%rbp)
movslq -0x114(%rbp),%rax
movb   $0x0,-0x110(%rbp,%rax,1)
lea    -0x110(%rbp),%rdi
call   1040 <print_str@plt>
mov    -0x114(%rbp),%eax
add    $0x120,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vprintf>:
push   %r14
push   %rbx
sub    $0x108,%rsp
mov    %esi,%ecx
mov    %rdi,%rdx
mov    %rsp,%r14
mov    %r14,%rdi
mov    $0x100,%esi
call   1030 <vsnprintf@plt>
movslq %eax,%rbx
movb   $0x0,(%rsp,%rbx,1)
mov    %r14,%rdi
call   1040 <print_str@plt>
mov    %ebx,%eax
add    $0x108,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @vprintf(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca [256 x i8]
%6 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = call i32 @vsnprintf(i8* %7, i32 256, i8* %8, i32 %9)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 %12
store i8 0, i8* %13
%14 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%15 = call i32 @print_str(i8* %14)
%16 = load i32, i32* %6
ret i32 %16
}

LLVM IR (-O2):
define i32 @vprintf(i8* nocapture %0, i32 %1) {
%3 = alloca [256 x i8]
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%5 = call i32 @vsnprintf(i8* %4, i32 256, i8* %0, i32 %1)
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 %6
store i8 0, i8* %7
%8 = call i32 @print_str(i8* %4)
ret i32 %5
}
int id(int x) {
  if (x == 0)
    return 0;
  else
    return 1 + id(x - 1);
}


x86 assembly (clang, -O0):
<id>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1131 <id+0x21>
movl   $0x0,-0x4(%rbp)
jmp    1142 <id+0x32>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <id@plt>
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<id>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @id(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %12
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i32 @id(i32 %9)
%11 = add nsw i32 1, %10
store i32 %11, i32* %2
br label %12
12: ; preds = %7, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @id(i32 %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ bench_opAdd();
int /*<<< orphan*/ bench_opCross();
int /*<<< orphan*/ bench_opMul();
int /*<<< orphan*/ bench_opNorm();
int /*<<< orphan*/ bench_opNot();
int /*<<< orphan*/ bench_opRand();
void benchOps() {
  bench_opAdd();
  bench_opMul();
  bench_opNorm();
  bench_opCross();
  bench_opNot();
  bench_opRand();
}


x86 assembly (clang, -O0):
<benchOps>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1080 <bench_opAdd@plt>
mov    $0x0,%al
call   1070 <bench_opMul@plt>
mov    $0x0,%al
call   1050 <bench_opNorm@plt>
mov    $0x0,%al
call   1030 <bench_opCross@plt>
mov    $0x0,%al
call   1040 <bench_opNot@plt>
mov    $0x0,%al
call   1060 <bench_opRand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<benchOps>:
push   %rax
xor    %eax,%eax
call   1080 <bench_opAdd@plt>
xor    %eax,%eax
call   1070 <bench_opMul@plt>
xor    %eax,%eax
call   1050 <bench_opNorm@plt>
xor    %eax,%eax
call   1030 <bench_opCross@plt>
xor    %eax,%eax
call   1040 <bench_opNot@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <bench_opRand@plt>

LLVM IR (-O0):
define void @benchOps() {
%1 = call i32 (...) @bench_opAdd()
%2 = call i32 (...) @bench_opMul()
%3 = call i32 (...) @bench_opNorm()
%4 = call i32 (...) @bench_opCross()
%5 = call i32 (...) @bench_opNot()
%6 = call i32 (...) @bench_opRand()
ret void
}

LLVM IR (-O2):
define void @benchOps() {
%1 = tail call i32 (...) @bench_opAdd()
%2 = tail call i32 (...) @bench_opMul()
%3 = tail call i32 (...) @bench_opNorm()
%4 = tail call i32 (...) @bench_opCross()
%5 = tail call i32 (...) @bench_opNot()
%6 = tail call i32 (...) @bench_opRand()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ db(int);
void fsincos() {
  db(0xD9);
  db(0xFB);
}


x86 assembly (clang, -O0):
<fsincos>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd9,%edi
call   1030 <db@plt>
mov    $0xfb,%edi
call   1030 <db@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsincos>:
push   %rax
mov    $0xd9,%edi
call   1030 <db@plt>
mov    $0xfb,%edi
pop    %rax
jmp    1030 <db@plt>

LLVM IR (-O0):
define void @fsincos() {
%1 = call i32 @db(i32 217)
%2 = call i32 @db(i32 251)
ret void
}

LLVM IR (-O2):
define void @fsincos() {
%1 = tail call i32 @db(i32 217)
%2 = tail call i32 @db(i32 251)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ put8(unsigned char);
void and_al_imm8(unsigned char imm8) {
  put8(0x24);
  put8(imm8);
}


x86 assembly (clang, -O0):
<and_al_imm8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x24,%edi
call   1030 <put8@plt>
movzbl -0x1(%rbp),%edi
call   1030 <put8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<and_al_imm8>:
push   %rbx
mov    %edi,%ebx
mov    $0x24,%edi
call   1030 <put8@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @and_al_imm8(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @put8(i8 zeroext 36)
%4 = load i8, i8* %2
%5 = call i32 @put8(i8 zeroext %4)
ret void
}

LLVM IR (-O2):
define void @and_al_imm8(i8 zeroext %0) {
%2 = tail call i32 @put8(i8 zeroext 36)
%3 = tail call i32 @put8(i8 zeroext %0)
ret void
}
/* Variables and functions */
scalar_t__ M_PI;
double __builtin_sin(double);
double Sleef_sinpi_u05(double x) { return __builtin_sin(x * (double)M_PI); }


x86 assembly (clang, -O0):
<Sleef_sinpi_u05>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    0x2ebf(%rip),%rax
cvtsi2sdq (%rax),%xmm1
mulsd  %xmm1,%xmm0
call   1030 <sin@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sleef_sinpi_u05>:
mov    0x2ed1(%rip),%rax
cvtsi2sdq (%rax),%xmm1
mulsd  %xmm1,%xmm0
jmp    1030 <sin@plt>

LLVM IR (-O0):
@M_PI = global i64 0
define double @Sleef_sinpi_u05(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load i64, i64* @M_PI
%5 = sitofp i64 %4 to double
%6 = fmul double %3, %5
%7 = call double @sin(double %6)
ret double %7
}

LLVM IR (-O2):
@M_PI = global i64 0
define double @Sleef_sinpi_u05(double %0) {
%2 = load i64, i64* @M_PI
%3 = sitofp i64 %2 to double
%4 = fmul double %3, %0
%5 = tail call double @sin(double %4)
ret double %5
}
/* Variables and functions */
void stub1(float, float);
void testClosureFFrV(void (*closure)(float, float), float a1, float a2) {
  if (closure != NULL)
    (*closure)(a1, a2);
}


x86 assembly (clang, -O0):
<testClosureFFrV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  %xmm1,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1131 <testClosureFFrV+0x31>
mov    -0x8(%rbp),%rax
movss  -0xc(%rbp),%xmm0
movss  -0x10(%rbp),%xmm1
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testClosureFFrV>:
test   %rdi,%rdi
je     1107 <testClosureFFrV+0x7>
jmp    *%rdi
ret

LLVM IR (-O0):
define void @testClosureFFrV(void (float, float)* %0, float %1, float %2) {
%4 = alloca void (float, float)*
%5 = alloca float
%6 = alloca float
store void (float, float)* %0, void (float, float)** %4
store float %1, float* %5
store float %2, float* %6
%7 = load void (float, float)*, void (float, float)** %4
%8 = icmp ne void (float, float)* %7, null
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = load void (float, float)*, void (float, float)** %4
%11 = load float, float* %5
%12 = load float, float* %6
br label %13
13: ; preds = %9, %3
ret void
}

LLVM IR (-O2):
define void @testClosureFFrV(void (float, float)* %0, float %1, float %2) {
%4 = icmp eq void (float, float)* %0, null
br i1 %4, label %6, label %5
5: ; preds = %3
tail call void %0(float %1, float %2)
br label %6
6: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ xip_fpo_lessequal_d(int *, double, double);
int xil_fpo_lessequal_d(double a, double b) {
  int res_int;
  xip_fpo_lessequal_d(&res_int, a, b);
  return res_int;
}


x86 assembly (clang, -O0):
<xil_fpo_lessequal_d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
lea    -0x14(%rbp),%rdi
call   1030 <xip_fpo_lessequal_d@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xil_fpo_lessequal_d>:
push   %rax
lea    0x4(%rsp),%rdi
call   1030 <xip_fpo_lessequal_d@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @xil_fpo_lessequal_d(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca i32
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %3
%7 = load double, double* %4
%8 = call i32 @xip_fpo_lessequal_d(i32* %5, double %6, double %7)
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @xil_fpo_lessequal_d(double %0, double %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @xip_fpo_lessequal_d(i32* %3, double %0, double %1)
%6 = load i32, i32* %3
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ ieee_qnan;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
double __qnan(void) {
  static unsigned char ieee_qnan[] = {0xff, 0xff, 0xff, 0xff,
                                      0xff, 0xff, 0xff, 0x7f};
  assert(sizeof(double) == sizeof(ieee_qnan));
  return *(double *)ieee_qnan;
}


x86 assembly (clang, -O0):
<__qnan>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <assert@plt>
movsd  0x2f02(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<__qnan>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
movsd  0xedd(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@__qnan.ieee_qnan = internal global [8 x i8] c"\FF\FF\FF\FF\FF\FF\FF\7F"
define double @__qnan() {
%1 = call i32 @assert(i32 1)
%2 = load double, double* bitcast ([8 x i8]* @__qnan.ieee_qnan to double*)
ret double %2
}

LLVM IR (-O2):
define double @__qnan() {
%1 = tail call i32 @assert(i32 1)
ret double 0x7FFFFFFFFFFFFFFF
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void nhr_free(void *mem) {
  if (mem) {
    free(mem);
  }
}


x86 assembly (clang, -O0):
<nhr_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <nhr_free+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nhr_free>:
test   %rdi,%rdi
je     111a <nhr_free+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @nhr_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @nhr_free(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}