xunge/DecIR huggingface dataset:
int TryAssemble_FILE(void) { return 1; }


x86 assembly (clang, -O0):
<TryAssemble_FILE>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TryAssemble_FILE>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @TryAssemble_FILE() {
ret i32 1
}

LLVM IR (-O2):
define i32 @TryAssemble_FILE() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int i = -1;
  char *s = "i";
  i = -(s[0] == 'i');
  printf("%d", i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xffffffff,-0x8(%rbp)
lea    0xed3(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x69,%eax
sete   %al
and    $0x1,%al
movzbl %al,%ecx
xor    %eax,%eax
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeae(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0xffffffff,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"i\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8*
store i32 0, i32* %1
store i32 -1, i32* %2
store i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8** %3
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 105
%9 = zext i1 %8 to i32
%10 = sub nsw i32 0, %9
store i32 %10, i32* %2
%11 = load i32, i32* %2
%12 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 -1)
ret i32 0
}
/* Variables and functions */
char *basic_type_string(int);
int /*<<< orphan*/ printf(char *, char *);
void dumpBasicType(int bt) {
  printf("BASIC_TYPE: %s\n", basic_type_string(bt));
}


x86 assembly (clang, -O0):
<dumpBasicType>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <basic_type_string@plt>
mov    %rax,%rsi
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dumpBasicType>:
push   %rax
call   1040 <basic_type_string@plt>
lea    0xed3(%rip),%rdi
mov    %rax,%rsi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"BASIC_TYPE: %s\0A\00"
define void @dumpBasicType(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @basic_type_string(i32 %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"BASIC_TYPE: %s\0A\00"
define void @dumpBasicType(i32 %0) {
%2 = tail call i8* @basic_type_string(i32 %0)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %2)
ret void
}
/* Type definitions */
struct work_struct {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ drv_lcd_enable(int);
void resume_work_2(struct work_struct *work) { drv_lcd_enable(2); }


x86 assembly (clang, -O0):
<resume_work_2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x2,%edi
call   1030 <drv_lcd_enable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<resume_work_2>:
mov    $0x2,%edi
jmp    1030 <drv_lcd_enable@plt>

LLVM IR (-O0):
%struct.work_struct = type { i32 }
define void @resume_work_2(%struct.work_struct* %0) {
%2 = alloca %struct.work_struct*
store %struct.work_struct* %0, %struct.work_struct** %2
%3 = call i32 @drv_lcd_enable(i32 2)
ret void
}

LLVM IR (-O2):
%struct.work_struct = type { i32 }
define void @resume_work_2(%struct.work_struct* nocapture readnone %0) {
%2 = tail call i32 @drv_lcd_enable(i32 2)
ret void
}
unsigned int ccuEvent0(unsigned int is, unsigned int em, unsigned int lm,
                       unsigned int lpf) {
  return ((is << 0) | (em << 16) | (lm << 22) | (lpf << 25));
}


x86 assembly (clang, -O0):
<ccuEvent0>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x0,%eax
mov    -0x8(%rbp),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0xc(%rbp),%ecx
shl    $0x16,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
shl    $0x19,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccuEvent0>:
mov    %ecx,%eax
shl    $0x10,%esi
or     %edi,%esi
shl    $0x16,%edx
shl    $0x19,%eax
or     %edx,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @ccuEvent0(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = shl i32 %9, 0
%11 = load i32, i32* %6
%12 = shl i32 %11, 16
%13 = or i32 %10, %12
%14 = load i32, i32* %7
%15 = shl i32 %14, 22
%16 = or i32 %13, %15
%17 = load i32, i32* %8
%18 = shl i32 %17, 25
%19 = or i32 %16, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @ccuEvent0(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = shl i32 %1, 16
%6 = or i32 %5, %0
%7 = shl i32 %2, 22
%8 = or i32 %6, %7
%9 = shl i32 %3, 25
%10 = or i32 %8, %9
ret i32 %10
}
/* Variables and functions */
long __sh_cas(void volatile *, long, long);
long a_cas_l(volatile void *p, long t, long s) { return __sh_cas(p, t, s); }


x86 assembly (clang, -O0):
<a_cas_l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <__sh_cas@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_cas_l>:
jmp    1030 <__sh_cas@plt>

LLVM IR (-O0):
define i64 @a_cas_l(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = call i64 @__sh_cas(i8* %7, i64 %8, i64 %9)
ret i64 %10
}

LLVM IR (-O2):
define i64 @a_cas_l(i8* %0, i64 %1, i64 %2) {
%4 = tail call i64 @__sh_cas(i8* %0, i64 %1, i64 %2)
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, size_t, char *, char *, int, int);
void get_http_server_str(char *buf, size_t len) {
  snprintf(buf, len, "Server: kopou v%s %d bits, -cluster[%d]\r\n\r\n", ".09",
           ((sizeof(long) == 8) ? 64 : 32), 0x080);
}


x86 assembly (clang, -O0):
<get_http_server_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    0xed1(%rip),%rdx
lea    0xef6(%rip),%rcx
mov    $0x40,%r8d
mov    $0x80,%r9d
call   1030 <snprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_http_server_str>:
lea    0xee9(%rip),%rdx
lea    0xf0e(%rip),%rcx
mov    $0x40,%r8d
mov    $0x80,%r9d
jmp    1030 <snprintf@plt>

LLVM IR (-O0):
@.str = [44 x i8] c"Server: kopou v%s %d bits, -cluster[%d]\0D\0A\0D\0A\00"
@.str.1 = [4 x i8] c".09\00"
define void @get_http_server_str(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @snprintf(i8* %5, i64 %6, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 64, i32 128)
ret void
}

LLVM IR (-O2):
@.str = [44 x i8] c"Server: kopou v%s %d bits, -cluster[%d]\0D\0A\0D\0A\00"
@.str.1 = [4 x i8] c".09\00"
define void @get_http_server_str(i8* %0, i64 %1) {
%3 = tail call i32 @snprintf(i8* %0, i64 %1, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 64, i32 128)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, int *);
int main() {
  int n1, n2;
  scanf("%i %i", &n1, &n2);
  printf("PROD = %i\n", n1 * n2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1040 <scanf@plt>
mov    -0x8(%rbp),%esi
imul   -0xc(%rbp),%esi
lea    0xeb5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <scanf@plt>
mov    (%rsp),%esi
imul   0x4(%rsp),%esi
lea    0xec2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%i %i\00"
@.str.1 = [11 x i8] c"PROD = %i\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %2, i32* %3)
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = mul nsw i32 %5, %6
%8 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%i %i\00"
@.str.1 = [11 x i8] c"PROD = %i\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2)
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = mul nsw i32 %7, %6
%9 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}
void ff_hevc_put_hevc_bi_w_qpel_hv16_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_qpel_hv16_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_qpel_hv16_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_qpel_hv16_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_qpel_hv16_10_sse4() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *popen(char *, char *);
void c_popen_(FILE **fp, char *cmd, char *mode) { *fp = popen(cmd, mode); }


x86 assembly (clang, -O0):
<c_popen_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <popen@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_popen_>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
mov    %rdx,%rsi
call   1030 <popen@plt>
mov    %rax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @c_popen_(i32** %0, i8* %1, i8* %2) {
%4 = alloca i32**
%5 = alloca i8*
%6 = alloca i8*
store i32** %0, i32*** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %5
%8 = load i8*, i8** %6
%9 = call i32* @popen(i8* %7, i8* %8)
%10 = load i32**, i32*** %4
store i32* %9, i32** %10
ret void
}

LLVM IR (-O2):
define void @c_popen_(i32** nocapture writeonly %0, i8* nocapture %1, i8* nocapture %2) {
%4 = tail call i32* @popen(i8* %1, i8* %2)
store i32* %4, i32** %0
ret void
}
/* Type definitions */
struct archive {
  int dummy;
};
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int /*<<< orphan*/ archive_position_compressed(struct archive *);
int64_t _alpm_archive_compressed_ftell(struct archive *archive) {
  return archive_position_compressed(archive);
}


x86 assembly (clang, -O0):
<_alpm_archive_compressed_ftell>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <archive_position_compressed@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_alpm_archive_compressed_ftell>:
jmp    1030 <archive_position_compressed@plt>

LLVM IR (-O0):
%struct.archive = type { i32 }
define i32 @_alpm_archive_compressed_ftell(%struct.archive* %0) {
%2 = alloca %struct.archive*
store %struct.archive* %0, %struct.archive** %2
%3 = load %struct.archive*, %struct.archive** %2
%4 = call i32 @archive_position_compressed(%struct.archive* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.archive = type { i32 }
define i32 @_alpm_archive_compressed_ftell(%struct.archive* %0) {
%2 = tail call i32 @archive_position_compressed(%struct.archive* %0)
ret i32 %2
}
/* Variables and functions */
int EXIT_SUCCESS;
int task_kinematics_arc(int argc, char *argv[]) { return EXIT_SUCCESS; }


x86 assembly (clang, -O0):
<task_kinematics_arc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ece(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<task_kinematics_arc>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @task_kinematics_arc(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* @EXIT_SUCCESS
ret i32 %5
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @task_kinematics_arc(i32 %0, i8** nocapture readnone %1) {
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}
int isPrime(long long number) {
  if (number <= 1)
    return 0;
  unsigned long long i;
  for (i = 2; i * i <= number; i++) {
    if (number % i == 0)
      return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<isPrime>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x1,-0x10(%rbp)
jg     111f <isPrime+0x1f>
movl   $0x0,-0x4(%rbp)
jmp    1179 <isPrime+0x79>
movq   $0x2,-0x18(%rbp)
mov    -0x18(%rbp),%rax
imul   -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
ja     1172 <isPrime+0x72>
mov    -0x10(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x18(%rbp)
cmp    $0x0,%rdx
jne    115c <isPrime+0x5c>
movl   $0x0,-0x4(%rbp)
jmp    1179 <isPrime+0x79>
jmp    1161 <isPrime+0x61>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1127 <isPrime+0x27>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPrime>:
xor    %ecx,%ecx
cmp    $0x2,%rdi
jl     115b <isPrime+0x5b>
mov    $0x1,%ecx
cmp    $0x4,%rdi
jb     115b <isPrime+0x5b>
mov    $0x2,%esi
nopl   0x0(%rax,%rax,1)
mov    %rdi,%rax
or     %rsi,%rax
shr    $0x20,%rax
je     1140 <isPrime+0x40>
mov    %rdi,%rax
xor    %edx,%edx
div    %rsi
test   %rdx,%rdx
jne    114b <isPrime+0x4b>
jmp    115e <isPrime+0x5e>
nopl   0x0(%rax,%rax,1)
mov    %edi,%eax
xor    %edx,%edx
div    %esi
test   %rdx,%rdx
je     115e <isPrime+0x5e>
add    $0x1,%rsi
mov    %rsi,%rax
imul   %rsi,%rax
cmp    %rdi,%rax
jbe    1120 <isPrime+0x20>
mov    %ecx,%eax
ret
xor    %ecx,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @isPrime(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
%5 = load i64, i64* %3
%6 = icmp sle i64 %5, 1
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %26
8: ; preds = %1
store i64 2, i64* %4
br label %9
9: ; preds = %22, %8
%10 = load i64, i64* %4
%11 = load i64, i64* %4
%12 = mul i64 %10, %11
%13 = load i64, i64* %3
%14 = icmp ule i64 %12, %13
br i1 %14, label %15, label %25
15: ; preds = %9
%16 = load i64, i64* %3
%17 = load i64, i64* %4
%18 = urem i64 %16, %17
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %15
store i32 0, i32* %2
br label %26
21: ; preds = %15
br label %22
22: ; preds = %21
%23 = load i64, i64* %4
%24 = add i64 %23, 1
store i64 %24, i64* %4
br label %9
25: ; preds = %9
store i32 1, i32* %2
br label %26
26: ; preds = %25, %20, %7
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @isPrime(i64 %0) {
%2 = icmp slt i64 %0, 2
br i1 %2, label %13, label %3
3: ; preds = %1
%4 = icmp ult i64 %0, 4
br i1 %4, label %13, label %8
5: ; preds = %8
%6 = mul i64 %12, %12
%7 = icmp ugt i64 %6, %0
br i1 %7, label %13, label %8
8: ; preds = %3, %5
%9 = phi i64 [ %12, %5 ], [ 2, %3 ]
%10 = urem i64 %0, %9
%11 = icmp eq i64 %10, 0
%12 = add i64 %9, 1
br i1 %11, label %13, label %5
13: ; preds = %5, %8, %3, %1
%14 = phi i32 [ 0, %1 ], [ 1, %3 ], [ 1, %5 ], [ 0, %8 ]
ret i32 %14
}
/* Variables and functions */
size_t NextPowerOfTwo(size_t x) {
  --x;
  x |= x >> 1;
  x |= x >> 2;
  x |= x >> 4;
  x |= x >> 8;
  x |= x >> 16;
  return ++x;
}


x86 assembly (clang, -O0):
<NextPowerOfTwo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x2,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x4,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x8,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x10,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<NextPowerOfTwo>:
lea    -0x1(%rdi),%rax
mov    %rax,%rcx
shr    %rcx
or     %rax,%rcx
mov    %rcx,%rax
shr    $0x2,%rax
or     %rcx,%rax
mov    %rax,%rcx
shr    $0x4,%rcx
or     %rax,%rcx
mov    %rcx,%rdx
shr    $0x8,%rdx
or     %rcx,%rdx
mov    %rdx,%rax
shr    $0x10,%rax
or     %rdx,%rax
add    $0x1,%rax
ret

LLVM IR (-O0):
define i64 @NextPowerOfTwo(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, -1
store i64 %4, i64* %2
%5 = load i64, i64* %2
%6 = lshr i64 %5, 1
%7 = load i64, i64* %2
%8 = or i64 %7, %6
store i64 %8, i64* %2
%9 = load i64, i64* %2
%10 = lshr i64 %9, 2
%11 = load i64, i64* %2
%12 = or i64 %11, %10
store i64 %12, i64* %2
%13 = load i64, i64* %2
%14 = lshr i64 %13, 4
%15 = load i64, i64* %2
%16 = or i64 %15, %14
store i64 %16, i64* %2
%17 = load i64, i64* %2
%18 = lshr i64 %17, 8
%19 = load i64, i64* %2
%20 = or i64 %19, %18
store i64 %20, i64* %2
%21 = load i64, i64* %2
%22 = lshr i64 %21, 16
%23 = load i64, i64* %2
%24 = or i64 %23, %22
store i64 %24, i64* %2
%25 = load i64, i64* %2
%26 = add i64 %25, 1
store i64 %26, i64* %2
ret i64 %26
}

LLVM IR (-O2):
define i64 @NextPowerOfTwo(i64 %0) {
%2 = add i64 %0, -1
%3 = lshr i64 %2, 1
%4 = or i64 %3, %2
%5 = lshr i64 %4, 2
%6 = or i64 %5, %4
%7 = lshr i64 %6, 4
%8 = or i64 %7, %6
%9 = lshr i64 %8, 8
%10 = or i64 %9, %8
%11 = lshr i64 %10, 16
%12 = or i64 %11, %10
%13 = add i64 %12, 1
ret i64 %13
}
reg0adrreg1(r0, r1, x0, x1, p0, p1) int r0, r1;
int *p0, *p1;
{
  if (r0 <= (p1[1111111 / 4]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<reg0adrreg1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x28(%rbp),%rcx
cmp    0x10f444(%rcx),%eax
jg     1137 <reg0adrreg1+0x37>
movl   $0x1,-0x4(%rbp)
jmp    113e <reg0adrreg1+0x3e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg0adrreg1>:
xor    %eax,%eax
cmp    %edi,0x10f444(%r9)
setge  %al
ret

LLVM IR (-O0):
define i32 @reg0adrreg1(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32, i32* %8
%15 = load i32*, i32** %13
%16 = getelementptr inbounds i32, i32* %15, i64 277777
%17 = load i32, i32* %16
%18 = icmp sle i32 %14, %17
br i1 %18, label %19, label %20
19: ; preds = %6
store i32 1, i32* %7
br label %21
20: ; preds = %6
store i32 0, i32* %7
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %7
ret i32 %22
}

LLVM IR (-O2):
define i32 @reg0adrreg1(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture readnone %4, i32* nocapture %5) {
%7 = getelementptr inbounds i32, i32* %5, i64 277777
%8 = load i32, i32* %7
%9 = icmp sge i32 %8, %0
%10 = zext i1 %9 to i32
ret i32 %10
}
int f2(void) {
  unsigned char a = 128;
  return (a & 0x80) ? 0x80 : 0;
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
movb   $0x80,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0x80,%edx
xor    %eax,%eax
mov    $0x80,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
mov    $0x80,%eax
ret

LLVM IR (-O0):
define i32 @f2() {
%1 = alloca i8
store i8 -128, i8* %1
%2 = load i8, i8* %1
%3 = zext i8 %2 to i32
%4 = and i32 %3, 128
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 128, i32 0
ret i32 %7
}

LLVM IR (-O2):
define i32 @f2() {
ret i32 128
}
int valueOf(int cr) {
  cr -= 0x30;
  if (cr > 9) {
    cr -= 7;
  }
  if (cr > 0xF) {
    cr -= 0x20;
  }
  return cr;
}


x86 assembly (clang, -O0):
<valueOf>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x9,-0x4(%rbp)
jle    1123 <valueOf+0x23>
mov    -0x4(%rbp),%eax
sub    $0x7,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0xf,-0x4(%rbp)
jle    1136 <valueOf+0x36>
mov    -0x4(%rbp),%eax
sub    $0x20,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<valueOf>:
lea    -0x30(%rdi),%eax
lea    -0x37(%rdi),%ecx
cmp    $0x3a,%edi
cmovl  %eax,%ecx
lea    -0x20(%rcx),%eax
cmp    $0x10,%ecx
cmovl  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @valueOf(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 %3, 48
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 9
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = sub nsw i32 %8, 7
store i32 %9, i32* %2
br label %10
10: ; preds = %7, %1
%11 = load i32, i32* %2
%12 = icmp sgt i32 %11, 15
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %2
%15 = sub nsw i32 %14, 32
store i32 %15, i32* %2
br label %16
16: ; preds = %13, %10
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @valueOf(i32 %0) {
%2 = icmp sgt i32 %0, 57
%3 = select i1 %2, i32 -55, i32 -48
%4 = add nsw i32 %3, %0
%5 = icmp sgt i32 %4, 15
%6 = add nsw i32 %4, -32
%7 = select i1 %5, i32 %6, i32 %4
ret i32 %7
}
void UI_add_verify_string(void) {}


x86 assembly (clang, -O0):
<UI_add_verify_string>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UI_add_verify_string>:
ret

LLVM IR (-O0):
define void @UI_add_verify_string() {
ret void
}

LLVM IR (-O2):
define void @UI_add_verify_string() {
ret void
}
unsigned int atomic_load_uint(unsigned int *p) {
  return __atomic_load_n((p), 0);
}


x86 assembly (clang, -O0):
<atomic_load_uint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_load_uint>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @atomic_load_uint(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load atomic i32, i32* %4 monotonic
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @atomic_load_uint(i32* nocapture %0) {
%2 = load atomic i32, i32* %0 monotonic
ret i32 %2
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int n = __VERIFIER_nondet_int(), i = n - 1;
  while (i > 1) {
    i--;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jle    114a <main+0x3a>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    1132 <main+0x22>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = sub nsw i32 %5, 1
store i32 %6, i32* %3
br label %7
7: ; preds = %10, %0
%8 = load i32, i32* %3
%9 = icmp sgt i32 %8, 1
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = load i32, i32* %3
%12 = add nsw i32 %11, -1
store i32 %12, i32* %3
br label %7
13: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}
int clamp31(int i) { return ((i < 0) ? 0 : ((i > 31) ? 31 : i)); }


x86 assembly (clang, -O0):
<clamp31>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    111b <clamp31+0x1b>
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    113e <clamp31+0x3e>
cmpl   $0x1f,-0x4(%rbp)
jle    1132 <clamp31+0x32>
mov    $0x1f,%eax
mov    %eax,-0xc(%rbp)
jmp    1138 <clamp31+0x38>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clamp31>:
cmp    $0x1f,%edi
mov    $0x1f,%ecx
cmovl  %edi,%ecx
xor    %eax,%eax
test   %ecx,%ecx
cmovns %ecx,%eax
ret

LLVM IR (-O0):
define i32 @clamp31(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %14
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp sgt i32 %7, 31
br i1 %8, label %9, label %10
9: ; preds = %6
br label %12
10: ; preds = %6
%11 = load i32, i32* %2
br label %12
12: ; preds = %10, %9
%13 = phi i32 [ 31, %9 ], [ %11, %10 ]
br label %14
14: ; preds = %12, %5
%15 = phi i32 [ 0, %5 ], [ %13, %12 ]
ret i32 %15
}

LLVM IR (-O2):
define i32 @clamp31(i32 %0) {
%2 = icmp slt i32 %0, 31
%3 = select i1 %2, i32 %0, i32 31
%4 = icmp sgt i32 %3, 0
%5 = select i1 %4, i32 %3, i32 0
ret i32 %5
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int retrieve_hyperplane_sections(int m, int k, int n, int i, double *c) {
  int a[3], fail;
  a[0] = m;
  a[1] = k;
  a[2] = n;
  fail = _ada_use_c2phc4c(61, a, &i, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<retrieve_hyperplane_sections>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
lea    -0x24(%rbp),%rsi
mov    -0x18(%rbp),%rcx
mov    $0x3d,%edi
lea    -0x10(%rbp),%rdx
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x28(%rbp)
mov    -0x28(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<retrieve_hyperplane_sections>:
sub    $0x18,%rsp
mov    %ecx,0x8(%rsp)
mov    %edi,0xc(%rsp)
mov    %esi,0x10(%rsp)
mov    %edx,0x14(%rsp)
lea    0xc(%rsp),%rsi
lea    0x8(%rsp),%rdx
mov    $0x3d,%edi
mov    %r8,%rcx
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @retrieve_hyperplane_sections(i32 %0, i32 %1, i32 %2, i32 %3, double* %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca double*
%11 = alloca [3 x i32]
%12 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store double* %4, double** %10
%13 = load i32, i32* %6
%14 = getelementptr inbounds [3 x i32], [3 x i32]* %11, i64 0, i64 0
store i32 %13, i32* %14
%15 = load i32, i32* %7
%16 = getelementptr inbounds [3 x i32], [3 x i32]* %11, i64 0, i64 1
store i32 %15, i32* %16
%17 = load i32, i32* %8
%18 = getelementptr inbounds [3 x i32], [3 x i32]* %11, i64 0, i64 2
store i32 %17, i32* %18
%19 = getelementptr inbounds [3 x i32], [3 x i32]* %11, i64 0, i64 0
%20 = load double*, double** %10
%21 = call i32 @_ada_use_c2phc4c(i32 61, i32* %19, i32* %9, double* %20, i32 0)
store i32 %21, i32* %12
%22 = load i32, i32* %12
ret i32 %22
}

LLVM IR (-O2):
define i32 @retrieve_hyperplane_sections(i32 %0, i32 %1, i32 %2, i32 %3, double* %4) {
%6 = alloca i32
%7 = alloca [3 x i32]
store i32 %3, i32* %6
%8 = bitcast [3 x i32]* %7 to i8*
%9 = getelementptr inbounds [3 x i32], [3 x i32]* %7, i64 0, i64 0
store i32 %0, i32* %9
%10 = getelementptr inbounds [3 x i32], [3 x i32]* %7, i64 0, i64 1
store i32 %1, i32* %10
%11 = getelementptr inbounds [3 x i32], [3 x i32]* %7, i64 0, i64 2
store i32 %2, i32* %11
%12 = call i32 @_ada_use_c2phc4c(i32 61, i32* %9, i32* %6, double* %4, i32 0)
ret i32 %12
}
max1(a, b) int a, b;
{
  if (a < b)
    return (b);
  return (a);
}


x86 assembly (clang, -O0):
<max1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1121 <max1+0x21>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <max1+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max1>:
mov    %edi,%eax
cmp    %esi,%edi
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define i32 @max1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %5
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %4
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @max1(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
int __atomic_inc(volatile int *ptr) { return __sync_fetch_and_add(ptr, 1); }


x86 assembly (clang, -O0):
<__atomic_inc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x1,%eax
lock xadd %eax,(%rcx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__atomic_inc>:
mov    $0x1,%eax
lock xadd %eax,(%rdi)
ret

LLVM IR (-O0):
define i32 @__atomic_inc(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = atomicrmw add i32* %3, i32 1 seq_cst
ret i32 %4
}

LLVM IR (-O2):
define i32 @__atomic_inc(i32* nocapture %0) {
%2 = atomicrmw add i32* %0, i32 1 seq_cst
ret i32 %2
}
/* Variables and functions */
scalar_t__ writefd(int, int);
int my_sendfd(int fd, int wfd) {
  if (writefd(fd, wfd) >= 0) {
    return 0;
  } else {
    return -1;
  }
}


x86 assembly (clang, -O0):
<my_sendfd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <writefd@plt>
cmp    $0x0,%rax
jl     113f <my_sendfd+0x2f>
movl   $0x0,-0x4(%rbp)
jmp    1146 <my_sendfd+0x36>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_sendfd>:
push   %rax
call   1030 <writefd@plt>
sar    $0x3f,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @my_sendfd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = call i64 @writefd(i32 %6, i32 %7)
%9 = icmp sge i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 0, i32* %3
br label %12
11: ; preds = %2
store i32 -1, i32* %3
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @my_sendfd(i32 %0, i32 %1) {
%3 = tail call i64 @writefd(i32 %0, i32 %1)
%4 = ashr i64 %3, 63
%5 = trunc i64 %4 to i32
ret i32 %5
}
/* Variables and functions */
int prng();
int my_rand() {
  int a = 0;
  a = (a << 8) + (prng() & 0xff);
  a = (a << 8) + (prng() & 0xff);
  a = (a << 8) + (prng() & 0xff);
  a = (a << 8) + (prng() & 0xff);
  return a;
}


x86 assembly (clang, -O0):
<my_rand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1030 <prng@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
and    $0xff,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <prng@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
and    $0xff,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <prng@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
and    $0xff,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <prng@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
and    $0xff,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_rand>:
push   %rbp
push   %rbx
push   %rax
xor    %eax,%eax
call   1030 <prng@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <prng@plt>
mov    %eax,%ebp
xor    %eax,%eax
call   1030 <prng@plt>
shl    $0x18,%ebx
movzbl %bpl,%ecx
shl    $0x10,%ecx
or     %ebx,%ecx
shl    $0x8,%eax
movzwl %ax,%ebx
or     %ecx,%ebx
xor    %eax,%eax
call   1030 <prng@plt>
movzbl %al,%eax
or     %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @my_rand() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
%3 = shl i32 %2, 8
%4 = call i32 (...) @prng()
%5 = and i32 %4, 255
%6 = add nsw i32 %3, %5
store i32 %6, i32* %1
%7 = load i32, i32* %1
%8 = shl i32 %7, 8
%9 = call i32 (...) @prng()
%10 = and i32 %9, 255
%11 = add nsw i32 %8, %10
store i32 %11, i32* %1
%12 = load i32, i32* %1
%13 = shl i32 %12, 8
%14 = call i32 (...) @prng()
%15 = and i32 %14, 255
%16 = add nsw i32 %13, %15
store i32 %16, i32* %1
%17 = load i32, i32* %1
%18 = shl i32 %17, 8
%19 = call i32 (...) @prng()
%20 = and i32 %19, 255
%21 = add nsw i32 %18, %20
store i32 %21, i32* %1
%22 = load i32, i32* %1
ret i32 %22
}

LLVM IR (-O2):
define i32 @my_rand() {
%1 = tail call i32 (...) @prng()
%2 = tail call i32 (...) @prng()
%3 = tail call i32 (...) @prng()
%4 = shl i32 %1, 24
%5 = shl i32 %2, 16
%6 = and i32 %5, 16711680
%7 = or i32 %6, %4
%8 = shl i32 %3, 8
%9 = and i32 %8, 65280
%10 = or i32 %7, %9
%11 = tail call i32 (...) @prng()
%12 = and i32 %11, 255
%13 = or i32 %10, %12
ret i32 %13
}
int main() {
  unsigned char buf = 0xCC;
  unsigned long out;
  __asm__("cld\n"
          "lea %1, %%rdi\n"
          "movb $0x42, %%al\n"
          "stosb\n"
          "movq %%rdi, %0"
          : "=r"(out)
          : "m"(buf));
  return (out == ((unsigned long)&buf + 1)) && (buf == 0x42);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movb   $0xcc,-0x5(%rbp)
cld
lea    -0x5(%rbp),%rdi
mov    $0x42,%al
stos   %al,%es:(%rdi)
mov    %rdi,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
lea    -0x5(%rbp),%rdx
add    $0x1,%rdx
xor    %eax,%eax
cmp    %rdx,%rcx
mov    %al,-0x11(%rbp)
jne    1145 <main+0x45>
movzbl -0x5(%rbp),%eax
cmp    $0x42,%eax
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
movb   $0xcc,-0x1(%rsp)
cld
lea    -0x1(%rsp),%rdi
mov    $0x42,%al
stos   %al,%es:(%rdi)
mov    %rdi,%rax
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i64
store i32 0, i32* %1
store i8 -52, i8* %2
%4 = call i64 asm "cld\0Alea $1, %rdi\0Amovb $$0x42, %al\0Astosb\0Amovq %rdi, $0", "=r,*m,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %2)
store i64 %4, i64* %3
%5 = load i64, i64* %3
%6 = ptrtoint i8* %2 to i64
%7 = add i64 %6, 1
%8 = icmp eq i64 %5, %7
br i1 %8, label %9, label %13
9: ; preds = %0
%10 = load i8, i8* %2
%11 = zext i8 %10 to i32
%12 = icmp eq i32 %11, 66
br label %13
13: ; preds = %9, %0
%14 = phi i1 [ false, %0 ], [ %12, %9 ]
%15 = zext i1 %14 to i32
ret i32 %15
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i8
store i8 -52, i8* %1
%2 = call i64 asm "cld\0Alea $1, %rdi\0Amovb $$0x42, %al\0Astosb\0Amovq %rdi, $0", "=r,*m,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *);
void printTestResult(int predicate, char *nameTestFunction, char *message) {
  if (predicate)
    printf("%s(): PASS %s\n", nameTestFunction, message);
  else
    printf("%s(): FAIL %s\n", nameTestFunction, message);
}


x86 assembly (clang, -O0):
<printTestResult>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1146 <printTestResult+0x36>
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
jmp    115a <printTestResult+0x4a>
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printTestResult>:
test   %edi,%edi
lea    0xef6(%rip),%rax
lea    0xee0(%rip),%rdi
cmove  %rax,%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"%s(): PASS %s\0A\00"
@.str.1 = [15 x i8] c"%s(): FAIL %s\0A\00"
define void @printTestResult(i32 %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = load i8*, i8** %5
%11 = load i8*, i8** %6
%12 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %10, i8* %11)
br label %17
13: ; preds = %3
%14 = load i8*, i8** %5
%15 = load i8*, i8** %6
%16 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i8* %14, i8* %15)
br label %17
17: ; preds = %13, %9
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"%s(): PASS %s\0A\00"
@.str.1 = [15 x i8] c"%s(): FAIL %s\0A\00"
define void @printTestResult(i32 %0, i8* %1, i8* %2) {
%4 = icmp eq i32 %0, 0
%5 = select i1 %4, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0)
%6 = tail call i32 @printf(i8* %5, i8* %1, i8* %2)
ret void
}
/* Type definitions */
struct OutputStream {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ PrintCh(char, struct OutputStream *);
void PrintRepeatedChar(char ShowChar, int Length, struct OutputStream *Stream) {
  while (Length-- > 0)
    PrintCh(ShowChar, Stream);
}


x86 assembly (clang, -O0):
<PrintRepeatedChar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x8(%rbp)
cmp    $0x0,%eax
jle    114d <PrintRepeatedChar+0x3d>
mov    -0x1(%rbp),%al
mov    -0x10(%rbp),%rsi
movsbl %al,%edi
call   1030 <PrintCh@plt>
jmp    1125 <PrintRepeatedChar+0x15>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PrintRepeatedChar>:
push   %rbp
push   %r14
push   %rbx
test   %esi,%esi
jle    1142 <PrintRepeatedChar+0x32>
mov    %rdx,%r14
mov    %esi,%ebp
add    $0x1,%ebp
movsbl %dil,%ebx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %ebx,%edi
mov    %r14,%rsi
call   1030 <PrintCh@plt>
add    $0xffffffff,%ebp
cmp    $0x1,%ebp
ja     1130 <PrintRepeatedChar+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
%struct.OutputStream = type { i32 }
define void @PrintRepeatedChar(i8 signext %0, i32 %1, %struct.OutputStream* %2) {
%4 = alloca i8
%5 = alloca i32
%6 = alloca %struct.OutputStream*
store i8 %0, i8* %4
store i32 %1, i32* %5
store %struct.OutputStream* %2, %struct.OutputStream** %6
br label %7
7: ; preds = %11, %3
%8 = load i32, i32* %5
%9 = add nsw i32 %8, -1
store i32 %9, i32* %5
%10 = icmp sgt i32 %8, 0
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = load i8, i8* %4
%13 = load %struct.OutputStream*, %struct.OutputStream** %6
%14 = call i32 @PrintCh(i8 signext %12, %struct.OutputStream* %13)
br label %7
15: ; preds = %7
ret void
}

LLVM IR (-O2):
%struct.OutputStream = type { i32 }
define void @PrintRepeatedChar(i8 signext %0, i32 %1, %struct.OutputStream* %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %10
5: ; preds = %3, %5
%6 = phi i32 [ %7, %5 ], [ %1, %3 ]
%7 = add nsw i32 %6, -1
%8 = tail call i32 @PrintCh(i8 signext %0, %struct.OutputStream* %2)
%9 = icmp ugt i32 %6, 1
br i1 %9, label %5, label %10
10: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ vx86_NBSB_Write16(int, unsigned char, unsigned short);
void sb_Write16(unsigned char offset, unsigned short val) {
  vx86_NBSB_Write16(2, offset, val);
}


x86 assembly (clang, -O0):
<sb_Write16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x1(%rbp),%al
mov    $0x2,%edi
movzbl %al,%esi
movzwl -0x4(%rbp),%edx
call   1030 <vx86_NBSB_Write16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sb_Write16>:
mov    %esi,%edx
mov    %edi,%esi
mov    $0x2,%edi
jmp    1030 <vx86_NBSB_Write16@plt>

LLVM IR (-O0):
define void @sb_Write16(i8 zeroext %0, i16 zeroext %1) {
%3 = alloca i8
%4 = alloca i16
store i8 %0, i8* %3
store i16 %1, i16* %4
%5 = load i8, i8* %3
%6 = load i16, i16* %4
%7 = call i32 @vx86_NBSB_Write16(i32 2, i8 zeroext %5, i16 zeroext %6)
ret void
}

LLVM IR (-O2):
define void @sb_Write16(i8 zeroext %0, i16 zeroext %1) {
%3 = tail call i32 @vx86_NBSB_Write16(i32 2, i8 zeroext %0, i16 zeroext %1)
ret void
}
void rop3_122_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  unsigned char stk4;
  stk4 = ~*D;
  stk3 = S | stk4;
  stk2 = T & stk3;
  stk1 = *D ^ stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_122_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
xor    $0xffffffff,%eax
mov    %al,-0xe(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xe(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xd(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xd(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_122_1_1>:
ret

LLVM IR (-O0):
define void @rop3_122_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = xor i32 %13, -1
%15 = trunc i32 %14 to i8
store i8 %15, i8* %10
%16 = load i8, i8* %5
%17 = zext i8 %16 to i32
%18 = load i8, i8* %10
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
%21 = trunc i32 %20 to i8
store i8 %21, i8* %9
%22 = load i8, i8* %6
%23 = zext i8 %22 to i32
%24 = load i8, i8* %9
%25 = zext i8 %24 to i32
%26 = and i32 %23, %25
%27 = trunc i32 %26 to i8
store i8 %27, i8* %8
%28 = load i8*, i8** %4
%29 = load i8, i8* %28
%30 = zext i8 %29 to i32
%31 = load i8, i8* %8
%32 = zext i8 %31 to i32
%33 = xor i32 %30, %32
%34 = trunc i32 %33 to i8
store i8 %34, i8* %7
%35 = load i8, i8* %7
%36 = zext i8 %35 to i32
%37 = load i8, i8* %5
%38 = zext i8 %37 to i32
%39 = xor i32 %38, -1
%40 = and i32 %36, %39
%41 = load i8, i8* %6
%42 = zext i8 %41 to i32
%43 = xor i32 %42, -1
%44 = and i32 %40, %43
%45 = load i8*, i8** %4
%46 = load i8, i8* %45
%47 = zext i8 %46 to i32
%48 = load i8, i8* %5
%49 = zext i8 %48 to i32
%50 = and i32 %47, %49
%51 = or i32 %44, %50
%52 = load i8*, i8** %4
%53 = load i8, i8* %52
%54 = zext i8 %53 to i32
%55 = load i8, i8* %6
%56 = zext i8 %55 to i32
%57 = and i32 %54, %56
%58 = or i32 %51, %57
%59 = trunc i32 %58 to i8
%60 = load i8*, i8** %4
store i8 %59, i8* %60
ret void
}

LLVM IR (-O2):
define void @rop3_122_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ presentar(int);
int sumar(int, int);
int main(int argc, char **argv) {
  int suma = sumar(2, 2);
  presentar(suma);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x2,%esi
mov    %esi,%edi
call   1030 <sumar@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1040 <presentar@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2,%edi
mov    $0x2,%esi
call   1030 <sumar@plt>
mov    %eax,%edi
call   1040 <presentar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 @sumar(i32 2, i32 2)
store i32 %7, i32* %6
%8 = load i32, i32* %6
%9 = call i32 @presentar(i32 %8)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @sumar(i32 2, i32 2)
%4 = tail call i32 @presentar(i32 %3)
ret i32 0
}
void TimerSynchronize(unsigned long ulBase, unsigned long ulTimers) {
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000010))) = ulTimers;
}


x86 assembly (clang, -O0):
<TimerSynchronize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerSynchronize>:
mov    %rsi,0x10(%rdi)
ret

LLVM IR (-O0):
define void @TimerSynchronize(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add i64 %6, 16
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @TimerSynchronize(i64 %0, i64 %1) {
%3 = add i64 %0, 16
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}
void gdk_region_point_in() {}


x86 assembly (clang, -O0):
<gdk_region_point_in>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_region_point_in>:
ret

LLVM IR (-O0):
define void @gdk_region_point_in() {
ret void
}

LLVM IR (-O2):
define void @gdk_region_point_in() {
ret void
}
short complement(short x) { return ~x; }


x86 assembly (clang, -O0):
<complement>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
xor    $0xffffffff,%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<complement>:
mov    %edi,%eax
not    %eax
ret

LLVM IR (-O0):
define signext i16 @complement(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = xor i32 %4, -1
%6 = trunc i32 %5 to i16
ret i16 %6
}

LLVM IR (-O2):
define signext i16 @complement(i16 signext %0) {
%2 = xor i16 %0, -1
ret i16 %2
}
unsigned char cast_uint_uchar(unsigned int x) { return (unsigned char)x; }


x86 assembly (clang, -O0):
<cast_uint_uchar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cast_uint_uchar>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @cast_uint_uchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i8
ret i8 %4
}

LLVM IR (-O2):
define zeroext i8 @cast_uint_uchar(i32 %0) {
%2 = trunc i32 %0 to i8
ret i8 %2
}
void debugpins_slot_set() {}


x86 assembly (clang, -O0):
<debugpins_slot_set>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<debugpins_slot_set>:
ret

LLVM IR (-O0):
define void @debugpins_slot_set() {
ret void
}

LLVM IR (-O2):
define void @debugpins_slot_set() {
ret void
}
void start(void) {}


x86 assembly (clang, -O0):
<start>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<start>:
ret

LLVM IR (-O0):
define void @start() {
ret void
}

LLVM IR (-O2):
define void @start() {
ret void
}