xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(char *prog) {
  fprintf(stderr,
          "Usage: %s [ -q ] [ -o offset ] [ -f frequency ] [ -p timeconstant ] "
          "[ -t tick ] [ -s ]\n",
          prog);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [88 x i8] c"Usage: %s [ -q ] [ -o offset ] [ -f frequency ] [ -p timeconstant ] [ -t tick ] [ -s ]\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([88 x i8], [88 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [88 x i8] c"Usage: %s [ -q ] [ -o offset ] [ -f frequency ] [ -p timeconstant ] [ -t tick ] [ -s ]\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([88 x i8], [88 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
struct sha3_ctx {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cryptonite_sha3_finalize_with_pad_byte(struct sha3_ctx *,
                                                          int);
void cryptonite_sha3_finalize_shake(struct sha3_ctx *ctx) {
  cryptonite_sha3_finalize_with_pad_byte(ctx, 0x1F);
}


x86 assembly (clang, -O0):
<cryptonite_sha3_finalize_shake>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1f,%esi
call   1030 <cryptonite_sha3_finalize_with_pad_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cryptonite_sha3_finalize_shake>:
mov    $0x1f,%esi
jmp    1030 <cryptonite_sha3_finalize_with_pad_byte@plt>

LLVM IR (-O0):
%struct.sha3_ctx = type { i32 }
define void @cryptonite_sha3_finalize_shake(%struct.sha3_ctx* %0) {
%2 = alloca %struct.sha3_ctx*
store %struct.sha3_ctx* %0, %struct.sha3_ctx** %2
%3 = load %struct.sha3_ctx*, %struct.sha3_ctx** %2
%4 = call i32 @cryptonite_sha3_finalize_with_pad_byte(%struct.sha3_ctx* %3, i32 31)
ret void
}

LLVM IR (-O2):
%struct.sha3_ctx = type { i32 }
define void @cryptonite_sha3_finalize_shake(%struct.sha3_ctx* %0) {
%2 = tail call i32 @cryptonite_sha3_finalize_with_pad_byte(%struct.sha3_ctx* %0, i32 31)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void ptabulacao(int tabulacao) {
  int i;
  for (i = 0; i < tabulacao; i++)
    printf("\t");
}


x86 assembly (clang, -O0):
<ptabulacao>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1148 <ptabulacao+0x38>
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <ptabulacao+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptabulacao>:
push   %rbx
test   %edi,%edi
jle    112f <ptabulacao+0x1f>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0x9,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebx
jne    1120 <ptabulacao+0x10>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\09\00"
define void @ptabulacao(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @ptabulacao(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = tail call i32 @putchar(i32 9)
%6 = add nuw nsw i32 %4, 1
%7 = icmp eq i32 %6, %0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}
/* Variables and functions */
int sizeY();
int centerY() { return (sizeY()) / 2; }


x86 assembly (clang, -O0):
<centerY>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sizeY@plt>
mov    $0x2,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<centerY>:
push   %rax
xor    %eax,%eax
call   1030 <sizeY@plt>
mov    %eax,%ecx
shr    $0x1f,%ecx
add    %ecx,%eax
sar    %eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @centerY() {
%1 = call i32 (...) @sizeY()
%2 = sdiv i32 %1, 2
ret i32 %2
}

LLVM IR (-O2):
define i32 @centerY() {
%1 = tail call i32 (...) @sizeY()
%2 = sdiv i32 %1, 2
ret i32 %2
}
int modulo(int x, int m) {
  int r;
  if (m < 0)
    m = -m;
  r = x % m;
  return r < 0 ? r + m : r;
}


x86 assembly (clang, -O0):
<modulo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    111c <modulo+0x1c>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    113e <modulo+0x3e>
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1144 <modulo+0x44>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<modulo>:
mov    %edi,%eax
mov    %esi,%ecx
neg    %ecx
cmovs  %esi,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
sar    $0x1f,%eax
and    %ecx,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @modulo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* %4
%10 = sub nsw i32 0, %9
store i32 %10, i32* %4
br label %11
11: ; preds = %8, %2
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = srem i32 %12, %13
store i32 %14, i32* %5
%15 = load i32, i32* %5
%16 = icmp slt i32 %15, 0
br i1 %16, label %17, label %21
17: ; preds = %11
%18 = load i32, i32* %5
%19 = load i32, i32* %4
%20 = add nsw i32 %18, %19
br label %23
21: ; preds = %11
%22 = load i32, i32* %5
br label %23
23: ; preds = %21, %17
%24 = phi i32 [ %20, %17 ], [ %22, %21 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @modulo(i32 %0, i32 %1) {
%3 = tail call i32 @llvm.abs.i32(i32 %1, i1 true)
%4 = srem i32 %0, %3
%5 = icmp slt i32 %4, 0
%6 = select i1 %5, i32 %3, i32 0
%7 = add nsw i32 %6, %4
ret i32 %7
}
void rop3_217_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = T & S;
  stk2 = *D | stk3;
  stk1 = S ^ stk2;
  stk1 = ~stk1;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_217_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_217_0_0>:
and    %esi,%edx
or     (%rdi),%dl
xor    %sil,%dl
not    %dl
mov    %dl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_217_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %6
%11 = zext i8 %10 to i32
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = and i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %9
%16 = load i8*, i8** %4
%17 = load i8, i8* %16
%18 = zext i8 %17 to i32
%19 = load i8, i8* %9
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
%22 = trunc i32 %21 to i8
store i8 %22, i8* %8
%23 = load i8, i8* %5
%24 = zext i8 %23 to i32
%25 = load i8, i8* %8
%26 = zext i8 %25 to i32
%27 = xor i32 %24, %26
%28 = trunc i32 %27 to i8
store i8 %28, i8* %7
%29 = load i8, i8* %7
%30 = zext i8 %29 to i32
%31 = xor i32 %30, -1
%32 = trunc i32 %31 to i8
store i8 %32, i8* %7
%33 = load i8, i8* %7
%34 = load i8*, i8** %4
store i8 %33, i8* %34
ret void
}

LLVM IR (-O2):
define void @rop3_217_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = and i8 %2, %1
%5 = load i8, i8* %0
%6 = or i8 %5, %4
%7 = xor i8 %6, %1
%8 = xor i8 %7, -1
store i8 %8, i8* %0
ret void
}
/* Variables and functions */
int rand();
int /*<<< orphan*/ sleep(int);
void sleepRandom() {
  int seconds = rand() % 3 + 1;
  sleep(seconds);
}


x86 assembly (clang, -O0):
<sleepRandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <rand@plt>
mov    $0x3,%ecx
cltd
idiv   %ecx
add    $0x1,%edx
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleepRandom>:
push   %rax
xor    %eax,%eax
call   1040 <rand@plt>
cltq
imul   $0x55555556,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,2),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%edi
add    $0x1,%edi
pop    %rax
jmp    1030 <sleep@plt>

LLVM IR (-O0):
define void @sleepRandom() {
%1 = alloca i32
%2 = call i32 (...) @rand()
%3 = srem i32 %2, 3
%4 = add nsw i32 %3, 1
store i32 %4, i32* %1
%5 = load i32, i32* %1
%6 = call i32 @sleep(i32 %5)
ret void
}

LLVM IR (-O2):
define void @sleepRandom() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 3
%3 = add nsw i32 %2, 1
%4 = tail call i32 @sleep(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void handler() {
  printf("Caught\n");
  return;
}


x86 assembly (clang, -O0):
<handler>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<handler>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"Caught\0A\00"
define void @handler() {
%1 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [7 x i8] c"Caught\00"
define void @handler() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
ret void
}
int main() {
  int i;
  int res = 12;
  goto L1;
  for (i = 0; i < 100; i++) {
    if (i > 100) {
    L1:
      res = 0;
      goto L2;
    }
  }
L2:
  return res;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0xc,-0xc(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 12, i32* %3
br label %12
4: ; No predecessors!
store i32 0, i32* %2
br label %5
5: ; preds = %14, %4
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 100
br i1 %7, label %8, label %17
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp sgt i32 %9, 100
br i1 %10, label %11, label %13
11: ; preds = %8
br label %12
12: ; preds = %11, %0
store i32 0, i32* %3
br label %18
13: ; preds = %8
br label %14
14: ; preds = %13
%15 = load i32, i32* %2
%16 = add nsw i32 %15, 1
store i32 %16, i32* %2
br label %5
17: ; preds = %5
br label %18
18: ; preds = %17, %12
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
double pow(double, double);
double Rgsquare(double L, double b) {
  const double x = L / b;
  const double alphasq =
      pow(1.0 + x * x * (1.027284681130835e-01 + 1.534414548417740e-03 * x),
          5.866666666666667e-02);
  return alphasq * L * b / 6.0;
}


x86 assembly (clang, -O0):
<Rgsquare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
divsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
movsd  0xed0(%rip),%xmm2
mulsd  %xmm2,%xmm1
movsd  0xecc(%rip),%xmm2
addsd  %xmm2,%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeac(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  0xe98(%rip),%xmm1
call   1030 <pow@plt>
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  0xe6f(%rip),%xmm1
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Rgsquare>:
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
movsd  %xmm0,0x8(%rsp)
divsd  %xmm1,%xmm0
movapd %xmm0,%xmm1
mulsd  0xed0(%rip),%xmm0
addsd  0xed0(%rip),%xmm0
mulsd  %xmm1,%xmm1
mulsd  %xmm1,%xmm0
addsd  0xec8(%rip),%xmm0
movsd  0xec8(%rip),%xmm1
call   1030 <pow@plt>
mulsd  0x8(%rsp),%xmm0
mulsd  0x10(%rsp),%xmm0
divsd  0xeb7(%rip),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @Rgsquare(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %3
store double %1, double* %4
%7 = load double, double* %3
%8 = load double, double* %4
%9 = fdiv double %7, %8
store double %9, double* %5
%10 = load double, double* %5
%11 = load double, double* %5
%12 = fmul double %10, %11
%13 = load double, double* %5
%14 = call double @llvm.fmuladd.f64(double 0x3F5923CD13741802, double %13, double 0x3FBA4C69B2E9F38C)
%15 = call double @llvm.fmuladd.f64(double %12, double %14, double 1.000000e+00)
%16 = call double @pow(double %15, double 0x3FAE098EAD65B7A4)
store double %16, double* %6
%17 = load double, double* %6
%18 = load double, double* %3
%19 = fmul double %17, %18
%20 = load double, double* %4
%21 = fmul double %19, %20
%22 = fdiv double %21, 6.000000e+00
ret double %22
}

LLVM IR (-O2):
define double @Rgsquare(double %0, double %1) {
%3 = fdiv double %0, %1
%4 = fmul double %3, %3
%5 = tail call double @llvm.fmuladd.f64(double %3, double 0x3F5923CD13741802, double 0x3FBA4C69B2E9F38C)
%6 = tail call double @llvm.fmuladd.f64(double %4, double %5, double 1.000000e+00)
%7 = tail call double @pow(double %6, double 0x3FAE098EAD65B7A4)
%8 = fmul double %7, %0
%9 = fmul double %8, %1
%10 = fdiv double %9, 6.000000e+00
ret double %10
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void caml_js_call_parent() {
  fprintf(stderr, "Unimplemented Javascript primitive %s!\n",
          "caml_js_call_parent");
  exit(1);
}


x86 assembly (clang, -O0):
<caml_js_call_parent>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
lea    0xeed(%rip),%rdx
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<caml_js_call_parent>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
lea    0xef0(%rip),%rdx
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [40 x i8] c"Unimplemented Javascript primitive %s!\0A\00"
@.str.1 = [20 x i8] c"caml_js_call_parent\00"
define void @caml_js_call_parent() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [40 x i8] c"Unimplemented Javascript primitive %s!\0A\00"
@.str.1 = [20 x i8] c"caml_js_call_parent\00"
define void @caml_js_call_parent() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
void platform_wifi_power_off(void) {}


x86 assembly (clang, -O0):
<platform_wifi_power_off>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<platform_wifi_power_off>:
ret

LLVM IR (-O0):
define void @platform_wifi_power_off() {
ret void
}

LLVM IR (-O2):
define void @platform_wifi_power_off() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ memset(int /*<<< orphan*/ *, int /*<<< orphan*/, size_t);
uint8_t *format_byte_many(uint8_t *restrict buffer, uint8_t byte, size_t size) {
  memset(buffer, byte, size);
  return buffer + size;
}


x86 assembly (clang, -O0):
<format_byte_many>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1030 <memset@plt>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<format_byte_many>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rdi,%rbx
call   1030 <memset@plt>
lea    (%rbx,%r14,4),%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32* @format_byte_many(i32* noalias %0, i32 %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i64
store i32* %0, i32** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = load i64, i64* %6
%10 = call i32 @memset(i32* %7, i32 %8, i64 %9)
%11 = load i32*, i32** %4
%12 = load i64, i64* %6
%13 = getelementptr inbounds i32, i32* %11, i64 %12
ret i32* %13
}

LLVM IR (-O2):
define i32* @format_byte_many(i32* noalias %0, i32 %1, i64 %2) {
%4 = tail call i32 @memset(i32* %0, i32 %1, i64 %2)
%5 = getelementptr inbounds i32, i32* %0, i64 %2
ret i32* %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() { printf("%d\n", 1 + 5 * 8 + 1); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x2a,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x2a,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 42)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 42)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ asm_getpos(char *, char *, char);
void getpos(char *row, char *col, char page) { asm_getpos(row, col, page); }


x86 assembly (clang, -O0):
<getpos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dl,%al
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movsbl -0x11(%rbp),%edx
call   1030 <asm_getpos@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getpos>:
jmp    1030 <asm_getpos@plt>

LLVM IR (-O0):
define void @getpos(i8* %0, i8* %1, i8 signext %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8 %2, i8* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i8, i8* %6
%10 = call i32 @asm_getpos(i8* %7, i8* %8, i8 signext %9)
ret void
}

LLVM IR (-O2):
define void @getpos(i8* %0, i8* %1, i8 signext %2) {
%4 = tail call i32 @asm_getpos(i8* %0, i8* %1, i8 signext %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  char s[] = "Hello World!\n";
  printf(s);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x12(%rbp)
mov    0xed8(%rip),%eax
mov    %eax,-0xa(%rbp)
mov    0xed2(%rip),%ax
mov    %ax,-0x6(%rbp)
lea    -0x12(%rbp),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movabs $0xa21646c726f57,%rax
mov    %rax,0xe(%rsp)
movabs $0x6f57206f6c6c6548,%rax
20 57 6f
mov    %rax,0x8(%rsp)
lea    0x8(%rsp),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.s = [14 x i8] c"Hello World!\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [14 x i8]
store i32 0, i32* %1
%3 = bitcast [14 x i8]* %2 to i8*
%4 = getelementptr inbounds [14 x i8], [14 x i8]* %2, i64 0, i64 0
%5 = call i32 @printf(i8* %4)
ret i32 0
}

LLVM IR (-O2):
@__const.main.s = [14 x i8] c"Hello World!\0A\00"
define i32 @main() {
%1 = alloca [14 x i8]
%2 = getelementptr inbounds [14 x i8], [14 x i8]* %1, i64 0, i64 0
%3 = call i32 @printf(i8* %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ report(int, char *);
void clrline(int line) { report(line, "                "); }


x86 assembly (clang, -O0):
<clrline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xedb(%rip),%rsi
call   1030 <report@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clrline>:
lea    0xee9(%rip),%rsi
jmp    1030 <report@plt>

LLVM IR (-O0):
@.str = [17 x i8] c" \00"
define void @clrline(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @report(i32 %3, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c" \00"
define void @clrline(i32 %0) {
%2 = tail call i32 @report(i32 %0, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}
void fc180(int n) {
  {
    typedef int(*b)[n];
    {
      typedef int(*c)[n];
      0;
    }
    {
      typedef int(*d)[n];
      0;
    };
    typedef int(*e)[n];
    0;
  };
  {
    typedef int(*f)[n];
    {
      typedef int(*g)[n];
      0;
    };
    goto a;
  a : {
    typedef int(*h)[n];
    0;
  };
    ;
    typedef int(*i)[n];
    0;
  };
  ;
  typedef int(*j)[n];
  0;
}


x86 assembly (clang, -O0):
<fc180>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc180>:
ret

LLVM IR (-O0):
define void @fc180(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
%7 = load i32, i32* %2
%8 = zext i32 %7 to i64
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
%11 = load i32, i32* %2
%12 = zext i32 %11 to i64
%13 = load i32, i32* %2
%14 = zext i32 %13 to i64
br label %15
15: ; preds = %1
%16 = load i32, i32* %2
%17 = zext i32 %16 to i64
%18 = load i32, i32* %2
%19 = zext i32 %18 to i64
%20 = load i32, i32* %2
%21 = zext i32 %20 to i64
ret void
}

LLVM IR (-O2):
define void @fc180(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ O_RDWR;
int /*<<< orphan*/ close(int);
int open(char *, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int agpgart_io_test() {
  int tagp_fd = 0;
  char read_buf[32];
  if ((tagp_fd = open("/dev/agpgart", O_RDWR)) < 0) {
    printf("Open /dev/agpgart failed \n");
    return -1;
  }
  close(tagp_fd);
  return 0;
}


x86 assembly (clang, -O0):
<agpgart_io_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x8(%rbp)
mov    0x2ea2(%rip),%rax
mov    (%rax),%esi
lea    0xeb1(%rip),%rdi
call   1050 <open@plt>
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
jge    1178 <agpgart_io_test+0x48>
lea    0xea6(%rip),%rdi
call   1030 <printf@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1187 <agpgart_io_test+0x57>
mov    -0x8(%rbp),%edi
call   1040 <close@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<agpgart_io_test>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%esi
lea    0xebf(%rip),%rdi
call   1050 <open@plt>
test   %eax,%eax
js     1155 <agpgart_io_test+0x25>
mov    %eax,%edi
call   1040 <close@plt>
xor    %eax,%eax
pop    %rcx
ret
lea    0xeb1(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"/dev/agpgart\00"
@O_RDWR = global i32 0
@.str.1 = [27 x i8] c"Open /dev/agpgart failed \0A\00"
define i32 @agpgart_io_test() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [32 x i8]
store i32 0, i32* %2
%4 = load i32, i32* @O_RDWR
%5 = call i32 @open(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %4)
store i32 %5, i32* %2
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
store i32 -1, i32* %1
br label %12
9: ; preds = %0
%10 = load i32, i32* %2
%11 = call i32 @close(i32 %10)
store i32 0, i32* %1
br label %12
12: ; preds = %9, %7
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
@.str = [13 x i8] c"/dev/agpgart\00"
@O_RDWR = global i32 0
@str = [26 x i8] c"Open /dev/agpgart failed \00"
define i32 @agpgart_io_test() {
%1 = load i32, i32* @O_RDWR
%2 = tail call i32 @open(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = icmp slt i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str, i64 0, i64 0))
br label %8
6: ; preds = %0
%7 = tail call i32 @close(i32 %2)
br label %8
8: ; preds = %6, %4
%9 = phi i32 [ -1, %4 ], [ 0, %6 ]
ret i32 %9
}
char *ignore_front_spaces(const char *str) {
  while (str[0] == ' ' || str[0] == '\t')
    ++str;
  return (char *)str;
}


x86 assembly (clang, -O0):
<ignore_front_spaces>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x9(%rbp)
je     112d <ignore_front_spaces+0x2d>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x9,%eax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    113d <ignore_front_spaces+0x3d>
jmp    114e <ignore_front_spaces+0x4e>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <ignore_front_spaces+0x8>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ignore_front_spaces>:
mov    %rdi,%rax
jmp    1114 <ignore_front_spaces+0x14>
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%rax
movzbl (%rax),%ecx
cmp    $0x20,%cl
je     1110 <ignore_front_spaces+0x10>
cmp    $0x9,%cl
je     1110 <ignore_front_spaces+0x10>
ret

LLVM IR (-O0):
define i8* @ignore_front_spaces(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %17, %1
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 32
br i1 %8, label %15, label %9
9: ; preds = %3
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i64 0
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 9
br label %15
15: ; preds = %9, %3
%16 = phi i1 [ true, %3 ], [ %14, %9 ]
br i1 %16, label %17, label %20
17: ; preds = %15
%18 = load i8*, i8** %2
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %2
br label %3
20: ; preds = %15
%21 = load i8*, i8** %2
ret i8* %21
}

LLVM IR (-O2):
define i8* @ignore_front_spaces(i8* %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i8* [ %0, %1 ], [ %6, %5 ]
%4 = load i8, i8* %3
switch i8 %4, label %7 [
i8 32, label %5
i8 9, label %5
]
5: ; preds = %2, %2
%6 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
7: ; preds = %2
ret i8* %3
}
int main1() {
  int *arr2 = (int *)0x04000000;
  *(arr2 + 1) = 0;
  for (int i = 0; i <= 20; i++) {
    *(arr2 + 1) += i;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4000000,%eax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x0,0x4(%rax)
movl   $0x0,-0xc(%rbp)
cmpl   $0x14,-0xc(%rbp)
jg     1144 <main1+0x44>
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
add    0x4(%rax),%ecx
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    111f <main1+0x1f>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main1>:
movl   $0xd2,0x4000004
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main1() {
%1 = alloca i32*
%2 = alloca i32
store i32* inttoptr (i64 67108864 to i32*), i32** %1
%3 = load i32*, i32** %1
%4 = getelementptr inbounds i32, i32* %3, i64 1
store i32 0, i32* %4
store i32 0, i32* %2
br label %5
5: ; preds = %14, %0
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 20
br i1 %7, label %8, label %17
8: ; preds = %5
%9 = load i32, i32* %2
%10 = load i32*, i32** %1
%11 = getelementptr inbounds i32, i32* %10, i64 1
%12 = load i32, i32* %11
%13 = add nsw i32 %12, %9
store i32 %13, i32* %11
br label %14
14: ; preds = %8
%15 = load i32, i32* %2
%16 = add nsw i32 %15, 1
store i32 %16, i32* %2
br label %5
17: ; preds = %5
ret i32 0
}

LLVM IR (-O2):
define i32 @main1() {
store i32 210, i32* inttoptr (i64 67108868 to i32*)
ret i32 0
}
/* Variables and functions */
int f75(int *);
int f76(int *p) { return f75(p); }


x86 assembly (clang, -O0):
<f76>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f75@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f76>:
jmp    1030 <f75@plt>

LLVM IR (-O0):
define i32 @f76(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f75(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f76(i32* %0) {
%2 = tail call i32 @f75(i32* %0)
ret i32 %2
}
void hook_empty(void) {}


x86 assembly (clang, -O0):
<hook_empty>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hook_empty>:
ret

LLVM IR (-O0):
define void @hook_empty() {
ret void
}

LLVM IR (-O2):
define void @hook_empty() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void swansong_fatal(int code) { exit(code); }


x86 assembly (clang, -O0):
<swansong_fatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<swansong_fatal>:
push   %rax
call   1030 <exit@plt>

LLVM IR (-O0):
define void @swansong_fatal(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
define void @swansong_fatal(i32 %0) {
%2 = tail call i32 @exit(i32 %0)
unreachable
}
int random2d() {
  int N;
  int x;
  int y;
  int i;
  int r;
  x = 0;
  y = 0;
  i = 0;
  while (i < N) {
    i = i + 1;
    if (r >= 0 && r <= 3) {
      if (r == 0)
        x = x + 1;
      else if (r == 1)
        x = x - 1;
      else if (r == 2)
        y = y + 1;
      else if (r == 3)
        y = y - 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<random2d>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    11b6 <random2d+0xb6>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x14(%rbp)
jl     11b1 <random2d+0xb1>
cmpl   $0x3,-0x14(%rbp)
jg     11b1 <random2d+0xb1>
cmpl   $0x0,-0x14(%rbp)
jne    115a <random2d+0x5a>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    11ac <random2d+0xac>
cmpl   $0x1,-0x14(%rbp)
jne    1172 <random2d+0x72>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    11a7 <random2d+0xa7>
cmpl   $0x2,-0x14(%rbp)
jne    118a <random2d+0x8a>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    11a2 <random2d+0xa2>
cmpl   $0x3,-0x14(%rbp)
jne    119d <random2d+0x9d>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    11a2 <random2d+0xa2>
jmp    11a7 <random2d+0xa7>
jmp    11ac <random2d+0xac>
jmp    11b1 <random2d+0xb1>
jmp    1119 <random2d+0x19>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<random2d>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @random2d() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %6
6: ; preds = %46, %0
%7 = load i32, i32* %4
%8 = load i32, i32* %1
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %47
10: ; preds = %6
%11 = load i32, i32* %4
%12 = add nsw i32 %11, 1
store i32 %12, i32* %4
%13 = load i32, i32* %5
%14 = icmp sge i32 %13, 0
br i1 %14, label %15, label %46
15: ; preds = %10
%16 = load i32, i32* %5
%17 = icmp sle i32 %16, 3
br i1 %17, label %18, label %46
18: ; preds = %15
%19 = load i32, i32* %5
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %24
21: ; preds = %18
%22 = load i32, i32* %2
%23 = add nsw i32 %22, 1
store i32 %23, i32* %2
br label %45
24: ; preds = %18
%25 = load i32, i32* %5
%26 = icmp eq i32 %25, 1
br i1 %26, label %27, label %30
27: ; preds = %24
%28 = load i32, i32* %2
%29 = sub nsw i32 %28, 1
store i32 %29, i32* %2
br label %44
30: ; preds = %24
%31 = load i32, i32* %5
%32 = icmp eq i32 %31, 2
br i1 %32, label %33, label %36
33: ; preds = %30
%34 = load i32, i32* %3
%35 = add nsw i32 %34, 1
store i32 %35, i32* %3
br label %43
36: ; preds = %30
%37 = load i32, i32* %5
%38 = icmp eq i32 %37, 3
br i1 %38, label %39, label %42
39: ; preds = %36
%40 = load i32, i32* %3
%41 = sub nsw i32 %40, 1
store i32 %41, i32* %3
br label %42
42: ; preds = %39, %36
br label %43
43: ; preds = %42, %33
br label %44
44: ; preds = %43, %27
br label %45
45: ; preds = %44, %21
br label %46
46: ; preds = %45, %15, %10
br label %6
47: ; preds = %6
ret i32 0
}

LLVM IR (-O2):
define i32 @random2d() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ F_GETFL;
int /*<<< orphan*/ F_SETFL;
int O_NONBLOCK;
int fcntl(int, int /*<<< orphan*/, ...);
int mco_nblock(int fd) {
  return fcntl(fd, F_SETFL, fcntl(fd, F_GETFL) | O_NONBLOCK);
}


x86 assembly (clang, -O0):
<mco_nblock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    0x2eb0(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2e99(%rip),%rax
mov    (%rax),%esi
mov    $0x0,%al
call   1030 <fcntl@plt>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    %eax,%edx
mov    0x2e99(%rip),%rax
or     (%rax),%edx
mov    $0x0,%al
call   1030 <fcntl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mco_nblock>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    0x2ebc(%rip),%rax
mov    (%rax),%ebp
mov    0x2eab(%rip),%rax
mov    (%rax),%esi
xor    %eax,%eax
call   1030 <fcntl@plt>
mov    0x2eb3(%rip),%rcx
or     (%rcx),%eax
mov    %ebx,%edi
mov    %ebp,%esi
mov    %eax,%edx
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <fcntl@plt>

LLVM IR (-O0):
@F_SETFL = global i32 0
@F_GETFL = global i32 0
@O_NONBLOCK = global i32 0
define i32 @mco_nblock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @F_SETFL
%5 = load i32, i32* %2
%6 = load i32, i32* @F_GETFL
%7 = call i32 (i32, i32, ...) @fcntl(i32 %5, i32 %6)
%8 = load i32, i32* @O_NONBLOCK
%9 = or i32 %7, %8
%10 = call i32 (i32, i32, ...) @fcntl(i32 %3, i32 %4, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
@F_SETFL = global i32 0
@F_GETFL = global i32 0
@O_NONBLOCK = global i32 0
define i32 @mco_nblock(i32 %0) {
%2 = load i32, i32* @F_SETFL
%3 = load i32, i32* @F_GETFL
%4 = tail call i32 (i32, i32, ...) @fcntl(i32 %0, i32 %3)
%5 = load i32, i32* @O_NONBLOCK
%6 = or i32 %5, %4
%7 = tail call i32 (i32, i32, ...) @fcntl(i32 %0, i32 %2, i32 %6)
ret i32 %7
}
void __syslog(int pri, const char *fmt, ...) {}


x86 assembly (clang, -O0):
<__syslog>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__syslog>:
ret

LLVM IR (-O0):
define void @__syslog(i32 %0, i8* %1, ...) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @__syslog(i32 %0, i8* nocapture %1, ...) {
ret void
}
long decToBin(int d) {
  if (d == 0)
    return 0;
  else
    return decToBin(d / 2) * 10 + d % 2;
}


x86 assembly (clang, -O0):
<decToBin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1132 <decToBin+0x22>
movq   $0x0,-0x8(%rbp)
jmp    1165 <decToBin+0x55>
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1030 <decToBin@plt>
imul   $0xa,%rax,%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    -0x18(%rbp),%rax
movslq %edx,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<decToBin>:
test   %edi,%edi
je     1140 <decToBin+0x30>
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    %edi,%ebp
shr    $0x1f,%ebp
add    %edi,%ebp
mov    %ebp,%edi
sar    %edi
call   1030 <decToBin@plt>
lea    (%rax,%rax,4),%rax
and    $0xfffffffe,%ebp
sub    %ebp,%ebx
movslq %ebx,%rcx
lea    (%rcx,%rax,2),%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @decToBin(i32 %0) {
%2 = alloca i64
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 0, i64* %2
br label %16
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sdiv i32 %8, 2
%10 = call i64 @decToBin(i32 %9)
%11 = mul nsw i64 %10, 10
%12 = load i32, i32* %3
%13 = srem i32 %12, 2
%14 = sext i32 %13 to i64
%15 = add nsw i64 %11, %14
store i64 %15, i64* %2
br label %16
16: ; preds = %7, %6
%17 = load i64, i64* %2
ret i64 %17
}

LLVM IR (-O2):
define i64 @decToBin(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1, %5
%4 = phi i64 [ %11, %5 ], [ 0, %1 ]
ret i64 %4
5: ; preds = %1
%6 = sdiv i32 %0, 2
%7 = tail call i64 @decToBin(i32 %6)
%8 = mul nsw i64 %7, 10
%9 = srem i32 %0, 2
%10 = sext i32 %9 to i64
%11 = add nsw i64 %8, %10
br label %3
}
unsigned long int unsignedlongint_ignoring_longdouble(unsigned long int x,
                                                      long double y) {
  return x;
}


x86 assembly (clang, -O0):
<unsignedlongint_ignoring_longdouble>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
mov    %rdi,-0x8(%rbp)
fstpt  -0x20(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsignedlongint_ignoring_longdouble>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @unsignedlongint_ignoring_longdouble(i64 %0, x86_fp80 %1) {
%3 = alloca i64
%4 = alloca x86_fp80
store i64 %0, i64* %3
store x86_fp80 %1, x86_fp80* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @unsignedlongint_ignoring_longdouble(i64 returned %0, x86_fp80 %1) {
ret i64 %0
}
long svd_imax(long a, long b) { return (a > b) ? a : b; }


x86 assembly (clang, -O0):
<svd_imax>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jle    1127 <svd_imax+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <svd_imax+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<svd_imax>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovg  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @svd_imax(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sgt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @svd_imax(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
float stress_funccall_float_1(float const);
float stress_funcdeep_float_4(float const, float const, float const,
                              float const);
float __attribute__((no))
stress_funcdeep_float_5(const float a, const float b, const float c,
                        const float d, const float e) {
  return stress_funcdeep_float_4(e, d, c, b) + stress_funccall_float_1(a);
}


x86 assembly (clang, -O0):
<stress_funcdeep_float_5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  %xmm4,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
movss  -0x10(%rbp),%xmm1
movss  -0xc(%rbp),%xmm2
movss  -0x8(%rbp),%xmm3
call   1030 <stress_funcdeep_float_4@plt>
movss  %xmm0,-0x18(%rbp)
movss  -0x4(%rbp),%xmm0
call   1040 <stress_funccall_float_1@plt>
movaps %xmm0,%xmm1
movss  -0x18(%rbp),%xmm0
addss  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stress_funcdeep_float_5>:
push   %rax
movaps %xmm1,%xmm5
movss  %xmm0,0x4(%rsp)
movaps %xmm4,%xmm0
movaps %xmm3,%xmm1
movaps %xmm5,%xmm3
call   1030 <stress_funcdeep_float_4@plt>
movss  %xmm0,(%rsp)
movss  0x4(%rsp),%xmm0
call   1040 <stress_funccall_float_1@plt>
addss  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @stress_funcdeep_float_5(float %0, float %1, float %2, float %3, float %4) {
%6 = alloca float
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
store float %0, float* %6
store float %1, float* %7
store float %2, float* %8
store float %3, float* %9
store float %4, float* %10
%11 = load float, float* %10
%12 = load float, float* %9
%13 = load float, float* %8
%14 = load float, float* %7
%15 = call float @stress_funcdeep_float_4(float %11, float %12, float %13, float %14)
%16 = load float, float* %6
%17 = call float @stress_funccall_float_1(float %16)
%18 = fadd float %15, %17
ret float %18
}

LLVM IR (-O2):
define float @stress_funcdeep_float_5(float %0, float %1, float %2, float %3, float %4) {
%6 = tail call float @stress_funcdeep_float_4(float %4, float %3, float %2, float %1)
%7 = tail call float @stress_funccall_float_1(float %0)
%8 = fadd float %6, %7
ret float %8
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t rot32r10(uint32_t x) { return (x >> 10) | (x << 22); }


x86 assembly (clang, -O0):
<rot32r10>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0xa,%eax
mov    -0x4(%rbp),%ecx
shl    $0x16,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rot32r10>:
mov    %edi,%eax
sar    $0xa,%eax
shl    $0x16,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rot32r10(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 10
%5 = load i32, i32* %2
%6 = shl i32 %5, 22
%7 = or i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @rot32r10(i32 %0) {
%2 = ashr i32 %0, 10
%3 = shl i32 %0, 22
%4 = or i32 %2, %3
ret i32 %4
}
/* Type definitions */
struct ivals_context {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assemble_write_mmio(struct ivals_context *, int, int,
                                       unsigned int);
void assemble_write_radio(struct ivals_context *ctx, unsigned int offset,
                          unsigned int value) {
  assemble_write_mmio(ctx, 0x3F6, 2, offset);
  assemble_write_mmio(ctx, 0x3FA, 2, value);
}


x86 assembly (clang, -O0):
<assemble_write_radio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%ecx
mov    $0x3f6,%esi
mov    $0x2,%edx
call   1030 <assemble_write_mmio@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%ecx
mov    $0x3fa,%esi
mov    $0x2,%edx
call   1030 <assemble_write_mmio@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assemble_write_radio>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebp
mov    %esi,%ecx
mov    %rdi,%rbx
mov    $0x3f6,%esi
mov    $0x2,%edx
call   1030 <assemble_write_mmio@plt>
mov    %rbx,%rdi
mov    $0x3fa,%esi
mov    $0x2,%edx
mov    %ebp,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <assemble_write_mmio@plt>

LLVM IR (-O0):
%struct.ivals_context = type { i32 }
define void @assemble_write_radio(%struct.ivals_context* %0, i32 %1, i32 %2) {
%4 = alloca %struct.ivals_context*
%5 = alloca i32
%6 = alloca i32
store %struct.ivals_context* %0, %struct.ivals_context** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load %struct.ivals_context*, %struct.ivals_context** %4
%8 = load i32, i32* %5
%9 = call i32 @assemble_write_mmio(%struct.ivals_context* %7, i32 1014, i32 2, i32 %8)
%10 = load %struct.ivals_context*, %struct.ivals_context** %4
%11 = load i32, i32* %6
%12 = call i32 @assemble_write_mmio(%struct.ivals_context* %10, i32 1018, i32 2, i32 %11)
ret void
}

LLVM IR (-O2):
%struct.ivals_context = type { i32 }
define void @assemble_write_radio(%struct.ivals_context* %0, i32 %1, i32 %2) {
%4 = tail call i32 @assemble_write_mmio(%struct.ivals_context* %0, i32 1014, i32 2, i32 %1)
%5 = tail call i32 @assemble_write_mmio(%struct.ivals_context* %0, i32 1018, i32 2, i32 %2)
ret void
}
int test_imm_21uint16_reg(unsigned short val) {
  return ((val) & (0x21 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_21uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x21,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_21uint16_reg>:
test   $0x21,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_21uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 33
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_21uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 33
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
OP(fd, c8) {
  illegal_1();
  op_c8();
}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <illegal_1@plt>
mov    $0x0,%al
call   1040 <op_c8@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
push   %rax
xor    %eax,%eax
call   1030 <illegal_1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <op_c8@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @illegal_1()
%7 = call i32 (...) @op_c8()
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @illegal_1()
%4 = tail call i32 (...) @op_c8()
ret i32 undef
}
void foo(int a) {
  void *cst = 0;
  if ((int *)a == cst) {
    f1();
    if (a)
      f2();
  }
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
movslq -0x4(%rbp),%rax
mov    -0x10(%rbp),%rcx
cmp    %rcx,%rax
jne    1161 <foo+0x41>
mov    $0x0,%al
call   1040 <f1@plt>
cmpl   $0x0,-0x4(%rbp)
je     115c <foo+0x3c>
mov    $0x0,%al
call   1030 <f2@plt>
jmp    1161 <foo+0x41>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
test   %edi,%edi
je     1115 <foo+0x5>
ret
xor    %eax,%eax
jmp    1030 <f1@plt>

LLVM IR (-O0):
define void @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
store i8* null, i8** %3
%4 = load i32, i32* %2
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
%9 = icmp eq i32* %6, %8
br i1 %9, label %10, label %17
10: ; preds = %1
%11 = call i32 (...) @f1()
%12 = load i32, i32* %2
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %10
%15 = call i32 (...) @f2()
br label %16
16: ; preds = %14, %10
br label %17
17: ; preds = %16, %1
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @f1()
br label %5
5: ; preds = %3, %1
ret void
}