void workaround_nehalem_aaj79(unsigned *ebx) {
  union {
    unsigned eax;
    struct {
      unsigned stepping : 4;
      unsigned model : 4;
      unsigned family : 4;
      unsigned type : 2;
      unsigned res : 2;
      unsigned ext_model : 4;
      unsigned ext_family : 8;
      unsigned res2 : 4;
    };
  } v;
  unsigned model;
  if (!cpuid_vendor("GenuineIntel"))
    return;
  asm("cpuid" : "=a"(v.eax) : "0"(1) : "ecx", "ebx", "edx");
  model = (v.ext_model << 4) + v.model;
  if (v.family != 6 || model != 26 || v.stepping > 4)
    return;
  *ebx |= (1 << 2);
}


x86 assembly (clang, -O0):
<workaround_nehalem_aaj79>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
sub    $0x18,%rsp
mov    %rdi,-0x10(%rbp)
lea    0xedc(%rip),%rdi
mov    $0x0,%al
call   1030 <cpuid_vendor@plt>
cmp    $0x0,%eax
jne    1139 <workaround_nehalem_aaj79+0x29>
jmp    1198 <workaround_nehalem_aaj79+0x88>
mov    $0x1,%eax
cpuid
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
shr    $0x10,%eax
and    $0xf,%eax
shl    $0x4,%eax
mov    -0x18(%rbp),%ecx
shr    $0x4,%ecx
and    $0xf,%ecx
add    %ecx,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
shr    $0x8,%eax
and    $0xf,%eax
cmp    $0x6,%eax
jne    1188 <workaround_nehalem_aaj79+0x78>
cmpl   $0x1a,-0x1c(%rbp)
jne    1188 <workaround_nehalem_aaj79+0x78>
mov    -0x18(%rbp),%eax
and    $0xf,%eax
cmp    $0x4,%eax
jle    118d <workaround_nehalem_aaj79+0x7d>
jmp    1198 <workaround_nehalem_aaj79+0x88>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
or     $0x4,%ecx
mov    %ecx,(%rax)
add    $0x18,%rsp
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<workaround_nehalem_aaj79>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
lea    0xee2(%rip),%rdi
xor    %eax,%eax
call   1030 <cpuid_vendor@plt>
test   %eax,%eax
je     1166 <workaround_nehalem_aaj79+0x56>
mov    $0x1,%eax
cpuid
mov    %eax,%ecx
and    $0xf00,%ecx
cmp    $0x600,%ecx
jne    1166 <workaround_nehalem_aaj79+0x56>
mov    %eax,%ecx
shr    $0xc,%ecx
and    $0xf0,%ecx
mov    %eax,%edx
shr    $0x4,%edx
and    $0xf,%edx
or     %ecx,%edx
cmp    $0x1a,%edx
jne    1166 <workaround_nehalem_aaj79+0x56>
and    $0xf,%eax
cmp    $0x4,%eax
ja     1166 <workaround_nehalem_aaj79+0x56>
orb    $0x4,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%union.anon = type { i32 }
%struct.anon = type { i32 }
@.str = [13 x i8] c"GenuineIntel\00"
define void @workaround_nehalem_aaj79(i32* %0) {
%2 = alloca i32*
%3 = alloca %union.anon
%4 = alloca i32
store i32* %0, i32** %2
%5 = call i32 (i8*, ...) bitcast (i32 (...)* @cpuid_vendor to i32 (i8*, ...)*)(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
br label %43
8: ; preds = %1
%9 = bitcast %union.anon* %3 to i32*
%10 = call i32 asm "cpuid", "={ax},0,~{ecx},~{ebx},~{edx},~{dirflag},~{fpsr},~{flags}"(i32 1)
store i32 %10, i32* %9
%11 = bitcast %union.anon* %3 to %struct.anon*
%12 = bitcast %struct.anon* %11 to i32*
%13 = load i32, i32* %12
%14 = lshr i32 %13, 16
%15 = and i32 %14, 15
%16 = shl i32 %15, 4
%17 = bitcast %union.anon* %3 to %struct.anon*
%18 = bitcast %struct.anon* %17 to i32*
%19 = load i32, i32* %18
%20 = lshr i32 %19, 4
%21 = and i32 %20, 15
%22 = add nsw i32 %16, %21
store i32 %22, i32* %4
%23 = bitcast %union.anon* %3 to %struct.anon*
%24 = bitcast %struct.anon* %23 to i32*
%25 = load i32, i32* %24
%26 = lshr i32 %25, 8
%27 = and i32 %26, 15
%28 = icmp ne i32 %27, 6
br i1 %28, label %38, label %29
29: ; preds = %8
%30 = load i32, i32* %4
%31 = icmp ne i32 %30, 26
br i1 %31, label %38, label %32
32: ; preds = %29
%33 = bitcast %union.anon* %3 to %struct.anon*
%34 = bitcast %struct.anon* %33 to i32*
%35 = load i32, i32* %34
%36 = and i32 %35, 15
%37 = icmp sgt i32 %36, 4
br i1 %37, label %38, label %39
38: ; preds = %32, %29, %8
br label %43
39: ; preds = %32
%40 = load i32*, i32** %2
%41 = load i32, i32* %40
%42 = or i32 %41, 4
store i32 %42, i32* %40
br label %43
43: ; preds = %39, %38, %7
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"GenuineIntel\00"
define void @workaround_nehalem_aaj79(i32* nocapture %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @cpuid_vendor to i32 (i8*, ...)*)(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32 %2, 0
br i1 %3, label %21, label %4
4: ; preds = %1
%5 = tail call i32 asm "cpuid", "={ax},0,~{ecx},~{ebx},~{edx},~{dirflag},~{fpsr},~{flags}"(i32 1)
%6 = lshr i32 %5, 12
%7 = and i32 %6, 240
%8 = lshr i32 %5, 4
%9 = and i32 %8, 15
%10 = or i32 %7, %9
%11 = and i32 %5, 3840
%12 = icmp ne i32 %11, 1536
%13 = icmp ne i32 %10, 26
%14 = select i1 %12, i1 true, i1 %13
%15 = and i32 %5, 15
%16 = icmp ugt i32 %15, 4
%17 = select i1 %14, i1 true, i1 %16
br i1 %17, label %21, label %18
18: ; preds = %4
%19 = load i32, i32* %0
%20 = or i32 %19, 4
store i32 %20, i32* %0
br label %21
21: ; preds = %4, %1, %18
ret void
}