xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t timeofday(int t[3]) {
  uint32_t tim;
  tim = t[0] * 60;
  tim += t[1];
  tim *= 60;
  tim += t[2];
  tim *= 1000;
  return tim;
}


x86 assembly (clang, -O0):
<timeofday>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
imul   $0x3c,(%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
imul   $0x3c,-0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
imul   $0x3e8,-0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<timeofday>:
imul   $0x3c,(%rdi),%eax
add    0x4(%rdi),%eax
imul   $0x3c,%eax,%eax
add    0x8(%rdi),%eax
imul   $0x3e8,%eax,%eax
ret

LLVM IR (-O0):
define i32 @timeofday(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = getelementptr inbounds i32, i32* %4, i64 0
%6 = load i32, i32* %5
%7 = mul nsw i32 %6, 60
store i32 %7, i32* %3
%8 = load i32*, i32** %2
%9 = getelementptr inbounds i32, i32* %8, i64 1
%10 = load i32, i32* %9
%11 = load i32, i32* %3
%12 = add nsw i32 %11, %10
store i32 %12, i32* %3
%13 = load i32, i32* %3
%14 = mul nsw i32 %13, 60
store i32 %14, i32* %3
%15 = load i32*, i32** %2
%16 = getelementptr inbounds i32, i32* %15, i64 2
%17 = load i32, i32* %16
%18 = load i32, i32* %3
%19 = add nsw i32 %18, %17
store i32 %19, i32* %3
%20 = load i32, i32* %3
%21 = mul nsw i32 %20, 1000
store i32 %21, i32* %3
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @timeofday(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = mul nsw i32 %2, 60
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = add nsw i32 %3, %5
%7 = mul nsw i32 %6, 60
%8 = getelementptr inbounds i32, i32* %0, i64 2
%9 = load i32, i32* %8
%10 = add nsw i32 %7, %9
%11 = mul nsw i32 %10, 1000
ret i32 %11
}
void AS1_OnFullRxBuf(void) {}


x86 assembly (clang, -O0):
<AS1_OnFullRxBuf>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AS1_OnFullRxBuf>:
ret

LLVM IR (-O0):
define void @AS1_OnFullRxBuf() {
ret void
}

LLVM IR (-O2):
define void @AS1_OnFullRxBuf() {
ret void
}
char REV(char a) {
  switch (a) {
  case 'A':
    return 'T';
  case 'C':
    return 'G';
  case 'G':
    return 'C';
  case 'T':
    return 'A';
  default:
    return a;
  }
}


x86 assembly (clang, -O0):
<REV>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
add    $0xffffffbf,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x13,%eax
ja     1158 <REV+0x58>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movb   $0x54,-0x1(%rbp)
jmp    115e <REV+0x5e>
movb   $0x47,-0x1(%rbp)
jmp    115e <REV+0x5e>
movb   $0x43,-0x1(%rbp)
jmp    115e <REV+0x5e>
movb   $0x41,-0x1(%rbp)
jmp    115e <REV+0x5e>
mov    -0x2(%rbp),%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<REV>:
lea    -0x41(%rdi),%ecx
cmp    $0x13,%ecx
ja     111d <REV+0x1d>
mov    $0x54,%al
lea    0xeef(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
mov    $0x47,%al
ret
mov    %edi,%eax
ret
mov    $0x43,%al
ret
mov    $0x41,%al
ret

LLVM IR (-O0):
define signext i8 @REV(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %10 [
i32 65, label %6
i32 67, label %7
i32 71, label %8
i32 84, label %9
]
6: ; preds = %1
store i8 84, i8* %2
br label %12
7: ; preds = %1
store i8 71, i8* %2
br label %12
8: ; preds = %1
store i8 67, i8* %2
br label %12
9: ; preds = %1
store i8 65, i8* %2
br label %12
10: ; preds = %1
%11 = load i8, i8* %3
store i8 %11, i8* %2
br label %12
12: ; preds = %10, %9, %8, %7, %6
%13 = load i8, i8* %2
ret i8 %13
}

LLVM IR (-O2):
define signext i8 @REV(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %6 [
i32 65, label %7
i32 67, label %3
i32 71, label %4
i32 84, label %5
]
3: ; preds = %1
br label %7
4: ; preds = %1
br label %7
5: ; preds = %1
br label %7
6: ; preds = %1
br label %7
7: ; preds = %1, %6, %5, %4, %3
%8 = phi i8 [ %0, %6 ], [ 65, %5 ], [ 67, %4 ], [ 71, %3 ], [ 84, %1 ]
ret i8 %8
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int /*<<< orphan*/ f(int, int);
int main() {
  int x = __VERIFIER_nondet_int();
  int y = __VERIFIER_nondet_int();
  if (x >= 0 && y >= 0) {
    f(x, y);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1040 <__VERIFIER_nondet_int@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     1162 <main+0x42>
cmpl   $0x0,-0xc(%rbp)
jl     1162 <main+0x42>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <f@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <__VERIFIER_nondet_int@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <__VERIFIER_nondet_int@plt>
test   %ebx,%ebx
js     1142 <main+0x22>
test   %eax,%eax
js     1142 <main+0x22>
mov    %ebx,%edi
mov    %eax,%esi
call   1030 <f@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %4, i32* %2
%5 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %5, i32* %3
%6 = load i32, i32* %2
%7 = icmp sge i32 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %0
%9 = load i32, i32* %3
%10 = icmp sge i32 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %8
%12 = load i32, i32* %2
%13 = load i32, i32* %3
%14 = call i32 @f(i32 %12, i32 %13)
br label %15
15: ; preds = %11, %8, %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 (...) @__VERIFIER_nondet_int()
%3 = icmp sgt i32 %1, -1
%4 = icmp sgt i32 %2, -1
%5 = select i1 %3, i1 %4, i1 false
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = tail call i32 @f(i32 %1, i32 %2)
br label %8
8: ; preds = %6, %0
ret i32 0
}
int main(int arg, char *argv[]) {
  int a = 100;
  int b = 7;
  int result = 0;
  int reminder = 0;
  __asm__ volatile("mov %0, %%eax\n"
                   "mov %1, %%ebx\n"
                   "xor %%edx, %%edx\n"
                   "idiv %%ebx\n"
                   "mov %%eax, %2\n"
                   "mov %%edx, %3\n"
                   :
                   : "m"(a), "m"(b), "m"(result), "m"(reminder)
                   :);
  printf("result = %d,  reminder %d\n", result, reminder);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x64,-0x14(%rbp)
movl   $0x7,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
movl   $0x0,-0x20(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x18(%rbp),%ebx
xor    %edx,%edx
idiv   %ebx
mov    %eax,-0x1c(%rbp)
mov    %edx,-0x20(%rbp)
mov    -0x1c(%rbp),%esi
mov    -0x20(%rbp),%edx
lea    0xea1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movl   $0x64,0x14(%rsp)
movl   $0x7,0x10(%rsp)
movl   $0x0,0xc(%rsp)
movl   $0x0,0x8(%rsp)
mov    0x14(%rsp),%eax
mov    0x10(%rsp),%ebx
xor    %edx,%edx
idiv   %ebx
mov    %eax,0xc(%rsp)
mov    %edx,0x8(%rsp)
mov    0xc(%rsp),%esi
mov    0x8(%rsp),%edx
lea    0xea9(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [27 x i8] c"result = %d, reminder %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 100, i32* %6
store i32 7, i32* %7
store i32 0, i32* %8
store i32 0, i32* %9
%10 = load i32, i32* %8
%11 = load i32, i32* %9
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %10, i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [27 x i8] c"result = %d, reminder %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = bitcast i32* %3 to i8*
store i32 100, i32* %3
%8 = bitcast i32* %4 to i8*
store i32 7, i32* %4
%9 = bitcast i32* %5 to i8*
store i32 0, i32* %5
%10 = bitcast i32* %6 to i8*
store i32 0, i32* %6
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %11, i32 %12)
ret i32 0
}
/* Type definitions */
struct type {
  int dummy;
};
struct compile_state {
  int dummy;
};

/* Variables and functions */
unsigned int type_qualifiers(struct compile_state *);
struct type *type_specifier(struct compile_state *, unsigned int);
struct type *specifier_qualifier_list(struct compile_state *state) {
  struct type *type;
  unsigned int specifiers = 0;
  specifiers |= type_qualifiers(state);
  type = type_specifier(state, specifiers);
  return type;
}


x86 assembly (clang, -O0):
<specifier_qualifier_list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <type_qualifiers@plt>
or     -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <type_specifier@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<specifier_qualifier_list>:
push   %rbx
mov    %rdi,%rbx
call   1030 <type_qualifiers@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <type_specifier@plt>

LLVM IR (-O0):
%struct.type = type { i32 }
%struct.compile_state = type { i32 }
define %struct.type* @specifier_qualifier_list(%struct.compile_state* %0) {
%2 = alloca %struct.compile_state*
%3 = alloca %struct.type*
%4 = alloca i32
store %struct.compile_state* %0, %struct.compile_state** %2
store i32 0, i32* %4
%5 = load %struct.compile_state*, %struct.compile_state** %2
%6 = call i32 @type_qualifiers(%struct.compile_state* %5)
%7 = load i32, i32* %4
%8 = or i32 %7, %6
store i32 %8, i32* %4
%9 = load %struct.compile_state*, %struct.compile_state** %2
%10 = load i32, i32* %4
%11 = call %struct.type* @type_specifier(%struct.compile_state* %9, i32 %10)
store %struct.type* %11, %struct.type** %3
%12 = load %struct.type*, %struct.type** %3
ret %struct.type* %12
}

LLVM IR (-O2):
%struct.type = type { i32 }
%struct.compile_state = type { i32 }
define %struct.type* @specifier_qualifier_list(%struct.compile_state* %0) {
%2 = tail call i32 @type_qualifiers(%struct.compile_state* %0)
%3 = tail call %struct.type* @type_specifier(%struct.compile_state* %0, i32 %2)
ret %struct.type* %3
}
unsigned long http_parser_version(void) {
  return 2 * 0x10000 | 8 * 0x00100 | 1 * 0x00001;
}


x86 assembly (clang, -O0):
<http_parser_version>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20801,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<http_parser_version>:
mov    $0x20801,%eax
ret

LLVM IR (-O0):
define i64 @http_parser_version() {
ret i64 133121
}

LLVM IR (-O2):
define i64 @http_parser_version() {
ret i64 133121
}
unsigned kol_system_mem() { asm volatile("int $0x40" ::"a"(18), "b"(17)); }


x86 assembly (clang, -O0):
<kol_system_mem>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    $0x12,%eax
mov    $0x11,%ebx
int    $0x40
mov    -0xc(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<kol_system_mem>:
push   %rbx
mov    $0x12,%eax
mov    $0x11,%ebx
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define i32 @kol_system_mem() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @kol_system_mem() {
tail call void asm sideeffect "int $$0x40", "{ax},{bx},~{dirflag},~{fpsr},~{flags}"(i32 18, i32 17)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char const *,
                           int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ strerror(int);
void xmalloc_default_error_handler(int err) {
  fprintf(stderr, ((const char *)("Memory allocation failure: %s\n")),
          strerror(err));
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<xmalloc_default_error_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2e9e(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <strerror@plt>
mov    -0x8(%rbp),%edi
mov    %eax,%edx
lea    0xea5(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e71(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<xmalloc_default_error_handler>:
push   %rbx
mov    0x2ea8(%rip),%rax
mov    (%rax),%ebx
call   1050 <strerror@plt>
lea    0xeba(%rip),%rsi
mov    %ebx,%edi
mov    %eax,%edx
call   1030 <fprintf@plt>
mov    0x2e82(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [31 x i8] c"Memory allocation failure: %s\0A\00"
@EXIT_FAILURE = global i32 0
define void @xmalloc_default_error_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @stderr
%4 = load i32, i32* %2
%5 = call i32 @strerror(i32 %4)
%6 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i32, i32* @EXIT_FAILURE
%8 = call i32 @exit(i32 %7)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [31 x i8] c"Memory allocation failure: %s\0A\00"
@EXIT_FAILURE = global i32 0
define void @xmalloc_default_error_handler(i32 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @strerror(i32 %0)
%4 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* @EXIT_FAILURE
%6 = tail call i32 @exit(i32 %5)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ enablePin(int, int, int);
int /*<<< orphan*/ setPin(int, int /*<<< orphan*/);
void blink(void) {
  enablePin(1, 0, 0x80);
  enablePin(1, 1, 0x80);
  setPin(1, 0);
  while (1) {
    unsigned int count = 0;
    for (count = 500000; count > 0; count--) {
      ;
    }
    (*((volatile unsigned int *const)(0x40040100 + 0x0004))) = 0x00010001 << 0;
    ;
    (*((volatile unsigned int *const)(0x40040100 + 0x0004))) = 0x00010001 << 1;
    ;
  }
}


x86 assembly (clang, -O0):
<blink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
xor    %esi,%esi
mov    $0x80,%edx
call   1030 <enablePin@plt>
mov    $0x1,%esi
mov    $0x80,%edx
mov    %esi,%edi
call   1030 <enablePin@plt>
mov    $0x1,%edi
xor    %esi,%esi
call   1040 <setPin@plt>
movl   $0x0,-0x4(%rbp)
movl   $0x7a120,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jbe    1181 <blink+0x61>
jmp    1173 <blink+0x53>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    1164 <blink+0x44>
mov    $0x40040104,%eax
movl   $0x10001,(%rax)
mov    $0x40040104,%eax
movl   $0x20002,(%rax)
jmp    1156 <blink+0x36>

x86 assembly (clang, -O2):
<blink>:
push   %rax
mov    $0x1,%edi
xor    %esi,%esi
mov    $0x80,%edx
call   1030 <enablePin@plt>
mov    $0x1,%edi
mov    $0x1,%esi
mov    $0x80,%edx
call   1030 <enablePin@plt>
mov    $0x1,%edi
xor    %esi,%esi
call   1040 <setPin@plt>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movl   $0x10001,0x40040104
movl   $0x20002,0x40040104
jmp    1160 <blink+0x40>

LLVM IR (-O0):
define void @blink() {
%1 = alloca i32
%2 = call i32 @enablePin(i32 1, i32 0, i32 128)
%3 = call i32 @enablePin(i32 1, i32 1, i32 128)
%4 = call i32 @setPin(i32 1, i32 0)
br label %5
5: ; preds = %0, %13
store i32 0, i32* %1
store i32 500000, i32* %1
br label %6
6: ; preds = %10, %5
%7 = load i32, i32* %1
%8 = icmp ugt i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %6
br label %10
10: ; preds = %9
%11 = load i32, i32* %1
%12 = add i32 %11, -1
store i32 %12, i32* %1
br label %6
13: ; preds = %6
store volatile i32 65537, i32* inttoptr (i64 1074004228 to i32*)
store volatile i32 131074, i32* inttoptr (i64 1074004228 to i32*)
br label %5
}

LLVM IR (-O2):
define void @blink() {
%1 = tail call i32 @enablePin(i32 1, i32 0, i32 128)
%2 = tail call i32 @enablePin(i32 1, i32 1, i32 128)
%3 = tail call i32 @setPin(i32 1, i32 0)
br label %4
4: ; preds = %0, %4
store volatile i32 65537, i32* inttoptr (i64 1074004228 to i32*)
store volatile i32 131074, i32* inttoptr (i64 1074004228 to i32*)
br label %4
}
void core_initialize(void) {}


x86 assembly (clang, -O0):
<core_initialize>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<core_initialize>:
ret

LLVM IR (-O0):
define void @core_initialize() {
ret void
}

LLVM IR (-O2):
define void @core_initialize() {
ret void
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMR6D_get(void) { return U_WMRCORENONE_get("U_WMR6D"); }


x86 assembly (clang, -O0):
<U_WMR6D_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR6D_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR6D\00"
define i32 @U_WMR6D_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR6D\00"
define i32 @U_WMR6D_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
/* Variables and functions */
int chdir(char *);
int _sys_chdir(char *dir) { return chdir(dir); }


x86 assembly (clang, -O0):
<_sys_chdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <chdir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_sys_chdir>:
jmp    1030 <chdir@plt>

LLVM IR (-O0):
define i32 @_sys_chdir(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @chdir(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @_sys_chdir(i8* %0) {
%2 = tail call i32 @chdir(i8* %0)
ret i32 %2
}
void foo_2_2_2_1_1_2_1_1_2() {}


x86 assembly (clang, -O0):
<foo_2_2_2_1_1_2_1_1_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_2_2_1_1_2_1_1_2>:
ret

LLVM IR (-O0):
define void @foo_2_2_2_1_1_2_1_1_2() {
ret void
}

LLVM IR (-O2):
define void @foo_2_2_2_1_1_2_1_1_2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Lcd8_Cmd(int);
Lcd8_Clear() { Lcd8_Cmd(1); }


x86 assembly (clang, -O0):
<Lcd8_Clear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
call   1030 <Lcd8_Cmd@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Lcd8_Clear>:
mov    $0x1,%edi
jmp    1030 <Lcd8_Cmd@plt>

LLVM IR (-O0):
define i32 @Lcd8_Clear() {
%1 = alloca i32
%2 = call i32 @Lcd8_Cmd(i32 1)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @Lcd8_Clear() {
%1 = tail call i32 @Lcd8_Cmd(i32 1)
ret i32 undef
}
/* Type definitions */
struct fpga_model {
  int dummy;
};

/* Variables and functions */
scalar_t__ is_aty(int, struct fpga_model *, int);
int regular_row_up(int y, struct fpga_model *model) {
  if (y <= 2)
    return -1;
  y--;
  if (is_aty(0x0010 | 0x0020, model, y))
    y--;
  return y;
}


x86 assembly (clang, -O0):
<regular_row_up>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jg     1135 <regular_row_up+0x25>
movl   $0xffffffff,-0x4(%rbp)
jmp    1168 <regular_row_up+0x58>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%edx
mov    $0x30,%edi
call   1030 <is_aty@plt>
cmp    $0x0,%rax
je     1162 <regular_row_up+0x52>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<regular_row_up>:
mov    $0xffffffff,%eax
cmp    $0x3,%edi
jl     113f <regular_row_up+0x2f>
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
lea    -0x1(%rbx),%ebp
mov    $0x30,%edi
mov    %ebp,%edx
call   1030 <is_aty@plt>
add    $0xfffffffe,%ebx
test   %rax,%rax
cmove  %ebp,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.fpga_model = type { i32 }
define i32 @regular_row_up(i32 %0, %struct.fpga_model* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca %struct.fpga_model*
store i32 %0, i32* %4
store %struct.fpga_model* %1, %struct.fpga_model** %5
%6 = load i32, i32* %4
%7 = icmp sle i32 %6, 2
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 -1, i32* %3
br label %21
9: ; preds = %2
%10 = load i32, i32* %4
%11 = add nsw i32 %10, -1
store i32 %11, i32* %4
%12 = load %struct.fpga_model*, %struct.fpga_model** %5
%13 = load i32, i32* %4
%14 = call i64 @is_aty(i32 48, %struct.fpga_model* %12, i32 %13)
%15 = icmp ne i64 %14, 0
br i1 %15, label %16, label %19
16: ; preds = %9
%17 = load i32, i32* %4
%18 = add nsw i32 %17, -1
store i32 %18, i32* %4
br label %19
19: ; preds = %16, %9
%20 = load i32, i32* %4
store i32 %20, i32* %3
br label %21
21: ; preds = %19, %8
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
%struct.fpga_model = type { i32 }
define i32 @regular_row_up(i32 %0, %struct.fpga_model* %1) {
%3 = icmp slt i32 %0, 3
br i1 %3, label %10, label %4
4: ; preds = %2
%5 = add nsw i32 %0, -1
%6 = tail call i64 @is_aty(i32 48, %struct.fpga_model* %1, i32 %5)
%7 = icmp eq i64 %6, 0
%8 = add nsw i32 %0, -2
%9 = select i1 %7, i32 %5, i32 %8
br label %10
10: ; preds = %2, %4
%11 = phi i32 [ %9, %4 ], [ -1, %2 ]
ret i32 %11
}
void puts_ll(const char *str) {}


x86 assembly (clang, -O0):
<puts_ll>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts_ll>:
ret

LLVM IR (-O0):
define void @puts_ll(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @puts_ll(i8* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ XVisualInfo;

/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ malloc(int);
void *alloc_XVisualInfo(void) {
  XVisualInfo *_p = (XVisualInfo *)malloc(sizeof(XVisualInfo));
  if (_p == NULL)
    abort();
  return (void *)_p;
}


x86 assembly (clang, -O0):
<alloc_XVisualInfo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1148 <alloc_XVisualInfo+0x28>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_XVisualInfo>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
test   %rax,%rax
je     1132 <alloc_XVisualInfo+0x12>
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i8* @alloc_XVisualInfo() {
%1 = alloca i32*
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32* %3, i32** %1
%4 = load i32*, i32** %1
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 (...) @abort()
unreachable
8: ; preds = %0
%9 = load i32*, i32** %1
%10 = bitcast i32* %9 to i8*
ret i8* %10
}

LLVM IR (-O2):
define i8* @alloc_XVisualInfo() {
%1 = tail call i64 @malloc(i32 4)
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = inttoptr i64 %1 to i8*
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int getpid();
int /*<<< orphan*/ printf(char *, int);
long random();
double sqrt(long);
int main(void) {
  long value;
  double square_root;
  printf("Process with PID %d\n", getpid());
  for (;;) {
    value = random();
    square_root = sqrt(value);
  }
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,%esi
lea    0xea1(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <random@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1060 <sqrt@plt>
movsd  %xmm0,-0x18(%rbp)
jmp    1164 <main+0x24>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xeb1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1050 <random@plt>
mov    %rax,%rdi
call   1060 <sqrt@plt>
jmp    1160 <main+0x20>

LLVM IR (-O0):
@.str = [21 x i8] c"Process with PID %d\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca double
store i32 0, i32* %1
%4 = call i32 (...) @getpid()
%5 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %4)
br label %6
6: ; preds = %6, %0
%7 = call i64 (...) @random()
store i64 %7, i64* %2
%8 = load i64, i64* %2
%9 = call double @sqrt(i64 %8)
store double %9, double* %3
br label %6
}

LLVM IR (-O2):
@.str = [21 x i8] c"Process with PID %d\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 (...) @getpid()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 %1)
br label %3
3: ; preds = %3, %0
%4 = tail call i64 (...) @random()
%5 = tail call double @sqrt(i64 %4)
br label %3
}
int test_option_c(int x) { return !!(x & 0xFF); }


x86 assembly (clang, -O0):
<test_option_c>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_option_c>:
xor    %eax,%eax
test   %dil,%dil
setne  %al
ret

LLVM IR (-O0):
define i32 @test_option_c(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = xor i1 %6, true
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_option_c(i32 %0) {
%2 = and i32 %0, 255
%3 = icmp ne i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ NRerror(char *);
scalar_t__ malloc(size_t);
unsigned char *cvector(long nl, long nh) {
  unsigned char *v;
  v = (unsigned char *)malloc(
      (size_t)((nh - nl + 1 + 1) * sizeof(unsigned char)));
  if (!v)
    NRerror("allocation failure in cvector()");
  return v - nl + 1;
}


x86 assembly (clang, -O0):
<cvector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
sub    -0x8(%rbp),%rdi
add    $0x1,%rdi
add    $0x1,%rdi
shl    $0x0,%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1164 <cvector+0x44>
lea    0xea1(%rip),%rdi
call   1030 <NRerror@plt>
mov    -0x18(%rbp),%rax
xor    %ecx,%ecx
sub    -0x8(%rbp),%rcx
add    %rcx,%rax
add    $0x1,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvector>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
sub    %rdi,%rsi
lea    0x2(%rsi),%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1147 <cvector+0x27>
lea    0xebe(%rip),%rdi
call   1030 <NRerror@plt>
sub    %r14,%rbx
add    $0x1,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [32 x i8] c"allocation failure in cvector()\00"
define i8* @cvector(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = load i64, i64* %3
%8 = sub nsw i64 %6, %7
%9 = add nsw i64 %8, 1
%10 = add nsw i64 %9, 1
%11 = mul i64 %10, 1
%12 = call i64 @malloc(i64 %11)
%13 = inttoptr i64 %12 to i8*
store i8* %13, i8** %5
%14 = load i8*, i8** %5
%15 = icmp ne i8* %14, null
br i1 %15, label %18, label %16
16: ; preds = %2
%17 = call i32 @NRerror(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %18
18: ; preds = %16, %2
%19 = load i8*, i8** %5
%20 = load i64, i64* %3
%21 = sub i64 0, %20
%22 = getelementptr inbounds i8, i8* %19, i64 %21
%23 = getelementptr inbounds i8, i8* %22, i64 1
ret i8* %23
}

LLVM IR (-O2):
@.str = [32 x i8] c"allocation failure in cvector()\00"
define i8* @cvector(i64 %0, i64 %1) {
%3 = sub i64 2, %0
%4 = add i64 %3, %1
%5 = tail call i64 @malloc(i64 %4)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = tail call i32 @NRerror(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %2
%10 = sub i64 0, %0
%11 = inttoptr i64 %5 to i8*
%12 = getelementptr inbounds i8, i8* %11, i64 %10
%13 = getelementptr inbounds i8, i8* %12, i64 1
ret i8* %13
}
/* Type definitions */
typedef int /*<<< orphan*/ uintmax_t;
typedef int /*<<< orphan*/ t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(int argc, const char *argv[]) {
  uintmax_t t;
  int n = sizeof(t);
  printf("%d\n", n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x4,-0x18(%rbp)
mov    -0x18(%rbp),%esi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 4, i32* %7
%8 = load i32, i32* %7
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 4)
ret i32 0
}
extern unsigned char get_fs_byte(const char *addr) {
  unsigned char _v;
  __asm__("movb %%fs:%1,%0" : "=q"(_v) : "m"(*addr));
  return _v;
}


x86 assembly (clang, -O0):
<get_fs_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %fs:(%rax),%al
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_fs_byte>:
mov    %fs:(%rdi),%al
ret

LLVM IR (-O0):
define zeroext i8 @get_fs_byte(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8 asm "movb %fs:$1,$0", "=q,*m,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %4)
store i8 %5, i8* %3
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @get_fs_byte(i8* %0) {
%2 = tail call i8 asm "movb %fs:$1,$0", "=q,*m,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %0)
ret i8 %2
}
int lower_bits(int x, int n) {
  int r = 0;
  int s = n - 1;
  r = (1 << s) - 1 + (1 << s);
  return x | r;
}


x86 assembly (clang, -O0):
<lower_bits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
sub    $0x1,%eax
mov    -0x10(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
or     -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lower_bits>:
lea    -0x1(%rsi),%ecx
mov    $0x2,%eax
shl    %cl,%eax
add    $0xffffffff,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @lower_bits(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
%7 = load i32, i32* %4
%8 = sub nsw i32 %7, 1
store i32 %8, i32* %6
%9 = load i32, i32* %6
%10 = shl i32 1, %9
%11 = sub nsw i32 %10, 1
%12 = load i32, i32* %6
%13 = shl i32 1, %12
%14 = add nsw i32 %11, %13
store i32 %14, i32* %5
%15 = load i32, i32* %3
%16 = load i32, i32* %5
%17 = or i32 %15, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @lower_bits(i32 %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = shl i32 2, %3
%5 = add i32 %4, -1
%6 = or i32 %5, %0
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ STDOUT_FILENO;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ getcwd(char *, int);
int strlen(char *);
int /*<<< orphan*/ write(int /*<<< orphan*/, char *, int);
int main(void) {
  char wd[255];
  int i;
  getcwd(wd, 255);
  i = strlen(wd);
  write(STDOUT_FILENO, wd, i);
  write(STDOUT_FILENO, "\n", 1);
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x120,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x110(%rbp),%rdi
mov    $0xff,%esi
call   1050 <getcwd@plt>
lea    -0x110(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0x114(%rbp)
mov    0x2e74(%rip),%rax
mov    (%rax),%edi
lea    -0x110(%rbp),%rsi
mov    -0x114(%rbp),%edx
call   1030 <write@plt>
mov    0x2e59(%rip),%rax
mov    (%rax),%edi
lea    0xe60(%rip),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
xor    %edi,%edi
call   1060 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
sub    $0x108,%rsp
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0xff,%esi
call   1050 <getcwd@plt>
mov    %rbx,%rdi
call   1040 <strlen@plt>
mov    0x2e87(%rip),%r14
mov    (%r14),%edi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <write@plt>
mov    (%r14),%edi
lea    0xe80(%rip),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
xor    %edi,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@STDOUT_FILENO = global i32 0
@.str = [2 x i8] c"\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [255 x i8]
%3 = alloca i32
store i32 0, i32* %1
%4 = getelementptr inbounds [255 x i8], [255 x i8]* %2, i64 0, i64 0
%5 = call i32 @getcwd(i8* %4, i32 255)
%6 = getelementptr inbounds [255 x i8], [255 x i8]* %2, i64 0, i64 0
%7 = call i32 @strlen(i8* %6)
store i32 %7, i32* %3
%8 = load i32, i32* @STDOUT_FILENO
%9 = getelementptr inbounds [255 x i8], [255 x i8]* %2, i64 0, i64 0
%10 = load i32, i32* %3
%11 = call i32 @write(i32 %8, i8* %9, i32 %10)
%12 = load i32, i32* @STDOUT_FILENO
%13 = call i32 @write(i32 %12, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
%14 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@STDOUT_FILENO = global i32 0
@.str = [2 x i8] c"\0A\00"
define i32 @main() {
%1 = alloca [255 x i8]
%2 = getelementptr inbounds [255 x i8], [255 x i8]* %1, i64 0, i64 0
%3 = call i32 @getcwd(i8* %2, i32 255)
%4 = call i32 @strlen(i8* %2)
%5 = load i32, i32* @STDOUT_FILENO
%6 = call i32 @write(i32 %5, i8* %2, i32 %4)
%7 = load i32, i32* @STDOUT_FILENO
%8 = call i32 @write(i32 %7, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
%9 = call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void msim_printWestWall() { printf("|"); }


x86 assembly (clang, -O0):
<msim_printWestWall>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<msim_printWestWall>:
mov    $0x7c,%edi
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"|\00"
define void @msim_printWestWall() {
%1 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
define void @msim_printWestWall() {
%1 = tail call i32 @putchar(i32 124)
ret void
}
int test_imm_98int64_highword_reg(long long val) {
  return ((val >> 32) & (0x98 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_98int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0x98,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_98int64_highword_reg>:
movabs $0x9800000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_98int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 152
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_98int64_highword_reg(i64 %0) {
%2 = and i64 %0, 652835028992
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;
typedef int /*<<< orphan*/ siginfo_t;

/* Variables and functions */
int /*<<< orphan*/ SIGUSR1;
int /*<<< orphan*/ sigaddset(int /*<<< orphan*/ *, int /*<<< orphan*/);
int /*<<< orphan*/ sigemptyset(int /*<<< orphan*/ *);
int sigwaitinfo(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int main(void) {
  sigset_t mask;
  siginfo_t info;
  (void)sigemptyset(&mask);
  (void)sigaddset(&mask, SIGUSR1);
  return sigwaitinfo(&mask, &info);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
call   1030 <sigemptyset@plt>
mov    0x2e99(%rip),%rax
mov    (%rax),%esi
lea    -0x8(%rbp),%rdi
call   1050 <sigaddset@plt>
lea    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1040 <sigwaitinfo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
call   1030 <sigemptyset@plt>
mov    0x2e9f(%rip),%rax
mov    (%rax),%esi
mov    %rbx,%rdi
call   1050 <sigaddset@plt>
lea    0x8(%rsp),%rsi
mov    %rbx,%rdi
call   1040 <sigwaitinfo@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@SIGUSR1 = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @sigemptyset(i32* %2)
%5 = load i32, i32* @SIGUSR1
%6 = call i32 @sigaddset(i32* %2, i32 %5)
%7 = call i32 @sigwaitinfo(i32* %2, i32* %3)
ret i32 %7
}

LLVM IR (-O2):
@SIGUSR1 = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @sigemptyset(i32* %1)
%6 = load i32, i32* @SIGUSR1
%7 = call i32 @sigaddset(i32* %1, i32 %6)
%8 = call i32 @sigwaitinfo(i32* %1, i32* %2)
ret i32 %8
}
char *plu(int val) { return (val == 1) ? "" : "s"; }


x86 assembly (clang, -O0):
<plu>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xeef(%rip),%rax
lea    0xee9(%rip),%rcx
cmp    $0x1,%edx
cmove  %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<plu>:
cmp    $0x1,%edi
lea    0xef7(%rip),%rcx
lea    0xeef(%rip),%rax
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
@.str.1 = [2 x i8] c"s\00"
define i8* @plu(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1
%5 = zext i1 %4 to i64
%6 = select i1 %4, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0)
ret i8* %6
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
@.str.1 = [2 x i8] c"s\00"
define i8* @plu(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = select i1 %2, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0)
ret i8* %3
}
/* Type definitions */
struct event {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ event_dispatch_next(struct event **);
scalar_t__ event_pending(struct event **);
void event_run_queue(struct event **list) {
  while (event_pending(list))
    event_dispatch_next(list);
}


x86 assembly (clang, -O0):
<event_run_queue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <event_pending@plt>
cmp    $0x0,%rax
je     114d <event_run_queue+0x2d>
mov    -0x8(%rbp),%rdi
call   1030 <event_dispatch_next@plt>
jmp    112c <event_run_queue+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_run_queue>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
call   1040 <event_pending@plt>
test   %rax,%rax
je     1147 <event_run_queue+0x27>
mov    %rbx,%rdi
call   1030 <event_dispatch_next@plt>
mov    %rbx,%rdi
jmp    1130 <event_run_queue+0x10>
pop    %rbx
ret

LLVM IR (-O0):
%struct.event = type { i32 }
define void @event_run_queue(%struct.event** %0) {
%2 = alloca %struct.event**
store %struct.event** %0, %struct.event*** %2
br label %3
3: ; preds = %7, %1
%4 = load %struct.event**, %struct.event*** %2
%5 = call i64 @event_pending(%struct.event** %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load %struct.event**, %struct.event*** %2
%9 = call i32 @event_dispatch_next(%struct.event** %8)
br label %3
10: ; preds = %3
ret void
}

LLVM IR (-O2):
%struct.event = type { i32 }
define void @event_run_queue(%struct.event** %0) {
%2 = tail call i64 @event_pending(%struct.event** %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1, %4
%5 = tail call i32 @event_dispatch_next(%struct.event** %0)
%6 = tail call i64 @event_pending(%struct.event** %0)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %4
8: ; preds = %4, %1
ret void
}
/* Type definitions */
typedef unsigned long long uint64_t;

/* Variables and functions */
uint64_t get_real_address(uint64_t addr) {
  if (addr & (1ULL << 47))
    return addr | (-1ULL << 47);
  return addr;
}


x86 assembly (clang, -O0):
<get_real_address>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movabs $0x800000000000,%rax
and    -0x10(%rbp),%rax
cmp    $0x0,%rax
je     1137 <get_real_address+0x37>
movabs $0xffff800000000000,%rax
80 ff ff
or     -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    113f <get_real_address+0x3f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_real_address>:
movabs $0xffff800000000000,%rax
80 ff ff
or     %rdi,%rax
bt     $0x2f,%rdi
cmovae %rdi,%rax
ret

LLVM IR (-O0):
define i64 @get_real_address(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = and i64 %4, 140737488355328
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i64, i64* %3
%9 = or i64 %8, -140737488355328
store i64 %9, i64* %2
br label %12
10: ; preds = %1
%11 = load i64, i64* %3
store i64 %11, i64* %2
br label %12
12: ; preds = %10, %7
%13 = load i64, i64* %2
ret i64 %13
}

LLVM IR (-O2):
define i64 @get_real_address(i64 %0) {
%2 = and i64 %0, 140737488355328
%3 = icmp eq i64 %2, 0
%4 = or i64 %0, -140737488355328
%5 = select i1 %3, i64 %0, i64 %4
ret i64 %5
}
int ft_strlen(char *str) {
  int i;
  i = 0;
  while (str)
    i++;
  return (i);
}


x86 assembly (clang, -O0):
<ft_strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1128 <ft_strlen+0x28>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <ft_strlen+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strlen>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ft_strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i8*, i8** %2
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %10
7: ; preds = %4
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
br label %4
10: ; preds = %4
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @ft_strlen(i8* readnone %0) {
ret i32 0
}
char f() {
  char *i = (char *)__builtin_malloc(100);
  __builtin_memcpy(i, "a", 1);
  return i[0];
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x64,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0xed0(%rip),%cl
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0x61,%al
ret

LLVM IR (-O0):
@.str = [2 x i8] c"a\00"
define signext i8 @f() {
%1 = alloca i8*
%2 = call i8* @malloc(i64 100)
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = load i8*, i8** %1
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
ret i8 %6
}

LLVM IR (-O2):
define signext i8 @f() {
ret i8 97
}
int intcmp(void *elem1, void *elem2) {
  int *ip1 = elem1;
  int *ip2 = elem2;
  return *ip1 - *ip2;
}


x86 assembly (clang, -O0):
<intcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intcmp>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @intcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %5
%12 = load i32, i32* %11
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = sub nsw i32 %12, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @intcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}
void ARGBToRGB565DitherRow_SSE2() {}


x86 assembly (clang, -O0):
<ARGBToRGB565DitherRow_SSE2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBToRGB565DitherRow_SSE2>:
ret

LLVM IR (-O0):
define void @ARGBToRGB565DitherRow_SSE2() {
ret void
}

LLVM IR (-O2):
define void @ARGBToRGB565DitherRow_SSE2() {
ret void
}
char nuc(int i) {
  static const char Nuc[] = "tcag";
  return Nuc[i];
}


x86 assembly (clang, -O0):
<nuc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rcx
lea    0xeee(%rip),%rax
movsbl (%rax,%rcx,1),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nuc>:
movslq %edi,%rax
lea    0xef6(%rip),%rcx
mov    (%rax,%rcx,1),%al
ret

LLVM IR (-O0):
@nuc.Nuc = internal constant [5 x i8] c"tcag\00"
define signext i8 @nuc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds [5 x i8], [5 x i8]* @nuc.Nuc, i64 0, i64 %4
%6 = load i8, i8* %5
ret i8 %6
}

LLVM IR (-O2):
@nuc.Nuc = internal unnamed_addr constant [5 x i8] c"tcag\00"
define signext i8 @nuc(i32 %0) {
%2 = sext i32 %0 to i64
%3 = getelementptr inbounds [5 x i8], [5 x i8]* @nuc.Nuc, i64 0, i64 %2
%4 = load i8, i8* %3
ret i8 %4
}
/* Variables and functions */
int /*<<< orphan*/ popNarray(char *, unsigned int);
void popbooleanarray(char *x, int n) {
  popNarray((char *)x, (unsigned int)(n * 4));
}


x86 assembly (clang, -O0):
<popbooleanarray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
shl    $0x2,%esi
call   1030 <popNarray@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<popbooleanarray>:
shl    $0x2,%esi
jmp    1030 <popNarray@plt>

LLVM IR (-O0):
define void @popbooleanarray(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %6, 4
%8 = call i32 @popNarray(i8* %5, i32 %7)
ret void
}

LLVM IR (-O2):
define void @popbooleanarray(i8* %0, i32 %1) {
%3 = shl nsw i32 %1, 2
%4 = tail call i32 @popNarray(i8* %0, i32 %3)
ret void
}