xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int main(void) {
  char word[] = {'H', 'e', 'l', 'l', 'o', '!'};
  int i;
  for (i = 0; i < 6; ++i)
    printf("%c", word[i]);
  printf("\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xedb(%rip),%eax
mov    %eax,-0xa(%rbp)
mov    0xed5(%rip),%ax
mov    %ax,-0x6(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x6,-0x10(%rbp)
jge    1169 <main+0x59>
movslq -0x10(%rbp),%rax
movsbl -0xa(%rbp,%rax,1),%esi
lea    0xeb2(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    113a <main+0x2a>
lea    0xe99(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x48,%edi
call   1030 <putchar@plt>
mov    $0x65,%edi
call   1030 <putchar@plt>
mov    $0x6c,%edi
call   1030 <putchar@plt>
mov    $0x6c,%edi
call   1030 <putchar@plt>
mov    $0x6f,%edi
call   1030 <putchar@plt>
mov    $0x21,%edi
call   1030 <putchar@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.main.word = [6 x i8] c"Hello!"
@.str = [3 x i8] c"%c\00"
@.str.1 = [2 x i8] c"\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [6 x i8]
%3 = alloca i32
store i32 0, i32* %1
%4 = bitcast [6 x i8]* %2 to i8*
store i32 0, i32* %3
br label %5
5: ; preds = %15, %0
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 6
br i1 %7, label %8, label %18
8: ; preds = %5
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds [6 x i8], [6 x i8]* %2, i64 0, i64 %10
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %13)
br label %15
15: ; preds = %8
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
store i32 %17, i32* %3
br label %5
18: ; preds = %5
%19 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @putchar(i32 72)
%2 = tail call i32 @putchar(i32 101)
%3 = tail call i32 @putchar(i32 108)
%4 = tail call i32 @putchar(i32 108)
%5 = tail call i32 @putchar(i32 111)
%6 = tail call i32 @putchar(i32 33)
%7 = tail call i32 @putchar(i32 10)
ret i32 0
}
/* Variables and functions */
int objc_compare_ptrs(void const *, void const *);
int compare_ptrs(const void *k1, const void *k2) {
  return objc_compare_ptrs(k1, k2);
}


x86 assembly (clang, -O0):
<compare_ptrs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <objc_compare_ptrs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_ptrs>:
jmp    1030 <objc_compare_ptrs@plt>

LLVM IR (-O0):
define i32 @compare_ptrs(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @objc_compare_ptrs(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @compare_ptrs(i8* %0, i8* %1) {
%3 = tail call i32 @objc_compare_ptrs(i8* %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
long double __infer_nondet_long_double();
long double asinhl(long double x) { return __infer_nondet_long_double(); }


x86 assembly (clang, -O0):
<asinhl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
xor    %eax,%eax
call   1030 <__infer_nondet_long_double@plt>
fld    %st(0)
fstp   %st(0)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<asinhl>:
xor    %eax,%eax
jmp    1030 <__infer_nondet_long_double@plt>

LLVM IR (-O0):
define x86_fp80 @asinhl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = call x86_fp80 (...) @__infer_nondet_long_double()
ret x86_fp80 %3
}

LLVM IR (-O2):
define x86_fp80 @asinhl(x86_fp80 %0) {
%2 = tail call x86_fp80 (...) @__infer_nondet_long_double()
ret x86_fp80 %2
}
__attribute__((always_)) void outsb(int port, const void *addr,
                                    unsigned long count) {
  __asm__ __volatile__("rep; outs"
                       "b"
                       : "+S"(addr), "+c"(count)
                       : "d"(port));
}


x86 assembly (clang, -O0):
<outsb>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
mov    -0x4(%rbp),%edx
rep outsb %ds:(%rsi),(%dx)
mov    %rsi,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outsb>:
mov    %rdx,%rcx
mov    %edi,%edx
rep outsb %ds:(%rsi),(%dx)
ret

LLVM IR (-O0):
define void @outsb(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i64, i64* %6
%9 = load i32, i32* %4
%10 = call { i8*, i64 } asm sideeffect "rep; outsb", "={si},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i32 %9, i8* %7, i64 %8)
%11 = extractvalue { i8*, i64 } %10, 0
%12 = extractvalue { i8*, i64 } %10, 1
store i8* %11, i8** %5
store i64 %12, i64* %6
ret void
}

LLVM IR (-O2):
define void @outsb(i32 %0, i8* %1, i64 %2) {
%4 = tail call { i8*, i64 } asm sideeffect "rep; outsb", "={si},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* %1, i64 %2)
ret void
}
int foo(int a, int b, int c, int d) {
  register int m asm("r8");
  m = a;
  m += b;
  m += c;
  m += d;
  asm("" : "=r"(m) : "0"(m));
  return m;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
add    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
add    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
add    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%r8d
mov    %r8d,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
lea    (%rdi,%rsi,1),%r8d
add    %edx,%r8d
add    %ecx,%r8d
mov    %r8d,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %5
store i32 %10, i32* %9
%11 = load i32, i32* %6
%12 = load i32, i32* %9
%13 = add nsw i32 %12, %11
store i32 %13, i32* %9
%14 = load i32, i32* %7
%15 = load i32, i32* %9
%16 = add nsw i32 %15, %14
store i32 %16, i32* %9
%17 = load i32, i32* %8
%18 = load i32, i32* %9
%19 = add nsw i32 %18, %17
store i32 %19, i32* %9
%20 = load i32, i32* %9
%21 = call i32 asm "", "={r8},{r8},~{dirflag},~{fpsr},~{flags}"(i32 %20)
store i32 %21, i32* %9
%22 = load i32, i32* %9
ret i32 %22
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = add nsw i32 %1, %0
%6 = add nsw i32 %5, %2
%7 = add nsw i32 %6, %3
%8 = tail call i32 asm "", "={r8},{r8},~{dirflag},~{fpsr},~{flags}"(i32 %7)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ clear_screen();
int /*<<< orphan*/ print(char *, int);
void testint(void) {
  clear_screen();
  print("TEST INT CALLED", 2);
}


x86 assembly (clang, -O0):
<testint>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <clear_screen@plt>
lea    0xece(%rip),%rdi
mov    $0x2,%esi
call   1030 <print@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<testint>:
push   %rax
xor    %eax,%eax
call   1040 <clear_screen@plt>
lea    0xed1(%rip),%rdi
mov    $0x2,%esi
pop    %rax
jmp    1030 <print@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"TEST INT CALLED\00"
define void @testint() {
%1 = call i32 (...) @clear_screen()
%2 = call i32 @print(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 2)
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"TEST INT CALLED\00"
define void @testint() {
%1 = tail call i32 (...) @clear_screen()
%2 = tail call i32 @print(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 2)
ret void
}
void rop3_216_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = S ^ T;
  stk2 = *D & stk3;
  stk1 = T ^ stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_216_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xa(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_216_1_1>:
or     %edx,%esi
and    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_216_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %5
%11 = zext i8 %10 to i32
%12 = load i8, i8* %6
%13 = zext i8 %12 to i32
%14 = xor i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %9
%16 = load i8*, i8** %4
%17 = load i8, i8* %16
%18 = zext i8 %17 to i32
%19 = load i8, i8* %9
%20 = zext i8 %19 to i32
%21 = and i32 %18, %20
%22 = trunc i32 %21 to i8
store i8 %22, i8* %8
%23 = load i8, i8* %6
%24 = zext i8 %23 to i32
%25 = load i8, i8* %8
%26 = zext i8 %25 to i32
%27 = xor i32 %24, %26
%28 = trunc i32 %27 to i8
store i8 %28, i8* %7
%29 = load i8, i8* %7
%30 = zext i8 %29 to i32
%31 = load i8, i8* %5
%32 = zext i8 %31 to i32
%33 = xor i32 %32, -1
%34 = and i32 %30, %33
%35 = load i8, i8* %6
%36 = zext i8 %35 to i32
%37 = xor i32 %36, -1
%38 = and i32 %34, %37
%39 = load i8*, i8** %4
%40 = load i8, i8* %39
%41 = zext i8 %40 to i32
%42 = load i8, i8* %5
%43 = zext i8 %42 to i32
%44 = and i32 %41, %43
%45 = or i32 %38, %44
%46 = load i8*, i8** %4
%47 = load i8, i8* %46
%48 = zext i8 %47 to i32
%49 = load i8, i8* %6
%50 = zext i8 %49 to i32
%51 = and i32 %48, %50
%52 = or i32 %45, %51
%53 = trunc i32 %52 to i8
%54 = load i8*, i8** %4
store i8 %53, i8* %54
ret void
}

LLVM IR (-O2):
define void @rop3_216_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %2, %1
%6 = and i8 %4, %5
store i8 %6, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void print_one(char *output) { printf("%s\n", output); }


x86 assembly (clang, -O0):
<print_one>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_one>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @print_one(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @print_one(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void foo508(int p) {}


x86 assembly (clang, -O0):
<foo508>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo508>:
ret

LLVM IR (-O0):
define void @foo508(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo508(i32 %0) {
ret void
}
int bitcount(unsigned int val) {
  int nbits;
  for (nbits = 0; val != 0; nbits++)
    val &= val - 1;
  return nbits;
}


x86 assembly (clang, -O0):
<bitcount>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1132 <bitcount+0x32>
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
and    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <bitcount+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitcount>:
xor    %eax,%eax
test   %edi,%edi
je     111c <bitcount+0x1c>
cs nopw 0x0(%rax,%rax,1)
lea    -0x1(%rdi),%ecx
add    $0x1,%eax
and    %edi,%ecx
mov    %ecx,%edi
jne    1110 <bitcount+0x10>
ret

LLVM IR (-O0):
define i32 @bitcount(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32, i32* %2
%9 = sub i32 %8, 1
%10 = load i32, i32* %2
%11 = and i32 %10, %9
store i32 %11, i32* %2
br label %12
12: ; preds = %7
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @bitcount(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ 0, %1 ]
%5 = phi i32 [ %7, %3 ], [ %0, %1 ]
%6 = add i32 %5, -1
%7 = and i32 %6, %5
%8 = add nuw nsw i32 %4, 1
%9 = icmp eq i32 %7, 0
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %8, %3 ]
ret i32 %11
}
void RTMemReallocTag(void) {}


x86 assembly (clang, -O0):
<RTMemReallocTag>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTMemReallocTag>:
ret

LLVM IR (-O0):
define void @RTMemReallocTag() {
ret void
}

LLVM IR (-O2):
define void @RTMemReallocTag() {
ret void
}
float LFOsaw(float step, float period, float knee) {
  if (step <= knee * period) {
    return 1.0f / knee * (1.0f - knee) * step / period;
  } else {
    return 1.0f - step / period + knee;
  }
}


x86 assembly (clang, -O0):
<LFOsaw>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  %xmm2,-0x10(%rbp)
movss  -0x8(%rbp),%xmm1
movss  -0x10(%rbp),%xmm0
mulss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jb     115d <LFOsaw+0x5d>
movss  0xecd(%rip),%xmm0
divss  -0x10(%rbp),%xmm0
movss  0xec0(%rip),%xmm1
subss  -0x10(%rbp),%xmm1
mulss  %xmm1,%xmm0
mulss  -0x8(%rbp),%xmm0
divss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    117d <LFOsaw+0x7d>
movss  -0x8(%rbp),%xmm1
divss  -0xc(%rbp),%xmm1
movss  0xe91(%rip),%xmm0
subss  %xmm1,%xmm0
addss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<LFOsaw>:
movaps %xmm0,%xmm3
movaps %xmm1,%xmm0
mulss  %xmm2,%xmm0
ucomiss %xmm3,%xmm0
jae    1124 <LFOsaw+0x24>
divss  %xmm1,%xmm3
movss  0xee5(%rip),%xmm0
subss  %xmm3,%xmm0
addss  %xmm2,%xmm0
ret
movss  0xed4(%rip),%xmm0
movaps %xmm0,%xmm4
divss  %xmm2,%xmm4
subss  %xmm2,%xmm0
mulss  %xmm4,%xmm0
mulss  %xmm3,%xmm0
divss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @LFOsaw(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
%8 = load float, float* %5
%9 = load float, float* %7
%10 = load float, float* %6
%11 = fmul float %9, %10
%12 = fcmp ole float %8, %11
br i1 %12, label %13, label %23
13: ; preds = %3
%14 = load float, float* %7
%15 = fdiv float 1.000000e+00, %14
%16 = load float, float* %7
%17 = fsub float 1.000000e+00, %16
%18 = fmul float %15, %17
%19 = load float, float* %5
%20 = fmul float %18, %19
%21 = load float, float* %6
%22 = fdiv float %20, %21
store float %22, float* %4
br label %30
23: ; preds = %3
%24 = load float, float* %5
%25 = load float, float* %6
%26 = fdiv float %24, %25
%27 = fsub float 1.000000e+00, %26
%28 = load float, float* %7
%29 = fadd float %27, %28
store float %29, float* %4
br label %30
30: ; preds = %23, %13
%31 = load float, float* %4
ret float %31
}

LLVM IR (-O2):
define float @LFOsaw(float %0, float %1, float %2) {
%4 = fmul float %1, %2
%5 = fcmp ult float %4, %0
br i1 %5, label %12, label %6
6: ; preds = %3
%7 = fdiv float 1.000000e+00, %2
%8 = fsub float 1.000000e+00, %2
%9 = fmul float %7, %8
%10 = fmul float %9, %0
%11 = fdiv float %10, %1
br label %16
12: ; preds = %3
%13 = fdiv float %0, %1
%14 = fsub float 1.000000e+00, %13
%15 = fadd float %14, %2
br label %16
16: ; preds = %12, %6
%17 = phi float [ %11, %6 ], [ %15, %12 ]
ret float %17
}
void genaddi() {}


x86 assembly (clang, -O0):
<genaddi>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genaddi>:
ret

LLVM IR (-O0):
define void @genaddi() {
ret void
}

LLVM IR (-O2):
define void @genaddi() {
ret void
}
/* Variables and functions */
size_t dsf_canonify(int *, int);
int dsf_size(int *dsf, int index) { return dsf[dsf_canonify(dsf, index)] >> 2; }


x86 assembly (clang, -O0):
<dsf_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <dsf_canonify@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
mov    (%rax,%rcx,4),%eax
sar    $0x2,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dsf_size>:
push   %rbx
mov    %rdi,%rbx
call   1030 <dsf_canonify@plt>
mov    (%rbx,%rax,4),%eax
sar    $0x2,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @dsf_size(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %3
%7 = load i32, i32* %4
%8 = call i64 @dsf_canonify(i32* %6, i32 %7)
%9 = getelementptr inbounds i32, i32* %5, i64 %8
%10 = load i32, i32* %9
%11 = ashr i32 %10, 2
ret i32 %11
}

LLVM IR (-O2):
define i32 @dsf_size(i32* %0, i32 %1) {
%3 = tail call i64 @dsf_canonify(i32* %0, i32 %1)
%4 = getelementptr inbounds i32, i32* %0, i64 %3
%5 = load i32, i32* %4
%6 = ashr i32 %5, 2
ret i32 %6
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int bus_read(int);
uint8_t read_reg(uint8_t addr) {
  uint8_t data;
  data = bus_read(addr & 0x7F);
  return data;
}


x86 assembly (clang, -O0):
<read_reg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
and    $0x7f,%edi
call   1030 <bus_read@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_reg>:
and    $0x7f,%edi
jmp    1030 <bus_read@plt>

LLVM IR (-O0):
define i32 @read_reg(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = and i32 %4, 127
%6 = call i32 @bus_read(i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @read_reg(i32 %0) {
%2 = and i32 %0, 127
%3 = tail call i32 @bus_read(i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ wBuiltinBase();
int /*<<< orphan*/ wStackPushNumber(int);
void wBuiltinBin() {
  int value;
  wStackPushNumber(2);
  wBuiltinBase();
}


x86 assembly (clang, -O0):
<wBuiltinBin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x2,%edi
call   1040 <wStackPushNumber@plt>
mov    $0x0,%al
call   1030 <wBuiltinBase@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wBuiltinBin>:
push   %rax
mov    $0x2,%edi
call   1040 <wStackPushNumber@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <wBuiltinBase@plt>

LLVM IR (-O0):
define void @wBuiltinBin() {
%1 = alloca i32
%2 = call i32 @wStackPushNumber(i32 2)
%3 = call i32 (...) @wBuiltinBase()
ret void
}

LLVM IR (-O2):
define void @wBuiltinBin() {
%1 = tail call i32 @wStackPushNumber(i32 2)
%2 = tail call i32 (...) @wBuiltinBase()
ret void
}
float ajCvtRadToDeg(float radians) {
  return radians * (float)(180.0 / 3.141592653589);
}


x86 assembly (clang, -O0):
<ajCvtRadToDeg>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ajCvtRadToDeg>:
mulss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @ajCvtRadToDeg(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float %3, 0x404CA5DC20000000
ret float %4
}

LLVM IR (-O2):
define float @ajCvtRadToDeg(float %0) {
%2 = fmul float %0, 0x404CA5DC20000000
ret float %2
}
unsigned short makeGrey(unsigned short int r) {
  return ((r >> 3) << 11) | ((r >> 2) << 5) | (r >> 3);
}


x86 assembly (clang, -O0):
<makeGrey>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
sar    $0x3,%eax
shl    $0xb,%eax
movzwl -0x2(%rbp),%ecx
sar    $0x2,%ecx
shl    $0x5,%ecx
or     %ecx,%eax
movzwl -0x2(%rbp),%ecx
sar    $0x3,%ecx
or     %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<makeGrey>:
lea    0x0(,%rdi,8),%ecx
mov    %edi,%eax
shr    $0x3,%eax
and    $0xffe0,%ecx
or     %eax,%ecx
shl    $0xb,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define zeroext i16 @makeGrey(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = ashr i32 %4, 3
%6 = shl i32 %5, 11
%7 = load i16, i16* %2
%8 = zext i16 %7 to i32
%9 = ashr i32 %8, 2
%10 = shl i32 %9, 5
%11 = or i32 %6, %10
%12 = load i16, i16* %2
%13 = zext i16 %12 to i32
%14 = ashr i32 %13, 3
%15 = or i32 %11, %14
%16 = trunc i32 %15 to i16
ret i16 %16
}

LLVM IR (-O2):
define zeroext i16 @makeGrey(i16 zeroext %0) {
%2 = zext i16 %0 to i32
%3 = lshr i32 %2, 3
%4 = shl nuw nsw i32 %3, 11
%5 = shl nuw nsw i32 %2, 3
%6 = and i32 %5, 65504
%7 = or i32 %6, %3
%8 = or i32 %7, %4
%9 = trunc i32 %8 to i16
ret i16 %9
}
/* Type definitions */
struct tiff {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ tiffWriteField(int /*<<< orphan*/ *, struct tiff *,
                                  unsigned short, int, int, unsigned short *);
void tiffWriteWordField(FILE *fp, struct tiff *t, unsigned short tag,
                        unsigned short w) {
  tiffWriteField(fp, t, tag, 3, 1, &w);
}


x86 assembly (clang, -O0):
<tiffWriteWordField>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %cx,%ax
mov    %dx,%cx
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %cx,-0x12(%rbp)
mov    %ax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x3,%ecx
mov    $0x1,%r8d
lea    -0x14(%rbp),%r9
movzwl -0x12(%rbp),%edx
call   1030 <tiffWriteField@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tiffWriteWordField>:
push   %rax
mov    %cx,0x6(%rsp)
lea    0x6(%rsp),%r9
mov    $0x3,%ecx
mov    $0x1,%r8d
call   1030 <tiffWriteField@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.tiff = type { i32 }
define void @tiffWriteWordField(i32* %0, %struct.tiff* %1, i16 zeroext %2, i16 zeroext %3) {
%5 = alloca i32*
%6 = alloca %struct.tiff*
%7 = alloca i16
%8 = alloca i16
store i32* %0, i32** %5
store %struct.tiff* %1, %struct.tiff** %6
store i16 %2, i16* %7
store i16 %3, i16* %8
%9 = load i32*, i32** %5
%10 = load %struct.tiff*, %struct.tiff** %6
%11 = load i16, i16* %7
%12 = call i32 @tiffWriteField(i32* %9, %struct.tiff* %10, i16 zeroext %11, i32 3, i32 1, i16* %8)
ret void
}

LLVM IR (-O2):
%struct.tiff = type { i32 }
define void @tiffWriteWordField(i32* %0, %struct.tiff* %1, i16 zeroext %2, i16 zeroext %3) {
%5 = alloca i16
store i16 %3, i16* %5
%6 = call i32 @tiffWriteField(i32* %0, %struct.tiff* %1, i16 zeroext %2, i32 3, i32 1, i16* %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ chdir(char const *);
void mc_chdir(const char *workdir) { chdir(workdir); }


x86 assembly (clang, -O0):
<mc_chdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <chdir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mc_chdir>:
jmp    1030 <chdir@plt>

LLVM IR (-O0):
define void @mc_chdir(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @chdir(i8* %3)
ret void
}

LLVM IR (-O2):
define void @mc_chdir(i8* %0) {
%2 = tail call i32 @chdir(i8* %0)
ret void
}
int g_DUMMY_menu_create_menubar2(int win_id) {
  win_id = win_id;
  return -1;
}


x86 assembly (clang, -O0):
<g_DUMMY_menu_create_menubar2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_DUMMY_menu_create_menubar2>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @g_DUMMY_menu_create_menubar2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store i32 %3, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @g_DUMMY_menu_create_menubar2(i32 %0) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ EBADF;
int /*<<< orphan*/ errno;
int write(int file, char *ptr, int len) {
  errno = EBADF;
  return -1;
}


x86 assembly (clang, -O0):
<write>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2ec3(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec2(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<write>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%eax
mov    0x2ed0(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@EBADF = global i32 0
@errno = global i32 0
define i32 @write(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* @EBADF
store i32 %7, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@EBADF = global i32 0
@errno = global i32 0
define i32 @write(i32 %0, i8* nocapture readnone %1, i32 %2) {
%4 = load i32, i32* @EBADF
store i32 %4, i32* @errno
ret i32 -1
}
unsigned long hashtable_hash(char *str) {
  unsigned long hash = 5381;
  int c;
  while ((c = *str++))
    hash = ((hash << 5) + hash) + c;
  return hash;
}


x86 assembly (clang, -O0):
<hashtable_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1505,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     114a <hashtable_hash+0x4a>
mov    -0x10(%rbp),%rax
shl    $0x5,%rax
add    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <hashtable_hash+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashtable_hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     112d <hashtable_hash+0x2d>
add    $0x1,%rdi
mov    $0x1505,%eax
nop
mov    %rax,%rdx
shl    $0x5,%rdx
add    %rax,%rdx
movsbq %cl,%rax
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hashtable_hash+0x10>
ret
mov    $0x1505,%eax
ret

LLVM IR (-O0):
define i64 @hashtable_hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
store i64 5381, i64* %3
br label %5
5: ; preds = %11, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
store i32 %9, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %5
%12 = load i64, i64* %3
%13 = shl i64 %12, 5
%14 = load i64, i64* %3
%15 = add i64 %13, %14
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = add i64 %15, %17
store i64 %18, i64* %3
br label %5
19: ; preds = %5
%20 = load i64, i64* %3
ret i64 %20
}

LLVM IR (-O2):
define i64 @hashtable_hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = phi i64 [ %11, %4 ], [ 5381, %1 ]
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = mul i64 %7, 33
%10 = sext i8 %5 to i64
%11 = add i64 %9, %10
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ 5381, %1 ], [ %11, %4 ]
ret i64 %15
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void ip_set_flag_df(uint8_t *p_ip, uint8_t flag) {
  p_ip[6] &= ~0x40;
  p_ip[6] |= (flag & 1) << 6;
}


x86 assembly (clang, -O0):
<ip_set_flag_df>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x18(%rax),%ecx
and    $0xffffffbf,%ecx
mov    %ecx,0x18(%rax)
mov    -0xc(%rbp),%ecx
and    $0x1,%ecx
shl    $0x6,%ecx
mov    -0x8(%rbp),%rax
or     0x18(%rax),%ecx
mov    %ecx,0x18(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ip_set_flag_df>:
mov    0x18(%rdi),%eax
and    $0xffffffbf,%eax
shl    $0x6,%esi
and    $0x40,%esi
or     %eax,%esi
mov    %esi,0x18(%rdi)
ret

LLVM IR (-O0):
define void @ip_set_flag_df(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 6
%7 = load i32, i32* %6
%8 = and i32 %7, -65
store i32 %8, i32* %6
%9 = load i32, i32* %4
%10 = and i32 %9, 1
%11 = shl i32 %10, 6
%12 = load i32*, i32** %3
%13 = getelementptr inbounds i32, i32* %12, i64 6
%14 = load i32, i32* %13
%15 = or i32 %14, %11
store i32 %15, i32* %13
ret void
}

LLVM IR (-O2):
define void @ip_set_flag_df(i32* nocapture %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 6
%4 = load i32, i32* %3
%5 = and i32 %4, -65
%6 = shl i32 %1, 6
%7 = and i32 %6, 64
%8 = or i32 %5, %7
store i32 %8, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ get_pid();
int /*<<< orphan*/ printf(char *);
void report_start(void) {
  if (!get_pid()) {
    printf("\nStarting test ...\n");
  }
}


x86 assembly (clang, -O0):
<report_start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <get_pid@plt>
cmp    $0x0,%eax
jne    1140 <report_start+0x20>
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<report_start>:
push   %rax
xor    %eax,%eax
call   1040 <get_pid@plt>
test   %eax,%eax
je     112e <report_start+0xe>
pop    %rax
ret
lea    0xecb(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"\0AStarting test ...\0A\00"
define void @report_start() {
%1 = call i32 (...) @get_pid()
%2 = icmp ne i32 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
ret void
}

LLVM IR (-O2):
@str = [19 x i8] c"\0AStarting test ...\00"
define void @report_start() {
%1 = tail call i32 (...) @get_pid()
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;

/* Variables and functions */
double difftime(int /*<<< orphan*/, int /*<<< orphan*/);
double time___TimeT_difftime___impl(time_t recv, time_t start) {
  return difftime(recv, start);
}


x86 assembly (clang, -O0):
<time___TimeT_difftime___impl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <difftime@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<time___TimeT_difftime___impl>:
jmp    1030 <difftime@plt>

LLVM IR (-O0):
define double @time___TimeT_difftime___impl(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call double @difftime(i32 %5, i32 %6)
ret double %7
}

LLVM IR (-O2):
define double @time___TimeT_difftime___impl(i32 %0, i32 %1) {
%3 = tail call double @difftime(i32 %0, i32 %1)
ret double %3
}
/* Variables and functions */
int Getb(int);
extern void WaitGEfifo(void) {
  while (Getb(0x20) & 0x20)
    ;
}


x86 assembly (clang, -O0):
<WaitGEfifo>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <WaitGEfifo+0x9>
mov    $0x20,%edi
call   1030 <Getb@plt>
and    $0x20,%eax
cmp    $0x0,%eax
je     1134 <WaitGEfifo+0x24>
jmp    1119 <WaitGEfifo+0x9>
pop    %rbp
ret

x86 assembly (clang, -O2):
<WaitGEfifo>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x20,%edi
call   1030 <Getb@plt>
test   $0x20,%al
jne    1120 <WaitGEfifo+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @WaitGEfifo() {
br label %1
1: ; preds = %5, %0
%2 = call i32 @Getb(i32 32)
%3 = and i32 %2, 32
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %1
6: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @WaitGEfifo() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @Getb(i32 32)
%3 = and i32 %2, 32
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %1
5: ; preds = %1
ret void
}
void avcodec_configuration() {}


x86 assembly (clang, -O0):
<avcodec_configuration>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avcodec_configuration>:
ret

LLVM IR (-O0):
define void @avcodec_configuration() {
ret void
}

LLVM IR (-O2):
define void @avcodec_configuration() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ r_write(int /*<<< orphan*/ *, ...);
int strlen(char *);
int /*<<< orphan*/ xxxx(char *, short);
void write_string(char *s, FILE *fp) {
  short n;
  n = strlen(s) + 1;
  xxxx(s, n);
  r_write(fp, &n, sizeof(short));
  r_write(fp, s, n);
}


x86 assembly (clang, -O0):
<write_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
mov    %ax,-0x12(%rbp)
mov    -0x8(%rbp),%rdi
movswl -0x12(%rbp),%esi
call   1050 <xxxx@plt>
mov    -0x10(%rbp),%rdi
lea    -0x12(%rbp),%rsi
mov    $0x2,%edx
mov    $0x0,%al
call   1040 <r_write@plt>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
movswl -0x12(%rbp),%edx
mov    $0x0,%al
call   1040 <r_write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_string>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <strlen@plt>
add    $0x1,%eax
mov    %ax,0x6(%rsp)
movswl %ax,%esi
mov    %rbx,%rdi
call   1050 <xxxx@plt>
lea    0x6(%rsp),%rsi
mov    $0x2,%edx
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <r_write@plt>
movswl 0x6(%rsp),%edx
mov    %r14,%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1040 <r_write@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @write_string(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i16
store i8* %0, i8** %3
store i32* %1, i32** %4
%6 = load i8*, i8** %3
%7 = call i32 @strlen(i8* %6)
%8 = add nsw i32 %7, 1
%9 = trunc i32 %8 to i16
store i16 %9, i16* %5
%10 = load i8*, i8** %3
%11 = load i16, i16* %5
%12 = call i32 @xxxx(i8* %10, i16 signext %11)
%13 = load i32*, i32** %4
%14 = call i32 (i32*, ...) @r_write(i32* %13, i16* %5, i64 2)
%15 = load i32*, i32** %4
%16 = load i8*, i8** %3
%17 = load i16, i16* %5
%18 = sext i16 %17 to i32
%19 = call i32 (i32*, ...) @r_write(i32* %15, i8* %16, i32 %18)
ret void
}

LLVM IR (-O2):
define void @write_string(i8* %0, i32* %1) {
%3 = alloca i16
%4 = bitcast i16* %3 to i8*
%5 = tail call i32 @strlen(i8* %0)
%6 = trunc i32 %5 to i16
%7 = add i16 %6, 1
store i16 %7, i16* %3
%8 = tail call i32 @xxxx(i8* %0, i16 signext %7)
%9 = call i32 (i32*, ...) @r_write(i32* %1, i16* %3, i64 2)
%10 = load i16, i16* %3
%11 = sext i16 %10 to i32
%12 = call i32 (i32*, ...) @r_write(i32* %1, i8* %0, i32 %11)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ uartTx(char *, int);
void lcdMoveRight() { uartTx("\xFE\x14", 2); }


x86 assembly (clang, -O0):
<lcdMoveRight>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x2,%esi
call   1030 <uartTx@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcdMoveRight>:
lea    0xee9(%rip),%rdi
mov    $0x2,%esi
jmp    1030 <uartTx@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"\FE\14\00"
define void @lcdMoveRight() {
%1 = call i32 @uartTx(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 2)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"\FE\14\00"
define void @lcdMoveRight() {
%1 = tail call i32 @uartTx(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isascii(int);
void t_isascii_0x12() {
  Assert_real((isascii(18)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              95, ("isascii should be 1 for 0x12"));
}


x86 assembly (clang, -O0):
<t_isascii_0x12>:
push   %rbp
mov    %rsp,%rbp
mov    $0x12,%edi
call   1030 <isascii@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x5f,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0x12>:
lea    0xee9(%rip),%rsi
lea    0xf8a(%rip),%rcx
mov    $0x1,%edi
mov    $0x5f,%edx
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 1 for 0x12\00"
define void @t_isascii_0x12() {
%1 = call i32 @isascii(i32 18)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 95, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 1 for 0x12\00"
define void @t_isascii_0x12() {
%1 = tail call i32 @Assert_real(i32 1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 95, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
struct timeval {
  float tv_sec;
  float tv_usec;
};

/* Variables and functions */
float timedifference_msec(struct timeval *t0, struct timeval *t1) {
  return (t1->tv_sec - t0->tv_sec) * 1000.0f +
         (t1->tv_usec - t0->tv_usec) / 1000.0f;
}


x86 assembly (clang, -O0):
<timedifference_msec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
subss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  0x4(%rax),%xmm1
mov    -0x8(%rbp),%rax
subss  0x4(%rax),%xmm1
movss  0xeca(%rip),%xmm2
divss  %xmm2,%xmm1
movss  0xebe(%rip),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<timedifference_msec>:
movss  (%rsi),%xmm0
movss  0x4(%rsi),%xmm1
subss  (%rdi),%xmm0
subss  0x4(%rdi),%xmm1
movss  0xee6(%rip),%xmm2
divss  %xmm2,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
%struct.timeval = type { float, float }
define float @timedifference_msec(%struct.timeval* %0, %struct.timeval* %1) {
%3 = alloca %struct.timeval*
%4 = alloca %struct.timeval*
store %struct.timeval* %0, %struct.timeval** %3
store %struct.timeval* %1, %struct.timeval** %4
%5 = load %struct.timeval*, %struct.timeval** %4
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %5, i32 0, i32 0
%7 = load float, float* %6
%8 = load %struct.timeval*, %struct.timeval** %3
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %8, i32 0, i32 0
%10 = load float, float* %9
%11 = fsub float %7, %10
%12 = load %struct.timeval*, %struct.timeval** %4
%13 = getelementptr inbounds %struct.timeval, %struct.timeval* %12, i32 0, i32 1
%14 = load float, float* %13
%15 = load %struct.timeval*, %struct.timeval** %3
%16 = getelementptr inbounds %struct.timeval, %struct.timeval* %15, i32 0, i32 1
%17 = load float, float* %16
%18 = fsub float %14, %17
%19 = fdiv float %18, 1.000000e+03
%20 = call float @llvm.fmuladd.f32(float %11, float 1.000000e+03, float %19)
ret float %20
}

LLVM IR (-O2):
%struct.timeval = type { float, float }
define float @timedifference_msec(%struct.timeval* nocapture %0, %struct.timeval* nocapture %1) {
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%4 = load float, float* %3
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
%6 = load float, float* %5
%7 = fsub float %4, %6
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%9 = load float, float* %8
%10 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
%11 = load float, float* %10
%12 = fsub float %9, %11
%13 = fdiv float %12, 1.000000e+03
%14 = tail call float @llvm.fmuladd.f32(float %7, float 1.000000e+03, float %13)
ret float %14
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
uint32_t v2p(void *addr) { return (uint32_t)addr - 0xe0000000; }


x86 assembly (clang, -O0):
<v2p>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movabs $0xe0000000,%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<v2p>:
movabs $0xffffffff20000000,%rax
ff ff ff
add    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @v2p(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
%5 = sub nsw i64 %4, 3758096384
ret i64 %5
}

LLVM IR (-O2):
define i64 @v2p(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = add nsw i64 %2, -3758096384
ret i64 %3
}
int isgn(int v) {
  if (v == 0)
    return 0;
  if (v < 0)
    return -1;
  else
    return 1;
}


x86 assembly (clang, -O0):
<isgn>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    111d <isgn+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    113a <isgn+0x3a>
cmpl   $0x0,-0x8(%rbp)
jge    1133 <isgn+0x33>
movl   $0xffffffff,-0x4(%rbp)
jmp    113a <isgn+0x3a>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isgn>:
mov    %edi,%eax
sar    $0x1f,%eax
or     $0x1,%eax
test   %edi,%edi
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @isgn(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %12
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 -1, i32* %2
br label %12
11: ; preds = %7
store i32 1, i32* %2
br label %12
12: ; preds = %11, %10, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @isgn(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = icmp sgt i32 %0, -1
%4 = select i1 %3, i32 1, i32 -1
%5 = select i1 %2, i32 0, i32 %4
ret i32 %5
}
int f0(int x0, int y0, ...) { return x0 + y0; }


x86 assembly (clang, -O0):
<f0>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f0>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @f0(i32 %0, i32 %1, ...) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @f0(i32 %0, i32 %1, ...) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
int wchgat(const void *opts __attribute__((unused))) { return 1; }


x86 assembly (clang, -O0):
<wchgat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wchgat>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @wchgat(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @wchgat(i8* nocapture readnone %0) {
ret i32 1
}
/* Variables and functions */
char *getenv(char *);
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char const *argv[]) {
  printf("PATH is %s\n", getenv("PATH"));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xecf(%rip),%rdi
call   1030 <getenv@plt>
mov    %rax,%rsi
lea    0xeb4(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee4(%rip),%rdi
call   1030 <getenv@plt>
lea    0xecc(%rip),%rdi
mov    %rax,%rsi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"PATH is %s\0A\00"
@.str.1 = [5 x i8] c"PATH\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i8* @getenv(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%7 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"PATH is %s\0A\00"
@.str.1 = [5 x i8] c"PATH\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i8* @getenv(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 0
}
adrx0reg1(r0, r1, x0, x1, p0, p1) signed char r0, r1;
signed char *p0, *p1;
{
  if ((((signed char *)10000000)[x0]) <= r1)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<adrx0reg1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %dil,%sil
mov    %sil,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
movslq -0xc(%rbp),%rcx
mov    $0x989680,%eax
movsbl (%rax,%rcx,1),%eax
movsbl -0x6(%rbp),%ecx
cmp    %ecx,%eax
jg     1143 <adrx0reg1+0x43>
movl   $0x1,-0x4(%rbp)
jmp    114a <adrx0reg1+0x4a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adrx0reg1>:
movslq %edx,%rax
movsbl 0x989680(%rax),%ecx
movsbl %sil,%edx
xor    %eax,%eax
cmp    %ecx,%edx
setge  %al
ret

LLVM IR (-O0):
define i32 @adrx0reg1(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4, i8* %5) {
%7 = alloca i32
%8 = alloca i8
%9 = alloca i8
%10 = alloca i32
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i8*
%14 = trunc i32 %0 to i8
%15 = trunc i32 %1 to i8
store i8 %14, i8* %8
store i8 %15, i8* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i8* %4, i8** %12
store i8* %5, i8** %13
%16 = load i32, i32* %10
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* inttoptr (i64 10000000 to i8*), i64 %17
%19 = load i8, i8* %18
%20 = sext i8 %19 to i32
%21 = load i8, i8* %9
%22 = sext i8 %21 to i32
%23 = icmp sle i32 %20, %22
br i1 %23, label %24, label %25
24: ; preds = %6
store i32 1, i32* %7
br label %26
25: ; preds = %6
store i32 0, i32* %7
br label %26
26: ; preds = %25, %24
%27 = load i32, i32* %7
ret i32 %27
}

LLVM IR (-O2):
define i32 @adrx0reg1(i32 %0, i32 %1, i32 %2, i32 %3, i8* nocapture readnone %4, i8* nocapture readnone %5) {
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i8, i8* inttoptr (i64 10000000 to i8*), i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = shl i32 %1, 24
%12 = ashr exact i32 %11, 24
%13 = icmp sge i32 %12, %10
%14 = zext i1 %13 to i32
ret i32 %14
}
void RTAvlPVGet(void) {}


x86 assembly (clang, -O0):
<RTAvlPVGet>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvlPVGet>:
ret

LLVM IR (-O0):
define void @RTAvlPVGet() {
ret void
}

LLVM IR (-O2):
define void @RTAvlPVGet() {
ret void
}
void qdss_disable_sink(void) {}


x86 assembly (clang, -O0):
<qdss_disable_sink>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qdss_disable_sink>:
ret

LLVM IR (-O0):
define void @qdss_disable_sink() {
ret void
}

LLVM IR (-O2):
define void @qdss_disable_sink() {
ret void
}