xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ floor(double);
double qua(double phase) {
  phase -= floor(phase + 0.5);
  phase *= phase;
  return 0.875 - phase * (15 - 30 * phase);
}


x86 assembly (clang, -O0):
<qua>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef3(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
call   1030 <floor@plt>
cvtsi2sd %rax,%xmm1
movsd  -0x8(%rbp),%xmm0
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
movsd  0xea5(%rip),%xmm2
mulsd  %xmm2,%xmm1
movsd  0xea1(%rip),%xmm2
addsd  %xmm2,%xmm1
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  %xmm1,%xmm0
movsd  0xe6a(%rip),%xmm1
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qua>:
push   %rax
movapd %xmm0,%xmm1
movsd  %xmm0,(%rsp)
movsd  0xede(%rip),%xmm0
addsd  %xmm1,%xmm0
call   1030 <floor@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
movsd  (%rsp),%xmm2
subsd  %xmm0,%xmm2
mulsd  %xmm2,%xmm2
movsd  0xec0(%rip),%xmm1
mulsd  %xmm2,%xmm1
addsd  0xebc(%rip),%xmm1
mulsd  %xmm2,%xmm1
movsd  0xeb8(%rip),%xmm0
subsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @qua(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double %3, 5.000000e-01
%5 = call i64 @floor(double %4)
%6 = sitofp i64 %5 to double
%7 = load double, double* %2
%8 = fsub double %7, %6
store double %8, double* %2
%9 = load double, double* %2
%10 = load double, double* %2
%11 = fmul double %10, %9
store double %11, double* %2
%12 = load double, double* %2
%13 = load double, double* %2
%14 = call double @llvm.fmuladd.f64(double -3.000000e+01, double %13, double 1.500000e+01)
%15 = fneg double %12
%16 = call double @llvm.fmuladd.f64(double %15, double %14, double 8.750000e-01)
ret double %16
}

LLVM IR (-O2):
define double @qua(double %0) {
%2 = fadd double %0, 5.000000e-01
%3 = tail call i64 @floor(double %2)
%4 = sitofp i64 %3 to double
%5 = fsub double %0, %4
%6 = fmul double %5, %5
%7 = tail call double @llvm.fmuladd.f64(double %6, double -3.000000e+01, double 1.500000e+01)
%8 = fneg double %6
%9 = tail call double @llvm.fmuladd.f64(double %8, double %7, double 8.750000e-01)
ret double %9
}
/* Variables and functions */
scalar_t__ mib_set(scalar_t__, void *);
int /*<<< orphan*/ printf(char *);
int setDomainBlockingCapablility(unsigned char enabled) {
  if (mib_set(0 + 83, (void *)&enabled) == 0) {
    printf("Set domain blocking enabled flag error!\n");
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<setDomainBlockingCapablility>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    $0x53,%edi
lea    -0x5(%rbp),%rsi
call   1030 <mib_set@plt>
cmp    $0x0,%rax
jne    115e <setDomainBlockingCapablility+0x3e>
lea    0xeb3(%rip),%rdi
call   1040 <printf@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1165 <setDomainBlockingCapablility+0x45>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setDomainBlockingCapablility>:
push   %rax
mov    %dil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x53,%edi
call   1040 <mib_set@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
je     1141 <setDomainBlockingCapablility+0x21>
pop    %rcx
ret
lea    0xeb8(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [41 x i8] c"Set domain blocking enabled flag error!\0A\00"
define i32 @setDomainBlockingCapablility(i8 zeroext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = call i64 @mib_set(i64 83, i8* %3)
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %6
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
@str = [40 x i8] c"Set domain blocking enabled flag error!\00"
define i32 @setDomainBlockingCapablility(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i64 @mib_set(i64 83, i8* %2)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([40 x i8], [40 x i8]* @str, i64 0, i64 0))
br label %7
7: ; preds = %1, %5
%8 = phi i32 [ -1, %5 ], [ 0, %1 ]
ret i32 %8
}
/* Type definitions */
struct bladerf_devinfo {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct bladerf_devinfo *);
void bladerf_free_device_list(struct bladerf_devinfo *devices) {
  free(devices);
}


x86 assembly (clang, -O0):
<bladerf_free_device_list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bladerf_free_device_list>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.bladerf_devinfo = type { i32 }
define void @bladerf_free_device_list(%struct.bladerf_devinfo* %0) {
%2 = alloca %struct.bladerf_devinfo*
store %struct.bladerf_devinfo* %0, %struct.bladerf_devinfo** %2
%3 = load %struct.bladerf_devinfo*, %struct.bladerf_devinfo** %2
%4 = call i32 @free(%struct.bladerf_devinfo* %3)
ret void
}

LLVM IR (-O2):
%struct.bladerf_devinfo = type { i32 }
define void @bladerf_free_device_list(%struct.bladerf_devinfo* nocapture %0) {
%2 = tail call i32 @free(%struct.bladerf_devinfo* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "Usage: at [-V] [-q x] [-f file] [-mMlbv] timespec ...\n"
                  "       at [-V] [-q x] [-f file] [-mMlbv] -t time\n"
                  "       at -c job ...\n"
                  "       atq [-V] [-q x]\n"
                  "       at [ -rd ] job ...\n"
                  "       atrm [-V] job ...\n"
                  "       batch\n");
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [212 x i8] c"Usage: at [-V] [-q x] [-f file] [-mMlbv] timespec ...\0A at [-V] [-q x] [-f file] [-mMlbv] -t time\0A at -c job ...\0A atq [-V] [-q x]\0A at [ -rd ] job ...\0A atrm [-V] job ...\0A batch\0A\00"
@EXIT_FAILURE = global i32 0
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([212 x i8], [212 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @EXIT_FAILURE
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [212 x i8] c"Usage: at [-V] [-q x] [-f file] [-mMlbv] timespec ...\0A at [-V] [-q x] [-f file] [-mMlbv] -t time\0A at -c job ...\0A atq [-V] [-q x]\0A at [ -rd ] job ...\0A atrm [-V] job ...\0A batch\0A\00"
@EXIT_FAILURE = global i32 0
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([212 x i8], [212 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @EXIT_FAILURE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
int nice(int inc) { return -1; }


x86 assembly (clang, -O0):
<nice>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nice>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @nice(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @nice(i32 %0) {
ret i32 -1
}
int test_imm_6Dint64_lowword_reg(long long val) {
  return ((val) & (0x6D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Dint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x6d,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Dint64_lowword_reg>:
test   $0x6d,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Dint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 109
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_6Dint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 109
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
unsigned long THRandom_initialSeed();
unsigned long Random_initialSeed() { return THRandom_initialSeed(); }


x86 assembly (clang, -O0):
<Random_initialSeed>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <THRandom_initialSeed@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Random_initialSeed>:
xor    %eax,%eax
jmp    1030 <THRandom_initialSeed@plt>

LLVM IR (-O0):
define i64 @Random_initialSeed() {
%1 = call i64 (...) @THRandom_initialSeed()
ret i64 %1
}

LLVM IR (-O2):
define i64 @Random_initialSeed() {
%1 = tail call i64 (...) @THRandom_initialSeed()
ret i64 %1
}
double compute_epsv(const double rho_zero, const double specific_volume) {
  return 1.0 - rho_zero * specific_volume;
}


x86 assembly (clang, -O0):
<compute_epsv>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  %xmm1,%xmm0
movsd  0xec5(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<compute_epsv>:
mulsd  %xmm1,%xmm0
movsd  0xef4(%rip),%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @compute_epsv(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fneg double %5
%8 = call double @llvm.fmuladd.f64(double %7, double %6, double 1.000000e+00)
ret double %8
}

LLVM IR (-O2):
define double @compute_epsv(double %0, double %1) {
%3 = fneg double %0
%4 = tail call double @llvm.fmuladd.f64(double %3, double %1, double 1.000000e+00)
ret double %4
}
unsigned xrop3_150_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = T ^ S;
  stk1 = D ^ stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_150_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_150_1_1>:
mov    $0xff,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_150_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %7
%23 = load i32, i32* %6
%24 = xor i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %5
%26 = load i32, i32* %9
%27 = xor i32 %25, %26
store i32 %27, i32* %8
%28 = load i32, i32* %8
%29 = load i32, i32* %6
%30 = xor i32 %29, -1
%31 = and i32 %28, %30
%32 = load i32, i32* %7
%33 = xor i32 %32, -1
%34 = and i32 %31, %33
%35 = load i32, i32* %5
%36 = load i32, i32* %6
%37 = and i32 %35, %36
%38 = or i32 %34, %37
%39 = load i32, i32* %5
%40 = load i32, i32* %7
%41 = and i32 %39, %40
%42 = or i32 %38, %41
ret i32 %42
}

LLVM IR (-O2):
define i32 @xrop3_150_1_1(i8 zeroext %0, i8 zeroext %1) {
ret i32 255
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ ispunct(int);
void t_ispunct_0xc2() {
  Assert_real((ispunct(194) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_ispunct.c",
              975, ("ispunct should be 0 for 0xc2"));
}


x86 assembly (clang, -O0):
<t_ispunct_0xc2>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc2,%edi
call   1030 <ispunct@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3cf,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_ispunct_0xc2>:
push   %rax
mov    $0xc2,%edi
call   1030 <ispunct@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3cf,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0xc2\00"
define void @t_ispunct_0xc2() {
%1 = call i64 @ispunct(i32 194)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 975, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0xc2\00"
define void @t_ispunct_0xc2() {
%1 = tail call i64 @ispunct(i32 194)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 975, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pr_info(char *, int);
int sci_get_chip_id();
int soc_id_is_sc8735v0(void) {
  pr_info("chip id is %x\n", sci_get_chip_id());
  return ((sci_get_chip_id() & (0xFFFFFFFF)) == ((0x8300aaaa) & (0xFFFFFFFF)));
}


x86 assembly (clang, -O0):
<soc_id_is_sc8735v0>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <sci_get_chip_id@plt>
mov    %eax,%esi
lea    0xecc(%rip),%rdi
call   1030 <pr_info@plt>
mov    $0x0,%al
call   1040 <sci_get_chip_id@plt>
and    $0xffffffff,%eax
cmp    $0x8300aaaa,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<soc_id_is_sc8735v0>:
push   %rax
xor    %eax,%eax
call   1040 <sci_get_chip_id@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <pr_info@plt>
xor    %eax,%eax
call   1040 <sci_get_chip_id@plt>
xor    %ecx,%ecx
cmp    $0x8300aaaa,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"chip id is %x\0A\00"
define i32 @soc_id_is_sc8735v0() {
%1 = call i32 (...) @sci_get_chip_id()
%2 = call i32 @pr_info(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = call i32 (...) @sci_get_chip_id()
%4 = and i32 %3, -1
%5 = icmp eq i32 %4, -2097108310
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
@.str = [15 x i8] c"chip id is %x\0A\00"
define i32 @soc_id_is_sc8735v0() {
%1 = tail call i32 (...) @sci_get_chip_id()
%2 = tail call i32 @pr_info(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 (...) @sci_get_chip_id()
%4 = icmp eq i32 %3, -2097108310
%5 = zext i1 %4 to i32
ret i32 %5
}
void carmen_serial_setrts(int fd __attribute__((unused))) {}


x86 assembly (clang, -O0):
<carmen_serial_setrts>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<carmen_serial_setrts>:
ret

LLVM IR (-O0):
define void @carmen_serial_setrts(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @carmen_serial_setrts(i32 %0) {
ret void
}
void PR24718(void) {
  enum PR24718_2 { pr24718 };
}


x86 assembly (clang, -O0):
<PR24718>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PR24718>:
ret

LLVM IR (-O0):
define void @PR24718() {
ret void
}

LLVM IR (-O2):
define void @PR24718() {
ret void
}
int test_imm_DAuint8_mem(unsigned char *val) {
  return ((*val) & (-0xDA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DAuint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffff26,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DAuint8_mem>:
testb  $0x26,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DAuint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -218
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_DAuint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 38
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
float acos(float x) { return ((native_acos(x)) * 57.2957795131f); }


x86 assembly (clang, -O0):
<acos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
mov    $0x1,%al
call   1030 <native_acos@plt>
cvtsi2ss %eax,%xmm0
movss  0xec7(%rip),%xmm1
mulss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acos>:
push   %rax
cvtss2sd %xmm0,%xmm0
mov    $0x1,%al
call   1030 <native_acos@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %eax,%xmm0
mulss  0xed5(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @acos(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = call i32 (double, ...) bitcast (i32 (...)* @native_acos to i32 (double, ...)*)(double %4)
%6 = sitofp i32 %5 to float
%7 = fmul float %6, 0x404CA5DC20000000
ret float %7
}

LLVM IR (-O2):
define float @acos(float %0) {
%2 = fpext float %0 to double
%3 = tail call i32 (double, ...) bitcast (i32 (...)* @native_acos to i32 (double, ...)*)(double %2)
%4 = sitofp i32 %3 to float
%5 = fmul float %4, 0x404CA5DC20000000
ret float %5
}
/* Variables and functions */
int /*<<< orphan*/ set_linux_file_name(char *);
int /*<<< orphan*/ tcp_compound_register();
void module_register(void) {
  tcp_compound_register();
  set_linux_file_name("tcp_vegas.c");
}


x86 assembly (clang, -O0):
<module_register>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <tcp_compound_register@plt>
lea    0xece(%rip),%rdi
call   1040 <set_linux_file_name@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<module_register>:
push   %rax
xor    %eax,%eax
call   1030 <tcp_compound_register@plt>
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1040 <set_linux_file_name@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"tcp_vegas.c\00"
define void @module_register() {
%1 = call i32 (...) @tcp_compound_register()
%2 = call i32 @set_linux_file_name(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"tcp_vegas.c\00"
define void @module_register() {
%1 = tail call i32 (...) @tcp_compound_register()
%2 = tail call i32 @set_linux_file_name(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void hide_cursor() { printf("\e[?25l"); }


x86 assembly (clang, -O0):
<hide_cursor>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hide_cursor>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"\1B[?25l\00"
define void @hide_cursor() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"\1B[?25l\00"
define void @hide_cursor() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ INT_MIN;
unsigned int test1u(unsigned int x) { return x ^ (unsigned int)INT_MIN; }


x86 assembly (clang, -O0):
<test1u>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ed7(%rip),%rcx
mov    (%rcx),%rcx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1u>:
mov    %edi,%eax
mov    0x2edf(%rip),%rcx
xor    (%rcx),%eax
ret

LLVM IR (-O0):
@INT_MIN = global i64 0
define i32 @test1u(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i64, i64* @INT_MIN
%5 = trunc i64 %4 to i32
%6 = xor i32 %3, %5
ret i32 %6
}

LLVM IR (-O2):
@INT_MIN = global i64 0
define i32 @test1u(i32 %0) {
%2 = load i64, i64* @INT_MIN
%3 = trunc i64 %2 to i32
%4 = xor i32 %3, %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ CPUwfi();
void PRCMSleepEnter() { CPUwfi(); }


x86 assembly (clang, -O0):
<PRCMSleepEnter>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <CPUwfi@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PRCMSleepEnter>:
xor    %eax,%eax
jmp    1030 <CPUwfi@plt>

LLVM IR (-O0):
define void @PRCMSleepEnter() {
%1 = call i32 (...) @CPUwfi()
ret void
}

LLVM IR (-O2):
define void @PRCMSleepEnter() {
%1 = tail call i32 (...) @CPUwfi()
ret void
}
/* Type definitions */
typedef scalar_t__ const wchar_t;

/* Variables and functions */
wchar_t *wcschr(const wchar_t *wcs, wchar_t wc) {
  for (; *wcs; ++wcs)
    if (*wcs == wc)
      return (wchar_t *)wcs;
  return 0;
}


x86 assembly (clang, -O0):
<wcschr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
je     114e <wcschr+0x4e>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
cmp    -0x18(%rbp),%rax
jne    1138 <wcschr+0x38>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1156 <wcschr+0x56>
jmp    113d <wcschr+0x3d>
mov    -0x10(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x10(%rbp)
jmp    110c <wcschr+0xc>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcschr>:
mov    (%rdi),%rcx
test   %rcx,%rcx
je     1122 <wcschr+0x22>
mov    %rdi,%rax
nopl   0x0(%rax,%rax,1)
cmp    %rsi,%rcx
je     1124 <wcschr+0x24>
mov    0x8(%rax),%rcx
add    $0x8,%rax
test   %rcx,%rcx
jne    1110 <wcschr+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64* @wcschr(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64*
%5 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
br label %6
6: ; preds = %18, %2
%7 = load i64*, i64** %4
%8 = load i64, i64* %7
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = load i64*, i64** %4
%12 = load i64, i64* %11
%13 = load i64, i64* %5
%14 = icmp eq i64 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %10
%16 = load i64*, i64** %4
store i64* %16, i64** %3
br label %22
17: ; preds = %10
br label %18
18: ; preds = %17
%19 = load i64*, i64** %4
%20 = getelementptr inbounds i64, i64* %19, i32 1
store i64* %20, i64** %4
br label %6
21: ; preds = %6
store i64* null, i64** %3
br label %22
22: ; preds = %21, %15
%23 = load i64*, i64** %3
ret i64* %23
}

LLVM IR (-O2):
define i64* @wcschr(i64* %0, i64 %1) {
%3 = load i64, i64* %0
%4 = icmp eq i64 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %9
%6 = phi i64 [ %11, %9 ], [ %3, %2 ]
%7 = phi i64* [ %10, %9 ], [ %0, %2 ]
%8 = icmp eq i64 %6, %1
br i1 %8, label %13, label %9
9: ; preds = %5
%10 = getelementptr inbounds i64, i64* %7, i64 1
%11 = load i64, i64* %10
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %9, %2
%14 = phi i64* [ null, %2 ], [ null, %9 ], [ %7, %5 ]
ret i64* %14
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ AF_INET;
int /*<<< orphan*/ inet_pton(int /*<<< orphan*/, char *, int /*<<< orphan*/ *);
int /*<<< orphan*/ ntohl(int /*<<< orphan*/);
int rule_parse_ip(uint32_t *ip, char *line) {
  if (!inet_pton(AF_INET, line, ip))
    return -1;
  *ip = ntohl(*ip);
  return 0;
}


x86 assembly (clang, -O0):
<rule_parse_ip>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
mov    -0x18(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <inet_pton@plt>
cmp    $0x0,%eax
jne    115b <rule_parse_ip+0x3b>
movl   $0xffffffff,-0x4(%rbp)
jmp    1175 <rule_parse_ip+0x55>
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
call   1040 <ntohl@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rule_parse_ip>:
push   %rbx
mov    %rdi,%rbx
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    %rbx,%rdx
call   1030 <inet_pton@plt>
test   %eax,%eax
je     1146 <rule_parse_ip+0x26>
mov    (%rbx),%edi
call   1040 <ntohl@plt>
mov    %eax,(%rbx)
xor    %eax,%eax
pop    %rbx
ret
mov    $0xffffffff,%eax
pop    %rbx
ret

LLVM IR (-O0):
@AF_INET = global i32 0
define i32 @rule_parse_ip(i32* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i8*
store i32* %0, i32** %4
store i8* %1, i8** %5
%6 = load i32, i32* @AF_INET
%7 = load i8*, i8** %5
%8 = load i32*, i32** %4
%9 = call i32 @inet_pton(i32 %6, i8* %7, i32* %8)
%10 = icmp ne i32 %9, 0
br i1 %10, label %12, label %11
11: ; preds = %2
store i32 -1, i32* %3
br label %17
12: ; preds = %2
%13 = load i32*, i32** %4
%14 = load i32, i32* %13
%15 = call i32 @ntohl(i32 %14)
%16 = load i32*, i32** %4
store i32 %15, i32* %16
store i32 0, i32* %3
br label %17
17: ; preds = %12, %11
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
@AF_INET = global i32 0
define i32 @rule_parse_ip(i32* %0, i8* %1) {
%3 = load i32, i32* @AF_INET
%4 = tail call i32 @inet_pton(i32 %3, i8* %1, i32* %0)
%5 = icmp eq i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %2
%7 = load i32, i32* %0
%8 = tail call i32 @ntohl(i32 %7)
store i32 %8, i32* %0
br label %9
9: ; preds = %2, %6
%10 = phi i32 [ 0, %6 ], [ -1, %2 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ callrts(char *);
asr() { callrts("ccasr"); }


x86 assembly (clang, -O0):
<asr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <callrts@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<asr>:
lea    0xee9(%rip),%rdi
jmp    1030 <callrts@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"ccasr\00"
define i32 @asr() {
%1 = alloca i32
%2 = call i32 @callrts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [6 x i8] c"ccasr\00"
define i32 @asr() {
%1 = tail call i32 @callrts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
void set_64(uint64_t *p, uint64_t v) { *p = v; }


x86 assembly (clang, -O0):
<set_64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_64>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @set_64(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
store i32 %5, i32* %6
ret void
}

LLVM IR (-O2):
define void @set_64(i32* nocapture writeonly %0, i32 %1) {
store i32 %1, i32* %0
ret void
}
/* Variables and functions */
char *malloc(int);
int rand();
char *realloc(char *, int);
int /*<<< orphan*/ strcpy(char *, char *);
char *fn61() {
  char *result;
  result = malloc(20 + rand() % 20);
  result = realloc(result, 30 + rand() % 20);
  strcpy((char *)result, "fn61");
  return result;
}


x86 assembly (clang, -O0):
<fn61>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1060 <rand@plt>
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    %edx,%edi
add    $0x14,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1060 <rand@plt>
mov    -0x10(%rbp),%rdi
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    %edx,%esi
add    $0x1e,%esi
call   1050 <realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xe67(%rip),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn61>:
push   %rbx
xor    %eax,%eax
call   1060 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%edi
add    $0x14,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1060 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%esi
add    $0x1e,%esi
mov    %rbx,%rdi
call   1050 <realloc@plt>
mov    %rax,%rbx
lea    0xe4f(%rip),%rsi
mov    %rax,%rdi
call   1030 <strcpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"fn61\00"
define i8* @fn61() {
%1 = alloca i8*
%2 = call i32 (...) @rand()
%3 = srem i32 %2, 20
%4 = add nsw i32 20, %3
%5 = call i8* @malloc(i32 %4)
store i8* %5, i8** %1
%6 = load i8*, i8** %1
%7 = call i32 (...) @rand()
%8 = srem i32 %7, 20
%9 = add nsw i32 30, %8
%10 = call i8* @realloc(i8* %6, i32 %9)
store i8* %10, i8** %1
%11 = load i8*, i8** %1
%12 = call i32 @strcpy(i8* %11, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%13 = load i8*, i8** %1
ret i8* %13
}

LLVM IR (-O2):
@.str = [5 x i8] c"fn61\00"
define i8* @fn61() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 20
%3 = add nsw i32 %2, 20
%4 = tail call i8* @malloc(i32 %3)
%5 = tail call i32 (...) @rand()
%6 = srem i32 %5, 20
%7 = add nsw i32 %6, 30
%8 = tail call i8* @realloc(i8* %4, i32 %7)
%9 = tail call i32 @strcpy(i8* %8, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i8* %8
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int msgsnd(int, void const *, size_t, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
void enviarmsgq(int id, const void *msgp, size_t msgsz) {
  if (msgsnd(id, msgp, msgsz - sizeof(long), 0) == -1) {
    perror("No se puede enviar el mensaje");
    exit(-1);
  }
}


x86 assembly (clang, -O0):
<enviarmsgq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
sub    $0x8,%rdx
xor    %ecx,%ecx
call   1030 <msgsnd@plt>
cmp    $0xffffffff,%eax
jne    1178 <enviarmsgq+0x48>
lea    0xe97(%rip),%rdi
call   1040 <perror@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<enviarmsgq>:
push   %rax
add    $0xfffffffffffffff8,%rdx
xor    %ecx,%ecx
call   1030 <msgsnd@plt>
cmp    $0xffffffff,%eax
je     1143 <enviarmsgq+0x13>
pop    %rax
ret
lea    0xeb6(%rip),%rdi
call   1040 <perror@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [30 x i8] c"No se puede enviar el mensaje\00"
define void @enviarmsgq(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = sub i64 %9, 8
%11 = call i32 @msgsnd(i32 %7, i8* %8, i64 %10, i32 0)
%12 = icmp eq i32 %11, -1
br i1 %12, label %13, label %16
13: ; preds = %3
%14 = call i32 @perror(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%15 = call i32 @exit(i32 -1)
unreachable
16: ; preds = %3
ret void
}

LLVM IR (-O2):
@.str = [30 x i8] c"No se puede enviar el mensaje\00"
define void @enviarmsgq(i32 %0, i8* %1, i64 %2) {
%4 = add i64 %2, -8
%5 = tail call i32 @msgsnd(i32 %0, i8* %1, i64 %4, i32 0)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = tail call i32 @perror(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%9 = tail call i32 @exit(i32 -1)
unreachable
10: ; preds = %3
ret void
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int solcon_read_quaddobl_solutions(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc(390, a, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_read_quaddobl_solutions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x186,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_read_quaddobl_solutions>:
mov    $0x186,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @solcon_read_quaddobl_solutions() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 390, i32* %5, i32* %6, double* %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @solcon_read_quaddobl_solutions() {
%1 = tail call i32 @_ada_use_c2phc(i32 390, i32* undef, i32* undef, double* undef)
ret i32 %1
}
/* Variables and functions */
int rand();
int main(int argc, char **argv) {
  int x = rand();
  return x << 3;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
shl    $0x3,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
shl    $0x3,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 (...) @rand()
store i32 %7, i32* %6
%8 = load i32, i32* %6
%9 = shl i32 %8, 3
ret i32 %9
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @rand()
%4 = shl i32 %3, 3
ret i32 %4
}
int utf8_is_byte1(unsigned char c) {
  if (!(c & 0x80))
    return 1;
  return (c & 0xc0) != 0x80;
}


x86 assembly (clang, -O0):
<utf8_is_byte1>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
jne    1128 <utf8_is_byte1+0x28>
movl   $0x1,-0x4(%rbp)
jmp    1141 <utf8_is_byte1+0x41>
movzbl -0x5(%rbp),%eax
and    $0xc0,%eax
cmp    $0x80,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utf8_is_byte1>:
and    $0xc0,%dil
xor    %eax,%eax
cmp    $0x80,%dil
setne  %al
ret

LLVM IR (-O0):
define i32 @utf8_is_byte1(i8 zeroext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 128
%7 = icmp ne i32 %6, 0
br i1 %7, label %9, label %8
8: ; preds = %1
store i32 1, i32* %2
br label %15
9: ; preds = %1
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = and i32 %11, 192
%13 = icmp ne i32 %12, 128
%14 = zext i1 %13 to i32
store i32 %14, i32* %2
br label %15
15: ; preds = %9, %8
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @utf8_is_byte1(i8 zeroext %0) {
%2 = and i8 %0, -64
%3 = icmp ne i8 %2, -128
%4 = zext i1 %3 to i32
ret i32 %4
}
max(int aa, int bb) {
  if (aa > bb)
    return (aa);
  else
    return (bb);
}


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1121 <max+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <max+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @max(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @max(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
scalar_t__ Char_2d_array(int, int);
void ***Pointer_2d_array(int i_size, int j_size) {
  return ((void ***)Char_2d_array(i_size, j_size * sizeof(void *)));
}


x86 assembly (clang, -O0):
<Pointer_2d_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
movslq -0x8(%rbp),%rax
shl    $0x3,%rax
mov    %eax,%esi
call   1030 <Char_2d_array@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Pointer_2d_array>:
shl    $0x3,%esi
jmp    1030 <Char_2d_array@plt>

LLVM IR (-O0):
define i8*** @Pointer_2d_array(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = mul i64 %7, 8
%9 = trunc i64 %8 to i32
%10 = call i64 @Char_2d_array(i32 %5, i32 %9)
%11 = inttoptr i64 %10 to i8***
ret i8*** %11
}

LLVM IR (-O2):
define i8*** @Pointer_2d_array(i32 %0, i32 %1) {
%3 = shl i32 %1, 3
%4 = tail call i64 @Char_2d_array(i32 %0, i32 %3)
%5 = inttoptr i64 %4 to i8***
ret i8*** %5
}
/* Variables and functions */
int /*<<< orphan*/ gmx_principal(int, char **);
int main(int argc, char *argv[]) {
  gmx_principal(argc, argv);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <gmx_principal@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <gmx_principal@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @gmx_principal(i32 %6, i8** %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @gmx_principal(i32 %0, i8** %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ execve(char *, char **, int /*<<< orphan*/);
int /*<<< orphan*/ setuid(int /*<<< orphan*/);
int main(int argc, char **argv) {
  setuid(0);
  execve(argv[1], (argc > 1) ? argv + 1 : 0, 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
call   1040 <setuid@plt>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rax
mov    %rax,-0x18(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    1164 <main+0x44>
mov    -0x10(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x20(%rbp)
jmp    116f <main+0x4f>
xor    %eax,%eax
mov    %rax,-0x20(%rbp)
jmp    116f <main+0x4f>
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
xor    %edx,%edx
call   1030 <execve@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %edi,%ebp
xor    %r14d,%r14d
xor    %edi,%edi
call   1040 <setuid@plt>
mov    0x8(%rbx),%rdi
add    $0x8,%rbx
cmp    $0x2,%ebp
cmovl  %r14,%rbx
mov    %rbx,%rsi
xor    %edx,%edx
call   1030 <execve@plt>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @setuid(i32 0)
%7 = load i8**, i8*** %5
%8 = getelementptr inbounds i8*, i8** %7, i64 1
%9 = load i8*, i8** %8
%10 = load i32, i32* %4
%11 = icmp sgt i32 %10, 1
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = load i8**, i8*** %5
%14 = getelementptr inbounds i8*, i8** %13, i64 1
br label %16
15: ; preds = %2
br label %16
16: ; preds = %15, %12
%17 = phi i8** [ %14, %12 ], [ null, %15 ]
%18 = call i32 @execve(i8* %9, i8** %17, i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @setuid(i32 0)
%4 = getelementptr inbounds i8*, i8** %1, i64 1
%5 = load i8*, i8** %4
%6 = icmp sgt i32 %0, 1
%7 = select i1 %6, i8** %4, i8** null
%8 = tail call i32 @execve(i8* %5, i8** %7, i32 0)
ret i32 0
}
/* Type definitions */
struct vec2i {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ vec2i_distance_squared(int /*<<< orphan*/ *,
                                          int /*<<< orphan*/ *);
__attribute__((always_)) int32_t psvec2i_distance_squared(struct vec2i *a,
                                                          struct vec2i *b) {
  return vec2i_distance_squared((int32_t *)a, (int32_t *)b);
}


x86 assembly (clang, -O0):
<psvec2i_distance_squared>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <vec2i_distance_squared@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec2i_distance_squared>:
jmp    1030 <vec2i_distance_squared@plt>

LLVM IR (-O0):
%struct.vec2i = type { i32 }
define i32 @psvec2i_distance_squared(%struct.vec2i* %0, %struct.vec2i* %1) {
%3 = alloca %struct.vec2i*
%4 = alloca %struct.vec2i*
store %struct.vec2i* %0, %struct.vec2i** %3
store %struct.vec2i* %1, %struct.vec2i** %4
%5 = load %struct.vec2i*, %struct.vec2i** %3
%6 = bitcast %struct.vec2i* %5 to i32*
%7 = load %struct.vec2i*, %struct.vec2i** %4
%8 = bitcast %struct.vec2i* %7 to i32*
%9 = call i32 @vec2i_distance_squared(i32* %6, i32* %8)
ret i32 %9
}

LLVM IR (-O2):
%struct.vec2i = type { i32 }
define i32 @psvec2i_distance_squared(%struct.vec2i* %0, %struct.vec2i* %1) {
%3 = getelementptr %struct.vec2i, %struct.vec2i* %0, i64 0, i32 0
%4 = getelementptr %struct.vec2i, %struct.vec2i* %1, i64 0, i32 0
%5 = tail call i32 @vec2i_distance_squared(i32* %3, i32* %4)
ret i32 %5
}
/* Type definitions */
typedef scalar_t__ RAND_MAX;

/* Variables and functions */
scalar_t__ rand();
int rollDie(int min, int max) {
  double r;
  double x;
  r = ((double)rand() / ((double)(RAND_MAX) + (double)(1)));
  x = (r * max);
  return (int)x + min;
}


x86 assembly (clang, -O0):
<rollDie>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
movsd  0xece(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
cvtsi2sdl -0x8(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
cvttsd2si -0x18(%rbp),%eax
add    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rollDie>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
cvtsi2sd %ebx,%xmm1
mulsd  %xmm0,%xmm1
cvttsd2si %xmm1,%eax
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @rollDie(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca double
%6 = alloca double
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = call i64 (...) @rand()
%8 = sitofp i64 %7 to double
%9 = fdiv double %8, 1.000000e+00
store double %9, double* %5
%10 = load double, double* %5
%11 = load i32, i32* %4
%12 = sitofp i32 %11 to double
%13 = fmul double %10, %12
store double %13, double* %6
%14 = load double, double* %6
%15 = fptosi double %14 to i32
%16 = load i32, i32* %3
%17 = add nsw i32 %15, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @rollDie(i32 %0, i32 %1) {
%3 = tail call i64 (...) @rand()
%4 = sitofp i64 %3 to double
%5 = sitofp i32 %1 to double
%6 = fmul double %5, %4
%7 = fptosi double %6 to i32
%8 = add nsw i32 %7, %0
ret i32 %8
}
/* Variables and functions */
scalar_t__ ispunct(int);
scalar_t__ isspace(int);
bool mapred_ischar_delim(int c) { return isspace(c) || ispunct(c); }


x86 assembly (clang, -O0):
<mapred_ischar_delim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <isspace@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1157 <mapred_ischar_delim+0x37>
mov    -0x4(%rbp),%edi
call   1030 <ispunct@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mapred_ischar_delim>:
push   %rbx
mov    %edi,%ebx
call   1040 <isspace@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <mapred_ischar_delim+0x17>
pop    %rbx
ret
mov    %ebx,%edi
call   1030 <ispunct@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @mapred_ischar_delim(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @isspace(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i64 @ispunct(i32 %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @mapred_ischar_delim(i32 %0) {
%2 = tail call i64 @isspace(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @ispunct(i32 %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
int fun1264() { return 1264; }


x86 assembly (clang, -O0):
<fun1264>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4f0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1264>:
mov    $0x4f0,%eax
ret

LLVM IR (-O0):
define i32 @fun1264() {
ret i32 1264
}

LLVM IR (-O2):
define i32 @fun1264() {
ret i32 1264
}
double CMtoIN(double CM) { return CM / 2.54; }


x86 assembly (clang, -O0):
<CMtoIN>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<CMtoIN>:
divsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @CMtoIN(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 2.540000e+00
ret double %4
}

LLVM IR (-O2):
define double @CMtoIN(double %0) {
%2 = fdiv double %0, 2.540000e+00
ret double %2
}