xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void addition(int x, int y) { printf("%i\n", (x + y)); }


x86 assembly (clang, -O0):
<addition>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
add    -0x8(%rbp),%esi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<addition>:
add    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%i\0A\00"
define void @addition(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%i\0A\00"
define void @addition(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void help(char *argv0) {
  fprintf(stderr,
          "%s - Set the LARGE_ADDRESS_AWARE in PE files.\n\n"
          "This make 32 bit PE executable able to use more virtual memory.\n"
          "However, some of them will not work correctly with this flag.\n",
          argv0);
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<help>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [174 x i8] c"%s - Set the LARGE_ADDRESS_AWARE in PE files.\0A\0AThis make 32 bit PE executable able to use more virtual memory.\0AHowever, some of them will not work correctly with this flag.\0A\00"
define void @help(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([174 x i8], [174 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [174 x i8] c"%s - Set the LARGE_ADDRESS_AWARE in PE files.\0A\0AThis make 32 bit PE executable able to use more virtual memory.\0AHowever, some of them will not work correctly with this flag.\0A\00"
define void @help(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([174 x i8], [174 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
char const *__PHYSFS_getUserDir();
const char *PHYSFS_getUserDir(void) { return __PHYSFS_getUserDir(); }


x86 assembly (clang, -O0):
<PHYSFS_getUserDir>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__PHYSFS_getUserDir@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PHYSFS_getUserDir>:
xor    %eax,%eax
jmp    1030 <__PHYSFS_getUserDir@plt>

LLVM IR (-O0):
define i8* @PHYSFS_getUserDir() {
%1 = call i8* (...) @__PHYSFS_getUserDir()
ret i8* %1
}

LLVM IR (-O2):
define i8* @PHYSFS_getUserDir() {
%1 = tail call i8* (...) @__PHYSFS_getUserDir()
ret i8* %1
}
void drm_debugfs_connector_remove(struct drm_connector *connector) {}


x86 assembly (clang, -O0):
<drm_debugfs_connector_remove>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<drm_debugfs_connector_remove>:
ret

LLVM IR (-O0):
%struct.drm_connector = type opaque
define void @drm_debugfs_connector_remove(%struct.drm_connector* %0) {
%2 = alloca %struct.drm_connector*
store %struct.drm_connector* %0, %struct.drm_connector** %2
ret void
}

LLVM IR (-O2):
%struct.drm_connector = type opaque
define void @drm_debugfs_connector_remove(%struct.drm_connector* nocapture %0) {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
__attribute__((always_)) uint32_t detexPixel32GetR8(uint32_t pixel) {
  return pixel & 0xFF;
}


x86 assembly (clang, -O0):
<detexPixel32GetR8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<detexPixel32GetR8>:
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @detexPixel32GetR8(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
ret i32 %4
}

LLVM IR (-O2):
define i32 @detexPixel32GetR8(i32 %0) {
%2 = and i32 %0, 255
ret i32 %2
}
void motor(int motor, int percent) {}


x86 assembly (clang, -O0):
<motor>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<motor>:
ret

LLVM IR (-O0):
define void @motor(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @motor(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int access(const char *pathname, int mode) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<access>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2ed6(%rip),%rax
mov    (%rax),%ecx
mov    0x2ebd(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<access>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @access(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @ENOSYS
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @access(i8* nocapture readnone %0, i32 %1) {
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}
int g4(int a) { return a - 256; }


x86 assembly (clang, -O0):
<g4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x100,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g4>:
lea    -0x100(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @g4(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 %3, 256
ret i32 %4
}

LLVM IR (-O2):
define i32 @g4(i32 %0) {
%2 = add nsw i32 %0, -256
ret i32 %2
}
RX0AX1(r0, r1, x0, x1, p0, p1) unsigned char r0, r1;
unsigned char *p0, *p1;
{
  if ((p0[x0]) <= (((unsigned char *)11111111)[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<RX0AX1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %dil,%sil
mov    %sil,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
movzbl (%rax,%rcx,1),%eax
movslq -0x10(%rbp),%rdx
mov    $0xa98ac7,%ecx
movzbl (%rcx,%rdx,1),%ecx
cmp    %ecx,%eax
jg     114b <RX0AX1+0x4b>
movl   $0x1,-0x4(%rbp)
jmp    1152 <RX0AX1+0x52>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RX0AX1>:
movslq %edx,%rax
mov    (%r8,%rax,1),%dl
movslq %ecx,%rcx
xor    %eax,%eax
cmp    0xa98ac7(%rcx),%dl
setbe  %al
ret

LLVM IR (-O0):
define i32 @RX0AX1(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4, i8* %5) {
%7 = alloca i32
%8 = alloca i8
%9 = alloca i8
%10 = alloca i32
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i8*
%14 = trunc i32 %0 to i8
%15 = trunc i32 %1 to i8
store i8 %14, i8* %8
store i8 %15, i8* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i8* %4, i8** %12
store i8* %5, i8** %13
%16 = load i8*, i8** %12
%17 = load i32, i32* %10
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
%20 = load i8, i8* %19
%21 = zext i8 %20 to i32
%22 = load i32, i32* %11
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* inttoptr (i64 11111111 to i8*), i64 %23
%25 = load i8, i8* %24
%26 = zext i8 %25 to i32
%27 = icmp sle i32 %21, %26
br i1 %27, label %28, label %29
28: ; preds = %6
store i32 1, i32* %7
br label %30
29: ; preds = %6
store i32 0, i32* %7
br label %30
30: ; preds = %29, %28
%31 = load i32, i32* %7
ret i32 %31
}

LLVM IR (-O2):
define i32 @RX0AX1(i32 %0, i32 %1, i32 %2, i32 %3, i8* nocapture %4, i8* nocapture readnone %5) {
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i8, i8* %4, i64 %7
%9 = load i8, i8* %8
%10 = sext i32 %3 to i64
%11 = getelementptr inbounds i8, i8* inttoptr (i64 11111111 to i8*), i64 %10
%12 = load i8, i8* %11
%13 = icmp ule i8 %9, %12
%14 = zext i1 %13 to i32
ret i32 %14
}
/* Variables and functions */
int bad3(int);
int opt0(void) { return bad3(1); }


x86 assembly (clang, -O0):
<opt0>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <bad3@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<opt0>:
mov    $0x1,%edi
jmp    1030 <bad3@plt>

LLVM IR (-O0):
define i32 @opt0() {
%1 = call i32 @bad3(i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @opt0() {
%1 = tail call i32 @bad3(i32 1)
ret i32 %1
}
/* Variables and functions */
float ANTweenTimingFunctionBounceInOut(float, int /*<<< orphan*/, int, float);
float ANTweenProgressTimingFunctionBounceInOut(float time, float duration) {
  return ANTweenTimingFunctionBounceInOut(time, 0, 1, duration);
}


x86 assembly (clang, -O0):
<ANTweenProgressTimingFunctionBounceInOut>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <ANTweenTimingFunctionBounceInOut@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ANTweenProgressTimingFunctionBounceInOut>:
xor    %edi,%edi
mov    $0x1,%esi
jmp    1030 <ANTweenTimingFunctionBounceInOut@plt>

LLVM IR (-O0):
define float @ANTweenProgressTimingFunctionBounceInOut(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call float @ANTweenTimingFunctionBounceInOut(float %5, i32 0, i32 1, float %6)
ret float %7
}

LLVM IR (-O2):
define float @ANTweenProgressTimingFunctionBounceInOut(float %0, float %1) {
%3 = tail call float @ANTweenTimingFunctionBounceInOut(float %0, i32 0, i32 1, float %1)
ret float %3
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMR81_set(void) { return U_WMRCORENONE_set("U_WMR81"); }


x86 assembly (clang, -O0):
<U_WMR81_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR81_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR81\00"
define i8* @U_WMR81_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR81\00"
define i8* @U_WMR81_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
int caam_qi_algapi_init(struct device *dev) { return 0; }


x86 assembly (clang, -O0):
<caam_qi_algapi_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<caam_qi_algapi_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.device = type opaque
define i32 @caam_qi_algapi_init(%struct.device* %0) {
%2 = alloca %struct.device*
store %struct.device* %0, %struct.device** %2
ret i32 0
}

LLVM IR (-O2):
%struct.device = type opaque
define i32 @caam_qi_algapi_init(%struct.device* nocapture readnone %0) {
ret i32 0
}
void lis3l02dq_uninitialize_ring(struct iio_ring_buffer *ring) {}


x86 assembly (clang, -O0):
<lis3l02dq_uninitialize_ring>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<lis3l02dq_uninitialize_ring>:
ret

LLVM IR (-O0):
%struct.iio_ring_buffer = type opaque
define void @lis3l02dq_uninitialize_ring(%struct.iio_ring_buffer* %0) {
%2 = alloca %struct.iio_ring_buffer*
store %struct.iio_ring_buffer* %0, %struct.iio_ring_buffer** %2
ret void
}

LLVM IR (-O2):
%struct.iio_ring_buffer = type opaque
define void @lis3l02dq_uninitialize_ring(%struct.iio_ring_buffer* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __u64;

/* Variables and functions */
int /*<<< orphan*/ hea_set_u64_bits(int /*<<< orphan*/, int /*<<< orphan*/, int,
                                    int);
void hea_cq_aer_cq_invalid_link_err_reset(__u64 *aer) {
  *aer = hea_set_u64_bits(*aer, 0, 1, 1);
}


x86 assembly (clang, -O0):
<hea_cq_aer_cq_invalid_link_err_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
xor    %esi,%esi
mov    $0x1,%ecx
mov    %ecx,%edx
call   1030 <hea_set_u64_bits@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hea_cq_aer_cq_invalid_link_err_reset>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%edi
xor    %esi,%esi
mov    $0x1,%edx
mov    $0x1,%ecx
call   1030 <hea_set_u64_bits@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @hea_cq_aer_cq_invalid_link_err_reset(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = call i32 @hea_set_u64_bits(i32 %4, i32 0, i32 1, i32 1)
%6 = load i32*, i32** %2
store i32 %5, i32* %6
ret void
}

LLVM IR (-O2):
define void @hea_cq_aer_cq_invalid_link_err_reset(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @hea_set_u64_bits(i32 %2, i32 0, i32 1, i32 1)
store i32 %3, i32* %0
ret void
}
/* Variables and functions */
int Scl_ConHasInCells_(int /*<<< orphan*/);
int /*<<< orphan*/ Scl_ConReadMan();
int Scl_ConHasInCells() { return Scl_ConHasInCells_(Scl_ConReadMan()); }


x86 assembly (clang, -O0):
<Scl_ConHasInCells>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <Scl_ConReadMan@plt>
mov    %eax,%edi
call   1030 <Scl_ConHasInCells_@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Scl_ConHasInCells>:
push   %rax
xor    %eax,%eax
call   1040 <Scl_ConReadMan@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <Scl_ConHasInCells_@plt>

LLVM IR (-O0):
define i32 @Scl_ConHasInCells() {
%1 = call i32 (...) @Scl_ConReadMan()
%2 = call i32 @Scl_ConHasInCells_(i32 %1)
ret i32 %2
}

LLVM IR (-O2):
define i32 @Scl_ConHasInCells() {
%1 = tail call i32 (...) @Scl_ConReadMan()
%2 = tail call i32 @Scl_ConHasInCells_(i32 %1)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ emulate_tempofn();
int /*<<< orphan*/ push_int(int /*<<< orphan*/);
void fn_tempofn(void) { push_int(emulate_tempofn()); }


x86 assembly (clang, -O0):
<fn_tempofn>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <emulate_tempofn@plt>
mov    %eax,%edi
call   1040 <push_int@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_tempofn>:
push   %rax
xor    %eax,%eax
call   1030 <emulate_tempofn@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <push_int@plt>

LLVM IR (-O0):
define void @fn_tempofn() {
%1 = call i32 (...) @emulate_tempofn()
%2 = call i32 @push_int(i32 %1)
ret void
}

LLVM IR (-O2):
define void @fn_tempofn() {
%1 = tail call i32 (...) @emulate_tempofn()
%2 = tail call i32 @push_int(i32 %1)
ret void
}
double SIM_power_sense_amp_tag_delay(inrisetime, outrisetime)
double inrisetime, *outrisetime;
{
  *outrisetime = (7e-10 * 0.0875);
  return ((2.6e-10 * 0.0875));
}


x86 assembly (clang, -O0):
<SIM_power_sense_amp_tag_delay>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsd  0xeef(%rip),%xmm0
movsd  %xmm0,(%rax)
movsd  0xedb(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<SIM_power_sense_amp_tag_delay>:
movabs $0x3dd0d615e8a0f102,%rax
d6 d0 3d
mov    %rax,(%rdi)
movsd  0xeeb(%rip),%xmm0
ret

LLVM IR (-O0):
define double @SIM_power_sense_amp_tag_delay(double %0, double* %1) {
%3 = alloca double
%4 = alloca double*
store double %0, double* %3
store double* %1, double** %4
%5 = load double*, double** %4
store double 6.125000e-11, double* %5
ret double 0x3DB9038E43AD48CF
}

LLVM IR (-O2):
define double @SIM_power_sense_amp_tag_delay(double %0, double* nocapture writeonly %1) {
store double 6.125000e-11, double* %1
ret double 0x3DB9038E43AD48CF
}
int BlockHeaderBytes(int bHasPts, int bHasDts) {
  return 14 + 6 + 3 + (bHasPts ? 5 : 0) + (bHasDts ? 5 : 0);
}


x86 assembly (clang, -O0):
<BlockHeaderBytes>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edx
xor    %eax,%eax
mov    $0x5,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
add    $0x17,%eax
mov    -0x8(%rbp),%esi
xor    %ecx,%ecx
mov    $0x5,%edx
cmp    $0x0,%esi
cmovne %edx,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BlockHeaderBytes>:
xor    %eax,%eax
test   %edi,%edi
setne  %al
lea    (%rax,%rax,4),%eax
xor    %ecx,%ecx
test   %esi,%esi
setne  %cl
lea    (%rcx,%rcx,4),%ecx
add    %ecx,%eax
add    $0x17,%eax
ret

LLVM IR (-O0):
define i32 @BlockHeaderBytes(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 5, i32 0
%9 = add nsw i32 23, %8
%10 = load i32, i32* %4
%11 = icmp ne i32 %10, 0
%12 = zext i1 %11 to i64
%13 = select i1 %11, i32 5, i32 0
%14 = add nsw i32 %9, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @BlockHeaderBytes(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
%4 = select i1 %3, i32 23, i32 28
%5 = icmp eq i32 %1, 0
%6 = select i1 %5, i32 0, i32 5
%7 = add nuw nsw i32 %6, %4
ret i32 %7
}
int __attribute__((target("arch=sandybridge"))) mv_after_use(void) { return 2; }


x86 assembly (clang, -O0):
<mv_after_use>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mv_after_use>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @mv_after_use() {
ret i32 2
}

LLVM IR (-O2):
define i32 @mv_after_use() {
ret i32 2
}
/* Type definitions */
typedef int /*<<< orphan*/ sqlite3;

/* Variables and functions */
int /*<<< orphan*/ sqlite3_close(int /*<<< orphan*/ *);
void db_sqlite3_disconnect(void *dbh) {
  if (dbh)
    sqlite3_close((sqlite3 *)dbh);
}


x86 assembly (clang, -O0):
<db_sqlite3_disconnect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <db_sqlite3_disconnect+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <sqlite3_close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<db_sqlite3_disconnect>:
test   %rdi,%rdi
je     111a <db_sqlite3_disconnect+0xa>
jmp    1030 <sqlite3_close@plt>
ret

LLVM IR (-O0):
define void @db_sqlite3_disconnect(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = bitcast i8* %6 to i32*
%8 = call i32 @sqlite3_close(i32* %7)
br label %9
9: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @db_sqlite3_disconnect(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = bitcast i8* %0 to i32*
%5 = tail call i32 @sqlite3_close(i32* %4)
br label %6
6: ; preds = %3, %1
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int is_in_same_page(uint32_t start, uint32_t size, uint32_t page) {
  if (!page)
    return 1;
  return (start / page) == (start + size - 1) / page;
}


x86 assembly (clang, -O0):
<is_in_same_page>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    1123 <is_in_same_page+0x23>
movl   $0x1,-0x4(%rbp)
jmp    114c <is_in_same_page+0x4c>
mov    -0x8(%rbp),%eax
cltd
idivl  -0x10(%rbp)
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
sub    $0x1,%eax
cltd
idivl  -0x10(%rbp)
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_in_same_page>:
test   %edx,%edx
je     1122 <is_in_same_page+0x22>
mov    %edx,%ecx
mov    %edi,%eax
cltd
idiv   %ecx
mov    %eax,%r8d
lea    (%rdi,%rsi,1),%eax
add    $0xffffffff,%eax
cltd
idiv   %ecx
mov    %eax,%ecx
xor    %eax,%eax
cmp    %ecx,%r8d
sete   %al
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_in_same_page(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %7
%9 = icmp ne i32 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %3
store i32 1, i32* %4
br label %23
11: ; preds = %3
%12 = load i32, i32* %5
%13 = load i32, i32* %7
%14 = sdiv i32 %12, %13
%15 = load i32, i32* %5
%16 = load i32, i32* %6
%17 = add nsw i32 %15, %16
%18 = sub nsw i32 %17, 1
%19 = load i32, i32* %7
%20 = sdiv i32 %18, %19
%21 = icmp eq i32 %14, %20
%22 = zext i1 %21 to i32
store i32 %22, i32* %4
br label %23
23: ; preds = %11, %10
%24 = load i32, i32* %4
ret i32 %24
}

LLVM IR (-O2):
define i32 @is_in_same_page(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %12, label %5
5: ; preds = %3
%6 = sdiv i32 %0, %2
%7 = add i32 %0, -1
%8 = add i32 %7, %1
%9 = sdiv i32 %8, %2
%10 = icmp eq i32 %6, %9
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %3, %5
%13 = phi i32 [ %11, %5 ], [ 1, %3 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void error_handler(void *reason) { printf("Hey ca va\n"); }


x86 assembly (clang, -O0):
<error_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<error_handler>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"Hey ca va\0A\00"
define void @error_handler(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [10 x i8] c"Hey ca va\00"
define void @error_handler(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0))
ret void
}
void main() {
  int i = 0;
  int j = 20;
  i = 10;
  j = i * i;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x14,-0x8(%rbp)
movl   $0xa,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 20, i32* %2
store i32 10, i32* %1
%3 = load i32, i32* %1
%4 = load i32, i32* %1
%5 = mul nsw i32 %3, %4
store i32 %5, i32* %2
ret void
}

LLVM IR (-O2):
define void @main() {
ret void
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ rmdir(char const *);
int dir_remove_action(const char *filename, struct stat *statbuf,
                      void *userdata, int depth) {
  rmdir(filename);
  return 1;
}


x86 assembly (clang, -O0):
<dir_remove_action>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <rmdir@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dir_remove_action>:
push   %rax
call   1030 <rmdir@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @dir_remove_action(i8* %0, %struct.stat* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca %struct.stat*
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store %struct.stat* %1, %struct.stat** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = call i32 @rmdir(i8* %9)
ret i32 1
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @dir_remove_action(i8* nocapture %0, %struct.stat* nocapture readnone %1, i8* nocapture readnone %2, i32 %3) {
%5 = tail call i32 @rmdir(i8* %0)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int, int, int);
const char *cJSON_Version(void) {
  static char version[15];
  sprintf(version, "%i.%i.%i", 1, 4, 6);
  return version;
}


x86 assembly (clang, -O0):
<cJSON_Version>:
push   %rbp
mov    %rsp,%rbp
lea    0x2f0e(%rip),%rdi
lea    0xede(%rip),%rsi
mov    $0x1,%edx
mov    $0x4,%ecx
mov    $0x6,%r8d
call   1030 <sprintf@plt>
lea    0x2eeb(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cJSON_Version>:
push   %rbx
lea    0x2f11(%rip),%rbx
lea    0xee1(%rip),%rsi
mov    %rbx,%rdi
mov    $0x1,%edx
mov    $0x4,%ecx
mov    $0x6,%r8d
call   1030 <sprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@cJSON_Version.version = internal global [15 x i8] zeroinitializer
@.str = [9 x i8] c"%i.%i.%i\00"
define i8* @cJSON_Version() {
%1 = call i32 @sprintf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @cJSON_Version.version, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 1, i32 4, i32 6)
ret i8* getelementptr inbounds ([15 x i8], [15 x i8]* @cJSON_Version.version, i64 0, i64 0)
}

LLVM IR (-O2):
@cJSON_Version.version = internal global [15 x i8] zeroinitializer
@.str = [9 x i8] c"%i.%i.%i\00"
define i8* @cJSON_Version() {
%1 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @cJSON_Version.version, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 1, i32 4, i32 6)
ret i8* getelementptr inbounds ([15 x i8], [15 x i8]* @cJSON_Version.version, i64 0, i64 0)
}
/* Variables and functions */
unsigned isalnum(char c) {
  return (c >= 'A' && c <= 'Z') || (c >= 'a' && c <= 'z') ||
         (c >= '0' && c <= '9');
}


x86 assembly (clang, -O0):
<isalnum>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x41,%eax
jl     1129 <isalnum+0x29>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x5a,%ecx
mov    %al,-0x2(%rbp)
jle    116d <isalnum+0x6d>
movsbl -0x1(%rbp),%eax
cmp    $0x61,%eax
jl     1148 <isalnum+0x48>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x7a,%ecx
mov    %al,-0x2(%rbp)
jle    116d <isalnum+0x6d>
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x3(%rbp)
jl     1167 <isalnum+0x67>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isalnum>:
mov    %edi,%eax
and    $0xdf,%al
add    $0xbf,%al
cmp    $0x1a,%al
setb   %al
add    $0xd0,%dil
cmp    $0xa,%dil
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @isalnum(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 65
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 90
br i1 %9, label %28, label %10
10: ; preds = %6, %1
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp sge i32 %12, 97
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp sle i32 %16, 122
br i1 %17, label %28, label %18
18: ; preds = %14, %10
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp sge i32 %20, 48
br i1 %21, label %22, label %26
22: ; preds = %18
%23 = load i8, i8* %2
%24 = sext i8 %23 to i32
%25 = icmp sle i32 %24, 57
br label %26
26: ; preds = %22, %18
%27 = phi i1 [ false, %18 ], [ %25, %22 ]
br label %28
28: ; preds = %26, %14, %6
%29 = phi i1 [ true, %14 ], [ true, %6 ], [ %27, %26 ]
%30 = zext i1 %29 to i32
ret i32 %30
}

LLVM IR (-O2):
define i32 @isalnum(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = add i8 %0, -48
%6 = icmp ult i8 %5, 10
%7 = or i1 %6, %4
%8 = zext i1 %7 to i32
ret i32 %8
}
double __VERIFIER_nondet_double() { return 0; }


x86 assembly (clang, -O0):
<__VERIFIER_nondet_double>:
push   %rbp
mov    %rsp,%rbp
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<__VERIFIER_nondet_double>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @__VERIFIER_nondet_double() {
ret double 0.000000e+00
}

LLVM IR (-O2):
define double @__VERIFIER_nondet_double() {
ret double 0.000000e+00
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int main(void) {
  char *path = "/etc/passwd";
  FILE *fp = fopen(path, "r");
  if (fp != NULL)
    fclose(fp);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xec7(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1162 <main+0x42>
mov    -0x18(%rbp),%rdi
call   1030 <fclose@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xedd(%rip),%rsi
call   1040 <fopen@plt>
test   %rax,%rax
je     1141 <main+0x21>
mov    %rax,%rdi
call   1030 <fclose@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"/etc/passwd\00"
@.str.1 = [2 x i8] c"r\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i32*
store i32 0, i32* %1
store i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8** %2
%4 = load i8*, i8** %2
%5 = call i32* @fopen(i8* %4, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = icmp ne i32* %6, null
br i1 %7, label %8, label %11
8: ; preds = %0
%9 = load i32*, i32** %3
%10 = call i32 @fclose(i32* %9)
br label %11
11: ; preds = %8, %0
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"/etc/passwd\00"
@.str.1 = [2 x i8] c"r\00"
define i32 @main() {
%1 = tail call i32* @fopen(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%2 = icmp eq i32* %1, null
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @fclose(i32* %1)
br label %5
5: ; preds = %3, %0
ret i32 0
}
void ConvertPath(char *path) {
  while (*path) {
    if (*path == '/' || *path == '\\')
      *path = '/';
    path++;
  }
}


x86 assembly (clang, -O0):
<ConvertPath>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     114d <ConvertPath+0x4d>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2f,%eax
je     1135 <ConvertPath+0x35>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x5c,%eax
jne    113c <ConvertPath+0x3c>
mov    -0x8(%rbp),%rax
movb   $0x2f,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <ConvertPath+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ConvertPath>:
jmp    1117 <ConvertPath+0x17>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movb   $0x2f,(%rdi)
add    $0x1,%rdi
movzbl (%rdi),%eax
cmp    $0x2f,%al
je     1110 <ConvertPath+0x10>
cmp    $0x5c,%al
je     1110 <ConvertPath+0x10>
test   %al,%al
jne    1113 <ConvertPath+0x13>
ret

LLVM IR (-O0):
define void @ConvertPath(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %19, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %22
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 47
br i1 %11, label %17, label %12
12: ; preds = %7
%13 = load i8*, i8** %2
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 92
br i1 %16, label %17, label %19
17: ; preds = %12, %7
%18 = load i8*, i8** %2
store i8 47, i8* %18
br label %19
19: ; preds = %17, %12
%20 = load i8*, i8** %2
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %2
br label %3
22: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @ConvertPath(i8* nocapture %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i8* [ %0, %1 ], [ %7, %6 ]
%4 = load i8, i8* %3
switch i8 %4, label %6 [
i8 0, label %8
i8 47, label %5
i8 92, label %5
]
5: ; preds = %2, %2
store i8 47, i8* %3
br label %6
6: ; preds = %2, %5
%7 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
8: ; preds = %2
ret void
}
/* Type definitions */
struct vec4i {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ vec4i_scale(int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                               float);
__attribute__((always_)) struct vec4i *
psvec4i_scale(struct vec4i *result, struct vec4i *a, float scalar) {
  vec4i_scale((int32_t *)result, (int32_t *)a, scalar);
  return result;
}


x86 assembly (clang, -O0):
<psvec4i_scale>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movss  -0x14(%rbp),%xmm0
call   1030 <vec4i_scale@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec4i_scale>:
push   %rbx
mov    %rdi,%rbx
call   1030 <vec4i_scale@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vec4i = type { i32 }
define %struct.vec4i* @psvec4i_scale(%struct.vec4i* %0, %struct.vec4i* %1, float %2) {
%4 = alloca %struct.vec4i*
%5 = alloca %struct.vec4i*
%6 = alloca float
store %struct.vec4i* %0, %struct.vec4i** %4
store %struct.vec4i* %1, %struct.vec4i** %5
store float %2, float* %6
%7 = load %struct.vec4i*, %struct.vec4i** %4
%8 = bitcast %struct.vec4i* %7 to i32*
%9 = load %struct.vec4i*, %struct.vec4i** %5
%10 = bitcast %struct.vec4i* %9 to i32*
%11 = load float, float* %6
%12 = call i32 @vec4i_scale(i32* %8, i32* %10, float %11)
%13 = load %struct.vec4i*, %struct.vec4i** %4
ret %struct.vec4i* %13
}

LLVM IR (-O2):
%struct.vec4i = type { i32 }
define %struct.vec4i* @psvec4i_scale(%struct.vec4i* returned %0, %struct.vec4i* %1, float %2) {
%4 = getelementptr %struct.vec4i, %struct.vec4i* %0, i64 0, i32 0
%5 = getelementptr %struct.vec4i, %struct.vec4i* %1, i64 0, i32 0
%6 = tail call i32 @vec4i_scale(i32* %4, i32* %5, float %2)
ret %struct.vec4i* %0
}
void platform_shutdown() {}


x86 assembly (clang, -O0):
<platform_shutdown>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<platform_shutdown>:
ret

LLVM IR (-O0):
define void @platform_shutdown() {
ret void
}

LLVM IR (-O2):
define void @platform_shutdown() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printSeven(long long);
int /*<<< orphan*/ printThree(long long);
int /*<<< orphan*/ printTwo(long long, int, int);
int main() {
  int control = 0;
  int mult = 2;
  long long res = 0000000001;
  printTwo(res, mult, control);
  printThree(res);
  printSeven(res);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
movq   $0x1,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x8(%rbp),%edx
call   1040 <printTwo@plt>
mov    -0x18(%rbp),%rdi
call   1030 <printThree@plt>
mov    -0x18(%rbp),%rdi
call   1050 <printSeven@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
mov    $0x2,%esi
xor    %edx,%edx
call   1040 <printTwo@plt>
mov    $0x1,%edi
call   1030 <printThree@plt>
mov    $0x1,%edi
call   1050 <printSeven@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i64
store i32 0, i32* %1
store i32 0, i32* %2
store i32 2, i32* %3
store i64 1, i64* %4
%5 = load i64, i64* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = call i32 @printTwo(i64 %5, i32 %6, i32 %7)
%9 = load i64, i64* %4
%10 = call i32 @printThree(i64 %9)
%11 = load i64, i64* %4
%12 = call i32 @printSeven(i64 %11)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @printTwo(i64 1, i32 2, i32 0)
%2 = tail call i32 @printThree(i64 1)
%3 = tail call i32 @printSeven(i64 1)
ret i32 0
}
void restorecrtmode() {}


x86 assembly (clang, -O0):
<restorecrtmode>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<restorecrtmode>:
ret

LLVM IR (-O0):
define void @restorecrtmode() {
ret void
}

LLVM IR (-O2):
define void @restorecrtmode() {
ret void
}
int test_imm_8Aint16_mem(short *val) {
  return ((*val) & (0x8A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Aint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0x8a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Aint16_mem>:
testb  $0x8a,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Aint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 138
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_8Aint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 138
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ verbose(int, char *);
scalar_t__ verboseDotsEnabled();
void verboseDot() {
  if (verboseDotsEnabled())
    verbose(1, ".");
}


x86 assembly (clang, -O0):
<verboseDot>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <verboseDotsEnabled@plt>
cmp    $0x0,%rax
je     1146 <verboseDot+0x26>
mov    $0x1,%edi
lea    0xebf(%rip),%rsi
call   1040 <verbose@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<verboseDot>:
push   %rax
xor    %eax,%eax
call   1030 <verboseDotsEnabled@plt>
test   %rax,%rax
je     113f <verboseDot+0x1f>
lea    0xecc(%rip),%rsi
mov    $0x1,%edi
pop    %rax
jmp    1040 <verbose@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [2 x i8] c".\00"
define void @verboseDot() {
%1 = call i64 (...) @verboseDotsEnabled()
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = call i32 @verbose(i32 1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c".\00"
define void @verboseDot() {
%1 = tail call i64 (...) @verboseDotsEnabled()
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @verbose(i32 1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t bcd(uint8_t v) { return 0x10 * (v / 10) + v % 10; }


x86 assembly (clang, -O0):
<bcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
shl    $0x4,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x8(%rbp),%eax
add    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcd>:
movslq %edi,%rax
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
add    %edx,%ecx
mov    %ecx,%edx
shl    $0x4,%edx
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %ecx,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @bcd(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, 10
%5 = mul nsw i32 16, %4
%6 = load i32, i32* %2
%7 = srem i32 %6, 10
%8 = add nsw i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @bcd(i32 %0) {
%2 = sdiv i32 %0, 10
%3 = shl nsw i32 %2, 4
%4 = srem i32 %0, 10
%5 = add nsw i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int read_raw_varint32(unsigned long *, void *, int);
unsigned long Message_get_delimited_size(void *_buffer, int offset) {
  unsigned long size = 0;
  int old_offset = offset;
  offset = read_raw_varint32(&size, _buffer, offset);
  return size + offset - old_offset;
}


x86 assembly (clang, -O0):
<Message_get_delimited_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
lea    -0x18(%rbp),%rdi
call   1030 <read_raw_varint32@plt>
mov    %eax,-0xc(%rbp)
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
add    %rcx,%rax
movslq -0x1c(%rbp),%rcx
sub    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Message_get_delimited_size>:
push   %rbx
sub    $0x10,%rsp
mov    %esi,%ebx
mov    %rdi,%rsi
movq   $0x0,0x8(%rsp)
lea    0x8(%rsp),%rdi
mov    %ebx,%edx
call   1030 <read_raw_varint32@plt>
cltq
movslq %ebx,%rcx
sub    %rcx,%rax
add    0x8(%rsp),%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i64 @Message_get_delimited_size(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i64 0, i64* %5
%7 = load i32, i32* %4
store i32 %7, i32* %6
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = call i32 @read_raw_varint32(i64* %5, i8* %8, i32 %9)
store i32 %10, i32* %4
%11 = load i64, i64* %5
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = add i64 %11, %13
%15 = load i32, i32* %6
%16 = sext i32 %15 to i64
%17 = sub i64 %14, %16
ret i64 %17
}

LLVM IR (-O2):
define i64 @Message_get_delimited_size(i8* %0, i32 %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
store i64 0, i64* %3
%5 = call i32 @read_raw_varint32(i64* %3, i8* %0, i32 %1)
%6 = load i64, i64* %3
%7 = sext i32 %5 to i64
%8 = sext i32 %1 to i64
%9 = sub nsw i64 %7, %8
%10 = add i64 %9, %6
ret i64 %10
}
/* Variables and functions */
char const *strstr(char const *, char const *);
int strbeg(const char *haystack, const char *needle) {
  return strstr(haystack, needle) == haystack;
}


x86 assembly (clang, -O0):
<strbeg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strstr@plt>
cmp    -0x8(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strbeg>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %rax,%rdx
call   1030 <strncmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @strbeg(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @strstr(i8* %5, i8* %6)
%8 = load i8*, i8** %3
%9 = icmp eq i8* %7, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @strbeg(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = tail call i32 @strncmp(i8* %0, i8* %1, i64 %3)
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ waiter1(int /*<<< orphan*/);
int /*<<< orphan*/ waker1(int /*<<< orphan*/);
int main() {
__CPROVER_ASYNC_1:
  waiter1(0);
__CPROVER_ASYNC_2:
  waker1(0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1040 <waiter1@plt>
xor    %edi,%edi
call   1030 <waker1@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <waiter1@plt>
xor    %edi,%edi
call   1030 <waker1@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0
%3 = call i32 @waiter1(i32 0)
br label %4
4: ; preds = %2
%5 = call i32 @waker1(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @waiter1(i32 0)
%2 = tail call i32 @waker1(i32 0)
ret i32 0
}
long long int fibonacci(long long int n) {
  return n <= 1 ? 1 : fibonacci(n - 1) + fibonacci(n - 2);
}


x86 assembly (clang, -O0):
<fibonacci>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x1,-0x8(%rbp)
jg     1135 <fibonacci+0x25>
mov    $0x1,%eax
mov    %rax,-0x10(%rbp)
jmp    1161 <fibonacci+0x51>
mov    -0x8(%rbp),%rdi
sub    $0x1,%rdi
call   1030 <fibonacci@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
sub    $0x2,%rdi
call   1030 <fibonacci@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibonacci>:
push   %r14
push   %rbx
push   %rax
mov    $0x1,%r14d
cmp    $0x2,%rdi
jl     114a <fibonacci+0x3a>
mov    %rdi,%rbx
add    $0x2,%rbx
xor    %r14d,%r14d
nopw   0x0(%rax,%rax,1)
lea    -0x3(%rbx),%rdi
call   1030 <fibonacci@plt>
add    %rax,%r14
add    $0xfffffffffffffffe,%rbx
cmp    $0x3,%rbx
ja     1130 <fibonacci+0x20>
add    $0x1,%r14
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @fibonacci(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp sle i64 %3, 1
br i1 %4, label %5, label %6
5: ; preds = %1
br label %14
6: ; preds = %1
%7 = load i64, i64* %2
%8 = sub nsw i64 %7, 1
%9 = call i64 @fibonacci(i64 %8)
%10 = load i64, i64* %2
%11 = sub nsw i64 %10, 2
%12 = call i64 @fibonacci(i64 %11)
%13 = add nsw i64 %9, %12
br label %14
14: ; preds = %6, %5
%15 = phi i64 [ 1, %5 ], [ %13, %6 ]
ret i64 %15
}

LLVM IR (-O2):
define i64 @fibonacci(i64 %0) {
%2 = icmp slt i64 %0, 2
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %8, %3 ], [ %0, %1 ]
%5 = phi i64 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i64 %4, -1
%7 = tail call i64 @fibonacci(i64 %6)
%8 = add nsw i64 %4, -2
%9 = add nsw i64 %7, %5
%10 = icmp ult i64 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i64 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i64 [ 1, %1 ], [ %12, %11 ]
ret i64 %14
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print() { printf("HI!"); }


x86 assembly (clang, -O0):
<print>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"HI!\00"
define void @print() {
%1 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"HI!\00"
define void @print() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int descnonblock(int);
int tcpnonblock(int sock) { return descnonblock(sock); }


x86 assembly (clang, -O0):
<tcpnonblock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <descnonblock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcpnonblock>:
jmp    1030 <descnonblock@plt>

LLVM IR (-O0):
define i32 @tcpnonblock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @descnonblock(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @tcpnonblock(i32 %0) {
%2 = tail call i32 @descnonblock(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void print(void *txt) { puts((char *)txt); }


x86 assembly (clang, -O0):
<print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <puts@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print>:
jmp    1030 <puts@plt>

LLVM IR (-O0):
define void @print(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @puts(i8* %3)
ret void
}

LLVM IR (-O2):
define void @print(i8* nocapture %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) %0)
ret void
}