#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void CHIP_init(void) {
  uint32_t rev;
  volatile uint32_t *reg;
  rev = *(volatile uint32_t *)(0x0FE081FC);
  if ((rev >> 24) == 0) {
    reg = (volatile uint32_t *)0x400CA00C;
    *reg &= ~(0x70UL);
    reg = (volatile uint32_t *)0x400C6020;
    *reg &= ~(0xE0000000UL);
    *reg |= ~(7 << 25);
  }
  if ((rev >> 24) <= 1) {
    reg = (volatile uint32_t *)0x400C6020;
    *reg &= ~(0x00001F80UL);
    reg = (volatile uint32_t *)0x400C8040;
    *reg = 0;
    reg = (volatile uint32_t *)0x400C8044;
    *reg = 0;
    reg = (volatile uint32_t *)0x400C8058;
    *reg = 0;
    reg = (volatile uint32_t *)0x400C8060;
    *reg = 0;
    reg = (volatile uint32_t *)0x400C8078;
    *reg = 0;
  }
}


x86 assembly (clang, -O0):
<CHIP_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfe081fc,%eax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x18,%eax
cmp    $0x0,%eax
jne    1164 <CHIP_init+0x64>
mov    $0x400ca00c,%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
movslq %ecx,%rcx
and    $0xffffffffffffff8f,%rcx
mov    %ecx,(%rax)
mov    $0x400c6020,%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
movslq %ecx,%rcx
movabs $0xffffffff1fffffff,%rdx
ff ff ff
and    %rdx,%rcx
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
or     $0xf1ffffff,%ecx
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
sar    $0x18,%eax
cmp    $0x1,%eax
jg     11ed <CHIP_init+0xed>
mov    $0x400c6020,%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
movslq %ecx,%rcx
and    $0xffffffffffffe07f,%rcx
mov    %ecx,(%rax)
mov    $0x400c8040,%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
mov    $0x400c8044,%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
mov    $0x400c8058,%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
mov    $0x400c8060,%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
mov    $0x400c8078,%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<CHIP_init>:
mov    0xfe081fc,%eax
cmp    $0xffffff,%eax
ja     112e <CHIP_init+0x2e>
andl   $0xffffff8f,0x400ca00c
8f
andl   $0x1fffffff,0x400c6020
ff ff ff 1f
orl    $0xf1ffffff,0x400c6020
ff ff ff f1
jmp    1135 <CHIP_init+0x35>
cmp    $0x1ffffff,%eax
jg     1177 <CHIP_init+0x77>
andl   $0xffffe07f,0x400c6020
7f e0 ff ff
movl   $0x0,0x400c8040
movl   $0x0,0x400c8044
movl   $0x0,0x400c8058
movl   $0x0,0x400c8060
movl   $0x0,0x400c8078
ret

LLVM IR (-O0):
define void @CHIP_init() {
%1 = alloca i32
%2 = alloca i32*
%3 = load volatile i32, i32* inttoptr (i64 266371580 to i32*)
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = ashr i32 %4, 24
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %21
7: ; preds = %0
store i32* inttoptr (i64 1074569228 to i32*), i32** %2
%8 = load i32*, i32** %2
%9 = load volatile i32, i32* %8
%10 = sext i32 %9 to i64
%11 = and i64 %10, -113
%12 = trunc i64 %11 to i32
store volatile i32 %12, i32* %8
store i32* inttoptr (i64 1074552864 to i32*), i32** %2
%13 = load i32*, i32** %2
%14 = load volatile i32, i32* %13
%15 = sext i32 %14 to i64
%16 = and i64 %15, -3758096385
%17 = trunc i64 %16 to i32
store volatile i32 %17, i32* %13
%18 = load i32*, i32** %2
%19 = load volatile i32, i32* %18
%20 = or i32 %19, -234881025
store volatile i32 %20, i32* %18
br label %21
21: ; preds = %7, %0
%22 = load i32, i32* %1
%23 = ashr i32 %22, 24
%24 = icmp sle i32 %23, 1
br i1 %24, label %25, label %36
25: ; preds = %21
store i32* inttoptr (i64 1074552864 to i32*), i32** %2
%26 = load i32*, i32** %2
%27 = load volatile i32, i32* %26
%28 = sext i32 %27 to i64
%29 = and i64 %28, -8065
%30 = trunc i64 %29 to i32
store volatile i32 %30, i32* %26
store i32* inttoptr (i64 1074561088 to i32*), i32** %2
%31 = load i32*, i32** %2
store volatile i32 0, i32* %31
store i32* inttoptr (i64 1074561092 to i32*), i32** %2
%32 = load i32*, i32** %2
store volatile i32 0, i32* %32
store i32* inttoptr (i64 1074561112 to i32*), i32** %2
%33 = load i32*, i32** %2
store volatile i32 0, i32* %33
store i32* inttoptr (i64 1074561120 to i32*), i32** %2
%34 = load i32*, i32** %2
store volatile i32 0, i32* %34
store i32* inttoptr (i64 1074561144 to i32*), i32** %2
%35 = load i32*, i32** %2
store volatile i32 0, i32* %35
br label %36
36: ; preds = %25, %21
ret void
}

LLVM IR (-O2):
define void @CHIP_init() {
%1 = load volatile i32, i32* inttoptr (i64 266371580 to i32*)
%2 = icmp ult i32 %1, 16777216
br i1 %2, label %3, label %10
3: ; preds = %0
%4 = load volatile i32, i32* inttoptr (i64 1074569228 to i32*)
%5 = and i32 %4, -113
store volatile i32 %5, i32* inttoptr (i64 1074569228 to i32*)
%6 = load volatile i32, i32* inttoptr (i64 1074552864 to i32*)
%7 = and i32 %6, 536870911
store volatile i32 %7, i32* inttoptr (i64 1074552864 to i32*)
%8 = load volatile i32, i32* inttoptr (i64 1074552864 to i32*)
%9 = or i32 %8, -234881025
store volatile i32 %9, i32* inttoptr (i64 1074552864 to i32*)
br label %12
10: ; preds = %0
%11 = icmp slt i32 %1, 33554432
br i1 %11, label %12, label %15
12: ; preds = %3, %10
%13 = load volatile i32, i32* inttoptr (i64 1074552864 to i32*)
%14 = and i32 %13, -8065
store volatile i32 %14, i32* inttoptr (i64 1074552864 to i32*)
store volatile i32 0, i32* inttoptr (i64 1074561088 to i32*)
store volatile i32 0, i32* inttoptr (i64 1074561092 to i32*)
store volatile i32 0, i32* inttoptr (i64 1074561112 to i32*)
store volatile i32 0, i32* inttoptr (i64 1074561120 to i32*)
store volatile i32 0, i32* inttoptr (i64 1074561144 to i32*)
br label %15
15: ; preds = %12, %10
ret void
}