xunge/DecIR huggingface dataset:
int isEndOfLine(char **p) {
  return ((**p == 0) || (**p == 0x0a) || (**p == 0x0d));
}


x86 assembly (clang, -O0):
<isEndOfLine>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
je     114b <isEndOfLine+0x4b>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%ecx
mov    $0x1,%al
cmp    $0xa,%ecx
mov    %al,-0x9(%rbp)
je     114b <isEndOfLine+0x4b>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%eax
cmp    $0xd,%eax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isEndOfLine>:
mov    (%rdi),%rax
mov    (%rax),%cl
mov    $0x1,%eax
test   %cl,%cl
je     1113 <isEndOfLine+0x13>
cmp    $0xa,%cl
jne    1114 <isEndOfLine+0x14>
ret
xor    %eax,%eax
cmp    $0xd,%cl
sete   %al
ret

LLVM IR (-O0):
define i32 @isEndOfLine(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, 0
br i1 %7, label %20, label %8
8: ; preds = %1
%9 = load i8**, i8*** %2
%10 = load i8*, i8** %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 10
br i1 %13, label %20, label %14
14: ; preds = %8
%15 = load i8**, i8*** %2
%16 = load i8*, i8** %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 13
br label %20
20: ; preds = %14, %8, %1
%21 = phi i1 [ true, %8 ], [ true, %1 ], [ %19, %14 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @isEndOfLine(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = load i8, i8* %2
switch i8 %3, label %4 [
i8 0, label %7
i8 10, label %7
]
4: ; preds = %1
%5 = icmp eq i8 %3, 13
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %1, %1, %4
%8 = phi i32 [ 1, %1 ], [ %6, %4 ], [ 1, %1 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ FLEXCOMM7_DriverIRQHandler();
__attribute__((weak)) void FLEXCOMM7_IRQHandler(void) {
  FLEXCOMM7_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<FLEXCOMM7_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <FLEXCOMM7_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FLEXCOMM7_IRQHandler>:
xor    %eax,%eax
jmp    1030 <FLEXCOMM7_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @FLEXCOMM7_IRQHandler() {
%1 = call i32 (...) @FLEXCOMM7_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @FLEXCOMM7_IRQHandler() {
%1 = tail call i32 (...) @FLEXCOMM7_DriverIRQHandler()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ r;

/* Variables and functions */
int /*<<< orphan*/ memcpy(size_t *, void const *, int);
size_t ZSTD_read_ARCH(const void *p) {
  size_t r;
  memcpy(&r, p, sizeof(r));
  return r;
}


x86 assembly (clang, -O0):
<ZSTD_read_ARCH>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    -0x10(%rbp),%rdi
mov    $0x8,%edx
call   1030 <memcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZSTD_read_ARCH>:
push   %rax
mov    %rdi,%rsi
mov    %rsp,%rdi
mov    $0x8,%edx
call   1030 <memcpy@plt>
mov    (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @ZSTD_read_ARCH(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @memcpy(i64* %3, i8* %4, i32 8)
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
define i64 @ZSTD_read_ARCH(i8* %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = call i32 @memcpy(i64* %2, i8* %0, i32 8)
%5 = load i64, i64* %2
ret i64 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ GLuint;

/* Variables and functions */
int /*<<< orphan*/ glDeleteTextures(int, int /*<<< orphan*/ *);
void FreeTexture(GLuint texture) { glDeleteTextures(1, &texture); }


x86 assembly (clang, -O0):
<FreeTexture>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
lea    -0x4(%rbp),%rsi
call   1030 <glDeleteTextures@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FreeTexture>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x1,%edi
call   1030 <glDeleteTextures@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @FreeTexture(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @glDeleteTextures(i32 1, i32* %2)
ret void
}

LLVM IR (-O2):
define void @FreeTexture(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @glDeleteTextures(i32 1, i32* %2)
ret void
}
/* Variables and functions */
int count_dots(char const *);
int is_vendor_branch(const char *rev) { return !(count_dots(rev) & 1); }


x86 assembly (clang, -O0):
<is_vendor_branch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <count_dots@plt>
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_vendor_branch>:
push   %rax
call   1030 <count_dots@plt>
not    %eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @is_vendor_branch(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @count_dots(i8* %3)
%5 = and i32 %4, 1
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @is_vendor_branch(i8* %0) {
%2 = tail call i32 @count_dots(i8* %0)
%3 = and i32 %2, 1
%4 = xor i32 %3, 1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ bumplc2();
int /*<<< orphan*/ outleasp();
void outaddsp() {
  outleasp();
  bumplc2();
}


x86 assembly (clang, -O0):
<outaddsp>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <outleasp@plt>
mov    $0x0,%al
call   1030 <bumplc2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<outaddsp>:
push   %rax
xor    %eax,%eax
call   1040 <outleasp@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <bumplc2@plt>

LLVM IR (-O0):
define void @outaddsp() {
%1 = call i32 (...) @outleasp()
%2 = call i32 (...) @bumplc2()
ret void
}

LLVM IR (-O2):
define void @outaddsp() {
%1 = tail call i32 (...) @outleasp()
%2 = tail call i32 (...) @bumplc2()
ret void
}
void s5p_hdmi_setname(char *name) {}


x86 assembly (clang, -O0):
<s5p_hdmi_setname>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<s5p_hdmi_setname>:
ret

LLVM IR (-O0):
define void @s5p_hdmi_setname(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @s5p_hdmi_setname(i8* nocapture %0) {
ret void
}
void c_pomp_single_enter_(struct ompregdescr *r) { (void)0; }


x86 assembly (clang, -O0):
<c_pomp_single_enter_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_pomp_single_enter_>:
ret

LLVM IR (-O0):
%struct.ompregdescr = type opaque
define void @c_pomp_single_enter_(%struct.ompregdescr* %0) {
%2 = alloca %struct.ompregdescr*
store %struct.ompregdescr* %0, %struct.ompregdescr** %2
ret void
}

LLVM IR (-O2):
%struct.ompregdescr = type opaque
define void @c_pomp_single_enter_(%struct.ompregdescr* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const);
int print_usage(char const *const, int);
int /*<<< orphan*/ stderr;
int missing_arg(const char *const name, const char opt) {
  fprintf(stderr,
          "serdi: "
          "option requires an argument -- '%c'\n",
          opt);
  return print_usage(name, true);
}


x86 assembly (clang, -O0):
<missing_arg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    0x2ea7(%rip),%rax
mov    (%rax),%edi
lea    0xebe(%rip),%rsi
movsbl -0x9(%rbp),%edx
call   1030 <fprintf@plt>
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1040 <print_usage@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<missing_arg>:
push   %rbx
mov    %esi,%edx
mov    %rdi,%rbx
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
lea    0xeca(%rip),%rsi
call   1030 <fprintf@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
pop    %rbx
jmp    1040 <print_usage@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [44 x i8] c"serdi: option requires an argument -- '%c'\0A\00"
define i32 @missing_arg(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i32, i32* @stderr
%6 = load i8, i8* %4
%7 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8 signext %6)
%8 = load i8*, i8** %3
%9 = call i32 @print_usage(i8* %8, i32 1)
ret i32 %9
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [44 x i8] c"serdi: option requires an argument -- '%c'\0A\00"
define i32 @missing_arg(i8* %0, i8 signext %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8 signext %1)
%5 = tail call i32 @print_usage(i8* %0, i32 1)
ret i32 %5
}
unsigned inthash(const void *x) { return *(int *)x; }


x86 assembly (clang, -O0):
<inthash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inthash>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @inthash(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @inthash(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ horribly_unsafe_function();
int main(int argc, char **argv) {
  horribly_unsafe_function();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <horribly_unsafe_function@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <horribly_unsafe_function@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @horribly_unsafe_function()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @horribly_unsafe_function()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ end_acq();
void end() { end_acq(); }


x86 assembly (clang, -O0):
<end>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <end_acq@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<end>:
xor    %eax,%eax
jmp    1030 <end_acq@plt>

LLVM IR (-O0):
define void @end() {
%1 = call i32 (...) @end_acq()
ret void
}

LLVM IR (-O2):
define void @end() {
%1 = tail call i32 (...) @end_acq()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, int);
void signal_callback_handler(int signum) {
  printf("SIG %d\n", signum);
  exit(signum);
}


x86 assembly (clang, -O0):
<signal_callback_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<signal_callback_handler>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"SIG %d\0A\00"
define void @signal_callback_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* %2
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@.str = [8 x i8] c"SIG %d\0A\00"
define void @signal_callback_handler(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = tail call i32 @exit(i32 %0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ HplMsp430GeneralIOP__25__IO__makeInput();
void Msp430GpioC__8__HplGeneralIO__makeInput(void) {
  HplMsp430GeneralIOP__25__IO__makeInput();
}


x86 assembly (clang, -O0):
<Msp430GpioC__8__HplGeneralIO__makeInput>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMsp430GeneralIOP__25__IO__makeInput@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430GpioC__8__HplGeneralIO__makeInput>:
xor    %eax,%eax
jmp    1030 <HplMsp430GeneralIOP__25__IO__makeInput@plt>

LLVM IR (-O0):
define void @Msp430GpioC__8__HplGeneralIO__makeInput() {
%1 = call i32 (...) @HplMsp430GeneralIOP__25__IO__makeInput()
ret void
}

LLVM IR (-O2):
define void @Msp430GpioC__8__HplGeneralIO__makeInput() {
%1 = tail call i32 (...) @HplMsp430GeneralIOP__25__IO__makeInput()
ret void
}
int getMin(int a[3]) {
  int t = a[0], i;
  for (i = 0; i < 3; i++) {
    if (t > a[i])
      t = a[i];
  }
  return t;
}


x86 assembly (clang, -O0):
<getMin>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x3,-0x10(%rbp)
jge    1157 <getMin+0x57>
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
movslq -0x10(%rbp),%rdx
cmp    (%rcx,%rdx,4),%eax
jle    1144 <getMin+0x44>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0xc(%rbp)
jmp    1149 <getMin+0x49>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1118 <getMin+0x18>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getMin>:
mov    (%rdi),%eax
mov    0x4(%rdi),%ecx
cmp    %ecx,%eax
cmovg  %ecx,%eax
mov    0x8(%rdi),%ecx
cmp    %ecx,%eax
cmovg  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @getMin(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 0
%7 = load i32, i32* %6
store i32 %7, i32* %3
store i32 0, i32* %4
br label %8
8: ; preds = %26, %1
%9 = load i32, i32* %4
%10 = icmp slt i32 %9, 3
br i1 %10, label %11, label %29
11: ; preds = %8
%12 = load i32, i32* %3
%13 = load i32*, i32** %2
%14 = load i32, i32* %4
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = icmp sgt i32 %12, %17
br i1 %18, label %19, label %25
19: ; preds = %11
%20 = load i32*, i32** %2
%21 = load i32, i32* %4
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i32, i32* %20, i64 %22
%24 = load i32, i32* %23
store i32 %24, i32* %3
br label %25
25: ; preds = %19, %11
br label %26
26: ; preds = %25
%27 = load i32, i32* %4
%28 = add nsw i32 %27, 1
store i32 %28, i32* %4
br label %8
29: ; preds = %8
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @getMin(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = load i32, i32* %3
%5 = icmp sgt i32 %2, %4
%6 = select i1 %5, i32 %4, i32 %2
%7 = getelementptr inbounds i32, i32* %0, i64 2
%8 = load i32, i32* %7
%9 = icmp sgt i32 %6, %8
%10 = select i1 %9, i32 %8, i32 %6
ret i32 %10
}
/* Type definitions */
typedef int uint32_t;
typedef int cur;

/* Variables and functions */
uint32_t update_pn(uint32_t cur) {
  return ((cur << 1) | ((((cur) & (1ull << (27))) >> (27)) ^
                        (((cur) & (1ull << (30))) >> (30)))) &
         ((1ull << ((unsigned long long)(31))) - 1);
}


x86 assembly (clang, -O0):
<update_pn>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
cltq
movslq -0x4(%rbp),%rcx
and    $0x8000000,%rcx
shr    $0x1b,%rcx
movslq -0x4(%rbp),%rdx
and    $0x40000000,%rdx
shr    $0x1e,%rdx
xor    %rdx,%rcx
or     %rcx,%rax
and    $0x7fffffff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<update_pn>:
mov    %edi,%eax
shr    $0x1b,%eax
mov    %edi,%ecx
shr    $0x1e,%ecx
xor    %eax,%ecx
and    $0x3fffffff,%edi
and    $0x1,%ecx
lea    (%rcx,%rdi,2),%eax
ret

LLVM IR (-O0):
define i32 @update_pn(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 1
%5 = sext i32 %4 to i64
%6 = load i32, i32* %2
%7 = sext i32 %6 to i64
%8 = and i64 %7, 134217728
%9 = lshr i64 %8, 27
%10 = load i32, i32* %2
%11 = sext i32 %10 to i64
%12 = and i64 %11, 1073741824
%13 = lshr i64 %12, 30
%14 = xor i64 %9, %13
%15 = or i64 %5, %14
%16 = and i64 %15, 2147483647
%17 = trunc i64 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
define i32 @update_pn(i32 %0) {
%2 = shl i32 %0, 1
%3 = lshr i32 %0, 27
%4 = lshr i32 %0, 30
%5 = xor i32 %3, %4
%6 = and i32 %2, 2147483646
%7 = and i32 %5, 1
%8 = or i32 %7, %6
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ loff_t;

/* Variables and functions */
int /*<<< orphan*/ get_next_input_from_fuzzer();
loff_t map2check_non_det_loff_t() {
  return (loff_t)get_next_input_from_fuzzer();
}


x86 assembly (clang, -O0):
<map2check_non_det_loff_t>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <get_next_input_from_fuzzer@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<map2check_non_det_loff_t>:
xor    %eax,%eax
jmp    1030 <get_next_input_from_fuzzer@plt>

LLVM IR (-O0):
define i32 @map2check_non_det_loff_t() {
%1 = call i32 (...) @get_next_input_from_fuzzer()
ret i32 %1
}

LLVM IR (-O2):
define i32 @map2check_non_det_loff_t() {
%1 = tail call i32 (...) @get_next_input_from_fuzzer()
ret i32 %1
}
encode_char(char c) { return (32 + (c & 63)); }


x86 assembly (clang, -O0):
<encode_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
and    $0x3f,%eax
add    $0x20,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<encode_char>:
and    $0x3f,%dil
add    $0x20,%dil
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @encode_char(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 63
%6 = add nsw i32 32, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @encode_char(i8 signext %0) {
%2 = and i8 %0, 63
%3 = add nuw nsw i8 %2, 32
%4 = zext i8 %3 to i32
ret i32 %4
}
long long int longlongint_ignoring_unsignedshortint(long long int x,
                                                    unsigned short int y) {
  return x;
}


x86 assembly (clang, -O0):
<longlongint_ignoring_unsignedshortint>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<longlongint_ignoring_unsignedshortint>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @longlongint_ignoring_unsignedshortint(i64 %0, i16 zeroext %1) {
%3 = alloca i64
%4 = alloca i16
store i64 %0, i64* %3
store i16 %1, i16* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @longlongint_ignoring_unsignedshortint(i64 returned %0, i16 zeroext %1) {
ret i64 %0
}
/* Variables and functions */
int /*<<< orphan*/ CC2420ReceiveP__InterruptFIFOP__fired();
void Msp430InterruptC__1__Interrupt__fired(void) {
  CC2420ReceiveP__InterruptFIFOP__fired();
}


x86 assembly (clang, -O0):
<Msp430InterruptC__1__Interrupt__fired>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <CC2420ReceiveP__InterruptFIFOP__fired@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430InterruptC__1__Interrupt__fired>:
xor    %eax,%eax
jmp    1030 <CC2420ReceiveP__InterruptFIFOP__fired@plt>

LLVM IR (-O0):
define void @Msp430InterruptC__1__Interrupt__fired() {
%1 = call i32 (...) @CC2420ReceiveP__InterruptFIFOP__fired()
ret void
}

LLVM IR (-O2):
define void @Msp430InterruptC__1__Interrupt__fired() {
%1 = tail call i32 (...) @CC2420ReceiveP__InterruptFIFOP__fired()
ret void
}
/* Variables and functions */
int target_xfer_memory_partial(unsigned long long, char *, int,
                               int /*<<< orphan*/, int *);
int target_read_memory_partial(unsigned long long memaddr, char *buf, int len,
                               int *err) {
  return target_xfer_memory_partial(memaddr, buf, len, 0, err);
}


x86 assembly (clang, -O0):
<target_read_memory_partial>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x20(%rbp),%r8
xor    %ecx,%ecx
call   1030 <target_xfer_memory_partial@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<target_read_memory_partial>:
mov    %rcx,%r8
xor    %ecx,%ecx
jmp    1030 <target_xfer_memory_partial@plt>

LLVM IR (-O0):
define i32 @target_read_memory_partial(i64 %0, i8* %1, i32 %2, i32* %3) {
%5 = alloca i64
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32*
store i64 %0, i64* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32* %3, i32** %8
%9 = load i64, i64* %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = load i32*, i32** %8
%13 = call i32 @target_xfer_memory_partial(i64 %9, i8* %10, i32 %11, i32 0, i32* %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @target_read_memory_partial(i64 %0, i8* %1, i32 %2, i32* %3) {
%5 = tail call i32 @target_xfer_memory_partial(i64 %0, i8* %1, i32 %2, i32 0, i32* %3)
ret i32 %5
}
void auth_encrypt_connect(cnt) int cnt;
{}


x86 assembly (clang, -O0):
<auth_encrypt_connect>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<auth_encrypt_connect>:
ret

LLVM IR (-O0):
define void @auth_encrypt_connect(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @auth_encrypt_connect(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ uart_putc(int /*<<< orphan*/);
void uart_puts(const char *str) {
  while (!*str)
    uart_putc(*str++);
}


x86 assembly (clang, -O0):
<uart_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1135 <uart_puts+0x25>
jmp    1151 <uart_puts+0x41>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <uart_putc@plt>
jmp    111c <uart_puts+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_puts>:
push   %rbx
cmpb   $0x0,(%rdi)
jne    1130 <uart_puts+0x20>
mov    %rdi,%rbx
add    $0x1,%rbx
nopl   (%rax)
xor    %edi,%edi
call   1030 <uart_putc@plt>
cmpb   $0x0,(%rbx)
lea    0x1(%rbx),%rbx
je     1120 <uart_puts+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @uart_puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
%7 = xor i1 %6, true
br i1 %7, label %8, label %14
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
%11 = load i8, i8* %9
%12 = sext i8 %11 to i32
%13 = call i32 @uart_putc(i32 %12)
br label %3
14: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @uart_puts(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %4, label %10
4: ; preds = %1, %4
%5 = phi i8* [ %6, %4 ], [ %0, %1 ]
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = tail call i32 @uart_putc(i32 0)
%8 = load i8, i8* %6
%9 = icmp eq i8 %8, 0
br i1 %9, label %4, label %10
10: ; preds = %4, %1
ret void
}
/* Type definitions */
struct timespec {
  unsigned long tv_sec;
  unsigned long tv_nsec;
};

/* Variables and functions */
int nanosleep(struct timespec *, int /*<<< orphan*/ *);
int util_sleep(unsigned long usec) {
  struct timespec sleep_time;
  sleep_time.tv_sec = usec / 1000000;
  sleep_time.tv_nsec = (usec % 1000000) * 1000;
  return nanosleep(&sleep_time, NULL);
}


x86 assembly (clang, -O0):
<util_sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0xf4240,%ecx
xor    %edx,%edx
div    %rcx
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    $0xf4240,%ecx
xor    %edx,%edx
div    %rcx
imul   $0x3e8,%rdx,%rax
mov    %rax,-0x10(%rbp)
lea    -0x18(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <nanosleep@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_sleep>:
sub    $0x18,%rsp
movabs $0x431bde82d7b634db,%rcx
de 1b 43
mov    %rdi,%rax
mul    %rcx
shr    $0x12,%rdx
mov    %rdx,0x8(%rsp)
imul   $0xf4240,%rdx,%rax
sub    %rax,%rdi
imul   $0x3e8,%rdi,%rax
mov    %rax,0x10(%rsp)
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <nanosleep@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
define i32 @util_sleep(i64 %0) {
%2 = alloca i64
%3 = alloca %struct.timespec
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = udiv i64 %4, 1000000
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
store i64 %5, i64* %6
%7 = load i64, i64* %2
%8 = urem i64 %7, 1000000
%9 = mul i64 %8, 1000
%10 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
store i64 %9, i64* %10
%11 = call i32 @nanosleep(%struct.timespec* %3, i32* null)
ret i32 %11
}

LLVM IR (-O2):
%struct.timespec = type { i64, i64 }
define i32 @util_sleep(i64 %0) {
%2 = alloca %struct.timespec
%3 = bitcast %struct.timespec* %2 to i8*
%4 = udiv i64 %0, 1000000
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 0
store i64 %4, i64* %5
%6 = urem i64 %0, 1000000
%7 = mul nuw nsw i64 %6, 1000
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 1
store i64 %7, i64* %8
%9 = call i32 @nanosleep(%struct.timespec* %2, i32* null)
ret i32 %9
}
int g(int x) { return 0 > (x > 0 ? x : -x); }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    111c <g+0x1c>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1124 <g+0x24>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
xor    %eax,%eax
cmp    %ecx,%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @g(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i32, i32* %2
br label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = sub nsw i32 0, %8
br label %10
10: ; preds = %7, %5
%11 = phi i32 [ %6, %5 ], [ %9, %7 ]
%12 = icmp sgt i32 0, %11
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @g(i32 %0) {
ret i32 0
}
/* Variables and functions */
int EXIT_FAILURE;
int main(int argc, char *argv[]) {
  (void)argc;
  (void)argv;
  return EXIT_FAILURE;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ec7(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = load i32, i32* @EXIT_FAILURE
ret i32 %8
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = load i32, i32* @EXIT_FAILURE
ret i32 %3
}
void coolapi_open_all(void) {}


x86 assembly (clang, -O0):
<coolapi_open_all>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<coolapi_open_all>:
ret

LLVM IR (-O0):
define void @coolapi_open_all() {
ret void
}

LLVM IR (-O2):
define void @coolapi_open_all() {
ret void
}
void pcp_def_filesystem_metrics(struct activity *a) {}


x86 assembly (clang, -O0):
<pcp_def_filesystem_metrics>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcp_def_filesystem_metrics>:
ret

LLVM IR (-O0):
%struct.activity = type opaque
define void @pcp_def_filesystem_metrics(%struct.activity* %0) {
%2 = alloca %struct.activity*
store %struct.activity* %0, %struct.activity** %2
ret void
}

LLVM IR (-O2):
%struct.activity = type opaque
define void @pcp_def_filesystem_metrics(%struct.activity* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ checkNotNull(void *, char *);
void *malloc(size_t);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
void *zalloc_s(size_t size) {
  void *r = malloc(size);
  checkNotNull(r, "malloc() failed");
  memset(r, 0, size);
  return r;
}


x86 assembly (clang, -O0):
<zalloc_s>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xeac(%rip),%rsi
call   1030 <checkNotNull@plt>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rdx
xor    %esi,%esi
call   1040 <memset@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zalloc_s>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1050 <malloc@plt>
mov    %rax,%rbx
lea    0xeba(%rip),%rsi
mov    %rax,%rdi
call   1030 <checkNotNull@plt>
mov    %rbx,%rdi
xor    %esi,%esi
mov    %r14,%rdx
call   1040 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [16 x i8] c"malloc() failed\00"
define i8* @zalloc_s(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @checkNotNull(i8* %6, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%8 = load i8*, i8** %3
%9 = load i64, i64* %2
%10 = call i32 @memset(i8* %8, i32 0, i64 %9)
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [16 x i8] c"malloc() failed\00"
define i8* @zalloc_s(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = tail call i32 @checkNotNull(i8* %2, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @memset(i8* %2, i32 0, i64 %0)
ret i8* %2
}
void GLUE_STORE_P1_TO_STACK_AT_OFFS(void *b, int offs) {
  *(unsigned int *)b = 0xe58d0000 + offs;
}


x86 assembly (clang, -O0):
<GLUE_STORE_P1_TO_STACK_AT_OFFS>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
add    $0xe58d0000,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GLUE_STORE_P1_TO_STACK_AT_OFFS>:
add    $0xe58d0000,%esi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @GLUE_STORE_P1_TO_STACK_AT_OFFS(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = add i32 -443744256, %5
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32 %6, i32* %8
ret void
}

LLVM IR (-O2):
define void @GLUE_STORE_P1_TO_STACK_AT_OFFS(i8* nocapture writeonly %0, i32 %1) {
%3 = add i32 %1, -443744256
%4 = bitcast i8* %0 to i32*
store i32 %3, i32* %4
ret void
}
int lsm_ioerr(void) { return 10; }


x86 assembly (clang, -O0):
<lsm_ioerr>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lsm_ioerr>:
mov    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @lsm_ioerr() {
ret i32 10
}

LLVM IR (-O2):
define i32 @lsm_ioerr() {
ret i32 10
}
void cdft(int n, int isgn, double *a) {
  void cftfsub(int n, double *a);
  void cftbsub(int n, double *a);
  if (isgn >= 0) {
    cftfsub(n, a);
  } else {
    cftbsub(n, a);
  }
}


x86 assembly (clang, -O0):
<cdft>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     114d <cdft+0x2d>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <cftfsub@plt>
jmp    1159 <cdft+0x39>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <cftbsub@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cdft>:
test   %esi,%esi
js     112c <cdft+0xc>
mov    %rdx,%rsi
jmp    1040 <cftfsub@plt>
mov    %rdx,%rsi
jmp    1030 <cftbsub@plt>

LLVM IR (-O0):
define void @cdft(i32 %0, i32 %1, double* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca double*
store i32 %0, i32* %4
store i32 %1, i32* %5
store double* %2, double** %6
%7 = load i32, i32* %5
%8 = icmp sge i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = load i32, i32* %4
%11 = load double*, double** %6
br label %15
12: ; preds = %3
%13 = load i32, i32* %4
%14 = load double*, double** %6
br label %15
15: ; preds = %12, %9
ret void
}

LLVM IR (-O2):
define void @cdft(i32 %0, i32 %1, double* %2) {
%4 = icmp sgt i32 %1, -1
br i1 %4, label %5, label %6
5: ; preds = %3
tail call void @cftfsub(i32 %0, double* %2)
br label %7
6: ; preds = %3
tail call void @cftbsub(i32 %0, double* %2)
br label %7
7: ; preds = %6, %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ getchar();
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ stdout;
void WaitForPage(void) {
  printf("\037");
  printf("\007");
  printf("\035");
  fflush(stdout);
  while (!getchar())
    ;
}


x86 assembly (clang, -O0):
<WaitForPage>:
push   %rbp
mov    %rsp,%rbp
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
lea    0xebb(%rip),%rdi
call   1030 <printf@plt>
lea    0xeb1(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e81(%rip),%rax
mov    (%rax),%edi
call   1050 <fflush@plt>
mov    $0x0,%al
call   1040 <getchar@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1182 <WaitForPage+0x52>
jmp    1187 <WaitForPage+0x57>
jmp    1166 <WaitForPage+0x36>
pop    %rbp
ret

x86 assembly (clang, -O2):
<WaitForPage>:
push   %rax
mov    $0x1f,%edi
call   1030 <putchar@plt>
mov    $0x7,%edi
call   1030 <putchar@plt>
mov    $0x1d,%edi
call   1030 <putchar@plt>
mov    0x2e8a(%rip),%rax
mov    (%rax),%edi
call   1050 <fflush@plt>
nopl   (%rax)
xor    %eax,%eax
call   1040 <getchar@plt>
test   %eax,%eax
je     1160 <WaitForPage+0x30>
pop    %rax
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\1F\00"
@.str.1 = [2 x i8] c"\07\00"
@.str.2 = [2 x i8] c"\1D\00"
@stdout = global i32 0
define void @WaitForPage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
%4 = load i32, i32* @stdout
%5 = call i32 @fflush(i32 %4)
br label %6
6: ; preds = %10, %0
%7 = call i32 (...) @getchar()
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
br i1 %9, label %10, label %11
10: ; preds = %6
br label %6
11: ; preds = %6
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @WaitForPage() {
%1 = tail call i32 @putchar(i32 31)
%2 = tail call i32 @putchar(i32 7)
%3 = tail call i32 @putchar(i32 29)
%4 = load i32, i32* @stdout
%5 = tail call i32 @fflush(i32 %4)
br label %6
6: ; preds = %6, %0
%7 = tail call i32 (...) @getchar()
%8 = icmp eq i32 %7, 0
br i1 %8, label %6, label %9
9: ; preds = %6
ret void
}
int gca_cmp_int(const void *aa, const void *bb) {
  const int a = *(const int *)aa;
  const int b = *(const int *)bb;
  return (((a) > (b)) - ((b) > (a)));
}


x86 assembly (clang, -O0):
<gca_cmp_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
mov    -0x18(%rbp),%ecx
cmp    -0x14(%rbp),%ecx
setg   %cl
and    $0x1,%cl
movzbl %cl,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gca_cmp_int>:
mov    (%rdi),%ecx
mov    (%rsi),%edx
xor    %eax,%eax
xor    %esi,%esi
cmp    %edx,%ecx
setg   %al
setl   %sil
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @gca_cmp_int(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
%9 = load i32, i32* %8
store i32 %9, i32* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i32*
%12 = load i32, i32* %11
store i32 %12, i32* %6
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = icmp sgt i32 %13, %14
%16 = zext i1 %15 to i32
%17 = load i32, i32* %6
%18 = load i32, i32* %5
%19 = icmp sgt i32 %17, %18
%20 = zext i1 %19 to i32
%21 = sub nsw i32 %16, %20
ret i32 %21
}

LLVM IR (-O2):
define i32 @gca_cmp_int(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp sgt i32 %4, %6
%8 = zext i1 %7 to i32
%9 = icmp sgt i32 %6, %4
%10 = sext i1 %9 to i32
%11 = add nsw i32 %10, %8
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ swap(int *, int *);
int main() {
  int a = 1, b = 2;
  swap(&a, &b);
  printf("a == %d\n", a);
  printf("b == %d\n", b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
lea    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1040 <swap@plt>
mov    -0x8(%rbp),%esi
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
mov    -0xc(%rbp),%esi
lea    0xea6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x1,0x4(%rsp)
movl   $0x2,(%rsp)
lea    0x4(%rsp),%rdi
mov    %rsp,%rsi
call   1040 <swap@plt>
mov    0x4(%rsp),%esi
lea    0xeb8(%rip),%rdi
call   1030 <printf@plt>
mov    (%rsp),%esi
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"a == %d\0A\00"
@.str.1 = [9 x i8] c"b == %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
store i32 2, i32* %3
%4 = call i32 @swap(i32* %2, i32* %3)
%5 = load i32, i32* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i32, i32* %3
%8 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"a == %d\0A\00"
@.str.1 = [9 x i8] c"b == %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
store i32 1, i32* %1
%4 = bitcast i32* %2 to i8*
store i32 2, i32* %2
%5 = call i32 @swap(i32* %1, i32* %2)
%6 = load i32, i32* %1
%7 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = load i32, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}
/* Variables and functions */
int nvidia_mcp_gpio_set(int, int);
int nvidia_mcp_gpio21_raise(void) { return nvidia_mcp_gpio_set(0x21, 0x01); }


x86 assembly (clang, -O0):
<nvidia_mcp_gpio21_raise>:
push   %rbp
mov    %rsp,%rbp
mov    $0x21,%edi
mov    $0x1,%esi
call   1030 <nvidia_mcp_gpio_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nvidia_mcp_gpio21_raise>:
mov    $0x21,%edi
mov    $0x1,%esi
jmp    1030 <nvidia_mcp_gpio_set@plt>

LLVM IR (-O0):
define i32 @nvidia_mcp_gpio21_raise() {
%1 = call i32 @nvidia_mcp_gpio_set(i32 33, i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @nvidia_mcp_gpio21_raise() {
%1 = tail call i32 @nvidia_mcp_gpio_set(i32 33, i32 1)
ret i32 %1
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ event;
};
typedef TYPE_1__ XGravityEvent;

/* Variables and functions */
unsigned long get_XGravityEvent_event(void *_p) {
  return (unsigned long)((XGravityEvent *)_p)->event;
}


x86 assembly (clang, -O0):
<get_XGravityEvent_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XGravityEvent_event>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XGravityEvent_event(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XGravityEvent_event(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Type definitions */
typedef int uint32_t;
typedef int uint16_t;

/* Variables and functions */
int co_read16p(int *);
uint32_t co_read24p(void const *ptr24) {
  uint16_t addr_l, addr_h;
  addr_l = co_read16p((uint16_t *)ptr24);
  addr_h = *((uint16_t *)ptr24 + 1) & 0x00FF;
  return ((uint32_t)addr_l | (uint32_t)addr_h << 16);
}


x86 assembly (clang, -O0):
<co_read24p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <co_read16p@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
and    $0xff,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x10(%rbp),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<co_read24p>:
push   %rbx
mov    %rdi,%rbx
call   1030 <co_read16p@plt>
mov    0x4(%rbx),%ecx
movzbl %cl,%ecx
shl    $0x10,%ecx
or     %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @co_read24p(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = bitcast i8* %5 to i32*
%7 = call i32 @co_read16p(i32* %6)
store i32 %7, i32* %3
%8 = load i8*, i8** %2
%9 = bitcast i8* %8 to i32*
%10 = getelementptr inbounds i32, i32* %9, i64 1
%11 = load i32, i32* %10
%12 = and i32 %11, 255
store i32 %12, i32* %4
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = shl i32 %14, 16
%16 = or i32 %13, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @co_read24p(i8* %0) {
%2 = bitcast i8* %0 to i32*
%3 = tail call i32 @co_read16p(i32* %2)
%4 = getelementptr inbounds i8, i8* %0, i64 4
%5 = bitcast i8* %4 to i32*
%6 = load i32, i32* %5
%7 = shl i32 %6, 16
%8 = and i32 %7, 16711680
%9 = or i32 %8, %3
ret i32 %9
}
/* Type definitions */
struct timeval {
  double tv_sec;
  int tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/);
double rtc(void) {
  struct timeval tv;
  gettimeofday(&tv, 0);
  return tv.tv_sec + tv.tv_usec / 1e6;
}


x86 assembly (clang, -O0):
<rtc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x10(%rbp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
movsd  -0x10(%rbp),%xmm0
cvtsi2sdl -0x8(%rbp),%xmm1
movsd  0xecb(%rip),%xmm2
divsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtc>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
cvtsi2sdl 0x10(%rsp),%xmm0
divsd  0xed2(%rip),%xmm0
addsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { double, i32 }
define double @rtc() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32 0)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load double, double* %3
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%6 = load i32, i32* %5
%7 = sitofp i32 %6 to double
%8 = fdiv double %7, 1.000000e+06
%9 = fadd double %4, %8
ret double %9
}

LLVM IR (-O2):
%struct.timeval = type { double, i32 }
define double @rtc() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32 0)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load double, double* %4
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%7 = load i32, i32* %6
%8 = sitofp i32 %7 to double
%9 = fdiv double %8, 1.000000e+06
%10 = fadd double %5, %9
ret double %10
}
/* Variables and functions */
int /*<<< orphan*/ error_msg_and_die(char *);
char *safe_strncpy(char *, char const *, int);
char *xmalloc(int);
extern char *xstrndup(const char *s, int n) {
  char *t;
  if (s == NULL)
    error_msg_and_die("xstrndup bug");
  t = xmalloc(++n);
  return safe_strncpy(t, s, n);
}


x86 assembly (clang, -O0):
<xstrndup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1156 <xstrndup+0x26>
lea    0xeaf(%rip),%rdi
call   1050 <error_msg_and_die@plt>
mov    -0xc(%rbp),%edi
add    $0x1,%edi
mov    %edi,-0xc(%rbp)
call   1030 <xmalloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1040 <safe_strncpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrndup>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
test   %rdi,%rdi
jne    114a <xstrndup+0x1a>
lea    0xebb(%rip),%rdi
call   1050 <error_msg_and_die@plt>
add    $0x1,%ebx
mov    %ebx,%edi
call   1030 <xmalloc@plt>
mov    %rax,%rdi
mov    %r14,%rsi
mov    %ebx,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <safe_strncpy@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"xstrndup bug\00"
define i8* @xstrndup(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 @error_msg_and_die(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %2
%11 = load i32, i32* %4
%12 = add nsw i32 %11, 1
store i32 %12, i32* %4
%13 = call i8* @xmalloc(i32 %12)
store i8* %13, i8** %5
%14 = load i8*, i8** %5
%15 = load i8*, i8** %3
%16 = load i32, i32* %4
%17 = call i8* @safe_strncpy(i8* %14, i8* %15, i32 %16)
ret i8* %17
}

LLVM IR (-O2):
@.str = [13 x i8] c"xstrndup bug\00"
define i8* @xstrndup(i8* %0, i32 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @error_msg_and_die(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %2
%7 = add nsw i32 %1, 1
%8 = tail call i8* @xmalloc(i32 %7)
%9 = tail call i8* @safe_strncpy(i8* %8, i8* %0, i32 %7)
ret i8* %9
}
/* Variables and functions */
size_t zero_or_ten(int);
void l2_concrete_overrun_Bad() {
  int a[10];
  a[zero_or_ten(1)] = 0;
}


x86 assembly (clang, -O0):
<l2_concrete_overrun_Bad>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    $0x1,%edi
call   1030 <zero_or_ten@plt>
movl   $0x0,-0x30(%rbp,%rax,4)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<l2_concrete_overrun_Bad>:
mov    $0x1,%edi
jmp    1030 <zero_or_ten@plt>

LLVM IR (-O0):
define void @l2_concrete_overrun_Bad() {
%1 = alloca [10 x i32]
%2 = call i64 @zero_or_ten(i32 1)
%3 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 %2
store i32 0, i32* %3
ret void
}

LLVM IR (-O2):
define void @l2_concrete_overrun_Bad() {
%1 = tail call i64 @zero_or_ten(i32 1)
ret void
}
int ssb_pcicore_dev_irqvecs_enable(struct ssb_pcicore *pc,
                                   struct ssb_device *dev) {
  return 0;
}


x86 assembly (clang, -O0):
<ssb_pcicore_dev_irqvecs_enable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssb_pcicore_dev_irqvecs_enable>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ssb_pcicore = type opaque
%struct.ssb_device = type opaque
define i32 @ssb_pcicore_dev_irqvecs_enable(%struct.ssb_pcicore* %0, %struct.ssb_device* %1) {
%3 = alloca %struct.ssb_pcicore*
%4 = alloca %struct.ssb_device*
store %struct.ssb_pcicore* %0, %struct.ssb_pcicore** %3
store %struct.ssb_device* %1, %struct.ssb_device** %4
ret i32 0
}

LLVM IR (-O2):
%struct.ssb_pcicore = type opaque
%struct.ssb_device = type opaque
define i32 @ssb_pcicore_dev_irqvecs_enable(%struct.ssb_pcicore* nocapture readnone %0, %struct.ssb_device* nocapture readnone %1) {
ret i32 0
}