xunge/DecIR huggingface dataset:
int isACGT(char input) {
  if (input == 'A' || input == 'a')
    return 1;
  if (input == 'C' || input == 'c')
    return 1;
  if (input == 'G' || input == 'g')
    return 1;
  if (input == 'T' || input == 't')
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isACGT>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
je     1124 <isACGT+0x24>
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jne    1130 <isACGT+0x30>
movl   $0x1,-0x4(%rbp)
jmp    11a9 <isACGT+0xa9>
movsbl -0x5(%rbp),%eax
cmp    $0x43,%eax
je     114a <isACGT+0x4a>
movsbl -0x5(%rbp),%eax
cmp    $0x63,%eax
jne    1156 <isACGT+0x56>
movl   $0x1,-0x4(%rbp)
jmp    11a9 <isACGT+0xa9>
movsbl -0x5(%rbp),%eax
cmp    $0x47,%eax
je     1170 <isACGT+0x70>
movsbl -0x5(%rbp),%eax
cmp    $0x67,%eax
jne    117c <isACGT+0x7c>
movl   $0x1,-0x4(%rbp)
jmp    11a9 <isACGT+0xa9>
movsbl -0x5(%rbp),%eax
cmp    $0x54,%eax
je     1196 <isACGT+0x96>
movsbl -0x5(%rbp),%eax
cmp    $0x74,%eax
jne    11a2 <isACGT+0xa2>
movl   $0x1,-0x4(%rbp)
jmp    11a9 <isACGT+0xa9>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isACGT>:
mov    %edi,%eax
and    $0xdf,%al
and    $0xdd,%dil
cmp    $0x41,%dil
sete   %cl
cmp    $0x47,%al
sete   %dl
or     %cl,%dl
cmp    $0x54,%al
sete   %al
or     %dl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @isACGT(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 65
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 97
br i1 %10, label %11, label %12
11: ; preds = %7, %1
store i32 1, i32* %2
br label %40
12: ; preds = %7
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = icmp eq i32 %14, 67
br i1 %15, label %20, label %16
16: ; preds = %12
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 99
br i1 %19, label %20, label %21
20: ; preds = %16, %12
store i32 1, i32* %2
br label %40
21: ; preds = %16
%22 = load i8, i8* %3
%23 = sext i8 %22 to i32
%24 = icmp eq i32 %23, 71
br i1 %24, label %29, label %25
25: ; preds = %21
%26 = load i8, i8* %3
%27 = sext i8 %26 to i32
%28 = icmp eq i32 %27, 103
br i1 %28, label %29, label %30
29: ; preds = %25, %21
store i32 1, i32* %2
br label %40
30: ; preds = %25
%31 = load i8, i8* %3
%32 = sext i8 %31 to i32
%33 = icmp eq i32 %32, 84
br i1 %33, label %38, label %34
34: ; preds = %30
%35 = load i8, i8* %3
%36 = sext i8 %35 to i32
%37 = icmp eq i32 %36, 116
br i1 %37, label %38, label %39
38: ; preds = %34, %30
store i32 1, i32* %2
br label %40
39: ; preds = %34
store i32 0, i32* %2
br label %40
40: ; preds = %39, %38, %29, %20, %11
%41 = load i32, i32* %2
ret i32 %41
}

LLVM IR (-O2):
define i32 @isACGT(i8 signext %0) {
%2 = and i8 %0, -33
%3 = and i8 %0, -35
%4 = icmp eq i8 %3, 65
%5 = icmp eq i8 %2, 71
%6 = or i1 %4, %5
%7 = icmp eq i8 %2, 84
%8 = or i1 %7, %6
%9 = zext i1 %8 to i32
ret i32 %9
}
void PiComs_RX_ISR(void) {}


x86 assembly (clang, -O0):
<PiComs_RX_ISR>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PiComs_RX_ISR>:
ret

LLVM IR (-O0):
define void @PiComs_RX_ISR() {
ret void
}

LLVM IR (-O2):
define void @PiComs_RX_ISR() {
ret void
}
char *numeric_oct_to_hex(char value[]) { return ""; }


x86 assembly (clang, -O0):
<numeric_oct_to_hex>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    0xef1(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<numeric_oct_to_hex>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @numeric_oct_to_hex(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @numeric_oct_to_hex(i8* nocapture readnone %0) {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}
void stm_l2_disable(void) {}


x86 assembly (clang, -O0):
<stm_l2_disable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stm_l2_disable>:
ret

LLVM IR (-O0):
define void @stm_l2_disable() {
ret void
}

LLVM IR (-O2):
define void @stm_l2_disable() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bindCallbacks();
int /*<<< orphan*/ render(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stdout;
int main(int argc, char *argv[]) {
  bindCallbacks();
  render(stdout, "overdrive");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <bindCallbacks@plt>
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
call   1030 <render@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <bindCallbacks@plt>
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
lea    0xec8(%rip),%rsi
call   1030 <render@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stdout = global i32 0
@.str = [10 x i8] c"overdrive\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @bindCallbacks()
%7 = load i32, i32* @stdout
%8 = call i32 @render(i32 %7, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [10 x i8] c"overdrive\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @bindCallbacks()
%4 = load i32, i32* @stdout
%5 = tail call i32 @render(i32 %4, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int rand();
int genera_numero_casuale(void) { return (rand() % 200); }


x86 assembly (clang, -O0):
<genera_numero_casuale>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0xc8,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<genera_numero_casuale>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x51eb851f,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rcx
add    %edx,%ecx
imul   $0xc8,%ecx,%ecx
sub    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @genera_numero_casuale() {
%1 = call i32 (...) @rand()
%2 = srem i32 %1, 200
ret i32 %2
}

LLVM IR (-O2):
define i32 @genera_numero_casuale() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 200
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ glutWireIcosahedron();
void drawWireIcosahedron(void) { glutWireIcosahedron(); }


x86 assembly (clang, -O0):
<drawWireIcosahedron>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <glutWireIcosahedron@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawWireIcosahedron>:
xor    %eax,%eax
jmp    1030 <glutWireIcosahedron@plt>

LLVM IR (-O0):
define void @drawWireIcosahedron() {
%1 = call i32 (...) @glutWireIcosahedron()
ret void
}

LLVM IR (-O2):
define void @drawWireIcosahedron() {
%1 = tail call i32 (...) @glutWireIcosahedron()
ret void
}
int test_imm_7Cuint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x7C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Cuint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x7c,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Cuint64_highword_mem>:
testb  $0x7c,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Cuint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 124
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_7Cuint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 532575944704
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ errno;
int /*<<< orphan*/ write(int /*<<< orphan*/, void const *, size_t);
ssize_t dspd_write(int32_t fd, const void *buf, size_t len) {
  ssize_t ret = write(fd, buf, len);
  if (ret < 0)
    ret = -errno;
  return ret;
}


x86 assembly (clang, -O0):
<dspd_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <write@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jge    114e <dspd_write+0x3e>
xor    %eax,%eax
mov    0x2e97(%rip),%rcx
sub    (%rcx),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dspd_write>:
push   %rax
call   1030 <write@plt>
mov    0x2ec3(%rip),%rcx
xor    %edx,%edx
sub    (%rcx),%edx
test   %eax,%eax
cmovs  %edx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@errno = global i32 0
define i32 @dspd_write(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = call i32 @write(i32 %8, i8* %9, i64 %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %3
%15 = load i32, i32* @errno
%16 = sub nsw i32 0, %15
store i32 %16, i32* %7
br label %17
17: ; preds = %14, %3
%18 = load i32, i32* %7
ret i32 %18
}

LLVM IR (-O2):
@errno = global i32 0
define i32 @dspd_write(i32 %0, i8* nocapture %1, i64 %2) {
%4 = tail call i32 @write(i32 %0, i8* %1, i64 %2)
%5 = icmp slt i32 %4, 0
%6 = load i32, i32* @errno
%7 = sub nsw i32 0, %6
%8 = select i1 %5, i32 %7, i32 %4
ret i32 %8
}
void gpio_owire_active(void) {}


x86 assembly (clang, -O0):
<gpio_owire_active>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_owire_active>:
ret

LLVM IR (-O0):
define void @gpio_owire_active() {
ret void
}

LLVM IR (-O2):
define void @gpio_owire_active() {
ret void
}
void gtk_tree_selection_unselect_iter() {}


x86 assembly (clang, -O0):
<gtk_tree_selection_unselect_iter>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_selection_unselect_iter>:
ret

LLVM IR (-O0):
define void @gtk_tree_selection_unselect_iter() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_selection_unselect_iter() {
ret void
}
void ima_add_kexec_buffer(struct kimage *image) {}


x86 assembly (clang, -O0):
<ima_add_kexec_buffer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ima_add_kexec_buffer>:
ret

LLVM IR (-O0):
%struct.kimage = type opaque
define void @ima_add_kexec_buffer(%struct.kimage* %0) {
%2 = alloca %struct.kimage*
store %struct.kimage* %0, %struct.kimage** %2
ret void
}

LLVM IR (-O2):
%struct.kimage = type opaque
define void @ima_add_kexec_buffer(%struct.kimage* nocapture %0) {
ret void
}
int test_imm_C0int8_reg(signed char val) {
  return ((val) & (0xC0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C0int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xc0,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C0int8_reg>:
cmp    $0x40,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C0int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 192
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C0int8_reg(i8 signext %0) {
%2 = icmp ult i8 %0, 64
%3 = select i1 %2, i32 -40, i32 -20
ret i32 %3
}
/* Type definitions */
struct t_config_option {
  int dummy;
};

/* Variables and functions */
int charset_decode_is_allowed(char const *);
int charset_check_charset_decode_cb(void *data, struct t_config_option *option,
                                    const char *value) {
  (void)data;
  (void)option;
  return charset_decode_is_allowed(value);
}


x86 assembly (clang, -O0):
<charset_check_charset_decode_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <charset_decode_is_allowed@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<charset_check_charset_decode_cb>:
mov    %rdx,%rdi
jmp    1030 <charset_decode_is_allowed@plt>

LLVM IR (-O0):
%struct.t_config_option = type { i32 }
define i32 @charset_check_charset_decode_cb(i8* %0, %struct.t_config_option* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca %struct.t_config_option*
%6 = alloca i8*
store i8* %0, i8** %4
store %struct.t_config_option* %1, %struct.t_config_option** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load %struct.t_config_option*, %struct.t_config_option** %5
%9 = load i8*, i8** %6
%10 = call i32 @charset_decode_is_allowed(i8* %9)
ret i32 %10
}

LLVM IR (-O2):
%struct.t_config_option = type { i32 }
define i32 @charset_check_charset_decode_cb(i8* nocapture readnone %0, %struct.t_config_option* nocapture readnone %1, i8* %2) {
%4 = tail call i32 @charset_decode_is_allowed(i8* %2)
ret i32 %4
}
main() {
  int i;
  i = 5;
  int j;
  j = 2;
  int k;
  k = 3;
  for (int i = 0; i < 3; i++) {
    i++;
    int j = 3;
  }
  int l;
  l = 3;
  return (l + i + j + k) == 13 ? 0 : 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
movl   $0x3,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x3,-0x14(%rbp)
jge    114f <main+0x4f>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
movl   $0x3,-0x18(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1127 <main+0x27>
movl   $0x3,-0x1c(%rbp)
mov    -0x1c(%rbp),%edx
add    -0x8(%rbp),%edx
add    -0xc(%rbp),%edx
add    -0x10(%rbp),%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0xd,%edx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %1
store i32 5, i32* %2
store i32 2, i32* %3
store i32 3, i32* %4
store i32 0, i32* %5
br label %8
8: ; preds = %14, %0
%9 = load i32, i32* %5
%10 = icmp slt i32 %9, 3
br i1 %10, label %11, label %17
11: ; preds = %8
%12 = load i32, i32* %5
%13 = add nsw i32 %12, 1
store i32 %13, i32* %5
store i32 3, i32* %6
br label %14
14: ; preds = %11
%15 = load i32, i32* %5
%16 = add nsw i32 %15, 1
store i32 %16, i32* %5
br label %8
17: ; preds = %8
store i32 3, i32* %7
%18 = load i32, i32* %7
%19 = load i32, i32* %2
%20 = add nsw i32 %18, %19
%21 = load i32, i32* %3
%22 = add nsw i32 %20, %21
%23 = load i32, i32* %4
%24 = add nsw i32 %22, %23
%25 = icmp eq i32 %24, 13
%26 = zext i1 %25 to i64
%27 = select i1 %25, i32 0, i32 1
ret i32 %27
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ my_strrev(char *, int);
void my_strrev_with_bounds(char *const buf, int left, int right) {
  if (right > left)
    my_strrev(&buf[left], (right - left + 1));
}


x86 assembly (clang, -O0):
<my_strrev_with_bounds>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1147 <my_strrev_with_bounds+0x37>
mov    -0x8(%rbp),%rdi
movslq -0xc(%rbp),%rax
add    %rax,%rdi
mov    -0x10(%rbp),%esi
sub    -0xc(%rbp),%esi
add    $0x1,%esi
call   1030 <my_strrev@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_strrev_with_bounds>:
sub    %esi,%edx
jle    1124 <my_strrev_with_bounds+0x14>
movslq %esi,%rax
add    %rax,%rdi
add    $0x1,%edx
mov    %edx,%esi
jmp    1030 <my_strrev@plt>
ret

LLVM IR (-O0):
define void @my_strrev_with_bounds(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32, i32* %5
%9 = icmp sgt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %3
%11 = load i8*, i8** %4
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i32, i32* %6
%16 = load i32, i32* %5
%17 = sub nsw i32 %15, %16
%18 = add nsw i32 %17, 1
%19 = call i32 @my_strrev(i8* %14, i32 %18)
br label %20
20: ; preds = %10, %3
ret void
}

LLVM IR (-O2):
define void @my_strrev_with_bounds(i8* %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %2, %1
br i1 %4, label %5, label %11
5: ; preds = %3
%6 = sext i32 %1 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = sub i32 1, %1
%9 = add i32 %8, %2
%10 = tail call i32 @my_strrev(i8* %7, i32 %9)
br label %11
11: ; preds = %5, %3
ret void
}
/* Variables and functions */
int maxSubSum(int const *, int /*<<< orphan*/, int);
int maxSubsequenceSum(const int *src, int len) {
  return maxSubSum(src, 0, len - 1);
}


x86 assembly (clang, -O0):
<maxSubsequenceSum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
sub    $0x1,%edx
xor    %esi,%esi
call   1030 <maxSubSum@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<maxSubsequenceSum>:
lea    -0x1(%rsi),%edx
xor    %esi,%esi
jmp    1030 <maxSubSum@plt>

LLVM IR (-O0):
define i32 @maxSubsequenceSum(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = call i32 @maxSubSum(i32* %5, i32 0, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @maxSubsequenceSum(i32* %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = tail call i32 @maxSubSum(i32* %0, i32 0, i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ __NR_read;
int ppc_syscall(int /*<<< orphan*/, int, void *, unsigned int);
int ppc_read(int fd, void *data, unsigned size) {
  return ppc_syscall(__NR_read, fd, data, size);
}


x86 assembly (clang, -O0):
<ppc_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2ebf(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
call   1030 <ppc_syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ppc_read>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%esi
mov    0x2eca(%rip),%rax
mov    (%rax),%edi
jmp    1030 <ppc_syscall@plt>

LLVM IR (-O0):
@__NR_read = global i32 0
define i32 @ppc_read(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* @__NR_read
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 @ppc_syscall(i32 %7, i32 %8, i8* %9, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
@__NR_read = global i32 0
define i32 @ppc_read(i32 %0, i8* %1, i32 %2) {
%4 = load i32, i32* @__NR_read
%5 = tail call i32 @ppc_syscall(i32 %4, i32 %0, i8* %1, i32 %2)
ret i32 %5
}
int test_imm_82int32_reg(int val) { return ((val) & (0x82 << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_82int32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x82,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_82int32_reg>:
test   $0x82,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_82int32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 130
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_82int32_reg(i32 %0) {
%2 = and i32 %0, 130
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
extern int xyzzy2(int x) { return x; }


x86 assembly (clang, -O0):
<xyzzy2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xyzzy2>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @xyzzy2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @xyzzy2(i32 returned %0) {
ret i32 %0
}
int mdp4_mddi_overlay_blt_stop(struct msm_fb_data_type *mfd) { return 0; }


x86 assembly (clang, -O0):
<mdp4_mddi_overlay_blt_stop>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdp4_mddi_overlay_blt_stop>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.msm_fb_data_type = type opaque
define i32 @mdp4_mddi_overlay_blt_stop(%struct.msm_fb_data_type* %0) {
%2 = alloca %struct.msm_fb_data_type*
store %struct.msm_fb_data_type* %0, %struct.msm_fb_data_type** %2
ret i32 0
}

LLVM IR (-O2):
%struct.msm_fb_data_type = type opaque
define i32 @mdp4_mddi_overlay_blt_stop(%struct.msm_fb_data_type* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ digitalWrite(int, int);
int /*<<< orphan*/ pinMode(int, int);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ usleep(int);
int main(int argc, const char *argv[]) {
  printf("Start Test IO Pin\n\r");
  pinMode(60, 0x1);
  while (0x1) {
    digitalWrite(60, 0x1);
    usleep(10);
    digitalWrite(60, 0x0);
    usleep(10);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xea3(%rip),%rdi
call   1040 <printf@plt>
mov    $0x3c,%edi
mov    $0x1,%esi
call   1050 <pinMode@plt>
mov    $0x3c,%edi
mov    $0x1,%esi
call   1030 <digitalWrite@plt>
mov    $0xa,%edi
call   1060 <usleep@plt>
mov    $0x3c,%edi
xor    %esi,%esi
call   1030 <digitalWrite@plt>
mov    $0xa,%edi
call   1060 <usleep@plt>
jmp    1171 <main+0x31>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeb8(%rip),%rdi
call   1040 <printf@plt>
mov    $0x3c,%edi
mov    $0x1,%esi
call   1050 <pinMode@plt>
nopl   0x0(%rax)
mov    $0x3c,%edi
mov    $0x1,%esi
call   1030 <digitalWrite@plt>
mov    $0xa,%edi
call   1060 <usleep@plt>
mov    $0x3c,%edi
xor    %esi,%esi
call   1030 <digitalWrite@plt>
mov    $0xa,%edi
call   1060 <usleep@plt>
jmp    1160 <main+0x20>

LLVM IR (-O0):
@.str = [20 x i8] c"Start Test IO Pin\0A\0D\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @pinMode(i32 60, i32 1)
br label %8
8: ; preds = %2, %8
%9 = call i32 @digitalWrite(i32 60, i32 1)
%10 = call i32 @usleep(i32 10)
%11 = call i32 @digitalWrite(i32 60, i32 0)
%12 = call i32 @usleep(i32 10)
br label %8
}

LLVM IR (-O2):
@.str = [20 x i8] c"Start Test IO Pin\0A\0D\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @pinMode(i32 60, i32 1)
br label %5
5: ; preds = %2, %5
%6 = tail call i32 @digitalWrite(i32 60, i32 1)
%7 = tail call i32 @usleep(i32 10)
%8 = tail call i32 @digitalWrite(i32 60, i32 0)
%9 = tail call i32 @usleep(i32 10)
br label %5
}
int test_imm_40uint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x40 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_40uint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0x40,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_40uint64_midword_mem>:
testb  $0x40,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_40uint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 64
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_40uint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 4194304
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ reb_murmur3_32(char const *, int /*<<< orphan*/, int const);
scalar_t__ strlen(char const *);
uint32_t reb_tools_hash(const char *str) {
  const int reb_seed = 1983;
  return reb_murmur3_32(str, (uint32_t)strlen(str), reb_seed);
}


x86 assembly (clang, -O0):
<reb_tools_hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x7bf,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
mov    $0x7bf,%edx
call   1040 <reb_murmur3_32@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reb_tools_hash>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
mov    $0x7bf,%edx
pop    %rbx
jmp    1040 <reb_murmur3_32@plt>

LLVM IR (-O0):
define i32 @reb_tools_hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 1983, i32* %3
%4 = load i8*, i8** %2
%5 = load i8*, i8** %2
%6 = call i64 @strlen(i8* %5)
%7 = trunc i64 %6 to i32
%8 = call i32 @reb_murmur3_32(i8* %4, i32 %7, i32 1983)
ret i32 %8
}

LLVM IR (-O2):
define i32 @reb_tools_hash(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = trunc i64 %2 to i32
%4 = tail call i32 @reb_murmur3_32(i8* %0, i32 %3, i32 1983)
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ memset(char *, int, int);
void flash_erase_page(uint32_t address) { memset((char *)address, 0xff, 1024); }


x86 assembly (clang, -O0):
<flash_erase_page>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xff,%esi
mov    $0x400,%edx
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flash_erase_page>:
mov    $0xff,%esi
mov    $0x400,%edx
jmp    1030 <memset@plt>

LLVM IR (-O0):
define void @flash_erase_page(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = inttoptr i64 %3 to i8*
%5 = call i32 @memset(i8* %4, i32 255, i32 1024)
ret void
}

LLVM IR (-O2):
define void @flash_erase_page(i64 %0) {
%2 = inttoptr i64 %0 to i8*
%3 = tail call i32 @memset(i8* %2, i32 255, i32 1024)
ret void
}
long syscall4(int num, long a1, long a2, long a3, long a4) {
  long ret;
  register long r10 asm("r10") = a4;
  __asm__ __volatile__("syscall"
                       : "=a"(ret)
                       : "a"(num), "D"(a1), "S"(a2), "d"(a3)
                       :);
  return ret;
}


x86 assembly (clang, -O0):
<syscall4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
syscall
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscall4>:
mov    %edi,%eax
mov    %rsi,%rdi
mov    %rdx,%rsi
mov    %rcx,%rdx
syscall
ret

LLVM IR (-O0):
define i64 @syscall4(i32 %0, i64 %1, i64 %2, i64 %3, i64 %4) {
%6 = alloca i32
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
%12 = alloca i64
store i32 %0, i32* %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i64 %3, i64* %9
store i64 %4, i64* %10
%13 = load i64, i64* %10
store i64 %13, i64* %12
%14 = load i32, i32* %6
%15 = load i64, i64* %7
%16 = load i64, i64* %8
%17 = load i64, i64* %9
%18 = call i64 asm sideeffect "syscall", "={ax},{ax},{di},{si},{dx},~{dirflag},~{fpsr},~{flags}"(i32 %14, i64 %15, i64 %16, i64 %17)
store i64 %18, i64* %11
%19 = load i64, i64* %11
ret i64 %19
}

LLVM IR (-O2):
define i64 @syscall4(i32 %0, i64 %1, i64 %2, i64 %3, i64 %4) {
%6 = tail call i64 asm sideeffect "syscall", "={ax},{ax},{di},{si},{dx},~{dirflag},~{fpsr},~{flags}"(i32 %0, i64 %1, i64 %2, i64 %3)
ret i64 %6
}
/* Variables and functions */
int /*<<< orphan*/ init_genrand(unsigned int);
void sg_srandom(unsigned int seed) { init_genrand(seed); }


x86 assembly (clang, -O0):
<sg_srandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <init_genrand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sg_srandom>:
jmp    1030 <init_genrand@plt>

LLVM IR (-O0):
define void @sg_srandom(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @init_genrand(i32 %3)
ret void
}

LLVM IR (-O2):
define void @sg_srandom(i32 %0) {
%2 = tail call i32 @init_genrand(i32 %0)
ret void
}
int INT32ARRAY(const void *x) {
  char *p = (char *)x;
  return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
}


x86 assembly (clang, -O0):
<INT32ARRAY>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movsbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%rcx
movsbl 0x2(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%rcx
movsbl 0x3(%rcx),%ecx
shl    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT32ARRAY>:
movsbl (%rdi),%eax
movsbl 0x1(%rdi),%ecx
shl    $0x8,%ecx
or     %eax,%ecx
movsbl 0x2(%rdi),%edx
shl    $0x10,%edx
movzbl 0x3(%rdi),%eax
shl    $0x18,%eax
or     %edx,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @INT32ARRAY(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 0
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = or i32 %8, %13
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i64 2
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = shl i32 %18, 16
%20 = or i32 %14, %19
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i64 3
%23 = load i8, i8* %22
%24 = sext i8 %23 to i32
%25 = shl i32 %24, 24
%26 = or i32 %20, %25
ret i32 %26
}

LLVM IR (-O2):
define i32 @INT32ARRAY(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = shl nsw i32 %6, 8
%8 = or i32 %7, %3
%9 = getelementptr inbounds i8, i8* %0, i64 2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = shl nsw i32 %11, 16
%13 = or i32 %8, %12
%14 = getelementptr inbounds i8, i8* %0, i64 3
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = shl nuw i32 %16, 24
%18 = or i32 %13, %17
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ COM_BufAddText(char const *);
void G_DeferedPlayDemo(const char *name) {
  COM_BufAddText("playdemo \"");
  COM_BufAddText(name);
  COM_BufAddText("\"\n");
}


x86 assembly (clang, -O0):
<G_DeferedPlayDemo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <COM_BufAddText@plt>
mov    -0x8(%rbp),%rdi
call   1030 <COM_BufAddText@plt>
lea    0xed3(%rip),%rdi
call   1030 <COM_BufAddText@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<G_DeferedPlayDemo>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
call   1030 <COM_BufAddText@plt>
mov    %rbx,%rdi
call   1030 <COM_BufAddText@plt>
lea    0xedc(%rip),%rdi
pop    %rbx
jmp    1030 <COM_BufAddText@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"playdemo \22\00"
@.str.1 = [3 x i8] c"\22\0A\00"
define void @G_DeferedPlayDemo(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @COM_BufAddText(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 @COM_BufAddText(i8* %4)
%6 = call i32 @COM_BufAddText(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"playdemo \22\00"
@.str.1 = [3 x i8] c"\22\0A\00"
define void @G_DeferedPlayDemo(i8* %0) {
%2 = tail call i32 @COM_BufAddText(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @COM_BufAddText(i8* %0)
%4 = tail call i32 @COM_BufAddText(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int uECC_bytes() { return 20; }


x86 assembly (clang, -O0):
<uECC_bytes>:
push   %rbp
mov    %rsp,%rbp
mov    $0x14,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uECC_bytes>:
mov    $0x14,%eax
ret

LLVM IR (-O0):
define i32 @uECC_bytes() {
ret i32 20
}

LLVM IR (-O2):
define i32 @uECC_bytes() {
ret i32 20
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void IntTrigger(uint32_t ui32Interrupt) {
  ;
  (*((volatile unsigned long *)(0xE000EF00))) = ui32Interrupt - 16;
}


x86 assembly (clang, -O0):
<IntTrigger>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x10,%eax
movslq %eax,%rcx
mov    $0xe000ef00,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<IntTrigger>:
add    $0xfffffff0,%edi
movslq %edi,%rax
mov    $0xe000ef00,%ecx
mov    %rax,(%rcx)
ret

LLVM IR (-O0):
define void @IntTrigger(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 %3, 16
%5 = sext i32 %4 to i64
store volatile i64 %5, i64* inttoptr (i64 3758157568 to i64*)
ret void
}

LLVM IR (-O2):
define void @IntTrigger(i32 %0) {
%2 = add nsw i32 %0, -16
%3 = sext i32 %2 to i64
store volatile i64 %3, i64* inttoptr (i64 3758157568 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ readdata(int, char *, int);
int readchar(int fd) {
  char b[1];
  readdata(fd, b, 1);
  return b[0];
}


x86 assembly (clang, -O0):
<readchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x5(%rbp),%rsi
mov    $0x1,%edx
call   1030 <readdata@plt>
movsbl -0x5(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readchar>:
push   %rax
lea    0x7(%rsp),%rsi
mov    $0x1,%edx
call   1030 <readdata@plt>
movsbl 0x7(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @readchar(i32 %0) {
%2 = alloca i32
%3 = alloca [1 x i8]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = getelementptr inbounds [1 x i8], [1 x i8]* %3, i64 0, i64 0
%6 = call i32 @readdata(i32 %4, i8* %5, i32 1)
%7 = getelementptr inbounds [1 x i8], [1 x i8]* %3, i64 0, i64 0
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @readchar(i32 %0) {
%2 = alloca [1 x i8]
%3 = getelementptr inbounds [1 x i8], [1 x i8]* %2, i64 0, i64 0
%4 = call i32 @readdata(i32 %0, i8* %3, i32 1)
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
ret i32 %6
}
int x3(int x) { return (x + 1) < x; }


x86 assembly (clang, -O0):
<x3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
cmp    -0x4(%rbp),%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<x3>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @x3(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
%5 = load i32, i32* %2
%6 = icmp slt i32 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @x3(i32 %0) {
ret i32 0
}
void __VERIFIER_atomic_CAS(volatile unsigned *v, unsigned e, unsigned u,
                           unsigned *r, volatile unsigned *flag) {
  if (*v == e) {
    *flag = 1, *v = u, *r = 1;
  } else {
    *r = 0;
  }
}


x86 assembly (clang, -O0):
<__VERIFIER_atomic_CAS>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
cmp    -0xc(%rbp),%eax
jne    1147 <__VERIFIER_atomic_CAS+0x47>
mov    -0x20(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x10(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
movl   $0x1,(%rax)
jmp    1151 <__VERIFIER_atomic_CAS+0x51>
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__VERIFIER_atomic_CAS>:
mov    (%rdi),%eax
xor    %r9d,%r9d
cmp    %esi,%eax
jne    1118 <__VERIFIER_atomic_CAS+0x18>
movl   $0x1,(%r8)
mov    %edx,(%rdi)
mov    $0x1,%r9d
mov    %r9d,(%rcx)
ret

LLVM IR (-O0):
define void @__VERIFIER_atomic_CAS(i32* %0, i32 %1, i32 %2, i32* %3, i32* %4) {
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32*
%10 = alloca i32*
store i32* %0, i32** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32* %3, i32** %9
store i32* %4, i32** %10
%11 = load i32*, i32** %6
%12 = load volatile i32, i32* %11
%13 = load i32, i32* %7
%14 = icmp eq i32 %12, %13
br i1 %14, label %15, label %20
15: ; preds = %5
%16 = load i32*, i32** %10
store volatile i32 1, i32* %16
%17 = load i32, i32* %8
%18 = load i32*, i32** %6
store volatile i32 %17, i32* %18
%19 = load i32*, i32** %9
store i32 1, i32* %19
br label %22
20: ; preds = %5
%21 = load i32*, i32** %9
store i32 0, i32* %21
br label %22
22: ; preds = %20, %15
ret void
}

LLVM IR (-O2):
define void @__VERIFIER_atomic_CAS(i32* %0, i32 %1, i32 %2, i32* nocapture writeonly %3, i32* %4) {
%6 = load volatile i32, i32* %0
%7 = icmp eq i32 %6, %1
br i1 %7, label %8, label %9
8: ; preds = %5
store volatile i32 1, i32* %4
store volatile i32 %2, i32* %0
br label %9
9: ; preds = %5, %8
%10 = phi i32 [ 1, %8 ], [ 0, %5 ]
store i32 %10, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ os_freakout();
int os_system(char const *, int *);
int system(const char *s) {
  int rc;
  if (s == NULL)
    return -1;
  if (os_system(s, &rc) == -1)
    os_freakout();
  return rc;
}


x86 assembly (clang, -O0):
<system>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1143 <system+0x23>
movl   $0xffffffff,-0x4(%rbp)
jmp    1166 <system+0x46>
mov    -0x10(%rbp),%rdi
lea    -0x14(%rbp),%rsi
call   1040 <os_system@plt>
cmp    $0xffffffff,%eax
jne    1160 <system+0x40>
mov    $0x0,%al
call   1030 <os_freakout@plt>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<system>:
test   %rdi,%rdi
je     1145 <system+0x25>
push   %rax
lea    0x4(%rsp),%rsi
call   1040 <os_system@plt>
cmp    $0xffffffff,%eax
jne    113c <system+0x1c>
xor    %eax,%eax
call   1030 <os_freakout@plt>
mov    0x4(%rsp),%eax
add    $0x8,%rsp
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @system(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 -1, i32* %2
br label %16
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i32 @os_system(i8* %9, i32* %4)
%11 = icmp eq i32 %10, -1
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = call i32 (...) @os_freakout()
br label %14
14: ; preds = %12, %8
%15 = load i32, i32* %4
store i32 %15, i32* %2
br label %16
16: ; preds = %14, %7
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @system(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = icmp eq i8* %0, null
br i1 %4, label %12, label %5
5: ; preds = %1
%6 = call i32 @os_system(i8* %0, i32* %2)
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = call i32 (...) @os_freakout()
br label %10
10: ; preds = %8, %5
%11 = load i32, i32* %2
br label %12
12: ; preds = %1, %10
%13 = phi i32 [ %11, %10 ], [ -1, %1 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ handle_ready_pin();
int /*<<< orphan*/ handle_reset_pin();
void handle_input_pins() {
  handle_reset_pin();
  handle_ready_pin();
}


x86 assembly (clang, -O0):
<handle_input_pins>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <handle_reset_pin@plt>
mov    $0x0,%al
call   1030 <handle_ready_pin@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_input_pins>:
push   %rax
xor    %eax,%eax
call   1040 <handle_reset_pin@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <handle_ready_pin@plt>

LLVM IR (-O0):
define void @handle_input_pins() {
%1 = call i32 (...) @handle_reset_pin()
%2 = call i32 (...) @handle_ready_pin()
ret void
}

LLVM IR (-O2):
define void @handle_input_pins() {
%1 = tail call i32 (...) @handle_reset_pin()
%2 = tail call i32 (...) @handle_ready_pin()
ret void
}
/* Variables and functions */
scalar_t__ is_transmit_empty();
int /*<<< orphan*/ out_byte(scalar_t__, char);
void serial_putc(char c) {
  while (is_transmit_empty() == 0)
    ;
  out_byte((0x3F8 + 0), c);
}


x86 assembly (clang, -O0):
<serial_putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x0,%al
call   1030 <is_transmit_empty@plt>
cmp    $0x0,%rax
jne    1144 <serial_putc+0x24>
jmp    112e <serial_putc+0xe>
mov    $0x3f8,%edi
movsbl -0x1(%rbp),%esi
call   1040 <out_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_putc>:
push   %rbx
mov    %edi,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
xor    %eax,%eax
call   1030 <is_transmit_empty@plt>
test   %rax,%rax
je     1130 <serial_putc+0x10>
movsbl %bl,%esi
mov    $0x3f8,%edi
pop    %rbx
jmp    1040 <out_byte@plt>

LLVM IR (-O0):
define void @serial_putc(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
br label %3
3: ; preds = %6, %1
%4 = call i64 (...) @is_transmit_empty()
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %3
br label %3
7: ; preds = %3
%8 = load i8, i8* %2
%9 = call i32 @out_byte(i64 1016, i8 signext %8)
ret void
}

LLVM IR (-O2):
define void @serial_putc(i8 signext %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i64 (...) @is_transmit_empty()
%4 = icmp eq i64 %3, 0
br i1 %4, label %2, label %5
5: ; preds = %2
%6 = tail call i32 @out_byte(i64 1016, i8 signext %0)
ret void
}
void cat_set_thread_name(const char *name) {}


x86 assembly (clang, -O0):
<cat_set_thread_name>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cat_set_thread_name>:
ret

LLVM IR (-O0):
define void @cat_set_thread_name(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @cat_set_thread_name(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void count_to_ten(int count) {
  if (count < 10) {
    printf("Count: %d\n", count);
    count_to_ten(count + 1);
  }
}


x86 assembly (clang, -O0):
<count_to_ten>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jge    114f <count_to_ten+0x2f>
mov    -0x4(%rbp),%esi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%edi
add    $0x1,%edi
call   1040 <count_to_ten@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_to_ten>:
push   %r14
push   %rbx
push   %rax
cmp    $0x9,%edi
jg     1142 <count_to_ten+0x32>
mov    %edi,%ebx
lea    0xede(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0xa,%ebx
jne    1130 <count_to_ten+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [11 x i8] c"Count: %d\0A\00"
define void @count_to_ten(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 10
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load i32, i32* %2
%7 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
br label %10
10: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"Count: %d\0A\00"
define void @count_to_ten(i32 %0) {
%2 = icmp slt i32 %0, 10
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ %0, %1 ]
%5 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = add i32 %4, 1
%7 = icmp eq i32 %6, 10
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("Name: Tony Shaw\n");
  printf("Address: Rd. Youyi, District Daoli, Harbin, Heilongjiang, China\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xedf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeec(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Name: Tony Shaw\0A\00"
@.str.1 = [65 x i8] c"Address: Rd. Youyi, District Daoli, Harbin, Heilongjiang, China\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [16 x i8] c"Name: Tony Shaw\00"
@str.2 = [64 x i8] c"Address: Rd. Youyi, District Daoli, Harbin, Heilongjiang, China\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([64 x i8], [64 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void parte2() {
  printf("\n\n ===== Task 2 ====\n");
  printf("\t %.16g\n\n", 2.3 - 2.0 - 0.3);
}


x86 assembly (clang, -O0):
<parte2>:
push   %rbp
mov    %rsp,%rbp
lea    0xeed(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xef5(%rip),%rdi
movsd  0xecf(%rip),%xmm0
mov    $0x1,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<parte2>:
push   %rax
lea    0xeea(%rip),%rdi
call   1030 <puts@plt>
lea    0xed4(%rip),%rdi
movsd  0xec4(%rip),%xmm0
mov    $0x1,%al
pop    %rcx
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"\0A\0A ===== Task 2 ====\0A\00"
@.str.1 = [10 x i8] c"\09 %.16g\0A\0A\00"
define void @parte2() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), double 0xBCA8000000000000)
ret void
}

LLVM IR (-O2):
@.str.1 = [10 x i8] c"\09 %.16g\0A\0A\00"
@str = [21 x i8] c"\0A\0A ===== Task 2 ====\00"
define void @parte2() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), double 0xBCA8000000000000)
ret void
}