xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, char *, char const *);
const char *pkt_dev_name(const char *dev) {
  static char buf[128];
  snprintf(buf, sizeof(buf), "%s/%s", "/dev/pktcdvd", dev);
  return buf;
}


x86 assembly (clang, -O0):
<pkt_dev_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%r8
lea    0x2f19(%rip),%rdi
mov    $0x80,%esi
lea    0xecd(%rip),%rdx
lea    0xecc(%rip),%rcx
call   1030 <snprintf@plt>
lea    0x2efa(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pkt_dev_name>:
push   %rbx
mov    %rdi,%r8
lea    0x2f25(%rip),%rbx
lea    0xede(%rip),%rdx
lea    0xedd(%rip),%rcx
mov    %rbx,%rdi
mov    $0x80,%esi
call   1030 <snprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@pkt_dev_name.buf = internal global [128 x i8] zeroinitializer
@.str = [6 x i8] c"%s/%s\00"
@.str.1 = [13 x i8] c"/dev/pktcdvd\00"
define i8* @pkt_dev_name(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @snprintf(i8* getelementptr inbounds ([128 x i8], [128 x i8]* @pkt_dev_name.buf, i64 0, i64 0), i32 128, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret i8* getelementptr inbounds ([128 x i8], [128 x i8]* @pkt_dev_name.buf, i64 0, i64 0)
}

LLVM IR (-O2):
@pkt_dev_name.buf = internal global [128 x i8] zeroinitializer
@.str = [6 x i8] c"%s/%s\00"
@.str.1 = [13 x i8] c"/dev/pktcdvd\00"
define i8* @pkt_dev_name(i8* %0) {
%2 = tail call i32 @snprintf(i8* getelementptr inbounds ([128 x i8], [128 x i8]* @pkt_dev_name.buf, i64 0, i64 0), i32 128, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i8* getelementptr inbounds ([128 x i8], [128 x i8]* @pkt_dev_name.buf, i64 0, i64 0)
}
int select_size_cell_r(int nbline) {
  int size;
  switch (nbline) {
  case 4:
    size = 2;
    break;
  case 6:
    size = 2;
    break;
  case 9:
    size = 3;
    break;
  case 12:
    size = 3;
    break;
  case 16:
    size = 4;
    break;
  default:
    size = 0;
  }
  return size;
}


x86 assembly (clang, -O0):
<select_size_cell_r>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xfffffffc,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0xc,%eax
ja     116c <select_size_cell_r+0x6c>
mov    -0x10(%rbp),%rax
lea    0xed9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x2,-0x8(%rbp)
jmp    1173 <select_size_cell_r+0x73>
movl   $0x2,-0x8(%rbp)
jmp    1173 <select_size_cell_r+0x73>
movl   $0x3,-0x8(%rbp)
jmp    1173 <select_size_cell_r+0x73>
movl   $0x3,-0x8(%rbp)
jmp    1173 <select_size_cell_r+0x73>
movl   $0x4,-0x8(%rbp)
jmp    1173 <select_size_cell_r+0x73>
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<select_size_cell_r>:
add    $0xfffffffc,%edi
cmp    $0xc,%edi
ja     1124 <select_size_cell_r+0x24>
mov    $0x2,%eax
lea    0xeec(%rip),%rcx
movslq (%rcx,%rdi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
ret
mov    $0x3,%eax
ret
xor    %eax,%eax
ret
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @select_size_cell_r(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
switch i32 %4, label %10 [
i32 4, label %5
i32 6, label %6
i32 9, label %7
i32 12, label %8
i32 16, label %9
]
5: ; preds = %1
store i32 2, i32* %3
br label %11
6: ; preds = %1
store i32 2, i32* %3
br label %11
7: ; preds = %1
store i32 3, i32* %3
br label %11
8: ; preds = %1
store i32 3, i32* %3
br label %11
9: ; preds = %1
store i32 4, i32* %3
br label %11
10: ; preds = %1
store i32 0, i32* %3
br label %11
11: ; preds = %10, %9, %8, %7, %6, %5
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @select_size_cell_r(i32 %0) {
switch i32 %0, label %5 [
i32 4, label %6
i32 6, label %6
i32 9, label %2
i32 12, label %3
i32 16, label %4
]
2: ; preds = %1
br label %6
3: ; preds = %1
br label %6
4: ; preds = %1
br label %6
5: ; preds = %1
br label %6
6: ; preds = %1, %1, %5, %4, %3, %2
%7 = phi i32 [ 0, %5 ], [ 4, %4 ], [ 3, %3 ], [ 3, %2 ], [ 2, %1 ], [ 2, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ f();
int main() {
  int a;
  int b;
  int x;
  int y;
  a = 42;
  b = 23;
  x = a & b;
  y = 42;
  y = y & b;
  f();
  if (x != y) {
  ERROR:
    goto ERROR;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x2a,-0x4(%rbp)
movl   $0x17,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
movl   $0x2a,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <f@plt>
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
je     115c <main+0x4c>
jmp    1157 <main+0x47>
jmp    1157 <main+0x47>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <f@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 42, i32* %1
store i32 23, i32* %2
%5 = load i32, i32* %1
%6 = load i32, i32* %2
%7 = and i32 %5, %6
store i32 %7, i32* %3
store i32 42, i32* %4
%8 = load i32, i32* %4
%9 = load i32, i32* %2
%10 = and i32 %8, %9
store i32 %10, i32* %4
%11 = call i32 (...) @f()
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = icmp ne i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %0
br label %16
16: ; preds = %16, %15
br label %16
17: ; preds = %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @f()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ glutBitmap9By15;
unsigned glob_glutBitmap9By15(void) { return (unsigned)&glutBitmap9By15; }


x86 assembly (clang, -O0):
<glob_glutBitmap9By15>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<glob_glutBitmap9By15>:
mov    0x2eda(%rip),%eax
ret

LLVM IR (-O0):
@glutBitmap9By15 = global i32 0
define i32 @glob_glutBitmap9By15() {
ret i32 ptrtoint (i32* @glutBitmap9By15 to i32)
}

LLVM IR (-O2):
@glutBitmap9By15 = global i32 0
define i32 @glob_glutBitmap9By15() {
ret i32 ptrtoint (i32* @glutBitmap9By15 to i32)
}
/* Variables and functions */
int strcmp(char const *, char const *);
int stroscmp(const char *s, const char *t) { return strcmp(s, t); }


x86 assembly (clang, -O0):
<stroscmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stroscmp>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @stroscmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @stroscmp(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
void INT_Excep_MTU9_TGIV9(void) {}


x86 assembly (clang, -O0):
<INT_Excep_MTU9_TGIV9>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_MTU9_TGIV9>:
ret

LLVM IR (-O0):
define void @INT_Excep_MTU9_TGIV9() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_MTU9_TGIV9() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ callee1(int, char *, double);
int /*<<< orphan*/ callme(int);
int /*<<< orphan*/ printf(char *);
main() {
  callee1(2, "A string argument.", 3.5);
  callee1(2, "A string argument.", 3.5);
  printf("Hello, World!");
  callme(1);
  callme(2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x2,%edi
lea    0xebd(%rip),%rsi
movsd  0xead(%rip),%xmm0
call   1030 <callee1@plt>
mov    $0x2,%edi
lea    0xea4(%rip),%rsi
movsd  0xe94(%rip),%xmm0
call   1030 <callee1@plt>
lea    0xea3(%rip),%rdi
call   1040 <printf@plt>
mov    $0x1,%edi
call   1050 <callme@plt>
mov    $0x2,%edi
call   1050 <callme@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xed0(%rip),%rbx
movsd  0xec0(%rip),%xmm0
mov    $0x2,%edi
mov    %rbx,%rsi
call   1030 <callee1@plt>
mov    $0x2,%edi
mov    %rbx,%rsi
movsd  0xea3(%rip),%xmm0
call   1030 <callee1@plt>
lea    0xeb2(%rip),%rdi
call   1040 <printf@plt>
mov    $0x1,%edi
call   1050 <callme@plt>
mov    $0x2,%edi
call   1050 <callme@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"A string argument.\00"
@.str.1 = [14 x i8] c"Hello, World!\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @callee1(i32 2, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), double 3.500000e+00)
%3 = call i32 @callee1(i32 2, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), double 3.500000e+00)
%4 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
%5 = call i32 @callme(i32 1)
%6 = call i32 @callme(i32 2)
ret i32 0
}

LLVM IR (-O2):
@.str = [19 x i8] c"A string argument.\00"
@.str.1 = [14 x i8] c"Hello, World!\00"
define i32 @main() {
%1 = tail call i32 @callee1(i32 2, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), double 3.500000e+00)
%2 = tail call i32 @callee1(i32 2, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), double 3.500000e+00)
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i32 @callme(i32 1)
%5 = tail call i32 @callme(i32 2)
ret i32 0
}
void csdF(signed char *x) { char *y = x; }


x86 assembly (clang, -O0):
<csdF>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<csdF>:
ret

LLVM IR (-O0):
define void @csdF(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
ret void
}

LLVM IR (-O2):
define void @csdF(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("What??!");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"What??!\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"What??!\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
void encrypt(char *message) {
  while (*message) {
    *message = *message ^ 25;
    message++;
  }
}


x86 assembly (clang, -O0):
<encrypt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1138 <encrypt+0x38>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
xor    $0x19,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <encrypt+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<encrypt>:
mov    (%rdi),%al
test   %al,%al
je     1120 <encrypt+0x20>
add    $0x1,%rdi
nopw   0x0(%rax,%rax,1)
xor    $0x19,%al
mov    %al,-0x1(%rdi)
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
jne    1110 <encrypt+0x10>
ret

LLVM IR (-O0):
define void @encrypt(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %16
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = xor i32 %10, 25
%12 = trunc i32 %11 to i8
%13 = load i8*, i8** %2
store i8 %12, i8* %13
%14 = load i8*, i8** %2
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %2
br label %3
16: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @encrypt(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = xor i8 %5, 25
store i8 %7, i8* %6
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ f(int volatile *);
int main(void) {
  volatile int x = 5;
  *(volatile int *)&x;
  f(&x);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
mov    -0x8(%rbp),%eax
lea    -0x8(%rbp),%rdi
call   1030 <f@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x5,0x4(%rsp)
mov    0x4(%rsp),%eax
lea    0x4(%rsp),%rdi
call   1030 <f@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store volatile i32 5, i32* %2
%3 = load volatile i32, i32* %2
%4 = call i32 @f(i32* %2)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store volatile i32 5, i32* %1
%3 = load volatile i32, i32* %1
%4 = call i32 @f(i32* %1)
ret i32 0
}
unsigned long long func3(unsigned long long a, unsigned long long b) {
  return !b ? a : a % b;
}


x86 assembly (clang, -O0):
<func3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1124 <func3+0x24>
mov    -0x8(%rbp),%rdx
mov    %rdx,-0x18(%rbp)
jmp    1134 <func3+0x34>
mov    -0x8(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func3>:
mov    %rdi,%rax
test   %rsi,%rsi
je     111c <func3+0x1c>
mov    %rax,%rcx
or     %rsi,%rcx
shr    $0x20,%rcx
je     111d <func3+0x1d>
xor    %edx,%edx
div    %rsi
mov    %rdx,%rax
ret
xor    %edx,%edx
div    %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i64 @func3(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = icmp ne i64 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = load i64, i64* %3
br label %13
9: ; preds = %2
%10 = load i64, i64* %3
%11 = load i64, i64* %4
%12 = urem i64 %10, %11
br label %13
13: ; preds = %9, %7
%14 = phi i64 [ %8, %7 ], [ %12, %9 ]
ret i64 %14
}

LLVM IR (-O2):
define i64 @func3(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = urem i64 %0, %1
br label %6
6: ; preds = %2, %4
%7 = phi i64 [ %5, %4 ], [ %0, %2 ]
ret i64 %7
}
/* Variables and functions */
unsigned int f13(unsigned int);
unsigned int f14(unsigned int a) { return f13(f13(a)); }


x86 assembly (clang, -O0):
<f14>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <f13@plt>
mov    %eax,%edi
call   1030 <f13@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f14>:
push   %rax
call   1030 <f13@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <f13@plt>

LLVM IR (-O0):
define i32 @f14(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @f13(i32 %3)
%5 = call i32 @f13(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @f14(i32 %0) {
%2 = tail call i32 @f13(i32 %0)
%3 = tail call i32 @f13(i32 %2)
ret i32 %3
}
/* Variables and functions */
int rom_present(char *);
int gd5428_isa_available(void) {
  return rom_present(L"roms/video/cirruslogic/5428.bin");
}


x86 assembly (clang, -O0):
<gd5428_isa_available>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <rom_present@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gd5428_isa_available>:
lea    0xee9(%rip),%rdi
jmp    1030 <rom_present@plt>

LLVM IR (-O0):
@.str = [32 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 99, i32 105, i32 114, i32 114, i32 117, i32 115, i32 108, i32 111, i32 103, i32 105, i32 99, i32 47, i32 53, i32 52, i32 50, i32 56, i32 46, i32 98, i32 105, i32 110, i32 0]
define i32 @gd5428_isa_available() {
%1 = call i32 @rom_present(i8* bitcast ([32 x i32]* @.str to i8*))
ret i32 %1
}

LLVM IR (-O2):
@.str = [32 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 99, i32 105, i32 114, i32 114, i32 117, i32 115, i32 108, i32 111, i32 103, i32 105, i32 99, i32 47, i32 53, i32 52, i32 50, i32 56, i32 46, i32 98, i32 105, i32 110, i32 0]
define i32 @gd5428_isa_available() {
%1 = tail call i32 @rom_present(i8* bitcast ([32 x i32]* @.str to i8*))
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ getIntegerArray();
int /*<<< orphan*/ printIntegerGraph();
int main(int argc, const char *argv[]) {
  getIntegerArray();
  printIntegerGraph();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <getIntegerArray@plt>
mov    $0x0,%al
call   1030 <printIntegerGraph@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <getIntegerArray@plt>
xor    %eax,%eax
call   1030 <printIntegerGraph@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @getIntegerArray()
%7 = call i32 (...) @printIntegerGraph()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @getIntegerArray()
%4 = tail call i32 (...) @printIntegerGraph()
ret i32 0
}
unsigned long insert_ral(unsigned long insn, long value,
                         int dialect __attribute__((unused)),
                         const char **errmsg) {
  if (value == 0 || (unsigned long)value == ((insn >> 21) & 0x1f))
    *errmsg = "invalid register operand when updating";
  return insn | ((value & 0x1f) << 16);
}


x86 assembly (clang, -O0):
<insert_ral>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1137 <insert_ral+0x37>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
shr    $0x15,%rcx
and    $0x1f,%rcx
cmp    %rcx,%rax
jne    1145 <insert_ral+0x45>
mov    -0x20(%rbp),%rax
lea    0xebe(%rip),%rcx
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
and    $0x1f,%rcx
shl    $0x10,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<insert_ral>:
mov    %rsi,%rax
test   %rsi,%rsi
je     1115 <insert_ral+0x15>
mov    %edi,%edx
shr    $0x15,%edx
and    $0x1f,%edx
cmp    %rax,%rdx
jne    111f <insert_ral+0x1f>
lea    0xee4(%rip),%rdx
mov    %rdx,(%rcx)
and    $0x1f,%eax
shl    $0x10,%rax
or     %rdi,%rax
ret

LLVM IR (-O0):
@.str = [39 x i8] c"invalid register operand when updating\00"
define i64 @insert_ral(i64 %0, i64 %1, i32 %2, i8** %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i32
%8 = alloca i8**
store i64 %0, i64* %5
store i64 %1, i64* %6
store i32 %2, i32* %7
store i8** %3, i8*** %8
%9 = load i64, i64* %6
%10 = icmp eq i64 %9, 0
br i1 %10, label %17, label %11
11: ; preds = %4
%12 = load i64, i64* %6
%13 = load i64, i64* %5
%14 = lshr i64 %13, 21
%15 = and i64 %14, 31
%16 = icmp eq i64 %12, %15
br i1 %16, label %17, label %19
17: ; preds = %11, %4
%18 = load i8**, i8*** %8
store i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i8** %18
br label %19
19: ; preds = %17, %11
%20 = load i64, i64* %5
%21 = load i64, i64* %6
%22 = and i64 %21, 31
%23 = shl i64 %22, 16
%24 = or i64 %20, %23
ret i64 %24
}

LLVM IR (-O2):
@.str = [39 x i8] c"invalid register operand when updating\00"
define i64 @insert_ral(i64 %0, i64 %1, i32 %2, i8** nocapture writeonly %3) {
%5 = icmp eq i64 %1, 0
br i1 %5, label %10, label %6
6: ; preds = %4
%7 = lshr i64 %0, 21
%8 = and i64 %7, 31
%9 = icmp eq i64 %8, %1
br i1 %9, label %10, label %11
10: ; preds = %6, %4
store i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i8** %3
br label %11
11: ; preds = %10, %6
%12 = shl i64 %1, 16
%13 = and i64 %12, 2031616
%14 = or i64 %13, %0
ret i64 %14
}
struct timeval *dhcp_timeleft(struct dhcp_t *this, struct timeval *tvp) {
  return tvp;
}


x86 assembly (clang, -O0):
<dhcp_timeleft>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dhcp_timeleft>:
mov    %rsi,%rax
ret

LLVM IR (-O0):
%struct.dhcp_t = type opaque
%struct.timeval = type opaque
define %struct.timeval* @dhcp_timeleft(%struct.dhcp_t* %0, %struct.timeval* %1) {
%3 = alloca %struct.dhcp_t*
%4 = alloca %struct.timeval*
store %struct.dhcp_t* %0, %struct.dhcp_t** %3
store %struct.timeval* %1, %struct.timeval** %4
%5 = load %struct.timeval*, %struct.timeval** %4
ret %struct.timeval* %5
}

LLVM IR (-O2):
%struct.dhcp_t = type opaque
%struct.timeval = type opaque
define %struct.timeval* @dhcp_timeleft(%struct.dhcp_t* nocapture readnone %0, %struct.timeval* readnone returned %1) {
ret %struct.timeval* %1
}
/* Variables and functions */
unsigned long clk_get_ddr_rate();
unsigned long clk_get_apb_rate(void) { return clk_get_ddr_rate(); }


x86 assembly (clang, -O0):
<clk_get_apb_rate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <clk_get_ddr_rate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clk_get_apb_rate>:
xor    %eax,%eax
jmp    1030 <clk_get_ddr_rate@plt>

LLVM IR (-O0):
define i64 @clk_get_apb_rate() {
%1 = call i64 (...) @clk_get_ddr_rate()
ret i64 %1
}

LLVM IR (-O2):
define i64 @clk_get_apb_rate() {
%1 = tail call i64 (...) @clk_get_ddr_rate()
ret i64 %1
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
int unlink(const char *pathname) {
  fprintf(stderr, "\nAccess to dangerous function %s() denied.\n", "unlink");
  assert(0);
  ;
}


x86 assembly (clang, -O0):
<unlink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
lea    0xec4(%rip),%rsi
lea    0xee9(%rip),%rdx
call   1040 <fprintf@plt>
xor    %edi,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unlink>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
lea    0xef4(%rip),%rdx
call   1040 <fprintf@plt>
xor    %edi,%edi
pop    %rax
jmp    1030 <assert@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [44 x i8] c"\0AAccess to dangerous function %s() denied.\0A\00"
@.str.1 = [7 x i8] c"unlink\00"
define i32 @unlink(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i32, i32* @stderr
%5 = call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%6 = call i32 @assert(i32 0)
%7 = load i32, i32* %2
ret i32 %7
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [44 x i8] c"\0AAccess to dangerous function %s() denied.\0A\00"
@.str.1 = [7 x i8] c"unlink\00"
define i32 @unlink(i8* nocapture readnone %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i32 @assert(i32 0)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *);
void show_version(void) {
  printf("plpa_taskset version %s\n", "1.3.2");
  exit(0);
}


x86 assembly (clang, -O0):
<show_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xee7(%rip),%rsi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<show_version>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xeea(%rip),%rsi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"plpa_taskset version %s\0A\00"
@.str.1 = [6 x i8] c"1.3.2\00"
define void @show_version() {
%1 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [25 x i8] c"plpa_taskset version %s\0A\00"
@.str.1 = [6 x i8] c"1.3.2\00"
define void @show_version() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @exit(i32 0)
unreachable
}
unsigned short t1(unsigned short w) {
  if ((w & 0xff00) == 0) {
    if (w == 0)
      w = 2;
  }
  return w;
}


x86 assembly (clang, -O0):
<t1>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
and    $0xff00,%eax
cmp    $0x0,%eax
jne    1135 <t1+0x35>
movzwl -0x2(%rbp),%eax
cmp    $0x0,%eax
jne    1130 <t1+0x30>
movw   $0x2,-0x2(%rbp)
jmp    1135 <t1+0x35>
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<t1>:
test   %edi,%edi
mov    $0x2,%eax
cmovne %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @t1(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 65280
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %1
%8 = load i16, i16* %2
%9 = zext i16 %8 to i32
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7
store i16 2, i16* %2
br label %12
12: ; preds = %11, %7
br label %13
13: ; preds = %12, %1
%14 = load i16, i16* %2
ret i16 %14
}

LLVM IR (-O2):
define zeroext i16 @t1(i16 zeroext %0) {
%2 = icmp eq i16 %0, 0
%3 = select i1 %2, i16 2, i16 %0
ret i16 %3
}
int cstring_at_black(const char *str) {
  int c = (unsigned char)*str;
  return (c > 0x20);
}


x86 assembly (clang, -O0):
<cstring_at_black>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x20,-0xc(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cstring_at_black>:
xor    %eax,%eax
cmpb   $0x21,(%rdi)
setae  %al
ret

LLVM IR (-O0):
define i32 @cstring_at_black(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 32
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @cstring_at_black(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp ugt i8 %2, 32
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ HMAC_CTX;

/* Variables and functions */
int /*<<< orphan*/ HMAC_CTX_cleanup(int /*<<< orphan*/ *);
int /*<<< orphan*/ g_free(int /*<<< orphan*/ *);
void ssl_hmac_info_delete(void *hmac) {
  HMAC_CTX *hmac_ctx;
  hmac_ctx = (HMAC_CTX *)hmac;
  if (hmac_ctx != 0) {
    HMAC_CTX_cleanup(hmac_ctx);
    g_free(hmac_ctx);
  }
}


x86 assembly (clang, -O0):
<ssl_hmac_info_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1151 <ssl_hmac_info_delete+0x31>
mov    -0x10(%rbp),%rdi
call   1040 <HMAC_CTX_cleanup@plt>
mov    -0x10(%rbp),%rdi
call   1030 <g_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssl_hmac_info_delete>:
test   %rdi,%rdi
je     1137 <ssl_hmac_info_delete+0x17>
push   %rbx
mov    %rdi,%rbx
call   1040 <HMAC_CTX_cleanup@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <g_free@plt>
ret

LLVM IR (-O0):
define void @ssl_hmac_info_delete(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = icmp ne i32* %6, null
br i1 %7, label %8, label %13
8: ; preds = %1
%9 = load i32*, i32** %3
%10 = call i32 @HMAC_CTX_cleanup(i32* %9)
%11 = load i32*, i32** %3
%12 = call i32 @g_free(i32* %11)
br label %13
13: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @ssl_hmac_info_delete(i8* %0) {
%2 = bitcast i8* %0 to i32*
%3 = icmp eq i8* %0, null
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @HMAC_CTX_cleanup(i32* %2)
%6 = tail call i32 @g_free(i32* %2)
br label %7
7: ; preds = %4, %1
ret void
}
/* Variables and functions */
unsigned int UARTRegConfigModeEnable(unsigned int, int);
unsigned int UARTFIFOEnableStatusGet(unsigned int baseAdd) {
  unsigned int lcrRegValue = 0;
  unsigned int retVal = 0;
  lcrRegValue = UARTRegConfigModeEnable(baseAdd, (0x007F));
  if ((*((volatile unsigned int *)(baseAdd + (0x8)))) & (0x000000C0u)) {
    retVal = 1;
  }
  (*((volatile unsigned int *)(baseAdd + (0xC)))) = lcrRegValue;
  return retVal;
}


x86 assembly (clang, -O0):
<UARTFIFOEnableStatusGet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x7f,%esi
call   1030 <UARTRegConfigModeEnable@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x8,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0xc0,%eax
cmp    $0x0,%eax
je     1158 <UARTFIFOEnableStatusGet+0x48>
movl   $0x1,-0xc(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0xc,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTFIFOEnableStatusGet>:
push   %rbx
mov    %edi,%ebx
mov    $0x7f,%esi
call   1030 <UARTRegConfigModeEnable@plt>
lea    0x8(%rbx),%edx
xor    %ecx,%ecx
testl  $0xc0,(%rdx)
setne  %cl
add    $0xc,%ebx
mov    %eax,(%rbx)
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @UARTFIFOEnableStatusGet(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
%5 = load i32, i32* %2
%6 = call i32 @UARTRegConfigModeEnable(i32 %5, i32 127)
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = add i32 %7, 8
%9 = zext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
%11 = load volatile i32, i32* %10
%12 = and i32 %11, 192
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %1
store i32 1, i32* %4
br label %15
15: ; preds = %14, %1
%16 = load i32, i32* %3
%17 = load i32, i32* %2
%18 = add i32 %17, 12
%19 = zext i32 %18 to i64
%20 = inttoptr i64 %19 to i32*
store volatile i32 %16, i32* %20
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @UARTFIFOEnableStatusGet(i32 %0) {
%2 = tail call i32 @UARTRegConfigModeEnable(i32 %0, i32 127)
%3 = add i32 %0, 8
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, 192
%8 = icmp ne i32 %7, 0
%9 = zext i1 %8 to i32
%10 = add i32 %0, 12
%11 = zext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
store volatile i32 %2, i32* %12
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ explicit_bzero_safe(void *, size_t);
size_t malloc_usable_size(void *);
void *mfree(void *);
void *erase_and_free(void *p) {
  size_t l;
  if (!p)
    return NULL;
  l = malloc_usable_size(p);
  explicit_bzero_safe(p, l);
  return mfree(p);
}


x86 assembly (clang, -O0):
<erase_and_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1154 <erase_and_free+0x24>
movq   $0x0,-0x8(%rbp)
jmp    117b <erase_and_free+0x4b>
mov    -0x10(%rbp),%rdi
call   1030 <malloc_usable_size@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <explicit_bzero_safe@plt>
mov    -0x10(%rbp),%rdi
call   1050 <mfree@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<erase_and_free>:
test   %rdi,%rdi
je     1152 <erase_and_free+0x22>
push   %rbx
mov    %rdi,%rbx
call   1030 <malloc_usable_size@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
call   1040 <explicit_bzero_safe@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1050 <mfree@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @erase_and_free(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %8, label %7
7: ; preds = %1
store i8* null, i8** %2
br label %16
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i64 @malloc_usable_size(i8* %9)
store i64 %10, i64* %4
%11 = load i8*, i8** %3
%12 = load i64, i64* %4
%13 = call i32 @explicit_bzero_safe(i8* %11, i64 %12)
%14 = load i8*, i8** %3
%15 = call i8* @mfree(i8* %14)
store i8* %15, i8** %2
br label %16
16: ; preds = %8, %7
%17 = load i8*, i8** %2
ret i8* %17
}

LLVM IR (-O2):
define i8* @erase_and_free(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i64 @malloc_usable_size(i8* %0)
%5 = tail call i32 @explicit_bzero_safe(i8* %0, i64 %4)
%6 = tail call i8* @mfree(i8* %0)
br label %7
7: ; preds = %1, %3
%8 = phi i8* [ %6, %3 ], [ null, %1 ]
ret i8* %8
}
unsigned long _dl_elf_hash(const unsigned char *name) {
  unsigned long hash = 0;
  unsigned long tmp;
  while (*name) {
    hash = (hash << 4) + *name++;
    if ((tmp = hash & 0xf0000000))
      hash ^= tmp >> 24;
    hash &= ~tmp;
  }
  return hash;
}


x86 assembly (clang, -O0):
<_dl_elf_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     117f <_dl_elf_hash+0x7f>
mov    -0x10(%rbp),%rax
shl    $0x4,%rax
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movzbl (%rcx),%ecx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
movabs $0xf0000000,%rax
and    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
je     116a <_dl_elf_hash+0x6a>
mov    -0x18(%rbp),%rax
shr    $0x18,%rax
xor    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
xor    $0xffffffffffffffff,%rax
and    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <_dl_elf_hash+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dl_elf_hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     113d <_dl_elf_hash+0x3d>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
shl    $0x4,%rax
movzbl %cl,%ecx
add    %rax,%rcx
mov    %ecx,%eax
and    $0xf0000000,%eax
mov    %rax,%rdx
shr    $0x18,%rdx
xor    %rcx,%rdx
not    %rax
and    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <_dl_elf_hash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @_dl_elf_hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %5
5: ; preds = %25, %1
%6 = load i8*, i8** %2
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %30
9: ; preds = %5
%10 = load i64, i64* %3
%11 = shl i64 %10, 4
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %2
%14 = load i8, i8* %12
%15 = zext i8 %14 to i64
%16 = add i64 %11, %15
store i64 %16, i64* %3
%17 = load i64, i64* %3
%18 = and i64 %17, 4026531840
store i64 %18, i64* %4
%19 = icmp ne i64 %18, 0
br i1 %19, label %20, label %25
20: ; preds = %9
%21 = load i64, i64* %4
%22 = lshr i64 %21, 24
%23 = load i64, i64* %3
%24 = xor i64 %23, %22
store i64 %24, i64* %3
br label %25
25: ; preds = %20, %9
%26 = load i64, i64* %4
%27 = xor i64 %26, -1
%28 = load i64, i64* %3
%29 = and i64 %28, %27
store i64 %29, i64* %3
br label %5
30: ; preds = %5
%31 = load i64, i64* %3
ret i64 %31
}

LLVM IR (-O2):
define i64 @_dl_elf_hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %19, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %17, %4 ], [ %2, %1 ]
%6 = phi i8* [ %9, %4 ], [ %0, %1 ]
%7 = phi i64 [ %16, %4 ], [ 0, %1 ]
%8 = shl i64 %7, 4
%9 = getelementptr inbounds i8, i8* %6, i64 1
%10 = zext i8 %5 to i64
%11 = add i64 %8, %10
%12 = and i64 %11, 4026531840
%13 = lshr exact i64 %12, 24
%14 = xor i64 %13, %11
%15 = xor i64 %12, -1
%16 = and i64 %14, %15
%17 = load i8, i8* %9
%18 = icmp eq i8 %17, 0
br i1 %18, label %19, label %4
19: ; preds = %4, %1
%20 = phi i64 [ 0, %1 ], [ %16, %4 ]
ret i64 %20
}
/* Type definitions */
typedef int /*<<< orphan*/ a;

/* Variables and functions */
int cutrod(int *, int);
int /*<<< orphan*/ printf(char *, int);
void main() {
  int a[] = {1, 5, 8, 9, 10, 17, 17, 20};
  int len = sizeof(a) / sizeof(a[0]);
  printf("Max obtainable price is %d", cutrod(a, len - 1));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0xed1(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xece(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xecb(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xec8(%rip),%rax
mov    %rax,-0x8(%rbp)
movl   $0x8,-0x24(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%esi
sub    $0x1,%esi
call   1030 <cutrod@plt>
mov    %eax,%esi
lea    0xead(%rip),%rdi
call   1040 <printf@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
movaps 0xee5(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xec9(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x7,%esi
call   1030 <cutrod@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.main.a = [8 x i32] [i32 1, i32 5, i32 8, i32 9, i32 10, i32 17, i32 17, i32 20]
@.str = [27 x i8] c"Max obtainable price is %d\00"
define void @main() {
%1 = alloca [8 x i32]
%2 = alloca i32
%3 = bitcast [8 x i32]* %1 to i8*
store i32 8, i32* %2
%4 = getelementptr inbounds [8 x i32], [8 x i32]* %1, i64 0, i64 0
%5 = load i32, i32* %2
%6 = sub nsw i32 %5, 1
%7 = call i32 @cutrod(i32* %4, i32 %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
@__const.main.a = [8 x i32] [i32 1, i32 5, i32 8, i32 9, i32 10, i32 17, i32 17, i32 20]
@.str = [27 x i8] c"Max obtainable price is %d\00"
define void @main() {
%1 = alloca [8 x i32]
%2 = bitcast [8 x i32]* %1 to i8*
%3 = getelementptr inbounds [8 x i32], [8 x i32]* %1, i64 0, i64 0
%4 = call i32 @cutrod(i32* %3, i32 7)
%5 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}
/* Type definitions */
typedef scalar_t__ key_t;

/* Variables and functions */
int /*<<< orphan*/ IPC_RMID;
int shmctl(int, int /*<<< orphan*/, int /*<<< orphan*/ *);
int shmget(scalar_t__, int /*<<< orphan*/, int /*<<< orphan*/);
int shmrm(key_t key, int id) {
  if (key) {
    id = shmget(key, 0, 0);
    if (id == -1)
      return -1;
  }
  return shmctl(id, IPC_RMID, NULL);
}


x86 assembly (clang, -O0):
<shmrm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1165 <shmrm+0x45>
mov    -0x10(%rbp),%rdi
xor    %edx,%edx
mov    %edx,%esi
call   1040 <shmget@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xffffffff,-0x14(%rbp)
jne    1160 <shmrm+0x40>
movl   $0xffffffff,-0x4(%rbp)
jmp    117d <shmrm+0x5d>
jmp    1165 <shmrm+0x45>
mov    -0x14(%rbp),%edi
mov    0x2e71(%rip),%rax
mov    (%rax),%esi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <shmctl@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmrm>:
push   %rax
test   %rdi,%rdi
je     1136 <shmrm+0x16>
xor    %esi,%esi
xor    %edx,%edx
call   1040 <shmget@plt>
mov    %eax,%esi
cmp    $0xffffffff,%eax
je     114b <shmrm+0x2b>
mov    0x2ea3(%rip),%rax
mov    (%rax),%eax
mov    %esi,%edi
mov    %eax,%esi
xor    %edx,%edx
pop    %rax
jmp    1030 <shmctl@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@IPC_RMID = global i32 0
define i32 @shmrm(i64 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i32
store i64 %0, i64* %4
store i32 %1, i32* %5
%6 = load i64, i64* %4
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %2
%9 = load i64, i64* %4
%10 = call i32 @shmget(i64 %9, i32 0, i32 0)
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = icmp eq i32 %11, -1
br i1 %12, label %13, label %14
13: ; preds = %8
store i32 -1, i32* %3
br label %19
14: ; preds = %8
br label %15
15: ; preds = %14, %2
%16 = load i32, i32* %5
%17 = load i32, i32* @IPC_RMID
%18 = call i32 @shmctl(i32 %16, i32 %17, i32* null)
store i32 %18, i32* %3
br label %19
19: ; preds = %15, %13
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
@IPC_RMID = global i32 0
define i32 @shmrm(i64 %0, i32 %1) {
%3 = icmp eq i64 %0, 0
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = tail call i32 @shmget(i64 %0, i32 0, i32 0)
%6 = icmp eq i32 %5, -1
br i1 %6, label %11, label %7
7: ; preds = %4, %2
%8 = phi i32 [ %5, %4 ], [ %1, %2 ]
%9 = load i32, i32* @IPC_RMID
%10 = tail call i32 @shmctl(i32 %8, i32 %9, i32* null)
br label %11
11: ; preds = %4, %7
%12 = phi i32 [ %10, %7 ], [ -1, %4 ]
ret i32 %12
}
/* Type definitions */
struct UserThreadIterator {
  int dummy;
};
struct UserThreadCollection {
  int dummy;
};

/* Variables and functions */
struct UserThreadIterator *
new_UserThreadIterator(struct UserThreadCollection *);
struct UserThreadIterator *
Collection_iterator(struct UserThreadCollection *this) {
  return new_UserThreadIterator(this);
}


x86 assembly (clang, -O0):
<Collection_iterator>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <new_UserThreadIterator@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Collection_iterator>:
jmp    1030 <new_UserThreadIterator@plt>

LLVM IR (-O0):
%struct.UserThreadIterator = type { i32 }
%struct.UserThreadCollection = type { i32 }
define %struct.UserThreadIterator* @Collection_iterator(%struct.UserThreadCollection* %0) {
%2 = alloca %struct.UserThreadCollection*
store %struct.UserThreadCollection* %0, %struct.UserThreadCollection** %2
%3 = load %struct.UserThreadCollection*, %struct.UserThreadCollection** %2
%4 = call %struct.UserThreadIterator* @new_UserThreadIterator(%struct.UserThreadCollection* %3)
ret %struct.UserThreadIterator* %4
}

LLVM IR (-O2):
%struct.UserThreadIterator = type { i32 }
%struct.UserThreadCollection = type { i32 }
define %struct.UserThreadIterator* @Collection_iterator(%struct.UserThreadCollection* %0) {
%2 = tail call %struct.UserThreadIterator* @new_UserThreadIterator(%struct.UserThreadCollection* %0)
ret %struct.UserThreadIterator* %2
}
int test_imm_7Auint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0x7A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Auint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0x7a,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Auint64_highword_reg>:
movabs $0x7a00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Auint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 122
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_7Auint64_highword_reg(i64 %0) {
%2 = and i64 %0, 523986010112
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long *supported_styles;
};
typedef TYPE_1__ XIMStyles;

/* Variables and functions */
void set_XIMStyles_supported_styles(void *_p, void *_v) {
  ((XIMStyles *)_p)->supported_styles = (unsigned long *)_v;
}


x86 assembly (clang, -O0):
<set_XIMStyles_supported_styles>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XIMStyles_supported_styles>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64* }
define void @set_XIMStyles_supported_styles(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i64*
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to %struct.TYPE_2__*
%9 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %8, i32 0, i32 0
store i64* %6, i64** %9
ret void
}

LLVM IR (-O2):
define void @set_XIMStyles_supported_styles(i8* nocapture writeonly %0, i8* %1) {
%3 = bitcast i8* %0 to i8**
store i8* %1, i8** %3
ret void
}
/* Variables and functions */
void *c1(size_t);
void *d2(size_t n) { return c1(n); }


x86 assembly (clang, -O0):
<d2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <c1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2>:
jmp    1030 <c1@plt>

LLVM IR (-O0):
define i8* @d2(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @c1(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @d2(i64 %0) {
%2 = tail call i8* @c1(i64 %0)
ret i8* %2
}
void gtk_button_get_label() {}


x86 assembly (clang, -O0):
<gtk_button_get_label>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_button_get_label>:
ret

LLVM IR (-O0):
define void @gtk_button_get_label() {
ret void
}

LLVM IR (-O2):
define void @gtk_button_get_label() {
ret void
}
/* Variables and functions */
int pl011_tstc();
int serial_tstc(void) { return pl011_tstc(); }


x86 assembly (clang, -O0):
<serial_tstc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <pl011_tstc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_tstc>:
xor    %eax,%eax
jmp    1030 <pl011_tstc@plt>

LLVM IR (-O0):
define i32 @serial_tstc() {
%1 = call i32 (...) @pl011_tstc()
ret i32 %1
}

LLVM IR (-O2):
define i32 @serial_tstc() {
%1 = tail call i32 (...) @pl011_tstc()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0xfa() {
  Assert_real((iscntrl(250) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              1255, ("iscntrl should be 0 for 0xfa"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0xfa>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfa,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4e7,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0xfa>:
push   %rax
mov    $0xfa,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4e7,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 0 for 0xfa\00"
define void @t_iscntrl_0xfa() {
%1 = call i64 @iscntrl(i32 250)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1255, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 0 for 0xfa\00"
define void @t_iscntrl_0xfa() {
%1 = tail call i64 @iscntrl(i32 250)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1255, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}