xunge/DecIR huggingface dataset:
/* Type definitions */
struct termios {
  int /*<<< orphan*/ c_ispeed;
};
typedef int /*<<< orphan*/ speed_t;

/* Variables and functions */
speed_t cfgetispeed(const struct termios *termios_p) {
  return termios_p->c_ispeed;
}


x86 assembly (clang, -O0):
<cfgetispeed>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfgetispeed>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.termios = type { i32 }
define i32 @cfgetispeed(%struct.termios* %0) {
%2 = alloca %struct.termios*
store %struct.termios* %0, %struct.termios** %2
%3 = load %struct.termios*, %struct.termios** %2
%4 = getelementptr inbounds %struct.termios, %struct.termios* %3, i32 0, i32 0
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
%struct.termios = type { i32 }
define i32 @cfgetispeed(%struct.termios* nocapture %0) {
%2 = getelementptr inbounds %struct.termios, %struct.termios* %0, i64 0, i32 0
%3 = load i32, i32* %2
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int vfscanf(FILE *file, const char *format, va_list parameters) {
  (void)(file);
  (void)(format);
  (void)(parameters);
  return 0;
}


x86 assembly (clang, -O0):
<vfscanf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vfscanf>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @vfscanf(i32* %0, i8* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @vfscanf(i32* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ mode;
};
typedef TYPE_1__ XCrossingEvent;

/* Variables and functions */
int get_XCrossingEvent_mode(void *_p) {
  return (int)((XCrossingEvent *)_p)->mode;
}


x86 assembly (clang, -O0):
<get_XCrossingEvent_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XCrossingEvent_mode>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XCrossingEvent_mode(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XCrossingEvent_mode(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
void test_invalid_clause() {
  int i;
#pragma omp parallel
#pragma omp for foo bar
  for (i = 0; i < 16; ++i)
    ;
}


x86 assembly (clang, -O0):
<test_invalid_clause>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1128 <test_invalid_clause+0x28>
jmp    111a <test_invalid_clause+0x1a>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <test_invalid_clause+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_invalid_clause>:
ret

LLVM IR (-O0):
define void @test_invalid_clause() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %6, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 16
br i1 %4, label %5, label %9
5: ; preds = %2
br label %6
6: ; preds = %5
%7 = load i32, i32* %1
%8 = add nsw i32 %7, 1
store i32 %8, i32* %1
br label %2
9: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @test_invalid_clause() {
ret void
}
int leap(int year) {
  int leap;
  leap = year % 4 == 0 && year % 100 != 0 || year % 400 == 0;
  return (leap);
}


x86 assembly (clang, -O0):
<leap>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1134 <leap+0x34>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    $0x1,%al
cmp    $0x0,%edx
mov    %al,-0x9(%rbp)
jne    1148 <leap+0x48>
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<leap>:
test   $0x3,%dil
jne    112c <leap+0x2c>
movslq %edi,%rax
imul   $0x51eb851f,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x25,%rax
add    %ecx,%eax
imul   $0x64,%eax,%ecx
mov    %edi,%edx
mov    $0x1,%eax
sub    %ecx,%edx
je     112c <leap+0x2c>
ret
imul   $0xc28f5c29,%edi,%ecx
add    $0x51eb850,%ecx
ror    $0x4,%ecx
xor    %eax,%eax
cmp    $0xa3d70b,%ecx
setb   %al
ret

LLVM IR (-O0):
define i32 @leap(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = srem i32 %4, 4
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i32, i32* %2
%9 = srem i32 %8, 100
%10 = icmp ne i32 %9, 0
br i1 %10, label %15, label %11
11: ; preds = %7, %1
%12 = load i32, i32* %2
%13 = srem i32 %12, 400
%14 = icmp eq i32 %13, 0
br label %15
15: ; preds = %11, %7
%16 = phi i1 [ true, %7 ], [ %14, %11 ]
%17 = zext i1 %16 to i32
store i32 %17, i32* %3
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @leap(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp ne i32 %2, 0
%4 = srem i32 %0, 100
%5 = icmp eq i32 %4, 0
%6 = or i1 %3, %5
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = srem i32 %0, 400
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %1, %7
%12 = phi i32 [ %10, %7 ], [ 1, %1 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ init(int, char **);
int main(int argc, char **argv) {
  init(argc, argv);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <init@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <init@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @init(i32 %6, i8** %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @init(i32 %0, i8** %1)
ret i32 0
}
void foo_1_1_1_2_1_1_2_1_2() {}


x86 assembly (clang, -O0):
<foo_1_1_1_2_1_1_2_1_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_1_1_1_2_1_1_2_1_2>:
ret

LLVM IR (-O0):
define void @foo_1_1_1_2_1_1_2_1_2() {
ret void
}

LLVM IR (-O2):
define void @foo_1_1_1_2_1_1_2_1_2() {
ret void
}
unsigned int simplerng_getuint_pr(unsigned int *u, unsigned int *v) {
  *v = 36969 * ((*v) & 65535) + ((*v) >> 16);
  *u = 18000 * ((*u) & 65535) + ((*u) >> 16);
  return ((*v) << 16) + (*u);
}


x86 assembly (clang, -O0):
<simplerng_getuint_pr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
and    $0xffff,%eax
imul   $0x9069,%eax,%ecx
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
shr    $0x10,%eax
add    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0xffff,%eax
imul   $0x4650,%eax,%ecx
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shr    $0x10,%eax
add    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
add    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<simplerng_getuint_pr>:
mov    (%rsi),%eax
movzwl %ax,%ecx
imul   $0x9069,%ecx,%ecx
shr    $0x10,%eax
add    %ecx,%eax
mov    %eax,(%rsi)
mov    (%rdi),%ecx
movzwl %cx,%eax
imul   $0x4650,%eax,%eax
shr    $0x10,%ecx
add    %eax,%ecx
mov    %ecx,(%rdi)
mov    (%rsi),%eax
shl    $0x10,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @simplerng_getuint_pr(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = load i32, i32* %5
%7 = and i32 %6, 65535
%8 = mul i32 36969, %7
%9 = load i32*, i32** %4
%10 = load i32, i32* %9
%11 = lshr i32 %10, 16
%12 = add i32 %8, %11
%13 = load i32*, i32** %4
store i32 %12, i32* %13
%14 = load i32*, i32** %3
%15 = load i32, i32* %14
%16 = and i32 %15, 65535
%17 = mul i32 18000, %16
%18 = load i32*, i32** %3
%19 = load i32, i32* %18
%20 = lshr i32 %19, 16
%21 = add i32 %17, %20
%22 = load i32*, i32** %3
store i32 %21, i32* %22
%23 = load i32*, i32** %4
%24 = load i32, i32* %23
%25 = shl i32 %24, 16
%26 = load i32*, i32** %3
%27 = load i32, i32* %26
%28 = add i32 %25, %27
ret i32 %28
}

LLVM IR (-O2):
define i32 @simplerng_getuint_pr(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = and i32 %3, 65535
%5 = mul nuw i32 %4, 36969
%6 = lshr i32 %3, 16
%7 = add nuw i32 %5, %6
store i32 %7, i32* %1
%8 = load i32, i32* %0
%9 = and i32 %8, 65535
%10 = mul nuw nsw i32 %9, 18000
%11 = lshr i32 %8, 16
%12 = add nuw nsw i32 %10, %11
store i32 %12, i32* %0
%13 = load i32, i32* %1
%14 = shl i32 %13, 16
%15 = add i32 %14, %12
ret i32 %15
}
int fk_t_mouse(int *g) { return (0); }


x86 assembly (clang, -O0):
<fk_t_mouse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fk_t_mouse>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fk_t_mouse(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @fk_t_mouse(i32* nocapture readnone %0) {
ret i32 0
}
void foo(int a, int b, int *p, int *q, int task) {
  int i;
#pragma omp parallel if (a) if (b)
  ;
#pragma omp parallel if (a) if (parallel : b)
  ;
#pragma omp parallel if (parallel : a) if (b)
  ;
#pragma omp parallel if (parallel : a) if (parallel : a)
  ;
#pragma omp parallel if (task : a) if (taskloop : b)
  ;
#pragma omp parallel if (target update : a)
  ;
#pragma omp parallel for simd if (target update : a)
  for (i = 0; i < 16; i++)
    ;
#pragma omp task if (task)
  ;
#pragma omp task if (task : task)
  ;
#pragma omp task if (parallel : a)
  ;
#pragma omp taskloop if (task : a)
  for (i = 0; i < 16; i++)
    ;
#pragma omp target if (taskloop : a)
  ;
#pragma omp target teams distribute parallel for simd if (target exit data : a)
  for (i = 0; i < 16; i++)
    ;
#pragma omp target data if (target : a) map(p [0:2])
  ;
#pragma omp target enter data if (target data : a) map(to : p [0:2])
#pragma omp target exit data if (target enter data : a) map(from : p [0:2])
#pragma omp target update if (target exit data : a) to(q [0:3])
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
movl   $0x0,-0x20(%rbp)
cmpl   $0x10,-0x20(%rbp)
jge    113a <foo+0x3a>
jmp    112c <foo+0x2c>
mov    -0x20(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    111d <foo+0x1d>
movl   $0x0,-0x20(%rbp)
cmpl   $0x10,-0x20(%rbp)
jge    115e <foo+0x5e>
jmp    1150 <foo+0x50>
mov    -0x20(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    1141 <foo+0x41>
movl   $0x0,-0x20(%rbp)
cmpl   $0x10,-0x20(%rbp)
jge    1182 <foo+0x82>
jmp    1174 <foo+0x74>
mov    -0x20(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    1165 <foo+0x65>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo(i32 %0, i32 %1, i32* %2, i32* %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca i32
%11 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32* %2, i32** %8
store i32* %3, i32** %9
store i32 %4, i32* %10
store i32 0, i32* %11
br label %12
12: ; preds = %16, %5
%13 = load i32, i32* %11
%14 = icmp slt i32 %13, 16
br i1 %14, label %15, label %19
15: ; preds = %12
br label %16
16: ; preds = %15
%17 = load i32, i32* %11
%18 = add nsw i32 %17, 1
store i32 %18, i32* %11
br label %12
19: ; preds = %12
store i32 0, i32* %11
br label %20
20: ; preds = %24, %19
%21 = load i32, i32* %11
%22 = icmp slt i32 %21, 16
br i1 %22, label %23, label %27
23: ; preds = %20
br label %24
24: ; preds = %23
%25 = load i32, i32* %11
%26 = add nsw i32 %25, 1
store i32 %26, i32* %11
br label %20
27: ; preds = %20
store i32 0, i32* %11
br label %28
28: ; preds = %32, %27
%29 = load i32, i32* %11
%30 = icmp slt i32 %29, 16
br i1 %30, label %31, label %35
31: ; preds = %28
br label %32
32: ; preds = %31
%33 = load i32, i32* %11
%34 = add nsw i32 %33, 1
store i32 %34, i32* %11
br label %28
35: ; preds = %28
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0, i32 %1, i32* nocapture %2, i32* nocapture %3, i32 %4) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CMT1_delay_core(int, int);
void CMT1_delay_100us(int n) { CMT1_delay_core(250, n); }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0xfa,%edi
call   1030 <CMT1_delay_core@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    %edi,%esi
mov    $0xfa,%edi
jmp    1030 <CMT1_delay_core@plt>

LLVM IR (-O0):
define void @CMT1_delay_100us(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @CMT1_delay_core(i32 250, i32 %3)
ret void
}

LLVM IR (-O2):
define void @CMT1_delay_100us(i32 %0) {
%2 = tail call i32 @CMT1_delay_core(i32 250, i32 %0)
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;

/* Variables and functions */
scalar_t__ SPI_Read(int);
int /*<<< orphan*/ SPI_Write(int, int);
void disconnect(uint8_t sock) {
  if (sock != 0)
    return;
  SPI_Write(0x0401, 0x08);
  while (SPI_Read(0x0401))
    ;
}


x86 assembly (clang, -O0):
<disconnect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     113c <disconnect+0x1c>
jmp    1164 <disconnect+0x44>
mov    $0x401,%edi
mov    $0x8,%esi
call   1040 <SPI_Write@plt>
mov    $0x401,%edi
call   1030 <SPI_Read@plt>
cmp    $0x0,%rax
je     1164 <disconnect+0x44>
jmp    114b <disconnect+0x2b>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disconnect>:
push   %rax
test   %rdi,%rdi
jne    114f <disconnect+0x2f>
mov    $0x401,%edi
mov    $0x8,%esi
call   1040 <SPI_Write@plt>
cs nopw 0x0(%rax,%rax,1)
nop
mov    $0x401,%edi
call   1030 <SPI_Read@plt>
test   %rax,%rax
jne    1140 <disconnect+0x20>
pop    %rax
ret

LLVM IR (-O0):
define void @disconnect(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %12
6: ; preds = %1
%7 = call i32 @SPI_Write(i32 1025, i32 8)
br label %8
8: ; preds = %11, %6
%9 = call i64 @SPI_Read(i32 1025)
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %8
br label %8
12: ; preds = %5, %8
ret void
}

LLVM IR (-O2):
define void @disconnect(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %3, label %8
3: ; preds = %1
%4 = tail call i32 @SPI_Write(i32 1025, i32 8)
br label %5
5: ; preds = %5, %3
%6 = tail call i64 @SPI_Read(i32 1025)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %5
8: ; preds = %5, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abortmsg(char *);
void *malloc(size_t);
void *chg_mallocx(size_t size) {
  void *result = malloc(size);
  if (!result)
    abortmsg("failed to malloc");
  return result;
}


x86 assembly (clang, -O0):
<chg_mallocx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <chg_mallocx+0x30>
lea    0xeb5(%rip),%rdi
call   1040 <abortmsg@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chg_mallocx>:
push   %rbx
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <chg_mallocx+0x1a>
lea    0xecb(%rip),%rdi
call   1040 <abortmsg@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"failed to malloc\00"
define i8* @chg_mallocx(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = call i32 @abortmsg(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [17 x i8] c"failed to malloc\00"
define noalias i8* @chg_mallocx(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @abortmsg(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Variables and functions */
double *malloc(int);
int main() {
  volatile double *d = malloc(sizeof(double));
  *d = 324234.123125;
  return (int)*d % 256;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x8,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsd  0xec7(%rip),%xmm0
movsd  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
cvttsd2si %xmm0,%eax
mov    $0x100,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x8,%edi
call   1030 <malloc@plt>
movabs $0x4113ca287e147ae1,%rcx
ca 13 41
mov    %rcx,(%rax)
cvttsd2si (%rax),%eax
lea    0xff(%rax),%ecx
test   %eax,%eax
cmovns %eax,%ecx
and    $0xffffff00,%ecx
sub    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca double*
store i32 0, i32* %1
%3 = call double* @malloc(i32 8)
store double* %3, double** %2
%4 = load double*, double** %2
store volatile double 0x4113CA287E147AE1, double* %4
%5 = load double*, double** %2
%6 = load volatile double, double* %5
%7 = fptosi double %6 to i32
%8 = srem i32 %7, 256
ret i32 %8
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call double* @malloc(i32 8)
store volatile double 0x4113CA287E147AE1, double* %1
%2 = load volatile double, double* %1
%3 = fptosi double %2 to i32
%4 = srem i32 %3, 256
ret i32 %4
}
/* Variables and functions */
scalar_t__ toupper(int);
char Characters__toupper(char c) { return (char)toupper((int)c); }


x86 assembly (clang, -O0):
<Characters__toupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <toupper@plt>
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Characters__toupper>:
push   %rax
call   1030 <toupper@plt>
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @Characters__toupper(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = call i64 @toupper(i32 %4)
%6 = trunc i64 %5 to i8
ret i8 %6
}

LLVM IR (-O2):
define signext i8 @Characters__toupper(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = tail call i64 @toupper(i32 %2)
%4 = trunc i64 %3 to i8
ret i8 %4
}
char branch_relative(unsigned short from, unsigned short to) {
  short distance = (to - 1) - (from + 1);
  if (distance < -127 || distance > 128) {
    return 0;
  }
  return (char)distance;
}


x86 assembly (clang, -O0):
<branch_relative>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x4(%rbp)
mov    %ax,-0x6(%rbp)
movzwl -0x6(%rbp),%eax
sub    $0x1,%eax
movzwl -0x4(%rbp),%ecx
add    $0x1,%ecx
sub    %ecx,%eax
mov    %ax,-0x8(%rbp)
movswl -0x8(%rbp),%eax
cmp    $0xffffff81,%eax
jl     1142 <branch_relative+0x42>
movswl -0x8(%rbp),%eax
cmp    $0x80,%eax
jle    114b <branch_relative+0x4b>
movb   $0x0,-0x1(%rbp)
jmp    1152 <branch_relative+0x52>
mov    -0x8(%rbp),%ax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<branch_relative>:
sub    %edi,%esi
lea    -0x83(%rsi),%eax
movzwl %ax,%eax
add    $0xfe,%sil
xor    %ecx,%ecx
cmp    $0xff00,%eax
movzbl %sil,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @branch_relative(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i8
%4 = alloca i16
%5 = alloca i16
%6 = alloca i16
store i16 %0, i16* %4
store i16 %1, i16* %5
%7 = load i16, i16* %5
%8 = zext i16 %7 to i32
%9 = sub nsw i32 %8, 1
%10 = load i16, i16* %4
%11 = zext i16 %10 to i32
%12 = add nsw i32 %11, 1
%13 = sub nsw i32 %9, %12
%14 = trunc i32 %13 to i16
store i16 %14, i16* %6
%15 = load i16, i16* %6
%16 = sext i16 %15 to i32
%17 = icmp slt i32 %16, -127
br i1 %17, label %22, label %18
18: ; preds = %2
%19 = load i16, i16* %6
%20 = sext i16 %19 to i32
%21 = icmp sgt i32 %20, 128
br i1 %21, label %22, label %23
22: ; preds = %18, %2
store i8 0, i8* %3
br label %26
23: ; preds = %18
%24 = load i16, i16* %6
%25 = trunc i16 %24 to i8
store i8 %25, i8* %3
br label %26
26: ; preds = %23, %22
%27 = load i8, i8* %3
ret i8 %27
}

LLVM IR (-O2):
define signext i8 @branch_relative(i16 zeroext %0, i16 zeroext %1) {
%3 = sub i16 -2, %0
%4 = add i16 %3, %1
%5 = add i16 %4, -129
%6 = icmp ult i16 %5, -256
%7 = trunc i16 %4 to i8
%8 = select i1 %6, i8 0, i8 %7
ret i8 %8
}
int __isleap(long year) {
  return (year) % 4 == 0 && ((year) % 100 != 0 || (year) % 400 == 0);
}


x86 assembly (clang, -O0):
<__isleap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x4,%ecx
cqto
idiv   %rcx
xor    %eax,%eax
cmp    $0x0,%rdx
mov    %al,-0x9(%rbp)
jne    1160 <__isleap+0x60>
mov    -0x8(%rbp),%rax
mov    $0x64,%ecx
cqto
idiv   %rcx
mov    $0x1,%al
cmp    $0x0,%rdx
mov    %al,-0xa(%rbp)
jne    115a <__isleap+0x5a>
mov    -0x8(%rbp),%rax
mov    $0x190,%ecx
cqto
idiv   %rcx
cmp    $0x0,%rdx
sete   %al
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__isleap>:
xor    %eax,%eax
test   $0x3,%dil
je     1109 <__isleap+0x9>
ret
movabs $0x8f5c28f5c28f5c29,%rax
28 5c 8f
imul   %rax,%rdi
movabs $0x51eb851eb851eb8,%rcx
b8 1e 05
add    %rdi,%rcx
ror    $0x2,%rcx
mov    $0x1,%eax
movabs $0x28f5c28f5c28f5c,%rdx
5c 8f 02
cmp    %rdx,%rcx
ja     1108 <__isleap+0x8>
movabs $0x51eb851eb851eb0,%rax
b8 1e 05
add    %rax,%rdi
ror    $0x4,%rdi
movabs $0xa3d70a3d70a3d7,%rcx
xor    %eax,%eax
cmp    %rcx,%rdi
setb   %al
ret

LLVM IR (-O0):
define i32 @__isleap(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = srem i64 %3, 4
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %16
6: ; preds = %1
%7 = load i64, i64* %2
%8 = srem i64 %7, 100
%9 = icmp ne i64 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %6
%11 = load i64, i64* %2
%12 = srem i64 %11, 400
%13 = icmp eq i64 %12, 0
br label %14
14: ; preds = %10, %6
%15 = phi i1 [ true, %6 ], [ %13, %10 ]
br label %16
16: ; preds = %14, %1
%17 = phi i1 [ false, %1 ], [ %15, %14 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @__isleap(i64 %0) {
%2 = and i64 %0, 3
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = srem i64 %0, 100
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = srem i64 %0, 400
%9 = icmp eq i64 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %4, %7, %1
%12 = phi i32 [ 0, %1 ], [ 1, %4 ], [ %10, %7 ]
ret i32 %12
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int /*<<< orphan*/ *display;
};
typedef TYPE_1__ XMappingEvent;
typedef int /*<<< orphan*/ Display;

/* Variables and functions */
void set_XMappingEvent_display(void *_p, void *_v) {
  ((XMappingEvent *)_p)->display = (Display *)_v;
}


x86 assembly (clang, -O0):
<set_XMappingEvent_display>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XMappingEvent_display>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32* }
define void @set_XMappingEvent_display(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i32*
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to %struct.TYPE_2__*
%9 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %8, i32 0, i32 0
store i32* %6, i32** %9
ret void
}

LLVM IR (-O2):
define void @set_XMappingEvent_display(i8* nocapture writeonly %0, i8* %1) {
%3 = bitcast i8* %0 to i8**
store i8* %1, i8** %3
ret void
}
void f1(void) {}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
ret

LLVM IR (-O0):
define void @f1() {
ret void
}

LLVM IR (-O2):
define void @f1() {
ret void
}
void SPI_MAX7221_EnableTxInt(void) {}


x86 assembly (clang, -O0):
<SPI_MAX7221_EnableTxInt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPI_MAX7221_EnableTxInt>:
ret

LLVM IR (-O0):
define void @SPI_MAX7221_EnableTxInt() {
ret void
}

LLVM IR (-O2):
define void @SPI_MAX7221_EnableTxInt() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
scalar_t__ util_rndGet(int /*<<< orphan*/, int /*<<< orphan*/);
bool instrumentLimitEvery(uint64_t step) {
  if (util_rndGet(0, step) == 0)
    return true;
  return false;
}


x86 assembly (clang, -O0):
<instrumentLimitEvery>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%esi
xor    %edi,%edi
call   1030 <util_rndGet@plt>
cmp    $0x0,%rax
jne    113b <instrumentLimitEvery+0x2b>
movl   $0x1,-0x4(%rbp)
jmp    1142 <instrumentLimitEvery+0x32>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<instrumentLimitEvery>:
push   %rax
mov    %edi,%esi
xor    %edi,%edi
call   1030 <util_rndGet@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @instrumentLimitEvery(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @util_rndGet(i32 0, i32 %4)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @instrumentLimitEvery(i32 %0) {
%2 = tail call i64 @util_rndGet(i32 0, i32 %0)
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
void two_loops_nested_invariant(int p) {
  int t = 0;
  int m = p;
  for (int i = 0; i < m; i++) {
    t = 3;
    for (int j = 0; j < t; j++) {
    }
  }
}


x86 assembly (clang, -O0):
<two_loops_nested_invariant>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1167 <two_loops_nested_invariant+0x67>
movl   $0x3,-0x8(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1154 <two_loops_nested_invariant+0x54>
jmp    1146 <two_loops_nested_invariant+0x46>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1135 <two_loops_nested_invariant+0x35>
jmp    1159 <two_loops_nested_invariant+0x59>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    111b <two_loops_nested_invariant+0x1b>
pop    %rbp
ret

x86 assembly (clang, -O2):
<two_loops_nested_invariant>:
ret

LLVM IR (-O0):
define void @two_loops_nested_invariant(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%7 = load i32, i32* %2
store i32 %7, i32* %4
store i32 0, i32* %5
br label %8
8: ; preds = %22, %1
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %25
12: ; preds = %8
store i32 3, i32* %3
store i32 0, i32* %6
br label %13
13: ; preds = %18, %12
%14 = load i32, i32* %6
%15 = load i32, i32* %3
%16 = icmp slt i32 %14, %15
br i1 %16, label %17, label %21
17: ; preds = %13
br label %18
18: ; preds = %17
%19 = load i32, i32* %6
%20 = add nsw i32 %19, 1
store i32 %20, i32* %6
br label %13
21: ; preds = %13
br label %22
22: ; preds = %21
%23 = load i32, i32* %5
%24 = add nsw i32 %23, 1
store i32 %24, i32* %5
br label %8
25: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @two_loops_nested_invariant(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf("bdaddr - Utility for changing the Bluetooth device address\n\n");
  printf("Usage:\n"
         "\tbdaddr [-i <dev>] [-r] [-t] [new bdaddr]\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf16(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf18(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [61 x i8] c"bdaddr - Utility for changing the Bluetooth device address\0A\0A\00"
@.str.1 = [50 x i8] c"Usage:\0A\09bdaddr [-i <dev>] [-r] [-t] [new bdaddr]\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [60 x i8] c"bdaddr - Utility for changing the Bluetooth device address\0A\00"
@str.2 = [49 x i8] c"Usage:\0A\09bdaddr [-i <dev>] [-r] [-t] [new bdaddr]\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([60 x i8], [60 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([49 x i8], [49 x i8]* @str.2, i64 0, i64 0))
ret void
}
int my_global_func() {
  int v_in_global_func;
  return v_in_global_func;
}


x86 assembly (clang, -O0):
<my_global_func>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_global_func>:
ret

LLVM IR (-O0):
define i32 @my_global_func() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @my_global_func() {
ret i32 undef
}
/* Type definitions */
struct dictIterator {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wfree(struct dictIterator *);
void dictReleaseIterator(struct dictIterator *iter) { wfree(iter); }


x86 assembly (clang, -O0):
<dictReleaseIterator>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <wfree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dictReleaseIterator>:
jmp    1030 <wfree@plt>

LLVM IR (-O0):
%struct.dictIterator = type { i32 }
define void @dictReleaseIterator(%struct.dictIterator* %0) {
%2 = alloca %struct.dictIterator*
store %struct.dictIterator* %0, %struct.dictIterator** %2
%3 = load %struct.dictIterator*, %struct.dictIterator** %2
%4 = call i32 @wfree(%struct.dictIterator* %3)
ret void
}

LLVM IR (-O2):
%struct.dictIterator = type { i32 }
define void @dictReleaseIterator(%struct.dictIterator* %0) {
%2 = tail call i32 @wfree(%struct.dictIterator* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(char *name) { fprintf(stderr, "Usage: %s n where n > 0", name); }


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [24 x i8] c"Usage: %s n where n > 0\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [24 x i8] c"Usage: %s n where n > 0\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memset(char *, char, int);
int /*<<< orphan*/ sprintf(char *, char *, char *, char *);
int /*<<< orphan*/ wrap_send(int, char *);
void sprintf_send(int fd, char *to, char *fn) {
  char tmp[1024];
  memset(tmp, '\0', 1024);
  sprintf(tmp, "PRIVMSG %s %s\r\n", to, fn);
  wrap_send(fd, tmp);
}


x86 assembly (clang, -O0):
<sprintf_send>:
push   %rbp
mov    %rsp,%rbp
sub    $0x420,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    -0x420(%rbp),%rdi
xor    %esi,%esi
mov    $0x400,%edx
call   1040 <memset@plt>
lea    -0x420(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
lea    0xe91(%rip),%rsi
call   1050 <sprintf@plt>
mov    -0x4(%rbp),%edi
lea    -0x420(%rbp),%rsi
call   1030 <wrap_send@plt>
add    $0x420,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sprintf_send>:
push   %rbp
push   %r15
push   %r14
push   %rbx
sub    $0x408,%rsp
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %edi,%r15d
mov    %rsp,%rbp
mov    %rbp,%rdi
xor    %esi,%esi
mov    $0x400,%edx
call   1040 <memset@plt>
lea    0xea1(%rip),%rsi
mov    %rbp,%rdi
mov    %rbx,%rdx
mov    %r14,%rcx
call   1050 <sprintf@plt>
mov    %r15d,%edi
mov    %rbp,%rsi
call   1030 <wrap_send@plt>
add    $0x408,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@.str = [16 x i8] c"PRIVMSG %s %s\0D\0A\00"
define void @sprintf_send(i32 %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca [1024 x i8]
store i32 %0, i32* %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%8 = getelementptr inbounds [1024 x i8], [1024 x i8]* %7, i64 0, i64 0
%9 = call i32 @memset(i8* %8, i8 signext 0, i32 1024)
%10 = getelementptr inbounds [1024 x i8], [1024 x i8]* %7, i64 0, i64 0
%11 = load i8*, i8** %5
%12 = load i8*, i8** %6
%13 = call i32 @sprintf(i8* %10, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %11, i8* %12)
%14 = load i32, i32* %4
%15 = getelementptr inbounds [1024 x i8], [1024 x i8]* %7, i64 0, i64 0
%16 = call i32 @wrap_send(i32 %14, i8* %15)
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"PRIVMSG %s %s\0D\0A\00"
define void @sprintf_send(i32 %0, i8* %1, i8* %2) {
%4 = alloca [1024 x i8]
%5 = getelementptr inbounds [1024 x i8], [1024 x i8]* %4, i64 0, i64 0
%6 = call i32 @memset(i8* %5, i8 signext 0, i32 1024)
%7 = call i32 @sprintf(i8* %5, i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %1, i8* %2)
%8 = call i32 @wrap_send(i32 %0, i8* %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void f(void) {
#pragma mcc verbatim start
  printf("Hello world\n");
#pragma mcc verbatim end
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"Hello world\0A\00"
define void @f() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [12 x i8] c"Hello world\00"
define void @f() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret void
}
int test_imm_E2int64_highword_reg(long long val) {
  return ((val >> 32) & (0xE2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E2int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xe2,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E2int64_highword_reg>:
movabs $0xe200000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E2int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 226
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E2int64_highword_reg(i64 %0) {
%2 = and i64 %0, 970662608896
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
g() {
  int good = 5;
  { extern char good; }
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
movl   $0x5,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
ret

LLVM IR (-O0):
define i32 @g() {
%1 = alloca i32
%2 = alloca i32
store i32 5, i32* %2
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @g() {
ret i32 undef
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ chr1setBank5(int);
void m65setParamsB005(uint16_t addr, uint8_t val) {
  (void)addr;
  chr1setBank5(val << 10);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
shl    $0xa,%edi
call   1030 <chr1setBank5@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    %esi,%edi
shl    $0xa,%edi
jmp    1030 <chr1setBank5@plt>

LLVM IR (-O0):
define void @m65setParamsB005(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %6, 10
%8 = call i32 @chr1setBank5(i32 %7)
ret void
}

LLVM IR (-O2):
define void @m65setParamsB005(i32 %0, i32 %1) {
%3 = shl i32 %1, 10
%4 = tail call i32 @chr1setBank5(i32 %3)
ret void
}
float vdot(float *va, float *vb) {
  return (va[0] * vb[0] + va[1] * vb[1] + va[2] * vb[2]);
}


x86 assembly (clang, -O0):
<vdot>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm1
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    -0x10(%rbp),%rax
mulss  0x4(%rax),%xmm0
mulss  %xmm2,%xmm1
addss  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  0x8(%rax),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<vdot>:
movss  0x4(%rdi),%xmm0
mulss  0x4(%rsi),%xmm0
movss  (%rdi),%xmm1
mulss  (%rsi),%xmm1
addss  %xmm0,%xmm1
movss  0x8(%rdi),%xmm0
mulss  0x8(%rsi),%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @vdot(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = getelementptr inbounds float, float* %5, i64 0
%7 = load float, float* %6
%8 = load float*, float** %4
%9 = getelementptr inbounds float, float* %8, i64 0
%10 = load float, float* %9
%11 = load float*, float** %3
%12 = getelementptr inbounds float, float* %11, i64 1
%13 = load float, float* %12
%14 = load float*, float** %4
%15 = getelementptr inbounds float, float* %14, i64 1
%16 = load float, float* %15
%17 = fmul float %13, %16
%18 = call float @llvm.fmuladd.f32(float %7, float %10, float %17)
%19 = load float*, float** %3
%20 = getelementptr inbounds float, float* %19, i64 2
%21 = load float, float* %20
%22 = load float*, float** %4
%23 = getelementptr inbounds float, float* %22, i64 2
%24 = load float, float* %23
%25 = call float @llvm.fmuladd.f32(float %21, float %24, float %18)
ret float %25
}

LLVM IR (-O2):
define float @vdot(float* nocapture %0, float* nocapture %1) {
%3 = load float, float* %0
%4 = load float, float* %1
%5 = getelementptr inbounds float, float* %0, i64 1
%6 = load float, float* %5
%7 = getelementptr inbounds float, float* %1, i64 1
%8 = load float, float* %7
%9 = fmul float %6, %8
%10 = tail call float @llvm.fmuladd.f32(float %3, float %4, float %9)
%11 = getelementptr inbounds float, float* %0, i64 2
%12 = load float, float* %11
%13 = getelementptr inbounds float, float* %1, i64 2
%14 = load float, float* %13
%15 = tail call float @llvm.fmuladd.f32(float %12, float %14, float %10)
ret float %15
}
void reverse(char *begin, char *end) {
  char tmp;
  while (begin < end) {
    tmp = *begin;
    *begin++ = *end;
    *end-- = tmp;
  }
}


x86 assembly (clang, -O0):
<reverse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1153 <reverse+0x53>
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
mov    -0x11(%rbp),%cl
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0xffffffffffffffff,%rdx
mov    %rdx,-0x10(%rbp)
mov    %cl,(%rax)
jmp    110c <reverse+0xc>
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse>:
cmp    %rsi,%rdi
jae    112c <reverse+0x2c>
add    $0xffffffffffffffff,%rsi
nopl   0x0(%rax)
movzbl (%rdi),%eax
movzbl 0x1(%rsi),%ecx
mov    %cl,(%rdi)
add    $0x1,%rdi
mov    %al,0x1(%rsi)
lea    -0x1(%rsi),%rax
cmp    %rsi,%rdi
mov    %rax,%rsi
jb     1110 <reverse+0x10>
ret

LLVM IR (-O0):
define void @reverse(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %6
6: ; preds = %10, %2
%7 = load i8*, i8** %3
%8 = load i8*, i8** %4
%9 = icmp ult i8* %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
store i8 %12, i8* %5
%13 = load i8*, i8** %4
%14 = load i8, i8* %13
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
store i8 %14, i8* %15
%17 = load i8, i8* %5
%18 = load i8*, i8** %4
%19 = getelementptr inbounds i8, i8* %18, i32 -1
store i8* %19, i8** %4
store i8 %17, i8* %18
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @reverse(i8* %0, i8* %1) {
%3 = icmp ult i8* %0, %1
br i1 %3, label %4, label %12
4: ; preds = %2, %4
%5 = phi i8* [ %9, %4 ], [ %0, %2 ]
%6 = phi i8* [ %10, %4 ], [ %1, %2 ]
%7 = load i8, i8* %5
%8 = load i8, i8* %6
%9 = getelementptr inbounds i8, i8* %5, i64 1
store i8 %8, i8* %5
%10 = getelementptr inbounds i8, i8* %6, i64 -1
store i8 %7, i8* %6
%11 = icmp ult i8* %9, %10
br i1 %11, label %4, label %12
12: ; preds = %4, %2
ret void
}
wprefix(s1, s2) register char *s1, *s2;
{
  register char c;
  while ((c = *s1++) != '\0')
    if (*s2 == '\0' || (c != *s2++ && c != '?'))
      return 0;
  return 1;
}


x86 assembly (clang, -O0):
<wprefix>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    %al,-0x19(%rbp)
movsbl %al,%eax
cmp    $0x0,%eax
je     1178 <wprefix+0x78>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1167 <wprefix+0x67>
movsbl -0x19(%rbp),%eax
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
movsbl (%rcx),%ecx
cmp    %ecx,%eax
je     1173 <wprefix+0x73>
movsbl -0x19(%rbp),%eax
cmp    $0x3f,%eax
je     1173 <wprefix+0x73>
movl   $0x0,-0x4(%rbp)
jmp    117f <wprefix+0x7f>
jmp    110c <wprefix+0xc>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wprefix>:
xor    %r8d,%r8d
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nop
movzbl (%rdi,%r8,1),%edx
test   %dl,%dl
je     1130 <wprefix+0x30>
movzbl (%rsi,%r8,1),%ecx
test   %cl,%cl
je     112f <wprefix+0x2f>
add    $0x1,%r8
cmp    $0x3f,%dl
je     1110 <wprefix+0x10>
cmp    %cl,%dl
je     1110 <wprefix+0x10>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @wprefix(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8
store i8* %0, i8** %4
store i8* %1, i8** %5
br label %7
7: ; preds = %31, %2
%8 = load i8*, i8** %4
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %4
%10 = load i8, i8* %8
store i8 %10, i8* %6
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %32
13: ; preds = %7
%14 = load i8*, i8** %5
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 0
br i1 %17, label %30, label %18
18: ; preds = %13
%19 = load i8, i8* %6
%20 = sext i8 %19 to i32
%21 = load i8*, i8** %5
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %5
%23 = load i8, i8* %21
%24 = sext i8 %23 to i32
%25 = icmp ne i32 %20, %24
br i1 %25, label %26, label %31
26: ; preds = %18
%27 = load i8, i8* %6
%28 = sext i8 %27 to i32
%29 = icmp ne i32 %28, 63
br i1 %29, label %30, label %31
30: ; preds = %26, %13
store i32 0, i32* %3
br label %33
31: ; preds = %26, %18
br label %7
32: ; preds = %7
store i32 1, i32* %3
br label %33
33: ; preds = %32, %30
%34 = load i32, i32* %3
ret i32 %34
}

LLVM IR (-O2):
define i32 @wprefix(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %12, %2
%4 = phi i8* [ %0, %2 ], [ %6, %12 ]
%5 = phi i8* [ %1, %2 ], [ %13, %12 ]
%6 = getelementptr inbounds i8, i8* %4, i64 1
%7 = load i8, i8* %4
%8 = icmp eq i8 %7, 0
br i1 %8, label %17, label %9
9: ; preds = %3
%10 = load i8, i8* %5
%11 = icmp eq i8 %10, 0
br i1 %11, label %17, label %12
12: ; preds = %9
%13 = getelementptr inbounds i8, i8* %5, i64 1
%14 = icmp ne i8 %7, %10
%15 = icmp ne i8 %7, 63
%16 = and i1 %15, %14
br i1 %16, label %17, label %3
17: ; preds = %3, %9, %12
%18 = phi i32 [ 0, %12 ], [ 0, %9 ], [ 1, %3 ]
ret i32 %18
}
int fun391() { return 391; }


x86 assembly (clang, -O0):
<fun391>:
push   %rbp
mov    %rsp,%rbp
mov    $0x187,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun391>:
mov    $0x187,%eax
ret

LLVM IR (-O0):
define i32 @fun391() {
ret i32 391
}

LLVM IR (-O2):
define i32 @fun391() {
ret i32 391
}
w() { return 3; }


x86 assembly (clang, -O0):
<w>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<w>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @w() {
ret i32 3
}

LLVM IR (-O2):
define i32 @w() {
ret i32 3
}
/* Variables and functions */
int /*<<< orphan*/ holamundo();
int main(void) {
  holamundo();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <holamundo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <holamundo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @holamundo()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @holamundo()
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ event;
};
typedef TYPE_1__ XUnmapEvent;

/* Variables and functions */
unsigned long get_XUnmapEvent_event(void *_p) {
  return (unsigned long)((XUnmapEvent *)_p)->event;
}


x86 assembly (clang, -O0):
<get_XUnmapEvent_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XUnmapEvent_event>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XUnmapEvent_event(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XUnmapEvent_event(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ init_properties();
void init(void) { init_properties(); }


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <init_properties@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
xor    %eax,%eax
jmp    1030 <init_properties@plt>

LLVM IR (-O0):
define void @init() {
%1 = call i32 (...) @init_properties()
ret void
}

LLVM IR (-O2):
define void @init() {
%1 = tail call i32 (...) @init_properties()
ret void
}