xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void adts_set_sync(uint8_t *p_adts) {
  p_adts[0] = 0xff;
  p_adts[1] = 0xf9;
  p_adts[2] = 0x0;
  p_adts[3] = 0x0;
  p_adts[4] = 0x0;
  p_adts[5] = 0x0;
  p_adts[6] = 0x0;
}


x86 assembly (clang, -O0):
<adts_set_sync>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0xff,(%rax)
mov    -0x8(%rbp),%rax
movl   $0xf9,0x4(%rax)
mov    -0x8(%rbp),%rax
movl   $0x0,0x8(%rax)
mov    -0x8(%rbp),%rax
movl   $0x0,0xc(%rax)
mov    -0x8(%rbp),%rax
movl   $0x0,0x10(%rax)
mov    -0x8(%rbp),%rax
movl   $0x0,0x14(%rax)
mov    -0x8(%rbp),%rax
movl   $0x0,0x18(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<adts_set_sync>:
movabs $0xf9000000ff,%rax
mov    %rax,(%rdi)
xorps  %xmm0,%xmm0
movups %xmm0,0x8(%rdi)
movl   $0x0,0x18(%rdi)
ret

LLVM IR (-O0):
define void @adts_set_sync(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
store i32 255, i32* %4
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 1
store i32 249, i32* %6
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 2
store i32 0, i32* %8
%9 = load i32*, i32** %2
%10 = getelementptr inbounds i32, i32* %9, i64 3
store i32 0, i32* %10
%11 = load i32*, i32** %2
%12 = getelementptr inbounds i32, i32* %11, i64 4
store i32 0, i32* %12
%13 = load i32*, i32** %2
%14 = getelementptr inbounds i32, i32* %13, i64 5
store i32 0, i32* %14
%15 = load i32*, i32** %2
%16 = getelementptr inbounds i32, i32* %15, i64 6
store i32 0, i32* %16
ret void
}

LLVM IR (-O2):
define void @adts_set_sync(i32* nocapture writeonly %0) {
store i32 255, i32* %0
%2 = getelementptr inbounds i32, i32* %0, i64 1
store i32 249, i32* %2
%3 = getelementptr inbounds i32, i32* %0, i64 2
%4 = bitcast i32* %3 to i8*
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
void printHexDigit(int val) {
  if (val > 9)
    printf("%c", (char)('a' + val - 10));
  else
    printf("%c", (char)('0' + val));
}


x86 assembly (clang, -O0):
<printHexDigit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x9,-0x4(%rbp)
jle    1142 <printHexDigit+0x32>
mov    -0x4(%rbp),%eax
add    $0x61,%eax
sub    $0xa,%eax
lea    0xecb(%rip),%rdi
movsbl %al,%esi
call   1030 <printf@plt>
jmp    1157 <printHexDigit+0x47>
mov    -0x4(%rbp),%eax
add    $0x30,%eax
lea    0xeb1(%rip),%rdi
movsbl %al,%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printHexDigit>:
cmp    $0xa,%edi
mov    $0x57,%eax
mov    $0x30,%ecx
cmovge %eax,%ecx
add    %dil,%cl
movsbl %cl,%esi
lea    0xed3(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define void @printHexDigit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 9
br i1 %4, label %5, label %11
5: ; preds = %1
%6 = load i32, i32* %2
%7 = add nsw i32 97, %6
%8 = sub nsw i32 %7, 10
%9 = trunc i32 %8 to i8
%10 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %9)
br label %16
11: ; preds = %1
%12 = load i32, i32* %2
%13 = add nsw i32 48, %12
%14 = trunc i32 %13 to i8
%15 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %14)
br label %16
16: ; preds = %11, %5
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
define void @printHexDigit(i32 %0) {
%2 = icmp sgt i32 %0, 9
%3 = trunc i32 %0 to i8
%4 = select i1 %2, i8 87, i8 48
%5 = add i8 %4, %3
%6 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %5)
ret void
}
void write_flashram_dummy() {}


x86 assembly (clang, -O0):
<write_flashram_dummy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_flashram_dummy>:
ret

LLVM IR (-O0):
define void @write_flashram_dummy() {
ret void
}

LLVM IR (-O2):
define void @write_flashram_dummy() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ op_to_ea(char *, int);
void i_or_ea(void) { op_to_ea("or", 1); }


x86 assembly (clang, -O0):
<i_or_ea>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x1,%esi
call   1030 <op_to_ea@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<i_or_ea>:
lea    0xee9(%rip),%rdi
mov    $0x1,%esi
jmp    1030 <op_to_ea@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"or\00"
define void @i_or_ea() {
%1 = call i32 @op_to_ea(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"or\00"
define void @i_or_ea() {
%1 = tail call i32 @op_to_ea(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}
/* Variables and functions */
int inp_emulate(int);
char TOSH_READ_RADIO_FIFO_PIN() { return 0x01 & (inp_emulate(-2) >> 6); }


x86 assembly (clang, -O0):
<TOSH_READ_RADIO_FIFO_PIN>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffffffe,%edi
call   1030 <inp_emulate@plt>
sar    $0x6,%eax
and    $0x1,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_READ_RADIO_FIFO_PIN>:
push   %rax
mov    $0xfffffffe,%edi
call   1030 <inp_emulate@plt>
shr    $0x6,%al
and    $0x1,%al
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @TOSH_READ_RADIO_FIFO_PIN() {
%1 = call i32 @inp_emulate(i32 -2)
%2 = ashr i32 %1, 6
%3 = and i32 1, %2
%4 = trunc i32 %3 to i8
ret i8 %4
}

LLVM IR (-O2):
define signext i8 @TOSH_READ_RADIO_FIFO_PIN() {
%1 = tail call i32 @inp_emulate(i32 -2)
%2 = trunc i32 %1 to i8
%3 = lshr i8 %2, 6
%4 = and i8 %3, 1
ret i8 %4
}
int do_376() { return 376; }


x86 assembly (clang, -O0):
<do_376>:
push   %rbp
mov    %rsp,%rbp
mov    $0x178,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_376>:
mov    $0x178,%eax
ret

LLVM IR (-O0):
define i32 @do_376() {
ret i32 376
}

LLVM IR (-O2):
define i32 @do_376() {
ret i32 376
}
/* Type definitions */
struct Cyc_Absyn_Vardecl {
  int dummy;
};

/* Variables and functions */
void *Cyc_AssnDef_logicvar(struct Cyc_Absyn_Vardecl *, int, void *);
void *Cyc_AssnDef_fresh_var(struct Cyc_Absyn_Vardecl *vd, void *tp) {
  void *_T0;
  static int counter = 0;
  void *t = Cyc_AssnDef_logicvar(vd, counter, tp);
  counter = counter + 1;
  _T0 = t;
  return _T0;
}


x86 assembly (clang, -O0):
<Cyc_AssnDef_fresh_var>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2f02(%rip),%esi
mov    -0x10(%rbp),%rdx
call   1030 <Cyc_AssnDef_logicvar@plt>
mov    %rax,-0x20(%rbp)
mov    0x2eef(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2ee6(%rip)
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_AssnDef_fresh_var>:
push   %rax
mov    %rsi,%rdx
mov    0x2f12(%rip),%esi
call   1030 <Cyc_AssnDef_logicvar@plt>
addl   $0x1,0x2f06(%rip)
pop    %rcx
ret

LLVM IR (-O0):
%struct.Cyc_Absyn_Vardecl = type { i32 }
@Cyc_AssnDef_fresh_var.counter = internal global i32 0
define i8* @Cyc_AssnDef_fresh_var(%struct.Cyc_Absyn_Vardecl* %0, i8* %1) {
%3 = alloca %struct.Cyc_Absyn_Vardecl*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store %struct.Cyc_Absyn_Vardecl* %0, %struct.Cyc_Absyn_Vardecl** %3
store i8* %1, i8** %4
%7 = load %struct.Cyc_Absyn_Vardecl*, %struct.Cyc_Absyn_Vardecl** %3
%8 = load i32, i32* @Cyc_AssnDef_fresh_var.counter
%9 = load i8*, i8** %4
%10 = call i8* @Cyc_AssnDef_logicvar(%struct.Cyc_Absyn_Vardecl* %7, i32 %8, i8* %9)
store i8* %10, i8** %6
%11 = load i32, i32* @Cyc_AssnDef_fresh_var.counter
%12 = add nsw i32 %11, 1
store i32 %12, i32* @Cyc_AssnDef_fresh_var.counter
%13 = load i8*, i8** %6
store i8* %13, i8** %5
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
%struct.Cyc_Absyn_Vardecl = type { i32 }
@Cyc_AssnDef_fresh_var.counter = internal unnamed_addr global i32 0
define i8* @Cyc_AssnDef_fresh_var(%struct.Cyc_Absyn_Vardecl* %0, i8* %1) {
%3 = load i32, i32* @Cyc_AssnDef_fresh_var.counter
%4 = tail call i8* @Cyc_AssnDef_logicvar(%struct.Cyc_Absyn_Vardecl* %0, i32 %3, i8* %1)
%5 = load i32, i32* @Cyc_AssnDef_fresh_var.counter
%6 = add nsw i32 %5, 1
store i32 %6, i32* @Cyc_AssnDef_fresh_var.counter
ret i8* %4
}
__attribute__((weak)) void weak_def_fn1(void) {}


x86 assembly (clang, -O0):
<weak_def_fn1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<weak_def_fn1>:
ret

LLVM IR (-O0):
define weak void @weak_def_fn1() {
ret void
}

LLVM IR (-O2):
define weak void @weak_def_fn1() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputc(int, int /*<<< orphan*/ *);
void write_int32(int val, FILE *fp) {
  fputc(val & 0xFF, fp);
  fputc((val >> 8) & 0xFF, fp);
  fputc((val >> 16) & 0xFF, fp);
  fputc((val >> 24) & 0xFF, fp);
}


x86 assembly (clang, -O0):
<write_int32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
and    $0xff,%edi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
mov    -0x4(%rbp),%edi
sar    $0x8,%edi
and    $0xff,%edi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
mov    -0x4(%rbp),%edi
sar    $0x10,%edi
and    $0xff,%edi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
mov    -0x4(%rbp),%edi
sar    $0x18,%edi
and    $0xff,%edi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_int32>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %edi,%ebx
movzbl %bl,%edi
call   1030 <fputc@plt>
movzbl %bh,%edi
mov    %r14,%rsi
call   1030 <fputc@plt>
mov    %ebx,%eax
shr    $0x10,%eax
movzbl %al,%edi
mov    %r14,%rsi
call   1030 <fputc@plt>
shr    $0x18,%ebx
mov    %ebx,%edi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fputc@plt>

LLVM IR (-O0):
define void @write_int32(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = and i32 %5, 255
%7 = load i32*, i32** %4
%8 = call i32 @fputc(i32 %6, i32* %7)
%9 = load i32, i32* %3
%10 = ashr i32 %9, 8
%11 = and i32 %10, 255
%12 = load i32*, i32** %4
%13 = call i32 @fputc(i32 %11, i32* %12)
%14 = load i32, i32* %3
%15 = ashr i32 %14, 16
%16 = and i32 %15, 255
%17 = load i32*, i32** %4
%18 = call i32 @fputc(i32 %16, i32* %17)
%19 = load i32, i32* %3
%20 = ashr i32 %19, 24
%21 = and i32 %20, 255
%22 = load i32*, i32** %4
%23 = call i32 @fputc(i32 %21, i32* %22)
ret void
}

LLVM IR (-O2):
define void @write_int32(i32 %0, i32* nocapture %1) {
%3 = and i32 %0, 255
%4 = tail call i32 @fputc(i32 %3, i32* %1)
%5 = lshr i32 %0, 8
%6 = and i32 %5, 255
%7 = tail call i32 @fputc(i32 %6, i32* %1)
%8 = lshr i32 %0, 16
%9 = and i32 %8, 255
%10 = tail call i32 @fputc(i32 %9, i32* %1)
%11 = lshr i32 %0, 24
%12 = tail call i32 @fputc(i32 %11, i32* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void safe_free(void **ptr) {
  free(*ptr);
  *ptr = NULL;
}


x86 assembly (clang, -O0):
<safe_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_free>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <free@plt>
movq   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @safe_free(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
%5 = call i32 @free(i8* %4)
%6 = load i8**, i8*** %2
store i8* null, i8** %6
ret void
}

LLVM IR (-O2):
define void @safe_free(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = tail call i32 @free(i8* %2)
store i8* null, i8** %0
ret void
}
/* Variables and functions */
char *tigetstr(char *);
const char *tty_getcap(char *cap) {
  char *str;
  str = tigetstr(cap);
  if (str == (char *)(-1) || str == NULL)
    return "";
  return str;
}


x86 assembly (clang, -O0):
<tty_getcap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <tigetstr@plt>
mov    %rax,-0x18(%rbp)
mov    $0xffffffffffffffff,%rax
cmp    %rax,-0x18(%rbp)
je     1145 <tty_getcap+0x35>
cmpq   $0x0,-0x18(%rbp)
jne    1155 <tty_getcap+0x45>
lea    0xeb4(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    115d <tty_getcap+0x4d>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tty_getcap>:
push   %rax
call   1030 <tigetstr@plt>
lea    0x1(%rax),%rcx
cmp    $0x2,%rcx
jae    1127 <tty_getcap+0x17>
lea    0xed9(%rip),%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @tty_getcap(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i8* @tigetstr(i8* %5)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp eq i8* %7, inttoptr (i64 -1 to i8*)
br i1 %8, label %12, label %9
9: ; preds = %1
%10 = load i8*, i8** %4
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %13
12: ; preds = %9, %1
store i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8** %2
br label %15
13: ; preds = %9
%14 = load i8*, i8** %4
store i8* %14, i8** %2
br label %15
15: ; preds = %13, %12
%16 = load i8*, i8** %2
ret i8* %16
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @tty_getcap(i8* %0) {
%2 = tail call i8* @tigetstr(i8* %0)
%3 = ptrtoint i8* %2 to i64
switch i64 %3, label %4 [
i64 -1, label %5
i64 0, label %5
]
4: ; preds = %1
br label %5
5: ; preds = %1, %1, %4
%6 = phi i8* [ %2, %4 ], [ getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), %1 ], [ getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), %1 ]
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void f(int value, int expect) {
  if (value != expect)
    abort();
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
je     1131 <f+0x21>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
cmp    %esi,%edi
jne    1115 <f+0x5>
ret
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @f(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ne i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 (...) @abort()
unreachable
10: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @f(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, %1
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 (...) @abort()
unreachable
6: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int num;
  num = -2;
  while (num < 10000) {
    num += 2;
    printf("%d - ", num);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xfffffffe,-0x8(%rbp)
cmpl   $0x2710,-0x8(%rbp)
jge    1150 <main+0x40>
mov    -0x8(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    $0xfffffffc,%ebx
lea    0xee0(%rip),%r14
lea    0x4(%rbx),%esi
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0x2,%ebx
cmp    $0x270e,%ebx
jl     1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%d - \00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 -2, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 10000
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 2
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %9)
br label %3
11: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%d - \00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ -2, %0 ], [ %3, %1 ]
%3 = add nsw i32 %2, 2
%4 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = icmp slt i32 %2, 9998
br i1 %5, label %1, label %6
6: ; preds = %1
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
float mulr(uint32_t *env) {
  float *context = (float *)*(float **)(env + 1);
  float a = (float)*(float *)(context);
  float b = (float)*(float *)(context + 1);
  return a * b;
}


x86 assembly (clang, -O0):
<mulr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
movss  %xmm0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movss  0x4(%rax),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  -0x14(%rbp),%xmm0
mulss  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mulr>:
mov    0x4(%rdi),%rax
movss  (%rax),%xmm0
mulss  0x4(%rax),%xmm0
ret

LLVM IR (-O0):
define float @mulr(i32* %0) {
%2 = alloca i32*
%3 = alloca float*
%4 = alloca float
%5 = alloca float
store i32* %0, i32** %2
%6 = load i32*, i32** %2
%7 = getelementptr inbounds i32, i32* %6, i64 1
%8 = bitcast i32* %7 to float**
%9 = load float*, float** %8
store float* %9, float** %3
%10 = load float*, float** %3
%11 = load float, float* %10
store float %11, float* %4
%12 = load float*, float** %3
%13 = getelementptr inbounds float, float* %12, i64 1
%14 = load float, float* %13
store float %14, float* %5
%15 = load float, float* %4
%16 = load float, float* %5
%17 = fmul float %15, %16
ret float %17
}

LLVM IR (-O2):
define float @mulr(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 1
%3 = bitcast i32* %2 to float**
%4 = load float*, float** %3
%5 = load float, float* %4
%6 = getelementptr inbounds float, float* %4, i64 1
%7 = load float, float* %6
%8 = fmul float %5, %7
ret float %8
}
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
int syscall_cp(int, struct timespec const *, struct timespec *);
int nanosleep(const struct timespec *req, struct timespec *rem) {
  return syscall_cp(162, req, rem);
}


x86 assembly (clang, -O0):
<nanosleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0xa2,%edi
call   1030 <syscall_cp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nanosleep>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0xa2,%edi
jmp    1030 <syscall_cp@plt>

LLVM IR (-O0):
%struct.timespec = type { i32 }
define i32 @nanosleep(%struct.timespec* %0, %struct.timespec* %1) {
%3 = alloca %struct.timespec*
%4 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load %struct.timespec*, %struct.timespec** %3
%6 = load %struct.timespec*, %struct.timespec** %4
%7 = call i32 @syscall_cp(i32 162, %struct.timespec* %5, %struct.timespec* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
define i32 @nanosleep(%struct.timespec* %0, %struct.timespec* %1) {
%3 = tail call i32 @syscall_cp(i32 162, %struct.timespec* %0, %struct.timespec* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ handle_SOUND(int /*<<< orphan*/);
int gen_SOUND(void) {
  handle_SOUND(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_SOUND>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_SOUND@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_SOUND>:
push   %rax
xor    %edi,%edi
call   1030 <handle_SOUND@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_SOUND() {
%1 = call i32 @handle_SOUND(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_SOUND() {
%1 = tail call i32 @handle_SOUND(i32 0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ emitf(int, char *, char *);
void emit_label(char *label) {
  emitf(662,
        "\t"
        "%s:",
        label);
}


x86 assembly (clang, -O0):
<emit_label>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
mov    $0x296,%edi
lea    0xed4(%rip),%rsi
call   1030 <emitf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_label>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rsi
mov    $0x296,%edi
jmp    1030 <emitf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"\09%s:\00"
define void @emit_label(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @emitf(i32 662, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"\09%s:\00"
define void @emit_label(i8* %0) {
%2 = tail call i32 @emitf(i32 662, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pauseOp(double);
void pause(double milliseconds) { pauseOp(milliseconds); }


x86 assembly (clang, -O0):
<pause>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <pauseOp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pause>:
jmp    1030 <pauseOp@plt>

LLVM IR (-O0):
define void @pause(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @pauseOp(double %3)
ret void
}

LLVM IR (-O2):
define void @pause(double %0) {
%2 = tail call i32 @pauseOp(double %0)
ret void
}
/* Type definitions */
struct timer {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct timer *);
void timer_destroy(struct timer *tm) {
  if (tm != NULL)
    free(tm);
}


x86 assembly (clang, -O0):
<timer_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <timer_destroy+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timer_destroy>:
test   %rdi,%rdi
je     111a <timer_destroy+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
%struct.timer = type { i32 }
define void @timer_destroy(%struct.timer* %0) {
%2 = alloca %struct.timer*
store %struct.timer* %0, %struct.timer** %2
%3 = load %struct.timer*, %struct.timer** %2
%4 = icmp ne %struct.timer* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load %struct.timer*, %struct.timer** %2
%7 = call i32 @free(%struct.timer* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
%struct.timer = type { i32 }
define void @timer_destroy(%struct.timer* %0) {
%2 = icmp eq %struct.timer* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(%struct.timer* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void putn(void *n) {
  int i;
  i = *((int *)n);
  printf("  %d\n", i);
}


x86 assembly (clang, -O0):
<putn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putn>:
mov    (%rdi),%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [6 x i8] c" %d\0A\00"
define void @putn(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
%6 = load i32, i32* %5
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c" %d\0A\00"
define void @putn(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}
unsigned int _uiXMemWrite(const void *pusBuffer, unsigned long ulOffset,
                          unsigned int uiLen) {
  return (1);
}


x86 assembly (clang, -O0):
<_uiXMemWrite>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_uiXMemWrite>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @_uiXMemWrite(i8* %0, i64 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32
store i8* %0, i8** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
ret i32 1
}

LLVM IR (-O2):
define i32 @_uiXMemWrite(i8* nocapture readnone %0, i64 %1, i32 %2) {
ret i32 1
}
int edflib_version(void) { return (111); }


x86 assembly (clang, -O0):
<edflib_version>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<edflib_version>:
mov    $0x6f,%eax
ret

LLVM IR (-O0):
define i32 @edflib_version() {
ret i32 111
}

LLVM IR (-O2):
define i32 @edflib_version() {
ret i32 111
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;
typedef int /*<<< orphan*/ dev_t;
typedef unsigned long long dev;

/* Variables and functions */
int mknod(const char *path, mode_t mode, dev_t dev) {
  unsigned long long int k_dev;
  k_dev = (dev) & ((1ULL << 32) - 1);
}


x86 assembly (clang, -O0):
<mknod>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
movslq -0x18(%rbp),%rax
movabs $0xffffffff,%rcx
and    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mknod>:
ret

LLVM IR (-O0):
define i32 @mknod(i8* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i64
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i32, i32* %7
%10 = sext i32 %9 to i64
%11 = and i64 %10, 4294967295
store i64 %11, i64* %8
%12 = load i32, i32* %4
ret i32 %12
}

LLVM IR (-O2):
define i32 @mknod(i8* nocapture readnone %0, i32 %1, i32 %2) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ VA_DelayMS(int);
int receive_byte_via_SPI(int);
void V3A_WaitBootForFWDownload(void) {
  ;
  while (((receive_byte_via_SPI(((0x65E0) + 0x1E)) & 0x20) == 0)) {
    ;
    VA_DelayMS(100);
  }
}


x86 assembly (clang, -O0):
<V3A_WaitBootForFWDownload>:
push   %rbp
mov    %rsp,%rbp
jmp    1129 <V3A_WaitBootForFWDownload+0x9>
mov    $0x65fe,%edi
call   1030 <receive_byte_via_SPI@plt>
and    $0x20,%eax
cmp    $0x0,%eax
jne    114e <V3A_WaitBootForFWDownload+0x2e>
mov    $0x64,%edi
call   1040 <VA_DelayMS@plt>
jmp    1129 <V3A_WaitBootForFWDownload+0x9>
pop    %rbp
ret

x86 assembly (clang, -O2):
<V3A_WaitBootForFWDownload>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x65fe,%edi
call   1030 <receive_byte_via_SPI@plt>
test   $0x20,%al
jne    114a <V3A_WaitBootForFWDownload+0x2a>
mov    $0x64,%edi
call   1040 <VA_DelayMS@plt>
jmp    1130 <V3A_WaitBootForFWDownload+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @V3A_WaitBootForFWDownload() {
br label %1
1: ; preds = %5, %0
%2 = call i32 @receive_byte_via_SPI(i32 26110)
%3 = and i32 %2, 32
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @VA_DelayMS(i32 100)
br label %1
7: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @V3A_WaitBootForFWDownload() {
%1 = tail call i32 @receive_byte_via_SPI(i32 26110)
%2 = and i32 %1, 32
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %9
4: ; preds = %0, %4
%5 = tail call i32 @VA_DelayMS(i32 100)
%6 = tail call i32 @receive_byte_via_SPI(i32 26110)
%7 = and i32 %6, 32
%8 = icmp eq i32 %7, 0
br i1 %8, label %4, label %9
9: ; preds = %4, %0
ret void
}
void foo(int n) {}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo(int *, size_t, size_t);
void bar(char *x, size_t n, size_t i) {
  if (i < n) {
    foo((int *)x, n / sizeof(int), i / sizeof(int));
  }
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    114b <bar+0x3b>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
shr    $0x2,%rsi
mov    -0x18(%rbp),%rdx
shr    $0x2,%rdx
call   1030 <foo@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
cmp    %rsi,%rdx
jae    1122 <bar+0x12>
shr    $0x2,%rsi
shr    $0x2,%rdx
jmp    1030 <foo@plt>
ret

LLVM IR (-O0):
define void @bar(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %6
%8 = load i64, i64* %5
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %18
10: ; preds = %3
%11 = load i8*, i8** %4
%12 = bitcast i8* %11 to i32*
%13 = load i64, i64* %5
%14 = udiv i64 %13, 4
%15 = load i64, i64* %6
%16 = udiv i64 %15, 4
%17 = call i32 @foo(i32* %12, i64 %14, i64 %16)
br label %18
18: ; preds = %10, %3
ret void
}

LLVM IR (-O2):
define void @bar(i8* %0, i64 %1, i64 %2) {
%4 = icmp ult i64 %2, %1
br i1 %4, label %5, label %10
5: ; preds = %3
%6 = bitcast i8* %0 to i32*
%7 = lshr i64 %1, 2
%8 = lshr i64 %2, 2
%9 = tail call i32 @foo(i32* %6, i64 %7, i64 %8)
br label %10
10: ; preds = %5, %3
ret void
}
void g_date_get_weekday() {}


x86 assembly (clang, -O0):
<g_date_get_weekday>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_date_get_weekday>:
ret

LLVM IR (-O0):
define void @g_date_get_weekday() {
ret void
}

LLVM IR (-O2):
define void @g_date_get_weekday() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void error_missing_license() { fprintf(stderr, "No license provided.\n"); }


x86 assembly (clang, -O0):
<error_missing_license>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<error_missing_license>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [22 x i8] c"No license provided.\0A\00"
define void @error_missing_license() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [22 x i8] c"No license provided.\0A\00"
define void @error_missing_license() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int core3_swap(char *, int);
int U_EMRSETBKMODE_swap(char *record, int torev) {
  return (core3_swap(record, torev));
}


x86 assembly (clang, -O0):
<U_EMRSETBKMODE_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <core3_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRSETBKMODE_swap>:
jmp    1030 <core3_swap@plt>

LLVM IR (-O0):
define i32 @U_EMRSETBKMODE_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @core3_swap(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @U_EMRSETBKMODE_swap(i8* %0, i32 %1) {
%3 = tail call i32 @core3_swap(i8* %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ create_write_byte(int);
void create_sync() {
  char buffer[1];
  char *bptr = buffer;
  int read_count = 0;
  int count = 1;
  create_write_byte(142);
  create_write_byte(35);
  while (read_count == 0 || read_count == -1) {
  }
}


x86 assembly (clang, -O0):
<create_sync>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x1(%rbp),%rax
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x1,-0x18(%rbp)
mov    $0x8e,%edi
call   1030 <create_write_byte@plt>
mov    $0x23,%edi
call   1030 <create_write_byte@plt>
mov    $0x1,%al
cmpl   $0x0,-0x14(%rbp)
mov    %al,-0x19(%rbp)
je     115b <create_sync+0x4b>
cmpl   $0xffffffff,-0x14(%rbp)
sete   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
test   $0x1,%al
jne    116b <create_sync+0x5b>
jmp    1170 <create_sync+0x60>
jmp    1142 <create_sync+0x32>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_sync>:
push   %rax
mov    $0x8e,%edi
call   1030 <create_write_byte@plt>
mov    $0x23,%edi
call   1030 <create_write_byte@plt>
cs nopw 0x0(%rax,%rax,1)
nop
jmp    1130 <create_sync+0x20>

LLVM IR (-O0):
define void @create_sync() {
%1 = alloca [1 x i8]
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
%5 = getelementptr inbounds [1 x i8], [1 x i8]* %1, i64 0, i64 0
store i8* %5, i8** %2
store i32 0, i32* %3
store i32 1, i32* %4
%6 = call i32 @create_write_byte(i32 142)
%7 = call i32 @create_write_byte(i32 35)
br label %8
8: ; preds = %16, %0
%9 = load i32, i32* %3
%10 = icmp eq i32 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = load i32, i32* %3
%13 = icmp eq i32 %12, -1
br label %14
14: ; preds = %11, %8
%15 = phi i1 [ true, %8 ], [ %13, %11 ]
br i1 %15, label %16, label %17
16: ; preds = %14
br label %8
17: ; preds = %14
ret void
}

LLVM IR (-O2):
define void @create_sync() {
%1 = tail call i32 @create_write_byte(i32 142)
%2 = tail call i32 @create_write_byte(i32 35)
br label %3
3: ; preds = %3, %0
br label %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct tcphdr {
  int /*<<< orphan*/ ack_seq;
};

/* Variables and functions */
uint32_t _tcphdr_ack_seq(struct tcphdr *h) { return h->ack_seq; }


x86 assembly (clang, -O0):
<_tcphdr_ack_seq>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_tcphdr_ack_seq>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.tcphdr = type { i32 }
define i32 @_tcphdr_ack_seq(%struct.tcphdr* %0) {
%2 = alloca %struct.tcphdr*
store %struct.tcphdr* %0, %struct.tcphdr** %2
%3 = load %struct.tcphdr*, %struct.tcphdr** %2
%4 = getelementptr inbounds %struct.tcphdr, %struct.tcphdr* %3, i32 0, i32 0
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
%struct.tcphdr = type { i32 }
define i32 @_tcphdr_ack_seq(%struct.tcphdr* nocapture %0) {
%2 = getelementptr inbounds %struct.tcphdr, %struct.tcphdr* %0, i64 0, i32 0
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ do_free(void *);
void ps_cfree(void *ptr) { do_free(ptr); }


x86 assembly (clang, -O0):
<ps_cfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <do_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps_cfree>:
jmp    1030 <do_free@plt>

LLVM IR (-O0):
define void @ps_cfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @do_free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @ps_cfree(i8* %0) {
%2 = tail call i32 @do_free(i8* %0)
ret void
}
int compare_and_swap(int *value, int expected, int new_value) {
  int temp = *value;
  if (*value == expected) {
    *value = new_value;
  }
  return temp;
}


x86 assembly (clang, -O0):
<compare_and_swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
cmp    -0xc(%rbp),%eax
jne    112f <compare_and_swap+0x2f>
mov    -0x10(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_and_swap>:
mov    (%rdi),%eax
cmp    %esi,%eax
jne    1108 <compare_and_swap+0x8>
mov    %edx,(%rdi)
ret

LLVM IR (-O0):
define i32 @compare_and_swap(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
store i32 %9, i32* %7
%10 = load i32*, i32** %4
%11 = load i32, i32* %10
%12 = load i32, i32* %5
%13 = icmp eq i32 %11, %12
br i1 %13, label %14, label %17
14: ; preds = %3
%15 = load i32, i32* %6
%16 = load i32*, i32** %4
store i32 %15, i32* %16
br label %17
17: ; preds = %14, %3
%18 = load i32, i32* %7
ret i32 %18
}

LLVM IR (-O2):
define i32 @compare_and_swap(i32* nocapture %0, i32 %1, i32 %2) {
%4 = load i32, i32* %0
%5 = icmp eq i32 %4, %1
br i1 %5, label %6, label %7
6: ; preds = %3
store i32 %2, i32* %0
br label %7
7: ; preds = %6, %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ BLAS_dscal(int *, double *, double *, int *);
void dscal(int n, double da, double *dx, int incx) {
  dx++;
  BLAS_dscal(&n, &da, dx, &incx);
}


x86 assembly (clang, -O0):
<dscal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdx
lea    -0x4(%rbp),%rdi
lea    -0x10(%rbp),%rsi
lea    -0x1c(%rbp),%rcx
call   1030 <BLAS_dscal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dscal>:
sub    $0x18,%rsp
mov    %edi,0xc(%rsp)
movsd  %xmm0,0x10(%rsp)
mov    %edx,0x8(%rsp)
lea    0x8(%rsi),%rdx
lea    0xc(%rsp),%rdi
lea    0x10(%rsp),%rsi
lea    0x8(%rsp),%rcx
call   1030 <BLAS_dscal@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @dscal(i32 %0, double %1, double* %2, i32 %3) {
%5 = alloca i32
%6 = alloca double
%7 = alloca double*
%8 = alloca i32
store i32 %0, i32* %5
store double %1, double* %6
store double* %2, double** %7
store i32 %3, i32* %8
%9 = load double*, double** %7
%10 = getelementptr inbounds double, double* %9, i32 1
store double* %10, double** %7
%11 = load double*, double** %7
%12 = call i32 @BLAS_dscal(i32* %5, double* %6, double* %11, i32* %8)
ret void
}

LLVM IR (-O2):
define void @dscal(i32 %0, double %1, double* %2, i32 %3) {
%5 = alloca i32
%6 = alloca double
%7 = alloca i32
store i32 %0, i32* %5
store double %1, double* %6
store i32 %3, i32* %7
%8 = getelementptr inbounds double, double* %2, i64 1
%9 = call i32 @BLAS_dscal(i32* %5, double* %6, double* %8, i32* %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ srand48(unsigned int);
extern __attribute__((gnu_)) void srandom(unsigned int __s) { srand48(__s); }


x86 assembly (clang, -O0):
<srandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <srand48@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<srandom>:
jmp    1030 <srand48@plt>

LLVM IR (-O0):
define void @srandom(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @srand48(i32 %3)
ret void
}

LLVM IR (-O2):
define void @srandom(i32 %0) {
%2 = tail call i32 @srand48(i32 %0)
ret void
}
int setup_ssds_client(void) { return 2; }


x86 assembly (clang, -O0):
<setup_ssds_client>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup_ssds_client>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @setup_ssds_client() {
ret i32 2
}

LLVM IR (-O2):
define i32 @setup_ssds_client() {
ret i32 2
}
/* Variables and functions */
int /*<<< orphan*/ dynamic_test();
int main(void) {
  dynamic_test();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <dynamic_test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <dynamic_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @dynamic_test()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @dynamic_test()
ret i32 0
}
int sqliteIntHash(const void *pKey, int nKey) {
  return nKey ^ (nKey << 8) ^ (nKey >> 8);
}


x86 assembly (clang, -O0):
<sqliteIntHash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    $0x8,%ecx
xor    %ecx,%eax
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqliteIntHash>:
mov    %esi,%eax
shl    $0x8,%eax
xor    %esi,%eax
sar    $0x8,%esi
xor    %esi,%eax
ret

LLVM IR (-O0):
define i32 @sqliteIntHash(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %4
%7 = shl i32 %6, 8
%8 = xor i32 %5, %7
%9 = load i32, i32* %4
%10 = ashr i32 %9, 8
%11 = xor i32 %8, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @sqliteIntHash(i8* nocapture readnone %0, i32 %1) {
%3 = shl i32 %1, 8
%4 = xor i32 %3, %1
%5 = ashr i32 %1, 8
%6 = xor i32 %4, %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ test_parser_sourcefile(char *, char *);
int /*<<< orphan*/ test_parser_verify_parse(int /*<<< orphan*/, char *, char *,
                                            char *, int /*<<< orphan*/);
void test_c_block_comment() {
  test_parser_verify_parse(test_parser_sourcefile("c", "/*c*/"), "c", "",
                           "/*c*/", 0);
}


x86 assembly (clang, -O0):
<test_c_block_comment>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xed0(%rip),%rsi
call   1030 <test_parser_sourcefile@plt>
mov    %eax,%edi
lea    0xec0(%rip),%rsi
lea    0xec0(%rip),%rdx
lea    0xeb4(%rip),%rcx
xor    %r8d,%r8d
call   1040 <test_parser_verify_parse@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_c_block_comment>:
push   %r14
push   %rbx
push   %rax
lea    0xed5(%rip),%rbx
lea    0xed0(%rip),%r14
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <test_parser_sourcefile@plt>
lea    0xec3(%rip),%rdx
mov    %eax,%edi
mov    %rbx,%rsi
mov    %r14,%rcx
xor    %r8d,%r8d
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <test_parser_verify_parse@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"c\00"
@.str.1 = [6 x i8] c"/*c*/\00"
@.str.2 = [1 x i8] zeroinitializer
define void @test_c_block_comment() {
%1 = call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%2 = call i32 @test_parser_verify_parse(i32 %1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 0)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"c\00"
@.str.1 = [6 x i8] c"/*c*/\00"
@.str.2 = [1 x i8] zeroinitializer
define void @test_c_block_comment() {
%1 = tail call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @test_parser_verify_parse(i32 %1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 0)
ret void
}
int strcmp(const char *s1, const char *s2) {
  register signed char __res;
  while (1) {
    if ((__res = *s1 - *s2++) != 0 || !*s1++)
      break;
  }
  return __res;
}


x86 assembly (clang, -O0):
<strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
movsbl (%rcx),%ecx
sub    %ecx,%eax
mov    %al,-0x11(%rbp)
movsbl %al,%eax
cmp    $0x0,%eax
jne    114e <strcmp+0x4e>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,(%rax)
jne    1153 <strcmp+0x53>
jmp    1158 <strcmp+0x58>
jmp    110c <strcmp+0xc>
movsbl -0x11(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%rdi,%rax,1),%edx
mov    %edx,%ecx
sub    (%rsi,%rax,1),%cl
test   %dl,%dl
je     1125 <strcmp+0x25>
add    $0x1,%rax
test   %cl,%cl
je     1110 <strcmp+0x10>
movsbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %6
6: ; preds = %2, %24
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %4
%12 = load i8, i8* %10
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %9, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %5
%16 = sext i8 %15 to i32
%17 = icmp ne i32 %16, 0
br i1 %17, label %23, label %18
18: ; preds = %6
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %3
%21 = load i8, i8* %19
%22 = icmp ne i8 %21, 0
br i1 %22, label %24, label %23
23: ; preds = %18, %6
br label %25
24: ; preds = %18
br label %6
25: ; preds = %23
%26 = load i8, i8* %5
%27 = sext i8 %26 to i32
ret i32 %27
}

LLVM IR (-O2):
define i32 @strcmp(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %1, %2 ], [ %10, %3 ]
%5 = phi i8* [ %0, %2 ], [ %11, %3 ]
%6 = load i8, i8* %5
%7 = load i8, i8* %4
%8 = sub i8 %6, %7
%9 = icmp ne i8 %8, 0
%10 = getelementptr inbounds i8, i8* %4, i64 1
%11 = getelementptr inbounds i8, i8* %5, i64 1
%12 = icmp eq i8 %6, 0
%13 = or i1 %12, %9
br i1 %13, label %14, label %3
14: ; preds = %3
%15 = sext i8 %8 to i32
ret i32 %15
}
/* Variables and functions */
scalar_t__ ft_itoa(int);
int /*<<< orphan*/ ft_putstr_fd(char *, int);
void ft_putnbr_fd(int n, int fd) { ft_putstr_fd((char *)ft_itoa(n), fd); }


x86 assembly (clang, -O0):
<ft_putnbr_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ft_itoa@plt>
mov    %rax,%rdi
mov    -0x8(%rbp),%esi
call   1040 <ft_putstr_fd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putnbr_fd>:
push   %rbx
mov    %esi,%ebx
call   1030 <ft_itoa@plt>
mov    %rax,%rdi
mov    %ebx,%esi
pop    %rbx
jmp    1040 <ft_putstr_fd@plt>

LLVM IR (-O0):
define void @ft_putnbr_fd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i64 @ft_itoa(i32 %5)
%7 = inttoptr i64 %6 to i8*
%8 = load i32, i32* %4
%9 = call i32 @ft_putstr_fd(i8* %7, i32 %8)
ret void
}

LLVM IR (-O2):
define void @ft_putnbr_fd(i32 %0, i32 %1) {
%3 = tail call i64 @ft_itoa(i32 %0)
%4 = inttoptr i64 %3 to i8*
%5 = tail call i32 @ft_putstr_fd(i8* %4, i32 %1)
ret void
}
int f4(int t, int v) {
  int a = 1U - t;
  int b = a * v;
  return v - b;
}


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x1,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @f4(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = sub i32 1, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = mul nsw i32 %9, %10
store i32 %11, i32* %6
%12 = load i32, i32* %4
%13 = load i32, i32* %6
%14 = sub nsw i32 %12, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @f4(i32 %0, i32 %1) {
%3 = mul i32 %1, %0
ret i32 %3
}