xunge/DecIR huggingface dataset:
/* Variables and functions */
int IPC_isModuleConnected(char const *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, ...);
int /*<<< orphan*/ stderr;
void connect1Hnd(const char *moduleName, void *clientData) {
  fprintf(stderr, "CONNECT1: Connection from %s\n", moduleName);
  fprintf(stderr, "          Confirming connection (%d)\n",
          IPC_isModuleConnected(moduleName));
}


x86 assembly (clang, -O0):
<connect1Hnd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xebc(%rip),%rsi
mov    $0x0,%al
call   1040 <fprintf@plt>
mov    0x2e8e(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <IPC_isModuleConnected@plt>
mov    -0x14(%rbp),%edi
mov    %eax,%edx
lea    0xeb2(%rip),%rsi
mov    $0x0,%al
call   1040 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<connect1Hnd>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2eb3(%rip),%rbp
mov    0x0(%rbp),%edi
lea    0xec9(%rip),%rsi
mov    %rbx,%rdx
xor    %eax,%eax
call   1040 <fprintf@plt>
mov    0x0(%rbp),%ebp
mov    %rbx,%rdi
call   1030 <IPC_isModuleConnected@plt>
lea    0xecb(%rip),%rsi
mov    %ebp,%edi
mov    %eax,%edx
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [30 x i8] c"CONNECT1: Connection from %s\0A\00"
@.str.1 = [38 x i8] c" Confirming connection (%d)\0A\00"
define void @connect1Hnd(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = call i32 (i32, i8*, ...) @fprintf(i32 %5, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = load i32, i32* @stderr
%9 = load i8*, i8** %3
%10 = call i32 @IPC_isModuleConnected(i8* %9)
%11 = call i32 (i32, i8*, ...) @fprintf(i32 %8, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0), i32 %10)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [30 x i8] c"CONNECT1: Connection from %s\0A\00"
@.str.1 = [38 x i8] c" Confirming connection (%d)\0A\00"
define void @connect1Hnd(i8* %0, i8* nocapture readnone %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 (i32, i8*, ...) @fprintf(i32 %3, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* %0)
%5 = load i32, i32* @stderr
%6 = tail call i32 @IPC_isModuleConnected(i8* %0)
%7 = tail call i32 (i32, i8*, ...) @fprintf(i32 %5, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int /*<<< orphan*/ endswap_int64_t_array(int /*<<< orphan*/ *, int);
void endswap_double_array(double *ptr, int len) {
  endswap_int64_t_array((int64_t *)ptr, len);
}


x86 assembly (clang, -O0):
<endswap_double_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <endswap_int64_t_array@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<endswap_double_array>:
jmp    1030 <endswap_int64_t_array@plt>

LLVM IR (-O0):
define void @endswap_double_array(double* %0, i32 %1) {
%3 = alloca double*
%4 = alloca i32
store double* %0, double** %3
store i32 %1, i32* %4
%5 = load double*, double** %3
%6 = bitcast double* %5 to i32*
%7 = load i32, i32* %4
%8 = call i32 @endswap_int64_t_array(i32* %6, i32 %7)
ret void
}

LLVM IR (-O2):
define void @endswap_double_array(double* %0, i32 %1) {
%3 = bitcast double* %0 to i32*
%4 = tail call i32 @endswap_int64_t_array(i32* %3, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GL_COLOR_BUFFER_BIT;
int /*<<< orphan*/ drawmesh(int, int);
int /*<<< orphan*/ glClear(int /*<<< orphan*/);
int /*<<< orphan*/ glutSwapBuffers();
void display(void) {
  glClear(GL_COLOR_BUFFER_BIT);
  drawmesh(32, 32);
  glutSwapBuffers();
}


x86 assembly (clang, -O0):
<display>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
call   1040 <glClear@plt>
mov    $0x20,%esi
mov    %esi,%edi
call   1030 <drawmesh@plt>
mov    $0x0,%al
call   1050 <glutSwapBuffers@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display>:
push   %rax
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
call   1040 <glClear@plt>
mov    $0x20,%edi
mov    $0x20,%esi
call   1030 <drawmesh@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <glutSwapBuffers@plt>

LLVM IR (-O0):
@GL_COLOR_BUFFER_BIT = global i32 0
define void @display() {
%1 = load i32, i32* @GL_COLOR_BUFFER_BIT
%2 = call i32 @glClear(i32 %1)
%3 = call i32 @drawmesh(i32 32, i32 32)
%4 = call i32 (...) @glutSwapBuffers()
ret void
}

LLVM IR (-O2):
@GL_COLOR_BUFFER_BIT = global i32 0
define void @display() {
%1 = load i32, i32* @GL_COLOR_BUFFER_BIT
%2 = tail call i32 @glClear(i32 %1)
%3 = tail call i32 @drawmesh(i32 32, i32 32)
%4 = tail call i32 (...) @glutSwapBuffers()
ret void
}
double interpolate(double norm, double min, double max) {
  return (norm * (max - min) + min);
}


x86 assembly (clang, -O0):
<interpolate>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm2
subsd  -0x10(%rbp),%xmm2
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<interpolate>:
subsd  %xmm1,%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @interpolate(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %6
%9 = load double, double* %5
%10 = fsub double %8, %9
%11 = load double, double* %5
%12 = call double @llvm.fmuladd.f64(double %7, double %10, double %11)
ret double %12
}

LLVM IR (-O2):
define double @interpolate(double %0, double %1, double %2) {
%4 = fsub double %2, %1
%5 = tail call double @llvm.fmuladd.f64(double %0, double %4, double %1)
ret double %5
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void PWMSyncTimeBase(uint32_t ui32Base, uint32_t ui32GenBits) {
  ;

  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000004))) = ui32GenBits;
}


x86 assembly (clang, -O0):
<PWMSyncTimeBase>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMSyncTimeBase>:
mov    %rsi,0x4(%rdi)
ret

LLVM IR (-O0):
define void @PWMSyncTimeBase(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add nsw i64 %6, 4
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @PWMSyncTimeBase(i64 %0, i64 %1) {
%3 = add nsw i64 %0, 4
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int solcon_standard_drop_coordinate_by_index(int k) {
  int fail, *b;
  double *c;
  fail = _ada_use_c2phc(38, &k, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_standard_drop_coordinate_by_index>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x26,%edi
lea    -0x4(%rbp),%rsi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_standard_drop_coordinate_by_index>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x26,%edi
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @solcon_standard_drop_coordinate_by_index(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32*
%5 = alloca double*
store i32 %0, i32* %2
%6 = load i32*, i32** %4
%7 = load double*, double** %5
%8 = call i32 @_ada_use_c2phc(i32 38, i32* %2, i32* %6, double* %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @solcon_standard_drop_coordinate_by_index(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @_ada_use_c2phc(i32 38, i32* %2, i32* undef, double* undef)
ret i32 %3
}
/* Variables and functions */
double log(double);
int /*<<< orphan*/ mpf_set_default_prec(int);
void set_bits(int prec, int nterms) {
  double v = ((double)prec) * log(10.0) / log(2.0);
  int bits = (int)(v + 300 + 3 * nterms);
  mpf_set_default_prec(bits);
}


x86 assembly (clang, -O0):
<set_bits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  0xed0(%rip),%xmm0
call   1040 <log@plt>
movaps %xmm0,%xmm1
movsd  -0x28(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  0xeaa(%rip),%xmm0
call   1040 <log@plt>
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xe84(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
imul   $0x3,-0x8(%rbp),%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1030 <mpf_set_default_prec@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_bits>:
cvtsi2sd %edi,%xmm0
mulsd  0xee4(%rip),%xmm0
divsd  0xee4(%rip),%xmm0
addsd  0xee4(%rip),%xmm0
lea    (%rsi,%rsi,2),%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm0,%xmm1
cvttsd2si %xmm1,%edi
jmp    1030 <mpf_set_default_prec@plt>

LLVM IR (-O0):
define void @set_bits(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca double
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = sitofp i32 %7 to double
%9 = call double @log(double 1.000000e+01)
%10 = fmul double %8, %9
%11 = call double @log(double 2.000000e+00)
%12 = fdiv double %10, %11
store double %12, double* %5
%13 = load double, double* %5
%14 = fadd double %13, 3.000000e+02
%15 = load i32, i32* %4
%16 = mul nsw i32 3, %15
%17 = sitofp i32 %16 to double
%18 = fadd double %14, %17
%19 = fptosi double %18 to i32
store i32 %19, i32* %6
%20 = load i32, i32* %6
%21 = call i32 @mpf_set_default_prec(i32 %20)
ret void
}

LLVM IR (-O2):
define void @set_bits(i32 %0, i32 %1) {
%3 = sitofp i32 %0 to double
%4 = fmul double %3, 0x40026BB1BBB55516
%5 = fdiv double %4, 0x3FE62E42FEFA39EF
%6 = fadd double %5, 3.000000e+02
%7 = mul nsw i32 %1, 3
%8 = sitofp i32 %7 to double
%9 = fadd double %6, %8
%10 = fptosi double %9 to i32
%11 = tail call i32 @mpf_set_default_prec(i32 %10)
ret void
}
/* Type definitions */
struct wav_data {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ generate_sine(int, int, int, struct wav_data *);
void generate_1(struct wav_data *wave_data) {
  generate_sine(2400, 8, 44100, wave_data);
}


x86 assembly (clang, -O0):
<generate_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x960,%edi
mov    $0x8,%esi
mov    $0xac44,%edx
call   1030 <generate_sine@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_1>:
mov    %rdi,%rcx
mov    $0x960,%edi
mov    $0x8,%esi
mov    $0xac44,%edx
jmp    1030 <generate_sine@plt>

LLVM IR (-O0):
%struct.wav_data = type { i32 }
define void @generate_1(%struct.wav_data* %0) {
%2 = alloca %struct.wav_data*
store %struct.wav_data* %0, %struct.wav_data** %2
%3 = load %struct.wav_data*, %struct.wav_data** %2
%4 = call i32 @generate_sine(i32 2400, i32 8, i32 44100, %struct.wav_data* %3)
ret void
}

LLVM IR (-O2):
%struct.wav_data = type { i32 }
define void @generate_1(%struct.wav_data* %0) {
%2 = tail call i32 @generate_sine(i32 2400, i32 8, i32 44100, %struct.wav_data* %0)
ret void
}
void testfunction() {}


x86 assembly (clang, -O0):
<testfunction>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testfunction>:
ret

LLVM IR (-O0):
define void @testfunction() {
ret void
}

LLVM IR (-O2):
define void @testfunction() {
ret void
}
void __hv_fma_f(float bIn0, float bIn1, float bIn2, float *bOut) {
  *bOut = ((bIn0 * bIn1) + bIn2);
}


x86 assembly (clang, -O0):
<__hv_fma_f>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
mov    %rdi,-0x18(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm2
movss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
mov    -0x18(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__hv_fma_f>:
mulss  %xmm1,%xmm0
addss  %xmm2,%xmm0
movss  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @__hv_fma_f(float %0, float %1, float %2, float* %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float*
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float* %3, float** %8
%9 = load float, float* %5
%10 = load float, float* %6
%11 = load float, float* %7
%12 = call float @llvm.fmuladd.f32(float %9, float %10, float %11)
%13 = load float*, float** %8
store float %12, float* %13
ret void
}

LLVM IR (-O2):
define void @__hv_fma_f(float %0, float %1, float %2, float* nocapture writeonly %3) {
%5 = tail call float @llvm.fmuladd.f32(float %0, float %1, float %2)
store float %5, float* %3
ret void
}
float flt_mul_add(float a, float b, float c) { return (a * b) + c; }


x86 assembly (clang, -O0):
<flt_mul_add>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm2
movss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<flt_mul_add>:
mulss  %xmm1,%xmm0
addss  %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @flt_mul_add(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = load float, float* %6
%10 = call float @llvm.fmuladd.f32(float %7, float %8, float %9)
ret float %10
}

LLVM IR (-O2):
define float @flt_mul_add(float %0, float %1, float %2) {
%4 = tail call float @llvm.fmuladd.f32(float %0, float %1, float %2)
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void rax_free(void *p) { free(p); }


x86 assembly (clang, -O0):
<rax_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rax_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @rax_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @rax_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
struct property *of_find_property(const struct device_node *np,
                                  const char *name, int *lenp) {
  return ((void *)0);
}


x86 assembly (clang, -O0):
<of_find_property>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<of_find_property>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.property = type opaque
%struct.device_node = type opaque
define %struct.property* @of_find_property(%struct.device_node* %0, i8* %1, i32* %2) {
%4 = alloca %struct.device_node*
%5 = alloca i8*
%6 = alloca i32*
store %struct.device_node* %0, %struct.device_node** %4
store i8* %1, i8** %5
store i32* %2, i32** %6
ret %struct.property* null
}

LLVM IR (-O2):
%struct.property = type opaque
%struct.device_node = type opaque
define noalias %struct.property* @of_find_property(%struct.device_node* nocapture readnone %0, i8* nocapture readnone %1, i32* nocapture readnone %2) {
ret %struct.property* null
}
/* Variables and functions */
int /*<<< orphan*/ NRerror(char *);
scalar_t__ malloc(size_t);
float *vector(long nl, long nh) {
  float *v;
  v = (float *)malloc((size_t)((nh - nl + 1 + 1) * sizeof(float)));
  if (!v)
    NRerror("allocation failure in vector()");
  return v - nl + 1;
}


x86 assembly (clang, -O0):
<vector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
sub    -0x8(%rbp),%rdi
add    $0x1,%rdi
add    $0x1,%rdi
shl    $0x2,%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1164 <vector+0x44>
lea    0xea1(%rip),%rdi
call   1030 <NRerror@plt>
mov    -0x18(%rbp),%rax
xor    %ecx,%ecx
sub    -0x8(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
add    $0x4,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vector>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
sub    %rdi,%rsi
lea    0x8(,%rsi,4),%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    114b <vector+0x2b>
lea    0xeba(%rip),%rdi
call   1030 <NRerror@plt>
shl    $0x2,%r14
sub    %r14,%rbx
add    $0x4,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [31 x i8] c"allocation failure in vector()\00"
define float* @vector(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca float*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = load i64, i64* %3
%8 = sub nsw i64 %6, %7
%9 = add nsw i64 %8, 1
%10 = add nsw i64 %9, 1
%11 = mul i64 %10, 4
%12 = call i64 @malloc(i64 %11)
%13 = inttoptr i64 %12 to float*
store float* %13, float** %5
%14 = load float*, float** %5
%15 = icmp ne float* %14, null
br i1 %15, label %18, label %16
16: ; preds = %2
%17 = call i32 @NRerror(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
br label %18
18: ; preds = %16, %2
%19 = load float*, float** %5
%20 = load i64, i64* %3
%21 = sub i64 0, %20
%22 = getelementptr inbounds float, float* %19, i64 %21
%23 = getelementptr inbounds float, float* %22, i64 1
ret float* %23
}

LLVM IR (-O2):
@.str = [31 x i8] c"allocation failure in vector()\00"
define float* @vector(i64 %0, i64 %1) {
%3 = sub nsw i64 %1, %0
%4 = shl i64 %3, 2
%5 = add i64 %4, 8
%6 = tail call i64 @malloc(i64 %5)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 @NRerror(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %2
%11 = inttoptr i64 %6 to float*
%12 = sub i64 0, %0
%13 = getelementptr inbounds float, float* %11, i64 %12
%14 = getelementptr inbounds float, float* %13, i64 1
ret float* %14
}
/* Variables and functions */
int /*<<< orphan*/ getchar();
int /*<<< orphan*/ puts(char *);
void wait_key(void) {
  puts("\nPress Enter to continue ...");
  getchar();
}


x86 assembly (clang, -O0):
<wait_key>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <puts@plt>
mov    $0x0,%al
call   1040 <getchar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait_key>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <getchar@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"\0APress Enter to continue ...\00"
define void @wait_key() {
%1 = call i32 @puts(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @getchar()
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"\0APress Enter to continue ...\00"
define void @wait_key() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @getchar()
ret void
}
/* Variables and functions */
double pow(double, int);
double minus_squared(double a, double b) { return pow(a - b, 2); }


x86 assembly (clang, -O0):
<minus_squared>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
mov    $0x2,%edi
call   1030 <pow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<minus_squared>:
subsd  %xmm1,%xmm0
mov    $0x2,%edi
jmp    1030 <pow@plt>

LLVM IR (-O0):
define double @minus_squared(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fsub double %5, %6
%8 = call double @pow(double %7, i32 2)
ret double %8
}

LLVM IR (-O2):
define double @minus_squared(double %0, double %1) {
%3 = fsub double %0, %1
%4 = tail call double @pow(double %3, i32 2)
ret double %4
}
/* Variables and functions */
char *strdup(char *);
int util_md5_digest(char *path, char **digestp) {
  int res = 0;
  *digestp = strdup("");
  if (*digestp == NULL) {
    res = 14;
    goto done;
  }
done:
  return res;
}


x86 assembly (clang, -O0):
<util_md5_digest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
lea    0xed2(%rip),%rdi
call   1030 <strdup@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
jne    1157 <util_md5_digest+0x47>
movl   $0xe,-0x14(%rbp)
jmp    115c <util_md5_digest+0x4c>
jmp    115c <util_md5_digest+0x4c>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_md5_digest>:
push   %rbx
mov    %rsi,%rbx
lea    0xee5(%rip),%rdi
call   1030 <strdup@plt>
mov    %rax,(%rbx)
xor    %ecx,%ecx
test   %rax,%rax
mov    $0xe,%eax
cmovne %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i32 @util_md5_digest(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
%5 = alloca i32
store i8* %0, i8** %3
store i8** %1, i8*** %4
store i32 0, i32* %5
%6 = call i8* @strdup(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%7 = load i8**, i8*** %4
store i8* %6, i8** %7
%8 = load i8**, i8*** %4
%9 = load i8*, i8** %8
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 14, i32* %5
br label %13
12: ; preds = %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %5
ret i32 %14
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i32 @util_md5_digest(i8* nocapture readnone %0, i8** nocapture writeonly %1) {
%3 = tail call dereferenceable_or_null(1) i8* @strdup(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
store i8* %3, i8** %1
%4 = icmp eq i8* %3, null
%5 = select i1 %4, i32 14, i32 0
ret i32 %5
}
void flushpackets(void) {}


x86 assembly (clang, -O0):
<flushpackets>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flushpackets>:
ret

LLVM IR (-O0):
define void @flushpackets() {
ret void
}

LLVM IR (-O2):
define void @flushpackets() {
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  unsigned long root;
};
struct TYPE_4__ {
  TYPE_1__ xkey;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xkey_root(void *_p, unsigned long _v) {
  ((XEvent *)_p)->xkey.root = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xkey_root>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xkey_root>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define void @set_XEvent_xkey_root(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i64 %5, i64* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xkey_root(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ resetEffects(int **);
int /*<<< orphan*/ writePositionEffect(int **);
void erasePosition(int row, int col, int **chessboard) {
  chessboard[row][col] = 0;
  resetEffects(chessboard);
  writePositionEffect(chessboard);
}


x86 assembly (clang, -O0):
<erasePosition>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
movslq -0x8(%rbp),%rcx
movl   $0x0,(%rax,%rcx,4)
mov    -0x10(%rbp),%rdi
call   1030 <resetEffects@plt>
mov    -0x10(%rbp),%rdi
call   1040 <writePositionEffect@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<erasePosition>:
push   %rbx
mov    %rdx,%rbx
movslq %edi,%rax
mov    (%rdx,%rax,8),%rax
movslq %esi,%rcx
movl   $0x0,(%rax,%rcx,4)
mov    %rdx,%rdi
call   1030 <resetEffects@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <writePositionEffect@plt>

LLVM IR (-O0):
define void @erasePosition(i32 %0, i32 %1, i32** %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32**
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32** %2, i32*** %6
%7 = load i32**, i32*** %6
%8 = load i32, i32* %4
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i32*, i32** %7, i64 %9
%11 = load i32*, i32** %10
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
store i32 0, i32* %14
%15 = load i32**, i32*** %6
%16 = call i32 @resetEffects(i32** %15)
%17 = load i32**, i32*** %6
%18 = call i32 @writePositionEffect(i32** %17)
ret void
}

LLVM IR (-O2):
define void @erasePosition(i32 %0, i32 %1, i32** %2) {
%4 = sext i32 %0 to i64
%5 = getelementptr inbounds i32*, i32** %2, i64 %4
%6 = load i32*, i32** %5
%7 = sext i32 %1 to i64
%8 = getelementptr inbounds i32, i32* %6, i64 %7
store i32 0, i32* %8
%9 = tail call i32 @resetEffects(i32** %2)
%10 = tail call i32 @writePositionEffect(i32** %2)
ret void
}
int nondetpos() { return 1; }


x86 assembly (clang, -O0):
<nondetpos>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nondetpos>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @nondetpos() {
ret i32 1
}

LLVM IR (-O2):
define i32 @nondetpos() {
ret i32 1
}
void apply(void (*f)(double, double *, double *), double x, double *sinx,
           double *cosx) {
  f(x, sinx, cosx);
  return;
}


x86 assembly (clang, -O0):
<apply>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
movsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<apply>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rdx,%rsi
jmp    *%rax

LLVM IR (-O0):
define void @apply(void (double, double*, double*)* %0, double %1, double* %2, double* %3) {
%5 = alloca void (double, double*, double*)*
%6 = alloca double
%7 = alloca double*
%8 = alloca double*
store void (double, double*, double*)* %0, void (double, double*, double*)** %5
store double %1, double* %6
store double* %2, double** %7
store double* %3, double** %8
%9 = load void (double, double*, double*)*, void (double, double*, double*)** %5
%10 = load double, double* %6
%11 = load double*, double** %7
%12 = load double*, double** %8
ret void
}

LLVM IR (-O2):
define void @apply(void (double, double*, double*)* nocapture %0, double %1, double* %2, double* %3) {
tail call void %0(double %1, double* %2, double* %3)
ret void
}
void opcode_dd() {}


x86 assembly (clang, -O0):
<opcode_dd>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<opcode_dd>:
ret

LLVM IR (-O0):
define void @opcode_dd() {
ret void
}

LLVM IR (-O2):
define void @opcode_dd() {
ret void
}
/* Type definitions */
struct section_hash_iter {
  int dummy;
};
struct section_hash {
  int dummy;
};
struct iterator {
  int dummy;
};
struct genhash_iter {
  int dummy;
};
struct genhash {
  int dummy;
};

/* Variables and functions */
struct iterator *genhash_iter_init(struct genhash_iter *,
                                   struct genhash const *);
struct iterator *section_hash_iter_init(struct section_hash_iter *iter,
                                        const struct section_hash *tthis) {
  return genhash_iter_init((struct genhash_iter *)iter,
                           (const struct genhash *)tthis);
}


x86 assembly (clang, -O0):
<section_hash_iter_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <genhash_iter_init@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<section_hash_iter_init>:
jmp    1030 <genhash_iter_init@plt>

LLVM IR (-O0):
%struct.iterator = type { i32 }
%struct.section_hash_iter = type { i32 }
%struct.section_hash = type { i32 }
%struct.genhash_iter = type { i32 }
%struct.genhash = type { i32 }
define %struct.iterator* @section_hash_iter_init(%struct.section_hash_iter* %0, %struct.section_hash* %1) {
%3 = alloca %struct.section_hash_iter*
%4 = alloca %struct.section_hash*
store %struct.section_hash_iter* %0, %struct.section_hash_iter** %3
store %struct.section_hash* %1, %struct.section_hash** %4
%5 = load %struct.section_hash_iter*, %struct.section_hash_iter** %3
%6 = bitcast %struct.section_hash_iter* %5 to %struct.genhash_iter*
%7 = load %struct.section_hash*, %struct.section_hash** %4
%8 = bitcast %struct.section_hash* %7 to %struct.genhash*
%9 = call %struct.iterator* @genhash_iter_init(%struct.genhash_iter* %6, %struct.genhash* %8)
ret %struct.iterator* %9
}

LLVM IR (-O2):
%struct.iterator = type { i32 }
%struct.section_hash_iter = type { i32 }
%struct.section_hash = type { i32 }
%struct.genhash_iter = type { i32 }
%struct.genhash = type { i32 }
define %struct.iterator* @section_hash_iter_init(%struct.section_hash_iter* %0, %struct.section_hash* %1) {
%3 = bitcast %struct.section_hash_iter* %0 to %struct.genhash_iter*
%4 = bitcast %struct.section_hash* %1 to %struct.genhash*
%5 = tail call %struct.iterator* @genhash_iter_init(%struct.genhash_iter* %3, %struct.genhash* %4)
ret %struct.iterator* %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void sig_quit(int signo) { printf("signal SIGQUIT caught\n"); }


x86 assembly (clang, -O0):
<sig_quit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_quit>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"signal SIGQUIT caught\0A\00"
define void @sig_quit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [22 x i8] c"signal SIGQUIT caught\00"
define void @sig_quit(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
void Section4Perim(float radius) {
  printf("\n4.- The perimeter is: %.2f", radius * 2 * 3.141592);
}


x86 assembly (clang, -O0):
<Section4Perim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  0xee3(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xeca(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
lea    0xec7(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Section4Perim>:
addss  %xmm0,%xmm0
cvtss2sd %xmm0,%xmm0
mulsd  0xee0(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
lea    0xedd(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"\0A4.- The perimeter is: %.2f\00"
define void @Section4Perim(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float %3, 2.000000e+00
%5 = fpext float %4 to double
%6 = fmul double %5, 0x400921FAFC8B007A
%7 = fptrunc double %6 to float
%8 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), float %7)
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c"\0A4.- The perimeter is: %.2f\00"
define void @Section4Perim(float %0) {
%2 = fmul float %0, 2.000000e+00
%3 = fpext float %2 to double
%4 = fmul double %3, 0x400921FAFC8B007A
%5 = fptrunc double %4 to float
%6 = tail call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), float %5)
ret void
}
void regerror(s) const char *s;
{ return; }


x86 assembly (clang, -O0):
<regerror>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<regerror>:
ret

LLVM IR (-O0):
define void @regerror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @regerror(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ outb(int /*<<< orphan*/, int);
void clear_dma_ff(unsigned int dmanr) {
  if (dmanr <= 3)
    outb(0, 0x0C);
  else
    outb(0, 0xD8);
}


x86 assembly (clang, -O0):
<clear_dma_ff>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x3,-0x4(%rbp)
ja     1136 <clear_dma_ff+0x26>
xor    %edi,%edi
mov    $0xc,%esi
call   1030 <outb@plt>
jmp    1142 <clear_dma_ff+0x32>
xor    %edi,%edi
mov    $0xd8,%esi
call   1030 <outb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_dma_ff>:
cmp    $0x4,%edi
mov    $0xc,%eax
mov    $0xd8,%esi
cmovb  %eax,%esi
xor    %edi,%edi
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @clear_dma_ff(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ule i32 %3, 3
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @outb(i32 0, i32 12)
br label %9
7: ; preds = %1
%8 = call i32 @outb(i32 0, i32 216)
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @clear_dma_ff(i32 %0) {
%2 = icmp ult i32 %0, 4
%3 = select i1 %2, i32 12, i32 216
%4 = tail call i32 @outb(i32 0, i32 %3)
ret void
}
void descend(void *a, void *b) {
  int *first = (int *)a;
  int *second = (int *)b;
  int tmp = 0;
  if (*first < *second) {
    tmp = *first;
    *first = *second;
    *second = tmp;
  }
}


x86 assembly (clang, -O0):
<descend>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
movl   $0x0,-0x24(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
cmp    (%rcx),%eax
jge    1153 <descend+0x53>
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x24(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x24(%rbp),%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<descend>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
cmp    %ecx,%eax
jge    110c <descend+0xc>
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @descend(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%8 = load i8*, i8** %3
%9 = bitcast i8* %8 to i32*
store i32* %9, i32** %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i32*
store i32* %11, i32** %6
store i32 0, i32* %7
%12 = load i32*, i32** %5
%13 = load i32, i32* %12
%14 = load i32*, i32** %6
%15 = load i32, i32* %14
%16 = icmp slt i32 %13, %15
br i1 %16, label %17, label %25
17: ; preds = %2
%18 = load i32*, i32** %5
%19 = load i32, i32* %18
store i32 %19, i32* %7
%20 = load i32*, i32** %6
%21 = load i32, i32* %20
%22 = load i32*, i32** %5
store i32 %21, i32* %22
%23 = load i32, i32* %7
%24 = load i32*, i32** %6
store i32 %23, i32* %24
br label %25
25: ; preds = %17, %2
ret void
}

LLVM IR (-O2):
define void @descend(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 %6, i32* %3
store i32 %5, i32* %4
br label %9
9: ; preds = %8, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ die(char *);
void *realloc(void *, size_t);
void *srealloc(void *ptr, size_t size) {
  ptr = realloc(ptr, size);
  if (!ptr)
    die("out of memory");
  return ptr;
}


x86 assembly (clang, -O0):
<srealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <realloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1158 <srealloc+0x38>
lea    0xead(%rip),%rdi
call   1040 <die@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<srealloc>:
push   %rbx
call   1030 <realloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <srealloc+0x1a>
lea    0xecb(%rip),%rdi
call   1040 <die@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"out of memory\00"
define i8* @srealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i8* @realloc(i8* %5, i64 %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = icmp ne i8* %8, null
br i1 %9, label %12, label %10
10: ; preds = %2
%11 = call i32 @die(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %10, %2
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@.str = [14 x i8] c"out of memory\00"
define noalias i8* @srealloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @die(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void Usage(const char *proc) { printf("Usage : %s [IP] [PORT]\n", proc); }


x86 assembly (clang, -O0):
<Usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Usage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"Usage : %s [IP] [PORT]\0A\00"
define void @Usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"Usage : %s [IP] [PORT]\0A\00"
define void @Usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
int gen_module_open(struct inode *inode, struct file *file) {}


x86 assembly (clang, -O0):
<gen_module_open>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_module_open>:
ret

LLVM IR (-O0):
%struct.inode = type opaque
%struct.file = type opaque
define i32 @gen_module_open(%struct.inode* %0, %struct.file* %1) {
%3 = alloca i32
%4 = alloca %struct.inode*
%5 = alloca %struct.file*
store %struct.inode* %0, %struct.inode** %4
store %struct.file* %1, %struct.file** %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
%struct.inode = type opaque
%struct.file = type opaque
define i32 @gen_module_open(%struct.inode* nocapture readnone %0, %struct.file* nocapture readnone %1) {
ret i32 undef
}
int slash_preceded(const char *s) {
  if (!s) {
    return 0;
  }
  return (s[0] == '/') ? 1 : 0;
}


x86 assembly (clang, -O0):
<slash_preceded>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    111f <slash_preceded+0x1f>
movl   $0x0,-0x4(%rbp)
jmp    1136 <slash_preceded+0x36>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x2f,%edx
cmove  %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<slash_preceded>:
xor    %eax,%eax
test   %rdi,%rdi
je     110d <slash_preceded+0xd>
cmpb   $0x2f,(%rdi)
sete   %al
ret

LLVM IR (-O0):
define i32 @slash_preceded(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %7, label %6
6: ; preds = %1
store i32 0, i32* %2
br label %15
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 0
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 47
%13 = zext i1 %12 to i64
%14 = select i1 %12, i32 1, i32 0
store i32 %14, i32* %2
br label %15
15: ; preds = %7, %6
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @slash_preceded(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 47
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %1, %3
%8 = phi i32 [ %6, %3 ], [ 0, %1 ]
ret i32 %8
}
int sign_of(double x) {
  if (x < 0)
    return -1;
  if (x > 0)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<sign_of>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1123 <sign_of+0x23>
movl   $0xffffffff,-0x4(%rbp)
jmp    1148 <sign_of+0x48>
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    1141 <sign_of+0x41>
movl   $0x1,-0x4(%rbp)
jmp    1148 <sign_of+0x48>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sign_of>:
xorpd  %xmm1,%xmm1
xor    %ecx,%ecx
ucomisd %xmm1,%xmm0
seta   %cl
ucomisd %xmm0,%xmm1
mov    $0xffffffff,%eax
cmovbe %ecx,%eax
ret

LLVM IR (-O0):
define i32 @sign_of(double %0) {
%2 = alloca i32
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp olt double %4, 0.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 -1, i32* %2
br label %12
7: ; preds = %1
%8 = load double, double* %3
%9 = fcmp ogt double %8, 0.000000e+00
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 1, i32* %2
br label %12
11: ; preds = %7
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @sign_of(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
%3 = fcmp ogt double %0, 0.000000e+00
%4 = zext i1 %3 to i32
%5 = select i1 %2, i32 -1, i32 %4
ret i32 %5
}
void gtk_tree_view_get_columns() {}


x86 assembly (clang, -O0):
<gtk_tree_view_get_columns>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_view_get_columns>:
ret

LLVM IR (-O0):
define void @gtk_tree_view_get_columns() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_view_get_columns() {
ret void
}
/* Variables and functions */
unsigned int *malloc(int);
int *linsched_init_rand(const unsigned int seed) {
  unsigned int *state = malloc(sizeof(unsigned int));
  *state = seed ^ 123456789;
  return state;
}


x86 assembly (clang, -O0):
<linsched_init_rand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
xor    $0x75bcd15,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<linsched_init_rand>:
push   %rbx
mov    %edi,%ebx
mov    $0x4,%edi
call   1030 <malloc@plt>
xor    $0x75bcd15,%ebx
mov    %ebx,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define i32* @linsched_init_rand(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = call i32* @malloc(i32 4)
store i32* %4, i32** %3
%5 = load i32, i32* %2
%6 = xor i32 %5, 123456789
%7 = load i32*, i32** %3
store i32 %6, i32* %7
%8 = load i32*, i32** %3
ret i32* %8
}

LLVM IR (-O2):
define noalias i32* @linsched_init_rand(i32 %0) {
%2 = tail call i32* @malloc(i32 4)
%3 = xor i32 %0, 123456789
store i32 %3, i32* %2
ret i32* %2
}
/* Variables and functions */
double norm(double, double, double, double);
double norm1(double value, double max) { return norm(value, 0.0, max, 1.0); }


x86 assembly (clang, -O0):
<norm1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
xorps  %xmm1,%xmm1
movsd  0xec9(%rip),%xmm3
call   1030 <norm@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<norm1>:
movaps %xmm1,%xmm2
movsd  0xee5(%rip),%xmm3
xorps  %xmm1,%xmm1
jmp    1030 <norm@plt>

LLVM IR (-O0):
define double @norm1(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @norm(double %5, double 0.000000e+00, double %6, double 1.000000e+00)
ret double %7
}

LLVM IR (-O2):
define double @norm1(double %0, double %1) {
%3 = tail call double @norm(double %0, double 0.000000e+00, double %1, double 1.000000e+00)
ret double %3
}
int security_file_mmap(struct file *file, unsigned long reqprot,
                       unsigned long prot, unsigned long flags) {
  return 0;
}


x86 assembly (clang, -O0):
<security_file_mmap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<security_file_mmap>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.file = type opaque
define i32 @security_file_mmap(%struct.file* %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca %struct.file*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store %struct.file* %0, %struct.file** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
ret i32 0
}

LLVM IR (-O2):
%struct.file = type opaque
define i32 @security_file_mmap(%struct.file* nocapture readnone %0, i64 %1, i64 %2, i64 %3) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
void aml_array_int_1d_free(int *arr) { free(arr); }


x86 assembly (clang, -O0):
<aml_array_int_1d_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aml_array_int_1d_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @aml_array_int_1d_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @free(i32* %3)
ret void
}

LLVM IR (-O2):
define void @aml_array_int_1d_free(i32* nocapture %0) {
%2 = tail call i32 @free(i32* %0)
ret void
}