xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0x91() {
  Assert_real((isalnum(145) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              730, ("isalnum should be 0 for 0x91"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x91>:
push   %rbp
mov    %rsp,%rbp
mov    $0x91,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2da,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x91>:
push   %rax
mov    $0x91,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2da,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x91\00"
define void @t_isalnum_0x91() {
%1 = call i64 @isalnum(i32 145)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 730, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x91\00"
define void @t_isalnum_0x91() {
%1 = tail call i64 @isalnum(i32 145)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 730, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ cl_mem;
typedef int /*<<< orphan*/ cl_event;
typedef int /*<<< orphan*/ cl_command_queue;

/* Variables and functions */
int /*<<< orphan*/ inner_buffer_copy(int /*<<< orphan*/, int /*<<< orphan*/,
                                     int /*<<< orphan*/, size_t, size_t, size_t,
                                     unsigned int, int /*<<< orphan*/ const *,
                                     int /*<<< orphan*/ *);
void cl_buffer_copy(cl_command_queue command_queue, cl_mem from, cl_mem to,
                    size_t off_from, size_t off_to, size_t size,
                    unsigned num_evt, const cl_event *evt_list, cl_event *out) {
  inner_buffer_copy(command_queue, from, to, off_from, off_to, size, num_evt,
                    evt_list, out);
}


x86 assembly (clang, -O0):
<cl_buffer_copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x20(%rbp),%rax
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%eax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
mov    -0x28(%rbp),%r9
mov    0x10(%rbp),%r11d
mov    0x18(%rbp),%r10
mov    0x20(%rbp),%rax
mov    %r11d,(%rsp)
mov    %r10,0x8(%rsp)
mov    %rax,0x10(%rsp)
call   1030 <inner_buffer_copy@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cl_buffer_copy>:
jmp    1030 <inner_buffer_copy@plt>

LLVM IR (-O0):
define void @cl_buffer_copy(i32 %0, i32 %1, i32 %2, i64 %3, i64 %4, i64 %5, i32 %6, i32* %7, i32* %8) {
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i64
%14 = alloca i64
%15 = alloca i64
%16 = alloca i32
%17 = alloca i32*
%18 = alloca i32*
store i32 %0, i32* %10
store i32 %1, i32* %11
store i32 %2, i32* %12
store i64 %3, i64* %13
store i64 %4, i64* %14
store i64 %5, i64* %15
store i32 %6, i32* %16
store i32* %7, i32** %17
store i32* %8, i32** %18
%19 = load i32, i32* %10
%20 = load i32, i32* %11
%21 = load i32, i32* %12
%22 = load i64, i64* %13
%23 = load i64, i64* %14
%24 = load i64, i64* %15
%25 = load i32, i32* %16
%26 = load i32*, i32** %17
%27 = load i32*, i32** %18
%28 = call i32 @inner_buffer_copy(i32 %19, i32 %20, i32 %21, i64 %22, i64 %23, i64 %24, i32 %25, i32* %26, i32* %27)
ret void
}

LLVM IR (-O2):
define void @cl_buffer_copy(i32 %0, i32 %1, i32 %2, i64 %3, i64 %4, i64 %5, i32 %6, i32* %7, i32* %8) {
%10 = tail call i32 @inner_buffer_copy(i32 %0, i32 %1, i32 %2, i64 %3, i64 %4, i64 %5, i32 %6, i32* %7, i32* %8)
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t vga_entry(const unsigned char uc, const uint8_t color) {
  return (uint16_t)uc | (uint16_t)color << 8;
}


x86 assembly (clang, -O0):
<vga_entry>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movzbl -0x1(%rbp),%eax
mov    -0x10(%rbp),%rcx
shl    $0x8,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vga_entry>:
shl    $0x8,%esi
lea    (%rsi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @vga_entry(i8 zeroext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
store i8 %0, i8* %3
store i64 %1, i64* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i64, i64* %4
%8 = trunc i64 %7 to i32
%9 = shl i32 %8, 8
%10 = or i32 %6, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @vga_entry(i8 zeroext %0, i64 %1) {
%3 = zext i8 %0 to i32
%4 = trunc i64 %1 to i32
%5 = shl i32 %4, 8
%6 = or i32 %5, %3
ret i32 %6
}
unsigned long FindBitRate(void *devhandle) { return 0; }


x86 assembly (clang, -O0):
<FindBitRate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FindBitRate>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @FindBitRate(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i64 0
}

LLVM IR (-O2):
define i64 @FindBitRate(i8* nocapture readnone %0) {
ret i64 0
}
int test_imm_D0uint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0xD0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D0uint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0xd0,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D0uint64_midword_mem>:
testb  $0xd0,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D0uint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 208
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_D0uint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 13631488
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct flow {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ flow_compare(struct flow const *, struct flow const *);
bool flow_equal(const struct flow *a, const struct flow *b) {
  return !flow_compare(a, b);
}


x86 assembly (clang, -O0):
<flow_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <flow_compare@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flow_equal>:
push   %rax
call   1030 <flow_compare@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.flow = type { i32 }
define i32 @flow_equal(%struct.flow* %0, %struct.flow* %1) {
%3 = alloca %struct.flow*
%4 = alloca %struct.flow*
store %struct.flow* %0, %struct.flow** %3
store %struct.flow* %1, %struct.flow** %4
%5 = load %struct.flow*, %struct.flow** %3
%6 = load %struct.flow*, %struct.flow** %4
%7 = call i32 @flow_compare(%struct.flow* %5, %struct.flow* %6)
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
%struct.flow = type { i32 }
define i32 @flow_equal(%struct.flow* %0, %struct.flow* %1) {
%3 = tail call i32 @flow_compare(%struct.flow* %0, %struct.flow* %1)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
extern void shmem_int_and_to_all(int *target, int *source, int nreduce,
                                 int PE_start, int logPE_stride, int PE_size,
                                 int *pWrk, long *pSync) {
  printf("\nOpenSHMEM Analyzer\n");
}


x86 assembly (clang, -O0):
<shmem_int_and_to_all>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9d,-0x20(%rbp)
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmem_int_and_to_all>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"\0AOpenSHMEM Analyzer\0A\00"
define void @shmem_int_and_to_all(i32* %0, i32* %1, i32 %2, i32 %3, i32 %4, i32 %5, i32* %6, i64* %7) {
%9 = alloca i32*
%10 = alloca i32*
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32*
%16 = alloca i64*
store i32* %0, i32** %9
store i32* %1, i32** %10
store i32 %2, i32* %11
store i32 %3, i32* %12
store i32 %4, i32* %13
store i32 %5, i32* %14
store i32* %6, i32** %15
store i64* %7, i64** %16
%17 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [20 x i8] c"\0AOpenSHMEM Analyzer\00"
define void @shmem_int_and_to_all(i32* nocapture readnone %0, i32* nocapture readnone %1, i32 %2, i32 %3, i32 %4, i32 %5, i32* nocapture readnone %6, i64* nocapture readnone %7) {
%9 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret void
}
int sign(int x) {
  int a = x >> 31;
  return a + ((a + 1) & (!!x));
}


x86 assembly (clang, -O0):
<sign>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1f,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
cmpl   $0x0,-0x4(%rbp)
setne  %dl
xor    $0xff,%dl
xor    $0xff,%dl
and    $0x1,%dl
movzbl %dl,%edx
and    %edx,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sign>:
mov    %edi,%ecx
sar    $0x1f,%ecx
lea    0x1(%rcx),%edx
xor    %eax,%eax
test   %edi,%edi
setne  %al
and    %edx,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @sign(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = ashr i32 %4, 31
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 1
%9 = load i32, i32* %2
%10 = icmp ne i32 %9, 0
%11 = xor i1 %10, true
%12 = xor i1 %11, true
%13 = zext i1 %12 to i32
%14 = and i32 %8, %13
%15 = add nsw i32 %6, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @sign(i32 %0) {
%2 = ashr i32 %0, 31
%3 = add nsw i32 %2, 1
%4 = icmp ne i32 %0, 0
%5 = zext i1 %4 to i32
%6 = and i32 %3, %5
%7 = add nsw i32 %6, %2
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ g1parse();
int /*<<< orphan*/ g2parse();
int main() {
  g1parse();
  g2parse();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <g1parse@plt>
mov    $0x0,%al
call   1040 <g2parse@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <g1parse@plt>
xor    %eax,%eax
call   1040 <g2parse@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @g1parse()
%3 = call i32 (...) @g2parse()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @g1parse()
%2 = tail call i32 (...) @g2parse()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ *strchr(char const *, char);
bool mode_is_writing(const char *mode) { return strchr(mode, 'w') != NULL; }


x86 assembly (clang, -O0):
<mode_is_writing>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x77,%esi
call   1030 <strchr@plt>
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mode_is_writing>:
push   %rax
mov    $0x77,%esi
call   1030 <strchr@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @mode_is_writing(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32* @strchr(i8* %3, i8 signext 119)
%5 = icmp ne i32* %4, null
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @mode_is_writing(i8* %0) {
%2 = tail call i32* @strchr(i8* %0, i8 signext 119)
%3 = icmp ne i32* %2, null
%4 = zext i1 %3 to i32
ret i32 %4
}
int main(int argc, const char *argv[]) {
  struct my_struct {
    int a;
    float b;
    double c;
  } x;
  struct my_struct y = {.a = 1, .b = -78.9, .c = 7.9};
  x = y;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0xee7(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xee4(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.my_struct = type { i32, float, double }
@__const.main.y = %struct.my_struct { i32 1, float 0xC053B999A0000000, double 7.900000e+00 }
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca %struct.my_struct
%7 = alloca %struct.my_struct
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = bitcast %struct.my_struct* %7 to i8*
%9 = bitcast %struct.my_struct* %6 to i8*
%10 = bitcast %struct.my_struct* %7 to i8*
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ WRITE_REG32(unsigned long, unsigned long);
void gfx_write_reg32(unsigned long offset, unsigned long value) {
  WRITE_REG32(offset, value);
}


x86 assembly (clang, -O0):
<gfx_write_reg32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <WRITE_REG32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfx_write_reg32>:
jmp    1030 <WRITE_REG32@plt>

LLVM IR (-O0):
define void @gfx_write_reg32(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i32 @WRITE_REG32(i64 %5, i64 %6)
ret void
}

LLVM IR (-O2):
define void @gfx_write_reg32(i64 %0, i64 %1) {
%3 = tail call i32 @WRITE_REG32(i64 %0, i64 %1)
ret void
}
/* Variables and functions */
char const *gettext(char *);
const char *STMT_OWN_ERR() {
  return gettext("Unable to verify ownership of stmt.");
}


x86 assembly (clang, -O0):
<STMT_OWN_ERR>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <gettext@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<STMT_OWN_ERR>:
lea    0xee9(%rip),%rdi
jmp    1030 <gettext@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"Unable to verify ownership of stmt.\00"
define i8* @STMT_OWN_ERR() {
%1 = call i8* @gettext(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [36 x i8] c"Unable to verify ownership of stmt.\00"
define i8* @STMT_OWN_ERR() {
%1 = tail call i8* @gettext(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;
struct udphdr {
  int /*<<< orphan*/ uh_ulen;
};

/* Variables and functions */
uint16_t *udphdr_uh_ulen(struct udphdr *udp) { return &udp->uh_ulen; }


x86 assembly (clang, -O0):
<udphdr_uh_ulen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<udphdr_uh_ulen>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
%struct.udphdr = type { i32 }
define i32* @udphdr_uh_ulen(%struct.udphdr* %0) {
%2 = alloca %struct.udphdr*
store %struct.udphdr* %0, %struct.udphdr** %2
%3 = load %struct.udphdr*, %struct.udphdr** %2
%4 = getelementptr inbounds %struct.udphdr, %struct.udphdr* %3, i32 0, i32 0
ret i32* %4
}

LLVM IR (-O2):
%struct.udphdr = type { i32 }
define i32* @udphdr_uh_ulen(%struct.udphdr* readnone %0) {
%2 = getelementptr inbounds %struct.udphdr, %struct.udphdr* %0, i64 0, i32 0
ret i32* %2
}
__attribute__((always_)) void insl(int port, void *addr, unsigned long count) {
  __asm__ __volatile__("rep; ins"
                       "l"
                       : "+D"(addr), "+c"(count)
                       : "d"(port));
}


x86 assembly (clang, -O0):
<insl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rcx
mov    -0x4(%rbp),%edx
rep insl (%dx),%es:(%rdi)
mov    %rdi,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<insl>:
mov    %rdx,%rcx
mov    %edi,%edx
mov    %rsi,%rdi
rep insl (%dx),%es:(%rdi)
ret

LLVM IR (-O0):
define void @insl(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i64, i64* %6
%9 = load i32, i32* %4
%10 = call { i8*, i64 } asm sideeffect "rep; insl", "={di},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i32 %9, i8* %7, i64 %8)
%11 = extractvalue { i8*, i64 } %10, 0
%12 = extractvalue { i8*, i64 } %10, 1
store i8* %11, i8** %5
store i64 %12, i64* %6
ret void
}

LLVM IR (-O2):
define void @insl(i32 %0, i8* %1, i64 %2) {
%4 = tail call { i8*, i64 } asm sideeffect "rep; insl", "={di},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* %1, i64 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int a[20];
  int *b;
  int *c;
  int *d;
  b = &a[0];
  c = a;
  d = (int *)&a;
  printf("%d\n", b == c);
  printf("%d\n", c == d);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x60(%rbp),%rax
mov    %rax,-0x68(%rbp)
lea    -0x60(%rbp),%rax
mov    %rax,-0x70(%rbp)
lea    -0x60(%rbp),%rax
mov    %rax,-0x78(%rbp)
mov    -0x68(%rbp),%rax
cmp    -0x70(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%esi
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
mov    -0x70(%rbp),%rax
cmp    -0x78(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%esi
lea    0xe93(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [20 x i32]
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32*
store i32 0, i32* %1
%6 = getelementptr inbounds [20 x i32], [20 x i32]* %2, i64 0, i64 0
store i32* %6, i32** %3
%7 = getelementptr inbounds [20 x i32], [20 x i32]* %2, i64 0, i64 0
store i32* %7, i32** %4
%8 = bitcast [20 x i32]* %2 to i32*
store i32* %8, i32** %5
%9 = load i32*, i32** %3
%10 = load i32*, i32** %4
%11 = icmp eq i32* %9, %10
%12 = zext i1 %11 to i32
%13 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %12)
%14 = load i32*, i32** %4
%15 = load i32*, i32** %5
%16 = icmp eq i32* %14, %15
%17 = zext i1 %16 to i32
%18 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %17)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 1)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 1)
ret i32 0
}
float SHT2x_CalcTemperatureC(unsigned short u16sT) {
  float temperatureC = 0;
  u16sT &= ~0x0003;
  temperatureC = -46.85 + 175.72 / 65536 * (float)u16sT;
  return temperatureC;
}


x86 assembly (clang, -O0):
<SHT2x_CalcTemperatureC>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x2(%rbp),%al
and    $0xfc,%al
mov    %al,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
cvtsi2ss %eax,%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xed2(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xece(%rip),%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHT2x_CalcTemperatureC>:
and    $0xfffffffc,%edi
cvtsi2sd %edi,%xmm0
mulsd  0xef1(%rip),%xmm0
addsd  0xef1(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @SHT2x_CalcTemperatureC(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca float
store i16 %0, i16* %2
store float 0.000000e+00, float* %3
%4 = load i16, i16* %2
%5 = zext i16 %4 to i32
%6 = and i32 %5, -4
%7 = trunc i32 %6 to i16
store i16 %7, i16* %2
%8 = load i16, i16* %2
%9 = uitofp i16 %8 to float
%10 = fpext float %9 to double
%11 = call double @llvm.fmuladd.f64(double 0x3F65F70A3D70A3D7, double %10, double -4.685000e+01)
%12 = fptrunc double %11 to float
store float %12, float* %3
%13 = load float, float* %3
ret float %13
}

LLVM IR (-O2):
define float @SHT2x_CalcTemperatureC(i16 zeroext %0) {
%2 = and i16 %0, -4
%3 = uitofp i16 %2 to double
%4 = tail call double @llvm.fmuladd.f64(double %3, double 0x3F65F70A3D70A3D7, double -4.685000e+01)
%5 = fptrunc double %4 to float
ret float %5
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ createTree(char *, int);
int /*<<< orphan*/ initStack(int);
int /*<<< orphan*/ printTree(char *);
int /*<<< orphan*/ readExpression(char **, int *);
int main() {
  char *values;
  int size;
  readExpression(&values, &size);
  initStack(size);
  createTree(values, size);
  printTree("tree.txt");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x10(%rbp),%rdi
lea    -0x14(%rbp),%rsi
call   1060 <readExpression@plt>
mov    -0x14(%rbp),%edi
call   1040 <initStack@plt>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <createTree@plt>
lea    0xe89(%rip),%rdi
call   1050 <printTree@plt>
mov    0x2e5d(%rip),%rax
mov    (%rax),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
lea    0x10(%rsp),%rdi
lea    0xc(%rsp),%rsi
call   1060 <readExpression@plt>
mov    0xc(%rsp),%edi
call   1040 <initStack@plt>
mov    0x10(%rsp),%rdi
mov    0xc(%rsp),%esi
call   1030 <createTree@plt>
lea    0xe8f(%rip),%rdi
call   1050 <printTree@plt>
mov    0x2e63(%rip),%rax
mov    (%rax),%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [9 x i8] c"tree.txt\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @readExpression(i8** %2, i32* %3)
%5 = load i32, i32* %3
%6 = call i32 @initStack(i32 %5)
%7 = load i8*, i8** %2
%8 = load i32, i32* %3
%9 = call i32 @createTree(i8* %7, i32 %8)
%10 = call i32 @printTree(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%11 = load i32, i32* @EXIT_SUCCESS
ret i32 %11
}

LLVM IR (-O2):
@.str = [9 x i8] c"tree.txt\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i8*
%2 = alloca i32
%3 = bitcast i8** %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @readExpression(i8** %1, i32* %2)
%6 = load i32, i32* %2
%7 = call i32 @initStack(i32 %6)
%8 = load i8*, i8** %1
%9 = load i32, i32* %2
%10 = call i32 @createTree(i8* %8, i32 %9)
%11 = call i32 @printTree(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%12 = load i32, i32* @EXIT_SUCCESS
ret i32 %12
}
/* Variables and functions */
scalar_t__ calloc(int, int);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, ...);
int *reservaMemoria(int nEle) {
  int *aux;
  if ((aux = (int *)calloc(sizeof(int), nEle)) == NULL) {
    printf("\nError en la reserva de memoria\n");
    exit(-1);
  } else {
    printf("\nSe ha reservado memoria para %i elementos\n", nEle);
  }
  return aux;
}


x86 assembly (clang, -O0):
<reservaMemoria>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x4,%edi
call   1040 <calloc@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    116e <reservaMemoria+0x3e>
lea    0xea3(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>
mov    -0x4(%rbp),%esi
lea    0xea9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reservaMemoria>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
mov    $0x4,%edi
mov    %ebp,%esi
call   1050 <calloc@plt>
test   %rax,%rax
je     1173 <reservaMemoria+0x33>
mov    %rax,%rbx
lea    0xea0(%rip),%rdi
mov    %ebp,%esi
xor    %eax,%eax
call   1040 <printf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
lea    0xeb2(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"\0AError en la reserva de memoria\0A\00"
@.str.1 = [44 x i8] c"\0ASe ha reservado memoria para %i elementos\0A\00"
define i32* @reservaMemoria(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i64 @calloc(i32 4, i32 %4)
%6 = inttoptr i64 %5 to i32*
store i32* %6, i32** %3
%7 = icmp eq i32* %6, null
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
%10 = call i32 @exit(i32 -1)
unreachable
11: ; preds = %1
%12 = load i32, i32* %2
%13 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str.1, i64 0, i64 0), i32 %12)
br label %14
14: ; preds = %11
%15 = load i32*, i32** %3
ret i32* %15
}

LLVM IR (-O2):
@.str.1 = [44 x i8] c"\0ASe ha reservado memoria para %i elementos\0A\00"
@str = [32 x i8] c"\0AError en la reserva de memoria\00"
define i32* @reservaMemoria(i32 %0) {
%2 = tail call i64 @calloc(i32 4, i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @str, i64 0, i64 0))
%6 = tail call i32 @exit(i32 -1)
unreachable
7: ; preds = %1
%8 = inttoptr i64 %2 to i32*
%9 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @.str.1, i64 0, i64 0), i32 %0)
ret i32* %8
}
/* Variables and functions */
int /*<<< orphan*/ GPSExtendedStatusHandle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void GPSExtendedStatusUpdated() { UAVObjUpdated(GPSExtendedStatusHandle()); }


x86 assembly (clang, -O0):
<GPSExtendedStatusUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <GPSExtendedStatusHandle@plt>
mov    %eax,%edi
call   1030 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPSExtendedStatusUpdated>:
push   %rax
xor    %eax,%eax
call   1040 <GPSExtendedStatusHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @GPSExtendedStatusUpdated() {
%1 = call i32 (...) @GPSExtendedStatusHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @GPSExtendedStatusUpdated() {
%1 = tail call i32 (...) @GPSExtendedStatusHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
void fc72(int n) {
  {
    typedef int(*b)[n];
    {
      typedef int(*c)[n];
      0;
    }
    {
      typedef int(*d)[n];
      goto a;
    a:
      0;
    };
    typedef int(*e)[n];
    0;
  };
  {
    typedef int(*f)[n];
    {
      typedef int(*g)[n];
      0;
    };
    {
      typedef int(*h)[n];
      0;
    };
    ;
    typedef int(*i)[n];
    0;
  };
  ;
  typedef int(*j)[n];
  0;
}


x86 assembly (clang, -O0):
<fc72>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc72>:
ret

LLVM IR (-O0):
define void @fc72(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
%7 = load i32, i32* %2
%8 = zext i32 %7 to i64
br label %9
9: ; preds = %1
%10 = load i32, i32* %2
%11 = zext i32 %10 to i64
%12 = load i32, i32* %2
%13 = zext i32 %12 to i64
%14 = load i32, i32* %2
%15 = zext i32 %14 to i64
%16 = load i32, i32* %2
%17 = zext i32 %16 to i64
%18 = load i32, i32* %2
%19 = zext i32 %18 to i64
%20 = load i32, i32* %2
%21 = zext i32 %20 to i64
ret void
}

LLVM IR (-O2):
define void @fc72(i32 %0) {
ret void
}
/* Variables and functions */
int exp(double);
double genann_act_sigmoid(double a) {
  if (a < -45.0)
    return 0;
  if (a > 45.0)
    return 1;
  return 1.0 / (1 + exp(-a));
}


x86 assembly (clang, -O0):
<genann_act_sigmoid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  0xedb(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    113d <genann_act_sigmoid+0x2d>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    119f <genann_act_sigmoid+0x8f>
movsd  -0x10(%rbp),%xmm0
movsd  0xebe(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    1166 <genann_act_sigmoid+0x56>
movsd  0xeb4(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    119f <genann_act_sigmoid+0x8f>
movsd  -0x10(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
call   1030 <exp@plt>
add    $0x1,%eax
cvtsi2sd %eax,%xmm1
movsd  0xe7a(%rip),%xmm0
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genann_act_sigmoid>:
push   %rax
xorpd  %xmm1,%xmm1
movsd  0xee3(%rip),%xmm2
ucomisd %xmm0,%xmm2
ja     115a <genann_act_sigmoid+0x4a>
ucomisd 0xee5(%rip),%xmm0
jbe    1137 <genann_act_sigmoid+0x27>
movsd  0xed3(%rip),%xmm1
jmp    115a <genann_act_sigmoid+0x4a>
xorpd  0xee1(%rip),%xmm0
call   1030 <exp@plt>
add    $0x1,%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
movsd  0xeb2(%rip),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @genann_act_sigmoid(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp olt double %4, -4.500000e+01
br i1 %5, label %6, label %7
6: ; preds = %1
store double 0.000000e+00, double* %2
br label %18
7: ; preds = %1
%8 = load double, double* %3
%9 = fcmp ogt double %8, 4.500000e+01
br i1 %9, label %10, label %11
10: ; preds = %7
store double 1.000000e+00, double* %2
br label %18
11: ; preds = %7
%12 = load double, double* %3
%13 = fneg double %12
%14 = call i32 @exp(double %13)
%15 = add nsw i32 1, %14
%16 = sitofp i32 %15 to double
%17 = fdiv double 1.000000e+00, %16
store double %17, double* %2
br label %18
18: ; preds = %11, %10, %6
%19 = load double, double* %2
ret double %19
}

LLVM IR (-O2):
define double @genann_act_sigmoid(double %0) {
%2 = fcmp olt double %0, -4.500000e+01
br i1 %2, label %11, label %3
3: ; preds = %1
%4 = fcmp ogt double %0, 4.500000e+01
br i1 %4, label %11, label %5
5: ; preds = %3
%6 = fneg double %0
%7 = tail call i32 @exp(double %6)
%8 = add nsw i32 %7, 1
%9 = sitofp i32 %8 to double
%10 = fdiv double 1.000000e+00, %9
br label %11
11: ; preds = %3, %1, %5
%12 = phi double [ %10, %5 ], [ 0.000000e+00, %1 ], [ 1.000000e+00, %3 ]
ret double %12
}
void next_Abs2Conc(_loc, _Base_Abs2Conc, _loc_0, _Base_Abs2Conc_0) int *_loc,
    *_Base_Abs2Conc, _loc_0, _Base_Abs2Conc_0;
{ Abs2Conc_NEXT_FNC_OBJ(_loc, _Base_Abs2Conc, _loc_0, _Base_Abs2Conc_0); }


x86 assembly (clang, -O0):
<next_Abs2Conc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
mov    $0x0,%al
call   1030 <Abs2Conc_NEXT_FNC_OBJ@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_Abs2Conc>:
xor    %eax,%eax
jmp    1030 <Abs2Conc_NEXT_FNC_OBJ@plt>

LLVM IR (-O0):
define void @next_Abs2Conc(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32*, i32** %5
%10 = load i32*, i32** %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 (i32*, i32*, i32, i32, ...) bitcast (i32 (...)* @Abs2Conc_NEXT_FNC_OBJ to i32 (i32*, i32*, i32, i32, ...)*)(i32* %9, i32* %10, i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
define void @next_Abs2Conc(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = tail call i32 (i32*, i32*, i32, i32, ...) bitcast (i32 (...)* @Abs2Conc_NEXT_FNC_OBJ to i32 (i32*, i32*, i32, i32, ...)*)(i32* %0, i32* %1, i32 %2, i32 %3)
ret void
}
/* Variables and functions */
int crypto_sign_ed25519_seed_keypair(unsigned char *, unsigned char *,
                                     unsigned char const *);
int crypto_sign_seed_keypair(unsigned char *pk, unsigned char *sk,
                             const unsigned char *seed) {
  return crypto_sign_ed25519_seed_keypair(pk, sk, seed);
}


x86 assembly (clang, -O0):
<crypto_sign_seed_keypair>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <crypto_sign_ed25519_seed_keypair@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crypto_sign_seed_keypair>:
jmp    1030 <crypto_sign_ed25519_seed_keypair@plt>

LLVM IR (-O0):
define i32 @crypto_sign_seed_keypair(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = call i32 @crypto_sign_ed25519_seed_keypair(i8* %7, i8* %8, i8* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @crypto_sign_seed_keypair(i8* %0, i8* %1, i8* %2) {
%4 = tail call i32 @crypto_sign_ed25519_seed_keypair(i8* %0, i8* %1, i8* %2)
ret i32 %4
}
int comp(const void *a, const void *b) { return *((char *)a) - *((char *)b); }


x86 assembly (clang, -O0):
<comp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<comp>:
movsbl (%rdi),%eax
movsbl (%rsi),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @comp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @comp(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = sext i8 %3 to i32
%5 = load i8, i8* %1
%6 = sext i8 %5 to i32
%7 = sub nsw i32 %4, %6
ret i32 %7
}
/* Variables and functions */
int ptToInt(void *pt) {
  char *a = NULL, *b = pt;
  return b - a;
}


x86 assembly (clang, -O0):
<ptToInt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptToInt>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i32 @ptToInt(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
store i8* null, i8** %3
%5 = load i8*, i8** %2
store i8* %5, i8** %4
%6 = load i8*, i8** %4
%7 = load i8*, i8** %3
%8 = ptrtoint i8* %6 to i64
%9 = ptrtoint i8* %7 to i64
%10 = sub i64 %8, %9
%11 = trunc i64 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @ptToInt(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i32
ret i32 %3
}
_Complex char pass_complex_char(_Complex char arg) { return arg; }


x86 assembly (clang, -O0):
<pass_complex_char>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x10(%rbp)
mov    -0x10(%rbp),%cl
mov    -0xf(%rbp),%al
mov    %cl,-0x8(%rbp)
mov    %al,-0x7(%rbp)
mov    -0x8(%rbp),%ax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pass_complex_char>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i16 @pass_complex_char(i16 %0) {
%2 = alloca { i8, i8 }
%3 = alloca { i8, i8 }
%4 = bitcast { i8, i8 }* %3 to i16*
store i16 %0, i16* %4
%5 = getelementptr inbounds { i8, i8 }, { i8, i8 }* %3, i32 0, i32 0
%6 = load i8, i8* %5
%7 = getelementptr inbounds { i8, i8 }, { i8, i8 }* %3, i32 0, i32 1
%8 = load i8, i8* %7
%9 = getelementptr inbounds { i8, i8 }, { i8, i8 }* %2, i32 0, i32 0
%10 = getelementptr inbounds { i8, i8 }, { i8, i8 }* %2, i32 0, i32 1
store i8 %6, i8* %9
store i8 %8, i8* %10
%11 = bitcast { i8, i8 }* %2 to i16*
%12 = load i16, i16* %11
ret i16 %12
}

LLVM IR (-O2):
define i16 @pass_complex_char(i16 returned %0) {
ret i16 %0
}
int test_imm_B3uint8_mem(unsigned char *val) {
  return ((*val) & (0xB3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B3uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xb3,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B3uint8_mem>:
testb  $0xb3,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B3uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 179
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_B3uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -77
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef double uint64_t;

/* Variables and functions */
double getMhz();
double __tsc_getsecs(uint64_t ticks) {
  return (ticks / (1000000.0 * getMhz()));
}


x86 assembly (clang, -O0):
<__tsc_getsecs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
mov    $0x0,%al
call   1030 <getMhz@plt>
movaps %xmm0,%xmm2
movsd  -0x10(%rbp),%xmm0
movsd  0xec2(%rip),%xmm1
mulsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__tsc_getsecs>:
push   %rax
movsd  %xmm0,(%rsp)
xor    %eax,%eax
call   1030 <getMhz@plt>
mulsd  0xedb(%rip),%xmm0
movsd  (%rsp),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @__tsc_getsecs(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double (...) @getMhz()
%5 = fmul double 1.000000e+06, %4
%6 = fdiv double %3, %5
ret double %6
}

LLVM IR (-O2):
define double @__tsc_getsecs(double %0) {
%2 = tail call double (...) @getMhz()
%3 = fmul double %2, 1.000000e+06
%4 = fdiv double %0, %3
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ web_server();
int main(void) {
  web_server();
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <web_server@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <web_server@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @web_server()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @web_server()
ret i32 0
}
unsigned int simple_object_fetch_big_32(const unsigned char *buf) {
  return (((unsigned int)buf[0] << 24) | ((unsigned int)buf[1] << 16) |
          ((unsigned int)buf[2] << 8) | (unsigned int)buf[3]);
}


x86 assembly (clang, -O0):
<simple_object_fetch_big_32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<simple_object_fetch_big_32>:
mov    (%rdi),%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @simple_object_fetch_big_32(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl i32 %6, 24
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 16
%13 = or i32 %7, %12
%14 = load i8*, i8** %2
%15 = getelementptr inbounds i8, i8* %14, i64 2
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = or i32 %13, %18
%20 = load i8*, i8** %2
%21 = getelementptr inbounds i8, i8* %20, i64 3
%22 = load i8, i8* %21
%23 = zext i8 %22 to i32
%24 = or i32 %19, %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @simple_object_fetch_big_32(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = shl nuw i32 %3, 24
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = shl nuw nsw i32 %7, 16
%9 = or i32 %8, %4
%10 = getelementptr inbounds i8, i8* %0, i64 2
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = shl nuw nsw i32 %12, 8
%14 = or i32 %9, %13
%15 = getelementptr inbounds i8, i8* %0, i64 3
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = or i32 %14, %17
ret i32 %18
}
/* Variables and functions */
int EINVAL;
int ENOSYS;
int PTHREAD_CANCEL_ASYNCHRONOUS;
int PTHREAD_CANCEL_DEFERRED;
int pthread_setcanceltype(int type, int *oldtype) {
  if ((type != PTHREAD_CANCEL_DEFERRED) ||
      (type != PTHREAD_CANCEL_ASYNCHRONOUS))
    return (EINVAL);
  return (ENOSYS);
}


x86 assembly (clang, -O0):
<pthread_setcanceltype>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    0x2eb3(%rip),%rcx
cmp    (%rcx),%eax
jne    112f <pthread_setcanceltype+0x2f>
mov    -0x8(%rbp),%eax
mov    0x2ec1(%rip),%rcx
cmp    (%rcx),%eax
je     1140 <pthread_setcanceltype+0x40>
mov    0x2e9a(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    114c <pthread_setcanceltype+0x4c>
mov    0x2e99(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_setcanceltype>:
mov    0x2ec1(%rip),%rax
mov    (%rax),%eax
xor    %edi,%eax
mov    0x2ed6(%rip),%rcx
xor    (%rcx),%edi
or     %eax,%edi
jne    1122 <pthread_setcanceltype+0x22>
mov    0x2ec1(%rip),%rax
mov    (%rax),%eax
ret
mov    0x2ea7(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@PTHREAD_CANCEL_DEFERRED = global i32 0
@PTHREAD_CANCEL_ASYNCHRONOUS = global i32 0
@EINVAL = global i32 0
@ENOSYS = global i32 0
define i32 @pthread_setcanceltype(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
%6 = load i32, i32* %4
%7 = load i32, i32* @PTHREAD_CANCEL_DEFERRED
%8 = icmp ne i32 %6, %7
br i1 %8, label %13, label %9
9: ; preds = %2
%10 = load i32, i32* %4
%11 = load i32, i32* @PTHREAD_CANCEL_ASYNCHRONOUS
%12 = icmp ne i32 %10, %11
br i1 %12, label %13, label %15
13: ; preds = %9, %2
%14 = load i32, i32* @EINVAL
store i32 %14, i32* %3
br label %17
15: ; preds = %9
%16 = load i32, i32* @ENOSYS
store i32 %16, i32* %3
br label %17
17: ; preds = %15, %13
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
@PTHREAD_CANCEL_DEFERRED = global i32 0
@PTHREAD_CANCEL_ASYNCHRONOUS = global i32 0
@EINVAL = global i32 0
@ENOSYS = global i32 0
define i32 @pthread_setcanceltype(i32 %0, i32* nocapture readnone %1) {
%3 = load i32, i32* @PTHREAD_CANCEL_DEFERRED
%4 = icmp eq i32 %3, %0
%5 = load i32, i32* @PTHREAD_CANCEL_ASYNCHRONOUS
%6 = icmp eq i32 %5, %0
%7 = select i1 %4, i1 %6, i1 false
%8 = load i32, i32* @ENOSYS
%9 = load i32, i32* @EINVAL
%10 = select i1 %7, i32 %8, i32 %9
ret i32 %10
}
/* Type definitions */
typedef int uint32_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char *, int, int);
void log_write(FILE *fp, char *name, uint32_t addr, uint32_t data) {
  fprintf(fp, "WRITE:\tREG:%-40s  \t ADDR:0x%-10x  \t DATA:0x%-10x\n", name,
          addr, data);
}


x86 assembly (clang, -O0):
<log_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
lea    0xec4(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_write>:
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %rsi,%rdx
lea    0xee1(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [50 x i8] c"WRITE:\09REG:%-40s \09 ADDR:0x%-10x \09 DATA:0x%-10x\0A\00"
define void @log_write(i32* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32*, i32** %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @fprintf(i32* %9, i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0), i8* %10, i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
@.str = [50 x i8] c"WRITE:\09REG:%-40s \09 ADDR:0x%-10x \09 DATA:0x%-10x\0A\00"
define void @log_write(i32* nocapture %0, i8* %1, i32 %2, i32 %3) {
%5 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0), i8* %1, i32 %2, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mp_msg(int, int /*<<< orphan*/, char *);
void draw_osd(void) {
  mp_msg(3, 0, "vo_cvidix: error: didn't use vidix draw_osd!\n");
  return;
}


x86 assembly (clang, -O0):
<draw_osd>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
xor    %esi,%esi
lea    0xede(%rip),%rdx
call   1030 <mp_msg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<draw_osd>:
lea    0xee9(%rip),%rdx
mov    $0x3,%edi
xor    %esi,%esi
jmp    1030 <mp_msg@plt>

LLVM IR (-O0):
@.str = [46 x i8] c"vo_cvidix: error: didn't use vidix draw_osd!\0A\00"
define void @draw_osd() {
%1 = call i32 @mp_msg(i32 3, i32 0, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [46 x i8] c"vo_cvidix: error: didn't use vidix draw_osd!\0A\00"
define void @draw_osd() {
%1 = tail call i32 @mp_msg(i32 3, i32 0, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ freeWakeLock(int);
int /*<<< orphan*/ getWakeLock(int);
void foo1(int i) {
  if (i < 5)
    getWakeLock(1);
  else
    freeWakeLock(2);
}


x86 assembly (clang, -O0):
<foo1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x5,-0x4(%rbp)
jge    1144 <foo1+0x24>
mov    $0x1,%edi
call   1030 <getWakeLock@plt>
jmp    114e <foo1+0x2e>
mov    $0x2,%edi
call   1040 <freeWakeLock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo1>:
cmp    $0x4,%edi
jg     112f <foo1+0xf>
mov    $0x1,%edi
jmp    1030 <getWakeLock@plt>
mov    $0x2,%edi
jmp    1040 <freeWakeLock@plt>

LLVM IR (-O0):
define void @foo1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 5
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @getWakeLock(i32 1)
br label %9
7: ; preds = %1
%8 = call i32 @freeWakeLock(i32 2)
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @foo1(i32 %0) {
%2 = icmp slt i32 %0, 5
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @getWakeLock(i32 1)
br label %7
5: ; preds = %1
%6 = tail call i32 @freeWakeLock(i32 2)
br label %7
7: ; preds = %5, %3
ret void
}