#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, char const *, char const *,
                            char const *);
void ironlake_debug_transconf(char *result, int len, int reg, uint32_t val,
                              uint32_t devid) {
  const char *enable = val & (1 << 31) ? "enable" : "disable";
  const char *state = val & (1 << 30) ? "active" : "inactive";
  const char *interlace;
  switch ((val >> 21) & 7) {
  case 0:
    interlace = "progressive";
    break;
  case 2:
    if ((((devid) == 0x0042) || ((devid) == 0x0046)))
      interlace = "interlaced sdvo";
    else
      interlace = "rsvd";
    break;
  case 3:
    interlace = "interlaced";
    break;
  default:
    interlace = "rsvd";
  }
  snprintf(result, len, "%s, %s, %s", enable, state, interlace);
}


x86 assembly (clang, -O0):
<ironlake_debug_transconf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x14(%rbp),%edx
lea    0xecd(%rip),%rcx
lea    0xecd(%rip),%rax
test   $0x80000000,%edx
cmovne %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x14(%rbp),%edx
lea    0xebf(%rip),%rcx
lea    0xeb6(%rip),%rax
test   $0x40000000,%edx
cmovne %rcx,%rax
mov    %rax,-0x28(%rbp)
mov    -0x14(%rbp),%eax
shr    $0x15,%eax
and    $0x7,%eax
mov    %eax,-0x34(%rbp)
je     11a0 <ironlake_debug_transconf+0x90>
jmp    117e <ironlake_debug_transconf+0x6e>
mov    -0x34(%rbp),%eax
sub    $0x2,%eax
je     11b0 <ironlake_debug_transconf+0xa0>
jmp    118f <ironlake_debug_transconf+0x7f>
mov    -0x34(%rbp),%eax
sub    $0x3,%eax
je     11e4 <ironlake_debug_transconf+0xd4>
jmp    11f4 <ironlake_debug_transconf+0xe4>
lea    0xe71(%rip),%rax
mov    %rax,-0x30(%rbp)
jmp    11ff <ironlake_debug_transconf+0xef>
cmpl   $0x42,-0x18(%rbp)
je     11c4 <ironlake_debug_transconf+0xb4>
cmpl   $0x46,-0x18(%rbp)
jne    11d4 <ironlake_debug_transconf+0xc4>
lea    0xe59(%rip),%rax
mov    %rax,-0x30(%rbp)
jmp    11df <ironlake_debug_transconf+0xcf>
lea    0xe59(%rip),%rax
mov    %rax,-0x30(%rbp)
jmp    11ff <ironlake_debug_transconf+0xef>
lea    0xe4e(%rip),%rax
mov    %rax,-0x30(%rbp)
jmp    11ff <ironlake_debug_transconf+0xef>
lea    0xe39(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    -0x30(%rbp),%r9
lea    0xe2b(%rip),%rdx
call   1030 <snprintf@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ironlake_debug_transconf>:
mov    %ecx,%eax
shr    $0x15,%eax
and    $0x7,%eax
je     1140 <ironlake_debug_transconf+0x30>
cmp    $0x3,%eax
je     1149 <ironlake_debug_transconf+0x39>
cmp    $0x2,%eax
jne    1152 <ironlake_debug_transconf+0x42>
and    $0xfffffffb,%r8d
cmp    $0x42,%r8d
lea    0xef1(%rip),%rax
lea    0xefa(%rip),%r9
cmove  %rax,%r9
jmp    1159 <ironlake_debug_transconf+0x49>
lea    0xed1(%rip),%r9
jmp    1159 <ironlake_debug_transconf+0x49>
lea    0xee9(%rip),%r9
jmp    1159 <ironlake_debug_transconf+0x49>
lea    0xedb(%rip),%r9
test   $0x40000000,%ecx
lea    0xea9(%rip),%rax
lea    0xea4(%rip),%r8
cmove  %rax,%r8
test   %ecx,%ecx
lea    0xe8d(%rip),%rax
lea    0xe7f(%rip),%rcx
cmovns %rax,%rcx
lea    0xeb8(%rip),%rdx
jmp    1030 <snprintf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"enable\00"
@.str.1 = [8 x i8] c"disable\00"
@.str.2 = [7 x i8] c"active\00"
@.str.3 = [9 x i8] c"inactive\00"
@.str.4 = [12 x i8] c"progressive\00"
@.str.5 = [16 x i8] c"interlaced sdvo\00"
@.str.6 = [5 x i8] c"rsvd\00"
@.str.7 = [11 x i8] c"interlaced\00"
@.str.8 = [11 x i8] c"%s, %s, %s\00"
define void @ironlake_debug_transconf(i8* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i8*
%12 = alloca i8*
%13 = alloca i8*
store i8* %0, i8** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%14 = load i32, i32* %9
%15 = and i32 %14, -2147483648
%16 = icmp ne i32 %15, 0
%17 = zext i1 %16 to i64
%18 = select i1 %16, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0)
store i8* %18, i8** %11
%19 = load i32, i32* %9
%20 = and i32 %19, 1073741824
%21 = icmp ne i32 %20, 0
%22 = zext i1 %21 to i64
%23 = select i1 %21, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.3, i64 0, i64 0)
store i8* %23, i8** %12
%24 = load i32, i32* %9
%25 = ashr i32 %24, 21
%26 = and i32 %25, 7
switch i32 %26, label %38 [
i32 0, label %27
i32 2, label %28
i32 3, label %37
]
27: ; preds = %5
store i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.4, i64 0, i64 0), i8** %13
br label %39
28: ; preds = %5
%29 = load i32, i32* %10
%30 = icmp eq i32 %29, 66
br i1 %30, label %34, label %31
31: ; preds = %28
%32 = load i32, i32* %10
%33 = icmp eq i32 %32, 70
br i1 %33, label %34, label %35
34: ; preds = %31, %28
store i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.5, i64 0, i64 0), i8** %13
br label %36
35: ; preds = %31
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.6, i64 0, i64 0), i8** %13
br label %36
36: ; preds = %35, %34
br label %39
37: ; preds = %5
store i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.7, i64 0, i64 0), i8** %13
br label %39
38: ; preds = %5
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.6, i64 0, i64 0), i8** %13
br label %39
39: ; preds = %38, %37, %36, %27
%40 = load i8*, i8** %6
%41 = load i32, i32* %7
%42 = load i8*, i8** %11
%43 = load i8*, i8** %12
%44 = load i8*, i8** %13
%45 = call i32 @snprintf(i8* %40, i32 %41, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.8, i64 0, i64 0), i8* %42, i8* %43, i8* %44)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"enable\00"
@.str.1 = [8 x i8] c"disable\00"
@.str.2 = [7 x i8] c"active\00"
@.str.3 = [9 x i8] c"inactive\00"
@.str.4 = [12 x i8] c"progressive\00"
@.str.5 = [16 x i8] c"interlaced sdvo\00"
@.str.6 = [5 x i8] c"rsvd\00"
@.str.7 = [11 x i8] c"interlaced\00"
@.str.8 = [11 x i8] c"%s, %s, %s\00"
define void @ironlake_debug_transconf(i8* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = lshr i32 %3, 21
%7 = and i32 %6, 7
switch i32 %7, label %13 [
i32 0, label %14
i32 2, label %8
i32 3, label %12
]
8: ; preds = %5
%9 = and i32 %4, -5
%10 = icmp eq i32 %9, 66
%11 = select i1 %10, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.5, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.6, i64 0, i64 0)
br label %14
12: ; preds = %5
br label %14
13: ; preds = %5
br label %14
14: ; preds = %8, %5, %13, %12
%15 = phi i8* [ getelementptr inbounds ([5 x i8], [5 x i8]* @.str.6, i64 0, i64 0), %13 ], [ getelementptr inbounds ([11 x i8], [11 x i8]* @.str.7, i64 0, i64 0), %12 ], [ getelementptr inbounds ([12 x i8], [12 x i8]* @.str.4, i64 0, i64 0), %5 ], [ %11, %8 ]
%16 = and i32 %3, 1073741824
%17 = icmp eq i32 %16, 0
%18 = select i1 %17, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.3, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.2, i64 0, i64 0)
%19 = icmp sgt i32 %3, -1
%20 = select i1 %19, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
%21 = tail call i32 @snprintf(i8* %0, i32 %1, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.8, i64 0, i64 0), i8* %20, i8* %18, i8* %15)
ret void
}