xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ cputime_setup();
int /*<<< orphan*/ fudiformat_setup();
int /*<<< orphan*/ fudiparse_setup();
int /*<<< orphan*/ loadbang_setup();
int /*<<< orphan*/ namecanvas_setup();
int /*<<< orphan*/ oscformat_setup();
int /*<<< orphan*/ oscparse_setup();
int /*<<< orphan*/ random_setup();
int /*<<< orphan*/ realtime_setup();
void x_misc_setup(void) {
  random_setup();
  loadbang_setup();
  namecanvas_setup();
  cputime_setup();
  realtime_setup();
  oscparse_setup();
  oscformat_setup();
  fudiparse_setup();
  fudiformat_setup();
}


x86 assembly (clang, -O0):
<x_misc_setup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1080 <random_setup@plt>
mov    $0x0,%al
call   1030 <loadbang_setup@plt>
mov    $0x0,%al
call   10b0 <namecanvas_setup@plt>
mov    $0x0,%al
call   1070 <cputime_setup@plt>
mov    $0x0,%al
call   1050 <realtime_setup@plt>
mov    $0x0,%al
call   1090 <oscparse_setup@plt>
mov    $0x0,%al
call   1060 <oscformat_setup@plt>
mov    $0x0,%al
call   10a0 <fudiparse_setup@plt>
mov    $0x0,%al
call   1040 <fudiformat_setup@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<x_misc_setup>:
push   %rax
xor    %eax,%eax
call   1080 <random_setup@plt>
xor    %eax,%eax
call   1030 <loadbang_setup@plt>
xor    %eax,%eax
call   10b0 <namecanvas_setup@plt>
xor    %eax,%eax
call   1070 <cputime_setup@plt>
xor    %eax,%eax
call   1050 <realtime_setup@plt>
xor    %eax,%eax
call   1090 <oscparse_setup@plt>
xor    %eax,%eax
call   1060 <oscformat_setup@plt>
xor    %eax,%eax
call   10a0 <fudiparse_setup@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <fudiformat_setup@plt>

LLVM IR (-O0):
define void @x_misc_setup() {
%1 = call i32 (...) @random_setup()
%2 = call i32 (...) @loadbang_setup()
%3 = call i32 (...) @namecanvas_setup()
%4 = call i32 (...) @cputime_setup()
%5 = call i32 (...) @realtime_setup()
%6 = call i32 (...) @oscparse_setup()
%7 = call i32 (...) @oscformat_setup()
%8 = call i32 (...) @fudiparse_setup()
%9 = call i32 (...) @fudiformat_setup()
ret void
}

LLVM IR (-O2):
define void @x_misc_setup() {
%1 = tail call i32 (...) @random_setup()
%2 = tail call i32 (...) @loadbang_setup()
%3 = tail call i32 (...) @namecanvas_setup()
%4 = tail call i32 (...) @cputime_setup()
%5 = tail call i32 (...) @realtime_setup()
%6 = tail call i32 (...) @oscparse_setup()
%7 = tail call i32 (...) @oscformat_setup()
%8 = tail call i32 (...) @fudiparse_setup()
%9 = tail call i32 (...) @fudiformat_setup()
ret void
}
/* Type definitions */
struct nlmsghdr {
  int nlmsg_len;
};
typedef int __u32;

/* Variables and functions */
int nlmsg_ok(const struct nlmsghdr *nlh, int remaining) {
  return (remaining >= (int)sizeof(struct nlmsghdr) &&
          nlh->nlmsg_len >= sizeof(struct nlmsghdr) &&
          nlh->nlmsg_len <= (__u32)remaining);
}


x86 assembly (clang, -O0):
<nlmsg_ok>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x4,-0xc(%rbp)
mov    %al,-0xd(%rbp)
jl     113f <nlmsg_ok+0x3f>
mov    -0x8(%rbp),%rax
movslq (%rax),%rcx
xor    %eax,%eax
cmp    $0x4,%rcx
mov    %al,-0xd(%rbp)
jb     113f <nlmsg_ok+0x3f>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
cmp    -0xc(%rbp),%eax
setle  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nlmsg_ok>:
xor    %eax,%eax
cmp    $0x4,%esi
jl     1115 <nlmsg_ok+0x15>
mov    (%rdi),%ecx
cmp    $0x4,%ecx
jb     1115 <nlmsg_ok+0x15>
xor    %eax,%eax
cmp    %esi,%ecx
setle  %al
ret

LLVM IR (-O0):
%struct.nlmsghdr = type { i32 }
define i32 @nlmsg_ok(%struct.nlmsghdr* %0, i32 %1) {
%3 = alloca %struct.nlmsghdr*
%4 = alloca i32
store %struct.nlmsghdr* %0, %struct.nlmsghdr** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp sge i32 %5, 4
br i1 %6, label %7, label %19
7: ; preds = %2
%8 = load %struct.nlmsghdr*, %struct.nlmsghdr** %3
%9 = getelementptr inbounds %struct.nlmsghdr, %struct.nlmsghdr* %8, i32 0, i32 0
%10 = load i32, i32* %9
%11 = sext i32 %10 to i64
%12 = icmp uge i64 %11, 4
br i1 %12, label %13, label %19
13: ; preds = %7
%14 = load %struct.nlmsghdr*, %struct.nlmsghdr** %3
%15 = getelementptr inbounds %struct.nlmsghdr, %struct.nlmsghdr* %14, i32 0, i32 0
%16 = load i32, i32* %15
%17 = load i32, i32* %4
%18 = icmp sle i32 %16, %17
br label %19
19: ; preds = %13, %7, %2
%20 = phi i1 [ false, %7 ], [ false, %2 ], [ %18, %13 ]
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
%struct.nlmsghdr = type { i32 }
define i32 @nlmsg_ok(%struct.nlmsghdr* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 3
br i1 %3, label %4, label %11
4: ; preds = %2
%5 = getelementptr inbounds %struct.nlmsghdr, %struct.nlmsghdr* %0, i64 0, i32 0
%6 = load i32, i32* %5
%7 = icmp ugt i32 %6, 3
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = icmp sle i32 %6, %1
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %8, %4, %2
%12 = phi i32 [ 0, %4 ], [ 0, %2 ], [ %10, %8 ]
ret i32 %12
}
char *mystrtrim(char *s) {
  char *c = s;
  while (*c != '\0') {
    if (*c != ' ') {
      *s++ = *c;
    }
    c++;
  }
  *s = '\0';
}


x86 assembly (clang, -O0):
<mystrtrim>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1158 <mystrtrim+0x58>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
je     1147 <mystrtrim+0x47>
mov    -0x18(%rbp),%rax
mov    (%rax),%cl
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1110 <mystrtrim+0x10>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mystrtrim>:
mov    %rdi,%rax
jmp    1114 <mystrtrim+0x14>
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%rax
movzbl (%rax),%ecx
cmp    $0x20,%cl
je     1110 <mystrtrim+0x10>
test   %cl,%cl
je     1128 <mystrtrim+0x28>
mov    %cl,(%rdi)
add    $0x1,%rdi
jmp    1110 <mystrtrim+0x10>
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define i8* @mystrtrim(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
store i8* %5, i8** %4
br label %6
6: ; preds = %21, %1
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %24
11: ; preds = %6
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = icmp ne i32 %14, 32
br i1 %15, label %16, label %21
16: ; preds = %11
%17 = load i8*, i8** %4
%18 = load i8, i8* %17
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %3
store i8 %18, i8* %19
br label %21
21: ; preds = %16, %11
%22 = load i8*, i8** %4
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %4
br label %6
24: ; preds = %6
%25 = load i8*, i8** %3
store i8 0, i8* %25
%26 = load i8*, i8** %2
ret i8* %26
}

LLVM IR (-O2):
define noalias i8* @mystrtrim(i8* nocapture %0) {
br label %2
2: ; preds = %8, %1
%3 = phi i8* [ %0, %1 ], [ %9, %8 ]
%4 = phi i8* [ %0, %1 ], [ %10, %8 ]
%5 = load i8, i8* %4
switch i8 %5, label %6 [
i8 0, label %11
i8 32, label %8
]
6: ; preds = %2
%7 = getelementptr inbounds i8, i8* %3, i64 1
store i8 %5, i8* %3
br label %8
8: ; preds = %2, %6
%9 = phi i8* [ %7, %6 ], [ %3, %2 ]
%10 = getelementptr inbounds i8, i8* %4, i64 1
br label %2
11: ; preds = %2
store i8 0, i8* %3
ret i8* undef
}
long int clear_bits(long int value, long int flag) { return 0; }


x86 assembly (clang, -O0):
<clear_bits>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_bits>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @clear_bits(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
ret i64 0
}

LLVM IR (-O2):
define i64 @clear_bits(i64 %0, i64 %1) {
ret i64 0
}
int to_unicode(unsigned short int *charset, int c) { return charset[c]; }


x86 assembly (clang, -O0):
<to_unicode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movzwl (%rax,%rcx,2),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<to_unicode>:
movslq %esi,%rax
movzwl (%rdi,%rax,2),%eax
ret

LLVM IR (-O0):
define i32 @to_unicode(i16* %0, i32 %1) {
%3 = alloca i16*
%4 = alloca i32
store i16* %0, i16** %3
store i32 %1, i32* %4
%5 = load i16*, i16** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i16, i16* %5, i64 %7
%9 = load i16, i16* %8
%10 = zext i16 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @to_unicode(i16* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i16, i16* %0, i64 %3
%5 = load i16, i16* %4
%6 = zext i16 %5 to i32
ret i32 %6
}
/* Variables and functions */
char *read_value(char *);
char *vcpfr_read_string(char *propertyName) { return read_value(propertyName); }


x86 assembly (clang, -O0):
<vcpfr_read_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <read_value@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vcpfr_read_string>:
jmp    1030 <read_value@plt>

LLVM IR (-O0):
define i8* @vcpfr_read_string(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @read_value(i8* %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @vcpfr_read_string(i8* %0) {
%2 = tail call i8* @read_value(i8* %0)
ret i8* %2
}
/* Variables and functions */
int add(int, int);
int fun(int);
int fun1();
int /*<<< orphan*/ printf(char *, int, ...);
void main() {
  printf("2+3=%d\n", add(2, 3));
  printf("%d %d\n", fun(2), fun1());
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x2,%edi
mov    $0x3,%esi
call   1030 <add@plt>
mov    %eax,%esi
lea    0xea0(%rip),%rdi
mov    $0x0,%al
call   1050 <printf@plt>
mov    $0x2,%edi
call   1040 <fun@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1060 <fun1@plt>
mov    -0x4(%rbp),%esi
mov    %eax,%edx
lea    0xe81(%rip),%rdi
mov    $0x0,%al
call   1050 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x2,%edi
mov    $0x3,%esi
call   1030 <add@plt>
lea    0xea9(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1050 <printf@plt>
mov    $0x2,%edi
call   1040 <fun@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1060 <fun1@plt>
lea    0xe8e(%rip),%rdi
mov    %ebx,%esi
mov    %eax,%edx
xor    %eax,%eax
pop    %rbx
jmp    1050 <printf@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"2+3=%d\0A\00"
@.str.1 = [7 x i8] c"%d %d\0A\00"
define void @main() {
%1 = call i32 @add(i32 2, i32 3)
%2 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = call i32 @fun(i32 2)
%4 = call i32 (...) @fun1()
%5 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i32 %3, i32 %4)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"2+3=%d\0A\00"
@.str.1 = [7 x i8] c"%d %d\0A\00"
define void @main() {
%1 = tail call i32 @add(i32 2, i32 3)
%2 = tail call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @fun(i32 2)
%4 = tail call i32 (...) @fun1()
%5 = tail call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i32 %3, i32 %4)
ret void
}
int check_year(int year) { return (1900 < year) && (year < 2100); }


x86 assembly (clang, -O0):
<check_year>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
mov    $0x76c,%ecx
cmp    -0x4(%rbp),%ecx
mov    %al,-0x5(%rbp)
jge    1127 <check_year+0x27>
cmpl   $0x834,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_year>:
add    $0xfffff893,%edi
xor    %eax,%eax
cmp    $0xc7,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @check_year(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 1900, %3
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 2100
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @check_year(i32 %0) {
%2 = add i32 %0, -1901
%3 = icmp ult i32 %2, 199
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int quot;
  int /*<<< orphan*/ rem;
};
typedef TYPE_1__ div_t;

/* Variables and functions */
TYPE_1__ div(int, int);
int base64_decoded_size(int enc_len) {
  div_t d = div(enc_len, 4);
  return 3 * d.quot + !!d.rem + 1;
}


x86 assembly (clang, -O0):
<base64_decoded_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x4,%esi
call   1030 <div@plt>
mov    %rax,-0x10(%rbp)
imul   $0x3,-0x10(%rbp),%eax
cmpl   $0x0,-0xc(%rbp)
setne  %cl
xor    $0xff,%cl
xor    $0xff,%cl
and    $0x1,%cl
movzbl %cl,%ecx
add    %ecx,%eax
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<base64_decoded_size>:
push   %rax
mov    $0x4,%esi
call   1030 <div@plt>
lea    (%rax,%rax,2),%ecx
shr    $0x20,%rax
cmp    $0x1,%rax
sbb    $0xffffffff,%ecx
add    $0x1,%ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.TYPE_3__ = type { i32, i32 }
define i32 @base64_decoded_size(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.TYPE_3__
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i64 @div(i32 %4, i32 4)
%6 = bitcast %struct.TYPE_3__* %3 to i64*
store i64 %5, i64* %6
%7 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %3, i32 0, i32 0
%8 = load i32, i32* %7
%9 = mul nsw i32 3, %8
%10 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %3, i32 0, i32 1
%11 = load i32, i32* %10
%12 = icmp ne i32 %11, 0
%13 = xor i1 %12, true
%14 = xor i1 %13, true
%15 = zext i1 %14 to i32
%16 = add nsw i32 %9, %15
%17 = add nsw i32 %16, 1
ret i32 %17
}

LLVM IR (-O2):
define i32 @base64_decoded_size(i32 %0) {
%2 = tail call i64 @div(i32 %0, i32 4)
%3 = trunc i64 %2 to i32
%4 = mul nsw i32 %3, 3
%5 = icmp ugt i64 %2, 4294967295
%6 = select i1 %5, i32 2, i32 1
%7 = add i32 %6, %4
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void sig_handler(int sig) {
  switch (sig) {
  case 2:
    printf("Received signal: SIGINT\n");
    break;
  case 3:
    printf("Received signal: SIGQUIT\n");
    break;
  default:;
  }
  return;
}


x86 assembly (clang, -O0):
<sig_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
sub    $0x2,%eax
je     1140 <sig_handler+0x30>
jmp    112f <sig_handler+0x1f>
mov    -0x8(%rbp),%eax
sub    $0x3,%eax
je     1151 <sig_handler+0x41>
jmp    1162 <sig_handler+0x52>
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
jmp    1167 <sig_handler+0x57>
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
jmp    1167 <sig_handler+0x57>
jmp    1167 <sig_handler+0x57>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_handler>:
cmp    $0x2,%edi
je     1126 <sig_handler+0x16>
cmp    $0x3,%edi
jne    1132 <sig_handler+0x22>
lea    0xedf(%rip),%rdi
jmp    1030 <puts@plt>
lea    0xeec(%rip),%rdi
jmp    1030 <puts@plt>
ret

LLVM IR (-O0):
@.str = [25 x i8] c"Received signal: SIGINT\0A\00"
@.str.1 = [26 x i8] c"Received signal: SIGQUIT\0A\00"
define void @sig_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
switch i32 %3, label %8 [
i32 2, label %4
i32 3, label %6
]
4: ; preds = %1
%5 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %9
6: ; preds = %1
%7 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
br label %9
8: ; preds = %1
br label %9
9: ; preds = %8, %6, %4
ret void
}

LLVM IR (-O2):
@str = [25 x i8] c"Received signal: SIGQUIT\00"
@str.2 = [24 x i8] c"Received signal: SIGINT\00"
define void @sig_handler(i32 %0) {
switch i32 %0, label %6 [
i32 2, label %3
i32 3, label %2
]
2: ; preds = %1
br label %3
3: ; preds = %1, %2
%4 = phi i8* [ getelementptr inbounds ([25 x i8], [25 x i8]* @str, i64 0, i64 0), %2 ], [ getelementptr inbounds ([24 x i8], [24 x i8]* @str.2, i64 0, i64 0), %1 ]
%5 = tail call i32 @puts(i8* dereferenceable(1) %4)
br label %6
6: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void co_c_error(const char *msg) { printf("%s\n", msg); }


x86 assembly (clang, -O0):
<co_c_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<co_c_error>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @co_c_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @co_c_error(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
bool ia_bit8(uint8_t byte, int i) { return (byte & (1 << i)) != 0; }


x86 assembly (clang, -O0):
<ia_bit8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ia_bit8>:
mov    %esi,%ecx
mov    %edi,%eax
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ia_bit8(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 1, %6
%8 = and i32 %5, %7
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @ia_bit8(i32 %0, i32 %1) {
%3 = lshr i32 %0, %1
%4 = and i32 %3, 1
ret i32 %4
}
unsigned false1() {
  int a = 10;
  return a * (5 - 2 - 3);
}


x86 assembly (clang, -O0):
<false1>:
push   %rbp
mov    %rsp,%rbp
movl   $0xa,-0x4(%rbp)
imul   $0x0,-0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<false1>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @false1() {
%1 = alloca i32
store i32 10, i32* %1
%2 = load i32, i32* %1
%3 = mul nsw i32 %2, 0
ret i32 %3
}

LLVM IR (-O2):
define i32 @false1() {
ret i32 0
}
void _exit(int status) { return; }


x86 assembly (clang, -O0):
<_exit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)

x86 assembly (clang, -O2):
LLVM IR (-O0):
define void @_exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
unreachable
}

LLVM IR (-O2):
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ GPIOBaseValid(unsigned long);
unsigned long GPIOGetIntNumber(unsigned long);
int /*<<< orphan*/ IntEnable(unsigned long);
int /*<<< orphan*/ IntRegister(unsigned long, void (*)());
void GPIOPortIntRegister(unsigned long ulPort, void (*pfnIntHandler)(void)) {
  DEBUG_ASSERT(GPIOBaseValid(ulPort));
  ulPort = GPIOGetIntNumber(ulPort);
  IntRegister(ulPort, pfnIntHandler);
  IntEnable(ulPort);
}


x86 assembly (clang, -O0):
<GPIOPortIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <GPIOBaseValid@plt>
mov    %eax,%edi
call   1070 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rdi
call   1050 <GPIOGetIntNumber@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1060 <IntRegister@plt>
mov    -0x8(%rbp),%rdi
call   1030 <IntEnable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPortIntRegister>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <GPIOBaseValid@plt>
mov    %eax,%edi
call   1070 <DEBUG_ASSERT@plt>
mov    %rbx,%rdi
call   1050 <GPIOGetIntNumber@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1060 <IntRegister@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @GPIOPortIntRegister(i64 %0, void ()* %1) {
%3 = alloca i64
%4 = alloca void ()*
store i64 %0, i64* %3
store void ()* %1, void ()** %4
%5 = load i64, i64* %3
%6 = call i32 @GPIOBaseValid(i64 %5)
%7 = call i32 @DEBUG_ASSERT(i32 %6)
%8 = load i64, i64* %3
%9 = call i64 @GPIOGetIntNumber(i64 %8)
store i64 %9, i64* %3
%10 = load i64, i64* %3
%11 = load void ()*, void ()** %4
%12 = bitcast void ()* %11 to void (...)*
%13 = call i32 @IntRegister(i64 %10, void (...)* %12)
%14 = load i64, i64* %3
%15 = call i32 @IntEnable(i64 %14)
ret void
}

LLVM IR (-O2):
define void @GPIOPortIntRegister(i64 %0, void ()* %1) {
%3 = tail call i32 @GPIOBaseValid(i64 %0)
%4 = tail call i32 @DEBUG_ASSERT(i32 %3)
%5 = tail call i64 @GPIOGetIntNumber(i64 %0)
%6 = bitcast void ()* %1 to void (...)*
%7 = tail call i32 @IntRegister(i64 %5, void (...)* %6)
%8 = tail call i32 @IntEnable(i64 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ put8(int);
void fistp_preg32_qword(int reg32) {
  put8(0xDF);
  put8(0x38 + reg32);
}


x86 assembly (clang, -O0):
<fistp_preg32_qword>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0xdf,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%edi
add    $0x38,%edi
call   1030 <put8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fistp_preg32_qword>:
push   %rbx
mov    %edi,%ebx
mov    $0xdf,%edi
call   1030 <put8@plt>
add    $0x38,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @fistp_preg32_qword(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @put8(i32 223)
%4 = load i32, i32* %2
%5 = add nsw i32 56, %4
%6 = call i32 @put8(i32 %5)
ret void
}

LLVM IR (-O2):
define void @fistp_preg32_qword(i32 %0) {
%2 = tail call i32 @put8(i32 223)
%3 = add nsw i32 %0, 56
%4 = tail call i32 @put8(i32 %3)
ret void
}
int do_022() { return 22; }


x86 assembly (clang, -O0):
<do_022>:
push   %rbp
mov    %rsp,%rbp
mov    $0x16,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_022>:
mov    $0x16,%eax
ret

LLVM IR (-O0):
define i32 @do_022() {
ret i32 22
}

LLVM IR (-O2):
define i32 @do_022() {
ret i32 22
}
/* Variables and functions */
int /*<<< orphan*/ srand(unsigned int);
unsigned int time(int /*<<< orphan*/);
void bf_init(unsigned seed) {
  if (seed) {
    srand(seed);
  } else {
    srand(time(0));
  }
}


x86 assembly (clang, -O0):
<bf_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1142 <bf_init+0x22>
mov    -0x4(%rbp),%edi
call   1030 <srand@plt>
jmp    1150 <bf_init+0x30>
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bf_init>:
test   %edi,%edi
je     1129 <bf_init+0x9>
jmp    1030 <srand@plt>
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
add    $0x8,%rsp
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @bf_init(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = call i32 @srand(i32 %6)
br label %11
8: ; preds = %1
%9 = call i32 @time(i32 0)
%10 = call i32 @srand(i32 %9)
br label %11
11: ; preds = %8, %5
ret void
}

LLVM IR (-O2):
define void @bf_init(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @time(i32 0)
br label %5
5: ; preds = %1, %3
%6 = phi i32 [ %4, %3 ], [ %0, %1 ]
%7 = tail call i32 @srand(i32 %6)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ usart_cs(int);
int /*<<< orphan*/ usart_out_byte(int);
void wrsr(uint8_t status) {
  usart_cs(0);
  usart_out_byte(0x01);
  usart_out_byte(status);
  usart_cs(1);
}


x86 assembly (clang, -O0):
<wrsr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
call   1040 <usart_cs@plt>
mov    $0x1,%edi
call   1030 <usart_out_byte@plt>
mov    -0x4(%rbp),%edi
call   1030 <usart_out_byte@plt>
mov    $0x1,%edi
call   1040 <usart_cs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrsr>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
call   1040 <usart_cs@plt>
mov    $0x1,%edi
call   1030 <usart_out_byte@plt>
mov    %ebx,%edi
call   1030 <usart_out_byte@plt>
mov    $0x1,%edi
pop    %rbx
jmp    1040 <usart_cs@plt>

LLVM IR (-O0):
define void @wrsr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @usart_cs(i32 0)
%4 = call i32 @usart_out_byte(i32 1)
%5 = load i32, i32* %2
%6 = call i32 @usart_out_byte(i32 %5)
%7 = call i32 @usart_cs(i32 1)
ret void
}

LLVM IR (-O2):
define void @wrsr(i32 %0) {
%2 = tail call i32 @usart_cs(i32 0)
%3 = tail call i32 @usart_out_byte(i32 1)
%4 = tail call i32 @usart_out_byte(i32 %0)
%5 = tail call i32 @usart_cs(i32 1)
ret void
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ memset(void *, int, size_t);
int /*<<< orphan*/ panic_syserror(char *, char *);
void *smalloc(size_t size) {
  void *ptr;
  ptr = malloc(size);
  if (!ptr)
    panic_syserror("can't allocate requested memory", "smalloc()");
  memset(ptr, 255, size);
  return ptr;
}


x86 assembly (clang, -O0):
<smalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1167 <smalloc+0x37>
lea    0xea5(%rip),%rdi
lea    0xebe(%rip),%rsi
call   1030 <panic_syserror@plt>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    $0xff,%esi
call   1040 <memset@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smalloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1157 <smalloc+0x27>
lea    0xeb5(%rip),%rdi
lea    0xece(%rip),%rsi
call   1030 <panic_syserror@plt>
mov    %rbx,%rdi
mov    $0xff,%esi
mov    %r14,%rdx
call   1040 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [32 x i8] c"can't allocate requested memory\00"
@.str.1 = [10 x i8] c"smalloc()\00"
define i8* @smalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = call i32 @panic_syserror(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
%12 = load i64, i64* %2
%13 = call i32 @memset(i8* %11, i32 255, i64 %12)
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
@.str = [32 x i8] c"can't allocate requested memory\00"
@.str.1 = [10 x i8] c"smalloc()\00"
define i8* @smalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @panic_syserror(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
%7 = tail call i32 @memset(i8* %2, i32 255, i64 %0)
ret i8* %2
}
/* Variables and functions */
scalar_t__ cos(float);
scalar_t__ sin(float);
void SinCos(float angle, float *sine, float *cosine) {
  *sine = (float)sin(angle);
  *cosine = (float)cos(angle);
}


x86 assembly (clang, -O0):
<SinCos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sin@plt>
cvtsi2ss %rax,%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x4(%rbp),%xmm0
call   1040 <cos@plt>
cvtsi2ss %rax,%xmm0
mov    -0x18(%rbp),%rax
movss  %xmm0,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SinCos>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
movss  %xmm0,0x4(%rsp)
call   1030 <sin@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
movss  %xmm0,(%rbx)
movss  0x4(%rsp),%xmm0
call   1040 <cos@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
movss  %xmm0,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @SinCos(float %0, float* %1, float* %2) {
%4 = alloca float
%5 = alloca float*
%6 = alloca float*
store float %0, float* %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float, float* %4
%8 = call i64 @sin(float %7)
%9 = sitofp i64 %8 to float
%10 = load float*, float** %5
store float %9, float* %10
%11 = load float, float* %4
%12 = call i64 @cos(float %11)
%13 = sitofp i64 %12 to float
%14 = load float*, float** %6
store float %13, float* %14
ret void
}

LLVM IR (-O2):
define void @SinCos(float %0, float* nocapture writeonly %1, float* nocapture writeonly %2) {
%4 = tail call i64 @sin(float %0)
%5 = sitofp i64 %4 to float
store float %5, float* %1
%6 = tail call i64 @cos(float %0)
%7 = sitofp i64 %6 to float
store float %7, float* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ badfmt(char *);
int /*<<< orphan*/ sprintf(char *, char *, char const *, int);
void badfmt2(const char *s, int col) {
  char temp[(120 * 10)];
  (void)sprintf(temp, "%s (column %d)", s, col);
  badfmt(temp);
}


x86 assembly (clang, -O0):
<badfmt2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x4c0,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    -0x4c0(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
lea    0xeb9(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x4c0(%rbp),%rdi
call   1030 <badfmt@plt>
add    $0x4c0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<badfmt2>:
push   %rbx
sub    $0x4b0,%rsp
mov    %esi,%ecx
mov    %rdi,%rdx
lea    0xecc(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <badfmt@plt>
add    $0x4b0,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"%s (column %d)\00"
define void @badfmt2(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca [1200 x i8]
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = getelementptr inbounds [1200 x i8], [1200 x i8]* %5, i64 0, i64 0
%7 = load i8*, i8** %3
%8 = load i32, i32* %4
%9 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %7, i32 %8)
%10 = getelementptr inbounds [1200 x i8], [1200 x i8]* %5, i64 0, i64 0
%11 = call i32 @badfmt(i8* %10)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"%s (column %d)\00"
define void @badfmt2(i8* %0, i32 %1) {
%3 = alloca [1200 x i8]
%4 = getelementptr inbounds [1200 x i8], [1200 x i8]* %3, i64 0, i64 0
%5 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
%6 = call i32 @badfmt(i8* %4)
ret void
}
void sk_insert(void) {}


x86 assembly (clang, -O0):
<sk_insert>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sk_insert>:
ret

LLVM IR (-O0):
define void @sk_insert() {
ret void
}

LLVM IR (-O2):
define void @sk_insert() {
ret void
}
/* Variables and functions */
bool zadd_is_oor(size_t a, size_t b) { return (a + b < a); }


x86 assembly (clang, -O0):
<zadd_is_oor>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
cmp    -0x8(%rbp),%rax
setb   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zadd_is_oor>:
xor    %eax,%eax
add    %rsi,%rdi
setb   %al
ret

LLVM IR (-O0):
define i32 @zadd_is_oor(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = add i64 %5, %6
%8 = load i64, i64* %3
%9 = icmp ult i64 %7, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @zadd_is_oor(i64 %0, i64 %1) {
%3 = xor i64 %0, -1
%4 = icmp ult i64 %3, %1
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int EINVAL;
int strlen(char *);
int sysfs_modify_policy_governor(unsigned int, char *);
int cpufreq_modify_policy_governor(unsigned int cpu, char *governor) {
  if ((!governor) || (strlen(governor) > 19))
    return -EINVAL;
  return sysfs_modify_policy_governor(cpu, governor);
}


x86 assembly (clang, -O0):
<cpufreq_modify_policy_governor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     114c <cpufreq_modify_policy_governor+0x2c>
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
cmp    $0x13,%eax
jle    115f <cpufreq_modify_policy_governor+0x3f>
xor    %eax,%eax
mov    0x2e8b(%rip),%rcx
sub    (%rcx),%eax
mov    %eax,-0x4(%rbp)
jmp    116e <cpufreq_modify_policy_governor+0x4e>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <sysfs_modify_policy_governor@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpufreq_modify_policy_governor>:
push   %rbp
push   %rbx
push   %rax
test   %rsi,%rsi
je     113a <cpufreq_modify_policy_governor+0x1a>
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1030 <strlen@plt>
cmp    $0x14,%eax
jl     114c <cpufreq_modify_policy_governor+0x2c>
mov    0x2e9f(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %ebp,%edi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <sysfs_modify_policy_governor@plt>

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @cpufreq_modify_policy_governor(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
%6 = load i8*, i8** %5
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i8*, i8** %5
%10 = call i32 @strlen(i8* %9)
%11 = icmp sgt i32 %10, 19
br i1 %11, label %12, label %15
12: ; preds = %8, %2
%13 = load i32, i32* @EINVAL
%14 = sub nsw i32 0, %13
store i32 %14, i32* %3
br label %19
15: ; preds = %8
%16 = load i32, i32* %4
%17 = load i8*, i8** %5
%18 = call i32 @sysfs_modify_policy_governor(i32 %16, i8* %17)
store i32 %18, i32* %3
br label %19
19: ; preds = %15, %12
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @cpufreq_modify_policy_governor(i32 %0, i8* %1) {
%3 = icmp eq i8* %1, null
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = tail call i32 @strlen(i8* %1)
%6 = icmp sgt i32 %5, 19
br i1 %6, label %7, label %10
7: ; preds = %4, %2
%8 = load i32, i32* @EINVAL
%9 = sub nsw i32 0, %8
br label %12
10: ; preds = %4
%11 = tail call i32 @sysfs_modify_policy_governor(i32 %0, i8* %1)
br label %12
12: ; preds = %10, %7
%13 = phi i32 [ %9, %7 ], [ %11, %10 ]
ret i32 %13
}
/* Type definitions */
struct s_reader {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cAES_Encrypt(struct s_reader *, unsigned char *, int,
                                unsigned char *);
int /*<<< orphan*/ cCamCryptVG_Reorder16A(unsigned char *, unsigned char *);
void cCamCryptVG_ReorderAndEncrypt(struct s_reader *reader, unsigned char *p) {
  unsigned char tmp[16];
  cCamCryptVG_Reorder16A(tmp, p);
  cAES_Encrypt(reader, tmp, 16, tmp);
  cCamCryptVG_Reorder16A(p, tmp);
}


x86 assembly (clang, -O0):
<cCamCryptVG_ReorderAndEncrypt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <cCamCryptVG_Reorder16A@plt>
mov    -0x8(%rbp),%rdi
lea    -0x20(%rbp),%rsi
lea    -0x20(%rbp),%rcx
mov    $0x10,%edx
call   1040 <cAES_Encrypt@plt>
mov    -0x10(%rbp),%rdi
lea    -0x20(%rbp),%rsi
call   1030 <cCamCryptVG_Reorder16A@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cCamCryptVG_ReorderAndEncrypt>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsp,%r15
mov    %r15,%rdi
call   1030 <cCamCryptVG_Reorder16A@plt>
mov    %r14,%rdi
mov    %r15,%rsi
mov    $0x10,%edx
mov    %r15,%rcx
call   1040 <cAES_Encrypt@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
call   1030 <cCamCryptVG_Reorder16A@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.s_reader = type { i32 }
define void @cCamCryptVG_ReorderAndEncrypt(%struct.s_reader* %0, i8* %1) {
%3 = alloca %struct.s_reader*
%4 = alloca i8*
%5 = alloca [16 x i8]
store %struct.s_reader* %0, %struct.s_reader** %3
store i8* %1, i8** %4
%6 = getelementptr inbounds [16 x i8], [16 x i8]* %5, i64 0, i64 0
%7 = load i8*, i8** %4
%8 = call i32 @cCamCryptVG_Reorder16A(i8* %6, i8* %7)
%9 = load %struct.s_reader*, %struct.s_reader** %3
%10 = getelementptr inbounds [16 x i8], [16 x i8]* %5, i64 0, i64 0
%11 = getelementptr inbounds [16 x i8], [16 x i8]* %5, i64 0, i64 0
%12 = call i32 @cAES_Encrypt(%struct.s_reader* %9, i8* %10, i32 16, i8* %11)
%13 = load i8*, i8** %4
%14 = getelementptr inbounds [16 x i8], [16 x i8]* %5, i64 0, i64 0
%15 = call i32 @cCamCryptVG_Reorder16A(i8* %13, i8* %14)
ret void
}

LLVM IR (-O2):
%struct.s_reader = type { i32 }
define void @cCamCryptVG_ReorderAndEncrypt(%struct.s_reader* %0, i8* %1) {
%3 = alloca [16 x i8]
%4 = getelementptr inbounds [16 x i8], [16 x i8]* %3, i64 0, i64 0
%5 = call i32 @cCamCryptVG_Reorder16A(i8* %4, i8* %1)
%6 = call i32 @cAES_Encrypt(%struct.s_reader* %0, i8* %4, i32 16, i8* %4)
%7 = call i32 @cCamCryptVG_Reorder16A(i8* %1, i8* %4)
ret void
}
void radio_df_reset(void) {}


x86 assembly (clang, -O0):
<radio_df_reset>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<radio_df_reset>:
ret

LLVM IR (-O0):
define void @radio_df_reset() {
ret void
}

LLVM IR (-O2):
define void @radio_df_reset() {
ret void
}
int IsMathConstant(const char *cursor) {
  if (cursor[0] == 'p' && cursor[1] == 'i')
    return 2;
  if (cursor[0] == 'e' && cursor[1] != 'x')
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<IsMathConstant>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x70,%eax
jne    1135 <IsMathConstant+0x35>
mov    -0x10(%rbp),%rax
movsbl 0x1(%rax),%eax
cmp    $0x69,%eax
jne    1135 <IsMathConstant+0x35>
movl   $0x2,-0x4(%rbp)
jmp    1169 <IsMathConstant+0x69>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x65,%eax
jne    1162 <IsMathConstant+0x62>
mov    -0x10(%rbp),%rax
movsbl 0x1(%rax),%eax
cmp    $0x78,%eax
je     1162 <IsMathConstant+0x62>
movl   $0x1,-0x4(%rbp)
jmp    1169 <IsMathConstant+0x69>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IsMathConstant>:
mov    (%rdi),%al
cmp    $0x65,%al
je     1117 <IsMathConstant+0x17>
cmp    $0x70,%al
jne    1122 <IsMathConstant+0x22>
mov    $0x2,%eax
cmpb   $0x69,0x1(%rdi)
jne    1122 <IsMathConstant+0x22>
jmp    1124 <IsMathConstant+0x24>
mov    $0x1,%eax
cmpb   $0x78,0x1(%rdi)
jne    1124 <IsMathConstant+0x24>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @IsMathConstant(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 112
br i1 %8, label %9, label %16
9: ; preds = %1
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 105
br i1 %14, label %15, label %16
15: ; preds = %9
store i32 2, i32* %2
br label %30
16: ; preds = %9, %1
%17 = load i8*, i8** %3
%18 = getelementptr inbounds i8, i8* %17, i64 0
%19 = load i8, i8* %18
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 101
br i1 %21, label %22, label %29
22: ; preds = %16
%23 = load i8*, i8** %3
%24 = getelementptr inbounds i8, i8* %23, i64 1
%25 = load i8, i8* %24
%26 = sext i8 %25 to i32
%27 = icmp ne i32 %26, 120
br i1 %27, label %28, label %29
28: ; preds = %22
store i32 1, i32* %2
br label %30
29: ; preds = %22, %16
store i32 0, i32* %2
br label %30
30: ; preds = %29, %28, %15
%31 = load i32, i32* %2
ret i32 %31
}

LLVM IR (-O2):
define i32 @IsMathConstant(i8* nocapture %0) {
%2 = load i8, i8* %0
switch i8 %2, label %11 [
i8 112, label %3
i8 101, label %7
]
3: ; preds = %1
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 105
br i1 %6, label %12, label %11
7: ; preds = %1
%8 = getelementptr inbounds i8, i8* %0, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 120
br i1 %10, label %11, label %12
11: ; preds = %1, %3, %7
br label %12
12: ; preds = %7, %3, %11
%13 = phi i32 [ 0, %11 ], [ 2, %3 ], [ 1, %7 ]
ret i32 %13
}
/* Variables and functions */
float add_float(float, float);
float wack_float(register float u, register float v) {
  register float l = u, r = v;
  l = add_float(l, r);
  return l + r;
}


x86 assembly (clang, -O0):
<wack_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
movss  -0x10(%rbp),%xmm1
call   1030 <add_float@plt>
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
addss  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wack_float>:
push   %rax
movss  %xmm1,0x4(%rsp)
call   1030 <add_float@plt>
addss  0x4(%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @wack_float(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %3
store float %1, float* %4
%7 = load float, float* %3
store float %7, float* %5
%8 = load float, float* %4
store float %8, float* %6
%9 = load float, float* %5
%10 = load float, float* %6
%11 = call float @add_float(float %9, float %10)
store float %11, float* %5
%12 = load float, float* %5
%13 = load float, float* %6
%14 = fadd float %12, %13
ret float %14
}

LLVM IR (-O2):
define float @wack_float(float %0, float %1) {
%3 = tail call float @add_float(float %0, float %1)
%4 = fadd float %3, %1
ret float %4
}
void DBGFR3LogModifyDestinations(void) {}


x86 assembly (clang, -O0):
<DBGFR3LogModifyDestinations>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DBGFR3LogModifyDestinations>:
ret

LLVM IR (-O0):
define void @DBGFR3LogModifyDestinations() {
ret void
}

LLVM IR (-O2):
define void @DBGFR3LogModifyDestinations() {
ret void
}
int string_length(char *s) {
  int c = 0;
  while (*(s + c))
    c++;
  return c;
}


x86 assembly (clang, -O0):
<string_length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     112f <string_length+0x2f>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <string_length+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_length>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <string_length+0x10>
ret

LLVM IR (-O0):
define i32 @string_length(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %4
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @string_length(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_too_many_args(void) { printf("*** too many arguments\n"); }


x86 assembly (clang, -O0):
<print_too_many_args>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_too_many_args>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"*** too many arguments\0A\00"
define void @print_too_many_args() {
%1 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [23 x i8] c"*** too many arguments\00"
define void @print_too_many_args() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fatal(char *);
void usage() {
  fatal("usage: srails_disc [-sigfile1 <str> (REQUIRED)]\n\t[-seglist1 <str> "
        "(REQUIRED)]\n\t[-sigfile2 <str>]\n\t[-seglist2 <str>]\n\t[-P <n> "
        "(defaults to 8)]\n\t[-B <n> (defaults to 10)]\n\t[-T <n> (defaults to "
        "0.95)]\n\t[-S <n> (defaults to 64)]\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <fatal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <fatal@plt>

LLVM IR (-O0):
@.str = [226 x i8] c"usage: srails_disc [-sigfile1 <str> (REQUIRED)]\0A\09[-seglist1 <str> (REQUIRED)]\0A\09[-sigfile2 <str>]\0A\09[-seglist2 <str>]\0A\09[-P <n> (defaults to 8)]\0A\09[-B <n> (defaults to 10)]\0A\09[-T <n> (defaults to 0.95)]\0A\09[-S <n> (defaults to 64)]\0A\00"
define void @usage() {
%1 = call i32 @fatal(i8* getelementptr inbounds ([226 x i8], [226 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [226 x i8] c"usage: srails_disc [-sigfile1 <str> (REQUIRED)]\0A\09[-seglist1 <str> (REQUIRED)]\0A\09[-sigfile2 <str>]\0A\09[-seglist2 <str>]\0A\09[-P <n> (defaults to 8)]\0A\09[-B <n> (defaults to 10)]\0A\09[-T <n> (defaults to 0.95)]\0A\09[-S <n> (defaults to 64)]\0A\00"
define void @usage() {
%1 = tail call i32 @fatal(i8* getelementptr inbounds ([226 x i8], [226 x i8]* @.str, i64 0, i64 0))
ret void
}
void ff_hevc_put_hevc_uni_qpel_hv64_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_qpel_hv64_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_qpel_hv64_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_qpel_hv64_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_qpel_hv64_8_sse4() {
ret void
}
char *PlatformName() { return "OSX"; }


x86 assembly (clang, -O0):
<PlatformName>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PlatformName>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"OSX\00"
define i8* @PlatformName() {
ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [4 x i8] c"OSX\00"
define i8* @PlatformName() {
ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
}
int link_example() { return 5; }


x86 assembly (clang, -O0):
<link_example>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<link_example>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @link_example() {
ret i32 5
}

LLVM IR (-O2):
define i32 @link_example() {
ret i32 5
}
void gtk_dialog_new_with_buttons() {}


x86 assembly (clang, -O0):
<gtk_dialog_new_with_buttons>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_dialog_new_with_buttons>:
ret

LLVM IR (-O0):
define void @gtk_dialog_new_with_buttons() {
ret void
}

LLVM IR (-O2):
define void @gtk_dialog_new_with_buttons() {
ret void
}