xunge/DecIR huggingface dataset:
void ISNewBLOB(const char *dev, const char *name, int sizes[], char *blobs[],
               char *formats[], char *names[], int n) {
  dev = dev;
  name = name;
  sizes = sizes;
  blobs = blobs;
  formats = formats;
  names = names;
  n = n;
}


x86 assembly (clang, -O0):
<ISNewBLOB>:
push   %rbp
mov    %rsp,%rbp
mov    0x10(%rbp),%eax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    0x10(%rbp),%eax
mov    %eax,0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ISNewBLOB>:
ret

LLVM IR (-O0):
define void @ISNewBLOB(i8* %0, i8* %1, i32* %2, i8** %3, i8** %4, i8** %5, i32 %6) {
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i32*
%11 = alloca i8**
%12 = alloca i8**
%13 = alloca i8**
%14 = alloca i32
store i8* %0, i8** %8
store i8* %1, i8** %9
store i32* %2, i32** %10
store i8** %3, i8*** %11
store i8** %4, i8*** %12
store i8** %5, i8*** %13
store i32 %6, i32* %14
%15 = load i8*, i8** %8
store i8* %15, i8** %8
%16 = load i8*, i8** %9
store i8* %16, i8** %9
%17 = load i32*, i32** %10
store i32* %17, i32** %10
%18 = load i8**, i8*** %11
store i8** %18, i8*** %11
%19 = load i8**, i8*** %12
store i8** %19, i8*** %12
%20 = load i8**, i8*** %13
store i8** %20, i8*** %13
%21 = load i32, i32* %14
store i32 %21, i32* %14
ret void
}

LLVM IR (-O2):
define void @ISNewBLOB(i8* nocapture %0, i8* nocapture %1, i32* nocapture %2, i8** nocapture %3, i8** nocapture %4, i8** nocapture %5, i32 %6) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ WriteAByte(int, int);
void PCF8563_init() {
  WriteAByte(0x00, 0x00);
  WriteAByte(0x01, 0x12);
}


x86 assembly (clang, -O0):
<PCF8563_init>:
push   %rbp
mov    %rsp,%rbp
xor    %esi,%esi
mov    %esi,%edi
call   1030 <WriteAByte@plt>
mov    $0x1,%edi
mov    $0x12,%esi
call   1030 <WriteAByte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PCF8563_init>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
call   1030 <WriteAByte@plt>
mov    $0x1,%edi
mov    $0x12,%esi
pop    %rax
jmp    1030 <WriteAByte@plt>

LLVM IR (-O0):
define void @PCF8563_init() {
%1 = call i32 @WriteAByte(i32 0, i32 0)
%2 = call i32 @WriteAByte(i32 1, i32 18)
ret void
}

LLVM IR (-O2):
define void @PCF8563_init() {
%1 = tail call i32 @WriteAByte(i32 0, i32 0)
%2 = tail call i32 @WriteAByte(i32 1, i32 18)
ret void
}
void read_histogram() {}


x86 assembly (clang, -O0):
<read_histogram>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_histogram>:
ret

LLVM IR (-O0):
define void @read_histogram() {
ret void
}

LLVM IR (-O2):
define void @read_histogram() {
ret void
}
void blah() {
  int len;
  len = strlen(__FUNCTION__);
  printf("this function (%s) has a name that is %d characters long\n",
         __FUNCTION__, len);
}


x86 assembly (clang, -O0):
<blah>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x4,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xed7(%rip),%rdi
lea    0xf0a(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<blah>:
lea    0xee9(%rip),%rdi
lea    0xf1c(%rip),%rsi
mov    $0x4,%edx
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [58 x i8] c"this function (%s) has a name that is %d characters long\0A\00"
@__FUNCTION__.blah = [5 x i8] c"blah\00"
define void @blah() {
%1 = alloca i32
store i32 4, i32* %1
%2 = load i32, i32* %1
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @__FUNCTION__.blah, i64 0, i64 0), i32 %2)
ret void
}

LLVM IR (-O2):
@.str = [58 x i8] c"this function (%s) has a name that is %d characters long\0A\00"
@__FUNCTION__.blah = [5 x i8] c"blah\00"
define void @blah() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([58 x i8], [58 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @__FUNCTION__.blah, i64 0, i64 0), i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write_generic(int);
void write_buf(void) { write_generic((312 * 2)); }


x86 assembly (clang, -O0):
<write_buf>:
push   %rbp
mov    %rsp,%rbp
mov    $0x270,%edi
call   1030 <write_generic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_buf>:
mov    $0x270,%edi
jmp    1030 <write_generic@plt>

LLVM IR (-O0):
define void @write_buf() {
%1 = call i32 @write_generic(i32 624)
ret void
}

LLVM IR (-O2):
define void @write_buf() {
%1 = tail call i32 @write_generic(i32 624)
ret void
}
int getLEdword(char buf[4]) {
  unsigned char *b = (unsigned char *)buf;
  return (b[3] << 24) | (b[2] << 16) | (b[1] << 8) | (b[0] << 0);
}


x86 assembly (clang, -O0):
<getLEdword>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movzbl 0x3(%rax),%eax
shl    $0x18,%eax
mov    -0x10(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%rcx
movzbl (%rcx),%ecx
shl    $0x0,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getLEdword>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @getLEdword(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 3
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = shl i32 %8, 24
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 2
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = shl i32 %13, 16
%15 = or i32 %9, %14
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i64 1
%18 = load i8, i8* %17
%19 = zext i8 %18 to i32
%20 = shl i32 %19, 8
%21 = or i32 %15, %20
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i64 0
%24 = load i8, i8* %23
%25 = zext i8 %24 to i32
%26 = shl i32 %25, 0
%27 = or i32 %21, %26
ret i32 %27
}

LLVM IR (-O2):
define i32 @getLEdword(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 3
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = shl nuw i32 %4, 24
%6 = getelementptr inbounds i8, i8* %0, i64 2
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = shl nuw nsw i32 %8, 16
%10 = or i32 %9, %5
%11 = getelementptr inbounds i8, i8* %0, i64 1
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = shl nuw nsw i32 %13, 8
%15 = or i32 %10, %14
%16 = load i8, i8* %0
%17 = zext i8 %16 to i32
%18 = or i32 %15, %17
ret i32 %18
}
int fz_isbigendian(void) {
  static const int one = 1;
  return *(char *)&one == 0;
}


x86 assembly (clang, -O0):
<fz_isbigendian>:
push   %rbp
mov    %rsp,%rbp
movsbl 0xef5(%rip),%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fz_isbigendian>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@fz_isbigendian.one = internal constant i32 1
define i32 @fz_isbigendian() {
%1 = load i8, i8* bitcast (i32* @fz_isbigendian.one to i8*)
%2 = sext i8 %1 to i32
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @fz_isbigendian() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t eqntohuint32(const uint8_t *data) { return *(uint32_t *)data; }


x86 assembly (clang, -O0):
<eqntohuint32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<eqntohuint32>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @eqntohuint32(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @eqntohuint32(i32* nocapture %0) {
%2 = load i32, i32* %0
ret i32 %2
}
/* Variables and functions */
int __builtin_allegrex_round_w_s(float);
int pspFpuRound(float fs) { return (__builtin_allegrex_round_w_s(fs)); }


x86 assembly (clang, -O0):
<pspFpuRound>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <__builtin_allegrex_round_w_s@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pspFpuRound>:
jmp    1030 <__builtin_allegrex_round_w_s@plt>

LLVM IR (-O0):
define i32 @pspFpuRound(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 @__builtin_allegrex_round_w_s(float %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @pspFpuRound(float %0) {
%2 = tail call i32 @__builtin_allegrex_round_w_s(float %0)
ret i32 %2
}
/* Variables and functions */
int ms6931_write(int, char *, int);
int ms6931_attn(int fd, int len) {
  static char out[3] = {'~', 0x26, 0};
  len &= 0xFF;
  out[2] = (char)len;
  return ms6931_write(fd, out, 3);
}


x86 assembly (clang, -O0):
<ms6931_attn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %al,0x2ef8(%rip)
mov    -0x4(%rbp),%edi
lea    0x2eec(%rip),%rsi
mov    $0x3,%edx
call   1030 <ms6931_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ms6931_attn>:
mov    %sil,0x2f13(%rip)
lea    0x2f0a(%rip),%rsi
mov    $0x3,%edx
jmp    1030 <ms6931_write@plt>

LLVM IR (-O0):
@ms6931_attn.out = internal global [3 x i8] c"~&\00"
define i32 @ms6931_attn(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 255
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = trunc i32 %7 to i8
store i8 %8, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @ms6931_attn.out, i64 0, i64 2)
%9 = load i32, i32* %3
%10 = call i32 @ms6931_write(i32 %9, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @ms6931_attn.out, i64 0, i64 0), i32 3)
ret i32 %10
}

LLVM IR (-O2):
@ms6931_attn.out = internal global [3 x i8] c"~&\00"
define i32 @ms6931_attn(i32 %0, i32 %1) {
%3 = trunc i32 %1 to i8
store i8 %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @ms6931_attn.out, i64 0, i64 2)
%4 = tail call i32 @ms6931_write(i32 %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @ms6931_attn.out, i64 0, i64 0), i32 3)
ret i32 %4
}
int ft_div(int a, int b) { return (a / b); }


x86 assembly (clang, -O0):
<ft_div>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_div>:
mov    %edi,%eax
cltd
idiv   %esi
ret

LLVM IR (-O0):
define i32 @ft_div(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sdiv i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @ft_div(i32 %0, i32 %1) {
%3 = sdiv i32 %0, %1
ret i32 %3
}
/* Variables and functions */
scalar_t__ atol(char *);
int f(long long, int);
int main(int argc, char **argv) {
  long long m = (argc > 1) ? (int)atol(argv[1]) : 1;
  int rv = f(((long long)1) << (m - 1), 1);
  return rv;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    1155 <main+0x35>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <atol@plt>
mov    %eax,-0x20(%rbp)
jmp    1162 <main+0x42>
mov    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    1162 <main+0x42>
mov    -0x20(%rbp),%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
sub    $0x1,%rcx
mov    $0x1,%edi
shl    %cl,%rdi
mov    $0x1,%esi
call   1030 <f@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
cmp    $0x2,%edi
jl     113c <main+0x1c>
push   %rax
mov    0x8(%rsi),%rdi
call   1040 <atol@plt>
movslq %eax,%rcx
add    $0xffffffffffffffff,%rcx
add    $0x8,%rsp
jmp    113e <main+0x1e>
xor    %ecx,%ecx
mov    $0x1,%edi
shl    %cl,%rdi
mov    $0x1,%esi
jmp    1030 <f@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i64
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = load i32, i32* %4
%9 = icmp sgt i32 %8, 1
br i1 %9, label %10, label %16
10: ; preds = %2
%11 = load i8**, i8*** %5
%12 = getelementptr inbounds i8*, i8** %11, i64 1
%13 = load i8*, i8** %12
%14 = call i64 @atol(i8* %13)
%15 = trunc i64 %14 to i32
br label %17
16: ; preds = %2
br label %17
17: ; preds = %16, %10
%18 = phi i32 [ %15, %10 ], [ 1, %16 ]
%19 = sext i32 %18 to i64
store i64 %19, i64* %6
%20 = load i64, i64* %6
%21 = sub nsw i64 %20, 1
%22 = shl i64 1, %21
%23 = call i32 @f(i64 %22, i32 1)
store i32 %23, i32* %7
%24 = load i32, i32* %7
ret i32 %24
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %11
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = tail call i64 @atol(i8* %6)
%8 = shl i64 %7, 32
%9 = ashr exact i64 %8, 32
%10 = add nsw i64 %9, -1
br label %11
11: ; preds = %2, %4
%12 = phi i64 [ %10, %4 ], [ 0, %2 ]
%13 = shl nuw i64 1, %12
%14 = tail call i32 @f(i64 %13, i32 1)
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ mcal_cpu_nop();
void __pend_sv_handler() {
  for (;;) {
    mcal_cpu_nop();
  }
}


x86 assembly (clang, -O0):
<__pend_sv_handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <__pend_sv_handler+0x9>
mov    $0x0,%al
call   1030 <mcal_cpu_nop@plt>
jmp    1119 <__pend_sv_handler+0x9>

x86 assembly (clang, -O2):
<__pend_sv_handler>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <mcal_cpu_nop@plt>
jmp    1120 <__pend_sv_handler+0x10>

LLVM IR (-O0):
define void @__pend_sv_handler() {
br label %1
1: ; preds = %1, %0
%2 = call i32 (...) @mcal_cpu_nop()
br label %1
}

LLVM IR (-O2):
define void @__pend_sv_handler() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @mcal_cpu_nop()
br label %1
}
void test_40_1(short *mem) { __atomic_xor_fetch(mem, -1, 4); }


x86 assembly (clang, -O0):
<test_40_1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movw   $0xffff,-0xa(%rbp)
mov    -0xa(%rbp),%cx
mov    %cx,-0x10(%rbp)
mov    (%rax),%ax
mov    %ax,-0xe(%rbp)
mov    -0xe(%rbp),%ax
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%dx
mov    %dx,%si
mov    %ax,%dx
mov    %edx,-0x24(%rbp)
xor    %esi,%edx
mov    %edx,-0x20(%rbp)
lock cmpxchg %dx,(%rcx)
sete   %cl
mov    %ax,-0x1a(%rbp)
test   $0x1,%cl
mov    %ax,-0xe(%rbp)
jne    115d <test_40_1+0x5d>
jmp    1125 <test_40_1+0x25>
mov    -0x10(%rbp),%cx
mov    -0x1a(%rbp),%ax
xor    %cx,%ax
mov    %ax,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_40_1>:
lock xorw $0xffff,(%rdi)
ret

LLVM IR (-O0):
define void @test_40_1(i16* %0) {
%2 = alloca i16*
%3 = alloca i16
%4 = alloca i16
store i16* %0, i16** %2
%5 = load i16*, i16** %2
store i16 -1, i16* %3
%6 = load i16, i16* %3
%7 = atomicrmw xor i16* %5, i16 %6 acq_rel
%8 = xor i16 %7, %6
store i16 %8, i16* %4
%9 = load i16, i16* %4
ret void
}

LLVM IR (-O2):
define void @test_40_1(i16* nocapture %0) {
%2 = atomicrmw xor i16* %0, i16 -1 acq_rel
ret void
}
/* Variables and functions */
int /*<<< orphan*/ glColor4ubv(unsigned char *);
void Color4ubv(unsigned char v[4]) { glColor4ubv(v); }


x86 assembly (clang, -O0):
<Color4ubv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <glColor4ubv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Color4ubv>:
jmp    1030 <glColor4ubv@plt>

LLVM IR (-O0):
define void @Color4ubv(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @glColor4ubv(i8* %3)
ret void
}

LLVM IR (-O2):
define void @Color4ubv(i8* %0) {
%2 = tail call i32 @glColor4ubv(i8* %0)
ret void
}
void __freemem(void *ptr) {}


x86 assembly (clang, -O0):
<__freemem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__freemem>:
ret

LLVM IR (-O0):
define void @__freemem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @__freemem(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ handler_not_implemented(char *);
void defaultExceptionRegistersHandler() {
  handler_not_implemented("EXCEPTION_REGISTERS_HANDLER");
}


x86 assembly (clang, -O0):
<defaultExceptionRegistersHandler>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <handler_not_implemented@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<defaultExceptionRegistersHandler>:
lea    0xee9(%rip),%rdi
jmp    1030 <handler_not_implemented@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"EXCEPTION_REGISTERS_HANDLER\00"
define void @defaultExceptionRegistersHandler() {
%1 = call i32 @handler_not_implemented(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c"EXCEPTION_REGISTERS_HANDLER\00"
define void @defaultExceptionRegistersHandler() {
%1 = tail call i32 @handler_not_implemented(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
ret void
}
void AKMemorySetBit(unsigned char *data, int pos, int val) {
  int posByte = pos / 8;
  int posBit = pos % 8;
  unsigned char oldByte = data[posByte];
  oldByte = (unsigned char)(((0xFF7F >> posBit) & oldByte) & 0x00FF);
  unsigned char newByte =
      (unsigned char)((val << (8 - (posBit + 1))) | oldByte);
  data[posByte] = newByte;
}


x86 assembly (clang, -O0):
<AKMemorySetBit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %edx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x19(%rbp)
mov    -0x18(%rbp),%ecx
mov    $0xff7f,%eax
sar    %cl,%eax
movzbl -0x19(%rbp),%ecx
and    %ecx,%eax
and    $0xff,%eax
mov    %al,-0x19(%rbp)
mov    -0x10(%rbp),%eax
mov    -0x18(%rbp),%edx
add    $0x1,%edx
mov    $0x8,%ecx
sub    %edx,%ecx
shl    %cl,%eax
movzbl -0x19(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0x1a(%rbp)
mov    -0x1a(%rbp),%dl
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<AKMemorySetBit>:
mov    %esi,%ecx
lea    0x7(%rcx),%eax
test   %esi,%esi
cmovns %esi,%eax
mov    %eax,%esi
and    $0xfffffff8,%esi
sub    %esi,%ecx
sar    $0x3,%eax
movslq %eax,%r8
mov    $0xff7f,%esi
shr    %cl,%esi
mov    $0x7,%al
sub    %cl,%al
mov    %eax,%ecx
shl    %cl,%edx
and    (%rdi,%r8,1),%sil
or     %sil,%dl
mov    %dl,(%rdi,%r8,1)
ret

LLVM IR (-O0):
define void @AKMemorySetBit(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i8
%10 = alloca i8
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%11 = load i32, i32* %5
%12 = sdiv i32 %11, 8
store i32 %12, i32* %7
%13 = load i32, i32* %5
%14 = srem i32 %13, 8
store i32 %14, i32* %8
%15 = load i8*, i8** %4
%16 = load i32, i32* %7
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
store i8 %19, i8* %9
%20 = load i32, i32* %8
%21 = ashr i32 65407, %20
%22 = load i8, i8* %9
%23 = zext i8 %22 to i32
%24 = and i32 %21, %23
%25 = and i32 %24, 255
%26 = trunc i32 %25 to i8
store i8 %26, i8* %9
%27 = load i32, i32* %6
%28 = load i32, i32* %8
%29 = add nsw i32 %28, 1
%30 = sub nsw i32 8, %29
%31 = shl i32 %27, %30
%32 = load i8, i8* %9
%33 = zext i8 %32 to i32
%34 = or i32 %31, %33
%35 = trunc i32 %34 to i8
store i8 %35, i8* %10
%36 = load i8, i8* %10
%37 = load i8*, i8** %4
%38 = load i32, i32* %7
%39 = sext i32 %38 to i64
%40 = getelementptr inbounds i8, i8* %37, i64 %39
store i8 %36, i8* %40
ret void
}

LLVM IR (-O2):
define void @AKMemorySetBit(i8* nocapture %0, i32 %1, i32 %2) {
%4 = sdiv i32 %1, 8
%5 = srem i32 %1, 8
%6 = sext i32 %4 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = lshr i32 65407, %5
%10 = trunc i32 %9 to i8
%11 = and i8 %8, %10
%12 = sub nsw i32 7, %5
%13 = shl i32 %2, %12
%14 = trunc i32 %13 to i8
%15 = or i8 %11, %14
store i8 %15, i8* %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SYS_arch_prctl;
int syscall(int /*<<< orphan*/, int, void *);
int dosemu_arch_prctl(int code, void *addr) {
  return syscall(SYS_arch_prctl, code, addr);
}


x86 assembly (clang, -O0):
<dosemu_arch_prctl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dosemu_arch_prctl>:
mov    %rsi,%rdx
mov    %edi,%esi
mov    0x2ecc(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@SYS_arch_prctl = global i32 0
define i32 @dosemu_arch_prctl(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* @SYS_arch_prctl
%6 = load i32, i32* %3
%7 = load i8*, i8** %4
%8 = call i32 @syscall(i32 %5, i32 %6, i8* %7)
ret i32 %8
}

LLVM IR (-O2):
@SYS_arch_prctl = global i32 0
define i32 @dosemu_arch_prctl(i32 %0, i8* %1) {
%3 = load i32, i32* @SYS_arch_prctl
%4 = tail call i32 @syscall(i32 %3, i32 %0, i8* %1)
ret i32 %4
}
__attribute__((no, noclone)) int baz(int i) {
  volatile int v[4];
  int *p;
  v[i] = 6;
  p = (int *)&v[0];
  *p = 8;
  return v[i];
}


x86 assembly (clang, -O0):
<baz>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
movl   $0x6,-0x20(%rbp,%rax,4)
lea    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
movl   $0x8,(%rax)
movslq -0x4(%rbp),%rax
mov    -0x20(%rbp,%rax,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz>:
movslq %edi,%rax
movl   $0x6,-0x18(%rsp,%rax,4)
movl   $0x8,-0x18(%rsp)
mov    -0x18(%rsp,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @baz(i32 %0) {
%2 = alloca i32
%3 = alloca [4 x i32]
%4 = alloca i32*
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 %6
store volatile i32 6, i32* %7
%8 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 0
store i32* %8, i32** %4
%9 = load i32*, i32** %4
store i32 8, i32* %9
%10 = load i32, i32* %2
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 %11
%13 = load volatile i32, i32* %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @baz(i32 %0) {
%2 = alloca [4 x i32]
%3 = bitcast [4 x i32]* %2 to i8*
%4 = sext i32 %0 to i64
%5 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 0, i64 %4
store volatile i32 6, i32* %5
%6 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 0, i64 0
store i32 8, i32* %6
%7 = load volatile i32, i32* %5
ret i32 %7
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void UARTEnable(uint32_t ui32Base) {
  ;
  (*((volatile unsigned long *)(ui32Base + 0x0000002C))) |= 0x00000010;
  (*((volatile unsigned long *)(ui32Base + 0x00000030))) |=
      (0x00000001 | 0x00000100 | 0x00000200);
}


x86 assembly (clang, -O0):
<UARTEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2c(%rax),%rcx
or     $0x10,%rcx
mov    %rcx,0x2c(%rax)
mov    -0x8(%rbp),%rax
mov    0x30(%rax),%rcx
or     $0x301,%rcx
mov    %rcx,0x30(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTEnable>:
orq    $0x10,0x2c(%rdi)
orq    $0x301,0x30(%rdi)
ret

LLVM IR (-O0):
define void @UARTEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 44
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = or i64 %6, 16
store volatile i64 %7, i64* %5
%8 = load i64, i64* %2
%9 = add nsw i64 %8, 48
%10 = inttoptr i64 %9 to i64*
%11 = load volatile i64, i64* %10
%12 = or i64 %11, 769
store volatile i64 %12, i64* %10
ret void
}

LLVM IR (-O2):
define void @UARTEnable(i64 %0) {
%2 = add nsw i64 %0, 44
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = or i64 %4, 16
store volatile i64 %5, i64* %3
%6 = add nsw i64 %0, 48
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = or i64 %8, 769
store volatile i64 %9, i64* %7
ret void
}
unsigned xrop3_34_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned stk1;
  unsigned stk2;
  stk2 = ~S;
  stk1 = D & stk2;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_34_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
and    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_34_0_0>:
not    %dil
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_34_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
store i32 %14, i32* %6
%15 = load i32, i32* %6
%16 = xor i32 %15, -1
store i32 %16, i32* %8
%17 = load i32, i32* %5
%18 = load i32, i32* %8
%19 = and i32 %17, %18
store i32 %19, i32* %7
%20 = load i32, i32* %7
ret i32 %20
}

LLVM IR (-O2):
define i32 @xrop3_34_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = xor i8 %0, -1
%4 = zext i8 %3 to i32
ret i32 %4
}
/* Variables and functions */
int EAGAIN;
int errno;
int recv(int, char *, int, int /*<<< orphan*/);
int manos_socket_receive(int fd, char *buffer, int len, int *err) {
  int result;
  result = recv(fd, buffer, len, 0);
  if (result < 0 && (errno == EAGAIN)) {
    *err = 0;
  } else {
    *err = errno;
  }
  return result;
}


x86 assembly (clang, -O0):
<manos_socket_receive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
xor    %ecx,%ecx
call   1030 <recv@plt>
mov    %eax,-0x24(%rbp)
cmpl   $0x0,-0x24(%rbp)
jge    116b <manos_socket_receive+0x5b>
mov    0x2e95(%rip),%rax
mov    (%rax),%eax
mov    0x2e7c(%rip),%rcx
cmp    (%rcx),%eax
jne    116b <manos_socket_receive+0x5b>
mov    -0x20(%rbp),%rax
movl   $0x0,(%rax)
jmp    117a <manos_socket_receive+0x6a>
mov    0x2e6e(%rip),%rax
mov    (%rax),%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<manos_socket_receive>:
push   %rbp
push   %rbx
push   %rax
mov    %rcx,%rbx
xor    %ebp,%ebp
xor    %ecx,%ecx
call   1030 <recv@plt>
mov    0x2eba(%rip),%rcx
mov    (%rcx),%ecx
mov    0x2ea1(%rip),%rdx
cmp    (%rdx),%ecx
cmovne %ecx,%ebp
test   %eax,%eax
cmovns %ecx,%ebp
mov    %ebp,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i32 0
@EAGAIN = global i32 0
define i32 @manos_socket_receive(i32 %0, i8* %1, i32 %2, i32* %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32*
%9 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32* %3, i32** %8
%10 = load i32, i32* %5
%11 = load i8*, i8** %6
%12 = load i32, i32* %7
%13 = call i32 @recv(i32 %10, i8* %11, i32 %12, i32 0)
store i32 %13, i32* %9
%14 = load i32, i32* %9
%15 = icmp slt i32 %14, 0
br i1 %15, label %16, label %22
16: ; preds = %4
%17 = load i32, i32* @errno
%18 = load i32, i32* @EAGAIN
%19 = icmp eq i32 %17, %18
br i1 %19, label %20, label %22
20: ; preds = %16
%21 = load i32*, i32** %8
store i32 0, i32* %21
br label %25
22: ; preds = %16, %4
%23 = load i32, i32* @errno
%24 = load i32*, i32** %8
store i32 %23, i32* %24
br label %25
25: ; preds = %22, %20
%26 = load i32, i32* %9
ret i32 %26
}

LLVM IR (-O2):
@errno = global i32 0
@EAGAIN = global i32 0
define i32 @manos_socket_receive(i32 %0, i8* %1, i32 %2, i32* nocapture writeonly %3) {
%5 = tail call i32 @recv(i32 %0, i8* %1, i32 %2, i32 0)
%6 = icmp slt i32 %5, 0
%7 = load i32, i32* @errno
%8 = load i32, i32* @EAGAIN
%9 = icmp eq i32 %7, %8
%10 = select i1 %6, i1 %9, i1 false
%11 = select i1 %10, i32 0, i32 %7
store i32 %11, i32* %3
ret i32 %5
}
/* Variables and functions */
scalar_t__ undo();
int /*<<< orphan*/ unselect();
void cmd_undo(const char *pf, char **args) {
  if (undo()) {
    unselect();
  }
}


x86 assembly (clang, -O0):
<cmd_undo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <undo@plt>
cmp    $0x0,%rax
je     1148 <cmd_undo+0x28>
mov    $0x0,%al
call   1030 <unselect@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_undo>:
push   %rax
xor    %eax,%eax
call   1040 <undo@plt>
test   %rax,%rax
je     1135 <cmd_undo+0x15>
xor    %eax,%eax
pop    %rcx
jmp    1030 <unselect@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @cmd_undo(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
%5 = call i64 (...) @undo()
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = call i32 (...) @unselect()
br label %9
9: ; preds = %7, %2
ret void
}

LLVM IR (-O2):
define void @cmd_undo(i8* nocapture readnone %0, i8** nocapture readnone %1) {
%3 = tail call i64 (...) @undo()
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 (...) @unselect()
br label %7
7: ; preds = %5, %2
ret void
}
int isSorted(double *t, int size) {
  int v = 1;
  for (int i = 1; i < size; i++)
    if (t[i] < t[i - 1]) {
      v = 0;
      break;
    }
  return v;
}


x86 assembly (clang, -O0):
<isSorted>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    116d <isSorted+0x6d>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm1
mov    -0x8(%rbp),%rax
mov    -0x14(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movsd  (%rax,%rcx,8),%xmm0
ucomisd %xmm1,%xmm0
jbe    115a <isSorted+0x5a>
movl   $0x0,-0x10(%rbp)
jmp    116d <isSorted+0x6d>
jmp    115f <isSorted+0x5f>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1119 <isSorted+0x19>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isSorted>:
mov    $0x1,%eax
cmp    $0x2,%esi
jl     1138 <isSorted+0x38>
mov    %esi,%ecx
movsd  (%rdi),%xmm0
mov    $0x1,%edx
cs nopw 0x0(%rax,%rax,1)
nop
movapd %xmm0,%xmm1
movsd  (%rdi,%rdx,8),%xmm0
ucomisd %xmm0,%xmm1
ja     1139 <isSorted+0x39>
add    $0x1,%rdx
cmp    %rdx,%rcx
jne    1120 <isSorted+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isSorted(double* %0, i32 %1) {
%3 = alloca double*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store double* %0, double** %3
store i32 %1, i32* %4
store i32 1, i32* %5
store i32 1, i32* %6
br label %7
7: ; preds = %26, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %29
11: ; preds = %7
%12 = load double*, double** %3
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds double, double* %12, i64 %14
%16 = load double, double* %15
%17 = load double*, double** %3
%18 = load i32, i32* %6
%19 = sub nsw i32 %18, 1
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds double, double* %17, i64 %20
%22 = load double, double* %21
%23 = fcmp olt double %16, %22
br i1 %23, label %24, label %25
24: ; preds = %11
store i32 0, i32* %5
br label %29
25: ; preds = %11
br label %26
26: ; preds = %25
%27 = load i32, i32* %6
%28 = add nsw i32 %27, 1
store i32 %28, i32* %6
br label %7
29: ; preds = %24, %7
%30 = load i32, i32* %5
ret i32 %30
}

LLVM IR (-O2):
define i32 @isSorted(double* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 1
br i1 %3, label %4, label %16
4: ; preds = %2
%5 = zext i32 %1 to i64
%6 = load double, double* %0
br label %9
7: ; preds = %9
%8 = icmp eq i64 %15, %5
br i1 %8, label %16, label %9
9: ; preds = %4, %7
%10 = phi double [ %6, %4 ], [ %13, %7 ]
%11 = phi i64 [ 1, %4 ], [ %15, %7 ]
%12 = getelementptr inbounds double, double* %0, i64 %11
%13 = load double, double* %12
%14 = fcmp olt double %13, %10
%15 = add nuw nsw i64 %11, 1
br i1 %14, label %16, label %7
16: ; preds = %7, %9, %2
%17 = phi i32 [ 1, %2 ], [ 0, %9 ], [ 1, %7 ]
ret i32 %17
}
/* Variables and functions */
int /*<<< orphan*/ evaluate(char);
void CheckStockValue(int stockValue) {
  if (stockValue >= 500)
    evaluate('b');
  else if (stockValue <= 100)
    evaluate('s');
  else
    evaluate('h');
}


x86 assembly (clang, -O0):
<CheckStockValue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1f4,-0x4(%rbp)
jl     1137 <CheckStockValue+0x27>
mov    $0x62,%edi
call   1030 <evaluate@plt>
jmp    115f <CheckStockValue+0x4f>
cmpl   $0x64,-0x4(%rbp)
jg     1150 <CheckStockValue+0x40>
mov    $0x73,%edi
call   1030 <evaluate@plt>
jmp    115a <CheckStockValue+0x4a>
mov    $0x68,%edi
call   1030 <evaluate@plt>
jmp    115f <CheckStockValue+0x4f>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CheckStockValue>:
cmp    $0x65,%edi
mov    $0x73,%eax
mov    $0x68,%ecx
cmovl  %eax,%ecx
cmp    $0x1f4,%edi
mov    $0x62,%edi
cmovl  %ecx,%edi
jmp    1030 <evaluate@plt>

LLVM IR (-O0):
define void @CheckStockValue(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 500
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @evaluate(i8 signext 98)
br label %15
7: ; preds = %1
%8 = load i32, i32* %2
%9 = icmp sle i32 %8, 100
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = call i32 @evaluate(i8 signext 115)
br label %14
12: ; preds = %7
%13 = call i32 @evaluate(i8 signext 104)
br label %14
14: ; preds = %12, %10
br label %15
15: ; preds = %14, %5
ret void
}

LLVM IR (-O2):
define void @CheckStockValue(i32 %0) {
%2 = icmp sgt i32 %0, 499
%3 = icmp slt i32 %0, 101
%4 = select i1 %3, i8 115, i8 104
%5 = select i1 %2, i8 98, i8 %4
%6 = tail call i32 @evaluate(i8 signext %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, size_t, char *, int, char *, size_t, int);
int strerror_r(int, char *, size_t);
char *str_error_r(int errnum, char *buf, size_t buflen) {
  int err = strerror_r(errnum, buf, buflen);
  if (err) {
    snprintf(buf, buflen, "INTERNAL ERROR: strerror_r(%d, %p, %zd)=%d", errnum,
             buf, buflen, err);
  }
  return buf;
}


x86 assembly (clang, -O0):
<str_error_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <strerror_r@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
je     1175 <str_error_r+0x55>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%r8
mov    -0x18(%rbp),%r9
mov    -0x1c(%rbp),%eax
lea    0xe93(%rip),%rdx
mov    %eax,(%rsp)
call   1030 <snprintf@plt>
mov    -0x10(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_error_r>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %edi,%ebp
call   1040 <strerror_r@plt>
test   %eax,%eax
je     1156 <str_error_r+0x36>
mov    %eax,(%rsp)
lea    0xebd(%rip),%rdx
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %ebp,%ecx
mov    %rbx,%r8
mov    %r14,%r9
call   1030 <snprintf@plt>
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [43 x i8] c"INTERNAL ERROR: strerror_r(%d, %p, %zd)=%d\00"
define i8* @str_error_r(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = call i32 @strerror_r(i32 %8, i8* %9, i64 %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %22
14: ; preds = %3
%15 = load i8*, i8** %5
%16 = load i64, i64* %6
%17 = load i32, i32* %4
%18 = load i8*, i8** %5
%19 = load i64, i64* %6
%20 = load i32, i32* %7
%21 = call i32 @snprintf(i8* %15, i64 %16, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), i32 %17, i8* %18, i64 %19, i32 %20)
br label %22
22: ; preds = %14, %3
%23 = load i8*, i8** %5
ret i8* %23
}

LLVM IR (-O2):
@.str = [43 x i8] c"INTERNAL ERROR: strerror_r(%d, %p, %zd)=%d\00"
define i8* @str_error_r(i32 %0, i8* returned %1, i64 %2) {
%4 = tail call i32 @strerror_r(i32 %0, i8* %1, i64 %2)
%5 = icmp eq i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @snprintf(i8* %1, i64 %2, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), i32 %0, i8* %1, i64 %2, i32 %4)
br label %8
8: ; preds = %6, %3
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ SIGUSR1;
int /*<<< orphan*/ SIG_IGN;
int /*<<< orphan*/ util_signal_set(int /*<<< orphan*/, int /*<<< orphan*/);
void sniff_loop(int packet_socket, void *memory1, void *memory2) {
  util_signal_set(SIGUSR1, SIG_IGN);
}


x86 assembly (clang, -O0):
<sniff_loop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
mov    0x2ead(%rip),%rax
mov    (%rax),%esi
call   1030 <util_signal_set@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sniff_loop>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
jmp    1030 <util_signal_set@plt>

LLVM IR (-O0):
@SIGUSR1 = global i32 0
@SIG_IGN = global i32 0
define void @sniff_loop(i32 %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i32, i32* @SIGUSR1
%8 = load i32, i32* @SIG_IGN
%9 = call i32 @util_signal_set(i32 %7, i32 %8)
ret void
}

LLVM IR (-O2):
@SIGUSR1 = global i32 0
@SIG_IGN = global i32 0
define void @sniff_loop(i32 %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
%4 = load i32, i32* @SIGUSR1
%5 = load i32, i32* @SIG_IGN
%6 = tail call i32 @util_signal_set(i32 %4, i32 %5)
ret void
}
void vec2_scaleAndAdd(float *dst, float *b, float scale) {
  dst[0] = dst[0] + (b[0] * scale);
  dst[1] = dst[1] + (b[1] * scale);
}


x86 assembly (clang, -O0):
<vec2_scaleAndAdd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm1
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
movss  -0x14(%rbp),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm1
mov    -0x10(%rbp),%rax
movss  0x4(%rax),%xmm0
movss  -0x14(%rbp),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec2_scaleAndAdd>:
movss  (%rsi),%xmm1
mulss  %xmm0,%xmm1
addss  (%rdi),%xmm1
movss  %xmm1,(%rdi)
mulss  0x4(%rsi),%xmm0
addss  0x4(%rdi),%xmm0
movss  %xmm0,0x4(%rdi)
ret

LLVM IR (-O0):
define void @vec2_scaleAndAdd(float* %0, float* %1, float %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float
store float* %0, float** %4
store float* %1, float** %5
store float %2, float* %6
%7 = load float*, float** %4
%8 = getelementptr inbounds float, float* %7, i64 0
%9 = load float, float* %8
%10 = load float*, float** %5
%11 = getelementptr inbounds float, float* %10, i64 0
%12 = load float, float* %11
%13 = load float, float* %6
%14 = call float @llvm.fmuladd.f32(float %12, float %13, float %9)
%15 = load float*, float** %4
%16 = getelementptr inbounds float, float* %15, i64 0
store float %14, float* %16
%17 = load float*, float** %4
%18 = getelementptr inbounds float, float* %17, i64 1
%19 = load float, float* %18
%20 = load float*, float** %5
%21 = getelementptr inbounds float, float* %20, i64 1
%22 = load float, float* %21
%23 = load float, float* %6
%24 = call float @llvm.fmuladd.f32(float %22, float %23, float %19)
%25 = load float*, float** %4
%26 = getelementptr inbounds float, float* %25, i64 1
store float %24, float* %26
ret void
}

LLVM IR (-O2):
define void @vec2_scaleAndAdd(float* nocapture %0, float* nocapture %1, float %2) {
%4 = load float, float* %0
%5 = load float, float* %1
%6 = tail call float @llvm.fmuladd.f32(float %5, float %2, float %4)
store float %6, float* %0
%7 = getelementptr inbounds float, float* %0, i64 1
%8 = load float, float* %7
%9 = getelementptr inbounds float, float* %1, i64 1
%10 = load float, float* %9
%11 = tail call float @llvm.fmuladd.f32(float %10, float %2, float %8)
store float %11, float* %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Delay29();
void delay() { Delay29(); }


x86 assembly (clang, -O0):
<delay>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Delay29@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay>:
xor    %eax,%eax
jmp    1030 <Delay29@plt>

LLVM IR (-O0):
define void @delay() {
%1 = call i32 (...) @Delay29()
ret void
}

LLVM IR (-O2):
define void @delay() {
%1 = tail call i32 (...) @Delay29()
ret void
}
void eapol_sm_notify_lower_layer_success(struct eapol_sm *sm, int in_eapol_sm) {
}


x86 assembly (clang, -O0):
<eapol_sm_notify_lower_layer_success>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<eapol_sm_notify_lower_layer_success>:
ret

LLVM IR (-O0):
%struct.eapol_sm = type opaque
define void @eapol_sm_notify_lower_layer_success(%struct.eapol_sm* %0, i32 %1) {
%3 = alloca %struct.eapol_sm*
%4 = alloca i32
store %struct.eapol_sm* %0, %struct.eapol_sm** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.eapol_sm = type opaque
define void @eapol_sm_notify_lower_layer_success(%struct.eapol_sm* nocapture %0, i32 %1) {
ret void
}
void fus_bigint_pos(struct fus_bigint_t *bi) {}


x86 assembly (clang, -O0):
<fus_bigint_pos>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fus_bigint_pos>:
ret

LLVM IR (-O0):
%struct.fus_bigint_t = type opaque
define void @fus_bigint_pos(%struct.fus_bigint_t* %0) {
%2 = alloca %struct.fus_bigint_t*
store %struct.fus_bigint_t* %0, %struct.fus_bigint_t** %2
ret void
}

LLVM IR (-O2):
%struct.fus_bigint_t = type opaque
define void @fus_bigint_pos(%struct.fus_bigint_t* nocapture %0) {
ret void
}
void epit2_iomux_config() {}


x86 assembly (clang, -O0):
<epit2_iomux_config>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<epit2_iomux_config>:
ret

LLVM IR (-O0):
define void @epit2_iomux_config() {
ret void
}

LLVM IR (-O2):
define void @epit2_iomux_config() {
ret void
}
void XStoreColor() {}


x86 assembly (clang, -O0):
<XStoreColor>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XStoreColor>:
ret

LLVM IR (-O0):
define void @XStoreColor() {
ret void
}

LLVM IR (-O2):
define void @XStoreColor() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ expand(char *, char *);
char *malloc(int);
int main() {
  char *s1 = "g-g\0";
  char *s2 = malloc(10 * sizeof('a'));
  expand(s1, s2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    $0x28,%edi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <expand@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x28,%edi
call   1030 <malloc@plt>
lea    0xece(%rip),%rdi
mov    %rax,%rsi
call   1040 <expand@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"g-g\00\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %2
%4 = call i8* @malloc(i32 40)
store i8* %4, i8** %3
%5 = load i8*, i8** %2
%6 = load i8*, i8** %3
%7 = call i32 @expand(i8* %5, i8* %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"g-g\00\00"
define i32 @main() {
%1 = tail call dereferenceable_or_null(40) i8* @malloc(i32 40)
%2 = tail call i32 @expand(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %1)
ret i32 0
}
void test77_Test_21_targetInit__I() {}


x86 assembly (clang, -O0):
<test77_Test_21_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test77_Test_21_targetInit__I>:
ret

LLVM IR (-O0):
define void @test77_Test_21_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test77_Test_21_targetInit__I() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ evenODD(int);
int main() {
  evenODD(0);
  evenODD(1);
  evenODD(2);
  evenODD(3);
  evenODD(4);
  evenODD(12368);
  evenODD(918273);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <evenODD@plt>
mov    $0x1,%edi
call   1030 <evenODD@plt>
mov    $0x2,%edi
call   1030 <evenODD@plt>
mov    $0x3,%edi
call   1030 <evenODD@plt>
mov    $0x4,%edi
call   1030 <evenODD@plt>
mov    $0x3050,%edi
call   1030 <evenODD@plt>
mov    $0xe0301,%edi
call   1030 <evenODD@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <evenODD@plt>
mov    $0x1,%edi
call   1030 <evenODD@plt>
mov    $0x2,%edi
call   1030 <evenODD@plt>
mov    $0x3,%edi
call   1030 <evenODD@plt>
mov    $0x4,%edi
call   1030 <evenODD@plt>
mov    $0x3050,%edi
call   1030 <evenODD@plt>
mov    $0xe0301,%edi
call   1030 <evenODD@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @evenODD(i32 0)
%2 = call i32 @evenODD(i32 1)
%3 = call i32 @evenODD(i32 2)
%4 = call i32 @evenODD(i32 3)
%5 = call i32 @evenODD(i32 4)
%6 = call i32 @evenODD(i32 12368)
%7 = call i32 @evenODD(i32 918273)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @evenODD(i32 0)
%2 = tail call i32 @evenODD(i32 1)
%3 = tail call i32 @evenODD(i32 2)
%4 = tail call i32 @evenODD(i32 3)
%5 = tail call i32 @evenODD(i32 4)
%6 = tail call i32 @evenODD(i32 12368)
%7 = tail call i32 @evenODD(i32 918273)
ret i32 0
}
/* Variables and functions */
void *alloc5();
void *alloc4(void) { return alloc5(); }


x86 assembly (clang, -O0):
<alloc4>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <alloc5@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc4>:
xor    %eax,%eax
jmp    1030 <alloc5@plt>

LLVM IR (-O0):
define i8* @alloc4() {
%1 = call i8* (...) @alloc5()
ret i8* %1
}

LLVM IR (-O2):
define i8* @alloc4() {
%1 = tail call i8* (...) @alloc5()
ret i8* %1
}