xunge/DecIR huggingface dataset:
/* Variables and functions */
int EOF;
int getchar();
int /*<<< orphan*/ putchar(int);
int main(int argc, char const *argv[]) {
  int c;
  while ((c = getchar()) != EOF)
    putchar(c);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %eax,-0x14(%rbp)
mov    0x2ea1(%rip),%rcx
cmp    (%rcx),%eax
je     115c <main+0x3c>
mov    -0x14(%rbp),%edi
call   1030 <putchar@plt>
jmp    1136 <main+0x16>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <getchar@plt>
mov    0x2eb9(%rip),%rbx
cmp    (%rbx),%eax
je     1152 <main+0x32>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %eax,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
cmp    (%rbx),%eax
jne    1140 <main+0x20>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@EOF = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
br label %7
7: ; preds = %11, %2
%8 = call i32 (...) @getchar()
store i32 %8, i32* %6
%9 = load i32, i32* @EOF
%10 = icmp ne i32 %8, %9
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, i32* %6
%13 = call i32 @putchar(i32 %12)
br label %7
14: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @getchar()
%4 = load i32, i32* @EOF
%5 = icmp eq i32 %3, %4
br i1 %5, label %12, label %6
6: ; preds = %2, %6
%7 = phi i32 [ %9, %6 ], [ %3, %2 ]
%8 = tail call i32 @putchar(i32 %7)
%9 = tail call i32 (...) @getchar()
%10 = load i32, i32* @EOF
%11 = icmp eq i32 %9, %10
br i1 %11, label %12, label %6
12: ; preds = %6, %2
ret i32 0
}
float multiplicacao(float a, float b) { return a * b; }


x86 assembly (clang, -O0):
<multiplicacao>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<multiplicacao>:
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @multiplicacao(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fmul float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @multiplicacao(float %0, float %1) {
%3 = fmul float %0, %1
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, void *);
void function() {
  int stack_var;
  printf("the function's stack_var is at address %p\n", (void *)&stack_var);
}


x86 assembly (clang, -O0):
<function>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rsi
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<function>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1030 <printf@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [43 x i8] c"the function's stack_var is at address %p\0A\00"
define void @function() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), i8* %2)
ret void
}

LLVM IR (-O2):
@.str = [43 x i8] c"the function's stack_var is at address %p\0A\00"
define void @function() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), i8* %2)
ret void
}
float rpm_filter(void *state, float u) {
  const float a = 0.005;
  static float rpm_2, rpm;
  rpm_2 = (1 - a) * rpm_2 + a * u;
  rpm = (1 - a) * rpm + a * rpm_2;
  return rpm;
}


x86 assembly (clang, -O0):
<rpm_filter>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  0xeef(%rip),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  0x2f02(%rip),%xmm0
movss  0xeda(%rip),%xmm1
mulss  -0xc(%rbp),%xmm1
movss  0xec9(%rip),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,0x2edd(%rip)
movss  0x2ed9(%rip),%xmm0
movss  0xead(%rip),%xmm1
mulss  0x2ec5(%rip),%xmm1
movss  0xe99(%rip),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,0x2eb1(%rip)
movss  0x2ea9(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpm_filter>:
movss  0xef8(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xef0(%rip),%xmm2
movss  0x2f08(%rip),%xmm3
mulss  %xmm2,%xmm3
addss  %xmm3,%xmm0
movss  %xmm0,0x2ef8(%rip)
mulss  %xmm1,%xmm0
mulss  0x2ef0(%rip),%xmm2
addss  %xmm2,%xmm0
movss  %xmm0,0x2ee4(%rip)
ret

LLVM IR (-O0):
@rpm_filter.rpm_2 = internal global float 0.000000e+00
@rpm_filter.rpm = internal global float 0.000000e+00
define float @rpm_filter(i8* %0, float %1) {
%3 = alloca i8*
%4 = alloca float
%5 = alloca float
store i8* %0, i8** %3
store float %1, float* %4
store float 0x3F747AE140000000, float* %5
%6 = load float, float* @rpm_filter.rpm_2
%7 = load float, float* %4
%8 = fmul float 0x3F747AE140000000, %7
%9 = call float @llvm.fmuladd.f32(float 0x3FEFD70A40000000, float %6, float %8)
store float %9, float* @rpm_filter.rpm_2
%10 = load float, float* @rpm_filter.rpm
%11 = load float, float* @rpm_filter.rpm_2
%12 = fmul float 0x3F747AE140000000, %11
%13 = call float @llvm.fmuladd.f32(float 0x3FEFD70A40000000, float %10, float %12)
store float %13, float* @rpm_filter.rpm
%14 = load float, float* @rpm_filter.rpm
ret float %14
}

LLVM IR (-O2):
@rpm_filter.rpm_2 = internal unnamed_addr global float 0.000000e+00
@rpm_filter.rpm = internal unnamed_addr global float 0.000000e+00
define float @rpm_filter(i8* nocapture readnone %0, float %1) {
%3 = load float, float* @rpm_filter.rpm_2
%4 = fmul float %1, 0x3F747AE140000000
%5 = tail call float @llvm.fmuladd.f32(float %3, float 0x3FEFD70A40000000, float %4)
store float %5, float* @rpm_filter.rpm_2
%6 = load float, float* @rpm_filter.rpm
%7 = fmul float %5, 0x3F747AE140000000
%8 = tail call float @llvm.fmuladd.f32(float %6, float 0x3FEFD70A40000000, float %7)
store float %8, float* @rpm_filter.rpm
ret float %8
}
int gcd(int a, int b) { return b <= 0 ? a : gcd(b, a % b); }


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jg     1133 <gcd+0x23>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1147 <gcd+0x37>
mov    -0x8(%rbp),%edi
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%esi
call   1030 <gcd@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %edi,%eax
test   %esi,%esi
jle    111d <gcd+0x1d>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jg     1110 <gcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp sle i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = load i32, i32* %3
br label %15
9: ; preds = %2
%10 = load i32, i32* %4
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = srem i32 %11, %12
%14 = call i32 @gcd(i32 %10, i32 %13)
br label %15
15: ; preds = %9, %7
%16 = phi i32 [ %8, %7 ], [ %14, %9 ]
ret i32 %16
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, 1
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = phi i32 [ %5, %4 ], [ %0, %2 ]
%7 = srem i32 %6, %5
%8 = icmp slt i32 %7, 1
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %5, %4 ]
ret i32 %10
}
void vga_off() {
  asm volatile("mov   $0x0003, %%ax\n"
               "int   $0x10\n"
               "mov   $0xA000, %%dx\n"
               "mov   %%dx, %%es\n"
               :
               :
               : "ax", "dx");
}


x86 assembly (clang, -O0):
<vga_off>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%ax
int    $0x10
mov    $0xa000,%dx
mov    %edx,%es
pop    %rbp
ret

x86 assembly (clang, -O2):
<vga_off>:
mov    $0x3,%ax
int    $0x10
mov    $0xa000,%dx
mov    %edx,%es
ret

LLVM IR (-O0):
define void @vga_off() {
ret void
}

LLVM IR (-O2):
define void @vga_off() {
tail call void asm sideeffect "mov $$0x0003, %ax\0Aint $$0x10\0Amov $$0xA000, %dx\0Amov %dx, %es\0A", "~{ax},~{dx},~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __p3dfft_MOD_p3dfft_fftw_rigor(int *);
void p3dfft_fftw_rigor(unsigned rigor) {
  int int_rigor = (int)rigor;
  __p3dfft_MOD_p3dfft_fftw_rigor(&int_rigor);
}


x86 assembly (clang, -O0):
<p3dfft_fftw_rigor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
call   1030 <__p3dfft_MOD_p3dfft_fftw_rigor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<p3dfft_fftw_rigor>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1030 <__p3dfft_MOD_p3dfft_fftw_rigor@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @p3dfft_fftw_rigor(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
%5 = call i32 @__p3dfft_MOD_p3dfft_fftw_rigor(i32* %3)
ret void
}

LLVM IR (-O2):
define void @p3dfft_fftw_rigor(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 %0, i32* %2
%4 = call i32 @__p3dfft_MOD_p3dfft_fftw_rigor(i32* %2)
ret void
}
int iswhite(int a) {
  switch (a) {
  case '\n':
  case '\r':
  case '\t':
  case ' ':
  case '\0':
  case '\f':
  case '\b':
  case 0177:
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<iswhite>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
test   %eax,%eax
je     1164 <iswhite+0x64>
jmp    111a <iswhite+0x1a>
mov    -0xc(%rbp),%eax
add    $0xfffffff8,%eax
sub    $0x3,%eax
jb     1164 <iswhite+0x64>
jmp    112e <iswhite+0x2e>
mov    -0xc(%rbp),%eax
add    $0xfffffff4,%eax
sub    $0x2,%eax
jb     1164 <iswhite+0x64>
jmp    1142 <iswhite+0x42>
mov    -0xc(%rbp),%eax
sub    $0x20,%eax
je     1164 <iswhite+0x64>
jmp    1153 <iswhite+0x53>
mov    -0xc(%rbp),%eax
sub    $0x7f,%eax
jne    1170 <iswhite+0x70>
jmp    1164 <iswhite+0x64>
movl   $0x1,-0x4(%rbp)
jmp    1177 <iswhite+0x77>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iswhite>:
mov    $0x1,%eax
cmp    $0x20,%edi
ja     111d <iswhite+0x1d>
mov    %edi,%ecx
movabs $0x100003701,%rdx
bt     %rcx,%rdx
jae    111d <iswhite+0x1d>
ret
cmp    $0x7f,%edi
je     111c <iswhite+0x1c>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @iswhite(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 10, label %5
i32 13, label %5
i32 9, label %5
i32 32, label %5
i32 0, label %5
i32 12, label %5
i32 8, label %5
i32 127, label %5
]
5: ; preds = %1, %1, %1, %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @iswhite(i32 %0) {
switch i32 %0, label %2 [
i32 10, label %3
i32 13, label %3
i32 9, label %3
i32 32, label %3
i32 0, label %3
i32 12, label %3
i32 8, label %3
i32 127, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %2
%4 = phi i32 [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ hal_exception_panic(char *, int, int, char *);
void reset_hndlr() {
  hal_exception_panic(
      "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
      "2022-01-22/02-19-57/repos/darknightghost/sandnix/refs/heads/master/src/"
      "sandnix/kernel/hal/io/interrupt/arch/arm/armv7/cortex-a9/interrupt.c",
      70, (134), ("Reset."));
  ;
}


x86 assembly (clang, -O0):
<reset_hndlr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x46,%esi
mov    $0x86,%edx
lea    0xfa0(%rip),%rcx
call   1030 <hal_exception_panic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<reset_hndlr>:
lea    0xee9(%rip),%rdi
lea    0xfae(%rip),%rcx
mov    $0x46,%esi
mov    $0x86,%edx
jmp    1030 <hal_exception_panic@plt>

LLVM IR (-O0):
@.str = [204 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/darknightghost/sandnix/refs/heads/master/src/sandnix/kernel/hal/io/interrupt/arch/arm/armv7/cortex-a9/interrupt.c\00"
@.str.1 = [7 x i8] c"Reset.\00"
define void @reset_hndlr() {
%1 = call i32 @hal_exception_panic(i8* getelementptr inbounds ([204 x i8], [204 x i8]* @.str, i64 0, i64 0), i32 70, i32 134, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [204 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/darknightghost/sandnix/refs/heads/master/src/sandnix/kernel/hal/io/interrupt/arch/arm/armv7/cortex-a9/interrupt.c\00"
@.str.1 = [7 x i8] c"Reset.\00"
define void @reset_hndlr() {
%1 = tail call i32 @hal_exception_panic(i8* getelementptr inbounds ([204 x i8], [204 x i8]* @.str, i64 0, i64 0), i32 70, i32 134, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ccc();
void ddd() { ccc(); }


x86 assembly (clang, -O0):
<ddd>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ccc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ddd>:
xor    %eax,%eax
jmp    1030 <ccc@plt>

LLVM IR (-O0):
define void @ddd() {
%1 = call i32 (...) @ccc()
ret void
}

LLVM IR (-O2):
define void @ddd() {
%1 = tail call i32 (...) @ccc()
ret void
}
unsigned xrop3_44_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = D | S;
  stk2 = T & stk3;
  stk1 = S ^ stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_44_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
or     -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_44_1_1>:
mov    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_44_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %5
%24 = load i32, i32* %6
%25 = or i32 %23, %24
store i32 %25, i32* %10
%26 = load i32, i32* %7
%27 = load i32, i32* %10
%28 = and i32 %26, %27
store i32 %28, i32* %9
%29 = load i32, i32* %6
%30 = load i32, i32* %9
%31 = xor i32 %29, %30
store i32 %31, i32* %8
%32 = load i32, i32* %8
%33 = load i32, i32* %6
%34 = xor i32 %33, -1
%35 = and i32 %32, %34
%36 = load i32, i32* %7
%37 = xor i32 %36, -1
%38 = and i32 %35, %37
%39 = load i32, i32* %5
%40 = load i32, i32* %6
%41 = and i32 %39, %40
%42 = or i32 %38, %41
%43 = load i32, i32* %5
%44 = load i32, i32* %7
%45 = and i32 %43, %44
%46 = or i32 %42, %45
ret i32 %46
}

LLVM IR (-O2):
define i32 @xrop3_44_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = or i8 %1, %0
%4 = zext i8 %3 to i32
ret i32 %4
}
/* Variables and functions */
void *xmallocd(size_t, int /*<<< orphan*/ *);
void *xmalloc(size_t s) { return xmallocd(s, NULL); }


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <xmallocd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
xor    %esi,%esi
jmp    1030 <xmallocd@plt>

LLVM IR (-O0):
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @xmallocd(i64 %3, i32* null)
ret i8* %4
}

LLVM IR (-O2):
define i8* @xmalloc(i64 %0) {
%2 = tail call i8* @xmallocd(i64 %0, i32* null)
ret i8* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ nvr_path(int /*<<< orphan*/ *);
int /*<<< orphan*/ *plat_fopen(int /*<<< orphan*/, int /*<<< orphan*/ *);
FILE *nvr_fopen(wchar_t *str, wchar_t *mode) {
  return (plat_fopen(nvr_path(str), mode));
}


x86 assembly (clang, -O0):
<nvr_fopen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <nvr_path@plt>
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
call   1040 <plat_fopen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nvr_fopen>:
push   %rbx
mov    %rsi,%rbx
call   1030 <nvr_path@plt>
mov    %eax,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <plat_fopen@plt>

LLVM IR (-O0):
define i32* @nvr_fopen(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = call i32 @nvr_path(i32* %5)
%7 = load i32*, i32** %4
%8 = call i32* @plat_fopen(i32 %6, i32* %7)
ret i32* %8
}

LLVM IR (-O2):
define i32* @nvr_fopen(i32* %0, i32* %1) {
%3 = tail call i32 @nvr_path(i32* %0)
%4 = tail call i32* @plat_fopen(i32 %3, i32* %1)
ret i32* %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, int);
void lcd_home() {
  printf("%s:%d\n",
         "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
         "2022-01-22/02-19-57/repos/beerriot/blockgame/refs/heads/master/test/"
         "mock/lcd.c",
         31);
}


x86 assembly (clang, -O0):
<lcd_home>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee5(%rip),%rsi
mov    $0x1f,%edx
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcd_home>:
lea    0xee9(%rip),%rdi
lea    0xee9(%rip),%rsi
mov    $0x1f,%edx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"%s:%d\0A\00"
@.str.1 = [143 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/beerriot/blockgame/refs/heads/master/test/mock/lcd.c\00"
define void @lcd_home() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([143 x i8], [143 x i8]* @.str.1, i64 0, i64 0), i32 31)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"%s:%d\0A\00"
@.str.1 = [143 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/beerriot/blockgame/refs/heads/master/test/mock/lcd.c\00"
define void @lcd_home() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([143 x i8], [143 x i8]* @.str.1, i64 0, i64 0), i32 31)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
main() {
  int k = 1, j = 2;
  switch (1) {
  default:
    printf("default\n");
  case 1:
    printf("0\n");
  case 0:
    printf("1\n");
  case 2:
    printf("2\n");
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xede(%rip),%rdi
call   1030 <puts@plt>
lea    0xed4(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"0\0A\00"
@.str.1 = [3 x i8] c"1\0A\00"
@.str.2 = [3 x i8] c"2\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 1, i32* %1
store i32 2, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [2 x i8] c"0\00"
@str.3 = [2 x i8] c"1\00"
@str.4 = [2 x i8] c"2\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str.3, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str.4, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
int main() { usleep(5000000); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4c4b40,%edi
call   1030 <usleep@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4c4b40,%edi
call   1030 <usleep@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @usleep(i32 5000000)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @usleep(i32 5000000)
ret i32 0
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMRAF_set(void) { return U_WMRCORENONE_set("U_WMRAF"); }


x86 assembly (clang, -O0):
<U_WMRAF_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRAF_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMRAF\00"
define i8* @U_WMRAF_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMRAF\00"
define i8* @U_WMRAF_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
void drawGame() {}


x86 assembly (clang, -O0):
<drawGame>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawGame>:
ret

LLVM IR (-O0):
define void @drawGame() {
ret void
}

LLVM IR (-O2):
define void @drawGame() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gen_swap();
int /*<<< orphan*/ gen_udiv();
gen_umod() {
  gen_udiv();
  gen_swap();
}


x86 assembly (clang, -O0):
<gen_umod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <gen_udiv@plt>
mov    $0x0,%al
call   1040 <gen_swap@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_umod>:
push   %rax
xor    %eax,%eax
call   1030 <gen_udiv@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <gen_swap@plt>

LLVM IR (-O0):
define i32 @gen_umod() {
%1 = alloca i32
%2 = call i32 (...) @gen_udiv()
%3 = call i32 (...) @gen_swap()
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @gen_umod() {
%1 = tail call i32 (...) @gen_udiv()
%2 = tail call i32 (...) @gen_swap()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ strchr(char *, char);
char *skipName(char *p) {
  while (!(!!strchr(" \t\n\r", *p)))
    ++p;
  return p;
}


x86 assembly (clang, -O0):
<skipName>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
lea    0xed9(%rip),%rdi
movsbl (%rax),%esi
call   1030 <strchr@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
xor    $0xff,%al
test   $0x1,%al
jne    1148 <skipName+0x38>
jmp    1159 <skipName+0x49>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <skipName+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skipName>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rbx
lea    0xede(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbl 0x1(%rbx),%esi
add    $0x1,%rbx
mov    %r14,%rdi
call   1030 <strchr@plt>
test   %eax,%eax
je     1130 <skipName+0x20>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [5 x i8] c" \09\0A\0D\00"
define i8* @skipName(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %11, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = call i32 @strchr(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8 signext %5)
%7 = icmp ne i32 %6, 0
%8 = xor i1 %7, true
%9 = xor i1 %8, true
%10 = xor i1 %9, true
br i1 %10, label %11, label %14
11: ; preds = %3
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %2
br label %3
14: ; preds = %3
%15 = load i8*, i8** %2
ret i8* %15
}

LLVM IR (-O2):
@.str = [5 x i8] c" \09\0A\0D\00"
define i8* @skipName(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %7, %2 ]
%4 = load i8, i8* %3
%5 = tail call i32 @strchr(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8 signext %4)
%6 = icmp eq i32 %5, 0
%7 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %6, label %2, label %8
8: ; preds = %2
ret i8* %3
}
void pari_err_OVERFLOW() {}


x86 assembly (clang, -O0):
<pari_err_OVERFLOW>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pari_err_OVERFLOW>:
ret

LLVM IR (-O0):
define void @pari_err_OVERFLOW() {
ret void
}

LLVM IR (-O2):
define void @pari_err_OVERFLOW() {
ret void
}
int test_imm_96uint16_reg(unsigned short val) {
  return ((val) & (0x96 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_96uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x96,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_96uint16_reg>:
test   $0x96,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_96uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 150
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_96uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 150
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
unsigned char xor_20(unsigned char val) { return val ^ 0x20; }


x86 assembly (clang, -O0):
<xor_20>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
xor    $0x20,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xor_20>:
mov    %edi,%eax
xor    $0x20,%al
ret

LLVM IR (-O0):
define zeroext i8 @xor_20(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = xor i32 %4, 32
%6 = trunc i32 %5 to i8
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @xor_20(i8 zeroext %0) {
%2 = xor i8 %0, 32
ret i8 %2
}
void undef_hdlr(void) { asm volatile("nop \n"); }


x86 assembly (clang, -O0):
<undef_hdlr>:
push   %rbp
mov    %rsp,%rbp
nop
pop    %rbp
ret

x86 assembly (clang, -O2):
<undef_hdlr>:
nop
ret

LLVM IR (-O0):
define void @undef_hdlr() {
ret void
}

LLVM IR (-O2):
define void @undef_hdlr() {
tail call void asm sideeffect "nop \0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
scalar_t__ malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
const char *make_md_str(const char *s) {
  char *r = (char *)malloc(strlen(s) + 1);
  strcpy(r, s);
  return r;
}


x86 assembly (clang, -O0):
<make_md_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_md_str>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @make_md_str(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i64 @malloc(i64 %6)
%8 = inttoptr i64 %7 to i8*
store i8* %8, i8** %3
%9 = load i8*, i8** %3
%10 = load i8*, i8** %2
%11 = call i32 @strcpy(i8* %9, i8* %10)
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define i8* @make_md_str(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i64 @malloc(i64 %3)
%5 = inttoptr i64 %4 to i8*
%6 = tail call i32 @strcpy(i8* %5, i8* %0)
ret i8* %5
}
int test_imm_C9uint16_mem(unsigned short *val) {
  return ((*val) & (0xC9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C9uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xc9,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C9uint16_mem>:
testb  $0xc9,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C9uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 201
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C9uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 201
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int mixed_volume_by_demics(int *mv) {
  int *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(843, mv, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<mixed_volume_by_demics>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x34b,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mixed_volume_by_demics>:
mov    %rdi,%rsi
mov    $0x34b,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @mixed_volume_by_demics(i32* %0) {
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca i32
%5 = alloca double*
store i32* %0, i32** %2
%6 = load i32*, i32** %2
%7 = load i32*, i32** %3
%8 = load double*, double** %5
%9 = call i32 @_ada_use_c2phc4c(i32 843, i32* %6, i32* %7, double* %8, i32 0)
store i32 %9, i32* %4
%10 = load i32, i32* %4
ret i32 %10
}

LLVM IR (-O2):
define i32 @mixed_volume_by_demics(i32* %0) {
%2 = tail call i32 @_ada_use_c2phc4c(i32 843, i32* %0, i32* undef, double* undef, i32 0)
ret i32 %2
}
/* Variables and functions */
int atoi(char *);
int /*<<< orphan*/ nsieve(int);
int main(int argc, char *argv[]) {
  int m = atoi(argv[1]);
  for (int i = 0; i < 3; i++)
    nsieve(10000 << (m - i));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <atoi@plt>
mov    %eax,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
cmpl   $0x3,-0x18(%rbp)
jge    1177 <main+0x57>
mov    -0x14(%rbp),%ecx
sub    -0x18(%rbp),%ecx
mov    $0x2710,%edi
shl    %cl,%edi
call   1040 <nsieve@plt>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    114d <main+0x2d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    0x8(%rsi),%rdi
call   1030 <atoi@plt>
mov    %eax,%ebx
mov    $0x2710,%ebp
mov    $0x2710,%edi
mov    %ebx,%ecx
shl    %cl,%edi
call   1040 <nsieve@plt>
lea    -0x1(%rbx),%ecx
mov    $0x2710,%edi
shl    %cl,%edi
call   1040 <nsieve@plt>
add    $0xfe,%bl
mov    %ebx,%ecx
shl    %cl,%ebp
mov    %ebp,%edi
call   1040 <nsieve@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = load i8**, i8*** %5
%9 = getelementptr inbounds i8*, i8** %8, i64 1
%10 = load i8*, i8** %9
%11 = call i32 @atoi(i8* %10)
store i32 %11, i32* %6
store i32 0, i32* %7
br label %12
12: ; preds = %21, %2
%13 = load i32, i32* %7
%14 = icmp slt i32 %13, 3
br i1 %14, label %15, label %24
15: ; preds = %12
%16 = load i32, i32* %6
%17 = load i32, i32* %7
%18 = sub nsw i32 %16, %17
%19 = shl i32 10000, %18
%20 = call i32 @nsieve(i32 %19)
br label %21
21: ; preds = %15
%22 = load i32, i32* %7
%23 = add nsw i32 %22, 1
store i32 %23, i32* %7
br label %12
24: ; preds = %12
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @atoi(i8* %4)
%6 = shl i32 10000, %5
%7 = tail call i32 @nsieve(i32 %6)
%8 = add nsw i32 %5, -1
%9 = shl i32 10000, %8
%10 = tail call i32 @nsieve(i32 %9)
%11 = add nsw i32 %5, -2
%12 = shl i32 10000, %11
%13 = tail call i32 @nsieve(i32 %12)
ret i32 0
}
void swap_values(int *arr, int i, int j) {
  int temp = arr[i];
  arr[i] = arr[j];
  arr[j] = temp;
}


x86 assembly (clang, -O0):
<swap_values>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_values>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @swap_values(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
store i32 %12, i32* %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
store i32 %17, i32* %21
%22 = load i32, i32* %7
%23 = load i32*, i32** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
ret void
}

LLVM IR (-O2):
define void @swap_values(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
store i32 %9, i32* %5
store i32 %6, i32* %8
ret void
}
int test_imm_BDuint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0xBD << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_BDuint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0xbd,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_BDuint64_highword_reg>:
movabs $0xbd00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_BDuint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 189
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_BDuint64_highword_reg(i64 %0) {
%2 = and i64 %0, 811748818944
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ ide_board_close(int);
void ide_ter_close(void *priv) { ide_board_close(2); }


x86 assembly (clang, -O0):
<ide_ter_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x2,%edi
call   1030 <ide_board_close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ide_ter_close>:
mov    $0x2,%edi
jmp    1030 <ide_board_close@plt>

LLVM IR (-O0):
define void @ide_ter_close(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @ide_board_close(i32 2)
ret void
}

LLVM IR (-O2):
define void @ide_ter_close(i8* nocapture readnone %0) {
%2 = tail call i32 @ide_board_close(i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ irc_disconnect(char *);
void child_disconnect(char *p) { irc_disconnect(p); }


x86 assembly (clang, -O0):
<child_disconnect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <irc_disconnect@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<child_disconnect>:
jmp    1030 <irc_disconnect@plt>

LLVM IR (-O0):
define void @child_disconnect(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @irc_disconnect(i8* %3)
ret void
}

LLVM IR (-O2):
define void @child_disconnect(i8* %0) {
%2 = tail call i32 @irc_disconnect(i8* %0)
ret void
}
/* Type definitions */
struct WdStack {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ wdPeekAt(struct WdStack *, int);
int /*<<< orphan*/ wdPush(int /*<<< orphan*/, struct WdStack *);
int32_t wdOver(struct WdStack *s) { wdPush(wdPeekAt(s, 2), s); }


x86 assembly (clang, -O0):
<wdOver>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x2,%esi
call   1040 <wdPeekAt@plt>
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
call   1030 <wdPush@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wdOver>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2,%esi
call   1040 <wdPeekAt@plt>
mov    %eax,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <wdPush@plt>

LLVM IR (-O0):
%struct.WdStack = type { i32 }
define i32 @wdOver(%struct.WdStack* %0) {
%2 = alloca i32
%3 = alloca %struct.WdStack*
store %struct.WdStack* %0, %struct.WdStack** %3
%4 = load %struct.WdStack*, %struct.WdStack** %3
%5 = call i32 @wdPeekAt(%struct.WdStack* %4, i32 2)
%6 = load %struct.WdStack*, %struct.WdStack** %3
%7 = call i32 @wdPush(i32 %5, %struct.WdStack* %6)
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
%struct.WdStack = type { i32 }
define i32 @wdOver(%struct.WdStack* %0) {
%2 = tail call i32 @wdPeekAt(%struct.WdStack* %0, i32 2)
%3 = tail call i32 @wdPush(i32 %2, %struct.WdStack* %0)
ret i32 undef
}
void rop3_111_0_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = *D ^ S;
  stk2 = ~stk2;
  stk1 = T & stk2;
  stk1 = ~stk1;
  *D = (stk1 & S) | (stk1 & (~T)) | (T & (~S) & *D);
}


x86 assembly (clang, -O0):
<rop3_111_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
movzbl -0xb(%rbp),%ecx
movzbl -0xa(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
movzbl -0xa(%rbp),%ecx
movzbl -0x9(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
mov    -0x8(%rbp),%rdx
movzbl (%rdx),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_111_0_1>:
mov    (%rdi),%al
mov    %eax,%ecx
not    %cl
and    %sil,%cl
not    %sil
and    %dl,%sil
not    %dl
and    %al,%sil
or     %dl,%sil
or     %cl,%sil
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_111_0_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = xor i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %8
%16 = load i8, i8* %8
%17 = zext i8 %16 to i32
%18 = xor i32 %17, -1
%19 = trunc i32 %18 to i8
store i8 %19, i8* %8
%20 = load i8, i8* %6
%21 = zext i8 %20 to i32
%22 = load i8, i8* %8
%23 = zext i8 %22 to i32
%24 = and i32 %21, %23
%25 = trunc i32 %24 to i8
store i8 %25, i8* %7
%26 = load i8, i8* %7
%27 = zext i8 %26 to i32
%28 = xor i32 %27, -1
%29 = trunc i32 %28 to i8
store i8 %29, i8* %7
%30 = load i8, i8* %7
%31 = zext i8 %30 to i32
%32 = load i8, i8* %5
%33 = zext i8 %32 to i32
%34 = and i32 %31, %33
%35 = load i8, i8* %7
%36 = zext i8 %35 to i32
%37 = load i8, i8* %6
%38 = zext i8 %37 to i32
%39 = xor i32 %38, -1
%40 = and i32 %36, %39
%41 = or i32 %34, %40
%42 = load i8, i8* %6
%43 = zext i8 %42 to i32
%44 = load i8, i8* %5
%45 = zext i8 %44 to i32
%46 = xor i32 %45, -1
%47 = and i32 %43, %46
%48 = load i8*, i8** %4
%49 = load i8, i8* %48
%50 = zext i8 %49 to i32
%51 = and i32 %47, %50
%52 = or i32 %41, %51
%53 = trunc i32 %52 to i8
%54 = load i8*, i8** %4
store i8 %53, i8* %54
ret void
}

LLVM IR (-O2):
define void @rop3_111_0_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %2, -1
%6 = xor i8 %4, -1
%7 = and i8 %6, %1
%8 = or i8 %7, %5
%9 = xor i8 %1, -1
%10 = and i8 %9, %2
%11 = and i8 %10, %4
%12 = or i8 %8, %11
store i8 %12, i8* %0
ret void
}
/* Variables and functions */
int checker_read_unsigned_long_long(int /*<<< orphan*/, char const *, int,
                                    unsigned long long *);
int checker_read_in_unsigned_long_long(const char *name, int eof_error_flag,
                                       unsigned long long *p_val) {
  return checker_read_unsigned_long_long(0, name, eof_error_flag, p_val);
}


x86 assembly (clang, -O0):
<checker_read_in_unsigned_long_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
xor    %edi,%edi
call   1030 <checker_read_unsigned_long_long@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<checker_read_in_unsigned_long_long>:
mov    %rdx,%rcx
mov    %esi,%edx
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <checker_read_unsigned_long_long@plt>

LLVM IR (-O0):
define i32 @checker_read_in_unsigned_long_long(i8* %0, i32 %1, i64* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i64* %2, i64** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i64*, i64** %6
%10 = call i32 @checker_read_unsigned_long_long(i32 0, i8* %7, i32 %8, i64* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @checker_read_in_unsigned_long_long(i8* %0, i32 %1, i64* %2) {
%4 = tail call i32 @checker_read_unsigned_long_long(i32 0, i8* %0, i32 %1, i64* %2)
ret i32 %4
}
/* Type definitions */
struct addrinfo {
  struct addrinfo *ai_next;
};

/* Variables and functions */
int count_addrs(struct addrinfo *ais) {
  int num = 0;
  for (struct addrinfo *ai = ais; ai; ai = ai->ai_next)
    num++;
  return num;
}


x86 assembly (clang, -O0):
<count_addrs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     113b <count_addrs+0x3b>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
jmp    1117 <count_addrs+0x17>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_addrs>:
xor    %eax,%eax
test   %rdi,%rdi
je     111b <count_addrs+0x1b>
nopw   0x0(%rax,%rax,1)
add    $0x1,%eax
mov    (%rdi),%rdi
test   %rdi,%rdi
jne    1110 <count_addrs+0x10>
ret

LLVM IR (-O0):
%struct.addrinfo = type { %struct.addrinfo* }
define i32 @count_addrs(%struct.addrinfo* %0) {
%2 = alloca %struct.addrinfo*
%3 = alloca i32
%4 = alloca %struct.addrinfo*
store %struct.addrinfo* %0, %struct.addrinfo** %2
store i32 0, i32* %3
%5 = load %struct.addrinfo*, %struct.addrinfo** %2
store %struct.addrinfo* %5, %struct.addrinfo** %4
br label %6
6: ; preds = %12, %1
%7 = load %struct.addrinfo*, %struct.addrinfo** %4
%8 = icmp ne %struct.addrinfo* %7, null
br i1 %8, label %9, label %16
9: ; preds = %6
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %12
12: ; preds = %9
%13 = load %struct.addrinfo*, %struct.addrinfo** %4
%14 = getelementptr inbounds %struct.addrinfo, %struct.addrinfo* %13, i32 0, i32 0
%15 = load %struct.addrinfo*, %struct.addrinfo** %14
store %struct.addrinfo* %15, %struct.addrinfo** %4
br label %6
16: ; preds = %6
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
%struct.addrinfo = type { %struct.addrinfo* }
define i32 @count_addrs(%struct.addrinfo* %0) {
%2 = icmp eq %struct.addrinfo* %0, null
br i1 %2, label %3, label %5
3: ; preds = %5, %1
%4 = phi i32 [ 0, %1 ], [ %8, %5 ]
ret i32 %4
5: ; preds = %1, %5
%6 = phi %struct.addrinfo* [ %10, %5 ], [ %0, %1 ]
%7 = phi i32 [ %8, %5 ], [ 0, %1 ]
%8 = add nuw nsw i32 %7, 1
%9 = getelementptr inbounds %struct.addrinfo, %struct.addrinfo* %6, i64 0, i32 0
%10 = load %struct.addrinfo*, %struct.addrinfo** %9
%11 = icmp eq %struct.addrinfo* %10, null
br i1 %11, label %3, label %5
}
void sysc_init(struct pci_access *a) {}


x86 assembly (clang, -O0):
<sysc_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sysc_init>:
ret

LLVM IR (-O0):
%struct.pci_access = type opaque
define void @sysc_init(%struct.pci_access* %0) {
%2 = alloca %struct.pci_access*
store %struct.pci_access* %0, %struct.pci_access** %2
ret void
}

LLVM IR (-O2):
%struct.pci_access = type opaque
define void @sysc_init(%struct.pci_access* nocapture %0) {
ret void
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
uint16_t read_register(int n) { return ((n % 2) == 0) ? 0xffff : 0x5555; }


x86 assembly (clang, -O0):
<read_register>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    $0x5555,%eax
mov    $0xffff,%ecx
cmp    $0x0,%edx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_register>:
test   $0x1,%dil
mov    $0xffff,%ecx
mov    $0x5555,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @read_register(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 2
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 65535, i32 21845
ret i32 %7
}

LLVM IR (-O2):
define i32 @read_register(i32 %0) {
%2 = and i32 %0, 1
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 65535, i32 21845
ret i32 %4
}