xunge/DecIR huggingface dataset:
sendbrk() {}


x86 assembly (clang, -O0):
<sendbrk>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sendbrk>:
ret

LLVM IR (-O0):
define i32 @sendbrk() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @sendbrk() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ clear_io_bit(int, int);
void TOSH_MAKE_RADIO_FIFOP_INPUT() { clear_io_bit(-3, 3); }


x86 assembly (clang, -O0):
<TOSH_MAKE_RADIO_FIFOP_INPUT>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffffffd,%edi
mov    $0x3,%esi
call   1030 <clear_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_MAKE_RADIO_FIFOP_INPUT>:
mov    $0xfffffffd,%edi
mov    $0x3,%esi
jmp    1030 <clear_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_MAKE_RADIO_FIFOP_INPUT() {
%1 = call i32 @clear_io_bit(i32 -3, i32 3)
ret void
}

LLVM IR (-O2):
define void @TOSH_MAKE_RADIO_FIFOP_INPUT() {
%1 = tail call i32 @clear_io_bit(i32 -3, i32 3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ add_event_all(int, int /*<<< orphan*/ *);
void tags_change() { add_event_all(0x0e, NULL); }


x86 assembly (clang, -O0):
<tags_change>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <add_event_all@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tags_change>:
mov    $0xe,%edi
xor    %esi,%esi
jmp    1030 <add_event_all@plt>

LLVM IR (-O0):
define void @tags_change() {
%1 = call i32 @add_event_all(i32 14, i32* null)
ret void
}

LLVM IR (-O2):
define void @tags_change() {
%1 = tail call i32 @add_event_all(i32 14, i32* null)
ret void
}
int reverser(int number) {
  int reverse = 0;
  while (number) {
    reverse = reverse * 10 + (number % 10);
    number /= 10;
  }
  return reverse;
}


x86 assembly (clang, -O0):
<reverser>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1145 <reverser+0x45>
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0xc(%rbp),%eax
add    %edx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    110e <reverser+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverser>:
xor    %eax,%eax
test   %edi,%edi
je     113f <reverser+0x3f>
cs nopw 0x0(%rax,%rax,1)
lea    (%rax,%rax,4),%eax
movslq %edi,%rcx
imul   $0x66666667,%rcx,%rdi
mov    %rdi,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rdi
add    %edx,%edi
lea    (%rdi,%rdi,1),%edx
lea    (%rdx,%rdx,4),%edx
mov    %ecx,%esi
sub    %edx,%esi
lea    (%rsi,%rax,2),%eax
add    $0x9,%ecx
cmp    $0x12,%ecx
ja     1110 <reverser+0x10>
ret

LLVM IR (-O0):
define i32 @reverser(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32, i32* %3
%9 = mul nsw i32 %8, 10
%10 = load i32, i32* %2
%11 = srem i32 %10, 10
%12 = add nsw i32 %9, %11
store i32 %12, i32* %3
%13 = load i32, i32* %2
%14 = sdiv i32 %13, 10
store i32 %14, i32* %2
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @reverser(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %12, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ 0, %1 ]
%5 = phi i32 [ %9, %3 ], [ %0, %1 ]
%6 = mul nsw i32 %4, 10
%7 = srem i32 %5, 10
%8 = add nsw i32 %6, %7
%9 = sdiv i32 %5, 10
%10 = add i32 %5, 9
%11 = icmp ult i32 %10, 19
br i1 %11, label %12, label %3
12: ; preds = %3, %1
%13 = phi i32 [ 0, %1 ], [ %8, %3 ]
ret i32 %13
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int x, y, z;
  x = __VERIFIER_nondet_int();
  y = __VERIFIER_nondet_int();
  z = __VERIFIER_nondet_int();
  while (x >= 0 && x + y >= 0) {
    x = x + y + z;
    y = -z - 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x10(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0x11(%rbp)
jl     115b <main+0x4b>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
cmp    $0x0,%eax
setge  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    116b <main+0x5b>
jmp    1187 <main+0x77>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
sub    -0x10(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    113d <main+0x2d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %5, i32* %2
%6 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %6, i32* %3
%7 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %7, i32* %4
br label %8
8: ; preds = %18, %0
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 0
br i1 %10, label %11, label %16
11: ; preds = %8
%12 = load i32, i32* %2
%13 = load i32, i32* %3
%14 = add nsw i32 %12, %13
%15 = icmp sge i32 %14, 0
br label %16
16: ; preds = %11, %8
%17 = phi i1 [ false, %8 ], [ %15, %11 ]
br i1 %17, label %18, label %27
18: ; preds = %16
%19 = load i32, i32* %2
%20 = load i32, i32* %3
%21 = add nsw i32 %19, %20
%22 = load i32, i32* %4
%23 = add nsw i32 %21, %22
store i32 %23, i32* %2
%24 = load i32, i32* %4
%25 = sub nsw i32 0, %24
%26 = sub nsw i32 %25, 1
store i32 %26, i32* %3
br label %8
27: ; preds = %16
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 (...) @__VERIFIER_nondet_int()
%3 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}
void w65816_close(void) {}


x86 assembly (clang, -O0):
<w65816_close>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<w65816_close>:
ret

LLVM IR (-O0):
define void @w65816_close() {
ret void
}

LLVM IR (-O2):
define void @w65816_close() {
ret void
}
int test4(unsigned n, char (*p)[n][n + 1][6]) {
  __typeof(p) p2 = (p + n / 2) - n / 4;
  return p2 - p;
}


x86 assembly (clang, -O0):
<test4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,%eax
mov    %eax,%edx
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%esi
shr    $0x1,%esi
mov    %esi,%esi
mov    %rcx,%rdi
imul   %rdx,%rdi
imul   %rdi,%rsi
imul   $0x6,%rsi,%rsi
add    %rsi,%rax
mov    -0x4(%rbp),%esi
shr    $0x2,%esi
mov    %esi,%esi
mov    %esi,%edi
xor    %esi,%esi
sub    %rdi,%rsi
mov    %rcx,%rdi
imul   %rdx,%rdi
imul   %rdi,%rsi
imul   $0x6,%rsi,%rsi
add    %rsi,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rsi
sub    %rsi,%rax
imul   %rdx,%rcx
imul   $0x6,%rcx,%rcx
cqto
idiv   %rcx
pop    %rbp
ret

x86 assembly (clang, -O2):
<test4>:
mov    %edi,%eax
lea    0x1(%rdi),%ecx
imul   %rax,%rcx
mov    %edi,%eax
shr    %eax
imul   %rcx,%rax
lea    (%rax,%rax,2),%rax
lea    (%rsi,%rax,2),%rax
shr    $0x2,%edi
imul   %rcx,%rdi
neg    %rdi
lea    (%rdi,%rdi,2),%rdx
lea    (%rax,%rdx,2),%rax
sub    %rsi,%rax
add    %rcx,%rcx
lea    (%rcx,%rcx,2),%rcx
mov    %rax,%rdx
or     %rcx,%rdx
shr    $0x20,%rdx
je     1147 <test4+0x47>
cqto
idiv   %rcx
ret
xor    %edx,%edx
div    %ecx
ret

LLVM IR (-O0):
define i32 @test4(i32 %0, [6 x i8]* %1) {
%3 = alloca i32
%4 = alloca [6 x i8]*
%5 = alloca [6 x i8]*
store i32 %0, i32* %3
store [6 x i8]* %1, [6 x i8]** %4
%6 = load i32, i32* %3
%7 = zext i32 %6 to i64
%8 = load i32, i32* %3
%9 = add i32 %8, 1
%10 = zext i32 %9 to i64
%11 = load [6 x i8]*, [6 x i8]** %4
%12 = load i32, i32* %3
%13 = udiv i32 %12, 2
%14 = zext i32 %13 to i64
%15 = mul nuw i64 %7, %10
%16 = mul nsw i64 %14, %15
%17 = getelementptr inbounds [6 x i8], [6 x i8]* %11, i64 %16
%18 = load i32, i32* %3
%19 = udiv i32 %18, 4
%20 = zext i32 %19 to i64
%21 = sub i64 0, %20
%22 = mul nuw i64 %7, %10
%23 = mul nsw i64 %21, %22
%24 = getelementptr inbounds [6 x i8], [6 x i8]* %17, i64 %23
store [6 x i8]* %24, [6 x i8]** %5
%25 = load [6 x i8]*, [6 x i8]** %5
%26 = load [6 x i8]*, [6 x i8]** %4
%27 = ptrtoint [6 x i8]* %25 to i64
%28 = ptrtoint [6 x i8]* %26 to i64
%29 = sub i64 %27, %28
%30 = mul nuw i64 %7, %10
%31 = mul nuw i64 6, %30
%32 = sdiv exact i64 %29, %31
%33 = trunc i64 %32 to i32
ret i32 %33
}

LLVM IR (-O2):
define i32 @test4(i32 %0, [6 x i8]* %1) {
%3 = zext i32 %0 to i64
%4 = add i32 %0, 1
%5 = zext i32 %4 to i64
%6 = lshr i32 %0, 1
%7 = zext i32 %6 to i64
%8 = mul nuw i64 %5, %3
%9 = mul nsw i64 %8, %7
%10 = getelementptr inbounds [6 x i8], [6 x i8]* %1, i64 %9
%11 = lshr i32 %0, 2
%12 = zext i32 %11 to i64
%13 = mul i64 %8, %12
%14 = sub i64 0, %13
%15 = getelementptr inbounds [6 x i8], [6 x i8]* %10, i64 %14
%16 = ptrtoint [6 x i8]* %15 to i64
%17 = ptrtoint [6 x i8]* %1 to i64
%18 = sub i64 %16, %17
%19 = mul nuw i64 %8, 6
%20 = sdiv exact i64 %18, %19
%21 = trunc i64 %20 to i32
ret i32 %21
}
/* Variables and functions */
int /*<<< orphan*/ error(int);
int /*<<< orphan*/ fixed();
int /*<<< orphan*/ printf(char *, int);
int main() {
  int err = 0;
  int version = 2;
  error(err);
  printf("This is version "
         "%d",
         version);
  fixed();
  error(version);
  return err;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1050 <error@plt>
mov    -0xc(%rbp),%esi
lea    0xea1(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <fixed@plt>
mov    -0xc(%rbp),%edi
call   1050 <error@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1050 <error@plt>
lea    0xec1(%rip),%rdi
mov    $0x2,%esi
call   1040 <printf@plt>
xor    %eax,%eax
call   1030 <fixed@plt>
mov    $0x2,%edi
call   1050 <error@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"This is version %d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 2, i32* %3
%4 = load i32, i32* %2
%5 = call i32 @error(i32 %4)
%6 = load i32, i32* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = call i32 (...) @fixed()
%9 = load i32, i32* %3
%10 = call i32 @error(i32 %9)
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@.str = [19 x i8] c"This is version %d\00"
define i32 @main() {
%1 = tail call i32 @error(i32 0)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 2)
%3 = tail call i32 (...) @fixed()
%4 = tail call i32 @error(i32 2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int myVariable;
  myVariable = 15;
  printf("The value is %d \n", myVariable);
  myVariable = 20;
  printf("The value is %d \n", myVariable);
  int booleanVal;
  booleanVal = 1;
  printf("This variable is true: %d \n", booleanVal);
  booleanVal = 0;
  printf("This variable is false: %d \n", booleanVal);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xf,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xed0(%rip),%rdi
call   1030 <printf@plt>
movl   $0x14,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0xf,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x14,%esi
call   1030 <printf@plt>
lea    0xed9(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
lea    0xee4(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"The value is %d \0A\00"
@.str.1 = [28 x i8] c"This variable is true: %d \0A\00"
@.str.2 = [29 x i8] c"This variable is false: %d \0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 15, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %4)
store i32 20, i32* %2
%6 = load i32, i32* %2
%7 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %6)
store i32 1, i32* %3
%8 = load i32, i32* %3
%9 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i64 0, i64 0), i32 %8)
store i32 0, i32* %3
%10 = load i32, i32* %3
%11 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.2, i64 0, i64 0), i32 %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [18 x i8] c"The value is %d \0A\00"
@.str.1 = [28 x i8] c"This variable is true: %d \0A\00"
@.str.2 = [29 x i8] c"This variable is false: %d \0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 15)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 20)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i64 0, i64 0), i32 1)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.2, i64 0, i64 0), i32 0)
ret i32 0
}
/* Variables and functions */
int fputc(int, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
int fk_x_putchar(int c) { return (fputc(c, stdout)); }


x86 assembly (clang, -O0):
<fk_x_putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
call   1030 <fputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fk_x_putchar>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <fputc@plt>

LLVM IR (-O0):
@stdout = global i32 0
define i32 @fk_x_putchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @stdout
%5 = call i32 @fputc(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@stdout = global i32 0
define i32 @fk_x_putchar(i32 %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @fputc(i32 %0, i32 %2)
ret i32 %3
}
int plugin_call(const struct plugin_list *pl, const int type,
                const struct argv *av, struct plugin_return *pr,
                struct env_set *es) {
  return 0;
}


x86 assembly (clang, -O0):
<plugin_call>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<plugin_call>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.plugin_list = type opaque
%struct.argv = type opaque
%struct.plugin_return = type opaque
%struct.env_set = type opaque
define i32 @plugin_call(%struct.plugin_list* %0, i32 %1, %struct.argv* %2, %struct.plugin_return* %3, %struct.env_set* %4) {
%6 = alloca %struct.plugin_list*
%7 = alloca i32
%8 = alloca %struct.argv*
%9 = alloca %struct.plugin_return*
%10 = alloca %struct.env_set*
store %struct.plugin_list* %0, %struct.plugin_list** %6
store i32 %1, i32* %7
store %struct.argv* %2, %struct.argv** %8
store %struct.plugin_return* %3, %struct.plugin_return** %9
store %struct.env_set* %4, %struct.env_set** %10
ret i32 0
}

LLVM IR (-O2):
%struct.plugin_list = type opaque
%struct.argv = type opaque
%struct.plugin_return = type opaque
%struct.env_set = type opaque
define i32 @plugin_call(%struct.plugin_list* nocapture readnone %0, i32 %1, %struct.argv* nocapture readnone %2, %struct.plugin_return* nocapture readnone %3, %struct.env_set* nocapture readnone %4) {
ret i32 0
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int rotl64(int, int);
int rotr64(int, int);
int shiftl64(int, int);
int shiftr64(int, int);
uint64_t bmw_large_s1(uint64_t x) {
  uint64_t r;
  r = shiftr64(x, 1) ^ shiftl64(x, 2) ^ rotl64(x, 13) ^ rotr64(x, 64 - 43);
  return r;
}


x86 assembly (clang, -O0):
<bmw_large_s1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1060 <shiftr64@plt>
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x2,%esi
call   1040 <shiftl64@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
xor    %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xd,%esi
call   1030 <rotl64@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
xor    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x15,%esi
call   1050 <rotr64@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
xor    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bmw_large_s1>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%ebx
mov    $0x1,%esi
call   1060 <shiftr64@plt>
mov    %eax,%r14d
mov    %ebx,%edi
mov    $0x2,%esi
call   1040 <shiftl64@plt>
mov    %eax,%ebp
xor    %r14d,%ebp
mov    %ebx,%edi
mov    $0xd,%esi
call   1030 <rotl64@plt>
mov    %eax,%r14d
mov    %ebx,%edi
mov    $0x15,%esi
call   1050 <rotr64@plt>
xor    %r14d,%eax
xor    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @bmw_large_s1(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @shiftr64(i32 %4, i32 1)
%6 = load i32, i32* %2
%7 = call i32 @shiftl64(i32 %6, i32 2)
%8 = xor i32 %5, %7
%9 = load i32, i32* %2
%10 = call i32 @rotl64(i32 %9, i32 13)
%11 = xor i32 %8, %10
%12 = load i32, i32* %2
%13 = call i32 @rotr64(i32 %12, i32 21)
%14 = xor i32 %11, %13
store i32 %14, i32* %3
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @bmw_large_s1(i32 %0) {
%2 = tail call i32 @shiftr64(i32 %0, i32 1)
%3 = tail call i32 @shiftl64(i32 %0, i32 2)
%4 = xor i32 %3, %2
%5 = tail call i32 @rotl64(i32 %0, i32 13)
%6 = xor i32 %4, %5
%7 = tail call i32 @rotr64(i32 %0, i32 21)
%8 = xor i32 %6, %7
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ delay_ms(int);
int /*<<< orphan*/ printf(char *);
void check_stdout_buf_size() {
  while (1) {
    printf("a");
    delay_ms(1);
  }
}


x86 assembly (clang, -O0):
<check_stdout_buf_size>:
push   %rbp
mov    %rsp,%rbp
jmp    1129 <check_stdout_buf_size+0x9>
lea    0xed0(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <delay_ms@plt>
jmp    1129 <check_stdout_buf_size+0x9>

x86 assembly (clang, -O2):
<check_stdout_buf_size>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x61,%edi
call   1030 <putchar@plt>
mov    $0x1,%edi
call   1040 <delay_ms@plt>
jmp    1130 <check_stdout_buf_size+0x10>

LLVM IR (-O0):
@.str = [2 x i8] c"a\00"
define void @check_stdout_buf_size() {
br label %1
1: ; preds = %0, %1
%2 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @delay_ms(i32 1)
br label %1
}

LLVM IR (-O2):
define void @check_stdout_buf_size() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 @putchar(i32 97)
%3 = tail call i32 @delay_ms(i32 1)
br label %1
}
void terminit() {}


x86 assembly (clang, -O0):
<terminit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<terminit>:
ret

LLVM IR (-O0):
define void @terminit() {
ret void
}

LLVM IR (-O2):
define void @terminit() {
ret void
}
int DisplaySessions() { return (0); }


x86 assembly (clang, -O0):
<DisplaySessions>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DisplaySessions>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @DisplaySessions() {
ret i32 0
}

LLVM IR (-O2):
define i32 @DisplaySessions() {
ret i32 0
}
void SSL_accept(void) {}


x86 assembly (clang, -O0):
<SSL_accept>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSL_accept>:
ret

LLVM IR (-O0):
define void @SSL_accept() {
ret void
}

LLVM IR (-O2):
define void @SSL_accept() {
ret void
}
int setuid(u) { return (0); }


x86 assembly (clang, -O0):
<setuid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setuid>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @setuid(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @setuid(i32 %0) {
ret i32 0
}
/* Variables and functions */
int __raw_readb(int);
int is_max197_installed(void) { return !!(__raw_readb(0xfebfe000) & 0x01); }


x86 assembly (clang, -O0):
<is_max197_installed>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfebfe000,%edi
call   1030 <__raw_readb@plt>
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_max197_installed>:
push   %rax
mov    $0xfebfe000,%edi
call   1030 <__raw_readb@plt>
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @is_max197_installed() {
%1 = call i32 @__raw_readb(i32 -20979712)
%2 = and i32 %1, 1
%3 = icmp ne i32 %2, 0
%4 = xor i1 %3, true
%5 = xor i1 %4, true
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @is_max197_installed() {
%1 = tail call i32 @__raw_readb(i32 -20979712)
%2 = and i32 %1, 1
ret i32 %2
}
void RTCIntEnable(unsigned long ulIntType) {

  ;
  (*((volatile unsigned long *)(0x40002800 + 0x00000000))) |= ulIntType;
}


x86 assembly (clang, -O0):
<RTCIntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x40002800,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0x40002800,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTCIntEnable>:
or     %rdi,0x40002800
40
ret

LLVM IR (-O0):
define void @RTCIntEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 1073752064 to i64*)
%5 = or i64 %4, %3
store volatile i64 %5, i64* inttoptr (i64 1073752064 to i64*)
ret void
}

LLVM IR (-O2):
define void @RTCIntEnable(i64 %0) {
%2 = load volatile i64, i64* inttoptr (i64 1073752064 to i64*)
%3 = or i64 %2, %0
store volatile i64 %3, i64* inttoptr (i64 1073752064 to i64*)
ret void
}
int test_imm_89uint32_reg(unsigned int val) {
  return ((val) & (0x89 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_89uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x89,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_89uint32_reg>:
test   $0x89,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_89uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 137
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_89uint32_reg(i32 %0) {
%2 = and i32 %0, 137
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int test_imm_D5uint16_reg(unsigned short val) {
  return ((val) & (0xD5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D5uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xd5,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D5uint16_reg>:
test   $0xd5,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D5uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 213
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D5uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 213
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void prune_minmax2_Ok(unsigned int x, unsigned int y) {
  if (x > y) {
    unsigned int z = x - y;
  }
}


x86 assembly (clang, -O0):
<prune_minmax2_Ok>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jbe    111f <prune_minmax2_Ok+0x1f>
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<prune_minmax2_Ok>:
ret

LLVM IR (-O0):
define void @prune_minmax2_Ok(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = icmp ugt i32 %6, %7
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = sub i32 %10, %11
store i32 %12, i32* %5
br label %13
13: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
define void @prune_minmax2_Ok(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_gpl(void) {
  printf(
      "CCEAP protocol implementation. Copyright (C) 2016-2019 Steffen "
      "Wendzel.\n"
      "This program comes with ABSOLUTELY NO WARRANTY; for details see "
      "LICENSE file.\n"
      "This is free software, and you are welcome to redistribute it "
      "under certain conditions;\nfor details see LICENSE file.\n\n"
      "Hint: cite this tool/paper as:\n"
      "S. Wendzel, W. Mazurczyk: An Educational Network Protocol for\n"
      "Covert Channel Analysis Using Patterns, in Proc. ACM Conference on\n"
      "Computer and Communications Security (CCS), pp. 1739-1741, 2016.\n\n"
      "Hint: use ./server -q to prevent CCEAP from showing this message.\n\n");
}


x86 assembly (clang, -O0):
<print_gpl>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_gpl>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [563 x i8] c"CCEAP protocol implementation. Copyright (C) 2016-2019 Steffen Wendzel.\0AThis program comes with ABSOLUTELY NO WARRANTY; for details see LICENSE file.\0AThis is free software, and you are welcome to redistribute it under certain conditions;\0Afor details see LICENSE file.\0A\0AHint: cite this tool/paper as:\0AS. Wendzel, W. Mazurczyk: An Educational Network Protocol for\0ACovert Channel Analysis Using Patterns, in Proc. ACM Conference on\0AComputer and Communications Security (CCS), pp. 1739-1741, 2016.\0A\0AHint: use ./server -q to prevent CCEAP from showing this message.\0A\0A\00"
define void @print_gpl() {
%1 = call i32 @printf(i8* getelementptr inbounds ([563 x i8], [563 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [562 x i8] c"CCEAP protocol implementation. Copyright (C) 2016-2019 Steffen Wendzel.\0AThis program comes with ABSOLUTELY NO WARRANTY; for details see LICENSE file.\0AThis is free software, and you are welcome to redistribute it under certain conditions;\0Afor details see LICENSE file.\0A\0AHint: cite this tool/paper as:\0AS. Wendzel, W. Mazurczyk: An Educational Network Protocol for\0ACovert Channel Analysis Using Patterns, in Proc. ACM Conference on\0AComputer and Communications Security (CCS), pp. 1739-1741, 2016.\0A\0AHint: use ./server -q to prevent CCEAP from showing this message.\0A\00"
define void @print_gpl() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([562 x i8], [562 x i8]* @str, i64 0, i64 0))
ret void
}
int loce(int pos, int col, int arr[][4], int i) {
  while (arr[i][col] <= pos)
    i++;
  return i;
}


x86 assembly (clang, -O0):
<loce>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
shl    $0x4,%rcx
add    %rcx,%rax
movslq -0x8(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x4(%rbp),%eax
jg     113e <loce+0x3e>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1111 <loce+0x11>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<loce>:
movslq %esi,%rsi
movslq %ecx,%rcx
lea    -0x1(%rcx),%eax
shl    $0x4,%rcx
add    %rdx,%rcx
lea    (%rcx,%rsi,4),%rcx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
add    $0x1,%eax
lea    0x10(%rcx),%rdx
cmp    %edi,(%rcx)
mov    %rdx,%rcx
jle    1120 <loce+0x20>
ret

LLVM IR (-O0):
define i32 @loce(i32 %0, i32 %1, [4 x i32]* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca [4 x i32]*
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store [4 x i32]* %2, [4 x i32]** %7
store i32 %3, i32* %8
br label %9
9: ; preds = %20, %4
%10 = load [4 x i32]*, [4 x i32]** %7
%11 = load i32, i32* %8
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds [4 x i32], [4 x i32]* %10, i64 %12
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds [4 x i32], [4 x i32]* %13, i64 0, i64 %15
%17 = load i32, i32* %16
%18 = load i32, i32* %5
%19 = icmp sle i32 %17, %18
br i1 %19, label %20, label %23
20: ; preds = %9
%21 = load i32, i32* %8
%22 = add nsw i32 %21, 1
store i32 %22, i32* %8
br label %9
23: ; preds = %9
%24 = load i32, i32* %8
ret i32 %24
}

LLVM IR (-O2):
define i32 @loce(i32 %0, i32 %1, [4 x i32]* nocapture %2, i32 %3) {
%5 = sext i32 %1 to i64
%6 = sext i32 %3 to i64
br label %7
7: ; preds = %7, %4
%8 = phi i64 [ %12, %7 ], [ %6, %4 ]
%9 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 %8, i64 %5
%10 = load i32, i32* %9
%11 = icmp sgt i32 %10, %0
%12 = add i64 %8, 1
br i1 %11, label %13, label %7
13: ; preds = %7
%14 = trunc i64 %8 to i32
ret i32 %14
}
/* Variables and functions */
scalar_t__ errno;
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ stderr;
void _warn_if(int condition, char *message) {
  if (!condition)
    return;
  if (errno)
    perror(message);
  else {
    fputs(message, stderr);
    fputs("\n", stderr);
  }
}


x86 assembly (clang, -O0):
<_warn_if>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    113e <_warn_if+0x1e>
jmp    1184 <_warn_if+0x64>
mov    0x2e93(%rip),%rax
cmpq   $0x0,(%rax)
je     115d <_warn_if+0x3d>
mov    -0x10(%rbp),%rdi
call   1040 <perror@plt>
jmp    1184 <_warn_if+0x64>
mov    -0x10(%rbp),%rdi
mov    0x2e78(%rip),%rax
mov    (%rax),%esi
call   1030 <fputs@plt>
mov    0x2e6a(%rip),%rax
mov    (%rax),%esi
lea    0xe81(%rip),%rdi
call   1030 <fputs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_warn_if>:
push   %rbx
test   %edi,%edi
je     1154 <_warn_if+0x34>
mov    0x2eac(%rip),%rax
cmpq   $0x0,(%rax)
jne    1156 <_warn_if+0x36>
mov    0x2ea7(%rip),%rbx
mov    (%rbx),%eax
mov    %rsi,%rdi
mov    %eax,%esi
call   1030 <fputs@plt>
mov    (%rbx),%esi
lea    0xeb2(%rip),%rdi
pop    %rbx
jmp    1030 <fputs@plt>
pop    %rbx
ret
mov    %rsi,%rdi
pop    %rbx
jmp    1040 <perror@plt>

LLVM IR (-O0):
@errno = global i64 0
@stderr = global i32 0
@.str = [2 x i8] c"\0A\00"
define void @_warn_if(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %2
br label %20
8: ; preds = %2
%9 = load i64, i64* @errno
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i8*, i8** %4
%13 = call i32 @perror(i8* %12)
br label %20
14: ; preds = %8
%15 = load i8*, i8** %4
%16 = load i32, i32* @stderr
%17 = call i32 @fputs(i8* %15, i32 %16)
%18 = load i32, i32* @stderr
%19 = call i32 @fputs(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 %18)
br label %20
20: ; preds = %7, %14, %11
ret void
}

LLVM IR (-O2):
@errno = global i64 0
@stderr = global i32 0
@.str = [2 x i8] c"\0A\00"
define void @_warn_if(i32 %0, i8* %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %14, label %4
4: ; preds = %2
%5 = load i64, i64* @errno
%6 = icmp eq i64 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = tail call i32 @perror(i8* %1)
br label %14
9: ; preds = %4
%10 = load i32, i32* @stderr
%11 = tail call i32 @fputs(i8* %1, i32 %10)
%12 = load i32, i32* @stderr
%13 = tail call i32 @fputs(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 %12)
br label %14
14: ; preds = %2, %9, %7
ret void
}
void g_unichar_digit_value() {}


x86 assembly (clang, -O0):
<g_unichar_digit_value>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_unichar_digit_value>:
ret

LLVM IR (-O0):
define void @g_unichar_digit_value() {
ret void
}

LLVM IR (-O2):
define void @g_unichar_digit_value() {
ret void
}
unsigned char unsign(char value) { return (unsigned char)value; }


x86 assembly (clang, -O0):
<unsign>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsign>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @unsign(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
ret i8 %3
}

LLVM IR (-O2):
define zeroext i8 @unsign(i8 returned signext %0) {
ret i8 %0
}
/* Variables and functions */
int /*<<< orphan*/ sscanf(char const *, char *, double *);
int convert_to_int(const char input[]) {
  double return_value = 0.0;
  sscanf(input, "%lf", &return_value);
  return return_value * 1000;
}


x86 assembly (clang, -O0):
<convert_to_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
lea    -0x10(%rbp),%rdx
call   1030 <sscanf@plt>
movsd  0xec0(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
cvttsd2si %xmm0,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<convert_to_int>:
push   %rax
movq   $0x0,(%rsp)
lea    0xee8(%rip),%rsi
mov    %rsp,%rdx
call   1030 <sscanf@plt>
movsd  (%rsp),%xmm0
mulsd  0xecb(%rip),%xmm0
cvttsd2si %xmm0,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%lf\00"
define i32 @convert_to_int(i8* %0) {
%2 = alloca i8*
%3 = alloca double
store i8* %0, i8** %2
store double 0.000000e+00, double* %3
%4 = load i8*, i8** %2
%5 = call i32 @sscanf(i8* %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %3)
%6 = load double, double* %3
%7 = fmul double %6, 1.000000e+03
%8 = fptosi double %7 to i32
ret i32 %8
}

LLVM IR (-O2):
@.str = [4 x i8] c"%lf\00"
define i32 @convert_to_int(i8* nocapture %0) {
%2 = alloca double
%3 = bitcast double* %2 to i8*
store double 0.000000e+00, double* %2
%4 = call i32 @sscanf(i8* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %2)
%5 = load double, double* %2
%6 = fmul double %5, 1.000000e+03
%7 = fptosi double %6 to i32
ret i32 %7
}
/* Variables and functions */
double gsw_rho(double, double, int);
double gsw_sigma3(double sa, double ct) {
  return (gsw_rho(sa, ct, 3000e0) - 1000e0);
}


x86 assembly (clang, -O0):
<gsw_sigma3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mov    $0xbb8,%edi
call   1030 <gsw_rho@plt>
movsd  0xec2(%rip),%xmm1
subsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gsw_sigma3>:
push   %rax
mov    $0xbb8,%edi
call   1030 <gsw_rho@plt>
addsd  0xedd(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @gsw_sigma3(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @gsw_rho(double %5, double %6, i32 3000)
%8 = fsub double %7, 1.000000e+03
ret double %8
}

LLVM IR (-O2):
define double @gsw_sigma3(double %0, double %1) {
%3 = tail call double @gsw_rho(double %0, double %1, i32 3000)
%4 = fadd double %3, -1.000000e+03
ret double %4
}
int __udivdi3() { return 0; }


x86 assembly (clang, -O0):
<__udivdi3>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__udivdi3>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__udivdi3() {
ret i32 0
}

LLVM IR (-O2):
define i32 @__udivdi3() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ SYS_gettid;
int /*<<< orphan*/ syscall(int /*<<< orphan*/);
pid_t gettid(void) { return syscall(SYS_gettid); }


x86 assembly (clang, -O0):
<gettid>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <syscall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gettid>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@SYS_gettid = global i32 0
define i32 @gettid() {
%1 = load i32, i32* @SYS_gettid
%2 = call i32 @syscall(i32 %1)
ret i32 %2
}

LLVM IR (-O2):
@SYS_gettid = global i32 0
define i32 @gettid() {
%1 = load i32, i32* @SYS_gettid
%2 = tail call i32 @syscall(i32 %1)
ret i32 %2
}
void ARGBBlendRow_C() {}


x86 assembly (clang, -O0):
<ARGBBlendRow_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBBlendRow_C>:
ret

LLVM IR (-O0):
define void @ARGBBlendRow_C() {
ret void
}

LLVM IR (-O2):
define void @ARGBBlendRow_C() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ rysuj(char *, int);
int main() {
  int w = 0;
  while (w < 4) {
    rysuj("* ", 10);
    rysuj(" *", 10);
    ++w;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x4,-0x8(%rbp)
jge    1160 <main+0x50>
lea    0xec9(%rip),%rdi
mov    $0xa,%esi
call   1030 <rysuj@plt>
lea    0xebb(%rip),%rdi
mov    $0xa,%esi
call   1030 <rysuj@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0xee5(%rip),%r14
mov    %r14,%rdi
mov    $0xa,%esi
call   1030 <rysuj@plt>
lea    0xed4(%rip),%rbx
mov    %rbx,%rdi
mov    $0xa,%esi
call   1030 <rysuj@plt>
mov    %r14,%rdi
mov    $0xa,%esi
call   1030 <rysuj@plt>
mov    %rbx,%rdi
mov    $0xa,%esi
call   1030 <rysuj@plt>
mov    %r14,%rdi
mov    $0xa,%esi
call   1030 <rysuj@plt>
mov    %rbx,%rdi
mov    $0xa,%esi
call   1030 <rysuj@plt>
mov    %r14,%rdi
mov    $0xa,%esi
call   1030 <rysuj@plt>
mov    %rbx,%rdi
mov    $0xa,%esi
call   1030 <rysuj@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"* \00"
@.str.1 = [3 x i8] c" *\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 4
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = call i32 @rysuj(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 10)
%8 = call i32 @rysuj(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 10)
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 1
store i32 %10, i32* %2
br label %3
11: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"* \00"
@.str.1 = [3 x i8] c" *\00"
define i32 @main() {
%1 = tail call i32 @rysuj(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 10)
%2 = tail call i32 @rysuj(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 10)
%3 = tail call i32 @rysuj(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 10)
%4 = tail call i32 @rysuj(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 10)
%5 = tail call i32 @rysuj(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 10)
%6 = tail call i32 @rysuj(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 10)
%7 = tail call i32 @rysuj(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 10)
%8 = tail call i32 @rysuj(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 10)
ret i32 0
}
/* Variables and functions */
scalar_t__ isspace(char);
char *skip_space(char *s) {
  while (isspace(*s))
    s++;
  return s;
}


x86 assembly (clang, -O0):
<skip_space>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
je     1143 <skip_space+0x33>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <skip_space+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_space>:
push   %rbx
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rbx
nopl   0x0(%rax,%rax,1)
movsbl 0x1(%rbx),%edi
add    $0x1,%rbx
call   1030 <isspace@plt>
test   %rax,%rax
jne    1120 <skip_space+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @skip_space(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = call i64 @isspace(i8 signext %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
br label %3
11: ; preds = %3
%12 = load i8*, i8** %2
ret i8* %12
}

LLVM IR (-O2):
define i8* @skip_space(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %7, %2 ]
%4 = load i8, i8* %3
%5 = tail call i64 @isspace(i8 signext %4)
%6 = icmp eq i64 %5, 0
%7 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i8* %3
}
unsigned addval_490(unsigned x) { return x + 3676361101U; }


x86 assembly (clang, -O0):
<addval_490>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xdb20d18d,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<addval_490>:
lea    -0x24df2e73(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @addval_490(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, -618606195
ret i32 %4
}

LLVM IR (-O2):
define i32 @addval_490(i32 %0) {
%2 = add i32 %0, -618606195
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void acip_del(void *d) { free(d); }


x86 assembly (clang, -O0):
<acip_del>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acip_del>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @acip_del(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @acip_del(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
int ceph_osd_op_type_data(int op) { return (op & 0x0f00) == 0x0200; }


x86 assembly (clang, -O0):
<ceph_osd_op_type_data>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf00,%eax
cmp    $0x200,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceph_osd_op_type_data>:
and    $0xf00,%edi
xor    %eax,%eax
cmp    $0x200,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @ceph_osd_op_type_data(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 3840
%5 = icmp eq i32 %4, 512
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @ceph_osd_op_type_data(i32 %0) {
%2 = and i32 %0, 3840
%3 = icmp eq i32 %2, 512
%4 = zext i1 %3 to i32
ret i32 %4
}
int irc_config_server_default_check_notify(const void *pointer, void *data,
                                           struct t_config_option *option,
                                           const char *value) {
  (void)pointer;
  (void)data;
  (void)option;
  if (value && value[0])
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<irc_config_server_default_check_notify>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
je     113b <irc_config_server_default_check_notify+0x3b>
mov    -0x28(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     113b <irc_config_server_default_check_notify+0x3b>
movl   $0x0,-0x4(%rbp)
jmp    1142 <irc_config_server_default_check_notify+0x42>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<irc_config_server_default_check_notify>:
test   %rcx,%rcx
je     110d <irc_config_server_default_check_notify+0xd>
xor    %eax,%eax
cmpb   $0x0,(%rcx)
je     110d <irc_config_server_default_check_notify+0xd>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.t_config_option = type opaque
define i32 @irc_config_server_default_check_notify(i8* %0, i8* %1, %struct.t_config_option* %2, i8* %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca %struct.t_config_option*
%9 = alloca i8*
store i8* %0, i8** %6
store i8* %1, i8** %7
store %struct.t_config_option* %2, %struct.t_config_option** %8
store i8* %3, i8** %9
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = load %struct.t_config_option*, %struct.t_config_option** %8
%13 = load i8*, i8** %9
%14 = icmp ne i8* %13, null
br i1 %14, label %15, label %22
15: ; preds = %4
%16 = load i8*, i8** %9
%17 = getelementptr inbounds i8, i8* %16, i64 0
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp ne i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %15
store i32 0, i32* %5
br label %23
22: ; preds = %15, %4
store i32 1, i32* %5
br label %23
23: ; preds = %22, %21
%24 = load i32, i32* %5
ret i32 %24
}

LLVM IR (-O2):
%struct.t_config_option = type opaque
define i32 @irc_config_server_default_check_notify(i8* nocapture readnone %0, i8* nocapture readnone %1, %struct.t_config_option* nocapture readnone %2, i8* %3) {
%5 = icmp eq i8* %3, null
br i1 %5, label %9, label %6
6: ; preds = %4
%7 = load i8, i8* %3
%8 = icmp eq i8 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %6, %4
br label %10
10: ; preds = %6, %9
%11 = phi i32 [ 1, %9 ], [ 0, %6 ]
ret i32 %11
}
__attribute__((weak)) void TWI0_IrqHandler(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<TWI0_IrqHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <TWI0_IrqHandler+0x9>
jmp    1109 <TWI0_IrqHandler+0x9>

x86 assembly (clang, -O2):
<TWI0_IrqHandler>:
jmp    1100 <TWI0_IrqHandler>

LLVM IR (-O0):
define weak void @TWI0_IrqHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define weak void @TWI0_IrqHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t h265sps_get_vps_id(const uint8_t *p_h265sps) {
  return (p_h265sps[5] & 0xf0) >> 4;
}


x86 assembly (clang, -O0):
<h265sps_get_vps_id>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%eax
and    $0xf0,%eax
sar    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<h265sps_get_vps_id>:
mov    0x14(%rdi),%eax
shr    $0x4,%eax
and    $0xf,%eax
ret

LLVM IR (-O0):
define i32 @h265sps_get_vps_id(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 5
%5 = load i32, i32* %4
%6 = and i32 %5, 240
%7 = ashr i32 %6, 4
ret i32 %7
}

LLVM IR (-O2):
define i32 @h265sps_get_vps_id(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 5
%3 = load i32, i32* %2
%4 = lshr i32 %3, 4
%5 = and i32 %4, 15
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_adds_pi16(int /*<<< orphan*/, int /*<<< orphan*/);
__m64 __attribute__((no, unused)) test(__m64 s1, __m64 s2) {
  return _mm_adds_pi16(s1, s2);
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_adds_pi16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
jmp    1030 <_mm_adds_pi16@plt>

LLVM IR (-O0):
define i32 @test(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_adds_pi16(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_adds_pi16(i32 %0, i32 %1)
ret i32 %3
}