xunge/DecIR huggingface dataset:
unsigned long upper_power_of_two(unsigned long v) {
  v--;
  v |= v >> 1;
  v |= v >> 2;
  v |= v >> 4;
  v |= v >> 8;
  v |= v >> 16;
  v++;
  return v;
}


x86 assembly (clang, -O0):
<upper_power_of_two>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x2,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x4,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x8,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x10,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<upper_power_of_two>:
lea    -0x1(%rdi),%rax
mov    %rax,%rcx
shr    %rcx
or     %rax,%rcx
mov    %rcx,%rax
shr    $0x2,%rax
or     %rcx,%rax
mov    %rax,%rcx
shr    $0x4,%rcx
or     %rax,%rcx
mov    %rcx,%rdx
shr    $0x8,%rdx
or     %rcx,%rdx
mov    %rdx,%rax
shr    $0x10,%rax
or     %rdx,%rax
add    $0x1,%rax
ret

LLVM IR (-O0):
define i64 @upper_power_of_two(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, -1
store i64 %4, i64* %2
%5 = load i64, i64* %2
%6 = lshr i64 %5, 1
%7 = load i64, i64* %2
%8 = or i64 %7, %6
store i64 %8, i64* %2
%9 = load i64, i64* %2
%10 = lshr i64 %9, 2
%11 = load i64, i64* %2
%12 = or i64 %11, %10
store i64 %12, i64* %2
%13 = load i64, i64* %2
%14 = lshr i64 %13, 4
%15 = load i64, i64* %2
%16 = or i64 %15, %14
store i64 %16, i64* %2
%17 = load i64, i64* %2
%18 = lshr i64 %17, 8
%19 = load i64, i64* %2
%20 = or i64 %19, %18
store i64 %20, i64* %2
%21 = load i64, i64* %2
%22 = lshr i64 %21, 16
%23 = load i64, i64* %2
%24 = or i64 %23, %22
store i64 %24, i64* %2
%25 = load i64, i64* %2
%26 = add i64 %25, 1
store i64 %26, i64* %2
%27 = load i64, i64* %2
ret i64 %27
}

LLVM IR (-O2):
define i64 @upper_power_of_two(i64 %0) {
%2 = add i64 %0, -1
%3 = lshr i64 %2, 1
%4 = or i64 %3, %2
%5 = lshr i64 %4, 2
%6 = or i64 %5, %4
%7 = lshr i64 %6, 4
%8 = or i64 %7, %6
%9 = lshr i64 %8, 8
%10 = or i64 %9, %8
%11 = lshr i64 %10, 16
%12 = or i64 %11, %10
%13 = add i64 %12, 1
ret i64 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  if ((0.3 - (0.2 + 0.1)) < 1e-6) {
    printf("same.\n");
  } else {
    printf("not same.\n");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"same.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [6 x i8] c"same.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
ret i32 0
}
unsigned int m_min_u(unsigned int left, unsigned int right) {
  return (left < right) ? left : right;
}


x86 assembly (clang, -O0):
<m_min_u>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jae    1121 <m_min_u+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <m_min_u+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<m_min_u>:
mov    %esi,%eax
cmp    %esi,%edi
cmovb  %edi,%eax
ret

LLVM IR (-O0):
define i32 @m_min_u(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ult i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @m_min_u(i32 %0, i32 %1) {
%3 = icmp ult i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
void *get_mem(size_t);
void *internal_malloc_size(size_t size) {
  if (size == 0)
    return NULL;
  return get_mem(size);
}


x86 assembly (clang, -O0):
<internal_malloc_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1134 <internal_malloc_size+0x24>
movq   $0x0,-0x8(%rbp)
jmp    1141 <internal_malloc_size+0x31>
mov    -0x10(%rbp),%rdi
call   1030 <get_mem@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<internal_malloc_size>:
test   %rdi,%rdi
je     111a <internal_malloc_size+0xa>
jmp    1030 <get_mem@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @internal_malloc_size(i64 %0) {
%2 = alloca i8*
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i8* null, i8** %2
br label %10
7: ; preds = %1
%8 = load i64, i64* %3
%9 = call i8* @get_mem(i64 %8)
store i8* %9, i8** %2
br label %10
10: ; preds = %7, %6
%11 = load i8*, i8** %2
ret i8* %11
}

LLVM IR (-O2):
define i8* @internal_malloc_size(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i8* @get_mem(i64 %0)
br label %5
5: ; preds = %1, %3
%6 = phi i8* [ %4, %3 ], [ null, %1 ]
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, int);
int sleep(int);
int iotSleep(const char *who, int sec) {
  printf("Function '%s' sleeps for %d sec\n", who, sec);
  return sleep(sec);
}


x86 assembly (clang, -O0):
<iotSleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
mov    -0xc(%rbp),%edi
call   1040 <sleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iotSleep>:
push   %rbx
mov    %esi,%ebx
mov    %rdi,%rsi
lea    0xed3(%rip),%rdi
mov    %ebx,%edx
call   1030 <printf@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <sleep@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"Function '%s' sleeps for %d sec\0A\00"
define i32 @iotSleep(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8* %5, i32 %6)
%8 = load i32, i32* %4
%9 = call i32 @sleep(i32 %8)
ret i32 %9
}

LLVM IR (-O2):
@.str = [33 x i8] c"Function '%s' sleeps for %d sec\0A\00"
define i32 @iotSleep(i8* %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
%4 = tail call i32 @sleep(i32 %1)
ret i32 %4
}
float test_fmaf(float x, float y, float z) { return __builtin_fmaf(x, y, z); }


x86 assembly (clang, -O0):
<test_fmaf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm2
call   1030 <fmaf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_fmaf>:
jmp    1030 <fmaf@plt>

LLVM IR (-O0):
define float @test_fmaf(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = load float, float* %6
%10 = call float @llvm.fma.f32(float %7, float %8, float %9)
ret float %10
}

LLVM IR (-O2):
define float @test_fmaf(float %0, float %1, float %2) {
%4 = tail call float @llvm.fma.f32(float %0, float %1, float %2)
ret float %4
}
/* Variables and functions */
double rand_double();
int rand_bool(void) { return (rand_double() > 0.5); }


x86 assembly (clang, -O0):
<rand_bool>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand_double@plt>
movsd  0xedd(%rip),%xmm1
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_bool>:
push   %rax
xor    %eax,%eax
call   1030 <rand_double@plt>
xor    %eax,%eax
ucomisd 0xede(%rip),%xmm0
seta   %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @rand_bool() {
%1 = call double (...) @rand_double()
%2 = fcmp ogt double %1, 5.000000e-01
%3 = zext i1 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @rand_bool() {
%1 = tail call double (...) @rand_double()
%2 = fcmp ogt double %1, 5.000000e-01
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t str2fourcc(char *str) {
  uint32_t fourcc = 0;
  fourcc += (uint32_t)str[0];
  fourcc += (uint32_t)str[1] << 8;
  fourcc += (uint32_t)str[2] << 16;
  fourcc += (uint32_t)str[3] << 24;
  return fourcc;
}


x86 assembly (clang, -O0):
<str2fourcc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl 0x1(%rax),%eax
shl    $0x8,%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl 0x2(%rax),%eax
shl    $0x10,%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl 0x3(%rax),%eax
shl    $0x18,%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<str2fourcc>:
movsbl (%rdi),%eax
movsbl 0x1(%rdi),%ecx
shl    $0x8,%ecx
add    %eax,%ecx
movsbl 0x2(%rdi),%edx
shl    $0x10,%edx
add    %ecx,%edx
movzbl 0x3(%rdi),%eax
shl    $0x18,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @str2fourcc(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = load i32, i32* %3
%9 = add nsw i32 %8, %7
store i32 %9, i32* %3
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = shl i32 %13, 8
%15 = load i32, i32* %3
%16 = add nsw i32 %15, %14
store i32 %16, i32* %3
%17 = load i8*, i8** %2
%18 = getelementptr inbounds i8, i8* %17, i64 2
%19 = load i8, i8* %18
%20 = sext i8 %19 to i32
%21 = shl i32 %20, 16
%22 = load i32, i32* %3
%23 = add nsw i32 %22, %21
store i32 %23, i32* %3
%24 = load i8*, i8** %2
%25 = getelementptr inbounds i8, i8* %24, i64 3
%26 = load i8, i8* %25
%27 = sext i8 %26 to i32
%28 = shl i32 %27, 24
%29 = load i32, i32* %3
%30 = add nsw i32 %29, %28
store i32 %30, i32* %3
%31 = load i32, i32* %3
ret i32 %31
}

LLVM IR (-O2):
define i32 @str2fourcc(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = shl nsw i32 %6, 8
%8 = add nsw i32 %7, %3
%9 = getelementptr inbounds i8, i8* %0, i64 2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = shl nsw i32 %11, 16
%13 = add nsw i32 %8, %12
%14 = getelementptr inbounds i8, i8* %0, i64 3
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = shl nuw i32 %16, 24
%18 = add nsw i32 %13, %17
ret i32 %18
}
int nothing(void) { return 0; }


x86 assembly (clang, -O0):
<nothing>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nothing>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nothing() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nothing() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ RadioSubsystemP__CommandValue__changed();
void DisseminatorP__0__DisseminationValue__changed(void) {
  RadioSubsystemP__CommandValue__changed();
}


x86 assembly (clang, -O0):
<DisseminatorP__0__DisseminationValue__changed>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <RadioSubsystemP__CommandValue__changed@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DisseminatorP__0__DisseminationValue__changed>:
xor    %eax,%eax
jmp    1030 <RadioSubsystemP__CommandValue__changed@plt>

LLVM IR (-O0):
define void @DisseminatorP__0__DisseminationValue__changed() {
%1 = call i32 (...) @RadioSubsystemP__CommandValue__changed()
ret void
}

LLVM IR (-O2):
define void @DisseminatorP__0__DisseminationValue__changed() {
%1 = tail call i32 (...) @RadioSubsystemP__CommandValue__changed()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[], char *envp[]) {
  printf("Idle process running\n");
  while (1)
    ;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    0xecf(%rip),%rdi
call   1030 <printf@plt>
jmp    1136 <main+0x26>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
nopl   (%rax)
jmp    1120 <main+0x10>

LLVM IR (-O0):
@.str = [22 x i8] c"Idle process running\0A\00"
define i32 @main(i32 %0, i8** %1, i8** %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8**
%7 = alloca i8**
store i32 0, i32* %4
store i32 %0, i32* %5
store i8** %1, i8*** %6
store i8** %2, i8*** %7
%8 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %3, %9
br label %9
}

LLVM IR (-O2):
@str = [21 x i8] c"Idle process running\00"
define i32 @main(i32 %0, i8** nocapture readnone %1, i8** nocapture readnone %2) {
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
br label %5
5: ; preds = %3, %5
br label %5
}
void insl(unsigned short port, void *addr, unsigned long count) {
  __asm__ __volatile__("cld ; rep ; ins"
                       "l"
                       : "=D"(addr), "=c"(count)
                       : "d"(port), "0"(addr), "1"(count));
}


x86 assembly (clang, -O0):
<insl>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x2(%rbp),%dx
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rcx
cld
rep insl (%dx),%es:(%rdi)
mov    %rdi,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<insl>:
mov    %rdx,%rcx
mov    %edi,%edx
mov    %rsi,%rdi
cld
rep insl (%dx),%es:(%rdi)
ret

LLVM IR (-O0):
define void @insl(i16 zeroext %0, i8* %1, i64 %2) {
%4 = alloca i16
%5 = alloca i8*
%6 = alloca i64
store i16 %0, i16* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i16, i16* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call { i8*, i64 } asm sideeffect "cld ; rep ; insl", "={di},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i16 %7, i8* %8, i64 %9)
%11 = extractvalue { i8*, i64 } %10, 0
%12 = extractvalue { i8*, i64 } %10, 1
store i8* %11, i8** %5
store i64 %12, i64* %6
ret void
}

LLVM IR (-O2):
define void @insl(i16 zeroext %0, i8* %1, i64 %2) {
%4 = tail call { i8*, i64 } asm sideeffect "cld ; rep ; insl", "={di},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i16 %0, i8* %1, i64 %2)
ret void
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ FAIL(char *);
int /*<<< orphan*/ PASS(char *);
int bar();
int foo();
int main() {
  if ((foo() == 10) && (bar() == 10))
    PASS("weak-override");
  else
    FAIL("weak-override");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <foo@plt>
cmp    $0xa,%eax
jne    1180 <main+0x40>
mov    $0x0,%al
call   1030 <bar@plt>
cmp    $0xa,%eax
jne    1180 <main+0x40>
lea    0xe8a(%rip),%rdi
call   1050 <PASS@plt>
jmp    118c <main+0x4c>
lea    0xe79(%rip),%rdi
call   1060 <FAIL@plt>
mov    0x2e4d(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <foo@plt>
cmp    $0xa,%eax
jne    1167 <main+0x27>
xor    %eax,%eax
call   1030 <bar@plt>
cmp    $0xa,%eax
jne    1167 <main+0x27>
lea    0xea0(%rip),%rdi
call   1050 <PASS@plt>
jmp    1173 <main+0x33>
lea    0xe92(%rip),%rdi
call   1060 <FAIL@plt>
mov    0x2e66(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"weak-override\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @foo()
%3 = icmp eq i32 %2, 10
br i1 %3, label %4, label %9
4: ; preds = %0
%5 = call i32 (...) @bar()
%6 = icmp eq i32 %5, 10
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = call i32 @PASS(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %11
9: ; preds = %4, %0
%10 = call i32 @FAIL(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %7
%12 = load i32, i32* @EXIT_SUCCESS
ret i32 %12
}

LLVM IR (-O2):
@.str = [14 x i8] c"weak-override\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 (...) @foo()
%2 = icmp eq i32 %1, 10
br i1 %2, label %3, label %8
3: ; preds = %0
%4 = tail call i32 (...) @bar()
%5 = icmp eq i32 %4, 10
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @PASS(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %10
8: ; preds = %3, %0
%9 = tail call i32 @FAIL(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %6
%11 = load i32, i32* @EXIT_SUCCESS
ret i32 %11
}
void g_ptr_array_add() {}


x86 assembly (clang, -O0):
<g_ptr_array_add>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_ptr_array_add>:
ret

LLVM IR (-O0):
define void @g_ptr_array_add() {
ret void
}

LLVM IR (-O2):
define void @g_ptr_array_add() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ test_uint64_encode();
void bench_uint64_encode() {
  unsigned i;
  for (i = 0; i < 1000000; i++) {
    if (!test_uint64_encode()) {
      printf("what ???\n");
    }
  }
}


x86 assembly (clang, -O0):
<bench_uint64_encode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0xf4240,-0x4(%rbp)
jae    116b <bench_uint64_encode+0x4b>
mov    $0x0,%al
call   1030 <test_uint64_encode@plt>
cmp    $0x0,%eax
jne    1158 <bench_uint64_encode+0x38>
lea    0xead(%rip),%rdi
call   1040 <printf@plt>
jmp    115d <bench_uint64_encode+0x3d>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    112f <bench_uint64_encode+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bench_uint64_encode>:
push   %rbp
push   %rbx
push   %rax
mov    $0xf4240,%ebp
lea    0xed1(%rip),%rbx
jmp    1145 <bench_uint64_encode+0x25>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
add    $0xffffffff,%ebp
je     115a <bench_uint64_encode+0x3a>
xor    %eax,%eax
call   1040 <test_uint64_encode@plt>
test   %eax,%eax
jne    1140 <bench_uint64_encode+0x20>
mov    %rbx,%rdi
call   1030 <puts@plt>
jmp    1140 <bench_uint64_encode+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [10 x i8] c"what ???\0A\00"
define void @bench_uint64_encode() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %11, %0
%3 = load i32, i32* %1
%4 = icmp ult i32 %3, 1000000
br i1 %4, label %5, label %14
5: ; preds = %2
%6 = call i32 (...) @test_uint64_encode()
%7 = icmp ne i32 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %5
%9 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %5
br label %11
11: ; preds = %10
%12 = load i32, i32* %1
%13 = add i32 %12, 1
store i32 %13, i32* %1
br label %2
14: ; preds = %2
ret void
}

LLVM IR (-O2):
@str = [9 x i8] c"what ???\00"
define void @bench_uint64_encode() {
br label %1
1: ; preds = %0, %7
%2 = phi i32 [ 0, %0 ], [ %8, %7 ]
%3 = tail call i32 (...) @test_uint64_encode()
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str, i64 0, i64 0))
br label %7
7: ; preds = %1, %5
%8 = add nuw nsw i32 %2, 1
%9 = icmp eq i32 %8, 1000000
br i1 %9, label %10, label %1
10: ; preds = %7
ret void
}
/* Variables and functions */
double gsl_rng_gamma(double const);
double gsl_rng_beta(const double a, const double b) {
  double x1 = gsl_rng_gamma(a);
  double x2 = gsl_rng_gamma(b);
  return x1 / (x1 + x2);
}


x86 assembly (clang, -O0):
<gsl_rng_beta>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <gsl_rng_gamma@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <gsl_rng_gamma@plt>
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
addsd  -0x20(%rbp),%xmm1
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gsl_rng_beta>:
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
call   1030 <gsl_rng_gamma@plt>
movsd  %xmm0,0x8(%rsp)
movsd  0x10(%rsp),%xmm0
call   1030 <gsl_rng_gamma@plt>
movsd  0x8(%rsp),%xmm1
addsd  %xmm1,%xmm0
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @gsl_rng_beta(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %3
store double %1, double* %4
%7 = load double, double* %3
%8 = call double @gsl_rng_gamma(double %7)
store double %8, double* %5
%9 = load double, double* %4
%10 = call double @gsl_rng_gamma(double %9)
store double %10, double* %6
%11 = load double, double* %5
%12 = load double, double* %5
%13 = load double, double* %6
%14 = fadd double %12, %13
%15 = fdiv double %11, %14
ret double %15
}

LLVM IR (-O2):
define double @gsl_rng_beta(double %0, double %1) {
%3 = tail call double @gsl_rng_gamma(double %0)
%4 = tail call double @gsl_rng_gamma(double %1)
%5 = fadd double %3, %4
%6 = fdiv double %3, %5
ret double %6
}
unsigned int hash(const char *s) {
  unsigned int hash = 0;
  while (*s)
    hash += hash * 101 + *s++;
  return hash;
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     113f <hash+0x3f>
imul   $0x65,-0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movsbl (%rcx),%ecx
add    %ecx,%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    110f <hash+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1124 <hash+0x24>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
movsbl %cl,%ecx
imul   $0x66,%eax,%eax
add    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %18
8: ; preds = %4
%9 = load i32, i32* %3
%10 = mul i32 %9, 101
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
%13 = load i8, i8* %11
%14 = sext i8 %13 to i32
%15 = add i32 %10, %14
%16 = load i32, i32* %3
%17 = add i32 %16, %15
store i32 %17, i32* %3
br label %4
18: ; preds = %4
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 0, %1 ]
%7 = phi i8* [ %8, %4 ], [ %0, %1 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = sext i8 %5 to i32
%10 = mul i32 %6, 102
%11 = add i32 %10, %9
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i32 [ 0, %1 ], [ %11, %4 ]
ret i32 %15
}
/* Variables and functions */
int arith_shift_left(short, int);
void les2i_array(short *src, int count, int *dest) {
  short value;
  while (--count >= 0) {
    value = (src[count]);
    dest[count] = arith_shift_left(value, 16);
  };
}


x86 assembly (clang, -O0):
<les2i_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
cmp    $0x0,%eax
jl     1165 <les2i_array+0x55>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,2),%ax
mov    %ax,-0x1a(%rbp)
mov    $0x10,%esi
movswl -0x1a(%rbp),%edi
call   1030 <arith_shift_left@plt>
mov    %eax,%edx
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
jmp    1123 <les2i_array+0x13>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<les2i_array>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1151 <les2i_array+0x41>
mov    %rdx,%r14
mov    %rdi,%r15
mov    %esi,%ebx
add    $0x1,%rbx
nopl   0x0(%rax,%rax,1)
lea    -0x2(%rbx),%r12d
movswl (%r15,%r12,2),%edi
mov    $0x10,%esi
call   1030 <arith_shift_left@plt>
mov    %eax,(%r14,%r12,4)
add    $0xffffffffffffffff,%rbx
cmp    $0x1,%rbx
ja     1130 <les2i_array+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @les2i_array(i16* %0, i32 %1, i32* %2) {
%4 = alloca i16*
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i16
store i16* %0, i16** %4
store i32 %1, i32* %5
store i32* %2, i32** %6
br label %8
8: ; preds = %12, %3
%9 = load i32, i32* %5
%10 = add nsw i32 %9, -1
store i32 %10, i32* %5
%11 = icmp sge i32 %10, 0
br i1 %11, label %12, label %24
12: ; preds = %8
%13 = load i16*, i16** %4
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i16, i16* %13, i64 %15
%17 = load i16, i16* %16
store i16 %17, i16* %7
%18 = load i16, i16* %7
%19 = call i32 @arith_shift_left(i16 signext %18, i32 16)
%20 = load i32*, i32** %6
%21 = load i32, i32* %5
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i32, i32* %20, i64 %22
store i32 %19, i32* %23
br label %8
24: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @les2i_array(i16* nocapture %0, i32 %1, i32* nocapture writeonly %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %16
5: ; preds = %3
%6 = zext i32 %1 to i64
br label %7
7: ; preds = %5, %7
%8 = phi i64 [ %6, %5 ], [ %9, %7 ]
%9 = add nsw i64 %8, -1
%10 = and i64 %9, 4294967295
%11 = getelementptr inbounds i16, i16* %0, i64 %10
%12 = load i16, i16* %11
%13 = tail call i32 @arith_shift_left(i16 signext %12, i32 16)
%14 = getelementptr inbounds i32, i32* %2, i64 %10
store i32 %13, i32* %14
%15 = icmp ugt i64 %8, 1
br i1 %15, label %7, label %16
16: ; preds = %7, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CMT1_delay_10us(int);
void i2c_wait_tpd(void) { CMT1_delay_10us(2); }


x86 assembly (clang, -O0):
<i2c_wait_tpd>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <CMT1_delay_10us@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_wait_tpd>:
mov    $0x2,%edi
jmp    1030 <CMT1_delay_10us@plt>

LLVM IR (-O0):
define void @i2c_wait_tpd() {
%1 = call i32 @CMT1_delay_10us(i32 2)
ret void
}

LLVM IR (-O2):
define void @i2c_wait_tpd() {
%1 = tail call i32 @CMT1_delay_10us(i32 2)
ret void
}
/* Type definitions */
struct scorer_query {
  int dummy;
};
struct prepared_pattern {
  int dummy;
};

/* Variables and functions */
int score_string_prepared_inline(int, char const *, struct scorer_query const *,
                                 struct prepared_pattern const *,
                                 unsigned int const, unsigned int *);
__attribute__((no)) int
score_string_prepared_2(const char *string, const struct scorer_query *query,
                        const struct prepared_pattern *prepared_pattern,
                        const unsigned string_length, unsigned *match) {
  return score_string_prepared_inline(2, string, query, prepared_pattern,
                                      string_length, match);
}


x86 assembly (clang, -O0):
<score_string_prepared_2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x1c(%rbp),%r8d
mov    -0x28(%rbp),%r9
mov    $0x2,%edi
call   1030 <score_string_prepared_inline@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<score_string_prepared_2>:
mov    %r8,%r9
mov    %ecx,%r8d
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x2,%edi
jmp    1030 <score_string_prepared_inline@plt>

LLVM IR (-O0):
%struct.scorer_query = type { i32 }
%struct.prepared_pattern = type { i32 }
define i32 @score_string_prepared_2(i8* %0, %struct.scorer_query* %1, %struct.prepared_pattern* %2, i32 %3, i32* %4) {
%6 = alloca i8*
%7 = alloca %struct.scorer_query*
%8 = alloca %struct.prepared_pattern*
%9 = alloca i32
%10 = alloca i32*
store i8* %0, i8** %6
store %struct.scorer_query* %1, %struct.scorer_query** %7
store %struct.prepared_pattern* %2, %struct.prepared_pattern** %8
store i32 %3, i32* %9
store i32* %4, i32** %10
%11 = load i8*, i8** %6
%12 = load %struct.scorer_query*, %struct.scorer_query** %7
%13 = load %struct.prepared_pattern*, %struct.prepared_pattern** %8
%14 = load i32, i32* %9
%15 = load i32*, i32** %10
%16 = call i32 @score_string_prepared_inline(i32 2, i8* %11, %struct.scorer_query* %12, %struct.prepared_pattern* %13, i32 %14, i32* %15)
ret i32 %16
}

LLVM IR (-O2):
%struct.scorer_query = type { i32 }
%struct.prepared_pattern = type { i32 }
define i32 @score_string_prepared_2(i8* %0, %struct.scorer_query* %1, %struct.prepared_pattern* %2, i32 %3, i32* %4) {
%6 = tail call i32 @score_string_prepared_inline(i32 2, i8* %0, %struct.scorer_query* %1, %struct.prepared_pattern* %2, i32 %3, i32* %4)
ret i32 %6
}
/* Variables and functions */
char *malloc(size_t);
int /*<<< orphan*/ memcpy(char *, char const *, size_t);
int strlen(char const *);
char *strdup(const char *s) {
  size_t length;
  char *result;
  length = strlen(s) + 1;
  result = malloc(length);
  if (result == NULL) {
    return NULL;
  }
  memcpy(result, s, length);
  return result;
}


x86 assembly (clang, -O0):
<strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1050 <malloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1173 <strdup+0x43>
movq   $0x0,-0x8(%rbp)
jmp    118c <strdup+0x5c>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdup>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
add    $0x1,%eax
movslq %eax,%r15
mov    %r15,%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1161 <strdup+0x31>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1040 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @strlen(i8* %6)
%8 = add nsw i32 %7, 1
%9 = sext i32 %8 to i64
store i64 %9, i64* %4
%10 = load i64, i64* %4
%11 = call i8* @malloc(i64 %10)
store i8* %11, i8** %5
%12 = load i8*, i8** %5
%13 = icmp eq i8* %12, null
br i1 %13, label %14, label %15
14: ; preds = %1
store i8* null, i8** %2
br label %21
15: ; preds = %1
%16 = load i8*, i8** %5
%17 = load i8*, i8** %3
%18 = load i64, i64* %4
%19 = call i32 @memcpy(i8* %16, i8* %17, i64 %18)
%20 = load i8*, i8** %5
store i8* %20, i8** %2
br label %21
21: ; preds = %15, %14
%22 = load i8*, i8** %2
ret i8* %22
}

LLVM IR (-O2):
define i8* @strdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = sext i32 %3 to i64
%5 = tail call i8* @malloc(i64 %4)
%6 = icmp eq i8* %5, null
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @memcpy(i8* %5, i8* %0, i64 %4)
br label %9
9: ; preds = %1, %7
ret i8* %5
}
/* Type definitions */
struct bloom {
  int dummy;
};

/* Variables and functions */
int bloom_check_add(struct bloom *, void *, int, int /*<<< orphan*/);
int bloom_check(struct bloom *bloom, void *buffer, int len) {
  return bloom_check_add(bloom, buffer, len, 0);
}


x86 assembly (clang, -O0):
<bloom_check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
xor    %ecx,%ecx
call   1030 <bloom_check_add@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bloom_check>:
xor    %ecx,%ecx
jmp    1030 <bloom_check_add@plt>

LLVM IR (-O0):
%struct.bloom = type { i32 }
define i32 @bloom_check(%struct.bloom* %0, i8* %1, i32 %2) {
%4 = alloca %struct.bloom*
%5 = alloca i8*
%6 = alloca i32
store %struct.bloom* %0, %struct.bloom** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load %struct.bloom*, %struct.bloom** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @bloom_check_add(%struct.bloom* %7, i8* %8, i32 %9, i32 0)
ret i32 %10
}

LLVM IR (-O2):
%struct.bloom = type { i32 }
define i32 @bloom_check(%struct.bloom* %0, i8* %1, i32 %2) {
%4 = tail call i32 @bloom_check_add(%struct.bloom* %0, i8* %1, i32 %2, i32 0)
ret i32 %4
}
int HelpItem15(void) { return 0; }


x86 assembly (clang, -O0):
<HelpItem15>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelpItem15>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HelpItem15() {
ret i32 0
}

LLVM IR (-O2):
define i32 @HelpItem15() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ strncpy(char *, int /*<<< orphan*/, size_t);
int /*<<< orphan*/ w32_strerror(int);
int w32_strerror_r(int errnum, char *buf, size_t buflen) {
  strncpy(buf, w32_strerror(errnum), buflen);
  if (buflen)
    buf[buflen - 1] = '\0';
  return 0;
}


x86 assembly (clang, -O0):
<w32_strerror_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <w32_strerror@plt>
mov    -0x20(%rbp),%rdi
mov    %eax,%esi
mov    -0x18(%rbp),%rdx
call   1030 <strncpy@plt>
cmpq   $0x0,-0x18(%rbp)
je     116d <w32_strerror_r+0x4d>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
sub    $0x1,%rcx
movb   $0x0,(%rax,%rcx,1)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<w32_strerror_r>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %rsi,%r14
call   1040 <w32_strerror@plt>
mov    %r14,%rdi
mov    %eax,%esi
mov    %rbx,%rdx
call   1030 <strncpy@plt>
test   %rbx,%rbx
je     1147 <w32_strerror_r+0x27>
movb   $0x0,-0x1(%rbx,%r14,1)
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @w32_strerror_r(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i32, i32* %4
%9 = call i32 @w32_strerror(i32 %8)
%10 = load i64, i64* %6
%11 = call i32 @strncpy(i8* %7, i32 %9, i64 %10)
%12 = load i64, i64* %6
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %19
14: ; preds = %3
%15 = load i8*, i8** %5
%16 = load i64, i64* %6
%17 = sub i64 %16, 1
%18 = getelementptr inbounds i8, i8* %15, i64 %17
store i8 0, i8* %18
br label %19
19: ; preds = %14, %3
ret i32 0
}

LLVM IR (-O2):
define i32 @w32_strerror_r(i32 %0, i8* %1, i64 %2) {
%4 = tail call i32 @w32_strerror(i32 %0)
%5 = tail call i32 @strncpy(i8* %1, i32 %4, i64 %2)
%6 = icmp eq i64 %2, 0
br i1 %6, label %10, label %7
7: ; preds = %3
%8 = add i64 %2, -1
%9 = getelementptr inbounds i8, i8* %1, i64 %8
store i8 0, i8* %9
br label %10
10: ; preds = %7, %3
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
ssize_t last_ret(int set, ssize_t ret) {
  static ssize_t sret = 0;
  if (set)
    sret = ret;
  return (sret);
}


x86 assembly (clang, -O0):
<last_ret>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     111d <last_ret+0x1d>
mov    -0x8(%rbp),%eax
mov    %eax,0x2f07(%rip)
mov    0x2f01(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<last_ret>:
test   %edi,%edi
je     110d <last_ret+0xd>
mov    %esi,%eax
mov    %esi,0x2f18(%rip)
ret
mov    0x2f11(%rip),%eax
ret

LLVM IR (-O0):
@last_ret.sret = internal global i32 0
define i32 @last_ret(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = load i32, i32* %4
store i32 %8, i32* @last_ret.sret
br label %9
9: ; preds = %7, %2
%10 = load i32, i32* @last_ret.sret
ret i32 %10
}

LLVM IR (-O2):
@last_ret.sret = internal unnamed_addr global i32 0
define i32 @last_ret(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = load i32, i32* @last_ret.sret
br label %7
6: ; preds = %2
store i32 %1, i32* @last_ret.sret
br label %7
7: ; preds = %4, %6
%8 = phi i32 [ %5, %4 ], [ %1, %6 ]
ret i32 %8
}
int xf86BlockSIGIO(void) { return 0; }


x86 assembly (clang, -O0):
<xf86BlockSIGIO>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xf86BlockSIGIO>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @xf86BlockSIGIO() {
ret i32 0
}

LLVM IR (-O2):
define i32 @xf86BlockSIGIO() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void *_Z23msgtracer_log_with_keysPciS_z(void) {
  puts("stub _Z23msgtracer_log_with_keysPciS_z");
}


x86 assembly (clang, -O0):
<_Z23msgtracer_log_with_keysPciS_z>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <puts@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Z23msgtracer_log_with_keysPciS_z>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [39 x i8] c"stub _Z23msgtracer_log_with_keysPciS_z\00"
define i8* @_Z23msgtracer_log_with_keysPciS_z() {
%1 = alloca i8*
%2 = call i32 @puts(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%3 = load i8*, i8** %1
ret i8* %3
}

LLVM IR (-O2):
@.str = [39 x i8] c"stub _Z23msgtracer_log_with_keysPciS_z\00"
define noalias i8* @_Z23msgtracer_log_with_keysPciS_z() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
ret i8* undef
}
int check_type() { return (258); }


x86 assembly (clang, -O0):
<check_type>:
push   %rbp
mov    %rsp,%rbp
mov    $0x102,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_type>:
mov    $0x102,%eax
ret

LLVM IR (-O0):
define i32 @check_type() {
ret i32 258
}

LLVM IR (-O2):
define i32 @check_type() {
ret i32 258
}
void hgpk_module_init(void) {}


x86 assembly (clang, -O0):
<hgpk_module_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hgpk_module_init>:
ret

LLVM IR (-O0):
define void @hgpk_module_init() {
ret void
}

LLVM IR (-O2):
define void @hgpk_module_init() {
ret void
}
/* Variables and functions */
char *OICStrcatPartial(char *, size_t, char const *, size_t);
char *OICStrcat(char *dest, size_t destSize, const char *source) {
  return OICStrcatPartial(dest, destSize, source,
                          destSize == 0 ? 0 : destSize - 1);
}


x86 assembly (clang, -O0):
<OICStrcat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1152 <OICStrcat+0x42>
xor    %eax,%eax
mov    %rax,-0x38(%rbp)
jmp    115e <OICStrcat+0x4e>
mov    -0x10(%rbp),%rax
sub    $0x1,%rax
mov    %rax,-0x38(%rbp)
mov    -0x20(%rbp),%rdx
mov    -0x28(%rbp),%rsi
mov    -0x30(%rbp),%rdi
mov    -0x38(%rbp),%rcx
call   1030 <OICStrcatPartial@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OICStrcat>:
xor    %ecx,%ecx
mov    %rsi,%rax
sub    $0x1,%rax
cmovae %rax,%rcx
jmp    1030 <OICStrcatPartial@plt>

LLVM IR (-O0):
define i8* @OICStrcat(i8* %0, i64 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load i8*, i8** %6
%10 = load i64, i64* %5
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %3
br label %16
13: ; preds = %3
%14 = load i64, i64* %5
%15 = sub i64 %14, 1
br label %16
16: ; preds = %13, %12
%17 = phi i64 [ 0, %12 ], [ %15, %13 ]
%18 = call i8* @OICStrcatPartial(i8* %7, i64 %8, i8* %9, i64 %17)
ret i8* %18
}

LLVM IR (-O2):
define i8* @OICStrcat(i8* %0, i64 %1, i8* %2) {
%4 = icmp eq i64 %1, 0
%5 = add i64 %1, -1
%6 = select i1 %4, i64 0, i64 %5
%7 = tail call i8* @OICStrcatPartial(i8* %0, i64 %1, i8* %2, i64 %6)
ret i8* %7
}
/* Type definitions */
typedef int /*<<< orphan*/ c;
typedef int /*<<< orphan*/ b;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void fun(int b[], int *c) { printf("\nb=%d,c=%d", sizeof(b), sizeof(c)); }


x86 assembly (clang, -O0):
<fun>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed9(%rip),%rdi
mov    $0x8,%edx
mov    %edx,%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun>:
lea    0xee9(%rip),%rdi
mov    $0x8,%esi
mov    $0x8,%edx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"\0Ab=%d,c=%d\00"
define void @fun(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 8, i32 8)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"\0Ab=%d,c=%d\00"
define void @fun(i32* nocapture readnone %0, i32* nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 8, i32 8)
ret void
}
void set_rgb_led(void *led_address, char r, char g, char b) {
  unsigned int i = 0x0;
  i = r + (g << 8) + (b << 16);
  *((volatile int *)led_address) = i;
  return;
}


x86 assembly (clang, -O0):
<set_rgb_led>:
push   %rbp
mov    %rsp,%rbp
mov    %cl,%al
mov    %dl,%cl
mov    %sil,%dl
mov    %rdi,-0x8(%rbp)
mov    %dl,-0x9(%rbp)
mov    %cl,-0xa(%rbp)
mov    %al,-0xb(%rbp)
movl   $0x0,-0x10(%rbp)
movsbl -0x9(%rbp),%eax
movsbl -0xa(%rbp),%ecx
shl    $0x8,%ecx
add    %ecx,%eax
movsbl -0xb(%rbp),%ecx
shl    $0x10,%ecx
add    %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_rgb_led>:
shl    $0x8,%edx
add    %esi,%edx
shl    $0x10,%ecx
add    %edx,%ecx
mov    %ecx,(%rdi)
ret

LLVM IR (-O0):
define void @set_rgb_led(i8* %0, i8 signext %1, i8 signext %2, i8 signext %3) {
%5 = alloca i8*
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i32
store i8* %0, i8** %5
store i8 %1, i8* %6
store i8 %2, i8* %7
store i8 %3, i8* %8
store i32 0, i32* %9
%10 = load i8, i8* %6
%11 = sext i8 %10 to i32
%12 = load i8, i8* %7
%13 = sext i8 %12 to i32
%14 = shl i32 %13, 8
%15 = add nsw i32 %11, %14
%16 = load i8, i8* %8
%17 = sext i8 %16 to i32
%18 = shl i32 %17, 16
%19 = add nsw i32 %15, %18
store i32 %19, i32* %9
%20 = load i32, i32* %9
%21 = load i8*, i8** %5
%22 = bitcast i8* %21 to i32*
store volatile i32 %20, i32* %22
ret void
}

LLVM IR (-O2):
define void @set_rgb_led(i8* %0, i8 signext %1, i8 signext %2, i8 signext %3) {
%5 = sext i8 %1 to i32
%6 = sext i8 %2 to i32
%7 = shl nsw i32 %6, 8
%8 = add nsw i32 %7, %5
%9 = sext i8 %3 to i32
%10 = shl nsw i32 %9, 16
%11 = add nsw i32 %8, %10
%12 = bitcast i8* %0 to i32*
store volatile i32 %11, i32* %12
ret void
}
void VMR3SetError(void) {}


x86 assembly (clang, -O0):
<VMR3SetError>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VMR3SetError>:
ret

LLVM IR (-O0):
define void @VMR3SetError() {
ret void
}

LLVM IR (-O2):
define void @VMR3SetError() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __ISB();
unsigned long __get_SCTLR();
int /*<<< orphan*/ __set_SCTLR(unsigned long);
__attribute__((always_)) void L1C_EnableBTAC(void) {
  __set_SCTLR(__get_SCTLR() | (1UL << 11U));
  __ISB();
}


x86 assembly (clang, -O0):
<L1C_EnableBTAC>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <__get_SCTLR@plt>
mov    %rax,%rdi
or     $0x800,%rdi
call   1050 <__set_SCTLR@plt>
mov    $0x0,%al
call   1030 <__ISB@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<L1C_EnableBTAC>:
push   %rax
xor    %eax,%eax
call   1040 <__get_SCTLR@plt>
or     $0x800,%rax
mov    %rax,%rdi
call   1050 <__set_SCTLR@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <__ISB@plt>

LLVM IR (-O0):
define void @L1C_EnableBTAC() {
%1 = call i64 (...) @__get_SCTLR()
%2 = or i64 %1, 2048
%3 = call i32 @__set_SCTLR(i64 %2)
%4 = call i32 (...) @__ISB()
ret void
}

LLVM IR (-O2):
define void @L1C_EnableBTAC() {
%1 = tail call i64 (...) @__get_SCTLR()
%2 = or i64 %1, 2048
%3 = tail call i32 @__set_SCTLR(i64 %2)
%4 = tail call i32 (...) @__ISB()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ del_node_only(void *);
void clean_membership(void *membership) { del_node_only(membership); }


x86 assembly (clang, -O0):
<clean_membership>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <del_node_only@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clean_membership>:
jmp    1030 <del_node_only@plt>

LLVM IR (-O0):
define void @clean_membership(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @del_node_only(i8* %3)
ret void
}

LLVM IR (-O2):
define void @clean_membership(i8* %0) {
%2 = tail call i32 @del_node_only(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ freopen(char *, char *, int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
int /*<<< orphan*/ stdout;
void init() {
  freopen("ljestvica.in", "r", stdin);
  freopen("ljestvica.out", "w", stdout);
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edx
lea    0xedc(%rip),%rdi
lea    0xee2(%rip),%rsi
call   1030 <freopen@plt>
mov    0x2ea1(%rip),%rax
mov    (%rax),%edx
lea    0xecf(%rip),%rdi
lea    0xed6(%rip),%rsi
call   1030 <freopen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edx
lea    0xedf(%rip),%rdi
lea    0xee5(%rip),%rsi
call   1030 <freopen@plt>
mov    0x2ea4(%rip),%rax
mov    (%rax),%edx
lea    0xed2(%rip),%rdi
lea    0xed9(%rip),%rsi
pop    %rax
jmp    1030 <freopen@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"ljestvica.in\00"
@.str.1 = [2 x i8] c"r\00"
@stdin = global i32 0
@.str.2 = [14 x i8] c"ljestvica.out\00"
@.str.3 = [2 x i8] c"w\00"
@stdout = global i32 0
define void @init() {
%1 = load i32, i32* @stdin
%2 = call i32 @freopen(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32 %1)
%3 = load i32, i32* @stdout
%4 = call i32 @freopen(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"ljestvica.in\00"
@.str.1 = [2 x i8] c"r\00"
@stdin = global i32 0
@.str.2 = [14 x i8] c"ljestvica.out\00"
@.str.3 = [2 x i8] c"w\00"
@stdout = global i32 0
define void @init() {
%1 = load i32, i32* @stdin
%2 = tail call i32 @freopen(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32 %1)
%3 = load i32, i32* @stdout
%4 = tail call i32 @freopen(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i64 0, i64 0), i32 %3)
ret void
}