xunge/DecIR huggingface dataset:
/* Type definitions */
struct timespec {
  scalar_t__ tv_nsec;
  scalar_t__ tv_sec;
  int /*<<< orphan*/ member_1;
  int /*<<< orphan*/ member_0;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_MONOTONIC;
int /*<<< orphan*/ clock_gettime(int /*<<< orphan*/, struct timespec *);
unsigned long long current_time_ns() {
  struct timespec t = {0, 0};
  clock_gettime(CLOCK_MONOTONIC, &t);
  unsigned long long s = 1000000000ULL * (unsigned long long)t.tv_sec;
  return (((unsigned long long)t.tv_nsec)) + s;
}


x86 assembly (clang, -O0):
<current_time_ns>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x18(%rbp),%rdi
xor    %esi,%esi
mov    $0x18,%edx
call   1040 <memset@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
lea    -0x18(%rbp),%rsi
call   1030 <clock_gettime@plt>
imul   $0x3b9aca00,-0x10(%rbp),%rax
3b
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
add    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<current_time_ns>:
sub    $0x18,%rsp
xorps  %xmm0,%xmm0
movaps %xmm0,(%rsp)
movq   $0x0,0x10(%rsp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
call   1030 <clock_gettime@plt>
imul   $0x3b9aca00,0x8(%rsp),%rax
9a 3b
add    (%rsp),%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64, i32, i32 }
@CLOCK_MONOTONIC = global i32 0
define i64 @current_time_ns() {
%1 = alloca %struct.timespec
%2 = alloca i64
%3 = bitcast %struct.timespec* %1 to i8*
%4 = load i32, i32* @CLOCK_MONOTONIC
%5 = call i32 @clock_gettime(i32 %4, %struct.timespec* %1)
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 1
%7 = load i64, i64* %6
%8 = mul i64 1000000000, %7
store i64 %8, i64* %2
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 0
%10 = load i64, i64* %9
%11 = load i64, i64* %2
%12 = add i64 %10, %11
ret i64 %12
}

LLVM IR (-O2):
%struct.timespec = type { i64, i64, i32, i32 }
@CLOCK_MONOTONIC = global i32 0
define i64 @current_time_ns() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = load i32, i32* @CLOCK_MONOTONIC
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %1)
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%6 = load i64, i64* %5
%7 = mul i64 %6, 1000000000
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%9 = load i64, i64* %8
%10 = add i64 %9, %7
ret i64 %10
}
unsigned xrop3_22_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  unsigned stk4;
  stk4 = T & S;
  stk4 = ~stk4;
  stk3 = D & stk4;
  stk2 = S ^ stk3;
  stk1 = T ^ stk2;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_22_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    -0xc(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x20(%rbp)
mov    -0x8(%rbp),%eax
and    -0x20(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_22_1_0>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
mov    %esi,%ecx
shl    $0x8,%ecx
or     %esi,%ecx
and    %edi,%esi
not    %sil
movzbl %sil,%edx
xor    %eax,%ecx
xor    %edx,%ecx
not    %eax
and    %ecx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_22_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = shl i32 %13, 8
%15 = load i8, i8* %3
%16 = zext i8 %15 to i32
%17 = or i32 %14, %16
store i32 %17, i32* %6
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = shl i32 %19, 8
%21 = load i8, i8* %4
%22 = zext i8 %21 to i32
%23 = or i32 %20, %22
store i32 %23, i32* %7
%24 = load i32, i32* %7
%25 = load i32, i32* %6
%26 = and i32 %24, %25
store i32 %26, i32* %11
%27 = load i32, i32* %11
%28 = xor i32 %27, -1
store i32 %28, i32* %11
%29 = load i32, i32* %5
%30 = load i32, i32* %11
%31 = and i32 %29, %30
store i32 %31, i32* %10
%32 = load i32, i32* %6
%33 = load i32, i32* %10
%34 = xor i32 %32, %33
store i32 %34, i32* %9
%35 = load i32, i32* %7
%36 = load i32, i32* %9
%37 = xor i32 %35, %36
store i32 %37, i32* %8
%38 = load i32, i32* %8
%39 = load i32, i32* %6
%40 = xor i32 %39, -1
%41 = and i32 %38, %40
%42 = load i32, i32* %5
%43 = load i32, i32* %6
%44 = and i32 %42, %43
%45 = or i32 %41, %44
ret i32 %45
}

LLVM IR (-O2):
define i32 @xrop3_22_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = and i8 %1, %0
%8 = xor i8 %7, -1
%9 = zext i8 %8 to i32
%10 = xor i32 %4, %9
%11 = xor i32 %10, %6
%12 = xor i32 %4, -1
%13 = and i32 %11, %12
%14 = or i32 %13, %3
ret i32 %14
}
/* Type definitions */
struct frame {
  int dummy;
};
struct fcgi {
  int dummy;
};

/* Variables and functions */
int process_end_request(struct frame *f, struct fcgi *fcgi, const char *str,
                        size_t num) {
  return 1;
}


x86 assembly (clang, -O0):
<process_end_request>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<process_end_request>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.frame = type { i32 }
%struct.fcgi = type { i32 }
define i32 @process_end_request(%struct.frame* %0, %struct.fcgi* %1, i8* %2, i64 %3) {
%5 = alloca %struct.frame*
%6 = alloca %struct.fcgi*
%7 = alloca i8*
%8 = alloca i64
store %struct.frame* %0, %struct.frame** %5
store %struct.fcgi* %1, %struct.fcgi** %6
store i8* %2, i8** %7
store i64 %3, i64* %8
ret i32 1
}

LLVM IR (-O2):
%struct.frame = type { i32 }
%struct.fcgi = type { i32 }
define i32 @process_end_request(%struct.frame* nocapture readnone %0, %struct.fcgi* nocapture readnone %1, i8* nocapture readnone %2, i64 %3) {
ret i32 1
}
/* Variables and functions */
unsigned long long maximum_Pi_for_P(unsigned long long, unsigned int,
                                    unsigned int);
unsigned long long minimum_P_for_Pi(unsigned long long k, unsigned int p,
                                    unsigned int m) {
  unsigned long long j, k_j;
  j = k_j = 0;
  while (k_j < k) {
    ++j;
    k_j = maximum_Pi_for_P(j, p, m);
  }
  return j;
}


x86 assembly (clang, -O0):
<minimum_P_for_Pi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movq   $0x0,-0x20(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x8(%rbp),%rax
jae    1164 <minimum_P_for_Pi+0x54>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <maximum_Pi_for_P@plt>
mov    %rax,-0x20(%rbp)
jmp    1132 <minimum_P_for_Pi+0x22>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<minimum_P_for_Pi>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
test   %rdi,%rdi
je     1149 <minimum_P_for_Pi+0x39>
mov    %edx,%r14d
mov    %esi,%r15d
mov    %rdi,%rbp
xor    %ebx,%ebx
nopw   0x0(%rax,%rax,1)
add    $0x1,%rbx
mov    %rbx,%rdi
mov    %r15d,%esi
mov    %r14d,%edx
call   1030 <maximum_Pi_for_P@plt>
cmp    %rbp,%rax
jb     1130 <minimum_P_for_Pi+0x20>
jmp    114b <minimum_P_for_Pi+0x3b>
xor    %ebx,%ebx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i64 @minimum_P_for_Pi(i64 %0, i32 %1, i32 %2) {
%4 = alloca i64
%5 = alloca i32
%6 = alloca i32
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i64 0, i64* %8
store i64 0, i64* %7
br label %9
9: ; preds = %13, %3
%10 = load i64, i64* %8
%11 = load i64, i64* %4
%12 = icmp ult i64 %10, %11
br i1 %12, label %13, label %20
13: ; preds = %9
%14 = load i64, i64* %7
%15 = add i64 %14, 1
store i64 %15, i64* %7
%16 = load i64, i64* %7
%17 = load i32, i32* %5
%18 = load i32, i32* %6
%19 = call i64 @maximum_Pi_for_P(i64 %16, i32 %17, i32 %18)
store i64 %19, i64* %8
br label %9
20: ; preds = %9
%21 = load i64, i64* %7
ret i64 %21
}

LLVM IR (-O2):
define i64 @minimum_P_for_Pi(i64 %0, i32 %1, i32 %2) {
%4 = icmp eq i64 %0, 0
br i1 %4, label %10, label %5
5: ; preds = %3, %5
%6 = phi i64 [ %7, %5 ], [ 0, %3 ]
%7 = add i64 %6, 1
%8 = tail call i64 @maximum_Pi_for_P(i64 %7, i32 %1, i32 %2)
%9 = icmp ult i64 %8, %0
br i1 %9, label %5, label %10
10: ; preds = %5, %3
%11 = phi i64 [ 0, %3 ], [ %7, %5 ]
ret i64 %11
}
void InitialiseFPU() {
  Writecr4(Readcr4() | 0x200);
  Writecr0((Readcr0() | (1 << 5) | (1 << 1)) & ~((1 << 2) | (1 << 3)));
  asm volatile("finit");
  WriteFPUCW(0x37F);
}


x86 assembly (clang, -O0):
<InitialiseFPU>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <Readcr4@plt>
mov    %eax,%edi
or     $0x200,%edi
mov    $0x0,%al
call   1060 <Writecr4@plt>
mov    $0x0,%al
call   1070 <Readcr0@plt>
mov    %eax,%edi
or     $0x20,%edi
or     $0x2,%edi
and    $0xfffffff3,%edi
mov    $0x0,%al
call   1030 <Writecr0@plt>
finit
mov    $0x37f,%edi
mov    $0x0,%al
call   1040 <WriteFPUCW@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<InitialiseFPU>:
push   %rax
xor    %eax,%eax
call   1050 <Readcr4@plt>
or     $0x200,%eax
mov    %eax,%edi
xor    %eax,%eax
call   1060 <Writecr4@plt>
xor    %eax,%eax
call   1070 <Readcr0@plt>
and    $0xffffffd1,%eax
lea    0x22(%rax),%edi
xor    %eax,%eax
call   1030 <Writecr0@plt>
finit
mov    $0x37f,%edi
xor    %eax,%eax
pop    %rcx
jmp    1040 <WriteFPUCW@plt>

LLVM IR (-O0):
define void @InitialiseFPU() {
%1 = call i32 (...) @Readcr4()
%2 = or i32 %1, 512
%3 = call i32 (i32, ...) bitcast (i32 (...)* @Writecr4 to i32 (i32, ...)*)(i32 %2)
%4 = call i32 (...) @Readcr0()
%5 = or i32 %4, 32
%6 = or i32 %5, 2
%7 = and i32 %6, -13
%8 = call i32 (i32, ...) bitcast (i32 (...)* @Writecr0 to i32 (i32, ...)*)(i32 %7)
%9 = call i32 (i32, ...) bitcast (i32 (...)* @WriteFPUCW to i32 (i32, ...)*)(i32 895)
ret void
}

LLVM IR (-O2):
define void @InitialiseFPU() {
%1 = tail call i32 (...) @Readcr4()
%2 = or i32 %1, 512
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @Writecr4 to i32 (i32, ...)*)(i32 %2)
%4 = tail call i32 (...) @Readcr0()
%5 = and i32 %4, -47
%6 = or i32 %5, 34
%7 = tail call i32 (i32, ...) bitcast (i32 (...)* @Writecr0 to i32 (i32, ...)*)(i32 %6)
tail call void asm sideeffect "finit", "~{dirflag},~{fpsr},~{flags}"()
%8 = tail call i32 (i32, ...) bitcast (i32 (...)* @WriteFPUCW to i32 (i32, ...)*)(i32 895)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LC_ALL;
int /*<<< orphan*/ setlocale(int /*<<< orphan*/, char *);
int tolower(int);
int ls_tolower(int c) {
  int ret;
  setlocale(LC_ALL, "");
  ret = tolower(c);
  setlocale(LC_ALL, "C");
  return ret;
}


x86 assembly (clang, -O0):
<ls_tolower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
lea    0xec6(%rip),%rsi
call   1040 <setlocale@plt>
mov    -0x4(%rbp),%edi
call   1030 <tolower@plt>
mov    %eax,-0x8(%rbp)
mov    0x2e8e(%rip),%rax
mov    (%rax),%edi
lea    0xea5(%rip),%rsi
call   1040 <setlocale@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_tolower>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
mov    0x2eb3(%rip),%r14
mov    (%r14),%edi
lea    0xeca(%rip),%rsi
call   1040 <setlocale@plt>
mov    %ebx,%edi
call   1030 <tolower@plt>
mov    %eax,%ebx
mov    (%r14),%edi
lea    0xeb1(%rip),%rsi
call   1040 <setlocale@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@LC_ALL = global i32 0
@.str = [1 x i8] zeroinitializer
@.str.1 = [2 x i8] c"C\00"
define i32 @ls_tolower(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* @LC_ALL
%5 = call i32 @setlocale(i32 %4, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* %2
%7 = call i32 @tolower(i32 %6)
store i32 %7, i32* %3
%8 = load i32, i32* @LC_ALL
%9 = call i32 @setlocale(i32 %8, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
@LC_ALL = global i32 0
@.str = [1 x i8] zeroinitializer
@.str.1 = [2 x i8] c"C\00"
define i32 @ls_tolower(i32 %0) {
%2 = load i32, i32* @LC_ALL
%3 = tail call i32 @setlocale(i32 %2, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @tolower(i32 %0)
%5 = load i32, i32* @LC_ALL
%6 = tail call i32 @setlocale(i32 %5, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret i32 %4
}
int energymon_is_exclusive_cray_pm_memory_energy(void) { return 0; }


x86 assembly (clang, -O0):
<energymon_is_exclusive_cray_pm_memory_energy>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<energymon_is_exclusive_cray_pm_memory_energy>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @energymon_is_exclusive_cray_pm_memory_energy() {
ret i32 0
}

LLVM IR (-O2):
define i32 @energymon_is_exclusive_cray_pm_memory_energy() {
ret i32 0
}
/* Variables and functions */
unsigned int find_symbol(char *);
int /*<<< orphan*/ sprintf(char *, char *, int, int);
unsigned int get_stub_function(int sbank, int dbank) {
  char name[32];
  sprintf(name, "__stub_%d_%d", sbank, dbank);
  return find_symbol(name);
}


x86 assembly (clang, -O0):
<get_stub_function>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    -0x30(%rbp),%rdi
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
lea    0xec1(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x30(%rbp),%rdi
call   1030 <find_symbol@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_stub_function>:
push   %rbx
sub    $0x20,%rsp
mov    %esi,%ecx
mov    %edi,%edx
lea    0xed0(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <find_symbol@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"__stub_%d_%d\00"
define i32 @get_stub_function(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca [32 x i8]
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = getelementptr inbounds [32 x i8], [32 x i8]* %5, i64 0, i64 0
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8)
%10 = getelementptr inbounds [32 x i8], [32 x i8]* %5, i64 0, i64 0
%11 = call i32 @find_symbol(i8* %10)
ret i32 %11
}

LLVM IR (-O2):
@.str = [13 x i8] c"__stub_%d_%d\00"
define i32 @get_stub_function(i32 %0, i32 %1) {
%3 = alloca [32 x i8]
%4 = getelementptr inbounds [32 x i8], [32 x i8]* %3, i64 0, i64 0
%5 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1)
%6 = call i32 @find_symbol(i8* %4)
ret i32 %6
}
void curl_multi_timeout() {}


x86 assembly (clang, -O0):
<curl_multi_timeout>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<curl_multi_timeout>:
ret

LLVM IR (-O0):
define void @curl_multi_timeout() {
ret void
}

LLVM IR (-O2):
define void @curl_multi_timeout() {
ret void
}
/* Variables and functions */
scalar_t__ display_isError();
int /*<<< orphan*/ display_powerDown();
void event_devicePoweredOn(void) {
  if (display_isError()) {
    display_powerDown();
  }
}


x86 assembly (clang, -O0):
<event_devicePoweredOn>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <display_isError@plt>
cmp    $0x0,%rax
je     113c <event_devicePoweredOn+0x1c>
mov    $0x0,%al
call   1030 <display_powerDown@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_devicePoweredOn>:
push   %rax
xor    %eax,%eax
call   1040 <display_isError@plt>
test   %rax,%rax
je     1135 <event_devicePoweredOn+0x15>
xor    %eax,%eax
pop    %rcx
jmp    1030 <display_powerDown@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @event_devicePoweredOn() {
%1 = call i64 (...) @display_isError()
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = call i32 (...) @display_powerDown()
br label %5
5: ; preds = %3, %0
ret void
}

LLVM IR (-O2):
define void @event_devicePoweredOn() {
%1 = tail call i64 (...) @display_isError()
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @display_powerDown()
br label %5
5: ; preds = %3, %0
ret void
}
int ima_file_check(struct file *file, int mask, int opened) { return 0; }


x86 assembly (clang, -O0):
<ima_file_check>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ima_file_check>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.file = type opaque
define i32 @ima_file_check(%struct.file* %0, i32 %1, i32 %2) {
%4 = alloca %struct.file*
%5 = alloca i32
%6 = alloca i32
store %struct.file* %0, %struct.file** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
%struct.file = type opaque
define i32 @ima_file_check(%struct.file* nocapture readnone %0, i32 %1, i32 %2) {
ret i32 0
}
/* Type definitions */
struct tl880_dev {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ tl880_write_regbits(struct tl880_dev *, int, int, int, int);
void tl880_set_cursor_position(struct tl880_dev *tl880dev, int x, int y) {
  tl880_write_regbits(tl880dev, 0x10104, 0xa, 0, x);
  tl880_write_regbits(tl880dev, 0x10104, 0x1a, 0x10, y);
}


x86 assembly (clang, -O0):
<tl880_set_cursor_position>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%r8d
mov    $0x10104,%esi
mov    $0xa,%edx
xor    %ecx,%ecx
call   1030 <tl880_write_regbits@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%r8d
mov    $0x10104,%esi
mov    $0x1a,%edx
mov    $0x10,%ecx
call   1030 <tl880_write_regbits@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tl880_set_cursor_position>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebp
mov    %esi,%r8d
mov    %rdi,%rbx
mov    $0x10104,%esi
mov    $0xa,%edx
xor    %ecx,%ecx
call   1030 <tl880_write_regbits@plt>
mov    %rbx,%rdi
mov    $0x10104,%esi
mov    $0x1a,%edx
mov    $0x10,%ecx
mov    %ebp,%r8d
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <tl880_write_regbits@plt>

LLVM IR (-O0):
%struct.tl880_dev = type { i32 }
define void @tl880_set_cursor_position(%struct.tl880_dev* %0, i32 %1, i32 %2) {
%4 = alloca %struct.tl880_dev*
%5 = alloca i32
%6 = alloca i32
store %struct.tl880_dev* %0, %struct.tl880_dev** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load %struct.tl880_dev*, %struct.tl880_dev** %4
%8 = load i32, i32* %5
%9 = call i32 @tl880_write_regbits(%struct.tl880_dev* %7, i32 65796, i32 10, i32 0, i32 %8)
%10 = load %struct.tl880_dev*, %struct.tl880_dev** %4
%11 = load i32, i32* %6
%12 = call i32 @tl880_write_regbits(%struct.tl880_dev* %10, i32 65796, i32 26, i32 16, i32 %11)
ret void
}

LLVM IR (-O2):
%struct.tl880_dev = type { i32 }
define void @tl880_set_cursor_position(%struct.tl880_dev* %0, i32 %1, i32 %2) {
%4 = tail call i32 @tl880_write_regbits(%struct.tl880_dev* %0, i32 65796, i32 10, i32 0, i32 %1)
%5 = tail call i32 @tl880_write_regbits(%struct.tl880_dev* %0, i32 65796, i32 26, i32 16, i32 %2)
ret void
}
/* Variables and functions */
char *strrchr(char *, char);
void remove_caret_markup_closing_bracket(char *s) {
  char *q;
  if (!s)
    return;
  if (s[0] == '^') {
    q = strrchr(s, ')');
    if (q)
      *q = '\0';
  }
}


x86 assembly (clang, -O0):
<remove_caret_markup_closing_bracket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    112c <remove_caret_markup_closing_bracket+0x1c>
jmp    1165 <remove_caret_markup_closing_bracket+0x55>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x5e,%eax
jne    1165 <remove_caret_markup_closing_bracket+0x55>
mov    -0x8(%rbp),%rdi
mov    $0x29,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1160 <remove_caret_markup_closing_bracket+0x50>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
jmp    1165 <remove_caret_markup_closing_bracket+0x55>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_caret_markup_closing_bracket>:
push   %rax
test   %rdi,%rdi
je     112d <remove_caret_markup_closing_bracket+0x1d>
cmpb   $0x5e,(%rdi)
jne    112d <remove_caret_markup_closing_bracket+0x1d>
mov    $0x29,%esi
call   1030 <strrchr@plt>
test   %rax,%rax
je     112d <remove_caret_markup_closing_bracket+0x1d>
movb   $0x0,(%rax)
pop    %rax
ret

LLVM IR (-O0):
define void @remove_caret_markup_closing_bracket(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = icmp ne i8* %4, null
br i1 %5, label %7, label %6
6: ; preds = %1
br label %21
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 0
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 94
br i1 %12, label %13, label %21
13: ; preds = %7
%14 = load i8*, i8** %2
%15 = call i8* @strrchr(i8* %14, i8 signext 41)
store i8* %15, i8** %3
%16 = load i8*, i8** %3
%17 = icmp ne i8* %16, null
br i1 %17, label %18, label %20
18: ; preds = %13
%19 = load i8*, i8** %3
store i8 0, i8* %19
br label %20
20: ; preds = %18, %13
br label %21
21: ; preds = %6, %20, %7
ret void
}

LLVM IR (-O2):
define void @remove_caret_markup_closing_bracket(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 94
br i1 %5, label %6, label %10
6: ; preds = %3
%7 = tail call i8* @strrchr(i8* %0, i8 signext 41)
%8 = icmp eq i8* %7, null
br i1 %8, label %10, label %9
9: ; preds = %6
store i8 0, i8* %7
br label %10
10: ; preds = %3, %9, %6, %1
ret void
}
/* Variables and functions */
double sqrt(double);
double getWindSpeed(double u, double v) {
  double w = sqrt((u * u) + (v * v));
  return w;
}


x86 assembly (clang, -O0):
<getWindSpeed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm2
movsd  -0x10(%rbp),%xmm1
mulsd  -0x10(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getWindSpeed>:
mulsd  %xmm1,%xmm1
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     112b <getWindSpeed+0x1b>
sqrtsd %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @getWindSpeed(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %3
%7 = load double, double* %3
%8 = load double, double* %4
%9 = load double, double* %4
%10 = fmul double %8, %9
%11 = call double @llvm.fmuladd.f64(double %6, double %7, double %10)
%12 = call double @sqrt(double %11)
store double %12, double* %5
%13 = load double, double* %5
ret double %13
}

LLVM IR (-O2):
define double @getWindSpeed(double %0, double %1) {
%3 = fmul double %1, %1
%4 = tail call double @llvm.fmuladd.f64(double %0, double %0, double %3)
%5 = tail call double @sqrt(double %4)
ret double %5
}
void logstr(char *str) {}


x86 assembly (clang, -O0):
<logstr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<logstr>:
ret

LLVM IR (-O0):
define void @logstr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @logstr(i8* nocapture %0) {
ret void
}
void abcd7efghijklmnopqrstuvwxzy() {}


x86 assembly (clang, -O0):
<abcd7efghijklmnopqrstuvwxzy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<abcd7efghijklmnopqrstuvwxzy>:
ret

LLVM IR (-O0):
define void @abcd7efghijklmnopqrstuvwxzy() {
ret void
}

LLVM IR (-O2):
define void @abcd7efghijklmnopqrstuvwxzy() {
ret void
}
/* Variables and functions */
long double asinl(long double);
long double libm_asinl(long double x) { return asinl(x); }


x86 assembly (clang, -O0):
<libm_asinl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <asinl@plt>
fld    %st(0)
fstp   %st(0)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libm_asinl>:
jmp    1030 <asinl@plt>

LLVM IR (-O0):
define x86_fp80 @libm_asinl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call x86_fp80 @asinl(x86_fp80 %3)
ret x86_fp80 %4
}

LLVM IR (-O2):
define x86_fp80 @libm_asinl(x86_fp80 %0) {
%2 = tail call x86_fp80 @asinl(x86_fp80 %0)
ret x86_fp80 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ volatile uint32_t;

/* Variables and functions */
void SysExcIntDisable(uint32_t ui32IntFlags) {
  (*((volatile uint32_t *)(0x400F9004))) &= ~(ui32IntFlags);
}


x86 assembly (clang, -O0):
<SysExcIntDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
mov    $0x400f9004,%ecx
mov    (%rcx),%ecx
and    %eax,%ecx
mov    $0x400f9004,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysExcIntDisable>:
mov    %edi,-0x4(%rsp)
mov    -0x4(%rsp),%eax
not    %eax
and    %eax,0x400f9004
ret

LLVM IR (-O0):
define void @SysExcIntDisable(i32 %0) {
%2 = alloca i32
store volatile i32 %0, i32* %2
%3 = load volatile i32, i32* %2
%4 = xor i32 %3, -1
%5 = load volatile i32, i32* inttoptr (i64 1074761732 to i32*)
%6 = and i32 %5, %4
store volatile i32 %6, i32* inttoptr (i64 1074761732 to i32*)
ret void
}

LLVM IR (-O2):
define void @SysExcIntDisable(i32 %0) {
%2 = alloca i32
store volatile i32 %0, i32* %2
%3 = load volatile i32, i32* %2
%4 = xor i32 %3, -1
%5 = load volatile i32, i32* inttoptr (i64 1074761732 to i32*)
%6 = and i32 %5, %4
store volatile i32 %6, i32* inttoptr (i64 1074761732 to i32*)
ret void
}
void ser_fourcc(unsigned char *dst, char *src) {
  *dst++ = *src++;
  *dst++ = *src++;
  *dst++ = *src++;
  *dst++ = *src++;
}


x86 assembly (clang, -O0):
<ser_fourcc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ser_fourcc>:
mov    (%rsi),%al
mov    %al,(%rdi)
mov    0x1(%rsi),%al
mov    %al,0x1(%rdi)
mov    0x2(%rsi),%al
mov    %al,0x2(%rdi)
mov    0x3(%rsi),%al
mov    %al,0x3(%rdi)
ret

LLVM IR (-O0):
define void @ser_fourcc(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %4
%7 = load i8, i8* %5
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %3
store i8 %7, i8* %8
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %4
%12 = load i8, i8* %10
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %3
store i8 %12, i8* %13
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %4
%17 = load i8, i8* %15
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
store i8 %17, i8* %18
%20 = load i8*, i8** %4
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %4
%22 = load i8, i8* %20
%23 = load i8*, i8** %3
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %3
store i8 %22, i8* %23
ret void
}

LLVM IR (-O2):
define void @ser_fourcc(i8* nocapture writeonly %0, i8* nocapture %1) {
%3 = getelementptr inbounds i8, i8* %1, i64 1
%4 = load i8, i8* %1
%5 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %4, i8* %0
%6 = getelementptr inbounds i8, i8* %1, i64 2
%7 = load i8, i8* %3
%8 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %7, i8* %5
%9 = getelementptr inbounds i8, i8* %1, i64 3
%10 = load i8, i8* %6
%11 = getelementptr inbounds i8, i8* %0, i64 3
store i8 %10, i8* %8
%12 = load i8, i8* %9
store i8 %12, i8* %11
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutexattr_t;

/* Variables and functions */
int /*<<< orphan*/ PTHREAD_PROCESS_PRIVATE;
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ printf(char *, ...);
scalar_t__ pthread_mutexattr_init(int /*<<< orphan*/ *);
int pthread_mutexattr_setpshared(int /*<<< orphan*/ *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
int main(void) {
  fprintf(stderr, "process-shared attribute is not available for testing\n");
  return 2;
  pthread_mutexattr_t mta;
  int ret;
  if (pthread_mutexattr_init(&mta) != 0) {
    perror("Error at pthread_mutexattr_init()\n");
    return 2;
  }
  ret = pthread_mutexattr_setpshared(&mta, PTHREAD_PROCESS_PRIVATE);
  if (ret != 0) {
    printf("Test FAILED: Expected return code 0, got: %d\n", ret);
    return 1;
  }
  printf("Test PASSED\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
lea    0xed1(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x2,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x2,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [55 x i8] c"process-shared attribute is not available for testing\0A\00"
@PTHREAD_PROCESS_PRIVATE = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = load i32, i32* @stderr
%5 = call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0))
ret i32 2
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [55 x i8] c"process-shared attribute is not available for testing\0A\00"
@PTHREAD_PROCESS_PRIVATE = global i32 0
define i32 @main() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0))
ret i32 2
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_bus_message_enter_container(void *m, char type, const char *contents) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_bus_message_enter_container>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
mov    0x2ec5(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_message_enter_container>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_bus_message_enter_container(i8* %0, i8 signext %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8*
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8* %2, i8** %6
%7 = load i32, i32* @EINVAL
%8 = sub nsw i32 0, %7
ret i32 %8
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_bus_message_enter_container(i8* nocapture readnone %0, i8 signext %1, i8* nocapture readnone %2) {
%4 = load i32, i32* @EINVAL
%5 = sub nsw i32 0, %4
ret i32 %5
}
void ff_hevc_put_hevc_bi_qpel_hv24_10_avx2() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_qpel_hv24_10_avx2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_qpel_hv24_10_avx2>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_qpel_hv24_10_avx2() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_qpel_hv24_10_avx2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
float test_quicksort();
int main() {
  float quick_success;
  quick_success = test_quicksort();
  printf("Quicksort success rate: %.2f\n", quick_success);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_quicksort@plt>
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
lea    0xeb9(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_quicksort@plt>
lea    0xed1(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [30 x i8] c"Quicksort success rate: %.2f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca float
store i32 0, i32* %1
%3 = call float (...) @test_quicksort()
store float %3, float* %2
%4 = load float, float* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), float %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [30 x i8] c"Quicksort success rate: %.2f\0A\00"
define i32 @main() {
%1 = tail call float (...) @test_quicksort()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), float %1)
ret i32 0
}
unsigned Kit_DsdObjOffset(int nFans) {
  return (nFans >> 2) + ((nFans & 3) > 0);
}


x86 assembly (clang, -O0):
<Kit_DsdObjOffset>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x2,%eax
mov    -0x4(%rbp),%ecx
and    $0x3,%ecx
cmp    $0x0,%ecx
setg   %cl
and    $0x1,%cl
movzbl %cl,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Kit_DsdObjOffset>:
mov    %edi,%eax
sar    $0x2,%eax
and    $0x3,%edi
cmp    $0x1,%edi
sbb    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @Kit_DsdObjOffset(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 2
%5 = load i32, i32* %2
%6 = and i32 %5, 3
%7 = icmp sgt i32 %6, 0
%8 = zext i1 %7 to i32
%9 = add nsw i32 %4, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @Kit_DsdObjOffset(i32 %0) {
%2 = ashr i32 %0, 2
%3 = and i32 %0, 3
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i32
%6 = add nsw i32 %2, %5
ret i32 %6
}
void function_parent(void) {
  void function_child(void);
  function_child();
}


x86 assembly (clang, -O0):
<function_parent>:
push   %rbp
mov    %rsp,%rbp
call   1030 <function_child@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<function_parent>:
jmp    1030 <function_child@plt>

LLVM IR (-O0):
define void @function_parent() {
ret void
}

LLVM IR (-O2):
define void @function_parent() {
tail call void @function_child()
ret void
}
double df_hat(double x) {
  double y = x * x - 1.0;
  return y * y;
}


x86 assembly (clang, -O0):
<df_hat>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xee1(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<df_hat>:
mulsd  %xmm0,%xmm0
addsd  0xef4(%rip),%xmm0
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @df_hat(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = load double, double* %2
%6 = call double @llvm.fmuladd.f64(double %4, double %5, double -1.000000e+00)
store double %6, double* %3
%7 = load double, double* %3
%8 = load double, double* %3
%9 = fmul double %7, %8
ret double %9
}

LLVM IR (-O2):
define double @df_hat(double %0) {
%2 = tail call double @llvm.fmuladd.f64(double %0, double %0, double -1.000000e+00)
%3 = fmul double %2, %2
ret double %3
}
/* Variables and functions */
unsigned short inswap_le16(unsigned short);
void inswap_le16_num(unsigned short *s, int n) {
  int i;
  for (i = 0; i < n; i++)
    s[i] = inswap_le16(s[i]);
}


x86 assembly (clang, -O0):
<inswap_le16_num>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1160 <inswap_le16_num+0x50>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movzwl (%rax,%rcx,2),%edi
call   1030 <inswap_le16@plt>
mov    %ax,%dx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %dx,(%rax,%rcx,2)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <inswap_le16_num+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inswap_le16_num>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1148 <inswap_le16_num+0x38>
mov    %rdi,%r15
mov    %esi,%r14d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movzwl (%r15,%rbx,2),%edi
call   1030 <inswap_le16@plt>
mov    %ax,(%r15,%rbx,2)
add    $0x1,%rbx
cmp    %rbx,%r14
jne    1130 <inswap_le16_num+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @inswap_le16_num(i16* %0, i32 %1) {
%3 = alloca i16*
%4 = alloca i32
%5 = alloca i32
store i16* %0, i16** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %21, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %24
10: ; preds = %6
%11 = load i16*, i16** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i16, i16* %11, i64 %13
%15 = load i16, i16* %14
%16 = call zeroext i16 @inswap_le16(i16 zeroext %15)
%17 = load i16*, i16** %3
%18 = load i32, i32* %5
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i16, i16* %17, i64 %19
store i16 %16, i16* %20
br label %21
21: ; preds = %10
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %6
24: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @inswap_le16_num(i16* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i16, i16* %0, i64 %7
%9 = load i16, i16* %8
%10 = tail call zeroext i16 @inswap_le16(i16 zeroext %9)
store i16 %10, i16* %8
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("Hello Word!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello Word!\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [12 x i8] c"Hello Word!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ endian_write_float(void *, float, int /*<<< orphan*/);
void be_write_float(void *ptr, float f) { endian_write_float(ptr, f, 0); }


x86 assembly (clang, -O0):
<be_write_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
movss  -0xc(%rbp),%xmm0
xor    %esi,%esi
call   1030 <endian_write_float@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<be_write_float>:
xor    %esi,%esi
jmp    1030 <endian_write_float@plt>

LLVM IR (-O0):
define void @be_write_float(i8* %0, float %1) {
%3 = alloca i8*
%4 = alloca float
store i8* %0, i8** %3
store float %1, float* %4
%5 = load i8*, i8** %3
%6 = load float, float* %4
%7 = call i32 @endian_write_float(i8* %5, float %6, i32 0)
ret void
}

LLVM IR (-O2):
define void @be_write_float(i8* %0, float %1) {
%3 = tail call i32 @endian_write_float(i8* %0, float %1, i32 0)
ret void
}
void defend(struct battle_char *c) {}


x86 assembly (clang, -O0):
<defend>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<defend>:
ret

LLVM IR (-O0):
%struct.battle_char = type opaque
define void @defend(%struct.battle_char* %0) {
%2 = alloca %struct.battle_char*
store %struct.battle_char* %0, %struct.battle_char** %2
ret void
}

LLVM IR (-O2):
%struct.battle_char = type opaque
define void @defend(%struct.battle_char* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Msp430TimerP__0__Timer__setMode(int);
void Msp430Adc12ImplP__TimerA__setMode(int mode) {
  Msp430TimerP__0__Timer__setMode(mode);
}


x86 assembly (clang, -O0):
<Msp430Adc12ImplP__TimerA__setMode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <Msp430TimerP__0__Timer__setMode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430Adc12ImplP__TimerA__setMode>:
jmp    1030 <Msp430TimerP__0__Timer__setMode@plt>

LLVM IR (-O0):
define void @Msp430Adc12ImplP__TimerA__setMode(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @Msp430TimerP__0__Timer__setMode(i32 %3)
ret void
}

LLVM IR (-O2):
define void @Msp430Adc12ImplP__TimerA__setMode(i32 %0) {
%2 = tail call i32 @Msp430TimerP__0__Timer__setMode(i32 %0)
ret void
}
/* Type definitions */
struct _CSSOM_DequeItem_FSMTableRow_Int {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ CSSOM_free(struct _CSSOM_DequeItem_FSMTableRow_Int *);
void DequeItem_FSMTableRow_Int_free(
    struct _CSSOM_DequeItem_FSMTableRow_Int *item) {
  CSSOM_free(item);
}


x86 assembly (clang, -O0):
<DequeItem_FSMTableRow_Int_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <CSSOM_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DequeItem_FSMTableRow_Int_free>:
jmp    1030 <CSSOM_free@plt>

LLVM IR (-O0):
%struct._CSSOM_DequeItem_FSMTableRow_Int = type { i32 }
define void @DequeItem_FSMTableRow_Int_free(%struct._CSSOM_DequeItem_FSMTableRow_Int* %0) {
%2 = alloca %struct._CSSOM_DequeItem_FSMTableRow_Int*
store %struct._CSSOM_DequeItem_FSMTableRow_Int* %0, %struct._CSSOM_DequeItem_FSMTableRow_Int** %2
%3 = load %struct._CSSOM_DequeItem_FSMTableRow_Int*, %struct._CSSOM_DequeItem_FSMTableRow_Int** %2
%4 = call i32 @CSSOM_free(%struct._CSSOM_DequeItem_FSMTableRow_Int* %3)
ret void
}

LLVM IR (-O2):
%struct._CSSOM_DequeItem_FSMTableRow_Int = type { i32 }
define void @DequeItem_FSMTableRow_Int_free(%struct._CSSOM_DequeItem_FSMTableRow_Int* %0) {
%2 = tail call i32 @CSSOM_free(%struct._CSSOM_DequeItem_FSMTableRow_Int* %0)
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int const uint32_t;

/* Variables and functions */
uint32_t get_unaligned_be24(const uint8_t *p) {
  return p[0] << 16 | p[1] << 8 | p[2];
}


x86 assembly (clang, -O0):
<get_unaligned_be24>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    0x4(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
or     0x8(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_unaligned_be24>:
mov    (%rdi),%ecx
mov    0x4(%rdi),%eax
shl    $0x10,%ecx
shl    $0x8,%eax
or     %ecx,%eax
or     0x8(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @get_unaligned_be24(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = shl i32 %5, 16
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = shl i32 %9, 8
%11 = or i32 %6, %10
%12 = load i32*, i32** %2
%13 = getelementptr inbounds i32, i32* %12, i64 2
%14 = load i32, i32* %13
%15 = or i32 %11, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @get_unaligned_be24(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 16
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = shl i32 %5, 8
%7 = or i32 %6, %3
%8 = getelementptr inbounds i32, i32* %0, i64 2
%9 = load i32, i32* %8
%10 = or i32 %7, %9
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int x;
  scanf("%d", &x);
  printf("%d/n", x);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%esi
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%esi
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [5 x i8] c"%d/n\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [5 x i8] c"%d/n\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret i32 0
}
/* Variables and functions */
float clamp(int /*<<< orphan*/, double, double);
int /*<<< orphan*/ cubicPulse(double, double, float);
float flareType2(float input) {
  return clamp(cubicPulse(0.5, 0.5, input), 0.0, 1.0);
}


x86 assembly (clang, -O0):
<flareType2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm2
movsd  0xece(%rip),%xmm1
movaps %xmm1,%xmm0
call   1030 <cubicPulse@plt>
mov    %eax,%edi
xorps  %xmm0,%xmm0
movsd  0xeb1(%rip),%xmm1
call   1040 <clamp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flareType2>:
push   %rax
movaps %xmm0,%xmm2
movsd  0xed4(%rip),%xmm0
movaps %xmm0,%xmm1
call   1030 <cubicPulse@plt>
movsd  0xecc(%rip),%xmm1
xorps  %xmm0,%xmm0
mov    %eax,%edi
pop    %rax
jmp    1040 <clamp@plt>

LLVM IR (-O0):
define float @flareType2(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 @cubicPulse(double 5.000000e-01, double 5.000000e-01, float %3)
%5 = call float @clamp(i32 %4, double 0.000000e+00, double 1.000000e+00)
ret float %5
}

LLVM IR (-O2):
define float @flareType2(float %0) {
%2 = tail call i32 @cubicPulse(double 5.000000e-01, double 5.000000e-01, float %0)
%3 = tail call float @clamp(i32 %2, double 0.000000e+00, double 1.000000e+00)
ret float %3
}