xunge/DecIR huggingface dataset:
void transfer_YUV888_to_YUV444P(unsigned char *output_y,
                                unsigned char *output_u,
                                unsigned char *output_v, unsigned char *input,
                                int output_column) {
  output_y[output_column] = input[0];
  output_u[output_column] = input[1];
  output_v[output_column] = input[2];
}


x86 assembly (clang, -O0):
<transfer_YUV888_to_YUV444P>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%dl
mov    -0x8(%rbp),%rax
movslq -0x24(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x20(%rbp),%rax
mov    0x1(%rax),%dl
mov    -0x10(%rbp),%rax
movslq -0x24(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x20(%rbp),%rax
mov    0x2(%rax),%dl
mov    -0x18(%rbp),%rax
movslq -0x24(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<transfer_YUV888_to_YUV444P>:
mov    (%rcx),%r9b
movslq %r8d,%r8
mov    %r9b,(%rdi,%r8,1)
mov    0x1(%rcx),%al
mov    %al,(%rsi,%r8,1)
mov    0x2(%rcx),%al
mov    %al,(%rdx,%r8,1)
ret

LLVM IR (-O0):
define void @transfer_YUV888_to_YUV444P(i8* %0, i8* %1, i8* %2, i8* %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%11 = load i8*, i8** %9
%12 = getelementptr inbounds i8, i8* %11, i64 0
%13 = load i8, i8* %12
%14 = load i8*, i8** %6
%15 = load i32, i32* %10
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
store i8 %13, i8* %17
%18 = load i8*, i8** %9
%19 = getelementptr inbounds i8, i8* %18, i64 1
%20 = load i8, i8* %19
%21 = load i8*, i8** %7
%22 = load i32, i32* %10
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
store i8 %20, i8* %24
%25 = load i8*, i8** %9
%26 = getelementptr inbounds i8, i8* %25, i64 2
%27 = load i8, i8* %26
%28 = load i8*, i8** %8
%29 = load i32, i32* %10
%30 = sext i32 %29 to i64
%31 = getelementptr inbounds i8, i8* %28, i64 %30
store i8 %27, i8* %31
ret void
}

LLVM IR (-O2):
define void @transfer_YUV888_to_YUV444P(i8* nocapture writeonly %0, i8* nocapture writeonly %1, i8* nocapture writeonly %2, i8* nocapture %3, i32 %4) {
%6 = load i8, i8* %3
%7 = sext i32 %4 to i64
%8 = getelementptr inbounds i8, i8* %0, i64 %7
store i8 %6, i8* %8
%9 = getelementptr inbounds i8, i8* %3, i64 1
%10 = load i8, i8* %9
%11 = getelementptr inbounds i8, i8* %1, i64 %7
store i8 %10, i8* %11
%12 = getelementptr inbounds i8, i8* %3, i64 2
%13 = load i8, i8* %12
%14 = getelementptr inbounds i8, i8* %2, i64 %7
store i8 %13, i8* %14
ret void
}
const char *__malidrv_build_info(void) {
  return "malidrv:  CONFIG=ux500 USING_OS_MEMORY=1 API_VERSION=9 "
         "REPO_URL=r2p3-01rel0 REVISION=r2p3-01rel0 "
         "CHANGED_REVISION=r2p3-01rel0 CHANGE_DATE=r2p3-01rel0 BUILD_DATE=Tue "
         "Aug 28 09:16:30 PDT 2012 BUILD=DEBUG CPU=ux500 USING_UMP=1 "
         "USING_HWMEM=1 USING_PMM=1 USING_MALI200=0 USING_MALI400=3 "
         "USING_MALI400_L2_CACHE=1 USING_GP2=0 KDIR= "
         "MALI_PLATFORM_FILE=platform/ux500/mali_platform.c "
         "OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=6 USING_PROFILING=0 "
         "USING_GPU_UTILIZATION=1 USING_MALI_RUN_TIME_PM=1";
}


x86 assembly (clang, -O0):
<__malidrv_build_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__malidrv_build_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [479 x i8] c"malidrv: CONFIG=ux500 USING_OS_MEMORY=1 API_VERSION=9 REPO_URL=r2p3-01rel0 REVISION=r2p3-01rel0 CHANGED_REVISION=r2p3-01rel0 CHANGE_DATE=r2p3-01rel0 BUILD_DATE=Tue Aug 28 09:16:30 PDT 2012 BUILD=DEBUG CPU=ux500 USING_UMP=1 USING_HWMEM=1 USING_PMM=1 USING_MALI200=0 USING_MALI400=3 USING_MALI400_L2_CACHE=1 USING_GP2=0 KDIR= MALI_PLATFORM_FILE=platform/ux500/mali_platform.c OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=6 USING_PROFILING=0 USING_GPU_UTILIZATION=1 USING_MALI_RUN_TIME_PM=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([479 x i8], [479 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [479 x i8] c"malidrv: CONFIG=ux500 USING_OS_MEMORY=1 API_VERSION=9 REPO_URL=r2p3-01rel0 REVISION=r2p3-01rel0 CHANGED_REVISION=r2p3-01rel0 CHANGE_DATE=r2p3-01rel0 BUILD_DATE=Tue Aug 28 09:16:30 PDT 2012 BUILD=DEBUG CPU=ux500 USING_UMP=1 USING_HWMEM=1 USING_PMM=1 USING_MALI200=0 USING_MALI400=3 USING_MALI400_L2_CACHE=1 USING_GP2=0 KDIR= MALI_PLATFORM_FILE=platform/ux500/mali_platform.c OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=6 USING_PROFILING=0 USING_GPU_UTILIZATION=1 USING_MALI_RUN_TIME_PM=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([479 x i8], [479 x i8]* @.str, i64 0, i64 0)
}
int min(int x, int y) {
  if (x < y)
    return x;
  return y;
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1121 <min+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <min+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
int __lesf2(float, float);
int _COM_CMPLEf(float a, float b) { return __lesf2(a, b) != 1; }


x86 assembly (clang, -O0):
<_COM_CMPLEf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <__lesf2@plt>
cmp    $0x1,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_COM_CMPLEf>:
push   %rax
call   1030 <__lesf2@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @_COM_CMPLEf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call i32 @__lesf2(float %5, float %6)
%8 = icmp ne i32 %7, 1
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @_COM_CMPLEf(float %0, float %1) {
%3 = tail call i32 @__lesf2(float %0, float %1)
%4 = icmp ne i32 %3, 1
%5 = zext i1 %4 to i32
ret i32 %5
}
void HALSTM25PM$HPLSTM25P$endCmd(void) { HPLSTM25PM$HPLSTM25P$endCmd(); }


x86 assembly (clang, -O0):
<HALSTM25PM$HPLSTM25P$endCmd>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HPLSTM25PM$HPLSTM25P$endCmd@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HALSTM25PM$HPLSTM25P$endCmd>:
xor    %eax,%eax
jmp    1030 <HPLSTM25PM$HPLSTM25P$endCmd@plt>

LLVM IR (-O0):
define void @"HALSTM25PM$HPLSTM25P$endCmd"() {
%1 = call i32 (...) @"HPLSTM25PM$HPLSTM25P$endCmd"()
ret void
}

LLVM IR (-O2):
define void @"HALSTM25PM$HPLSTM25P$endCmd"() {
%1 = tail call i32 (...) @"HPLSTM25PM$HPLSTM25P$endCmd"()
ret void
}
/* Type definitions */
struct timespec {
  int tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, struct timespec *);
void SimSleep(void) {
  struct timespec req, rem;
  req.tv_sec = 0;
  req.tv_nsec = 10000000;
  nanosleep(&req, &rem);
}


x86 assembly (clang, -O0):
<SimSleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movq   $0x0,-0x8(%rbp)
movl   $0x989680,-0x10(%rbp)
lea    -0x10(%rbp),%rdi
lea    -0x20(%rbp),%rsi
call   1030 <nanosleep@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SimSleep>:
sub    $0x28,%rsp
movq   $0x0,0x10(%rsp)
movl   $0x989680,0x8(%rsp)
lea    0x8(%rsp),%rdi
lea    0x18(%rsp),%rsi
call   1030 <nanosleep@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i64 }
define void @SimSleep() {
%1 = alloca %struct.timespec
%2 = alloca %struct.timespec
%3 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 1
store i64 0, i64* %3
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 0
store i32 10000000, i32* %4
%5 = call i32 @nanosleep(%struct.timespec* %1, %struct.timespec* %2)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i64 }
define void @SimSleep() {
%1 = alloca %struct.timespec
%2 = alloca %struct.timespec
%3 = bitcast %struct.timespec* %1 to i8*
%4 = bitcast %struct.timespec* %2 to i8*
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
store i64 0, i64* %5
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
store i32 10000000, i32* %6
%7 = call i32 @nanosleep(%struct.timespec* %1, %struct.timespec* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ db_begin();
int /*<<< orphan*/ db_write();
void init(void) {
  db_write();
  db_begin();
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <db_write@plt>
mov    $0x0,%al
call   1030 <db_begin@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
push   %rax
xor    %eax,%eax
call   1040 <db_write@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <db_begin@plt>

LLVM IR (-O0):
define void @init() {
%1 = call i32 (...) @db_write()
%2 = call i32 (...) @db_begin()
ret void
}

LLVM IR (-O2):
define void @init() {
%1 = tail call i32 (...) @db_write()
%2 = tail call i32 (...) @db_begin()
ret void
}
void dloc() {}


x86 assembly (clang, -O0):
<dloc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dloc>:
ret

LLVM IR (-O0):
define void @dloc() {
ret void
}

LLVM IR (-O2):
define void @dloc() {
ret void
}
/* Variables and functions */
int namelist_cmp(char const *, char const *);
int namelist_cmp_indirect(const void *a, const void *b) {
  return namelist_cmp(*(const char **)a, *(const char **)b);
}


x86 assembly (clang, -O0):
<namelist_cmp_indirect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <namelist_cmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<namelist_cmp_indirect>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <namelist_cmp@plt>

LLVM IR (-O0):
define i32 @namelist_cmp_indirect(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i8**
%7 = load i8*, i8** %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i8**
%10 = load i8*, i8** %9
%11 = call i32 @namelist_cmp(i8* %7, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @namelist_cmp_indirect(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @namelist_cmp(i8* %4, i8* %6)
ret i32 %7
}
/* Variables and functions */
int close(int);
int /*<<< orphan*/ perror(char *);
void close_fd(int fd) {
  if (close(fd) == -1) {
    perror("close");
  }
}


x86 assembly (clang, -O0):
<close_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
cmp    $0xffffffff,%eax
jne    1148 <close_fd+0x28>
lea    0xebd(%rip),%rdi
call   1040 <perror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_fd>:
push   %rax
call   1030 <close@plt>
cmp    $0xffffffff,%eax
je     112d <close_fd+0xd>
pop    %rax
ret
lea    0xecc(%rip),%rdi
pop    %rax
jmp    1040 <perror@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"close\00"
define void @close_fd(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @perror(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"close\00"
define void @close_fd(i32 %0) {
%2 = tail call i32 @close(i32 %0)
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @perror(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
char *ptsname(int fd) {
  errno = ENOSYS;
  return 0;
}


x86 assembly (clang, -O0):
<ptsname>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    0x2eda(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec1(%rip),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptsname>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i8* @ptsname(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i8* null
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define noalias i8* @ptsname(i32 %0) {
%2 = load i32, i32* @ENOSYS
store i32 %2, i32* @errno
ret i8* null
}
int test_imm_ECint64_highword_mem(long long *val) {
  return ((*val >> 32) & (0xEC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_ECint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x20,%rdx
and    $0xec,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_ECint64_highword_mem>:
testb  $0xec,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_ECint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 32
%6 = and i64 %5, 236
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_ECint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 1013612281856
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int errno;
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
int posix_memalign(void **, size_t, size_t);
void *PINT_mem_aligned_alloc(size_t size, size_t alignment) {
  int ret = 0;
  void *ptr;
  ret = posix_memalign(&ptr, alignment, size);
  if (ret != 0) {
    errno = ret;
    return NULL;
  }
  memset(ptr, 0, size);
  return ptr;
}


x86 assembly (clang, -O0):
<PINT_mem_aligned_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x18(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    -0x28(%rbp),%rdi
call   1040 <posix_memalign@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
je     116e <PINT_mem_aligned_alloc+0x4e>
mov    -0x1c(%rbp),%ecx
mov    0x2e81(%rip),%rax
mov    %ecx,(%rax)
movq   $0x0,-0x8(%rbp)
jmp    1185 <PINT_mem_aligned_alloc+0x65>
mov    -0x28(%rbp),%rdi
mov    -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x28(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PINT_mem_aligned_alloc>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0x8(%rsp),%rdi
mov    %rbx,%rdx
call   1040 <posix_memalign@plt>
test   %eax,%eax
je     1146 <PINT_mem_aligned_alloc+0x26>
mov    0x2ea0(%rip),%rcx
mov    %eax,(%rcx)
xor    %eax,%eax
jmp    115a <PINT_mem_aligned_alloc+0x3a>
mov    0x8(%rsp),%rdi
xor    %esi,%esi
mov    %rbx,%rdx
call   1030 <memset@plt>
mov    0x8(%rsp),%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@errno = global i32 0
define i8* @PINT_mem_aligned_alloc(i64 %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
%6 = alloca i32
%7 = alloca i8*
store i64 %0, i64* %4
store i64 %1, i64* %5
store i32 0, i32* %6
%8 = load i64, i64* %5
%9 = load i64, i64* %4
%10 = call i32 @posix_memalign(i8** %7, i64 %8, i64 %9)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %2
%14 = load i32, i32* %6
store i32 %14, i32* @errno
store i8* null, i8** %3
br label %20
15: ; preds = %2
%16 = load i8*, i8** %7
%17 = load i64, i64* %4
%18 = call i32 @memset(i8* %16, i32 0, i64 %17)
%19 = load i8*, i8** %7
store i8* %19, i8** %3
br label %20
20: ; preds = %15, %13
%21 = load i8*, i8** %3
ret i8* %21
}

LLVM IR (-O2):
@errno = global i32 0
define i8* @PINT_mem_aligned_alloc(i64 %0, i64 %1) {
%3 = alloca i8*
%4 = bitcast i8** %3 to i8*
%5 = call i32 @posix_memalign(i8** %3, i64 %1, i64 %0)
%6 = icmp eq i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %2
store i32 %5, i32* @errno
br label %12
8: ; preds = %2
%9 = load i8*, i8** %3
%10 = call i32 @memset(i8* %9, i32 0, i64 %0)
%11 = load i8*, i8** %3
br label %12
12: ; preds = %8, %7
%13 = phi i8* [ null, %7 ], [ %11, %8 ]
ret i8* %13
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int x;
  int y;
  x = __VERIFIER_nondet_int();
  y = __VERIFIER_nondet_int();
  while (x > y) {
    x = x - 1;
    y = y + 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1156 <main+0x46>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1133 <main+0x23>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %4, i32* %2
%5 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %5, i32* %3
br label %6
6: ; preds = %10, %0
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = icmp sgt i32 %7, %8
br i1 %9, label %10, label %15
10: ; preds = %6
%11 = load i32, i32* %2
%12 = sub nsw i32 %11, 1
store i32 %12, i32* %2
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %6
15: ; preds = %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ SetPalette(int /*<<< orphan*/, int, unsigned char *);
void InitializePalette(void) {
  static unsigned char tableRgb[16 * 3] = {
      0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, 0xff, 0x00, 0xff, 0xff, 0x00,
      0x00, 0x00, 0xff, 0xff, 0x00, 0xff, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff,
      0xc6, 0xc6, 0xc6, 0x84, 0x00, 0x00, 0x00, 0x84, 0x00, 0x84, 0x84, 0x00,
      0x00, 0x00, 0x84, 0x84, 0x00, 0x84, 0x00, 0x84, 0x84, 0x84, 0x84, 0x84};
  SetPalette(0, 15, tableRgb);
  return;
}


x86 assembly (clang, -O0):
<InitializePalette>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0xf,%esi
lea    0x2f0e(%rip),%rdx
call   1030 <SetPalette@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<InitializePalette>:
lea    0x2f19(%rip),%rdx
xor    %edi,%edi
mov    $0xf,%esi
jmp    1030 <SetPalette@plt>

LLVM IR (-O0):
@InitializePalette.tableRgb = internal global [48 x i8] c"\00\00\00\FF\00\00\00\FF\00\FF\FF\00\00\00\FF\FF\00\FF\00\FF\FF\FF\FF\FF\C6\C6\C6\84\00\00\00\84\00\84\84\00\00\00\84\84\00\84\00\84\84\84\84\84"
define void @InitializePalette() {
%1 = call i32 @SetPalette(i32 0, i32 15, i8* getelementptr inbounds ([48 x i8], [48 x i8]* @InitializePalette.tableRgb, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@InitializePalette.tableRgb = internal global [48 x i8] c"\00\00\00\FF\00\00\00\FF\00\FF\FF\00\00\00\FF\FF\00\FF\00\FF\FF\FF\FF\FF\C6\C6\C6\84\00\00\00\84\00\84\84\00\00\00\84\84\00\84\00\84\84\84\84\84"
define void @InitializePalette() {
%1 = tail call i32 @SetPalette(i32 0, i32 15, i8* getelementptr inbounds ([48 x i8], [48 x i8]* @InitializePalette.tableRgb, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_srli_pi16(int /*<<< orphan*/, int);
__m64 test_mm_srli_pi16(__m64 a) { return _mm_srli_pi16(a, 3); }


x86 assembly (clang, -O0):
<test_mm_srli_pi16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x3,%esi
call   1030 <_mm_srli_pi16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_srli_pi16>:
mov    $0x3,%esi
jmp    1030 <_mm_srli_pi16@plt>

LLVM IR (-O0):
define i32 @test_mm_srli_pi16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_mm_srli_pi16(i32 %3, i32 3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test_mm_srli_pi16(i32 %0) {
%2 = tail call i32 @_mm_srli_pi16(i32 %0, i32 3)
ret i32 %2
}
int bitCount(unsigned int n) {
  int count = 0;
  while (n) {
    count += n & 0x1;
    n >>= 1;
  }
  return count;
}


x86 assembly (clang, -O0):
<bitCount>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1132 <bitCount+0x32>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <bitCount+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitCount>:
xor    %eax,%eax
test   %edi,%edi
je     1120 <bitCount+0x20>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
add    %edx,%eax
shr    %ecx
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <bitCount+0x10>
ret

LLVM IR (-O0):
define i32 @bitCount(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, i32* %2
%9 = and i32 %8, 1
%10 = load i32, i32* %3
%11 = add i32 %10, %9
store i32 %11, i32* %3
%12 = load i32, i32* %2
%13 = lshr i32 %12, 1
store i32 %13, i32* %2
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @bitCount(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = and i32 %5, 1
%7 = add i32 %4, %6
%8 = lshr i32 %5, 1
%9 = icmp ult i32 %5, 2
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %11
}
void snd_remove_proc_entry(struct proc_dir_entry *parent,
                           struct proc_dir_entry *de) {
  ;
}


x86 assembly (clang, -O0):
<snd_remove_proc_entry>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<snd_remove_proc_entry>:
ret

LLVM IR (-O0):
%struct.proc_dir_entry = type opaque
define void @snd_remove_proc_entry(%struct.proc_dir_entry* %0, %struct.proc_dir_entry* %1) {
%3 = alloca %struct.proc_dir_entry*
%4 = alloca %struct.proc_dir_entry*
store %struct.proc_dir_entry* %0, %struct.proc_dir_entry** %3
store %struct.proc_dir_entry* %1, %struct.proc_dir_entry** %4
ret void
}

LLVM IR (-O2):
%struct.proc_dir_entry = type opaque
define void @snd_remove_proc_entry(%struct.proc_dir_entry* nocapture %0, %struct.proc_dir_entry* nocapture %1) {
ret void
}
/* Type definitions */
struct macro {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct macro *);
void macro_dealloc(struct macro *m) { free(m); }


x86 assembly (clang, -O0):
<macro_dealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<macro_dealloc>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.macro = type { i32 }
define void @macro_dealloc(%struct.macro* %0) {
%2 = alloca %struct.macro*
store %struct.macro* %0, %struct.macro** %2
%3 = load %struct.macro*, %struct.macro** %2
%4 = call i32 @free(%struct.macro* %3)
ret void
}

LLVM IR (-O2):
%struct.macro = type { i32 }
define void @macro_dealloc(%struct.macro* nocapture %0) {
%2 = tail call i32 @free(%struct.macro* %0)
ret void
}
/* Variables and functions */
scalar_t__ alloca(int);
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ strcpy(char *, char *);
int main(int argc, char **argv) {
  char *C = (char *)alloca(argc);
  strcpy(C, argv[0]);
  puts(C);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <alloca@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
call   1050 <alloca@plt>
mov    %rax,%rbx
mov    (%r14),%rsi
mov    %rax,%rdi
call   1030 <strcpy@plt>
mov    %rbx,%rdi
call   1040 <puts@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i8*
store i32 %0, i32* %3
store i8** %1, i8*** %4
%6 = load i32, i32* %3
%7 = call i64 @alloca(i32 %6)
%8 = inttoptr i64 %7 to i8*
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = load i8**, i8*** %4
%11 = getelementptr inbounds i8*, i8** %10, i64 0
%12 = load i8*, i8** %11
%13 = call i32 @strcpy(i8* %9, i8* %12)
%14 = load i8*, i8** %5
%15 = call i32 @puts(i8* %14)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = tail call i64 @alloca(i32 %0)
%4 = inttoptr i64 %3 to i8*
%5 = load i8*, i8** %1
%6 = tail call i32 @strcpy(i8* %4, i8* %5)
%7 = tail call i32 @puts(i8* dereferenceable(1) %4)
ret i32 0
}
/* Variables and functions */
int EOF;
int /*<<< orphan*/ exit(int);
int scanf(char *, int *);
void read_int(int *n) {
  int result = scanf("%d", n);
  if (result == EOF) {
    exit(-1);
  }
}


x86 assembly (clang, -O0):
<read_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <scanf@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    0x2e9f(%rip),%rcx
cmp    (%rcx),%eax
jne    115b <read_int+0x3b>
mov    $0xffffffff,%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_int>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <scanf@plt>
mov    0x2eb1(%rip),%rcx
cmp    (%rcx),%eax
je     113d <read_int+0x1d>
pop    %rax
ret
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@EOF = global i32 0
define void @read_int(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = load i32, i32* @EOF
%8 = icmp eq i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = call i32 @exit(i32 -1)
unreachable
11: ; preds = %1
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@EOF = global i32 0
define void @read_int(i32* %0) {
%2 = tail call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %0)
%3 = load i32, i32* @EOF
%4 = icmp eq i32 %2, %3
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @exit(i32 -1)
unreachable
7: ; preds = %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ X509;
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int /*<<< orphan*/ PEM_write_bio_X509(int /*<<< orphan*/ *,
                                      int /*<<< orphan*/ *);
int write_X509_to_BIO(X509 *cert, BIO *bio) {
  if (!PEM_write_bio_X509(bio, cert)) {
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<write_X509_to_BIO>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <PEM_write_bio_X509@plt>
cmp    $0x0,%eax
jne    1142 <write_X509_to_BIO+0x32>
movl   $0xffffffff,-0x4(%rbp)
jmp    1149 <write_X509_to_BIO+0x39>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_X509_to_BIO>:
push   %rax
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
call   1030 <PEM_write_bio_X509@plt>
cmp    $0x1,%eax
sbb    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @write_X509_to_BIO(i32* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
%6 = load i32*, i32** %5
%7 = load i32*, i32** %4
%8 = call i32 @PEM_write_bio_X509(i32* %6, i32* %7)
%9 = icmp ne i32 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %2
store i32 -1, i32* %3
br label %12
11: ; preds = %2
store i32 0, i32* %3
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @write_X509_to_BIO(i32* %0, i32* %1) {
%3 = tail call i32 @PEM_write_bio_X509(i32* %1, i32* %0)
%4 = icmp eq i32 %3, 0
%5 = sext i1 %4 to i32
ret i32 %5
}
txt_metaspecial(type, leng, mess) char *mess;
{
  prtime();
  printf("Meta event, sequencer-specific, type=0x%02x leng=%d\n", type, leng);
}


x86 assembly (clang, -O0):
<txt_metaspecial>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x0,%al
call   1040 <prtime@plt>
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xeba(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<txt_metaspecial>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1040 <prtime@plt>
lea    0xecb(%rip),%rdi
mov    %ebp,%esi
mov    %ebx,%edx
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [53 x i8] c"Meta event, sequencer-specific, type=0x%02x leng=%d\0A\00"
define i32 @txt_metaspecial(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
%8 = call i32 (...) @prtime()
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i32 %9, i32 %10)
%12 = load i32, i32* %4
ret i32 %12
}

LLVM IR (-O2):
@.str = [53 x i8] c"Meta event, sequencer-specific, type=0x%02x leng=%d\0A\00"
define i32 @txt_metaspecial(i32 %0, i32 %1, i8* nocapture readnone %2) {
%4 = tail call i32 (...) @prtime()
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1)
ret i32 undef
}
void baseConversion(char *s, int n, int base) {
  int i;
  for (i = 0; n != 0; ++i, n /= base)
    s[i] = n % base + '0';
}


x86 assembly (clang, -O0):
<baseConversion>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     114e <baseConversion+0x4e>
mov    -0xc(%rbp),%eax
cltd
idivl  -0x10(%rbp)
add    $0x30,%edx
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%eax
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
jmp    1115 <baseConversion+0x15>
pop    %rbp
ret

x86 assembly (clang, -O2):
<baseConversion>:
test   %esi,%esi
je     1120 <baseConversion+0x20>
mov    %edx,%ecx
mov    %esi,%eax
nopl   0x0(%rax,%rax,1)
cltd
idiv   %ecx
add    $0x30,%dl
mov    %dl,(%rdi)
add    $0x1,%rdi
test   %eax,%eax
jne    1110 <baseConversion+0x10>
ret

LLVM IR (-O0):
define void @baseConversion(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %21, %3
%9 = load i32, i32* %5
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %27
11: ; preds = %8
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = srem i32 %12, %13
%15 = add nsw i32 %14, 48
%16 = trunc i32 %15 to i8
%17 = load i8*, i8** %4
%18 = load i32, i32* %7
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i8, i8* %17, i64 %19
store i8 %16, i8* %20
br label %21
21: ; preds = %11
%22 = load i32, i32* %7
%23 = add nsw i32 %22, 1
store i32 %23, i32* %7
%24 = load i32, i32* %6
%25 = load i32, i32* %5
%26 = sdiv i32 %25, %24
store i32 %26, i32* %5
br label %8
27: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @baseConversion(i8* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %1, 0
br i1 %4, label %15, label %5
5: ; preds = %3, %5
%6 = phi i64 [ %12, %5 ], [ 0, %3 ]
%7 = phi i32 [ %13, %5 ], [ %1, %3 ]
%8 = srem i32 %7, %2
%9 = trunc i32 %8 to i8
%10 = add i8 %9, 48
%11 = getelementptr inbounds i8, i8* %0, i64 %6
store i8 %10, i8* %11
%12 = add nuw i64 %6, 1
%13 = sdiv i32 %7, %2
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %3
ret void
}
char *toStr2() {
  char s[] = "abcdefghijkl";
  return s;
}


x86 assembly (clang, -O0):
<toStr2>:
push   %rbp
mov    %rsp,%rbp
mov    0xef5(%rip),%rax
mov    %rax,-0xd(%rbp)
mov    0xef3(%rip),%eax
mov    %eax,-0x5(%rbp)
mov    0xeee(%rip),%al
mov    %al,-0x1(%rbp)
lea    -0xd(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<toStr2>:
lea    -0xd(%rsp),%rax
ret

LLVM IR (-O0):
@__const.toStr2.s = [13 x i8] c"abcdefghijkl\00"
define i8* @toStr2() {
%1 = alloca [13 x i8]
%2 = bitcast [13 x i8]* %1 to i8*
%3 = getelementptr inbounds [13 x i8], [13 x i8]* %1, i64 0, i64 0
ret i8* %3
}

LLVM IR (-O2):
define noalias i8* @toStr2() {
%1 = alloca [13 x i8]
%2 = getelementptr inbounds [13 x i8], [13 x i8]* %1, i64 0, i64 0
ret i8* %2
}
/* Type definitions */
typedef int uint32_t;
typedef int int8_t;

/* Variables and functions */
__attribute__((always_)) int detexPixel32GetSignedG8(uint32_t pixel) {
  return (int8_t)((pixel & 0xFF00) >> 8);
}


x86 assembly (clang, -O0):
<detexPixel32GetSignedG8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
sar    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<detexPixel32GetSignedG8>:
mov    %edi,%eax
movzbl %ah,%eax
ret

LLVM IR (-O0):
define i32 @detexPixel32GetSignedG8(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 65280
%5 = ashr i32 %4, 8
ret i32 %5
}

LLVM IR (-O2):
define i32 @detexPixel32GetSignedG8(i32 %0) {
%2 = lshr i32 %0, 8
%3 = and i32 %2, 255
ret i32 %3
}
/* Type definitions */
struct kvm {
  int dummy;
};

/* Variables and functions */
char *strncpy(char *, char *, size_t);
char *symbol__lookup(struct kvm *kvm, unsigned long addr, char *sym,
                     size_t size) {
  char *s = strncpy(sym, "<unknown>", size);
  sym[size - 1] = '\0';
  return s;
}


x86 assembly (clang, -O0):
<symbol__lookup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rdx
lea    0xec9(%rip),%rsi
call   1030 <strncpy@plt>
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x20(%rbp),%rcx
sub    $0x1,%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x28(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<symbol__lookup>:
push   %r14
push   %rbx
push   %rax
mov    %rcx,%r14
mov    %rdx,%rbx
lea    0xedf(%rip),%rsi
mov    %rdx,%rdi
mov    %rcx,%rdx
call   1030 <strncpy@plt>
movb   $0x0,-0x1(%r14,%rbx,1)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.kvm = type { i32 }
@.str = [10 x i8] c"<unknown>\00"
define i8* @symbol__lookup(%struct.kvm* %0, i64 %1, i8* %2, i64 %3) {
%5 = alloca %struct.kvm*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i8*
store %struct.kvm* %0, %struct.kvm** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%10 = load i8*, i8** %7
%11 = load i64, i64* %8
%12 = call i8* @strncpy(i8* %10, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i64 %11)
store i8* %12, i8** %9
%13 = load i8*, i8** %7
%14 = load i64, i64* %8
%15 = sub i64 %14, 1
%16 = getelementptr inbounds i8, i8* %13, i64 %15
store i8 0, i8* %16
%17 = load i8*, i8** %9
ret i8* %17
}

LLVM IR (-O2):
%struct.kvm = type { i32 }
@.str = [10 x i8] c"<unknown>\00"
define i8* @symbol__lookup(%struct.kvm* nocapture readnone %0, i64 %1, i8* returned %2, i64 %3) {
%5 = tail call i8* @strncpy(i8* dereferenceable(1) %2, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i64 %3)
%6 = add i64 %3, -1
%7 = getelementptr inbounds i8, i8* %2, i64 %6
store i8 0, i8* %7
ret i8* %2
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ display;
};
struct TYPE_4__ {
  TYPE_1__ xexpose;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void *get_XEvent_xexpose_display(void *_p) {
  return (void *)((XEvent *)_p)->xexpose.display;
}


x86 assembly (clang, -O0):
<get_XEvent_xexpose_display>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xexpose_display>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i8* @get_XEvent_xexpose_display(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = inttoptr i64 %7 to i8*
ret i8* %8
}

LLVM IR (-O2):
define i8* @get_XEvent_xexpose_display(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = inttoptr i64 %3 to i8*
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ bothCasedCharsConvertedToColumnIndex();
int /*<<< orphan*/ invalidCharConvertedToInvalidColumnIndex();
int /*<<< orphan*/ invalidColumnIndicesConvertedToQuestionMark();
int /*<<< orphan*/ validColumnIndicesConvertedToUpperCaseChars();
void testBoardColumn(void) {
  bothCasedCharsConvertedToColumnIndex();
  invalidCharConvertedToInvalidColumnIndex();
  validColumnIndicesConvertedToUpperCaseChars();
  invalidColumnIndicesConvertedToQuestionMark();
}


x86 assembly (clang, -O0):
<testBoardColumn>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <bothCasedCharsConvertedToColumnIndex@plt>
mov    $0x0,%al
call   1060 <invalidCharConvertedToInvalidColumnIndex@plt>
mov    $0x0,%al
call   1050 <validColumnIndicesConvertedToUpperCaseChars@plt>
mov    $0x0,%al
call   1030 <invalidColumnIndicesConvertedToQuestionMark@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<testBoardColumn>:
push   %rax
xor    %eax,%eax
call   1040 <bothCasedCharsConvertedToColumnIndex@plt>
xor    %eax,%eax
call   1060 <invalidCharConvertedToInvalidColumnIndex@plt>
xor    %eax,%eax
call   1050 <validColumnIndicesConvertedToUpperCaseChars@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <invalidColumnIndicesConvertedToQuestionMark@plt>

LLVM IR (-O0):
define void @testBoardColumn() {
%1 = call i32 (...) @bothCasedCharsConvertedToColumnIndex()
%2 = call i32 (...) @invalidCharConvertedToInvalidColumnIndex()
%3 = call i32 (...) @validColumnIndicesConvertedToUpperCaseChars()
%4 = call i32 (...) @invalidColumnIndicesConvertedToQuestionMark()
ret void
}

LLVM IR (-O2):
define void @testBoardColumn() {
%1 = tail call i32 (...) @bothCasedCharsConvertedToColumnIndex()
%2 = tail call i32 (...) @invalidCharConvertedToInvalidColumnIndex()
%3 = tail call i32 (...) @validColumnIndicesConvertedToUpperCaseChars()
%4 = tail call i32 (...) @invalidColumnIndicesConvertedToQuestionMark()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
char *strerror(int);
void exit_error(int err_num) {
  fprintf(stderr, "failure: %s\n", strerror(err_num));
  exit(1);
}


x86 assembly (clang, -O0):
<exit_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2e9e(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <strerror@plt>
mov    -0x8(%rbp),%edi
mov    %rax,%rdx
lea    0xea4(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<exit_error>:
push   %rbx
mov    0x2ea8(%rip),%rax
mov    (%rax),%ebx
call   1050 <strerror@plt>
lea    0xeba(%rip),%rsi
mov    %ebx,%edi
mov    %rax,%rdx
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [13 x i8] c"failure: %s\0A\00"
define void @exit_error(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @stderr
%4 = load i32, i32* %2
%5 = call i8* @strerror(i32 %4)
%6 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [13 x i8] c"failure: %s\0A\00"
define void @exit_error(i32 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i8* @strerror(i32 %0)
%4 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int unlink(char const *);
int outside_unlink(const char *path) { return unlink(path); }


x86 assembly (clang, -O0):
<outside_unlink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <unlink@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outside_unlink>:
jmp    1030 <unlink@plt>

LLVM IR (-O0):
define i32 @outside_unlink(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @unlink(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @outside_unlink(i8* nocapture %0) {
%2 = tail call i32 @unlink(i8* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int XSetTransientForHint() {
  printf("XSetTransientForHint called\n");
  return 0;
}


x86 assembly (clang, -O0):
<XSetTransientForHint>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XSetTransientForHint>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"XSetTransientForHint called\0A\00"
define i32 @XSetTransientForHint() {
%1 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [28 x i8] c"XSetTransientForHint called\00"
define i32 @XSetTransientForHint() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
ret i32 0
}
float edge_func(float f) { return (1.0 / (1.2 - f)); }


x86 assembly (clang, -O0):
<edge_func>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xeee(%rip),%xmm1
subsd  %xmm0,%xmm1
movsd  0xeda(%rip),%xmm0
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<edge_func>:
cvtss2sd %xmm0,%xmm0
movsd  0xef4(%rip),%xmm1
subsd  %xmm0,%xmm1
movsd  0xef0(%rip),%xmm0
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @edge_func(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fsub double 1.200000e+00, %4
%6 = fdiv double 1.000000e+00, %5
%7 = fptrunc double %6 to float
ret float %7
}

LLVM IR (-O2):
define float @edge_func(float %0) {
%2 = fpext float %0 to double
%3 = fsub double 1.200000e+00, %2
%4 = fdiv double 1.000000e+00, %3
%5 = fptrunc double %4 to float
ret float %5
}
/* Type definitions */
typedef int /*<<< orphan*/ siginfo_t;

/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ ctxstracefd(void *, int);
int /*<<< orphan*/ dummy_function();
void sig_handler(int signo, siginfo_t *siginfo, void *ucontext) {
  dummy_function();
  ctxstracefd(ucontext, 2);
  abort();
}


x86 assembly (clang, -O0):
<sig_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x0,%al
call   1050 <dummy_function@plt>
mov    -0x18(%rbp),%rdi
mov    $0x2,%esi
call   1040 <ctxstracefd@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<sig_handler>:
push   %rbx
mov    %rdx,%rbx
xor    %eax,%eax
call   1050 <dummy_function@plt>
mov    %rbx,%rdi
mov    $0x2,%esi
call   1040 <ctxstracefd@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @sig_handler(i32 %0, i32* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i8*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i8* %2, i8** %6
%7 = call i32 (...) @dummy_function()
%8 = load i8*, i8** %6
%9 = call i32 @ctxstracefd(i8* %8, i32 2)
%10 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define void @sig_handler(i32 %0, i32* nocapture readnone %1, i8* %2) {
%4 = tail call i32 (...) @dummy_function()
%5 = tail call i32 @ctxstracefd(i8* %2, i32 2)
%6 = tail call i32 (...) @abort()
unreachable
}
/* Type definitions */
typedef int uint32_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ pci_dummy_write(int /*<<< orphan*/, int, void *);
void pci_dummy_writel(uint16_t Port, uint32_t Val, void *p) {
  pci_dummy_write(Port, Val & 0xFF, p);
}


x86 assembly (clang, -O0):
<pci_dummy_writel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
and    $0xff,%esi
mov    -0x10(%rbp),%rdx
call   1030 <pci_dummy_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_dummy_writel>:
movzbl %sil,%esi
jmp    1030 <pci_dummy_write@plt>

LLVM IR (-O0):
define void @pci_dummy_writel(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = and i32 %8, 255
%10 = load i8*, i8** %6
%11 = call i32 @pci_dummy_write(i32 %7, i32 %9, i8* %10)
ret void
}

LLVM IR (-O2):
define void @pci_dummy_writel(i32 %0, i32 %1, i8* %2) {
%4 = and i32 %1, 255
%5 = tail call i32 @pci_dummy_write(i32 %0, i32 %4, i8* %2)
ret void
}