xunge/DecIR huggingface dataset:
int ack(int m, int n) {
  if (m == 0)
    return n + 1;
  if (n == 0)
    return ack(m - 1, 1);
  return ack(m - 1, ack(m, n - 1));
}


x86 assembly (clang, -O0):
<ack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1136 <ack+0x26>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    117c <ack+0x6c>
cmpl   $0x0,-0xc(%rbp)
jne    1158 <ack+0x48>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
mov    $0x1,%esi
call   1030 <ack@plt>
mov    %eax,-0x4(%rbp)
jmp    117c <ack+0x6c>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
sub    $0x1,%esi
call   1030 <ack@plt>
mov    -0x10(%rbp),%edi
mov    %eax,%esi
call   1030 <ack@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ack>:
push   %rbx
mov    %esi,%eax
test   %edi,%edi
je     113f <ack+0x2f>
mov    %edi,%ebx
jmp    112a <ack+0x1a>
nopl   0x0(%rax,%rax,1)
mov    $0x1,%eax
add    $0xffffffff,%ebx
je     113f <ack+0x2f>
test   %eax,%eax
je     1120 <ack+0x10>
add    $0xffffffff,%eax
mov    %ebx,%edi
mov    %eax,%esi
call   1030 <ack@plt>
add    $0xffffffff,%ebx
jne    112a <ack+0x1a>
add    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ack(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* %5
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
br label %26
11: ; preds = %2
%12 = load i32, i32* %5
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %11
%15 = load i32, i32* %4
%16 = sub nsw i32 %15, 1
%17 = call i32 @ack(i32 %16, i32 1)
store i32 %17, i32* %3
br label %26
18: ; preds = %11
%19 = load i32, i32* %4
%20 = sub nsw i32 %19, 1
%21 = load i32, i32* %4
%22 = load i32, i32* %5
%23 = sub nsw i32 %22, 1
%24 = call i32 @ack(i32 %21, i32 %23)
%25 = call i32 @ack(i32 %20, i32 %24)
store i32 %25, i32* %3
br label %26
26: ; preds = %18, %14, %8
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @ack(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %4, label %7
4: ; preds = %11, %2
%5 = phi i32 [ %1, %2 ], [ %12, %11 ]
%6 = add nsw i32 %5, 1
ret i32 %6
7: ; preds = %2, %11
%8 = phi i32 [ %12, %11 ], [ %1, %2 ]
%9 = phi i32 [ %13, %11 ], [ %0, %2 ]
%10 = icmp eq i32 %8, 0
br i1 %10, label %11, label %15
11: ; preds = %7, %15
%12 = phi i32 [ %17, %15 ], [ 1, %7 ]
%13 = add nsw i32 %9, -1
%14 = icmp eq i32 %13, 0
br i1 %14, label %4, label %7
15: ; preds = %7
%16 = add nsw i32 %8, -1
%17 = tail call i32 @ack(i32 %9, i32 %16)
br label %11
}
char *langRomTypePanasonic32() { return "Panasonic 32kB SRAM"; }


x86 assembly (clang, -O0):
<langRomTypePanasonic32>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langRomTypePanasonic32>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [20 x i8] c"Panasonic 32kB SRAM\00"
define i8* @langRomTypePanasonic32() {
ret i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [20 x i8] c"Panasonic 32kB SRAM\00"
define i8* @langRomTypePanasonic32() {
ret i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct ne_md5_ctx {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ md5_init_ctx(struct ne_md5_ctx *);
extern void ne_md5_reset_ctx(struct ne_md5_ctx *ctx) { md5_init_ctx(ctx); }


x86 assembly (clang, -O0):
<ne_md5_reset_ctx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <md5_init_ctx@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ne_md5_reset_ctx>:
jmp    1030 <md5_init_ctx@plt>

LLVM IR (-O0):
%struct.ne_md5_ctx = type { i32 }
define void @ne_md5_reset_ctx(%struct.ne_md5_ctx* %0) {
%2 = alloca %struct.ne_md5_ctx*
store %struct.ne_md5_ctx* %0, %struct.ne_md5_ctx** %2
%3 = load %struct.ne_md5_ctx*, %struct.ne_md5_ctx** %2
%4 = call i32 @md5_init_ctx(%struct.ne_md5_ctx* %3)
ret void
}

LLVM IR (-O2):
%struct.ne_md5_ctx = type { i32 }
define void @ne_md5_reset_ctx(%struct.ne_md5_ctx* %0) {
%2 = tail call i32 @md5_init_ctx(%struct.ne_md5_ctx* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ initialize_events();
int /*<<< orphan*/ initialize_robots();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
void initialize() {
  srand(time(NULL));
  initialize_robots();
  initialize_events();
}


x86 assembly (clang, -O0):
<initialize>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
mov    $0x0,%al
call   1060 <initialize_robots@plt>
mov    $0x0,%al
call   1050 <initialize_events@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
xor    %eax,%eax
call   1060 <initialize_robots@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <initialize_events@plt>

LLVM IR (-O0):
define void @initialize() {
%1 = call i32 @time(i32* null)
%2 = call i32 @srand(i32 %1)
%3 = call i32 (...) @initialize_robots()
%4 = call i32 (...) @initialize_events()
ret void
}

LLVM IR (-O2):
define void @initialize() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 @srand(i32 %1)
%3 = tail call i32 (...) @initialize_robots()
%4 = tail call i32 (...) @initialize_events()
ret void
}
/* Type definitions */
struct usbdevfs_ioctl {
  int ifno;
  unsigned int ioctl_code;
  void *data;
};

/* Variables and functions */
int /*<<< orphan*/ USBDEVFS_IOCTL;
int ioctl(int, int /*<<< orphan*/, struct usbdevfs_ioctl *);
int usbdev_ioctl(int fd, int ifno, unsigned request, void *param) {
  struct usbdevfs_ioctl wrapper;
  wrapper.ifno = ifno;
  wrapper.ioctl_code = request;
  wrapper.data = param;
  return ioctl(fd, USBDEVFS_IOCTL, &wrapper);
}


x86 assembly (clang, -O0):
<usbdev_ioctl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ea5(%rip),%rax
mov    (%rax),%esi
lea    -0x28(%rbp),%rdx
call   1030 <ioctl@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usbdev_ioctl>:
sub    $0x18,%rsp
mov    %esi,0x8(%rsp)
mov    %edx,0xc(%rsp)
mov    %rcx,0x10(%rsp)
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
lea    0x8(%rsp),%rdx
call   1030 <ioctl@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.usbdevfs_ioctl = type { i32, i32, i8* }
@USBDEVFS_IOCTL = global i32 0
define i32 @usbdev_ioctl(i32 %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
%9 = alloca %struct.usbdevfs_ioctl
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%10 = load i32, i32* %6
%11 = getelementptr inbounds %struct.usbdevfs_ioctl, %struct.usbdevfs_ioctl* %9, i32 0, i32 0
store i32 %10, i32* %11
%12 = load i32, i32* %7
%13 = getelementptr inbounds %struct.usbdevfs_ioctl, %struct.usbdevfs_ioctl* %9, i32 0, i32 1
store i32 %12, i32* %13
%14 = load i8*, i8** %8
%15 = getelementptr inbounds %struct.usbdevfs_ioctl, %struct.usbdevfs_ioctl* %9, i32 0, i32 2
store i8* %14, i8** %15
%16 = load i32, i32* %5
%17 = load i32, i32* @USBDEVFS_IOCTL
%18 = call i32 @ioctl(i32 %16, i32 %17, %struct.usbdevfs_ioctl* %9)
ret i32 %18
}

LLVM IR (-O2):
%struct.usbdevfs_ioctl = type { i32, i32, i8* }
@USBDEVFS_IOCTL = global i32 0
define i32 @usbdev_ioctl(i32 %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca %struct.usbdevfs_ioctl
%6 = bitcast %struct.usbdevfs_ioctl* %5 to i8*
%7 = getelementptr inbounds %struct.usbdevfs_ioctl, %struct.usbdevfs_ioctl* %5, i64 0, i32 0
store i32 %1, i32* %7
%8 = getelementptr inbounds %struct.usbdevfs_ioctl, %struct.usbdevfs_ioctl* %5, i64 0, i32 1
store i32 %2, i32* %8
%9 = getelementptr inbounds %struct.usbdevfs_ioctl, %struct.usbdevfs_ioctl* %5, i64 0, i32 2
store i8* %3, i8** %9
%10 = load i32, i32* @USBDEVFS_IOCTL
%11 = call i32 @ioctl(i32 %0, i32 %10, %struct.usbdevfs_ioctl* %5)
ret i32 %11
}
/* Variables and functions */
int cpu_is_at91sam9x5();
int cpu_has_pmecc(void) { return cpu_is_at91sam9x5(); }


x86 assembly (clang, -O0):
<cpu_has_pmecc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <cpu_is_at91sam9x5@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_has_pmecc>:
xor    %eax,%eax
jmp    1030 <cpu_is_at91sam9x5@plt>

LLVM IR (-O0):
define i32 @cpu_has_pmecc() {
%1 = call i32 (...) @cpu_is_at91sam9x5()
ret i32 %1
}

LLVM IR (-O2):
define i32 @cpu_has_pmecc() {
%1 = tail call i32 (...) @cpu_is_at91sam9x5()
ret i32 %1
}
int lib3fun() { return 0; }


x86 assembly (clang, -O0):
<lib3fun>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lib3fun>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @lib3fun() {
ret i32 0
}

LLVM IR (-O2):
define i32 @lib3fun() {
ret i32 0
}
int test_imm_F8uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0xF8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F8uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xf8,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F8uint64_lowword_reg>:
test   $0xf8,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F8uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 248
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_F8uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 248
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char const *, size_t);
size_t decode_seq_value(const char *seq_val, size_t seq_val_len, char *val,
                        char *cmd) {
  if (seq_val_len < 1) {
    return -1;
  }
  size_t val_len = seq_val_len - 1;
  *cmd = seq_val[0];
  memcpy(val, seq_val + 1, val_len);
  return val_len;
}


x86 assembly (clang, -O0):
<decode_seq_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
cmpq   $0x1,-0x18(%rbp)
jae    1140 <decode_seq_value+0x30>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    1175 <decode_seq_value+0x65>
mov    -0x18(%rbp),%rax
sub    $0x1,%rax
mov    %rax,-0x30(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x28(%rbp),%rax
mov    %cl,(%rax)
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
add    $0x1,%rsi
mov    -0x30(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x30(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode_seq_value>:
push   %rbx
mov    %rsi,%rbx
test   %rsi,%rsi
je     1135 <decode_seq_value+0x25>
mov    %rdi,%rsi
add    $0xffffffffffffffff,%rbx
mov    (%rdi),%al
mov    %al,(%rcx)
add    $0x1,%rsi
mov    %rdx,%rdi
mov    %rbx,%rdx
call   1030 <memcpy@plt>
jmp    113c <decode_seq_value+0x2c>
mov    $0xffffffffffffffff,%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @decode_seq_value(i8* %0, i64 %1, i8* %2, i8* %3) {
%5 = alloca i64
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i64
store i8* %0, i8** %6
store i64 %1, i64* %7
store i8* %2, i8** %8
store i8* %3, i8** %9
%11 = load i64, i64* %7
%12 = icmp ult i64 %11, 1
br i1 %12, label %13, label %14
13: ; preds = %4
store i64 -1, i64* %5
br label %27
14: ; preds = %4
%15 = load i64, i64* %7
%16 = sub i64 %15, 1
store i64 %16, i64* %10
%17 = load i8*, i8** %6
%18 = getelementptr inbounds i8, i8* %17, i64 0
%19 = load i8, i8* %18
%20 = load i8*, i8** %9
store i8 %19, i8* %20
%21 = load i8*, i8** %8
%22 = load i8*, i8** %6
%23 = getelementptr inbounds i8, i8* %22, i64 1
%24 = load i64, i64* %10
%25 = call i32 @memcpy(i8* %21, i8* %23, i64 %24)
%26 = load i64, i64* %10
store i64 %26, i64* %5
br label %27
27: ; preds = %14, %13
%28 = load i64, i64* %5
ret i64 %28
}

LLVM IR (-O2):
define i64 @decode_seq_value(i8* %0, i64 %1, i8* %2, i8* nocapture writeonly %3) {
%5 = icmp eq i64 %1, 0
br i1 %5, label %11, label %6
6: ; preds = %4
%7 = add i64 %1, -1
%8 = load i8, i8* %0
store i8 %8, i8* %3
%9 = getelementptr inbounds i8, i8* %0, i64 1
%10 = tail call i32 @memcpy(i8* %2, i8* %9, i64 %7)
br label %11
11: ; preds = %4, %6
%12 = phi i64 [ %7, %6 ], [ -1, %4 ]
ret i64 %12
}
/* Type definitions */
struct timeval {
  double tv_usec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
double timedouble() {
  struct timeval now;
  gettimeofday(&now, NULL);
  double tm = ((double)now.tv_sec * 1000000.0) + now.tv_usec;
  return tm / 1000000.0;
}


x86 assembly (clang, -O0):
<timedouble>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
cvtsi2sdq -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  0xec8(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  0xeae(%rip),%xmm1
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timedouble>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
cvtsi2sdq 0x10(%rsp),%xmm0
movsd  0xed1(%rip),%xmm1
mulsd  %xmm1,%xmm0
addsd  0x8(%rsp),%xmm0
divsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { double, i64 }
define double @timedouble() {
%1 = alloca %struct.timeval
%2 = alloca double
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%5 = load i64, i64* %4
%6 = sitofp i64 %5 to double
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%8 = load double, double* %7
%9 = call double @llvm.fmuladd.f64(double %6, double 1.000000e+06, double %8)
store double %9, double* %2
%10 = load double, double* %2
%11 = fdiv double %10, 1.000000e+06
ret double %11
}

LLVM IR (-O2):
%struct.timeval = type { double, i64 }
define double @timedouble() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%5 = load i64, i64* %4
%6 = sitofp i64 %5 to double
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%8 = load double, double* %7
%9 = tail call double @llvm.fmuladd.f64(double %6, double 1.000000e+06, double %8)
%10 = fdiv double %9, 1.000000e+06
ret double %10
}
unsigned int dnsget32(unsigned char *p) {
  unsigned int rc = (p[0] & 0377) << 24;
  rc |= (p[1] & 0377) << 16;
  rc |= (p[2] & 0377) << 8;
  rc |= (p[3] & 0377);
  return rc;
}


x86 assembly (clang, -O0):
<dnsget32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
and    $0xff,%eax
shl    $0x18,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x1(%rax),%eax
and    $0xff,%eax
shl    $0x10,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x2(%rax),%eax
and    $0xff,%eax
shl    $0x8,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x3(%rax),%eax
and    $0xff,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dnsget32>:
mov    (%rdi),%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @dnsget32(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = and i32 %7, 255
%9 = shl i32 %8, 24
store i32 %9, i32* %3
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = and i32 %13, 255
%15 = shl i32 %14, 16
%16 = load i32, i32* %3
%17 = or i32 %16, %15
store i32 %17, i32* %3
%18 = load i8*, i8** %2
%19 = getelementptr inbounds i8, i8* %18, i64 2
%20 = load i8, i8* %19
%21 = zext i8 %20 to i32
%22 = and i32 %21, 255
%23 = shl i32 %22, 8
%24 = load i32, i32* %3
%25 = or i32 %24, %23
store i32 %25, i32* %3
%26 = load i8*, i8** %2
%27 = getelementptr inbounds i8, i8* %26, i64 3
%28 = load i8, i8* %27
%29 = zext i8 %28 to i32
%30 = and i32 %29, 255
%31 = load i32, i32* %3
%32 = or i32 %31, %30
store i32 %32, i32* %3
%33 = load i32, i32* %3
ret i32 %33
}

LLVM IR (-O2):
define i32 @dnsget32(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = shl nuw i32 %3, 24
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = shl nuw nsw i32 %7, 16
%9 = or i32 %8, %4
%10 = getelementptr inbounds i8, i8* %0, i64 2
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = shl nuw nsw i32 %12, 8
%14 = or i32 %9, %13
%15 = getelementptr inbounds i8, i8* %0, i64 3
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = or i32 %14, %17
ret i32 %18
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
extern int64_t ReturnNegInt64() { return -0xFFFFFFFFFF; }


x86 assembly (clang, -O0):
<ReturnNegInt64>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReturnNegInt64>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ReturnNegInt64() {
ret i32 1
}

LLVM IR (-O2):
define i32 @ReturnNegInt64() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ errRlse();
void err_rlse_(void) { errRlse(); }


x86 assembly (clang, -O0):
<err_rlse_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <errRlse@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<err_rlse_>:
xor    %eax,%eax
jmp    1030 <errRlse@plt>

LLVM IR (-O0):
define void @err_rlse_() {
%1 = call i32 (...) @errRlse()
ret void
}

LLVM IR (-O2):
define void @err_rlse_() {
%1 = tail call i32 (...) @errRlse()
ret void
}
/* Variables and functions */
int partition(int *, int, int);
void quick(int *arr, int l, int r) {
  int j;
  if (l < r) {
    j = partition(arr, l, r);
    quick(arr, l, j - 1);
    quick(arr, j + 1, r);
  }
}


x86 assembly (clang, -O0):
<quick>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <quick+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quick@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quick@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quick>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quick+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quick@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quick+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quick(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partition(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @quick(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quick(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
void sighandler(int signum) {}


x86 assembly (clang, -O0):
<sighandler>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sighandler>:
ret

LLVM IR (-O0):
define void @sighandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @sighandler(i32 %0) {
ret void
}
/* Variables and functions */
scalar_t__ btp_skip_char(char const **, char);
int btp_skip_char_sequence(const char **input, char c) {
  int count = 0;
  while (btp_skip_char(input, c))
    ++count;
  return count;
}


x86 assembly (clang, -O0):
<btp_skip_char_sequence>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
movsbl -0x9(%rbp),%esi
call   1030 <btp_skip_char@plt>
cmp    $0x0,%rax
je     114e <btp_skip_char_sequence+0x3e>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1129 <btp_skip_char_sequence+0x19>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<btp_skip_char_sequence>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
mov    $0xffffffff,%ebp
movsbl %sil,%ebx
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <btp_skip_char@plt>
add    $0x1,%ebp
test   %rax,%rax
jne    1120 <btp_skip_char_sequence+0x10>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @btp_skip_char_sequence(i8** %0, i8 signext %1) {
%3 = alloca i8**
%4 = alloca i8
%5 = alloca i32
store i8** %0, i8*** %3
store i8 %1, i8* %4
store i32 0, i32* %5
br label %6
6: ; preds = %11, %2
%7 = load i8**, i8*** %3
%8 = load i8, i8* %4
%9 = call i64 @btp_skip_char(i8** %7, i8 signext %8)
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %6
%12 = load i32, i32* %5
%13 = add nsw i32 %12, 1
store i32 %13, i32* %5
br label %6
14: ; preds = %6
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
define i32 @btp_skip_char_sequence(i8** %0, i8 signext %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ 0, %2 ], [ %7, %3 ]
%5 = tail call i64 @btp_skip_char(i8** %0, i8 signext %1)
%6 = icmp eq i64 %5, 0
%7 = add nuw nsw i32 %4, 1
br i1 %6, label %8, label %3
8: ; preds = %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ error(int, char *, char *, char *);
int /*<<< orphan*/ exit(int);
void unterminated_comment(int lineno, char *line, char *cptr) {
  error(lineno, line, cptr, "unmatched /*");
  exit(1);
}


x86 assembly (clang, -O0):
<unterminated_comment>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
lea    0xebb(%rip),%rcx
call   1030 <error@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<unterminated_comment>:
push   %rax
lea    0xed8(%rip),%rcx
call   1030 <error@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"unmatched /*\00"
define void @unterminated_comment(i32 %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = call i32 @error(i32 %7, i8* %8, i8* %9, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%11 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [13 x i8] c"unmatched /*\00"
define void @unterminated_comment(i32 %0, i8* %1, i8* %2) {
%4 = tail call i32 @error(i32 %0, i8* %1, i8* %2, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 @exit(i32 1)
unreachable
}
void underscores2spaces(char *s) {
  char *p;
  for (p = s; '\0' != *p; p++)
    if ('_' == *p)
      *p = ' ';
}


x86 assembly (clang, -O0):
<underscores2spaces>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    %ecx,%eax
je     1152 <underscores2spaces+0x52>
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
mov    $0x5f,%eax
cmp    %ecx,%eax
jne    113c <underscores2spaces+0x3c>
mov    -0x10(%rbp),%rax
movb   $0x20,(%rax)
jmp    1141 <underscores2spaces+0x41>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <underscores2spaces+0x10>
pop    %rbp
ret

x86 assembly (clang, -O2):
<underscores2spaces>:
jmp    1117 <underscores2spaces+0x17>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movb   $0x20,(%rdi)
add    $0x1,%rdi
movzbl (%rdi),%eax
cmp    $0x5f,%al
je     1110 <underscores2spaces+0x10>
test   %al,%al
jne    1113 <underscores2spaces+0x13>
ret

LLVM IR (-O0):
define void @underscores2spaces(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %18, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 0, %8
br i1 %9, label %10, label %21
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 95, %13
br i1 %14, label %15, label %17
15: ; preds = %10
%16 = load i8*, i8** %3
store i8 32, i8* %16
br label %17
17: ; preds = %15, %10
br label %18
18: ; preds = %17
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %3
br label %5
21: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @underscores2spaces(i8* nocapture %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i8* [ %0, %1 ], [ %7, %6 ]
%4 = load i8, i8* %3
switch i8 %4, label %6 [
i8 0, label %8
i8 95, label %5
]
5: ; preds = %2
store i8 32, i8* %3
br label %6
6: ; preds = %2, %5
%7 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
8: ; preds = %2
ret void
}
int ecm_sfe_ipv6_init(struct dentry *dentry) { return 0; }


x86 assembly (clang, -O0):
<ecm_sfe_ipv6_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ecm_sfe_ipv6_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.dentry = type opaque
define i32 @ecm_sfe_ipv6_init(%struct.dentry* %0) {
%2 = alloca %struct.dentry*
store %struct.dentry* %0, %struct.dentry** %2
ret i32 0
}

LLVM IR (-O2):
%struct.dentry = type opaque
define i32 @ecm_sfe_ipv6_init(%struct.dentry* nocapture readnone %0) {
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned int button;
};
typedef TYPE_1__ XButtonPressedEvent;

/* Variables and functions */
void set_XButtonPressedEvent_button(void *_p, unsigned _v) {
  ((XButtonPressedEvent *)_p)->button = (unsigned)_v;
}


x86 assembly (clang, -O0):
<set_XButtonPressedEvent_button>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XButtonPressedEvent_button>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XButtonPressedEvent_button(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XButtonPressedEvent_button(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
void gtk_range_get_type() {}


x86 assembly (clang, -O0):
<gtk_range_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_range_get_type>:
ret

LLVM IR (-O0):
define void @gtk_range_get_type() {
ret void
}

LLVM IR (-O2):
define void @gtk_range_get_type() {
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t ia_setbit64(uint64_t word, int i) { return word | ((uint64_t)1 << i); }


x86 assembly (clang, -O0):
<ia_setbit64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ia_setbit64>:
mov    %edi,%eax
bts    %esi,%eax
ret

LLVM IR (-O0):
define i32 @ia_setbit64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 1, %6
%8 = or i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @ia_setbit64(i32 %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = or i32 %3, %0
ret i32 %4
}
/* Type definitions */
struct input_event {
  int type;
};

/* Variables and functions */
#define EV_MSC 130
#define EV_REL 129
#define EV_SYN 128
int filter_mouse_event(struct input_event *ev) {
  switch (ev->type) {
  case EV_SYN:
  case EV_REL:
  case EV_MSC:
    return 0;
  default:
    return 1;
  }
}


x86 assembly (clang, -O0):
<filter_mouse_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
add    $0xffffff80,%eax
sub    $0x2,%eax
ja     112b <filter_mouse_event+0x2b>
jmp    111f <filter_mouse_event+0x1f>
movl   $0x0,-0x4(%rbp)
jmp    1132 <filter_mouse_event+0x32>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<filter_mouse_event>:
mov    $0xffffff7d,%ecx
add    (%rdi),%ecx
xor    %eax,%eax
cmp    $0xfffffffd,%ecx
setb   %al
ret

LLVM IR (-O0):
%struct.input_event = type { i32 }
define i32 @filter_mouse_event(%struct.input_event* %0) {
%2 = alloca i32
%3 = alloca %struct.input_event*
store %struct.input_event* %0, %struct.input_event** %3
%4 = load %struct.input_event*, %struct.input_event** %3
%5 = getelementptr inbounds %struct.input_event, %struct.input_event* %4, i32 0, i32 0
%6 = load i32, i32* %5
switch i32 %6, label %8 [
i32 128, label %7
i32 129, label %7
i32 130, label %7
]
7: ; preds = %1, %1, %1
store i32 0, i32* %2
br label %9
8: ; preds = %1
store i32 1, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
%struct.input_event = type { i32 }
define i32 @filter_mouse_event(%struct.input_event* nocapture %0) {
%2 = getelementptr inbounds %struct.input_event, %struct.input_event* %0, i64 0, i32 0
%3 = load i32, i32* %2
%4 = add i32 %3, -131
%5 = icmp ult i32 %4, -3
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Type definitions */
struct arc {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free_object(int, short *);
void free_arc(struct arc *a) { free_object(11, (short *)a); }


x86 assembly (clang, -O0):
<free_arc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0xb,%edi
call   1030 <free_object@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_arc>:
mov    %rdi,%rsi
mov    $0xb,%edi
jmp    1030 <free_object@plt>

LLVM IR (-O0):
%struct.arc = type { i32 }
define void @free_arc(%struct.arc* %0) {
%2 = alloca %struct.arc*
store %struct.arc* %0, %struct.arc** %2
%3 = load %struct.arc*, %struct.arc** %2
%4 = bitcast %struct.arc* %3 to i16*
%5 = call i32 @free_object(i32 11, i16* %4)
ret void
}

LLVM IR (-O2):
%struct.arc = type { i32 }
define void @free_arc(%struct.arc* %0) {
%2 = bitcast %struct.arc* %0 to i16*
%3 = tail call i32 @free_object(i32 11, i16* %2)
ret void
}
int FUNC_test(void) {
  printf("from %s %s\n",
         "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
         "2022-01-22/02-19-57/repos/shuangye/ProgrammingLanguage/refs/heads/"
         "master/jni/src_cpp/func.c",
         __func__);
  return 0;
}


x86 assembly (clang, -O0):
<FUNC_test>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xeea(%rip),%rsi
lea    0xf7f(%rip),%rdx
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FUNC_test>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xeed(%rip),%rsi
lea    0xf82(%rip),%rdx
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"from %s %s\0A\00"
@.str.1 = [156 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/shuangye/ProgrammingLanguage/refs/heads/master/jni/src_cpp/func.c\00"
@__func__.FUNC_test = [10 x i8] c"FUNC_test\00"
define i32 @FUNC_test() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([156 x i8], [156 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__func__.FUNC_test, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"from %s %s\0A\00"
@.str.1 = [156 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/shuangye/ProgrammingLanguage/refs/heads/master/jni/src_cpp/func.c\00"
@__func__.FUNC_test = [10 x i8] c"FUNC_test\00"
define i32 @FUNC_test() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([156 x i8], [156 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__func__.FUNC_test, i64 0, i64 0))
ret i32 0
}
int test_imm_1Auint8_reg(unsigned char val) {
  return ((val) & (0x1A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Auint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0x1a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Auint8_reg>:
test   $0x1a,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Auint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 26
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_1Auint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 26
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int ksft_exit_pass();
int /*<<< orphan*/ ksft_print_header();
int /*<<< orphan*/ ksft_set_plan(int);
int /*<<< orphan*/ test_clone3_clear_sighand();
int /*<<< orphan*/ test_clone3_supported();
int main(int argc, char **argv) {
  ksft_print_header();
  test_clone3_supported();
  ksft_set_plan(1);
  test_clone3_clear_sighand();
  return ksft_exit_pass();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1070 <ksft_print_header@plt>
mov    $0x0,%al
call   1030 <test_clone3_supported@plt>
mov    $0x1,%edi
call   1040 <ksft_set_plan@plt>
mov    $0x0,%al
call   1060 <test_clone3_clear_sighand@plt>
mov    $0x0,%al
call   1050 <ksft_exit_pass@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1070 <ksft_print_header@plt>
xor    %eax,%eax
call   1030 <test_clone3_supported@plt>
mov    $0x1,%edi
call   1040 <ksft_set_plan@plt>
xor    %eax,%eax
call   1060 <test_clone3_clear_sighand@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <ksft_exit_pass@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @ksft_print_header()
%7 = call i32 (...) @test_clone3_supported()
%8 = call i32 @ksft_set_plan(i32 1)
%9 = call i32 (...) @test_clone3_clear_sighand()
%10 = call i32 (...) @ksft_exit_pass()
ret i32 %10
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @ksft_print_header()
%4 = tail call i32 (...) @test_clone3_supported()
%5 = tail call i32 @ksft_set_plan(i32 1)
%6 = tail call i32 (...) @test_clone3_clear_sighand()
%7 = tail call i32 (...) @ksft_exit_pass()
ret i32 %7
}
/* Variables and functions */
bool can_go_d(int h, int y, int n) { return y + n < h; }


x86 assembly (clang, -O0):
<can_go_d>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<can_go_d>:
add    %edx,%esi
xor    %eax,%eax
cmp    %edi,%esi
setl   %al
ret

LLVM IR (-O0):
define i32 @can_go_d(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = load i32, i32* %6
%9 = add nsw i32 %7, %8
%10 = load i32, i32* %4
%11 = icmp slt i32 %9, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @can_go_d(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %2, %1
%5 = icmp slt i32 %4, %0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
char *inotifytools_event_to_str_sep(int, char);
char *inotifytools_event_to_str(int events) {
  return inotifytools_event_to_str_sep(events, ',');
}


x86 assembly (clang, -O0):
<inotifytools_event_to_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x2c,%esi
call   1030 <inotifytools_event_to_str_sep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inotifytools_event_to_str>:
mov    $0x2c,%esi
jmp    1030 <inotifytools_event_to_str_sep@plt>

LLVM IR (-O0):
define i8* @inotifytools_event_to_str(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @inotifytools_event_to_str_sep(i32 %3, i8 signext 44)
ret i8* %4
}

LLVM IR (-O2):
define i8* @inotifytools_event_to_str(i32 %0) {
%2 = tail call i8* @inotifytools_event_to_str_sep(i32 %0, i8 signext 44)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int *);
void arrayPointerSample4(int param[]) {
  param = param + 3;
  printf("%p\n", param);
}


x86 assembly (clang, -O0):
<arrayPointerSample4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0xc,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arrayPointerSample4>:
lea    0xc(%rdi),%rsi
lea    0xee5(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%p\0A\00"
define void @arrayPointerSample4(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 3
store i32* %4, i32** %2
%5 = load i32*, i32** %2
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32* %5)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%p\0A\00"
define void @arrayPointerSample4(i32* %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 3
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32* %2)
ret void
}
int fibo(int x) {
  if (x <= 1) {
    return x;
  } else {
    return fibo(x - 1) + fibo(x - 2);
  }
}


x86 assembly (clang, -O0):
<fibo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jg     1130 <fibo+0x20>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1153 <fibo+0x43>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fibo@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fibo@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibo>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x2,%edi
jge    1120 <fibo+0x10>
mov    %ebx,%ecx
jmp    1144 <fibo+0x34>
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    -0x1(%rbx),%edi
call   1030 <fibo@plt>
lea    -0x2(%rbx),%ecx
add    %eax,%ebp
cmp    $0x3,%ebx
mov    %ecx,%ebx
ja     1130 <fibo+0x20>
add    %ecx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fibo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %16
8: ; preds = %1
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 1
%11 = call i32 @fibo(i32 %10)
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 2
%14 = call i32 @fibo(i32 %13)
%15 = add nsw i32 %11, %14
store i32 %15, i32* %2
br label %16
16: ; preds = %8, %6
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @fibo(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fibo(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %9, %3 ]
%13 = phi i32 [ %0, %1 ], [ %8, %3 ]
%14 = add nsw i32 %13, %12
ret i32 %14
}
void pathcon_nm6_incref(void) {}


x86 assembly (clang, -O0):
<pathcon_nm6_incref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm6_incref>:
ret

LLVM IR (-O0):
define void @pathcon_nm6_incref() {
ret void
}

LLVM IR (-O2):
define void @pathcon_nm6_incref() {
ret void
}
/* Variables and functions */
void extract_section(const char *name, char *buffer, size_t *size) {}


x86 assembly (clang, -O0):
<extract_section>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<extract_section>:
ret

LLVM IR (-O0):
define void @extract_section(i8* %0, i8* %1, i64* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64* %2, i64** %6
ret void
}

LLVM IR (-O2):
define void @extract_section(i8* nocapture %0, i8* nocapture %1, i64* nocapture %2) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ X509;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ X509_FLAG_COMPAT;
int X509_print_ex_fp(int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                     int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ XN_FLAG_COMPAT;
int X509_print_fp(FILE *fp, X509 *x) {
  return X509_print_ex_fp(fp, x, XN_FLAG_COMPAT, X509_FLAG_COMPAT);
}


x86 assembly (clang, -O0):
<X509_print_fp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2eb1(%rip),%rax
mov    (%rax),%edx
mov    0x2eb0(%rip),%rax
mov    (%rax),%ecx
call   1030 <X509_print_ex_fp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_print_fp>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edx
mov    0x2ec8(%rip),%rax
mov    (%rax),%ecx
jmp    1030 <X509_print_ex_fp@plt>

LLVM IR (-O0):
@XN_FLAG_COMPAT = global i32 0
@X509_FLAG_COMPAT = global i32 0
define i32 @X509_print_fp(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = load i32, i32* @XN_FLAG_COMPAT
%8 = load i32, i32* @X509_FLAG_COMPAT
%9 = call i32 @X509_print_ex_fp(i32* %5, i32* %6, i32 %7, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
@XN_FLAG_COMPAT = global i32 0
@X509_FLAG_COMPAT = global i32 0
define i32 @X509_print_fp(i32* %0, i32* %1) {
%3 = load i32, i32* @XN_FLAG_COMPAT
%4 = load i32, i32* @X509_FLAG_COMPAT
%5 = tail call i32 @X509_print_ex_fp(i32* %0, i32* %1, i32 %3, i32 %4)
ret i32 %5
}
void instruc_2() {}


x86 assembly (clang, -O0):
<instruc_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<instruc_2>:
ret

LLVM IR (-O0):
define void @instruc_2() {
ret void
}

LLVM IR (-O2):
define void @instruc_2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char **, char *, int);
int /*<<< orphan*/ printf(char *, char *, char *);
int main() {
  char *from = "abc";
  char to[10];
  memcpy(&to, from, 4);
  printf("%s+%s\n", from, to);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    -0x1a(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x4,%edx
call   1040 <memcpy@plt>
mov    -0x10(%rbp),%rsi
lea    -0x1a(%rbp),%rdx
lea    0xea9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
sub    $0x18,%rsp
lea    0xed2(%rip),%rbx
lea    0xe(%rsp),%r14
mov    %r14,%rdi
mov    %rbx,%rsi
mov    $0x4,%edx
call   1040 <memcpy@plt>
lea    0xeba(%rip),%rdi
mov    %rbx,%rsi
mov    %r14,%rdx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [4 x i8] c"abc\00"
@.str.1 = [7 x i8] c"%s+%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca [10 x i8]
store i32 0, i32* %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %2
%4 = bitcast [10 x i8]* %3 to i8**
%5 = load i8*, i8** %2
%6 = call i32 @memcpy(i8** %4, i8* %5, i32 4)
%7 = load i8*, i8** %2
%8 = getelementptr inbounds [10 x i8], [10 x i8]* %3, i64 0, i64 0
%9 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* %7, i8* %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"abc\00"
@.str.1 = [7 x i8] c"%s+%s\0A\00"
define i32 @main() {
%1 = alloca [10 x i8]
%2 = getelementptr inbounds [10 x i8], [10 x i8]* %1, i64 0, i64 0
%3 = bitcast [10 x i8]* %1 to i8**
%4 = call i32 @memcpy(i8** %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 4)
%5 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ putchar(int /*<<< orphan*/);
void putvec(char *a, char *b) {
  while (a != b)
    putchar(*a++);
}


x86 assembly (clang, -O0):
<putvec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
je     114a <putvec+0x3a>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <putchar@plt>
jmp    1120 <putvec+0x10>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putvec>:
push   %r14
push   %rbx
push   %rax
cmp    %rsi,%rdi
je     1131 <putvec+0x21>
mov    %rsi,%r14
mov    %rdi,%rbx
nop
movsbl (%rbx),%edi
add    $0x1,%rbx
call   1030 <putchar@plt>
cmp    %r14,%rbx
jne    1120 <putvec+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @putvec(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %9, %2
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = icmp ne i8* %6, %7
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %3
%12 = load i8, i8* %10
%13 = sext i8 %12 to i32
%14 = call i32 @putchar(i32 %13)
br label %5
15: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @putvec(i8* %0, i8* readnone %1) {
%3 = icmp eq i8* %0, %1
br i1 %3, label %11, label %4
4: ; preds = %2, %4
%5 = phi i8* [ %6, %4 ], [ %0, %2 ]
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %5
%8 = sext i8 %7 to i32
%9 = tail call i32 @putchar(i32 %8)
%10 = icmp eq i8* %6, %1
br i1 %10, label %11, label %4
11: ; preds = %4, %2
ret void
}