xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *);
void panel_utils_onoff_str(char *tempstr, int val) {
  if (val) {
    sprintf(tempstr, "ON");
  } else {
    sprintf(tempstr, "OFF");
  }
}


x86 assembly (clang, -O0):
<panel_utils_onoff_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     113e <panel_utils_onoff_str+0x2e>
mov    -0x8(%rbp),%rdi
lea    0xecc(%rip),%rsi
call   1030 <sprintf@plt>
jmp    114e <panel_utils_onoff_str+0x3e>
mov    -0x8(%rbp),%rdi
lea    0xeba(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<panel_utils_onoff_str>:
test   %esi,%esi
je     110e <panel_utils_onoff_str+0xe>
movb   $0x0,0x2(%rdi)
movw   $0x4e4f,(%rdi)
ret
movl   $0x46464f,(%rdi)
ret

LLVM IR (-O0):
@.str = [3 x i8] c"ON\00"
@.str.1 = [4 x i8] c"OFF\00"
define void @panel_utils_onoff_str(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i8*, i8** %3
%9 = call i32 @sprintf(i8* %8, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
br label %13
10: ; preds = %2
%11 = load i8*, i8** %3
%12 = call i32 @sprintf(i8* %11, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
br label %13
13: ; preds = %10, %7
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"ON\00"
define void @panel_utils_onoff_str(i8* nocapture writeonly %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %5, label %4
4: ; preds = %2
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 dereferenceable(3) %0, i8* align 1 dereferenceable(3) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i64 3, i1 false)
br label %7
5: ; preds = %2
%6 = bitcast i8* %0 to i32*
store i32 4605519, i32* %6
br label %7
7: ; preds = %5, %4
ret void
}
void gsbittab_dummy(void) {}


x86 assembly (clang, -O0):
<gsbittab_dummy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gsbittab_dummy>:
ret

LLVM IR (-O0):
define void @gsbittab_dummy() {
ret void
}

LLVM IR (-O2):
define void @gsbittab_dummy() {
ret void
}
void resctrl_cpu_detect(struct cpuinfo_x86 *c) {}


x86 assembly (clang, -O0):
<resctrl_cpu_detect>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<resctrl_cpu_detect>:
ret

LLVM IR (-O0):
%struct.cpuinfo_x86 = type opaque
define void @resctrl_cpu_detect(%struct.cpuinfo_x86* %0) {
%2 = alloca %struct.cpuinfo_x86*
store %struct.cpuinfo_x86* %0, %struct.cpuinfo_x86** %2
ret void
}

LLVM IR (-O2):
%struct.cpuinfo_x86 = type opaque
define void @resctrl_cpu_detect(%struct.cpuinfo_x86* nocapture %0) {
ret void
}
int comp(const void *a, const void *b) {
  int vala = *((int *)a);
  int valb = *((int *)b);
  return (vala > valb) - (vala < valb);
}


x86 assembly (clang, -O0):
<comp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
mov    -0x14(%rbp),%ecx
cmp    -0x18(%rbp),%ecx
setl   %cl
and    $0x1,%cl
movzbl %cl,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<comp>:
mov    (%rdi),%ecx
xor    %eax,%eax
xor    %edx,%edx
cmp    (%rsi),%ecx
setg   %al
setl   %dl
sub    %edx,%eax
ret

LLVM IR (-O0):
define i32 @comp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
%9 = load i32, i32* %8
store i32 %9, i32* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i32*
%12 = load i32, i32* %11
store i32 %12, i32* %6
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = icmp sgt i32 %13, %14
%16 = zext i1 %15 to i32
%17 = load i32, i32* %5
%18 = load i32, i32* %6
%19 = icmp slt i32 %17, %18
%20 = zext i1 %19 to i32
%21 = sub nsw i32 %16, %20
ret i32 %21
}

LLVM IR (-O2):
define i32 @comp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp sgt i32 %4, %6
%8 = zext i1 %7 to i32
%9 = icmp slt i32 %4, %6
%10 = sext i1 %9 to i32
%11 = add nsw i32 %10, %8
ret i32 %11
}
/* Variables and functions */
double bot_vector_magnitude_squared_3d(double *);
int /*<<< orphan*/ bot_vector_subtract_3d(double const *, double const *,
                                          double *);
double bot_vector_dist_squared_3d(const double v1[3], const double v2[3]) {
  double v[3];
  bot_vector_subtract_3d(v1, v2, v);
  return bot_vector_magnitude_squared_3d(v);
}


x86 assembly (clang, -O0):
<bot_vector_dist_squared_3d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x30(%rbp),%rdx
call   1030 <bot_vector_subtract_3d@plt>
lea    -0x30(%rbp),%rdi
call   1040 <bot_vector_magnitude_squared_3d@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bot_vector_dist_squared_3d>:
push   %rbx
sub    $0x20,%rsp
mov    %rsp,%rbx
mov    %rbx,%rdx
call   1030 <bot_vector_subtract_3d@plt>
mov    %rbx,%rdi
call   1040 <bot_vector_magnitude_squared_3d@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define double @bot_vector_dist_squared_3d(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
%5 = alloca [3 x double]
store double* %0, double** %3
store double* %1, double** %4
%6 = load double*, double** %3
%7 = load double*, double** %4
%8 = getelementptr inbounds [3 x double], [3 x double]* %5, i64 0, i64 0
%9 = call i32 @bot_vector_subtract_3d(double* %6, double* %7, double* %8)
%10 = getelementptr inbounds [3 x double], [3 x double]* %5, i64 0, i64 0
%11 = call double @bot_vector_magnitude_squared_3d(double* %10)
ret double %11
}

LLVM IR (-O2):
define double @bot_vector_dist_squared_3d(double* %0, double* %1) {
%3 = alloca [3 x double]
%4 = bitcast [3 x double]* %3 to i8*
%5 = getelementptr inbounds [3 x double], [3 x double]* %3, i64 0, i64 0
%6 = call i32 @bot_vector_subtract_3d(double* %0, double* %1, double* %5)
%7 = call double @bot_vector_magnitude_squared_3d(double* %5)
ret double %7
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void print_uint64_t(uint64_t m) { fprintf(stderr, "%lu", m); }


x86 assembly (clang, -O0):
<print_uint64_t>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%edx
lea    0xed2(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_uint64_t>:
mov    %edi,%edx
mov    0x2ec7(%rip),%rax
mov    (%rax),%edi
lea    0xede(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [4 x i8] c"%lu\00"
define void @print_uint64_t(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @stderr
%4 = load i32, i32* %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [4 x i8] c"%lu\00"
define void @print_uint64_t(i32 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ default_handler();
__attribute__((weak)) void TIM1_UP_TIM16_IRQHandler() { default_handler(); }


x86 assembly (clang, -O0):
<TIM1_UP_TIM16_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <default_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TIM1_UP_TIM16_IRQHandler>:
xor    %eax,%eax
jmp    1030 <default_handler@plt>

LLVM IR (-O0):
define weak void @TIM1_UP_TIM16_IRQHandler() {
%1 = call i32 (...) @default_handler()
ret void
}

LLVM IR (-O2):
define weak void @TIM1_UP_TIM16_IRQHandler() {
%1 = tail call i32 (...) @default_handler()
ret void
}
double jd2ts(dj)
double dj;
{ return ((dj - 2433282.5) * 86400.0); }


x86 assembly (clang, -O0):
<jd2ts>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xef2(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  0xede(%rip),%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<jd2ts>:
addsd  0xef8(%rip),%xmm0
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @jd2ts(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fsub double %3, 0x4142908140000000
%5 = fmul double %4, 8.640000e+04
ret double %5
}

LLVM IR (-O2):
define double @jd2ts(double %0) {
%2 = fadd double %0, 0xC142908140000000
%3 = fmul double %2, 8.640000e+04
ret double %3
}
void g_param_spec_internal() {}


x86 assembly (clang, -O0):
<g_param_spec_internal>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_param_spec_internal>:
ret

LLVM IR (-O0):
define void @g_param_spec_internal() {
ret void
}

LLVM IR (-O2):
define void @g_param_spec_internal() {
ret void
}
void Mem_Summary(char *title, int final) { return; }


x86 assembly (clang, -O0):
<Mem_Summary>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Mem_Summary>:
ret

LLVM IR (-O0):
define void @Mem_Summary(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @Mem_Summary(i8* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lapic_set(int, int);
void sched_start_timer() {
  lapic_set(0x320, 0x00020080);
  lapic_set(0x3E0, 0xB);
  lapic_set(0x380, 0x00100000);
}


x86 assembly (clang, -O0):
<sched_start_timer>:
push   %rbp
mov    %rsp,%rbp
mov    $0x320,%edi
mov    $0x20080,%esi
call   1030 <lapic_set@plt>
mov    $0x3e0,%edi
mov    $0xb,%esi
call   1030 <lapic_set@plt>
mov    $0x380,%edi
mov    $0x100000,%esi
call   1030 <lapic_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sched_start_timer>:
push   %rax
mov    $0x320,%edi
mov    $0x20080,%esi
call   1030 <lapic_set@plt>
mov    $0x3e0,%edi
mov    $0xb,%esi
call   1030 <lapic_set@plt>
mov    $0x380,%edi
mov    $0x100000,%esi
pop    %rax
jmp    1030 <lapic_set@plt>

LLVM IR (-O0):
define void @sched_start_timer() {
%1 = call i32 @lapic_set(i32 800, i32 131200)
%2 = call i32 @lapic_set(i32 992, i32 11)
%3 = call i32 @lapic_set(i32 896, i32 1048576)
ret void
}

LLVM IR (-O2):
define void @sched_start_timer() {
%1 = tail call i32 @lapic_set(i32 800, i32 131200)
%2 = tail call i32 @lapic_set(i32 992, i32 11)
%3 = tail call i32 @lapic_set(i32 896, i32 1048576)
ret void
}
int ft_numlen2(long long n) {
  int len;
  len = 0;
  if (n == 0)
    return (1);
  while (n != 0) {
    n /= 10;
    len++;
  }
  return (len);
}


x86 assembly (clang, -O0):
<ft_numlen2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1126 <ft_numlen2+0x26>
movl   $0x1,-0x4(%rbp)
jmp    115c <ft_numlen2+0x5c>
jmp    112b <ft_numlen2+0x2b>
cmpq   $0x0,-0x10(%rbp)
je     1156 <ft_numlen2+0x56>
mov    -0x10(%rbp),%rax
mov    $0xa,%ecx
cqto
idiv   %rcx
mov    %rax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112b <ft_numlen2+0x2b>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_numlen2>:
test   %rdi,%rdi
je     1147 <ft_numlen2+0x47>
xor    %ecx,%ecx
movabs $0x6666666666666667,%rsi
66 66 66
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %rdi,%rax
imul   %rsi
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x2,%rdx
add    %rax,%rdx
add    $0x1,%ecx
add    $0x9,%rdi
cmp    $0x12,%rdi
mov    %rdx,%rdi
ja     1120 <ft_numlen2+0x20>
mov    %ecx,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ft_numlen2(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 0, i32* %4
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %19
8: ; preds = %1
br label %9
9: ; preds = %12, %8
%10 = load i64, i64* %3
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %17
12: ; preds = %9
%13 = load i64, i64* %3
%14 = sdiv i64 %13, 10
store i64 %14, i64* %3
%15 = load i32, i32* %4
%16 = add nsw i32 %15, 1
store i32 %16, i32* %4
br label %9
17: ; preds = %9
%18 = load i32, i32* %4
store i32 %18, i32* %2
br label %19
19: ; preds = %17, %7
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @ft_numlen2(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i64 [ %6, %3 ], [ %0, %1 ]
%6 = sdiv i64 %5, 10
%7 = add nuw nsw i32 %4, 1
%8 = add i64 %5, 9
%9 = icmp ult i64 %8, 19
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 1, %1 ], [ %7, %3 ]
ret i32 %11
}
FNIEMOP_DEF(iemOp_Grp10) {
  Log(("iemOp_Grp10 -> #UD\n"));
  return IEMOP_RAISE_INVALID_OPCODE();
}


x86 assembly (clang, -O0):
<FNIEMOP_DEF>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
mov    $0x0,%al
call   1040 <Log@plt>
mov    $0x0,%al
call   1030 <IEMOP_RAISE_INVALID_OPCODE@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FNIEMOP_DEF>:
push   %rax
lea    0xed8(%rip),%rdi
xor    %eax,%eax
call   1040 <Log@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <IEMOP_RAISE_INVALID_OPCODE@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"iemOp_Grp10 -> #UD\0A\00"
define i32 @FNIEMOP_DEF(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (i8*, ...) bitcast (i32 (...)* @Log to i32 (i8*, ...)*)(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%4 = call i32 (...) @IEMOP_RAISE_INVALID_OPCODE()
ret i32 %4
}

LLVM IR (-O2):
@.str = [20 x i8] c"iemOp_Grp10 -> #UD\0A\00"
define i32 @FNIEMOP_DEF(i32 %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @Log to i32 (i8*, ...)*)(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @IEMOP_RAISE_INVALID_OPCODE()
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
char *sprint_uptime();
void print_uptime(void) { printf("%s\n", sprint_uptime()); }


x86 assembly (clang, -O0):
<print_uptime>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sprint_uptime@plt>
mov    %rax,%rsi
lea    0xecb(%rip),%rdi
call   1040 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_uptime>:
push   %rax
xor    %eax,%eax
call   1030 <sprint_uptime@plt>
lea    0xed1(%rip),%rdi
mov    %rax,%rsi
pop    %rax
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @print_uptime() {
%1 = call i8* (...) @sprint_uptime()
%2 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %1)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @print_uptime() {
%1 = tail call i8* (...) @sprint_uptime()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %1)
ret void
}
indreg0reg1_set(r0, r1, x0, x1, p0, p1) int r0, r1;
int *p0, *p1;
{ (*p0) = r1; }


x86 assembly (clang, -O0):
<indreg0reg1_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<indreg0reg1_set>:
mov    %esi,(%r8)
ret

LLVM IR (-O0):
define i32 @indreg0reg1_set(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32, i32* %9
%15 = load i32*, i32** %12
store i32 %14, i32* %15
%16 = load i32, i32* %7
ret i32 %16
}

LLVM IR (-O2):
define i32 @indreg0reg1_set(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture writeonly %4, i32* nocapture readnone %5) {
store i32 %1, i32* %4
ret i32 undef
}
/* Variables and functions */
int with_runpath(int);
int lowest(int par) {
  int local = with_runpath(par);
  return local * 2;
}


x86 assembly (clang, -O0):
<lowest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <with_runpath@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lowest>:
push   %rax
call   1030 <with_runpath@plt>
add    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @lowest(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @with_runpath(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = mul nsw i32 %6, 2
ret i32 %7
}

LLVM IR (-O2):
define i32 @lowest(i32 %0) {
%2 = tail call i32 @with_runpath(i32 %0)
%3 = shl nsw i32 %2, 1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ pio_outbyte(unsigned char, unsigned char);
void pio_rep_outbyte(unsigned char addrDataReg, unsigned char *bufAddr,
                     long byteCnt) {
  while (byteCnt > 0) {
    pio_outbyte(addrDataReg, *bufAddr);
    bufAddr++;
    byteCnt--;
  }
}


x86 assembly (clang, -O0):
<pio_rep_outbyte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jle    1160 <pio_rep_outbyte+0x50>
mov    -0x1(%rbp),%cl
mov    -0x10(%rbp),%rax
movzbl %cl,%edi
movzbl (%rax),%esi
call   1030 <pio_outbyte@plt>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x18(%rbp)
jmp    1126 <pio_rep_outbyte+0x16>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pio_rep_outbyte>:
push   %rbp
push   %r14
push   %rbx
test   %rdx,%rdx
jle    1148 <pio_rep_outbyte+0x38>
mov    %rdx,%r14
mov    %rsi,%rbx
add    $0x1,%r14
movzbl %dil,%ebp
nopw   0x0(%rax,%rax,1)
movzbl (%rbx),%esi
mov    %ebp,%edi
call   1030 <pio_outbyte@plt>
add    $0x1,%rbx
add    $0xffffffffffffffff,%r14
cmp    $0x1,%r14
ja     1130 <pio_rep_outbyte+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @pio_rep_outbyte(i8 zeroext %0, i8* %1, i64 %2) {
%4 = alloca i8
%5 = alloca i8*
%6 = alloca i64
store i8 %0, i8* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
br label %7
7: ; preds = %10, %3
%8 = load i64, i64* %6
%9 = icmp sgt i64 %8, 0
br i1 %9, label %10, label %19
10: ; preds = %7
%11 = load i8, i8* %4
%12 = load i8*, i8** %5
%13 = load i8, i8* %12
%14 = call i32 @pio_outbyte(i8 zeroext %11, i8 zeroext %13)
%15 = load i8*, i8** %5
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %5
%17 = load i64, i64* %6
%18 = add nsw i64 %17, -1
store i64 %18, i64* %6
br label %7
19: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @pio_rep_outbyte(i8 zeroext %0, i8* nocapture %1, i64 %2) {
%4 = icmp sgt i64 %2, 0
br i1 %4, label %5, label %13
5: ; preds = %3, %5
%6 = phi i64 [ %11, %5 ], [ %2, %3 ]
%7 = phi i8* [ %10, %5 ], [ %1, %3 ]
%8 = load i8, i8* %7
%9 = tail call i32 @pio_outbyte(i8 zeroext %0, i8 zeroext %8)
%10 = getelementptr inbounds i8, i8* %7, i64 1
%11 = add nsw i64 %6, -1
%12 = icmp ugt i64 %6, 1
br i1 %12, label %5, label %13
13: ; preds = %5, %3
ret void
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_is_socket(int fd, int family, int type, int listening) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_is_socket>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ec7(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_is_socket>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_is_socket(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* @EINVAL
%10 = sub nsw i32 0, %9
ret i32 %10
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_is_socket(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = load i32, i32* @EINVAL
%6 = sub nsw i32 0, %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("\n\n Hello World \n\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"\0A\0A Hello World \0A\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [17 x i8] c"\0A\0A Hello World \0A\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
ret i32 0
}
double ewens_stat(int *r) {
  int *ipt;
  double coef;
  coef = 1.0;
  for (ipt = r + 1; *ipt; ipt++)
    coef *= *ipt;
  return 1.0 / coef;
}


x86 assembly (clang, -O0):
<ewens_stat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  0xef0(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpl   $0x0,(%rax)
je     1151 <ewens_stat+0x51>
mov    -0x10(%rbp),%rax
cvtsi2sdl (%rax),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x10(%rbp)
jmp    1121 <ewens_stat+0x21>
movsd  0xea7(%rip),%xmm0
divsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ewens_stat>:
mov    0x4(%rdi),%eax
movsd  0xef5(%rip),%xmm0
movapd %xmm0,%xmm1
test   %eax,%eax
je     1135 <ewens_stat+0x35>
add    $0x8,%rdi
movsd  0xee1(%rip),%xmm1
nop
xorps  %xmm2,%xmm2
cvtsi2sd %eax,%xmm2
mulsd  %xmm2,%xmm1
mov    (%rdi),%eax
add    $0x4,%rdi
test   %eax,%eax
jne    1120 <ewens_stat+0x20>
divsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @ewens_stat(i32* %0) {
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca double
store i32* %0, i32** %2
store double 1.000000e+00, double* %4
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 1
store i32* %6, i32** %3
br label %7
7: ; preds = %17, %1
%8 = load i32*, i32** %3
%9 = load i32, i32* %8
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %20
11: ; preds = %7
%12 = load i32*, i32** %3
%13 = load i32, i32* %12
%14 = sitofp i32 %13 to double
%15 = load double, double* %4
%16 = fmul double %15, %14
store double %16, double* %4
br label %17
17: ; preds = %11
%18 = load i32*, i32** %3
%19 = getelementptr inbounds i32, i32* %18, i32 1
store i32* %19, i32** %3
br label %7
20: ; preds = %7
%21 = load double, double* %4
%22 = fdiv double 1.000000e+00, %21
ret double %22
}

LLVM IR (-O2):
define double @ewens_stat(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 1
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 0
br i1 %4, label %14, label %5
5: ; preds = %1, %5
%6 = phi i32 [ %12, %5 ], [ %3, %1 ]
%7 = phi i32* [ %11, %5 ], [ %2, %1 ]
%8 = phi double [ %10, %5 ], [ 1.000000e+00, %1 ]
%9 = sitofp i32 %6 to double
%10 = fmul double %8, %9
%11 = getelementptr inbounds i32, i32* %7, i64 1
%12 = load i32, i32* %11
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %5
14: ; preds = %5, %1
%15 = phi double [ 1.000000e+00, %1 ], [ %10, %5 ]
%16 = fdiv double 1.000000e+00, %15
ret double %16
}
/* Type definitions */
typedef int int32_t;
typedef int int16_t;

/* Variables and functions */
int32_t mul16(int16_t x, int16_t y) { return ((int32_t)x * y); }


x86 assembly (clang, -O0):
<mul16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mul16>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @mul16(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @mul16(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int atoi(char const *);
int /*<<< orphan*/ error(char *, char const *);
int /*<<< orphan*/ is_number(char const *);
int number(const char *s) {
  if (!is_number(s))
    error("Illegal number: %s", s);
  return atoi(s);
}


x86 assembly (clang, -O0):
<number>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <is_number@plt>
cmp    $0x0,%eax
jne    115e <number+0x2e>
mov    -0x8(%rbp),%rsi
lea    0xea7(%rip),%rdi
call   1040 <error@plt>
mov    -0x8(%rbp),%rdi
call   1050 <atoi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<number>:
push   %rbx
mov    %rdi,%rbx
call   1030 <is_number@plt>
test   %eax,%eax
jne    114c <number+0x1c>
lea    0xebc(%rip),%rdi
mov    %rbx,%rsi
call   1040 <error@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1050 <atoi@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"Illegal number: %s\00"
define i32 @number(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @is_number(i8* %3)
%5 = icmp ne i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i32 @error(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %7)
br label %9
9: ; preds = %6, %1
%10 = load i8*, i8** %2
%11 = call i32 @atoi(i8* %10)
ret i32 %11
}

LLVM IR (-O2):
@.str = [19 x i8] c"Illegal number: %s\00"
define i32 @number(i8* %0) {
%2 = tail call i32 @is_number(i8* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @error(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %6
6: ; preds = %4, %1
%7 = tail call i32 @atoi(i8* %0)
ret i32 %7
}
unsigned ilog10(unsigned n) {
  int r = 0;
  while (n >= 10)
    n /= 10, r++;
  return r;
}


x86 assembly (clang, -O0):
<ilog10>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x4(%rbp)
jb     1135 <ilog10+0x35>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <ilog10+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ilog10>:
xor    %eax,%eax
cmp    $0xa,%edi
jb     1124 <ilog10+0x24>
xor    %eax,%eax
mov    $0xcccccccd,%ecx
xchg   %ax,%ax
mov    %edi,%edx
imul   %rcx,%rdx
shr    $0x23,%rdx
add    $0x1,%eax
cmp    $0x63,%edi
mov    %edx,%edi
ja     1110 <ilog10+0x10>
ret

LLVM IR (-O0):
define i32 @ilog10(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp uge i32 %5, 10
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %2
%9 = udiv i32 %8, 10
store i32 %9, i32* %2
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @ilog10(i32 %0) {
%2 = icmp ugt i32 %0, 9
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = udiv i32 %5, 10
%7 = add nuw nsw i32 %4, 1
%8 = icmp ugt i32 %5, 99
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %10
}
/* Type definitions */
struct CgDrv {
  int dummy;
};

/* Variables and functions */
int CgDrv_Compile(struct CgDrv *cgdrv, int unknown, int type, const char *code,
                  size_t length, int unknown2, int unknown3) {
  return -1;
}


x86 assembly (clang, -O0):
<CgDrv_Compile>:
push   %rbp
mov    %rsp,%rbp
mov    0x10(%rbp),%eax
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9d,-0x24(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CgDrv_Compile>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.CgDrv = type { i32 }
define i32 @CgDrv_Compile(%struct.CgDrv* %0, i32 %1, i32 %2, i8* %3, i64 %4, i32 %5, i32 %6) {
%8 = alloca %struct.CgDrv*
%9 = alloca i32
%10 = alloca i32
%11 = alloca i8*
%12 = alloca i64
%13 = alloca i32
%14 = alloca i32
store %struct.CgDrv* %0, %struct.CgDrv** %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i8* %3, i8** %11
store i64 %4, i64* %12
store i32 %5, i32* %13
store i32 %6, i32* %14
ret i32 -1
}

LLVM IR (-O2):
%struct.CgDrv = type { i32 }
define i32 @CgDrv_Compile(%struct.CgDrv* nocapture readnone %0, i32 %1, i32 %2, i8* nocapture readnone %3, i64 %4, i32 %5, i32 %6) {
ret i32 -1
}
/* Variables and functions */
int bar(char const **);
int foo(const char **list) { return bar(list); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <bar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
jmp    1030 <bar@plt>

LLVM IR (-O0):
define i32 @foo(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = call i32 @bar(i8** %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @foo(i8** %0) {
%2 = tail call i32 @bar(i8** %0)
ret i32 %2
}
int main() {
  int x;
  int *p;
  int **pp;
  x = 0;
  p = &x;
  pp = &p;
  if (*p)
    return 1;
  if (**pp)
    return 1;
  else
    **pp = 1;
  if (x)
    return 0;
  else
    return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
lea    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpl   $0x0,(%rax)
je     113b <main+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    1181 <main+0x81>
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
cmpl   $0x0,(%rax)
je     1157 <main+0x57>
movl   $0x1,-0x4(%rbp)
jmp    1181 <main+0x81>
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
movl   $0x1,(%rax)
cmpl   $0x0,-0x8(%rbp)
je     117a <main+0x7a>
movl   $0x0,-0x4(%rbp)
jmp    1181 <main+0x81>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32**
store i32 0, i32* %1
store i32 0, i32* %2
store i32* %2, i32** %3
store i32** %3, i32*** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %0
store i32 1, i32* %1
br label %23
9: ; preds = %0
%10 = load i32**, i32*** %4
%11 = load i32*, i32** %10
%12 = load i32, i32* %11
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %9
store i32 1, i32* %1
br label %23
15: ; preds = %9
%16 = load i32**, i32*** %4
%17 = load i32*, i32** %16
store i32 1, i32* %17
br label %18
18: ; preds = %15
%19 = load i32, i32* %2
%20 = icmp ne i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %18
store i32 0, i32* %1
br label %23
22: ; preds = %18
store i32 1, i32* %1
br label %23
23: ; preds = %22, %21, %14, %8
%24 = load i32, i32* %1
ret i32 %24
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
scalar_t__ mik_isdigit(int);
int mik_isxdigit(int c) {
  return (mik_isdigit(c) || (c >= 'a' && c <= 'f') || (c >= 'A' && c <= 'F'));
}


x86 assembly (clang, -O0):
<mik_isxdigit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <mik_isdigit@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    116d <mik_isxdigit+0x5d>
cmpl   $0x61,-0x4(%rbp)
jl     114e <mik_isxdigit+0x3e>
mov    $0x1,%al
cmpl   $0x66,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    116d <mik_isxdigit+0x5d>
xor    %eax,%eax
cmpl   $0x41,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     1167 <mik_isxdigit+0x57>
cmpl   $0x46,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mik_isxdigit>:
push   %rbx
mov    %edi,%ebx
call   1030 <mik_isdigit@plt>
test   %rax,%rax
setne  %al
and    $0xffffffdf,%ebx
add    $0xffffffbf,%ebx
cmp    $0x6,%ebx
setb   %cl
or     %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @mik_isxdigit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @mik_isdigit(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %20, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp sge i32 %7, 97
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %2
%11 = icmp sle i32 %10, 102
br i1 %11, label %20, label %12
12: ; preds = %9, %6
%13 = load i32, i32* %2
%14 = icmp sge i32 %13, 65
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i32, i32* %2
%17 = icmp sle i32 %16, 70
br label %18
18: ; preds = %15, %12
%19 = phi i1 [ false, %12 ], [ %17, %15 ]
br label %20
20: ; preds = %18, %9, %1
%21 = phi i1 [ true, %9 ], [ true, %1 ], [ %19, %18 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @mik_isxdigit(i32 %0) {
%2 = tail call i64 @mik_isdigit(i32 %0)
%3 = icmp ne i64 %2, 0
%4 = and i32 %0, -33
%5 = add i32 %4, -65
%6 = icmp ult i32 %5, 6
%7 = or i1 %6, %3
%8 = zext i1 %7 to i32
ret i32 %8
}
int main() {
  int *a;
  a = 0x1000;
  int b = 0;
  for (; b < 1000000; b++)
    *a++;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x1000,%eax
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0xf4240,-0x14(%rbp)
jge    1142 <main+0x42>
mov    -0x10(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    111b <main+0x1b>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32
store i32 0, i32* %1
store i32* inttoptr (i64 4096 to i32*), i32** %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %0
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 1000000
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32*, i32** %2
%9 = getelementptr inbounds i32, i32* %8, i32 1
store i32* %9, i32** %2
%10 = load i32, i32* %8
br label %11
11: ; preds = %7
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
%15 = load i32, i32* %1
ret i32 %15
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
double max(double a, double b) {
  if (a > b) {
    return a;
  } else {
    return b;
  }
}


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
ucomisd -0x18(%rbp),%xmm0
jbe    112d <max+0x2d>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1137 <max+0x37>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
maxsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @max(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %4
%7 = load double, double* %5
%8 = fcmp ogt double %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load double, double* %4
store double %10, double* %3
br label %13
11: ; preds = %2
%12 = load double, double* %5
store double %12, double* %3
br label %13
13: ; preds = %11, %9
%14 = load double, double* %3
ret double %14
}

LLVM IR (-O2):
define double @max(double %0, double %1) {
%3 = fcmp ogt double %0, %1
%4 = select i1 %3, double %0, double %1
ret double %4
}
void swap(char *a, char *b) {
  char x = *a;
  *a = *b;
  *b = x;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x11(%rbp),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi),%al
mov    (%rsi),%cl
mov    %cl,(%rdi)
mov    %al,(%rsi)
ret

LLVM IR (-O0):
define void @swap(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
store i8 %7, i8* %5
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = load i8*, i8** %3
store i8 %9, i8* %10
%11 = load i8, i8* %5
%12 = load i8*, i8** %4
store i8 %11, i8* %12
ret void
}

LLVM IR (-O2):
define void @swap(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
store i8 %4, i8* %0
store i8 %3, i8* %1
ret void
}
/* Variables and functions */
scalar_t__ __gen_tempname(char *, int, int /*<<< orphan*/, int /*<<< orphan*/);
char *mktemp(char *template) {
  if (__gen_tempname(template, 3, 0, 0) < 0)
    template[0] = '\0';
  return template;
}


x86 assembly (clang, -O0):
<mktemp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x3,%esi
xor    %ecx,%ecx
mov    %ecx,%edx
call   1030 <__gen_tempname@plt>
cmp    $0x0,%rax
jge    113f <mktemp+0x2f>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mktemp>:
push   %rbx
mov    %rdi,%rbx
mov    $0x3,%esi
xor    %edx,%edx
xor    %ecx,%ecx
call   1030 <__gen_tempname@plt>
test   %rax,%rax
jns    112a <mktemp+0x1a>
movb   $0x0,(%rbx)
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @mktemp(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @__gen_tempname(i8* %3, i32 3, i32 0, i32 0)
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 0
store i8 0, i8* %8
br label %9
9: ; preds = %6, %1
%10 = load i8*, i8** %2
ret i8* %10
}

LLVM IR (-O2):
define i8* @mktemp(i8* returned %0) {
%2 = tail call i64 @__gen_tempname(i8* %0, i32 3, i32 0, i32 0)
%3 = icmp slt i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %1
store i8 0, i8* %0
br label %5
5: ; preds = %4, %1
ret i8* %0
}
int pathcon_nm4_f0(const double **arg, double **res, int *iw, double *w,
                   int mem) {
  return 0;
}


x86 assembly (clang, -O0):
<pathcon_nm4_f0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm4_f0>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pathcon_nm4_f0(double** %0, double** %1, i32* %2, double* %3, i32 %4) {
%6 = alloca double**
%7 = alloca double**
%8 = alloca i32*
%9 = alloca double*
%10 = alloca i32
store double** %0, double*** %6
store double** %1, double*** %7
store i32* %2, i32** %8
store double* %3, double** %9
store i32 %4, i32* %10
ret i32 0
}

LLVM IR (-O2):
define i32 @pathcon_nm4_f0(double** nocapture readnone %0, double** nocapture readnone %1, i32* nocapture readnone %2, double* nocapture readnone %3, i32 %4) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
void fatal(char *msg) {
  perror(msg);
  exit(2);
}


x86 assembly (clang, -O0):
<fatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<fatal>:
push   %rax
call   1030 <perror@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @fatal(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = call i32 @exit(i32 2)
unreachable
}

LLVM IR (-O2):
define void @fatal(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = tail call i32 @exit(i32 2)
unreachable
}
int test_imm_6Bint8_reg(signed char val) {
  return ((val) & (-0x6B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Bint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff95,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Bint8_reg>:
test   $0x95,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Bint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -107
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_6Bint8_reg(i8 signext %0) {
%2 = and i8 %0, -107
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void ScaleRowDown2_Any_SSSE3() {}


x86 assembly (clang, -O0):
<ScaleRowDown2_Any_SSSE3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ScaleRowDown2_Any_SSSE3>:
ret

LLVM IR (-O0):
define void @ScaleRowDown2_Any_SSSE3() {
ret void
}

LLVM IR (-O2):
define void @ScaleRowDown2_Any_SSSE3() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *open_skunk_file_desc(int);
FILE *skunk_stderr() { return open_skunk_file_desc(1); }


x86 assembly (clang, -O0):
<skunk_stderr>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <open_skunk_file_desc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<skunk_stderr>:
mov    $0x1,%edi
jmp    1030 <open_skunk_file_desc@plt>

LLVM IR (-O0):
define i32* @skunk_stderr() {
%1 = call i32* @open_skunk_file_desc(i32 1)
ret i32* %1
}

LLVM IR (-O2):
define i32* @skunk_stderr() {
%1 = tail call i32* @open_skunk_file_desc(i32 1)
ret i32* %1
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0x40() {
  Assert_real((isdigit(64) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              325, ("isdigit should be 0 for @"));
}


x86 assembly (clang, -O0):
<t_isdigit_0x40>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x145,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0x40>:
push   %rax
mov    $0x40,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x145,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [26 x i8] c"isdigit should be 0 for @\00"
define void @t_isdigit_0x40() {
%1 = call i64 @isdigit(i32 64)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 325, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [26 x i8] c"isdigit should be 0 for @\00"
define void @t_isdigit_0x40() {
%1 = tail call i64 @isdigit(i32 64)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 325, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
unsigned ZSTD_versionNumber(void) { return (0 * 100 * 100 + 0 * 100 + 1); }


x86 assembly (clang, -O0):
<ZSTD_versionNumber>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZSTD_versionNumber>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ZSTD_versionNumber() {
ret i32 1
}

LLVM IR (-O2):
define i32 @ZSTD_versionNumber() {
ret i32 1
}
float fac(float n) {
  static float f = 1;
  f = f * n;
  return (f);
}


x86 assembly (clang, -O0):
<fac>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0x2f0f(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  %xmm0,0x2f02(%rip)
movss  0x2efa(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fac>:
mulss  0x2f18(%rip),%xmm0
movss  %xmm0,0x2f10(%rip)
ret

LLVM IR (-O0):
@fac.f = internal global float 1.000000e+00
define float @fac(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* @fac.f
%4 = load float, float* %2
%5 = fmul float %3, %4
store float %5, float* @fac.f
%6 = load float, float* @fac.f
ret float %6
}

LLVM IR (-O2):
@fac.f = internal unnamed_addr global float 1.000000e+00
define float @fac(float %0) {
%2 = load float, float* @fac.f
%3 = fmul float %2, %0
store float %3, float* @fac.f
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRCORE_N16_swap(char *, int, int);
void U_WMRSCALEVIEWPORTEXT_swap(char *record, int torev) {
  U_WMRCORE_N16_swap(record, 4, torev);
}


x86 assembly (clang, -O0):
<U_WMRSCALEVIEWPORTEXT_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    $0x4,%esi
call   1030 <U_WMRCORE_N16_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRSCALEVIEWPORTEXT_swap>:
mov    %esi,%edx
mov    $0x4,%esi
jmp    1030 <U_WMRCORE_N16_swap@plt>

LLVM IR (-O0):
define void @U_WMRSCALEVIEWPORTEXT_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRCORE_N16_swap(i8* %5, i32 4, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMRSCALEVIEWPORTEXT_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRCORE_N16_swap(i8* %0, i32 4, i32 %1)
ret void
}