#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int read_fsr();
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ write_fsr(int);
void enable_infen() {
  uint8_t fsr = read_fsr();
  if (!(fsr & (1 << 3))) {
    write_fsr(fsr | (1 << 3));
    fsr = read_fsr();
    if (!(fsr & (1 << 3))) {
      fprintf(stderr, "failed to set INFEN bit on FSR\n");
      exit(EXIT_FAILURE);
    }
  }
}


x86 assembly (clang, -O0):
<enable_infen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <read_fsr@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x8,%eax
cmp    $0x0,%eax
jne    11ad <enable_infen+0x6d>
mov    -0x4(%rbp),%edi
or     $0x8,%edi
call   1030 <write_fsr@plt>
mov    $0x0,%al
call   1050 <read_fsr@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x8,%eax
cmp    $0x0,%eax
jne    11a8 <enable_infen+0x68>
mov    0x2e54(%rip),%rax
mov    (%rax),%edi
lea    0xe6b(%rip),%rsi
call   1040 <fprintf@plt>
mov    0x2e37(%rip),%rax
mov    (%rax),%edi
call   1060 <exit@plt>
jmp    11ad <enable_infen+0x6d>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<enable_infen>:
push   %rax
xor    %eax,%eax
call   1050 <read_fsr@plt>
test   $0x8,%al
jne    1161 <enable_infen+0x21>
or     $0x8,%eax
mov    %eax,%edi
call   1030 <write_fsr@plt>
xor    %eax,%eax
call   1050 <read_fsr@plt>
test   $0x8,%al
je     1163 <enable_infen+0x23>
pop    %rax
ret
mov    0x2e76(%rip),%rax
mov    (%rax),%edi
lea    0xe8d(%rip),%rsi
call   1040 <fprintf@plt>
mov    0x2e59(%rip),%rax
mov    (%rax),%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [32 x i8] c"failed to set INFEN bit on FSR\0A\00"
@EXIT_FAILURE = global i32 0
define void @enable_infen() {
%1 = alloca i32
%2 = call i32 (...) @read_fsr()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = and i32 %3, 8
%5 = icmp ne i32 %4, 0
br i1 %5, label %20, label %6
6: ; preds = %0
%7 = load i32, i32* %1
%8 = or i32 %7, 8
%9 = call i32 @write_fsr(i32 %8)
%10 = call i32 (...) @read_fsr()
store i32 %10, i32* %1
%11 = load i32, i32* %1
%12 = and i32 %11, 8
%13 = icmp ne i32 %12, 0
br i1 %13, label %19, label %14
14: ; preds = %6
%15 = load i32, i32* @stderr
%16 = call i32 @fprintf(i32 %15, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%17 = load i32, i32* @EXIT_FAILURE
%18 = call i32 @exit(i32 %17)
unreachable
19: ; preds = %6
br label %20
20: ; preds = %19, %0
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [32 x i8] c"failed to set INFEN bit on FSR\0A\00"
@EXIT_FAILURE = global i32 0
define void @enable_infen() {
%1 = tail call i32 (...) @read_fsr()
%2 = and i32 %1, 8
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %15
4: ; preds = %0
%5 = or i32 %1, 8
%6 = tail call i32 @write_fsr(i32 %5)
%7 = tail call i32 (...) @read_fsr()
%8 = and i32 %7, 8
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %15
10: ; preds = %4
%11 = load i32, i32* @stderr
%12 = tail call i32 @fprintf(i32 %11, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%13 = load i32, i32* @EXIT_FAILURE
%14 = tail call i32 @exit(i32 %13)
unreachable
15: ; preds = %4, %0
ret void
}