xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ find_one(char *);
void find_one_index_small_test() {
  find_one("benchmarks"
           ".index.small");
}


x86 assembly (clang, -O0):
<find_one_index_small_test>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <find_one@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_one_index_small_test>:
lea    0xee9(%rip),%rdi
jmp    1030 <find_one@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"benchmarks.index.small\00"
define void @find_one_index_small_test() {
%1 = call i32 @find_one(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c"benchmarks.index.small\00"
define void @find_one_index_small_test() {
%1 = tail call i32 @find_one(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret void
}
float ANTweenTimingFunctionQuartIn(float time, float begin, float change,
                                   float duration) {
  time /= duration;
  return change * time * time * time * time + begin;
}


x86 assembly (clang, -O0):
<ANTweenTimingFunctionQuartIn>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0x10(%rbp),%xmm1
movss  -0x4(%rbp),%xmm0
divss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0xc(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ANTweenTimingFunctionQuartIn>:
divss  %xmm3,%xmm0
mulss  %xmm0,%xmm2
mulss  %xmm0,%xmm2
mulss  %xmm0,%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @ANTweenTimingFunctionQuartIn(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %8
%10 = load float, float* %5
%11 = fdiv float %10, %9
store float %11, float* %5
%12 = load float, float* %7
%13 = load float, float* %5
%14 = fmul float %12, %13
%15 = load float, float* %5
%16 = fmul float %14, %15
%17 = load float, float* %5
%18 = fmul float %16, %17
%19 = load float, float* %5
%20 = load float, float* %6
%21 = call float @llvm.fmuladd.f32(float %18, float %19, float %20)
ret float %21
}

LLVM IR (-O2):
define float @ANTweenTimingFunctionQuartIn(float %0, float %1, float %2, float %3) {
%5 = fdiv float %0, %3
%6 = fmul float %5, %2
%7 = fmul float %5, %6
%8 = fmul float %5, %7
%9 = tail call float @llvm.fmuladd.f32(float %8, float %5, float %1)
ret float %9
}
_Bool is_upper(int c) { return (64 < c && c < 91); }


x86 assembly (clang, -O0):
<is_upper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
mov    $0x40,%ecx
cmp    -0x4(%rbp),%ecx
mov    %al,-0x5(%rbp)
jge    1124 <is_upper+0x24>
cmpl   $0x5b,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_upper>:
add    $0xffffffbf,%edi
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define zeroext i1 @is_upper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 64, %3
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 91
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
ret i1 %9
}

LLVM IR (-O2):
define zeroext i1 @is_upper(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
ret i1 %3
}
struct x1a {
  int a;
} m0() {
}


x86 assembly (clang, -O0):
<m0>:
push   %rbp
mov    %rsp,%rbp
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<m0>:
ret

LLVM IR (-O0):
%struct.x1a = type { i32 }
define i32 @m0() {
%1 = alloca %struct.x1a
%2 = getelementptr inbounds %struct.x1a, %struct.x1a* %1, i32 0, i32 0
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @m0() {
ret i32 undef
}
int geteuid() { return 0; }


x86 assembly (clang, -O0):
<geteuid>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<geteuid>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @geteuid() {
ret i32 0
}

LLVM IR (-O2):
define i32 @geteuid() {
ret i32 0
}
float truncf(float s) { return (float)(int)((double)s); }


x86 assembly (clang, -O0):
<truncf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
cvttsd2si %xmm0,%eax
cvtsi2ss %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<truncf>:
cvttps2dq %xmm0,%xmm0
cvtdq2ps %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @truncf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fptosi double %4 to i32
%6 = sitofp i32 %5 to float
ret float %6
}

LLVM IR (-O2):
define float @truncf(float %0) {
%2 = fptosi float %0 to i32
%3 = sitofp i32 %2 to float
ret float %3
}
/* Variables and functions */
scalar_t__ isspace(char);
void next_word(char **s, char *e) {
  while (isspace(*e))
    e++;
  *s = e;
}


x86 assembly (clang, -O0):
<next_word>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
je     1147 <next_word+0x37>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1120 <next_word+0x10>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_word>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
add    $0xffffffffffffffff,%rbx
xchg   %ax,%ax
movsbl 0x1(%rbx),%edi
add    $0x1,%rbx
call   1030 <isspace@plt>
test   %rax,%rax
jne    1120 <next_word+0x10>
mov    %rbx,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @next_word(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
store i8** %0, i8*** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %10, %2
%6 = load i8*, i8** %4
%7 = load i8, i8* %6
%8 = call i64 @isspace(i8 signext %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %5
%11 = load i8*, i8** %4
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %4
br label %5
13: ; preds = %5
%14 = load i8*, i8** %4
%15 = load i8**, i8*** %3
store i8* %14, i8** %15
ret void
}

LLVM IR (-O2):
define void @next_word(i8** nocapture writeonly %0, i8* %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %1, %2 ], [ %8, %3 ]
%5 = load i8, i8* %4
%6 = tail call i64 @isspace(i8 signext %5)
%7 = icmp eq i64 %6, 0
%8 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %7, label %9, label %3
9: ; preds = %3
store i8* %4, i8** %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm_or_si128(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ _mm_subs_epu8(int /*<<< orphan*/, int /*<<< orphan*/);
__m128i _mm_absdiff_epu8(__m128i x, __m128i y) {
  return _mm_or_si128(_mm_subs_epu8(x, y), _mm_subs_epu8(y, x));
}


x86 assembly (clang, -O0):
<_mm_absdiff_epu8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_subs_epu8@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x4(%rbp),%esi
call   1030 <_mm_subs_epu8@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%esi
call   1040 <_mm_or_si128@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mm_absdiff_epu8>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <_mm_subs_epu8@plt>
mov    %eax,%r14d
mov    %ebx,%edi
mov    %ebp,%esi
call   1030 <_mm_subs_epu8@plt>
mov    %r14d,%edi
mov    %eax,%esi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <_mm_or_si128@plt>

LLVM IR (-O0):
define i32 @_mm_absdiff_epu8(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_subs_epu8(i32 %5, i32 %6)
%8 = load i32, i32* %4
%9 = load i32, i32* %3
%10 = call i32 @_mm_subs_epu8(i32 %8, i32 %9)
%11 = call i32 @_mm_or_si128(i32 %7, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @_mm_absdiff_epu8(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_subs_epu8(i32 %0, i32 %1)
%4 = tail call i32 @_mm_subs_epu8(i32 %1, i32 %0)
%5 = tail call i32 @_mm_or_si128(i32 %3, i32 %4)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ LRDP(char *);
void uc9_mtxtrnsp() { LRDP("uc9:mtxtrnsp - ignored\n"); }


x86 assembly (clang, -O0):
<uc9_mtxtrnsp>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <LRDP@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<uc9_mtxtrnsp>:
lea    0xee9(%rip),%rdi
jmp    1030 <LRDP@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"uc9:mtxtrnsp - ignored\0A\00"
define void @uc9_mtxtrnsp() {
%1 = call i32 @LRDP(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"uc9:mtxtrnsp - ignored\0A\00"
define void @uc9_mtxtrnsp() {
%1 = tail call i32 @LRDP(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret void
}
double Sign(double n) {
  if (n >= 0)
    return +1.0;
  else
    return -1.0;
}


x86 assembly (clang, -O0):
<Sign>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     112d <Sign+0x2d>
movsd  0xee5(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    113a <Sign+0x3a>
movsd  0xecb(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sign>:
xorpd  %xmm1,%xmm1
xor    %eax,%eax
ucomisd %xmm1,%xmm0
setb   %al
lea    0xeec(%rip),%rcx
movsd  (%rcx,%rax,8),%xmm0
ret

LLVM IR (-O0):
define double @Sign(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp oge double %4, 0.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
store double 1.000000e+00, double* %2
br label %8
7: ; preds = %1
store double -1.000000e+00, double* %2
br label %8
8: ; preds = %7, %6
%9 = load double, double* %2
ret double %9
}

LLVM IR (-O2):
define double @Sign(double %0) {
%2 = fcmp ult double %0, 0.000000e+00
%3 = select i1 %2, double -1.000000e+00, double 1.000000e+00
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *, char *);
int /*<<< orphan*/ stderr;
char *strerror(int);
void perrorv(const char *msg, int err) {
  fprintf(stderr, "%s: %s\n", msg, strerror(err));
}


x86 assembly (clang, -O0):
<perrorv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <strerror@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rdx
mov    %rax,%rcx
lea    0xea4(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perrorv>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2eb3(%rip),%rax
mov    (%rax),%ebp
mov    %esi,%edi
call   1040 <strerror@plt>
lea    0xec3(%rip),%rsi
mov    %ebp,%edi
mov    %rbx,%rdx
mov    %rax,%rcx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
define void @perrorv(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i8* @strerror(i32 %7)
%9 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %6, i8* %8)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
define void @perrorv(i8* %0, i32 %1) {
%3 = load i32, i32* @stderr
%4 = tail call i8* @strerror(i32 %1)
%5 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ anvil_syslog(int /*<<< orphan*/, char *);
char *setlocale(int category, const char *locale) {
  anvil_syslog(0, "setlocale\n");
  return 0;
}


x86 assembly (clang, -O0):
<setlocale>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
lea    0xed8(%rip),%rsi
call   1030 <anvil_syslog@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setlocale>:
push   %rax
lea    0xee8(%rip),%rsi
xor    %edi,%edi
call   1030 <anvil_syslog@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"setlocale\0A\00"
define i8* @setlocale(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = call i32 @anvil_syslog(i32 0, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i8* null
}

LLVM IR (-O2):
@.str = [11 x i8] c"setlocale\0A\00"
define noalias i8* @setlocale(i32 %0, i8* nocapture readnone %1) {
%3 = tail call i32 @anvil_syslog(i32 0, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i8* null
}
/* Variables and functions */
float __builtin_wasm_max_f32(float, float);
scalar_t__ isnan(float);
float fmaxf(float x, float y) {
  if (isnan(x))
    return y;
  if (isnan(y))
    return x;
  return __builtin_wasm_max_f32(x, y);
}


x86 assembly (clang, -O0):
<fmaxf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
call   1040 <isnan@plt>
cmp    $0x0,%rax
je     1155 <fmaxf+0x35>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    118c <fmaxf+0x6c>
movss  -0xc(%rbp),%xmm0
call   1040 <isnan@plt>
cmp    $0x0,%rax
je     1178 <fmaxf+0x58>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    118c <fmaxf+0x6c>
movss  -0x8(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
call   1030 <__builtin_wasm_max_f32@plt>
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmaxf>:
push   %rax
movss  %xmm1,(%rsp)
movss  %xmm0,0x4(%rsp)
call   1040 <isnan@plt>
test   %rax,%rax
je     113d <fmaxf+0x1d>
movss  (%rsp),%xmm0
pop    %rax
ret
movss  (%rsp),%xmm0
call   1040 <isnan@plt>
test   %rax,%rax
je     1154 <fmaxf+0x34>
movss  0x4(%rsp),%xmm0
pop    %rax
ret
movss  0x4(%rsp),%xmm0
movss  (%rsp),%xmm1
pop    %rax
jmp    1030 <__builtin_wasm_max_f32@plt>

LLVM IR (-O0):
define float @fmaxf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %4
%7 = call i64 @isnan(float %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load float, float* %5
store float %10, float* %3
br label %21
11: ; preds = %2
%12 = load float, float* %5
%13 = call i64 @isnan(float %12)
%14 = icmp ne i64 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = load float, float* %4
store float %16, float* %3
br label %21
17: ; preds = %11
%18 = load float, float* %4
%19 = load float, float* %5
%20 = call float @__builtin_wasm_max_f32(float %18, float %19)
store float %20, float* %3
br label %21
21: ; preds = %17, %15, %9
%22 = load float, float* %3
ret float %22
}

LLVM IR (-O2):
define float @fmaxf(float %0, float %1) {
%3 = tail call i64 @isnan(float %0)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %10
5: ; preds = %2
%6 = tail call i64 @isnan(float %1)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = tail call float @__builtin_wasm_max_f32(float %0, float %1)
br label %10
10: ; preds = %5, %2, %8
%11 = phi float [ %9, %8 ], [ %1, %2 ], [ %0, %5 ]
ret float %11
}
/* Type definitions */
struct kvm_cpuid2 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ KVM_GET_SUPPORTED_CPUID;
int ioctl(int, int /*<<< orphan*/, struct kvm_cpuid2 *);
int kvm_get_supported_cpuid(int fd, struct kvm_cpuid2 *cpuid) {
  return ioctl(fd, KVM_GET_SUPPORTED_CPUID, cpuid);
}


x86 assembly (clang, -O0):
<kvm_get_supported_cpuid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eb7(%rip),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rdx
call   1030 <ioctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kvm_get_supported_cpuid>:
mov    %rsi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%esi
jmp    1030 <ioctl@plt>

LLVM IR (-O0):
%struct.kvm_cpuid2 = type { i32 }
@KVM_GET_SUPPORTED_CPUID = global i32 0
define i32 @kvm_get_supported_cpuid(i32 %0, %struct.kvm_cpuid2* %1) {
%3 = alloca i32
%4 = alloca %struct.kvm_cpuid2*
store i32 %0, i32* %3
store %struct.kvm_cpuid2* %1, %struct.kvm_cpuid2** %4
%5 = load i32, i32* %3
%6 = load i32, i32* @KVM_GET_SUPPORTED_CPUID
%7 = load %struct.kvm_cpuid2*, %struct.kvm_cpuid2** %4
%8 = call i32 @ioctl(i32 %5, i32 %6, %struct.kvm_cpuid2* %7)
ret i32 %8
}

LLVM IR (-O2):
%struct.kvm_cpuid2 = type { i32 }
@KVM_GET_SUPPORTED_CPUID = global i32 0
define i32 @kvm_get_supported_cpuid(i32 %0, %struct.kvm_cpuid2* %1) {
%3 = load i32, i32* @KVM_GET_SUPPORTED_CPUID
%4 = tail call i32 @ioctl(i32 %0, i32 %3, %struct.kvm_cpuid2* %1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ putbits(int, int);
void putdmv(int dmv) {
  {
    if (dmv == 0) {
      putbits(0, 1);
    } else if (dmv > 0) {
      putbits(2, 2);
    } else {
      putbits(3, 2);
    }
    return;
  }
}


x86 assembly (clang, -O0):
<putdmv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1136 <putdmv+0x26>
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <putbits@plt>
jmp    1165 <putdmv+0x55>
cmpl   $0x0,-0x4(%rbp)
jle    1151 <putdmv+0x41>
mov    $0x2,%esi
mov    %esi,%edi
call   1030 <putbits@plt>
jmp    1160 <putdmv+0x50>
mov    $0x3,%edi
mov    $0x2,%esi
call   1030 <putbits@plt>
jmp    1165 <putdmv+0x55>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putdmv>:
test   %edi,%edi
je     1125 <putdmv+0x15>
jle    1131 <putdmv+0x21>
mov    $0x2,%edi
mov    $0x2,%esi
jmp    1030 <putbits@plt>
xor    %edi,%edi
mov    $0x1,%esi
jmp    1030 <putbits@plt>
mov    $0x3,%edi
mov    $0x2,%esi
jmp    1030 <putbits@plt>

LLVM IR (-O0):
define void @putdmv(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @putbits(i32 0, i32 1)
br label %15
7: ; preds = %1
%8 = load i32, i32* %2
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = call i32 @putbits(i32 2, i32 2)
br label %14
12: ; preds = %7
%13 = call i32 @putbits(i32 3, i32 2)
br label %14
14: ; preds = %12, %10
br label %15
15: ; preds = %14, %5
ret void
}

LLVM IR (-O2):
define void @putdmv(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @putbits(i32 0, i32 1)
br label %11
5: ; preds = %1
%6 = icmp sgt i32 %0, 0
br i1 %6, label %7, label %9
7: ; preds = %5
%8 = tail call i32 @putbits(i32 2, i32 2)
br label %11
9: ; preds = %5
%10 = tail call i32 @putbits(i32 3, i32 2)
br label %11
11: ; preds = %7, %9, %3
ret void
}
void gdk_text_property_to_text_list_for_display() {}


x86 assembly (clang, -O0):
<gdk_text_property_to_text_list_for_display>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_text_property_to_text_list_for_display>:
ret

LLVM IR (-O0):
define void @gdk_text_property_to_text_list_for_display() {
ret void
}

LLVM IR (-O2):
define void @gdk_text_property_to_text_list_for_display() {
ret void
}
void fst_global_deinit(void) {}


x86 assembly (clang, -O0):
<fst_global_deinit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fst_global_deinit>:
ret

LLVM IR (-O0):
define void @fst_global_deinit() {
ret void
}

LLVM IR (-O2):
define void @fst_global_deinit() {
ret void
}
/* Variables and functions */
scalar_t__ strcmp(char *, char *);
int speaksFor(char *idc, char *idr) { return strcmp(idc, idr) == 0; }


x86 assembly (clang, -O0):
<speaksFor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<speaksFor>:
push   %rax
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @speaksFor(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i64 @strcmp(i8* %5, i8* %6)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @speaksFor(i8* %0, i8* %1) {
%3 = tail call i64 @strcmp(i8* %0, i8* %1)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ YM2612_writeSafe(int, int);
void YM2612_enableDAC() {
  YM2612_writeSafe(0, 0x2B);
  YM2612_writeSafe(1, 0x80);
}


x86 assembly (clang, -O0):
<YM2612_enableDAC>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0x2b,%esi
call   1030 <YM2612_writeSafe@plt>
mov    $0x1,%edi
mov    $0x80,%esi
call   1030 <YM2612_writeSafe@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<YM2612_enableDAC>:
push   %rax
xor    %edi,%edi
mov    $0x2b,%esi
call   1030 <YM2612_writeSafe@plt>
mov    $0x1,%edi
mov    $0x80,%esi
pop    %rax
jmp    1030 <YM2612_writeSafe@plt>

LLVM IR (-O0):
define void @YM2612_enableDAC() {
%1 = call i32 @YM2612_writeSafe(i32 0, i32 43)
%2 = call i32 @YM2612_writeSafe(i32 1, i32 128)
ret void
}

LLVM IR (-O2):
define void @YM2612_enableDAC() {
%1 = tail call i32 @YM2612_writeSafe(i32 0, i32 43)
%2 = tail call i32 @YM2612_writeSafe(i32 1, i32 128)
ret void
}
int test_510() { return 510; }


x86 assembly (clang, -O0):
<test_510>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1fe,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_510>:
mov    $0x1fe,%eax
ret

LLVM IR (-O0):
define i32 @test_510() {
ret i32 510
}

LLVM IR (-O2):
define i32 @test_510() {
ret i32 510
}
/* Variables and functions */
double SIM_power_draincap(int, int, int);
int SIM_power_gatecap(int, int /*<<< orphan*/);
double c_XOR(void) {
  return (SIM_power_draincap((8 * ((0.8 * 0.0875) * 0.5)), 0, 2) +
          SIM_power_draincap((2 * ((0.8 * 0.0875) * 0.5)), 1, 2) +
          2 * SIM_power_gatecap((8 * ((0.8 * 0.0875) * 0.5)) +
                                    (2 * ((0.8 * 0.0875) * 0.5)),
                                0));
}


x86 assembly (clang, -O0):
<c_XOR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %esi,%esi
mov    $0x2,%edx
mov    %esi,%edi
call   1030 <SIM_power_draincap@plt>
movsd  %xmm0,-0x10(%rbp)
xor    %edi,%edi
mov    $0x1,%esi
mov    $0x2,%edx
call   1030 <SIM_power_draincap@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
xor    %esi,%esi
mov    %esi,%edi
call   1040 <SIM_power_gatecap@plt>
movsd  -0x8(%rbp),%xmm0
shl    $0x1,%eax
cvtsi2sd %eax,%xmm1
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_XOR>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
mov    $0x2,%edx
call   1030 <SIM_power_draincap@plt>
movsd  %xmm0,(%rsp)
xor    %edi,%edi
mov    $0x1,%esi
mov    $0x2,%edx
call   1030 <SIM_power_draincap@plt>
addsd  (%rsp),%xmm0
movsd  %xmm0,(%rsp)
xor    %edi,%edi
xor    %esi,%esi
call   1040 <SIM_power_gatecap@plt>
add    %eax,%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
addsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @c_XOR() {
%1 = call double @SIM_power_draincap(i32 0, i32 0, i32 2)
%2 = call double @SIM_power_draincap(i32 0, i32 1, i32 2)
%3 = fadd double %1, %2
%4 = call i32 @SIM_power_gatecap(i32 0, i32 0)
%5 = mul nsw i32 2, %4
%6 = sitofp i32 %5 to double
%7 = fadd double %3, %6
ret double %7
}

LLVM IR (-O2):
define double @c_XOR() {
%1 = tail call double @SIM_power_draincap(i32 0, i32 0, i32 2)
%2 = tail call double @SIM_power_draincap(i32 0, i32 1, i32 2)
%3 = fadd double %1, %2
%4 = tail call i32 @SIM_power_gatecap(i32 0, i32 0)
%5 = shl nsw i32 %4, 1
%6 = sitofp i32 %5 to double
%7 = fadd double %3, %6
ret double %7
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ stdout;
int usage(char *prog, int error) {
  fprintf(error ? stderr : stdout,
          "usage: %s"
          " [ -g ] [ -t <sec> ]"
          " devnr\n",
          prog);
  exit(error);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     114a <usage+0x2a>
mov    0x2ea0(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
jmp    1156 <usage+0x36>
mov    0x2e87(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%edi
mov    -0x8(%rbp),%rdx
lea    0xe9c(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0xc(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    %esi,%ebx
mov    %rdi,%rdx
test   %esi,%esi
jne    1133 <usage+0x13>
mov    0x2ea7(%rip),%rax
jmp    113a <usage+0x1a>
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
lea    0xebd(%rip),%rsi
call   1030 <fprintf@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@stdout = global i32 0
@.str = [37 x i8] c"usage: %s [ -g ] [ -t <sec> ] devnr\0A\00"
define i32 @usage(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = load i32, i32* @stderr
br label %11
9: ; preds = %2
%10 = load i32, i32* @stdout
br label %11
11: ; preds = %9, %7
%12 = phi i32 [ %8, %7 ], [ %10, %9 ]
%13 = load i8*, i8** %3
%14 = call i32 @fprintf(i32 %12, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i8* %13)
%15 = load i32, i32* %4
%16 = call i32 @exit(i32 %15)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@stdout = global i32 0
@.str = [37 x i8] c"usage: %s [ -g ] [ -t <sec> ] devnr\0A\00"
define i32 @usage(i8* %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = load i32, i32* @stderr
%5 = load i32, i32* @stdout
%6 = select i1 %3, i32 %5, i32 %4
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i8* %0)
%8 = tail call i32 @exit(i32 %1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void loop1(void) {
  for (int x = 0; x < 10; x++) {
    printf("%d\n", x);
  }
}


x86 assembly (clang, -O0):
<loop1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jge    1146 <loop1+0x36>
mov    -0x4(%rbp),%esi
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <loop1+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loop1>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
xor    %esi,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x2,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x3,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x5,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x6,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x7,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x9,%esi
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @loop1() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %8, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 10
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = load i32, i32* %1
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
br label %8
8: ; preds = %5
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %1
br label %2
11: ; preds = %2
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @loop1() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 0)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 1)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 2)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 3)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 4)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 5)
%7 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 6)
%8 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 7)
%9 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 8)
%10 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 9)
ret void
}
int do_259() { return 259; }


x86 assembly (clang, -O0):
<do_259>:
push   %rbp
mov    %rsp,%rbp
mov    $0x103,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_259>:
mov    $0x103,%eax
ret

LLVM IR (-O0):
define i32 @do_259() {
ret i32 259
}

LLVM IR (-O2):
define i32 @do_259() {
ret i32 259
}
int vde_chain_nm6_n_out(void) { return 3; }


x86 assembly (clang, -O0):
<vde_chain_nm6_n_out>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vde_chain_nm6_n_out>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @vde_chain_nm6_n_out() {
ret i32 3
}

LLVM IR (-O2):
define i32 @vde_chain_nm6_n_out() {
ret i32 3
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void _eml_str_free(char **s) {
  if (s && *s) {
    free(*s);
    *s = 0;
  }
}


x86 assembly (clang, -O0):
<_eml_str_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     114c <_eml_str_free+0x3c>
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     114c <_eml_str_free+0x3c>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_eml_str_free>:
push   %rbx
test   %rdi,%rdi
je     112d <_eml_str_free+0x1d>
mov    %rdi,%rbx
mov    (%rdi),%rdi
test   %rdi,%rdi
je     112d <_eml_str_free+0x1d>
call   1030 <free@plt>
movq   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @_eml_str_free(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = icmp ne i8** %3, null
br i1 %4, label %5, label %14
5: ; preds = %1
%6 = load i8**, i8*** %2
%7 = load i8*, i8** %6
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %14
9: ; preds = %5
%10 = load i8**, i8*** %2
%11 = load i8*, i8** %10
%12 = call i32 @free(i8* %11)
%13 = load i8**, i8*** %2
store i8* null, i8** %13
br label %14
14: ; preds = %9, %5, %1
ret void
}

LLVM IR (-O2):
define void @_eml_str_free(i8** %0) {
%2 = icmp eq i8** %0, null
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = load i8*, i8** %0
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @free(i8* %4)
store i8* null, i8** %0
br label %8
8: ; preds = %6, %3, %1
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint32_t;
typedef int /*<<< orphan*/ p;

/* Variables and functions */
uint32_t le32dec(const void *pp) {
  const uint8_t *p = (uint8_t const *)pp;
  return ((uint32_t)(p[0]) + ((uint32_t)(p[1]) << 8) +
          ((uint32_t)(p[2]) << 16) + ((uint32_t)(p[3]) << 24));
}


x86 assembly (clang, -O0):
<le32dec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    -0x10(%rbp),%rcx
mov    0x8(%rcx),%rcx
shl    $0x8,%ecx
add    %ecx,%eax
mov    -0x10(%rbp),%rcx
mov    0x10(%rcx),%rcx
shl    $0x10,%ecx
add    %ecx,%eax
mov    -0x10(%rbp),%rcx
mov    0x18(%rcx),%rcx
shl    $0x18,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<le32dec>:
mov    0x8(%rdi),%eax
mov    0x10(%rdi),%ecx
shl    $0x8,%eax
add    (%rdi),%eax
shl    $0x10,%ecx
add    %eax,%ecx
mov    0x18(%rdi),%eax
shl    $0x18,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @le32dec(i8* %0) {
%2 = alloca i8*
%3 = alloca i64*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i64*
store i64* %5, i64** %3
%6 = load i64*, i64** %3
%7 = getelementptr inbounds i64, i64* %6, i64 0
%8 = load i64, i64* %7
%9 = trunc i64 %8 to i32
%10 = load i64*, i64** %3
%11 = getelementptr inbounds i64, i64* %10, i64 1
%12 = load i64, i64* %11
%13 = trunc i64 %12 to i32
%14 = shl i32 %13, 8
%15 = add nsw i32 %9, %14
%16 = load i64*, i64** %3
%17 = getelementptr inbounds i64, i64* %16, i64 2
%18 = load i64, i64* %17
%19 = trunc i64 %18 to i32
%20 = shl i32 %19, 16
%21 = add nsw i32 %15, %20
%22 = load i64*, i64** %3
%23 = getelementptr inbounds i64, i64* %22, i64 3
%24 = load i64, i64* %23
%25 = trunc i64 %24 to i32
%26 = shl i32 %25, 24
%27 = add nsw i32 %21, %26
ret i32 %27
}

LLVM IR (-O2):
define i32 @le32dec(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
%5 = getelementptr inbounds i8, i8* %0, i64 8
%6 = bitcast i8* %5 to i64*
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
%9 = shl i32 %8, 8
%10 = add nsw i32 %9, %4
%11 = getelementptr inbounds i8, i8* %0, i64 16
%12 = bitcast i8* %11 to i64*
%13 = load i64, i64* %12
%14 = trunc i64 %13 to i32
%15 = shl i32 %14, 16
%16 = add nsw i32 %10, %15
%17 = getelementptr inbounds i8, i8* %0, i64 24
%18 = bitcast i8* %17 to i64*
%19 = load i64, i64* %18
%20 = trunc i64 %19 to i32
%21 = shl i32 %20, 24
%22 = add nsw i32 %16, %21
ret i32 %22
}
int skip_char(int i, const char *str, char c) {
  while (str[i] == c)
    i++;
  return (i);
}


x86 assembly (clang, -O0):
<skip_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
movsbl -0x11(%rbp),%ecx
cmp    %ecx,%eax
jne    1136 <skip_char+0x36>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1110 <skip_char+0x10>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_char>:
movslq %edi,%rcx
lea    -0x1(%rcx),%eax
add    %rcx,%rsi
nopl   0x0(%rax)
add    $0x1,%eax
lea    0x1(%rsi),%rcx
cmp    %dl,(%rsi)
mov    %rcx,%rsi
je     1110 <skip_char+0x10>
ret

LLVM IR (-O0):
define i32 @skip_char(i32 %0, i8* %1, i8 signext %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8
store i32 %0, i32* %4
store i8* %1, i8** %5
store i8 %2, i8* %6
br label %7
7: ; preds = %17, %3
%8 = load i8*, i8** %5
%9 = load i32, i32* %4
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = load i8, i8* %6
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %13, %15
br i1 %16, label %17, label %20
17: ; preds = %7
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %7
20: ; preds = %7
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @skip_char(i32 %0, i8* nocapture %1, i8 signext %2) {
%4 = sext i32 %0 to i64
br label %5
5: ; preds = %5, %3
%6 = phi i64 [ %10, %5 ], [ %4, %3 ]
%7 = getelementptr inbounds i8, i8* %1, i64 %6
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, %2
%10 = add i64 %6, 1
br i1 %9, label %5, label %11
11: ; preds = %5
%12 = trunc i64 %6 to i32
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
void init_adpcm_encode(uint16_t sampling_frequency, uint16_t gain) {}


x86 assembly (clang, -O0):
<init_adpcm_encode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_adpcm_encode>:
ret

LLVM IR (-O0):
define void @init_adpcm_encode(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @init_adpcm_encode(i32 %0, i32 %1) {
ret void
}
int test_imm_70int16_mem(short *val) {
  return ((*val) & (-0x70 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_70int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffff90,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_70int16_mem>:
movzwl (%rdi),%eax
test   $0xff90,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_70int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -112
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_70int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -112
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
char *langRomTypeBeerIde() { return "Beer IDE"; }


x86 assembly (clang, -O0):
<langRomTypeBeerIde>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langRomTypeBeerIde>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [9 x i8] c"Beer IDE\00"
define i8* @langRomTypeBeerIde() {
ret i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [9 x i8] c"Beer IDE\00"
define i8* @langRomTypeBeerIde() {
ret i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
unsigned long clock();
unsigned long nlopt_time_seed(void) { return clock(); }


x86 assembly (clang, -O0):
<nlopt_time_seed>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <clock@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nlopt_time_seed>:
xor    %eax,%eax
jmp    1030 <clock@plt>

LLVM IR (-O0):
define i64 @nlopt_time_seed() {
%1 = call i64 (...) @clock()
ret i64 %1
}

LLVM IR (-O2):
define i64 @nlopt_time_seed() {
%1 = tail call i64 (...) @clock()
ret i64 %1
}
int main(void) {
  int counter;
  {
    counter = 0;
  LOOPSTART:
    if (counter < 5) {
      counter = counter + 1;
      goto LOOPSTART;
    } else {
      if (counter < 10) {
        counter = counter + 1;
        goto LOOPSTART;
      } else {
        if (counter < 15) {
          counter = counter + 1;
          goto LOOPSTART;
        } else {
        }
      }
    }
    if (counter == 4) {
      goto ERROR;
    } else {
      goto END;
    }
  ERROR:
    goto ERROR;
  END:
    return (0);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jge    112a <main+0x2a>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
cmpl   $0xa,-0x8(%rbp)
jge    1142 <main+0x42>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
cmpl   $0xf,-0x8(%rbp)
jge    115a <main+0x5a>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
jmp    115f <main+0x5f>
jmp    1164 <main+0x64>
jmp    1169 <main+0x69>
cmpl   $0x4,-0x8(%rbp)
jne    1178 <main+0x78>
jmp    117d <main+0x7d>
jmp    1182 <main+0x82>
jmp    117d <main+0x7d>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %18, %12, %6, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 5
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
store i32 %8, i32* %2
br label %3
9: ; preds = %3
%10 = load i32, i32* %2
%11 = icmp slt i32 %10, 10
br i1 %11, label %12, label %15
12: ; preds = %9
%13 = load i32, i32* %2
%14 = add nsw i32 %13, 1
store i32 %14, i32* %2
br label %3
15: ; preds = %9
%16 = load i32, i32* %2
%17 = icmp slt i32 %16, 15
br i1 %17, label %18, label %21
18: ; preds = %15
%19 = load i32, i32* %2
%20 = add nsw i32 %19, 1
store i32 %20, i32* %2
br label %3
21: ; preds = %15
br label %22
22: ; preds = %21
br label %23
23: ; preds = %22
br label %24
24: ; preds = %23
%25 = load i32, i32* %2
%26 = icmp eq i32 %25, 4
br i1 %26, label %27, label %28
27: ; preds = %24
br label %29
28: ; preds = %24
br label %30
29: ; preds = %29, %27
br label %29
30: ; preds = %28
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
scalar_t__ has_cpuid();
scalar_t__ is_via_cpu();
int read_via_flags();
int via_ace_test(void) {
  return has_cpuid() && is_via_cpu() &&
         ((read_via_flags() & (0x00000040 | 0x00000080)) ==
          (0x00000040 | 0x00000080));
}


x86 assembly (clang, -O0):
<via_ace_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <has_cpuid@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x1(%rbp)
je     1181 <via_ace_test+0x51>
mov    $0x0,%al
call   1040 <is_via_cpu@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x1(%rbp)
je     1181 <via_ace_test+0x51>
mov    $0x0,%al
call   1030 <read_via_flags@plt>
and    $0xc0,%eax
cmp    $0xc0,%eax
sete   %al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<via_ace_test>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1050 <has_cpuid@plt>
test   %rax,%rax
je     115d <via_ace_test+0x2d>
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <is_via_cpu@plt>
test   %rax,%rax
je     115d <via_ace_test+0x2d>
xor    %eax,%eax
call   1030 <read_via_flags@plt>
not    %eax
xor    %ebx,%ebx
test   $0xc0,%al
sete   %bl
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @via_ace_test() {
%1 = call i64 (...) @has_cpuid()
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %10
3: ; preds = %0
%4 = call i64 (...) @is_via_cpu()
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %3
%7 = call i32 (...) @read_via_flags()
%8 = and i32 %7, 192
%9 = icmp eq i32 %8, 192
br label %10
10: ; preds = %6, %3, %0
%11 = phi i1 [ false, %3 ], [ false, %0 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @via_ace_test() {
%1 = tail call i64 (...) @has_cpuid()
%2 = icmp eq i64 %1, 0
br i1 %2, label %11, label %3
3: ; preds = %0
%4 = tail call i64 (...) @is_via_cpu()
%5 = icmp eq i64 %4, 0
br i1 %5, label %11, label %6
6: ; preds = %3
%7 = tail call i32 (...) @read_via_flags()
%8 = and i32 %7, 192
%9 = icmp eq i32 %8, 192
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %6, %3, %0
%12 = phi i32 [ 0, %3 ], [ 0, %0 ], [ %10, %6 ]
ret i32 %12
}
void mocked_void_function2() { ; }


x86 assembly (clang, -O0):
<mocked_void_function2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mocked_void_function2>:
ret

LLVM IR (-O0):
define void @mocked_void_function2() {
ret void
}

LLVM IR (-O2):
define void @mocked_void_function2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_io_bit(int, int);
void TOSH_MAKE_BOOST_ENABLE_OUTPUT() { set_io_bit(0x72, 4); }


x86 assembly (clang, -O0):
<TOSH_MAKE_BOOST_ENABLE_OUTPUT>:
push   %rbp
mov    %rsp,%rbp
mov    $0x72,%edi
mov    $0x4,%esi
call   1030 <set_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_MAKE_BOOST_ENABLE_OUTPUT>:
mov    $0x72,%edi
mov    $0x4,%esi
jmp    1030 <set_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_MAKE_BOOST_ENABLE_OUTPUT() {
%1 = call i32 @set_io_bit(i32 114, i32 4)
ret void
}

LLVM IR (-O2):
define void @TOSH_MAKE_BOOST_ENABLE_OUTPUT() {
%1 = tail call i32 @set_io_bit(i32 114, i32 4)
ret void
}
int f1(unsigned char a) {
  int t = a;
  if (t != 256)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x100,-0xc(%rbp)
je     112a <f1+0x2a>
movl   $0x0,-0x4(%rbp)
jmp    1131 <f1+0x31>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @f1(i8 zeroext %0) {
%2 = alloca i32
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 256
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 0, i32* %2
br label %11
10: ; preds = %1
store i32 1, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @f1(i8 zeroext %0) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void EEPROMIntEnable(uint32_t ui32IntFlags) {
  ;
  (*((volatile unsigned long *)(0x400AF040))) |= 0x00000001;
  (*((volatile unsigned long *)(0x400FD010))) |= 0x00000004;
}


x86 assembly (clang, -O0):
<EEPROMIntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x400af040,%eax
mov    (%rax),%rcx
or     $0x1,%rcx
mov    $0x400af040,%eax
mov    %rcx,(%rax)
mov    $0x400fd010,%eax
mov    (%rax),%rcx
or     $0x4,%rcx
mov    $0x400fd010,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<EEPROMIntEnable>:
orq    $0x1,0x400af040
40 01
orq    $0x4,0x400fd010
40 04
ret

LLVM IR (-O0):
define void @EEPROMIntEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load volatile i64, i64* inttoptr (i64 1074458688 to i64*)
%4 = or i64 %3, 1
store volatile i64 %4, i64* inttoptr (i64 1074458688 to i64*)
%5 = load volatile i64, i64* inttoptr (i64 1074778128 to i64*)
%6 = or i64 %5, 4
store volatile i64 %6, i64* inttoptr (i64 1074778128 to i64*)
ret void
}

LLVM IR (-O2):
define void @EEPROMIntEnable(i32 %0) {
%2 = load volatile i64, i64* inttoptr (i64 1074458688 to i64*)
%3 = or i64 %2, 1
store volatile i64 %3, i64* inttoptr (i64 1074458688 to i64*)
%4 = load volatile i64, i64* inttoptr (i64 1074778128 to i64*)
%5 = or i64 %4, 4
store volatile i64 %5, i64* inttoptr (i64 1074778128 to i64*)
ret void
}
void exynos_drm_debugfs_cleanup(struct drm_minor *minor) {}


x86 assembly (clang, -O0):
<exynos_drm_debugfs_cleanup>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<exynos_drm_debugfs_cleanup>:
ret

LLVM IR (-O0):
%struct.drm_minor = type opaque
define void @exynos_drm_debugfs_cleanup(%struct.drm_minor* %0) {
%2 = alloca %struct.drm_minor*
store %struct.drm_minor* %0, %struct.drm_minor** %2
ret void
}

LLVM IR (-O2):
%struct.drm_minor = type opaque
define void @exynos_drm_debugfs_cleanup(%struct.drm_minor* nocapture %0) {
ret void
}
int __attribute__((__stdcall__)) att_foo(int i) { return i + 1; }


x86 assembly (clang, -O0):
<att_foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<att_foo>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @att_foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
ret i32 %4
}

LLVM IR (-O2):
define i32 @att_foo(i32 %0) {
%2 = add nsw i32 %0, 1
ret i32 %2
}