void setup_coherent_ht_domain(void) {
  static const unsigned int register_values[] = {
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) |
       ((0x40) & 0xFF)),
      0xfff0f0f0,
      0x00010101,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) |
       ((0x44) & 0xFF)),
      0xfff0f0f0,
      0x00010101,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) |
       ((0x48) & 0xFF)),
      0xfff0f0f0,
      0x00010101,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) |
       ((0x4c) & 0xFF)),
      0xfff0f0f0,
      0x00010101,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) |
       ((0x50) & 0xFF)),
      0xfff0f0f0,
      0x00010101,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) |
       ((0x54) & 0xFF)),
      0xfff0f0f0,
      0x00010101,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) |
       ((0x58) & 0xFF)),
      0xfff0f0f0,
      0x00010101,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) |
       ((0x5c) & 0xFF)),
      0xfff0f0f0,
      0x00010101,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) |
       ((0x68) & 0xFF)),
      0x00800000,
      0x0f00840f,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) |
       ((0x6C) & 0xFF)),
      0xffffff8c,
      0x00000000 | (1 << 6) | (1 << 5) | (1 << 4),
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) |
       ((0x84) & 0xFF)),
      0x00009c05,
      0x11110020,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) |
       ((0x88) & 0xFF)),
      0xfffff0ff,
      0x00000200,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((0) & 0x07) << 8) |
       ((0x94) & 0xFF)),
      0xff000000,
      0x00ff0000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x44) & 0xFF)),
      0x0000f8f8,
      0x003f0000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x4C) & 0xFF)),
      0x0000f8f8,
      0x00000001,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x54) & 0xFF)),
      0x0000f8f8,
      0x00000002,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x5C) & 0xFF)),
      0x0000f8f8,
      0x00000003,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x64) & 0xFF)),
      0x0000f8f8,
      0x00000004,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x6C) & 0xFF)),
      0x0000f8f8,
      0x00000005,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x74) & 0xFF)),
      0x0000f8f8,
      0x00000006,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x7C) & 0xFF)),
      0x0000f8f8,
      0x00000007,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x40) & 0xFF)),
      0x0000f8fc,
      0x00000003,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x48) & 0xFF)),
      0x0000f8fc,
      0x00400000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x50) & 0xFF)),
      0x0000f8fc,
      0x00400000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x58) & 0xFF)),
      0x0000f8fc,
      0x00400000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x60) & 0xFF)),
      0x0000f8fc,
      0x00400000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x68) & 0xFF)),
      0x0000f8fc,
      0x00400000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x70) & 0xFF)),
      0x0000f8fc,
      0x00400000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x78) & 0xFF)),
      0x0000f8fc,
      0x00400000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x84) & 0xFF)),
      0x00000048,
      0x00e1ff00,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x8C) & 0xFF)),
      0x00000048,
      0x00dfff00,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x94) & 0xFF)),
      0x00000048,
      0x00e3ff00,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x9C) & 0xFF)),
      0x00000048,
      0x00000000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xA4) & 0xFF)),
      0x00000048,
      0x00000000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xAC) & 0xFF)),
      0x00000048,
      0x00000000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xB4) & 0xFF)),
      0x00000048,
      0x00000b00,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xBC) & 0xFF)),
      0x00000048,
      0x00fe0b00,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x80) & 0xFF)),
      0x000000f0,
      0x00e00003,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x88) & 0xFF)),
      0x000000f0,
      0x00d80003,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x90) & 0xFF)),
      0x000000f0,
      0x00e20003,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0x98) & 0xFF)),
      0x000000f0,
      0x00000000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xA0) & 0xFF)),
      0x000000f0,
      0x00000000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xA8) & 0xFF)),
      0x000000f0,
      0x00000000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xB0) & 0xFF)),
      0x000000f0,
      0x00000a03,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xB8) & 0xFF)),
      0x000000f0,
      0x00400003,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xC4) & 0xFF)),
      0xFE000FC8,
      0x0000d000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xCC) & 0xFF)),
      0xFE000FC8,
      0x000ff000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xD4) & 0xFF)),
      0xFE000FC8,
      0x00000000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xDC) & 0xFF)),
      0xFE000FC8,
      0x00000000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xC0) & 0xFF)),
      0xFE000FCC,
      0x0000d003,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xC8) & 0xFF)),
      0xFE000FCC,
      0x00001013,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xD0) & 0xFF)),
      0xFE000FCC,
      0x00000000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xD8) & 0xFF)),
      0xFE000FCC,
      0x00000000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xE0) & 0xFF)),
      0x0000FC88,
      0xff000003,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xE4) & 0xFF)),
      0x0000FC88,
      0x00000000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xE8) & 0xFF)),
      0x0000FC88,
      0x00000000,
      ((((0) & 0xFF) << 16) | (((0x18) & 0x1f) << 11) | (((1) & 0x07) << 8) |
       ((0xEC) & 0xFF)),
      0x0000FC88,
      0x00000000,
  };
  int i;
  int max;
  print_debug("setting up coherent ht domain....\r\n");
  max = sizeof(register_values) / sizeof(register_values[0]);
  for (i = 0; i < max; i += 3) {
    unsigned long reg;
    reg = pci_read_config32(register_values[i]);
    reg &= register_values[i + 1];
    reg |= register_values[i + 2] & ~register_values[i + 1];
    pci_write_config32(register_values[i], reg);
  }
  print_debug("done.\r\n");
}


x86 assembly (clang, -O0):
<setup_coherent_ht_domain>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0x116d(%rip),%rdi
mov    $0x0,%al
call   1050 <print_debug@plt>
movl   $0xab,-0x8(%rbp)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    11f2 <setup_coherent_ht_domain+0xc2>
movslq -0x4(%rbp),%rcx
lea    0xe95(%rip),%rax
mov    (%rax,%rcx,4),%edi
mov    $0x0,%al
call   1030 <pci_read_config32@plt>
cltq
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
movslq %eax,%rcx
lea    0xe75(%rip),%rax
mov    (%rax,%rcx,4),%eax
and    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
add    $0x2,%eax
movslq %eax,%rcx
lea    0xe5a(%rip),%rax
mov    (%rax,%rcx,4),%eax
mov    -0x4(%rbp),%ecx
add    $0x1,%ecx
movslq %ecx,%rdx
lea    0xe47(%rip),%rcx
mov    (%rcx,%rdx,4),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    %eax,%eax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
movslq -0x4(%rbp),%rcx
lea    0xe2a(%rip),%rax
mov    (%rax,%rcx,4),%edi
mov    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1040 <pci_write_config32@plt>
mov    -0x4(%rbp),%eax
add    $0x3,%eax
mov    %eax,-0x4(%rbp)
jmp    1154 <setup_coherent_ht_domain+0x24>
lea    0x10d7(%rip),%rdi
mov    $0x0,%al
call   1050 <print_debug@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup_coherent_ht_domain>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
lea    0x116e(%rip),%rdi
xor    %eax,%eax
call   1050 <print_debug@plt>
mov    $0xfffffffffffffffd,%rbp
lea    0xead(%rip),%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    0xc(%r15,%rbp,4),%r14d
mov    0x14(%r15,%rbp,4),%ebx
mov    %r14d,%edi
xor    %eax,%eax
call   1030 <pci_read_config32@plt>
xor    %ebx,%eax
and    0x10(%r15,%rbp,4),%eax
xor    %eax,%ebx
mov    %r14d,%edi
mov    %rbx,%rsi
xor    %eax,%eax
call   1040 <pci_write_config32@plt>
add    $0x3,%rbp
cmp    $0xa8,%rbp
jb     1160 <setup_coherent_ht_domain+0x30>
lea    0x1132(%rip),%rdi
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1050 <print_debug@plt>

LLVM IR (-O0):
@setup_coherent_ht_domain.register_values = internal constant [171 x i32] [i32 49216, i32 -986896, i32 65793, i32 49220, i32 -986896, i32 65793, i32 49224, i32 -986896, i32 65793, i32 49228, i32 -986896, i32 65793, i32 49232, i32 -986896, i32 65793, i32 49236, i32 -986896, i32 65793, i32 49240, i32 -986896, i32 65793, i32 49244, i32 -986896, i32 65793, i32 49256, i32 8388608, i32 251692047, i32 49260, i32 -116, i32 112, i32 49284, i32 39941, i32 286326816, i32 49288, i32 -3841, i32 512, i32 49300, i32 -16777216, i32 16711680, i32 49476, i32 63736, i32 4128768, i32 49484, i32 63736, i32 1, i32 49492, i32 63736, i32 2, i32 49500, i32 63736, i32 3, i32 49508, i32 63736, i32 4, i32 49516, i32 63736, i32 5, i32 49524, i32 63736, i32 6, i32 49532, i32 63736, i32 7, i32 49472, i32 63740, i32 3, i32 49480, i32 63740, i32 4194304, i32 49488, i32 63740, i32 4194304, i32 49496, i32 63740, i32 4194304, i32 49504, i32 63740, i32 4194304, i32 49512, i32 63740, i32 4194304, i32 49520, i32 63740, i32 4194304, i32 49528, i32 63740, i32 4194304, i32 49540, i32 72, i32 14810880, i32 49548, i32 72, i32 14679808, i32 49556, i32 72, i32 14941952, i32 49564, i32 72, i32 0, i32 49572, i32 72, i32 0, i32 49580, i32 72, i32 0, i32 49588, i32 72, i32 2816, i32 49596, i32 72, i32 16648960, i32 49536, i32 240, i32 14680067, i32 49544, i32 240, i32 14155779, i32 49552, i32 240, i32 14811139, i32 49560, i32 240, i32 0, i32 49568, i32 240, i32 0, i32 49576, i32 240, i32 0, i32 49584, i32 240, i32 2563, i32 49592, i32 240, i32 4194307, i32 49604, i32 -33550392, i32 53248, i32 49612, i32 -33550392, i32 1044480, i32 49620, i32 -33550392, i32 0, i32 49628, i32 -33550392, i32 0, i32 49600, i32 -33550388, i32 53251, i32 49608, i32 -33550388, i32 4115, i32 49616, i32 -33550388, i32 0, i32 49624, i32 -33550388, i32 0, i32 49632, i32 64648, i32 -16777213, i32 49636, i32 64648, i32 0, i32 49640, i32 64648, i32 0, i32 49644, i32 64648, i32 0]
@.str = [36 x i8] c"setting up coherent ht domain....\0D\0A\00"
@.str.1 = [8 x i8] c"done.\0D\0A\00"
define void @setup_coherent_ht_domain() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i64
%4 = call i32 (i8*, ...) bitcast (i32 (...)* @print_debug to i32 (i8*, ...)*)(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
store i32 171, i32* %2
store i32 0, i32* %1
br label %5
5: ; preds = %45, %0
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %48
9: ; preds = %5
%10 = load i32, i32* %1
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds [171 x i32], [171 x i32]* @setup_coherent_ht_domain.register_values, i64 0, i64 %11
%13 = load i32, i32* %12
%14 = call i32 (i32, ...) bitcast (i32 (...)* @pci_read_config32 to i32 (i32, ...)*)(i32 %13)
%15 = sext i32 %14 to i64
store i64 %15, i64* %3
%16 = load i32, i32* %1
%17 = add nsw i32 %16, 1
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds [171 x i32], [171 x i32]* @setup_coherent_ht_domain.register_values, i64 0, i64 %18
%20 = load i32, i32* %19
%21 = zext i32 %20 to i64
%22 = load i64, i64* %3
%23 = and i64 %22, %21
store i64 %23, i64* %3
%24 = load i32, i32* %1
%25 = add nsw i32 %24, 2
%26 = sext i32 %25 to i64
%27 = getelementptr inbounds [171 x i32], [171 x i32]* @setup_coherent_ht_domain.register_values, i64 0, i64 %26
%28 = load i32, i32* %27
%29 = load i32, i32* %1
%30 = add nsw i32 %29, 1
%31 = sext i32 %30 to i64
%32 = getelementptr inbounds [171 x i32], [171 x i32]* @setup_coherent_ht_domain.register_values, i64 0, i64 %31
%33 = load i32, i32* %32
%34 = xor i32 %33, -1
%35 = and i32 %28, %34
%36 = zext i32 %35 to i64
%37 = load i64, i64* %3
%38 = or i64 %37, %36
store i64 %38, i64* %3
%39 = load i32, i32* %1
%40 = sext i32 %39 to i64
%41 = getelementptr inbounds [171 x i32], [171 x i32]* @setup_coherent_ht_domain.register_values, i64 0, i64 %40
%42 = load i32, i32* %41
%43 = load i64, i64* %3
%44 = call i32 (i32, i64, ...) bitcast (i32 (...)* @pci_write_config32 to i32 (i32, i64, ...)*)(i32 %42, i64 %43)
br label %45
45: ; preds = %9
%46 = load i32, i32* %1
%47 = add nsw i32 %46, 3
store i32 %47, i32* %1
br label %5
48: ; preds = %5
%49 = call i32 (i8*, ...) bitcast (i32 (...)* @print_debug to i32 (i8*, ...)*)(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@setup_coherent_ht_domain.register_values = internal unnamed_addr constant [171 x i32] [i32 49216, i32 -986896, i32 65793, i32 49220, i32 -986896, i32 65793, i32 49224, i32 -986896, i32 65793, i32 49228, i32 -986896, i32 65793, i32 49232, i32 -986896, i32 65793, i32 49236, i32 -986896, i32 65793, i32 49240, i32 -986896, i32 65793, i32 49244, i32 -986896, i32 65793, i32 49256, i32 8388608, i32 251692047, i32 49260, i32 -116, i32 112, i32 49284, i32 39941, i32 286326816, i32 49288, i32 -3841, i32 512, i32 49300, i32 -16777216, i32 16711680, i32 49476, i32 63736, i32 4128768, i32 49484, i32 63736, i32 1, i32 49492, i32 63736, i32 2, i32 49500, i32 63736, i32 3, i32 49508, i32 63736, i32 4, i32 49516, i32 63736, i32 5, i32 49524, i32 63736, i32 6, i32 49532, i32 63736, i32 7, i32 49472, i32 63740, i32 3, i32 49480, i32 63740, i32 4194304, i32 49488, i32 63740, i32 4194304, i32 49496, i32 63740, i32 4194304, i32 49504, i32 63740, i32 4194304, i32 49512, i32 63740, i32 4194304, i32 49520, i32 63740, i32 4194304, i32 49528, i32 63740, i32 4194304, i32 49540, i32 72, i32 14810880, i32 49548, i32 72, i32 14679808, i32 49556, i32 72, i32 14941952, i32 49564, i32 72, i32 0, i32 49572, i32 72, i32 0, i32 49580, i32 72, i32 0, i32 49588, i32 72, i32 2816, i32 49596, i32 72, i32 16648960, i32 49536, i32 240, i32 14680067, i32 49544, i32 240, i32 14155779, i32 49552, i32 240, i32 14811139, i32 49560, i32 240, i32 0, i32 49568, i32 240, i32 0, i32 49576, i32 240, i32 0, i32 49584, i32 240, i32 2563, i32 49592, i32 240, i32 4194307, i32 49604, i32 -33550392, i32 53248, i32 49612, i32 -33550392, i32 1044480, i32 49620, i32 -33550392, i32 0, i32 49628, i32 -33550392, i32 0, i32 49600, i32 -33550388, i32 53251, i32 49608, i32 -33550388, i32 4115, i32 49616, i32 -33550388, i32 0, i32 49624, i32 -33550388, i32 0, i32 49632, i32 64648, i32 -16777213, i32 49636, i32 64648, i32 0, i32 49640, i32 64648, i32 0, i32 49644, i32 64648, i32 0]
@.str = [36 x i8] c"setting up coherent ht domain....\0D\0A\00"
@.str.1 = [8 x i8] c"done.\0D\0A\00"
define void @setup_coherent_ht_domain() {
%1 = tail call i32 (i8*, ...) bitcast (i32 (...)* @print_debug to i32 (i8*, ...)*)(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
br label %2
2: ; preds = %0, %2
%3 = phi i64 [ 0, %0 ], [ %19, %2 ]
%4 = getelementptr inbounds [171 x i32], [171 x i32]* @setup_coherent_ht_domain.register_values, i64 0, i64 %3
%5 = load i32, i32* %4
%6 = tail call i32 (i32, ...) bitcast (i32 (...)* @pci_read_config32 to i32 (i32, ...)*)(i32 %5)
%7 = add nuw nsw i64 %3, 1
%8 = getelementptr inbounds [171 x i32], [171 x i32]* @setup_coherent_ht_domain.register_values, i64 0, i64 %7
%9 = load i32, i32* %8
%10 = and i32 %9, %6
%11 = add nuw nsw i64 %3, 2
%12 = getelementptr inbounds [171 x i32], [171 x i32]* @setup_coherent_ht_domain.register_values, i64 0, i64 %11
%13 = load i32, i32* %12
%14 = xor i32 %9, -1
%15 = and i32 %13, %14
%16 = or i32 %15, %10
%17 = zext i32 %16 to i64
%18 = tail call i32 (i32, i64, ...) bitcast (i32 (...)* @pci_write_config32 to i32 (i32, i64, ...)*)(i32 %5, i64 %17)
%19 = add nuw nsw i64 %3, 3
%20 = icmp ult i64 %3, 168
br i1 %20, label %2, label %21
21: ; preds = %2
%22 = tail call i32 (i8*, ...) bitcast (i32 (...)* @print_debug to i32 (i8*, ...)*)(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
ret void
}