xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ gen_call(char *);
int /*<<< orphan*/ gen_pop();
gen_less_or_equal() {
  gen_pop();
  gen_call("ccle");
}


x86 assembly (clang, -O0):
<gen_less_or_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <gen_pop@plt>
lea    0xeca(%rip),%rdi
call   1040 <gen_call@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_less_or_equal>:
push   %rax
xor    %eax,%eax
call   1030 <gen_pop@plt>
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1040 <gen_call@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"ccle\00"
define i32 @gen_less_or_equal() {
%1 = alloca i32
%2 = call i32 (...) @gen_pop()
%3 = call i32 @gen_call(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
@.str = [5 x i8] c"ccle\00"
define i32 @gen_less_or_equal() {
%1 = tail call i32 (...) @gen_pop()
%2 = tail call i32 @gen_call(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
int validate_recommended_package_line(const char *line) {
  (void)line;
  return 0;
}


x86 assembly (clang, -O0):
<validate_recommended_package_line>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<validate_recommended_package_line>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @validate_recommended_package_line(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @validate_recommended_package_line(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int const);
main() {
  const int a = 100;
  int *p;
  printf("a= %d\n", a);
  p = (int *)&a;
  *p = 200;
  printf("New a= %d\n", a);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x64,-0x4(%rbp)
lea    0xede(%rip),%rdi
mov    $0x64,%esi
call   1030 <printf@plt>
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0xc8,(%rax)
lea    0xeb7(%rip),%rdi
mov    $0x64,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeec(%rip),%rdi
mov    $0x64,%esi
call   1030 <printf@plt>
lea    0xed7(%rip),%rdi
mov    $0x64,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"a= %d\0A\00"
@.str.1 = [11 x i8] c"New a= %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32 100, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 100)
store i32* %1, i32** %2
%4 = load i32*, i32** %2
store i32 200, i32* %4
%5 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 100)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"a= %d\0A\00"
@.str.1 = [11 x i8] c"New a= %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 100)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 100)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ *strchr(char *, char);
int isRelop(char c) { return strchr("=#<>", c) != NULL; }


x86 assembly (clang, -O0):
<isRelop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
lea    0xedb(%rip),%rdi
movsbl -0x1(%rbp),%esi
call   1030 <strchr@plt>
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isRelop>:
push   %rax
mov    %edi,%esi
lea    0xee6(%rip),%rdi
call   1030 <strchr@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"=#<>\00"
define i32 @isRelop(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32* @strchr(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8 signext %3)
%5 = icmp ne i32* %4, null
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
@.str = [5 x i8] c"=#<>\00"
define i32 @isRelop(i8 signext %0) {
%2 = tail call i32* @strchr(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8 signext %0)
%3 = icmp ne i32* %2, null
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
void fatalError(char *s) {
  printf("%s\n", s);
  exit(1);
}


x86 assembly (clang, -O0):
<fatalError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<fatalError>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @fatalError(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @fatalError(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
char *malloc(size_t);
int /*<<< orphan*/ memcpy(char *, char const *, size_t);
int strlen(char const *);
char *_strdup(const char *s) {
  size_t size = strlen(s) + 1;
  char *p = malloc(size);
  if (p) {
    memcpy(p, s, size);
  }
  return p;
}


x86 assembly (clang, -O0):
<_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1177 <_strdup+0x47>
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_strdup>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
add    $0x1,%eax
movslq %eax,%r15
mov    %r15,%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1161 <_strdup+0x31>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1040 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = add nsw i32 %6, 1
%8 = sext i32 %7 to i64
store i64 %8, i64* %3
%9 = load i64, i64* %3
%10 = call i8* @malloc(i64 %9)
store i8* %10, i8** %4
%11 = load i8*, i8** %4
%12 = icmp ne i8* %11, null
br i1 %12, label %13, label %18
13: ; preds = %1
%14 = load i8*, i8** %4
%15 = load i8*, i8** %2
%16 = load i64, i64* %3
%17 = call i32 @memcpy(i8* %14, i8* %15, i64 %16)
br label %18
18: ; preds = %13, %1
%19 = load i8*, i8** %4
ret i8* %19
}

LLVM IR (-O2):
define i8* @_strdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = sext i32 %3 to i64
%5 = tail call i8* @malloc(i64 %4)
%6 = icmp eq i8* %5, null
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @memcpy(i8* %5, i8* %0, i64 %4)
br label %9
9: ; preds = %7, %1
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int _XFlushGCCache() {
  printf("_XFlushGCCache called\n");
  return 0;
}


x86 assembly (clang, -O0):
<_XFlushGCCache>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_XFlushGCCache>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"_XFlushGCCache called\0A\00"
define i32 @_XFlushGCCache() {
%1 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [22 x i8] c"_XFlushGCCache called\00"
define i32 @_XFlushGCCache() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
ret i32 0
}
void tracing_on(void) {}


x86 assembly (clang, -O0):
<tracing_on>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tracing_on>:
ret

LLVM IR (-O0):
define void @tracing_on() {
ret void
}

LLVM IR (-O2):
define void @tracing_on() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo();
char eatme() { foo(); }


x86 assembly (clang, -O0):
<eatme>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <foo@plt>
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eatme>:
xor    %eax,%eax
jmp    1030 <foo@plt>

LLVM IR (-O0):
define signext i8 @eatme() {
%1 = alloca i8
%2 = call i32 (...) @foo()
%3 = load i8, i8* %1
ret i8 %3
}

LLVM IR (-O2):
define signext i8 @eatme() {
%1 = tail call i32 (...) @foo()
ret i8 undef
}
/* Type definitions */
struct evbuffer {
  int dummy;
};
typedef int /*<<< orphan*/ evutil_socket_t;

/* Variables and functions */
int evbuffer_read(struct evbuffer *buffer, evutil_socket_t fd, int howmuch) {
  (void)buffer;
  (void)fd;
  return howmuch;
}


x86 assembly (clang, -O0):
<evbuffer_read>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<evbuffer_read>:
mov    %edx,%eax
ret

LLVM IR (-O0):
%struct.evbuffer = type { i32 }
define i32 @evbuffer_read(%struct.evbuffer* %0, i32 %1, i32 %2) {
%4 = alloca %struct.evbuffer*
%5 = alloca i32
%6 = alloca i32
store %struct.evbuffer* %0, %struct.evbuffer** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load %struct.evbuffer*, %struct.evbuffer** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
ret i32 %9
}

LLVM IR (-O2):
%struct.evbuffer = type { i32 }
define i32 @evbuffer_read(%struct.evbuffer* nocapture readnone %0, i32 %1, i32 returned %2) {
ret i32 %2
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int copy_container_to_target_solutions(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(6, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<copy_container_to_target_solutions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x6,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_container_to_target_solutions>:
mov    $0x6,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @copy_container_to_target_solutions() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 6, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @copy_container_to_target_solutions() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 6, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ echo(char *);
int /*<<< orphan*/ fuu();
main() {
omg:
  echo("yo");
  if (1)
    goto omg;
  fuu();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <echo@plt>
jmp    111f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <echo@plt>
jmp    1120 <main+0x10>

LLVM IR (-O0):
@.str = [3 x i8] c"yo\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %2, %0
%3 = call i32 @echo(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
br label %2
}

LLVM IR (-O2):
@.str = [3 x i8] c"yo\00"
define i32 @main() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @echo(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
br label %1
}
const char *event_get_version(void) {
  return "4"
         "."
         "11";
}


x86 assembly (clang, -O0):
<event_get_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_get_version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"4.11\00"
define i8* @event_get_version() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [5 x i8] c"4.11\00"
define i8* @event_get_version() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}
int f0(void *a, void *b) { return a - b; }


x86 assembly (clang, -O0):
<f0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f0>:
mov    %rdi,%rax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @f0(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = ptrtoint i8* %5 to i64
%8 = ptrtoint i8* %6 to i64
%9 = sub i64 %7, %8
%10 = trunc i64 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @f0(i8* %0, i8* %1) {
%3 = ptrtoint i8* %0 to i64
%4 = ptrtoint i8* %1 to i64
%5 = sub i64 %3, %4
%6 = trunc i64 %5 to i32
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_attr_t;

/* Variables and functions */
int EINVAL;
int pthread_attr_getstacksize(const pthread_attr_t *attr, size_t *stacksize) {
  (void)attr;
  (void)stacksize;
  return EINVAL;
}


x86 assembly (clang, -O0):
<pthread_attr_getstacksize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ecd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_attr_getstacksize>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @pthread_attr_getstacksize(i32* %0, i64* %1) {
%3 = alloca i32*
%4 = alloca i64*
store i32* %0, i32** %3
store i64* %1, i64** %4
%5 = load i32*, i32** %3
%6 = load i64*, i64** %4
%7 = load i32, i32* @EINVAL
ret i32 %7
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @pthread_attr_getstacksize(i32* nocapture readnone %0, i64* nocapture readnone %1) {
%3 = load i32, i32* @EINVAL
ret i32 %3
}
int clamp(int value, int low, int high) {
  return value < low ? low : (value > high ? high : value);
}


x86 assembly (clang, -O0):
<clamp>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1124 <clamp+0x24>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1147 <clamp+0x47>
mov    -0x4(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    113b <clamp+0x3b>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1141 <clamp+0x41>
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clamp>:
mov    %edx,%eax
cmp    %edx,%edi
cmovle %edi,%eax
cmp    %esi,%edi
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define i32 @clamp(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load i32, i32* %5
br label %22
12: ; preds = %3
%13 = load i32, i32* %4
%14 = load i32, i32* %6
%15 = icmp sgt i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load i32, i32* %6
br label %20
18: ; preds = %12
%19 = load i32, i32* %4
br label %20
20: ; preds = %18, %16
%21 = phi i32 [ %17, %16 ], [ %19, %18 ]
br label %22
22: ; preds = %20, %10
%23 = phi i32 [ %11, %10 ], [ %21, %20 ]
ret i32 %23
}

LLVM IR (-O2):
define i32 @clamp(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, %1
%5 = icmp sgt i32 %0, %2
%6 = select i1 %5, i32 %2, i32 %0
%7 = select i1 %4, i32 %1, i32 %6
ret i32 %7
}
short test_67_2(short *mem) { return __atomic_xor_fetch(mem + 0, -1, 4); }


x86 assembly (clang, -O0):
<test_67_2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movw   $0xffff,-0xa(%rbp)
mov    -0xa(%rbp),%cx
mov    %cx,-0x10(%rbp)
mov    (%rax),%ax
mov    %ax,-0xe(%rbp)
mov    -0xe(%rbp),%ax
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%dx
mov    %dx,%si
mov    %ax,%dx
mov    %edx,-0x24(%rbp)
xor    %esi,%edx
mov    %edx,-0x20(%rbp)
lock cmpxchg %dx,(%rcx)
sete   %cl
mov    %ax,-0x1a(%rbp)
test   $0x1,%cl
mov    %ax,-0xe(%rbp)
jne    115d <test_67_2+0x5d>
jmp    1125 <test_67_2+0x25>
mov    -0x10(%rbp),%cx
mov    -0x1a(%rbp),%ax
xor    %cx,%ax
mov    %ax,-0xc(%rbp)
movswl -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_67_2>:
movzwl (%rdi),%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %eax,%ecx
not    %ecx
lock cmpxchg %cx,(%rdi)
jne    1110 <test_67_2+0x10>
not    %eax
ret

LLVM IR (-O0):
define signext i16 @test_67_2(i16* %0) {
%2 = alloca i16*
%3 = alloca i16
%4 = alloca i16
store i16* %0, i16** %2
%5 = load i16*, i16** %2
%6 = getelementptr inbounds i16, i16* %5, i64 0
store i16 -1, i16* %3
%7 = load i16, i16* %3
%8 = atomicrmw xor i16* %6, i16 %7 acq_rel
%9 = xor i16 %8, %7
store i16 %9, i16* %4
%10 = load i16, i16* %4
ret i16 %10
}

LLVM IR (-O2):
define signext i16 @test_67_2(i16* nocapture %0) {
%2 = atomicrmw xor i16* %0, i16 -1 acq_rel
%3 = xor i16 %2, -1
ret i16 %3
}
void keyboard_IRQ() {}


x86 assembly (clang, -O0):
<keyboard_IRQ>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<keyboard_IRQ>:
ret

LLVM IR (-O0):
define void @keyboard_IRQ() {
ret void
}

LLVM IR (-O2):
define void @keyboard_IRQ() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ hrt(double, double, char *);
int /*<<< orphan*/ print_check(double, double);
int /*<<< orphan*/ printf(char *, double, double);
void print_zero(double x, double y) {
  print_check(x, y);
  printf("        <rect x=\"%.2fin\" y=\"%.2fin\" width=\"5.75in\" "
         "height=\"0.5in\" fill=\"#0000e0\" />\n",
         x, y + 0.5);
  hrt(x, y, "0");
}


x86 assembly (clang, -O0):
<print_zero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1050 <print_check@plt>
movsd  -0x8(%rbp),%xmm0
movsd  0xea2(%rip),%xmm1
addsd  -0x10(%rbp),%xmm1
lea    0xe9e(%rip),%rdi
call   1040 <printf@plt>
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
lea    0xedd(%rip),%rdi
call   1030 <hrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_zero>:
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
movsd  %xmm0,0x8(%rsp)
call   1050 <print_check@plt>
movsd  0xeb3(%rip),%xmm1
addsd  0x10(%rsp),%xmm1
lea    0xeae(%rip),%rdi
movsd  0x8(%rsp),%xmm0
call   1040 <printf@plt>
lea    0xef1(%rip),%rdi
movsd  0x8(%rsp),%xmm0
movsd  0x10(%rsp),%xmm1
add    $0x18,%rsp
jmp    1030 <hrt@plt>

LLVM IR (-O0):
@.str = [85 x i8] c" <rect x=\22%.2fin\22 y=\22%.2fin\22 width=\225.75in\22 height=\220.5in\22 fill=\22e0\22 />\0A\00"
@.str.1 = [2 x i8] c"0\00"
define void @print_zero(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call i32 @print_check(double %5, double %6)
%8 = load double, double* %3
%9 = load double, double* %4
%10 = fadd double %9, 5.000000e-01
%11 = call i32 @printf(i8* getelementptr inbounds ([85 x i8], [85 x i8]* @.str, i64 0, i64 0), double %8, double %10)
%12 = load double, double* %3
%13 = load double, double* %4
%14 = call i32 @hrt(double %12, double %13, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [85 x i8] c" <rect x=\22%.2fin\22 y=\22%.2fin\22 width=\225.75in\22 height=\220.5in\22 fill=\22e0\22 />\0A\00"
@.str.1 = [2 x i8] c"0\00"
define void @print_zero(double %0, double %1) {
%3 = tail call i32 @print_check(double %0, double %1)
%4 = fadd double %1, 5.000000e-01
%5 = tail call i32 @printf(i8* getelementptr inbounds ([85 x i8], [85 x i8]* @.str, i64 0, i64 0), double %0, double %4)
%6 = tail call i32 @hrt(double %0, double %1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ getpid();
int uio_mem_alloc_to(int /*<<< orphan*/ *, int, int, int /*<<< orphan*/);
int uio_mem_alloc(pid_t *owners, int offset, int count) {
  return uio_mem_alloc_to(owners, offset, count, getpid());
}


x86 assembly (clang, -O0):
<uio_mem_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1040 <getpid@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%esi
mov    -0x14(%rbp),%edx
mov    %eax,%ecx
call   1030 <uio_mem_alloc_to@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uio_mem_alloc>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <getpid@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
mov    %eax,%ecx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <uio_mem_alloc_to@plt>

LLVM IR (-O0):
define i32 @uio_mem_alloc(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 (...) @getpid()
%11 = call i32 @uio_mem_alloc_to(i32* %7, i32 %8, i32 %9, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @uio_mem_alloc(i32* %0, i32 %1, i32 %2) {
%4 = tail call i32 (...) @getpid()
%5 = tail call i32 @uio_mem_alloc_to(i32* %0, i32 %1, i32 %2, i32 %4)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ UpdateAllDA();
int /*<<< orphan*/ UpdateAllDAC();
int /*<<< orphan*/ UpdateAllIO();
void UpdateAll(void) {
  UpdateAllIO();
  UpdateAllDAC();
  UpdateAllDA();
}


x86 assembly (clang, -O0):
<UpdateAll>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <UpdateAllIO@plt>
mov    $0x0,%al
call   1030 <UpdateAllDAC@plt>
mov    $0x0,%al
call   1040 <UpdateAllDA@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<UpdateAll>:
push   %rax
xor    %eax,%eax
call   1050 <UpdateAllIO@plt>
xor    %eax,%eax
call   1030 <UpdateAllDAC@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <UpdateAllDA@plt>

LLVM IR (-O0):
define void @UpdateAll() {
%1 = call i32 (...) @UpdateAllIO()
%2 = call i32 (...) @UpdateAllDAC()
%3 = call i32 (...) @UpdateAllDA()
ret void
}

LLVM IR (-O2):
define void @UpdateAll() {
%1 = tail call i32 (...) @UpdateAllIO()
%2 = tail call i32 (...) @UpdateAllDAC()
%3 = tail call i32 (...) @UpdateAllDA()
ret void
}
void _mcxx_nochildren(void *p __attribute__((unused)),
                      void (*_mcxx_do)(void *) __attribute__((unused))) {}


x86 assembly (clang, -O0):
<_mcxx_nochildren>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mcxx_nochildren>:
ret

LLVM IR (-O0):
define void @_mcxx_nochildren(i8* %0, void (i8*)* %1) {
%3 = alloca i8*
%4 = alloca void (i8*)*
store i8* %0, i8** %3
store void (i8*)* %1, void (i8*)** %4
ret void
}

LLVM IR (-O2):
define void @_mcxx_nochildren(i8* nocapture %0, void (i8*)* nocapture %1) {
ret void
}
void glGetShaderSource(void) { return; }


x86 assembly (clang, -O0):
<glGetShaderSource>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glGetShaderSource>:
ret

LLVM IR (-O0):
define void @glGetShaderSource() {
ret void
}

LLVM IR (-O2):
define void @glGetShaderSource() {
ret void
}
void ff_hevc_put_hevc_bi_w_pel_pixels12_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_pel_pixels12_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_pel_pixels12_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_pel_pixels12_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_pel_pixels12_10_sse4() {
ret void
}
extern __attribute__((always_)) void android_memory_barrier(void) {
  __asm__ __volatile__("mfence" : : : "memory");
}


x86 assembly (clang, -O0):
<android_memory_barrier>:
push   %rbp
mov    %rsp,%rbp
mfence
pop    %rbp
ret

x86 assembly (clang, -O2):
<android_memory_barrier>:
mfence
ret

LLVM IR (-O0):
define void @android_memory_barrier() {
ret void
}

LLVM IR (-O2):
define void @android_memory_barrier() {
tail call void asm sideeffect "mfence", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bmp_test_print_failed(char *);
int /*<<< orphan*/ bmp_test_print_passed(char *);
int bmp_test_get_padding(void) {
  if (((1) % 4) == 1 && ((2) % 4) == 2 && ((3) % 4) == 3 && ((4) % 4) == 0 &&
      ((5) % 4) == 1 && ((6) % 4) == 2 && ((7) % 4) == 3 && ((8) % 4) == 0) {
    bmp_test_print_passed("BMP_GET_PADDING");
    return 1;
  }
  bmp_test_print_failed("BMP_GET_PADDING");
  return 0;
}


x86 assembly (clang, -O0):
<bmp_test_get_padding>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <bmp_test_print_passed@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bmp_test_get_padding>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <bmp_test_print_passed@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"BMP_GET_PADDING\00"
define i32 @bmp_test_get_padding() {
%1 = call i32 @bmp_test_print_passed(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@.str = [16 x i8] c"BMP_GET_PADDING\00"
define i32 @bmp_test_get_padding() {
%1 = tail call i32 @bmp_test_print_passed(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret i32 1
}
/* Variables and functions */
void *xmalloc_large(size_t);
void *xmalloc_large_ext(size_t sz) { return xmalloc_large(sz); }


x86 assembly (clang, -O0):
<xmalloc_large_ext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <xmalloc_large@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc_large_ext>:
jmp    1030 <xmalloc_large@plt>

LLVM IR (-O0):
define i8* @xmalloc_large_ext(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @xmalloc_large(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @xmalloc_large_ext(i64 %0) {
%2 = tail call i8* @xmalloc_large(i64 %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
int custom_callback(const char *arg, void *pvar) {
  printf("Custom callback with %s as parameter\n", arg);
  return 0;
}


x86 assembly (clang, -O0):
<custom_callback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<custom_callback>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [38 x i8] c"Custom callback with %s as parameter\0A\00"
define i32 @custom_callback(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i8* %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [38 x i8] c"Custom callback with %s as parameter\0A\00"
define i32 @custom_callback(i8* %0, i8* nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 0
}
/* Variables and functions */
char *strrchr(char *, char);
char *get_filename(char *path) {
  char *p;
  p = strrchr(path, '/');
  p++;
  if (!*p)
    return NULL;
  return p;
}


x86 assembly (clang, -O0):
<get_filename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x2f,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
jne    1154 <get_filename+0x44>
movq   $0x0,-0x8(%rbp)
jmp    115c <get_filename+0x4c>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_filename>:
push   %rax
mov    $0x2f,%esi
call   1030 <strrchr@plt>
lea    0x1(%rax),%rdx
xor    %ecx,%ecx
cmpb   $0x0,0x1(%rax)
cmovne %rdx,%rcx
mov    %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @get_filename(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i8* @strrchr(i8* %5, i8 signext 47)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = getelementptr inbounds i8, i8* %7, i32 1
store i8* %8, i8** %4
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = icmp ne i8 %10, 0
br i1 %11, label %13, label %12
12: ; preds = %1
store i8* null, i8** %2
br label %15
13: ; preds = %1
%14 = load i8*, i8** %4
store i8* %14, i8** %2
br label %15
15: ; preds = %13, %12
%16 = load i8*, i8** %2
ret i8* %16
}

LLVM IR (-O2):
define i8* @get_filename(i8* %0) {
%2 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 47)
%3 = getelementptr inbounds i8, i8* %2, i64 1
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 0
%6 = select i1 %5, i8* null, i8* %3
ret i8* %6
}
absi(i) { return i >= 0 ? i : -i; }


x86 assembly (clang, -O0):
<absi>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     111c <absi+0x1c>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1124 <absi+0x24>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<absi>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @absi(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i32, i32* %2
br label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = sub nsw i32 0, %8
br label %10
10: ; preds = %7, %5
%11 = phi i32 [ %6, %5 ], [ %9, %7 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @absi(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
void wait(unsigned long dly) {
  for (; dly > 0; dly--)
    ;
}


x86 assembly (clang, -O0):
<wait>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jbe    1129 <wait+0x29>
jmp    1118 <wait+0x18>
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <wait+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait>:
ret

LLVM IR (-O0):
define void @wait(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
br label %3
3: ; preds = %7, %1
%4 = load i64, i64* %2
%5 = icmp ugt i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %3
br label %7
7: ; preds = %6
%8 = load i64, i64* %2
%9 = add i64 %8, -1
store i64 %9, i64* %2
br label %3
10: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @wait(i64 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0x9d() {
  Assert_real((iscntrl(157) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              790, ("iscntrl should be 0 for 0x9d"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0x9d>:
push   %rbp
mov    %rsp,%rbp
mov    $0x9d,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x316,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0x9d>:
push   %rax
mov    $0x9d,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x316,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 0 for 0x9d\00"
define void @t_iscntrl_0x9d() {
%1 = call i64 @iscntrl(i32 157)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 790, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 0 for 0x9d\00"
define void @t_iscntrl_0x9d() {
%1 = tail call i64 @iscntrl(i32 157)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 790, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
unsigned long readVIC(unsigned long add) {
  return (*((unsigned long *)(((0xFFFC0000 | add) >> 2) | 0xB0000000)));
}


x86 assembly (clang, -O0):
<readVIC>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movabs $0xfffc0000,%rax
or     -0x8(%rbp),%rax
shr    $0x2,%rax
movabs $0xb0000000,%rcx
or     %rcx,%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readVIC>:
shr    $0x2,%rdi
mov    $0xbfff0000,%eax
or     %rdi,%rax
mov    (%rax),%rax
ret

LLVM IR (-O0):
define i64 @readVIC(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = or i64 4294705152, %3
%5 = lshr i64 %4, 2
%6 = or i64 %5, 2952790016
%7 = inttoptr i64 %6 to i64*
%8 = load i64, i64* %7
ret i64 %8
}

LLVM IR (-O2):
define i64 @readVIC(i64 %0) {
%2 = lshr i64 %0, 2
%3 = or i64 %2, 3221159936
%4 = inttoptr i64 %3 to i64*
%5 = load i64, i64* %4
ret i64 %5
}
/* Type definitions */
struct v4l_buffer {
  int dummy;
};
struct timespec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_MONOTONIC;
int /*<<< orphan*/ clock_gettime(int /*<<< orphan*/, struct timespec *);
int /*<<< orphan*/ v4l_buffer_s_timestamp_ts(struct v4l_buffer *,
                                             struct timespec *);
void v4l_buffer_s_timestamp_clock(struct v4l_buffer *buf) {
  struct timespec ts;
  clock_gettime(CLOCK_MONOTONIC, &ts);
  v4l_buffer_s_timestamp_ts(buf, &ts);
}


x86 assembly (clang, -O0):
<v4l_buffer_s_timestamp_clock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    -0x10(%rbp),%rsi
call   1040 <clock_gettime@plt>
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <v4l_buffer_s_timestamp_ts@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<v4l_buffer_s_timestamp_clock>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%r14
mov    %r14,%rsi
call   1040 <clock_gettime@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <v4l_buffer_s_timestamp_ts@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.v4l_buffer = type { i32 }
%struct.timespec = type { i32 }
@CLOCK_MONOTONIC = global i32 0
define void @v4l_buffer_s_timestamp_clock(%struct.v4l_buffer* %0) {
%2 = alloca %struct.v4l_buffer*
%3 = alloca %struct.timespec
store %struct.v4l_buffer* %0, %struct.v4l_buffer** %2
%4 = load i32, i32* @CLOCK_MONOTONIC
%5 = call i32 @clock_gettime(i32 %4, %struct.timespec* %3)
%6 = load %struct.v4l_buffer*, %struct.v4l_buffer** %2
%7 = call i32 @v4l_buffer_s_timestamp_ts(%struct.v4l_buffer* %6, %struct.timespec* %3)
ret void
}

LLVM IR (-O2):
%struct.v4l_buffer = type { i32 }
%struct.timespec = type { i32 }
@CLOCK_MONOTONIC = global i32 0
define void @v4l_buffer_s_timestamp_clock(%struct.v4l_buffer* %0) {
%2 = alloca %struct.timespec
%3 = bitcast %struct.timespec* %2 to i8*
%4 = load i32, i32* @CLOCK_MONOTONIC
%5 = call i32 @clock_gettime(i32 %4, %struct.timespec* %2)
%6 = call i32 @v4l_buffer_s_timestamp_ts(%struct.v4l_buffer* %0, %struct.timespec* %2)
ret void
}
int pcre_config(int what, void *where) {
  switch (what) {
  case 0:
    *((int *)where) = 0;
    break;
  case 1:
    *((int *)where) = '\n';
    break;
  case 2:
    *((int *)where) = 2;
    break;
  case 3:
    *((int *)where) = 10;
    break;
  case 4:
    *((unsigned int *)where) = 10000000;
    break;
  case 5:
    *((int *)where) = 1;
    break;
  default:
    return (-3);
  }
  return 0;
}


x86 assembly (clang, -O0):
<pcre_config>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %rax,-0x18(%rbp)
sub    $0x5,%rax
ja     118a <pcre_config+0x8a>
mov    -0x18(%rbp),%rax
lea    0xed9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
jmp    1196 <pcre_config+0x96>
mov    -0x10(%rbp),%rax
movl   $0xa,(%rax)
jmp    1196 <pcre_config+0x96>
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
jmp    1196 <pcre_config+0x96>
mov    -0x10(%rbp),%rax
movl   $0xa,(%rax)
jmp    1196 <pcre_config+0x96>
mov    -0x10(%rbp),%rax
movl   $0x989680,(%rax)
jmp    1196 <pcre_config+0x96>
mov    -0x10(%rbp),%rax
movl   $0x1,(%rax)
jmp    1196 <pcre_config+0x96>
movl   $0xfffffffd,-0x4(%rbp)
jmp    119d <pcre_config+0x9d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcre_config>:
mov    $0xfffffffd,%eax
cmp    $0x5,%edi
ja     111b <pcre_config+0x1b>
movslq %edi,%rax
lea    0xeec(%rip),%rcx
mov    (%rcx,%rax,4),%eax
mov    %eax,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pcre_config(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
%6 = load i32, i32* %4
switch i32 %6, label %25 [
i32 0, label %7
i32 1, label %10
i32 2, label %13
i32 3, label %16
i32 4, label %19
i32 5, label %22
]
7: ; preds = %2
%8 = load i8*, i8** %5
%9 = bitcast i8* %8 to i32*
store i32 0, i32* %9
br label %26
10: ; preds = %2
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to i32*
store i32 10, i32* %12
br label %26
13: ; preds = %2
%14 = load i8*, i8** %5
%15 = bitcast i8* %14 to i32*
store i32 2, i32* %15
br label %26
16: ; preds = %2
%17 = load i8*, i8** %5
%18 = bitcast i8* %17 to i32*
store i32 10, i32* %18
br label %26
19: ; preds = %2
%20 = load i8*, i8** %5
%21 = bitcast i8* %20 to i32*
store i32 10000000, i32* %21
br label %26
22: ; preds = %2
%23 = load i8*, i8** %5
%24 = bitcast i8* %23 to i32*
store i32 1, i32* %24
br label %26
25: ; preds = %2
store i32 -3, i32* %3
br label %27
26: ; preds = %22, %19, %16, %13, %10, %7
store i32 0, i32* %3
br label %27
27: ; preds = %26, %25
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
@switch.table.pcre_config = [6 x i32] [i32 0, i32 10, i32 2, i32 10, i32 10000000, i32 1]
define i32 @pcre_config(i32 %0, i8* nocapture writeonly %1) {
%3 = icmp ult i32 %0, 6
br i1 %3, label %4, label %9
4: ; preds = %2
%5 = sext i32 %0 to i64
%6 = getelementptr inbounds [6 x i32], [6 x i32]* @switch.table.pcre_config, i64 0, i64 %5
%7 = load i32, i32* %6
%8 = bitcast i8* %1 to i32*
store i32 %7, i32* %8
br label %9
9: ; preds = %2, %4
%10 = phi i32 [ -3, %2 ], [ 0, %4 ]
ret i32 %10
}
void init_sequence(void) {}


x86 assembly (clang, -O0):
<init_sequence>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_sequence>:
ret

LLVM IR (-O0):
define void @init_sequence() {
ret void
}

LLVM IR (-O2):
define void @init_sequence() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, unsigned int, char *);
char *cache_version(char *buf, unsigned nbuf) {
  snprintf(buf, nbuf, "\n");
  buf[nbuf - 1] = 0;
  return buf;
}


x86 assembly (clang, -O0):
<cache_version>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
lea    0xed3(%rip),%rdx
call   1030 <snprintf@plt>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
mov    %ecx,%ecx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cache_version>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
lea    0xee0(%rip),%rdx
call   1030 <snprintf@plt>
add    $0xffffffff,%ebx
movb   $0x0,(%r14,%rbx,1)
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define i8* @cache_version(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @snprintf(i8* %5, i32 %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = sub i32 %9, 1
%11 = zext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %8, i64 %11
store i8 0, i8* %12
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@.str = [2 x i8] c"\0A\00"
define i8* @cache_version(i8* returned %0, i32 %1) {
%3 = tail call i32 @snprintf(i8* %0, i32 %1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = add i32 %1, -1
%5 = zext i32 %4 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 %5
store i8 0, i8* %6
ret i8* %0
}
/* Variables and functions */
bool nrf52_errata_145(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_145>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_145>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_145() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_145() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ signal_stop_processing();
void signal_handler(int s) { signal_stop_processing(); }


x86 assembly (clang, -O0):
<signal_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <signal_stop_processing@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<signal_handler>:
xor    %eax,%eax
jmp    1030 <signal_stop_processing@plt>

LLVM IR (-O0):
define void @signal_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @signal_stop_processing()
ret void
}

LLVM IR (-O2):
define void @signal_handler(i32 %0) {
%2 = tail call i32 (...) @signal_stop_processing()
ret void
}
/* Variables and functions */
int atomic_int_add_and_fetch(int volatile *, int);
int atomic_int_inc(volatile int *ptr) {
  return atomic_int_add_and_fetch(ptr, 1);
}


x86 assembly (clang, -O0):
<atomic_int_inc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <atomic_int_add_and_fetch@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_int_inc>:
mov    $0x1,%esi
jmp    1030 <atomic_int_add_and_fetch@plt>

LLVM IR (-O0):
define i32 @atomic_int_inc(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @atomic_int_add_and_fetch(i32* %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @atomic_int_inc(i32* %0) {
%2 = tail call i32 @atomic_int_add_and_fetch(i32* %0, i32 1)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void *malloc(unsigned long);
void *reallocarray(void *, unsigned long, unsigned int);
void g(int i) {
  unsigned long j = 10;
  void *ptr = malloc(j);
  ptr = reallocarray(ptr, j, (unsigned)i);
  free(ptr);
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movq   $0xa,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x4(%rbp),%edx
call   1040 <reallocarray@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
push   %rbx
mov    %edi,%ebx
mov    $0xa,%edi
call   1050 <malloc@plt>
mov    $0xa,%esi
mov    %rax,%rdi
mov    %ebx,%edx
call   1040 <reallocarray@plt>
mov    %rax,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @g(i32 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i8*
store i32 %0, i32* %2
store i64 10, i64* %3
%5 = load i64, i64* %3
%6 = call i8* @malloc(i64 %5)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = load i64, i64* %3
%9 = load i32, i32* %2
%10 = call i8* @reallocarray(i8* %7, i64 %8, i32 %9)
store i8* %10, i8** %4
%11 = load i8*, i8** %4
%12 = call i32 @free(i8* %11)
ret void
}

LLVM IR (-O2):
define void @g(i32 %0) {
%2 = tail call dereferenceable_or_null(10) i8* @malloc(i64 10)
%3 = tail call i8* @reallocarray(i8* %2, i64 10, i32 %0)
%4 = tail call i32 @free(i8* %3)
ret void
}
int sgn(int const x) {
  if (x > 0)
    return 1;
  if (x < 0)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<sgn>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    111d <sgn+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    113a <sgn+0x3a>
cmpl   $0x0,-0x8(%rbp)
jge    1133 <sgn+0x33>
movl   $0xffffffff,-0x4(%rbp)
jmp    113a <sgn+0x3a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sgn>:
mov    %edi,%ecx
sar    $0x1f,%ecx
test   %edi,%edi
mov    $0x1,%eax
cmovle %ecx,%eax
ret

LLVM IR (-O0):
define i32 @sgn(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %12
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 -1, i32* %2
br label %12
11: ; preds = %7
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @sgn(i32 %0) {
%2 = ashr i32 %0, 31
%3 = icmp slt i32 %0, 1
%4 = select i1 %3, i32 %2, i32 1
ret i32 %4
}
/* Type definitions */
struct b6_list {
  int dummy;
};

/* Variables and functions */
scalar_t__ b6_list_first(struct b6_list const *);
scalar_t__ b6_list_tail(struct b6_list const *);
int b6_list_empty(const struct b6_list *list) {
  return b6_list_first(list) == b6_list_tail(list);
}


x86 assembly (clang, -O0):
<b6_list_empty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <b6_list_first@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <b6_list_tail@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b6_list_empty>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <b6_list_first@plt>
mov    %rax,%r14
mov    %rbx,%rdi
call   1040 <b6_list_tail@plt>
xor    %ecx,%ecx
cmp    %rax,%r14
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.b6_list = type { i32 }
define i32 @b6_list_empty(%struct.b6_list* %0) {
%2 = alloca %struct.b6_list*
store %struct.b6_list* %0, %struct.b6_list** %2
%3 = load %struct.b6_list*, %struct.b6_list** %2
%4 = call i64 @b6_list_first(%struct.b6_list* %3)
%5 = load %struct.b6_list*, %struct.b6_list** %2
%6 = call i64 @b6_list_tail(%struct.b6_list* %5)
%7 = icmp eq i64 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
%struct.b6_list = type { i32 }
define i32 @b6_list_empty(%struct.b6_list* %0) {
%2 = tail call i64 @b6_list_first(%struct.b6_list* %0)
%3 = tail call i64 @b6_list_tail(%struct.b6_list* %0)
%4 = icmp eq i64 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}