xunge/DecIR huggingface dataset:
int compare_int(int left, int right) { return left - right; }


x86 assembly (clang, -O0):
<compare_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_int>:
mov    %edi,%eax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @compare_int(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @compare_int(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
ret i32 %3
}
void _write_char(char **pptr, char c) {
  **pptr = c;
  (*pptr)++;
}


x86 assembly (clang, -O0):
<_write_char>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_write_char>:
mov    (%rdi),%rax
mov    %sil,(%rax)
addq   $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @_write_char(i8** %0, i8 signext %1) {
%3 = alloca i8**
%4 = alloca i8
store i8** %0, i8*** %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %6
store i8 %5, i8* %7
%8 = load i8**, i8*** %3
%9 = load i8*, i8** %8
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %8
ret void
}

LLVM IR (-O2):
define void @_write_char(i8** nocapture %0, i8 signext %1) {
%3 = load i8*, i8** %0
store i8 %1, i8* %3
%4 = load i8*, i8** %0
%5 = getelementptr inbounds i8, i8* %4, i64 1
store i8* %5, i8** %0
ret void
}
/* Variables and functions */
int _rename(char const *, char const *);
int rename(const char *old, const char *new) { return _rename(old, new); }


x86 assembly (clang, -O0):
<rename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <_rename@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rename>:
jmp    1030 <_rename@plt>

LLVM IR (-O0):
define i32 @rename(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @_rename(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @rename(i8* %0, i8* %1) {
%3 = tail call i32 @_rename(i8* %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ _IONBF;
int /*<<< orphan*/ setvbuf(int /*<<< orphan*/, int /*<<< orphan*/ *,
                           int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void autoflush() { setvbuf(stdout, NULL, _IONBF, 0); }


x86 assembly (clang, -O0):
<autoflush>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    0x2ec4(%rip),%rax
mov    (%rax),%edx
xor    %eax,%eax
mov    %eax,%esi
xor    %ecx,%ecx
call   1030 <setvbuf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<autoflush>:
mov    0x2ec1(%rip),%rax
mov    (%rax),%edi
mov    0x2ec8(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
xor    %ecx,%ecx
jmp    1030 <setvbuf@plt>

LLVM IR (-O0):
@stdout = global i32 0
@_IONBF = global i32 0
define void @autoflush() {
%1 = load i32, i32* @stdout
%2 = load i32, i32* @_IONBF
%3 = call i32 @setvbuf(i32 %1, i32* null, i32 %2, i32 0)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@_IONBF = global i32 0
define void @autoflush() {
%1 = load i32, i32* @stdout
%2 = load i32, i32* @_IONBF
%3 = tail call i32 @setvbuf(i32 %1, i32* null, i32 %2, i32 0)
ret void
}
int float_ge_xxxx(int a, int b) {
  if (a < 0) {
    a = 0x80000000u - a;
  }
  if (b < 0) {
    b = 0x80000000u - b;
  }
  return a >= b;
}


x86 assembly (clang, -O0):
<float_ge_xxxx>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    111f <float_ge_xxxx+0x1f>
mov    $0x80000000,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1134 <float_ge_xxxx+0x34>
mov    $0x80000000,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setge  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<float_ge_xxxx>:
mov    $0x80000000,%ecx
mov    $0x80000000,%edx
sub    %edi,%edx
test   %edi,%edi
cmovns %edi,%edx
sub    %esi,%ecx
test   %esi,%esi
cmovns %esi,%ecx
xor    %eax,%eax
cmp    %ecx,%edx
setge  %al
ret

LLVM IR (-O0):
define i32 @float_ge_xxxx(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %3
%9 = sub i32 -2147483648, %8
store i32 %9, i32* %3
br label %10
10: ; preds = %7, %2
%11 = load i32, i32* %4
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %4
%15 = sub i32 -2147483648, %14
store i32 %15, i32* %4
br label %16
16: ; preds = %13, %10
%17 = load i32, i32* %3
%18 = load i32, i32* %4
%19 = icmp sge i32 %17, %18
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @float_ge_xxxx(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, 0
%4 = sub i32 -2147483648, %0
%5 = select i1 %3, i32 %4, i32 %0
%6 = icmp slt i32 %1, 0
%7 = sub i32 -2147483648, %1
%8 = select i1 %6, i32 %7, i32 %1
%9 = icmp sge i32 %5, %8
%10 = zext i1 %9 to i32
ret i32 %10
}
long f2(void) { return 0x5e000000; }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5e000000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
mov    $0x5e000000,%eax
ret

LLVM IR (-O0):
define i64 @f2() {
ret i64 1577058304
}

LLVM IR (-O2):
define i64 @f2() {
ret i64 1577058304
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ show_version();
void version() {
  show_version();
  exit(0);
}


x86 assembly (clang, -O0):
<version>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <show_version@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<version>:
push   %rax
xor    %eax,%eax
call   1030 <show_version@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @version() {
%1 = call i32 (...) @show_version()
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @version() {
%1 = tail call i32 (...) @show_version()
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
long atol(char *);
int /*<<< orphan*/ strcspn(char *, char *);
int _cfg_read_numeric(char **buf, long *val) {
  char *ptr;
  ptr = *buf;
  *buf += strcspn(*buf, " \t\r\n");
  *((*buf)++) = 0;
  *val = atol(ptr);
  return 0;
}


x86 assembly (clang, -O0):
<_cfg_read_numeric>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
lea    0xeb7(%rip),%rsi
call   1030 <strcspn@plt>
mov    %eax,%edx
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
movslq %edx,%rdx
add    %rdx,%rcx
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rcx
mov    (%rcx),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,(%rcx)
movb   $0x0,(%rax)
mov    -0x18(%rbp),%rdi
call   1040 <atol@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_cfg_read_numeric>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
mov    (%rdi),%rbx
lea    0xecb(%rip),%rsi
mov    %rbx,%rdi
call   1030 <strcspn@plt>
cltq
lea    (%rbx,%rax,1),%rcx
add    $0x1,%rcx
mov    %rcx,(%r15)
movb   $0x0,(%rbx,%rax,1)
mov    %rbx,%rdi
call   1040 <atol@plt>
mov    %rax,(%r14)
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [5 x i8] c" \09\0D\0A\00"
define i32 @_cfg_read_numeric(i8** %0, i64* %1) {
%3 = alloca i8**
%4 = alloca i64*
%5 = alloca i8*
store i8** %0, i8*** %3
store i64* %1, i64** %4
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %6
store i8* %7, i8** %5
%8 = load i8**, i8*** %3
%9 = load i8*, i8** %8
%10 = call i32 @strcspn(i8* %9, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%11 = load i8**, i8*** %3
%12 = load i8*, i8** %11
%13 = sext i32 %10 to i64
%14 = getelementptr inbounds i8, i8* %12, i64 %13
store i8* %14, i8** %11
%15 = load i8**, i8*** %3
%16 = load i8*, i8** %15
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %15
store i8 0, i8* %16
%18 = load i8*, i8** %5
%19 = call i64 @atol(i8* %18)
%20 = load i64*, i64** %4
store i64 %19, i64* %20
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c" \09\0D\0A\00"
define i32 @_cfg_read_numeric(i8** nocapture %0, i64* nocapture writeonly %1) {
%3 = load i8*, i8** %0
%4 = tail call i32 @strcspn(i8* %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i8, i8* %3, i64 %5
%7 = getelementptr inbounds i8, i8* %6, i64 1
store i8* %7, i8** %0
store i8 0, i8* %6
%8 = tail call i64 @atol(i8* %3)
store i64 %8, i64* %1
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void error_fichier_incomplet(void) {
  printf("Erreur : Fichier incomplet (EOF inattendu)\n");
}


x86 assembly (clang, -O0):
<error_fichier_incomplet>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<error_fichier_incomplet>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [44 x i8] c"Erreur : Fichier incomplet (EOF inattendu)\0A\00"
define void @error_fichier_incomplet() {
%1 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [43 x i8] c"Erreur : Fichier incomplet (EOF inattendu)\00"
define void @error_fichier_incomplet() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([43 x i8], [43 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIG_DFL;
int /*<<< orphan*/ _exit(int);
int /*<<< orphan*/ getpid();
int /*<<< orphan*/ hostcompat_ttyreset();
int /*<<< orphan*/ kill(int /*<<< orphan*/, int);
int /*<<< orphan*/ signal(int, int /*<<< orphan*/);
void hostcompat_die(int sig) {
  hostcompat_ttyreset();
  signal(sig, SIG_DFL);
  kill(getpid(), sig);
  _exit(255);
}


x86 assembly (clang, -O0):
<hostcompat_die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1050 <hostcompat_ttyreset@plt>
mov    -0x4(%rbp),%edi
mov    0x2e74(%rip),%rax
mov    (%rax),%esi
call   1060 <signal@plt>
mov    $0x0,%al
call   1040 <getpid@plt>
mov    %eax,%edi
mov    -0x4(%rbp),%esi
call   1070 <kill@plt>
mov    $0xff,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<hostcompat_die>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1050 <hostcompat_ttyreset@plt>
mov    0x2e7f(%rip),%rax
mov    (%rax),%esi
mov    %ebx,%edi
call   1060 <signal@plt>
xor    %eax,%eax
call   1040 <getpid@plt>
mov    %eax,%edi
mov    %ebx,%esi
call   1070 <kill@plt>
mov    $0xff,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
@SIG_DFL = global i32 0
define void @hostcompat_die(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @hostcompat_ttyreset()
%4 = load i32, i32* %2
%5 = load i32, i32* @SIG_DFL
%6 = call i32 @signal(i32 %4, i32 %5)
%7 = call i32 (...) @getpid()
%8 = load i32, i32* %2
%9 = call i32 @kill(i32 %7, i32 %8)
%10 = call i32 @_exit(i32 255)
unreachable
}

LLVM IR (-O2):
@SIG_DFL = global i32 0
define void @hostcompat_die(i32 %0) {
%2 = tail call i32 (...) @hostcompat_ttyreset()
%3 = load i32, i32* @SIG_DFL
%4 = tail call i32 @signal(i32 %0, i32 %3)
%5 = tail call i32 (...) @getpid()
%6 = tail call i32 @kill(i32 %5, i32 %0)
%7 = tail call i32 @_exit(i32 255)
unreachable
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
bool I2CMasterIntStatus(uint32_t ui32Base, bool bMasked) {
  ;
  if (bMasked) {
    return (((*((volatile uint32_t *)(ui32Base + 0x00000018)))) ? true : false);
  } else {
    return (((*((volatile uint32_t *)(ui32Base + 0x00000014)))) ? true : false);
  }
}


x86 assembly (clang, -O0):
<I2CMasterIntStatus>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1133 <I2CMasterIntStatus+0x33>
mov    -0x10(%rbp),%rax
mov    0x18(%rax),%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    114c <I2CMasterIntStatus+0x4c>
mov    -0x10(%rbp),%rax
mov    0x14(%rax),%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CMasterIntStatus>:
xor    %ecx,%ecx
test   %esi,%esi
setne  %cl
xor    %eax,%eax
cmpq   $0x0,0x14(%rdi,%rcx,4)
setne  %al
ret

LLVM IR (-O0):
define i32 @I2CMasterIntStatus(i64 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i32
store i64 %0, i64* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %16
8: ; preds = %2
%9 = load i64, i64* %4
%10 = add nsw i64 %9, 24
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = icmp ne i64 %12, 0
%14 = zext i1 %13 to i64
%15 = select i1 %13, i32 1, i32 0
store i32 %15, i32* %3
br label %24
16: ; preds = %2
%17 = load i64, i64* %4
%18 = add nsw i64 %17, 20
%19 = inttoptr i64 %18 to i64*
%20 = load volatile i64, i64* %19
%21 = icmp ne i64 %20, 0
%22 = zext i1 %21 to i64
%23 = select i1 %21, i32 1, i32 0
store i32 %23, i32* %3
br label %24
24: ; preds = %16, %8
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @I2CMasterIntStatus(i64 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = select i1 %3, i64 20, i64 24
%5 = add nsw i64 %4, %0
%6 = inttoptr i64 %5 to i64*
%7 = load volatile i64, i64* %6
%8 = icmp ne i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}
double f2(double x, double y) {
  return x * ((1.0 / 12) * __builtin_copysign(1.0, y));
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
movaps 0xef1(%rip),%xmm1
pand   %xmm1,%xmm2
movaps 0xef6(%rip),%xmm1
por    %xmm1,%xmm2
movsd  0xeca(%rip),%xmm1
mulsd  %xmm2,%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
andpd  0xef8(%rip),%xmm1
orpd   0xf00(%rip),%xmm1
mulsd  0xf08(%rip),%xmm1
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @f2(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @llvm.copysign.f64(double 1.000000e+00, double %6)
%8 = fmul double 0x3FB5555555555555, %7
%9 = fmul double %5, %8
ret double %9
}

LLVM IR (-O2):
define double @f2(double %0, double %1) {
%3 = tail call double @llvm.copysign.f64(double 1.000000e+00, double %1)
%4 = fmul double %3, 0x3FB5555555555555
%5 = fmul double %4, %0
ret double %5
}
/* Variables and functions */
int /*<<< orphan*/ check_two_factor_term(char *, char const **, int, char *);
void test_mul_two_factor_term() {
  const char *tokensv[] = {"2", "*", "3"};
  check_two_factor_term("mul_two_factor_term", tokensv, 3, "output_multiply");
}


x86 assembly (clang, -O0):
<test_mul_two_factor_term>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x2ce1(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0x2cde(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0x2cdb(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    -0x20(%rbp),%rsi
lea    0xec2(%rip),%rdi
mov    $0x3,%edx
lea    0xeca(%rip),%rcx
call   1030 <check_two_factor_term@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mul_two_factor_term>:
sub    $0x18,%rsp
mov    0x2cf5(%rip),%rax
mov    %rax,0x10(%rsp)
movaps 0x2cd9(%rip),%xmm0
movaps %xmm0,(%rsp)
lea    0xed4(%rip),%rdi
lea    0xee1(%rip),%rcx
mov    %rsp,%rsi
mov    $0x3,%edx
call   1030 <check_two_factor_term@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [2 x i8] c"2\00"
@.str.1 = [2 x i8] c"*\00"
@.str.2 = [2 x i8] c"3\00"
@__const.test_mul_two_factor_term.tokensv = [3 x i8*] [i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i32 0, i32 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i32 0, i32 0)]
@.str.3 = [20 x i8] c"mul_two_factor_term\00"
@.str.4 = [16 x i8] c"output_multiply\00"
define void @test_mul_two_factor_term() {
%1 = alloca [3 x i8*]
%2 = bitcast [3 x i8*]* %1 to i8*
%3 = getelementptr inbounds [3 x i8*], [3 x i8*]* %1, i64 0, i64 0
%4 = call i32 @check_two_factor_term(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.3, i64 0, i64 0), i8** %3, i32 3, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.4, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"2\00"
@.str.1 = [2 x i8] c"*\00"
@.str.2 = [2 x i8] c"3\00"
@__const.test_mul_two_factor_term.tokensv = [3 x i8*] [i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i32 0, i32 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i32 0, i32 0)]
@.str.3 = [20 x i8] c"mul_two_factor_term\00"
@.str.4 = [16 x i8] c"output_multiply\00"
define void @test_mul_two_factor_term() {
%1 = alloca [3 x i8*]
%2 = bitcast [3 x i8*]* %1 to i8*
%3 = getelementptr inbounds [3 x i8*], [3 x i8*]* %1, i64 0, i64 0
%4 = call i32 @check_two_factor_term(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.3, i64 0, i64 0), i8** %3, i32 3, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.4, i64 0, i64 0))
ret void
}
double magnitude_3d(a1, a2, a3)
double a1, a2, a3;
{ return (sqrt(a1 * a1 + a2 * a2 + a3 * a3)); }


x86 assembly (clang, -O0):
<magnitude_3d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm2
movsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<magnitude_3d>:
mulsd  %xmm1,%xmm1
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
mulsd  %xmm2,%xmm2
addsd  %xmm0,%xmm2
xorpd  %xmm0,%xmm0
ucomisd %xmm0,%xmm2
jb     1136 <magnitude_3d+0x26>
xorps  %xmm0,%xmm0
sqrtsd %xmm2,%xmm0
ret
movapd %xmm2,%xmm0
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @magnitude_3d(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %4
%9 = load double, double* %5
%10 = load double, double* %5
%11 = fmul double %9, %10
%12 = call double @llvm.fmuladd.f64(double %7, double %8, double %11)
%13 = load double, double* %6
%14 = load double, double* %6
%15 = call double @llvm.fmuladd.f64(double %13, double %14, double %12)
%16 = call double @sqrt(double %15)
ret double %16
}

LLVM IR (-O2):
define double @magnitude_3d(double %0, double %1, double %2) {
%4 = fmul double %1, %1
%5 = tail call double @llvm.fmuladd.f64(double %0, double %0, double %4)
%6 = tail call double @llvm.fmuladd.f64(double %2, double %2, double %5)
%7 = tail call double @sqrt(double %6)
ret double %7
}
/* Variables and functions */
int normalcdf(double, double, double);
int normalpdf(double, double, double);
double normalhrf(double x, double m, double s) {
  return normalpdf(x, m, s) / (1 - normalcdf(x, m, s));
}


x86 assembly (clang, -O0):
<normalhrf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
call   1040 <normalpdf@plt>
mov    %eax,-0x1c(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
call   1030 <normalcdf@plt>
mov    %eax,%edx
mov    -0x1c(%rbp),%eax
mov    $0x1,%ecx
sub    %edx,%ecx
cltd
idiv   %ecx
cvtsi2sd %eax,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<normalhrf>:
push   %rbx
sub    $0x20,%rsp
movsd  %xmm2,0x18(%rsp)
movsd  %xmm1,0x10(%rsp)
movsd  %xmm0,0x8(%rsp)
call   1040 <normalpdf@plt>
mov    %eax,%ebx
movsd  0x8(%rsp),%xmm0
movsd  0x10(%rsp),%xmm1
movsd  0x18(%rsp),%xmm2
call   1030 <normalcdf@plt>
mov    $0x1,%ecx
sub    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define double @normalhrf(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = load double, double* %6
%10 = call i32 @normalpdf(double %7, double %8, double %9)
%11 = load double, double* %4
%12 = load double, double* %5
%13 = load double, double* %6
%14 = call i32 @normalcdf(double %11, double %12, double %13)
%15 = sub nsw i32 1, %14
%16 = sdiv i32 %10, %15
%17 = sitofp i32 %16 to double
ret double %17
}

LLVM IR (-O2):
define double @normalhrf(double %0, double %1, double %2) {
%4 = tail call i32 @normalpdf(double %0, double %1, double %2)
%5 = tail call i32 @normalcdf(double %0, double %1, double %2)
%6 = sub nsw i32 1, %5
%7 = sdiv i32 %4, %6
%8 = sitofp i32 %7 to double
ret double %8
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fread(float *, int, int, int /*<<< orphan*/ *);
int a3dsReadFloat(FILE *f, float *fl) { return fread(fl, 4, 1, f) == 1; }


x86 assembly (clang, -O0):
<a3dsReadFloat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rcx
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fread@plt>
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<a3dsReadFloat>:
push   %rax
mov    %rdi,%rcx
mov    %rsi,%rdi
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fread@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @a3dsReadFloat(i32* %0, float* %1) {
%3 = alloca i32*
%4 = alloca float*
store i32* %0, i32** %3
store float* %1, float** %4
%5 = load float*, float** %4
%6 = load i32*, i32** %3
%7 = call i32 @fread(float* %5, i32 4, i32 1, i32* %6)
%8 = icmp eq i32 %7, 1
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @a3dsReadFloat(i32* nocapture %0, float* nocapture %1) {
%3 = tail call i32 @fread(float* %1, i32 4, i32 1, i32* %0)
%4 = icmp eq i32 %3, 1
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
double remove_event_entry(int);
double remove_event_scc(int type) {
  return remove_event_entry(6 + (type << 8));
}


x86 assembly (clang, -O0):
<remove_event_scc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
shl    $0x8,%edi
add    $0x6,%edi
call   1030 <remove_event_entry@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_event_scc>:
shl    $0x8,%edi
or     $0x6,%edi
jmp    1030 <remove_event_entry@plt>

LLVM IR (-O0):
define double @remove_event_scc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 8
%5 = add nsw i32 6, %4
%6 = call double @remove_event_entry(i32 %5)
ret double %6
}

LLVM IR (-O2):
define double @remove_event_scc(i32 %0) {
%2 = shl i32 %0, 8
%3 = or i32 %2, 6
%4 = tail call double @remove_event_entry(i32 %3)
ret double %4
}
int cidx_isspace(char c) {
  return c == ' ' || c == '\t' || c == '\r' || c == '\n';
}


x86 assembly (clang, -O0):
<cidx_isspace>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x2(%rbp)
je     114d <cidx_isspace+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x9,%ecx
mov    %al,-0x2(%rbp)
je     114d <cidx_isspace+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0xd,%ecx
mov    %al,-0x2(%rbp)
je     114d <cidx_isspace+0x4d>
movsbl -0x1(%rbp),%eax
cmp    $0xa,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cidx_isspace>:
cmp    $0x20,%dil
ja     1120 <cidx_isspace+0x20>
mov    $0x1,%eax
movzbl %dil,%ecx
movabs $0x100002200,%rdx
bt     %rcx,%rdx
jae    1120 <cidx_isspace+0x20>
ret
xor    %eax,%eax
cmp    $0xa,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @cidx_isspace(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 32
br i1 %5, label %18, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 9
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 13
br i1 %13, label %18, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 10
br label %18
18: ; preds = %14, %10, %6, %1
%19 = phi i1 [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %17, %14 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @cidx_isspace(i8 signext %0) {
switch i8 %0, label %2 [
i8 32, label %5
i8 13, label %5
i8 9, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 10
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void abort(void) {
  printf("abort(): Abnormal program termination\n");
  exit(1);
}


x86 assembly (clang, -O0):
<abort>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<abort>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [39 x i8] c"abort(): Abnormal program termination\0A\00"
define void @abort() {
%1 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@str = [38 x i8] c"abort(): Abnormal program termination\00"
define void @abort() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 1)
unreachable
}
double _func1(double x) { return (x * x); }


x86 assembly (clang, -O0):
<_func1>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_func1>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @_func1(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @_func1(double %0) {
%2 = fmul double %0, %0
ret double %2
}
int ordering_lossy_gt_3(void) {
  return ((int)-(((int)-(
      ((int)0x37ED) << (8 * (((!!(((!!(sizeof(int))) * ((sizeof(int)) - 1)))) *
                              ((((!!(sizeof(int))) * ((sizeof(int)) - 1))) -
                               1))))))));
}


x86 assembly (clang, -O0):
<ordering_lossy_gt_3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x37ed0000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ordering_lossy_gt_3>:
mov    $0x37ed0000,%eax
ret

LLVM IR (-O0):
define i32 @ordering_lossy_gt_3() {
ret i32 938278912
}

LLVM IR (-O2):
define i32 @ordering_lossy_gt_3() {
ret i32 938278912
}
void BN_mod_exp_mont_consttime(void) {}


x86 assembly (clang, -O0):
<BN_mod_exp_mont_consttime>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_mod_exp_mont_consttime>:
ret

LLVM IR (-O0):
define void @BN_mod_exp_mont_consttime() {
ret void
}

LLVM IR (-O2):
define void @BN_mod_exp_mont_consttime() {
ret void
}
int test_imm_88int64_highword_mem(long long *val) {
  return ((*val >> 32) & (0x88 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_88int64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x20,%rdx
and    $0x88,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_88int64_highword_mem>:
testb  $0x88,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_88int64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 32
%6 = and i64 %5, 136
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_88int64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 584115552256
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct in_addr {
  int /*<<< orphan*/ s_addr;
};

/* Variables and functions */
unsigned long lookup(unsigned char *, int, int /*<<< orphan*/);
unsigned long int ippool_hash(struct in_addr *addr) {
  return lookup((unsigned char *)&addr->s_addr, sizeof(addr->s_addr), 0);
}


x86 assembly (clang, -O0):
<ippool_hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x4,%esi
xor    %edx,%edx
call   1030 <lookup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ippool_hash>:
mov    $0x4,%esi
xor    %edx,%edx
jmp    1030 <lookup@plt>

LLVM IR (-O0):
%struct.in_addr = type { i32 }
define i64 @ippool_hash(%struct.in_addr* %0) {
%2 = alloca %struct.in_addr*
store %struct.in_addr* %0, %struct.in_addr** %2
%3 = load %struct.in_addr*, %struct.in_addr** %2
%4 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %3, i32 0, i32 0
%5 = bitcast i32* %4 to i8*
%6 = call i64 @lookup(i8* %5, i32 4, i32 0)
ret i64 %6
}

LLVM IR (-O2):
%struct.in_addr = type { i32 }
define i64 @ippool_hash(%struct.in_addr* %0) {
%2 = bitcast %struct.in_addr* %0 to i8*
%3 = tail call i64 @lookup(i8* %2, i32 4, i32 0)
ret i64 %3
}
void cl_usb_hub_deinit(int gpio) {}


x86 assembly (clang, -O0):
<cl_usb_hub_deinit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cl_usb_hub_deinit>:
ret

LLVM IR (-O0):
define void @cl_usb_hub_deinit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @cl_usb_hub_deinit(i32 %0) {
ret void
}
/* Variables and functions */
int dgx_rnd_range(int, int);
int rnd_midpoint(int v) {
  int split = v / 2;
  int unit = v / 12;
  if (unit == 0) {
    unit = 1;
  }
  return dgx_rnd_range(split - unit, split + unit * 2);
}


x86 assembly (clang, -O0):
<rnd_midpoint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xc,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1148 <rnd_midpoint+0x38>
movl   $0x1,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    -0xc(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
add    %eax,%esi
call   1030 <dgx_rnd_range@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rnd_midpoint>:
mov    %edi,%eax
shr    $0x1f,%eax
add    %edi,%eax
sar    %eax
lea    0xb(%rdi),%edx
mov    $0x1,%ecx
cmp    $0x17,%edx
jb     113d <rnd_midpoint+0x2d>
movslq %edi,%rcx
imul   $0x2aaaaaab,%rcx,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x21,%rcx
add    %edx,%ecx
mov    %eax,%edi
sub    %ecx,%edi
lea    (%rax,%rcx,2),%esi
jmp    1030 <dgx_rnd_range@plt>

LLVM IR (-O0):
define i32 @rnd_midpoint(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = sdiv i32 %5, 2
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = sdiv i32 %7, 12
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %1
store i32 1, i32* %4
br label %12
12: ; preds = %11, %1
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = sub nsw i32 %13, %14
%16 = load i32, i32* %3
%17 = load i32, i32* %4
%18 = mul nsw i32 %17, 2
%19 = add nsw i32 %16, %18
%20 = call i32 @dgx_rnd_range(i32 %15, i32 %19)
ret i32 %20
}

LLVM IR (-O2):
define i32 @rnd_midpoint(i32 %0) {
%2 = sdiv i32 %0, 2
%3 = sdiv i32 %0, 12
%4 = add i32 %0, 11
%5 = icmp ult i32 %4, 23
%6 = select i1 %5, i32 1, i32 %3
%7 = sub nsw i32 %2, %6
%8 = shl nsw i32 %6, 1
%9 = add nsw i32 %8, %2
%10 = tail call i32 @dgx_rnd_range(i32 %7, i32 %9)
ret i32 %10
}
int next_power_of_2(int n) {
  n--;
  n |= n >> 1;
  n |= n >> 2;
  n |= n >> 4;
  n |= n >> 8;
  n |= n >> 16;
  n++;
  return n;
}


x86 assembly (clang, -O0):
<next_power_of_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x2,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_power_of_2>:
lea    -0x1(%rdi),%eax
mov    %eax,%ecx
sar    %ecx
or     %eax,%ecx
mov    %ecx,%eax
sar    $0x2,%eax
or     %ecx,%eax
mov    %eax,%ecx
sar    $0x4,%ecx
or     %eax,%ecx
mov    %ecx,%edx
sar    $0x8,%edx
or     %ecx,%edx
mov    %edx,%eax
sar    $0x10,%eax
or     %edx,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @next_power_of_2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, -1
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = ashr i32 %5, 1
%7 = load i32, i32* %2
%8 = or i32 %7, %6
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = ashr i32 %9, 2
%11 = load i32, i32* %2
%12 = or i32 %11, %10
store i32 %12, i32* %2
%13 = load i32, i32* %2
%14 = ashr i32 %13, 4
%15 = load i32, i32* %2
%16 = or i32 %15, %14
store i32 %16, i32* %2
%17 = load i32, i32* %2
%18 = ashr i32 %17, 8
%19 = load i32, i32* %2
%20 = or i32 %19, %18
store i32 %20, i32* %2
%21 = load i32, i32* %2
%22 = ashr i32 %21, 16
%23 = load i32, i32* %2
%24 = or i32 %23, %22
store i32 %24, i32* %2
%25 = load i32, i32* %2
%26 = add nsw i32 %25, 1
store i32 %26, i32* %2
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @next_power_of_2(i32 %0) {
%2 = add nsw i32 %0, -1
%3 = ashr i32 %2, 1
%4 = or i32 %3, %2
%5 = ashr i32 %4, 2
%6 = or i32 %5, %4
%7 = ashr i32 %6, 4
%8 = or i32 %7, %6
%9 = ashr i32 %8, 8
%10 = or i32 %9, %8
%11 = ashr i32 %10, 16
%12 = or i32 %11, %10
%13 = add nsw i32 %12, 1
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
int main() {
  system("make");
  system("./swpathtracer");
  system("eog output_image.ppm&");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <system@plt>
lea    0xede(%rip),%rdi
call   1030 <system@plt>
lea    0xee1(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <system@plt>
lea    0xee1(%rip),%rdi
call   1030 <system@plt>
lea    0xee4(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"make\00"
@.str.1 = [15 x i8] c"./swpathtracer\00"
@.str.2 = [22 x i8] c"eog output_image.ppm&\00"
define i32 @main() {
%1 = call i32 @system(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @system(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @system(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"make\00"
@.str.1 = [15 x i8] c"./swpathtracer\00"
@.str.2 = [22 x i8] c"eog output_image.ppm&\00"
define i32 @main() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @system(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @system(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}
void ff_hevc_put_hevc_bi_w_epel_h48_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_epel_h48_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_epel_h48_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_epel_h48_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_epel_h48_8_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ stm32f0xx_interrupt_init();
void interrupt_init(void) { stm32f0xx_interrupt_init(); }


x86 assembly (clang, -O0):
<interrupt_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <stm32f0xx_interrupt_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<interrupt_init>:
xor    %eax,%eax
jmp    1030 <stm32f0xx_interrupt_init@plt>

LLVM IR (-O0):
define void @interrupt_init() {
%1 = call i32 (...) @stm32f0xx_interrupt_init()
ret void
}

LLVM IR (-O2):
define void @interrupt_init() {
%1 = tail call i32 (...) @stm32f0xx_interrupt_init()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ detect_noreturn();
int /*<<< orphan*/ noreturn_autodetection_failed();
int main(void) {
  detect_noreturn();
  noreturn_autodetection_failed();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <detect_noreturn@plt>
mov    $0x0,%al
call   1030 <noreturn_autodetection_failed@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <detect_noreturn@plt>
xor    %eax,%eax
call   1030 <noreturn_autodetection_failed@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @detect_noreturn()
%3 = call i32 (...) @noreturn_autodetection_failed()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @detect_noreturn()
%2 = tail call i32 (...) @noreturn_autodetection_failed()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isgraph(int);
void t_isgraph_0x29() {
  Assert_real((isgraph(41)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              210, ("isgraph should be 1 for )"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x29>:
push   %rbp
mov    %rsp,%rbp
mov    $0x29,%edi
call   1040 <isgraph@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0xd2,%edx
lea    0xf65(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x29>:
push   %rax
mov    $0x29,%edi
call   1040 <isgraph@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0xd2,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for )\00"
define void @t_isgraph_0x29() {
%1 = call i32 @isgraph(i32 41)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 210, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for )\00"
define void @t_isgraph_0x29() {
%1 = tail call i32 @isgraph(i32 41)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 210, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef unsigned int uint32_t;

/* Variables and functions */
unsigned int R32(int);
unsigned int const UINT32_C(int);
unsigned char gpio_get(const unsigned pin) {
  const unsigned index = pin >> 5;
  const uint32_t bit = UINT32_C(1) << (pin & 31);
  unsigned int gpio_state;
  if (index) {
    gpio_state = R32(((0x3F000000 + 0x200000) + 0x38));
  } else {
    gpio_state = R32(((0x3F000000 + 0x200000) + 0x34));
  }
  return ((gpio_state & bit) != 0);
}


x86 assembly (clang, -O0):
<gpio_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x5,%eax
mov    %eax,-0x8(%rbp)
mov    $0x1,%edi
call   1040 <UINT32_C@plt>
mov    -0x4(%rbp),%ecx
and    $0x1f,%ecx
shl    %cl,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1165 <gpio_get+0x45>
mov    $0x3f200038,%edi
call   1030 <R32@plt>
mov    %eax,-0x10(%rbp)
jmp    1172 <gpio_get+0x52>
mov    $0x3f200034,%edi
call   1030 <R32@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    -0xc(%rbp),%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_get>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    $0x1,%edi
call   1040 <UINT32_C@plt>
mov    %eax,%ebp
xor    %eax,%eax
cmp    $0x20,%ebx
setae  %al
lea    0x3f200034(,%rax,4),%edi
call   1030 <R32@plt>
mov    %ebx,%ecx
shl    %cl,%ebp
test   %ebp,%eax
setne  %al
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define zeroext i8 @gpio_get(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = lshr i32 %6, 5
store i32 %7, i32* %3
%8 = call i32 @UINT32_C(i32 1)
%9 = load i32, i32* %2
%10 = and i32 %9, 31
%11 = shl i32 %8, %10
store i32 %11, i32* %4
%12 = load i32, i32* %3
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %1
%15 = call i32 @R32(i32 1059061816)
store i32 %15, i32* %5
br label %18
16: ; preds = %1
%17 = call i32 @R32(i32 1059061812)
store i32 %17, i32* %5
br label %18
18: ; preds = %16, %14
%19 = load i32, i32* %5
%20 = load i32, i32* %4
%21 = and i32 %19, %20
%22 = icmp ne i32 %21, 0
%23 = zext i1 %22 to i32
%24 = trunc i32 %23 to i8
ret i8 %24
}

LLVM IR (-O2):
define zeroext i8 @gpio_get(i32 %0) {
%2 = tail call i32 @UINT32_C(i32 1)
%3 = icmp ult i32 %0, 32
%4 = select i1 %3, i32 1059061812, i32 1059061816
%5 = tail call i32 @R32(i32 %4)
%6 = and i32 %0, 31
%7 = shl i32 %2, %6
%8 = and i32 %5, %7
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i8
ret i8 %10
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t cio_file_st_get_meta_len(char *map) {
  return (uint16_t)((uint8_t)map[22] << 8) | (uint8_t)map[23];
}


x86 assembly (clang, -O0):
<cio_file_st_get_meta_len>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl 0x16(%rax),%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
movsbl 0x17(%rcx),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cio_file_st_get_meta_len>:
movsbl 0x16(%rdi),%ecx
shl    $0x8,%ecx
movsbl 0x17(%rdi),%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @cio_file_st_get_meta_len(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 22
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = shl i32 %6, 8
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 23
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = or i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @cio_file_st_get_meta_len(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 22
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = shl nsw i32 %4, 8
%6 = getelementptr inbounds i8, i8* %0, i64 23
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = or i32 %5, %8
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char const *, int);
void Print_Bits(int code, int bits, int len) {
  int i;
  {
    i = 0;
    while (i < len) {
      printf((char const *__restrict)"%d", (code >> ((bits - 1) - i)) & 1);
      i++;
    }
    return;
  }
}


x86 assembly (clang, -O0):
<Print_Bits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    115f <Print_Bits+0x4f>
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
sub    -0x10(%rbp),%ecx
sar    %cl,%esi
and    $0x1,%esi
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1128 <Print_Bits+0x18>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Print_Bits>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
test   %edx,%edx
jle    114a <Print_Bits+0x3a>
mov    %edx,%ebx
mov    %esi,%ebp
mov    %edi,%r14d
add    $0xffffffff,%ebp
lea    0xed4(%rip),%r15
nopl   0x0(%rax)
mov    %r14d,%esi
mov    %ebp,%ecx
shr    %cl,%esi
and    $0x1,%esi
mov    %r15,%rdi
call   1030 <printf@plt>
add    $0xffffffff,%ebp
add    $0xffffffff,%ebx
jne    1130 <Print_Bits+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @Print_Bits(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %12, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %23
12: ; preds = %8
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = sub nsw i32 %14, 1
%16 = load i32, i32* %7
%17 = sub nsw i32 %15, %16
%18 = ashr i32 %13, %17
%19 = and i32 %18, 1
%20 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %19)
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
store i32 %22, i32* %7
br label %8
23: ; preds = %8
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @Print_Bits(i32 %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %14
5: ; preds = %3, %5
%6 = phi i32 [ %12, %5 ], [ 0, %3 ]
%7 = xor i32 %6, -1
%8 = add i32 %7, %1
%9 = lshr i32 %0, %8
%10 = and i32 %9, 1
%11 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %10)
%12 = add nuw nsw i32 %6, 1
%13 = icmp eq i32 %12, %2
br i1 %13, label %14, label %5
14: ; preds = %5, %3
ret void
}
int test_imm_10uint16_reg(unsigned short val) {
  return ((val) & (-0x10 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_10uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xfffffff0,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_10uint16_reg>:
cmp    $0x10,%di
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_10uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -16
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_10uint16_reg(i16 zeroext %0) {
%2 = icmp ult i16 %0, 16
%3 = select i1 %2, i32 -40, i32 -20
ret i32 %3
}
/* Variables and functions */
bool nrf52_errata_23(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_23>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_23>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_23() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_23() {
ret i32 0
}
void XSyncSetCounter() {}


x86 assembly (clang, -O0):
<XSyncSetCounter>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XSyncSetCounter>:
ret

LLVM IR (-O0):
define void @XSyncSetCounter() {
ret void
}

LLVM IR (-O2):
define void @XSyncSetCounter() {
ret void
}