xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ sprintf(char *, char *, char *, int const);
FILE *measure_stream_open(char *name, const int online_cpus) {
  char filename[100];
  if (!name)
    return NULL;
  sprintf(filename, "out_%s_%d", name, online_cpus);
  return fopen(filename, "w");
}


x86 assembly (clang, -O0):
<measure_stream_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114a <measure_stream_open+0x2a>
movq   $0x0,-0x8(%rbp)
jmp    1175 <measure_stream_open+0x55>
lea    -0x80(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
lea    0xea4(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x80(%rbp),%rdi
lea    0xe9e(%rip),%rsi
call   1030 <fopen@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<measure_stream_open>:
test   %rdi,%rdi
je     1156 <measure_stream_open+0x36>
push   %rbx
sub    $0x70,%rsp
mov    %esi,%ecx
mov    %rdi,%rdx
lea    0xeca(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <sprintf@plt>
lea    0xec2(%rip),%rsi
mov    %rbx,%rdi
call   1030 <fopen@plt>
add    $0x70,%rsp
pop    %rbx
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [10 x i8] c"out_%s_%d\00"
@.str.1 = [2 x i8] c"w\00"
define i32* @measure_stream_open(i8* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca [100 x i8]
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %10, label %9
9: ; preds = %2
store i32* null, i32** %3
br label %17
10: ; preds = %2
%11 = getelementptr inbounds [100 x i8], [100 x i8]* %6, i64 0, i64 0
%12 = load i8*, i8** %4
%13 = load i32, i32* %5
%14 = call i32 @sprintf(i8* %11, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %12, i32 %13)
%15 = getelementptr inbounds [100 x i8], [100 x i8]* %6, i64 0, i64 0
%16 = call i32* @fopen(i8* %15, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %16, i32** %3
br label %17
17: ; preds = %10, %9
%18 = load i32*, i32** %3
ret i32* %18
}

LLVM IR (-O2):
@.str = [10 x i8] c"out_%s_%d\00"
@.str.1 = [2 x i8] c"w\00"
define noalias i32* @measure_stream_open(i8* %0, i32 %1) {
%3 = alloca [100 x i8]
%4 = getelementptr inbounds [100 x i8], [100 x i8]* %3, i64 0, i64 0
%5 = icmp eq i8* %0, null
br i1 %5, label %9, label %6
6: ; preds = %2
%7 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
%8 = call i32* @fopen(i8* %4, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
br label %9
9: ; preds = %2, %6
%10 = phi i32* [ %8, %6 ], [ null, %2 ]
ret i32* %10
}
void gtk_combo_box_get_popup_accessible() {}


x86 assembly (clang, -O0):
<gtk_combo_box_get_popup_accessible>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_combo_box_get_popup_accessible>:
ret

LLVM IR (-O0):
define void @gtk_combo_box_get_popup_accessible() {
ret void
}

LLVM IR (-O2):
define void @gtk_combo_box_get_popup_accessible() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
void play_start(int32_t trytofeed) {}


x86 assembly (clang, -O0):
<play_start>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<play_start>:
ret

LLVM IR (-O0):
define void @play_start(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @play_start(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _uart_putc(char);
void _puts(char *s) {
  while (*s != '\0') {
    _uart_putc(*s);
    s++;
  }
}


x86 assembly (clang, -O0):
<_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1149 <_puts+0x39>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <_uart_putc@plt>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <_puts+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_puts>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <_puts+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <_uart_putc@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <_puts+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @_puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = call i32 @_uart_putc(i8 signext %10)
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %2
br label %3
14: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @_puts(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = tail call i32 @_uart_putc(i8 signext %5)
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
void sunras_image_decode(FILE *inf) {}


x86 assembly (clang, -O0):
<sunras_image_decode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sunras_image_decode>:
ret

LLVM IR (-O0):
define void @sunras_image_decode(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @sunras_image_decode(i32* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
char *lua_getstring(int /*<<< orphan*/);
int /*<<< orphan*/ lua_lua2C(int);
int /*<<< orphan*/ lua_printstack(int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void errorfb(void) {
  fprintf(stderr, "lua: %s\n", lua_getstring(lua_lua2C(1)));
  lua_printstack(stderr);
}


x86 assembly (clang, -O0):
<errorfb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2e91(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    $0x1,%edi
call   1060 <lua_lua2C@plt>
mov    %eax,%edi
call   1030 <lua_getstring@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rdx
lea    0xe8e(%rip),%rsi
call   1040 <fprintf@plt>
mov    0x2e62(%rip),%rax
mov    (%rax),%edi
call   1050 <lua_printstack@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<errorfb>:
push   %r14
push   %rbx
push   %rax
mov    0x2e95(%rip),%r14
mov    (%r14),%ebx
mov    $0x1,%edi
call   1060 <lua_lua2C@plt>
mov    %eax,%edi
call   1030 <lua_getstring@plt>
lea    0xe9a(%rip),%rsi
mov    %ebx,%edi
mov    %rax,%rdx
call   1040 <fprintf@plt>
mov    (%r14),%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1050 <lua_printstack@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [9 x i8] c"lua: %s\0A\00"
define void @errorfb() {
%1 = load i32, i32* @stderr
%2 = call i32 @lua_lua2C(i32 1)
%3 = call i8* @lua_getstring(i32 %2)
%4 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = load i32, i32* @stderr
%6 = call i32 @lua_printstack(i32 %5)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [9 x i8] c"lua: %s\0A\00"
define void @errorfb() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @lua_lua2C(i32 1)
%3 = tail call i8* @lua_getstring(i32 %2)
%4 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = load i32, i32* @stderr
%6 = tail call i32 @lua_printstack(i32 %5)
ret void
}
int intless(int a, int b) { return a < b; }


x86 assembly (clang, -O0):
<intless>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intless>:
xor    %eax,%eax
cmp    %esi,%edi
setl   %al
ret

LLVM IR (-O0):
define i32 @intless(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @intless(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
void McASPDITChanUsrDataWrite(unsigned int baseAddr, unsigned int chUsrDataBits,
                              unsigned int channel, unsigned int data) {
  if ((0x000000F0) & channel) {
    (*((volatile unsigned int *)(baseAddr + (0x130 + (chUsrDataBits * 4))))) =
        data;
  }
  if ((0x0000000F) & channel) {
    (*((volatile unsigned int *)(baseAddr + (0x148 + (chUsrDataBits * 4))))) =
        data;
  }
}


x86 assembly (clang, -O0):
<McASPDITChanUsrDataWrite>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
and    $0xf0,%eax
cmp    $0x0,%eax
je     1139 <McASPDITChanUsrDataWrite+0x39>
mov    -0x10(%rbp),%ecx
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%edx
shl    $0x2,%edx
add    $0x130,%edx
add    %edx,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
and    $0xf,%eax
cmp    $0x0,%eax
je     1160 <McASPDITChanUsrDataWrite+0x60>
mov    -0x10(%rbp),%ecx
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%edx
shl    $0x2,%edx
add    $0x148,%edx
add    %edx,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<McASPDITChanUsrDataWrite>:
test   $0xf0,%dl
je     110f <McASPDITChanUsrDataWrite+0xf>
lea    (%rdi,%rsi,4),%eax
add    $0x130,%eax
mov    %ecx,(%rax)
test   $0xf,%dl
je     111e <McASPDITChanUsrDataWrite+0x1e>
lea    (%rdi,%rsi,4),%eax
add    $0x148,%eax
mov    %ecx,(%rax)
ret

LLVM IR (-O0):
define void @McASPDITChanUsrDataWrite(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %7
%10 = and i32 240, %9
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %21
12: ; preds = %4
%13 = load i32, i32* %8
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = mul i32 %15, 4
%17 = add i32 304, %16
%18 = add i32 %14, %17
%19 = zext i32 %18 to i64
%20 = inttoptr i64 %19 to i32*
store volatile i32 %13, i32* %20
br label %21
21: ; preds = %12, %4
%22 = load i32, i32* %7
%23 = and i32 15, %22
%24 = icmp ne i32 %23, 0
br i1 %24, label %25, label %34
25: ; preds = %21
%26 = load i32, i32* %8
%27 = load i32, i32* %5
%28 = load i32, i32* %6
%29 = mul i32 %28, 4
%30 = add i32 328, %29
%31 = add i32 %27, %30
%32 = zext i32 %31 to i64
%33 = inttoptr i64 %32 to i32*
store volatile i32 %26, i32* %33
br label %34
34: ; preds = %25, %21
ret void
}

LLVM IR (-O2):
define void @McASPDITChanUsrDataWrite(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = and i32 %2, 240
%6 = icmp eq i32 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %4
%8 = shl i32 %1, 2
%9 = add i32 %0, 304
%10 = add i32 %9, %8
%11 = zext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
store volatile i32 %3, i32* %12
br label %13
13: ; preds = %7, %4
%14 = and i32 %2, 15
%15 = icmp eq i32 %14, 0
br i1 %15, label %22, label %16
16: ; preds = %13
%17 = shl i32 %1, 2
%18 = add i32 %0, 328
%19 = add i32 %18, %17
%20 = zext i32 %19 to i64
%21 = inttoptr i64 %20 to i32*
store volatile i32 %3, i32* %21
br label %22
22: ; preds = %16, %13
ret void
}
void writeDisplayCharacterAtIndex(int *sevenSegmentCharBitSequence,
                                  int baseAddr, int bitIndex) {
  if (!sevenSegmentCharBitSequence)
    return;
  int writeAddr = baseAddr;
  for (int i = 0; i < 7; ++i) {
  }
}


x86 assembly (clang, -O0):
<writeDisplayCharacterAtIndex>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    111e <writeDisplayCharacterAtIndex+0x1e>
jmp    1148 <writeDisplayCharacterAtIndex+0x48>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
cmpl   $0x7,-0x18(%rbp)
jge    1148 <writeDisplayCharacterAtIndex+0x48>
jmp    113a <writeDisplayCharacterAtIndex+0x3a>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    112b <writeDisplayCharacterAtIndex+0x2b>
pop    %rbp
ret

x86 assembly (clang, -O2):
<writeDisplayCharacterAtIndex>:
ret

LLVM IR (-O0):
define void @writeDisplayCharacterAtIndex(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i32*, i32** %4
%10 = icmp ne i32* %9, null
br i1 %10, label %12, label %11
11: ; preds = %3
br label %21
12: ; preds = %3
%13 = load i32, i32* %5
store i32 %13, i32* %7
store i32 0, i32* %8
br label %14
14: ; preds = %18, %12
%15 = load i32, i32* %8
%16 = icmp slt i32 %15, 7
br i1 %16, label %17, label %21
17: ; preds = %14
br label %18
18: ; preds = %17
%19 = load i32, i32* %8
%20 = add nsw i32 %19, 1
store i32 %20, i32* %8
br label %14
21: ; preds = %11, %14
ret void
}

LLVM IR (-O2):
define void @writeDisplayCharacterAtIndex(i32* nocapture %0, i32 %1, i32 %2) {
ret void
}
/* Type definitions */
typedef int __m64;

/* Variables and functions */
__m64 __attribute__((__always___, __nodebug__))
_mm_andnot_si64(__m64 __m1, __m64 __m2) {
  return ~__m1 & __m2;
}


x86 assembly (clang, -O0):
<_mm_andnot_si64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
and    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mm_andnot_si64>:
mov    %edi,%eax
not    %eax
and    %esi,%eax
ret

LLVM IR (-O0):
define i32 @_mm_andnot_si64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = xor i32 %5, -1
%7 = load i32, i32* %4
%8 = and i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @_mm_andnot_si64(i32 %0, i32 %1) {
%3 = xor i32 %0, -1
%4 = and i32 %3, %1
ret i32 %4
}
void WatchdogUnlock(unsigned long ulBase) {
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000C00))) = 0x1ACCE551;
}


x86 assembly (clang, -O0):
<WatchdogUnlock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movq   $0x1acce551,0xc00(%rax)
51 e5 cc 1a
pop    %rbp
ret

x86 assembly (clang, -O2):
<WatchdogUnlock>:
movq   $0x1acce551,0xc00(%rdi)
51 e5 cc 1a
ret

LLVM IR (-O0):
define void @WatchdogUnlock(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 3072
%5 = inttoptr i64 %4 to i64*
store volatile i64 449635665, i64* %5
ret void
}

LLVM IR (-O2):
define void @WatchdogUnlock(i64 %0) {
%2 = add i64 %0, 3072
%3 = inttoptr i64 %2 to i64*
store volatile i64 449635665, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lcd_cmd(int);
int /*<<< orphan*/ wait_ms(int);
void lcd_clear() {
  lcd_cmd(0x01);
  wait_ms(2);
}


x86 assembly (clang, -O0):
<lcd_clear>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1040 <lcd_cmd@plt>
mov    $0x2,%edi
call   1030 <wait_ms@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcd_clear>:
push   %rax
mov    $0x1,%edi
call   1040 <lcd_cmd@plt>
mov    $0x2,%edi
pop    %rax
jmp    1030 <wait_ms@plt>

LLVM IR (-O0):
define void @lcd_clear() {
%1 = call i32 @lcd_cmd(i32 1)
%2 = call i32 @wait_ms(i32 2)
ret void
}

LLVM IR (-O2):
define void @lcd_clear() {
%1 = tail call i32 @lcd_cmd(i32 1)
%2 = tail call i32 @wait_ms(i32 2)
ret void
}
void g_queue_pop_head_link() {}


x86 assembly (clang, -O0):
<g_queue_pop_head_link>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_queue_pop_head_link>:
ret

LLVM IR (-O0):
define void @g_queue_pop_head_link() {
ret void
}

LLVM IR (-O2):
define void @g_queue_pop_head_link() {
ret void
}
void foo415() {}


x86 assembly (clang, -O0):
<foo415>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo415>:
ret

LLVM IR (-O0):
define void @foo415() {
ret void
}

LLVM IR (-O2):
define void @foo415() {
ret void
}
/* Variables and functions */
int cdrom_sysctl_register();
int cdrom_init(void) {
  int ret;
  ret = cdrom_sysctl_register();
  return ret;
}


x86 assembly (clang, -O0):
<cdrom_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <cdrom_sysctl_register@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cdrom_init>:
xor    %eax,%eax
jmp    1030 <cdrom_sysctl_register@plt>

LLVM IR (-O0):
define i32 @cdrom_init() {
%1 = alloca i32
%2 = call i32 (...) @cdrom_sysctl_register()
store i32 %2, i32* %1
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @cdrom_init() {
%1 = tail call i32 (...) @cdrom_sysctl_register()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ Do(int);
int /*<<< orphan*/ printf(char *);
void bar(int i) {
  printf("bar\n");
  Do(i);
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%edi
call   1040 <Do@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
call   1030 <puts@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <Do@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"bar\0A\00"
define void @bar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* %2
%5 = call i32 @Do(i32 %4)
ret void
}

LLVM IR (-O2):
@str = [4 x i8] c"bar\00"
define void @bar(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @Do(i32 %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
struct tm *gmtime(int /*<<< orphan*/ *);
int /*<<< orphan*/ strftime(char *, int, char *, struct tm *);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int get_datetime(char *buffer) {
  time_t current_time;
  struct tm *ptm;
  time(&current_time);
  ptm = gmtime(&current_time);
  if (ptm == NULL) {
    return -1;
  }
  strftime(buffer, 36, "%a, %d %b %G %T GMT", ptm);
  return 0;
}


x86 assembly (clang, -O0):
<get_datetime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
lea    -0x14(%rbp),%rdi
call   1030 <time@plt>
lea    -0x14(%rbp),%rdi
call   1050 <gmtime@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1169 <get_datetime+0x39>
movl   $0xffffffff,-0x4(%rbp)
jmp    1189 <get_datetime+0x59>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rcx
mov    $0x24,%esi
lea    0xe83(%rip),%rdx
call   1040 <strftime@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_datetime>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
lea    0x4(%rsp),%rbx
mov    %rbx,%rdi
call   1030 <time@plt>
mov    %rbx,%rdi
call   1050 <gmtime@plt>
test   %rax,%rax
je     116c <get_datetime+0x3c>
lea    0xea8(%rip),%rdx
mov    %r14,%rdi
mov    $0x24,%esi
mov    %rax,%rcx
call   1040 <strftime@plt>
xor    %eax,%eax
jmp    1171 <get_datetime+0x41>
mov    $0xffffffff,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
@.str = [20 x i8] c"%a, %d %b %G %T GMT\00"
define i32 @get_datetime(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
%5 = alloca %struct.tm*
store i8* %0, i8** %3
%6 = call i32 @time(i32* %4)
%7 = call %struct.tm* @gmtime(i32* %4)
store %struct.tm* %7, %struct.tm** %5
%8 = load %struct.tm*, %struct.tm** %5
%9 = icmp eq %struct.tm* %8, null
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 -1, i32* %2
br label %15
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = load %struct.tm*, %struct.tm** %5
%14 = call i32 @strftime(i8* %12, i32 36, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), %struct.tm* %13)
store i32 0, i32* %2
br label %15
15: ; preds = %11, %10
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
%struct.tm = type { i32 }
@.str = [20 x i8] c"%a, %d %b %G %T GMT\00"
define i32 @get_datetime(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @time(i32* %2)
%5 = call %struct.tm* @gmtime(i32* %2)
%6 = icmp eq %struct.tm* %5, null
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = call i32 @strftime(i8* %0, i32 36, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), %struct.tm* %5)
br label %9
9: ; preds = %1, %7
%10 = phi i32 [ 0, %7 ], [ -1, %1 ]
ret i32 %10
}
int test_imm_93uint8_mem(unsigned char *val) {
  return ((*val) & (-0x93 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_93uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffff6d,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_93uint8_mem>:
testb  $0x6d,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_93uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -147
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_93uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 109
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
extern int foo(void) { return 23; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    $0x17,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    $0x17,%eax
ret

LLVM IR (-O0):
define i32 @foo() {
ret i32 23
}

LLVM IR (-O2):
define i32 @foo() {
ret i32 23
}
int arm64_bpf_fixup_exception(const struct exception_table_entry *ex,
                              struct pt_regs *regs) {
  return 0;
}


x86 assembly (clang, -O0):
<arm64_bpf_fixup_exception>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm64_bpf_fixup_exception>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.exception_table_entry = type opaque
%struct.pt_regs = type opaque
define i32 @arm64_bpf_fixup_exception(%struct.exception_table_entry* %0, %struct.pt_regs* %1) {
%3 = alloca %struct.exception_table_entry*
%4 = alloca %struct.pt_regs*
store %struct.exception_table_entry* %0, %struct.exception_table_entry** %3
store %struct.pt_regs* %1, %struct.pt_regs** %4
ret i32 0
}

LLVM IR (-O2):
%struct.exception_table_entry = type opaque
%struct.pt_regs = type opaque
define i32 @arm64_bpf_fixup_exception(%struct.exception_table_entry* nocapture readnone %0, %struct.pt_regs* nocapture readnone %1) {
ret i32 0
}
/* Type definitions */
struct event_base {
  int dummy;
};
struct ev_loop {
  int dummy;
};

/* Variables and functions */
struct ev_loop *ev_default_loop(int);
int /*<<< orphan*/ ev_loop_destroy(struct ev_loop *);
void event_base_free(struct event_base *base) {
  struct ev_loop *loop = (struct ev_loop *)base;
  if (ev_default_loop(0x00000000U) != loop)
    ev_loop_destroy(loop);
}


x86 assembly (clang, -O0):
<event_base_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
xor    %edi,%edi
call   1040 <ev_default_loop@plt>
cmp    -0x10(%rbp),%rax
je     114e <event_base_free+0x2e>
mov    -0x10(%rbp),%rdi
call   1030 <ev_loop_destroy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_base_free>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
call   1040 <ev_default_loop@plt>
cmp    %rbx,%rax
je     1139 <event_base_free+0x19>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <ev_loop_destroy@plt>
pop    %rbx
ret

LLVM IR (-O0):
%struct.event_base = type { i32 }
%struct.ev_loop = type { i32 }
define void @event_base_free(%struct.event_base* %0) {
%2 = alloca %struct.event_base*
%3 = alloca %struct.ev_loop*
store %struct.event_base* %0, %struct.event_base** %2
%4 = load %struct.event_base*, %struct.event_base** %2
%5 = bitcast %struct.event_base* %4 to %struct.ev_loop*
store %struct.ev_loop* %5, %struct.ev_loop** %3
%6 = call %struct.ev_loop* @ev_default_loop(i32 0)
%7 = load %struct.ev_loop*, %struct.ev_loop** %3
%8 = icmp ne %struct.ev_loop* %6, %7
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load %struct.ev_loop*, %struct.ev_loop** %3
%11 = call i32 @ev_loop_destroy(%struct.ev_loop* %10)
br label %12
12: ; preds = %9, %1
ret void
}

LLVM IR (-O2):
%struct.event_base = type { i32 }
%struct.ev_loop = type { i32 }
define void @event_base_free(%struct.event_base* %0) {
%2 = bitcast %struct.event_base* %0 to %struct.ev_loop*
%3 = tail call %struct.ev_loop* @ev_default_loop(i32 0)
%4 = icmp eq %struct.ev_loop* %3, %2
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 @ev_loop_destroy(%struct.ev_loop* %2)
br label %7
7: ; preds = %5, %1
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void uDMAEnable(void) { (*((volatile uint32_t *)(0x400FF004))) = 0x00000001; }


x86 assembly (clang, -O0):
<uDMAEnable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400ff004,%eax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<uDMAEnable>:
movl   $0x1,0x400ff004
ret

LLVM IR (-O0):
define void @uDMAEnable() {
store volatile i32 1, i32* inttoptr (i64 1074786308 to i32*)
ret void
}

LLVM IR (-O2):
define void @uDMAEnable() {
store volatile i32 1, i32* inttoptr (i64 1074786308 to i32*)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ int8_t;

/* Variables and functions */
int __int8_t_decode_array(void const *, int /*<<< orphan*/, int /*<<< orphan*/,
                          int /*<<< orphan*/ *, int /*<<< orphan*/);
int __int8_t_decode_little_endian_array(const void *_buf, uint32_t offset,
                                        uint32_t maxlen, int8_t *p,
                                        uint32_t elements) {
  return __int8_t_decode_array(_buf, offset, maxlen, p, elements);
}


x86 assembly (clang, -O0):
<__int8_t_decode_little_endian_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    -0x1c(%rbp),%r8d
call   1030 <__int8_t_decode_array@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__int8_t_decode_little_endian_array>:
jmp    1030 <__int8_t_decode_array@plt>

LLVM IR (-O0):
define i32 @__int8_t_decode_little_endian_array(i8* %0, i32 %1, i32 %2, i32* %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32*
%10 = alloca i32
store i8* %0, i8** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32* %3, i32** %9
store i32 %4, i32* %10
%11 = load i8*, i8** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32*, i32** %9
%15 = load i32, i32* %10
%16 = call i32 @__int8_t_decode_array(i8* %11, i32 %12, i32 %13, i32* %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @__int8_t_decode_little_endian_array(i8* %0, i32 %1, i32 %2, i32* %3, i32 %4) {
%6 = tail call i32 @__int8_t_decode_array(i8* %0, i32 %1, i32 %2, i32* %3, i32 %4)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char const *);
void assert(int condition, const char *message) {
  if (!condition) {
    printf("%s\n", message);
    exit(1);
  }
}


x86 assembly (clang, -O0):
<assert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1153 <assert+0x33>
mov    -0x10(%rbp),%rsi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assert>:
test   %edi,%edi
je     1125 <assert+0x5>
ret
push   %rax
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @assert(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %2
%8 = load i8*, i8** %4
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %8)
%10 = call i32 @exit(i32 1)
unreachable
11: ; preds = %2
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @assert(i32 %0, i8* %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %1)
%6 = tail call i32 @exit(i32 1)
unreachable
7: ; preds = %2
ret void
}
int adfIsLeap(int y) { return ((int)(!(y % 100) ? !(y % 400) : !(y % 4))); }


x86 assembly (clang, -O0):
<adfIsLeap>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    113b <adfIsLeap+0x3b>
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
jmp    1156 <adfIsLeap+0x56>
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adfIsLeap>:
imul   $0xc28f5c29,%edi,%eax
add    $0x51eb850,%eax
ror    $0x2,%eax
cmp    $0x28f5c28,%eax
jbe    111a <adfIsLeap+0x1a>
and    $0x3,%edi
jmp    1139 <adfIsLeap+0x39>
movslq %edi,%rax
imul   $0x51eb851f,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x27,%rax
add    %ecx,%eax
imul   $0x190,%eax,%eax
sub    %eax,%edi
xor    %eax,%eax
test   %edi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @adfIsLeap(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 100
%5 = icmp ne i32 %4, 0
br i1 %5, label %12, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = srem i32 %7, 400
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
%11 = zext i1 %10 to i32
br label %18
12: ; preds = %1
%13 = load i32, i32* %2
%14 = srem i32 %13, 4
%15 = icmp ne i32 %14, 0
%16 = xor i1 %15, true
%17 = zext i1 %16 to i32
br label %18
18: ; preds = %12, %6
%19 = phi i32 [ %11, %6 ], [ %17, %12 ]
ret i32 %19
}

LLVM IR (-O2):
define i32 @adfIsLeap(i32 %0) {
%2 = srem i32 %0, 100
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = srem i32 %0, 400
br label %8
6: ; preds = %1
%7 = and i32 %0, 3
br label %8
8: ; preds = %6, %4
%9 = phi i32 [ %5, %4 ], [ %7, %6 ]
%10 = icmp eq i32 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}
int blog(int x) {
  int l = 0;
  while (x) {
    x >>= 1;
    l++;
  }
  return l;
}


x86 assembly (clang, -O0):
<blog>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     112f <blog+0x2f>
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <blog+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<blog>:
xor    %eax,%eax
test   %edi,%edi
je     111c <blog+0x1c>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
sar    %ecx
add    $0x1,%eax
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <blog+0x10>
ret

LLVM IR (-O0):
define i32 @blog(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %2
%9 = ashr i32 %8, 1
store i32 %9, i32* %2
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @blog(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = ashr i32 %5, 1
%7 = add nuw nsw i32 %4, 1
%8 = icmp ult i32 %5, 2
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ calloc(size_t, size_t);
void *not_null_or_die(int /*<<< orphan*/);
void *calloc_or_die(size_t count, size_t element_size) {
  return not_null_or_die(calloc(count, element_size));
}


x86 assembly (clang, -O0):
<calloc_or_die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <calloc@plt>
mov    %eax,%edi
call   1040 <not_null_or_die@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calloc_or_die>:
push   %rax
call   1030 <calloc@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <not_null_or_die@plt>

LLVM IR (-O0):
define i8* @calloc_or_die(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i32 @calloc(i64 %5, i64 %6)
%8 = call i8* @not_null_or_die(i32 %7)
ret i8* %8
}

LLVM IR (-O2):
define i8* @calloc_or_die(i64 %0, i64 %1) {
%3 = tail call i32 @calloc(i64 %0, i64 %1)
%4 = tail call i8* @not_null_or_die(i32 %3)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int serialport_close(int fd) {
  if (fd > 0)
    close(fd);
  return 0;
}


x86 assembly (clang, -O0):
<serialport_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    112d <serialport_close+0x1d>
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serialport_close>:
test   %edi,%edi
jle    111e <serialport_close+0xe>
push   %rax
call   1030 <close@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @serialport_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = call i32 @close(i32 %6)
br label %8
8: ; preds = %5, %1
ret i32 0
}

LLVM IR (-O2):
define i32 @serialport_close(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @close(i32 %0)
br label %5
5: ; preds = %3, %1
ret i32 0
}
int main(int argc) { return 1; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %2
store i32 %0, i32* %3
ret i32 1
}

LLVM IR (-O2):
define i32 @main(i32 %0) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned int, char *);
scalar_t__ pthread_self();
void print_formatted(char *message) {
  printf("[thread %u] %s\n", (unsigned int)pthread_self(), message);
}


x86 assembly (clang, -O0):
<print_formatted>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <pthread_self@plt>
mov    %eax,%esi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_formatted>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <pthread_self@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
mov    %rbx,%rdx
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"[thread %u] %s\0A\00"
define void @print_formatted(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i64 (...) @pthread_self()
%4 = trunc i64 %3 to i32
%5 = load i8*, i8** %2
%6 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %4, i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"[thread %u] %s\0A\00"
define void @print_formatted(i8* %0) {
%2 = tail call i64 (...) @pthread_self()
%3 = trunc i64 %2 to i32
%4 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %3, i8* %0)
ret void
}
void foo178() {}


x86 assembly (clang, -O0):
<foo178>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo178>:
ret

LLVM IR (-O0):
define void @foo178() {
ret void
}

LLVM IR (-O2):
define void @foo178() {
ret void
}
/* Type definitions */
struct tml_stream {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ stream_memzero(struct tml_stream *);
void tml_stream_close(struct tml_stream *stream) {
  if (stream)
    stream_memzero(stream);
}


x86 assembly (clang, -O0):
<tml_stream_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <tml_stream_close+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <stream_memzero@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tml_stream_close>:
test   %rdi,%rdi
je     111a <tml_stream_close+0xa>
jmp    1030 <stream_memzero@plt>
ret

LLVM IR (-O0):
%struct.tml_stream = type { i32 }
define void @tml_stream_close(%struct.tml_stream* %0) {
%2 = alloca %struct.tml_stream*
store %struct.tml_stream* %0, %struct.tml_stream** %2
%3 = load %struct.tml_stream*, %struct.tml_stream** %2
%4 = icmp ne %struct.tml_stream* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load %struct.tml_stream*, %struct.tml_stream** %2
%7 = call i32 @stream_memzero(%struct.tml_stream* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
%struct.tml_stream = type { i32 }
define void @tml_stream_close(%struct.tml_stream* %0) {
%2 = icmp eq %struct.tml_stream* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @stream_memzero(%struct.tml_stream* %0)
br label %5
5: ; preds = %3, %1
ret void
}
void ostrcpy(char *s1, char *s2) {
  if (s2 > s1) {
    while (*s2)
      *s1++ = *s2++;
    *s1 = '\0';
  }
}


x86 assembly (clang, -O0):
<ostrcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x8(%rbp),%rax
jbe    115a <ostrcpy+0x5a>
jmp    111f <ostrcpy+0x1f>
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1153 <ostrcpy+0x53>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
jmp    111f <ostrcpy+0x1f>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ostrcpy>:
cmp    %rdi,%rsi
jbe    1124 <ostrcpy+0x24>
mov    (%rsi),%al
test   %al,%al
je     1121 <ostrcpy+0x21>
add    $0x1,%rsi
nop
mov    %al,(%rdi)
add    $0x1,%rdi
movzbl (%rsi),%eax
add    $0x1,%rsi
test   %al,%al
jne    1110 <ostrcpy+0x10>
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @ostrcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i8*, i8** %3
%7 = icmp ugt i8* %5, %6
br i1 %7, label %8, label %21
8: ; preds = %2
br label %9
9: ; preds = %13, %8
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %19
13: ; preds = %9
%14 = load i8*, i8** %4
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %4
%16 = load i8, i8* %14
%17 = load i8*, i8** %3
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %3
store i8 %16, i8* %17
br label %9
19: ; preds = %9
%20 = load i8*, i8** %3
store i8 0, i8* %20
br label %21
21: ; preds = %19, %2
ret void
}

LLVM IR (-O2):
define void @ostrcpy(i8* writeonly %0, i8* %1) {
%3 = icmp ugt i8* %1, %0
br i1 %3, label %4, label %17
4: ; preds = %2
%5 = load i8, i8* %1
%6 = icmp eq i8 %5, 0
br i1 %6, label %15, label %7
7: ; preds = %4, %7
%8 = phi i8 [ %13, %7 ], [ %5, %4 ]
%9 = phi i8* [ %11, %7 ], [ %1, %4 ]
%10 = phi i8* [ %12, %7 ], [ %0, %4 ]
%11 = getelementptr inbounds i8, i8* %9, i64 1
%12 = getelementptr inbounds i8, i8* %10, i64 1
store i8 %8, i8* %10
%13 = load i8, i8* %11
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %7
15: ; preds = %7, %4
%16 = phi i8* [ %0, %4 ], [ %12, %7 ]
store i8 0, i8* %16
br label %17
17: ; preds = %15, %2
ret void
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int lstat(char const *, struct stat *);
int unix_lstat(const char *fn, struct stat *s_p) { return lstat(fn, s_p); }


x86 assembly (clang, -O0):
<unix_lstat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <lstat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unix_lstat>:
jmp    1030 <lstat@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @unix_lstat(i8* %0, %struct.stat* %1) {
%3 = alloca i8*
%4 = alloca %struct.stat*
store i8* %0, i8** %3
store %struct.stat* %1, %struct.stat** %4
%5 = load i8*, i8** %3
%6 = load %struct.stat*, %struct.stat** %4
%7 = call i32 @lstat(i8* %5, %struct.stat* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @unix_lstat(i8* nocapture %0, %struct.stat* nocapture %1) {
%3 = tail call i32 @lstat(i8* %0, %struct.stat* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_12842() {
  Assert_real((isqrt(12842) == 113),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              1550, ("Integer square root of 12842 should be 113"));
}


x86 assembly (clang, -O0):
<t_sqrt_12842>:
push   %rbp
mov    %rsp,%rbp
mov    $0x322a,%edi
call   1030 <isqrt@plt>
cmp    $0x71,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0x60e,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_12842>:
push   %rax
mov    $0x322a,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0x71,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0x60e,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [43 x i8] c"Integer square root of 12842 should be 113\00"
define void @t_sqrt_12842() {
%1 = call i32 @isqrt(i32 12842)
%2 = icmp eq i32 %1, 113
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1550, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [43 x i8] c"Integer square root of 12842 should be 113\00"
define void @t_sqrt_12842() {
%1 = tail call i32 @isqrt(i32 12842)
%2 = icmp eq i32 %1, 113
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1550, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int syscon_quaddobl_one_affinization(void) {
  int fail, a, b;
  double c;
  fail = _ada_use_c2phc4c(903, &a, &b, &c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<syscon_quaddobl_one_affinization>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x387,%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x18(%rbp),%rcx
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscon_quaddobl_one_affinization>:
sub    $0x18,%rsp
lea    0xc(%rsp),%rsi
lea    0x8(%rsp),%rdx
lea    0x10(%rsp),%rcx
mov    $0x387,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @syscon_quaddobl_one_affinization() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca double
%5 = call i32 @_ada_use_c2phc4c(i32 903, i32* %2, i32* %3, double* %4, i32 0)
store i32 %5, i32* %1
%6 = load i32, i32* %1
ret i32 %6
}

LLVM IR (-O2):
define i32 @syscon_quaddobl_one_affinization() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca double
%4 = bitcast i32* %1 to i8*
%5 = bitcast i32* %2 to i8*
%6 = bitcast double* %3 to i8*
%7 = call i32 @_ada_use_c2phc4c(i32 903, i32* %1, i32* %2, double* %3, i32 0)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void __list_free(const void *ptr) { free((void *)ptr); }


x86 assembly (clang, -O0):
<__list_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__list_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @__list_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @__list_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
int fibo(int n) {
  if (n < 2)
    return n;
  if (n == 2)
    return 1;
  return fibo(n - 2) * 2 + fibo(n - 3);
}


x86 assembly (clang, -O0):
<fibo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    1130 <fibo+0x20>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    116c <fibo+0x5c>
cmpl   $0x2,-0x8(%rbp)
jne    1146 <fibo+0x36>
movl   $0x1,-0x4(%rbp)
jmp    116c <fibo+0x5c>
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fibo@plt>
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x3,%edi
call   1030 <fibo@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibo>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %r14d,%r14d
cmp    $0x2,%edi
jl     1154 <fibo+0x44>
xor    %r14d,%r14d
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
cmp    $0x2,%ebx
je     114f <fibo+0x3f>
lea    -0x2(%rbx),%edi
call   1030 <fibo@plt>
lea    -0x3(%rbx),%ecx
lea    (%r14,%rax,2),%r14d
cmp    $0x4,%ebx
mov    %ecx,%ebx
ja     1130 <fibo+0x20>
mov    %ecx,%ebx
jmp    1154 <fibo+0x44>
mov    $0x1,%ebx
add    %ebx,%r14d
mov    %r14d,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @fibo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 2
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %21
8: ; preds = %1
%9 = load i32, i32* %3
%10 = icmp eq i32 %9, 2
br i1 %10, label %11, label %12
11: ; preds = %8
store i32 1, i32* %2
br label %21
12: ; preds = %8
%13 = load i32, i32* %3
%14 = sub nsw i32 %13, 2
%15 = call i32 @fibo(i32 %14)
%16 = mul nsw i32 %15, 2
%17 = load i32, i32* %3
%18 = sub nsw i32 %17, 3
%19 = call i32 @fibo(i32 %18)
%20 = add nsw i32 %16, %19
store i32 %20, i32* %2
br label %21
21: ; preds = %12, %11, %6
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @fibo(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %14, label %3
3: ; preds = %1, %7
%4 = phi i32 [ %11, %7 ], [ %0, %1 ]
%5 = phi i32 [ %12, %7 ], [ 0, %1 ]
%6 = icmp eq i32 %4, 2
br i1 %6, label %14, label %7
7: ; preds = %3
%8 = add nsw i32 %4, -2
%9 = tail call i32 @fibo(i32 %8)
%10 = shl nsw i32 %9, 1
%11 = add nsw i32 %4, -3
%12 = add nsw i32 %10, %5
%13 = icmp ult i32 %4, 5
br i1 %13, label %14, label %3
14: ; preds = %7, %3, %1
%15 = phi i32 [ 0, %1 ], [ %5, %3 ], [ %12, %7 ]
%16 = phi i32 [ %0, %1 ], [ 1, %3 ], [ %11, %7 ]
%17 = add nsw i32 %16, %15
ret i32 %17
}