xunge/DecIR huggingface dataset:
int aa_pro_ctr_a02(int chan, unsigned char *buf, int len) {
  hu_log(6, "hu_aap", __func__, "!!!!!!!!");
  return (-1);
}


x86 assembly (clang, -O0):
<aa_pro_ctr_a02>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0x6,%edi
lea    0xed2(%rip),%rsi
lea    0xed2(%rip),%rdx
lea    0xeda(%rip),%rcx
mov    $0x0,%al
call   1030 <hu_log@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aa_pro_ctr_a02>:
push   %rax
lea    0xee8(%rip),%rsi
lea    0xee8(%rip),%rdx
lea    0xef0(%rip),%rcx
mov    $0x6,%edi
xor    %eax,%eax
call   1030 <hu_log@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"hu_aap\00"
@__func__.aa_pro_ctr_a02 = [15 x i8] c"aa_pro_ctr_a02\00"
@.str.1 = [9 x i8] c"!!!!!!!!\00"
define i32 @aa_pro_ctr_a02(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = call i32 (i32, i8*, i8*, i8*, ...) bitcast (i32 (...)* @hu_log to i32 (i32, i8*, i8*, i8*, ...)*)(i32 6, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([15 x i8], [15 x i8]* @__func__.aa_pro_ctr_a02, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@.str = [7 x i8] c"hu_aap\00"
@__func__.aa_pro_ctr_a02 = [15 x i8] c"aa_pro_ctr_a02\00"
@.str.1 = [9 x i8] c"!!!!!!!!\00"
define i32 @aa_pro_ctr_a02(i32 %0, i8* nocapture readnone %1, i32 %2) {
%4 = tail call i32 (i32, i8*, i8*, i8*, ...) bitcast (i32 (...)* @hu_log to i32 (i32, i8*, i8*, i8*, ...)*)(i32 6, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([15 x i8], [15 x i8]* @__func__.aa_pro_ctr_a02, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
ret i32 -1
}
/* Variables and functions */
unsigned int strlen(char const *);
scalar_t__ strncmp(char const *, char const *, unsigned int);
int hasprefix(const char *sample, const char *prefix) {
  unsigned prelen = strlen(prefix);
  if (strncmp(sample, prefix, prelen) == 0) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<hasprefix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
jne    1162 <hasprefix+0x42>
movl   $0x1,-0x4(%rbp)
jmp    1169 <hasprefix+0x49>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hasprefix>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <strncmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @hasprefix(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %5
%8 = call i32 @strlen(i8* %7)
store i32 %8, i32* %6
%9 = load i8*, i8** %4
%10 = load i8*, i8** %5
%11 = load i32, i32* %6
%12 = call i64 @strncmp(i8* %9, i8* %10, i32 %11)
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %2
store i32 1, i32* %3
br label %16
15: ; preds = %2
store i32 0, i32* %3
br label %16
16: ; preds = %15, %14
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @hasprefix(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i64 @strncmp(i8* %0, i8* %1, i32 %3)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
regx0adrreg1_set(r0, r1, x0, x1, p0, p1) int r0, r1;
int *p0, *p1;
{ (p0[x0]) = (p1[1111111 / 4]); }


x86 assembly (clang, -O0):
<regx0adrreg1_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    0x10f444(%rax),%edx
mov    -0x20(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<regx0adrreg1_set>:
mov    0x10f444(%r9),%eax
movslq %edx,%rcx
mov    %eax,(%r8,%rcx,4)
ret

LLVM IR (-O0):
define i32 @regx0adrreg1_set(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32*, i32** %13
%15 = getelementptr inbounds i32, i32* %14, i64 277777
%16 = load i32, i32* %15
%17 = load i32*, i32** %12
%18 = load i32, i32* %10
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, i32* %17, i64 %19
store i32 %16, i32* %20
%21 = load i32, i32* %7
ret i32 %21
}

LLVM IR (-O2):
define i32 @regx0adrreg1_set(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture writeonly %4, i32* nocapture %5) {
%7 = getelementptr inbounds i32, i32* %5, i64 277777
%8 = load i32, i32* %7
%9 = sext i32 %2 to i64
%10 = getelementptr inbounds i32, i32* %4, i64 %9
store i32 %8, i32* %10
ret i32 undef
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ message_type;
};
typedef TYPE_1__ XClientMessageEvent;

/* Variables and functions */
unsigned long get_XClientMessageEvent_message_type(void *_p) {
  return (unsigned long)((XClientMessageEvent *)_p)->message_type;
}


x86 assembly (clang, -O0):
<get_XClientMessageEvent_message_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XClientMessageEvent_message_type>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XClientMessageEvent_message_type(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XClientMessageEvent_message_type(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ PKCS7_ENC_CONTENT;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
scalar_t__ ASN1_item_d2i(int /*<<< orphan*/ **, unsigned char const **, long,
                         int /*<<< orphan*/ *);
int /*<<< orphan*/ PKCS7_ENC_CONTENT_it;
PKCS7_ENC_CONTENT *d2i_PKCS7_ENC_CONTENT(PKCS7_ENC_CONTENT **a,
                                         const unsigned char **in, long len) {
  return (PKCS7_ENC_CONTENT *)ASN1_item_d2i((ASN1_VALUE **)a, in, len,
                                            &PKCS7_ENC_CONTENT_it);
}


x86 assembly (clang, -O0):
<d2i_PKCS7_ENC_CONTENT>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    0x2ea9(%rip),%rcx
call   1030 <ASN1_item_d2i@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_PKCS7_ENC_CONTENT>:
mov    0x2ec9(%rip),%rcx
jmp    1030 <ASN1_item_d2i@plt>

LLVM IR (-O0):
@PKCS7_ENC_CONTENT_it = global i32 0
define i32* @d2i_PKCS7_ENC_CONTENT(i32** %0, i8** %1, i64 %2) {
%4 = alloca i32**
%5 = alloca i8**
%6 = alloca i64
store i32** %0, i32*** %4
store i8** %1, i8*** %5
store i64 %2, i64* %6
%7 = load i32**, i32*** %4
%8 = load i8**, i8*** %5
%9 = load i64, i64* %6
%10 = call i64 @ASN1_item_d2i(i32** %7, i8** %8, i64 %9, i32* @PKCS7_ENC_CONTENT_it)
%11 = inttoptr i64 %10 to i32*
ret i32* %11
}

LLVM IR (-O2):
@PKCS7_ENC_CONTENT_it = global i32 0
define i32* @d2i_PKCS7_ENC_CONTENT(i32** %0, i8** %1, i64 %2) {
%4 = tail call i64 @ASN1_item_d2i(i32** %0, i8** %1, i64 %2, i32* @PKCS7_ENC_CONTENT_it)
%5 = inttoptr i64 %4 to i32*
ret i32* %5
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int celcon_write_standard_random_coefficient_system(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(98, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<celcon_write_standard_random_coefficient_system>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x62,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<celcon_write_standard_random_coefficient_system>:
mov    $0x62,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @celcon_write_standard_random_coefficient_system() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 98, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @celcon_write_standard_random_coefficient_system() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 98, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
/* Variables and functions */
char *utoa(int, char *, int);
char *itoa(int value, char *str, int base) {
  if (value < 0) {
    str[0] = '-';
    return utoa(-value, str + 1, base);
  }
  return utoa(value, str, base);
}


x86 assembly (clang, -O0):
<itoa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    1151 <itoa+0x41>
mov    -0x18(%rbp),%rax
movb   $0x2d,(%rax)
xor    %edi,%edi
sub    -0xc(%rbp),%edi
mov    -0x18(%rbp),%rsi
add    $0x1,%rsi
mov    -0x1c(%rbp),%edx
call   1030 <utoa@plt>
mov    %rax,-0x8(%rbp)
jmp    1164 <itoa+0x54>
mov    -0xc(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <utoa@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<itoa>:
test   %edi,%edi
js     1119 <itoa+0x9>
jmp    1030 <utoa@plt>
movb   $0x2d,(%rsi)
neg    %edi
add    $0x1,%rsi
jmp    1030 <utoa@plt>

LLVM IR (-O0):
define i8* @itoa(i32 %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %19
10: ; preds = %3
%11 = load i8*, i8** %6
%12 = getelementptr inbounds i8, i8* %11, i64 0
store i8 45, i8* %12
%13 = load i32, i32* %5
%14 = sub nsw i32 0, %13
%15 = load i8*, i8** %6
%16 = getelementptr inbounds i8, i8* %15, i64 1
%17 = load i32, i32* %7
%18 = call i8* @utoa(i32 %14, i8* %16, i32 %17)
store i8* %18, i8** %4
br label %24
19: ; preds = %3
%20 = load i32, i32* %5
%21 = load i8*, i8** %6
%22 = load i32, i32* %7
%23 = call i8* @utoa(i32 %20, i8* %21, i32 %22)
store i8* %23, i8** %4
br label %24
24: ; preds = %19, %10
%25 = load i8*, i8** %4
ret i8* %25
}

LLVM IR (-O2):
define i8* @itoa(i32 %0, i8* %1, i32 %2) {
%4 = icmp slt i32 %0, 0
br i1 %4, label %5, label %9
5: ; preds = %3
store i8 45, i8* %1
%6 = sub nsw i32 0, %0
%7 = getelementptr inbounds i8, i8* %1, i64 1
%8 = tail call i8* @utoa(i32 %6, i8* %7, i32 %2)
br label %11
9: ; preds = %3
%10 = tail call i8* @utoa(i32 %0, i8* %1, i32 %2)
br label %11
11: ; preds = %9, %5
%12 = phi i8* [ %8, %5 ], [ %10, %9 ]
ret i8* %12
}
int oigit(int c) { return ('0' <= c && c <= '7'); }


x86 assembly (clang, -O0):
<oigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
mov    $0x30,%ecx
cmp    -0x4(%rbp),%ecx
mov    %al,-0x5(%rbp)
jg     1124 <oigit+0x24>
cmpl   $0x37,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<oigit>:
and    $0xfffffff8,%edi
xor    %eax,%eax
cmp    $0x30,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @oigit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 48, %3
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 55
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @oigit(i32 %0) {
%2 = and i32 %0, -8
%3 = icmp eq i32 %2, 48
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
size_t strlen(const char *s) {
  size_t len = 0;
  while (*s++)
    len++;
  return len;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,(%rax)
je     1139 <strlen+0x39>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <strlen+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
cmpb   $0x0,(%rdi)
je     111f <strlen+0x1f>
xor    %ecx,%ecx
nopw   0x0(%rax,%rax,1)
lea    0x1(%rcx),%rax
cmpb   $0x0,0x1(%rdi,%rcx,1)
mov    %rax,%rcx
jne    1110 <strlen+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = load i64, i64* %3
%11 = add i64 %10, 1
store i64 %11, i64* %3
br label %4
12: ; preds = %4
%13 = load i64, i64* %3
ret i64 %13
}

LLVM IR (-O2):
define i64 @strlen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add i64 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i64 [ 0, %1 ], [ %8, %4 ]
ret i64 %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage() {
  printf("Usage:\n"
         "\tindexclusters [OPTION]\n"
         "\nDescription:\n"
         "\tCreate indexes of given cluster(s).\n"
         "\nOptions:\n"
         "\t-n [COUNT]\n"
         "\t-c [CLUSTER_ID]\n"
         "\nNote:\n"
         "\tDefine 'cluster to doc id maps folder' and\n"
         "\t'collection documents vectors folder' inside code.\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [225 x i8] c"Usage:\0A\09indexclusters [OPTION]\0A\0ADescription:\0A\09Create indexes of given cluster(s).\0A\0AOptions:\0A\09-n [COUNT]\0A\09-c [CLUSTER_ID]\0A\0ANote:\0A\09Define 'cluster to doc id maps folder' and\0A\09'collection documents vectors folder' inside code.\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([225 x i8], [225 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [224 x i8] c"Usage:\0A\09indexclusters [OPTION]\0A\0ADescription:\0A\09Create indexes of given cluster(s).\0A\0AOptions:\0A\09-n [COUNT]\0A\09-c [CLUSTER_ID]\0A\0ANote:\0A\09Define 'cluster to doc id maps folder' and\0A\09'collection documents vectors folder' inside code.\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([224 x i8], [224 x i8]* @str, i64 0, i64 0))
ret void
}
int test_imm_65uint8_mem(unsigned char *val) {
  return ((*val) & (0x65 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_65uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0x65,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_65uint8_mem>:
testb  $0x65,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_65uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 101
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_65uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 101
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void SensorSetReg_FUJITSU(unsigned short uAddr, unsigned short uVal) {}


x86 assembly (clang, -O0):
<SensorSetReg_FUJITSU>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SensorSetReg_FUJITSU>:
ret

LLVM IR (-O0):
define void @SensorSetReg_FUJITSU(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
ret void
}

LLVM IR (-O2):
define void @SensorSetReg_FUJITSU(i16 zeroext %0, i16 zeroext %1) {
ret void
}
/* Variables and functions */
char EOF;
char getchar();
int /*<<< orphan*/ process_char(char);
int main(int argc, char *argv[]) {
  char buf;
  while ((buf = getchar()) != EOF) {
    process_char(buf);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <getchar@plt>
mov    %al,-0x11(%rbp)
movsbl %al,%eax
mov    0x2e9e(%rip),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
je     1163 <main+0x43>
movsbl -0x11(%rbp),%edi
call   1040 <process_char@plt>
jmp    1136 <main+0x16>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1030 <getchar@plt>
mov    0x2eb9(%rip),%rbx
cmp    (%rbx),%al
je     1153 <main+0x33>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movsbl %al,%edi
call   1040 <process_char@plt>
xor    %eax,%eax
call   1030 <getchar@plt>
cmp    (%rbx),%al
jne    1140 <main+0x20>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@EOF = global i8 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
br label %7
7: ; preds = %13, %2
%8 = call signext i8 (...) @getchar()
store i8 %8, i8* %6
%9 = sext i8 %8 to i32
%10 = load i8, i8* @EOF
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %9, %11
br i1 %12, label %13, label %16
13: ; preds = %7
%14 = load i8, i8* %6
%15 = call i32 @process_char(i8 signext %14)
br label %7
16: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
@EOF = global i8 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call signext i8 (...) @getchar()
%4 = load i8, i8* @EOF
%5 = icmp eq i8 %3, %4
br i1 %5, label %12, label %6
6: ; preds = %2, %6
%7 = phi i8 [ %9, %6 ], [ %3, %2 ]
%8 = tail call i32 @process_char(i8 signext %7)
%9 = tail call signext i8 (...) @getchar()
%10 = load i8, i8* @EOF
%11 = icmp eq i8 %9, %10
br i1 %11, label %12, label %6
12: ; preds = %6, %2
ret i32 0
}
/* Type definitions */
struct timeval {
  int tv_sec;
  long tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/);
long getutime() {
  struct timeval tv;
  gettimeofday(&tv, 0);
  return tv.tv_sec * 1000000 + tv.tv_usec;
}


x86 assembly (clang, -O0):
<getutime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x10(%rbp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
imul   $0xf4240,-0x10(%rbp),%eax
cltq
add    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getutime>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
movslq 0x8(%rsp),%rax
imul   $0xf4240,%rax,%rax
add    0x10(%rsp),%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i64 }
define i64 @getutime() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32 0)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load i32, i32* %3
%5 = mul nsw i32 %4, 1000000
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%8 = load i64, i64* %7
%9 = add nsw i64 %6, %8
ret i64 %9
}

LLVM IR (-O2):
%struct.timeval = type { i32, i64 }
define i64 @getutime() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32 0)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load i32, i32* %4
%6 = mul nsw i32 %5, 1000000
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%9 = load i64, i64* %8
%10 = add nsw i64 %9, %7
ret i64 %10
}
/* Variables and functions */
int PTHREAD_CANCEL_DISABLE;
int /*<<< orphan*/ __openlog(char const *, int, int);
int /*<<< orphan*/ pthread_setcancelstate(int, int *);
void openlog(const char *ident, int opt, int facility) {
  int cs;
  pthread_setcancelstate(PTHREAD_CANCEL_DISABLE, &cs);
  {};
  __openlog(ident, opt, facility);
  {};
  pthread_setcancelstate(cs, 0);
}


x86 assembly (clang, -O0):
<openlog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    0x2e9f(%rip),%rax
mov    (%rax),%edi
lea    -0x14(%rbp),%rsi
call   1040 <pthread_setcancelstate@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <__openlog@plt>
mov    -0x14(%rbp),%edi
xor    %eax,%eax
mov    %eax,%esi
call   1040 <pthread_setcancelstate@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<openlog>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%rbx
mov    0x2ea1(%rip),%rax
mov    (%rax),%edi
lea    0xc(%rsp),%rsi
call   1040 <pthread_setcancelstate@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <__openlog@plt>
mov    0xc(%rsp),%edi
xor    %esi,%esi
call   1040 <pthread_setcancelstate@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@PTHREAD_CANCEL_DISABLE = global i32 0
define void @openlog(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* @PTHREAD_CANCEL_DISABLE
%9 = call i32 @pthread_setcancelstate(i32 %8, i32* %7)
%10 = load i8*, i8** %4
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = call i32 @__openlog(i8* %10, i32 %11, i32 %12)
%14 = load i32, i32* %7
%15 = call i32 @pthread_setcancelstate(i32 %14, i32* null)
ret void
}

LLVM IR (-O2):
@PTHREAD_CANCEL_DISABLE = global i32 0
define void @openlog(i8* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = bitcast i32* %4 to i8*
%6 = load i32, i32* @PTHREAD_CANCEL_DISABLE
%7 = call i32 @pthread_setcancelstate(i32 %6, i32* %4)
%8 = call i32 @__openlog(i8* %0, i32 %1, i32 %2)
%9 = load i32, i32* %4
%10 = call i32 @pthread_setcancelstate(i32 %9, i32* null)
ret void
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t get_sa(int32_t instruction) { return (instruction & 0x000007c0) >> 6; }


x86 assembly (clang, -O0):
<get_sa>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x7c0,%eax
sar    $0x6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_sa>:
mov    %edi,%eax
shr    $0x6,%eax
and    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @get_sa(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 1984
%5 = ashr i32 %4, 6
ret i32 %5
}

LLVM IR (-O2):
define i32 @get_sa(i32 %0) {
%2 = lshr i32 %0, 6
%3 = and i32 %2, 31
ret i32 %3
}
/* Type definitions */
struct timeval {
  int tv_sec;
  int tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
double utc_now() {
  struct timeval t;
  gettimeofday(&t, NULL);
  return t.tv_sec * 1000 + t.tv_usec / 1000;
}


x86 assembly (clang, -O0):
<utc_now>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
imul   $0x3e8,-0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
cvtsi2sd %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<utc_now>:
push   %rax
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
imul   $0x3e8,(%rsp),%eax
movslq 0x4(%rsp),%rcx
imul   $0x10624dd3,%rcx,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rcx
add    %edx,%ecx
add    %eax,%ecx
cvtsi2sd %ecx,%xmm0
pop    %rax
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define double @utc_now() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load i32, i32* %3
%5 = mul nsw i32 %4, 1000
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%7 = load i32, i32* %6
%8 = sdiv i32 %7, 1000
%9 = add nsw i32 %5, %8
%10 = sitofp i32 %9 to double
ret double %10
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define double @utc_now() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load i32, i32* %4
%6 = mul nsw i32 %5, 1000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%8 = load i32, i32* %7
%9 = sdiv i32 %8, 1000
%10 = add nsw i32 %9, %6
%11 = sitofp i32 %10 to double
ret double %11
}
/* Type definitions */
typedef int uint64_t;
typedef int uint32_t;

/* Variables and functions */
int UINT64_C(int);
uint32_t oid_to_vid(uint64_t oid) { return (~(UINT64_C(1) << 63) & oid) >> 32; }


x86 assembly (clang, -O0):
<oid_to_vid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <UINT64_C@plt>
mov    $0x3f,%ecx
shl    %cl,%eax
xor    $0xffffffff,%eax
and    -0x4(%rbp),%eax
mov    $0x20,%ecx
sar    %cl,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<oid_to_vid>:
mov    $0x1,%edi
jmp    1030 <UINT64_C@plt>

LLVM IR (-O0):
define i32 @oid_to_vid(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @UINT64_C(i32 1)
%4 = shl i32 %3, 63
%5 = xor i32 %4, -1
%6 = load i32, i32* %2
%7 = and i32 %5, %6
%8 = ashr i32 %7, 32
ret i32 %8
}

LLVM IR (-O2):
define i32 @oid_to_vid(i32 %0) {
%2 = tail call i32 @UINT64_C(i32 1)
ret i32 poison
}
/* Variables and functions */
int /*<<< orphan*/ ft_putnbr(int);
int main(void) {
  ft_putnbr(10);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xa,%edi
call   1030 <ft_putnbr@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
call   1030 <ft_putnbr@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @ft_putnbr(i32 10)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @ft_putnbr(i32 10)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ addbyte(int);
void load_param_2_reg_32(int reg) {
  if (reg & 8)
    addbyte(0x44);
  addbyte(0x89);
  addbyte(0xc0 | 6 | (reg << 3));
}


x86 assembly (clang, -O0):
<load_param_2_reg_32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x8,%eax
cmp    $0x0,%eax
je     1134 <load_param_2_reg_32+0x24>
mov    $0x44,%edi
call   1030 <addbyte@plt>
mov    $0x89,%edi
call   1030 <addbyte@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     $0xc6,%edi
call   1030 <addbyte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_param_2_reg_32>:
push   %rbx
mov    %edi,%ebx
test   $0x8,%bl
je     1122 <load_param_2_reg_32+0x12>
mov    $0x44,%edi
call   1030 <addbyte@plt>
mov    $0x89,%edi
call   1030 <addbyte@plt>
shl    $0x3,%ebx
or     $0xc6,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <addbyte@plt>

LLVM IR (-O0):
define void @load_param_2_reg_32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 8
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @addbyte(i32 68)
br label %8
8: ; preds = %6, %1
%9 = call i32 @addbyte(i32 137)
%10 = load i32, i32* %2
%11 = shl i32 %10, 3
%12 = or i32 198, %11
%13 = call i32 @addbyte(i32 %12)
ret void
}

LLVM IR (-O2):
define void @load_param_2_reg_32(i32 %0) {
%2 = and i32 %0, 8
%3 = icmp eq i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @addbyte(i32 68)
br label %6
6: ; preds = %4, %1
%7 = tail call i32 @addbyte(i32 137)
%8 = shl i32 %0, 3
%9 = or i32 %8, 198
%10 = tail call i32 @addbyte(i32 %9)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int umorse_decode(const uint8_t *code, size_t clen, char *text, size_t tlen) {
  (void)code;
  (void)clen;
  (void)text;
  (void)tlen;
  ;
  return 0;
}


x86 assembly (clang, -O0):
<umorse_decode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<umorse_decode>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @umorse_decode(i32* %0, i64 %1, i8* %2, i64 %3) {
%5 = alloca i32*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
store i32* %0, i32** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%9 = load i32*, i32** %5
%10 = load i64, i64* %6
%11 = load i8*, i8** %7
%12 = load i64, i64* %8
ret i32 0
}

LLVM IR (-O2):
define i32 @umorse_decode(i32* nocapture readnone %0, i64 %1, i8* nocapture readnone %2, i64 %3) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_VALUE;
typedef int /*<<< orphan*/ ASN1_GENERALSTRING;

/* Variables and functions */
int /*<<< orphan*/ ASN1_GENERALSTRING_it;
scalar_t__ ASN1_item_d2i(int /*<<< orphan*/ **, unsigned char const **, long,
                         int /*<<< orphan*/ *);
ASN1_GENERALSTRING *d2i_ASN1_GENERALSTRING(ASN1_GENERALSTRING **a,
                                           const unsigned char **in, long len) {
  return (ASN1_GENERALSTRING *)ASN1_item_d2i((ASN1_VALUE **)a, in, len,
                                             &ASN1_GENERALSTRING_it);
}


x86 assembly (clang, -O0):
<d2i_ASN1_GENERALSTRING>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    0x2ea9(%rip),%rcx
call   1030 <ASN1_item_d2i@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_ASN1_GENERALSTRING>:
mov    0x2ec9(%rip),%rcx
jmp    1030 <ASN1_item_d2i@plt>

LLVM IR (-O0):
@ASN1_GENERALSTRING_it = global i32 0
define i32* @d2i_ASN1_GENERALSTRING(i32** %0, i8** %1, i64 %2) {
%4 = alloca i32**
%5 = alloca i8**
%6 = alloca i64
store i32** %0, i32*** %4
store i8** %1, i8*** %5
store i64 %2, i64* %6
%7 = load i32**, i32*** %4
%8 = load i8**, i8*** %5
%9 = load i64, i64* %6
%10 = call i64 @ASN1_item_d2i(i32** %7, i8** %8, i64 %9, i32* @ASN1_GENERALSTRING_it)
%11 = inttoptr i64 %10 to i32*
ret i32* %11
}

LLVM IR (-O2):
@ASN1_GENERALSTRING_it = global i32 0
define i32* @d2i_ASN1_GENERALSTRING(i32** %0, i8** %1, i64 %2) {
%4 = tail call i64 @ASN1_item_d2i(i32** %0, i8** %1, i64 %2, i32* @ASN1_GENERALSTRING_it)
%5 = inttoptr i64 %4 to i32*
ret i32* %5
}
/* Variables and functions */
char tolower(char);
void strlower(char *s) {
  for (; *s; ++s)
    *s = tolower(*s);
}


x86 assembly (clang, -O0):
<strlower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     114e <strlower+0x3e>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <tolower@plt>
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <strlower+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlower>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1136 <strlower+0x26>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <tolower@plt>
mov    %al,-0x1(%rbx)
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <strlower+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @strlower(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %12, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = call signext i8 @tolower(i8 signext %9)
%11 = load i8*, i8** %2
store i8 %10, i8* %11
br label %12
12: ; preds = %7
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %2
br label %3
15: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @strlower(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = tail call signext i8 @tolower(i8 signext %5)
store i8 %7, i8* %6
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void header_func() { printf("Hello World\n"); }


x86 assembly (clang, -O0):
<header_func>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<header_func>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"Hello World\0A\00"
define void @header_func() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [12 x i8] c"Hello World\00"
define void @header_func() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GLUT_BITMAP_TIMES_ROMAN_24;
int /*<<< orphan*/ GL_COLOR_BUFFER_BIT;
int /*<<< orphan*/ glClear(int /*<<< orphan*/);
int /*<<< orphan*/ glRasterPos2i(int, int);
int /*<<< orphan*/ glutSwapBuffers();
int /*<<< orphan*/ printstring(int /*<<< orphan*/, char *);
void display(void) {
  glClear(GL_COLOR_BUFFER_BIT);
  glRasterPos2i(100, 100);
  printstring(GLUT_BITMAP_TIMES_ROMAN_24, "Welcome to Chromium!");
  glutSwapBuffers();
}


x86 assembly (clang, -O0):
<display>:
push   %rbp
mov    %rsp,%rbp
mov    0x2e8d(%rip),%rax
mov    (%rax),%edi
call   1030 <glClear@plt>
mov    $0x64,%esi
mov    %esi,%edi
call   1060 <glRasterPos2i@plt>
mov    0x2e7b(%rip),%rax
mov    (%rax),%edi
lea    0xe92(%rip),%rsi
call   1050 <printstring@plt>
mov    $0x0,%al
call   1040 <glutSwapBuffers@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display>:
push   %rax
mov    0x2e90(%rip),%rax
mov    (%rax),%edi
call   1030 <glClear@plt>
mov    $0x64,%edi
mov    $0x64,%esi
call   1060 <glRasterPos2i@plt>
mov    0x2e7b(%rip),%rax
mov    (%rax),%edi
lea    0xe92(%rip),%rsi
call   1050 <printstring@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <glutSwapBuffers@plt>

LLVM IR (-O0):
@GL_COLOR_BUFFER_BIT = global i32 0
@GLUT_BITMAP_TIMES_ROMAN_24 = global i32 0
@.str = [21 x i8] c"Welcome to Chromium!\00"
define void @display() {
%1 = load i32, i32* @GL_COLOR_BUFFER_BIT
%2 = call i32 @glClear(i32 %1)
%3 = call i32 @glRasterPos2i(i32 100, i32 100)
%4 = load i32, i32* @GLUT_BITMAP_TIMES_ROMAN_24
%5 = call i32 @printstring(i32 %4, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%6 = call i32 (...) @glutSwapBuffers()
ret void
}

LLVM IR (-O2):
@GL_COLOR_BUFFER_BIT = global i32 0
@GLUT_BITMAP_TIMES_ROMAN_24 = global i32 0
@.str = [21 x i8] c"Welcome to Chromium!\00"
define void @display() {
%1 = load i32, i32* @GL_COLOR_BUFFER_BIT
%2 = tail call i32 @glClear(i32 %1)
%3 = tail call i32 @glRasterPos2i(i32 100, i32 100)
%4 = load i32, i32* @GLUT_BITMAP_TIMES_ROMAN_24
%5 = tail call i32 @printstring(i32 %4, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 (...) @glutSwapBuffers()
ret void
}
/* Type definitions */
struct mbuf {
  int dummy;
};

/* Variables and functions */
struct mbuf *dequeue(struct mbuf **);
int /*<<< orphan*/ free_p(struct mbuf *);
free_q(struct mbuf **q) {
  register struct mbuf *bp;
  while ((bp = dequeue(q)) != (struct mbuf *)0)
    free_p(bp);
}


x86 assembly (clang, -O0):
<free_q>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <dequeue@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
je     1151 <free_q+0x31>
mov    -0x18(%rbp),%rdi
call   1030 <free_p@plt>
jmp    112c <free_q+0xc>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_q>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
call   1040 <dequeue@plt>
test   %rax,%rax
je     1147 <free_q+0x27>
mov    %rax,%rdi
call   1030 <free_p@plt>
mov    %rbx,%rdi
jmp    1130 <free_q+0x10>
pop    %rbx
ret

LLVM IR (-O0):
%struct.mbuf = type { i32 }
define i32 @free_q(%struct.mbuf** %0) {
%2 = alloca i32
%3 = alloca %struct.mbuf**
%4 = alloca %struct.mbuf*
store %struct.mbuf** %0, %struct.mbuf*** %3
br label %5
5: ; preds = %9, %1
%6 = load %struct.mbuf**, %struct.mbuf*** %3
%7 = call %struct.mbuf* @dequeue(%struct.mbuf** %6)
store %struct.mbuf* %7, %struct.mbuf** %4
%8 = icmp ne %struct.mbuf* %7, null
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = load %struct.mbuf*, %struct.mbuf** %4
%11 = call i32 @free_p(%struct.mbuf* %10)
br label %5
12: ; preds = %5
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
%struct.mbuf = type { i32 }
define i32 @free_q(%struct.mbuf** %0) {
%2 = tail call %struct.mbuf* @dequeue(%struct.mbuf** %0)
%3 = icmp eq %struct.mbuf* %2, null
br i1 %3, label %9, label %4
4: ; preds = %1, %4
%5 = phi %struct.mbuf* [ %7, %4 ], [ %2, %1 ]
%6 = tail call i32 @free_p(%struct.mbuf* %5)
%7 = tail call %struct.mbuf* @dequeue(%struct.mbuf** %0)
%8 = icmp eq %struct.mbuf* %7, null
br i1 %8, label %9, label %4
9: ; preds = %4, %1
ret i32 undef
}
long now() {
  extern int deadlock;
  long time();
  deadlock = 0;
  return time((long *)0);
}


x86 assembly (clang, -O0):
<now>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
movl   $0x0,(%rax)
xor    %eax,%eax
mov    %eax,%edi
mov    $0x0,%al
call   1030 <time@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<now>:
mov    0x2ed1(%rip),%rax
movl   $0x0,(%rax)
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <time@plt>

LLVM IR (-O0):
@deadlock = external global i32
define i64 @now() {
store i32 0, i32* @deadlock
%1 = call i64 (i64*, ...) bitcast (i64 (...)* @time to i64 (i64*, ...)*)(i64* null)
ret i64 %1
}

LLVM IR (-O2):
@deadlock = external global i32
define i64 @now() {
store i32 0, i32* @deadlock
%1 = tail call i64 (i64*, ...) bitcast (i64 (...)* @time to i64 (i64*, ...)*)(i64* null)
ret i64 %1
}
void arch_decomp_setup(void) {}


x86 assembly (clang, -O0):
<arch_decomp_setup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_decomp_setup>:
ret

LLVM IR (-O0):
define void @arch_decomp_setup() {
ret void
}

LLVM IR (-O2):
define void @arch_decomp_setup() {
ret void
}
/* Variables and functions */
int is_delim(int);
int is_delim_or_ESC(int c) { return (c == '`') | is_delim(c); }


x86 assembly (clang, -O0):
<is_delim_or_ESC>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x60,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <is_delim@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
or     %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_delim_or_ESC>:
push   %rbx
xor    %ebx,%ebx
cmp    $0x60,%edi
sete   %bl
call   1030 <is_delim@plt>
or     %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @is_delim_or_ESC(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 96
%5 = zext i1 %4 to i32
%6 = load i32, i32* %2
%7 = call i32 @is_delim(i32 %6)
%8 = or i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @is_delim_or_ESC(i32 %0) {
%2 = icmp eq i32 %0, 96
%3 = zext i1 %2 to i32
%4 = tail call i32 @is_delim(i32 %0)
%5 = or i32 %4, %3
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ wait(int /*<<< orphan*/ *);
void sig_hander(int sig) { wait(NULL); }


x86 assembly (clang, -O0):
<sig_hander>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1030 <wait@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_hander>:
xor    %edi,%edi
jmp    1030 <wait@plt>

LLVM IR (-O0):
define void @sig_hander(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @wait(i32* null)
ret void
}

LLVM IR (-O2):
define void @sig_hander(i32 %0) {
%2 = tail call i32 @wait(i32* null)
ret void
}
/* Variables and functions */
size_t anna_align(size_t sz) { return (((sz - 1) / 8) + 1) * 8; }


x86 assembly (clang, -O0):
<anna_align>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
sub    $0x1,%rax
shr    $0x3,%rax
add    $0x1,%rax
shl    $0x3,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<anna_align>:
lea    0x7(%rdi),%rax
and    $0xfffffffffffffff8,%rax
ret

LLVM IR (-O0):
define i64 @anna_align(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sub i64 %3, 1
%5 = udiv i64 %4, 8
%6 = add i64 %5, 1
%7 = mul i64 %6, 8
ret i64 %7
}

LLVM IR (-O2):
define i64 @anna_align(i64 %0) {
%2 = add i64 %0, 7
%3 = and i64 %2, -8
ret i64 %3
}
int memcmp_(const unsigned char *dst, const unsigned char *src,
            unsigned char len) {
  while (len--) {
    if (*dst != *src) {
      return -1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<memcmp_>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
mov    %al,%cl
add    $0xff,%cl
mov    %cl,-0x19(%rbp)
cmp    $0x0,%al
je     114b <memcmp_+0x4b>
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
mov    -0x18(%rbp),%rcx
movzbl (%rcx),%ecx
cmp    %ecx,%eax
je     1146 <memcmp_+0x46>
movl   $0xffffffff,-0x4(%rbp)
jmp    1152 <memcmp_+0x52>
jmp    1111 <memcmp_+0x11>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcmp_>:
add    $0x1,%dl
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
add    $0xff,%dl
je     1122 <memcmp_+0x22>
movzbl (%rdi),%eax
cmp    (%rsi),%al
je     1110 <memcmp_+0x10>
mov    $0xffffffff,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @memcmp_(i8* %0, i8* %1, i8 zeroext %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8 %2, i8* %7
br label %8
8: ; preds = %21, %3
%9 = load i8, i8* %7
%10 = add i8 %9, -1
store i8 %10, i8* %7
%11 = icmp ne i8 %9, 0
br i1 %11, label %12, label %22
12: ; preds = %8
%13 = load i8*, i8** %5
%14 = load i8, i8* %13
%15 = zext i8 %14 to i32
%16 = load i8*, i8** %6
%17 = load i8, i8* %16
%18 = zext i8 %17 to i32
%19 = icmp ne i32 %15, %18
br i1 %19, label %20, label %21
20: ; preds = %12
store i32 -1, i32* %4
br label %23
21: ; preds = %12
br label %8
22: ; preds = %8
store i32 0, i32* %4
br label %23
23: ; preds = %22, %20
%24 = load i32, i32* %4
ret i32 %24
}

LLVM IR (-O2):
define i32 @memcmp_(i8* nocapture %0, i8* nocapture %1, i8 zeroext %2) {
br label %4
4: ; preds = %7, %3
%5 = phi i8 [ %2, %3 ], [ %8, %7 ]
%6 = icmp eq i8 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %4
%8 = add i8 %5, -1
%9 = load i8, i8* %0
%10 = load i8, i8* %1
%11 = icmp eq i8 %9, %10
br i1 %11, label %4, label %12
12: ; preds = %4, %7
%13 = phi i32 [ -1, %7 ], [ 0, %4 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ not_implemented_error();
void primitive_set_os_envs_impl(void) { not_implemented_error(); }


x86 assembly (clang, -O0):
<primitive_set_os_envs_impl>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <not_implemented_error@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<primitive_set_os_envs_impl>:
xor    %eax,%eax
jmp    1030 <not_implemented_error@plt>

LLVM IR (-O0):
define void @primitive_set_os_envs_impl() {
%1 = call i32 (...) @not_implemented_error()
ret void
}

LLVM IR (-O2):
define void @primitive_set_os_envs_impl() {
%1 = tail call i32 (...) @not_implemented_error()
ret void
}
int main() {
  int i, j;
  char *p;
  for (i = 200; i >= 100; i--) {
    p = (char *)(0x4000 + i * 22);
    for (j = 0; j < 22; j++) {
      p[j] = 0xff;
    }
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0xc8,-0x8(%rbp)
cmpl   $0x64,-0x8(%rbp)
jl     1169 <main+0x69>
imul   $0x16,-0x8(%rbp),%eax
add    $0x4000,%eax
cltq
mov    %rax,-0x18(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x16,-0xc(%rbp)
jge    1156 <main+0x56>
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0xff,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1132 <main+0x32>
jmp    115b <main+0x5b>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0xc8,%eax
mov    $0x50ee,%ecx
pcmpeqd %xmm0,%xmm0
xchg   %ax,%ax
movdqu %xmm0,0x42(%rcx)
movq   $0xffffffffffffffff,0x50(%rcx)
ff
cmp    $0x65,%rax
jb     1153 <main+0x53>
movdqu %xmm0,0x2c(%rcx)
movq   $0xffffffffffffffff,0x3a(%rcx)
ff
movdqu %xmm0,0x16(%rcx)
movq   $0xffffffffffffffff,0x24(%rcx)
ff
movdqu %xmm0,(%rcx)
movq   $0xffffffffffffffff,0xe(%rcx)
ff
add    $0xfffffffffffffffc,%rax
add    $0xffffffffffffffa8,%rcx
jmp    1110 <main+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i8*
store i32 0, i32* %1
store i32 200, i32* %2
br label %5
5: ; preds = %26, %0
%6 = load i32, i32* %2
%7 = icmp sge i32 %6, 100
br i1 %7, label %8, label %29
8: ; preds = %5
%9 = load i32, i32* %2
%10 = mul nsw i32 %9, 22
%11 = add nsw i32 16384, %10
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i8*
store i8* %13, i8** %4
store i32 0, i32* %3
br label %14
14: ; preds = %22, %8
%15 = load i32, i32* %3
%16 = icmp slt i32 %15, 22
br i1 %16, label %17, label %25
17: ; preds = %14
%18 = load i8*, i8** %4
%19 = load i32, i32* %3
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
store i8 -1, i8* %21
br label %22
22: ; preds = %17
%23 = load i32, i32* %3
%24 = add nsw i32 %23, 1
store i32 %24, i32* %3
br label %14
25: ; preds = %14
br label %26
26: ; preds = %25
%27 = load i32, i32* %2
%28 = add nsw i32 %27, -1
store i32 %28, i32* %2
br label %5
29: ; preds = %5
%30 = load i32, i32* %1
ret i32 %30
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %7, %0
%2 = phi i64 [ 200, %0 ], [ %17, %7 ]
%3 = mul nuw nsw i64 %2, 22
%4 = add nuw nsw i64 %3, 16384
%5 = inttoptr i64 %4 to i8*
%6 = icmp ugt i64 %2, 100
br i1 %6, label %7, label %18
7: ; preds = %1
%8 = mul i64 %2, 22
%9 = add i64 %8, 16362
%10 = inttoptr i64 %9 to i8*
%11 = mul i64 %2, 22
%12 = add i64 %11, 16340
%13 = inttoptr i64 %12 to i8*
%14 = mul i64 %2, 22
%15 = add i64 %14, 16318
%16 = inttoptr i64 %15 to i8*
%17 = add nsw i64 %2, -4
br label %1
18: ; preds = %1
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void ALequalizerState_Delete(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<ALequalizerState_Delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ALequalizerState_Delete>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @ALequalizerState_Delete(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @ALequalizerState_Delete(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}