xunge/DecIR huggingface dataset:
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ printf(char *, ...);
int main() {
  int a = 3, *b = NULL;
  printf("a = %d\n", a);
  b = &a;
  printf("b = %p\n", b);
  printf("*b = %d\n", *b);
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%esi
lea    0xec8(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xeb6(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
lea    0xeaa(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    0x2e6c(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x3,0x4(%rsp)
lea    0xee0(%rip),%rdi
mov    $0x3,%esi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xed5(%rip),%rdi
lea    0x4(%rsp),%rsi
xor    %eax,%eax
call   1030 <printf@plt>
mov    0x4(%rsp),%esi
lea    0xec6(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
mov    0x2e88(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"a = %d\0A\00"
@.str.1 = [8 x i8] c"b = %p\0A\00"
@.str.2 = [9 x i8] c"*b = %d\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
store i32 0, i32* %1
store i32 3, i32* %2
store i32* null, i32** %3
%4 = load i32, i32* %2
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %4)
store i32* %2, i32** %3
%6 = load i32*, i32** %3
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32* %6)
%8 = load i32*, i32** %3
%9 = load i32, i32* %8
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i64 0, i64 0), i32 %9)
%11 = load i32, i32* @EXIT_SUCCESS
ret i32 %11
}

LLVM IR (-O2):
@.str = [8 x i8] c"a = %d\0A\00"
@.str.1 = [8 x i8] c"b = %p\0A\00"
@.str.2 = [9 x i8] c"*b = %d\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 3, i32* %1
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 3)
%4 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i64 0, i64 0), i32 %5)
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ display;
};
struct TYPE_4__ {
  TYPE_1__ xgravity;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void *get_XEvent_xgravity_display(void *_p) {
  return (void *)((XEvent *)_p)->xgravity.display;
}


x86 assembly (clang, -O0):
<get_XEvent_xgravity_display>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xgravity_display>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i8* @get_XEvent_xgravity_display(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = inttoptr i64 %7 to i8*
ret i8* %8
}

LLVM IR (-O2):
define i8* @get_XEvent_xgravity_display(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = inttoptr i64 %3 to i8*
ret i8* %4
}
__attribute__((no, noclone)) unsigned __int128 t152_5add(unsigned __int128 x) {
  unsigned __int128 r;
  if (__builtin_add_overflow(x, (unsigned __int128)(0), &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t152_5add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rcx
mov    -0x28(%rbp),%rdx
xor    %eax,%eax
mov    %rdx,-0x38(%rbp)
mov    %rcx,-0x40(%rbp)
test   $0x1,%al
jne    114f <t152_5add+0x3f>
jmp    1156 <t152_5add+0x46>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t152_5add>:
mov    %rsi,%rdx
mov    %rdi,%rax
ret

LLVM IR (-O0):
define { i64, i64 } @t152_5add(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = bitcast i128* %4 to { i64, i64 }*
%8 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 0
store i64 %0, i64* %8
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 1
store i64 %1, i64* %9
%10 = load i128, i128* %4
store i128 %10, i128* %5
%11 = load i128, i128* %5
%12 = call { i128, i1 } @llvm.uadd.with.overflow.i128(i128 %11, i128 0)
%13 = extractvalue { i128, i1 } %12, 1
%14 = extractvalue { i128, i1 } %12, 0
store i128 %14, i128* %6
br i1 %13, label %15, label %17
15: ; preds = %2
%16 = call i32 (...) @bar()
br label %17
17: ; preds = %15, %2
%18 = load i128, i128* %6
store i128 %18, i128* %3
%19 = bitcast i128* %3 to { i64, i64 }*
%20 = load { i64, i64 }, { i64, i64 }* %19
ret { i64, i64 } %20
}

LLVM IR (-O2):
define { i64, i64 } @t152_5add(i64 %0, i64 %1) {
%3 = insertvalue { i64, i64 } poison, i64 %0, 0
%4 = insertvalue { i64, i64 } %3, i64 %1, 1
ret { i64, i64 } %4
}
/* Variables and functions */
int /*<<< orphan*/ op_write1(int);
void op_enc_ld_a_cp(void) { op_write1(0xf2); }


x86 assembly (clang, -O0):
<op_enc_ld_a_cp>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf2,%edi
call   1030 <op_write1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_enc_ld_a_cp>:
mov    $0xf2,%edi
jmp    1030 <op_write1@plt>

LLVM IR (-O0):
define void @op_enc_ld_a_cp() {
%1 = call i32 @op_write1(i32 242)
ret void
}

LLVM IR (-O2):
define void @op_enc_ld_a_cp() {
%1 = tail call i32 @op_write1(i32 242)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void printHTMLheader(FILE *fd) {
  fprintf(
      fd,
      "<html><head><link rel=\"stylesheet\" type=\"text/css\" "
      "href=\"solexa.css\" /><title>PhiX Analysis</title></head>\n<body>\n");
}


x86 assembly (clang, -O0):
<printHTMLheader>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printHTMLheader>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
mov    $0x72,%esi
mov    $0x1,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@.str = [115 x i8] c"<html><head><link rel=\22stylesheet\22 type=\22text/css\22 href=\22solexa.css\22 /><title>PhiX Analysis</title></head>\0A<body>\0A\00"
define void @printHTMLheader(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([115 x i8], [115 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [115 x i8] c"<html><head><link rel=\22stylesheet\22 type=\22text/css\22 href=\22solexa.css\22 /><title>PhiX Analysis</title></head>\0A<body>\0A\00"
define void @printHTMLheader(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([115 x i8], [115 x i8]* @.str, i64 0, i64 0), i64 114, i64 1, i32* %0)
ret void
}
int test_imm_6Dint64_lowword_mem(long long *val) {
  return ((*val) & (0x6D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Dint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x6d,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Dint64_lowword_mem>:
testb  $0x6d,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Dint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 109
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_6Dint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 109
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int pid_t;

/* Variables and functions */
int /*<<< orphan*/ set_map(char *, int, int, int);
int /*<<< orphan*/ sprintf(char *, char *, int);
void set_gid_map(pid_t pid, int inside_id, int outside_id, int len) {
  char file[256];
  sprintf(file, "/proc/%d/gid_map", pid);
  set_map(file, inside_id, outside_id, len);
}


x86 assembly (clang, -O0):
<set_gid_map>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
lea    -0x110(%rbp),%rdi
mov    -0x4(%rbp),%edx
lea    0xeb8(%rip),%rsi
call   1040 <sprintf@plt>
lea    -0x110(%rbp),%rdi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1030 <set_map@plt>
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_gid_map>:
push   %rbp
push   %r15
push   %r14
push   %rbx
sub    $0x108,%rsp
mov    %ecx,%r14d
mov    %edx,%ebp
mov    %esi,%ebx
mov    %edi,%edx
lea    0xec3(%rip),%rsi
mov    %rsp,%r15
mov    %r15,%rdi
call   1040 <sprintf@plt>
mov    %r15,%rdi
mov    %ebx,%esi
mov    %ebp,%edx
mov    %r14d,%ecx
call   1030 <set_map@plt>
add    $0x108,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@.str = [17 x i8] c"/proc/%d/gid_map\00"
define void @set_gid_map(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca [256 x i8]
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = getelementptr inbounds [256 x i8], [256 x i8]* %9, i64 0, i64 0
%11 = load i32, i32* %5
%12 = call i32 @sprintf(i8* %10, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = getelementptr inbounds [256 x i8], [256 x i8]* %9, i64 0, i64 0
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = load i32, i32* %8
%17 = call i32 @set_map(i8* %13, i32 %14, i32 %15, i32 %16)
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"/proc/%d/gid_map\00"
define void @set_gid_map(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca [256 x i8]
%6 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%7 = call i32 @sprintf(i8* %6, i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %0)
%8 = call i32 @set_map(i8* %6, i32 %1, i32 %2, i32 %3)
ret void
}
void f9(void) {}


x86 assembly (clang, -O0):
<f9>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f9>:
ret

LLVM IR (-O0):
define void @f9() {
ret void
}

LLVM IR (-O2):
define void @f9() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ buildqregexpr(int /*<<< orphan*/);
int /*<<< orphan*/ priv_reg_access(int /*<<< orphan*/ *, int /*<<< orphan*/);
void genStackReg(FILE *f) { priv_reg_access(f, buildqregexpr(0)); }


x86 assembly (clang, -O0):
<genStackReg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
xor    %edi,%edi
call   1040 <buildqregexpr@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1030 <priv_reg_access@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genStackReg>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
call   1040 <buildqregexpr@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1030 <priv_reg_access@plt>

LLVM IR (-O0):
define void @genStackReg(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @buildqregexpr(i32 0)
%5 = call i32 @priv_reg_access(i32* %3, i32 %4)
ret void
}

LLVM IR (-O2):
define void @genStackReg(i32* %0) {
%2 = tail call i32 @buildqregexpr(i32 0)
%3 = tail call i32 @priv_reg_access(i32* %0, i32 %2)
ret void
}
int PyDTrace_IMPORT_FIND_LOAD_START_ENABLED(void) { return 0; }


x86 assembly (clang, -O0):
<PyDTrace_IMPORT_FIND_LOAD_START_ENABLED>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PyDTrace_IMPORT_FIND_LOAD_START_ENABLED>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @PyDTrace_IMPORT_FIND_LOAD_START_ENABLED() {
ret i32 0
}

LLVM IR (-O2):
define i32 @PyDTrace_IMPORT_FIND_LOAD_START_ENABLED() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void cli_print(char *line) { printf("%s", line); }


x86 assembly (clang, -O0):
<cli_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cli_print>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @cli_print(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @cli_print(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ flash_writecommand(int, int);
int /*<<< orphan*/ mdelay(int);
void flash_chiperase() {
  flash_writecommand(0x5555, 0xAA);
  flash_writecommand(0x2AAA, 0x55);
  flash_writecommand(0x5555, 0x80);
  flash_writecommand(0x5555, 0xAA);
  flash_writecommand(0x2AAA, 0x55);
  flash_writecommand(0x5555, 0x10);
  mdelay(100);
}


x86 assembly (clang, -O0):
<flash_chiperase>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5555,%edi
mov    $0xaa,%esi
call   1030 <flash_writecommand@plt>
mov    $0x2aaa,%edi
mov    $0x55,%esi
call   1030 <flash_writecommand@plt>
mov    $0x5555,%edi
mov    $0x80,%esi
call   1030 <flash_writecommand@plt>
mov    $0x5555,%edi
mov    $0xaa,%esi
call   1030 <flash_writecommand@plt>
mov    $0x2aaa,%edi
mov    $0x55,%esi
call   1030 <flash_writecommand@plt>
mov    $0x5555,%edi
mov    $0x10,%esi
call   1030 <flash_writecommand@plt>
mov    $0x64,%edi
call   1040 <mdelay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<flash_chiperase>:
push   %rax
mov    $0x5555,%edi
mov    $0xaa,%esi
call   1030 <flash_writecommand@plt>
mov    $0x2aaa,%edi
mov    $0x55,%esi
call   1030 <flash_writecommand@plt>
mov    $0x5555,%edi
mov    $0x80,%esi
call   1030 <flash_writecommand@plt>
mov    $0x5555,%edi
mov    $0xaa,%esi
call   1030 <flash_writecommand@plt>
mov    $0x2aaa,%edi
mov    $0x55,%esi
call   1030 <flash_writecommand@plt>
mov    $0x5555,%edi
mov    $0x10,%esi
call   1030 <flash_writecommand@plt>
mov    $0x64,%edi
pop    %rax
jmp    1040 <mdelay@plt>

LLVM IR (-O0):
define void @flash_chiperase() {
%1 = call i32 @flash_writecommand(i32 21845, i32 170)
%2 = call i32 @flash_writecommand(i32 10922, i32 85)
%3 = call i32 @flash_writecommand(i32 21845, i32 128)
%4 = call i32 @flash_writecommand(i32 21845, i32 170)
%5 = call i32 @flash_writecommand(i32 10922, i32 85)
%6 = call i32 @flash_writecommand(i32 21845, i32 16)
%7 = call i32 @mdelay(i32 100)
ret void
}

LLVM IR (-O2):
define void @flash_chiperase() {
%1 = tail call i32 @flash_writecommand(i32 21845, i32 170)
%2 = tail call i32 @flash_writecommand(i32 10922, i32 85)
%3 = tail call i32 @flash_writecommand(i32 21845, i32 128)
%4 = tail call i32 @flash_writecommand(i32 21845, i32 170)
%5 = tail call i32 @flash_writecommand(i32 10922, i32 85)
%6 = tail call i32 @flash_writecommand(i32 21845, i32 16)
%7 = tail call i32 @mdelay(i32 100)
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
uint32_t create_instruction(uint8_t instr, uint8_t mode, uint8_t d1,
                            uint8_t d2) {
  uint32_t instruction = 0x00000000;
  instruction = (instruction ^ (instr & 0x000000FF) << 24);
  instruction = (instruction ^ (mode & 0x000000FF) << 16);
  instruction = (instruction ^ (d1 & 0x000000FF) << 8);
  instruction = (instruction ^ (d2 & 0x000000FF));
  return instruction;
}


x86 assembly (clang, -O0):
<create_instruction>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
shl    $0x18,%ecx
xor    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x8(%rbp),%ecx
and    $0xff,%ecx
shl    $0x10,%ecx
xor    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
shl    $0x8,%ecx
xor    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x10(%rbp),%ecx
and    $0xff,%ecx
xor    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_instruction>:
shl    $0x18,%edi
movzbl %sil,%eax
shl    $0x10,%eax
or     %edi,%eax
shl    $0x8,%edx
movzwl %dx,%edx
or     %eax,%edx
movzbl %cl,%eax
or     %edx,%eax
ret

LLVM IR (-O0):
define i32 @create_instruction(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
store i32 0, i32* %9
%10 = load i32, i32* %9
%11 = load i32, i32* %5
%12 = and i32 %11, 255
%13 = shl i32 %12, 24
%14 = xor i32 %10, %13
store i32 %14, i32* %9
%15 = load i32, i32* %9
%16 = load i32, i32* %6
%17 = and i32 %16, 255
%18 = shl i32 %17, 16
%19 = xor i32 %15, %18
store i32 %19, i32* %9
%20 = load i32, i32* %9
%21 = load i32, i32* %7
%22 = and i32 %21, 255
%23 = shl i32 %22, 8
%24 = xor i32 %20, %23
store i32 %24, i32* %9
%25 = load i32, i32* %9
%26 = load i32, i32* %8
%27 = and i32 %26, 255
%28 = xor i32 %25, %27
store i32 %28, i32* %9
%29 = load i32, i32* %9
ret i32 %29
}

LLVM IR (-O2):
define i32 @create_instruction(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = shl i32 %0, 24
%6 = shl i32 %1, 16
%7 = and i32 %6, 16711680
%8 = or i32 %7, %5
%9 = shl i32 %2, 8
%10 = and i32 %9, 65280
%11 = or i32 %8, %10
%12 = and i32 %3, 255
%13 = or i32 %11, %12
ret i32 %13
}
/* Variables and functions */
bool contains_even_digits(int n) {
  while (n > 0) {
    if (n % 2 == 0)
      return true;
    n /= 10;
  }
  return false;
}


x86 assembly (clang, -O0):
<contains_even_digits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1144 <contains_even_digits+0x44>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1131 <contains_even_digits+0x31>
movl   $0x1,-0x4(%rbp)
jmp    114b <contains_even_digits+0x4b>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
jmp    1107 <contains_even_digits+0x7>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<contains_even_digits>:
xor    %eax,%eax
test   %edi,%edi
jle    1127 <contains_even_digits+0x27>
mov    $0xcccccccd,%ecx
nopl   0x0(%rax,%rax,1)
test   $0x1,%dil
je     1128 <contains_even_digits+0x28>
mov    %edi,%edx
imul   %rcx,%rdx
shr    $0x23,%rdx
cmp    $0x9,%edi
mov    %edx,%edi
ja     1110 <contains_even_digits+0x10>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @contains_even_digits(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %3
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32, i32* %3
%9 = srem i32 %8, 2
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %16
12: ; preds = %7
%13 = load i32, i32* %3
%14 = sdiv i32 %13, 10
store i32 %14, i32* %3
br label %4
15: ; preds = %4
store i32 0, i32* %2
br label %16
16: ; preds = %15, %11
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @contains_even_digits(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %10
3: ; preds = %1, %7
%4 = phi i32 [ %8, %7 ], [ %0, %1 ]
%5 = and i32 %4, 1
%6 = icmp eq i32 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %3
%8 = udiv i32 %4, 10
%9 = icmp ult i32 %4, 10
br i1 %9, label %10, label %3
10: ; preds = %3, %7, %1
%11 = phi i32 [ 0, %1 ], [ 0, %7 ], [ 1, %3 ]
ret i32 %11
}
void picokdbg_dummy(void) { picokdbg_dummy(); }


x86 assembly (clang, -O0):
<picokdbg_dummy>:
push   %rbp
mov    %rsp,%rbp
call   1030 <picokdbg_dummy@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<picokdbg_dummy>:
jmp    1100 <picokdbg_dummy>

LLVM IR (-O0):
define void @picokdbg_dummy() {
ret void
}

LLVM IR (-O2):
define void @picokdbg_dummy() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void usage() {
  printf("Usage: ./a.out IP_Addr Port\n");
  exit(0);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"Usage: ./a.out IP_Addr Port\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [28 x i8] c"Usage: ./a.out IP_Addr Port\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
typedef int uint32_t;
typedef int ui32Base;

/* Variables and functions */
uint32_t PWMGenIntStatus(uint32_t ui32Base, uint32_t ui32Gen, bool bMasked) {
  ;
  ;
  ui32Gen = ((ui32Base) + (ui32Gen));
  if (bMasked == true) {
    return ((*((volatile uint32_t *)(ui32Gen + 0x0000000C))));
  } else {
    return ((*((volatile uint32_t *)(ui32Gen + 0x00000008))));
  }
}


x86 assembly (clang, -O0):
<PWMGenIntStatus>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0x10(%rbp)
jne    1132 <PWMGenIntStatus+0x32>
mov    -0xc(%rbp),%eax
add    $0xc,%eax
cltq
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    113f <PWMGenIntStatus+0x3f>
mov    -0xc(%rbp),%eax
add    $0x8,%eax
cltq
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMGenIntStatus>:
add    %esi,%edi
xor    %eax,%eax
cmp    $0x1,%edx
sete   %al
lea    0x8(,%rax,4),%eax
movslq %edi,%rcx
mov    (%rcx,%rax,1),%eax
ret

LLVM IR (-O0):
define i32 @PWMGenIntStatus(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = add nsw i32 %8, %9
store i32 %10, i32* %6
%11 = load i32, i32* %7
%12 = icmp eq i32 %11, 1
br i1 %12, label %13, label %19
13: ; preds = %3
%14 = load i32, i32* %6
%15 = add nsw i32 %14, 12
%16 = sext i32 %15 to i64
%17 = inttoptr i64 %16 to i32*
%18 = load volatile i32, i32* %17
store i32 %18, i32* %4
br label %25
19: ; preds = %3
%20 = load i32, i32* %6
%21 = add nsw i32 %20, 8
%22 = sext i32 %21 to i64
%23 = inttoptr i64 %22 to i32*
%24 = load volatile i32, i32* %23
store i32 %24, i32* %4
br label %25
25: ; preds = %19, %13
%26 = load i32, i32* %4
ret i32 %26
}

LLVM IR (-O2):
define i32 @PWMGenIntStatus(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %1, %0
%5 = icmp eq i32 %2, 1
%6 = select i1 %5, i32 12, i32 8
%7 = add nsw i32 %4, %6
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
%10 = load volatile i32, i32* %9
ret i32 %10
}
/* Type definitions */
struct dns_socket {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ dns_so_closefds(struct dns_socket *, int);
void dns_so_clear(struct dns_socket *so) { dns_so_closefds(so, 0x04); }


x86 assembly (clang, -O0):
<dns_so_clear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x4,%esi
call   1030 <dns_so_closefds@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dns_so_clear>:
mov    $0x4,%esi
jmp    1030 <dns_so_closefds@plt>

LLVM IR (-O0):
%struct.dns_socket = type { i32 }
define void @dns_so_clear(%struct.dns_socket* %0) {
%2 = alloca %struct.dns_socket*
store %struct.dns_socket* %0, %struct.dns_socket** %2
%3 = load %struct.dns_socket*, %struct.dns_socket** %2
%4 = call i32 @dns_so_closefds(%struct.dns_socket* %3, i32 4)
ret void
}

LLVM IR (-O2):
%struct.dns_socket = type { i32 }
define void @dns_so_clear(%struct.dns_socket* %0) {
%2 = tail call i32 @dns_so_closefds(%struct.dns_socket* %0, i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0x98() {
  Assert_real((isdigit(152) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              765, ("isdigit should be 0 for 0x98"));
}


x86 assembly (clang, -O0):
<t_isdigit_0x98>:
push   %rbp
mov    %rsp,%rbp
mov    $0x98,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2fd,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0x98>:
push   %rax
mov    $0x98,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2fd,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0x98\00"
define void @t_isdigit_0x98() {
%1 = call i64 @isdigit(i32 152)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 765, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0x98\00"
define void @t_isdigit_0x98() {
%1 = tail call i64 @isdigit(i32 152)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 765, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int XConvertSelection() {
  printf("XConvertSelection called\n");
  return 0;
}


x86 assembly (clang, -O0):
<XConvertSelection>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XConvertSelection>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"XConvertSelection called\0A\00"
define i32 @XConvertSelection() {
%1 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [25 x i8] c"XConvertSelection called\00"
define i32 @XConvertSelection() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void fpEq(double x, double y) {
  if (x != y)
    abort();
}


x86 assembly (clang, -O0):
<fpEq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
jne    113d <fpEq+0x2d>
jp     113d <fpEq+0x2d>
jmp    1144 <fpEq+0x34>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fpEq>:
ucomisd %xmm1,%xmm0
jne    1119 <fpEq+0x9>
jp     1119 <fpEq+0x9>
ret
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @fpEq(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp une double %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 (...) @abort()
unreachable
10: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @fpEq(double %0, double %1) {
%3 = fcmp une double %0, %1
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 (...) @abort()
unreachable
6: ; preds = %2
ret void
}
void VAL_BTS(s, b, n) int *s, b, n;
{ VMS_BTS(s, b, n, n); }


x86 assembly (clang, -O0):
<VAL_BTS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    $0x0,%al
call   1030 <VMS_BTS@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VAL_BTS>:
mov    %edx,%ecx
xor    %eax,%eax
jmp    1030 <VMS_BTS@plt>

LLVM IR (-O0):
define void @VAL_BTS(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = load i32, i32* %6
%11 = call i32 (i32*, i32, i32, i32, ...) bitcast (i32 (...)* @VMS_BTS to i32 (i32*, i32, i32, i32, ...)*)(i32* %7, i32 %8, i32 %9, i32 %10)
ret void
}

LLVM IR (-O2):
define void @VAL_BTS(i32* %0, i32 %1, i32 %2) {
%4 = tail call i32 (i32*, i32, i32, i32, ...) bitcast (i32 (...)* @VMS_BTS to i32 (i32*, i32, i32, i32, ...)*)(i32* %0, i32 %1, i32 %2, i32 %2)
ret void
}
/* Variables and functions */
int abs(int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int a, b;
  a = abs(5);
  printf("value of a = %d\n", a);
  b = abs(-10);
  printf("value of b = %d\n", b);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x5,%edi
call   1030 <abs@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeba(%rip),%rdi
call   1040 <printf@plt>
mov    $0xfffffff6,%edi
call   1030 <abs@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xeaf(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x5,%esi
call   1030 <printf@plt>
lea    0xee8(%rip),%rdi
mov    $0xa,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"value of a = %d\0A\00"
@.str.1 = [17 x i8] c"value of b = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @abs(i32 5)
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = call i32 @abs(i32 -10)
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [17 x i8] c"value of a = %d\0A\00"
@.str.1 = [17 x i8] c"value of b = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 5)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i32 10)
ret i32 0
}
/* Variables and functions */
bool op_left_assoc(const char c) {
  switch (c) {
  case '*':
  case '/':
  case '%':
  case '+':
  case '-':
  case '^':
    return true;
  case '=':
    return false;
  }
  return false;
}


x86 assembly (clang, -O0):
<op_left_assoc>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x25,%eax
je     1177 <op_left_assoc+0x77>
jmp    111f <op_left_assoc+0x1f>
mov    -0xc(%rbp),%eax
add    $0xffffffd6,%eax
sub    $0x2,%eax
jb     1177 <op_left_assoc+0x77>
jmp    1133 <op_left_assoc+0x33>
mov    -0xc(%rbp),%eax
sub    $0x2d,%eax
je     1177 <op_left_assoc+0x77>
jmp    1144 <op_left_assoc+0x44>
mov    -0xc(%rbp),%eax
sub    $0x2f,%eax
je     1177 <op_left_assoc+0x77>
jmp    1155 <op_left_assoc+0x55>
mov    -0xc(%rbp),%eax
sub    $0x3d,%eax
je     1183 <op_left_assoc+0x83>
jmp    1166 <op_left_assoc+0x66>
mov    -0xc(%rbp),%eax
sub    $0x5e,%eax
jne    118f <op_left_assoc+0x8f>
jmp    1177 <op_left_assoc+0x77>
movl   $0x1,-0x4(%rbp)
jmp    1196 <op_left_assoc+0x96>
movl   $0x0,-0x4(%rbp)
jmp    1196 <op_left_assoc+0x96>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_left_assoc>:
add    $0xffffffdb,%edi
cmp    $0x39,%edi
ja     1122 <op_left_assoc+0x22>
mov    $0x1,%eax
movabs $0x200000000000561,%rcx
bt     %rdi,%rcx
jae    111e <op_left_assoc+0x1e>
ret
cmp    $0x18,%rdi
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @op_left_assoc(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %8 [
i32 42, label %6
i32 47, label %6
i32 37, label %6
i32 43, label %6
i32 45, label %6
i32 94, label %6
i32 61, label %7
]
6: ; preds = %1, %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %9
7: ; preds = %1
store i32 0, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7, %6
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @op_left_assoc(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %4 [
i32 42, label %5
i32 47, label %5
i32 37, label %5
i32 43, label %5
i32 45, label %5
i32 94, label %5
i32 61, label %3
]
3: ; preds = %1
br label %5
4: ; preds = %1
br label %5
5: ; preds = %1, %1, %1, %1, %1, %1, %4, %3
%6 = phi i32 [ 0, %4 ], [ 0, %3 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isodigit(int);
void t_isodigit_0x33() {
  Assert_real((isodigit(51)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              260, ("isodigit should be 1 for 3"));
}


x86 assembly (clang, -O0):
<t_isodigit_0x33>:
push   %rbp
mov    %rsp,%rbp
mov    $0x33,%edi
call   1040 <isodigit@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x104,%edx
lea    0xf66(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0x33>:
push   %rax
mov    $0x33,%edi
call   1040 <isodigit@plt>
lea    0xece(%rip),%rsi
lea    0xf70(%rip),%rcx
mov    %eax,%edi
mov    $0x104,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 1 for 3\00"
define void @t_isodigit_0x33() {
%1 = call i32 @isodigit(i32 51)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 260, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 1 for 3\00"
define void @t_isodigit_0x33() {
%1 = tail call i32 @isodigit(i32 51)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 260, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mpush(int);
void fcell() { mpush(4); }


x86 assembly (clang, -O0):
<fcell>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
call   1030 <mpush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fcell>:
mov    $0x4,%edi
jmp    1030 <mpush@plt>

LLVM IR (-O0):
define void @fcell() {
%1 = call i32 @mpush(i32 4)
ret void
}

LLVM IR (-O2):
define void @fcell() {
%1 = tail call i32 @mpush(i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delay(int);
int /*<<< orphan*/ mbus_remote_register_write(int, int, int);
int /*<<< orphan*/ pmu_set_active_clk(int, int, int, int);
int /*<<< orphan*/ pmu_set_adc_period(int);
int /*<<< orphan*/ pmu_set_sar_override(int);
int /*<<< orphan*/ pmu_set_sleep_clk(int, int, int, int);
void pmu_set_clk_init() {
  pmu_set_active_clk(0xA, 0x1, 0x10, 0x2);
  pmu_set_sleep_clk(0xF, 0x0, 0x1, 0x1);
  mbus_remote_register_write(0x6, 0x05,
                             ((0 << 13) | (0 << 12) | (1 << 11) | (0 << 10) |
                              (0 << 9) | (0 << 8) | (0 << 7) | (0x45)));
  delay(100);
  pmu_set_sar_override(0x3C);
  pmu_set_adc_period(1);
}


x86 assembly (clang, -O0):
<pmu_set_clk_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
mov    $0x1,%esi
mov    $0x10,%edx
mov    $0x2,%ecx
call   1040 <pmu_set_active_clk@plt>
mov    $0xf,%edi
xor    %esi,%esi
mov    $0x1,%ecx
mov    %ecx,%edx
call   1030 <pmu_set_sleep_clk@plt>
mov    $0x6,%edi
mov    $0x5,%esi
mov    $0x845,%edx
call   1060 <mbus_remote_register_write@plt>
mov    $0x64,%edi
call   1050 <delay@plt>
mov    $0x3c,%edi
call   1070 <pmu_set_sar_override@plt>
mov    $0x1,%edi
call   1080 <pmu_set_adc_period@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmu_set_clk_init>:
push   %rax
mov    $0xa,%edi
mov    $0x1,%esi
mov    $0x10,%edx
mov    $0x2,%ecx
call   1040 <pmu_set_active_clk@plt>
mov    $0xf,%edi
xor    %esi,%esi
mov    $0x1,%edx
mov    $0x1,%ecx
call   1030 <pmu_set_sleep_clk@plt>
mov    $0x6,%edi
mov    $0x5,%esi
mov    $0x845,%edx
call   1060 <mbus_remote_register_write@plt>
mov    $0x64,%edi
call   1050 <delay@plt>
mov    $0x3c,%edi
call   1070 <pmu_set_sar_override@plt>
mov    $0x1,%edi
pop    %rax
jmp    1080 <pmu_set_adc_period@plt>

LLVM IR (-O0):
define void @pmu_set_clk_init() {
%1 = call i32 @pmu_set_active_clk(i32 10, i32 1, i32 16, i32 2)
%2 = call i32 @pmu_set_sleep_clk(i32 15, i32 0, i32 1, i32 1)
%3 = call i32 @mbus_remote_register_write(i32 6, i32 5, i32 2117)
%4 = call i32 @delay(i32 100)
%5 = call i32 @pmu_set_sar_override(i32 60)
%6 = call i32 @pmu_set_adc_period(i32 1)
ret void
}

LLVM IR (-O2):
define void @pmu_set_clk_init() {
%1 = tail call i32 @pmu_set_active_clk(i32 10, i32 1, i32 16, i32 2)
%2 = tail call i32 @pmu_set_sleep_clk(i32 15, i32 0, i32 1, i32 1)
%3 = tail call i32 @mbus_remote_register_write(i32 6, i32 5, i32 2117)
%4 = tail call i32 @delay(i32 100)
%5 = tail call i32 @pmu_set_sar_override(i32 60)
%6 = tail call i32 @pmu_set_adc_period(i32 1)
ret void
}
unsigned int get_resume_method(void) { return 0; }


x86 assembly (clang, -O0):
<get_resume_method>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_resume_method>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_resume_method() {
ret i32 0
}

LLVM IR (-O2):
define i32 @get_resume_method() {
ret i32 0
}
/* Type definitions */
struct ideDevice {
  int dummy;
};
struct device {
  int dummy;
};

/* Variables and functions */
int compareDevice(struct device *, struct device *);
int ideCompareDevice(struct ideDevice *dev1, struct ideDevice *dev2) {
  return compareDevice((struct device *)dev1, (struct device *)dev2);
}


x86 assembly (clang, -O0):
<ideCompareDevice>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <compareDevice@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ideCompareDevice>:
jmp    1030 <compareDevice@plt>

LLVM IR (-O0):
%struct.ideDevice = type { i32 }
%struct.device = type { i32 }
define i32 @ideCompareDevice(%struct.ideDevice* %0, %struct.ideDevice* %1) {
%3 = alloca %struct.ideDevice*
%4 = alloca %struct.ideDevice*
store %struct.ideDevice* %0, %struct.ideDevice** %3
store %struct.ideDevice* %1, %struct.ideDevice** %4
%5 = load %struct.ideDevice*, %struct.ideDevice** %3
%6 = bitcast %struct.ideDevice* %5 to %struct.device*
%7 = load %struct.ideDevice*, %struct.ideDevice** %4
%8 = bitcast %struct.ideDevice* %7 to %struct.device*
%9 = call i32 @compareDevice(%struct.device* %6, %struct.device* %8)
ret i32 %9
}

LLVM IR (-O2):
%struct.ideDevice = type { i32 }
%struct.device = type { i32 }
define i32 @ideCompareDevice(%struct.ideDevice* %0, %struct.ideDevice* %1) {
%3 = bitcast %struct.ideDevice* %0 to %struct.device*
%4 = bitcast %struct.ideDevice* %1 to %struct.device*
%5 = tail call i32 @compareDevice(%struct.device* %3, %struct.device* %4)
ret i32 %5
}
char *v_name(int x) {
  static char s[5] = "-2-7";
  int i = x % 8;
  s[2] = s[0] = 'A' + i;
  return s;
}


x86 assembly (clang, -O0):
<v_name>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x41,%eax
mov    %al,0x2eff(%rip)
mov    %al,0x2efb(%rip)
lea    0x2ef2(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<v_name>:
lea    0x7(%rdi),%eax
test   %edi,%edi
cmovns %edi,%eax
and    $0xf8,%eax
sub    %eax,%edi
add    $0x41,%dil
mov    %dil,0x2f06(%rip)
lea    0x2eff(%rip),%rax
mov    %dil,0x2efa(%rip)
ret

LLVM IR (-O0):
@v_name.s = internal global [5 x i8] c"-2-7\00"
define i8* @v_name(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = srem i32 %4, 8
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = add nsw i32 65, %6
%8 = trunc i32 %7 to i8
store i8 %8, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @v_name.s, i64 0, i64 0)
store i8 %8, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @v_name.s, i64 0, i64 2)
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @v_name.s, i64 0, i64 0)
}

LLVM IR (-O2):
@v_name.s = internal global [5 x i8] c"-2-7\00"
define i8* @v_name(i32 %0) {
%2 = srem i32 %0, 8
%3 = trunc i32 %2 to i8
%4 = add nsw i8 %3, 65
store i8 %4, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @v_name.s, i64 0, i64 0)
store i8 %4, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @v_name.s, i64 0, i64 2)
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @v_name.s, i64 0, i64 0)
}
/* Type definitions */
struct tuntap {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ close_tun_generic(struct tuntap *);
int /*<<< orphan*/ free(struct tuntap *);
void close_tun(struct tuntap *tt) {
  if (tt) {
    close_tun_generic(tt);
    free(tt);
  }
}


x86 assembly (clang, -O0):
<close_tun>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1149 <close_tun+0x29>
mov    -0x8(%rbp),%rdi
call   1040 <close_tun_generic@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_tun>:
test   %rdi,%rdi
je     1137 <close_tun+0x17>
push   %rbx
mov    %rdi,%rbx
call   1040 <close_tun_generic@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
%struct.tuntap = type { i32 }
define void @close_tun(%struct.tuntap* %0) {
%2 = alloca %struct.tuntap*
store %struct.tuntap* %0, %struct.tuntap** %2
%3 = load %struct.tuntap*, %struct.tuntap** %2
%4 = icmp ne %struct.tuntap* %3, null
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load %struct.tuntap*, %struct.tuntap** %2
%7 = call i32 @close_tun_generic(%struct.tuntap* %6)
%8 = load %struct.tuntap*, %struct.tuntap** %2
%9 = call i32 @free(%struct.tuntap* %8)
br label %10
10: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
%struct.tuntap = type { i32 }
define void @close_tun(%struct.tuntap* %0) {
%2 = icmp eq %struct.tuntap* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i32 @close_tun_generic(%struct.tuntap* %0)
%5 = tail call i32 @free(%struct.tuntap* %0)
br label %6
6: ; preds = %3, %1
ret void
}
/* Type definitions */
struct jit_state {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ emit4(struct jit_state *, int /*<<< orphan*/);
int /*<<< orphan*/ emit_alu32(struct jit_state *, int, int, int);
void emit_alu32_imm32(struct jit_state *state, int op, int src, int dst,
                      int32_t imm) {
  emit_alu32(state, op, src, dst);
  emit4(state, imm);
}


x86 assembly (clang, -O0):
<emit_alu32_imm32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x14(%rbp),%ecx
call   1030 <emit_alu32@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%esi
call   1040 <emit4@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_alu32_imm32>:
push   %rbp
push   %rbx
push   %rax
mov    %r8d,%ebp
mov    %rdi,%rbx
call   1030 <emit_alu32@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <emit4@plt>

LLVM IR (-O0):
%struct.jit_state = type { i32 }
define void @emit_alu32_imm32(%struct.jit_state* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca %struct.jit_state*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store %struct.jit_state* %0, %struct.jit_state** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load %struct.jit_state*, %struct.jit_state** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = call i32 @emit_alu32(%struct.jit_state* %11, i32 %12, i32 %13, i32 %14)
%16 = load %struct.jit_state*, %struct.jit_state** %6
%17 = load i32, i32* %10
%18 = call i32 @emit4(%struct.jit_state* %16, i32 %17)
ret void
}

LLVM IR (-O2):
%struct.jit_state = type { i32 }
define void @emit_alu32_imm32(%struct.jit_state* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @emit_alu32(%struct.jit_state* %0, i32 %1, i32 %2, i32 %3)
%7 = tail call i32 @emit4(%struct.jit_state* %0, i32 %4)
ret void
}
int fun915() { return 915; }


x86 assembly (clang, -O0):
<fun915>:
push   %rbp
mov    %rsp,%rbp
mov    $0x393,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun915>:
mov    $0x393,%eax
ret

LLVM IR (-O0):
define i32 @fun915() {
ret i32 915
}

LLVM IR (-O2):
define i32 @fun915() {
ret i32 915
}
int svz_pipe_cleanup(void) { return 0; }


x86 assembly (clang, -O0):
<svz_pipe_cleanup>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<svz_pipe_cleanup>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @svz_pipe_cleanup() {
ret i32 0
}

LLVM IR (-O2):
define i32 @svz_pipe_cleanup() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
main() {
  while (1) {
    sleep(86400);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x15180,%edi
call   1030 <sleep@plt>
jmp    111f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x15180,%edi
call   1030 <sleep@plt>
jmp    1120 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0, %2
%3 = call i32 @sleep(i32 86400)
br label %2
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 @sleep(i32 86400)
br label %1
}