#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ fvec_mul_by(float *, long, int);
double fvec_norm(float *, long, double);
int fvecs_normalize(float *v, long n, long d, double norm) {
  int i, nNaN = 0;
  if (norm == 0) {
    return 0;
  }
  for (i = 0; i < n; i++) {
    double nr = fvec_norm(v + i * d, d, norm);
    if (nr == 0) {
      nNaN++;
    }
    fvec_mul_by(v + i * d, d, 1 / nr);
  }
  return nNaN;
}


x86 assembly (clang, -O0):
<fvecs_normalize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
movsd  %xmm0,-0x28(%rbp)
movl   $0x0,-0x30(%rbp)
movsd  -0x28(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    1164 <fvecs_normalize+0x44>
jp     1164 <fvecs_normalize+0x44>
movl   $0x0,-0x4(%rbp)
jmp    1203 <fvecs_normalize+0xe3>
movl   $0x0,-0x2c(%rbp)
movslq -0x2c(%rbp),%rax
cmp    -0x18(%rbp),%rax
jge    11fd <fvecs_normalize+0xdd>
mov    -0x10(%rbp),%rdi
movslq -0x2c(%rbp),%rax
imul   -0x20(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rdi
mov    -0x20(%rbp),%rsi
movsd  -0x28(%rbp),%xmm0
call   1030 <fvec_norm@plt>
movsd  %xmm0,-0x38(%rbp)
movsd  -0x38(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    11c1 <fvecs_normalize+0xa1>
jp     11c1 <fvecs_normalize+0xa1>
mov    -0x30(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x30(%rbp)
mov    -0x10(%rbp),%rdi
movslq -0x2c(%rbp),%rax
imul   -0x20(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rdi
mov    -0x20(%rbp),%rsi
movsd  0xe1f(%rip),%xmm0
divsd  -0x38(%rbp),%xmm0
cvttsd2si %xmm0,%edx
call   1040 <fvec_mul_by@plt>
mov    -0x2c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x2c(%rbp)
jmp    116b <fvecs_normalize+0x4b>
mov    -0x30(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fvecs_normalize>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
sub    $0x10,%rsp
xor    %r15d,%r15d
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    113b <fvecs_normalize+0x1b>
jnp    11a6 <fvecs_normalize+0x86>
mov    %rsi,%rbx
test   %rsi,%rsi
jle    11a6 <fvecs_normalize+0x86>
mov    %rdx,%r14
mov    %rdi,%rbp
lea    0x0(,%rdx,4),%r12
xor    %r15d,%r15d
movsd  %xmm0,0x8(%rsp)
nopw   0x0(%rax,%rax,1)
mov    %rbp,%rdi
mov    %r14,%rsi
call   1030 <fvec_norm@plt>
movsd  0xe8d(%rip),%xmm1
divsd  %xmm0,%xmm1
cmpeqsd 0xe88(%rip),%xmm0
movq   %xmm0,%rax
sub    %eax,%r15d
cvttsd2si %xmm1,%edx
mov    %rbp,%rdi
mov    %r14,%rsi
call   1040 <fvec_mul_by@plt>
movsd  0x8(%rsp),%xmm0
add    %r12,%rbp
add    $0xffffffffffffffff,%rbx
jne    1160 <fvecs_normalize+0x40>
mov    %r15d,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fvecs_normalize(float* %0, i64 %1, i64 %2, double %3) {
%5 = alloca i32
%6 = alloca float*
%7 = alloca i64
%8 = alloca i64
%9 = alloca double
%10 = alloca i32
%11 = alloca i32
%12 = alloca double
store float* %0, float** %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store double %3, double* %9
store i32 0, i32* %11
%13 = load double, double* %9
%14 = fcmp oeq double %13, 0.000000e+00
br i1 %14, label %15, label %16
15: ; preds = %4
store i32 0, i32* %5
br label %54
16: ; preds = %4
store i32 0, i32* %10
br label %17
17: ; preds = %49, %16
%18 = load i32, i32* %10
%19 = sext i32 %18 to i64
%20 = load i64, i64* %7
%21 = icmp slt i64 %19, %20
br i1 %21, label %22, label %52
22: ; preds = %17
%23 = load float*, float** %6
%24 = load i32, i32* %10
%25 = sext i32 %24 to i64
%26 = load i64, i64* %8
%27 = mul nsw i64 %25, %26
%28 = getelementptr inbounds float, float* %23, i64 %27
%29 = load i64, i64* %8
%30 = load double, double* %9
%31 = call double @fvec_norm(float* %28, i64 %29, double %30)
store double %31, double* %12
%32 = load double, double* %12
%33 = fcmp oeq double %32, 0.000000e+00
br i1 %33, label %34, label %37
34: ; preds = %22
%35 = load i32, i32* %11
%36 = add nsw i32 %35, 1
store i32 %36, i32* %11
br label %37
37: ; preds = %34, %22
%38 = load float*, float** %6
%39 = load i32, i32* %10
%40 = sext i32 %39 to i64
%41 = load i64, i64* %8
%42 = mul nsw i64 %40, %41
%43 = getelementptr inbounds float, float* %38, i64 %42
%44 = load i64, i64* %8
%45 = load double, double* %12
%46 = fdiv double 1.000000e+00, %45
%47 = fptosi double %46 to i32
%48 = call i32 @fvec_mul_by(float* %43, i64 %44, i32 %47)
br label %49
49: ; preds = %37
%50 = load i32, i32* %10
%51 = add nsw i32 %50, 1
store i32 %51, i32* %10
br label %17
52: ; preds = %17
%53 = load i32, i32* %11
store i32 %53, i32* %5
br label %54
54: ; preds = %52, %15
%55 = load i32, i32* %5
ret i32 %55
}

LLVM IR (-O2):
define i32 @fvecs_normalize(float* %0, i64 %1, i64 %2, double %3) {
%5 = fcmp une double %3, 0.000000e+00
%6 = icmp sgt i64 %1, 0
%7 = and i1 %5, %6
br i1 %7, label %8, label %22
8: ; preds = %4, %8
%9 = phi i64 [ %20, %8 ], [ 0, %4 ]
%10 = phi i32 [ %16, %8 ], [ 0, %4 ]
%11 = mul nsw i64 %9, %2
%12 = getelementptr inbounds float, float* %0, i64 %11
%13 = tail call double @fvec_norm(float* %12, i64 %2, double %3)
%14 = fcmp oeq double %13, 0.000000e+00
%15 = zext i1 %14 to i32
%16 = add nuw nsw i32 %10, %15
%17 = fdiv double 1.000000e+00, %13
%18 = fptosi double %17 to i32
%19 = tail call i32 @fvec_mul_by(float* %12, i64 %2, i32 %18)
%20 = add nuw nsw i64 %9, 1
%21 = icmp eq i64 %20, %1
br i1 %21, label %22, label %8
22: ; preds = %8, %4
%23 = phi i32 [ 0, %4 ], [ %16, %8 ]
ret i32 %23
}