void FlashSetup(unsigned char ucFlashWaitState) {
  unsigned long ulMWRAllow;
  unsigned int i = 0;
  ulMWRAllow = (*((volatile unsigned long *)(0x400FB980)));
  (*((volatile unsigned long *)(0x400FB980))) = 0xA5A5A5A5;
  (*((volatile unsigned long *)(0x400FA000 + 0x00000048))) |= 0x00000001;
  (*((volatile unsigned long *)(0x400FA000 + 0x00000040))) |= 0x00000003;
  (*((volatile unsigned long *)(0x400FA000 + 0x00000300))) = 0;
  (*((volatile unsigned long *)(0x400FA000 + 0x00000000))) =
      (ucFlashWaitState << 8);
  (*((volatile unsigned long *)(0x400FA000 + 0x00000300))) |= 0x00000001;
  (*((volatile unsigned long *)(0x400FA000 + 0x00000300))) |= 0x00000002;
  (*((volatile unsigned long *)(0x400FA600 + 0x00000000))) = 0xA;
  (*((volatile unsigned long *)(0x400FB980))) = ulMWRAllow;
  for (i = 0; i < 7; i++) {
    __asm(" NOP");
  }
}


x86 assembly (clang, -O0):
<FlashSetup>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movl   $0x0,-0x14(%rbp)
mov    $0x400fb980,%eax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    $0x400fb980,%eax
mov    $0xa5a5a5a5,%ecx
mov    %rcx,(%rax)
mov    $0x400fa048,%eax
mov    (%rax),%rcx
or     $0x1,%rcx
mov    $0x400fa048,%eax
mov    %rcx,(%rax)
mov    $0x400fa040,%eax
mov    (%rax),%rcx
or     $0x3,%rcx
mov    $0x400fa040,%eax
mov    %rcx,(%rax)
mov    $0x400fa300,%eax
movq   $0x0,(%rax)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movslq %eax,%rcx
mov    $0x400fa000,%eax
mov    %rcx,(%rax)
mov    $0x400fa300,%eax
mov    (%rax),%rcx
or     $0x1,%rcx
mov    $0x400fa300,%eax
mov    %rcx,(%rax)
mov    $0x400fa300,%eax
mov    (%rax),%rcx
or     $0x2,%rcx
mov    $0x400fa300,%eax
mov    %rcx,(%rax)
mov    $0x400fa600,%eax
movq   $0xa,(%rax)
mov    -0x10(%rbp),%rcx
mov    $0x400fb980,%eax
mov    %rcx,(%rax)
movl   $0x0,-0x14(%rbp)
cmpl   $0x7,-0x14(%rbp)
jae    11d0 <FlashSetup+0xd0>
nop
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    11b7 <FlashSetup+0xb7>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FlashSetup>:
mov    0x400fb980,%rax
40
mov    $0xa5a5a5a5,%ecx
mov    %rcx,0x400fb980
40
orq    $0x1,0x400fa048
40 01
orq    $0x3,0x400fa040
40 03
movq   $0x0,0x400fa300
mov    %edi,%ecx
shl    $0x8,%rcx
mov    %rcx,0x400fa000
40
orq    $0x1,0x400fa300
40 01
orq    $0x2,0x400fa300
40 02
movq   $0xa,0x400fa600
mov    %rax,0x400fb980
40
nop
nop
nop
nop
nop
nop
nop
ret

LLVM IR (-O0):
define void @FlashSetup(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i64
%4 = alloca i32
store i8 %0, i8* %2
store i32 0, i32* %4
%5 = load volatile i64, i64* inttoptr (i64 1074772352 to i64*)
store i64 %5, i64* %3
store volatile i64 2779096485, i64* inttoptr (i64 1074772352 to i64*)
%6 = load volatile i64, i64* inttoptr (i64 1074765896 to i64*)
%7 = or i64 %6, 1
store volatile i64 %7, i64* inttoptr (i64 1074765896 to i64*)
%8 = load volatile i64, i64* inttoptr (i64 1074765888 to i64*)
%9 = or i64 %8, 3
store volatile i64 %9, i64* inttoptr (i64 1074765888 to i64*)
store volatile i64 0, i64* inttoptr (i64 1074766592 to i64*)
%10 = load i8, i8* %2
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = sext i32 %12 to i64
store volatile i64 %13, i64* inttoptr (i64 1074765824 to i64*)
%14 = load volatile i64, i64* inttoptr (i64 1074766592 to i64*)
%15 = or i64 %14, 1
store volatile i64 %15, i64* inttoptr (i64 1074766592 to i64*)
%16 = load volatile i64, i64* inttoptr (i64 1074766592 to i64*)
%17 = or i64 %16, 2
store volatile i64 %17, i64* inttoptr (i64 1074766592 to i64*)
store volatile i64 10, i64* inttoptr (i64 1074767360 to i64*)
%18 = load i64, i64* %3
store volatile i64 %18, i64* inttoptr (i64 1074772352 to i64*)
store i32 0, i32* %4
br label %19
19: ; preds = %23, %1
%20 = load i32, i32* %4
%21 = icmp ult i32 %20, 7
br i1 %21, label %22, label %26
22: ; preds = %19
br label %23
23: ; preds = %22
%24 = load i32, i32* %4
%25 = add i32 %24, 1
store i32 %25, i32* %4
br label %19
26: ; preds = %19
ret void
}

LLVM IR (-O2):
define void @FlashSetup(i8 zeroext %0) {
%2 = load volatile i64, i64* inttoptr (i64 1074772352 to i64*)
store volatile i64 2779096485, i64* inttoptr (i64 1074772352 to i64*)
%3 = load volatile i64, i64* inttoptr (i64 1074765896 to i64*)
%4 = or i64 %3, 1
store volatile i64 %4, i64* inttoptr (i64 1074765896 to i64*)
%5 = load volatile i64, i64* inttoptr (i64 1074765888 to i64*)
%6 = or i64 %5, 3
store volatile i64 %6, i64* inttoptr (i64 1074765888 to i64*)
store volatile i64 0, i64* inttoptr (i64 1074766592 to i64*)
%7 = zext i8 %0 to i64
%8 = shl nuw nsw i64 %7, 8
store volatile i64 %8, i64* inttoptr (i64 1074765824 to i64*)
%9 = load volatile i64, i64* inttoptr (i64 1074766592 to i64*)
%10 = or i64 %9, 1
store volatile i64 %10, i64* inttoptr (i64 1074766592 to i64*)
%11 = load volatile i64, i64* inttoptr (i64 1074766592 to i64*)
%12 = or i64 %11, 2
store volatile i64 %12, i64* inttoptr (i64 1074766592 to i64*)
store volatile i64 10, i64* inttoptr (i64 1074767360 to i64*)
store volatile i64 %2, i64* inttoptr (i64 1074772352 to i64*)
tail call void asm sideeffect " NOP", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect " NOP", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect " NOP", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect " NOP", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect " NOP", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect " NOP", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect " NOP", "~{dirflag},~{fpsr},~{flags}"()
ret void
}