#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
void ADCSequenceDisable(unsigned long ulBase, unsigned long ulSequenceNum) {
  DEBUG_ASSERT((ulBase == 0x40038000) || (ulBase == 0x40039000));
  DEBUG_ASSERT(ulSequenceNum < 4);
  (*((volatile unsigned long *)(ulBase + 0x00000000))) &= ~(1 << ulSequenceNum);
}


x86 assembly (clang, -O0):
<ADCSequenceDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%al
cmpq   $0x40038000,-0x8(%rbp)
40
mov    %al,-0x11(%rbp)
je     1141 <ADCSequenceDisable+0x31>
cmpq   $0x40039000,-0x8(%rbp)
40
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
cmpq   $0x4,-0x10(%rbp)
setb   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
movslq %eax,%rdx
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
and    %rdx,%rcx
mov    %rcx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCSequenceDisable>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rdi,%rax
and    $0xffffffffffffefff,%rax
xor    %edi,%edi
cmp    $0x40038000,%rax
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
xor    %edi,%edi
cmp    $0x4,%rbx
setb   %dil
call   1030 <DEBUG_ASSERT@plt>
mov    $0xfffffffe,%eax
mov    %ebx,%ecx
rol    %cl,%eax
cltq
and    %rax,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @ADCSequenceDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 1073971200
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i64, i64* %3
%9 = icmp eq i64 %8, 1073975296
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ true, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
%13 = call i32 @DEBUG_ASSERT(i32 %12)
%14 = load i64, i64* %4
%15 = icmp ult i64 %14, 4
%16 = zext i1 %15 to i32
%17 = call i32 @DEBUG_ASSERT(i32 %16)
%18 = load i64, i64* %4
%19 = trunc i64 %18 to i32
%20 = shl i32 1, %19
%21 = xor i32 %20, -1
%22 = sext i32 %21 to i64
%23 = load i64, i64* %3
%24 = add i64 %23, 0
%25 = inttoptr i64 %24 to i64*
%26 = load volatile i64, i64* %25
%27 = and i64 %26, %22
store volatile i64 %27, i64* %25
ret void
}

LLVM IR (-O2):
define void @ADCSequenceDisable(i64 %0, i64 %1) {
%3 = and i64 %0, -4097
%4 = icmp eq i64 %3, 1073971200
%5 = zext i1 %4 to i32
%6 = tail call i32 @DEBUG_ASSERT(i32 %5)
%7 = icmp ult i64 %1, 4
%8 = zext i1 %7 to i32
%9 = tail call i32 @DEBUG_ASSERT(i32 %8)
%10 = trunc i64 %1 to i32
%11 = shl nuw i32 1, %10
%12 = xor i32 %11, -1
%13 = sext i32 %12 to i64
%14 = inttoptr i64 %0 to i64*
%15 = load volatile i64, i64* %14
%16 = and i64 %15, %13
store volatile i64 %16, i64* %14
ret void
}