xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t __u32_hash(void *a) { return *(uint32_t *)a; }


x86 assembly (clang, -O0):
<__u32_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__u32_hash>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @__u32_hash(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @__u32_hash(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
ret i32 %3
}
int internal_round_i(int value) { return value; }


x86 assembly (clang, -O0):
<internal_round_i>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<internal_round_i>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @internal_round_i(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @internal_round_i(i32 returned %0) {
ret i32 %0
}
int toDigit(char c) { return c - '0'; }


x86 assembly (clang, -O0):
<toDigit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
sub    $0x30,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<toDigit>:
lea    -0x30(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @toDigit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = sub nsw i32 %4, 48
ret i32 %5
}

LLVM IR (-O2):
define i32 @toDigit(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add nsw i32 %2, -48
ret i32 %3
}
int expect_float_sum(float (*f)(float, float)) {
  return f(20.0f, 22.0f) == 42.0f;
}


x86 assembly (clang, -O0):
<expect_float_sum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movss  0xef0(%rip),%xmm0
movss  0xeec(%rip),%xmm1
call   *-0x8(%rbp)
movss  0xed9(%rip),%xmm1
ucomiss %xmm1,%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expect_float_sum>:
push   %rax
movss  0xef7(%rip),%xmm0
movss  0xef3(%rip),%xmm1
call   *%rdi
cmpeqss 0xeec(%rip),%xmm0
movd   %xmm0,%eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @expect_float_sum(float (float, float)* %0) {
%2 = alloca float (float, float)*
store float (float, float)* %0, float (float, float)** %2
%3 = load float (float, float)*, float (float, float)** %2
%4 = call float %3(float 2.000000e+01, float 2.200000e+01)
%5 = fcmp oeq float %4, 4.200000e+01
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @expect_float_sum(float (float, float)* nocapture %0) {
%2 = tail call float %0(float 2.000000e+01, float 2.200000e+01)
%3 = fcmp oeq float %2, 4.200000e+01
%4 = zext i1 %3 to i32
ret i32 %4
}
int atoi(const char *s) {
  int n = 0;
  while (*s >= '0' && *s <= '9') {
    n = n * 10 + *s++ - '0';
  }
  return n;
}


x86 assembly (clang, -O0):
<atoi>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0xd(%rbp)
jl     1134 <atoi+0x34>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1144 <atoi+0x44>
jmp    1167 <atoi+0x67>
imul   $0xa,-0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movsbl (%rcx),%ecx
add    %ecx,%eax
sub    $0x30,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <atoi+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atoi>:
mov    (%rdi),%cl
lea    -0x30(%rcx),%edx
xor    %eax,%eax
cmp    $0x9,%dl
ja     113b <atoi+0x3b>
add    $0x1,%rdi
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl %cl,%ecx
lea    (%rax,%rax,4),%eax
lea    (%rcx,%rax,2),%eax
add    $0xffffffd0,%eax
movzbl (%rdi),%ecx
lea    -0x30(%rcx),%edx
add    $0x1,%rdi
cmp    $0xa,%dl
jb     1120 <atoi+0x20>
ret

LLVM IR (-O0):
define i32 @atoi(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %16, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp sge i32 %7, 48
br i1 %8, label %9, label %14
9: ; preds = %4
%10 = load i8*, i8** %2
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp sle i32 %12, 57
br label %14
14: ; preds = %9, %4
%15 = phi i1 [ false, %4 ], [ %13, %9 ]
br i1 %15, label %16, label %25
16: ; preds = %14
%17 = load i32, i32* %3
%18 = mul nsw i32 %17, 10
%19 = load i8*, i8** %2
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %2
%21 = load i8, i8* %19
%22 = sext i8 %21 to i32
%23 = add nsw i32 %18, %22
%24 = sub nsw i32 %23, 48
store i32 %24, i32* %3
br label %4
25: ; preds = %14
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @atoi(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = add i8 %2, -48
%4 = icmp ult i8 %3, 10
br i1 %4, label %5, label %17
5: ; preds = %1, %5
%6 = phi i8 [ %14, %5 ], [ %2, %1 ]
%7 = phi i32 [ %13, %5 ], [ 0, %1 ]
%8 = phi i8* [ %11, %5 ], [ %0, %1 ]
%9 = zext i8 %6 to i32
%10 = mul nsw i32 %7, 10
%11 = getelementptr inbounds i8, i8* %8, i64 1
%12 = add i32 %10, -48
%13 = add i32 %12, %9
%14 = load i8, i8* %11
%15 = add i8 %14, -48
%16 = icmp ult i8 %15, 10
br i1 %16, label %5, label %17
17: ; preds = %5, %1
%18 = phi i32 [ 0, %1 ], [ %13, %5 ]
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ printopts(int, char *, char *);
int /*<<< orphan*/ puts(char *);
void printhelp_game() {
  puts("Game options:");
  printopts(15, "Single-player game",
            "mode 1	%s\n"
            "mode 1b	%s in B-type mode\n"
            "level 0-9	Starting level\n"
            "height 0-5	Height of garbage blocks at beginning\n"
            "lines N	Lines limit (B-type mode)\n"
            "rotate 0-3	Rotation system\n"
            "softdrop N	Softdrop speed (drop N rows)\n");
}


x86 assembly (clang, -O0):
<printhelp_game>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <puts@plt>
mov    $0xf,%edi
lea    0xed2(%rip),%rsi
lea    0xede(%rip),%rdx
call   1040 <printopts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<printhelp_game>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeda(%rip),%rsi
lea    0xee6(%rip),%rdx
mov    $0xf,%edi
pop    %rax
jmp    1040 <printopts@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"Game options:\00"
@.str.1 = [19 x i8] c"Single-player game\00"
@.str.2 = [212 x i8] c"mode 1\09%s\0Amode 1b\09%s in B-type mode\0Alevel 0-9\09Starting level\0Aheight 0-5\09Height of garbage blocks at beginning\0Alines N\09Lines limit (B-type mode)\0Arotate 0-3\09Rotation system\0Asoftdrop N\09Softdrop speed (drop N rows)\0A\00"
define void @printhelp_game() {
%1 = call i32 @puts(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printopts(i32 15, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([212 x i8], [212 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"Game options:\00"
@.str.1 = [19 x i8] c"Single-player game\00"
@.str.2 = [212 x i8] c"mode 1\09%s\0Amode 1b\09%s in B-type mode\0Alevel 0-9\09Starting level\0Aheight 0-5\09Height of garbage blocks at beginning\0Alines N\09Lines limit (B-type mode)\0Arotate 0-3\09Rotation system\0Asoftdrop N\09Softdrop speed (drop N rows)\0A\00"
define void @printhelp_game() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printopts(i32 15, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([212 x i8], [212 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Type definitions */
struct xx {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ free(struct xx *);
struct xx *malloc(int);
void mallocExit(int *g) {
  struct xx *p = malloc(12);
  if (g != 0)
    exit(1);
  free(p);
  return;
}


x86 assembly (clang, -O0):
<mallocExit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xc,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     115f <mallocExit+0x2f>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mallocExit>:
push   %rbx
mov    %rdi,%rbx
mov    $0xc,%edi
call   1040 <malloc@plt>
test   %rbx,%rbx
jne    114c <mallocExit+0x1c>
mov    %rax,%rdi
pop    %rbx
jmp    1030 <free@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
%struct.xx = type { i32 }
define void @mallocExit(i32* %0) {
%2 = alloca i32*
%3 = alloca %struct.xx*
store i32* %0, i32** %2
%4 = call %struct.xx* @malloc(i32 12)
store %struct.xx* %4, %struct.xx** %3
%5 = load i32*, i32** %2
%6 = icmp ne i32* %5, null
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @exit(i32 1)
unreachable
9: ; preds = %1
%10 = load %struct.xx*, %struct.xx** %3
%11 = call i32 @free(%struct.xx* %10)
ret void
}

LLVM IR (-O2):
%struct.xx = type { i32 }
define void @mallocExit(i32* readnone %0) {
%2 = tail call %struct.xx* @malloc(i32 12)
%3 = icmp eq i32* %0, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @exit(i32 1)
unreachable
6: ; preds = %1
%7 = tail call i32 @free(%struct.xx* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int fn_arg_int_ptr(int *i) {
  printf("passed value is %d\n", *i);
  *i = 100;
  return 0;
}


x86 assembly (clang, -O0):
<fn_arg_int_ptr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
movl   $0x64,(%rax)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_arg_int_ptr>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%esi
lea    0xee3(%rip),%rdi
call   1030 <printf@plt>
movl   $0x64,(%rbx)
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"passed value is %d\0A\00"
define i32 @fn_arg_int_ptr(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = load i32*, i32** %2
store i32 100, i32* %6
ret i32 0
}

LLVM IR (-O2):
@.str = [20 x i8] c"passed value is %d\0A\00"
define i32 @fn_arg_int_ptr(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %2)
store i32 100, i32* %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ init_connect_and_pin_masks();
int /*<<< orphan*/ init_king_moves();
int /*<<< orphan*/ init_knight_moves();
int /*<<< orphan*/ init_pawn_captures();
int /*<<< orphan*/ init_xrays();
int /*<<< orphan*/ initmagicmoves();
void init_movegen(void) {
  initmagicmoves();
  init_xrays();
  init_connect_and_pin_masks();
  init_pawn_captures();
  init_knight_moves();
  init_king_moves();
}


x86 assembly (clang, -O0):
<init_movegen>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <initmagicmoves@plt>
mov    $0x0,%al
call   1030 <init_xrays@plt>
mov    $0x0,%al
call   1060 <init_connect_and_pin_masks@plt>
mov    $0x0,%al
call   1080 <init_pawn_captures@plt>
mov    $0x0,%al
call   1070 <init_knight_moves@plt>
mov    $0x0,%al
call   1050 <init_king_moves@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_movegen>:
push   %rax
xor    %eax,%eax
call   1040 <initmagicmoves@plt>
xor    %eax,%eax
call   1030 <init_xrays@plt>
xor    %eax,%eax
call   1060 <init_connect_and_pin_masks@plt>
xor    %eax,%eax
call   1080 <init_pawn_captures@plt>
xor    %eax,%eax
call   1070 <init_knight_moves@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <init_king_moves@plt>

LLVM IR (-O0):
define void @init_movegen() {
%1 = call i32 (...) @initmagicmoves()
%2 = call i32 (...) @init_xrays()
%3 = call i32 (...) @init_connect_and_pin_masks()
%4 = call i32 (...) @init_pawn_captures()
%5 = call i32 (...) @init_knight_moves()
%6 = call i32 (...) @init_king_moves()
ret void
}

LLVM IR (-O2):
define void @init_movegen() {
%1 = tail call i32 (...) @initmagicmoves()
%2 = tail call i32 (...) @init_xrays()
%3 = tail call i32 (...) @init_connect_and_pin_masks()
%4 = tail call i32 (...) @init_pawn_captures()
%5 = tail call i32 (...) @init_knight_moves()
%6 = tail call i32 (...) @init_king_moves()
ret void
}
/* Variables and functions */
float stress_funccall_float_1(float const);
float stress_funcdeep_float_3(float const, float const, float const);
float __attribute__((no))
stress_funcdeep_float_4(const float a, const float b, const float c,
                        const float d) {
  return stress_funcdeep_float_3(d, c, b) + stress_funccall_float_1(a);
}


x86 assembly (clang, -O0):
<stress_funcdeep_float_4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
movss  -0x8(%rbp),%xmm2
call   1030 <stress_funcdeep_float_3@plt>
movss  %xmm0,-0x14(%rbp)
movss  -0x4(%rbp),%xmm0
call   1040 <stress_funccall_float_1@plt>
movaps %xmm0,%xmm1
movss  -0x14(%rbp),%xmm0
addss  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stress_funcdeep_float_4>:
push   %rax
movaps %xmm1,%xmm4
movss  %xmm0,0x4(%rsp)
movaps %xmm3,%xmm0
movaps %xmm2,%xmm1
movaps %xmm4,%xmm2
call   1030 <stress_funcdeep_float_3@plt>
movss  %xmm0,(%rsp)
movss  0x4(%rsp),%xmm0
call   1040 <stress_funccall_float_1@plt>
addss  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @stress_funcdeep_float_4(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %8
%10 = load float, float* %7
%11 = load float, float* %6
%12 = call float @stress_funcdeep_float_3(float %9, float %10, float %11)
%13 = load float, float* %5
%14 = call float @stress_funccall_float_1(float %13)
%15 = fadd float %12, %14
ret float %15
}

LLVM IR (-O2):
define float @stress_funcdeep_float_4(float %0, float %1, float %2, float %3) {
%5 = tail call float @stress_funcdeep_float_3(float %3, float %2, float %1)
%6 = tail call float @stress_funccall_float_1(float %0)
%7 = fadd float %5, %6
ret float %7
}
void swp(char *a, char *b) {
  char t = *a;
  *a = *b;
  *b = t;
}


x86 assembly (clang, -O0):
<swp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x11(%rbp),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swp>:
mov    (%rdi),%al
mov    (%rsi),%cl
mov    %cl,(%rdi)
mov    %al,(%rsi)
ret

LLVM IR (-O0):
define void @swp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
store i8 %7, i8* %5
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = load i8*, i8** %3
store i8 %9, i8* %10
%11 = load i8, i8* %5
%12 = load i8*, i8** %4
store i8 %11, i8* %12
ret void
}

LLVM IR (-O2):
define void @swp(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
store i8 %4, i8* %0
store i8 %3, i8* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void *tc(void *arg) {
  (void)arg;
  printf("tc: running\n");
  return 0;
}


x86 assembly (clang, -O0):
<tc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tc>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"tc: running\0A\00"
define i8* @tc(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i8* null
}

LLVM IR (-O2):
@str = [12 x i8] c"tc: running\00"
define noalias i8* @tc(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret i8* null
}
TEST(testX, first) { ASSERT_TRUE(X(2, 3) == 6); }


x86 assembly (clang, -O0):
<TEST>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x2,%edi
mov    $0x3,%esi
mov    $0x0,%al
call   1030 <X@plt>
cmp    $0x6,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
mov    $0x0,%al
call   1040 <ASSERT_TRUE@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TEST>:
push   %rax
mov    $0x2,%edi
mov    $0x3,%esi
xor    %eax,%eax
call   1030 <X@plt>
xor    %edi,%edi
cmp    $0x6,%eax
sete   %dil
xor    %eax,%eax
pop    %rcx
jmp    1040 <ASSERT_TRUE@plt>

LLVM IR (-O0):
define i32 @TEST(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (i32, i32, ...) bitcast (i32 (...)* @X to i32 (i32, i32, ...)*)(i32 2, i32 3)
%7 = icmp eq i32 %6, 6
%8 = zext i1 %7 to i32
%9 = call i32 (i32, ...) bitcast (i32 (...)* @ASSERT_TRUE to i32 (i32, ...)*)(i32 %8)
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @TEST(i32 %0, i32 %1) {
%3 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @X to i32 (i32, i32, ...)*)(i32 2, i32 3)
%4 = icmp eq i32 %3, 6
%5 = zext i1 %4 to i32
%6 = tail call i32 (i32, ...) bitcast (i32 (...)* @ASSERT_TRUE to i32 (i32, ...)*)(i32 %5)
ret i32 undef
}
main() {
  int f();
  int f();
  int f();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void mtcp_abort(void) {
  asm volatile("hlt ; xor %rax,%rax ; mov (%rax),%rax");
  for (;;)
    ;
}


x86 assembly (clang, -O0):
<mtcp_abort>:
push   %rbp
mov    %rsp,%rbp
hlt
xor    %rax,%rax
mov    (%rax),%rax
jmp    110b <mtcp_abort+0xb>

x86 assembly (clang, -O2):
<mtcp_abort>:
hlt
xor    %rax,%rax
mov    (%rax),%rax
nopw   0x0(%rax,%rax,1)
jmp    1110 <mtcp_abort+0x10>

LLVM IR (-O0):
define void @mtcp_abort() {
br label %1
1: ; preds = %1, %0
br label %1
}

LLVM IR (-O2):
define void @mtcp_abort() {
tail call void asm sideeffect "hlt ; xor %rax,%rax ; mov (%rax),%rax", "~{dirflag},~{fpsr},~{flags}"()
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ SerialWriteChar(int);
void iRobot_Reset() { SerialWriteChar(7); }


x86 assembly (clang, -O0):
<iRobot_Reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7,%edi
call   1030 <SerialWriteChar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<iRobot_Reset>:
mov    $0x7,%edi
jmp    1030 <SerialWriteChar@plt>

LLVM IR (-O0):
define void @iRobot_Reset() {
%1 = call i32 @SerialWriteChar(i32 7)
ret void
}

LLVM IR (-O2):
define void @iRobot_Reset() {
%1 = tail call i32 @SerialWriteChar(i32 7)
ret void
}
int empty_holder_for_reserve_place_for_function(int x) { return x * x; }


x86 assembly (clang, -O0):
<empty_holder_for_reserve_place_for_function>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<empty_holder_for_reserve_place_for_function>:
mov    %edi,%eax
imul   %edi,%eax
ret

LLVM IR (-O0):
define i32 @empty_holder_for_reserve_place_for_function(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @empty_holder_for_reserve_place_for_function(i32 %0) {
%2 = mul nsw i32 %0, %0
ret i32 %2
}
int ConcreteTmUnsched(void **timer_handler) { return 0; }


x86 assembly (clang, -O0):
<ConcreteTmUnsched>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ConcreteTmUnsched>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ConcreteTmUnsched(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @ConcreteTmUnsched(i8** nocapture readnone %0) {
ret i32 0
}
void DMTimerGPOConfigure(unsigned int baseAdd, unsigned int gpoCfg) {
  (*((volatile unsigned int *)(baseAdd + (0x38)))) &= ~(0x00004000u);
  (*((volatile unsigned int *)(baseAdd + (0x38)))) |= (gpoCfg & (0x00004000u));
}


x86 assembly (clang, -O0):
<DMTimerGPOConfigure>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x38,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xffffbfff,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%edx
and    $0x4000,%edx
mov    -0x4(%rbp),%eax
add    $0x38,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMTimerGPOConfigure>:
add    $0x38,%edi
andl   $0xffffbfff,(%rdi)
and    $0x4000,%esi
or     %esi,(%rdi)
ret

LLVM IR (-O0):
define void @DMTimerGPOConfigure(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add i32 %5, 56
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, -16385
store volatile i32 %10, i32* %8
%11 = load i32, i32* %4
%12 = and i32 %11, 16384
%13 = load i32, i32* %3
%14 = add i32 %13, 56
%15 = zext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
%17 = load volatile i32, i32* %16
%18 = or i32 %17, %12
store volatile i32 %18, i32* %16
ret void
}

LLVM IR (-O2):
define void @DMTimerGPOConfigure(i32 %0, i32 %1) {
%3 = add i32 %0, 56
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, -16385
store volatile i32 %7, i32* %5
%8 = and i32 %1, 16384
%9 = load volatile i32, i32* %5
%10 = or i32 %9, %8
store volatile i32 %10, i32* %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void objc_collect_garbage_data(void (*cleanup)(void *), void *garbage) {
  fprintf(stderr, "objc_collect_garbage_data NOT IMPLEMENTED!\n");
}


x86 assembly (clang, -O0):
<objc_collect_garbage_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<objc_collect_garbage_data>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [44 x i8] c"objc_collect_garbage_data NOT IMPLEMENTED!\0A\00"
define void @objc_collect_garbage_data(void (i8*)* %0, i8* %1) {
%3 = alloca void (i8*)*
%4 = alloca i8*
store void (i8*)* %0, void (i8*)** %3
store i8* %1, i8** %4
%5 = load i32, i32* @stderr
%6 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [44 x i8] c"objc_collect_garbage_data NOT IMPLEMENTED!\0A\00"
define void @objc_collect_garbage_data(void (i8*)* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_io_bit(int, int);
void TOSH_MAKE_RFM_CTL0_OUTPUT() { set_io_bit(0x45, 7); }


x86 assembly (clang, -O0):
<TOSH_MAKE_RFM_CTL0_OUTPUT>:
push   %rbp
mov    %rsp,%rbp
mov    $0x45,%edi
mov    $0x7,%esi
call   1030 <set_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_MAKE_RFM_CTL0_OUTPUT>:
mov    $0x45,%edi
mov    $0x7,%esi
jmp    1030 <set_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_MAKE_RFM_CTL0_OUTPUT() {
%1 = call i32 @set_io_bit(i32 69, i32 7)
ret void
}

LLVM IR (-O2):
define void @TOSH_MAKE_RFM_CTL0_OUTPUT() {
%1 = tail call i32 @set_io_bit(i32 69, i32 7)
ret void
}
int test_imm_35uint8_mem(unsigned char *val) {
  return ((*val) & (0x35 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_35uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0x35,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_35uint8_mem>:
testb  $0x35,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_35uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 53
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_35uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 53
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int /*<<< orphan*/ EINVAL;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int __sigorset(int /*<<< orphan*/ *, int /*<<< orphan*/ const *,
               int /*<<< orphan*/ const *);
int sigorset(sigset_t *dest, const sigset_t *left, const sigset_t *right) {
  if (dest == NULL || left == NULL || right == NULL) {
    __set_errno(EINVAL);
    return -1;
  }
  return __sigorset(dest, left, right);
}


x86 assembly (clang, -O0):
<sigorset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1155 <sigorset+0x35>
cmpq   $0x0,-0x18(%rbp)
je     1155 <sigorset+0x35>
cmpq   $0x0,-0x20(%rbp)
jne    116f <sigorset+0x4f>
mov    0x2e84(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    1183 <sigorset+0x63>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1040 <__sigorset@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigorset>:
test   %rdi,%rdi
je     1134 <sigorset+0x14>
test   %rsi,%rsi
je     1134 <sigorset+0x14>
test   %rdx,%rdx
je     1134 <sigorset+0x14>
jmp    1040 <__sigorset@plt>
push   %rax
mov    0x2ea4(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sigorset(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
%8 = load i32*, i32** %5
%9 = icmp eq i32* %8, null
br i1 %9, label %16, label %10
10: ; preds = %3
%11 = load i32*, i32** %6
%12 = icmp eq i32* %11, null
br i1 %12, label %16, label %13
13: ; preds = %10
%14 = load i32*, i32** %7
%15 = icmp eq i32* %14, null
br i1 %15, label %16, label %19
16: ; preds = %13, %10, %3
%17 = load i32, i32* @EINVAL
%18 = call i32 @__set_errno(i32 %17)
store i32 -1, i32* %4
br label %24
19: ; preds = %13
%20 = load i32*, i32** %5
%21 = load i32*, i32** %6
%22 = load i32*, i32** %7
%23 = call i32 @__sigorset(i32* %20, i32* %21, i32* %22)
store i32 %23, i32* %4
br label %24
24: ; preds = %19, %16
%25 = load i32, i32* %4
ret i32 %25
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sigorset(i32* %0, i32* %1, i32* %2) {
%4 = icmp eq i32* %0, null
%5 = icmp eq i32* %1, null
%6 = or i1 %4, %5
%7 = icmp eq i32* %2, null
%8 = or i1 %6, %7
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = load i32, i32* @EINVAL
%11 = tail call i32 @__set_errno(i32 %10)
br label %14
12: ; preds = %3
%13 = tail call i32 @__sigorset(i32* %0, i32* %1, i32* %2)
br label %14
14: ; preds = %12, %9
%15 = phi i32 [ -1, %9 ], [ %13, %12 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ zlog_signal(int, char *);
void __attribute__((noreturn)) core_handler(int signo) {
  zlog_signal(signo, "aborting...");
  abort();
}


x86 assembly (clang, -O0):
<core_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xecb(%rip),%rsi
call   1040 <zlog_signal@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<core_handler>:
push   %rax
lea    0xed8(%rip),%rsi
call   1040 <zlog_signal@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"aborting...\00"
define void @core_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @zlog_signal(i32 %3, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%5 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@.str = [12 x i8] c"aborting...\00"
define void @core_handler(i32 %0) {
%2 = tail call i32 @zlog_signal(i32 %0, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int any_decrqss(char const *, char *);
int rpt_DECSSCLS(const char *the_title) { return any_decrqss(the_title, " p"); }


x86 assembly (clang, -O0):
<rpt_DECSSCLS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <any_decrqss@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpt_DECSSCLS>:
lea    0xee9(%rip),%rsi
jmp    1030 <any_decrqss@plt>

LLVM IR (-O0):
@.str = [3 x i8] c" p\00"
define i32 @rpt_DECSSCLS(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @any_decrqss(i8* %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [3 x i8] c" p\00"
define i32 @rpt_DECSSCLS(i8* %0) {
%2 = tail call i32 @any_decrqss(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
void tf_init_tcp(void) { ; }


x86 assembly (clang, -O0):
<tf_init_tcp>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tf_init_tcp>:
ret

LLVM IR (-O0):
define void @tf_init_tcp() {
ret void
}

LLVM IR (-O2):
define void @tf_init_tcp() {
ret void
}
/* Type definitions */
struct pollfd {
  scalar_t__ fd;
};

/* Variables and functions */
int equals_pollfd(struct pollfd *fd1, struct pollfd *fd2) {
  return (fd1->fd == fd2->fd ? 0 : -1);
}


x86 assembly (clang, -O0):
<equals_pollfd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
mov    $0xffffffff,%eax
xor    %ecx,%ecx
cmp    %rsi,%rdx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<equals_pollfd>:
mov    (%rdi),%rcx
xor    %eax,%eax
cmp    (%rsi),%rcx
setne  %al
neg    %eax
ret

LLVM IR (-O0):
%struct.pollfd = type { i64 }
define i32 @equals_pollfd(%struct.pollfd* %0, %struct.pollfd* %1) {
%3 = alloca %struct.pollfd*
%4 = alloca %struct.pollfd*
store %struct.pollfd* %0, %struct.pollfd** %3
store %struct.pollfd* %1, %struct.pollfd** %4
%5 = load %struct.pollfd*, %struct.pollfd** %3
%6 = getelementptr inbounds %struct.pollfd, %struct.pollfd* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = load %struct.pollfd*, %struct.pollfd** %4
%9 = getelementptr inbounds %struct.pollfd, %struct.pollfd* %8, i32 0, i32 0
%10 = load i64, i64* %9
%11 = icmp eq i64 %7, %10
%12 = zext i1 %11 to i64
%13 = select i1 %11, i32 0, i32 -1
ret i32 %13
}

LLVM IR (-O2):
%struct.pollfd = type { i64 }
define i32 @equals_pollfd(%struct.pollfd* nocapture %0, %struct.pollfd* nocapture %1) {
%3 = getelementptr inbounds %struct.pollfd, %struct.pollfd* %0, i64 0, i32 0
%4 = load i64, i64* %3
%5 = getelementptr inbounds %struct.pollfd, %struct.pollfd* %1, i64 0, i32 0
%6 = load i64, i64* %5
%7 = icmp ne i64 %4, %6
%8 = sext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int strlen(char const *);
char lastchar(const char *string) {
  int length;
  if (string == NULL)
    return ('\0');
  length = strlen(string);
  if (length >= 1)
    return (string[length - 1]);
  else
    return ('\0');
}


x86 assembly (clang, -O0):
<lastchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1130 <lastchar+0x20>
movb   $0x0,-0x1(%rbp)
jmp    1162 <lastchar+0x52>
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x1,-0x14(%rbp)
jl     115e <lastchar+0x4e>
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x1(%rbp)
jmp    1162 <lastchar+0x52>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lastchar>:
push   %rbx
test   %rdi,%rdi
je     112a <lastchar+0x1a>
mov    %rdi,%rbx
call   1030 <strlen@plt>
test   %eax,%eax
jle    112a <lastchar+0x1a>
add    $0xffffffff,%eax
mov    (%rbx,%rax,1),%al
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define signext i8 @lastchar(i8* %0) {
%2 = alloca i8
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %1
store i8 0, i8* %2
br label %21
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i32 @strlen(i8* %9)
store i32 %10, i32* %4
%11 = load i32, i32* %4
%12 = icmp sge i32 %11, 1
br i1 %12, label %13, label %20
13: ; preds = %8
%14 = load i8*, i8** %3
%15 = load i32, i32* %4
%16 = sub nsw i32 %15, 1
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %14, i64 %17
%19 = load i8, i8* %18
store i8 %19, i8* %2
br label %21
20: ; preds = %8
store i8 0, i8* %2
br label %21
21: ; preds = %20, %13, %7
%22 = load i8, i8* %2
ret i8 %22
}

LLVM IR (-O2):
define signext i8 @lastchar(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %11, label %3
3: ; preds = %1
%4 = tail call i32 @strlen(i8* %0)
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = add nsw i32 %4, -1
%8 = zext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = load i8, i8* %9
br label %11
11: ; preds = %3, %1, %6
%12 = phi i8 [ %10, %6 ], [ 0, %1 ], [ 0, %3 ]
ret i8 %12
}
void palm27x_lcd_init(int power, struct pxafb_mode_info *mode) {}


x86 assembly (clang, -O0):
<palm27x_lcd_init>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<palm27x_lcd_init>:
ret

LLVM IR (-O0):
%struct.pxafb_mode_info = type opaque
define void @palm27x_lcd_init(i32 %0, %struct.pxafb_mode_info* %1) {
%3 = alloca i32
%4 = alloca %struct.pxafb_mode_info*
store i32 %0, i32* %3
store %struct.pxafb_mode_info* %1, %struct.pxafb_mode_info** %4
ret void
}

LLVM IR (-O2):
%struct.pxafb_mode_info = type opaque
define void @palm27x_lcd_init(i32 %0, %struct.pxafb_mode_info* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fexpect(char *, int, int, int);
void test_primitive() {
  int a = {59};
  fexpect(
      "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
      "2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/initializer.c",
      54, 59, a);
  ;
}


x86 assembly (clang, -O0):
<test_primitive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x3b,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
lea    0xed7(%rip),%rdi
mov    $0x36,%esi
mov    $0x3b,%edx
call   1030 <fexpect@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_primitive>:
lea    0xee9(%rip),%rdi
mov    $0x36,%esi
mov    $0x3b,%edx
mov    $0x3b,%ecx
jmp    1030 <fexpect@plt>

LLVM IR (-O0):
@.str = [134 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/initializer.c\00"
define void @test_primitive() {
%1 = alloca i32
store i32 59, i32* %1
%2 = load i32, i32* %1
%3 = call i32 @fexpect(i8* getelementptr inbounds ([134 x i8], [134 x i8]* @.str, i64 0, i64 0), i32 54, i32 59, i32 %2)
ret void
}

LLVM IR (-O2):
@.str = [134 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/initializer.c\00"
define void @test_primitive() {
%1 = tail call i32 @fexpect(i8* getelementptr inbounds ([134 x i8], [134 x i8]* @.str, i64 0, i64 0), i32 54, i32 59, i32 59)
ret void
}
int bit_test(int number, int bit) { return number & (1 << bit) ? 1 : 0; }


x86 assembly (clang, -O0):
<bit_test>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
and    %eax,%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit_test>:
mov    %esi,%ecx
mov    %edi,%eax
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @bit_test(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 1, %6
%8 = and i32 %5, %7
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i64
%11 = select i1 %9, i32 1, i32 0
ret i32 %11
}

LLVM IR (-O2):
define i32 @bit_test(i32 %0, i32 %1) {
%3 = lshr i32 %0, %1
%4 = and i32 %3, 1
ret i32 %4
}
int test_imm_3Auint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x3A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Auint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0x3a,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Auint64_midword_mem>:
testb  $0x3a,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Auint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 58
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_3Auint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 3801088
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int test_imm_D7int8_reg(signed char val) {
  return ((val) & (0xD7 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D7int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xd7,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D7int8_reg>:
test   $0xd7,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D7int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 215
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D7int8_reg(i8 signext %0) {
%2 = and i8 %0, -41
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
char getVector(char vector[], int pos) { return vector[pos]; }


x86 assembly (clang, -O0):
<getVector>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getVector>:
movslq %esi,%rax
mov    (%rdi,%rax,1),%al
ret

LLVM IR (-O0):
define signext i8 @getVector(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
ret i8 %9
}

LLVM IR (-O2):
define signext i8 @getVector(i8* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
ret i8 %5
}
/* Type definitions */
struct buf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ bufput(struct buf *, char *, int);
void latex_epilog(struct buf *ob, void *opaque) {
  bufput(ob, "\n\\end{document}\n", sizeof "\n\\end{document}\n" - 1);
}


x86 assembly (clang, -O0):
<latex_epilog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed5(%rip),%rsi
mov    $0x10,%edx
call   1030 <bufput@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<latex_epilog>:
lea    0xee9(%rip),%rsi
mov    $0x10,%edx
jmp    1030 <bufput@plt>

LLVM IR (-O0):
%struct.buf = type { i32 }
@.str = [17 x i8] c"\0A\\end{document}\0A\00"
define void @latex_epilog(%struct.buf* %0, i8* %1) {
%3 = alloca %struct.buf*
%4 = alloca i8*
store %struct.buf* %0, %struct.buf** %3
store i8* %1, i8** %4
%5 = load %struct.buf*, %struct.buf** %3
%6 = call i32 @bufput(%struct.buf* %5, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 16)
ret void
}

LLVM IR (-O2):
%struct.buf = type { i32 }
@.str = [17 x i8] c"\0A\\end{document}\0A\00"
define void @latex_epilog(%struct.buf* %0, i8* nocapture readnone %1) {
%3 = tail call i32 @bufput(%struct.buf* %0, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 16)
ret void
}
void _M2_RTentity_finish(__attribute__((unused)) int argc,
                         __attribute__((unused)) char *argv[]) {}


x86 assembly (clang, -O0):
<_M2_RTentity_finish>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_M2_RTentity_finish>:
ret

LLVM IR (-O0):
define void @_M2_RTentity_finish(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret void
}

LLVM IR (-O2):
define void @_M2_RTentity_finish(i32 %0, i8** nocapture %1) {
ret void
}
void foo702(int p) {}


x86 assembly (clang, -O0):
<foo702>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo702>:
ret

LLVM IR (-O0):
define void @foo702(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo702(i32 %0) {
ret void
}
/* Variables and functions */
scalar_t__ pow(unsigned long, int);
scalar_t__ round(double);
unsigned long int quarticBrightness(long unsigned int x) {
  return (unsigned long int)round(0.0000000603086294 * (double)pow(x, 4));
}


x86 assembly (clang, -O0):
<quarticBrightness>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x4,%esi
call   1030 <pow@plt>
cvtsi2sd %rax,%xmm1
movsd  0xeb9(%rip),%xmm0
mulsd  %xmm1,%xmm0
call   1040 <round@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quarticBrightness>:
push   %rax
mov    $0x4,%esi
call   1030 <pow@plt>
cvtsi2sd %rax,%xmm0
mulsd  0xec8(%rip),%xmm0
pop    %rax
jmp    1040 <round@plt>

LLVM IR (-O0):
define i64 @quarticBrightness(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @pow(i64 %3, i32 4)
%5 = sitofp i64 %4 to double
%6 = fmul double 0x3E703060A0E49FEE, %5
%7 = call i64 @round(double %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @quarticBrightness(i64 %0) {
%2 = tail call i64 @pow(i64 %0, i32 4)
%3 = sitofp i64 %2 to double
%4 = fmul double %3, 0x3E703060A0E49FEE
%5 = tail call i64 @round(double %4)
ret i64 %5
}
/* Variables and functions */
unsigned long __builtin_aarch64_get_fpcr64();
void fpcr64_getter(void) {
  unsigned long fpcr = __builtin_aarch64_get_fpcr64();
}


x86 assembly (clang, -O0):
<fpcr64_getter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <__builtin_aarch64_get_fpcr64@plt>
mov    %rax,-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fpcr64_getter>:
xor    %eax,%eax
jmp    1030 <__builtin_aarch64_get_fpcr64@plt>

LLVM IR (-O0):
define void @fpcr64_getter() {
%1 = alloca i64
%2 = call i64 (...) @__builtin_aarch64_get_fpcr64()
store i64 %2, i64* %1
ret void
}

LLVM IR (-O2):
define void @fpcr64_getter() {
%1 = tail call i64 (...) @__builtin_aarch64_get_fpcr64()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write_file(char const *, char const *, char *);
void write_trigger(const char *file, const char *trigger) {
  write_file(file, trigger, "trigger");
}


x86 assembly (clang, -O0):
<write_trigger>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    0xed1(%rip),%rdx
call   1030 <write_file@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_trigger>:
lea    0xee9(%rip),%rdx
jmp    1030 <write_file@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"trigger\00"
define void @write_trigger(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @write_file(i8* %5, i8* %6, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"trigger\00"
define void @write_trigger(i8* %0, i8* %1) {
%3 = tail call i32 @write_file(i8* %0, i8* %1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gethostname(char *, int);
char *strchr(char *, char);
const char *elg_pform_node_name() {
  static char node[64];
  char *dlmt;
  gethostname(node, 64);
  if ((dlmt = strchr(node, '.')) != NULL)
    *dlmt = '\0';
  else
    node[63] = '\0';
  return node;
}


x86 assembly (clang, -O0):
<elg_pform_node_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0x2f11(%rip),%rdi
mov    $0x40,%esi
call   1040 <gethostname@plt>
lea    0x2f00(%rip),%rdi
mov    $0x2e,%esi
call   1030 <strchr@plt>
mov    %rax,-0x8(%rbp)
cmp    $0x0,%rax
je     1164 <elg_pform_node_name+0x44>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
jmp    116b <elg_pform_node_name+0x4b>
movb   $0x0,0x2f14(%rip)
lea    0x2ece(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<elg_pform_node_name>:
push   %rbx
lea    0x2f18(%rip),%rbx
mov    %rbx,%rdi
mov    $0x40,%esi
call   1040 <gethostname@plt>
mov    %rbx,%rdi
mov    $0x2e,%esi
call   1030 <strchr@plt>
test   %rax,%rax
lea    0x2f33(%rip),%rcx
cmovne %rax,%rcx
movb   $0x0,(%rcx)
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@elg_pform_node_name.node = internal global [64 x i8] zeroinitializer
define i8* @elg_pform_node_name() {
%1 = alloca i8*
%2 = call i32 @gethostname(i8* getelementptr inbounds ([64 x i8], [64 x i8]* @elg_pform_node_name.node, i64 0, i64 0), i32 64)
%3 = call i8* @strchr(i8* getelementptr inbounds ([64 x i8], [64 x i8]* @elg_pform_node_name.node, i64 0, i64 0), i8 signext 46)
store i8* %3, i8** %1
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = load i8*, i8** %1
store i8 0, i8* %6
br label %8
7: ; preds = %0
store i8 0, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @elg_pform_node_name.node, i64 0, i64 63)
br label %8
8: ; preds = %7, %5
ret i8* getelementptr inbounds ([64 x i8], [64 x i8]* @elg_pform_node_name.node, i64 0, i64 0)
}

LLVM IR (-O2):
@elg_pform_node_name.node = internal global [64 x i8] zeroinitializer
define i8* @elg_pform_node_name() {
%1 = tail call i32 @gethostname(i8* getelementptr inbounds ([64 x i8], [64 x i8]* @elg_pform_node_name.node, i64 0, i64 0), i32 64)
%2 = tail call i8* @strchr(i8* dereferenceable(1) getelementptr inbounds ([64 x i8], [64 x i8]* @elg_pform_node_name.node, i64 0, i64 0), i8 signext 46)
%3 = icmp eq i8* %2, null
%4 = select i1 %3, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @elg_pform_node_name.node, i64 0, i64 63), i8* %2
store i8 0, i8* %4
ret i8* getelementptr inbounds ([64 x i8], [64 x i8]* @elg_pform_node_name.node, i64 0, i64 0)
}