#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ GenPrintInstr2Operands(int, int /*<<< orphan*/, int,
                                          int /*<<< orphan*/, int, int);
void GenExtendRegIfNeeded(int reg, int opSz) {
  if (opSz == -1) {
    GenPrintInstr2Operands(0x83, 0, reg, 0, reg, 0);
  } else if (opSz == 1) {
    GenPrintInstr2Operands(0x0D, 0, reg, 0, 0x80, 0xFF);
  } else if (opSz == -2) {
    GenPrintInstr2Operands(0x84, 0, reg, 0, reg, 0);
  } else if (opSz == 2) {
    GenPrintInstr2Operands(0x0D, 0, reg, 0, 0x80, 0xFFFF);
  }
}


x86 assembly (clang, -O0):
<GenExtendRegIfNeeded>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0xffffffff,-0x8(%rbp)
jne    1147 <GenExtendRegIfNeeded+0x37>
mov    -0x4(%rbp),%edx
mov    -0x4(%rbp),%r8d
mov    $0x83,%edi
xor    %r9d,%r9d
mov    %r9d,%esi
mov    %r9d,%ecx
call   1030 <GenPrintInstr2Operands@plt>
jmp    11d2 <GenExtendRegIfNeeded+0xc2>
cmpl   $0x1,-0x8(%rbp)
jne    1173 <GenExtendRegIfNeeded+0x63>
mov    -0x4(%rbp),%edx
mov    $0xd,%edi
xor    %ecx,%ecx
mov    $0x80,%r8d
mov    $0xff,%r9d
mov    %ecx,%esi
call   1030 <GenPrintInstr2Operands@plt>
jmp    11cd <GenExtendRegIfNeeded+0xbd>
cmpl   $0xfffffffe,-0x8(%rbp)
jne    119c <GenExtendRegIfNeeded+0x8c>
mov    -0x4(%rbp),%edx
mov    -0x4(%rbp),%r8d
mov    $0x84,%edi
xor    %r9d,%r9d
mov    %r9d,%esi
mov    %r9d,%ecx
call   1030 <GenPrintInstr2Operands@plt>
jmp    11c8 <GenExtendRegIfNeeded+0xb8>
cmpl   $0x2,-0x8(%rbp)
jne    11c3 <GenExtendRegIfNeeded+0xb3>
mov    -0x4(%rbp),%edx
mov    $0xd,%edi
xor    %ecx,%ecx
mov    $0x80,%r8d
mov    $0xffff,%r9d
mov    %ecx,%esi
call   1030 <GenPrintInstr2Operands@plt>
jmp    11c8 <GenExtendRegIfNeeded+0xb8>
jmp    11cd <GenExtendRegIfNeeded+0xbd>
jmp    11d2 <GenExtendRegIfNeeded+0xc2>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GenExtendRegIfNeeded>:
add    $0x2,%esi
cmp    $0x4,%esi
ja     1145 <GenExtendRegIfNeeded+0x35>
mov    %edi,%edx
lea    0xedf(%rip),%rax
movslq (%rax,%rsi,4),%rcx
add    %rax,%rcx
jmp    *%rcx
mov    $0x84,%edi
jmp    1136 <GenExtendRegIfNeeded+0x26>
mov    $0x83,%edi
xor    %esi,%esi
xor    %ecx,%ecx
mov    %edx,%r8d
xor    %r9d,%r9d
jmp    1030 <GenPrintInstr2Operands@plt>
ret
mov    $0xd,%edi
xor    %esi,%esi
xor    %ecx,%ecx
mov    $0x80,%r8d
mov    $0xff,%r9d
jmp    1030 <GenPrintInstr2Operands@plt>
mov    $0xd,%edi
xor    %esi,%esi
xor    %ecx,%ecx
mov    $0x80,%r8d
mov    $0xffff,%r9d
jmp    1030 <GenPrintInstr2Operands@plt>

LLVM IR (-O0):
define void @GenExtendRegIfNeeded(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i32, i32* %3
%9 = load i32, i32* %3
%10 = call i32 @GenPrintInstr2Operands(i32 131, i32 0, i32 %8, i32 0, i32 %9, i32 0)
br label %33
11: ; preds = %2
%12 = load i32, i32* %4
%13 = icmp eq i32 %12, 1
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i32, i32* %3
%16 = call i32 @GenPrintInstr2Operands(i32 13, i32 0, i32 %15, i32 0, i32 128, i32 255)
br label %32
17: ; preds = %11
%18 = load i32, i32* %4
%19 = icmp eq i32 %18, -2
br i1 %19, label %20, label %24
20: ; preds = %17
%21 = load i32, i32* %3
%22 = load i32, i32* %3
%23 = call i32 @GenPrintInstr2Operands(i32 132, i32 0, i32 %21, i32 0, i32 %22, i32 0)
br label %31
24: ; preds = %17
%25 = load i32, i32* %4
%26 = icmp eq i32 %25, 2
br i1 %26, label %27, label %30
27: ; preds = %24
%28 = load i32, i32* %3
%29 = call i32 @GenPrintInstr2Operands(i32 13, i32 0, i32 %28, i32 0, i32 128, i32 65535)
br label %30
30: ; preds = %27, %24
br label %31
31: ; preds = %30, %20
br label %32
32: ; preds = %31, %14
br label %33
33: ; preds = %32, %7
ret void
}

LLVM IR (-O2):
define void @GenExtendRegIfNeeded(i32 %0, i32 %1) {
switch i32 %1, label %11 [
i32 -1, label %3
i32 1, label %5
i32 -2, label %7
i32 2, label %9
]
3: ; preds = %2
%4 = tail call i32 @GenPrintInstr2Operands(i32 131, i32 0, i32 %0, i32 0, i32 %0, i32 0)
br label %11
5: ; preds = %2
%6 = tail call i32 @GenPrintInstr2Operands(i32 13, i32 0, i32 %0, i32 0, i32 128, i32 255)
br label %11
7: ; preds = %2
%8 = tail call i32 @GenPrintInstr2Operands(i32 132, i32 0, i32 %0, i32 0, i32 %0, i32 0)
br label %11
9: ; preds = %2
%10 = tail call i32 @GenPrintInstr2Operands(i32 13, i32 0, i32 %0, i32 0, i32 128, i32 65535)
br label %11
11: ; preds = %2, %5, %9, %7, %3
ret void
}