xunge/DecIR huggingface dataset:
int pathcon_nm6_work(int *sz_arg, int *sz_res, int *sz_iw, int *sz_w) {
  if (sz_arg)
    *sz_arg = 2;
  if (sz_res)
    *sz_res = 2;
  if (sz_iw)
    *sz_iw = 0;
  if (sz_w)
    *sz_w = 0;
  return 0;
}


x86 assembly (clang, -O0):
<pathcon_nm6_work>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1129 <pathcon_nm6_work+0x29>
mov    -0x8(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x10(%rbp)
je     113e <pathcon_nm6_work+0x3e>
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x18(%rbp)
je     1153 <pathcon_nm6_work+0x53>
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
cmpq   $0x0,-0x20(%rbp)
je     1168 <pathcon_nm6_work+0x68>
mov    -0x20(%rbp),%rax
movl   $0x0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm6_work>:
test   %rdi,%rdi
je     110b <pathcon_nm6_work+0xb>
movl   $0x2,(%rdi)
test   %rsi,%rsi
je     1116 <pathcon_nm6_work+0x16>
movl   $0x2,(%rsi)
test   %rdx,%rdx
je     1121 <pathcon_nm6_work+0x21>
movl   $0x0,(%rdx)
test   %rcx,%rcx
je     112c <pathcon_nm6_work+0x2c>
movl   $0x0,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pathcon_nm6_work(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %11, label %13
11: ; preds = %4
%12 = load i32*, i32** %5
store i32 2, i32* %12
br label %13
13: ; preds = %11, %4
%14 = load i32*, i32** %6
%15 = icmp ne i32* %14, null
br i1 %15, label %16, label %18
16: ; preds = %13
%17 = load i32*, i32** %6
store i32 2, i32* %17
br label %18
18: ; preds = %16, %13
%19 = load i32*, i32** %7
%20 = icmp ne i32* %19, null
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = load i32*, i32** %7
store i32 0, i32* %22
br label %23
23: ; preds = %21, %18
%24 = load i32*, i32** %8
%25 = icmp ne i32* %24, null
br i1 %25, label %26, label %28
26: ; preds = %23
%27 = load i32*, i32** %8
store i32 0, i32* %27
br label %28
28: ; preds = %26, %23
ret i32 0
}

LLVM IR (-O2):
define i32 @pathcon_nm6_work(i32* writeonly %0, i32* writeonly %1, i32* writeonly %2, i32* writeonly %3) {
%5 = icmp eq i32* %0, null
br i1 %5, label %7, label %6
6: ; preds = %4
store i32 2, i32* %0
br label %7
7: ; preds = %6, %4
%8 = icmp eq i32* %1, null
br i1 %8, label %10, label %9
9: ; preds = %7
store i32 2, i32* %1
br label %10
10: ; preds = %9, %7
%11 = icmp eq i32* %2, null
br i1 %11, label %13, label %12
12: ; preds = %10
store i32 0, i32* %2
br label %13
13: ; preds = %12, %10
%14 = icmp eq i32* %3, null
br i1 %14, label %16, label %15
15: ; preds = %13
store i32 0, i32* %3
br label %16
16: ; preds = %15, %13
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void explain() { fprintf(stderr, "Usage: ... csz \n"); }


x86 assembly (clang, -O0):
<explain>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<explain>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [17 x i8] c"Usage: ... csz \0A\00"
define void @explain() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [17 x i8] c"Usage: ... csz \0A\00"
define void @explain() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}
void machdep_restore_float_state() { return; }


x86 assembly (clang, -O0):
<machdep_restore_float_state>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<machdep_restore_float_state>:
ret

LLVM IR (-O0):
define void @machdep_restore_float_state() {
ret void
}

LLVM IR (-O2):
define void @machdep_restore_float_state() {
ret void
}
int Min(int a, int b) { return a > b ? b : a; }


x86 assembly (clang, -O0):
<Min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <Min+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <Min+0x27>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Min>:
mov    %edi,%eax
cmp    %esi,%edi
cmovg  %esi,%eax
ret

LLVM IR (-O0):
define i32 @Min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %4
br label %12
10: ; preds = %2
%11 = load i32, i32* %3
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @Min(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ free(void **);
void ckd_free_2da(void **ptr) {
  free(ptr[0]);
  free(ptr);
}


x86 assembly (clang, -O0):
<ckd_free_2da>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ckd_free_2da>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <free@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @ckd_free_2da(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = getelementptr inbounds i8*, i8** %3, i64 0
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i8**
%7 = call i32 @free(i8** %6)
%8 = load i8**, i8*** %2
%9 = call i32 @free(i8** %8)
ret void
}

LLVM IR (-O2):
define void @ckd_free_2da(i8** nocapture %0) {
%2 = bitcast i8** %0 to i8***
%3 = load i8**, i8*** %2
%4 = tail call i32 @free(i8** %3)
%5 = tail call i32 @free(i8** %0)
ret void
}
/* Variables and functions */
double ceil(double);
double fig_ml_hr(double no_hrs) { return ceil((1.0 / no_hrs) * 1000); }


x86 assembly (clang, -O0):
<fig_ml_hr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xee3(%rip),%xmm0
divsd  -0x8(%rbp),%xmm0
movsd  0xece(%rip),%xmm1
mulsd  %xmm1,%xmm0
call   1030 <ceil@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fig_ml_hr>:
movsd  0xee8(%rip),%xmm1
divsd  %xmm0,%xmm1
mulsd  0xee4(%rip),%xmm1
movapd %xmm1,%xmm0
jmp    1030 <ceil@plt>

LLVM IR (-O0):
define double @fig_ml_hr(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double 1.000000e+00, %3
%5 = fmul double %4, 1.000000e+03
%6 = call double @llvm.ceil.f64(double %5)
ret double %6
}

LLVM IR (-O2):
define double @fig_ml_hr(double %0) {
%2 = fdiv double 1.000000e+00, %0
%3 = fmul double %2, 1.000000e+03
%4 = tail call double @llvm.ceil.f64(double %3)
ret double %4
}
int M(int a, int b) { return a > b ? a : b; }


x86 assembly (clang, -O0):
<M>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <M+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <M+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<M>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @M(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @M(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
int isPowerOfTwo(unsigned int x) { return ((x != 0) && !(x & (x - 1))); }


x86 assembly (clang, -O0):
<isPowerOfTwo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     112c <isPowerOfTwo+0x2c>
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPowerOfTwo>:
test   %edi,%edi
je     110f <isPowerOfTwo+0xf>
lea    -0x1(%rdi),%ecx
xor    %eax,%eax
test   %ecx,%edi
sete   %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isPowerOfTwo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = load i32, i32* %2
%7 = load i32, i32* %2
%8 = sub i32 %7, 1
%9 = and i32 %6, %8
%10 = icmp ne i32 %9, 0
%11 = xor i1 %10, true
br label %12
12: ; preds = %5, %1
%13 = phi i1 [ false, %1 ], [ %11, %5 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @isPowerOfTwo(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i32 @llvm.ctpop.i32(i32 %0)
%5 = icmp ult i32 %4, 2
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %1
%8 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %8
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int stat(char const *, struct stat *);
int lstat(const char *pathname, struct stat *buf) {
  return stat(pathname, buf);
}


x86 assembly (clang, -O0):
<lstat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <stat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lstat>:
jmp    1030 <stat@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @lstat(i8* %0, %struct.stat* %1) {
%3 = alloca i8*
%4 = alloca %struct.stat*
store i8* %0, i8** %3
store %struct.stat* %1, %struct.stat** %4
%5 = load i8*, i8** %3
%6 = load %struct.stat*, %struct.stat** %4
%7 = call i32 @stat(i8* %5, %struct.stat* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @lstat(i8* nocapture %0, %struct.stat* nocapture %1) {
%3 = tail call i32 @stat(i8* %0, %struct.stat* %1)
ret i32 %3
}
unsigned long bword(unsigned char *p) {
  unsigned long n;
  n = p[0];
  n = (n << 8) + p[1];
  return n;
}


x86 assembly (clang, -O0):
<bword>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shl    $0x8,%rax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bword>:
movzwl (%rdi),%eax
shl    $0x30,%rax
bswap  %rax
ret

LLVM IR (-O0):
define i64 @bword(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = zext i8 %6 to i64
store i64 %7, i64* %3
%8 = load i64, i64* %3
%9 = shl i64 %8, 8
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %11
%13 = zext i8 %12 to i64
%14 = add i64 %9, %13
store i64 %14, i64* %3
%15 = load i64, i64* %3
ret i64 %15
}

LLVM IR (-O2):
define i64 @bword(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i64
%4 = shl nuw nsw i64 %3, 8
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = zext i8 %6 to i64
%8 = or i64 %4, %7
ret i64 %8
}
int fast_less(int rank_a, int rank_b, unsigned nelem_a, unsigned nelem_b) {
  if (nelem_a != nelem_b)
    return nelem_a < nelem_b;
  return rank_a < rank_b;
}


x86 assembly (clang, -O0):
<fast_less>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x14(%rbp),%eax
je     1132 <fast_less+0x32>
mov    -0x10(%rbp),%eax
cmp    -0x14(%rbp),%eax
setb   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    1143 <fast_less+0x43>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fast_less>:
xor    %eax,%eax
cmp    %esi,%edi
setl   %al
xor    %esi,%esi
cmp    %ecx,%edx
setb   %sil
cmove  %eax,%esi
movzbl %sil,%eax
ret

LLVM IR (-O0):
define i32 @fast_less(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
%10 = load i32, i32* %8
%11 = load i32, i32* %9
%12 = icmp ne i32 %10, %11
br i1 %12, label %13, label %18
13: ; preds = %4
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = icmp ult i32 %14, %15
%17 = zext i1 %16 to i32
store i32 %17, i32* %5
br label %23
18: ; preds = %4
%19 = load i32, i32* %6
%20 = load i32, i32* %7
%21 = icmp slt i32 %19, %20
%22 = zext i1 %21 to i32
store i32 %22, i32* %5
br label %23
23: ; preds = %18, %13
%24 = load i32, i32* %5
ret i32 %24
}

LLVM IR (-O2):
define i32 @fast_less(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp eq i32 %2, %3
%6 = icmp ult i32 %2, %3
%7 = icmp slt i32 %0, %1
%8 = select i1 %5, i1 %7, i1 %6
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t htole32(uint32_t host_32bits) { return host_32bits; }


x86 assembly (clang, -O0):
<htole32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<htole32>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @htole32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @htole32(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ __srandom(unsigned int);
void srandom(unsigned seed) {
  ((void)0);
  __srandom(seed);
  ((void)0);
}


x86 assembly (clang, -O0):
<srandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <__srandom@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<srandom>:
jmp    1030 <__srandom@plt>

LLVM IR (-O0):
define void @srandom(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__srandom(i32 %3)
ret void
}

LLVM IR (-O2):
define void @srandom(i32 %0) {
%2 = tail call i32 @__srandom(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ G2();
void C2() { G2(); }


x86 assembly (clang, -O0):
<C2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <G2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<C2>:
xor    %eax,%eax
jmp    1030 <G2@plt>

LLVM IR (-O0):
define void @C2() {
%1 = call i32 (...) @G2()
ret void
}

LLVM IR (-O2):
define void @C2() {
%1 = tail call i32 (...) @G2()
ret void
}
int ld_eq_rr2(long double a1, long double a2) { return !(((a1) == (a2))); }


x86 assembly (clang, -O0):
<ld_eq_rr2>:
push   %rbp
mov    %rsp,%rbp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
fxch   %st(1)
fucomip %st(1),%st
fstp   %st(0)
setnp  %cl
sete   %al
and    %cl,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ld_eq_rr2>:
fldt   0x18(%rsp)
fldt   0x8(%rsp)
fucomip %st(1),%st
fstp   %st(0)
setp   %al
setne  %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @ld_eq_rr2(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %4
%7 = fcmp oeq x86_fp80 %5, %6
%8 = xor i1 %7, true
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @ld_eq_rr2(x86_fp80 %0, x86_fp80 %1) {
%3 = fcmp une x86_fp80 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
struct copy_args_info {
  int dummy;
};

/* Variables and functions */
int EXIT_SUCCESS;
int copy_cmdline_parser_required(struct copy_args_info *args_info,
                                 const char *prog_name) {
  (void)(args_info);
  (void)(prog_name);
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<copy_cmdline_parser_required>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ecd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_cmdline_parser_required>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
%struct.copy_args_info = type { i32 }
@EXIT_SUCCESS = global i32 0
define i32 @copy_cmdline_parser_required(%struct.copy_args_info* %0, i8* %1) {
%3 = alloca %struct.copy_args_info*
%4 = alloca i8*
store %struct.copy_args_info* %0, %struct.copy_args_info** %3
store i8* %1, i8** %4
%5 = load %struct.copy_args_info*, %struct.copy_args_info** %3
%6 = load i8*, i8** %4
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}

LLVM IR (-O2):
%struct.copy_args_info = type { i32 }
@EXIT_SUCCESS = global i32 0
define i32 @copy_cmdline_parser_required(%struct.copy_args_info* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}
void copy(unsigned char ans[8], unsigned char x[8]) {
  int i;
  for (i = 0; i < 8; i++) {
    ans[i] = x[i];
  }
}


x86 assembly (clang, -O0):
<copy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x8,-0x14(%rbp)
jge    1141 <copy+0x41>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <copy+0x13>
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy>:
mov    (%rsi),%al
mov    %al,(%rdi)
mov    0x1(%rsi),%al
mov    %al,0x1(%rdi)
mov    0x2(%rsi),%al
mov    %al,0x2(%rdi)
mov    0x3(%rsi),%al
mov    %al,0x3(%rdi)
mov    0x4(%rsi),%al
mov    %al,0x4(%rdi)
mov    0x5(%rsi),%al
mov    %al,0x5(%rdi)
mov    0x6(%rsi),%al
mov    %al,0x6(%rdi)
mov    0x7(%rsi),%al
mov    %al,0x7(%rdi)
ret

LLVM IR (-O0):
define void @copy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
br label %6
6: ; preds = %19, %2
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 8
br i1 %8, label %9, label %22
9: ; preds = %6
%10 = load i8*, i8** %4
%11 = load i32, i32* %5
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i8, i8* %13
%15 = load i8*, i8** %3
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
store i8 %14, i8* %18
br label %19
19: ; preds = %9
%20 = load i32, i32* %5
%21 = add nsw i32 %20, 1
store i32 %21, i32* %5
br label %6
22: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @copy(i8* nocapture writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
store i8 %3, i8* %0
%4 = getelementptr inbounds i8, i8* %1, i64 1
%5 = load i8, i8* %4
%6 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %5, i8* %6
%7 = getelementptr inbounds i8, i8* %1, i64 2
%8 = load i8, i8* %7
%9 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %8, i8* %9
%10 = getelementptr inbounds i8, i8* %1, i64 3
%11 = load i8, i8* %10
%12 = getelementptr inbounds i8, i8* %0, i64 3
store i8 %11, i8* %12
%13 = getelementptr inbounds i8, i8* %1, i64 4
%14 = load i8, i8* %13
%15 = getelementptr inbounds i8, i8* %0, i64 4
store i8 %14, i8* %15
%16 = getelementptr inbounds i8, i8* %1, i64 5
%17 = load i8, i8* %16
%18 = getelementptr inbounds i8, i8* %0, i64 5
store i8 %17, i8* %18
%19 = getelementptr inbounds i8, i8* %1, i64 6
%20 = load i8, i8* %19
%21 = getelementptr inbounds i8, i8* %0, i64 6
store i8 %20, i8* %21
%22 = getelementptr inbounds i8, i8* %1, i64 7
%23 = load i8, i8* %22
%24 = getelementptr inbounds i8, i8* %0, i64 7
store i8 %23, i8* %24
ret void
}
void av_get_exact_bits_per_sample() {}


x86 assembly (clang, -O0):
<av_get_exact_bits_per_sample>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_get_exact_bits_per_sample>:
ret

LLVM IR (-O0):
define void @av_get_exact_bits_per_sample() {
ret void
}

LLVM IR (-O2):
define void @av_get_exact_bits_per_sample() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sedb_message(char *);
void sedb_launch_garbage_collector(void) {
  sedb_message(
      "This system is not equipped with the SmartEiffel garbage collector.\n");
}


x86 assembly (clang, -O0):
<sedb_launch_garbage_collector>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <sedb_message@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sedb_launch_garbage_collector>:
lea    0xee9(%rip),%rdi
jmp    1030 <sedb_message@plt>

LLVM IR (-O0):
@.str = [69 x i8] c"This system is not equipped with the SmartEiffel garbage collector.\0A\00"
define void @sedb_launch_garbage_collector() {
%1 = call i32 @sedb_message(i8* getelementptr inbounds ([69 x i8], [69 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [69 x i8] c"This system is not equipped with the SmartEiffel garbage collector.\0A\00"
define void @sedb_launch_garbage_collector() {
%1 = tail call i32 @sedb_message(i8* getelementptr inbounds ([69 x i8], [69 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef scalar_t__ int32_t;

/* Variables and functions */
scalar_t__ __stdfix_sat_r(scalar_t__);
int32_t __stdfix_sneg_r(int32_t x) { return (__stdfix_sat_r((int32_t)-x)); }


x86 assembly (clang, -O0):
<__stdfix_sneg_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    %eax,%edi
sub    -0x8(%rbp),%rdi
call   1030 <__stdfix_sat_r@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__stdfix_sneg_r>:
neg    %rdi
jmp    1030 <__stdfix_sat_r@plt>

LLVM IR (-O0):
define i64 @__stdfix_sneg_r(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sub nsw i64 0, %3
%5 = call i64 @__stdfix_sat_r(i64 %4)
ret i64 %5
}

LLVM IR (-O2):
define i64 @__stdfix_sneg_r(i64 %0) {
%2 = sub nsw i64 0, %0
%3 = tail call i64 @__stdfix_sat_r(i64 %2)
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ output_byte(char);
void print_tab(void) { output_byte('\t'); }


x86 assembly (clang, -O0):
<print_tab>:
push   %rbp
mov    %rsp,%rbp
mov    $0x9,%edi
call   1030 <output_byte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_tab>:
mov    $0x9,%edi
jmp    1030 <output_byte@plt>

LLVM IR (-O0):
define void @print_tab() {
%1 = call i32 @output_byte(i8 signext 9)
ret void
}

LLVM IR (-O2):
define void @print_tab() {
%1 = tail call i32 @output_byte(i8 signext 9)
ret void
}
/* Variables and functions */
int inp_emulate(int);
char TOSH_READ_UART_TXD1_PIN() { return 0x01 & (inp_emulate(0x44) >> 3); }


x86 assembly (clang, -O0):
<TOSH_READ_UART_TXD1_PIN>:
push   %rbp
mov    %rsp,%rbp
mov    $0x44,%edi
call   1030 <inp_emulate@plt>
sar    $0x3,%eax
and    $0x1,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_READ_UART_TXD1_PIN>:
push   %rax
mov    $0x44,%edi
call   1030 <inp_emulate@plt>
shr    $0x3,%al
and    $0x1,%al
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @TOSH_READ_UART_TXD1_PIN() {
%1 = call i32 @inp_emulate(i32 68)
%2 = ashr i32 %1, 3
%3 = and i32 1, %2
%4 = trunc i32 %3 to i8
ret i8 %4
}

LLVM IR (-O2):
define signext i8 @TOSH_READ_UART_TXD1_PIN() {
%1 = tail call i32 @inp_emulate(i32 68)
%2 = trunc i32 %1 to i8
%3 = lshr i8 %2, 3
%4 = and i8 %3, 1
ret i8 %4
}
/* Variables and functions */
int /*<<< orphan*/ endwin();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void finish(int sig) {
  endwin();
  exit(0);
}


x86 assembly (clang, -O0):
<finish>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <endwin@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<finish>:
push   %rax
xor    %eax,%eax
call   1030 <endwin@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @finish(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @endwin()
%4 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @finish(i32 %0) {
%2 = tail call i32 (...) @endwin()
%3 = tail call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
struct twlist_head {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ TWINIT_LIST_HEAD(struct twlist_head *);
int /*<<< orphan*/ __twlist_del_entry(struct twlist_head *);
void twlist_del_init(struct twlist_head *entry) {
  __twlist_del_entry(entry);
  TWINIT_LIST_HEAD(entry);
}


x86 assembly (clang, -O0):
<twlist_del_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__twlist_del_entry@plt>
mov    -0x8(%rbp),%rdi
call   1040 <TWINIT_LIST_HEAD@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<twlist_del_init>:
push   %rbx
mov    %rdi,%rbx
call   1030 <__twlist_del_entry@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <TWINIT_LIST_HEAD@plt>

LLVM IR (-O0):
%struct.twlist_head = type { i32 }
define void @twlist_del_init(%struct.twlist_head* %0) {
%2 = alloca %struct.twlist_head*
store %struct.twlist_head* %0, %struct.twlist_head** %2
%3 = load %struct.twlist_head*, %struct.twlist_head** %2
%4 = call i32 @__twlist_del_entry(%struct.twlist_head* %3)
%5 = load %struct.twlist_head*, %struct.twlist_head** %2
%6 = call i32 @TWINIT_LIST_HEAD(%struct.twlist_head* %5)
ret void
}

LLVM IR (-O2):
%struct.twlist_head = type { i32 }
define void @twlist_del_init(%struct.twlist_head* %0) {
%2 = tail call i32 @__twlist_del_entry(%struct.twlist_head* %0)
%3 = tail call i32 @TWINIT_LIST_HEAD(%struct.twlist_head* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ swap(int *, int /*<<< orphan*/, int /*<<< orphan*/);
void reverse(int *perm, int length) {
  int first = 0;
  int last = length - 1;
  while (first < last)
    swap(perm, first++, last--);
}


x86 assembly (clang, -O0):
<reverse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    115f <reverse+0x4f>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
mov    %esi,%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%edx
mov    %edx,%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
call   1030 <swap@plt>
jmp    112f <reverse+0x1f>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse>:
push   %rbp
push   %r14
push   %rbx
cmp    $0x2,%esi
jl     1146 <reverse+0x36>
mov    %esi,%ebx
mov    %rdi,%r14
add    $0xffffffff,%ebx
xor    %esi,%esi
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
lea    0x1(%rsi),%ebp
mov    %r14,%rdi
mov    %ebx,%edx
call   1030 <swap@plt>
add    $0xffffffff,%ebx
mov    %ebp,%esi
cmp    %ebx,%ebp
jl     1130 <reverse+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @reverse(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
%7 = load i32, i32* %4
%8 = sub nsw i32 %7, 1
store i32 %8, i32* %6
br label %9
9: ; preds = %13, %2
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %20
13: ; preds = %9
%14 = load i32*, i32** %3
%15 = load i32, i32* %5
%16 = add nsw i32 %15, 1
store i32 %16, i32* %5
%17 = load i32, i32* %6
%18 = add nsw i32 %17, -1
store i32 %18, i32* %6
%19 = call i32 @swap(i32* %14, i32 %15, i32 %17)
br label %9
20: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @reverse(i32* %0, i32 %1) {
%3 = icmp sgt i32 %1, 1
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = add nsw i32 %1, -1
br label %6
6: ; preds = %4, %6
%7 = phi i32 [ %11, %6 ], [ %5, %4 ]
%8 = phi i32 [ %9, %6 ], [ 0, %4 ]
%9 = add nuw nsw i32 %8, 1
%10 = tail call i32 @swap(i32* %0, i32 %8, i32 %7)
%11 = add nsw i32 %7, -1
%12 = icmp slt i32 %9, %11
br i1 %12, label %6, label %13
13: ; preds = %6, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ enter_snake();
void enter_game(unsigned char cur) {
  if (cur == 1) {
    enter_snake();
  } else if (cur == 1) {
  } else {
    return;
  }
}


x86 assembly (clang, -O0):
<enter_game>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0x1,%eax
jne    1137 <enter_game+0x27>
mov    $0x0,%al
call   1030 <enter_snake@plt>
jmp    1153 <enter_game+0x43>
movzbl -0x1(%rbp),%eax
cmp    $0x1,%eax
jne    1149 <enter_game+0x39>
jmp    114e <enter_game+0x3e>
jmp    1153 <enter_game+0x43>
jmp    1153 <enter_game+0x43>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<enter_game>:
cmp    $0x1,%dil
jne    111d <enter_game+0xd>
xor    %eax,%eax
jmp    1030 <enter_snake@plt>
ret

LLVM IR (-O0):
define void @enter_game(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 (...) @enter_snake()
br label %15
8: ; preds = %1
%9 = load i8, i8* %2
%10 = zext i8 %9 to i32
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %13
12: ; preds = %8
br label %14
13: ; preds = %8
br label %15
14: ; preds = %12
br label %15
15: ; preds = %13, %14, %6
ret void
}

LLVM IR (-O2):
define void @enter_game(i8 zeroext %0) {
%2 = icmp eq i8 %0, 1
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @enter_snake()
br label %5
5: ; preds = %1, %3
ret void
}
long double __infer_nondet_long_double() {
  long double ret;
  return ret;
}


x86 assembly (clang, -O0):
<__infer_nondet_long_double>:
push   %rbp
mov    %rsp,%rbp
fldt   -0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__infer_nondet_long_double>:
fldz
ret

LLVM IR (-O0):
define x86_fp80 @__infer_nondet_long_double() {
%1 = alloca x86_fp80
%2 = load x86_fp80, x86_fp80* %1
ret x86_fp80 %2
}

LLVM IR (-O2):
define x86_fp80 @__infer_nondet_long_double() {
ret x86_fp80 undef
}
int fetch(const int *adj, int i) { return adj[i]; }


x86 assembly (clang, -O0):
<fetch>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fetch>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @fetch(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i32, i32* %5, i64 %7
%9 = load i32, i32* %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @fetch(i32* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i32, i32* %0, i64 %3
%5 = load i32, i32* %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ _ok(int);
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ stdout;
void ok(int boolean, const char *description) {
  _ok(boolean);
  if (description != 0)
    printf("%s", description);
  printf("\n");
  fflush(stdout);
}


x86 assembly (clang, -O0):
<ok>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <_ok@plt>
cmpq   $0x0,-0x10(%rbp)
je     1164 <ok+0x34>
mov    -0x10(%rbp),%rsi
lea    0xea3(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xe98(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    0x2e67(%rip),%rax
mov    (%rax),%edi
call   1050 <fflush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ok>:
push   %rbx
mov    %rsi,%rbx
call   1050 <_ok@plt>
test   %rbx,%rbx
je     115f <ok+0x1f>
lea    0xeab(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1040 <printf@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    0x2e70(%rip),%rax
mov    (%rax),%edi
pop    %rbx
jmp    1060 <fflush@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [2 x i8] c"\0A\00"
@stdout = global i32 0
define void @ok(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = call i32 @_ok(i32 %5)
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load i8*, i8** %4
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %10)
br label %12
12: ; preds = %9, %2
%13 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%14 = load i32, i32* @stdout
%15 = call i32 @fflush(i32 %14)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@stdout = global i32 0
define void @ok(i32 %0, i8* %1) {
%3 = tail call i32 @_ok(i32 %0)
%4 = icmp eq i8* %1, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %1)
br label %7
7: ; preds = %5, %2
%8 = tail call i32 @putchar(i32 10)
%9 = load i32, i32* @stdout
%10 = tail call i32 @fflush(i32 %9)
ret void
}
/* Variables and functions */
unsigned char *aes256cbc_decrypt(unsigned char *, size_t *,
                                 unsigned char const *, size_t,
                                 unsigned char const *, unsigned char const *);
unsigned char *crypt_decrypt_aes256cbc(unsigned char *out, size_t *out_len,
                                       const unsigned char *in, size_t in_len,
                                       const unsigned char *nonce,
                                       const unsigned char *key) {
  return aes256cbc_decrypt(out, out_len, in, in_len, nonce, key);
}


x86 assembly (clang, -O0):
<crypt_decrypt_aes256cbc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    -0x30(%rbp),%r9
call   1030 <aes256cbc_decrypt@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crypt_decrypt_aes256cbc>:
jmp    1030 <aes256cbc_decrypt@plt>

LLVM IR (-O0):
define i8* @crypt_decrypt_aes256cbc(i8* %0, i64* %1, i8* %2, i64 %3, i8* %4, i8* %5) {
%7 = alloca i8*
%8 = alloca i64*
%9 = alloca i8*
%10 = alloca i64
%11 = alloca i8*
%12 = alloca i8*
store i8* %0, i8** %7
store i64* %1, i64** %8
store i8* %2, i8** %9
store i64 %3, i64* %10
store i8* %4, i8** %11
store i8* %5, i8** %12
%13 = load i8*, i8** %7
%14 = load i64*, i64** %8
%15 = load i8*, i8** %9
%16 = load i64, i64* %10
%17 = load i8*, i8** %11
%18 = load i8*, i8** %12
%19 = call i8* @aes256cbc_decrypt(i8* %13, i64* %14, i8* %15, i64 %16, i8* %17, i8* %18)
ret i8* %19
}

LLVM IR (-O2):
define i8* @crypt_decrypt_aes256cbc(i8* %0, i64* %1, i8* %2, i64 %3, i8* %4, i8* %5) {
%7 = tail call i8* @aes256cbc_decrypt(i8* %0, i64* %1, i8* %2, i64 %3, i8* %4, i8* %5)
ret i8* %7
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void show_help(void) {
  puts("selstr - text filtering");
  puts("usage: <command> | selstr [-i/--ignorecase] <string>\n\n");
  puts("-i/--ignorecase\t\tfilter text ignoring case\n");
  puts("<string>\t\tstring to filter input with\n");
}


x86 assembly (clang, -O0):
<show_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
lea    0xef1(%rip),%rdi
call   1030 <puts@plt>
lea    0xf1c(%rip),%rdi
call   1030 <puts@plt>
lea    0xf3c(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_help>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xef4(%rip),%rdi
call   1030 <puts@plt>
lea    0xf1f(%rip),%rdi
call   1030 <puts@plt>
lea    0xf3f(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"selstr - text filtering\00"
@.str.1 = [55 x i8] c"usage: <command> | selstr [-i/--ignorecase] <string>\0A\0A\00"
@.str.2 = [44 x i8] c"-i/--ignorecase\09\09filter text ignoring case\0A\00"
@.str.3 = [39 x i8] c"<string>\09\09string to filter input with\0A\00"
define void @show_help() {
%1 = call i32 @puts(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @puts(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @puts(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @puts(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"selstr - text filtering\00"
@.str.1 = [55 x i8] c"usage: <command> | selstr [-i/--ignorecase] <string>\0A\0A\00"
@.str.2 = [44 x i8] c"-i/--ignorecase\09\09filter text ignoring case\0A\00"
@.str.3 = [39 x i8] c"<string>\09\09string to filter input with\0A\00"
define void @show_help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([55 x i8], [55 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @.str.3, i64 0, i64 0))
ret void
}
void set_bit(unsigned int *number, int position, int bit_value) {
  if (bit_value == 1) {
    *number |= (bit_value << position);
  } else {
    *number &= (~(1U << position));
  }
}


x86 assembly (clang, -O0):
<set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x1,-0x10(%rbp)
jne    112f <set_bit+0x2f>
mov    -0x10(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    %cl,%eax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
or     (%rax),%ecx
mov    %ecx,(%rax)
jmp    1146 <set_bit+0x46>
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
xor    $0xffffffff,%ecx
mov    -0x8(%rbp),%rax
and    (%rax),%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_bit>:
mov    %esi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
cmp    $0x1,%edx
jne    1113 <set_bit+0x13>
or     (%rdi),%eax
mov    %eax,(%rdi)
ret
not    %eax
and    (%rdi),%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @set_bit(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %16
9: ; preds = %3
%10 = load i32, i32* %6
%11 = load i32, i32* %5
%12 = shl i32 %10, %11
%13 = load i32*, i32** %4
%14 = load i32, i32* %13
%15 = or i32 %14, %12
store i32 %15, i32* %13
br label %23
16: ; preds = %3
%17 = load i32, i32* %5
%18 = shl i32 1, %17
%19 = xor i32 %18, -1
%20 = load i32*, i32** %4
%21 = load i32, i32* %20
%22 = and i32 %21, %19
store i32 %22, i32* %20
br label %23
23: ; preds = %16, %9
ret void
}

LLVM IR (-O2):
define void @set_bit(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %2, 1
%5 = shl nuw i32 1, %1
br i1 %4, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %0
%8 = or i32 %7, %5
br label %13
9: ; preds = %3
%10 = xor i32 %5, -1
%11 = load i32, i32* %0
%12 = and i32 %11, %10
br label %13
13: ; preds = %9, %6
%14 = phi i32 [ %12, %9 ], [ %8, %6 ]
store i32 %14, i32* %0
ret void
}
void prefix_printer(char *log_buf, int len) {}


x86 assembly (clang, -O0):
<prefix_printer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<prefix_printer>:
ret

LLVM IR (-O0):
define void @prefix_printer(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @prefix_printer(i8* nocapture %0, i32 %1) {
ret void
}
/* Type definitions */
struct sigaction {
  void (*sa_handler)(int);
};
typedef int /*<<< orphan*/ sa;

/* Variables and functions */
int /*<<< orphan*/ memset(struct sigaction *, int /*<<< orphan*/, int);
int /*<<< orphan*/ sigaction(int, struct sigaction *, int /*<<< orphan*/ *);
void signal_setup(int signo, void (*handler)(void)) {
  struct sigaction sa;
  memset(&sa, 0, sizeof(sa));
  sa.sa_handler = (void (*)(int))handler;
  sigaction(signo, &sa, NULL);
}


x86 assembly (clang, -O0):
<signal_setup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x18(%rbp),%rdi
xor    %esi,%esi
mov    $0x8,%edx
call   1040 <memset@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x18(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <sigaction@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<signal_setup>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
mov    %edi,%ebp
lea    0x8(%rsp),%r14
mov    %r14,%rdi
xor    %esi,%esi
mov    $0x8,%edx
call   1040 <memset@plt>
mov    %rbx,0x8(%rsp)
mov    %ebp,%edi
mov    %r14,%rsi
xor    %edx,%edx
call   1030 <sigaction@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
%struct.sigaction = type { void (i32)* }
define void @signal_setup(i32 %0, void ()* %1) {
%3 = alloca i32
%4 = alloca void ()*
%5 = alloca %struct.sigaction
store i32 %0, i32* %3
store void ()* %1, void ()** %4
%6 = call i32 @memset(%struct.sigaction* %5, i32 0, i32 8)
%7 = load void ()*, void ()** %4
%8 = bitcast void ()* %7 to void (i32)*
%9 = getelementptr inbounds %struct.sigaction, %struct.sigaction* %5, i32 0, i32 0
store void (i32)* %8, void (i32)** %9
%10 = load i32, i32* %3
%11 = call i32 @sigaction(i32 %10, %struct.sigaction* %5, i32* null)
ret void
}

LLVM IR (-O2):
%struct.sigaction = type { void (i32)* }
define void @signal_setup(i32 %0, void ()* %1) {
%3 = alloca %struct.sigaction
%4 = bitcast %struct.sigaction* %3 to i8*
%5 = call i32 @memset(%struct.sigaction* %3, i32 0, i32 8)
%6 = bitcast %struct.sigaction* %3 to void ()**
store void ()* %1, void ()** %6
%7 = call i32 @sigaction(i32 %0, %struct.sigaction* %3, i32* null)
ret void
}
void check_command(const struct message *message, int socket_fd) {}


x86 assembly (clang, -O0):
<check_command>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_command>:
ret

LLVM IR (-O0):
%struct.message = type opaque
define void @check_command(%struct.message* %0, i32 %1) {
%3 = alloca %struct.message*
%4 = alloca i32
store %struct.message* %0, %struct.message** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.message = type opaque
define void @check_command(%struct.message* nocapture %0, i32 %1) {
ret void
}
void api_stream_on_closed(struct api_filter_t *filter) {}


x86 assembly (clang, -O0):
<api_stream_on_closed>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<api_stream_on_closed>:
ret

LLVM IR (-O0):
%struct.api_filter_t = type opaque
define void @api_stream_on_closed(%struct.api_filter_t* %0) {
%2 = alloca %struct.api_filter_t*
store %struct.api_filter_t* %0, %struct.api_filter_t** %2
ret void
}

LLVM IR (-O2):
%struct.api_filter_t = type opaque
define void @api_stream_on_closed(%struct.api_filter_t* nocapture %0) {
ret void
}
/* Variables and functions */
int do_write_disable(int);
int flash_write_disable(int fd) { return do_write_disable(fd); }


x86 assembly (clang, -O0):
<flash_write_disable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <do_write_disable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flash_write_disable>:
jmp    1030 <do_write_disable@plt>

LLVM IR (-O0):
define i32 @flash_write_disable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @do_write_disable(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @flash_write_disable(i32 %0) {
%2 = tail call i32 @do_write_disable(i32 %0)
ret i32 %2
}
/* Variables and functions */
scalar_t__ islower(int);
scalar_t__ isupper(int);
int has_case(int c) { return (isupper(c) || islower(c)) ? 1 : 0; }


x86 assembly (clang, -O0):
<has_case>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <isupper@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1157 <has_case+0x37>
mov    -0x4(%rbp),%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%dl
xor    %eax,%eax
mov    $0x1,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<has_case>:
push   %rbx
mov    %edi,%ebx
call   1040 <isupper@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <has_case+0x17>
pop    %rbx
ret
mov    %ebx,%edi
call   1030 <islower@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @has_case(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @isupper(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i64 @islower(i32 %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i64
%13 = select i1 %11, i32 1, i32 0
ret i32 %13
}

LLVM IR (-O2):
define i32 @has_case(i32 %0) {
%2 = tail call i64 @isupper(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @islower(i32 %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void PRCMDomainDisable(uint32_t ui32Domains) {

  ;
  if (ui32Domains & 0x00000001) {
    (*((volatile unsigned long *)(0x40082000 + 0x0000002C))) = 0x0;
  }
  if (ui32Domains & 0x00000010) {
    (*((volatile unsigned long *)(0x40082000 + 0x00000030))) = 0x0;
  }
}


x86 assembly (clang, -O0):
<PRCMDomainDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1122 <PRCMDomainDisable+0x22>
mov    $0x4008202c,%eax
movq   $0x0,(%rax)
mov    -0x4(%rbp),%eax
and    $0x10,%eax
cmp    $0x0,%eax
je     113d <PRCMDomainDisable+0x3d>
mov    $0x40082030,%eax
movq   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PRCMDomainDisable>:
test   $0x1,%dil
jne    110d <PRCMDomainDisable+0xd>
test   $0x10,%dil
jne    111f <PRCMDomainDisable+0x1f>
ret
movq   $0x0,0x4008202c
test   $0x10,%dil
je     110c <PRCMDomainDisable+0xc>
movq   $0x0,0x40082030
ret

LLVM IR (-O0):
define void @PRCMDomainDisable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 1
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store volatile i64 0, i64* inttoptr (i64 1074274348 to i64*)
br label %7
7: ; preds = %6, %1
%8 = load i32, i32* %2
%9 = and i32 %8, 16
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7
store volatile i64 0, i64* inttoptr (i64 1074274352 to i64*)
br label %12
12: ; preds = %11, %7
ret void
}

LLVM IR (-O2):
define void @PRCMDomainDisable(i32 %0) {
%2 = and i32 %0, 1
%3 = icmp eq i32 %2, 0
br i1 %3, label %5, label %4
4: ; preds = %1
store volatile i64 0, i64* inttoptr (i64 1074274348 to i64*)
br label %5
5: ; preds = %4, %1
%6 = and i32 %0, 16
%7 = icmp eq i32 %6, 0
br i1 %7, label %9, label %8
8: ; preds = %5
store volatile i64 0, i64* inttoptr (i64 1074274352 to i64*)
br label %9
9: ; preds = %8, %5
ret void
}