xunge/DecIR huggingface dataset:
/* Type definitions */
struct rlimit {
  int dummy;
};

/* Variables and functions */
scalar_t__ setrlimit(int, struct rlimit *);
int /*<<< orphan*/ shutdown(int, char *, int);
void setr(int type, struct rlimit *rlim) {
  if (setrlimit(type, rlim))
    shutdown(7, "setrlimit()", 145 - 1);
}


x86 assembly (clang, -O0):
<setr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <setrlimit@plt>
cmp    $0x0,%rax
je     115b <setr+0x3b>
mov    $0x7,%edi
lea    0xeaf(%rip),%rsi
mov    $0x90,%edx
call   1030 <shutdown@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setr>:
push   %rax
call   1040 <setrlimit@plt>
test   %rax,%rax
je     1142 <setr+0x22>
lea    0xece(%rip),%rsi
mov    $0x7,%edi
mov    $0x90,%edx
pop    %rax
jmp    1030 <shutdown@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.rlimit = type { i32 }
@.str = [12 x i8] c"setrlimit()\00"
define void @setr(i32 %0, %struct.rlimit* %1) {
%3 = alloca i32
%4 = alloca %struct.rlimit*
store i32 %0, i32* %3
store %struct.rlimit* %1, %struct.rlimit** %4
%5 = load i32, i32* %3
%6 = load %struct.rlimit*, %struct.rlimit** %4
%7 = call i64 @setrlimit(i32 %5, %struct.rlimit* %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 @shutdown(i32 7, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 144)
br label %11
11: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
%struct.rlimit = type { i32 }
@.str = [12 x i8] c"setrlimit()\00"
define void @setr(i32 %0, %struct.rlimit* %1) {
%3 = tail call i64 @setrlimit(i32 %0, %struct.rlimit* %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @shutdown(i32 7, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 144)
br label %7
7: ; preds = %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DoubleParameter(float);
int /*<<< orphan*/ LongDoubleParameter(double);
void ArgumentPassing(float f, double d) {
  DoubleParameter(f);
  LongDoubleParameter(f);
  LongDoubleParameter(d);
}


x86 assembly (clang, -O0):
<ArgumentPassing>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movsd  %xmm1,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <DoubleParameter@plt>
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
call   1040 <LongDoubleParameter@plt>
movsd  -0x10(%rbp),%xmm0
call   1040 <LongDoubleParameter@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ArgumentPassing>:
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
movss  %xmm0,0xc(%rsp)
call   1030 <DoubleParameter@plt>
movss  0xc(%rsp),%xmm0
cvtss2sd %xmm0,%xmm0
call   1040 <LongDoubleParameter@plt>
movsd  0x10(%rsp),%xmm0
add    $0x18,%rsp
jmp    1040 <LongDoubleParameter@plt>

LLVM IR (-O0):
define void @ArgumentPassing(float %0, double %1) {
%3 = alloca float
%4 = alloca double
store float %0, float* %3
store double %1, double* %4
%5 = load float, float* %3
%6 = call i32 @DoubleParameter(float %5)
%7 = load float, float* %3
%8 = fpext float %7 to double
%9 = call i32 @LongDoubleParameter(double %8)
%10 = load double, double* %4
%11 = call i32 @LongDoubleParameter(double %10)
ret void
}

LLVM IR (-O2):
define void @ArgumentPassing(float %0, double %1) {
%3 = tail call i32 @DoubleParameter(float %0)
%4 = fpext float %0 to double
%5 = tail call i32 @LongDoubleParameter(double %4)
%6 = tail call i32 @LongDoubleParameter(double %1)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t mp2vpicx_get_fcode00(const uint8_t *p_mp2vpicx) {
  return (p_mp2vpicx[4] & 0xf);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%eax
and    $0xf,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    0x10(%rdi),%eax
and    $0xf,%eax
ret

LLVM IR (-O0):
define i32 @mp2vpicx_get_fcode00(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 4
%5 = load i32, i32* %4
%6 = and i32 %5, 15
ret i32 %6
}

LLVM IR (-O2):
define i32 @mp2vpicx_get_fcode00(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 4
%3 = load i32, i32* %2
%4 = and i32 %3, 15
ret i32 %4
}
/* Variables and functions */
int FNM_PERIOD;
int octave_fnm_period_wrapper(void) { return FNM_PERIOD; }


x86 assembly (clang, -O0):
<octave_fnm_period_wrapper>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<octave_fnm_period_wrapper>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@FNM_PERIOD = global i32 0
define i32 @octave_fnm_period_wrapper() {
%1 = load i32, i32* @FNM_PERIOD
ret i32 %1
}

LLVM IR (-O2):
@FNM_PERIOD = global i32 0
define i32 @octave_fnm_period_wrapper() {
%1 = load i32, i32* @FNM_PERIOD
ret i32 %1
}
int compare_double(void *elem1, void *elem2) {
  return *((long double *)elem1) - *((long double *)elem2);
}


x86 assembly (clang, -O0):
<compare_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
fldt   (%rax)
mov    -0x10(%rbp),%rax
fldt   (%rax)
fsubrp %st,%st(1)
fnstcw -0x16(%rbp)
movzwl -0x16(%rbp),%eax
or     $0xc00,%eax
mov    %ax,-0x18(%rbp)
fldcw  -0x18(%rbp)
fistpl -0x14(%rbp)
fldcw  -0x16(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_double>:
fldt   (%rdi)
fldt   (%rsi)
fsubrp %st,%st(1)
fnstcw -0x8(%rsp)
movzwl -0x8(%rsp),%eax
or     $0xc00,%eax
mov    %ax,-0x6(%rsp)
fldcw  -0x6(%rsp)
fistpl -0x4(%rsp)
fldcw  -0x8(%rsp)
mov    -0x4(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @compare_double(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to x86_fp80*
%7 = load x86_fp80, x86_fp80* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to x86_fp80*
%10 = load x86_fp80, x86_fp80* %9
%11 = fsub x86_fp80 %7, %10
%12 = fptosi x86_fp80 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @compare_double(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to x86_fp80*
%4 = load x86_fp80, x86_fp80* %3
%5 = bitcast i8* %1 to x86_fp80*
%6 = load x86_fp80, x86_fp80* %5
%7 = fsub x86_fp80 %4, %6
%8 = fptosi x86_fp80 %7 to i32
ret i32 %8
}
int add_nop_lct_he(void) {
  int len = 0;
  return len;
}


x86 assembly (clang, -O0):
<add_nop_lct_he>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_nop_lct_he>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @add_nop_lct_he() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @add_nop_lct_he() {
ret i32 0
}
void gdk_event_get() {}


x86 assembly (clang, -O0):
<gdk_event_get>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_event_get>:
ret

LLVM IR (-O0):
define void @gdk_event_get() {
ret void
}

LLVM IR (-O2):
define void @gdk_event_get() {
ret void
}
__attribute__((always_)) void _xend(void) {
  __asm__ volatile(".byte 0x0f, 0x01, 0xd5" ::: "memory");
}


x86 assembly (clang, -O0):
<_xend>:
push   %rbp
mov    %rsp,%rbp
xend
pop    %rbp
ret

x86 assembly (clang, -O2):
<_xend>:
xend
ret

LLVM IR (-O0):
define void @_xend() {
ret void
}

LLVM IR (-O2):
define void @_xend() {
tail call void asm sideeffect ".byte 0x0f, 0x01, 0xd5", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pclmul_avx_test();
void __attribute__((no)) do_test(void) { pclmul_avx_test(); }


x86 assembly (clang, -O0):
<do_test>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <pclmul_avx_test@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_test>:
xor    %eax,%eax
jmp    1030 <pclmul_avx_test@plt>

LLVM IR (-O0):
define void @do_test() {
%1 = call i32 (...) @pclmul_avx_test()
ret void
}

LLVM IR (-O2):
define void @do_test() {
%1 = tail call i32 (...) @pclmul_avx_test()
ret void
}
int hpd_panel_exit(void) { return 0; }


x86 assembly (clang, -O0):
<hpd_panel_exit>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hpd_panel_exit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hpd_panel_exit() {
ret i32 0
}

LLVM IR (-O2):
define i32 @hpd_panel_exit() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
void WatchdogIntClear(unsigned long ulBase) {
  DEBUG_ASSERT((ulBase == 0x40000000) || (ulBase == 0x40001000));
  (*((volatile unsigned long *)(ulBase + 0x0000000C))) = 0x00000001;
}


x86 assembly (clang, -O0):
<WatchdogIntClear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%al
cmpq   $0x40000000,-0x8(%rbp)
40
mov    %al,-0x9(%rbp)
je     113d <WatchdogIntClear+0x2d>
cmpq   $0x40001000,-0x8(%rbp)
40
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
movq   $0x1,0xc(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WatchdogIntClear>:
push   %rbx
mov    %rdi,%rbx
mov    %rdi,%rax
and    $0xffffffffffffefff,%rax
xor    %edi,%edi
cmp    $0x40000000,%rax
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
movq   $0x1,0xc(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @WatchdogIntClear(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp eq i64 %3, 1073741824
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i64, i64* %2
%7 = icmp eq i64 %6, 1073745920
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = call i32 @DEBUG_ASSERT(i32 %10)
%12 = load i64, i64* %2
%13 = add i64 %12, 12
%14 = inttoptr i64 %13 to i64*
store volatile i64 1, i64* %14
ret void
}

LLVM IR (-O2):
define void @WatchdogIntClear(i64 %0) {
%2 = and i64 %0, -4097
%3 = icmp eq i64 %2, 1073741824
%4 = zext i1 %3 to i32
%5 = tail call i32 @DEBUG_ASSERT(i32 %4)
%6 = add i64 %0, 12
%7 = inttoptr i64 %6 to i64*
store volatile i64 1, i64* %7
ret void
}
/* Variables and functions */
int Rand(unsigned int *);
unsigned int UnitRandInt(unsigned int *state) { return Rand(state) % 2; }


x86 assembly (clang, -O0):
<UnitRandInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <Rand@plt>
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UnitRandInt>:
push   %rax
call   1030 <Rand@plt>
mov    %eax,%ecx
shr    $0x1f,%ecx
add    %eax,%ecx
and    $0xfffffffe,%ecx
sub    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @UnitRandInt(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @Rand(i32* %3)
%5 = srem i32 %4, 2
ret i32 %5
}

LLVM IR (-O2):
define i32 @UnitRandInt(i32* %0) {
%2 = tail call i32 @Rand(i32* %0)
%3 = srem i32 %2, 2
ret i32 %3
}
float f(float x, float a) { return x * x - a; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mulss  %xmm0,%xmm0
subss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @f(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %3
%7 = load float, float* %4
%8 = fneg float %7
%9 = call float @llvm.fmuladd.f32(float %5, float %6, float %8)
ret float %9
}

LLVM IR (-O2):
define float @f(float %0, float %1) {
%3 = fneg float %1
%4 = tail call float @llvm.fmuladd.f32(float %0, float %0, float %3)
ret float %4
}
void scif_flush() {
  int v;
  *(volatile unsigned short *)0xffe80010 &= 0xbf;
  while (!((v = *(volatile unsigned short *)0xffe80010) & 0x40))
    ;
  *(volatile unsigned short *)0xffe80010 = v & 0xbf;
}


x86 assembly (clang, -O0):
<scif_flush>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffe80010,%eax
mov    (%rax),%ax
movzwl %ax,%eax
and    $0xbf,%eax
mov    %ax,%cx
mov    $0xffe80010,%eax
mov    %cx,(%rax)
mov    $0xffe80010,%eax
mov    (%rax),%ax
movzwl %ax,%eax
mov    %eax,-0x4(%rbp)
and    $0x40,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1145 <scif_flush+0x45>
jmp    114a <scif_flush+0x4a>
jmp    111f <scif_flush+0x1f>
mov    -0x4(%rbp),%eax
and    $0xbf,%eax
mov    %ax,%cx
mov    $0xffe80010,%eax
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<scif_flush>:
mov    $0xffe80010,%eax
andw   $0xbf,(%rax)
nopw   0x0(%rax,%rax,1)
movzwl (%rax),%ecx
test   $0x40,%cl
je     1110 <scif_flush+0x10>
and    $0xbf,%ecx
mov    %cx,(%rax)
ret

LLVM IR (-O0):
define void @scif_flush() {
%1 = alloca i32
%2 = load volatile i16, i16* inttoptr (i64 4293394448 to i16*)
%3 = zext i16 %2 to i32
%4 = and i32 %3, 191
%5 = trunc i32 %4 to i16
store volatile i16 %5, i16* inttoptr (i64 4293394448 to i16*)
br label %6
6: ; preds = %12, %0
%7 = load volatile i16, i16* inttoptr (i64 4293394448 to i16*)
%8 = zext i16 %7 to i32
store i32 %8, i32* %1
%9 = and i32 %8, 64
%10 = icmp ne i32 %9, 0
%11 = xor i1 %10, true
br i1 %11, label %12, label %13
12: ; preds = %6
br label %6
13: ; preds = %6
%14 = load i32, i32* %1
%15 = and i32 %14, 191
%16 = trunc i32 %15 to i16
store volatile i16 %16, i16* inttoptr (i64 4293394448 to i16*)
ret void
}

LLVM IR (-O2):
define void @scif_flush() {
%1 = load volatile i16, i16* inttoptr (i64 4293394448 to i16*)
%2 = and i16 %1, 191
store volatile i16 %2, i16* inttoptr (i64 4293394448 to i16*)
br label %3
3: ; preds = %3, %0
%4 = load volatile i16, i16* inttoptr (i64 4293394448 to i16*)
%5 = and i16 %4, 64
%6 = icmp eq i16 %5, 0
br i1 %6, label %3, label %7
7: ; preds = %3
%8 = and i16 %4, 191
store volatile i16 %8, i16* inttoptr (i64 4293394448 to i16*)
ret void
}
void fdt_init_reserved_mem(void) {}


x86 assembly (clang, -O0):
<fdt_init_reserved_mem>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdt_init_reserved_mem>:
ret

LLVM IR (-O0):
define void @fdt_init_reserved_mem() {
ret void
}

LLVM IR (-O2):
define void @fdt_init_reserved_mem() {
ret void
}
void testFoo1(void) {}


x86 assembly (clang, -O0):
<testFoo1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testFoo1>:
ret

LLVM IR (-O0):
define void @testFoo1() {
ret void
}

LLVM IR (-O2):
define void @testFoo1() {
ret void
}
int test_imm_27uint8_mem(unsigned char *val) {
  return ((*val) & (-0x27 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_27uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffffd9,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_27uint8_mem>:
testb  $0xd9,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_27uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -39
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_27uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -39
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void rgb565_le(const uint16_t d, uint8_t *r, uint8_t *g, uint8_t *b) {
  *r = (d >> 8 & 0xf8) | (d >> 13);
  *g = (d >> 3 & 0xfc) | (d >> 9 & 3);
  *b = (d << 3) | (d >> 2 & 7);
}


x86 assembly (clang, -O0):
<rgb565_le>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
and    $0xf8,%ecx
mov    -0x4(%rbp),%eax
sar    $0xd,%eax
or     %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%ecx
sar    $0x3,%ecx
and    $0xfc,%ecx
mov    -0x4(%rbp),%eax
sar    $0x9,%eax
and    $0x3,%eax
or     %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%ecx
shl    $0x3,%ecx
mov    -0x4(%rbp),%eax
sar    $0x2,%eax
and    $0x7,%eax
or     %eax,%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgb565_le>:
mov    %edi,%r8d
mov    %edi,%r9d
mov    %edi,%r10d
mov    %edi,%eax
shr    $0x2,%eax
and    $0x7,%eax
lea    (%rax,%rdi,8),%eax
shr    $0x8,%edi
and    $0xf8,%edi
sar    $0xd,%r8d
or     %edi,%r8d
mov    %r8d,(%rsi)
shr    $0x3,%r9d
and    $0xfc,%r9d
shr    $0x9,%r10d
and    $0x3,%r10d
or     %r9d,%r10d
mov    %r10d,(%rdx)
mov    %eax,(%rcx)
ret

LLVM IR (-O0):
define void @rgb565_le(i32 %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32, i32* %5
%10 = ashr i32 %9, 8
%11 = and i32 %10, 248
%12 = load i32, i32* %5
%13 = ashr i32 %12, 13
%14 = or i32 %11, %13
%15 = load i32*, i32** %6
store i32 %14, i32* %15
%16 = load i32, i32* %5
%17 = ashr i32 %16, 3
%18 = and i32 %17, 252
%19 = load i32, i32* %5
%20 = ashr i32 %19, 9
%21 = and i32 %20, 3
%22 = or i32 %18, %21
%23 = load i32*, i32** %7
store i32 %22, i32* %23
%24 = load i32, i32* %5
%25 = shl i32 %24, 3
%26 = load i32, i32* %5
%27 = ashr i32 %26, 2
%28 = and i32 %27, 7
%29 = or i32 %25, %28
%30 = load i32*, i32** %8
store i32 %29, i32* %30
ret void
}

LLVM IR (-O2):
define void @rgb565_le(i32 %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3) {
%5 = lshr i32 %0, 8
%6 = and i32 %5, 248
%7 = ashr i32 %0, 13
%8 = or i32 %6, %7
store i32 %8, i32* %1
%9 = lshr i32 %0, 3
%10 = and i32 %9, 252
%11 = lshr i32 %0, 9
%12 = and i32 %11, 3
%13 = or i32 %10, %12
store i32 %13, i32* %2
%14 = shl i32 %0, 3
%15 = lshr i32 %0, 2
%16 = and i32 %15, 7
%17 = or i32 %16, %14
store i32 %17, i32* %3
ret void
}
/* Variables and functions */
scalar_t__ COND_PL();
int /*<<< orphan*/ EA_A7_PI_8();
int /*<<< orphan*/ m68ki_write_8(int /*<<< orphan*/, int);
void m68k_op_spl_8_pi7(void) {
  m68ki_write_8(EA_A7_PI_8(), COND_PL() ? 0xff : 0);
}


x86 assembly (clang, -O0):
<m68k_op_spl_8_pi7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <EA_A7_PI_8@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <COND_PL@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rcx
xor    %esi,%esi
mov    $0xff,%eax
cmp    $0x0,%rcx
cmovne %eax,%esi
call   1050 <m68ki_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_spl_8_pi7>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %eax,%eax
call   1030 <EA_A7_PI_8@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <COND_PL@plt>
test   %rax,%rax
mov    $0xff,%esi
cmove  %ebp,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <m68ki_write_8@plt>

LLVM IR (-O0):
define void @m68k_op_spl_8_pi7() {
%1 = call i32 (...) @EA_A7_PI_8()
%2 = call i64 (...) @COND_PL()
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 255, i32 0
%6 = call i32 @m68ki_write_8(i32 %1, i32 %5)
ret void
}

LLVM IR (-O2):
define void @m68k_op_spl_8_pi7() {
%1 = tail call i32 (...) @EA_A7_PI_8()
%2 = tail call i64 (...) @COND_PL()
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 0, i32 255
%5 = tail call i32 @m68ki_write_8(i32 %1, i32 %4)
ret void
}
/* Variables and functions */
int log10(int);
int printwidth(long value) {
  int width;
  if (value == 0)
    width = 1;
  else if (value < 0)
    width = log10(-1. * value) + 2;
  else
    width = log10(1. * value) + 1;
  return (width);
}


x86 assembly (clang, -O0):
<printwidth>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1133 <printwidth+0x23>
movl   $0x1,-0xc(%rbp)
jmp    118a <printwidth+0x7a>
cmpq   $0x0,-0x8(%rbp)
jge    1164 <printwidth+0x54>
cvtsi2sdq -0x8(%rbp),%xmm1
movsd  0xebc(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <log10@plt>
add    $0x2,%eax
mov    %eax,-0xc(%rbp)
jmp    1185 <printwidth+0x75>
cvtsi2sdq -0x8(%rbp),%xmm1
movsd  0xe8e(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <log10@plt>
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    118a <printwidth+0x7a>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printwidth>:
test   %rdi,%rdi
je     113d <printwidth+0x2d>
push   %rbx
mov    %rdi,%rbx
cvtsi2sd %rdi,%xmm0
xorpd  0xeda(%rip),%xmm0
cvttsd2si %xmm0,%edi
cmovns %ebx,%edi
shr    $0x3f,%rbx
call   1030 <log10@plt>
add    %ebx,%eax
add    $0x1,%eax
pop    %rbx
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @printwidth(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %3
br label %25
7: ; preds = %1
%8 = load i64, i64* %2
%9 = icmp slt i64 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %7
%11 = load i64, i64* %2
%12 = sitofp i64 %11 to double
%13 = fmul double -1.000000e+00, %12
%14 = fptosi double %13 to i32
%15 = call i32 @log10(i32 %14)
%16 = add nsw i32 %15, 2
store i32 %16, i32* %3
br label %24
17: ; preds = %7
%18 = load i64, i64* %2
%19 = sitofp i64 %18 to double
%20 = fmul double 1.000000e+00, %19
%21 = fptosi double %20 to i32
%22 = call i32 @log10(i32 %21)
%23 = add nsw i32 %22, 1
store i32 %23, i32* %3
br label %24
24: ; preds = %17, %10
br label %25
25: ; preds = %24, %6
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @printwidth(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %13, label %3
3: ; preds = %1
%4 = icmp slt i64 %0, 0
%5 = sitofp i64 %0 to double
%6 = fneg double %5
%7 = fptosi double %6 to i32
%8 = trunc i64 %0 to i32
%9 = select i1 %4, i32 %7, i32 %8
%10 = select i1 %4, i32 2, i32 1
%11 = tail call i32 @log10(i32 %9)
%12 = add nsw i32 %11, %10
br label %13
13: ; preds = %3, %1
%14 = phi i32 [ 1, %1 ], [ %12, %3 ]
ret i32 %14
}
/* Variables and functions */
int firstWordIndex(char *);
int /*<<< orphan*/ strcpy(char *, char *);
int strlen(char *);
void getArgs(char *cadena, char *args) {
  int size = strlen(cadena);
  int pos = firstWordIndex(cadena) + 1;
  if (pos == size + 1)
    strcpy(args, "");
  else
    strcpy(args, &cadena[pos]);
}


x86 assembly (clang, -O0):
<getArgs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <firstWordIndex@plt>
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    -0x14(%rbp),%ecx
add    $0x1,%ecx
cmp    %ecx,%eax
jne    1181 <getArgs+0x51>
mov    -0x10(%rbp),%rdi
lea    0xe89(%rip),%rsi
call   1030 <strcpy@plt>
jmp    1195 <getArgs+0x65>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
movslq -0x18(%rbp),%rax
add    %rax,%rsi
call   1030 <strcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getArgs>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1050 <firstWordIndex@plt>
cmp    %ebp,%eax
cltq
lea    0x1(%rax,%rbx,1),%rax
lea    0xea7(%rip),%rsi
cmovne %rax,%rsi
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define void @getArgs(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = call i32 @strlen(i8* %7)
store i32 %8, i32* %5
%9 = load i8*, i8** %3
%10 = call i32 @firstWordIndex(i8* %9)
%11 = add nsw i32 %10, 1
store i32 %11, i32* %6
%12 = load i32, i32* %6
%13 = load i32, i32* %5
%14 = add nsw i32 %13, 1
%15 = icmp eq i32 %12, %14
br i1 %15, label %16, label %19
16: ; preds = %2
%17 = load i8*, i8** %4
%18 = call i32 @strcpy(i8* %17, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
br label %26
19: ; preds = %2
%20 = load i8*, i8** %4
%21 = load i8*, i8** %3
%22 = load i32, i32* %6
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
%25 = call i32 @strcpy(i8* %20, i8* %24)
br label %26
26: ; preds = %19, %16
ret void
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define void @getArgs(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = tail call i32 @firstWordIndex(i8* %0)
%5 = icmp eq i32 %4, %3
%6 = add nsw i32 %4, 1
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = select i1 %5, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* %8
%10 = tail call i32 @strcpy(i8* %1, i8* %9)
ret void
}
double msRealToSim(double ms) { return (ms / 100.0) * 60.0; }


x86 assembly (clang, -O0):
<msRealToSim>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xef2(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  0xede(%rip),%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<msRealToSim>:
divsd  0xef8(%rip),%xmm0
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @msRealToSim(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 1.000000e+02
%5 = fmul double %4, 6.000000e+01
ret double %5
}

LLVM IR (-O2):
define double @msRealToSim(double %0) {
%2 = fdiv double %0, 1.000000e+02
%3 = fmul double %2, 6.000000e+01
ret double %3
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t bl_custom_ram_baseaddr(void) { return 0x00000000; }


x86 assembly (clang, -O0):
<bl_custom_ram_baseaddr>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bl_custom_ram_baseaddr>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @bl_custom_ram_baseaddr() {
ret i32 0
}

LLVM IR (-O2):
define i32 @bl_custom_ram_baseaddr() {
ret i32 0
}
/* Variables and functions */
int strlen(char *);
size_t remove_new_line(char *str) {
  int lenght = strlen(str);
  if (str[lenght - 1] == '\n') {
    str[lenght - 1] = '\0';
  }
  return lenght - 1;
}


x86 assembly (clang, -O0):
<remove_new_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0xa,%eax
jne    1153 <remove_new_line+0x43>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_new_line>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
movslq %eax,%rcx
lea    -0x1(%rcx),%rax
cmpb   $0xa,-0x1(%rbx,%rcx,1)
jne    112b <remove_new_line+0x1b>
movb   $0x0,(%rbx,%rax,1)
pop    %rbx
ret

LLVM IR (-O0):
define i64 @remove_new_line(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
store i32 %5, i32* %3
%6 = load i8*, i8** %2
%7 = load i32, i32* %3
%8 = sub nsw i32 %7, 1
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %6, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 10
br i1 %13, label %14, label %20
14: ; preds = %1
%15 = load i8*, i8** %2
%16 = load i32, i32* %3
%17 = sub nsw i32 %16, 1
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %15, i64 %18
store i8 0, i8* %19
br label %20
20: ; preds = %14, %1
%21 = load i32, i32* %3
%22 = sub nsw i32 %21, 1
%23 = sext i32 %22 to i64
ret i64 %23
}

LLVM IR (-O2):
define i64 @remove_new_line(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, -1
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 10
br i1 %7, label %8, label %9
8: ; preds = %1
store i8 0, i8* %5
br label %9
9: ; preds = %8, %1
ret i64 %4
}
/* Variables and functions */
int ComparaNum(int, int, char);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, int *, char *);
int main() {
  int Num1, Num2, Resultado;
  char Opcao;
  scanf("%d %d %c", &Num1, &Num2, &Opcao);
  Resultado = ComparaNum(Num1, Num2, Opcao);
  printf("%d", Resultado);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x11(%rbp),%rcx
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
movsbl -0x11(%rbp),%edx
call   1030 <ComparaNum@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%esi
lea    0xe96(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
lea    0xec5(%rip),%rdi
lea    0x14(%rsp),%rsi
lea    0x10(%rsp),%rdx
lea    0xf(%rsp),%rcx
call   1050 <scanf@plt>
mov    0x14(%rsp),%edi
mov    0x10(%rsp),%esi
movsbl 0xf(%rsp),%edx
call   1030 <ComparaNum@plt>
lea    0xea1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [9 x i8] c"%d %d %c\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8
store i32 0, i32* %1
%6 = call i32 @scanf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32* %2, i32* %3, i8* %5)
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = load i8, i8* %5
%10 = call i32 @ComparaNum(i32 %7, i32 %8, i8 signext %9)
store i32 %10, i32* %4
%11 = load i32, i32* %4
%12 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"%d %d %c\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8
%4 = bitcast i32* %1 to i8*
%5 = bitcast i32* %2 to i8*
%6 = call i32 @scanf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2, i8* %3)
%7 = load i32, i32* %1
%8 = load i32, i32* %2
%9 = load i8, i8* %3
%10 = call i32 @ComparaNum(i32 %7, i32 %8, i8 signext %9)
%11 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %10)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ bool_t;

/* Variables and functions */
int /*<<< orphan*/ TRUE;
__attribute__((visibility("default"))) bool_t xdr_void(void) { return (TRUE); }


x86 assembly (clang, -O0):
<xdr_void>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xdr_void>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@TRUE = global i32 0
define i32 @xdr_void() {
%1 = load i32, i32* @TRUE
ret i32 %1
}

LLVM IR (-O2):
@TRUE = global i32 0
define i32 @xdr_void() {
%1 = load i32, i32* @TRUE
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ NETSCAPE_CERT_SEQUENCE;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
int /*<<< orphan*/ ASN1_item_free(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ NETSCAPE_CERT_SEQUENCE_it;
void NETSCAPE_CERT_SEQUENCE_free(NETSCAPE_CERT_SEQUENCE *a) {
  ASN1_item_free((ASN1_VALUE *)a, &NETSCAPE_CERT_SEQUENCE_it);
}


x86 assembly (clang, -O0):
<NETSCAPE_CERT_SEQUENCE_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ec9(%rip),%rsi
call   1030 <ASN1_item_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NETSCAPE_CERT_SEQUENCE_free>:
mov    0x2ed9(%rip),%rsi
jmp    1030 <ASN1_item_free@plt>

LLVM IR (-O0):
@NETSCAPE_CERT_SEQUENCE_it = global i32 0
define void @NETSCAPE_CERT_SEQUENCE_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @ASN1_item_free(i32* %3, i32* @NETSCAPE_CERT_SEQUENCE_it)
ret void
}

LLVM IR (-O2):
@NETSCAPE_CERT_SEQUENCE_it = global i32 0
define void @NETSCAPE_CERT_SEQUENCE_free(i32* %0) {
%2 = tail call i32 @ASN1_item_free(i32* %0, i32* @NETSCAPE_CERT_SEQUENCE_it)
ret void
}
void stopServoBlaster(void) {}


x86 assembly (clang, -O0):
<stopServoBlaster>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stopServoBlaster>:
ret

LLVM IR (-O0):
define void @stopServoBlaster() {
ret void
}

LLVM IR (-O2):
define void @stopServoBlaster() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int day, x1, x2;
  x2 = 1;
  day = 9;
  while (day > 0) {
    x1 = (x2 + 1) * 2;
    x2 = x1;
    day--;
  }
  printf("total = %d\n", x2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x10(%rbp)
movl   $0x9,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1157 <main+0x47>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    112d <main+0x1d>
mov    -0x10(%rbp),%esi
lea    0xe9f(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x5fe,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"total = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %4
store i32 9, i32* %2
br label %5
5: ; preds = %8, %0
%6 = load i32, i32* %2
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %5
%9 = load i32, i32* %4
%10 = add nsw i32 %9, 1
%11 = mul nsw i32 %10, 2
store i32 %11, i32* %3
%12 = load i32, i32* %3
store i32 %12, i32* %4
%13 = load i32, i32* %2
%14 = add nsw i32 %13, -1
store i32 %14, i32* %2
br label %5
15: ; preds = %5
%16 = load i32, i32* %4
%17 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %16)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"total = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 1534)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
void swap(uint8_t *x, uint8_t *y) {
  uint8_t tmp;
  tmp = *x;
  *x = *y;
  *y = tmp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
int __fxstatat64(int ver, int dirfd, const char *pathname, struct stat64 *buf,
                 int flags) {
  ;
  return -1;
}


x86 assembly (clang, -O0):
<__fxstatat64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__fxstatat64>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.stat64 = type opaque
define i32 @__fxstatat64(i32 %0, i32 %1, i8* %2, %struct.stat64* %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
%9 = alloca %struct.stat64*
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i8* %2, i8** %8
store %struct.stat64* %3, %struct.stat64** %9
store i32 %4, i32* %10
ret i32 -1
}

LLVM IR (-O2):
%struct.stat64 = type opaque
define i32 @__fxstatat64(i32 %0, i32 %1, i8* nocapture readnone %2, %struct.stat64* nocapture readnone %3, i32 %4) {
ret i32 -1
}
/* Type definitions */
typedef int int16_t;

/* Variables and functions */
int shr(int, int);
int16_t shr_r(int16_t var1, int16_t var2) {
  int16_t var_out;
  if (var2 > 15) {
    var_out = 0;
  } else {
    var_out = shr(var1, var2);
    if (var2 > 0) {
      if ((var1 & ((int16_t)1 << (var2 - 1))) != 0) {
        var_out++;
      }
    }
  }
  return (var_out);
}


x86 assembly (clang, -O0):
<shr_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0xf,-0x8(%rbp)
jle    1134 <shr_r+0x24>
movl   $0x0,-0xc(%rbp)
jmp    117c <shr_r+0x6c>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <shr@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1177 <shr_r+0x67>
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     1172 <shr_r+0x62>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1177 <shr_r+0x67>
jmp    117c <shr_r+0x6c>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shr_r>:
push   %rbp
push   %rbx
push   %rax
xor    %eax,%eax
cmp    $0xf,%esi
jg     1134 <shr_r+0x24>
mov    %esi,%ebp
mov    %edi,%ebx
call   1030 <shr@plt>
test   %ebp,%ebp
jle    1134 <shr_r+0x24>
add    $0xff,%bpl
mov    %ebp,%ecx
shr    %cl,%ebx
and    $0x1,%ebx
add    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @shr_r(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 15
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 0, i32* %5
br label %27
9: ; preds = %2
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = call i32 @shr(i32 %10, i32 %11)
store i32 %12, i32* %5
%13 = load i32, i32* %4
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %26
15: ; preds = %9
%16 = load i32, i32* %3
%17 = load i32, i32* %4
%18 = sub nsw i32 %17, 1
%19 = shl i32 1, %18
%20 = and i32 %16, %19
%21 = icmp ne i32 %20, 0
br i1 %21, label %22, label %25
22: ; preds = %15
%23 = load i32, i32* %5
%24 = add nsw i32 %23, 1
store i32 %24, i32* %5
br label %25
25: ; preds = %22, %15
br label %26
26: ; preds = %25, %9
br label %27
27: ; preds = %26, %8
%28 = load i32, i32* %5
ret i32 %28
}

LLVM IR (-O2):
define i32 @shr_r(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, 15
br i1 %3, label %12, label %4
4: ; preds = %2
%5 = tail call i32 @shr(i32 %0, i32 %1)
%6 = icmp sgt i32 %1, 0
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = add nsw i32 %1, -1
%9 = lshr i32 %0, %8
%10 = and i32 %9, 1
%11 = add nsw i32 %5, %10
br label %12
12: ; preds = %7, %2, %4
%13 = phi i32 [ %5, %4 ], [ 0, %2 ], [ %11, %7 ]
ret i32 %13
}
int sumTwo(int a) { return a + 2; }


x86 assembly (clang, -O0):
<sumTwo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sumTwo>:
lea    0x2(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @sumTwo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 2
ret i32 %4
}

LLVM IR (-O2):
define i32 @sumTwo(i32 %0) {
%2 = add nsw i32 %0, 2
ret i32 %2
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMRE0_set(void) { return U_WMRCORENONE_set("U_WMRE0"); }


x86 assembly (clang, -O0):
<U_WMRE0_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRE0_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMRE0\00"
define i8* @U_WMRE0_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMRE0\00"
define i8* @U_WMRE0_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ rst(int);
void opcode_d7() { rst(0x10); }


x86 assembly (clang, -O0):
<opcode_d7>:
push   %rbp
mov    %rsp,%rbp
mov    $0x10,%edi
call   1030 <rst@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<opcode_d7>:
mov    $0x10,%edi
jmp    1030 <rst@plt>

LLVM IR (-O0):
define void @opcode_d7() {
%1 = call i32 @rst(i32 16)
ret void
}

LLVM IR (-O2):
define void @opcode_d7() {
%1 = tail call i32 @rst(i32 16)
ret void
}
/* Variables and functions */
long rul__conrg_get_cur_block_index();
int /*<<< orphan*/ sprintf(char *, char *, char *, long);
char *gen_get_cur_beta_name(void) {
  static char name_buffer[50];
  long bl_num;
  bl_num = rul__conrg_get_cur_block_index();
  sprintf(name_buffer, "%s%ld_bc", "rul_", bl_num);
  return (name_buffer);
}


x86 assembly (clang, -O0):
<gen_get_cur_beta_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <rul__conrg_get_cur_block_index@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
lea    0x2f02(%rip),%rdi
lea    0xebb(%rip),%rsi
lea    0xebd(%rip),%rdx
call   1040 <sprintf@plt>
lea    0x2ee8(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_get_cur_beta_name>:
push   %rbx
xor    %eax,%eax
call   1030 <rul__conrg_get_cur_block_index@plt>
lea    0x2f11(%rip),%rbx
lea    0xeca(%rip),%rsi
lea    0xecc(%rip),%rdx
mov    %rbx,%rdi
mov    %rax,%rcx
call   1040 <sprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@gen_get_cur_beta_name.name_buffer = internal global [50 x i8] zeroinitializer
@.str = [9 x i8] c"%s%ld_bc\00"
@.str.1 = [5 x i8] c"rul_\00"
define i8* @gen_get_cur_beta_name() {
%1 = alloca i64
%2 = call i64 (...) @rul__conrg_get_cur_block_index()
store i64 %2, i64* %1
%3 = load i64, i64* %1
%4 = call i32 @sprintf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @gen_get_cur_beta_name.name_buffer, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i64 %3)
ret i8* getelementptr inbounds ([50 x i8], [50 x i8]* @gen_get_cur_beta_name.name_buffer, i64 0, i64 0)
}

LLVM IR (-O2):
@gen_get_cur_beta_name.name_buffer = internal global [50 x i8] zeroinitializer
@.str = [9 x i8] c"%s%ld_bc\00"
@.str.1 = [5 x i8] c"rul_\00"
define i8* @gen_get_cur_beta_name() {
%1 = tail call i64 (...) @rul__conrg_get_cur_block_index()
%2 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([50 x i8], [50 x i8]* @gen_get_cur_beta_name.name_buffer, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i64 %1)
ret i8* getelementptr inbounds ([50 x i8], [50 x i8]* @gen_get_cur_beta_name.name_buffer, i64 0, i64 0)
}
/* Variables and functions */
scalar_t__ __builtin_j0l(long double);
int /*<<< orphan*/ link_failure_builtin_j0l();
void test_builtin_j0l(long double ld) {
  if (__builtin_j0l(ld) != __builtin_j0l(ld))
    link_failure_builtin_j0l();
}


x86 assembly (clang, -O0):
<test_builtin_j0l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <__builtin_j0l@plt>
mov    %rax,-0x18(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <__builtin_j0l@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
je     1163 <test_builtin_j0l+0x43>
mov    $0x0,%al
call   1040 <link_failure_builtin_j0l@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_builtin_j0l>:
push   %rbx
sub    $0x20,%rsp
fldt   0x30(%rsp)
fld    %st(0)
fstpt  0x14(%rsp)
fstpt  (%rsp)
call   1030 <__builtin_j0l@plt>
mov    %rax,%rbx
fldt   0x14(%rsp)
fstpt  (%rsp)
call   1030 <__builtin_j0l@plt>
cmp    %rax,%rbx
jne    1151 <test_builtin_j0l+0x31>
add    $0x20,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
jmp    1040 <link_failure_builtin_j0l@plt>

LLVM IR (-O0):
define void @test_builtin_j0l(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call i64 @__builtin_j0l(x86_fp80 %3)
%5 = load x86_fp80, x86_fp80* %2
%6 = call i64 @__builtin_j0l(x86_fp80 %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_builtin_j0l()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_builtin_j0l(x86_fp80 %0) {
%2 = tail call i64 @__builtin_j0l(x86_fp80 %0)
%3 = tail call i64 @__builtin_j0l(x86_fp80 %0)
%4 = icmp eq i64 %2, %3
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @link_failure_builtin_j0l()
br label %7
7: ; preds = %5, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FrameDelay(int);
void DoSleep(int n) { FrameDelay(n); }


x86 assembly (clang, -O0):
<DoSleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <FrameDelay@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoSleep>:
jmp    1030 <FrameDelay@plt>

LLVM IR (-O0):
define void @DoSleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @FrameDelay(i32 %3)
ret void
}

LLVM IR (-O2):
define void @DoSleep(i32 %0) {
%2 = tail call i32 @FrameDelay(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ emit(char *);
int /*<<< orphan*/ flags_v0();
int /*<<< orphan*/ ret_timing(int);
int /*<<< orphan*/ selftest(int);
int /*<<< orphan*/ usereg();
void i_extbw(void) {
  usereg();
  emit("movsx cx,byte[__dreg+ebx*4]\n");
  emit("mov [__dreg+ebx*4],cx\n");
  selftest(2);
  flags_v0();
  ret_timing(4);
}


x86 assembly (clang, -O0):
<i_extbw>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <usereg@plt>
lea    0xe9e(%rip),%rdi
call   1060 <emit@plt>
lea    0xeaf(%rip),%rdi
call   1060 <emit@plt>
mov    $0x2,%edi
call   1030 <selftest@plt>
mov    $0x0,%al
call   1040 <flags_v0@plt>
mov    $0x4,%edi
call   1070 <ret_timing@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<i_extbw>:
push   %rax
xor    %eax,%eax
call   1050 <usereg@plt>
lea    0xea1(%rip),%rdi
call   1060 <emit@plt>
lea    0xeb2(%rip),%rdi
call   1060 <emit@plt>
mov    $0x2,%edi
call   1030 <selftest@plt>
xor    %eax,%eax
call   1040 <flags_v0@plt>
mov    $0x4,%edi
pop    %rax
jmp    1070 <ret_timing@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"movsx cx,byte[__dreg+ebx*4]\0A\00"
@.str.1 = [23 x i8] c"mov [__dreg+ebx*4],cx\0A\00"
define void @i_extbw() {
%1 = call i32 (...) @usereg()
%2 = call i32 @emit(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @emit(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0))
%4 = call i32 @selftest(i32 2)
%5 = call i32 (...) @flags_v0()
%6 = call i32 @ret_timing(i32 4)
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"movsx cx,byte[__dreg+ebx*4]\0A\00"
@.str.1 = [23 x i8] c"mov [__dreg+ebx*4],cx\0A\00"
define void @i_extbw() {
%1 = tail call i32 (...) @usereg()
%2 = tail call i32 @emit(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @emit(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i32 @selftest(i32 2)
%5 = tail call i32 (...) @flags_v0()
%6 = tail call i32 @ret_timing(i32 4)
ret void
}