xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int fchmodat(int dirfd, const char *pathname, mode_t mode, int flags) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<fchmodat>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    0x2ed0(%rip),%rax
mov    (%rax),%ecx
mov    0x2eb7(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fchmodat>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @fchmodat(i32 %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* @ENOSYS
store i32 %9, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @fchmodat(i32 %0, i8* nocapture readnone %1, i32 %2, i32 %3) {
%5 = load i32, i32* @ENOSYS
store i32 %5, i32* @errno
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void __MINIK_write(int x) { printf("%i\n", x); }


x86 assembly (clang, -O0):
<__MINIK_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__MINIK_write>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%i\0A\00"
define void @__MINIK_write(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%i\0A\00"
define void @__MINIK_write(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ serial_close(int);
void PIC18F27K40_stop(void) {
  serial_close(0);
  ;
  serial_close(1);
  ;
}


x86 assembly (clang, -O0):
<PIC18F27K40_stop>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <serial_close@plt>
mov    $0x1,%edi
call   1030 <serial_close@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PIC18F27K40_stop>:
push   %rax
xor    %edi,%edi
call   1030 <serial_close@plt>
mov    $0x1,%edi
pop    %rax
jmp    1030 <serial_close@plt>

LLVM IR (-O0):
define void @PIC18F27K40_stop() {
%1 = call i32 @serial_close(i32 0)
%2 = call i32 @serial_close(i32 1)
ret void
}

LLVM IR (-O2):
define void @PIC18F27K40_stop() {
%1 = tail call i32 @serial_close(i32 0)
%2 = tail call i32 @serial_close(i32 1)
ret void
}
float subtracao(float a, float b) { return a - b; }


x86 assembly (clang, -O0):
<subtracao>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
subss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<subtracao>:
subss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @subtracao(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fsub float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @subtracao(float %0, float %1) {
%3 = fsub float %0, %1
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ foo();
void test_lastprivate() {
  int i;
#pragma omp parallel
#pragma omp sections lastprivate(
  { foo(); }
#pragma omp parallel
#pragma omp sections lastprivate(,
  { foo(); }
#pragma omp parallel
#pragma omp sections lastprivate(, )
  { foo(); }
#pragma omp parallel
#pragma omp sections lastprivate()
  { foo(); }
#pragma omp parallel
#pragma omp sections lastprivate(int)
  { foo(); }
#pragma omp parallel
#pragma omp sections lastprivate(0)
  { foo(); }
  int x, y, z;
#pragma omp parallel
#pragma omp sections lastprivate(x)
  { foo(); }
#pragma omp parallel
#pragma omp sections lastprivate(x, y)
  { foo(); }
#pragma omp parallel
#pragma omp sections lastprivate(x, y, z)
  { foo(); }
}


x86 assembly (clang, -O0):
<test_lastprivate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_lastprivate>:
push   %rax
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <foo@plt>

LLVM IR (-O0):
define void @test_lastprivate() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = call i32 (...) @foo()
%6 = call i32 (...) @foo()
%7 = call i32 (...) @foo()
%8 = call i32 (...) @foo()
%9 = call i32 (...) @foo()
%10 = call i32 (...) @foo()
%11 = call i32 (...) @foo()
%12 = call i32 (...) @foo()
%13 = call i32 (...) @foo()
ret void
}

LLVM IR (-O2):
define void @test_lastprivate() {
%1 = tail call i32 (...) @foo()
%2 = tail call i32 (...) @foo()
%3 = tail call i32 (...) @foo()
%4 = tail call i32 (...) @foo()
%5 = tail call i32 (...) @foo()
%6 = tail call i32 (...) @foo()
%7 = tail call i32 (...) @foo()
%8 = tail call i32 (...) @foo()
%9 = tail call i32 (...) @foo()
ret void
}
long utilVal2Ip(unsigned long u4Val, unsigned char *byIp) {
  if (byIp == (0))
    return (-1);
  byIp[0] = (unsigned char)(u4Val >> 24);
  byIp[1] = (unsigned char)(u4Val >> 16) & 0xFF;
  byIp[2] = (unsigned char)(u4Val >> 8) & 0xFF;
  byIp[3] = (unsigned char)(u4Val >> 0) & 0xFF;
  return (0);
}


x86 assembly (clang, -O0):
<utilVal2Ip>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1124 <utilVal2Ip+0x24>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    1187 <utilVal2Ip+0x87>
mov    -0x10(%rbp),%rax
shr    $0x18,%rax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
shr    $0x10,%rax
movzbl %al,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x10(%rbp),%rax
shr    $0x8,%rax
movzbl %al,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0x10(%rbp),%rax
shr    $0x0,%rax
movzbl %al,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x3(%rax)
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utilVal2Ip>:
test   %rsi,%rsi
je     110c <utilVal2Ip+0xc>
bswap  %edi
mov    %edi,(%rsi)
xor    %eax,%eax
ret
mov    $0xffffffffffffffff,%rax
ret

LLVM IR (-O0):
define i64 @utilVal2Ip(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %4
store i8* %1, i8** %5
%6 = load i8*, i8** %5
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %9
8: ; preds = %2
store i64 -1, i64* %3
br label %39
9: ; preds = %2
%10 = load i64, i64* %4
%11 = lshr i64 %10, 24
%12 = trunc i64 %11 to i8
%13 = load i8*, i8** %5
%14 = getelementptr inbounds i8, i8* %13, i64 0
store i8 %12, i8* %14
%15 = load i64, i64* %4
%16 = lshr i64 %15, 16
%17 = trunc i64 %16 to i8
%18 = zext i8 %17 to i32
%19 = and i32 %18, 255
%20 = trunc i32 %19 to i8
%21 = load i8*, i8** %5
%22 = getelementptr inbounds i8, i8* %21, i64 1
store i8 %20, i8* %22
%23 = load i64, i64* %4
%24 = lshr i64 %23, 8
%25 = trunc i64 %24 to i8
%26 = zext i8 %25 to i32
%27 = and i32 %26, 255
%28 = trunc i32 %27 to i8
%29 = load i8*, i8** %5
%30 = getelementptr inbounds i8, i8* %29, i64 2
store i8 %28, i8* %30
%31 = load i64, i64* %4
%32 = lshr i64 %31, 0
%33 = trunc i64 %32 to i8
%34 = zext i8 %33 to i32
%35 = and i32 %34, 255
%36 = trunc i32 %35 to i8
%37 = load i8*, i8** %5
%38 = getelementptr inbounds i8, i8* %37, i64 3
store i8 %36, i8* %38
store i64 0, i64* %3
br label %39
39: ; preds = %9, %8
%40 = load i64, i64* %3
ret i64 %40
}

LLVM IR (-O2):
define i64 @utilVal2Ip(i64 %0, i8* writeonly %1) {
%3 = icmp eq i8* %1, null
br i1 %3, label %15, label %4
4: ; preds = %2
%5 = lshr i64 %0, 24
%6 = trunc i64 %5 to i8
store i8 %6, i8* %1
%7 = lshr i64 %0, 16
%8 = trunc i64 %7 to i8
%9 = getelementptr inbounds i8, i8* %1, i64 1
store i8 %8, i8* %9
%10 = lshr i64 %0, 8
%11 = trunc i64 %10 to i8
%12 = getelementptr inbounds i8, i8* %1, i64 2
store i8 %11, i8* %12
%13 = trunc i64 %0 to i8
%14 = getelementptr inbounds i8, i8* %1, i64 3
store i8 %13, i8* %14
br label %15
15: ; preds = %2, %4
%16 = phi i64 [ 0, %4 ], [ -1, %2 ]
ret i64 %16
}
/* Variables and functions */
int /*<<< orphan*/ GL_CULL_FACE;
int /*<<< orphan*/ glDisable(int /*<<< orphan*/);
int /*<<< orphan*/ glEnable(int /*<<< orphan*/);
void cfunc(void) {
  static int state = 1;
  if (state ^= 1)
    glEnable(GL_CULL_FACE);
  else
    glDisable(GL_CULL_FACE);
}


x86 assembly (clang, -O0):
<cfunc>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f06(%rip),%eax
xor    $0x1,%eax
mov    %eax,0x2efd(%rip)
cmp    $0x0,%eax
je     114f <cfunc+0x2f>
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
call   1030 <glEnable@plt>
jmp    115d <cfunc+0x3d>
mov    0x2e8a(%rip),%rax
mov    (%rax),%edi
call   1040 <glDisable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfunc>:
xorl   $0x1,0x2f09(%rip)
mov    0x2eb2(%rip),%rax
mov    (%rax),%edi
je     1137 <cfunc+0x17>
jmp    1030 <glEnable@plt>
jmp    1040 <glDisable@plt>

LLVM IR (-O0):
@cfunc.state = internal global i32 1
@GL_CULL_FACE = global i32 0
define void @cfunc() {
%1 = load i32, i32* @cfunc.state
%2 = xor i32 %1, 1
store i32 %2, i32* @cfunc.state
%3 = icmp ne i32 %2, 0
br i1 %3, label %4, label %7
4: ; preds = %0
%5 = load i32, i32* @GL_CULL_FACE
%6 = call i32 @glEnable(i32 %5)
br label %10
7: ; preds = %0
%8 = load i32, i32* @GL_CULL_FACE
%9 = call i32 @glDisable(i32 %8)
br label %10
10: ; preds = %7, %4
ret void
}

LLVM IR (-O2):
@cfunc.state = internal unnamed_addr global i32 1
@GL_CULL_FACE = global i32 0
define void @cfunc() {
%1 = load i32, i32* @cfunc.state
%2 = xor i32 %1, 1
store i32 %2, i32* @cfunc.state
%3 = icmp eq i32 %2, 0
%4 = load i32, i32* @GL_CULL_FACE
br i1 %3, label %7, label %5
5: ; preds = %0
%6 = tail call i32 @glEnable(i32 %4)
br label %9
7: ; preds = %0
%8 = tail call i32 @glDisable(i32 %4)
br label %9
9: ; preds = %7, %5
ret void
}
/* Type definitions */
struct cpu {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cpu_set_a(struct cpu *, unsigned char);
int /*<<< orphan*/ cpu_set_f(struct cpu *, unsigned char);
void cpu_set_af(struct cpu *cpu, unsigned short af) {
  unsigned char a = ((unsigned char)(((unsigned short)(af)) >> 8));
  unsigned char f = ((unsigned char)(((unsigned short)(af)) >> 0));
  cpu_set_a(cpu, a);
  cpu_set_f(cpu, f);
}


x86 assembly (clang, -O0):
<cpu_set_af>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
movzwl -0xa(%rbp),%eax
sar    $0x8,%eax
mov    %al,-0xb(%rbp)
movzwl -0xa(%rbp),%eax
sar    $0x0,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
movzbl -0xb(%rbp),%esi
call   1030 <cpu_set_a@plt>
mov    -0x8(%rbp),%rdi
movzbl -0xc(%rbp),%esi
call   1040 <cpu_set_f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_set_af>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
shr    $0x8,%esi
call   1030 <cpu_set_a@plt>
movzbl %bl,%esi
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <cpu_set_f@plt>

LLVM IR (-O0):
%struct.cpu = type { i32 }
define void @cpu_set_af(%struct.cpu* %0, i16 zeroext %1) {
%3 = alloca %struct.cpu*
%4 = alloca i16
%5 = alloca i8
%6 = alloca i8
store %struct.cpu* %0, %struct.cpu** %3
store i16 %1, i16* %4
%7 = load i16, i16* %4
%8 = zext i16 %7 to i32
%9 = ashr i32 %8, 8
%10 = trunc i32 %9 to i8
store i8 %10, i8* %5
%11 = load i16, i16* %4
%12 = zext i16 %11 to i32
%13 = ashr i32 %12, 0
%14 = trunc i32 %13 to i8
store i8 %14, i8* %6
%15 = load %struct.cpu*, %struct.cpu** %3
%16 = load i8, i8* %5
%17 = call i32 @cpu_set_a(%struct.cpu* %15, i8 zeroext %16)
%18 = load %struct.cpu*, %struct.cpu** %3
%19 = load i8, i8* %6
%20 = call i32 @cpu_set_f(%struct.cpu* %18, i8 zeroext %19)
ret void
}

LLVM IR (-O2):
%struct.cpu = type { i32 }
define void @cpu_set_af(%struct.cpu* %0, i16 zeroext %1) {
%3 = lshr i16 %1, 8
%4 = trunc i16 %3 to i8
%5 = trunc i16 %1 to i8
%6 = tail call i32 @cpu_set_a(%struct.cpu* %0, i8 zeroext %4)
%7 = tail call i32 @cpu_set_f(%struct.cpu* %0, i8 zeroext %5)
ret void
}
void media_receive_end(void) {}


x86 assembly (clang, -O0):
<media_receive_end>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<media_receive_end>:
ret

LLVM IR (-O0):
define void @media_receive_end() {
ret void
}

LLVM IR (-O2):
define void @media_receive_end() {
ret void
}
/* Type definitions */
struct epoll_event {
  int dummy;
};

/* Variables and functions */
int syscall(int, int, struct epoll_event *, int, int);
int epoll_wait(int fd, struct epoll_event *ev, int cnt, int to) {
  return syscall(252, fd, ev, cnt, to);
}


x86 assembly (clang, -O0):
<epoll_wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
mov    $0xfc,%edi
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<epoll_wait>:
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0xfc,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.epoll_event = type { i32 }
define i32 @epoll_wait(i32 %0, %struct.epoll_event* %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca %struct.epoll_event*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store %struct.epoll_event* %1, %struct.epoll_event** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load %struct.epoll_event*, %struct.epoll_event** %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @syscall(i32 252, i32 %9, %struct.epoll_event* %10, i32 %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
%struct.epoll_event = type { i32 }
define i32 @epoll_wait(i32 %0, %struct.epoll_event* %1, i32 %2, i32 %3) {
%5 = tail call i32 @syscall(i32 252, i32 %0, %struct.epoll_event* %1, i32 %2, i32 %3)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ SIGQUIT;
int /*<<< orphan*/ kill(int, int /*<<< orphan*/);
void gracefully_kill_process(int pid) { kill(pid, SIGQUIT); }


x86 assembly (clang, -O0):
<gracefully_kill_process>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ec3(%rip),%rax
mov    (%rax),%esi
call   1030 <kill@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gracefully_kill_process>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
jmp    1030 <kill@plt>

LLVM IR (-O0):
@SIGQUIT = global i32 0
define void @gracefully_kill_process(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIGQUIT
%5 = call i32 @kill(i32 %3, i32 %4)
ret void
}

LLVM IR (-O2):
@SIGQUIT = global i32 0
define void @gracefully_kill_process(i32 %0) {
%2 = load i32, i32* @SIGQUIT
%3 = tail call i32 @kill(i32 %0, i32 %2)
ret void
}
int op_sub(int x, int y) { return x - y; }


x86 assembly (clang, -O0):
<op_sub>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_sub>:
mov    %edi,%eax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @op_sub(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @op_sub(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stdout;
void print_help(const char *prg) {
  fprintf(stdout, "%s [-h] [-d] [-c concurrency] {command line}\n", prg);
}


x86 assembly (clang, -O0):
<print_help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_help>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [46 x i8] c"%s [-h] [-d] [-c concurrency] {command line}\0A\00"
define void @print_help(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stdout
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [46 x i8] c"%s [-h] [-d] [-c concurrency] {command line}\0A\00"
define void @print_help(i8* %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
int is_octal_char(char blah) { return (blah >= '0' && blah <= '7'); }


x86 assembly (clang, -O0):
<is_octal_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <is_octal_char+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x37,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_octal_char>:
and    $0xf8,%dil
xor    %eax,%eax
cmp    $0x30,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @is_octal_char(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 55
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_octal_char(i8 signext %0) {
%2 = and i8 %0, -8
%3 = icmp eq i8 %2, 48
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ do_csi(char *);
void decstr(void) { do_csi("!p"); }


x86 assembly (clang, -O0):
<decstr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <do_csi@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<decstr>:
lea    0xee9(%rip),%rdi
jmp    1030 <do_csi@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"!p\00"
define void @decstr() {
%1 = call i32 @do_csi(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"!p\00"
define void @decstr() {
%1 = tail call i32 @do_csi(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int const sum_of_divisors(int const);
int is_abundant(const int num) { return sum_of_divisors(num) > num; }


x86 assembly (clang, -O0):
<is_abundant>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sum_of_divisors@plt>
cmp    -0x4(%rbp),%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_abundant>:
push   %rbx
mov    %edi,%ebx
call   1030 <sum_of_divisors@plt>
xor    %ecx,%ecx
cmp    %ebx,%eax
setg   %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @is_abundant(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @sum_of_divisors(i32 %3)
%5 = load i32, i32* %2
%6 = icmp sgt i32 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @is_abundant(i32 %0) {
%2 = tail call i32 @sum_of_divisors(i32 %0)
%3 = icmp sgt i32 %2, %0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
struct timeval {
  double tv_usec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
double get_time() {
  struct timeval tv;
  gettimeofday(&tv, NULL);
  return (double)(tv.tv_sec) + 0.000001 * tv.tv_usec;
}


x86 assembly (clang, -O0):
<get_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
cvtsi2sdq -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
movsd  0xec8(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_time>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
cvtsi2sdq 0x10(%rsp),%xmm1
movsd  0x8(%rsp),%xmm0
mulsd  0xecb(%rip),%xmm0
addsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { double, i64 }
define double @get_time() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%4 = load i64, i64* %3
%5 = sitofp i64 %4 to double
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%7 = load double, double* %6
%8 = call double @llvm.fmuladd.f64(double 0x3EB0C6F7A0B5ED8D, double %7, double %5)
ret double %8
}

LLVM IR (-O2):
%struct.timeval = type { double, i64 }
define double @get_time() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%5 = load i64, i64* %4
%6 = sitofp i64 %5 to double
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%8 = load double, double* %7
%9 = tail call double @llvm.fmuladd.f64(double %8, double 0x3EB0C6F7A0B5ED8D, double %6)
ret double %9
}
void gtk_box_get_homogeneous() {}


x86 assembly (clang, -O0):
<gtk_box_get_homogeneous>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_box_get_homogeneous>:
ret

LLVM IR (-O0):
define void @gtk_box_get_homogeneous() {
ret void
}

LLVM IR (-O2):
define void @gtk_box_get_homogeneous() {
ret void
}
int from_stdin(void) {
  int volatile *IO = (void *)(0x3c000000 + 2 * 0x00000020);
  return (*IO);
}


x86 assembly (clang, -O0):
<from_stdin>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3c000040,%eax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<from_stdin>:
mov    0x3c000040,%eax
ret

LLVM IR (-O0):
define i32 @from_stdin() {
%1 = alloca i32*
store i32* inttoptr (i64 1006633024 to i32*), i32** %1
%2 = load i32*, i32** %1
%3 = load volatile i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @from_stdin() {
%1 = load volatile i32, i32* inttoptr (i64 1006633024 to i32*)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ free(unsigned char *);
void glj_aligned_free(void *_ptr) {
  unsigned char *p;
  p = (unsigned char *)_ptr;
  if (p != NULL) {
    int offs;
    offs = *--p;
    free(p - offs);
  }
}


x86 assembly (clang, -O0):
<glj_aligned_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     115a <glj_aligned_free+0x4a>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x10(%rbp)
movzbl -0x1(%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
movslq -0x14(%rbp),%rcx
xor    %eax,%eax
sub    %rcx,%rax
add    %rax,%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glj_aligned_free>:
test   %rdi,%rdi
je     1125 <glj_aligned_free+0x15>
movzbl -0x1(%rdi),%eax
add    $0xffffffffffffffff,%rdi
sub    %rax,%rdi
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @glj_aligned_free(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %19
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i32 -1
store i8* %10, i8** %3
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
store i32 %12, i32* %4
%13 = load i8*, i8** %3
%14 = load i32, i32* %4
%15 = sext i32 %14 to i64
%16 = sub i64 0, %15
%17 = getelementptr inbounds i8, i8* %13, i64 %16
%18 = call i32 @free(i8* %17)
br label %19
19: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @glj_aligned_free(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = getelementptr inbounds i8, i8* %0, i64 -1
%5 = load i8, i8* %4
%6 = zext i8 %5 to i64
%7 = sub nsw i64 0, %6
%8 = getelementptr inbounds i8, i8* %4, i64 %7
%9 = tail call i32 @free(i8* %8)
br label %10
10: ; preds = %3, %1
ret void
}
int ddr_phase_sel(struct ddr_set *ddr_setting, int lane, unsigned char *tra,
                  unsigned *tr, unsigned char *dqs, unsigned char *dqsn) {
  return 0;
}


x86 assembly (clang, -O0):
<ddr_phase_sel>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ddr_phase_sel>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ddr_set = type opaque
define i32 @ddr_phase_sel(%struct.ddr_set* %0, i32 %1, i8* %2, i32* %3, i8* %4, i8* %5) {
%7 = alloca %struct.ddr_set*
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i32*
%11 = alloca i8*
%12 = alloca i8*
store %struct.ddr_set* %0, %struct.ddr_set** %7
store i32 %1, i32* %8
store i8* %2, i8** %9
store i32* %3, i32** %10
store i8* %4, i8** %11
store i8* %5, i8** %12
ret i32 0
}

LLVM IR (-O2):
%struct.ddr_set = type opaque
define i32 @ddr_phase_sel(%struct.ddr_set* nocapture readnone %0, i32 %1, i8* nocapture readnone %2, i32* nocapture readnone %3, i8* nocapture readnone %4, i8* nocapture readnone %5) {
ret i32 0
}
int main(void) {
  int a[5] = {1, 2, 3, 4, 5};
  printf("%d=============================\n", a[4]);
  printf("%d==============================\n", 0 [a]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xed7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xed5(%rip),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%esi
lea    0xecc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x20(%rbp),%esi
lea    0xedc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x5,%esi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xef6(%rip),%rdi
mov    $0x1,%esi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.main.a = [5 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5]
@.str = [33 x i8] c"%d=============================\0A\00"
@.str.1 = [34 x i8] c"%d==============================\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [5 x i32]
store i32 0, i32* %1
%3 = bitcast [5 x i32]* %2 to i8*
%4 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 4
%5 = load i32, i32* %4
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 0
%8 = load i32, i32* %7
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [33 x i8] c"%d=============================\0A\00"
@.str.1 = [34 x i8] c"%d==============================\0A\00"
define i32 @main() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 5)
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @.str.1, i64 0, i64 0), i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ usage(char *);
int help(int argc, char *argv[], void *__attribute__((unused)) config) {
  usage("cmail-admin-smtpd");
  return -1;
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    0xed6(%rip),%rdi
call   1030 <usage@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<help>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <usage@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"cmail-admin-smtpd\00"
define i32 @help(i32 %0, i8** %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* %2, i8** %6
%7 = call i32 @usage(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@.str = [18 x i8] c"cmail-admin-smtpd\00"
define i32 @help(i32 %0, i8** nocapture readnone %1, i8* nocapture readnone %2) {
%4 = tail call i32 @usage(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
scalar_t__ isatty(int /*<<< orphan*/);
int /*<<< orphan*/ pprint(char *, int);
void get_out(int exitval) {
  if ((isatty(0)))
    pprint("exit\n", 1);
  exit(exitval);
}


x86 assembly (clang, -O0):
<get_out>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
call   1030 <isatty@plt>
cmp    $0x0,%rax
je     115d <get_out+0x2d>
lea    0xead(%rip),%rdi
mov    $0x1,%esi
call   1040 <pprint@plt>
mov    -0x4(%rbp),%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<get_out>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
call   1030 <isatty@plt>
test   %rax,%rax
je     1150 <get_out+0x20>
lea    0xeba(%rip),%rdi
mov    $0x1,%esi
call   1040 <pprint@plt>
mov    %ebx,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"exit\0A\00"
define void @get_out(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i64 @isatty(i32 0)
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @pprint(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 1)
br label %7
7: ; preds = %5, %1
%8 = load i32, i32* %2
%9 = call i32 @exit(i32 %8)
unreachable
}

LLVM IR (-O2):
@.str = [6 x i8] c"exit\0A\00"
define void @get_out(i32 %0) {
%2 = tail call i64 @isatty(i32 0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @pprint(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 1)
br label %6
6: ; preds = %4, %1
%7 = tail call i32 @exit(i32 %0)
unreachable
}
/* Type definitions */
struct mempool {
  int dummy;
};

/* Variables and functions */
unsigned int mp_avail(struct mempool *);
void *mp_grow_internal(struct mempool *, unsigned int);
void *mp_ptr(struct mempool *);
void *mp_grow(struct mempool *pool, unsigned size) {
  return (size <= mp_avail(pool)) ? mp_ptr(pool) : mp_grow_internal(pool, size);
}


x86 assembly (clang, -O0):
<mp_grow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <mp_avail@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
cmp    %ecx,%eax
ja     116d <mp_grow+0x3d>
mov    -0x8(%rbp),%rdi
call   1050 <mp_ptr@plt>
mov    %rax,-0x18(%rbp)
jmp    117d <mp_grow+0x4d>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <mp_grow_internal@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp_grow>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1040 <mp_avail@plt>
mov    %rbx,%rdi
cmp    %ebp,%eax
jae    1151 <mp_grow+0x21>
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <mp_grow_internal@plt>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <mp_ptr@plt>

LLVM IR (-O0):
%struct.mempool = type { i32 }
define i8* @mp_grow(%struct.mempool* %0, i32 %1) {
%3 = alloca %struct.mempool*
%4 = alloca i32
store %struct.mempool* %0, %struct.mempool** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load %struct.mempool*, %struct.mempool** %3
%7 = call i32 @mp_avail(%struct.mempool* %6)
%8 = icmp ule i32 %5, %7
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load %struct.mempool*, %struct.mempool** %3
%11 = call i8* @mp_ptr(%struct.mempool* %10)
br label %16
12: ; preds = %2
%13 = load %struct.mempool*, %struct.mempool** %3
%14 = load i32, i32* %4
%15 = call i8* @mp_grow_internal(%struct.mempool* %13, i32 %14)
br label %16
16: ; preds = %12, %9
%17 = phi i8* [ %11, %9 ], [ %15, %12 ]
ret i8* %17
}

LLVM IR (-O2):
%struct.mempool = type { i32 }
define i8* @mp_grow(%struct.mempool* %0, i32 %1) {
%3 = tail call i32 @mp_avail(%struct.mempool* %0)
%4 = icmp ult i32 %3, %1
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i8* @mp_ptr(%struct.mempool* %0)
br label %9
7: ; preds = %2
%8 = tail call i8* @mp_grow_internal(%struct.mempool* %0, i32 %1)
br label %9
9: ; preds = %7, %5
%10 = phi i8* [ %6, %5 ], [ %8, %7 ]
ret i8* %10
}
/* Variables and functions */
int /*<<< orphan*/ HplAtm128GeneralIOPinP__8__IO__makeOutput();
void CC2420ControlP__CSN__makeOutput(void) {
  HplAtm128GeneralIOPinP__8__IO__makeOutput();
}


x86 assembly (clang, -O0):
<CC2420ControlP__CSN__makeOutput>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplAtm128GeneralIOPinP__8__IO__makeOutput@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC2420ControlP__CSN__makeOutput>:
xor    %eax,%eax
jmp    1030 <HplAtm128GeneralIOPinP__8__IO__makeOutput@plt>

LLVM IR (-O0):
define void @CC2420ControlP__CSN__makeOutput() {
%1 = call i32 (...) @HplAtm128GeneralIOPinP__8__IO__makeOutput()
ret void
}

LLVM IR (-O2):
define void @CC2420ControlP__CSN__makeOutput() {
%1 = tail call i32 (...) @HplAtm128GeneralIOPinP__8__IO__makeOutput()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void grpcsharp_server_shutdown_and_notify_callback() {
  fprintf(stderr, "Should never reach here");
  abort();
}


x86 assembly (clang, -O0):
<grpcsharp_server_shutdown_and_notify_callback>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<grpcsharp_server_shutdown_and_notify_callback>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [24 x i8] c"Should never reach here\00"
define void @grpcsharp_server_shutdown_and_notify_callback() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [24 x i8] c"Should never reach here\00"
define void @grpcsharp_server_shutdown_and_notify_callback() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @abort()
unreachable
}
int utl_vec_nullcmp(void *a, void *b, void *aux) { return 0; }


x86 assembly (clang, -O0):
<utl_vec_nullcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utl_vec_nullcmp>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @utl_vec_nullcmp(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
ret i32 0
}

LLVM IR (-O2):
define i32 @utl_vec_nullcmp(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
ret i32 0
}
/* Type definitions */
struct usb_hcd {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ hcd_to_ehci(struct usb_hcd *);
int /*<<< orphan*/ kfree(int /*<<< orphan*/);
void ehci_hcd_free(struct usb_hcd *hcd) { kfree(hcd_to_ehci(hcd)); }


x86 assembly (clang, -O0):
<ehci_hcd_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <hcd_to_ehci@plt>
mov    %eax,%edi
call   1030 <kfree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ehci_hcd_free>:
push   %rax
call   1040 <hcd_to_ehci@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <kfree@plt>

LLVM IR (-O0):
%struct.usb_hcd = type { i32 }
define void @ehci_hcd_free(%struct.usb_hcd* %0) {
%2 = alloca %struct.usb_hcd*
store %struct.usb_hcd* %0, %struct.usb_hcd** %2
%3 = load %struct.usb_hcd*, %struct.usb_hcd** %2
%4 = call i32 @hcd_to_ehci(%struct.usb_hcd* %3)
%5 = call i32 @kfree(i32 %4)
ret void
}

LLVM IR (-O2):
%struct.usb_hcd = type { i32 }
define void @ehci_hcd_free(%struct.usb_hcd* %0) {
%2 = tail call i32 @hcd_to_ehci(%struct.usb_hcd* %0)
%3 = tail call i32 @kfree(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ compress_file();
int main() {
  compress_file();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <compress_file@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <compress_file@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @compress_file()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @compress_file()
ret i32 0
}
unsigned long long int rnd16lfsr(unsigned long long int x) {
  unsigned long long int bit;
  if (x == 0) {
    x = 1;
  } else {
    bit = ((x >> 0) ^ (x >> 2) ^ (x >> 3) ^ (x >> 5)) & 1;
    x = (x >> 1) | (bit << 15);
    if (x == 1)
      x = 0;
  }
  return x;
}


x86 assembly (clang, -O0):
<rnd16lfsr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1120 <rnd16lfsr+0x20>
movq   $0x1,-0x8(%rbp)
jmp    1180 <rnd16lfsr+0x80>
mov    -0x8(%rbp),%rax
shr    $0x0,%rax
mov    -0x8(%rbp),%rcx
shr    $0x2,%rcx
xor    %rcx,%rax
mov    -0x8(%rbp),%rcx
shr    $0x3,%rcx
xor    %rcx,%rax
mov    -0x8(%rbp),%rcx
shr    $0x5,%rcx
xor    %rcx,%rax
and    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
mov    -0x10(%rbp),%rcx
shl    $0xf,%rcx
or     %rcx,%rax
mov    %rax,-0x8(%rbp)
cmpq   $0x1,-0x8(%rbp)
jne    117b <rnd16lfsr+0x7b>
movq   $0x0,-0x8(%rbp)
jmp    1180 <rnd16lfsr+0x80>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rnd16lfsr>:
test   %rdi,%rdi
je     1131 <rnd16lfsr+0x31>
mov    %edi,%eax
shr    $0x2,%eax
xor    %edi,%eax
mov    %edi,%ecx
shr    $0x3,%ecx
mov    %edi,%edx
shr    $0x5,%edx
xor    %ecx,%edx
xor    %eax,%edx
shr    %rdi
shl    $0xf,%edx
movzwl %dx,%ecx
or     %rdi,%rcx
xor    %eax,%eax
cmp    $0x1,%rcx
cmovne %rcx,%rax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i64 @rnd16lfsr(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 1, i64* %2
br label %29
7: ; preds = %1
%8 = load i64, i64* %2
%9 = lshr i64 %8, 0
%10 = load i64, i64* %2
%11 = lshr i64 %10, 2
%12 = xor i64 %9, %11
%13 = load i64, i64* %2
%14 = lshr i64 %13, 3
%15 = xor i64 %12, %14
%16 = load i64, i64* %2
%17 = lshr i64 %16, 5
%18 = xor i64 %15, %17
%19 = and i64 %18, 1
store i64 %19, i64* %3
%20 = load i64, i64* %2
%21 = lshr i64 %20, 1
%22 = load i64, i64* %3
%23 = shl i64 %22, 15
%24 = or i64 %21, %23
store i64 %24, i64* %2
%25 = load i64, i64* %2
%26 = icmp eq i64 %25, 1
br i1 %26, label %27, label %28
27: ; preds = %7
store i64 0, i64* %2
br label %28
28: ; preds = %27, %7
br label %29
29: ; preds = %28, %6
%30 = load i64, i64* %2
ret i64 %30
}

LLVM IR (-O2):
define i64 @rnd16lfsr(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %16, label %3
3: ; preds = %1
%4 = lshr i64 %0, 2
%5 = xor i64 %4, %0
%6 = lshr i64 %0, 3
%7 = xor i64 %5, %6
%8 = lshr i64 %0, 5
%9 = xor i64 %7, %8
%10 = lshr i64 %0, 1
%11 = shl i64 %9, 15
%12 = and i64 %11, 32768
%13 = or i64 %12, %10
%14 = icmp eq i64 %13, 1
%15 = select i1 %14, i64 0, i64 %13
br label %16
16: ; preds = %1, %3
%17 = phi i64 [ %15, %3 ], [ 1, %1 ]
ret i64 %17
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void usage(FILE *fd) {
  fprintf(fd, "cal2p54 - CAL to p54spi EEPROM converter\n");
  fprintf(fd, "\n");
  fprintf(fd, "Usage: cal2p54 WLAN-TX-GEN2-IMAGE WLAN-IQ-ALIGN-IMAGE\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x8(%rbp),%rdi
lea    0xf28(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x8(%rbp),%rdi
lea    0xee3(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
mov    $0x29,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1040 <fwrite@plt>
mov    $0xa,%edi
mov    %rbx,%rsi
call   1030 <fputc@plt>
lea    0xed9(%rip),%rdi
mov    $0x36,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
pop    %rbx
jmp    1040 <fwrite@plt>

LLVM IR (-O0):
@.str = [42 x i8] c"cal2p54 - CAL to p54spi EEPROM converter\0A\00"
@.str.1 = [2 x i8] c"\0A\00"
@.str.2 = [55 x i8] c"Usage: cal2p54 WLAN-TX-GEN2-IMAGE WLAN-IQ-ALIGN-IMAGE\0A\00"
define void @usage(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
%5 = load i32*, i32** %2
%6 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%7 = load i32*, i32** %2
%8 = call i32 @fprintf(i32* %7, i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [42 x i8] c"cal2p54 - CAL to p54spi EEPROM converter\0A\00"
@.str.2 = [55 x i8] c"Usage: cal2p54 WLAN-TX-GEN2-IMAGE WLAN-IQ-ALIGN-IMAGE\0A\00"
define void @usage(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0), i64 41, i64 1, i32* %0)
%3 = tail call i32 @fputc(i32 10, i32* %0)
%4 = tail call i64 @fwrite(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str.2, i64 0, i64 0), i64 54, i64 1, i32* %0)
ret void
}
const char *BZ2_bzlibVersion(void) { return "1.0.4, 20-Dec-2006"; }


x86 assembly (clang, -O0):
<BZ2_bzlibVersion>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BZ2_bzlibVersion>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [19 x i8] c"1.0.4, 20-Dec-2006\00"
define i8* @BZ2_bzlibVersion() {
ret i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [19 x i8] c"1.0.4, 20-Dec-2006\00"
define i8* @BZ2_bzlibVersion() {
ret i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ tok_init(char *, char);
void bas_parse_init(char *file) { tok_init(file, '!'); }


x86 assembly (clang, -O0):
<bas_parse_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x21,%esi
call   1030 <tok_init@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bas_parse_init>:
mov    $0x21,%esi
jmp    1030 <tok_init@plt>

LLVM IR (-O0):
define void @bas_parse_init(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @tok_init(i8* %3, i8 signext 33)
ret void
}

LLVM IR (-O2):
define void @bas_parse_init(i8* %0) {
%2 = tail call i32 @tok_init(i8* %0, i8 signext 33)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
int *shmat(int, int /*<<< orphan*/ *, int /*<<< orphan*/);
int *shmSpielfeldAnbinden(int shmid) {
  int *shm_ptr_Sf = shmat(shmid, NULL, 0);
  if (shm_ptr_Sf == (int *)-1) {
    perror("Fehler beim Binden des SHM an einen Prozess");
  }
  return shm_ptr_Sf;
}


x86 assembly (clang, -O0):
<shmSpielfeldAnbinden>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %eax,%eax
mov    %eax,%esi
xor    %edx,%edx
call   1040 <shmat@plt>
mov    %rax,-0x10(%rbp)
mov    $0xffffffffffffffff,%rax
cmp    %rax,-0x10(%rbp)
jne    115a <shmSpielfeldAnbinden+0x3a>
lea    0xeab(%rip),%rdi
call   1030 <perror@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmSpielfeldAnbinden>:
push   %rbx
xor    %esi,%esi
xor    %edx,%edx
call   1040 <shmat@plt>
mov    %rax,%rbx
cmp    $0xffffffffffffffff,%rax
je     1138 <shmSpielfeldAnbinden+0x18>
mov    %rbx,%rax
pop    %rbx
ret
lea    0xec1(%rip),%rdi
call   1030 <perror@plt>
jmp    1133 <shmSpielfeldAnbinden+0x13>

LLVM IR (-O0):
@.str = [44 x i8] c"Fehler beim Binden des SHM an einen Prozess\00"
define i32* @shmSpielfeldAnbinden(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32* @shmat(i32 %4, i32* null, i32 0)
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = icmp eq i32* %6, inttoptr (i64 -1 to i32*)
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @perror(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i32*, i32** %3
ret i32* %11
}

LLVM IR (-O2):
@.str = [44 x i8] c"Fehler beim Binden des SHM an einen Prozess\00"
define i32* @shmSpielfeldAnbinden(i32 %0) {
%2 = tail call i32* @shmat(i32 %0, i32* null, i32 0)
%3 = icmp eq i32* %2, inttoptr (i64 -1 to i32*)
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @perror(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i32* %2
}
void XSetSizeHints() {}


x86 assembly (clang, -O0):
<XSetSizeHints>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XSetSizeHints>:
ret

LLVM IR (-O0):
define void @XSetSizeHints() {
ret void
}

LLVM IR (-O2):
define void @XSetSizeHints() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "Usage: jm-insns [OPTION]\n"
                  "\t-i: test integer instructions (default)\n"
                  "\t-f: test floating point instructions\n"
                  "\t-a: test altivec instructions\n"
                  "\t-A: test all (int, fp, altivec) instructions\n"
                  "\t-v: be verbose\n"
                  "\t-h: display this help and exit\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [230 x i8] c"Usage: jm-insns [OPTION]\0A\09-i: test integer instructions (default)\0A\09-f: test floating point instructions\0A\09-a: test altivec instructions\0A\09-A: test all (int, fp, altivec) instructions\0A\09-v: be verbose\0A\09-h: display this help and exit\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([230 x i8], [230 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [230 x i8] c"Usage: jm-insns [OPTION]\0A\09-i: test integer instructions (default)\0A\09-f: test floating point instructions\0A\09-a: test altivec instructions\0A\09-A: test all (int, fp, altivec) instructions\0A\09-v: be verbose\0A\09-h: display this help and exit\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([230 x i8], [230 x i8]* @.str, i64 0, i64 0))
ret void
}