xunge/DecIR huggingface dataset:
int td_bcmp(s1, s2, count) const void *s1;
const void *s2;
int count;
{
  while (count-- > 0)
    if (*(unsigned char *)s1++ != *(unsigned char *)s2++)
      return (1);
  return (0);
}


x86 assembly (clang, -O0):
<td_bcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x1c(%rbp)
cmp    $0x0,%eax
jle    1160 <td_bcmp+0x60>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movzbl (%rax),%eax
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
movzbl (%rcx),%ecx
cmp    %ecx,%eax
je     115b <td_bcmp+0x5b>
movl   $0x1,-0x4(%rbp)
jmp    1167 <td_bcmp+0x67>
jmp    110f <td_bcmp+0xf>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<td_bcmp>:
xor    %eax,%eax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
test   %edx,%edx
jle    112e <td_bcmp+0x2e>
add    $0xffffffff,%edx
movzbl (%rdi,%rcx,1),%r8d
lea    0x1(%rcx),%r9
cmp    (%rsi,%rcx,1),%r8b
mov    %r9,%rcx
je     1110 <td_bcmp+0x10>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @td_bcmp(i8* %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
br label %8
8: ; preds = %23, %3
%9 = load i32, i32* %7
%10 = add nsw i32 %9, -1
store i32 %10, i32* %7
%11 = icmp sgt i32 %9, 0
br i1 %11, label %12, label %24
12: ; preds = %8
%13 = load i8*, i8** %5
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %5
%15 = load i8, i8* %13
%16 = zext i8 %15 to i32
%17 = load i8*, i8** %6
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %6
%19 = load i8, i8* %17
%20 = zext i8 %19 to i32
%21 = icmp ne i32 %16, %20
br i1 %21, label %22, label %23
22: ; preds = %12
store i32 1, i32* %4
br label %25
23: ; preds = %12
br label %8
24: ; preds = %8
store i32 0, i32* %4
br label %25
25: ; preds = %24, %22
%26 = load i32, i32* %4
ret i32 %26
}

LLVM IR (-O2):
define i32 @td_bcmp(i8* nocapture %0, i8* nocapture %1, i32 %2) {
br label %4
4: ; preds = %9, %3
%5 = phi i8* [ %0, %3 ], [ %11, %9 ]
%6 = phi i8* [ %1, %3 ], [ %13, %9 ]
%7 = phi i32 [ %2, %3 ], [ %10, %9 ]
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %16
9: ; preds = %4
%10 = add nsw i32 %7, -1
%11 = getelementptr inbounds i8, i8* %5, i64 1
%12 = load i8, i8* %5
%13 = getelementptr inbounds i8, i8* %6, i64 1
%14 = load i8, i8* %6
%15 = icmp eq i8 %12, %14
br i1 %15, label %4, label %16
16: ; preds = %4, %9
%17 = phi i32 [ 1, %9 ], [ 0, %4 ]
ret i32 %17
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int solcon_retrieve_standard_solution(int n, int k, int *m, double *sol) {
  int fail;
  fail = _ada_use_c2phc(34, &k, m, sol);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_retrieve_standard_solution>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x22,%edi
lea    -0x8(%rbp),%rsi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_retrieve_standard_solution>:
push   %rax
mov    %esi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x22,%edi
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @solcon_retrieve_standard_solution(i32 %0, i32 %1, i32* %2, double* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca double*
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store double* %3, double** %8
%10 = load i32*, i32** %7
%11 = load double*, double** %8
%12 = call i32 @_ada_use_c2phc(i32 34, i32* %6, i32* %10, double* %11)
store i32 %12, i32* %9
%13 = load i32, i32* %9
ret i32 %13
}

LLVM IR (-O2):
define i32 @solcon_retrieve_standard_solution(i32 %0, i32 %1, i32* %2, double* %3) {
%5 = alloca i32
store i32 %1, i32* %5
%6 = call i32 @_ada_use_c2phc(i32 34, i32* %5, i32* %2, double* %3)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void sesc_become_safe(void) {
  fprintf(stderr,
          "Versioning simulator is needed to execute sesc_become_safe\n");
}


x86 assembly (clang, -O0):
<sesc_become_safe>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sesc_become_safe>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [60 x i8] c"Versioning simulator is needed to execute sesc_become_safe\0A\00"
define void @sesc_become_safe() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [60 x i8] c"Versioning simulator is needed to execute sesc_become_safe\0A\00"
define void @sesc_become_safe() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
double igamc(double, double);
double chi2_cdf(double df, double x) { return 1.0 - igamc(df / 2.0, x / 2.0); }


x86 assembly (clang, -O0):
<chi2_cdf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xed9(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  0xec8(%rip),%xmm2
divsd  %xmm2,%xmm1
call   1030 <igamc@plt>
movaps %xmm0,%xmm1
movsd  0xeac(%rip),%xmm0
subsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chi2_cdf>:
push   %rax
movsd  0xee7(%rip),%xmm2
mulsd  %xmm2,%xmm0
mulsd  %xmm2,%xmm1
call   1030 <igamc@plt>
movsd  0xeda(%rip),%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @chi2_cdf(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = fdiv double %5, 2.000000e+00
%7 = load double, double* %4
%8 = fdiv double %7, 2.000000e+00
%9 = call double @igamc(double %6, double %8)
%10 = fsub double 1.000000e+00, %9
ret double %10
}

LLVM IR (-O2):
define double @chi2_cdf(double %0, double %1) {
%3 = fmul double %0, 5.000000e-01
%4 = fmul double %1, 5.000000e-01
%5 = tail call double @igamc(double %3, double %4)
%6 = fsub double 1.000000e+00, %5
ret double %6
}
/* Variables and functions */
int sum(int, int, int, int, int, int);
int w(int, int, int, int, int, int, int);
int g(int i, int j, int k, int y) {
  int a = w(1, 2, 3, 4, 5, 6, 7);
  return a + sum(i, j, k, y, 123, 324);
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
mov    $0x4,%ecx
mov    $0x5,%r8d
mov    $0x6,%r9d
movl   $0x7,(%rsp)
call   1040 <w@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    $0x7b,%r8d
mov    $0x144,%r9d
call   1030 <sum@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
add    %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
sub    $0x10,%rsp
mov    %ecx,%r14d
mov    %edx,%r15d
mov    %esi,%r12d
mov    %edi,%ebp
movl   $0x7,(%rsp)
mov    $0x1,%edi
mov    $0x2,%esi
mov    $0x3,%edx
mov    $0x4,%ecx
mov    $0x5,%r8d
mov    $0x6,%r9d
call   1040 <w@plt>
mov    %eax,%ebx
mov    %ebp,%edi
mov    %r12d,%esi
mov    %r15d,%edx
mov    %r14d,%ecx
mov    $0x7b,%r8d
mov    $0x144,%r9d
call   1030 <sum@plt>
add    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @g(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = call i32 @w(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7)
store i32 %10, i32* %9
%11 = load i32, i32* %9
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = load i32, i32* %7
%15 = load i32, i32* %8
%16 = call i32 @sum(i32 %12, i32 %13, i32 %14, i32 %15, i32 123, i32 324)
%17 = add nsw i32 %11, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @g(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @w(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7)
%6 = tail call i32 @sum(i32 %0, i32 %1, i32 %2, i32 %3, i32 123, i32 324)
%7 = add nsw i32 %6, %5
ret i32 %7
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ perror(char *);
void *xmalloc(size_t size) {
  void *ret;
  ret = malloc(size);
  if (!ret)
    perror("malloc");
  return (ret);
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <xmalloc+0x30>
lea    0xeb5(%rip),%rdi
call   1040 <perror@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rbx
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1133 <xmalloc+0x13>
mov    %rbx,%rax
pop    %rbx
ret
lea    0xec6(%rip),%rdi
call   1040 <perror@plt>
jmp    112e <xmalloc+0xe>

LLVM IR (-O0):
@.str = [7 x i8] c"malloc\00"
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = call i32 @perror(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [7 x i8] c"malloc\00"
define noalias i8* @xmalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @perror(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *const);
void changeToX3(const char *const str) { printf("changeToX3(): %s\n", str); }


x86 assembly (clang, -O0):
<changeToX3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<changeToX3>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"changeToX3(): %s\0A\00"
define void @changeToX3(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"changeToX3(): %s\0A\00"
define void @changeToX3(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
int test_imm_C7uint32_mem(unsigned int *val) {
  return ((*val) & (0xC7 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C7uint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xc7,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C7uint32_mem>:
testb  $0xc7,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C7uint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 199
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C7uint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 199
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void swap(int p1, int p2) {
  int c = p1;
  p1 = p2;
  p2 = c;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
ret

LLVM IR (-O0):
define void @swap(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
store i32 %6, i32* %5
%7 = load i32, i32* %4
store i32 %7, i32* %3
%8 = load i32, i32* %5
store i32 %8, i32* %4
ret void
}

LLVM IR (-O2):
define void @swap(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void *, size_t);
void swap(void *a, void *b, void *tmp, size_t bytes) {
  memcpy(tmp, a, bytes);
  memcpy(a, b, bytes);
  memcpy(b, tmp, bytes);
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rcx,%rbx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%r12
mov    %rdx,%rdi
mov    %r12,%rsi
mov    %rcx,%rdx
call   1030 <memcpy@plt>
mov    %r12,%rdi
mov    %r15,%rsi
mov    %rbx,%rdx
call   1030 <memcpy@plt>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @swap(i8* %0, i8* %1, i8* %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i64
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%9 = load i8*, i8** %7
%10 = load i8*, i8** %5
%11 = load i64, i64* %8
%12 = call i32 @memcpy(i8* %9, i8* %10, i64 %11)
%13 = load i8*, i8** %5
%14 = load i8*, i8** %6
%15 = load i64, i64* %8
%16 = call i32 @memcpy(i8* %13, i8* %14, i64 %15)
%17 = load i8*, i8** %6
%18 = load i8*, i8** %7
%19 = load i64, i64* %8
%20 = call i32 @memcpy(i8* %17, i8* %18, i64 %19)
ret void
}

LLVM IR (-O2):
define void @swap(i8* %0, i8* %1, i8* %2, i64 %3) {
%5 = tail call i32 @memcpy(i8* %2, i8* %0, i64 %3)
%6 = tail call i32 @memcpy(i8* %0, i8* %1, i64 %3)
%7 = tail call i32 @memcpy(i8* %1, i8* %2, i64 %3)
ret void
}
void XdbeFreeVisualInfo() {}


x86 assembly (clang, -O0):
<XdbeFreeVisualInfo>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XdbeFreeVisualInfo>:
ret

LLVM IR (-O0):
define void @XdbeFreeVisualInfo() {
ret void
}

LLVM IR (-O2):
define void @XdbeFreeVisualInfo() {
ret void
}
/* Variables and functions */
double EvalAngDist_alpha1_3minus_2plus_15097_L5(double);
double funcAngDist_alpha1_3minus_2plus_15097_L5(double *x, double *par) {
  double result;
  result = par[0] * EvalAngDist_alpha1_3minus_2plus_15097_L5(x[0]);
  return result;
}


x86 assembly (clang, -O0):
<funcAngDist_alpha1_3minus_2plus_15097_L5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x20(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
call   1030 <EvalAngDist_alpha1_3minus_2plus_15097_L5@plt>
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<funcAngDist_alpha1_3minus_2plus_15097_L5>:
push   %rax
movsd  (%rsi),%xmm0
movsd  %xmm0,(%rsp)
movsd  (%rdi),%xmm0
call   1030 <EvalAngDist_alpha1_3minus_2plus_15097_L5@plt>
mulsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @funcAngDist_alpha1_3minus_2plus_15097_L5(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
%5 = alloca double
store double* %0, double** %3
store double* %1, double** %4
%6 = load double*, double** %4
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = load double*, double** %3
%10 = getelementptr inbounds double, double* %9, i64 0
%11 = load double, double* %10
%12 = call double @EvalAngDist_alpha1_3minus_2plus_15097_L5(double %11)
%13 = fmul double %8, %12
store double %13, double* %5
%14 = load double, double* %5
ret double %14
}

LLVM IR (-O2):
define double @funcAngDist_alpha1_3minus_2plus_15097_L5(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %1
%4 = load double, double* %0
%5 = tail call double @EvalAngDist_alpha1_3minus_2plus_15097_L5(double %4)
%6 = fmul double %3, %5
ret double %6
}
void unknown_instruction(void) { asm volatile(".word 0x0001;"); }


x86 assembly (clang, -O0):
<unknown_instruction>:
push   %rbp
mov    %rsp,%rbp
add    %eax,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<unknown_instruction>:
add    %eax,(%rax)
ret

LLVM IR (-O0):
define void @unknown_instruction() {
ret void
}

LLVM IR (-O2):
define void @unknown_instruction() {
tail call void asm sideeffect ".word 0x0001;", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GL_COLOR_BUFFER_BIT;
int /*<<< orphan*/ Globe_Wireframe();
int /*<<< orphan*/ glClear(int /*<<< orphan*/);
int /*<<< orphan*/ glFlush();
int /*<<< orphan*/ glPointSize(double);
void display(void) {
  glClear(GL_COLOR_BUFFER_BIT);
  glPointSize(2.0);
  Globe_Wireframe();
  glFlush();
}


x86 assembly (clang, -O0):
<display>:
push   %rbp
mov    %rsp,%rbp
mov    0x2e95(%rip),%rax
mov    (%rax),%edi
call   1030 <glClear@plt>
movsd  0xea6(%rip),%xmm0
call   1050 <glPointSize@plt>
mov    $0x0,%al
call   1060 <Globe_Wireframe@plt>
mov    $0x0,%al
call   1040 <glFlush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display>:
push   %rax
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1030 <glClear@plt>
movsd  0xea9(%rip),%xmm0
call   1050 <glPointSize@plt>
xor    %eax,%eax
call   1060 <Globe_Wireframe@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <glFlush@plt>

LLVM IR (-O0):
@GL_COLOR_BUFFER_BIT = global i32 0
define void @display() {
%1 = load i32, i32* @GL_COLOR_BUFFER_BIT
%2 = call i32 @glClear(i32 %1)
%3 = call i32 @glPointSize(double 2.000000e+00)
%4 = call i32 (...) @Globe_Wireframe()
%5 = call i32 (...) @glFlush()
ret void
}

LLVM IR (-O2):
@GL_COLOR_BUFFER_BIT = global i32 0
define void @display() {
%1 = load i32, i32* @GL_COLOR_BUFFER_BIT
%2 = tail call i32 @glClear(i32 %1)
%3 = tail call i32 @glPointSize(double 2.000000e+00)
%4 = tail call i32 (...) @Globe_Wireframe()
%5 = tail call i32 (...) @glFlush()
ret void
}
void gtk_rc_parse_color() {}


x86 assembly (clang, -O0):
<gtk_rc_parse_color>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_rc_parse_color>:
ret

LLVM IR (-O0):
define void @gtk_rc_parse_color() {
ret void
}

LLVM IR (-O2):
define void @gtk_rc_parse_color() {
ret void
}
unsigned long insert_rbs(insn, value, errmsg)
unsigned long insn;
long value;
const char **errmsg;
{ return insn | (((insn >> 21) & 0x1f) << 11); }


x86 assembly (clang, -O0):
<insert_rbs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
shr    $0x15,%rcx
and    $0x1f,%rcx
shl    $0xb,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<insert_rbs>:
mov    %rdi,%rax
shr    $0xa,%rax
and    $0xf800,%eax
or     %rdi,%rax
ret

LLVM IR (-O0):
define i64 @insert_rbs(i64 %0, i64 %1, i8** %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i8**
store i64 %0, i64* %4
store i64 %1, i64* %5
store i8** %2, i8*** %6
%7 = load i64, i64* %4
%8 = load i64, i64* %4
%9 = lshr i64 %8, 21
%10 = and i64 %9, 31
%11 = shl i64 %10, 11
%12 = or i64 %7, %11
ret i64 %12
}

LLVM IR (-O2):
define i64 @insert_rbs(i64 %0, i64 %1, i8** nocapture readnone %2) {
%4 = lshr i64 %0, 10
%5 = and i64 %4, 63488
%6 = or i64 %5, %0
ret i64 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint16_t;

/* Variables and functions */
int /*<<< orphan*/ ppuSetNameTblHorizontal();
int /*<<< orphan*/ ppuSetNameTblVertical();
int /*<<< orphan*/ prg32setBank0(int);
void m242_setParams(uint16_t addr, uint8_t val) {
  (void)val;
  prg32setBank0(((addr >> 3) & 0xF) << 15);
  if ((addr & 2) == 0)
    ppuSetNameTblVertical();
  else
    ppuSetNameTblHorizontal();
}


x86 assembly (clang, -O0):
<m242_setParams>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
sar    $0x3,%edi
and    $0xf,%edi
shl    $0xf,%edi
call   1030 <prg32setBank0@plt>
mov    -0x4(%rbp),%eax
and    $0x2,%eax
cmp    $0x0,%eax
jne    116a <m242_setParams+0x3a>
mov    $0x0,%al
call   1050 <ppuSetNameTblVertical@plt>
jmp    1171 <m242_setParams+0x41>
mov    $0x0,%al
call   1040 <ppuSetNameTblHorizontal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m242_setParams>:
push   %rbx
mov    %edi,%ebx
and    $0x78,%edi
shl    $0xc,%edi
call   1030 <prg32setBank0@plt>
xor    %eax,%eax
test   $0x2,%bl
jne    114b <m242_setParams+0x1b>
pop    %rbx
jmp    1050 <ppuSetNameTblVertical@plt>
pop    %rbx
jmp    1040 <ppuSetNameTblHorizontal@plt>

LLVM IR (-O0):
define void @m242_setParams(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = ashr i32 %6, 3
%8 = and i32 %7, 15
%9 = shl i32 %8, 15
%10 = call i32 @prg32setBank0(i32 %9)
%11 = load i32, i32* %3
%12 = and i32 %11, 2
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %2
%15 = call i32 (...) @ppuSetNameTblVertical()
br label %18
16: ; preds = %2
%17 = call i32 (...) @ppuSetNameTblHorizontal()
br label %18
18: ; preds = %16, %14
ret void
}

LLVM IR (-O2):
define void @m242_setParams(i32 %0, i32 %1) {
%3 = shl i32 %0, 12
%4 = and i32 %3, 491520
%5 = tail call i32 @prg32setBank0(i32 %4)
%6 = and i32 %0, 2
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 (...) @ppuSetNameTblVertical()
br label %12
10: ; preds = %2
%11 = tail call i32 (...) @ppuSetNameTblHorizontal()
br label %12
12: ; preds = %10, %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ERR_free_strings();
int /*<<< orphan*/ EVP_cleanup();
int /*<<< orphan*/ SIG_IGN;
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ signal(int, int /*<<< orphan*/);
void int_catch(int sig) {
  signal(sig, SIG_IGN);
  ERR_free_strings();
  EVP_cleanup();
  exit(1);
}


x86 assembly (clang, -O0):
<int_catch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2e93(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
mov    $0x0,%al
call   1050 <ERR_free_strings@plt>
mov    $0x0,%al
call   1040 <EVP_cleanup@plt>
mov    $0x1,%edi
call   1060 <exit@plt>

x86 assembly (clang, -O2):
<int_catch>:
push   %rax
mov    0x2ea0(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
xor    %eax,%eax
call   1050 <ERR_free_strings@plt>
xor    %eax,%eax
call   1040 <EVP_cleanup@plt>
mov    $0x1,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@SIG_IGN = global i32 0
define void @int_catch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIG_IGN
%5 = call i32 @signal(i32 %3, i32 %4)
%6 = call i32 (...) @ERR_free_strings()
%7 = call i32 (...) @EVP_cleanup()
%8 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@SIG_IGN = global i32 0
define void @int_catch(i32 %0) {
%2 = load i32, i32* @SIG_IGN
%3 = tail call i32 @signal(i32 %0, i32 %2)
%4 = tail call i32 (...) @ERR_free_strings()
%5 = tail call i32 (...) @EVP_cleanup()
%6 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
scalar_t__ match_attr(char *);
char *match_type(char *t) {
  if (match_attr(t) == 0)
    return t;
  return NULL;
}


x86 assembly (clang, -O0):
<match_type>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <match_attr@plt>
cmp    $0x0,%rax
jne    113c <match_type+0x2c>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1144 <match_type+0x34>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<match_type>:
push   %rbx
mov    %rdi,%rbx
call   1030 <match_attr@plt>
xor    %ecx,%ecx
test   %rax,%rax
cmove  %rbx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @match_type(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @match_attr(i8* %4)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i8*, i8** %3
store i8* %8, i8** %2
br label %10
9: ; preds = %1
store i8* null, i8** %2
br label %10
10: ; preds = %9, %7
%11 = load i8*, i8** %2
ret i8* %11
}

LLVM IR (-O2):
define i8* @match_type(i8* %0) {
%2 = tail call i64 @match_attr(i8* %0)
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i8* %0, i8* null
ret i8* %4
}
void debugLoop() {}


x86 assembly (clang, -O0):
<debugLoop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<debugLoop>:
ret

LLVM IR (-O0):
define void @debugLoop() {
ret void
}

LLVM IR (-O2):
define void @debugLoop() {
ret void
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMR4D_set(void) { return U_WMRCORENONE_set("U_WMRSTARTDOC"); }


x86 assembly (clang, -O0):
<U_WMR4D_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR4D_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"U_WMRSTARTDOC\00"
define i8* @U_WMR4D_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [14 x i8] c"U_WMRSTARTDOC\00"
define i8* @U_WMR4D_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ INS_0F();
int /*<<< orphan*/ _c_setbyte(int);
void CLTS() {
  ;
  INS_0F();
  _c_setbyte(0x06);
  ;
}


x86 assembly (clang, -O0):
<CLTS>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <INS_0F@plt>
mov    $0x6,%edi
call   1040 <_c_setbyte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CLTS>:
push   %rax
xor    %eax,%eax
call   1030 <INS_0F@plt>
mov    $0x6,%edi
pop    %rax
jmp    1040 <_c_setbyte@plt>

LLVM IR (-O0):
define void @CLTS() {
%1 = call i32 (...) @INS_0F()
%2 = call i32 @_c_setbyte(i32 6)
ret void
}

LLVM IR (-O2):
define void @CLTS() {
%1 = tail call i32 (...) @INS_0F()
%2 = tail call i32 @_c_setbyte(i32 6)
ret void
}
/* Type definitions */
struct dm_pool {
  int dummy;
};
struct dm_hash_table {
  int dummy;
};
struct btree {
  int dummy;
};

/* Variables and functions */
struct dm_hash_table *dm_hash_create(unsigned int);
struct btree *btree_create(struct dm_pool *mem) {
  struct dm_hash_table *tmp;
  void *__cil_tmp3;
  {
    { tmp = dm_hash_create(0U); }
    {
      __cil_tmp3 = (void *)tmp;
      return ((struct btree *)__cil_tmp3);
    }
  }
}


x86 assembly (clang, -O0):
<btree_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
call   1030 <dm_hash_create@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<btree_create>:
xor    %edi,%edi
jmp    1030 <dm_hash_create@plt>

LLVM IR (-O0):
%struct.btree = type { i32 }
%struct.dm_pool = type { i32 }
%struct.dm_hash_table = type { i32 }
define %struct.btree* @btree_create(%struct.dm_pool* %0) {
%2 = alloca %struct.dm_pool*
%3 = alloca %struct.dm_hash_table*
%4 = alloca i8*
store %struct.dm_pool* %0, %struct.dm_pool** %2
%5 = call %struct.dm_hash_table* @dm_hash_create(i32 0)
store %struct.dm_hash_table* %5, %struct.dm_hash_table** %3
%6 = load %struct.dm_hash_table*, %struct.dm_hash_table** %3
%7 = bitcast %struct.dm_hash_table* %6 to i8*
store i8* %7, i8** %4
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to %struct.btree*
ret %struct.btree* %9
}

LLVM IR (-O2):
%struct.btree = type { i32 }
%struct.dm_pool = type { i32 }
%struct.dm_hash_table = type { i32 }
define %struct.btree* @btree_create(%struct.dm_pool* nocapture readnone %0) {
%2 = tail call %struct.dm_hash_table* @dm_hash_create(i32 0)
%3 = bitcast %struct.dm_hash_table* %2 to %struct.btree*
ret %struct.btree* %3
}
int featureTest() { return 1; }


x86 assembly (clang, -O0):
<featureTest>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<featureTest>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @featureTest() {
ret i32 1
}

LLVM IR (-O2):
define i32 @featureTest() {
ret i32 1
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void h265hvcc_nalu_set_length(uint8_t *p, uint16_t val) {
  p[0] = val >> 8;
  p[1] = val & 0xff;
}


x86 assembly (clang, -O0):
<h265hvcc_nalu_set_length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<h265hvcc_nalu_set_length>:
movzbl %sil,%eax
sar    $0x8,%esi
mov    %esi,(%rdi)
mov    %eax,0x4(%rdi)
ret

LLVM IR (-O0):
define void @h265hvcc_nalu_set_length(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 8
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 0
store i32 %6, i32* %8
%9 = load i32, i32* %4
%10 = and i32 %9, 255
%11 = load i32*, i32** %3
%12 = getelementptr inbounds i32, i32* %11, i64 1
store i32 %10, i32* %12
ret void
}

LLVM IR (-O2):
define void @h265hvcc_nalu_set_length(i32* nocapture writeonly %0, i32 %1) {
%3 = ashr i32 %1, 8
store i32 %3, i32* %0
%4 = and i32 %1, 255
%5 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %4, i32* %5
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int ferror(int /*<<< orphan*/ *);
__attribute__((__weak__, __always___)) int softboundmpx_ferror(FILE *stream) {
  return ferror(stream);
}


x86 assembly (clang, -O0):
<softboundmpx_ferror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ferror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_ferror>:
jmp    1030 <ferror@plt>

LLVM IR (-O0):
define weak i32 @softboundmpx_ferror(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @ferror(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define weak i32 @softboundmpx_ferror(i32* %0) {
%2 = tail call i32 @ferror(i32* %0)
ret i32 %2
}
const char *Type_Name(void) { return "Type"; }


x86 assembly (clang, -O0):
<Type_Name>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Type_Name>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"Type\00"
define i8* @Type_Name() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [5 x i8] c"Type\00"
define i8* @Type_Name() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}
double func(double x, double y, double z) { return x * x + y * y + z * z - .5; }


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm2
movsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xeb7(%rip),%xmm1
subsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
mulsd  %xmm1,%xmm1
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
mulsd  %xmm2,%xmm2
addsd  %xmm2,%xmm0
addsd  0xee4(%rip),%xmm0
ret

LLVM IR (-O0):
define double @func(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %4
%9 = load double, double* %5
%10 = load double, double* %5
%11 = fmul double %9, %10
%12 = call double @llvm.fmuladd.f64(double %7, double %8, double %11)
%13 = load double, double* %6
%14 = load double, double* %6
%15 = call double @llvm.fmuladd.f64(double %13, double %14, double %12)
%16 = fsub double %15, 5.000000e-01
ret double %16
}

LLVM IR (-O2):
define double @func(double %0, double %1, double %2) {
%4 = fmul double %1, %1
%5 = tail call double @llvm.fmuladd.f64(double %0, double %0, double %4)
%6 = tail call double @llvm.fmuladd.f64(double %2, double %2, double %5)
%7 = fadd double %6, -5.000000e-01
ret double %7
}
void ch_flightstick_pro_close(void *p) {}


x86 assembly (clang, -O0):
<ch_flightstick_pro_close>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ch_flightstick_pro_close>:
ret

LLVM IR (-O0):
define void @ch_flightstick_pro_close(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @ch_flightstick_pro_close(i8* nocapture %0) {
ret void
}
void kintr_disable(void) { asm volatile("cli" ::: "memory"); }


x86 assembly (clang, -O0):
<kintr_disable>:
push   %rbp
mov    %rsp,%rbp
cli
pop    %rbp
ret

x86 assembly (clang, -O2):
<kintr_disable>:
cli
ret

LLVM IR (-O0):
define void @kintr_disable() {
ret void
}

LLVM IR (-O2):
define void @kintr_disable() {
tail call void asm sideeffect "cli", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int /*<<< orphan*/ abort();
uint64_t outbid(uint64_t pseq, int id) {
  uint64_t tmp;
  tmp = pseq >> 8;
  tmp++;
  tmp <<= 8;
  if (id > 0xff)
    abort();
  return tmp | id;
}


x86 assembly (clang, -O0):
<outbid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0xff,-0x8(%rbp)
jle    114d <outbid+0x3d>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0xc(%rbp),%eax
or     -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outbid>:
cmp    $0x100,%esi
jge    1129 <outbid+0x19>
add    $0x100,%edi
and    $0xffffff00,%edi
or     %esi,%edi
mov    %edi,%eax
ret
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @outbid(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = ashr i32 %6, 8
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = add nsw i32 %8, 1
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = shl i32 %10, 8
store i32 %11, i32* %5
%12 = load i32, i32* %4
%13 = icmp sgt i32 %12, 255
br i1 %13, label %14, label %16
14: ; preds = %2
%15 = call i32 (...) @abort()
unreachable
16: ; preds = %2
%17 = load i32, i32* %5
%18 = load i32, i32* %4
%19 = or i32 %17, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @outbid(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, 255
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 (...) @abort()
unreachable
6: ; preds = %2
%7 = add i32 %0, 256
%8 = and i32 %7, -256
%9 = or i32 %8, %1
ret i32 %9
}
/* Variables and functions */
int rand();
int Random(void) { return rand() - 1; }


x86 assembly (clang, -O0):
<Random>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Random>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
add    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @Random() {
%1 = call i32 (...) @rand()
%2 = sub nsw i32 %1, 1
ret i32 %2
}

LLVM IR (-O2):
define i32 @Random() {
%1 = tail call i32 (...) @rand()
%2 = add nsw i32 %1, -1
ret i32 %2
}
void X509_add_ext(void) {}


x86 assembly (clang, -O0):
<X509_add_ext>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_add_ext>:
ret

LLVM IR (-O0):
define void @X509_add_ext() {
ret void
}

LLVM IR (-O2):
define void @X509_add_ext() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ kputc(char const);
void kputs(const char *str) {
  while (*str) {
    kputc(*str);
    str++;
  }
}


x86 assembly (clang, -O0):
<kputs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1146 <kputs+0x36>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <kputc@plt>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <kputs+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kputs>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <kputs+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <kputc@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <kputs+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @kputs(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = call i32 @kputc(i8 signext %9)
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @kputs(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = tail call i32 @kputc(i8 signext %5)
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0xe1() {
  Assert_real((isupper(225) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              1130, ("isupper should be 0 for 0xe1"));
}


x86 assembly (clang, -O0):
<t_isupper_0xe1>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe1,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x46a,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0xe1>:
push   %rax
mov    $0xe1,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x46a,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0xe1\00"
define void @t_isupper_0xe1() {
%1 = call i64 @isupper(i32 225)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1130, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0xe1\00"
define void @t_isupper_0xe1() {
%1 = tail call i64 @isupper(i32 225)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1130, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char *);
int /*<<< orphan*/ fprintf_newline(int /*<<< orphan*/ *, char *);
void fprintf_line(FILE *stream, char *line_chars, int line_length) {
  int i;
  for (i = 0; i < line_length; i++)
    fprintf(stream, "%s", line_chars);
  fprintf_newline(stream, "");
}


x86 assembly (clang, -O0):
<fprintf_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1168 <fprintf_line+0x48>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xeab(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    113a <fprintf_line+0x1a>
mov    -0x8(%rbp),%rdi
lea    0xe8f(%rip),%rsi
call   1040 <fprintf_newline@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fprintf_line>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%rbx
test   %edx,%edx
jle    1140 <fprintf_line+0x20>
mov    %edx,%ebp
mov    %rsi,%r14
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <fputs@plt>
add    $0xffffffff,%ebp
jne    1130 <fprintf_line+0x10>
lea    0xeb9(%rip),%rsi
mov    %rbx,%rdi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <fprintf_newline@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [1 x i8] zeroinitializer
define void @fprintf_line(i32* %0, i8* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %16, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %19
12: ; preds = %8
%13 = load i32*, i32** %4
%14 = load i8*, i8** %5
%15 = call i32 @fprintf(i32* %13, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %14)
br label %16
16: ; preds = %12
%17 = load i32, i32* %7
%18 = add nsw i32 %17, 1
store i32 %18, i32* %7
br label %8
19: ; preds = %8
%20 = load i32*, i32** %4
%21 = call i32 @fprintf_newline(i32* %20, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str.1 = [1 x i8] zeroinitializer
define void @fprintf_line(i32* %0, i8* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %10
5: ; preds = %3, %5
%6 = phi i32 [ %8, %5 ], [ 0, %3 ]
%7 = tail call i32 @fputs(i8* %1, i32* %0)
%8 = add nuw nsw i32 %6, 1
%9 = icmp eq i32 %8, %2
br i1 %9, label %10, label %5
10: ; preds = %5, %3
%11 = tail call i32 @fprintf_newline(i32* %0, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int *malloc(int);
int *f(void) {
  int i;
  int *p = malloc(100);
  *p = 1;
  if (i)
    exit(1);
  return p;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x64,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x1,(%rax)
cmpl   $0x0,-0x4(%rbp)
je     1154 <f+0x34>
mov    $0x1,%edi
call   1040 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rax
mov    $0x64,%edi
call   1030 <malloc@plt>
movl   $0x1,(%rax)
pop    %rcx
ret

LLVM IR (-O0):
define i32* @f() {
%1 = alloca i32
%2 = alloca i32*
%3 = call i32* @malloc(i32 100)
store i32* %3, i32** %2
%4 = load i32*, i32** %2
store i32 1, i32* %4
%5 = load i32, i32* %1
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i32 @exit(i32 1)
unreachable
9: ; preds = %0
%10 = load i32*, i32** %2
ret i32* %10
}

LLVM IR (-O2):
define noalias i32* @f() {
%1 = tail call i32* @malloc(i32 100)
store i32 1, i32* %1
ret i32* %1
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;

/* Variables and functions */
char *ctime(int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
int main() {
  time_t tim;
  time(&tim);
  printf("%s\n", ctime(&tim));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
call   1050 <time@plt>
lea    -0x8(%rbp),%rdi
call   1030 <ctime@plt>
mov    %rax,%rsi
lea    0xea5(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
call   1050 <time@plt>
mov    %rbx,%rdi
call   1030 <ctime@plt>
lea    0xeaf(%rip),%rdi
mov    %rax,%rsi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @time(i32* %2)
%4 = call i8* @ctime(i32* %2)
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @time(i32* %1)
%4 = call i8* @ctime(i32* %1)
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ol(char *);
int /*<<< orphan*/ puttos();
void put2tos(void) {
  ol("pop\tde");
  puttos();
  ol("push\tde");
}


x86 assembly (clang, -O0):
<put2tos>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <ol@plt>
mov    $0x0,%al
call   1040 <puttos@plt>
lea    0xec9(%rip),%rdi
call   1030 <ol@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<put2tos>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <ol@plt>
xor    %eax,%eax
call   1040 <puttos@plt>
lea    0xecc(%rip),%rdi
pop    %rax
jmp    1030 <ol@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"pop\09de\00"
@.str.1 = [8 x i8] c"push\09de\00"
define void @put2tos() {
%1 = call i32 @ol(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @puttos()
%3 = call i32 @ol(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"pop\09de\00"
@.str.1 = [8 x i8] c"push\09de\00"
define void @put2tos() {
%1 = tail call i32 @ol(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @puttos()
%3 = tail call i32 @ol(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int random();
double rand_step(void) { return (random() % 201 - 100) / 100.0; }


x86 assembly (clang, -O0):
<rand_step>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <random@plt>
mov    $0xc9,%ecx
cltd
idiv   %ecx
sub    $0x64,%edx
cvtsi2sd %edx,%xmm0
movsd  0xece(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_step>:
push   %rax
xor    %eax,%eax
call   1030 <random@plt>
cltq
imul   $0x28c1979,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x21,%rcx
add    %edx,%ecx
imul   $0xc9,%ecx,%ecx
neg    %ecx
add    %ecx,%eax
add    $0xffffff9c,%eax
cvtsi2sd %eax,%xmm0
divsd  0xeb9(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @rand_step() {
%1 = call i32 (...) @random()
%2 = srem i32 %1, 201
%3 = sub nsw i32 %2, 100
%4 = sitofp i32 %3 to double
%5 = fdiv double %4, 1.000000e+02
ret double %5
}

LLVM IR (-O2):
define double @rand_step() {
%1 = tail call i32 (...) @random()
%2 = srem i32 %1, 201
%3 = add nsw i32 %2, -100
%4 = sitofp i32 %3 to double
%5 = fdiv double %4, 1.000000e+02
ret double %5
}