xunge/DecIR huggingface dataset:
/* Variables and functions */
long ndb_set_mark(void *i_ptr_start, size_t i_size) { return 0; }


x86 assembly (clang, -O0):
<ndb_set_mark>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ndb_set_mark>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @ndb_set_mark(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
ret i64 0
}

LLVM IR (-O2):
define i64 @ndb_set_mark(i8* nocapture readnone %0, i64 %1) {
ret i64 0
}
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int unlink(const char *path) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<unlink>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ed9(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec0(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unlink>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @unlink(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @unlink(i8* nocapture readnone %0) {
%2 = load i32, i32* @ENOSYS
store i32 %2, i32* @errno
ret i32 -1
}
int ml_combos(int n1, int n2) { return 0; }


x86 assembly (clang, -O0):
<ml_combos>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ml_combos>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ml_combos(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @ml_combos(i32 %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
char *PICA_id_to_base64(unsigned char const *, int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *, char *, unsigned int, unsigned int);
void file_control(const unsigned char *peer_id, unsigned int sender_cmd,
                  unsigned int receiver_cmd) {
  printf("file_control: peer_id %s sender_cmd %u receiver_cmd %u \n",
         PICA_id_to_base64(peer_id, NULL), sender_cmd, receiver_cmd);
}


x86 assembly (clang, -O0):
<file_control>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <PICA_id_to_base64@plt>
mov    %rax,%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
lea    0xeb1(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_control>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebx
mov    %esi,%ebp
xor    %esi,%esi
call   1030 <PICA_id_to_base64@plt>
lea    0xecb(%rip),%rdi
mov    %rax,%rsi
mov    %ebp,%edx
mov    %ebx,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [57 x i8] c"file_control: peer_id %s sender_cmd %u receiver_cmd %u \0A\00"
define void @file_control(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = call i8* @PICA_id_to_base64(i8* %7, i32* null)
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @printf(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0), i8* %8, i32 %9, i32 %10)
ret void
}

LLVM IR (-O2):
@.str = [57 x i8] c"file_control: peer_id %s sender_cmd %u receiver_cmd %u \0A\00"
define void @file_control(i8* %0, i32 %1, i32 %2) {
%4 = tail call i8* @PICA_id_to_base64(i8* %0, i32* null)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0), i8* %4, i32 %1, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ e_sta();
int /*<<< orphan*/ e_writeback();
int /*<<< orphan*/ e_zpx();
void e_sta_zpx() {
  e_zpx();
  e_sta();
  e_writeback();
}


x86 assembly (clang, -O0):
<e_sta_zpx>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <e_zpx@plt>
mov    $0x0,%al
call   1040 <e_sta@plt>
mov    $0x0,%al
call   1030 <e_writeback@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_sta_zpx>:
push   %rax
xor    %eax,%eax
call   1050 <e_zpx@plt>
xor    %eax,%eax
call   1040 <e_sta@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <e_writeback@plt>

LLVM IR (-O0):
define void @e_sta_zpx() {
%1 = call i32 (...) @e_zpx()
%2 = call i32 (...) @e_sta()
%3 = call i32 (...) @e_writeback()
ret void
}

LLVM IR (-O2):
define void @e_sta_zpx() {
%1 = tail call i32 (...) @e_zpx()
%2 = tail call i32 (...) @e_sta()
%3 = tail call i32 (...) @e_writeback()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, int, char const *,
                            char const *);
int wpa_command(char const *, char *);
int set_network_quoted(const char *ifname, int id, const char *field,
                       const char *value) {
  char buf[200];
  snprintf(buf, sizeof(buf), "SET_NETWORK %d %s \"%s\"", id, field, value);
  return wpa_command(ifname, buf);
}


x86 assembly (clang, -O0):
<set_network_quoted>:
push   %rbp
mov    %rsp,%rbp
sub    $0xf0,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
lea    -0xf0(%rbp),%rdi
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%r8
mov    -0x20(%rbp),%r9
mov    $0xc8,%esi
lea    0xea8(%rip),%rdx
call   1030 <snprintf@plt>
mov    -0x8(%rbp),%rdi
lea    -0xf0(%rbp),%rsi
call   1040 <wpa_command@plt>
add    $0xf0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_network_quoted>:
push   %r14
push   %rbx
sub    $0xc8,%rsp
mov    %rcx,%r9
mov    %rdx,%r8
mov    %esi,%ecx
mov    %rdi,%rbx
lea    0xec4(%rip),%rdx
mov    %rsp,%r14
mov    %r14,%rdi
mov    $0xc8,%esi
call   1030 <snprintf@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <wpa_command@plt>
add    $0xc8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [23 x i8] c"SET_NETWORK %d %s \22%s\22\00"
define i32 @set_network_quoted(i8* %0, i32 %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca [200 x i8]
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%10 = getelementptr inbounds [200 x i8], [200 x i8]* %9, i64 0, i64 0
%11 = load i32, i32* %6
%12 = load i8*, i8** %7
%13 = load i8*, i8** %8
%14 = call i32 @snprintf(i8* %10, i32 200, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %11, i8* %12, i8* %13)
%15 = load i8*, i8** %5
%16 = getelementptr inbounds [200 x i8], [200 x i8]* %9, i64 0, i64 0
%17 = call i32 @wpa_command(i8* %15, i8* %16)
ret i32 %17
}

LLVM IR (-O2):
@.str = [23 x i8] c"SET_NETWORK %d %s \22%s\22\00"
define i32 @set_network_quoted(i8* %0, i32 %1, i8* %2, i8* %3) {
%5 = alloca [200 x i8]
%6 = getelementptr inbounds [200 x i8], [200 x i8]* %5, i64 0, i64 0
%7 = call i32 @snprintf(i8* %6, i32 200, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %1, i8* %2, i8* %3)
%8 = call i32 @wpa_command(i8* %0, i8* %6)
ret i32 %8
}
int test_imm_95int64_lowword_mem(long long *val) {
  return ((*val) & (0x95 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_95int64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x95,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_95int64_lowword_mem>:
testb  $0x95,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_95int64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 149
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_95int64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 149
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int help_echo(int argc, char **argv) { return 1; }


x86 assembly (clang, -O0):
<help_echo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<help_echo>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @help_echo(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret i32 1
}

LLVM IR (-O2):
define i32 @help_echo(i32 %0, i8** nocapture readnone %1) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ doQuickSort(int *, int /*<<< orphan*/, int);
void quickSort(int *array, int arrayLength) {
  doQuickSort(array, 0, arrayLength - 1);
}


x86 assembly (clang, -O0):
<quickSort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
sub    $0x1,%edx
xor    %esi,%esi
call   1030 <doQuickSort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quickSort>:
lea    -0x1(%rsi),%edx
xor    %esi,%esi
jmp    1030 <doQuickSort@plt>

LLVM IR (-O0):
define void @quickSort(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = call i32 @doQuickSort(i32* %5, i32 0, i32 %7)
ret void
}

LLVM IR (-O2):
define void @quickSort(i32* %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = tail call i32 @doQuickSort(i32* %0, i32 0, i32 %3)
ret void
}
float test_fabsf(float x) { return __builtin_fabsf(x); }


x86 assembly (clang, -O0):
<test_fabsf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movaps 0xeeb(%rip),%xmm1
pand   %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_fabsf>:
andps  0xef9(%rip),%xmm0
ret

LLVM IR (-O0):
define float @test_fabsf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @llvm.fabs.f32(float %3)
ret float %4
}

LLVM IR (-O2):
define float @test_fabsf(float %0) {
%2 = tail call float @llvm.fabs.f32(float %0)
ret float %2
}
double damperCurve(int thisTG, int firstTG, int lastTG, double w, double v,
                   double u) {
  double x = ((double)(thisTG - firstTG)) / ((double)(lastTG - firstTG));
  double z = (x * (u - v)) - u;
  return 1.0 - w * z * z;
}


x86 assembly (clang, -O0):
<damperCurve>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movsd  %xmm0,-0x18(%rbp)
movsd  %xmm1,-0x20(%rbp)
movsd  %xmm2,-0x28(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
cvtsi2sd %eax,%xmm0
mov    -0xc(%rbp),%eax
sub    -0x8(%rbp),%eax
cvtsi2sd %eax,%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  -0x30(%rbp),%xmm0
movsd  -0x28(%rbp),%xmm2
subsd  -0x20(%rbp),%xmm2
movsd  -0x28(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x38(%rbp)
movsd  -0x18(%rbp),%xmm0
mulsd  -0x38(%rbp),%xmm0
movsd  -0x38(%rbp),%xmm1
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  %xmm1,%xmm0
movsd  0xe5d(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<damperCurve>:
sub    %esi,%edi
cvtsi2sd %edi,%xmm3
sub    %esi,%edx
cvtsi2sd %edx,%xmm4
divsd  %xmm4,%xmm3
movapd %xmm2,%xmm4
subsd  %xmm1,%xmm4
mulsd  %xmm3,%xmm4
subsd  %xmm2,%xmm4
mulsd  %xmm4,%xmm0
mulsd  %xmm4,%xmm0
movsd  0xed0(%rip),%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @damperCurve(i32 %0, i32 %1, i32 %2, double %3, double %4, double %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca double
%11 = alloca double
%12 = alloca double
%13 = alloca double
%14 = alloca double
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store double %3, double* %10
store double %4, double* %11
store double %5, double* %12
%15 = load i32, i32* %7
%16 = load i32, i32* %8
%17 = sub nsw i32 %15, %16
%18 = sitofp i32 %17 to double
%19 = load i32, i32* %9
%20 = load i32, i32* %8
%21 = sub nsw i32 %19, %20
%22 = sitofp i32 %21 to double
%23 = fdiv double %18, %22
store double %23, double* %13
%24 = load double, double* %13
%25 = load double, double* %12
%26 = load double, double* %11
%27 = fsub double %25, %26
%28 = load double, double* %12
%29 = fneg double %28
%30 = call double @llvm.fmuladd.f64(double %24, double %27, double %29)
store double %30, double* %14
%31 = load double, double* %10
%32 = load double, double* %14
%33 = fmul double %31, %32
%34 = load double, double* %14
%35 = fneg double %33
%36 = call double @llvm.fmuladd.f64(double %35, double %34, double 1.000000e+00)
ret double %36
}

LLVM IR (-O2):
define double @damperCurve(i32 %0, i32 %1, i32 %2, double %3, double %4, double %5) {
%7 = sub nsw i32 %0, %1
%8 = sitofp i32 %7 to double
%9 = sub nsw i32 %2, %1
%10 = sitofp i32 %9 to double
%11 = fdiv double %8, %10
%12 = fsub double %5, %4
%13 = fneg double %5
%14 = tail call double @llvm.fmuladd.f64(double %11, double %12, double %13)
%15 = fneg double %14
%16 = fmul double %15, %3
%17 = tail call double @llvm.fmuladd.f64(double %16, double %14, double 1.000000e+00)
ret double %17
}
int is_addr_0(int address) { return address ? 0 : 1; }


x86 assembly (clang, -O0):
<is_addr_0>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_addr_0>:
xor    %eax,%eax
test   %edi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_addr_0(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 0, i32 1
ret i32 %6
}

LLVM IR (-O2):
define i32 @is_addr_0(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
void bdd_dump_int(unsigned char *b, int n) {
  b[0] = n >> 24;
  b[1] = n >> 16;
  b[2] = n >> 8;
  b[3] = n;
}


x86 assembly (clang, -O0):
<bdd_dump_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x18,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0xc(%rbp),%eax
sar    $0x10,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bdd_dump_int>:
bswap  %esi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @bdd_dump_int(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 24
%7 = trunc i32 %6 to i8
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 0
store i8 %7, i8* %9
%10 = load i32, i32* %4
%11 = ashr i32 %10, 16
%12 = trunc i32 %11 to i8
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i64 1
store i8 %12, i8* %14
%15 = load i32, i32* %4
%16 = ashr i32 %15, 8
%17 = trunc i32 %16 to i8
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i64 2
store i8 %17, i8* %19
%20 = load i32, i32* %4
%21 = trunc i32 %20 to i8
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i64 3
store i8 %21, i8* %23
ret void
}

LLVM IR (-O2):
define void @bdd_dump_int(i8* nocapture writeonly %0, i32 %1) {
%3 = lshr i32 %1, 24
%4 = trunc i32 %3 to i8
store i8 %4, i8* %0
%5 = lshr i32 %1, 16
%6 = trunc i32 %5 to i8
%7 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %6, i8* %7
%8 = lshr i32 %1, 8
%9 = trunc i32 %8 to i8
%10 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %9, i8* %10
%11 = trunc i32 %1 to i8
%12 = getelementptr inbounds i8, i8* %0, i64 3
store i8 %11, i8* %12
ret void
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int quot;
  int rem;
};
typedef TYPE_1__ div_t;

/* Variables and functions */
div_t div(int numer, int denom) {
  div_t ret;
  ret.quot = numer / denom;
  ret.rem = numer % denom;
  return ret;
}


x86 assembly (clang, -O0):
<div>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cltd
idivl  -0x10(%rbp)
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
cltd
idivl  -0x10(%rbp)
mov    %edx,-0x4(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<div>:
mov    %edi,%eax
cltd
idiv   %esi
shl    $0x20,%rdx
or     %rdx,%rax
ret

LLVM IR (-O0):
%struct.TYPE_3__ = type { i32, i32 }
define i64 @div(i32 %0, i32 %1) {
%3 = alloca %struct.TYPE_3__
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = sdiv i32 %6, %7
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %3, i32 0, i32 0
store i32 %8, i32* %9
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = srem i32 %10, %11
%13 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %3, i32 0, i32 1
store i32 %12, i32* %13
%14 = bitcast %struct.TYPE_3__* %3 to i64*
%15 = load i64, i64* %14
ret i64 %15
}

LLVM IR (-O2):
define i64 @div(i32 %0, i32 %1) {
%3 = sdiv i32 %0, %1
%4 = srem i32 %0, %1
%5 = zext i32 %4 to i64
%6 = shl nuw i64 %5, 32
%7 = zext i32 %3 to i64
%8 = or i64 %6, %7
ret i64 %8
}
int test_imm_F0uint32_reg(unsigned int val) {
  return ((val) & (0xF0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F0uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xf0,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F0uint32_reg>:
test   $0xf0,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F0uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 240
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_F0uint32_reg(i32 %0) {
%2 = and i32 %0, 240
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
__attribute__((visibility("default"))) void *
sd_bus_track_set_userdata(void *track, void *userdata) {
  return NULL;
}


x86 assembly (clang, -O0):
<sd_bus_track_set_userdata>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_track_set_userdata>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @sd_bus_track_set_userdata(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @sd_bus_track_set_userdata(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i8* null
}
int check_printlevel(int lvl) { return 0; }


x86 assembly (clang, -O0):
<check_printlevel>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_printlevel>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @check_printlevel(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @check_printlevel(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int execl(const char *path, const char *arg, ...) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<execl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ed5(%rip),%rax
mov    (%rax),%ecx
mov    0x2ebc(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execl>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @execl(i8* %0, i8* %1, ...) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i32, i32* @ENOSYS
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @execl(i8* nocapture readnone %0, i8* nocapture readnone %1, ...) {
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}
/* Variables and functions */
int core1_swap(char *, int);
int U_EMRPOLYLINETO_swap(char *record, int torev) {
  return (core1_swap(record, torev));
}


x86 assembly (clang, -O0):
<U_EMRPOLYLINETO_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <core1_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRPOLYLINETO_swap>:
jmp    1030 <core1_swap@plt>

LLVM IR (-O0):
define i32 @U_EMRPOLYLINETO_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @core1_swap(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @U_EMRPOLYLINETO_swap(i8* %0, i32 %1) {
%3 = tail call i32 @core1_swap(i8* %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int INT_MAX;
int INT_MIN;
int main(void) {
  INT_MIN % 1;
  INT_MAX - 1;
  (long long)0 || INT_MAX - 1;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@INT_MIN = global i32 0
@INT_MAX = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @INT_MIN
%3 = srem i32 %2, 1
%4 = load i32, i32* @INT_MAX
%5 = sub nsw i32 %4, 1
%6 = load i32, i32* @INT_MAX
%7 = sub nsw i32 %6, 1
%8 = icmp ne i32 %7, 0
%9 = zext i1 %8 to i32
ret i32 0
}

LLVM IR (-O2):
@INT_MIN = global i32 0
@INT_MAX = global i32 0
define i32 @main() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ send_cmd(int, char *, int);
void send_cmd_i2d1(int cmd_code, int arg1, int arg2, double arg3) {
  struct {
    int ival[2];
    double dval;
  } buf;
  buf.ival[0] = arg1;
  buf.ival[1] = arg2;
  buf.dval = arg3;
  send_cmd(cmd_code, (char *)&buf, sizeof(buf));
}


x86 assembly (clang, -O0):
<send_cmd_i2d1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movsd  %xmm0,-0x18(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x24(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x28(%rbp),%rsi
mov    $0x10,%edx
call   1030 <send_cmd@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_cmd_i2d1>:
sub    $0x18,%rsp
mov    %esi,0x8(%rsp)
mov    %edx,0xc(%rsp)
movsd  %xmm0,0x10(%rsp)
lea    0x8(%rsp),%rsi
mov    $0x10,%edx
call   1030 <send_cmd@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.anon = type { [2 x i32], double }
define void @send_cmd_i2d1(i32 %0, i32 %1, i32 %2, double %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca double
%9 = alloca %struct.anon
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store double %3, double* %8
%10 = load i32, i32* %6
%11 = getelementptr inbounds %struct.anon, %struct.anon* %9, i32 0, i32 0
%12 = getelementptr inbounds [2 x i32], [2 x i32]* %11, i64 0, i64 0
store i32 %10, i32* %12
%13 = load i32, i32* %7
%14 = getelementptr inbounds %struct.anon, %struct.anon* %9, i32 0, i32 0
%15 = getelementptr inbounds [2 x i32], [2 x i32]* %14, i64 0, i64 1
store i32 %13, i32* %15
%16 = load double, double* %8
%17 = getelementptr inbounds %struct.anon, %struct.anon* %9, i32 0, i32 1
store double %16, double* %17
%18 = load i32, i32* %5
%19 = bitcast %struct.anon* %9 to i8*
%20 = call i32 @send_cmd(i32 %18, i8* %19, i32 16)
ret void
}

LLVM IR (-O2):
%struct.anon = type { [2 x i32], double }
define void @send_cmd_i2d1(i32 %0, i32 %1, i32 %2, double %3) {
%5 = alloca %struct.anon
%6 = bitcast %struct.anon* %5 to i8*
%7 = getelementptr inbounds %struct.anon, %struct.anon* %5, i64 0, i32 0, i64 0
store i32 %1, i32* %7
%8 = getelementptr inbounds %struct.anon, %struct.anon* %5, i64 0, i32 0, i64 1
store i32 %2, i32* %8
%9 = getelementptr inbounds %struct.anon, %struct.anon* %5, i64 0, i32 1
store double %3, double* %9
%10 = call i32 @send_cmd(i32 %0, i8* %6, i32 16)
ret void
}
zddbatch(unit, flag) int unit, flag;
{ return set_batch(unit, flag, 1); }


x86 assembly (clang, -O0):
<zddbatch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x1,%edx
mov    $0x0,%al
call   1030 <set_batch@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zddbatch>:
mov    $0x1,%edx
xor    %eax,%eax
jmp    1030 <set_batch@plt>

LLVM IR (-O0):
define i32 @zddbatch(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 (i32, i32, i32, ...) bitcast (i32 (...)* @set_batch to i32 (i32, i32, i32, ...)*)(i32 %5, i32 %6, i32 1)
ret i32 %7
}

LLVM IR (-O2):
define i32 @zddbatch(i32 %0, i32 %1) {
%3 = tail call i32 (i32, i32, i32, ...) bitcast (i32 (...)* @set_batch to i32 (i32, i32, i32, ...)*)(i32 %0, i32 %1, i32 1)
ret i32 %3
}
int sign(float x) { return (x >= 0) - (x < 0); }


x86 assembly (clang, -O0):
<sign>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
xorps  %xmm0,%xmm0
ucomiss -0x4(%rbp),%xmm0
seta   %cl
and    $0x1,%cl
movzbl %cl,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sign>:
xorps  %xmm1,%xmm1
xor    %eax,%eax
ucomiss %xmm1,%xmm0
setae  %al
xor    %ecx,%ecx
ucomiss %xmm0,%xmm1
seta   %cl
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @sign(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp oge float %3, 0.000000e+00
%5 = zext i1 %4 to i32
%6 = load float, float* %2
%7 = fcmp olt float %6, 0.000000e+00
%8 = zext i1 %7 to i32
%9 = sub nsw i32 %5, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @sign(float %0) {
%2 = fcmp oge float %0, 0.000000e+00
%3 = zext i1 %2 to i32
%4 = fcmp olt float %0, 0.000000e+00
%5 = sext i1 %4 to i32
%6 = add nsw i32 %5, %3
ret i32 %6
}
int foo2() {
  union {
    int l;
    char c[sizeof(int)];
  } k2;
  k2.l = 0;
  k2.c[sizeof(int) - 1]++;
  return k2.l;
}


x86 assembly (clang, -O0):
<foo2>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x8(%rbp)
mov    -0x5(%rbp),%al
add    $0x1,%al
mov    %al,-0x5(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo2>:
mov    $0x1000000,%eax
ret

LLVM IR (-O0):
%union.anon = type { i32 }
define i32 @foo2() {
%1 = alloca %union.anon
%2 = bitcast %union.anon* %1 to i32*
store i32 0, i32* %2
%3 = bitcast %union.anon* %1 to [4 x i8]*
%4 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 3
%5 = load i8, i8* %4
%6 = add i8 %5, 1
store i8 %6, i8* %4
%7 = bitcast %union.anon* %1 to i32*
%8 = load i32, i32* %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @foo2() {
ret i32 16777216
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ ispunct(int);
void t_ispunct_0x7f() {
  Assert_real((ispunct(127) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_ispunct.c",
              640, ("ispunct should be 0 for 0x7f"));
}


x86 assembly (clang, -O0):
<t_ispunct_0x7f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7f,%edi
call   1030 <ispunct@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x280,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_ispunct_0x7f>:
push   %rax
mov    $0x7f,%edi
call   1030 <ispunct@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x280,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0x7f\00"
define void @t_ispunct_0x7f() {
%1 = call i64 @ispunct(i32 127)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 640, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0x7f\00"
define void @t_ispunct_0x7f() {
%1 = tail call i64 @ispunct(i32 127)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 640, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delay(int);
int /*<<< orphan*/ mbus_remote_register_write(int, int, int);
void pmu_adc_reset_setting() {
  mbus_remote_register_write(
      0x6, 0x3C,
      ((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5) |
       (1 << 6) | (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (0 << 11) |
       (0 << 12) | (0 << 13) | (1 << 14) | (1 << 15) | (1 << 16) | (1 << 17) |
       (1 << 18) | (0 << 19) | (1 << 20)));
  delay(100);
}


x86 assembly (clang, -O0):
<pmu_adc_reset_setting>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
mov    $0x3c,%esi
mov    $0x17c7ff,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
call   1030 <delay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmu_adc_reset_setting>:
push   %rax
mov    $0x6,%edi
mov    $0x3c,%esi
mov    $0x17c7ff,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
pop    %rax
jmp    1030 <delay@plt>

LLVM IR (-O0):
define void @pmu_adc_reset_setting() {
%1 = call i32 @mbus_remote_register_write(i32 6, i32 60, i32 1558527)
%2 = call i32 @delay(i32 100)
ret void
}

LLVM IR (-O2):
define void @pmu_adc_reset_setting() {
%1 = tail call i32 @mbus_remote_register_write(i32 6, i32 60, i32 1558527)
%2 = tail call i32 @delay(i32 100)
ret void
}
int hashfunc(unsigned int HashRange, unsigned int key) {
  return ((int)((key >> 4) % (unsigned int)HashRange));
}


x86 assembly (clang, -O0):
<hashfunc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x4,%eax
xor    %edx,%edx
divl   -0x4(%rbp)
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashfunc>:
mov    %esi,%eax
shr    $0x4,%eax
xor    %edx,%edx
div    %edi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @hashfunc(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = lshr i32 %5, 4
%7 = load i32, i32* %3
%8 = urem i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @hashfunc(i32 %0, i32 %1) {
%3 = lshr i32 %1, 4
%4 = urem i32 %3, %0
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int xg_write_mem(uint64_t guestva, char *frombuf, int len) { return 0; }


x86 assembly (clang, -O0):
<xg_write_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xg_write_mem>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @xg_write_mem(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @xg_write_mem(i32 %0, i8* nocapture readnone %1, i32 %2) {
ret i32 0
}
void Comp1_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<Comp1_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <Comp1_Handler+0x9>
jmp    1109 <Comp1_Handler+0x9>

x86 assembly (clang, -O2):
<Comp1_Handler>:
jmp    1100 <Comp1_Handler>

LLVM IR (-O0):
define void @Comp1_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @Comp1_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
double log(double);
double calcTGivenW(int n, int w) {
  double N = n;
  double W = w;
  return log(W * (N - 1.0) / (N - W)) * (N - 1.0) / N;
}


x86 assembly (clang, -O0):
<calcTGivenW>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
cvtsi2sdl -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  0xebc(%rip),%xmm2
subsd  %xmm2,%xmm1
mulsd  %xmm1,%xmm0
movsd  -0x10(%rbp),%xmm1
subsd  -0x18(%rbp),%xmm1
divsd  %xmm1,%xmm0
call   1030 <log@plt>
movsd  -0x10(%rbp),%xmm1
movsd  0xe94(%rip),%xmm2
subsd  %xmm2,%xmm1
mulsd  %xmm1,%xmm0
divsd  -0x10(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calcTGivenW>:
sub    $0x18,%rsp
cvtsi2sd %edi,%xmm3
movsd  %xmm3,0x10(%rsp)
cvtsi2sd %esi,%xmm1
movsd  0xed6(%rip),%xmm0
addsd  %xmm3,%xmm0
movsd  %xmm0,0x8(%rsp)
mulsd  %xmm1,%xmm0
movapd %xmm3,%xmm2
subsd  %xmm1,%xmm2
divsd  %xmm2,%xmm0
call   1030 <log@plt>
mulsd  0x8(%rsp),%xmm0
divsd  0x10(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @calcTGivenW(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca double
%6 = alloca double
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = sitofp i32 %7 to double
store double %8, double* %5
%9 = load i32, i32* %4
%10 = sitofp i32 %9 to double
store double %10, double* %6
%11 = load double, double* %6
%12 = load double, double* %5
%13 = fsub double %12, 1.000000e+00
%14 = fmul double %11, %13
%15 = load double, double* %5
%16 = load double, double* %6
%17 = fsub double %15, %16
%18 = fdiv double %14, %17
%19 = call double @log(double %18)
%20 = load double, double* %5
%21 = fsub double %20, 1.000000e+00
%22 = fmul double %19, %21
%23 = load double, double* %5
%24 = fdiv double %22, %23
ret double %24
}

LLVM IR (-O2):
define double @calcTGivenW(i32 %0, i32 %1) {
%3 = sitofp i32 %0 to double
%4 = sitofp i32 %1 to double
%5 = fadd double %3, -1.000000e+00
%6 = fmul double %5, %4
%7 = fsub double %3, %4
%8 = fdiv double %6, %7
%9 = tail call double @log(double %8)
%10 = fmul double %5, %9
%11 = fdiv double %10, %3
ret double %11
}
int int_cmp_r(const void *a, const void *b) {
  const int *ia = a, *ib = b;
  return *ib - *ia;
}


x86 assembly (clang, -O0):
<int_cmp_r>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_cmp_r>:
mov    (%rsi),%eax
sub    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @int_cmp_r(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %6
%12 = load i32, i32* %11
%13 = load i32*, i32** %5
%14 = load i32, i32* %13
%15 = sub nsw i32 %12, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @int_cmp_r(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = sub nsw i32 %5, %6
ret i32 %7
}
int valid_sq(const int sq) { return (sq >= 0 && sq < 64); }


x86 assembly (clang, -O0):
<valid_sq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <valid_sq+0x20>
cmpl   $0x40,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<valid_sq>:
xor    %eax,%eax
cmp    $0x40,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @valid_sq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 64
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @valid_sq(i32 %0) {
%2 = icmp ult i32 %0, 64
%3 = zext i1 %2 to i32
ret i32 %3
}
int Double(int x) { return 2 * x; }


x86 assembly (clang, -O0):
<Double>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Double>:
lea    (%rdi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @Double(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 2, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @Double(i32 %0) {
%2 = shl nsw i32 %0, 1
ret i32 %2
}
/* Type definitions */
struct timespec {
  long tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, int /*<<< orphan*/ *);
void tDelay(long interval) {
  struct timespec timer;
  timer.tv_sec = 0;
  timer.tv_nsec = interval;
  nanosleep(&timer, NULL);
}


x86 assembly (clang, -O0):
<tDelay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
lea    -0x18(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <nanosleep@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tDelay>:
sub    $0x18,%rsp
movq   $0x0,0x10(%rsp)
mov    %rdi,0x8(%rsp)
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <nanosleep@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
define void @tDelay(i64 %0) {
%2 = alloca i64
%3 = alloca %struct.timespec
store i64 %0, i64* %2
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
store i64 0, i64* %4
%5 = load i64, i64* %2
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
store i64 %5, i64* %6
%7 = call i32 @nanosleep(%struct.timespec* %3, i32* null)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i64, i64 }
define void @tDelay(i64 %0) {
%2 = alloca %struct.timespec
%3 = bitcast %struct.timespec* %2 to i8*
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 1
store i64 0, i64* %4
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 0
store i64 %0, i64* %5
%6 = call i32 @nanosleep(%struct.timespec* %2, i32* null)
ret void
}
const unsigned is_even(const unsigned long n) { return !(n & 1); }


x86 assembly (clang, -O0):
<is_even>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_even>:
mov    %rdi,%rax
not    %eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_even(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 1
%5 = icmp ne i64 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @is_even(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = and i32 %2, 1
%4 = xor i32 %3, 1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ NEG();
int /*<<< orphan*/ T_WAIT_UNTIL(int);
void op_ED_0x44(void) {
  NEG();
  T_WAIT_UNTIL(4);
  return;
}


x86 assembly (clang, -O0):
<op_ED_0x44>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <NEG@plt>
mov    $0x4,%edi
call   1030 <T_WAIT_UNTIL@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_ED_0x44>:
push   %rax
xor    %eax,%eax
call   1040 <NEG@plt>
mov    $0x4,%edi
pop    %rax
jmp    1030 <T_WAIT_UNTIL@plt>

LLVM IR (-O0):
define void @op_ED_0x44() {
%1 = call i32 (...) @NEG()
%2 = call i32 @T_WAIT_UNTIL(i32 4)
ret void
}

LLVM IR (-O2):
define void @op_ED_0x44() {
%1 = tail call i32 (...) @NEG()
%2 = tail call i32 @T_WAIT_UNTIL(i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void hello_en(void) { printf("Hello in the library world!\n"); }


x86 assembly (clang, -O0):
<hello_en>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hello_en>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"Hello in the library world!\0A\00"
define void @hello_en() {
%1 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [28 x i8] c"Hello in the library world!\00"
define void @hello_en() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ default_handler();
__attribute__((weak)) void DMA1_Channel5_IRQHandler() { default_handler(); }


x86 assembly (clang, -O0):
<DMA1_Channel5_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <default_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMA1_Channel5_IRQHandler>:
xor    %eax,%eax
jmp    1030 <default_handler@plt>

LLVM IR (-O0):
define weak void @DMA1_Channel5_IRQHandler() {
%1 = call i32 (...) @default_handler()
ret void
}

LLVM IR (-O2):
define weak void @DMA1_Channel5_IRQHandler() {
%1 = tail call i32 (...) @default_handler()
ret void
}
int get_option(void *dest __attribute__((unused)),
               const char *name __attribute__((unused))) {
  return -2;
}


x86 assembly (clang, -O0):
<get_option>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xfffffffe,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_option>:
mov    $0xfffffffe,%eax
ret

LLVM IR (-O0):
define i32 @get_option(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 -2
}

LLVM IR (-O2):
define i32 @get_option(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 -2
}
int is_auth_enc(int keytype) {
  return ((keytype == 5) || (keytype == 6) || (keytype == 7) || (keytype == 8));
}


x86 assembly (clang, -O0):
<is_auth_enc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x5,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <is_auth_enc+0x3e>
mov    $0x1,%al
cmpl   $0x6,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <is_auth_enc+0x3e>
mov    $0x1,%al
cmpl   $0x7,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <is_auth_enc+0x3e>
cmpl   $0x8,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_auth_enc>:
add    $0xfffffffb,%edi
xor    %eax,%eax
cmp    $0x4,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @is_auth_enc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 5
br i1 %4, label %14, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 6
br i1 %7, label %14, label %8
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 7
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 8
br label %14
14: ; preds = %11, %8, %5, %1
%15 = phi i1 [ true, %8 ], [ true, %5 ], [ true, %1 ], [ %13, %11 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @is_auth_enc(i32 %0) {
%2 = add i32 %0, -5
%3 = icmp ult i32 %2, 4
%4 = zext i1 %3 to i32
ret i32 %4
}
void __asan_report_load2() {}


x86 assembly (clang, -O0):
<__asan_report_load2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__asan_report_load2>:
ret

LLVM IR (-O0):
define void @__asan_report_load2() {
ret void
}

LLVM IR (-O2):
define void @__asan_report_load2() {
ret void
}
/* Variables and functions */
int trap0(int, unsigned long, int);
int _write(int file, char *ptr, int len) {
  return trap0(file, (unsigned long)ptr, len);
}


x86 assembly (clang, -O0):
<_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <trap0@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_write>:
jmp    1030 <trap0@plt>

LLVM IR (-O0):
define i32 @_write(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = ptrtoint i8* %8 to i64
%10 = load i32, i32* %6
%11 = call i32 @trap0(i32 %7, i64 %9, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @_write(i32 %0, i8* %1, i32 %2) {
%4 = ptrtoint i8* %1 to i64
%5 = tail call i32 @trap0(i32 %0, i64 %4, i32 %2)
ret i32 %5
}
rl_vi_eof_maybe(count, c) int count, c;
{ rl_newline(1, '\n'); }


x86 assembly (clang, -O0):
<rl_vi_eof_maybe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%edi
mov    $0xa,%esi
mov    $0x0,%al
call   1030 <rl_newline@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rl_vi_eof_maybe>:
mov    $0x1,%edi
mov    $0xa,%esi
xor    %eax,%eax
jmp    1030 <rl_newline@plt>

LLVM IR (-O0):
define i32 @rl_vi_eof_maybe(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (i32, i32, ...) bitcast (i32 (...)* @rl_newline to i32 (i32, i32, ...)*)(i32 1, i32 10)
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @rl_vi_eof_maybe(i32 %0, i32 %1) {
%3 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @rl_newline to i32 (i32, i32, ...)*)(i32 1, i32 10)
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void FlashIntClear(uint32_t ui32IntFlags) {
  (*((volatile uint32_t *)(0x400FD014))) = ui32IntFlags;
}


x86 assembly (clang, -O0):
<FlashIntClear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x400fd014,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<FlashIntClear>:
mov    %edi,0x400fd014
ret

LLVM IR (-O0):
define void @FlashIntClear(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store volatile i32 %3, i32* inttoptr (i64 1074778132 to i32*)
ret void
}

LLVM IR (-O2):
define void @FlashIntClear(i32 %0) {
store volatile i32 %0, i32* inttoptr (i64 1074778132 to i32*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __dummy(void *);
void f(void *x) { __dummy(x); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__dummy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
jmp    1030 <__dummy@plt>

LLVM IR (-O0):
define void @f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @__dummy(i8* %3)
ret void
}

LLVM IR (-O2):
define void @f(i8* %0) {
%2 = tail call i32 @__dummy(i8* %0)
ret void
}