char make_esc_seq(const char c) {
  switch (c) {
  case '0':
    return '\0';
  case 'a':
    return '\a';
  case 'b':
    return '\b';
  case 'f':
    return '\f';
  case 'n':
    return '\n';
  case 'r':
    return '\r';
  case 't':
    return '\t';
  case 'v':
    return '\v';
  case '\\':
    return '\\';
  case '\'':
    return '\'';
  case '"':
    return '\"';
  case '?':
    return '\?';
  default:
    return c;
  }
}


x86 assembly (clang, -O0):
<make_esc_seq>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
add    $0xffffffde,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x54,%eax
ja     11a0 <make_esc_seq+0xa0>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movb   $0x0,-0x1(%rbp)
jmp    11a6 <make_esc_seq+0xa6>
movb   $0x7,-0x1(%rbp)
jmp    11a6 <make_esc_seq+0xa6>
movb   $0x8,-0x1(%rbp)
jmp    11a6 <make_esc_seq+0xa6>
movb   $0xc,-0x1(%rbp)
jmp    11a6 <make_esc_seq+0xa6>
movb   $0xa,-0x1(%rbp)
jmp    11a6 <make_esc_seq+0xa6>
movb   $0xd,-0x1(%rbp)
jmp    11a6 <make_esc_seq+0xa6>
movb   $0x9,-0x1(%rbp)
jmp    11a6 <make_esc_seq+0xa6>
movb   $0xb,-0x1(%rbp)
jmp    11a6 <make_esc_seq+0xa6>
movb   $0x5c,-0x1(%rbp)
jmp    11a6 <make_esc_seq+0xa6>
movb   $0x27,-0x1(%rbp)
jmp    11a6 <make_esc_seq+0xa6>
movb   $0x22,-0x1(%rbp)
jmp    11a6 <make_esc_seq+0xa6>
movb   $0x3f,-0x1(%rbp)
jmp    11a6 <make_esc_seq+0xa6>
mov    -0x2(%rbp),%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_esc_seq>:
lea    -0x22(%rdi),%ecx
cmp    $0x54,%ecx
ja     111d <make_esc_seq+0x1d>
xor    %eax,%eax
lea    0xeef(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
mov    $0x22,%al
ret
mov    %edi,%eax
ret
mov    $0x27,%al
ret
mov    $0x3f,%al
ret
mov    $0x5c,%al
ret
mov    $0x7,%al
ret
mov    $0x8,%al
ret
mov    $0xc,%al
ret
mov    $0xa,%al
ret
mov    $0xd,%al
ret
mov    $0x9,%al
ret
mov    $0xb,%al
ret

LLVM IR (-O0):
define signext i8 @make_esc_seq(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %18 [
i32 48, label %6
i32 97, label %7
i32 98, label %8
i32 102, label %9
i32 110, label %10
i32 114, label %11
i32 116, label %12
i32 118, label %13
i32 92, label %14
i32 39, label %15
i32 34, label %16
i32 63, label %17
]
6: ; preds = %1
store i8 0, i8* %2
br label %20
7: ; preds = %1
store i8 7, i8* %2
br label %20
8: ; preds = %1
store i8 8, i8* %2
br label %20
9: ; preds = %1
store i8 12, i8* %2
br label %20
10: ; preds = %1
store i8 10, i8* %2
br label %20
11: ; preds = %1
store i8 13, i8* %2
br label %20
12: ; preds = %1
store i8 9, i8* %2
br label %20
13: ; preds = %1
store i8 11, i8* %2
br label %20
14: ; preds = %1
store i8 92, i8* %2
br label %20
15: ; preds = %1
store i8 39, i8* %2
br label %20
16: ; preds = %1
store i8 34, i8* %2
br label %20
17: ; preds = %1
store i8 63, i8* %2
br label %20
18: ; preds = %1
%19 = load i8, i8* %3
store i8 %19, i8* %2
br label %20
20: ; preds = %18, %17, %16, %15, %14, %13, %12, %11, %10, %9, %8, %7, %6
%21 = load i8, i8* %2
ret i8 %21
}

LLVM IR (-O2):
define signext i8 @make_esc_seq(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %14 [
i32 48, label %15
i32 97, label %3
i32 98, label %4
i32 102, label %5
i32 110, label %6
i32 114, label %7
i32 116, label %8
i32 118, label %9
i32 92, label %10
i32 39, label %11
i32 34, label %12
i32 63, label %13
]
3: ; preds = %1
br label %15
4: ; preds = %1
br label %15
5: ; preds = %1
br label %15
6: ; preds = %1
br label %15
7: ; preds = %1
br label %15
8: ; preds = %1
br label %15
9: ; preds = %1
br label %15
10: ; preds = %1
br label %15
11: ; preds = %1
br label %15
12: ; preds = %1
br label %15
13: ; preds = %1
br label %15
14: ; preds = %1
br label %15
15: ; preds = %1, %14, %13, %12, %11, %10, %9, %8, %7, %6, %5, %4, %3
%16 = phi i8 [ %0, %14 ], [ 63, %13 ], [ 34, %12 ], [ 39, %11 ], [ 92, %10 ], [ 11, %9 ], [ 9, %8 ], [ 13, %7 ], [ 10, %6 ], [ 12, %5 ], [ 8, %4 ], [ 7, %3 ], [ 0, %1 ]
ret i8 %16
}