unsigned short CompressAnimationTypes(unsigned short animationType_id) {
  switch (animationType_id) {
  case 41:
    return 46;
  case 48:
    return 46;
  case 49:
    return 46;
  case 88:
    return 89;
  case 90:
    return 89;
  case 103:
    return 107;
  case 109:
    return 107;
  case 110:
    return 107;
  case 114:
    return 115;
  case 116:
    return 115;
  default:
    return animationType_id;
  }
}


x86 assembly (clang, -O0):
<CompressAnimationTypes>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%eax
add    $0xffffffd7,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x4b,%eax
ja     11a3 <CompressAnimationTypes+0xa3>
mov    -0x10(%rbp),%rax
lea    0xed4(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movw   $0x2e,-0x2(%rbp)
jmp    11ab <CompressAnimationTypes+0xab>
movw   $0x2e,-0x2(%rbp)
jmp    11ab <CompressAnimationTypes+0xab>
movw   $0x2e,-0x2(%rbp)
jmp    11ab <CompressAnimationTypes+0xab>
movw   $0x59,-0x2(%rbp)
jmp    11ab <CompressAnimationTypes+0xab>
movw   $0x59,-0x2(%rbp)
jmp    11ab <CompressAnimationTypes+0xab>
movw   $0x6b,-0x2(%rbp)
jmp    11ab <CompressAnimationTypes+0xab>
movw   $0x6b,-0x2(%rbp)
jmp    11ab <CompressAnimationTypes+0xab>
movw   $0x6b,-0x2(%rbp)
jmp    11ab <CompressAnimationTypes+0xab>
movw   $0x73,-0x2(%rbp)
jmp    11ab <CompressAnimationTypes+0xab>
movw   $0x73,-0x2(%rbp)
jmp    11ab <CompressAnimationTypes+0xab>
mov    -0x4(%rbp),%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CompressAnimationTypes>:
lea    -0x29(%rdi),%ecx
cmp    $0x4b,%cx
ja     112f <CompressAnimationTypes+0x2f>
mov    $0x2e,%ax
movzwl %cx,%ecx
lea    0xee9(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
mov    $0x6b,%ax
ret
mov    $0x59,%ax
ret
mov    $0x73,%ax
ret
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i16 @CompressAnimationTypes(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %3
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
switch i32 %5, label %16 [
i32 41, label %6
i32 48, label %7
i32 49, label %8
i32 88, label %9
i32 90, label %10
i32 103, label %11
i32 109, label %12
i32 110, label %13
i32 114, label %14
i32 116, label %15
]
6: ; preds = %1
store i16 46, i16* %2
br label %18
7: ; preds = %1
store i16 46, i16* %2
br label %18
8: ; preds = %1
store i16 46, i16* %2
br label %18
9: ; preds = %1
store i16 89, i16* %2
br label %18
10: ; preds = %1
store i16 89, i16* %2
br label %18
11: ; preds = %1
store i16 107, i16* %2
br label %18
12: ; preds = %1
store i16 107, i16* %2
br label %18
13: ; preds = %1
store i16 107, i16* %2
br label %18
14: ; preds = %1
store i16 115, i16* %2
br label %18
15: ; preds = %1
store i16 115, i16* %2
br label %18
16: ; preds = %1
%17 = load i16, i16* %3
store i16 %17, i16* %2
br label %18
18: ; preds = %16, %15, %14, %13, %12, %11, %10, %9, %8, %7, %6
%19 = load i16, i16* %2
ret i16 %19
}

LLVM IR (-O2):
define zeroext i16 @CompressAnimationTypes(i16 zeroext %0) {
switch i16 %0, label %9 [
i16 41, label %10
i16 48, label %10
i16 49, label %10
i16 88, label %2
i16 90, label %3
i16 103, label %4
i16 109, label %5
i16 110, label %6
i16 114, label %7
i16 116, label %8
]
2: ; preds = %1
br label %10
3: ; preds = %1
br label %10
4: ; preds = %1
br label %10
5: ; preds = %1
br label %10
6: ; preds = %1
br label %10
7: ; preds = %1
br label %10
8: ; preds = %1
br label %10
9: ; preds = %1
br label %10
10: ; preds = %1, %1, %1, %9, %8, %7, %6, %5, %4, %3, %2
%11 = phi i16 [ %0, %9 ], [ 115, %8 ], [ 115, %7 ], [ 107, %6 ], [ 107, %5 ], [ 107, %4 ], [ 89, %3 ], [ 89, %2 ], [ 46, %1 ], [ 46, %1 ], [ 46, %1 ]
ret i16 %11
}