int PWM_length(int mask, unsigned int count) {
  int latch_enable = 0;
  if (count > (*((volatile unsigned int *)(0xe0014018))))
    return -1;
  if (mask & (1 << 0)) {
    (*((volatile unsigned int *)(0xe001401c))) = count;
    latch_enable |= ((unsigned int)0x00000002);
  }
  if (mask & (1 << 1)) {
    (*((volatile unsigned int *)(0xe0014020))) = count;
    latch_enable |= ((unsigned int)0x00000004);
  }
  if (mask & (1 << 2)) {
    (*((volatile unsigned int *)(0xe0014024))) = count;
    latch_enable |= ((unsigned int)0x00000008);
  }
  if (mask & (1 << 3)) {
    (*((volatile unsigned int *)(0xe0014040))) = count;
    latch_enable |= ((unsigned int)0x00000010);
  }
  if (mask & (1 << 4)) {
    (*((volatile unsigned int *)(0xe0014044))) = count;
    latch_enable |= ((unsigned int)0x00000020);
  }
  if (mask & (1 << 5)) {
    (*((volatile unsigned int *)(0xe0014048))) = count;
    latch_enable |= ((unsigned int)0x00000040);
  }
  (*((volatile unsigned int *)(0xe0014050))) |= latch_enable;
  return 1;
}


x86 assembly (clang, -O0):
<PWM_length>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    $0xe0014018,%ecx
mov    (%rcx),%ecx
cmp    %ecx,%eax
jbe    112f <PWM_length+0x2f>
movl   $0xffffffff,-0x4(%rbp)
jmp    1215 <PWM_length+0x115>
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1151 <PWM_length+0x51>
mov    -0xc(%rbp),%ecx
mov    $0xe001401c,%eax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%eax
or     $0x2,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     1173 <PWM_length+0x73>
mov    -0xc(%rbp),%ecx
mov    $0xe0014020,%eax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%eax
or     $0x4,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    $0x4,%eax
cmp    $0x0,%eax
je     1195 <PWM_length+0x95>
mov    -0xc(%rbp),%ecx
mov    $0xe0014024,%eax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%eax
or     $0x8,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    $0x8,%eax
cmp    $0x0,%eax
je     11b7 <PWM_length+0xb7>
mov    -0xc(%rbp),%ecx
mov    $0xe0014040,%eax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%eax
or     $0x10,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    $0x10,%eax
cmp    $0x0,%eax
je     11d9 <PWM_length+0xd9>
mov    -0xc(%rbp),%ecx
mov    $0xe0014044,%eax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%eax
or     $0x20,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    $0x20,%eax
cmp    $0x0,%eax
je     11fb <PWM_length+0xfb>
mov    -0xc(%rbp),%ecx
mov    $0xe0014048,%eax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%eax
or     $0x40,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    $0xe0014050,%ecx
mov    (%rcx),%ecx
or     %eax,%ecx
mov    $0xe0014050,%eax
mov    %ecx,(%rax)
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWM_length>:
mov    $0xe0014050,%ecx
mov    -0x38(%rcx),%edx
mov    $0xffffffff,%eax
cmp    %esi,%edx
jb     1144 <PWM_length+0x44>
xor    %eax,%eax
test   $0x1,%dil
jne    1145 <PWM_length+0x45>
test   $0x2,%dil
jne    1153 <PWM_length+0x53>
test   $0x4,%dil
jne    115f <PWM_length+0x5f>
test   $0x8,%dil
jne    116b <PWM_length+0x6b>
test   $0x10,%dil
jne    1177 <PWM_length+0x77>
test   $0x20,%dil
je     113d <PWM_length+0x3d>
mov    %esi,-0x8(%rcx)
or     $0x40,%eax
or     %eax,(%rcx)
mov    $0x1,%eax
ret
mov    %esi,-0x34(%rcx)
mov    $0x2,%eax
test   $0x2,%dil
je     111f <PWM_length+0x1f>
mov    %esi,-0x30(%rcx)
or     $0x4,%eax
test   $0x4,%dil
je     1125 <PWM_length+0x25>
mov    %esi,-0x2c(%rcx)
or     $0x8,%eax
test   $0x8,%dil
je     112b <PWM_length+0x2b>
mov    %esi,-0x10(%rcx)
or     $0x10,%eax
test   $0x10,%dil
je     1131 <PWM_length+0x31>
mov    %esi,-0xc(%rcx)
or     $0x20,%eax
test   $0x20,%dil
jne    1137 <PWM_length+0x37>
jmp    113d <PWM_length+0x3d>

LLVM IR (-O0):
define i32 @PWM_length(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 0, i32* %6
%7 = load i32, i32* %5
%8 = load volatile i32, i32* inttoptr (i64 3758178328 to i32*)
%9 = icmp ugt i32 %7, %8
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 -1, i32* %3
br label %63
11: ; preds = %2
%12 = load i32, i32* %4
%13 = and i32 %12, 1
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %19
15: ; preds = %11
%16 = load i32, i32* %5
store volatile i32 %16, i32* inttoptr (i64 3758178332 to i32*)
%17 = load i32, i32* %6
%18 = or i32 %17, 2
store i32 %18, i32* %6
br label %19
19: ; preds = %15, %11
%20 = load i32, i32* %4
%21 = and i32 %20, 2
%22 = icmp ne i32 %21, 0
br i1 %22, label %23, label %27
23: ; preds = %19
%24 = load i32, i32* %5
store volatile i32 %24, i32* inttoptr (i64 3758178336 to i32*)
%25 = load i32, i32* %6
%26 = or i32 %25, 4
store i32 %26, i32* %6
br label %27
27: ; preds = %23, %19
%28 = load i32, i32* %4
%29 = and i32 %28, 4
%30 = icmp ne i32 %29, 0
br i1 %30, label %31, label %35
31: ; preds = %27
%32 = load i32, i32* %5
store volatile i32 %32, i32* inttoptr (i64 3758178340 to i32*)
%33 = load i32, i32* %6
%34 = or i32 %33, 8
store i32 %34, i32* %6
br label %35
35: ; preds = %31, %27
%36 = load i32, i32* %4
%37 = and i32 %36, 8
%38 = icmp ne i32 %37, 0
br i1 %38, label %39, label %43
39: ; preds = %35
%40 = load i32, i32* %5
store volatile i32 %40, i32* inttoptr (i64 3758178368 to i32*)
%41 = load i32, i32* %6
%42 = or i32 %41, 16
store i32 %42, i32* %6
br label %43
43: ; preds = %39, %35
%44 = load i32, i32* %4
%45 = and i32 %44, 16
%46 = icmp ne i32 %45, 0
br i1 %46, label %47, label %51
47: ; preds = %43
%48 = load i32, i32* %5
store volatile i32 %48, i32* inttoptr (i64 3758178372 to i32*)
%49 = load i32, i32* %6
%50 = or i32 %49, 32
store i32 %50, i32* %6
br label %51
51: ; preds = %47, %43
%52 = load i32, i32* %4
%53 = and i32 %52, 32
%54 = icmp ne i32 %53, 0
br i1 %54, label %55, label %59
55: ; preds = %51
%56 = load i32, i32* %5
store volatile i32 %56, i32* inttoptr (i64 3758178376 to i32*)
%57 = load i32, i32* %6
%58 = or i32 %57, 64
store i32 %58, i32* %6
br label %59
59: ; preds = %55, %51
%60 = load i32, i32* %6
%61 = load volatile i32, i32* inttoptr (i64 3758178384 to i32*)
%62 = or i32 %61, %60
store volatile i32 %62, i32* inttoptr (i64 3758178384 to i32*)
store i32 1, i32* %3
br label %63
63: ; preds = %59, %10
%64 = load i32, i32* %3
ret i32 %64
}

LLVM IR (-O2):
define i32 @PWM_length(i32 %0, i32 %1) {
%3 = load volatile i32, i32* inttoptr (i64 3758178328 to i32*)
%4 = icmp ult i32 %3, %1
br i1 %4, label %43, label %5
5: ; preds = %2
%6 = and i32 %0, 1
%7 = icmp eq i32 %6, 0
br i1 %7, label %9, label %8
8: ; preds = %5
store volatile i32 %1, i32* inttoptr (i64 3758178332 to i32*)
br label %9
9: ; preds = %8, %5
%10 = phi i32 [ 2, %8 ], [ 0, %5 ]
%11 = and i32 %0, 2
%12 = icmp eq i32 %11, 0
br i1 %12, label %15, label %13
13: ; preds = %9
store volatile i32 %1, i32* inttoptr (i64 3758178336 to i32*)
%14 = or i32 %10, 4
br label %15
15: ; preds = %13, %9
%16 = phi i32 [ %14, %13 ], [ %10, %9 ]
%17 = and i32 %0, 4
%18 = icmp eq i32 %17, 0
br i1 %18, label %21, label %19
19: ; preds = %15
store volatile i32 %1, i32* inttoptr (i64 3758178340 to i32*)
%20 = or i32 %16, 8
br label %21
21: ; preds = %19, %15
%22 = phi i32 [ %20, %19 ], [ %16, %15 ]
%23 = and i32 %0, 8
%24 = icmp eq i32 %23, 0
br i1 %24, label %27, label %25
25: ; preds = %21
store volatile i32 %1, i32* inttoptr (i64 3758178368 to i32*)
%26 = or i32 %22, 16
br label %27
27: ; preds = %25, %21
%28 = phi i32 [ %26, %25 ], [ %22, %21 ]
%29 = and i32 %0, 16
%30 = icmp eq i32 %29, 0
br i1 %30, label %33, label %31
31: ; preds = %27
store volatile i32 %1, i32* inttoptr (i64 3758178372 to i32*)
%32 = or i32 %28, 32
br label %33
33: ; preds = %31, %27
%34 = phi i32 [ %32, %31 ], [ %28, %27 ]
%35 = and i32 %0, 32
%36 = icmp eq i32 %35, 0
br i1 %36, label %39, label %37
37: ; preds = %33
store volatile i32 %1, i32* inttoptr (i64 3758178376 to i32*)
%38 = or i32 %34, 64
br label %39
39: ; preds = %37, %33
%40 = phi i32 [ %38, %37 ], [ %34, %33 ]
%41 = load volatile i32, i32* inttoptr (i64 3758178384 to i32*)
%42 = or i32 %41, %40
store volatile i32 %42, i32* inttoptr (i64 3758178384 to i32*)
br label %43
43: ; preds = %2, %39
%44 = phi i32 [ 1, %39 ], [ -1, %2 ]
ret i32 %44
}