xunge/DecIR huggingface dataset:
void decimal(int n, int masive[8]) {
  int broqch = 7;
  while (n != 0) {
    masive[broqch] = n % 2;
    n = n / 2;
    broqch--;
  }
}


x86 assembly (clang, -O0):
<decimal>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x7,-0x14(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     114e <decimal+0x4e>
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
jmp    1112 <decimal+0x12>
pop    %rbp
ret

x86 assembly (clang, -O2):
<decimal>:
test   %edi,%edi
je     1130 <decimal+0x30>
add    $0x1c,%rsi
mov    %edi,%eax
nopw   0x0(%rax,%rax,1)
shr    $0x1f,%eax
add    %edi,%eax
mov    %eax,%ecx
and    $0xfffffffe,%ecx
mov    %edi,%edx
sub    %ecx,%edx
mov    %edx,(%rsi)
sar    %eax
add    $0x1,%edi
add    $0xfffffffffffffffc,%rsi
cmp    $0x2,%edi
mov    %eax,%edi
ja     1110 <decimal+0x10>
ret

LLVM IR (-O0):
define void @decimal(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
store i32 7, i32* %5
br label %6
6: ; preds = %9, %2
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %20
9: ; preds = %6
%10 = load i32, i32* %3
%11 = srem i32 %10, 2
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
store i32 %11, i32* %15
%16 = load i32, i32* %3
%17 = sdiv i32 %16, 2
store i32 %17, i32* %3
%18 = load i32, i32* %5
%19 = add nsw i32 %18, -1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @decimal(i32 %0, i32* nocapture writeonly %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %13, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %10, %4 ], [ 7, %2 ]
%6 = phi i32 [ %9, %4 ], [ %0, %2 ]
%7 = srem i32 %6, 2
%8 = getelementptr inbounds i32, i32* %1, i64 %5
store i32 %7, i32* %8
%9 = sdiv i32 %6, 2
%10 = add i64 %5, -1
%11 = add i32 %6, 1
%12 = icmp ult i32 %11, 3
br i1 %12, label %13, label %4
13: ; preds = %4, %2
ret void
}
/* Variables and functions */
float __nv_scalbnf(float, int);
float scalbnf(float __a, int __b) { return __nv_scalbnf(__a, __b); }


x86 assembly (clang, -O0):
<scalbnf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
mov    -0x8(%rbp),%edi
call   1030 <__nv_scalbnf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scalbnf>:
jmp    1030 <__nv_scalbnf@plt>

LLVM IR (-O0):
define float @scalbnf(float %0, i32 %1) {
%3 = alloca float
%4 = alloca i32
store float %0, float* %3
store i32 %1, i32* %4
%5 = load float, float* %3
%6 = load i32, i32* %4
%7 = call float @__nv_scalbnf(float %5, i32 %6)
ret float %7
}

LLVM IR (-O2):
define float @scalbnf(float %0, i32 %1) {
%3 = tail call float @__nv_scalbnf(float %0, i32 %1)
ret float %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, unsigned char);
void fprint_xrl_atRi(FILE *stream, unsigned char i) {
  fprintf(stream, "XRL   A, @R%X                    ", i);
}


x86 assembly (clang, -O0):
<fprint_xrl_atRi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed3(%rip),%rsi
movzbl -0x9(%rbp),%edx
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fprint_xrl_atRi>:
mov    %esi,%edx
lea    0xee7(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"XRL A, @R%X \00"
define void @fprint_xrl_atRi(i32* %0, i8 zeroext %1) {
%3 = alloca i32*
%4 = alloca i8
store i32* %0, i32** %3
store i8 %1, i8* %4
%5 = load i32*, i32** %3
%6 = load i8, i8* %4
%7 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8 zeroext %6)
ret void
}

LLVM IR (-O2):
@.str = [34 x i8] c"XRL A, @R%X \00"
define void @fprint_xrl_atRi(i32* nocapture %0, i8 zeroext %1) {
%3 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8 zeroext %1)
ret void
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ memcpy(void *, void const *, size_t);
void *memdup(const void *addr, size_t n) {
  void *cp = malloc(n);
  memcpy(cp, addr, n);
  return cp;
}


x86 assembly (clang, -O0):
<memdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memdup>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1030 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @memdup(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = call i8* @malloc(i64 %6)
store i8* %7, i8** %5
%8 = load i8*, i8** %5
%9 = load i8*, i8** %3
%10 = load i64, i64* %4
%11 = call i32 @memcpy(i8* %8, i8* %9, i64 %10)
%12 = load i8*, i8** %5
ret i8* %12
}

LLVM IR (-O2):
define i8* @memdup(i8* %0, i64 %1) {
%3 = tail call i8* @malloc(i64 %1)
%4 = tail call i32 @memcpy(i8* %3, i8* %0, i64 %1)
ret i8* %3
}
int battery_dummy_max_level(struct battery *b) { return 0; }


x86 assembly (clang, -O0):
<battery_dummy_max_level>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<battery_dummy_max_level>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.battery = type opaque
define i32 @battery_dummy_max_level(%struct.battery* %0) {
%2 = alloca %struct.battery*
store %struct.battery* %0, %struct.battery** %2
ret i32 0
}

LLVM IR (-O2):
%struct.battery = type opaque
define i32 @battery_dummy_max_level(%struct.battery* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
struct uart {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ gpio_uart1();
int /*<<< orphan*/ gpio_uart2();
int /*<<< orphan*/ gpio_uart3();
int /*<<< orphan*/ uart_init(struct uart *, int);
void serial_init(void) {
  gpio_uart1();
  uart_init((struct uart *)0x40013800, 115200);
  gpio_uart2();
  uart_init((struct uart *)0x40004400, 9600);
  gpio_uart3();
  uart_init((struct uart *)0x40004800, 9600);
}


x86 assembly (clang, -O0):
<serial_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <gpio_uart1@plt>
mov    $0x40013800,%edi
mov    $0x1c200,%esi
call   1030 <uart_init@plt>
mov    $0x0,%al
call   1040 <gpio_uart2@plt>
mov    $0x40004400,%edi
mov    $0x2580,%esi
call   1030 <uart_init@plt>
mov    $0x0,%al
call   1060 <gpio_uart3@plt>
mov    $0x40004800,%edi
mov    $0x2580,%esi
call   1030 <uart_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_init>:
push   %rax
xor    %eax,%eax
call   1050 <gpio_uart1@plt>
mov    $0x40013800,%edi
mov    $0x1c200,%esi
call   1030 <uart_init@plt>
xor    %eax,%eax
call   1040 <gpio_uart2@plt>
mov    $0x40004400,%edi
mov    $0x2580,%esi
call   1030 <uart_init@plt>
xor    %eax,%eax
call   1060 <gpio_uart3@plt>
mov    $0x40004800,%edi
mov    $0x2580,%esi
pop    %rax
jmp    1030 <uart_init@plt>

LLVM IR (-O0):
%struct.uart = type { i32 }
define void @serial_init() {
%1 = call i32 (...) @gpio_uart1()
%2 = call i32 @uart_init(%struct.uart* inttoptr (i64 1073821696 to %struct.uart*), i32 115200)
%3 = call i32 (...) @gpio_uart2()
%4 = call i32 @uart_init(%struct.uart* inttoptr (i64 1073759232 to %struct.uart*), i32 9600)
%5 = call i32 (...) @gpio_uart3()
%6 = call i32 @uart_init(%struct.uart* inttoptr (i64 1073760256 to %struct.uart*), i32 9600)
ret void
}

LLVM IR (-O2):
%struct.uart = type { i32 }
define void @serial_init() {
%1 = tail call i32 (...) @gpio_uart1()
%2 = tail call i32 @uart_init(%struct.uart* inttoptr (i64 1073821696 to %struct.uart*), i32 115200)
%3 = tail call i32 (...) @gpio_uart2()
%4 = tail call i32 @uart_init(%struct.uart* inttoptr (i64 1073759232 to %struct.uart*), i32 9600)
%5 = tail call i32 (...) @gpio_uart3()
%6 = tail call i32 @uart_init(%struct.uart* inttoptr (i64 1073760256 to %struct.uart*), i32 9600)
ret void
}
/* Variables and functions */
scalar_t__ isascii(int);
scalar_t__ isdigit(int);
int Cisdigit(int c) { return isascii(c) && isdigit(c); }


x86 assembly (clang, -O0):
<Cisdigit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <isascii@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
je     1157 <Cisdigit+0x37>
mov    -0x4(%rbp),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cisdigit>:
push   %rbx
mov    %edi,%ebx
call   1040 <isascii@plt>
test   %rax,%rax
je     1141 <Cisdigit+0x21>
mov    %ebx,%edi
call   1030 <isdigit@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @Cisdigit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @isascii(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i64 @isdigit(i32 %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @Cisdigit(i32 %0) {
%2 = tail call i64 @isascii(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = tail call i64 @isdigit(i32 %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ putChar(char);
char *timeInt();
void runTime() {
  printf(timeInt());
  putChar('\n');
}


x86 assembly (clang, -O0):
<runTime>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <timeInt@plt>
mov    %rax,%rdi
call   1030 <printf@plt>
mov    $0xa,%edi
call   1050 <putChar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<runTime>:
push   %rax
xor    %eax,%eax
call   1040 <timeInt@plt>
mov    %rax,%rdi
call   1030 <printf@plt>
mov    $0xa,%edi
pop    %rax
jmp    1050 <putChar@plt>

LLVM IR (-O0):
define void @runTime() {
%1 = call i8* (...) @timeInt()
%2 = call i32 @printf(i8* %1)
%3 = call i32 @putChar(i8 signext 10)
ret void
}

LLVM IR (-O2):
define void @runTime() {
%1 = tail call i8* (...) @timeInt()
%2 = tail call i32 @printf(i8* dereferenceable(1) %1)
%3 = tail call i32 @putChar(i8 signext 10)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ Interpolate_2(int /*<<< orphan*/, int, int /*<<< orphan*/,
                                 int, int);
uint32_t Interp3(uint32_t c1, uint32_t c2) {
  return Interpolate_2(c1, 7, c2, 1, 3);
}


x86 assembly (clang, -O0):
<Interp3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    $0x7,%esi
mov    $0x1,%ecx
mov    $0x3,%r8d
call   1030 <Interpolate_2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Interp3>:
mov    %esi,%edx
mov    $0x7,%esi
mov    $0x1,%ecx
mov    $0x3,%r8d
jmp    1030 <Interpolate_2@plt>

LLVM IR (-O0):
define i32 @Interp3(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @Interpolate_2(i32 %5, i32 7, i32 %6, i32 1, i32 3)
ret i32 %7
}

LLVM IR (-O2):
define i32 @Interp3(i32 %0, i32 %1) {
%3 = tail call i32 @Interpolate_2(i32 %0, i32 7, i32 %1, i32 1, i32 3)
ret i32 %3
}
int iswildcard(char c) {
  char *wildcards = "*?";
  while (*wildcards) {
    if (c == *wildcards)
      return 1;
    wildcards++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<iswildcard>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
lea    0xeef(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1152 <iswildcard+0x52>
movsbl -0x5(%rbp),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jne    1141 <iswildcard+0x41>
movl   $0x1,-0x4(%rbp)
jmp    1159 <iswildcard+0x59>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1115 <iswildcard+0x15>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iswildcard>:
cmp    $0x2a,%dil
sete   %al
cmp    $0x3f,%dil
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"*?\00"
define i32 @iswildcard(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
%4 = alloca i8*
store i8 %0, i8* %3
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %4
br label %5
5: ; preds = %17, %1
%6 = load i8*, i8** %4
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %20
9: ; preds = %5
%10 = load i8, i8* %3
%11 = sext i8 %10 to i32
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = icmp eq i32 %11, %14
br i1 %15, label %16, label %17
16: ; preds = %9
store i32 1, i32* %2
br label %21
17: ; preds = %9
%18 = load i8*, i8** %4
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %4
br label %5
20: ; preds = %5
store i32 0, i32* %2
br label %21
21: ; preds = %20, %16
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @iswildcard(i8 signext %0) {
%2 = icmp eq i8 %0, 42
%3 = icmp eq i8 %0, 63
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t aes_getwritecount() {
  return *((volatile uint32_t *)0x10009000) & 0x1F;
}


x86 assembly (clang, -O0):
<aes_getwritecount>:
push   %rbp
mov    %rsp,%rbp
mov    $0x10009000,%eax
mov    (%rax),%eax
and    $0x1f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aes_getwritecount>:
mov    0x10009000,%eax
and    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @aes_getwritecount() {
%1 = load volatile i32, i32* inttoptr (i64 268472320 to i32*)
%2 = and i32 %1, 31
ret i32 %2
}

LLVM IR (-O2):
define i32 @aes_getwritecount() {
%1 = load volatile i32, i32* inttoptr (i64 268472320 to i32*)
%2 = and i32 %1, 31
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ vfprintf(int /*<<< orphan*/, char const *,
                            int /*<<< orphan*/);
void jasm_log_ap(const char *fmt, va_list ap) { vfprintf(stderr, fmt, ap); }


x86 assembly (clang, -O0):
<jasm_log_ap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <vfprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jasm_log_ap>:
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2ec4(%rip),%rax
mov    (%rax),%edi
jmp    1030 <vfprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
define void @jasm_log_ap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @vfprintf(i32 %5, i8* %6, i32 %7)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
define void @jasm_log_ap(i8* %0, i32 %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @vfprintf(i32 %3, i8* %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("hello "
         "3"
         ":%d\n",
         3);
  ;
  int x = 10;
  printf("hello "
         "x"
         ":%d\n",
         x);
  ;
  int y = 15;
  printf("hello "
         "x+y"
         ":%d\n",
         x + y);
  ;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x3,%esi
call   1030 <printf@plt>
movl   $0xa,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
movl   $0xf,-0xc(%rbp)
mov    -0x8(%rbp),%esi
add    -0xc(%rbp),%esi
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x3,%esi
call   1030 <printf@plt>
lea    0xee3(%rip),%rdi
mov    $0xa,%esi
call   1030 <printf@plt>
lea    0xede(%rip),%rdi
mov    $0x19,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"hello 3:%d\0A\00"
@.str.1 = [12 x i8] c"hello x:%d\0A\00"
@.str.2 = [14 x i8] c"hello x+y:%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 3)
store i32 10, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 %5)
store i32 15, i32* %3
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = add nsw i32 %7, %8
%10 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.2, i64 0, i64 0), i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"hello 3:%d\0A\00"
@.str.1 = [12 x i8] c"hello x:%d\0A\00"
@.str.2 = [14 x i8] c"hello x+y:%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 3)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 10)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.2, i64 0, i64 0), i32 25)
ret i32 0
}
void ECDSA_sign(void) {}


x86 assembly (clang, -O0):
<ECDSA_sign>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ECDSA_sign>:
ret

LLVM IR (-O0):
define void @ECDSA_sign() {
ret void
}

LLVM IR (-O2):
define void @ECDSA_sign() {
ret void
}
/* Variables and functions */
int nrf_write_register(int, int, char *);
int nrf_set_address_width(int width, char *retstatus) {
  if ((width < 3) || (width > 5))
    return -1;
  return nrf_write_register(0x03, (width & 0x03), retstatus);
}


x86 assembly (clang, -O0):
<nrf_set_address_width>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x3,-0x8(%rbp)
jl     1133 <nrf_set_address_width+0x23>
cmpl   $0x5,-0x8(%rbp)
jle    113f <nrf_set_address_width+0x2f>
movl   $0xffffffff,-0x4(%rbp)
jmp    1156 <nrf_set_address_width+0x46>
mov    -0x8(%rbp),%esi
and    $0x3,%esi
mov    -0x10(%rbp),%rdx
mov    $0x3,%edi
call   1030 <nrf_write_register@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf_set_address_width>:
mov    %rsi,%rdx
mov    %edi,%esi
lea    -0x6(%rsi),%eax
cmp    $0xfffffffd,%eax
jae    1123 <nrf_set_address_width+0x13>
mov    $0xffffffff,%eax
ret
and    $0x3,%esi
mov    $0x3,%edi
jmp    1030 <nrf_write_register@plt>

LLVM IR (-O0):
define i32 @nrf_set_address_width(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 3
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i32, i32* %4
%10 = icmp sgt i32 %9, 5
br i1 %10, label %11, label %12
11: ; preds = %8, %2
store i32 -1, i32* %3
br label %17
12: ; preds = %8
%13 = load i32, i32* %4
%14 = and i32 %13, 3
%15 = load i8*, i8** %5
%16 = call i32 @nrf_write_register(i32 3, i32 %14, i8* %15)
store i32 %16, i32* %3
br label %17
17: ; preds = %12, %11
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @nrf_set_address_width(i32 %0, i8* %1) {
%3 = add i32 %0, -6
%4 = icmp ult i32 %3, -3
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = and i32 %0, 3
%7 = tail call i32 @nrf_write_register(i32 3, i32 %6, i8* %1)
br label %8
8: ; preds = %2, %5
%9 = phi i32 [ %7, %5 ], [ -1, %2 ]
ret i32 %9
}
unsigned short _be_16(unsigned short s) {
  unsigned short ret = s;
  ret = (s >> 8) & 0x00ffU;
  ret += (s << 8) & 0xff00U;
  return ret;
}


x86 assembly (clang, -O0):
<_be_16>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%ax
mov    %ax,-0x4(%rbp)
movzwl -0x2(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    %ax,-0x4(%rbp)
movzwl -0x2(%rbp),%ecx
shl    $0x8,%ecx
and    $0xff00,%ecx
movzwl -0x4(%rbp),%eax
add    %ecx,%eax
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_be_16>:
mov    %edi,%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define zeroext i16 @_be_16(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %2
%4 = load i16, i16* %2
store i16 %4, i16* %3
%5 = load i16, i16* %2
%6 = zext i16 %5 to i32
%7 = ashr i32 %6, 8
%8 = and i32 %7, 255
%9 = trunc i32 %8 to i16
store i16 %9, i16* %3
%10 = load i16, i16* %2
%11 = zext i16 %10 to i32
%12 = shl i32 %11, 8
%13 = and i32 %12, 65280
%14 = load i16, i16* %3
%15 = zext i16 %14 to i32
%16 = add i32 %15, %13
%17 = trunc i32 %16 to i16
store i16 %17, i16* %3
%18 = load i16, i16* %3
ret i16 %18
}

LLVM IR (-O2):
define zeroext i16 @_be_16(i16 zeroext %0) {
%2 = tail call i16 @llvm.bswap.i16(i16 %0)
ret i16 %2
}
/* Variables and functions */
int /*<<< orphan*/ err_sys(char *, char const *);
int unlink(char const *);
void Unlink(const char *pathname) {
  if (unlink(pathname) == -1)
    err_sys("unlink error for %s", pathname);
}


x86 assembly (clang, -O0):
<Unlink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <unlink@plt>
cmp    $0xffffffff,%eax
jne    114e <Unlink+0x2e>
mov    -0x8(%rbp),%rsi
lea    0xeb7(%rip),%rdi
call   1040 <err_sys@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Unlink>:
push   %rbx
mov    %rdi,%rbx
call   1030 <unlink@plt>
cmp    $0xffffffff,%eax
je     1130 <Unlink+0x10>
pop    %rbx
ret
lea    0xec9(%rip),%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <err_sys@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"unlink error for %s\00"
define void @Unlink(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @unlink(i8* %3)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i32 @err_sys(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %7)
br label %9
9: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@.str = [20 x i8] c"unlink error for %s\00"
define void @Unlink(i8* %0) {
%2 = tail call i32 @unlink(i8* %0)
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @err_sys(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %6
6: ; preds = %4, %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int creat(char const *, int /*<<< orphan*/);
__attribute__((__weak__, __always___)) int
softboundmpx_creat(const char *pathname, mode_t mode) {
  return creat(pathname, mode);
}


x86 assembly (clang, -O0):
<softboundmpx_creat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <creat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_creat>:
jmp    1030 <creat@plt>

LLVM IR (-O0):
define weak i32 @softboundmpx_creat(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @creat(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define weak i32 @softboundmpx_creat(i8* %0, i32 %1) {
%3 = tail call i32 @creat(i8* %0, i32 %1)
ret i32 %3
}
void logSuiteStarted() {}


x86 assembly (clang, -O0):
<logSuiteStarted>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<logSuiteStarted>:
ret

LLVM IR (-O0):
define void @logSuiteStarted() {
ret void
}

LLVM IR (-O2):
define void @logSuiteStarted() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ PWM1_3_DriverIRQHandler();
__attribute__((weak)) void PWM1_3_IRQHandler(void) {
  PWM1_3_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<PWM1_3_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <PWM1_3_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWM1_3_IRQHandler>:
xor    %eax,%eax
jmp    1030 <PWM1_3_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @PWM1_3_IRQHandler() {
%1 = call i32 (...) @PWM1_3_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @PWM1_3_IRQHandler() {
%1 = tail call i32 (...) @PWM1_3_DriverIRQHandler()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ play();
int /*<<< orphan*/ read();
int main() {
  read();
  play();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <read@plt>
mov    $0x0,%al
call   1040 <play@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <read@plt>
xor    %eax,%eax
call   1040 <play@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @read()
%3 = call i32 (...) @play()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @read()
%2 = tail call i32 (...) @play()
ret i32 0
}
void alarmer(int s) {}


x86 assembly (clang, -O0):
<alarmer>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<alarmer>:
ret

LLVM IR (-O0):
define void @alarmer(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @alarmer(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint8_t;

/* Variables and functions */
uint8_t hsp_subevent_microphone_gain_changed_get_gain(const uint8_t *event) {
  return event[3];
}


x86 assembly (clang, -O0):
<hsp_subevent_microphone_gain_changed_get_gain>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hsp_subevent_microphone_gain_changed_get_gain>:
mov    0xc(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @hsp_subevent_microphone_gain_changed_get_gain(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 3
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @hsp_subevent_microphone_gain_changed_get_gain(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 3
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
double GTIFStrtod(char const *, int /*<<< orphan*/);
double atof(const char *nptr) { return GTIFStrtod(nptr, 0); }


x86 assembly (clang, -O0):
<atof>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <GTIFStrtod@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atof>:
xor    %esi,%esi
jmp    1030 <GTIFStrtod@plt>

LLVM IR (-O0):
define double @atof(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call double @GTIFStrtod(i8* %3, i32 0)
ret double %4
}

LLVM IR (-O2):
define double @atof(i8* %0) {
%2 = tail call double @GTIFStrtod(i8* %0, i32 0)
ret double %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *);
void exitp(uint8_t return_code) {
  printf("%s", "Exit.\n");
  exit(return_code);
}


x86 assembly (clang, -O0):
<exitp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
lea    0xeca(%rip),%rsi
call   1030 <printf@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<exitp>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
lea    0xed2(%rip),%rsi
call   1030 <printf@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [7 x i8] c"Exit.\0A\00"
define void @exitp(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%4 = load i32, i32* %2
%5 = call i32 @exit(i32 %4)
unreachable
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@.str.1 = [7 x i8] c"Exit.\0A\00"
define void @exitp(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @exit(i32 %0)
unreachable
}
long double fabsl(long double x) {
  long double r;
  __asm__ __volatile__("fabs" : "=t"(r) : "0"(x));
  return r;
}


x86 assembly (clang, -O0):
<fabsl>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fabs
fstpt  -0x20(%rbp)
fldt   -0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fabsl>:
fldt   0x8(%rsp)
fabs
ret

LLVM IR (-O0):
define x86_fp80 @fabsl(x86_fp80 %0) {
%2 = alloca x86_fp80
%3 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%4 = load x86_fp80, x86_fp80* %2
%5 = call x86_fp80 asm sideeffect "fabs", "={st},0,~{dirflag},~{fpsr},~{flags}"(x86_fp80 %4)
store x86_fp80 %5, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %3
ret x86_fp80 %6
}

LLVM IR (-O2):
define x86_fp80 @fabsl(x86_fp80 %0) {
%2 = tail call x86_fp80 asm sideeffect "fabs", "={st},0,~{dirflag},~{fpsr},~{flags}"(x86_fp80 %0)
ret x86_fp80 %2
}
unsigned int string_hash(const void *val) {
  unsigned int hash = 5381;
  const char *str = (const char *)val;
  int c;
  while ((c = *str++))
    hash = ((hash << 5) + hash) + c;
  return hash;
}


x86 assembly (clang, -O0):
<string_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x1505,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x1c(%rbp)
cmp    $0x0,%eax
je     1149 <string_hash+0x49>
mov    -0xc(%rbp),%eax
shl    $0x5,%eax
add    -0xc(%rbp),%eax
add    -0x1c(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1117 <string_hash+0x17>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1138 <string_hash+0x38>
add    $0x1,%rdi
mov    $0x1505,%edx
mov    %edx,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movsbl %cl,%ecx
shl    $0x5,%eax
add    %edx,%eax
add    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
mov    %eax,%edx
test   %cl,%cl
jne    1120 <string_hash+0x20>
ret
mov    $0x1505,%eax
ret

LLVM IR (-O0):
define i32 @string_hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %2
store i32 5381, i32* %3
%6 = load i8*, i8** %2
store i8* %6, i8** %4
br label %7
7: ; preds = %13, %1
%8 = load i8*, i8** %4
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %4
%10 = load i8, i8* %8
%11 = sext i8 %10 to i32
store i32 %11, i32* %5
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %20
13: ; preds = %7
%14 = load i32, i32* %3
%15 = shl i32 %14, 5
%16 = load i32, i32* %3
%17 = add i32 %15, %16
%18 = load i32, i32* %5
%19 = add i32 %17, %18
store i32 %19, i32* %3
br label %7
20: ; preds = %7
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @string_hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 5381, %1 ]
%7 = phi i8* [ %9, %4 ], [ %0, %1 ]
%8 = sext i8 %5 to i32
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = mul i32 %6, 33
%11 = add i32 %10, %8
%12 = load i8, i8* %9
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i32 [ 5381, %1 ], [ %11, %4 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ read_word(char *);
int /*<<< orphan*/ skip(char);
int read_charword() {
  char word[47 + 1];
  skip(' ');
  if (!read_word(word)) {
    return 0;
  } else {
    return word[0];
  }
}


x86 assembly (clang, -O0):
<read_charword>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    $0x20,%edi
call   1030 <skip@plt>
lea    -0x40(%rbp),%rdi
call   1040 <read_word@plt>
cmp    $0x0,%eax
jne    1150 <read_charword+0x30>
movl   $0x0,-0x4(%rbp)
jmp    1157 <read_charword+0x37>
movsbl -0x40(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_charword>:
sub    $0x38,%rsp
mov    $0x20,%edi
call   1030 <skip@plt>
mov    %rsp,%rdi
call   1040 <read_word@plt>
test   %eax,%eax
movsbl (%rsp),%ecx
cmovne %ecx,%eax
add    $0x38,%rsp
ret

LLVM IR (-O0):
define i32 @read_charword() {
%1 = alloca i32
%2 = alloca [48 x i8]
%3 = call i32 @skip(i8 signext 32)
%4 = getelementptr inbounds [48 x i8], [48 x i8]* %2, i64 0, i64 0
%5 = call i32 @read_word(i8* %4)
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %0
store i32 0, i32* %1
br label %12
8: ; preds = %0
%9 = getelementptr inbounds [48 x i8], [48 x i8]* %2, i64 0, i64 0
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
store i32 %11, i32* %1
br label %12
12: ; preds = %8, %7
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @read_charword() {
%1 = alloca [48 x i8]
%2 = getelementptr inbounds [48 x i8], [48 x i8]* %1, i64 0, i64 0
%3 = tail call i32 @skip(i8 signext 32)
%4 = call i32 @read_word(i8* %2)
%5 = icmp eq i32 %4, 0
%6 = load i8, i8* %2
%7 = sext i8 %6 to i32
%8 = select i1 %5, i32 0, i32 %7
ret i32 %8
}
float convert_adc_rough_pressure(float adc_volts) { return adc_volts * 1000.; }


x86 assembly (clang, -O0):
<convert_adc_rough_pressure>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xee6(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<convert_adc_rough_pressure>:
mulss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @convert_adc_rough_pressure(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fmul double %4, 1.000000e+03
%6 = fptrunc double %5 to float
ret float %6
}

LLVM IR (-O2):
define float @convert_adc_rough_pressure(float %0) {
%2 = fmul float %0, 1.000000e+03
ret float %2
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ diminuto_ipc_stream_read_generic(int, void *, size_t,
                                                    size_t);
ssize_t diminuto_ipcl_stream_read_generic(int fd, void *buffer, size_t min,
                                          size_t max) {
  return diminuto_ipc_stream_read_generic(fd, buffer, min, max);
}


x86 assembly (clang, -O0):
<diminuto_ipcl_stream_read_generic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <diminuto_ipc_stream_read_generic@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<diminuto_ipcl_stream_read_generic>:
jmp    1030 <diminuto_ipc_stream_read_generic@plt>

LLVM IR (-O0):
define i32 @diminuto_ipcl_stream_read_generic(i32 %0, i8* %1, i64 %2, i64 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i64
store i32 %0, i32* %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %7
%12 = load i64, i64* %8
%13 = call i32 @diminuto_ipc_stream_read_generic(i32 %9, i8* %10, i64 %11, i64 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @diminuto_ipcl_stream_read_generic(i32 %0, i8* %1, i64 %2, i64 %3) {
%5 = tail call i32 @diminuto_ipc_stream_read_generic(i32 %0, i8* %1, i64 %2, i64 %3)
ret i32 %5
}
unsigned int IEEE_exponent_to_EPFP_exponent(unsigned int e) {
  return e + (128 - 1023);
}


x86 assembly (clang, -O0):
<IEEE_exponent_to_EPFP_exponent>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xfffffc81,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IEEE_exponent_to_EPFP_exponent>:
lea    -0x37f(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @IEEE_exponent_to_EPFP_exponent(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, -895
ret i32 %4
}

LLVM IR (-O2):
define i32 @IEEE_exponent_to_EPFP_exponent(i32 %0) {
%2 = add i32 %0, -895
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ AL_writeRegister(int, int /*<<< orphan*/);
void fmResetCard(void) {
  int number;
  for (number = 0X01; number <= 0XF5; ++number) {
    AL_writeRegister(number, 0);
  }
}


x86 assembly (clang, -O0):
<fmResetCard>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
cmpl   $0xf5,-0x4(%rbp)
jg     1144 <fmResetCard+0x34>
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1030 <AL_writeRegister@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <fmResetCard+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmResetCard>:
push   %rbx
mov    $0x1,%ebx
cs nopw 0x0(%rax,%rax,1)
mov    %ebx,%edi
xor    %esi,%esi
call   1030 <AL_writeRegister@plt>
add    $0x1,%ebx
cmp    $0xf6,%ebx
jne    1120 <fmResetCard+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @fmResetCard() {
%1 = alloca i32
store i32 1, i32* %1
br label %2
2: ; preds = %8, %0
%3 = load i32, i32* %1
%4 = icmp sle i32 %3, 245
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = load i32, i32* %1
%7 = call i32 @AL_writeRegister(i32 %6, i32 0)
br label %8
8: ; preds = %5
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %1
br label %2
11: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @fmResetCard() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 1, %0 ], [ %4, %1 ]
%3 = tail call i32 @AL_writeRegister(i32 %2, i32 0)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 246
br i1 %5, label %6, label %1
6: ; preds = %1
ret void
}
long next_label(struct compile_state *state) {
  static long label_counter = 1000;
  return ++label_counter;
}


x86 assembly (clang, -O0):
<next_label>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2f11(%rip),%rax
add    $0x1,%rax
mov    %rax,0x2f06(%rip)
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_label>:
mov    0x2f19(%rip),%rax
add    $0x1,%rax
mov    %rax,0x2f0e(%rip)
ret

LLVM IR (-O0):
%struct.compile_state = type opaque
@next_label.label_counter = internal global i64 1000
define i64 @next_label(%struct.compile_state* %0) {
%2 = alloca %struct.compile_state*
store %struct.compile_state* %0, %struct.compile_state** %2
%3 = load i64, i64* @next_label.label_counter
%4 = add nsw i64 %3, 1
store i64 %4, i64* @next_label.label_counter
ret i64 %4
}

LLVM IR (-O2):
%struct.compile_state = type opaque
@next_label.label_counter = internal unnamed_addr global i64 1000
define i64 @next_label(%struct.compile_state* nocapture readnone %0) {
%2 = load i64, i64* @next_label.label_counter
%3 = add nsw i64 %2, 1
store i64 %3, i64* @next_label.label_counter
ret i64 %3
}
int getDistance(int x, int y) {
  if (x < 0)
    x = -x;
  if (y < 0)
    y = -y;
  if (x > y) {
    return x + (y >> 1);
  } else {
    return y + (x >> 1);
  }
}


x86 assembly (clang, -O0):
<getDistance>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    111c <getDistance+0x1c>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    112e <getDistance+0x2e>
xor    %eax,%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    114d <getDistance+0x4d>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    $0x1,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    115b <getDistance+0x5b>
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    $0x1,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getDistance>:
mov    %edi,%ecx
neg    %ecx
cmovs  %edi,%ecx
mov    %esi,%edx
neg    %edx
cmovs  %esi,%edx
mov    %edx,%esi
shr    %esi
add    %ecx,%esi
mov    %ecx,%eax
shr    %eax
add    %edx,%eax
cmp    %edx,%ecx
cmova  %esi,%eax
ret

LLVM IR (-O0):
define i32 @getDistance(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* %4
%10 = sub nsw i32 0, %9
store i32 %10, i32* %4
br label %11
11: ; preds = %8, %2
%12 = load i32, i32* %5
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i32, i32* %5
%16 = sub nsw i32 0, %15
store i32 %16, i32* %5
br label %17
17: ; preds = %14, %11
%18 = load i32, i32* %4
%19 = load i32, i32* %5
%20 = icmp sgt i32 %18, %19
br i1 %20, label %21, label %26
21: ; preds = %17
%22 = load i32, i32* %4
%23 = load i32, i32* %5
%24 = ashr i32 %23, 1
%25 = add nsw i32 %22, %24
store i32 %25, i32* %3
br label %31
26: ; preds = %17
%27 = load i32, i32* %5
%28 = load i32, i32* %4
%29 = ashr i32 %28, 1
%30 = add nsw i32 %27, %29
store i32 %30, i32* %3
br label %31
31: ; preds = %26, %21
%32 = load i32, i32* %3
ret i32 %32
}

LLVM IR (-O2):
define i32 @getDistance(i32 %0, i32 %1) {
%3 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
%4 = tail call i32 @llvm.abs.i32(i32 %1, i1 true)
%5 = icmp ugt i32 %3, %4
%6 = lshr i32 %4, 1
%7 = add nuw nsw i32 %6, %3
%8 = lshr i32 %3, 1
%9 = add nuw nsw i32 %4, %8
%10 = select i1 %5, i32 %7, i32 %9
ret i32 %10
}
/* Variables and functions */
int strlen(char *);
char tolower(char);
char *lower_set(char *data) {
  int ctr = 0;
  int len = strlen(data);
  for (ctr = 0; ctr < len; ctr++)
    data[ctr] = tolower(data[ctr]);
  return (data);
}


x86 assembly (clang, -O0):
<lower_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    117e <lower_set+0x5e>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1040 <tolower@plt>
mov    %al,%dl
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1146 <lower_set+0x26>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lower_set>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r15
call   1030 <strlen@plt>
test   %eax,%eax
jle    1157 <lower_set+0x37>
mov    %eax,%r14d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
movsbl (%r15,%rbx,1),%edi
call   1040 <tolower@plt>
mov    %al,(%r15,%rbx,1)
add    $0x1,%rbx
cmp    %rbx,%r14
jne    1140 <lower_set+0x20>
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @lower_set(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
store i32 %6, i32* %4
store i32 0, i32* %3
br label %7
7: ; preds = %22, %1
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %25
11: ; preds = %7
%12 = load i8*, i8** %2
%13 = load i32, i32* %3
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = call signext i8 @tolower(i8 signext %16)
%18 = load i8*, i8** %2
%19 = load i32, i32* %3
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
store i8 %17, i8* %21
br label %22
22: ; preds = %11
%23 = load i32, i32* %3
%24 = add nsw i32 %23, 1
store i32 %24, i32* %3
br label %7
25: ; preds = %7
%26 = load i8*, i8** %2
ret i8* %26
}

LLVM IR (-O2):
define i8* @lower_set(i8* returned %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %13
4: ; preds = %1
%5 = zext i32 %2 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
%10 = tail call signext i8 @tolower(i8 signext %9)
store i8 %10, i8* %8
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %1
ret i8* %0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int exist_schedexec_pause_file(void) {
  FILE *fp;
  int i_retval;
  i_retval = 1;
  fp = fopen(".schedexec_pause", "rb");
  if (fp == NULL) {
    i_retval = 0;
  } else {
    fclose(fp);
  }
  return i_retval;
}


x86 assembly (clang, -O0):
<exist_schedexec_pause_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0xc(%rbp)
lea    0xeca(%rip),%rdi
lea    0xed4(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    115d <exist_schedexec_pause_file+0x3d>
movl   $0x0,-0xc(%rbp)
jmp    1166 <exist_schedexec_pause_file+0x46>
mov    -0x8(%rbp),%rdi
call   1030 <fclose@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exist_schedexec_pause_file>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xee2(%rip),%rsi
call   1040 <fopen@plt>
test   %rax,%rax
je     1148 <exist_schedexec_pause_file+0x28>
mov    %rax,%rdi
call   1030 <fclose@plt>
mov    $0x1,%eax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c".schedexec_pause\00"
@.str.1 = [3 x i8] c"rb\00"
define i32 @exist_schedexec_pause_file() {
%1 = alloca i32*
%2 = alloca i32
store i32 1, i32* %2
%3 = call i32* @fopen(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
store i32* %3, i32** %1
%4 = load i32*, i32** %1
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %7
6: ; preds = %0
store i32 0, i32* %2
br label %10
7: ; preds = %0
%8 = load i32*, i32** %1
%9 = call i32 @fclose(i32* %8)
br label %10
10: ; preds = %7, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@.str = [17 x i8] c".schedexec_pause\00"
@.str.1 = [3 x i8] c"rb\00"
define i32 @exist_schedexec_pause_file() {
%1 = tail call i32* @fopen(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%2 = icmp eq i32* %1, null
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @fclose(i32* %1)
br label %5
5: ; preds = %0, %3
%6 = phi i32 [ 1, %3 ], [ 0, %0 ]
ret i32 %6
}
float ff2(float par1, float par2, float par3, float par4) {
  return (par1 + par2) * (par3 + par4);
}


x86 assembly (clang, -O0):
<ff2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
addss  -0x8(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
addss  -0x10(%rbp),%xmm1
mulss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff2>:
addss  %xmm1,%xmm0
addss  %xmm3,%xmm2
mulss  %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @ff2(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %5
%10 = load float, float* %6
%11 = fadd float %9, %10
%12 = load float, float* %7
%13 = load float, float* %8
%14 = fadd float %12, %13
%15 = fmul float %11, %14
ret float %15
}

LLVM IR (-O2):
define float @ff2(float %0, float %1, float %2, float %3) {
%5 = fadd float %0, %1
%6 = fadd float %2, %3
%7 = fmul float %5, %6
ret float %7
}