xunge/DecIR huggingface dataset:
void cmd_quit(char *arg) {
  if (*arg) {
    status(1), printf("#quit: spurious argument?\n");
  } else
    exit_powwow();
}


x86 assembly (clang, -O0):
<cmd_quit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1168 <cmd_quit+0x38>
mov    $0x1,%edi
mov    $0x0,%al
call   1050 <status@plt>
lea    0xea4(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
jmp    116f <cmd_quit+0x3f>
mov    $0x0,%al
call   1030 <exit_powwow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_quit>:
push   %rax
cmpb   $0x0,(%rdi)
je     114f <cmd_quit+0x1f>
mov    $0x1,%edi
xor    %eax,%eax
call   1050 <status@plt>
lea    0xeb7(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <exit_powwow@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"#quit: spurious argument?\0A\00"
define void @cmd_quit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = icmp ne i8 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = call i32 (i32, ...) bitcast (i32 (...)* @status to i32 (i32, ...)*)(i32 1)
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
br label %11
9: ; preds = %1
%10 = call i32 (...) @exit_powwow()
br label %11
11: ; preds = %9, %6
ret void
}

LLVM IR (-O2):
@str = [26 x i8] c"#quit: spurious argument?\00"
define void @cmd_quit(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 (i32, ...) bitcast (i32 (...)* @status to i32 (i32, ...)*)(i32 1)
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str, i64 0, i64 0))
br label %9
7: ; preds = %1
%8 = tail call i32 (...) @exit_powwow()
br label %9
9: ; preds = %7, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ platform_outw(int /*<<< orphan*/, unsigned long);
void __outsw(unsigned long port, const void *src, unsigned long count) {
  const unsigned short *sp = src;
  while (count--)
    platform_outw(*sp++, port);
}


x86 assembly (clang, -O0):
<__outsw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x18(%rbp)
cmp    $0x0,%rax
je     1165 <__outsw+0x55>
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x2,%rcx
mov    %rcx,-0x20(%rbp)
movzwl (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <platform_outw@plt>
jmp    112c <__outsw+0x1c>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__outsw>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %rdx,%rdx
je     1146 <__outsw+0x36>
mov    %rdx,%r12
mov    %rsi,%r14
mov    %rdi,%r15
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
movzwl (%r14,%rbx,2),%edi
mov    %r15,%rsi
call   1030 <platform_outw@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <__outsw+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @__outsw(i64 %0, i8* %1, i64 %2) {
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i16*
store i64 %0, i64* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i8*, i8** %5
%9 = bitcast i8* %8 to i16*
store i16* %9, i16** %7
br label %10
10: ; preds = %14, %3
%11 = load i64, i64* %6
%12 = add i64 %11, -1
store i64 %12, i64* %6
%13 = icmp ne i64 %11, 0
br i1 %13, label %14, label %21
14: ; preds = %10
%15 = load i16*, i16** %7
%16 = getelementptr inbounds i16, i16* %15, i32 1
store i16* %16, i16** %7
%17 = load i16, i16* %15
%18 = zext i16 %17 to i32
%19 = load i64, i64* %4
%20 = call i32 @platform_outw(i32 %18, i64 %19)
br label %10
21: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @__outsw(i64 %0, i8* nocapture %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %16, label %5
5: ; preds = %3
%6 = bitcast i8* %1 to i16*
br label %7
7: ; preds = %5, %7
%8 = phi i16* [ %11, %7 ], [ %6, %5 ]
%9 = phi i64 [ %10, %7 ], [ %2, %5 ]
%10 = add i64 %9, -1
%11 = getelementptr inbounds i16, i16* %8, i64 1
%12 = load i16, i16* %8
%13 = zext i16 %12 to i32
%14 = tail call i32 @platform_outw(i32 %13, i64 %0)
%15 = icmp eq i64 %10, 0
br i1 %15, label %16, label %7
16: ; preds = %7, %3
ret void
}
/* Type definitions */
typedef int __le16;

/* Variables and functions */
int cpu_to_le16(int);
int ieee80211_has_morefrags(__le16 fc) {
  return (fc & cpu_to_le16(0x0400)) != 0;
}


x86 assembly (clang, -O0):
<ieee80211_has_morefrags>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x400,%edi
call   1030 <cpu_to_le16@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ieee80211_has_morefrags>:
push   %rbx
mov    %edi,%ebx
mov    $0x400,%edi
call   1030 <cpu_to_le16@plt>
xor    %ecx,%ecx
test   %ebx,%eax
setne  %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ieee80211_has_morefrags(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @cpu_to_le16(i32 1024)
%5 = and i32 %3, %4
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @ieee80211_has_morefrags(i32 %0) {
%2 = tail call i32 @cpu_to_le16(i32 1024)
%3 = and i32 %2, %0
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
scalar_t__ calloc(int, int);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
double *double_calloc(int n) {
  double *v;
  if ((v = (double *)calloc(n, sizeof(double))) == NULL) {
    fprintf(stderr, "FATAL ERROR: Out of memory\n");
    exit(1);
  }
  return v;
}


x86 assembly (clang, -O0):
<double_calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x8,%esi
call   1030 <calloc@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    1175 <double_calloc+0x45>
mov    0x2e83(%rip),%rax
mov    (%rax),%edi
lea    0xe9a(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<double_calloc>:
push   %rax
mov    $0x8,%esi
call   1030 <calloc@plt>
test   %rax,%rax
je     1142 <double_calloc+0x12>
pop    %rcx
ret
mov    0x2e97(%rip),%rax
mov    (%rax),%edi
lea    0xeae(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [28 x i8] c"FATAL ERROR: Out of memory\0A\00"
define double* @double_calloc(i32 %0) {
%2 = alloca i32
%3 = alloca double*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i64 @calloc(i32 %4, i32 8)
%6 = inttoptr i64 %5 to double*
store double* %6, double** %3
%7 = icmp eq double* %6, null
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
%11 = call i32 @exit(i32 1)
unreachable
12: ; preds = %1
%13 = load double*, double** %3
ret double* %13
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [28 x i8] c"FATAL ERROR: Out of memory\0A\00"
define double* @double_calloc(i32 %0) {
%2 = tail call i64 @calloc(i32 %0, i32 8)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 @exit(i32 1)
unreachable
8: ; preds = %1
%9 = inttoptr i64 %2 to double*
ret double* %9
}
int msm8994_cpu_ldo_config(unsigned int cpu) { return 0; }


x86 assembly (clang, -O0):
<msm8994_cpu_ldo_config>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<msm8994_cpu_ldo_config>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @msm8994_cpu_ldo_config(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @msm8994_cpu_ldo_config(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ cap1166_graph_bar(int);
int /*<<< orphan*/ cap1166_graph_bar_reverse(int);
void graph_bar(int d, int p) {
  int v;
  v = (255 * p) / 100;
  if (d == 0) {
    cap1166_graph_bar(v);
  } else {
    cap1166_graph_bar_reverse(v);
  }
}


x86 assembly (clang, -O0):
<graph_bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
imul   $0xff,-0x8(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1157 <graph_bar+0x37>
mov    -0xc(%rbp),%edi
call   1040 <cap1166_graph_bar@plt>
jmp    115f <graph_bar+0x3f>
mov    -0xc(%rbp),%edi
call   1030 <cap1166_graph_bar_reverse@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<graph_bar>:
mov    %edi,%eax
mov    %esi,%ecx
shl    $0x8,%ecx
sub    %esi,%ecx
movslq %ecx,%rcx
imul   $0x51eb851f,%rcx,%rdi
mov    %rdi,%rcx
shr    $0x3f,%rcx
sar    $0x25,%rdi
add    %ecx,%edi
test   %eax,%eax
je     1149 <graph_bar+0x29>
jmp    1030 <cap1166_graph_bar_reverse@plt>
jmp    1040 <cap1166_graph_bar@plt>

LLVM IR (-O0):
define void @graph_bar(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = mul nsw i32 255, %6
%8 = sdiv i32 %7, 100
store i32 %8, i32* %5
%9 = load i32, i32* %3
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = load i32, i32* %5
%13 = call i32 @cap1166_graph_bar(i32 %12)
br label %17
14: ; preds = %2
%15 = load i32, i32* %5
%16 = call i32 @cap1166_graph_bar_reverse(i32 %15)
br label %17
17: ; preds = %14, %11
ret void
}

LLVM IR (-O2):
define void @graph_bar(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, 255
%4 = sdiv i32 %3, 100
%5 = icmp eq i32 %0, 0
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @cap1166_graph_bar(i32 %4)
br label %10
8: ; preds = %2
%9 = tail call i32 @cap1166_graph_bar_reverse(i32 %4)
br label %10
10: ; preds = %8, %6
ret void
}
int __cmp_double(const void *__1, const void *__2) {
  if (*(long double *)__1 > *(long double *)__2)
    return 1;
  if (*(long double *)__1 < *(long double *)__2)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<__cmp_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
fldt   (%rax)
mov    -0x18(%rbp),%rax
fldt   (%rax)
fxch   %st(1)
fucomip %st(1),%st
fstp   %st(0)
jbe    1135 <__cmp_double+0x35>
jmp    1129 <__cmp_double+0x29>
movl   $0x1,-0x4(%rbp)
jmp    1163 <__cmp_double+0x63>
mov    -0x10(%rbp),%rax
fldt   (%rax)
mov    -0x18(%rbp),%rax
fldt   (%rax)
fucomip %st(1),%st
fstp   %st(0)
jbe    115c <__cmp_double+0x5c>
jmp    1150 <__cmp_double+0x50>
movl   $0xffffffff,-0x4(%rbp)
jmp    1163 <__cmp_double+0x63>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__cmp_double>:
fldt   (%rdi)
fldt   (%rsi)
xor    %ecx,%ecx
fucomi %st(1),%st
seta   %cl
neg    %ecx
fxch   %st(1)
fucomip %st(1),%st
fstp   %st(0)
mov    $0x1,%eax
cmovbe %ecx,%eax
ret

LLVM IR (-O0):
define i32 @__cmp_double(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to x86_fp80*
%8 = load x86_fp80, x86_fp80* %7
%9 = load i8*, i8** %5
%10 = bitcast i8* %9 to x86_fp80*
%11 = load x86_fp80, x86_fp80* %10
%12 = fcmp ogt x86_fp80 %8, %11
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 1, i32* %3
br label %24
14: ; preds = %2
%15 = load i8*, i8** %4
%16 = bitcast i8* %15 to x86_fp80*
%17 = load x86_fp80, x86_fp80* %16
%18 = load i8*, i8** %5
%19 = bitcast i8* %18 to x86_fp80*
%20 = load x86_fp80, x86_fp80* %19
%21 = fcmp olt x86_fp80 %17, %20
br i1 %21, label %22, label %23
22: ; preds = %14
store i32 -1, i32* %3
br label %24
23: ; preds = %14
store i32 0, i32* %3
br label %24
24: ; preds = %23, %22, %13
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @__cmp_double(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to x86_fp80*
%4 = load x86_fp80, x86_fp80* %3
%5 = bitcast i8* %1 to x86_fp80*
%6 = load x86_fp80, x86_fp80* %5
%7 = fcmp ogt x86_fp80 %4, %6
%8 = fcmp olt x86_fp80 %4, %6
%9 = sext i1 %8 to i32
%10 = select i1 %7, i32 1, i32 %9
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ X509_ALGOR;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
int /*<<< orphan*/ ASN1_item_free(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ X509_ALGOR_it;
void X509_ALGOR_free(X509_ALGOR *a) {
  ASN1_item_free((ASN1_VALUE *)a, &X509_ALGOR_it);
}


x86 assembly (clang, -O0):
<X509_ALGOR_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ec1(%rip),%rsi
call   1030 <ASN1_item_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_ALGOR_free>:
mov    0x2ed1(%rip),%rsi
jmp    1030 <ASN1_item_free@plt>

LLVM IR (-O0):
@X509_ALGOR_it = global i32 0
define void @X509_ALGOR_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @ASN1_item_free(i32* %3, i32* @X509_ALGOR_it)
ret void
}

LLVM IR (-O2):
@X509_ALGOR_it = global i32 0
define void @X509_ALGOR_free(i32* %0) {
%2 = tail call i32 @ASN1_item_free(i32* %0, i32* @X509_ALGOR_it)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char const *);
void WARNING(const char *msg) { printf(msg); }


x86 assembly (clang, -O0):
<WARNING>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WARNING>:
jmp    1030 <printf@plt>

LLVM IR (-O0):
define void @WARNING(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* %3)
ret void
}

LLVM IR (-O2):
define void @WARNING(i8* nocapture %0) {
%2 = tail call i32 @printf(i8* dereferenceable(1) %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ UARTWriteByte(char);
int strlen(char *);
void UARTWrite(char *s) {
  int len;
  int i;
  len = strlen(s);
  for (i = 0; i < len; i++) {
    UARTWriteByte(s[i]);
  }
}


x86 assembly (clang, -O0):
<UARTWrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    116a <UARTWrite+0x4a>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1040 <UARTWriteByte@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    113f <UARTWrite+0x1f>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTWrite>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
test   %eax,%eax
jle    1153 <UARTWrite+0x33>
mov    %eax,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
movsbl (%r14,%rbx,1),%edi
call   1040 <UARTWriteByte@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1140 <UARTWrite+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @UARTWrite(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
store i32 %6, i32* %3
store i32 0, i32* %4
br label %7
7: ; preds = %18, %1
%8 = load i32, i32* %4
%9 = load i32, i32* %3
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %21
11: ; preds = %7
%12 = load i8*, i8** %2
%13 = load i32, i32* %4
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = call i32 @UARTWriteByte(i8 signext %16)
br label %18
18: ; preds = %11
%19 = load i32, i32* %4
%20 = add nsw i32 %19, 1
store i32 %20, i32* %4
br label %7
21: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @UARTWrite(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %13
4: ; preds = %1
%5 = zext i32 %2 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
%10 = tail call i32 @UARTWriteByte(i8 signext %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %1
ret void
}
int test_imm_56uint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x56 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_56uint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0x56,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_56uint64_midword_mem>:
testb  $0x56,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_56uint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 86
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_56uint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 5636096
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int focus;
};
typedef TYPE_1__ XCrossingEvent;

/* Variables and functions */
void set_XCrossingEvent_focus(void *_p, int _v) {
  ((XCrossingEvent *)_p)->focus = (int)_v;
}


x86 assembly (clang, -O0):
<set_XCrossingEvent_focus>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XCrossingEvent_focus>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XCrossingEvent_focus(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XCrossingEvent_focus(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
void RTTarFileGetMode(void) {}


x86 assembly (clang, -O0):
<RTTarFileGetMode>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTTarFileGetMode>:
ret

LLVM IR (-O0):
define void @RTTarFileGetMode() {
ret void
}

LLVM IR (-O2):
define void @RTTarFileGetMode() {
ret void
}
void objectsimulation(void) {}


x86 assembly (clang, -O0):
<objectsimulation>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<objectsimulation>:
ret

LLVM IR (-O0):
define void @objectsimulation() {
ret void
}

LLVM IR (-O2):
define void @objectsimulation() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ myadd(int, int *);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char *argv[]) {
  int a = 3;
  myadd(1, &a);
  printf("a = %d\n", a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x3,-0x14(%rbp)
mov    $0x1,%edi
lea    -0x14(%rbp),%rsi
call   1040 <myadd@plt>
mov    -0x14(%rbp),%esi
lea    0xeab(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x3,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x1,%edi
call   1040 <myadd@plt>
mov    0x4(%rsp),%esi
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"a = %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 3, i32* %6
%7 = call i32 @myadd(i32 1, i32* %6)
%8 = load i32, i32* %6
%9 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"a = %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
store i32 3, i32* %3
%5 = call i32 @myadd(i32 1, i32* %3)
%6 = load i32, i32* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}
/* Variables and functions */
scalar_t__ fat32_check_sig(void const *, unsigned int);
bool fat32_valid_sig(const void *p, unsigned sector_size) {
  return (fat32_check_sig(p, 512) && fat32_check_sig(p, sector_size));
}


x86 assembly (clang, -O0):
<fat32_valid_sig>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x200,%esi
call   1030 <fat32_check_sig@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0xd(%rbp)
je     1155 <fat32_valid_sig+0x45>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <fat32_check_sig@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fat32_valid_sig>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    $0x200,%esi
call   1030 <fat32_check_sig@plt>
test   %rax,%rax
je     113e <fat32_valid_sig+0x2e>
mov    %rbx,%rdi
mov    %ebp,%esi
call   1030 <fat32_check_sig@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
jmp    1140 <fat32_valid_sig+0x30>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fat32_valid_sig(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i64 @fat32_check_sig(i8* %5, i32 512)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load i8*, i8** %3
%10 = load i32, i32* %4
%11 = call i64 @fat32_check_sig(i8* %9, i32 %10)
%12 = icmp ne i64 %11, 0
br label %13
13: ; preds = %8, %2
%14 = phi i1 [ false, %2 ], [ %12, %8 ]
%15 = zext i1 %14 to i32
ret i32 %15
}

LLVM IR (-O2):
define i32 @fat32_valid_sig(i8* %0, i32 %1) {
%3 = tail call i64 @fat32_check_sig(i8* %0, i32 512)
%4 = icmp eq i64 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i64 @fat32_check_sig(i8* %0, i32 %1)
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %5, %2
%10 = phi i32 [ 0, %2 ], [ %8, %5 ]
ret i32 %10
}
void r200InitX86Codegen(struct dfn_generators *gen) { (void)gen; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
%struct.dfn_generators = type opaque
define void @r200InitX86Codegen(%struct.dfn_generators* %0) {
%2 = alloca %struct.dfn_generators*
store %struct.dfn_generators* %0, %struct.dfn_generators** %2
%3 = load %struct.dfn_generators*, %struct.dfn_generators** %2
ret void
}

LLVM IR (-O2):
%struct.dfn_generators = type opaque
define void @r200InitX86Codegen(%struct.dfn_generators* nocapture %0) {
ret void
}
int ftw_list(const char *fname, const struct stat *st, int flags,
             struct FTW *ftw) {
  return 0;
}


x86 assembly (clang, -O0):
<ftw_list>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ftw_list>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.stat = type opaque
%struct.FTW = type opaque
define i32 @ftw_list(i8* %0, %struct.stat* %1, i32 %2, %struct.FTW* %3) {
%5 = alloca i8*
%6 = alloca %struct.stat*
%7 = alloca i32
%8 = alloca %struct.FTW*
store i8* %0, i8** %5
store %struct.stat* %1, %struct.stat** %6
store i32 %2, i32* %7
store %struct.FTW* %3, %struct.FTW** %8
ret i32 0
}

LLVM IR (-O2):
%struct.stat = type opaque
%struct.FTW = type opaque
define i32 @ftw_list(i8* nocapture readnone %0, %struct.stat* nocapture readnone %1, i32 %2, %struct.FTW* nocapture readnone %3) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void test(int e) {
  int b = e >= 0 ? 1 : -1;
  printf("%d\n", b);
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0xffffffff,%eax
mov    $0x1,%ecx
cmp    $0x0,%edx
cmovge %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
mov    %edi,%esi
sar    $0x1f,%esi
or     $0x1,%esi
lea    0xee1(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @test(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp sge i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 1, i32 -1
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %8)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @test(i32 %0) {
%2 = icmp sgt i32 %0, -1
%3 = select i1 %2, i32 1, i32 -1
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}
/* Variables and functions */
char *malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char *);
scalar_t__ strlen(char *);
char *_getstr(char *s) {
  char *o = malloc(strlen(s) + 1);
  strcpy(o, s);
  return o;
}


x86 assembly (clang, -O0):
<_getstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_getstr>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @_getstr(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i8* @malloc(i64 %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = load i8*, i8** %2
%10 = call i32 @strcpy(i8* %8, i8* %9)
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
define i8* @_getstr(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i8* @malloc(i64 %3)
%5 = tail call i32 @strcpy(i8* %4, i8* %0)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ bfwrite(char *);
void cmdPut(void) { bfwrite("."); }


x86 assembly (clang, -O0):
<cmdPut>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <bfwrite@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmdPut>:
lea    0xee9(%rip),%rdi
jmp    1030 <bfwrite@plt>

LLVM IR (-O0):
@.str = [2 x i8] c".\00"
define void @cmdPut() {
%1 = call i32 @bfwrite(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c".\00"
define void @cmdPut() {
%1 = tail call i32 @bfwrite(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}
const char *pathcon_nm9_name_out(int i) {
  switch (i) {
  case 0:
    return "o0";
  case 1:
    return "o1";
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<pathcon_nm9_name_out>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
test   %eax,%eax
je     112b <pathcon_nm9_name_out+0x2b>
jmp    111a <pathcon_nm9_name_out+0x1a>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
je     113b <pathcon_nm9_name_out+0x3b>
jmp    114b <pathcon_nm9_name_out+0x4b>
lea    0xece(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <pathcon_nm9_name_out+0x53>
lea    0xec1(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <pathcon_nm9_name_out+0x53>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm9_name_out>:
xor    %ecx,%ecx
cmp    $0x1,%edi
lea    0xef7(%rip),%rax
cmove  %rax,%rcx
test   %edi,%edi
lea    0xee7(%rip),%rax
cmovne %rcx,%rax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"o0\00"
@.str.1 = [3 x i8] c"o1\00"
define i8* @pathcon_nm9_name_out(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %7 [
i32 0, label %5
i32 1, label %6
]
5: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %2
br label %8
6: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %8
7: ; preds = %1
store i8* null, i8** %2
br label %8
8: ; preds = %7, %6, %5
%9 = load i8*, i8** %2
ret i8* %9
}

LLVM IR (-O2):
@.str = [3 x i8] c"o0\00"
@.str.1 = [3 x i8] c"o1\00"
define i8* @pathcon_nm9_name_out(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = select i1 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* null
%4 = icmp eq i32 %0, 0
%5 = select i1 %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3
ret i8* %5
}
void gtk_text_iter_free() {}


x86 assembly (clang, -O0):
<gtk_text_iter_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_iter_free>:
ret

LLVM IR (-O0):
define void @gtk_text_iter_free() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_iter_free() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert_int_equal(int, int /*<<< orphan*/);
int /*<<< orphan*/ open_files(int, int);
void open_files_test(void **state) {
  assert_int_equal(0x0404040404040404ul | 0x0808080808080808ul |
                       0x4040404040404040ul | 0x8080808080808080ul,
                   open_files(0x0000000000003300ul, 0x0023000000000000ul));
}


x86 assembly (clang, -O0):
<open_files_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x3300,%edi
xor    %esi,%esi
call   1030 <open_files@plt>
mov    %eax,%esi
mov    $0xcccccccc,%edi
call   1040 <assert_int_equal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_files_test>:
push   %rax
mov    $0x3300,%edi
xor    %esi,%esi
call   1030 <open_files@plt>
mov    $0xcccccccc,%edi
mov    %eax,%esi
pop    %rax
jmp    1040 <assert_int_equal@plt>

LLVM IR (-O0):
define void @open_files_test(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = call i32 @open_files(i32 13056, i32 0)
%4 = call i32 @assert_int_equal(i32 -858993460, i32 %3)
ret void
}

LLVM IR (-O2):
define void @open_files_test(i8** nocapture readnone %0) {
%2 = tail call i32 @open_files(i32 13056, i32 0)
%3 = tail call i32 @assert_int_equal(i32 -858993460, i32 %2)
ret void
}
/* Type definitions */
struct pagevec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __pagevec_lru_add_file(struct pagevec *);
scalar_t__ pagevec_count(struct pagevec *);
void pagevec_lru_add_file(struct pagevec *pvec) {
  if (pagevec_count(pvec))
    __pagevec_lru_add_file(pvec);
}


x86 assembly (clang, -O0):
<pagevec_lru_add_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pagevec_count@plt>
cmp    $0x0,%rax
je     1148 <pagevec_lru_add_file+0x28>
mov    -0x8(%rbp),%rdi
call   1040 <__pagevec_lru_add_file@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pagevec_lru_add_file>:
push   %rbx
mov    %rdi,%rbx
call   1030 <pagevec_count@plt>
test   %rax,%rax
je     1137 <pagevec_lru_add_file+0x17>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <__pagevec_lru_add_file@plt>
pop    %rbx
ret

LLVM IR (-O0):
%struct.pagevec = type { i32 }
define void @pagevec_lru_add_file(%struct.pagevec* %0) {
%2 = alloca %struct.pagevec*
store %struct.pagevec* %0, %struct.pagevec** %2
%3 = load %struct.pagevec*, %struct.pagevec** %2
%4 = call i64 @pagevec_count(%struct.pagevec* %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load %struct.pagevec*, %struct.pagevec** %2
%8 = call i32 @__pagevec_lru_add_file(%struct.pagevec* %7)
br label %9
9: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
%struct.pagevec = type { i32 }
define void @pagevec_lru_add_file(%struct.pagevec* %0) {
%2 = tail call i64 @pagevec_count(%struct.pagevec* %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @__pagevec_lru_add_file(%struct.pagevec* %0)
br label %6
6: ; preds = %4, %1
ret void
}
int cairo_code_draw_casLLabel_get_width() { return 7; }


x86 assembly (clang, -O0):
<cairo_code_draw_casLLabel_get_width>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cairo_code_draw_casLLabel_get_width>:
mov    $0x7,%eax
ret

LLVM IR (-O0):
define i32 @cairo_code_draw_casLLabel_get_width() {
ret i32 7
}

LLVM IR (-O2):
define i32 @cairo_code_draw_casLLabel_get_width() {
ret i32 7
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, char const *, char *);
scalar_t__ strlen(char const *);
char *xmalloc(scalar_t__);
char *build_fspath(const char *docroot, char *urlpath) {
  char *path;
  path = xmalloc(strlen(docroot) + 1 + strlen(urlpath) + 1);
  sprintf(path, "%s/%s", docroot, urlpath);
  return path;
}


x86 assembly (clang, -O0):
<build_fspath>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
add    %rax,%rdi
add    $0x1,%rdi
call   1040 <xmalloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xe7f(%rip),%rsi
call   1050 <sprintf@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<build_fspath>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%r12
call   1030 <strlen@plt>
mov    %rax,%r15
mov    %r14,%rdi
call   1030 <strlen@plt>
lea    (%r15,%rax,1),%rdi
add    $0x2,%rdi
call   1040 <xmalloc@plt>
mov    %rax,%rbx
lea    0xe9b(%rip),%rsi
mov    %rax,%rdi
mov    %r12,%rdx
mov    %r14,%rcx
call   1050 <sprintf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%s/%s\00"
define i8* @build_fspath(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i64 @strlen(i8* %6)
%8 = add nsw i64 %7, 1
%9 = load i8*, i8** %4
%10 = call i64 @strlen(i8* %9)
%11 = add nsw i64 %8, %10
%12 = add nsw i64 %11, 1
%13 = call i8* @xmalloc(i64 %12)
store i8* %13, i8** %5
%14 = load i8*, i8** %5
%15 = load i8*, i8** %3
%16 = load i8*, i8** %4
%17 = call i32 @sprintf(i8* %14, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %15, i8* %16)
%18 = load i8*, i8** %5
ret i8* %18
}

LLVM IR (-O2):
@.str = [6 x i8] c"%s/%s\00"
define i8* @build_fspath(i8* %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%5 = add i64 %3, 2
%6 = add i64 %5, %4
%7 = tail call i8* @xmalloc(i64 %6)
%8 = tail call i32 @sprintf(i8* dereferenceable(1) %7, i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
ret i8* %7
}
float norm_ftc_motor(float value) { return value / 127 * 100; }


x86 assembly (clang, -O0):
<norm_ftc_motor>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xeee(%rip),%xmm1
divss  %xmm1,%xmm0
movss  0xede(%rip),%xmm1
mulss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<norm_ftc_motor>:
divss  0xef8(%rip),%xmm0
mulss  0xef4(%rip),%xmm0
ret

LLVM IR (-O0):
define float @norm_ftc_motor(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fdiv float %3, 1.270000e+02
%5 = fmul float %4, 1.000000e+02
ret float %5
}

LLVM IR (-O2):
define float @norm_ftc_motor(float %0) {
%2 = fdiv float %0, 1.270000e+02
%3 = fmul float %2, 1.000000e+02
ret float %3
}
/* Variables and functions */
size_t strlen(const char *s) {
  size_t i = 0;
  while (s[i]) {
    i++;
  }
  return i;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1133 <strlen+0x33>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <strlen+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
mov    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <strlen+0x10>
ret

LLVM IR (-O0):
define i64 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %10, %1
%5 = load i8*, i8** %2
%6 = load i64, i64* %3
%7 = getelementptr inbounds i8, i8* %5, i64 %6
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %4
%11 = load i64, i64* %3
%12 = add i64 %11, 1
store i64 %12, i64* %3
br label %4
13: ; preds = %4
%14 = load i64, i64* %3
ret i64 %14
}

LLVM IR (-O2):
define i64 @strlen(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 0, %1 ], [ %7, %2 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i64 %3
}
int __ltushort(unsigned short a, unsigned short b) { return a < b; }


x86 assembly (clang, -O0):
<__ltushort>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movzwl -0x2(%rbp),%eax
movzwl -0x4(%rbp),%ecx
cmp    %ecx,%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ltushort>:
xor    %eax,%eax
cmp    %si,%di
setb   %al
ret

LLVM IR (-O0):
define i32 @__ltushort(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = load i16, i16* %4
%8 = zext i16 %7 to i32
%9 = icmp slt i32 %6, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @__ltushort(i16 zeroext %0, i16 zeroext %1) {
%3 = icmp ult i16 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
void gen_prologue(void) {}


x86 assembly (clang, -O0):
<gen_prologue>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_prologue>:
ret

LLVM IR (-O0):
define void @gen_prologue() {
ret void
}

LLVM IR (-O2):
define void @gen_prologue() {
ret void
}
void ff_hevc_put_hevc_uni_epel_v48_8_avx2() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_epel_v48_8_avx2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_epel_v48_8_avx2>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_epel_v48_8_avx2() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_epel_v48_8_avx2() {
ret void
}
/* Type definitions */
struct msghdr {
  int dummy;
};
typedef int ssize_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
ssize_t __recvmsg(int fd, struct msghdr *message, int flags) {
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<__recvmsg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2ebf(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__recvmsg>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.msghdr = type { i32 }
@ENOSYS = global i32 0
define i32 @__recvmsg(i32 %0, %struct.msghdr* %1, i32 %2) {
%4 = alloca i32
%5 = alloca %struct.msghdr*
%6 = alloca i32
store i32 %0, i32* %4
store %struct.msghdr* %1, %struct.msghdr** %5
store i32 %2, i32* %6
%7 = load i32, i32* @ENOSYS
%8 = call i32 @__set_errno(i32 %7)
ret i32 -1
}

LLVM IR (-O2):
%struct.msghdr = type { i32 }
@ENOSYS = global i32 0
define i32 @__recvmsg(i32 %0, %struct.msghdr* nocapture readnone %1, i32 %2) {
%4 = load i32, i32* @ENOSYS
%5 = tail call i32 @__set_errno(i32 %4)
ret i32 -1
}
void copy_to_sdram(void) {
  unsigned int *dest = (unsigned int *)0x50000000;
  unsigned int *start = (unsigned int *)0;
  unsigned int *end = (unsigned int *)(8 * 1024);
  while (start < end) {
    *(dest++) = *(start++);
  }
  return;
}


x86 assembly (clang, -O0):
<copy_to_sdram>:
push   %rbp
mov    %rsp,%rbp
mov    $0x50000000,%eax
mov    %rax,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    $0x2000,%eax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1153 <copy_to_sdram+0x53>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x4,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
jmp    111e <copy_to_sdram+0x1e>
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define void @copy_to_sdram() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32*
store i32* inttoptr (i64 1342177280 to i32*), i32** %1
store i32* null, i32** %2
store i32* inttoptr (i64 8192 to i32*), i32** %3
br label %4
4: ; preds = %8, %0
%5 = load i32*, i32** %2
%6 = load i32*, i32** %3
%7 = icmp ult i32* %5, %6
br i1 %7, label %8, label %14
8: ; preds = %4
%9 = load i32*, i32** %2
%10 = getelementptr inbounds i32, i32* %9, i32 1
store i32* %10, i32** %2
%11 = load i32, i32* %9
%12 = load i32*, i32** %1
%13 = getelementptr inbounds i32, i32* %12, i32 1
store i32* %13, i32** %1
store i32 %11, i32* %12
br label %4
14: ; preds = %4
ret void
}

LLVM IR (-O2):
/* Variables and functions */
int japi_getlength(int);
int j_getlength(int arg0) { return (japi_getlength(arg0)); }


x86 assembly (clang, -O0):
<j_getlength>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <japi_getlength@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<j_getlength>:
jmp    1030 <japi_getlength@plt>

LLVM IR (-O0):
define i32 @j_getlength(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @japi_getlength(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @j_getlength(i32 %0) {
%2 = tail call i32 @japi_getlength(i32 %0)
ret i32 %2
}
int f3(float x) { return x == x; }


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x4(%rbp),%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
xor    %eax,%eax
ucomiss %xmm0,%xmm0
setnp  %al
ret

LLVM IR (-O0):
define i32 @f3(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fcmp oeq float %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @f3(float %0) {
%2 = fcmp ord float %0, 0.000000e+00
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ err_exit(char *, int /*<<< orphan*/);
int /*<<< orphan*/ errno;
void *realloc(void *, size_t);
int /*<<< orphan*/ strerror(int /*<<< orphan*/);
void *xrealloc(void *ptr, size_t size) {
  void *p;
  p = realloc(ptr, size);
  if (p == NULL && size != 0)
    err_exit("realloc failed: %s", strerror(errno));
  return p;
}


x86 assembly (clang, -O0):
<xrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1183 <xrealloc+0x53>
cmpq   $0x0,-0x10(%rbp)
je     1183 <xrealloc+0x53>
mov    0x2e72(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
mov    %eax,%esi
lea    0xe82(%rip),%rdi
call   1030 <err_exit@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrealloc>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
call   1040 <realloc@plt>
mov    %rax,%r14
test   %rbx,%rbx
je     1165 <xrealloc+0x35>
test   %r14,%r14
jne    1165 <xrealloc+0x35>
mov    0x2e90(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
lea    0xea2(%rip),%rdi
mov    %eax,%esi
call   1030 <err_exit@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [19 x i8] c"realloc failed: %s\00"
@errno = global i32 0
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %18
11: ; preds = %2
%12 = load i64, i64* %4
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %11
%15 = load i32, i32* @errno
%16 = call i32 @strerror(i32 %15)
%17 = call i32 @err_exit(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %16)
br label %18
18: ; preds = %14, %11, %2
%19 = load i8*, i8** %5
ret i8* %19
}

LLVM IR (-O2):
@.str = [19 x i8] c"realloc failed: %s\00"
@errno = global i32 0
define noalias i8* @xrealloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
%5 = icmp ne i64 %1, 0
%6 = and i1 %5, %4
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i32, i32* @errno
%9 = tail call i32 @strerror(i32 %8)
%10 = tail call i32 @err_exit(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %9)
br label %11
11: ; preds = %7, %2
ret i8* %3
}
/* Variables and functions */
long atoi(char *);
long string__NativeString__atoi(char *self) {
  long var;
  long var1;
  var1 = atoi(self);
  ;
  var = var1;
  goto RET_LABEL;
RET_LABEL:;
  return var;
}


x86 assembly (clang, -O0):
<string__NativeString__atoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <atoi@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string__NativeString__atoi>:
jmp    1030 <atoi@plt>

LLVM IR (-O0):
define i64 @string__NativeString__atoi(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i64
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i64 @atoi(i8* %5)
store i64 %6, i64* %4
%7 = load i64, i64* %4
store i64 %7, i64* %3
br label %8
8: ; preds = %1
%9 = load i64, i64* %3
ret i64 %9
}

LLVM IR (-O2):
define i64 @string__NativeString__atoi(i8* nocapture %0) {
%2 = tail call i64 @atoi(i8* %0)
ret i64 %2
}