xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, int *);
int main() {
  int A, B;
  scanf(" %d %d", &A, &B);
  printf("SOMA = %d\n", A + B);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1040 <scanf@plt>
mov    -0x8(%rbp),%esi
add    -0xc(%rbp),%esi
lea    0xeb7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <scanf@plt>
mov    (%rsp),%esi
add    0x4(%rsp),%esi
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c" %d %d\00"
@.str.1 = [11 x i8] c"SOMA = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32* %2, i32* %3)
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = add nsw i32 %5, %6
%8 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c" %d %d\00"
@.str.1 = [11 x i8] c"SOMA = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2)
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = add nsw i32 %7, %6
%9 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}
execv(path, argv) char *path, **argv;
{ return execvp(path, argv); }


x86 assembly (clang, -O0):
<execv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1030 <execvp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<execv>:
xor    %eax,%eax
jmp    1030 <execvp@plt>

LLVM IR (-O0):
define i32 @execv(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
%5 = load i8*, i8** %3
%6 = load i8**, i8*** %4
%7 = call i32 (i8*, i8**, ...) bitcast (i32 (...)* @execvp to i32 (i8*, i8**, ...)*)(i8* %5, i8** %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @execv(i8* %0, i8** %1) {
%3 = tail call i32 (i8*, i8**, ...) bitcast (i32 (...)* @execvp to i32 (i8*, i8**, ...)*)(i8* %0, i8** %1)
ret i32 %3
}
/* Variables and functions */
void *XOpenDisplay(int /*<<< orphan*/ *);
int main() {
  void *display;
  display = XOpenDisplay(NULL);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1030 <XOpenDisplay@plt>
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <XOpenDisplay@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = call i8* @XOpenDisplay(i32* null)
store i8* %3, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i8* @XOpenDisplay(i32* null)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int isBigEndian(void) {
  union {
    uint32_t i;
    char c[4];
  } e = {0x01000000};
  return e.c[0];
}


x86 assembly (clang, -O0):
<isBigEndian>:
push   %rbp
mov    %rsp,%rbp
mov    0xef6(%rip),%eax
mov    %eax,-0x8(%rbp)
movsbl -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isBigEndian>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%union.anon = type { i32 }
@__const.isBigEndian.e = %union.anon { i32 16777216 }
define i32 @isBigEndian() {
%1 = alloca %union.anon
%2 = bitcast %union.anon* %1 to i8*
%3 = bitcast %union.anon* %1 to [4 x i8]*
%4 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @isBigEndian() {
ret i32 0
}
/* Variables and functions */
double ceil(size_t);
size_t hdr_base64_encoded_len(size_t decoded_size) {
  return (size_t)(ceil(decoded_size / 3.0) * 4.0);
}


x86 assembly (clang, -O0):
<hdr_base64_encoded_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movaps 0xedd(%rip),%xmm1
movq   -0x8(%rbp),%xmm0
punpckldq %xmm1,%xmm0
movapd 0xedc(%rip),%xmm1
subpd  %xmm1,%xmm0
movaps %xmm0,%xmm1
unpckhpd %xmm0,%xmm0
addsd  %xmm1,%xmm0
movsd  0xed5(%rip),%xmm1
divsd  %xmm1,%xmm0
movaps %xmm0,%xmm1
cvttsd2si %xmm1,%rdi
mov    %rdi,%rcx
sar    $0x3f,%rcx
movsd  0xec2(%rip),%xmm1
movsd  %xmm1,-0x10(%rbp)
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rax
and    %rcx,%rax
or     %rax,%rdi
call   1030 <ceil@plt>
movsd  -0x10(%rbp),%xmm1
movsd  0xea4(%rip),%xmm2
mulsd  %xmm2,%xmm0
movaps %xmm0,%xmm2
cvttsd2si %xmm2,%rax
mov    %rax,%rdx
sar    $0x3f,%rdx
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rcx
and    %rdx,%rcx
or     %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdr_base64_encoded_len>:
push   %rax
movq   %rdi,%xmm0
punpckldq 0xee2(%rip),%xmm0
subpd  0xeea(%rip),%xmm0
movapd %xmm0,%xmm1
unpckhpd %xmm0,%xmm1
addsd  %xmm0,%xmm1
divsd  0xee6(%rip),%xmm1
cvttsd2si %xmm1,%rax
mov    %rax,%rcx
sar    $0x3f,%rcx
subsd  0xeda(%rip),%xmm1
cvttsd2si %xmm1,%rdi
and    %rcx,%rdi
or     %rax,%rdi
call   1030 <ceil@plt>
mulsd  0xeca(%rip),%xmm0
cvttsd2si %xmm0,%rcx
mov    %rcx,%rdx
sar    $0x3f,%rdx
subsd  0xeae(%rip),%xmm0
cvttsd2si %xmm0,%rax
and    %rdx,%rax
or     %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @hdr_base64_encoded_len(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = uitofp i64 %3 to double
%5 = fdiv double %4, 3.000000e+00
%6 = fptoui double %5 to i64
%7 = call double @ceil(i64 %6)
%8 = fmul double %7, 4.000000e+00
%9 = fptoui double %8 to i64
ret i64 %9
}

LLVM IR (-O2):
define i64 @hdr_base64_encoded_len(i64 %0) {
%2 = uitofp i64 %0 to double
%3 = fdiv double %2, 3.000000e+00
%4 = fptoui double %3 to i64
%5 = tail call double @ceil(i64 %4)
%6 = fmul double %5, 4.000000e+00
%7 = fptoui double %6 to i64
ret i64 %7
}
void POLICY_CONSTRAINTS_new(void) {}


x86 assembly (clang, -O0):
<POLICY_CONSTRAINTS_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<POLICY_CONSTRAINTS_new>:
ret

LLVM IR (-O0):
define void @POLICY_CONSTRAINTS_new() {
ret void
}

LLVM IR (-O2):
define void @POLICY_CONSTRAINTS_new() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, int, int, char);
void term_cursor_move(int x, int y) {
  if (x < 0 || y < 0) {
    return;
  }
  printf("%s%d;%d%c", "\033[", y + 1, x + 1, 'H');
}


x86 assembly (clang, -O0):
<term_cursor_move>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     1132 <term_cursor_move+0x22>
cmpl   $0x0,-0x8(%rbp)
jge    1137 <term_cursor_move+0x27>
jmp    115c <term_cursor_move+0x4c>
mov    -0x8(%rbp),%edx
add    $0x1,%edx
mov    -0x4(%rbp),%ecx
add    $0x1,%ecx
lea    0xeb6(%rip),%rdi
lea    0xeb9(%rip),%rsi
mov    $0x48,%r8d
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<term_cursor_move>:
mov    %esi,%eax
or     %edi,%eax
js     1139 <term_cursor_move+0x29>
mov    %esi,%edx
mov    %edi,%ecx
add    $0x1,%edx
add    $0x1,%ecx
lea    0xed9(%rip),%rdi
lea    0xedc(%rip),%rsi
mov    $0x48,%r8d
jmp    1030 <printf@plt>
ret

LLVM IR (-O0):
@.str = [10 x i8] c"%s%d;%d%c\00"
@.str.1 = [3 x i8] c"\1B[\00"
define void @term_cursor_move(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %4
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %7, %2
br label %17
11: ; preds = %7
%12 = load i32, i32* %4
%13 = add nsw i32 %12, 1
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
%16 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %13, i32 %15, i8 signext 72)
br label %17
17: ; preds = %11, %10
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"%s%d;%d%c\00"
@.str.1 = [3 x i8] c"\1B[\00"
define void @term_cursor_move(i32 %0, i32 %1) {
%3 = or i32 %1, %0
%4 = icmp sgt i32 %3, -1
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = add nsw i32 %1, 1
%7 = add nsw i32 %0, 1
%8 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %6, i32 %7, i8 signext 72)
br label %9
9: ; preds = %2, %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ S_IWGRP;
int /*<<< orphan*/ S_IWOTH;
int /*<<< orphan*/ S_IWUSR;
int _is_file_rwx(char *, int /*<<< orphan*/, int /*<<< orphan*/,
                 int /*<<< orphan*/);
int _is_file_writable(char *pathname) {
  return _is_file_rwx(pathname, S_IWUSR, S_IWGRP, S_IWOTH);
}


x86 assembly (clang, -O0):
<_is_file_writable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rax
mov    (%rax),%esi
mov    0x2eb8(%rip),%rax
mov    (%rax),%edx
mov    0x2e8f(%rip),%rax
mov    (%rax),%ecx
call   1030 <_is_file_rwx@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_is_file_writable>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
mov    0x2ec8(%rip),%rax
mov    (%rax),%edx
mov    0x2e9f(%rip),%rax
mov    (%rax),%ecx
jmp    1030 <_is_file_rwx@plt>

LLVM IR (-O0):
@S_IWUSR = global i32 0
@S_IWGRP = global i32 0
@S_IWOTH = global i32 0
define i32 @_is_file_writable(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @S_IWUSR
%5 = load i32, i32* @S_IWGRP
%6 = load i32, i32* @S_IWOTH
%7 = call i32 @_is_file_rwx(i8* %3, i32 %4, i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
@S_IWUSR = global i32 0
@S_IWGRP = global i32 0
@S_IWOTH = global i32 0
define i32 @_is_file_writable(i8* %0) {
%2 = load i32, i32* @S_IWUSR
%3 = load i32, i32* @S_IWGRP
%4 = load i32, i32* @S_IWOTH
%5 = tail call i32 @_is_file_rwx(i8* %0, i32 %2, i32 %3, i32 %4)
ret i32 %5
}
/* Variables and functions */
int binsearch(int, int *, int);
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int arr[] = {2, 4, 6, 7, 9, 29, 45, 46, 49, 50, 51};
  printf("%d", binsearch(9, arr, 10));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x30(%rbp),%rdi
lea    0xeb6(%rip),%rsi
mov    $0x2c,%edx
call   1050 <memcpy@plt>
lea    -0x30(%rbp),%rsi
mov    $0x9,%edi
mov    $0xa,%edx
call   1030 <binsearch@plt>
mov    %eax,%esi
lea    0xebc(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x38,%rsp
movups 0xef1(%rip),%xmm0
movups %xmm0,0x1c(%rsp)
movaps 0xed9(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xebd(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rsi
mov    $0x9,%edi
mov    $0xa,%edx
call   1030 <binsearch@plt>
lea    0xecc(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x38,%rsp
ret

LLVM IR (-O0):
@__const.main.arr = [11 x i32] [i32 2, i32 4, i32 6, i32 7, i32 9, i32 29, i32 45, i32 46, i32 49, i32 50, i32 51]
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [11 x i32]
store i32 0, i32* %1
%3 = bitcast [11 x i32]* %2 to i8*
%4 = getelementptr inbounds [11 x i32], [11 x i32]* %2, i64 0, i64 0
%5 = call i32 @binsearch(i32 9, i32* %4, i32 10)
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@__const.main.arr = [11 x i32] [i32 2, i32 4, i32 6, i32 7, i32 9, i32 29, i32 45, i32 46, i32 49, i32 50, i32 51]
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca [11 x i32]
%2 = bitcast [11 x i32]* %1 to i8*
%3 = getelementptr inbounds [11 x i32], [11 x i32]* %1, i64 0, i64 0
%4 = call i32 @binsearch(i32 9, i32* %3, i32 10)
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ aaa();
int /*<<< orphan*/ bbb();
int /*<<< orphan*/ ccc();
void foo(int y) {
  int x;
  if (x) {
    aaa();
    bbb();
    return;
  }
  if (x) {
    aaa();
    bbb();
    return;
  }
  ccc();
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1158 <foo+0x28>
mov    $0x0,%al
call   1050 <aaa@plt>
mov    $0x0,%al
call   1040 <bbb@plt>
jmp    117c <foo+0x4c>
cmpl   $0x0,-0x8(%rbp)
je     1175 <foo+0x45>
mov    $0x0,%al
call   1050 <aaa@plt>
mov    $0x0,%al
call   1040 <bbb@plt>
jmp    117c <foo+0x4c>
mov    $0x0,%al
call   1030 <ccc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
jmp    1030 <ccc@plt>

LLVM IR (-O0):
define void @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = call i32 (...) @aaa()
%8 = call i32 (...) @bbb()
br label %17
9: ; preds = %1
%10 = load i32, i32* %3
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %9
%13 = call i32 (...) @aaa()
%14 = call i32 (...) @bbb()
br label %17
15: ; preds = %9
%16 = call i32 (...) @ccc()
br label %17
17: ; preds = %15, %12, %6
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0) {
%2 = tail call i32 (...) @ccc()
ret void
}
int g_DUMMY_menu_append_pixbutton(int menu_id, char *pixinfo[],
                                  char *pixgrayinfo[], int return_id) {
  menu_id = menu_id;
  pixinfo = pixinfo;
  pixgrayinfo = pixgrayinfo;
  return_id = return_id;
  return -1;
}


x86 assembly (clang, -O0):
<g_DUMMY_menu_append_pixbutton>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_DUMMY_menu_append_pixbutton>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @g_DUMMY_menu_append_pixbutton(i32 %0, i8** %1, i8** %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8**
%7 = alloca i8**
%8 = alloca i32
store i32 %0, i32* %5
store i8** %1, i8*** %6
store i8** %2, i8*** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
store i32 %9, i32* %5
%10 = load i8**, i8*** %6
store i8** %10, i8*** %6
%11 = load i8**, i8*** %7
store i8** %11, i8*** %7
%12 = load i32, i32* %8
store i32 %12, i32* %8
ret i32 -1
}

LLVM IR (-O2):
define i32 @g_DUMMY_menu_append_pixbutton(i32 %0, i8** nocapture readnone %1, i8** nocapture readnone %2, i32 %3) {
ret i32 -1
}
void ContactJacobianH36(double *CJ, double *q, double *L, double *addl) {}


x86 assembly (clang, -O0):
<ContactJacobianH36>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ContactJacobianH36>:
ret

LLVM IR (-O0):
define void @ContactJacobianH36(double* %0, double* %1, double* %2, double* %3) {
%5 = alloca double*
%6 = alloca double*
%7 = alloca double*
%8 = alloca double*
store double* %0, double** %5
store double* %1, double** %6
store double* %2, double** %7
store double* %3, double** %8
ret void
}

LLVM IR (-O2):
define void @ContactJacobianH36(double* nocapture %0, double* nocapture %1, double* nocapture %2, double* nocapture %3) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
int pipe(int *);
int msg_create(int pfds[]) {
  if (pipe(pfds) == -1) {
    perror("pipe");
    return -1;
  }
  return 1;
}


x86 assembly (clang, -O0):
<msg_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <pipe@plt>
cmp    $0xffffffff,%eax
jne    1156 <msg_create+0x36>
lea    0xebb(%rip),%rdi
call   1040 <perror@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    115d <msg_create+0x3d>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msg_create>:
push   %rax
call   1030 <pipe@plt>
mov    %eax,%ecx
mov    $0x1,%eax
cmp    $0xffffffff,%ecx
je     1134 <msg_create+0x14>
pop    %rcx
ret
lea    0xec5(%rip),%rdi
call   1040 <perror@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"pipe\00"
define i32 @msg_create(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = call i32 @pipe(i32* %4)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @perror(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %2
br label %10
9: ; preds = %1
store i32 1, i32* %2
br label %10
10: ; preds = %9, %7
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@.str = [5 x i8] c"pipe\00"
define i32 @msg_create(i32* %0) {
%2 = tail call i32 @pipe(i32* %0)
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @perror(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ -1, %4 ], [ 1, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int XSetWindowColormap() {
  printf("XSetWindowColormap called\n");
  return 0;
}


x86 assembly (clang, -O0):
<XSetWindowColormap>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XSetWindowColormap>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"XSetWindowColormap called\0A\00"
define i32 @XSetWindowColormap() {
%1 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [26 x i8] c"XSetWindowColormap called\00"
define i32 @XSetWindowColormap() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int stc_tasks_create() { return 0; }


x86 assembly (clang, -O0):
<stc_tasks_create>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stc_tasks_create>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @stc_tasks_create() {
ret i32 0
}

LLVM IR (-O2):
define i32 @stc_tasks_create() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
int /*<<< orphan*/ system(char *);
void *scheduler5(void *variables5) {
  int vars;
  int *p_vars = (int *)variables5;
  vars = *p_vars;
  while (1) {
    system("netstat -anp | grep bash | awk '{print $7}' | cut -d / -f1 | xargs "
           "kill");
    sleep(vars);
  }
}


x86 assembly (clang, -O0):
<scheduler5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
lea    0xebc(%rip),%rdi
call   1030 <system@plt>
mov    -0xc(%rbp),%edi
call   1040 <sleep@plt>
jmp    113d <scheduler5+0x1d>

x86 assembly (clang, -O2):
<scheduler5>:
push   %r14
push   %rbx
push   %rax
mov    (%rdi),%ebx
lea    0xed3(%rip),%r14
nopl   (%rax)
mov    %r14,%rdi
call   1030 <system@plt>
mov    %ebx,%edi
call   1040 <sleep@plt>
jmp    1130 <scheduler5+0x10>

LLVM IR (-O0):
@.str = [72 x i8] c"netstat -anp | grep bash | awk '{print $7}' | cut -d / -f1 | xargs kill\00"
define i8* @scheduler5(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = bitcast i8* %5 to i32*
store i32* %6, i32** %4
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
store i32 %8, i32* %3
br label %9
9: ; preds = %1, %9
%10 = call i32 @system(i8* getelementptr inbounds ([72 x i8], [72 x i8]* @.str, i64 0, i64 0))
%11 = load i32, i32* %3
%12 = call i32 @sleep(i32 %11)
br label %9
}

LLVM IR (-O2):
@.str = [72 x i8] c"netstat -anp | grep bash | awk '{print $7}' | cut -d / -f1 | xargs kill\00"
define noalias i8* @scheduler5(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
br label %4
4: ; preds = %4, %1
%5 = tail call i32 @system(i8* getelementptr inbounds ([72 x i8], [72 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 @sleep(i32 %3)
br label %4
}
/* Variables and functions */
int /*<<< orphan*/ syslog_nx(char const *);
int /*<<< orphan*/ terminate(int);
void syslog_exit(const char *message) {
  syslog_nx(message);
  terminate(true);
}


x86 assembly (clang, -O0):
<syslog_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <syslog_nx@plt>
mov    $0x1,%edi
call   1040 <terminate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syslog_exit>:
push   %rax
call   1030 <syslog_nx@plt>
mov    $0x1,%edi
pop    %rax
jmp    1040 <terminate@plt>

LLVM IR (-O0):
define void @syslog_exit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @syslog_nx(i8* %3)
%5 = call i32 @terminate(i32 1)
ret void
}

LLVM IR (-O2):
define void @syslog_exit(i8* %0) {
%2 = tail call i32 @syslog_nx(i8* %0)
%3 = tail call i32 @terminate(i32 1)
ret void
}
/* Variables and functions */
int func();
int main(void) { return func() != 42; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <func@plt>
cmp    $0x2a,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <func@plt>
xor    %ecx,%ecx
cmp    $0x2a,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @func()
%3 = icmp ne i32 %2, 42
%4 = zext i1 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @func()
%2 = icmp ne i32 %1, 42
%3 = zext i1 %2 to i32
ret i32 %3
}
unsigned int inl(unsigned short port) {
  unsigned int _v;
  asm volatile("in"
               "l"
               " %"
               "w"
               "1,%"
               ""
               "0"
               : "=a"(_v)
               : "Nd"(port));
  return _v;
}


x86 assembly (clang, -O0):
<inl>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inl>:
mov    %edi,%edx
in     (%dx),%eax
ret

LLVM IR (-O0):
define i32 @inl(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i32
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i32 asm sideeffect "inl ${1:w},$0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @inl(i16 zeroext %0) {
%2 = tail call i32 asm sideeffect "inl ${1:w},$0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i32 %2
}
/* Type definitions */
struct list_head {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __list_del(struct list_head *);
int /*<<< orphan*/ list_add(struct list_head *, struct list_head *);
void list_move(struct list_head *list, struct list_head *head) {
  __list_del(list);
  list_add(list, head);
}


x86 assembly (clang, -O0):
<list_move>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__list_del@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <list_add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_move>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <__list_del@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <list_add@plt>

LLVM IR (-O0):
%struct.list_head = type { i32 }
define void @list_move(%struct.list_head* %0, %struct.list_head* %1) {
%3 = alloca %struct.list_head*
%4 = alloca %struct.list_head*
store %struct.list_head* %0, %struct.list_head** %3
store %struct.list_head* %1, %struct.list_head** %4
%5 = load %struct.list_head*, %struct.list_head** %3
%6 = call i32 @__list_del(%struct.list_head* %5)
%7 = load %struct.list_head*, %struct.list_head** %3
%8 = load %struct.list_head*, %struct.list_head** %4
%9 = call i32 @list_add(%struct.list_head* %7, %struct.list_head* %8)
ret void
}

LLVM IR (-O2):
%struct.list_head = type { i32 }
define void @list_move(%struct.list_head* %0, %struct.list_head* %1) {
%3 = tail call i32 @__list_del(%struct.list_head* %0)
%4 = tail call i32 @list_add(%struct.list_head* %0, %struct.list_head* %1)
ret void
}
int jsw_cmp_uint(const void *a, const void *b) {
  const unsigned int *ua = a;
  const unsigned int *ub = b;
  return ((*ua) < (*ub) ? -1 : (*ua) > (*ub));
}


x86 assembly (clang, -O0):
<jsw_cmp_uint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
cmp    (%rcx),%eax
jae    113b <jsw_cmp_uint+0x3b>
mov    $0xffffffff,%eax
mov    %eax,-0x24(%rbp)
jmp    1152 <jsw_cmp_uint+0x52>
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
cmp    (%rcx),%eax
seta   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<jsw_cmp_uint>:
mov    (%rdi),%eax
xor    %ecx,%ecx
cmp    (%rsi),%eax
seta   %cl
mov    $0xffffffff,%eax
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define i32 @jsw_cmp_uint(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %5
%12 = load i32, i32* %11
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = icmp ult i32 %12, %14
br i1 %15, label %16, label %17
16: ; preds = %2
br label %24
17: ; preds = %2
%18 = load i32*, i32** %5
%19 = load i32, i32* %18
%20 = load i32*, i32** %6
%21 = load i32, i32* %20
%22 = icmp ugt i32 %19, %21
%23 = zext i1 %22 to i32
br label %24
24: ; preds = %17, %16
%25 = phi i32 [ -1, %16 ], [ %23, %17 ]
ret i32 %25
}

LLVM IR (-O2):
define i32 @jsw_cmp_uint(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ult i32 %5, %6
%8 = icmp ugt i32 %5, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
void set_wifi_24g() {
  system("echo '{\"method\":\"pref-set\",\"arguments\":{\"confs\":{\"wl_"
         "band\":\"2.4GHz\"}}}' | /web/rpc.cgi >/dev/null 2>&1");
  system("echo '{\"method\":\"revalidate\",\"arguments\":{\"wl\":{\"act"
         "ion\":\"restart\"}}}' | /web/rpc.cgi >/dev/null 2>&1");
}


x86 assembly (clang, -O0):
<set_wifi_24g>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <system@plt>
lea    0xf40(%rip),%rdi
call   1030 <system@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_wifi_24g>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <system@plt>
lea    0xf43(%rip),%rdi
pop    %rax
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [103 x i8] c"echo '{\22method\22:\22pref-set\22,\22arguments\22:{\22confs\22:{\22wl_band\22:\222.4GHz\22}}}' | /web/rpc.cgi >/dev/null 2>&1\00"
@.str.1 = [102 x i8] c"echo '{\22method\22:\22revalidate\22,\22arguments\22:{\22wl\22:{\22action\22:\22restart\22}}}' | /web/rpc.cgi >/dev/null 2>&1\00"
define void @set_wifi_24g() {
%1 = call i32 @system(i8* getelementptr inbounds ([103 x i8], [103 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @system(i8* getelementptr inbounds ([102 x i8], [102 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [103 x i8] c"echo '{\22method\22:\22pref-set\22,\22arguments\22:{\22confs\22:{\22wl_band\22:\222.4GHz\22}}}' | /web/rpc.cgi >/dev/null 2>&1\00"
@.str.1 = [102 x i8] c"echo '{\22method\22:\22revalidate\22,\22arguments\22:{\22wl\22:{\22action\22:\22restart\22}}}' | /web/rpc.cgi >/dev/null 2>&1\00"
define void @set_wifi_24g() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([103 x i8], [103 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @system(i8* getelementptr inbounds ([102 x i8], [102 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x04() {
  Assert_real((isspace(4) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              25, ("isspace should be 0 for 0x04"));
}


x86 assembly (clang, -O0):
<t_isspace_0x04>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x19,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x04>:
push   %rax
mov    $0x4,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x19,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0x04\00"
define void @t_isspace_0x04() {
%1 = call i64 @isspace(i32 4)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 25, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0x04\00"
define void @t_isspace_0x04() {
%1 = tail call i64 @isspace(i32 4)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 25, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int fun564() { return 564; }


x86 assembly (clang, -O0):
<fun564>:
push   %rbp
mov    %rsp,%rbp
mov    $0x234,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun564>:
mov    $0x234,%eax
ret

LLVM IR (-O0):
define i32 @fun564() {
ret i32 564
}

LLVM IR (-O2):
define i32 @fun564() {
ret i32 564
}
void RTLogPrintfV(void) {}


x86 assembly (clang, -O0):
<RTLogPrintfV>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTLogPrintfV>:
ret

LLVM IR (-O0):
define void @RTLogPrintfV() {
ret void
}

LLVM IR (-O2):
define void @RTLogPrintfV() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void ADI32BitsClear(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val) {
  uint32_t ui32RegOffset;
  ;
  ;
  ui32RegOffset = 0x00000020;
  (*((volatile unsigned long *)(ui32Base + ui32RegOffset + (ui32Reg & 0xFC)))) =
      ui32Val;
}


x86 assembly (clang, -O0):
<ADI32BitsClear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movl   $0x20,-0x10(%rbp)
movslq -0xc(%rbp),%rcx
mov    -0x4(%rbp),%eax
add    -0x10(%rbp),%eax
mov    -0x8(%rbp),%edx
and    $0xfc,%edx
add    %edx,%eax
cltq
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADI32BitsClear>:
movslq %edx,%rax
movslq %edi,%rcx
and    $0xfc,%esi
mov    %rax,0x20(%rcx,%rsi,1)
ret

LLVM IR (-O0):
define void @ADI32BitsClear(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 32, i32* %7
%8 = load i32, i32* %6
%9 = sext i32 %8 to i64
%10 = load i32, i32* %4
%11 = load i32, i32* %7
%12 = add nsw i32 %10, %11
%13 = load i32, i32* %5
%14 = and i32 %13, 252
%15 = add nsw i32 %12, %14
%16 = sext i32 %15 to i64
%17 = inttoptr i64 %16 to i64*
store volatile i64 %9, i64* %17
ret void
}

LLVM IR (-O2):
define void @ADI32BitsClear(i32 %0, i32 %1, i32 %2) {
%4 = sext i32 %2 to i64
%5 = add nsw i32 %0, 32
%6 = and i32 %1, 252
%7 = add nsw i32 %5, %6
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i64*
store volatile i64 %4, i64* %9
ret void
}
/* Type definitions */
struct Symbol {
  int dummy;
};

/* Variables and functions */
struct Symbol *combine(struct Symbol *);
struct Symbol *interpret(struct Symbol *);
int /*<<< orphan*/ printSymbol(int /*<<< orphan*/, struct Symbol *,
                               int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
struct Symbol *translate(char *);
struct Symbol *parse(char *data) {
  struct Symbol *symbols = translate(data);
  symbols = interpret(symbols);
  printSymbol(stderr, symbols, 0);
  struct Symbol *tree = combine(symbols);
  return tree;
}


x86 assembly (clang, -O0):
<parse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1060 <translate@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <interpret@plt>
mov    %rax,-0x10(%rbp)
mov    0x2e73(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1040 <printSymbol@plt>
mov    -0x10(%rbp),%rdi
call   1030 <combine@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse>:
push   %rbx
call   1060 <translate@plt>
mov    %rax,%rdi
call   1050 <interpret@plt>
mov    %rax,%rbx
mov    0x2e88(%rip),%rax
mov    (%rax),%edi
mov    %rbx,%rsi
xor    %edx,%edx
call   1040 <printSymbol@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <combine@plt>

LLVM IR (-O0):
%struct.Symbol = type { i32 }
@stderr = global i32 0
define %struct.Symbol* @parse(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.Symbol*
%4 = alloca %struct.Symbol*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call %struct.Symbol* @translate(i8* %5)
store %struct.Symbol* %6, %struct.Symbol** %3
%7 = load %struct.Symbol*, %struct.Symbol** %3
%8 = call %struct.Symbol* @interpret(%struct.Symbol* %7)
store %struct.Symbol* %8, %struct.Symbol** %3
%9 = load i32, i32* @stderr
%10 = load %struct.Symbol*, %struct.Symbol** %3
%11 = call i32 @printSymbol(i32 %9, %struct.Symbol* %10, i32 0)
%12 = load %struct.Symbol*, %struct.Symbol** %3
%13 = call %struct.Symbol* @combine(%struct.Symbol* %12)
store %struct.Symbol* %13, %struct.Symbol** %4
%14 = load %struct.Symbol*, %struct.Symbol** %4
ret %struct.Symbol* %14
}

LLVM IR (-O2):
%struct.Symbol = type { i32 }
@stderr = global i32 0
define %struct.Symbol* @parse(i8* %0) {
%2 = tail call %struct.Symbol* @translate(i8* %0)
%3 = tail call %struct.Symbol* @interpret(%struct.Symbol* %2)
%4 = load i32, i32* @stderr
%5 = tail call i32 @printSymbol(i32 %4, %struct.Symbol* %3, i32 0)
%6 = tail call %struct.Symbol* @combine(%struct.Symbol* %3)
ret %struct.Symbol* %6
}
/* Variables and functions */
int rand();
int main(int argc, char **argv) {
  int x;
  int r = rand();
  if (0 < r) {
    x = 42;
  } else {
    x = 7;
  }
  return x;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x18(%rbp)
xor    %eax,%eax
cmp    -0x18(%rbp),%eax
jge    1147 <main+0x37>
movl   $0x2a,-0x14(%rbp)
jmp    114e <main+0x3e>
movl   $0x7,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
test   %eax,%eax
mov    $0x2a,%ecx
mov    $0x7,%eax
cmovg  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = call i32 (...) @rand()
store i32 %8, i32* %7
%9 = load i32, i32* %7
%10 = icmp slt i32 0, %9
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 42, i32* %6
br label %13
12: ; preds = %2
store i32 7, i32* %6
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %6
ret i32 %14
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @rand()
%4 = icmp sgt i32 %3, 0
%5 = select i1 %4, i32 42, i32 7
ret i32 %5
}
int pthread_atfork(void (*prefork)(void), void (*postfork_parent)(void),
                   void (*postfork_child)(void)) {
  return 0;
}


x86 assembly (clang, -O0):
<pthread_atfork>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_atfork>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pthread_atfork(void ()* %0, void ()* %1, void ()* %2) {
%4 = alloca void ()*
%5 = alloca void ()*
%6 = alloca void ()*
store void ()* %0, void ()** %4
store void ()* %1, void ()** %5
store void ()* %2, void ()** %6
ret i32 0
}

LLVM IR (-O2):
define i32 @pthread_atfork(void ()* nocapture readnone %0, void ()* nocapture readnone %1, void ()* nocapture readnone %2) {
ret i32 0
}
/* Type definitions */
struct sockaddr {
  int dummy;
};
struct __uportsys_sockaddr {
  int dummy;
};
typedef int /*<<< orphan*/ ssize_t;
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
int /*<<< orphan*/ __uportsys_sendto(int, void const *, size_t, int,
                                     struct __uportsys_sockaddr const *,
                                     int /*<<< orphan*/, int /*<<< orphan*/ *);
int /*<<< orphan*/ errno;
ssize_t sendto(int sd, const void *buf, size_t len, int flags,
               const struct sockaddr *addr, socklen_t addr_len) {
  return __uportsys_sendto(sd, buf, len, flags,
                           (const struct __uportsys_sockaddr *)addr, addr_len,
                           &errno);
}


x86 assembly (clang, -O0):
<sendto>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9d,-0x2c(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    -0x28(%rbp),%r8
mov    -0x2c(%rbp),%r9d
mov    0x2e95(%rip),%rax
mov    %rax,(%rsp)
call   1030 <__uportsys_sendto@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sendto>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    %rax,(%rsp)
call   1030 <__uportsys_sendto@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
%struct.__uportsys_sockaddr = type { i32 }
@errno = global i32 0
define i32 @sendto(i32 %0, i8* %1, i64 %2, i32 %3, %struct.sockaddr* %4, i32 %5) {
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i64
%10 = alloca i32
%11 = alloca %struct.sockaddr*
%12 = alloca i32
store i32 %0, i32* %7
store i8* %1, i8** %8
store i64 %2, i64* %9
store i32 %3, i32* %10
store %struct.sockaddr* %4, %struct.sockaddr** %11
store i32 %5, i32* %12
%13 = load i32, i32* %7
%14 = load i8*, i8** %8
%15 = load i64, i64* %9
%16 = load i32, i32* %10
%17 = load %struct.sockaddr*, %struct.sockaddr** %11
%18 = bitcast %struct.sockaddr* %17 to %struct.__uportsys_sockaddr*
%19 = load i32, i32* %12
%20 = call i32 @__uportsys_sendto(i32 %13, i8* %14, i64 %15, i32 %16, %struct.__uportsys_sockaddr* %18, i32 %19, i32* @errno)
ret i32 %20
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
%struct.__uportsys_sockaddr = type { i32 }
@errno = global i32 0
define i32 @sendto(i32 %0, i8* %1, i64 %2, i32 %3, %struct.sockaddr* %4, i32 %5) {
%7 = bitcast %struct.sockaddr* %4 to %struct.__uportsys_sockaddr*
%8 = tail call i32 @__uportsys_sendto(i32 %0, i8* %1, i64 %2, i32 %3, %struct.__uportsys_sockaddr* %7, i32 %5, i32* @errno)
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fread(unsigned char *, int, int, int /*<<< orphan*/ *);
int edge_read(unsigned char *edgetable, FILE *input) {
  int read;
  read = fread(edgetable, 1, 21288960, input);
  if (read < 21288960) {
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<edge_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rcx
mov    $0x1,%esi
mov    $0x144d800,%edx
call   1030 <fread@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x144d800,-0x1c(%rbp)
jge    1153 <edge_read+0x43>
movl   $0x0,-0x4(%rbp)
jmp    115a <edge_read+0x4a>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<edge_read>:
push   %rax
mov    %rsi,%rcx
mov    $0x1,%esi
mov    $0x144d800,%edx
call   1030 <fread@plt>
xor    %ecx,%ecx
cmp    $0x144d800,%eax
setge  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @edge_read(i8* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32
store i8* %0, i8** %4
store i32* %1, i32** %5
%7 = load i8*, i8** %4
%8 = load i32*, i32** %5
%9 = call i32 @fread(i8* %7, i32 1, i32 21288960, i32* %8)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp slt i32 %10, 21288960
br i1 %11, label %12, label %13
12: ; preds = %2
store i32 0, i32* %3
br label %14
13: ; preds = %2
store i32 1, i32* %3
br label %14
14: ; preds = %13, %12
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @edge_read(i8* nocapture %0, i32* nocapture %1) {
%3 = tail call i32 @fread(i8* %0, i32 1, i32 21288960, i32* %1)
%4 = icmp sgt i32 %3, 21288959
%5 = zext i1 %4 to i32
ret i32 %5
}
unsigned char svs_size_code(int w) {
  if (w <= 40)
    return '1';
  if (w <= 128)
    return '2';
  if (w <= 160)
    return '3';
  if (w <= 320)
    return '4';
  if (w <= 640)
    return '7';
  return '9';
}


x86 assembly (clang, -O0):
<svs_size_code>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x28,-0x8(%rbp)
jg     111a <svs_size_code+0x1a>
movb   $0x31,-0x1(%rbp)
jmp    1176 <svs_size_code+0x76>
cmpl   $0x80,-0x8(%rbp)
jg     1130 <svs_size_code+0x30>
movb   $0x32,-0x1(%rbp)
jmp    1176 <svs_size_code+0x76>
cmpl   $0xa0,-0x8(%rbp)
jg     1146 <svs_size_code+0x46>
movb   $0x33,-0x1(%rbp)
jmp    1176 <svs_size_code+0x76>
cmpl   $0x140,-0x8(%rbp)
jg     115c <svs_size_code+0x5c>
movb   $0x34,-0x1(%rbp)
jmp    1176 <svs_size_code+0x76>
cmpl   $0x280,-0x8(%rbp)
jg     1172 <svs_size_code+0x72>
movb   $0x37,-0x1(%rbp)
jmp    1176 <svs_size_code+0x76>
movb   $0x39,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<svs_size_code>:
mov    $0x31,%al
cmp    $0x29,%edi
jl     1132 <svs_size_code+0x32>
mov    $0x32,%al
cmp    $0x81,%edi
jb     1132 <svs_size_code+0x32>
mov    $0x33,%al
cmp    $0xa1,%edi
jb     1132 <svs_size_code+0x32>
mov    $0x34,%al
cmp    $0x141,%edi
jb     1132 <svs_size_code+0x32>
cmp    $0x281,%edi
setae  %al
add    %al,%al
add    $0x37,%al
ret

LLVM IR (-O0):
define zeroext i8 @svs_size_code(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 40
br i1 %5, label %6, label %7
6: ; preds = %1
store i8 49, i8* %2
br label %24
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp sle i32 %8, 128
br i1 %9, label %10, label %11
10: ; preds = %7
store i8 50, i8* %2
br label %24
11: ; preds = %7
%12 = load i32, i32* %3
%13 = icmp sle i32 %12, 160
br i1 %13, label %14, label %15
14: ; preds = %11
store i8 51, i8* %2
br label %24
15: ; preds = %11
%16 = load i32, i32* %3
%17 = icmp sle i32 %16, 320
br i1 %17, label %18, label %19
18: ; preds = %15
store i8 52, i8* %2
br label %24
19: ; preds = %15
%20 = load i32, i32* %3
%21 = icmp sle i32 %20, 640
br i1 %21, label %22, label %23
22: ; preds = %19
store i8 55, i8* %2
br label %24
23: ; preds = %19
store i8 57, i8* %2
br label %24
24: ; preds = %23, %22, %18, %14, %10, %6
%25 = load i8, i8* %2
ret i8 %25
}

LLVM IR (-O2):
define zeroext i8 @svs_size_code(i32 %0) {
%2 = icmp slt i32 %0, 41
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = icmp ult i32 %0, 129
br i1 %4, label %12, label %5
5: ; preds = %3
%6 = icmp ult i32 %0, 161
br i1 %6, label %12, label %7
7: ; preds = %5
%8 = icmp ult i32 %0, 321
br i1 %8, label %12, label %9
9: ; preds = %7
%10 = icmp ult i32 %0, 641
%11 = select i1 %10, i8 55, i8 57
br label %12
12: ; preds = %9, %7, %5, %3, %1
%13 = phi i8 [ 49, %1 ], [ 50, %3 ], [ 51, %5 ], [ 52, %7 ], [ %11, %9 ]
ret i8 %13
}
void SPIDMAEnable(unsigned long ulBase, unsigned long ulDmaMode) {

  ;
  (*((volatile unsigned long *)(ulBase + 0x00000004))) &=
      ~(0x00000002 | 0x00000001);
  (*((volatile unsigned long *)(ulBase + 0x00000004))) |= ulDmaMode;
}


x86 assembly (clang, -O0):
<SPIDMAEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rcx
and    $0xfffffffffffffffc,%rcx
mov    %rcx,0x4(%rax)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPIDMAEnable>:
andq   $0xfffffffffffffffc,0x4(%rdi)
or     %rsi,0x4(%rdi)
ret

LLVM IR (-O0):
define void @SPIDMAEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = add i64 %5, 4
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = and i64 %8, -4
store volatile i64 %9, i64* %7
%10 = load i64, i64* %4
%11 = load i64, i64* %3
%12 = add i64 %11, 4
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
%15 = or i64 %14, %10
store volatile i64 %15, i64* %13
ret void
}

LLVM IR (-O2):
define void @SPIDMAEnable(i64 %0, i64 %1) {
%3 = add i64 %0, 4
%4 = inttoptr i64 %3 to i64*
%5 = load volatile i64, i64* %4
%6 = and i64 %5, -4
store volatile i64 %6, i64* %4
%7 = load volatile i64, i64* %4
%8 = or i64 %7, %1
store volatile i64 %8, i64* %4
ret void
}
/* Type definitions */
struct target {
  int dummy;
};
struct dm_interface {
  int dummy;
};

/* Variables and functions */
int status_cmd(struct dm_interface *, char const *, struct target **,
               int /*<<< orphan*/);
int dm_status(struct dm_interface *dmi, const char *name,
              struct target **targets) {
  return status_cmd(dmi, name, targets, 0);
}


x86 assembly (clang, -O0):
<dm_status>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
call   1030 <status_cmd@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dm_status>:
xor    %ecx,%ecx
jmp    1030 <status_cmd@plt>

LLVM IR (-O0):
%struct.dm_interface = type { i32 }
%struct.target = type { i32 }
define i32 @dm_status(%struct.dm_interface* %0, i8* %1, %struct.target** %2) {
%4 = alloca %struct.dm_interface*
%5 = alloca i8*
%6 = alloca %struct.target**
store %struct.dm_interface* %0, %struct.dm_interface** %4
store i8* %1, i8** %5
store %struct.target** %2, %struct.target*** %6
%7 = load %struct.dm_interface*, %struct.dm_interface** %4
%8 = load i8*, i8** %5
%9 = load %struct.target**, %struct.target*** %6
%10 = call i32 @status_cmd(%struct.dm_interface* %7, i8* %8, %struct.target** %9, i32 0)
ret i32 %10
}

LLVM IR (-O2):
%struct.dm_interface = type { i32 }
%struct.target = type { i32 }
define i32 @dm_status(%struct.dm_interface* %0, i8* %1, %struct.target** %2) {
%4 = tail call i32 @status_cmd(%struct.dm_interface* %0, i8* %1, %struct.target** %2, i32 0)
ret i32 %4
}