xunge/DecIR huggingface dataset:
/* Type definitions */
struct timeval {
  scalar_t__ tv_sec;
  scalar_t__ tv_usec;
};
typedef long long int64_t;

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
int64_t gettime_i64(void) {
  struct timeval tv;
  gettimeofday(&tv, NULL);
  return (int64_t)tv.tv_usec + (int64_t)tv.tv_sec * 1000000LL;
}


x86 assembly (clang, -O0):
<gettime_i64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
mov    -0x8(%rbp),%rax
imul   $0xf4240,-0x10(%rbp),%rcx
add    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gettime_i64>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
imul   $0xf4240,0x8(%rsp),%rax
add    0x10(%rsp),%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { i64, i64 }
define i64 @gettime_i64() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%4 = load i64, i64* %3
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%6 = load i64, i64* %5
%7 = mul nsw i64 %6, 1000000
%8 = add nsw i64 %4, %7
ret i64 %8
}

LLVM IR (-O2):
%struct.timeval = type { i64, i64 }
define i64 @gettime_i64() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%5 = load i64, i64* %4
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%7 = load i64, i64* %6
%8 = mul nsw i64 %7, 1000000
%9 = add nsw i64 %8, %5
ret i64 %9
}
/* Variables and functions */
int strlen(char *);
int __tiger__size(char *s) { return strlen(s); }


x86 assembly (clang, -O0):
<__tiger__size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__tiger__size>:
jmp    1030 <strlen@plt>

LLVM IR (-O0):
define i32 @__tiger__size(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strlen(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @__tiger__size(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ my_free_buddy(void *);
void my_free(void *ptr) { my_free_buddy(ptr); }


x86 assembly (clang, -O0):
<my_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <my_free_buddy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_free>:
jmp    1030 <my_free_buddy@plt>

LLVM IR (-O0):
define void @my_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @my_free_buddy(i8* %3)
ret void
}

LLVM IR (-O2):
define void @my_free(i8* %0) {
%2 = tail call i32 @my_free_buddy(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ strcmp(char const *, char *);
int main(void) {
  const char *t = "12";
  const char *u = "<:";
  if (strcmp(t, "12") || strcmp(u, "<:"))
    abort();
  else
    return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    0xec2(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xeb0(%rip),%rsi
call   1040 <strcmp@plt>
cmp    $0x0,%rax
jne    1179 <main+0x59>
mov    -0x18(%rbp),%rdi
lea    0xe99(%rip),%rsi
call   1040 <strcmp@plt>
cmp    $0x0,%rax
je     1180 <main+0x60>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
mov    %rdi,%rsi
call   1040 <strcmp@plt>
test   %rax,%rax
jne    114d <main+0x2d>
lea    0xec7(%rip),%rdi
mov    %rdi,%rsi
call   1040 <strcmp@plt>
test   %rax,%rax
jne    114d <main+0x2d>
xor    %eax,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"12\00"
@.str.1 = [3 x i8] c"<:\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %2
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8** %3
%4 = load i8*, i8** %2
%5 = call i64 @strcmp(i8* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%6 = icmp ne i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %0
%8 = load i8*, i8** %3
%9 = call i64 @strcmp(i8* %8, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %7, %0
%12 = call i32 (...) @abort()
unreachable
13: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"12\00"
@.str.1 = [3 x i8] c"<:\00"
define i32 @main() {
%1 = tail call i64 @strcmp(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = tail call i64 @strcmp(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3, %0
%7 = tail call i32 (...) @abort()
unreachable
8: ; preds = %3
ret i32 0
}
/* Type definitions */
struct img_vec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ img_vec_insert(struct img_vec *, void *, int /*<<< orphan*/);
int /*<<< orphan*/ img_vec_len(struct img_vec *);
void img_vec_push_back(struct img_vec *vec, void *elem) {
  img_vec_insert(vec, elem, img_vec_len(vec));
}


x86 assembly (clang, -O0):
<img_vec_push_back>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <img_vec_len@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1040 <img_vec_insert@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<img_vec_push_back>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <img_vec_len@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <img_vec_insert@plt>

LLVM IR (-O0):
%struct.img_vec = type { i32 }
define void @img_vec_push_back(%struct.img_vec* %0, i8* %1) {
%3 = alloca %struct.img_vec*
%4 = alloca i8*
store %struct.img_vec* %0, %struct.img_vec** %3
store i8* %1, i8** %4
%5 = load %struct.img_vec*, %struct.img_vec** %3
%6 = load i8*, i8** %4
%7 = load %struct.img_vec*, %struct.img_vec** %3
%8 = call i32 @img_vec_len(%struct.img_vec* %7)
%9 = call i32 @img_vec_insert(%struct.img_vec* %5, i8* %6, i32 %8)
ret void
}

LLVM IR (-O2):
%struct.img_vec = type { i32 }
define void @img_vec_push_back(%struct.img_vec* %0, i8* %1) {
%3 = tail call i32 @img_vec_len(%struct.img_vec* %0)
%4 = tail call i32 @img_vec_insert(%struct.img_vec* %0, i8* %1, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, char *);
int /*<<< orphan*/ stderr;
void bye(char *msg1, char *msg2) {
  fprintf(stderr, "gzappend error: %s%s\n", msg1, msg2);
  exit(1);
}


x86 assembly (clang, -O0):
<bye>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xeb8(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<bye>:
push   %rax
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    0x2eb2(%rip),%rax
mov    (%rax),%edi
lea    0xec9(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [22 x i8] c"gzappend error: %s%s\0A\00"
define void @bye(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %6, i8* %7)
%9 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [22 x i8] c"gzappend error: %s%s\0A\00"
define void @bye(i8* %0, i8* %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%5 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ F_SETFL;
int /*<<< orphan*/ O_NONBLOCK;
int /*<<< orphan*/ STDIN_FILENO;
int /*<<< orphan*/ fcntl(int /*<<< orphan*/, int /*<<< orphan*/,
                         int /*<<< orphan*/);
int prepare_getch();
int prepare_getch_nb(void) {
  int rc;
  rc = prepare_getch();
  fcntl(STDIN_FILENO, F_SETFL, O_NONBLOCK);
  return rc;
}


x86 assembly (clang, -O0):
<prepare_getch_nb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <prepare_getch@plt>
mov    %eax,-0x4(%rbp)
mov    0x2e97(%rip),%rax
mov    (%rax),%edi
mov    0x2e96(%rip),%rax
mov    (%rax),%esi
mov    0x2e9d(%rip),%rax
mov    (%rax),%edx
call   1030 <fcntl@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prepare_getch_nb>:
push   %rbx
xor    %eax,%eax
call   1040 <prepare_getch@plt>
mov    %eax,%ebx
mov    0x2e9f(%rip),%rax
mov    (%rax),%edi
mov    0x2e9e(%rip),%rax
mov    (%rax),%esi
mov    0x2ea5(%rip),%rax
mov    (%rax),%edx
call   1030 <fcntl@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@STDIN_FILENO = global i32 0
@F_SETFL = global i32 0
@O_NONBLOCK = global i32 0
define i32 @prepare_getch_nb() {
%1 = alloca i32
%2 = call i32 (...) @prepare_getch()
store i32 %2, i32* %1
%3 = load i32, i32* @STDIN_FILENO
%4 = load i32, i32* @F_SETFL
%5 = load i32, i32* @O_NONBLOCK
%6 = call i32 @fcntl(i32 %3, i32 %4, i32 %5)
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
@STDIN_FILENO = global i32 0
@F_SETFL = global i32 0
@O_NONBLOCK = global i32 0
define i32 @prepare_getch_nb() {
%1 = tail call i32 (...) @prepare_getch()
%2 = load i32, i32* @STDIN_FILENO
%3 = load i32, i32* @F_SETFL
%4 = load i32, i32* @O_NONBLOCK
%5 = tail call i32 @fcntl(i32 %2, i32 %3, i32 %4)
ret i32 %1
}
ISR(TIMER1_COMPC_vect) {
  DEBUG("ISR "
        "TIMER1_COMPC"
        " occured");
}


x86 assembly (clang, -O0):
<ISR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
lea    0xede(%rip),%rdi
mov    $0x0,%al
call   1030 <DEBUG@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ISR>:
lea    0xee9(%rip),%rdi
xor    %eax,%eax
jmp    1030 <DEBUG@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"ISR TIMER1_COMPC occured\00"
define i32 @ISR(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 (i8*, ...) bitcast (i32 (...)* @DEBUG to i32 (i8*, ...)*)(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
@.str = [25 x i8] c"ISR TIMER1_COMPC occured\00"
define i32 @ISR(i32 %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @DEBUG to i32 (i8*, ...)*)(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
long syscall(int, long, long, long, long, long, int /*<<< orphan*/);
long syscall5(int nr, long a, long b, long c, long d, long e) {
  return syscall(nr, a, b, c, d, e, 0);
}


x86 assembly (clang, -O0):
<syscall5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    -0x30(%rbp),%r9
xor    %eax,%eax
movl   $0x0,(%rsp)
call   1030 <syscall@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscall5>:
push   %rax
movl   $0x0,(%rsp)
call   1030 <syscall@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i64 @syscall5(i32 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5) {
%7 = alloca i32
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
%12 = alloca i64
store i32 %0, i32* %7
store i64 %1, i64* %8
store i64 %2, i64* %9
store i64 %3, i64* %10
store i64 %4, i64* %11
store i64 %5, i64* %12
%13 = load i32, i32* %7
%14 = load i64, i64* %8
%15 = load i64, i64* %9
%16 = load i64, i64* %10
%17 = load i64, i64* %11
%18 = load i64, i64* %12
%19 = call i64 @syscall(i32 %13, i64 %14, i64 %15, i64 %16, i64 %17, i64 %18, i32 0)
ret i64 %19
}

LLVM IR (-O2):
define i64 @syscall5(i32 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5) {
%7 = tail call i64 @syscall(i32 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5, i32 0)
ret i64 %7
}
void g_queue_peek_head_link() {}


x86 assembly (clang, -O0):
<g_queue_peek_head_link>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_queue_peek_head_link>:
ret

LLVM IR (-O0):
define void @g_queue_peek_head_link() {
ret void
}

LLVM IR (-O2):
define void @g_queue_peek_head_link() {
ret void
}
/* Type definitions */
typedef scalar_t__ pid_t;

/* Variables and functions */
int /*<<< orphan*/ WNOHANG;
int /*<<< orphan*/ printf(char *, int);
scalar_t__ waitpid(int, int *, int /*<<< orphan*/);
void sigchld_handler(int s) {
  pid_t pid;
  int stat;
  while ((pid = waitpid(-1, &stat, WNOHANG)) > 0)
    printf("Child %d terminated.\n", (int)pid);
}


x86 assembly (clang, -O0):
<sigchld_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2eb6(%rip),%rax
mov    (%rax),%edx
mov    $0xffffffff,%edi
lea    -0x14(%rbp),%rsi
call   1040 <waitpid@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jle    1167 <sigchld_handler+0x47>
mov    -0x10(%rbp),%rax
mov    %eax,%esi
lea    0xea3(%rip),%rdi
call   1030 <printf@plt>
jmp    112b <sigchld_handler+0xb>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigchld_handler>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    0x2eb8(%rip),%r15
mov    (%r15),%edx
lea    0xc(%rsp),%rsi
mov    $0xffffffff,%edi
call   1040 <waitpid@plt>
test   %rax,%rax
jle    117f <sigchld_handler+0x5f>
lea    0xeb2(%rip),%r14
lea    0xc(%rsp),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r14,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
mov    (%r15),%edx
mov    $0xffffffff,%edi
mov    %rbx,%rsi
call   1040 <waitpid@plt>
test   %rax,%rax
jg     1160 <sigchld_handler+0x40>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@WNOHANG = global i32 0
@.str = [22 x i8] c"Child %d terminated.\0A\00"
define void @sigchld_handler(i32 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i32
store i32 %0, i32* %2
br label %5
5: ; preds = %9, %1
%6 = load i32, i32* @WNOHANG
%7 = call i64 @waitpid(i32 -1, i32* %4, i32 %6)
store i64 %7, i64* %3
%8 = icmp sgt i64 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %5
%10 = load i64, i64* %3
%11 = trunc i64 %10 to i32
%12 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %11)
br label %5
13: ; preds = %5
ret void
}

LLVM IR (-O2):
@WNOHANG = global i32 0
@.str = [22 x i8] c"Child %d terminated.\0A\00"
define void @sigchld_handler(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = load i32, i32* @WNOHANG
%5 = call i64 @waitpid(i32 -1, i32* %2, i32 %4)
%6 = icmp sgt i64 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %1, %7
%8 = phi i64 [ %12, %7 ], [ %5, %1 ]
%9 = trunc i64 %8 to i32
%10 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = load i32, i32* @WNOHANG
%12 = call i64 @waitpid(i32 -1, i32* %2, i32 %11)
%13 = icmp sgt i64 %12, 0
br i1 %13, label %7, label %14
14: ; preds = %7, %1
ret void
}
char *realpath(const char *path, char *resolved_path) {}


x86 assembly (clang, -O0):
<realpath>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<realpath>:
ret

LLVM IR (-O0):
define i8* @realpath(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %3
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @realpath(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i8* undef
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int celcon_read_quaddobl_random_coefficient_system(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(471, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<celcon_read_quaddobl_random_coefficient_system>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x1d7,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<celcon_read_quaddobl_random_coefficient_system>:
mov    $0x1d7,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @celcon_read_quaddobl_random_coefficient_system() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 471, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @celcon_read_quaddobl_random_coefficient_system() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 471, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
int a() { return 99; }


x86 assembly (clang, -O0):
<a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x63,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<a>:
mov    $0x63,%eax
ret

LLVM IR (-O0):
define i32 @a() {
ret i32 99
}

LLVM IR (-O2):
define i32 @a() {
ret i32 99
}
/* Variables and functions */
int FD_SETSIZE;
int getFDSetSize() { return FD_SETSIZE; }


x86 assembly (clang, -O0):
<getFDSetSize>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getFDSetSize>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@FD_SETSIZE = global i32 0
define i32 @getFDSetSize() {
%1 = load i32, i32* @FD_SETSIZE
ret i32 %1
}

LLVM IR (-O2):
@FD_SETSIZE = global i32 0
define i32 @getFDSetSize() {
%1 = load i32, i32* @FD_SETSIZE
ret i32 %1
}
double eoe(double t) {
  return (0.016708617 + t * (-0.000042037 + t * -0.0000001235));
}


x86 assembly (clang, -O0):
<eoe>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
movsd  0xeed(%rip),%xmm2
mulsd  %xmm2,%xmm1
movsd  0xee9(%rip),%xmm2
addsd  %xmm2,%xmm1
mulsd  %xmm1,%xmm0
movsd  0xec9(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<eoe>:
movsd  0xef8(%rip),%xmm1
mulsd  %xmm0,%xmm1
addsd  0xef4(%rip),%xmm1
mulsd  %xmm1,%xmm0
addsd  0xef0(%rip),%xmm0
ret

LLVM IR (-O0):
define double @eoe(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = call double @llvm.fmuladd.f64(double %4, double -1.235000e-07, double -4.203700e-05)
%6 = call double @llvm.fmuladd.f64(double %3, double %5, double 0x3F911C104E4E3915)
ret double %6
}

LLVM IR (-O2):
define double @eoe(double %0) {
%2 = tail call double @llvm.fmuladd.f64(double %0, double -1.235000e-07, double -4.203700e-05)
%3 = tail call double @llvm.fmuladd.f64(double %0, double %2, double 0x3F911C104E4E3915)
ret double %3
}
/* Type definitions */
typedef unsigned long long uint64_t;

/* Variables and functions */
uint64_t frame_number_from_pagemap(uint64_t value) {
  return value & ((1ULL << 54) - 1);
}


x86 assembly (clang, -O0):
<frame_number_from_pagemap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movabs $0x3fffffffffffff,%rax
and    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<frame_number_from_pagemap>:
movabs $0x3fffffffffffff,%rax
and    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @frame_number_from_pagemap(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 18014398509481983
ret i64 %4
}

LLVM IR (-O2):
define i64 @frame_number_from_pagemap(i64 %0) {
%2 = and i64 %0, 18014398509481983
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ clear_io_bit(int, int);
void TOSH_MAKE_INC_INPUT() { clear_io_bit(0x36, 2); }


x86 assembly (clang, -O0):
<TOSH_MAKE_INC_INPUT>:
push   %rbp
mov    %rsp,%rbp
mov    $0x36,%edi
mov    $0x2,%esi
call   1030 <clear_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_MAKE_INC_INPUT>:
mov    $0x36,%edi
mov    $0x2,%esi
jmp    1030 <clear_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_MAKE_INC_INPUT() {
%1 = call i32 @clear_io_bit(i32 54, i32 2)
ret void
}

LLVM IR (-O2):
define void @TOSH_MAKE_INC_INPUT() {
%1 = tail call i32 @clear_io_bit(i32 54, i32 2)
ret void
}
void TimerUpdateRequestConfigure(unsigned long ulBase,
                                 unsigned long ulUpdateSource) {

  ;

  ;
  if (ulUpdateSource == 0x00000000) {
    (*((volatile unsigned long *)(ulBase + 0x00000000))) &= ~0x00000004;
  } else {
    (*((volatile unsigned long *)(ulBase + 0x00000000))) |= 0x00000004;
  }
}


x86 assembly (clang, -O0):
<TimerUpdateRequestConfigure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    112a <TimerUpdateRequestConfigure+0x2a>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
and    $0xfffffffffffffffb,%rcx
mov    %rcx,(%rax)
jmp    1138 <TimerUpdateRequestConfigure+0x38>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
or     $0x4,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerUpdateRequestConfigure>:
xor    %eax,%eax
test   %rsi,%rsi
setne  %al
mov    (%rdi),%rcx
and    $0xfffffffffffffffb,%rcx
lea    (%rcx,%rax,4),%rax
mov    %rax,(%rdi)
ret

LLVM IR (-O0):
define void @TimerUpdateRequestConfigure(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %2
%8 = load i64, i64* %3
%9 = add i64 %8, 0
%10 = inttoptr i64 %9 to i64*
%11 = load volatile i64, i64* %10
%12 = and i64 %11, -5
store volatile i64 %12, i64* %10
br label %19
13: ; preds = %2
%14 = load i64, i64* %3
%15 = add i64 %14, 0
%16 = inttoptr i64 %15 to i64*
%17 = load volatile i64, i64* %16
%18 = or i64 %17, 4
store volatile i64 %18, i64* %16
br label %19
19: ; preds = %13, %7
ret void
}

LLVM IR (-O2):
define void @TimerUpdateRequestConfigure(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 0
%4 = inttoptr i64 %0 to i64*
%5 = load volatile i64, i64* %4
%6 = and i64 %5, -5
%7 = select i1 %3, i64 0, i64 4
%8 = or i64 %6, %7
store volatile i64 %8, i64* %4
ret void
}
/* Variables and functions */
int exit_status();
int /*<<< orphan*/ tap_plan(int, int /*<<< orphan*/ *);
int /*<<< orphan*/ test_portalBoolHandler();
int /*<<< orphan*/ test_portalFloatHandler();
int /*<<< orphan*/ test_portalUintHandler();
int /*<<< orphan*/ test_portalUlongHandler();
int main() {
  tap_plan(20, NULL);
  test_portalFloatHandler();
  test_portalUintHandler();
  test_portalUlongHandler();
  test_portalBoolHandler();
  return exit_status();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x14,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1050 <tap_plan@plt>
mov    $0x0,%al
call   1030 <test_portalFloatHandler@plt>
mov    $0x0,%al
call   1070 <test_portalUintHandler@plt>
mov    $0x0,%al
call   1080 <test_portalUlongHandler@plt>
mov    $0x0,%al
call   1060 <test_portalBoolHandler@plt>
mov    $0x0,%al
call   1040 <exit_status@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x14,%edi
xor    %esi,%esi
call   1050 <tap_plan@plt>
xor    %eax,%eax
call   1030 <test_portalFloatHandler@plt>
xor    %eax,%eax
call   1070 <test_portalUintHandler@plt>
xor    %eax,%eax
call   1080 <test_portalUlongHandler@plt>
xor    %eax,%eax
call   1060 <test_portalBoolHandler@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <exit_status@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @tap_plan(i32 20, i32* null)
%3 = call i32 (...) @test_portalFloatHandler()
%4 = call i32 (...) @test_portalUintHandler()
%5 = call i32 (...) @test_portalUlongHandler()
%6 = call i32 (...) @test_portalBoolHandler()
%7 = call i32 (...) @exit_status()
ret i32 %7
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @tap_plan(i32 20, i32* null)
%2 = tail call i32 (...) @test_portalFloatHandler()
%3 = tail call i32 (...) @test_portalUintHandler()
%4 = tail call i32 (...) @test_portalUlongHandler()
%5 = tail call i32 (...) @test_portalBoolHandler()
%6 = tail call i32 (...) @exit_status()
ret i32 %6
}
int segflag2pgflag(int seg_flags) {
  int page_flags = 0;
  page_flags |= (seg_flags & 4) > 0 ? 1 : 0;
  page_flags |= (seg_flags & 2) > 0 ? 2 : 0;
  page_flags |= (seg_flags & 1) > 0 ? 4 : 0;
  return page_flags;
}


x86 assembly (clang, -O0):
<segflag2pgflag>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%edx
and    $0x4,%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%edx
cmovg  %ecx,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edx
and    $0x2,%edx
xor    %eax,%eax
mov    $0x2,%ecx
cmp    $0x0,%edx
cmovg  %ecx,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edx
and    $0x1,%edx
xor    %eax,%eax
mov    $0x4,%ecx
cmp    $0x0,%edx
cmovg  %ecx,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<segflag2pgflag>:
rol    $0x4,%dil
mov    %edi,%eax
and    $0x33,%al
shl    $0x2,%al
shr    $0x2,%dil
and    $0x33,%dil
or     %al,%dil
mov    %edi,%eax
and    $0x50,%al
add    %al,%al
shr    %dil
and    $0x40,%dil
or     %al,%dil
shr    $0x5,%dil
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @segflag2pgflag(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = and i32 %4, 4
%6 = icmp sgt i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 1, i32 0
%9 = load i32, i32* %3
%10 = or i32 %9, %8
store i32 %10, i32* %3
%11 = load i32, i32* %2
%12 = and i32 %11, 2
%13 = icmp sgt i32 %12, 0
%14 = zext i1 %13 to i64
%15 = select i1 %13, i32 2, i32 0
%16 = load i32, i32* %3
%17 = or i32 %16, %15
store i32 %17, i32* %3
%18 = load i32, i32* %2
%19 = and i32 %18, 1
%20 = icmp sgt i32 %19, 0
%21 = zext i1 %20 to i64
%22 = select i1 %20, i32 4, i32 0
%23 = load i32, i32* %3
%24 = or i32 %23, %22
store i32 %24, i32* %3
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @segflag2pgflag(i32 %0) {
%2 = trunc i32 %0 to i3
%3 = tail call i3 @llvm.bitreverse.i3(i3 %2)
%4 = zext i3 %3 to i32
ret i32 %4
}
/* Variables and functions */
int getpid();
int dns_make_id(char *host) {
  (void)host;
  return getpid();
}


x86 assembly (clang, -O0):
<dns_make_id>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dns_make_id>:
xor    %eax,%eax
jmp    1030 <getpid@plt>

LLVM IR (-O0):
define i32 @dns_make_id(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (...) @getpid()
ret i32 %4
}

LLVM IR (-O2):
define i32 @dns_make_id(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @getpid()
ret i32 %2
}
void cpu_pause(void) { __builtin_ia32_pause(); }


x86 assembly (clang, -O0):
<cpu_pause>:
push   %rbp
mov    %rsp,%rbp
pause
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_pause>:
pause
ret

LLVM IR (-O0):
define void @cpu_pause() {
ret void
}

LLVM IR (-O2):
define void @cpu_pause() {
tail call void @llvm.x86.sse2.pause()
ret void
}
int test_imm_D9uint8_reg(unsigned char val) {
  return ((val) & (0xD9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D9uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xd9,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D9uint8_reg>:
test   $0xd9,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D9uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 217
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D9uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -39
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
const char *task_ve_name(struct task_struct *task) { return "0"; }


x86 assembly (clang, -O0):
<task_ve_name>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    0xef1(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<task_ve_name>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
%struct.task_struct = type opaque
@.str = [2 x i8] c"0\00"
define i8* @task_ve_name(%struct.task_struct* %0) {
%2 = alloca %struct.task_struct*
store %struct.task_struct* %0, %struct.task_struct** %2
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
%struct.task_struct = type opaque
@.str = [2 x i8] c"0\00"
define i8* @task_ve_name(%struct.task_struct* nocapture readnone %0) {
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0x0b() {
  Assert_real((isalpha(11) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              60, ("isalpha should be 0 for 0x0b"));
}


x86 assembly (clang, -O0):
<t_isalpha_0x0b>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3c,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0x0b>:
push   %rax
mov    $0xb,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3c,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0x0b\00"
define void @t_isalpha_0x0b() {
%1 = call i64 @isalpha(i32 11)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 60, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0x0b\00"
define void @t_isalpha_0x0b() {
%1 = tail call i64 @isalpha(i32 11)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 60, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
unsigned int get_free_inode();
unsigned int get_next_dentry_offset(unsigned int);
unsigned int create_d_entry(char *name, unsigned int p_inode, int type) {
  unsigned int offset;
  unsigned int inode;
  offset = get_next_dentry_offset(p_inode);
  inode = get_free_inode();
}


x86 assembly (clang, -O0):
<create_d_entry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x14(%rbp),%edi
call   1040 <get_next_dentry_offset@plt>
mov    %eax,-0x1c(%rbp)
mov    $0x0,%al
call   1030 <get_free_inode@plt>
mov    %eax,-0x20(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_d_entry>:
push   %rax
mov    %esi,%edi
call   1040 <get_next_dentry_offset@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <get_free_inode@plt>

LLVM IR (-O0):
define i32 @create_d_entry(i8* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%10 = load i32, i32* %6
%11 = call i32 @get_next_dentry_offset(i32 %10)
store i32 %11, i32* %8
%12 = call i32 (...) @get_free_inode()
store i32 %12, i32* %9
%13 = load i32, i32* %4
ret i32 %13
}

LLVM IR (-O2):
define i32 @create_d_entry(i8* nocapture readnone %0, i32 %1, i32 %2) {
%4 = tail call i32 @get_next_dentry_offset(i32 %1)
%5 = tail call i32 (...) @get_free_inode()
ret i32 undef
}
int swap(float *a, float *b) {
  float tmp;
  tmp = *a;
  *a = *b;
  *b = tmp;
  return 0;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
movss  %xmm0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x14(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
movss  (%rdi),%xmm0
movss  (%rsi),%xmm1
movss  %xmm1,(%rdi)
movss  %xmm0,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @swap(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
%5 = alloca float
store float* %0, float** %3
store float* %1, float** %4
%6 = load float*, float** %3
%7 = load float, float* %6
store float %7, float* %5
%8 = load float*, float** %4
%9 = load float, float* %8
%10 = load float*, float** %3
store float %9, float* %10
%11 = load float, float* %5
%12 = load float*, float** %4
store float %11, float* %12
ret i32 0
}

LLVM IR (-O2):
define i32 @swap(float* nocapture %0, float* nocapture %1) {
%3 = load float, float* %0
%4 = load float, float* %1
store float %4, float* %0
store float %3, float* %1
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ stdout;
void clrscr() {
  printf("\033[2J");
  fflush(stdout);
}


x86 assembly (clang, -O0):
<clrscr>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clrscr>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"\1B[2J\00"
@stdout = global i32 0
define void @clrscr() {
%1 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @stdout
%3 = call i32 @fflush(i32 %2)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"\1B[2J\00"
@stdout = global i32 0
define void @clrscr() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @stdout
%3 = tail call i32 @fflush(i32 %2)
ret void
}
/* Variables and functions */
scalar_t__ RAND_MAX;
double random();
double drand() { return random() / (double)RAND_MAX; }


x86 assembly (clang, -O0):
<drand>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <random@plt>
mov    0x2ec6(%rip),%rax
cvtsi2sdq (%rax),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<drand>:
push   %rax
xor    %eax,%eax
call   1030 <random@plt>
mov    0x2ec9(%rip),%rax
cvtsi2sdq (%rax),%xmm1
divsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define double @drand() {
%1 = call double (...) @random()
%2 = load i64, i64* @RAND_MAX
%3 = sitofp i64 %2 to double
%4 = fdiv double %1, %3
ret double %4
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define double @drand() {
%1 = tail call double (...) @random()
%2 = load i64, i64* @RAND_MAX
%3 = sitofp i64 %2 to double
%4 = fdiv double %1, %3
ret double %4
}
unsigned long _yy_map_string_hash_callbak(const void *key) {
  unsigned long hash;
  char *str;
  hash = 0;
  str = (char *)key;
  while (*str)
    hash = hash * 131 + (*str++);
  return hash;
}


x86 assembly (clang, -O0):
<_yy_map_string_hash_callbak>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     114c <_yy_map_string_hash_callbak+0x4c>
imul   $0x83,-0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
movsbq (%rcx),%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    1118 <_yy_map_string_hash_callbak+0x18>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_yy_map_string_hash_callbak>:
mov    (%rdi),%cl
test   %cl,%cl
je     112a <_yy_map_string_hash_callbak+0x2a>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
imul   $0x83,%rax,%rdx
movsbq %cl,%rax
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <_yy_map_string_hash_callbak+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @_yy_map_string_hash_callbak(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
store i8* %0, i8** %2
store i64 0, i64* %3
%5 = load i8*, i8** %2
store i8* %5, i8** %4
br label %6
6: ; preds = %10, %1
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load i64, i64* %3
%12 = mul i64 %11, 131
%13 = load i8*, i8** %4
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %4
%15 = load i8, i8* %13
%16 = sext i8 %15 to i64
%17 = add i64 %12, %16
store i64 %17, i64* %3
br label %6
18: ; preds = %6
%19 = load i64, i64* %3
ret i64 %19
}

LLVM IR (-O2):
define i64 @_yy_map_string_hash_callbak(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i8* [ %9, %4 ], [ %0, %1 ]
%7 = phi i64 [ %11, %4 ], [ 0, %1 ]
%8 = mul i64 %7, 131
%9 = getelementptr inbounds i8, i8* %6, i64 1
%10 = sext i8 %5 to i64
%11 = add i64 %8, %10
%12 = load i8, i8* %9
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ 0, %1 ], [ %11, %4 ]
ret i64 %15
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ strlen(char *);
int /*<<< orphan*/ write(int, char *, int /*<<< orphan*/);
int error(char *mesg) {
  write(2, mesg, strlen(mesg));
  exit(1);
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x10(%rbp),%rsi
mov    %eax,%edx
mov    $0x2,%edi
call   1030 <write@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<error>:
push   %rbx
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    $0x2,%edi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <write@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define i32 @error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = call i32 @write(i32 2, i8* %3, i32 %5)
%7 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define i32 @error(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32 @write(i32 2, i8* %0, i32 %2)
%4 = tail call i32 @exit(i32 1)
unreachable
}
unsigned short inw(unsigned short _port) {
  unsigned short data;
  asm volatile("push %%ax \n"
               "push %%dx \n"
               "mov %1, %%dx \n"
               "in %%dx, %%ax \n"
               "mov %%ax, %0 \n"
               "pop %%dx \n"
               "pop %%ax \n"
               : "=r"(data)
               : "r"(_port)
               :);
  return data;
}


x86 assembly (clang, -O0):
<inw>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%ax
push   %ax
push   %dx
mov    %ax,%dx
in     (%dx),%ax
mov    %ax,%ax
pop    %dx
pop    %ax
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inw>:
push   %ax
push   %dx
mov    %di,%dx
in     (%dx),%ax
mov    %ax,%ax
pop    %dx
pop    %ax
ret

LLVM IR (-O0):
define zeroext i16 @inw(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i16 asm sideeffect "push %ax \0Apush %dx \0Amov $1, %dx \0Ain %dx, %ax \0Amov %ax, $0 \0Apop %dx \0Apop %ax \0A", "=r,r,~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i16 %5, i16* %3
%6 = load i16, i16* %3
ret i16 %6
}

LLVM IR (-O2):
define zeroext i16 @inw(i16 zeroext %0) {
%2 = tail call i16 asm sideeffect "push %ax \0Apush %dx \0Amov $1, %dx \0Ain %dx, %ax \0Amov %ax, $0 \0Apop %dx \0Apop %ax \0A", "=r,r,~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i16 %2
}
float ANTweenTimingFunctionCubicIn(float time, float begin, float change,
                                   float duration) {
  time /= duration;
  return change * time * time * time + begin;
}


x86 assembly (clang, -O0):
<ANTweenTimingFunctionCubicIn>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0x10(%rbp),%xmm1
movss  -0x4(%rbp),%xmm0
divss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0xc(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ANTweenTimingFunctionCubicIn>:
divss  %xmm3,%xmm0
mulss  %xmm0,%xmm2
mulss  %xmm0,%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @ANTweenTimingFunctionCubicIn(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %8
%10 = load float, float* %5
%11 = fdiv float %10, %9
store float %11, float* %5
%12 = load float, float* %7
%13 = load float, float* %5
%14 = fmul float %12, %13
%15 = load float, float* %5
%16 = fmul float %14, %15
%17 = load float, float* %5
%18 = load float, float* %6
%19 = call float @llvm.fmuladd.f32(float %16, float %17, float %18)
ret float %19
}

LLVM IR (-O2):
define float @ANTweenTimingFunctionCubicIn(float %0, float %1, float %2, float %3) {
%5 = fdiv float %0, %3
%6 = fmul float %5, %2
%7 = fmul float %5, %6
%8 = tail call float @llvm.fmuladd.f32(float %7, float %5, float %1)
ret float %8
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
scalar_t__ munlock(void *, int);
int /*<<< orphan*/ perror(char *);
void free_buffer(void *buf, int size) {
  if (munlock(buf, size)) {
    perror("munlock");
  }
  free(buf);
}


x86 assembly (clang, -O0):
<free_buffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <munlock@plt>
cmp    $0x0,%rax
je     1161 <free_buffer+0x31>
lea    0xea4(%rip),%rdi
call   1050 <perror@plt>
mov    -0x8(%rbp),%rdi
call   1040 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_buffer>:
push   %rbx
mov    %rdi,%rbx
call   1030 <munlock@plt>
test   %rax,%rax
jne    1147 <free_buffer+0x17>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <free@plt>
lea    0xeb2(%rip),%rdi
call   1050 <perror@plt>
jmp    113e <free_buffer+0xe>

LLVM IR (-O0):
@.str = [8 x i8] c"munlock\00"
define void @free_buffer(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i64 @munlock(i8* %5, i32 %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 @perror(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %2
%12 = load i8*, i8** %3
%13 = call i32 @free(i8* %12)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"munlock\00"
define void @free_buffer(i8* %0, i32 %1) {
%3 = tail call i64 @munlock(i8* %0, i32 %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @perror(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
%8 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
float *malloc(int);
extern float *ReturnFloat() {
  float *i = malloc(sizeof(float));
  *i = -4.5;
  return i;
}


x86 assembly (clang, -O0):
<ReturnFloat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  0xece(%rip),%xmm0
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReturnFloat>:
push   %rax
mov    $0x4,%edi
call   1030 <malloc@plt>
movl   $0xc0900000,(%rax)
pop    %rcx
ret

LLVM IR (-O0):
define float* @ReturnFloat() {
%1 = alloca float*
%2 = call float* @malloc(i32 4)
store float* %2, float** %1
%3 = load float*, float** %1
store float -4.500000e+00, float* %3
%4 = load float*, float** %1
ret float* %4
}

LLVM IR (-O2):
define noalias float* @ReturnFloat() {
%1 = tail call float* @malloc(i32 4)
store float -4.500000e+00, float* %1
ret float* %1
}
void U_WMRSETRELABS_print(const char *contents) { (void)contents; }


x86 assembly (clang, -O0):
<U_WMRSETRELABS_print>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRSETRELABS_print>:
ret

LLVM IR (-O0):
define void @U_WMRSETRELABS_print(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @U_WMRSETRELABS_print(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int adagain_more(int);
int /*<<< orphan*/ primary_one(int);
int /*<<< orphan*/ primary_two(int);
int add(int input) {
  static int one = 1;
  int two = 2;
  two += input;
  two += one;
  two = adagain_more(two);
  primary_one(two);
  primary_two(two);
  return two;
}


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    0x2ee7(%rip),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <adagain_more@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1050 <primary_one@plt>
mov    -0x8(%rbp),%edi
call   1040 <primary_two@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
push   %rbx
add    $0x3,%edi
call   1030 <adagain_more@plt>
mov    %eax,%ebx
mov    %eax,%edi
call   1050 <primary_one@plt>
mov    %ebx,%edi
call   1040 <primary_two@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@add.one = internal global i32 1
define i32 @add(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 2, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = add nsw i32 %5, %4
store i32 %6, i32* %3
%7 = load i32, i32* @add.one
%8 = load i32, i32* %3
%9 = add nsw i32 %8, %7
store i32 %9, i32* %3
%10 = load i32, i32* %3
%11 = call i32 @adagain_more(i32 %10)
store i32 %11, i32* %3
%12 = load i32, i32* %3
%13 = call i32 @primary_one(i32 %12)
%14 = load i32, i32* %3
%15 = call i32 @primary_two(i32 %14)
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @add(i32 %0) {
%2 = add nsw i32 %0, 3
%3 = tail call i32 @adagain_more(i32 %2)
%4 = tail call i32 @primary_one(i32 %3)
%5 = tail call i32 @primary_two(i32 %3)
ret i32 %3
}