xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ F_GETFL;
int /*<<< orphan*/ F_SETFL;
int O_NONBLOCK;
int fcntl(int const, int /*<<< orphan*/, int);
void unblock_fd(const int fd) {
  int flags = fcntl(fd, F_GETFL, 0);
  fcntl(fd, F_SETFL, flags | O_NONBLOCK);
}


x86 assembly (clang, -O0):
<unblock_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eab(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1030 <fcntl@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2e9d(%rip),%rax
mov    (%rax),%esi
mov    -0x8(%rbp),%edx
mov    0x2ea1(%rip),%rax
or     (%rax),%edx
call   1030 <fcntl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unblock_fd>:
push   %rbx
mov    %edi,%ebx
mov    0x2eb6(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1030 <fcntl@plt>
mov    0x2eae(%rip),%rcx
mov    (%rcx),%esi
mov    0x2eb5(%rip),%rcx
or     (%rcx),%eax
mov    %ebx,%edi
mov    %eax,%edx
pop    %rbx
jmp    1030 <fcntl@plt>

LLVM IR (-O0):
@F_GETFL = global i32 0
@F_SETFL = global i32 0
@O_NONBLOCK = global i32 0
define void @unblock_fd(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @F_GETFL
%6 = call i32 @fcntl(i32 %4, i32 %5, i32 0)
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = load i32, i32* @F_SETFL
%9 = load i32, i32* %3
%10 = load i32, i32* @O_NONBLOCK
%11 = or i32 %9, %10
%12 = call i32 @fcntl(i32 %7, i32 %8, i32 %11)
ret void
}

LLVM IR (-O2):
@F_GETFL = global i32 0
@F_SETFL = global i32 0
@O_NONBLOCK = global i32 0
define void @unblock_fd(i32 %0) {
%2 = load i32, i32* @F_GETFL
%3 = tail call i32 @fcntl(i32 %0, i32 %2, i32 0)
%4 = load i32, i32* @F_SETFL
%5 = load i32, i32* @O_NONBLOCK
%6 = or i32 %5, %3
%7 = tail call i32 @fcntl(i32 %0, i32 %4, i32 %6)
ret void
}
void dummy_poll_fn(void) {}


x86 assembly (clang, -O0):
<dummy_poll_fn>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy_poll_fn>:
ret

LLVM IR (-O0):
define void @dummy_poll_fn() {
ret void
}

LLVM IR (-O2):
define void @dummy_poll_fn() {
ret void
}
/* Variables and functions */
void *__memset(void *dst, int c, size_t n) {
  if (n != 0) {
    unsigned char *d = dst;
    do
      *d++ = (unsigned char)c;
    while (--n != 0);
  }
  return (dst);
}


x86 assembly (clang, -O0):
<__memset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1153 <__memset+0x53>
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    1122 <__memset+0x22>
jmp    1153 <__memset+0x53>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__memset>:
push   %rbx
mov    %rdi,%rbx
test   %rdx,%rdx
je     1121 <__memset+0x11>
mov    %rbx,%rdi
call   1030 <memset@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @__memset(i8* %0, i32 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64
%7 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%8 = load i64, i64* %6
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %22
10: ; preds = %3
%11 = load i8*, i8** %4
store i8* %11, i8** %7
br label %12
12: ; preds = %17, %10
%13 = load i32, i32* %5
%14 = trunc i32 %13 to i8
%15 = load i8*, i8** %7
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %7
store i8 %14, i8* %15
br label %17
17: ; preds = %12
%18 = load i64, i64* %6
%19 = add i64 %18, -1
store i64 %19, i64* %6
%20 = icmp ne i64 %19, 0
br i1 %20, label %12, label %21
21: ; preds = %17
br label %22
22: ; preds = %21, %3
%23 = load i8*, i8** %4
ret i8* %23
}

LLVM IR (-O2):
define i8* @__memset(i8* returned writeonly %0, i32 %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = trunc i32 %1 to i8
br label %7
7: ; preds = %5, %3
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ S_IFSOCK;
int isfdtype(int, int /*<<< orphan*/);
int is_socket(int fd) { return (isfdtype(fd, S_IFSOCK) == 1); }


x86 assembly (clang, -O0):
<is_socket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
call   1030 <isfdtype@plt>
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_socket>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
call   1030 <isfdtype@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@S_IFSOCK = global i32 0
define i32 @is_socket(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @S_IFSOCK
%5 = call i32 @isfdtype(i32 %3, i32 %4)
%6 = icmp eq i32 %5, 1
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
@S_IFSOCK = global i32 0
define i32 @is_socket(i32 %0) {
%2 = load i32, i32* @S_IFSOCK
%3 = tail call i32 @isfdtype(i32 %0, i32 %2)
%4 = icmp eq i32 %3, 1
%5 = zext i1 %4 to i32
ret i32 %5
}
void modify_via_ref(int *ref) { *ref = 1; }


x86 assembly (clang, -O0):
<modify_via_ref>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<modify_via_ref>:
movl   $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @modify_via_ref(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
store i32 1, i32* %3
ret void
}

LLVM IR (-O2):
define void @modify_via_ref(i32* nocapture writeonly %0) {
store i32 1, i32* %0
ret void
}
/* Variables and functions */
int read_proc_file_integer(int const, char *, int *);
int get_oom_score(const int pid) {
  int out = 0;
  int res = read_proc_file_integer(pid, "oom_score", &out);
  if (res < 0) {
    return res;
  }
  return out;
}


x86 assembly (clang, -O0):
<get_oom_score>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%edi
lea    0xed4(%rip),%rsi
lea    -0xc(%rbp),%rdx
call   1030 <read_proc_file_integer@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jge    114d <get_oom_score+0x3d>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1153 <get_oom_score+0x43>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_oom_score>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0xee0(%rip),%rsi
lea    0x4(%rsp),%rdx
call   1030 <read_proc_file_integer@plt>
test   %eax,%eax
js     1132 <get_oom_score+0x22>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"oom_score\00"
define i32 @get_oom_score(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %4
%6 = load i32, i32* %3
%7 = call i32 @read_proc_file_integer(i32 %6, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32* %4)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %1
%11 = load i32, i32* %5
store i32 %11, i32* %2
br label %14
12: ; preds = %1
%13 = load i32, i32* %4
store i32 %13, i32* %2
br label %14
14: ; preds = %12, %10
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
@.str = [10 x i8] c"oom_score\00"
define i32 @get_oom_score(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%4 = call i32 @read_proc_file_integer(i32 %0, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = icmp slt i32 %4, 0
%6 = load i32, i32* %2
%7 = select i1 %5, i32 %4, i32 %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ putc(char const);
void print(const char *s) {
  while (*s) {
    putc(*s);
    s++;
  }
}


x86 assembly (clang, -O0):
<print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1146 <print+0x36>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <putc@plt>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <print+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <print+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <putc@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <print+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @print(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = call i32 @putc(i8 signext %9)
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @print(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = tail call i32 @putc(i8 signext %5)
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
const char *program_options_usage() {
  return "\n"
         "OPTIONS:\n"
         "  -p <port>    Set the port to listen on\n"
         "  -v           Enable verbose output\n"
         "  -e           Echo the request, for debugging\n"
         "  -h           Show this help message\n"
         "\n";
}


x86 assembly (clang, -O0):
<program_options_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<program_options_usage>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [175 x i8] c"\0AOPTIONS:\0A -p <port> Set the port to listen on\0A -v Enable verbose output\0A -e Echo the request, for debugging\0A -h Show this help message\0A\0A\00"
define i8* @program_options_usage() {
ret i8* getelementptr inbounds ([175 x i8], [175 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [175 x i8] c"\0AOPTIONS:\0A -p <port> Set the port to listen on\0A -v Enable verbose output\0A -e Echo the request, for debugging\0A -h Show this help message\0A\0A\00"
define i8* @program_options_usage() {
ret i8* getelementptr inbounds ([175 x i8], [175 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ ispunct(int);
void t_ispunct_0xee() {
  Assert_real((ispunct(238) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_ispunct.c",
              1195, ("ispunct should be 0 for 0xee"));
}


x86 assembly (clang, -O0):
<t_ispunct_0xee>:
push   %rbp
mov    %rsp,%rbp
mov    $0xee,%edi
call   1030 <ispunct@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4ab,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_ispunct_0xee>:
push   %rax
mov    $0xee,%edi
call   1030 <ispunct@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4ab,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0xee\00"
define void @t_ispunct_0xee() {
%1 = call i64 @ispunct(i32 238)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1195, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0xee\00"
define void @t_ispunct_0xee() {
%1 = tail call i64 @ispunct(i32 238)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1195, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int gcd(int u, int v) {
  int temp;
  while (v) {
    temp = u % v;
    u = v;
    v = temp;
  }
  return u;
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112f <gcd+0x2f>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    110a <gcd+0xa>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %edi,%eax
test   %esi,%esi
je     111d <gcd+0x1d>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %6
6: ; preds = %9, %2
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %6
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = srem i32 %10, %11
store i32 %12, i32* %5
%13 = load i32, i32* %4
store i32 %13, i32* %3
%14 = load i32, i32* %5
store i32 %14, i32* %4
br label %6
15: ; preds = %6
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %6, %4 ], [ %0, %2 ]
%6 = phi i32 [ %7, %4 ], [ %1, %2 ]
%7 = srem i32 %5, %6
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %6, %4 ]
ret i32 %10
}
void Cyc_AssnDef_f_sizeof_hashtable(void *key, void *value, int *counter) {
  int *_T0;
  _T0 = counter;
  *_T0 = *_T0 + 1;
}


x86 assembly (clang, -O0):
<Cyc_AssnDef_f_sizeof_hashtable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_AssnDef_f_sizeof_hashtable>:
addl   $0x1,(%rdx)
ret

LLVM IR (-O0):
define void @Cyc_AssnDef_f_sizeof_hashtable(i8* %0, i8* %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32* %2, i32** %6
%8 = load i32*, i32** %6
store i32* %8, i32** %7
%9 = load i32*, i32** %7
%10 = load i32, i32* %9
%11 = add nsw i32 %10, 1
%12 = load i32*, i32** %7
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @Cyc_AssnDef_f_sizeof_hashtable(i8* nocapture readnone %0, i8* nocapture readnone %1, i32* nocapture %2) {
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
store i32 %5, i32* %2
ret void
}
unsigned long get_proc_total(void) { return 0; }


x86 assembly (clang, -O0):
<get_proc_total>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_proc_total>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @get_proc_total() {
ret i64 0
}

LLVM IR (-O2):
define i64 @get_proc_total() {
ret i64 0
}
/* Variables and functions */
scalar_t__ islower(char);
int IloscMalychLiter(char *Tekst) {
  int Ilosc = 0;
  for (; *Tekst; ++Tekst)
    if (islower(*Tekst))
      ++Ilosc;
  return Ilosc;
}


x86 assembly (clang, -O0):
<IloscMalychLiter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1165 <IloscMalychLiter+0x55>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
je     114f <IloscMalychLiter+0x3f>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1154 <IloscMalychLiter+0x44>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1123 <IloscMalychLiter+0x13>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IloscMalychLiter>:
push   %rbp
push   %rbx
push   %rax
mov    (%rdi),%al
test   %al,%al
je     114c <IloscMalychLiter+0x3c>
mov    %rdi,%rbx
add    $0x1,%rbx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbl %al,%edi
call   1030 <islower@plt>
cmp    $0x1,%rax
sbb    $0xffffffff,%ebp
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <IloscMalychLiter+0x20>
jmp    114e <IloscMalychLiter+0x3e>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @IloscMalychLiter(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %17, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %20
8: ; preds = %4
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = call i64 @islower(i8 signext %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %8
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %16
16: ; preds = %13, %8
br label %17
17: ; preds = %16
%18 = load i8*, i8** %2
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %2
br label %4
20: ; preds = %4
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @IloscMalychLiter(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %13, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 0, %1 ]
%7 = phi i8* [ %12, %4 ], [ %0, %1 ]
%8 = tail call i64 @islower(i8 signext %5)
%9 = icmp ne i64 %8, 0
%10 = zext i1 %9 to i32
%11 = add nuw nsw i32 %6, %10
%12 = getelementptr inbounds i8, i8* %7, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %4, %1
%16 = phi i32 [ 0, %1 ], [ %11, %4 ]
ret i32 %16
}
void __attribute__((constructor)) ob_log_init() {}


x86 assembly (clang, -O0):
<ob_log_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ob_log_init>:
ret

LLVM IR (-O0):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @ob_log_init, i8* null }]
define void @ob_log_init() {
ret void
}

LLVM IR (-O2):
@llvm.global_ctors = appending global [0 x { i32, void ()*, i8* }] zeroinitializer
define void @ob_log_init() {
ret void
}
void HandlerIsEstablished() {}


x86 assembly (clang, -O0):
<HandlerIsEstablished>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HandlerIsEstablished>:
ret

LLVM IR (-O0):
define void @HandlerIsEstablished() {
ret void
}

LLVM IR (-O2):
define void @HandlerIsEstablished() {
ret void
}
/* Type definitions */
struct forf_env {
  int dummy;
};

/* Variables and functions */
long forf_pop_num(struct forf_env *);
int /*<<< orphan*/ forf_push_num(struct forf_env *, long);
long rand();
void forf_proc_random(struct forf_env *env) {
  long max = forf_pop_num(env);
  forf_push_num(env, rand() % max);
}


x86 assembly (clang, -O0):
<forf_proc_random>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <forf_pop_num@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    $0x0,%al
call   1050 <rand@plt>
mov    -0x18(%rbp),%rdi
cqto
idivq  -0x10(%rbp)
mov    %rdx,%rsi
call   1040 <forf_push_num@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<forf_proc_random>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <forf_pop_num@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1050 <rand@plt>
mov    %rax,%rcx
or     %rbx,%rcx
shr    $0x20,%rcx
je     1159 <forf_proc_random+0x29>
cqto
idiv   %rbx
jmp    115d <forf_proc_random+0x2d>
xor    %edx,%edx
div    %ebx
mov    %r14,%rdi
mov    %rdx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <forf_push_num@plt>

LLVM IR (-O0):
%struct.forf_env = type { i32 }
define void @forf_proc_random(%struct.forf_env* %0) {
%2 = alloca %struct.forf_env*
%3 = alloca i64
store %struct.forf_env* %0, %struct.forf_env** %2
%4 = load %struct.forf_env*, %struct.forf_env** %2
%5 = call i64 @forf_pop_num(%struct.forf_env* %4)
store i64 %5, i64* %3
%6 = load %struct.forf_env*, %struct.forf_env** %2
%7 = call i64 (...) @rand()
%8 = load i64, i64* %3
%9 = srem i64 %7, %8
%10 = call i32 @forf_push_num(%struct.forf_env* %6, i64 %9)
ret void
}

LLVM IR (-O2):
%struct.forf_env = type { i32 }
define void @forf_proc_random(%struct.forf_env* %0) {
%2 = tail call i64 @forf_pop_num(%struct.forf_env* %0)
%3 = tail call i64 (...) @rand()
%4 = srem i64 %3, %2
%5 = tail call i32 @forf_push_num(%struct.forf_env* %0, i64 %4)
ret void
}
/* Variables and functions */
int rand();
int random(int inicio, int final) {
  return rand() % (final - inicio + 1) + inicio;
}


x86 assembly (clang, -O0):
<random>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
sub    %ebp,%ebx
add    $0x1,%ebx
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @random(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @rand()
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = add nsw i32 %8, 1
%10 = srem i32 %5, %9
%11 = load i32, i32* %3
%12 = add nsw i32 %10, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @random(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = sub i32 1, %0
%5 = add i32 %4, %1
%6 = srem i32 %3, %5
%7 = add nsw i32 %6, %0
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ memunescape(char *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
void unescape(char *s) { (void)memunescape(s, strlen(s)); }


x86 assembly (clang, -O0):
<unescape>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1040 <memunescape@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unescape>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <memunescape@plt>

LLVM IR (-O0):
define void @unescape(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = call i32 @memunescape(i8* %3, i32 %5)
ret void
}

LLVM IR (-O2):
define void @unescape(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32 @memunescape(i8* %0, i32 %2)
ret void
}
unsigned int **
_ZNSt12__miter_baseIPPiLb0EE3__bES1_(unsigned int **llvm_cbe___it) {
  unsigned int **llvm_cbe_retval;
  unsigned int **llvm_cbe___it_2e_addr;
  unsigned int **llvm_cbe_tmp;
  unsigned int **llvm_cbe_tmp__43;
  *(&llvm_cbe___it_2e_addr) = llvm_cbe___it;
  llvm_cbe_tmp = *(&llvm_cbe___it_2e_addr);
  *(&llvm_cbe_retval) = llvm_cbe_tmp;
  llvm_cbe_tmp__43 = *(&llvm_cbe_retval);
  return llvm_cbe_tmp__43;
}


x86 assembly (clang, -O0):
<_ZNSt12__miter_baseIPPiLb0EE3__bES1_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ZNSt12__miter_baseIPPiLb0EE3__bES1_>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i32** @_ZNSt12__miter_baseIPPiLb0EE3__bES1_(i32** %0) {
%2 = alloca i32**
%3 = alloca i32**
%4 = alloca i32**
%5 = alloca i32**
%6 = alloca i32**
store i32** %0, i32*** %2
%7 = load i32**, i32*** %2
store i32** %7, i32*** %4
%8 = load i32**, i32*** %4
store i32** %8, i32*** %5
%9 = load i32**, i32*** %5
store i32** %9, i32*** %3
%10 = load i32**, i32*** %3
store i32** %10, i32*** %6
%11 = load i32**, i32*** %6
ret i32** %11
}

LLVM IR (-O2):
define i32** @_ZNSt12__miter_baseIPPiLb0EE3__bES1_(i32** readnone returned %0) {
ret i32** %0
}
int min_integer(int a, int b) { return a < b ? a : b; }


x86 assembly (clang, -O0):
<min_integer>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <min_integer+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <min_integer+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min_integer>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @min_integer(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @min_integer(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
void f(int t) { int z = t; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
ret

LLVM IR (-O0):
define void @f(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
ret void
}

LLVM IR (-O2):
define void @f(i32 %0) {
ret void
}
int main() {
  unsigned short x = 0x8000;
  if (!__sync_bool_compare_and_swap(&x, 0x8000, 0) || x)
    __builtin_abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movw   $0x8000,-0x6(%rbp)
xor    %eax,%eax
mov    %ax,%cx
mov    $0x8000,%ax
lock cmpxchg %cx,-0x6(%rbp)
mov    %ax,%cx
sete   %al
test   $0x1,%al
jne    1147 <main+0x37>
jmp    1154 <main+0x44>
movzwl -0x6(%rbp),%eax
cmp    $0x0,%eax
je     1159 <main+0x49>
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movw   $0x8000,0x6(%rsp)
xor    %ecx,%ecx
mov    $0x8000,%ax
lock cmpxchg %cx,0x6(%rsp)
jne    1133 <main+0x23>
cmpw   $0x0,0x6(%rsp)
jne    1133 <main+0x23>
xor    %eax,%eax
pop    %rcx
ret
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i16
store i32 0, i32* %1
store i16 -32768, i16* %2
%3 = cmpxchg i16* %2, i16 -32768, i16 0 seq_cst seq_cst
%4 = extractvalue { i16, i1 } %3, 1
br i1 %4, label %5, label %9
5: ; preds = %0
%6 = load i16, i16* %2
%7 = zext i16 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %5, %0
unreachable
10: ; preds = %5
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i16
%2 = bitcast i16* %1 to i8*
store i16 -32768, i16* %1
%3 = cmpxchg i16* %1, i16 -32768, i16 0 seq_cst seq_cst
%4 = extractvalue { i16, i1 } %3, 1
%5 = xor i1 %4, true
%6 = load i16, i16* %1
%7 = icmp ne i16 %6, 0
%8 = select i1 %5, i1 true, i1 %7
br i1 %8, label %9, label %10
9: ; preds = %0
unreachable
10: ; preds = %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
void pthread_testcancel() { assert(0); }


x86 assembly (clang, -O0):
<pthread_testcancel>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_testcancel>:
xor    %edi,%edi
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @pthread_testcancel() {
%1 = call i32 @assert(i32 0)
ret void
}

LLVM IR (-O2):
define void @pthread_testcancel() {
%1 = tail call i32 @assert(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main() {
  int c;
  for (c = 0; c <= 255; c++) {
    printf("%c%10d\n", c, c);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xff,-0x8(%rbp)
jg     1153 <main+0x43>
mov    -0x8(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xee3(%rip),%r14
nopl   (%rax)
mov    %r14,%rdi
mov    %ebx,%esi
mov    %ebx,%edx
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x100,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [8 x i8] c"%c%10d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %10, %0
%4 = load i32, i32* %2
%5 = icmp sle i32 %4, 255
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = load i32, i32* %2
%8 = load i32, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8)
br label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %3
13: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"%c%10d\0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %2)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 256
br i1 %5, label %6, label %1
6: ; preds = %1
ret i32 0
}
const char *fpp_config_get_default_plugin_descr(void) {
  return "Native Client";
}


x86 assembly (clang, -O0):
<fpp_config_get_default_plugin_descr>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fpp_config_get_default_plugin_descr>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Native Client\00"
define i8* @fpp_config_get_default_plugin_descr() {
ret i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [14 x i8] c"Native Client\00"
define i8* @fpp_config_get_default_plugin_descr() {
ret i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ signal_block_all();
int /*<<< orphan*/ start_scheduler();
int main() {
  signal_block_all();
  start_scheduler();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <signal_block_all@plt>
mov    $0x0,%al
call   1040 <start_scheduler@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <signal_block_all@plt>
xor    %eax,%eax
call   1040 <start_scheduler@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @signal_block_all()
%2 = call i32 (...) @start_scheduler()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @signal_block_all()
%2 = tail call i32 (...) @start_scheduler()
ret i32 0
}
/* Variables and functions */
int syscall(int, char *, int /*<<< orphan*/);
int exec(char *cmd_line) { return syscall(11, cmd_line, 0); }


x86 assembly (clang, -O0):
<exec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0xb,%edi
xor    %edx,%edx
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exec>:
mov    %rdi,%rsi
mov    $0xb,%edi
xor    %edx,%edx
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @exec(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @syscall(i32 11, i8* %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @exec(i8* %0) {
%2 = tail call i32 @syscall(i32 11, i8* %0, i32 0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ flush_header(int);
int mus_close(int);
int /*<<< orphan*/ mus_get_header_type(int);
int /*<<< orphan*/ mus_update_header_with_fd(int, int /*<<< orphan*/, int);
int close_sound_output(int fd, int bytes_of_data) {
  flush_header(fd);
  mus_update_header_with_fd(fd, mus_get_header_type(fd), bytes_of_data);
  return (mus_close(fd));
}


x86 assembly (clang, -O0):
<close_sound_output>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <flush_header@plt>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <mus_get_header_type@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%esi
mov    -0x8(%rbp),%edx
call   1060 <mus_update_header_with_fd@plt>
mov    -0x4(%rbp),%edi
call   1040 <mus_close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_sound_output>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <flush_header@plt>
mov    %ebp,%edi
call   1050 <mus_get_header_type@plt>
mov    %ebp,%edi
mov    %eax,%esi
mov    %ebx,%edx
call   1060 <mus_update_header_with_fd@plt>
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <mus_close@plt>

LLVM IR (-O0):
define i32 @close_sound_output(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @flush_header(i32 %5)
%7 = load i32, i32* %3
%8 = load i32, i32* %3
%9 = call i32 @mus_get_header_type(i32 %8)
%10 = load i32, i32* %4
%11 = call i32 @mus_update_header_with_fd(i32 %7, i32 %9, i32 %10)
%12 = load i32, i32* %3
%13 = call i32 @mus_close(i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @close_sound_output(i32 %0, i32 %1) {
%3 = tail call i32 @flush_header(i32 %0)
%4 = tail call i32 @mus_get_header_type(i32 %0)
%5 = tail call i32 @mus_update_header_with_fd(i32 %0, i32 %4, i32 %1)
%6 = tail call i32 @mus_close(i32 %0)
ret i32 %6
}
/* Variables and functions */
float acos(int);
int glmComputeVectorLength3f(float const *);
int glmDotProduct3f(float const *, float const *);
float glmComputeVectorAngle3fRad(const float v1[3], const float v2[3]) {
  return acos(glmDotProduct3f(v1, v2) /
              (glmComputeVectorLength3f(v1) * glmComputeVectorLength3f(v2)));
}


x86 assembly (clang, -O0):
<glmComputeVectorAngle3fRad>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <glmDotProduct3f@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <glmComputeVectorLength3f@plt>
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <glmComputeVectorLength3f@plt>
mov    -0x18(%rbp),%ecx
mov    %eax,%edx
mov    -0x14(%rbp),%eax
imul   %edx,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1040 <acos@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmComputeVectorAngle3fRad>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
call   1050 <glmDotProduct3f@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <glmComputeVectorLength3f@plt>
mov    %eax,%ebx
mov    %r14,%rdi
call   1030 <glmComputeVectorLength3f@plt>
mov    %eax,%ecx
imul   %ebx,%ecx
mov    %ebp,%eax
cltd
idiv   %ecx
mov    %eax,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <acos@plt>

LLVM IR (-O0):
define float @glmComputeVectorAngle3fRad(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = load float*, float** %4
%7 = call i32 @glmDotProduct3f(float* %5, float* %6)
%8 = load float*, float** %3
%9 = call i32 @glmComputeVectorLength3f(float* %8)
%10 = load float*, float** %4
%11 = call i32 @glmComputeVectorLength3f(float* %10)
%12 = mul nsw i32 %9, %11
%13 = sdiv i32 %7, %12
%14 = call float @acos(i32 %13)
ret float %14
}

LLVM IR (-O2):
define float @glmComputeVectorAngle3fRad(float* %0, float* %1) {
%3 = tail call i32 @glmDotProduct3f(float* %0, float* %1)
%4 = tail call i32 @glmComputeVectorLength3f(float* %0)
%5 = tail call i32 @glmComputeVectorLength3f(float* %1)
%6 = mul nsw i32 %5, %4
%7 = sdiv i32 %3, %6
%8 = tail call float @acos(i32 %7)
ret float %8
}
/* Variables and functions */
size_t id3_size(const unsigned char *buffer) {
  size_t size = 0;
  size = (buffer[3] & 0x7f) + ((buffer[2] & 0x7f) << 7) +
         ((buffer[1] & 0x7f) << 14) + ((buffer[0] & 0x7f) << 21);
  return size;
}


x86 assembly (clang, -O0):
<id3_size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x3(%rax),%eax
and    $0x7f,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
and    $0x7f,%ecx
shl    $0x7,%ecx
add    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
and    $0x7f,%ecx
shl    $0xe,%ecx
add    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
and    $0x7f,%ecx
shl    $0x15,%ecx
add    %ecx,%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<id3_size>:
movzbl 0x3(%rdi),%eax
and    $0x7f,%eax
movzbl 0x2(%rdi),%ecx
and    $0x7f,%ecx
shl    $0x7,%rcx
or     %rax,%rcx
movzbl 0x1(%rdi),%edx
and    $0x7f,%edx
shl    $0xe,%rdx
or     %rcx,%rdx
movzbl (%rdi),%eax
and    $0x7f,%eax
shl    $0x15,%rax
or     %rdx,%rax
ret

LLVM IR (-O0):
define i64 @id3_size(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 3
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = and i32 %7, 127
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 2
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = and i32 %12, 127
%14 = shl i32 %13, 7
%15 = add nsw i32 %8, %14
%16 = load i8*, i8** %2
%17 = getelementptr inbounds i8, i8* %16, i64 1
%18 = load i8, i8* %17
%19 = zext i8 %18 to i32
%20 = and i32 %19, 127
%21 = shl i32 %20, 14
%22 = add nsw i32 %15, %21
%23 = load i8*, i8** %2
%24 = getelementptr inbounds i8, i8* %23, i64 0
%25 = load i8, i8* %24
%26 = zext i8 %25 to i32
%27 = and i32 %26, 127
%28 = shl i32 %27, 21
%29 = add nsw i32 %22, %28
%30 = sext i32 %29 to i64
store i64 %30, i64* %3
%31 = load i64, i64* %3
ret i64 %31
}

LLVM IR (-O2):
define i64 @id3_size(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 3
%3 = load i8, i8* %2
%4 = and i8 %3, 127
%5 = zext i8 %4 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 2
%7 = load i8, i8* %6
%8 = and i8 %7, 127
%9 = zext i8 %8 to i64
%10 = shl nuw nsw i64 %9, 7
%11 = or i64 %10, %5
%12 = getelementptr inbounds i8, i8* %0, i64 1
%13 = load i8, i8* %12
%14 = and i8 %13, 127
%15 = zext i8 %14 to i64
%16 = shl nuw nsw i64 %15, 14
%17 = or i64 %11, %16
%18 = load i8, i8* %0
%19 = and i8 %18, 127
%20 = zext i8 %19 to i64
%21 = shl nuw nsw i64 %20, 21
%22 = or i64 %17, %21
ret i64 %22
}
/* Variables and functions */
unsigned long __data20_read_long(unsigned long);
int /*<<< orphan*/ __disable_interrupt();
int /*<<< orphan*/ __enable_interrupt();
unsigned long flash_read_long(unsigned long address) {
  unsigned long ret;
  __disable_interrupt();
  ret = __data20_read_long(address);
  __enable_interrupt();
  return ret;
}


x86 assembly (clang, -O0):
<flash_read_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__disable_interrupt@plt>
mov    -0x8(%rbp),%rdi
call   1050 <__data20_read_long@plt>
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1040 <__enable_interrupt@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flash_read_long>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <__disable_interrupt@plt>
mov    %rbx,%rdi
call   1050 <__data20_read_long@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1040 <__enable_interrupt@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @flash_read_long(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = call i32 (...) @__disable_interrupt()
%5 = load i64, i64* %2
%6 = call i64 @__data20_read_long(i64 %5)
store i64 %6, i64* %3
%7 = call i32 (...) @__enable_interrupt()
%8 = load i64, i64* %3
ret i64 %8
}

LLVM IR (-O2):
define i64 @flash_read_long(i64 %0) {
%2 = tail call i32 (...) @__disable_interrupt()
%3 = tail call i64 @__data20_read_long(i64 %0)
%4 = tail call i32 (...) @__enable_interrupt()
ret i64 %3
}
void SUPR3HardenedLdrLoadAppPriv(void) {}


x86 assembly (clang, -O0):
<SUPR3HardenedLdrLoadAppPriv>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SUPR3HardenedLdrLoadAppPriv>:
ret

LLVM IR (-O0):
define void @SUPR3HardenedLdrLoadAppPriv() {
ret void
}

LLVM IR (-O2):
define void @SUPR3HardenedLdrLoadAppPriv() {
ret void
}
/* Variables and functions */
int tolower(int /*<<< orphan*/);
size_t keyhash(const char *k, size_t seed) {
  const unsigned char *p = (const void *)k;
  size_t h = seed;
  while (*p)
    h = 31 * h + tolower(*p++);
  return h;
}


x86 assembly (clang, -O0):
<keyhash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     1172 <keyhash+0x62>
imul   $0x1f,-0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
movzbl (%rax),%edi
call   1030 <tolower@plt>
mov    %eax,%ecx
mov    -0x28(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
jmp    1130 <keyhash+0x20>
mov    -0x20(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<keyhash>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rax
mov    (%rdi),%cl
test   %cl,%cl
je     1153 <keyhash+0x43>
mov    %rdi,%r14
add    $0x1,%r14
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rax,%rbx
shl    $0x5,%rbx
sub    %rax,%rbx
movzbl %cl,%edi
call   1030 <tolower@plt>
cltq
add    %rbx,%rax
movzbl (%r14),%ecx
add    $0x1,%r14
test   %cl,%cl
jne    1130 <keyhash+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @keyhash(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
%8 = load i64, i64* %4
store i64 %8, i64* %6
br label %9
9: ; preds = %13, %2
%10 = load i8*, i8** %5
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %23
13: ; preds = %9
%14 = load i64, i64* %6
%15 = mul i64 31, %14
%16 = load i8*, i8** %5
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %5
%18 = load i8, i8* %16
%19 = zext i8 %18 to i32
%20 = call i32 @tolower(i32 %19)
%21 = sext i32 %20 to i64
%22 = add i64 %15, %21
store i64 %22, i64* %6
br label %9
23: ; preds = %9
%24 = load i64, i64* %6
ret i64 %24
}

LLVM IR (-O2):
define i64 @keyhash(i8* nocapture %0, i64 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %17, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %15, %5 ], [ %3, %2 ]
%7 = phi i64 [ %14, %5 ], [ %1, %2 ]
%8 = phi i8* [ %10, %5 ], [ %0, %2 ]
%9 = mul i64 %7, 31
%10 = getelementptr inbounds i8, i8* %8, i64 1
%11 = zext i8 %6 to i32
%12 = tail call i32 @tolower(i32 %11)
%13 = sext i32 %12 to i64
%14 = add i64 %9, %13
%15 = load i8, i8* %10
%16 = icmp eq i8 %15, 0
br i1 %16, label %17, label %5
17: ; preds = %5, %2
%18 = phi i64 [ %1, %2 ], [ %14, %5 ]
ret i64 %18
}
/* Variables and functions */
float tanf(float);
__attribute__((__weak__, __always___)) float softboundcets_tanf(float x) {
  return tanf(x);
}


x86 assembly (clang, -O0):
<softboundcets_tanf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <tanf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundcets_tanf>:
jmp    1030 <tanf@plt>

LLVM IR (-O0):
define weak float @softboundcets_tanf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @tanf(float %3)
ret float %4
}

LLVM IR (-O2):
define weak float @softboundcets_tanf(float %0) {
%2 = tail call float @tanf(float %0)
ret float %2
}
void PRCMLPDSRestoreInfoSet(unsigned long ulStackPtr,
                            unsigned long ulProgCntr) {
  if (((*((volatile unsigned long *)(0x00000400))) & 0xFFFF) >= 2) {
    (*((volatile unsigned long *)(0x4402E160))) = ulStackPtr;
    (*((volatile unsigned long *)(0x4402E198))) = ulProgCntr;
  } else {
    (*((volatile unsigned long *)(0x4402E18C))) = ulStackPtr;
    (*((volatile unsigned long *)(0x4402E190))) = ulProgCntr;
  }
}


x86 assembly (clang, -O0):
<PRCMLPDSRestoreInfoSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x400,%eax
mov    (%rax),%rax
and    $0xffff,%rax
cmp    $0x2,%rax
jb     1141 <PRCMLPDSRestoreInfoSet+0x41>
mov    -0x8(%rbp),%rcx
mov    $0x4402e160,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rcx
mov    $0x4402e198,%eax
mov    %rcx,(%rax)
jmp    1159 <PRCMLPDSRestoreInfoSet+0x59>
mov    -0x8(%rbp),%rcx
mov    $0x4402e18c,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rcx
mov    $0x4402e190,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PRCMLPDSRestoreInfoSet>:
testq  $0xfffe,0x400
je     111f <PRCMLPDSRestoreInfoSet+0x1f>
mov    %rdi,0x4402e160
44
mov    %rsi,0x4402e198
44
ret
mov    %rdi,0x4402e18c
44
mov    %rsi,0x4402e190
44
ret

LLVM IR (-O0):
define void @PRCMLPDSRestoreInfoSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load volatile i64, i64* inttoptr (i64 1024 to i64*)
%6 = and i64 %5, 65535
%7 = icmp uge i64 %6, 2
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i64, i64* %3
store volatile i64 %9, i64* inttoptr (i64 1141039456 to i64*)
%10 = load i64, i64* %4
store volatile i64 %10, i64* inttoptr (i64 1141039512 to i64*)
br label %14
11: ; preds = %2
%12 = load i64, i64* %3
store volatile i64 %12, i64* inttoptr (i64 1141039500 to i64*)
%13 = load i64, i64* %4
store volatile i64 %13, i64* inttoptr (i64 1141039504 to i64*)
br label %14
14: ; preds = %11, %8
ret void
}

LLVM IR (-O2):
define void @PRCMLPDSRestoreInfoSet(i64 %0, i64 %1) {
%3 = load volatile i64, i64* inttoptr (i64 1024 to i64*)
%4 = and i64 %3, 65534
%5 = icmp eq i64 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %2
store volatile i64 %0, i64* inttoptr (i64 1141039456 to i64*)
store volatile i64 %1, i64* inttoptr (i64 1141039512 to i64*)
br label %8
7: ; preds = %2
store volatile i64 %0, i64* inttoptr (i64 1141039500 to i64*)
store volatile i64 %1, i64* inttoptr (i64 1141039504 to i64*)
br label %8
8: ; preds = %7, %6
ret void
}
char tosMemory_peekChar(int base, int offs) { return *((char *)(base + offs)); }


x86 assembly (clang, -O0):
<tosMemory_peekChar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
cltq
movsbl (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tosMemory_peekChar>:
movslq %esi,%rax
movslq %edi,%rcx
mov    (%rax,%rcx,1),%al
ret

LLVM IR (-O0):
define signext i8 @tosMemory_peekChar(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i8*
%10 = load i8, i8* %9
ret i8 %10
}

LLVM IR (-O2):
define signext i8 @tosMemory_peekChar(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i8*
%6 = load i8, i8* %5
ret i8 %6
}