xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ IntDisable(int);
int /*<<< orphan*/ IntUnregister(int);
void PRCMIntUnregister() {
  IntDisable(188);
  IntUnregister(188);
}


x86 assembly (clang, -O0):
<PRCMIntUnregister>:
push   %rbp
mov    %rsp,%rbp
mov    $0xbc,%edi
call   1030 <IntDisable@plt>
mov    $0xbc,%edi
call   1040 <IntUnregister@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PRCMIntUnregister>:
push   %rax
mov    $0xbc,%edi
call   1030 <IntDisable@plt>
mov    $0xbc,%edi
pop    %rax
jmp    1040 <IntUnregister@plt>

LLVM IR (-O0):
define void @PRCMIntUnregister() {
%1 = call i32 @IntDisable(i32 188)
%2 = call i32 @IntUnregister(i32 188)
ret void
}

LLVM IR (-O2):
define void @PRCMIntUnregister() {
%1 = tail call i32 @IntDisable(i32 188)
%2 = tail call i32 @IntUnregister(i32 188)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int test(void) {
  printf("test\n");
  return 0;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"test\0A\00"
define i32 @test() {
%1 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [5 x i8] c"test\00"
define i32 @test() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int isPalindrome(int number) {
  int temp = number, rem, reverse = 0;
  while (temp != 0) {
    rem = temp % 10;
    reverse = reverse * 10 + rem;
    temp /= 10;
  }
  if (reverse == number)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<isPalindrome>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1149 <isPalindrome+0x49>
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,-0x10(%rbp)
imul   $0xa,-0x14(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
jmp    1114 <isPalindrome+0x14>
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jne    1161 <isPalindrome+0x61>
movl   $0x1,-0x4(%rbp)
jmp    1168 <isPalindrome+0x68>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPalindrome>:
xor    %edx,%edx
test   %edi,%edi
je     1141 <isPalindrome+0x41>
mov    %edi,%eax
nopl   0x0(%rax,%rax,1)
lea    (%rdx,%rdx,4),%r8d
movslq %eax,%rcx
imul   $0x66666667,%rcx,%rax
mov    %rax,%rsi
shr    $0x3f,%rsi
sar    $0x22,%rax
add    %esi,%eax
lea    (%rax,%rax,1),%esi
lea    (%rsi,%rsi,4),%esi
mov    %ecx,%edx
sub    %esi,%edx
lea    (%rdx,%r8,2),%edx
add    $0x9,%ecx
cmp    $0x12,%ecx
ja     1110 <isPalindrome+0x10>
xor    %eax,%eax
cmp    %edi,%edx
sete   %al
ret

LLVM IR (-O0):
define i32 @isPalindrome(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
%7 = load i32, i32* %3
store i32 %7, i32* %4
store i32 0, i32* %6
br label %8
8: ; preds = %11, %1
%9 = load i32, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %20
11: ; preds = %8
%12 = load i32, i32* %4
%13 = srem i32 %12, 10
store i32 %13, i32* %5
%14 = load i32, i32* %6
%15 = mul nsw i32 %14, 10
%16 = load i32, i32* %5
%17 = add nsw i32 %15, %16
store i32 %17, i32* %6
%18 = load i32, i32* %4
%19 = sdiv i32 %18, 10
store i32 %19, i32* %4
br label %8
20: ; preds = %8
%21 = load i32, i32* %6
%22 = load i32, i32* %3
%23 = icmp eq i32 %21, %22
br i1 %23, label %24, label %25
24: ; preds = %20
store i32 1, i32* %2
br label %26
25: ; preds = %20
store i32 0, i32* %2
br label %26
26: ; preds = %25, %24
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @isPalindrome(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %12, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ 0, %1 ]
%5 = phi i32 [ %9, %3 ], [ %0, %1 ]
%6 = srem i32 %5, 10
%7 = mul nsw i32 %4, 10
%8 = add nsw i32 %7, %6
%9 = sdiv i32 %5, 10
%10 = add i32 %5, 9
%11 = icmp ult i32 %10, 19
br i1 %11, label %12, label %3
12: ; preds = %3, %1
%13 = phi i32 [ 0, %1 ], [ %8, %3 ]
%14 = icmp eq i32 %13, %0
%15 = zext i1 %14 to i32
ret i32 %15
}
float flt_cmp_le(float a, float b, float c, float d) {
  return (a <= b) ? c : d;
}


x86 assembly (clang, -O0):
<flt_cmp_le>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jb     113a <flt_cmp_le+0x3a>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
jmp    1144 <flt_cmp_le+0x44>
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<flt_cmp_le>:
cmpless %xmm1,%xmm0
andps  %xmm0,%xmm2
andnps %xmm3,%xmm0
orps   %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @flt_cmp_le(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %5
%10 = load float, float* %6
%11 = fcmp ole float %9, %10
br i1 %11, label %12, label %14
12: ; preds = %4
%13 = load float, float* %7
br label %16
14: ; preds = %4
%15 = load float, float* %8
br label %16
16: ; preds = %14, %12
%17 = phi float [ %13, %12 ], [ %15, %14 ]
ret float %17
}

LLVM IR (-O2):
define float @flt_cmp_le(float %0, float %1, float %2, float %3) {
%5 = fcmp ole float %0, %1
%6 = select i1 %5, float %2, float %3
ret float %6
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint8_t;

/* Variables and functions */
uint8_t ip_get_proto(const uint8_t *p_ip) { return p_ip[9]; }


x86 assembly (clang, -O0):
<ip_get_proto>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x24(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ip_get_proto>:
mov    0x24(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @ip_get_proto(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 9
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @ip_get_proto(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 9
%3 = load i32, i32* %2
ret i32 %3
}
int test_imm_3Fuint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0x3F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Fuint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x3f,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Fuint64_lowword_mem>:
testb  $0x3f,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Fuint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 63
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_3Fuint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 63
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int on_new_client(struct fs_context *context, int cid) { return 1; }


x86 assembly (clang, -O0):
<on_new_client>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<on_new_client>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.fs_context = type opaque
define i32 @on_new_client(%struct.fs_context* %0, i32 %1) {
%3 = alloca %struct.fs_context*
%4 = alloca i32
store %struct.fs_context* %0, %struct.fs_context** %3
store i32 %1, i32* %4
ret i32 1
}

LLVM IR (-O2):
%struct.fs_context = type opaque
define i32 @on_new_client(%struct.fs_context* nocapture readnone %0, i32 %1) {
ret i32 1
}
/* Variables and functions */
int cos(double);
int sin(double);
int md_rot_y(int y0, double pho, int x, int y) {
  return ((int)y0 - (int)(-x * sin(pho) + y * cos(pho)));
}


x86 assembly (clang, -O0):
<md_rot_y>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
xor    %eax,%eax
sub    -0x14(%rbp),%eax
mov    %eax,-0x28(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <sin@plt>
mov    %eax,%ecx
mov    -0x28(%rbp),%eax
imul   %ecx,%eax
mov    %eax,-0x20(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x24(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1040 <cos@plt>
mov    -0x24(%rbp),%edx
mov    -0x20(%rbp),%ecx
mov    %eax,%esi
mov    -0x1c(%rbp),%eax
imul   %esi,%edx
add    %edx,%ecx
sub    %ecx,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<md_rot_y>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %esi,%ebp
movsd  %xmm0,(%rsp)
mov    %edi,%r15d
call   1030 <sin@plt>
mov    %eax,%ebx
imul   %ebp,%ebx
movsd  (%rsp),%xmm0
call   1040 <cos@plt>
imul   %r14d,%eax
add    %r15d,%ebx
sub    %eax,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @md_rot_y(i32 %0, double %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca double
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store double %1, double* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %7
%11 = sub nsw i32 0, %10
%12 = load double, double* %6
%13 = call i32 @sin(double %12)
%14 = mul nsw i32 %11, %13
%15 = load i32, i32* %8
%16 = load double, double* %6
%17 = call i32 @cos(double %16)
%18 = mul nsw i32 %15, %17
%19 = add nsw i32 %14, %18
%20 = sub nsw i32 %9, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @md_rot_y(i32 %0, double %1, i32 %2, i32 %3) {
%5 = tail call i32 @sin(double %1)
%6 = mul i32 %5, %2
%7 = tail call i32 @cos(double %1)
%8 = mul nsw i32 %7, %3
%9 = add i32 %6, %0
%10 = sub i32 %9, %8
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
struct btree {
  int dummy;
};

/* Variables and functions */
int _bt_remove(struct btree *, int /*<<< orphan*/, int /*<<< orphan*/ *);
int bt_remove(struct btree *bt, uint64_t id) {
  return _bt_remove(bt, id, NULL);
}


x86 assembly (clang, -O0):
<bt_remove>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <_bt_remove@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bt_remove>:
xor    %edx,%edx
jmp    1030 <_bt_remove@plt>

LLVM IR (-O0):
%struct.btree = type { i32 }
define i32 @bt_remove(%struct.btree* %0, i32 %1) {
%3 = alloca %struct.btree*
%4 = alloca i32
store %struct.btree* %0, %struct.btree** %3
store i32 %1, i32* %4
%5 = load %struct.btree*, %struct.btree** %3
%6 = load i32, i32* %4
%7 = call i32 @_bt_remove(%struct.btree* %5, i32 %6, i32* null)
ret i32 %7
}

LLVM IR (-O2):
%struct.btree = type { i32 }
define i32 @bt_remove(%struct.btree* %0, i32 %1) {
%3 = tail call i32 @_bt_remove(%struct.btree* %0, i32 %1, i32* null)
ret i32 %3
}
void Interp1(unsigned char *pc, int c1, int c2) {
  c1 &= 0xfcfcfc;
  c2 &= 0xfcfcfc;
  *((int *)pc) = (c1 * 3 + c2) >> 2;
}


x86 assembly (clang, -O0):
<Interp1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
and    $0xfcfcfc,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
and    $0xfcfcfc,%eax
mov    %eax,-0x10(%rbp)
imul   $0x3,-0xc(%rbp),%ecx
add    -0x10(%rbp),%ecx
sar    $0x2,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Interp1>:
and    $0xfcfcfc,%esi
and    $0xfcfcfc,%edx
lea    (%rsi,%rsi,2),%eax
add    %edx,%eax
shr    $0x2,%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @Interp1(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = and i32 %7, 16579836
store i32 %8, i32* %5
%9 = load i32, i32* %6
%10 = and i32 %9, 16579836
store i32 %10, i32* %6
%11 = load i32, i32* %5
%12 = mul nsw i32 %11, 3
%13 = load i32, i32* %6
%14 = add nsw i32 %12, %13
%15 = ashr i32 %14, 2
%16 = load i8*, i8** %4
%17 = bitcast i8* %16 to i32*
store i32 %15, i32* %17
ret void
}

LLVM IR (-O2):
define void @Interp1(i8* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = and i32 %1, 16579836
%5 = and i32 %2, 16579836
%6 = mul nuw nsw i32 %4, 3
%7 = add nuw nsw i32 %6, %5
%8 = lshr exact i32 %7, 2
%9 = bitcast i8* %0 to i32*
store i32 %8, i32* %9
ret void
}
int linux_setffaff_() { return 0; }


x86 assembly (clang, -O0):
<linux_setffaff_>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<linux_setffaff_>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @linux_setffaff_() {
ret i32 0
}

LLVM IR (-O2):
define i32 @linux_setffaff_() {
ret i32 0
}
void stat_cache_xattrname(const char *name) { ((void)(name)); }


x86 assembly (clang, -O0):
<stat_cache_xattrname>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<stat_cache_xattrname>:
ret

LLVM IR (-O0):
define void @stat_cache_xattrname(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @stat_cache_xattrname(i8* nocapture %0) {
ret void
}
int foo2(int n) { return n * 4; }


x86 assembly (clang, -O0):
<foo2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo2>:
lea    0x0(,%rdi,4),%eax
ret

LLVM IR (-O0):
define i32 @foo2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 4
ret i32 %4
}

LLVM IR (-O2):
define i32 @foo2(i32 %0) {
%2 = shl nsw i32 %0, 2
ret i32 %2
}
int xModifierMask(int lock) {
  int mask;
  switch (lock) {
  case 1:
    mask = 0x02;
    break;
  case 2:
    mask = 0x10;
    break;
  default:
    mask = 0;
  }
  return mask;
}


x86 assembly (clang, -O0):
<xModifierMask>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x1,%eax
je     112c <xModifierMask+0x2c>
jmp    111b <xModifierMask+0x1b>
mov    -0xc(%rbp),%eax
sub    $0x2,%eax
je     1138 <xModifierMask+0x38>
jmp    1144 <xModifierMask+0x44>
movl   $0x2,-0x8(%rbp)
jmp    114b <xModifierMask+0x4b>
movl   $0x10,-0x8(%rbp)
jmp    114b <xModifierMask+0x4b>
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xModifierMask>:
xor    %ecx,%ecx
cmp    $0x2,%edi
sete   %cl
shl    $0x4,%ecx
cmp    $0x1,%edi
mov    $0x2,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @xModifierMask(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
switch i32 %4, label %7 [
i32 1, label %5
i32 2, label %6
]
5: ; preds = %1
store i32 2, i32* %3
br label %8
6: ; preds = %1
store i32 16, i32* %3
br label %8
7: ; preds = %1
store i32 0, i32* %3
br label %8
8: ; preds = %7, %6, %5
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @xModifierMask(i32 %0) {
%2 = icmp eq i32 %0, 2
%3 = select i1 %2, i32 16, i32 0
%4 = icmp eq i32 %0, 1
%5 = select i1 %4, i32 2, i32 %3
ret i32 %5
}
/* Type definitions */
struct meta {
  int dummy;
};
struct hash {
  int dummy;
};

/* Variables and functions */
struct hash *newHashExt(int /*<<< orphan*/, int);
int /*<<< orphan*/ rHashMetaList(struct hash *, struct meta *);
struct hash *metaHash(struct meta *forest) {
  struct hash *hash = newHashExt(0, 1);
  rHashMetaList(hash, forest);
  return hash;
}


x86 assembly (clang, -O0):
<metaHash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <newHashExt@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <rHashMetaList@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<metaHash>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <newHashExt@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1040 <rHashMetaList@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.hash = type { i32 }
%struct.meta = type { i32 }
define %struct.hash* @metaHash(%struct.meta* %0) {
%2 = alloca %struct.meta*
%3 = alloca %struct.hash*
store %struct.meta* %0, %struct.meta** %2
%4 = call %struct.hash* @newHashExt(i32 0, i32 1)
store %struct.hash* %4, %struct.hash** %3
%5 = load %struct.hash*, %struct.hash** %3
%6 = load %struct.meta*, %struct.meta** %2
%7 = call i32 @rHashMetaList(%struct.hash* %5, %struct.meta* %6)
%8 = load %struct.hash*, %struct.hash** %3
ret %struct.hash* %8
}

LLVM IR (-O2):
%struct.hash = type { i32 }
%struct.meta = type { i32 }
define %struct.hash* @metaHash(%struct.meta* %0) {
%2 = tail call %struct.hash* @newHashExt(i32 0, i32 1)
%3 = tail call i32 @rHashMetaList(%struct.hash* %2, %struct.meta* %0)
ret %struct.hash* %2
}
double perimetroDoTriangulo(double a, double b, double c) { return a + b + c; }


x86 assembly (clang, -O0):
<perimetroDoTriangulo>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
addsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<perimetroDoTriangulo>:
addsd  %xmm1,%xmm0
addsd  %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @perimetroDoTriangulo(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = fadd double %7, %8
%10 = load double, double* %6
%11 = fadd double %9, %10
ret double %11
}

LLVM IR (-O2):
define double @perimetroDoTriangulo(double %0, double %1, double %2) {
%4 = fadd double %0, %1
%5 = fadd double %4, %2
ret double %5
}
/* Variables and functions */
int /*<<< orphan*/ free(double *);
void free_dvector(double *v, int nl, int nh) { free((double *)(v + nl)); }


x86 assembly (clang, -O0):
<free_dvector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
movslq -0xc(%rbp),%rax
shl    $0x3,%rax
add    %rax,%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_dvector>:
movslq %esi,%rax
lea    (%rdi,%rax,8),%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_dvector(double* %0, i32 %1, i32 %2) {
%4 = alloca double*
%5 = alloca i32
%6 = alloca i32
store double* %0, double** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load double*, double** %4
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds double, double* %7, i64 %9
%11 = call i32 @free(double* %10)
ret void
}

LLVM IR (-O2):
define void @free_dvector(double* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds double, double* %0, i64 %4
%6 = tail call i32 @free(double* %5)
ret void
}
double erdl_dp(double r, double d, double m1) {
  double a0, a1, a2;
  erdl_coeff(r, d, m1, &a0, &a1, &a2);
  return (((a1) * (a1)) - 4.0 * a0 * a2);
}


x86 assembly (clang, -O0):
<erdl_dp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
lea    -0x20(%rbp),%rdi
lea    -0x28(%rbp),%rsi
lea    -0x30(%rbp),%rdx
mov    $0x3,%al
call   1030 <erdl_coeff@plt>
movsd  -0x28(%rbp),%xmm0
movsd  -0x28(%rbp),%xmm2
movsd  0xea5(%rip),%xmm1
mulsd  -0x20(%rbp),%xmm1
mulsd  -0x30(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<erdl_dp>:
sub    $0x18,%rsp
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rsi
mov    %rsp,%rdx
mov    $0x3,%al
call   1030 <erdl_coeff@plt>
movsd  0x8(%rsp),%xmm0
movsd  0x10(%rsp),%xmm1
mulsd  0xec4(%rip),%xmm1
mulsd  (%rsp),%xmm1
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @erdl_dp(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
%9 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%10 = load double, double* %4
%11 = load double, double* %5
%12 = load double, double* %6
%13 = call i32 (double, double, double, double*, double*, double*, ...) bitcast (i32 (...)* @erdl_coeff to i32 (double, double, double, double*, double*, double*, ...)*)(double %10, double %11, double %12, double* %7, double* %8, double* %9)
%14 = load double, double* %8
%15 = load double, double* %8
%16 = load double, double* %7
%17 = fmul double 4.000000e+00, %16
%18 = load double, double* %9
%19 = fmul double %17, %18
%20 = fneg double %19
%21 = call double @llvm.fmuladd.f64(double %14, double %15, double %20)
ret double %21
}

LLVM IR (-O2):
define double @erdl_dp(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = bitcast double* %4 to i8*
%8 = bitcast double* %5 to i8*
%9 = bitcast double* %6 to i8*
%10 = call i32 (double, double, double, double*, double*, double*, ...) bitcast (i32 (...)* @erdl_coeff to i32 (double, double, double, double*, double*, double*, ...)*)(double %0, double %1, double %2, double* %4, double* %5, double* %6)
%11 = load double, double* %5
%12 = load double, double* %4
%13 = load double, double* %6
%14 = fmul double %12, -4.000000e+00
%15 = fmul double %14, %13
%16 = call double @llvm.fmuladd.f64(double %11, double %11, double %15)
ret double %16
}
void gtk_get_option_group() {}


x86 assembly (clang, -O0):
<gtk_get_option_group>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_get_option_group>:
ret

LLVM IR (-O0):
define void @gtk_get_option_group() {
ret void
}

LLVM IR (-O2):
define void @gtk_get_option_group() {
ret void
}
/* Variables and functions */
int nvme_attach_ns(int, char **, int /*<<< orphan*/, char const *);
int detach_ns(int argc, char **argv) {
  const char *desc =
      "detach-ns: detach the given namespace from the "
      "given controller; de-activates the given namespace's ID. A "
      "namespace must be attached to a controller before IO "
      "commands may be directed to that namespace.";
  return nvme_attach_ns(argc, argv, 0, desc);
}


x86 assembly (clang, -O0):
<detach_ns>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
xor    %edx,%edx
call   1030 <nvme_attach_ns@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<detach_ns>:
lea    0xee9(%rip),%rcx
xor    %edx,%edx
jmp    1030 <nvme_attach_ns@plt>

LLVM IR (-O0):
@.str = [203 x i8] c"detach-ns: detach the given namespace from the given controller; de-activates the given namespace's ID. A namespace must be attached to a controller before IO commands may be directed to that namespace.\00"
define i32 @detach_ns(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i8*
store i32 %0, i32* %3
store i8** %1, i8*** %4
store i8* getelementptr inbounds ([203 x i8], [203 x i8]* @.str, i64 0, i64 0), i8** %5
%6 = load i32, i32* %3
%7 = load i8**, i8*** %4
%8 = load i8*, i8** %5
%9 = call i32 @nvme_attach_ns(i32 %6, i8** %7, i32 0, i8* %8)
ret i32 %9
}

LLVM IR (-O2):
@.str = [203 x i8] c"detach-ns: detach the given namespace from the given controller; de-activates the given namespace's ID. A namespace must be attached to a controller before IO commands may be directed to that namespace.\00"
define i32 @detach_ns(i32 %0, i8** %1) {
%3 = tail call i32 @nvme_attach_ns(i32 %0, i8** %1, i32 0, i8* getelementptr inbounds ([203 x i8], [203 x i8]* @.str, i64 0, i64 0))
ret i32 %3
}
/* Variables and functions */
int EPOLLIN;
int _read_event() { return EPOLLIN; }


x86 assembly (clang, -O0):
<_read_event>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_read_event>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@EPOLLIN = global i32 0
define i32 @_read_event() {
%1 = load i32, i32* @EPOLLIN
ret i32 %1
}

LLVM IR (-O2):
@EPOLLIN = global i32 0
define i32 @_read_event() {
%1 = load i32, i32* @EPOLLIN
ret i32 %1
}
/* Type definitions */
typedef int (*FPTR)(int, int);

/* Variables and functions */
void *dlopen(char *, int);
scalar_t__ dlsym(void *, char *);
int stub1(int, int);
int do_test_so_func(int a, int b) {
  void *handle;
  typedef int (*FPTR)(int, int);
  handle = dlopen("./test_so.so", 1);
  FPTR fptr = (FPTR)dlsym(handle, "test_so_func");
  int result = (*fptr)(a, b);
  return result;
}


x86 assembly (clang, -O0):
<do_test_so_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    0xecb(%rip),%rdi
mov    $0x1,%esi
call   1030 <dlopen@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xebf(%rip),%rsi
call   1040 <dlsym@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   *%rax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_test_so_func>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
lea    0xed2(%rip),%rdi
mov    $0x1,%esi
call   1030 <dlopen@plt>
lea    0xece(%rip),%rsi
mov    %rax,%rdi
call   1040 <dlsym@plt>
mov    %ebp,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    *%rax

LLVM IR (-O0):
@.str = [13 x i8] c"./test_so.so\00"
@.str.1 = [13 x i8] c"test_so_func\00"
define i32 @do_test_so_func(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32 (i32, i32)*
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = call i8* @dlopen(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 1)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = call i64 @dlsym(i8* %9, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
%11 = inttoptr i64 %10 to i32 (i32, i32)*
store i32 (i32, i32)* %11, i32 (i32, i32)** %6
%12 = load i32 (i32, i32)*, i32 (i32, i32)** %6
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = call i32 %12(i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32, i32* %7
ret i32 %16
}

LLVM IR (-O2):
@.str = [13 x i8] c"./test_so.so\00"
@.str.1 = [13 x i8] c"test_so_func\00"
define i32 @do_test_so_func(i32 %0, i32 %1) {
%3 = tail call i8* @dlopen(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = tail call i64 @dlsym(i8* %3, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
%5 = inttoptr i64 %4 to i32 (i32, i32)*
%6 = tail call i32 %5(i32 %0, i32 %1)
ret i32 %6
}
int args_default_stickless(void *user_data, const char *argument) {
  (void)user_data;
  return (argument[0] != '-') && (argument[0] != '+');
}


x86 assembly (clang, -O0):
<args_default_stickless>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x2d,%ecx
mov    %al,-0x11(%rbp)
je     1131 <args_default_stickless+0x31>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2b,%eax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<args_default_stickless>:
mov    (%rsi),%cl
add    $0xd5,%cl
xor    %eax,%eax
test   $0xfd,%cl
setne  %al
ret

LLVM IR (-O0):
define i32 @args_default_stickless(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 45
br i1 %10, label %11, label %17
11: ; preds = %2
%12 = load i8*, i8** %4
%13 = getelementptr inbounds i8, i8* %12, i64 0
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 43
br label %17
17: ; preds = %11, %2
%18 = phi i1 [ false, %2 ], [ %16, %11 ]
%19 = zext i1 %18 to i32
ret i32 %19
}

LLVM IR (-O2):
define i32 @args_default_stickless(i8* nocapture readnone %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp ne i8 %3, 45
%5 = icmp ne i8 %3, 43
%6 = and i1 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void fiq_handler(void) { printf("FIQ HANDLER\n"); }


x86 assembly (clang, -O0):
<fiq_handler>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiq_handler>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"FIQ HANDLER\0A\00"
define void @fiq_handler() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [12 x i8] c"FIQ HANDLER\00"
define void @fiq_handler() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fatal(char *);
char *strdup(char const *);
char *xstrdup(const char *s) {
  char *p;
  p = strdup(s);
  if (p == NULL)
    fatal("%s: failed to dup string");
  return p;
}


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strdup@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <xstrdup+0x30>
lea    0xeb5(%rip),%rdi
call   1040 <fatal@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
push   %rbx
call   1030 <strdup@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <xstrdup+0x1a>
lea    0xecb(%rip),%rdi
call   1040 <fatal@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"%s: failed to dup string\00"
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strdup(i8* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @fatal(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [25 x i8] c"%s: failed to dup string\00"
define noalias i8* @xstrdup(i8* nocapture %0) {
%2 = tail call i8* @strdup(i8* %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @fatal(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
scalar_t__ fclose(int /*<<< orphan*/ *);
bool close_4(FILE *this, void *unused) {
  if (this != NULL)
    return fclose(this) == 0;
  else
    return true;
}


x86 assembly (clang, -O0):
<close_4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1148 <close_4+0x38>
mov    -0x10(%rbp),%rdi
call   1030 <fclose@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    114f <close_4+0x3f>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_4>:
test   %rdi,%rdi
je     112b <close_4+0x1b>
push   %rax
call   1030 <fclose@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
add    $0x8,%rsp
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @close_4(i32* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i8*
store i32* %0, i32** %4
store i8* %1, i8** %5
%6 = load i32*, i32** %4
%7 = icmp ne i32* %6, null
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load i32*, i32** %4
%10 = call i64 @fclose(i32* %9)
%11 = icmp eq i64 %10, 0
%12 = zext i1 %11 to i32
store i32 %12, i32* %3
br label %14
13: ; preds = %2
store i32 1, i32* %3
br label %14
14: ; preds = %13, %8
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @close_4(i32* %0, i8* nocapture readnone %1) {
%3 = icmp eq i32* %0, null
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = tail call i64 @fclose(i32* %0)
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %2, %4
%9 = phi i32 [ %7, %4 ], [ 1, %2 ]
ret i32 %9
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int bits_per_pixel;
};
typedef TYPE_1__ ScreenFormat;

/* Variables and functions */
void set_ScreenFormat_bits_per_pixel(void *_p, int _v) {
  ((ScreenFormat *)_p)->bits_per_pixel = (int)_v;
}


x86 assembly (clang, -O0):
<set_ScreenFormat_bits_per_pixel>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_ScreenFormat_bits_per_pixel>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_ScreenFormat_bits_per_pixel(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_ScreenFormat_bits_per_pixel(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void self_def_undo_width(int size) {
  for (; size > 0; size--) {
    printf("\033[31;1m-\033[0m");
  }
}


x86 assembly (clang, -O0):
<self_def_undo_width>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    113f <self_def_undo_width+0x2f>
lea    0xed4(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    111b <self_def_undo_width+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<self_def_undo_width>:
push   %r14
push   %rbx
push   %rax
test   %edi,%edi
jle    1140 <self_def_undo_width+0x30>
mov    %edi,%ebx
add    $0x1,%ebx
lea    0xedc(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0xffffffff,%ebx
cmp    $0x1,%ebx
ja     1130 <self_def_undo_width+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [13 x i8] c"\1B[31;1m-\1B[0m\00"
define void @self_def_undo_width(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %8, %1
%4 = load i32, i32* %2
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6
%9 = load i32, i32* %2
%10 = add nsw i32 %9, -1
store i32 %10, i32* %2
br label %3
11: ; preds = %3
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"\1B[31;1m-\1B[0m\00"
define void @self_def_undo_width(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ %0, %1 ]
%5 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%6 = add nsw i32 %4, -1
%7 = icmp ugt i32 %4, 1
br i1 %7, label %3, label %8
8: ; preds = %3, %1
ret void
}
int __ev_start() { return 0; }


x86 assembly (clang, -O0):
<__ev_start>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ev_start>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__ev_start() {
ret i32 0
}

LLVM IR (-O2):
define i32 @__ev_start() {
ret i32 0
}
unsigned char f32(unsigned char x, unsigned long int y) {
  return (x >> (8 * sizeof(unsigned char) - y)) ^ (x << y);
}


x86 assembly (clang, -O0):
<f32>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movzbl -0x1(%rbp),%eax
mov    $0x8,%ecx
sub    -0x10(%rbp),%rcx
sar    %cl,%eax
movzbl -0x1(%rbp),%edx
mov    -0x10(%rbp),%rcx
shl    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f32>:
mov    $0x8,%cl
sub    %sil,%cl
mov    %edi,%eax
shr    %cl,%eax
mov    %esi,%ecx
shl    %cl,%edi
xor    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @f32(i8 zeroext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
store i8 %0, i8* %3
store i64 %1, i64* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i64, i64* %4
%8 = sub i64 8, %7
%9 = trunc i64 %8 to i32
%10 = ashr i32 %6, %9
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = load i64, i64* %4
%14 = trunc i64 %13 to i32
%15 = shl i32 %12, %14
%16 = xor i32 %10, %15
%17 = trunc i32 %16 to i8
ret i8 %17
}

LLVM IR (-O2):
define zeroext i8 @f32(i8 zeroext %0, i64 %1) {
%3 = zext i8 %0 to i32
%4 = trunc i64 %1 to i32
%5 = sub i32 8, %4
%6 = lshr i32 %3, %5
%7 = shl i32 %3, %4
%8 = xor i32 %6, %7
%9 = trunc i32 %8 to i8
ret i8 %9
}
unsigned int read_le_int(const unsigned char *buf) {
  return buf[0] | (buf[1] << 8) | (buf[2] << 16) | (buf[3] << 24);
}


x86 assembly (clang, -O0):
<read_le_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%ecx
shl    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_le_int>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @read_le_int(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = or i32 %6, %11
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i64 2
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 16
%18 = or i32 %12, %17
%19 = load i8*, i8** %2
%20 = getelementptr inbounds i8, i8* %19, i64 3
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = shl i32 %22, 24
%24 = or i32 %18, %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @read_le_int(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = or i32 %7, %3
%9 = getelementptr inbounds i8, i8* %0, i64 2
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = shl nuw nsw i32 %11, 16
%13 = or i32 %8, %12
%14 = getelementptr inbounds i8, i8* %0, i64 3
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = shl nuw i32 %16, 24
%18 = or i32 %13, %17
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ do_regular_work();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
scalar_t__ get_ticket();
int /*<<< orphan*/ release_ticket();
int /*<<< orphan*/ setup();
int /*<<< orphan*/ shut_down();
int man(int ac, char *av[]) {
  setup();
  if (get_ticket() != 0)
    exit(0);
  do_regular_work();
  release_ticket();
  shut_down();
}


x86 assembly (clang, -O0):
<man>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1080 <setup@plt>
mov    $0x0,%al
call   1030 <get_ticket@plt>
cmp    $0x0,%rax
je     118e <man+0x2e>
xor    %edi,%edi
call   1060 <exit@plt>
mov    $0x0,%al
call   1050 <do_regular_work@plt>
mov    $0x0,%al
call   1040 <release_ticket@plt>
mov    $0x0,%al
call   1070 <shut_down@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<man>:
push   %rax
xor    %eax,%eax
call   1080 <setup@plt>
xor    %eax,%eax
call   1030 <get_ticket@plt>
test   %rax,%rax
jne    118a <man+0x2a>
xor    %eax,%eax
call   1050 <do_regular_work@plt>
xor    %eax,%eax
call   1040 <release_ticket@plt>
xor    %eax,%eax
pop    %rcx
jmp    1070 <shut_down@plt>
xor    %edi,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
define i32 @man(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @setup()
%7 = call i64 (...) @get_ticket()
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 @exit(i32 0)
unreachable
11: ; preds = %2
%12 = call i32 (...) @do_regular_work()
%13 = call i32 (...) @release_ticket()
%14 = call i32 (...) @shut_down()
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @man(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @setup()
%4 = tail call i64 (...) @get_ticket()
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 @exit(i32 0)
unreachable
8: ; preds = %2
%9 = tail call i32 (...) @do_regular_work()
%10 = tail call i32 (...) @release_ticket()
%11 = tail call i32 (...) @shut_down()
ret i32 undef
}
char *scr_get_type(struct screen *s) { return "Screen"; }


x86 assembly (clang, -O0):
<scr_get_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    0xef1(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scr_get_type>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
%struct.screen = type opaque
@.str = [7 x i8] c"Screen\00"
define i8* @scr_get_type(%struct.screen* %0) {
%2 = alloca %struct.screen*
store %struct.screen* %0, %struct.screen** %2
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
%struct.screen = type opaque
@.str = [7 x i8] c"Screen\00"
define i8* @scr_get_type(%struct.screen* nocapture readnone %0) {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}
void _on_bootstrap(void) {}


x86 assembly (clang, -O0):
<_on_bootstrap>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_on_bootstrap>:
ret

LLVM IR (-O0):
define void @_on_bootstrap() {
ret void
}

LLVM IR (-O2):
define void @_on_bootstrap() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_macc_ps(int /*<<< orphan*/, int /*<<< orphan*/,
                               int /*<<< orphan*/);
__m128 __attribute__((__target__("fma4")))
mm_macc_ps_wrap(__m128 a, __m128 b, __m128 c) {
  return _mm_macc_ps(a, b, c);
}


x86 assembly (clang, -O0):
<mm_macc_ps_wrap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <_mm_macc_ps@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mm_macc_ps_wrap>:
jmp    1030 <_mm_macc_ps@plt>

LLVM IR (-O0):
define i32 @mm_macc_ps_wrap(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @_mm_macc_ps(i32 %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @mm_macc_ps_wrap(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @_mm_macc_ps(i32 %0, i32 %1, i32 %2)
ret i32 %4
}
void gtk_notebook_set_show_border() {}


x86 assembly (clang, -O0):
<gtk_notebook_set_show_border>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_notebook_set_show_border>:
ret

LLVM IR (-O0):
define void @gtk_notebook_set_show_border() {
ret void
}

LLVM IR (-O2):
define void @gtk_notebook_set_show_border() {
ret void
}
/* Variables and functions */
double cos(double);
double my_cos(double x) { return cos(x); }


x86 assembly (clang, -O0):
<my_cos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <cos@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_cos>:
jmp    1030 <cos@plt>

LLVM IR (-O0):
define double @my_cos(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @cos(double %3)
ret double %4
}

LLVM IR (-O2):
define double @my_cos(double %0) {
%2 = tail call double @cos(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void close_pipe(int *sem) {
  close(sem[0]);
  close(sem[1]);
}


x86 assembly (clang, -O0):
<close_pipe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <close@plt>
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_pipe>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%edi
call   1030 <close@plt>
mov    0x4(%rbx),%edi
pop    %rbx
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @close_pipe(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = call i32 @close(i32 %5)
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = call i32 @close(i32 %9)
ret void
}

LLVM IR (-O2):
define void @close_pipe(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @close(i32 %2)
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = tail call i32 @close(i32 %5)
ret void
}
/* Type definitions */
typedef scalar_t__ uint64_t;

/* Variables and functions */
uint64_t __umoddi3(uint64_t a, uint64_t b) {
  if (b == 0)
    return (uint64_t)-1;
  while (a > b)
    a = a - b;
  return a;
}


x86 assembly (clang, -O0):
<__umoddi3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1124 <__umoddi3+0x24>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    1150 <__umoddi3+0x50>
jmp    1129 <__umoddi3+0x29>
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jle    1148 <__umoddi3+0x48>
mov    -0x10(%rbp),%rax
sub    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1129 <__umoddi3+0x29>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__umoddi3>:
test   %rsi,%rsi
je     1119 <__umoddi3+0x19>
mov    %rdi,%rax
add    %rsi,%rax
nopl   0x0(%rax,%rax,1)
sub    %rsi,%rax
cmp    %rsi,%rax
jg     1110 <__umoddi3+0x10>
ret
mov    $0xffffffffffffffff,%rax
ret

LLVM IR (-O0):
define i64 @__umoddi3(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i64 -1, i64* %3
br label %20
9: ; preds = %2
br label %10
10: ; preds = %14, %9
%11 = load i64, i64* %4
%12 = load i64, i64* %5
%13 = icmp sgt i64 %11, %12
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load i64, i64* %4
%16 = load i64, i64* %5
%17 = sub nsw i64 %15, %16
store i64 %17, i64* %4
br label %10
18: ; preds = %10
%19 = load i64, i64* %4
store i64 %19, i64* %3
br label %20
20: ; preds = %18, %8
%21 = load i64, i64* %3
ret i64 %21
}

LLVM IR (-O2):
define i64 @__umoddi3(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %8, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %7, %4 ], [ %0, %2 ]
%6 = icmp sgt i64 %5, %1
%7 = sub nsw i64 %5, %1
br i1 %6, label %4, label %8
8: ; preds = %4, %2
%9 = phi i64 [ -1, %2 ], [ %5, %4 ]
ret i64 %9
}
void foo532() {}


x86 assembly (clang, -O0):
<foo532>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo532>:
ret

LLVM IR (-O0):
define void @foo532() {
ret void
}

LLVM IR (-O2):
define void @foo532() {
ret void
}
int fmt() { return 42; }


x86 assembly (clang, -O0):
<fmt>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmt>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @fmt() {
ret i32 42
}

LLVM IR (-O2):
define i32 @fmt() {
ret i32 42
}