#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
void SysCtlGPIOAHBEnable(unsigned long ulGPIOPeripheral) {
  DEBUG_ASSERT(
      (ulGPIOPeripheral == 0x20000001) || (ulGPIOPeripheral == 0x20000002) ||
      (ulGPIOPeripheral == 0x20000004) || (ulGPIOPeripheral == 0x20000008) ||
      (ulGPIOPeripheral == 0x20000010) || (ulGPIOPeripheral == 0x20000020) ||
      (ulGPIOPeripheral == 0x20000040) || (ulGPIOPeripheral == 0x20000080) ||
      (ulGPIOPeripheral == 0x20000100));
  (*((volatile unsigned long *)(0x400FE06C))) |= ulGPIOPeripheral & 0xFFFF;
}


x86 assembly (clang, -O0):
<SysCtlGPIOAHBEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%al
cmpq   $0x20000001,-0x8(%rbp)
20
mov    %al,-0x9(%rbp)
je     11c2 <SysCtlGPIOAHBEnable+0xb2>
mov    $0x1,%al
cmpq   $0x20000002,-0x8(%rbp)
20
mov    %al,-0x9(%rbp)
je     11c2 <SysCtlGPIOAHBEnable+0xb2>
mov    $0x1,%al
cmpq   $0x20000004,-0x8(%rbp)
20
mov    %al,-0x9(%rbp)
je     11c2 <SysCtlGPIOAHBEnable+0xb2>
mov    $0x1,%al
cmpq   $0x20000008,-0x8(%rbp)
20
mov    %al,-0x9(%rbp)
je     11c2 <SysCtlGPIOAHBEnable+0xb2>
mov    $0x1,%al
cmpq   $0x20000010,-0x8(%rbp)
20
mov    %al,-0x9(%rbp)
je     11c2 <SysCtlGPIOAHBEnable+0xb2>
mov    $0x1,%al
cmpq   $0x20000020,-0x8(%rbp)
20
mov    %al,-0x9(%rbp)
je     11c2 <SysCtlGPIOAHBEnable+0xb2>
mov    $0x1,%al
cmpq   $0x20000040,-0x8(%rbp)
20
mov    %al,-0x9(%rbp)
je     11c2 <SysCtlGPIOAHBEnable+0xb2>
mov    $0x1,%al
cmpq   $0x20000080,-0x8(%rbp)
20
mov    %al,-0x9(%rbp)
je     11c2 <SysCtlGPIOAHBEnable+0xb2>
cmpq   $0x20000100,-0x8(%rbp)
20
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
and    $0xffff,%rax
mov    $0x400fe06c,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0x400fe06c,%eax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlGPIOAHBEnable>:
push   %rbx
mov    %rdi,%rbx
mov    $0x1,%edi
lea    -0x20000001(%rbx),%rax
cmp    $0x3f,%rax
ja     1148 <SysCtlGPIOAHBEnable+0x38>
movabs $0x800000008000808b,%rcx
bt     %rax,%rcx
jae    1148 <SysCtlGPIOAHBEnable+0x38>
call   1030 <DEBUG_ASSERT@plt>
movzwl %bx,%eax
or     %rax,0x400fe06c
40
pop    %rbx
ret
cmp    $0x20000080,%rbx
je     1136 <SysCtlGPIOAHBEnable+0x26>
xor    %edi,%edi
cmp    $0x20000100,%rbx
sete   %dil
jmp    1136 <SysCtlGPIOAHBEnable+0x26>

LLVM IR (-O0):
define void @SysCtlGPIOAHBEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp eq i64 %3, 536870913
br i1 %4, label %29, label %5
5: ; preds = %1
%6 = load i64, i64* %2
%7 = icmp eq i64 %6, 536870914
br i1 %7, label %29, label %8
8: ; preds = %5
%9 = load i64, i64* %2
%10 = icmp eq i64 %9, 536870916
br i1 %10, label %29, label %11
11: ; preds = %8
%12 = load i64, i64* %2
%13 = icmp eq i64 %12, 536870920
br i1 %13, label %29, label %14
14: ; preds = %11
%15 = load i64, i64* %2
%16 = icmp eq i64 %15, 536870928
br i1 %16, label %29, label %17
17: ; preds = %14
%18 = load i64, i64* %2
%19 = icmp eq i64 %18, 536870944
br i1 %19, label %29, label %20
20: ; preds = %17
%21 = load i64, i64* %2
%22 = icmp eq i64 %21, 536870976
br i1 %22, label %29, label %23
23: ; preds = %20
%24 = load i64, i64* %2
%25 = icmp eq i64 %24, 536871040
br i1 %25, label %29, label %26
26: ; preds = %23
%27 = load i64, i64* %2
%28 = icmp eq i64 %27, 536871168
br label %29
29: ; preds = %26, %23, %20, %17, %14, %11, %8, %5, %1
%30 = phi i1 [ true, %23 ], [ true, %20 ], [ true, %17 ], [ true, %14 ], [ true, %11 ], [ true, %8 ], [ true, %5 ], [ true, %1 ], [ %28, %26 ]
%31 = zext i1 %30 to i32
%32 = call i32 @DEBUG_ASSERT(i32 %31)
%33 = load i64, i64* %2
%34 = and i64 %33, 65535
%35 = load volatile i64, i64* inttoptr (i64 1074782316 to i64*)
%36 = or i64 %35, %34
store volatile i64 %36, i64* inttoptr (i64 1074782316 to i64*)
ret void
}

LLVM IR (-O2):
define void @SysCtlGPIOAHBEnable(i64 %0) {
switch i64 %0, label %2 [
i64 536871040, label %5
i64 536870976, label %5
i64 536870944, label %5
i64 536870928, label %5
i64 536870920, label %5
i64 536870916, label %5
i64 536870914, label %5
i64 536870913, label %5
]
2: ; preds = %1
%3 = icmp eq i64 %0, 536871168
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
%7 = tail call i32 @DEBUG_ASSERT(i32 %6)
%8 = and i64 %0, 65535
%9 = load volatile i64, i64* inttoptr (i64 1074782316 to i64*)
%10 = or i64 %9, %8
store volatile i64 %10, i64* inttoptr (i64 1074782316 to i64*)
ret void
}