xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void wrong(char *msg) {
  fprintf(stderr, "%s", msg);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<wrong>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e8c(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<wrong>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [3 x i8] c"%s\00"
@EXIT_FAILURE = global i32 0
define void @wrong(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @EXIT_FAILURE
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [3 x i8] c"%s\00"
@EXIT_FAILURE = global i32 0
define void @wrong(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @EXIT_FAILURE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ gpioIntClear(int, int);
scalar_t__ gpioIntStatus(int, int);
void PIOINT1_IRQHandler(void) {
  uint32_t regVal;
  regVal = gpioIntStatus(1, 1);
  if (regVal) {
    gpioIntClear(1, 1);
  }
  return;
}


x86 assembly (clang, -O0):
<PIOINT1_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%esi
mov    %esi,%edi
call   1040 <gpioIntStatus@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     114f <PIOINT1_IRQHandler+0x2f>
mov    $0x1,%esi
mov    %esi,%edi
call   1030 <gpioIntClear@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PIOINT1_IRQHandler>:
push   %rax
mov    $0x1,%edi
mov    $0x1,%esi
call   1040 <gpioIntStatus@plt>
test   %rax,%rax
je     1145 <PIOINT1_IRQHandler+0x25>
mov    $0x1,%edi
mov    $0x1,%esi
pop    %rax
jmp    1030 <gpioIntClear@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @PIOINT1_IRQHandler() {
%1 = alloca i64
%2 = call i64 @gpioIntStatus(i32 1, i32 1)
store i64 %2, i64* %1
%3 = load i64, i64* %1
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 @gpioIntClear(i32 1, i32 1)
br label %7
7: ; preds = %5, %0
ret void
}

LLVM IR (-O2):
define void @PIOINT1_IRQHandler() {
%1 = tail call i64 @gpioIntStatus(i32 1, i32 1)
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @gpioIntClear(i32 1, i32 1)
br label %5
5: ; preds = %3, %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ val;

/* Variables and functions */
int /*<<< orphan*/ pipe_write(unsigned short *, int);
void pipe_write_uint16(unsigned short val) { pipe_write(&val, sizeof(val)); }


x86 assembly (clang, -O0):
<pipe_write_uint16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
lea    -0x2(%rbp),%rdi
mov    $0x2,%esi
call   1030 <pipe_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pipe_write_uint16>:
push   %rax
mov    %di,0x6(%rsp)
lea    0x6(%rsp),%rdi
mov    $0x2,%esi
call   1030 <pipe_write@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @pipe_write_uint16(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = call i32 @pipe_write(i16* %2, i32 2)
ret void
}

LLVM IR (-O2):
define void @pipe_write_uint16(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = call i32 @pipe_write(i16* %2, i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ ispunct(int);
void t_ispunct_0x21() {
  Assert_real((ispunct(33)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_ispunct.c",
              170, ("ispunct should be 1 for !"));
}


x86 assembly (clang, -O0):
<t_ispunct_0x21>:
push   %rbp
mov    %rsp,%rbp
mov    $0x21,%edi
call   1030 <ispunct@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0xaa,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_ispunct_0x21>:
push   %rax
mov    $0x21,%edi
call   1030 <ispunct@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0xaa,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [26 x i8] c"ispunct should be 1 for !\00"
define void @t_ispunct_0x21() {
%1 = call i32 @ispunct(i32 33)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 170, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [26 x i8] c"ispunct should be 1 for !\00"
define void @t_ispunct_0x21() {
%1 = tail call i32 @ispunct(i32 33)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 170, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void f5() {
  int x, y;
  int *p;
  p = &x + 1;
  int a[10];
  p = a + 1;
}


x86 assembly (clang, -O0):
<f5>:
push   %rbp
mov    %rsp,%rbp
lea    -0x4(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x10(%rbp)
lea    -0x40(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f5>:
ret

LLVM IR (-O0):
define void @f5() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
%4 = alloca [10 x i32]
%5 = getelementptr inbounds i32, i32* %1, i64 1
store i32* %5, i32** %3
%6 = getelementptr inbounds [10 x i32], [10 x i32]* %4, i64 0, i64 0
%7 = getelementptr inbounds i32, i32* %6, i64 1
store i32* %7, i32** %3
ret void
}

LLVM IR (-O2):
define void @f5() {
ret void
}
/* Variables and functions */
int mostFrequentChar(char *);
int /*<<< orphan*/ printf(char *, int);
int main() {
  char *s = "";
  printf("%c", mostFrequentChar(s));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed3(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <mostFrequentChar@plt>
mov    %eax,%esi
lea    0xebb(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeda(%rip),%rdi
call   1040 <mostFrequentChar@plt>
lea    0xecc(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
@.str.1 = [3 x i8] c"%c\00"
define i32 @main() {
%1 = alloca i8*
store i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = call i32 @mostFrequentChar(i8* %2)
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
@.str.1 = [3 x i8] c"%c\00"
define i32 @main() {
%1 = tail call i32 @mostFrequentChar(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ssort2(char **, int, int /*<<< orphan*/);
void multikeyqsort(char *a[], int n) { ssort2(a, n, 0); }


x86 assembly (clang, -O0):
<multikeyqsort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %edx,%edx
call   1030 <ssort2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<multikeyqsort>:
xor    %edx,%edx
jmp    1030 <ssort2@plt>

LLVM IR (-O0):
define void @multikeyqsort(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
%5 = load i8**, i8*** %3
%6 = load i32, i32* %4
%7 = call i32 @ssort2(i8** %5, i32 %6, i32 0)
ret void
}

LLVM IR (-O2):
define void @multikeyqsort(i8** %0, i32 %1) {
%3 = tail call i32 @ssort2(i8** %0, i32 %1, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void ExitErroMemoria(int k) {
  fprintf(stderr, "ERROR: Not enough memory.\n");
  exit(k);
}


x86 assembly (clang, -O0):
<ExitErroMemoria>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
lea    0xec5(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<ExitErroMemoria>:
push   %rbx
mov    %edi,%ebx
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
lea    0xecd(%rip),%rsi
call   1030 <fprintf@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [27 x i8] c"ERROR: Not enough memory.\0A\00"
define void @ExitErroMemoria(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* %2
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [27 x i8] c"ERROR: Not enough memory.\0A\00"
define void @ExitErroMemoria(i32 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @exit(i32 %0)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ val;
typedef int uint16_t;
struct blob_buf {
  int dummy;
};
struct blob_attr {
  int dummy;
};

/* Variables and functions */
struct blob_attr *blob_put(struct blob_buf *, int, int *, int);
struct blob_attr *blob_put_u16(struct blob_buf *buf, int id, uint16_t val) {
  val = ({
    uint16_t val = ((uint16_t)(val));
    ((uint16_t)(((val >> 8) & 0xffu) | ((val & 0xffu) << 8)));
  });
  return blob_put(buf, id, &val, sizeof(val));
}


x86 assembly (clang, -O0):
<blob_put_u16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    -0x14(%rbp),%ecx
and    $0xff,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
lea    -0x10(%rbp),%rdx
mov    $0x4,%ecx
call   1030 <blob_put@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<blob_put_u16>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rdx
mov    $0x4,%ecx
call   1030 <blob_put@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.blob_attr = type { i32 }
%struct.blob_buf = type { i32 }
define %struct.blob_attr* @blob_put_u16(%struct.blob_buf* %0, i32 %1, i32 %2) {
%4 = alloca %struct.blob_buf*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store %struct.blob_buf* %0, %struct.blob_buf** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i32, i32* %7
store i32 %9, i32* %7
%10 = load i32, i32* %7
%11 = ashr i32 %10, 8
%12 = and i32 %11, 255
%13 = load i32, i32* %7
%14 = and i32 %13, 255
%15 = shl i32 %14, 8
%16 = or i32 %12, %15
store i32 %16, i32* %8
%17 = load i32, i32* %8
store i32 %17, i32* %6
%18 = load %struct.blob_buf*, %struct.blob_buf** %4
%19 = load i32, i32* %5
%20 = call %struct.blob_attr* @blob_put(%struct.blob_buf* %18, i32 %19, i32* %6, i32 4)
ret %struct.blob_attr* %20
}

LLVM IR (-O2):
%struct.blob_attr = type { i32 }
%struct.blob_buf = type { i32 }
define %struct.blob_attr* @blob_put_u16(%struct.blob_buf* %0, i32 %1, i32 %2) {
%4 = alloca i32
store i32 0, i32* %4
%5 = call %struct.blob_attr* @blob_put(%struct.blob_buf* %0, i32 %1, i32* %4, i32 4)
ret %struct.blob_attr* %5
}
int sockopt_ttl(int family, int sock, int ttl) {
  int ret;
  return 0;
}


x86 assembly (clang, -O0):
<sockopt_ttl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sockopt_ttl>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sockopt_ttl(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @sockopt_ttl(i32 %0, i32 %1, i32 %2) {
ret i32 0
}
/* Variables and functions */
float sqrtf_neon_sfp(float);
float invsqrtf_neon_sfp(float x) { return (1.0f / sqrtf_neon_sfp(x)); }


x86 assembly (clang, -O0):
<invsqrtf_neon_sfp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sqrtf_neon_sfp@plt>
movaps %xmm0,%xmm1
movss  0xece(%rip),%xmm0
divss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<invsqrtf_neon_sfp>:
push   %rax
call   1030 <sqrtf_neon_sfp@plt>
movss  0xee2(%rip),%xmm1
divss  %xmm0,%xmm1
movaps %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @invsqrtf_neon_sfp(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @sqrtf_neon_sfp(float %3)
%5 = fdiv float 1.000000e+00, %4
ret float %5
}

LLVM IR (-O2):
define float @invsqrtf_neon_sfp(float %0) {
%2 = tail call float @sqrtf_neon_sfp(float %0)
%3 = fdiv float 1.000000e+00, %2
ret float %3
}
/* Type definitions */
typedef int GLenum;

/* Variables and functions */
#define GL_BYTE 131
#define GL_FIXED 130
#define GL_FLOAT 129
#define GL_SHORT 128
const bool gl_valid_vertex_type(GLenum type) {
  switch (type) {
  case GL_BYTE:
  case GL_FIXED:
  case GL_FLOAT:
  case GL_SHORT:
    return true;
  default:
    return false;
  }
}


x86 assembly (clang, -O0):
<gl_valid_vertex_type>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffff80,%eax
sub    $0x3,%eax
ja     1127 <gl_valid_vertex_type+0x27>
jmp    111b <gl_valid_vertex_type+0x1b>
movl   $0x1,-0x4(%rbp)
jmp    112e <gl_valid_vertex_type+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gl_valid_vertex_type>:
and    $0xfffffffc,%edi
xor    %eax,%eax
cmp    $0x80,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @gl_valid_vertex_type(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 131, label %5
i32 130, label %5
i32 129, label %5
i32 128, label %5
]
5: ; preds = %1, %1, %1, %1
store i32 1, i32* %2
br label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @gl_valid_vertex_type(i32 %0) {
%2 = and i32 %0, -4
%3 = icmp eq i32 %2, 128
%4 = zext i1 %3 to i32
ret i32 %4
}
unsigned int sizes(unsigned int tsz) { return 1 << (tsz + 12); }


x86 assembly (clang, -O0):
<sizes>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
add    $0xc,%ecx
mov    $0x1,%eax
shl    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sizes>:
lea    0xc(%rdi),%ecx
mov    $0x1,%eax
shl    %cl,%eax
ret

LLVM IR (-O0):
define i32 @sizes(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 12
%5 = shl i32 1, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @sizes(i32 %0) {
%2 = add i32 %0, 12
%3 = shl nuw i32 1, %2
ret i32 %3
}
double max(const double a, const double b) { return a < b ? b : a; }


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1131 <max+0x31>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    113b <max+0x3b>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
maxsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @max(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp olt double %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load double, double* %4
br label %12
10: ; preds = %2
%11 = load double, double* %3
br label %12
12: ; preds = %10, %8
%13 = phi double [ %9, %8 ], [ %11, %10 ]
ret double %13
}

LLVM IR (-O2):
define double @max(double %0, double %1) {
%3 = fcmp olt double %0, %1
%4 = select i1 %3, double %1, double %0
ret double %4
}
/* Variables and functions */
scalar_t__ random_int();
double Random_Equi(double mult) { return mult * (int)random_int(); }


x86 assembly (clang, -O0):
<Random_Equi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
mov    $0x0,%al
call   1030 <random_int@plt>
movsd  -0x10(%rbp),%xmm0
cvtsi2sd %eax,%xmm1
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Random_Equi>:
push   %rax
movsd  %xmm0,(%rsp)
xor    %eax,%eax
call   1030 <random_int@plt>
cvtsi2sd %eax,%xmm1
movsd  (%rsp),%xmm0
mulsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @Random_Equi(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i64 (...) @random_int()
%5 = trunc i64 %4 to i32
%6 = sitofp i32 %5 to double
%7 = fmul double %3, %6
ret double %7
}

LLVM IR (-O2):
define double @Random_Equi(double %0) {
%2 = tail call i64 (...) @random_int()
%3 = trunc i64 %2 to i32
%4 = sitofp i32 %3 to double
%5 = fmul double %4, %0
ret double %5
}
void fc135(int n) {
  {
    typedef int(*b)[n];
    {
      typedef int(*c)[n];
      0;
    }
    {
      typedef int(*d)[n];
      0;
    };
    typedef int(*e)[n];
    0;
  };
a:
  goto a;
  {
    typedef int(*f)[n];
    {
      typedef int(*g)[n];
      0;
    };
    {
      typedef int(*h)[n];
      0;
    };
    ;
    typedef int(*i)[n];
    0;
  };
  ;
  typedef int(*j)[n];
  0;
}


x86 assembly (clang, -O0):
<fc135>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fc135+0x7>

x86 assembly (clang, -O2):
<fc135>:
jmp    1100 <fc135>

LLVM IR (-O0):
define void @fc135(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
%7 = load i32, i32* %2
%8 = zext i32 %7 to i64
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
br label %11
11: ; preds = %11, %1
br label %11
12: ; No predecessors!
%13 = load i32, i32* %2
%14 = zext i32 %13 to i64
%15 = load i32, i32* %2
%16 = zext i32 %15 to i64
%17 = load i32, i32* %2
%18 = zext i32 %17 to i64
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
%21 = load i32, i32* %2
%22 = zext i32 %21 to i64
ret void
}

LLVM IR (-O2):
define void @fc135(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
void OSInitHookBegin(void) {}


x86 assembly (clang, -O0):
<OSInitHookBegin>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OSInitHookBegin>:
ret

LLVM IR (-O0):
define void @OSInitHookBegin() {
ret void
}

LLVM IR (-O2):
define void @OSInitHookBegin() {
ret void
}
/* Variables and functions */
int unknown_nat();
void band_positive_Good() {
  char a[9];
  int x = unknown_nat();
  int y = unknown_nat();
  if (x <= 10 && y <= 8) {
    int z = x & y;
    a[z] = 0;
  }
}


x86 assembly (clang, -O0):
<band_positive_Good>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x0,%al
call   1030 <unknown_nat@plt>
mov    %eax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <unknown_nat@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xa,-0x10(%rbp)
jg     1152 <band_positive_Good+0x42>
cmpl   $0x8,-0x14(%rbp)
jg     1152 <band_positive_Good+0x42>
mov    -0x10(%rbp),%eax
and    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
movslq -0x18(%rbp),%rax
movb   $0x0,-0x9(%rbp,%rax,1)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<band_positive_Good>:
push   %rax
xor    %eax,%eax
call   1030 <unknown_nat@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <unknown_nat@plt>

LLVM IR (-O0):
define void @band_positive_Good() {
%1 = alloca [9 x i8]
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = call i32 (...) @unknown_nat()
store i32 %5, i32* %2
%6 = call i32 (...) @unknown_nat()
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = icmp sle i32 %7, 10
br i1 %8, label %9, label %19
9: ; preds = %0
%10 = load i32, i32* %3
%11 = icmp sle i32 %10, 8
br i1 %11, label %12, label %19
12: ; preds = %9
%13 = load i32, i32* %2
%14 = load i32, i32* %3
%15 = and i32 %13, %14
store i32 %15, i32* %4
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds [9 x i8], [9 x i8]* %1, i64 0, i64 %17
store i8 0, i8* %18
br label %19
19: ; preds = %12, %9, %0
ret void
}

LLVM IR (-O2):
define void @band_positive_Good() {
%1 = tail call i32 (...) @unknown_nat()
%2 = tail call i32 (...) @unknown_nat()
ret void
}
int XOR_ASSIGN(int x, int y) { return x ^= y; }


x86 assembly (clang, -O0):
<XOR_ASSIGN>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<XOR_ASSIGN>:
mov    %edi,%eax
xor    %esi,%eax
ret

LLVM IR (-O0):
define i32 @XOR_ASSIGN(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = xor i32 %6, %5
store i32 %7, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @XOR_ASSIGN(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ GETTORS();
int /*<<< orphan*/ PUSH(int /*<<< orphan*/);
void rfetch(void) { PUSH(GETTORS()); }


x86 assembly (clang, -O0):
<rfetch>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <GETTORS@plt>
mov    %eax,%edi
call   1030 <PUSH@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rfetch>:
push   %rax
xor    %eax,%eax
call   1040 <GETTORS@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <PUSH@plt>

LLVM IR (-O0):
define void @rfetch() {
%1 = call i32 (...) @GETTORS()
%2 = call i32 @PUSH(i32 %1)
ret void
}

LLVM IR (-O2):
define void @rfetch() {
%1 = tail call i32 (...) @GETTORS()
%2 = tail call i32 @PUSH(i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int check_cmmfiles(void) {
  FILE *filp;
  filp = fopen("/proc/sys/vm/cmm_pages", "r");
  if (!filp)
    return -1;
  fclose(filp);
  return 0;
}


x86 assembly (clang, -O0):
<check_cmmfiles>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
lea    0xee1(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1156 <check_cmmfiles+0x36>
movl   $0xffffffff,-0x4(%rbp)
jmp    1166 <check_cmmfiles+0x46>
mov    -0x10(%rbp),%rdi
call   1030 <fclose@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_cmmfiles>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xee8(%rip),%rsi
call   1040 <fopen@plt>
test   %rax,%rax
je     1145 <check_cmmfiles+0x25>
mov    %rax,%rdi
call   1030 <fclose@plt>
xor    %eax,%eax
pop    %rcx
ret
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"/proc/sys/vm/cmm_pages\00"
@.str.1 = [2 x i8] c"r\00"
define i32 @check_cmmfiles() {
%1 = alloca i32
%2 = alloca i32*
%3 = call i32* @fopen(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %3, i32** %2
%4 = load i32*, i32** %2
%5 = icmp ne i32* %4, null
br i1 %5, label %7, label %6
6: ; preds = %0
store i32 -1, i32* %1
br label %10
7: ; preds = %0
%8 = load i32*, i32** %2
%9 = call i32 @fclose(i32* %8)
store i32 0, i32* %1
br label %10
10: ; preds = %7, %6
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
@.str = [23 x i8] c"/proc/sys/vm/cmm_pages\00"
@.str.1 = [2 x i8] c"r\00"
define i32 @check_cmmfiles() {
%1 = tail call i32* @fopen(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%2 = icmp eq i32* %1, null
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @fclose(i32* %1)
br label %5
5: ; preds = %0, %3
%6 = phi i32 [ 0, %3 ], [ -1, %0 ]
ret i32 %6
}
int isgraph(int c) {}


x86 assembly (clang, -O0):
<isgraph>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isgraph>:
ret

LLVM IR (-O0):
define i32 @isgraph(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @isgraph(i32 %0) {
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ fputs(char const *, int /*<<< orphan*/ *);
void adb(const char *str, char fn[255]) {
  FILE *fptr;
  fptr = fopen(fn, "a");
  fputs(str, fptr);
  fputs(";", fptr);
  fclose(fptr);
}


x86 assembly (clang, -O0):
<adb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xeb5(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <fputs@plt>
mov    -0x18(%rbp),%rsi
lea    0xe96(%rip),%rdi
call   1040 <fputs@plt>
mov    -0x18(%rbp),%rdi
call   1030 <fclose@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<adb>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rax
mov    %rdi,%r14
lea    0xeaf(%rip),%rsi
mov    %rax,%rdi
call   1060 <fopen@plt>
mov    %rax,%rbx
mov    %r14,%rdi
mov    %rax,%rsi
call   1040 <fputs@plt>
mov    $0x3b,%edi
mov    %rbx,%rsi
call   1050 <fputc@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fclose@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"a\00"
@.str.1 = [2 x i8] c";\00"
define void @adb(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = call i32* @fopen(i8* %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %7, i32** %5
%8 = load i8*, i8** %3
%9 = load i32*, i32** %5
%10 = call i32 @fputs(i8* %8, i32* %9)
%11 = load i32*, i32** %5
%12 = call i32 @fputs(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32* %11)
%13 = load i32*, i32** %5
%14 = call i32 @fclose(i32* %13)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"a\00"
define void @adb(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32* @fopen(i8* %1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @fputs(i8* %0, i32* %3)
%5 = tail call i32 @fputc(i32 59, i32* %3)
%6 = tail call i32 @fclose(i32* %3)
ret void
}
/* Type definitions */
struct timespec {
  double tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ clock_gettime(int, struct timespec *);
double fast_realtime() {
  struct timespec tv;
  clock_gettime(6, &tv);
  return (double)tv.tv_sec + (double)1e-9 * tv.tv_nsec;
}


x86 assembly (clang, -O0):
<fast_realtime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x6,%edi
lea    -0x10(%rbp),%rsi
call   1030 <clock_gettime@plt>
cvtsi2sdq -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
movsd  0xec7(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fast_realtime>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rsi
mov    $0x6,%edi
call   1030 <clock_gettime@plt>
cvtsi2sdq 0x10(%rsp),%xmm1
movsd  0x8(%rsp),%xmm0
mulsd  0xec8(%rip),%xmm0
addsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { double, i64 }
define double @fast_realtime() {
%1 = alloca %struct.timespec
%2 = call i32 @clock_gettime(i32 6, %struct.timespec* %1)
%3 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 1
%4 = load i64, i64* %3
%5 = sitofp i64 %4 to double
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 0
%7 = load double, double* %6
%8 = call double @llvm.fmuladd.f64(double 1.000000e-09, double %7, double %5)
ret double %8
}

LLVM IR (-O2):
%struct.timespec = type { double, i64 }
define double @fast_realtime() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = call i32 @clock_gettime(i32 6, %struct.timespec* %1)
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%5 = load i64, i64* %4
%6 = sitofp i64 %5 to double
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%8 = load double, double* %7
%9 = call double @llvm.fmuladd.f64(double %8, double 1.000000e-09, double %6)
ret double %9
}
/* Variables and functions */
int /*<<< orphan*/ Delay_500us();
void DelayMs(unsigned int delay) {
  while (delay > 0) {
    Delay_500us();
    Delay_500us();
    delay--;
  }
}


x86 assembly (clang, -O0):
<DelayMs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jbe    1141 <DelayMs+0x31>
mov    $0x0,%al
call   1030 <Delay_500us@plt>
mov    $0x0,%al
call   1030 <Delay_500us@plt>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    111b <DelayMs+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DelayMs>:
push   %rbx
test   %edi,%edi
je     1133 <DelayMs+0x23>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <Delay_500us@plt>
xor    %eax,%eax
call   1030 <Delay_500us@plt>
add    $0xffffffff,%ebx
jne    1120 <DelayMs+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @DelayMs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %6, %1
%4 = load i32, i32* %2
%5 = icmp ugt i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = call i32 (...) @Delay_500us()
%8 = call i32 (...) @Delay_500us()
%9 = load i32, i32* %2
%10 = add i32 %9, -1
store i32 %10, i32* %2
br label %3
11: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @DelayMs(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ %0, %1 ]
%5 = tail call i32 (...) @Delay_500us()
%6 = tail call i32 (...) @Delay_500us()
%7 = add i32 %4, -1
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %3
9: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mfp_register(char *);
void initialize() { mfp_register("Hello World!"); }


x86 assembly (clang, -O0):
<initialize>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <mfp_register@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize>:
lea    0xee9(%rip),%rdi
jmp    1030 <mfp_register@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"Hello World!\00"
define void @initialize() {
%1 = call i32 @mfp_register(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hello World!\00"
define void @initialize() {
%1 = tail call i32 @mfp_register(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ handle_CHLD(int /*<<< orphan*/);
int gen_CHLD(void) {
  handle_CHLD(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_CHLD>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_CHLD@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_CHLD>:
push   %rax
xor    %edi,%edi
call   1030 <handle_CHLD@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_CHLD() {
%1 = call i32 @handle_CHLD(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_CHLD() {
%1 = tail call i32 @handle_CHLD(i32 0)
ret i32 0
}
/* Type definitions */
struct termp {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ putchar(int);
void ascii_letter(struct termp *p, int c) { putchar(c); }


x86 assembly (clang, -O0):
<ascii_letter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ascii_letter>:
mov    %esi,%edi
jmp    1030 <putchar@plt>

LLVM IR (-O0):
%struct.termp = type { i32 }
define void @ascii_letter(%struct.termp* %0, i32 %1) {
%3 = alloca %struct.termp*
%4 = alloca i32
store %struct.termp* %0, %struct.termp** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i32 @putchar(i32 %5)
ret void
}

LLVM IR (-O2):
%struct.termp = type { i32 }
define void @ascii_letter(%struct.termp* nocapture readnone %0, i32 %1) {
%3 = tail call i32 @putchar(i32 %1)
ret void
}
int endOption(unsigned char **optionptr) {
  unsigned char *tmpptr = *optionptr;
  while (tmpptr[0] != 0xff) {
    if (tmpptr[0] == 0x00)
      continue;
    tmpptr++;
    tmpptr += tmpptr[0];
    tmpptr++;
  }
  *optionptr = tmpptr;
  return 0;
}


x86 assembly (clang, -O0):
<endOption>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
cmp    $0xff,%eax
je     116c <endOption+0x6c>
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
cmp    $0x0,%eax
jne    113a <endOption+0x3a>
jmp    1113 <endOption+0x13>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movzbl (%rax),%ecx
mov    -0x10(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1113 <endOption+0x13>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<endOption>:
mov    (%rdi),%rax
mov    (%rax),%cl
cs nopw 0x0(%rax,%rax,1)
nop
test   %cl,%cl
je     1110 <endOption+0x10>
cmp    $0xff,%cl
je     1126 <endOption+0x26>
movzbl 0x1(%rax),%ecx
add    %rcx,%rax
add    $0x2,%rax
jmp    1103 <endOption+0x3>
mov    %rax,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @endOption(i8** %0) {
%2 = alloca i8**
%3 = alloca i8*
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
store i8* %5, i8** %3
br label %6
6: ; preds = %19, %18, %1
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i64 0
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = icmp ne i32 %10, 255
br i1 %11, label %12, label %31
12: ; preds = %6
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i64 0
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %12
br label %6
19: ; preds = %12
%20 = load i8*, i8** %3
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %3
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i64 0
%24 = load i8, i8* %23
%25 = zext i8 %24 to i32
%26 = load i8*, i8** %3
%27 = sext i32 %25 to i64
%28 = getelementptr inbounds i8, i8* %26, i64 %27
store i8* %28, i8** %3
%29 = load i8*, i8** %3
%30 = getelementptr inbounds i8, i8* %29, i32 1
store i8* %30, i8** %3
br label %6
31: ; preds = %6
%32 = load i8*, i8** %3
%33 = load i8**, i8*** %2
store i8* %32, i8** %33
ret i32 0
}

LLVM IR (-O2):
define i32 @endOption(i8** nocapture %0) {
%2 = load i8*, i8** %0
br label %3
3: ; preds = %1, %7
%4 = phi i8* [ %12, %7 ], [ %2, %1 ]
%5 = load i8, i8* %4
br label %6
6: ; preds = %3, %6
switch i8 %5, label %7 [
i8 -1, label %13
i8 0, label %6
]
7: ; preds = %6
%8 = getelementptr inbounds i8, i8* %4, i64 1
%9 = load i8, i8* %8
%10 = zext i8 %9 to i64
%11 = getelementptr inbounds i8, i8* %4, i64 2
%12 = getelementptr inbounds i8, i8* %11, i64 %10
br label %3
13: ; preds = %6
store i8* %4, i8** %0
ret i32 0
}
int fun485() { return 485; }


x86 assembly (clang, -O0):
<fun485>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1e5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun485>:
mov    $0x1e5,%eax
ret

LLVM IR (-O0):
define i32 @fun485() {
ret i32 485
}

LLVM IR (-O2):
define i32 @fun485() {
ret i32 485
}
/* Variables and functions */
unsigned char toupper(unsigned char c) {
  if (((c) >= 'a' && (c) <= 'z'))
    c -= 'a' - 'A';
  return c;
}


x86 assembly (clang, -O0):
<toupper>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0x61,%eax
jl     112e <toupper+0x2e>
movzbl -0x1(%rbp),%eax
cmp    $0x7a,%eax
jg     112e <toupper+0x2e>
movzbl -0x1(%rbp),%eax
sub    $0x20,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<toupper>:
lea    -0x61(%rdi),%eax
lea    -0x20(%rdi),%ecx
cmp    $0x1a,%al
movzbl %cl,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @toupper(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %15
6: ; preds = %1
%7 = load i8, i8* %2
%8 = zext i8 %7 to i32
%9 = icmp sle i32 %8, 122
br i1 %9, label %10, label %15
10: ; preds = %6
%11 = load i8, i8* %2
%12 = zext i8 %11 to i32
%13 = sub nsw i32 %12, 32
%14 = trunc i32 %13 to i8
store i8 %14, i8* %2
br label %15
15: ; preds = %10, %6, %1
%16 = load i8, i8* %2
ret i8 %16
}

LLVM IR (-O2):
define zeroext i8 @toupper(i8 zeroext %0) {
%2 = add i8 %0, -97
%3 = icmp ult i8 %2, 26
%4 = add i8 %0, -32
%5 = select i1 %3, i8 %4, i8 %0
ret i8 %5
}
/* Type definitions */
struct list_node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(void *);
void free_list(struct list_node *node) { free((void *)node); }


x86 assembly (clang, -O0):
<free_list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_list>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.list_node = type { i32 }
define void @free_list(%struct.list_node* %0) {
%2 = alloca %struct.list_node*
store %struct.list_node* %0, %struct.list_node** %2
%3 = load %struct.list_node*, %struct.list_node** %2
%4 = bitcast %struct.list_node* %3 to i8*
%5 = call i32 @free(i8* %4)
ret void
}

LLVM IR (-O2):
%struct.list_node = type { i32 }
define void @free_list(%struct.list_node* nocapture %0) {
%2 = bitcast %struct.list_node* %0 to i8*
%3 = tail call i32 @free(i8* %2)
ret void
}
/* Type definitions */
struct rcu_node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ raw_spin_unlock_irqrestore_rcu_node(struct rcu_node *,
                                                       unsigned long);
int rcu_print_task_stall(struct rcu_node *rnp, unsigned long flags) {
  raw_spin_unlock_irqrestore_rcu_node(rnp, flags);
  return 0;
}


x86 assembly (clang, -O0):
<rcu_print_task_stall>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <raw_spin_unlock_irqrestore_rcu_node@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcu_print_task_stall>:
push   %rax
call   1030 <raw_spin_unlock_irqrestore_rcu_node@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.rcu_node = type { i32 }
define i32 @rcu_print_task_stall(%struct.rcu_node* %0, i64 %1) {
%3 = alloca %struct.rcu_node*
%4 = alloca i64
store %struct.rcu_node* %0, %struct.rcu_node** %3
store i64 %1, i64* %4
%5 = load %struct.rcu_node*, %struct.rcu_node** %3
%6 = load i64, i64* %4
%7 = call i32 @raw_spin_unlock_irqrestore_rcu_node(%struct.rcu_node* %5, i64 %6)
ret i32 0
}

LLVM IR (-O2):
%struct.rcu_node = type { i32 }
define i32 @rcu_print_task_stall(%struct.rcu_node* %0, i64 %1) {
%3 = tail call i32 @raw_spin_unlock_irqrestore_rcu_node(%struct.rcu_node* %0, i64 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ HibernateWriteComplete();
void HibernateDataSet(unsigned long *pulData, unsigned long ulCount) {
  unsigned long ulIdx;
  ;
  ;
  for (ulIdx = 0; ulIdx < ulCount; ulIdx++) {
    (*((volatile unsigned long *)(0x400FC030 + (ulIdx * 4)))) = pulData[ulIdx];
    HibernateWriteComplete();
  }
}


x86 assembly (clang, -O0):
<HibernateDataSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    116b <HibernateDataSet+0x5b>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    (%rax,%rcx,8),%rcx
mov    -0x18(%rbp),%rax
shl    $0x2,%rax
add    $0x400fc030,%rax
mov    %rcx,(%rax)
mov    $0x0,%al
call   1030 <HibernateWriteComplete@plt>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1128 <HibernateDataSet+0x18>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateDataSet>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %rsi,%rsi
je     114c <HibernateDataSet+0x3c>
mov    %rsi,%r15
mov    %rdi,%r14
mov    $0x400fc030,%r12d
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rax
mov    %rax,(%r12)
xor    %eax,%eax
call   1030 <HibernateWriteComplete@plt>
add    $0x1,%rbx
add    $0x4,%r12
cmp    %rbx,%r15
jne    1130 <HibernateDataSet+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @HibernateDataSet(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64
%5 = alloca i64
store i64* %0, i64** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %20, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %23
10: ; preds = %6
%11 = load i64*, i64** %3
%12 = load i64, i64* %5
%13 = getelementptr inbounds i64, i64* %11, i64 %12
%14 = load i64, i64* %13
%15 = load i64, i64* %5
%16 = mul i64 %15, 4
%17 = add i64 1074774064, %16
%18 = inttoptr i64 %17 to i64*
store volatile i64 %14, i64* %18
%19 = call i32 (...) @HibernateWriteComplete()
br label %20
20: ; preds = %10
%21 = load i64, i64* %5
%22 = add i64 %21, 1
store i64 %22, i64* %5
br label %6
23: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @HibernateDataSet(i64* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %14, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %12, %4 ], [ 0, %2 ]
%6 = getelementptr inbounds i64, i64* %0, i64 %5
%7 = load i64, i64* %6
%8 = shl i64 %5, 2
%9 = add i64 %8, 1074774064
%10 = inttoptr i64 %9 to i64*
store volatile i64 %7, i64* %10
%11 = tail call i32 (...) @HibernateWriteComplete()
%12 = add nuw i64 %5, 1
%13 = icmp eq i64 %12, %1
br i1 %13, label %14, label %4
14: ; preds = %4, %2
ret void
}
/* Variables and functions */
int yeGetInt(int /*<<< orphan*/);
int /*<<< orphan*/ ygGet(char const *);
int /*<<< orphan*/ ygSetInt(char const *, int);
void ygIntAdd(const char *toSet, int toAdd) {
  int i = yeGetInt(ygGet(toSet));
  ygSetInt(toSet, i + toAdd);
}


x86 assembly (clang, -O0):
<ygIntAdd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <ygGet@plt>
mov    %eax,%edi
call   1050 <yeGetInt@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
add    -0xc(%rbp),%esi
call   1030 <ygSetInt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ygIntAdd>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
call   1040 <ygGet@plt>
mov    %eax,%edi
call   1050 <yeGetInt@plt>
add    %eax,%ebx
mov    %r14,%rdi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <ygSetInt@plt>

LLVM IR (-O0):
define void @ygIntAdd(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = call i32 @ygGet(i8* %6)
%8 = call i32 @yeGetInt(i32 %7)
store i32 %8, i32* %5
%9 = load i8*, i8** %3
%10 = load i32, i32* %5
%11 = load i32, i32* %4
%12 = add nsw i32 %10, %11
%13 = call i32 @ygSetInt(i8* %9, i32 %12)
ret void
}

LLVM IR (-O2):
define void @ygIntAdd(i8* %0, i32 %1) {
%3 = tail call i32 @ygGet(i8* %0)
%4 = tail call i32 @yeGetInt(i32 %3)
%5 = add nsw i32 %4, %1
%6 = tail call i32 @ygSetInt(i8* %0, i32 %5)
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef int uint32_t;

/* Variables and functions */
uint64_t fibRecur(uint32_t n) {
  if (n == 0) {
    return 0;
  } else if (n == 1) {
    return 1;
  } else {
    return fibRecur(n - 1) + fibRecur(n - 2);
  }
}


x86 assembly (clang, -O0):
<fibRecur>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1131 <fibRecur+0x21>
movl   $0x0,-0x4(%rbp)
jmp    116a <fibRecur+0x5a>
cmpl   $0x1,-0x8(%rbp)
jne    1147 <fibRecur+0x37>
movl   $0x1,-0x4(%rbp)
jmp    116a <fibRecur+0x5a>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fibRecur@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fibRecur@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibRecur>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x2,%ebx
jb     1132 <fibRecur+0x22>
nopl   0x0(%rax)
lea    -0x1(%rbx),%edi
call   1030 <fibRecur@plt>
add    %eax,%ebp
add    $0xfffffffe,%ebx
cmp    $0x2,%ebx
jae    1120 <fibRecur+0x10>
add    %ebp,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fibRecur(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %19
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 1, i32* %2
br label %19
11: ; preds = %7
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 1
%14 = call i32 @fibRecur(i32 %13)
%15 = load i32, i32* %3
%16 = sub nsw i32 %15, 2
%17 = call i32 @fibRecur(i32 %16)
%18 = add nsw i32 %14, %17
store i32 %18, i32* %2
br label %19
19: ; preds = %11, %10, %6
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @fibRecur(i32 %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i32 [ 0, %1 ], [ %10, %6 ]
%4 = phi i32 [ %0, %1 ], [ %9, %6 ]
%5 = icmp ult i32 %4, 2
br i1 %5, label %11, label %6
6: ; preds = %2
%7 = add nsw i32 %4, -1
%8 = tail call i32 @fibRecur(i32 %7)
%9 = add nsw i32 %4, -2
%10 = add nsw i32 %8, %3
br label %2
11: ; preds = %2
%12 = add nsw i32 %4, %3
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ _hmt_register_covercase(char *, char *);
void _hmt_covercase_HMM_Vec4_init(void) {
  _hmt_register_covercase("HMM_Vec4", "1");
}


x86 assembly (clang, -O0):
<_hmt_covercase_HMM_Vec4_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee7(%rip),%rsi
call   1030 <_hmt_register_covercase@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_hmt_covercase_HMM_Vec4_init>:
lea    0xee9(%rip),%rdi
lea    0xeeb(%rip),%rsi
jmp    1030 <_hmt_register_covercase@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"HMM_Vec4\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_Vec4_init() {
%1 = call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"HMM_Vec4\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_Vec4_init() {
%1 = tail call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}