xunge/DecIR huggingface dataset:
/* Type definitions */
struct timeval {
  int member_1;
  int /*<<< orphan*/ member_0;
};

/* Variables and functions */
int /*<<< orphan*/ select(int /*<<< orphan*/, int /*<<< orphan*/ *,
                          int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                          struct timeval *);
void _sleep() {
  struct timeval tv = {0, 50000};
  select(0, NULL, NULL, NULL, &tv);
}


x86 assembly (clang, -O0):
<_sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
xor    %edi,%edi
xor    %eax,%eax
mov    %eax,%ecx
lea    -0x8(%rbp),%r8
mov    %rcx,%rsi
mov    %rcx,%rdx
call   1030 <select@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_sleep>:
push   %rax
movabs $0xc35000000000,%rax
mov    %rax,(%rsp)
mov    %rsp,%r8
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
call   1030 <select@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
@__const._sleep.tv = %struct.timeval { i32 0, i32 50000 }
define void @_sleep() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @select(i32 0, i32* null, i32* null, i32* null, %struct.timeval* %1)
ret void
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define void @_sleep() {
%1 = alloca i64
%2 = bitcast i64* %1 to %struct.timeval*
%3 = bitcast i64* %1 to i8*
store i64 214748364800000, i64* %1
%4 = call i32 @select(i32 0, i32* null, i32* null, i32* null, %struct.timeval* %2)
ret void
}
int s(int z) {
  switch (z) {
  case 1:
    return 3;
  case 2:
    return 12;
  case 3:
    z++;
    return z;
    z--;
  case 4:
    switch (z + 1) {
    case 1:
      return 18;
    case 2:
      z++;
    }
    return z;
  default:
    return 12;
  }
  z++;
}


x86 assembly (clang, -O0):

:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x3,%eax
ja     11a4 <s+0xa4>
mov    -0x10(%rbp),%rax
lea    0xed9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x3,-0x4(%rbp)
jmp    11ab <s+0xab>
movl   $0xc,-0x4(%rbp)
jmp    11ab <s+0xab>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    11ab <s+0xab>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
sub    $0x1,%eax
je     1184 <s+0x84>
jmp    1173 <s+0x73>
mov    -0x14(%rbp),%eax
sub    $0x2,%eax
je     1190 <s+0x90>
jmp    1199 <s+0x99>
movl   $0x12,-0x4(%rbp)
jmp    11ab <s+0xab>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    11ab <s+0xab>
movl   $0xc,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):

:
add    $0xffffffff,%edi
mov    $0xc,%eax
cmp    $0x3,%edi
ja     111a <s+0x1a>
movslq %edi,%rax
lea    0xee9(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @s(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %20 [
i32 1, label %5
i32 2, label %6
i32 3, label %7
i32 4, label %11
]
5: ; preds = %1
store i32 3, i32* %2
br label %21
6: ; preds = %1
store i32 12, i32* %2
br label %21
7: ; preds = %1
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
%10 = load i32, i32* %3
store i32 %10, i32* %2
br label %21
11: ; preds = %1
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
switch i32 %13, label %18 [
i32 1, label %14
i32 2, label %15
]
14: ; preds = %11
store i32 18, i32* %2
br label %21
15: ; preds = %11
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
store i32 %17, i32* %3
br label %18
18: ; preds = %15, %11
%19 = load i32, i32* %3
store i32 %19, i32* %2
br label %21
20: ; preds = %1
store i32 12, i32* %2
br label %21
21: ; preds = %20, %18, %14, %7, %6, %5
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
@switch.table.s = [4 x i32] [i32 3, i32 12, i32 4, i32 4]
define i32 @s(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 4
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [4 x i32], [4 x i32]* @switch.table.s, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 12, %1 ]
ret i32 %9
}
int test_imm_D9int16_mem(short *val) {
  return ((*val) & (0xD9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D9int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xd9,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D9int16_mem>:
testb  $0xd9,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D9int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 217
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_D9int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 217
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void clear(unsigned char *bm, int ndx) { bm[ndx >> 3] &= ~(1 << (ndx & 0x07)); }


x86 assembly (clang, -O0):
<clear>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0x7,%ecx
mov    $0x1,%esi
shl    %cl,%esi
xor    $0xffffffff,%esi
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sar    $0x3,%ecx
movslq %ecx,%rcx
movzbl (%rax,%rcx,1),%edx
and    %esi,%edx
mov    %dl,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear>:
mov    %esi,%ecx
and    $0x7,%cl
mov    $0x1,%eax
shl    %cl,%eax
sar    $0x3,%esi
movslq %esi,%rcx
not    %al
and    %al,(%rdi,%rcx,1)
ret

LLVM IR (-O0):
define void @clear(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 7
%7 = shl i32 1, %6
%8 = xor i32 %7, -1
%9 = load i8*, i8** %3
%10 = load i32, i32* %4
%11 = ashr i32 %10, 3
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %9, i64 %12
%14 = load i8, i8* %13
%15 = zext i8 %14 to i32
%16 = and i32 %15, %8
%17 = trunc i32 %16 to i8
store i8 %17, i8* %13
ret void
}

LLVM IR (-O2):
define void @clear(i8* nocapture %0, i32 %1) {
%3 = and i32 %1, 7
%4 = shl nuw nsw i32 1, %3
%5 = ashr i32 %1, 3
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = trunc i32 %4 to i8
%10 = xor i8 %9, -1
%11 = and i8 %8, %10
store i8 %11, i8* %7
ret void
}
/* Variables and functions */
int _InterlockedXor(int volatile *, int);
int test_InterlockedXor(int volatile *value, int mask) {
  return _InterlockedXor(value, mask);
}


x86 assembly (clang, -O0):
<test_InterlockedXor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <_InterlockedXor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_InterlockedXor>:
jmp    1030 <_InterlockedXor@plt>

LLVM IR (-O0):
define i32 @test_InterlockedXor(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @_InterlockedXor(i32* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_InterlockedXor(i32* %0, i32 %1) {
%3 = tail call i32 @_InterlockedXor(i32* %0, i32 %1)
ret i32 %3
}
void test_klp_callbacks_mod_exit(void) { pr_info("%s\n", __func__); }


x86 assembly (clang, -O0):
<test_klp_callbacks_mod_exit>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee2(%rip),%rsi
mov    $0x0,%al
call   1030 <pr_info@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_klp_callbacks_mod_exit>:
lea    0xee9(%rip),%rdi
lea    0xee6(%rip),%rsi
xor    %eax,%eax
jmp    1030 <pr_info@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
@__func__.test_klp_callbacks_mod_exit = [28 x i8] c"test_klp_callbacks_mod_exit\00"
define void @test_klp_callbacks_mod_exit() {
%1 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @pr_info to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([28 x i8], [28 x i8]* @__func__.test_klp_callbacks_mod_exit, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
@__func__.test_klp_callbacks_mod_exit = [28 x i8] c"test_klp_callbacks_mod_exit\00"
define void @test_klp_callbacks_mod_exit() {
%1 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @pr_info to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([28 x i8], [28 x i8]* @__func__.test_klp_callbacks_mod_exit, i64 0, i64 0))
ret void
}
/* Variables and functions */
float sqrt(float);
float bsvm2_opf_ssqrtf(float x) { return ((x >= 0) ? sqrt(x) : (-sqrt(-x))); }


x86 assembly (clang, -O0):
<bsvm2_opf_ssqrtf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     1142 <bsvm2_opf_ssqrtf+0x32>
movss  -0x4(%rbp),%xmm0
call   1030 <sqrt@plt>
movss  %xmm0,-0x8(%rbp)
jmp    116b <bsvm2_opf_ssqrtf+0x5b>
movss  -0x4(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
call   1030 <sqrt@plt>
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bsvm2_opf_ssqrtf>:
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jae    1139 <bsvm2_opf_ssqrtf+0x29>
push   %rax
movaps 0xee0(%rip),%xmm1
xorps  %xmm0,%xmm1
movss  0xee5(%rip),%xmm2
ucomiss %xmm0,%xmm2
jb     1140 <bsvm2_opf_ssqrtf+0x30>
xorps  %xmm0,%xmm0
sqrtss %xmm1,%xmm0
jmp    1148 <bsvm2_opf_ssqrtf+0x38>
jb     1154 <bsvm2_opf_ssqrtf+0x44>
sqrtss %xmm0,%xmm0
ret
movaps %xmm1,%xmm0
call   1030 <sqrt@plt>
xorps  0xeb1(%rip),%xmm0
add    $0x8,%rsp
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define float @bsvm2_opf_ssqrtf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp oge float %3, 0.000000e+00
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load float, float* %2
%7 = call float @sqrt(float %6)
br label %13
8: ; preds = %1
%9 = load float, float* %2
%10 = fneg float %9
%11 = call float @sqrt(float %10)
%12 = fneg float %11
br label %13
13: ; preds = %8, %5
%14 = phi float [ %7, %5 ], [ %12, %8 ]
ret float %14
}

LLVM IR (-O2):
define float @bsvm2_opf_ssqrtf(float %0) {
%2 = fcmp ult float %0, 0.000000e+00
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call float @sqrt(float %0)
br label %9
5: ; preds = %1
%6 = fneg float %0
%7 = tail call float @sqrt(float %6)
%8 = fneg float %7
br label %9
9: ; preds = %5, %3
%10 = phi float [ %4, %3 ], [ %8, %5 ]
ret float %10
}
int f2(int x) { return x == 1 || x == 3 || x == 1; }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x1,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     112f <f2+0x2f>
mov    $0x1,%al
cmpl   $0x3,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     112f <f2+0x2f>
cmpl   $0x1,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
and    $0xfffffffd,%edi
xor    %eax,%eax
cmp    $0x1,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @f2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1
br i1 %4, label %11, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 3
br i1 %7, label %11, label %8
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 1
br label %11
11: ; preds = %8, %5, %1
%12 = phi i1 [ true, %5 ], [ true, %1 ], [ %10, %8 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @f2(i32 %0) {
%2 = and i32 %0, -3
%3 = icmp eq i32 %2, 1
%4 = zext i1 %3 to i32
ret i32 %4
}
void op0xF4(void) {}


x86 assembly (clang, -O0):
<op0xF4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<op0xF4>:
ret

LLVM IR (-O0):
define void @op0xF4() {
ret void
}

LLVM IR (-O2):
define void @op0xF4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ getchar();
int /*<<< orphan*/ printf(char *);
int main() {
  int x;
  x = 0;
  do {
    printf("Hello World!\n");
  } while (x != 0);
  getchar();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
cmpl   $0x0,-0x8(%rbp)
jne    1136 <main+0x16>
mov    $0x0,%al
call   1040 <getchar@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hello World!\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %5, %0
%4 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3
%6 = load i32, i32* %2
%7 = icmp ne i32 %6, 0
br i1 %7, label %3, label %8
8: ; preds = %5
%9 = call i32 (...) @getchar()
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
@str = [13 x i8] c"Hello World!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @getchar()
ret i32 0
}
void vkbcFinal() {}


x86 assembly (clang, -O0):
<vkbcFinal>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vkbcFinal>:
ret

LLVM IR (-O0):
define void @vkbcFinal() {
ret void
}

LLVM IR (-O2):
define void @vkbcFinal() {
ret void
}
/* Variables and functions */
int strlen(char *);
void resize_tag_field(char *field) {
  int i;
  i = strlen(field);
  while (field[i - 1] == ' ')
    i--;
  field[i] = '\0';
}


x86 assembly (clang, -O0):
<resize_tag_field>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x20,%eax
jne    1150 <resize_tag_field+0x40>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    1128 <resize_tag_field+0x18>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<resize_tag_field>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
movslq %eax,%rdx
lea    (%rdx,%rbx,1),%rcx
add    $0xffffffffffffffff,%rcx
shl    $0x20,%rdx
movabs $0x100000000,%rax
add    %rdx,%rax
movabs $0xffffffff00000000,%rdx
ff ff ff
nop
add    %rdx,%rax
cmpb   $0x20,(%rcx)
lea    -0x1(%rcx),%rcx
je     1140 <resize_tag_field+0x30>
sar    $0x20,%rax
movb   $0x0,(%rbx,%rax,1)
pop    %rbx
ret

LLVM IR (-O0):
define void @resize_tag_field(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
store i32 %5, i32* %3
br label %6
6: ; preds = %15, %1
%7 = load i8*, i8** %2
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %7, i64 %10
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 32
br i1 %14, label %15, label %18
15: ; preds = %6
%16 = load i32, i32* %3
%17 = add nsw i32 %16, -1
store i32 %17, i32* %3
br label %6
18: ; preds = %6
%19 = load i8*, i8** %2
%20 = load i32, i32* %3
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i8, i8* %19, i64 %21
store i8 0, i8* %22
ret void
}

LLVM IR (-O2):
define void @resize_tag_field(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = sext i32 %2 to i64
br label %4
4: ; preds = %4, %1
%5 = phi i64 [ %6, %4 ], [ %3, %1 ]
%6 = add i64 %5, -1
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, 32
br i1 %9, label %4, label %10
10: ; preds = %4
%11 = shl i64 %5, 32
%12 = ashr exact i64 %11, 32
%13 = getelementptr inbounds i8, i8* %0, i64 %12
store i8 0, i8* %13
ret void
}
/* Variables and functions */
double log(long long);
long long st_log2ll(long long x) { return log(x) * 1.442695040888963407359925; }


x86 assembly (clang, -O0):
<st_log2ll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <log@plt>
movsd  0xed3(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<st_log2ll>:
push   %rax
call   1030 <log@plt>
mulsd  0xee2(%rip),%xmm0
cvttsd2si %xmm0,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @st_log2ll(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call double @log(i64 %3)
%5 = fmul double %4, 0x3FF71547652B82FE
%6 = fptosi double %5 to i64
ret i64 %6
}

LLVM IR (-O2):
define i64 @st_log2ll(i64 %0) {
%2 = tail call double @log(i64 %0)
%3 = fmul double %2, 0x3FF71547652B82FE
%4 = fptosi double %3 to i64
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ return_struct_vs1();
int /*<<< orphan*/ take_struct_vs1(int /*<<< orphan*/);
void test_struct_vs1() { take_struct_vs1(return_struct_vs1()); }


x86 assembly (clang, -O0):
<test_struct_vs1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <return_struct_vs1@plt>
mov    %eax,%edi
call   1030 <take_struct_vs1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_struct_vs1>:
push   %rax
xor    %eax,%eax
call   1040 <return_struct_vs1@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <take_struct_vs1@plt>

LLVM IR (-O0):
define void @test_struct_vs1() {
%1 = call i32 (...) @return_struct_vs1()
%2 = call i32 @take_struct_vs1(i32 %1)
ret void
}

LLVM IR (-O2):
define void @test_struct_vs1() {
%1 = tail call i32 (...) @return_struct_vs1()
%2 = tail call i32 @take_struct_vs1(i32 %1)
ret void
}
int test_imm_C5uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0xC5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C5uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0xc5,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C5uint64_highword_mem>:
testb  $0xc5,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C5uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 197
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C5uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 846108557312
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ print_sumary();
void end_tests() { print_sumary(); }


x86 assembly (clang, -O0):
<end_tests>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <print_sumary@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<end_tests>:
xor    %eax,%eax
jmp    1030 <print_sumary@plt>

LLVM IR (-O0):
define void @end_tests() {
%1 = call i32 (...) @print_sumary()
ret void
}

LLVM IR (-O2):
define void @end_tests() {
%1 = tail call i32 (...) @print_sumary()
ret void
}
int fun_p_in_release_so(int *x, int *y) { return 20 + *x + *y; }


x86 assembly (clang, -O0):
<fun_p_in_release_so>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
add    $0x14,%eax
mov    -0x10(%rbp),%rcx
add    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_p_in_release_so>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
add    %ecx,%eax
add    $0x14,%eax
ret

LLVM IR (-O0):
define i32 @fun_p_in_release_so(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = add nsw i32 20, %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = add nsw i32 %7, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @fun_p_in_release_so(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = add nsw i32 %3, 20
%5 = load i32, i32* %1
%6 = add nsw i32 %4, %5
ret i32 %6
}
void load_game() {}


x86 assembly (clang, -O0):
<load_game>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_game>:
ret

LLVM IR (-O0):
define void @load_game() {
ret void
}

LLVM IR (-O2):
define void @load_game() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ nocall(char *);
void dumpidof(void) { nocall("dumpidof"); }


x86 assembly (clang, -O0):
<dumpidof>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <nocall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dumpidof>:
lea    0xee9(%rip),%rdi
jmp    1030 <nocall@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"dumpidof\00"
define void @dumpidof() {
%1 = call i32 @nocall(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"dumpidof\00"
define void @dumpidof() {
%1 = tail call i32 @nocall(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int REG_ICASE;
void regex_flag_icase_short(char c __attribute__((unused)), void *data) {
  int *cflags = data;
  *cflags |= REG_ICASE;
}


x86 assembly (clang, -O0):
<regex_flag_icase_short>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    0x2ecb(%rip),%rax
mov    (%rax),%ecx
mov    -0x18(%rbp),%rax
or     (%rax),%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<regex_flag_icase_short>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
or     %eax,(%rsi)
ret

LLVM IR (-O0):
@REG_ICASE = global i32 0
define void @regex_flag_icase_short(i8 signext %0, i8* %1) {
%3 = alloca i8
%4 = alloca i8*
%5 = alloca i32*
store i8 %0, i8* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %5
%8 = load i32, i32* @REG_ICASE
%9 = load i32*, i32** %5
%10 = load i32, i32* %9
%11 = or i32 %10, %8
store i32 %11, i32* %9
ret void
}

LLVM IR (-O2):
@REG_ICASE = global i32 0
define void @regex_flag_icase_short(i8 signext %0, i8* nocapture %1) {
%3 = bitcast i8* %1 to i32*
%4 = load i32, i32* @REG_ICASE
%5 = load i32, i32* %3
%6 = or i32 %5, %4
store i32 %6, i32* %3
ret void
}
void AR30ToABGRRow_C() {}


x86 assembly (clang, -O0):
<AR30ToABGRRow_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AR30ToABGRRow_C>:
ret

LLVM IR (-O0):
define void @AR30ToABGRRow_C() {
ret void
}

LLVM IR (-O2):
define void @AR30ToABGRRow_C() {
ret void
}
double down() {}


x86 assembly (clang, -O0):
<down>:
push   %rbp
mov    %rsp,%rbp
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<down>:
ret

LLVM IR (-O0):
define double @down() {
%1 = alloca double
%2 = load double, double* %1
ret double %2
}

LLVM IR (-O2):
define double @down() {
ret double undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *);
int main(int charv, char *inputParameter[]) {
  printf("Hello %s %s \n", inputParameter[1], inputParameter[2]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rsi
mov    -0x10(%rbp),%rax
mov    0x10(%rax),%rdx
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rax
mov    0x10(%rsi),%rdx
lea    0xee0(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hello %s %s \0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %5
%7 = getelementptr inbounds i8*, i8** %6, i64 1
%8 = load i8*, i8** %7
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 2
%11 = load i8*, i8** %10
%12 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %8, i8* %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"Hello %s %s \0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8*, i8** %1, i64 2
%6 = load i8*, i8** %5
%7 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %4, i8* %6)
ret i32 0
}
/* Type definitions */
struct hotplug2_event_t {
  int dummy;
};

/* Variables and functions */
int WEXITSTATUS(int /*<<< orphan*/);
int /*<<< orphan*/ free(char *);
char *replace_key_by_value(int /*<<< orphan*/, struct hotplug2_event_t *);
int /*<<< orphan*/ strdup(char *);
int /*<<< orphan*/ system(char *);
int exec_shell(struct hotplug2_event_t *event, char *application) {
  int rv;
  application = replace_key_by_value(strdup(application), event);
  rv = WEXITSTATUS(system(application));
  free(application);
  return rv;
}


x86 assembly (clang, -O0):
<exec_shell>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1070 <strdup@plt>
mov    %eax,%edi
mov    -0x8(%rbp),%rsi
call   1050 <replace_key_by_value@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <system@plt>
mov    %eax,%edi
call   1060 <WEXITSTATUS@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exec_shell>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1070 <strdup@plt>
mov    %eax,%edi
mov    %rbx,%rsi
call   1050 <replace_key_by_value@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <system@plt>
mov    %eax,%edi
call   1060 <WEXITSTATUS@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.hotplug2_event_t = type { i32 }
define i32 @exec_shell(%struct.hotplug2_event_t* %0, i8* %1) {
%3 = alloca %struct.hotplug2_event_t*
%4 = alloca i8*
%5 = alloca i32
store %struct.hotplug2_event_t* %0, %struct.hotplug2_event_t** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = call i32 @strdup(i8* %6)
%8 = load %struct.hotplug2_event_t*, %struct.hotplug2_event_t** %3
%9 = call i8* @replace_key_by_value(i32 %7, %struct.hotplug2_event_t* %8)
store i8* %9, i8** %4
%10 = load i8*, i8** %4
%11 = call i32 @system(i8* %10)
%12 = call i32 @WEXITSTATUS(i32 %11)
store i32 %12, i32* %5
%13 = load i8*, i8** %4
%14 = call i32 @free(i8* %13)
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
%struct.hotplug2_event_t = type { i32 }
define i32 @exec_shell(%struct.hotplug2_event_t* %0, i8* %1) {
%3 = tail call i32 @strdup(i8* %1)
%4 = tail call i8* @replace_key_by_value(i32 %3, %struct.hotplug2_event_t* %0)
%5 = tail call i32 @system(i8* %4)
%6 = tail call i32 @WEXITSTATUS(i32 %5)
%7 = tail call i32 @free(i8* %4)
ret i32 %6
}
int execute_getgid() { return 0; }


x86 assembly (clang, -O0):
<execute_getgid>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_getgid>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_getgid() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_getgid() {
ret i32 0
}
/* Variables and functions */
char *malloc(size_t);
int /*<<< orphan*/ strcpy(char *, char const *);
size_t strlen(char const *);
char *apped_char(const char *s, const char c) {
  size_t len = strlen(s);
  char *s_aux = malloc(len + 2);
  strcpy(s_aux, s);
  s_aux[len] = c;
  s_aux[len + 1] = '\0';
  return s_aux;
}


x86 assembly (clang, -O0):
<apped_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
add    $0x2,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x9(%rbp),%dl
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
movb   $0x0,0x1(%rax,%rcx,1)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<apped_char>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %esi,%r14d
mov    %rdi,%r15
call   1040 <strlen@plt>
mov    %rax,%rbp
lea    0x2(%rax),%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r15,%rsi
call   1030 <strcpy@plt>
mov    %r14b,(%rbx,%rbp,1)
movb   $0x0,0x1(%rbx,%rbp,1)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i8* @apped_char(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %3
store i8 %1, i8* %4
%7 = load i8*, i8** %3
%8 = call i64 @strlen(i8* %7)
store i64 %8, i64* %5
%9 = load i64, i64* %5
%10 = add i64 %9, 2
%11 = call i8* @malloc(i64 %10)
store i8* %11, i8** %6
%12 = load i8*, i8** %6
%13 = load i8*, i8** %3
%14 = call i32 @strcpy(i8* %12, i8* %13)
%15 = load i8, i8* %4
%16 = load i8*, i8** %6
%17 = load i64, i64* %5
%18 = getelementptr inbounds i8, i8* %16, i64 %17
store i8 %15, i8* %18
%19 = load i8*, i8** %6
%20 = load i64, i64* %5
%21 = add i64 %20, 1
%22 = getelementptr inbounds i8, i8* %19, i64 %21
store i8 0, i8* %22
%23 = load i8*, i8** %6
ret i8* %23
}

LLVM IR (-O2):
define i8* @apped_char(i8* %0, i8 signext %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = add i64 %3, 2
%5 = tail call i8* @malloc(i64 %4)
%6 = tail call i32 @strcpy(i8* %5, i8* %0)
%7 = getelementptr inbounds i8, i8* %5, i64 %3
store i8 %1, i8* %7
%8 = add i64 %3, 1
%9 = getelementptr inbounds i8, i8* %5, i64 %8
store i8 0, i8* %9
ret i8* %5
}
rtype(r) int r;
{
  switch (r) {
  case 1:
    return (0x00);
  case 2:
    return (0x20);
  case 3:
    return (0x40);
  case 4:
    return (0x60);
  }
  error("Illegal Register for Indexed");
  return (0);
}


x86 assembly (clang, -O0):
<rtype>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x3,%eax
ja     1174 <rtype+0x64>
mov    -0x10(%rbp),%rax
lea    0xec5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x0,-0x4(%rbp)
jmp    1189 <rtype+0x79>
movl   $0x20,-0x4(%rbp)
jmp    1189 <rtype+0x79>
movl   $0x40,-0x4(%rbp)
jmp    1189 <rtype+0x79>
movl   $0x60,-0x4(%rbp)
jmp    1189 <rtype+0x79>
lea    0xe95(%rip),%rdi
mov    $0x0,%al
call   1030 <error@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtype>:
push   %rbx
mov    %edi,%ebx
add    $0xffffffff,%ebx
cmp    $0x4,%ebx
jae    1120 <rtype+0x10>
shl    $0x5,%ebx
jmp    1130 <rtype+0x20>
lea    0xed9(%rip),%rdi
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <error@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"Illegal Register for Indexed\00"
define i32 @rtype(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 1, label %5
i32 2, label %6
i32 3, label %7
i32 4, label %8
]
5: ; preds = %1
store i32 0, i32* %2
br label %11
6: ; preds = %1
store i32 32, i32* %2
br label %11
7: ; preds = %1
store i32 64, i32* %2
br label %11
8: ; preds = %1
store i32 96, i32* %2
br label %11
9: ; preds = %1
%10 = call i32 (i8*, ...) bitcast (i32 (...)* @error to i32 (i8*, ...)*)(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
store i32 0, i32* %2
br label %11
11: ; preds = %9, %8, %7, %6, %5
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
@.str = [29 x i8] c"Illegal Register for Indexed\00"
define i32 @rtype(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 4
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 (i8*, ...) bitcast (i32 (...)* @error to i32 (i8*, ...)*)(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
br label %8
6: ; preds = %1
%7 = shl i32 %2, 5
br label %8
8: ; preds = %6, %4
%9 = phi i32 [ 0, %4 ], [ %7, %6 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isgraph(int);
void t_isgraph_0x8d() {
  Assert_real((isgraph(141) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              710, ("isgraph should be 0 for 0x8d"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x8d>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8d,%edi
call   1040 <isgraph@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2c6,%edx
lea    0xf5b(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x8d>:
push   %rax
mov    $0x8d,%edi
call   1040 <isgraph@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2c6,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0x8d\00"
define void @t_isgraph_0x8d() {
%1 = call i64 @isgraph(i32 141)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 710, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0x8d\00"
define void @t_isgraph_0x8d() {
%1 = tail call i64 @isgraph(i32 141)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 710, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ thrd_t;

/* Variables and functions */
scalar_t__ thd_detach(int /*<<< orphan*/);
int thrd_error;
int thrd_success;
int thrd_detach(thrd_t thr) {
  if (thd_detach(thr))
    return thrd_error;
  return thrd_success;
}


x86 assembly (clang, -O0):
<thrd_detach>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <thd_detach@plt>
cmp    $0x0,%rax
je     113e <thrd_detach+0x2e>
mov    0x2ea4(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    114a <thrd_detach+0x3a>
mov    0x2ea3(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thrd_detach>:
push   %rax
call   1030 <thd_detach@plt>
test   %rax,%rax
jne    1124 <thrd_detach+0x14>
mov    0x2ec6(%rip),%rax
jmp    112b <thrd_detach+0x1b>
mov    0x2ead(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@thrd_error = global i32 0
@thrd_success = global i32 0
define i32 @thrd_detach(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @thd_detach(i32 %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i32, i32* @thrd_error
store i32 %8, i32* %2
br label %11
9: ; preds = %1
%10 = load i32, i32* @thrd_success
store i32 %10, i32* %2
br label %11
11: ; preds = %9, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
@thrd_error = global i32 0
@thrd_success = global i32 0
define i32 @thrd_detach(i32 %0) {
%2 = tail call i64 @thd_detach(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = load i32, i32* @thrd_success
%5 = load i32, i32* @thrd_error
%6 = select i1 %3, i32 %4, i32 %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ q();
void r() { q(); }


x86 assembly (clang, -O0):
<r>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <q@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<r>:
xor    %eax,%eax
jmp    1030 <q@plt>

LLVM IR (-O0):
define void @r() {
%1 = call i32 (...) @q()
ret void
}

LLVM IR (-O2):
define void @r() {
%1 = tail call i32 (...) @q()
ret void
}
unsigned long long R(unsigned long long x, int c) {
  return (x >> c) | ((x & 0xffffffffffffffffULL) << (64 - c));
}


x86 assembly (clang, -O0):
<R>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
shr    %cl,%rax
mov    -0x8(%rbp),%rdx
and    $0xffffffffffffffff,%rdx
mov    $0x40,%ecx
sub    -0xc(%rbp),%ecx
mov    %ecx,%ecx
shl    %cl,%rdx
mov    %rdx,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<R>:
mov    %esi,%ecx
mov    %rdi,%rax
ror    %cl,%rax
ret

LLVM IR (-O0):
define i64 @R(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i64, i64* %3
%6 = load i32, i32* %4
%7 = zext i32 %6 to i64
%8 = lshr i64 %5, %7
%9 = load i64, i64* %3
%10 = and i64 %9, -1
%11 = load i32, i32* %4
%12 = sub nsw i32 64, %11
%13 = zext i32 %12 to i64
%14 = shl i64 %10, %13
%15 = or i64 %8, %14
ret i64 %15
}

LLVM IR (-O2):
define i64 @R(i64 %0, i32 %1) {
%3 = zext i32 %1 to i64
%4 = lshr i64 %0, %3
%5 = sub nsw i32 64, %1
%6 = zext i32 %5 to i64
%7 = shl i64 %0, %6
%8 = or i64 %7, %4
ret i64 %8
}
/* Variables and functions */
int Pop();
int /*<<< orphan*/ Push(int);
void DoMul() { Push(Pop() * Pop()); }


x86 assembly (clang, -O0):
<DoMul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <Pop@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <Pop@plt>
mov    -0x4(%rbp),%edi
imul   %eax,%edi
call   1040 <Push@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoMul>:
push   %rbx
xor    %eax,%eax
call   1030 <Pop@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <Pop@plt>
imul   %eax,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1040 <Push@plt>

LLVM IR (-O0):
define void @DoMul() {
%1 = call i32 (...) @Pop()
%2 = call i32 (...) @Pop()
%3 = mul nsw i32 %1, %2
%4 = call i32 @Push(i32 %3)
ret void
}

LLVM IR (-O2):
define void @DoMul() {
%1 = tail call i32 (...) @Pop()
%2 = tail call i32 (...) @Pop()
%3 = mul nsw i32 %2, %1
%4 = tail call i32 @Push(i32 %3)
ret void
}
void set_fpscr(long fpscr) {
  set_fpscr_f((union {
                long i;
                double f;
              }){fpscr}
                  .f);
}


x86 assembly (clang, -O0):
<set_fpscr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    $0x1,%al
call   1030 <set_fpscr_f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_fpscr>:
movq   %rdi,%xmm0
mov    $0x1,%al
jmp    1030 <set_fpscr_f@plt>

LLVM IR (-O0):
%union.anon = type { i64 }
define void @set_fpscr(i64 %0) {
%2 = alloca i64
%3 = alloca %union.anon
store i64 %0, i64* %2
%4 = bitcast %union.anon* %3 to i64*
%5 = load i64, i64* %2
store i64 %5, i64* %4
%6 = bitcast %union.anon* %3 to double*
%7 = load double, double* %6
%8 = call i32 (double, ...) bitcast (i32 (...)* @set_fpscr_f to i32 (double, ...)*)(double %7)
ret void
}

LLVM IR (-O2):
define void @set_fpscr(i64 %0) {
%2 = bitcast i64 %0 to double
%3 = tail call i32 (double, ...) bitcast (i32 (...)* @set_fpscr_f to i32 (double, ...)*)(double %2)
ret void
}
OP(fd, c5) {
  illegal_1();
  op_c5();
}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <illegal_1@plt>
mov    $0x0,%al
call   1040 <op_c5@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
push   %rax
xor    %eax,%eax
call   1030 <illegal_1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <op_c5@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @illegal_1()
%7 = call i32 (...) @op_c5()
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @illegal_1()
%4 = tail call i32 (...) @op_c5()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ merge(int *, int, int, int);
void sort(int a[], int p, int r) {
  if (p < r) {
    int q = (p + r) / 2;
    sort(a, p, q);
    sort(a, q + 1, r);
    merge(a, p, q, r);
  }
}


x86 assembly (clang, -O0):
<sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1182 <sort+0x62>
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1030 <sort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1030 <sort@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1040 <merge@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sort>:
cmp    %edx,%esi
jge    1172 <sort+0x52>
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %esi,%r12d
mov    %rdi,%r15
lea    (%r14,%r12,1),%eax
mov    %eax,%ebx
shr    $0x1f,%ebx
add    %eax,%ebx
sar    %ebx
mov    %ebx,%edx
call   1030 <sort@plt>
lea    0x1(%rbx),%esi
mov    %r15,%rdi
mov    %r14d,%edx
call   1030 <sort@plt>
mov    %r15,%rdi
mov    %r12d,%esi
mov    %ebx,%edx
mov    %r14d,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1040 <merge@plt>
ret

LLVM IR (-O0):
define void @sort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %28
11: ; preds = %3
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = add nsw i32 %12, %13
%15 = sdiv i32 %14, 2
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = load i32*, i32** %4
%20 = load i32, i32* %7
%21 = add nsw i32 %20, 1
%22 = load i32, i32* %6
%23 = load i32*, i32** %4
%24 = load i32, i32* %5
%25 = load i32, i32* %7
%26 = load i32, i32* %6
%27 = call i32 @merge(i32* %23, i32 %24, i32 %25, i32 %26)
br label %28
28: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @sort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %6, label %5
5: ; preds = %3, %6
ret void
6: ; preds = %3
%7 = add nsw i32 %2, %1
%8 = sdiv i32 %7, 2
tail call void @sort(i32* %0, i32 %1, i32 %8)
%9 = add nsw i32 %8, 1
tail call void @sort(i32* %0, i32 %9, i32 %2)
%10 = tail call i32 @merge(i32* %0, i32 %1, i32 %8, i32 %2)
br label %5
}
/* Variables and functions */
int errno;
void _reset_errno_(int *saved_errno) {
  if (*saved_errno < 0)
    return;
  errno = *saved_errno;
}


x86 assembly (clang, -O0):
<_reset_errno_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0x0,(%rax)
jge    111a <_reset_errno_+0x1a>
jmp    1129 <_reset_errno_+0x29>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    0x2eb9(%rip),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_reset_errno_>:
mov    (%rdi),%eax
test   %eax,%eax
js     110f <_reset_errno_+0xf>
mov    0x2ed3(%rip),%rcx
mov    %eax,(%rcx)
ret

LLVM IR (-O0):
@errno = global i32 0
define void @_reset_errno_(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
br label %10
7: ; preds = %1
%8 = load i32*, i32** %2
%9 = load i32, i32* %8
store i32 %9, i32* @errno
br label %10
10: ; preds = %7, %6
ret void
}

LLVM IR (-O2):
@errno = global i32 0
define void @_reset_errno_(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = icmp slt i32 %2, 0
br i1 %3, label %5, label %4
4: ; preds = %1
store i32 %2, i32* @errno
br label %5
5: ; preds = %1, %4
ret void
}
unsigned xrop3_243_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = ~S;
  stk1 = T | stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_243_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_243_1_1>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%eax
shl    $0x8,%eax
or     %esi,%eax
or     %ecx,%eax
not    %eax
or     %edi,%esi
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_243_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %6
%23 = xor i32 %22, -1
store i32 %23, i32* %9
%24 = load i32, i32* %7
%25 = load i32, i32* %9
%26 = or i32 %24, %25
store i32 %26, i32* %8
%27 = load i32, i32* %8
%28 = load i32, i32* %6
%29 = xor i32 %28, -1
%30 = and i32 %27, %29
%31 = load i32, i32* %7
%32 = xor i32 %31, -1
%33 = and i32 %30, %32
%34 = load i32, i32* %5
%35 = load i32, i32* %6
%36 = and i32 %34, %35
%37 = or i32 %33, %36
%38 = load i32, i32* %5
%39 = load i32, i32* %7
%40 = and i32 %38, %39
%41 = or i32 %37, %40
ret i32 %41
}

LLVM IR (-O2):
define i32 @xrop3_243_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = or i32 %6, %4
%8 = xor i32 %7, -1
%9 = or i8 %1, %0
%10 = zext i8 %9 to i32
%11 = or i32 %10, %8
ret i32 %11
}
int main() {
  int a;
  int *pa;
  int **ppa;
  int ***pppa;
  pppa = &ppa;
  ppa = &pa;
  pa = &a;
  ***pppa = 5;
  return a;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
lea    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
lea    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%rax
movl   $0x5,(%rax)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32**
%5 = alloca i32***
store i32 0, i32* %1
store i32*** %4, i32**** %5
store i32** %3, i32*** %4
store i32* %2, i32** %3
%6 = load i32***, i32**** %5
%7 = load i32**, i32*** %6
%8 = load i32*, i32** %7
store i32 5, i32* %8
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @main() {
ret i32 5
}