xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ s;

/* Variables and functions */
int /*<<< orphan*/ strAfterCh(char *, char *, char, int);
int strtol(char *, char **, int);
int iAfterCh(char *st, int *n, char ch) {
  char s[120];
  char *err;
  strAfterCh(st, s, ch, sizeof(s));
  *n = strtol(s, &err, 10);
  if (err[0] == 0)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<iAfterCh>:
push   %rbp
mov    %rsp,%rbp
sub    $0xb0,%rsp
mov    %dl,%al
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %al,-0x19(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0xa0(%rbp),%rsi
mov    $0x78,%ecx
movsbl -0x19(%rbp),%edx
call   1030 <strAfterCh@plt>
lea    -0xa0(%rbp),%rdi
lea    -0xa8(%rbp),%rsi
mov    $0xa,%edx
call   1040 <strtol@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xa8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1190 <iAfterCh+0x70>
movl   $0x1,-0x4(%rbp)
jmp    1197 <iAfterCh+0x77>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xb0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iAfterCh>:
push   %r14
push   %rbx
sub    $0x88,%rsp
mov    %rsi,%rbx
lea    0x10(%rsp),%r14
mov    %r14,%rsi
mov    $0x78,%ecx
call   1030 <strAfterCh@plt>
lea    0x8(%rsp),%rsi
mov    %r14,%rdi
mov    $0xa,%edx
call   1040 <strtol@plt>
mov    %eax,(%rbx)
mov    0x8(%rsp),%rcx
xor    %eax,%eax
cmpb   $0x0,(%rcx)
sete   %al
add    $0x88,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @iAfterCh(i8* %0, i32* %1, i8 signext %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i8
%8 = alloca [120 x i8]
%9 = alloca i8*
store i8* %0, i8** %5
store i32* %1, i32** %6
store i8 %2, i8* %7
%10 = load i8*, i8** %5
%11 = getelementptr inbounds [120 x i8], [120 x i8]* %8, i64 0, i64 0
%12 = load i8, i8* %7
%13 = call i32 @strAfterCh(i8* %10, i8* %11, i8 signext %12, i32 120)
%14 = getelementptr inbounds [120 x i8], [120 x i8]* %8, i64 0, i64 0
%15 = call i32 @strtol(i8* %14, i8** %9, i32 10)
%16 = load i32*, i32** %6
store i32 %15, i32* %16
%17 = load i8*, i8** %9
%18 = getelementptr inbounds i8, i8* %17, i64 0
%19 = load i8, i8* %18
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %23
22: ; preds = %3
store i32 1, i32* %4
br label %24
23: ; preds = %3
store i32 0, i32* %4
br label %24
24: ; preds = %23, %22
%25 = load i32, i32* %4
ret i32 %25
}

LLVM IR (-O2):
define i32 @iAfterCh(i8* %0, i32* nocapture writeonly %1, i8 signext %2) {
%4 = alloca [120 x i8]
%5 = alloca i8*
%6 = getelementptr inbounds [120 x i8], [120 x i8]* %4, i64 0, i64 0
%7 = bitcast i8** %5 to i8*
%8 = call i32 @strAfterCh(i8* %0, i8* %6, i8 signext %2, i32 120)
%9 = call i32 @strtol(i8* %6, i8** %5, i32 10)
store i32 %9, i32* %1
%10 = load i8*, i8** %5
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
%13 = zext i1 %12 to i32
ret i32 %13
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int unaligned32_be(const uint8_t *p) {
  return (((p[0] << 8) | p[1]) << 16) | (p[2] << 8) | (p[3]);
}


x86 assembly (clang, -O0):
<unaligned32_be>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
or     0x4(%rcx),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
or     0xc(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unaligned32_be>:
mov    (%rdi),%eax
mov    0x4(%rdi),%ecx
shl    $0x18,%eax
shl    $0x10,%ecx
or     %eax,%ecx
mov    0x8(%rdi),%eax
shl    $0x8,%eax
or     %ecx,%eax
or     0xc(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @unaligned32_be(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = shl i32 %5, 8
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = or i32 %6, %9
%11 = shl i32 %10, 16
%12 = load i32*, i32** %2
%13 = getelementptr inbounds i32, i32* %12, i64 2
%14 = load i32, i32* %13
%15 = shl i32 %14, 8
%16 = or i32 %11, %15
%17 = load i32*, i32** %2
%18 = getelementptr inbounds i32, i32* %17, i64 3
%19 = load i32, i32* %18
%20 = or i32 %16, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @unaligned32_be(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = load i32, i32* %3
%5 = shl i32 %2, 24
%6 = shl i32 %4, 16
%7 = or i32 %6, %5
%8 = getelementptr inbounds i32, i32* %0, i64 2
%9 = load i32, i32* %8
%10 = shl i32 %9, 8
%11 = or i32 %7, %10
%12 = getelementptr inbounds i32, i32* %0, i64 3
%13 = load i32, i32* %12
%14 = or i32 %11, %13
ret i32 %14
}
void sound(double totfreq) {}


x86 assembly (clang, -O0):
<sound>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sound>:
ret

LLVM IR (-O0):
define void @sound(double %0) {
%2 = alloca double
store double %0, double* %2
ret void
}

LLVM IR (-O2):
define void @sound(double %0) {
ret void
}
/* Variables and functions */
int odd(int);
int foo(int i, int j) { return odd(i + j); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
add    -0x8(%rbp),%edi
call   1030 <odd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
add    %esi,%edi
jmp    1030 <odd@plt>

LLVM IR (-O0):
define i32 @foo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
%8 = call i32 @odd(i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
%4 = tail call i32 @odd(i32 %3)
ret i32 %4
}
__typeof__(aligned_alloc(1, (void *)1)) test_aligned_alloc_92(void) {
  return aligned_alloc(1, (void *)1);
}


x86 assembly (clang, -O0):
<test_aligned_alloc_92>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%esi
mov    %rsi,%rdi
call   1030 <aligned_alloc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_aligned_alloc_92>:
mov    $0x1,%edi
mov    $0x1,%esi
jmp    1030 <aligned_alloc@plt>

LLVM IR (-O0):
define i8* @test_aligned_alloc_92() {
%1 = call i8* @aligned_alloc(i64 1, i64 1)
ret i8* %1
}

LLVM IR (-O2):
define noalias i8* @test_aligned_alloc_92() {
%1 = tail call align 1 dereferenceable_or_null(1) i8* @aligned_alloc(i64 1, i64 1)
ret i8* %1
}
/* Variables and functions */
void *strdup(char *);
int str_return_cb(void *arg, int col_count, char **row, char **titles) {
  arg = strdup(*row);
  return 0;
}


x86 assembly (clang, -O0):
<str_return_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rdi
call   1030 <strdup@plt>
mov    %rax,-0x8(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_return_cb>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @str_return_cb(i8* %0, i32 %1, i8** %2, i8** %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8**
%8 = alloca i8**
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8** %2, i8*** %7
store i8** %3, i8*** %8
%9 = load i8**, i8*** %7
%10 = load i8*, i8** %9
%11 = call i8* @strdup(i8* %10)
store i8* %11, i8** %5
ret i32 0
}

LLVM IR (-O2):
define i32 @str_return_cb(i8* nocapture readnone %0, i32 %1, i8** nocapture readnone %2, i8** nocapture readnone %3) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ TransformAlarmC__1__Alarm__stop();
void AlarmToTimerC__0__Alarm__stop(void) { TransformAlarmC__1__Alarm__stop(); }


x86 assembly (clang, -O0):
<AlarmToTimerC__0__Alarm__stop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <TransformAlarmC__1__Alarm__stop@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AlarmToTimerC__0__Alarm__stop>:
xor    %eax,%eax
jmp    1030 <TransformAlarmC__1__Alarm__stop@plt>

LLVM IR (-O0):
define void @AlarmToTimerC__0__Alarm__stop() {
%1 = call i32 (...) @TransformAlarmC__1__Alarm__stop()
ret void
}

LLVM IR (-O2):
define void @AlarmToTimerC__0__Alarm__stop() {
%1 = tail call i32 (...) @TransformAlarmC__1__Alarm__stop()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ addbyte(int);
void MMX_SUBSB(int dst_reg, int src_reg) {
  addbyte(0x66);
  addbyte(0x0f);
  addbyte(0xe8);
  addbyte(0xc0 | (dst_reg << 3) | src_reg);
}


x86 assembly (clang, -O0):
<MMX_SUBSB>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x66,%edi
call   1030 <addbyte@plt>
mov    $0xf,%edi
call   1030 <addbyte@plt>
mov    $0xe8,%edi
call   1030 <addbyte@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     $0xc0,%edi
or     -0x8(%rbp),%edi
call   1030 <addbyte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MMX_SUBSB>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x66,%edi
call   1030 <addbyte@plt>
mov    $0xf,%edi
call   1030 <addbyte@plt>
mov    $0xe8,%edi
call   1030 <addbyte@plt>
shl    $0x3,%ebp
or     %ebx,%ebp
or     $0xc0,%ebp
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <addbyte@plt>

LLVM IR (-O0):
define void @MMX_SUBSB(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @addbyte(i32 102)
%6 = call i32 @addbyte(i32 15)
%7 = call i32 @addbyte(i32 232)
%8 = load i32, i32* %3
%9 = shl i32 %8, 3
%10 = or i32 192, %9
%11 = load i32, i32* %4
%12 = or i32 %10, %11
%13 = call i32 @addbyte(i32 %12)
ret void
}

LLVM IR (-O2):
define void @MMX_SUBSB(i32 %0, i32 %1) {
%3 = tail call i32 @addbyte(i32 102)
%4 = tail call i32 @addbyte(i32 15)
%5 = tail call i32 @addbyte(i32 232)
%6 = shl i32 %0, 3
%7 = or i32 %6, %1
%8 = or i32 %7, 192
%9 = tail call i32 @addbyte(i32 %8)
ret void
}
long gcd(long A, long B) {
  if (A == 0)
    return A;
  else
    return gcd(B, A % B);
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1138 <gcd+0x28>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1152 <gcd+0x42>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rax
cqto
idivq  -0x18(%rbp)
mov    %rdx,%rsi
call   1030 <gcd@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
test   %rdi,%rdi
je     1132 <gcd+0x32>
mov    %rsi,%rdx
mov    %rdi,%rax
jmp    111d <gcd+0x1d>
nopl   (%rax)
cqto
idiv   %rcx
mov    %rcx,%rax
test   %rcx,%rcx
je     1132 <gcd+0x32>
mov    %rdx,%rcx
mov    %rax,%rdx
or     %rcx,%rdx
shr    $0x20,%rdx
jne    1110 <gcd+0x10>
xor    %edx,%edx
div    %ecx
jmp    1115 <gcd+0x15>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @gcd(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %4
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %4
store i64 %9, i64* %3
br label %16
10: ; preds = %2
%11 = load i64, i64* %5
%12 = load i64, i64* %4
%13 = load i64, i64* %5
%14 = srem i64 %12, %13
%15 = call i64 @gcd(i64 %11, i64 %14)
store i64 %15, i64* %3
br label %16
16: ; preds = %10, %8
%17 = load i64, i64* %3
ret i64 %17
}

LLVM IR (-O2):
define i64 @gcd(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %7, %4 ], [ %1, %2 ]
%6 = phi i64 [ %5, %4 ], [ %0, %2 ]
%7 = srem i64 %6, %5
%8 = icmp eq i64 %5, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
ret i64 0
}
/* Variables and functions */
int /*<<< orphan*/ ADC16(int /*<<< orphan*/);
int /*<<< orphan*/ Immediate16(int);
void Op69M0(void) { ADC16(Immediate16(1)); }


x86 assembly (clang, -O0):
<Op69M0>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1040 <Immediate16@plt>
mov    %eax,%edi
call   1030 <ADC16@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Op69M0>:
push   %rax
mov    $0x1,%edi
call   1040 <Immediate16@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <ADC16@plt>

LLVM IR (-O0):
define void @Op69M0() {
%1 = call i32 @Immediate16(i32 1)
%2 = call i32 @ADC16(i32 %1)
ret void
}

LLVM IR (-O2):
define void @Op69M0() {
%1 = tail call i32 @Immediate16(i32 1)
%2 = tail call i32 @ADC16(i32 %1)
ret void
}
void GB_PLUS_f_FP32(float *z, const float *x, const float *y) {
  (*z) = (*x) + (*y);
}


x86 assembly (clang, -O0):
<GB_PLUS_f_FP32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x18(%rbp),%rax
addss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GB_PLUS_f_FP32>:
movss  (%rsi),%xmm0
addss  (%rdx),%xmm0
movss  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @GB_PLUS_f_FP32(float* %0, float* %1, float* %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float*
store float* %0, float** %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float*, float** %5
%8 = load float, float* %7
%9 = load float*, float** %6
%10 = load float, float* %9
%11 = fadd float %8, %10
%12 = load float*, float** %4
store float %11, float* %12
ret void
}

LLVM IR (-O2):
define void @GB_PLUS_f_FP32(float* nocapture writeonly %0, float* nocapture %1, float* nocapture %2) {
%4 = load float, float* %1
%5 = load float, float* %2
%6 = fadd float %4, %5
store float %6, float* %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ htons(int /*<<< orphan*/);
uint16_t HtoNS(uint16_t hostshort) { return htons(hostshort); }


x86 assembly (clang, -O0):
<HtoNS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <htons@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HtoNS>:
jmp    1030 <htons@plt>

LLVM IR (-O0):
define i32 @HtoNS(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @htons(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @HtoNS(i32 %0) {
%2 = tail call i32 @htons(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ hl_alloc_strbytes(char *);
int /*<<< orphan*/ hl_throw(int /*<<< orphan*/);
void disabled_primitive() {
  hl_throw(hl_alloc_strbytes(u"This library primitive has been disabled"));
}


x86 assembly (clang, -O0):
<disabled_primitive>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <hl_alloc_strbytes@plt>
mov    %eax,%edi
call   1030 <hl_throw@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<disabled_primitive>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <hl_alloc_strbytes@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <hl_throw@plt>

LLVM IR (-O0):
@.str = [41 x i16] [i16 84, i16 104, i16 105, i16 115, i16 32, i16 108, i16 105, i16 98, i16 114, i16 97, i16 114, i16 121, i16 32, i16 112, i16 114, i16 105, i16 109, i16 105, i16 116, i16 105, i16 118, i16 101, i16 32, i16 104, i16 97, i16 115, i16 32, i16 98, i16 101, i16 101, i16 110, i16 32, i16 100, i16 105, i16 115, i16 97, i16 98, i16 108, i16 101, i16 100, i16 0]
define void @disabled_primitive() {
%1 = call i32 @hl_alloc_strbytes(i8* bitcast ([41 x i16]* @.str to i8*))
%2 = call i32 @hl_throw(i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [41 x i16] [i16 84, i16 104, i16 105, i16 115, i16 32, i16 108, i16 105, i16 98, i16 114, i16 97, i16 114, i16 121, i16 32, i16 112, i16 114, i16 105, i16 109, i16 105, i16 116, i16 105, i16 118, i16 101, i16 32, i16 104, i16 97, i16 115, i16 32, i16 98, i16 101, i16 101, i16 110, i16 32, i16 100, i16 105, i16 115, i16 97, i16 98, i16 108, i16 101, i16 100, i16 0]
define void @disabled_primitive() {
%1 = tail call i32 @hl_alloc_strbytes(i8* bitcast ([41 x i16]* @.str to i8*))
%2 = tail call i32 @hl_throw(i32 %1)
ret void
}
unsigned short byte_swap_u16(unsigned short x) {
  return (unsigned short)(((x & ((unsigned short)0x00ffU)) << 8) |
                          ((x & ((unsigned short)0xff00U)) >> 8));
}


x86 assembly (clang, -O0):
<byte_swap_u16>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
and    $0xff,%eax
shl    $0x8,%eax
movzwl -0x2(%rbp),%ecx
and    $0xff00,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<byte_swap_u16>:
mov    %edi,%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define zeroext i16 @byte_swap_u16(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 255
%6 = shl i32 %5, 8
%7 = load i16, i16* %2
%8 = zext i16 %7 to i32
%9 = and i32 %8, 65280
%10 = ashr i32 %9, 8
%11 = or i32 %6, %10
%12 = trunc i32 %11 to i16
ret i16 %12
}

LLVM IR (-O2):
define zeroext i16 @byte_swap_u16(i16 zeroext %0) {
%2 = tail call i16 @llvm.bswap.i16(i16 %0)
ret i16 %2
}
int bar(int x) {
  switch (x) {
  case 1:
    return 2;
  case 4:
    return 4;
  case 6:
    return 8;
  case 10:
    return 19;
  }
  return 0;
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x9,%eax
ja     1160 <bar+0x60>
mov    -0x10(%rbp),%rax
lea    0xed9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x2,-0x4(%rbp)
jmp    1167 <bar+0x67>
movl   $0x4,-0x4(%rbp)
jmp    1167 <bar+0x67>
movl   $0x8,-0x4(%rbp)
jmp    1167 <bar+0x67>
movl   $0x13,-0x4(%rbp)
jmp    1167 <bar+0x67>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
add    $0xffffffff,%edi
xor    %eax,%eax
cmp    $0x9,%edi
ja     1117 <bar+0x17>
movslq %edi,%rax
lea    0xeec(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @bar(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 1, label %5
i32 4, label %6
i32 6, label %7
i32 10, label %8
]
5: ; preds = %1
store i32 2, i32* %2
br label %10
6: ; preds = %1
store i32 4, i32* %2
br label %10
7: ; preds = %1
store i32 8, i32* %2
br label %10
8: ; preds = %1
store i32 19, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %8, %7, %6, %5
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@switch.table.bar = [10 x i32] [i32 2, i32 0, i32 0, i32 4, i32 0, i32 8, i32 0, i32 0, i32 0, i32 19]
define i32 @bar(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 10
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [10 x i32], [10 x i32]* @switch.table.bar, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 0, %1 ]
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void fprint_div(FILE *stream) {
  fprintf(stream, "DIV   AB                        ");
}


x86 assembly (clang, -O0):
<fprint_div>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fprint_div>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
mov    $0x20,%esi
mov    $0x1,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"DIV AB \00"
define void @fprint_div(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"DIV AB \00"
define void @fprint_div(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i64 32, i64 1, i32* %0)
ret void
}
/* Variables and functions */
bool nrf53_errata_72(void) { return false; }


x86 assembly (clang, -O0):
<nrf53_errata_72>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf53_errata_72>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf53_errata_72() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf53_errata_72() {
ret i32 0
}
/* Variables and functions */
double findminx(float *);
int /*<<< orphan*/ printf(char *, double);
int main() {
  float x[] = {32.573513, 3.722280, 0.022898, 0.139369, 6.735691, 46.475866};
  printf("%f\n", findminx(x));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xec4(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    -0x20(%rbp),%rdi
call   1030 <findminx@plt>
lea    0xeb8(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
mov    0xee5(%rip),%rax
mov    %rax,0x10(%rsp)
movaps 0xec9(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
call   1030 <findminx@plt>
lea    0xece(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.x = [6 x float] [float 0x40404968E0000000, float 0x400DC73AC0000000, float 0x3F977292C0000000, float 0x3FC1D6D7E0000000, float 0x401AF15900000000, float 0x40473CE920000000]
@.str = [4 x i8] c"%f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [6 x float]
store i32 0, i32* %1
%3 = bitcast [6 x float]* %2 to i8*
%4 = getelementptr inbounds [6 x float], [6 x float]* %2, i64 0, i64 0
%5 = call double @findminx(float* %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %5)
ret i32 0
}

LLVM IR (-O2):
@__const.main.x = [6 x float] [float 0x40404968E0000000, float 0x400DC73AC0000000, float 0x3F977292C0000000, float 0x3FC1D6D7E0000000, float 0x401AF15900000000, float 0x40473CE920000000]
@.str = [4 x i8] c"%f\0A\00"
define i32 @main() {
%1 = alloca [6 x float]
%2 = bitcast [6 x float]* %1 to i8*
%3 = getelementptr inbounds [6 x float], [6 x float]* %1, i64 0, i64 0
%4 = call double @findminx(float* %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ getpeername;
char *lbs_posix_socket_name(int, int /*<<< orphan*/);
char *lbs_posix_socket_peername(int sockfd) {
  return lbs_posix_socket_name(sockfd, getpeername);
}


x86 assembly (clang, -O0):
<lbs_posix_socket_peername>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ed3(%rip),%rax
mov    (%rax),%esi
call   1030 <lbs_posix_socket_name@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lbs_posix_socket_peername>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%esi
jmp    1030 <lbs_posix_socket_name@plt>

LLVM IR (-O0):
@getpeername = global i32 0
define i8* @lbs_posix_socket_peername(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @getpeername
%5 = call i8* @lbs_posix_socket_name(i32 %3, i32 %4)
ret i8* %5
}

LLVM IR (-O2):
@getpeername = global i32 0
define i8* @lbs_posix_socket_peername(i32 %0) {
%2 = load i32, i32* @getpeername
%3 = tail call i8* @lbs_posix_socket_name(i32 %0, i32 %2)
ret i8* %3
}
int test_imm_2Fuint8_mem(unsigned char *val) {
  return ((*val) & (-0x2F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_2Fuint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffffd1,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Fuint8_mem>:
testb  $0xd1,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Fuint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -47
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_2Fuint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -47
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void gtk_hscrollbar_new() {}


x86 assembly (clang, -O0):
<gtk_hscrollbar_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_hscrollbar_new>:
ret

LLVM IR (-O0):
define void @gtk_hscrollbar_new() {
ret void
}

LLVM IR (-O2):
define void @gtk_hscrollbar_new() {
ret void
}
char *keeps(str)
char *str;
{
  char *result;
  result = getcore((unsigned)(strlen(str) + 1));
  if (!result)
    fatal("Out of core");
  return strcpy(result, str);
}


x86 assembly (clang, -O0):
<keeps>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
add    $0x1,%rax
mov    %eax,%edi
mov    $0x0,%al
call   1050 <getcore@plt>
cltq
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1181 <keeps+0x41>
lea    0xe86(%rip),%rdi
mov    $0x0,%al
call   1060 <fatal@plt>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<keeps>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <strlen@plt>
lea    0x1(%rax),%edi
xor    %eax,%eax
call   1050 <getcore@plt>
mov    %eax,%ebp
test   %eax,%eax
jne    1169 <keeps+0x29>
lea    0xe9e(%rip),%rdi
xor    %eax,%eax
call   1060 <fatal@plt>
movslq %ebp,%rdi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"Out of core\00"
define i8* @keeps(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add i64 %5, 1
%7 = trunc i64 %6 to i32
%8 = call i32 (i32, ...) bitcast (i32 (...)* @getcore to i32 (i32, ...)*)(i32 %7)
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i8*
store i8* %10, i8** %3
%11 = load i8*, i8** %3
%12 = icmp ne i8* %11, null
br i1 %12, label %15, label %13
13: ; preds = %1
%14 = call i32 (i8*, ...) bitcast (i32 (...)* @fatal to i32 (i8*, ...)*)(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %15
15: ; preds = %13, %1
%16 = load i8*, i8** %3
%17 = load i8*, i8** %2
%18 = call i8* @strcpy(i8* %16, i8* %17)
ret i8* %18
}

LLVM IR (-O2):
@.str = [12 x i8] c"Out of core\00"
define i8* @keeps(i8* nocapture %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = trunc i64 %2 to i32
%4 = add i32 %3, 1
%5 = tail call i32 (i32, ...) bitcast (i32 (...)* @getcore to i32 (i32, ...)*)(i32 %4)
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = tail call i32 (i8*, ...) bitcast (i32 (...)* @fatal to i32 (i8*, ...)*)(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %1
%10 = sext i32 %5 to i64
%11 = inttoptr i64 %10 to i8*
%12 = tail call i8* @strcpy(i8* dereferenceable(1) %11, i8* dereferenceable(1) %0)
ret i8* %11
}
/* Variables and functions */
int /*<<< orphan*/ DecompileDecompileFunctions();
int /*<<< orphan*/ DecompileReadData(char *);
void DecompileProgsDat(char *name) {
  DecompileReadData(name);
  DecompileDecompileFunctions();
}


x86 assembly (clang, -O0):
<DecompileProgsDat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <DecompileReadData@plt>
mov    $0x0,%al
call   1030 <DecompileDecompileFunctions@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DecompileProgsDat>:
push   %rax
call   1040 <DecompileReadData@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <DecompileDecompileFunctions@plt>

LLVM IR (-O0):
define void @DecompileProgsDat(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @DecompileReadData(i8* %3)
%5 = call i32 (...) @DecompileDecompileFunctions()
ret void
}

LLVM IR (-O2):
define void @DecompileProgsDat(i8* %0) {
%2 = tail call i32 @DecompileReadData(i8* %0)
%3 = tail call i32 (...) @DecompileDecompileFunctions()
ret void
}
/* Variables and functions */
void init_c_string_array_(int *length, char **mr_blk1, char ***fer_ptr) {
  int i;
  char **ptr;
  *fer_ptr = mr_blk1;
  ptr = mr_blk1;
  for (i = 0; i < (*length) * (8 / sizeof(char *)); i++) {
    *ptr = NULL;
    ptr++;
  }
}


x86 assembly (clang, -O0):
<init_c_string_array_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
movl   $0x0,-0x1c(%rbp)
movslq -0x1c(%rbp),%rax
mov    -0x8(%rbp),%rcx
movslq (%rcx),%rcx
shl    $0x0,%rcx
cmp    %rcx,%rax
jae    1167 <init_c_string_array_+0x67>
mov    -0x28(%rbp),%rax
movq   $0x0,(%rax)
mov    -0x28(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x28(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    112a <init_c_string_array_+0x2a>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_c_string_array_>:
push   %rax
mov    %rsi,(%rdx)
movslq (%rdi),%rdx
test   %rdx,%rdx
je     112a <init_c_string_array_+0x1a>
shl    $0x3,%rdx
mov    %rsi,%rdi
xor    %esi,%esi
call   1030 <memset@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @init_c_string_array_(i32* %0, i8** %1, i8*** %2) {
%4 = alloca i32*
%5 = alloca i8**
%6 = alloca i8***
%7 = alloca i32
%8 = alloca i8**
store i32* %0, i32** %4
store i8** %1, i8*** %5
store i8*** %2, i8**** %6
%9 = load i8**, i8*** %5
%10 = load i8***, i8**** %6
store i8** %9, i8*** %10
%11 = load i8**, i8*** %5
store i8** %11, i8*** %8
store i32 0, i32* %7
br label %12
12: ; preds = %24, %3
%13 = load i32, i32* %7
%14 = sext i32 %13 to i64
%15 = load i32*, i32** %4
%16 = load i32, i32* %15
%17 = sext i32 %16 to i64
%18 = mul i64 %17, 1
%19 = icmp ult i64 %14, %18
br i1 %19, label %20, label %27
20: ; preds = %12
%21 = load i8**, i8*** %8
store i8* null, i8** %21
%22 = load i8**, i8*** %8
%23 = getelementptr inbounds i8*, i8** %22, i32 1
store i8** %23, i8*** %8
br label %24
24: ; preds = %20
%25 = load i32, i32* %7
%26 = add nsw i32 %25, 1
store i32 %26, i32* %7
br label %12
27: ; preds = %12
ret void
}

LLVM IR (-O2):
define void @init_c_string_array_(i32* nocapture %0, i8** %1, i8*** nocapture writeonly %2) {
store i8** %1, i8*** %2
%4 = load i32, i32* %0
%5 = icmp eq i32 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %3
%7 = bitcast i8** %1 to i8*
%8 = sext i32 %4 to i64
%9 = shl nuw nsw i64 %8, 3
br label %10
10: ; preds = %6, %3
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ htons(int /*<<< orphan*/);
void minipack_pack_uint16(void *ptr, uint16_t value, size_t *sz) {
  *sz = 3;
  *((uint8_t *)ptr) = 0xCD;
  *((uint16_t *)(ptr + 1)) = htons(value);
}


x86 assembly (clang, -O0):
<minipack_pack_uint16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movq   $0x3,(%rax)
mov    -0x8(%rbp),%rax
movl   $0xcd,(%rax)
mov    -0xc(%rbp),%edi
call   1030 <htons@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x1(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<minipack_pack_uint16>:
push   %rbx
mov    %rdi,%rbx
movq   $0x3,(%rdx)
movl   $0xcd,(%rdi)
mov    %esi,%edi
call   1030 <htons@plt>
mov    %eax,0x1(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @minipack_pack_uint16(i8* %0, i32 %1, i64* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i64* %2, i64** %6
%7 = load i64*, i64** %6
store i64 3, i64* %7
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
store i32 205, i32* %9
%10 = load i32, i32* %5
%11 = call i32 @htons(i32 %10)
%12 = load i8*, i8** %4
%13 = getelementptr i8, i8* %12, i64 1
%14 = bitcast i8* %13 to i32*
store i32 %11, i32* %14
ret void
}

LLVM IR (-O2):
define void @minipack_pack_uint16(i8* nocapture writeonly %0, i32 %1, i64* nocapture writeonly %2) {
store i64 3, i64* %2
%4 = bitcast i8* %0 to i32*
store i32 205, i32* %4
%5 = tail call i32 @htons(i32 %1)
%6 = getelementptr i8, i8* %0, i64 1
%7 = bitcast i8* %6 to i32*
store i32 %5, i32* %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ execlp(char *, char *, int /*<<< orphan*/ *);
int child_procedure(void) {
  execlp("."
         "/daemond",
         "daemond", NULL);
  return 1;
}


x86 assembly (clang, -O0):
<child_procedure>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee0(%rip),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <execlp@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<child_procedure>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xee3(%rip),%rsi
xor    %edx,%edx
call   1030 <execlp@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"./daemond\00"
@.str.1 = [8 x i8] c"daemond\00"
define i32 @child_procedure() {
%1 = call i32 @execlp(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32* null)
ret i32 1
}

LLVM IR (-O2):
@.str = [10 x i8] c"./daemond\00"
@.str.1 = [8 x i8] c"daemond\00"
define i32 @child_procedure() {
%1 = tail call i32 @execlp(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32* null)
ret i32 1
}
/* Variables and functions */
scalar_t__ is_digit(char);
int is_hexaldigit(char c) {
  return is_digit(c) || (c <= 'F' && c >= 'A') || (c <= 'f' && c >= 'a');
}


x86 assembly (clang, -O0):
<is_hexaldigit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <is_digit@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x2(%rbp)
jne    117d <is_hexaldigit+0x6d>
movsbl -0x1(%rbp),%eax
cmp    $0x46,%eax
jg     1158 <is_hexaldigit+0x48>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x41,%ecx
mov    %al,-0x2(%rbp)
jge    117d <is_hexaldigit+0x6d>
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x66,%ecx
mov    %al,-0x3(%rbp)
jg     1177 <is_hexaldigit+0x67>
movsbl -0x1(%rbp),%eax
cmp    $0x61,%eax
setge  %al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_hexaldigit>:
push   %rbx
mov    %edi,%ebx
call   1030 <is_digit@plt>
test   %rax,%rax
setne  %al
and    $0xdf,%bl
add    $0xbf,%bl
cmp    $0x6,%bl
setb   %cl
or     %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @is_hexaldigit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @is_digit(i8 signext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %24, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 70
br i1 %9, label %10, label %14
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp sge i32 %12, 65
br i1 %13, label %24, label %14
14: ; preds = %10, %6
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp sle i32 %16, 102
br i1 %17, label %18, label %22
18: ; preds = %14
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp sge i32 %20, 97
br label %22
22: ; preds = %18, %14
%23 = phi i1 [ false, %14 ], [ %21, %18 ]
br label %24
24: ; preds = %22, %10, %1
%25 = phi i1 [ true, %10 ], [ true, %1 ], [ %23, %22 ]
%26 = zext i1 %25 to i32
ret i32 %26
}

LLVM IR (-O2):
define i32 @is_hexaldigit(i8 signext %0) {
%2 = tail call i64 @is_digit(i8 signext %0)
%3 = icmp ne i64 %2, 0
%4 = and i8 %0, -33
%5 = add i8 %4, -65
%6 = icmp ult i8 %5, 6
%7 = or i1 %6, %3
%8 = zext i1 %7 to i32
ret i32 %8
}
int minInt(int a, int b) {
  if (b < a)
    return b;
  return a;
}


x86 assembly (clang, -O0):
<minInt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <minInt+0x21>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <minInt+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<minInt>:
mov    %edi,%eax
cmp    %edi,%esi
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define i32 @minInt(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = load i32, i32* %4
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %5
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %4
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @minInt(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, %0
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void print_usage(int code) {
  printf("usage: getsram [-c|--chip chip-id] addr\n");
  printf("               [--occ-channel|n <chan>]\n");
  printf("       getsram -v|--version\n");
  exit(code);
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
lea    0xeeb(%rip),%rdi
call   1030 <printf@plt>
lea    0xf08(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<print_usage>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rdi
call   1030 <puts@plt>
lea    0xef2(%rip),%rdi
call   1030 <puts@plt>
lea    0xf0e(%rip),%rdi
call   1030 <puts@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [41 x i8] c"usage: getsram [-c|--chip chip-id] addr\0A\00"
@.str.1 = [41 x i8] c" [--occ-channel|n <chan>]\0A\00"
@.str.2 = [29 x i8] c" getsram -v|--version\0A\00"
define void @print_usage(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.1, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.2, i64 0, i64 0))
%6 = load i32, i32* %2
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@str = [40 x i8] c"usage: getsram [-c|--chip chip-id] addr\00"
@str.3 = [40 x i8] c" [--occ-channel|n <chan>]\00"
@str.4 = [28 x i8] c" getsram -v|--version\00"
define void @print_usage(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([40 x i8], [40 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([40 x i8], [40 x i8]* @str.3, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str.4, i64 0, i64 0))
%5 = tail call i32 @exit(i32 %0)
unreachable
}
int _write_r(void *reent, int file, char *ptr, int len) { return 0; }


x86 assembly (clang, -O0):
<_write_r>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_write_r>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @_write_r(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
ret i32 0
}

LLVM IR (-O2):
define i32 @_write_r(i8* nocapture readnone %0, i32 %1, i8* nocapture readnone %2, i32 %3) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ PRINT_LOG(char *, char *);
void PRINT_INFO(char *y) { PRINT_LOG("INFO", y); }


x86 assembly (clang, -O0):
<PRINT_INFO>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <PRINT_LOG@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PRINT_INFO>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <PRINT_LOG@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"INFO\00"
define void @PRINT_INFO(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @PRINT_LOG(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"INFO\00"
define void @PRINT_INFO(i8* %0) {
%2 = tail call i32 @PRINT_LOG(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
char *ltostr(val, radix)
long val;
int radix;
{
  char *p;
  int flg = 0;
  if (val < 0) {
    flg++;
    val = -val;
  }
  p = ultostr(val, radix);
  if (p && flg)
    *--p = '-';
  return p;
}


x86 assembly (clang, -O0):
<ltostr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x1c(%rbp)
cmpq   $0x0,-0x8(%rbp)
jge    1144 <ltostr+0x34>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
xor    %eax,%eax
sub    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    $0x0,%al
call   1030 <ultostr@plt>
cltq
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1180 <ltostr+0x70>
cmpl   $0x0,-0x1c(%rbp)
je     1180 <ltostr+0x70>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x18(%rbp)
movb   $0x2d,-0x1(%rax)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ltostr>:
push   %rbx
mov    %rdi,%rbx
neg    %rdi
cmovs  %rbx,%rdi
xor    %eax,%eax
call   1030 <ultostr@plt>
mov    %eax,%ecx
cltq
test   %rbx,%rbx
jns    1137 <ltostr+0x27>
test   %ecx,%ecx
je     1137 <ltostr+0x27>
movb   $0x2d,-0x1(%rax)
add    $0xffffffffffffffff,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @ltostr(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
store i32 0, i32* %6
%7 = load i64, i64* %3
%8 = icmp slt i64 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %2
%10 = load i32, i32* %6
%11 = add nsw i32 %10, 1
store i32 %11, i32* %6
%12 = load i64, i64* %3
%13 = sub nsw i64 0, %12
store i64 %13, i64* %3
br label %14
14: ; preds = %9, %2
%15 = load i64, i64* %3
%16 = load i32, i32* %4
%17 = call i32 (i64, i32, ...) bitcast (i32 (...)* @ultostr to i32 (i64, i32, ...)*)(i64 %15, i32 %16)
%18 = sext i32 %17 to i64
%19 = inttoptr i64 %18 to i8*
store i8* %19, i8** %5
%20 = load i8*, i8** %5
%21 = icmp ne i8* %20, null
br i1 %21, label %22, label %28
22: ; preds = %14
%23 = load i32, i32* %6
%24 = icmp ne i32 %23, 0
br i1 %24, label %25, label %28
25: ; preds = %22
%26 = load i8*, i8** %5
%27 = getelementptr inbounds i8, i8* %26, i32 -1
store i8* %27, i8** %5
store i8 45, i8* %27
br label %28
28: ; preds = %25, %22, %14
%29 = load i8*, i8** %5
ret i8* %29
}

LLVM IR (-O2):
define i8* @ltostr(i64 %0, i32 %1) {
%3 = icmp slt i64 %0, 0
%4 = sub nsw i64 0, %0
%5 = select i1 %3, i64 %4, i64 %0
%6 = tail call i32 (i64, i32, ...) bitcast (i32 (...)* @ultostr to i32 (i64, i32, ...)*)(i64 %5, i32 %1)
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i8*
%9 = icmp ne i32 %6, 0
%10 = and i1 %3, %9
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = getelementptr inbounds i8, i8* %8, i64 -1
store i8 45, i8* %12
br label %13
13: ; preds = %11, %2
%14 = phi i8* [ %12, %11 ], [ %8, %2 ]
ret i8* %14
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ prep_exit();
void sighandler() {
  do {
    prep_exit();
    exit(1);
  } while (0);
}


x86 assembly (clang, -O0):
<sighandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1129 <sighandler+0x9>
mov    $0x0,%al
call   1030 <prep_exit@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<sighandler>:
push   %rax
xor    %eax,%eax
call   1030 <prep_exit@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @sighandler() {
br label %1
1: ; preds = %0
%2 = call i32 (...) @prep_exit()
%3 = call i32 @exit(i32 1)
unreachable
4: ; No predecessors!
ret void
}

LLVM IR (-O2):
define void @sighandler() {
%1 = tail call i32 (...) @prep_exit()
%2 = tail call i32 @exit(i32 1)
unreachable
}
void empty_void_function_no_param() {}


x86 assembly (clang, -O0):
<empty_void_function_no_param>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<empty_void_function_no_param>:
ret

LLVM IR (-O0):
define void @empty_void_function_no_param() {
ret void
}

LLVM IR (-O2):
define void @empty_void_function_no_param() {
ret void
}
int fesetround(int round) {
  unsigned short int cw;
  int mxcsr;
  if ((round & ~0xc00) != 0)
    return 1;
  __asm__("fnstcw %0" : "=m"(*&cw));
  cw &= ~0xc00;
  cw |= round;
  __asm__("fldcw %0" : : "m"(*&cw));
  __asm__("stmxcsr %0" : "=m"(*&mxcsr));
  mxcsr &= ~0x6000;
  mxcsr |= round << 3;
  __asm__("ldmxcsr %0" : : "m"(*&mxcsr));
  return 0;
}


x86 assembly (clang, -O0):
<fesetround>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfffff3ff,%eax
cmp    $0x0,%eax
je     1124 <fesetround+0x24>
movl   $0x1,-0x4(%rbp)
jmp    116a <fesetround+0x6a>
fnstcw -0xa(%rbp)
movzwl -0xa(%rbp),%eax
and    $0xfffff3ff,%eax
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%ecx
movzwl -0xa(%rbp),%eax
or     %ecx,%eax
mov    %ax,-0xa(%rbp)
fldcw  -0xa(%rbp)
stmxcsr -0x10(%rbp)
mov    -0x10(%rbp),%eax
and    $0xffff9fff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x3,%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
ldmxcsr -0x10(%rbp)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fesetround>:
mov    $0x1,%eax
test   $0xfffff3ff,%edi
je     110e <fesetround+0xe>
ret
fnstcw -0x6(%rsp)
movzwl -0x6(%rsp),%eax
and    $0xfffff3ff,%eax
or     %edi,%eax
mov    %ax,-0x6(%rsp)
fldcw  -0x6(%rsp)
stmxcsr -0x4(%rsp)
mov    $0xffff9fff,%eax
and    -0x4(%rsp),%eax
shl    $0x3,%edi
or     %eax,%edi
mov    %edi,-0x4(%rsp)
ldmxcsr -0x4(%rsp)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fesetround(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i16
%5 = alloca i32
store i32 %0, i32* %3
%6 = load i32, i32* %3
%7 = and i32 %6, -3073
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 1, i32* %2
br label %26
10: ; preds = %1
%11 = load i16, i16* %4
%12 = zext i16 %11 to i32
%13 = and i32 %12, -3073
%14 = trunc i32 %13 to i16
store i16 %14, i16* %4
%15 = load i32, i32* %3
%16 = load i16, i16* %4
%17 = zext i16 %16 to i32
%18 = or i32 %17, %15
%19 = trunc i32 %18 to i16
store i16 %19, i16* %4
%20 = load i32, i32* %5
%21 = and i32 %20, -24577
store i32 %21, i32* %5
%22 = load i32, i32* %3
%23 = shl i32 %22, 3
%24 = load i32, i32* %5
%25 = or i32 %24, %23
store i32 %25, i32* %5
store i32 0, i32* %2
br label %26
26: ; preds = %10, %9
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @fesetround(i32 %0) {
%2 = alloca i16
%3 = alloca i32
%4 = bitcast i16* %2 to i8*
%5 = bitcast i32* %3 to i8*
%6 = and i32 %0, -3073
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %1
%9 = load i16, i16* %2
%10 = and i16 %9, -3073
%11 = trunc i32 %0 to i16
%12 = or i16 %10, %11
store i16 %12, i16* %2
%13 = load i32, i32* %3
%14 = and i32 %13, -24577
%15 = shl nuw nsw i32 %0, 3
%16 = or i32 %14, %15
store i32 %16, i32* %3
br label %17
17: ; preds = %1, %8
%18 = phi i32 [ 0, %8 ], [ 1, %1 ]
ret i32 %18
}
/* Variables and functions */
int exists_runnable_thread();
int stop_simulation(void) {
  int tmp;
  int __retres2;
  {
    { tmp = exists_runnable_thread(); }
    if (tmp) {
      __retres2 = 0;
      goto return_label;
    } else {
    }
    __retres2 = 1;
  return_label:
    return (__retres2);
  }
}


x86 assembly (clang, -O0):
<stop_simulation>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <exists_runnable_thread@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1138 <stop_simulation+0x28>
movl   $0x0,-0x8(%rbp)
jmp    1144 <stop_simulation+0x34>
jmp    113d <stop_simulation+0x2d>
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stop_simulation>:
push   %rax
xor    %eax,%eax
call   1030 <exists_runnable_thread@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @stop_simulation() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @exists_runnable_thread()
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %0
store i32 0, i32* %2
br label %9
7: ; preds = %0
br label %8
8: ; preds = %7
store i32 1, i32* %2
br label %9
9: ; preds = %8, %6
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @stop_simulation() {
%1 = tail call i32 (...) @exists_runnable_thread()
%2 = icmp eq i32 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}