xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, char const *);
int /*<<< orphan*/ puts(char const *);
int show_item(int show, int flag, const char *name, const char *value) {
  if (!(show & flag)) {
    return 0;
  }
  if (show == flag) {
    puts(value);
  } else {
    printf("%s: %s\n", name, value);
  }
  return 0;
}


x86 assembly (clang, -O0):
<show_item>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%eax
and    -0xc(%rbp),%eax
cmp    $0x0,%eax
jne    1151 <show_item+0x31>
movl   $0x0,-0x4(%rbp)
jmp    1186 <show_item+0x66>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    116b <show_item+0x4b>
mov    -0x20(%rbp),%rdi
call   1030 <puts@plt>
jmp    117f <show_item+0x5f>
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
lea    0xe86(%rip),%rdi
call   1040 <printf@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_item>:
push   %rax
test   %edi,%esi
je     1145 <show_item+0x25>
cmp    %esi,%edi
jne    1133 <show_item+0x13>
mov    %rcx,%rdi
call   1030 <puts@plt>
jmp    1145 <show_item+0x25>
lea    0xec6(%rip),%rdi
mov    %rdx,%rsi
mov    %rcx,%rdx
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"%s: %s\0A\00"
define i32 @show_item(i32 %0, i32 %1, i8* %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i8*
store i32 %0, i32* %6
store i32 %1, i32* %7
store i8* %2, i8** %8
store i8* %3, i8** %9
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = and i32 %10, %11
%13 = icmp ne i32 %12, 0
br i1 %13, label %15, label %14
14: ; preds = %4
store i32 0, i32* %5
br label %27
15: ; preds = %4
%16 = load i32, i32* %6
%17 = load i32, i32* %7
%18 = icmp eq i32 %16, %17
br i1 %18, label %19, label %22
19: ; preds = %15
%20 = load i8*, i8** %9
%21 = call i32 @puts(i8* %20)
br label %26
22: ; preds = %15
%23 = load i8*, i8** %8
%24 = load i8*, i8** %9
%25 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %23, i8* %24)
br label %26
26: ; preds = %22, %19
store i32 0, i32* %5
br label %27
27: ; preds = %26, %14
%28 = load i32, i32* %5
ret i32 %28
}

LLVM IR (-O2):
@.str = [8 x i8] c"%s: %s\0A\00"
define i32 @show_item(i32 %0, i32 %1, i8* %2, i8* %3) {
%5 = and i32 %1, %0
%6 = icmp eq i32 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %4
%8 = icmp eq i32 %0, %1
br i1 %8, label %9, label %11
9: ; preds = %7
%10 = tail call i32 @puts(i8* dereferenceable(1) %3)
br label %13
11: ; preds = %7
%12 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %2, i8* %3)
br label %13
13: ; preds = %9, %11, %4
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ft_strcmp(char const *, char const *);
int ft_strequ(char const *s1, char const *s2) {
  if (s1 && s2)
    if (!ft_strcmp(s1, s2))
      return (1);
  return (0);
}


x86 assembly (clang, -O0):
<ft_strequ>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     115d <ft_strequ+0x4d>
cmpq   $0x0,-0x18(%rbp)
je     115d <ft_strequ+0x4d>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <ft_strcmp@plt>
cmp    $0x0,%eax
jne    1158 <ft_strequ+0x48>
movl   $0x1,-0x4(%rbp)
jmp    1164 <ft_strequ+0x54>
jmp    115d <ft_strequ+0x4d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strequ>:
test   %rdi,%rdi
je     1129 <ft_strequ+0x19>
test   %rsi,%rsi
je     1129 <ft_strequ+0x19>
push   %rax
call   1030 <ft_strcmp@plt>
test   %eax,%eax
lea    0x8(%rsp),%rsp
je     112c <ft_strequ+0x1c>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ft_strequ(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %18
8: ; preds = %2
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %18
11: ; preds = %8
%12 = load i8*, i8** %4
%13 = load i8*, i8** %5
%14 = call i32 @ft_strcmp(i8* %12, i8* %13)
%15 = icmp ne i32 %14, 0
br i1 %15, label %17, label %16
16: ; preds = %11
store i32 1, i32* %3
br label %19
17: ; preds = %11
br label %18
18: ; preds = %17, %8, %2
store i32 0, i32* %3
br label %19
19: ; preds = %18, %16
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @ft_strequ(i8* %0, i8* %1) {
%3 = icmp ne i8* %0, null
%4 = icmp ne i8* %1, null
%5 = and i1 %3, %4
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = tail call i32 @ft_strcmp(i8* %0, i8* %1)
%8 = icmp eq i32 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %6, %2
br label %10
10: ; preds = %6, %9
%11 = phi i32 [ 0, %9 ], [ 1, %6 ]
ret i32 %11
}
/* Variables and functions */
char *deblank(char *str) {
  char *out = str, *put = str;
  for (; *str != '\0'; ++str) {
    if (*str != ' ')
      *put++ = *str;
  }
  *put = '\0';
  return out;
}


x86 assembly (clang, -O0):
<deblank>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1165 <deblank+0x65>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
je     114f <deblank+0x4f>
mov    -0x8(%rbp),%rax
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %cl,(%rax)
jmp    1154 <deblank+0x54>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1118 <deblank+0x18>
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<deblank>:
mov    %rdi,%rax
mov    %rdi,%rdx
mov    %rdi,%rsi
jmp    1114 <deblank+0x14>
nopl   0x0(%rax,%rax,1)
add    $0x1,%rdx
movzbl (%rdx),%ecx
cmp    $0x20,%cl
je     1110 <deblank+0x10>
test   %cl,%cl
je     1128 <deblank+0x28>
mov    %cl,(%rsi)
add    $0x1,%rsi
jmp    1110 <deblank+0x10>
movb   $0x0,(%rsi)
ret

LLVM IR (-O0):
define i8* @deblank(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8* %5, i8** %3
%6 = load i8*, i8** %2
store i8* %6, i8** %4
br label %7
7: ; preds = %23, %1
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %26
12: ; preds = %7
%13 = load i8*, i8** %2
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 32
br i1 %16, label %17, label %22
17: ; preds = %12
%18 = load i8*, i8** %2
%19 = load i8, i8* %18
%20 = load i8*, i8** %4
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %4
store i8 %19, i8* %20
br label %22
22: ; preds = %17, %12
br label %23
23: ; preds = %22
%24 = load i8*, i8** %2
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %2
br label %7
26: ; preds = %7
%27 = load i8*, i8** %4
store i8 0, i8* %27
%28 = load i8*, i8** %3
ret i8* %28
}

LLVM IR (-O2):
define i8* @deblank(i8* returned %0) {
br label %2
2: ; preds = %8, %1
%3 = phi i8* [ %0, %1 ], [ %10, %8 ]
%4 = phi i8* [ %0, %1 ], [ %9, %8 ]
%5 = load i8, i8* %3
switch i8 %5, label %6 [
i8 0, label %11
i8 32, label %8
]
6: ; preds = %2
%7 = getelementptr inbounds i8, i8* %4, i64 1
store i8 %5, i8* %4
br label %8
8: ; preds = %2, %6
%9 = phi i8* [ %7, %6 ], [ %4, %2 ]
%10 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
11: ; preds = %2
store i8 0, i8* %4
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ puts(char *);
void output(int *array, size_t len) {
  int i;
  for (i = 0; i < len; i++) {
    printf("%2d ", array[i]);
  }
  puts("");
}


x86 assembly (clang, -O0):
<output>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movslq -0x14(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    116a <output+0x4a>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xea9(%rip),%rdi
call   1040 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1137 <output+0x17>
lea    0xe93(%rip),%rdi
call   1030 <puts@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<output>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %rsi,%rsi
je     1155 <output+0x35>
mov    %rsi,%r12
mov    %rdi,%r14
xor    %ebx,%ebx
lea    0xec4(%rip),%r15
nopl   0x0(%rax)
mov    (%r14,%rbx,4),%esi
mov    %r15,%rdi
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <output+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%2d \00"
@.str.1 = [1 x i8] zeroinitializer
define void @output(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = alloca i32
store i32* %0, i32** %3
store i64 %1, i64* %4
store i32 0, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i32, i32* %5
%8 = sext i32 %7 to i64
%9 = load i64, i64* %4
%10 = icmp ult i64 %8, %9
br i1 %10, label %11, label %21
11: ; preds = %6
%12 = load i32*, i32** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
%16 = load i32, i32* %15
%17 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %16)
br label %18
18: ; preds = %11
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %6
21: ; preds = %6
%22 = call i32 @puts(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%2d \00"
define void @output(i32* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %11, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %9, %4 ], [ 0, %2 ]
%6 = getelementptr inbounds i32, i32* %0, i64 %5
%7 = load i32, i32* %6
%8 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = add nuw i64 %5, 1
%10 = icmp eq i64 %9, %1
br i1 %10, label %11, label %4
11: ; preds = %4, %2
%12 = tail call i32 @putchar(i32 10)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int32_t iabs(int32_t a) { return a < 0 ? -a : a; }


x86 assembly (clang, -O0):
<iabs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    111e <iabs+0x1e>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1124 <iabs+0x24>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iabs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @iabs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = sub nsw i32 0, %6
br label %10
8: ; preds = %1
%9 = load i32, i32* %2
br label %10
10: ; preds = %8, %5
%11 = phi i32 [ %7, %5 ], [ %9, %8 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @iabs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ getValue(char *);
int /*<<< orphan*/ setValue(int, char *);
void switchValue(char *gpio_number) {
  setValue(!getValue(gpio_number), gpio_number);
}


x86 assembly (clang, -O0):
<switchValue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <getValue@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
mov    -0x8(%rbp),%rsi
call   1030 <setValue@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<switchValue>:
push   %rbx
mov    %rdi,%rbx
call   1040 <getValue@plt>
xor    %edi,%edi
test   %eax,%eax
sete   %dil
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <setValue@plt>

LLVM IR (-O0):
define void @switchValue(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @getValue(i8* %3)
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
%8 = load i8*, i8** %2
%9 = call i32 @setValue(i32 %7, i8* %8)
ret void
}

LLVM IR (-O2):
define void @switchValue(i8* %0) {
%2 = tail call i32 @getValue(i8* %0)
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
%5 = tail call i32 @setValue(i32 %4, i8* %0)
ret void
}
int test_imm_BDuint8_reg(unsigned char val) {
  return ((val) & (0xBD << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_BDuint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xbd,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_BDuint8_reg>:
test   $0xbd,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_BDuint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 189
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_BDuint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -67
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void gtk_widget_ref() {}


x86 assembly (clang, -O0):
<gtk_widget_ref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_widget_ref>:
ret

LLVM IR (-O0):
define void @gtk_widget_ref() {
ret void
}

LLVM IR (-O2):
define void @gtk_widget_ref() {
ret void
}
/* Type definitions */
typedef int mode_t;

/* Variables and functions */
int S_IFIFO;
int mknod(char const *, int, long long);
int mkfifo(const char *path, mode_t mode) {
  return mknod(path, mode | S_IFIFO, 0LL);
}


x86 assembly (clang, -O0):
<mkfifo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    0x2eb3(%rip),%rax
or     (%rax),%esi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <mknod@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mkfifo>:
mov    0x2ec9(%rip),%rax
or     (%rax),%esi
xor    %edx,%edx
jmp    1030 <mknod@plt>

LLVM IR (-O0):
@S_IFIFO = global i32 0
define i32 @mkfifo(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = load i32, i32* @S_IFIFO
%8 = or i32 %6, %7
%9 = call i32 @mknod(i8* %5, i32 %8, i64 0)
ret i32 %9
}

LLVM IR (-O2):
@S_IFIFO = global i32 0
define i32 @mkfifo(i8* %0, i32 %1) {
%3 = load i32, i32* @S_IFIFO
%4 = or i32 %3, %1
%5 = tail call i32 @mknod(i8* %0, i32 %4, i64 0)
ret i32 %5
}
/* Type definitions */
struct timeval {
  int tv_sec;
  int tv_usec;
};

/* Variables and functions */
void timeval_from_ms(struct timeval *tv, int ms) {
  tv->tv_sec = ms / (1000L);
  tv->tv_usec = (ms % (1000L)) * (1000L);
}


x86 assembly (clang, -O0):
<timeval_from_ms>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movslq -0xc(%rbp),%rax
mov    $0x3e8,%ecx
cqto
idiv   %rcx
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
movslq -0xc(%rbp),%rax
mov    $0x3e8,%ecx
cqto
idiv   %rcx
imul   $0x3e8,%rdx,%rax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<timeval_from_ms>:
movslq %esi,%rax
imul   $0x10624dd3,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rcx
add    %edx,%ecx
mov    %ecx,(%rdi)
imul   $0x3e8,%ecx,%ecx
sub    %ecx,%eax
imul   $0x3e8,%eax,%eax
mov    %eax,0x4(%rdi)
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define void @timeval_from_ms(%struct.timeval* %0, i32 %1) {
%3 = alloca %struct.timeval*
%4 = alloca i32
store %struct.timeval* %0, %struct.timeval** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = sext i32 %5 to i64
%7 = sdiv i64 %6, 1000
%8 = trunc i64 %7 to i32
%9 = load %struct.timeval*, %struct.timeval** %3
%10 = getelementptr inbounds %struct.timeval, %struct.timeval* %9, i32 0, i32 0
store i32 %8, i32* %10
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = srem i64 %12, 1000
%14 = mul nsw i64 %13, 1000
%15 = trunc i64 %14 to i32
%16 = load %struct.timeval*, %struct.timeval** %3
%17 = getelementptr inbounds %struct.timeval, %struct.timeval* %16, i32 0, i32 1
store i32 %15, i32* %17
ret void
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define void @timeval_from_ms(%struct.timeval* nocapture writeonly %0, i32 %1) {
%3 = sdiv i32 %1, 1000
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
store i32 %3, i32* %4
%5 = srem i32 %1, 1000
%6 = mul nsw i32 %5, 1000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
store i32 %6, i32* %7
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int state;
};
typedef TYPE_1__ XPropertyEvent;

/* Variables and functions */
void set_XPropertyEvent_state(void *_p, int _v) {
  ((XPropertyEvent *)_p)->state = (int)_v;
}


x86 assembly (clang, -O0):
<set_XPropertyEvent_state>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XPropertyEvent_state>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XPropertyEvent_state(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XPropertyEvent_state(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
void modem_probe_close() { return; }


x86 assembly (clang, -O0):
<modem_probe_close>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<modem_probe_close>:
ret

LLVM IR (-O0):
define void @modem_probe_close() {
ret void
}

LLVM IR (-O2):
define void @modem_probe_close() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bcm2835_init();
int /*<<< orphan*/ mark_sync();
int /*<<< orphan*/ put_reply();
int /*<<< orphan*/ set_int_code(int /*<<< orphan*/);
int /*<<< orphan*/ set_ope_code(int);
void bcm_init(void) {
  set_ope_code(0x30);
  set_int_code(bcm2835_init());
  put_reply();
  mark_sync();
}


x86 assembly (clang, -O0):
<bcm_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x30,%edi
call   1030 <set_ope_code@plt>
mov    $0x0,%al
call   1070 <bcm2835_init@plt>
mov    %eax,%edi
call   1050 <set_int_code@plt>
mov    $0x0,%al
call   1040 <put_reply@plt>
mov    $0x0,%al
call   1060 <mark_sync@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcm_init>:
push   %rax
mov    $0x30,%edi
call   1030 <set_ope_code@plt>
xor    %eax,%eax
call   1070 <bcm2835_init@plt>
mov    %eax,%edi
call   1050 <set_int_code@plt>
xor    %eax,%eax
call   1040 <put_reply@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <mark_sync@plt>

LLVM IR (-O0):
define void @bcm_init() {
%1 = call i32 @set_ope_code(i32 48)
%2 = call i32 (...) @bcm2835_init()
%3 = call i32 @set_int_code(i32 %2)
%4 = call i32 (...) @put_reply()
%5 = call i32 (...) @mark_sync()
ret void
}

LLVM IR (-O2):
define void @bcm_init() {
%1 = tail call i32 @set_ope_code(i32 48)
%2 = tail call i32 (...) @bcm2835_init()
%3 = tail call i32 @set_int_code(i32 %2)
%4 = tail call i32 (...) @put_reply()
%5 = tail call i32 (...) @mark_sync()
ret void
}
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_REALTIME;
int /*<<< orphan*/ __clock_nanosleep(int /*<<< orphan*/, int /*<<< orphan*/,
                                     struct timespec const *,
                                     struct timespec *);
int __syscall_ret(int /*<<< orphan*/);
int nanosleep(const struct timespec *req, struct timespec *rem) {
  return __syscall_ret(-__clock_nanosleep(CLOCK_REALTIME, 0, req, rem));
}


x86 assembly (clang, -O0):
<nanosleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
xor    %esi,%esi
call   1030 <__clock_nanosleep@plt>
xor    %edi,%edi
sub    %eax,%edi
call   1040 <__syscall_ret@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nanosleep>:
push   %rax
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    0x2eb2(%rip),%rax
mov    (%rax),%edi
xor    %esi,%esi
call   1030 <__clock_nanosleep@plt>
neg    %eax
mov    %eax,%edi
pop    %rax
jmp    1040 <__syscall_ret@plt>

LLVM IR (-O0):
%struct.timespec = type { i32 }
@CLOCK_REALTIME = global i32 0
define i32 @nanosleep(%struct.timespec* %0, %struct.timespec* %1) {
%3 = alloca %struct.timespec*
%4 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load i32, i32* @CLOCK_REALTIME
%6 = load %struct.timespec*, %struct.timespec** %3
%7 = load %struct.timespec*, %struct.timespec** %4
%8 = call i32 @__clock_nanosleep(i32 %5, i32 0, %struct.timespec* %6, %struct.timespec* %7)
%9 = sub nsw i32 0, %8
%10 = call i32 @__syscall_ret(i32 %9)
ret i32 %10
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@CLOCK_REALTIME = global i32 0
define i32 @nanosleep(%struct.timespec* %0, %struct.timespec* %1) {
%3 = load i32, i32* @CLOCK_REALTIME
%4 = tail call i32 @__clock_nanosleep(i32 %3, i32 0, %struct.timespec* %0, %struct.timespec* %1)
%5 = sub nsw i32 0, %4
%6 = tail call i32 @__syscall_ret(i32 %5)
ret i32 %6
}
void gtk_dialog_set_response_sensitive() {}


x86 assembly (clang, -O0):
<gtk_dialog_set_response_sensitive>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_dialog_set_response_sensitive>:
ret

LLVM IR (-O0):
define void @gtk_dialog_set_response_sensitive() {
ret void
}

LLVM IR (-O2):
define void @gtk_dialog_set_response_sensitive() {
ret void
}
/* Variables and functions */
scalar_t__ rand();
int rand_float() {
  float f = (float)rand() / (float)rand();
  if ((int)rand() % 2 == 0) {
    f *= -1;
  }
  return f;
}


x86 assembly (clang, -O0):
<rand_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2ss %rax,%xmm0
movss  %xmm0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
movss  -0x8(%rbp),%xmm0
cvtsi2ss %rax,%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    116d <rand_float+0x5d>
movss  0xe9d(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
cvttss2si -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_float>:
sub    $0x18,%rsp
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2ss %rax,%xmm0
movaps %xmm0,(%rsp)
xor    %eax,%eax
call   1030 <rand@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
movaps (%rsp),%xmm1
divss  %xmm0,%xmm1
movaps %xmm1,(%rsp)
xor    %eax,%eax
call   1030 <rand@plt>
test   $0x1,%al
je     1150 <rand_float+0x40>
movaps (%rsp),%xmm0
jmp    115b <rand_float+0x4b>
movaps (%rsp),%xmm0
xorps  0xea5(%rip),%xmm0
cvttss2si %xmm0,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @rand_float() {
%1 = alloca float
%2 = call i64 (...) @rand()
%3 = sitofp i64 %2 to float
%4 = call i64 (...) @rand()
%5 = sitofp i64 %4 to float
%6 = fdiv float %3, %5
store float %6, float* %1
%7 = call i64 (...) @rand()
%8 = trunc i64 %7 to i32
%9 = srem i32 %8, 2
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %0
%12 = load float, float* %1
%13 = fmul float %12, -1.000000e+00
store float %13, float* %1
br label %14
14: ; preds = %11, %0
%15 = load float, float* %1
%16 = fptosi float %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @rand_float() {
%1 = tail call i64 (...) @rand()
%2 = sitofp i64 %1 to float
%3 = tail call i64 (...) @rand()
%4 = sitofp i64 %3 to float
%5 = fdiv float %2, %4
%6 = tail call i64 (...) @rand()
%7 = and i64 %6, 1
%8 = icmp eq i64 %7, 0
%9 = fneg float %5
%10 = select i1 %8, float %9, float %5
%11 = fptosi float %10 to i32
ret i32 %11
}
/* Type definitions */
struct nl_cache {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ nl_cache_put(struct nl_cache *);
void _nl_auto_nl_cache_fcn(struct nl_cache **v) {
  if (*v)
    nl_cache_put(*v);
}


x86 assembly (clang, -O0):
<_nl_auto_nl_cache_fcn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     1136 <_nl_auto_nl_cache_fcn+0x26>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <nl_cache_put@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_nl_auto_nl_cache_fcn>:
mov    (%rdi),%rdi
test   %rdi,%rdi
je     111d <_nl_auto_nl_cache_fcn+0xd>
jmp    1030 <nl_cache_put@plt>
ret

LLVM IR (-O0):
%struct.nl_cache = type { i32 }
define void @_nl_auto_nl_cache_fcn(%struct.nl_cache** %0) {
%2 = alloca %struct.nl_cache**
store %struct.nl_cache** %0, %struct.nl_cache*** %2
%3 = load %struct.nl_cache**, %struct.nl_cache*** %2
%4 = load %struct.nl_cache*, %struct.nl_cache** %3
%5 = icmp ne %struct.nl_cache* %4, null
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load %struct.nl_cache**, %struct.nl_cache*** %2
%8 = load %struct.nl_cache*, %struct.nl_cache** %7
%9 = call i32 @nl_cache_put(%struct.nl_cache* %8)
br label %10
10: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
%struct.nl_cache = type { i32 }
define void @_nl_auto_nl_cache_fcn(%struct.nl_cache** nocapture %0) {
%2 = load %struct.nl_cache*, %struct.nl_cache** %0
%3 = icmp eq %struct.nl_cache* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @nl_cache_put(%struct.nl_cache* %2)
br label %6
6: ; preds = %4, %1
ret void
}
/* Type definitions */
struct in_addr {
  int /*<<< orphan*/ s_addr;
};

/* Variables and functions */
int /*<<< orphan*/ cidr_get_mask(unsigned int);
char *inet_ntoa(struct in_addr);
char *cidr_get_quad_mask(unsigned int maskbits) {
  struct in_addr addr;
  addr.s_addr = cidr_get_mask(maskbits);
  return inet_ntoa(addr);
}


x86 assembly (clang, -O0):
<cidr_get_quad_mask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <cidr_get_mask@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <inet_ntoa@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cidr_get_quad_mask>:
push   %rax
call   1040 <cidr_get_mask@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <inet_ntoa@plt>

LLVM IR (-O0):
%struct.in_addr = type { i32 }
define i8* @cidr_get_quad_mask(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.in_addr
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @cidr_get_mask(i32 %4)
%6 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %3, i32 0, i32 0
store i32 %5, i32* %6
%7 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %3, i32 0, i32 0
%8 = load i32, i32* %7
%9 = call i8* @inet_ntoa(i32 %8)
ret i8* %9
}

LLVM IR (-O2):
define i8* @cidr_get_quad_mask(i32 %0) {
%2 = tail call i32 @cidr_get_mask(i32 %0)
%3 = tail call i8* @inet_ntoa(i32 %2)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_cvolume_dec() {
  printf("NOT IMPLEMENTED:"
         "pa_cvolume_dec"
         "\n");
}


x86 assembly (clang, -O0):
<pa_cvolume_dec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_cvolume_dec>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"NOT IMPLEMENTED:pa_cvolume_dec\0A\00"
define i32 @pa_cvolume_dec() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [31 x i8] c"NOT IMPLEMENTED:pa_cvolume_dec\00"
define i32 @pa_cvolume_dec() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
__attribute__((no, noclone)) int foo(int *x, int y) {
  int z = *x;
  if (y > z && y <= 16)
    while (y > z)
      z *= 2;
  return z;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    114e <foo+0x4e>
cmpl   $0x10,-0xc(%rbp)
jg     114e <foo+0x4e>
jmp    112f <foo+0x2f>
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    1149 <foo+0x49>
mov    -0x10(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    112f <foo+0x2f>
jmp    114e <foo+0x4e>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    (%rdi),%ecx
cmp    $0x10,%esi
jg     111a <foo+0x1a>
cmp    %esi,%ecx
jge    111a <foo+0x1a>
nopl   0x0(%rax,%rax,1)
mov    %ecx,%eax
lea    (%rax,%rax,1),%ecx
cmp    %esi,%eax
jl     1110 <foo+0x10>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = icmp sgt i32 %8, %9
br i1 %10, label %11, label %23
11: ; preds = %2
%12 = load i32, i32* %4
%13 = icmp sle i32 %12, 16
br i1 %13, label %14, label %23
14: ; preds = %11
br label %15
15: ; preds = %19, %14
%16 = load i32, i32* %4
%17 = load i32, i32* %5
%18 = icmp sgt i32 %16, %17
br i1 %18, label %19, label %22
19: ; preds = %15
%20 = load i32, i32* %5
%21 = mul nsw i32 %20, 2
store i32 %21, i32* %5
br label %15
22: ; preds = %15
br label %23
23: ; preds = %22, %11, %2
%24 = load i32, i32* %5
ret i32 %24
}

LLVM IR (-O2):
define i32 @foo(i32* nocapture %0, i32 %1) {
%3 = load i32, i32* %0
%4 = icmp slt i32 %3, %1
%5 = icmp slt i32 %1, 17
%6 = and i1 %5, %4
br i1 %6, label %7, label %11
7: ; preds = %2, %7
%8 = phi i32 [ %10, %7 ], [ %3, %2 ]
%9 = icmp slt i32 %8, %1
%10 = shl nsw i32 %8, 1
br i1 %9, label %7, label %11
11: ; preds = %7, %2
%12 = phi i32 [ %3, %2 ], [ %8, %7 ]
ret i32 %12
}
double Neg(double a, double b) { return -a; }


x86 assembly (clang, -O0):
<Neg>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Neg>:
xorps  0xef9(%rip),%xmm0
ret

LLVM IR (-O0):
define double @Neg(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = fneg double %5
ret double %6
}

LLVM IR (-O2):
define double @Neg(double %0, double %1) {
%3 = fneg double %0
ret double %3
}
int main(void) {
  double input = 21.0;
  double result;
  result = input + input;
  if (result > 41.9 && result < 42.1) {
    return 42;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movsd  0xef5(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  0xecc(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    115d <main+0x5d>
movsd  0xeca(%rip),%xmm0
ucomisd -0x18(%rbp),%xmm0
jbe    115d <main+0x5d>
movl   $0x2a,-0x4(%rbp)
jmp    1164 <main+0x64>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca double
store i32 0, i32* %1
store double 2.100000e+01, double* %2
%4 = load double, double* %2
%5 = load double, double* %2
%6 = fadd double %4, %5
store double %6, double* %3
%7 = load double, double* %3
%8 = fcmp ogt double %7, 4.190000e+01
br i1 %8, label %9, label %13
9: ; preds = %0
%10 = load double, double* %3
%11 = fcmp olt double %10, 4.210000e+01
br i1 %11, label %12, label %13
12: ; preds = %9
store i32 42, i32* %1
br label %14
13: ; preds = %9, %0
store i32 0, i32* %1
br label %14
14: ; preds = %13, %12
%15 = load i32, i32* %1
ret i32 %15
}

LLVM IR (-O2):
define i32 @main() {
ret i32 42
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_help(void) {
  printf("Please check the input\n");
  printf("1, overall workload with units of ms. Normally 16000.\n");
  printf("2, number of threads. Not a must, default is 8. It should be set "
         "when conflict rate is not 0\n");
}


x86 assembly (clang, -O0):
<print_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xef1(%rip),%rdi
call   1030 <printf@plt>
lea    0xf1c(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_help>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xef3(%rip),%rdi
call   1030 <puts@plt>
lea    0xf1d(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"Please check the input\0A\00"
@.str.1 = [55 x i8] c"1, overall workload with units of ms. Normally 16000.\0A\00"
@.str.2 = [94 x i8] c"2, number of threads. Not a must, default is 8. It should be set when conflict rate is not 0\0A\00"
define void @print_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([94 x i8], [94 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [23 x i8] c"Please check the input\00"
@str.3 = [54 x i8] c"1, overall workload with units of ms. Normally 16000.\00"
@str.4 = [93 x i8] c"2, number of threads. Not a must, default is 8. It should be set when conflict rate is not 0\00"
define void @print_help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([54 x i8], [54 x i8]* @str.3, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([93 x i8], [93 x i8]* @str.4, i64 0, i64 0))
ret void
}
int trueFiveEighths(int x) {
  int storebottom = x & 7;
  int divbyeight = x >> 3;
  int multbyfive = (divbyeight << 2) + divbyeight;
  int bottomup = (storebottom << 2) + storebottom;
  int biasedbottom = bottomup + (7 & (x >> 31));
  int fullsize = (biasedbottom >> 3) + multbyfive;
  return fullsize;
}


x86 assembly (clang, -O0):
<trueFiveEighths>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x7,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x3,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x2,%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x2,%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x1f,%ecx
and    $0x7,%ecx
add    %ecx,%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
sar    $0x3,%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<trueFiveEighths>:
mov    %edi,%eax
and    $0x7,%eax
mov    %edi,%ecx
sar    $0x3,%ecx
lea    (%rcx,%rcx,4),%ecx
lea    (%rax,%rax,4),%eax
sar    $0x1f,%edi
and    $0x7,%edi
add    %edi,%eax
shr    $0x3,%eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @trueFiveEighths(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %2
%9 = load i32, i32* %2
%10 = and i32 %9, 7
store i32 %10, i32* %3
%11 = load i32, i32* %2
%12 = ashr i32 %11, 3
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = shl i32 %13, 2
%15 = load i32, i32* %4
%16 = add nsw i32 %14, %15
store i32 %16, i32* %5
%17 = load i32, i32* %3
%18 = shl i32 %17, 2
%19 = load i32, i32* %3
%20 = add nsw i32 %18, %19
store i32 %20, i32* %6
%21 = load i32, i32* %6
%22 = load i32, i32* %2
%23 = ashr i32 %22, 31
%24 = and i32 7, %23
%25 = add nsw i32 %21, %24
store i32 %25, i32* %7
%26 = load i32, i32* %7
%27 = ashr i32 %26, 3
%28 = load i32, i32* %5
%29 = add nsw i32 %27, %28
store i32 %29, i32* %8
%30 = load i32, i32* %8
ret i32 %30
}

LLVM IR (-O2):
define i32 @trueFiveEighths(i32 %0) {
%2 = and i32 %0, 7
%3 = ashr i32 %0, 3
%4 = mul nsw i32 %3, 5
%5 = mul nuw nsw i32 %2, 5
%6 = icmp slt i32 %0, 0
%7 = select i1 %6, i32 7, i32 0
%8 = add nuw nsw i32 %5, %7
%9 = lshr i32 %8, 3
%10 = add nsw i32 %9, %4
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, char *);
void logMsg(char *msg) {
  char log_str[119];
  sprintf(log_str, "Msg in: %s", msg);
  return;
}


x86 assembly (clang, -O0):
<logMsg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x80(%rbp),%rdi
mov    -0x8(%rbp),%rdx
lea    0xed2(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<logMsg>:
sub    $0x78,%rsp
mov    %rdi,%rdx
lea    0xee2(%rip),%rsi
mov    %rsp,%rdi
call   1030 <sprintf@plt>
add    $0x78,%rsp
ret

LLVM IR (-O0):
@.str = [11 x i8] c"Msg in: %s\00"
define void @logMsg(i8* %0) {
%2 = alloca i8*
%3 = alloca [119 x i8]
store i8* %0, i8** %2
%4 = getelementptr inbounds [119 x i8], [119 x i8]* %3, i64 0, i64 0
%5 = load i8*, i8** %2
%6 = call i32 @sprintf(i8* %4, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"Msg in: %s\00"
define void @logMsg(i8* %0) {
%2 = alloca [119 x i8]
%3 = getelementptr inbounds [119 x i8], [119 x i8]* %2, i64 0, i64 0
%4 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ f1();
void __attribute__((fastcall)) f4(void) { f1(); }


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <f1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
xor    %eax,%eax
jmp    1030 <f1@plt>

LLVM IR (-O0):
define void @f4() {
%1 = call i32 (...) @f1()
ret void
}

LLVM IR (-O2):
define void @f4() {
%1 = tail call i32 (...) @f1()
ret void
}
/* Variables and functions */
int system(const char *s) {
  int rc;
  if (s == NULL)
    return -1;
  return rc;
}


x86 assembly (clang, -O0):
<system>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    111f <system+0x1f>
movl   $0xffffffff,-0x4(%rbp)
jmp    1125 <system+0x25>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<system>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @system(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 -1, i32* %2
br label %10
8: ; preds = %1
%9 = load i32, i32* %4
store i32 %9, i32* %2
br label %10
10: ; preds = %8, %7
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @system(i8* nocapture readnone %0) {
ret i32 -1
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_attr_t;

/* Variables and functions */
int pthread_attr_setschedpolicy(int /*<<< orphan*/ *, int);
int my_pthread_attr_setschedpolicy(pthread_attr_t *__attr, int policy) {
  pthread_attr_t *realattr = (pthread_attr_t *)*(unsigned int *)__attr;
  return pthread_attr_setschedpolicy(realattr, policy);
}


x86 assembly (clang, -O0):
<my_pthread_attr_setschedpolicy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <pthread_attr_setschedpolicy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_pthread_attr_setschedpolicy>:
mov    (%rdi),%edi
jmp    1030 <pthread_attr_setschedpolicy@plt>

LLVM IR (-O0):
define i32 @my_pthread_attr_setschedpolicy(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32*
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store i32* %9, i32** %5
%10 = load i32*, i32** %5
%11 = load i32, i32* %4
%12 = call i32 @pthread_attr_setschedpolicy(i32* %10, i32 %11)
ret i32 %12
}

LLVM IR (-O2):
define i32 @my_pthread_attr_setschedpolicy(i32* nocapture %0, i32 %1) {
%3 = load i32, i32* %0
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = tail call i32 @pthread_attr_setschedpolicy(i32* %5, i32 %1)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0x83() {
  Assert_real((isupper(131) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              660, ("isupper should be 0 for 0x83"));
}


x86 assembly (clang, -O0):
<t_isupper_0x83>:
push   %rbp
mov    %rsp,%rbp
mov    $0x83,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x294,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0x83>:
push   %rax
mov    $0x83,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x294,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0x83\00"
define void @t_isupper_0x83() {
%1 = call i64 @isupper(i32 131)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 660, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0x83\00"
define void @t_isupper_0x83() {
%1 = tail call i64 @isupper(i32 131)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 660, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pwm_release_brightness();
void PulseState_leave() { pwm_release_brightness(); }


x86 assembly (clang, -O0):
<PulseState_leave>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <pwm_release_brightness@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PulseState_leave>:
xor    %eax,%eax
jmp    1030 <pwm_release_brightness@plt>

LLVM IR (-O0):
define void @PulseState_leave() {
%1 = call i32 (...) @pwm_release_brightness()
ret void
}

LLVM IR (-O2):
define void @PulseState_leave() {
%1 = tail call i32 (...) @pwm_release_brightness()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ add_nodename_to_filename(char *, int);
void add_url_name(char *nodename, int href) {
  add_nodename_to_filename(nodename, href);
}


x86 assembly (clang, -O0):
<add_url_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <add_nodename_to_filename@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_url_name>:
jmp    1030 <add_nodename_to_filename@plt>

LLVM IR (-O0):
define void @add_url_name(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @add_nodename_to_filename(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @add_url_name(i8* %0, i32 %1) {
%3 = tail call i32 @add_nodename_to_filename(i8* %0, i32 %1)
ret void
}
int twoToPow(int power) {
  int i, ans = 1;
  for (i = 0; i < power; i++)
    ans *= 2;
  return ans;
}


x86 assembly (clang, -O0):
<twoToPow>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0xc(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1138 <twoToPow+0x38>
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1115 <twoToPow+0x15>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<twoToPow>:
test   %edi,%edi
jle    1118 <twoToPow+0x18>
lea    -0x1(%rdi),%eax
mov    %edi,%ecx
and    $0x7,%ecx
cmp    $0x7,%eax
jae    111e <twoToPow+0x1e>
mov    $0x1,%eax
jmp    1138 <twoToPow+0x38>
mov    $0x1,%eax
ret
and    $0xfffffff8,%edi
mov    $0x1,%eax
cs nopw 0x0(%rax,%rax,1)
shl    $0x8,%eax
add    $0xfffffff8,%edi
jne    1130 <twoToPow+0x30>
test   %ecx,%ecx
je     1147 <twoToPow+0x47>
nopl   0x0(%rax)
add    %eax,%eax
add    $0xffffffff,%ecx
jne    1140 <twoToPow+0x40>
ret

LLVM IR (-O0):
define i32 @twoToPow(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %12, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i32, i32* %4
%11 = mul nsw i32 %10, 2
store i32 %11, i32* %4
br label %12
12: ; preds = %9
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %5
15: ; preds = %5
%16 = load i32, i32* %4
ret i32 %16
}

LLVM IR (-O2):
define i32 @twoToPow(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %25
3: ; preds = %1
%4 = add i32 %0, -1
%5 = and i32 %0, 7
%6 = icmp ult i32 %4, 7
br i1 %6, label %15, label %7
7: ; preds = %3
%8 = and i32 %0, -8
br label %9
9: ; preds = %9, %7
%10 = phi i32 [ 1, %7 ], [ %12, %9 ]
%11 = phi i32 [ 0, %7 ], [ %13, %9 ]
%12 = shl i32 %10, 8
%13 = add i32 %11, 8
%14 = icmp eq i32 %13, %8
br i1 %14, label %15, label %9
15: ; preds = %9, %3
%16 = phi i32 [ undef, %3 ], [ %12, %9 ]
%17 = phi i32 [ 1, %3 ], [ %12, %9 ]
%18 = icmp eq i32 %5, 0
br i1 %18, label %25, label %19
19: ; preds = %15, %19
%20 = phi i32 [ %22, %19 ], [ %17, %15 ]
%21 = phi i32 [ %23, %19 ], [ 0, %15 ]
%22 = shl nsw i32 %20, 1
%23 = add i32 %21, 1
%24 = icmp eq i32 %23, %5
br i1 %24, label %25, label %19
25: ; preds = %15, %19, %1
%26 = phi i32 [ 1, %1 ], [ %16, %15 ], [ %22, %19 ]
ret i32 %26
}
float rnd6(float y) {
  int iy;
  iy = ((int)(y + 2.999) + 12) / 6 * 6 - 12;
  return iy - y;
}


x86 assembly (clang, -O0):
<rnd6>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xee6(%rip),%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
add    $0xc,%eax
mov    $0x6,%ecx
cltd
idiv   %ecx
imul   $0x6,%eax,%eax
sub    $0xc,%eax
mov    %eax,-0x8(%rbp)
cvtsi2ssl -0x8(%rbp),%xmm0
subss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<rnd6>:
cvtss2sd %xmm0,%xmm1
addsd  0xef4(%rip),%xmm1
cvttsd2si %xmm1,%eax
add    $0xc,%eax
cltq
imul   $0x2aaaaaab,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
shr    $0x20,%rax
add    %ecx,%eax
lea    (%rax,%rax,2),%eax
add    %eax,%eax
add    $0xfffffff4,%eax
xorps  %xmm1,%xmm1
cvtsi2ss %eax,%xmm1
subss  %xmm0,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @rnd6(float %0) {
%2 = alloca float
%3 = alloca i32
store float %0, float* %2
%4 = load float, float* %2
%5 = fpext float %4 to double
%6 = fadd double %5, 2.999000e+00
%7 = fptosi double %6 to i32
%8 = add nsw i32 %7, 12
%9 = sdiv i32 %8, 6
%10 = mul nsw i32 %9, 6
%11 = sub nsw i32 %10, 12
store i32 %11, i32* %3
%12 = load i32, i32* %3
%13 = sitofp i32 %12 to float
%14 = load float, float* %2
%15 = fsub float %13, %14
ret float %15
}

LLVM IR (-O2):
define float @rnd6(float %0) {
%2 = fpext float %0 to double
%3 = fadd double %2, 2.999000e+00
%4 = fptosi double %3 to i32
%5 = add nsw i32 %4, 12
%6 = srem i32 %5, 6
%7 = sub i32 %4, %6
%8 = sitofp i32 %7 to float
%9 = fsub float %8, %0
ret float %9
}