#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
scalar_t__ RdRand_isSupported();
int rdrand_64(uint64_t *x, int retry) {
  if (RdRand_isSupported()) {
    if (retry) {
      int i;
      for (i = 0; i < 10; i++) {
        if (({
              unsigned char err;
              asm volatile(
                  ".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc %1"
                  : "=a"(*x), "=qm"(err));
              err;
            }))
          return 1;
      }
      return -1;
    } else {
      if (({
            unsigned char err;
            asm volatile(
                ".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc %1"
                : "=a"(*x), "=qm"(err));
            err;
          }))
        return 1;
      else
        return -1;
    }
  } else {
    return -3;
  }
}


x86 assembly (clang, -O0):
<rdrand_64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    $0x0,%al
call   1030 <RdRand_isSupported@plt>
cmp    $0x0,%rax
je     11de <rdrand_64+0xce>
cmpl   $0x0,-0x14(%rbp)
je     119e <rdrand_64+0x8e>
movl   $0x0,-0x18(%rbp)
cmpl   $0xa,-0x18(%rbp)
jge    1192 <rdrand_64+0x82>
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
rdrand %rax
setb   -0x19(%rbp)
mov    %eax,%ecx
mov    -0x28(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x19(%rbp),%al
mov    %al,-0x1a(%rbp)
cmpb   $0x0,-0x1a(%rbp)
je     117f <rdrand_64+0x6f>
movl   $0x1,-0x4(%rbp)
jmp    11e5 <rdrand_64+0xd5>
jmp    1184 <rdrand_64+0x74>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1141 <rdrand_64+0x31>
movl   $0xffffffff,-0x4(%rbp)
jmp    11e5 <rdrand_64+0xd5>
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
rdrand %rax
setb   -0x1b(%rbp)
mov    %eax,%ecx
mov    -0x30(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x1b(%rbp),%al
mov    %al,-0x1c(%rbp)
cmpb   $0x0,-0x1c(%rbp)
je     11d2 <rdrand_64+0xc2>
movl   $0x1,-0x4(%rbp)
jmp    11e5 <rdrand_64+0xd5>
movl   $0xffffffff,-0x4(%rbp)
jmp    11e5 <rdrand_64+0xd5>
movl   $0xfffffffd,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rdrand_64>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <RdRand_isSupported@plt>
test   %rax,%rax
je     11f9 <rdrand_64+0xe9>
test   %ebp,%ebp
je     1200 <rdrand_64+0xf0>
rdrand %rax
setb   0x6(%rsp)
mov    %eax,(%rbx)
cmpb   $0x0,0x6(%rsp)
mov    $0x1,%ecx
jne    1215 <rdrand_64+0x105>
rdrand %rax
setb   0x6(%rsp)
mov    %eax,(%rbx)
cmpb   $0x0,0x6(%rsp)
jne    1215 <rdrand_64+0x105>
rdrand %rax
setb   0x6(%rsp)
mov    %eax,(%rbx)
cmpb   $0x0,0x6(%rsp)
jne    1215 <rdrand_64+0x105>
rdrand %rax
setb   0x6(%rsp)
mov    %eax,(%rbx)
cmpb   $0x0,0x6(%rsp)
jne    1215 <rdrand_64+0x105>
rdrand %rax
setb   0x6(%rsp)
mov    %eax,(%rbx)
cmpb   $0x0,0x6(%rsp)
jne    1215 <rdrand_64+0x105>
rdrand %rax
setb   0x6(%rsp)
mov    %eax,(%rbx)
cmpb   $0x0,0x6(%rsp)
jne    1215 <rdrand_64+0x105>
rdrand %rax
setb   0x6(%rsp)
mov    %eax,(%rbx)
cmpb   $0x0,0x6(%rsp)
jne    1215 <rdrand_64+0x105>
rdrand %rax
setb   0x6(%rsp)
mov    %eax,(%rbx)
cmpb   $0x0,0x6(%rsp)
jne    1215 <rdrand_64+0x105>
rdrand %rax
setb   0x6(%rsp)
mov    %eax,(%rbx)
cmpb   $0x0,0x6(%rsp)
jne    1215 <rdrand_64+0x105>
rdrand %rax
setb   0x6(%rsp)
mov    %eax,(%rbx)
cmpb   $0x1,0x6(%rsp)
jmp    1210 <rdrand_64+0x100>
mov    $0xfffffffd,%ecx
jmp    1215 <rdrand_64+0x105>
rdrand %rax
setb   0x7(%rsp)
mov    %eax,(%rbx)
cmpb   $0x1,0x7(%rsp)
sbb    %ecx,%ecx
or     $0x1,%ecx
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @rdrand_64(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8
store i32* %0, i32** %4
store i32 %1, i32* %5
%11 = call i64 (...) @RdRand_isSupported()
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %40
13: ; preds = %2
%14 = load i32, i32* %5
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %32
16: ; preds = %13
store i32 0, i32* %6
br label %17
17: ; preds = %28, %16
%18 = load i32, i32* %6
%19 = icmp slt i32 %18, 10
br i1 %19, label %20, label %31
20: ; preds = %17
%21 = load i32*, i32** %4
%22 = call i32 asm sideeffect ".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc $1", "={ax},=*qm,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %7)
store i32 %22, i32* %21
%23 = load i8, i8* %7
store i8 %23, i8* %8
%24 = load i8, i8* %8
%25 = icmp ne i8 %24, 0
br i1 %25, label %26, label %27
26: ; preds = %20
store i32 1, i32* %3
br label %41
27: ; preds = %20
br label %28
28: ; preds = %27
%29 = load i32, i32* %6
%30 = add nsw i32 %29, 1
store i32 %30, i32* %6
br label %17
31: ; preds = %17
store i32 -1, i32* %3
br label %41
32: ; preds = %13
%33 = load i32*, i32** %4
%34 = call i32 asm sideeffect ".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc $1", "={ax},=*qm,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %9)
store i32 %34, i32* %33
%35 = load i8, i8* %9
store i8 %35, i8* %10
%36 = load i8, i8* %10
%37 = icmp ne i8 %36, 0
br i1 %37, label %38, label %39
38: ; preds = %32
store i32 1, i32* %3
br label %41
39: ; preds = %32
store i32 -1, i32* %3
br label %41
40: ; preds = %2
store i32 -3, i32* %3
br label %41
41: ; preds = %40, %39, %38, %31, %26
%42 = load i32, i32* %3
ret i32 %42
}

LLVM IR (-O2):
define i32 @rdrand_64(i32* nocapture writeonly %0, i32 %1) {
%3 = alloca i8
%4 = alloca i8
%5 = tail call i64 (...) @RdRand_isSupported()
%6 = icmp eq i64 %5, 0
br i1 %6, label %55, label %7
7: ; preds = %2
%8 = icmp eq i32 %1, 0
br i1 %8, label %50, label %9
9: ; preds = %7
%10 = call i32 asm sideeffect ".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc $1", "={ax},=*qm,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %3)
store i32 %10, i32* %0
%11 = load i8, i8* %3
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %55
13: ; preds = %9
%14 = call i32 asm sideeffect ".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc $1", "={ax},=*qm,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %3)
store i32 %14, i32* %0
%15 = load i8, i8* %3
%16 = icmp eq i8 %15, 0
br i1 %16, label %17, label %55
17: ; preds = %13
%18 = call i32 asm sideeffect ".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc $1", "={ax},=*qm,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %3)
store i32 %18, i32* %0
%19 = load i8, i8* %3
%20 = icmp eq i8 %19, 0
br i1 %20, label %21, label %55
21: ; preds = %17
%22 = call i32 asm sideeffect ".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc $1", "={ax},=*qm,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %3)
store i32 %22, i32* %0
%23 = load i8, i8* %3
%24 = icmp eq i8 %23, 0
br i1 %24, label %25, label %55
25: ; preds = %21
%26 = call i32 asm sideeffect ".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc $1", "={ax},=*qm,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %3)
store i32 %26, i32* %0
%27 = load i8, i8* %3
%28 = icmp eq i8 %27, 0
br i1 %28, label %29, label %55
29: ; preds = %25
%30 = call i32 asm sideeffect ".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc $1", "={ax},=*qm,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %3)
store i32 %30, i32* %0
%31 = load i8, i8* %3
%32 = icmp eq i8 %31, 0
br i1 %32, label %33, label %55
33: ; preds = %29
%34 = call i32 asm sideeffect ".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc $1", "={ax},=*qm,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %3)
store i32 %34, i32* %0
%35 = load i8, i8* %3
%36 = icmp eq i8 %35, 0
br i1 %36, label %37, label %55
37: ; preds = %33
%38 = call i32 asm sideeffect ".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc $1", "={ax},=*qm,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %3)
store i32 %38, i32* %0
%39 = load i8, i8* %3
%40 = icmp eq i8 %39, 0
br i1 %40, label %41, label %55
41: ; preds = %37
%42 = call i32 asm sideeffect ".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc $1", "={ax},=*qm,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %3)
store i32 %42, i32* %0
%43 = load i8, i8* %3
%44 = icmp eq i8 %43, 0
br i1 %44, label %45, label %55
45: ; preds = %41
%46 = call i32 asm sideeffect ".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc $1", "={ax},=*qm,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %3)
store i32 %46, i32* %0
%47 = load i8, i8* %3
%48 = icmp eq i8 %47, 0
%49 = select i1 %48, i32 -1, i32 1
br label %55
50: ; preds = %7
%51 = call i32 asm sideeffect ".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc $1", "={ax},=*qm,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %4)
store i32 %51, i32* %0
%52 = load i8, i8* %4
%53 = icmp eq i8 %52, 0
%54 = select i1 %53, i32 -1, i32 1
br label %55
55: ; preds = %45, %9, %13, %17, %21, %25, %29, %33, %37, %41, %2, %50
%56 = phi i32 [ %54, %50 ], [ -3, %2 ], [ 1, %9 ], [ 1, %13 ], [ 1, %17 ], [ 1, %21 ], [ 1, %25 ], [ 1, %29 ], [ 1, %33 ], [ 1, %37 ], [ 1, %41 ], [ %49, %45 ]
ret i32 %56
}