void arr_float_step(float *pArr, float fOffset, float fIncr,
                    unsigned long int num) {
  unsigned long int i;
  for (i = 0; i < num; i++) {
    pArr[i] = i * fIncr + fOffset;
  }
}


x86 assembly (clang, -O0):
<arr_float_step>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  %xmm1,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    119e <arr_float_step+0x9e>
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
shr    %rdx
mov    %eax,%ecx
and    $0x1,%ecx
or     %rdx,%rcx
cvtsi2ss %rcx,%xmm0
addss  %xmm0,%xmm0
cvtsi2ss %rax,%xmm1
movss  %xmm1,-0x28(%rbp)
test   %rax,%rax
movss  %xmm0,-0x24(%rbp)
js     1169 <arr_float_step+0x69>
movss  -0x28(%rbp),%xmm0
movss  %xmm0,-0x24(%rbp)
movss  -0x24(%rbp),%xmm0
movss  -0x10(%rbp),%xmm2
movss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
mov    -0x8(%rbp),%rax
mov    -0x20(%rbp),%rcx
movss  %xmm0,(%rax,%rcx,4)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    111e <arr_float_step+0x1e>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arr_float_step>:
test   %rsi,%rsi
je     129d <arr_float_step+0x19d>
cmp    $0x4,%rsi
jae    1117 <arr_float_step+0x17>
xor    %r11d,%r11d
jmp    12bf <arr_float_step+0x1bf>
mov    %rsi,%r11
and    $0xfffffffffffffffc,%r11
movaps %xmm1,%xmm12
shufps $0x0,%xmm1,%xmm12
movaps %xmm0,%xmm13
shufps $0x0,%xmm0,%xmm13
lea    -0x4(%r11),%rcx
mov    %rcx,%r9
shr    $0x2,%r9
add    $0x1,%r9
mov    %r9d,%r8d
and    $0x3,%r8d
cmp    $0xc,%rcx
jae    12e1 <arr_float_step+0x1e1>
movdqa 0xea8(%rip),%xmm4
movdqa 0xeb0(%rip),%xmm5
xor    %r10d,%r10d
test   %r8,%r8
je     1298 <arr_float_step+0x198>
lea    (%rdi,%r10,4),%r9
shl    $0x4,%r8
xor    %edx,%edx
movdqa 0xea1(%rip),%xmm8
jmp    11c5 <arr_float_step+0xc5>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xorps  %xmm6,%xmm6
cvtsi2ss %rcx,%xmm6
unpcklps %xmm6,%xmm3
unpcklps %xmm2,%xmm7
movlhps %xmm3,%xmm7
mulps  %xmm12,%xmm7
addps  %xmm13,%xmm7
movups %xmm7,(%r9,%rdx,1)
paddq  %xmm8,%xmm5
paddq  %xmm8,%xmm4
add    $0x10,%rdx
cmp    %rdx,%r8
je     1298 <arr_float_step+0x198>
movq   %xmm5,%rcx
test   %rcx,%rcx
js     11e0 <arr_float_step+0xe0>
xorps  %xmm7,%xmm7
cvtsi2ss %rcx,%xmm7
jmp    11f8 <arr_float_step+0xf8>
nopl   0x0(%rax)
mov    %rcx,%rax
shr    %rax
and    $0x1,%ecx
or     %rax,%rcx
xorps  %xmm7,%xmm7
cvtsi2ss %rcx,%xmm7
addss  %xmm7,%xmm7
pshufd $0xee,%xmm5,%xmm2
movq   %xmm2,%rcx
test   %rcx,%rcx
js     1220 <arr_float_step+0x120>
xorps  %xmm2,%xmm2
cvtsi2ss %rcx,%xmm2
jmp    1238 <arr_float_step+0x138>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %rcx,%rax
shr    %rax
and    $0x1,%ecx
or     %rax,%rcx
xorps  %xmm2,%xmm2
cvtsi2ss %rcx,%xmm2
addss  %xmm2,%xmm2
movq   %xmm4,%rcx
test   %rcx,%rcx
js     1250 <arr_float_step+0x150>
xorps  %xmm3,%xmm3
cvtsi2ss %rcx,%xmm3
jmp    1268 <arr_float_step+0x168>
nopl   0x0(%rax)
mov    %rcx,%rax
shr    %rax
and    $0x1,%ecx
or     %rax,%rcx
xorps  %xmm3,%xmm3
cvtsi2ss %rcx,%xmm3
addss  %xmm3,%xmm3
pshufd $0xee,%xmm4,%xmm6
movq   %xmm6,%rcx
test   %rcx,%rcx
jns    1190 <arr_float_step+0x90>
mov    %rcx,%rax
shr    %rax
and    $0x1,%ecx
or     %rax,%rcx
xorps  %xmm6,%xmm6
cvtsi2ss %rcx,%xmm6
addss  %xmm6,%xmm6
jmp    1198 <arr_float_step+0x98>
cmp    %rsi,%r11
jne    12bf <arr_float_step+0x1bf>
ret
xchg   %ax,%ax
xorps  %xmm2,%xmm2
cvtsi2ss %r11,%xmm2
mulss  %xmm1,%xmm2
addss  %xmm0,%xmm2
movss  %xmm2,(%rdi,%r11,4)
add    $0x1,%r11
cmp    %r11,%rsi
je     129d <arr_float_step+0x19d>
test   %r11,%r11
jns    12a0 <arr_float_step+0x1a0>
mov    %r11,%rax
shr    %rax
mov    %r11d,%ecx
and    $0x1,%ecx
or     %rax,%rcx
xorps  %xmm2,%xmm2
cvtsi2ss %rcx,%xmm2
addss  %xmm2,%xmm2
jmp    12a8 <arr_float_step+0x1a8>
and    $0xfffffffffffffffc,%r9
movdqa 0xd13(%rip),%xmm4
movdqa 0xd1b(%rip),%xmm5
xor    %r10d,%r10d
movdqa 0xd1f(%rip),%xmm8
movdqa 0xd26(%rip),%xmm9
movdqa 0xd2d(%rip),%xmm10
movdqa 0xd34(%rip),%xmm11
jmp    1357 <arr_float_step+0x257>
xchg   %ax,%ax
xorps  %xmm3,%xmm3
cvtsi2ss %rdx,%xmm3
unpcklps %xmm3,%xmm2
unpcklps %xmm7,%xmm6
movlhps %xmm2,%xmm6
mulps  %xmm12,%xmm6
addps  %xmm13,%xmm6
movups %xmm6,0x30(%rdi,%r10,4)
add    $0x10,%r10
paddq  %xmm11,%xmm5
paddq  %xmm11,%xmm4
add    $0xfffffffffffffffc,%r9
je     1163 <arr_float_step+0x63>
movq   %xmm5,%rdx
test   %rdx,%rdx
js     1370 <arr_float_step+0x270>
xorps  %xmm6,%xmm6
cvtsi2ss %rdx,%xmm6
jmp    1388 <arr_float_step+0x288>
nopl   0x0(%rax,%rax,1)
mov    %rdx,%rcx
shr    %rcx
and    $0x1,%edx
or     %rcx,%rdx
xorps  %xmm6,%xmm6
cvtsi2ss %rdx,%xmm6
addss  %xmm6,%xmm6
pshufd $0xee,%xmm5,%xmm2
movq   %xmm2,%rdx
test   %rdx,%rdx
js     13b0 <arr_float_step+0x2b0>
xorps  %xmm7,%xmm7
cvtsi2ss %rdx,%xmm7
jmp    13c8 <arr_float_step+0x2c8>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %rdx,%rcx
shr    %rcx
and    $0x1,%edx
or     %rcx,%rdx
xorps  %xmm7,%xmm7
cvtsi2ss %rdx,%xmm7
addss  %xmm7,%xmm7
movq   %xmm4,%rdx
test   %rdx,%rdx
js     13e0 <arr_float_step+0x2e0>
xorps  %xmm2,%xmm2
cvtsi2ss %rdx,%xmm2
jmp    13f8 <arr_float_step+0x2f8>
nopl   0x0(%rax)
mov    %rdx,%rcx
shr    %rcx
and    $0x1,%edx
or     %rcx,%rdx
xorps  %xmm2,%xmm2
cvtsi2ss %rdx,%xmm2
addss  %xmm2,%xmm2
pshufd $0xee,%xmm4,%xmm3
movq   %xmm3,%rdx
test   %rdx,%rdx
js     1420 <arr_float_step+0x320>
xorps  %xmm3,%xmm3
cvtsi2ss %rdx,%xmm3
jmp    1438 <arr_float_step+0x338>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %rdx,%rcx
shr    %rcx
and    $0x1,%edx
or     %rcx,%rdx
xorps  %xmm3,%xmm3
cvtsi2ss %rdx,%xmm3
addss  %xmm3,%xmm3
unpcklps %xmm3,%xmm2
unpcklps %xmm7,%xmm6
movlhps %xmm2,%xmm6
mulps  %xmm12,%xmm6
addps  %xmm13,%xmm6
movups %xmm6,(%rdi,%r10,4)
movdqa %xmm5,%xmm2
paddq  %xmm8,%xmm2
movq   %xmm2,%rdx
test   %rdx,%rdx
js     1470 <arr_float_step+0x370>
xorps  %xmm6,%xmm6
cvtsi2ss %rdx,%xmm6
jmp    1488 <arr_float_step+0x388>
nopl   0x0(%rax,%rax,1)
mov    %rdx,%rcx
shr    %rcx
and    $0x1,%edx
or     %rcx,%rdx
xorps  %xmm6,%xmm6
cvtsi2ss %rdx,%xmm6
addss  %xmm6,%xmm6
pshufd $0xee,%xmm2,%xmm2
movq   %xmm2,%rdx
test   %rdx,%rdx
js     14b0 <arr_float_step+0x3b0>
xorps  %xmm7,%xmm7
cvtsi2ss %rdx,%xmm7
jmp    14c8 <arr_float_step+0x3c8>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %rdx,%rcx
shr    %rcx
and    $0x1,%edx
or     %rcx,%rdx
xorps  %xmm7,%xmm7
cvtsi2ss %rdx,%xmm7
addss  %xmm7,%xmm7
movdqa %xmm4,%xmm3
paddq  %xmm8,%xmm3
movq   %xmm3,%rdx
test   %rdx,%rdx
js     14f0 <arr_float_step+0x3f0>
xorps  %xmm2,%xmm2
cvtsi2ss %rdx,%xmm2
jmp    1508 <arr_float_step+0x408>
cs nopw 0x0(%rax,%rax,1)
nop
mov    %rdx,%rcx
shr    %rcx
and    $0x1,%edx
or     %rcx,%rdx
xorps  %xmm2,%xmm2
cvtsi2ss %rdx,%xmm2
addss  %xmm2,%xmm2
pshufd $0xee,%xmm3,%xmm3
movq   %xmm3,%rdx
test   %rdx,%rdx
js     1530 <arr_float_step+0x430>
xorps  %xmm3,%xmm3
cvtsi2ss %rdx,%xmm3
jmp    1548 <arr_float_step+0x448>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %rdx,%rcx
shr    %rcx
and    $0x1,%edx
or     %rcx,%rdx
xorps  %xmm3,%xmm3
cvtsi2ss %rdx,%xmm3
addss  %xmm3,%xmm3
unpcklps %xmm3,%xmm2
unpcklps %xmm7,%xmm6
movlhps %xmm2,%xmm6
mulps  %xmm12,%xmm6
addps  %xmm13,%xmm6
movups %xmm6,0x10(%rdi,%r10,4)
movdqa %xmm5,%xmm2
paddq  %xmm9,%xmm2
movq   %xmm2,%rdx
test   %rdx,%rdx
js     1580 <arr_float_step+0x480>
xorps  %xmm6,%xmm6
cvtsi2ss %rdx,%xmm6
jmp    1598 <arr_float_step+0x498>
nopl   0x0(%rax)
mov    %rdx,%rcx
shr    %rcx
and    $0x1,%edx
or     %rcx,%rdx
xorps  %xmm6,%xmm6
cvtsi2ss %rdx,%xmm6
addss  %xmm6,%xmm6
pshufd $0xee,%xmm2,%xmm2
movq   %xmm2,%rdx
test   %rdx,%rdx
js     15c0 <arr_float_step+0x4c0>
xorps  %xmm7,%xmm7
cvtsi2ss %rdx,%xmm7
jmp    15d8 <arr_float_step+0x4d8>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %rdx,%rcx
shr    %rcx
and    $0x1,%edx
or     %rcx,%rdx
xorps  %xmm7,%xmm7
cvtsi2ss %rdx,%xmm7
addss  %xmm7,%xmm7
movdqa %xmm4,%xmm3
paddq  %xmm9,%xmm3
movq   %xmm3,%rdx
test   %rdx,%rdx
js     1600 <arr_float_step+0x500>
xorps  %xmm2,%xmm2
cvtsi2ss %rdx,%xmm2
jmp    1618 <arr_float_step+0x518>
cs nopw 0x0(%rax,%rax,1)
nop
mov    %rdx,%rcx
shr    %rcx
and    $0x1,%edx
or     %rcx,%rdx
xorps  %xmm2,%xmm2
cvtsi2ss %rdx,%xmm2
addss  %xmm2,%xmm2
pshufd $0xee,%xmm3,%xmm3
movq   %xmm3,%rdx
test   %rdx,%rdx
js     1640 <arr_float_step+0x540>
xorps  %xmm3,%xmm3
cvtsi2ss %rdx,%xmm3
jmp    1658 <arr_float_step+0x558>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %rdx,%rcx
shr    %rcx
and    $0x1,%edx
or     %rcx,%rdx
xorps  %xmm3,%xmm3
cvtsi2ss %rdx,%xmm3
addss  %xmm3,%xmm3
unpcklps %xmm3,%xmm2
unpcklps %xmm7,%xmm6
movlhps %xmm2,%xmm6
mulps  %xmm12,%xmm6
addps  %xmm13,%xmm6
movups %xmm6,0x20(%rdi,%r10,4)
movdqa %xmm5,%xmm2
paddq  %xmm10,%xmm2
movq   %xmm2,%rdx
test   %rdx,%rdx
js     1690 <arr_float_step+0x590>
xorps  %xmm6,%xmm6
cvtsi2ss %rdx,%xmm6
jmp    16a8 <arr_float_step+0x5a8>
nopl   0x0(%rax)
mov    %rdx,%rcx
shr    %rcx
and    $0x1,%edx
or     %rcx,%rdx
xorps  %xmm6,%xmm6
cvtsi2ss %rdx,%xmm6
addss  %xmm6,%xmm6
pshufd $0xee,%xmm2,%xmm2
movq   %xmm2,%rdx
test   %rdx,%rdx
js     16d0 <arr_float_step+0x5d0>
xorps  %xmm7,%xmm7
cvtsi2ss %rdx,%xmm7
jmp    16e8 <arr_float_step+0x5e8>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %rdx,%rcx
shr    %rcx
and    $0x1,%edx
or     %rcx,%rdx
xorps  %xmm7,%xmm7
cvtsi2ss %rdx,%xmm7
addss  %xmm7,%xmm7
movdqa %xmm4,%xmm3
paddq  %xmm10,%xmm3
movq   %xmm3,%rdx
test   %rdx,%rdx
js     1710 <arr_float_step+0x610>
xorps  %xmm2,%xmm2
cvtsi2ss %rdx,%xmm2
jmp    1728 <arr_float_step+0x628>
cs nopw 0x0(%rax,%rax,1)
nop
mov    %rdx,%rcx
shr    %rcx
and    $0x1,%edx
or     %rcx,%rdx
xorps  %xmm2,%xmm2
cvtsi2ss %rdx,%xmm2
addss  %xmm2,%xmm2
pshufd $0xee,%xmm3,%xmm3
movq   %xmm3,%rdx
test   %rdx,%rdx
jns    1320 <arr_float_step+0x220>
mov    %rdx,%rcx
shr    %rcx
and    $0x1,%edx
or     %rcx,%rdx
xorps  %xmm3,%xmm3
cvtsi2ss %rdx,%xmm3
addss  %xmm3,%xmm3
jmp    1328 <arr_float_step+0x228>

LLVM IR (-O0):
define void @arr_float_step(float* %0, float %1, float %2, i64 %3) {
%5 = alloca float*
%6 = alloca float
%7 = alloca float
%8 = alloca i64
%9 = alloca i64
store float* %0, float** %5
store float %1, float* %6
store float %2, float* %7
store i64 %3, i64* %8
store i64 0, i64* %9
br label %10
10: ; preds = %23, %4
%11 = load i64, i64* %9
%12 = load i64, i64* %8
%13 = icmp ult i64 %11, %12
br i1 %13, label %14, label %26
14: ; preds = %10
%15 = load i64, i64* %9
%16 = uitofp i64 %15 to float
%17 = load float, float* %7
%18 = load float, float* %6
%19 = call float @llvm.fmuladd.f32(float %16, float %17, float %18)
%20 = load float*, float** %5
%21 = load i64, i64* %9
%22 = getelementptr inbounds float, float* %20, i64 %21
store float %19, float* %22
br label %23
23: ; preds = %14
%24 = load i64, i64* %9
%25 = add i64 %24, 1
store i64 %25, i64* %9
br label %10
26: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @arr_float_step(float* nocapture writeonly %0, float %1, float %2, i64 %3) {
%5 = icmp eq i64 %3, 0
br i1 %5, label %78, label %6
6: ; preds = %4
%7 = icmp ult i64 %3, 4
br i1 %7, label %69, label %8
8: ; preds = %6
%9 = and i64 %3, -4
%10 = insertelement <4 x float> poison, float %2, i64 0
%11 = shufflevector <4 x float> %10, <4 x float> poison, <4 x i32> zeroinitializer
%12 = insertelement <4 x float> poison, float %1, i64 0
%13 = shufflevector <4 x float> %12, <4 x float> poison, <4 x i32> zeroinitializer
%14 = add i64 %9, -4
%15 = lshr exact i64 %14, 2
%16 = add nuw nsw i64 %15, 1
%17 = and i64 %16, 3
%18 = icmp ult i64 %14, 12
br i1 %18, label %51, label %19
19: ; preds = %8
%20 = and i64 %16, 9223372036854775804
br label %21
21: ; preds = %21, %19
%22 = phi i64 [ 0, %19 ], [ %47, %21 ]
%23 = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %19 ], [ %48, %21 ]
%24 = phi i64 [ 0, %19 ], [ %49, %21 ]
%25 = uitofp <4 x i64> %23 to <4 x float>
%26 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %25, <4 x float> %11, <4 x float> %13)
%27 = getelementptr inbounds float, float* %0, i64 %22
%28 = bitcast float* %27 to <4 x float>*
store <4 x float> %26, <4 x float>* %28
%29 = or i64 %22, 4
%30 = add <4 x i64> %23, <i64 4, i64 4, i64 4, i64 4>
%31 = uitofp <4 x i64> %30 to <4 x float>
%32 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %31, <4 x float> %11, <4 x float> %13)
%33 = getelementptr inbounds float, float* %0, i64 %29
%34 = bitcast float* %33 to <4 x float>*
store <4 x float> %32, <4 x float>* %34
%35 = or i64 %22, 8
%36 = add <4 x i64> %23, <i64 8, i64 8, i64 8, i64 8>
%37 = uitofp <4 x i64> %36 to <4 x float>
%38 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %37, <4 x float> %11, <4 x float> %13)
%39 = getelementptr inbounds float, float* %0, i64 %35
%40 = bitcast float* %39 to <4 x float>*
store <4 x float> %38, <4 x float>* %40
%41 = or i64 %22, 12
%42 = add <4 x i64> %23, <i64 12, i64 12, i64 12, i64 12>
%43 = uitofp <4 x i64> %42 to <4 x float>
%44 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %43, <4 x float> %11, <4 x float> %13)
%45 = getelementptr inbounds float, float* %0, i64 %41
%46 = bitcast float* %45 to <4 x float>*
store <4 x float> %44, <4 x float>* %46
%47 = add nuw i64 %22, 16
%48 = add <4 x i64> %23, <i64 16, i64 16, i64 16, i64 16>
%49 = add nuw i64 %24, 4
%50 = icmp eq i64 %49, %20
br i1 %50, label %51, label %21
51: ; preds = %21, %8
%52 = phi i64 [ 0, %8 ], [ %47, %21 ]
%53 = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %8 ], [ %48, %21 ]
%54 = icmp eq i64 %17, 0
br i1 %54, label %67, label %55
55: ; preds = %51, %55
%56 = phi i64 [ %63, %55 ], [ %52, %51 ]
%57 = phi <4 x i64> [ %64, %55 ], [ %53, %51 ]
%58 = phi i64 [ %65, %55 ], [ 0, %51 ]
%59 = uitofp <4 x i64> %57 to <4 x float>
%60 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %59, <4 x float> %11, <4 x float> %13)
%61 = getelementptr inbounds float, float* %0, i64 %56
%62 = bitcast float* %61 to <4 x float>*
store <4 x float> %60, <4 x float>* %62
%63 = add nuw i64 %56, 4
%64 = add <4 x i64> %57, <i64 4, i64 4, i64 4, i64 4>
%65 = add i64 %58, 1
%66 = icmp eq i64 %65, %17
br i1 %66, label %67, label %55
67: ; preds = %55, %51
%68 = icmp eq i64 %9, %3
br i1 %68, label %78, label %69
69: ; preds = %6, %67
%70 = phi i64 [ 0, %6 ], [ %9, %67 ]
br label %71
71: ; preds = %69, %71
%72 = phi i64 [ %76, %71 ], [ %70, %69 ]
%73 = uitofp i64 %72 to float
%74 = tail call float @llvm.fmuladd.f32(float %73, float %2, float %1)
%75 = getelementptr inbounds float, float* %0, i64 %72
store float %74, float* %75
%76 = add nuw i64 %72, 1
%77 = icmp eq i64 %76, %3
br i1 %77, label %78, label %71
78: ; preds = %71, %67, %4
ret void
}