float AURAE_sinf(float x) {
  int q = (x * 6.3661977236758138e-1f) + 0.5f;
  float t = x - q * 1.5707963267923333e+00f;
  t = t - q * 2.5633441515945189e-12f;
  float t2 = t * t;
  if (q & 1)
    t = ((-1.36058866707554670912e-03f * t2 + 4.16566258031673830195e-02f) *
             t2 -
         4.99998875577611430384e-01f) *
            t2 +
        9.99999980750852337007e-01f;
  else
    t = (((-1.94842039748219288187e-04f * t2 + 8.33179571459221545387e-03f) *
              t2 -
          1.66666423796176028737e-01f) *
             t2 +
         9.99999989793669848536e-01f) *
        t;
  if (q & 2)
    t = -t;
  return t;
}


x86 assembly (clang, -O0):
<AURAE_sinf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xef2(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xeea(%rip),%xmm1
addss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
mov    %eax,-0x8(%rbp)
movss  -0x4(%rbp),%xmm1
cvtsi2ssl -0x8(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  0xeb8(%rip),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm1
cvtsi2ssl -0x8(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  0xe88(%rip),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
mulss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     11f4 <AURAE_sinf+0xf4>
movss  -0x10(%rbp),%xmm0
movss  0xe74(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xe6c(%rip),%xmm1
addss  %xmm1,%xmm0
movss  -0x10(%rbp),%xmm1
mulss  %xmm1,%xmm0
movss  0xe4f(%rip),%xmm1
addss  %xmm1,%xmm0
movss  -0x10(%rbp),%xmm1
mulss  %xmm1,%xmm0
movss  0xe2a(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    1245 <AURAE_sinf+0x145>
movss  -0x10(%rbp),%xmm0
movss  0xe17(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xe0f(%rip),%xmm1
addss  %xmm1,%xmm0
movss  -0x10(%rbp),%xmm1
mulss  %xmm1,%xmm0
movss  0xdf2(%rip),%xmm1
addss  %xmm1,%xmm0
movss  -0x10(%rbp),%xmm1
mulss  %xmm1,%xmm0
movss  0xdd9(%rip),%xmm1
addss  %xmm1,%xmm0
mulss  -0xc(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     126b <AURAE_sinf+0x16b>
movss  -0xc(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<AURAE_sinf>:
movaps %xmm0,%xmm1
movss  0xef5(%rip),%xmm0
mulss  %xmm1,%xmm0
addss  0xeed(%rip),%xmm0
cvttss2si %xmm0,%eax
cvttps2dq %xmm0,%xmm0
cvtdq2ps %xmm0,%xmm0
movss  0xede(%rip),%xmm2
mulss  %xmm0,%xmm2
mulss  0xed6(%rip),%xmm0
addss  %xmm1,%xmm2
addss  %xmm2,%xmm0
movaps %xmm0,%xmm1
mulss  %xmm0,%xmm1
test   $0x1,%al
jne    117f <AURAE_sinf+0x7f>
movss  0xecf(%rip),%xmm2
mulss  %xmm1,%xmm2
addss  0xec7(%rip),%xmm2
mulss  %xmm1,%xmm2
addss  0xebf(%rip),%xmm2
mulss  %xmm1,%xmm2
addss  0xea7(%rip),%xmm2
mulss  %xmm2,%xmm0
test   $0x2,%al
jne    11af <AURAE_sinf+0xaf>
jmp    11b6 <AURAE_sinf+0xb6>
movss  0xe89(%rip),%xmm0
mulss  %xmm1,%xmm0
addss  0xe81(%rip),%xmm0
mulss  %xmm1,%xmm0
addss  0xe79(%rip),%xmm0
mulss  %xmm1,%xmm0
addss  0xe71(%rip),%xmm0
test   $0x2,%al
je     11b6 <AURAE_sinf+0xb6>
xorps  0xe7a(%rip),%xmm0
ret

LLVM IR (-O0):
define float @AURAE_sinf(float %0) {
%2 = alloca float
%3 = alloca i32
%4 = alloca float
%5 = alloca float
store float %0, float* %2
%6 = load float, float* %2
%7 = call float @llvm.fmuladd.f32(float %6, float 0x3FE45F3060000000, float 5.000000e-01)
%8 = fptosi float %7 to i32
store i32 %8, i32* %3
%9 = load float, float* %2
%10 = load i32, i32* %3
%11 = sitofp i32 %10 to float
%12 = fneg float %11
%13 = call float @llvm.fmuladd.f32(float %12, float 0x3FF921FB60000000, float %9)
store float %13, float* %4
%14 = load float, float* %4
%15 = load i32, i32* %3
%16 = sitofp i32 %15 to float
%17 = fneg float %16
%18 = call float @llvm.fmuladd.f32(float %17, float 0x3D868C2340000000, float %14)
store float %18, float* %4
%19 = load float, float* %4
%20 = load float, float* %4
%21 = fmul float %19, %20
store float %21, float* %5
%22 = load i32, i32* %3
%23 = and i32 %22, 1
%24 = icmp ne i32 %23, 0
br i1 %24, label %25, label %32
25: ; preds = %1
%26 = load float, float* %5
%27 = call float @llvm.fmuladd.f32(float 0xBF564AB900000000, float %26, float 0x3FA5540460000000)
%28 = load float, float* %5
%29 = call float @llvm.fmuladd.f32(float %27, float %28, float 0xBFDFFFFB40000000)
%30 = load float, float* %5
%31 = call float @llvm.fmuladd.f32(float %29, float %30, float 1.000000e+00)
store float %31, float* %4
br label %41
32: ; preds = %1
%33 = load float, float* %5
%34 = call float @llvm.fmuladd.f32(float 0xBF2989D060000000, float %33, float 0x3F811042C0000000)
%35 = load float, float* %5
%36 = call float @llvm.fmuladd.f32(float %34, float %35, float 0xBFC5555340000000)
%37 = load float, float* %5
%38 = call float @llvm.fmuladd.f32(float %36, float %37, float 1.000000e+00)
%39 = load float, float* %4
%40 = fmul float %38, %39
store float %40, float* %4
br label %41
41: ; preds = %32, %25
%42 = load i32, i32* %3
%43 = and i32 %42, 2
%44 = icmp ne i32 %43, 0
br i1 %44, label %45, label %48
45: ; preds = %41
%46 = load float, float* %4
%47 = fneg float %46
store float %47, float* %4
br label %48
48: ; preds = %45, %41
%49 = load float, float* %4
ret float %49
}

LLVM IR (-O2):
define float @AURAE_sinf(float %0) {
%2 = tail call float @llvm.fmuladd.f32(float %0, float 0x3FE45F3060000000, float 5.000000e-01)
%3 = fptosi float %2 to i32
%4 = sitofp i32 %3 to float
%5 = fneg float %4
%6 = tail call float @llvm.fmuladd.f32(float %5, float 0x3FF921FB60000000, float %0)
%7 = tail call float @llvm.fmuladd.f32(float %5, float 0x3D868C2340000000, float %6)
%8 = fmul float %7, %7
%9 = and i32 %3, 1
%10 = icmp eq i32 %9, 0
br i1 %10, label %15, label %11
11: ; preds = %1
%12 = tail call float @llvm.fmuladd.f32(float %8, float 0xBF564AB900000000, float 0x3FA5540460000000)
%13 = tail call float @llvm.fmuladd.f32(float %12, float %8, float 0xBFDFFFFB40000000)
%14 = tail call float @llvm.fmuladd.f32(float %13, float %8, float 1.000000e+00)
br label %20
15: ; preds = %1
%16 = tail call float @llvm.fmuladd.f32(float %8, float 0xBF2989D060000000, float 0x3F811042C0000000)
%17 = tail call float @llvm.fmuladd.f32(float %16, float %8, float 0xBFC5555340000000)
%18 = tail call float @llvm.fmuladd.f32(float %17, float %8, float 1.000000e+00)
%19 = fmul float %7, %18
br label %20
20: ; preds = %15, %11
%21 = phi float [ %14, %11 ], [ %19, %15 ]
%22 = and i32 %3, 2
%23 = icmp eq i32 %22, 0
%24 = fneg float %21
%25 = select i1 %23, float %21, float %24
ret float %25
}