int scale_precondition(unsigned int scale, unsigned int pixel,
                       unsigned int width, unsigned int height) {
  if (pixel != 2 && pixel != 4)
    return -1;
  switch (scale) {
  case 202:
  case 2:
  case 3:
    if (height < 2)
      return -1;
    break;
  case 404:
  case 4:
    if (height < 4)
      return -1;
    break;
  default:
    return -1;
  }
  if (width < 2)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<scale_precondition>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
cmpl   $0x2,-0xc(%rbp)
je     1130 <scale_precondition+0x30>
cmpl   $0x4,-0xc(%rbp)
je     1130 <scale_precondition+0x30>
movl   $0xffffffff,-0x4(%rbp)
jmp    11dd <scale_precondition+0xdd>
mov    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
add    $0xfffffffe,%eax
sub    $0x2,%eax
jb     117e <scale_precondition+0x7e>
jmp    1147 <scale_precondition+0x47>
mov    -0x18(%rbp),%eax
sub    $0x4,%eax
je     1199 <scale_precondition+0x99>
jmp    1158 <scale_precondition+0x58>
mov    -0x18(%rbp),%eax
sub    $0xca,%eax
je     117e <scale_precondition+0x7e>
jmp    116b <scale_precondition+0x6b>
mov    -0x18(%rbp),%eax
sub    $0x194,%eax
je     1199 <scale_precondition+0x99>
jmp    11b4 <scale_precondition+0xb4>
cmpl   $0x2,-0x14(%rbp)
jae    1194 <scale_precondition+0x94>
movl   $0xffffffff,-0x4(%rbp)
jmp    11dd <scale_precondition+0xdd>
jmp    11c0 <scale_precondition+0xc0>
cmpl   $0x4,-0x14(%rbp)
jae    11af <scale_precondition+0xaf>
movl   $0xffffffff,-0x4(%rbp)
jmp    11dd <scale_precondition+0xdd>
jmp    11c0 <scale_precondition+0xc0>
movl   $0xffffffff,-0x4(%rbp)
jmp    11dd <scale_precondition+0xdd>
cmpl   $0x2,-0x10(%rbp)
jae    11d6 <scale_precondition+0xd6>
movl   $0xffffffff,-0x4(%rbp)
jmp    11dd <scale_precondition+0xdd>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scale_precondition>:
mov    $0xffffffff,%eax
cmp    $0x4,%esi
je     110f <scale_precondition+0xf>
cmp    $0x2,%esi
jne    1124 <scale_precondition+0x24>
cmp    $0xc9,%edi
jg     1125 <scale_precondition+0x25>
lea    -0x2(%rdi),%esi
cmp    $0x2,%esi
jb     1135 <scale_precondition+0x35>
cmp    $0x4,%edi
je     113c <scale_precondition+0x3c>
ret
cmp    $0x194,%edi
je     113c <scale_precondition+0x3c>
cmp    $0xca,%edi
jne    1124 <scale_precondition+0x24>
cmp    $0x2,%ecx
jb     1124 <scale_precondition+0x24>
jmp    1141 <scale_precondition+0x41>
cmp    $0x4,%ecx
jb     1124 <scale_precondition+0x24>
cmp    $0x2,%edx
sbb    %eax,%eax
ret

LLVM IR (-O0):
define i32 @scale_precondition(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
%10 = load i32, i32* %7
%11 = icmp ne i32 %10, 2
br i1 %11, label %12, label %16
12: ; preds = %4
%13 = load i32, i32* %7
%14 = icmp ne i32 %13, 4
br i1 %14, label %15, label %16
15: ; preds = %12
store i32 -1, i32* %5
br label %34
16: ; preds = %12, %4
%17 = load i32, i32* %6
switch i32 %17, label %28 [
i32 202, label %18
i32 2, label %18
i32 3, label %18
i32 404, label %23
i32 4, label %23
]
18: ; preds = %16, %16, %16
%19 = load i32, i32* %9
%20 = icmp ult i32 %19, 2
br i1 %20, label %21, label %22
21: ; preds = %18
store i32 -1, i32* %5
br label %34
22: ; preds = %18
br label %29
23: ; preds = %16, %16
%24 = load i32, i32* %9
%25 = icmp ult i32 %24, 4
br i1 %25, label %26, label %27
26: ; preds = %23
store i32 -1, i32* %5
br label %34
27: ; preds = %23
br label %29
28: ; preds = %16
store i32 -1, i32* %5
br label %34
29: ; preds = %27, %22
%30 = load i32, i32* %8
%31 = icmp ult i32 %30, 2
br i1 %31, label %32, label %33
32: ; preds = %29
store i32 -1, i32* %5
br label %34
33: ; preds = %29
store i32 0, i32* %5
br label %34
34: ; preds = %33, %32, %28, %26, %21, %15
%35 = load i32, i32* %5
ret i32 %35
}

LLVM IR (-O2):
define i32 @scale_precondition(i32 %0, i32 %1, i32 %2, i32 %3) {
switch i32 %1, label %13 [
i32 4, label %5
i32 2, label %5
]
5: ; preds = %4, %4
switch i32 %0, label %13 [
i32 202, label %6
i32 2, label %6
i32 3, label %6
i32 404, label %8
i32 4, label %8
]
6: ; preds = %5, %5, %5
%7 = icmp ult i32 %3, 2
br i1 %7, label %13, label %10
8: ; preds = %5, %5
%9 = icmp ult i32 %3, 4
br i1 %9, label %13, label %10
10: ; preds = %8, %6
%11 = icmp ult i32 %2, 2
%12 = sext i1 %11 to i32
br label %13
13: ; preds = %10, %5, %8, %6, %4
%14 = phi i32 [ -1, %4 ], [ -1, %6 ], [ -1, %8 ], [ -1, %5 ], [ %12, %10 ]
ret i32 %14
}