xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ get_raw_size(int, int);
int32_t extra_bit_cells(int drive, int side) {
  return (int32_t)get_raw_size(drive, side);
}


x86 assembly (clang, -O0):
<extra_bit_cells>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <get_raw_size@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<extra_bit_cells>:
jmp    1030 <get_raw_size@plt>

LLVM IR (-O0):
define i32 @extra_bit_cells(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @get_raw_size(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @extra_bit_cells(i32 %0, i32 %1) {
%3 = tail call i32 @get_raw_size(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
long server_input_wait(long);
long INWAIT(long seconds) { return server_input_wait(seconds); }


x86 assembly (clang, -O0):
<INWAIT>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <server_input_wait@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INWAIT>:
jmp    1030 <server_input_wait@plt>

LLVM IR (-O0):
define i64 @INWAIT(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @server_input_wait(i64 %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @INWAIT(i64 %0) {
%2 = tail call i64 @server_input_wait(i64 %0)
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ _succeeded_test_case(int, int /*<<< orphan*/);
void _REQUIRE_succeed(void) { _succeeded_test_case(1, 0); }


x86 assembly (clang, -O0):
<_REQUIRE_succeed>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <_succeeded_test_case@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_REQUIRE_succeed>:
mov    $0x1,%edi
xor    %esi,%esi
jmp    1030 <_succeeded_test_case@plt>

LLVM IR (-O0):
define void @_REQUIRE_succeed() {
%1 = call i32 @_succeeded_test_case(i32 1, i32 0)
ret void
}

LLVM IR (-O2):
define void @_REQUIRE_succeed() {
%1 = tail call i32 @_succeeded_test_case(i32 1, i32 0)
ret void
}
int test_imm_EAuint16_mem(unsigned short *val) {
  return ((*val) & (-0xEA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_EAuint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffff16,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_EAuint16_mem>:
movzwl (%rdi),%eax
test   $0xff16,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_EAuint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -234
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_EAuint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -234
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct timespec {
  unsigned long tv_sec;
  long tv_nsec;
};

/* Variables and functions */
long ts_nsec(struct timespec a) {
  return (a.tv_sec * 1000000000UL + a.tv_nsec);
}


x86 assembly (clang, -O0):
<ts_nsec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x8(%rbp)
imul   $0x3b9aca00,-0x10(%rbp),%rax
3b
add    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ts_nsec>:
imul   $0x3b9aca00,%rdi,%rax
add    %rsi,%rax
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
define i64 @ts_nsec(i64 %0, i64 %1) {
%3 = alloca %struct.timespec
%4 = bitcast %struct.timespec* %3 to { i64, i64 }*
%5 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %4, i32 0, i32 0
store i64 %0, i64* %5
%6 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %4, i32 0, i32 1
store i64 %1, i64* %6
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
%8 = load i64, i64* %7
%9 = mul i64 %8, 1000000000
%10 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
%11 = load i64, i64* %10
%12 = add i64 %9, %11
ret i64 %12
}

LLVM IR (-O2):
define i64 @ts_nsec(i64 %0, i64 %1) {
%3 = mul i64 %0, 1000000000
%4 = add i64 %3, %1
ret i64 %4
}
void invalid_op() {
  __asm__ __volatile__("cli");
  SetTextColor(0x04 | 0x08, 0x00);
  kprintf("\nERROR: invalid_op\n");
  do {
    __asm__ __volatile__("cli  \n\t"
                         "hlt");
  } while (1 == 1);
}


x86 assembly (clang, -O0):
<invalid_op>:
push   %rbp
mov    %rsp,%rbp
cli
mov    $0xc,%edi
xor    %esi,%esi
mov    $0x0,%al
call   1030 <SetTextColor@plt>
lea    0xec6(%rip),%rdi
mov    $0x0,%al
call   1040 <kprintf@plt>
cli
hlt
mov    $0x1,%al
test   $0x1,%al
jne    1141 <invalid_op+0x21>
jmp    1152 <invalid_op+0x32>
pop    %rbp
ret

x86 assembly (clang, -O2):
<invalid_op>:
push   %rax
cli
mov    $0xc,%edi
xor    %esi,%esi
xor    %eax,%eax
call   1030 <SetTextColor@plt>
lea    0xec9(%rip),%rdi
xor    %eax,%eax
call   1040 <kprintf@plt>
xchg   %ax,%ax
cli
hlt
jmp    1140 <invalid_op+0x20>

LLVM IR (-O0):
@.str = [20 x i8] c"\0AERROR: invalid_op\0A\00"
define void @invalid_op() {
%1 = call i32 (i32, i32, ...) bitcast (i32 (...)* @SetTextColor to i32 (i32, i32, ...)*)(i32 12, i32 0)
%2 = call i32 (i8*, ...) bitcast (i32 (...)* @kprintf to i32 (i8*, ...)*)(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
br label %3
3: ; preds = %4, %0
br label %4
4: ; preds = %3
br i1 true, label %3, label %5
5: ; preds = %4
ret void
}

LLVM IR (-O2):
@.str = [20 x i8] c"\0AERROR: invalid_op\0A\00"
define void @invalid_op() {
tail call void asm sideeffect "cli", "~{dirflag},~{fpsr},~{flags}"()
%1 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @SetTextColor to i32 (i32, i32, ...)*)(i32 12, i32 0)
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @kprintf to i32 (i8*, ...)*)(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
br label %3
3: ; preds = %3, %0
tail call void asm sideeffect "cli \0A\09hlt", "~{dirflag},~{fpsr},~{flags}"()
br label %3
}
/* Variables and functions */
scalar_t__ isalpha(char const);
const char *eat_alpha(const char *str) {
  while (isalpha(*str))
    str++;
  return str;
}


x86 assembly (clang, -O0):
<eat_alpha>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
je     1143 <eat_alpha+0x33>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <eat_alpha+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eat_alpha>:
push   %rbx
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rbx
nopl   0x0(%rax,%rax,1)
movsbl 0x1(%rbx),%edi
add    $0x1,%rbx
call   1030 <isalpha@plt>
test   %rax,%rax
jne    1120 <eat_alpha+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @eat_alpha(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = call i64 @isalpha(i8 signext %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
br label %3
11: ; preds = %3
%12 = load i8*, i8** %2
ret i8* %12
}

LLVM IR (-O2):
define i8* @eat_alpha(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %7, %2 ]
%4 = load i8, i8* %3
%5 = tail call i64 @isalpha(i8 signext %4)
%6 = icmp eq i64 %5, 0
%7 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i8* %3
}
int test_imm_4Eint16_reg(short val) {
  return ((val) & (-0x4E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_4Eint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffffb2,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_4Eint16_reg>:
test   $0xffb2,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_4Eint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -78
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_4Eint16_reg(i16 signext %0) {
%2 = and i16 %0, -78
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int sg_ll_report_tgt_prt_grp2(int, void *, int, int /*<<< orphan*/, int, int);
int sg_ll_report_tgt_prt_grp(int sg_fd, void *resp, int mx_resp_len, int noisy,
                             int verbose) {
  return sg_ll_report_tgt_prt_grp2(sg_fd, resp, mx_resp_len, 0, noisy, verbose);
}


x86 assembly (clang, -O0):
<sg_ll_report_tgt_prt_grp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%r8d
mov    -0x1c(%rbp),%r9d
xor    %ecx,%ecx
call   1030 <sg_ll_report_tgt_prt_grp2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sg_ll_report_tgt_prt_grp>:
mov    %r8d,%r9d
mov    %ecx,%r8d
xor    %ecx,%ecx
jmp    1030 <sg_ll_report_tgt_prt_grp2@plt>

LLVM IR (-O0):
define i32 @sg_ll_report_tgt_prt_grp(i32 %0, i8* %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i8* %1, i8** %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i8*, i8** %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i32 @sg_ll_report_tgt_prt_grp2(i32 %11, i8* %12, i32 %13, i32 0, i32 %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @sg_ll_report_tgt_prt_grp(i32 %0, i8* %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @sg_ll_report_tgt_prt_grp2(i32 %0, i8* %1, i32 %2, i32 0, i32 %3, i32 %4)
ret i32 %6
}
/* Variables and functions */
int get_start(int);
int global_to_local(int rank, int row) { return row - get_start(rank); }


x86 assembly (clang, -O0):
<global_to_local>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <get_start@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
sub    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<global_to_local>:
push   %rbx
mov    %esi,%ebx
call   1030 <get_start@plt>
sub    %eax,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @global_to_local(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = call i32 @get_start(i32 %6)
%8 = sub nsw i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @global_to_local(i32 %0, i32 %1) {
%3 = tail call i32 @get_start(i32 %0)
%4 = sub nsw i32 %1, %3
ret i32 %4
}
void a() { printf("hi from %s\n", __func__); }


x86 assembly (clang, -O0):
<a>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xeea(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<a>:
lea    0xee9(%rip),%rdi
lea    0xeee(%rip),%rsi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"hi from %s\0A\00"
@__func__.a = [2 x i8] c"a\00"
define void @a() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @__func__.a, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"hi from %s\0A\00"
@__func__.a = [2 x i8] c"a\00"
define void @a() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @__func__.a, i64 0, i64 0))
ret void
}
int main(void) {
  int ten = 10, twenty = 20, thirty = 30;
  return (ten >= twenty) + (twenty >= twenty) + (thirty >= twenty);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
movl   $0x14,-0xc(%rbp)
movl   $0x1e,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
setge  %al
and    $0x1,%al
movzbl %al,%eax
mov    -0xc(%rbp),%ecx
cmp    -0xc(%rbp),%ecx
setge  %cl
and    $0x1,%cl
movzbl %cl,%ecx
add    %ecx,%eax
mov    -0x10(%rbp),%ecx
cmp    -0xc(%rbp),%ecx
setge  %cl
and    $0x1,%cl
movzbl %cl,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 10, i32* %2
store i32 20, i32* %3
store i32 30, i32* %4
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = icmp sge i32 %5, %6
%8 = zext i1 %7 to i32
%9 = load i32, i32* %3
%10 = load i32, i32* %3
%11 = icmp sge i32 %9, %10
%12 = zext i1 %11 to i32
%13 = add nsw i32 %8, %12
%14 = load i32, i32* %4
%15 = load i32, i32* %3
%16 = icmp sge i32 %14, %15
%17 = zext i1 %16 to i32
%18 = add nsw i32 %13, %17
ret i32 %18
}

LLVM IR (-O2):
define i32 @main() {
ret i32 2
}
/* Type definitions */
typedef int /*<<< orphan*/ cpu_set_t;

/* Variables and functions */
int CPU_COUNT(int /*<<< orphan*/ *);
int errno;
int sched_getaffinity(int, size_t, int /*<<< orphan*/ *);
int current_cpus(int pid) {
  cpu_set_t proc_cpus;
  size_t mask_size = sizeof proc_cpus;
  int ret = sched_getaffinity(pid, mask_size, &proc_cpus);
  if (ret == -1)
    return errno;
  int cpu_affinity = CPU_COUNT(&proc_cpus);
  return cpu_affinity;
}


x86 assembly (clang, -O0):
<current_cpus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
movq   $0x4,-0x18(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x18(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1040 <sched_getaffinity@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0xffffffff,-0x1c(%rbp)
jne    1161 <current_cpus+0x41>
mov    0x2e89(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    1173 <current_cpus+0x53>
lea    -0xc(%rbp),%rdi
call   1030 <CPU_COUNT@plt>
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<current_cpus>:
push   %rax
lea    0x4(%rsp),%rdx
mov    $0x4,%esi
call   1040 <sched_getaffinity@plt>
cmp    $0xffffffff,%eax
je     1141 <current_cpus+0x21>
lea    0x4(%rsp),%rdi
call   1030 <CPU_COUNT@plt>
pop    %rcx
ret
mov    0x2e98(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@errno = global i32 0
define i32 @current_cpus(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i64 4, i64* %5
%8 = load i32, i32* %3
%9 = load i64, i64* %5
%10 = call i32 @sched_getaffinity(i32 %8, i64 %9, i32* %4)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = icmp eq i32 %11, -1
br i1 %12, label %13, label %15
13: ; preds = %1
%14 = load i32, i32* @errno
store i32 %14, i32* %2
br label %18
15: ; preds = %1
%16 = call i32 @CPU_COUNT(i32* %4)
store i32 %16, i32* %7
%17 = load i32, i32* %7
store i32 %17, i32* %2
br label %18
18: ; preds = %15, %13
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
@errno = global i32 0
define i32 @current_cpus(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @sched_getaffinity(i32 %0, i64 4, i32* %2)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* @errno
br label %10
8: ; preds = %1
%9 = call i32 @CPU_COUNT(i32* %2)
br label %10
10: ; preds = %8, %6
%11 = phi i32 [ %7, %6 ], [ %9, %8 ]
ret i32 %11
}
/* Variables and functions */
scalar_t__ malloc(int);
void *cmsfs_malloc(int size) { return (void *)malloc(size); }


x86 assembly (clang, -O0):
<cmsfs_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmsfs_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @cmsfs_malloc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @malloc(i32 %3)
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}

LLVM IR (-O2):
define i8* @cmsfs_malloc(i32 %0) {
%2 = tail call i64 @malloc(i32 %0)
%3 = inttoptr i64 %2 to i8*
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
void stampa_risultato(float result) { printf("Risultato: %g", result); }


x86 assembly (clang, -O0):
<stampa_risultato>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stampa_risultato>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"Risultato: %g\00"
define void @stampa_risultato(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), float %3)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"Risultato: %g\00"
define void @stampa_risultato(float %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), float %0)
ret void
}
int cornet_init() { return 0; }


x86 assembly (clang, -O0):
<cornet_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cornet_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @cornet_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @cornet_init() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ USB_Disable();
int /*<<< orphan*/ USB_Enable(int /*<<< orphan*/, int);
int /*<<< orphan*/ wait_press();
int /*<<< orphan*/ wait_release();
void USB_Connect() {
  USB_Enable(0, 1);
  wait_release();
  wait_press();
  wait_release();
  USB_Disable();
}


x86 assembly (clang, -O0):
<USB_Connect>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0x1,%esi
call   1060 <USB_Enable@plt>
mov    $0x0,%al
call   1050 <wait_release@plt>
mov    $0x0,%al
call   1030 <wait_press@plt>
mov    $0x0,%al
call   1050 <wait_release@plt>
mov    $0x0,%al
call   1040 <USB_Disable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<USB_Connect>:
push   %rax
xor    %edi,%edi
mov    $0x1,%esi
call   1060 <USB_Enable@plt>
xor    %eax,%eax
call   1050 <wait_release@plt>
xor    %eax,%eax
call   1030 <wait_press@plt>
xor    %eax,%eax
call   1050 <wait_release@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <USB_Disable@plt>

LLVM IR (-O0):
define void @USB_Connect() {
%1 = call i32 @USB_Enable(i32 0, i32 1)
%2 = call i32 (...) @wait_release()
%3 = call i32 (...) @wait_press()
%4 = call i32 (...) @wait_release()
%5 = call i32 (...) @USB_Disable()
ret void
}

LLVM IR (-O2):
define void @USB_Connect() {
%1 = tail call i32 @USB_Enable(i32 0, i32 1)
%2 = tail call i32 (...) @wait_release()
%3 = tail call i32 (...) @wait_press()
%4 = tail call i32 (...) @wait_release()
%5 = tail call i32 (...) @USB_Disable()
ret void
}
void intel_io_lock(void) {}


x86 assembly (clang, -O0):
<intel_io_lock>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intel_io_lock>:
ret

LLVM IR (-O0):
define void @intel_io_lock() {
ret void
}

LLVM IR (-O2):
define void @intel_io_lock() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ askHigh();
int /*<<< orphan*/ askLow();
int /*<<< orphan*/ usleep(int);
void W2() {
  int i = 0;
  while (i < 4) {
    askHigh();
    usleep(1500);
    askLow();
    usleep(500);
    i++;
  }
}


x86 assembly (clang, -O0):
<W2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x4,-0x4(%rbp)
jge    1179 <W2+0x49>
mov    $0x0,%al
call   1030 <askHigh@plt>
mov    $0x5dc,%edi
call   1050 <usleep@plt>
mov    $0x0,%al
call   1040 <askLow@plt>
mov    $0x1f4,%edi
call   1050 <usleep@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    113f <W2+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<W2>:
push   %rax
xor    %eax,%eax
call   1030 <askHigh@plt>
mov    $0x5dc,%edi
call   1050 <usleep@plt>
xor    %eax,%eax
call   1040 <askLow@plt>
mov    $0x1f4,%edi
call   1050 <usleep@plt>
xor    %eax,%eax
call   1030 <askHigh@plt>
mov    $0x5dc,%edi
call   1050 <usleep@plt>
xor    %eax,%eax
call   1040 <askLow@plt>
mov    $0x1f4,%edi
call   1050 <usleep@plt>
xor    %eax,%eax
call   1030 <askHigh@plt>
mov    $0x5dc,%edi
call   1050 <usleep@plt>
xor    %eax,%eax
call   1040 <askLow@plt>
mov    $0x1f4,%edi
call   1050 <usleep@plt>
xor    %eax,%eax
call   1030 <askHigh@plt>
mov    $0x5dc,%edi
call   1050 <usleep@plt>
xor    %eax,%eax
call   1040 <askLow@plt>
mov    $0x1f4,%edi
pop    %rax
jmp    1050 <usleep@plt>

LLVM IR (-O0):
define void @W2() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %5, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 4
br i1 %4, label %5, label %12
5: ; preds = %2
%6 = call i32 (...) @askHigh()
%7 = call i32 @usleep(i32 1500)
%8 = call i32 (...) @askLow()
%9 = call i32 @usleep(i32 500)
%10 = load i32, i32* %1
%11 = add nsw i32 %10, 1
store i32 %11, i32* %1
br label %2
12: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @W2() {
%1 = tail call i32 (...) @askHigh()
%2 = tail call i32 @usleep(i32 1500)
%3 = tail call i32 (...) @askLow()
%4 = tail call i32 @usleep(i32 500)
%5 = tail call i32 (...) @askHigh()
%6 = tail call i32 @usleep(i32 1500)
%7 = tail call i32 (...) @askLow()
%8 = tail call i32 @usleep(i32 500)
%9 = tail call i32 (...) @askHigh()
%10 = tail call i32 @usleep(i32 1500)
%11 = tail call i32 (...) @askLow()
%12 = tail call i32 @usleep(i32 500)
%13 = tail call i32 (...) @askHigh()
%14 = tail call i32 @usleep(i32 1500)
%15 = tail call i32 (...) @askLow()
%16 = tail call i32 @usleep(i32 500)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ magic();
void process_magic(void) { magic(); }


x86 assembly (clang, -O0):
<process_magic>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <magic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<process_magic>:
xor    %eax,%eax
jmp    1030 <magic@plt>

LLVM IR (-O0):
define void @process_magic() {
%1 = call i32 (...) @magic()
ret void
}

LLVM IR (-O2):
define void @process_magic() {
%1 = tail call i32 (...) @magic()
ret void
}
int initializeIpfixReceivers() { return 0; }


x86 assembly (clang, -O0):
<initializeIpfixReceivers>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<initializeIpfixReceivers>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @initializeIpfixReceivers() {
ret i32 0
}

LLVM IR (-O2):
define i32 @initializeIpfixReceivers() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
void execute(char *command) { system(command); }


x86 assembly (clang, -O0):
<execute>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <system@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute>:
jmp    1030 <system@plt>

LLVM IR (-O0):
define void @execute(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @system(i8* %3)
ret void
}

LLVM IR (-O2):
define void @execute(i8* nocapture %0) {
%2 = tail call i32 @system(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ot(char *);
defword() { ot(".long\t"); }


x86 assembly (clang, -O0):
<defword>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <ot@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<defword>:
lea    0xee9(%rip),%rdi
jmp    1030 <ot@plt>

LLVM IR (-O0):
@.str = [7 x i8] c".long\09\00"
define i32 @defword() {
%1 = alloca i32
%2 = call i32 @ot(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [7 x i8] c".long\09\00"
define i32 @defword() {
%1 = tail call i32 @ot(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
unsigned xrop3_202_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = S ^ D;
  stk2 = T & stk3;
  stk1 = D ^ stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_202_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_202_1_1>:
mov    $0xff,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_202_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %6
%24 = load i32, i32* %5
%25 = xor i32 %23, %24
store i32 %25, i32* %10
%26 = load i32, i32* %7
%27 = load i32, i32* %10
%28 = and i32 %26, %27
store i32 %28, i32* %9
%29 = load i32, i32* %5
%30 = load i32, i32* %9
%31 = xor i32 %29, %30
store i32 %31, i32* %8
%32 = load i32, i32* %8
%33 = load i32, i32* %6
%34 = xor i32 %33, -1
%35 = and i32 %32, %34
%36 = load i32, i32* %7
%37 = xor i32 %36, -1
%38 = and i32 %35, %37
%39 = load i32, i32* %5
%40 = load i32, i32* %6
%41 = and i32 %39, %40
%42 = or i32 %38, %41
%43 = load i32, i32* %5
%44 = load i32, i32* %7
%45 = and i32 %43, %44
%46 = or i32 %42, %45
ret i32 %46
}

LLVM IR (-O2):
define i32 @xrop3_202_1_1(i8 zeroext %0, i8 zeroext %1) {
ret i32 255
}
void reshape_(context_in, major_in, context_out, major_out, first_proc,
              nprow_new, npcol_new) int *context_in,
    *context_out, *first_proc, *major_in, *major_out, *nprow_new, *npcol_new;
{
  Creshape(*context_in, *major_in, context_out, *major_out, *first_proc,
           *nprow_new, *npcol_new);
}


x86 assembly (clang, -O0):
<reshape_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rax
mov    (%rax),%ecx
mov    -0x28(%rbp),%rax
mov    (%rax),%r8d
mov    -0x30(%rbp),%rax
mov    (%rax),%r9d
mov    0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,(%rsp)
mov    $0x0,%al
call   1030 <Creshape@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reshape_>:
push   %rax
mov    0x10(%rsp),%rax
mov    (%rdi),%edi
mov    (%rsi),%esi
mov    (%rcx),%ecx
mov    (%r8),%r8d
mov    (%r9),%r9d
mov    (%rax),%eax
mov    %eax,(%rsp)
xor    %eax,%eax
call   1030 <Creshape@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @reshape_(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4, i32* %5, i32* %6) {
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca i32*
%11 = alloca i32*
%12 = alloca i32*
%13 = alloca i32*
%14 = alloca i32*
store i32* %0, i32** %8
store i32* %1, i32** %9
store i32* %2, i32** %10
store i32* %3, i32** %11
store i32* %4, i32** %12
store i32* %5, i32** %13
store i32* %6, i32** %14
%15 = load i32*, i32** %8
%16 = load i32, i32* %15
%17 = load i32*, i32** %9
%18 = load i32, i32* %17
%19 = load i32*, i32** %10
%20 = load i32*, i32** %11
%21 = load i32, i32* %20
%22 = load i32*, i32** %12
%23 = load i32, i32* %22
%24 = load i32*, i32** %13
%25 = load i32, i32* %24
%26 = load i32*, i32** %14
%27 = load i32, i32* %26
%28 = call i32 (i32, i32, i32*, i32, i32, i32, i32, ...) bitcast (i32 (...)* @Creshape to i32 (i32, i32, i32*, i32, i32, i32, i32, ...)*)(i32 %16, i32 %18, i32* %19, i32 %21, i32 %23, i32 %25, i32 %27)
ret void
}

LLVM IR (-O2):
define void @reshape_(i32* nocapture %0, i32* nocapture %1, i32* %2, i32* nocapture %3, i32* nocapture %4, i32* nocapture %5, i32* nocapture %6) {
%8 = load i32, i32* %0
%9 = load i32, i32* %1
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = tail call i32 (i32, i32, i32*, i32, i32, i32, i32, ...) bitcast (i32 (...)* @Creshape to i32 (i32, i32, i32*, i32, i32, i32, i32, ...)*)(i32 %8, i32 %9, i32* %2, i32 %10, i32 %11, i32 %12, i32 %13)
ret void
}
extern __attribute__((always_)) long int testandset(int *__spinlock) {
  long int ret;
  __asm__ __volatile__("xchgl %k0, %1"
                       : "=r"(ret), "=m"(*__spinlock)
                       : "0"(1), "m"(*__spinlock)
                       : "memory");
  return ret;
}


x86 assembly (clang, -O0):
<testandset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x8(%rbp),%rdx
mov    $0x1,%eax
xchg   %eax,(%rcx)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<testandset>:
mov    $0x1,%eax
xchg   %eax,(%rdi)
ret

LLVM IR (-O0):
define i64 @testandset(i32* %0) {
%2 = alloca i32*
%3 = alloca i64
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32*, i32** %2
%6 = call i64 asm sideeffect "xchgl ${0:k}, $1", "=r,=*m,0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %4, i64 1, i32* elementtype(i32) %5)
store i64 %6, i64* %3
%7 = load i64, i64* %3
ret i64 %7
}

LLVM IR (-O2):
define i64 @testandset(i32* %0) {
%2 = tail call i64 asm sideeffect "xchgl ${0:k}, $1", "=r,=*m,0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %0, i64 1, i32* elementtype(i32) %0)
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ wait_irq0();
void timer(int ticks) {
  for (; ticks >= 0; ticks--)
    wait_irq0();
}


x86 assembly (clang, -O0):
<timer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     113a <timer+0x2a>
mov    $0x0,%al
call   1030 <wait_irq0@plt>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    111b <timer+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timer>:
push   %rbx
test   %edi,%edi
js     112c <timer+0x1c>
mov    %edi,%ebx
add    $0x1,%ebx
nopw   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <wait_irq0@plt>
add    $0xffffffff,%ebx
jne    1120 <timer+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @timer(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %8, %1
%4 = load i32, i32* %2
%5 = icmp sge i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = call i32 (...) @wait_irq0()
br label %8
8: ; preds = %6
%9 = load i32, i32* %2
%10 = add nsw i32 %9, -1
store i32 %10, i32* %2
br label %3
11: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @timer(i32 %0) {
%2 = icmp sgt i32 %0, -1
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ %0, %1 ]
%5 = tail call i32 (...) @wait_irq0()
%6 = add nsw i32 %4, -1
%7 = icmp eq i32 %4, 0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}
int ReadLink(LinkId, Buffer, Count, Timeout)
int LinkId;
char *Buffer;
unsigned int Count;
int Timeout;
{}


x86 assembly (clang, -O0):
<ReadLink>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReadLink>:
ret

LLVM IR (-O0):
define i32 @ReadLink(i32 %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %6
store i8* %1, i8** %7
store i32 %2, i32* %8
store i32 %3, i32* %9
%10 = load i32, i32* %5
ret i32 %10
}

LLVM IR (-O2):
define i32 @ReadLink(i32 %0, i8* nocapture readnone %1, i32 %2, i32 %3) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ determine_switches(int, char **);
int /*<<< orphan*/ run_appropiate_sections(int /*<<< orphan*/);
void main(int argc, char *argv[]) {
  run_appropiate_sections(determine_switches(argc, argv));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <determine_switches@plt>
mov    %eax,%edi
call   1030 <run_appropiate_sections@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1040 <determine_switches@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <run_appropiate_sections@plt>

LLVM IR (-O0):
define void @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i8**, i8*** %4
%7 = call i32 @determine_switches(i32 %5, i8** %6)
%8 = call i32 @run_appropiate_sections(i32 %7)
ret void
}

LLVM IR (-O2):
define void @main(i32 %0, i8** %1) {
%3 = tail call i32 @determine_switches(i32 %0, i8** %1)
%4 = tail call i32 @run_appropiate_sections(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ enter();
extern void pause(void) { enter(); }


x86 assembly (clang, -O0):
<pause>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <enter@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pause>:
xor    %eax,%eax
jmp    1030 <enter@plt>

LLVM IR (-O0):
define void @pause() {
%1 = call i32 (...) @enter()
ret void
}

LLVM IR (-O2):
define void @pause() {
%1 = tail call i32 (...) @enter()
ret void
}
int test_imm_86int8_mem(signed char *val) {
  return ((*val) & (0x86 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_86int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0x86,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_86int8_mem>:
testb  $0x86,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_86int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 134
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_86int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -122
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ wDateTimePush(char, int /*<<< orphan*/);
int /*<<< orphan*/ wStackPopDateTime();
void wBuiltinDay() { wDateTimePush('d', wStackPopDateTime()); }


x86 assembly (clang, -O0):
<wBuiltinDay>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <wStackPopDateTime@plt>
mov    %eax,%esi
mov    $0x64,%edi
call   1030 <wDateTimePush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wBuiltinDay>:
push   %rax
xor    %eax,%eax
call   1040 <wStackPopDateTime@plt>
mov    $0x64,%edi
mov    %eax,%esi
pop    %rax
jmp    1030 <wDateTimePush@plt>

LLVM IR (-O0):
define void @wBuiltinDay() {
%1 = call i32 (...) @wStackPopDateTime()
%2 = call i32 @wDateTimePush(i8 signext 100, i32 %1)
ret void
}

LLVM IR (-O2):
define void @wBuiltinDay() {
%1 = tail call i32 (...) @wStackPopDateTime()
%2 = tail call i32 @wDateTimePush(i8 signext 100, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void mostrarValores(int *p, int n) {
  int i = 0;
  for (i = 0; i < n; i++) {
    printf("%i\t", *(p + i));
  }
}


x86 assembly (clang, -O0):
<mostrarValores>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    115e <mostrarValores+0x4e>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xeb5(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    112d <mostrarValores+0x1d>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mostrarValores>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1145 <mostrarValores+0x35>
mov    %rdi,%r15
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r14
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <mostrarValores+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%i\09\00"
define void @mostrarValores(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%i\09\00"
define void @mostrarValores(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
int test_imm_91uint16_reg(unsigned short val) {
  return ((val) & (-0x91 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_91uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff6f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_91uint16_reg>:
test   $0xff6f,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_91uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -145
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_91uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -145
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef unsigned char uint32_t;

/* Variables and functions */
uint32_t bs_read_4(unsigned char *ptr) {
  return (ptr[0] << 24) | (ptr[1] << 16) | (ptr[2] << 8) | ptr[3];
}


x86 assembly (clang, -O0):
<bs_read_4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%ecx
or     %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bs_read_4>:
mov    0x3(%rdi),%al
ret

LLVM IR (-O0):
define zeroext i8 @bs_read_4(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl i32 %6, 24
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 16
%13 = or i32 %7, %12
%14 = load i8*, i8** %2
%15 = getelementptr inbounds i8, i8* %14, i64 2
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = or i32 %13, %18
%20 = load i8*, i8** %2
%21 = getelementptr inbounds i8, i8* %20, i64 3
%22 = load i8, i8* %21
%23 = zext i8 %22 to i32
%24 = or i32 %19, %23
%25 = trunc i32 %24 to i8
ret i8 %25
}

LLVM IR (-O2):
define zeroext i8 @bs_read_4(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 3
%3 = load i8, i8* %2
ret i8 %3
}
OP(fd, d3) { op_d3(); }


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <op_d3@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
xor    %eax,%eax
jmp    1030 <op_d3@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @op_d3()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @op_d3()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x75() {
  Assert_real((isspace(117) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              590, ("isspace should be 0 for u"));
}


x86 assembly (clang, -O0):
<t_isspace_0x75>:
push   %rbp
mov    %rsp,%rbp
mov    $0x75,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x24e,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x75>:
push   %rax
mov    $0x75,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x24e,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for u\00"
define void @t_isspace_0x75() {
%1 = call i64 @isspace(i32 117)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 590, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for u\00"
define void @t_isspace_0x75() {
%1 = tail call i64 @isspace(i32 117)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 590, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _test_MIN_biggerullong_smallerint(int /*<<< orphan*/, int);
int _test_various_MIN_biggerullong_smallerint() {
  _test_MIN_biggerullong_smallerint(0, -1);
  return 0;
}


x86 assembly (clang, -O0):
<_test_various_MIN_biggerullong_smallerint>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0xffffffff,%esi
call   1030 <_test_MIN_biggerullong_smallerint@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_test_various_MIN_biggerullong_smallerint>:
push   %rax
xor    %edi,%edi
mov    $0xffffffff,%esi
call   1030 <_test_MIN_biggerullong_smallerint@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @_test_various_MIN_biggerullong_smallerint() {
%1 = call i32 @_test_MIN_biggerullong_smallerint(i32 0, i32 -1)
ret i32 0
}

LLVM IR (-O2):
define i32 @_test_various_MIN_biggerullong_smallerint() {
%1 = tail call i32 @_test_MIN_biggerullong_smallerint(i32 0, i32 -1)
ret i32 0
}
/* Type definitions */
struct itimerval {
  int dummy;
};

/* Variables and functions */
scalar_t__ malloc(int);
struct itimerval *_new_itimerval() {
  struct itimerval *timer;
  timer = (struct itimerval *)malloc(sizeof(struct itimerval));
  return timer;
}


x86 assembly (clang, -O0):
<_new_itimerval>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_new_itimerval>:
mov    $0x4,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
%struct.itimerval = type { i32 }
define %struct.itimerval* @_new_itimerval() {
%1 = alloca %struct.itimerval*
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to %struct.itimerval*
store %struct.itimerval* %3, %struct.itimerval** %1
%4 = load %struct.itimerval*, %struct.itimerval** %1
ret %struct.itimerval* %4
}

LLVM IR (-O2):
%struct.itimerval = type { i32 }
define %struct.itimerval* @_new_itimerval() {
%1 = tail call i64 @malloc(i32 4)
%2 = inttoptr i64 %1 to %struct.itimerval*
ret %struct.itimerval* %2
}
/* Variables and functions */
int EINVAL;
int leddrv_check(unsigned int led_n) { return led_n >= 80 ? -EINVAL : 0; }


x86 assembly (clang, -O0):
<leddrv_check>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x50,-0x4(%rbp)
jb     1124 <leddrv_check+0x24>
xor    %eax,%eax
mov    0x2ec6(%rip),%rcx
sub    (%rcx),%eax
mov    %eax,-0x8(%rbp)
jmp    112e <leddrv_check+0x2e>
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    112e <leddrv_check+0x2e>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<leddrv_check>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
xor    %ecx,%ecx
cmp    $0x50,%edi
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @leddrv_check(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp uge i32 %3, 80
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* @EINVAL
%7 = sub nsw i32 0, %6
br label %9
8: ; preds = %1
br label %9
9: ; preds = %8, %5
%10 = phi i32 [ %7, %5 ], [ 0, %8 ]
ret i32 %10
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @leddrv_check(i32 %0) {
%2 = icmp ugt i32 %0, 79
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
%5 = select i1 %2, i32 %4, i32 0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
void _ZN15PHONE_MsgClient16notifyPmPowerOffEv(void *this, void *event) {
  (void)this;
  (void)event;
  system("/usr/SYSqtapp/power/ezxpower");
}


x86 assembly (clang, -O0):
<_ZN15PHONE_MsgClient16notifyPmPowerOffEv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed9(%rip),%rdi
call   1030 <system@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ZN15PHONE_MsgClient16notifyPmPowerOffEv>:
lea    0xee9(%rip),%rdi
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"/usr/SYSqtapp/power/ezxpower\00"
define void @_ZN15PHONE_MsgClient16notifyPmPowerOffEv(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @system(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"/usr/SYSqtapp/power/ezxpower\00"
define void @_ZN15PHONE_MsgClient16notifyPmPowerOffEv(i8* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = tail call i32 @system(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret void
}