#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned char gf16_mul(unsigned char, unsigned char);
unsigned char gf16_mul_8(unsigned char);
unsigned char gf256_mul(unsigned char a, unsigned char b) {
  unsigned char a0 = a & 15;
  unsigned char a1 = (a >> 4);
  unsigned char b0 = b & 15;
  unsigned char b1 = (b >> 4);
  unsigned char a0b0 = gf16_mul(a0, b0);
  unsigned char a1b1 = gf16_mul(a1, b1);
  unsigned char a0b1_a1b0 = gf16_mul(a0 ^ a1, b0 ^ b1) ^ a0b0 ^ a1b1;
  unsigned char a1b1_x8 = gf16_mul_8(a1b1);
  return ((a0b1_a1b0 ^ a1b1) << 4) ^ a0b0 ^ a1b1_x8;
}


x86 assembly (clang, -O0):
<gf256_mul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x1(%rbp),%eax
and    $0xf,%eax
mov    %al,-0x3(%rbp)
movzbl -0x1(%rbp),%eax
sar    $0x4,%eax
mov    %al,-0x4(%rbp)
movzbl -0x2(%rbp),%eax
and    $0xf,%eax
mov    %al,-0x5(%rbp)
movzbl -0x2(%rbp),%eax
sar    $0x4,%eax
mov    %al,-0x6(%rbp)
mov    -0x3(%rbp),%al
movzbl %al,%edi
movzbl -0x5(%rbp),%esi
call   1030 <gf16_mul@plt>
mov    %al,-0x7(%rbp)
mov    -0x4(%rbp),%al
movzbl %al,%edi
movzbl -0x6(%rbp),%esi
call   1030 <gf16_mul@plt>
mov    %al,-0x8(%rbp)
movzbl -0x3(%rbp),%eax
movzbl -0x4(%rbp),%ecx
xor    %ecx,%eax
mov    %al,%cl
movzbl -0x5(%rbp),%eax
movzbl -0x6(%rbp),%edx
xor    %edx,%eax
movzbl %cl,%edi
movzbl %al,%esi
call   1030 <gf16_mul@plt>
movzbl %al,%eax
movzbl -0x7(%rbp),%ecx
xor    %ecx,%eax
movzbl -0x8(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0x9(%rbp)
movzbl -0x8(%rbp),%edi
call   1040 <gf16_mul_8@plt>
mov    %al,-0xa(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0x8(%rbp),%ecx
xor    %ecx,%eax
shl    $0x4,%eax
movzbl -0x7(%rbp),%ecx
xor    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    %ecx,%eax
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gf256_mul>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
mov    %edi,%r12d
and    $0xf,%r12b
mov    %edi,%ebp
shr    $0x4,%bpl
mov    %esi,%r13d
and    $0xf,%r13b
mov    %esi,%ebx
shr    $0x4,%bl
and    $0xf,%edi
and    $0xf,%esi
call   1030 <gf16_mul@plt>
mov    %eax,%r14d
movzbl %bpl,%ebp
movzbl %bl,%ebx
mov    %ebp,%edi
mov    %ebx,%esi
call   1030 <gf16_mul@plt>
mov    %eax,%r15d
xor    %r12b,%bpl
xor    %r13b,%bl
movzbl %bpl,%edi
movzbl %bl,%esi
call   1030 <gf16_mul@plt>
mov    %eax,%ebx
xor    %r14b,%bl
movzbl %r15b,%edi
call   1040 <gf16_mul_8@plt>
shl    $0x4,%bl
xor    %r14b,%al
xor    %bl,%al
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define zeroext i8 @gf256_mul(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8
%11 = alloca i8
%12 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = and i32 %14, 15
%16 = trunc i32 %15 to i8
store i8 %16, i8* %5
%17 = load i8, i8* %3
%18 = zext i8 %17 to i32
%19 = ashr i32 %18, 4
%20 = trunc i32 %19 to i8
store i8 %20, i8* %6
%21 = load i8, i8* %4
%22 = zext i8 %21 to i32
%23 = and i32 %22, 15
%24 = trunc i32 %23 to i8
store i8 %24, i8* %7
%25 = load i8, i8* %4
%26 = zext i8 %25 to i32
%27 = ashr i32 %26, 4
%28 = trunc i32 %27 to i8
store i8 %28, i8* %8
%29 = load i8, i8* %5
%30 = load i8, i8* %7
%31 = call zeroext i8 @gf16_mul(i8 zeroext %29, i8 zeroext %30)
store i8 %31, i8* %9
%32 = load i8, i8* %6
%33 = load i8, i8* %8
%34 = call zeroext i8 @gf16_mul(i8 zeroext %32, i8 zeroext %33)
store i8 %34, i8* %10
%35 = load i8, i8* %5
%36 = zext i8 %35 to i32
%37 = load i8, i8* %6
%38 = zext i8 %37 to i32
%39 = xor i32 %36, %38
%40 = trunc i32 %39 to i8
%41 = load i8, i8* %7
%42 = zext i8 %41 to i32
%43 = load i8, i8* %8
%44 = zext i8 %43 to i32
%45 = xor i32 %42, %44
%46 = trunc i32 %45 to i8
%47 = call zeroext i8 @gf16_mul(i8 zeroext %40, i8 zeroext %46)
%48 = zext i8 %47 to i32
%49 = load i8, i8* %9
%50 = zext i8 %49 to i32
%51 = xor i32 %48, %50
%52 = load i8, i8* %10
%53 = zext i8 %52 to i32
%54 = xor i32 %51, %53
%55 = trunc i32 %54 to i8
store i8 %55, i8* %11
%56 = load i8, i8* %10
%57 = call zeroext i8 @gf16_mul_8(i8 zeroext %56)
store i8 %57, i8* %12
%58 = load i8, i8* %11
%59 = zext i8 %58 to i32
%60 = load i8, i8* %10
%61 = zext i8 %60 to i32
%62 = xor i32 %59, %61
%63 = shl i32 %62, 4
%64 = load i8, i8* %9
%65 = zext i8 %64 to i32
%66 = xor i32 %63, %65
%67 = load i8, i8* %12
%68 = zext i8 %67 to i32
%69 = xor i32 %66, %68
%70 = trunc i32 %69 to i8
ret i8 %70
}

LLVM IR (-O2):
define zeroext i8 @gf256_mul(i8 zeroext %0, i8 zeroext %1) {
%3 = and i8 %0, 15
%4 = lshr i8 %0, 4
%5 = and i8 %1, 15
%6 = lshr i8 %1, 4
%7 = tail call zeroext i8 @gf16_mul(i8 zeroext %3, i8 zeroext %5)
%8 = tail call zeroext i8 @gf16_mul(i8 zeroext %4, i8 zeroext %6)
%9 = xor i8 %3, %4
%10 = xor i8 %5, %6
%11 = tail call zeroext i8 @gf16_mul(i8 zeroext %9, i8 zeroext %10)
%12 = xor i8 %11, %7
%13 = tail call zeroext i8 @gf16_mul_8(i8 zeroext %8)
%14 = shl i8 %12, 4
%15 = xor i8 %13, %7
%16 = xor i8 %15, %14
ret i8 %16
}