#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;
typedef scalar_t__ ui32Base;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
int _PWMGenValid(int);
void PWMGenIntTrigDisable(uint32_t ui32Base, uint32_t ui32Gen,
                          uint32_t ui32IntTrig) {
  ASSERT((ui32Base == 0x40028000) || (ui32Base == 0x40029000));
  ASSERT(_PWMGenValid(ui32Gen));
  ASSERT((ui32IntTrig & ~(0x00000001 | 0x00000002 | 0x00000004 | 0x00000008 |
                          0x00000010 | 0x00000020 | 0x00000100 | 0x00000200 |
                          0x00000400 | 0x00000800 | 0x00001000 | 0x00002000)) ==
         0);
  (*((volatile uint32_t *)(((ui32Base) + (ui32Gen)) + 0x00000004))) &=
      ~(ui32IntTrig);
}


x86 assembly (clang, -O0):
<PWMGenIntTrigDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    $0x1,%al
cmpl   $0x40028000,-0x4(%rbp)
mov    %al,-0xd(%rbp)
je     1150 <PWMGenIntTrigDisable+0x30>
cmpl   $0x40029000,-0x4(%rbp)
sete   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <ASSERT@plt>
mov    -0x8(%rbp),%edi
call   1030 <_PWMGenValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
mov    -0xc(%rbp),%eax
and    $0xffffc0c0,%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <ASSERT@plt>
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    $0x4,%eax
cltq
mov    (%rax),%ecx
and    %edx,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMGenIntTrigDisable>:
push   %r15
push   %r14
push   %rbx
mov    %edx,%ebx
mov    %esi,%r14d
mov    %edi,%r15d
mov    %edi,%eax
and    $0xffffefff,%eax
xor    %edi,%edi
cmp    $0x40028000,%eax
sete   %dil
call   1040 <ASSERT@plt>
mov    %r14d,%edi
call   1030 <_PWMGenValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
xor    %edi,%edi
test   $0xffffc0c0,%ebx
sete   %dil
call   1040 <ASSERT@plt>
not    %ebx
lea    (%r15,%r14,1),%eax
add    $0x4,%eax
cltq
and    %ebx,(%rax)
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @PWMGenIntTrigDisable(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = icmp eq i32 %7, 1073905664
br i1 %8, label %12, label %9
9: ; preds = %3
%10 = load i32, i32* %4
%11 = icmp eq i32 %10, 1073909760
br label %12
12: ; preds = %9, %3
%13 = phi i1 [ true, %3 ], [ %11, %9 ]
%14 = zext i1 %13 to i32
%15 = call i32 @ASSERT(i32 %14)
%16 = load i32, i32* %5
%17 = call i32 @_PWMGenValid(i32 %16)
%18 = call i32 @ASSERT(i32 %17)
%19 = load i32, i32* %6
%20 = and i32 %19, -16192
%21 = icmp eq i32 %20, 0
%22 = zext i1 %21 to i32
%23 = call i32 @ASSERT(i32 %22)
%24 = load i32, i32* %6
%25 = xor i32 %24, -1
%26 = load i32, i32* %4
%27 = load i32, i32* %5
%28 = add nsw i32 %26, %27
%29 = add nsw i32 %28, 4
%30 = sext i32 %29 to i64
%31 = inttoptr i64 %30 to i32*
%32 = load volatile i32, i32* %31
%33 = and i32 %32, %25
store volatile i32 %33, i32* %31
ret void
}

LLVM IR (-O2):
define void @PWMGenIntTrigDisable(i32 %0, i32 %1, i32 %2) {
%4 = and i32 %0, -4097
%5 = icmp eq i32 %4, 1073905664
%6 = zext i1 %5 to i32
%7 = tail call i32 @ASSERT(i32 %6)
%8 = tail call i32 @_PWMGenValid(i32 %1)
%9 = tail call i32 @ASSERT(i32 %8)
%10 = and i32 %2, -16192
%11 = icmp eq i32 %10, 0
%12 = zext i1 %11 to i32
%13 = tail call i32 @ASSERT(i32 %12)
%14 = xor i32 %2, -1
%15 = add i32 %0, 4
%16 = add i32 %15, %1
%17 = sext i32 %16 to i64
%18 = inttoptr i64 %17 to i32*
%19 = load volatile i32, i32* %18
%20 = and i32 %19, %14
store volatile i32 %20, i32* %18
ret void
}