xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_eval(int);
void mixedSignedness18(int a) {
  if (a >= 0)
    return;
  clang_analyzer_eval(a < 0);
  clang_analyzer_eval(a == (unsigned)(-((~0U) & ((~0U) >> 1)) - 1));
  clang_analyzer_eval(a == (~0U));
}


x86 assembly (clang, -O0):
<mixedSignedness18>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     112a <mixedSignedness18+0x1a>
jmp    1160 <mixedSignedness18+0x50>
cmpl   $0x0,-0x4(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <clang_analyzer_eval@plt>
cmpl   $0x80000000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <clang_analyzer_eval@plt>
cmpl   $0xffffffff,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <clang_analyzer_eval@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mixedSignedness18>:
test   %edi,%edi
js     1115 <mixedSignedness18+0x5>
ret
push   %rbx
mov    %edi,%ebx
mov    $0x1,%edi
call   1030 <clang_analyzer_eval@plt>
xor    %edi,%edi
cmp    $0x80000000,%ebx
sete   %dil
call   1030 <clang_analyzer_eval@plt>
xor    %edi,%edi
cmp    $0xffffffff,%ebx
sete   %dil
pop    %rbx
jmp    1030 <clang_analyzer_eval@plt>

LLVM IR (-O0):
define void @mixedSignedness18(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %19
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp slt i32 %7, 0
%9 = zext i1 %8 to i32
%10 = call i32 @clang_analyzer_eval(i32 %9)
%11 = load i32, i32* %2
%12 = icmp eq i32 %11, -2147483648
%13 = zext i1 %12 to i32
%14 = call i32 @clang_analyzer_eval(i32 %13)
%15 = load i32, i32* %2
%16 = icmp eq i32 %15, -1
%17 = zext i1 %16 to i32
%18 = call i32 @clang_analyzer_eval(i32 %17)
br label %19
19: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
define void @mixedSignedness18(i32 %0) {
%2 = icmp sgt i32 %0, -1
br i1 %2, label %11, label %3
3: ; preds = %1
%4 = tail call i32 @clang_analyzer_eval(i32 1)
%5 = icmp eq i32 %0, -2147483648
%6 = zext i1 %5 to i32
%7 = tail call i32 @clang_analyzer_eval(i32 %6)
%8 = icmp eq i32 %0, -1
%9 = zext i1 %8 to i32
%10 = tail call i32 @clang_analyzer_eval(i32 %9)
br label %11
11: ; preds = %1, %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ inv_fifo_protocol_helper_decode_q30_quat(void const *,
                                                            int /*<<< orphan*/,
                                                            float *, float *,
                                                            float *, float *,
                                                            float *);
void inv_fifo_protocol_helper_decode_rv_data(const void *in, uint16_t len,
                                             float *x, float *y, float *z,
                                             float *w, float *a) {
  inv_fifo_protocol_helper_decode_q30_quat(in, len, x, y, z, w, a);
}


x86 assembly (clang, -O0):
<inv_fifo_protocol_helper_decode_rv_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    -0x30(%rbp),%r9
mov    0x10(%rbp),%rax
mov    %rax,(%rsp)
call   1030 <inv_fifo_protocol_helper_decode_q30_quat@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inv_fifo_protocol_helper_decode_rv_data>:
jmp    1030 <inv_fifo_protocol_helper_decode_q30_quat@plt>

LLVM IR (-O0):
define void @inv_fifo_protocol_helper_decode_rv_data(i8* %0, i32 %1, float* %2, float* %3, float* %4, float* %5, float* %6) {
%8 = alloca i8*
%9 = alloca i32
%10 = alloca float*
%11 = alloca float*
%12 = alloca float*
%13 = alloca float*
%14 = alloca float*
store i8* %0, i8** %8
store i32 %1, i32* %9
store float* %2, float** %10
store float* %3, float** %11
store float* %4, float** %12
store float* %5, float** %13
store float* %6, float** %14
%15 = load i8*, i8** %8
%16 = load i32, i32* %9
%17 = load float*, float** %10
%18 = load float*, float** %11
%19 = load float*, float** %12
%20 = load float*, float** %13
%21 = load float*, float** %14
%22 = call i32 @inv_fifo_protocol_helper_decode_q30_quat(i8* %15, i32 %16, float* %17, float* %18, float* %19, float* %20, float* %21)
ret void
}

LLVM IR (-O2):
define void @inv_fifo_protocol_helper_decode_rv_data(i8* %0, i32 %1, float* %2, float* %3, float* %4, float* %5, float* %6) {
%8 = tail call i32 @inv_fifo_protocol_helper_decode_q30_quat(i8* %0, i32 %1, float* %2, float* %3, float* %4, float* %5, float* %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GPIO4_Combined_0_15_DriverIRQHandler();
__attribute__((weak)) void GPIO4_Combined_0_15_IRQHandler(void) {
  GPIO4_Combined_0_15_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<GPIO4_Combined_0_15_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GPIO4_Combined_0_15_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIO4_Combined_0_15_IRQHandler>:
xor    %eax,%eax
jmp    1030 <GPIO4_Combined_0_15_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @GPIO4_Combined_0_15_IRQHandler() {
%1 = call i32 (...) @GPIO4_Combined_0_15_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @GPIO4_Combined_0_15_IRQHandler() {
%1 = tail call i32 (...) @GPIO4_Combined_0_15_DriverIRQHandler()
ret void
}
/* Type definitions */
struct mat4 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mat4_negative(float *, float *);
__attribute__((always_)) struct mat4 *psmat4_negative(struct mat4 *result,
                                                      struct mat4 *m) {
  mat4_negative((float *)result, (float *)m);
  return result;
}


x86 assembly (clang, -O0):
<psmat4_negative>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <mat4_negative@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psmat4_negative>:
push   %rbx
mov    %rdi,%rbx
call   1030 <mat4_negative@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.mat4 = type { i32 }
define %struct.mat4* @psmat4_negative(%struct.mat4* %0, %struct.mat4* %1) {
%3 = alloca %struct.mat4*
%4 = alloca %struct.mat4*
store %struct.mat4* %0, %struct.mat4** %3
store %struct.mat4* %1, %struct.mat4** %4
%5 = load %struct.mat4*, %struct.mat4** %3
%6 = bitcast %struct.mat4* %5 to float*
%7 = load %struct.mat4*, %struct.mat4** %4
%8 = bitcast %struct.mat4* %7 to float*
%9 = call i32 @mat4_negative(float* %6, float* %8)
%10 = load %struct.mat4*, %struct.mat4** %3
ret %struct.mat4* %10
}

LLVM IR (-O2):
%struct.mat4 = type { i32 }
define %struct.mat4* @psmat4_negative(%struct.mat4* returned %0, %struct.mat4* %1) {
%3 = bitcast %struct.mat4* %0 to float*
%4 = bitcast %struct.mat4* %1 to float*
%5 = tail call i32 @mat4_negative(float* %3, float* %4)
ret %struct.mat4* %0
}
/* Variables and functions */
int /*<<< orphan*/ malloc(int);
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int main(int argc, char *argv[]) {
  printf("%p\n", malloc(4));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %eax,%esi
lea    0xeb7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%p\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @malloc(i32 4)
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%p\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @malloc(i32 4)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
/* Type definitions */
struct comp {
  int dummy;
};
struct BrzCaseFetch_ {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ SEND_REQUP(int);
int /*<<< orphan*/ TRACE_FOLLOW_THREAD(int, int /*<<< orphan*/);
void BrzCaseFetch_requp(struct comp *comp, int port) {
  struct BrzCaseFetch_ *c = (struct BrzCaseFetch_ *)comp;
  TRACE_FOLLOW_THREAD(1, 0);
  SEND_REQUP(1);
}


x86 assembly (clang, -O0):
<BrzCaseFetch_requp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <TRACE_FOLLOW_THREAD@plt>
mov    $0x1,%edi
call   1040 <SEND_REQUP@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BrzCaseFetch_requp>:
push   %rax
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <TRACE_FOLLOW_THREAD@plt>
mov    $0x1,%edi
pop    %rax
jmp    1040 <SEND_REQUP@plt>

LLVM IR (-O0):
%struct.comp = type { i32 }
%struct.BrzCaseFetch_ = type { i32 }
define void @BrzCaseFetch_requp(%struct.comp* %0, i32 %1) {
%3 = alloca %struct.comp*
%4 = alloca i32
%5 = alloca %struct.BrzCaseFetch_*
store %struct.comp* %0, %struct.comp** %3
store i32 %1, i32* %4
%6 = load %struct.comp*, %struct.comp** %3
%7 = bitcast %struct.comp* %6 to %struct.BrzCaseFetch_*
store %struct.BrzCaseFetch_* %7, %struct.BrzCaseFetch_** %5
%8 = call i32 @TRACE_FOLLOW_THREAD(i32 1, i32 0)
%9 = call i32 @SEND_REQUP(i32 1)
ret void
}

LLVM IR (-O2):
%struct.comp = type { i32 }
define void @BrzCaseFetch_requp(%struct.comp* nocapture readnone %0, i32 %1) {
%3 = tail call i32 @TRACE_FOLLOW_THREAD(i32 1, i32 0)
%4 = tail call i32 @SEND_REQUP(i32 1)
ret void
}
int f(int t, int a, int b) {
  int c, d;
  if (t) {
    c = a;
    d = a;
  } else {
    c = b;
    d = b;
  }
  return c + d;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1128 <f+0x28>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1134 <f+0x34>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
add    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
test   %edi,%edi
cmove  %edx,%esi
lea    (%rsi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i32, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %3
%12 = load i32, i32* %5
store i32 %12, i32* %7
%13 = load i32, i32* %5
store i32 %13, i32* %8
br label %17
14: ; preds = %3
%15 = load i32, i32* %6
store i32 %15, i32* %7
%16 = load i32, i32* %6
store i32 %16, i32* %8
br label %17
17: ; preds = %14, %11
%18 = load i32, i32* %7
%19 = load i32, i32* %8
%20 = add nsw i32 %18, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @f(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %0, 0
%5 = select i1 %4, i32 %2, i32 %1
%6 = shl nsw i32 %5, 1
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ std_err(char *);
badcomm() {
  std_err("Usage: mknod name b/c major minor\n");
  exit(1);
}


x86 assembly (clang, -O0):
<badcomm>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <std_err@plt>
mov    $0x1,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<badcomm>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <std_err@plt>
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"Usage: mknod name b/c major minor\0A\00"
define i32 @badcomm() {
%1 = call i32 @std_err(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [35 x i8] c"Usage: mknod name b/c major minor\0A\00"
define i32 @badcomm() {
%1 = tail call i32 @std_err(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 1)
unreachable
}
void ff_hevc_put_hevc_bi_w_qpel_hv48_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_qpel_hv48_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_qpel_hv48_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_qpel_hv48_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_qpel_hv48_10_sse4() {
ret void
}
void f(double t, const double *y, double *yp) {
  (void)t;
  yp[0] = y[1];
  yp[1] = -1000.0 * y[0] - 1001.0 * y[1];
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movsd  0xed2(%rip),%xmm1
mulsd  0x8(%rax),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
movsd  0xea6(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
movsd  0x8(%rdi),%xmm0
movsd  %xmm0,(%rsi)
movsd  (%rdi),%xmm0
movsd  0x8(%rdi),%xmm1
mulsd  0xee6(%rip),%xmm1
mulsd  0xee6(%rip),%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,0x8(%rsi)
ret

LLVM IR (-O0):
define void @f(double %0, double* %1, double* %2) {
%4 = alloca double
%5 = alloca double*
%6 = alloca double*
store double %0, double* %4
store double* %1, double** %5
store double* %2, double** %6
%7 = load double, double* %4
%8 = load double*, double** %5
%9 = getelementptr inbounds double, double* %8, i64 1
%10 = load double, double* %9
%11 = load double*, double** %6
%12 = getelementptr inbounds double, double* %11, i64 0
store double %10, double* %12
%13 = load double*, double** %5
%14 = getelementptr inbounds double, double* %13, i64 0
%15 = load double, double* %14
%16 = load double*, double** %5
%17 = getelementptr inbounds double, double* %16, i64 1
%18 = load double, double* %17
%19 = fmul double 1.001000e+03, %18
%20 = fneg double %19
%21 = call double @llvm.fmuladd.f64(double -1.000000e+03, double %15, double %20)
%22 = load double*, double** %6
%23 = getelementptr inbounds double, double* %22, i64 1
store double %21, double* %23
ret void
}

LLVM IR (-O2):
define void @f(double %0, double* nocapture %1, double* nocapture writeonly %2) {
%4 = getelementptr inbounds double, double* %1, i64 1
%5 = load double, double* %4
store double %5, double* %2
%6 = load double, double* %1
%7 = load double, double* %4
%8 = fmul double %7, -1.001000e+03
%9 = tail call double @llvm.fmuladd.f64(double %6, double -1.000000e+03, double %8)
%10 = getelementptr inbounds double, double* %2, i64 1
store double %9, double* %10
ret void
}
__float128 from_uns_int(unsigned int a) { return (__float128)a; }


x86 assembly (clang, -O0):
<from_uns_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1120 <__floatunsitf>
add    $0x10,%rsp
pop    %rbp
ret
nopl   0x0(%rax)

x86 assembly (clang, -O2):
<from_uns_int>:
push   %rax
call   1110 <__floatunsitf>
pop    %rax
ret
nopl   0x0(%rax,%rax,1)

LLVM IR (-O0):
define fp128 @from_uns_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = uitofp i32 %3 to fp128
ret fp128 %4
}

LLVM IR (-O2):
define fp128 @from_uns_int(i32 %0) {
%2 = uitofp i32 %0 to fp128
ret fp128 %2
}
void DMA1_Channel6_IRQHandler(void) {}


x86 assembly (clang, -O0):
<DMA1_Channel6_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMA1_Channel6_IRQHandler>:
ret

LLVM IR (-O0):
define void @DMA1_Channel6_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @DMA1_Channel6_IRQHandler() {
ret void
}
/* Variables and functions */
unsigned long div15_loop(unsigned long const, int /*<<< orphan*/);
unsigned long int div15(unsigned long int const i) { return div15_loop(i, 0); }


x86 assembly (clang, -O0):
<div15>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <div15_loop@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<div15>:
xor    %esi,%esi
jmp    1030 <div15_loop@plt>

LLVM IR (-O0):
define i64 @div15(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @div15_loop(i64 %3, i32 0)
ret i64 %4
}

LLVM IR (-O2):
define i64 @div15(i64 %0) {
%2 = tail call i64 @div15_loop(i64 %0, i32 0)
ret i64 %2
}
int _setup() {}


x86 assembly (clang, -O0):
<_setup>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_setup>:
ret

LLVM IR (-O0):
define i32 @_setup() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @_setup() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ ngen(char *, char *, int /*<<< orphan*/);
void cginc1iw(void) { ngen("%s\t(%%eax)", "incl", 0); }


x86 assembly (clang, -O0):
<cginc1iw>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee9(%rip),%rsi
xor    %edx,%edx
call   1030 <ngen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cginc1iw>:
lea    0xee9(%rip),%rdi
lea    0xeed(%rip),%rsi
xor    %edx,%edx
jmp    1030 <ngen@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"%s\09(%%eax)\00"
@.str.1 = [5 x i8] c"incl\00"
define void @cginc1iw() {
%1 = call i32 @ngen(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 0)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"%s\09(%%eax)\00"
@.str.1 = [5 x i8] c"incl\00"
define void @cginc1iw() {
%1 = tail call i32 @ngen(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 0)
ret void
}
/* Variables and functions */
bool uid_wrapper_enabled(void) { return false; }


x86 assembly (clang, -O0):
<uid_wrapper_enabled>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uid_wrapper_enabled>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @uid_wrapper_enabled() {
ret i32 0
}

LLVM IR (-O2):
define i32 @uid_wrapper_enabled() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ BBM_POWER_OFF(void *);
void mtv_power_off(void *hDevice) { BBM_POWER_OFF(hDevice); }


x86 assembly (clang, -O0):
<mtv_power_off>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <BBM_POWER_OFF@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mtv_power_off>:
jmp    1030 <BBM_POWER_OFF@plt>

LLVM IR (-O0):
define void @mtv_power_off(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @BBM_POWER_OFF(i8* %3)
ret void
}

LLVM IR (-O2):
define void @mtv_power_off(i8* %0) {
%2 = tail call i32 @BBM_POWER_OFF(i8* %0)
ret void
}
void blankREPORTmember(void *info, int memberid) { return; }


x86 assembly (clang, -O0):
<blankREPORTmember>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<blankREPORTmember>:
ret

LLVM IR (-O0):
define void @blankREPORTmember(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @blankREPORTmember(i8* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
scalar_t__ ft_memcpy(char *, char *, size_t);
scalar_t__ malloc(size_t);
char *ft_strsub(char *str, size_t start, size_t len) {
  char *s;
  s = (char *)malloc(len + 1);
  if (!s)
    return (NULL);
  return ((char *)ft_memcpy(s, str + start, len));
}


x86 assembly (clang, -O0):
<ft_strsub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
add    $0x1,%rdi
call   1030 <malloc@plt>
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
jne    115d <ft_strsub+0x3d>
movq   $0x0,-0x8(%rbp)
jmp    1176 <ft_strsub+0x56>
mov    -0x28(%rbp),%rdi
mov    -0x10(%rbp),%rsi
add    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1040 <ft_memcpy@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strsub>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
lea    0x1(%rdx),%rdi
call   1030 <malloc@plt>
test   %rax,%rax
je     114f <ft_strsub+0x2f>
add    %r15,%rbx
mov    %rax,%rdi
mov    %rbx,%rsi
mov    %r14,%rdx
call   1040 <ft_memcpy@plt>
jmp    1151 <ft_strsub+0x31>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @ft_strsub(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i8*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%9 = load i64, i64* %7
%10 = add i64 %9, 1
%11 = call i64 @malloc(i64 %10)
%12 = inttoptr i64 %11 to i8*
store i8* %12, i8** %8
%13 = load i8*, i8** %8
%14 = icmp ne i8* %13, null
br i1 %14, label %16, label %15
15: ; preds = %3
store i8* null, i8** %4
br label %24
16: ; preds = %3
%17 = load i8*, i8** %8
%18 = load i8*, i8** %5
%19 = load i64, i64* %6
%20 = getelementptr inbounds i8, i8* %18, i64 %19
%21 = load i64, i64* %7
%22 = call i64 @ft_memcpy(i8* %17, i8* %20, i64 %21)
%23 = inttoptr i64 %22 to i8*
store i8* %23, i8** %4
br label %24
24: ; preds = %16, %15
%25 = load i8*, i8** %4
ret i8* %25
}

LLVM IR (-O2):
define i8* @ft_strsub(i8* %0, i64 %1, i64 %2) {
%4 = add i64 %2, 1
%5 = tail call i64 @malloc(i64 %4)
%6 = icmp eq i64 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %3
%8 = inttoptr i64 %5 to i8*
%9 = getelementptr inbounds i8, i8* %0, i64 %1
%10 = tail call i64 @ft_memcpy(i8* %8, i8* %9, i64 %2)
%11 = inttoptr i64 %10 to i8*
br label %12
12: ; preds = %3, %7
%13 = phi i8* [ %11, %7 ], [ null, %3 ]
ret i8* %13
}
int foo(int *a, int i) {
  __builtin_assume(i != 4);
  __builtin_assume(++i > 2);
  int test = sizeof(struct { char qq[(__builtin_assume(i != 5), 7)]; });
  return a[i];
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x7,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @foo(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 4
store i32 7, i32* %5
%8 = load i32*, i32** %3
%9 = load i32, i32* %4
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @foo(i32* nocapture %0, i32 %1) {
%3 = icmp ne i32 %1, 4
tail call void @llvm.assume(i1 %3)
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
ret i32 %6
}
void ff_hevc_put_hevc_pel_pixels6_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_pel_pixels6_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_pel_pixels6_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_pel_pixels6_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_pel_pixels6_10_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TEMP_PANIC_DriverIRQHandler();
__attribute__((weak)) void TEMP_PANIC_IRQHandler(void) {
  TEMP_PANIC_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<TEMP_PANIC_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <TEMP_PANIC_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TEMP_PANIC_IRQHandler>:
xor    %eax,%eax
jmp    1030 <TEMP_PANIC_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @TEMP_PANIC_IRQHandler() {
%1 = call i32 (...) @TEMP_PANIC_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @TEMP_PANIC_IRQHandler() {
%1 = tail call i32 (...) @TEMP_PANIC_DriverIRQHandler()
ret void
}
/* Variables and functions */
double tan(double);
__attribute__((__weak__, __always___)) double softboundmpx_tan(double x) {
  return tan(x);
}


x86 assembly (clang, -O0):
<softboundmpx_tan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <tan@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_tan>:
jmp    1030 <tan@plt>

LLVM IR (-O0):
define weak double @softboundmpx_tan(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @tan(double %3)
ret double %4
}

LLVM IR (-O2):
define weak double @softboundmpx_tan(double %0) {
%2 = tail call double @tan(double %0)
ret double %2
}
void ASN1_UTCTIME_print(void) {}


x86 assembly (clang, -O0):
<ASN1_UTCTIME_print>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_UTCTIME_print>:
ret

LLVM IR (-O0):
define void @ASN1_UTCTIME_print() {
ret void
}

LLVM IR (-O2):
define void @ASN1_UTCTIME_print() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double (*)(int));
void fun_(double (*f)(int)) { printf("*f: %p\n", &f); }


x86 assembly (clang, -O0):
<fun_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_>:
push   %rax
mov    %rdi,(%rsp)
lea    0xee4(%rip),%rdi
mov    %rsp,%rsi
call   1030 <printf@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [8 x i8] c"*f: %p\0A\00"
define void @fun_(double (i32)* %0) {
%2 = alloca double (i32)*
store double (i32)* %0, double (i32)** %2
%3 = bitcast double (i32)** %2 to double (i32)*
%4 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), double (i32)* %3)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"*f: %p\0A\00"
define void @fun_(double (i32)* %0) {
%2 = alloca double (i32)*
store double (i32)* %0, double (i32)** %2
%3 = bitcast double (i32)** %2 to double (i32)*
%4 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), double (i32)* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert_int_equal(int, int /*<<< orphan*/);
int /*<<< orphan*/ w_east_lever(int, int);
void w_east_lever_test(void **state) {
  assert_int_equal(0x0000000004000000ul,
                   w_east_lever(0x000000000C000000ul, 0x0000000800000000ul));
}


x86 assembly (clang, -O0):
<w_east_lever_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xc000000,%edi
xor    %esi,%esi
call   1040 <w_east_lever@plt>
mov    %eax,%esi
mov    $0x4000000,%edi
call   1030 <assert_int_equal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<w_east_lever_test>:
push   %rax
mov    $0xc000000,%edi
xor    %esi,%esi
call   1040 <w_east_lever@plt>
mov    $0x4000000,%edi
mov    %eax,%esi
pop    %rax
jmp    1030 <assert_int_equal@plt>

LLVM IR (-O0):
define void @w_east_lever_test(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = call i32 @w_east_lever(i32 201326592, i32 0)
%4 = call i32 @assert_int_equal(i32 67108864, i32 %3)
ret void
}

LLVM IR (-O2):
define void @w_east_lever_test(i8** nocapture readnone %0) {
%2 = tail call i32 @w_east_lever(i32 201326592, i32 0)
%3 = tail call i32 @assert_int_equal(i32 67108864, i32 %2)
ret void
}
int test_imm_04int64_lowword_reg(long long val) {
  return ((val) & (0x04 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_04int64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x4,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_04int64_lowword_reg>:
test   $0x4,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_04int64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 4
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_04int64_lowword_reg(i64 %0) {
%2 = and i64 %0, 4
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
void flash_write32(uint32_t addr, uint32_t word) {
  *(volatile uint32_t *)(const uint8_t *)(addr) = word;
}


x86 assembly (clang, -O0):
<flash_write32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<flash_write32>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @flash_write32(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = inttoptr i64 %6 to i32*
%8 = bitcast i32* %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @flash_write32(i64 %0, i64 %1) {
%3 = inttoptr i64 %0 to i64*
store volatile i64 %1, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ deinitfields();
void switch_from_3205x(void) { deinitfields(); }


x86 assembly (clang, -O0):
<switch_from_3205x>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <deinitfields@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<switch_from_3205x>:
xor    %eax,%eax
jmp    1030 <deinitfields@plt>

LLVM IR (-O0):
define void @switch_from_3205x() {
%1 = call i32 (...) @deinitfields()
ret void
}

LLVM IR (-O2):
define void @switch_from_3205x() {
%1 = tail call i32 (...) @deinitfields()
ret void
}
void I400ToARGB() {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @I400ToARGB() {
ret void
}

LLVM IR (-O2):
define void @I400ToARGB() {
ret void
}
unsigned int create_pixel_shader(const char *src) {
  unsigned int sdr, prog = 0;
  return prog;
}


x86 assembly (clang, -O0):
<create_pixel_shader>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_pixel_shader>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @create_pixel_shader(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %4
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @create_pixel_shader(i8* nocapture readnone %0) {
ret i32 0
}
unsigned int clamp(int x) {
  int r = x;
  if (r < 0)
    return 0;
  else if (r > 255)
    return 255;
  else
    return r;
}


x86 assembly (clang, -O0):
<clamp>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    1123 <clamp+0x23>
movl   $0x0,-0x4(%rbp)
jmp    1142 <clamp+0x42>
cmpl   $0xff,-0xc(%rbp)
jle    113c <clamp+0x3c>
movl   $0xff,-0x4(%rbp)
jmp    1142 <clamp+0x42>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clamp>:
cmp    $0xff,%edi
mov    $0xff,%ecx
cmovl  %edi,%ecx
xor    %eax,%eax
test   %ecx,%ecx
cmovns %ecx,%eax
ret

LLVM IR (-O0):
define i32 @clamp(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
store i32 %5, i32* %4
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %15
9: ; preds = %1
%10 = load i32, i32* %4
%11 = icmp sgt i32 %10, 255
br i1 %11, label %12, label %13
12: ; preds = %9
store i32 255, i32* %2
br label %15
13: ; preds = %9
%14 = load i32, i32* %4
store i32 %14, i32* %2
br label %15
15: ; preds = %13, %12, %8
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @clamp(i32 %0) {
%2 = icmp slt i32 %0, 255
%3 = select i1 %2, i32 %0, i32 255
%4 = icmp sgt i32 %3, 0
%5 = select i1 %4, i32 %3, i32 0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ say(char *, int);
void talk(void) { say("A barrel", 1); }


x86 assembly (clang, -O0):
<talk>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x1,%esi
call   1030 <say@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<talk>:
lea    0xee9(%rip),%rdi
mov    $0x1,%esi
jmp    1030 <say@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"A barrel\00"
define void @talk() {
%1 = call i32 @say(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"A barrel\00"
define void @talk() {
%1 = tail call i32 @say(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int main() {
  int b = 15;
  int *c = &b;
  if (c == NULL) {
    printf("c = a;\n");
  } else {
    printf("c = %d;\n", *c);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xf,-0x8(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114c <main+0x3c>
lea    0xec0(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
jmp    1160 <main+0x50>
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
lea    0xeaf(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0xf,%esi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"c = a;\0A\00"
@.str.1 = [9 x i8] c"c = %d;\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
store i32 0, i32* %1
store i32 15, i32* %2
store i32* %2, i32** %3
%4 = load i32*, i32** %3
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %12
8: ; preds = %0
%9 = load i32*, i32** %3
%10 = load i32, i32* %9
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32 %10)
br label %12
12: ; preds = %8, %6
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [9 x i8] c"c = %d;\0A\00"
define i32 @main() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i32 15)
ret i32 0
}
long mksym_i64() { return 0; }


x86 assembly (clang, -O0):
<mksym_i64>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mksym_i64>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @mksym_i64() {
ret i64 0
}

LLVM IR (-O2):
define i64 @mksym_i64() {
ret i64 0
}
/* Type definitions */
typedef int /*<<< orphan*/ ENGINE;

/* Variables and functions */
int e_rsax_ctrl(ENGINE *e, int cmd, long i, void *p, void (*f)(void)) {
  int to_return = 1;
  switch (cmd) {
  default:
    to_return = 0;
    break;
  }
  return to_return;
}


x86 assembly (clang, -O0):
<e_rsax_ctrl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
movl   $0x1,-0x2c(%rbp)
movl   $0x0,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_rsax_ctrl>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @e_rsax_ctrl(i32* %0, i32 %1, i64 %2, i8* %3, void ()* %4) {
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i64
%9 = alloca i8*
%10 = alloca void ()*
%11 = alloca i32
store i32* %0, i32** %6
store i32 %1, i32* %7
store i64 %2, i64* %8
store i8* %3, i8** %9
store void ()* %4, void ()** %10
store i32 1, i32* %11
%12 = load i32, i32* %7
switch i32 %12, label %13 [
]
13: ; preds = %5
store i32 0, i32* %11
br label %14
14: ; preds = %13
%15 = load i32, i32* %11
ret i32 %15
}

LLVM IR (-O2):
define i32 @e_rsax_ctrl(i32* nocapture readnone %0, i32 %1, i64 %2, i8* nocapture readnone %3, void ()* nocapture readnone %4) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int uint16_t;

/* Variables and functions */
int /*<<< orphan*/ swap32(int /*<<< orphan*/);
uint32_t tobe32(uint32_t x) {
  return (*(uint16_t *)"\0\1" == 1) ? x : swap32(x);
}


x86 assembly (clang, -O0):
<tobe32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,0xede(%rip)
jne    1133 <tobe32+0x23>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    113e <tobe32+0x2e>
mov    -0x4(%rbp),%edi
call   1030 <swap32@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tobe32>:
jmp    1030 <swap32@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"\00\01\00"
define i32 @tobe32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* bitcast ([3 x i8]* @.str to i32*)
%4 = icmp eq i32 %3, 1
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i32, i32* %2
br label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = call i32 @swap32(i32 %8)
br label %10
10: ; preds = %7, %5
%11 = phi i32 [ %6, %5 ], [ %9, %7 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @tobe32(i32 %0) {
%2 = tail call i32 @swap32(i32 %0)
ret i32 %2
}
/* Variables and functions */
void *calloc(size_t, size_t);
int /*<<< orphan*/ perror(char *);
void *xcalloc(size_t nmemb, size_t size) {
  void *ret;
  ret = calloc(nmemb, size);
  if (!ret)
    perror("calloc");
  return (ret);
}


x86 assembly (clang, -O0):
<xcalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1158 <xcalloc+0x38>
lea    0xead(%rip),%rdi
call   1040 <perror@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xcalloc>:
push   %rbx
call   1030 <calloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1133 <xcalloc+0x13>
mov    %rbx,%rax
pop    %rbx
ret
lea    0xec6(%rip),%rdi
call   1040 <perror@plt>
jmp    112e <xcalloc+0xe>

LLVM IR (-O0):
@.str = [7 x i8] c"calloc\00"
define i8* @xcalloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i8* @calloc(i64 %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %13, label %11
11: ; preds = %2
%12 = call i32 @perror(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %2
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
@.str = [7 x i8] c"calloc\00"
define noalias i8* @xcalloc(i64 %0, i64 %1) {
%3 = tail call i8* @calloc(i64 %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @perror(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void output(const char *str) { printf("%s\n", str); }


x86 assembly (clang, -O0):
<output>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<output>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @output(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @output(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ initial_gasmix_c(double *, double *);
void initial_gasmix(double initial_concentration, double inlet_concentration) {
  initial_gasmix_c(&initial_concentration, &inlet_concentration);
}


x86 assembly (clang, -O0):
<initial_gasmix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
lea    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <initial_gasmix_c@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initial_gasmix>:
sub    $0x18,%rsp
movsd  %xmm0,0x10(%rsp)
movsd  %xmm1,0x8(%rsp)
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rsi
call   1030 <initial_gasmix_c@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @initial_gasmix(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = call i32 @initial_gasmix_c(double* %3, double* %4)
ret void
}

LLVM IR (-O2):
define void @initial_gasmix(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = call i32 @initial_gasmix_c(double* %3, double* %4)
ret void
}
unsigned char inb(int portnum) {
  unsigned char data = 0;
  asm("inb %%dx, %%al" : "=a"(data) : "d"(portnum));
  return data;
}


x86 assembly (clang, -O0):
<inb>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movb   $0x0,-0x5(%rbp)
mov    -0x4(%rbp),%edx
in     (%dx),%al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inb>:
mov    %edi,%edx
in     (%dx),%al
ret

LLVM IR (-O0):
define zeroext i8 @inb(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
store i8 0, i8* %3
%4 = load i32, i32* %2
%5 = call i8 asm "inb %dx, %al", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i32 %4)
store i8 %5, i8* %3
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @inb(i32 %0) {
%2 = tail call i8 asm "inb %dx, %al", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i32 %0)
ret i8 %2
}
void short_function(void) {}


x86 assembly (clang, -O0):
<short_function>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<short_function>:
ret

LLVM IR (-O0):
define void @short_function() {
ret void
}

LLVM IR (-O2):
define void @short_function() {
ret void
}
void smpc_wait_till_ready() {
  while ((*(volatile unsigned char *)(0x20100000 + 0x63)) & 0x1) {
  }
}


x86 assembly (clang, -O0):
<smpc_wait_till_ready>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <smpc_wait_till_ready+0x9>
mov    $0x20100063,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1124 <smpc_wait_till_ready+0x24>
jmp    1109 <smpc_wait_till_ready+0x9>
pop    %rbp
ret

x86 assembly (clang, -O2):
<smpc_wait_till_ready>:
testb  $0x1,0x20100063
01
jne    1100 <smpc_wait_till_ready>
ret

LLVM IR (-O0):
define void @smpc_wait_till_ready() {
br label %1
1: ; preds = %6, %0
%2 = load volatile i8, i8* inttoptr (i64 537919587 to i8*)
%3 = zext i8 %2 to i32
%4 = and i32 %3, 1
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
br label %1
7: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @smpc_wait_till_ready() {
br label %1
1: ; preds = %1, %0
%2 = load volatile i8, i8* inttoptr (i64 537919587 to i8*)
%3 = and i8 %2, 1
%4 = icmp eq i8 %3, 0
br i1 %4, label %5, label %1
5: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_numTimesReached();
int /*<<< orphan*/ clang_analyzer_warnOnDeadSymbol(int);
int conjure_index();
void test_that_expr_inspection_works() {
  do {
    int x = conjure_index();
    clang_analyzer_warnOnDeadSymbol(x);
  } while (0);
  clang_analyzer_numTimesReached();
}


x86 assembly (clang, -O0):
<test_that_expr_inspection_works>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <conjure_index@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <clang_analyzer_warnOnDeadSymbol@plt>
mov    $0x0,%al
call   1030 <clang_analyzer_numTimesReached@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_that_expr_inspection_works>:
push   %rax
xor    %eax,%eax
call   1050 <conjure_index@plt>
mov    %eax,%edi
call   1040 <clang_analyzer_warnOnDeadSymbol@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <clang_analyzer_numTimesReached@plt>

LLVM IR (-O0):
define void @test_that_expr_inspection_works() {
%1 = alloca i32
br label %2
2: ; preds = %0
%3 = call i32 (...) @conjure_index()
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = call i32 @clang_analyzer_warnOnDeadSymbol(i32 %4)
br label %6
6: ; preds = %2
%7 = call i32 (...) @clang_analyzer_numTimesReached()
ret void
}

LLVM IR (-O2):
define void @test_that_expr_inspection_works() {
%1 = tail call i32 (...) @conjure_index()
%2 = tail call i32 @clang_analyzer_warnOnDeadSymbol(i32 %1)
%3 = tail call i32 (...) @clang_analyzer_numTimesReached()
ret void
}
int max(int a, int b) {
  if (a >= b) {
    return a;
  } else {
    return b;
  }
}


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jl     1121 <max+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <max+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
mov    %edi,%eax
cmp    %esi,%edi
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define i32 @max(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp sge i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @max(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
/* Variables and functions */
unsigned char gfmultby02(unsigned char);
unsigned char gfmultby0b(unsigned char b) {
  return (unsigned char)((int)gfmultby02(gfmultby02(gfmultby02(b))) ^
                         (int)gfmultby02(b) ^ (int)b);
}


x86 assembly (clang, -O0):
<gfmultby0b>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <gfmultby02@plt>
movzbl %al,%edi
call   1030 <gfmultby02@plt>
movzbl %al,%edi
call   1030 <gfmultby02@plt>
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <gfmultby02@plt>
mov    %al,%cl
mov    -0x8(%rbp),%eax
movzbl %cl,%ecx
xor    %ecx,%eax
movzbl -0x1(%rbp),%ecx
xor    %ecx,%eax
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfmultby0b>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
call   1030 <gfmultby02@plt>
movzbl %al,%edi
call   1030 <gfmultby02@plt>
movzbl %al,%edi
call   1030 <gfmultby02@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1030 <gfmultby02@plt>
xor    %bl,%al
xor    %bpl,%al
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define zeroext i8 @gfmultby0b(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call zeroext i8 @gfmultby02(i8 zeroext %3)
%5 = call zeroext i8 @gfmultby02(i8 zeroext %4)
%6 = call zeroext i8 @gfmultby02(i8 zeroext %5)
%7 = zext i8 %6 to i32
%8 = load i8, i8* %2
%9 = call zeroext i8 @gfmultby02(i8 zeroext %8)
%10 = zext i8 %9 to i32
%11 = xor i32 %7, %10
%12 = load i8, i8* %2
%13 = zext i8 %12 to i32
%14 = xor i32 %11, %13
%15 = trunc i32 %14 to i8
ret i8 %15
}

LLVM IR (-O2):
define zeroext i8 @gfmultby0b(i8 zeroext %0) {
%2 = tail call zeroext i8 @gfmultby02(i8 zeroext %0)
%3 = tail call zeroext i8 @gfmultby02(i8 zeroext %2)
%4 = tail call zeroext i8 @gfmultby02(i8 zeroext %3)
%5 = tail call zeroext i8 @gfmultby02(i8 zeroext %0)
%6 = xor i8 %4, %0
%7 = xor i8 %6, %5
ret i8 %7
}