xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void *, int);
void __attribute__((regparm(3))) memcpy_21(void *dest, void *src) {
  memcpy(dest, src, 21);
}


x86 assembly (clang, -O0):
<memcpy_21>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x15,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcpy_21>:
mov    $0x15,%edx
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @memcpy_21(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @memcpy(i8* %5, i8* %6, i32 21)
ret void
}

LLVM IR (-O2):
define void @memcpy_21(i8* %0, i8* %1) {
%3 = tail call i32 @memcpy(i8* %0, i8* %1, i32 21)
ret void
}
void JvRunMain(void) {}


x86 assembly (clang, -O0):
<JvRunMain>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<JvRunMain>:
ret

LLVM IR (-O0):
define void @JvRunMain() {
ret void
}

LLVM IR (-O2):
define void @JvRunMain() {
ret void
}
int bar(int i) {
  volatile int v[4];
  int *p;
  v[i] = 6;
  p = (int *)&v[i];
  *p = 8;
  return v[i];
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
movl   $0x6,-0x20(%rbp,%rax,4)
movslq -0x4(%rbp),%rcx
lea    -0x20(%rbp),%rax
shl    $0x2,%rcx
add    %rcx,%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
movl   $0x8,(%rax)
movslq -0x4(%rbp),%rax
mov    -0x20(%rbp,%rax,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
movslq %edi,%rax
movl   $0x6,-0x18(%rsp,%rax,4)
movl   $0x8,-0x18(%rsp,%rax,4)
mov    -0x18(%rsp,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @bar(i32 %0) {
%2 = alloca i32
%3 = alloca [4 x i32]
%4 = alloca i32*
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 %6
store volatile i32 6, i32* %7
%8 = load i32, i32* %2
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 %9
store i32* %10, i32** %4
%11 = load i32*, i32** %4
store i32 8, i32* %11
%12 = load i32, i32* %2
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 %13
%15 = load volatile i32, i32* %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @bar(i32 %0) {
%2 = alloca [4 x i32]
%3 = bitcast [4 x i32]* %2 to i8*
%4 = sext i32 %0 to i64
%5 = getelementptr inbounds [4 x i32], [4 x i32]* %2, i64 0, i64 %4
store volatile i32 6, i32* %5
store i32 8, i32* %5
%6 = load volatile i32, i32* %5
ret i32 %6
}
signed int f32(signed int v_foo) {
  signed int v_and = v_foo & -7;
  signed int v_shl = v_and << 10;
  return v_shl;
}


x86 assembly (clang, -O0):
<f32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xfffffff9,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0xa,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f32>:
mov    %edi,%eax
and    $0xfffffff9,%eax
shl    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @f32(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = and i32 %5, -7
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = shl i32 %7, 10
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @f32(i32 %0) {
%2 = shl i32 %0, 10
%3 = and i32 %2, -7168
ret i32 %3
}
/* Variables and functions */
char *getenv(char *);
int strstr(char const *, char *);
bool parser_log_enabled() {
  const char *log = getenv("CHOPSUI_LOG");
  if (!log) {
    return false;
  }
  return strstr(log, "parser");
}


x86 assembly (clang, -O0):
<parser_log_enabled>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <getenv@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114f <parser_log_enabled+0x2f>
movl   $0x0,-0x4(%rbp)
jmp    1162 <parser_log_enabled+0x42>
mov    -0x10(%rbp),%rdi
lea    0xeb2(%rip),%rsi
call   1040 <strstr@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parser_log_enabled>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <getenv@plt>
test   %rax,%rax
je     1142 <parser_log_enabled+0x22>
lea    0xed3(%rip),%rsi
mov    %rax,%rdi
pop    %rax
jmp    1040 <strstr@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"CHOPSUI_LOG\00"
@.str.1 = [7 x i8] c"parser\00"
define i32 @parser_log_enabled() {
%1 = alloca i32
%2 = alloca i8*
%3 = call i8* @getenv(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
store i8* %3, i8** %2
%4 = load i8*, i8** %2
%5 = icmp ne i8* %4, null
br i1 %5, label %7, label %6
6: ; preds = %0
store i32 0, i32* %1
br label %10
7: ; preds = %0
%8 = load i8*, i8** %2
%9 = call i32 @strstr(i8* %8, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
store i32 %9, i32* %1
br label %10
10: ; preds = %7, %6
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
@.str = [12 x i8] c"CHOPSUI_LOG\00"
@.str.1 = [7 x i8] c"parser\00"
define i32 @parser_log_enabled() {
%1 = tail call i8* @getenv(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i8* %1, null
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @strstr(i8* %1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
br label %5
5: ; preds = %0, %3
%6 = phi i32 [ %4, %3 ], [ 0, %0 ]
ret i32 %6
}
void gtk_window_get_skip_taskbar_hint() {}


x86 assembly (clang, -O0):
<gtk_window_get_skip_taskbar_hint>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_window_get_skip_taskbar_hint>:
ret

LLVM IR (-O0):
define void @gtk_window_get_skip_taskbar_hint() {
ret void
}

LLVM IR (-O2):
define void @gtk_window_get_skip_taskbar_hint() {
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef scalar_t__ uint16_t;

/* Variables and functions */
void *MK_PTR(uint16_t __seg, uint16_t __offs) {
  return (void *)(((uint32_t)__seg << 4) + (uint32_t)__offs);
}


x86 assembly (clang, -O0):
<MK_PTR>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x4,%eax
mov    -0x10(%rbp),%rcx
add    %ecx,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<MK_PTR>:
shl    $0x4,%edi
add    %edi,%esi
movslq %esi,%rax
ret

LLVM IR (-O0):
define i8* @MK_PTR(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = trunc i64 %5 to i32
%7 = shl i32 %6, 4
%8 = load i64, i64* %4
%9 = trunc i64 %8 to i32
%10 = add nsw i32 %7, %9
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i8*
ret i8* %12
}

LLVM IR (-O2):
define i8* @MK_PTR(i64 %0, i64 %1) {
%3 = trunc i64 %0 to i32
%4 = shl i32 %3, 4
%5 = trunc i64 %1 to i32
%6 = add nsw i32 %4, %5
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i8*
ret i8* %8
}
void sighandler_destroy() {}


x86 assembly (clang, -O0):
<sighandler_destroy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sighandler_destroy>:
ret

LLVM IR (-O0):
define void @sighandler_destroy() {
ret void
}

LLVM IR (-O2):
define void @sighandler_destroy() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, int, int);
void exitfunc14(int status, void *arg) {
  printf("Executing exitfunc14 (status=%d, arg=%d)\n", status, (int)arg);
  exit((int)arg);
}


x86 assembly (clang, -O0):
<exitfunc14>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rax
mov    %eax,%edx
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%rax
mov    %eax,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<exitfunc14>:
push   %rbx
mov    %rsi,%rbx
mov    %edi,%esi
lea    0xed3(%rip),%rdi
mov    %ebx,%edx
call   1030 <printf@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [42 x i8] c"Executing exitfunc14 (status=%d, arg=%d)\0A\00"
define void @exitfunc14(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = ptrtoint i8* %6 to i32
%8 = call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %7)
%9 = load i8*, i8** %4
%10 = ptrtoint i8* %9 to i32
%11 = call i32 @exit(i32 %10)
unreachable
}

LLVM IR (-O2):
@.str = [42 x i8] c"Executing exitfunc14 (status=%d, arg=%d)\0A\00"
define void @exitfunc14(i32 %0, i8* %1) {
%3 = ptrtoint i8* %1 to i64
%4 = trunc i64 %3 to i32
%5 = tail call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %4)
%6 = tail call i32 @exit(i32 %4)
unreachable
}
__attribute__((always_)) long div_ll_X_l_rem(long long divs, long div,
                                             long *rem) {
  long dum2;
  __asm__("divl %2" : "=a"(dum2), "=d"(*rem) : "rm"(div), "A"(divs));
  return dum2;
}


x86 assembly (clang, -O0):
<div_ll_X_l_rem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,-0x28(%rbp)
divl   -0x28(%rbp)
mov    %rax,%rcx
mov    -0x30(%rbp),%rax
mov    %rcx,-0x20(%rbp)
mov    %rdx,(%rax)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define i64 @div_ll_X_l_rem(i64 %0, i64 %1, i64* %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64*
%7 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64* %2, i64** %6
%8 = load i64*, i64** %6
%9 = load i64, i64* %5
%10 = load i64, i64* %4
%11 = call { i64, i64 } asm "divl $2", "={ax},={dx},rm,A,~{dirflag},~{fpsr},~{flags}"(i64 %9, i64 %10)
%12 = extractvalue { i64, i64 } %11, 0
%13 = extractvalue { i64, i64 } %11, 1
store i64 %12, i64* %7
store i64 %13, i64* %8
%14 = load i64, i64* %7
ret i64 %14
}

LLVM IR (-O2):
/* Variables and functions */
int /*<<< orphan*/ init_byte_mem();
int /*<<< orphan*/ init_mpage_mem();
int /*<<< orphan*/ init_vpage_mem();
void mem_init(void) {
  init_mpage_mem();
  init_vpage_mem();
  init_byte_mem();
}


x86 assembly (clang, -O0):
<mem_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <init_mpage_mem@plt>
mov    $0x0,%al
call   1050 <init_vpage_mem@plt>
mov    $0x0,%al
call   1040 <init_byte_mem@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_init>:
push   %rax
xor    %eax,%eax
call   1030 <init_mpage_mem@plt>
xor    %eax,%eax
call   1050 <init_vpage_mem@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <init_byte_mem@plt>

LLVM IR (-O0):
define void @mem_init() {
%1 = call i32 (...) @init_mpage_mem()
%2 = call i32 (...) @init_vpage_mem()
%3 = call i32 (...) @init_byte_mem()
ret void
}

LLVM IR (-O2):
define void @mem_init() {
%1 = tail call i32 (...) @init_mpage_mem()
%2 = tail call i32 (...) @init_vpage_mem()
%3 = tail call i32 (...) @init_byte_mem()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int main() {
  unsigned x = (unsigned char)-5;
  if (x != 251)
    abort();
  return -5u < 10;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xfb,-0x8(%rbp)
cmpl   $0xfb,-0x8(%rbp)
je     113a <main+0x2a>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 251, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 251
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 (...) @abort()
unreachable
7: ; preds = %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ MAXPATHLEN;
int /*<<< orphan*/ errno;
char *getcwd(char *, int /*<<< orphan*/);
int /*<<< orphan*/ strerror_r(int /*<<< orphan*/, char *, int /*<<< orphan*/);
char *getwd(char *buf) {
  char *p;
  if ((p = getcwd(buf, MAXPATHLEN)))
    return (p);
  (void)strerror_r(errno, buf, MAXPATHLEN);
  return ((char *)NULL);
}


x86 assembly (clang, -O0):
<getwd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
call   1030 <getcwd@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
je     1159 <getwd+0x39>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    117c <getwd+0x5c>
mov    0x2e78(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
mov    0x2e7b(%rip),%rax
mov    (%rax),%edx
call   1040 <strerror_r@plt>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getwd>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
mov    0x2eb9(%rip),%r15
mov    (%r15),%esi
call   1030 <getcwd@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1153 <getwd+0x33>
mov    0x2e92(%rip),%rax
mov    (%rax),%edi
mov    (%r15),%edx
mov    %r14,%rsi
call   1040 <strerror_r@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@MAXPATHLEN = global i32 0
@errno = global i32 0
define i8* @getwd(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = load i32, i32* @MAXPATHLEN
%7 = call i8* @getcwd(i8* %5, i32 %6)
store i8* %7, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i8*, i8** %4
store i8* %10, i8** %2
br label %16
11: ; preds = %1
%12 = load i32, i32* @errno
%13 = load i8*, i8** %3
%14 = load i32, i32* @MAXPATHLEN
%15 = call i32 @strerror_r(i32 %12, i8* %13, i32 %14)
store i8* null, i8** %2
br label %16
16: ; preds = %11, %9
%17 = load i8*, i8** %2
ret i8* %17
}

LLVM IR (-O2):
@MAXPATHLEN = global i32 0
@errno = global i32 0
define i8* @getwd(i8* %0) {
%2 = load i32, i32* @MAXPATHLEN
%3 = tail call i8* @getcwd(i8* %0, i32 %2)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* @errno
%7 = load i32, i32* @MAXPATHLEN
%8 = tail call i32 @strerror_r(i32 %6, i8* %0, i32 %7)
br label %9
9: ; preds = %1, %5
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ err(int, char *, size_t);
void *malloc(size_t);
void *xmalloc(size_t len) {
  void *ret = malloc(len);
  if (ret == NULL)
    err(1, "couldn't malloc %d bytes\n", len);
  return ret;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1159 <xmalloc+0x39>
mov    -0x8(%rbp),%rdx
mov    $0x1,%edi
lea    0xeac(%rip),%rsi
call   1030 <err@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1148 <xmalloc+0x28>
lea    0xec5(%rip),%rsi
mov    $0x1,%edi
mov    %r14,%rdx
call   1030 <err@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [26 x i8] c"couldn't malloc %d bytes\0A\00"
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i64, i64* %2
%10 = call i32 @err(i32 1, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i64 %9)
br label %11
11: ; preds = %8, %1
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
@.str = [26 x i8] c"couldn't malloc %d bytes\0A\00"
define noalias i8* @xmalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @err(i32 1, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i64 %0)
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void chk(int x, int y) { printf(x == y ? "OK\n" : "NG\n"); }


x86 assembly (clang, -O0):
<chk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x8(%rbp),%edx
lea    0xed9(%rip),%rdi
lea    0xece(%rip),%rax
cmp    %edx,%ecx
cmove  %rax,%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chk>:
cmp    %esi,%edi
lea    0xee7(%rip),%rax
lea    0xee4(%rip),%rdi
cmove  %rax,%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"OK\0A\00"
@.str.1 = [4 x i8] c"NG\0A\00"
define void @chk(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp eq i32 %5, %6
%8 = zext i1 %7 to i64
%9 = select i1 %7, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0)
%10 = call i32 @printf(i8* %9)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"OK\0A\00"
@.str.1 = [4 x i8] c"NG\0A\00"
define void @chk(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, %1
%4 = select i1 %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0)
%5 = tail call i32 @printf(i8* dereferenceable(1) %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ emit_1_or_2_operandsl_vartext(char *, char *);
void special_fsubl(void) { emit_1_or_2_operandsl_vartext("fsub", "fsubr"); }


x86 assembly (clang, -O0):
<special_fsubl>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee3(%rip),%rsi
call   1030 <emit_1_or_2_operandsl_vartext@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<special_fsubl>:
lea    0xee9(%rip),%rdi
lea    0xee7(%rip),%rsi
jmp    1030 <emit_1_or_2_operandsl_vartext@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"fsub\00"
@.str.1 = [6 x i8] c"fsubr\00"
define void @special_fsubl() {
%1 = call i32 @emit_1_or_2_operandsl_vartext(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"fsub\00"
@.str.1 = [6 x i8] c"fsubr\00"
define void @special_fsubl() {
%1 = tail call i32 @emit_1_or_2_operandsl_vartext(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
struct srcu_struct {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ BUG();
void __srcu_read_unlock(struct srcu_struct *sp, int idx) { BUG(); }


x86 assembly (clang, -O0):
<__srcu_read_unlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <BUG@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__srcu_read_unlock>:
xor    %eax,%eax
jmp    1030 <BUG@plt>

LLVM IR (-O0):
%struct.srcu_struct = type { i32 }
define void @__srcu_read_unlock(%struct.srcu_struct* %0, i32 %1) {
%3 = alloca %struct.srcu_struct*
%4 = alloca i32
store %struct.srcu_struct* %0, %struct.srcu_struct** %3
store i32 %1, i32* %4
%5 = call i32 (...) @BUG()
ret void
}

LLVM IR (-O2):
%struct.srcu_struct = type { i32 }
define void @__srcu_read_unlock(%struct.srcu_struct* nocapture readnone %0, i32 %1) {
%3 = tail call i32 (...) @BUG()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void csv_header_print() {
  printf("num_work_items,num_work_items_in_work_group,num_encrypt_blocks_for_"
         "work_item,total_blocks_size,instructions_per_byte,execution_time,"
         "encrypted_data,speed_byte_per_sec\n");
}


x86 assembly (clang, -O0):
<csv_header_print>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<csv_header_print>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [167 x i8] c"num_work_items,num_work_items_in_work_group,num_encrypt_blocks_for_work_item,total_blocks_size,instructions_per_byte,execution_time,encrypted_data,speed_byte_per_sec\0A\00"
define void @csv_header_print() {
%1 = call i32 @printf(i8* getelementptr inbounds ([167 x i8], [167 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [166 x i8] c"num_work_items,num_work_items_in_work_group,num_encrypt_blocks_for_work_item,total_blocks_size,instructions_per_byte,execution_time,encrypted_data,speed_byte_per_sec\00"
define void @csv_header_print() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([166 x i8], [166 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pr_inf(char *, char const *);
int /*<<< orphan*/ stress_check_capability(int /*<<< orphan*/);
int stress_memhotplug_supported(const char *name) {
  if (!stress_check_capability((0))) {
    pr_inf("%s stressor will be skipped, "
           "need to be running with CAP_SYS_ADMIN "
           "rights for this stressor\n",
           name);
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<stress_memhotplug_supported>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
xor    %edi,%edi
call   1030 <stress_check_capability@plt>
cmp    $0x0,%eax
jne    1158 <stress_memhotplug_supported+0x38>
mov    -0x10(%rbp),%rsi
lea    0xeb9(%rip),%rdi
call   1040 <pr_inf@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    115f <stress_memhotplug_supported+0x3f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stress_memhotplug_supported>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %ebp,%ebp
xor    %edi,%edi
call   1030 <stress_check_capability@plt>
test   %eax,%eax
jne    1147 <stress_memhotplug_supported+0x27>
lea    0xec6(%rip),%rdi
mov    %rbx,%rsi
call   1040 <pr_inf@plt>
mov    $0xffffffff,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [93 x i8] c"%s stressor will be skipped, need to be running with CAP_SYS_ADMIN rights for this stressor\0A\00"
define i32 @stress_memhotplug_supported(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = call i32 @stress_check_capability(i32 0)
%5 = icmp ne i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i8*, i8** %3
%8 = call i32 @pr_inf(i8* getelementptr inbounds ([93 x i8], [93 x i8]* @.str, i64 0, i64 0), i8* %7)
store i32 -1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@.str = [93 x i8] c"%s stressor will be skipped, need to be running with CAP_SYS_ADMIN rights for this stressor\0A\00"
define i32 @stress_memhotplug_supported(i8* %0) {
%2 = tail call i32 @stress_check_capability(i32 0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @pr_inf(i8* getelementptr inbounds ([93 x i8], [93 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ -1, %4 ], [ 0, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(char *, char *);
void uninitvar_strcmp(void) {
  char *str1;
  char *str2;
  (void)strcmp(str1, str2);
}


x86 assembly (clang, -O0):
<uninitvar_strcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_strcmp>:
ret

LLVM IR (-O0):
define void @uninitvar_strcmp() {
%1 = alloca i8*
%2 = alloca i8*
%3 = load i8*, i8** %1
%4 = load i8*, i8** %2
%5 = call i32 @strcmp(i8* %3, i8* %4)
ret void
}

LLVM IR (-O2):
define void @uninitvar_strcmp() {
ret void
}
void setmem(int address, int value) {
  int *address_as_pointer = (int *)address;
  *address_as_pointer = value;
}


x86 assembly (clang, -O0):
<setmem>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movslq -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<setmem>:
movslq %edi,%rax
mov    %esi,(%rax)
ret

LLVM IR (-O0):
define void @setmem(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
store i32* %8, i32** %5
%9 = load i32, i32* %4
%10 = load i32*, i32** %5
store i32 %9, i32* %10
ret void
}

LLVM IR (-O2):
define void @setmem(i32 %0, i32 %1) {
%3 = sext i32 %0 to i64
%4 = inttoptr i64 %3 to i32*
store i32 %1, i32* %4
ret void
}
int foo(int x, int y) { return x - y < 0; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
cmp    $0x0,%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
cmp    %esi,%edi
setl   %al
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
%8 = icmp slt i32 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
void simple_object_set_big_16(unsigned char *buf, unsigned short val) {
  buf[0] = (val >> 8) & 0xff;
  buf[1] = val & 0xff;
}


x86 assembly (clang, -O0):
<simple_object_set_big_16>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
movzwl -0xa(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
movzwl -0xa(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<simple_object_set_big_16>:
rol    $0x8,%si
mov    %si,(%rdi)
ret

LLVM IR (-O0):
define void @simple_object_set_big_16(i8* %0, i16 zeroext %1) {
%3 = alloca i8*
%4 = alloca i16
store i8* %0, i8** %3
store i16 %1, i16* %4
%5 = load i16, i16* %4
%6 = zext i16 %5 to i32
%7 = ashr i32 %6, 8
%8 = and i32 %7, 255
%9 = trunc i32 %8 to i8
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 0
store i8 %9, i8* %11
%12 = load i16, i16* %4
%13 = zext i16 %12 to i32
%14 = and i32 %13, 255
%15 = trunc i32 %14 to i8
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i64 1
store i8 %15, i8* %17
ret void
}

LLVM IR (-O2):
define void @simple_object_set_big_16(i8* nocapture writeonly %0, i16 zeroext %1) {
%3 = lshr i16 %1, 8
%4 = trunc i16 %3 to i8
store i8 %4, i8* %0
%5 = trunc i16 %1 to i8
%6 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %5, i8* %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Lut_N(double *, double *, int);
void Lut_7(double *out, double *in) { Lut_N(out, in, 7); }


x86 assembly (clang, -O0):
<Lut_7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x7,%edx
call   1030 <Lut_N@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Lut_7>:
mov    $0x7,%edx
jmp    1030 <Lut_N@plt>

LLVM IR (-O0):
define void @Lut_7(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = load double*, double** %4
%7 = call i32 @Lut_N(double* %5, double* %6, i32 7)
ret void
}

LLVM IR (-O2):
define void @Lut_7(double* %0, double* %1) {
%3 = tail call i32 @Lut_N(double* %0, double* %1, i32 7)
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ ppuSetNameTblHorizontal();
int /*<<< orphan*/ ppuSetNameTblVertical();
void rambo1setParamsA000(uint16_t addr, uint8_t val) {
  (void)addr;
  if ((val & 1) == 0) {
    ppuSetNameTblVertical();
  } else {
    ppuSetNameTblHorizontal();
  }
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
jne    1149 <rambo1setParamsA000+0x29>
mov    $0x0,%al
call   1040 <ppuSetNameTblVertical@plt>
jmp    1150 <rambo1setParamsA000+0x30>
mov    $0x0,%al
call   1030 <ppuSetNameTblHorizontal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
xor    %eax,%eax
test   $0x1,%sil
jne    112d <rambo1setParamsA000+0xd>
jmp    1040 <ppuSetNameTblVertical@plt>
jmp    1030 <ppuSetNameTblHorizontal@plt>

LLVM IR (-O0):
define void @rambo1setParamsA000(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = and i32 %6, 1
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 (...) @ppuSetNameTblVertical()
br label %13
11: ; preds = %2
%12 = call i32 (...) @ppuSetNameTblHorizontal()
br label %13
13: ; preds = %11, %9
ret void
}

LLVM IR (-O2):
define void @rambo1setParamsA000(i32 %0, i32 %1) {
%3 = and i32 %1, 1
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 (...) @ppuSetNameTblVertical()
br label %9
7: ; preds = %2
%8 = tail call i32 (...) @ppuSetNameTblHorizontal()
br label %9
9: ; preds = %7, %5
ret void
}
/* Type definitions */
typedef float int32_t;

/* Variables and functions */
int32_t FloatToFixed(float val) { return val * 4096.0f; }


x86 assembly (clang, -O0):
<FloatToFixed>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<FloatToFixed>:
mulss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @FloatToFixed(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float %3, 4.096000e+03
ret float %4
}

LLVM IR (-O2):
define float @FloatToFixed(float %0) {
%2 = fmul float %0, 4.096000e+03
ret float %2
}
int fun540() { return 540; }


x86 assembly (clang, -O0):
<fun540>:
push   %rbp
mov    %rsp,%rbp
mov    $0x21c,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun540>:
mov    $0x21c,%eax
ret

LLVM IR (-O0):
define i32 @fun540() {
ret i32 540
}

LLVM IR (-O2):
define i32 @fun540() {
ret i32 540
}
/* Variables and functions */
void putc(char c) {
  while (!((*(volatile unsigned long *)0xE2900810) & (1 << 2)))
    ;
  (*(volatile unsigned long *)0xE2900820) = c;
}


x86 assembly (clang, -O0):
<putc>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0xe2900810,%eax
mov    (%rax),%rax
and    $0x4,%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    112c <putc+0x2c>
jmp    1131 <putc+0x31>
jmp    110a <putc+0xa>
movsbq -0x1(%rbp),%rcx
mov    $0xe2900820,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<putc>:
mov    $0xe2900810,%eax
cs nopw 0x0(%rax,%rax,1)
nop
testq  $0x4,(%rax)
je     1110 <putc+0x10>
movsbq %dil,%rcx
mov    %rcx,0x10(%rax)
ret

LLVM IR (-O0):
define void @putc(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
br label %3
3: ; preds = %8, %1
%4 = load volatile i64, i64* inttoptr (i64 3801090064 to i64*)
%5 = and i64 %4, 4
%6 = icmp ne i64 %5, 0
%7 = xor i1 %6, true
br i1 %7, label %8, label %9
8: ; preds = %3
br label %3
9: ; preds = %3
%10 = load i8, i8* %2
%11 = sext i8 %10 to i64
store volatile i64 %11, i64* inttoptr (i64 3801090080 to i64*)
ret void
}

LLVM IR (-O2):
define void @putc(i8 signext %0) {
br label %2
2: ; preds = %2, %1
%3 = load volatile i64, i64* inttoptr (i64 3801090064 to i64*)
%4 = and i64 %3, 4
%5 = icmp eq i64 %4, 0
br i1 %5, label %2, label %6
6: ; preds = %2
%7 = sext i8 %0 to i64
store volatile i64 %7, i64* inttoptr (i64 3801090080 to i64*)
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int int32_t;

/* Variables and functions */
uint32_t zigzag32(int32_t v) {
  if (v < 0)
    return ((uint32_t)(-v)) * 2 - 1;
  else
    return v * 2;
}


x86 assembly (clang, -O0):
<zigzag32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1124 <zigzag32+0x24>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
shl    $0x1,%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    112d <zigzag32+0x2d>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zigzag32>:
lea    (%rdi,%rdi,1),%ecx
test   %edi,%edi
mov    %ecx,%eax
not    %eax
cmovns %ecx,%eax
ret

LLVM IR (-O0):
define i32 @zigzag32(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sub nsw i32 0, %7
%9 = mul nsw i32 %8, 2
%10 = sub nsw i32 %9, 1
store i32 %10, i32* %2
br label %14
11: ; preds = %1
%12 = load i32, i32* %3
%13 = mul nsw i32 %12, 2
store i32 %13, i32* %2
br label %14
14: ; preds = %11, %6
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @zigzag32(i32 %0) {
%2 = icmp slt i32 %0, 0
%3 = mul i32 %0, -2
%4 = add nsw i32 %3, -1
%5 = shl nsw i32 %0, 1
%6 = select i1 %2, i32 %4, i32 %5
ret i32 %6
}
/* Variables and functions */
scalar_t__ strtod(char *, char **);
int getFloat(char *s, float *y) {
  char *endptr;
  *y = (float)strtod(s, &endptr);
  if (*endptr > 0)
    return (0);
  return (1);
}


x86 assembly (clang, -O0):
<getFloat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x20(%rbp),%rsi
call   1030 <strtod@plt>
cvtsi2ss %rax,%xmm0
mov    -0x18(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x20(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jle    1156 <getFloat+0x46>
movl   $0x0,-0x4(%rbp)
jmp    115d <getFloat+0x4d>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getFloat>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
lea    0x8(%rsp),%rsi
call   1030 <strtod@plt>
cvtsi2ss %rax,%xmm0
movss  %xmm0,(%rbx)
mov    0x8(%rsp),%rcx
xor    %eax,%eax
cmpb   $0x0,(%rcx)
setle  %al
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @getFloat(i8* %0, float* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca float*
%6 = alloca i8*
store i8* %0, i8** %4
store float* %1, float** %5
%7 = load i8*, i8** %4
%8 = call i64 @strtod(i8* %7, i8** %6)
%9 = sitofp i64 %8 to float
%10 = load float*, float** %5
store float %9, float* %10
%11 = load i8*, i8** %6
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %2
store i32 0, i32* %3
br label %17
16: ; preds = %2
store i32 1, i32* %3
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @getFloat(i8* %0, float* nocapture writeonly %1) {
%3 = alloca i8*
%4 = bitcast i8** %3 to i8*
%5 = call i64 @strtod(i8* %0, i8** %3)
%6 = sitofp i64 %5 to float
store float %6, float* %1
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = icmp slt i8 %8, 1
%10 = zext i1 %9 to i32
ret i32 %10
}
unsigned char readb(const void *addr) {
  return *(volatile unsigned char *)addr;
}


x86 assembly (clang, -O0):
<readb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readb>:
mov    (%rdi),%al
ret

LLVM IR (-O0):
define zeroext i8 @readb(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load volatile i8, i8* %3
ret i8 %4
}

LLVM IR (-O2):
define zeroext i8 @readb(i8* %0) {
%2 = load volatile i8, i8* %0
ret i8 %2
}
/* Variables and functions */
double cosh(double);
double sech(double x) { return 1.0 / cosh(x); }


x86 assembly (clang, -O0):
<sech>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <cosh@plt>
movaps %xmm0,%xmm1
movsd  0xece(%rip),%xmm0
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sech>:
push   %rax
call   1030 <cosh@plt>
movsd  0xee2(%rip),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @sech(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @cosh(double %3)
%5 = fdiv double 1.000000e+00, %4
ret double %5
}

LLVM IR (-O2):
define double @sech(double %0) {
%2 = tail call double @cosh(double %0)
%3 = fdiv double 1.000000e+00, %2
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ inv_sleep(long);
void msleep(long msecs) { inv_sleep(msecs); }


x86 assembly (clang, -O0):
<msleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <inv_sleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msleep>:
jmp    1030 <inv_sleep@plt>

LLVM IR (-O0):
define void @msleep(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @inv_sleep(i64 %3)
ret void
}

LLVM IR (-O2):
define void @msleep(i64 %0) {
%2 = tail call i32 @inv_sleep(i64 %0)
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;
typedef scalar_t__ int64_t;

/* Variables and functions */
scalar_t__ UINT32_MAX;
int QCBOR_Int64ToUInt32(int64_t src, uint32_t *dest) {
  if (src > UINT32_MAX || src < 0) {
    return -1;
  } else {
    *dest = (uint32_t)src;
  }
  return 0;
}


x86 assembly (clang, -O0):
<QCBOR_Int64ToUInt32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    0x2ee1(%rip),%rcx
cmp    (%rcx),%rax
jg     112b <QCBOR_Int64ToUInt32+0x2b>
cmpq   $0x0,-0x10(%rbp)
jge    1137 <QCBOR_Int64ToUInt32+0x37>
movl   $0xffffffff,-0x4(%rbp)
jmp    1149 <QCBOR_Int64ToUInt32+0x49>
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<QCBOR_Int64ToUInt32>:
mov    $0xffffffff,%eax
test   %rdi,%rdi
js     111b <QCBOR_Int64ToUInt32+0x1b>
mov    0x2ee7(%rip),%rcx
cmp    %rdi,(%rcx)
jl     111b <QCBOR_Int64ToUInt32+0x1b>
mov    %rdi,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
@UINT32_MAX = global i64 0
define i32 @QCBOR_Int64ToUInt32(i64 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64*
store i64 %0, i64* %4
store i64* %1, i64** %5
%6 = load i64, i64* %4
%7 = load i64, i64* @UINT32_MAX
%8 = icmp sgt i64 %6, %7
br i1 %8, label %12, label %9
9: ; preds = %2
%10 = load i64, i64* %4
%11 = icmp slt i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %9, %2
store i32 -1, i32* %3
br label %17
13: ; preds = %9
%14 = load i64, i64* %4
%15 = load i64*, i64** %5
store i64 %14, i64* %15
br label %16
16: ; preds = %13
store i32 0, i32* %3
br label %17
17: ; preds = %16, %12
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
@UINT32_MAX = global i64 0
define i32 @QCBOR_Int64ToUInt32(i64 %0, i64* nocapture writeonly %1) {
%3 = load i64, i64* @UINT32_MAX
%4 = icmp slt i64 %3, %0
%5 = icmp slt i64 %0, 0
%6 = or i1 %5, %4
br i1 %6, label %8, label %7
7: ; preds = %2
store i64 %0, i64* %1
br label %8
8: ; preds = %2, %7
%9 = phi i32 [ 0, %7 ], [ -1, %2 ]
ret i32 %9
}
void extractinttypes() {
  extern int check_extract_result_int;
  extern __typeof(_mm_extract_epi8(_mm_setzero_si128(), 3)) check_result_int;
  extern __typeof(_mm_extract_epi16(_mm_setzero_si128(), 3)) check_result_int;
  extern __typeof(_mm_extract_epi32(_mm_setzero_si128(), 3)) check_result_int;
}


x86 assembly (clang, -O0):
<extractinttypes>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<extractinttypes>:
ret

LLVM IR (-O0):
define void @extractinttypes() {
ret void
}

LLVM IR (-O2):
define void @extractinttypes() {
ret void
}
void ami_context_menu_init(void) {}


x86 assembly (clang, -O0):
<ami_context_menu_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ami_context_menu_init>:
ret

LLVM IR (-O0):
define void @ami_context_menu_init() {
ret void
}

LLVM IR (-O2):
define void @ami_context_menu_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void my_regerror(const char *s) { printf("re error %s\n", s); }


x86 assembly (clang, -O0):
<my_regerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_regerror>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"re error %s\0A\00"
define void @my_regerror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"re error %s\0A\00"
define void @my_regerror(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void uwsgi_tcp_nodelay(int fd) {}


x86 assembly (clang, -O0):
<uwsgi_tcp_nodelay>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<uwsgi_tcp_nodelay>:
ret

LLVM IR (-O0):
define void @uwsgi_tcp_nodelay(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @uwsgi_tcp_nodelay(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int8_t;

/* Variables and functions */
int /*<<< orphan*/ random();
void get_random_bytes(u_int8_t seed[], int num) {
  int i;
  for (i = 0; i < num; i++)
    seed[i] = random();
  return;
}


x86 assembly (clang, -O0):
<get_random_bytes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1154 <get_random_bytes+0x44>
mov    $0x0,%al
call   1030 <random@plt>
mov    %eax,%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <get_random_bytes+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_random_bytes>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1144 <get_random_bytes+0x34>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <random@plt>
mov    %eax,(%r14,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <get_random_bytes+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @get_random_bytes(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %16, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = call i32 (...) @random()
%12 = load i32*, i32** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
store i32 %11, i32* %15
br label %16
16: ; preds = %10
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 1
store i32 %18, i32* %5
br label %6
19: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @get_random_bytes(i32* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %12
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %10, %6 ]
%8 = tail call i32 (...) @random()
%9 = getelementptr inbounds i32, i32* %0, i64 %7
store i32 %8, i32* %9
%10 = add nuw nsw i64 %7, 1
%11 = icmp eq i64 %10, %5
br i1 %11, label %12, label %6
12: ; preds = %6, %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
uint8_t inb(uint16_t port) { return 0; }


x86 assembly (clang, -O0):
<inb>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inb>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @inb(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @inb(i32 %0) {
ret i32 0
}
int mylog(int num) {
  int j;
  int k;
  {
    j = 0;
    k = 1;
    {
      while (1) {
      while_0_continue:;
        if (k < num) {
        } else {
          goto while_0_break;
        }
        k = k * 2;
        j = j + 1;
      }
    while_0_break:;
    }
    return (j);
  }
}


x86 assembly (clang, -O0):
<mylog>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
jmp    111a <mylog+0x1a>
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    112b <mylog+0x2b>
jmp    1130 <mylog+0x30>
jmp    1147 <mylog+0x47>
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1115 <mylog+0x15>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mylog>:
xor    %eax,%eax
cmp    $0x2,%edi
jl     1119 <mylog+0x19>
xor    %eax,%eax
mov    $0x1,%ecx
xchg   %ax,%ax
add    %ecx,%ecx
add    $0x1,%eax
cmp    %edi,%ecx
jl     1110 <mylog+0x10>
ret

LLVM IR (-O0):
define i32 @mylog(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 1, i32* %4
br label %5
5: ; preds = %1, %12
br label %6
6: ; preds = %5
%7 = load i32, i32* %4
%8 = load i32, i32* %2
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %11
10: ; preds = %6
br label %12
11: ; preds = %6
br label %17
12: ; preds = %10
%13 = load i32, i32* %4
%14 = mul nsw i32 %13, 2
store i32 %14, i32* %4
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %5
17: ; preds = %11
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @mylog(i32 %0) {
%2 = icmp sgt i32 %0, 1
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 1, %1 ]
%5 = phi i32 [ %7, %3 ], [ 0, %1 ]
%6 = shl nsw i32 %4, 1
%7 = add nuw nsw i32 %5, 1
%8 = icmp slt i32 %6, %0
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %10
}
/* Variables and functions */
int yaffsfs_bg_gc_common(int /*<<< orphan*/, char const *, int);
int yaffs_do_background_gc(const char *path, int urgency) {
  return yaffsfs_bg_gc_common((0), path, urgency);
}


x86 assembly (clang, -O0):
<yaffs_do_background_gc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
xor    %edi,%edi
call   1030 <yaffsfs_bg_gc_common@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yaffs_do_background_gc>:
mov    %esi,%edx
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <yaffsfs_bg_gc_common@plt>

LLVM IR (-O0):
define i32 @yaffs_do_background_gc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @yaffsfs_bg_gc_common(i32 0, i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @yaffs_do_background_gc(i8* %0, i32 %1) {
%3 = tail call i32 @yaffsfs_bg_gc_common(i32 0, i8* %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
float atan2f(float, float);
float nvg__atan2f(float a, float b) { return atan2f(a, b); }


x86 assembly (clang, -O0):
<nvg__atan2f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <atan2f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nvg__atan2f>:
jmp    1030 <atan2f@plt>

LLVM IR (-O0):
define float @nvg__atan2f(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call float @atan2f(float %5, float %6)
ret float %7
}

LLVM IR (-O2):
define float @nvg__atan2f(float %0, float %1) {
%3 = tail call float @atan2f(float %0, float %1)
ret float %3
}