xunge/DecIR huggingface dataset:
int mb_is_cont(unsigned char c) { return ((c >= 0x80) && (c <= 0xBF)); }


x86 assembly (clang, -O0):
<mb_is_cont>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x80,%ecx
mov    %al,-0x2(%rbp)
jl     112e <mb_is_cont+0x2e>
movzbl -0x1(%rbp),%eax
cmp    $0xbf,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mb_is_cont>:
xor    %eax,%eax
cmp    $0xc0,%dil
setl   %al
ret

LLVM IR (-O0):
define i32 @mb_is_cont(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = icmp sge i32 %4, 128
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = zext i8 %7 to i32
%9 = icmp sle i32 %8, 191
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @mb_is_cont(i8 zeroext %0) {
%2 = icmp slt i8 %0, -64
%3 = zext i1 %2 to i32
ret i32 %3
}
int is_little_endian(void) {
  long one = 1;
  return (*((char *)(&one)));
}


x86 assembly (clang, -O0):
<is_little_endian>:
push   %rbp
mov    %rsp,%rbp
movq   $0x1,-0x8(%rbp)
movsbl -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_little_endian>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_little_endian() {
%1 = alloca i64
store i64 1, i64* %1
%2 = bitcast i64* %1 to i8*
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @is_little_endian() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ lcd_command(int);
void lcd_clear(void) { lcd_command(0x01); }


x86 assembly (clang, -O0):
<lcd_clear>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <lcd_command@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcd_clear>:
mov    $0x1,%edi
jmp    1030 <lcd_command@plt>

LLVM IR (-O0):
define void @lcd_clear() {
%1 = call i32 @lcd_command(i32 1)
ret void
}

LLVM IR (-O2):
define void @lcd_clear() {
%1 = tail call i32 @lcd_command(i32 1)
ret void
}
void *zmemset(void *mem, int c, unsigned size) {
  unsigned i;
  for (i = 0; i < size; i++)
    *((char *)mem + i) = (char)c;
  return 0;
}


x86 assembly (clang, -O0):
<zmemset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jae    113e <zmemset+0x3e>
mov    -0xc(%rbp),%eax
mov    %al,%dl
mov    -0x8(%rbp),%rax
mov    -0x14(%rbp),%ecx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1115 <zmemset+0x15>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zmemset>:
test   %edx,%edx
je     1120 <zmemset+0x10>
push   %rax
mov    %edx,%edx
call   1030 <memset@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @zmemset(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %19, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = icmp ult i32 %9, %10
br i1 %11, label %12, label %22
12: ; preds = %8
%13 = load i32, i32* %5
%14 = trunc i32 %13 to i8
%15 = load i8*, i8** %4
%16 = load i32, i32* %7
%17 = zext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
store i8 %14, i8* %18
br label %19
19: ; preds = %12
%20 = load i32, i32* %7
%21 = add i32 %20, 1
store i32 %21, i32* %7
br label %8
22: ; preds = %8
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @zmemset(i8* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = trunc i32 %1 to i8
%7 = zext i32 %2 to i64
br label %8
8: ; preds = %5, %3
ret i8* null
}
/* Variables and functions */
int increment(int);
int callee3(int n) {
  register int l1 = increment(n);
  register int l2 = increment(l1);
  register int l3 = increment(l2);
  return l1 + l2 + l3;
}


x86 assembly (clang, -O0):
<callee3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <increment@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <increment@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <increment@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<callee3>:
push   %rbp
push   %rbx
push   %rax
call   1030 <increment@plt>
mov    %eax,%ebx
mov    %eax,%edi
call   1030 <increment@plt>
mov    %eax,%ebp
mov    %eax,%edi
call   1030 <increment@plt>
add    %ebx,%ebp
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @callee3(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = call i32 @increment(i32 %6)
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = call i32 @increment(i32 %8)
store i32 %9, i32* %4
%10 = load i32, i32* %4
%11 = call i32 @increment(i32 %10)
store i32 %11, i32* %5
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = add nsw i32 %12, %13
%15 = load i32, i32* %5
%16 = add nsw i32 %14, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @callee3(i32 %0) {
%2 = tail call i32 @increment(i32 %0)
%3 = tail call i32 @increment(i32 %2)
%4 = tail call i32 @increment(i32 %3)
%5 = add nsw i32 %3, %2
%6 = add nsw i32 %5, %4
ret i32 %6
}
/* Variables and functions */
double __infer_nondet_double();
double atanh(double x) { return __infer_nondet_double(); }


x86 assembly (clang, -O0):
<atanh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_double@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atanh>:
xor    %eax,%eax
jmp    1030 <__infer_nondet_double@plt>

LLVM IR (-O0):
define double @atanh(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = call double (...) @__infer_nondet_double()
ret double %3
}

LLVM IR (-O2):
define double @atanh(double %0) {
%2 = tail call double (...) @__infer_nondet_double()
ret double %2
}
/* Variables and functions */
scalar_t__ random();
int rand(void) { return ((int)random()); }


x86 assembly (clang, -O0):
<rand>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <random@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand>:
xor    %eax,%eax
jmp    1030 <random@plt>

LLVM IR (-O0):
define i32 @rand() {
%1 = call i64 (...) @random()
%2 = trunc i64 %1 to i32
ret i32 %2
}

LLVM IR (-O2):
define i32 @rand() {
%1 = tail call i64 (...) @random()
%2 = trunc i64 %1 to i32
ret i32 %2
}
void Play_SFX(unsigned char i) {}


x86 assembly (clang, -O0):
<Play_SFX>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Play_SFX>:
ret

LLVM IR (-O0):
define void @Play_SFX(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
ret void
}

LLVM IR (-O2):
define void @Play_SFX(i8 zeroext %0) {
ret void
}
int sum(int arr[], int size) {
  if (size == 0)
    return 0;
  else
    return sum(arr, size - 1) + arr[size - 1];
}


x86 assembly (clang, -O0):
<sum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    1135 <sum+0x25>
movl   $0x0,-0x4(%rbp)
jmp    1157 <sum+0x47>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
sub    $0x1,%esi
call   1030 <sum@plt>
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
movslq %edx,%rdx
add    (%rcx,%rdx,4),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum>:
test   %esi,%esi
je     1135 <sum+0x25>
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
lea    -0x1(%rbx),%esi
call   1030 <sum@plt>
movslq %ebx,%rcx
add    -0x4(%r14,%rcx,4),%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sum(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 0, i32* %3
br label %21
9: ; preds = %2
%10 = load i32*, i32** %4
%11 = load i32, i32* %5
%12 = sub nsw i32 %11, 1
%13 = call i32 @sum(i32* %10, i32 %12)
%14 = load i32*, i32** %4
%15 = load i32, i32* %5
%16 = sub nsw i32 %15, 1
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %14, i64 %17
%19 = load i32, i32* %18
%20 = add nsw i32 %13, %19
store i32 %20, i32* %3
br label %21
21: ; preds = %9, %8
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @sum(i32* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2, %6
%5 = phi i32 [ %12, %6 ], [ 0, %2 ]
ret i32 %5
6: ; preds = %2
%7 = add nsw i32 %1, -1
%8 = tail call i32 @sum(i32* %0, i32 %7)
%9 = sext i32 %7 to i64
%10 = getelementptr inbounds i32, i32* %0, i64 %9
%11 = load i32, i32* %10
%12 = add nsw i32 %11, %8
br label %4
}
/* Variables and functions */
long Random();
long Equilikely(long a, long b) { return (a + (long)((b - a + 1) * Random())); }


x86 assembly (clang, -O0):
<Equilikely>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
sub    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
mov    $0x0,%al
call   1030 <Random@plt>
mov    -0x20(%rbp),%rcx
mov    %rax,%rdx
mov    -0x18(%rbp),%rax
imul   %rdx,%rcx
add    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Equilikely>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
sub    %rdi,%rsi
lea    0x1(%rsi),%r14
xor    %eax,%eax
call   1030 <Random@plt>
imul   %r14,%rax
add    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @Equilikely(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = load i64, i64* %3
%8 = sub nsw i64 %6, %7
%9 = add nsw i64 %8, 1
%10 = call i64 (...) @Random()
%11 = mul nsw i64 %9, %10
%12 = add nsw i64 %5, %11
ret i64 %12
}

LLVM IR (-O2):
define i64 @Equilikely(i64 %0, i64 %1) {
%3 = sub i64 1, %0
%4 = add i64 %3, %1
%5 = tail call i64 (...) @Random()
%6 = mul nsw i64 %5, %4
%7 = add nsw i64 %6, %0
ret i64 %7
}
void decrypt(char *s) {
  while (*s) {
    *s -= 2;
    s++;
  }
}


x86 assembly (clang, -O0):
<decrypt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1132 <decrypt+0x32>
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
sub    $0x2,%ecx
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <decrypt+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<decrypt>:
mov    (%rdi),%al
test   %al,%al
je     1120 <decrypt+0x20>
add    $0x1,%rdi
nopw   0x0(%rax,%rax,1)
add    $0xfe,%al
mov    %al,-0x1(%rdi)
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
jne    1110 <decrypt+0x10>
ret

LLVM IR (-O0):
define void @decrypt(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = sub nsw i32 %10, 2
%12 = trunc i32 %11 to i8
store i8 %12, i8* %8
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %2
br label %3
15: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @decrypt(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = add i8 %5, -2
store i8 %7, i8* %6
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
void do_something_useful() {}


x86 assembly (clang, -O0):
<do_something_useful>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_something_useful>:
ret

LLVM IR (-O0):
define void @do_something_useful() {
ret void
}

LLVM IR (-O2):
define void @do_something_useful() {
ret void
}
int raptor_parsedate_error(const char *s) { return 0; }


x86 assembly (clang, -O0):
<raptor_parsedate_error>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<raptor_parsedate_error>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @raptor_parsedate_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @raptor_parsedate_error(i8* nocapture readnone %0) {
ret i32 0
}
void ScalePlaneBilinearDown_16() {}


x86 assembly (clang, -O0):
<ScalePlaneBilinearDown_16>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ScalePlaneBilinearDown_16>:
ret

LLVM IR (-O0):
define void @ScalePlaneBilinearDown_16() {
ret void
}

LLVM IR (-O2):
define void @ScalePlaneBilinearDown_16() {
ret void
}
__attribute__((always_)) void PIN_DELAY_FAST(void) {}


x86 assembly (clang, -O0):
<PIN_DELAY_FAST>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PIN_DELAY_FAST>:
ret

LLVM IR (-O0):
define void @PIN_DELAY_FAST() {
ret void
}

LLVM IR (-O2):
define void @PIN_DELAY_FAST() {
ret void
}
int Kit_TruthHasBit(unsigned *p, int Bit) {
  return (p[Bit >> 5] & (1 << (Bit & 31))) > 0;
}


x86 assembly (clang, -O0):
<Kit_TruthHasBit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sar    $0x5,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
mov    -0xc(%rbp),%ecx
and    $0x1f,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Kit_TruthHasBit>:
mov    %esi,%ecx
mov    %esi,%eax
sar    $0x5,%eax
cltq
mov    (%rdi,%rax,4),%eax
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @Kit_TruthHasBit(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = ashr i32 %6, 5
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %5, i64 %8
%10 = load i32, i32* %9
%11 = load i32, i32* %4
%12 = and i32 %11, 31
%13 = shl i32 1, %12
%14 = and i32 %10, %13
%15 = icmp ugt i32 %14, 0
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @Kit_TruthHasBit(i32* nocapture %0, i32 %1) {
%3 = ashr i32 %1, 5
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = and i32 %1, 31
%8 = lshr i32 %6, %7
%9 = and i32 %8, 1
ret i32 %9
}
int check_prime(int num) {
  int i;
  if (num == 1)
    return 0;
  for (i = 2; i <= num - 1; i++) {
    if (num % i == 0) {
      return 0;
    }
  }
  return 1;
}


x86 assembly (clang, -O0):
<check_prime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    111d <check_prime+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    116b <check_prime+0x6b>
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
cmp    %ecx,%eax
jg     1164 <check_prime+0x64>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1151 <check_prime+0x51>
movl   $0x0,-0x4(%rbp)
jmp    116b <check_prime+0x6b>
jmp    1156 <check_prime+0x56>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1124 <check_prime+0x24>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_prime>:
xor    %ecx,%ecx
cmp    $0x1,%edi
jne    110a <check_prime+0xa>
mov    %ecx,%eax
ret
cmp    $0x3,%edi
jl     1130 <check_prime+0x30>
mov    $0x2,%esi
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1107 <check_prime+0x7>
add    $0x1,%esi
cmp    %esi,%edi
jne    1120 <check_prime+0x20>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @check_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %25
8: ; preds = %1
store i32 2, i32* %4
br label %9
9: ; preds = %21, %8
%10 = load i32, i32* %4
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 1
%13 = icmp sle i32 %10, %12
br i1 %13, label %14, label %24
14: ; preds = %9
%15 = load i32, i32* %3
%16 = load i32, i32* %4
%17 = srem i32 %15, %16
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %14
store i32 0, i32* %2
br label %25
20: ; preds = %14
br label %21
21: ; preds = %20
%22 = load i32, i32* %4
%23 = add nsw i32 %22, 1
store i32 %23, i32* %4
br label %9
24: ; preds = %9
store i32 1, i32* %2
br label %25
25: ; preds = %24, %19, %7
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @check_prime(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = icmp sgt i32 %0, 2
br i1 %4, label %7, label %12
5: ; preds = %7
%6 = icmp eq i32 %11, %0
br i1 %6, label %12, label %7
7: ; preds = %3, %5
%8 = phi i32 [ %11, %5 ], [ 2, %3 ]
%9 = srem i32 %0, %8
%10 = icmp eq i32 %9, 0
%11 = add nuw nsw i32 %8, 1
br i1 %10, label %12, label %5
12: ; preds = %7, %5, %3, %1
%13 = phi i32 [ 0, %1 ], [ 1, %3 ], [ 0, %7 ], [ 1, %5 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ show_result();
void sig_int(int signo) {
  show_result();
  exit(0);
}


x86 assembly (clang, -O0):
<sig_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <show_result@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<sig_int>:
push   %rax
xor    %eax,%eax
call   1030 <show_result@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @sig_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @show_result()
%4 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @sig_int(i32 %0) {
%2 = tail call i32 (...) @show_result()
%3 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int raw_smp_processor_id();
int map_to_cpu(unsigned int index) { return raw_smp_processor_id(); }


x86 assembly (clang, -O0):
<map_to_cpu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <raw_smp_processor_id@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<map_to_cpu>:
xor    %eax,%eax
jmp    1030 <raw_smp_processor_id@plt>

LLVM IR (-O0):
define i32 @map_to_cpu(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @raw_smp_processor_id()
ret i32 %3
}

LLVM IR (-O2):
define i32 @map_to_cpu(i32 %0) {
%2 = tail call i32 (...) @raw_smp_processor_id()
ret i32 %2
}
/* Type definitions */
struct pkt_buff {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _ascii(int /*<<< orphan*/, size_t);
size_t pkt_len(struct pkt_buff *);
int /*<<< orphan*/ pkt_pull(struct pkt_buff *, size_t);
int /*<<< orphan*/ tprintf(char *);
void ascii(struct pkt_buff *pkt) {
  size_t len = pkt_len(pkt);
  if (!len)
    return;
  _ascii(pkt_pull(pkt, len), len);
  tprintf("\n");
}


x86 assembly (clang, -O0):
<ascii>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1060 <pkt_len@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1169 <ascii+0x29>
jmp    118d <ascii+0x4d>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <pkt_pull@plt>
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
call   1050 <_ascii@plt>
lea    0xe78(%rip),%rdi
call   1040 <tprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ascii>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1060 <pkt_len@plt>
test   %rax,%rax
je     117c <ascii+0x3c>
mov    %rax,%rbx
mov    %r14,%rdi
mov    %rax,%rsi
call   1030 <pkt_pull@plt>
mov    %eax,%edi
mov    %rbx,%rsi
call   1050 <_ascii@plt>
lea    0xe90(%rip),%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <tprintf@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.pkt_buff = type { i32 }
@.str = [2 x i8] c"\0A\00"
define void @ascii(%struct.pkt_buff* %0) {
%2 = alloca %struct.pkt_buff*
%3 = alloca i64
store %struct.pkt_buff* %0, %struct.pkt_buff** %2
%4 = load %struct.pkt_buff*, %struct.pkt_buff** %2
%5 = call i64 @pkt_len(%struct.pkt_buff* %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = icmp ne i64 %6, 0
br i1 %7, label %9, label %8
8: ; preds = %1
br label %16
9: ; preds = %1
%10 = load %struct.pkt_buff*, %struct.pkt_buff** %2
%11 = load i64, i64* %3
%12 = call i32 @pkt_pull(%struct.pkt_buff* %10, i64 %11)
%13 = load i64, i64* %3
%14 = call i32 @_ascii(i32 %12, i64 %13)
%15 = call i32 @tprintf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %16
16: ; preds = %9, %8
ret void
}

LLVM IR (-O2):
%struct.pkt_buff = type { i32 }
@.str = [2 x i8] c"\0A\00"
define void @ascii(%struct.pkt_buff* %0) {
%2 = tail call i64 @pkt_len(%struct.pkt_buff* %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = tail call i32 @pkt_pull(%struct.pkt_buff* %0, i64 %2)
%6 = tail call i32 @_ascii(i32 %5, i64 %2)
%7 = tail call i32 @tprintf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %1, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ configureGenfskPatch();
int /*<<< orphan*/ enterGenfskCpePatch();
void refreshGenfskPatch(void) {
  enterGenfskCpePatch();
  configureGenfskPatch();
}


x86 assembly (clang, -O0):
<refreshGenfskPatch>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <enterGenfskCpePatch@plt>
mov    $0x0,%al
call   1030 <configureGenfskPatch@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<refreshGenfskPatch>:
push   %rax
xor    %eax,%eax
call   1040 <enterGenfskCpePatch@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <configureGenfskPatch@plt>

LLVM IR (-O0):
define void @refreshGenfskPatch() {
%1 = call i32 (...) @enterGenfskCpePatch()
%2 = call i32 (...) @configureGenfskPatch()
ret void
}

LLVM IR (-O2):
define void @refreshGenfskPatch() {
%1 = tail call i32 (...) @enterGenfskCpePatch()
%2 = tail call i32 (...) @configureGenfskPatch()
ret void
}
/* Variables and functions */
long factorial(int);
int main() {
  int n = 3;
  long f;
  f = factorial(n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <factorial@plt>
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x3,%edi
call   1030 <factorial@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i64
store i32 0, i32* %1
store i32 3, i32* %2
%4 = load i32, i32* %2
%5 = call i64 @factorial(i32 %4)
store i64 %5, i64* %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @factorial(i32 3)
ret i32 0
}
void GPMCCSTimingConfig(unsigned int baseAddr, unsigned int csNum,
                        unsigned int conf) {
  (*((volatile unsigned int *)(baseAddr + (0x64 + (csNum * (0x30)))))) = conf;
}


x86 assembly (clang, -O0):
<GPMCCSTimingConfig>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
imul   $0x30,-0x8(%rbp),%edx
add    $0x64,%edx
add    %edx,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPMCCSTimingConfig>:
lea    (%rsi,%rsi,2),%eax
shl    $0x4,%eax
add    %edi,%eax
add    $0x64,%eax
mov    %edx,(%rax)
ret

LLVM IR (-O0):
define void @GPMCCSTimingConfig(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = mul i32 %9, 48
%11 = add i32 100, %10
%12 = add i32 %8, %11
%13 = zext i32 %12 to i64
%14 = inttoptr i64 %13 to i32*
store volatile i32 %7, i32* %14
ret void
}

LLVM IR (-O2):
define void @GPMCCSTimingConfig(i32 %0, i32 %1, i32 %2) {
%4 = mul i32 %1, 48
%5 = add i32 %0, 100
%6 = add i32 %5, %4
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
store volatile i32 %2, i32* %8
ret void
}
int test_imm_F0int16_reg(short val) {
  return ((val) & (0xF0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F0int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xf0,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F0int16_reg>:
test   $0xf0,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F0int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 240
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_F0int16_reg(i16 signext %0) {
%2 = and i16 %0, 240
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ SYS_getppid;
int /*<<< orphan*/ syscall_0(int /*<<< orphan*/);
pid_t getppid(void) { return syscall_0(SYS_getppid); }


x86 assembly (clang, -O0):
<getppid>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <syscall_0@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getppid>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall_0@plt>

LLVM IR (-O0):
@SYS_getppid = global i32 0
define i32 @getppid() {
%1 = load i32, i32* @SYS_getppid
%2 = call i32 @syscall_0(i32 %1)
ret i32 %2
}

LLVM IR (-O2):
@SYS_getppid = global i32 0
define i32 @getppid() {
%1 = load i32, i32* @SYS_getppid
%2 = tail call i32 @syscall_0(i32 %1)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ msgqueue_sendstring(char *);
int /*<<< orphan*/ sprintf(char *, char *, int, int);
int /*<<< orphan*/ strncat(char *, char *, int);
void PlaceText(int x, int y, char *text) {
  static char buffer[56];
  sprintf(buffer, "6 %d %d '", x, y);
  strncat(buffer, text, 39);
  msgqueue_sendstring(buffer);
  return;
}


x86 assembly (clang, -O0):
<PlaceText>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
lea    0x2f01(%rip),%rdi
lea    0xeaa(%rip),%rsi
call   1050 <sprintf@plt>
mov    -0x10(%rbp),%rsi
lea    0x2eea(%rip),%rdi
mov    $0x27,%edx
call   1030 <strncat@plt>
lea    0x2ed9(%rip),%rdi
call   1040 <msgqueue_sendstring@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PlaceText>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %esi,%ecx
mov    %edi,%edx
lea    0x2f0e(%rip),%r14
lea    0xeb7(%rip),%rsi
mov    %r14,%rdi
call   1050 <sprintf@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    $0x27,%edx
call   1030 <strncat@plt>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <msgqueue_sendstring@plt>

LLVM IR (-O0):
@PlaceText.buffer = internal global [56 x i8] zeroinitializer
@.str = [10 x i8] c"6 %d %d '\00"
define void @PlaceText(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = call i32 @sprintf(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @PlaceText.buffer, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8)
%10 = load i8*, i8** %6
%11 = call i32 @strncat(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @PlaceText.buffer, i64 0, i64 0), i8* %10, i32 39)
%12 = call i32 @msgqueue_sendstring(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @PlaceText.buffer, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@PlaceText.buffer = internal global [56 x i8] zeroinitializer
@.str = [10 x i8] c"6 %d %d '\00"
define void @PlaceText(i32 %0, i32 %1, i8* %2) {
%4 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([56 x i8], [56 x i8]* @PlaceText.buffer, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1)
%5 = tail call i32 @strncat(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @PlaceText.buffer, i64 0, i64 0), i8* %2, i32 39)
%6 = tail call i32 @msgqueue_sendstring(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @PlaceText.buffer, i64 0, i64 0))
ret void
}
void ADC_SAR_1_IRQ_Interrupt(void) {}


x86 assembly (clang, -O0):
<ADC_SAR_1_IRQ_Interrupt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADC_SAR_1_IRQ_Interrupt>:
ret

LLVM IR (-O0):
define void @ADC_SAR_1_IRQ_Interrupt() {
ret void
}

LLVM IR (-O2):
define void @ADC_SAR_1_IRQ_Interrupt() {
ret void
}
void bbzero(char *to, int count) {
  while (count-- > 0) {
    *to++ = 0;
  }
}


x86 assembly (clang, -O0):
<bbzero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
jle    1136 <bbzero+0x36>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movb   $0x0,(%rax)
jmp    110b <bbzero+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bbzero>:
test   %esi,%esi
jle    1122 <bbzero+0x12>
push   %rax
mov    %esi,%edx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @bbzero(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %9, %2
%6 = load i32, i32* %4
%7 = add nsw i32 %6, -1
store i32 %7, i32* %4
%8 = icmp sgt i32 %6, 0
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %3
store i8 0, i8* %10
br label %5
12: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @bbzero(i8* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ outb(int, int);
int /*<<< orphan*/ pic_enable(int /*<<< orphan*/);
void timer_init(void) {
  outb((0x040 + 3), 0x00 | 0x04 | 0x30);
  outb(0x040, ((1193182 + (100) / 2) / (100)) % 256);
  outb(0x040, ((1193182 + (100) / 2) / (100)) / 256);
  pic_enable(0);
}


x86 assembly (clang, -O0):
<timer_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x43,%edi
mov    $0x34,%esi
call   1030 <outb@plt>
mov    $0x40,%edi
mov    $0x9c,%esi
call   1030 <outb@plt>
mov    $0x40,%edi
mov    $0x2e,%esi
call   1030 <outb@plt>
xor    %edi,%edi
call   1040 <pic_enable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<timer_init>:
push   %rax
mov    $0x43,%edi
mov    $0x34,%esi
call   1030 <outb@plt>
mov    $0x40,%edi
mov    $0x9c,%esi
call   1030 <outb@plt>
mov    $0x40,%edi
mov    $0x2e,%esi
call   1030 <outb@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <pic_enable@plt>

LLVM IR (-O0):
define void @timer_init() {
%1 = call i32 @outb(i32 67, i32 52)
%2 = call i32 @outb(i32 64, i32 156)
%3 = call i32 @outb(i32 64, i32 46)
%4 = call i32 @pic_enable(i32 0)
ret void
}

LLVM IR (-O2):
define void @timer_init() {
%1 = tail call i32 @outb(i32 67, i32 52)
%2 = tail call i32 @outb(i32 64, i32 156)
%3 = tail call i32 @outb(i32 64, i32 46)
%4 = tail call i32 @pic_enable(i32 0)
ret void
}
int test_imm_70uint32_mem(unsigned int *val) {
  return ((*val) & (0x70 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_70uint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x70,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_70uint32_mem>:
testb  $0x70,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_70uint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 112
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_70uint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 112
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ test_sio1();
int /*<<< orphan*/ test_sio2();
int /*<<< orphan*/ test_sio3();
int /*<<< orphan*/ test_sio4();
void test_stdio(void) {
  test_sio1();
  test_sio2();
  test_sio3();
  test_sio4();
}


x86 assembly (clang, -O0):
<test_stdio>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <test_sio1@plt>
mov    $0x0,%al
call   1050 <test_sio2@plt>
mov    $0x0,%al
call   1040 <test_sio3@plt>
mov    $0x0,%al
call   1060 <test_sio4@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_stdio>:
push   %rax
xor    %eax,%eax
call   1030 <test_sio1@plt>
xor    %eax,%eax
call   1050 <test_sio2@plt>
xor    %eax,%eax
call   1040 <test_sio3@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <test_sio4@plt>

LLVM IR (-O0):
define void @test_stdio() {
%1 = call i32 (...) @test_sio1()
%2 = call i32 (...) @test_sio2()
%3 = call i32 (...) @test_sio3()
%4 = call i32 (...) @test_sio4()
ret void
}

LLVM IR (-O2):
define void @test_stdio() {
%1 = tail call i32 (...) @test_sio1()
%2 = tail call i32 (...) @test_sio2()
%3 = tail call i32 (...) @test_sio3()
%4 = tail call i32 (...) @test_sio4()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ calculateAverageXNumbers();
int main() { calculateAverageXNumbers(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <calculateAverageXNumbers@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <calculateAverageXNumbers@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @calculateAverageXNumbers()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @calculateAverageXNumbers()
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ width_inc;
};
typedef TYPE_1__ XSizeHints;

/* Variables and functions */
int get_XSizeHints_width_inc(void *_p) {
  return (int)((XSizeHints *)_p)->width_inc;
}


x86 assembly (clang, -O0):
<get_XSizeHints_width_inc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XSizeHints_width_inc>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XSizeHints_width_inc(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XSizeHints_width_inc(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
uint32_t ring_data_contig(uint32_t size, uint32_t head, uint32_t tail) {
  if (head >= tail)
    return head - tail;
  else
    return size - tail;
}


x86 assembly (clang, -O0):
<ring_data_contig>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x20(%rbp),%rax
jl     112f <ring_data_contig+0x2f>
mov    -0x18(%rbp),%rax
sub    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    113b <ring_data_contig+0x3b>
mov    -0x10(%rbp),%rax
sub    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ring_data_contig>:
mov    %rdi,%rax
cmp    %rdx,%rsi
cmovge %rsi,%rax
sub    %rdx,%rax
ret

LLVM IR (-O0):
define i64 @ring_data_contig(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%8 = load i64, i64* %6
%9 = load i64, i64* %7
%10 = icmp sge i64 %8, %9
br i1 %10, label %11, label %15
11: ; preds = %3
%12 = load i64, i64* %6
%13 = load i64, i64* %7
%14 = sub nsw i64 %12, %13
store i64 %14, i64* %4
br label %19
15: ; preds = %3
%16 = load i64, i64* %5
%17 = load i64, i64* %7
%18 = sub nsw i64 %16, %17
store i64 %18, i64* %4
br label %19
19: ; preds = %15, %11
%20 = load i64, i64* %4
ret i64 %20
}

LLVM IR (-O2):
define i64 @ring_data_contig(i64 %0, i64 %1, i64 %2) {
%4 = icmp slt i64 %1, %2
%5 = select i1 %4, i64 %0, i64 %1
%6 = sub nsw i64 %5, %2
ret i64 %6
}
int sol_netctl_init(void) { return 0; }


x86 assembly (clang, -O0):
<sol_netctl_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sol_netctl_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sol_netctl_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @sol_netctl_init() {
ret i32 0
}
/* Variables and functions */
int ehDivisivelPor3ou5(int);
int somaNumerosDiv3ou5(int N) {
  int r = 0;
  int i = 0;
  for (i = 0; i <= N; i++) {
    if (ehDivisivelPor3ou5(i) == 1)
      r += i;
  }
  return r;
}


x86 assembly (clang, -O0):
<somaNumerosDiv3ou5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     1169 <somaNumerosDiv3ou5+0x59>
mov    -0xc(%rbp),%edi
call   1030 <ehDivisivelPor3ou5@plt>
cmp    $0x1,%eax
jne    1156 <somaNumerosDiv3ou5+0x46>
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    115b <somaNumerosDiv3ou5+0x4b>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1130 <somaNumerosDiv3ou5+0x20>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<somaNumerosDiv3ou5>:
push   %rbp
push   %r14
push   %rbx
test   %edi,%edi
js     114c <somaNumerosDiv3ou5+0x3c>
mov    %edi,%r14d
add    $0x1,%r14d
xor    %ebx,%ebx
xor    %ebp,%ebp
jmp    113a <somaNumerosDiv3ou5+0x2a>
cs nopw 0x0(%rax,%rax,1)
nop
add    %ecx,%ebp
add    $0x1,%ebx
cmp    %ebx,%r14d
je     114e <somaNumerosDiv3ou5+0x3e>
mov    %ebx,%edi
call   1030 <ehDivisivelPor3ou5@plt>
mov    %ebx,%ecx
cmp    $0x1,%eax
je     1130 <somaNumerosDiv3ou5+0x20>
xor    %ecx,%ecx
jmp    1130 <somaNumerosDiv3ou5+0x20>
xor    %ebp,%ebp
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @somaNumerosDiv3ou5(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
store i32 0, i32* %4
br label %5
5: ; preds = %18, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %2
%8 = icmp sle i32 %6, %7
br i1 %8, label %9, label %21
9: ; preds = %5
%10 = load i32, i32* %4
%11 = call i32 @ehDivisivelPor3ou5(i32 %10)
%12 = icmp eq i32 %11, 1
br i1 %12, label %13, label %17
13: ; preds = %9
%14 = load i32, i32* %4
%15 = load i32, i32* %3
%16 = add nsw i32 %15, %14
store i32 %16, i32* %3
br label %17
17: ; preds = %13, %9
br label %18
18: ; preds = %17
%19 = load i32, i32* %4
%20 = add nsw i32 %19, 1
store i32 %20, i32* %4
br label %5
21: ; preds = %5
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @somaNumerosDiv3ou5(i32 %0) {
%2 = icmp slt i32 %0, 0
br i1 %2, label %12, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %10, %3 ], [ 0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = tail call i32 @ehDivisivelPor3ou5(i32 %4)
%7 = icmp eq i32 %6, 1
%8 = select i1 %7, i32 %4, i32 0
%9 = add nuw nsw i32 %8, %5
%10 = add nuw i32 %4, 1
%11 = icmp eq i32 %4, %0
br i1 %11, label %12, label %3
12: ; preds = %3, %1
%13 = phi i32 [ 0, %1 ], [ %9, %3 ]
ret i32 %13
}
const char *xvm_mode(void) { return "sse2"; }


x86 assembly (clang, -O0):
<xvm_mode>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xvm_mode>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"sse2\00"
define i8* @xvm_mode() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [5 x i8] c"sse2\00"
define i8* @xvm_mode() {
ret i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t rotr64(const uint64_t x, const int b) {
  return (x >> b) | (x << (64 - b));
}


x86 assembly (clang, -O0):
<rotr64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
mov    -0x4(%rbp),%edx
mov    $0x40,%ecx
sub    -0x8(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotr64>:
mov    %esi,%ecx
mov    %edi,%eax
sar    %cl,%eax
neg    %cl
shl    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rotr64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = ashr i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sub nsw i32 64, %9
%11 = shl i32 %8, %10
%12 = or i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @rotr64(i32 %0, i32 %1) {
%3 = ashr i32 %0, %1
%4 = sub nsw i32 64, %1
%5 = shl i32 %0, %4
%6 = or i32 %5, %3
ret i32 %6
}
void CONFIG_new(void) {}


x86 assembly (clang, -O0):
<CONFIG_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CONFIG_new>:
ret

LLVM IR (-O0):
define void @CONFIG_new() {
ret void
}

LLVM IR (-O2):
define void @CONFIG_new() {
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ x;
};
typedef TYPE_1__ XKeyEvent;

/* Variables and functions */
int get_XKeyEvent_x(void *_p) { return (int)((XKeyEvent *)_p)->x; }


x86 assembly (clang, -O0):
<get_XKeyEvent_x>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XKeyEvent_x>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XKeyEvent_x(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XKeyEvent_x(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ __analyzer_eval(int);
void test_33(void) {
  static int s;
  __analyzer_eval(s == 42);
  s = 42;
  __analyzer_eval(s == 42);
}


x86 assembly (clang, -O0):
<test_33>:
push   %rbp
mov    %rsp,%rbp
cmpl   $0x2a,0x2f11(%rip)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__analyzer_eval@plt>
movl   $0x2a,0x2efa(%rip)
cmpl   $0x2a,0x2ef3(%rip)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__analyzer_eval@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_33>:
push   %rax
movzbl 0x2f14(%rip),%edi
call   1030 <__analyzer_eval@plt>
movb   $0x1,0x2f08(%rip)
mov    $0x1,%edi
pop    %rax
jmp    1030 <__analyzer_eval@plt>

LLVM IR (-O0):
@test_33.s = internal global i32 0
define void @test_33() {
%1 = load i32, i32* @test_33.s
%2 = icmp eq i32 %1, 42
%3 = zext i1 %2 to i32
%4 = call i32 @__analyzer_eval(i32 %3)
store i32 42, i32* @test_33.s
%5 = load i32, i32* @test_33.s
%6 = icmp eq i32 %5, 42
%7 = zext i1 %6 to i32
%8 = call i32 @__analyzer_eval(i32 %7)
ret void
}

LLVM IR (-O2):
@test_33.s = internal unnamed_addr global i1 false
define void @test_33() {
%1 = load i1, i1* @test_33.s
%2 = zext i1 %1 to i32
%3 = tail call i32 @__analyzer_eval(i32 %2)
store i1 true, i1* @test_33.s
%4 = tail call i32 @__analyzer_eval(i32 1)
ret void
}
OP(dd, f6) {
  illegal_1();
  op_f6();
}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <illegal_1@plt>
mov    $0x0,%al
call   1040 <op_f6@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
push   %rax
xor    %eax,%eax
call   1030 <illegal_1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <op_f6@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @illegal_1()
%7 = call i32 (...) @op_f6()
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @illegal_1()
%4 = tail call i32 (...) @op_f6()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
int _out(char c) { putchar(c); }


x86 assembly (clang, -O0):
<_out>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%edi
call   1030 <putchar@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_out>:
jmp    1030 <putchar@plt>

LLVM IR (-O0):
define i32 @_out(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = call i32 @putchar(i8 signext %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @_out(i8 signext %0) {
%2 = tail call i32 @putchar(i8 signext %0)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ scanf(char *, int *);
int get(char *string) {
  int val;
  printf("\n\tPlease enter the %s:", string);
  scanf("%d", &val);
  return val;
}


x86 assembly (clang, -O0):
<get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
lea    0xed4(%rip),%rdi
lea    -0xc(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
lea    0xee0(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"\0A\09Please enter the %s:\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @get(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %3)
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
@.str = [23 x i8] c"\0A\09Please enter the %s:\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @get(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %0)
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%6 = load i32, i32* %2
ret i32 %6
}
char *langRomTypeMirroredRam1k() { return "1kB Mirrored RAM"; }


x86 assembly (clang, -O0):
<langRomTypeMirroredRam1k>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langRomTypeMirroredRam1k>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [17 x i8] c"1kB Mirrored RAM\00"
define i8* @langRomTypeMirroredRam1k() {
ret i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [17 x i8] c"1kB Mirrored RAM\00"
define i8* @langRomTypeMirroredRam1k() {
ret i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0)
}