float EaseBounceOut(float t, float b, float c, float d) {
  if ((t /= d) < (1.0f / 2.75f)) {
    return (c * (7.5625f * t * t) + b);
  } else if (t < (2.0f / 2.75f)) {
    float postFix = t -= (1.5f / 2.75f);
    return (c * (7.5625f * (postFix)*t + 0.75f) + b);
  } else if (t < (2.5 / 2.75)) {
    float postFix = t -= (2.25f / 2.75f);
    return (c * (7.5625f * (postFix)*t + 0.9375f) + b);
  } else {
    float postFix = t -= (2.625f / 2.75f);
    return (c * (7.5625f * (postFix)*t + 0.984375f) + b);
  }
}


x86 assembly (clang, -O0):
<EaseBounceOut>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  %xmm2,-0x10(%rbp)
movss  %xmm3,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
divss  %xmm0,%xmm1
movss  %xmm1,-0x8(%rbp)
movss  0xecd(%rip),%xmm0
ucomiss %xmm1,%xmm0
jbe    116a <EaseBounceOut+0x6a>
movss  -0x10(%rbp),%xmm0
movss  0xec3(%rip),%xmm2
mulss  -0x8(%rbp),%xmm2
mulss  -0x8(%rbp),%xmm2
movss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    129d <EaseBounceOut+0x19d>
movss  0xe92(%rip),%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    11d5 <EaseBounceOut+0xd5>
movss  -0x8(%rbp),%xmm0
movss  0xe97(%rip),%xmm1
subss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  %xmm0,-0x18(%rbp)
movss  -0x10(%rbp),%xmm0
movss  0xe68(%rip),%xmm2
mulss  -0x18(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  %xmm1,%xmm2
movss  0xe62(%rip),%xmm1
addss  %xmm1,%xmm2
movss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    129d <EaseBounceOut+0x19d>
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xe42(%rip),%xmm0
ucomisd %xmm1,%xmm0
jbe    1249 <EaseBounceOut+0x149>
movss  -0x8(%rbp),%xmm0
movss  0xe1b(%rip),%xmm1
subss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  %xmm0,-0x1c(%rbp)
movss  -0x10(%rbp),%xmm0
movss  0xdf4(%rip),%xmm2
mulss  -0x1c(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  %xmm1,%xmm2
movss  0xde6(%rip),%xmm1
addss  %xmm1,%xmm2
movss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    129d <EaseBounceOut+0x19d>
movss  -0x8(%rbp),%xmm0
movss  0xdba(%rip),%xmm1
subss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  %xmm0,-0x20(%rbp)
movss  -0x10(%rbp),%xmm0
movss  0xd9b(%rip),%xmm2
mulss  -0x20(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  %xmm1,%xmm2
movss  0xd81(%rip),%xmm1
addss  %xmm1,%xmm2
movss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<EaseBounceOut>:
divss  %xmm3,%xmm0
movss  0xef4(%rip),%xmm3
ucomiss %xmm0,%xmm3
jbe    1126 <EaseBounceOut+0x26>
movss  0xef3(%rip),%xmm3
mulss  %xmm0,%xmm3
mulss  %xmm0,%xmm3
jmp    11ac <EaseBounceOut+0xac>
movss  0xed6(%rip),%xmm3
ucomiss %xmm0,%xmm3
jbe    1155 <EaseBounceOut+0x55>
addss  0xee1(%rip),%xmm0
movss  0xec9(%rip),%xmm3
mulss  %xmm0,%xmm3
mulss  %xmm0,%xmm3
addss  0xecd(%rip),%xmm3
jmp    11ac <EaseBounceOut+0xac>
xorps  %xmm3,%xmm3
cvtss2sd %xmm0,%xmm3
movsd  0xec4(%rip),%xmm4
ucomisd %xmm3,%xmm4
jbe    118c <EaseBounceOut+0x8c>
addss  0xea2(%rip),%xmm0
movss  0xe92(%rip),%xmm3
mulss  %xmm0,%xmm3
mulss  %xmm0,%xmm3
addss  0xe8e(%rip),%xmm3
jmp    11ac <EaseBounceOut+0xac>
addss  0xe74(%rip),%xmm0
movss  0xe70(%rip),%xmm3
mulss  %xmm0,%xmm3
mulss  %xmm0,%xmm3
addss  0xe64(%rip),%xmm3
mulss  %xmm3,%xmm2
addss  %xmm1,%xmm2
movaps %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @EaseBounceOut(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
%11 = alloca float
%12 = alloca float
store float %0, float* %6
store float %1, float* %7
store float %2, float* %8
store float %3, float* %9
%13 = load float, float* %9
%14 = load float, float* %6
%15 = fdiv float %14, %13
store float %15, float* %6
%16 = fcmp olt float %15, 0x3FD745D180000000
br i1 %16, label %17, label %25
17: ; preds = %4
%18 = load float, float* %8
%19 = load float, float* %6
%20 = fmul float 7.562500e+00, %19
%21 = load float, float* %6
%22 = fmul float %20, %21
%23 = load float, float* %7
%24 = call float @llvm.fmuladd.f32(float %18, float %22, float %23)
store float %24, float* %5
br label %62
25: ; preds = %4
%26 = load float, float* %6
%27 = fcmp olt float %26, 0x3FE745D180000000
br i1 %27, label %28, label %38
28: ; preds = %25
%29 = load float, float* %6
%30 = fsub float %29, 0x3FE1745D20000000
store float %30, float* %6
store float %30, float* %10
%31 = load float, float* %8
%32 = load float, float* %10
%33 = fmul float 7.562500e+00, %32
%34 = load float, float* %6
%35 = call float @llvm.fmuladd.f32(float %33, float %34, float 7.500000e-01)
%36 = load float, float* %7
%37 = call float @llvm.fmuladd.f32(float %31, float %35, float %36)
store float %37, float* %5
br label %62
38: ; preds = %25
%39 = load float, float* %6
%40 = fpext float %39 to double
%41 = fcmp olt double %40, 0x3FED1745D1745D17
br i1 %41, label %42, label %52
42: ; preds = %38
%43 = load float, float* %6
%44 = fsub float %43, 0x3FEA2E8BA0000000
store float %44, float* %6
store float %44, float* %11
%45 = load float, float* %8
%46 = load float, float* %11
%47 = fmul float 7.562500e+00, %46
%48 = load float, float* %6
%49 = call float @llvm.fmuladd.f32(float %47, float %48, float 9.375000e-01)
%50 = load float, float* %7
%51 = call float @llvm.fmuladd.f32(float %45, float %49, float %50)
store float %51, float* %5
br label %62
52: ; preds = %38
%53 = load float, float* %6
%54 = fsub float %53, 0x3FEE8BA2E0000000
store float %54, float* %6
store float %54, float* %12
%55 = load float, float* %8
%56 = load float, float* %12
%57 = fmul float 7.562500e+00, %56
%58 = load float, float* %6
%59 = call float @llvm.fmuladd.f32(float %57, float %58, float 9.843750e-01)
%60 = load float, float* %7
%61 = call float @llvm.fmuladd.f32(float %55, float %59, float %60)
store float %61, float* %5
br label %62
62: ; preds = %52, %42, %28, %17
%63 = load float, float* %5
ret float %63
}

LLVM IR (-O2):
define float @EaseBounceOut(float %0, float %1, float %2, float %3) {
%5 = fdiv float %0, %3
%6 = fcmp olt float %5, 0x3FD745D180000000
br i1 %6, label %7, label %10
7: ; preds = %4
%8 = fmul float %5, 7.562500e+00
%9 = fmul float %5, %8
br label %27
10: ; preds = %4
%11 = fcmp olt float %5, 0x3FE745D180000000
br i1 %11, label %12, label %16
12: ; preds = %10
%13 = fadd float %5, 0xBFE1745D20000000
%14 = fmul float %13, 7.562500e+00
%15 = tail call float @llvm.fmuladd.f32(float %14, float %13, float 7.500000e-01)
br label %27
16: ; preds = %10
%17 = fpext float %5 to double
%18 = fcmp olt double %17, 0x3FED1745D1745D17
br i1 %18, label %19, label %23
19: ; preds = %16
%20 = fadd float %5, 0xBFEA2E8BA0000000
%21 = fmul float %20, 7.562500e+00
%22 = tail call float @llvm.fmuladd.f32(float %21, float %20, float 9.375000e-01)
br label %27
23: ; preds = %16
%24 = fadd float %5, 0xBFEE8BA2E0000000
%25 = fmul float %24, 7.562500e+00
%26 = tail call float @llvm.fmuladd.f32(float %25, float %24, float 9.843750e-01)
br label %27
27: ; preds = %23, %19, %12, %7
%28 = phi float [ %26, %23 ], [ %22, %19 ], [ %15, %12 ], [ %9, %7 ]
%29 = tail call float @llvm.fmuladd.f32(float %2, float %28, float %1)
ret float %29
}