xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ LCD_WriteCommand(int);
void LCD_DisplayOff(void) { LCD_WriteCommand(0x08); }


x86 assembly (clang, -O0):
<LCD_DisplayOff>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8,%edi
call   1030 <LCD_WriteCommand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCD_DisplayOff>:
mov    $0x8,%edi
jmp    1030 <LCD_WriteCommand@plt>

LLVM IR (-O0):
define void @LCD_DisplayOff() {
%1 = call i32 @LCD_WriteCommand(i32 8)
ret void
}

LLVM IR (-O2):
define void @LCD_DisplayOff() {
%1 = tail call i32 @LCD_WriteCommand(i32 8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "Usage: rnd [-c <count>] [-m <modulus>] [-s <seed>]\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [52 x i8] c"Usage: rnd [-c <count>] [-m <modulus>] [-s <seed>]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [52 x i8] c"Usage: rnd [-c <count>] [-m <modulus>] [-s <seed>]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
scalar_t__ malloc(unsigned int);
unsigned short *Ushort_array(int size) {
  return ((unsigned short *)malloc((unsigned)(size * sizeof(short))));
}


x86 assembly (clang, -O0):
<Ushort_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
shl    $0x1,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Ushort_array>:
add    %edi,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i16* @Ushort_array(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = mul i64 %4, 2
%6 = trunc i64 %5 to i32
%7 = call i64 @malloc(i32 %6)
%8 = inttoptr i64 %7 to i16*
ret i16* %8
}

LLVM IR (-O2):
define i16* @Ushort_array(i32 %0) {
%2 = shl i32 %0, 1
%3 = tail call i64 @malloc(i32 %2)
%4 = inttoptr i64 %3 to i16*
ret i16* %4
}
/* Variables and functions */
int sum(int *, int, int);
int main() {
  int arr[10] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10};
  return sum(arr, 2, 9);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x30(%rbp),%rdi
lea    0xec6(%rip),%rsi
mov    $0x28,%edx
call   1030 <memcpy@plt>
lea    -0x30(%rbp),%rdi
mov    $0x2,%esi
mov    $0x9,%edx
call   1040 <sum@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
mov    0xf05(%rip),%rax
mov    %rax,0x20(%rsp)
movaps 0xee9(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xecd(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x2,%esi
mov    $0x9,%edx
call   1030 <sum@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.main.arr = [10 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10]
define i32 @main() {
%1 = alloca i32
%2 = alloca [10 x i32]
store i32 0, i32* %1
%3 = bitcast [10 x i32]* %2 to i8*
%4 = getelementptr inbounds [10 x i32], [10 x i32]* %2, i64 0, i64 0
%5 = call i32 @sum(i32* %4, i32 2, i32 9)
ret i32 %5
}

LLVM IR (-O2):
@__const.main.arr = [10 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10]
define i32 @main() {
%1 = alloca [10 x i32]
%2 = bitcast [10 x i32]* %1 to i8*
%3 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%4 = call i32 @sum(i32* %3, i32 2, i32 9)
ret i32 %4
}
int ClipInteger(int *v, int lower, int upper) {
  if (*v < lower) {
    *v = lower;
    return (1);
  }
  if (*v > upper) {
    *v = upper;
    return (1);
  }
  return (0);
}


x86 assembly (clang, -O0):
<ClipInteger>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
cmp    -0x14(%rbp),%eax
jge    1132 <ClipInteger+0x32>
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
movl   $0x1,-0x4(%rbp)
jmp    115d <ClipInteger+0x5d>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
cmp    -0x18(%rbp),%eax
jle    1156 <ClipInteger+0x56>
mov    -0x18(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
movl   $0x1,-0x4(%rbp)
jmp    115d <ClipInteger+0x5d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ClipInteger>:
mov    (%rdi),%ecx
cmp    %esi,%ecx
jl     110e <ClipInteger+0xe>
xor    %eax,%eax
mov    %edx,%esi
cmp    %edx,%ecx
jle    1115 <ClipInteger+0x15>
mov    %esi,(%rdi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ClipInteger(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32*, i32** %5
%9 = load i32, i32* %8
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %15
12: ; preds = %3
%13 = load i32, i32* %6
%14 = load i32*, i32** %5
store i32 %13, i32* %14
store i32 1, i32* %4
br label %24
15: ; preds = %3
%16 = load i32*, i32** %5
%17 = load i32, i32* %16
%18 = load i32, i32* %7
%19 = icmp sgt i32 %17, %18
br i1 %19, label %20, label %23
20: ; preds = %15
%21 = load i32, i32* %7
%22 = load i32*, i32** %5
store i32 %21, i32* %22
store i32 1, i32* %4
br label %24
23: ; preds = %15
store i32 0, i32* %4
br label %24
24: ; preds = %23, %20, %12
%25 = load i32, i32* %4
ret i32 %25
}

LLVM IR (-O2):
define i32 @ClipInteger(i32* nocapture %0, i32 %1, i32 %2) {
%4 = load i32, i32* %0
%5 = icmp slt i32 %4, %1
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = icmp sgt i32 %4, %2
br i1 %7, label %8, label %10
8: ; preds = %6, %3
%9 = phi i32 [ %1, %3 ], [ %2, %6 ]
store i32 %9, i32* %0
br label %10
10: ; preds = %8, %6
%11 = phi i32 [ 0, %6 ], [ 1, %8 ]
ret i32 %11
}
int isprime(int value) {
  int i;
  for (i = 2; i < value; i++) {
    if (value % i == 0)
      return 0;
  }
  return value;
}


x86 assembly (clang, -O0):
<isprime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1149 <isprime+0x49>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1136 <isprime+0x36>
movl   $0x0,-0x4(%rbp)
jmp    114f <isprime+0x4f>
jmp    113b <isprime+0x3b>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <isprime+0xe>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isprime>:
cmp    $0x3,%edi
jl     1120 <isprime+0x20>
mov    $0x2,%ecx
nopw   0x0(%rax,%rax,1)
mov    %edi,%eax
cltd
idiv   %ecx
test   %edx,%edx
je     1123 <isprime+0x23>
add    $0x1,%ecx
cmp    %ecx,%edi
jne    1110 <isprime+0x10>
mov    %edi,%eax
ret
xor    %edi,%edi
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @isprime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 2, i32* %4
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %19
9: ; preds = %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = srem i32 %10, %11
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %9
store i32 0, i32* %2
br label %21
15: ; preds = %9
br label %16
16: ; preds = %15
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 1
store i32 %18, i32* %4
br label %5
19: ; preds = %5
%20 = load i32, i32* %3
store i32 %20, i32* %2
br label %21
21: ; preds = %19, %14
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @isprime(i32 %0) {
%2 = icmp sgt i32 %0, 2
br i1 %2, label %5, label %10
3: ; preds = %5
%4 = icmp eq i32 %9, %0
br i1 %4, label %10, label %5
5: ; preds = %1, %3
%6 = phi i32 [ %9, %3 ], [ 2, %1 ]
%7 = srem i32 %0, %6
%8 = icmp eq i32 %7, 0
%9 = add nuw nsw i32 %6, 1
br i1 %8, label %10, label %3
10: ; preds = %5, %3, %1
%11 = phi i32 [ %0, %1 ], [ %0, %3 ], [ 0, %5 ]
ret i32 %11
}
/* Variables and functions */
int kexit(int);
int kkexit(int value) { return (kexit(value)); }


x86 assembly (clang, -O0):
<kkexit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <kexit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kkexit>:
jmp    1030 <kexit@plt>

LLVM IR (-O0):
define i32 @kkexit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @kexit(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @kkexit(i32 %0) {
%2 = tail call i32 @kexit(i32 %0)
ret i32 %2
}
/* Type definitions */
struct wcore_platform {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assert(struct wcore_platform *);
bool wcore_platform_teardown(struct wcore_platform *self) {
  assert(self);
  return true;
}


x86 assembly (clang, -O0):
<wcore_platform_teardown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <assert@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcore_platform_teardown>:
push   %rax
call   1030 <assert@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.wcore_platform = type { i32 }
define i32 @wcore_platform_teardown(%struct.wcore_platform* %0) {
%2 = alloca %struct.wcore_platform*
store %struct.wcore_platform* %0, %struct.wcore_platform** %2
%3 = load %struct.wcore_platform*, %struct.wcore_platform** %2
%4 = call i32 @assert(%struct.wcore_platform* %3)
ret i32 1
}

LLVM IR (-O2):
%struct.wcore_platform = type { i32 }
define i32 @wcore_platform_teardown(%struct.wcore_platform* %0) {
%2 = tail call i32 @assert(%struct.wcore_platform* %0)
ret i32 1
}
float AngleAdd(float a2, float a1) { return (a1 + a2); }


x86 assembly (clang, -O0):
<AngleAdd>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
addss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<AngleAdd>:
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @AngleAdd(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %4
%6 = load float, float* %3
%7 = fadd float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @AngleAdd(float %0, float %1) {
%3 = fadd float %0, %1
ret float %3
}
int test_imm_66uint8_mem(unsigned char *val) {
  return ((*val) & (0x66 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_66uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0x66,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_66uint8_mem>:
testb  $0x66,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_66uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 102
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_66uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 102
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ grava_li(int, char *);
void rot14_sem() { grava_li(1, "$WHILE"); }


x86 assembly (clang, -O0):
<rot14_sem>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
lea    0xee0(%rip),%rsi
call   1030 <grava_li@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rot14_sem>:
lea    0xee9(%rip),%rsi
mov    $0x1,%edi
jmp    1030 <grava_li@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"$WHILE\00"
define void @rot14_sem() {
%1 = call i32 @grava_li(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"$WHILE\00"
define void @rot14_sem() {
%1 = tail call i32 @grava_li(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_GENERALSTRING;

/* Variables and functions */
int /*<<< orphan*/ ASN1_GENERALSTRING_it;
scalar_t__ ASN1_item_new(int /*<<< orphan*/ *);
ASN1_GENERALSTRING *ASN1_GENERALSTRING_new(void) {
  return (ASN1_GENERALSTRING *)ASN1_item_new(&ASN1_GENERALSTRING_it);
}


x86 assembly (clang, -O0):
<ASN1_GENERALSTRING_new>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rdi
call   1030 <ASN1_item_new@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_GENERALSTRING_new>:
mov    0x2ec9(%rip),%rdi
jmp    1030 <ASN1_item_new@plt>

LLVM IR (-O0):
@ASN1_GENERALSTRING_it = global i32 0
define i32* @ASN1_GENERALSTRING_new() {
%1 = call i64 @ASN1_item_new(i32* @ASN1_GENERALSTRING_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}

LLVM IR (-O2):
@ASN1_GENERALSTRING_it = global i32 0
define i32* @ASN1_GENERALSTRING_new() {
%1 = tail call i64 @ASN1_item_new(i32* @ASN1_GENERALSTRING_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}
/* Variables and functions */
int /*<<< orphan*/ KillTerminal();
int /*<<< orphan*/ StartTerminal();
void RestartTerminal() {
  KillTerminal();
  StartTerminal();
}


x86 assembly (clang, -O0):
<RestartTerminal>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <KillTerminal@plt>
mov    $0x0,%al
call   1040 <StartTerminal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RestartTerminal>:
push   %rax
xor    %eax,%eax
call   1030 <KillTerminal@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <StartTerminal@plt>

LLVM IR (-O0):
define void @RestartTerminal() {
%1 = call i32 (...) @KillTerminal()
%2 = call i32 (...) @StartTerminal()
ret void
}

LLVM IR (-O2):
define void @RestartTerminal() {
%1 = tail call i32 (...) @KillTerminal()
%2 = tail call i32 (...) @StartTerminal()
ret void
}
char *_strcpy(char *dest, char *src) {
  int i = 0;
  while (src[i] != '\0') {
    dest[i] = src[i];
    i++;
  }
  dest[i] = '\0';
  return (dest);
}


x86 assembly (clang, -O0):
<_strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     114c <_strcpy+0x4c>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <_strcpy+0x13>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_strcpy>:
mov    %rdi,%rax
mov    (%rsi),%cl
test   %cl,%cl
je     1127 <_strcpy+0x27>
xor    %edx,%edx
nopl   0x0(%rax,%rax,1)
mov    %cl,(%rax,%rdx,1)
movzbl 0x1(%rsi,%rdx,1),%ecx
add    $0x1,%rdx
test   %cl,%cl
jne    1110 <_strcpy+0x10>
mov    %edx,%ecx
movb   $0x0,(%rax,%rcx,1)
ret
xor    %ecx,%ecx
movb   $0x0,(%rax,%rcx,1)
ret

LLVM IR (-O0):
define i8* @_strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
br label %6
6: ; preds = %14, %2
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %26
14: ; preds = %6
%15 = load i8*, i8** %4
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
%20 = load i8*, i8** %3
%21 = load i32, i32* %5
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %20, i64 %22
store i8 %19, i8* %23
%24 = load i32, i32* %5
%25 = add nsw i32 %24, 1
store i32 %25, i32* %5
br label %6
26: ; preds = %6
%27 = load i8*, i8** %3
%28 = load i32, i32* %5
%29 = sext i32 %28 to i64
%30 = getelementptr inbounds i8, i8* %27, i64 %29
store i8 0, i8* %30
%31 = load i8*, i8** %3
ret i8* %31
}

LLVM IR (-O2):
define i8* @_strcpy(i8* returned writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i64 [ %9, %5 ], [ 0, %2 ]
%7 = phi i8 [ %11, %5 ], [ %3, %2 ]
%8 = getelementptr inbounds i8, i8* %0, i64 %6
store i8 %7, i8* %8
%9 = add nuw nsw i64 %6, 1
%10 = getelementptr inbounds i8, i8* %1, i64 %9
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5
%14 = and i64 %9, 4294967295
br label %15
15: ; preds = %13, %2
%16 = phi i64 [ 0, %2 ], [ %14, %13 ]
%17 = getelementptr inbounds i8, i8* %0, i64 %16
store i8 0, i8* %17
ret i8* %0
}
int Wstrlen(char *p1) {
  int length = 0;
  if (*p1)
    do
      length++;
    while (*(++p1));
  return (length);
}


x86 assembly (clang, -O0):
<Wstrlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1148 <Wstrlen+0x48>
jmp    1121 <Wstrlen+0x21>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,0x1(%rax)
jne    1121 <Wstrlen+0x21>
jmp    1148 <Wstrlen+0x48>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Wstrlen>:
cmpb   $0x0,(%rdi)
je     111c <Wstrlen+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <Wstrlen+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Wstrlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %17
7: ; preds = %1
br label %8
8: ; preds = %11, %7
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
br label %11
11: ; preds = %8
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %2
%14 = load i8, i8* %13
%15 = icmp ne i8 %14, 0
br i1 %15, label %8, label %16
16: ; preds = %11
br label %17
17: ; preds = %16, %1
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @Wstrlen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %8, %4 ], [ %0, %1 ]
%6 = phi i32 [ %7, %4 ], [ 0, %1 ]
%7 = add nuw nsw i32 %6, 1
%8 = getelementptr inbounds i8, i8* %5, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ serialize_long_long(int /*<<< orphan*/ *, int, long long *,
                                       char const *);
void serialize_int(FILE *out, int n, long long *fpos, const char *fname) {
  serialize_long_long(out, n, fpos, fname);
}


x86 assembly (clang, -O0):
<serialize_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <serialize_long_long@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serialize_int>:
jmp    1030 <serialize_long_long@plt>

LLVM IR (-O0):
define void @serialize_int(i32* %0, i32 %1, i64* %2, i8* %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i64*
%8 = alloca i8*
store i32* %0, i32** %5
store i32 %1, i32* %6
store i64* %2, i64** %7
store i8* %3, i8** %8
%9 = load i32*, i32** %5
%10 = load i32, i32* %6
%11 = load i64*, i64** %7
%12 = load i8*, i8** %8
%13 = call i32 @serialize_long_long(i32* %9, i32 %10, i64* %11, i8* %12)
ret void
}

LLVM IR (-O2):
define void @serialize_int(i32* %0, i32 %1, i64* %2, i8* %3) {
%5 = tail call i32 @serialize_long_long(i32* %0, i32 %1, i64* %2, i8* %3)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t bcd(uint8_t val) { return 10 * (val >> 4) + (0x0F & val); }


x86 assembly (clang, -O0):
<bcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
imul   $0xa,%eax,%eax
mov    -0x4(%rbp),%ecx
and    $0xf,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcd>:
mov    %edi,%eax
sar    $0x4,%eax
lea    (%rax,%rax,4),%eax
and    $0xf,%edi
lea    (%rdi,%rax,2),%eax
ret

LLVM IR (-O0):
define i32 @bcd(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 4
%5 = mul nsw i32 10, %4
%6 = load i32, i32* %2
%7 = and i32 15, %6
%8 = add nsw i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @bcd(i32 %0) {
%2 = ashr i32 %0, 4
%3 = mul nsw i32 %2, 10
%4 = and i32 %0, 15
%5 = add nsw i32 %3, %4
ret i32 %5
}
int isBadVersion(int version) { return version >= 1702766719; }


x86 assembly (clang, -O0):
<isBadVersion>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x657e287f,-0x4(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isBadVersion>:
xor    %eax,%eax
cmp    $0x657e287f,%edi
setge  %al
ret

LLVM IR (-O0):
define i32 @isBadVersion(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 1702766719
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @isBadVersion(i32 %0) {
%2 = icmp sgt i32 %0, 1702766718
%3 = zext i1 %2 to i32
ret i32 %3
}
int main() {
  asm volatile(".byte 0xd6" : : "a"(1));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%eax
(bad)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
(bad)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
tail call void asm sideeffect ".byte 0xd6", "{ax},~{dirflag},~{fpsr},~{flags}"(i32 1)
ret i32 0
}
/* Variables and functions */
double sin(int /*<<< orphan*/);
int /*<<< orphan*/ toRadians(double);
double sinDegrees(double angle) { return sin(toRadians(angle)); }


x86 assembly (clang, -O0):
<sinDegrees>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <toRadians@plt>
mov    %eax,%edi
call   1030 <sin@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sinDegrees>:
push   %rax
call   1040 <toRadians@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <sin@plt>

LLVM IR (-O0):
define double @sinDegrees(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @toRadians(double %3)
%5 = call double @sin(i32 %4)
ret double %5
}

LLVM IR (-O2):
define double @sinDegrees(double %0) {
%2 = tail call i32 @toRadians(double %0)
%3 = tail call double @sin(i32 %2)
ret double %3
}
/* Variables and functions */
void *malloc(size_t);
void *avl_malloc(size_t size, void *param) {
  (void)param;
  return malloc(size);
}


x86 assembly (clang, -O0):
<avl_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avl_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @avl_malloc(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i64, i64* %3
%7 = call i8* @malloc(i64 %6)
ret i8* %7
}

LLVM IR (-O2):
define noalias i8* @avl_malloc(i64 %0, i8* nocapture readnone %1) {
%3 = tail call i8* @malloc(i64 %0)
ret i8* %3
}
int g(int x) { return x; }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @g(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @g(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int mystrlen(char *string) {
  if (string == NULL)
    return -1;
  int counter = 0;
  while (string[counter] != '\0')
    counter++;
  return counter;
}


x86 assembly (clang, -O0):
<mystrlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    111f <mystrlen+0x1f>
movl   $0xffffffff,-0x4(%rbp)
jmp    114f <mystrlen+0x4f>
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1149 <mystrlen+0x49>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <mystrlen+0x26>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mystrlen>:
mov    $0xffffffff,%eax
test   %rdi,%rdi
je     111c <mystrlen+0x1c>
nopw   0x0(%rax,%rax,1)
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <mystrlen+0x10>
ret

LLVM IR (-O0):
define i32 @mystrlen(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 -1, i32* %2
br label %22
8: ; preds = %1
store i32 0, i32* %4
br label %9
9: ; preds = %17, %8
%10 = load i8*, i8** %3
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %9
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %9
20: ; preds = %9
%21 = load i32, i32* %4
store i32 %21, i32* %2
br label %22
22: ; preds = %20, %7
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @mystrlen(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %8, %3 ], [ 0, %1 ]
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
%8 = add nuw i64 %4, 1
br i1 %7, label %9, label %3
9: ; preds = %3
%10 = trunc i64 %4 to i32
br label %11
11: ; preds = %9, %1
%12 = phi i32 [ -1, %1 ], [ %10, %9 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ Speex_Done();
void DLLUnRegister() { Speex_Done(); }


x86 assembly (clang, -O0):
<DLLUnRegister>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Speex_Done@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DLLUnRegister>:
xor    %eax,%eax
jmp    1030 <Speex_Done@plt>

LLVM IR (-O0):
define void @DLLUnRegister() {
%1 = call i32 (...) @Speex_Done()
ret void
}

LLVM IR (-O2):
define void @DLLUnRegister() {
%1 = tail call i32 (...) @Speex_Done()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SHA1(unsigned char const *, size_t, unsigned char *);
int sha1_generate(unsigned char *hash, const unsigned char *text, size_t len) {
  if (!SHA1(text, len, hash)) {
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<sha1_generate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <SHA1@plt>
cmp    $0x0,%eax
jne    114a <sha1_generate+0x3a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1151 <sha1_generate+0x41>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sha1_generate>:
push   %rax
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rdx,%rsi
mov    %rax,%rdx
call   1030 <SHA1@plt>
cmp    $0x1,%eax
sbb    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @sha1_generate(i8* %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
%8 = load i8*, i8** %6
%9 = load i64, i64* %7
%10 = load i8*, i8** %5
%11 = call i32 @SHA1(i8* %8, i64 %9, i8* %10)
%12 = icmp ne i32 %11, 0
br i1 %12, label %14, label %13
13: ; preds = %3
store i32 -1, i32* %4
br label %15
14: ; preds = %3
store i32 0, i32* %4
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %4
ret i32 %16
}

LLVM IR (-O2):
define i32 @sha1_generate(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @SHA1(i8* %1, i64 %2, i8* %0)
%5 = icmp eq i32 %4, 0
%6 = sext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
#define EAGAIN 128
int errno;
int /*<<< orphan*/ exit_with_errno();
void exit_on_bad_errno(void) {
  switch (errno) {
  case EAGAIN:
    break;
  default:
    exit_with_errno();
  }
}


x86 assembly (clang, -O0):
<exit_on_bad_errno>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%eax
sub    $0x80,%eax
jne    1132 <exit_on_bad_errno+0x22>
jmp    112d <exit_on_bad_errno+0x1d>
jmp    1139 <exit_on_bad_errno+0x29>
mov    $0x0,%al
call   1030 <exit_with_errno@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<exit_on_bad_errno>:
mov    0x2ec9(%rip),%rax
cmpl   $0x80,(%rax)
jne    1120 <exit_on_bad_errno+0x10>
ret
xor    %eax,%eax
jmp    1030 <exit_with_errno@plt>

LLVM IR (-O0):
@errno = global i32 0
define void @exit_on_bad_errno() {
%1 = load i32, i32* @errno
switch i32 %1, label %3 [
i32 128, label %2
]
2: ; preds = %0
br label %5
3: ; preds = %0
%4 = call i32 (...) @exit_with_errno()
br label %5
5: ; preds = %3, %2
ret void
}

LLVM IR (-O2):
@errno = global i32 0
define void @exit_on_bad_errno() {
%1 = load i32, i32* @errno
%2 = icmp eq i32 %1, 128
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @exit_with_errno()
br label %5
5: ; preds = %0, %3
ret void
}
void ufsdbg_setup_fault_injection(struct ufs_hba *hba) {}


x86 assembly (clang, -O0):
<ufsdbg_setup_fault_injection>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ufsdbg_setup_fault_injection>:
ret

LLVM IR (-O0):
%struct.ufs_hba = type opaque
define void @ufsdbg_setup_fault_injection(%struct.ufs_hba* %0) {
%2 = alloca %struct.ufs_hba*
store %struct.ufs_hba* %0, %struct.ufs_hba** %2
ret void
}

LLVM IR (-O2):
%struct.ufs_hba = type opaque
define void @ufsdbg_setup_fault_injection(%struct.ufs_hba* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ tweak_constants(unsigned char const *, unsigned char const *,
                                   int);
void initialize_hash_function(const unsigned char *pk_seed,
                              const unsigned char *sk_seed) {
  tweak_constants(pk_seed, sk_seed, 16);
}


x86 assembly (clang, -O0):
<initialize_hash_function>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x10,%edx
call   1030 <tweak_constants@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_hash_function>:
mov    $0x10,%edx
jmp    1030 <tweak_constants@plt>

LLVM IR (-O0):
define void @initialize_hash_function(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @tweak_constants(i8* %5, i8* %6, i32 16)
ret void
}

LLVM IR (-O2):
define void @initialize_hash_function(i8* %0, i8* %1) {
%3 = tail call i32 @tweak_constants(i8* %0, i8* %1, i32 16)
ret void
}
/* Variables and functions */
void *dlsym(void *, char const *);
void *awosResolve(void *in, const char *name) { return dlsym(in, name); }


x86 assembly (clang, -O0):
<awosResolve>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <dlsym@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<awosResolve>:
jmp    1030 <dlsym@plt>

LLVM IR (-O0):
define i8* @awosResolve(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @dlsym(i8* %5, i8* %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @awosResolve(i8* %0, i8* %1) {
%3 = tail call i8* @dlsym(i8* %0, i8* %1)
ret i8* %3
}
/* Variables and functions */
long round(double num) {
  long res = (long)num;
  if ((num - res) >= 0.5) {
    res++;
  }
  return res;
}


x86 assembly (clang, -O0):
<round>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
cvttsd2si -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
cvtsi2sdq -0x10(%rbp),%xmm1
subsd  %xmm1,%xmm0
movsd  0xed6(%rip),%xmm1
ucomisd %xmm1,%xmm0
jb     1140 <round+0x40>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<round>:
cvttsd2si %xmm0,%rax
cvtsi2sd %rax,%xmm1
subsd  %xmm1,%xmm0
ucomisd 0xeea(%rip),%xmm0
sbb    $0xffffffffffffffff,%rax
ret

LLVM IR (-O0):
define i64 @round(double %0) {
%2 = alloca double
%3 = alloca i64
store double %0, double* %2
%4 = load double, double* %2
%5 = fptosi double %4 to i64
store i64 %5, i64* %3
%6 = load double, double* %2
%7 = load i64, i64* %3
%8 = sitofp i64 %7 to double
%9 = fsub double %6, %8
%10 = fcmp oge double %9, 5.000000e-01
br i1 %10, label %11, label %14
11: ; preds = %1
%12 = load i64, i64* %3
%13 = add nsw i64 %12, 1
store i64 %13, i64* %3
br label %14
14: ; preds = %11, %1
%15 = load i64, i64* %3
ret i64 %15
}

LLVM IR (-O2):
define i64 @round(double %0) {
%2 = fptosi double %0 to i64
%3 = sitofp i64 %2 to double
%4 = fsub double %0, %3
%5 = fcmp oge double %4, 5.000000e-01
%6 = zext i1 %5 to i64
%7 = add nsw i64 %6, %2
ret i64 %7
}
/* Type definitions */
struct eapol_sm {
  int dummy;
};
struct eapol_ctx {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct eapol_ctx *);
struct eapol_sm *eapol_sm_init(struct eapol_ctx *ctx) {
  free(ctx);
  return (struct eapol_sm *)1;
}


x86 assembly (clang, -O0):
<eapol_sm_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eapol_sm_init>:
push   %rax
call   1030 <free@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.eapol_sm = type { i32 }
%struct.eapol_ctx = type { i32 }
define %struct.eapol_sm* @eapol_sm_init(%struct.eapol_ctx* %0) {
%2 = alloca %struct.eapol_ctx*
store %struct.eapol_ctx* %0, %struct.eapol_ctx** %2
%3 = load %struct.eapol_ctx*, %struct.eapol_ctx** %2
%4 = call i32 @free(%struct.eapol_ctx* %3)
ret %struct.eapol_sm* inttoptr (i64 1 to %struct.eapol_sm*)
}

LLVM IR (-O2):
%struct.eapol_sm = type { i32 }
%struct.eapol_ctx = type { i32 }
define %struct.eapol_sm* @eapol_sm_init(%struct.eapol_ctx* nocapture %0) {
%2 = tail call i32 @free(%struct.eapol_ctx* %0)
ret %struct.eapol_sm* inttoptr (i64 1 to %struct.eapol_sm*)
}
/* Variables and functions */
int /*<<< orphan*/ conio_init();
int caca_conio_puttext(int left, int top, int right, int bottom, void *destin) {
  conio_init();
  return 0;
}


x86 assembly (clang, -O0):
<caca_conio_puttext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    $0x0,%al
call   1030 <conio_init@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<caca_conio_puttext>:
push   %rax
xor    %eax,%eax
call   1030 <conio_init@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @caca_conio_puttext(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i8*
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i8* %4, i8** %10
%11 = call i32 (...) @conio_init()
ret i32 0
}

LLVM IR (-O2):
define i32 @caca_conio_puttext(i32 %0, i32 %1, i32 %2, i32 %3, i8* nocapture readnone %4) {
%6 = tail call i32 (...) @conio_init()
ret i32 0
}
void __sync(void) {
  int t;
  asm volatile("cpuid" : "=a"(t) : "0"(1) : "ebx", "ecx", "edx", "memory");
}


x86 assembly (clang, -O0):
<__sync>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    $0x1,%eax
cpuid
mov    %eax,-0xc(%rbp)
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sync>:
push   %rbx
mov    $0x1,%eax
cpuid
pop    %rbx
ret

LLVM IR (-O0):
define void @__sync() {
%1 = alloca i32
%2 = call i32 asm sideeffect "cpuid", "={ax},0,~{ebx},~{ecx},~{edx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 1)
store i32 %2, i32* %1
ret void
}

LLVM IR (-O2):
define void @__sync() {
%1 = tail call i32 asm sideeffect "cpuid", "={ax},0,~{ebx},~{ecx},~{edx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 1)
ret void
}
void func7() {}


x86 assembly (clang, -O0):
<func7>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func7>:
ret

LLVM IR (-O0):
define void @func7() {
ret void
}

LLVM IR (-O2):
define void @func7() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wint_t;

/* Variables and functions */
int /*<<< orphan*/ __infer_nondet_int();
wint_t btowc(int c) { return __infer_nondet_int(); }


x86 assembly (clang, -O0):
<btowc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_int@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<btowc>:
xor    %eax,%eax
jmp    1030 <__infer_nondet_int@plt>

LLVM IR (-O0):
define i32 @btowc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @__infer_nondet_int()
ret i32 %3
}

LLVM IR (-O2):
define i32 @btowc(i32 %0) {
%2 = tail call i32 (...) @__infer_nondet_int()
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ hide(char *);
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  hide(argv[1]);
  printf(argv[1]);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <hide@plt>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    %rsi,%rbx
mov    0x8(%rsi),%rdi
call   1040 <hide@plt>
mov    0x8(%rbx),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i8**, i8*** %4
%6 = getelementptr inbounds i8*, i8** %5, i64 1
%7 = load i8*, i8** %6
%8 = call i32 @hide(i8* %7)
%9 = load i8**, i8*** %4
%10 = getelementptr inbounds i8*, i8** %9, i64 1
%11 = load i8*, i8** %10
%12 = call i32 @printf(i8* %11)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @hide(i8* %4)
%6 = load i8*, i8** %3
%7 = tail call i32 @printf(i8* dereferenceable(1) %6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ writel(int, void *);
void set__PIO_PCx__INPUT_WEAK_PULL_UP(void *base, int pin) {
  writel(((0x1) & 0x1) << pin, base + (0x28 + (2) * 0x10));
  writel(((0x1) & 0x1) << pin, base + (0x28 + (1) * 0x10));
  writel(((0x1) & 0x1) << pin, base + (0x28 + (0) * 0x10));
}


x86 assembly (clang, -O0):
<set__PIO_PCx__INPUT_WEAK_PULL_UP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x1,%edi
shl    %cl,%edi
mov    -0x8(%rbp),%rsi
add    $0x48,%rsi
call   1030 <writel@plt>
mov    -0xc(%rbp),%ecx
mov    $0x1,%edi
shl    %cl,%edi
mov    -0x8(%rbp),%rsi
add    $0x38,%rsi
call   1030 <writel@plt>
mov    -0xc(%rbp),%ecx
mov    $0x1,%edi
shl    %cl,%edi
mov    -0x8(%rbp),%rsi
add    $0x28,%rsi
call   1030 <writel@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set__PIO_PCx__INPUT_WEAK_PULL_UP>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ecx
mov    %rdi,%rbx
mov    $0x1,%ebp
shl    %cl,%ebp
lea    0x48(%rdi),%rsi
mov    %ebp,%edi
call   1030 <writel@plt>
lea    0x38(%rbx),%rsi
mov    %ebp,%edi
call   1030 <writel@plt>
add    $0x28,%rbx
mov    %ebp,%edi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <writel@plt>

LLVM IR (-O0):
define void @set__PIO_PCx__INPUT_WEAK_PULL_UP(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 1, %5
%7 = load i8*, i8** %3
%8 = getelementptr i8, i8* %7, i64 72
%9 = call i32 @writel(i32 %6, i8* %8)
%10 = load i32, i32* %4
%11 = shl i32 1, %10
%12 = load i8*, i8** %3
%13 = getelementptr i8, i8* %12, i64 56
%14 = call i32 @writel(i32 %11, i8* %13)
%15 = load i32, i32* %4
%16 = shl i32 1, %15
%17 = load i8*, i8** %3
%18 = getelementptr i8, i8* %17, i64 40
%19 = call i32 @writel(i32 %16, i8* %18)
ret void
}

LLVM IR (-O2):
define void @set__PIO_PCx__INPUT_WEAK_PULL_UP(i8* %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = getelementptr i8, i8* %0, i64 72
%5 = tail call i32 @writel(i32 %3, i8* %4)
%6 = getelementptr i8, i8* %0, i64 56
%7 = tail call i32 @writel(i32 %3, i8* %6)
%8 = getelementptr i8, i8* %0, i64 40
%9 = tail call i32 @writel(i32 %3, i8* %8)
ret void
}
/* Variables and functions */
float saturate(float);
int sqrt(int);
float GGX_PartialGeometry(float cosThetaN, float alpha) {
  float cosTheta_sqr = saturate(cosThetaN * cosThetaN);
  float tan2 = (1 - cosTheta_sqr) / cosTheta_sqr;
  float GP = 2 / (1 + sqrt(1 + alpha * alpha * tan2));
  return GP;
}


x86 assembly (clang, -O0):
<GGX_PartialGeometry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
call   1030 <saturate@plt>
movss  %xmm0,-0xc(%rbp)
movss  0xeb2(%rip),%xmm0
subss  -0xc(%rbp),%xmm0
divss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x8(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
movss  -0x10(%rbp),%xmm1
mulss  %xmm1,%xmm0
movss  0xe88(%rip),%xmm1
addss  %xmm1,%xmm0
cvttss2si %xmm0,%edi
call   1040 <sqrt@plt>
mov    %eax,%ecx
add    $0x1,%ecx
mov    $0x2,%eax
cltd
idiv   %ecx
cvtsi2ss %eax,%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GGX_PartialGeometry>:
push   %rax
movss  %xmm1,0x4(%rsp)
mulss  %xmm0,%xmm0
call   1030 <saturate@plt>
movss  0xec8(%rip),%xmm1
movaps %xmm1,%xmm2
subss  %xmm0,%xmm2
divss  %xmm0,%xmm2
movss  0x4(%rsp),%xmm0
mulss  %xmm0,%xmm0
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
cvttss2si %xmm0,%edi
call   1040 <sqrt@plt>
mov    %eax,%ecx
add    $0x1,%ecx
mov    $0x2,%eax
xor    %edx,%edx
idiv   %ecx
xorps  %xmm0,%xmm0
cvtsi2ss %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @GGX_PartialGeometry(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
store float %0, float* %3
store float %1, float* %4
%8 = load float, float* %3
%9 = load float, float* %3
%10 = fmul float %8, %9
%11 = call float @saturate(float %10)
store float %11, float* %5
%12 = load float, float* %5
%13 = fsub float 1.000000e+00, %12
%14 = load float, float* %5
%15 = fdiv float %13, %14
store float %15, float* %6
%16 = load float, float* %4
%17 = load float, float* %4
%18 = fmul float %16, %17
%19 = load float, float* %6
%20 = call float @llvm.fmuladd.f32(float %18, float %19, float 1.000000e+00)
%21 = fptosi float %20 to i32
%22 = call i32 @sqrt(i32 %21)
%23 = add nsw i32 1, %22
%24 = sdiv i32 2, %23
%25 = sitofp i32 %24 to float
store float %25, float* %7
%26 = load float, float* %7
ret float %26
}

LLVM IR (-O2):
define float @GGX_PartialGeometry(float %0, float %1) {
%3 = fmul float %0, %0
%4 = tail call float @saturate(float %3)
%5 = fsub float 1.000000e+00, %4
%6 = fdiv float %5, %4
%7 = fmul float %1, %1
%8 = tail call float @llvm.fmuladd.f32(float %7, float %6, float 1.000000e+00)
%9 = fptosi float %8 to i32
%10 = tail call i32 @sqrt(i32 %9)
%11 = add nsw i32 %10, 1
%12 = sdiv i32 2, %11
%13 = sitofp i32 %12 to float
ret float %13
}
/* Type definitions */
struct hw_device {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ disk_write(struct hw_device *, int, int);
void disk_reset(struct hw_device *dev) {
  disk_write(dev, 1, 0);
  disk_write(dev, 2, 0);
  disk_write(dev, 2 + 1, 0);
  disk_write(dev, 0, 0x4);
}


x86 assembly (clang, -O0):
<disk_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
xor    %edx,%edx
call   1030 <disk_write@plt>
mov    -0x8(%rbp),%rdi
mov    $0x2,%esi
xor    %edx,%edx
call   1030 <disk_write@plt>
mov    -0x8(%rbp),%rdi
mov    $0x3,%esi
xor    %edx,%edx
call   1030 <disk_write@plt>
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1030 <disk_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disk_reset>:
push   %rbx
mov    %rdi,%rbx
mov    $0x1,%esi
xor    %edx,%edx
call   1030 <disk_write@plt>
mov    %rbx,%rdi
mov    $0x2,%esi
xor    %edx,%edx
call   1030 <disk_write@plt>
mov    %rbx,%rdi
mov    $0x3,%esi
xor    %edx,%edx
call   1030 <disk_write@plt>
mov    %rbx,%rdi
xor    %esi,%esi
mov    $0x4,%edx
pop    %rbx
jmp    1030 <disk_write@plt>

LLVM IR (-O0):
%struct.hw_device = type { i32 }
define void @disk_reset(%struct.hw_device* %0) {
%2 = alloca %struct.hw_device*
store %struct.hw_device* %0, %struct.hw_device** %2
%3 = load %struct.hw_device*, %struct.hw_device** %2
%4 = call i32 @disk_write(%struct.hw_device* %3, i32 1, i32 0)
%5 = load %struct.hw_device*, %struct.hw_device** %2
%6 = call i32 @disk_write(%struct.hw_device* %5, i32 2, i32 0)
%7 = load %struct.hw_device*, %struct.hw_device** %2
%8 = call i32 @disk_write(%struct.hw_device* %7, i32 3, i32 0)
%9 = load %struct.hw_device*, %struct.hw_device** %2
%10 = call i32 @disk_write(%struct.hw_device* %9, i32 0, i32 4)
ret void
}

LLVM IR (-O2):
%struct.hw_device = type { i32 }
define void @disk_reset(%struct.hw_device* %0) {
%2 = tail call i32 @disk_write(%struct.hw_device* %0, i32 1, i32 0)
%3 = tail call i32 @disk_write(%struct.hw_device* %0, i32 2, i32 0)
%4 = tail call i32 @disk_write(%struct.hw_device* %0, i32 3, i32 0)
%5 = tail call i32 @disk_write(%struct.hw_device* %0, i32 0, i32 4)
ret void
}
void li2c(long int t1, unsigned char temp_1[]) {
  temp_1[0] = t1 >> 24;
  temp_1[1] = t1 >> 16;
  temp_1[2] = t1 >> 8;
  temp_1[3] = t1;
}


x86 assembly (clang, -O0):
<li2c>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sar    $0x18,%rax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
sar    $0x10,%rax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x8(%rbp),%rax
sar    $0x8,%rax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0x8(%rbp),%rax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<li2c>:
bswap  %edi
mov    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @li2c(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
%5 = load i64, i64* %3
%6 = ashr i64 %5, 24
%7 = trunc i64 %6 to i8
%8 = load i8*, i8** %4
%9 = getelementptr inbounds i8, i8* %8, i64 0
store i8 %7, i8* %9
%10 = load i64, i64* %3
%11 = ashr i64 %10, 16
%12 = trunc i64 %11 to i8
%13 = load i8*, i8** %4
%14 = getelementptr inbounds i8, i8* %13, i64 1
store i8 %12, i8* %14
%15 = load i64, i64* %3
%16 = ashr i64 %15, 8
%17 = trunc i64 %16 to i8
%18 = load i8*, i8** %4
%19 = getelementptr inbounds i8, i8* %18, i64 2
store i8 %17, i8* %19
%20 = load i64, i64* %3
%21 = trunc i64 %20 to i8
%22 = load i8*, i8** %4
%23 = getelementptr inbounds i8, i8* %22, i64 3
store i8 %21, i8* %23
ret void
}

LLVM IR (-O2):
define void @li2c(i64 %0, i8* nocapture writeonly %1) {
%3 = lshr i64 %0, 24
%4 = trunc i64 %3 to i8
store i8 %4, i8* %1
%5 = lshr i64 %0, 16
%6 = trunc i64 %5 to i8
%7 = getelementptr inbounds i8, i8* %1, i64 1
store i8 %6, i8* %7
%8 = lshr i64 %0, 8
%9 = trunc i64 %8 to i8
%10 = getelementptr inbounds i8, i8* %1, i64 2
store i8 %9, i8* %10
%11 = trunc i64 %0 to i8
%12 = getelementptr inbounds i8, i8* %1, i64 3
store i8 %11, i8* %12
ret void
}