#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef scalar_t__ uint32_t;
typedef int int32_t;

/* Variables and functions */
__attribute__((always_)) uint32_t __SHSUB8(uint32_t x, uint32_t y) {
  int32_t r, s, t, u;
  r = (((((int32_t)x << 24) >> 24) - (((int32_t)y << 24) >> 24)) >> 1) &
      (int32_t)0x000000FF;
  s = (((((int32_t)x << 16) >> 24) - (((int32_t)y << 16) >> 24)) >> 1) &
      (int32_t)0x000000FF;
  t = (((((int32_t)x << 8) >> 24) - (((int32_t)y << 8) >> 24)) >> 1) &
      (int32_t)0x000000FF;
  u = (((((int32_t)x) >> 24) - (((int32_t)y) >> 24)) >> 1) &
      (int32_t)0x000000FF;
  return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r)));
}


x86 assembly (clang, -O0):
<__SHSUB8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x18,%eax
sar    $0x18,%eax
mov    -0x10(%rbp),%rcx
shl    $0x18,%ecx
sar    $0x18,%ecx
sub    %ecx,%eax
sar    $0x1,%eax
and    $0xff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x10,%eax
sar    $0x18,%eax
mov    -0x10(%rbp),%rcx
shl    $0x10,%ecx
sar    $0x18,%ecx
sub    %ecx,%eax
sar    $0x1,%eax
and    $0xff,%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x8,%eax
sar    $0x18,%eax
mov    -0x10(%rbp),%rcx
shl    $0x8,%ecx
sar    $0x18,%ecx
sub    %ecx,%eax
sar    $0x1,%eax
and    $0xff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
sar    $0x18,%eax
mov    -0x10(%rbp),%rcx
sar    $0x18,%ecx
sub    %ecx,%eax
sar    $0x1,%eax
and    $0xff,%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
shl    $0x18,%eax
mov    -0x1c(%rbp),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x18(%rbp),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
or     -0x14(%rbp),%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<__SHSUB8>:
movsbl %dil,%eax
movsbl %sil,%ecx
sub    %ecx,%eax
shr    %eax
movzbl %al,%r8d
mov    %edi,%ecx
shr    $0x8,%ecx
movsbl %cl,%ecx
mov    %esi,%edx
shr    $0x8,%edx
movsbl %dl,%edx
sub    %edx,%ecx
mov    %edi,%edx
shr    $0x10,%edx
movsbl %dl,%edx
mov    %esi,%eax
shr    $0x10,%eax
movsbl %al,%eax
sub    %eax,%edx
sar    $0x18,%edi
sar    $0x18,%esi
sub    %esi,%edi
and    $0xfffffffe,%edi
shl    $0x17,%edi
shl    $0xf,%edx
and    $0xff0000,%edx
or     %edi,%edx
shl    $0x7,%ecx
and    $0xff00,%ecx
or     %edx,%ecx
or     %r8d,%ecx
movslq %ecx,%rax
ret

LLVM IR (-O0):
define i64 @__SHSUB8(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i64 %0, i64* %3
store i64 %1, i64* %4
%9 = load i64, i64* %3
%10 = trunc i64 %9 to i32
%11 = shl i32 %10, 24
%12 = ashr i32 %11, 24
%13 = load i64, i64* %4
%14 = trunc i64 %13 to i32
%15 = shl i32 %14, 24
%16 = ashr i32 %15, 24
%17 = sub nsw i32 %12, %16
%18 = ashr i32 %17, 1
%19 = and i32 %18, 255
store i32 %19, i32* %5
%20 = load i64, i64* %3
%21 = trunc i64 %20 to i32
%22 = shl i32 %21, 16
%23 = ashr i32 %22, 24
%24 = load i64, i64* %4
%25 = trunc i64 %24 to i32
%26 = shl i32 %25, 16
%27 = ashr i32 %26, 24
%28 = sub nsw i32 %23, %27
%29 = ashr i32 %28, 1
%30 = and i32 %29, 255
store i32 %30, i32* %6
%31 = load i64, i64* %3
%32 = trunc i64 %31 to i32
%33 = shl i32 %32, 8
%34 = ashr i32 %33, 24
%35 = load i64, i64* %4
%36 = trunc i64 %35 to i32
%37 = shl i32 %36, 8
%38 = ashr i32 %37, 24
%39 = sub nsw i32 %34, %38
%40 = ashr i32 %39, 1
%41 = and i32 %40, 255
store i32 %41, i32* %7
%42 = load i64, i64* %3
%43 = trunc i64 %42 to i32
%44 = ashr i32 %43, 24
%45 = load i64, i64* %4
%46 = trunc i64 %45 to i32
%47 = ashr i32 %46, 24
%48 = sub nsw i32 %44, %47
%49 = ashr i32 %48, 1
%50 = and i32 %49, 255
store i32 %50, i32* %8
%51 = load i32, i32* %8
%52 = shl i32 %51, 24
%53 = load i32, i32* %7
%54 = shl i32 %53, 16
%55 = or i32 %52, %54
%56 = load i32, i32* %6
%57 = shl i32 %56, 8
%58 = or i32 %55, %57
%59 = load i32, i32* %5
%60 = or i32 %58, %59
%61 = sext i32 %60 to i64
ret i64 %61
}

LLVM IR (-O2):
define i64 @__SHSUB8(i64 %0, i64 %1) {
%3 = trunc i64 %0 to i32
%4 = shl i32 %3, 24
%5 = ashr exact i32 %4, 24
%6 = trunc i64 %1 to i32
%7 = shl i32 %6, 24
%8 = ashr exact i32 %7, 24
%9 = sub nsw i32 %5, %8
%10 = lshr i32 %9, 1
%11 = and i32 %10, 255
%12 = shl i32 %3, 16
%13 = ashr i32 %12, 24
%14 = shl i32 %6, 16
%15 = ashr i32 %14, 24
%16 = sub nsw i32 %13, %15
%17 = shl i32 %3, 8
%18 = ashr i32 %17, 24
%19 = shl i32 %6, 8
%20 = ashr i32 %19, 24
%21 = sub nsw i32 %18, %20
%22 = ashr i32 %3, 24
%23 = ashr i32 %6, 24
%24 = sub nsw i32 %22, %23
%25 = shl nsw i32 %24, 23
%26 = and i32 %25, -16777216
%27 = shl nsw i32 %21, 15
%28 = and i32 %27, 16711680
%29 = or i32 %28, %26
%30 = shl nsw i32 %16, 7
%31 = and i32 %30, 65280
%32 = or i32 %29, %31
%33 = or i32 %32, %11
%34 = sext i32 %33 to i64
ret i64 %34
}