xunge/DecIR huggingface dataset:
/* Variables and functions */
char *f();
int /*<<< orphan*/ g(char *);
int main() {
  char *ptr = f();
  *ptr = 'a';
  g(ptr);
  *ptr = 'b';
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <f@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x61,(%rax)
mov    -0x8(%rbp),%rdi
call   1040 <g@plt>
mov    -0x8(%rbp),%rax
movb   $0x62,(%rax)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1030 <f@plt>
mov    %rax,%rbx
movb   $0x61,(%rax)
mov    %rax,%rdi
call   1040 <g@plt>
movb   $0x62,(%rbx)
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i8*
%2 = call i8* (...) @f()
store i8* %2, i8** %1
%3 = load i8*, i8** %1
store i8 97, i8* %3
%4 = load i8*, i8** %1
%5 = call i32 @g(i8* %4)
%6 = load i8*, i8** %1
store i8 98, i8* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i8* (...) @f()
store i8 97, i8* %1
%2 = tail call i32 @g(i8* %1)
store i8 98, i8* %1
ret i32 0
}
void attrset(int color) {}


x86 assembly (clang, -O0):
<attrset>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<attrset>:
ret

LLVM IR (-O0):
define void @attrset(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @attrset(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ HplMsp430GeneralIOP__37__IO__set();
void Msp430GpioC__8__HplGeneralIO__set(void) {
  HplMsp430GeneralIOP__37__IO__set();
}


x86 assembly (clang, -O0):
<Msp430GpioC__8__HplGeneralIO__set>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMsp430GeneralIOP__37__IO__set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430GpioC__8__HplGeneralIO__set>:
xor    %eax,%eax
jmp    1030 <HplMsp430GeneralIOP__37__IO__set@plt>

LLVM IR (-O0):
define void @Msp430GpioC__8__HplGeneralIO__set() {
%1 = call i32 (...) @HplMsp430GeneralIOP__37__IO__set()
ret void
}

LLVM IR (-O2):
define void @Msp430GpioC__8__HplGeneralIO__set() {
%1 = tail call i32 (...) @HplMsp430GeneralIOP__37__IO__set()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int G80_f(char *s) {
  debug("G80_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<G80_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xef9(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<G80_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf05(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [46 x i8] c"G80_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @G80_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [46 x i8] c"G80_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @G80_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
/* Variables and functions */
void *realloc(void *, unsigned int);
int validarMemoria(void **punt, unsigned int bytes) {
  void *aux;
  aux = realloc(*punt, bytes);
  if (aux == NULL)
    return 1;
  *punt = aux;
  return 0;
}


x86 assembly (clang, -O0):
<validarMemoria>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
mov    -0x14(%rbp),%esi
call   1030 <realloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1149 <validarMemoria+0x39>
movl   $0x1,-0x4(%rbp)
jmp    115b <validarMemoria+0x4b>
mov    -0x20(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<validarMemoria>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <realloc@plt>
test   %rax,%rax
je     1128 <validarMemoria+0x18>
mov    %rax,(%rbx)
xor    %eax,%eax
pop    %rbx
ret
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @validarMemoria(i8** %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
%6 = alloca i8*
store i8** %0, i8*** %4
store i32 %1, i32* %5
%7 = load i8**, i8*** %4
%8 = load i8*, i8** %7
%9 = load i32, i32* %5
%10 = call i8* @realloc(i8* %8, i32 %9)
store i8* %10, i8** %6
%11 = load i8*, i8** %6
%12 = icmp eq i8* %11, null
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 1, i32* %3
br label %17
14: ; preds = %2
%15 = load i8*, i8** %6
%16 = load i8**, i8*** %4
store i8* %15, i8** %16
store i32 0, i32* %3
br label %17
17: ; preds = %14, %13
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @validarMemoria(i8** nocapture %0, i32 %1) {
%3 = load i8*, i8** %0
%4 = tail call i8* @realloc(i8* %3, i32 %1)
%5 = icmp eq i8* %4, null
br i1 %5, label %7, label %6
6: ; preds = %2
store i8* %4, i8** %0
br label %7
7: ; preds = %2, %6
%8 = phi i32 [ 0, %6 ], [ 1, %2 ]
ret i32 %8
}
void enqueue_pushable_task(struct rq *rq, struct task_struct *p) {}


x86 assembly (clang, -O0):
<enqueue_pushable_task>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<enqueue_pushable_task>:
ret

LLVM IR (-O0):
%struct.rq = type opaque
%struct.task_struct = type opaque
define void @enqueue_pushable_task(%struct.rq* %0, %struct.task_struct* %1) {
%3 = alloca %struct.rq*
%4 = alloca %struct.task_struct*
store %struct.rq* %0, %struct.rq** %3
store %struct.task_struct* %1, %struct.task_struct** %4
ret void
}

LLVM IR (-O2):
%struct.rq = type opaque
%struct.task_struct = type opaque
define void @enqueue_pushable_task(%struct.rq* nocapture %0, %struct.task_struct* nocapture %1) {
ret void
}
/* Variables and functions */
float __ocml_cbrt_f32(float);
float cbrtf(float x) { return __ocml_cbrt_f32(x); }


x86 assembly (clang, -O0):
<cbrtf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <__ocml_cbrt_f32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbrtf>:
jmp    1030 <__ocml_cbrt_f32@plt>

LLVM IR (-O0):
define float @cbrtf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @__ocml_cbrt_f32(float %3)
ret float %4
}

LLVM IR (-O2):
define float @cbrtf(float %0) {
%2 = tail call float @__ocml_cbrt_f32(float %0)
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ pthread_exit(void *);
void *thr_func2(void *arg) {
  printf("thread 2: ");
  pthread_exit((void *)0);
}


x86 assembly (clang, -O0):
<thr_func2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
mov    %eax,%edi
call   1040 <pthread_exit@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thr_func2>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <pthread_exit@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"thread 2: \00"
define i8* @thr_func2(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @pthread_exit(i8* null)
%6 = load i8*, i8** %2
ret i8* %6
}

LLVM IR (-O2):
@.str = [11 x i8] c"thread 2: \00"
define noalias i8* @thr_func2(i8* nocapture readnone %0) {
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @pthread_exit(i8* null)
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ scanf(char *, float *);
int main() {
  float flottant;
  scanf("%f", &flottant);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1030 <scanf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1030 <scanf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%f\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca float
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), float* %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%f\00"
define i32 @main() {
%1 = alloca float
%2 = bitcast float* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), float* %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x9f() {
  Assert_real((isspace(159) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              800, ("isspace should be 0 for 0x9f"));
}


x86 assembly (clang, -O0):
<t_isspace_0x9f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x9f,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x320,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x9f>:
push   %rax
mov    $0x9f,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x320,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0x9f\00"
define void @t_isspace_0x9f() {
%1 = call i64 @isspace(i32 159)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 800, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0x9f\00"
define void @t_isspace_0x9f() {
%1 = tail call i64 @isspace(i32 159)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 800, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void hugo_font(int f) {}


x86 assembly (clang, -O0):
<hugo_font>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<hugo_font>:
ret

LLVM IR (-O0):
define void @hugo_font(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @hugo_font(i32 %0) {
ret void
}
/* Type definitions */
struct t_squad {
  int dummy;
};
struct t_creature {
  int dummy;
};

/* Variables and functions */
struct t_creature **squad_find_empty(struct t_squad *);
int squad_add(struct t_squad *sq, struct t_creature *cr) {
  struct t_creature **e = squad_find_empty(sq);
  if (e) {
    *e = cr;
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<squad_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <squad_find_empty@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     114f <squad_add+0x3f>
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x0,-0x4(%rbp)
jmp    1156 <squad_add+0x46>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<squad_add>:
push   %rbx
mov    %rsi,%rbx
call   1030 <squad_find_empty@plt>
test   %rax,%rax
je     1125 <squad_add+0x15>
mov    %rbx,(%rax)
xor    %eax,%eax
pop    %rbx
ret
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.t_squad = type { i32 }
%struct.t_creature = type { i32 }
define i32 @squad_add(%struct.t_squad* %0, %struct.t_creature* %1) {
%3 = alloca i32
%4 = alloca %struct.t_squad*
%5 = alloca %struct.t_creature*
%6 = alloca %struct.t_creature**
store %struct.t_squad* %0, %struct.t_squad** %4
store %struct.t_creature* %1, %struct.t_creature** %5
%7 = load %struct.t_squad*, %struct.t_squad** %4
%8 = call %struct.t_creature** @squad_find_empty(%struct.t_squad* %7)
store %struct.t_creature** %8, %struct.t_creature*** %6
%9 = load %struct.t_creature**, %struct.t_creature*** %6
%10 = icmp ne %struct.t_creature** %9, null
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = load %struct.t_creature*, %struct.t_creature** %5
%13 = load %struct.t_creature**, %struct.t_creature*** %6
store %struct.t_creature* %12, %struct.t_creature** %13
store i32 0, i32* %3
br label %15
14: ; preds = %2
store i32 1, i32* %3
br label %15
15: ; preds = %14, %11
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
%struct.t_squad = type { i32 }
%struct.t_creature = type { i32 }
define i32 @squad_add(%struct.t_squad* %0, %struct.t_creature* %1) {
%3 = tail call %struct.t_creature** @squad_find_empty(%struct.t_squad* %0)
%4 = icmp eq %struct.t_creature** %3, null
br i1 %4, label %6, label %5
5: ; preds = %2
store %struct.t_creature* %1, %struct.t_creature** %3
br label %6
6: ; preds = %2, %5
%7 = phi i32 [ 0, %5 ], [ 1, %2 ]
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int _open(uint8_t *path, int32_t flags, ...) { return -1; }


x86 assembly (clang, -O0):
<_open>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_open>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @_open(i32* %0, i32 %1, ...) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
ret i32 -1
}

LLVM IR (-O2):
define i32 @_open(i32* nocapture readnone %0, i32 %1, ...) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf(
      "usage: create_iam "
      "[-h] [-k <keysize>] [-r recsize] [-b <blocksize] [-p <ptrsize>] [-v]\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [88 x i8] c"usage: create_iam [-h] [-k <keysize>] [-r recsize] [-b <blocksize] [-p <ptrsize>] [-v]\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([88 x i8], [88 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [87 x i8] c"usage: create_iam [-h] [-k <keysize>] [-r recsize] [-b <blocksize] [-p <ptrsize>] [-v]\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([87 x i8], [87 x i8]* @str, i64 0, i64 0))
ret void
}
void perfmon_stop(void) {}


x86 assembly (clang, -O0):
<perfmon_stop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perfmon_stop>:
ret

LLVM IR (-O0):
define void @perfmon_stop() {
ret void
}

LLVM IR (-O2):
define void @perfmon_stop() {
ret void
}
void atomic_thread_fence(memory_order_acq_rel_t) {
  __asm__ __volatile__("" : : : "memory");
}


x86 assembly (clang, -O0):
<atomic_thread_fence>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_thread_fence>:
ret

LLVM IR (-O0):
define void @atomic_thread_fence(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @atomic_thread_fence(i32 %0) {
tail call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int8_t;

/* Variables and functions */
int /*<<< orphan*/ __builtin_ctz(unsigned int);
int8_t m_uintctz(unsigned int n) { return __builtin_ctz(n); }


x86 assembly (clang, -O0):
<m_uintctz>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
bsf    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<m_uintctz>:
bsf    %edi,%eax
ret

LLVM IR (-O0):
define i32 @m_uintctz(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @llvm.cttz.i32(i32 %3, i1 true)
ret i32 %4
}

LLVM IR (-O2):
define i32 @m_uintctz(i32 %0) {
%2 = tail call i32 @llvm.cttz.i32(i32 %0, i1 true)
ret i32 %2
}
/* Variables and functions */
unsigned int __builtin_crypto_vshasigmaw(unsigned int, int, int);
int main() {
  __attribute__((altivec(vector__))) unsigned int test, res;
  const int s0 = 0;
  int mask;
  res = __builtin_crypto_vshasigmaw(test, 1, 0xff);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    $0x1,%esi
mov    $0xff,%edx
call   1030 <__builtin_crypto_vshasigmaw@plt>
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%esi
mov    $0xff,%edx
call   1030 <__builtin_crypto_vshasigmaw@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %4
%6 = load i32, i32* %2
%7 = call i32 @__builtin_crypto_vshasigmaw(i32 %6, i32 1, i32 255)
store i32 %7, i32* %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @__builtin_crypto_vshasigmaw(i32 undef, i32 1, i32 255)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ channel;

/* Variables and functions */
int /*<<< orphan*/ dac_enable_channel(int /*<<< orphan*/);
size_t usart_in_waiting();
int /*<<< orphan*/ usart_read(int /*<<< orphan*/ *, int);
void rpc_dac_enable_channel(void) {
  uint8_t channel;
  size_t argsize = sizeof(channel);
  while (usart_in_waiting() < argsize)
    ;
  usart_read(&channel, sizeof(channel));
  dac_enable_channel(channel);
}


x86 assembly (clang, -O0):
<rpc_dac_enable_channel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x4,-0x10(%rbp)
mov    $0x0,%al
call   1040 <usart_in_waiting@plt>
cmp    -0x10(%rbp),%rax
jae    1156 <rpc_dac_enable_channel+0x26>
jmp    1140 <rpc_dac_enable_channel+0x10>
lea    -0x4(%rbp),%rdi
mov    $0x4,%esi
call   1030 <usart_read@plt>
mov    -0x4(%rbp),%edi
call   1050 <dac_enable_channel@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpc_dac_enable_channel>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1040 <usart_in_waiting@plt>
cmp    $0x4,%rax
jb     1140 <rpc_dac_enable_channel+0x10>
lea    0x4(%rsp),%rdi
mov    $0x4,%esi
call   1030 <usart_read@plt>
mov    0x4(%rsp),%edi
call   1050 <dac_enable_channel@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @rpc_dac_enable_channel() {
%1 = alloca i32
%2 = alloca i64
store i64 4, i64* %2
br label %3
3: ; preds = %7, %0
%4 = call i64 (...) @usart_in_waiting()
%5 = load i64, i64* %2
%6 = icmp ult i64 %4, %5
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
%9 = call i32 @usart_read(i32* %1, i32 4)
%10 = load i32, i32* %1
%11 = call i32 @dac_enable_channel(i32 %10)
ret void
}

LLVM IR (-O2):
define void @rpc_dac_enable_channel() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
br label %3
3: ; preds = %3, %0
%4 = tail call i64 (...) @usart_in_waiting()
%5 = icmp ult i64 %4, 4
br i1 %5, label %3, label %6
6: ; preds = %3
%7 = call i32 @usart_read(i32* %1, i32 4)
%8 = load i32, i32* %1
%9 = call i32 @dac_enable_channel(i32 %8)
ret void
}
int main(void) {
  int *p;
  int i = 2;
  p = 0;
  p[2] = 3;
  return p[i];
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x2,-0x14(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x3,0x8(%rax)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
movl   $0x3,0x8
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32
store i32 0, i32* %1
store i32 2, i32* %3
store i32* null, i32** %2
%4 = load i32*, i32** %2
%5 = getelementptr inbounds i32, i32* %4, i64 2
store i32 3, i32* %5
%6 = load i32*, i32** %2
%7 = load i32, i32* %3
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %6, i64 %8
%10 = load i32, i32* %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @main() {
store i32 3, i32* inttoptr (i64 8 to i32*)
ret i32 3
}
/* Type definitions */
struct comp {
  int dummy;
};
struct BrzFetchReject_ {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ SEND_REQDOWN_DELAYED(int, int);
void BrzFetchReject_ackup(struct comp *comp, int port) {
  struct BrzFetchReject_ *c = (struct BrzFetchReject_ *)comp;
  SEND_REQDOWN_DELAYED(2, 1);
}


x86 assembly (clang, -O0):
<BrzFetchReject_ackup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    $0x2,%edi
mov    $0x1,%esi
call   1030 <SEND_REQDOWN_DELAYED@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BrzFetchReject_ackup>:
mov    $0x2,%edi
mov    $0x1,%esi
jmp    1030 <SEND_REQDOWN_DELAYED@plt>

LLVM IR (-O0):
%struct.comp = type { i32 }
%struct.BrzFetchReject_ = type { i32 }
define void @BrzFetchReject_ackup(%struct.comp* %0, i32 %1) {
%3 = alloca %struct.comp*
%4 = alloca i32
%5 = alloca %struct.BrzFetchReject_*
store %struct.comp* %0, %struct.comp** %3
store i32 %1, i32* %4
%6 = load %struct.comp*, %struct.comp** %3
%7 = bitcast %struct.comp* %6 to %struct.BrzFetchReject_*
store %struct.BrzFetchReject_* %7, %struct.BrzFetchReject_** %5
%8 = call i32 @SEND_REQDOWN_DELAYED(i32 2, i32 1)
ret void
}

LLVM IR (-O2):
%struct.comp = type { i32 }
define void @BrzFetchReject_ackup(%struct.comp* nocapture readnone %0, i32 %1) {
%3 = tail call i32 @SEND_REQDOWN_DELAYED(i32 2, i32 1)
ret void
}
/* Variables and functions */
int UCHAR_MAX;
size_t max_offset_for_cap(size_t cap) {
  size_t max_offset;
  max_offset = cap / 10;
  if (max_offset < 4) {
    max_offset = 4;
  }
  if (max_offset > (UCHAR_MAX - 1)) {
    max_offset = (UCHAR_MAX - 1);
  }
  return max_offset;
}


x86 assembly (clang, -O0):
<max_offset_for_cap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0xa,%ecx
xor    %edx,%edx
div    %rcx
mov    %rax,-0x10(%rbp)
cmpq   $0x4,-0x10(%rbp)
jae    112d <max_offset_for_cap+0x2d>
movq   $0x4,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x2eb8(%rip),%rcx
mov    (%rcx),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
cmp    %rcx,%rax
jbe    115b <max_offset_for_cap+0x5b>
mov    0x2ea0(%rip),%rax
mov    (%rax),%eax
sub    $0x1,%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max_offset_for_cap>:
mov    %rdi,%rax
movabs $0xcccccccccccccccd,%rcx
cc cc cc
mul    %rcx
shr    $0x3,%rdx
cmp    $0x5,%rdx
mov    $0x4,%ecx
cmovae %rdx,%rcx
mov    0x2ec8(%rip),%rax
movslq (%rax),%rax
add    $0xffffffffffffffff,%rax
cmp    %rax,%rcx
cmovbe %rcx,%rax
ret

LLVM IR (-O0):
@UCHAR_MAX = global i32 0
define i64 @max_offset_for_cap(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = udiv i64 %4, 10
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = icmp ult i64 %6, 4
br i1 %7, label %8, label %9
8: ; preds = %1
store i64 4, i64* %3
br label %9
9: ; preds = %8, %1
%10 = load i64, i64* %3
%11 = load i32, i32* @UCHAR_MAX
%12 = sub nsw i32 %11, 1
%13 = sext i32 %12 to i64
%14 = icmp ugt i64 %10, %13
br i1 %14, label %15, label %19
15: ; preds = %9
%16 = load i32, i32* @UCHAR_MAX
%17 = sub nsw i32 %16, 1
%18 = sext i32 %17 to i64
store i64 %18, i64* %3
br label %19
19: ; preds = %15, %9
%20 = load i64, i64* %3
ret i64 %20
}

LLVM IR (-O2):
@UCHAR_MAX = global i32 0
define i64 @max_offset_for_cap(i64 %0) {
%2 = udiv i64 %0, 10
%3 = icmp ugt i64 %2, 4
%4 = select i1 %3, i64 %2, i64 4
%5 = load i32, i32* @UCHAR_MAX
%6 = add nsw i32 %5, -1
%7 = sext i32 %6 to i64
%8 = icmp ugt i64 %4, %7
%9 = select i1 %8, i64 %7, i64 %4
ret i64 %9
}
/* Variables and functions */
int a(int);
int b(int);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char const *argv[]) {
  int A1 = a(1);
  printf("a(1) returns %d\n", A1);
  int B2 = b(2);
  printf("b(2) returns %d\n", B2);
  int A3 = a(3);
  printf("a(3) returns %d\n", A3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%edi
call   1050 <a@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xea3(%rip),%rdi
call   1040 <printf@plt>
mov    $0x2,%edi
call   1030 <b@plt>
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%esi
lea    0xe98(%rip),%rdi
call   1040 <printf@plt>
mov    $0x3,%edi
call   1050 <a@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%esi
lea    0xe8d(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1050 <a@plt>
lea    0xebe(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
mov    $0x2,%edi
call   1030 <b@plt>
lea    0xeb7(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
mov    $0x3,%edi
call   1050 <a@plt>
lea    0xeb0(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"a(1) returns %d\0A\00"
@.str.1 = [17 x i8] c"b(2) returns %d\0A\00"
@.str.2 = [17 x i8] c"a(3) returns %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%9 = call i32 @a(i32 1)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %10)
%12 = call i32 @b(i32 2)
store i32 %12, i32* %7
%13 = load i32, i32* %7
%14 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i32 %13)
%15 = call i32 @a(i32 3)
store i32 %15, i32* %8
%16 = load i32, i32* %8
%17 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.2, i64 0, i64 0), i32 %16)
ret i32 0
}

LLVM IR (-O2):
@.str = [17 x i8] c"a(1) returns %d\0A\00"
@.str.1 = [17 x i8] c"b(2) returns %d\0A\00"
@.str.2 = [17 x i8] c"a(3) returns %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @a(i32 1)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = tail call i32 @b(i32 2)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i32 %5)
%7 = tail call i32 @a(i32 3)
%8 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.2, i64 0, i64 0), i32 %7)
ret i32 0
}
void put_short_le(short data, unsigned char **bufptr) {
  *(*bufptr)++ = (unsigned char)(data & 0xff);
  *(*bufptr)++ = (unsigned char)((data >> 8) & 0xff);
}


x86 assembly (clang, -O0):
<put_short_le>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
movswl -0x2(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rdx
mov    (%rdx),%rax
mov    %rax,%rsi
add    $0x1,%rsi
mov    %rsi,(%rdx)
mov    %cl,(%rax)
movswl -0x2(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rdx
mov    (%rdx),%rax
mov    %rax,%rsi
add    $0x1,%rsi
mov    %rsi,(%rdx)
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_short_le>:
mov    %edi,%eax
mov    (%rsi),%rcx
lea    0x1(%rcx),%rdx
mov    %rdx,(%rsi)
mov    %al,(%rcx)
mov    (%rsi),%rcx
lea    0x1(%rcx),%rdx
mov    %rdx,(%rsi)
mov    %ah,(%rcx)
ret

LLVM IR (-O0):
define void @put_short_le(i16 signext %0, i8** %1) {
%3 = alloca i16
%4 = alloca i8**
store i16 %0, i16* %3
store i8** %1, i8*** %4
%5 = load i16, i16* %3
%6 = sext i16 %5 to i32
%7 = and i32 %6, 255
%8 = trunc i32 %7 to i8
%9 = load i8**, i8*** %4
%10 = load i8*, i8** %9
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %9
store i8 %8, i8* %10
%12 = load i16, i16* %3
%13 = sext i16 %12 to i32
%14 = ashr i32 %13, 8
%15 = and i32 %14, 255
%16 = trunc i32 %15 to i8
%17 = load i8**, i8*** %4
%18 = load i8*, i8** %17
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %17
store i8 %16, i8* %18
ret void
}

LLVM IR (-O2):
define void @put_short_le(i16 signext %0, i8** nocapture %1) {
%3 = trunc i16 %0 to i8
%4 = load i8*, i8** %1
%5 = getelementptr inbounds i8, i8* %4, i64 1
store i8* %5, i8** %1
store i8 %3, i8* %4
%6 = lshr i16 %0, 8
%7 = trunc i16 %6 to i8
%8 = load i8*, i8** %1
%9 = getelementptr inbounds i8, i8* %8, i64 1
store i8* %9, i8** %1
store i8 %7, i8* %8
ret void
}
void gtk_combo_box_popup() {}


x86 assembly (clang, -O0):
<gtk_combo_box_popup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_combo_box_popup>:
ret

LLVM IR (-O0):
define void @gtk_combo_box_popup() {
ret void
}

LLVM IR (-O2):
define void @gtk_combo_box_popup() {
ret void
}
void foo530() {}


x86 assembly (clang, -O0):
<foo530>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo530>:
ret

LLVM IR (-O0):
define void @foo530() {
ret void
}

LLVM IR (-O2):
define void @foo530() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int array[2][2][3] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11};
  printf("%d", array[1][0][2]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x40(%rbp),%rdi
lea    0xec6(%rip),%rsi
mov    $0x30,%edx
call   1040 <memcpy@plt>
mov    -0x20(%rbp),%esi
lea    0xee2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.main.array = [2 x [2 x [3 x i32]]] [[2 x [3 x i32]] [[3 x i32] [i32 0, i32 1, i32 2], [3 x i32] [i32 3, i32 4, i32 5]], [2 x [3 x i32]] [[3 x i32] [i32 6, i32 7, i32 8], [3 x i32] [i32 9, i32 10, i32 11]]]
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [2 x [2 x [3 x i32]]]
store i32 0, i32* %1
%3 = bitcast [2 x [2 x [3 x i32]]]* %2 to i8*
%4 = getelementptr inbounds [2 x [2 x [3 x i32]]], [2 x [2 x [3 x i32]]]* %2, i64 0, i64 1
%5 = getelementptr inbounds [2 x [3 x i32]], [2 x [3 x i32]]* %4, i64 0, i64 0
%6 = getelementptr inbounds [3 x i32], [3 x i32]* %5, i64 0, i64 2
%7 = load i32, i32* %6
%8 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 8)
ret i32 0
}
void ehci_controller_init(void) {}


x86 assembly (clang, -O0):
<ehci_controller_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ehci_controller_init>:
ret

LLVM IR (-O0):
define void @ehci_controller_init() {
ret void
}

LLVM IR (-O2):
define void @ehci_controller_init() {
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
uint16_t be_to_h_u16(const uint8_t *buf) {
  return (uint16_t)(buf[1] | buf[0] << 8);
}


x86 assembly (clang, -O0):
<be_to_h_u16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<be_to_h_u16>:
mov    (%rdi),%eax
shl    $0x8,%eax
or     0x4(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @be_to_h_u16(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 1
%5 = load i32, i32* %4
%6 = load i32*, i32** %2
%7 = getelementptr inbounds i32, i32* %6, i64 0
%8 = load i32, i32* %7
%9 = shl i32 %8, 8
%10 = or i32 %5, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @be_to_h_u16(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 1
%3 = load i32, i32* %2
%4 = load i32, i32* %0
%5 = shl i32 %4, 8
%6 = or i32 %5, %3
ret i32 %6
}
int test_imm_DEint32_mem(int *val) {
  return ((*val) & (0xDE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DEint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xde,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DEint32_mem>:
testb  $0xde,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DEint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 222
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_DEint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 222
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void libstr_panic_func() {
  fprintf(stderr, "libstr: out of memory\n");
  abort();
}


x86 assembly (clang, -O0):
<libstr_panic_func>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<libstr_panic_func>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [23 x i8] c"libstr: out of memory\0A\00"
define void @libstr_panic_func() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [23 x i8] c"libstr: out of memory\0A\00"
define void @libstr_panic_func() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @abort()
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_t;

/* Variables and functions */
scalar_t__ EINTR;
scalar_t__ errno;
scalar_t__ waitpid(int /*<<< orphan*/, int /*<<< orphan*/ *,
                   int /*<<< orphan*/);
int pthread_join(pthread_t thread, void **ret) {
  do {
    if (waitpid(thread, NULL, 0) >= 0)
      ;
    break;
  } while (errno == EINTR);
  if (ret)
    *ret = NULL;
  return 0;
}


x86 assembly (clang, -O0):
<pthread_join>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
xor    %eax,%eax
mov    %eax,%esi
xor    %edx,%edx
call   1030 <waitpid@plt>
cmp    $0x0,%rax
jl     113c <pthread_join+0x2c>
jmp    113c <pthread_join+0x2c>
jmp    1141 <pthread_join+0x31>
cmpq   $0x0,-0x10(%rbp)
je     1157 <pthread_join+0x47>
mov    -0x10(%rbp),%rax
movq   $0x0,(%rax)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_join>:
push   %rbx
mov    %rsi,%rbx
xor    %esi,%esi
xor    %edx,%edx
call   1030 <waitpid@plt>
test   %rbx,%rbx
je     1129 <pthread_join+0x19>
movq   $0x0,(%rbx)
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@errno = global i64 0
@EINTR = global i64 0
define i32 @pthread_join(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
br label %5
5: ; preds = %11, %2
%6 = load i32, i32* %3
%7 = call i64 @waitpid(i32 %6, i32* null, i32 0)
%8 = icmp sge i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %5
br label %10
10: ; preds = %9, %5
br label %15
11: ; No predecessors!
%12 = load i64, i64* @errno
%13 = load i64, i64* @EINTR
%14 = icmp eq i64 %12, %13
br i1 %14, label %5, label %15
15: ; preds = %11, %10
%16 = load i8**, i8*** %4
%17 = icmp ne i8** %16, null
br i1 %17, label %18, label %20
18: ; preds = %15
%19 = load i8**, i8*** %4
store i8* null, i8** %19
br label %20
20: ; preds = %18, %15
ret i32 0
}

LLVM IR (-O2):
@errno = global i64 0
@EINTR = global i64 0
define i32 @pthread_join(i32 %0, i8** writeonly %1) {
%3 = tail call i64 @waitpid(i32 %0, i32* null, i32 0)
%4 = icmp eq i8** %1, null
br i1 %4, label %6, label %5
5: ; preds = %2
store i8* null, i8** %1
br label %6
6: ; preds = %5, %2
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ serialFlush(int);
int /*<<< orphan*/ write(int, char *, int);
void serialWrite(int fd, char *s, int count) {
  write(fd, s, count);
  serialFlush(fd);
}


x86 assembly (clang, -O0):
<serialWrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <write@plt>
mov    -0x4(%rbp),%edi
call   1040 <serialFlush@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serialWrite>:
push   %rbx
mov    %edi,%ebx
call   1030 <write@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <serialFlush@plt>

LLVM IR (-O0):
define void @serialWrite(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @write(i32 %7, i8* %8, i32 %9)
%11 = load i32, i32* %4
%12 = call i32 @serialFlush(i32 %11)
ret void
}

LLVM IR (-O2):
define void @serialWrite(i32 %0, i8* nocapture %1, i32 %2) {
%4 = tail call i32 @write(i32 %0, i8* %1, i32 %2)
%5 = tail call i32 @serialFlush(i32 %0)
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint32_t;

/* Variables and functions */
void be32enc(uint8_t *buf, uint32_t u) {
  buf[0] = (uint8_t)((u >> 24) & 0xff);
  buf[1] = (uint8_t)((u >> 16) & 0xff);
  buf[2] = (uint8_t)((u >> 8) & 0xff);
  buf[3] = (uint8_t)(u & 0xff);
}


x86 assembly (clang, -O0):
<be32enc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x18,%eax
and    $0xff,%eax
movslq %eax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0xc(%rbp),%eax
sar    $0x10,%eax
and    $0xff,%eax
movslq %eax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x8(%rax)
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
movslq %eax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x10(%rax)
mov    -0xc(%rbp),%eax
and    $0xff,%eax
movslq %eax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x18(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<be32enc>:
mov    %esi,%eax
mov    %esi,%ecx
movzbl %ah,%edx
movzbl %al,%esi
shr    $0x18,%eax
mov    %rax,(%rdi)
shr    $0x10,%ecx
movzbl %cl,%eax
mov    %rax,0x8(%rdi)
mov    %rdx,0x10(%rdi)
mov    %rsi,0x18(%rdi)
ret

LLVM IR (-O0):
define void @be32enc(i64* %0, i32 %1) {
%3 = alloca i64*
%4 = alloca i32
store i64* %0, i64** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 24
%7 = and i32 %6, 255
%8 = sext i32 %7 to i64
%9 = load i64*, i64** %3
%10 = getelementptr inbounds i64, i64* %9, i64 0
store i64 %8, i64* %10
%11 = load i32, i32* %4
%12 = ashr i32 %11, 16
%13 = and i32 %12, 255
%14 = sext i32 %13 to i64
%15 = load i64*, i64** %3
%16 = getelementptr inbounds i64, i64* %15, i64 1
store i64 %14, i64* %16
%17 = load i32, i32* %4
%18 = ashr i32 %17, 8
%19 = and i32 %18, 255
%20 = sext i32 %19 to i64
%21 = load i64*, i64** %3
%22 = getelementptr inbounds i64, i64* %21, i64 2
store i64 %20, i64* %22
%23 = load i32, i32* %4
%24 = and i32 %23, 255
%25 = sext i32 %24 to i64
%26 = load i64*, i64** %3
%27 = getelementptr inbounds i64, i64* %26, i64 3
store i64 %25, i64* %27
ret void
}

LLVM IR (-O2):
define void @be32enc(i64* nocapture writeonly %0, i32 %1) {
%3 = lshr i32 %1, 24
%4 = zext i32 %3 to i64
store i64 %4, i64* %0
%5 = lshr i32 %1, 16
%6 = and i32 %5, 255
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds i64, i64* %0, i64 1
store i64 %7, i64* %8
%9 = lshr i32 %1, 8
%10 = and i32 %9, 255
%11 = zext i32 %10 to i64
%12 = getelementptr inbounds i64, i64* %0, i64 2
store i64 %11, i64* %12
%13 = and i32 %1, 255
%14 = zext i32 %13 to i64
%15 = getelementptr inbounds i64, i64* %0, i64 3
store i64 %14, i64* %15
ret void
}
int test_imm_A0int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0xA0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A0int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0xa0,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A0int64_midword_mem>:
testb  $0xa0,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A0int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 160
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_A0int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 10485760
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int mapTestsuiteGenerateASCIIStringCalcXY(int x, int y) {
  return ((1 << y) + x - 1);
}


x86 assembly (clang, -O0):
<mapTestsuiteGenerateASCIIStringCalcXY>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
add    -0x4(%rbp),%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mapTestsuiteGenerateASCIIStringCalcXY>:
mov    %esi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
add    %edi,%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @mapTestsuiteGenerateASCIIStringCalcXY(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 1, %5
%7 = load i32, i32* %3
%8 = add nsw i32 %6, %7
%9 = sub nsw i32 %8, 1
ret i32 %9
}

LLVM IR (-O2):
define i32 @mapTestsuiteGenerateASCIIStringCalcXY(i32 %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = add i32 %0, -1
%5 = add i32 %4, %3
ret i32 %5
}
int arrayitoa(x)
int x;
{
  if (x == 1)
    return (64);
  else if (x < 0 || x > (122 - 95))
    return (-1);
  else
    return (x + 95);
}


x86 assembly (clang, -O0):
<arrayitoa>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    111d <arrayitoa+0x1d>
movl   $0x40,-0x4(%rbp)
jmp    1146 <arrayitoa+0x46>
cmpl   $0x0,-0x8(%rbp)
jl     1131 <arrayitoa+0x31>
cmpl   $0x1b,-0x8(%rbp)
jle    113d <arrayitoa+0x3d>
movl   $0xffffffff,-0x4(%rbp)
jmp    1146 <arrayitoa+0x46>
mov    -0x8(%rbp),%eax
add    $0x5f,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<arrayitoa>:
lea    0x5f(%rdi),%eax
cmp    $0x1c,%edi
mov    $0xffffffff,%ecx
cmovb  %eax,%ecx
cmp    $0x1,%edi
mov    $0x40,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @arrayitoa(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 64, i32* %2
br label %17
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %7
%11 = load i32, i32* %3
%12 = icmp sgt i32 %11, 27
br i1 %12, label %13, label %14
13: ; preds = %10, %7
store i32 -1, i32* %2
br label %17
14: ; preds = %10
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 95
store i32 %16, i32* %2
br label %17
17: ; preds = %14, %13, %6
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @arrayitoa(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = icmp ugt i32 %0, 27
%4 = add nsw i32 %0, 95
%5 = select i1 %3, i32 -1, i32 %4
%6 = select i1 %2, i32 64, i32 %5
ret i32 %6
}
/* Variables and functions */
char rand();
char internal_rand_b(char value) { return rand(); }


x86 assembly (clang, -O0):
<internal_rand_b>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<internal_rand_b>:
xor    %eax,%eax
jmp    1030 <rand@plt>

LLVM IR (-O0):
define signext i8 @internal_rand_b(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call signext i8 (...) @rand()
ret i8 %3
}

LLVM IR (-O2):
define signext i8 @internal_rand_b(i8 signext %0) {
%2 = tail call signext i8 (...) @rand()
ret i8 %2
}
long f(x, y)
long x, y;
{ return (x > 1) ? y : (y & 1); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x1,-0x8(%rbp)
jle    1124 <f+0x24>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    1130 <f+0x30>
mov    -0x10(%rbp),%rax
and    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    %esi,%eax
and    $0x1,%eax
cmp    $0x2,%rdi
cmovge %rsi,%rax
ret

LLVM IR (-O0):
define i64 @f(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = icmp sgt i64 %5, 1
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = load i64, i64* %4
br label %12
9: ; preds = %2
%10 = load i64, i64* %4
%11 = and i64 %10, 1
br label %12
12: ; preds = %9, %7
%13 = phi i64 [ %8, %7 ], [ %11, %9 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @f(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, 1
%4 = and i64 %1, 1
%5 = select i1 %3, i64 %1, i64 %4
ret i64 %5
}
int nand_support_dual_channel(void) { return 1 ? 1 : 0; }


x86 assembly (clang, -O0):
<nand_support_dual_channel>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nand_support_dual_channel>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @nand_support_dual_channel() {
ret i32 1
}

LLVM IR (-O2):
define i32 @nand_support_dual_channel() {
ret i32 1
}