xunge/DecIR huggingface dataset:
/* Type definitions */
struct sigaction {
  void (*sa_handler)(int);
  int /*<<< orphan*/ sa_mask;
  int /*<<< orphan*/ sa_flags;
};

/* Variables and functions */
int /*<<< orphan*/ SA_RESTART;
int /*<<< orphan*/ sigaction(int, struct sigaction *, int /*<<< orphan*/ *);
int /*<<< orphan*/ sigemptyset(int /*<<< orphan*/ *);
void setsighandler(int sig, void (*handler)(int)) {
  struct sigaction act;
  act.sa_handler = handler;
  act.sa_flags = SA_RESTART;
  sigemptyset(&act.sa_mask);
  sigaction(sig, &act, NULL);
}


x86 assembly (clang, -O0):
<setsighandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
lea    -0x20(%rbp),%rdi
add    $0x8,%rdi
call   1040 <sigemptyset@plt>
mov    -0x4(%rbp),%edi
lea    -0x20(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <sigaction@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setsighandler>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
mov    %rsi,(%rsp)
mov    0x2eb6(%rip),%rax
mov    (%rax),%eax
mov    %eax,0xc(%rsp)
lea    0x8(%rsp),%rdi
call   1040 <sigemptyset@plt>
mov    %rsp,%rsi
mov    %ebx,%edi
xor    %edx,%edx
call   1030 <sigaction@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.sigaction = type { void (i32)*, i32, i32 }
@SA_RESTART = global i32 0
define void @setsighandler(i32 %0, void (i32)* %1) {
%3 = alloca i32
%4 = alloca void (i32)*
%5 = alloca %struct.sigaction
store i32 %0, i32* %3
store void (i32)* %1, void (i32)** %4
%6 = load void (i32)*, void (i32)** %4
%7 = getelementptr inbounds %struct.sigaction, %struct.sigaction* %5, i32 0, i32 0
store void (i32)* %6, void (i32)** %7
%8 = load i32, i32* @SA_RESTART
%9 = getelementptr inbounds %struct.sigaction, %struct.sigaction* %5, i32 0, i32 2
store i32 %8, i32* %9
%10 = getelementptr inbounds %struct.sigaction, %struct.sigaction* %5, i32 0, i32 1
%11 = call i32 @sigemptyset(i32* %10)
%12 = load i32, i32* %3
%13 = call i32 @sigaction(i32 %12, %struct.sigaction* %5, i32* null)
ret void
}

LLVM IR (-O2):
%struct.sigaction = type { void (i32)*, i32, i32 }
@SA_RESTART = global i32 0
define void @setsighandler(i32 %0, void (i32)* %1) {
%3 = alloca %struct.sigaction
%4 = bitcast %struct.sigaction* %3 to i8*
%5 = getelementptr inbounds %struct.sigaction, %struct.sigaction* %3, i64 0, i32 0
store void (i32)* %1, void (i32)** %5
%6 = load i32, i32* @SA_RESTART
%7 = getelementptr inbounds %struct.sigaction, %struct.sigaction* %3, i64 0, i32 2
store i32 %6, i32* %7
%8 = getelementptr inbounds %struct.sigaction, %struct.sigaction* %3, i64 0, i32 1
%9 = call i32 @sigemptyset(i32* %8)
%10 = call i32 @sigaction(i32 %0, %struct.sigaction* %3, i32* null)
ret void
}
double pathconN_nm5_sign(double x) { return x < 0 ? -1 : x > 0 ? 1 : x; }


x86 assembly (clang, -O0):
<pathconN_nm5_sign>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    1129 <pathconN_nm5_sign+0x29>
movsd  0xee9(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    1161 <pathconN_nm5_sign+0x61>
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    114d <pathconN_nm5_sign+0x4d>
movsd  0xebd(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1157 <pathconN_nm5_sign+0x57>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathconN_nm5_sign>:
xorpd  %xmm1,%xmm1
xorpd  %xmm2,%xmm2
cmpltsd %xmm0,%xmm2
movsd  0xeeb(%rip),%xmm3
andpd  %xmm2,%xmm3
andnpd %xmm0,%xmm2
orpd   %xmm3,%xmm2
cmpltsd %xmm1,%xmm0
movapd %xmm0,%xmm1
andnpd %xmm2,%xmm1
movsd  0xed2(%rip),%xmm2
andpd  %xmm2,%xmm0
orpd   %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @pathconN_nm5_sign(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp olt double %3, 0.000000e+00
br i1 %4, label %5, label %6
5: ; preds = %1
br label %14
6: ; preds = %1
%7 = load double, double* %2
%8 = fcmp ogt double %7, 0.000000e+00
br i1 %8, label %9, label %10
9: ; preds = %6
br label %12
10: ; preds = %6
%11 = load double, double* %2
br label %12
12: ; preds = %10, %9
%13 = phi double [ 1.000000e+00, %9 ], [ %11, %10 ]
br label %14
14: ; preds = %12, %5
%15 = phi double [ -1.000000e+00, %5 ], [ %13, %12 ]
ret double %15
}

LLVM IR (-O2):
define double @pathconN_nm5_sign(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
%3 = fcmp ogt double %0, 0.000000e+00
%4 = select i1 %3, double 1.000000e+00, double %0
%5 = select i1 %2, double -1.000000e+00, double %4
ret double %5
}
/* Type definitions */
struct net_device {
  int dummy;
};
struct gelic_port {
  int dummy;
};

/* Variables and functions */
scalar_t__ netdev_priv(struct net_device *);
struct gelic_port *netdev_port(struct net_device *d) {
  return (struct gelic_port *)netdev_priv(d);
}


x86 assembly (clang, -O0):
<netdev_port>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <netdev_priv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<netdev_port>:
jmp    1030 <netdev_priv@plt>

LLVM IR (-O0):
%struct.gelic_port = type { i32 }
%struct.net_device = type { i32 }
define %struct.gelic_port* @netdev_port(%struct.net_device* %0) {
%2 = alloca %struct.net_device*
store %struct.net_device* %0, %struct.net_device** %2
%3 = load %struct.net_device*, %struct.net_device** %2
%4 = call i64 @netdev_priv(%struct.net_device* %3)
%5 = inttoptr i64 %4 to %struct.gelic_port*
ret %struct.gelic_port* %5
}

LLVM IR (-O2):
%struct.gelic_port = type { i32 }
%struct.net_device = type { i32 }
define %struct.gelic_port* @netdev_port(%struct.net_device* %0) {
%2 = tail call i64 @netdev_priv(%struct.net_device* %0)
%3 = inttoptr i64 %2 to %struct.gelic_port*
ret %struct.gelic_port* %3
}
void g_string_new_len() {}


x86 assembly (clang, -O0):
<g_string_new_len>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_string_new_len>:
ret

LLVM IR (-O0):
define void @g_string_new_len() {
ret void
}

LLVM IR (-O2):
define void @g_string_new_len() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ im_a_dummy();
void testFuncShortCircuit(unsigned char bool1, unsigned char bool2) {
  if (0 == bool1 && 1 == bool2) {
    im_a_dummy();
  }
  if (1 == bool2 || 0 == bool1) {
    im_a_dummy();
  }
}


x86 assembly (clang, -O0):
<testFuncShortCircuit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    %ecx,%eax
jne    114a <testFuncShortCircuit+0x3a>
movzbl -0x2(%rbp),%ecx
mov    $0x1,%eax
cmp    %ecx,%eax
jne    114a <testFuncShortCircuit+0x3a>
mov    $0x0,%al
call   1030 <im_a_dummy@plt>
movzbl -0x2(%rbp),%ecx
mov    $0x1,%eax
cmp    %ecx,%eax
je     1169 <testFuncShortCircuit+0x59>
movzbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    %ecx,%eax
jne    1170 <testFuncShortCircuit+0x60>
mov    $0x0,%al
call   1030 <im_a_dummy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testFuncShortCircuit>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
test   %edi,%edi
jne    1127 <testFuncShortCircuit+0x17>
cmp    $0x1,%bl
jne    1127 <testFuncShortCircuit+0x17>
xor    %eax,%eax
call   1030 <im_a_dummy@plt>
test   %bpl,%bpl
je     1138 <testFuncShortCircuit+0x28>
cmp    $0x1,%bl
je     1138 <testFuncShortCircuit+0x28>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <im_a_dummy@plt>

LLVM IR (-O0):
define void @testFuncShortCircuit(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = icmp eq i32 0, %6
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i8, i8* %4
%10 = zext i8 %9 to i32
%11 = icmp eq i32 1, %10
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = call i32 (...) @im_a_dummy()
br label %14
14: ; preds = %12, %8, %2
%15 = load i8, i8* %4
%16 = zext i8 %15 to i32
%17 = icmp eq i32 1, %16
br i1 %17, label %22, label %18
18: ; preds = %14
%19 = load i8, i8* %3
%20 = zext i8 %19 to i32
%21 = icmp eq i32 0, %20
br i1 %21, label %22, label %24
22: ; preds = %18, %14
%23 = call i32 (...) @im_a_dummy()
br label %24
24: ; preds = %22, %18
ret void
}

LLVM IR (-O2):
define void @testFuncShortCircuit(i8 zeroext %0, i8 zeroext %1) {
%3 = icmp eq i8 %0, 0
%4 = icmp eq i8 %1, 1
%5 = and i1 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 (...) @im_a_dummy()
br label %8
8: ; preds = %6, %2
%9 = or i1 %3, %4
br i1 %9, label %10, label %12
10: ; preds = %8
%11 = tail call i32 (...) @im_a_dummy()
br label %12
12: ; preds = %8, %10
ret void
}
int main(int argc, char *argv[]) {
#pragma omp task
  { printf("%s\n", __func__); }
#pragma omp taskwait
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rdi
lea    0xed7(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
@__func__.main = [5 x i8] c"main\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @__func__.main, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@__func__.main = [5 x i8] c"main\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @__func__.main, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ scope_benchmark1();
int /*<<< orphan*/ scope_benchmark2();
int /*<<< orphan*/ scope_benchmark3();
int /*<<< orphan*/ scope_benchmark4();
int /*<<< orphan*/ scope_benchmark5();
void scope_benchmark(void) {
  scope_benchmark1();
  scope_benchmark2();
  scope_benchmark4();
  scope_benchmark3();
  scope_benchmark5();
}


x86 assembly (clang, -O0):
<scope_benchmark>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <scope_benchmark1@plt>
mov    $0x0,%al
call   1030 <scope_benchmark2@plt>
mov    $0x0,%al
call   1040 <scope_benchmark4@plt>
mov    $0x0,%al
call   1070 <scope_benchmark3@plt>
mov    $0x0,%al
call   1060 <scope_benchmark5@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<scope_benchmark>:
push   %rax
xor    %eax,%eax
call   1050 <scope_benchmark1@plt>
xor    %eax,%eax
call   1030 <scope_benchmark2@plt>
xor    %eax,%eax
call   1040 <scope_benchmark4@plt>
xor    %eax,%eax
call   1070 <scope_benchmark3@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <scope_benchmark5@plt>

LLVM IR (-O0):
define void @scope_benchmark() {
%1 = call i32 (...) @scope_benchmark1()
%2 = call i32 (...) @scope_benchmark2()
%3 = call i32 (...) @scope_benchmark4()
%4 = call i32 (...) @scope_benchmark3()
%5 = call i32 (...) @scope_benchmark5()
ret void
}

LLVM IR (-O2):
define void @scope_benchmark() {
%1 = tail call i32 (...) @scope_benchmark1()
%2 = tail call i32 (...) @scope_benchmark2()
%3 = tail call i32 (...) @scope_benchmark4()
%4 = tail call i32 (...) @scope_benchmark3()
%5 = tail call i32 (...) @scope_benchmark5()
ret void
}
int even(unsigned long long *x) { return !(1 & *x); }


x86 assembly (clang, -O0):
<even>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
and    $0x1,%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<even>:
mov    (%rdi),%eax
not    %eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @even(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 1, %4
%6 = icmp ne i64 %5, 0
%7 = xor i1 %6, true
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @even(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = trunc i64 %2 to i32
%4 = and i32 %3, 1
%5 = xor i32 %4, 1
ret i32 %5
}
func2() {
  int abcdef = 0;
  f(1234);
  f(abcdef);
  char c;
  char *p = 0;
  f(c);
  f(&c);
  f(*p);
  f(5 + 2);
  f(sizeof(__typeof(int)));
}


x86 assembly (clang, -O0):
<func2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x8(%rbp)
mov    $0x4d2,%edi
mov    $0x0,%al
call   1030 <f@plt>
mov    -0x8(%rbp),%edi
mov    $0x0,%al
call   1030 <f@plt>
movq   $0x0,-0x18(%rbp)
movsbl -0x9(%rbp),%edi
mov    $0x0,%al
call   1030 <f@plt>
lea    -0x9(%rbp),%rdi
mov    $0x0,%al
call   1030 <f@plt>
mov    -0x18(%rbp),%rax
movsbl (%rax),%edi
mov    $0x0,%al
call   1030 <f@plt>
mov    $0x7,%edi
mov    $0x0,%al
call   1030 <f@plt>
mov    $0x4,%edi
mov    $0x0,%al
call   1030 <f@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func2>:
push   %rax
mov    $0x4d2,%edi
xor    %eax,%eax
call   1030 <f@plt>
xor    %edi,%edi
xor    %eax,%eax
call   1030 <f@plt>
xor    %edi,%edi
xor    %eax,%eax
call   1030 <f@plt>
lea    0x7(%rsp),%rdi
xor    %eax,%eax
call   1030 <f@plt>
xor    %edi,%edi
xor    %eax,%eax
call   1030 <f@plt>
mov    $0x7,%edi
xor    %eax,%eax
call   1030 <f@plt>
mov    $0x4,%edi
xor    %eax,%eax
call   1030 <f@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @func2() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8
%4 = alloca i8*
store i32 0, i32* %2
%5 = call i32 (i32, ...) bitcast (i32 (...)* @f to i32 (i32, ...)*)(i32 1234)
%6 = load i32, i32* %2
%7 = call i32 (i32, ...) bitcast (i32 (...)* @f to i32 (i32, ...)*)(i32 %6)
store i8* null, i8** %4
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = call i32 (i32, ...) bitcast (i32 (...)* @f to i32 (i32, ...)*)(i32 %9)
%11 = call i32 (i8*, ...) bitcast (i32 (...)* @f to i32 (i8*, ...)*)(i8* %3)
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = call i32 (i32, ...) bitcast (i32 (...)* @f to i32 (i32, ...)*)(i32 %14)
%16 = call i32 (i32, ...) bitcast (i32 (...)* @f to i32 (i32, ...)*)(i32 7)
%17 = call i32 (i64, ...) bitcast (i32 (...)* @f to i32 (i64, ...)*)(i64 4)
%18 = load i32, i32* %1
ret i32 %18
}

LLVM IR (-O2):
define i32 @func2() {
%1 = alloca i8
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @f to i32 (i32, ...)*)(i32 1234)
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @f to i32 (i32, ...)*)(i32 0)
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @f to i32 (i32, ...)*)(i32 0)
%5 = call i32 (i8*, ...) bitcast (i32 (...)* @f to i32 (i8*, ...)*)(i8* %1)
%6 = call i32 (i32, ...) bitcast (i32 (...)* @f to i32 (i32, ...)*)(i32 0)
%7 = call i32 (i32, ...) bitcast (i32 (...)* @f to i32 (i32, ...)*)(i32 7)
%8 = call i32 (i64, ...) bitcast (i32 (...)* @f to i32 (i64, ...)*)(i64 4)
ret i32 undef
}
/* Type definitions */
typedef unsigned int uint8_t;

/* Variables and functions */
void bytestream_put_le24(uint8_t **b, const unsigned int value) {
  do {
    ((uint8_t *)(*b))[0] = (value);
    ((uint8_t *)(*b))[1] = (value) >> 8;
    ((uint8_t *)(*b))[2] = (value) >> 16;
  } while (0);
  (*b) += 3;
}


x86 assembly (clang, -O0):
<bytestream_put_le24>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
shr    $0x8,%ecx
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
shr    $0x10,%ecx
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %ecx,0x8(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0xc,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bytestream_put_le24>:
mov    (%rdi),%rax
mov    %esi,(%rax)
mov    %esi,%ecx
shr    $0x8,%ecx
mov    %ecx,0x4(%rax)
shr    $0x10,%esi
mov    %esi,0x8(%rax)
add    $0xc,%rax
mov    %rax,(%rdi)
ret

LLVM IR (-O0):
define void @bytestream_put_le24(i32** %0, i32 %1) {
%3 = alloca i32**
%4 = alloca i32
store i32** %0, i32*** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %2
%6 = load i32, i32* %4
%7 = load i32**, i32*** %3
%8 = load i32*, i32** %7
%9 = getelementptr inbounds i32, i32* %8, i64 0
store i32 %6, i32* %9
%10 = load i32, i32* %4
%11 = lshr i32 %10, 8
%12 = load i32**, i32*** %3
%13 = load i32*, i32** %12
%14 = getelementptr inbounds i32, i32* %13, i64 1
store i32 %11, i32* %14
%15 = load i32, i32* %4
%16 = lshr i32 %15, 16
%17 = load i32**, i32*** %3
%18 = load i32*, i32** %17
%19 = getelementptr inbounds i32, i32* %18, i64 2
store i32 %16, i32* %19
br label %20
20: ; preds = %5
%21 = load i32**, i32*** %3
%22 = load i32*, i32** %21
%23 = getelementptr inbounds i32, i32* %22, i64 3
store i32* %23, i32** %21
ret void
}

LLVM IR (-O2):
define void @bytestream_put_le24(i32** nocapture %0, i32 %1) {
%3 = load i32*, i32** %0
store i32 %1, i32* %3
%4 = lshr i32 %1, 8
%5 = getelementptr inbounds i32, i32* %3, i64 1
store i32 %4, i32* %5
%6 = lshr i32 %1, 16
%7 = getelementptr inbounds i32, i32* %3, i64 2
store i32 %6, i32* %7
%8 = getelementptr inbounds i32, i32* %3, i64 3
store i32* %8, i32** %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int scanf(char *, char *, double *);
void scan_data(char *operator, double * operand) {
  int scan_res = scanf(" %c %lf", operator, operand);
  if (scan_res != 2) {
    printf("FEJL!!!\n");
  }
}


x86 assembly (clang, -O0):
<scan_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xec1(%rip),%rdi
call   1040 <scanf@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x2,-0x14(%rbp)
je     115d <scan_data+0x3d>
lea    0xeb0(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scan_data>:
push   %rax
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xed2(%rip),%rdi
call   1040 <scanf@plt>
cmp    $0x2,%eax
jne    113a <scan_data+0x1a>
pop    %rax
ret
lea    0xec7(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [8 x i8] c" %c %lf\00"
@.str.1 = [9 x i8] c"FEJL!!!\0A\00"
define void @scan_data(i8* %0, double* %1) {
%3 = alloca i8*
%4 = alloca double*
%5 = alloca i32
store i8* %0, i8** %3
store double* %1, double** %4
%6 = load i8*, i8** %3
%7 = load double*, double** %4
%8 = call i32 @scanf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %6, double* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp ne i32 %9, 2
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
br label %13
13: ; preds = %11, %2
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c" %c %lf\00"
@str = [8 x i8] c"FEJL!!!\00"
define void @scan_data(i8* %0, double* %1) {
%3 = tail call i32 @scanf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, double* %1)
%4 = icmp eq i32 %3, 2
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret void
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ mem_dbg_fail(char *);
void *mem_dbg_malloc(size_t size) {
  void *block = malloc(size);
  if (block == NULL && size != 0)
    mem_dbg_fail("out of memory");
  return block;
}


x86 assembly (clang, -O0):
<mem_dbg_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    115b <mem_dbg_malloc+0x3b>
cmpq   $0x0,-0x8(%rbp)
je     115b <mem_dbg_malloc+0x3b>
lea    0xeaa(%rip),%rdi
call   1030 <mem_dbg_fail@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_dbg_malloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <malloc@plt>
mov    %rax,%r14
test   %rbx,%rbx
je     1145 <mem_dbg_malloc+0x25>
test   %r14,%r14
jne    1145 <mem_dbg_malloc+0x25>
lea    0xec0(%rip),%rdi
call   1030 <mem_dbg_fail@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [14 x i8] c"out of memory\00"
define i8* @mem_dbg_malloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %13
8: ; preds = %1
%9 = load i64, i64* %2
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %8
%12 = call i32 @mem_dbg_fail(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %8, %1
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
@.str = [14 x i8] c"out of memory\00"
define noalias i8* @mem_dbg_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
%4 = icmp ne i64 %0, 0
%5 = and i1 %4, %3
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 @mem_dbg_fail(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
ret i8* %2
}
/* Variables and functions */
int loop_fibonacci(int);
int /*<<< orphan*/ printf(char *, int);
int recursive_fibonacci(int);
int main() {
  printf("%d\n", loop_fibonacci(10));
  printf("%d\n", recursive_fibonacci(10));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
call   1030 <loop_fibonacci@plt>
mov    %eax,%esi
lea    0xeb9(%rip),%rdi
call   1040 <printf@plt>
mov    $0xa,%edi
call   1050 <recursive_fibonacci@plt>
mov    %eax,%esi
lea    0xea1(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0xa,%edi
call   1030 <loop_fibonacci@plt>
lea    0xebe(%rip),%rbx
mov    %rbx,%rdi
mov    %eax,%esi
call   1040 <printf@plt>
mov    $0xa,%edi
call   1050 <recursive_fibonacci@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = call i32 @loop_fibonacci(i32 10)
%2 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = call i32 @recursive_fibonacci(i32 10)
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @loop_fibonacci(i32 10)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @recursive_fibonacci(i32 10)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
int htweak(int value, int shift) { return ((value + shift + 128) % 256); }


x86 assembly (clang, -O0):
<htweak>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    $0x80,%eax
mov    $0x100,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<htweak>:
lea    (%rdi,%rsi,1),%eax
add    $0x80,%eax
lea    (%rdi,%rsi,1),%ecx
add    $0x17f,%ecx
test   %eax,%eax
cmovns %eax,%ecx
and    $0xffffff00,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @htweak(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
%8 = add nsw i32 %7, 128
%9 = srem i32 %8, 256
ret i32 %9
}

LLVM IR (-O2):
define i32 @htweak(i32 %0, i32 %1) {
%3 = add i32 %0, 128
%4 = add i32 %3, %1
%5 = srem i32 %4, 256
ret i32 %5
}
/* Variables and functions */
uintptr_t tag3(void *ptr) { return (uintptr_t)ptr | 3; }


x86 assembly (clang, -O0):
<tag3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
or     $0x3,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tag3>:
mov    %rdi,%rax
or     $0x3,%rax
ret

LLVM IR (-O0):
define i64 @tag3(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
%5 = or i64 %4, 3
ret i64 %5
}

LLVM IR (-O2):
define i64 @tag3(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = or i64 %2, 3
ret i64 %3
}
/* Variables and functions */
int __builtin_ia32_rdseed_si_step(unsigned int *);
int /*<<< orphan*/ bar(int);
void foo(unsigned *u) {
  int i = __builtin_ia32_rdseed_si_step(u);
  bar(i);
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <__builtin_ia32_rdseed_si_step@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <bar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rax
call   1040 <__builtin_ia32_rdseed_si_step@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <bar@plt>

LLVM IR (-O0):
define void @foo(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @__builtin_ia32_rdseed_si_step(i32* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @bar(i32 %6)
ret void
}

LLVM IR (-O2):
define void @foo(i32* %0) {
%2 = tail call i32 @__builtin_ia32_rdseed_si_step(i32* %0)
%3 = tail call i32 @bar(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pthread_yield();
void SAL_Thread_Yield(void) { pthread_yield(); }


x86 assembly (clang, -O0):
<SAL_Thread_Yield>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <pthread_yield@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SAL_Thread_Yield>:
xor    %eax,%eax
jmp    1030 <pthread_yield@plt>

LLVM IR (-O0):
define void @SAL_Thread_Yield() {
%1 = call i32 (...) @pthread_yield()
ret void
}

LLVM IR (-O2):
define void @SAL_Thread_Yield() {
%1 = tail call i32 (...) @pthread_yield()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SkipListFree(void *);
void SkipListDBClose(void *beData) { SkipListFree(beData); }


x86 assembly (clang, -O0):
<SkipListDBClose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <SkipListFree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SkipListDBClose>:
jmp    1030 <SkipListFree@plt>

LLVM IR (-O0):
define void @SkipListDBClose(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @SkipListFree(i8* %3)
ret void
}

LLVM IR (-O2):
define void @SkipListDBClose(i8* %0) {
%2 = tail call i32 @SkipListFree(i8* %0)
ret void
}
float test_crealf(_Complex float x) { return __builtin_crealf(x); }


x86 assembly (clang, -O0):
<test_crealf>:
push   %rbp
mov    %rsp,%rbp
movlpd %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_crealf>:
ret

LLVM IR (-O0):
define float @test_crealf(<2 x float> %0) {
%2 = alloca { float, float }
%3 = bitcast { float, float }* %2 to <2 x float>*
store <2 x float> %0, <2 x float>* %3
%4 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 0
%5 = load float, float* %4
%6 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 1
%7 = load float, float* %6
ret float %5
}

LLVM IR (-O2):
define float @test_crealf(<2 x float> %0) {
%2 = extractelement <2 x float> %0, i64 0
ret float %2
}
/* Type definitions */
struct sqlca_t {
  int dummy;
};

/* Variables and functions */
int _ocesqlConnect(struct sqlca_t *, char *, int, char *, int, char *, int,
                   int /*<<< orphan*/ *);
int OCESQLConnect(struct sqlca_t *st, char *user, int userlen, char *passwd,
                  int passwdlen, char *name, int namelen) {
  return _ocesqlConnect(st, user, userlen, passwd, passwdlen, name, namelen,
                        NULL);
}


x86 assembly (clang, -O0):
<OCESQLConnect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x10(%rbp),%eax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x20(%rbp),%rcx
mov    -0x24(%rbp),%r8d
mov    -0x30(%rbp),%r9
mov    0x10(%rbp),%eax
xor    %r10d,%r10d
mov    %eax,(%rsp)
movq   $0x0,0x8(%rsp)
call   1030 <_ocesqlConnect@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OCESQLConnect>:
push   %rax
mov    0x10(%rsp),%eax
push   $0x0
push   %rax
call   1030 <_ocesqlConnect@plt>
add    $0x10,%rsp
pop    %rcx
ret

LLVM IR (-O0):
%struct.sqlca_t = type { i32 }
define i32 @OCESQLConnect(%struct.sqlca_t* %0, i8* %1, i32 %2, i8* %3, i32 %4, i8* %5, i32 %6) {
%8 = alloca %struct.sqlca_t*
%9 = alloca i8*
%10 = alloca i32
%11 = alloca i8*
%12 = alloca i32
%13 = alloca i8*
%14 = alloca i32
store %struct.sqlca_t* %0, %struct.sqlca_t** %8
store i8* %1, i8** %9
store i32 %2, i32* %10
store i8* %3, i8** %11
store i32 %4, i32* %12
store i8* %5, i8** %13
store i32 %6, i32* %14
%15 = load %struct.sqlca_t*, %struct.sqlca_t** %8
%16 = load i8*, i8** %9
%17 = load i32, i32* %10
%18 = load i8*, i8** %11
%19 = load i32, i32* %12
%20 = load i8*, i8** %13
%21 = load i32, i32* %14
%22 = call i32 @_ocesqlConnect(%struct.sqlca_t* %15, i8* %16, i32 %17, i8* %18, i32 %19, i8* %20, i32 %21, i32* null)
ret i32 %22
}

LLVM IR (-O2):
%struct.sqlca_t = type { i32 }
define i32 @OCESQLConnect(%struct.sqlca_t* %0, i8* %1, i32 %2, i8* %3, i32 %4, i8* %5, i32 %6) {
%8 = tail call i32 @_ocesqlConnect(%struct.sqlca_t* %0, i8* %1, i32 %2, i8* %3, i32 %4, i8* %5, i32 %6, i32* null)
ret i32 %8
}
void gf8mul_00010010(void) {
  __asm__ __volatile__("\tpxor    %xmm7, %xmm4\n"
                       "\tpxor    %xmm7, %xmm2\n"
                       "\tpxor    %xmm6, %xmm3\n"
                       "\tpxor    %xmm6, %xmm1\n"
                       "\tpxor    %xmm5, %xmm2\n"
                       "\tpxor    %xmm5, %xmm0\n"
                       "\tpxor    %xmm4, %xmm7\n"
                       "\tpxor    %xmm4, %xmm5\n"
                       "\tpxor    %xmm4, %xmm3\n"
                       "\tpxor    %xmm4, %xmm0\n"
                       "\tpxor    %xmm3, %xmm7\n"
                       "\tpxor    %xmm3, %xmm4\n"
                       "\tpxor    %xmm4, %xmm3\n"
                       "\tpxor    %xmm2, %xmm6\n"
                       "\tpxor    %xmm2, %xmm3\n"
                       "\tpxor    %xmm3, %xmm2\n"
                       "\tpxor    %xmm1, %xmm5\n"
                       "\tpxor    %xmm1, %xmm2\n"
                       "\tpxor    %xmm2, %xmm1\n"
                       "\tpxor    %xmm0, %xmm4\n"
                       "\tpxor    %xmm0, %xmm1\n"
                       "\tpxor    %xmm1, %xmm0\n");
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pxor   %xmm7,%xmm4
pxor   %xmm7,%xmm2
pxor   %xmm6,%xmm3
pxor   %xmm6,%xmm1
pxor   %xmm5,%xmm2
pxor   %xmm5,%xmm0
pxor   %xmm4,%xmm7
pxor   %xmm4,%xmm5
pxor   %xmm4,%xmm3
pxor   %xmm4,%xmm0
pxor   %xmm3,%xmm7
pxor   %xmm3,%xmm4
pxor   %xmm4,%xmm3
pxor   %xmm2,%xmm6
pxor   %xmm2,%xmm3
pxor   %xmm3,%xmm2
pxor   %xmm1,%xmm5
pxor   %xmm1,%xmm2
pxor   %xmm2,%xmm1
pxor   %xmm0,%xmm4
pxor   %xmm0,%xmm1
pxor   %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
pxor   %xmm7,%xmm4
pxor   %xmm7,%xmm2
pxor   %xmm6,%xmm3
pxor   %xmm6,%xmm1
pxor   %xmm5,%xmm2
pxor   %xmm5,%xmm0
pxor   %xmm4,%xmm7
pxor   %xmm4,%xmm5
pxor   %xmm4,%xmm3
pxor   %xmm4,%xmm0
pxor   %xmm3,%xmm7
pxor   %xmm3,%xmm4
pxor   %xmm4,%xmm3
pxor   %xmm2,%xmm6
pxor   %xmm2,%xmm3
pxor   %xmm3,%xmm2
pxor   %xmm1,%xmm5
pxor   %xmm1,%xmm2
pxor   %xmm2,%xmm1
pxor   %xmm0,%xmm4
pxor   %xmm0,%xmm1
pxor   %xmm1,%xmm0
ret

LLVM IR (-O0):
define void @gf8mul_00010010() {
ret void
}

LLVM IR (-O2):
define void @gf8mul_00010010() {
tail call void asm sideeffect "\09pxor %xmm7, %xmm4\0A\09pxor %xmm7, %xmm2\0A\09pxor %xmm6, %xmm3\0A\09pxor %xmm6, %xmm1\0A\09pxor %xmm5, %xmm2\0A\09pxor %xmm5, %xmm0\0A\09pxor %xmm4, %xmm7\0A\09pxor %xmm4, %xmm5\0A\09pxor %xmm4, %xmm3\0A\09pxor %xmm4, %xmm0\0A\09pxor %xmm3, %xmm7\0A\09pxor %xmm3, %xmm4\0A\09pxor %xmm4, %xmm3\0A\09pxor %xmm2, %xmm6\0A\09pxor %xmm2, %xmm3\0A\09pxor %xmm3, %xmm2\0A\09pxor %xmm1, %xmm5\0A\09pxor %xmm1, %xmm2\0A\09pxor %xmm2, %xmm1\0A\09pxor %xmm0, %xmm4\0A\09pxor %xmm0, %xmm1\0A\09pxor %xmm1, %xmm0\0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ MAIN__();
int sblat1_() {
  MAIN__();
  return 0;
}


x86 assembly (clang, -O0):
<sblat1_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <MAIN__@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sblat1_>:
push   %rax
xor    %eax,%eax
call   1030 <MAIN__@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @sblat1_() {
%1 = call i32 (...) @MAIN__()
ret i32 0
}

LLVM IR (-O2):
define i32 @sblat1_() {
%1 = tail call i32 (...) @MAIN__()
ret i32 0
}
void destroiLista(struct Lista *lista) {}


x86 assembly (clang, -O0):
<destroiLista>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<destroiLista>:
ret

LLVM IR (-O0):
%struct.Lista = type opaque
define void @destroiLista(%struct.Lista* %0) {
%2 = alloca %struct.Lista*
store %struct.Lista* %0, %struct.Lista** %2
ret void
}

LLVM IR (-O2):
%struct.Lista = type opaque
define void @destroiLista(%struct.Lista* nocapture %0) {
ret void
}
int __get_left_child_index(int index) { return index * 2 + 1; }


x86 assembly (clang, -O0):
<__get_left_child_index>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__get_left_child_index>:
lea    (%rdi,%rdi,1),%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @__get_left_child_index(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 2
%5 = add nsw i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @__get_left_child_index(i32 %0) {
%2 = shl nsw i32 %0, 1
%3 = or i32 %2, 1
ret i32 %3
}
int g_DUMMY_menu_append_optionmenu(int menu_id, char *label, int return_id,
                                   int item_count, int item_select,
                                   char *data[]) {
  menu_id = menu_id;
  label = label;
  return_id = return_id;
  item_count = item_count;
  item_select = item_select;
  data = data;
  return -1;
}


x86 assembly (clang, -O0):
<g_DUMMY_menu_append_optionmenu>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_DUMMY_menu_append_optionmenu>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @g_DUMMY_menu_append_optionmenu(i32 %0, i8* %1, i32 %2, i32 %3, i32 %4, i8** %5) {
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i8**
store i32 %0, i32* %7
store i8* %1, i8** %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i8** %5, i8*** %12
%13 = load i32, i32* %7
store i32 %13, i32* %7
%14 = load i8*, i8** %8
store i8* %14, i8** %8
%15 = load i32, i32* %9
store i32 %15, i32* %9
%16 = load i32, i32* %10
store i32 %16, i32* %10
%17 = load i32, i32* %11
store i32 %17, i32* %11
%18 = load i8**, i8*** %12
store i8** %18, i8*** %12
ret i32 -1
}

LLVM IR (-O2):
define i32 @g_DUMMY_menu_append_optionmenu(i32 %0, i8* nocapture readnone %1, i32 %2, i32 %3, i32 %4, i8** nocapture readnone %5) {
ret i32 -1
}
void fn_my_seg(void) {}


x86 assembly (clang, -O0):
<fn_my_seg>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_my_seg>:
ret

LLVM IR (-O0):
define void @fn_my_seg() {
ret void
}

LLVM IR (-O2):
define void @fn_my_seg() {
ret void
}
int char_is_newline(int c) { return c == '\n' || c == '\r'; }


x86 assembly (clang, -O0):
<char_is_newline>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0xa,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1120 <char_is_newline+0x20>
cmpl   $0xd,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<char_is_newline>:
cmp    $0xa,%edi
sete   %al
cmp    $0xd,%edi
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @char_is_newline(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 10
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 13
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @char_is_newline(i32 %0) {
%2 = icmp eq i32 %0, 10
%3 = icmp eq i32 %0, 13
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
void sqInternetGetMacintoshFileTypeAndCreatorFromkeySizeinto(char *aFileName,
                                                             int keyLength,
                                                             char *creator) {}


x86 assembly (clang, -O0):
<sqInternetGetMacintoshFileTypeAndCreatorFromkeySizeinto>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqInternetGetMacintoshFileTypeAndCreatorFromkeySizeinto>:
ret

LLVM IR (-O0):
define void @sqInternetGetMacintoshFileTypeAndCreatorFromkeySizeinto(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
ret void
}

LLVM IR (-O2):
define void @sqInternetGetMacintoshFileTypeAndCreatorFromkeySizeinto(i8* nocapture %0, i32 %1, i8* nocapture %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __softboundcets_abort();
int /*<<< orphan*/ printf(char *);
__attribute__((__weak__, __always___)) char *softboundcets_gets(char *s) {
  printf("[SBCETS] gets used and should not be used\n");
  __softboundcets_abort();
  return NULL;
}


x86 assembly (clang, -O0):
<softboundcets_gets>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <__softboundcets_abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundcets_gets>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <__softboundcets_abort@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [43 x i8] c"[SBCETS] gets used and should not be used\0A\00"
define weak i8* @softboundcets_gets(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%4 = call i32 (...) @__softboundcets_abort()
ret i8* null
}

LLVM IR (-O2):
@str = [42 x i8] c"[SBCETS] gets used and should not be used\00"
define weak i8* @softboundcets_gets(i8* %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 (...) @__softboundcets_abort()
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ RunError(char, char *);
char RangeCheck(long int Value, long int Min, long int Max, char *Message) {
  if ((Value < Min) || (Value > Max)) {
    RunError((char)0, Message);
    return ((char)~0);
  } else
    return ((char)0);
}


x86 assembly (clang, -O0):
<RangeCheck>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jl     1144 <RangeCheck+0x34>
mov    -0x10(%rbp),%rax
cmp    -0x20(%rbp),%rax
jle    1158 <RangeCheck+0x48>
mov    -0x28(%rbp),%rsi
xor    %edi,%edi
call   1030 <RunError@plt>
movb   $0xff,-0x1(%rbp)
jmp    115c <RangeCheck+0x4c>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RangeCheck>:
cmp    %rsi,%rdi
jl     111d <RangeCheck+0xd>
cmp    %rdx,%rdi
jg     111d <RangeCheck+0xd>
xor    %eax,%eax
ret
push   %rax
xor    %edi,%edi
mov    %rcx,%rsi
call   1030 <RunError@plt>
mov    $0xff,%al
add    $0x8,%rsp
ret

LLVM IR (-O0):
define signext i8 @RangeCheck(i64 %0, i64 %1, i64 %2, i8* %3) {
%5 = alloca i8
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i8*
store i64 %0, i64* %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i8* %3, i8** %9
%10 = load i64, i64* %6
%11 = load i64, i64* %7
%12 = icmp slt i64 %10, %11
br i1 %12, label %17, label %13
13: ; preds = %4
%14 = load i64, i64* %6
%15 = load i64, i64* %8
%16 = icmp sgt i64 %14, %15
br i1 %16, label %17, label %20
17: ; preds = %13, %4
%18 = load i8*, i8** %9
%19 = call i32 @RunError(i8 signext 0, i8* %18)
store i8 -1, i8* %5
br label %21
20: ; preds = %13
store i8 0, i8* %5
br label %21
21: ; preds = %20, %17
%22 = load i8, i8* %5
ret i8 %22
}

LLVM IR (-O2):
define signext i8 @RangeCheck(i64 %0, i64 %1, i64 %2, i8* %3) {
%5 = icmp slt i64 %0, %1
%6 = icmp sgt i64 %0, %2
%7 = or i1 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %4
%9 = tail call i32 @RunError(i8 signext 0, i8* %3)
br label %10
10: ; preds = %4, %8
%11 = phi i8 [ -1, %8 ], [ 0, %4 ]
ret i8 %11
}
/* Variables and functions */
int EOF;
int getchar();
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ putchar(int);
int main() {
  int c;
  printf("Enter some text ... Ctrl-d will stop it\n");
  while ((c = getchar()) != EOF)
    putchar(c);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <getchar@plt>
mov    %eax,-0x8(%rbp)
mov    0x2e8c(%rip),%rcx
cmp    (%rcx),%eax
je     1171 <main+0x41>
mov    -0x8(%rbp),%edi
call   1030 <putchar@plt>
jmp    114b <main+0x1b>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xec8(%rip),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
call   1050 <getchar@plt>
mov    0x2e9d(%rip),%rbx
cmp    (%rbx),%eax
je     1162 <main+0x32>
nop
mov    %eax,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
call   1050 <getchar@plt>
cmp    (%rbx),%eax
jne    1150 <main+0x20>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [41 x i8] c"Enter some text ... Ctrl-d will stop it\0A\00"
@EOF = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
br label %4
4: ; preds = %8, %0
%5 = call i32 (...) @getchar()
store i32 %5, i32* %2
%6 = load i32, i32* @EOF
%7 = icmp ne i32 %5, %6
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32, i32* %2
%10 = call i32 @putchar(i32 %9)
br label %4
11: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
@EOF = global i32 0
@str = [40 x i8] c"Enter some text ... Ctrl-d will stop it\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([40 x i8], [40 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @getchar()
%3 = load i32, i32* @EOF
%4 = icmp eq i32 %2, %3
br i1 %4, label %11, label %5
5: ; preds = %0, %5
%6 = phi i32 [ %8, %5 ], [ %2, %0 ]
%7 = tail call i32 @putchar(i32 %6)
%8 = tail call i32 (...) @getchar()
%9 = load i32, i32* @EOF
%10 = icmp eq i32 %8, %9
br i1 %10, label %11, label %5
11: ; preds = %5, %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
void *malloc(size_t);
int /*<<< orphan*/ stderr;
__attribute__((__unused__)) void *xmalloc(size_t size) {
  void *value = malloc(size);
  if (value)
    return (value);
  fprintf(stderr, "out of memory\n");
  exit(1);
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     115e <xmalloc+0x2e>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret
mov    0x2e7b(%rip),%rax
mov    (%rax),%edi
lea    0xe92(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<xmalloc>:
push   %rax
call   1040 <malloc@plt>
test   %rax,%rax
je     113d <xmalloc+0xd>
pop    %rcx
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [15 x i8] c"out of memory\0A\00"
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i8*, i8** %3
ret i8* %9
10: ; preds = %1
%11 = load i32, i32* @stderr
%12 = call i32 @fprintf(i32 %11, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%13 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [15 x i8] c"out of memory\0A\00"
define noalias i8* @xmalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %5, label %4
4: ; preds = %1
ret i8* %2
5: ; preds = %1
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%8 = tail call i32 @exit(i32 1)
unreachable
}
unsigned libretro_dummy_retro_get_region() { return 0; }


x86 assembly (clang, -O0):
<libretro_dummy_retro_get_region>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<libretro_dummy_retro_get_region>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @libretro_dummy_retro_get_region() {
ret i32 0
}

LLVM IR (-O2):
define i32 @libretro_dummy_retro_get_region() {
ret i32 0
}
void lgtd_lifx_gateway_handle_ip_firmware_info(
    struct lgtd_lifx_gateway *gw, const struct lgtd_lifx_packet_header *hdr,
    const struct lgtd_lifx_packet_ip_firmware_info *pkt) {
  (void)gw;
  (void)hdr;
  (void)pkt;
}


x86 assembly (clang, -O0):
<lgtd_lifx_gateway_handle_ip_firmware_info>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<lgtd_lifx_gateway_handle_ip_firmware_info>:
ret

LLVM IR (-O0):
%struct.lgtd_lifx_gateway = type opaque
%struct.lgtd_lifx_packet_header = type opaque
%struct.lgtd_lifx_packet_ip_firmware_info = type opaque
define void @lgtd_lifx_gateway_handle_ip_firmware_info(%struct.lgtd_lifx_gateway* %0, %struct.lgtd_lifx_packet_header* %1, %struct.lgtd_lifx_packet_ip_firmware_info* %2) {
%4 = alloca %struct.lgtd_lifx_gateway*
%5 = alloca %struct.lgtd_lifx_packet_header*
%6 = alloca %struct.lgtd_lifx_packet_ip_firmware_info*
store %struct.lgtd_lifx_gateway* %0, %struct.lgtd_lifx_gateway** %4
store %struct.lgtd_lifx_packet_header* %1, %struct.lgtd_lifx_packet_header** %5
store %struct.lgtd_lifx_packet_ip_firmware_info* %2, %struct.lgtd_lifx_packet_ip_firmware_info** %6
%7 = load %struct.lgtd_lifx_gateway*, %struct.lgtd_lifx_gateway** %4
%8 = load %struct.lgtd_lifx_packet_header*, %struct.lgtd_lifx_packet_header** %5
%9 = load %struct.lgtd_lifx_packet_ip_firmware_info*, %struct.lgtd_lifx_packet_ip_firmware_info** %6
ret void
}

LLVM IR (-O2):
%struct.lgtd_lifx_gateway = type opaque
%struct.lgtd_lifx_packet_header = type opaque
%struct.lgtd_lifx_packet_ip_firmware_info = type opaque
define void @lgtd_lifx_gateway_handle_ip_firmware_info(%struct.lgtd_lifx_gateway* nocapture %0, %struct.lgtd_lifx_packet_header* nocapture %1, %struct.lgtd_lifx_packet_ip_firmware_info* nocapture %2) {
ret void
}