xunge/DecIR huggingface dataset:
/* Variables and functions */
int atoi(char *);
char *strstr(char *, char *);
int ph_parseCallProgressVlId(char *data) {
  char *tag = strstr(data, "VLID=");
  if (!tag)
    return 0;
  return atoi(tag + 5);
}


x86 assembly (clang, -O0):
<ph_parseCallProgressVlId>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xec9(%rip),%rsi
call   1040 <strstr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1157 <ph_parseCallProgressVlId+0x37>
movl   $0x0,-0x4(%rbp)
jmp    1167 <ph_parseCallProgressVlId+0x47>
mov    -0x18(%rbp),%rdi
add    $0x5,%rdi
call   1030 <atoi@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ph_parseCallProgressVlId>:
push   %rax
lea    0xed8(%rip),%rsi
call   1040 <strstr@plt>
test   %rax,%rax
je     113f <ph_parseCallProgressVlId+0x1f>
add    $0x5,%rax
mov    %rax,%rdi
pop    %rax
jmp    1030 <atoi@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"VLID=\00"
define i32 @ph_parseCallProgressVlId(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i8* @strstr(i8* %5, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %10, label %9
9: ; preds = %1
store i32 0, i32* %2
br label %14
10: ; preds = %1
%11 = load i8*, i8** %4
%12 = getelementptr inbounds i8, i8* %11, i64 5
%13 = call i32 @atoi(i8* %12)
store i32 %13, i32* %2
br label %14
14: ; preds = %10, %9
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
@.str = [6 x i8] c"VLID=\00"
define i32 @ph_parseCallProgressVlId(i8* %0) {
%2 = tail call i8* @strstr(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i8* %2, null
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, i8* %2, i64 5
%6 = tail call i32 @atoi(i8* %5)
br label %7
7: ; preds = %1, %4
%8 = phi i32 [ %6, %4 ], [ 0, %1 ]
ret i32 %8
}
/* Variables and functions */
int write(int, char *, int);
int main() {
  int count;
  if (write(1, "Here is some data\n", 18) != 18)
    write(2, "A write error has occurred on file descriptor\n", 46);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
lea    0xed5(%rip),%rsi
mov    $0x12,%edx
call   1030 <write@plt>
cmp    $0x12,%eax
je     1154 <main+0x44>
mov    $0x2,%edi
lea    0xec9(%rip),%rsi
mov    $0x2e,%edx
call   1030 <write@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rsi
mov    $0x1,%edi
mov    $0x12,%edx
call   1030 <write@plt>
cmp    $0x12,%eax
je     1142 <main+0x32>
lea    0xee0(%rip),%rsi
mov    $0x2,%edi
mov    $0x2e,%edx
call   1030 <write@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"Here is some data\0A\00"
@.str.1 = [47 x i8] c"A write error has occurred on file descriptor\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @write(i32 1, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 18)
%4 = icmp ne i32 %3, 18
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 @write(i32 2, i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str.1, i64 0, i64 0), i32 46)
br label %7
7: ; preds = %5, %0
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
@.str = [19 x i8] c"Here is some data\0A\00"
@.str.1 = [47 x i8] c"A write error has occurred on file descriptor\0A\00"
define i32 @main() {
%1 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 18)
%2 = icmp eq i32 %1, 18
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @write(i32 2, i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str.1, i64 0, i64 0), i32 46)
br label %5
5: ; preds = %3, %0
ret i32 0
}
int randomNumber(low, high)
int low;
int high;
{ return rand() % high + low; }


x86 assembly (clang, -O0):
<randomNumber>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cltd
idivl  -0x8(%rbp)
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randomNumber>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @randomNumber(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @rand()
%6 = load i32, i32* %4
%7 = srem i32 %5, %6
%8 = load i32, i32* %3
%9 = add nsw i32 %7, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @randomNumber(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = srem i32 %3, %1
%5 = add nsw i32 %4, %0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ stress_set_misaligned_method(char *);
void stress_misaligned_set_default(void) {
  stress_set_misaligned_method("all");
}


x86 assembly (clang, -O0):
<stress_misaligned_set_default>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <stress_set_misaligned_method@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<stress_misaligned_set_default>:
lea    0xee9(%rip),%rdi
jmp    1030 <stress_set_misaligned_method@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"all\00"
define void @stress_misaligned_set_default() {
%1 = call i32 @stress_set_misaligned_method(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"all\00"
define void @stress_misaligned_set_default() {
%1 = tail call i32 @stress_set_misaligned_method(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}
int config_MODULE_CCCAM(void) { return 0; }


x86 assembly (clang, -O0):
<config_MODULE_CCCAM>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_MODULE_CCCAM>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @config_MODULE_CCCAM() {
ret i32 0
}

LLVM IR (-O2):
define i32 @config_MODULE_CCCAM() {
ret i32 0
}
void clear_list(void) {}


x86 assembly (clang, -O0):
<clear_list>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_list>:
ret

LLVM IR (-O0):
define void @clear_list() {
ret void
}

LLVM IR (-O2):
define void @clear_list() {
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void LCDRasterConfigSet(uint32_t ui32Base, uint32_t ui32Config,
                        uint8_t ui8PalLoadDelay) {
  ASSERT(ui32Base == 0x44050000);
  ASSERT(!(ui32Config &
           ~(0x02000080 | 0x06000080 | 0x00000080 | 0x00800080 | 0x00000002 |
             0x00000202 | 0x00000000 | 0x00000000 | 0x01000000 | 0x08000000 |
             0x00400000 | 0x00200000 | 0x00100000 | 0x00000100)));
  (*((volatile uint32_t *)(ui32Base + 0x00000028))) =
      (ui32Config | ((uint32_t)ui8PalLoadDelay << 12));
}


x86 assembly (clang, -O0):
<LCDRasterConfigSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
cmpl   $0x44050000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%eax
and    $0xf00ffc7d,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%ecx
mov    -0x10(%rbp),%rax
shl    $0xc,%eax
or     %eax,%ecx
mov    -0x4(%rbp),%eax
add    $0x28,%eax
cltq
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCDRasterConfigSet>:
push   %rbp
push   %r14
push   %rbx
mov    %rdx,%rbx
mov    %esi,%ebp
mov    %edi,%r14d
xor    %edi,%edi
cmp    $0x44050000,%r14d
sete   %dil
call   1030 <ASSERT@plt>
xor    %edi,%edi
test   $0xf00ffc7d,%ebp
sete   %dil
call   1030 <ASSERT@plt>
shl    $0xc,%ebx
or     %ebp,%ebx
movslq %r14d,%rax
mov    %ebx,0x28(%rax)
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @LCDRasterConfigSet(i32 %0, i32 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i64
store i32 %0, i32* %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = icmp eq i32 %7, 1141178368
%9 = zext i1 %8 to i32
%10 = call i32 @ASSERT(i32 %9)
%11 = load i32, i32* %5
%12 = and i32 %11, -267387779
%13 = icmp ne i32 %12, 0
%14 = xor i1 %13, true
%15 = zext i1 %14 to i32
%16 = call i32 @ASSERT(i32 %15)
%17 = load i32, i32* %5
%18 = load i64, i64* %6
%19 = trunc i64 %18 to i32
%20 = shl i32 %19, 12
%21 = or i32 %17, %20
%22 = load i32, i32* %4
%23 = add nsw i32 %22, 40
%24 = sext i32 %23 to i64
%25 = inttoptr i64 %24 to i32*
store volatile i32 %21, i32* %25
ret void
}

LLVM IR (-O2):
define void @LCDRasterConfigSet(i32 %0, i32 %1, i64 %2) {
%4 = icmp eq i32 %0, 1141178368
%5 = zext i1 %4 to i32
%6 = tail call i32 @ASSERT(i32 %5)
%7 = and i32 %1, -267387779
%8 = icmp eq i32 %7, 0
%9 = zext i1 %8 to i32
%10 = tail call i32 @ASSERT(i32 %9)
%11 = trunc i64 %2 to i32
%12 = shl i32 %11, 12
%13 = or i32 %12, %1
%14 = add nsw i32 %0, 40
%15 = sext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
store volatile i32 %13, i32* %16
ret void
}
int aa_pro_ctr_a18(int chan, unsigned char *buf, int len) {
  hu_log(6, "hu_aap", __func__, "!!!!!!!!");
  return (-1);
}


x86 assembly (clang, -O0):
<aa_pro_ctr_a18>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0x6,%edi
lea    0xed2(%rip),%rsi
lea    0xed2(%rip),%rdx
lea    0xeda(%rip),%rcx
mov    $0x0,%al
call   1030 <hu_log@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aa_pro_ctr_a18>:
push   %rax
lea    0xee8(%rip),%rsi
lea    0xee8(%rip),%rdx
lea    0xef0(%rip),%rcx
mov    $0x6,%edi
xor    %eax,%eax
call   1030 <hu_log@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"hu_aap\00"
@__func__.aa_pro_ctr_a18 = [15 x i8] c"aa_pro_ctr_a18\00"
@.str.1 = [9 x i8] c"!!!!!!!!\00"
define i32 @aa_pro_ctr_a18(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = call i32 (i32, i8*, i8*, i8*, ...) bitcast (i32 (...)* @hu_log to i32 (i32, i8*, i8*, i8*, ...)*)(i32 6, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([15 x i8], [15 x i8]* @__func__.aa_pro_ctr_a18, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@.str = [7 x i8] c"hu_aap\00"
@__func__.aa_pro_ctr_a18 = [15 x i8] c"aa_pro_ctr_a18\00"
@.str.1 = [9 x i8] c"!!!!!!!!\00"
define i32 @aa_pro_ctr_a18(i32 %0, i8* nocapture readnone %1, i32 %2) {
%4 = tail call i32 (i32, i8*, i8*, i8*, ...) bitcast (i32 (...)* @hu_log to i32 (i32, i8*, i8*, i8*, ...)*)(i32 6, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([15 x i8], [15 x i8]* @__func__.aa_pro_ctr_a18, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
ret i32 -1
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
void *calloc(size_t nelem, size_t nsize) {
  size_t size = nelem * nsize;
  void *ptr = malloc(size);
  memset(ptr, 0, size);
  return ptr;
}


x86 assembly (clang, -O0):
<calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
imul   -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
imul   %rsi,%rbx
mov    %rbx,%rdi
call   1040 <malloc@plt>
mov    %rax,%r14
mov    %rax,%rdi
xor    %esi,%esi
mov    %rbx,%rdx
call   1030 <memset@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @calloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%7 = load i64, i64* %3
%8 = load i64, i64* %4
%9 = mul i64 %7, %8
store i64 %9, i64* %5
%10 = load i64, i64* %5
%11 = call i8* @malloc(i64 %10)
store i8* %11, i8** %6
%12 = load i8*, i8** %6
%13 = load i64, i64* %5
%14 = call i32 @memset(i8* %12, i32 0, i64 %13)
%15 = load i8*, i8** %6
ret i8* %15
}

LLVM IR (-O2):
define i8* @calloc(i64 %0, i64 %1) {
%3 = mul i64 %1, %0
%4 = tail call i8* @malloc(i64 %3)
%5 = tail call i32 @memset(i8* %4, i32 0, i64 %3)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ setup();
void main() {
  setup();
  while (1) {
  };
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <setup@plt>
jmp    111b <main+0xb>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <setup@plt>
nopl   0x0(%rax,%rax,1)
jmp    1120 <main+0x10>

LLVM IR (-O0):
define void @main() {
%1 = call i32 (...) @setup()
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 (...) @setup()
br label %2
2: ; preds = %0, %2
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ print(char *);
int linker_multiboot(void) {
  print("\t(template driver) linker_multiboot()\n");
  return 0;
}


x86 assembly (clang, -O0):
<linker_multiboot>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <print@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<linker_multiboot>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <print@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [39 x i8] c"\09(template driver) linker_multiboot()\0A\00"
define i32 @linker_multiboot() {
%1 = call i32 @print(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [39 x i8] c"\09(template driver) linker_multiboot()\0A\00"
define i32 @linker_multiboot() {
%1 = tail call i32 @print(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
float square(float x) { return (x * x); }


x86 assembly (clang, -O0):
<square>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<square>:
mulss  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @square(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fmul float %3, %4
ret float %5
}

LLVM IR (-O2):
define float @square(float %0) {
%2 = fmul float %0, %0
ret float %2
}
/* Variables and functions */
scalar_t__ malloc(int);
int *mallocInt() {
  int *p;
  p = (int *)malloc(sizeof(*p));
  return p;
}


x86 assembly (clang, -O0):
<mallocInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mallocInt>:
mov    $0x4,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i32* @mallocInt() {
%1 = alloca i32*
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32* %3, i32** %1
%4 = load i32*, i32** %1
ret i32* %4
}

LLVM IR (-O2):
define i32* @mallocInt() {
%1 = tail call i64 @malloc(i32 4)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}
void DBGFR3InjectNMI(void) {}


x86 assembly (clang, -O0):
<DBGFR3InjectNMI>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DBGFR3InjectNMI>:
ret

LLVM IR (-O0):
define void @DBGFR3InjectNMI() {
ret void
}

LLVM IR (-O2):
define void @DBGFR3InjectNMI() {
ret void
}
void change_data(int *data) { *data = 1; }


x86 assembly (clang, -O0):
<change_data>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<change_data>:
movl   $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @change_data(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
store i32 1, i32* %3
ret void
}

LLVM IR (-O2):
define void @change_data(i32* nocapture writeonly %0) {
store i32 1, i32* %0
ret void
}
void insw(int port, void *addr, unsigned long count) {
  __asm__ __volatile__("rep; insw"
                       : "+D"(addr), "+c"(count)
                       : "d"(port)
                       : "memory");
}


x86 assembly (clang, -O0):
<insw>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rcx
mov    -0x4(%rbp),%edx
rep insw (%dx),%es:(%rdi)
mov    %rdi,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<insw>:
mov    %rdx,%rcx
mov    %edi,%edx
mov    %rsi,%rdi
rep insw (%dx),%es:(%rdi)
ret

LLVM IR (-O0):
define void @insw(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i64, i64* %6
%9 = load i32, i32* %4
%10 = call { i8*, i64 } asm sideeffect "rep; insw", "={di},={cx},{dx},0,1,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %9, i8* %7, i64 %8)
%11 = extractvalue { i8*, i64 } %10, 0
%12 = extractvalue { i8*, i64 } %10, 1
store i8* %11, i8** %5
store i64 %12, i64* %6
ret void
}

LLVM IR (-O2):
define void @insw(i32 %0, i8* %1, i64 %2) {
%4 = tail call { i8*, i64 } asm sideeffect "rep; insw", "={di},={cx},{dx},0,1,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* %1, i64 %2)
ret void
}
void multiply_vector(const double *a, double b, double *out) {
  out[0] = a[0] * b;
  out[1] = a[1] * b;
  out[2] = a[2] * b;
}


x86 assembly (clang, -O0):
<multiply_vector>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mulsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mulsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mulsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<multiply_vector>:
movsd  (%rdi),%xmm1
mulsd  %xmm0,%xmm1
movsd  %xmm1,(%rsi)
movsd  0x8(%rdi),%xmm1
mulsd  %xmm0,%xmm1
movsd  %xmm1,0x8(%rsi)
mulsd  0x10(%rdi),%xmm0
movsd  %xmm0,0x10(%rsi)
ret

LLVM IR (-O0):
define void @multiply_vector(double* %0, double %1, double* %2) {
%4 = alloca double*
%5 = alloca double
%6 = alloca double*
store double* %0, double** %4
store double %1, double* %5
store double* %2, double** %6
%7 = load double*, double** %4
%8 = getelementptr inbounds double, double* %7, i64 0
%9 = load double, double* %8
%10 = load double, double* %5
%11 = fmul double %9, %10
%12 = load double*, double** %6
%13 = getelementptr inbounds double, double* %12, i64 0
store double %11, double* %13
%14 = load double*, double** %4
%15 = getelementptr inbounds double, double* %14, i64 1
%16 = load double, double* %15
%17 = load double, double* %5
%18 = fmul double %16, %17
%19 = load double*, double** %6
%20 = getelementptr inbounds double, double* %19, i64 1
store double %18, double* %20
%21 = load double*, double** %4
%22 = getelementptr inbounds double, double* %21, i64 2
%23 = load double, double* %22
%24 = load double, double* %5
%25 = fmul double %23, %24
%26 = load double*, double** %6
%27 = getelementptr inbounds double, double* %26, i64 2
store double %25, double* %27
ret void
}

LLVM IR (-O2):
define void @multiply_vector(double* nocapture %0, double %1, double* nocapture writeonly %2) {
%4 = load double, double* %0
%5 = fmul double %4, %1
store double %5, double* %2
%6 = getelementptr inbounds double, double* %0, i64 1
%7 = load double, double* %6
%8 = fmul double %7, %1
%9 = getelementptr inbounds double, double* %2, i64 1
store double %8, double* %9
%10 = getelementptr inbounds double, double* %0, i64 2
%11 = load double, double* %10
%12 = fmul double %11, %1
%13 = getelementptr inbounds double, double* %2, i64 2
store double %12, double* %13
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, int);
int /*<<< orphan*/ mutils_liberate_memory(void **);
void mutils_free_zero(void *buf, int size) {
  if (buf) {
    memset(buf, 0, size);
    mutils_liberate_memory(&buf);
  }
}


x86 assembly (clang, -O0):
<mutils_free_zero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1151 <mutils_free_zero+0x31>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
xor    %esi,%esi
call   1040 <memset@plt>
lea    -0x8(%rbp),%rdi
call   1030 <mutils_liberate_memory@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mutils_free_zero>:
push   %rax
mov    %rdi,(%rsp)
test   %rdi,%rdi
je     113b <mutils_free_zero+0x1b>
mov    %esi,%edx
xor    %esi,%esi
call   1040 <memset@plt>
mov    %rsp,%rdi
call   1030 <mutils_liberate_memory@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @mutils_free_zero(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %12
7: ; preds = %2
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = call i32 @memset(i8* %8, i32 0, i32 %9)
%11 = call i32 @mutils_liberate_memory(i8** %3)
br label %12
12: ; preds = %7, %2
ret void
}

LLVM IR (-O2):
define void @mutils_free_zero(i8* %0, i32 %1) {
%3 = alloca i8*
store i8* %0, i8** %3
%4 = icmp eq i8* %0, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @memset(i8* %0, i32 0, i32 %1)
%7 = call i32 @mutils_liberate_memory(i8** %3)
br label %8
8: ; preds = %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test61_Led_off__E();
void test61_Blink_targetInit__I() { test61_Led_off__E(); }


x86 assembly (clang, -O0):
<test61_Blink_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <test61_Led_off__E@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test61_Blink_targetInit__I>:
xor    %eax,%eax
jmp    1030 <test61_Led_off__E@plt>

LLVM IR (-O0):
define void @test61_Blink_targetInit__I() {
%1 = call i32 (...) @test61_Led_off__E()
ret void
}

LLVM IR (-O2):
define void @test61_Blink_targetInit__I() {
%1 = tail call i32 (...) @test61_Led_off__E()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void *malloc(size_t);
void *__tree_alloc(size_t size) {
  void *ptr;
  ptr = malloc(size);
  assert(ptr != NULL);
  if (ptr)
    return ptr;
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<__tree_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
cmpq   $0x0,-0x10(%rbp)
je     1170 <__tree_alloc+0x40>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret
mov    0x2e69(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<__tree_alloc>:
push   %rbx
call   1040 <malloc@plt>
mov    %rax,%rbx
xor    %edi,%edi
test   %rax,%rax
setne  %dil
call   1030 <assert@plt>
test   %rbx,%rbx
je     1151 <__tree_alloc+0x21>
mov    %rbx,%rax
pop    %rbx
ret
mov    0x2e88(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
define i8* @__tree_alloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
%10 = load i8*, i8** %3
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %14
12: ; preds = %1
%13 = load i8*, i8** %3
ret i8* %13
14: ; preds = %1
%15 = load i32, i32* @EXIT_FAILURE
%16 = call i32 @exit(i32 %15)
unreachable
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
define noalias i8* @__tree_alloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp ne i8* %2, null
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
br i1 %3, label %6, label %7
6: ; preds = %1
ret i8* %2
7: ; preds = %1
%8 = load i32, i32* @EXIT_FAILURE
%9 = tail call i32 @exit(i32 %8)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n;
  scanf("%d", &n);
  printf("%d", n * n);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%esi
imul   -0x8(%rbp),%esi
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xed4(%rip),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1040 <scanf@plt>
mov    0xc(%rsp),%esi
imul   %esi,%esi
mov    %rbx,%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = load i32, i32* %2
%6 = mul nsw i32 %4, %5
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = mul nsw i32 %4, %4
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}
void camQuit() { return; }


x86 assembly (clang, -O0):
<camQuit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<camQuit>:
ret

LLVM IR (-O0):
define void @camQuit() {
ret void
}

LLVM IR (-O2):
define void @camQuit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
void *realloc(void *, size_t);
void *assert_realloc(void *ptr, size_t size) {
  void *result = realloc(ptr, size);
  assert(result != NULL || size == 0);
  return result;
}


x86 assembly (clang, -O0):
<assert_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x18(%rbp)
mov    $0x1,%al
cmpq   $0x0,-0x18(%rbp)
mov    %al,-0x19(%rbp)
jne    115c <assert_realloc+0x3c>
cmpq   $0x0,-0x10(%rbp)
sete   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assert_realloc>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
call   1040 <realloc@plt>
mov    %rax,%r14
test   %rax,%rax
setne  %al
test   %rbx,%rbx
sete   %cl
or     %al,%cl
movzbl %cl,%edi
call   1030 <assert@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @assert_realloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %14, label %11
11: ; preds = %2
%12 = load i64, i64* %4
%13 = icmp eq i64 %12, 0
br label %14
14: ; preds = %11, %2
%15 = phi i1 [ true, %2 ], [ %13, %11 ]
%16 = zext i1 %15 to i32
%17 = call i32 @assert(i32 %16)
%18 = load i8*, i8** %5
ret i8* %18
}

LLVM IR (-O2):
define noalias i8* @assert_realloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp ne i8* %3, null
%5 = icmp eq i64 %1, 0
%6 = or i1 %5, %4
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
ret i8* %3
}
int fib(int n) {
  if (n <= 1)
    return n;
  return fib(n - 1) + fib(n - 2);
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jg     1130 <fib+0x20>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1153 <fib+0x43>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x2,%edi
jge    1120 <fib+0x10>
mov    %ebx,%ecx
jmp    1144 <fib+0x34>
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    -0x1(%rbx),%edi
call   1030 <fib@plt>
lea    -0x2(%rbx),%ecx
add    %eax,%ebp
cmp    $0x3,%ebx
mov    %ecx,%ebx
ja     1130 <fib+0x20>
add    %ecx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %16
8: ; preds = %1
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 1
%11 = call i32 @fib(i32 %10)
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 2
%14 = call i32 @fib(i32 %13)
%15 = add nsw i32 %11, %14
store i32 %15, i32* %2
br label %16
16: ; preds = %8, %6
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %9, %3 ]
%13 = phi i32 [ %0, %1 ], [ %8, %3 ]
%14 = add nsw i32 %13, %12
ret i32 %14
}
/* Type definitions */
struct bitmask {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ dombind(void *, size_t, int, struct bitmask *);
void numa_interleave_memory_v2(void *mem, size_t size, struct bitmask *bmp) {
  dombind(mem, size, 3, bmp);
}


x86 assembly (clang, -O0):
<numa_interleave_memory_v2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rcx
mov    $0x3,%edx
call   1030 <dombind@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<numa_interleave_memory_v2>:
mov    %rdx,%rcx
mov    $0x3,%edx
jmp    1030 <dombind@plt>

LLVM IR (-O0):
%struct.bitmask = type { i32 }
define void @numa_interleave_memory_v2(i8* %0, i64 %1, %struct.bitmask* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca %struct.bitmask*
store i8* %0, i8** %4
store i64 %1, i64* %5
store %struct.bitmask* %2, %struct.bitmask** %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load %struct.bitmask*, %struct.bitmask** %6
%10 = call i32 @dombind(i8* %7, i64 %8, i32 3, %struct.bitmask* %9)
ret void
}

LLVM IR (-O2):
%struct.bitmask = type { i32 }
define void @numa_interleave_memory_v2(i8* %0, i64 %1, %struct.bitmask* %2) {
%4 = tail call i32 @dombind(i8* %0, i64 %1, i32 3, %struct.bitmask* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("\n\nHello World!\n\n");
  printf("compile time: "
         "Mar 15 2022"
         " -- "
         "21:52:20"
         "\n");
  printf("gcc version:  "
         "9.4.0"
         "\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xedf(%rip),%rdi
call   1030 <printf@plt>
lea    0xefa(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeec(%rip),%rdi
call   1030 <puts@plt>
lea    0xf06(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"\0A\0AHello World!\0A\0A\00"
@.str.1 = [39 x i8] c"compile time: Mar 15 2022 -- 21:52:20\0A\00"
@.str.2 = [21 x i8] c"gcc version: 9.4.0\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str.1, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [16 x i8] c"\0A\0AHello World!\0A\00"
@str.3 = [38 x i8] c"compile time: Mar 15 2022 -- 21:52:20\00"
@str.4 = [20 x i8] c"gcc version: 9.4.0\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @str.3, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str.4, i64 0, i64 0))
ret i32 0
}
int fun946() { return 946; }


x86 assembly (clang, -O0):
<fun946>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3b2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun946>:
mov    $0x3b2,%eax
ret

LLVM IR (-O0):
define i32 @fun946() {
ret i32 946
}

LLVM IR (-O2):
define i32 @fun946() {
ret i32 946
}
int f4(unsigned char *x) { return ~(1U << x[0]); }


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
mov    (%rdi),%cl
mov    $0xfffffffe,%eax
rol    %cl,%eax
ret

LLVM IR (-O0):
define i32 @f4(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl i32 1, %6
%8 = xor i32 %7, -1
ret i32 %8
}

LLVM IR (-O2):
define i32 @f4(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = shl nuw i32 1, %3
%5 = xor i32 %4, -1
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ subr();
main() {
  int k = 0;
  printf("Test  4 ");
  subr();
  printf("ok\n");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <subr@plt>
lea    0xec0(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
call   1050 <printf@plt>
xor    %eax,%eax
call   1040 <subr@plt>
lea    0xebe(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"Test 4 \00"
@.str.1 = [4 x i8] c"ok\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @subr()
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"Test 4 \00"
@str = [3 x i8] c"ok\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @subr()
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
double rand_casella(int);
double get_nextpeople_qss(int i) {
  double d = rand_casella(i);
  return 1000.0 + 1000 * d;
}


x86 assembly (clang, -O0):
<get_nextpeople_qss>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <rand_casella@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xecb(%rip),%xmm1
mulsd  %xmm1,%xmm0
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_nextpeople_qss>:
push   %rax
call   1030 <rand_casella@plt>
movsd  0xee2(%rip),%xmm1
mulsd  %xmm1,%xmm0
addsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @get_nextpeople_qss(i32 %0) {
%2 = alloca i32
%3 = alloca double
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call double @rand_casella(i32 %4)
store double %5, double* %3
%6 = load double, double* %3
%7 = call double @llvm.fmuladd.f64(double 1.000000e+03, double %6, double 1.000000e+03)
ret double %7
}

LLVM IR (-O2):
define double @get_nextpeople_qss(i32 %0) {
%2 = tail call double @rand_casella(i32 %0)
%3 = tail call double @llvm.fmuladd.f64(double %2, double 1.000000e+03, double 1.000000e+03)
ret double %3
}
/* Type definitions */
struct path_node {
  int dummy;
};
struct inter {
  int dummy;
};
struct dlist_root {
  int dummy;
};

/* Variables and functions */
scalar_t__ dlist_root_pop_back(struct dlist_root *);
int /*<<< orphan*/ path_node_free(struct path_node *, struct inter *);
void path_pop_back(struct dlist_root *self, struct inter *inter) {
  struct path_node *back = (struct path_node *)dlist_root_pop_back(self);
  path_node_free(back, inter);
}


x86 assembly (clang, -O0):
<path_pop_back>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <dlist_root_pop_back@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <path_node_free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<path_pop_back>:
push   %rbx
mov    %rsi,%rbx
call   1040 <dlist_root_pop_back@plt>
mov    %rax,%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <path_node_free@plt>

LLVM IR (-O0):
%struct.dlist_root = type { i32 }
%struct.inter = type { i32 }
%struct.path_node = type { i32 }
define void @path_pop_back(%struct.dlist_root* %0, %struct.inter* %1) {
%3 = alloca %struct.dlist_root*
%4 = alloca %struct.inter*
%5 = alloca %struct.path_node*
store %struct.dlist_root* %0, %struct.dlist_root** %3
store %struct.inter* %1, %struct.inter** %4
%6 = load %struct.dlist_root*, %struct.dlist_root** %3
%7 = call i64 @dlist_root_pop_back(%struct.dlist_root* %6)
%8 = inttoptr i64 %7 to %struct.path_node*
store %struct.path_node* %8, %struct.path_node** %5
%9 = load %struct.path_node*, %struct.path_node** %5
%10 = load %struct.inter*, %struct.inter** %4
%11 = call i32 @path_node_free(%struct.path_node* %9, %struct.inter* %10)
ret void
}

LLVM IR (-O2):
%struct.dlist_root = type { i32 }
%struct.inter = type { i32 }
%struct.path_node = type { i32 }
define void @path_pop_back(%struct.dlist_root* %0, %struct.inter* %1) {
%3 = tail call i64 @dlist_root_pop_back(%struct.dlist_root* %0)
%4 = inttoptr i64 %3 to %struct.path_node*
%5 = tail call i32 @path_node_free(%struct.path_node* %4, %struct.inter* %1)
ret void
}
/* Variables and functions */
int f332(int *);
int f333(int *p) { return f332(p); }


x86 assembly (clang, -O0):
<f333>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f332@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f333>:
jmp    1030 <f332@plt>

LLVM IR (-O0):
define i32 @f333(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f332(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f333(i32* %0) {
%2 = tail call i32 @f332(i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ gen(char *);
void cgsub(void) { gen("subl\t%ecx,%eax"); }


x86 assembly (clang, -O0):
<cgsub>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <gen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgsub>:
lea    0xee9(%rip),%rdi
jmp    1030 <gen@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"subl\09%ecx,%eax\00"
define void @cgsub() {
%1 = call i32 @gen(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"subl\09%ecx,%eax\00"
define void @cgsub() {
%1 = tail call i32 @gen(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
unsigned long htons(unsigned short);
unsigned long ntohs(unsigned short netshort) { return htons(netshort); }


x86 assembly (clang, -O0):
<ntohs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edi
call   1030 <htons@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ntohs>:
jmp    1030 <htons@plt>

LLVM IR (-O0):
define i64 @ntohs(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = call i64 @htons(i16 zeroext %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @ntohs(i16 zeroext %0) {
%2 = tail call i64 @htons(i16 zeroext %0)
ret i64 %2
}
void wmetff(ifilcd, idum1, idum2, idum3) int *ifilcd, *idum1, *idum2, *idum3;
{ wmetof(ifilcd); }


x86 assembly (clang, -O0):
<wmetff>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <wmetof@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wmetff>:
xor    %eax,%eax
jmp    1030 <wmetof@plt>

LLVM IR (-O0):
define void @wmetff(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = call i32 (i32*, ...) bitcast (i32 (...)* @wmetof to i32 (i32*, ...)*)(i32* %9)
ret void
}

LLVM IR (-O2):
define void @wmetff(i32* %0, i32* nocapture readnone %1, i32* nocapture readnone %2, i32* nocapture readnone %3) {
%5 = tail call i32 (i32*, ...) bitcast (i32 (...)* @wmetof to i32 (i32*, ...)*)(i32* %0)
ret void
}
void __attribute__((constructor)) init(void) {}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
ret

LLVM IR (-O0):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @init, i8* null }]
define void @init() {
ret void
}

LLVM IR (-O2):
@llvm.global_ctors = appending global [0 x { i32, void ()*, i8* }] zeroinitializer
define void @init() {
ret void
}
long double fmal(long double _x, long double _y, long double _z) {
  return ((_x * _y) + _z);
}


x86 assembly (clang, -O0):
<fmal>:
push   %rbp
mov    %rsp,%rbp
fldt   0x30(%rbp)
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fstpt  -0x30(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
fldt   -0x30(%rbp)
fxch   %st(2)
fmulp  %st,%st(1)
faddp  %st,%st(1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmal>:
fldt   0x28(%rsp)
fldt   0x18(%rsp)
fldt   0x8(%rsp)
fmulp  %st,%st(1)
faddp  %st,%st(1)
ret

LLVM IR (-O0):
define x86_fp80 @fmal(x86_fp80 %0, x86_fp80 %1, x86_fp80 %2) {
%4 = alloca x86_fp80
%5 = alloca x86_fp80
%6 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %4
store x86_fp80 %1, x86_fp80* %5
store x86_fp80 %2, x86_fp80* %6
%7 = load x86_fp80, x86_fp80* %4
%8 = load x86_fp80, x86_fp80* %5
%9 = load x86_fp80, x86_fp80* %6
%10 = call x86_fp80 @llvm.fmuladd.f80(x86_fp80 %7, x86_fp80 %8, x86_fp80 %9)
ret x86_fp80 %10
}

LLVM IR (-O2):
define x86_fp80 @fmal(x86_fp80 %0, x86_fp80 %1, x86_fp80 %2) {
%4 = tail call x86_fp80 @llvm.fmuladd.f80(x86_fp80 %0, x86_fp80 %1, x86_fp80 %2)
ret x86_fp80 %4
}
int r_sys_setenv(const char *key, const char *value) {
  if (!key) {
    return 0;
  }
  return 0;
}


x86 assembly (clang, -O0):
<r_sys_setenv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1123 <r_sys_setenv+0x23>
movl   $0x0,-0x4(%rbp)
jmp    112a <r_sys_setenv+0x2a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<r_sys_setenv>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @r_sys_setenv(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %9, label %8
8: ; preds = %2
store i32 0, i32* %3
br label %10
9: ; preds = %2
store i32 0, i32* %3
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @r_sys_setenv(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Type definitions */
typedef scalar_t__ uint;

/* Variables and functions */
int uintCompare(const void *a, const void *b) {
  uint c = *((uint *)a), d = *((uint *)b);
  return c > d ? 1 : c < d ? -1 : 0;
}


x86 assembly (clang, -O0):
<uintCompare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x20(%rbp),%rax
jle    113d <uintCompare+0x3d>
mov    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    1155 <uintCompare+0x55>
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rsi
xor    %eax,%eax
mov    $0xffffffff,%ecx
cmp    %rsi,%rdx
cmovl  %ecx,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uintCompare>:
mov    (%rdi),%rax
mov    (%rsi),%rcx
xor    %edx,%edx
cmp    %rcx,%rax
setl   %dl
neg    %edx
cmp    %rcx,%rax
mov    $0x1,%eax
cmovle %edx,%eax
ret

LLVM IR (-O0):
define i32 @uintCompare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i64*
%9 = load i64, i64* %8
store i64 %9, i64* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i64*
%12 = load i64, i64* %11
store i64 %12, i64* %6
%13 = load i64, i64* %5
%14 = load i64, i64* %6
%15 = icmp sgt i64 %13, %14
br i1 %15, label %16, label %17
16: ; preds = %2
br label %23
17: ; preds = %2
%18 = load i64, i64* %5
%19 = load i64, i64* %6
%20 = icmp slt i64 %18, %19
%21 = zext i1 %20 to i64
%22 = select i1 %20, i32 -1, i32 0
br label %23
23: ; preds = %17, %16
%24 = phi i32 [ 1, %16 ], [ %22, %17 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @uintCompare(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = load i64, i64* %3
%5 = bitcast i8* %1 to i64*
%6 = load i64, i64* %5
%7 = icmp sgt i64 %4, %6
%8 = icmp slt i64 %4, %6
%9 = sext i1 %8 to i32
%10 = select i1 %7, i32 1, i32 %9
ret i32 %10
}
/* Variables and functions */
int be_migrate_thread_to_domain(int /*<<< orphan*/, int);
int be_migrate_to_domain(int domain) {
  return be_migrate_thread_to_domain(0, domain);
}


x86 assembly (clang, -O0):
<be_migrate_to_domain>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
xor    %edi,%edi
call   1030 <be_migrate_thread_to_domain@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<be_migrate_to_domain>:
mov    %edi,%esi
xor    %edi,%edi
jmp    1030 <be_migrate_thread_to_domain@plt>

LLVM IR (-O0):
define i32 @be_migrate_to_domain(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @be_migrate_thread_to_domain(i32 0, i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @be_migrate_to_domain(i32 %0) {
%2 = tail call i32 @be_migrate_thread_to_domain(i32 0, i32 %0)
ret i32 %2
}