xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ rb_isdigit(int);
int rb_isxdigit(int c) {
  return rb_isdigit(c) || ('A' <= c && c <= 'F') || ('a' <= c && c <= 'f');
}


x86 assembly (clang, -O0):
<rb_isxdigit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <rb_isdigit@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1175 <rb_isxdigit+0x65>
mov    $0x41,%eax
cmp    -0x4(%rbp),%eax
jg     1152 <rb_isxdigit+0x42>
mov    $0x1,%al
cmpl   $0x46,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1175 <rb_isxdigit+0x65>
xor    %eax,%eax
mov    $0x61,%ecx
cmp    -0x4(%rbp),%ecx
mov    %al,-0x6(%rbp)
jg     116f <rb_isxdigit+0x5f>
cmpl   $0x66,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rb_isxdigit>:
push   %rbx
mov    %edi,%ebx
call   1030 <rb_isdigit@plt>
test   %rax,%rax
setne  %al
and    $0xffffffdf,%ebx
add    $0xffffffbf,%ebx
cmp    $0x6,%ebx
setb   %cl
or     %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @rb_isxdigit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @rb_isdigit(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %20, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp sle i32 65, %7
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %2
%11 = icmp sle i32 %10, 70
br i1 %11, label %20, label %12
12: ; preds = %9, %6
%13 = load i32, i32* %2
%14 = icmp sle i32 97, %13
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i32, i32* %2
%17 = icmp sle i32 %16, 102
br label %18
18: ; preds = %15, %12
%19 = phi i1 [ false, %12 ], [ %17, %15 ]
br label %20
20: ; preds = %18, %9, %1
%21 = phi i1 [ true, %9 ], [ true, %1 ], [ %19, %18 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @rb_isxdigit(i32 %0) {
%2 = tail call i64 @rb_isdigit(i32 %0)
%3 = icmp ne i64 %2, 0
%4 = and i32 %0, -33
%5 = add i32 %4, -65
%6 = icmp ult i32 %5, 6
%7 = or i1 %6, %3
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
double fsq(double);
double fcube(double x) { return fsq(x) * x; }


x86 assembly (clang, -O0):
<fcube>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <fsq@plt>
mulsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fcube>:
push   %rax
movsd  %xmm0,(%rsp)
call   1030 <fsq@plt>
mulsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @fcube(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @fsq(double %3)
%5 = load double, double* %2
%6 = fmul double %4, %5
ret double %6
}

LLVM IR (-O2):
define double @fcube(double %0) {
%2 = tail call double @fsq(double %0)
%3 = fmul double %2, %0
ret double %3
}
/* Variables and functions */
scalar_t__ isspace(char);
int strlen(char *);
char *rtrim(char *str) {
  register int p;
  p = strlen(str) - 1;
  while (isspace(str[p]))
    p--;
  str[p + 1] = '\0';
  return str;
}


x86 assembly (clang, -O0):
<rtrim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1040 <isspace@plt>
cmp    $0x0,%rax
je     1164 <rtrim+0x44>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    113b <rtrim+0x1b>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtrim>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <strlen@plt>
cltq
lea    (%rax,%r14,1),%rbx
add    $0xffffffffffffffff,%rbx
shl    $0x20,%rax
movabs $0x100000000,%r15
add    %rax,%r15
movabs $0xffffffff00000000,%r12
ff ff ff
cs nopw 0x0(%rax,%rax,1)
nop
add    %r12,%r15
movsbl (%rbx),%edi
call   1040 <isspace@plt>
add    $0xffffffffffffffff,%rbx
test   %rax,%rax
jne    1160 <rtrim+0x40>
sar    $0x20,%r15
movb   $0x0,(%r14,%r15,1)
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @rtrim(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = sub nsw i32 %5, 1
store i32 %6, i32* %3
br label %7
7: ; preds = %15, %1
%8 = load i8*, i8** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = call i64 @isspace(i8 signext %12)
%14 = icmp ne i64 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %7
%16 = load i32, i32* %3
%17 = add nsw i32 %16, -1
store i32 %17, i32* %3
br label %7
18: ; preds = %7
%19 = load i8*, i8** %2
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 1
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %19, i64 %22
store i8 0, i8* %23
%24 = load i8*, i8** %2
ret i8* %24
}

LLVM IR (-O2):
define i8* @rtrim(i8* returned %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = sext i32 %2 to i64
br label %4
4: ; preds = %4, %1
%5 = phi i64 [ %6, %4 ], [ %3, %1 ]
%6 = add i64 %5, -1
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = tail call i64 @isspace(i8 signext %8)
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4
%12 = shl i64 %5, 32
%13 = ashr exact i64 %12, 32
%14 = getelementptr inbounds i8, i8* %0, i64 %13
store i8 0, i8* %14
ret i8* %0
}
/* Variables and functions */
double fabs(double);
bool doubleComparisson(double a, double b, double epslon) {
  return fabs(a - b) < epslon;
}


x86 assembly (clang, -O0):
<doubleComparisson>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
subsd  -0x10(%rbp),%xmm1
movaps 0xedc(%rip),%xmm0
pand   %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<doubleComparisson>:
subsd  %xmm1,%xmm0
andpd  0xef4(%rip),%xmm0
xor    %eax,%eax
ucomisd %xmm0,%xmm2
seta   %al
ret

LLVM IR (-O0):
define i32 @doubleComparisson(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = fsub double %7, %8
%10 = call double @llvm.fabs.f64(double %9)
%11 = load double, double* %6
%12 = fcmp olt double %10, %11
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @doubleComparisson(double %0, double %1, double %2) {
%4 = fsub double %0, %1
%5 = tail call double @llvm.fabs.f64(double %4)
%6 = fcmp olt double %5, %2
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Type definitions */
struct xfs_dir2_data_hdr {
  int dummy;
};
struct xfs_dir2_data_entry {
  int dummy;
};

/* Variables and functions */
int xfs_dir3_data_first_offset(struct xfs_dir2_data_hdr *);
struct xfs_dir2_data_entry *
xfs_dir3_data_first_entry_p(struct xfs_dir2_data_hdr *hdr) {
  return (struct xfs_dir2_data_entry *)((char *)hdr +
                                        xfs_dir3_data_first_offset(hdr));
}


x86 assembly (clang, -O0):
<xfs_dir3_data_first_entry_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <xfs_dir3_data_first_offset@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfs_dir3_data_first_entry_p>:
push   %rbx
mov    %rdi,%rbx
call   1030 <xfs_dir3_data_first_offset@plt>
cltq
add    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.xfs_dir2_data_entry = type { i32 }
%struct.xfs_dir2_data_hdr = type { i32 }
define %struct.xfs_dir2_data_entry* @xfs_dir3_data_first_entry_p(%struct.xfs_dir2_data_hdr* %0) {
%2 = alloca %struct.xfs_dir2_data_hdr*
store %struct.xfs_dir2_data_hdr* %0, %struct.xfs_dir2_data_hdr** %2
%3 = load %struct.xfs_dir2_data_hdr*, %struct.xfs_dir2_data_hdr** %2
%4 = bitcast %struct.xfs_dir2_data_hdr* %3 to i8*
%5 = load %struct.xfs_dir2_data_hdr*, %struct.xfs_dir2_data_hdr** %2
%6 = call i32 @xfs_dir3_data_first_offset(%struct.xfs_dir2_data_hdr* %5)
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %4, i64 %7
%9 = bitcast i8* %8 to %struct.xfs_dir2_data_entry*
ret %struct.xfs_dir2_data_entry* %9
}

LLVM IR (-O2):
%struct.xfs_dir2_data_entry = type { i32 }
%struct.xfs_dir2_data_hdr = type { i32 }
define %struct.xfs_dir2_data_entry* @xfs_dir3_data_first_entry_p(%struct.xfs_dir2_data_hdr* %0) {
%2 = bitcast %struct.xfs_dir2_data_hdr* %0 to i8*
%3 = tail call i32 @xfs_dir3_data_first_offset(%struct.xfs_dir2_data_hdr* %0)
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %2, i64 %4
%6 = bitcast i8* %5 to %struct.xfs_dir2_data_entry*
ret %struct.xfs_dir2_data_entry* %6
}
/* Variables and functions */
scalar_t__ INT_MIN;
unsigned int test2u(unsigned int x) {
  return (x ^ 0x1234) ^ (unsigned int)INT_MIN;
}


x86 assembly (clang, -O0):
<test2u>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    $0x1234,%eax
mov    0x2ed2(%rip),%rcx
mov    (%rcx),%rcx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test2u>:
mov    %edi,%eax
mov    0x2edf(%rip),%rcx
xor    (%rcx),%eax
xor    $0x1234,%eax
ret

LLVM IR (-O0):
@INT_MIN = global i64 0
define i32 @test2u(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = xor i32 %3, 4660
%5 = load i64, i64* @INT_MIN
%6 = trunc i64 %5 to i32
%7 = xor i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
@INT_MIN = global i64 0
define i32 @test2u(i32 %0) {
%2 = load i64, i64* @INT_MIN
%3 = trunc i64 %2 to i32
%4 = xor i32 %3, %0
%5 = xor i32 %4, 4660
ret i32 %5
}
/* Type definitions */
struct in6_addr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ memcpy(struct in6_addr *, struct in6_addr *, int);
void in6addrcpy(struct in6_addr *dst, struct in6_addr *src) {
  memcpy(dst, src, sizeof(struct in6_addr));
}


x86 assembly (clang, -O0):
<in6addrcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<in6addrcpy>:
mov    $0x4,%edx
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
%struct.in6_addr = type { i32 }
define void @in6addrcpy(%struct.in6_addr* %0, %struct.in6_addr* %1) {
%3 = alloca %struct.in6_addr*
%4 = alloca %struct.in6_addr*
store %struct.in6_addr* %0, %struct.in6_addr** %3
store %struct.in6_addr* %1, %struct.in6_addr** %4
%5 = load %struct.in6_addr*, %struct.in6_addr** %3
%6 = load %struct.in6_addr*, %struct.in6_addr** %4
%7 = call i32 @memcpy(%struct.in6_addr* %5, %struct.in6_addr* %6, i32 4)
ret void
}

LLVM IR (-O2):
%struct.in6_addr = type { i32 }
define void @in6addrcpy(%struct.in6_addr* %0, %struct.in6_addr* %1) {
%3 = tail call i32 @memcpy(%struct.in6_addr* %0, %struct.in6_addr* %1, i32 4)
ret void
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int stat(const char *filename, struct stat *buf) {
  fprintf(stderr, "stat: not implemented\n");
  return -1;
}


x86 assembly (clang, -O0):
<stat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stat>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
@stderr = global i32 0
@.str = [23 x i8] c"stat: not implemented\0A\00"
define i32 @stat(i8* %0, %struct.stat* %1) {
%3 = alloca i8*
%4 = alloca %struct.stat*
store i8* %0, i8** %3
store %struct.stat* %1, %struct.stat** %4
%5 = load i32, i32* @stderr
%6 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
%struct.stat = type { i32 }
@stderr = global i32 0
@.str = [23 x i8] c"stat: not implemented\0A\00"
define i32 @stat(i8* nocapture readnone %0, %struct.stat* nocapture readnone %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ testmorse();
int main() { testmorse(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <testmorse@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <testmorse@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @testmorse()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @testmorse()
ret i32 0
}
float flt_min1(float a, float b) { return (a < b) ? a : b; }


x86 assembly (clang, -O0):
<flt_min1>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1130 <flt_min1+0x30>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    113a <flt_min1+0x3a>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<flt_min1>:
minss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @flt_min1(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp olt float %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load float, float* %3
br label %12
10: ; preds = %2
%11 = load float, float* %4
br label %12
12: ; preds = %10, %8
%13 = phi float [ %9, %8 ], [ %11, %10 ]
ret float %13
}

LLVM IR (-O2):
define float @flt_min1(float %0, float %1) {
%3 = fcmp olt float %0, %1
%4 = select i1 %3, float %0, float %1
ret float %4
}
unsigned kol_event_wait_time(unsigned time) {
  asm("int $0x40" ::"a"(23), "b"(time));
}


x86 assembly (clang, -O0):
<kol_event_wait_time>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0x10(%rbp)
mov    -0x10(%rbp),%ebx
mov    $0x17,%eax
int    $0x40
mov    -0xc(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<kol_event_wait_time>:
push   %rbx
mov    %edi,%ebx
mov    $0x17,%eax
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define i32 @kol_event_wait_time(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
define i32 @kol_event_wait_time(i32 %0) {
tail call void asm sideeffect "int $$0x40", "{ax},{bx},~{dirflag},~{fpsr},~{flags}"(i32 23, i32 %0)
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fread(int *, int, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ ignoreReturnValue(int /*<<< orphan*/);
int fread_int(FILE *fp) {
  int ret;
  ignoreReturnValue(fread(&ret, 4, 1, fp));
  return ret;
}


x86 assembly (clang, -O0):
<fread_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
lea    -0xc(%rbp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
call   1040 <fread@plt>
mov    %eax,%edi
call   1030 <ignoreReturnValue@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fread_int>:
push   %rax
mov    %rdi,%rcx
lea    0x4(%rsp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
call   1040 <fread@plt>
mov    %eax,%edi
call   1030 <ignoreReturnValue@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fread_int(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @fread(i32* %3, i32 4, i32 1, i32* %4)
%6 = call i32 @ignoreReturnValue(i32 %5)
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @fread_int(i32* nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @fread(i32* %2, i32 4, i32 1, i32* %0)
%5 = tail call i32 @ignoreReturnValue(i32 %4)
%6 = load i32, i32* %2
ret i32 %6
}
void foo_1_1_2_2_1_1_2_1_2() {}


x86 assembly (clang, -O0):
<foo_1_1_2_2_1_1_2_1_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_1_1_2_2_1_1_2_1_2>:
ret

LLVM IR (-O0):
define void @foo_1_1_2_2_1_1_2_1_2() {
ret void
}

LLVM IR (-O2):
define void @foo_1_1_2_2_1_1_2_1_2() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ IntEnable(int);
int /*<<< orphan*/ IntRegister(int, void (*)());
void UARTTXIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)) {
  uint32_t ui32Int;
  ;
  ui32Int = ((ui32Base == 0x00007200) ? 0x610902 : 0x630904);
  IntRegister(ui32Int, pfnHandler);
  IntEnable(ui32Int);
}


x86 assembly (clang, -O0):
<UARTTXIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edx
mov    $0x630904,%eax
mov    $0x610902,%ecx
cmp    $0x7200,%edx
cmove  %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <IntRegister@plt>
mov    -0x14(%rbp),%edi
call   1030 <IntEnable@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTTXIntRegister>:
push   %rbx
cmp    $0x7200,%edi
mov    $0x610902,%eax
mov    $0x630904,%ebx
cmove  %eax,%ebx
mov    %ebx,%edi
call   1040 <IntRegister@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @UARTTXIntRegister(i32 %0, void ()* %1) {
%3 = alloca i32
%4 = alloca void ()*
%5 = alloca i32
store i32 %0, i32* %3
store void ()* %1, void ()** %4
%6 = load i32, i32* %3
%7 = icmp eq i32 %6, 29184
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 6359298, i32 6490372
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = load void ()*, void ()** %4
%12 = bitcast void ()* %11 to void (...)*
%13 = call i32 @IntRegister(i32 %10, void (...)* %12)
%14 = load i32, i32* %5
%15 = call i32 @IntEnable(i32 %14)
ret void
}

LLVM IR (-O2):
define void @UARTTXIntRegister(i32 %0, void ()* %1) {
%3 = icmp eq i32 %0, 29184
%4 = select i1 %3, i32 6359298, i32 6490372
%5 = bitcast void ()* %1 to void (...)*
%6 = tail call i32 @IntRegister(i32 %4, void (...)* %5)
%7 = tail call i32 @IntEnable(i32 %4)
ret void
}
void g_object_interface_install_property() {}


x86 assembly (clang, -O0):
<g_object_interface_install_property>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_object_interface_install_property>:
ret

LLVM IR (-O0):
define void @g_object_interface_install_property() {
ret void
}

LLVM IR (-O2):
define void @g_object_interface_install_property() {
ret void
}
/* Type definitions */
struct wl_seat {
  int dummy;
};
struct wl_proxy {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wl_proxy_destroy(struct wl_proxy *);
int /*<<< orphan*/ wl_proxy_marshal(struct wl_proxy *, int);
void wl_seat_release(struct wl_seat *wl_seat) {
  wl_proxy_marshal((struct wl_proxy *)wl_seat, 3);
  wl_proxy_destroy((struct wl_proxy *)wl_seat);
}


x86 assembly (clang, -O0):
<wl_seat_release>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x3,%esi
call   1040 <wl_proxy_marshal@plt>
mov    -0x8(%rbp),%rdi
call   1030 <wl_proxy_destroy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wl_seat_release>:
push   %rbx
mov    %rdi,%rbx
mov    $0x3,%esi
call   1040 <wl_proxy_marshal@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <wl_proxy_destroy@plt>

LLVM IR (-O0):
%struct.wl_seat = type { i32 }
%struct.wl_proxy = type { i32 }
define void @wl_seat_release(%struct.wl_seat* %0) {
%2 = alloca %struct.wl_seat*
store %struct.wl_seat* %0, %struct.wl_seat** %2
%3 = load %struct.wl_seat*, %struct.wl_seat** %2
%4 = bitcast %struct.wl_seat* %3 to %struct.wl_proxy*
%5 = call i32 @wl_proxy_marshal(%struct.wl_proxy* %4, i32 3)
%6 = load %struct.wl_seat*, %struct.wl_seat** %2
%7 = bitcast %struct.wl_seat* %6 to %struct.wl_proxy*
%8 = call i32 @wl_proxy_destroy(%struct.wl_proxy* %7)
ret void
}

LLVM IR (-O2):
%struct.wl_seat = type { i32 }
%struct.wl_proxy = type { i32 }
define void @wl_seat_release(%struct.wl_seat* %0) {
%2 = bitcast %struct.wl_seat* %0 to %struct.wl_proxy*
%3 = tail call i32 @wl_proxy_marshal(%struct.wl_proxy* %2, i32 3)
%4 = tail call i32 @wl_proxy_destroy(%struct.wl_proxy* %2)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void WatchdogStallDisable(uint32_t ui32Base) {
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000418))) &= ~(0x00000100);
}


x86 assembly (clang, -O0):
<WatchdogStallDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x418,%eax
cltq
mov    (%rax),%ecx
and    $0xfffffeff,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<WatchdogStallDisable>:
movslq %edi,%rax
andl   $0xfffffeff,0x418(%rax)
fe ff ff
ret

LLVM IR (-O0):
define void @WatchdogStallDisable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1048
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, -257
store volatile i32 %8, i32* %6
ret void
}

LLVM IR (-O2):
define void @WatchdogStallDisable(i32 %0) {
%2 = add nsw i32 %0, 1048
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = and i32 %5, -257
store volatile i32 %6, i32* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ init_func(int *, int *);
void _gfks_call_init(int *width, int *height) { init_func(width, height); }


x86 assembly (clang, -O0):
<_gfks_call_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <init_func@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_gfks_call_init>:
jmp    1030 <init_func@plt>

LLVM IR (-O0):
define void @_gfks_call_init(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @init_func(i32* %5, i32* %6)
ret void
}

LLVM IR (-O2):
define void @_gfks_call_init(i32* %0, i32* %1) {
%3 = tail call i32 @init_func(i32* %0, i32* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ parser_GetChar();
int /*<<< orphan*/ parser_SkipComment();
int /*<<< orphan*/ parser_SkipWhite();
void parser_Init(void) {
  parser_GetChar();
  parser_SkipWhite();
  parser_SkipComment();
  parser_SkipWhite();
}


x86 assembly (clang, -O0):
<parser_Init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <parser_GetChar@plt>
mov    $0x0,%al
call   1050 <parser_SkipWhite@plt>
mov    $0x0,%al
call   1030 <parser_SkipComment@plt>
mov    $0x0,%al
call   1050 <parser_SkipWhite@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<parser_Init>:
push   %rax
xor    %eax,%eax
call   1040 <parser_GetChar@plt>
xor    %eax,%eax
call   1050 <parser_SkipWhite@plt>
xor    %eax,%eax
call   1030 <parser_SkipComment@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <parser_SkipWhite@plt>

LLVM IR (-O0):
define void @parser_Init() {
%1 = call i32 (...) @parser_GetChar()
%2 = call i32 (...) @parser_SkipWhite()
%3 = call i32 (...) @parser_SkipComment()
%4 = call i32 (...) @parser_SkipWhite()
ret void
}

LLVM IR (-O2):
define void @parser_Init() {
%1 = tail call i32 (...) @parser_GetChar()
%2 = tail call i32 (...) @parser_SkipWhite()
%3 = tail call i32 (...) @parser_SkipComment()
%4 = tail call i32 (...) @parser_SkipWhite()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ isASCIIHexDigit(int);
int toASCIIHexValue(int c) {
  ASSERT(isASCIIHexDigit(c));
  return c < 'A' ? c - '0' : (c - 'A' + 10) & 0xF;
}


x86 assembly (clang, -O0):
<toASCIIHexValue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <isASCIIHexDigit@plt>
mov    %eax,%edi
call   1030 <ASSERT@plt>
cmpl   $0x41,-0x4(%rbp)
jge    1152 <toASCIIHexValue+0x32>
mov    -0x4(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x8(%rbp)
jmp    1161 <toASCIIHexValue+0x41>
mov    -0x4(%rbp),%eax
sub    $0x41,%eax
add    $0xa,%eax
and    $0xf,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toASCIIHexValue>:
push   %rbx
mov    %edi,%ebx
call   1040 <isASCIIHexDigit@plt>
mov    %eax,%edi
call   1030 <ASSERT@plt>
lea    -0x30(%rbx),%ecx
lea    0x9(%rbx),%eax
and    $0xf,%eax
cmp    $0x41,%ebx
cmovl  %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @toASCIIHexValue(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @isASCIIHexDigit(i32 %3)
%5 = call i32 @ASSERT(i32 %4)
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 65
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32, i32* %2
%10 = sub nsw i32 %9, 48
br label %16
11: ; preds = %1
%12 = load i32, i32* %2
%13 = sub nsw i32 %12, 65
%14 = add nsw i32 %13, 10
%15 = and i32 %14, 15
br label %16
16: ; preds = %11, %8
%17 = phi i32 [ %10, %8 ], [ %15, %11 ]
ret i32 %17
}

LLVM IR (-O2):
define i32 @toASCIIHexValue(i32 %0) {
%2 = tail call i32 @isASCIIHexDigit(i32 %0)
%3 = tail call i32 @ASSERT(i32 %2)
%4 = icmp slt i32 %0, 65
%5 = add nsw i32 %0, -48
%6 = add i32 %0, 9
%7 = and i32 %6, 15
%8 = select i1 %4, i32 %5, i32 %7
ret i32 %8
}
/* Variables and functions */
int mult(int, int);
int fact(int n) {
  int factor, total;
  total = 1;
  factor = 2;
  while (factor <= n) {
    total = mult(factor, total);
    factor = factor + 1;
  }
  return total;
}


x86 assembly (clang, -O0):
<fact>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0xc(%rbp)
movl   $0x2,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     1151 <fact+0x41>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <mult@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1129 <fact+0x19>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fact>:
push   %r14
push   %rbx
push   %rax
mov    $0x1,%eax
cmp    $0x2,%edi
jl     114c <fact+0x3c>
mov    %edi,%r14d
neg    %r14d
mov    $0x2,%ebx
mov    $0x1,%eax
xchg   %ax,%ax
mov    %ebx,%edi
mov    %eax,%esi
call   1030 <mult@plt>
lea    (%r14,%rbx,1),%ecx
add    $0x1,%ecx
mov    %ebx,%edx
add    $0x1,%edx
mov    %edx,%ebx
cmp    $0x1,%ecx
jne    1130 <fact+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @fact(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %4
store i32 2, i32* %3
br label %5
5: ; preds = %9, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp sle i32 %6, %7
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = call i32 @mult(i32 %10, i32 %11)
store i32 %12, i32* %4
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %5
15: ; preds = %5
%16 = load i32, i32* %4
ret i32 %16
}

LLVM IR (-O2):
define i32 @fact(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 1, %1 ]
%5 = phi i32 [ %7, %3 ], [ 2, %1 ]
%6 = tail call i32 @mult(i32 %5, i32 %4)
%7 = add nuw i32 %5, 1
%8 = icmp eq i32 %5, %0
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ 1, %1 ], [ %6, %3 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ unimplemented();
void ldii_ind(void) { unimplemented(); }


x86 assembly (clang, -O0):
<ldii_ind>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <unimplemented@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ldii_ind>:
xor    %eax,%eax
jmp    1030 <unimplemented@plt>

LLVM IR (-O0):
define void @ldii_ind() {
%1 = call i32 (...) @unimplemented()
ret void
}

LLVM IR (-O2):
define void @ldii_ind() {
%1 = tail call i32 (...) @unimplemented()
ret void
}
/* Variables and functions */
int getchar();
int /*<<< orphan*/ putchar(int);
main() {
  int car = 0;
  car = getchar();
  putchar(car);
  car = getchar();
  putchar(car);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <putchar@plt>
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <putchar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <getchar@plt>
mov    %eax,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
mov    %eax,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @getchar()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @putchar(i32 %3)
%5 = call i32 (...) @getchar()
store i32 %5, i32* %1
%6 = load i32, i32* %1
%7 = call i32 @putchar(i32 %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @getchar()
%2 = tail call i32 @putchar(i32 %1)
%3 = tail call i32 (...) @getchar()
%4 = tail call i32 @putchar(i32 %3)
ret i32 0
}
float *vector(n)
int n;
{
  float *v;
  v = (float *)malloc((unsigned)n * sizeof(float));
  if (!v)
    erhand("Allocation failure in vector().");
  return v - 1;
}


x86 assembly (clang, -O0):
<vector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%edi
shl    $0x2,%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1156 <vector+0x36>
lea    0xeb1(%rip),%rdi
mov    $0x0,%al
call   1040 <erhand@plt>
mov    -0x10(%rbp),%rax
add    $0xfffffffffffffffc,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vector>:
push   %rbx
mov    %edi,%edi
shl    $0x2,%rdi
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1142 <vector+0x22>
lea    0xec5(%rip),%rdi
xor    %eax,%eax
call   1040 <erhand@plt>
add    $0xfffffffffffffffc,%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [32 x i8] c"Allocation failure in vector().\00"
define float* @vector(i32 %0) {
%2 = alloca i32
%3 = alloca float*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = zext i32 %4 to i64
%6 = mul i64 %5, 4
%7 = call i8* @malloc(i64 %6)
%8 = bitcast i8* %7 to float*
store float* %8, float** %3
%9 = load float*, float** %3
%10 = icmp ne float* %9, null
br i1 %10, label %13, label %11
11: ; preds = %1
%12 = call i32 (i8*, ...) bitcast (i32 (...)* @erhand to i32 (i8*, ...)*)(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %1
%14 = load float*, float** %3
%15 = getelementptr inbounds float, float* %14, i64 -1
ret float* %15
}

LLVM IR (-O2):
@.str = [32 x i8] c"Allocation failure in vector().\00"
define float* @vector(i32 %0) {
%2 = zext i32 %0 to i64
%3 = shl nuw nsw i64 %2, 2
%4 = tail call i8* @malloc(i64 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 (i8*, ...) bitcast (i32 (...)* @erhand to i32 (i8*, ...)*)(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
%9 = bitcast i8* %4 to float*
%10 = getelementptr inbounds float, float* %9, i64 -1
ret float* %10
}
/* Variables and functions */
int /*<<< orphan*/ cgincind(char *, char *, int);
void cgdec1iw(void) { cgincind("ax", "sub", 1); }


x86 assembly (clang, -O0):
<cgdec1iw>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee1(%rip),%rsi
mov    $0x1,%edx
call   1030 <cgincind@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgdec1iw>:
lea    0xee9(%rip),%rdi
lea    0xee5(%rip),%rsi
mov    $0x1,%edx
jmp    1030 <cgincind@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"ax\00"
@.str.1 = [4 x i8] c"sub\00"
define void @cgdec1iw() {
%1 = call i32 @cgincind(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"ax\00"
@.str.1 = [4 x i8] c"sub\00"
define void @cgdec1iw() {
%1 = tail call i32 @cgincind(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 1)
ret void
}
/* Variables and functions */
int upse_ps1_memory_init();
int upse_r3000_cpu_init();
int psxInit() {
  if (upse_ps1_memory_init() == -1)
    return -1;
  return upse_r3000_cpu_init();
}


x86 assembly (clang, -O0):
<psxInit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <upse_ps1_memory_init@plt>
cmp    $0xffffffff,%eax
jne    1144 <psxInit+0x24>
movl   $0xffffffff,-0x4(%rbp)
jmp    114e <psxInit+0x2e>
mov    $0x0,%al
call   1030 <upse_r3000_cpu_init@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psxInit>:
push   %rax
xor    %eax,%eax
call   1040 <upse_ps1_memory_init@plt>
cmp    $0xffffffff,%eax
je     1135 <psxInit+0x15>
xor    %eax,%eax
pop    %rcx
jmp    1030 <upse_r3000_cpu_init@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @psxInit() {
%1 = alloca i32
%2 = call i32 (...) @upse_ps1_memory_init()
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %5
4: ; preds = %0
store i32 -1, i32* %1
br label %7
5: ; preds = %0
%6 = call i32 (...) @upse_r3000_cpu_init()
store i32 %6, i32* %1
br label %7
7: ; preds = %5, %4
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
define i32 @psxInit() {
%1 = tail call i32 (...) @upse_ps1_memory_init()
%2 = icmp eq i32 %1, -1
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @upse_r3000_cpu_init()
br label %5
5: ; preds = %0, %3
%6 = phi i32 [ %4, %3 ], [ -1, %0 ]
ret i32 %6
}
void g_iconv() {}


x86 assembly (clang, -O0):
<g_iconv>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_iconv>:
ret

LLVM IR (-O0):
define void @g_iconv() {
ret void
}

LLVM IR (-O2):
define void @g_iconv() {
ret void
}
void printCpuVendorID() {
  char ebx[4];
  char edx[4];
  char ecx[4];
  asm("movl	$0,	%%eax\n"
      "CPUID\n"
      "movl   %%ebx,  %[ebx]\n"
      "movl	%%edx,	%[edx]\n"
      "movl	%%ecx,	%[ecx]\n"
      : [ebx] "=m"(ebx), [edx] "=m"(edx), [ecx] "=m"(ecx)
      :
      : "%eax", "%ebx", "%edx", "%ecx");
  printf("%s\n", ebx);
}


x86 assembly (clang, -O0):
<printCpuVendorID>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
sub    $0x18,%rsp
mov    $0x0,%eax
cpuid
mov    %ebx,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
lea    -0xc(%rbp),%rsi
lea    0xecc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x18,%rsp
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<printCpuVendorID>:
push   %rbx
sub    $0x10,%rsp
mov    $0x0,%eax
cpuid
mov    %ebx,0x4(%rsp)
mov    %edx,0xc(%rsp)
mov    %ecx,0x8(%rsp)
lea    0x4(%rsp),%rdi
call   1030 <puts@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @printCpuVendorID() {
%1 = alloca [4 x i8]
%2 = alloca [4 x i8]
%3 = alloca [4 x i8]
%4 = getelementptr inbounds [4 x i8], [4 x i8]* %1, i64 0, i64 0
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
define void @printCpuVendorID() {
%1 = alloca [4 x i8]
%2 = alloca [4 x i8]
%3 = alloca [4 x i8]
%4 = getelementptr inbounds [4 x i8], [4 x i8]* %1, i64 0, i64 0
%5 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%6 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%7 = call i32 @puts(i8* %4)
ret void
}
int display(void) {
  printf("%s, %s, %d\n",
         "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
         "2022-01-22/02-19-57/repos/sczzq/symmetrical-spoon/refs/heads/master/"
         "base-usage/make_study/display.c",
         __func__, 13);
}


x86 assembly (clang, -O0):
<display>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
lea    0xee6(%rip),%rsi
lea    0xf83(%rip),%rdx
mov    $0xd,%ecx
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<display>:
lea    0xee9(%rip),%rdi
lea    0xeee(%rip),%rsi
lea    0xf8b(%rip),%rdx
mov    $0xd,%ecx
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"%s, %s, %d\0A\00"
@.str.1 = [164 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/sczzq/symmetrical-spoon/refs/heads/master/base-usage/make_study/display.c\00"
@__func__.display = [8 x i8] c"display\00"
define i32 @display() {
%1 = alloca i32
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([164 x i8], [164 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @__func__.display, i64 0, i64 0), i32 13)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [12 x i8] c"%s, %s, %d\0A\00"
@.str.1 = [164 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/sczzq/symmetrical-spoon/refs/heads/master/base-usage/make_study/display.c\00"
@__func__.display = [8 x i8] c"display\00"
define i32 @display() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([164 x i8], [164 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @__func__.display, i64 0, i64 0), i32 13)
ret i32 undef
}
void pcp_def_net_icmp6_metrics(void) {}


x86 assembly (clang, -O0):
<pcp_def_net_icmp6_metrics>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcp_def_net_icmp6_metrics>:
ret

LLVM IR (-O0):
define void @pcp_def_net_icmp6_metrics() {
ret void
}

LLVM IR (-O2):
define void @pcp_def_net_icmp6_metrics() {
ret void
}
/* Type definitions */
struct sockaddr {
  int dummy;
};
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
int __wrap_bind(int sockfd, const struct sockaddr *addr, socklen_t addrlen) {
  return 0;
}


x86 assembly (clang, -O0):
<__wrap_bind>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__wrap_bind>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
define i32 @__wrap_bind(i32 %0, %struct.sockaddr* %1, i32 %2) {
%4 = alloca i32
%5 = alloca %struct.sockaddr*
%6 = alloca i32
store i32 %0, i32* %4
store %struct.sockaddr* %1, %struct.sockaddr** %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
define i32 @__wrap_bind(i32 %0, %struct.sockaddr* nocapture readnone %1, i32 %2) {
ret i32 0
}
/* Type definitions */
struct NameValueParserData {
  int dummy;
};

/* Variables and functions */
char *GetValueFromNameValueListWithResumeSupport(struct NameValueParserData *,
                                                 char const *,
                                                 int /*<<< orphan*/ *);
char *GetValueFromNameValueList(struct NameValueParserData *pdata,
                                const char *Name) {
  return GetValueFromNameValueListWithResumeSupport(pdata, Name, NULL);
}


x86 assembly (clang, -O0):
<GetValueFromNameValueList>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <GetValueFromNameValueListWithResumeSupport@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetValueFromNameValueList>:
xor    %edx,%edx
jmp    1030 <GetValueFromNameValueListWithResumeSupport@plt>

LLVM IR (-O0):
%struct.NameValueParserData = type { i32 }
define i8* @GetValueFromNameValueList(%struct.NameValueParserData* %0, i8* %1) {
%3 = alloca %struct.NameValueParserData*
%4 = alloca i8*
store %struct.NameValueParserData* %0, %struct.NameValueParserData** %3
store i8* %1, i8** %4
%5 = load %struct.NameValueParserData*, %struct.NameValueParserData** %3
%6 = load i8*, i8** %4
%7 = call i8* @GetValueFromNameValueListWithResumeSupport(%struct.NameValueParserData* %5, i8* %6, i32* null)
ret i8* %7
}

LLVM IR (-O2):
%struct.NameValueParserData = type { i32 }
define i8* @GetValueFromNameValueList(%struct.NameValueParserData* %0, i8* %1) {
%3 = tail call i8* @GetValueFromNameValueListWithResumeSupport(%struct.NameValueParserData* %0, i8* %1, i32* null)
ret i8* %3
}
/* Variables and functions */
int INT_MIN;
int atoi(char *);
int AtoiMI(char *string) {
  if (string != NULL && *string != '\0') {
    return (atoi(string));
  }
  return (INT_MIN);
}


x86 assembly (clang, -O0):
<AtoiMI>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1148 <AtoiMI+0x38>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1148 <AtoiMI+0x38>
mov    -0x10(%rbp),%rdi
call   1030 <atoi@plt>
mov    %eax,-0x4(%rbp)
jmp    1154 <AtoiMI+0x44>
mov    0x2e99(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AtoiMI>:
test   %rdi,%rdi
je     111f <AtoiMI+0xf>
cmpb   $0x0,(%rdi)
je     111f <AtoiMI+0xf>
jmp    1030 <atoi@plt>
mov    0x2ec2(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@INT_MIN = global i32 0
define i32 @AtoiMI(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %6
%12 = load i8*, i8** %3
%13 = call i32 @atoi(i8* %12)
store i32 %13, i32* %2
br label %16
14: ; preds = %6, %1
%15 = load i32, i32* @INT_MIN
store i32 %15, i32* %2
br label %16
16: ; preds = %14, %11
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
@INT_MIN = global i32 0
define i32 @AtoiMI(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @atoi(i8* %0)
br label %10
8: ; preds = %3, %1
%9 = load i32, i32* @INT_MIN
br label %10
10: ; preds = %8, %6
%11 = phi i32 [ %7, %6 ], [ %9, %8 ]
ret i32 %11
}
/* Variables and functions */
char *find_and_terminate(char *, char);
char *find_query(char *str) { return find_and_terminate(str, '?'); }


x86 assembly (clang, -O0):
<find_query>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x3f,%esi
call   1030 <find_and_terminate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_query>:
mov    $0x3f,%esi
jmp    1030 <find_and_terminate@plt>

LLVM IR (-O0):
define i8* @find_query(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @find_and_terminate(i8* %3, i8 signext 63)
ret i8* %4
}

LLVM IR (-O2):
define i8* @find_query(i8* %0) {
%2 = tail call i8* @find_and_terminate(i8* %0, i8 signext 63)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ error(int);
_goto_err() { error(3); }


x86 assembly (clang, -O0):
<_goto_err>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x3,%edi
call   1030 <error@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_goto_err>:
mov    $0x3,%edi
jmp    1030 <error@plt>

LLVM IR (-O0):
define i32 @_goto_err() {
%1 = alloca i32
%2 = call i32 @error(i32 3)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @_goto_err() {
%1 = tail call i32 @error(i32 3)
ret i32 undef
}
int query_format(unsigned int format) {
  unsigned int i;
  int flag = 0x1 | 0x2 | 0x10 | 0x20 | 0x4 | 0x400;
  if (format == 0x32315659)
    return flag;
  if ((((format)&0xFFFF0000) == 0x1DC70000))
    return flag;
  return 0;
}


x86 assembly (clang, -O0):
<query_format>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x437,-0x10(%rbp)
cmpl   $0x32315659,-0x8(%rbp)
jne    1126 <query_format+0x26>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114b <query_format+0x4b>
mov    -0x8(%rbp),%eax
and    $0xffff0000,%eax
cmp    $0x1dc70000,%eax
jne    1144 <query_format+0x44>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114b <query_format+0x4b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<query_format>:
mov    %edi,%ecx
and    $0xffff0000,%ecx
xor    %eax,%eax
cmp    $0x1dc70000,%ecx
mov    $0x437,%ecx
cmove  %ecx,%eax
cmp    $0x32315659,%edi
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @query_format(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 1079, i32* %5
%6 = load i32, i32* %3
%7 = icmp eq i32 %6, 842094169
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i32, i32* %5
store i32 %9, i32* %2
br label %17
10: ; preds = %1
%11 = load i32, i32* %3
%12 = and i32 %11, -65536
%13 = icmp eq i32 %12, 499580928
br i1 %13, label %14, label %16
14: ; preds = %10
%15 = load i32, i32* %5
store i32 %15, i32* %2
br label %17
16: ; preds = %10
store i32 0, i32* %2
br label %17
17: ; preds = %16, %14, %8
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @query_format(i32 %0) {
%2 = icmp eq i32 %0, 842094169
%3 = and i32 %0, -65536
%4 = icmp eq i32 %3, 499580928
%5 = or i1 %2, %4
%6 = select i1 %5, i32 1079, i32 0
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ addbyte(int);
void MMX_ADDSW(int dst_reg, int src_reg) {
  addbyte(0x66);
  addbyte(0x0f);
  addbyte(0xed);
  addbyte(0xc0 | (dst_reg << 3) | src_reg);
}


x86 assembly (clang, -O0):
<MMX_ADDSW>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x66,%edi
call   1030 <addbyte@plt>
mov    $0xf,%edi
call   1030 <addbyte@plt>
mov    $0xed,%edi
call   1030 <addbyte@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     $0xc0,%edi
or     -0x8(%rbp),%edi
call   1030 <addbyte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MMX_ADDSW>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x66,%edi
call   1030 <addbyte@plt>
mov    $0xf,%edi
call   1030 <addbyte@plt>
mov    $0xed,%edi
call   1030 <addbyte@plt>
shl    $0x3,%ebp
or     %ebx,%ebp
or     $0xc0,%ebp
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <addbyte@plt>

LLVM IR (-O0):
define void @MMX_ADDSW(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @addbyte(i32 102)
%6 = call i32 @addbyte(i32 15)
%7 = call i32 @addbyte(i32 237)
%8 = load i32, i32* %3
%9 = shl i32 %8, 3
%10 = or i32 192, %9
%11 = load i32, i32* %4
%12 = or i32 %10, %11
%13 = call i32 @addbyte(i32 %12)
ret void
}

LLVM IR (-O2):
define void @MMX_ADDSW(i32 %0, i32 %1) {
%3 = tail call i32 @addbyte(i32 102)
%4 = tail call i32 @addbyte(i32 15)
%5 = tail call i32 @addbyte(i32 237)
%6 = shl i32 %0, 3
%7 = or i32 %6, %1
%8 = or i32 %7, 192
%9 = tail call i32 @addbyte(i32 %8)
ret void
}