unsigned char GetI2CRegClient(unsigned long MMIOBase,
                              unsigned char DeviceSelect,
                              unsigned char DeviceAddress,
                              unsigned char RegisterIndex) {
  unsigned char Data;
  unsigned long Status;
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x00)) = (unsigned long)(0);
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x04)) =
      (unsigned long)(0x77743355);
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x08)) = (unsigned long)(0);
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x10)) =
      (unsigned long)(0xFFFFFFFF);
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x00)) = (unsigned long)(1);
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x0C)) = (unsigned long)(0xAF);
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x20)) =
      (unsigned long)(DeviceAddress);
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x14)) = (unsigned long)(0x3);
  do {
    Status = *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                                         (unsigned long)(0xA000 +
                                                         DeviceSelect * 0x40 +
                                                         0x10)) &
             0x03;
  } while (Status != 1);
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x10)) =
      (unsigned long)(0xFFFFFFFF);
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x20)) =
      (unsigned long)(RegisterIndex);
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x14)) = (unsigned long)(0x2);
  do {
    Status = *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                                         (unsigned long)(0xA000 +
                                                         DeviceSelect * 0x40 +
                                                         0x10)) &
             0x03;
  } while (Status != 1);
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x10)) =
      (unsigned long)(0xFFFFFFFF);
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x20)) =
      (unsigned long)(DeviceAddress + 1);
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x14)) = (unsigned long)(0x1B);
  do {
    Status = (*(volatile unsigned long *)((unsigned long)(0x1E780000) +
                                          (unsigned long)(0xA000 +
                                                          DeviceSelect * 0x40 +
                                                          0x10)) &
              0x04) >>
             2;
  } while (Status != 1);
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x10)) =
      (unsigned long)(0xFFFFFFFF);
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x0C)) =
      (((*(volatile unsigned long *)((unsigned long)(0x1E780000) +
                                     (unsigned long)(0xA000 +
                                                     DeviceSelect * 0x40 +
                                                     0x0C))) &
        (~0x10)) |
       (unsigned long)((0x10) & (0x10)));
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x14)) = (unsigned long)(0x20);
  do {
    Status = (*(volatile unsigned long *)((unsigned long)(0x1E780000) +
                                          (unsigned long)(0xA000 +
                                                          DeviceSelect * 0x40 +
                                                          0x10)) &
              0x10) >>
             4;
  } while (Status != 1);
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x0C)) = (unsigned long)(0x10);
  *(volatile unsigned long *)((unsigned long)(0x1E780000) +
                              (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                              0x10)) =
      (unsigned long)(0xFFFFFFFF);
  Data =
      (unsigned char)((*(volatile unsigned long
                             *)((unsigned long)(0x1E780000) +
                                (unsigned long)(0xA000 + DeviceSelect * 0x40 +
                                                0x20)) &
                       0xFF00) >>
                      8);
  return Data;
}


x86 assembly (clang, -O0):
<GetI2CRegClient>:
push   %rbp
mov    %rsp,%rbp
mov    %cl,%al
mov    %dl,%cl
mov    %sil,%dl
mov    %rdi,-0x8(%rbp)
mov    %dl,-0x9(%rbp)
mov    %cl,-0xa(%rbp)
mov    %al,-0xb(%rbp)
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x0,%eax
cltq
add    $0x1e780000,%rax
movq   $0x0,(%rax)
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x4,%eax
cltq
add    $0x1e780000,%rax
movq   $0x77743355,(%rax)
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x8,%eax
cltq
add    $0x1e780000,%rax
movq   $0x0,(%rax)
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x10,%eax
cltq
add    $0x1e780000,%rax
mov    $0xffffffff,%ecx
mov    %rcx,(%rax)
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x0,%eax
cltq
add    $0x1e780000,%rax
movq   $0x1,(%rax)
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0xc,%eax
cltq
add    $0x1e780000,%rax
movq   $0xaf,(%rax)
movzbl -0xa(%rbp),%eax
mov    %eax,%ecx
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x20,%eax
cltq
add    $0x1e780000,%rax
mov    %rcx,(%rax)
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x14,%eax
cltq
add    $0x1e780000,%rax
movq   $0x3,(%rax)
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x10,%eax
cltq
add    $0x1e780000,%rax
mov    (%rax),%rax
and    $0x3,%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x1,-0x18(%rbp)
jne    120b <GetI2CRegClient+0x10b>
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x10,%eax
cltq
add    $0x1e780000,%rax
mov    $0xffffffff,%ecx
mov    %rcx,(%rax)
movzbl -0xb(%rbp),%eax
mov    %eax,%ecx
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x20,%eax
cltq
add    $0x1e780000,%rax
mov    %rcx,(%rax)
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x14,%eax
cltq
add    $0x1e780000,%rax
movq   $0x2,(%rax)
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x10,%eax
cltq
add    $0x1e780000,%rax
mov    (%rax),%rax
and    $0x3,%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x1,-0x18(%rbp)
jne    1295 <GetI2CRegClient+0x195>
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x10,%eax
cltq
add    $0x1e780000,%rax
mov    $0xffffffff,%ecx
mov    %rcx,(%rax)
movzbl -0xa(%rbp),%eax
add    $0x1,%eax
movslq %eax,%rcx
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x20,%eax
cltq
add    $0x1e780000,%rax
mov    %rcx,(%rax)
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x14,%eax
cltq
add    $0x1e780000,%rax
movq   $0x1b,(%rax)
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x10,%eax
cltq
add    $0x1e780000,%rax
mov    (%rax),%rax
and    $0x4,%rax
shr    $0x2,%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x1,-0x18(%rbp)
jne    1323 <GetI2CRegClient+0x223>
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x10,%eax
cltq
add    $0x1e780000,%rax
mov    $0xffffffff,%ecx
mov    %rcx,(%rax)
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0xc,%eax
cltq
add    $0x1e780000,%rax
mov    (%rax),%rcx
and    $0xffffffffffffffef,%rcx
or     $0x10,%rcx
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0xc,%eax
cltq
add    $0x1e780000,%rax
mov    %rcx,(%rax)
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x14,%eax
cltq
add    $0x1e780000,%rax
movq   $0x20,(%rax)
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x10,%eax
cltq
add    $0x1e780000,%rax
mov    (%rax),%rax
and    $0x10,%rax
shr    $0x4,%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x1,-0x18(%rbp)
jne    13cd <GetI2CRegClient+0x2cd>
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0xc,%eax
cltq
add    $0x1e780000,%rax
movq   $0x10,(%rax)
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x10,%eax
cltq
add    $0x1e780000,%rax
mov    $0xffffffff,%ecx
mov    %rcx,(%rax)
movzbl -0x9(%rbp),%eax
shl    $0x6,%eax
add    $0xa000,%eax
add    $0x20,%eax
cltq
add    $0x1e780000,%rax
mov    (%rax),%rax
and    $0xff00,%rax
shr    $0x8,%rax
mov    %al,-0xc(%rbp)
movzbl -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetI2CRegClient>:
mov    $0xffffffff,%eax
mov    %esi,%esi
shl    $0x6,%rsi
movq   $0x0,0x1e78a000(%rsi)
movq   $0x77743355,0x1e78a004(%rsi)
55 33 74 77
movq   $0x0,0x1e78a008(%rsi)
mov    %rax,0x1e78a010(%rsi)
movq   $0x1,0x1e78a000(%rsi)
movq   $0xaf,0x1e78a00c(%rsi)
mov    %edx,%edx
mov    %rdx,0x1e78a020(%rsi)
movq   $0x3,0x1e78a014(%rsi)
nopl   (%rax)
mov    0x1e78a010(%rsi),%rdi
and    $0x3,%edi
cmp    $0x1,%edi
jne    1160 <GetI2CRegClient+0x60>
mov    %rax,0x1e78a010(%rsi)
movzbl %cl,%ecx
mov    %rcx,0x1e78a020(%rsi)
movq   $0x2,0x1e78a014(%rsi)
nopl   0x0(%rax,%rax,1)
mov    0x1e78a010(%rsi),%rcx
and    $0x3,%ecx
cmp    $0x1,%ecx
jne    1190 <GetI2CRegClient+0x90>
mov    %rax,0x1e78a010(%rsi)
add    $0x1,%rdx
mov    %rdx,0x1e78a020(%rsi)
movq   $0x1b,0x1e78a014(%rsi)
nopl   0x0(%rax)
testq  $0x4,0x1e78a010(%rsi)
je     11c0 <GetI2CRegClient+0xc0>
mov    %rax,0x1e78a010(%rsi)
orq    $0x10,0x1e78a00c(%rsi)
10
movq   $0x20,0x1e78a014(%rsi)
nopw   0x0(%rax,%rax,1)
testq  $0x10,0x1e78a010(%rsi)
je     11f0 <GetI2CRegClient+0xf0>
movq   $0x10,0x1e78a00c(%rsi)
mov    %rax,0x1e78a010(%rsi)
mov    0x1e78a020(%rsi),%rax
shr    $0x8,%rax
ret

LLVM IR (-O0):
define zeroext i8 @GetI2CRegClient(i64 %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = alloca i64
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
%10 = alloca i64
store i64 %0, i64* %5
store i8 %1, i8* %6
store i8 %2, i8* %7
store i8 %3, i8* %8
%11 = load i8, i8* %6
%12 = zext i8 %11 to i32
%13 = mul nsw i32 %12, 64
%14 = add nsw i32 40960, %13
%15 = add nsw i32 %14, 0
%16 = sext i32 %15 to i64
%17 = add i64 511180800, %16
%18 = inttoptr i64 %17 to i64*
store volatile i64 0, i64* %18
%19 = load i8, i8* %6
%20 = zext i8 %19 to i32
%21 = mul nsw i32 %20, 64
%22 = add nsw i32 40960, %21
%23 = add nsw i32 %22, 4
%24 = sext i32 %23 to i64
%25 = add i64 511180800, %24
%26 = inttoptr i64 %25 to i64*
store volatile i64 2004104021, i64* %26
%27 = load i8, i8* %6
%28 = zext i8 %27 to i32
%29 = mul nsw i32 %28, 64
%30 = add nsw i32 40960, %29
%31 = add nsw i32 %30, 8
%32 = sext i32 %31 to i64
%33 = add i64 511180800, %32
%34 = inttoptr i64 %33 to i64*
store volatile i64 0, i64* %34
%35 = load i8, i8* %6
%36 = zext i8 %35 to i32
%37 = mul nsw i32 %36, 64
%38 = add nsw i32 40960, %37
%39 = add nsw i32 %38, 16
%40 = sext i32 %39 to i64
%41 = add i64 511180800, %40
%42 = inttoptr i64 %41 to i64*
store volatile i64 4294967295, i64* %42
%43 = load i8, i8* %6
%44 = zext i8 %43 to i32
%45 = mul nsw i32 %44, 64
%46 = add nsw i32 40960, %45
%47 = add nsw i32 %46, 0
%48 = sext i32 %47 to i64
%49 = add i64 511180800, %48
%50 = inttoptr i64 %49 to i64*
store volatile i64 1, i64* %50
%51 = load i8, i8* %6
%52 = zext i8 %51 to i32
%53 = mul nsw i32 %52, 64
%54 = add nsw i32 40960, %53
%55 = add nsw i32 %54, 12
%56 = sext i32 %55 to i64
%57 = add i64 511180800, %56
%58 = inttoptr i64 %57 to i64*
store volatile i64 175, i64* %58
%59 = load i8, i8* %7
%60 = zext i8 %59 to i64
%61 = load i8, i8* %6
%62 = zext i8 %61 to i32
%63 = mul nsw i32 %62, 64
%64 = add nsw i32 40960, %63
%65 = add nsw i32 %64, 32
%66 = sext i32 %65 to i64
%67 = add i64 511180800, %66
%68 = inttoptr i64 %67 to i64*
store volatile i64 %60, i64* %68
%69 = load i8, i8* %6
%70 = zext i8 %69 to i32
%71 = mul nsw i32 %70, 64
%72 = add nsw i32 40960, %71
%73 = add nsw i32 %72, 20
%74 = sext i32 %73 to i64
%75 = add i64 511180800, %74
%76 = inttoptr i64 %75 to i64*
store volatile i64 3, i64* %76
br label %77
77: ; preds = %88, %4
%78 = load i8, i8* %6
%79 = zext i8 %78 to i32
%80 = mul nsw i32 %79, 64
%81 = add nsw i32 40960, %80
%82 = add nsw i32 %81, 16
%83 = sext i32 %82 to i64
%84 = add i64 511180800, %83
%85 = inttoptr i64 %84 to i64*
%86 = load volatile i64, i64* %85
%87 = and i64 %86, 3
store i64 %87, i64* %10
br label %88
88: ; preds = %77
%89 = load i64, i64* %10
%90 = icmp ne i64 %89, 1
br i1 %90, label %77, label %91
91: ; preds = %88
%92 = load i8, i8* %6
%93 = zext i8 %92 to i32
%94 = mul nsw i32 %93, 64
%95 = add nsw i32 40960, %94
%96 = add nsw i32 %95, 16
%97 = sext i32 %96 to i64
%98 = add i64 511180800, %97
%99 = inttoptr i64 %98 to i64*
store volatile i64 4294967295, i64* %99
%100 = load i8, i8* %8
%101 = zext i8 %100 to i64
%102 = load i8, i8* %6
%103 = zext i8 %102 to i32
%104 = mul nsw i32 %103, 64
%105 = add nsw i32 40960, %104
%106 = add nsw i32 %105, 32
%107 = sext i32 %106 to i64
%108 = add i64 511180800, %107
%109 = inttoptr i64 %108 to i64*
store volatile i64 %101, i64* %109
%110 = load i8, i8* %6
%111 = zext i8 %110 to i32
%112 = mul nsw i32 %111, 64
%113 = add nsw i32 40960, %112
%114 = add nsw i32 %113, 20
%115 = sext i32 %114 to i64
%116 = add i64 511180800, %115
%117 = inttoptr i64 %116 to i64*
store volatile i64 2, i64* %117
br label %118
118: ; preds = %129, %91
%119 = load i8, i8* %6
%120 = zext i8 %119 to i32
%121 = mul nsw i32 %120, 64
%122 = add nsw i32 40960, %121
%123 = add nsw i32 %122, 16
%124 = sext i32 %123 to i64
%125 = add i64 511180800, %124
%126 = inttoptr i64 %125 to i64*
%127 = load volatile i64, i64* %126
%128 = and i64 %127, 3
store i64 %128, i64* %10
br label %129
129: ; preds = %118
%130 = load i64, i64* %10
%131 = icmp ne i64 %130, 1
br i1 %131, label %118, label %132
132: ; preds = %129
%133 = load i8, i8* %6
%134 = zext i8 %133 to i32
%135 = mul nsw i32 %134, 64
%136 = add nsw i32 40960, %135
%137 = add nsw i32 %136, 16
%138 = sext i32 %137 to i64
%139 = add i64 511180800, %138
%140 = inttoptr i64 %139 to i64*
store volatile i64 4294967295, i64* %140
%141 = load i8, i8* %7
%142 = zext i8 %141 to i32
%143 = add nsw i32 %142, 1
%144 = sext i32 %143 to i64
%145 = load i8, i8* %6
%146 = zext i8 %145 to i32
%147 = mul nsw i32 %146, 64
%148 = add nsw i32 40960, %147
%149 = add nsw i32 %148, 32
%150 = sext i32 %149 to i64
%151 = add i64 511180800, %150
%152 = inttoptr i64 %151 to i64*
store volatile i64 %144, i64* %152
%153 = load i8, i8* %6
%154 = zext i8 %153 to i32
%155 = mul nsw i32 %154, 64
%156 = add nsw i32 40960, %155
%157 = add nsw i32 %156, 20
%158 = sext i32 %157 to i64
%159 = add i64 511180800, %158
%160 = inttoptr i64 %159 to i64*
store volatile i64 27, i64* %160
br label %161
161: ; preds = %173, %132
%162 = load i8, i8* %6
%163 = zext i8 %162 to i32
%164 = mul nsw i32 %163, 64
%165 = add nsw i32 40960, %164
%166 = add nsw i32 %165, 16
%167 = sext i32 %166 to i64
%168 = add i64 511180800, %167
%169 = inttoptr i64 %168 to i64*
%170 = load volatile i64, i64* %169
%171 = and i64 %170, 4
%172 = lshr i64 %171, 2
store i64 %172, i64* %10
br label %173
173: ; preds = %161
%174 = load i64, i64* %10
%175 = icmp ne i64 %174, 1
br i1 %175, label %161, label %176
176: ; preds = %173
%177 = load i8, i8* %6
%178 = zext i8 %177 to i32
%179 = mul nsw i32 %178, 64
%180 = add nsw i32 40960, %179
%181 = add nsw i32 %180, 16
%182 = sext i32 %181 to i64
%183 = add i64 511180800, %182
%184 = inttoptr i64 %183 to i64*
store volatile i64 4294967295, i64* %184
%185 = load i8, i8* %6
%186 = zext i8 %185 to i32
%187 = mul nsw i32 %186, 64
%188 = add nsw i32 40960, %187
%189 = add nsw i32 %188, 12
%190 = sext i32 %189 to i64
%191 = add i64 511180800, %190
%192 = inttoptr i64 %191 to i64*
%193 = load volatile i64, i64* %192
%194 = and i64 %193, -17
%195 = or i64 %194, 16
%196 = load i8, i8* %6
%197 = zext i8 %196 to i32
%198 = mul nsw i32 %197, 64
%199 = add nsw i32 40960, %198
%200 = add nsw i32 %199, 12
%201 = sext i32 %200 to i64
%202 = add i64 511180800, %201
%203 = inttoptr i64 %202 to i64*
store volatile i64 %195, i64* %203
%204 = load i8, i8* %6
%205 = zext i8 %204 to i32
%206 = mul nsw i32 %205, 64
%207 = add nsw i32 40960, %206
%208 = add nsw i32 %207, 20
%209 = sext i32 %208 to i64
%210 = add i64 511180800, %209
%211 = inttoptr i64 %210 to i64*
store volatile i64 32, i64* %211
br label %212
212: ; preds = %224, %176
%213 = load i8, i8* %6
%214 = zext i8 %213 to i32
%215 = mul nsw i32 %214, 64
%216 = add nsw i32 40960, %215
%217 = add nsw i32 %216, 16
%218 = sext i32 %217 to i64
%219 = add i64 511180800, %218
%220 = inttoptr i64 %219 to i64*
%221 = load volatile i64, i64* %220
%222 = and i64 %221, 16
%223 = lshr i64 %222, 4
store i64 %223, i64* %10
br label %224
224: ; preds = %212
%225 = load i64, i64* %10
%226 = icmp ne i64 %225, 1
br i1 %226, label %212, label %227
227: ; preds = %224
%228 = load i8, i8* %6
%229 = zext i8 %228 to i32
%230 = mul nsw i32 %229, 64
%231 = add nsw i32 40960, %230
%232 = add nsw i32 %231, 12
%233 = sext i32 %232 to i64
%234 = add i64 511180800, %233
%235 = inttoptr i64 %234 to i64*
store volatile i64 16, i64* %235
%236 = load i8, i8* %6
%237 = zext i8 %236 to i32
%238 = mul nsw i32 %237, 64
%239 = add nsw i32 40960, %238
%240 = add nsw i32 %239, 16
%241 = sext i32 %240 to i64
%242 = add i64 511180800, %241
%243 = inttoptr i64 %242 to i64*
store volatile i64 4294967295, i64* %243
%244 = load i8, i8* %6
%245 = zext i8 %244 to i32
%246 = mul nsw i32 %245, 64
%247 = add nsw i32 40960, %246
%248 = add nsw i32 %247, 32
%249 = sext i32 %248 to i64
%250 = add i64 511180800, %249
%251 = inttoptr i64 %250 to i64*
%252 = load volatile i64, i64* %251
%253 = and i64 %252, 65280
%254 = lshr i64 %253, 8
%255 = trunc i64 %254 to i8
store i8 %255, i8* %9
%256 = load i8, i8* %9
ret i8 %256
}

LLVM IR (-O2):
define zeroext i8 @GetI2CRegClient(i64 %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = zext i8 %1 to i32
%6 = shl nuw nsw i32 %5, 6
%7 = add nuw nsw i32 %6, 511221760
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i64*
store volatile i64 0, i64* %9
%10 = add nuw nsw i32 %6, 511221764
%11 = zext i32 %10 to i64
%12 = inttoptr i64 %11 to i64*
store volatile i64 2004104021, i64* %12
%13 = add nuw nsw i32 %6, 511221768
%14 = zext i32 %13 to i64
%15 = inttoptr i64 %14 to i64*
store volatile i64 0, i64* %15
%16 = add nuw nsw i32 %6, 511221776
%17 = zext i32 %16 to i64
%18 = inttoptr i64 %17 to i64*
store volatile i64 4294967295, i64* %18
store volatile i64 1, i64* %9
%19 = add nuw nsw i32 %6, 511221772
%20 = zext i32 %19 to i64
%21 = inttoptr i64 %20 to i64*
store volatile i64 175, i64* %21
%22 = zext i8 %2 to i64
%23 = add nuw nsw i32 %6, 511221792
%24 = zext i32 %23 to i64
%25 = inttoptr i64 %24 to i64*
store volatile i64 %22, i64* %25
%26 = add nuw nsw i32 %6, 511221780
%27 = zext i32 %26 to i64
%28 = inttoptr i64 %27 to i64*
store volatile i64 3, i64* %28
br label %29
29: ; preds = %29, %4
%30 = load volatile i64, i64* %18
%31 = and i64 %30, 3
%32 = icmp eq i64 %31, 1
br i1 %32, label %33, label %29
33: ; preds = %29
store volatile i64 4294967295, i64* %18
%34 = zext i8 %3 to i64
store volatile i64 %34, i64* %25
store volatile i64 2, i64* %28
br label %35
35: ; preds = %35, %33
%36 = load volatile i64, i64* %18
%37 = and i64 %36, 3
%38 = icmp eq i64 %37, 1
br i1 %38, label %39, label %35
39: ; preds = %35
store volatile i64 4294967295, i64* %18
%40 = add nuw nsw i64 %22, 1
store volatile i64 %40, i64* %25
store volatile i64 27, i64* %28
br label %41
41: ; preds = %41, %39
%42 = load volatile i64, i64* %18
%43 = and i64 %42, 4
%44 = icmp eq i64 %43, 0
br i1 %44, label %41, label %45
45: ; preds = %41
store volatile i64 4294967295, i64* %18
%46 = load volatile i64, i64* %21
%47 = or i64 %46, 16
store volatile i64 %47, i64* %21
store volatile i64 32, i64* %28
br label %48
48: ; preds = %48, %45
%49 = load volatile i64, i64* %18
%50 = and i64 %49, 16
%51 = icmp eq i64 %50, 0
br i1 %51, label %48, label %52
52: ; preds = %48
store volatile i64 16, i64* %21
store volatile i64 4294967295, i64* %18
%53 = load volatile i64, i64* %25
%54 = lshr i64 %53, 8
%55 = trunc i64 %54 to i8
ret i8 %55
}