#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef unsigned char uint8_t;
typedef int uint32_t;
typedef unsigned short uint16_t;

/* Variables and functions */
int /*<<< orphan*/ NOROM_CPUcpsid();
int /*<<< orphan*/ NOROM_CPUcpsie();
void AuxAdiDdiSafeWrite(uint32_t nAddr, uint32_t nData, uint32_t nSize) {
  bool bIrqEnabled = !NOROM_CPUcpsid();
  while (!(*((volatile unsigned long *)(0x400C8000 + 0x00000000))))
    ;
  switch (nSize) {
  case 1:
    (*((volatile unsigned char *)(nAddr))) = (uint8_t)nData;
    break;
  case 2:
    (*((volatile unsigned short *)(nAddr))) = (uint16_t)nData;
    break;
  case 4:
  default:
    (*((volatile unsigned long *)(nAddr))) = nData;
    break;
  }
  (*((volatile unsigned long *)(0x400C8000 + 0x00000000))) = 1;
  if (bIrqEnabled) {
    NOROM_CPUcpsie();
  }
}


x86 assembly (clang, -O0):
<AuxAdiDdiSafeWrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    $0x0,%al
call   1040 <NOROM_CPUcpsid@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x10(%rbp)
mov    $0x400c8000,%eax
mov    (%rax),%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1166 <AuxAdiDdiSafeWrite+0x46>
jmp    116b <AuxAdiDdiSafeWrite+0x4b>
jmp    1148 <AuxAdiDdiSafeWrite+0x28>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
sub    $0x1,%eax
je     11a1 <AuxAdiDdiSafeWrite+0x81>
jmp    117f <AuxAdiDdiSafeWrite+0x5f>
mov    -0x14(%rbp),%eax
sub    $0x2,%eax
je     11b1 <AuxAdiDdiSafeWrite+0x91>
jmp    1190 <AuxAdiDdiSafeWrite+0x70>
mov    -0x14(%rbp),%eax
sub    $0x4,%eax
je     11c3 <AuxAdiDdiSafeWrite+0xa3>
jmp    11c8 <AuxAdiDdiSafeWrite+0xa8>
mov    -0x8(%rbp),%eax
mov    %al,%cl
movslq -0x4(%rbp),%rax
mov    %cl,(%rax)
jmp    11d3 <AuxAdiDdiSafeWrite+0xb3>
mov    -0x8(%rbp),%eax
mov    %ax,%cx
movslq -0x4(%rbp),%rax
mov    %cx,(%rax)
jmp    11d3 <AuxAdiDdiSafeWrite+0xb3>
jmp    11c8 <AuxAdiDdiSafeWrite+0xa8>
movslq -0x8(%rbp),%rcx
movslq -0x4(%rbp),%rax
mov    %rcx,(%rax)
mov    $0x400c8000,%eax
movq   $0x1,(%rax)
cmpl   $0x0,-0x10(%rbp)
je     11f0 <AuxAdiDdiSafeWrite+0xd0>
mov    $0x0,%al
call   1030 <NOROM_CPUcpsie@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AuxAdiDdiSafeWrite>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%ebx
mov    %esi,%r14d
mov    %edi,%ebp
xor    %eax,%eax
call   1040 <NOROM_CPUcpsid@plt>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
cmpq   $0x0,0x400c8000
je     1140 <AuxAdiDdiSafeWrite+0x20>
cmp    $0x2,%ebx
je     115d <AuxAdiDdiSafeWrite+0x3d>
cmp    $0x1,%ebx
jne    1166 <AuxAdiDdiSafeWrite+0x46>
movslq %ebp,%rcx
mov    %r14b,(%rcx)
jmp    116f <AuxAdiDdiSafeWrite+0x4f>
movslq %ebp,%rcx
mov    %r14w,(%rcx)
jmp    116f <AuxAdiDdiSafeWrite+0x4f>
movslq %r14d,%rcx
movslq %ebp,%rdx
mov    %rcx,(%rdx)
movq   $0x1,0x400c8000
test   %eax,%eax
je     1184 <AuxAdiDdiSafeWrite+0x64>
pop    %rbx
pop    %r14
pop    %rbp
ret
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <NOROM_CPUcpsie@plt>

LLVM IR (-O0):
define void @AuxAdiDdiSafeWrite(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = call i32 (...) @NOROM_CPUcpsid()
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
%11 = zext i1 %10 to i32
store i32 %11, i32* %7
br label %12
12: ; preds = %16, %3
%13 = load volatile i64, i64* inttoptr (i64 1074561024 to i64*)
%14 = icmp ne i64 %13, 0
%15 = xor i1 %14, true
br i1 %15, label %16, label %17
16: ; preds = %12
br label %12
17: ; preds = %12
%18 = load i32, i32* %6
switch i32 %18, label %32 [
i32 1, label %19
i32 2, label %25
i32 4, label %31
]
19: ; preds = %17
%20 = load i32, i32* %5
%21 = trunc i32 %20 to i8
%22 = load i32, i32* %4
%23 = sext i32 %22 to i64
%24 = inttoptr i64 %23 to i8*
store volatile i8 %21, i8* %24
br label %38
25: ; preds = %17
%26 = load i32, i32* %5
%27 = trunc i32 %26 to i16
%28 = load i32, i32* %4
%29 = sext i32 %28 to i64
%30 = inttoptr i64 %29 to i16*
store volatile i16 %27, i16* %30
br label %38
31: ; preds = %17
br label %32
32: ; preds = %17, %31
%33 = load i32, i32* %5
%34 = sext i32 %33 to i64
%35 = load i32, i32* %4
%36 = sext i32 %35 to i64
%37 = inttoptr i64 %36 to i64*
store volatile i64 %34, i64* %37
br label %38
38: ; preds = %32, %25, %19
store volatile i64 1, i64* inttoptr (i64 1074561024 to i64*)
%39 = load i32, i32* %7
%40 = icmp ne i32 %39, 0
br i1 %40, label %41, label %43
41: ; preds = %38
%42 = call i32 (...) @NOROM_CPUcpsie()
br label %43
43: ; preds = %41, %38
ret void
}

LLVM IR (-O2):
define void @AuxAdiDdiSafeWrite(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 (...) @NOROM_CPUcpsid()
br label %5
5: ; preds = %5, %3
%6 = load volatile i64, i64* inttoptr (i64 1074561024 to i64*)
%7 = icmp eq i64 %6, 0
br i1 %7, label %5, label %8
8: ; preds = %5
%9 = icmp eq i32 %4, 0
switch i32 %2, label %18 [
i32 1, label %10
i32 2, label %14
]
10: ; preds = %8
%11 = trunc i32 %1 to i8
%12 = sext i32 %0 to i64
%13 = inttoptr i64 %12 to i8*
store volatile i8 %11, i8* %13
br label %22
14: ; preds = %8
%15 = trunc i32 %1 to i16
%16 = sext i32 %0 to i64
%17 = inttoptr i64 %16 to i16*
store volatile i16 %15, i16* %17
br label %22
18: ; preds = %8
%19 = sext i32 %1 to i64
%20 = sext i32 %0 to i64
%21 = inttoptr i64 %20 to i64*
store volatile i64 %19, i64* %21
br label %22
22: ; preds = %18, %14, %10
store volatile i64 1, i64* inttoptr (i64 1074561024 to i64*)
br i1 %9, label %23, label %25
23: ; preds = %22
%24 = tail call i32 (...) @NOROM_CPUcpsie()
br label %25
25: ; preds = %23, %22
ret void
}