xunge/DecIR huggingface dataset:
unsigned int collatz(int num) {
  if (num == 1)
    return 1;
  else if (num % 2)
    return num + collatz(3 * num + 1);
  else
    return num + collatz(num / 2);
}


x86 assembly (clang, -O0):
<collatz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1131 <collatz+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1188 <collatz+0x78>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     1166 <collatz+0x56>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
imul   $0x3,-0x8(%rbp),%edi
add    $0x1,%edi
call   1030 <collatz@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    1188 <collatz+0x78>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1030 <collatz@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<collatz>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebx
cmp    $0x1,%edi
je     1152 <collatz+0x42>
xor    %ebx,%ebx
test   $0x1,%dil
jne    1129 <collatz+0x19>
mov    %edi,%ebp
jmp    1140 <collatz+0x30>
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
lea    (%rdi,%rdi,2),%ebp
add    $0x1,%ebp
add    %edi,%ebx
mov    %ebp,%edi
test   $0x1,%bpl
jne    1130 <collatz+0x20>
mov    %ebp,%edi
shr    $0x1f,%edi
add    %ebp,%edi
sar    %edi
call   1030 <collatz@plt>
add    %ebp,%ebx
add    %eax,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @collatz(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %24
7: ; preds = %1
%8 = load i32, i32* %3
%9 = srem i32 %8, 2
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %18
11: ; preds = %7
%12 = load i32, i32* %3
%13 = load i32, i32* %3
%14 = mul nsw i32 3, %13
%15 = add nsw i32 %14, 1
%16 = call i32 @collatz(i32 %15)
%17 = add i32 %12, %16
store i32 %17, i32* %2
br label %24
18: ; preds = %7
%19 = load i32, i32* %3
%20 = load i32, i32* %3
%21 = sdiv i32 %20, 2
%22 = call i32 @collatz(i32 %21)
%23 = add i32 %19, %22
store i32 %23, i32* %2
br label %24
24: ; preds = %18, %11, %6
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @collatz(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %14, label %3
3: ; preds = %1
%4 = and i32 %0, 1
%5 = icmp eq i32 %4, 0
br i1 %5, label %16, label %6
6: ; preds = %3, %6
%7 = phi i32 [ %11, %6 ], [ 0, %3 ]
%8 = phi i32 [ %10, %6 ], [ %0, %3 ]
%9 = mul nsw i32 %8, 3
%10 = add nsw i32 %9, 1
%11 = add i32 %8, %7
%12 = and i32 %10, 1
%13 = icmp eq i32 %12, 0
br i1 %13, label %16, label %6
14: ; preds = %1, %16
%15 = phi i32 [ %22, %16 ], [ 1, %1 ]
ret i32 %15
16: ; preds = %6, %3
%17 = phi i32 [ %0, %3 ], [ %10, %6 ]
%18 = phi i32 [ 0, %3 ], [ %11, %6 ]
%19 = sdiv i32 %17, 2
%20 = tail call i32 @collatz(i32 %19)
%21 = add i32 %17, %18
%22 = add i32 %21, %20
br label %14
}
/* Variables and functions */
int /*<<< orphan*/ SWARM_Finalize();
int /*<<< orphan*/ SWARM_Init(int *, char ***);
int /*<<< orphan*/ SWARM_Run();
int main(int argc, char **argv) {
  SWARM_Init(&argc, &argv);
  SWARM_Run();
  SWARM_Finalize();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <SWARM_Init@plt>
mov    $0x0,%al
call   1050 <SWARM_Run@plt>
mov    $0x0,%al
call   1040 <SWARM_Finalize@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
mov    %edi,0xc(%rsp)
mov    %rsi,0x10(%rsp)
lea    0xc(%rsp),%rdi
lea    0x10(%rsp),%rsi
call   1030 <SWARM_Init@plt>
xor    %eax,%eax
call   1050 <SWARM_Run@plt>
xor    %eax,%eax
call   1040 <SWARM_Finalize@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @SWARM_Init(i32* %4, i8*** %5)
%7 = call i32 (...) @SWARM_Run()
%8 = call i32 (...) @SWARM_Finalize()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @SWARM_Init(i32* %3, i8*** %4)
%6 = call i32 (...) @SWARM_Run()
%7 = call i32 (...) @SWARM_Finalize()
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void ADCComparatorConfigure(uint32_t ui32Base, uint32_t ui32Comp,
                            uint32_t ui32Config) {
  ;
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000E00 + (ui32Comp * 4)))) =
      ui32Config;
}


x86 assembly (clang, -O0):
<ADCComparatorConfigure>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0xe00,%eax
mov    -0x8(%rbp),%edx
shl    $0x2,%edx
add    %edx,%eax
cltq
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCComparatorConfigure>:
movslq %edi,%rax
movslq %esi,%rcx
mov    %edx,0xe00(%rax,%rcx,4)
ret

LLVM IR (-O0):
define void @ADCComparatorConfigure(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32, i32* %4
%9 = add nsw i32 %8, 3584
%10 = load i32, i32* %5
%11 = mul nsw i32 %10, 4
%12 = add nsw i32 %9, %11
%13 = sext i32 %12 to i64
%14 = inttoptr i64 %13 to i32*
store volatile i32 %7, i32* %14
ret void
}

LLVM IR (-O2):
define void @ADCComparatorConfigure(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %0, 3584
%5 = shl nsw i32 %1, 2
%6 = add nsw i32 %4, %5
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
store volatile i32 %2, i32* %8
ret void
}
int isInList(int x, int n, int list[]) {
  int i;
  for (i = 0; i < n; i++)
    if (x == list[i])
      return (1);
  return (0);
}


x86 assembly (clang, -O0):
<isInList>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1154 <isInList+0x54>
mov    -0x8(%rbp),%eax
mov    -0x18(%rbp),%rcx
movslq -0x1c(%rbp),%rdx
cmp    (%rcx,%rdx,4),%eax
jne    1141 <isInList+0x41>
movl   $0x1,-0x4(%rbp)
jmp    115b <isInList+0x5b>
jmp    1146 <isInList+0x46>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1115 <isInList+0x15>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isInList>:
test   %esi,%esi
jle    111e <isInList+0x1e>
mov    %esi,%eax
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
cmp    %edi,(%rdx,%rcx,4)
je     1121 <isInList+0x21>
add    $0x1,%rcx
cmp    %rcx,%rax
jne    1110 <isInList+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isInList(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32 0, i32* %8
br label %9
9: ; preds = %23, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %26
13: ; preds = %9
%14 = load i32, i32* %5
%15 = load i32*, i32** %7
%16 = load i32, i32* %8
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %15, i64 %17
%19 = load i32, i32* %18
%20 = icmp eq i32 %14, %19
br i1 %20, label %21, label %22
21: ; preds = %13
store i32 1, i32* %4
br label %27
22: ; preds = %13
br label %23
23: ; preds = %22
%24 = load i32, i32* %8
%25 = add nsw i32 %24, 1
store i32 %25, i32* %8
br label %9
26: ; preds = %9
store i32 0, i32* %4
br label %27
27: ; preds = %26, %21
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @isInList(i32 %0, i32 %1, i32* nocapture %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %15
5: ; preds = %3
%6 = zext i32 %1 to i64
br label %9
7: ; preds = %9
%8 = icmp eq i64 %14, %6
br i1 %8, label %15, label %9
9: ; preds = %5, %7
%10 = phi i64 [ 0, %5 ], [ %14, %7 ]
%11 = getelementptr inbounds i32, i32* %2, i64 %10
%12 = load i32, i32* %11
%13 = icmp eq i32 %12, %0
%14 = add nuw nsw i64 %10, 1
br i1 %13, label %15, label %7
15: ; preds = %9, %7, %3
%16 = phi i32 [ 0, %3 ], [ 0, %7 ], [ 1, %9 ]
ret i32 %16
}
int mult3div2(int x) {
  int sign, least;
  x = (x << 1) + x;
  sign = x >> 31 & 0x1;
  least = x & 0x1;
  return (x >> 1) + (sign & least);
}


x86 assembly (clang, -O0):
<mult3div2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1f,%eax
and    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mult3div2>:
lea    (%rdi,%rdi,2),%eax
mov    %eax,%ecx
shr    $0x1f,%ecx
and    %eax,%ecx
sar    %eax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @mult3div2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = shl i32 %5, 1
%7 = load i32, i32* %2
%8 = add nsw i32 %6, %7
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = ashr i32 %9, 31
%11 = and i32 %10, 1
store i32 %11, i32* %3
%12 = load i32, i32* %2
%13 = and i32 %12, 1
store i32 %13, i32* %4
%14 = load i32, i32* %2
%15 = ashr i32 %14, 1
%16 = load i32, i32* %3
%17 = load i32, i32* %4
%18 = and i32 %16, %17
%19 = add nsw i32 %15, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @mult3div2(i32 %0) {
%2 = mul i32 %0, 3
%3 = lshr i32 %2, 31
%4 = ashr i32 %2, 1
%5 = and i32 %3, %2
%6 = add nsw i32 %5, %4
ret i32 %6
}
int main(void) {
  int a[3][4];
  *(a + 3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [3 x [4 x i32]]
store i32 0, i32* %1
%3 = getelementptr inbounds [3 x [4 x i32]], [3 x [4 x i32]]* %2, i64 0, i64 0
%4 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 3
%5 = getelementptr inbounds [4 x i32], [4 x i32]* %4, i64 0, i64 0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ getkey(int /*<<< orphan*/, int);
void op_keyin() { getkey(0, -1); }


x86 assembly (clang, -O0):
<op_keyin>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0xffffffff,%esi
call   1030 <getkey@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_keyin>:
xor    %edi,%edi
mov    $0xffffffff,%esi
jmp    1030 <getkey@plt>

LLVM IR (-O0):
define void @op_keyin() {
%1 = call i32 @getkey(i32 0, i32 -1)
ret void
}

LLVM IR (-O2):
define void @op_keyin() {
%1 = tail call i32 @getkey(i32 0, i32 -1)
ret void
}
__attribute__((always_)) int x2apic_enabled(void) { return 0; }


x86 assembly (clang, -O0):
<x2apic_enabled>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<x2apic_enabled>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @x2apic_enabled() {
ret i32 0
}

LLVM IR (-O2):
define i32 @x2apic_enabled() {
ret i32 0
}
void border_se_ext_corner_special_sand_long_hori(unsigned char *pic,
                                                 unsigned char *mirr) {
  *pic = 0x30;
  ;
}


x86 assembly (clang, -O0):
<border_se_ext_corner_special_sand_long_hori>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x30,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<border_se_ext_corner_special_sand_long_hori>:
movb   $0x30,(%rdi)
ret

LLVM IR (-O0):
define void @border_se_ext_corner_special_sand_long_hori(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
store i8 48, i8* %5
ret void
}

LLVM IR (-O2):
define void @border_se_ext_corner_special_sand_long_hori(i8* nocapture writeonly %0, i8* nocapture readnone %1) {
store i8 48, i8* %0
ret void
}
/* Variables and functions */
int log10(double);
double compute_psnr_core(double sse, double count, double SSE_MAX_VALUE) {
  return 10 * log10(SSE_MAX_VALUE * count / sse);
}


x86 assembly (clang, -O0):
<compute_psnr_core>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
divsd  -0x8(%rbp),%xmm0
call   1030 <log10@plt>
imul   $0xa,%eax,%eax
cvtsi2sd %eax,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compute_psnr_core>:
push   %rax
mulsd  %xmm2,%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
call   1030 <log10@plt>
add    %eax,%eax
lea    (%rax,%rax,4),%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @compute_psnr_core(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %6
%8 = load double, double* %5
%9 = fmul double %7, %8
%10 = load double, double* %4
%11 = fdiv double %9, %10
%12 = call i32 @log10(double %11)
%13 = mul nsw i32 10, %12
%14 = sitofp i32 %13 to double
ret double %14
}

LLVM IR (-O2):
define double @compute_psnr_core(double %0, double %1, double %2) {
%4 = fmul double %1, %2
%5 = fdiv double %4, %0
%6 = tail call i32 @log10(double %5)
%7 = mul nsw i32 %6, 10
%8 = sitofp i32 %7 to double
ret double %8
}
extern void view_count(struct mp4_context_t *mp4_context, char *filename,
                       char *hash, char action[50]) {}


x86 assembly (clang, -O0):
<view_count>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<view_count>:
ret

LLVM IR (-O0):
%struct.mp4_context_t = type opaque
define void @view_count(%struct.mp4_context_t* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca %struct.mp4_context_t*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store %struct.mp4_context_t* %0, %struct.mp4_context_t** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
ret void
}

LLVM IR (-O2):
%struct.mp4_context_t = type opaque
define void @view_count(%struct.mp4_context_t* nocapture %0, i8* nocapture %1, i8* nocapture %2, i8* nocapture %3) {
ret void
}
void gen_cvt_itof(int t) {}


x86 assembly (clang, -O0):
<gen_cvt_itof>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_cvt_itof>:
ret

LLVM IR (-O0):
define void @gen_cvt_itof(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @gen_cvt_itof(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ glWindowPos4f(float const, float const, int /*<<< orphan*/,
                                 int);
void glWindowPos2fv(const float v[2]) { glWindowPos4f(v[0], v[1], 0, 1); }


x86 assembly (clang, -O0):
<glWindowPos2fv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm1
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <glWindowPos4f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glWindowPos2fv>:
movss  (%rdi),%xmm0
movss  0x4(%rdi),%xmm1
xor    %edi,%edi
mov    $0x1,%esi
jmp    1030 <glWindowPos4f@plt>

LLVM IR (-O0):
define void @glWindowPos2fv(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 0
%5 = load float, float* %4
%6 = load float*, float** %2
%7 = getelementptr inbounds float, float* %6, i64 1
%8 = load float, float* %7
%9 = call i32 @glWindowPos4f(float %5, float %8, i32 0, i32 1)
ret void
}

LLVM IR (-O2):
define void @glWindowPos2fv(float* nocapture %0) {
%2 = load float, float* %0
%3 = getelementptr inbounds float, float* %0, i64 1
%4 = load float, float* %3
%5 = tail call i32 @glWindowPos4f(float %2, float %4, i32 0, i32 1)
ret void
}
/* Type definitions */
struct wl_subsurface {
  int dummy;
};
struct wl_proxy {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wl_proxy_marshal(struct wl_proxy *, int);
void wl_subsurface_set_sync(struct wl_subsurface *wl_subsurface) {
  wl_proxy_marshal((struct wl_proxy *)wl_subsurface, 4);
}


x86 assembly (clang, -O0):
<wl_subsurface_set_sync>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x4,%esi
call   1030 <wl_proxy_marshal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wl_subsurface_set_sync>:
mov    $0x4,%esi
jmp    1030 <wl_proxy_marshal@plt>

LLVM IR (-O0):
%struct.wl_subsurface = type { i32 }
%struct.wl_proxy = type { i32 }
define void @wl_subsurface_set_sync(%struct.wl_subsurface* %0) {
%2 = alloca %struct.wl_subsurface*
store %struct.wl_subsurface* %0, %struct.wl_subsurface** %2
%3 = load %struct.wl_subsurface*, %struct.wl_subsurface** %2
%4 = bitcast %struct.wl_subsurface* %3 to %struct.wl_proxy*
%5 = call i32 @wl_proxy_marshal(%struct.wl_proxy* %4, i32 4)
ret void
}

LLVM IR (-O2):
%struct.wl_subsurface = type { i32 }
%struct.wl_proxy = type { i32 }
define void @wl_subsurface_set_sync(%struct.wl_subsurface* %0) {
%2 = bitcast %struct.wl_subsurface* %0 to %struct.wl_proxy*
%3 = tail call i32 @wl_proxy_marshal(%struct.wl_proxy* %2, i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void foo(void) { printf("Bar\n"); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"Bar\0A\00"
define void @foo() {
%1 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [4 x i8] c"Bar\00"
define void @foo() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ t_error(char *, char const *);
scalar_t__ unlink(char const *);
void xunlink(const char *path) {
  if (unlink(path) != 0) {
    t_error("Unable to remove file %s", path);
  }
}


x86 assembly (clang, -O0):
<xunlink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <unlink@plt>
cmp    $0x0,%rax
je     114f <xunlink+0x2f>
mov    -0x8(%rbp),%rsi
lea    0xeb6(%rip),%rdi
call   1040 <t_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xunlink>:
push   %rbx
mov    %rdi,%rbx
call   1030 <unlink@plt>
test   %rax,%rax
je     113e <xunlink+0x1e>
lea    0xecb(%rip),%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <t_error@plt>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"Unable to remove file %s\00"
define void @xunlink(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @unlink(i8* %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i32 @t_error(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %7)
br label %9
9: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"Unable to remove file %s\00"
define void @xunlink(i8* %0) {
%2 = tail call i64 @unlink(i8* %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @t_error(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
void *hjmemset(void *dst, int chr, size_t len) {
  if (dst == NULL) {
    return NULL;
  }
  char *pchr = (char *)dst;
  int i = 0;
  while (i < len) {
    *pchr = (char)chr;
    pchr++;
    i++;
  }
  return dst;
}


x86 assembly (clang, -O0):
<hjmemset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1127 <hjmemset+0x27>
movq   $0x0,-0x8(%rbp)
jmp    1171 <hjmemset+0x71>
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
movl   $0x0,-0x2c(%rbp)
movslq -0x2c(%rbp),%rax
cmp    -0x20(%rbp),%rax
jae    1169 <hjmemset+0x69>
mov    -0x14(%rbp),%eax
mov    %al,%cl
mov    -0x28(%rbp),%rax
mov    %cl,(%rax)
mov    -0x28(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x28(%rbp)
mov    -0x2c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x2c(%rbp)
jmp    1136 <hjmemset+0x36>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hjmemset>:
push   %rbx
mov    %rdi,%rbx
test   %rdi,%rdi
je     1126 <hjmemset+0x16>
test   %rdx,%rdx
je     1126 <hjmemset+0x16>
mov    %rbx,%rdi
call   1030 <memset@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @hjmemset(i8* %0, i32 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i64
%8 = alloca i8*
%9 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i64 %2, i64* %7
%10 = load i8*, i8** %5
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %13
12: ; preds = %3
store i8* null, i8** %4
br label %30
13: ; preds = %3
%14 = load i8*, i8** %5
store i8* %14, i8** %8
store i32 0, i32* %9
br label %15
15: ; preds = %20, %13
%16 = load i32, i32* %9
%17 = sext i32 %16 to i64
%18 = load i64, i64* %7
%19 = icmp ult i64 %17, %18
br i1 %19, label %20, label %28
20: ; preds = %15
%21 = load i32, i32* %6
%22 = trunc i32 %21 to i8
%23 = load i8*, i8** %8
store i8 %22, i8* %23
%24 = load i8*, i8** %8
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %8
%26 = load i32, i32* %9
%27 = add nsw i32 %26, 1
store i32 %27, i32* %9
br label %15
28: ; preds = %15
%29 = load i8*, i8** %5
store i8* %29, i8** %4
br label %30
30: ; preds = %28, %12
%31 = load i8*, i8** %4
ret i8* %31
}

LLVM IR (-O2):
define i8* @hjmemset(i8* writeonly %0, i32 %1, i64 %2) {
%4 = icmp ne i8* %0, null
%5 = icmp ne i64 %2, 0
%6 = and i1 %4, %5
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = trunc i32 %1 to i8
br label %9
9: ; preds = %7, %3
ret i8* %0
}
void _str_toupper(char *src, char *dst) {
  while (*src) {
    *dst++ = *src++;
    if (dst[-1] >= 'a' && dst[-1] <= 'z')
      dst[-1] ^= 0x20;
  }
}


x86 assembly (clang, -O0):
<_str_toupper>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1170 <_str_toupper+0x70>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
mov    (%rax),%cl
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
movsbl -0x1(%rax),%eax
cmp    $0x61,%eax
jl     116b <_str_toupper+0x6b>
mov    -0x10(%rbp),%rax
movsbl -0x1(%rax),%eax
cmp    $0x7a,%eax
jg     116b <_str_toupper+0x6b>
mov    -0x10(%rbp),%rax
movsbl -0x1(%rax),%ecx
xor    $0x20,%ecx
mov    %cl,-0x1(%rax)
jmp    110c <_str_toupper+0xc>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_str_toupper>:
mov    (%rdi),%cl
test   %cl,%cl
je     1134 <_str_toupper+0x34>
xor    %eax,%eax
nopl   0x0(%rax,%rax,1)
lea    -0x61(%rcx),%edx
movzbl %cl,%r8d
xor    $0x20,%cl
cmp    $0x1a,%dl
movzbl %cl,%ecx
cmovae %r8d,%ecx
mov    %cl,(%rsi,%rax,1)
movzbl 0x1(%rdi,%rax,1),%ecx
add    $0x1,%rax
test   %cl,%cl
jne    1110 <_str_toupper+0x10>
ret

LLVM IR (-O0):
define void @_str_toupper(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %33, %2
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %34
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %3
%12 = load i8, i8* %10
%13 = load i8*, i8** %4
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %4
store i8 %12, i8* %13
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i64 -1
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp sge i32 %18, 97
br i1 %19, label %20, label %33
20: ; preds = %9
%21 = load i8*, i8** %4
%22 = getelementptr inbounds i8, i8* %21, i64 -1
%23 = load i8, i8* %22
%24 = sext i8 %23 to i32
%25 = icmp sle i32 %24, 122
br i1 %25, label %26, label %33
26: ; preds = %20
%27 = load i8*, i8** %4
%28 = getelementptr inbounds i8, i8* %27, i64 -1
%29 = load i8, i8* %28
%30 = sext i8 %29 to i32
%31 = xor i32 %30, 32
%32 = trunc i32 %31 to i8
store i8 %32, i8* %28
br label %33
33: ; preds = %26, %20, %9
br label %5
34: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @_str_toupper(i8* nocapture %0, i8* nocapture writeonly %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %17, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %15, %5 ], [ %3, %2 ]
%7 = phi i8* [ %10, %5 ], [ %1, %2 ]
%8 = phi i8* [ %9, %5 ], [ %0, %2 ]
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = getelementptr inbounds i8, i8* %7, i64 1
%11 = add i8 %6, -97
%12 = icmp ult i8 %11, 26
%13 = xor i8 %6, 32
%14 = select i1 %12, i8 %13, i8 %6
store i8 %14, i8* %7
%15 = load i8, i8* %9
%16 = icmp eq i8 %15, 0
br i1 %16, label %17, label %5
17: ; preds = %5, %2
ret void
}
short **(wcheck_short_ptr_ptr)(short **to_check) { return to_check; }


x86 assembly (clang, -O0):
<wcheck_short_ptr_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcheck_short_ptr_ptr>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i16** @wcheck_short_ptr_ptr(i16** %0) {
%2 = alloca i16**
store i16** %0, i16*** %2
%3 = load i16**, i16*** %2
ret i16** %3
}

LLVM IR (-O2):
define i16** @wcheck_short_ptr_ptr(i16** readnone returned %0) {
ret i16** %0
}
/* Variables and functions */
int f(int);
__attribute((always_)) g(int i) { return 2 + f(i); }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <f@plt>
add    $0x2,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
push   %rax
call   1030 <f@plt>
add    $0x2,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @g(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @f(i32 %3)
%5 = add nsw i32 2, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @g(i32 %0) {
%2 = tail call i32 @f(i32 %0)
%3 = add nsw i32 %2, 2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ AirspeedSensorHandle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void AirspeedSensorUpdated() { UAVObjUpdated(AirspeedSensorHandle()); }


x86 assembly (clang, -O0):
<AirspeedSensorUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <AirspeedSensorHandle@plt>
mov    %eax,%edi
call   1030 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AirspeedSensorUpdated>:
push   %rax
xor    %eax,%eax
call   1040 <AirspeedSensorHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @AirspeedSensorUpdated() {
%1 = call i32 (...) @AirspeedSensorHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @AirspeedSensorUpdated() {
%1 = tail call i32 (...) @AirspeedSensorHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int write_start_solutions(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc(15, a, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<write_start_solutions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0xf,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_start_solutions>:
mov    $0xf,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @write_start_solutions() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 15, i32* %5, i32* %6, double* %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @write_start_solutions() {
%1 = tail call i32 @_ada_use_c2phc(i32 15, i32* undef, i32* undef, double* undef)
ret i32 %1
}
int config_MODULE_CAMD33(void) { return 0; }


x86 assembly (clang, -O0):
<config_MODULE_CAMD33>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_MODULE_CAMD33>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @config_MODULE_CAMD33() {
ret i32 0
}

LLVM IR (-O2):
define i32 @config_MODULE_CAMD33() {
ret i32 0
}
int issquare(unsigned n) {
  unsigned i;
  if (n == 1)
    return 1;
  for (i = 1; i < n && n != i * i; ++i)
    ;
  return i == n ? 0 : 1;
}


x86 assembly (clang, -O0):
<issquare>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    111d <issquare+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    117f <issquare+0x7f>
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
xor    %eax,%eax
cmp    -0x8(%rbp),%ecx
mov    %al,-0xd(%rbp)
jae    1147 <issquare+0x47>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
imul   -0xc(%rbp),%ecx
cmp    %ecx,%eax
setne  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1157 <issquare+0x57>
jmp    116a <issquare+0x6a>
jmp    115c <issquare+0x5c>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1124 <issquare+0x24>
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%esi
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    %esi,%edx
cmove  %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<issquare>:
mov    $0x1,%eax
cmp    $0x1,%edi
je     112a <issquare+0x2a>
mov    $0x1,%eax
nop
lea    0x1(%rax),%ecx
cmp    %edi,%eax
jae    1120 <issquare+0x20>
imul   %eax,%eax
cmp    %edi,%eax
mov    %ecx,%eax
jne    1110 <issquare+0x10>
sub    %edi,%ecx
xor    %eax,%eax
cmp    $0x1,%ecx
setne  %al
ret

LLVM IR (-O0):
define i32 @issquare(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %31
8: ; preds = %1
store i32 1, i32* %4
br label %9
9: ; preds = %22, %8
%10 = load i32, i32* %4
%11 = load i32, i32* %3
%12 = icmp ult i32 %10, %11
br i1 %12, label %13, label %19
13: ; preds = %9
%14 = load i32, i32* %3
%15 = load i32, i32* %4
%16 = load i32, i32* %4
%17 = mul i32 %15, %16
%18 = icmp ne i32 %14, %17
br label %19
19: ; preds = %13, %9
%20 = phi i1 [ false, %9 ], [ %18, %13 ]
br i1 %20, label %21, label %25
21: ; preds = %19
br label %22
22: ; preds = %21
%23 = load i32, i32* %4
%24 = add i32 %23, 1
store i32 %24, i32* %4
br label %9
25: ; preds = %19
%26 = load i32, i32* %4
%27 = load i32, i32* %3
%28 = icmp eq i32 %26, %27
%29 = zext i1 %28 to i64
%30 = select i1 %28, i32 0, i32 1
store i32 %30, i32* %2
br label %31
31: ; preds = %25, %7
%32 = load i32, i32* %2
ret i32 %32
}

LLVM IR (-O2):
define i32 @issquare(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %9, %3 ], [ 1, %1 ]
%5 = icmp uge i32 %4, %0
%6 = mul i32 %4, %4
%7 = icmp eq i32 %6, %0
%8 = or i1 %5, %7
%9 = add nuw i32 %4, 1
br i1 %8, label %10, label %3
10: ; preds = %3
%11 = icmp ne i32 %4, %0
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %1, %10
%14 = phi i32 [ %12, %10 ], [ 1, %1 ]
ret i32 %14
}
/* Type definitions */
typedef int /*<<< orphan*/ regex_t;

/* Variables and functions */
int /*<<< orphan*/ regerror(int, int /*<<< orphan*/ *, char *, size_t);
void c_regerror_(int *errcode, regex_t **preg, char *errbuf, int lerrbuf) {
  regerror(*errcode, *preg, errbuf, (size_t)lerrbuf);
}


x86 assembly (clang, -O0):
<c_regerror_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
mov    -0x18(%rbp),%rdx
movslq -0x1c(%rbp),%rcx
call   1030 <regerror@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_regerror_>:
mov    (%rdi),%edi
mov    (%rsi),%rsi
movslq %ecx,%rcx
jmp    1030 <regerror@plt>

LLVM IR (-O0):
define void @c_regerror_(i32* %0, i32** %1, i8* %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32**
%7 = alloca i8*
%8 = alloca i32
store i32* %0, i32** %5
store i32** %1, i32*** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i32*, i32** %5
%10 = load i32, i32* %9
%11 = load i32**, i32*** %6
%12 = load i32*, i32** %11
%13 = load i8*, i8** %7
%14 = load i32, i32* %8
%15 = sext i32 %14 to i64
%16 = call i32 @regerror(i32 %10, i32* %12, i8* %13, i64 %15)
ret void
}

LLVM IR (-O2):
define void @c_regerror_(i32* nocapture %0, i32** nocapture %1, i8* %2, i32 %3) {
%5 = load i32, i32* %0
%6 = load i32*, i32** %1
%7 = sext i32 %3 to i64
%8 = tail call i32 @regerror(i32 %5, i32* %6, i8* %2, i64 %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print_int(int);
int main() {
  print_int(7);
  print_int(42);
  print_int(123);
  print_int(0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x7,%edi
call   1030 <print_int@plt>
mov    $0x2a,%edi
call   1030 <print_int@plt>
mov    $0x7b,%edi
call   1030 <print_int@plt>
xor    %edi,%edi
call   1030 <print_int@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x7,%edi
call   1030 <print_int@plt>
mov    $0x2a,%edi
call   1030 <print_int@plt>
mov    $0x7b,%edi
call   1030 <print_int@plt>
xor    %edi,%edi
call   1030 <print_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @print_int(i32 7)
%3 = call i32 @print_int(i32 42)
%4 = call i32 @print_int(i32 123)
%5 = call i32 @print_int(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @print_int(i32 7)
%2 = tail call i32 @print_int(i32 42)
%3 = tail call i32 @print_int(i32 123)
%4 = tail call i32 @print_int(i32 0)
ret i32 0
}
int fus_compiler_frame_initial_stack_size(int type) {
  return type == 2 ? 1 : 0;
}


x86 assembly (clang, -O0):
<fus_compiler_frame_initial_stack_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x2,%edx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fus_compiler_frame_initial_stack_size>:
xor    %eax,%eax
cmp    $0x2,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @fus_compiler_frame_initial_stack_size(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 2
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 1, i32 0
ret i32 %6
}

LLVM IR (-O2):
define i32 @fus_compiler_frame_initial_stack_size(i32 %0) {
%2 = icmp eq i32 %0, 2
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int get_mark(char *);
int /*<<< orphan*/ sleep(int);
void wait_for_ready(char *fname) {
  int mark = 0;
  while (mark < 1) {
    mark = get_mark(fname);
    sleep(1);
  }
}


x86 assembly (clang, -O0):
<wait_for_ready>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jge    1158 <wait_for_ready+0x38>
mov    -0x8(%rbp),%rdi
call   1030 <get_mark@plt>
mov    %eax,-0xc(%rbp)
mov    $0x1,%edi
call   1040 <sleep@plt>
jmp    1133 <wait_for_ready+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait_for_ready>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <get_mark@plt>
mov    %eax,%ebp
mov    $0x1,%edi
call   1040 <sleep@plt>
test   %ebp,%ebp
jle    1130 <wait_for_ready+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @wait_for_ready(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 1
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = load i8*, i8** %2
%9 = call i32 @get_mark(i8* %8)
store i32 %9, i32* %3
%10 = call i32 @sleep(i32 1)
br label %4
11: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @wait_for_ready(i8* %0) {
br label %2
2: ; preds = %1, %2
%3 = tail call i32 @get_mark(i8* %0)
%4 = tail call i32 @sleep(i32 1)
%5 = icmp slt i32 %3, 1
br i1 %5, label %2, label %6
6: ; preds = %2
ret void
}
double f(double x) { return x * x * x; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
movapd %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @f(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
%6 = load double, double* %2
%7 = fmul double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @f(double %0) {
%2 = fmul double %0, %0
%3 = fmul double %2, %0
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char **argv) {
  int i;
  for (i = 0; i < argc; i++) {
    printf("%s\n", argv[i]);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    115f <main+0x4f>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rsi
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112d <main+0x1d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %edi,%edi
jle    1145 <main+0x35>
mov    %rsi,%r15
mov    %edi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r14
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,8),%rsi
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
br label %7
7: ; preds = %18, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %21
11: ; preds = %7
%12 = load i8**, i8*** %5
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8*, i8** %12, i64 %14
%16 = load i8*, i8** %15
%17 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %16)
br label %18
18: ; preds = %11
%19 = load i32, i32* %6
%20 = add nsw i32 %19, 1
store i32 %20, i32* %6
br label %7
21: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i8*, i8** %1, i64 %7
%9 = load i8*, i8** %8
%10 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void stack_overflow(void) {
  printf("Expression is too complex\n");
  exit(0);
}


x86 assembly (clang, -O0):
<stack_overflow>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<stack_overflow>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"Expression is too complex\0A\00"
define void @stack_overflow() {
%1 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [26 x i8] c"Expression is too complex\00"
define void @stack_overflow() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 0)
unreachable
}
void sanitiseRam(void) {}


x86 assembly (clang, -O0):
<sanitiseRam>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sanitiseRam>:
ret

LLVM IR (-O0):
define void @sanitiseRam() {
ret void
}

LLVM IR (-O2):
define void @sanitiseRam() {
ret void
}
/* Variables and functions */
unsigned int exynos_5410_gpio_read(unsigned int);
int /*<<< orphan*/ exynos_5410_gpio_write_mask(unsigned int, unsigned int,
                                               unsigned int);
void odroid_xu_gpio_toggle_14() {
  unsigned int bank_offset = 0x0C40;
  unsigned int bit_index = 3;
  unsigned int d = exynos_5410_gpio_read(bank_offset);
  d ^= (1U << bit_index);
  exynos_5410_gpio_write_mask(bank_offset, d, (1U << bit_index));
}


x86 assembly (clang, -O0):
<odroid_xu_gpio_toggle_14>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xc40,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <exynos_5410_gpio_read@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
call   1030 <exynos_5410_gpio_write_mask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<odroid_xu_gpio_toggle_14>:
push   %rax
mov    $0xc40,%edi
call   1040 <exynos_5410_gpio_read@plt>
xor    $0x8,%eax
mov    $0xc40,%edi
mov    %eax,%esi
mov    $0x8,%edx
pop    %rax
jmp    1030 <exynos_5410_gpio_write_mask@plt>

LLVM IR (-O0):
define void @odroid_xu_gpio_toggle_14() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 3136, i32* %1
store i32 3, i32* %2
%4 = load i32, i32* %1
%5 = call i32 @exynos_5410_gpio_read(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %2
%7 = shl i32 1, %6
%8 = load i32, i32* %3
%9 = xor i32 %8, %7
store i32 %9, i32* %3
%10 = load i32, i32* %1
%11 = load i32, i32* %3
%12 = load i32, i32* %2
%13 = shl i32 1, %12
%14 = call i32 @exynos_5410_gpio_write_mask(i32 %10, i32 %11, i32 %13)
ret void
}

LLVM IR (-O2):
define void @odroid_xu_gpio_toggle_14() {
%1 = tail call i32 @exynos_5410_gpio_read(i32 3136)
%2 = xor i32 %1, 8
%3 = tail call i32 @exynos_5410_gpio_write_mask(i32 3136, i32 %2, i32 8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ RFM69_WriteByte(int, int);
void RFM69_TriggerRSSI(void) { RFM69_WriteByte(0x01, 0x23); }


x86 assembly (clang, -O0):
<RFM69_TriggerRSSI>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
mov    $0x23,%esi
call   1030 <RFM69_WriteByte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RFM69_TriggerRSSI>:
mov    $0x1,%edi
mov    $0x23,%esi
jmp    1030 <RFM69_WriteByte@plt>

LLVM IR (-O0):
define void @RFM69_TriggerRSSI() {
%1 = call i32 @RFM69_WriteByte(i32 1, i32 35)
ret void
}

LLVM IR (-O2):
define void @RFM69_TriggerRSSI() {
%1 = tail call i32 @RFM69_WriteByte(i32 1, i32 35)
ret void
}
char **kvm_getargv(void *kd, const void *p, int nchr) { return (0); }


x86 assembly (clang, -O0):
<kvm_getargv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kvm_getargv>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8** @kvm_getargv(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i8** null
}

LLVM IR (-O2):
define noalias i8** @kvm_getargv(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
ret i8** null
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char *argv[]) {
  printf("%s\n", "hello,world");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
lea    0xed0(%rip),%rsi
call   1030 <printf@plt>
mov    0x2ea0(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xee5(%rip),%rsi
call   1030 <printf@plt>
mov    0x2eb5(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [12 x i8] c"hello,world\00"
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [12 x i8] c"hello,world\00"
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ funbreak(int);
int /*<<< orphan*/ func(int);
int main(int argc, char **argv, char **envp) {
  func(1);
  func(2);
  func(3);
  func(4);
  funbreak(5);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x1,%edi
call   1030 <func@plt>
mov    $0x2,%edi
call   1030 <func@plt>
mov    $0x3,%edi
call   1030 <func@plt>
mov    $0x4,%edi
call   1030 <func@plt>
mov    $0x5,%edi
call   1040 <funbreak@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <func@plt>
mov    $0x2,%edi
call   1030 <func@plt>
mov    $0x3,%edi
call   1030 <func@plt>
mov    $0x4,%edi
call   1030 <func@plt>
mov    $0x5,%edi
call   1040 <funbreak@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1, i8** %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8**
%7 = alloca i8**
store i32 0, i32* %4
store i32 %0, i32* %5
store i8** %1, i8*** %6
store i8** %2, i8*** %7
%8 = call i32 @func(i32 1)
%9 = call i32 @func(i32 2)
%10 = call i32 @func(i32 3)
%11 = call i32 @func(i32 4)
%12 = call i32 @funbreak(i32 5)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1, i8** nocapture readnone %2) {
%4 = tail call i32 @func(i32 1)
%5 = tail call i32 @func(i32 2)
%6 = tail call i32 @func(i32 3)
%7 = tail call i32 @func(i32 4)
%8 = tail call i32 @funbreak(i32 5)
ret i32 0
}