xunge/DecIR huggingface dataset:
/* Variables and functions */
char *block_malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char *);
scalar_t__ strlen(char *);
char *block_strdup(char *from) {
  char *result;
  if (!from)
    return NULL;
  result = block_malloc(strlen(from) + 1);
  strcpy(result, from);
  return result;
}


x86 assembly (clang, -O0):
<block_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1154 <block_strdup+0x24>
movq   $0x0,-0x8(%rbp)
jmp    1182 <block_strdup+0x52>
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <block_malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<block_strdup>:
push   %r14
push   %rbx
push   %rax
test   %rdi,%rdi
je     115a <block_strdup+0x2a>
mov    %rdi,%rbx
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <block_malloc@plt>
mov    %rax,%r14
mov    %rax,%rdi
mov    %rbx,%rsi
call   1030 <strcpy@plt>
jmp    115d <block_strdup+0x2d>
xor    %r14d,%r14d
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @block_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %8, label %7
7: ; preds = %1
store i8* null, i8** %2
br label %17
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i64 @strlen(i8* %9)
%11 = add nsw i64 %10, 1
%12 = call i8* @block_malloc(i64 %11)
store i8* %12, i8** %4
%13 = load i8*, i8** %4
%14 = load i8*, i8** %3
%15 = call i32 @strcpy(i8* %13, i8* %14)
%16 = load i8*, i8** %4
store i8* %16, i8** %2
br label %17
17: ; preds = %8, %7
%18 = load i8*, i8** %2
ret i8* %18
}

LLVM IR (-O2):
define i8* @block_strdup(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = tail call i64 @strlen(i8* %0)
%5 = add nsw i64 %4, 1
%6 = tail call i8* @block_malloc(i64 %5)
%7 = tail call i32 @strcpy(i8* %6, i8* %0)
br label %8
8: ; preds = %1, %3
%9 = phi i8* [ %6, %3 ], [ null, %1 ]
ret i8* %9
}
/* Variables and functions */
int /*<<< orphan*/ waitpid(int /*<<< orphan*/, int /*<<< orphan*/,
                           int /*<<< orphan*/);
void main() { waitpid(0, 0, 0); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %edx,%edx
mov    %edx,%edi
mov    %edx,%esi
call   1030 <waitpid@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <waitpid@plt>

LLVM IR (-O0):
define void @main() {
%1 = call i32 @waitpid(i32 0, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @waitpid(i32 0, i32 0, i32 0)
ret void
}
/* Type definitions */
struct bitmask {
  int dummy;
};

/* Variables and functions */
struct bitmask *numa_bitmask_alloc(int);
int numa_num_possible_cpus();
struct bitmask *numa_allocate_cpumask() {
  int ncpus = numa_num_possible_cpus();
  return numa_bitmask_alloc(ncpus);
}


x86 assembly (clang, -O0):
<numa_allocate_cpumask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <numa_num_possible_cpus@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <numa_bitmask_alloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<numa_allocate_cpumask>:
push   %rax
xor    %eax,%eax
call   1030 <numa_num_possible_cpus@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <numa_bitmask_alloc@plt>

LLVM IR (-O0):
%struct.bitmask = type { i32 }
define %struct.bitmask* @numa_allocate_cpumask() {
%1 = alloca i32
%2 = call i32 (...) @numa_num_possible_cpus()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call %struct.bitmask* @numa_bitmask_alloc(i32 %3)
ret %struct.bitmask* %4
}

LLVM IR (-O2):
%struct.bitmask = type { i32 }
define %struct.bitmask* @numa_allocate_cpumask() {
%1 = tail call i32 (...) @numa_num_possible_cpus()
%2 = tail call %struct.bitmask* @numa_bitmask_alloc(i32 %1)
ret %struct.bitmask* %2
}
void test(int i) { char c = (char __attribute__((align(8))))i; }


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %al,-0x5(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
ret

LLVM IR (-O0):
define void @test(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = trunc i32 %4 to i8
store i8 %5, i8* %3
ret void
}

LLVM IR (-O2):
define void @test(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ drawCSquare(int, int, int, int, int /*<<< orphan*/);
void deleteGhostLegs(int x, int y, int size) {
  drawCSquare(x, y + size, size / 6 + 10, size, 0);
}


x86 assembly (clang, -O0):
<deleteGhostLegs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
add    -0xc(%rbp),%esi
mov    -0xc(%rbp),%eax
mov    $0x6,%ecx
cltd
idiv   %ecx
mov    %eax,%edx
add    $0xa,%edx
mov    -0xc(%rbp),%ecx
xor    %r8d,%r8d
call   1030 <drawCSquare@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<deleteGhostLegs>:
add    %edx,%esi
movslq %edx,%rcx
imul   $0x2aaaaaab,%rcx,%rax
mov    %rax,%rdx
shr    $0x20,%rdx
shr    $0x3f,%rax
add    %eax,%edx
add    $0xa,%edx
xor    %r8d,%r8d
jmp    1030 <drawCSquare@plt>

LLVM IR (-O0):
define void @deleteGhostLegs(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = add nsw i32 %8, %9
%11 = load i32, i32* %6
%12 = sdiv i32 %11, 6
%13 = add nsw i32 %12, 10
%14 = load i32, i32* %6
%15 = call i32 @drawCSquare(i32 %7, i32 %10, i32 %13, i32 %14, i32 0)
ret void
}

LLVM IR (-O2):
define void @deleteGhostLegs(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %2, %1
%5 = sdiv i32 %2, 6
%6 = add nsw i32 %5, 10
%7 = tail call i32 @drawCSquare(i32 %0, i32 %4, i32 %6, i32 %2, i32 0)
ret void
}
int test_imm_DCuint8_reg(unsigned char val) {
  return ((val) & (0xDC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DCuint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xdc,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DCuint8_reg>:
test   $0xdc,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DCuint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 220
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_DCuint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -36
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int test_imm_36uint32_reg(unsigned int val) {
  return ((val) & (0x36 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_36uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x36,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_36uint32_reg>:
test   $0x36,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_36uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 54
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_36uint32_reg(i32 %0) {
%2 = and i32 %0, 54
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int dummy01(int);
int dummy02(int);
int dummy03(int);
int main(void) {
  int i = 0;
  i = dummy01(i);
  i = dummy02(i);
  i = dummy03(i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1050 <dummy01@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <dummy02@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <dummy03@plt>
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1050 <dummy01@plt>
mov    %eax,%edi
call   1030 <dummy02@plt>
mov    %eax,%edi
call   1040 <dummy03@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @dummy01(i32 %3)
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @dummy02(i32 %5)
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = call i32 @dummy03(i32 %7)
store i32 %8, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @dummy01(i32 0)
%2 = tail call i32 @dummy02(i32 %1)
%3 = tail call i32 @dummy03(i32 %2)
ret i32 0
}
/* Type definitions */
typedef char *__m128d;

/* Variables and functions */
char *_mm_min_sd(char *, char *);
__m128d __attribute__((no, unused)) test(__m128d s1, __m128d s2) {
  __asm("" : "+v"(s1), "+v"(s2));
  return _mm_min_sd(s1, s2);
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rax
movq   %rcx,%xmm0
movq   %rax,%xmm1
movq   %xmm1,%rax
movq   %xmm0,%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <_mm_min_sd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
movq   %rdi,%xmm0
movq   %rsi,%xmm1
movq   %xmm0,%rdi
movq   %xmm1,%rsi
jmp    1030 <_mm_min_sd@plt>

LLVM IR (-O0):
define i8* @test(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call { i8*, i8* } asm "", "=v,=v,0,1,~{dirflag},~{fpsr},~{flags}"(i8* %5, i8* %6)
%8 = extractvalue { i8*, i8* } %7, 0
%9 = extractvalue { i8*, i8* } %7, 1
store i8* %8, i8** %3
store i8* %9, i8** %4
%10 = load i8*, i8** %3
%11 = load i8*, i8** %4
%12 = call i8* @_mm_min_sd(i8* %10, i8* %11)
ret i8* %12
}

LLVM IR (-O2):
define i8* @test(i8* %0, i8* %1) {
%3 = tail call { i8*, i8* } asm "", "=v,=v,0,1,~{dirflag},~{fpsr},~{flags}"(i8* %0, i8* %1)
%4 = extractvalue { i8*, i8* } %3, 0
%5 = extractvalue { i8*, i8* } %3, 1
%6 = tail call i8* @_mm_min_sd(i8* %4, i8* %5)
ret i8* %6
}
void interrupt_handler(int signum) {}


x86 assembly (clang, -O0):
<interrupt_handler>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<interrupt_handler>:
ret

LLVM IR (-O0):
define void @interrupt_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @interrupt_handler(i32 %0) {
ret void
}
/* Variables and functions */
double *calloc(int, int);
int main() {
  double *val = calloc(5, sizeof(double));
  val[4] = 123;
  return val[4];
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x5,%edi
mov    $0x8,%esi
call   1030 <calloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsd  0xec2(%rip),%xmm0
movsd  %xmm0,0x20(%rax)
mov    -0x10(%rbp),%rax
cvttsd2si 0x20(%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
mov    $0x8,%esi
call   1030 <calloc@plt>
mov    $0x7b,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca double*
store i32 0, i32* %1
%3 = call double* @calloc(i32 5, i32 8)
store double* %3, double** %2
%4 = load double*, double** %2
%5 = getelementptr inbounds double, double* %4, i64 4
store double 1.230000e+02, double* %5
%6 = load double*, double** %2
%7 = getelementptr inbounds double, double* %6, i64 4
%8 = load double, double* %7
%9 = fptosi double %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call double* @calloc(i32 5, i32 8)
ret i32 123
}
/* Variables and functions */
int array_count(void *);
void *increase(void *);
int /*<<< orphan*/ memcpy(void *, void **, int);
void *array_add(void *array, void *item) {
  int index = array_count(array);
  array = increase(array);
  void *addr = array + sizeof(void *) * index;
  memcpy(addr, &item, sizeof(void *));
  return array;
}


x86 assembly (clang, -O0):
<array_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <array_count@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <increase@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
lea    -0x10(%rbp),%rsi
mov    $0x8,%edx
call   1040 <memcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<array_add>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    %rsi,(%rsp)
call   1030 <array_count@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1050 <increase@plt>
mov    %rax,%rbx
movslq %ebp,%rax
lea    (%rbx,%rax,8),%rdi
mov    %rsp,%rsi
mov    $0x8,%edx
call   1040 <memcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @array_add(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = call i32 @array_count(i8* %7)
store i32 %8, i32* %5
%9 = load i8*, i8** %3
%10 = call i8* @increase(i8* %9)
store i8* %10, i8** %3
%11 = load i8*, i8** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = mul i64 8, %13
%15 = getelementptr i8, i8* %11, i64 %14
store i8* %15, i8** %6
%16 = load i8*, i8** %6
%17 = call i32 @memcpy(i8* %16, i8** %4, i32 8)
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
define i8* @array_add(i8* %0, i8* %1) {
%3 = alloca i8*
store i8* %1, i8** %3
%4 = tail call i32 @array_count(i8* %0)
%5 = tail call i8* @increase(i8* %0)
%6 = sext i32 %4 to i64
%7 = shl nsw i64 %6, 3
%8 = getelementptr i8, i8* %5, i64 %7
%9 = call i32 @memcpy(i8* %8, i8** %3, i32 8)
ret i8* %5
}
int hfsplus_init_posix_acl(struct inode *inode, struct inode *dir) { return 0; }


x86 assembly (clang, -O0):
<hfsplus_init_posix_acl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hfsplus_init_posix_acl>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.inode = type opaque
define i32 @hfsplus_init_posix_acl(%struct.inode* %0, %struct.inode* %1) {
%3 = alloca %struct.inode*
%4 = alloca %struct.inode*
store %struct.inode* %0, %struct.inode** %3
store %struct.inode* %1, %struct.inode** %4
ret i32 0
}

LLVM IR (-O2):
%struct.inode = type opaque
define i32 @hfsplus_init_posix_acl(%struct.inode* nocapture readnone %0, %struct.inode* nocapture readnone %1) {
ret i32 0
}
void abcdee() {}


x86 assembly (clang, -O0):
<abcdee>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<abcdee>:
ret

LLVM IR (-O0):
define void @abcdee() {
ret void
}

LLVM IR (-O2):
define void @abcdee() {
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int uint16_t;

/* Variables and functions */
int /*<<< orphan*/ __builtin_mips_cache(int /*<<< orphan*/, void *);
void vr4300_install_interrupt_handler(uintptr_t addr) {
  *(volatile uint32_t *)0xA0000180 = (0x3C1A0000) | (addr >> 16);
  *(volatile uint32_t *)0xA0000184 = (0x375A0000) | ((uint16_t)addr);
  *(volatile uint32_t *)0xA0000188 = (0x03400008);
  *(volatile uint32_t *)0xA000018C = (0x401A6800);
  __builtin_mips_cache(0, (void *)0xFFFFFFFF80000180ULL);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x10,%rax
or     $0x3c1a0000,%rax
mov    %eax,%ecx
mov    $0xa0000180,%eax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    %eax,%ecx
or     $0x375a0000,%ecx
mov    $0xa0000184,%eax
mov    %ecx,(%rax)
mov    $0xa0000188,%eax
movl   $0x3400008,(%rax)
mov    $0xa000018c,%eax
movl   $0x401a6800,(%rax)
xor    %edi,%edi
mov    $0xffffffff80000180,%rsi
call   1030 <__builtin_mips_cache@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    %rdi,%rax
shr    $0x10,%rax
or     $0x3c1a0000,%eax
mov    $0xa0000180,%ecx
mov    %eax,(%rcx)
or     $0x375a0000,%edi
mov    %edi,0x4(%rcx)
movl   $0x3400008,0x8(%rcx)
movl   $0x401a6800,0xc(%rcx)
xor    %edi,%edi
mov    $0xffffffff80000180,%rsi
jmp    1030 <__builtin_mips_cache@plt>

LLVM IR (-O0):
define void @vr4300_install_interrupt_handler(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = or i64 1008336896, %4
%6 = trunc i64 %5 to i32
store volatile i32 %6, i32* inttoptr (i64 2684354944 to i32*)
%7 = load i64, i64* %2
%8 = trunc i64 %7 to i32
%9 = or i32 928645120, %8
store volatile i32 %9, i32* inttoptr (i64 2684354948 to i32*)
store volatile i32 54525960, i32* inttoptr (i64 2684354952 to i32*)
store volatile i32 1075472384, i32* inttoptr (i64 2684354956 to i32*)
%10 = call i32 @__builtin_mips_cache(i32 0, i8* inttoptr (i64 -2147483264 to i8*))
ret void
}

LLVM IR (-O2):
define void @vr4300_install_interrupt_handler(i64 %0) {
%2 = lshr i64 %0, 16
%3 = trunc i64 %2 to i32
%4 = or i32 %3, 1008336896
store volatile i32 %4, i32* inttoptr (i64 2684354944 to i32*)
%5 = trunc i64 %0 to i32
%6 = or i32 %5, 928645120
store volatile i32 %6, i32* inttoptr (i64 2684354948 to i32*)
store volatile i32 54525960, i32* inttoptr (i64 2684354952 to i32*)
store volatile i32 1075472384, i32* inttoptr (i64 2684354956 to i32*)
%7 = tail call i32 @__builtin_mips_cache(i32 0, i8* inttoptr (i64 -2147483264 to i8*))
ret void
}
int fun1396() { return 1396; }


x86 assembly (clang, -O0):
<fun1396>:
push   %rbp
mov    %rsp,%rbp
mov    $0x574,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1396>:
mov    $0x574,%eax
ret

LLVM IR (-O0):
define i32 @fun1396() {
ret i32 1396
}

LLVM IR (-O2):
define i32 @fun1396() {
ret i32 1396
}
void CNFGInternalResize(short x, short y) {}


x86 assembly (clang, -O0):
<CNFGInternalResize>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<CNFGInternalResize>:
ret

LLVM IR (-O0):
define void @CNFGInternalResize(i16 signext %0, i16 signext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
ret void
}

LLVM IR (-O2):
define void @CNFGInternalResize(i16 signext %0, i16 signext %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ I2C_start();
int /*<<< orphan*/ I2C_stop();
int /*<<< orphan*/ I2C_write(unsigned char);
void DS3231_Write(unsigned char address, unsigned char value) {
  I2C_start();
  I2C_write(((0x68 << 1) & 0xFE));
  I2C_write(address);
  I2C_write(value);
  I2C_stop();
}


x86 assembly (clang, -O0):
<DS3231_Write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    $0x0,%al
call   1040 <I2C_start@plt>
mov    $0xd0,%edi
call   1050 <I2C_write@plt>
movzbl -0x1(%rbp),%edi
call   1050 <I2C_write@plt>
movzbl -0x2(%rbp),%edi
call   1050 <I2C_write@plt>
mov    $0x0,%al
call   1030 <I2C_stop@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DS3231_Write>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1040 <I2C_start@plt>
mov    $0xd0,%edi
call   1050 <I2C_write@plt>
mov    %ebp,%edi
call   1050 <I2C_write@plt>
mov    %ebx,%edi
call   1050 <I2C_write@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <I2C_stop@plt>

LLVM IR (-O0):
define void @DS3231_Write(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = call i32 (...) @I2C_start()
%6 = call i32 @I2C_write(i8 zeroext -48)
%7 = load i8, i8* %3
%8 = call i32 @I2C_write(i8 zeroext %7)
%9 = load i8, i8* %4
%10 = call i32 @I2C_write(i8 zeroext %9)
%11 = call i32 (...) @I2C_stop()
ret void
}

LLVM IR (-O2):
define void @DS3231_Write(i8 zeroext %0, i8 zeroext %1) {
%3 = tail call i32 (...) @I2C_start()
%4 = tail call i32 @I2C_write(i8 zeroext -48)
%5 = tail call i32 @I2C_write(i8 zeroext %0)
%6 = tail call i32 @I2C_write(i8 zeroext %1)
%7 = tail call i32 (...) @I2C_stop()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LOG_DAEMON;
int /*<<< orphan*/ LOG_INFO;
int LOG_ODELAY;
int LOG_PID;
int /*<<< orphan*/ LOG_UPTO(int /*<<< orphan*/);
int /*<<< orphan*/ openlog(char const *, int, int /*<<< orphan*/);
int /*<<< orphan*/ setlogmask(int /*<<< orphan*/);
void olsr_openlog(const char *ident) {
  openlog(ident, LOG_PID | LOG_ODELAY, LOG_DAEMON);
  setlogmask(LOG_UPTO(LOG_INFO));
  return;
}


x86 assembly (clang, -O0):
<olsr_openlog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e89(%rip),%rax
mov    (%rax),%esi
mov    0x2e98(%rip),%rax
or     (%rax),%esi
mov    0x2e87(%rip),%rax
mov    (%rax),%edx
call   1050 <openlog@plt>
mov    0x2e61(%rip),%rax
mov    (%rax),%edi
call   1030 <LOG_UPTO@plt>
mov    %eax,%edi
call   1040 <setlogmask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<olsr_openlog>:
push   %rax
mov    0x2e98(%rip),%rax
mov    0x2ea9(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
mov    0x2e96(%rip),%rax
mov    (%rax),%edx
call   1050 <openlog@plt>
mov    0x2e70(%rip),%rax
mov    (%rax),%edi
call   1030 <LOG_UPTO@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <setlogmask@plt>

LLVM IR (-O0):
@LOG_PID = global i32 0
@LOG_ODELAY = global i32 0
@LOG_DAEMON = global i32 0
@LOG_INFO = global i32 0
define void @olsr_openlog(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @LOG_PID
%5 = load i32, i32* @LOG_ODELAY
%6 = or i32 %4, %5
%7 = load i32, i32* @LOG_DAEMON
%8 = call i32 @openlog(i8* %3, i32 %6, i32 %7)
%9 = load i32, i32* @LOG_INFO
%10 = call i32 @LOG_UPTO(i32 %9)
%11 = call i32 @setlogmask(i32 %10)
ret void
}

LLVM IR (-O2):
@LOG_PID = global i32 0
@LOG_ODELAY = global i32 0
@LOG_DAEMON = global i32 0
@LOG_INFO = global i32 0
define void @olsr_openlog(i8* %0) {
%2 = load i32, i32* @LOG_PID
%3 = load i32, i32* @LOG_ODELAY
%4 = or i32 %3, %2
%5 = load i32, i32* @LOG_DAEMON
%6 = tail call i32 @openlog(i8* %0, i32 %4, i32 %5)
%7 = load i32, i32* @LOG_INFO
%8 = tail call i32 @LOG_UPTO(i32 %7)
%9 = tail call i32 @setlogmask(i32 %8)
ret void
}
void _infix_operator_plus_double_double(double lhs, double rhs,
                                        double *__rval_1) {
  *__rval_1 = lhs + rhs;
}


x86 assembly (clang, -O0):
<_infix_operator_plus_double_double>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_infix_operator_plus_double_double>:
addsd  %xmm1,%xmm0
movsd  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @_infix_operator_plus_double_double(double %0, double %1, double* %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double*
store double %0, double* %4
store double %1, double* %5
store double* %2, double** %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = fadd double %7, %8
%10 = load double*, double** %6
store double %9, double* %10
ret void
}

LLVM IR (-O2):
define void @_infix_operator_plus_double_double(double %0, double %1, double* nocapture writeonly %2) {
%4 = fadd double %0, %1
store double %4, double* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ PTRACE_TRACEME;
int /*<<< orphan*/ ptrace(int /*<<< orphan*/, int /*<<< orphan*/, long, long);
void *thread(void *arg) {
  ptrace(PTRACE_TRACEME, 0, 0L, 0L);
  return NULL;
}


x86 assembly (clang, -O0):
<thread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
xor    %esi,%esi
xor    %eax,%eax
mov    %eax,%ecx
mov    %rcx,%rdx
call   1030 <ptrace@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
call   1030 <ptrace@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@PTRACE_TRACEME = global i32 0
define i8* @thread(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @PTRACE_TRACEME
%4 = call i32 @ptrace(i32 %3, i32 0, i64 0, i64 0)
ret i8* null
}

LLVM IR (-O2):
@PTRACE_TRACEME = global i32 0
define noalias i8* @thread(i8* nocapture readnone %0) {
%2 = load i32, i32* @PTRACE_TRACEME
%3 = tail call i32 @ptrace(i32 %2, i32 0, i64 0, i64 0)
ret i8* null
}
void swap(int *pa, int *pb) {
  printf("IN SWAP: \n");
  printf("addr of a = %u, addr of b = %u\n\n", pa, pb);
  int temp = *pa;
  *pa = *pb;
  *pb = temp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xece(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0xef0(%rip),%rdi
call   1030 <puts@plt>
lea    0xec3(%rip),%rdi
mov    %rbx,%rsi
mov    %r14,%rdx
xor    %eax,%eax
call   1040 <printf@plt>
mov    (%rbx),%eax
mov    (%r14),%ecx
mov    %ecx,(%rbx)
mov    %eax,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [11 x i8] c"IN SWAP: \0A\00"
@.str.1 = [33 x i8] c"addr of a = %u, addr of b = %u\0A\0A\00"
define void @swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%7 = load i32*, i32** %3
%8 = load i32*, i32** %4
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.1, i64 0, i64 0), i32* %7, i32* %8)
%10 = load i32*, i32** %3
%11 = load i32, i32* %10
store i32 %11, i32* %5
%12 = load i32*, i32** %4
%13 = load i32, i32* %12
%14 = load i32*, i32** %3
store i32 %13, i32* %14
%15 = load i32, i32* %5
%16 = load i32*, i32** %4
store i32 %15, i32* %16
ret void
}

LLVM IR (-O2):
@.str.1 = [33 x i8] c"addr of a = %u, addr of b = %u\0A\0A\00"
@str = [10 x i8] c"IN SWAP: \00"
define void @swap(i32* %0, i32* %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @.str.1, i64 0, i64 0), i32* %0, i32* %1)
%5 = load i32, i32* %0
%6 = load i32, i32* %1
store i32 %6, i32* %0
store i32 %5, i32* %1
ret void
}
void INT_LVI(void) {}


x86 assembly (clang, -O0):
<INT_LVI>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_LVI>:
ret

LLVM IR (-O0):
define void @INT_LVI() {
ret void
}

LLVM IR (-O2):
define void @INT_LVI() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void quit_handler(int sig) { exit(EXIT_SUCCESS); }


x86 assembly (clang, -O0):
<quit_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<quit_handler>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
call   1030 <exit@plt>

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define void @quit_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @EXIT_SUCCESS
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define void @quit_handler(i32 %0) {
%2 = load i32, i32* @EXIT_SUCCESS
%3 = tail call i32 @exit(i32 %2)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ MAIN__();
int /*<<< orphan*/ __f90_set_args(int, char **);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int __f90_main(int argc, char **argv, char **arge) {
  __f90_set_args(argc, argv);
  MAIN__();
  exit(0);
  return (0);
}


x86 assembly (clang, -O0):
<__f90_main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <__f90_set_args@plt>
mov    $0x0,%al
call   1030 <MAIN__@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<__f90_main>:
push   %rax
call   1040 <__f90_set_args@plt>
xor    %eax,%eax
call   1030 <MAIN__@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define i32 @__f90_main(i32 %0, i8** %1, i8** %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8**
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8** %2, i8*** %6
%7 = load i32, i32* %4
%8 = load i8**, i8*** %5
%9 = call i32 @__f90_set_args(i32 %7, i8** %8)
%10 = call i32 (...) @MAIN__()
%11 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @__f90_main(i32 %0, i8** %1, i8** nocapture readnone %2) {
%4 = tail call i32 @__f90_set_args(i32 %0, i8** %1)
%5 = tail call i32 (...) @MAIN__()
%6 = tail call i32 @exit(i32 0)
unreachable
}
void blk_unplug_timeout(unsigned long data) { return; }


x86 assembly (clang, -O0):
<blk_unplug_timeout>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<blk_unplug_timeout>:
ret

LLVM IR (-O0):
define void @blk_unplug_timeout(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret void
}

LLVM IR (-O2):
define void @blk_unplug_timeout(i64 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ss2sfc(float, float, float);
void ss2sfc_(float *r, float *g, float *b) { ss2sfc(*r, *g, *b); }


x86 assembly (clang, -O0):
<ss2sfc_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm1
mov    -0x18(%rbp),%rax
movss  (%rax),%xmm2
call   1030 <ss2sfc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ss2sfc_>:
movss  (%rdi),%xmm0
movss  (%rsi),%xmm1
movss  (%rdx),%xmm2
jmp    1030 <ss2sfc@plt>

LLVM IR (-O0):
define void @ss2sfc_(float* %0, float* %1, float* %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float*
store float* %0, float** %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float*, float** %4
%8 = load float, float* %7
%9 = load float*, float** %5
%10 = load float, float* %9
%11 = load float*, float** %6
%12 = load float, float* %11
%13 = call i32 @ss2sfc(float %8, float %10, float %12)
ret void
}

LLVM IR (-O2):
define void @ss2sfc_(float* nocapture %0, float* nocapture %1, float* nocapture %2) {
%4 = load float, float* %0
%5 = load float, float* %1
%6 = load float, float* %2
%7 = tail call i32 @ss2sfc(float %4, float %5, float %6)
ret void
}
/* Variables and functions */
char getcode();
char kcscan() { return getcode(); }


x86 assembly (clang, -O0):
<kcscan>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getcode@plt>
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kcscan>:
xor    %eax,%eax
jmp    1030 <getcode@plt>

LLVM IR (-O0):
define signext i8 @kcscan() {
%1 = call signext i8 (...) @getcode()
ret i8 %1
}

LLVM IR (-O2):
define signext i8 @kcscan() {
%1 = tail call signext i8 (...) @getcode()
ret i8 %1
}
/* Variables and functions */
double EvalAngCor_alpha1_2plus_2plus_15097_L0(double);
double funcAngCor_alpha1_2plus_2plus_15097_L0(double *x, double *par) {
  double result;
  result = par[0] * EvalAngCor_alpha1_2plus_2plus_15097_L0(x[0]);
  return result;
}


x86 assembly (clang, -O0):
<funcAngCor_alpha1_2plus_2plus_15097_L0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x20(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
call   1030 <EvalAngCor_alpha1_2plus_2plus_15097_L0@plt>
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<funcAngCor_alpha1_2plus_2plus_15097_L0>:
push   %rax
movsd  (%rsi),%xmm0
movsd  %xmm0,(%rsp)
movsd  (%rdi),%xmm0
call   1030 <EvalAngCor_alpha1_2plus_2plus_15097_L0@plt>
mulsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @funcAngCor_alpha1_2plus_2plus_15097_L0(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
%5 = alloca double
store double* %0, double** %3
store double* %1, double** %4
%6 = load double*, double** %4
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = load double*, double** %3
%10 = getelementptr inbounds double, double* %9, i64 0
%11 = load double, double* %10
%12 = call double @EvalAngCor_alpha1_2plus_2plus_15097_L0(double %11)
%13 = fmul double %8, %12
store double %13, double* %5
%14 = load double, double* %5
ret double %14
}

LLVM IR (-O2):
define double @funcAngCor_alpha1_2plus_2plus_15097_L0(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %1
%4 = load double, double* %0
%5 = tail call double @EvalAngCor_alpha1_2plus_2plus_15097_L0(double %4)
%6 = fmul double %3, %5
ret double %6
}
int ignore_exit2(int rc, char *stdoutbuf, char *stderrbuf) {
  if (rc && (rc != 2)) {
    return (rc);
  }
  return (0);
}


x86 assembly (clang, -O0):
<ignore_exit2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112e <ignore_exit2+0x2e>
cmpl   $0x2,-0x8(%rbp)
je     112e <ignore_exit2+0x2e>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1135 <ignore_exit2+0x35>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ignore_exit2>:
mov    %edi,%eax
and    $0xfffffffd,%eax
cmovne %edi,%eax
ret

LLVM IR (-O0):
define i32 @ignore_exit2(i32 %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
store i32 %0, i32* %5
store i8* %1, i8** %6
store i8* %2, i8** %7
%8 = load i32, i32* %5
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %15
10: ; preds = %3
%11 = load i32, i32* %5
%12 = icmp ne i32 %11, 2
br i1 %12, label %13, label %15
13: ; preds = %10
%14 = load i32, i32* %5
store i32 %14, i32* %4
br label %16
15: ; preds = %10, %3
store i32 0, i32* %4
br label %16
16: ; preds = %15, %13
%17 = load i32, i32* %4
ret i32 %17
}

LLVM IR (-O2):
define i32 @ignore_exit2(i32 %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
%4 = and i32 %0, -3
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i32 0, i32 %0
ret i32 %6
}
int RoundUp(double number) {
  if (number > 255.0l)
    return 255;
  if (number < 0.0l)
    return 0;
  if ((int)number <= (int)(number - 0.5f))
    return (int)number + 1;
  return (int)number;
}


x86 assembly (clang, -O0):
<RoundUp>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
fldl   -0x10(%rbp)
flds   0xeee(%rip)
fxch   %st(1)
fucomip %st(1),%st
fstp   %st(0)
jbe    112f <RoundUp+0x2f>
jmp    1123 <RoundUp+0x23>
movl   $0xff,-0x4(%rbp)
jmp    1189 <RoundUp+0x89>
fldl   -0x10(%rbp)
fldz
fucomip %st(1),%st
fstp   %st(0)
jbe    114f <RoundUp+0x4f>
jmp    1143 <RoundUp+0x43>
movl   $0x0,-0x4(%rbp)
jmp    1189 <RoundUp+0x89>
cvttsd2si -0x10(%rbp),%eax
movsd  -0x10(%rbp),%xmm0
movsd  0xea7(%rip),%xmm1
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%ecx
cmp    %ecx,%eax
jg     1181 <RoundUp+0x81>
cvttsd2si -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1189 <RoundUp+0x89>
cvttsd2si -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RoundUp>:
mov    $0xff,%eax
ucomisd 0xef3(%rip),%xmm0
ja     1134 <RoundUp+0x34>
xor    %eax,%eax
xorpd  %xmm1,%xmm1
ucomisd %xmm0,%xmm1
ja     1134 <RoundUp+0x34>
cvttsd2si %xmm0,%ecx
addsd  0xee1(%rip),%xmm0
cvttsd2si %xmm0,%edx
xor    %eax,%eax
cmp    %edx,%ecx
setle  %al
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @RoundUp(double %0) {
%2 = alloca i32
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fpext double %4 to x86_fp80
%6 = fcmp ogt x86_fp80 %5, 0xK4006FF00000000000000
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 255, i32* %2
br label %27
8: ; preds = %1
%9 = load double, double* %3
%10 = fpext double %9 to x86_fp80
%11 = fcmp olt x86_fp80 %10, 0xK00000000000000000000
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 0, i32* %2
br label %27
13: ; preds = %8
%14 = load double, double* %3
%15 = fptosi double %14 to i32
%16 = load double, double* %3
%17 = fsub double %16, 5.000000e-01
%18 = fptosi double %17 to i32
%19 = icmp sle i32 %15, %18
br i1 %19, label %20, label %24
20: ; preds = %13
%21 = load double, double* %3
%22 = fptosi double %21 to i32
%23 = add nsw i32 %22, 1
store i32 %23, i32* %2
br label %27
24: ; preds = %13
%25 = load double, double* %3
%26 = fptosi double %25 to i32
store i32 %26, i32* %2
br label %27
27: ; preds = %24, %20, %12, %7
%28 = load i32, i32* %2
ret i32 %28
}

LLVM IR (-O2):
define i32 @RoundUp(double %0) {
%2 = fcmp ogt double %0, 2.550000e+02
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = fcmp olt double %0, 0.000000e+00
br i1 %4, label %12, label %5
5: ; preds = %3
%6 = fptosi double %0 to i32
%7 = fadd double %0, -5.000000e-01
%8 = fptosi double %7 to i32
%9 = icmp sle i32 %6, %8
%10 = zext i1 %9 to i32
%11 = add nsw i32 %10, %6
br label %12
12: ; preds = %5, %3, %1
%13 = phi i32 [ 255, %1 ], [ 0, %3 ], [ %11, %5 ]
ret i32 %13
}
int Snack_DoDispense(int unused__User __attribute__((__unused__)), int Item) {
  if (Item < 0 || Item > 99)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<Snack_DoDispense>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jl     111e <Snack_DoDispense+0x1e>
cmpl   $0x63,-0xc(%rbp)
jle    112a <Snack_DoDispense+0x2a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1131 <Snack_DoDispense+0x31>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Snack_DoDispense>:
xor    %eax,%eax
cmp    $0x64,%esi
adc    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @Snack_DoDispense(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp slt i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i32, i32* %5
%10 = icmp sgt i32 %9, 99
br i1 %10, label %11, label %12
11: ; preds = %8, %2
store i32 -1, i32* %3
br label %13
12: ; preds = %8
store i32 0, i32* %3
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @Snack_DoDispense(i32 %0, i32 %1) {
%3 = icmp ugt i32 %1, 99
%4 = sext i1 %3 to i32
ret i32 %4
}
void _src_iter_step(const char **current) { (*current)++; }


x86 assembly (clang, -O0):
<_src_iter_step>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_src_iter_step>:
addq   $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @_src_iter_step(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8, i8* %4, i32 1
store i8* %5, i8** %3
ret void
}

LLVM IR (-O2):
define void @_src_iter_step(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = getelementptr inbounds i8, i8* %2, i64 1
store i8* %3, i8** %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ prm_is_prime(unsigned int);
unsigned long prm_next_prime(unsigned int start) {
  unsigned int next;
  for (next = start | 1; !prm_is_prime(next); next += 2)
    ;
  return next;
}


x86 assembly (clang, -O0):
<prm_next_prime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
or     $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <prm_is_prime@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1141 <prm_next_prime+0x31>
jmp    1154 <prm_next_prime+0x44>
jmp    1146 <prm_next_prime+0x36>
mov    -0x8(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x8(%rbp)
jmp    1124 <prm_next_prime+0x14>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prm_next_prime>:
push   %rbx
mov    %edi,%ebx
or     $0x1,%ebx
cs nopw 0x0(%rax,%rax,1)
mov    %ebx,%edi
call   1030 <prm_is_prime@plt>
add    $0x2,%ebx
test   %eax,%eax
je     1120 <prm_next_prime+0x10>
add    $0xfffffffe,%ebx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @prm_next_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = or i32 %4, 1
store i32 %5, i32* %3
br label %6
6: ; preds = %12, %1
%7 = load i32, i32* %3
%8 = call i32 @prm_is_prime(i32 %7)
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
br i1 %10, label %11, label %15
11: ; preds = %6
br label %12
12: ; preds = %11
%13 = load i32, i32* %3
%14 = add i32 %13, 2
store i32 %14, i32* %3
br label %6
15: ; preds = %6
%16 = load i32, i32* %3
%17 = zext i32 %16 to i64
ret i64 %17
}

LLVM IR (-O2):
define i64 @prm_next_prime(i32 %0) {
%2 = or i32 %0, 1
br label %3
3: ; preds = %3, %1
%4 = phi i32 [ %2, %1 ], [ %7, %3 ]
%5 = tail call i32 @prm_is_prime(i32 %4)
%6 = icmp eq i32 %5, 0
%7 = add i32 %4, 2
br i1 %6, label %3, label %8
8: ; preds = %3
%9 = zext i32 %4 to i64
ret i64 %9
}
void webif_init(void) {}


x86 assembly (clang, -O0):
<webif_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<webif_init>:
ret

LLVM IR (-O0):
define void @webif_init() {
ret void
}

LLVM IR (-O2):
define void @webif_init() {
ret void
}
extern int harp_has_intmask_setclr(void) { return 1; }


x86 assembly (clang, -O0):
<harp_has_intmask_setclr>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<harp_has_intmask_setclr>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @harp_has_intmask_setclr() {
ret i32 1
}

LLVM IR (-O2):
define i32 @harp_has_intmask_setclr() {
ret i32 1
}
unsigned char toCode(unsigned char c) {
  switch (c) {
  case 10:
    return 'A';
  case 11:
    return 'B';
  case 12:
    return 'C';
  case 13:
    return 'D';
  case 14:
    return 'E';
  case 15:
    return 'F';
  default:
    return c + 48;
  }
}


x86 assembly (clang, -O0):
<toCode>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
add    $0xfffffff6,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x5,%eax
ja     116a <toCode+0x6a>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movb   $0x41,-0x1(%rbp)
jmp    1174 <toCode+0x74>
movb   $0x42,-0x1(%rbp)
jmp    1174 <toCode+0x74>
movb   $0x43,-0x1(%rbp)
jmp    1174 <toCode+0x74>
movb   $0x44,-0x1(%rbp)
jmp    1174 <toCode+0x74>
movb   $0x45,-0x1(%rbp)
jmp    1174 <toCode+0x74>
movb   $0x46,-0x1(%rbp)
jmp    1174 <toCode+0x74>
movzbl -0x2(%rbp),%eax
add    $0x30,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<toCode>:
lea    -0xa(%rdi),%eax
cmp    $0x6,%al
mov    $0x37,%ecx
mov    $0x30,%eax
cmovb  %ecx,%eax
add    %dil,%al
ret

LLVM IR (-O0):
define zeroext i8 @toCode(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
switch i32 %5, label %12 [
i32 10, label %6
i32 11, label %7
i32 12, label %8
i32 13, label %9
i32 14, label %10
i32 15, label %11
]
6: ; preds = %1
store i8 65, i8* %2
br label %17
7: ; preds = %1
store i8 66, i8* %2
br label %17
8: ; preds = %1
store i8 67, i8* %2
br label %17
9: ; preds = %1
store i8 68, i8* %2
br label %17
10: ; preds = %1
store i8 69, i8* %2
br label %17
11: ; preds = %1
store i8 70, i8* %2
br label %17
12: ; preds = %1
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = add nsw i32 %14, 48
%16 = trunc i32 %15 to i8
store i8 %16, i8* %2
br label %17
17: ; preds = %12, %11, %10, %9, %8, %7, %6
%18 = load i8, i8* %2
ret i8 %18
}

LLVM IR (-O2):
define zeroext i8 @toCode(i8 zeroext %0) {
%2 = add i8 %0, -10
%3 = icmp ult i8 %2, 6
%4 = select i1 %3, i8 55, i8 48
%5 = add i8 %4, %0
ret i8 %5
}
/* Variables and functions */
scalar_t__ approximately_zero(double);
double approximately_pin(double x) { return approximately_zero(x) ? 0 : x; }


x86 assembly (clang, -O0):
<approximately_pin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <approximately_zero@plt>
cmp    $0x0,%rax
je     113e <approximately_pin+0x2e>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    1148 <approximately_pin+0x38>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<approximately_pin>:
push   %rax
movsd  %xmm0,(%rsp)
call   1030 <approximately_zero@plt>
movsd  (%rsp),%xmm0
test   %rax,%rax
je     1128 <approximately_pin+0x18>
xorps  %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @approximately_pin(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i64 @approximately_zero(double %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
br label %9
7: ; preds = %1
%8 = load double, double* %2
br label %9
9: ; preds = %7, %6
%10 = phi double [ 0.000000e+00, %6 ], [ %8, %7 ]
ret double %10
}

LLVM IR (-O2):
define double @approximately_pin(double %0) {
%2 = tail call i64 @approximately_zero(double %0)
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, double %0, double 0.000000e+00
ret double %4
}
/* Variables and functions */
scalar_t__ has_flag(char *, int);
int /*<<< orphan*/ mark_invoked(char *);
int dummy_serve(void *handle, void *http_request, void *response) {
  mark_invoked("rapp_serve");
  if (has_flag("rapp_serve", 0x04)) {
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<dummy_serve>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
lea    0xec5(%rip),%rdi
call   1030 <mark_invoked@plt>
lea    0xeb9(%rip),%rdi
mov    $0x4,%esi
call   1040 <has_flag@plt>
cmp    $0x0,%rax
je     1167 <dummy_serve+0x47>
movl   $0xffffffff,-0x4(%rbp)
jmp    116e <dummy_serve+0x4e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy_serve>:
push   %rbx
lea    0xed8(%rip),%rbx
mov    %rbx,%rdi
call   1030 <mark_invoked@plt>
mov    %rbx,%rdi
mov    $0x4,%esi
call   1040 <has_flag@plt>
neg    %rax
sbb    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"rapp_serve\00"
define i32 @dummy_serve(i8* %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
%8 = call i32 @mark_invoked(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%9 = call i64 @has_flag(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 4)
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %3
store i32 -1, i32* %4
br label %13
12: ; preds = %3
store i32 0, i32* %4
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %4
ret i32 %14
}

LLVM IR (-O2):
@.str = [11 x i8] c"rapp_serve\00"
define i32 @dummy_serve(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
%4 = tail call i32 @mark_invoked(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%5 = tail call i64 @has_flag(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 4)
%6 = icmp ne i64 %5, 0
%7 = sext i1 %6 to i32
ret i32 %7
}