xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
void ecc108h_calculate_sha256(int32_t len, uint8_t *message, uint8_t *digest) {}


x86 assembly (clang, -O0):
<ecc108h_calculate_sha256>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ecc108h_calculate_sha256>:
ret

LLVM IR (-O0):
define void @ecc108h_calculate_sha256(i32 %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32* %2, i32** %6
ret void
}

LLVM IR (-O2):
define void @ecc108h_calculate_sha256(i32 %0, i32* nocapture %1, i32* nocapture %2) {
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int padcon_get_quaddobl_solution(int idx, int verbose) {
  int fail;
  int pars[2];
  double *c;
  pars[0] = 2;
  pars[1] = idx;
  fail = _ada_use_c2phc4c(863, pars, &verbose, c, 0);
  if (pars[0] != 0)
    fail = pars[0];
  return fail;
}


x86 assembly (clang, -O0):
<padcon_get_quaddobl_solution>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x2,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
lea    -0x14(%rbp),%rsi
mov    -0x20(%rbp),%rcx
mov    $0x35f,%edi
lea    -0x8(%rbp),%rdx
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1157 <padcon_get_quaddobl_solution+0x47>
mov    -0x14(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<padcon_get_quaddobl_solution>:
sub    $0x18,%rsp
mov    %esi,0x14(%rsp)
movl   $0x2,0xc(%rsp)
mov    %edi,0x10(%rsp)
lea    0xc(%rsp),%rsi
lea    0x14(%rsp),%rdx
mov    $0x35f,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    0xc(%rsp),%ecx
test   %ecx,%ecx
cmovne %ecx,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @padcon_get_quaddobl_solution(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca [2 x i32]
%7 = alloca double*
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 0
store i32 2, i32* %8
%9 = load i32, i32* %3
%10 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 1
store i32 %9, i32* %10
%11 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 0
%12 = load double*, double** %7
%13 = call i32 @_ada_use_c2phc4c(i32 863, i32* %11, i32* %4, double* %12, i32 0)
store i32 %13, i32* %5
%14 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 0
%15 = load i32, i32* %14
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %2
%18 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 0
%19 = load i32, i32* %18
store i32 %19, i32* %5
br label %20
20: ; preds = %17, %2
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
define i32 @padcon_get_quaddobl_solution(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca [2 x i32]
store i32 %1, i32* %3
%5 = bitcast [2 x i32]* %4 to i8*
%6 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 0
store i32 2, i32* %6
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 1
store i32 %0, i32* %7
%8 = call i32 @_ada_use_c2phc4c(i32 863, i32* %6, i32* %3, double* undef, i32 0)
%9 = load i32, i32* %6
%10 = icmp eq i32 %9, 0
%11 = select i1 %10, i32 %8, i32 %9
ret i32 %11
}
float f2(float f) { return __builtin_fabsf(f); }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movaps 0xeeb(%rip),%xmm1
pand   %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
andps  0xef9(%rip),%xmm0
ret

LLVM IR (-O0):
define float @f2(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @llvm.fabs.f32(float %3)
ret float %4
}

LLVM IR (-O2):
define float @f2(float %0) {
%2 = tail call float @llvm.fabs.f32(float %0)
ret float %2
}
void timer() {
  initTimer(50);
  asm volatile("int $32");
  asm volatile("int $32");
  asm volatile("int $32");
  asm volatile("int $32");
  asm volatile("int $32");
  printTimer();
}


x86 assembly (clang, -O0):
<timer>:
push   %rbp
mov    %rsp,%rbp
mov    $0x32,%edi
mov    $0x0,%al
call   1040 <initTimer@plt>
int    $0x20
int    $0x20
int    $0x20
int    $0x20
int    $0x20
mov    $0x0,%al
call   1030 <printTimer@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<timer>:
push   %rax
mov    $0x32,%edi
xor    %eax,%eax
call   1040 <initTimer@plt>
int    $0x20
int    $0x20
int    $0x20
int    $0x20
int    $0x20
xor    %eax,%eax
pop    %rcx
jmp    1030 <printTimer@plt>

LLVM IR (-O0):
define void @timer() {
%1 = call i32 (i32, ...) bitcast (i32 (...)* @initTimer to i32 (i32, ...)*)(i32 50)
%2 = call i32 (...) @printTimer()
ret void
}

LLVM IR (-O2):
define void @timer() {
%1 = tail call i32 (i32, ...) bitcast (i32 (...)* @initTimer to i32 (i32, ...)*)(i32 50)
tail call void asm sideeffect "int $$32", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "int $$32", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "int $$32", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "int $$32", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "int $$32", "~{dirflag},~{fpsr},~{flags}"()
%2 = tail call i32 (...) @printTimer()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ vt100_EscSeq(int, unsigned char *, long long);
void vt100_CUF(int n) { vt100_EscSeq(n, (unsigned char *)"C", (long long)2); }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xedb(%rip),%rsi
mov    $0x2,%edx
call   1030 <vt100_EscSeq@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
lea    0xee9(%rip),%rsi
mov    $0x2,%edx
jmp    1030 <vt100_EscSeq@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"C\00"
define void @vt100_CUF(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @vt100_EscSeq(i32 %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i64 2)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"C\00"
define void @vt100_CUF(i32 %0) {
%2 = tail call i32 @vt100_EscSeq(i32 %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i64 2)
ret void
}
char char2hex(char c) {
  if (c <= '9')
    return c - '0';
  if (c <= 'F')
    return c - 'A' + 10;
  return c - 'a' + 10;
}


x86 assembly (clang, -O0):
<char2hex>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
cmp    $0x39,%eax
jg     1126 <char2hex+0x26>
movsbl -0x2(%rbp),%eax
sub    $0x30,%eax
mov    %al,-0x1(%rbp)
jmp    1152 <char2hex+0x52>
movsbl -0x2(%rbp),%eax
cmp    $0x46,%eax
jg     1145 <char2hex+0x45>
movsbl -0x2(%rbp),%eax
sub    $0x41,%eax
add    $0xa,%eax
mov    %al,-0x1(%rbp)
jmp    1152 <char2hex+0x52>
movsbl -0x2(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<char2hex>:
cmp    $0x47,%dil
setb   %al
shl    $0x5,%al
add    $0xa9,%al
cmp    $0x3a,%dil
movzbl %al,%ecx
mov    $0xd0,%eax
cmovge %ecx,%eax
add    %dil,%al
ret

LLVM IR (-O0):
define signext i8 @char2hex(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sle i32 %5, 57
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = sub nsw i32 %9, 48
%11 = trunc i32 %10 to i8
store i8 %11, i8* %2
br label %28
12: ; preds = %1
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = icmp sle i32 %14, 70
br i1 %15, label %16, label %22
16: ; preds = %12
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = sub nsw i32 %18, 65
%20 = add nsw i32 %19, 10
%21 = trunc i32 %20 to i8
store i8 %21, i8* %2
br label %28
22: ; preds = %12
%23 = load i8, i8* %3
%24 = sext i8 %23 to i32
%25 = sub nsw i32 %24, 97
%26 = add nsw i32 %25, 10
%27 = trunc i32 %26 to i8
store i8 %27, i8* %2
br label %28
28: ; preds = %22, %16, %7
%29 = load i8, i8* %2
ret i8 %29
}

LLVM IR (-O2):
define signext i8 @char2hex(i8 signext %0) {
%2 = icmp slt i8 %0, 58
%3 = icmp ult i8 %0, 71
%4 = select i1 %3, i8 -55, i8 -87
%5 = select i1 %2, i8 -48, i8 %4
%6 = add i8 %5, %0
ret i8 %6
}
void Interp9(unsigned char *pc, int c1, int c2, int c3) {
  *((int *)pc) =
      ((((c1 & 0x00FF00) * 2 + ((c2 & 0x00FF00) + (c3 & 0x00FF00)) * 3) &
        0x0007F800) +
       (((c1 & 0xFF00FF) * 2 + ((c2 & 0xFF00FF) + (c3 & 0xFF00FF)) * 3) &
        0x07F807F8)) >>
      3;
}


x86 assembly (clang, -O0):
<Interp9>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x1,%ecx
mov    -0x10(%rbp),%eax
and    $0xff00,%eax
mov    -0x14(%rbp),%edx
and    $0xff00,%edx
add    %edx,%eax
imul   $0x3,%eax,%eax
add    %eax,%ecx
and    $0x7f800,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x1,%eax
mov    -0x10(%rbp),%edx
and    $0xff00ff,%edx
mov    -0x14(%rbp),%esi
and    $0xff00ff,%esi
add    %esi,%edx
imul   $0x3,%edx,%edx
add    %edx,%eax
and    $0x7f807f8,%eax
add    %eax,%ecx
sar    $0x3,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Interp9>:
add    %esi,%esi
mov    %esi,%r8d
and    $0x1fe00,%r8d
mov    %edx,%r9d
and    $0xff00,%r9d
mov    %ecx,%eax
and    $0xff00,%eax
add    %r9d,%eax
lea    (%rax,%rax,2),%eax
add    %r8d,%eax
and    $0x7f800,%eax
and    $0x1fe01fe,%esi
and    $0xff00ff,%edx
and    $0xff00ff,%ecx
add    %edx,%ecx
lea    (%rcx,%rcx,2),%ecx
add    %esi,%ecx
and    $0x7f807f8,%ecx
or     %eax,%ecx
shr    $0x3,%ecx
mov    %ecx,(%rdi)
ret

LLVM IR (-O0):
define void @Interp9(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %6
%10 = and i32 %9, 65280
%11 = mul nsw i32 %10, 2
%12 = load i32, i32* %7
%13 = and i32 %12, 65280
%14 = load i32, i32* %8
%15 = and i32 %14, 65280
%16 = add nsw i32 %13, %15
%17 = mul nsw i32 %16, 3
%18 = add nsw i32 %11, %17
%19 = and i32 %18, 522240
%20 = load i32, i32* %6
%21 = and i32 %20, 16711935
%22 = mul nsw i32 %21, 2
%23 = load i32, i32* %7
%24 = and i32 %23, 16711935
%25 = load i32, i32* %8
%26 = and i32 %25, 16711935
%27 = add nsw i32 %24, %26
%28 = mul nsw i32 %27, 3
%29 = add nsw i32 %22, %28
%30 = and i32 %29, 133695480
%31 = add nsw i32 %19, %30
%32 = ashr i32 %31, 3
%33 = load i8*, i8** %5
%34 = bitcast i8* %33 to i32*
store i32 %32, i32* %34
ret void
}

LLVM IR (-O2):
define void @Interp9(i8* nocapture writeonly %0, i32 %1, i32 %2, i32 %3) {
%5 = shl i32 %1, 1
%6 = and i32 %5, 130560
%7 = and i32 %2, 65280
%8 = and i32 %3, 65280
%9 = add nuw nsw i32 %8, %7
%10 = mul nuw nsw i32 %9, 3
%11 = add nuw nsw i32 %10, %6
%12 = and i32 %11, 522240
%13 = and i32 %5, 33423870
%14 = and i32 %2, 16711935
%15 = and i32 %3, 16711935
%16 = add nuw nsw i32 %15, %14
%17 = mul nuw nsw i32 %16, 3
%18 = add nuw nsw i32 %17, %13
%19 = and i32 %18, 133695480
%20 = or i32 %12, %19
%21 = lshr exact i32 %20, 3
%22 = bitcast i8* %0 to i32*
store i32 %21, i32* %22
ret void
}
/* Type definitions */
struct unw_frame_info {
  int dummy;
};

/* Variables and functions */
int unw_access_br(struct unw_frame_info *, int, unsigned long *, int);
int unw_set_br(struct unw_frame_info *i, int n, unsigned long v) {
  return unw_access_br(i, n, &v, 1);
}


x86 assembly (clang, -O0):
<unw_set_br>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
lea    -0x18(%rbp),%rdx
mov    $0x1,%ecx
call   1030 <unw_access_br@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unw_set_br>:
push   %rax
mov    %rdx,(%rsp)
mov    %rsp,%rdx
mov    $0x1,%ecx
call   1030 <unw_access_br@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.unw_frame_info = type { i32 }
define i32 @unw_set_br(%struct.unw_frame_info* %0, i32 %1, i64 %2) {
%4 = alloca %struct.unw_frame_info*
%5 = alloca i32
%6 = alloca i64
store %struct.unw_frame_info* %0, %struct.unw_frame_info** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%7 = load %struct.unw_frame_info*, %struct.unw_frame_info** %4
%8 = load i32, i32* %5
%9 = call i32 @unw_access_br(%struct.unw_frame_info* %7, i32 %8, i64* %6, i32 1)
ret i32 %9
}

LLVM IR (-O2):
%struct.unw_frame_info = type { i32 }
define i32 @unw_set_br(%struct.unw_frame_info* %0, i32 %1, i64 %2) {
%4 = alloca i64
store i64 %2, i64* %4
%5 = call i32 @unw_access_br(%struct.unw_frame_info* %0, i32 %1, i64* %4, i32 1)
ret i32 %5
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int x, y, z;
  x = __VERIFIER_nondet_int();
  y = __VERIFIER_nondet_int();
  z = __VERIFIER_nondet_int();
  while (x > 0) {
    x = x + y;
    y = y + z;
    z = z + 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1167 <main+0x57>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    113d <main+0x2d>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %5, i32* %2
%6 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %6, i32* %3
%7 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %7, i32* %4
br label %8
8: ; preds = %11, %0
%9 = load i32, i32* %2
%10 = icmp sgt i32 %9, 0
br i1 %10, label %11, label %20
11: ; preds = %8
%12 = load i32, i32* %2
%13 = load i32, i32* %3
%14 = add nsw i32 %12, %13
store i32 %14, i32* %2
%15 = load i32, i32* %3
%16 = load i32, i32* %4
%17 = add nsw i32 %15, %16
store i32 %17, i32* %3
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %8
20: ; preds = %8
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 (...) @__VERIFIER_nondet_int()
%3 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void printError() { printf("ERROR!\n"); }


x86 assembly (clang, -O0):
<printError>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<printError>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"ERROR!\0A\00"
define void @printError() {
%1 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [7 x i8] c"ERROR!\00"
define void @printError() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ printf(char *, long double, long long, long long);
void check_ll(long double ld, long long ll) {
  if ((long long)ld != ll) {
    printf("ld: %Lf expect: %lld result: %lld\n", ld, ll, (long long)ld);
    abort();
  }
}


x86 assembly (clang, -O0):
<check_ll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
mov    %rdi,-0x18(%rbp)
fldt   -0x10(%rbp)
fnstcw -0x2a(%rbp)
movzwl -0x2a(%rbp),%eax
or     $0xc00,%eax
mov    %ax,-0x2c(%rbp)
fldcw  -0x2c(%rbp)
fistpll -0x20(%rbp)
fldcw  -0x2a(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
je     119c <check_ll+0x7c>
fldt   -0x10(%rbp)
fld    %st(0)
mov    -0x18(%rbp),%rsi
fnstcw -0x2e(%rbp)
movzwl -0x2e(%rbp),%eax
or     $0xc00,%eax
mov    %ax,-0x30(%rbp)
fldcw  -0x30(%rbp)
fxch   %st(1)
fistpll -0x28(%rbp)
fldcw  -0x2e(%rbp)
mov    -0x28(%rbp),%rdx
mov    %rsp,%rax
fstpt  (%rax)
lea    0xe70(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_ll>:
sub    $0x28,%rsp
fldt   0x30(%rsp)
fnstcw 0x1c(%rsp)
movzwl 0x1c(%rsp),%eax
or     $0xc00,%eax
mov    %ax,0x1e(%rsp)
fldcw  0x1e(%rsp)
fld    %st(0)
fistpll 0x20(%rsp)
fldcw  0x1c(%rsp)
mov    0x20(%rsp),%rdx
cmp    %rdi,%rdx
jne    115a <check_ll+0x3a>
fstp   %st(0)
add    $0x28,%rsp
ret
mov    %rdi,%rsi
fstpt  (%rsp)
lea    0xe99(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"ld: %Lf expect: %lld result: %lld\0A\00"
define void @check_ll(x86_fp80 %0, i64 %1) {
%3 = alloca x86_fp80
%4 = alloca i64
store x86_fp80 %0, x86_fp80* %3
store i64 %1, i64* %4
%5 = load x86_fp80, x86_fp80* %3
%6 = fptosi x86_fp80 %5 to i64
%7 = load i64, i64* %4
%8 = icmp ne i64 %6, %7
br i1 %8, label %9, label %16
9: ; preds = %2
%10 = load x86_fp80, x86_fp80* %3
%11 = load i64, i64* %4
%12 = load x86_fp80, x86_fp80* %3
%13 = fptosi x86_fp80 %12 to i64
%14 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), x86_fp80 %10, i64 %11, i64 %13)
%15 = call i32 (...) @abort()
unreachable
16: ; preds = %2
ret void
}

LLVM IR (-O2):
@.str = [35 x i8] c"ld: %Lf expect: %lld result: %lld\0A\00"
define void @check_ll(x86_fp80 %0, i64 %1) {
%3 = fptosi x86_fp80 %0 to i64
%4 = icmp eq i64 %3, %1
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), x86_fp80 %0, i64 %1, i64 %3)
%7 = tail call i32 (...) @abort()
unreachable
8: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int checkarg(int argc) {
  if (argc >= 4)
    return 1;
  else {
    printf("calci: Syntax error\n");
    return 0;
  }
}


x86 assembly (clang, -O0):
<checkarg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x4,-0x8(%rbp)
jl     1131 <checkarg+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1144 <checkarg+0x34>
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkarg>:
mov    $0x1,%eax
cmp    $0x3,%edi
jg     112d <checkarg+0x1d>
push   %rax
lea    0xede(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
@.str = [21 x i8] c"calci: Syntax error\0A\00"
define i32 @checkarg(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 4
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %9
7: ; preds = %1
%8 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
store i32 0, i32* %2
br label %9
9: ; preds = %7, %6
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
@str = [20 x i8] c"calci: Syntax error\00"
define i32 @checkarg(i32 %0) {
%2 = icmp sgt i32 %0, 3
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
br label %5
5: ; preds = %1, %3
%6 = phi i32 [ 0, %3 ], [ 1, %1 ]
ret i32 %6
}
long line_absolute(string)
char *string[];
{
  long px, py, level;
  if (sscanf(*string, "%d %d %d", &px, &py, &level) != 3)
    return (0);
  if (!char_putline(px, py, level))
    return (0);
  return (1);
}


x86 assembly (clang, -O0):
<line_absolute>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
lea    0xec6(%rip),%rsi
lea    -0x18(%rbp),%rdx
lea    -0x20(%rbp),%rcx
lea    -0x28(%rbp),%r8
mov    $0x0,%al
call   1040 <sscanf@plt>
cmp    $0x3,%eax
je     1163 <line_absolute+0x43>
movq   $0x0,-0x8(%rbp)
jmp    1194 <line_absolute+0x74>
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x28(%rbp),%rdx
mov    $0x0,%al
call   1030 <char_putline@plt>
cmp    $0x0,%eax
jne    118c <line_absolute+0x6c>
movq   $0x0,-0x8(%rbp)
jmp    1194 <line_absolute+0x74>
movq   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<line_absolute>:
push   %rbx
sub    $0x20,%rsp
mov    (%rdi),%rdi
lea    0xed1(%rip),%rsi
xor    %ebx,%ebx
lea    0x18(%rsp),%rdx
lea    0x10(%rsp),%rcx
lea    0x8(%rsp),%r8
xor    %eax,%eax
call   1040 <sscanf@plt>
cmp    $0x3,%eax
jne    1169 <line_absolute+0x49>
mov    0x18(%rsp),%rdi
mov    0x10(%rsp),%rsi
mov    0x8(%rsp),%rdx
xor    %eax,%eax
call   1030 <char_putline@plt>
xor    %ebx,%ebx
test   %eax,%eax
setne  %bl
mov    %rbx,%rax
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"%d %d %d\00"
define i64 @line_absolute(i8** %0) {
%2 = alloca i64
%3 = alloca i8**
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i8** %0, i8*** %3
%7 = load i8**, i8*** %3
%8 = load i8*, i8** %7
%9 = call i32 (i8*, i8*, ...) @sscanf(i8* %8, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64* %4, i64* %5, i64* %6)
%10 = icmp ne i32 %9, 3
br i1 %10, label %11, label %12
11: ; preds = %1
store i64 0, i64* %2
br label %20
12: ; preds = %1
%13 = load i64, i64* %4
%14 = load i64, i64* %5
%15 = load i64, i64* %6
%16 = call i32 (i64, i64, i64, ...) bitcast (i32 (...)* @char_putline to i32 (i64, i64, i64, ...)*)(i64 %13, i64 %14, i64 %15)
%17 = icmp ne i32 %16, 0
br i1 %17, label %19, label %18
18: ; preds = %12
store i64 0, i64* %2
br label %20
19: ; preds = %12
store i64 1, i64* %2
br label %20
20: ; preds = %19, %18, %11
%21 = load i64, i64* %2
ret i64 %21
}

LLVM IR (-O2):
@.str = [9 x i8] c"%d %d %d\00"
define i64 @line_absolute(i8** nocapture %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = bitcast i64* %2 to i8*
%6 = bitcast i64* %3 to i8*
%7 = bitcast i64* %4 to i8*
%8 = load i8*, i8** %0
%9 = call i32 (i8*, i8*, ...) @sscanf(i8* %8, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64* %2, i64* %3, i64* %4)
%10 = icmp eq i32 %9, 3
br i1 %10, label %11, label %18
11: ; preds = %1
%12 = load i64, i64* %2
%13 = load i64, i64* %3
%14 = load i64, i64* %4
%15 = call i32 (i64, i64, i64, ...) bitcast (i32 (...)* @char_putline to i32 (i64, i64, i64, ...)*)(i64 %12, i64 %13, i64 %14)
%16 = icmp ne i32 %15, 0
%17 = zext i1 %16 to i64
br label %18
18: ; preds = %11, %1
%19 = phi i64 [ 0, %1 ], [ %17, %11 ]
ret i64 %19
}
void dbg_command(void) {}


x86 assembly (clang, -O0):
<dbg_command>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbg_command>:
ret

LLVM IR (-O0):
define void @dbg_command() {
ret void
}

LLVM IR (-O2):
define void @dbg_command() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ OPER_AW_16();
int /*<<< orphan*/ m68ki_set_ccr(int /*<<< orphan*/);
void m68k_op_move_16_toc_aw(void) { m68ki_set_ccr(OPER_AW_16()); }


x86 assembly (clang, -O0):
<m68k_op_move_16_toc_aw>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <OPER_AW_16@plt>
mov    %eax,%edi
call   1040 <m68ki_set_ccr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_move_16_toc_aw>:
push   %rax
xor    %eax,%eax
call   1030 <OPER_AW_16@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <m68ki_set_ccr@plt>

LLVM IR (-O0):
define void @m68k_op_move_16_toc_aw() {
%1 = call i32 (...) @OPER_AW_16()
%2 = call i32 @m68ki_set_ccr(i32 %1)
ret void
}

LLVM IR (-O2):
define void @m68k_op_move_16_toc_aw() {
%1 = tail call i32 (...) @OPER_AW_16()
%2 = tail call i32 @m68ki_set_ccr(i32 %1)
ret void
}
/* Type definitions */
struct pt_packet_decoder {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct pt_packet_decoder *);
int /*<<< orphan*/ pt_pkt_decoder_fini(struct pt_packet_decoder *);
void pt_pkt_free_decoder(struct pt_packet_decoder *decoder) {
  pt_pkt_decoder_fini(decoder);
  free(decoder);
}


x86 assembly (clang, -O0):
<pt_pkt_free_decoder>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <pt_pkt_decoder_fini@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pt_pkt_free_decoder>:
push   %rbx
mov    %rdi,%rbx
call   1040 <pt_pkt_decoder_fini@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.pt_packet_decoder = type { i32 }
define void @pt_pkt_free_decoder(%struct.pt_packet_decoder* %0) {
%2 = alloca %struct.pt_packet_decoder*
store %struct.pt_packet_decoder* %0, %struct.pt_packet_decoder** %2
%3 = load %struct.pt_packet_decoder*, %struct.pt_packet_decoder** %2
%4 = call i32 @pt_pkt_decoder_fini(%struct.pt_packet_decoder* %3)
%5 = load %struct.pt_packet_decoder*, %struct.pt_packet_decoder** %2
%6 = call i32 @free(%struct.pt_packet_decoder* %5)
ret void
}

LLVM IR (-O2):
%struct.pt_packet_decoder = type { i32 }
define void @pt_pkt_free_decoder(%struct.pt_packet_decoder* %0) {
%2 = tail call i32 @pt_pkt_decoder_fini(%struct.pt_packet_decoder* %0)
%3 = tail call i32 @free(%struct.pt_packet_decoder* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ check_scan_line_int(double, int);
int get_lines_since_vbl(double);
void check_for_new_scan_int(double dcycs) {
  int cur_video_line;
  cur_video_line = get_lines_since_vbl(dcycs) >> 8;
  check_scan_line_int(dcycs, cur_video_line);
}


x86 assembly (clang, -O0):
<check_for_new_scan_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <get_lines_since_vbl@plt>
sar    $0x8,%eax
mov    %eax,-0xc(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    -0xc(%rbp),%edi
call   1030 <check_scan_line_int@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_for_new_scan_int>:
push   %rax
movsd  %xmm0,(%rsp)
call   1040 <get_lines_since_vbl@plt>
sar    $0x8,%eax
movsd  (%rsp),%xmm0
mov    %eax,%edi
pop    %rax
jmp    1030 <check_scan_line_int@plt>

LLVM IR (-O0):
define void @check_for_new_scan_int(double %0) {
%2 = alloca double
%3 = alloca i32
store double %0, double* %2
%4 = load double, double* %2
%5 = call i32 @get_lines_since_vbl(double %4)
%6 = ashr i32 %5, 8
store i32 %6, i32* %3
%7 = load double, double* %2
%8 = load i32, i32* %3
%9 = call i32 @check_scan_line_int(double %7, i32 %8)
ret void
}

LLVM IR (-O2):
define void @check_for_new_scan_int(double %0) {
%2 = tail call i32 @get_lines_since_vbl(double %0)
%3 = ashr i32 %2, 8
%4 = tail call i32 @check_scan_line_int(double %0, i32 %3)
ret void
}
/* Variables and functions */
scalar_t__ strcmp(char *, char *);
void strcmp_embedded_null() {
  if (strcmp("\0z", "\0y") != 0)
    (void)*(char *)0;
}


x86 assembly (clang, -O0):
<strcmp_embedded_null>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee1(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
je     1131 <strcmp_embedded_null+0x21>
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp_embedded_null>:
lea    0xee9(%rip),%rdi
lea    0xee5(%rip),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"\00z\00"
@.str.1 = [3 x i8] c"\00y\00"
define void @strcmp_embedded_null() {
%1 = call i64 @strcmp(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = load i8, i8* null
br label %5
5: ; preds = %3, %0
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"\00z\00"
@.str.1 = [3 x i8] c"\00y\00"
define void @strcmp_embedded_null() {
%1 = tail call i64 @strcmp(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ jstp_tx_char(char);
void jstp_tx_array_end() { jstp_tx_char(']'); }


x86 assembly (clang, -O0):
<jstp_tx_array_end>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5d,%edi
call   1030 <jstp_tx_char@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<jstp_tx_array_end>:
mov    $0x5d,%edi
jmp    1030 <jstp_tx_char@plt>

LLVM IR (-O0):
define void @jstp_tx_array_end() {
%1 = call i32 @jstp_tx_char(i8 signext 93)
ret void
}

LLVM IR (-O2):
define void @jstp_tx_array_end() {
%1 = tail call i32 @jstp_tx_char(i8 signext 93)
ret void
}
int _sl4_hash_comp_int(const void *key1, const void *key2) {
  return (*(int *)key1) - (*(int *)key2);
}


x86 assembly (clang, -O0):
<_sl4_hash_comp_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_sl4_hash_comp_int>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @_sl4_hash_comp_int(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @_sl4_hash_comp_int(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}
void P_programinit() {}


x86 assembly (clang, -O0):
<P_programinit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<P_programinit>:
ret

LLVM IR (-O0):
define void @P_programinit() {
ret void
}

LLVM IR (-O2):
define void @P_programinit() {
ret void
}
/* Type definitions */
typedef scalar_t__ uint_fast32_t;

/* Variables and functions */
bool SHAREMIND_MAP_KEY_EQUALS_uint_fast32_t(uint_fast32_t const k1,
                                            uint_fast32_t const k2) {
  return k1 == k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_EQUALS_uint_fast32_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_EQUALS_uint_fast32_t>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_MAP_KEY_EQUALS_uint_fast32_t(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @SHAREMIND_MAP_KEY_EQUALS_uint_fast32_t(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
void sub_sigma9(double lay_evtor, double lay_ro, double qc, double *sg_ptr) {
  double ev_mev, ev_rad, sg_si;
  ev_mev = lay_evtor * 1.0E-6 * qc / lay_ro;
  ev_rad = ev_mev * 1.601E-12 * 1.0E4;
  sg_si = 2.0E-16 * ev_rad;
  *sg_ptr = 9.0E9 * sg_si;
}


x86 assembly (clang, -O0):
<sub_sigma9>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
mov    %rdi,-0x20(%rbp)
movsd  0xf01(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
divsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  0xedd(%rip),%xmm0
mulsd  -0x28(%rbp),%xmm0
movsd  0xec8(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  0xeaf(%rip),%xmm0
mulsd  -0x30(%rbp),%xmm0
movsd  %xmm0,-0x38(%rbp)
movsd  0xe95(%rip),%xmm0
mulsd  -0x38(%rbp),%xmm0
mov    -0x20(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub_sigma9>:
mulsd  0xef8(%rip),%xmm0
mulsd  %xmm2,%xmm0
divsd  %xmm1,%xmm0
mulsd  0xef0(%rip),%xmm0
mulsd  0xef0(%rip),%xmm0
mulsd  0xef0(%rip),%xmm0
mulsd  0xef0(%rip),%xmm0
movsd  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @sub_sigma9(double %0, double %1, double %2, double* %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double*
%9 = alloca double
%10 = alloca double
%11 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double* %3, double** %8
%12 = load double, double* %5
%13 = fmul double %12, 0x3EB0C6F7A0B5ED8D
%14 = load double, double* %7
%15 = fmul double %13, %14
%16 = load double, double* %6
%17 = fdiv double %15, %16
store double %17, double* %9
%18 = load double, double* %9
%19 = fmul double %18, 1.601000e-12
%20 = fmul double %19, 1.000000e+04
store double %20, double* %10
%21 = load double, double* %10
%22 = fmul double 2.000000e-16, %21
store double %22, double* %11
%23 = load double, double* %11
%24 = fmul double 9.000000e+09, %23
%25 = load double*, double** %8
store double %24, double* %25
ret void
}

LLVM IR (-O2):
define void @sub_sigma9(double %0, double %1, double %2, double* nocapture writeonly %3) {
%5 = fmul double %0, 0x3EB0C6F7A0B5ED8D
%6 = fmul double %5, %2
%7 = fdiv double %6, %1
%8 = fmul double %7, 1.601000e-12
%9 = fmul double %8, 1.000000e+04
%10 = fmul double %9, 2.000000e-16
%11 = fmul double %10, 9.000000e+09
store double %11, double* %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, int /*<<< orphan*/);
char *mklabel() {
  static int id = 0;
  static char buf[32];
  snprintf(buf, sizeof(buf), "F_%d", id++);
  return buf;
}


x86 assembly (clang, -O0):
<mklabel>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f26(%rip),%ecx
mov    %ecx,%eax
add    $0x1,%eax
mov    %eax,0x2f1b(%rip)
lea    0x2f24(%rip),%rdi
mov    $0x20,%esi
lea    0xec8(%rip),%rdx
call   1030 <snprintf@plt>
lea    0x2f0c(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mklabel>:
push   %rbx
mov    0x2f29(%rip),%ecx
lea    0x1(%rcx),%eax
mov    %eax,0x2f20(%rip)
lea    0x2f29(%rip),%rbx
lea    0xed2(%rip),%rdx
mov    %rbx,%rdi
mov    $0x20,%esi
call   1030 <snprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@mklabel.id = internal global i32 0
@mklabel.buf = internal global [32 x i8] zeroinitializer
@.str = [5 x i8] c"F_%d\00"
define i8* @mklabel() {
%1 = load i32, i32* @mklabel.id
%2 = add nsw i32 %1, 1
store i32 %2, i32* @mklabel.id
%3 = call i32 @snprintf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @mklabel.buf, i64 0, i64 0), i32 32, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i8* getelementptr inbounds ([32 x i8], [32 x i8]* @mklabel.buf, i64 0, i64 0)
}

LLVM IR (-O2):
@mklabel.id = internal unnamed_addr global i32 0
@mklabel.buf = internal global [32 x i8] zeroinitializer
@.str = [5 x i8] c"F_%d\00"
define i8* @mklabel() {
%1 = load i32, i32* @mklabel.id
%2 = add nsw i32 %1, 1
store i32 %2, i32* @mklabel.id
%3 = tail call i32 @snprintf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @mklabel.buf, i64 0, i64 0), i32 32, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i8* getelementptr inbounds ([32 x i8], [32 x i8]* @mklabel.buf, i64 0, i64 0)
}
/* Type definitions */
struct compile_state {
  int dummy;
};

/* Variables and functions */
unsigned int arch_regcm_normalize(struct compile_state *, unsigned int);
unsigned arch_regcm_reg_normalize(struct compile_state *state, unsigned regcm) {
  regcm = arch_regcm_normalize(state, regcm);
  regcm &= ~((1 << 11) | (1 << 12) | (1 << 13));
  return regcm;
}


x86 assembly (clang, -O0):
<arch_regcm_reg_normalize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <arch_regcm_normalize@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xffffc7ff,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_regcm_reg_normalize>:
push   %rax
call   1030 <arch_regcm_normalize@plt>
and    $0xffffc7ff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.compile_state = type { i32 }
define i32 @arch_regcm_reg_normalize(%struct.compile_state* %0, i32 %1) {
%3 = alloca %struct.compile_state*
%4 = alloca i32
store %struct.compile_state* %0, %struct.compile_state** %3
store i32 %1, i32* %4
%5 = load %struct.compile_state*, %struct.compile_state** %3
%6 = load i32, i32* %4
%7 = call i32 @arch_regcm_normalize(%struct.compile_state* %5, i32 %6)
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = and i32 %8, -14337
store i32 %9, i32* %4
%10 = load i32, i32* %4
ret i32 %10
}

LLVM IR (-O2):
%struct.compile_state = type { i32 }
define i32 @arch_regcm_reg_normalize(%struct.compile_state* %0, i32 %1) {
%3 = tail call i32 @arch_regcm_normalize(%struct.compile_state* %0, i32 %1)
%4 = and i32 %3, -14337
ret i32 %4
}
int isAlpha(char c) {
  return (((c >= 'a') && (c <= 'z')) || ((c >= 'A') && (c <= 'Z')));
}


x86 assembly (clang, -O0):
<isAlpha>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x61,%eax
jl     1129 <isAlpha+0x29>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x7a,%ecx
mov    %al,-0x2(%rbp)
jle    114e <isAlpha+0x4e>
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x41,%ecx
mov    %al,-0x3(%rbp)
jl     1148 <isAlpha+0x48>
movsbl -0x1(%rbp),%eax
cmp    $0x5a,%eax
setle  %al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isAlpha>:
and    $0xdf,%dil
add    $0xbf,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @isAlpha(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 122
br i1 %9, label %20, label %10
10: ; preds = %6, %1
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp sge i32 %12, 65
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp sle i32 %16, 90
br label %18
18: ; preds = %14, %10
%19 = phi i1 [ false, %10 ], [ %17, %14 ]
br label %20
20: ; preds = %18, %6
%21 = phi i1 [ true, %6 ], [ %19, %18 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @isAlpha(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
struct lframe {
  int dummy;
};
struct lemon {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ machine_push_frame(struct lemon *, struct lframe *);
void lemon_machine_push_frame(struct lemon *lemon, struct lframe *frame) {
  machine_push_frame(lemon, frame);
}


x86 assembly (clang, -O0):
<lemon_machine_push_frame>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <machine_push_frame@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lemon_machine_push_frame>:
jmp    1030 <machine_push_frame@plt>

LLVM IR (-O0):
%struct.lemon = type { i32 }
%struct.lframe = type { i32 }
define void @lemon_machine_push_frame(%struct.lemon* %0, %struct.lframe* %1) {
%3 = alloca %struct.lemon*
%4 = alloca %struct.lframe*
store %struct.lemon* %0, %struct.lemon** %3
store %struct.lframe* %1, %struct.lframe** %4
%5 = load %struct.lemon*, %struct.lemon** %3
%6 = load %struct.lframe*, %struct.lframe** %4
%7 = call i32 @machine_push_frame(%struct.lemon* %5, %struct.lframe* %6)
ret void
}

LLVM IR (-O2):
%struct.lemon = type { i32 }
%struct.lframe = type { i32 }
define void @lemon_machine_push_frame(%struct.lemon* %0, %struct.lframe* %1) {
%3 = tail call i32 @machine_push_frame(%struct.lemon* %0, %struct.lframe* %1)
ret void
}
int m_strcmp(const char *ss, const char *st) {
  int ret, d0, d1;
  asm volatile("1:\n\t"
               "lodsb\n\t"
               "scasb\n\t"
               "jne 2f\n\t"
               "testb %%al, %%al\n\t"
               "jne 1b\n\t"
               "xorl %%eax, %%eax\n\t"
               "jmp 3f\n\t"
               "2:\n\t"
               "sbbl %%eax, %%eax\n\t"
               "orb $1, %%al\n\t"
               "3:"
               : "=&S"(d0), "=&D"(d1), "=a"(ret)
               : "0"(ss), "1"(st)
               : "memory");
  return ret;
}


x86 assembly (clang, -O0):
<m_strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdi
lods   %ds:(%rsi),%al
scas   %es:(%rdi),%al
jne    112b <m_strcmp+0x2b>
test   %al,%al
jne    1114 <m_strcmp+0x14>
xor    %eax,%eax
jmp    112f <m_strcmp+0x2f>
sbb    %eax,%eax
or     $0x1,%al
mov    %esi,%ecx
mov    %ecx,-0x18(%rbp)
mov    %edi,%ecx
mov    %ecx,-0x1c(%rbp)
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<m_strcmp>:
mov    %rsi,%rax
mov    %rdi,%rsi
mov    %rax,%rdi
lods   %ds:(%rsi),%al
scas   %es:(%rdi),%al
jne    1115 <m_strcmp+0x15>
test   %al,%al
jne    1109 <m_strcmp+0x9>
xor    %eax,%eax
jmp    1119 <m_strcmp+0x19>
sbb    %eax,%eax
or     $0x1,%al
ret

LLVM IR (-O0):
define i32 @m_strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%8 = load i8*, i8** %3
%9 = load i8*, i8** %4
%10 = call { i8*, i8*, i32 } asm sideeffect "1:\0A\09lodsb\0A\09scasb\0A\09jne 2f\0A\09testb %al, %al\0A\09jne 1b\0A\09xorl %eax, %eax\0A\09jmp 3f\0A\092:\0A\09sbbl %eax, %eax\0A\09orb $$1, %al\0A\093:", "=&{si},=&{di},={ax},0,1,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %8, i8* %9)
%11 = extractvalue { i8*, i8*, i32 } %10, 0
%12 = extractvalue { i8*, i8*, i32 } %10, 1
%13 = extractvalue { i8*, i8*, i32 } %10, 2
%14 = ptrtoint i8* %11 to i64
%15 = trunc i64 %14 to i32
store i32 %15, i32* %6
%16 = ptrtoint i8* %12 to i64
%17 = trunc i64 %16 to i32
store i32 %17, i32* %7
store i32 %13, i32* %5
%18 = load i32, i32* %5
ret i32 %18
}

LLVM IR (-O2):
define i32 @m_strcmp(i8* %0, i8* %1) {
%3 = tail call { i8*, i8*, i32 } asm sideeffect "1:\0A\09lodsb\0A\09scasb\0A\09jne 2f\0A\09testb %al, %al\0A\09jne 1b\0A\09xorl %eax, %eax\0A\09jmp 3f\0A\092:\0A\09sbbl %eax, %eax\0A\09orb $$1, %al\0A\093:", "=&{si},=&{di},={ax},0,1,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %0, i8* %1)
%4 = extractvalue { i8*, i8*, i32 } %3, 2
ret i32 %4
}
float obdConvert_45(unsigned int A, unsigned int B, unsigned int C,
                    unsigned int D) {
  return (float)A * 100.0f / 255.0f;
}


x86 assembly (clang, -O0):
<obdConvert_45>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
cvtsi2ss %rax,%xmm0
movss  0xee4(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xed4(%rip),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<obdConvert_45>:
mov    %edi,%eax
cvtsi2ss %rax,%xmm0
mulss  0xef1(%rip),%xmm0
divss  0xeed(%rip),%xmm0
ret

LLVM IR (-O0):
define float @obdConvert_45(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = uitofp i32 %9 to float
%11 = fmul float %10, 1.000000e+02
%12 = fdiv float %11, 2.550000e+02
ret float %12
}

LLVM IR (-O2):
define float @obdConvert_45(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = uitofp i32 %0 to float
%6 = fmul float %5, 1.000000e+02
%7 = fdiv float %6, 2.550000e+02
ret float %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("This is a native C program.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"This is a native C program.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [28 x i8] c"This is a native C program.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
ret i32 0
}
unsigned long http_parser_version(void) {
  return 2 * 0x10000 | 7 * 0x00100 | 0 * 0x00001;
}


x86 assembly (clang, -O0):
<http_parser_version>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20700,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<http_parser_version>:
mov    $0x20700,%eax
ret

LLVM IR (-O0):
define i64 @http_parser_version() {
ret i64 132864
}

LLVM IR (-O2):
define i64 @http_parser_version() {
ret i64 132864
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ I2CSlaveBaseValid(unsigned long);
void I2CSlaveIntClearEx(unsigned long ulBase, unsigned long ulIntFlags) {
  DEBUG_ASSERT(I2CSlaveBaseValid(ulBase));
  (*((volatile unsigned long *)(ulBase + 0x00000018))) = ulIntFlags;
}


x86 assembly (clang, -O0):
<I2CSlaveIntClearEx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <I2CSlaveBaseValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x18(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CSlaveIntClearEx>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <I2CSlaveBaseValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    %r14,0x18(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @I2CSlaveIntClearEx(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = call i32 @I2CSlaveBaseValid(i64 %5)
%7 = call i32 @DEBUG_ASSERT(i32 %6)
%8 = load i64, i64* %4
%9 = load i64, i64* %3
%10 = add i64 %9, 24
%11 = inttoptr i64 %10 to i64*
store volatile i64 %8, i64* %11
ret void
}

LLVM IR (-O2):
define void @I2CSlaveIntClearEx(i64 %0, i64 %1) {
%3 = tail call i32 @I2CSlaveBaseValid(i64 %0)
%4 = tail call i32 @DEBUG_ASSERT(i32 %3)
%5 = add i64 %0, 24
%6 = inttoptr i64 %5 to i64*
store volatile i64 %1, i64* %6
ret void
}
void SysCtlGPIOAHBDisable(unsigned long ulGPIOPeripheral) {

  ;
  (*((volatile unsigned long *)(0x400FE06C))) &= ~(ulGPIOPeripheral & 0xFFFF);
}


x86 assembly (clang, -O0):
<SysCtlGPIOAHBDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0xffff,%rax
xor    $0xffffffffffffffff,%rax
mov    $0x400fe06c,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0x400fe06c,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlGPIOAHBDisable>:
not    %edi
or     $0xffffffffffff0000,%rdi
and    %rdi,0x400fe06c
40
ret

LLVM IR (-O0):
define void @SysCtlGPIOAHBDisable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 65535
%5 = xor i64 %4, -1
%6 = load volatile i64, i64* inttoptr (i64 1074782316 to i64*)
%7 = and i64 %6, %5
store volatile i64 %7, i64* inttoptr (i64 1074782316 to i64*)
ret void
}

LLVM IR (-O2):
define void @SysCtlGPIOAHBDisable(i64 %0) {
%2 = and i64 %0, 65535
%3 = xor i64 %2, -1
%4 = load volatile i64, i64* inttoptr (i64 1074782316 to i64*)
%5 = and i64 %4, %3
store volatile i64 %5, i64* inttoptr (i64 1074782316 to i64*)
ret void
}