xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ wordexp_t;

/* Variables and functions */
int PTHREAD_CANCEL_DISABLE;
int do_wordexp(char const *, int /*<<< orphan*/ *, int);
int /*<<< orphan*/ pthread_setcancelstate(int, int *);
int wordexp(const char *s, wordexp_t *we, int flags) {
  int r, cs;
  pthread_setcancelstate(PTHREAD_CANCEL_DISABLE, &cs);
  r = do_wordexp(s, we, flags);
  pthread_setcancelstate(cs, 0);
  return r;
}


x86 assembly (clang, -O0):
<wordexp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2e9e(%rip),%rax
mov    (%rax),%edi
lea    -0x1c(%rbp),%rsi
call   1030 <pthread_setcancelstate@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <do_wordexp@plt>
mov    %eax,-0x18(%rbp)
mov    -0x1c(%rbp),%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <pthread_setcancelstate@plt>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wordexp>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
mov    0x2ea0(%rip),%rax
mov    (%rax),%edi
lea    0xc(%rsp),%rsi
call   1030 <pthread_setcancelstate@plt>
mov    %rbp,%rdi
mov    %rbx,%rsi
mov    %r14d,%edx
call   1040 <do_wordexp@plt>
mov    %eax,%ebx
mov    0xc(%rsp),%edi
xor    %esi,%esi
call   1030 <pthread_setcancelstate@plt>
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@PTHREAD_CANCEL_DISABLE = global i32 0
define i32 @wordexp(i8* %0, i32* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%9 = load i32, i32* @PTHREAD_CANCEL_DISABLE
%10 = call i32 @pthread_setcancelstate(i32 %9, i32* %8)
%11 = load i8*, i8** %4
%12 = load i32*, i32** %5
%13 = load i32, i32* %6
%14 = call i32 @do_wordexp(i8* %11, i32* %12, i32 %13)
store i32 %14, i32* %7
%15 = load i32, i32* %8
%16 = call i32 @pthread_setcancelstate(i32 %15, i32* null)
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
@PTHREAD_CANCEL_DISABLE = global i32 0
define i32 @wordexp(i8* %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = bitcast i32* %4 to i8*
%6 = load i32, i32* @PTHREAD_CANCEL_DISABLE
%7 = call i32 @pthread_setcancelstate(i32 %6, i32* %4)
%8 = call i32 @do_wordexp(i8* %0, i32* %1, i32 %2)
%9 = load i32, i32* %4
%10 = call i32 @pthread_setcancelstate(i32 %9, i32* null)
ret i32 %8
}
int strcmp(register const char *s1, register const char *s2) {
  int r;
  while (
      ((r = ((int)(*((unsigned char *)s1))) - *((unsigned char *)s2++)) == 0) &&
      *s1++)
    ;
  return r;
}


x86 assembly (clang, -O0):
<strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
movzbl (%rax),%eax
sub    %eax,%ecx
mov    %ecx,-0x14(%rbp)
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x15(%rbp)
jne    1153 <strcmp+0x53>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
test   $0x1,%al
jne    1163 <strcmp+0x63>
jmp    1168 <strcmp+0x68>
jmp    110c <strcmp+0xc>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp>:
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%rdi,%rcx,1),%edx
movzbl (%rsi,%rcx,1),%r8d
mov    %edx,%eax
sub    %r8d,%eax
jne    1128 <strcmp+0x28>
add    $0x1,%rcx
test   %dl,%dl
jne    1110 <strcmp+0x10>
ret

LLVM IR (-O0):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %6
6: ; preds = %24, %2
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %4
%12 = load i8, i8* %10
%13 = zext i8 %12 to i32
%14 = sub nsw i32 %9, %13
store i32 %14, i32* %5
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %22
16: ; preds = %6
%17 = load i8*, i8** %3
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %3
%19 = load i8, i8* %17
%20 = sext i8 %19 to i32
%21 = icmp ne i32 %20, 0
br label %22
22: ; preds = %16, %6
%23 = phi i1 [ false, %6 ], [ %21, %16 ]
br i1 %23, label %24, label %25
24: ; preds = %22
br label %6
25: ; preds = %22
%26 = load i32, i32* %5
ret i32 %26
}

LLVM IR (-O2):
define i32 @strcmp(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %1, %2 ], [ %12, %3 ]
%5 = phi i8* [ %0, %2 ], [ %13, %3 ]
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = load i8, i8* %4
%9 = zext i8 %8 to i32
%10 = sub nsw i32 %7, %9
%11 = icmp ne i32 %10, 0
%12 = getelementptr inbounds i8, i8* %4, i64 1
%13 = getelementptr inbounds i8, i8* %5, i64 1
%14 = icmp eq i8 %6, 0
%15 = select i1 %11, i1 true, i1 %14
br i1 %15, label %16, label %3
16: ; preds = %3
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ md_run(int, char **);
int main(int argc, char *argv[]) {
  md_run(argc - 1, argv + 1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
mov    -0x10(%rbp),%rsi
add    $0x8,%rsi
call   1030 <md_run@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
add    $0xffffffff,%edi
add    $0x8,%rsi
call   1030 <md_run@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = load i8**, i8*** %5
%9 = getelementptr inbounds i8*, i8** %8, i64 1
%10 = call i32 @md_run(i32 %7, i8** %9)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = add nsw i32 %0, -1
%4 = getelementptr inbounds i8*, i8** %1, i64 1
%5 = tail call i32 @md_run(i32 %3, i8** %4)
ret i32 0
}
/* Type definitions */
struct dm_interface {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ DM_DEV_REMOVE;
int dev_cmd(struct dm_interface *, char const *, int /*<<< orphan*/,
            int /*<<< orphan*/);
int dm_remove_device(struct dm_interface *dmi, const char *name) {
  return dev_cmd(dmi, name, DM_DEV_REMOVE, 0);
}


x86 assembly (clang, -O0):
<dm_remove_device>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2eb1(%rip),%rax
mov    (%rax),%edx
xor    %ecx,%ecx
call   1030 <dev_cmd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dm_remove_device>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edx
xor    %ecx,%ecx
jmp    1030 <dev_cmd@plt>

LLVM IR (-O0):
%struct.dm_interface = type { i32 }
@DM_DEV_REMOVE = global i32 0
define i32 @dm_remove_device(%struct.dm_interface* %0, i8* %1) {
%3 = alloca %struct.dm_interface*
%4 = alloca i8*
store %struct.dm_interface* %0, %struct.dm_interface** %3
store i8* %1, i8** %4
%5 = load %struct.dm_interface*, %struct.dm_interface** %3
%6 = load i8*, i8** %4
%7 = load i32, i32* @DM_DEV_REMOVE
%8 = call i32 @dev_cmd(%struct.dm_interface* %5, i8* %6, i32 %7, i32 0)
ret i32 %8
}

LLVM IR (-O2):
%struct.dm_interface = type { i32 }
@DM_DEV_REMOVE = global i32 0
define i32 @dm_remove_device(%struct.dm_interface* %0, i8* %1) {
%3 = load i32, i32* @DM_DEV_REMOVE
%4 = tail call i32 @dev_cmd(%struct.dm_interface* %0, i8* %1, i32 %3, i32 0)
ret i32 %4
}
int getchar() {
__ESBMC_HIDE:;
  int return_value;
  return return_value;
}


x86 assembly (clang, -O0):
<getchar>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getchar>:
ret

LLVM IR (-O0):
define i32 @getchar() {
%1 = alloca i32
br label %2
2: ; preds = %0
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @getchar() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ gmove_G2L_1a1t_bc();
int main() {
  gmove_G2L_1a1t_bc();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <gmove_G2L_1a1t_bc@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <gmove_G2L_1a1t_bc@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @gmove_G2L_1a1t_bc()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @gmove_G2L_1a1t_bc()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ vx86_NBSB_Write16(int, unsigned char, unsigned short);
void nb1_Write16(unsigned char offset, unsigned short val) {
  vx86_NBSB_Write16(1, offset, val);
}


x86 assembly (clang, -O0):
<nb1_Write16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x1(%rbp),%al
mov    $0x1,%edi
movzbl %al,%esi
movzwl -0x4(%rbp),%edx
call   1030 <vx86_NBSB_Write16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nb1_Write16>:
mov    %esi,%edx
mov    %edi,%esi
mov    $0x1,%edi
jmp    1030 <vx86_NBSB_Write16@plt>

LLVM IR (-O0):
define void @nb1_Write16(i8 zeroext %0, i16 zeroext %1) {
%3 = alloca i8
%4 = alloca i16
store i8 %0, i8* %3
store i16 %1, i16* %4
%5 = load i8, i8* %3
%6 = load i16, i16* %4
%7 = call i32 @vx86_NBSB_Write16(i32 1, i8 zeroext %5, i16 zeroext %6)
ret void
}

LLVM IR (-O2):
define void @nb1_Write16(i8 zeroext %0, i16 zeroext %1) {
%3 = tail call i32 @vx86_NBSB_Write16(i32 1, i8 zeroext %0, i16 zeroext %1)
ret void
}
/* Type definitions */
struct pagevec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __pagevec_release_nonlru(struct pagevec *);
scalar_t__ pagevec_count(struct pagevec *);
void pagevec_release_nonlru(struct pagevec *pvec) {
  if (pagevec_count(pvec))
    __pagevec_release_nonlru(pvec);
}


x86 assembly (clang, -O0):
<pagevec_release_nonlru>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pagevec_count@plt>
cmp    $0x0,%rax
je     1148 <pagevec_release_nonlru+0x28>
mov    -0x8(%rbp),%rdi
call   1040 <__pagevec_release_nonlru@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pagevec_release_nonlru>:
push   %rbx
mov    %rdi,%rbx
call   1030 <pagevec_count@plt>
test   %rax,%rax
je     1137 <pagevec_release_nonlru+0x17>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <__pagevec_release_nonlru@plt>
pop    %rbx
ret

LLVM IR (-O0):
%struct.pagevec = type { i32 }
define void @pagevec_release_nonlru(%struct.pagevec* %0) {
%2 = alloca %struct.pagevec*
store %struct.pagevec* %0, %struct.pagevec** %2
%3 = load %struct.pagevec*, %struct.pagevec** %2
%4 = call i64 @pagevec_count(%struct.pagevec* %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load %struct.pagevec*, %struct.pagevec** %2
%8 = call i32 @__pagevec_release_nonlru(%struct.pagevec* %7)
br label %9
9: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
%struct.pagevec = type { i32 }
define void @pagevec_release_nonlru(%struct.pagevec* %0) {
%2 = tail call i64 @pagevec_count(%struct.pagevec* %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @__pagevec_release_nonlru(%struct.pagevec* %0)
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("hello\n\r");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"hello\0A\0D\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"hello\0A\0D\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
char *__malidrv_build_info(void) { return "malidrv_build_info"; }


x86 assembly (clang, -O0):
<__malidrv_build_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__malidrv_build_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [19 x i8] c"malidrv_build_info\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [19 x i8] c"malidrv_build_info\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0)
}
unsigned int mtts_increment(unsigned int ts_low) {
  if (++ts_low == 0) {
    ts_low = 0;
  }
  return (ts_low);
}


x86 assembly (clang, -O0):
<mtts_increment>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
jne    1120 <mtts_increment+0x20>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mtts_increment>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @mtts_increment(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 1
store i32 %4, i32* %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %1
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @mtts_increment(i32 %0) {
%2 = add i32 %0, 1
ret i32 %2
}
/* Variables and functions */
scalar_t__ isspace(char const);
char *libamg_str_skip_spaces(const char *str) {
  while (isspace(*str))
    str++;
  return (char *)str;
}


x86 assembly (clang, -O0):
<libamg_str_skip_spaces>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
je     1143 <libamg_str_skip_spaces+0x33>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <libamg_str_skip_spaces+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libamg_str_skip_spaces>:
push   %rbx
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rbx
nopl   0x0(%rax,%rax,1)
movsbl 0x1(%rbx),%edi
add    $0x1,%rbx
call   1030 <isspace@plt>
test   %rax,%rax
jne    1120 <libamg_str_skip_spaces+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @libamg_str_skip_spaces(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = call i64 @isspace(i8 signext %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
br label %3
11: ; preds = %3
%12 = load i8*, i8** %2
ret i8* %12
}

LLVM IR (-O2):
define i8* @libamg_str_skip_spaces(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %7, %2 ]
%4 = load i8, i8* %3
%5 = tail call i64 @isspace(i8 signext %4)
%6 = icmp eq i64 %5, 0
%7 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isprint(int);
void t_isprint_0x4c() {
  Assert_real((isprint(76)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              385, ("isprint should be 1 for L"));
}


x86 assembly (clang, -O0):
<t_isprint_0x4c>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4c,%edi
call   1030 <isprint@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x181,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0x4c>:
push   %rax
mov    $0x4c,%edi
call   1030 <isprint@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x181,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [26 x i8] c"isprint should be 1 for L\00"
define void @t_isprint_0x4c() {
%1 = call i32 @isprint(i32 76)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 385, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [26 x i8] c"isprint should be 1 for L\00"
define void @t_isprint_0x4c() {
%1 = tail call i32 @isprint(i32 76)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 385, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void kr_rc4_free_ctx(void *ctxv) { free(ctxv); }


x86 assembly (clang, -O0):
<kr_rc4_free_ctx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kr_rc4_free_ctx>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @kr_rc4_free_ctx(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @kr_rc4_free_ctx(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ C67_asm(char *, int, int /*<<< orphan*/, int /*<<< orphan*/);
void C67_PUSH(int r) { C67_asm("STW.D SP POST DEC", r, 0, 0); }


x86 assembly (clang, -O0):
<C67_PUSH>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
xor    %ecx,%ecx
mov    %ecx,%edx
call   1030 <C67_asm@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<C67_PUSH>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <C67_asm@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"STW.D SP POST DEC\00"
define void @C67_PUSH(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @C67_asm(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %3, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"STW.D SP POST DEC\00"
define void @C67_PUSH(i32 %0) {
%2 = tail call i32 @C67_asm(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %0, i32 0, i32 0)
ret void
}
/* Type definitions */
struct disk_info {
  int dummy;
};

/* Variables and functions */
int get_blockptr_size(struct disk_info *);
int get_program_table_size(struct disk_info *info) {
  return 512 / get_blockptr_size(info) - 1;
}


x86 assembly (clang, -O0):
<get_program_table_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <get_blockptr_size@plt>
mov    %eax,%ecx
mov    $0x200,%eax
cltd
idiv   %ecx
sub    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_program_table_size>:
push   %rax
call   1030 <get_blockptr_size@plt>
mov    %eax,%ecx
mov    $0x200,%eax
xor    %edx,%edx
idiv   %ecx
add    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.disk_info = type { i32 }
define i32 @get_program_table_size(%struct.disk_info* %0) {
%2 = alloca %struct.disk_info*
store %struct.disk_info* %0, %struct.disk_info** %2
%3 = load %struct.disk_info*, %struct.disk_info** %2
%4 = call i32 @get_blockptr_size(%struct.disk_info* %3)
%5 = sdiv i32 512, %4
%6 = sub nsw i32 %5, 1
ret i32 %6
}

LLVM IR (-O2):
%struct.disk_info = type { i32 }
define i32 @get_program_table_size(%struct.disk_info* %0) {
%2 = tail call i32 @get_blockptr_size(%struct.disk_info* %0)
%3 = sdiv i32 512, %2
%4 = add nsw i32 %3, -1
ret i32 %4
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int /*<<< orphan*/ state;
};
typedef TYPE_1__ XCrossingEvent;

/* Variables and functions */
unsigned get_XCrossingEvent_state(void *_p) {
  return (unsigned)((XCrossingEvent *)_p)->state;
}


x86 assembly (clang, -O0):
<get_XCrossingEvent_state>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XCrossingEvent_state>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define i32 @get_XCrossingEvent_state(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @get_XCrossingEvent_state(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct span_table {
  int dummy;
};
struct htable {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ htable_used(struct htable *);
uint32_t span_table_size(struct span_table *st) {
  struct htable *ht = (struct htable *)st;
  return htable_used(ht);
}


x86 assembly (clang, -O0):
<span_table_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <htable_used@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<span_table_size>:
jmp    1030 <htable_used@plt>

LLVM IR (-O0):
%struct.span_table = type { i32 }
%struct.htable = type { i32 }
define i32 @span_table_size(%struct.span_table* %0) {
%2 = alloca %struct.span_table*
%3 = alloca %struct.htable*
store %struct.span_table* %0, %struct.span_table** %2
%4 = load %struct.span_table*, %struct.span_table** %2
%5 = bitcast %struct.span_table* %4 to %struct.htable*
store %struct.htable* %5, %struct.htable** %3
%6 = load %struct.htable*, %struct.htable** %3
%7 = call i32 @htable_used(%struct.htable* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.span_table = type { i32 }
%struct.htable = type { i32 }
define i32 @span_table_size(%struct.span_table* %0) {
%2 = bitcast %struct.span_table* %0 to %struct.htable*
%3 = tail call i32 @htable_used(%struct.htable* %2)
ret i32 %3
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void cpu_to_le32wu(uint32_t *p, uint32_t v) {
  uint8_t *p1 = (uint8_t *)p;
  p1[0] = v & 0xff;
  p1[1] = v >> 8;
  p1[2] = v >> 16;
  p1[3] = v >> 24;
}


x86 assembly (clang, -O0):
<cpu_to_le32wu>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x10,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x18,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_to_le32wu>:
movzbl %sil,%eax
mov    %eax,(%rdi)
mov    %esi,%eax
sar    $0x8,%eax
mov    %eax,0x4(%rdi)
mov    %esi,%eax
sar    $0x10,%eax
mov    %eax,0x8(%rdi)
sar    $0x18,%esi
mov    %esi,0xc(%rdi)
ret

LLVM IR (-O0):
define void @cpu_to_le32wu(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32*
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32*, i32** %3
store i32* %6, i32** %5
%7 = load i32, i32* %4
%8 = and i32 %7, 255
%9 = load i32*, i32** %5
%10 = getelementptr inbounds i32, i32* %9, i64 0
store i32 %8, i32* %10
%11 = load i32, i32* %4
%12 = ashr i32 %11, 8
%13 = load i32*, i32** %5
%14 = getelementptr inbounds i32, i32* %13, i64 1
store i32 %12, i32* %14
%15 = load i32, i32* %4
%16 = ashr i32 %15, 16
%17 = load i32*, i32** %5
%18 = getelementptr inbounds i32, i32* %17, i64 2
store i32 %16, i32* %18
%19 = load i32, i32* %4
%20 = ashr i32 %19, 24
%21 = load i32*, i32** %5
%22 = getelementptr inbounds i32, i32* %21, i64 3
store i32 %20, i32* %22
ret void
}

LLVM IR (-O2):
define void @cpu_to_le32wu(i32* nocapture writeonly %0, i32 %1) {
%3 = and i32 %1, 255
store i32 %3, i32* %0
%4 = ashr i32 %1, 8
%5 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %4, i32* %5
%6 = ashr i32 %1, 16
%7 = getelementptr inbounds i32, i32* %0, i64 2
store i32 %6, i32* %7
%8 = ashr i32 %1, 24
%9 = getelementptr inbounds i32, i32* %0, i64 3
store i32 %8, i32* %9
ret void
}
/* Variables and functions */
void *__init__f(void) { return NULL; }


x86 assembly (clang, -O0):
<__init__f>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__init__f>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @__init__f() {
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @__init__f() {
ret i8* null
}
void *receive_thread(void *arg) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<receive_thread>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
jmp    1108 <receive_thread+0x8>

x86 assembly (clang, -O2):
<receive_thread>:
jmp    1100 <receive_thread>

LLVM IR (-O0):
define i8* @receive_thread(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %1, %3
br label %3
}

LLVM IR (-O2):
define noalias i8* @receive_thread(i8* nocapture readnone %0) {
br label %2
2: ; preds = %1, %2
br label %2
}
int test_imm_EBint64_midword_reg(long long val) {
  return ((val >> 16) & (0xEB << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_EBint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0xeb,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_EBint64_midword_reg>:
test   $0xeb0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_EBint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 235
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_EBint64_midword_reg(i64 %0) {
%2 = and i64 %0, 15400960
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *fopen(char const *, char *);
int /*<<< orphan*/ report_errno(char const *);
FILE *open_file(const char *file_name) {
  FILE *f;
  if ((f = fopen(file_name, "r")) == NULL) {
    report_errno(file_name);
  }
  return f;
}


x86 assembly (clang, -O0):
<open_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec9(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    1153 <open_file+0x33>
mov    -0x8(%rbp),%rdi
call   1030 <report_errno@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_file>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
lea    0xed2(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1143 <open_file+0x23>
mov    %r14,%rdi
call   1030 <report_errno@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [2 x i8] c"r\00"
define i32* @open_file(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32* @fopen(i8* %4, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %5, i32** %3
%6 = icmp eq i32* %5, null
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = call i32 @report_errno(i8* %8)
br label %10
10: ; preds = %7, %1
%11 = load i32*, i32** %3
ret i32* %11
}

LLVM IR (-O2):
@.str = [2 x i8] c"r\00"
define noalias i32* @open_file(i8* %0) {
%2 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @report_errno(i8* %0)
br label %6
6: ; preds = %4, %1
ret i32* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Hola Mundo");
  printf("BYE BYE");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
lea    0xee7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"Hola Mundo\00"
@.str.1 = [8 x i8] c"BYE BYE\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"Hola Mundo\00"
@.str.1 = [8 x i8] c"BYE BYE\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
void endgrent() { anvil_syslog(0, "%s unimplemented\n", __FUNCTION__); }


x86 assembly (clang, -O0):
<endgrent>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
lea    0xeee(%rip),%rdx
mov    $0x0,%al
call   1030 <anvil_syslog@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<endgrent>:
lea    0xee9(%rip),%rsi
lea    0xef4(%rip),%rdx
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <anvil_syslog@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"%s unimplemented\0A\00"
@__FUNCTION__.endgrent = [9 x i8] c"endgrent\00"
define void @endgrent() {
%1 = call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @__FUNCTION__.endgrent, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"%s unimplemented\0A\00"
@__FUNCTION__.endgrent = [9 x i8] c"endgrent\00"
define void @endgrent() {
%1 = tail call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @__FUNCTION__.endgrent, i64 0, i64 0))
ret void
}
unsigned int positive_int(const int item) {
  int s = 0;
  if (item > 0)
    s = 1 + (item - 1) * 2;
  else if (item < 0)
    s = 2 + (-item - 1) * 2;
  return s;
}


x86 assembly (clang, -O0):
<positive_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    112c <positive_int+0x2c>
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
shl    $0x1,%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    114c <positive_int+0x4c>
cmpl   $0x0,-0x4(%rbp)
jge    1147 <positive_int+0x47>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
sub    $0x1,%eax
shl    $0x1,%eax
add    $0x2,%eax
mov    %eax,-0x8(%rbp)
jmp    114c <positive_int+0x4c>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<positive_int>:
test   %edi,%edi
jle    110b <positive_int+0xb>
lea    (%rdi,%rdi,1),%eax
add    $0xffffffff,%eax
ret
xor    %eax,%eax
test   %edi,%edi
js     1112 <positive_int+0x12>
ret
not    %edi
lea    (%rdi,%rdi,1),%eax
add    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @positive_int(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 1
%9 = mul nsw i32 %8, 2
%10 = add nsw i32 1, %9
store i32 %10, i32* %3
br label %21
11: ; preds = %1
%12 = load i32, i32* %2
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %20
14: ; preds = %11
%15 = load i32, i32* %2
%16 = sub nsw i32 0, %15
%17 = sub nsw i32 %16, 1
%18 = mul nsw i32 %17, 2
%19 = add nsw i32 2, %18
store i32 %19, i32* %3
br label %20
20: ; preds = %14, %11
br label %21
21: ; preds = %20, %6
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @positive_int(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = shl nuw i32 %0, 1
%5 = add i32 %4, -1
br label %12
6: ; preds = %1
%7 = icmp slt i32 %0, 0
br i1 %7, label %8, label %12
8: ; preds = %6
%9 = xor i32 %0, -1
%10 = shl nsw i32 %9, 1
%11 = add nsw i32 %10, 2
br label %12
12: ; preds = %6, %8, %3
%13 = phi i32 [ %5, %3 ], [ %11, %8 ], [ 0, %6 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ INS_LI();
void INS_LA(void) { INS_LI(); }


x86 assembly (clang, -O0):
<INS_LA>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <INS_LI@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<INS_LA>:
xor    %eax,%eax
jmp    1030 <INS_LI@plt>

LLVM IR (-O0):
define void @INS_LA() {
%1 = call i32 (...) @INS_LI()
ret void
}

LLVM IR (-O2):
define void @INS_LA() {
%1 = tail call i32 (...) @INS_LI()
ret void
}
unsigned char f(void) { return 0xab; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    $0xab,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0xab,%al
ret

LLVM IR (-O0):
define zeroext i8 @f() {
ret i8 -85
}

LLVM IR (-O2):
define zeroext i8 @f() {
ret i8 -85
}
/* Variables and functions */
double floor(double);
double t5(double x) { return floor(x); }


x86 assembly (clang, -O0):
<t5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t5>:
jmp    1030 <floor@plt>

LLVM IR (-O0):
define double @t5(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @llvm.floor.f64(double %3)
ret double %4
}

LLVM IR (-O2):
define double @t5(double %0) {
%2 = tail call double @llvm.floor.f64(double %0)
ret double %2
}
void fd73(int n) {
P0A:
  goto P0A;
  {
    typedef int(*b)[n];
  P01A:
    goto P01A;
    {
      typedef int(*c)[n];
    P012A:
      goto P012A;
      0;
    }
  P01B:
    goto P01B;
    {
      typedef int(*d)[n];
    p013A:
      goto p013A;
      goto a;
    P013A:
      goto P013A;
      0;
    }
  a:;
    typedef int(*e)[n];
  P014A:
    goto P014A;
    0;
  };
P0B:
  goto P0B;
  {
    typedef int(*f)[n];
  P02A:
    goto P02A;
    {
      typedef int(*g)[n];
    P024A:
      goto P024A;
      0;
    };
  P02B:
    goto P02B;
    {
      typedef int(*h)[n];
    P025A:
      goto P025A;
      0;
    };
  P02C:
    goto P02C;
    ;
    typedef int(*i)[n];
  P026A:
    goto P026A;
    0;
  };
P0C:
  goto P0C;
  ;
  typedef int(*j)[n];
P03A:
  goto P03A;
  0;
P03B:
  goto P03B;
}


x86 assembly (clang, -O0):
<fd73>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fd73+0x7>

x86 assembly (clang, -O2):
<fd73>:
jmp    1100 <fd73>

LLVM IR (-O0):
define void @fd73(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %3, %1
br label %3
4: ; No predecessors!
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
br label %7
7: ; preds = %7, %4
br label %7
8: ; No predecessors!
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
br label %11
11: ; preds = %11, %8
br label %11
12: ; preds = %12
br label %12
13: ; No predecessors!
%14 = load i32, i32* %2
%15 = zext i32 %14 to i64
br label %16
16: ; preds = %16, %13
br label %16
17: ; preds = %17
br label %17
18: ; No predecessors!
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
br label %21
21: ; preds = %21, %18
br label %21
22: ; preds = %22
br label %22
23: ; No predecessors!
%24 = load i32, i32* %2
%25 = zext i32 %24 to i64
br label %26
26: ; preds = %26, %23
br label %26
27: ; No predecessors!
%28 = load i32, i32* %2
%29 = zext i32 %28 to i64
br label %30
30: ; preds = %30, %27
br label %30
31: ; preds = %31
br label %31
32: ; No predecessors!
%33 = load i32, i32* %2
%34 = zext i32 %33 to i64
br label %35
35: ; preds = %35, %32
br label %35
36: ; preds = %36
br label %36
37: ; No predecessors!
%38 = load i32, i32* %2
%39 = zext i32 %38 to i64
br label %40
40: ; preds = %40, %37
br label %40
41: ; preds = %41
br label %41
42: ; No predecessors!
%43 = load i32, i32* %2
%44 = zext i32 %43 to i64
br label %45
45: ; preds = %45, %42
br label %45
46: ; preds = %46
br label %46
}

LLVM IR (-O2):
define void @fd73(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Type definitions */
typedef int /*<<< orphan*/ array;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ sort(int *, int);
int main() {
  int i, array[] = {3};
  sort(array, (sizeof(array) / sizeof(array[0])));
  for (i = 0; i < (sizeof(array) / sizeof(array[0])); i++) {
    printf("%d\n", array[i]);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xecb(%rip),%eax
mov    %eax,-0xc(%rbp)
lea    -0xc(%rbp),%rdi
mov    $0x1,%esi
call   1040 <sort@plt>
movl   $0x0,-0x8(%rbp)
movslq -0x8(%rbp),%rax
cmp    $0x1,%rax
jae    117d <main+0x5d>
movslq -0x8(%rbp),%rax
mov    -0xc(%rbp,%rax,4),%esi
lea    0xe9a(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    114d <main+0x2d>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x3,0x4(%rsp)
lea    0x4(%rsp),%rdi
mov    $0x1,%esi
call   1040 <sort@plt>
mov    0x4(%rsp),%esi
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.main.array = [1 x i32] [i32 3]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [1 x i32]
store i32 0, i32* %1
%4 = bitcast [1 x i32]* %3 to i8*
%5 = getelementptr inbounds [1 x i32], [1 x i32]* %3, i64 0, i64 0
%6 = call i32 @sort(i32* %5, i32 1)
store i32 0, i32* %2
br label %7
7: ; preds = %17, %0
%8 = load i32, i32* %2
%9 = sext i32 %8 to i64
%10 = icmp ult i64 %9, 1
br i1 %10, label %11, label %20
11: ; preds = %7
%12 = load i32, i32* %2
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds [1 x i32], [1 x i32]* %3, i64 0, i64 %13
%15 = load i32, i32* %14
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %11
%18 = load i32, i32* %2
%19 = add nsw i32 %18, 1
store i32 %19, i32* %2
br label %7
20: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca [1 x i32]
%2 = bitcast [1 x i32]* %1 to i8*
%3 = getelementptr inbounds [1 x i32], [1 x i32]* %1, i64 0, i64 0
store i32 3, i32* %3
%4 = call i32 @sort(i32* %3, i32 1)
%5 = load i32, i32* %3
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}
void DMA2_Channel3_IRQHandler(void) {}


x86 assembly (clang, -O0):
<DMA2_Channel3_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMA2_Channel3_IRQHandler>:
ret

LLVM IR (-O0):
define void @DMA2_Channel3_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @DMA2_Channel3_IRQHandler() {
ret void
}
int abs_c(int num) {
  if (num >= 0)
    return num;
  else
    return -num;
}


x86 assembly (clang, -O0):
<abs_c>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     111c <abs_c+0x1c>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1124 <abs_c+0x24>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs_c>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs_c(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %11
8: ; preds = %1
%9 = load i32, i32* %3
%10 = sub nsw i32 0, %9
store i32 %10, i32* %2
br label %11
11: ; preds = %8, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @abs_c(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
int encode(void) { return 0; }


x86 assembly (clang, -O0):
<encode>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<encode>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @encode() {
ret i32 0
}

LLVM IR (-O2):
define i32 @encode() {
ret i32 0
}
char *sha1(char *file) {}


x86 assembly (clang, -O0):
<sha1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sha1>:
ret

LLVM IR (-O0):
define i8* @sha1(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %2
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @sha1(i8* nocapture readnone %0) {
ret i8* undef
}
int argparse(int argc, char **argv, struct argopt_t **opts) { return (0); }


x86 assembly (clang, -O0):
<argparse>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<argparse>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.argopt_t = type opaque
define i32 @argparse(i32 %0, i8** %1, %struct.argopt_t** %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca %struct.argopt_t**
store i32 %0, i32* %4
store i8** %1, i8*** %5
store %struct.argopt_t** %2, %struct.argopt_t*** %6
ret i32 0
}

LLVM IR (-O2):
%struct.argopt_t = type opaque
define i32 @argparse(i32 %0, i8** nocapture readnone %1, %struct.argopt_t** nocapture readnone %2) {
ret i32 0
}
void *Cyc_Absyn_nonnull(void *p1, void *p2) { return p1 != 0 ? p1 : p2; }


x86 assembly (clang, -O0):
<Cyc_Absyn_nonnull>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1124 <Cyc_Absyn_nonnull+0x24>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112c <Cyc_Absyn_nonnull+0x2c>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_Absyn_nonnull>:
mov    %rsi,%rax
test   %rdi,%rdi
cmovne %rdi,%rax
ret

LLVM IR (-O0):
define i8* @Cyc_Absyn_nonnull(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = load i8*, i8** %3
br label %11
9: ; preds = %2
%10 = load i8*, i8** %4
br label %11
11: ; preds = %9, %7
%12 = phi i8* [ %8, %7 ], [ %10, %9 ]
ret i8* %12
}

LLVM IR (-O2):
define i8* @Cyc_Absyn_nonnull(i8* readnone %0, i8* readnone %1) {
%3 = icmp eq i8* %0, null
%4 = select i1 %3, i8* %1, i8* %0
ret i8* %4
}
/* Variables and functions */
scalar_t__ isspace(char);
char *skip_whitespace(char *s) {
  while (*s && isspace(*s)) {
    s++;
  }
  return s;
}


x86 assembly (clang, -O0):
<skip_whitespace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
je     1147 <skip_whitespace+0x37>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    1157 <skip_whitespace+0x47>
jmp    1168 <skip_whitespace+0x58>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <skip_whitespace+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_whitespace>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%al
test   %al,%al
je     1139 <skip_whitespace+0x29>
nopw   0x0(%rax,%rax,1)
movsbl %al,%edi
call   1030 <isspace@plt>
test   %rax,%rax
je     1139 <skip_whitespace+0x29>
movzbl 0x1(%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <skip_whitespace+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @skip_whitespace(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %15, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = call i64 @isspace(i8 signext %10)
%12 = icmp ne i64 %11, 0
br label %13
13: ; preds = %8, %3
%14 = phi i1 [ false, %3 ], [ %12, %8 ]
br i1 %14, label %15, label %18
15: ; preds = %13
%16 = load i8*, i8** %2
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %2
br label %3
18: ; preds = %13
%19 = load i8*, i8** %2
ret i8* %19
}

LLVM IR (-O2):
define i8* @skip_whitespace(i8* %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1, %9
%5 = phi i8 [ %11, %9 ], [ %2, %1 ]
%6 = phi i8* [ %10, %9 ], [ %0, %1 ]
%7 = tail call i64 @isspace(i8 signext %5)
%8 = icmp eq i64 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %4
%10 = getelementptr inbounds i8, i8* %6, i64 1
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %9, %1
%14 = phi i8* [ %0, %1 ], [ %10, %9 ], [ %6, %4 ]
ret i8* %14
}
/* Variables and functions */
int check_bus_or_interface_name(char const *, int);
int dbus_check_name(const char *name) {
  return check_bus_or_interface_name(name, 1);
}


x86 assembly (clang, -O0):
<dbus_check_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <check_bus_or_interface_name@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbus_check_name>:
mov    $0x1,%esi
jmp    1030 <check_bus_or_interface_name@plt>

LLVM IR (-O0):
define i32 @dbus_check_name(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @check_bus_or_interface_name(i8* %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @dbus_check_name(i8* %0) {
%2 = tail call i32 @check_bus_or_interface_name(i8* %0, i32 1)
ret i32 %2
}