xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ func1();
int main() { return func1() && func1(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <func1@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
je     1149 <main+0x39>
mov    $0x0,%al
call   1030 <func1@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <func1@plt>
test   %rax,%rax
je     112e <main+0x1e>
xor    %eax,%eax
call   1030 <func1@plt>
xor    %ebx,%ebx
test   %rax,%rax
setne  %bl
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 (...) @func1()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %7
4: ; preds = %0
%5 = call i64 (...) @func1()
%6 = icmp ne i64 %5, 0
br label %7
7: ; preds = %4, %0
%8 = phi i1 [ false, %0 ], [ %6, %4 ]
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 (...) @func1()
%2 = icmp eq i64 %1, 0
br i1 %2, label %7, label %3
3: ; preds = %0
%4 = tail call i64 (...) @func1()
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %0
%8 = phi i32 [ 0, %0 ], [ %6, %3 ]
ret i32 %8
}
int main(void) {
  int a = 0;
  ++a;
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
store i32 %4, i32* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
void UART1_RX_intr(void) {}


x86 assembly (clang, -O0):
<UART1_RX_intr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UART1_RX_intr>:
ret

LLVM IR (-O0):
define void @UART1_RX_intr() {
ret void
}

LLVM IR (-O2):
define void @UART1_RX_intr() {
ret void
}
/* Type definitions */
struct flashrom_flashctx {
  int dummy;
};

/* Variables and functions */
int probe_spi_rdid_generic(struct flashrom_flashctx *, int);
int probe_spi_rdid(struct flashrom_flashctx *flash) {
  return probe_spi_rdid_generic(flash, 3);
}


x86 assembly (clang, -O0):
<probe_spi_rdid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x3,%esi
call   1030 <probe_spi_rdid_generic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<probe_spi_rdid>:
mov    $0x3,%esi
jmp    1030 <probe_spi_rdid_generic@plt>

LLVM IR (-O0):
%struct.flashrom_flashctx = type { i32 }
define i32 @probe_spi_rdid(%struct.flashrom_flashctx* %0) {
%2 = alloca %struct.flashrom_flashctx*
store %struct.flashrom_flashctx* %0, %struct.flashrom_flashctx** %2
%3 = load %struct.flashrom_flashctx*, %struct.flashrom_flashctx** %2
%4 = call i32 @probe_spi_rdid_generic(%struct.flashrom_flashctx* %3, i32 3)
ret i32 %4
}

LLVM IR (-O2):
%struct.flashrom_flashctx = type { i32 }
define i32 @probe_spi_rdid(%struct.flashrom_flashctx* %0) {
%2 = tail call i32 @probe_spi_rdid_generic(%struct.flashrom_flashctx* %0, i32 3)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
void *malloc(size_t);
int /*<<< orphan*/ stderr;
void *emalloc(size_t size) {
  void *p = malloc(size);
  if (!p) {
    fprintf(stderr, "Memory allocation failed(emalloc).\n");
    exit(-1);
  }
  return p;
}


x86 assembly (clang, -O0):
<emalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1173 <emalloc+0x43>
mov    0x2e85(%rip),%rax
mov    (%rax),%edi
lea    0xe9c(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emalloc>:
push   %rax
call   1040 <malloc@plt>
test   %rax,%rax
je     113d <emalloc+0xd>
pop    %rcx
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [36 x i8] c"Memory allocation failed(emalloc).\0A\00"
define i8* @emalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%11 = call i32 @exit(i32 -1)
unreachable
12: ; preds = %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [36 x i8] c"Memory allocation failed(emalloc).\0A\00"
define noalias i8* @emalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 @exit(i32 -1)
unreachable
8: ; preds = %1
ret i8* %2
}
__attribute__((always_)) const int xisminff(float x) {
  return x == -__builtin_inff();
}


x86 assembly (clang, -O0):
<xisminff>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xeea(%rip),%xmm1
ucomiss %xmm1,%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xisminff>:
movss  0xef8(%rip),%xmm1
xor    %eax,%eax
ucomiss %xmm0,%xmm1
setae  %al
ret

LLVM IR (-O0):
define i32 @xisminff(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp oeq float %3, 0xFFF0000000000000
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @xisminff(float %0) {
%2 = fcmp oeq float %0, 0xFFF0000000000000
%3 = zext i1 %2 to i32
ret i32 %3
}
void rop3_133_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  unsigned char stk4;
  stk4 = ~T;
  stk3 = S | stk4;
  stk2 = *D & stk3;
  stk1 = T ^ stk2;
  stk1 = ~stk1;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_133_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xe(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xe(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_133_1_0>:
mov    %edx,%eax
not    %al
or     %sil,%al
mov    (%rdi),%cl
and    %cl,%al
xor    %dl,%al
or     %sil,%al
not    %al
and    %sil,%cl
or     %al,%cl
mov    %cl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_133_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%11 = load i8, i8* %6
%12 = zext i8 %11 to i32
%13 = xor i32 %12, -1
%14 = trunc i32 %13 to i8
store i8 %14, i8* %10
%15 = load i8, i8* %5
%16 = zext i8 %15 to i32
%17 = load i8, i8* %10
%18 = zext i8 %17 to i32
%19 = or i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %9
%21 = load i8*, i8** %4
%22 = load i8, i8* %21
%23 = zext i8 %22 to i32
%24 = load i8, i8* %9
%25 = zext i8 %24 to i32
%26 = and i32 %23, %25
%27 = trunc i32 %26 to i8
store i8 %27, i8* %8
%28 = load i8, i8* %6
%29 = zext i8 %28 to i32
%30 = load i8, i8* %8
%31 = zext i8 %30 to i32
%32 = xor i32 %29, %31
%33 = trunc i32 %32 to i8
store i8 %33, i8* %7
%34 = load i8, i8* %7
%35 = zext i8 %34 to i32
%36 = xor i32 %35, -1
%37 = trunc i32 %36 to i8
store i8 %37, i8* %7
%38 = load i8, i8* %7
%39 = zext i8 %38 to i32
%40 = load i8, i8* %5
%41 = zext i8 %40 to i32
%42 = xor i32 %41, -1
%43 = and i32 %39, %42
%44 = load i8*, i8** %4
%45 = load i8, i8* %44
%46 = zext i8 %45 to i32
%47 = load i8, i8* %5
%48 = zext i8 %47 to i32
%49 = and i32 %46, %48
%50 = or i32 %43, %49
%51 = trunc i32 %50 to i8
%52 = load i8*, i8** %4
store i8 %51, i8* %52
ret void
}

LLVM IR (-O2):
define void @rop3_133_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = xor i8 %2, -1
%5 = or i8 %4, %1
%6 = load i8, i8* %0
%7 = and i8 %6, %5
%8 = xor i8 %7, %2
%9 = or i8 %8, %1
%10 = xor i8 %9, -1
%11 = and i8 %6, %1
%12 = or i8 %11, %10
store i8 %12, i8* %0
ret void
}
int fib(int param1) {
  int local17;
  int o0;
  int o0_1;
  if (param1 <= 1) {
    if (param1 != 1) {
      local17 = param1;
    } else {
      local17 = 1;
    }
  } else {
    o0_1 = fib(param1 - 1);
    o0 = fib(param1 - 2);
    local17 = o0_1 + o0;
  }
  return local17;
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jg     1146 <fib+0x36>
cmpl   $0x1,-0x4(%rbp)
je     113a <fib+0x2a>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1141 <fib+0x31>
movl   $0x1,-0x8(%rbp)
jmp    116b <fib+0x5b>
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x2,%edi
jge    1120 <fib+0x10>
mov    %ebx,%ecx
jmp    1144 <fib+0x34>
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    -0x1(%rbx),%edi
call   1030 <fib@plt>
lea    -0x2(%rbx),%ecx
add    %eax,%ebp
cmp    $0x3,%ebx
mov    %ecx,%ebx
ja     1130 <fib+0x20>
add    %ecx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 1
br i1 %7, label %8, label %15
8: ; preds = %1
%9 = load i32, i32* %2
%10 = icmp ne i32 %9, 1
br i1 %10, label %11, label %13
11: ; preds = %8
%12 = load i32, i32* %2
store i32 %12, i32* %3
br label %14
13: ; preds = %8
store i32 1, i32* %3
br label %14
14: ; preds = %13, %11
br label %25
15: ; preds = %1
%16 = load i32, i32* %2
%17 = sub nsw i32 %16, 1
%18 = call i32 @fib(i32 %17)
store i32 %18, i32* %5
%19 = load i32, i32* %2
%20 = sub nsw i32 %19, 2
%21 = call i32 @fib(i32 %20)
store i32 %21, i32* %4
%22 = load i32, i32* %5
%23 = load i32, i32* %4
%24 = add nsw i32 %22, %23
store i32 %24, i32* %3
br label %25
25: ; preds = %15, %14
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %9, %3 ]
%13 = phi i32 [ %0, %1 ], [ %8, %3 ]
%14 = add nsw i32 %13, %12
ret i32 %14
}
/* Variables and functions */
int dv_sk_send(int, void const *, size_t);
int dv_write_channel(int fd, const void *msg, size_t len) {
  return dv_sk_send(fd, msg, len);
}


x86 assembly (clang, -O0):
<dv_write_channel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <dv_sk_send@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dv_write_channel>:
jmp    1030 <dv_sk_send@plt>

LLVM IR (-O0):
define i32 @dv_write_channel(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @dv_sk_send(i32 %7, i8* %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @dv_write_channel(i32 %0, i8* %1, i64 %2) {
%4 = tail call i32 @dv_sk_send(i32 %0, i8* %1, i64 %2)
ret i32 %4
}
/* Type definitions */
struct PlexLink {
  int dummy;
};

/* Variables and functions */
scalar_t__ error();
int /*<<< orphan*/ free_object(int, short *);
void free_PlexLink(struct PlexLink *plk) {
  free_object(51, (short *)plk);
  if (error())
    return;
}


x86 assembly (clang, -O0):
<free_PlexLink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x33,%edi
call   1030 <free_object@plt>
mov    $0x0,%al
call   1040 <error@plt>
cmp    $0x0,%rax
je     1150 <free_PlexLink+0x30>
jmp    1150 <free_PlexLink+0x30>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_PlexLink>:
push   %rax
mov    %rdi,%rsi
mov    $0x33,%edi
call   1030 <free_object@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <error@plt>

LLVM IR (-O0):
%struct.PlexLink = type { i32 }
define void @free_PlexLink(%struct.PlexLink* %0) {
%2 = alloca %struct.PlexLink*
store %struct.PlexLink* %0, %struct.PlexLink** %2
%3 = load %struct.PlexLink*, %struct.PlexLink** %2
%4 = bitcast %struct.PlexLink* %3 to i16*
%5 = call i32 @free_object(i32 51, i16* %4)
%6 = call i64 (...) @error()
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
br label %9
9: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
%struct.PlexLink = type { i32 }
define void @free_PlexLink(%struct.PlexLink* %0) {
%2 = bitcast %struct.PlexLink* %0 to i16*
%3 = tail call i32 @free_object(i32 51, i16* %2)
%4 = tail call i64 (...) @error()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ result;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, char const *, int);
uint32_t fetch32(const char *p) {
  uint32_t result;
  memcpy(&result, p, sizeof(result));
  return (result);
}


x86 assembly (clang, -O0):
<fetch32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fetch32>:
push   %rax
mov    %rdi,%rsi
lea    0x4(%rsp),%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fetch32(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @memcpy(i32* %3, i8* %4, i32 4)
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @fetch32(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @memcpy(i32* %2, i8* %0, i32 4)
%5 = load i32, i32* %2
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
scalar_t__ f(int, unsigned long);
main() {
  if (f(1, 0UL) != 0)
    abort();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1040 <f@plt>
cmp    $0x0,%rax
je     115e <main+0x2e>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
xor    %esi,%esi
call   1040 <f@plt>
test   %rax,%rax
jne    1149 <main+0x19>
xor    %edi,%edi
call   1050 <exit@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 @f(i32 1, i64 0)
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @abort()
unreachable
6: ; preds = %0
%7 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @f(i32 1, i64 0)
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
char *dec_to_(int, int);
int /*<<< orphan*/ printf(char *, char *);
void main() {
  char *res = dec_to_(100, 8);
  printf(" Dec to other base %s\n", res);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x64,%edi
mov    $0x8,%esi
call   1040 <dec_to_@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x64,%edi
mov    $0x8,%esi
call   1040 <dec_to_@plt>
lea    0xec9(%rip),%rdi
mov    %rax,%rsi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [23 x i8] c" Dec to other base %s\0A\00"
define void @main() {
%1 = alloca i8*
%2 = call i8* @dec_to_(i32 100, i32 8)
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c" Dec to other base %s\0A\00"
define void @main() {
%1 = tail call i8* @dec_to_(i32 100, i32 8)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %1)
ret void
}
int expect_literal(const char **sp, const char *str) {
  const char *s = *sp;
  while (*str != '\0')
    if (*s++ != *str++)
      return 0;
  *sp = s;
  return 1;
}


x86 assembly (clang, -O0):
<expect_literal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1164 <expect_literal+0x64>
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x20(%rbp)
movsbl (%rax),%eax
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
movsbl (%rcx),%ecx
cmp    %ecx,%eax
je     115f <expect_literal+0x5f>
movl   $0x0,-0x4(%rbp)
jmp    1176 <expect_literal+0x76>
jmp    1117 <expect_literal+0x17>
mov    -0x20(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<expect_literal>:
mov    (%rdi),%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movzbl (%rsi),%ecx
test   %cl,%cl
je     1129 <expect_literal+0x29>
lea    0x1(%rax),%rdx
add    $0x1,%rsi
cmp    %cl,(%rax)
mov    %rdx,%rax
je     1110 <expect_literal+0x10>
xor    %eax,%eax
ret
mov    %rax,(%rdi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @expect_literal(i8** %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca i8*
store i8** %0, i8*** %4
store i8* %1, i8** %5
%7 = load i8**, i8*** %4
%8 = load i8*, i8** %7
store i8* %8, i8** %6
br label %9
9: ; preds = %25, %2
%10 = load i8*, i8** %5
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %26
14: ; preds = %9
%15 = load i8*, i8** %6
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %6
%17 = load i8, i8* %15
%18 = sext i8 %17 to i32
%19 = load i8*, i8** %5
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %5
%21 = load i8, i8* %19
%22 = sext i8 %21 to i32
%23 = icmp ne i32 %18, %22
br i1 %23, label %24, label %25
24: ; preds = %14
store i32 0, i32* %3
br label %29
25: ; preds = %14
br label %9
26: ; preds = %9
%27 = load i8*, i8** %6
%28 = load i8**, i8*** %4
store i8* %27, i8** %28
store i32 1, i32* %3
br label %29
29: ; preds = %26, %24
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @expect_literal(i8** nocapture %0, i8* nocapture %1) {
%3 = load i8*, i8** %0
br label %4
4: ; preds = %9, %2
%5 = phi i8* [ %1, %2 ], [ %12, %9 ]
%6 = phi i8* [ %3, %2 ], [ %10, %9 ]
%7 = load i8, i8* %5
%8 = icmp eq i8 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %4
%10 = getelementptr inbounds i8, i8* %6, i64 1
%11 = load i8, i8* %6
%12 = getelementptr inbounds i8, i8* %5, i64 1
%13 = icmp eq i8 %11, %7
br i1 %13, label %4, label %15
14: ; preds = %4
store i8* %6, i8** %0
br label %15
15: ; preds = %9, %14
%16 = phi i32 [ 1, %14 ], [ 0, %9 ]
ret i32 %16
}
int main() {
  short x;
  x = 0;
  x = x + 1;
  if (x != 1)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movw   $0x0,-0x6(%rbp)
movswl -0x6(%rbp),%eax
add    $0x1,%eax
mov    %ax,-0x6(%rbp)
movswl -0x6(%rbp),%eax
cmp    $0x1,%eax
je     1135 <main+0x35>
movl   $0x1,-0x4(%rbp)
jmp    113c <main+0x3c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i16
store i32 0, i32* %1
store i16 0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = add nsw i32 %4, 1
%6 = trunc i32 %5 to i16
store i16 %6, i16* %2
%7 = load i16, i16* %2
%8 = sext i16 %7 to i32
%9 = icmp ne i32 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %0
store i32 1, i32* %1
br label %12
11: ; preds = %0
store i32 0, i32* %1
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
int dpbigendian(void) {
  char buf[((int)sizeof(int))];
  *(int *)buf = 1;
  return !buf[0];
}


x86 assembly (clang, -O0):
<dpbigendian>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x4(%rbp)
cmpb   $0x0,-0x4(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dpbigendian>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dpbigendian() {
%1 = alloca [4 x i8]
%2 = getelementptr inbounds [4 x i8], [4 x i8]* %1, i64 0, i64 0
%3 = bitcast i8* %2 to i32*
store i32 1, i32* %3
%4 = getelementptr inbounds [4 x i8], [4 x i8]* %1, i64 0, i64 0
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
%7 = xor i1 %6, true
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @dpbigendian() {
ret i32 0
}
unsigned char *sha384digest(bitstr, bitcnt)
unsigned char *bitstr;
unsigned long bitcnt;
{ return ((unsigned char *)shacomp(384, 1, bitstr, bitcnt)); }


x86 assembly (clang, -O0):
<sha384digest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    $0x180,%edi
mov    $0x1,%esi
mov    $0x0,%al
call   1030 <shacomp@plt>
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sha384digest>:
push   %rax
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    $0x180,%edi
mov    $0x1,%esi
xor    %eax,%eax
call   1030 <shacomp@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i8* @sha384digest(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 (i32, i32, i8*, i64, ...) bitcast (i32 (...)* @shacomp to i32 (i32, i32, i8*, i64, ...)*)(i32 384, i32 1, i8* %5, i64 %6)
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i8*
ret i8* %9
}

LLVM IR (-O2):
define i8* @sha384digest(i8* %0, i64 %1) {
%3 = tail call i32 (i32, i32, i8*, i64, ...) bitcast (i32 (...)* @shacomp to i32 (i32, i32, i8*, i64, ...)*)(i32 384, i32 1, i8* %0, i64 %1)
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}
struct Value *handle_let_command(args)
char *args;
{
  return newint_fl(do_set(args, 0, 1),
                   "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
                   "outputs/2022-01-22/02-19-57/repos/gary9872/tf40s1/refs/"
                   "heads/master/src/command.c",
                   285);
}


x86 assembly (clang, -O0):
<handle_let_command>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x1,%edx
mov    $0x0,%al
call   1040 <do_set@plt>
mov    %eax,%edi
lea    0xeb9(%rip),%rsi
mov    $0x11d,%edx
mov    $0x0,%al
call   1030 <newint_fl@plt>
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_let_command>:
push   %rax
xor    %esi,%esi
mov    $0x1,%edx
xor    %eax,%eax
call   1040 <do_set@plt>
lea    0xeca(%rip),%rsi
mov    %eax,%edi
mov    $0x11d,%edx
xor    %eax,%eax
call   1030 <newint_fl@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
%struct.Value = type opaque
@.str = [138 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/gary9872/tf40s1/refs/heads/master/src/command.c\00"
define %struct.Value* @handle_let_command(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, i32, i32, ...) bitcast (i32 (...)* @do_set to i32 (i8*, i32, i32, ...)*)(i8* %3, i32 0, i32 1)
%5 = call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @newint_fl to i32 (i32, i8*, i32, ...)*)(i32 %4, i8* getelementptr inbounds ([138 x i8], [138 x i8]* @.str, i64 0, i64 0), i32 285)
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to %struct.Value*
ret %struct.Value* %7
}

LLVM IR (-O2):
%struct.Value = type opaque
@.str = [138 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/gary9872/tf40s1/refs/heads/master/src/command.c\00"
define %struct.Value* @handle_let_command(i8* %0) {
%2 = tail call i32 (i8*, i32, i32, ...) bitcast (i32 (...)* @do_set to i32 (i8*, i32, i32, ...)*)(i8* %0, i32 0, i32 1)
%3 = tail call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @newint_fl to i32 (i32, i8*, i32, ...)*)(i32 %2, i8* getelementptr inbounds ([138 x i8], [138 x i8]* @.str, i64 0, i64 0), i32 285)
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to %struct.Value*
ret %struct.Value* %5
}
int read(int fd, void *buffer, unsigned size) {
  int ret = 0;
  asm("movl $3,%%eax \n\t"
      "movl %1,%%ebx \n\t"
      "movl %2,%%ecx \n\t"
      "movl %3, %%edx \n\t"
      "int $0x80  \n\t"
      "movl %%eax,%0  \n\t"
      : "=m"(ret)
      : "m"(fd), "m"(buffer), "m"(size));
  return ret;
}


x86 assembly (clang, -O0):
<read>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    $0x3,%eax
mov    -0x4(%rbp),%ebx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%edx
int    $0x80
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read>:
mov    %edi,-0xc(%rsp)
mov    %rsi,-0x8(%rsp)
mov    %edx,-0x10(%rsp)
movl   $0x0,-0x14(%rsp)
mov    $0x3,%eax
mov    -0xc(%rsp),%ebx
mov    -0x8(%rsp),%ecx
mov    -0x10(%rsp),%edx
int    $0x80
mov    %eax,-0x14(%rsp)
mov    -0x14(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @read(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
store i32 0, i32* %7
%8 = load i32, i32* %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @read(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = bitcast i32* %7 to i8*
store i32 0, i32* %7
%9 = load i32, i32* %7
ret i32 %9
}
int check_EAN(int EAN) {
  if (EAN == 978 || EAN == 979)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<check_EAN>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x3d2,-0x8(%rbp)
je     1121 <check_EAN+0x21>
cmpl   $0x3d3,-0x8(%rbp)
jne    112d <check_EAN+0x2d>
movl   $0x1,-0x4(%rbp)
jmp    1134 <check_EAN+0x34>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_EAN>:
and    $0xfffffffe,%edi
xor    %eax,%eax
cmp    $0x3d2,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @check_EAN(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 978
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 979
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 1, i32* %2
br label %11
10: ; preds = %6
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @check_EAN(i32 %0) {
%2 = and i32 %0, -2
%3 = icmp eq i32 %2, 978
%4 = zext i1 %3 to i32
ret i32 %4
}
void g_string_chunk_insert_len() {}


x86 assembly (clang, -O0):
<g_string_chunk_insert_len>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_string_chunk_insert_len>:
ret

LLVM IR (-O0):
define void @g_string_chunk_insert_len() {
ret void
}

LLVM IR (-O2):
define void @g_string_chunk_insert_len() {
ret void
}
void fz_idivmod(int x, int y, int *d, int *m) {
  int xdivy = x / y;
  int xmody = x - xdivy * y;
  if (xmody && ((y ^ xmody) < 0)) {
    xmody += y;
    xdivy--;
  }
  *d = xdivy;
  *m = xmody;
}


x86 assembly (clang, -O0):
<fz_idivmod>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,-0x1c(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x1c(%rbp),%ecx
imul   -0x8(%rbp),%ecx
sub    %ecx,%eax
mov    %eax,-0x20(%rbp)
cmpl   $0x0,-0x20(%rbp)
je     1156 <fz_idivmod+0x56>
mov    -0x8(%rbp),%eax
xor    -0x20(%rbp),%eax
cmp    $0x0,%eax
jge    1156 <fz_idivmod+0x56>
mov    -0x8(%rbp),%eax
add    -0x20(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x1c(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x20(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fz_idivmod>:
mov    %rdx,%r8
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1119 <fz_idivmod+0x19>
mov    %edx,%edi
xor    %esi,%edi
jns    111b <fz_idivmod+0x1b>
add    %esi,%edx
add    $0xffffffff,%eax
jmp    111b <fz_idivmod+0x1b>
xor    %edx,%edx
mov    %eax,(%r8)
mov    %edx,(%rcx)
ret

LLVM IR (-O0):
define void @fz_idivmod(i32 %0, i32 %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = sdiv i32 %11, %12
store i32 %13, i32* %9
%14 = load i32, i32* %5
%15 = load i32, i32* %9
%16 = load i32, i32* %6
%17 = mul nsw i32 %15, %16
%18 = sub nsw i32 %14, %17
store i32 %18, i32* %10
%19 = load i32, i32* %10
%20 = icmp ne i32 %19, 0
br i1 %20, label %21, label %32
21: ; preds = %4
%22 = load i32, i32* %6
%23 = load i32, i32* %10
%24 = xor i32 %22, %23
%25 = icmp slt i32 %24, 0
br i1 %25, label %26, label %32
26: ; preds = %21
%27 = load i32, i32* %6
%28 = load i32, i32* %10
%29 = add nsw i32 %28, %27
store i32 %29, i32* %10
%30 = load i32, i32* %9
%31 = add nsw i32 %30, -1
store i32 %31, i32* %9
br label %32
32: ; preds = %26, %21, %4
%33 = load i32, i32* %9
%34 = load i32*, i32** %7
store i32 %33, i32* %34
%35 = load i32, i32* %10
%36 = load i32*, i32** %8
store i32 %35, i32* %36
ret void
}

LLVM IR (-O2):
define void @fz_idivmod(i32 %0, i32 %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3) {
%5 = sdiv i32 %0, %1
%6 = mul nsw i32 %5, %1
%7 = srem i32 %0, %1
%8 = icmp eq i32 %7, 0
br i1 %8, label %15, label %9
9: ; preds = %4
%10 = xor i32 %7, %1
%11 = icmp slt i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %9
%13 = add nsw i32 %7, %1
%14 = add nsw i32 %5, -1
br label %15
15: ; preds = %12, %9, %4
%16 = phi i32 [ %14, %12 ], [ %5, %9 ], [ %5, %4 ]
%17 = phi i32 [ %13, %12 ], [ %7, %9 ], [ 0, %4 ]
store i32 %16, i32* %2
store i32 %17, i32* %3
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int reverse_endian32(int);
uint64_t reverse_endian64(uint64_t w) {
  return ((uint64_t)reverse_endian32(w & 0xFFFFFFFFll) << 32) |
         reverse_endian32(w >> 32);
}


x86 assembly (clang, -O0):
<reverse_endian64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
movabs $0xffffffff,%rcx
and    %rcx,%rax
mov    %eax,%edi
call   1030 <reverse_endian32@plt>
mov    $0x20,%ecx
shl    %cl,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x20,%ecx
sar    %cl,%edi
call   1030 <reverse_endian32@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
or     %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse_endian64>:
push   %rax
call   1030 <reverse_endian32@plt>
pop    %rax
jmp    1030 <reverse_endian32@plt>

LLVM IR (-O0):
define i32 @reverse_endian64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = and i64 %4, 4294967295
%6 = trunc i64 %5 to i32
%7 = call i32 @reverse_endian32(i32 %6)
%8 = shl i32 %7, 32
%9 = load i32, i32* %2
%10 = ashr i32 %9, 32
%11 = call i32 @reverse_endian32(i32 %10)
%12 = or i32 %8, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @reverse_endian64(i32 %0) {
%2 = tail call i32 @reverse_endian32(i32 %0)
%3 = tail call i32 @reverse_endian32(i32 poison)
ret i32 poison
}
/* Type definitions */
typedef int uint8_t;
typedef int uint64_t;

/* Variables and functions */
uint8_t isPresent(uint64_t v) { return ((v >> 63) & 1); }


x86 assembly (clang, -O0):
<isPresent>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3f,%ecx
sar    %cl,%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPresent>:
ret

LLVM IR (-O0):
define i32 @isPresent(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 63
%5 = and i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @isPresent(i32 %0) {
ret i32 poison
}
double form_volume(double radius_lg, double radius_sm, double penetration) {
  double volume = 1.0;
  return volume;
}


x86 assembly (clang, -O0):
<form_volume>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  0xee5(%rip),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<form_volume>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @form_volume(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
store double 1.000000e+00, double* %7
%8 = load double, double* %7
ret double %8
}

LLVM IR (-O2):
define double @form_volume(double %0, double %1, double %2) {
ret double 1.000000e+00
}
int index_parent(int index) { return index >> 1; }


x86 assembly (clang, -O0):
<index_parent>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<index_parent>:
mov    %edi,%eax
sar    %eax
ret

LLVM IR (-O0):
define i32 @index_parent(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 1
ret i32 %4
}

LLVM IR (-O2):
define i32 @index_parent(i32 %0) {
%2 = ashr i32 %0, 1
ret i32 %2
}
int virtual_width(int n) {
  const int global_vw = 2;
  return (n + 1) / global_vw * global_vw;
}


x86 assembly (clang, -O0):
<virtual_width>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<virtual_width>:
mov    %edi,%eax
add    $0x1,%eax
shr    $0x1f,%eax
add    %edi,%eax
add    $0x1,%eax
and    $0xfffffffe,%eax
ret

LLVM IR (-O0):
define i32 @virtual_width(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 2, i32* %3
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
%6 = sdiv i32 %5, 2
%7 = mul nsw i32 %6, 2
ret i32 %7
}

LLVM IR (-O2):
define i32 @virtual_width(i32 %0) {
%2 = add nsw i32 %0, 1
%3 = sdiv i32 %2, 2
%4 = shl nsw i32 %3, 1
ret i32 %4
}
int tcp_vegas_register(void) {
  ;
  ;
  return 0;
}


x86 assembly (clang, -O0):
<tcp_vegas_register>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcp_vegas_register>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @tcp_vegas_register() {
ret i32 0
}

LLVM IR (-O2):
define i32 @tcp_vegas_register() {
ret i32 0
}
int my_colon(struct jslex *lexer) { return 1; }


x86 assembly (clang, -O0):
<my_colon>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_colon>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.jslex = type opaque
define i32 @my_colon(%struct.jslex* %0) {
%2 = alloca %struct.jslex*
store %struct.jslex* %0, %struct.jslex** %2
ret i32 1
}

LLVM IR (-O2):
%struct.jslex = type opaque
define i32 @my_colon(%struct.jslex* nocapture readnone %0) {
ret i32 1
}
/* Variables and functions */
int is_prime(int);
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n, b;
  printf("Enter number:");
  scanf("%d", &n);
  b = is_prime(n);
  printf("%d", b);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xec1(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x4(%rbp),%edi
call   1040 <is_prime@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xea3(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xec4(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xec4(%rip),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1050 <scanf@plt>
mov    0xc(%rsp),%edi
call   1040 <is_prime@plt>
mov    %rbx,%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Enter number:\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @is_prime(i32 %5)
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"Enter number:\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @is_prime(i32 %5)
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ additive_expr_stub();
int /*<<< orphan*/ postfix_expr();
void additive_expr() {
  postfix_expr();
  additive_expr_stub();
}


x86 assembly (clang, -O0):
<additive_expr>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <postfix_expr@plt>
mov    $0x0,%al
call   1030 <additive_expr_stub@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<additive_expr>:
push   %rax
xor    %eax,%eax
call   1040 <postfix_expr@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <additive_expr_stub@plt>

LLVM IR (-O0):
define void @additive_expr() {
%1 = call i32 (...) @postfix_expr()
%2 = call i32 (...) @additive_expr_stub()
ret void
}

LLVM IR (-O2):
define void @additive_expr() {
%1 = tail call i32 (...) @postfix_expr()
%2 = tail call i32 (...) @additive_expr_stub()
ret void
}
delgmode(f, n) int f, n;
{ return (adjustmode(0, 1)); }


x86 assembly (clang, -O0):
<delgmode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %edi,%edi
mov    $0x1,%esi
mov    $0x0,%al
call   1030 <adjustmode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delgmode>:
xor    %edi,%edi
mov    $0x1,%esi
xor    %eax,%eax
jmp    1030 <adjustmode@plt>

LLVM IR (-O0):
define i32 @delgmode(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (i32, i32, ...) bitcast (i32 (...)* @adjustmode to i32 (i32, i32, ...)*)(i32 0, i32 1)
ret i32 %5
}

LLVM IR (-O2):
define i32 @delgmode(i32 %0, i32 %1) {
%3 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @adjustmode to i32 (i32, i32, ...)*)(i32 0, i32 1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ put32(unsigned long);
int /*<<< orphan*/ put8(int);
void idiv_m32(void *_m32) {
  unsigned long *m32 = (unsigned long *)_m32;
  put8(0xF7);
  put8(0x3D);
  put32((unsigned long)(m32));
}


x86 assembly (clang, -O0):
<idiv_m32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0xf7,%edi
call   1030 <put8@plt>
mov    $0x3d,%edi
call   1030 <put8@plt>
mov    -0x10(%rbp),%rdi
call   1040 <put32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<idiv_m32>:
push   %rbx
mov    %rdi,%rbx
mov    $0xf7,%edi
call   1030 <put8@plt>
mov    $0x3d,%edi
call   1030 <put8@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <put32@plt>

LLVM IR (-O0):
define void @idiv_m32(i8* %0) {
%2 = alloca i8*
%3 = alloca i64*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i64*
store i64* %5, i64** %3
%6 = call i32 @put8(i32 247)
%7 = call i32 @put8(i32 61)
%8 = load i64*, i64** %3
%9 = ptrtoint i64* %8 to i64
%10 = call i32 @put32(i64 %9)
ret void
}

LLVM IR (-O2):
define void @idiv_m32(i8* %0) {
%2 = tail call i32 @put8(i32 247)
%3 = tail call i32 @put8(i32 61)
%4 = ptrtoint i8* %0 to i64
%5 = tail call i32 @put32(i64 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pipe_unix_send(char const *);
void e_comm_send_str(const char *str) { pipe_unix_send(str); }


x86 assembly (clang, -O0):
<e_comm_send_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pipe_unix_send@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_comm_send_str>:
jmp    1030 <pipe_unix_send@plt>

LLVM IR (-O0):
define void @e_comm_send_str(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @pipe_unix_send(i8* %3)
ret void
}

LLVM IR (-O2):
define void @e_comm_send_str(i8* %0) {
%2 = tail call i32 @pipe_unix_send(i8* %0)
ret void
}
/* Variables and functions */
int docx_main(int, char **);
int main(int argc, char **argv) { return docx_main(argc, argv); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <docx_main@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
jmp    1030 <docx_main@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @docx_main(i32 %6, i8** %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @docx_main(i32 %0, i8** %1)
ret i32 %3
}
void a_store_l(volatile void *p, long x) { *(long *)p = x; }


x86 assembly (clang, -O0):
<a_store_l>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_store_l>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @a_store_l(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i64*
store i64 %5, i64* %7
ret void
}

LLVM IR (-O2):
define void @a_store_l(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Type definitions */
struct dirent {
  scalar_t__ d_type;
};

/* Variables and functions */
scalar_t__ DT_DIR;
int folder_selection(const struct dirent *file) {
  return file->d_type == DT_DIR;
}


x86 assembly (clang, -O0):
<folder_selection>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    0x2eca(%rip),%rcx
cmp    (%rcx),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<folder_selection>:
mov    (%rdi),%rcx
mov    0x2ed6(%rip),%rdx
xor    %eax,%eax
cmp    (%rdx),%rcx
sete   %al
ret

LLVM IR (-O0):
%struct.dirent = type { i64 }
@DT_DIR = global i64 0
define i32 @folder_selection(%struct.dirent* %0) {
%2 = alloca %struct.dirent*
store %struct.dirent* %0, %struct.dirent** %2
%3 = load %struct.dirent*, %struct.dirent** %2
%4 = getelementptr inbounds %struct.dirent, %struct.dirent* %3, i32 0, i32 0
%5 = load i64, i64* %4
%6 = load i64, i64* @DT_DIR
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
%struct.dirent = type { i64 }
@DT_DIR = global i64 0
define i32 @folder_selection(%struct.dirent* nocapture %0) {
%2 = getelementptr inbounds %struct.dirent, %struct.dirent* %0, i64 0, i32 0
%3 = load i64, i64* %2
%4 = load i64, i64* @DT_DIR
%5 = icmp eq i64 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ CTEST_ERR(char *, char const *, int, long);
void assert_not_equal(long exp, long real, const char *caller, int line) {
  if ((exp) == (real)) {
    CTEST_ERR("%s:%d  should not be %ld", caller, line, real);
  }
}


x86 assembly (clang, -O0):
<assert_not_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jne    114c <assert_not_equal+0x3c>
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
mov    -0x10(%rbp),%rcx
lea    0xeb9(%rip),%rdi
call   1030 <CTEST_ERR@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assert_not_equal>:
cmp    %rsi,%rdi
jne    112c <assert_not_equal+0x1c>
mov    %rdi,%rax
lea    0xee1(%rip),%rdi
mov    %rdx,%rsi
mov    %ecx,%edx
mov    %rax,%rcx
jmp    1030 <CTEST_ERR@plt>
ret

LLVM IR (-O0):
@.str = [25 x i8] c"%s:%d should not be %ld\00"
define void @assert_not_equal(i64 %0, i64 %1, i8* %2, i32 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i32
store i64 %0, i64* %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i64, i64* %5
%10 = load i64, i64* %6
%11 = icmp eq i64 %9, %10
br i1 %11, label %12, label %17
12: ; preds = %4
%13 = load i8*, i8** %7
%14 = load i32, i32* %8
%15 = load i64, i64* %6
%16 = call i32 @CTEST_ERR(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %13, i32 %14, i64 %15)
br label %17
17: ; preds = %12, %4
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"%s:%d should not be %ld\00"
define void @assert_not_equal(i64 %0, i64 %1, i8* %2, i32 %3) {
%5 = icmp eq i64 %0, %1
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 @CTEST_ERR(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %2, i32 %3, i64 %0)
br label %8
8: ; preds = %6, %4
ret void
}
/* Variables and functions */
scalar_t__ lc_CTYPE();
int Ada_lc_CTYPE() {
  int jresult;
  int result;
  result = (int)lc_CTYPE();
  jresult = result;
  return jresult;
}


x86 assembly (clang, -O0):
<Ada_lc_CTYPE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <lc_CTYPE@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Ada_lc_CTYPE>:
xor    %eax,%eax
jmp    1030 <lc_CTYPE@plt>

LLVM IR (-O0):
define i32 @Ada_lc_CTYPE() {
%1 = alloca i32
%2 = alloca i32
%3 = call i64 (...) @lc_CTYPE()
%4 = trunc i64 %3 to i32
store i32 %4, i32* %2
%5 = load i32, i32* %2
store i32 %5, i32* %1
%6 = load i32, i32* %1
ret i32 %6
}

LLVM IR (-O2):
define i32 @Ada_lc_CTYPE() {
%1 = tail call i64 (...) @lc_CTYPE()
%2 = trunc i64 %1 to i32
ret i32 %2
}