xunge/DecIR huggingface dataset:
/* Variables and functions */
double acos(double);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, double *);
double Arccoseno(double a) {
  printf("Enter a number: ");
  scanf("%lf", &a);
  return (acos(a));
}


x86 assembly (clang, -O0):
<Arccoseno>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
lea    0xec1(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
movsd  -0x8(%rbp),%xmm0
call   1040 <acos@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Arccoseno>:
push   %rax
movsd  %xmm0,(%rsp)
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
lea    0xec8(%rip),%rdi
mov    %rsp,%rsi
call   1050 <scanf@plt>
movsd  (%rsp),%xmm0
call   1040 <acos@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Enter a number: \00"
@.str.1 = [4 x i8] c"%lf\00"
define double @Arccoseno(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), double* %2)
%5 = load double, double* %2
%6 = call double @acos(double %5)
ret double %6
}

LLVM IR (-O2):
@.str = [17 x i8] c"Enter a number: \00"
@.str.1 = [4 x i8] c"%lf\00"
define double @Arccoseno(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), double* %2)
%5 = load double, double* %2
%6 = call double @acos(double %5)
ret double %6
}
void *key_index_to_string(void *key_index) {}


x86 assembly (clang, -O0):
<key_index_to_string>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<key_index_to_string>:
ret

LLVM IR (-O0):
define i8* @key_index_to_string(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %2
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @key_index_to_string(i8* nocapture readnone %0) {
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, double *);
int main() {
  int X;
  double Y;
  scanf("%d %lf", &X, &Y);
  printf("%.3lf km/l\n", (X * 1.0) / Y);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed9(%rip),%rdi
lea    -0x4(%rbp),%rsi
lea    -0x10(%rbp),%rdx
call   1040 <scanf@plt>
cvtsi2sdl -0x4(%rbp),%xmm0
movsd  0xeb7(%rip),%xmm1
mulsd  %xmm1,%xmm0
divsd  -0x10(%rbp),%xmm0
cvttsd2si %xmm0,%esi
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
lea    0xed5(%rip),%rdi
lea    0xc(%rsp),%rsi
lea    0x10(%rsp),%rdx
call   1040 <scanf@plt>
cvtsi2sdl 0xc(%rsp),%xmm0
divsd  0x10(%rsp),%xmm0
cvttsd2si %xmm0,%esi
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%d %lf\00"
@.str.1 = [12 x i8] c"%.3lf km/l\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = call i32 @scanf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32* %1, double* %2)
%4 = load i32, i32* %1
%5 = sitofp i32 %4 to double
%6 = fmul double %5, 1.000000e+00
%7 = load double, double* %2
%8 = fdiv double %6, %7
%9 = fptosi double %8 to i32
%10 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%d %lf\00"
@.str.1 = [12 x i8] c"%.3lf km/l\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = bitcast i32* %1 to i8*
%4 = bitcast double* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32* %1, double* %2)
%6 = load i32, i32* %1
%7 = sitofp i32 %6 to double
%8 = load double, double* %2
%9 = fdiv double %7, %8
%10 = fptosi double %9 to i32
%11 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 %10)
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ send_event;
};
typedef TYPE_1__ XSelectionRequestEvent;

/* Variables and functions */
int get_XSelectionRequestEvent_send_event(void *_p) {
  return (int)((XSelectionRequestEvent *)_p)->send_event;
}


x86 assembly (clang, -O0):
<get_XSelectionRequestEvent_send_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XSelectionRequestEvent_send_event>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XSelectionRequestEvent_send_event(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XSelectionRequestEvent_send_event(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
void vfs_dq_free_inode(struct inode *inode) {}


x86 assembly (clang, -O0):
<vfs_dq_free_inode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vfs_dq_free_inode>:
ret

LLVM IR (-O0):
%struct.inode = type opaque
define void @vfs_dq_free_inode(%struct.inode* %0) {
%2 = alloca %struct.inode*
store %struct.inode* %0, %struct.inode** %2
ret void
}

LLVM IR (-O2):
%struct.inode = type opaque
define void @vfs_dq_free_inode(%struct.inode* nocapture %0) {
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *malloc_and_null_check(size_t size) {
  void *tmp = malloc(size);
  if (!tmp) {
    (0);
  }
  return tmp;
}


x86 assembly (clang, -O0):
<malloc_and_null_check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1139 <malloc_and_null_check+0x29>
jmp    1139 <malloc_and_null_check+0x29>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<malloc_and_null_check>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @malloc_and_null_check(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %9, label %8
8: ; preds = %1
br label %9
9: ; preds = %8, %1
%10 = load i8*, i8** %3
ret i8* %10
}

LLVM IR (-O2):
define noalias i8* @malloc_and_null_check(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
int c(int N, int B) { return N >> B & 1; }


x86 assembly (clang, -O0):
<c>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c>:
mov    %esi,%ecx
mov    %edi,%eax
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @c(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = ashr i32 %5, %6
%8 = and i32 %7, 1
ret i32 %8
}

LLVM IR (-O2):
define i32 @c(i32 %0, i32 %1) {
%3 = lshr i32 %0, %1
%4 = and i32 %3, 1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ P();
int /*<<< orphan*/ clear_cache();
double get_counter();
int /*<<< orphan*/ start_counter();
double time_P_cold() {
  P();
  clear_cache();
  start_counter();
  P();
  return get_counter();
}


x86 assembly (clang, -O0):
<time_P_cold>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <P@plt>
mov    $0x0,%al
call   1050 <clear_cache@plt>
mov    $0x0,%al
call   1040 <start_counter@plt>
mov    $0x0,%al
call   1030 <P@plt>
mov    $0x0,%al
call   1060 <get_counter@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_P_cold>:
push   %rax
xor    %eax,%eax
call   1030 <P@plt>
xor    %eax,%eax
call   1050 <clear_cache@plt>
xor    %eax,%eax
call   1040 <start_counter@plt>
xor    %eax,%eax
call   1030 <P@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <get_counter@plt>

LLVM IR (-O0):
define double @time_P_cold() {
%1 = call i32 (...) @P()
%2 = call i32 (...) @clear_cache()
%3 = call i32 (...) @start_counter()
%4 = call i32 (...) @P()
%5 = call double (...) @get_counter()
ret double %5
}

LLVM IR (-O2):
define double @time_P_cold() {
%1 = tail call i32 (...) @P()
%2 = tail call i32 (...) @clear_cache()
%3 = tail call i32 (...) @start_counter()
%4 = tail call i32 (...) @P()
%5 = tail call double (...) @get_counter()
ret double %5
}
/* Variables and functions */
char *strcpy(char *, char const *);
char *genstrcpy(char *dest, const char *src) { return strcpy(dest, src); }


x86 assembly (clang, -O0):
<genstrcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genstrcpy>:
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
define i8* @genstrcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @strcpy(i8* %5, i8* %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @genstrcpy(i8* returned %0, i8* nocapture %1) {
%3 = tail call i8* @strcpy(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i8* %0
}
/* Variables and functions */
int strlen(char *);
int append_in(char *buffer, char c) {
  int i = strlen(buffer);
  int result = 1;
  if (i < 4096 - 1) {
    buffer[i] = c;
    buffer[i + 1] = '\0';
  } else {
    result = 0;
  }
  return result;
}


x86 assembly (clang, -O0):
<append_in>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
cmpl   $0xfff,-0x10(%rbp)
jge    1166 <append_in+0x56>
mov    -0x9(%rbp),%dl
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
jmp    116d <append_in+0x5d>
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<append_in>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0xffe,%ecx
jg     113a <append_in+0x2a>
movslq %ecx,%rax
mov    %bpl,(%rbx,%rax,1)
movb   $0x0,0x1(%rbx,%rax,1)
mov    $0x1,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @append_in(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8 %1, i8* %4
%7 = load i8*, i8** %3
%8 = call i32 @strlen(i8* %7)
store i32 %8, i32* %5
store i32 1, i32* %6
%9 = load i32, i32* %5
%10 = icmp slt i32 %9, 4095
br i1 %10, label %11, label %22
11: ; preds = %2
%12 = load i8, i8* %4
%13 = load i8*, i8** %3
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
store i8 %12, i8* %16
%17 = load i8*, i8** %3
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %17, i64 %20
store i8 0, i8* %21
br label %23
22: ; preds = %2
store i32 0, i32* %6
br label %23
23: ; preds = %22, %11
%24 = load i32, i32* %6
ret i32 %24
}

LLVM IR (-O2):
define i32 @append_in(i8* %0, i8 signext %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = icmp slt i32 %3, 4095
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = sext i32 %3 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
store i8 %1, i8* %7
%8 = add nsw i32 %3, 1
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %0, i64 %9
store i8 0, i8* %10
br label %11
11: ; preds = %2, %5
%12 = phi i32 [ 1, %5 ], [ 0, %2 ]
ret i32 %12
}
void __outlc(unsigned int value, unsigned short port) {
  __asm__ __volatile__("out"
                       "l"
                       " %"
                       "0,%"
                       ""
                       "1"
                       :
                       : "a"(value), "id"(port));
}


x86 assembly (clang, -O0):
<__outlc>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %edi,-0x4(%rbp)
mov    %ax,-0x6(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x6(%rbp),%dx
out    %eax,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__outlc>:
mov    %esi,%edx
mov    %edi,%eax
out    %eax,(%dx)
ret

LLVM IR (-O0):
define void @__outlc(i32 %0, i16 zeroext %1) {
%3 = alloca i32
%4 = alloca i16
store i32 %0, i32* %3
store i16 %1, i16* %4
%5 = load i32, i32* %3
%6 = load i16, i16* %4
ret void
}

LLVM IR (-O2):
define void @__outlc(i32 %0, i16 zeroext %1) {
tail call void asm sideeffect "outl $0,$1", "{ax},i{dx},~{dirflag},~{fpsr},~{flags}"(i32 %0, i16 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void genksyms_usage(void) {
  fputs(
      "Usage:\n"
      "genksyms [-dDwqhV] > /path/to/.tmp_obj.ver\n"
      "\n"
      "  -d                    Increment the debug level (repeatable)\n"
      "  -D                    Dump expanded symbol defs (for debugging only)\n"
      "  -w                    Enable warnings\n"
      "  -q                    Disable warnings (default)\n"
      "  -h                    Print this message\n"
      "  -V                    Print the release version\n",
      stderr);
}


x86 assembly (clang, -O0):
<genksyms_usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <fputs@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<genksyms_usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
lea    0xee0(%rip),%rdi
jmp    1030 <fputs@plt>

LLVM IR (-O0):
@.str = [370 x i8] c"Usage:\0Agenksyms [-dDwqhV] > /path/to/.tmp_obj.ver\0A\0A -d Increment the debug level (repeatable)\0A -D Dump expanded symbol defs (for debugging only)\0A -w Enable warnings\0A -q Disable warnings (default)\0A -h Print this message\0A -V Print the release version\0A\00"
@stderr = global i32 0
define void @genksyms_usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([370 x i8], [370 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [370 x i8] c"Usage:\0Agenksyms [-dDwqhV] > /path/to/.tmp_obj.ver\0A\0A -d Increment the debug level (repeatable)\0A -D Dump expanded symbol defs (for debugging only)\0A -w Enable warnings\0A -q Disable warnings (default)\0A -h Print this message\0A -V Print the release version\0A\00"
@stderr = global i32 0
define void @genksyms_usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([370 x i8], [370 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
void load_stack_canary_segment(void) {}


x86 assembly (clang, -O0):
<load_stack_canary_segment>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_stack_canary_segment>:
ret

LLVM IR (-O0):
define void @load_stack_canary_segment() {
ret void
}

LLVM IR (-O2):
define void @load_stack_canary_segment() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void iv_destroy_http_buffer(char *buf) {
  if (NULL != buf) {
    free(buf);
  }
}


x86 assembly (clang, -O0):
<iv_destroy_http_buffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
cmp    -0x8(%rbp),%rax
je     1131 <iv_destroy_http_buffer+0x21>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iv_destroy_http_buffer>:
test   %rdi,%rdi
je     111a <iv_destroy_http_buffer+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @iv_destroy_http_buffer(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* null, %3
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @iv_destroy_http_buffer(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int Quit(int argc, char *argv[]) { exit(0); }


x86 assembly (clang, -O0):
<Quit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<Quit>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @Quit(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @Quit(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @exit(i32 0)
unreachable
}
int isallzenkaku(str)
unsigned char *str;
{
  while (*str) {
    if (str[0] <= 0xa0)
      return 0;
    if (str[1] <= 0xa0)
      return 0;
    str += 2;
  }
  return 1;
}


x86 assembly (clang, -O0):
<isallzenkaku>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1163 <isallzenkaku+0x63>
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
cmp    $0xa0,%eax
jg     1133 <isallzenkaku+0x33>
movl   $0x0,-0x4(%rbp)
jmp    116a <isallzenkaku+0x6a>
mov    -0x10(%rbp),%rax
movzbl 0x1(%rax),%eax
cmp    $0xa0,%eax
jg     1152 <isallzenkaku+0x52>
movl   $0x0,-0x4(%rbp)
jmp    116a <isallzenkaku+0x6a>
mov    -0x10(%rbp),%rax
add    $0x2,%rax
mov    %rax,-0x10(%rbp)
jmp    1108 <isallzenkaku+0x8>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isallzenkaku>:
mov    (%rdi),%cl
test   %cl,%cl
je     1126 <isallzenkaku+0x26>
add    $0x2,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
cmp    $0xa1,%cl
jb     112b <isallzenkaku+0x2b>
cmpb   $0xa0,-0x1(%rdi)
jbe    112b <isallzenkaku+0x2b>
movzbl (%rdi),%ecx
add    $0x2,%rdi
test   %cl,%cl
jne    1110 <isallzenkaku+0x10>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isallzenkaku(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %22, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %25
8: ; preds = %4
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 0
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = icmp sle i32 %12, 160
br i1 %13, label %14, label %15
14: ; preds = %8
store i32 0, i32* %2
br label %26
15: ; preds = %8
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i64 1
%18 = load i8, i8* %17
%19 = zext i8 %18 to i32
%20 = icmp sle i32 %19, 160
br i1 %20, label %21, label %22
21: ; preds = %15
store i32 0, i32* %2
br label %26
22: ; preds = %15
%23 = load i8*, i8** %3
%24 = getelementptr inbounds i8, i8* %23, i64 2
store i8* %24, i8** %3
br label %4
25: ; preds = %4
store i32 1, i32* %2
br label %26
26: ; preds = %25, %21, %14
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @isallzenkaku(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %7
4: ; preds = %11
%5 = load i8, i8* %15
%6 = icmp eq i8 %5, 0
br i1 %6, label %16, label %7
7: ; preds = %1, %4
%8 = phi i8 [ %5, %4 ], [ %2, %1 ]
%9 = phi i8* [ %15, %4 ], [ %0, %1 ]
%10 = icmp ult i8 %8, -95
br i1 %10, label %16, label %11
11: ; preds = %7
%12 = getelementptr inbounds i8, i8* %9, i64 1
%13 = load i8, i8* %12
%14 = icmp ult i8 %13, -95
%15 = getelementptr inbounds i8, i8* %9, i64 2
br i1 %14, label %16, label %4
16: ; preds = %7, %11, %4, %1
%17 = phi i32 [ 1, %1 ], [ 1, %4 ], [ 0, %11 ], [ 0, %7 ]
ret i32 %17
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int contestants[] = {1, 2, 3};
  int choice = contestants[0];
  contestants[0] = 2;
  contestants[1] = contestants[2];
  contestants[2] = choice;
  choice = contestants[1];
  printf("I'm going to pick contestants number %i\n", choice);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xed8(%rip),%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
movl   $0x2,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xeb0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x3,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.main.contestants = [3 x i32] [i32 1, i32 2, i32 3]
@.str = [41 x i8] c"I'm going to pick contestants number %i\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [3 x i32]
%3 = alloca i32
store i32 0, i32* %1
%4 = bitcast [3 x i32]* %2 to i8*
%5 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 0
%6 = load i32, i32* %5
store i32 %6, i32* %3
%7 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 0
store i32 2, i32* %7
%8 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 2
%9 = load i32, i32* %8
%10 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 1
store i32 %9, i32* %10
%11 = load i32, i32* %3
%12 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 2
store i32 %11, i32* %12
%13 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 1
%14 = load i32, i32* %13
store i32 %14, i32* %3
%15 = load i32, i32* %3
%16 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 %15)
ret i32 0
}

LLVM IR (-O2):
@.str = [41 x i8] c"I'm going to pick contestants number %i\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 3)
ret i32 0
}
/* Variables and functions */
float acos(float);
float Q_acos(float c) {
  float angle;
  angle = acos(c);
  if (angle > 3.14159265358979323846f) {
    return 3.14159265358979323846f;
  }
  if (angle < 0.0f) {
    return 0.0f;
  }
  return angle;
}


x86 assembly (clang, -O0):
<Q_acos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
call   1030 <acos@plt>
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movss  0xec7(%rip),%xmm1
ucomiss %xmm1,%xmm0
jbe    1154 <Q_acos+0x44>
movss  0xeb6(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1178 <Q_acos+0x68>
xorps  %xmm0,%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    116e <Q_acos+0x5e>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1178 <Q_acos+0x68>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Q_acos>:
push   %rax
call   1030 <acos@plt>
xorps  %xmm2,%xmm2
maxss  %xmm0,%xmm2
movss  0xedb(%rip),%xmm3
movaps %xmm3,%xmm1
cmpltss %xmm0,%xmm1
movaps %xmm1,%xmm0
andnps %xmm2,%xmm0
andps  %xmm3,%xmm1
orps   %xmm0,%xmm1
movaps %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @Q_acos(float %0) {
%2 = alloca float
%3 = alloca float
%4 = alloca float
store float %0, float* %3
%5 = load float, float* %3
%6 = call float @acos(float %5)
store float %6, float* %4
%7 = load float, float* %4
%8 = fcmp ogt float %7, 0x400921FB60000000
br i1 %8, label %9, label %10
9: ; preds = %1
store float 0x400921FB60000000, float* %2
br label %16
10: ; preds = %1
%11 = load float, float* %4
%12 = fcmp olt float %11, 0.000000e+00
br i1 %12, label %13, label %14
13: ; preds = %10
store float 0.000000e+00, float* %2
br label %16
14: ; preds = %10
%15 = load float, float* %4
store float %15, float* %2
br label %16
16: ; preds = %14, %13, %9
%17 = load float, float* %2
ret float %17
}

LLVM IR (-O2):
define float @Q_acos(float %0) {
%2 = tail call float @acos(float %0)
%3 = fcmp ogt float %2, 0x400921FB60000000
%4 = fcmp olt float %2, 0.000000e+00
%5 = select i1 %4, float 0.000000e+00, float %2
%6 = select i1 %3, float 0x400921FB60000000, float %5
ret float %6
}
int test_imm_15int32_reg(int val) { return ((val) & (0x15 << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_15int32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x15,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_15int32_reg>:
test   $0x15,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_15int32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 21
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_15int32_reg(i32 %0) {
%2 = and i32 %0, 21
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ c(double, double, double);
double fmin(int /*<<< orphan*/, int /*<<< orphan*/);
double nh(double x, double y) {
  return fmin(c(x + 0.9, y + 0.25, 0.03), c(x + 0.75, y + 0.25, 0.03));
}


x86 assembly (clang, -O0):
<nh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  0xede(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  0xec1(%rip),%xmm1
addsd  -0x10(%rbp),%xmm1
movsd  0xeac(%rip),%xmm2
call   1040 <c@plt>
mov    %eax,-0x14(%rbp)
movsd  0xeac(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  0xe97(%rip),%xmm1
addsd  -0x10(%rbp),%xmm1
movsd  0xe82(%rip),%xmm2
call   1040 <c@plt>
mov    -0x14(%rbp),%edi
mov    %eax,%esi
call   1030 <fmin@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nh>:
push   %rbx
sub    $0x10,%rsp
movapd %xmm0,%xmm2
movsd  %xmm0,0x8(%rsp)
movsd  0xec9(%rip),%xmm0
addsd  %xmm2,%xmm0
addsd  0xec5(%rip),%xmm1
movsd  %xmm1,(%rsp)
movsd  0xec0(%rip),%xmm2
call   1040 <c@plt>
mov    %eax,%ebx
movsd  0x8(%rsp),%xmm0
addsd  0xeb3(%rip),%xmm0
movsd  (%rsp),%xmm1
movsd  0xe9e(%rip),%xmm2
call   1040 <c@plt>
mov    %ebx,%edi
mov    %eax,%esi
add    $0x10,%rsp
pop    %rbx
jmp    1030 <fmin@plt>

LLVM IR (-O0):
define double @nh(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = fadd double %5, 9.000000e-01
%7 = load double, double* %4
%8 = fadd double %7, 2.500000e-01
%9 = call i32 @c(double %6, double %8, double 3.000000e-02)
%10 = load double, double* %3
%11 = fadd double %10, 7.500000e-01
%12 = load double, double* %4
%13 = fadd double %12, 2.500000e-01
%14 = call i32 @c(double %11, double %13, double 3.000000e-02)
%15 = call double @fmin(i32 %9, i32 %14)
ret double %15
}

LLVM IR (-O2):
define double @nh(double %0, double %1) {
%3 = fadd double %0, 9.000000e-01
%4 = fadd double %1, 2.500000e-01
%5 = tail call i32 @c(double %3, double %4, double 3.000000e-02)
%6 = fadd double %0, 7.500000e-01
%7 = tail call i32 @c(double %6, double %4, double 3.000000e-02)
%8 = tail call double @fmin(i32 %5, i32 %7)
ret double %8
}
int c020(void) { return 0; }


x86 assembly (clang, -O0):
<c020>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c020>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @c020() {
ret i32 0
}

LLVM IR (-O2):
define i32 @c020() {
ret i32 0
}
/* Variables and functions */
int fabs(double);
double _prdic_sigmoid(double x) { return (x / (1 + fabs(x))); }


x86 assembly (clang, -O0):
<_prdic_sigmoid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <fabs@plt>
movsd  -0x10(%rbp),%xmm0
add    $0x1,%eax
cvtsi2sd %eax,%xmm1
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_prdic_sigmoid>:
push   %rax
movsd  %xmm0,(%rsp)
call   1030 <fabs@plt>
add    $0x1,%eax
cvtsi2sd %eax,%xmm1
movsd  (%rsp),%xmm0
divsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @_prdic_sigmoid(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = call i32 @fabs(double %4)
%6 = add nsw i32 1, %5
%7 = sitofp i32 %6 to double
%8 = fdiv double %3, %7
ret double %8
}

LLVM IR (-O2):
define double @_prdic_sigmoid(double %0) {
%2 = tail call i32 @fabs(double %0)
%3 = add nsw i32 %2, 1
%4 = sitofp i32 %3 to double
%5 = fdiv double %0, %4
ret double %5
}
int DoComment(const char *str, int pos) {
  int inchar;
  inchar = str[pos];
  while ((inchar != '\n') && (inchar != '\r')) {
    if (inchar == '\0') {
      return (pos);
    }
    pos++;
    inchar = str[pos];
  }
  return (pos);
}


x86 assembly (clang, -O0):
<DoComment>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
mov    %eax,-0x18(%rbp)
xor    %eax,%eax
cmpl   $0xa,-0x18(%rbp)
mov    %al,-0x19(%rbp)
je     1133 <DoComment+0x33>
cmpl   $0xd,-0x18(%rbp)
setne  %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
test   $0x1,%al
jne    1143 <DoComment+0x43>
jmp    1175 <DoComment+0x75>
cmpl   $0x0,-0x18(%rbp)
jne    1158 <DoComment+0x58>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    117b <DoComment+0x7b>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
mov    %eax,-0x18(%rbp)
jmp    111a <DoComment+0x1a>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoComment>:
mov    %esi,%eax
movslq %esi,%rcx
add    %rdi,%rcx
mov    $0x2401,%edx
jmp    1117 <DoComment+0x17>
nop
add    $0x1,%eax
add    $0x1,%rcx
movzbl (%rcx),%esi
cmp    $0xd,%rsi
ja     1110 <DoComment+0x10>
bt     %rsi,%rdx
jae    1110 <DoComment+0x10>
ret

LLVM IR (-O0):
define i32 @DoComment(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
store i32 %12, i32* %6
br label %13
13: ; preds = %26, %2
%14 = load i32, i32* %6
%15 = icmp ne i32 %14, 10
br i1 %15, label %16, label %19
16: ; preds = %13
%17 = load i32, i32* %6
%18 = icmp ne i32 %17, 13
br label %19
19: ; preds = %16, %13
%20 = phi i1 [ false, %13 ], [ %18, %16 ]
br i1 %20, label %21, label %35
21: ; preds = %19
%22 = load i32, i32* %6
%23 = icmp eq i32 %22, 0
br i1 %23, label %24, label %26
24: ; preds = %21
%25 = load i32, i32* %5
store i32 %25, i32* %3
br label %37
26: ; preds = %21
%27 = load i32, i32* %5
%28 = add nsw i32 %27, 1
store i32 %28, i32* %5
%29 = load i8*, i8** %4
%30 = load i32, i32* %5
%31 = sext i32 %30 to i64
%32 = getelementptr inbounds i8, i8* %29, i64 %31
%33 = load i8, i8* %32
%34 = sext i8 %33 to i32
store i32 %34, i32* %6
br label %13
35: ; preds = %19
%36 = load i32, i32* %5
store i32 %36, i32* %3
br label %37
37: ; preds = %35, %24
%38 = load i32, i32* %3
ret i32 %38
}

LLVM IR (-O2):
define i32 @DoComment(i8* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
br label %4
4: ; preds = %8, %2
%5 = phi i64 [ %9, %8 ], [ %3, %2 ]
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = load i8, i8* %6
switch i8 %7, label %8 [
i8 13, label %10
i8 10, label %10
i8 0, label %10
]
8: ; preds = %4
%9 = add i64 %5, 1
br label %4
10: ; preds = %4, %4, %4
%11 = trunc i64 %5 to i32
ret i32 %11
}
/* Type definitions */
struct gpio_rgb_led {
  int dummy;
};

/* Variables and functions */
int ENOSYS;
int led_gpio_rgb_register(struct gpio_rgb_led *led) { return -ENOSYS; }


x86 assembly (clang, -O0):
<led_gpio_rgb_register>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    0x2ed7(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<led_gpio_rgb_register>:
mov    0x2ee1(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
%struct.gpio_rgb_led = type { i32 }
@ENOSYS = global i32 0
define i32 @led_gpio_rgb_register(%struct.gpio_rgb_led* %0) {
%2 = alloca %struct.gpio_rgb_led*
store %struct.gpio_rgb_led* %0, %struct.gpio_rgb_led** %2
%3 = load i32, i32* @ENOSYS
%4 = sub nsw i32 0, %3
ret i32 %4
}

LLVM IR (-O2):
%struct.gpio_rgb_led = type { i32 }
@ENOSYS = global i32 0
define i32 @led_gpio_rgb_register(%struct.gpio_rgb_led* nocapture readnone %0) {
%2 = load i32, i32* @ENOSYS
%3 = sub nsw i32 0, %2
ret i32 %3
}
long long gi2(long long j, unsigned char *b, int i) { return j + b[i]; }


x86 assembly (clang, -O0):
<gi2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
movslq -0x14(%rbp),%rdx
movzbl (%rcx,%rdx,1),%ecx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gi2>:
movslq %edx,%rax
movzbl (%rsi,%rax,1),%eax
add    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @gi2(i64 %0, i8* %1, i32 %2) {
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i32
store i64 %0, i64* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i64, i64* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = zext i8 %12 to i64
%14 = add nsw i64 %7, %13
ret i64 %14
}

LLVM IR (-O2):
define i64 @gi2(i64 %0, i8* nocapture %1, i32 %2) {
%4 = sext i32 %2 to i64
%5 = getelementptr inbounds i8, i8* %1, i64 %4
%6 = load i8, i8* %5
%7 = zext i8 %6 to i64
%8 = add nsw i64 %7, %0
ret i64 %8
}
int test_imm_09uint16_reg(unsigned short val) {
  return ((val) & (-0x09 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_09uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xfffffff7,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_09uint16_reg>:
test   $0xfff7,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_09uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -9
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_09uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -9
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ rgph_u64_xxh64s_data(int /*<<< orphan*/ const *, size_t,
                                        uintptr_t);
uint64_t rgph_u64_xxh64s_u8a(const uint8_t *key, size_t len, uintptr_t seed) {
  return rgph_u64_xxh64s_data(key, len, seed);
}


x86 assembly (clang, -O0):
<rgph_u64_xxh64s_u8a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <rgph_u64_xxh64s_data@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgph_u64_xxh64s_u8a>:
jmp    1030 <rgph_u64_xxh64s_data@plt>

LLVM IR (-O0):
define i32 @rgph_u64_xxh64s_u8a(i32* %0, i64 %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i64
%6 = alloca i64
store i32* %0, i32** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i32*, i32** %4
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = call i32 @rgph_u64_xxh64s_data(i32* %7, i64 %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @rgph_u64_xxh64s_u8a(i32* %0, i64 %1, i64 %2) {
%4 = tail call i32 @rgph_u64_xxh64s_data(i32* %0, i64 %1, i64 %2)
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
uint8_t mp_load_u8(const char **data) {
  struct __attribute__((packed)) cast {
    uint8_t val;
  };
  uint8_t val = (((struct cast *)*data)->val);
  *data += sizeof(uint8_t);
  return val;
}


x86 assembly (clang, -O0):
<mp_load_u8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x4,%rcx
mov    %rcx,(%rax)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp_load_u8>:
mov    (%rdi),%rcx
mov    (%rcx),%eax
add    $0x4,%rcx
mov    %rcx,(%rdi)
ret

LLVM IR (-O0):
%struct.cast = type { i32 }
define i32 @mp_load_u8(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to %struct.cast*
%7 = getelementptr inbounds %struct.cast, %struct.cast* %6, i32 0, i32 0
%8 = load i32, i32* %7
store i32 %8, i32* %3
%9 = load i8**, i8*** %2
%10 = load i8*, i8** %9
%11 = getelementptr inbounds i8, i8* %10, i64 4
store i8* %11, i8** %9
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @mp_load_u8(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = bitcast i8* %2 to i32*
%4 = load i32, i32* %3
%5 = getelementptr inbounds i8, i8* %2, i64 4
store i8* %5, i8** %0
ret i32 %4
}
int test_imm_F4int64_highword_reg(long long val) {
  return ((val >> 32) & (0xF4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F4int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xf4,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F4int64_highword_reg>:
movabs $0xf400000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F4int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 244
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_F4int64_highword_reg(i64 %0) {
%2 = and i64 %0, 1047972020224
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isascii(int);
void t_isascii_0xa6() {
  Assert_real((isascii(166) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              835, ("isascii should be 0 for 0xa6"));
}


x86 assembly (clang, -O0):
<t_isascii_0xa6>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa6,%edi
call   1030 <isascii@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x343,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0xa6>:
push   %rax
mov    $0xa6,%edi
call   1030 <isascii@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x343,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xa6\00"
define void @t_isascii_0xa6() {
%1 = call i64 @isascii(i32 166)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 835, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xa6\00"
define void @t_isascii_0xa6() {
%1 = tail call i64 @isascii(i32 166)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 835, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
unsigned char get_unsigned_char_min() {
  unsigned int min = 0;
  return (min);
}


x86 assembly (clang, -O0):
<get_unsigned_char_min>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_unsigned_char_min>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i8 @get_unsigned_char_min() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
%3 = trunc i32 %2 to i8
ret i8 %3
}

LLVM IR (-O2):
define zeroext i8 @get_unsigned_char_min() {
ret i8 0
}
/* Variables and functions */
int /*<<< orphan*/ clar_report_errors();
int /*<<< orphan*/ printf(char *);
void clar_print_shutdown(int test_count, int suite_count, int error_count) {
  (void)test_count;
  (void)suite_count;
  (void)error_count;
  printf("\n\n");
  clar_report_errors();
}


x86 assembly (clang, -O0):
<clar_print_shutdown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <clar_report_errors@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clar_print_shutdown>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <clar_report_errors@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"\0A\0A\00"
define void @clar_print_shutdown(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%11 = call i32 (...) @clar_report_errors()
ret void
}

LLVM IR (-O2):
@str = [2 x i8] c"\0A\00"
define void @clar_print_shutdown(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str, i64 0, i64 0))
%5 = tail call i32 (...) @clar_report_errors()
ret void
}
int is_ws(int ch) {
  return ch == ' ' || ch == '\t' || ch == '\r' || ch == '\n';
}


x86 assembly (clang, -O0):
<is_ws>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <is_ws+0x3e>
mov    $0x1,%al
cmpl   $0x9,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <is_ws+0x3e>
mov    $0x1,%al
cmpl   $0xd,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113e <is_ws+0x3e>
cmpl   $0xa,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_ws>:
cmp    $0x20,%edi
ja     111d <is_ws+0x1d>
mov    $0x1,%eax
mov    %edi,%ecx
movabs $0x100002200,%rdx
bt     %rcx,%rdx
jae    111d <is_ws+0x1d>
ret
xor    %eax,%eax
cmp    $0xa,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_ws(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 32
br i1 %4, label %14, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 9
br i1 %7, label %14, label %8
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 13
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 10
br label %14
14: ; preds = %11, %8, %5, %1
%15 = phi i1 [ true, %8 ], [ true, %5 ], [ true, %1 ], [ %13, %11 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @is_ws(i32 %0) {
switch i32 %0, label %2 [
i32 32, label %5
i32 13, label %5
i32 9, label %5
]
2: ; preds = %1
%3 = icmp eq i32 %0, 10
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
int test_imm_F3int16_mem(short *val) {
  return ((*val) & (0xF3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F3int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xf3,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F3int16_mem>:
testb  $0xf3,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F3int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 243
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_F3int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 243
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int test_imm_A1uint8_reg(unsigned char val) {
  return ((val) & (-0xA1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A1uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffff5f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A1uint8_reg>:
test   $0x5f,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A1uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -161
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A1uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 95
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
decode_i_pn(int a, int b) {
  b = (b >> 5) & 31;
  return (a & 0xfff0000f) | 16 << b;
}


x86 assembly (clang, -O0):
<decode_i_pn>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x5,%eax
and    $0x1f,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xfff0000f,%eax
mov    -0x8(%rbp),%ecx
mov    $0x10,%edx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode_i_pn>:
mov    %esi,%ecx
shr    $0x5,%ecx
and    $0xfff0000f,%edi
mov    $0x10,%eax
shl    %cl,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @decode_i_pn(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 5
%7 = and i32 %6, 31
store i32 %7, i32* %4
%8 = load i32, i32* %3
%9 = and i32 %8, -1048561
%10 = load i32, i32* %4
%11 = shl i32 16, %10
%12 = or i32 %9, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @decode_i_pn(i32 %0, i32 %1) {
%3 = lshr i32 %1, 5
%4 = and i32 %3, 31
%5 = and i32 %0, -1048561
%6 = shl i32 16, %4
%7 = or i32 %6, %5
ret i32 %7
}
f(int n) {
  __typeof(short[2][n]) x;
  return sizeof x;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x10(%rbp)
mov    %rax,-0x18(%rbp)
shl    $0x1,%rax
shl    $0x1,%rax
mov    -0x10(%rbp),%rcx
mov    %rcx,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    0x0(,%rdi,4),%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i64
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
%7 = call i8* @llvm.stacksave()
store i8* %7, i8** %3
%8 = mul nuw i64 2, %6
%9 = alloca i16, i64 %8
store i64 %6, i64* %4
%10 = mul nuw i64 2, %6
%11 = mul nuw i64 2, %10
%12 = trunc i64 %11 to i32
%13 = load i8*, i8** %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = shl i32 %0, 2
ret i32 %2
}