xunge/DecIR huggingface dataset:
int producto(int a, int b) {
  if (b == 0)
    return 0;
  else
    return a + producto(a, b - 1);
}


x86 assembly (clang, -O0):
<producto>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1134 <producto+0x24>
movl   $0x0,-0x4(%rbp)
jmp    1152 <producto+0x42>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
sub    $0x1,%esi
call   1030 <producto@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<producto>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @producto(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 0, i32* %3
br label %16
9: ; preds = %2
%10 = load i32, i32* %4
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = sub nsw i32 %12, 1
%14 = call i32 @producto(i32 %11, i32 %13)
%15 = add nsw i32 %10, %14
store i32 %15, i32* %3
br label %16
16: ; preds = %9, %8
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @producto(i32 %0, i32 %1) {
%3 = mul i32 %1, %0
ret i32 %3
}
/* Type definitions */
struct radix_tree_root {
  int dummy;
};

/* Variables and functions */
void **__lookup_slot(struct radix_tree_root *, unsigned long);
void **radix_tree_lookup_slot(struct radix_tree_root *root,
                              unsigned long index) {
  return __lookup_slot(root, index);
}


x86 assembly (clang, -O0):
<radix_tree_lookup_slot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <__lookup_slot@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<radix_tree_lookup_slot>:
jmp    1030 <__lookup_slot@plt>

LLVM IR (-O0):
%struct.radix_tree_root = type { i32 }
define i8** @radix_tree_lookup_slot(%struct.radix_tree_root* %0, i64 %1) {
%3 = alloca %struct.radix_tree_root*
%4 = alloca i64
store %struct.radix_tree_root* %0, %struct.radix_tree_root** %3
store i64 %1, i64* %4
%5 = load %struct.radix_tree_root*, %struct.radix_tree_root** %3
%6 = load i64, i64* %4
%7 = call i8** @__lookup_slot(%struct.radix_tree_root* %5, i64 %6)
ret i8** %7
}

LLVM IR (-O2):
%struct.radix_tree_root = type { i32 }
define i8** @radix_tree_lookup_slot(%struct.radix_tree_root* %0, i64 %1) {
%3 = tail call i8** @__lookup_slot(%struct.radix_tree_root* %0, i64 %1)
ret i8** %3
}
void main(void) {
  volatile char foo = 0x87;
  volatile int bar = 0x5678;
  volatile long baz = 0x12340000;
  foo += bar;
  baz += bar;
  bar += 0x5443;
  (void)foo, bar, baz;
  ;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movb   $0x87,-0x1(%rbp)
movl   $0x5678,-0x8(%rbp)
movq   $0x12340000,-0x10(%rbp)
12
mov    -0x8(%rbp),%ecx
mov    -0x1(%rbp),%al
movsbl %al,%eax
add    %ecx,%eax
mov    %al,-0x1(%rbp)
mov    -0x8(%rbp),%eax
movslq %eax,%rcx
mov    -0x10(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0x5443,%eax
mov    %eax,-0x8(%rbp)
mov    -0x1(%rbp),%al
mov    -0x8(%rbp),%eax
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
movb   $0x87,-0xd(%rsp)
movl   $0x5678,-0xc(%rsp)
movq   $0x12340000,-0x8(%rsp)
34 12
mov    -0xc(%rsp),%eax
add    %al,-0xd(%rsp)
movslq -0xc(%rsp),%rax
add    %rax,-0x8(%rsp)
addl   $0x5443,-0xc(%rsp)
mov    -0xd(%rsp),%al
mov    -0xc(%rsp),%eax
mov    -0x8(%rsp),%rax
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca i8
%2 = alloca i32
%3 = alloca i64
store volatile i8 -121, i8* %1
store volatile i32 22136, i32* %2
store volatile i64 305397760, i64* %3
%4 = load volatile i32, i32* %2
%5 = load volatile i8, i8* %1
%6 = sext i8 %5 to i32
%7 = add nsw i32 %6, %4
%8 = trunc i32 %7 to i8
store volatile i8 %8, i8* %1
%9 = load volatile i32, i32* %2
%10 = sext i32 %9 to i64
%11 = load volatile i64, i64* %3
%12 = add nsw i64 %11, %10
store volatile i64 %12, i64* %3
%13 = load volatile i32, i32* %2
%14 = add nsw i32 %13, 21571
store volatile i32 %14, i32* %2
%15 = load volatile i8, i8* %1
%16 = load volatile i32, i32* %2
%17 = load volatile i64, i64* %3
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = alloca i8
%2 = alloca i32
%3 = alloca i64
store volatile i8 -121, i8* %1
%4 = bitcast i32* %2 to i8*
store volatile i32 22136, i32* %2
%5 = bitcast i64* %3 to i8*
store volatile i64 305397760, i64* %3
%6 = load volatile i32, i32* %2
%7 = load volatile i8, i8* %1
%8 = trunc i32 %6 to i8
%9 = add i8 %7, %8
store volatile i8 %9, i8* %1
%10 = load volatile i32, i32* %2
%11 = sext i32 %10 to i64
%12 = load volatile i64, i64* %3
%13 = add nsw i64 %12, %11
store volatile i64 %13, i64* %3
%14 = load volatile i32, i32* %2
%15 = add nsw i32 %14, 21571
store volatile i32 %15, i32* %2
%16 = load volatile i8, i8* %1
%17 = load volatile i32, i32* %2
%18 = load volatile i64, i64* %3
ret void
}
struct s3c24x0_i2s *s3c24x0_get_base_i2s(void) {
  return (struct s3c24x0_i2s *)0x55000000;
}


x86 assembly (clang, -O0):
<s3c24x0_get_base_i2s>:
push   %rbp
mov    %rsp,%rbp
mov    $0x55000000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<s3c24x0_get_base_i2s>:
mov    $0x55000000,%eax
ret

LLVM IR (-O0):
%struct.s3c24x0_i2s = type opaque
define %struct.s3c24x0_i2s* @s3c24x0_get_base_i2s() {
ret %struct.s3c24x0_i2s* inttoptr (i64 1426063360 to %struct.s3c24x0_i2s*)
}

LLVM IR (-O2):
%struct.s3c24x0_i2s = type opaque
define %struct.s3c24x0_i2s* @s3c24x0_get_base_i2s() {
ret %struct.s3c24x0_i2s* inttoptr (i64 1426063360 to %struct.s3c24x0_i2s*)
}
/* Type definitions */
struct sockaddr_in {
  int sin_port;
};
struct sockaddr {
  int sa_family;
};
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
#define AF_INET 128
void sock_set_port(struct sockaddr *sa, socklen_t salen, int port) {
  switch (sa->sa_family) {
  case AF_INET: {
    struct sockaddr_in *sin = (struct sockaddr_in *)sa;
    sin->sin_port = port;
    return;
  }
    return;
  }
}


x86 assembly (clang, -O0):
<sock_set_port>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
sub    $0x80,%eax
jne    1135 <sock_set_port+0x35>
jmp    1124 <sock_set_port+0x24>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sock_set_port>:
cmpl   $0x80,(%rdi)
jne    110a <sock_set_port+0xa>
mov    %edx,(%rdi)
ret

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
%struct.sockaddr_in = type { i32 }
define void @sock_set_port(%struct.sockaddr* %0, i32 %1, i32 %2) {
%4 = alloca %struct.sockaddr*
%5 = alloca i32
%6 = alloca i32
%7 = alloca %struct.sockaddr_in*
store %struct.sockaddr* %0, %struct.sockaddr** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load %struct.sockaddr*, %struct.sockaddr** %4
%9 = getelementptr inbounds %struct.sockaddr, %struct.sockaddr* %8, i32 0, i32 0
%10 = load i32, i32* %9
switch i32 %10, label %17 [
i32 128, label %11
]
11: ; preds = %3
%12 = load %struct.sockaddr*, %struct.sockaddr** %4
%13 = bitcast %struct.sockaddr* %12 to %struct.sockaddr_in*
store %struct.sockaddr_in* %13, %struct.sockaddr_in** %7
%14 = load i32, i32* %6
%15 = load %struct.sockaddr_in*, %struct.sockaddr_in** %7
%16 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %15, i32 0, i32 0
store i32 %14, i32* %16
br label %17
17: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
define void @sock_set_port(%struct.sockaddr* nocapture %0, i32 %1, i32 %2) {
%4 = getelementptr inbounds %struct.sockaddr, %struct.sockaddr* %0, i64 0, i32 0
%5 = load i32, i32* %4
%6 = icmp eq i32 %5, 128
br i1 %6, label %7, label %8
7: ; preds = %3
store i32 %2, i32* %4
br label %8
8: ; preds = %3, %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ y();
int main(void) {
  y();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <y@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <y@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @y()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @y()
ret i32 0
}
int main(int argc, char *argv[argc]) { return 0; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = zext i32 %6 to i64
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
bool nrf53_errata_103(void) { return false; }


x86 assembly (clang, -O0):
<nrf53_errata_103>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf53_errata_103>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf53_errata_103() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf53_errata_103() {
ret i32 0
}
/* Variables and functions */
scalar_t__ add(char *);
bool add_test_empty() {
  if (add("") == 0)
    return true;
  return false;
}


x86 assembly (clang, -O0):
<add_test_empty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <add@plt>
cmp    $0x0,%rax
jne    113a <add_test_empty+0x2a>
movl   $0x1,-0x4(%rbp)
jmp    1141 <add_test_empty+0x31>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_test_empty>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <add@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i32 @add_test_empty() {
%1 = alloca i32
%2 = call i64 @add(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
store i32 1, i32* %1
br label %6
5: ; preds = %0
store i32 0, i32* %1
br label %6
6: ; preds = %5, %4
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i32 @add_test_empty() {
%1 = tail call i64 @add(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
double et_pot_day(double rnetd, double tempk, double roh_w) {
  double latent, result;
  latent = (2.501 - (0.002361 * (tempk - 273.15))) * 1000000.0;
  result = (rnetd * 86400 * 1000.0) / (latent * roh_w);
  return result;
}


x86 assembly (clang, -O0):
<et_pot_day>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xf08(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  0xeec(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xee8(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  0xecc(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  0xeb3(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xe9e(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  -0x20(%rbp),%xmm1
mulsd  -0x18(%rbp),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<et_pot_day>:
addsd  0xef8(%rip),%xmm1
mulsd  0xef8(%rip),%xmm1
addsd  0xef8(%rip),%xmm1
unpcklpd %xmm1,%xmm0
mulpd  0xefc(%rip),%xmm0
movapd 0xf04(%rip),%xmm1
unpcklpd %xmm2,%xmm1
mulpd  %xmm1,%xmm0
movapd %xmm0,%xmm1
unpckhpd %xmm0,%xmm1
divsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @et_pot_day(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%9 = load double, double* %5
%10 = fsub double %9, 2.731500e+02
%11 = call double @llvm.fmuladd.f64(double -2.361000e-03, double %10, double 2.501000e+00)
%12 = fmul double %11, 1.000000e+06
store double %12, double* %7
%13 = load double, double* %4
%14 = fmul double %13, 8.640000e+04
%15 = fmul double %14, 1.000000e+03
%16 = load double, double* %7
%17 = load double, double* %6
%18 = fmul double %16, %17
%19 = fdiv double %15, %18
store double %19, double* %8
%20 = load double, double* %8
ret double %20
}

LLVM IR (-O2):
define double @et_pot_day(double %0, double %1, double %2) {
%4 = fadd double %1, -2.731500e+02
%5 = tail call double @llvm.fmuladd.f64(double %4, double -2.361000e-03, double 2.501000e+00)
%6 = insertelement <2 x double> poison, double %0, i64 0
%7 = insertelement <2 x double> %6, double %5, i64 1
%8 = fmul <2 x double> %7, <double 8.640000e+04, double 1.000000e+06>
%9 = insertelement <2 x double> <double 1.000000e+03, double poison>, double %2, i64 1
%10 = fmul <2 x double> %8, %9
%11 = extractelement <2 x double> %10, i64 0
%12 = extractelement <2 x double> %10, i64 1
%13 = fdiv double %11, %12
ret double %13
}
/* Variables and functions */
int /*<<< orphan*/ HplMsp430GeneralIOP__36__IO__set();
void Msp430GpioC__7__HplGeneralIO__set(void) {
  HplMsp430GeneralIOP__36__IO__set();
}


x86 assembly (clang, -O0):
<Msp430GpioC__7__HplGeneralIO__set>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMsp430GeneralIOP__36__IO__set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430GpioC__7__HplGeneralIO__set>:
xor    %eax,%eax
jmp    1030 <HplMsp430GeneralIOP__36__IO__set@plt>

LLVM IR (-O0):
define void @Msp430GpioC__7__HplGeneralIO__set() {
%1 = call i32 (...) @HplMsp430GeneralIOP__36__IO__set()
ret void
}

LLVM IR (-O2):
define void @Msp430GpioC__7__HplGeneralIO__set() {
%1 = tail call i32 (...) @HplMsp430GeneralIOP__36__IO__set()
ret void
}
/* Variables and functions */
int testfunc_compat1(void) { return 1; }


x86 assembly (clang, -O0):
<testfunc_compat1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<testfunc_compat1>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @testfunc_compat1() {
ret i32 1
}

LLVM IR (-O2):
define i32 @testfunc_compat1() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int /*<<< orphan*/ pthread_self();
void *threadFunc(void *RawArg) {
  printf("Thread %ld running\n", pthread_self());
  return 0;
}


x86 assembly (clang, -O0):
<threadFunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <pthread_self@plt>
mov    %eax,%esi
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<threadFunc>:
push   %rax
xor    %eax,%eax
call   1040 <pthread_self@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"Thread %ld running\0A\00"
define i8* @threadFunc(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @pthread_self()
%4 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i8* null
}

LLVM IR (-O2):
@.str = [20 x i8] c"Thread %ld running\0A\00"
define noalias i8* @threadFunc(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @pthread_self()
%3 = tail call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void ctor() { printf("Create!\n"); }


x86 assembly (clang, -O0):
<ctor>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctor>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"Create!\0A\00"
define void @ctor() {
%1 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [8 x i8] c"Create!\00"
define void @ctor() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int yas_bma250_read_reg_byte(int);
int yas_bma250_write_reg_byte(int, int);
int yas_bma250_set_selftest_st(unsigned char selftest) {
  int ret = (0);
  int reg_data = 0;
  reg_data = yas_bma250_read_reg_byte(0x32);
  reg_data = ((reg_data & ~0x03) | ((selftest << 0) & 0x03));
  ret = yas_bma250_write_reg_byte(0x32, reg_data);
  return ret;
}


x86 assembly (clang, -O0):
<yas_bma250_set_selftest_st>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    $0x32,%edi
call   1040 <yas_bma250_read_reg_byte@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xfffffffc,%eax
movzbl -0x1(%rbp),%ecx
shl    $0x0,%ecx
and    $0x3,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
mov    $0x32,%edi
call   1030 <yas_bma250_write_reg_byte@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yas_bma250_set_selftest_st>:
push   %rbx
mov    %edi,%ebx
mov    $0x32,%edi
call   1040 <yas_bma250_read_reg_byte@plt>
and    $0xfffffffc,%eax
and    $0x3,%ebx
or     %eax,%ebx
mov    $0x32,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <yas_bma250_write_reg_byte@plt>

LLVM IR (-O0):
define i32 @yas_bma250_set_selftest_st(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i32
%4 = alloca i32
store i8 %0, i8* %2
store i32 0, i32* %3
store i32 0, i32* %4
%5 = call i32 @yas_bma250_read_reg_byte(i32 50)
store i32 %5, i32* %4
%6 = load i32, i32* %4
%7 = and i32 %6, -4
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = shl i32 %9, 0
%11 = and i32 %10, 3
%12 = or i32 %7, %11
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = call i32 @yas_bma250_write_reg_byte(i32 50, i32 %13)
store i32 %14, i32* %3
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @yas_bma250_set_selftest_st(i8 zeroext %0) {
%2 = tail call i32 @yas_bma250_read_reg_byte(i32 50)
%3 = and i32 %2, -4
%4 = and i8 %0, 3
%5 = zext i8 %4 to i32
%6 = or i32 %3, %5
%7 = tail call i32 @yas_bma250_write_reg_byte(i32 50, i32 %6)
ret i32 %7
}
unsigned int CgosLibGetVersion(void) {
  return (((((unsigned int)1) << 8) + 3) << 16) | 21;
}


x86 assembly (clang, -O0):
<CgosLibGetVersion>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1030015,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CgosLibGetVersion>:
mov    $0x1030015,%eax
ret

LLVM IR (-O0):
define i32 @CgosLibGetVersion() {
ret i32 16973845
}

LLVM IR (-O2):
define i32 @CgosLibGetVersion() {
ret i32 16973845
}
int main() {
  ;
  ;
  ;
  ;
  ;
  ;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
double fmod(float, int);
float deg2rad(float t) {
  return fmod(t, 360) * (3.14159265358979323846) / 180.0;
}


x86 assembly (clang, -O0):
<deg2rad>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mov    $0x168,%edi
call   1030 <fmod@plt>
movsd  0xed4(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xec0(%rip),%xmm1
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<deg2rad>:
push   %rax
mov    $0x168,%edi
call   1030 <fmod@plt>
mulsd  0xedd(%rip),%xmm0
divsd  0xedd(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @deg2rad(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call double @fmod(float %3, i32 360)
%5 = fmul double %4, 0x400921FB54442D18
%6 = fdiv double %5, 1.800000e+02
%7 = fptrunc double %6 to float
ret float %7
}

LLVM IR (-O2):
define float @deg2rad(float %0) {
%2 = tail call double @fmod(float %0, i32 360)
%3 = fmul double %2, 0x400921FB54442D18
%4 = fdiv double %3, 1.800000e+02
%5 = fptrunc double %4 to float
ret float %5
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
uint32_t I2CSlaveDataGet(uint32_t ui32Base) {
  ;
  return ((*((volatile unsigned long *)(ui32Base + 0x00000808))));
}


x86 assembly (clang, -O0):
<I2CSlaveDataGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x808(%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CSlaveDataGet>:
mov    %rdi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
mov    0x808(%rax),%rax
ret

LLVM IR (-O0):
define i64 @I2CSlaveDataGet(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = add i64 %3, 2056
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @I2CSlaveDataGet(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = add i64 %3, 2056
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}
char *_testfunc_p_p(void *s) { return (char *)s; }


x86 assembly (clang, -O0):
<_testfunc_p_p>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_testfunc_p_p>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @_testfunc_p_p(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @_testfunc_p_p(i8* readnone returned %0) {
ret i8* %0
}
/* Variables and functions */
unsigned char *fGetBuffer();
unsigned char *CDRgetBuffer(void) { return fGetBuffer(); }


x86 assembly (clang, -O0):
<CDRgetBuffer>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <fGetBuffer@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CDRgetBuffer>:
xor    %eax,%eax
jmp    1030 <fGetBuffer@plt>

LLVM IR (-O0):
define i8* @CDRgetBuffer() {
%1 = call i8* (...) @fGetBuffer()
ret i8* %1
}

LLVM IR (-O2):
define i8* @CDRgetBuffer() {
%1 = tail call i8* (...) @fGetBuffer()
ret i8* %1
}
int test_imm_CCint32_mem(int *val) {
  return ((*val) & (0xCC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CCint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xcc,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CCint32_mem>:
testb  $0xcc,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CCint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 204
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_CCint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 204
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int kill(int pid, int sig) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<kill>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
jmp    110a <kill+0xa>

x86 assembly (clang, -O2):
<kill>:
jmp    1100 <kill>

LLVM IR (-O0):
define i32 @kill(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %5
5: ; preds = %2, %5
br label %5
}

LLVM IR (-O2):
define i32 @kill(i32 %0, i32 %1) {
br label %3
3: ; preds = %2, %3
br label %3
}
/* Variables and functions */
float sinf(float);
float back_ease_in(float p) { return p * p * p - p * sinf(p * 3.1415926536f); }


x86 assembly (clang, -O0):
<back_ease_in>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  0xeb8(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
call   1030 <sinf@plt>
movss  -0x10(%rbp),%xmm1
movss  -0xc(%rbp),%xmm2
movaps %xmm0,%xmm3
movss  -0x8(%rbp),%xmm0
mulss  %xmm3,%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<back_ease_in>:
push   %rax
movaps %xmm0,%xmm1
movss  %xmm0,(%rsp)
mulss  %xmm0,%xmm0
movss  %xmm0,0x4(%rsp)
movss  0xed5(%rip),%xmm0
mulss  %xmm1,%xmm0
call   1030 <sinf@plt>
movss  (%rsp),%xmm2
mulss  %xmm2,%xmm0
movss  0x4(%rsp),%xmm1
mulss  %xmm2,%xmm1
subss  %xmm0,%xmm1
movaps %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @back_ease_in(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fmul float %3, %4
%6 = load float, float* %2
%7 = load float, float* %2
%8 = load float, float* %2
%9 = fmul float %8, 0x400921FB60000000
%10 = call float @sinf(float %9)
%11 = fmul float %7, %10
%12 = fneg float %11
%13 = call float @llvm.fmuladd.f32(float %5, float %6, float %12)
ret float %13
}

LLVM IR (-O2):
define float @back_ease_in(float %0) {
%2 = fmul float %0, %0
%3 = fmul float %0, 0x400921FB60000000
%4 = tail call float @sinf(float %3)
%5 = fneg float %4
%6 = fmul float %5, %0
%7 = tail call float @llvm.fmuladd.f32(float %2, float %0, float %6)
ret float %7
}
unsigned int thash_ptr_hash(const void *key) { return ((unsigned long)key); }


x86 assembly (clang, -O0):
<thash_ptr_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<thash_ptr_hash>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i32 @thash_ptr_hash(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
%5 = trunc i64 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @thash_ptr_hash(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ bar(int *);
void foo(void) {
  int x[8] __attribute__((aligned(128))) = {1};
  bar(x);
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
and    $0xffffffffffffff80,%rsp
sub    $0x80,%rsp
mov    0xeda(%rip),%rax
mov    %rax,(%rsp)
mov    0xed7(%rip),%rax
mov    %rax,0x8(%rsp)
mov    0xed3(%rip),%rax
mov    %rax,0x10(%rsp)
mov    0xecf(%rip),%rax
mov    %rax,0x18(%rsp)
mov    %rsp,%rdi
call   1030 <bar@plt>
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbp
mov    %rsp,%rbp
and    $0xffffffffffffff80,%rsp
sub    $0x80,%rsp
movaps 0xeea(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xece(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
call   1030 <bar@plt>
mov    %rbp,%rsp
pop    %rbp
ret

LLVM IR (-O0):
@__const.foo.x = [8 x i32] [i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0]
define void @foo() {
%1 = alloca [8 x i32]
%2 = bitcast [8 x i32]* %1 to i8*
%3 = getelementptr inbounds [8 x i32], [8 x i32]* %1, i64 0, i64 0
%4 = call i32 @bar(i32* %3)
ret void
}

LLVM IR (-O2):
@__const.foo.x = [8 x i32] [i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0]
define void @foo() {
%1 = alloca [8 x i32]
%2 = bitcast [8 x i32]* %1 to i8*
%3 = getelementptr inbounds [8 x i32], [8 x i32]* %1, i64 0, i64 0
%4 = call i32 @bar(i32* %3)
ret void
}
void disturb(s, l) int s, l;
{}


x86 assembly (clang, -O0):
<disturb>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<disturb>:
ret

LLVM IR (-O0):
define void @disturb(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @disturb(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ update(int);
int upscreen() {
  update(1);
  return (1);
}


x86 assembly (clang, -O0):
<upscreen>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <update@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<upscreen>:
push   %rax
mov    $0x1,%edi
call   1030 <update@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @upscreen() {
%1 = call i32 @update(i32 1)
ret i32 1
}

LLVM IR (-O2):
define i32 @upscreen() {
%1 = tail call i32 @update(i32 1)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ __coverity_tainted_data_sanitize__(int);
int normalize_date(int *year, int *month, int *day) {
  __coverity_tainted_data_sanitize__(*year);
  __coverity_tainted_data_sanitize__(*month);
  __coverity_tainted_data_sanitize__(*day);
  return 0;
}


x86 assembly (clang, -O0):
<normalize_date>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <__coverity_tainted_data_sanitize__@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
call   1030 <__coverity_tainted_data_sanitize__@plt>
mov    -0x18(%rbp),%rax
mov    (%rax),%edi
call   1030 <__coverity_tainted_data_sanitize__@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<normalize_date>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%rbx
mov    (%rdi),%edi
call   1030 <__coverity_tainted_data_sanitize__@plt>
mov    (%rbx),%edi
call   1030 <__coverity_tainted_data_sanitize__@plt>
mov    (%r14),%edi
call   1030 <__coverity_tainted_data_sanitize__@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @normalize_date(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = call i32 @__coverity_tainted_data_sanitize__(i32 %8)
%10 = load i32*, i32** %5
%11 = load i32, i32* %10
%12 = call i32 @__coverity_tainted_data_sanitize__(i32 %11)
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = call i32 @__coverity_tainted_data_sanitize__(i32 %14)
ret i32 0
}

LLVM IR (-O2):
define i32 @normalize_date(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2) {
%4 = load i32, i32* %0
%5 = tail call i32 @__coverity_tainted_data_sanitize__(i32 %4)
%6 = load i32, i32* %1
%7 = tail call i32 @__coverity_tainted_data_sanitize__(i32 %6)
%8 = load i32, i32* %2
%9 = tail call i32 @__coverity_tainted_data_sanitize__(i32 %8)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ glNormal3sv(short *);
void Normal3sv(short v[3]) { glNormal3sv(v); }


x86 assembly (clang, -O0):
<Normal3sv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <glNormal3sv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Normal3sv>:
jmp    1030 <glNormal3sv@plt>

LLVM IR (-O0):
define void @Normal3sv(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = call i32 @glNormal3sv(i16* %3)
ret void
}

LLVM IR (-O2):
define void @Normal3sv(i16* %0) {
%2 = tail call i32 @glNormal3sv(i16* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char);
int ft_strlen(char const *);
int /*<<< orphan*/ write(int, char const *, int);
void ft_putendl(char const *s) {
  int l;
  l = ft_strlen(s);
  write(1, s, l);
  ft_putchar('\n');
  return;
}


x86 assembly (clang, -O0):
<ft_putendl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <ft_strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    $0x1,%edi
call   1030 <write@plt>
mov    $0xa,%edi
call   1050 <ft_putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putendl>:
push   %rbx
mov    %rdi,%rbx
call   1040 <ft_strlen@plt>
mov    $0x1,%edi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <write@plt>
mov    $0xa,%edi
pop    %rbx
jmp    1050 <ft_putchar@plt>

LLVM IR (-O0):
define void @ft_putendl(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @ft_strlen(i8* %4)
store i32 %5, i32* %3
%6 = load i8*, i8** %2
%7 = load i32, i32* %3
%8 = call i32 @write(i32 1, i8* %6, i32 %7)
%9 = call i32 @ft_putchar(i8 signext 10)
ret void
}

LLVM IR (-O2):
define void @ft_putendl(i8* %0) {
%2 = tail call i32 @ft_strlen(i8* %0)
%3 = tail call i32 @write(i32 1, i8* %0, i32 %2)
%4 = tail call i32 @ft_putchar(i8 signext 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprint_hex(int, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void print_hex(int hex) { fprint_hex(hex, stdout); }


x86 assembly (clang, -O0):
<print_hex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
call   1030 <fprint_hex@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_hex>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <fprint_hex@plt>

LLVM IR (-O0):
@stdout = global i32 0
define void @print_hex(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @stdout
%5 = call i32 @fprint_hex(i32 %3, i32 %4)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @print_hex(i32 %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @fprint_hex(i32 %0, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("(1, 2, 3)"
         "\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"(1, 2, 3)\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [10 x i8] c"(1, 2, 3)\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ ispunct(int);
void t_ispunct_0xe0() {
  Assert_real((ispunct(224) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_ispunct.c",
              1125, ("ispunct should be 0 for 0xe0"));
}


x86 assembly (clang, -O0):
<t_ispunct_0xe0>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe0,%edi
call   1030 <ispunct@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x465,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_ispunct_0xe0>:
push   %rax
mov    $0xe0,%edi
call   1030 <ispunct@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x465,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0xe0\00"
define void @t_ispunct_0xe0() {
%1 = call i64 @ispunct(i32 224)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1125, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0xe0\00"
define void @t_ispunct_0xe0() {
%1 = tail call i64 @ispunct(i32 224)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1125, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void AONRTCCombinedEventConfig(uint32_t ui32Channels) {
  uint32_t ui32Cfg;

  ;
  ui32Cfg = (*((volatile unsigned long *)(0x40092000 + 0x00000000)));
  ui32Cfg &= ~(0x00070000);
  ui32Cfg |= (ui32Channels << 16);
  (*((volatile unsigned long *)(0x40092000 + 0x00000000))) = ui32Cfg;
}


x86 assembly (clang, -O0):
<AONRTCCombinedEventConfig>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x40092000,%eax
mov    (%rax),%rax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff8ffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x10,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
movslq -0x8(%rbp),%rcx
mov    $0x40092000,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<AONRTCCombinedEventConfig>:
mov    0x40092000,%rax
40
and    $0xfff8ffff,%eax
shl    $0x10,%edi
or     %eax,%edi
movslq %edi,%rax
mov    %rax,0x40092000
40
ret

LLVM IR (-O0):
define void @AONRTCCombinedEventConfig(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load volatile i64, i64* inttoptr (i64 1074339840 to i64*)
%5 = trunc i64 %4 to i32
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = and i32 %6, -458753
store i32 %7, i32* %3
%8 = load i32, i32* %2
%9 = shl i32 %8, 16
%10 = load i32, i32* %3
%11 = or i32 %10, %9
store i32 %11, i32* %3
%12 = load i32, i32* %3
%13 = sext i32 %12 to i64
store volatile i64 %13, i64* inttoptr (i64 1074339840 to i64*)
ret void
}

LLVM IR (-O2):
define void @AONRTCCombinedEventConfig(i32 %0) {
%2 = load volatile i64, i64* inttoptr (i64 1074339840 to i64*)
%3 = trunc i64 %2 to i32
%4 = and i32 %3, -458753
%5 = shl i32 %0, 16
%6 = or i32 %4, %5
%7 = sext i32 %6 to i64
store volatile i64 %7, i64* inttoptr (i64 1074339840 to i64*)
ret void
}
/* Variables and functions */
int get_cpu_count();
int get_available_cpu_count(void) { return get_cpu_count() - 1; }


x86 assembly (clang, -O0):
<get_available_cpu_count>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <get_cpu_count@plt>
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_available_cpu_count>:
push   %rax
xor    %eax,%eax
call   1030 <get_cpu_count@plt>
add    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @get_available_cpu_count() {
%1 = call i32 (...) @get_cpu_count()
%2 = sub nsw i32 %1, 1
ret i32 %2
}

LLVM IR (-O2):
define i32 @get_available_cpu_count() {
%1 = tail call i32 (...) @get_cpu_count()
%2 = add nsw i32 %1, -1
ret i32 %2
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
int abs(int);
uint16_t convertNativeToAgc(int n) {
  uint16_t i;
  int tmp = n;
  i = (uint16_t)(abs(n) & 077777);
  if (n < 0)
    i |= 040000;
  return (i);
}


x86 assembly (clang, -O0):
<convertNativeToAgc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <abs@plt>
and    $0x7fff,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1146 <convertNativeToAgc+0x36>
mov    -0x8(%rbp),%eax
or     $0x4000,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<convertNativeToAgc>:
mov    %edi,%ecx
neg    %ecx
cmovs  %edi,%ecx
and    $0x7fff,%ecx
mov    %ecx,%eax
or     $0x4000,%eax
test   %edi,%edi
cmovns %ecx,%eax
ret

LLVM IR (-O0):
define i32 @convertNativeToAgc(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
store i32 %5, i32* %4
%6 = load i32, i32* %2
%7 = call i32 @abs(i32 %6)
%8 = and i32 %7, 32767
store i32 %8, i32* %3
%9 = load i32, i32* %2
%10 = icmp slt i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %1
%12 = load i32, i32* %3
%13 = or i32 %12, 16384
store i32 %13, i32* %3
br label %14
14: ; preds = %11, %1
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @convertNativeToAgc(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
%3 = and i32 %2, 32767
%4 = icmp slt i32 %0, 0
%5 = or i32 %3, 16384
%6 = select i1 %4, i32 %5, i32 %3
ret i32 %6
}
/* Variables and functions */
unsigned long update_crc(long, unsigned char *, int);
unsigned long nbase_crc32(unsigned char *buf, int len) {
  return update_crc(0L, buf, len);
}


x86 assembly (clang, -O0):
<nbase_crc32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
xor    %eax,%eax
mov    %eax,%edi
call   1030 <update_crc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nbase_crc32>:
mov    %esi,%edx
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <update_crc@plt>

LLVM IR (-O0):
define i64 @nbase_crc32(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i64 @update_crc(i64 0, i8* %5, i32 %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @nbase_crc32(i8* %0, i32 %1) {
%3 = tail call i64 @update_crc(i64 0, i8* %0, i32 %1)
ret i64 %3
}
int fun395() { return 395; }


x86 assembly (clang, -O0):
<fun395>:
push   %rbp
mov    %rsp,%rbp
mov    $0x18b,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun395>:
mov    $0x18b,%eax
ret

LLVM IR (-O0):
define i32 @fun395() {
ret i32 395
}

LLVM IR (-O2):
define i32 @fun395() {
ret i32 395
}
void testClosureSDrV(void (*closure)(short, double), short a1, double a2) {
  (*closure)(a1, a2);
}


x86 assembly (clang, -O0):
<testClosureSDrV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
movsd  %xmm0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xa(%rbp),%cx
movsd  -0x18(%rbp),%xmm0
movswl %cx,%edi
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testClosureSDrV>:
mov    %rdi,%rax
mov    %esi,%edi
jmp    *%rax

LLVM IR (-O0):
define void @testClosureSDrV(void (i16, double)* %0, i16 signext %1, double %2) {
%4 = alloca void (i16, double)*
%5 = alloca i16
%6 = alloca double
store void (i16, double)* %0, void (i16, double)** %4
store i16 %1, i16* %5
store double %2, double* %6
%7 = load void (i16, double)*, void (i16, double)** %4
%8 = load i16, i16* %5
%9 = load double, double* %6
ret void
}

LLVM IR (-O2):
define void @testClosureSDrV(void (i16, double)* nocapture %0, i16 signext %1, double %2) {
tail call void %0(i16 signext %1, double %2)
ret void
}
void WeaponM3_ReloadNULL(void) {}


x86 assembly (clang, -O0):
<WeaponM3_ReloadNULL>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WeaponM3_ReloadNULL>:
ret

LLVM IR (-O0):
define void @WeaponM3_ReloadNULL() {
ret void
}

LLVM IR (-O2):
define void @WeaponM3_ReloadNULL() {
ret void
}
/* Variables and functions */
char *smbftpd_charset_client2fs(const char *inbuf) { return NULL; }


x86 assembly (clang, -O0):
<smbftpd_charset_client2fs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<smbftpd_charset_client2fs>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @smbftpd_charset_client2fs(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @smbftpd_charset_client2fs(i8* nocapture readnone %0) {
ret i8* null
}
/* Variables and functions */
scalar_t__ isalpha(int);
int lex_isident(int ch) { return isalpha(ch) || (unsigned char)ch >= 0xC0; }


x86 assembly (clang, -O0):
<lex_isident>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <isalpha@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1146 <lex_isident+0x36>
mov    -0x4(%rbp),%eax
movzbl %al,%eax
cmp    $0xc0,%eax
setge  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lex_isident>:
push   %rbx
mov    %edi,%ebx
call   1030 <isalpha@plt>
test   %rax,%rax
setne  %al
not    %ebx
test   $0xc0,%bl
sete   %cl
or     %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @lex_isident(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @isalpha(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %11, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = trunc i32 %7 to i8
%9 = zext i8 %8 to i32
%10 = icmp sge i32 %9, 192
br label %11
11: ; preds = %6, %1
%12 = phi i1 [ true, %1 ], [ %10, %6 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @lex_isident(i32 %0) {
%2 = tail call i64 @isalpha(i32 %0)
%3 = icmp ne i64 %2, 0
%4 = and i32 %0, 192
%5 = icmp eq i32 %4, 192
%6 = or i1 %5, %3
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ example1();
int main(void) { example1(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <example1@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <example1@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @example1()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @example1()
ret i32 0
}
unsigned char bcd2dec(unsigned char value) {
  return ((value >> 4) & 0x0f) * 10 + (value & 0x0f);
}


x86 assembly (clang, -O0):
<bcd2dec>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
sar    $0x4,%eax
and    $0xf,%eax
imul   $0xa,%eax,%eax
movzbl -0x1(%rbp),%ecx
and    $0xf,%ecx
add    %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcd2dec>:
mov    %edi,%eax
shr    $0x4,%al
movzbl %al,%eax
add    %eax,%eax
lea    (%rax,%rax,4),%eax
and    $0xf,%dil
add    %dil,%al
ret

LLVM IR (-O0):
define zeroext i8 @bcd2dec(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = ashr i32 %4, 4
%6 = and i32 %5, 15
%7 = mul nsw i32 %6, 10
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = and i32 %9, 15
%11 = add nsw i32 %7, %10
%12 = trunc i32 %11 to i8
ret i8 %12
}

LLVM IR (-O2):
define zeroext i8 @bcd2dec(i8 zeroext %0) {
%2 = lshr i8 %0, 4
%3 = mul nuw i8 %2, 10
%4 = and i8 %0, 15
%5 = add nuw i8 %3, %4
ret i8 %5
}
/* Variables and functions */
int /*<<< orphan*/ cpc_key_press(int);
int /*<<< orphan*/ cpc_key_unpress(int);
void Joy_Omega_Fire3(int value) {
  if (value) {
    cpc_key_press(0x56);
  } else {
    cpc_key_unpress(0x56);
  };
}


x86 assembly (clang, -O0):
<Joy_Omega_Fire3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1144 <Joy_Omega_Fire3+0x24>
mov    $0x56,%edi
call   1030 <cpc_key_press@plt>
jmp    114e <Joy_Omega_Fire3+0x2e>
mov    $0x56,%edi
call   1040 <cpc_key_unpress@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Joy_Omega_Fire3>:
test   %edi,%edi
je     112e <Joy_Omega_Fire3+0xe>
mov    $0x56,%edi
jmp    1030 <cpc_key_press@plt>
mov    $0x56,%edi
jmp    1040 <cpc_key_unpress@plt>

LLVM IR (-O0):
define void @Joy_Omega_Fire3(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @cpc_key_press(i32 86)
br label %9
7: ; preds = %1
%8 = call i32 @cpc_key_unpress(i32 86)
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @Joy_Omega_Fire3(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @cpc_key_press(i32 86)
br label %7
5: ; preds = %1
%6 = tail call i32 @cpc_key_unpress(i32 86)
br label %7
7: ; preds = %5, %3
ret void
}