int read_pin_value(int pin) {
  int pin_value = 0;
  while (*((volatile unsigned char *)(0x29)) & (1 << pin))
    ;
  while (!(*((volatile unsigned char *)(0x29)) & (1 << pin)))
    ;
  while (*((volatile unsigned char *)(0x29)) & (1 << pin)) {
    ++pin_value;
  }
  return pin_value;
}


x86 assembly (clang, -O0):
<read_pin_value>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    $0x29,%eax
mov    (%rax),%al
movzbl %al,%eax
mov    -0x4(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     1134 <read_pin_value+0x34>
jmp    110e <read_pin_value+0xe>
jmp    1139 <read_pin_value+0x39>
mov    $0x29,%eax
mov    (%rax),%al
movzbl %al,%eax
mov    -0x4(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1166 <read_pin_value+0x66>
jmp    116b <read_pin_value+0x6b>
jmp    1139 <read_pin_value+0x39>
jmp    1170 <read_pin_value+0x70>
mov    $0x29,%eax
mov    (%rax),%al
movzbl %al,%eax
mov    -0x4(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     119f <read_pin_value+0x9f>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1170 <read_pin_value+0x70>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_pin_value>:
mov    %edi,%ecx
mov    $0x1,%edx
shl    %cl,%edx
nopl   0x0(%rax)
movzbl 0x29,%eax
test   %eax,%edx
jne    1110 <read_pin_value+0x10>
nopl   0x0(%rax)
movzbl 0x29,%eax
test   %eax,%edx
je     1120 <read_pin_value+0x20>
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movzbl 0x29,%ecx
add    $0x1,%eax
test   %ecx,%edx
jne    1140 <read_pin_value+0x40>
ret

LLVM IR (-O0):
define i32 @read_pin_value(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load volatile i8, i8* inttoptr (i64 41 to i8*)
%6 = zext i8 %5 to i32
%7 = load i32, i32* %2
%8 = shl i32 1, %7
%9 = and i32 %6, %8
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %4
br label %4
12: ; preds = %4
br label %13
13: ; preds = %21, %12
%14 = load volatile i8, i8* inttoptr (i64 41 to i8*)
%15 = zext i8 %14 to i32
%16 = load i32, i32* %2
%17 = shl i32 1, %16
%18 = and i32 %15, %17
%19 = icmp ne i32 %18, 0
%20 = xor i1 %19, true
br i1 %20, label %21, label %22
21: ; preds = %13
br label %13
22: ; preds = %13
br label %23
23: ; preds = %30, %22
%24 = load volatile i8, i8* inttoptr (i64 41 to i8*)
%25 = zext i8 %24 to i32
%26 = load i32, i32* %2
%27 = shl i32 1, %26
%28 = and i32 %25, %27
%29 = icmp ne i32 %28, 0
br i1 %29, label %30, label %33
30: ; preds = %23
%31 = load i32, i32* %3
%32 = add nsw i32 %31, 1
store i32 %32, i32* %3
br label %23
33: ; preds = %23
%34 = load i32, i32* %3
ret i32 %34
}

LLVM IR (-O2):
define i32 @read_pin_value(i32 %0) {
%2 = shl nuw i32 1, %0
br label %3
3: ; preds = %3, %1
%4 = load volatile i8, i8* inttoptr (i64 41 to i8*)
%5 = zext i8 %4 to i32
%6 = and i32 %2, %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %3
8: ; preds = %3, %8
%9 = load volatile i8, i8* inttoptr (i64 41 to i8*)
%10 = zext i8 %9 to i32
%11 = and i32 %2, %10
%12 = icmp eq i32 %11, 0
br i1 %12, label %8, label %13
13: ; preds = %8, %13
%14 = phi i32 [ %19, %13 ], [ 0, %8 ]
%15 = load volatile i8, i8* inttoptr (i64 41 to i8*)
%16 = zext i8 %15 to i32
%17 = and i32 %2, %16
%18 = icmp eq i32 %17, 0
%19 = add nuw nsw i32 %14, 1
br i1 %18, label %20, label %13
20: ; preds = %13
ret i32 %14
}