unsigned int translate_area(unsigned int opt_area) {
  unsigned int input_area;
  input_area = (opt_area & 0x00f000) >> 5;
  input_area |= (opt_area & 0x0f0000) >> 3;
  input_area |= (opt_area & 0x000f00) >> 7;
  input_area |= (opt_area & 0xf00000) >> 1;
  input_area |= (opt_area & 0x000001) << 5;
  input_area |= (opt_area & 0x000002) << 5;
  input_area |= (opt_area & 0x000004) << 15;
  input_area |= (opt_area & 0x000008) >> 3;
  input_area |= (opt_area & 0x000010) << 7;
  input_area |= (opt_area & 0x000020) << 7;
  input_area |= (opt_area & 0x000040) << 17;
  input_area |= (opt_area & 0x000080) << 11;
  return (input_area);
}


x86 assembly (clang, -O0):
<translate_area>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf000,%eax
shr    $0x5,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf0000,%eax
shr    $0x3,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf00,%eax
shr    $0x7,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf00000,%eax
shr    $0x1,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
shl    $0x5,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x2,%eax
shl    $0x5,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x4,%eax
shl    $0xf,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x8,%eax
shr    $0x3,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x10,%eax
shl    $0x7,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x20,%eax
shl    $0x7,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x40,%eax
shl    $0x11,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x80,%eax
shl    $0xb,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<translate_area>:
mov    %edi,%ecx
shr    $0x5,%ecx
and    $0x780,%ecx
mov    %edi,%eax
shr    $0x3,%eax
mov    %eax,%edx
and    $0x1e000,%edx
or     %ecx,%edx
mov    %edi,%ecx
shr    $0x7,%ecx
and    $0x1e,%ecx
or     %edx,%ecx
mov    %edi,%edx
shr    %edx
and    $0x780000,%edx
or     %ecx,%edx
mov    %edi,%esi
shl    $0x5,%esi
mov    %esi,%ecx
and    $0x20,%ecx
or     %edx,%ecx
and    $0x40,%esi
or     %ecx,%esi
mov    %edi,%ecx
and    $0x4,%ecx
shl    $0xf,%ecx
or     %esi,%ecx
and    $0x1,%eax
mov    %edi,%edx
shl    $0x7,%edx
mov    %edx,%esi
and    $0x800,%esi
or     %eax,%esi
and    $0x1000,%edx
or     %esi,%edx
mov    %edi,%eax
and    $0x40,%eax
shl    $0x11,%eax
or     %edx,%eax
shl    $0xb,%edi
and    $0x40000,%edi
or     %edi,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @translate_area(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = and i32 %4, 61440
%6 = lshr i32 %5, 5
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = and i32 %7, 983040
%9 = lshr i32 %8, 3
%10 = load i32, i32* %3
%11 = or i32 %10, %9
store i32 %11, i32* %3
%12 = load i32, i32* %2
%13 = and i32 %12, 3840
%14 = lshr i32 %13, 7
%15 = load i32, i32* %3
%16 = or i32 %15, %14
store i32 %16, i32* %3
%17 = load i32, i32* %2
%18 = and i32 %17, 15728640
%19 = lshr i32 %18, 1
%20 = load i32, i32* %3
%21 = or i32 %20, %19
store i32 %21, i32* %3
%22 = load i32, i32* %2
%23 = and i32 %22, 1
%24 = shl i32 %23, 5
%25 = load i32, i32* %3
%26 = or i32 %25, %24
store i32 %26, i32* %3
%27 = load i32, i32* %2
%28 = and i32 %27, 2
%29 = shl i32 %28, 5
%30 = load i32, i32* %3
%31 = or i32 %30, %29
store i32 %31, i32* %3
%32 = load i32, i32* %2
%33 = and i32 %32, 4
%34 = shl i32 %33, 15
%35 = load i32, i32* %3
%36 = or i32 %35, %34
store i32 %36, i32* %3
%37 = load i32, i32* %2
%38 = and i32 %37, 8
%39 = lshr i32 %38, 3
%40 = load i32, i32* %3
%41 = or i32 %40, %39
store i32 %41, i32* %3
%42 = load i32, i32* %2
%43 = and i32 %42, 16
%44 = shl i32 %43, 7
%45 = load i32, i32* %3
%46 = or i32 %45, %44
store i32 %46, i32* %3
%47 = load i32, i32* %2
%48 = and i32 %47, 32
%49 = shl i32 %48, 7
%50 = load i32, i32* %3
%51 = or i32 %50, %49
store i32 %51, i32* %3
%52 = load i32, i32* %2
%53 = and i32 %52, 64
%54 = shl i32 %53, 17
%55 = load i32, i32* %3
%56 = or i32 %55, %54
store i32 %56, i32* %3
%57 = load i32, i32* %2
%58 = and i32 %57, 128
%59 = shl i32 %58, 11
%60 = load i32, i32* %3
%61 = or i32 %60, %59
store i32 %61, i32* %3
%62 = load i32, i32* %3
ret i32 %62
}

LLVM IR (-O2):
define i32 @translate_area(i32 %0) {
%2 = lshr i32 %0, 5
%3 = and i32 %2, 1920
%4 = lshr i32 %0, 3
%5 = and i32 %4, 122880
%6 = or i32 %3, %5
%7 = lshr i32 %0, 7
%8 = and i32 %7, 30
%9 = or i32 %6, %8
%10 = lshr i32 %0, 1
%11 = and i32 %10, 7864320
%12 = or i32 %9, %11
%13 = shl i32 %0, 5
%14 = and i32 %13, 32
%15 = or i32 %12, %14
%16 = and i32 %13, 64
%17 = or i32 %15, %16
%18 = shl i32 %0, 15
%19 = and i32 %18, 131072
%20 = or i32 %17, %19
%21 = and i32 %4, 1
%22 = or i32 %20, %21
%23 = shl i32 %0, 7
%24 = and i32 %23, 2048
%25 = or i32 %22, %24
%26 = and i32 %23, 4096
%27 = or i32 %25, %26
%28 = shl i32 %0, 17
%29 = and i32 %28, 8388608
%30 = or i32 %27, %29
%31 = shl i32 %0, 11
%32 = and i32 %31, 262144
%33 = or i32 %30, %32
ret i32 %33
}