#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned int UARTRegConfigModeEnable(unsigned int, int);
void UARTIntEnable(unsigned int baseAdd, unsigned int intFlag) {
  unsigned int enhanFnBitVal = 0;
  unsigned int lcrRegValue = 0;
  lcrRegValue = UARTRegConfigModeEnable(baseAdd, (0x00BF));
  enhanFnBitVal =
      (*((volatile unsigned int *)(baseAdd + (0x8)))) & (0x00000010u);
  (*((volatile unsigned int *)(baseAdd + (0x8)))) |= (0x00000010u);
  UARTRegConfigModeEnable(baseAdd, (0x007F));
  (*((volatile unsigned int *)(baseAdd + (0x4)))) |= (intFlag & 0xF0);
  UARTRegConfigModeEnable(baseAdd, (0x00BF));
  (*((volatile unsigned int *)(baseAdd + (0x8)))) &= ~((0x00000010u));
  (*((volatile unsigned int *)(baseAdd + (0x8)))) |= enhanFnBitVal;
  (*((volatile unsigned int *)(baseAdd + (0xC)))) = lcrRegValue;
  (*((volatile unsigned int *)(baseAdd + (0x4)))) |= (intFlag & 0x0F);
}


x86 assembly (clang, -O0):
<UARTIntEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xbf,%esi
call   1030 <UARTRegConfigModeEnable@plt>
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
add    $0x8,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0x10,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    $0x8,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     $0x10,%ecx
mov    %ecx,(%rax)
mov    -0x4(%rbp),%edi
mov    $0x7f,%esi
call   1030 <UARTRegConfigModeEnable@plt>
mov    -0x8(%rbp),%edx
and    $0xf0,%edx
mov    -0x4(%rbp),%eax
add    $0x4,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
mov    -0x4(%rbp),%edi
mov    $0xbf,%esi
call   1030 <UARTRegConfigModeEnable@plt>
mov    -0x4(%rbp),%eax
add    $0x8,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xffffffef,%ecx
mov    %ecx,(%rax)
mov    -0xc(%rbp),%edx
mov    -0x4(%rbp),%eax
add    $0x8,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
mov    -0x10(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0xc,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%edx
and    $0xf,%edx
mov    -0x4(%rbp),%eax
add    $0x4,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTIntEnable>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
mov    %esi,%r15d
mov    %edi,%ebx
mov    $0xbf,%esi
call   1030 <UARTRegConfigModeEnable@plt>
mov    %eax,%r14d
lea    0x8(%rbx),%ebp
mov    0x0(%rbp),%r12d
and    $0x10,%r12d
orl    $0x10,0x0(%rbp)
mov    %ebx,%edi
mov    $0x7f,%esi
call   1030 <UARTRegConfigModeEnable@plt>
mov    %r15d,%eax
and    $0xf0,%eax
lea    0x4(%rbx),%r13d
or     %eax,0x0(%r13)
mov    %ebx,%edi
mov    $0xbf,%esi
call   1030 <UARTRegConfigModeEnable@plt>
andl   $0xffffffef,0x0(%rbp)
or     %r12d,0x0(%rbp)
add    $0xc,%ebx
mov    %r14d,(%rbx)
and    $0xf,%r15d
or     %r15d,0x0(%r13)
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @UARTIntEnable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %6
%7 = load i32, i32* %3
%8 = call i32 @UARTRegConfigModeEnable(i32 %7, i32 191)
store i32 %8, i32* %6
%9 = load i32, i32* %3
%10 = add i32 %9, 8
%11 = zext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
%13 = load volatile i32, i32* %12
%14 = and i32 %13, 16
store i32 %14, i32* %5
%15 = load i32, i32* %3
%16 = add i32 %15, 8
%17 = zext i32 %16 to i64
%18 = inttoptr i64 %17 to i32*
%19 = load volatile i32, i32* %18
%20 = or i32 %19, 16
store volatile i32 %20, i32* %18
%21 = load i32, i32* %3
%22 = call i32 @UARTRegConfigModeEnable(i32 %21, i32 127)
%23 = load i32, i32* %4
%24 = and i32 %23, 240
%25 = load i32, i32* %3
%26 = add i32 %25, 4
%27 = zext i32 %26 to i64
%28 = inttoptr i64 %27 to i32*
%29 = load volatile i32, i32* %28
%30 = or i32 %29, %24
store volatile i32 %30, i32* %28
%31 = load i32, i32* %3
%32 = call i32 @UARTRegConfigModeEnable(i32 %31, i32 191)
%33 = load i32, i32* %3
%34 = add i32 %33, 8
%35 = zext i32 %34 to i64
%36 = inttoptr i64 %35 to i32*
%37 = load volatile i32, i32* %36
%38 = and i32 %37, -17
store volatile i32 %38, i32* %36
%39 = load i32, i32* %5
%40 = load i32, i32* %3
%41 = add i32 %40, 8
%42 = zext i32 %41 to i64
%43 = inttoptr i64 %42 to i32*
%44 = load volatile i32, i32* %43
%45 = or i32 %44, %39
store volatile i32 %45, i32* %43
%46 = load i32, i32* %6
%47 = load i32, i32* %3
%48 = add i32 %47, 12
%49 = zext i32 %48 to i64
%50 = inttoptr i64 %49 to i32*
store volatile i32 %46, i32* %50
%51 = load i32, i32* %4
%52 = and i32 %51, 15
%53 = load i32, i32* %3
%54 = add i32 %53, 4
%55 = zext i32 %54 to i64
%56 = inttoptr i64 %55 to i32*
%57 = load volatile i32, i32* %56
%58 = or i32 %57, %52
store volatile i32 %58, i32* %56
ret void
}

LLVM IR (-O2):
define void @UARTIntEnable(i32 %0, i32 %1) {
%3 = tail call i32 @UARTRegConfigModeEnable(i32 %0, i32 191)
%4 = add i32 %0, 8
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, 16
%9 = load volatile i32, i32* %6
%10 = or i32 %9, 16
store volatile i32 %10, i32* %6
%11 = tail call i32 @UARTRegConfigModeEnable(i32 %0, i32 127)
%12 = and i32 %1, 240
%13 = add i32 %0, 4
%14 = zext i32 %13 to i64
%15 = inttoptr i64 %14 to i32*
%16 = load volatile i32, i32* %15
%17 = or i32 %16, %12
store volatile i32 %17, i32* %15
%18 = tail call i32 @UARTRegConfigModeEnable(i32 %0, i32 191)
%19 = load volatile i32, i32* %6
%20 = and i32 %19, -17
store volatile i32 %20, i32* %6
%21 = load volatile i32, i32* %6
%22 = or i32 %21, %8
store volatile i32 %22, i32* %6
%23 = add i32 %0, 12
%24 = zext i32 %23 to i64
%25 = inttoptr i64 %24 to i32*
store volatile i32 %3, i32* %25
%26 = and i32 %1, 15
%27 = load volatile i32, i32* %15
%28 = or i32 %27, %26
store volatile i32 %28, i32* %15
ret void
}