#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned int IMF_ReadCNTR0(int, int);
unsigned int IMF_ReadCNTR1(int, int);
unsigned int IMF_ReadCNTR2(int, int);
unsigned int IMF_ReadPCR(int, int);
unsigned int IMF_ReadPIU0(int, int);
unsigned int IMF_ReadPIU1(int, int);
unsigned int IMF_ReadPIU2(int, int);
unsigned int IMF_ReadTCR(int, int);
unsigned int IMF_ReadTCWR(int, int);
unsigned int IMF_ReadTSR(int, int);
int /*<<< orphan*/ IMF_WriteCNTR0(int, unsigned int, int);
int /*<<< orphan*/ IMF_WriteCNTR1(int, unsigned int, int);
int /*<<< orphan*/ IMF_WriteCNTR2(int, unsigned int, int);
int /*<<< orphan*/ IMF_WritePCR(int, unsigned int, int);
int /*<<< orphan*/ IMF_WritePIU0(int, unsigned int, int);
int /*<<< orphan*/ IMF_WritePIU1(int, unsigned int, int);
int /*<<< orphan*/ IMF_WritePIU2(int, unsigned int, int);
int /*<<< orphan*/ IMF_WriteTCR(int, unsigned int, int);
int /*<<< orphan*/ IMF_WriteTCWR(int, unsigned int, int);
int /*<<< orphan*/ IMF_WriteTSR(int, unsigned int, int);
unsigned emulate_imfc_io(int port, int is_write, unsigned ax) {
  if (is_write) {
    switch (port) {
    case 0x2A20:
      IMF_WritePIU0(port, ax, 1);
      break;
    case 0x2A21:
      IMF_WritePIU1(port, ax, 1);
      break;
    case 0x2A22:
      IMF_WritePIU2(port, ax, 1);
      break;
    case 0x2A23:
      IMF_WritePCR(port, ax, 1);
      break;
    case 0x2A24:
      IMF_WriteCNTR0(port, ax, 1);
      break;
    case 0x2A25:
      IMF_WriteCNTR1(port, ax, 1);
      break;
    case 0x2A26:
      IMF_WriteCNTR2(port, ax, 1);
      break;
    case 0x2A27:
      IMF_WriteTCWR(port, ax, 1);
      break;
    case 0x2A28:
    case 0x2A29:
    case 0x2A2A:
    case 0x2A2B:
      IMF_WriteTCR(port, ax, 1);
      break;
    case 0x2A2C:
    case 0x2A2D:
    case 0x2A2E:
    case 0x2A2F:
      IMF_WriteTSR(port, ax, 1);
      break;
    }
  } else {
    switch (port) {
    case 0x2A20:
      ax = IMF_ReadPIU0(port, 1);
      break;
    case 0x2A21:
      ax = IMF_ReadPIU1(port, 1);
      break;
    case 0x2A22:
      ax = IMF_ReadPIU2(port, 1);
      break;
    case 0x2A23:
      ax = IMF_ReadPCR(port, 1);
      break;
    case 0x2A24:
      ax = IMF_ReadCNTR0(port, 1);
      break;
    case 0x2A25:
      ax = IMF_ReadCNTR1(port, 1);
      break;
    case 0x2A26:
      ax = IMF_ReadCNTR2(port, 1);
      break;
    case 0x2A27:
      ax = IMF_ReadTCWR(port, 1);
      break;
    case 0x2A28:
    case 0x2A29:
    case 0x2A2A:
    case 0x2A2B:
      ax = IMF_ReadTCR(port, 1);
      break;
    case 0x2A2C:
    case 0x2A2D:
    case 0x2A2E:
    case 0x2A2F:
      ax = IMF_ReadTSR(port, 1);
      break;
    }
  }
  return ax;
}


x86 assembly (clang, -O0):
<emulate_imfc_io>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1358 <emulate_imfc_io+0x118>
mov    -0x4(%rbp),%eax
add    $0xffffd5e0,%eax
mov    %eax,%ecx
mov    %rcx,-0x18(%rbp)
sub    $0xf,%eax
ja     1353 <emulate_imfc_io+0x113>
mov    -0x18(%rbp),%rax
lea    0xdc3(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    $0x1,%edx
call   1120 <IMF_WritePIU0@plt>
jmp    1353 <emulate_imfc_io+0x113>
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    $0x1,%edx
call   10b0 <IMF_WritePIU1@plt>
jmp    1353 <emulate_imfc_io+0x113>
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    $0x1,%edx
call   1140 <IMF_WritePIU2@plt>
jmp    1353 <emulate_imfc_io+0x113>
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    $0x1,%edx
call   10f0 <IMF_WritePCR@plt>
jmp    1353 <emulate_imfc_io+0x113>
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    $0x1,%edx
call   1150 <IMF_WriteCNTR0@plt>
jmp    1353 <emulate_imfc_io+0x113>
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    $0x1,%edx
call   10c0 <IMF_WriteCNTR1@plt>
jmp    1353 <emulate_imfc_io+0x113>
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    $0x1,%edx
call   1130 <IMF_WriteCNTR2@plt>
jmp    1353 <emulate_imfc_io+0x113>
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    $0x1,%edx
call   10d0 <IMF_WriteTCWR@plt>
jmp    1353 <emulate_imfc_io+0x113>
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    $0x1,%edx
call   1030 <IMF_WriteTCR@plt>
jmp    1353 <emulate_imfc_io+0x113>
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    $0x1,%edx
call   1160 <IMF_WriteTSR@plt>
jmp    1455 <emulate_imfc_io+0x215>
mov    -0x4(%rbp),%eax
add    $0xffffd5e0,%eax
mov    %eax,%ecx
mov    %rcx,-0x20(%rbp)
sub    $0xf,%eax
ja     1450 <emulate_imfc_io+0x210>
mov    -0x20(%rbp),%rax
lea    0xc86(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1100 <IMF_ReadPIU0@plt>
mov    %eax,-0xc(%rbp)
jmp    1450 <emulate_imfc_io+0x210>
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1090 <IMF_ReadPIU1@plt>
mov    %eax,-0xc(%rbp)
jmp    1450 <emulate_imfc_io+0x210>
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1110 <IMF_ReadPIU2@plt>
mov    %eax,-0xc(%rbp)
jmp    1450 <emulate_imfc_io+0x210>
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1070 <IMF_ReadPCR@plt>
mov    %eax,-0xc(%rbp)
jmp    1450 <emulate_imfc_io+0x210>
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1050 <IMF_ReadCNTR0@plt>
mov    %eax,-0xc(%rbp)
jmp    1450 <emulate_imfc_io+0x210>
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   10e0 <IMF_ReadCNTR1@plt>
mov    %eax,-0xc(%rbp)
jmp    1450 <emulate_imfc_io+0x210>
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1040 <IMF_ReadCNTR2@plt>
mov    %eax,-0xc(%rbp)
jmp    1450 <emulate_imfc_io+0x210>
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1060 <IMF_ReadTCWR@plt>
mov    %eax,-0xc(%rbp)
jmp    1450 <emulate_imfc_io+0x210>
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   10a0 <IMF_ReadTCR@plt>
mov    %eax,-0xc(%rbp)
jmp    1450 <emulate_imfc_io+0x210>
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1080 <IMF_ReadTSR@plt>
mov    %eax,-0xc(%rbp)
jmp    1455 <emulate_imfc_io+0x215>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emulate_imfc_io>:
push   %rbx
mov    %edx,%ebx
lea    -0x2a20(%rdi),%eax
test   %esi,%esi
je     1277 <emulate_imfc_io+0x37>
cmp    $0xf,%eax
ja     1350 <emulate_imfc_io+0x110>
lea    0xda3(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    %ebx,%esi
mov    $0x1,%edx
call   1030 <IMF_WriteTCR@plt>
jmp    1350 <emulate_imfc_io+0x110>
cmp    $0xf,%eax
ja     1350 <emulate_imfc_io+0x110>
lea    0xdb9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x1,%esi
pop    %rbx
jmp    10a0 <IMF_ReadTCR@plt>
mov    %ebx,%esi
mov    $0x1,%edx
call   1160 <IMF_WriteTSR@plt>
jmp    1350 <emulate_imfc_io+0x110>
mov    $0x1,%esi
pop    %rbx
jmp    1080 <IMF_ReadTSR@plt>
mov    $0x2a20,%edi
mov    %ebx,%esi
mov    $0x1,%edx
call   1120 <IMF_WritePIU0@plt>
jmp    1350 <emulate_imfc_io+0x110>
mov    $0x2a21,%edi
mov    %ebx,%esi
mov    $0x1,%edx
call   10b0 <IMF_WritePIU1@plt>
jmp    1350 <emulate_imfc_io+0x110>
mov    $0x2a22,%edi
mov    %ebx,%esi
mov    $0x1,%edx
call   1140 <IMF_WritePIU2@plt>
jmp    1350 <emulate_imfc_io+0x110>
mov    $0x2a23,%edi
mov    %ebx,%esi
mov    $0x1,%edx
call   10f0 <IMF_WritePCR@plt>
jmp    1350 <emulate_imfc_io+0x110>
mov    $0x2a24,%edi
mov    %ebx,%esi
mov    $0x1,%edx
call   1150 <IMF_WriteCNTR0@plt>
jmp    1350 <emulate_imfc_io+0x110>
mov    $0x2a25,%edi
mov    %ebx,%esi
mov    $0x1,%edx
call   10c0 <IMF_WriteCNTR1@plt>
jmp    1350 <emulate_imfc_io+0x110>
mov    $0x2a26,%edi
mov    %ebx,%esi
mov    $0x1,%edx
call   1130 <IMF_WriteCNTR2@plt>
jmp    1350 <emulate_imfc_io+0x110>
mov    $0x2a27,%edi
mov    %ebx,%esi
mov    $0x1,%edx
call   10d0 <IMF_WriteTCWR@plt>
mov    %ebx,%eax
pop    %rbx
ret
mov    $0x2a20,%edi
mov    $0x1,%esi
pop    %rbx
jmp    1100 <IMF_ReadPIU0@plt>
mov    $0x2a21,%edi
mov    $0x1,%esi
pop    %rbx
jmp    1090 <IMF_ReadPIU1@plt>
mov    $0x2a22,%edi
mov    $0x1,%esi
pop    %rbx
jmp    1110 <IMF_ReadPIU2@plt>
mov    $0x2a23,%edi
mov    $0x1,%esi
pop    %rbx
jmp    1070 <IMF_ReadPCR@plt>
mov    $0x2a24,%edi
mov    $0x1,%esi
pop    %rbx
jmp    1050 <IMF_ReadCNTR0@plt>
mov    $0x2a25,%edi
mov    $0x1,%esi
pop    %rbx
jmp    10e0 <IMF_ReadCNTR1@plt>
mov    $0x2a26,%edi
mov    $0x1,%esi
pop    %rbx
jmp    1040 <IMF_ReadCNTR2@plt>
mov    $0x2a27,%edi
mov    $0x1,%esi
pop    %rbx
jmp    1060 <IMF_ReadTCWR@plt>

LLVM IR (-O0):
define i32 @emulate_imfc_io(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %52
9: ; preds = %3
%10 = load i32, i32* %4
switch i32 %10, label %51 [
i32 10784, label %11
i32 10785, label %15
i32 10786, label %19
i32 10787, label %23
i32 10788, label %27
i32 10789, label %31
i32 10790, label %35
i32 10791, label %39
i32 10792, label %43
i32 10793, label %43
i32 10794, label %43
i32 10795, label %43
i32 10796, label %47
i32 10797, label %47
i32 10798, label %47
i32 10799, label %47
]
11: ; preds = %9
%12 = load i32, i32* %4
%13 = load i32, i32* %6
%14 = call i32 @IMF_WritePIU0(i32 %12, i32 %13, i32 1)
br label %51
15: ; preds = %9
%16 = load i32, i32* %4
%17 = load i32, i32* %6
%18 = call i32 @IMF_WritePIU1(i32 %16, i32 %17, i32 1)
br label %51
19: ; preds = %9
%20 = load i32, i32* %4
%21 = load i32, i32* %6
%22 = call i32 @IMF_WritePIU2(i32 %20, i32 %21, i32 1)
br label %51
23: ; preds = %9
%24 = load i32, i32* %4
%25 = load i32, i32* %6
%26 = call i32 @IMF_WritePCR(i32 %24, i32 %25, i32 1)
br label %51
27: ; preds = %9
%28 = load i32, i32* %4
%29 = load i32, i32* %6
%30 = call i32 @IMF_WriteCNTR0(i32 %28, i32 %29, i32 1)
br label %51
31: ; preds = %9
%32 = load i32, i32* %4
%33 = load i32, i32* %6
%34 = call i32 @IMF_WriteCNTR1(i32 %32, i32 %33, i32 1)
br label %51
35: ; preds = %9
%36 = load i32, i32* %4
%37 = load i32, i32* %6
%38 = call i32 @IMF_WriteCNTR2(i32 %36, i32 %37, i32 1)
br label %51
39: ; preds = %9
%40 = load i32, i32* %4
%41 = load i32, i32* %6
%42 = call i32 @IMF_WriteTCWR(i32 %40, i32 %41, i32 1)
br label %51
43: ; preds = %9, %9, %9, %9
%44 = load i32, i32* %4
%45 = load i32, i32* %6
%46 = call i32 @IMF_WriteTCR(i32 %44, i32 %45, i32 1)
br label %51
47: ; preds = %9, %9, %9, %9
%48 = load i32, i32* %4
%49 = load i32, i32* %6
%50 = call i32 @IMF_WriteTSR(i32 %48, i32 %49, i32 1)
br label %51
51: ; preds = %9, %47, %43, %39, %35, %31, %27, %23, %19, %15, %11
br label %85
52: ; preds = %3
%53 = load i32, i32* %4
switch i32 %53, label %84 [
i32 10784, label %54
i32 10785, label %57
i32 10786, label %60
i32 10787, label %63
i32 10788, label %66
i32 10789, label %69
i32 10790, label %72
i32 10791, label %75
i32 10792, label %78
i32 10793, label %78
i32 10794, label %78
i32 10795, label %78
i32 10796, label %81
i32 10797, label %81
i32 10798, label %81
i32 10799, label %81
]
54: ; preds = %52
%55 = load i32, i32* %4
%56 = call i32 @IMF_ReadPIU0(i32 %55, i32 1)
store i32 %56, i32* %6
br label %84
57: ; preds = %52
%58 = load i32, i32* %4
%59 = call i32 @IMF_ReadPIU1(i32 %58, i32 1)
store i32 %59, i32* %6
br label %84
60: ; preds = %52
%61 = load i32, i32* %4
%62 = call i32 @IMF_ReadPIU2(i32 %61, i32 1)
store i32 %62, i32* %6
br label %84
63: ; preds = %52
%64 = load i32, i32* %4
%65 = call i32 @IMF_ReadPCR(i32 %64, i32 1)
store i32 %65, i32* %6
br label %84
66: ; preds = %52
%67 = load i32, i32* %4
%68 = call i32 @IMF_ReadCNTR0(i32 %67, i32 1)
store i32 %68, i32* %6
br label %84
69: ; preds = %52
%70 = load i32, i32* %4
%71 = call i32 @IMF_ReadCNTR1(i32 %70, i32 1)
store i32 %71, i32* %6
br label %84
72: ; preds = %52
%73 = load i32, i32* %4
%74 = call i32 @IMF_ReadCNTR2(i32 %73, i32 1)
store i32 %74, i32* %6
br label %84
75: ; preds = %52
%76 = load i32, i32* %4
%77 = call i32 @IMF_ReadTCWR(i32 %76, i32 1)
store i32 %77, i32* %6
br label %84
78: ; preds = %52, %52, %52, %52
%79 = load i32, i32* %4
%80 = call i32 @IMF_ReadTCR(i32 %79, i32 1)
store i32 %80, i32* %6
br label %84
81: ; preds = %52, %52, %52, %52
%82 = load i32, i32* %4
%83 = call i32 @IMF_ReadTSR(i32 %82, i32 1)
store i32 %83, i32* %6
br label %84
84: ; preds = %52, %81, %78, %75, %72, %69, %66, %63, %60, %57, %54
br label %85
85: ; preds = %84, %51
%86 = load i32, i32* %6
ret i32 %86
}

LLVM IR (-O2):
define i32 @emulate_imfc_io(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %1, 0
br i1 %4, label %26, label %5
5: ; preds = %3
switch i32 %0, label %47 [
i32 10784, label %6
i32 10785, label %8
i32 10786, label %10
i32 10787, label %12
i32 10788, label %14
i32 10789, label %16
i32 10790, label %18
i32 10791, label %20
i32 10792, label %22
i32 10793, label %22
i32 10794, label %22
i32 10795, label %22
i32 10796, label %24
i32 10797, label %24
i32 10798, label %24
i32 10799, label %24
]
6: ; preds = %5
%7 = tail call i32 @IMF_WritePIU0(i32 10784, i32 %2, i32 1)
br label %47
8: ; preds = %5
%9 = tail call i32 @IMF_WritePIU1(i32 10785, i32 %2, i32 1)
br label %47
10: ; preds = %5
%11 = tail call i32 @IMF_WritePIU2(i32 10786, i32 %2, i32 1)
br label %47
12: ; preds = %5
%13 = tail call i32 @IMF_WritePCR(i32 10787, i32 %2, i32 1)
br label %47
14: ; preds = %5
%15 = tail call i32 @IMF_WriteCNTR0(i32 10788, i32 %2, i32 1)
br label %47
16: ; preds = %5
%17 = tail call i32 @IMF_WriteCNTR1(i32 10789, i32 %2, i32 1)
br label %47
18: ; preds = %5
%19 = tail call i32 @IMF_WriteCNTR2(i32 10790, i32 %2, i32 1)
br label %47
20: ; preds = %5
%21 = tail call i32 @IMF_WriteTCWR(i32 10791, i32 %2, i32 1)
br label %47
22: ; preds = %5, %5, %5, %5
%23 = tail call i32 @IMF_WriteTCR(i32 %0, i32 %2, i32 1)
br label %47
24: ; preds = %5, %5, %5, %5
%25 = tail call i32 @IMF_WriteTSR(i32 %0, i32 %2, i32 1)
br label %47
26: ; preds = %3
switch i32 %0, label %47 [
i32 10784, label %27
i32 10785, label %29
i32 10786, label %31
i32 10787, label %33
i32 10788, label %35
i32 10789, label %37
i32 10790, label %39
i32 10791, label %41
i32 10792, label %43
i32 10793, label %43
i32 10794, label %43
i32 10795, label %43
i32 10796, label %45
i32 10797, label %45
i32 10798, label %45
i32 10799, label %45
]
27: ; preds = %26
%28 = tail call i32 @IMF_ReadPIU0(i32 10784, i32 1)
br label %47
29: ; preds = %26
%30 = tail call i32 @IMF_ReadPIU1(i32 10785, i32 1)
br label %47
31: ; preds = %26
%32 = tail call i32 @IMF_ReadPIU2(i32 10786, i32 1)
br label %47
33: ; preds = %26
%34 = tail call i32 @IMF_ReadPCR(i32 10787, i32 1)
br label %47
35: ; preds = %26
%36 = tail call i32 @IMF_ReadCNTR0(i32 10788, i32 1)
br label %47
37: ; preds = %26
%38 = tail call i32 @IMF_ReadCNTR1(i32 10789, i32 1)
br label %47
39: ; preds = %26
%40 = tail call i32 @IMF_ReadCNTR2(i32 10790, i32 1)
br label %47
41: ; preds = %26
%42 = tail call i32 @IMF_ReadTCWR(i32 10791, i32 1)
br label %47
43: ; preds = %26, %26, %26, %26
%44 = tail call i32 @IMF_ReadTCR(i32 %0, i32 1)
br label %47
45: ; preds = %26, %26, %26, %26
%46 = tail call i32 @IMF_ReadTSR(i32 %0, i32 1)
br label %47
47: ; preds = %27, %29, %31, %33, %35, %37, %39, %41, %43, %45, %26, %6, %8, %10, %12, %14, %16, %18, %20, %22, %24, %5
%48 = phi i32 [ %2, %5 ], [ %2, %24 ], [ %2, %22 ], [ %2, %20 ], [ %2, %18 ], [ %2, %16 ], [ %2, %14 ], [ %2, %12 ], [ %2, %10 ], [ %2, %8 ], [ %2, %6 ], [ %2, %26 ], [ %46, %45 ], [ %44, %43 ], [ %42, %41 ], [ %40, %39 ], [ %38, %37 ], [ %36, %35 ], [ %34, %33 ], [ %32, %31 ], [ %30, %29 ], [ %28, %27 ]
ret i32 %48
}