xunge/DecIR huggingface dataset:
/* Type definitions */
struct shmid_ds {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ Error(char *);
int shmctl(int, int, struct shmid_ds *);
int Shmctl(int shmid, int cmd, struct shmid_ds *buf) {
  int x = shmctl(shmid, cmd, buf);
  if (x < 0) {
    Error("Error on shmctl");
  }
  return x;
}


x86 assembly (clang, -O0):
<Shmctl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1040 <shmctl@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jge    115a <Shmctl+0x3a>
lea    0xeab(%rip),%rdi
call   1030 <Error@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Shmctl>:
push   %rbx
call   1040 <shmctl@plt>
mov    %eax,%ebx
test   %eax,%eax
jns    1138 <Shmctl+0x18>
lea    0xecd(%rip),%rdi
call   1030 <Error@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.shmid_ds = type { i32 }
@.str = [16 x i8] c"Error on shmctl\00"
define i32 @Shmctl(i32 %0, i32 %1, %struct.shmid_ds* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca %struct.shmid_ds*
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store %struct.shmid_ds* %2, %struct.shmid_ds** %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = load %struct.shmid_ds*, %struct.shmid_ds** %6
%11 = call i32 @shmctl(i32 %8, i32 %9, %struct.shmid_ds* %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %3
%15 = call i32 @Error(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %16
16: ; preds = %14, %3
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
%struct.shmid_ds = type { i32 }
@.str = [16 x i8] c"Error on shmctl\00"
define i32 @Shmctl(i32 %0, i32 %1, %struct.shmid_ds* %2) {
%4 = tail call i32 @shmctl(i32 %0, i32 %1, %struct.shmid_ds* %2)
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @Error(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %3
ret i32 %4
}
int test_imm_81int32_reg(int val) { return ((val) & (0x81 << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_81int32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x81,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_81int32_reg>:
test   $0x81,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_81int32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 129
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_81int32_reg(i32 %0) {
%2 = and i32 %0, 129
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int foo(int a, int b, int c) { return ((a & ~b) | (~a & b)) & c; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x4(%rbp),%ecx
xor    $0xffffffff,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
and    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    %edi,%eax
xor    %esi,%eax
and    %edx,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = xor i32 %8, -1
%10 = and i32 %7, %9
%11 = load i32, i32* %4
%12 = xor i32 %11, -1
%13 = load i32, i32* %5
%14 = and i32 %12, %13
%15 = or i32 %10, %14
%16 = load i32, i32* %6
%17 = and i32 %15, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i32 %1, i32 %2) {
%4 = xor i32 %1, %0
%5 = and i32 %4, %2
ret i32 %5
}
/* Variables and functions */
char *realloc(char *, int);
char *strcat(char *, char *);
int strlen(char *);
char *prependString(char *dst, char *source) {
  int length = strlen(dst) + strlen(source) + 2;
  dst = realloc(dst, length * sizeof(char));
  dst = strcat(dst, source);
  return dst;
}


x86 assembly (clang, -O0):
<prependString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
add    %ecx,%eax
add    $0x2,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
movslq -0x14(%rbp),%rax
shl    $0x0,%rax
mov    %eax,%esi
call   1040 <realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <strcat@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prependString>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %eax,%r15d
mov    %r14,%rdi
call   1030 <strlen@plt>
lea    (%r15,%rax,1),%esi
add    $0x2,%esi
mov    %rbx,%rdi
call   1040 <realloc@plt>
mov    %rax,%rdi
mov    %r14,%rsi
pop    %rbx
pop    %r14
pop    %r15
jmp    1050 <strcat@plt>

LLVM IR (-O0):
define i8* @prependString(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i32 @strlen(i8* %6)
%8 = load i8*, i8** %4
%9 = call i32 @strlen(i8* %8)
%10 = add nsw i32 %7, %9
%11 = add nsw i32 %10, 2
store i32 %11, i32* %5
%12 = load i8*, i8** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = mul i64 %14, 1
%16 = trunc i64 %15 to i32
%17 = call i8* @realloc(i8* %12, i32 %16)
store i8* %17, i8** %3
%18 = load i8*, i8** %3
%19 = load i8*, i8** %4
%20 = call i8* @strcat(i8* %18, i8* %19)
store i8* %20, i8** %3
%21 = load i8*, i8** %3
ret i8* %21
}

LLVM IR (-O2):
define i8* @prependString(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = tail call i32 @strlen(i8* %1)
%5 = add i32 %3, 2
%6 = add i32 %5, %4
%7 = tail call i8* @realloc(i8* %0, i32 %6)
%8 = tail call i8* @strcat(i8* dereferenceable(1) %7, i8* dereferenceable(1) %1)
ret i8* %7
}
unsigned long getNumber(unsigned char *p) {
  return (unsigned long)*(p + 0) << 24 | (unsigned long)*(p + 1) << 16 |
         (unsigned long)*(p + 2) << 8 | (unsigned long)*(p + 3) << 0;
}


x86 assembly (clang, -O0):
<getNumber>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
shl    $0x18,%rax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x10,%rcx
or     %rcx,%rax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x8,%rcx
or     %rcx,%rax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%ecx
shl    $0x0,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getNumber>:
mov    (%rdi),%eax
shl    $0x20,%rax
bswap  %rax
ret

LLVM IR (-O0):
define i64 @getNumber(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i64
%7 = shl i64 %6, 24
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = load i8, i8* %9
%11 = zext i8 %10 to i64
%12 = shl i64 %11, 16
%13 = or i64 %7, %12
%14 = load i8*, i8** %2
%15 = getelementptr inbounds i8, i8* %14, i64 2
%16 = load i8, i8* %15
%17 = zext i8 %16 to i64
%18 = shl i64 %17, 8
%19 = or i64 %13, %18
%20 = load i8*, i8** %2
%21 = getelementptr inbounds i8, i8* %20, i64 3
%22 = load i8, i8* %21
%23 = zext i8 %22 to i64
%24 = shl i64 %23, 0
%25 = or i64 %19, %24
ret i64 %25
}

LLVM IR (-O2):
define i64 @getNumber(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i64
%4 = shl nuw nsw i64 %3, 24
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = zext i8 %6 to i64
%8 = shl nuw nsw i64 %7, 16
%9 = or i64 %8, %4
%10 = getelementptr inbounds i8, i8* %0, i64 2
%11 = load i8, i8* %10
%12 = zext i8 %11 to i64
%13 = shl nuw nsw i64 %12, 8
%14 = or i64 %9, %13
%15 = getelementptr inbounds i8, i8* %0, i64 3
%16 = load i8, i8* %15
%17 = zext i8 %16 to i64
%18 = or i64 %14, %17
ret i64 %18
}
void test_34_0(char *mem) { __atomic_xor_fetch(mem, 1, 4); }


x86 assembly (clang, -O0):
<test_34_0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movb   $0x1,-0x9(%rbp)
mov    -0x9(%rbp),%cl
mov    %cl,-0xc(%rbp)
mov    (%rax),%al
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%al
mov    -0x18(%rbp),%rcx
mov    -0xc(%rbp),%sil
mov    %al,%dl
xor    %sil,%dl
lock cmpxchg %dl,(%rcx)
sete   %cl
mov    %al,-0x19(%rbp)
test   $0x1,%cl
mov    %al,-0xb(%rbp)
jne    114a <test_34_0+0x4a>
jmp    111f <test_34_0+0x1f>
mov    -0xc(%rbp),%cl
mov    -0x19(%rbp),%al
xor    %cl,%al
mov    %al,-0xa(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_34_0>:
lock xorb $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @test_34_0(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
%4 = alloca i8
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8 1, i8* %3
%6 = load i8, i8* %3
%7 = atomicrmw xor i8* %5, i8 %6 acq_rel
%8 = xor i8 %7, %6
store i8 %8, i8* %4
%9 = load i8, i8* %4
ret void
}

LLVM IR (-O2):
define void @test_34_0(i8* nocapture %0) {
%2 = atomicrmw xor i8* %0, i8 1 acq_rel
ret void
}
void signed_char_sub_unsigned_char(signed char *LHS, unsigned char RHS) {
  (*LHS) -= RHS;
}


x86 assembly (clang, -O0):
<signed_char_sub_unsigned_char>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%edx
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
sub    %edx,%ecx
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<signed_char_sub_unsigned_char>:
sub    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @signed_char_sub_unsigned_char(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = sub nsw i32 %9, %6
%11 = trunc i32 %10 to i8
store i8 %11, i8* %7
ret void
}

LLVM IR (-O2):
define void @signed_char_sub_unsigned_char(i8* nocapture %0, i8 zeroext %1) {
%3 = load i8, i8* %0
%4 = sub i8 %3, %1
store i8 %4, i8* %0
ret void
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ system(char *);
int main() {
  int times = 100;
  while (times--) {
    system("temp");
  }
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x64,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x8(%rbp)
cmp    $0x0,%eax
je     114b <main+0x3b>
lea    0xebf(%rip),%rdi
call   1030 <system@plt>
jmp    1126 <main+0x16>
mov    0x2e8e(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    $0xffffff9c,%ebp
lea    0xee1(%rip),%rbx
nop
mov    %rbx,%rdi
call   1030 <system@plt>
inc    %ebp
jne    1120 <main+0x10>
mov    0x2ead(%rip),%rax
mov    (%rax),%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [5 x i8] c"temp\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 100, i32* %2
br label %3
3: ; preds = %7, %0
%4 = load i32, i32* %2
%5 = add nsw i32 %4, -1
store i32 %5, i32* %2
%6 = icmp ne i32 %4, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = call i32 @system(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %3
9: ; preds = %3
%10 = load i32, i32* @EXIT_SUCCESS
ret i32 %10
}

LLVM IR (-O2):
@.str = [5 x i8] c"temp\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 100, %0 ], [ %3, %1 ]
%3 = add nsw i32 %2, -1
%4 = tail call i32 @system(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%5 = icmp eq i32 %3, 0
br i1 %5, label %6, label %1
6: ; preds = %1
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}
/* Type definitions */
struct wl_proxy {
  int dummy;
};
struct wl_data_device {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wl_proxy_destroy(struct wl_proxy *);
void wl_data_device_destroy(struct wl_data_device *wl_data_device) {
  wl_proxy_destroy((struct wl_proxy *)wl_data_device);
}


x86 assembly (clang, -O0):
<wl_data_device_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <wl_proxy_destroy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wl_data_device_destroy>:
jmp    1030 <wl_proxy_destroy@plt>

LLVM IR (-O0):
%struct.wl_data_device = type { i32 }
%struct.wl_proxy = type { i32 }
define void @wl_data_device_destroy(%struct.wl_data_device* %0) {
%2 = alloca %struct.wl_data_device*
store %struct.wl_data_device* %0, %struct.wl_data_device** %2
%3 = load %struct.wl_data_device*, %struct.wl_data_device** %2
%4 = bitcast %struct.wl_data_device* %3 to %struct.wl_proxy*
%5 = call i32 @wl_proxy_destroy(%struct.wl_proxy* %4)
ret void
}

LLVM IR (-O2):
%struct.wl_data_device = type { i32 }
%struct.wl_proxy = type { i32 }
define void @wl_data_device_destroy(%struct.wl_data_device* %0) {
%2 = bitcast %struct.wl_data_device* %0 to %struct.wl_proxy*
%3 = tail call i32 @wl_proxy_destroy(%struct.wl_proxy* %2)
ret void
}
void init_arr(float arr[], long int *j) {
  long i;
  *j = 2L;
  for (i = 0; i < 2L; i++) {
    arr[i] = (float)(i + 1);
  }
}


x86 assembly (clang, -O0):
<init_arr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movq   $0x2,(%rax)
movq   $0x0,-0x18(%rbp)
cmpq   $0x2,-0x18(%rbp)
jge    1155 <init_arr+0x55>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
cvtsi2ss %rax,%xmm0
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
movss  %xmm0,(%rax,%rcx,4)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    111f <init_arr+0x1f>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_arr>:
movq   $0x2,(%rsi)
movabs $0x400000003f800000,%rax
mov    %rax,(%rdi)
ret

LLVM IR (-O0):
define void @init_arr(float* %0, i64* %1) {
%3 = alloca float*
%4 = alloca i64*
%5 = alloca i64
store float* %0, float** %3
store i64* %1, i64** %4
%6 = load i64*, i64** %4
store i64 2, i64* %6
store i64 0, i64* %5
br label %7
7: ; preds = %17, %2
%8 = load i64, i64* %5
%9 = icmp slt i64 %8, 2
br i1 %9, label %10, label %20
10: ; preds = %7
%11 = load i64, i64* %5
%12 = add nsw i64 %11, 1
%13 = sitofp i64 %12 to float
%14 = load float*, float** %3
%15 = load i64, i64* %5
%16 = getelementptr inbounds float, float* %14, i64 %15
store float %13, float* %16
br label %17
17: ; preds = %10
%18 = load i64, i64* %5
%19 = add nsw i64 %18, 1
store i64 %19, i64* %5
br label %7
20: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @init_arr(float* nocapture writeonly %0, i64* nocapture writeonly %1) {
store i64 2, i64* %1
store float 1.000000e+00, float* %0
%3 = getelementptr inbounds float, float* %0, i64 1
store float 2.000000e+00, float* %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ little_endian_read_24(int /*<<< orphan*/ const *, int);
uint32_t hci_event_inquiry_result_get_class_of_device(const uint8_t *event) {
  return little_endian_read_24(event, 12);
}


x86 assembly (clang, -O0):
<hci_event_inquiry_result_get_class_of_device>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xc,%esi
call   1030 <little_endian_read_24@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hci_event_inquiry_result_get_class_of_device>:
mov    $0xc,%esi
jmp    1030 <little_endian_read_24@plt>

LLVM IR (-O0):
define i32 @hci_event_inquiry_result_get_class_of_device(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @little_endian_read_24(i32* %3, i32 12)
ret i32 %4
}

LLVM IR (-O2):
define i32 @hci_event_inquiry_result_get_class_of_device(i32* %0) {
%2 = tail call i32 @little_endian_read_24(i32* %0, i32 12)
ret i32 %2
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ window;
};
struct TYPE_4__ {
  TYPE_1__ xexpose;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
unsigned long get_XEvent_xexpose_window(void *_p) {
  return (unsigned long)((XEvent *)_p)->xexpose.window;
}


x86 assembly (clang, -O0):
<get_XEvent_xexpose_window>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xexpose_window>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i64 @get_XEvent_xexpose_window(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @get_XEvent_xexpose_window(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
unsigned int value_as_int(float value) {
  union {
    float f;
    unsigned int i;
  } u = {.f = value};
  return u.i;
}


x86 assembly (clang, -O0):
<value_as_int>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<value_as_int>:
movd   %xmm0,%eax
ret

LLVM IR (-O0):
%union.anon = type { float }
define i32 @value_as_int(float %0) {
%2 = alloca float
%3 = alloca %union.anon
store float %0, float* %2
%4 = bitcast %union.anon* %3 to float*
%5 = load float, float* %2
store float %5, float* %4
%6 = bitcast %union.anon* %3 to i32*
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @value_as_int(float %0) {
%2 = bitcast float %0 to i32
ret i32 %2
}
/* Variables and functions */
long get_table_index(char *, char *, char *, char *);
long get_tag_index(char *tagname) {
  return get_table_index(tagname, "tags", "tagid", "tagname");
}


x86 assembly (clang, -O0):
<get_tag_index>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
lea    0xed7(%rip),%rdx
lea    0xed6(%rip),%rcx
call   1030 <get_table_index@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_tag_index>:
lea    0xee9(%rip),%rsi
lea    0xee7(%rip),%rdx
lea    0xee6(%rip),%rcx
jmp    1030 <get_table_index@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"tags\00"
@.str.1 = [6 x i8] c"tagid\00"
@.str.2 = [8 x i8] c"tagname\00"
define i64 @get_tag_index(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @get_table_index(i8* %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0))
ret i64 %4
}

LLVM IR (-O2):
@.str = [5 x i8] c"tags\00"
@.str.1 = [6 x i8] c"tagid\00"
@.str.2 = [8 x i8] c"tagname\00"
define i64 @get_tag_index(i8* %0) {
%2 = tail call i64 @get_table_index(i8* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0))
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ vecNd_add_new(double *, double *, double const *, int);
void vec3d_add(double a[3], const double b[3]) { vecNd_add_new(a, a, b, 3); }


x86 assembly (clang, -O0):
<vec3d_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0x3,%ecx
call   1030 <vecNd_add_new@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec3d_add>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x3,%ecx
jmp    1030 <vecNd_add_new@plt>

LLVM IR (-O0):
define void @vec3d_add(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = load double*, double** %3
%7 = load double*, double** %4
%8 = call i32 @vecNd_add_new(double* %5, double* %6, double* %7, i32 3)
ret void
}

LLVM IR (-O2):
define void @vec3d_add(double* %0, double* %1) {
%3 = tail call i32 @vecNd_add_new(double* %0, double* %0, double* %1, i32 3)
ret void
}
int count_bit(unsigned int num) {
  int i, bit = 1, count = 0;
  for (i = 0; i < sizeof(num) << 3; i++, bit <<= 1)
    if (num & bit)
      count++;
  return count;
}


x86 assembly (clang, -O0):
<count_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x8(%rbp)
movslq -0x8(%rbp),%rax
cmp    $0x20,%rax
jae    115e <count_bit+0x5e>
mov    -0x4(%rbp),%eax
and    -0xc(%rbp),%eax
cmp    $0x0,%eax
je     1142 <count_bit+0x42>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1147 <count_bit+0x47>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    111c <count_bit+0x1c>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_bit>:
mov    $0x1,%ecx
xor    %eax,%eax
mov    $0x20,%edx
nopl   0x0(%rax)
mov    %ecx,%esi
and    %edi,%esi
cmp    $0x1,%esi
sbb    $0xffffffff,%eax
lea    (%rcx,%rcx,1),%esi
and    %edi,%esi
cmp    $0x1,%esi
sbb    $0xffffffff,%eax
lea    0x0(,%rcx,4),%esi
and    %edi,%esi
cmp    $0x1,%esi
sbb    $0xffffffff,%eax
lea    0x0(,%rcx,8),%esi
and    %edi,%esi
cmp    $0x1,%esi
sbb    $0xffffffff,%eax
shl    $0x4,%ecx
add    $0xfffffffc,%edx
jne    1110 <count_bit+0x10>
ret

LLVM IR (-O0):
define i32 @count_bit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %3
br label %6
6: ; preds = %19, %1
%7 = load i32, i32* %3
%8 = sext i32 %7 to i64
%9 = icmp ult i64 %8, 32
br i1 %9, label %10, label %24
10: ; preds = %6
%11 = load i32, i32* %2
%12 = load i32, i32* %4
%13 = and i32 %11, %12
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %10
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
br label %18
18: ; preds = %15, %10
br label %19
19: ; preds = %18
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 1
store i32 %21, i32* %3
%22 = load i32, i32* %4
%23 = shl i32 %22, 1
store i32 %23, i32* %4
br label %6
24: ; preds = %6
%25 = load i32, i32* %5
ret i32 %25
}

LLVM IR (-O2):
define i32 @count_bit(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %24, %2 ]
%4 = phi i32 [ 1, %1 ], [ %26, %2 ]
%5 = phi i32 [ 0, %1 ], [ %25, %2 ]
%6 = and i32 %4, %0
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i32
%9 = add nuw nsw i32 %3, %8
%10 = shl i32 %4, 1
%11 = and i32 %10, %0
%12 = icmp ne i32 %11, 0
%13 = zext i1 %12 to i32
%14 = add nuw nsw i32 %9, %13
%15 = shl i32 %4, 2
%16 = and i32 %15, %0
%17 = icmp ne i32 %16, 0
%18 = zext i1 %17 to i32
%19 = add nuw nsw i32 %14, %18
%20 = shl i32 %4, 3
%21 = and i32 %20, %0
%22 = icmp ne i32 %21, 0
%23 = zext i1 %22 to i32
%24 = add nuw nsw i32 %19, %23
%25 = add nuw nsw i32 %5, 4
%26 = shl i32 %4, 4
%27 = icmp eq i32 %25, 32
br i1 %27, label %28, label %2
28: ; preds = %2
ret i32 %24
}
/* Variables and functions */
int *sbt_androidxml_get_int_array(const char *file_name, const char *res_name) {
  return NULL;
}


x86 assembly (clang, -O0):
<sbt_androidxml_get_int_array>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sbt_androidxml_get_int_array>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32* @sbt_androidxml_get_int_array(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32* null
}

LLVM IR (-O2):
define noalias i32* @sbt_androidxml_get_int_array(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32* null
}
/* Variables and functions */
int /*<<< orphan*/ write_src(char *);
void add_handler(void) {
  write_src("{\n");
  write_src("imm_t b = POP();\n");
  write_src("imm_t a = POP();\n");
  write_src("PUSH(a+b);\n");
  write_src("}\n");
}


x86 assembly (clang, -O0):
<add_handler>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <write_src@plt>
lea    0xedc(%rip),%rdi
call   1030 <write_src@plt>
lea    0xee2(%rip),%rdi
call   1030 <write_src@plt>
lea    0xee8(%rip),%rdi
call   1030 <write_src@plt>
lea    0xee8(%rip),%rdi
call   1030 <write_src@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_handler>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <write_src@plt>
lea    0xedf(%rip),%rdi
call   1030 <write_src@plt>
lea    0xee5(%rip),%rdi
call   1030 <write_src@plt>
lea    0xeeb(%rip),%rdi
call   1030 <write_src@plt>
lea    0xeeb(%rip),%rdi
pop    %rax
jmp    1030 <write_src@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"{\0A\00"
@.str.1 = [18 x i8] c"imm_t b = POP();\0A\00"
@.str.2 = [18 x i8] c"imm_t a = POP();\0A\00"
@.str.3 = [12 x i8] c"PUSH(a+b);\0A\00"
@.str.4 = [3 x i8] c"}\0A\00"
define void @add_handler() {
%1 = call i32 @write_src(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @write_src(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @write_src(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @write_src(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.3, i64 0, i64 0))
%5 = call i32 @write_src(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.4, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"{\0A\00"
@.str.1 = [18 x i8] c"imm_t b = POP();\0A\00"
@.str.2 = [18 x i8] c"imm_t a = POP();\0A\00"
@.str.3 = [12 x i8] c"PUSH(a+b);\0A\00"
@.str.4 = [3 x i8] c"}\0A\00"
define void @add_handler() {
%1 = tail call i32 @write_src(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @write_src(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @write_src(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @write_src(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.3, i64 0, i64 0))
%5 = tail call i32 @write_src(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.4, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ print_i2c_busses(int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void help(void) {
  fprintf(stderr,
          "Syntax: i2cdump [-y] I2CBUS ADDRESS [MODE] [BANK "
          "[BANKREG]]\n"
          "        i2cdump -V\n"
          "  MODE is 'b[yte]', 'w[ord]', 's[mbusblock], 'i[2cblock]',\n"
          "       or 'c[onsecutive byte address mode]' (default b)\n"
          "  Append MODE with 'p' for PEC checking\n"
          "  I2CBUS is an integer\n"
          "  ADDRESS is an integer 0x00 - 0x7f\n"
          "  BANK and BANKREG are for byte and word accesses (default "
          "bank 0, reg 0x4e)\n"
          "  BANK is the command for smbusblock accesses (default 0)\n");
  print_i2c_busses(0);
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
xor    %edi,%edi
call   1030 <print_i2c_busses@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<help>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1040 <fprintf@plt>
xor    %edi,%edi
pop    %rax
jmp    1030 <print_i2c_busses@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [429 x i8] c"Syntax: i2cdump [-y] I2CBUS ADDRESS [MODE] [BANK [BANKREG]]\0A i2cdump -V\0A MODE is 'b[yte]', 'w[ord]', 's[mbusblock], 'i[2cblock]',\0A or 'c[onsecutive byte address mode]' (default b)\0A Append MODE with 'p' for PEC checking\0A I2CBUS is an integer\0A ADDRESS is an integer 0x00 - 0x7f\0A BANK and BANKREG are for byte and word accesses (default bank 0, reg 0x4e)\0A BANK is the command for smbusblock accesses (default 0)\0A\00"
define void @help() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([429 x i8], [429 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @print_i2c_busses(i32 0)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [429 x i8] c"Syntax: i2cdump [-y] I2CBUS ADDRESS [MODE] [BANK [BANKREG]]\0A i2cdump -V\0A MODE is 'b[yte]', 'w[ord]', 's[mbusblock], 'i[2cblock]',\0A or 'c[onsecutive byte address mode]' (default b)\0A Append MODE with 'p' for PEC checking\0A I2CBUS is an integer\0A ADDRESS is an integer 0x00 - 0x7f\0A BANK and BANKREG are for byte and word accesses (default bank 0, reg 0x4e)\0A BANK is the command for smbusblock accesses (default 0)\0A\00"
define void @help() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([429 x i8], [429 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @print_i2c_busses(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ a();
int main() { a(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <a@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <a@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @a()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @a()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ arm_data_regr_op();
int /*<<< orphan*/ arm_logic_teq(int /*<<< orphan*/);
void arm_teq_regr() { arm_logic_teq(arm_data_regr_op()); }


x86 assembly (clang, -O0):
<arm_teq_regr>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <arm_data_regr_op@plt>
mov    %eax,%edi
call   1040 <arm_logic_teq@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm_teq_regr>:
push   %rax
xor    %eax,%eax
call   1030 <arm_data_regr_op@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <arm_logic_teq@plt>

LLVM IR (-O0):
define void @arm_teq_regr() {
%1 = call i32 (...) @arm_data_regr_op()
%2 = call i32 @arm_logic_teq(i32 %1)
ret void
}

LLVM IR (-O2):
define void @arm_teq_regr() {
%1 = tail call i32 (...) @arm_data_regr_op()
%2 = tail call i32 @arm_logic_teq(i32 %1)
ret void
}
/* Variables and functions */
int hex(int);
int sqrt(int);
int invhex(int H) {
  int n = 1 + sqrt(1 + (8 * H));
  n /= 4;
  if (hex(n) == H) {
    return n;
  }
  return 0;
}


x86 assembly (clang, -O0):
<invhex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
shl    $0x3,%edi
add    $0x1,%edi
call   1030 <sqrt@plt>
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <hex@plt>
cmp    -0x8(%rbp),%eax
jne    1169 <invhex+0x49>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1170 <invhex+0x50>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<invhex>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%r14d
lea    0x1(,%r14,8),%edi
call   1030 <sqrt@plt>
mov    %eax,%ebx
lea    0x1(%rbx),%eax
add    $0x4,%ebx
test   %eax,%eax
cmovns %eax,%ebx
sar    $0x2,%ebx
mov    %ebx,%edi
call   1040 <hex@plt>
xor    %ecx,%ecx
cmp    %r14d,%eax
cmove  %ebx,%ecx
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @invhex(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = mul nsw i32 8, %5
%7 = add nsw i32 1, %6
%8 = call i32 @sqrt(i32 %7)
%9 = add nsw i32 1, %8
store i32 %9, i32* %4
%10 = load i32, i32* %4
%11 = sdiv i32 %10, 4
store i32 %11, i32* %4
%12 = load i32, i32* %4
%13 = call i32 @hex(i32 %12)
%14 = load i32, i32* %3
%15 = icmp eq i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %1
%17 = load i32, i32* %4
store i32 %17, i32* %2
br label %19
18: ; preds = %1
store i32 0, i32* %2
br label %19
19: ; preds = %18, %16
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @invhex(i32 %0) {
%2 = shl nsw i32 %0, 3
%3 = or i32 %2, 1
%4 = tail call i32 @sqrt(i32 %3)
%5 = add nsw i32 %4, 1
%6 = sdiv i32 %5, 4
%7 = tail call i32 @hex(i32 %6)
%8 = icmp eq i32 %7, %0
%9 = select i1 %8, i32 %6, i32 0
ret i32 %9
}
/* Variables and functions */
double _now_time();
double getCurrentTime(void) { return _now_time() / 1.0e+6; }


x86 assembly (clang, -O0):
<getCurrentTime>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_now_time@plt>
movsd  0xedd(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<getCurrentTime>:
push   %rax
xor    %eax,%eax
call   1030 <_now_time@plt>
divsd  0xee0(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @getCurrentTime() {
%1 = call double (...) @_now_time()
%2 = fdiv double %1, 1.000000e+06
ret double %2
}

LLVM IR (-O2):
define double @getCurrentTime() {
%1 = tail call double (...) @_now_time()
%2 = fdiv double %1, 1.000000e+06
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ __memcpy(void *, void const *, int);
__attribute__((always_)) void memcpy_toio(volatile void *dst, const void *src,
                                          int count) {
  __memcpy((void *)dst, src, count);
}


x86 assembly (clang, -O0):
<memcpy_toio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <__memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcpy_toio>:
jmp    1030 <__memcpy@plt>

LLVM IR (-O0):
define void @memcpy_toio(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @__memcpy(i8* %7, i8* %8, i32 %9)
ret void
}

LLVM IR (-O2):
define void @memcpy_toio(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @__memcpy(i8* %0, i8* %1, i32 %2)
ret void
}
/* Type definitions */
struct vec3 {
  int dummy;
};

/* Variables and functions */
int vec3_is_near_zero(float *, float);
__attribute__((always_)) bool psvec3_is_near_zero(struct vec3 *a,
                                                  float epsilon) {
  return vec3_is_near_zero((float *)a, epsilon);
}


x86 assembly (clang, -O0):
<psvec3_is_near_zero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
movss  -0xc(%rbp),%xmm0
call   1030 <vec3_is_near_zero@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec3_is_near_zero>:
jmp    1030 <vec3_is_near_zero@plt>

LLVM IR (-O0):
%struct.vec3 = type { i32 }
define i32 @psvec3_is_near_zero(%struct.vec3* %0, float %1) {
%3 = alloca %struct.vec3*
%4 = alloca float
store %struct.vec3* %0, %struct.vec3** %3
store float %1, float* %4
%5 = load %struct.vec3*, %struct.vec3** %3
%6 = bitcast %struct.vec3* %5 to float*
%7 = load float, float* %4
%8 = call i32 @vec3_is_near_zero(float* %6, float %7)
ret i32 %8
}

LLVM IR (-O2):
%struct.vec3 = type { i32 }
define i32 @psvec3_is_near_zero(%struct.vec3* %0, float %1) {
%3 = bitcast %struct.vec3* %0 to float*
%4 = tail call i32 @vec3_is_near_zero(float* %3, float %1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
double recu(int /*<<< orphan*/, int);
int /*<<< orphan*/ scanf(char *, int *);
int main(int argc, const char *argv[]) {
  int n;
  scanf("%d", &n);
  printf("%.6f\n", recu(0, n));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeb3(%rip),%rdi
lea    -0x14(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x14(%rbp),%esi
xor    %edi,%edi
call   1050 <recu@plt>
lea    0xe9c(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%esi
xor    %edi,%edi
call   1050 <recu@plt>
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [6 x i8] c"%.6f\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %6)
%8 = load i32, i32* %6
%9 = call double @recu(i32 0, i32 %8)
%10 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), double %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [6 x i8] c"%.6f\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %3)
%6 = load i32, i32* %3
%7 = call double @recu(i32 0, i32 %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), double %7)
ret i32 0
}
int test_imm_3Fint64_lowword_mem(long long *val) {
  return ((*val) & (0x3F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Fint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x3f,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Fint64_lowword_mem>:
testb  $0x3f,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Fint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 63
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_3Fint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 63
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int test_imm_29uint16_reg(unsigned short val) {
  return ((val) & (0x29 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_29uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x29,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_29uint16_reg>:
test   $0x29,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_29uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 41
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_29uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 41
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ lookup_clear();
__attribute__((visibility("default"))) void louis_clear_tables(void) {
  lookup_clear();
}


x86 assembly (clang, -O0):
<louis_clear_tables>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <lookup_clear@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<louis_clear_tables>:
xor    %eax,%eax
jmp    1030 <lookup_clear@plt>

LLVM IR (-O0):
define void @louis_clear_tables() {
%1 = call i32 (...) @lookup_clear()
ret void
}

LLVM IR (-O2):
define void @louis_clear_tables() {
%1 = tail call i32 (...) @lookup_clear()
ret void
}
void mlx5_sf_dev_table_create(struct mlx5_core_dev *dev) {}


x86 assembly (clang, -O0):
<mlx5_sf_dev_table_create>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mlx5_sf_dev_table_create>:
ret

LLVM IR (-O0):
%struct.mlx5_core_dev = type opaque
define void @mlx5_sf_dev_table_create(%struct.mlx5_core_dev* %0) {
%2 = alloca %struct.mlx5_core_dev*
store %struct.mlx5_core_dev* %0, %struct.mlx5_core_dev** %2
ret void
}

LLVM IR (-O2):
%struct.mlx5_core_dev = type opaque
define void @mlx5_sf_dev_table_create(%struct.mlx5_core_dev* nocapture %0) {
ret void
}
/* Variables and functions */
int sqrt(int);
int main() { return sqrt(16); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x10,%edi
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x10,%edi
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @sqrt(i32 16)
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @sqrt(i32 16)
ret i32 %1
}
/* Variables and functions */
int tuner_deselect(void *, unsigned short);
int bbm_com_tuner_deselect(void *handle, unsigned short devid) {
  int res;
  res = tuner_deselect(handle, devid);
  return res;
}


x86 assembly (clang, -O0):
<bbm_com_tuner_deselect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
movzwl -0xa(%rbp),%esi
call   1030 <tuner_deselect@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bbm_com_tuner_deselect>:
jmp    1030 <tuner_deselect@plt>

LLVM IR (-O0):
define i32 @bbm_com_tuner_deselect(i8* %0, i16 zeroext %1) {
%3 = alloca i8*
%4 = alloca i16
%5 = alloca i32
store i8* %0, i8** %3
store i16 %1, i16* %4
%6 = load i8*, i8** %3
%7 = load i16, i16* %4
%8 = call i32 @tuner_deselect(i8* %6, i16 zeroext %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @bbm_com_tuner_deselect(i8* %0, i16 zeroext %1) {
%3 = tail call i32 @tuner_deselect(i8* %0, i16 zeroext %1)
ret i32 %3
}
int main() {
  int *p;
  char *q;
  f(p);
  f(q);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <f@plt>
mov    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1030 <f@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <f@plt>
xor    %eax,%eax
call   1030 <f@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32*
%2 = alloca i8*
%3 = load i32*, i32** %1
%4 = call i32 (i32*, ...) bitcast (i32 (...)* @f to i32 (i32*, ...)*)(i32* %3)
%5 = load i8*, i8** %2
%6 = call i32 (i8*, ...) bitcast (i32 (...)* @f to i32 (i8*, ...)*)(i8* %5)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (i32*, ...) bitcast (i32 (...)* @f to i32 (i32*, ...)*)(i32* undef)
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @f to i32 (i8*, ...)*)(i8* undef)
ret i32 0
}
unsigned xrop3_39_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = T ^ S;
  stk3 = ~stk3;
  stk2 = D | stk3;
  stk1 = S ^ stk2;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_39_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_39_1_0>:
mov    %edi,%eax
shl    $0x8,%eax
shl    $0x8,%esi
xor    %eax,%esi
or     %edi,%eax
or     %esi,%eax
not    %eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_39_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
%24 = load i32, i32* %6
%25 = xor i32 %23, %24
store i32 %25, i32* %10
%26 = load i32, i32* %10
%27 = xor i32 %26, -1
store i32 %27, i32* %10
%28 = load i32, i32* %5
%29 = load i32, i32* %10
%30 = or i32 %28, %29
store i32 %30, i32* %9
%31 = load i32, i32* %6
%32 = load i32, i32* %9
%33 = xor i32 %31, %32
store i32 %33, i32* %8
%34 = load i32, i32* %8
%35 = load i32, i32* %6
%36 = xor i32 %35, -1
%37 = and i32 %34, %36
%38 = load i32, i32* %5
%39 = load i32, i32* %6
%40 = and i32 %38, %39
%41 = or i32 %37, %40
ret i32 %41
}

LLVM IR (-O2):
define i32 @xrop3_39_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = or i32 %4, %3
%6 = zext i8 %1 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = xor i32 %7, %4
%9 = or i32 %5, %8
%10 = xor i32 %9, -1
%11 = or i32 %10, %3
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ write_imm(int);
int /*<<< orphan*/ write_instr(int);
int f4_handler(char **save) {
  write_instr(0x00);
  write_imm(0x3D);
  write_instr(0x28);
  return 0;
}


x86 assembly (clang, -O0):
<f4_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
call   1040 <write_instr@plt>
mov    $0x3d,%edi
call   1030 <write_imm@plt>
mov    $0x28,%edi
call   1040 <write_instr@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4_handler>:
push   %rax
xor    %edi,%edi
call   1040 <write_instr@plt>
mov    $0x3d,%edi
call   1030 <write_imm@plt>
mov    $0x28,%edi
call   1040 <write_instr@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @f4_handler(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = call i32 @write_instr(i32 0)
%4 = call i32 @write_imm(i32 61)
%5 = call i32 @write_instr(i32 40)
ret i32 0
}

LLVM IR (-O2):
define i32 @f4_handler(i8** nocapture readnone %0) {
%2 = tail call i32 @write_instr(i32 0)
%3 = tail call i32 @write_imm(i32 61)
%4 = tail call i32 @write_instr(i32 40)
ret i32 0
}