xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
char *strndup(char const *, size_t);
char *xstrndup(const char *s, size_t n) {
  char *ret;
  ret = strndup(s, n);
  if (!ret)
    perror("strndup");
  return (ret);
}


x86 assembly (clang, -O0):
<xstrndup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strndup@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1158 <xstrndup+0x38>
lea    0xead(%rip),%rdi
call   1040 <perror@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrndup>:
push   %rbx
call   1030 <strndup@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1133 <xstrndup+0x13>
mov    %rbx,%rax
pop    %rbx
ret
lea    0xec6(%rip),%rdi
call   1040 <perror@plt>
jmp    112e <xstrndup+0xe>

LLVM IR (-O0):
@.str = [8 x i8] c"strndup\00"
define i8* @xstrndup(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @strndup(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %13, label %11
11: ; preds = %2
%12 = call i32 @perror(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %2
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
@.str = [8 x i8] c"strndup\00"
define noalias i8* @xstrndup(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @strndup(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @perror(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret i8* %3
}
/* Variables and functions */
void(Memento_breakOnRealloc)(void *a) {}


x86 assembly (clang, -O0):
<Memento_breakOnRealloc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Memento_breakOnRealloc>:
ret

LLVM IR (-O0):
define void @Memento_breakOnRealloc(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @Memento_breakOnRealloc(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int randomized_PARTITION(int *, int, int);
void RANDOMIZED_QUICKSORT(int A[], int p, int r) {
  if (p < r) {
    int q = randomized_PARTITION(A, p, r);
    RANDOMIZED_QUICKSORT(A, p, q - 1);
    RANDOMIZED_QUICKSORT(A, q + 1, r);
  }
}


x86 assembly (clang, -O0):
<RANDOMIZED_QUICKSORT>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <RANDOMIZED_QUICKSORT+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <randomized_PARTITION@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <RANDOMIZED_QUICKSORT@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <RANDOMIZED_QUICKSORT@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RANDOMIZED_QUICKSORT>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <RANDOMIZED_QUICKSORT+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <randomized_PARTITION@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <RANDOMIZED_QUICKSORT@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <RANDOMIZED_QUICKSORT+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @RANDOMIZED_QUICKSORT(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @randomized_PARTITION(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @RANDOMIZED_QUICKSORT(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @randomized_PARTITION(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @RANDOMIZED_QUICKSORT(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf("Usage: gps-sdr-sim [options]\n"
         "Options:\n"
         "  -e <gps_nav>     RINEX navigation file for GPS ephemerides "
         "(required)\n"
         "  -u <user_motion> User motion file (dynamic mode)\n"
         "  -l <location>    Lat,Lon,Hgt (static mode) e.g. "
         "30.286502,120.032669,100\n"
         "  -o <output>      I/Q sampling data file (default: gpssim.bin)\n"
         "  -s <frequency>   Sampling frequency [Hz] (default: 2600000)\n"
         "  -b <iq_bits>     I/Q data format [8/16] (default: 8)\n");
  return;
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [418 x i8] c"Usage: gps-sdr-sim [options]\0AOptions:\0A -e <gps_nav> RINEX navigation file for GPS ephemerides (required)\0A -u <user_motion> User motion file (dynamic mode)\0A -l <location> Lat,Lon,Hgt (static mode) e.g. 30.286502,120.032669,100\0A -o <output> I/Q sampling data file (default: gpssim.bin)\0A -s <frequency> Sampling frequency [Hz] (default: 2600000)\0A -b <iq_bits> I/Q data format [8/16] (default: 8)\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([418 x i8], [418 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [417 x i8] c"Usage: gps-sdr-sim [options]\0AOptions:\0A -e <gps_nav> RINEX navigation file for GPS ephemerides (required)\0A -u <user_motion> User motion file (dynamic mode)\0A -l <location> Lat,Lon,Hgt (static mode) e.g. 30.286502,120.032669,100\0A -o <output> I/Q sampling data file (default: gpssim.bin)\0A -s <frequency> Sampling frequency [Hz] (default: 2600000)\0A -b <iq_bits> I/Q data format [8/16] (default: 8)\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([417 x i8], [417 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
char *r_sys_getenv(char *);
char *spp_var_get(char *var) { return r_sys_getenv(var); }


x86 assembly (clang, -O0):
<spp_var_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <r_sys_getenv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spp_var_get>:
jmp    1030 <r_sys_getenv@plt>

LLVM IR (-O0):
define i8* @spp_var_get(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @r_sys_getenv(i8* %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @spp_var_get(i8* %0) {
%2 = tail call i8* @r_sys_getenv(i8* %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void handler() { printf("Do nothing useful\n"); }


x86 assembly (clang, -O0):
<handler>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<handler>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"Do nothing useful\0A\00"
define void @handler() {
%1 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [18 x i8] c"Do nothing useful\00"
define void @handler() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0))
ret void
}
int sys_sw_sched() { return 0; }


x86 assembly (clang, -O0):
<sys_sw_sched>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_sw_sched>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sys_sw_sched() {
ret i32 0
}

LLVM IR (-O2):
define i32 @sys_sw_sched() {
ret i32 0
}
int VBound(int x, int high, int low) {
  if (x < low)
    x = low;
  else if (x > high)
    x = high;
  return x;
}


x86 assembly (clang, -O0):
<VBound>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1124 <VBound+0x24>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    113b <VBound+0x3b>
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1136 <VBound+0x36>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    113b <VBound+0x3b>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<VBound>:
mov    %esi,%eax
cmp    %esi,%edi
cmovle %edi,%eax
cmp    %edx,%edi
cmovl  %edx,%eax
ret

LLVM IR (-O0):
define i32 @VBound(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %6
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load i32, i32* %6
store i32 %11, i32* %4
br label %19
12: ; preds = %3
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = icmp sgt i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load i32, i32* %5
store i32 %17, i32* %4
br label %18
18: ; preds = %16, %12
br label %19
19: ; preds = %18, %10
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @VBound(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, %2
%5 = icmp sgt i32 %0, %1
%6 = select i1 %5, i32 %1, i32 %0
%7 = select i1 %4, i32 %2, i32 %6
ret i32 %7
}
/* Variables and functions */
scalar_t__ gethostname(char *, int);
char const *get_hostname(void) {
  static char ret[255];
  if (gethostname(ret, 255)) {
    return NULL;
  }
  return ret;
}


x86 assembly (clang, -O0):
<get_hostname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0x2f21(%rip),%rdi
mov    $0xff,%esi
call   1030 <gethostname@plt>
cmp    $0x0,%rax
je     1140 <get_hostname+0x30>
movq   $0x0,-0x8(%rbp)
jmp    114b <get_hostname+0x3b>
lea    0x2ef9(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_hostname>:
push   %rbx
lea    0x2f28(%rip),%rbx
mov    %rbx,%rdi
mov    $0xff,%esi
call   1030 <gethostname@plt>
xor    %ecx,%ecx
test   %rax,%rax
cmove  %rbx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@get_hostname.ret = internal global [255 x i8] zeroinitializer
define i8* @get_hostname() {
%1 = alloca i8*
%2 = call i64 @gethostname(i8* getelementptr inbounds ([255 x i8], [255 x i8]* @get_hostname.ret, i64 0, i64 0), i32 255)
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
store i8* null, i8** %1
br label %6
5: ; preds = %0
store i8* getelementptr inbounds ([255 x i8], [255 x i8]* @get_hostname.ret, i64 0, i64 0), i8** %1
br label %6
6: ; preds = %5, %4
%7 = load i8*, i8** %1
ret i8* %7
}

LLVM IR (-O2):
@get_hostname.ret = internal global [255 x i8] zeroinitializer
define i8* @get_hostname() {
%1 = tail call i64 @gethostname(i8* getelementptr inbounds ([255 x i8], [255 x i8]* @get_hostname.ret, i64 0, i64 0), i32 255)
%2 = icmp eq i64 %1, 0
%3 = select i1 %2, i8* getelementptr inbounds ([255 x i8], [255 x i8]* @get_hostname.ret, i64 0, i64 0), i8* null
ret i8* %3
}
/* Variables and functions */
int libB_func_impl();
int libB_func(void) { return libB_func_impl(); }


x86 assembly (clang, -O0):
<libB_func>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <libB_func_impl@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<libB_func>:
xor    %eax,%eax
jmp    1030 <libB_func_impl@plt>

LLVM IR (-O0):
define i32 @libB_func() {
%1 = call i32 (...) @libB_func_impl()
ret i32 %1
}

LLVM IR (-O2):
define i32 @libB_func() {
%1 = tail call i32 (...) @libB_func_impl()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ initKeyboardGPIOPins();
void C64Keyboard_init() { initKeyboardGPIOPins(); }


x86 assembly (clang, -O0):
<C64Keyboard_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <initKeyboardGPIOPins@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<C64Keyboard_init>:
xor    %eax,%eax
jmp    1030 <initKeyboardGPIOPins@plt>

LLVM IR (-O0):
define void @C64Keyboard_init() {
%1 = call i32 (...) @initKeyboardGPIOPins()
ret void
}

LLVM IR (-O2):
define void @C64Keyboard_init() {
%1 = tail call i32 (...) @initKeyboardGPIOPins()
ret void
}
void FTMR3CancelStandby(void) {}


x86 assembly (clang, -O0):
<FTMR3CancelStandby>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FTMR3CancelStandby>:
ret

LLVM IR (-O0):
define void @FTMR3CancelStandby() {
ret void
}

LLVM IR (-O2):
define void @FTMR3CancelStandby() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;
struct option_w {
  int dummy;
};

/* Variables and functions */
int _getopt_internal_w(int, int /*<<< orphan*/ *const *,
                       int /*<<< orphan*/ const *, struct option_w const *,
                       int *, int /*<<< orphan*/, int /*<<< orphan*/);
int getopt_w(int argc, wchar_t *const *argv, const wchar_t *optstring) {
  return _getopt_internal_w(argc, argv, optstring, (const struct option_w *)0,
                            (int *)0, 0, 0);
}


x86 assembly (clang, -O0):
<getopt_w>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %eax,%eax
mov    %eax,%r8d
xor    %r9d,%r9d
mov    %r8,%rcx
movl   $0x0,(%rsp)
call   1030 <_getopt_internal_w@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getopt_w>:
push   %rax
movl   $0x0,(%rsp)
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
call   1030 <_getopt_internal_w@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.option_w = type { i32 }
define i32 @getopt_w(i32 %0, i32** %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32**
%6 = alloca i32*
store i32 %0, i32* %4
store i32** %1, i32*** %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = load i32**, i32*** %5
%9 = load i32*, i32** %6
%10 = call i32 @_getopt_internal_w(i32 %7, i32** %8, i32* %9, %struct.option_w* null, i32* null, i32 0, i32 0)
ret i32 %10
}

LLVM IR (-O2):
%struct.option_w = type { i32 }
define i32 @getopt_w(i32 %0, i32** %1, i32* %2) {
%4 = tail call i32 @_getopt_internal_w(i32 %0, i32** %1, i32* %2, %struct.option_w* null, i32* null, i32 0, i32 0)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ O_RDONLY;
int open(char const *, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
int readfile_init(const char *filename) {
  int fd;
  fd = open(filename, O_RDONLY);
  if (fd < 0)
    perror("open");
  return (fd);
}


x86 assembly (clang, -O0):
<readfile_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
call   1030 <open@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    1157 <readfile_init+0x37>
lea    0xeae(%rip),%rdi
call   1040 <perror@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readfile_init>:
push   %rbx
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
call   1030 <open@plt>
mov    %eax,%ebx
test   %eax,%eax
js     1139 <readfile_init+0x19>
mov    %ebx,%eax
pop    %rbx
ret
lea    0xec0(%rip),%rdi
call   1040 <perror@plt>
jmp    1135 <readfile_init+0x15>

LLVM IR (-O0):
@O_RDONLY = global i32 0
@.str = [5 x i8] c"open\00"
define i32 @readfile_init(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = load i32, i32* @O_RDONLY
%6 = call i32 @open(i8* %4, i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp slt i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = call i32 @perror(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %1
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
@O_RDONLY = global i32 0
@.str = [5 x i8] c"open\00"
define i32 @readfile_init(i8* nocapture %0) {
%2 = load i32, i32* @O_RDONLY
%3 = tail call i32 @open(i8* %0, i32 %2)
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @perror(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %1
ret i32 %3
}
char *GetConfiguration() { return "Unrecognized configuration"; }


x86 assembly (clang, -O0):
<GetConfiguration>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetConfiguration>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [27 x i8] c"Unrecognized configuration\00"
define i8* @GetConfiguration() {
ret i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [27 x i8] c"Unrecognized configuration\00"
define i8* @GetConfiguration() {
ret i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0)
}
void gpio_ata_active(void) {}


x86 assembly (clang, -O0):
<gpio_ata_active>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_ata_active>:
ret

LLVM IR (-O0):
define void @gpio_ata_active() {
ret void
}

LLVM IR (-O2):
define void @gpio_ata_active() {
ret void
}
void RandomFunc(unsigned short input[1], unsigned short output[1]) {
  unsigned short state[1];
  unsigned short local1;
  {
    state[0UL] = input[0UL] + (unsigned short)2885;
    local1 = 0UL;
    while (local1 < 1UL) {
      state[local1] *= state[local1];
      local1 += 2UL;
    }
    output[0UL] = state[0UL] * 809088178UL;
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%eax
add    $0xb45,%eax
mov    %ax,-0x12(%rbp)
movw   $0x0,-0x14(%rbp)
movzwl -0x14(%rbp),%eax
cmp    $0x1,%rax
jae    115b <RandomFunc+0x5b>
movzwl -0x14(%rbp),%eax
movzwl -0x12(%rbp,%rax,2),%edx
movzwl -0x14(%rbp),%eax
movzwl -0x12(%rbp,%rax,2),%ecx
imul   %edx,%ecx
mov    %cx,-0x12(%rbp,%rax,2)
movzwl -0x14(%rbp),%eax
add    $0x2,%rax
mov    %ax,-0x14(%rbp)
jmp    1122 <RandomFunc+0x22>
movzwl -0x12(%rbp),%eax
imul   $0x3039b4b2,%rax,%rax
mov    %ax,%cx
mov    -0x10(%rbp),%rax
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
movzwl (%rdi),%eax
add    $0xb45,%eax
imul   %eax,%eax
imul   $0xffffb4b2,%eax,%eax
mov    %ax,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i16* %0, i16* %1) {
%3 = alloca i16*
%4 = alloca i16*
%5 = alloca [1 x i16]
%6 = alloca i16
store i16* %0, i16** %3
store i16* %1, i16** %4
%7 = load i16*, i16** %3
%8 = getelementptr inbounds i16, i16* %7, i64 0
%9 = load i16, i16* %8
%10 = zext i16 %9 to i32
%11 = add nsw i32 %10, 2885
%12 = trunc i32 %11 to i16
%13 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 0
store i16 %12, i16* %13
store i16 0, i16* %6
br label %14
14: ; preds = %18, %2
%15 = load i16, i16* %6
%16 = zext i16 %15 to i64
%17 = icmp ult i64 %16, 1
br i1 %17, label %18, label %35
18: ; preds = %14
%19 = load i16, i16* %6
%20 = zext i16 %19 to i64
%21 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 %20
%22 = load i16, i16* %21
%23 = zext i16 %22 to i32
%24 = load i16, i16* %6
%25 = zext i16 %24 to i64
%26 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 %25
%27 = load i16, i16* %26
%28 = zext i16 %27 to i32
%29 = mul nsw i32 %28, %23
%30 = trunc i32 %29 to i16
store i16 %30, i16* %26
%31 = load i16, i16* %6
%32 = zext i16 %31 to i64
%33 = add i64 %32, 2
%34 = trunc i64 %33 to i16
store i16 %34, i16* %6
br label %14
35: ; preds = %14
%36 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 0
%37 = load i16, i16* %36
%38 = zext i16 %37 to i64
%39 = mul i64 %38, 809088178
%40 = trunc i64 %39 to i16
%41 = load i16*, i16** %4
%42 = getelementptr inbounds i16, i16* %41, i64 0
store i16 %40, i16* %42
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i16* nocapture %0, i16* nocapture writeonly %1) {
%3 = load i16, i16* %0
%4 = add i16 %3, 2885
%5 = mul i16 %4, -19278
%6 = mul i16 %5, %4
store i16 %6, i16* %1
ret void
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
void *lsmash_malloc_zero(size_t size) {
  if (!size)
    return NULL;
  void *p = malloc(size);
  if (!p)
    return NULL;
  memset(p, 0, size);
  return p;
}


x86 assembly (clang, -O0):
<lsmash_malloc_zero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1144 <lsmash_malloc_zero+0x24>
movq   $0x0,-0x8(%rbp)
jmp    1180 <lsmash_malloc_zero+0x60>
mov    -0x10(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1169 <lsmash_malloc_zero+0x49>
movq   $0x0,-0x8(%rbp)
jmp    1180 <lsmash_malloc_zero+0x60>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lsmash_malloc_zero>:
push   %r14
push   %rbx
push   %rax
test   %rdi,%rdi
je     1148 <lsmash_malloc_zero+0x28>
mov    %rdi,%rbx
call   1040 <malloc@plt>
test   %rax,%rax
je     1148 <lsmash_malloc_zero+0x28>
mov    %rax,%r14
mov    %rax,%rdi
xor    %esi,%esi
mov    %rbx,%rdx
call   1030 <memset@plt>
jmp    114b <lsmash_malloc_zero+0x2b>
xor    %r14d,%r14d
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @lsmash_malloc_zero(i64 %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
%5 = load i64, i64* %3
%6 = icmp ne i64 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i8* null, i8** %2
br label %19
8: ; preds = %1
%9 = load i64, i64* %3
%10 = call i8* @malloc(i64 %9)
store i8* %10, i8** %4
%11 = load i8*, i8** %4
%12 = icmp ne i8* %11, null
br i1 %12, label %14, label %13
13: ; preds = %8
store i8* null, i8** %2
br label %19
14: ; preds = %8
%15 = load i8*, i8** %4
%16 = load i64, i64* %3
%17 = call i32 @memset(i8* %15, i32 0, i64 %16)
%18 = load i8*, i8** %4
store i8* %18, i8** %2
br label %19
19: ; preds = %14, %13, %7
%20 = load i8*, i8** %2
ret i8* %20
}

LLVM IR (-O2):
define i8* @lsmash_malloc_zero(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = tail call i8* @malloc(i64 %0)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @memset(i8* %4, i32 0, i64 %0)
br label %8
8: ; preds = %6, %3, %1
%9 = phi i8* [ null, %1 ], [ %4, %6 ], [ null, %3 ]
ret i8* %9
}
/* Variables and functions */
int /*<<< orphan*/ __itt_thread_set_name_init_3_0(char const *);
int __itt_thr_name_set_init_3_0(const char *name, int namelen) {
  (void)namelen;
  __itt_thread_set_name_init_3_0(name);
  return 0;
}


x86 assembly (clang, -O0):
<__itt_thr_name_set_init_3_0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__itt_thread_set_name_init_3_0@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__itt_thr_name_set_init_3_0>:
push   %rax
call   1030 <__itt_thread_set_name_init_3_0@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @__itt_thr_name_set_init_3_0(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = call i32 @__itt_thread_set_name_init_3_0(i8* %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @__itt_thr_name_set_init_3_0(i8* %0, i32 %1) {
%3 = tail call i32 @__itt_thread_set_name_init_3_0(i8* %0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fun(int);
int main(void) {
  fun(2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x2,%edi
call   1030 <fun@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2,%edi
call   1030 <fun@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @fun(i32 2)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @fun(i32 2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void OS_HP_UX_print() { printf("HP-UX - Hewlett Packard\n"); }


x86 assembly (clang, -O0):
<OS_HP_UX_print>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<OS_HP_UX_print>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"HP-UX - Hewlett Packard\0A\00"
define void @OS_HP_UX_print() {
%1 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [24 x i8] c"HP-UX - Hewlett Packard\00"
define void @OS_HP_UX_print() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str, i64 0, i64 0))
ret void
}
void GPIOIdleModeConfigure(unsigned int baseAdd, unsigned int modeFlag) {
  (*((volatile unsigned int *)(baseAdd + (0x10)))) &= ~((0x00000018u));
  (*((volatile unsigned int *)(baseAdd + (0x10)))) |=
      (modeFlag & (0x00000018u));
}


x86 assembly (clang, -O0):
<GPIOIdleModeConfigure>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xffffffe7,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%edx
and    $0x18,%edx
mov    -0x4(%rbp),%eax
add    $0x10,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOIdleModeConfigure>:
add    $0x10,%edi
andl   $0xffffffe7,(%rdi)
and    $0x18,%esi
or     %esi,(%rdi)
ret

LLVM IR (-O0):
define void @GPIOIdleModeConfigure(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add i32 %5, 16
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, -25
store volatile i32 %10, i32* %8
%11 = load i32, i32* %4
%12 = and i32 %11, 24
%13 = load i32, i32* %3
%14 = add i32 %13, 16
%15 = zext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
%17 = load volatile i32, i32* %16
%18 = or i32 %17, %12
store volatile i32 %18, i32* %16
ret void
}

LLVM IR (-O2):
define void @GPIOIdleModeConfigure(i32 %0, i32 %1) {
%3 = add i32 %0, 16
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, -25
store volatile i32 %7, i32* %5
%8 = and i32 %1, 24
%9 = load volatile i32, i32* %5
%10 = or i32 %9, %8
store volatile i32 %10, i32* %5
ret void
}
void sys_setmiditimediff(double inbuftime, double outbuftime) {}


x86 assembly (clang, -O0):
<sys_setmiditimediff>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_setmiditimediff>:
ret

LLVM IR (-O0):
define void @sys_setmiditimediff(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
ret void
}

LLVM IR (-O2):
define void @sys_setmiditimediff(double %0, double %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit1(int /*<<< orphan*/);
int /*<<< orphan*/ write(int, char *, int);
void _start(void) {
  write(1, "Hello World\n", 12);
  exit1(0);
}


x86 assembly (clang, -O0):
<_start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
lea    0xed0(%rip),%rsi
mov    $0xc,%edx
call   1030 <write@plt>
xor    %edi,%edi
call   1040 <exit1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_start>:
push   %rax
lea    0xed8(%rip),%rsi
mov    $0x1,%edi
mov    $0xc,%edx
call   1030 <write@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <exit1@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"Hello World\0A\00"
define void @_start() {
%1 = call i32 @write(i32 1, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 12)
%2 = call i32 @exit1(i32 0)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hello World\0A\00"
define void @_start() {
%1 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 12)
%2 = tail call i32 @exit1(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char);
void combi(char x, char y, char z) {
  ft_putchar(x);
  ft_putchar(y);
  ft_putchar(z);
}


x86 assembly (clang, -O0):
<combi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %sil,%cl
mov    %dil,%dl
mov    %dl,-0x1(%rbp)
mov    %cl,-0x2(%rbp)
mov    %al,-0x3(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <ft_putchar@plt>
movsbl -0x2(%rbp),%edi
call   1030 <ft_putchar@plt>
movsbl -0x3(%rbp),%edi
call   1030 <ft_putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<combi>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebx
mov    %esi,%ebp
call   1030 <ft_putchar@plt>
mov    %ebp,%edi
call   1030 <ft_putchar@plt>
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <ft_putchar@plt>

LLVM IR (-O0):
define void @combi(i8 signext %0, i8 signext %1, i8 signext %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load i8, i8* %4
%8 = call i32 @ft_putchar(i8 signext %7)
%9 = load i8, i8* %5
%10 = call i32 @ft_putchar(i8 signext %9)
%11 = load i8, i8* %6
%12 = call i32 @ft_putchar(i8 signext %11)
ret void
}

LLVM IR (-O2):
define void @combi(i8 signext %0, i8 signext %1, i8 signext %2) {
%4 = tail call i32 @ft_putchar(i8 signext %0)
%5 = tail call i32 @ft_putchar(i8 signext %1)
%6 = tail call i32 @ft_putchar(i8 signext %2)
ret void
}
/* Variables and functions */
double mydeg2rad(double);
double myarcsec2rad(double sec) { return mydeg2rad(sec / 3600.); }


x86 assembly (clang, -O0):
<myarcsec2rad>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xed6(%rip),%xmm1
divsd  %xmm1,%xmm0
call   1030 <mydeg2rad@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<myarcsec2rad>:
divsd  0xee8(%rip),%xmm0
jmp    1030 <mydeg2rad@plt>

LLVM IR (-O0):
define double @myarcsec2rad(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 3.600000e+03
%5 = call double @mydeg2rad(double %4)
ret double %5
}

LLVM IR (-O2):
define double @myarcsec2rad(double %0) {
%2 = fdiv double %0, 3.600000e+03
%3 = tail call double @mydeg2rad(double %2)
ret double %3
}
int is_prime(int n) {
  for (int i = 2; i <= n / 2; ++i)
    if (n % i == 0)
      return 0;
  return 1;
}


x86 assembly (clang, -O0):
<is_prime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
cmp    %ecx,%eax
jg     115b <is_prime+0x5b>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1148 <is_prime+0x48>
movl   $0x0,-0x4(%rbp)
jmp    1162 <is_prime+0x62>
jmp    114d <is_prime+0x4d>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <is_prime+0xe>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_prime>:
mov    $0x1,%eax
cmp    $0x4,%edi
jl     115b <is_prime+0x5b>
mov    %edi,%r8d
shr    $0x1f,%r8d
add    %edi,%r8d
sar    %r8d
cmp    $0x3,%r8d
mov    $0x2,%ecx
mov    $0x2,%r9d
cmovge %r8d,%r9d
xor    %eax,%eax
test   $0x1,%dil
je     115b <is_prime+0x5b>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %ecx,%esi
cmp    %ecx,%r9d
je     1153 <is_prime+0x53>
lea    0x1(%rsi),%ecx
mov    %edi,%eax
cltd
idiv   %ecx
test   %edx,%edx
jne    1140 <is_prime+0x40>
xor    %eax,%eax
cmp    %r8d,%esi
setge  %al
ret

LLVM IR (-O0):
define i32 @is_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 2, i32* %4
br label %5
5: ; preds = %17, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sdiv i32 %7, 2
%9 = icmp sle i32 %6, %8
br i1 %9, label %10, label %20
10: ; preds = %5
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = srem i32 %11, %12
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %10
store i32 0, i32* %2
br label %21
16: ; preds = %10
br label %17
17: ; preds = %16
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %5
20: ; preds = %5
store i32 1, i32* %2
br label %21
21: ; preds = %20, %15
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @is_prime(i32 %0) {
%2 = sdiv i32 %0, 2
%3 = icmp slt i32 %0, 4
br i1 %3, label %18, label %4
4: ; preds = %1
%5 = call i32 @llvm.smax.i32(i32 %2, i32 2)
%6 = and i32 %0, 1
%7 = icmp eq i32 %6, 0
br i1 %7, label %18, label %8
8: ; preds = %4, %12
%9 = phi i32 [ %10, %12 ], [ 2, %4 ]
%10 = add nuw nsw i32 %9, 1
%11 = icmp eq i32 %9, %5
br i1 %11, label %15, label %12
12: ; preds = %8
%13 = srem i32 %0, %10
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %8
15: ; preds = %8, %12
%16 = icmp sge i32 %9, %2
%17 = zext i1 %16 to i32
br label %18
18: ; preds = %15, %4, %1
%19 = phi i32 [ 1, %1 ], [ 0, %4 ], [ %17, %15 ]
ret i32 %19
}
void util_diff_real_time(void *it1, void *it2, double *t) {
  double *t1 = (double *)it1;
  double *t2 = (double *)it2;
  *t = *t2 - *t1;
}


x86 assembly (clang, -O0):
<util_diff_real_time>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x20(%rbp),%rax
subsd  (%rax),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_diff_real_time>:
movsd  (%rsi),%xmm0
subsd  (%rdi),%xmm0
movsd  %xmm0,(%rdx)
ret

LLVM IR (-O0):
define void @util_diff_real_time(i8* %0, i8* %1, double* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca double*
%7 = alloca double*
%8 = alloca double*
store i8* %0, i8** %4
store i8* %1, i8** %5
store double* %2, double** %6
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to double*
store double* %10, double** %7
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to double*
store double* %12, double** %8
%13 = load double*, double** %8
%14 = load double, double* %13
%15 = load double*, double** %7
%16 = load double, double* %15
%17 = fsub double %14, %16
%18 = load double*, double** %6
store double %17, double* %18
ret void
}

LLVM IR (-O2):
define void @util_diff_real_time(i8* nocapture %0, i8* nocapture %1, double* nocapture writeonly %2) {
%4 = bitcast i8* %0 to double*
%5 = bitcast i8* %1 to double*
%6 = load double, double* %5
%7 = load double, double* %4
%8 = fsub double %6, %7
store double %8, double* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_parser_sourcefile(char *, char *);
int /*<<< orphan*/ test_parser_verify_parse(int /*<<< orphan*/, char *, char *,
                                            char *, int /*<<< orphan*/);
void test_dcl_input_line() {
  test_parser_verify_parse(test_parser_sourcefile("dcl", "input"), "dcl",
                           "input", "", 0);
}


x86 assembly (clang, -O0):
<test_dcl_input_line>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xed2(%rip),%rsi
call   1030 <test_parser_sourcefile@plt>
mov    %eax,%edi
lea    0xec0(%rip),%rsi
lea    0xebd(%rip),%rdx
lea    0xeb5(%rip),%rcx
xor    %r8d,%r8d
call   1040 <test_parser_verify_parse@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_dcl_input_line>:
push   %r14
push   %rbx
push   %rax
lea    0xed5(%rip),%rbx
lea    0xed2(%rip),%r14
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <test_parser_sourcefile@plt>
lea    0xebf(%rip),%rcx
mov    %eax,%edi
mov    %rbx,%rsi
mov    %r14,%rdx
xor    %r8d,%r8d
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <test_parser_verify_parse@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"dcl\00"
@.str.1 = [6 x i8] c"input\00"
@.str.2 = [1 x i8] zeroinitializer
define void @test_dcl_input_line() {
%1 = call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%2 = call i32 @test_parser_verify_parse(i32 %1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i32 0)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"dcl\00"
@.str.1 = [6 x i8] c"input\00"
@.str.2 = [1 x i8] zeroinitializer
define void @test_dcl_input_line() {
%1 = tail call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @test_parser_verify_parse(i32 %1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i32 0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t image_read_u32(uintptr_t base, uintptr_t offset) {
  return *(uint32_t *)(base + offset);
}


x86 assembly (clang, -O0):
<image_read_u32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<image_read_u32>:
mov    (%rsi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @image_read_u32(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = add i64 %5, %6
%8 = inttoptr i64 %7 to i32*
%9 = load i32, i32* %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @image_read_u32(i64 %0, i64 %1) {
%3 = add i64 %1, %0
%4 = inttoptr i64 %3 to i32*
%5 = load i32, i32* %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ array_print(int *, int);
int /*<<< orphan*/ int_sort(int *, int);
int /*<<< orphan*/ memcpy(int *, int *, int);
void sorted_array_print(int *arr, int n) {
  int sorted[n];
  memcpy(sorted, arr, n * sizeof(int));
  int_sort(sorted, n);
  array_print(sorted, n);
}


x86 assembly (clang, -O0):
<sorted_array_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x18(%rbp)
lea    0xf(,%rax,4),%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rdi
sub    %rcx,%rdi
mov    %rdi,-0x28(%rbp)
mov    %rdi,%rsp
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rsi
movslq -0xc(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edx
call   1040 <memcpy@plt>
mov    -0x28(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <int_sort@plt>
mov    -0x28(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1050 <array_print@plt>
mov    -0x18(%rbp),%rax
mov    %rax,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sorted_array_print>:
push   %rbp
mov    %rsp,%rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %rdi,%rsi
mov    %r14d,%eax
mov    %rsp,%rbx
lea    0xf(,%rax,4),%rax
and    $0xfffffffffffffff0,%rax
sub    %rax,%rbx
mov    %rbx,%rsp
lea    0x0(,%r14,4),%edx
mov    %rbx,%rdi
call   1040 <memcpy@plt>
mov    %rbx,%rdi
mov    %r14d,%esi
call   1030 <int_sort@plt>
mov    %rbx,%rdi
mov    %r14d,%esi
call   1050 <array_print@plt>
lea    -0x10(%rbp),%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @sorted_array_print(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32* %0, i32** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = zext i32 %7 to i64
%9 = call i8* @llvm.stacksave()
store i8* %9, i8** %5
%10 = alloca i32, i64 %8
store i64 %8, i64* %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = mul i64 %13, 4
%15 = trunc i64 %14 to i32
%16 = call i32 @memcpy(i32* %10, i32* %11, i32 %15)
%17 = load i32, i32* %4
%18 = call i32 @int_sort(i32* %10, i32 %17)
%19 = load i32, i32* %4
%20 = call i32 @array_print(i32* %10, i32 %19)
%21 = load i8*, i8** %5
ret void
}

LLVM IR (-O2):
define void @sorted_array_print(i32* %0, i32 %1) {
%3 = zext i32 %1 to i64
%4 = alloca i32, i64 %3
%5 = shl i32 %1, 2
%6 = call i32 @memcpy(i32* %4, i32* %0, i32 %5)
%7 = call i32 @int_sort(i32* %4, i32 %1)
%8 = call i32 @array_print(i32* %4, i32 %1)
ret void
}
__attribute__((always_)) void bio_flush_dcache_pages(struct bio *bi) {}


x86 assembly (clang, -O0):
<bio_flush_dcache_pages>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bio_flush_dcache_pages>:
ret

LLVM IR (-O0):
%struct.bio = type opaque
define void @bio_flush_dcache_pages(%struct.bio* %0) {
%2 = alloca %struct.bio*
store %struct.bio* %0, %struct.bio** %2
ret void
}

LLVM IR (-O2):
%struct.bio = type opaque
define void @bio_flush_dcache_pages(%struct.bio* nocapture %0) {
ret void
}
void vexpress_spc_wfi_cpureset(int cluster, int cpu, int enable) {}


x86 assembly (clang, -O0):
<vexpress_spc_wfi_cpureset>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vexpress_spc_wfi_cpureset>:
ret

LLVM IR (-O0):
define void @vexpress_spc_wfi_cpureset(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
define void @vexpress_spc_wfi_cpureset(i32 %0, i32 %1, i32 %2) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t ext_dev_read_32(uint32_t addr, void *ctxt) { return 0; }


x86 assembly (clang, -O0):
<ext_dev_read_32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ext_dev_read_32>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ext_dev_read_32(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @ext_dev_read_32(i32 %0, i8* nocapture readnone %1) {
ret i32 0
}
void c16k_set_b(const unsigned char source, unsigned int values[],
                unsigned int *bar_chars) {
  if (source > 127) {
    values[(*bar_chars)] = source - 32 - 128;
  } else {
    values[(*bar_chars)] = source - 32;
  }
  (*bar_chars)++;
}


x86 assembly (clang, -O0):
<c16k_set_b>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0x7f,%eax
jle    113e <c16k_set_b+0x3e>
movzbl -0x1(%rbp),%edx
sub    $0x20,%edx
sub    $0x80,%edx
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    (%rcx),%ecx
mov    %edx,(%rax,%rcx,4)
jmp    1152 <c16k_set_b+0x52>
movzbl -0x1(%rbp),%edx
sub    $0x20,%edx
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    (%rcx),%ecx
mov    %edx,(%rax,%rcx,4)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<c16k_set_b>:
xor    %eax,%eax
test   %dil,%dil
setns  %al
shl    $0x7,%eax
add    %edi,%eax
add    $0xffffff60,%eax
mov    (%rdx),%ecx
mov    %eax,(%rsi,%rcx,4)
addl   $0x1,(%rdx)
ret

LLVM IR (-O0):
define void @c16k_set_b(i8 zeroext %0, i32* %1, i32* %2) {
%4 = alloca i8
%5 = alloca i32*
%6 = alloca i32*
store i8 %0, i8* %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
%9 = icmp sgt i32 %8, 127
br i1 %9, label %10, label %20
10: ; preds = %3
%11 = load i8, i8* %4
%12 = zext i8 %11 to i32
%13 = sub nsw i32 %12, 32
%14 = sub nsw i32 %13, 128
%15 = load i32*, i32** %5
%16 = load i32*, i32** %6
%17 = load i32, i32* %16
%18 = zext i32 %17 to i64
%19 = getelementptr inbounds i32, i32* %15, i64 %18
store i32 %14, i32* %19
br label %29
20: ; preds = %3
%21 = load i8, i8* %4
%22 = zext i8 %21 to i32
%23 = sub nsw i32 %22, 32
%24 = load i32*, i32** %5
%25 = load i32*, i32** %6
%26 = load i32, i32* %25
%27 = zext i32 %26 to i64
%28 = getelementptr inbounds i32, i32* %24, i64 %27
store i32 %23, i32* %28
br label %29
29: ; preds = %20, %10
%30 = load i32*, i32** %6
%31 = load i32, i32* %30
%32 = add i32 %31, 1
store i32 %32, i32* %30
ret void
}

LLVM IR (-O2):
define void @c16k_set_b(i8 zeroext %0, i32* nocapture writeonly %1, i32* nocapture %2) {
%4 = zext i8 %0 to i32
%5 = icmp slt i8 %0, 0
%6 = select i1 %5, i32 -160, i32 -32
%7 = add nsw i32 %6, %4
%8 = load i32, i32* %2
%9 = zext i32 %8 to i64
%10 = getelementptr inbounds i32, i32* %1, i64 %9
store i32 %7, i32* %10
%11 = load i32, i32* %2
%12 = add i32 %11, 1
store i32 %12, i32* %2
ret void
}
/* Variables and functions */
int M_PI;
double fmod(double, int);
double norm_angle(double alpha) {
  double alpha_n = fmod(alpha, M_PI * 2);
  if (alpha_n < 0.) {
    alpha_n += (M_PI * 2);
  }
  return alpha_n;
}


x86 assembly (clang, -O0):
<norm_angle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    0x2ebf(%rip),%rax
mov    (%rax),%edi
shl    $0x1,%edi
call   1030 <fmod@plt>
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1160 <norm_angle+0x50>
mov    0x2e9b(%rip),%rax
mov    (%rax),%eax
shl    $0x1,%eax
cvtsi2sd %eax,%xmm0
addsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<norm_angle>:
push   %rbx
mov    0x2ed0(%rip),%rbx
mov    (%rbx),%edi
add    %edi,%edi
call   1030 <fmod@plt>
mov    (%rbx),%eax
add    %eax,%eax
cvtsi2sd %eax,%xmm1
xorpd  %xmm2,%xmm2
movapd %xmm0,%xmm3
cmpltsd %xmm2,%xmm3
movsd  0xec2(%rip),%xmm2
movapd %xmm3,%xmm4
andnpd %xmm2,%xmm4
andpd  %xmm1,%xmm3
orpd   %xmm4,%xmm3
addsd  %xmm3,%xmm0
pop    %rbx
ret

LLVM IR (-O0):
@M_PI = global i32 0
define double @norm_angle(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = load i32, i32* @M_PI
%6 = mul nsw i32 %5, 2
%7 = call double @fmod(double %4, i32 %6)
store double %7, double* %3
%8 = load double, double* %3
%9 = fcmp olt double %8, 0.000000e+00
br i1 %9, label %10, label %16
10: ; preds = %1
%11 = load i32, i32* @M_PI
%12 = mul nsw i32 %11, 2
%13 = sitofp i32 %12 to double
%14 = load double, double* %3
%15 = fadd double %14, %13
store double %15, double* %3
br label %16
16: ; preds = %10, %1
%17 = load double, double* %3
ret double %17
}

LLVM IR (-O2):
@M_PI = global i32 0
define double @norm_angle(double %0) {
%2 = load i32, i32* @M_PI
%3 = shl nsw i32 %2, 1
%4 = tail call double @fmod(double %0, i32 %3)
%5 = fcmp olt double %4, 0.000000e+00
%6 = load i32, i32* @M_PI
%7 = shl nsw i32 %6, 1
%8 = sitofp i32 %7 to double
%9 = select i1 %5, double %8, double -0.000000e+00
%10 = fadd double %4, %9
ret double %10
}
void ble_evt_sm_passkey_display(
    const struct ble_msg_sm_passkey_display_evt_t *msg) {}


x86 assembly (clang, -O0):
<ble_evt_sm_passkey_display>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ble_evt_sm_passkey_display>:
ret

LLVM IR (-O0):
%struct.ble_msg_sm_passkey_display_evt_t = type opaque
define void @ble_evt_sm_passkey_display(%struct.ble_msg_sm_passkey_display_evt_t* %0) {
%2 = alloca %struct.ble_msg_sm_passkey_display_evt_t*
store %struct.ble_msg_sm_passkey_display_evt_t* %0, %struct.ble_msg_sm_passkey_display_evt_t** %2
ret void
}

LLVM IR (-O2):
%struct.ble_msg_sm_passkey_display_evt_t = type opaque
define void @ble_evt_sm_passkey_display(%struct.ble_msg_sm_passkey_display_evt_t* nocapture %0) {
ret void
}