int main() {
  volatile float pos1 = 1.;
  volatile float neg1 = -1.;
  volatile float posZero = 0.;
  volatile float negZero = -0.;
  if (__builtin_islessequal(neg1, neg1) == 0) {
    return 1;
  }
  if (__builtin_islessequal(posZero, negZero) == 0) {
    return 1;
  }
  if (__builtin_islessequal(pos1, pos1) == 0) {
    return 1;
  }
  if (__builtin_islessequal(neg1, pos1) == 0) {
    return 1;
  }
  if (__builtin_islessequal(pos1, neg1) != 0) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movss  0xef5(%rip),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  0xee4(%rip),%xmm0
movss  %xmm0,-0xc(%rbp)
xorps  %xmm0,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  0xecb(%rip),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0xc(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
cmp    $0x0,%eax
jne    1164 <main+0x64>
movl   $0x1,-0x4(%rbp)
jmp    1213 <main+0x113>
movss  -0x10(%rbp),%xmm1
movss  -0x14(%rbp),%xmm0
ucomiss %xmm1,%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
cmp    $0x0,%eax
jne    118e <main+0x8e>
movl   $0x1,-0x4(%rbp)
jmp    1213 <main+0x113>
movss  -0x8(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
cmp    $0x0,%eax
jne    11b8 <main+0xb8>
movl   $0x1,-0x4(%rbp)
jmp    1213 <main+0x113>
movss  -0xc(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
cmp    $0x0,%eax
jne    11e2 <main+0xe2>
movl   $0x1,-0x4(%rbp)
jmp    1213 <main+0x113>
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
cmp    $0x0,%eax
je     120c <main+0x10c>
movl   $0x1,-0x4(%rbp)
jmp    1213 <main+0x113>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
movl   $0x3f800000,-0xc(%rsp)
3f
movl   $0xbf800000,-0x10(%rsp)
bf
movl   $0x0,-0x4(%rsp)
movl   $0x80000000,-0x8(%rsp)
80
movss  -0x10(%rsp),%xmm0
movss  -0x10(%rsp),%xmm1
mov    $0x1,%eax
ucomiss %xmm0,%xmm1
jb     117d <main+0x7d>
movss  -0x4(%rsp),%xmm0
movss  -0x8(%rsp),%xmm1
ucomiss %xmm0,%xmm1
jb     117d <main+0x7d>
movss  -0xc(%rsp),%xmm0
movss  -0xc(%rsp),%xmm1
ucomiss %xmm0,%xmm1
jb     117d <main+0x7d>
movss  -0x10(%rsp),%xmm0
movss  -0xc(%rsp),%xmm1
ucomiss %xmm0,%xmm1
jb     117d <main+0x7d>
movss  -0xc(%rsp),%xmm0
movss  -0x10(%rsp),%xmm1
xor    %eax,%eax
ucomiss %xmm0,%xmm1
setae  %al
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca float
%3 = alloca float
%4 = alloca float
%5 = alloca float
store i32 0, i32* %1
store volatile float 1.000000e+00, float* %2
store volatile float -1.000000e+00, float* %3
store volatile float 0.000000e+00, float* %4
store volatile float -0.000000e+00, float* %5
%6 = load volatile float, float* %3
%7 = load volatile float, float* %3
%8 = fcmp ole float %6, %7
%9 = zext i1 %8 to i32
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %0
store i32 1, i32* %1
br label %41
12: ; preds = %0
%13 = load volatile float, float* %4
%14 = load volatile float, float* %5
%15 = fcmp ole float %13, %14
%16 = zext i1 %15 to i32
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %12
store i32 1, i32* %1
br label %41
19: ; preds = %12
%20 = load volatile float, float* %2
%21 = load volatile float, float* %2
%22 = fcmp ole float %20, %21
%23 = zext i1 %22 to i32
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %26
25: ; preds = %19
store i32 1, i32* %1
br label %41
26: ; preds = %19
%27 = load volatile float, float* %3
%28 = load volatile float, float* %2
%29 = fcmp ole float %27, %28
%30 = zext i1 %29 to i32
%31 = icmp eq i32 %30, 0
br i1 %31, label %32, label %33
32: ; preds = %26
store i32 1, i32* %1
br label %41
33: ; preds = %26
%34 = load volatile float, float* %2
%35 = load volatile float, float* %3
%36 = fcmp ole float %34, %35
%37 = zext i1 %36 to i32
%38 = icmp ne i32 %37, 0
br i1 %38, label %39, label %40
39: ; preds = %33
store i32 1, i32* %1
br label %41
40: ; preds = %33
store i32 0, i32* %1
br label %41
41: ; preds = %40, %39, %32, %25, %18, %11
%42 = load i32, i32* %1
ret i32 %42
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca float
%2 = alloca float
%3 = alloca float
%4 = alloca float
%5 = bitcast float* %1 to i8*
store volatile float 1.000000e+00, float* %1
%6 = bitcast float* %2 to i8*
store volatile float -1.000000e+00, float* %2
%7 = bitcast float* %3 to i8*
store volatile float 0.000000e+00, float* %3
%8 = bitcast float* %4 to i8*
store volatile float -0.000000e+00, float* %4
%9 = load volatile float, float* %2
%10 = load volatile float, float* %2
%11 = fcmp ugt float %9, %10
br i1 %11, label %29, label %12
12: ; preds = %0
%13 = load volatile float, float* %3
%14 = load volatile float, float* %4
%15 = fcmp ugt float %13, %14
br i1 %15, label %29, label %16
16: ; preds = %12
%17 = load volatile float, float* %1
%18 = load volatile float, float* %1
%19 = fcmp ugt float %17, %18
br i1 %19, label %29, label %20
20: ; preds = %16
%21 = load volatile float, float* %2
%22 = load volatile float, float* %1
%23 = fcmp ugt float %21, %22
br i1 %23, label %29, label %24
24: ; preds = %20
%25 = load volatile float, float* %1
%26 = load volatile float, float* %2
%27 = fcmp ole float %25, %26
%28 = zext i1 %27 to i32
br label %29
29: ; preds = %24, %20, %16, %12, %0
%30 = phi i32 [ 1, %0 ], [ 1, %12 ], [ 1, %16 ], [ 1, %20 ], [ %28, %24 ]
ret i32 %30
}